diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..18963e1 --- /dev/null +++ b/.gitignore @@ -0,0 +1,24 @@ +out/ +*.o +*.history* +*.indexes* +.metadata +*.bin +*.hex +*.d +*.map +*.lst +.cproject +.project +.settings +*.log +*~ +*.expand + +#Latex Krams +*.aux +*.log +*.aux +*.out +*.pdf +*.toc diff --git a/10_Uebung_SchedulingAnalysis-Part2.pdf b/10_Uebung_SchedulingAnalysis-Part2.pdf new file mode 100644 index 0000000..9a21f72 Binary files /dev/null and b/10_Uebung_SchedulingAnalysis-Part2.pdf differ diff --git a/9_Uebung_SchedulingAnalysis-Part1.pdf b/9_Uebung_SchedulingAnalysis-Part1.pdf new file mode 100644 index 0000000..203c458 Binary files /dev/null and b/9_Uebung_SchedulingAnalysis-Part1.pdf differ diff --git a/Debug/ps7/Aufgabe1/windowSetting.cmm b/Debug/ps7/Aufgabe1/windowSetting.cmm new file mode 100644 index 0000000..ecba986 --- /dev/null +++ b/Debug/ps7/Aufgabe1/windowSetting.cmm @@ -0,0 +1,43 @@ +// T3210000 Wed Sep 27 07:34:53 2017 + + B:: + + TOOLBAR ON + STATUSBAR ON + FramePOS ,,,,Maximized + WinPAGE.RESet + + WinPAGE.Create P000 + WinCLEAR + + WinPOS 0% 0% 50% 78% ,,, W000 + ;WinTABS 10. 10. 25. 62. + wm.List.auto + + WinPOS 50% 0% 30% 28% ,,, W001 + ;WinTABS 13. 0. 0. 0. 0. 0. 0. + wm.Break.List + + WinPOS 50% 30% 30% 70% ,,, W002 + wm.Var.Watch %Hex %Decimal + + VAR.ADDWATCH OSPrioCur + + WinPOS 80% 0% 20% 50% ,,, W003 + wm.Register /SPOTLIGHT + + WinPOS 0% 80% 50% 20% ,,, W004 + wm.Symbol.browse \\*\*\* + ;WinPAN 0. 239. + + ;WinPOS 50% 50% 30% 50% ,,, W005 + ;wm.Perf.ListFunc + + WinPos 80% 50% 20% 50% ,,, W006 + wm.Frame /Locals + + + + WinPAGE.select P000 + + ENDDO diff --git a/Debug/ps7/Aufgabe1/zc706_onchip_trace.cmm b/Debug/ps7/Aufgabe1/zc706_onchip_trace.cmm new file mode 100644 index 0000000..696ba3c --- /dev/null +++ b/Debug/ps7/Aufgabe1/zc706_onchip_trace.cmm @@ -0,0 +1,78 @@ +LOCAL &ppd +&ppd=OS.PPD() +&tmpDir=OS.PTD() + +WinCLEAR + +; -------------------------------------------------------------------------------- +; common SYStem settings +PRINT "Assigning Cores" + +CD &ppd +RESet +System.RESet +SYStem.CPU ZYNQ-7000 +SYStem.CONFIG CORE 1. 1. +SYStem.CONFIG SLAVE OFF +CORE.ASSIGN 1. + +; set DaisyChaining Parameters of the board +; check e.g. SYStem.DETECT.ShowCHAIN +PRINT "Setting up DaisyChain Parameters" +SYStem.CONFIG DAPIRPRE 6. +SYStem.CONFIG DAPIRPOST 0. +SYStem.CONFIG DAPDRPRE 1. +SYStem.CONFIG DAPDRPOST 0. + +; trigger a soft-reset using the AHB Bus -> we loose the connection +PRINT "Trigger Soft-Reset" +SYStem.Mode.Prepare +ON ERROR CONTinue +Data.Set EAHB:0xF8000008 %Long 0xDF0D +Data.Set EAHB:0xF8000200 %Long 0x1 +WAIT 0.1s +PRINT "" +ON ERROR inherit + +PRINT "Attach and initialize" +SYStem.Mode.Attach +Break + +PRINT "initializing the target" +DO "~~/demo/arm/hardware/zynq-7000/scripts/trace/ps7_init.cmm" "&ppd/../ps7_init.tcl" + +PRINT "programming the FPGA design" +LOCAL &bitfile +&bitfile="&ppd/../base_zynq_wrapper.bit" +DO "~~/demo/arm/hardware/zynq-7000/scripts/zynq_bitstream" "&bitfile" 0x00100000 + +; -------------------------------------------------------------------------------- +; initialize ONCHIP trace (ETM) +Trace.Method Onchip +ETM.TraceID 1. +ETM.Trace ON +ETM.ON + +Trace.Clock 666MHz +ETM.TimeMode CycleAccurate + +; Some optional settings +SETUP.Var %SpotLight +MAP.BOnchip 0x0--0xffffffff // force onchip-breakpoints +MODE.HLL + +; load code +Data.LOAD.Elf "&ppd/../../../out/Aufgabe1_ps7_core0.elf" + +; run to main +Go main +WAIT !STATE.RUN() + + +; initialize RTOS support +PRINT "initializing uC/OS-II support..." +TASK.CONFIG ../ucos ; load uC/OS-II Awareness +MENU.ReProgram ../ucos.men ; load uC/OS-II Menu +HELP.FILTER.Add rtosucos ; add ucos awareness manual to help filter + +ENDDO diff --git a/Debug/ps7/Aufgabe2/windowSetting.cmm b/Debug/ps7/Aufgabe2/windowSetting.cmm new file mode 100644 index 0000000..ecba986 --- /dev/null +++ b/Debug/ps7/Aufgabe2/windowSetting.cmm @@ -0,0 +1,43 @@ +// T3210000 Wed Sep 27 07:34:53 2017 + + B:: + + TOOLBAR ON + STATUSBAR ON + FramePOS ,,,,Maximized + WinPAGE.RESet + + WinPAGE.Create P000 + WinCLEAR + + WinPOS 0% 0% 50% 78% ,,, W000 + ;WinTABS 10. 10. 25. 62. + wm.List.auto + + WinPOS 50% 0% 30% 28% ,,, W001 + ;WinTABS 13. 0. 0. 0. 0. 0. 0. + wm.Break.List + + WinPOS 50% 30% 30% 70% ,,, W002 + wm.Var.Watch %Hex %Decimal + + VAR.ADDWATCH OSPrioCur + + WinPOS 80% 0% 20% 50% ,,, W003 + wm.Register /SPOTLIGHT + + WinPOS 0% 80% 50% 20% ,,, W004 + wm.Symbol.browse \\*\*\* + ;WinPAN 0. 239. + + ;WinPOS 50% 50% 30% 50% ,,, W005 + ;wm.Perf.ListFunc + + WinPos 80% 50% 20% 50% ,,, W006 + wm.Frame /Locals + + + + WinPAGE.select P000 + + ENDDO diff --git a/Debug/ps7/Aufgabe2/zc706_onchip_trace.cmm b/Debug/ps7/Aufgabe2/zc706_onchip_trace.cmm new file mode 100644 index 0000000..5d3deb0 --- /dev/null +++ b/Debug/ps7/Aufgabe2/zc706_onchip_trace.cmm @@ -0,0 +1,80 @@ +LOCAL &ppd +&ppd=OS.PPD() +&tmpDir=OS.PTD() + +WinCLEAR + +; -------------------------------------------------------------------------------- +; common SYStem settings +PRINT "Assigning Cores" + +CD &ppd +RESet +System.RESet +SYStem.CPU ZYNQ-7000 +SYStem.CONFIG CORE 1. 1. +SYStem.CONFIG SLAVE OFF +CORE.ASSIGN 1. + +; set DaisyChaining Parameters of the board +; check e.g. SYStem.DETECT.ShowCHAIN +PRINT "Setting up DaisyChain Parameters" +SYStem.CONFIG DAPIRPRE 6. +SYStem.CONFIG DAPIRPOST 0. +SYStem.CONFIG DAPDRPRE 1. +SYStem.CONFIG DAPDRPOST 0. + +; trigger a soft-reset using the AHB Bus -> we loose the connection +PRINT "Trigger Soft-Reset" +SYStem.Mode.Prepare +ON ERROR CONTinue +Data.Set EAHB:0xF8000008 %Long 0xDF0D +Data.Set EAHB:0xF8000200 %Long 0x1 +WAIT 0.1s +PRINT "" +ON ERROR inherit + +PRINT "Attach and initialize" +SYStem.Mode.Attach +Break + +PRINT "initializing the target" +DO "~~/demo/arm/hardware/zynq-7000/scripts/trace/ps7_init.cmm" "&ppd/../ps7_init.tcl" + +PRINT "programming the FPGA design" +LOCAL &bitfile +&bitfile="&ppd/../base_zynq_wrapper.bit" +DO "~~/demo/arm/hardware/zynq-7000/scripts/zynq_bitstream" "&bitfile" 0x00100000 + +; -------------------------------------------------------------------------------- +; initialize ONCHIP trace (ETM) +Trace.Method Onchip +ETM.TraceID 1. +ETM.Trace ON +ETM.ON + +Trace.Clock 666MHz +ETM.TimeMode CycleAccurate + +; Some optional settings +SETUP.Var %SpotLight +MAP.BOnchip 0x0--0xffffffff // force onchip-breakpoints +MODE.HLL + +; load code +Data.LOAD.Elf "&ppd/../../../out/Aufgabe2_ps7_core0.elf" + +; run to main +Go main +WAIT !STATE.RUN() + +; open some windows +DO windowSetting.cmm + +; initialize RTOS support +PRINT "initializing uC/OS-II support..." +TASK.CONFIG ../ucos ; load uC/OS-II Awareness +MENU.ReProgram ../ucos.men ; load uC/OS-II Menu +HELP.FILTER.Add rtosucos ; add ucos awareness manual to help filter + +ENDDO diff --git a/Debug/ps7/Aufgabe3/windowSetting.cmm b/Debug/ps7/Aufgabe3/windowSetting.cmm new file mode 100644 index 0000000..ecba986 --- /dev/null +++ b/Debug/ps7/Aufgabe3/windowSetting.cmm @@ -0,0 +1,43 @@ +// T3210000 Wed Sep 27 07:34:53 2017 + + B:: + + TOOLBAR ON + STATUSBAR ON + FramePOS ,,,,Maximized + WinPAGE.RESet + + WinPAGE.Create P000 + WinCLEAR + + WinPOS 0% 0% 50% 78% ,,, W000 + ;WinTABS 10. 10. 25. 62. + wm.List.auto + + WinPOS 50% 0% 30% 28% ,,, W001 + ;WinTABS 13. 0. 0. 0. 0. 0. 0. + wm.Break.List + + WinPOS 50% 30% 30% 70% ,,, W002 + wm.Var.Watch %Hex %Decimal + + VAR.ADDWATCH OSPrioCur + + WinPOS 80% 0% 20% 50% ,,, W003 + wm.Register /SPOTLIGHT + + WinPOS 0% 80% 50% 20% ,,, W004 + wm.Symbol.browse \\*\*\* + ;WinPAN 0. 239. + + ;WinPOS 50% 50% 30% 50% ,,, W005 + ;wm.Perf.ListFunc + + WinPos 80% 50% 20% 50% ,,, W006 + wm.Frame /Locals + + + + WinPAGE.select P000 + + ENDDO diff --git a/Debug/ps7/Aufgabe3/zc706_onchip_trace.cmm b/Debug/ps7/Aufgabe3/zc706_onchip_trace.cmm new file mode 100644 index 0000000..b071225 --- /dev/null +++ b/Debug/ps7/Aufgabe3/zc706_onchip_trace.cmm @@ -0,0 +1,80 @@ +LOCAL &ppd +&ppd=OS.PPD() +&tmpDir=OS.PTD() + +WinCLEAR + +; -------------------------------------------------------------------------------- +; common SYStem settings +PRINT "Assigning Cores" + +CD &ppd +RESet +System.RESet +SYStem.CPU ZYNQ-7000 +SYStem.CONFIG CORE 1. 1. +SYStem.CONFIG SLAVE OFF +CORE.ASSIGN 1. + +; set DaisyChaining Parameters of the board +; check e.g. SYStem.DETECT.ShowCHAIN +PRINT "Setting up DaisyChain Parameters" +SYStem.CONFIG DAPIRPRE 6. +SYStem.CONFIG DAPIRPOST 0. +SYStem.CONFIG DAPDRPRE 1. +SYStem.CONFIG DAPDRPOST 0. + +; trigger a soft-reset using the AHB Bus -> we loose the connection +PRINT "Trigger Soft-Reset" +SYStem.Mode.Prepare +ON ERROR CONTinue +Data.Set EAHB:0xF8000008 %Long 0xDF0D +Data.Set EAHB:0xF8000200 %Long 0x1 +WAIT 0.1s +PRINT "" +ON ERROR inherit + +PRINT "Attach and initialize" +SYStem.Mode.Attach +Break + +PRINT "initializing the target" +DO "~~/demo/arm/hardware/zynq-7000/scripts/trace/ps7_init.cmm" "&ppd/../ps7_init.tcl" + +PRINT "programming the FPGA design" +LOCAL &bitfile +&bitfile="&ppd/../base_zynq_wrapper.bit" +DO "~~/demo/arm/hardware/zynq-7000/scripts/zynq_bitstream" "&bitfile" 0x00100000 + +; -------------------------------------------------------------------------------- +; initialize ONCHIP trace (ETM) +Trace.Method Onchip +ETM.TraceID 1. +ETM.Trace ON +ETM.ON + +Trace.Clock 666MHz +ETM.TimeMode CycleAccurate + +; Some optional settings +SETUP.Var %SpotLight +MAP.BOnchip 0x0--0xffffffff // force onchip-breakpoints +MODE.HLL + +; load code +Data.LOAD.Elf "&ppd/../../../out/Aufgabe3_ps7_core0.elf" + +; run to main +Go main +WAIT !STATE.RUN() + +; open some windows +DO windowSetting.cmm + +; initialize RTOS support +PRINT "initializing uC/OS-II support..." +TASK.CONFIG ../ucos ; load uC/OS-II Awareness +MENU.ReProgram ../ucos.men ; load uC/OS-II Menu +HELP.FILTER.Add rtosucos ; add ucos awareness manual to help filter + +ENDDO diff --git a/Debug/ps7/Aufgabe4/windowSetting.cmm b/Debug/ps7/Aufgabe4/windowSetting.cmm new file mode 100644 index 0000000..ecba986 --- /dev/null +++ b/Debug/ps7/Aufgabe4/windowSetting.cmm @@ -0,0 +1,43 @@ +// T3210000 Wed Sep 27 07:34:53 2017 + + B:: + + TOOLBAR ON + STATUSBAR ON + FramePOS ,,,,Maximized + WinPAGE.RESet + + WinPAGE.Create P000 + WinCLEAR + + WinPOS 0% 0% 50% 78% ,,, W000 + ;WinTABS 10. 10. 25. 62. + wm.List.auto + + WinPOS 50% 0% 30% 28% ,,, W001 + ;WinTABS 13. 0. 0. 0. 0. 0. 0. + wm.Break.List + + WinPOS 50% 30% 30% 70% ,,, W002 + wm.Var.Watch %Hex %Decimal + + VAR.ADDWATCH OSPrioCur + + WinPOS 80% 0% 20% 50% ,,, W003 + wm.Register /SPOTLIGHT + + WinPOS 0% 80% 50% 20% ,,, W004 + wm.Symbol.browse \\*\*\* + ;WinPAN 0. 239. + + ;WinPOS 50% 50% 30% 50% ,,, W005 + ;wm.Perf.ListFunc + + WinPos 80% 50% 20% 50% ,,, W006 + wm.Frame /Locals + + + + WinPAGE.select P000 + + ENDDO diff --git a/Debug/ps7/Aufgabe4/zc706_onchip_trace.cmm b/Debug/ps7/Aufgabe4/zc706_onchip_trace.cmm new file mode 100644 index 0000000..70b4fcd --- /dev/null +++ b/Debug/ps7/Aufgabe4/zc706_onchip_trace.cmm @@ -0,0 +1,80 @@ +LOCAL &ppd +&ppd=OS.PPD() +&tmpDir=OS.PTD() + +WinCLEAR + +; -------------------------------------------------------------------------------- +; common SYStem settings +PRINT "Assigning Cores" + +CD &ppd +RESet +System.RESet +SYStem.CPU ZYNQ-7000 +SYStem.CONFIG CORE 1. 1. +SYStem.CONFIG SLAVE OFF +CORE.ASSIGN 1. + +; set DaisyChaining Parameters of the board +; check e.g. SYStem.DETECT.ShowCHAIN +PRINT "Setting up DaisyChain Parameters" +SYStem.CONFIG DAPIRPRE 6. +SYStem.CONFIG DAPIRPOST 0. +SYStem.CONFIG DAPDRPRE 1. +SYStem.CONFIG DAPDRPOST 0. + +; trigger a soft-reset using the AHB Bus -> we loose the connection +PRINT "Trigger Soft-Reset" +SYStem.Mode.Prepare +ON ERROR CONTinue +Data.Set EAHB:0xF8000008 %Long 0xDF0D +Data.Set EAHB:0xF8000200 %Long 0x1 +WAIT 0.1s +PRINT "" +ON ERROR inherit + +PRINT "Attach and initialize" +SYStem.Mode.Attach +Break + +PRINT "initializing the target" +DO "~~/demo/arm/hardware/zynq-7000/scripts/trace/ps7_init.cmm" "&ppd/../ps7_init.tcl" + +PRINT "programming the FPGA design" +LOCAL &bitfile +&bitfile="&ppd/../base_zynq_wrapper.bit" +DO "~~/demo/arm/hardware/zynq-7000/scripts/zynq_bitstream" "&bitfile" 0x00100000 + +; -------------------------------------------------------------------------------- +; initialize ONCHIP trace (ETM) +Trace.Method Onchip +ETM.TraceID 1. +ETM.Trace ON +ETM.ON + +Trace.Clock 666MHz +ETM.TimeMode CycleAccurate + +; Some optional settings +SETUP.Var %SpotLight +MAP.BOnchip 0x0--0xffffffff // force onchip-breakpoints +MODE.HLL + +; load code +Data.LOAD.Elf "&ppd/../../../out/Aufgabe4_ps7_core0.elf" + +; run to main +Go main +WAIT !STATE.RUN() + +; open some windows +DO windowSetting.cmm + +; initialize RTOS support +PRINT "initializing uC/OS-II support..." +TASK.CONFIG ../ucos ; load uC/OS-II Awareness +MENU.ReProgram ../ucos.men ; load uC/OS-II Menu +HELP.FILTER.Add rtosucos ; add ucos awareness manual to help filter + +ENDDO diff --git a/Debug/ps7/Aufgabe5/windowSetting.cmm b/Debug/ps7/Aufgabe5/windowSetting.cmm new file mode 100644 index 0000000..ecba986 --- /dev/null +++ b/Debug/ps7/Aufgabe5/windowSetting.cmm @@ -0,0 +1,43 @@ +// T3210000 Wed Sep 27 07:34:53 2017 + + B:: + + TOOLBAR ON + STATUSBAR ON + FramePOS ,,,,Maximized + WinPAGE.RESet + + WinPAGE.Create P000 + WinCLEAR + + WinPOS 0% 0% 50% 78% ,,, W000 + ;WinTABS 10. 10. 25. 62. + wm.List.auto + + WinPOS 50% 0% 30% 28% ,,, W001 + ;WinTABS 13. 0. 0. 0. 0. 0. 0. + wm.Break.List + + WinPOS 50% 30% 30% 70% ,,, W002 + wm.Var.Watch %Hex %Decimal + + VAR.ADDWATCH OSPrioCur + + WinPOS 80% 0% 20% 50% ,,, W003 + wm.Register /SPOTLIGHT + + WinPOS 0% 80% 50% 20% ,,, W004 + wm.Symbol.browse \\*\*\* + ;WinPAN 0. 239. + + ;WinPOS 50% 50% 30% 50% ,,, W005 + ;wm.Perf.ListFunc + + WinPos 80% 50% 20% 50% ,,, W006 + wm.Frame /Locals + + + + WinPAGE.select P000 + + ENDDO diff --git a/Debug/ps7/Aufgabe5/zc706_onchip_trace.cmm b/Debug/ps7/Aufgabe5/zc706_onchip_trace.cmm new file mode 100644 index 0000000..aae50a0 --- /dev/null +++ b/Debug/ps7/Aufgabe5/zc706_onchip_trace.cmm @@ -0,0 +1,80 @@ +LOCAL &ppd +&ppd=OS.PPD() +&tmpDir=OS.PTD() + +WinCLEAR + +; -------------------------------------------------------------------------------- +; common SYStem settings +PRINT "Assigning Cores" + +CD &ppd +RESet +System.RESet +SYStem.CPU ZYNQ-7000 +SYStem.CONFIG CORE 1. 1. +SYStem.CONFIG SLAVE OFF +CORE.ASSIGN 1. + +; set DaisyChaining Parameters of the board +; check e.g. SYStem.DETECT.ShowCHAIN +PRINT "Setting up DaisyChain Parameters" +SYStem.CONFIG DAPIRPRE 6. +SYStem.CONFIG DAPIRPOST 0. +SYStem.CONFIG DAPDRPRE 1. +SYStem.CONFIG DAPDRPOST 0. + +; trigger a soft-reset using the AHB Bus -> we loose the connection +PRINT "Trigger Soft-Reset" +SYStem.Mode.Prepare +ON ERROR CONTinue +Data.Set EAHB:0xF8000008 %Long 0xDF0D +Data.Set EAHB:0xF8000200 %Long 0x1 +WAIT 0.1s +PRINT "" +ON ERROR inherit + +PRINT "Attach and initialize" +SYStem.Mode.Attach +Break + +PRINT "initializing the target" +DO "~~/demo/arm/hardware/zynq-7000/scripts/trace/ps7_init.cmm" "&ppd/../ps7_init.tcl" + +PRINT "programming the FPGA design" +LOCAL &bitfile +&bitfile="&ppd/../base_zynq_wrapper.bit" +DO "~~/demo/arm/hardware/zynq-7000/scripts/zynq_bitstream" "&bitfile" 0x00100000 + +; -------------------------------------------------------------------------------- +; initialize ONCHIP trace (ETM) +Trace.Method Onchip +ETM.TraceID 1. +ETM.Trace ON +ETM.ON + +Trace.Clock 666MHz +ETM.TimeMode CycleAccurate + +; Some optional settings +SETUP.Var %SpotLight +MAP.BOnchip 0x0--0xffffffff // force onchip-breakpoints +MODE.HLL + +; load code +Data.LOAD.Elf "&ppd/../../../out/Aufgabe5_ps7_core0.elf" + +; run to main +Go main +WAIT !STATE.RUN() + +; open some windows +DO windowSetting.cmm + +; initialize RTOS support +PRINT "initializing uC/OS-II support..." +TASK.CONFIG ../ucos ; load uC/OS-II Awareness +MENU.ReProgram ../ucos.men ; load uC/OS-II Menu +HELP.FILTER.Add rtosucos ; add ucos awareness manual to help filter + +ENDDO diff --git a/Debug/ps7/Aufgabe6/windowSetting.cmm b/Debug/ps7/Aufgabe6/windowSetting.cmm new file mode 100644 index 0000000..ecba986 --- /dev/null +++ b/Debug/ps7/Aufgabe6/windowSetting.cmm @@ -0,0 +1,43 @@ +// T3210000 Wed Sep 27 07:34:53 2017 + + B:: + + TOOLBAR ON + STATUSBAR ON + FramePOS ,,,,Maximized + WinPAGE.RESet + + WinPAGE.Create P000 + WinCLEAR + + WinPOS 0% 0% 50% 78% ,,, W000 + ;WinTABS 10. 10. 25. 62. + wm.List.auto + + WinPOS 50% 0% 30% 28% ,,, W001 + ;WinTABS 13. 0. 0. 0. 0. 0. 0. + wm.Break.List + + WinPOS 50% 30% 30% 70% ,,, W002 + wm.Var.Watch %Hex %Decimal + + VAR.ADDWATCH OSPrioCur + + WinPOS 80% 0% 20% 50% ,,, W003 + wm.Register /SPOTLIGHT + + WinPOS 0% 80% 50% 20% ,,, W004 + wm.Symbol.browse \\*\*\* + ;WinPAN 0. 239. + + ;WinPOS 50% 50% 30% 50% ,,, W005 + ;wm.Perf.ListFunc + + WinPos 80% 50% 20% 50% ,,, W006 + wm.Frame /Locals + + + + WinPAGE.select P000 + + ENDDO diff --git a/Debug/ps7/Aufgabe6/zc706_onchip_trace.cmm b/Debug/ps7/Aufgabe6/zc706_onchip_trace.cmm new file mode 100644 index 0000000..958e062 --- /dev/null +++ b/Debug/ps7/Aufgabe6/zc706_onchip_trace.cmm @@ -0,0 +1,81 @@ +LOCAL &ppd +&ppd=OS.PPD() +&tmpDir=OS.PTD() + +WinCLEAR + +; -------------------------------------------------------------------------------- +; common SYStem settings +PRINT "Assigning Cores" + +CD &ppd +RESet +System.RESet +SYStem.CPU ZYNQ-7000 +SYStem.CONFIG CORE 1. 1. +SYStem.CONFIG SLAVE OFF +CORE.ASSIGN 1. + +; set DaisyChaining Parameters of the board +; check e.g. SYStem.DETECT.ShowCHAIN +PRINT "Setting up DaisyChain Parameters" +SYStem.CONFIG DAPIRPRE 6. +SYStem.CONFIG DAPIRPOST 0. +SYStem.CONFIG DAPDRPRE 1. +SYStem.CONFIG DAPDRPOST 0. + +; trigger a soft-reset using the AHB Bus -> we loose the connection +PRINT "Trigger Soft-Reset" +SYStem.Mode.Prepare +ON ERROR CONTinue +Data.Set EAHB:0xF8000008 %Long 0xDF0D +Data.Set EAHB:0xF8000200 %Long 0x1 +WAIT 0.1s +PRINT "" +ON ERROR inherit + +PRINT "Attach and initialize" +SYStem.Mode.Attach +Break + +PRINT "initializing the target" +DO "~~/demo/arm/hardware/zynq-7000/scripts/trace/ps7_init.cmm" "&ppd/../ps7_init.tcl" + +PRINT "programming the FPGA design" +LOCAL &bitfile +&bitfile="&ppd/../base_zynq_wrapper.bit" +DO "~~/demo/arm/hardware/zynq-7000/scripts/zynq_bitstream" "&bitfile" 0x00100000 + +; -------------------------------------------------------------------------------- +; initialize ONCHIP trace (ETM) +Trace.Method Onchip +ETM.TraceID 1. +ETM.Trace ON +ETM.ON + +Trace.Clock 666MHz +ETM.TimeMode CycleAccurate + +; Some optional settings +SETUP.Var %SpotLight +MAP.BOnchip 0x0--0xffffffff // force onchip-breakpoints +MODE.HLL + +; load code +Data.LOAD.Elf "&ppd/../../../out/Aufgabe6_ps7_core0.elf" + +; run to main +Go main +WAIT !STATE.RUN() + +; open some windows +DO windowSetting.cmm + +; initialize RTOS support +PRINT "initializing uC/OS-II support..." +TASK.CONFIG ../ucos ; load uC/OS-II Awareness +MENU.ReProgram ../ucos.men ; load uC/OS-II Menu +HELP.FILTER.Add rtosucos ; add ucos awareness manual to help filter + + +ENDDO diff --git a/Debug/ps7/Aufgabe7/windowSetting.cmm b/Debug/ps7/Aufgabe7/windowSetting.cmm new file mode 100644 index 0000000..ecba986 --- /dev/null +++ b/Debug/ps7/Aufgabe7/windowSetting.cmm @@ -0,0 +1,43 @@ +// T3210000 Wed Sep 27 07:34:53 2017 + + B:: + + TOOLBAR ON + STATUSBAR ON + FramePOS ,,,,Maximized + WinPAGE.RESet + + WinPAGE.Create P000 + WinCLEAR + + WinPOS 0% 0% 50% 78% ,,, W000 + ;WinTABS 10. 10. 25. 62. + wm.List.auto + + WinPOS 50% 0% 30% 28% ,,, W001 + ;WinTABS 13. 0. 0. 0. 0. 0. 0. + wm.Break.List + + WinPOS 50% 30% 30% 70% ,,, W002 + wm.Var.Watch %Hex %Decimal + + VAR.ADDWATCH OSPrioCur + + WinPOS 80% 0% 20% 50% ,,, W003 + wm.Register /SPOTLIGHT + + WinPOS 0% 80% 50% 20% ,,, W004 + wm.Symbol.browse \\*\*\* + ;WinPAN 0. 239. + + ;WinPOS 50% 50% 30% 50% ,,, W005 + ;wm.Perf.ListFunc + + WinPos 80% 50% 20% 50% ,,, W006 + wm.Frame /Locals + + + + WinPAGE.select P000 + + ENDDO diff --git a/Debug/ps7/Aufgabe7/zc706_onchip_trace.cmm b/Debug/ps7/Aufgabe7/zc706_onchip_trace.cmm new file mode 100644 index 0000000..af1df03 --- /dev/null +++ b/Debug/ps7/Aufgabe7/zc706_onchip_trace.cmm @@ -0,0 +1,80 @@ +LOCAL &ppd +&ppd=OS.PPD() +&tmpDir=OS.PTD() + +WinCLEAR + +; -------------------------------------------------------------------------------- +; common SYStem settings +PRINT "Assigning Cores" + +CD &ppd +RESet +System.RESet +SYStem.CPU ZYNQ-7000 +SYStem.CONFIG CORE 1. 1. +SYStem.CONFIG SLAVE OFF +CORE.ASSIGN 1. + +; set DaisyChaining Parameters of the board +; check e.g. SYStem.DETECT.ShowCHAIN +PRINT "Setting up DaisyChain Parameters" +SYStem.CONFIG DAPIRPRE 6. +SYStem.CONFIG DAPIRPOST 0. +SYStem.CONFIG DAPDRPRE 1. +SYStem.CONFIG DAPDRPOST 0. + +; trigger a soft-reset using the AHB Bus -> we loose the connection +PRINT "Trigger Soft-Reset" +SYStem.Mode.Prepare +ON ERROR CONTinue +Data.Set EAHB:0xF8000008 %Long 0xDF0D +Data.Set EAHB:0xF8000200 %Long 0x1 +WAIT 0.1s +PRINT "" +ON ERROR inherit + +PRINT "Attach and initialize" +SYStem.Mode.Attach +Break + +PRINT "initializing the target" +DO "~~/demo/arm/hardware/zynq-7000/scripts/trace/ps7_init.cmm" "&ppd/../ps7_init.tcl" + +PRINT "programming the FPGA design" +LOCAL &bitfile +&bitfile="&ppd/../base_zynq_wrapper.bit" +DO "~~/demo/arm/hardware/zynq-7000/scripts/zynq_bitstream" "&bitfile" 0x00100000 + +; -------------------------------------------------------------------------------- +; initialize ONCHIP trace (ETM) +Trace.Method Onchip +ETM.TraceID 1. +ETM.Trace ON +ETM.ON + +Trace.Clock 666MHz +ETM.TimeMode CycleAccurate + +; Some optional settings +SETUP.Var %SpotLight +MAP.BOnchip 0x0--0xffffffff // force onchip-breakpoints +MODE.HLL + +; load code +Data.LOAD.Elf "&ppd/../../../out/Aufgabe7_ps7_core0.elf" + +; run to main +Go main +WAIT !STATE.RUN() + +; open some windows +DO windowSetting.cmm + +; initialize RTOS support +PRINT "initializing uC/OS-II support..." +TASK.CONFIG ../ucos ; load uC/OS-II Awareness +MENU.ReProgram ../ucos.men ; load uC/OS-II Menu +HELP.FILTER.Add rtosucos ; add ucos awareness manual to help filter + +ENDDO diff --git a/Debug/ps7/base_zynq_wrapper.bit b/Debug/ps7/base_zynq_wrapper.bit new file mode 100644 index 0000000..2913609 Binary files /dev/null and b/Debug/ps7/base_zynq_wrapper.bit differ diff --git a/Debug/ps7/config_amp.t32 b/Debug/ps7/config_amp.t32 new file mode 100644 index 0000000..3f1b831 --- /dev/null +++ b/Debug/ps7/config_amp.t32 @@ -0,0 +1,33 @@ +; -------------------------------------------------------------------------------- +; @Title: TRACE32 Configuration file for AMP multicore debugging +; @Description: +; Parametrized configuration file for TRACE32 to start multiple instances of +; TRACE32 for AMP debugging +; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only +; -------------------------------------------------------------------------------- +; $Id: config_amp.t32 10188 2016-11-18 08:23:44Z amerkle $ + +IC=NETASSIST +PORT=${1} + +; Environment variables +OS= +ID=T32_PORT${1} +TMP=${3} +SYS=${4} +HELP=${4}/pdf + +PBI= +${5} +${6} +${7} +${8} + +; Screen fonts +SCREEN= +VFULL +HEADER=${2} TRACE32 + +TCF= +PORT=${9} + diff --git a/Debug/ps7/corefcc.t32 b/Debug/ps7/corefcc.t32 new file mode 100644 index 0000000..b81f2fc Binary files /dev/null and b/Debug/ps7/corefcc.t32 differ diff --git a/Debug/ps7/ps7_init.tcl b/Debug/ps7/ps7_init.tcl new file mode 100644 index 0000000..2856c42 --- /dev/null +++ b/Debug/ps7/ps7_init.tcl @@ -0,0 +1,874 @@ +proc ps7_pll_init_data_3_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000110 0x003FFFF0 0x000FA220 + mask_write 0XF8000100 0x0007F000 0x00028000 + mask_write 0XF8000100 0x00000010 0x00000010 + mask_write 0XF8000100 0x00000001 0x00000001 + mask_write 0XF8000100 0x00000001 0x00000000 + mask_poll 0XF800010C 0x00000001 + mask_write 0XF8000100 0x00000010 0x00000000 + mask_write 0XF8000120 0x1F003F30 0x1F000200 + mask_write 0XF8000114 0x003FFFF0 0x0012C220 + mask_write 0XF8000104 0x0007F000 0x00020000 + mask_write 0XF8000104 0x00000010 0x00000010 + mask_write 0XF8000104 0x00000001 0x00000001 + mask_write 0XF8000104 0x00000001 0x00000000 + mask_poll 0XF800010C 0x00000002 + mask_write 0XF8000104 0x00000010 0x00000000 + mask_write 0XF8000124 0xFFF00003 0x0C200003 + mask_write 0XF8000118 0x003FFFF0 0x001452C0 + mask_write 0XF8000108 0x0007F000 0x0001E000 + mask_write 0XF8000108 0x00000010 0x00000010 + mask_write 0XF8000108 0x00000001 0x00000001 + mask_write 0XF8000108 0x00000001 0x00000000 + mask_poll 0XF800010C 0x00000004 + mask_write 0XF8000108 0x00000010 0x00000000 + mwr -force 0XF8000004 0x0000767B +} +proc ps7_clock_init_data_3_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000128 0x03F03F01 0x00700F01 + mask_write 0XF8000138 0x00000011 0x00000001 + mask_write 0XF8000140 0x03F03F71 0x00500801 + mask_write 0XF800014C 0x00003F31 0x00000501 + mask_write 0XF8000150 0x00003F33 0x00001401 + mask_write 0XF8000154 0x00003F33 0x00001402 + mask_write 0XF8000168 0x00003F31 0x00000501 + mask_write 0XF8000170 0x03F03F30 0x00400500 + mask_write 0XF80001C4 0x00000001 0x00000001 + mask_write 0XF800012C 0x01FFCCCD 0x01EC044D + mwr -force 0XF8000004 0x0000767B +} +proc ps7_ddr_init_data_3_0 {} { + mask_write 0XF8006000 0x0001FFFF 0x00000080 + mask_write 0XF8006004 0x0007FFFF 0x00001081 + mask_write 0XF8006008 0x03FFFFFF 0x03C0780F + mask_write 0XF800600C 0x03FFFFFF 0x02001001 + mask_write 0XF8006010 0x03FFFFFF 0x00014001 + mask_write 0XF8006014 0x001FFFFF 0x0004159B + mask_write 0XF8006018 0xF7FFFFFF 0x452440D2 + mask_write 0XF800601C 0xFFFFFFFF 0x720238E5 + mask_write 0XF8006020 0x7FDFFFFC 0x27087290 + mask_write 0XF8006024 0x0FFFFFC3 0x00000000 + mask_write 0XF8006028 0x00003FFF 0x00002007 + mask_write 0XF800602C 0xFFFFFFFF 0x00000008 + mask_write 0XF8006030 0xFFFFFFFF 0x00040930 + mask_write 0XF8006034 0x13FF3FFF 0x000116D4 + mask_write 0XF8006038 0x00000003 0x00000000 + mask_write 0XF800603C 0x000FFFFF 0x00000777 + mask_write 0XF8006040 0xFFFFFFFF 0xFFF00000 + mask_write 0XF8006044 0x0FFFFFFF 0x0F666666 + mask_write 0XF8006048 0x0003F03F 0x0003C008 + mask_write 0XF8006050 0xFF0F8FFF 0x77010800 + mask_write 0XF8006058 0x00010000 0x00000000 + mask_write 0XF800605C 0x0000FFFF 0x00005003 + mask_write 0XF8006060 0x000017FF 0x0000003E + mask_write 0XF8006064 0x00021FE0 0x00020000 + mask_write 0XF8006068 0x03FFFFFF 0x00284141 + mask_write 0XF800606C 0x0000FFFF 0x00001610 + mask_write 0XF8006078 0x03FFFFFF 0x00466111 + mask_write 0XF800607C 0x000FFFFF 0x00032222 + mask_write 0XF80060A4 0xFFFFFFFF 0x10200802 + mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73 + mask_write 0XF80060AC 0x000001FF 0x000001FE + mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF + mask_write 0XF80060B4 0x00000200 0x00000200 + mask_write 0XF80060B8 0x01FFFFFF 0x00200066 + mask_write 0XF80060C4 0x00000003 0x00000000 + mask_write 0XF80060C8 0x000000FF 0x00000000 + mask_write 0XF80060DC 0x00000001 0x00000000 + mask_write 0XF80060F0 0x0000FFFF 0x00000000 + mask_write 0XF80060F4 0x0000000F 0x00000008 + mask_write 0XF8006114 0x000000FF 0x00000000 + mask_write 0XF8006118 0x7FFFFFCF 0x40000001 + mask_write 0XF800611C 0x7FFFFFCF 0x40000001 + mask_write 0XF8006120 0x7FFFFFCF 0x40000001 + mask_write 0XF8006124 0x7FFFFFCF 0x40000001 + mask_write 0XF800612C 0x000FFFFF 0x0003B81E + mask_write 0XF8006130 0x000FFFFF 0x00043425 + mask_write 0XF8006134 0x000FFFFF 0x0003CC19 + mask_write 0XF8006138 0x000FFFFF 0x0004242A + mask_write 0XF8006140 0x000FFFFF 0x00000035 + mask_write 0XF8006144 0x000FFFFF 0x00000035 + mask_write 0XF8006148 0x000FFFFF 0x00000035 + mask_write 0XF800614C 0x000FFFFF 0x00000035 + mask_write 0XF8006154 0x000FFFFF 0x0000009E + mask_write 0XF8006158 0x000FFFFF 0x000000A5 + mask_write 0XF800615C 0x000FFFFF 0x00000099 + mask_write 0XF8006160 0x000FFFFF 0x000000AA + mask_write 0XF8006168 0x001FFFFF 0x00000143 + mask_write 0XF800616C 0x001FFFFF 0x00000162 + mask_write 0XF8006170 0x001FFFFF 0x00000148 + mask_write 0XF8006174 0x001FFFFF 0x0000015E + mask_write 0XF800617C 0x000FFFFF 0x000000DE + mask_write 0XF8006180 0x000FFFFF 0x000000E5 + mask_write 0XF8006184 0x000FFFFF 0x000000D9 + mask_write 0XF8006188 0x000FFFFF 0x000000EA + mask_write 0XF8006190 0x6FFFFEFE 0x00040080 + mask_write 0XF8006194 0x000FFFFF 0x0001FC82 + mask_write 0XF8006204 0xFFFFFFFF 0x00000000 + mask_write 0XF8006208 0x000703FF 0x000003FF + mask_write 0XF800620C 0x000703FF 0x000003FF + mask_write 0XF8006210 0x000703FF 0x000003FF + mask_write 0XF8006214 0x000703FF 0x000003FF + mask_write 0XF8006218 0x000F03FF 0x000003FF + mask_write 0XF800621C 0x000F03FF 0x000003FF + mask_write 0XF8006220 0x000F03FF 0x000003FF + mask_write 0XF8006224 0x000F03FF 0x000003FF + mask_write 0XF80062A8 0x00000FF5 0x00000000 + mask_write 0XF80062AC 0xFFFFFFFF 0x00000000 + mask_write 0XF80062B0 0x003FFFFF 0x00005125 + mask_write 0XF80062B4 0x0003FFFF 0x000012A8 + mask_poll 0XF8000B74 0x00002000 + mask_write 0XF8006000 0x0001FFFF 0x00000081 + mask_poll 0XF8006054 0x00000007 +} +proc ps7_mio_init_data_3_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000B00 0x00000071 0x00000001 + mask_write 0XF8000B40 0x00000FFF 0x00000600 + mask_write 0XF8000B44 0x00000FFF 0x00000600 + mask_write 0XF8000B48 0x00000FFF 0x00000672 + mask_write 0XF8000B4C 0x00000FFF 0x00000672 + mask_write 0XF8000B50 0x00000FFF 0x00000674 + mask_write 0XF8000B54 0x00000FFF 0x00000674 + mask_write 0XF8000B58 0x00000FFF 0x00000600 + mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C + mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C + mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C + mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C + mask_write 0XF8000B6C 0x00007FFF 0x00000209 + mask_write 0XF8000B70 0x00000001 0x00000001 + mask_write 0XF8000B70 0x00000021 0x00000020 + mask_write 0XF8000B70 0x07FEFFFF 0x00000823 + mask_write 0XF8000700 0x00003FFF 0x00001202 + mask_write 0XF8000704 0x00003FFF 0x00001202 + mask_write 0XF8000708 0x00003FFF 0x00000202 + mask_write 0XF800070C 0x00003FFF 0x00000202 + mask_write 0XF8000710 0x00003FFF 0x00000202 + mask_write 0XF8000714 0x00003FFF 0x00000202 + mask_write 0XF8000718 0x00003FFF 0x00000202 + mask_write 0XF800071C 0x00003FFF 0x00000200 + mask_write 0XF8000720 0x00003FFF 0x00000202 + mask_write 0XF8000724 0x00003FFF 0x00001202 + mask_write 0XF8000728 0x00003FFF 0x00001202 + mask_write 0XF800072C 0x00003FFF 0x00001202 + mask_write 0XF8000730 0x00003FFF 0x00001202 + mask_write 0XF8000734 0x00003FFF 0x00001202 + mask_write 0XF8000738 0x00003F01 0x00001201 + mask_write 0XF800073C 0x00003F01 0x00001201 + mask_write 0XF8000740 0x00003FFF 0x00002802 + mask_write 0XF8000744 0x00003FFF 0x00002802 + mask_write 0XF8000748 0x00003FFF 0x00002802 + mask_write 0XF800074C 0x00003FFF 0x00002802 + mask_write 0XF8000750 0x00003FFF 0x00002802 + mask_write 0XF8000754 0x00003FFF 0x00002802 + mask_write 0XF8000758 0x00003FFF 0x00000803 + mask_write 0XF800075C 0x00003FFF 0x00000803 + mask_write 0XF8000760 0x00003FFF 0x00000803 + mask_write 0XF8000764 0x00003FFF 0x00000803 + mask_write 0XF8000768 0x00003FFF 0x00000803 + mask_write 0XF800076C 0x00003FFF 0x00000803 + mask_write 0XF8000770 0x00003FFF 0x00000204 + mask_write 0XF8000774 0x00003FFF 0x00000205 + mask_write 0XF8000778 0x00003FFF 0x00000204 + mask_write 0XF800077C 0x00003FFF 0x00000205 + mask_write 0XF8000780 0x00003FFF 0x00000204 + mask_write 0XF8000784 0x00003FFF 0x00000204 + mask_write 0XF8000788 0x00003FFF 0x00000204 + mask_write 0XF800078C 0x00003FFF 0x00000204 + mask_write 0XF8000790 0x00003FFF 0x00000205 + mask_write 0XF8000794 0x00003FFF 0x00000204 + mask_write 0XF8000798 0x00003FFF 0x00000204 + mask_write 0XF800079C 0x00003FFF 0x00000204 + mask_write 0XF80007A0 0x00003FFF 0x00000280 + mask_write 0XF80007A4 0x00003FFF 0x00000280 + mask_write 0XF80007A8 0x00003FFF 0x00000280 + mask_write 0XF80007AC 0x00003FFF 0x00000280 + mask_write 0XF80007B0 0x00003FFF 0x00000280 + mask_write 0XF80007B4 0x00003FFF 0x00000280 + mask_write 0XF80007B8 0x00003FFF 0x00001200 + mask_write 0XF80007BC 0x00003FFF 0x00001200 + mask_write 0XF80007C0 0x00003FFF 0x000002E0 + mask_write 0XF80007C4 0x00003FFF 0x000002E1 + mask_write 0XF80007C8 0x00003FFF 0x00001240 + mask_write 0XF80007CC 0x00003FFF 0x00001240 + mask_write 0XF80007D0 0x00003FFF 0x00000280 + mask_write 0XF80007D4 0x00003FFF 0x00000280 + mask_write 0XF8000830 0x003F003F 0x000E000F + mwr -force 0XF8000004 0x0000767B +} +proc ps7_peripherals_init_data_3_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000B48 0x00000180 0x00000180 + mask_write 0XF8000B4C 0x00000180 0x00000180 + mask_write 0XF8000B50 0x00000180 0x00000180 + mask_write 0XF8000B54 0x00000180 0x00000180 + mwr -force 0XF8000004 0x0000767B + mask_write 0XE0001034 0x000000FF 0x00000006 + mask_write 0XE0001018 0x0000FFFF 0x0000003E + mask_write 0XE0001000 0x000001FF 0x00000017 + mask_write 0XE0001004 0x000003FF 0x00000020 + mask_write 0XE000D000 0x00080000 0x00080000 + mask_write 0XF8007000 0x20000000 0x00000000 + mask_write 0XE000A204 0xFFFFFFFF 0x00000080 + mask_write 0XE000A000 0xFFFFFFFF 0xFF7F0080 + mask_write 0XE000A208 0xFFFFFFFF 0x00000080 + mask_write 0XE000A000 0xFFFFFFFF 0xFF7F0000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A000 0xFFFFFFFF 0xFF7F0080 + mask_write 0XE000A244 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0x7FFF8000 + mask_write 0XE000A248 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0x7FFF0000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A008 0xFFFFFFFF 0x7FFF8000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A244 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0xBFFF4000 + mask_write 0XE000A248 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0xBFFF0000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A008 0xFFFFFFFF 0xBFFF4000 +} +proc ps7_post_config_3_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000900 0x0000000F 0x0000000F + mask_write 0XF8000240 0xFFFFFFFF 0x00000000 + mwr -force 0XF8000004 0x0000767B +} +proc ps7_debug_3_0 {} { + mwr -force 0XF8898FB0 0xC5ACCE55 + mwr -force 0XF8899FB0 0xC5ACCE55 + mwr -force 0XF8809FB0 0xC5ACCE55 +} +proc ps7_pll_init_data_2_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000110 0x003FFFF0 0x000FA220 + mask_write 0XF8000100 0x0007F000 0x00028000 + mask_write 0XF8000100 0x00000010 0x00000010 + mask_write 0XF8000100 0x00000001 0x00000001 + mask_write 0XF8000100 0x00000001 0x00000000 + mask_poll 0XF800010C 0x00000001 + mask_write 0XF8000100 0x00000010 0x00000000 + mask_write 0XF8000120 0x1F003F30 0x1F000200 + mask_write 0XF8000114 0x003FFFF0 0x0012C220 + mask_write 0XF8000104 0x0007F000 0x00020000 + mask_write 0XF8000104 0x00000010 0x00000010 + mask_write 0XF8000104 0x00000001 0x00000001 + mask_write 0XF8000104 0x00000001 0x00000000 + mask_poll 0XF800010C 0x00000002 + mask_write 0XF8000104 0x00000010 0x00000000 + mask_write 0XF8000124 0xFFF00003 0x0C200003 + mask_write 0XF8000118 0x003FFFF0 0x001452C0 + mask_write 0XF8000108 0x0007F000 0x0001E000 + mask_write 0XF8000108 0x00000010 0x00000010 + mask_write 0XF8000108 0x00000001 0x00000001 + mask_write 0XF8000108 0x00000001 0x00000000 + mask_poll 0XF800010C 0x00000004 + mask_write 0XF8000108 0x00000010 0x00000000 + mwr -force 0XF8000004 0x0000767B +} +proc ps7_clock_init_data_2_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000128 0x03F03F01 0x00700F01 + mask_write 0XF8000138 0x00000011 0x00000001 + mask_write 0XF8000140 0x03F03F71 0x00500801 + mask_write 0XF800014C 0x00003F31 0x00000501 + mask_write 0XF8000150 0x00003F33 0x00001401 + mask_write 0XF8000154 0x00003F33 0x00001402 + mask_write 0XF8000168 0x00003F31 0x00000501 + mask_write 0XF8000170 0x03F03F30 0x00400500 + mask_write 0XF80001C4 0x00000001 0x00000001 + mask_write 0XF800012C 0x01FFCCCD 0x01EC044D + mwr -force 0XF8000004 0x0000767B +} +proc ps7_ddr_init_data_2_0 {} { + mask_write 0XF8006000 0x0001FFFF 0x00000080 + mask_write 0XF8006004 0x1FFFFFFF 0x00081081 + mask_write 0XF8006008 0x03FFFFFF 0x03C0780F + mask_write 0XF800600C 0x03FFFFFF 0x02001001 + mask_write 0XF8006010 0x03FFFFFF 0x00014001 + mask_write 0XF8006014 0x001FFFFF 0x0004159B + mask_write 0XF8006018 0xF7FFFFFF 0x452440D2 + mask_write 0XF800601C 0xFFFFFFFF 0x720238E5 + mask_write 0XF8006020 0xFFFFFFFC 0x27287290 + mask_write 0XF8006024 0x0FFFFFFF 0x0000003C + mask_write 0XF8006028 0x00003FFF 0x00002007 + mask_write 0XF800602C 0xFFFFFFFF 0x00000008 + mask_write 0XF8006030 0xFFFFFFFF 0x00040930 + mask_write 0XF8006034 0x13FF3FFF 0x000116D4 + mask_write 0XF8006038 0x00001FC3 0x00000000 + mask_write 0XF800603C 0x000FFFFF 0x00000777 + mask_write 0XF8006040 0xFFFFFFFF 0xFFF00000 + mask_write 0XF8006044 0x0FFFFFFF 0x0F666666 + mask_write 0XF8006048 0x3FFFFFFF 0x0003C248 + mask_write 0XF8006050 0xFF0F8FFF 0x77010800 + mask_write 0XF8006058 0x0001FFFF 0x00000101 + mask_write 0XF800605C 0x0000FFFF 0x00005003 + mask_write 0XF8006060 0x000017FF 0x0000003E + mask_write 0XF8006064 0x00021FE0 0x00020000 + mask_write 0XF8006068 0x03FFFFFF 0x00284141 + mask_write 0XF800606C 0x0000FFFF 0x00001610 + mask_write 0XF8006078 0x03FFFFFF 0x00466111 + mask_write 0XF800607C 0x000FFFFF 0x00032222 + mask_write 0XF80060A0 0x00FFFFFF 0x00008000 + mask_write 0XF80060A4 0xFFFFFFFF 0x10200802 + mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73 + mask_write 0XF80060AC 0x000001FF 0x000001FE + mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF + mask_write 0XF80060B4 0x000007FF 0x00000200 + mask_write 0XF80060B8 0x01FFFFFF 0x00200066 + mask_write 0XF80060C4 0x00000003 0x00000000 + mask_write 0XF80060C8 0x000000FF 0x00000000 + mask_write 0XF80060DC 0x00000001 0x00000000 + mask_write 0XF80060F0 0x0000FFFF 0x00000000 + mask_write 0XF80060F4 0x0000000F 0x00000008 + mask_write 0XF8006114 0x000000FF 0x00000000 + mask_write 0XF8006118 0x7FFFFFFF 0x40000001 + mask_write 0XF800611C 0x7FFFFFFF 0x40000001 + mask_write 0XF8006120 0x7FFFFFFF 0x40000001 + mask_write 0XF8006124 0x7FFFFFFF 0x40000001 + mask_write 0XF800612C 0x000FFFFF 0x0003B81E + mask_write 0XF8006130 0x000FFFFF 0x00043425 + mask_write 0XF8006134 0x000FFFFF 0x0003CC19 + mask_write 0XF8006138 0x000FFFFF 0x0004242A + mask_write 0XF8006140 0x000FFFFF 0x00000035 + mask_write 0XF8006144 0x000FFFFF 0x00000035 + mask_write 0XF8006148 0x000FFFFF 0x00000035 + mask_write 0XF800614C 0x000FFFFF 0x00000035 + mask_write 0XF8006154 0x000FFFFF 0x0000009E + mask_write 0XF8006158 0x000FFFFF 0x000000A5 + mask_write 0XF800615C 0x000FFFFF 0x00000099 + mask_write 0XF8006160 0x000FFFFF 0x000000AA + mask_write 0XF8006168 0x001FFFFF 0x00000143 + mask_write 0XF800616C 0x001FFFFF 0x00000162 + mask_write 0XF8006170 0x001FFFFF 0x00000148 + mask_write 0XF8006174 0x001FFFFF 0x0000015E + mask_write 0XF800617C 0x000FFFFF 0x000000DE + mask_write 0XF8006180 0x000FFFFF 0x000000E5 + mask_write 0XF8006184 0x000FFFFF 0x000000D9 + mask_write 0XF8006188 0x000FFFFF 0x000000EA + mask_write 0XF8006190 0xFFFFFFFF 0x10040080 + mask_write 0XF8006194 0x000FFFFF 0x0001FC82 + mask_write 0XF8006204 0xFFFFFFFF 0x00000000 + mask_write 0XF8006208 0x000F03FF 0x000803FF + mask_write 0XF800620C 0x000F03FF 0x000803FF + mask_write 0XF8006210 0x000F03FF 0x000803FF + mask_write 0XF8006214 0x000F03FF 0x000803FF + mask_write 0XF8006218 0x000F03FF 0x000003FF + mask_write 0XF800621C 0x000F03FF 0x000003FF + mask_write 0XF8006220 0x000F03FF 0x000003FF + mask_write 0XF8006224 0x000F03FF 0x000003FF + mask_write 0XF80062A8 0x00000FF7 0x00000000 + mask_write 0XF80062AC 0xFFFFFFFF 0x00000000 + mask_write 0XF80062B0 0x003FFFFF 0x00005125 + mask_write 0XF80062B4 0x0003FFFF 0x000012A8 + mask_poll 0XF8000B74 0x00002000 + mask_write 0XF8006000 0x0001FFFF 0x00000081 + mask_poll 0XF8006054 0x00000007 +} +proc ps7_mio_init_data_2_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000B00 0x00000303 0x00000001 + mask_write 0XF8000B40 0x00000FFF 0x00000600 + mask_write 0XF8000B44 0x00000FFF 0x00000600 + mask_write 0XF8000B48 0x00000FFF 0x00000672 + mask_write 0XF8000B4C 0x00000FFF 0x00000672 + mask_write 0XF8000B50 0x00000FFF 0x00000674 + mask_write 0XF8000B54 0x00000FFF 0x00000674 + mask_write 0XF8000B58 0x00000FFF 0x00000600 + mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C + mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C + mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C + mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C + mask_write 0XF8000B6C 0x00007FFF 0x00000209 + mask_write 0XF8000B70 0x00000021 0x00000021 + mask_write 0XF8000B70 0x00000021 0x00000020 + mask_write 0XF8000B70 0x07FFFFFF 0x00000823 + mask_write 0XF8000700 0x00003FFF 0x00001202 + mask_write 0XF8000704 0x00003FFF 0x00001202 + mask_write 0XF8000708 0x00003FFF 0x00000202 + mask_write 0XF800070C 0x00003FFF 0x00000202 + mask_write 0XF8000710 0x00003FFF 0x00000202 + mask_write 0XF8000714 0x00003FFF 0x00000202 + mask_write 0XF8000718 0x00003FFF 0x00000202 + mask_write 0XF800071C 0x00003FFF 0x00000200 + mask_write 0XF8000720 0x00003FFF 0x00000202 + mask_write 0XF8000724 0x00003FFF 0x00001202 + mask_write 0XF8000728 0x00003FFF 0x00001202 + mask_write 0XF800072C 0x00003FFF 0x00001202 + mask_write 0XF8000730 0x00003FFF 0x00001202 + mask_write 0XF8000734 0x00003FFF 0x00001202 + mask_write 0XF8000738 0x00003F01 0x00001201 + mask_write 0XF800073C 0x00003F01 0x00001201 + mask_write 0XF8000740 0x00003FFF 0x00002802 + mask_write 0XF8000744 0x00003FFF 0x00002802 + mask_write 0XF8000748 0x00003FFF 0x00002802 + mask_write 0XF800074C 0x00003FFF 0x00002802 + mask_write 0XF8000750 0x00003FFF 0x00002802 + mask_write 0XF8000754 0x00003FFF 0x00002802 + mask_write 0XF8000758 0x00003FFF 0x00000803 + mask_write 0XF800075C 0x00003FFF 0x00000803 + mask_write 0XF8000760 0x00003FFF 0x00000803 + mask_write 0XF8000764 0x00003FFF 0x00000803 + mask_write 0XF8000768 0x00003FFF 0x00000803 + mask_write 0XF800076C 0x00003FFF 0x00000803 + mask_write 0XF8000770 0x00003FFF 0x00000204 + mask_write 0XF8000774 0x00003FFF 0x00000205 + mask_write 0XF8000778 0x00003FFF 0x00000204 + mask_write 0XF800077C 0x00003FFF 0x00000205 + mask_write 0XF8000780 0x00003FFF 0x00000204 + mask_write 0XF8000784 0x00003FFF 0x00000204 + mask_write 0XF8000788 0x00003FFF 0x00000204 + mask_write 0XF800078C 0x00003FFF 0x00000204 + mask_write 0XF8000790 0x00003FFF 0x00000205 + mask_write 0XF8000794 0x00003FFF 0x00000204 + mask_write 0XF8000798 0x00003FFF 0x00000204 + mask_write 0XF800079C 0x00003FFF 0x00000204 + mask_write 0XF80007A0 0x00003FFF 0x00000280 + mask_write 0XF80007A4 0x00003FFF 0x00000280 + mask_write 0XF80007A8 0x00003FFF 0x00000280 + mask_write 0XF80007AC 0x00003FFF 0x00000280 + mask_write 0XF80007B0 0x00003FFF 0x00000280 + mask_write 0XF80007B4 0x00003FFF 0x00000280 + mask_write 0XF80007B8 0x00003FFF 0x00001200 + mask_write 0XF80007BC 0x00003FFF 0x00001200 + mask_write 0XF80007C0 0x00003FFF 0x000002E0 + mask_write 0XF80007C4 0x00003FFF 0x000002E1 + mask_write 0XF80007C8 0x00003FFF 0x00001240 + mask_write 0XF80007CC 0x00003FFF 0x00001240 + mask_write 0XF80007D0 0x00003FFF 0x00000280 + mask_write 0XF80007D4 0x00003FFF 0x00000280 + mask_write 0XF8000830 0x003F003F 0x000E000F + mwr -force 0XF8000004 0x0000767B +} +proc ps7_peripherals_init_data_2_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000B48 0x00000180 0x00000180 + mask_write 0XF8000B4C 0x00000180 0x00000180 + mask_write 0XF8000B50 0x00000180 0x00000180 + mask_write 0XF8000B54 0x00000180 0x00000180 + mwr -force 0XF8000004 0x0000767B + mask_write 0XE0001034 0x000000FF 0x00000006 + mask_write 0XE0001018 0x0000FFFF 0x0000003E + mask_write 0XE0001000 0x000001FF 0x00000017 + mask_write 0XE0001004 0x00000FFF 0x00000020 + mask_write 0XE000D000 0x00080000 0x00080000 + mask_write 0XF8007000 0x20000000 0x00000000 + mask_write 0XE000A204 0xFFFFFFFF 0x00000080 + mask_write 0XE000A000 0xFFFFFFFF 0xFF7F0080 + mask_write 0XE000A208 0xFFFFFFFF 0x00000080 + mask_write 0XE000A000 0xFFFFFFFF 0xFF7F0000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A000 0xFFFFFFFF 0xFF7F0080 + mask_write 0XE000A244 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0x7FFF8000 + mask_write 0XE000A248 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0x7FFF0000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A008 0xFFFFFFFF 0x7FFF8000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A244 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0xBFFF4000 + mask_write 0XE000A248 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0xBFFF0000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A008 0xFFFFFFFF 0xBFFF4000 +} +proc ps7_post_config_2_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000900 0x0000000F 0x0000000F + mask_write 0XF8000240 0xFFFFFFFF 0x00000000 + mwr -force 0XF8000004 0x0000767B +} +proc ps7_debug_2_0 {} { + mwr -force 0XF8898FB0 0xC5ACCE55 + mwr -force 0XF8899FB0 0xC5ACCE55 + mwr -force 0XF8809FB0 0xC5ACCE55 +} +proc ps7_pll_init_data_1_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000110 0x003FFFF0 0x000FA220 + mask_write 0XF8000100 0x0007F000 0x00028000 + mask_write 0XF8000100 0x00000010 0x00000010 + mask_write 0XF8000100 0x00000001 0x00000001 + mask_write 0XF8000100 0x00000001 0x00000000 + mask_poll 0XF800010C 0x00000001 + mask_write 0XF8000100 0x00000010 0x00000000 + mask_write 0XF8000120 0x1F003F30 0x1F000200 + mask_write 0XF8000114 0x003FFFF0 0x0012C220 + mask_write 0XF8000104 0x0007F000 0x00020000 + mask_write 0XF8000104 0x00000010 0x00000010 + mask_write 0XF8000104 0x00000001 0x00000001 + mask_write 0XF8000104 0x00000001 0x00000000 + mask_poll 0XF800010C 0x00000002 + mask_write 0XF8000104 0x00000010 0x00000000 + mask_write 0XF8000124 0xFFF00003 0x0C200003 + mask_write 0XF8000118 0x003FFFF0 0x001452C0 + mask_write 0XF8000108 0x0007F000 0x0001E000 + mask_write 0XF8000108 0x00000010 0x00000010 + mask_write 0XF8000108 0x00000001 0x00000001 + mask_write 0XF8000108 0x00000001 0x00000000 + mask_poll 0XF800010C 0x00000004 + mask_write 0XF8000108 0x00000010 0x00000000 + mwr -force 0XF8000004 0x0000767B +} +proc ps7_clock_init_data_1_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000128 0x03F03F01 0x00700F01 + mask_write 0XF8000138 0x00000011 0x00000001 + mask_write 0XF8000140 0x03F03F71 0x00500801 + mask_write 0XF800014C 0x00003F31 0x00000501 + mask_write 0XF8000150 0x00003F33 0x00001401 + mask_write 0XF8000154 0x00003F33 0x00001402 + mask_write 0XF8000168 0x00003F31 0x00000501 + mask_write 0XF8000170 0x03F03F30 0x00400500 + mask_write 0XF80001C4 0x00000001 0x00000001 + mask_write 0XF800012C 0x01FFCCCD 0x01EC044D + mwr -force 0XF8000004 0x0000767B +} +proc ps7_ddr_init_data_1_0 {} { + mask_write 0XF8006000 0x0001FFFF 0x00000080 + mask_write 0XF8006004 0x1FFFFFFF 0x00081081 + mask_write 0XF8006008 0x03FFFFFF 0x03C0780F + mask_write 0XF800600C 0x03FFFFFF 0x02001001 + mask_write 0XF8006010 0x03FFFFFF 0x00014001 + mask_write 0XF8006014 0x001FFFFF 0x0004159B + mask_write 0XF8006018 0xF7FFFFFF 0x452440D2 + mask_write 0XF800601C 0xFFFFFFFF 0x720238E5 + mask_write 0XF8006020 0xFFFFFFFC 0x27287290 + mask_write 0XF8006024 0x0FFFFFFF 0x0000003C + mask_write 0XF8006028 0x00003FFF 0x00002007 + mask_write 0XF800602C 0xFFFFFFFF 0x00000008 + mask_write 0XF8006030 0xFFFFFFFF 0x00040930 + mask_write 0XF8006034 0x13FF3FFF 0x000116D4 + mask_write 0XF8006038 0x00001FC3 0x00000000 + mask_write 0XF800603C 0x000FFFFF 0x00000777 + mask_write 0XF8006040 0xFFFFFFFF 0xFFF00000 + mask_write 0XF8006044 0x0FFFFFFF 0x0F666666 + mask_write 0XF8006048 0x3FFFFFFF 0x0003C248 + mask_write 0XF8006050 0xFF0F8FFF 0x77010800 + mask_write 0XF8006058 0x0001FFFF 0x00000101 + mask_write 0XF800605C 0x0000FFFF 0x00005003 + mask_write 0XF8006060 0x000017FF 0x0000003E + mask_write 0XF8006064 0x00021FE0 0x00020000 + mask_write 0XF8006068 0x03FFFFFF 0x00284141 + mask_write 0XF800606C 0x0000FFFF 0x00001610 + mask_write 0XF80060A0 0x00FFFFFF 0x00008000 + mask_write 0XF80060A4 0xFFFFFFFF 0x10200802 + mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73 + mask_write 0XF80060AC 0x000001FF 0x000001FE + mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF + mask_write 0XF80060B4 0x000007FF 0x00000200 + mask_write 0XF80060B8 0x01FFFFFF 0x00200066 + mask_write 0XF80060C4 0x00000003 0x00000000 + mask_write 0XF80060C8 0x000000FF 0x00000000 + mask_write 0XF80060DC 0x00000001 0x00000000 + mask_write 0XF80060F0 0x0000FFFF 0x00000000 + mask_write 0XF80060F4 0x0000000F 0x00000008 + mask_write 0XF8006114 0x000000FF 0x00000000 + mask_write 0XF8006118 0x7FFFFFFF 0x40000001 + mask_write 0XF800611C 0x7FFFFFFF 0x40000001 + mask_write 0XF8006120 0x7FFFFFFF 0x40000001 + mask_write 0XF8006124 0x7FFFFFFF 0x40000001 + mask_write 0XF800612C 0x000FFFFF 0x0003B81E + mask_write 0XF8006130 0x000FFFFF 0x00043425 + mask_write 0XF8006134 0x000FFFFF 0x0003CC19 + mask_write 0XF8006138 0x000FFFFF 0x0004242A + mask_write 0XF8006140 0x000FFFFF 0x00000035 + mask_write 0XF8006144 0x000FFFFF 0x00000035 + mask_write 0XF8006148 0x000FFFFF 0x00000035 + mask_write 0XF800614C 0x000FFFFF 0x00000035 + mask_write 0XF8006154 0x000FFFFF 0x0000009E + mask_write 0XF8006158 0x000FFFFF 0x000000A5 + mask_write 0XF800615C 0x000FFFFF 0x00000099 + mask_write 0XF8006160 0x000FFFFF 0x000000AA + mask_write 0XF8006168 0x001FFFFF 0x00000143 + mask_write 0XF800616C 0x001FFFFF 0x00000162 + mask_write 0XF8006170 0x001FFFFF 0x00000148 + mask_write 0XF8006174 0x001FFFFF 0x0000015E + mask_write 0XF800617C 0x000FFFFF 0x000000DE + mask_write 0XF8006180 0x000FFFFF 0x000000E5 + mask_write 0XF8006184 0x000FFFFF 0x000000D9 + mask_write 0XF8006188 0x000FFFFF 0x000000EA + mask_write 0XF8006190 0xFFFFFFFF 0x10040080 + mask_write 0XF8006194 0x000FFFFF 0x0001FC82 + mask_write 0XF8006204 0xFFFFFFFF 0x00000000 + mask_write 0XF8006208 0x000F03FF 0x000803FF + mask_write 0XF800620C 0x000F03FF 0x000803FF + mask_write 0XF8006210 0x000F03FF 0x000803FF + mask_write 0XF8006214 0x000F03FF 0x000803FF + mask_write 0XF8006218 0x000F03FF 0x000003FF + mask_write 0XF800621C 0x000F03FF 0x000003FF + mask_write 0XF8006220 0x000F03FF 0x000003FF + mask_write 0XF8006224 0x000F03FF 0x000003FF + mask_write 0XF80062A8 0x00000FF7 0x00000000 + mask_write 0XF80062AC 0xFFFFFFFF 0x00000000 + mask_write 0XF80062B0 0x003FFFFF 0x00005125 + mask_write 0XF80062B4 0x0003FFFF 0x000012A8 + mask_poll 0XF8000B74 0x00002000 + mask_write 0XF8006000 0x0001FFFF 0x00000081 + mask_poll 0XF8006054 0x00000007 +} +proc ps7_mio_init_data_1_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000B00 0x00000303 0x00000001 + mask_write 0XF8000B40 0x00000FFF 0x00000600 + mask_write 0XF8000B44 0x00000FFF 0x00000600 + mask_write 0XF8000B48 0x00000FFF 0x00000672 + mask_write 0XF8000B4C 0x00000FFF 0x00000672 + mask_write 0XF8000B50 0x00000FFF 0x00000674 + mask_write 0XF8000B54 0x00000FFF 0x00000674 + mask_write 0XF8000B58 0x00000FFF 0x00000600 + mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C + mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C + mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C + mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C + mask_write 0XF8000B6C 0x000073FF 0x00000209 + mask_write 0XF8000B70 0x00000021 0x00000021 + mask_write 0XF8000B70 0x00000021 0x00000020 + mask_write 0XF8000B70 0x07FFFFFF 0x00000823 + mask_write 0XF8000700 0x00003FFF 0x00001202 + mask_write 0XF8000704 0x00003FFF 0x00001202 + mask_write 0XF8000708 0x00003FFF 0x00000202 + mask_write 0XF800070C 0x00003FFF 0x00000202 + mask_write 0XF8000710 0x00003FFF 0x00000202 + mask_write 0XF8000714 0x00003FFF 0x00000202 + mask_write 0XF8000718 0x00003FFF 0x00000202 + mask_write 0XF800071C 0x00003FFF 0x00000200 + mask_write 0XF8000720 0x00003FFF 0x00000202 + mask_write 0XF8000724 0x00003FFF 0x00001202 + mask_write 0XF8000728 0x00003FFF 0x00001202 + mask_write 0XF800072C 0x00003FFF 0x00001202 + mask_write 0XF8000730 0x00003FFF 0x00001202 + mask_write 0XF8000734 0x00003FFF 0x00001202 + mask_write 0XF8000738 0x00003F01 0x00001201 + mask_write 0XF800073C 0x00003F01 0x00001201 + mask_write 0XF8000740 0x00003FFF 0x00002802 + mask_write 0XF8000744 0x00003FFF 0x00002802 + mask_write 0XF8000748 0x00003FFF 0x00002802 + mask_write 0XF800074C 0x00003FFF 0x00002802 + mask_write 0XF8000750 0x00003FFF 0x00002802 + mask_write 0XF8000754 0x00003FFF 0x00002802 + mask_write 0XF8000758 0x00003FFF 0x00000803 + mask_write 0XF800075C 0x00003FFF 0x00000803 + mask_write 0XF8000760 0x00003FFF 0x00000803 + mask_write 0XF8000764 0x00003FFF 0x00000803 + mask_write 0XF8000768 0x00003FFF 0x00000803 + mask_write 0XF800076C 0x00003FFF 0x00000803 + mask_write 0XF8000770 0x00003FFF 0x00000204 + mask_write 0XF8000774 0x00003FFF 0x00000205 + mask_write 0XF8000778 0x00003FFF 0x00000204 + mask_write 0XF800077C 0x00003FFF 0x00000205 + mask_write 0XF8000780 0x00003FFF 0x00000204 + mask_write 0XF8000784 0x00003FFF 0x00000204 + mask_write 0XF8000788 0x00003FFF 0x00000204 + mask_write 0XF800078C 0x00003FFF 0x00000204 + mask_write 0XF8000790 0x00003FFF 0x00000205 + mask_write 0XF8000794 0x00003FFF 0x00000204 + mask_write 0XF8000798 0x00003FFF 0x00000204 + mask_write 0XF800079C 0x00003FFF 0x00000204 + mask_write 0XF80007A0 0x00003FFF 0x00000280 + mask_write 0XF80007A4 0x00003FFF 0x00000280 + mask_write 0XF80007A8 0x00003FFF 0x00000280 + mask_write 0XF80007AC 0x00003FFF 0x00000280 + mask_write 0XF80007B0 0x00003FFF 0x00000280 + mask_write 0XF80007B4 0x00003FFF 0x00000280 + mask_write 0XF80007B8 0x00003FFF 0x00001200 + mask_write 0XF80007BC 0x00003FFF 0x00001200 + mask_write 0XF80007C0 0x00003FFF 0x000002E0 + mask_write 0XF80007C4 0x00003FFF 0x000002E1 + mask_write 0XF80007C8 0x00003FFF 0x00001240 + mask_write 0XF80007CC 0x00003FFF 0x00001240 + mask_write 0XF80007D0 0x00003FFF 0x00000280 + mask_write 0XF80007D4 0x00003FFF 0x00000280 + mask_write 0XF8000830 0x003F003F 0x000E000F + mwr -force 0XF8000004 0x0000767B +} +proc ps7_peripherals_init_data_1_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000B48 0x00000180 0x00000180 + mask_write 0XF8000B4C 0x00000180 0x00000180 + mask_write 0XF8000B50 0x00000180 0x00000180 + mask_write 0XF8000B54 0x00000180 0x00000180 + mwr -force 0XF8000004 0x0000767B + mask_write 0XE0001034 0x000000FF 0x00000006 + mask_write 0XE0001018 0x0000FFFF 0x0000003E + mask_write 0XE0001000 0x000001FF 0x00000017 + mask_write 0XE0001004 0x00000FFF 0x00000020 + mask_write 0XE000D000 0x00080000 0x00080000 + mask_write 0XF8007000 0x20000000 0x00000000 + mask_write 0XE000A204 0xFFFFFFFF 0x00000080 + mask_write 0XE000A000 0xFFFFFFFF 0xFF7F0080 + mask_write 0XE000A208 0xFFFFFFFF 0x00000080 + mask_write 0XE000A000 0xFFFFFFFF 0xFF7F0000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A000 0xFFFFFFFF 0xFF7F0080 + mask_write 0XE000A244 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0x7FFF8000 + mask_write 0XE000A248 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0x7FFF0000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A008 0xFFFFFFFF 0x7FFF8000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A244 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0xBFFF4000 + mask_write 0XE000A248 0x003FFFFF 0x0000C000 + mask_write 0XE000A008 0xFFFFFFFF 0xBFFF0000 + mask_delay 0XF8F00200 1 + mask_write 0XE000A008 0xFFFFFFFF 0xBFFF4000 +} +proc ps7_post_config_1_0 {} { + mwr -force 0XF8000008 0x0000DF0D + mask_write 0XF8000900 0x0000000F 0x0000000F + mask_write 0XF8000240 0xFFFFFFFF 0x00000000 + mwr -force 0XF8000004 0x0000767B +} +proc ps7_debug_1_0 {} { + mwr -force 0XF8898FB0 0xC5ACCE55 + mwr -force 0XF8899FB0 0xC5ACCE55 + mwr -force 0XF8809FB0 0xC5ACCE55 +} +set PCW_SILICON_VER_1_0 "0x0" +set PCW_SILICON_VER_2_0 "0x1" +set PCW_SILICON_VER_3_0 "0x2" +set APU_FREQ 667000000 + + + +proc mask_poll { addr mask } { + set count 1 + set curval "0x[string range [mrd $addr] end-8 end]" + set maskedval [expr {$curval & $mask}] + while { $maskedval == 0 } { + set curval "0x[string range [mrd $addr] end-8 end]" + set maskedval [expr {$curval & $mask}] + set count [ expr { $count + 1 } ] + if { $count == 100000000 } { + puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask" + break + } + } +} + + + +proc mask_delay { addr val } { + set delay [ get_number_of_cycles_for_delay $val ] + perf_reset_and_start_timer + set curval "0x[string range [mrd $addr] end-8 end]" + set maskedval [expr {$curval < $delay}] + while { $maskedval == 1 } { + set curval "0x[string range [mrd $addr] end-8 end]" + set maskedval [expr {$curval < $delay}] + } + perf_reset_clock +} + +proc ps_version { } { + set si_ver "0x[string range [mrd 0xF8007080] end-8 end]" + set mask_sil_ver "0x[expr {$si_ver >> 28}]" + return $mask_sil_ver; +} + +proc ps7_post_config {} { + set saved_mode [configparams force-mem-accesses] + configparams force-mem-accesses 1 + + variable PCW_SILICON_VER_1_0 + variable PCW_SILICON_VER_2_0 + variable PCW_SILICON_VER_3_0 + set sil_ver [ps_version] + + if { $sil_ver == $PCW_SILICON_VER_1_0} { + ps7_post_config_1_0 + } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } { + ps7_post_config_2_0 + } else { + ps7_post_config_3_0 + } + configparams force-mem-accesses $saved_mode +} + +proc ps7_debug {} { + variable PCW_SILICON_VER_1_0 + variable PCW_SILICON_VER_2_0 + variable PCW_SILICON_VER_3_0 + set sil_ver [ps_version] + + if { $sil_ver == $PCW_SILICON_VER_1_0} { + ps7_debug_1_0 + } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } { + ps7_debug_2_0 + } else { + ps7_debug_3_0 + } +} +proc ps7_init {} { + variable PCW_SILICON_VER_1_0 + variable PCW_SILICON_VER_2_0 + variable PCW_SILICON_VER_3_0 + set sil_ver [ps_version] + if { $sil_ver == $PCW_SILICON_VER_1_0} { + ps7_mio_init_data_1_0 + ps7_pll_init_data_1_0 + ps7_clock_init_data_1_0 + ps7_ddr_init_data_1_0 + ps7_peripherals_init_data_1_0 + #puts "PCW Silicon Version : 1.0" + } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } { + ps7_mio_init_data_2_0 + ps7_pll_init_data_2_0 + ps7_clock_init_data_2_0 + ps7_ddr_init_data_2_0 + ps7_peripherals_init_data_2_0 + #puts "PCW Silicon Version : 2.0" + } else { + ps7_mio_init_data_3_0 + ps7_pll_init_data_3_0 + ps7_clock_init_data_3_0 + ps7_ddr_init_data_3_0 + ps7_peripherals_init_data_3_0 + #puts "PCW Silicon Version : 3.0" + } +} + + +# For delay calculation using global timer + +# start timer + proc perf_start_clock { } { + + #writing SCU_GLOBAL_TIMER_CONTROL register + + mask_write 0xF8F00208 0x00000109 0x00000009 +} + +# stop timer and reset timer count regs + proc perf_reset_clock { } { + perf_disable_clock + mask_write 0xF8F00200 0xFFFFFFFF 0x00000000 + mask_write 0xF8F00204 0xFFFFFFFF 0x00000000 +} + +# Compute mask for given delay in miliseconds +proc get_number_of_cycles_for_delay { delay } { + + # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x) + variable APU_FREQ + return [ expr ($delay * $APU_FREQ /(2 * 1000))] +} + + +# stop timer +proc perf_disable_clock {} { + mask_write 0xF8F00208 0xFFFFFFFF 0x00000000 +} + +proc perf_reset_and_start_timer {} { + perf_reset_clock + perf_start_clock +} + + diff --git a/Debug/ps7/start_amp_session.sh b/Debug/ps7/start_amp_session.sh new file mode 100755 index 0000000..7ca233c --- /dev/null +++ b/Debug/ps7/start_amp_session.sh @@ -0,0 +1,66 @@ +#!/bin/bash +# -------------------------------------------------------------------------------- +# @Title: Bash script to start TRACE32 with AMP mode +# @Description: +# Linux/MacOS bash script for a one-click start of the amp demo. It assumes +# TRACE32 is installed to /opt/t32, modify it to fit your needs. +# Usage USB: +# ./amp_demo_start_session0.sh +# Usage Ethernet: +# ./amp_demo_start_session0.sh +# ./amp_demo_start_session0.sh +# Other core(s) will be started by the t32_amp.cmm practice script. +# @Props: NoWelcome NoMetaTags Template +# @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only +# -------------------------------------------------------------------------------- +# $Id: amp_demo_start_session0.sh 10188 2016-11-18 08:23:44Z amerkle $ + + +# ppwd will be the absolute path to the current bash script +export ppwd=$( cd $(dirname "$0") && pwd) + +USER_ID=`id -u` +USER_ID_SUFFIX=${USER_ID:(-4)} + +P1_PORT=$((10000+$USER_ID_SUFFIX)) +P2_TITLE=ARM_AMP_CORE0 +P3_TMP=/tmp +P4_SYS=/tools/lauterbach/r_2018_02 +P9_TCF="$((20000+$USER_ID_SUFFIX))" + +if [[ ! ${1} ]]; then + echo "Please specify lauterbach hostname" + exit -1 +else + # Parameters for Ethernet connection + P5_PBI=NET + P6_OPT=NODE=${1} + P7_OPT=PACKLEN=1024 + P8_OPT=CORE=1 +fi + +# Detect the system is 32bit or 64bit +MACHINE='pc_linux' +MACHINE_TYPE=`uname -m` +if [ $MACHINE_TYPE == 'x86_64' ]; then + MACHINE='pc_linux64' +fi + +if [ ! -x ${T32MARCH_EXE} ]; then + echo "t32marm-qt not found." + echo "Please check that P4_SYS is set to your TRACE32 system directory." + echo "(Current value: ${P4_SYS})" + pause + exit -1 +else + # set T32SYS environment variable + export T32SYS=${P4_SYS} +fi + +cd ${ppwd} +# Last but not least start TRACE32 + +${T32SYS}/bin/${MACHINE}/t32marm-qt \ + -graphicssystem raster \ + -c "${ppwd}/config_amp.t32" ${P1_PORT} ${P2_TITLE} ${P3_TMP} ${P4_SYS} ${P5_PBI} ${P6_OPT} ${P7_OPT} ${P8_OPT} ${P9_TCF} + diff --git a/Debug/ps7/ucos.men b/Debug/ps7/ucos.men new file mode 100644 index 0000000..e6fbe9b --- /dev/null +++ b/Debug/ps7/ucos.men @@ -0,0 +1,284 @@ +; -------------------------------------------------------------------------------- +; @Title: Menu File for TRACE32 uC/OS-II Awareness +; @Description: - +; @Keywords: ucos menu awareness +; @Author: DIE +; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only +; -------------------------------------------------------------------------------- +; $Id: ucos.men 1958 2017-02-28 08:02:50Z rdienstbeck $ + +add +menu +( + popup "&uC/OS" + ( + if y.exist(T32OUT) + ( + menuitem "&RTOS Terminal" "TERM T32OUT 0" + separator + ) + default + menuitem "Display &Tasks" "TASK.Task" + menuitem "Display &Events" "TASK.Event" + menuitem "Display &Flags" "TASK.Flag" + menuitem "Display &Timers" "TASK.TImer" + menuitem "Display &Memory Partitions" "TASK.Memory" + if task.par.avail()==1 + ( + menuitem "Display &Space Partitions" "TASK.PARTition" + ) + if task.proc.avail()==1 + ( + menuitem "Display &Processes" "TASK.PROCess" + ) + separator + popup "&Stack Coverage" + ( + menuitem "&List Stacks" + ( + if !ice() + TASK.STacK.PATtern 0 + TASK.STacK + ) + menuitem "Add Task" "TASK.STacK.ADD" + menuitem "Remove Task" "TASK.STacK.ReMove" + enable ice() + menuitem "&Reset Coverage" "TASK.STacK.RESet" + ) + ) + popup "Trace" + ( + popup "List" + ( + separator + menuitem "&Task Switches" "Trace.List List.TASK" + menuitem "&Default and Tasks" "Trace.List List.TASK DEFault" + ) + ) + popup "Perf" + ( + separator + popup "&Task Runtime" + ( + menuitem "&Prepare" + ( + if t.method.analyzer() + ( + Analyzer.AutoInit on + ) + if (ice()||fire())&&!a.mode.flow() + ( + Analyzer.ReProgram + ( + Sample.Enable if AlphaBreak&&Write + ) + Break.Delete /Alpha + Break.Set task.config(magic)++(task.config(magicsize)-1) /Alpha + ) + if a.mode.flow() + ( + Break.Delete /TraceEnable + Break.Set task.config(magic) /TraceEnable + ) + ) + menuitem "[:perf]Show &Numerical" "Trace.STATistic.TASK" + menuitem "[:achart]Show as &Timing" "Trace.CHART.TASK" + menuitem "[:achart]Tracking with Trace &List" + ( + Trace.List List.TASK DEFault /Track + Trace.CHART.TASK /Track + ) + ) + popup "Task &Function Runtime" + ( + menuitem "&Prepare" + ( + if t.method.analyzer() + ( + Analyzer.AutoInit on + Analyzer.STATistic.PreFetch on + ) + + if (ice()||fire())&&!a.mode.flow() + ( + if a.config.hac() + ( + Analyzer.ReProgram + ( + Sample.Enable if AlphaBreak + Sample.Enable if BetaBreak + Mark.A if AlphaBreak + Mark.B if BetaBreak + ) + ) + else + ( + Analyzer.ReProgram + ( + Sample.Enable if AlphaBreak||BetaBreak + Mark.A if AlphaBreak + Mark.B if BetaBreak + ) + ) + Break.Delete /Alpha /Beta /Charly + Break.SetFunc + Break.Set task.config(magic)++(task.config(magicsize)-1) /Alpha + ) + if a.mode.flow() + ( + Break.Delete /TraceData + Break.Set task.config(magic) /TraceData + ) + ) + menuitem "[:perf]Show &Numerical" "Trace.STATistic.TASKFUNC" + menuitem "[:perf]Show as &Tree" "Trace.STATistic.TASKTREE" + menuitem "[:perf]Show &Detailed Tree" "Trace.STATistic.TASKTREE ALL" + menuitem "[:achart]Show as &Timing" "Trace.CHART.TASKFUNC" + menuitem "[:alist]Show N&esting" "Trace.List List.TASK FUNC TI.FUNC" + ) + popup "Task &Status" + ( + menuitem "&Prepare" + ( + if t.method.analyzer() + ( + Analyzer.AutoInit on + ) + if (ice()||fire())&&!a.mode.flow() + ( + Analyzer.ReProgram + ( + Sample.Enable if AlphaBreak&&Write + ) + Break.Delete /Alpha + Break.Set task.config(magic)++(task.config(magicsize)-1) /Alpha + TASK.TASKState + ) + ) + menuitem "[:perf]Show &Numerical" "Trace.STATistic.TASKSTATE" + menuitem "[:achart]Show as &Timing" "Trace.CHART.TASKSTATE" + menuitem "[:achart]Tracking with Trace &List" + ( + Trace.List List.TASK DEFault /Track + Trace.CHART.TASKSTATE /Track + ) + ) + ) + popup "&Help" + ( + menuitem "µC/OS RTOS Debugger Manual" "HELP __RTOS_UCOS_" + ) +) + + +menu "task.task" +( + default + menuitem "Display Detailed" "TASK.Task track.address()" + menuitem "Display TCB" + ( + &address=address.offset(track.address()) + &struct=task.struct(tcb) + Var.View %Open %String (&struct)*&address + ) + separator + menuitem "Display Stack Frame" + ( + &address=address.offset(track.address()) + Var.Frame /Locals /Caller /Task &address + ) + menuitem "Switch Context" "Register.TASK address.offset(track.address())" + separator + menuitem "Add to Stack Cov" "TASK.STK.ADD address.offset(track.address())" + menuitem "Rm from Stack Cov" "TASK.STK.RM address.offset(track.address())" + separator + menuitem "Dump TCB" + ( + &address=address.offset(track.address()) + Data.dump &address + ) +) + + +menu "task.event" +( + default + menuitem "Display Detailed" "TASK.Event track.address()" + menuitem "Display ECB" + ( + &address=address.offset(track.address()) + v.v %m (struct os_event*)&address + ) + menuitem "Dump ECB" + ( + &address=address.offset(track.address()) + Data.dump &address + ) +) + + +menu "task.e.q" +( + menuitem "Display QCB" + ( + &address=address.offset(track.address()) + v.v %m (struct os_q*)&address + ) + default + menuitem "Dump QCB" + ( + &address=address.offset(track.address()) + Data.dump &address + ) +) + + +menu "task.flag" +( + default + menuitem "Display Detailed" "TASK.Flag track.address()" + menuitem "Display FCB" + ( + &address=address.offset(track.address()) + Var.View %m %s (struct os_flag_grp*)&address + ) + menuitem "Dump FCB" + ( + &address=address.offset(track.address()) + Data.dump &address + ) +) + + +menu "task.timer" +( + default + menuitem "Display Detailed" "TASK.TImer track.address()" + menuitem "Display Tmr CB" + ( + &address=address.offset(track.address()) + Var.View %m %s (struct os_tmr*)&address + ) + menuitem "Dump Tmr CB" + ( + &address=address.offset(track.address()) + Data.dump &address + ) +) + + +menu "task.par" +( + default + menuitem "Display Detailed" "TASK.PARtition track.address()" + menuitem "Display partition struct" + ( + &address=address.offset(track.address()) + Var.View %m %s (PAR_PARAM_T*)&address + ) + menuitem "Dump partition struct" + ( + &address=address.offset(track.address()) + Data.dump &address + ) +) diff --git a/Debug/ps7/ucos.t32 b/Debug/ps7/ucos.t32 new file mode 100644 index 0000000..6cdd9f9 Binary files /dev/null and b/Debug/ps7/ucos.t32 differ diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..3833560 --- /dev/null +++ b/Makefile @@ -0,0 +1,104 @@ +ifeq ($(ARCH),psua53) +CC = aarch64-elf-gcc +AR = aarch64-elf-ar +AS = aarch64-elf-as +CP = aarch64-elf-objcopy +OD = aarch64-elf-objdump +SIZE = aarch64-elf-size +else +CC = arm-none-eabi-gcc +AR = arm-none-eabi-ar +AS = arm-none-eabi-as +CP = arm-none-eabi-objcopy +OD = arm-none-eabi-objdump +SIZE = arm-none-eabi-size +endif + +ifeq (, $(shell which ${CC})) +$(error "No ${CC} in PATH variable, please extend PATH variable") +endif + +SRC_DIR = ./src +BUILD_DIR = ./Build +DEBUG_DIR = ./Debug +OUT_DIR = ./out + +TARGET := $(APP)_$(ARCH)_core$(CORE) +TARGET_DIR := $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/ + +OBJ_DIR = ./$(OUT_DIR)/$(TARGET) + +# Load specific config for compiler, linker, ... +-include $(TARGET_DIR)/build/config.mk + +#Output files: elf, map and list-file +EXECUTABLE=$(OBJ_DIR)/../$(TARGET).elf +MAPFILE=$(OBJ_DIR)/../$(TARGET).map +LISTFILE=$(OBJ_DIR)/../$(TARGET).lst + +# Path to linker script +ifndef LDSCRIPT +LDSCRIPT = -T$(TARGET_DIR)/linker/lscript.ld +endif + +#Include source-files: +SRC = +-include $(TARGET_DIR)/build/Sources.mk + +INC = -I./ +-include $(TARGET_DIR)/build/includes.mk + +# C source files +CFILES = $(filter %.c, $(SRC)) +# Assembly source files +ASMFILES = $(filter %.s, $(SRC)) +# Object files +COBJ = $(CFILES:$(SRC_DIR)/%.c=$(OBJ_DIR)/%.o) +SOBJ = $(ASMFILES:$(SRC_DIR)/%.S=$(OBJ_DIR)/%.o) +OBJ = $(SOBJ) $(COBJ) + +$(info CFILES : ${CFILES}) + +# Flags +CFLAGS = $(MCFLAGS) $(DEBUG) $(OPTIMIZE) -MP -MMD -std=gnu11 +ASFLAGS = $(MCFLAGS) $(DEBUG) $(OPTIMIZE) -MP -MMD -x assembler-with-cpp +ODFLAGS = --source --all-headers --demangle --line-numbers --wide + +all: info $(LISTFILE) postbuild + +$(LISTFILE): $(EXECUTABLE) + @echo 'Generating Listfile: $<' + @$(OD) $(ODFLAGS) -d $< > $@ + +$(EXECUTABLE): $(OBJ) + @echo 'Linking: $@' + $(CD) $(CFLAGS) $(LDSCRIPT) -Wl,-Map,"$(MAPFILE)" -o "$@" $(sort $(OBJ)) $(LDFLAGS) + +$(COBJ): $(OBJ_DIR)/%.o: $(SRC_DIR)/%.c + @echo 'Building file: $<' + @mkdir -p $(@D) + $(CC) -c $(CFLAGS) $(INC) -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -o $@ $< >/dev/null + +$(SOBJ): $(OBJ_DIR)/%.o: $(SRC_DIR)/%.S + @echo 'Building file: $<' + @mkdir -p $(@D) + $(CC) -c $(ASFLAGS) $(INC) -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -o $@ $< >/dev/null + +.PHONY: clean, info + +info: + $(info APP : ${APP}) + $(info TARGET : ${TARGET}) + $(info TARGET_DIR : ${TARGET_DIR}) + $(info Linker file : ${LDSCRIPT}) + $(info CFLAGS : ${CFLAGS}) + $(info ASFLAGS : ${ASFLAGS}) + $(info ODFLAGS : ${ODFLAGS}) + @echo "" + @echo "" + +clean: + rm -rf $(OUT_DIR) + +postbuild: $(EXECUTABLE) + $(SIZE) --format=berkeley $(EXECUTABLE) diff --git a/README b/README new file mode 100644 index 0000000..35a2d8b --- /dev/null +++ b/README @@ -0,0 +1,48 @@ +you have to specify three different variables for build +APP: Your application/project. +ARCH: Selected Architecture +CORE: Core Number + +example: make APP=myTestProject ARCH=psur5 CORE=0 all + +ARCH examples: + stm32f7: Cortex M7 on STM32F7 Disco Board + ps7: Cortex A9 on Zynq 7000 (ZC706 Board) + psua53: Cortex A53 on Zynq Ultrascale+ (ZCU102 Board) + psur5: Cortex R5 on Zynq Ultrascale+ (ZCU102 Board) + +Naming convention and Folder Structure has to be preserved to ensure Makefile is working + +The folder structure is as follows: + + +idaCom.git +|--- Debug/ +| |--- $(ARCH) /* Architecture dependent debug config templates */ +|--- Makefile +|--- README +|--- src/ +| |--- APP/ +| |  |--- $(APP)/ +| | |--- $(ARCH)/ +| |  |--- core$(CORE)/ +| | |--- build/ /*Build configuration used by makefile (sources.mk, includes.mk, config.mk) +| | | |--- sources.mk /* List of source files */ +| | | |--- includes.mk /* List of include paths */ +| | | |--- config.mk /* Compiler/Linker flags */ +| | |--- cfg/ +| | | |--- /* Typically used for various header files that are project specific */ +| | |--- linker/ +| | | |--- /* Various Linker files */ +| | |--- src/ +| | |--- /* Various source files */ +| |--- Modules/ /* This is a folder for external modules */ +| | |--- MMU/ /* Generic MMU Helper Module for Zynq 7000 and Ultrascale */ +| | |--- tlsf/ /* TLSF Malloc */ +| | |--- further git submodules +| |--- ucos_v1_42 /* ucos Sources by micrium */ +| |--- Xilinx /* Xilinx BSP for various projects */ +|--- out/ /* Generated compiler output, is removed during "make clean" */ + + + diff --git a/README.md b/README.md deleted file mode 100644 index e0d5e48..0000000 --- a/README.md +++ /dev/null @@ -1,3 +0,0 @@ -# sdes_student - -Lauterbach-Praktikum Studenten-Repo \ No newline at end of file diff --git a/RS2Uebung8.pdf b/RS2Uebung8.pdf new file mode 100644 index 0000000..4716e10 Binary files /dev/null and b/RS2Uebung8.pdf differ diff --git a/RS2_Kap5_17V2.pdf b/RS2_Kap5_17V2.pdf new file mode 100644 index 0000000..890a6a8 Binary files /dev/null and b/RS2_Kap5_17V2.pdf differ diff --git a/skript.pdf b/skript.pdf new file mode 100644 index 0000000..93c1eb0 Binary files /dev/null and b/skript.pdf differ diff --git a/src/APP/Aufgabe1/ps7/core0/build/config.mk b/src/APP/Aufgabe1/ps7/core0/build/config.mk new file mode 100644 index 0000000..abc8b89 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/build/config.mk @@ -0,0 +1,11 @@ +#µController dependent flags +MCFLAGS =-mcpu=cortex-a9 -march=armv7-a -mthumb -mthumb-interwork -mfloat-abi=softfp -mfpu=neon +#Optimization +OPTIMIZE=-O0 -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections + +#Debug Level +DEBUG =-g3 + +#Linker flags +LDFLAGS = -nostartfiles -Xlinker --gc-sections + diff --git a/src/APP/Aufgabe1/ps7/core0/build/includes.mk b/src/APP/Aufgabe1/ps7/core0/build/includes.mk new file mode 100644 index 0000000..b81f2c6 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/build/includes.mk @@ -0,0 +1,28 @@ + +INC += -I"$(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/cfg/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ipi" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common" + +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/" +INC += -I"$(SRC_DIR)/Modules/MMU" + diff --git a/src/APP/Aufgabe1/ps7/core0/build/sources.mk b/src/APP/Aufgabe1/ps7/core0/build/sources.mk new file mode 100644 index 0000000..f02c7d8 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/build/sources.mk @@ -0,0 +1,38 @@ +#Startup file +SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/asm_vectors.S +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/subdir.mk +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/subdir.mk + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_osii/bsp/$(ARCH)/ucos_osii_bsp.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_common/src/$(ARCH)/cpu_bsp.c + +SRC += $(SRC_DIR)/Modules/MMU/mmu.c + +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/main.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/app_hooks.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/uartps_cfg.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/GNU/cpu_cache_armv7_generic_l1_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/cpu_cache_armv7_generic_l1.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/cpu_core.c + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.c + +-include $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-II/kal.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Collections/slist.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Auth/auth.c + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/subdir.mk diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/app_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/app_cfg.h new file mode 100644 index 0000000..43981cd --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/app_cfg.h @@ -0,0 +1,81 @@ +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* This BSP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* Filename : app_cfg.h +* Version : V1.42 +* Programmer(s) : JBL +********************************************************************************************************* +*/ + +#ifndef UCOS_APP_CFG_PRESENT +#define UCOS_APP_CFG_PRESENT + +#include + +#include + +#define APP_CPU_ENABLED DEF_ENABLED + +#define APP_LIB_ENABLED DEF_ENABLED + +#define APP_COMMON_ENABLED DEF_ENABLED + +#define APP_SHELL_ENABLED DEF_DISABLED + +#define APP_CLK_ENABLED DEF_DISABLED + +#define APP_OSIII_ENABLED DEF_DISABLED + +#define APP_OSII_ENABLED DEF_ENABLED + +#define APP_TCPIP_ENABLED DEF_DISABLED + +#define APP_TCPIP_EXP_ENABLED DEF_DISABLED + +#define APP_DHCPC_ENABLED DEF_DISABLED + +#define APP_DNSC_ENABLED DEF_DISABLED + +#define APP_HTTPC_ENABLED DEF_DISABLED + +#define APP_MQTTC_ENABLED DEF_DISABLED + +#define APP_TELNETS_ENABLED DEF_DISABLED + +#define APP_IPERF_ENABLED DEF_DISABLED + +#define APP_FS_ENABLED DEF_DISABLED + +#define APP_USBD_ENABLED DEF_DISABLED + +#define APP_USBH_ENABLED DEF_DISABLED + +#define APP_OPENAMP_ENABLED DEF_DISABLED + +#define OS_TASK_TMR_PRIO 3 + +#endif /* #ifndef UCOS_APP_CFG_PRESENT */ + diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/can_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/can_cfg.h new file mode 100644 index 0000000..e2d25db --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/can_cfg.h @@ -0,0 +1,202 @@ +/* +********************************************************************************************************* +* uC/CAN +* The Embedded CAN suite +* +* (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CAN is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* uC/CAN CONFIGURATION +* +* ZYNQ ZC7000 Series +* CAN DRIVER +* Filename : can_cfg.h +* Version : V2.41.00 +* Programmer(s) : E0 +* DC +********************************************************************************************************* +*/ + +#ifndef _CAN_CFG_H_ +#define _CAN_CFG_H_ + +#include "lib_def.h" + + +/* +********************************************************************************************************* +* COMMON DEFINES & ENUMERATIONS +********************************************************************************************************* +*/ + + /* Definiton for CANSIG_GRANULARITY, Options: */ +#define CAN_CFG_BIT 0u /* BIT */ +#define CAN_CFG_BYTE 1u /* BYTE */ + +#ifndef CAN_FALSE +#define CAN_FALSE 0u +#endif + +#ifndef CAN_TRUE +#define CAN_TRUE 1u +#endif + +#ifndef NULL_PTR +#define NULL_PTR (void *)0 +#endif + + /* ------------ APPLICATION ENUMERATIONS -------------- */ +enum { + S_NODESTATUS = 0, + S_CPULOAD, + S_COUNTER, + S_MAX, +}; + +enum { + M_STATUS = 0, + M_COMMAND, + M_MAX +}; + + +/* +********************************************************************************************************* +* MULTIPLE CAN CONTROLLERS +********************************************************************************************************* +*/ + +#define CAN_MODULE_CHANNEL_0 DEF_ENABLED +#define CAN_MODULE_CHANNEL_1 DEF_DISABLED + + +/* +********************************************************************************************************* +* DRIVER SPECIFIC DEFINES +********************************************************************************************************* +*/ + /* ---------------- BAUDRATE SETTINGS ----------------- */ +#define CAN_DEFAULT_BAUDRATE 1000000u /* Default Baudrate */ +#define CAN_DEFAULT_SP 750u /* Default Bit Sample Point in 1/10 % */ +#define CAN_DEFAULT_RJW 125u /* Default Re-Synch Jump Width in 1/10 % */ + + /* ---------------- TIMEOUT SETTINGS ------------------ */ +#define CAN_TIMEOUT_ERR_VAL 100000uL /* Timeout Value for While Loop Error Checks */ + + +/* ================================== ADVANCED DRIVER CONFIGURATION: DEFAULT VALUES ================================== */ +/* By Default, the following Driver specific settings for the ZYNQ ZC7xxx Driver are set to their default values */ +/* unless they are modified by customer needs. */ +/* */ +/* By Default, the Watermark level is configured to Maximum Watermark Value in the Driver, based on the reset value */ +/* presented by the Reference Manual. Redefine the following define to modify the Watermark Level for the following. */ +/* Tx FIFO Empty & Rx FIFO Full Watermark Level(s): */ +/* NOTE : The VALID range is between 1 & 63. */ +/* */ +/* #define CAN_WATERMARK_Rx_Tx_SIZE 63u */ +/* */ +/* By Default, the Operating Mode of the CAN controller is configured to "NORMAL" Mode. For diagnostic checking, */ +/* additional operating modes have been included in the driver. Redefine the following define to modify the Operating */ +/* Mode to either "LOOP BACK" or "SNOOP" Mode(s). */ +/* NOTE that only one operating mode can be selected at once at Initialization. Once CAN has been Initialized it */ +/* is possible to change between Operating Modes at run-time using the xxx_CAN_IoCtl() API Function call. */ +/* */ +/* #define CAN_DIAGNOSTIC_OFF 0u */ +/* #define CAN_DIAGNOSTIC_LOOPBACK 1u */ +/* #define CAN_DIAGNOSTIC_SNOOP 2u */ +/* */ +/* #define CAN_DIAGNOSTIC_SELECT CAN_DIAGNOSTIC_LOOPBACK */ +/* */ +/* ==================================================================================================================== */ + + +/* +********************************************************************************************************* +* CAN BUS +********************************************************************************************************* +*/ + +#define CANBUS_EN 1u /* Enable CAN Bus Management */ +#define CANBUS_N 3u /* Number of busses */ +#define CANBUS_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANBUS_TX_HANDLER_EN 1u /* Enable usage of CanBusTxHandler */ +#define CANBUS_RX_HANDLER_EN 1u /* Enable usage of CanBusRxHandler */ +#define CANBUS_NS_HANDLER_EN 1u /* Enable usage of CanBusNsHandler */ + +#define CANBUS_STAT_EN 1u /* Enable Bus Statistics */ +#define CANBUS_TX_QSIZE (2u * CANBUS_N) /* Transmit Queue Size in CAN Frames for each CAN Bus */ +#define CANBUS_RX_QSIZE (2u * CANBUS_N) /* Receive Queue Size in CAN Frames for each CAN Bus */ + +#define CANBUS_HOOK_NS_EN 1u /* Enable Node Status Handler Hook Function */ +#define CANBUS_HOOK_RX_EN 1u /* Enable Rx Handler Hook Function */ +#define CANBUS_RX_READ_ALWAYS_EN 1u /* If enabled the Rx Handler executes a read even.. */ + /* .. when frames can't be allocated */ + + +/* +********************************************************************************************************* +* CAN MESSAGE +********************************************************************************************************* +*/ + +#define CANMSG_EN 1u /* Enable CAN Message Support */ +#define CANMSG_N 2u /* Number of messages */ +#define CANMSG_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN SIGNAL +********************************************************************************************************* +*/ + +#define CANSIG_EN 1u /* Enable CAN Signal Database */ +#define CANSIG_N 3u /* Number of signals */ +#define CANSIG_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANSIG_MAX_WIDTH 4u /* Maximal signal width in byte */ +#define CANSIG_GRANULARITY CAN_CFG_BYTE /* Set signal resolution to byte */ +#define CANSIG_STATIC_CONFIG 1u /* To reduce memory usage, declare static signal table */ +#define CANSIG_USE_DELETE 0u /* To reduce memory usage don't use delete functions */ +#define CANSIG_CALLBACK_EN 0u /* Enable callback functions */ + + +/* +********************************************************************************************************* +* CAN FRAME +********************************************************************************************************* +*/ + +#define CANFRM_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN OS +********************************************************************************************************* +*/ + +#define CANOS_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CONFIGURATION END +********************************************************************************************************* +*/ + +#endif /* #ifndef _CAN_CFG_H_ */ diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/cpu_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/cpu_cfg.h new file mode 100644 index 0000000..b7b42d2 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/cpu_cfg.h @@ -0,0 +1,216 @@ +/* +********************************************************************************************************* +* uC/CPU +* CPU CONFIGURATION & PORT LAYER +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CPU is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CPU CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : cpu_cfg.h +* Version : V1.30.02 +* Programmer(s) : SR +* ITJ +* JBL +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef CPU_CFG_MODULE_PRESENT +#define CPU_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +* CPU NAME CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_NAME_EN to enable/disable CPU host name feature : +* +* (a) CPU host name storage +* (b) CPU host name API functions +* +* (2) Configure CPU_CFG_NAME_SIZE with the desired ASCII string size of the CPU host name, +* including the terminating NULL character. +* +* See also 'cpu_core.h GLOBAL VARIABLES Note #1'. +********************************************************************************************************* +*/ + + /* Configure CPU host name feature (see Note #1) : */ +#define CPU_CFG_NAME_EN DEF_DISABLED + /* DEF_DISABLED CPU host name DISABLED */ + /* DEF_ENABLED CPU host name ENABLED */ + + /* Configure CPU host name ASCII string size ... */ +#define CPU_CFG_NAME_SIZE 16 + + +/* +********************************************************************************************************* +* CPU TIMESTAMP CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_TS_xx_EN to enable/disable CPU timestamp features : +* +* (a) CPU_CFG_TS_32_EN enable/disable 32-bit CPU timestamp feature +* (b) CPU_CFG_TS_64_EN enable/disable 64-bit CPU timestamp feature +* +* (2) (a) Configure CPU_CFG_TS_TMR_SIZE with the CPU timestamp timer's word size : +* +* CPU_WORD_SIZE_08 8-bit word size +* CPU_WORD_SIZE_16 16-bit word size +* CPU_WORD_SIZE_32 32-bit word size +* CPU_WORD_SIZE_64 64-bit word size +* +* (b) If the size of the CPU timestamp timer is not a binary multiple of 8-bit octets +* (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple octet word +* size SHOULD be configured (e.g. to 16-bits). However, the minimum supported word +* size for CPU timestamp timers is 8-bits. +* +* See also 'cpu_core.h FUNCTION PROTOTYPES CPU_TS_TmrRd() Note #2a'. +********************************************************************************************************* +*/ + + /* Configure CPU timestamp features (see Note #1) : */ +#define CPU_CFG_TS_32_EN DEF_ENABLED +#define CPU_CFG_TS_64_EN DEF_ENABLED + /* DEF_DISABLED CPU timestamps DISABLED */ + /* DEF_ENABLED CPU timestamps ENABLED */ + + /* Configure CPU timestamp timer word size ... */ + /* ... (see Note #2) : */ +#define CPU_CFG_TS_TMR_SIZE CPU_WORD_SIZE_64 + + +/* +********************************************************************************************************* +* CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_INT_DIS_MEAS_EN to enable/disable measuring CPU's interrupts +* disabled time : +* +* (a) Enabled, if CPU_CFG_INT_DIS_MEAS_EN #define'd in 'cpu_cfg.h' +* +* (b) Disabled, if CPU_CFG_INT_DIS_MEAS_EN NOT #define'd in 'cpu_cfg.h' +* +* See also 'cpu_core.h FUNCTION PROTOTYPES Note #1'. +* +* (b) Configure CPU_CFG_INT_DIS_MEAS_OVRHD_NBR with the number of times to measure & +* average the interrupts disabled time measurements overhead. +* +* See also 'cpu_core.c CPU_IntDisMeasInit() Note #3a'. +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU interrupts disabled time ... */ +#define CPU_CFG_INT_DIS_MEAS_EN /* ... measurements feature (see Note #1a). */ +#endif + + /* Configure number of interrupts disabled overhead ... */ +#define CPU_CFG_INT_DIS_MEAS_OVRHD_NBR 1u /* ... time measurements (see Note #1b). */ + + +/* +********************************************************************************************************* +* CPU COUNT ZEROS CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT to define count leading zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +* +* (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU count leading zeros bits ... */ +#define CPU_CFG_LEAD_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1a). */ +#endif + +#if 0 /* Configure CPU count trailing zeros bits ... */ +#define CPU_CFG_TRAIL_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1b). */ +#endif + + +/* +********************************************************************************************************* +* CPU ENDIAN TYPE OVERRIDE +* +* Note(s) : (1) Configure CPU_CFG_ENDIAN_TYPE to override the default CPU endian type defined in cpu.h. +* +* (a) CPU_ENDIAN_TYPE_BIG Big- endian word order (CPU words' most significant +* octet @ lowest memory address) +* (b) CPU_ENDIAN_TYPE_LITTLE Little-endian word order (CPU words' least significant +* octet @ lowest memory address) +* +* (2) Defining CPU_CFG_ENDIAN_TYPE here is only valid for supported bi-endian architectures. +* See 'cpu.h CPU WORD CONFIGURATION Note #3' for details +********************************************************************************************************* +*/ + +#if 0 +#define CPU_CFG_ENDIAN_TYPE CPU_ENDIAN_TYPE_BIG /* Defines CPU data word-memory order (see Note #2). */ +#endif + + +/* +********************************************************************************************************* +* CACHE MANAGEMENT +* +* Note(s) : (1) Configure CPU_CFG_CACHE_MGMT_EN to enable the cache managment API. + +* +* (2) Defining CPU_CFG_CACHE_MGMT_EN to DEF_ENABLED only enable the cache management function. +* Cache are assumed to be configured and enabled by the time CPU_init() is called. +********************************************************************************************************* +*/ + +#define CPU_CFG_CACHE_MGMT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of CPU cfg module include. */ + +#define CPU_CACHE_CFG_L2C310_BASE_ADDR 0xF8F02000 diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/dhcp-c_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/dhcp-c_cfg.h new file mode 100644 index 0000000..911724f --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/dhcp-c_cfg.h @@ -0,0 +1,146 @@ +/* +********************************************************************************************************* +* uC/DHCPc +* Dynamic Host Configuration Protocol Client +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DHCP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DHCP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dhcp-c_cfg.h +* Version : V2.10.00 +* Programmer(s) : SR +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* TASKS PRIORITIES +* Notes: (1) Task priorities configuration values should be used by the DHCPc OS port. The following task priorities +* should be defined: +* +* DHCPc_OS_CFG_TASK_PRIO +* DHCPc_OS_CFG_TMR_TASK_PRIO +* +* Task priorities can be defined either in this configuration file 'dhcp-c_cfg.h' or in a global +* OS tasks priorities configuration header file which must be included in 'dhcp-c_cfg.h'. +********************************************************************************************************* +*/ + + /* See Note #1. */ +#define DHCPc_OS_CFG_TASK_PRIO 13 +#define DHCPc_OS_CFG_TMR_TASK_PRIO 14 + + +/* +********************************************************************************************************* +* STACK SIZES +* Size (depth) of the task stacks (See the definition of CPU_STK for stack width) +********************************************************************************************************* +*/ + +#define DHCPc_OS_CFG_TASK_STK_SIZE 512 +#define DHCPc_OS_CFG_TMR_TASK_STK_SIZE 256 + + +/* +********************************************************************************************************* +* DHCPc +* +* Note(s) : (1) Default port for DHCP server is 67, and default port for DHCP client is 68. +* +* (3) Configure DHCPc_CFG_MAX_NBR_IF to the maximum number of interface this DHCP client will +* be able to manage at a given time. +* +* (4) Once the DHCP server has assigned the client an address, the later may perform a final +* check prior to use this address in order to make sure it is not being used by another +* host on the network. +********************************************************************************************************* +*/ + +#define DHCPc_CFG_IP_PORT_SERVER 67 +#define DHCPc_CFG_IP_PORT_CLIENT 68 + +#define DHCPc_CFG_MAX_RX_TIMEOUT_MS 1000 + +#define DHCPc_CFG_PARAM_REQ_TBL_SIZE 5 + +#define DHCPc_CFG_MAX_NBR_IF 1 + +#define DHCPc_CFG_ADDR_VALIDATE_EN DEF_ENABLED + /* ... (see Note #4) : */ + /* DEF_DISABLED Validation NOT performed */ + /* DEF_ENABLED Validation performed */ + +#define DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN DEF_ENABLED + /* DEF_DISABLED local-link configuration DISABLED */ + /* DEF_ENABLED local-link configuration ENABLED */ + +#define DHCPc_CFG_LOCAL_LINK_MAX_RETRY 3 + /* link-local address. */ + + +/* +********************************************************************************************************* +* DHCPc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DHCPc_CFG_ARG_CHK_EXT_EN to enable/disable the DHCP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure DHCPc_CFG_ARG_CHK_DBG_EN to enable/disable the DHCP client internal debug +* argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the DHCP client. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the DHCP client. +* +* (3) Configure DHCPc_DBG_CFG_MEM_CLR_EN to enable/disable the DHCP client from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define DHCPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define DHCPc_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure memory clear feature (see Note #3) : */ +#define DHCPc_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/dns-c_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/dns-c_cfg.h new file mode 100644 index 0000000..2756762 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/dns-c_cfg.h @@ -0,0 +1,111 @@ +/* +********************************************************************************************************* +* uC/DNSc +* Domain Name Server (client) +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DNSc is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DNS CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dns-c_cfg.h +* Version : V2.00.01 +* Programmer(s) : AA +********************************************************************************************************* +*/ + +#ifndef DNSc_CFG_MODULE_PRESENT +#define DNSc_CFG_MODULE_PRESENT + +#include + + +/* +********************************************************************************************************* +* DNSc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_ARG_CHK_EXT_EN to enable/disable the DNS client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* See Note 1. */ +#define DNSc_CFG_ARG_CHK_EXT_EN DEF_DISABLED + /* DEF_DISABLED External argument check DISABLED */ + /* DEF_ENABLED External argument check ENABLED */ + +/* +********************************************************************************************************* +* DNSc FEATURES CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_MODE_ASYNC_EN to enable/disable the DNS client asynchronous communication mode: +* +* (a) When ENABLED, A dedicated task will handle all host resolution request. It will be possible to +* call DNS API to get remote host address without blocking. +* +* (b) When DISABLED, The API to get remote host will always block until the resolution is completed. +* +* (2) Configure DNSc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the asynchronous +* communication is enabled. +* +* (a) When ENABLED, It will be possible to block when calling the DNS API to get remote host until the +* resolution is completed (via a flag option). +* +* (b) When DISABLED, The API to get remote host will always be non-blocking, must poll DNS client to +* know when the resolution is completed. +********************************************************************************************************* +*/ + + /* Configure asynchronous mode feature, See Note #1 ... */ +#define DNSc_CFG_MODE_ASYNC_EN DEF_DISABLED + /* DEF_DISABLED Asynchronous mode DISABLED */ + /* DEF_ENABLED Asynchronous mode ENABLED */ + + + /* Configure blocking option feature, See Note #2 ... */ +#define DNSc_CFG_MODE_BLOCK_EN DEF_DISABLED + /* DEF_DISABLED Blocking option DISABLED */ + /* DEF_ENABLED Blocking option ENABLED */ + +/* +********************************************************************************************************* +* DNSc RUN-TIME STRUCTURE CONFIGURATION +* +* Note(s) : (1) These structures should be defined into a 'C' file. +********************************************************************************************************* +*/ + +extern const DNSc_CFG DNSc_Cfg; /* Must always be defined. */ + +#if (DNSc_CFG_MODE_ASYNC_EN == DEF_ENABLED) +extern const DNSc_CFG_TASK DNSc_CfgTask; /* Not required when Asynchronous mode is disabled. */ +#endif + +#endif diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/http-c_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/http-c_cfg.h new file mode 100644 index 0000000..26df728 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/http-c_cfg.h @@ -0,0 +1,224 @@ +/* +********************************************************************************************************* +* uC/HTTP +* Hypertext Transfer Protocol +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/HTTP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* HTTP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : http-c_cfg.h +* Version : V3.00.01 +* Programmer(s) : MM +* AL +********************************************************************************************************* +* Note(s) : (1) Assumes the following versions (or more recent) of software modules are included in +* the project build : +* +* (a) uC/CPU V1.29.02 +* (b) uC/LIB V1.38.00 +* (c) uC/Common V1.00.00 +* (d) uC/TCP-IP V3.03.00 +* +* +* (2) For additional details on the features available with uC/HTTPc, the API, the +* installation, etc. Please refer to the uC/HTTPc documentation available at +* https://doc.micrium.com/HTTPc. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef HTTPc_CFG_MODULE_PRESENT +#define HTTPc_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* COMPILE-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* HTTP ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_ARG_CHK_EXT_EN to enable/disable the HTTP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT TASK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_MODE_ASYNC_TASK_EN to enable/disable HTTP client task. +* (a) DEF_DISABLED : No HTTP client task will be created to process the HTTP requests. +* The Blocking HTTPc API will be enabled. +* +* (b) DEF_ENABLED : An HTTP client task will be created to process all the HTTP requests. +* The Non-Blocking HTTPc API will be enabled. Therefore, multiple +* connections can be handle by the task simultaneously. +* +* (2) Configure HTTPc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the +* asynchronous HTTPc Task is enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_MODE_ASYNC_TASK_EN DEF_DISABLED + +#define HTTPc_CFG_MODE_BLOCK_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT PERSISTENT CONNECTION CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_PERSISTENT_EN to enable/disable Persistent Connection support. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_PERSISTENT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT CHUNKED TRANSFER CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_CHUNK_TX_EN to enable/disable Chunked Transfer support in Transmission. +* +* (2) Chunked Transfer in Reception is always enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_CHUNK_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT QUERY STRING CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_QUERY_STR_EN to enable/disable Query String support in URL. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_QUERY_STR_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT HEADER FIELD CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_HDR_RX_EN to enable/disable header field processing in reception +* (i.e for headers received in the HTTP response. +* +* (2) Configure HTTPc_CFG_HDR_TX_EN to enable/disable header field processing in transmission +* (i.e for headers to include in the HTTP request. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_HDR_RX_EN DEF_ENABLED + + +#define HTTPc_CFG_HDR_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT FORM CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_FORM_EN to enable/disable HTTP form creation source code. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_FORM_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT USER DATA CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_USER_DATA_EN to enable/disable user data pointer in HTTPc_CONN +* and HTTPc_REQ structure. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_USER_DATA_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT WEBSOCKET CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_WEBSOCKET_EN to enable/disable the Websocket feature. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_WEBSOCKET_EN DEF_DISABLED + + +/* +********************************************************************************************************* +********************************************************************************************************* +* RUN-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const HTTP_TASK_CFG HTTPc_TaskCfg; +extern const HTTPc_CFG HTTPc_Cfg; + + +/* =============================================== END =============================================== */ +#endif /* HTTPc_CFG_MODULE_PRESENT */ diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/lib_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/lib_cfg.h new file mode 100644 index 0000000..cf447ea --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/lib_cfg.h @@ -0,0 +1,171 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find information about uC/LIB by visiting doc.micrium.com. +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CUSTOM LIBRARY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : lib_cfg.h +* Version : V1.38.01.00 +* Programmer(s) : FBJ +* JFD +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef LIB_CFG_MODULE_PRESENT +#define LIB_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MEMORY LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* MEMORY LIBRARY ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_ARG_CHK_EXT_EN to enable/disable the memory library suite external +* argument check feature : +* +* (a) When ENABLED, arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +********************************************************************************************************* +*/ + + /* External argument check. */ + /* Indicates if arguments received from any port ... */ + /* ... interface provided by the developer or ... */ + /* ... application are checked/validated. */ +#define LIB_MEM_CFG_ARG_CHK_EXT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY LIBRARY ASSEMBLY OPTIMIZATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_OPTIMIZE_ASM_EN to enable/disable assembly-optimized memory function(s). +********************************************************************************************************* +*/ + + /* Assembly-optimized function(s). */ + /* Enable/disable assembly-optimized memory ... */ + /* ... function(s). [see Note #1] */ +#define LIB_MEM_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY ALLOCATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_DBG_INFO_EN to enable/disable memory allocation usage tracking +* that associates a name with each segment or dynamic pool allocated. +* +* (2) (a) Configure LIB_MEM_CFG_HEAP_SIZE with the desired size of heap memory (in octets). +* +* (b) Configure LIB_MEM_CFG_HEAP_BASE_ADDR to specify a base address for heap memory : +* +* (1) Heap initialized to specified application memory, if LIB_MEM_CFG_HEAP_BASE_ADDR +* #define'd in 'lib_cfg.h'; +* CANNOT #define to address 0x0 +* +* (2) Heap declared to Mem_Heap[] in 'lib_mem.c', if LIB_MEM_CFG_HEAP_BASE_ADDR +* NOT #define'd in 'lib_cfg.h' +********************************************************************************************************* +*/ + + /* Allocation debugging information. */ + /* Enable/disable allocation of debug information ... */ + /* ... associated to each memory allocation. */ +#define LIB_MEM_CFG_DBG_INFO_EN DEF_DISABLED + + + /* Heap memory size (in bytes). */ + /* Configure the desired size of the heap memory. ... */ + /* ... Set to 0 to disable heap allocation features. */ +#define LIB_MEM_CFG_HEAP_SIZE 64*1024 + + + /* Heap memory padding alignment (in bytes). */ + /* Configure the desired size of padding alignment ... */ + /* ... of each buffer allocated from the heap. */ +#define LIB_MEM_CFG_HEAP_PADDING_ALIGN LIB_MEM_PADDING_ALIGN_NONE + +#if 0 /* Remove this to have heap alloc at specified addr. */ +#define LIB_MEM_CFG_HEAP_BASE_ADDR 0 +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* STRING LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* STRING FLOATING POINT CONFIGURATION +* +* Note(s) : (1) Configure LIB_STR_CFG_FP_EN to enable/disable floating point string function(s). +* +* (2) Configure LIB_STR_CFG_FP_MAX_NBR_DIG_SIG to configure the maximum number of significant +* digits to calculate &/or display for floating point string function(s). +* +* See also 'lib_str.h STRING FLOATING POINT DEFINES Note #1'. +********************************************************************************************************* +*/ + + /* Floating point feature(s). */ + /* Enable/disable floating point to string functions. */ +#define LIB_STR_CFG_FP_EN DEF_DISABLED + + + /* Floating point number of significant digits. */ + /* Configure the maximum number of significant ... */ + /* ... digits to calculate &/or display for ... */ + /* ... floating point string function(s). */ +#define LIB_STR_CFG_FP_MAX_NBR_DIG_SIG LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of lib cfg module include. */ + diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/mmu_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/mmu_cfg.h new file mode 100644 index 0000000..4dda478 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/mmu_cfg.h @@ -0,0 +1,42 @@ +/* + * mmu_cfg.h + * + * Created on: 25.04.2018 + * Author: kaige + */ + +#ifndef SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ +#define SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ + +#include "mmu.h" + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief FIRST LEVEL TRANSLATION TABLE (FTT) +* +* \ingroup PAR_CPU_MMU +* +* This variable represents the first level translation table. Each entry within +* the table represents the configuration of a 1MB memory segment. If a memory +* portion below 1MB must be accessed, the entry represents a pointer to the +* linked coarse page table, which contains the information of that 1MB in detail. +* +* \note This table MUST be aligned at 16kB boundary. +*/ +/*------------------------------------------------------------------------------------------------*/ + +const PAR_MEM_REGION_T PARMemTbl_Core[] = { +/* +-------------------------------------------------------------------------------------------+ +* | virtual | physical | size | owner | permissions | HID Field | +* +-----------+-----------+---------------+------------------+-----------------+--------------+*/ + // First 1MB is marked as non-cacheable/non-bufferable (contains 3x 64KB SRAM @ address 0x00000000 + { 0x00000000, 0x00000000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER_CB | PAR_HID_CACHE_OUTER_CB }, + // DDR Memory is marked as normal (only 512MB for now) + { 0x00100000, 0x00100000, MMU_SIZE_16MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER___ | PAR_HID_CACHE_OUTER___ }, + // Device section + { 0xE0000000, 0xE0000000, MMU_SIZE_512MB-MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_EXCLUSIVE_SYS_DEVICE }, + // Upper 1MB section contains 1x 64KB SRAM @ address 0xFFFF0000 + { 0xFFF00000, 0xFFF00000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_OUT_IN_NON_CACHABLE } +}; + +#endif /* SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ */ diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/net_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/net_cfg.h new file mode 100644 index 0000000..ee42e1f --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/net_cfg.h @@ -0,0 +1,676 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_cfg.h +* Version : V3.03.01 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_CFG_MODULE_PRESENT +#define NET_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK EXTERNAL APPLICATION CONFIGURATION +* +* Note(s) : (1) When uC/DNS-Client is present in the project some high level functions can resolve hostname. +* So uC/TCPIP should know that uC/DNS-Client is present to call the proper API. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure DNS Client feature (see Note #1) : */ +#define NET_EXT_MODULE_CFG_DNS_EN DEF_ENABLED + /* DEF_DISABLED DNS Client is DISABLED */ + /* DEF_ENABLED DNS Client is ENABLED */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS CONFIGURATION +* +* Note(s) : (1) (a) Each network task maps to a unique, developer-configured task configuration that +* MUST be defined in application files, typically 'net_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to Net_Init(). +* +* (b) Since these task configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const NET_TASK_CFG NetRxTaskCfg; +extern const NET_TASK_CFG NetTxDeallocTaskCfg; +extern const NET_TASK_CFG NetTmrTaskCfg; + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS Q CONFIGURATION +* +* Note(s) : (1) Rx queue size should be configured such that it reflects the total number of DMA receive descriptors on all +* devices. If DMA is not available, or a combination of DMA and I/O based interfaces are configured then this +* number reflects the maximum number of packets that can be acknowledged and signalled during a single receive +* interrupt event for all interfaces. +* +* (2) Tx queue size should be defined to be the total number of small and large transmit buffers declared for +* all interfaces. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_CFG_IF_RX_Q_SIZE 100 +#define NET_CFG_IF_TX_DEALLOC_Q_SIZE 100 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK CONFIGURATION +* +* Note(s) : (1) uC/TCP-IP code may call optimized assembly functions. Optimized assembly files/functions must be included +* in the project to be enabled. Optimized functions are located in files under folders: +* +* $uC-TCPIP/Ports// +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network protocol suite's assembly ... */ + /* ... optimization (see Note #1) : */ +#define NET_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + /* DEF_DISABLED Assembly optimization DISABLED */ + /* DEF_ENABLED Assembly optimization ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEBUG CONFIGURATION +* +* Note(s) : (1) Configure NET_DBG_CFG_MEM_CLR_EN to enable/disable the network protocol suite from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure memory clear feature (see Note #1) : */ +#define NET_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure NET_ERR_CFG_ARG_CHK_EXT_EN to enable/disable the network protocol suite external +* argument check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure NET_ERR_CFG_ARG_CHK_DBG_EN to enable/disable the network protocol suite internal, +* debug argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the network protocol +* suite. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the network protocol +* suite. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define NET_ERR_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define NET_ERR_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK COUNTER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_CTR_CFG_STAT_EN to enable/disable network protocol suite statistics counters. +* +* (2) Configure NET_CTR_CFG_ERR_EN to enable/disable network protocol suite error counters. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure statistics counter feature (see Note #1) : */ +#define NET_CTR_CFG_STAT_EN DEF_DISABLED + /* DEF_DISABLED Stat counters DISABLED */ + /* DEF_ENABLED Stat counters ENABLED */ + + /* Configure error counter feature (see Note #2) : */ +#define NET_CTR_CFG_ERR_EN DEF_DISABLED + /* DEF_DISABLED Error counters DISABLED */ + /* DEF_ENABLED Error counters ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK TIMER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_TMR_CFG_NBR_TMR with the desired number of network TIMER objects. +* +* Timers are required for : +* +* (a) ARP & NDP cache entries +* (b) IP fragment reassembly +* (c) TCP state machine connections +* (d) IF Link status check-up +* +* (2) Configure NET_TMR_CFG_TASK_FREQ to schedule the execution frequency of the network timer +* task -- how often NetTmr_TaskHandler() is scheduled to run per second as implemented in +* NetTmr_Task(). +* +* (a) NET_TMR_CFG_TASK_FREQ MUST NOT be configured as a floating-point frequency. +* +* See also 'net_tmr.h NETWORK TIMER TASK TIME DEFINES Notes #1 & #2' +* & 'net_tmr.c NetTmr_Task() Notes #1 & #2'. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_TMR_CFG_NBR_TMR 100 +#define NET_TMR_CFG_TASK_FREQ 10 + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK INTERFACE LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_IF_CFG_MAX_NBR_IF 1 + + /* Configure specific interface(s) : */ +#define NET_IF_CFG_LOOPBACK_EN DEF_DISABLED + +#define NET_IF_CFG_ETHER_EN DEF_ENABLED + +#define NET_IF_CFG_WIFI_EN DEF_DISABLED + /* DEF_DISABLED Interface type DISABLED */ + /* DEF_ENABLED interface type ENABLED */ + +#define NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* ADDRESS RESOLUTION PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Address resolution protocol ONLY required for IPv4. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_ARP_CFG_CACHE_NBR 3 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NEIGHBOR DISCOVERY PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Neighbor Discovery Protocol ONLY required for IPv6. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_NDP_CFG_CACHE_NBR 5 +#define NET_NDP_CFG_DEST_NBR 5 +#define NET_NDP_CFG_PREFIX_NBR 5 +#define NET_NDP_CFG_ROUTER_NBR 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET PROTOCOL LAYER VERSION CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* IPv4 +********************************************************************************************************* +*/ + /* Configure IPv4. */ +#define NET_IPv4_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv4 disabled. */ + /* DEF_ENABLED IPv4 enabled. */ + + +#define NET_IPv4_CFG_IF_MAX_NBR_ADDR 1 + +/* +********************************************************************************************************* +* IPv6 +********************************************************************************************************* +*/ + + /* Configure IPv6. */ +#define NET_IPv6_CFG_EN DEF_DISABLED + /* DEF_DISABLED IPv6 disabled. */ + /* DEF_ENABLED IPv6 enabled. */ + + /* Configure IPv6 Stateless Address Auto-Configuration. */ +#define NET_IPv6_CFG_ADDR_AUTO_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv6 Auto-Cfg disabled. */ + /* DEF_ENABLED IPv6 Auto-Cfg enabled. */ + + /* Configure IPv6 Duplication Address Detection (DAD). */ +#define NET_IPv6_CFG_DAD_EN DEF_ENABLED + /* DEF_DISABLED IPv6 DAD disabled. */ + /* DEF_ENABLED IPv6 DAD enabled. */ + +#define NET_IPv6_CFG_IF_MAX_NBR_ADDR 2 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET GROUP MANAGEMENT PROTOCOL(MULTICAST) LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure IPv4 multicast support : */ +#define NET_MCAST_CFG_IPv4_RX_EN DEF_ENABLED +#define NET_MCAST_CFG_IPv4_TX_EN DEF_ENABLED + /* DEF_DISABLED Multicast rx or tx disabled. */ + /* DEF_ENABLED Multicast rx or tx enabled. */ + +#define NET_MCAST_CFG_HOST_GRP_NBR_MAX 2 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SOCKET LAYER CONFIGURATION +* +* Note(s) : (1) The maximum accept queue size represents the number of connection that can be queued by +* the stack before being accepted. For a TCP server when a connection is queued, it means +* that the SYN, ACK packet has been sent back, so the remote host can start transmitting +* data once the connection is queued and the stack will queue up all data received until +* the connection is accepted and the data is read. +* +* (2) Receive and transmit queue size MUST be properly configured to optimize performance. +* +* (a) It represents the number of bytes that can be queued by one socket. It's important +* that all socket are not able to queue more data than what the device can hold in its +* buffers. +* +* (b) The size should be also a multiple of the maximum segment size (MSS) to optimize +* performance. UDP MSS is 1470 and TCP MSS is 1460. +* +* (c) RX and TX queue size can be reduce at runtime using socket option API. +* +* (d) Window calculation example: +* +* Number of TCP connection : 2 +* Number of UDP connection : 0 +* Number of RX large buffer : 10 +* Number of TX Large buffer : 6 +* Number of TX small buffer : 2 +* Size of RX large buffer : 1518 +* Size of TX large buffer : 1518 +* Size of TX small buffer : 60 +* +* TCP MSS RX = 1460 +* TCP MSS TX large buffer = 1460 +* TCP MSS TX small buffer = 0 +* +* Maximum receive window = (10 * 1460) = 14600 bytes +* Maximum transmit window = (6 * 1460) + (2 * 0) = 8760 bytes +* +* RX window size per socket = (14600 / 2) = 7300 bytes +* TX window size per socket = (8760 / 2) = 4380 bytes +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_SOCK_CFG_SOCK_NBR_TCP 2 +#define NET_SOCK_CFG_SOCK_NBR_UDP 1 + + /* Configure socket select functionality : */ +#define NET_SOCK_CFG_SEL_EN DEF_ENABLED + /* DEF_DISABLED Socket select DISABLED */ + /* DEF_ENABLED Socket select ENABLED */ + + /* Configure stream-type sockets' accept queue */ +#define NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX 2 + + + /* Configure sockets' buffer sizes in number of octets */ + /* (see Note #2): */ +#define NET_SOCK_CFG_RX_Q_SIZE_OCTET 4096 +#define NET_SOCK_CFG_TX_Q_SIZE_OCTET 4096 + + +/* ================================== ADVANCED SOCKET CONFIGURATION: DEFAULT VALUES ================================== */ +/* By default sockets are set to block. Add the following define to set all sockets as non-blocking. Note that it's */ +/* possible to change socket's blocking mode at runtime using socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_NO_BLOCK_EN DEF_ENABLED */ +/* */ +/* By default random port start at 65000, redefine the following define to modify where random port start: */ +/* */ +/* #define NET_SOCK_DFLT_PORT_NBR_RANDOM_BASE 65000u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeouts. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_TIMEOUT_RX_Q_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS 10000u */ +/* ==================================================================================================================== */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TRANSMISSION CONTROL PROTOCOL LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure TCP support : */ +#define NET_TCP_CFG_EN DEF_ENABLED + /* DEF_DISABLED TCP layer DISABLED */ + /* DEF_ENABLED TCP layer ENABLED */ + +/* ========================================= ADVANCED TCP LAYER CONFIGURATION ========================================= */ +/* By default TCP RX and TX windows are set to equal the socket RX and TX queue sizes. Default values can be changed by */ +/* redefining the following defines. TCP windows must be properly configured to optimize performance (see note about */ +/* Socket TX and RX windows). Note that it's possible to decrease window size at run time using Socket option API. */ +/* */ +/* #define NET_TCP_DFLT_RX_WIN_SIZE_OCTET NET_SOCK_CFG_RX_Q_SIZE_OCTET */ +/* #define NET_TCP_DFLT_TX_WIN_SIZE_OCTET NET_SOCK_CFG_TX_Q_SIZE_OCTET */ +/* */ +/* As shown in the TCP state diagram (see RFC #793), before moving from 'TIME-WAIT' state to 'CLOSED' state a timeout */ +/* (2MSL) must expire. This means that the TCP connection cannot be made available for subsequent TCP connections until */ +/* this timeout. It can be a problem for embedded systems with low resources especially when many TCP connections are */ +/* made in a small period of time since it is possible to run out of free TCP connections quickly. Therefore this */ +/* timeout is set to 0 by default to avoid this kind of problem and the connection is made available as soon as the */ +/* 'TIME-WAIT' state is reached. However, it's possible to set the default MSL timeout to something else by redefining */ +/* the following define. Note that it is possible to change the MSL timeout for a specific TCP connection using Socket */ +/* option API. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC 0u */ +/* */ +/* To avoid leaving a connection in the FIN_WAIT_2 state forever when a connection moves from the 'FIN_WAIT_1' state to */ +/* the FIN_WAIT_2, the TCP connection's timer is set to 15 second, and when it expires the connection is dropped. Thus, */ +/* if the other host doesn't response to the close request, the connection will still be closed after the timeout. */ +/* This default timeout can be change by redefining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC 15u */ +/* */ +/* The number of TCP connections is configured following the number of TCP sockets and the accept queue size when the */ +/* MSL is set to 0 ms. However, since the default MSL can be modified, it might be needed to increase the number of TCP */ +/* connections to establish more connections when waiting for the MSL expiration. It is possible to add more TCP */ +/* connections by defining the following define. */ +/* */ +/* #define NET_TCP_CFG_NBR_CONN 0u */ +/* */ +/* By default an 'ACK' is generated within 500 ms of the arrival of the first unacknowledged packet, as specified in */ +/* RFC #2581, Section 4.2. However it's possible to modify this value by defining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS 500u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeout. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS 1000u */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS 1000u */ +/* ==================================================================================================================== */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* USER DATAGRAM PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Configure NET_UDP_CFG_APP_API_SEL with the desired configuration for demultiplexing +* UDP datagrams to application connections : +* +* NET_UDP_APP_API_SEL_SOCK Demultiplex UDP datagrams to BSD sockets ONLY. +* NET_UDP_APP_API_SEL_APP Demultiplex UDP datagrams to application-specific +* connections ONLY. +* NET_UDP_APP_API_SEL_SOCK_APP Demultiplex UDP datagrams to BSD sockets first; +* if NO socket connection found to demultiplex +* a UDP datagram, demultiplex to application- +* specific connection. +* +* See also 'net_udp.c NetUDP_RxPktDemuxDatagram() Note #1' +* & 'net_udp.c NetUDP_RxPktDemuxAppData() Note #1'. +* +* (2) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally ... discard +* ... [or allow] ... received ... UDP datagrams without checksums". +* +* (b) Configure NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN to enable/disable discarding of UDP +* datagrams received with NO computed check-sum : +* +* (1) When ENABLED, ALL UDP datagrams received without a check-sum are discarded. +* +* (2) When DISABLED, ALL UDP datagrams received without a check-sum are flagged so +* that application(s) may handle &/or discard. +* +* See also 'net_udp.c NetUDP_RxPktValidate() Note #4d3A'. +* +* (3) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally be able to +* control whether a UDP checksum will be generated". +* +* (b) Configure NET_UDP_CFG_TX_CHK_SUM_EN to enable/disable transmitting UDP datagrams +* with check-sums : +* +* (1) When ENABLED, ALL UDP datagrams are transmitted with a computed check-sum. +* +* (2) When DISABLED, ALL UDP datagrams are transmitted without a computed check-sum. +* +* See also 'net_udp.c NetUDP_TxPktPrepareHdr() Note #3b'. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure UDP Receive Check-Sum Discard feature ... */ + /* ... (see Note #2b) : */ +#define NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN DEF_DISABLED + /* DEF_DISABLED UDP Check-Sums Received without ... */ + /* Check-Sums Validated */ + /* DEF_ENABLED UDP Datagrams Received without ... */ + /* Check-Sums Discarded */ + + /* Configure UDP Transmit Check-Sum feature ... */ + /* ... (see Note #3b) : */ +#define NET_UDP_CFG_TX_CHK_SUM_EN DEF_DISABLED + /* DEF_DISABLED Transmit Check-Sums DISABLED */ + /* DEF_ENABLED Transmit Check-Sums ENABLED */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SECURITY MANAGER CONFIGURATION +* +* Note(s): (1) The network security layer can be enabled ONLY if the application project contains a secure module +* supported by uC/TCPIP such as: +* +* (a) NanoSSL provided by Mocana. +* (b) CyaSSL provided by YaSSL. +* +* (2) The network security port must be also added to the project. Security port can be found under the folder: +* +* $uC-TCPIP/Secure/ +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network security layer (See Note #1 & #2): */ +#define NET_SECURE_CFG_EN DEF_DISABLED + /* DEF_DISABLED Security layer DISABLED */ + /* DEF_ENABLED Security layer ENABLED */ + +#define NET_SECURE_CFG_MAX_NBR_SOCK_SERVER 2u /* Configure total number of server secure sockets. */ +#define NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT 2u /* Configure total number of client secure sockets. */ + +#define NET_SECURE_CFG_MAX_CERT_LEN 1500u /* Configure servers certificate maximum length (bytes) */ +#define NET_SECURE_CFG_MAX_KEY_LEN 1500u /* Configure servers key maximum length (bytes) */ + + /* Configure maximum number of certificate authorities */ +#define NET_SECURE_CFG_MAX_NBR_CA 1u /* that can be installed. */ + +#define NET_SECURE_CFG_MAX_CA_CERT_LEN 1500u /* Configure CA certificate maximum length (bytes) */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERFACE CHECKSUM OFFLOAD CONFIGURATION +* +* Note(s): (1) These configuration can be enabled only if all your interfaces support specific checksum offload +* option. +* +* (2) By default a driver should enabled the all checksum offload option. +********************************************************************************************************* +********************************************************************************************************* +*/ +/* ========================================== ADVANCED OFFLOAD CONFIGURATION ========================================== */ +/* By default all checksum are validated by the stack however it is possible to enable or disable specific checksum */ +/* validate and calculation if the interface controller is able to achieve it. You can add the following define in this */ +/* file to change the default behavior. */ +/* */ +/* -------------------------------------------------- IPv4 CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* -------------------------------------------------- ICMP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- UDP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- TCP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* ==================================================================================================================== */ + + +/* ======================================================= END ======================================================== */ +#endif /* NET_CFG_MODULE_PRESENT */ + +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h new file mode 100644 index 0000000..cb76d08 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h @@ -0,0 +1,115 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK DEVICE CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_dev_cfg.h +* Version : V3.00.00 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +* +* Note(s) : (1) This network device configuration header file is protected from multiple pre-processor +* inclusion through use of the network module present pre-processor macro definition. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_DEV_CFG_MODULE_PRESENT /* See Note #1. */ +#define NET_DEV_CFG_MODULE_PRESENT + +#include + +#ifdef NET_IF_ETHER_MODULE_EN +#include +#endif + +#ifdef NET_IF_WIFI_MODULE_EN +#include +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEVICE CONFIGURATION +* +* Note(s) : (1) (a) Each network device maps to a unique, developer-configured device configuration that +* MUST be defined in application files, typically 'net_dev_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to NetIF_Add(). +* +* (b) Since these device configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. However, +* the following naming convention is suggested for all developer-configured network +* device configuration structures : +* +* NetDev_Cfg_[_Number] +* +* where +* Name of device or device driver +* [Number] Network device number for each specific instance of +* device (optional if the development board does NOT +* support multiple instances of the specific device) +* +* Examples : +* +* NET_DEV_CFG_ETHER NetDev_Cfg_MACB; Ethernet configuration for MACB +* +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_0; Ethernet configuration for FEC #0 +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_1; Ethernet configuration for FEC #1 +* +* NET_DEV_CFG_WIFI NetDev_Cfg_RS9110N21_0; Wireless configuration for RS9110-N-21 +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifdef NET_IF_ETHER_MODULE_EN + +extern NET_DEV_CFG_ETHER NetDev_AXIEthernetLite_0; +extern NET_PHY_CFG_ETHER NetPhy_Cfg_Ether_0; + +#endif /* NET_IF_ETHER_MODULE_EN */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +********************************************************************************************************* +*/ + +#endif /* NET_DEV_CFG_MODULE_PRESENT */ + diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/os_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/os_cfg.h new file mode 100644 index 0000000..a25fa55 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/os_cfg.h @@ -0,0 +1,145 @@ +/* +********************************************************************************************************* +* uC/OS-II +* The Real-Time Kernel +* uC/OS-II Configuration File for V2.9x +* +* (c) Copyright 2005-2014, Micrium, Weston, FL +* All Rights Reserved +* +* +* File : OS_CFG.H +* By : Jean J. Labrosse +* Version : V2.92.11 +* +* LICENSING TERMS: +* --------------- +* uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research. +* If you plan on using uC/OS-II in a commercial product you need to contact Micrium to properly license +* its use in your product. We provide ALL the source code for your convenience and to help you experience +* uC/OS-II. The fact that the source is provided does NOT mean that you can use it without paying a +* licensing fee. +********************************************************************************************************* +*/ + +#ifndef OS_CFG_H +#define OS_CFG_H + + + /* ---------------------- MISCELLANEOUS ----------------------- */ +#define OS_APP_HOOKS_EN 1u /* Application-defined hooks are called from the uC/OS-II hooks */ +#define OS_ARG_CHK_EN 0u /* Enable (1) or Disable (0) argument checking */ +#define OS_CPU_HOOKS_EN 1u /* uC/OS-II hooks are found in the processor port files */ + +#define OS_DEBUG_EN 1u /* Enable(1) debug variables */ + +#define OS_EVENT_MULTI_EN 1u /* Include code for OSEventPendMulti() */ +#define OS_EVENT_NAME_EN 1u /* Enable names for Sem, Mutex, Mbox and Q */ + +#define OS_LOWEST_PRIO 63u /* Defines the lowest priority that can be assigned ... */ + /* ... MUST NEVER be higher than 254! */ + +#define OS_MAX_EVENTS 20u /* Max. number of event control blocks in your application */ +#define OS_MAX_FLAGS 5u /* Max. number of Event Flag Groups in your application */ +#define OS_MAX_MEM_PART 5u /* Max. number of memory partitions */ +#define OS_MAX_QS 6u /* Max. number of queue control blocks in your application */ +#define OS_MAX_TASKS 20u /* Max. number of tasks in your application, MUST be >= 2 */ + +#define OS_SCHED_LOCK_EN 1u /* Include code for OSSchedLock() and OSSchedUnlock() */ + +#define OS_TICK_STEP_EN 1u /* Enable tick stepping feature for uC/OS-View */ +#define OS_TICKS_PER_SEC 1000u /* Set the number of ticks in one second */ + +#define OS_TLS_TBL_SIZE 0u /* Size of Thread-Local Storage Table */ + + + /* --------------------- TASK STACK SIZE ---------------------- */ +#define OS_TASK_TMR_STK_SIZE 128u /* Timer task stack size (# of OS_STK wide entries) */ +#define OS_TASK_STAT_STK_SIZE 128u /* Statistics task stack size (# of OS_STK wide entries) */ +#define OS_TASK_IDLE_STK_SIZE 128u /* Idle task stack size (# of OS_STK wide entries) */ + + + /* --------------------- TASK MANAGEMENT ---------------------- */ +#define OS_TASK_CHANGE_PRIO_EN 1u /* Include code for OSTaskChangePrio() */ +#define OS_TASK_CREATE_EN 1u /* Include code for OSTaskCreate() */ +#define OS_TASK_CREATE_EXT_EN 1u /* Include code for OSTaskCreateExt() */ +#define OS_TASK_DEL_EN 1u /* Include code for OSTaskDel() */ +#define OS_TASK_NAME_EN 1u /* Enable task names */ +#define OS_TASK_PROFILE_EN 1u /* Include variables in OS_TCB for profiling */ +#define OS_TASK_QUERY_EN 1u /* Include code for OSTaskQuery() */ +#define OS_TASK_REG_TBL_SIZE 1u /* Size of task variables array (#of INT32U entries) */ +#define OS_TASK_STAT_EN 1u /* Enable (1) or Disable(0) the statistics task */ +#define OS_TASK_STAT_STK_CHK_EN 1u /* Check task stacks from statistic task */ +#define OS_TASK_SUSPEND_EN 1u /* Include code for OSTaskSuspend() and OSTaskResume() */ +#define OS_TASK_SW_HOOK_EN 1u /* Include code for OSTaskSwHook() */ + + + /* ----------------------- EVENT FLAGS ------------------------ */ +#define OS_FLAG_EN 1u /* Enable (1) or Disable (0) code generation for EVENT FLAGS */ +#define OS_FLAG_ACCEPT_EN 1u /* Include code for OSFlagAccept() */ +#define OS_FLAG_DEL_EN 1u /* Include code for OSFlagDel() */ +#define OS_FLAG_NAME_EN 1u /* Enable names for event flag group */ +#define OS_FLAG_QUERY_EN 1u /* Include code for OSFlagQuery() */ +#define OS_FLAG_WAIT_CLR_EN 1u /* Include code for Wait on Clear EVENT FLAGS */ +#define OS_FLAGS_NBITS 16u /* Size in #bits of OS_FLAGS data type (8, 16 or 32) */ + + + /* -------------------- MESSAGE MAILBOXES --------------------- */ +#define OS_MBOX_EN 1u /* Enable (1) or Disable (0) code generation for MAILBOXES */ +#define OS_MBOX_ACCEPT_EN 1u /* Include code for OSMboxAccept() */ +#define OS_MBOX_DEL_EN 1u /* Include code for OSMboxDel() */ +#define OS_MBOX_PEND_ABORT_EN 1u /* Include code for OSMboxPendAbort() */ +#define OS_MBOX_POST_EN 1u /* Include code for OSMboxPost() */ +#define OS_MBOX_POST_OPT_EN 1u /* Include code for OSMboxPostOpt() */ +#define OS_MBOX_QUERY_EN 1u /* Include code for OSMboxQuery() */ + + + /* --------------------- MEMORY MANAGEMENT -------------------- */ +#define OS_MEM_EN 1u /* Enable (1) or Disable (0) code generation for MEMORY MANAGER */ +#define OS_MEM_NAME_EN 1u /* Enable memory partition names */ +#define OS_MEM_QUERY_EN 1u /* Include code for OSMemQuery() */ + + + /* ---------------- MUTUAL EXCLUSION SEMAPHORES --------------- */ +#define OS_MUTEX_EN 1u /* Enable (1) or Disable (0) code generation for MUTEX */ +#define OS_MUTEX_ACCEPT_EN 1u /* Include code for OSMutexAccept() */ +#define OS_MUTEX_DEL_EN 1u /* Include code for OSMutexDel() */ +#define OS_MUTEX_QUERY_EN 1u /* Include code for OSMutexQuery() */ + + + /* ---------------------- MESSAGE QUEUES ---------------------- */ +#define OS_Q_EN 1u /* Enable (1) or Disable (0) code generation for QUEUES */ +#define OS_Q_ACCEPT_EN 1u /* Include code for OSQAccept() */ +#define OS_Q_DEL_EN 1u /* Include code for OSQDel() */ +#define OS_Q_FLUSH_EN 1u /* Include code for OSQFlush() */ +#define OS_Q_PEND_ABORT_EN 1u /* Include code for OSQPendAbort() */ +#define OS_Q_POST_EN 1u /* Include code for OSQPost() */ +#define OS_Q_POST_FRONT_EN 1u /* Include code for OSQPostFront() */ +#define OS_Q_POST_OPT_EN 1u /* Include code for OSQPostOpt() */ +#define OS_Q_QUERY_EN 1u /* Include code for OSQQuery() */ + + + /* ------------------------ SEMAPHORES ------------------------ */ +#define OS_SEM_EN 1u /* Enable (1) or Disable (0) code generation for SEMAPHORES */ +#define OS_SEM_ACCEPT_EN 1u /* Include code for OSSemAccept() */ +#define OS_SEM_DEL_EN 1u /* Include code for OSSemDel() */ +#define OS_SEM_PEND_ABORT_EN 1u /* Include code for OSSemPendAbort() */ +#define OS_SEM_QUERY_EN 1u /* Include code for OSSemQuery() */ +#define OS_SEM_SET_EN 1u /* Include code for OSSemSet() */ + + + /* --------------------- TIME MANAGEMENT ---------------------- */ +#define OS_TIME_DLY_HMSM_EN 1u /* Include code for OSTimeDlyHMSM() */ +#define OS_TIME_DLY_RESUME_EN 1u /* Include code for OSTimeDlyResume() */ +#define OS_TIME_GET_SET_EN 1u /* Include code for OSTimeGet() and OSTimeSet() */ +#define OS_TIME_TICK_HOOK_EN 1u /* Include code for OSTimeTickHook() */ + + + /* --------------------- TIMER MANAGEMENT --------------------- */ +#define OS_TMR_EN 0u /* Enable (1) or Disable (0) code generation for TIMERS */ +#define OS_TMR_CFG_MAX 16u /* Maximum number of timers */ +#define OS_TMR_CFG_NAME_EN 1u /* Determine timer names */ +#define OS_TMR_CFG_WHEEL_SIZE 7u /* Size of timer wheel (#Spokes) */ +#define OS_TMR_CFG_TICKS_PER_SEC 10u /* Rate at which timer management task runs (Hz) */ + +#endif diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/shell_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/shell_cfg.h new file mode 100644 index 0000000..15e41af --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/shell_cfg.h @@ -0,0 +1,96 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell Utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/Shell is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* SHELL UTILITY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : shell_cfg.h +* Version : V1.03.01 +* Programmer(s) : SR +* FBJ +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef SHELL_CFG_H +#define SHELL_CFG_H + + +/* +********************************************************************************************************* +* SHELL +* +* Note(s) : (1) Defines the size of the table used to hold the various modules' command tables. Command +* tables are added using the Shell_CmdTblAdd() function. Once the table is full, it is not +* possible to add any more unless Shell_CmdTblRem() is first called. +* +* (2) Defines the maximum number or argument(s) a command may pass on the string holding the +* complete command. The minimum value is 1. +* +* (3) Defines the maximum length for module command name, including the NULL character. +********************************************************************************************************* +*/ + +#define SHELL_CFG_CMD_TBL_SIZE 3 /* Cfg Shell cmd tbl size (see Note #1). */ +#define SHELL_CFG_CMD_ARG_NBR_MAX 5 /* Cfg cmd max nbr of arg (see Note #2). */ + +#define SHELL_CFG_MODULE_CMD_NAME_LEN_MAX 6 /* Cfg module cmd name len (See Note #3). */ + + +/* +********************************************************************************************************* +* TRACING +********************************************************************************************************* +*/ + +#ifndef TRACE_LEVEL_OFF +#define TRACE_LEVEL_OFF 0u +#endif + +#ifndef TRACE_LEVEL_INFO +#define TRACE_LEVEL_INFO 1u +#endif + +#ifndef TRACE_LEVEL_DBG +#define TRACE_LEVEL_DBG 2u +#endif + +#define SHELL_TRACE_LEVEL TRACE_LEVEL_OFF +#define SHELL_TRACE printf + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif \ No newline at end of file diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/terminal_cfg.h b/src/APP/Aufgabe1/ps7/core0/cfg/terminal_cfg.h new file mode 100644 index 0000000..6d35076 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/terminal_cfg.h @@ -0,0 +1,70 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* Knowledge of the source code may not be used to write a similar +* product. This file may only be used in accordance with a license +* and should not be redistributed in any way. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* TERMINAL +* +* CONFIGURATION TEMPLATE FILE +* +* Filename : terminal_cfg.h +* Version : V1.03.01 +* Programmer(s) : BAN +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* TASKS PRIORITIES +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_PRIO 16u + + +/* +********************************************************************************************************* +* STACK SIZES +* Size of the task stacks (# of OS_STK entries) +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_STK_SIZE 1024u + + +/* +********************************************************************************************************* +* TERMINAL +* +* Note(s) : (1) Defines the maximum length of a command entered on the terminal, in characters. +* +* (2) Defines the maximum path length of the Current Working Directory (CWD). +* +* (3) Enables/disables command history. +* +* (4) Defines the number of items to hold in the command history. +* +* (5) Defines the length of a item in the command history. If a command is entered into the +* terminal that exceeds this length, then only the first characters, up to this number of +* characters, will be copied into the command history. +********************************************************************************************************* +*/ + +#define TERMINAL_CFG_MAX_CMD_LEN 260u /* Cfg max cmd len (see Note #1). */ +#define TERMINAL_CFG_MAX_PATH_LEN 260u /* Cfg max path len (see Note #2). */ + +#define TERMINAL_CFG_HISTORY_EN DEF_ENABLED /* En/dis history (see Note #3). */ +#define TERMINAL_CFG_HISTORY_ITEMS_NBR 16u /* Cfg nbr history items (see Note #4). */ +#define TERMINAL_CFG_HISTORY_ITEM_LEN 64u /* Cfg history item len (see Note #5). */ diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/xparameters.h b/src/APP/Aufgabe1/ps7/core0/cfg/xparameters.h new file mode 100644 index 0000000..23c2267 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/xparameters.h @@ -0,0 +1,706 @@ +/******************************************************************/ + +/* Definition for CPU ID */ +#define XPAR_CPU_ID 0 + +/* Definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_PS7_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_CPU_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + +/******************************************************************/ + +#undef DEF_DISABLED +#undef DEF_ENABLED +#define DEF_ENABLED 1 +#define DEF_DISABLED 0 + +#include "xparameters_ps.h" + + + +/******************************************************************/ + +/* Definitions for driver BRAM */ +#define XPAR_XBRAM_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_AXI_BRAM_CTRL_0_DEVICE_ID 0 +#define XPAR_AXI_BRAM_CTRL_0_DATA_WIDTH 32 +#define XPAR_AXI_BRAM_CTRL_0_ECC 0 +#define XPAR_AXI_BRAM_CTRL_0_FAULT_INJECT 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_UE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_STATUS_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_COUNTER_WIDTH 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_REGISTER 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_AXI_BRAM_CTRL_0_WRITE_ACCESS 0 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_BASEADDR 0x40000000 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_HIGHADDR 0x40001FFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_BASEADDR 0xFFFFFFFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_HIGHADDR 0xFFFFFFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_BRAM_0_DEVICE_ID XPAR_AXI_BRAM_CTRL_0_DEVICE_ID +#define XPAR_BRAM_0_DATA_WIDTH 32 +#define XPAR_BRAM_0_ECC 0 +#define XPAR_BRAM_0_FAULT_INJECT 0 +#define XPAR_BRAM_0_CE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_UE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_ECC_STATUS_REGISTERS 0 +#define XPAR_BRAM_0_CE_COUNTER_WIDTH 0 +#define XPAR_BRAM_0_ECC_ONOFF_REGISTER 0 +#define XPAR_BRAM_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_BRAM_0_WRITE_ACCESS 0 +#define XPAR_BRAM_0_BASEADDR 0x40000000 +#define XPAR_BRAM_0_HIGHADDR 0x40001FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_DDR_0 */ +#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000 +#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x3FFFFFFF + + +/******************************************************************/ + +/* Definitions for driver DEVCFG */ +#define XPAR_XDCFG_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_PS7_DEV_CFG_0_DEVICE_ID 0 +#define XPAR_PS7_DEV_CFG_0_BASEADDR 0xF8007000 +#define XPAR_PS7_DEV_CFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_XDCFG_0_DEVICE_ID XPAR_PS7_DEV_CFG_0_DEVICE_ID +#define XPAR_XDCFG_0_BASEADDR 0xF8007000 +#define XPAR_XDCFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Definitions for driver DMAPS */ +#define XPAR_XDMAPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_DMA_NS */ +#define XPAR_PS7_DMA_NS_DEVICE_ID 0 +#define XPAR_PS7_DMA_NS_BASEADDR 0xF8004000 +#define XPAR_PS7_DMA_NS_HIGHADDR 0xF8004FFF + + +/* Definitions for peripheral PS7_DMA_S */ +#define XPAR_PS7_DMA_S_DEVICE_ID 1 +#define XPAR_PS7_DMA_S_BASEADDR 0xF8003000 +#define XPAR_PS7_DMA_S_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DMA_NS */ +#define XPAR_XDMAPS_0_DEVICE_ID XPAR_PS7_DMA_NS_DEVICE_ID +#define XPAR_XDMAPS_0_BASEADDR 0xF8004000 +#define XPAR_XDMAPS_0_HIGHADDR 0xF8004FFF + +/* Canonical definitions for peripheral PS7_DMA_S */ +#define XPAR_XDMAPS_1_DEVICE_ID XPAR_PS7_DMA_S_DEVICE_ID +#define XPAR_XDMAPS_1_BASEADDR 0xF8003000 +#define XPAR_XDMAPS_1_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_AFI_0 */ +#define XPAR_PS7_AFI_0_S_AXI_BASEADDR 0xF8008000 +#define XPAR_PS7_AFI_0_S_AXI_HIGHADDR 0xF8008FFF + + +/* Definitions for peripheral PS7_AFI_1 */ +#define XPAR_PS7_AFI_1_S_AXI_BASEADDR 0xF8009000 +#define XPAR_PS7_AFI_1_S_AXI_HIGHADDR 0xF8009FFF + + +/* Definitions for peripheral PS7_AFI_2 */ +#define XPAR_PS7_AFI_2_S_AXI_BASEADDR 0xF800A000 +#define XPAR_PS7_AFI_2_S_AXI_HIGHADDR 0xF800AFFF + + +/* Definitions for peripheral PS7_AFI_3 */ +#define XPAR_PS7_AFI_3_S_AXI_BASEADDR 0xF800B000 +#define XPAR_PS7_AFI_3_S_AXI_HIGHADDR 0xF800BFFF + + +/* Definitions for peripheral PS7_DDRC_0 */ +#define XPAR_PS7_DDRC_0_S_AXI_BASEADDR 0xF8006000 +#define XPAR_PS7_DDRC_0_S_AXI_HIGHADDR 0xF8006FFF + + +/* Definitions for peripheral PS7_GLOBALTIMER_0 */ +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_BASEADDR 0xF8F00200 +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_HIGHADDR 0xF8F002FF + + +/* Definitions for peripheral PS7_GPV_0 */ +#define XPAR_PS7_GPV_0_S_AXI_BASEADDR 0xF8900000 +#define XPAR_PS7_GPV_0_S_AXI_HIGHADDR 0xF89FFFFF + + +/* Definitions for peripheral PS7_INTC_DIST_0 */ +#define XPAR_PS7_INTC_DIST_0_S_AXI_BASEADDR 0xF8F01000 +#define XPAR_PS7_INTC_DIST_0_S_AXI_HIGHADDR 0xF8F01FFF + + +/* Definitions for peripheral PS7_IOP_BUS_CONFIG_0 */ +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_BASEADDR 0xE0200000 +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_HIGHADDR 0xE0200FFF + + +/* Definitions for peripheral PS7_OCMC_0 */ +#define XPAR_PS7_OCMC_0_S_AXI_BASEADDR 0xF800C000 +#define XPAR_PS7_OCMC_0_S_AXI_HIGHADDR 0xF800CFFF + + +/* Definitions for peripheral PS7_PL310_0 */ +#define XPAR_PS7_PL310_0_S_AXI_BASEADDR 0xF8F02000 +#define XPAR_PS7_PL310_0_S_AXI_HIGHADDR 0xF8F02FFF + + +/* Definitions for peripheral PS7_PMU_0 */ +#define XPAR_PS7_PMU_0_S_AXI_BASEADDR 0xF8891000 +#define XPAR_PS7_PMU_0_S_AXI_HIGHADDR 0xF8891FFF +#define XPAR_PS7_PMU_0_PMU1_S_AXI_BASEADDR 0xF8893000 +#define XPAR_PS7_PMU_0_PMU1_S_AXI_HIGHADDR 0xF8893FFF + + +/* Definitions for peripheral PS7_QSPI_LINEAR_0 */ +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_BASEADDR 0xFC000000 +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_HIGHADDR 0xFDFFFFFF + + +/* Definitions for peripheral PS7_RAM_0 */ +#define XPAR_PS7_RAM_0_S_AXI_BASEADDR 0x00000000 +#define XPAR_PS7_RAM_0_S_AXI_HIGHADDR 0x0003FFFF + + +/* Definitions for peripheral PS7_RAM_1 */ +#define XPAR_PS7_RAM_1_S_AXI_BASEADDR 0xFFFC0000 +#define XPAR_PS7_RAM_1_S_AXI_HIGHADDR 0xFFFFFFFF + + +/* Definitions for peripheral PS7_SLCR_0 */ +#define XPAR_PS7_SLCR_0_S_AXI_BASEADDR 0xF8000000 +#define XPAR_PS7_SLCR_0_S_AXI_HIGHADDR 0xF8000FFF + + +/******************************************************************/ + +/* Definitions for driver GPIO */ +#define XPAR_XGPIO_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_GPIO_0 */ +#define XPAR_AXI_GPIO_0_BASEADDR 0x41200000 +#define XPAR_AXI_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_AXI_GPIO_0_DEVICE_ID 0 +#define XPAR_AXI_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_AXI_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_GPIO_0 */ +#define XPAR_GPIO_0_BASEADDR 0x41200000 +#define XPAR_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID +#define XPAR_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +///* Definitions for driver IICPS */ +//#define XPAR_XIICPS_NUM_INSTANCES 1 +// +///* Definitions for peripheral PS7_I2C_0 */ +//#define XPAR_PS7_I2C_0_DEVICE_ID 0 +//#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +//#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +//#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver QSPIPS */ +#define XPAR_XQSPIPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_QSPI_0 */ +#define XPAR_PS7_QSPI_0_DEVICE_ID 0 +#define XPAR_PS7_QSPI_0_BASEADDR 0xE000D000 +#define XPAR_PS7_QSPI_0_HIGHADDR 0xE000DFFF +#define XPAR_PS7_QSPI_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_PS7_QSPI_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_QSPI_0 */ +#define XPAR_XQSPIPS_0_DEVICE_ID XPAR_PS7_QSPI_0_DEVICE_ID +#define XPAR_XQSPIPS_0_BASEADDR 0xE000D000 +#define XPAR_XQSPIPS_0_HIGHADDR 0xE000DFFF +#define XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_XQSPIPS_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Definitions for driver SCUWDT */ +#define XPAR_XSCUWDT_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_PS7_SCUWDT_0_DEVICE_ID 0 +#define XPAR_PS7_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_PS7_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_SCUWDT_0_DEVICE_ID XPAR_PS7_SCUWDT_0_DEVICE_ID +#define XPAR_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Definitions for driver UCOS_EMACPS */ +#define XPAR_UCOS_EMACPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_PS7_ETHERNET_0_DEVICE_ID 0 +#define XPAR_PS7_ETHERNET_0_BASEADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_HIGHADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_UCOS_EMACPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_EMACPS_0_DEVICE_ID XPAR_PS7_ETHERNET_0_DEVICE_ID +#define XPAR_UCOS_EMACPS_0_BASEADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_HIGHADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_L2CACHEC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_L2CACHEC_0 */ +#define XPAR_PS7_L2CACHEC_0_DEVICE_ID 0 +#define XPAR_PS7_L2CACHEC_0_BASEADDR 0xF8F02000 +#define XPAR_PS7_L2CACHEC_0_HIGHADDR 0xF8F02FFF + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUC_0 */ +#define XPAR_PS7_SCUC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUC_0_BASEADDR 0xF8F00000 +#define XPAR_PS7_SCUC_0_HIGHADDR 0xF8F000FC + + +/******************************************************************/ + + +/***Definitions for Core_nIRQ/nFIQ interrupts ****/ +/* Definitions for driver UCOS_SCUGIC */ +#define XPAR_XSCUGIC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_PS7_SCUGIC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUGIC_0_BASEADDR 0xF8F00100 +#define XPAR_PS7_SCUGIC_0_HIGHADDR 0xF8F001FF +#define XPAR_PS7_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_SCUGIC_0_DEVICE_ID 0 +#define XPAR_SCUGIC_0_CPU_BASEADDR 0xF8F00100 +#define XPAR_SCUGIC_0_CPU_HIGHADDR 0xF8F001FF +#define XPAR_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUTIMER */ +#define XPAR_UCOS_SCUC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUTIMER_0 */ +#define XPAR_PS7_SCUTIMER_0_DEVICE_ID 0 +#define XPAR_PS7_SCUTIMER_0_BASEADDR 0xF8F00600 +#define XPAR_PS7_SCUTIMER_0_HIGHADDR 0xF8F0061F + + +/******************************************************************/ + +/* Definitions for driver UCOS_SDPS */ +#define XPAR_UCOS_SDPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SD_0 */ +#define XPAR_PS7_SD_0_DEVICE_ID 0 +#define XPAR_PS7_SD_0_BASEADDR 0xE0100000 +#define XPAR_PS7_SD_0_HIGHADDR 0xE0100FFF +#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SD_0 */ +#define XPAR_UCOS_SDPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_SDPS_0_DEVICE_ID XPAR_PS7_SD_0_DEVICE_ID +#define XPAR_UCOS_SDPS_0_BASEADDR 0xE0100000 +#define XPAR_UCOS_SDPS_0_HIGHADDR 0xE0100FFF +#define XPAR_UCOS_SDPS_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +///* Definitions for driver UCOS_TTCPS */ +//#define XPAR_UCOS_TTCPS_NUM_INSTANCES 3 +// +///* Definitions for peripheral PS7_TTC_0 */ +//#define XPAR_PS7_TTC_0_DEVICE_ID 0 +//#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000 +//#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_1_DEVICE_ID 1 +//#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004 +//#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_2_DEVICE_ID 2 +//#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008 +//#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_UARTPS */ +#define XPAR_UCOS_UARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_UCOS_UARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_UCOS_UARTPS_0_BASEADDR 0xE0001000 +#define XPAR_UCOS_UARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_UCOS_UARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_UCOS_UARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_USBPS */ +#define XPAR_UCOS_USBPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_USB_0 */ +#define XPAR_PS7_USB_0_DEVICE_ID 0 +#define XPAR_PS7_USB_0_BASEADDR 0xE0002000 +#define XPAR_PS7_USB_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_USB_0 */ +#define XPAR_UCOS_USBPS_0_DEVICE_ID XPAR_PS7_USB_0_DEVICE_ID +#define XPAR_UCOS_USBPS_0_BASEADDR 0xE0002000 +#define XPAR_UCOS_USBPS_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Definitions for driver XADCPS */ +#define XPAR_XADCPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_XADC_0 */ +#define XPAR_PS7_XADC_0_DEVICE_ID 0 +#define XPAR_PS7_XADC_0_BASEADDR 0xF8007100 +#define XPAR_PS7_XADC_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_XADC_0 */ +#define XPAR_XADCPS_0_DEVICE_ID XPAR_PS7_XADC_0_DEVICE_ID +#define XPAR_XADCPS_0_BASEADDR 0xF8007100 +#define XPAR_XADCPS_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + + +//UCOS STDOUT +#define UCOS_STDOUT_DRIVER UCOS_UART_PS7_UART +#define UCOS_STDOUT_DEVICE_ID 0 +#define STDOUT_BASEADDRESS + +//UCOS Ethernet +#define UCOS_ETHERNET_DRIVER UCOS_ETHERNET_EMACPS + +//UCOS TASK PARAMETERS +#define UCOS_START_TASK_PRIO 5 +#define UCOS_START_TASK_STACK_SIZE 784 +#define UCOS_START_DEBUG_TRACE DEF_ENABLED +#define NET_TASK_CFG_RX_PRIO 30 +#define NET_TASK_CFG_RX_STACK_SIZE 3072 +#define NET_TASK_CFG_TXDEALLOC_PRIO 6 +#define NET_TASK_CFG_TXDEALLOC_STACK_SIZE 2048 +#define NET_TASK_CFG_TMR_PRIO 18 +#define NET_TASK_CFG_TMR_STACK_SIZE 2048 +#define HTTPc_OS_CFG_TASK_PRIO 20 +#define HTTPc_OS_CFG_TASK_STK_SIZE 2048 +#define UCOS_HTTPc_OS_CFG_TASK_DELAY 1 +#define UCOS_HTTPc_OS_CFG_MSG_Q_SIZE 5 +#define UCOS_HTTPc_OS_CFG_TIMEOUT 2000 +#define UCOS_HTTPc_OS_CFG_INACTIVITY_TIMEOUT 30 + +#define UCOS_AMP_MASTER DEF_ENABLED + + +#define UCOS_CFG_INIT_CAN DEF_ENABLED +#define UCOS_CFG_INIT_NET DEF_ENABLED +#define UCOS_CFG_INIT_FS DEF_DISABLED +#define UCOS_CFG_INIT_OPENAMP DEF_DISABLED +#define UCOS_CFG_INIT_USBD DEF_DISABLED +#define UCOS_CFG_INIT_USBH DEF_DISABLED + + +#define UCOS_ETHERNET_ADDRESS "10.10.110.2" +#define UCOS_ETHERNET_GATEWAY "10.10.110.1" +#define UCOS_ETHERNET_SUBMASK "255.255.255.0" +#define UCOS_ETHERNET_DHCP DEF_ENABLED + + +#define UCOS_IF_RX_BUF_NBR 12 +#define UCOS_IF_TX_LARGE_BUF_NBR 8 +#define UCOS_IF_TX_SMALL_BUF_NBR 8 +#define UCOS_IF_RX_DESC_NBR 0 +#define UCOS_IF_TX_DESC_NBR 0 +#define UCOS_IF_DEDIC_MEM_ADDR 0 +#define UCOS_IF_DEDIC_MEM_SIZE 0 +#define UCOS_IF_HW_ADDR "50:E5:49:E6:8D:28" + + +#define UCOS_PHY_BUS_ADDR 255 +#define UCOS_PHY_BUS_MODE UCOS_NET_PHY_BUS_MODE_GMII +#define UCOS_PHY_TYPE UCOS_NET_PHY_TYPE_INT +#define UCOS_PHY_SPEED UCOS_NET_PHY_SPD_AUTO +#define UCOS_PHY_DUPLEX UCOS_NET_PHY_DUPLEX_AUTO + + +#define UCOS_USB_DRIVER UCOS_USB_NONE +#define UCOS_USB_DEVICE_ID 0 +#define UCOS_USB_TYPE UCOS_USB_TYPE_DEVICE + + +#define UCOS_RAMDISK_EN DEF_DISABLED +#define UCOS_RAMDISK_SIZE 128 +#define UCOS_RAMDISK_SECTOR_SIZE 512 +#define UCOS_RAMDISK_BASE_ADDRESS 0 + + +#define UCOS_SDCARD_EN DEF_DISABLED + + +#define XPAR_PS7_ETHERNET_0_INT_SOURCE 54 +#define XPAR_PS7_SD_0_INT_SOURCE 56 +#define XPAR_PS7_UART_1_INT_SOURCE 82 +#define XPAR_PS7_USB_0_INT_SOURCE 53 + +#define UCOS_ZYNQ_CONFIG_MMU DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_MMU DEF_DISABLED +#define UCOS_ZYNQ_CONFIG_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_OPTIMS DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_I_EN DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_D_EN DEF_DISABLED +#define UCOS_CPU_TYPE UCOS_CPU_TYPE_PS7 + +//Parameters added by Kai Gemlau +#define UCOS_SMP_ENABLE DEF_DISABLED + +/******************************************************************/ + +/* Definitions for driver TTCPS */ +#define XPAR_XTTCPS_NUM_INSTANCES 3U + +/* Definitions for peripheral PS7_TTC_0 */ +#define XPAR_PS7_TTC_0_DEVICE_ID 0U +#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000U +#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_1_DEVICE_ID 1U +#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004U +#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_2_DEVICE_ID 2U +#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008U +#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_TTC_0 */ +#define XPAR_XTTCPS_0_DEVICE_ID XPAR_PS7_TTC_0_DEVICE_ID +#define XPAR_XTTCPS_0_BASEADDR 0xF8001000U +#define XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_0_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_1_DEVICE_ID XPAR_PS7_TTC_1_DEVICE_ID +#define XPAR_XTTCPS_1_BASEADDR 0xF8001004U +#define XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_1_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_2_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define XPAR_XTTCPS_2_BASEADDR 0xF8001008U +#define XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ + +/******************************************************************/ +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Definitions for driver IICPS */ +#define XPAR_XIICPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_I2C_0 */ +#define XPAR_PS7_I2C_0_DEVICE_ID 0 +#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/* Definitions for peripheral PS7_I2C_1 */ +#define XPAR_PS7_I2C_1_DEVICE_ID 1 +#define XPAR_PS7_I2C_1_BASEADDR 0xE0005000 +#define XPAR_PS7_I2C_1_HIGHADDR 0xE0005FFF +#define XPAR_PS7_I2C_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + +/* Canonical definitions for peripheral PS7_I2C_1 */ +#define XPAR_XIICPS_1_DEVICE_ID XPAR_PS7_I2C_1_DEVICE_ID +#define XPAR_XIICPS_1_BASEADDR 0xE0005000 +#define XPAR_XIICPS_1_HIGHADDR 0xE0005FFF +#define XPAR_XIICPS_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver UARTPS */ +#define XPAR_XUARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_XUARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_XUARTPS_0_BASEADDR 0xE0001000 +#define XPAR_XUARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_XUARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_XUARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ diff --git a/src/APP/Aufgabe1/ps7/core0/cfg/xparameters_ps.h b/src/APP/Aufgabe1/ps7/core0/cfg/xparameters_ps.h new file mode 100644 index 0000000..e7ab8e3 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/cfg/xparameters_ps.h @@ -0,0 +1,325 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xparameters_ps.h +* +* This file contains the address definitions for the hard peripherals +* attached to the ARM Cortex A9 core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 1.00a ecm/sdm 02/01/10 Initial version
+* 3.04a sdm     02/02/12 Removed some of the defines as they are being generated through
+*                        driver tcl
+* 5.0	pkp		01/16/15 Added interrupt ID definition of ttc for TEST APP
+*
+* +* @note +* +* None. +* +******************************************************************************/ + +#ifndef _XPARAMETERS_PS_H_ +#define _XPARAMETERS_PS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/************************** Constant Definitions *****************************/ + +/* + * This block contains constant declarations for the peripherals + * within the hardblock + */ + +/* Canonical definitions for DDR MEMORY */ +#define XPAR_DDR_MEM_BASEADDR 0x00000000U +#define XPAR_DDR_MEM_HIGHADDR 0x3FFFFFFFU + +/* Canonical definitions for Interrupts */ +#define XPAR_XUARTPS_0_INTR XPS_UART0_INT_ID +#define XPAR_XUARTPS_1_INTR XPS_UART1_INT_ID +#define XPAR_XUSBPS_0_INTR XPS_USB0_INT_ID +#define XPAR_XUSBPS_1_INTR XPS_USB1_INT_ID +#define XPAR_XIICPS_0_INTR XPS_I2C0_INT_ID +#define XPAR_XIICPS_1_INTR XPS_I2C1_INT_ID +#define XPAR_XSPIPS_0_INTR XPS_SPI0_INT_ID +#define XPAR_XSPIPS_1_INTR XPS_SPI1_INT_ID +#define XPAR_XCANPS_0_INTR XPS_CAN0_INT_ID +#define XPAR_XCANPS_1_INTR XPS_CAN1_INT_ID +#define XPAR_XGPIOPS_0_INTR XPS_GPIO_INT_ID +#define XPAR_XEMACPS_0_INTR XPS_GEM0_INT_ID +#define XPAR_XEMACPS_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_XEMACPS_1_INTR XPS_GEM1_INT_ID +#define XPAR_XEMACPS_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_XSDIOPS_0_INTR XPS_SDIO0_INT_ID +#define XPAR_XQSPIPS_0_INTR XPS_QSPI_INT_ID +#define XPAR_XSDIOPS_1_INTR XPS_SDIO1_INT_ID +#define XPAR_XWDTPS_0_INTR XPS_WDT_INT_ID +#define XPAR_XDCFG_0_INTR XPS_DVC_INT_ID +#define XPAR_SCUTIMER_INTR XPS_SCU_TMR_INT_ID +#define XPAR_SCUWDT_INTR XPS_SCU_WDT_INT_ID +#define XPAR_XTTCPS_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_XTTCPS_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_XTTCPS_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_XTTCPS_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_XTTCPS_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_XTTCPS_5_INTR XPS_TTC1_2_INT_ID +#define XPAR_XDMAPS_0_FAULT_INTR XPS_DMA0_ABORT_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_0 XPS_DMA0_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_1 XPS_DMA1_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_2 XPS_DMA2_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_3 XPS_DMA3_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_4 XPS_DMA4_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_5 XPS_DMA5_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_6 XPS_DMA6_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_7 XPS_DMA7_INT_ID + + +#define XPAR_XQSPIPS_0_LINEAR_BASEADDR XPS_QSPI_LINEAR_BASEADDR +#define XPAR_XPARPORTPS_CTRL_BASEADDR XPS_PARPORT_CRTL_BASEADDR + + + +/* Canonical definitions for DMAC */ + + +/* Canonical definitions for WDT */ + +/* Canonical definitions for SLCR */ +#define XPAR_XSLCR_NUM_INSTANCES 1U +#define XPAR_XSLCR_0_DEVICE_ID 0U +#define XPAR_XSLCR_0_BASEADDR XPS_SYS_CTRL_BASEADDR + +/* Canonical definitions for SCU GIC */ +#define XPAR_SCUGIC_NUM_INSTANCES 1U +#define XPAR_SCUGIC_SINGLE_DEVICE_ID 0U +#define XPAR_SCUGIC_CPU_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000100U) +#define XPAR_SCUGIC_DIST_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00001000U) +#define XPAR_SCUGIC_ACK_BEFORE 0U + +/* Canonical definitions for Global Timer */ +#define XPAR_GLOBAL_TMR_NUM_INSTANCES 1U +#define XPAR_GLOBAL_TMR_DEVICE_ID 0U +#define XPAR_GLOBAL_TMR_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000200U) +#define XPAR_GLOBAL_TMR_INTR XPS_GLOBAL_TMR_INT_ID + + +/* Xilinx Parallel Flash Library (XilFlash) User Settings */ +#define XPAR_AXI_EMC + + +#define XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/* + * This block contains constant declarations for the peripherals + * within the hardblock. These have been put for bacwards compatibilty + */ + +#define XPS_PERIPHERAL_BASEADDR 0xE0000000U +#define XPS_UART0_BASEADDR 0xE0000000U +#define XPS_UART1_BASEADDR 0xE0001000U +#define XPS_USB0_BASEADDR 0xE0002000U +#define XPS_USB1_BASEADDR 0xE0003000U +#define XPS_I2C0_BASEADDR 0xE0004000U +#define XPS_I2C1_BASEADDR 0xE0005000U +#define XPS_SPI0_BASEADDR 0xE0006000U +#define XPS_SPI1_BASEADDR 0xE0007000U +#define XPS_CAN0_BASEADDR 0xE0008000U +#define XPS_CAN1_BASEADDR 0xE0009000U +#define XPS_GPIO_BASEADDR 0xE000A000U +#define XPS_GEM0_BASEADDR 0xE000B000U +#define XPS_GEM1_BASEADDR 0xE000C000U +#define XPS_QSPI_BASEADDR 0xE000D000U +#define XPS_PARPORT_CRTL_BASEADDR 0xE000E000U +#define XPS_SDIO0_BASEADDR 0xE0100000U +#define XPS_SDIO1_BASEADDR 0xE0101000U +#define XPS_IOU_BUS_CFG_BASEADDR 0xE0200000U +#define XPS_NAND_BASEADDR 0xE1000000U +#define XPS_PARPORT0_BASEADDR 0xE2000000U +#define XPS_PARPORT1_BASEADDR 0xE4000000U +#define XPS_QSPI_LINEAR_BASEADDR 0xFC000000U +#define XPS_SYS_CTRL_BASEADDR 0xF8000000U /* AKA SLCR */ +#define XPS_TTC0_BASEADDR 0xF8001000U +#define XPS_TTC1_BASEADDR 0xF8002000U +#define XPS_DMAC0_SEC_BASEADDR 0xF8003000U +#define XPS_DMAC0_NON_SEC_BASEADDR 0xF8004000U +#define XPS_WDT_BASEADDR 0xF8005000U +#define XPS_DDR_CTRL_BASEADDR 0xF8006000U +#define XPS_DEV_CFG_APB_BASEADDR 0xF8007000U +#define XPS_AFI0_BASEADDR 0xF8008000U +#define XPS_AFI1_BASEADDR 0xF8009000U +#define XPS_AFI2_BASEADDR 0xF800A000U +#define XPS_AFI3_BASEADDR 0xF800B000U +#define XPS_OCM_BASEADDR 0xF800C000U +#define XPS_EFUSE_BASEADDR 0xF800D000U +#define XPS_CORESIGHT_BASEADDR 0xF8800000U +#define XPS_TOP_BUS_CFG_BASEADDR 0xF8900000U +#define XPS_SCU_PERIPH_BASE 0xF8F00000U +#define XPS_L2CC_BASEADDR 0xF8F02000U +#define XPS_SAM_RAM_BASEADDR 0xFFFC0000U +#define XPS_FPGA_AXI_S0_BASEADDR 0x40000000U +#define XPS_FPGA_AXI_S1_BASEADDR 0x80000000U +#define XPS_IOU_S_SWITCH_BASEADDR 0xE0000000U +#define XPS_PERIPH_APB_BASEADDR 0xF8000000U + +/* Shared Peripheral Interrupts (SPI) */ +#define XPS_CORE_PARITY0_INT_ID 32U +#define XPS_CORE_PARITY1_INT_ID 33U +#define XPS_L2CC_INT_ID 34U +#define XPS_OCMINTR_INT_ID 35U +#define XPS_ECC_INT_ID 36U +#define XPS_PMU0_INT_ID 37U +#define XPS_PMU1_INT_ID 38U +#define XPS_SYSMON_INT_ID 39U +#define XPS_DVC_INT_ID 40U +#define XPS_WDT_INT_ID 41U +#define XPS_TTC0_0_INT_ID 42U +#define XPS_TTC0_1_INT_ID 43U +#define XPS_TTC0_2_INT_ID 44U +#define XPS_DMA0_ABORT_INT_ID 45U +#define XPS_DMA0_INT_ID 46U +#define XPS_DMA1_INT_ID 47U +#define XPS_DMA2_INT_ID 48U +#define XPS_DMA3_INT_ID 49U +#define XPS_SMC_INT_ID 50U +#define XPS_QSPI_INT_ID 51U +#define XPS_GPIO_INT_ID 52U +#define XPS_USB0_INT_ID 53U +#define XPS_GEM0_INT_ID 54U +#define XPS_GEM0_WAKE_INT_ID 55U +#define XPS_SDIO0_INT_ID 56U +#define XPS_I2C0_INT_ID 57U +#define XPS_SPI0_INT_ID 58U +#define XPS_UART0_INT_ID 59U +#define XPS_CAN0_INT_ID 60U +#define XPS_FPGA0_INT_ID 61U +#define XPS_FPGA1_INT_ID 62U +#define XPS_FPGA2_INT_ID 63U +#define XPS_FPGA3_INT_ID 64U +#define XPS_FPGA4_INT_ID 65U +#define XPS_FPGA5_INT_ID 66U +#define XPS_FPGA6_INT_ID 67U +#define XPS_FPGA7_INT_ID 68U +#define XPS_TTC1_0_INT_ID 69U +#define XPS_TTC1_1_INT_ID 70U +#define XPS_TTC1_2_INT_ID 71U +#define XPS_DMA4_INT_ID 72U +#define XPS_DMA5_INT_ID 73U +#define XPS_DMA6_INT_ID 74U +#define XPS_DMA7_INT_ID 75U +#define XPS_USB1_INT_ID 76U +#define XPS_GEM1_INT_ID 77U +#define XPS_GEM1_WAKE_INT_ID 78U +#define XPS_SDIO1_INT_ID 79U +#define XPS_I2C1_INT_ID 80U +#define XPS_SPI1_INT_ID 81U +#define XPS_UART1_INT_ID 82U +#define XPS_CAN1_INT_ID 83U +#define XPS_FPGA8_INT_ID 84U +#define XPS_FPGA9_INT_ID 85U +#define XPS_FPGA10_INT_ID 86U +#define XPS_FPGA11_INT_ID 87U +#define XPS_FPGA12_INT_ID 88U +#define XPS_FPGA13_INT_ID 89U +#define XPS_FPGA14_INT_ID 90U +#define XPS_FPGA15_INT_ID 91U + +/* Private Peripheral Interrupts (PPI) */ +#define XPS_GLOBAL_TMR_INT_ID 27U /* SCU Global Timer interrupt */ +#define XPS_FIQ_INT_ID 28U /* FIQ from FPGA fabric */ +#define XPS_SCU_TMR_INT_ID 29U /* SCU Private Timer interrupt */ +#define XPS_SCU_WDT_INT_ID 30U /* SCU Private WDT interrupt */ +#define XPS_IRQ_INT_ID 31U /* IRQ from FPGA fabric */ + + +/* REDEFINES for TEST APP */ +/* Definitions for UART */ +#define XPAR_PS7_UART_0_INTR XPS_UART0_INT_ID +#define XPAR_PS7_UART_1_INTR XPS_UART1_INT_ID +#define XPAR_PS7_USB_0_INTR XPS_USB0_INT_ID +#define XPAR_PS7_USB_1_INTR XPS_USB1_INT_ID +#define XPAR_PS7_I2C_0_INTR XPS_I2C0_INT_ID +#define XPAR_PS7_I2C_1_INTR XPS_I2C1_INT_ID +#define XPAR_PS7_SPI_0_INTR XPS_SPI0_INT_ID +#define XPAR_PS7_SPI_1_INTR XPS_SPI1_INT_ID +#define XPAR_PS7_CAN_0_INTR XPS_CAN0_INT_ID +#define XPAR_PS7_CAN_1_INTR XPS_CAN1_INT_ID +#define XPAR_PS7_GPIO_0_INTR XPS_GPIO_INT_ID +#define XPAR_PS7_ETHERNET_0_INTR XPS_GEM0_INT_ID +#define XPAR_PS7_ETHERNET_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_PS7_ETHERNET_1_INTR XPS_GEM1_INT_ID +#define XPAR_PS7_ETHERNET_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_PS7_QSPI_0_INTR XPS_QSPI_INT_ID +#define XPAR_PS7_WDT_0_INTR XPS_WDT_INT_ID +#define XPAR_PS7_SCUWDT_0_INTR XPS_SCU_WDT_INT_ID +#define XPAR_PS7_SCUTIMER_0_INTR XPS_SCU_TMR_INT_ID +#define XPAR_PS7_XADC_0_INTR XPS_SYSMON_INT_ID +#define XPAR_PS7_TTC_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_PS7_TTC_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_PS7_TTC_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_PS7_TTC_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_PS7_TTC_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_PS7_TTC_5_INTR XPS_TTC1_2_INT_ID + +#define XPAR_XADCPS_INT_ID XPS_SYSMON_INT_ID + +/* For backwards compatibilty */ +#define XPAR_XUARTPS_0_CLOCK_HZ XPAR_XUARTPS_0_UART_CLK_FREQ_HZ +#define XPAR_XUARTPS_1_CLOCK_HZ XPAR_XUARTPS_1_UART_CLK_FREQ_HZ +#define XPAR_XTTCPS_0_CLOCK_HZ XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_1_CLOCK_HZ XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_2_CLOCK_HZ XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_3_CLOCK_HZ XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_4_CLOCK_HZ XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_5_CLOCK_HZ XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ +#define XPAR_XIICPS_0_CLOCK_HZ XPAR_XIICPS_0_I2C_CLK_FREQ_HZ +#define XPAR_XIICPS_1_CLOCK_HZ XPAR_XIICPS_1_I2C_CLK_FREQ_HZ + +#define XPAR_XQSPIPS_0_CLOCK_HZ XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ + +#define XPAR_SCUTIMER_DEVICE_ID 0U +#define XPAR_SCUWDT_DEVICE_ID 0U + + +#ifdef __cplusplus +} +#endif + +#endif /* protection macro */ diff --git a/src/APP/Aufgabe1/ps7/core0/linker/lscript.ld b/src/APP/Aufgabe1/ps7/core0/linker/lscript.ld new file mode 100644 index 0000000..a9f145a --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/linker/lscript.ld @@ -0,0 +1,291 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: */ +/* */ +/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : Cortex-A9 Linker Script */ +/* */ +/*******************************************************************/ + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000; +_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x2000; + +_ABORT_STACK_SIZE = DEFINED(_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024; +_SUPERVISOR_STACK_SIZE = DEFINED(_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048; +_IRQ_STACK_SIZE = DEFINED(_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024; +_FIQ_STACK_SIZE = DEFINED(_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024; +_UNDEF_STACK_SIZE = DEFINED(_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024; + +/* Define Memories in the system */ + +MEMORY +{ + axi_bram_ctrl_0_Mem0 : ORIGIN = 0x40000000, LENGTH = 0x2000 + ps7_ddr_0 : ORIGIN = 0x100000, LENGTH = 0x3FF00000 + ps7_qspi_linear_0 : ORIGIN = 0xFC000000, LENGTH = 0x2000000 + ps7_ram_0 : ORIGIN = 0x0, LENGTH = 0x30000 + ps7_ram_1 : ORIGIN = 0xFFFF0000, LENGTH = 0xFE00 + ps7_ddr_core_0 : ORIGIN = 0x100000, LENGTH = 0x700000 + ps7_ddr_core_1 : ORIGIN = 0x800000, LENGTH = 0x800000 +} + +/* Specify the default entry point to the program */ + +ENTRY(_vector_table) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ +.text : { + KEEP (*(.vectors)) + *(.boot) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.plt) + *(.gnu_warning) + *(.gcc_execpt_table) + *(.glue_7) + *(.glue_7t) + *(.vfp11_veneer) + *(.ARM.extab) + *(.gnu.linkonce.armextab.*) +} > ps7_ddr_core_0 + +.init : { + KEEP (*(.init)) +} > ps7_ddr_core_0 + +.fini : { + KEEP (*(.fini)) +} > ps7_ddr_core_0 + +.rodata : { + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > ps7_ddr_core_0 + +.rodata1 : { + __rodata1_start = .; + *(.rodata1) + *(.rodata1.*) + __rodata1_end = .; +} > ps7_ddr_core_0 + +.sdata2 : { + __sdata2_start = .; + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + __sdata2_end = .; +} > ps7_ddr_core_0 + +.sbss2 : { + __sbss2_start = .; + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + __sbss2_end = .; +} > ps7_ddr_core_0 + +.data : { + __data_start = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.jcr) + *(.got) + *(.got.plt) + __data_end = .; +} > ps7_ddr_core_0 + +.data1 : { + __data1_start = .; + *(.data1) + *(.data1.*) + __data1_end = .; +} > ps7_ddr_core_0 + +.got : { + *(.got) +} > ps7_ddr_core_0 + +.ctors : { + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > ps7_ddr_core_0 + +.dtors : { + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > ps7_ddr_core_0 + +.fixup : { + __fixup_start = .; + *(.fixup) + __fixup_end = .; +} > ps7_ddr_core_0 + +.eh_frame : { + *(.eh_frame) +} > ps7_ddr_core_0 + +.eh_framehdr : { + __eh_framehdr_start = .; + *(.eh_framehdr) + __eh_framehdr_end = .; +} > ps7_ddr_core_0 + +.gcc_except_table : { + *(.gcc_except_table) +} > ps7_ddr_core_0 + +.mmu_tbl (ALIGN(16384)) : { + __mmu_tbl_start = .; + *(.mmu_tbl) + __mmu_tbl_end = .; +} > ps7_ddr_core_0 + +.ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx*) + *(.gnu.linkonce.armexidix.*.*) + __exidx_end = .; +} > ps7_ddr_core_0 + +.preinit_array : { + __preinit_array_start = .; + KEEP (*(SORT(.preinit_array.*))) + KEEP (*(.preinit_array)) + __preinit_array_end = .; +} > ps7_ddr_core_0 + +.init_array : { + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; +} > ps7_ddr_core_0 + +.fini_array : { + __fini_array_start = .; + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array)) + __fini_array_end = .; +} > ps7_ddr_core_0 + +.ARM.attributes : { + __ARM.attributes_start = .; + *(.ARM.attributes) + __ARM.attributes_end = .; +} > ps7_ddr_core_0 + +.sdata : { + __sdata_start = .; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + __sdata_end = .; +} > ps7_ddr_core_0 + +.sbss (NOLOAD) : { + __sbss_start = .; + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + __sbss_end = .; +} > ps7_ddr_core_0 + +.tdata : { + __tdata_start = .; + *(.tdata) + *(.tdata.*) + *(.gnu.linkonce.td.*) + __tdata_end = .; +} > ps7_ddr_core_0 + +.tbss : { + __tbss_start = .; + *(.tbss) + *(.tbss.*) + *(.gnu.linkonce.tb.*) + __tbss_end = .; +} > ps7_ddr_core_0 + +.bss (NOLOAD) : { + __bss_start = .; + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + __bss_end = .; +} > ps7_ddr_core_0 + +_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 ); + +_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 ); + +/* Generate Stack and Heap definitions */ + +.heap (NOLOAD) : { + . = ALIGN(16); + _heap = .; + HeapBase = .; + _heap_start = .; + . += _HEAP_SIZE; + _heap_end = .; + HeapLimit = .; +} > ps7_ddr_core_0 + +.stack (NOLOAD) : { + . = ALIGN(16); + _stack_end = .; + . += _STACK_SIZE; + . = ALIGN(16); + _stack = .; + __stack = _stack; + . = ALIGN(16); + _irq_stack_end = .; + . += _IRQ_STACK_SIZE; + . = ALIGN(16); + __irq_stack = .; + _supervisor_stack_end = .; + . += _SUPERVISOR_STACK_SIZE; + . = ALIGN(16); + __supervisor_stack = .; + _abort_stack_end = .; + . += _ABORT_STACK_SIZE; + . = ALIGN(16); + __abort_stack = .; + _fiq_stack_end = .; + . += _FIQ_STACK_SIZE; + . = ALIGN(16); + __fiq_stack = .; + _undef_stack_end = .; + . += _UNDEF_STACK_SIZE; + . = ALIGN(16); + __undef_stack = .; +} > ps7_ddr_core_0 + +_end = .; +} + diff --git a/src/APP/Aufgabe1/ps7/core0/main.c b/src/APP/Aufgabe1/ps7/core0/main.c new file mode 100644 index 0000000..67a29dc --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/main.c @@ -0,0 +1,23 @@ +#include +#include +#include "ucos_uartps.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "xil_testmem.h" +#include "xil_printf.h" + +void InitDoneCallback(void * p_arg){ + (void) p_arg; + while(1){ + OSTimeDly(OS_TICK_STEP_EN * 5); + UCOS_Print("I'LL BE BACK!\r\n"); + } +} + +int main(void) { + + MMUInit(); + UCOSStartup(InitDoneCallback); + //this should never been reached + while (1); +} diff --git a/src/APP/Aufgabe1/ps7/core0/src/app_hooks.c b/src/APP/Aufgabe1/ps7/core0/src/app_hooks.c new file mode 100644 index 0000000..7db7750 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/src/app_hooks.c @@ -0,0 +1,259 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* uC/OS-II +* Application Hooks +* +* Filename : app_hooks.c +* Version : V1.00 +* Programmer(s) : FT +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +*/ + +#include + + +/* +********************************************************************************************************* +* EXTERN GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL CONSTANTS +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL DATA TYPES +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* LOCAL TABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL FUNCTION PROTOTYPES +********************************************************************************************************* +*/ + + + +/* +********************************************************************************************************** +********************************************************************************************************** +** GLOBAL FUNCTIONS +********************************************************************************************************** +********************************************************************************************************** +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +** uC/OS-II APP HOOKS +********************************************************************************************************* +********************************************************************************************************* +*/ + +#if (OS_APP_HOOKS_EN > 0) + +/* +********************************************************************************************************* +* TASK CREATION HOOK (APPLICATION) +* +* Description : This function is called when a task is created. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being created. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskCreateHook (OS_TCB *ptcb) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskCreateHook(ptcb); +#endif +} + +/* +********************************************************************************************************* +* TASK DELETION HOOK (APPLICATION) +* +* Description : This function is called when a task is deleted. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being deleted. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskDelHook (OS_TCB *ptcb) +{ + (void)ptcb; +} + +/* +********************************************************************************************************* +* IDLE TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskIdleHook(), which is called by the idle task. This hook +* has been added to allow you to do such things as STOP the CPU to conserve power. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are enabled during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 251 +void App_TaskIdleHook (void) +{ +} +#endif + +/* +********************************************************************************************************* +* STATISTIC TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskStatHook(), which is called every second by uC/OS-II's +* statistics task. This allows your application to add functionality to the statistics task. +* +* Argument(s) : none. +********************************************************************************************************* +*/ + +void App_TaskStatHook (void) +{ +} + +/* +********************************************************************************************************* +* TASK RETURN HOOK (APPLICATION) +* +* Description: This function is called if a task accidentally returns. In other words, a task should +* either be an infinite loop or delete itself when done. +* +* Arguments : ptcb is a pointer to the task control block of the task that is returning. +* +* Note(s) : none +********************************************************************************************************* +*/ + + +#if OS_VERSION >= 289 +void App_TaskReturnHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TASK SWITCH HOOK (APPLICATION) +* +* Description : This function is called when a task switch is performed. This allows you to perform other +* operations during a context switch. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are disabled during this call. +* +* (2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that +* will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the +* task being switched out (i.e. the preempted task). +********************************************************************************************************* +*/ + +#if OS_TASK_SW_HOOK_EN > 0 +void App_TaskSwHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN > 0) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskSwHook(); +#endif +} +#endif + +/* +********************************************************************************************************* +* OS_TCBInit() HOOK (APPLICATION) +* +* Description : This function is called by OSTCBInitHook(), which is called by OS_TCBInit() after setting +* up most of the TCB. +* +* Argument(s) : ptcb is a pointer to the TCB of the task being created. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 204 +void App_TCBInitHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TICK HOOK (APPLICATION) +* +* Description : This function is called every tick. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_TIME_TICK_HOOK_EN > 0 +void App_TimeTickHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TickHook(); +#endif +} +#endif +#endif diff --git a/src/APP/Aufgabe1/ps7/core0/src/uartps_cfg.c b/src/APP/Aufgabe1/ps7/core0/src/uartps_cfg.c new file mode 100644 index 0000000..dae6c62 --- /dev/null +++ b/src/APP/Aufgabe1/ps7/core0/src/uartps_cfg.c @@ -0,0 +1,17 @@ + +#include "ucos_uartps.h" +#include "xparameters.h" +#include "xparameters_ps.h" + +/* + * The uart configuration table for devices + */ +UCOS_UARTPS_Config UCOS_UARTPS_ConfigTable[] = { + { + XPAR_PS7_UART_1_DEVICE_ID, + XPAR_PS7_UART_1_BASEADDR, + XPAR_PS7_UART_1_UART_CLK_FREQ_HZ, + XPAR_PS7_UART_1_HAS_MODEM, + XPAR_PS7_UART_1_INT_SOURCE + } +}; diff --git a/src/APP/Aufgabe2/ps7/core0/build/config.mk b/src/APP/Aufgabe2/ps7/core0/build/config.mk new file mode 100644 index 0000000..abc8b89 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/build/config.mk @@ -0,0 +1,11 @@ +#µController dependent flags +MCFLAGS =-mcpu=cortex-a9 -march=armv7-a -mthumb -mthumb-interwork -mfloat-abi=softfp -mfpu=neon +#Optimization +OPTIMIZE=-O0 -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections + +#Debug Level +DEBUG =-g3 + +#Linker flags +LDFLAGS = -nostartfiles -Xlinker --gc-sections + diff --git a/src/APP/Aufgabe2/ps7/core0/build/includes.mk b/src/APP/Aufgabe2/ps7/core0/build/includes.mk new file mode 100644 index 0000000..207a8e4 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/build/includes.mk @@ -0,0 +1,29 @@ + +INC += -I"$(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/cfg/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ipi" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common" + +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/" +INC += -I"$(SRC_DIR)/Modules/MMU" + diff --git a/src/APP/Aufgabe2/ps7/core0/build/sources.mk b/src/APP/Aufgabe2/ps7/core0/build/sources.mk new file mode 100644 index 0000000..e7eb65c --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/build/sources.mk @@ -0,0 +1,38 @@ +#Startup file +SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/asm_vectors.S +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/subdir.mk +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/subdir.mk + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_osii/src/bsp/$(ARCH)/ucos_osii_bsp.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_common/src/$(ARCH)/cpu_bsp.c + +SRC += $(SRC_DIR)/Modules/MMU/mmu.c + +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/main.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/app_hooks.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/uartps_cfg.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/GNU/cpu_cache_armv7_generic_l1_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/cpu_cache_armv7_generic_l1.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/cpu_core.c + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.c + +-include $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-II/kal.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Collections/slist.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Auth/auth.c + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/subdir.mk diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/app_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/app_cfg.h new file mode 100644 index 0000000..c5426f0 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/app_cfg.h @@ -0,0 +1,82 @@ +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* This BSP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* Filename : app_cfg.h +* Version : V1.42 +* Programmer(s) : JBL +********************************************************************************************************* +*/ + +#ifndef UCOS_APP_CFG_PRESENT +#define UCOS_APP_CFG_PRESENT + +#include + +#include + +#define APP_CPU_ENABLED DEF_ENABLED + +#define APP_LIB_ENABLED DEF_ENABLED + +#define APP_COMMON_ENABLED DEF_ENABLED + +#define APP_SHELL_ENABLED DEF_DISABLED + +#define APP_CLK_ENABLED DEF_DISABLED + +#define APP_OSIII_ENABLED DEF_DISABLED + +#define APP_OSII_ENABLED DEF_ENABLED + +#define APP_TCPIP_ENABLED DEF_DISABLED + +#define APP_TCPIP_EXP_ENABLED DEF_DISABLED + +#define APP_DHCPC_ENABLED DEF_DISABLED + +#define APP_DNSC_ENABLED DEF_DISABLED + +#define APP_HTTPC_ENABLED DEF_DISABLED + +#define APP_MQTTC_ENABLED DEF_DISABLED + +#define APP_TELNETS_ENABLED DEF_DISABLED + +#define APP_IPERF_ENABLED DEF_DISABLED + +#define APP_FS_ENABLED DEF_DISABLED + +#define APP_USBD_ENABLED DEF_DISABLED + +#define APP_USBH_ENABLED DEF_DISABLED + +#define APP_OPENAMP_ENABLED DEF_DISABLED + +#define OS_TASK_TMR_PRIO 3 + + +#endif /* #ifndef UCOS_APP_CFG_PRESENT */ + diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/can_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/can_cfg.h new file mode 100644 index 0000000..ebb502c --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/can_cfg.h @@ -0,0 +1,202 @@ +/* +********************************************************************************************************* +* uC/CAN +* The Embedded CAN suite +* +* (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CAN is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* uC/CAN CONFIGURATION +* +* ZYNQ ZC7000 Series +* CAN DRIVER +* Filename : can_cfg.h +* Version : V2.41.00 +* Programmer(s) : E0 +* DC +********************************************************************************************************* +*/ + +#ifndef _CAN_CFG_H_ +#define _CAN_CFG_H_ + +#include "lib_def.h" + + +/* +********************************************************************************************************* +* COMMON DEFINES & ENUMERATIONS +********************************************************************************************************* +*/ + + /* Definiton for CANSIG_GRANULARITY, Options: */ +#define CAN_CFG_BIT 0u /* BIT */ +#define CAN_CFG_BYTE 1u /* BYTE */ + +#ifndef CAN_FALSE +#define CAN_FALSE 0u +#endif + +#ifndef CAN_TRUE +#define CAN_TRUE 1u +#endif + +#ifndef NULL_PTR +#define NULL_PTR (void *)0 +#endif + + /* ------------ APPLICATION ENUMERATIONS -------------- */ +enum { + S_NODESTATUS = 0, + S_CPULOAD, + S_COUNTER, + S_MAX, +}; + +enum { + M_STATUS = 0, + M_COMMAND, + M_MAX +}; + + +/* +********************************************************************************************************* +* MULTIPLE CAN CONTROLLERS +********************************************************************************************************* +*/ + +#define CAN_MODULE_CHANNEL_0 DEF_ENABLED +#define CAN_MODULE_CHANNEL_1 DEF_DISABLED + + +/* +********************************************************************************************************* +* DRIVER SPECIFIC DEFINES +********************************************************************************************************* +*/ + /* ---------------- BAUDRATE SETTINGS ----------------- */ +#define CAN_DEFAULT_BAUDRATE 1000000u /* Default Baudrate */ +#define CAN_DEFAULT_SP 750u /* Default Bit Sample Point in 1/10 % */ +#define CAN_DEFAULT_RJW 125u /* Default Re-Synch Jump Width in 1/10 % */ + + /* ---------------- TIMEOUT SETTINGS ------------------ */ +#define CAN_TIMEOUT_ERR_VAL 100000uL /* Timeout Value for While Loop Error Checks */ + + +/* ================================== ADVANCED DRIVER CONFIGURATION: DEFAULT VALUES ================================== */ +/* By Default, the following Driver specific settings for the ZYNQ ZC7xxx Driver are set to their default values */ +/* unless they are modified by customer needs. */ +/* */ +/* By Default, the Watermark level is configured to Maximum Watermark Value in the Driver, based on the reset value */ +/* presented by the Reference Manual. Redefine the following define to modify the Watermark Level for the following. */ +/* Tx FIFO Empty & Rx FIFO Full Watermark Level(s): */ +/* NOTE : The VALID range is between 1 & 63. */ +/* */ +/* #define CAN_WATERMARK_Rx_Tx_SIZE 63u */ +/* */ +/* By Default, the Operating Mode of the CAN controller is configured to "NORMAL" Mode. For diagnostic checking, */ +/* additional operating modes have been included in the driver. Redefine the following define to modify the Operating */ +/* Mode to either "LOOP BACK" or "SNOOP" Mode(s). */ +/* NOTE that only one operating mode can be selected at once at Initialization. Once CAN has been Initialized it */ +/* is possible to change between Operating Modes at run-time using the xxx_CAN_IoCtl() API Function call. */ +/* */ +/* #define CAN_DIAGNOSTIC_OFF 0u */ +/* #define CAN_DIAGNOSTIC_LOOPBACK 1u */ +/* #define CAN_DIAGNOSTIC_SNOOP 2u */ +/* */ +/* #define CAN_DIAGNOSTIC_SELECT CAN_DIAGNOSTIC_LOOPBACK */ +/* */ +/* ==================================================================================================================== */ + + +/* +********************************************************************************************************* +* CAN BUS +********************************************************************************************************* +*/ + +#define CANBUS_EN 1u /* Enable CAN Bus Management */ +#define CANBUS_N 3u /* Number of busses */ +#define CANBUS_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANBUS_TX_HANDLER_EN 1u /* Enable usage of CanBusTxHandler */ +#define CANBUS_RX_HANDLER_EN 1u /* Enable usage of CanBusRxHandler */ +#define CANBUS_NS_HANDLER_EN 1u /* Enable usage of CanBusNsHandler */ + +#define CANBUS_STAT_EN 1u /* Enable Bus Statistics */ +#define CANBUS_TX_QSIZE (2u * CANBUS_N) /* Transmit Queue Size in CAN Frames for each CAN Bus */ +#define CANBUS_RX_QSIZE (2u * CANBUS_N) /* Receive Queue Size in CAN Frames for each CAN Bus */ + +#define CANBUS_HOOK_NS_EN 1u /* Enable Node Status Handler Hook Function */ +#define CANBUS_HOOK_RX_EN 1u /* Enable Rx Handler Hook Function */ +#define CANBUS_RX_READ_ALWAYS_EN 1u /* If enabled the Rx Handler executes a read even.. */ + /* .. when frames can't be allocated */ + + +/* +********************************************************************************************************* +* CAN MESSAGE +********************************************************************************************************* +*/ + +#define CANMSG_EN 1u /* Enable CAN Message Support */ +#define CANMSG_N 2u /* Number of messages */ +#define CANMSG_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN SIGNAL +********************************************************************************************************* +*/ + +#define CANSIG_EN 1u /* Enable CAN Signal Database */ +#define CANSIG_N 3u /* Number of signals */ +#define CANSIG_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANSIG_MAX_WIDTH 4u /* Maximal signal width in byte */ +#define CANSIG_GRANULARITY CAN_CFG_BYTE /* Set signal resolution to byte */ +#define CANSIG_STATIC_CONFIG 1u /* To reduce memory usage, declare static signal table */ +#define CANSIG_USE_DELETE 0u /* To reduce memory usage don't use delete functions */ +#define CANSIG_CALLBACK_EN 0u /* Enable callback functions */ + + +/* +********************************************************************************************************* +* CAN FRAME +********************************************************************************************************* +*/ + +#define CANFRM_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN OS +********************************************************************************************************* +*/ + +#define CANOS_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CONFIGURATION END +********************************************************************************************************* +*/ + +#endif /* #ifndef _CAN_CFG_H_ */ diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/cpu_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/cpu_cfg.h new file mode 100644 index 0000000..b7b42d2 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/cpu_cfg.h @@ -0,0 +1,216 @@ +/* +********************************************************************************************************* +* uC/CPU +* CPU CONFIGURATION & PORT LAYER +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CPU is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CPU CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : cpu_cfg.h +* Version : V1.30.02 +* Programmer(s) : SR +* ITJ +* JBL +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef CPU_CFG_MODULE_PRESENT +#define CPU_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +* CPU NAME CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_NAME_EN to enable/disable CPU host name feature : +* +* (a) CPU host name storage +* (b) CPU host name API functions +* +* (2) Configure CPU_CFG_NAME_SIZE with the desired ASCII string size of the CPU host name, +* including the terminating NULL character. +* +* See also 'cpu_core.h GLOBAL VARIABLES Note #1'. +********************************************************************************************************* +*/ + + /* Configure CPU host name feature (see Note #1) : */ +#define CPU_CFG_NAME_EN DEF_DISABLED + /* DEF_DISABLED CPU host name DISABLED */ + /* DEF_ENABLED CPU host name ENABLED */ + + /* Configure CPU host name ASCII string size ... */ +#define CPU_CFG_NAME_SIZE 16 + + +/* +********************************************************************************************************* +* CPU TIMESTAMP CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_TS_xx_EN to enable/disable CPU timestamp features : +* +* (a) CPU_CFG_TS_32_EN enable/disable 32-bit CPU timestamp feature +* (b) CPU_CFG_TS_64_EN enable/disable 64-bit CPU timestamp feature +* +* (2) (a) Configure CPU_CFG_TS_TMR_SIZE with the CPU timestamp timer's word size : +* +* CPU_WORD_SIZE_08 8-bit word size +* CPU_WORD_SIZE_16 16-bit word size +* CPU_WORD_SIZE_32 32-bit word size +* CPU_WORD_SIZE_64 64-bit word size +* +* (b) If the size of the CPU timestamp timer is not a binary multiple of 8-bit octets +* (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple octet word +* size SHOULD be configured (e.g. to 16-bits). However, the minimum supported word +* size for CPU timestamp timers is 8-bits. +* +* See also 'cpu_core.h FUNCTION PROTOTYPES CPU_TS_TmrRd() Note #2a'. +********************************************************************************************************* +*/ + + /* Configure CPU timestamp features (see Note #1) : */ +#define CPU_CFG_TS_32_EN DEF_ENABLED +#define CPU_CFG_TS_64_EN DEF_ENABLED + /* DEF_DISABLED CPU timestamps DISABLED */ + /* DEF_ENABLED CPU timestamps ENABLED */ + + /* Configure CPU timestamp timer word size ... */ + /* ... (see Note #2) : */ +#define CPU_CFG_TS_TMR_SIZE CPU_WORD_SIZE_64 + + +/* +********************************************************************************************************* +* CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_INT_DIS_MEAS_EN to enable/disable measuring CPU's interrupts +* disabled time : +* +* (a) Enabled, if CPU_CFG_INT_DIS_MEAS_EN #define'd in 'cpu_cfg.h' +* +* (b) Disabled, if CPU_CFG_INT_DIS_MEAS_EN NOT #define'd in 'cpu_cfg.h' +* +* See also 'cpu_core.h FUNCTION PROTOTYPES Note #1'. +* +* (b) Configure CPU_CFG_INT_DIS_MEAS_OVRHD_NBR with the number of times to measure & +* average the interrupts disabled time measurements overhead. +* +* See also 'cpu_core.c CPU_IntDisMeasInit() Note #3a'. +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU interrupts disabled time ... */ +#define CPU_CFG_INT_DIS_MEAS_EN /* ... measurements feature (see Note #1a). */ +#endif + + /* Configure number of interrupts disabled overhead ... */ +#define CPU_CFG_INT_DIS_MEAS_OVRHD_NBR 1u /* ... time measurements (see Note #1b). */ + + +/* +********************************************************************************************************* +* CPU COUNT ZEROS CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT to define count leading zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +* +* (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU count leading zeros bits ... */ +#define CPU_CFG_LEAD_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1a). */ +#endif + +#if 0 /* Configure CPU count trailing zeros bits ... */ +#define CPU_CFG_TRAIL_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1b). */ +#endif + + +/* +********************************************************************************************************* +* CPU ENDIAN TYPE OVERRIDE +* +* Note(s) : (1) Configure CPU_CFG_ENDIAN_TYPE to override the default CPU endian type defined in cpu.h. +* +* (a) CPU_ENDIAN_TYPE_BIG Big- endian word order (CPU words' most significant +* octet @ lowest memory address) +* (b) CPU_ENDIAN_TYPE_LITTLE Little-endian word order (CPU words' least significant +* octet @ lowest memory address) +* +* (2) Defining CPU_CFG_ENDIAN_TYPE here is only valid for supported bi-endian architectures. +* See 'cpu.h CPU WORD CONFIGURATION Note #3' for details +********************************************************************************************************* +*/ + +#if 0 +#define CPU_CFG_ENDIAN_TYPE CPU_ENDIAN_TYPE_BIG /* Defines CPU data word-memory order (see Note #2). */ +#endif + + +/* +********************************************************************************************************* +* CACHE MANAGEMENT +* +* Note(s) : (1) Configure CPU_CFG_CACHE_MGMT_EN to enable the cache managment API. + +* +* (2) Defining CPU_CFG_CACHE_MGMT_EN to DEF_ENABLED only enable the cache management function. +* Cache are assumed to be configured and enabled by the time CPU_init() is called. +********************************************************************************************************* +*/ + +#define CPU_CFG_CACHE_MGMT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of CPU cfg module include. */ + +#define CPU_CACHE_CFG_L2C310_BASE_ADDR 0xF8F02000 diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/dhcp-c_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/dhcp-c_cfg.h new file mode 100644 index 0000000..911724f --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/dhcp-c_cfg.h @@ -0,0 +1,146 @@ +/* +********************************************************************************************************* +* uC/DHCPc +* Dynamic Host Configuration Protocol Client +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DHCP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DHCP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dhcp-c_cfg.h +* Version : V2.10.00 +* Programmer(s) : SR +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* TASKS PRIORITIES +* Notes: (1) Task priorities configuration values should be used by the DHCPc OS port. The following task priorities +* should be defined: +* +* DHCPc_OS_CFG_TASK_PRIO +* DHCPc_OS_CFG_TMR_TASK_PRIO +* +* Task priorities can be defined either in this configuration file 'dhcp-c_cfg.h' or in a global +* OS tasks priorities configuration header file which must be included in 'dhcp-c_cfg.h'. +********************************************************************************************************* +*/ + + /* See Note #1. */ +#define DHCPc_OS_CFG_TASK_PRIO 13 +#define DHCPc_OS_CFG_TMR_TASK_PRIO 14 + + +/* +********************************************************************************************************* +* STACK SIZES +* Size (depth) of the task stacks (See the definition of CPU_STK for stack width) +********************************************************************************************************* +*/ + +#define DHCPc_OS_CFG_TASK_STK_SIZE 512 +#define DHCPc_OS_CFG_TMR_TASK_STK_SIZE 256 + + +/* +********************************************************************************************************* +* DHCPc +* +* Note(s) : (1) Default port for DHCP server is 67, and default port for DHCP client is 68. +* +* (3) Configure DHCPc_CFG_MAX_NBR_IF to the maximum number of interface this DHCP client will +* be able to manage at a given time. +* +* (4) Once the DHCP server has assigned the client an address, the later may perform a final +* check prior to use this address in order to make sure it is not being used by another +* host on the network. +********************************************************************************************************* +*/ + +#define DHCPc_CFG_IP_PORT_SERVER 67 +#define DHCPc_CFG_IP_PORT_CLIENT 68 + +#define DHCPc_CFG_MAX_RX_TIMEOUT_MS 1000 + +#define DHCPc_CFG_PARAM_REQ_TBL_SIZE 5 + +#define DHCPc_CFG_MAX_NBR_IF 1 + +#define DHCPc_CFG_ADDR_VALIDATE_EN DEF_ENABLED + /* ... (see Note #4) : */ + /* DEF_DISABLED Validation NOT performed */ + /* DEF_ENABLED Validation performed */ + +#define DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN DEF_ENABLED + /* DEF_DISABLED local-link configuration DISABLED */ + /* DEF_ENABLED local-link configuration ENABLED */ + +#define DHCPc_CFG_LOCAL_LINK_MAX_RETRY 3 + /* link-local address. */ + + +/* +********************************************************************************************************* +* DHCPc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DHCPc_CFG_ARG_CHK_EXT_EN to enable/disable the DHCP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure DHCPc_CFG_ARG_CHK_DBG_EN to enable/disable the DHCP client internal debug +* argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the DHCP client. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the DHCP client. +* +* (3) Configure DHCPc_DBG_CFG_MEM_CLR_EN to enable/disable the DHCP client from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define DHCPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define DHCPc_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure memory clear feature (see Note #3) : */ +#define DHCPc_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/dns-c_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/dns-c_cfg.h new file mode 100644 index 0000000..2756762 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/dns-c_cfg.h @@ -0,0 +1,111 @@ +/* +********************************************************************************************************* +* uC/DNSc +* Domain Name Server (client) +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DNSc is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DNS CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dns-c_cfg.h +* Version : V2.00.01 +* Programmer(s) : AA +********************************************************************************************************* +*/ + +#ifndef DNSc_CFG_MODULE_PRESENT +#define DNSc_CFG_MODULE_PRESENT + +#include + + +/* +********************************************************************************************************* +* DNSc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_ARG_CHK_EXT_EN to enable/disable the DNS client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* See Note 1. */ +#define DNSc_CFG_ARG_CHK_EXT_EN DEF_DISABLED + /* DEF_DISABLED External argument check DISABLED */ + /* DEF_ENABLED External argument check ENABLED */ + +/* +********************************************************************************************************* +* DNSc FEATURES CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_MODE_ASYNC_EN to enable/disable the DNS client asynchronous communication mode: +* +* (a) When ENABLED, A dedicated task will handle all host resolution request. It will be possible to +* call DNS API to get remote host address without blocking. +* +* (b) When DISABLED, The API to get remote host will always block until the resolution is completed. +* +* (2) Configure DNSc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the asynchronous +* communication is enabled. +* +* (a) When ENABLED, It will be possible to block when calling the DNS API to get remote host until the +* resolution is completed (via a flag option). +* +* (b) When DISABLED, The API to get remote host will always be non-blocking, must poll DNS client to +* know when the resolution is completed. +********************************************************************************************************* +*/ + + /* Configure asynchronous mode feature, See Note #1 ... */ +#define DNSc_CFG_MODE_ASYNC_EN DEF_DISABLED + /* DEF_DISABLED Asynchronous mode DISABLED */ + /* DEF_ENABLED Asynchronous mode ENABLED */ + + + /* Configure blocking option feature, See Note #2 ... */ +#define DNSc_CFG_MODE_BLOCK_EN DEF_DISABLED + /* DEF_DISABLED Blocking option DISABLED */ + /* DEF_ENABLED Blocking option ENABLED */ + +/* +********************************************************************************************************* +* DNSc RUN-TIME STRUCTURE CONFIGURATION +* +* Note(s) : (1) These structures should be defined into a 'C' file. +********************************************************************************************************* +*/ + +extern const DNSc_CFG DNSc_Cfg; /* Must always be defined. */ + +#if (DNSc_CFG_MODE_ASYNC_EN == DEF_ENABLED) +extern const DNSc_CFG_TASK DNSc_CfgTask; /* Not required when Asynchronous mode is disabled. */ +#endif + +#endif diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/http-c_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/http-c_cfg.h new file mode 100644 index 0000000..26df728 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/http-c_cfg.h @@ -0,0 +1,224 @@ +/* +********************************************************************************************************* +* uC/HTTP +* Hypertext Transfer Protocol +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/HTTP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* HTTP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : http-c_cfg.h +* Version : V3.00.01 +* Programmer(s) : MM +* AL +********************************************************************************************************* +* Note(s) : (1) Assumes the following versions (or more recent) of software modules are included in +* the project build : +* +* (a) uC/CPU V1.29.02 +* (b) uC/LIB V1.38.00 +* (c) uC/Common V1.00.00 +* (d) uC/TCP-IP V3.03.00 +* +* +* (2) For additional details on the features available with uC/HTTPc, the API, the +* installation, etc. Please refer to the uC/HTTPc documentation available at +* https://doc.micrium.com/HTTPc. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef HTTPc_CFG_MODULE_PRESENT +#define HTTPc_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* COMPILE-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* HTTP ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_ARG_CHK_EXT_EN to enable/disable the HTTP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT TASK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_MODE_ASYNC_TASK_EN to enable/disable HTTP client task. +* (a) DEF_DISABLED : No HTTP client task will be created to process the HTTP requests. +* The Blocking HTTPc API will be enabled. +* +* (b) DEF_ENABLED : An HTTP client task will be created to process all the HTTP requests. +* The Non-Blocking HTTPc API will be enabled. Therefore, multiple +* connections can be handle by the task simultaneously. +* +* (2) Configure HTTPc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the +* asynchronous HTTPc Task is enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_MODE_ASYNC_TASK_EN DEF_DISABLED + +#define HTTPc_CFG_MODE_BLOCK_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT PERSISTENT CONNECTION CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_PERSISTENT_EN to enable/disable Persistent Connection support. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_PERSISTENT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT CHUNKED TRANSFER CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_CHUNK_TX_EN to enable/disable Chunked Transfer support in Transmission. +* +* (2) Chunked Transfer in Reception is always enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_CHUNK_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT QUERY STRING CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_QUERY_STR_EN to enable/disable Query String support in URL. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_QUERY_STR_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT HEADER FIELD CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_HDR_RX_EN to enable/disable header field processing in reception +* (i.e for headers received in the HTTP response. +* +* (2) Configure HTTPc_CFG_HDR_TX_EN to enable/disable header field processing in transmission +* (i.e for headers to include in the HTTP request. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_HDR_RX_EN DEF_ENABLED + + +#define HTTPc_CFG_HDR_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT FORM CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_FORM_EN to enable/disable HTTP form creation source code. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_FORM_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT USER DATA CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_USER_DATA_EN to enable/disable user data pointer in HTTPc_CONN +* and HTTPc_REQ structure. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_USER_DATA_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT WEBSOCKET CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_WEBSOCKET_EN to enable/disable the Websocket feature. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_WEBSOCKET_EN DEF_DISABLED + + +/* +********************************************************************************************************* +********************************************************************************************************* +* RUN-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const HTTP_TASK_CFG HTTPc_TaskCfg; +extern const HTTPc_CFG HTTPc_Cfg; + + +/* =============================================== END =============================================== */ +#endif /* HTTPc_CFG_MODULE_PRESENT */ diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/lib_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/lib_cfg.h new file mode 100644 index 0000000..cf447ea --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/lib_cfg.h @@ -0,0 +1,171 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find information about uC/LIB by visiting doc.micrium.com. +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CUSTOM LIBRARY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : lib_cfg.h +* Version : V1.38.01.00 +* Programmer(s) : FBJ +* JFD +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef LIB_CFG_MODULE_PRESENT +#define LIB_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MEMORY LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* MEMORY LIBRARY ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_ARG_CHK_EXT_EN to enable/disable the memory library suite external +* argument check feature : +* +* (a) When ENABLED, arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +********************************************************************************************************* +*/ + + /* External argument check. */ + /* Indicates if arguments received from any port ... */ + /* ... interface provided by the developer or ... */ + /* ... application are checked/validated. */ +#define LIB_MEM_CFG_ARG_CHK_EXT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY LIBRARY ASSEMBLY OPTIMIZATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_OPTIMIZE_ASM_EN to enable/disable assembly-optimized memory function(s). +********************************************************************************************************* +*/ + + /* Assembly-optimized function(s). */ + /* Enable/disable assembly-optimized memory ... */ + /* ... function(s). [see Note #1] */ +#define LIB_MEM_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY ALLOCATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_DBG_INFO_EN to enable/disable memory allocation usage tracking +* that associates a name with each segment or dynamic pool allocated. +* +* (2) (a) Configure LIB_MEM_CFG_HEAP_SIZE with the desired size of heap memory (in octets). +* +* (b) Configure LIB_MEM_CFG_HEAP_BASE_ADDR to specify a base address for heap memory : +* +* (1) Heap initialized to specified application memory, if LIB_MEM_CFG_HEAP_BASE_ADDR +* #define'd in 'lib_cfg.h'; +* CANNOT #define to address 0x0 +* +* (2) Heap declared to Mem_Heap[] in 'lib_mem.c', if LIB_MEM_CFG_HEAP_BASE_ADDR +* NOT #define'd in 'lib_cfg.h' +********************************************************************************************************* +*/ + + /* Allocation debugging information. */ + /* Enable/disable allocation of debug information ... */ + /* ... associated to each memory allocation. */ +#define LIB_MEM_CFG_DBG_INFO_EN DEF_DISABLED + + + /* Heap memory size (in bytes). */ + /* Configure the desired size of the heap memory. ... */ + /* ... Set to 0 to disable heap allocation features. */ +#define LIB_MEM_CFG_HEAP_SIZE 64*1024 + + + /* Heap memory padding alignment (in bytes). */ + /* Configure the desired size of padding alignment ... */ + /* ... of each buffer allocated from the heap. */ +#define LIB_MEM_CFG_HEAP_PADDING_ALIGN LIB_MEM_PADDING_ALIGN_NONE + +#if 0 /* Remove this to have heap alloc at specified addr. */ +#define LIB_MEM_CFG_HEAP_BASE_ADDR 0 +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* STRING LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* STRING FLOATING POINT CONFIGURATION +* +* Note(s) : (1) Configure LIB_STR_CFG_FP_EN to enable/disable floating point string function(s). +* +* (2) Configure LIB_STR_CFG_FP_MAX_NBR_DIG_SIG to configure the maximum number of significant +* digits to calculate &/or display for floating point string function(s). +* +* See also 'lib_str.h STRING FLOATING POINT DEFINES Note #1'. +********************************************************************************************************* +*/ + + /* Floating point feature(s). */ + /* Enable/disable floating point to string functions. */ +#define LIB_STR_CFG_FP_EN DEF_DISABLED + + + /* Floating point number of significant digits. */ + /* Configure the maximum number of significant ... */ + /* ... digits to calculate &/or display for ... */ + /* ... floating point string function(s). */ +#define LIB_STR_CFG_FP_MAX_NBR_DIG_SIG LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of lib cfg module include. */ + diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/mmu_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/mmu_cfg.h new file mode 100644 index 0000000..4dda478 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/mmu_cfg.h @@ -0,0 +1,42 @@ +/* + * mmu_cfg.h + * + * Created on: 25.04.2018 + * Author: kaige + */ + +#ifndef SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ +#define SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ + +#include "mmu.h" + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief FIRST LEVEL TRANSLATION TABLE (FTT) +* +* \ingroup PAR_CPU_MMU +* +* This variable represents the first level translation table. Each entry within +* the table represents the configuration of a 1MB memory segment. If a memory +* portion below 1MB must be accessed, the entry represents a pointer to the +* linked coarse page table, which contains the information of that 1MB in detail. +* +* \note This table MUST be aligned at 16kB boundary. +*/ +/*------------------------------------------------------------------------------------------------*/ + +const PAR_MEM_REGION_T PARMemTbl_Core[] = { +/* +-------------------------------------------------------------------------------------------+ +* | virtual | physical | size | owner | permissions | HID Field | +* +-----------+-----------+---------------+------------------+-----------------+--------------+*/ + // First 1MB is marked as non-cacheable/non-bufferable (contains 3x 64KB SRAM @ address 0x00000000 + { 0x00000000, 0x00000000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER_CB | PAR_HID_CACHE_OUTER_CB }, + // DDR Memory is marked as normal (only 512MB for now) + { 0x00100000, 0x00100000, MMU_SIZE_16MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER___ | PAR_HID_CACHE_OUTER___ }, + // Device section + { 0xE0000000, 0xE0000000, MMU_SIZE_512MB-MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_EXCLUSIVE_SYS_DEVICE }, + // Upper 1MB section contains 1x 64KB SRAM @ address 0xFFFF0000 + { 0xFFF00000, 0xFFF00000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_OUT_IN_NON_CACHABLE } +}; + +#endif /* SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ */ diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/net_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/net_cfg.h new file mode 100644 index 0000000..ee42e1f --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/net_cfg.h @@ -0,0 +1,676 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_cfg.h +* Version : V3.03.01 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_CFG_MODULE_PRESENT +#define NET_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK EXTERNAL APPLICATION CONFIGURATION +* +* Note(s) : (1) When uC/DNS-Client is present in the project some high level functions can resolve hostname. +* So uC/TCPIP should know that uC/DNS-Client is present to call the proper API. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure DNS Client feature (see Note #1) : */ +#define NET_EXT_MODULE_CFG_DNS_EN DEF_ENABLED + /* DEF_DISABLED DNS Client is DISABLED */ + /* DEF_ENABLED DNS Client is ENABLED */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS CONFIGURATION +* +* Note(s) : (1) (a) Each network task maps to a unique, developer-configured task configuration that +* MUST be defined in application files, typically 'net_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to Net_Init(). +* +* (b) Since these task configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const NET_TASK_CFG NetRxTaskCfg; +extern const NET_TASK_CFG NetTxDeallocTaskCfg; +extern const NET_TASK_CFG NetTmrTaskCfg; + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS Q CONFIGURATION +* +* Note(s) : (1) Rx queue size should be configured such that it reflects the total number of DMA receive descriptors on all +* devices. If DMA is not available, or a combination of DMA and I/O based interfaces are configured then this +* number reflects the maximum number of packets that can be acknowledged and signalled during a single receive +* interrupt event for all interfaces. +* +* (2) Tx queue size should be defined to be the total number of small and large transmit buffers declared for +* all interfaces. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_CFG_IF_RX_Q_SIZE 100 +#define NET_CFG_IF_TX_DEALLOC_Q_SIZE 100 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK CONFIGURATION +* +* Note(s) : (1) uC/TCP-IP code may call optimized assembly functions. Optimized assembly files/functions must be included +* in the project to be enabled. Optimized functions are located in files under folders: +* +* $uC-TCPIP/Ports// +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network protocol suite's assembly ... */ + /* ... optimization (see Note #1) : */ +#define NET_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + /* DEF_DISABLED Assembly optimization DISABLED */ + /* DEF_ENABLED Assembly optimization ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEBUG CONFIGURATION +* +* Note(s) : (1) Configure NET_DBG_CFG_MEM_CLR_EN to enable/disable the network protocol suite from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure memory clear feature (see Note #1) : */ +#define NET_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure NET_ERR_CFG_ARG_CHK_EXT_EN to enable/disable the network protocol suite external +* argument check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure NET_ERR_CFG_ARG_CHK_DBG_EN to enable/disable the network protocol suite internal, +* debug argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the network protocol +* suite. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the network protocol +* suite. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define NET_ERR_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define NET_ERR_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK COUNTER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_CTR_CFG_STAT_EN to enable/disable network protocol suite statistics counters. +* +* (2) Configure NET_CTR_CFG_ERR_EN to enable/disable network protocol suite error counters. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure statistics counter feature (see Note #1) : */ +#define NET_CTR_CFG_STAT_EN DEF_DISABLED + /* DEF_DISABLED Stat counters DISABLED */ + /* DEF_ENABLED Stat counters ENABLED */ + + /* Configure error counter feature (see Note #2) : */ +#define NET_CTR_CFG_ERR_EN DEF_DISABLED + /* DEF_DISABLED Error counters DISABLED */ + /* DEF_ENABLED Error counters ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK TIMER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_TMR_CFG_NBR_TMR with the desired number of network TIMER objects. +* +* Timers are required for : +* +* (a) ARP & NDP cache entries +* (b) IP fragment reassembly +* (c) TCP state machine connections +* (d) IF Link status check-up +* +* (2) Configure NET_TMR_CFG_TASK_FREQ to schedule the execution frequency of the network timer +* task -- how often NetTmr_TaskHandler() is scheduled to run per second as implemented in +* NetTmr_Task(). +* +* (a) NET_TMR_CFG_TASK_FREQ MUST NOT be configured as a floating-point frequency. +* +* See also 'net_tmr.h NETWORK TIMER TASK TIME DEFINES Notes #1 & #2' +* & 'net_tmr.c NetTmr_Task() Notes #1 & #2'. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_TMR_CFG_NBR_TMR 100 +#define NET_TMR_CFG_TASK_FREQ 10 + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK INTERFACE LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_IF_CFG_MAX_NBR_IF 1 + + /* Configure specific interface(s) : */ +#define NET_IF_CFG_LOOPBACK_EN DEF_DISABLED + +#define NET_IF_CFG_ETHER_EN DEF_ENABLED + +#define NET_IF_CFG_WIFI_EN DEF_DISABLED + /* DEF_DISABLED Interface type DISABLED */ + /* DEF_ENABLED interface type ENABLED */ + +#define NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* ADDRESS RESOLUTION PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Address resolution protocol ONLY required for IPv4. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_ARP_CFG_CACHE_NBR 3 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NEIGHBOR DISCOVERY PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Neighbor Discovery Protocol ONLY required for IPv6. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_NDP_CFG_CACHE_NBR 5 +#define NET_NDP_CFG_DEST_NBR 5 +#define NET_NDP_CFG_PREFIX_NBR 5 +#define NET_NDP_CFG_ROUTER_NBR 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET PROTOCOL LAYER VERSION CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* IPv4 +********************************************************************************************************* +*/ + /* Configure IPv4. */ +#define NET_IPv4_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv4 disabled. */ + /* DEF_ENABLED IPv4 enabled. */ + + +#define NET_IPv4_CFG_IF_MAX_NBR_ADDR 1 + +/* +********************************************************************************************************* +* IPv6 +********************************************************************************************************* +*/ + + /* Configure IPv6. */ +#define NET_IPv6_CFG_EN DEF_DISABLED + /* DEF_DISABLED IPv6 disabled. */ + /* DEF_ENABLED IPv6 enabled. */ + + /* Configure IPv6 Stateless Address Auto-Configuration. */ +#define NET_IPv6_CFG_ADDR_AUTO_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv6 Auto-Cfg disabled. */ + /* DEF_ENABLED IPv6 Auto-Cfg enabled. */ + + /* Configure IPv6 Duplication Address Detection (DAD). */ +#define NET_IPv6_CFG_DAD_EN DEF_ENABLED + /* DEF_DISABLED IPv6 DAD disabled. */ + /* DEF_ENABLED IPv6 DAD enabled. */ + +#define NET_IPv6_CFG_IF_MAX_NBR_ADDR 2 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET GROUP MANAGEMENT PROTOCOL(MULTICAST) LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure IPv4 multicast support : */ +#define NET_MCAST_CFG_IPv4_RX_EN DEF_ENABLED +#define NET_MCAST_CFG_IPv4_TX_EN DEF_ENABLED + /* DEF_DISABLED Multicast rx or tx disabled. */ + /* DEF_ENABLED Multicast rx or tx enabled. */ + +#define NET_MCAST_CFG_HOST_GRP_NBR_MAX 2 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SOCKET LAYER CONFIGURATION +* +* Note(s) : (1) The maximum accept queue size represents the number of connection that can be queued by +* the stack before being accepted. For a TCP server when a connection is queued, it means +* that the SYN, ACK packet has been sent back, so the remote host can start transmitting +* data once the connection is queued and the stack will queue up all data received until +* the connection is accepted and the data is read. +* +* (2) Receive and transmit queue size MUST be properly configured to optimize performance. +* +* (a) It represents the number of bytes that can be queued by one socket. It's important +* that all socket are not able to queue more data than what the device can hold in its +* buffers. +* +* (b) The size should be also a multiple of the maximum segment size (MSS) to optimize +* performance. UDP MSS is 1470 and TCP MSS is 1460. +* +* (c) RX and TX queue size can be reduce at runtime using socket option API. +* +* (d) Window calculation example: +* +* Number of TCP connection : 2 +* Number of UDP connection : 0 +* Number of RX large buffer : 10 +* Number of TX Large buffer : 6 +* Number of TX small buffer : 2 +* Size of RX large buffer : 1518 +* Size of TX large buffer : 1518 +* Size of TX small buffer : 60 +* +* TCP MSS RX = 1460 +* TCP MSS TX large buffer = 1460 +* TCP MSS TX small buffer = 0 +* +* Maximum receive window = (10 * 1460) = 14600 bytes +* Maximum transmit window = (6 * 1460) + (2 * 0) = 8760 bytes +* +* RX window size per socket = (14600 / 2) = 7300 bytes +* TX window size per socket = (8760 / 2) = 4380 bytes +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_SOCK_CFG_SOCK_NBR_TCP 2 +#define NET_SOCK_CFG_SOCK_NBR_UDP 1 + + /* Configure socket select functionality : */ +#define NET_SOCK_CFG_SEL_EN DEF_ENABLED + /* DEF_DISABLED Socket select DISABLED */ + /* DEF_ENABLED Socket select ENABLED */ + + /* Configure stream-type sockets' accept queue */ +#define NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX 2 + + + /* Configure sockets' buffer sizes in number of octets */ + /* (see Note #2): */ +#define NET_SOCK_CFG_RX_Q_SIZE_OCTET 4096 +#define NET_SOCK_CFG_TX_Q_SIZE_OCTET 4096 + + +/* ================================== ADVANCED SOCKET CONFIGURATION: DEFAULT VALUES ================================== */ +/* By default sockets are set to block. Add the following define to set all sockets as non-blocking. Note that it's */ +/* possible to change socket's blocking mode at runtime using socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_NO_BLOCK_EN DEF_ENABLED */ +/* */ +/* By default random port start at 65000, redefine the following define to modify where random port start: */ +/* */ +/* #define NET_SOCK_DFLT_PORT_NBR_RANDOM_BASE 65000u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeouts. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_TIMEOUT_RX_Q_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS 10000u */ +/* ==================================================================================================================== */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TRANSMISSION CONTROL PROTOCOL LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure TCP support : */ +#define NET_TCP_CFG_EN DEF_ENABLED + /* DEF_DISABLED TCP layer DISABLED */ + /* DEF_ENABLED TCP layer ENABLED */ + +/* ========================================= ADVANCED TCP LAYER CONFIGURATION ========================================= */ +/* By default TCP RX and TX windows are set to equal the socket RX and TX queue sizes. Default values can be changed by */ +/* redefining the following defines. TCP windows must be properly configured to optimize performance (see note about */ +/* Socket TX and RX windows). Note that it's possible to decrease window size at run time using Socket option API. */ +/* */ +/* #define NET_TCP_DFLT_RX_WIN_SIZE_OCTET NET_SOCK_CFG_RX_Q_SIZE_OCTET */ +/* #define NET_TCP_DFLT_TX_WIN_SIZE_OCTET NET_SOCK_CFG_TX_Q_SIZE_OCTET */ +/* */ +/* As shown in the TCP state diagram (see RFC #793), before moving from 'TIME-WAIT' state to 'CLOSED' state a timeout */ +/* (2MSL) must expire. This means that the TCP connection cannot be made available for subsequent TCP connections until */ +/* this timeout. It can be a problem for embedded systems with low resources especially when many TCP connections are */ +/* made in a small period of time since it is possible to run out of free TCP connections quickly. Therefore this */ +/* timeout is set to 0 by default to avoid this kind of problem and the connection is made available as soon as the */ +/* 'TIME-WAIT' state is reached. However, it's possible to set the default MSL timeout to something else by redefining */ +/* the following define. Note that it is possible to change the MSL timeout for a specific TCP connection using Socket */ +/* option API. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC 0u */ +/* */ +/* To avoid leaving a connection in the FIN_WAIT_2 state forever when a connection moves from the 'FIN_WAIT_1' state to */ +/* the FIN_WAIT_2, the TCP connection's timer is set to 15 second, and when it expires the connection is dropped. Thus, */ +/* if the other host doesn't response to the close request, the connection will still be closed after the timeout. */ +/* This default timeout can be change by redefining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC 15u */ +/* */ +/* The number of TCP connections is configured following the number of TCP sockets and the accept queue size when the */ +/* MSL is set to 0 ms. However, since the default MSL can be modified, it might be needed to increase the number of TCP */ +/* connections to establish more connections when waiting for the MSL expiration. It is possible to add more TCP */ +/* connections by defining the following define. */ +/* */ +/* #define NET_TCP_CFG_NBR_CONN 0u */ +/* */ +/* By default an 'ACK' is generated within 500 ms of the arrival of the first unacknowledged packet, as specified in */ +/* RFC #2581, Section 4.2. However it's possible to modify this value by defining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS 500u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeout. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS 1000u */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS 1000u */ +/* ==================================================================================================================== */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* USER DATAGRAM PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Configure NET_UDP_CFG_APP_API_SEL with the desired configuration for demultiplexing +* UDP datagrams to application connections : +* +* NET_UDP_APP_API_SEL_SOCK Demultiplex UDP datagrams to BSD sockets ONLY. +* NET_UDP_APP_API_SEL_APP Demultiplex UDP datagrams to application-specific +* connections ONLY. +* NET_UDP_APP_API_SEL_SOCK_APP Demultiplex UDP datagrams to BSD sockets first; +* if NO socket connection found to demultiplex +* a UDP datagram, demultiplex to application- +* specific connection. +* +* See also 'net_udp.c NetUDP_RxPktDemuxDatagram() Note #1' +* & 'net_udp.c NetUDP_RxPktDemuxAppData() Note #1'. +* +* (2) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally ... discard +* ... [or allow] ... received ... UDP datagrams without checksums". +* +* (b) Configure NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN to enable/disable discarding of UDP +* datagrams received with NO computed check-sum : +* +* (1) When ENABLED, ALL UDP datagrams received without a check-sum are discarded. +* +* (2) When DISABLED, ALL UDP datagrams received without a check-sum are flagged so +* that application(s) may handle &/or discard. +* +* See also 'net_udp.c NetUDP_RxPktValidate() Note #4d3A'. +* +* (3) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally be able to +* control whether a UDP checksum will be generated". +* +* (b) Configure NET_UDP_CFG_TX_CHK_SUM_EN to enable/disable transmitting UDP datagrams +* with check-sums : +* +* (1) When ENABLED, ALL UDP datagrams are transmitted with a computed check-sum. +* +* (2) When DISABLED, ALL UDP datagrams are transmitted without a computed check-sum. +* +* See also 'net_udp.c NetUDP_TxPktPrepareHdr() Note #3b'. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure UDP Receive Check-Sum Discard feature ... */ + /* ... (see Note #2b) : */ +#define NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN DEF_DISABLED + /* DEF_DISABLED UDP Check-Sums Received without ... */ + /* Check-Sums Validated */ + /* DEF_ENABLED UDP Datagrams Received without ... */ + /* Check-Sums Discarded */ + + /* Configure UDP Transmit Check-Sum feature ... */ + /* ... (see Note #3b) : */ +#define NET_UDP_CFG_TX_CHK_SUM_EN DEF_DISABLED + /* DEF_DISABLED Transmit Check-Sums DISABLED */ + /* DEF_ENABLED Transmit Check-Sums ENABLED */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SECURITY MANAGER CONFIGURATION +* +* Note(s): (1) The network security layer can be enabled ONLY if the application project contains a secure module +* supported by uC/TCPIP such as: +* +* (a) NanoSSL provided by Mocana. +* (b) CyaSSL provided by YaSSL. +* +* (2) The network security port must be also added to the project. Security port can be found under the folder: +* +* $uC-TCPIP/Secure/ +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network security layer (See Note #1 & #2): */ +#define NET_SECURE_CFG_EN DEF_DISABLED + /* DEF_DISABLED Security layer DISABLED */ + /* DEF_ENABLED Security layer ENABLED */ + +#define NET_SECURE_CFG_MAX_NBR_SOCK_SERVER 2u /* Configure total number of server secure sockets. */ +#define NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT 2u /* Configure total number of client secure sockets. */ + +#define NET_SECURE_CFG_MAX_CERT_LEN 1500u /* Configure servers certificate maximum length (bytes) */ +#define NET_SECURE_CFG_MAX_KEY_LEN 1500u /* Configure servers key maximum length (bytes) */ + + /* Configure maximum number of certificate authorities */ +#define NET_SECURE_CFG_MAX_NBR_CA 1u /* that can be installed. */ + +#define NET_SECURE_CFG_MAX_CA_CERT_LEN 1500u /* Configure CA certificate maximum length (bytes) */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERFACE CHECKSUM OFFLOAD CONFIGURATION +* +* Note(s): (1) These configuration can be enabled only if all your interfaces support specific checksum offload +* option. +* +* (2) By default a driver should enabled the all checksum offload option. +********************************************************************************************************* +********************************************************************************************************* +*/ +/* ========================================== ADVANCED OFFLOAD CONFIGURATION ========================================== */ +/* By default all checksum are validated by the stack however it is possible to enable or disable specific checksum */ +/* validate and calculation if the interface controller is able to achieve it. You can add the following define in this */ +/* file to change the default behavior. */ +/* */ +/* -------------------------------------------------- IPv4 CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* -------------------------------------------------- ICMP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- UDP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- TCP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* ==================================================================================================================== */ + + +/* ======================================================= END ======================================================== */ +#endif /* NET_CFG_MODULE_PRESENT */ + +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h new file mode 100644 index 0000000..b4886a6 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h @@ -0,0 +1,115 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK DEVICE CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_dev_cfg.h +* Version : V3.00.00 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +* +* Note(s) : (1) This network device configuration header file is protected from multiple pre-processor +* inclusion through use of the network module present pre-processor macro definition. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_DEV_CFG_MODULE_PRESENT /* See Note #1. */ +#define NET_DEV_CFG_MODULE_PRESENT + +#include + +#ifdef NET_IF_ETHER_MODULE_EN +#include +#endif + +#ifdef NET_IF_WIFI_MODULE_EN +#include +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEVICE CONFIGURATION +* +* Note(s) : (1) (a) Each network device maps to a unique, developer-configured device configuration that +* MUST be defined in application files, typically 'net_dev_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to NetIF_Add(). +* +* (b) Since these device configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. However, +* the following naming convention is suggested for all developer-configured network +* device configuration structures : +* +* NetDev_Cfg_[_Number] +* +* where +* Name of device or device driver +* [Number] Network device number for each specific instance of +* device (optional if the development board does NOT +* support multiple instances of the specific device) +* +* Examples : +* +* NET_DEV_CFG_ETHER NetDev_Cfg_MACB; Ethernet configuration for MACB +* +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_0; Ethernet configuration for FEC #0 +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_1; Ethernet configuration for FEC #1 +* +* NET_DEV_CFG_WIFI NetDev_Cfg_RS9110N21_0; Wireless configuration for RS9110-N-21 +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifdef NET_IF_ETHER_MODULE_EN + +extern NET_DEV_CFG_ETHER NetDev_AXIEthernetLite_0; +extern NET_PHY_CFG_ETHER NetPhy_Cfg_Ether_0; + +#endif /* NET_IF_ETHER_MODULE_EN */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +********************************************************************************************************* +*/ + +#endif /* NET_DEV_CFG_MODULE_PRESENT */ + diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/os_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/os_cfg.h new file mode 100644 index 0000000..7fdd193 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/os_cfg.h @@ -0,0 +1,145 @@ +/* +********************************************************************************************************* +* uC/OS-II +* The Real-Time Kernel +* uC/OS-II Configuration File for V2.9x +* +* (c) Copyright 2005-2014, Micrium, Weston, FL +* All Rights Reserved +* +* +* File : OS_CFG.H +* By : Jean J. Labrosse +* Version : V2.92.11 +* +* LICENSING TERMS: +* --------------- +* uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research. +* If you plan on using uC/OS-II in a commercial product you need to contact Micrium to properly license +* its use in your product. We provide ALL the source code for your convenience and to help you experience +* uC/OS-II. The fact that the source is provided does NOT mean that you can use it without paying a +* licensing fee. +********************************************************************************************************* +*/ + +#ifndef OS_CFG_H +#define OS_CFG_H + + + /* ---------------------- MISCELLANEOUS ----------------------- */ +#define OS_APP_HOOKS_EN 1u /* Application-defined hooks are called from the uC/OS-II hooks */ +#define OS_ARG_CHK_EN 0u /* Enable (1) or Disable (0) argument checking */ +#define OS_CPU_HOOKS_EN 1u /* uC/OS-II hooks are found in the processor port files */ + +#define OS_DEBUG_EN 1u /* Enable(1) debug variables */ + +#define OS_EVENT_MULTI_EN 1u /* Include code for OSEventPendMulti() */ +#define OS_EVENT_NAME_EN 1u /* Enable names for Sem, Mutex, Mbox and Q */ + +#define OS_LOWEST_PRIO 63u /* Defines the lowest priority that can be assigned ... */ + /* ... MUST NEVER be higher than 254! */ + +#define OS_MAX_EVENTS 20u /* Max. number of event control blocks in your application */ +#define OS_MAX_FLAGS 5u /* Max. number of Event Flag Groups in your application */ +#define OS_MAX_MEM_PART 5u /* Max. number of memory partitions */ +#define OS_MAX_QS 6u /* Max. number of queue control blocks in your application */ +#define OS_MAX_TASKS 20u /* Max. number of tasks in your application, MUST be >= 2 */ + +#define OS_SCHED_LOCK_EN 1u /* Include code for OSSchedLock() and OSSchedUnlock() */ + +#define OS_TICK_STEP_EN 1u /* Enable tick stepping feature for uC/OS-View */ +#define OS_TICKS_PER_SEC 1000u /* Set the number of ticks in one second */ + +#define OS_TLS_TBL_SIZE 0u /* Size of Thread-Local Storage Table */ + + + /* --------------------- TASK STACK SIZE ---------------------- */ +#define OS_TASK_TMR_STK_SIZE 128u /* Timer task stack size (# of OS_STK wide entries) */ +#define OS_TASK_STAT_STK_SIZE 128u /* Statistics task stack size (# of OS_STK wide entries) */ +#define OS_TASK_IDLE_STK_SIZE 128u /* Idle task stack size (# of OS_STK wide entries) */ + + + /* --------------------- TASK MANAGEMENT ---------------------- */ +#define OS_TASK_CHANGE_PRIO_EN 1u /* Include code for OSTaskChangePrio() */ +#define OS_TASK_CREATE_EN 1u /* Include code for OSTaskCreate() */ +#define OS_TASK_CREATE_EXT_EN 1u /* Include code for OSTaskCreateExt() */ +#define OS_TASK_DEL_EN 1u /* Include code for OSTaskDel() */ +#define OS_TASK_NAME_EN 1u /* Enable task names */ +#define OS_TASK_PROFILE_EN 1u /* Include variables in OS_TCB for profiling */ +#define OS_TASK_QUERY_EN 1u /* Include code for OSTaskQuery() */ +#define OS_TASK_REG_TBL_SIZE 1u /* Size of task variables array (#of INT32U entries) */ +#define OS_TASK_STAT_EN 1u /* Enable (1) or Disable(0) the statistics task */ +#define OS_TASK_STAT_STK_CHK_EN 1u /* Check task stacks from statistic task */ +#define OS_TASK_SUSPEND_EN 1u /* Include code for OSTaskSuspend() and OSTaskResume() */ +#define OS_TASK_SW_HOOK_EN 1u /* Include code for OSTaskSwHook() */ + + + /* ----------------------- EVENT FLAGS ------------------------ */ +#define OS_FLAG_EN 1u /* Enable (1) or Disable (0) code generation for EVENT FLAGS */ +#define OS_FLAG_ACCEPT_EN 1u /* Include code for OSFlagAccept() */ +#define OS_FLAG_DEL_EN 1u /* Include code for OSFlagDel() */ +#define OS_FLAG_NAME_EN 1u /* Enable names for event flag group */ +#define OS_FLAG_QUERY_EN 1u /* Include code for OSFlagQuery() */ +#define OS_FLAG_WAIT_CLR_EN 1u /* Include code for Wait on Clear EVENT FLAGS */ +#define OS_FLAGS_NBITS 16u /* Size in #bits of OS_FLAGS data type (8, 16 or 32) */ + + + /* -------------------- MESSAGE MAILBOXES --------------------- */ +#define OS_MBOX_EN 1u /* Enable (1) or Disable (0) code generation for MAILBOXES */ +#define OS_MBOX_ACCEPT_EN 1u /* Include code for OSMboxAccept() */ +#define OS_MBOX_DEL_EN 1u /* Include code for OSMboxDel() */ +#define OS_MBOX_PEND_ABORT_EN 1u /* Include code for OSMboxPendAbort() */ +#define OS_MBOX_POST_EN 1u /* Include code for OSMboxPost() */ +#define OS_MBOX_POST_OPT_EN 1u /* Include code for OSMboxPostOpt() */ +#define OS_MBOX_QUERY_EN 1u /* Include code for OSMboxQuery() */ + + + /* --------------------- MEMORY MANAGEMENT -------------------- */ +#define OS_MEM_EN 1u /* Enable (1) or Disable (0) code generation for MEMORY MANAGER */ +#define OS_MEM_NAME_EN 1u /* Enable memory partition names */ +#define OS_MEM_QUERY_EN 1u /* Include code for OSMemQuery() */ + + + /* ---------------- MUTUAL EXCLUSION SEMAPHORES --------------- */ +#define OS_MUTEX_EN 1u /* Enable (1) or Disable (0) code generation for MUTEX */ +#define OS_MUTEX_ACCEPT_EN 1u /* Include code for OSMutexAccept() */ +#define OS_MUTEX_DEL_EN 1u /* Include code for OSMutexDel() */ +#define OS_MUTEX_QUERY_EN 1u /* Include code for OSMutexQuery() */ + + + /* ---------------------- MESSAGE QUEUES ---------------------- */ +#define OS_Q_EN 1u /* Enable (1) or Disable (0) code generation for QUEUES */ +#define OS_Q_ACCEPT_EN 1u /* Include code for OSQAccept() */ +#define OS_Q_DEL_EN 1u /* Include code for OSQDel() */ +#define OS_Q_FLUSH_EN 1u /* Include code for OSQFlush() */ +#define OS_Q_PEND_ABORT_EN 1u /* Include code for OSQPendAbort() */ +#define OS_Q_POST_EN 1u /* Include code for OSQPost() */ +#define OS_Q_POST_FRONT_EN 1u /* Include code for OSQPostFront() */ +#define OS_Q_POST_OPT_EN 1u /* Include code for OSQPostOpt() */ +#define OS_Q_QUERY_EN 1u /* Include code for OSQQuery() */ + + + /* ------------------------ SEMAPHORES ------------------------ */ +#define OS_SEM_EN 1u /* Enable (1) or Disable (0) code generation for SEMAPHORES */ +#define OS_SEM_ACCEPT_EN 1u /* Include code for OSSemAccept() */ +#define OS_SEM_DEL_EN 1u /* Include code for OSSemDel() */ +#define OS_SEM_PEND_ABORT_EN 1u /* Include code for OSSemPendAbort() */ +#define OS_SEM_QUERY_EN 1u /* Include code for OSSemQuery() */ +#define OS_SEM_SET_EN 1u /* Include code for OSSemSet() */ + + + /* --------------------- TIME MANAGEMENT ---------------------- */ +#define OS_TIME_DLY_HMSM_EN 1u /* Include code for OSTimeDlyHMSM() */ +#define OS_TIME_DLY_RESUME_EN 1u /* Include code for OSTimeDlyResume() */ +#define OS_TIME_GET_SET_EN 1u /* Include code for OSTimeGet() and OSTimeSet() */ +#define OS_TIME_TICK_HOOK_EN 1u /* Include code for OSTimeTickHook() */ + + + /* --------------------- TIMER MANAGEMENT --------------------- */ +#define OS_TMR_EN 0u /* Enable (1) or Disable (0) code generation for TIMERS */ +#define OS_TMR_CFG_MAX 16u /* Maximum number of timers */ +#define OS_TMR_CFG_NAME_EN 1u /* Determine timer names */ +#define OS_TMR_CFG_WHEEL_SIZE 7u /* Size of timer wheel (#Spokes) */ +#define OS_TMR_CFG_TICKS_PER_SEC 10u /* Rate at which timer management task runs (Hz) */ + +#endif diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/shell_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/shell_cfg.h new file mode 100644 index 0000000..c06add8 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/shell_cfg.h @@ -0,0 +1,96 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell Utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/Shell is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* SHELL UTILITY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : shell_cfg.h +* Version : V1.03.01 +* Programmer(s) : SR +* FBJ +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef SHELL_CFG_H +#define SHELL_CFG_H + + +/* +********************************************************************************************************* +* SHELL +* +* Note(s) : (1) Defines the size of the table used to hold the various modules' command tables. Command +* tables are added using the Shell_CmdTblAdd() function. Once the table is full, it is not +* possible to add any more unless Shell_CmdTblRem() is first called. +* +* (2) Defines the maximum number or argument(s) a command may pass on the string holding the +* complete command. The minimum value is 1. +* +* (3) Defines the maximum length for module command name, including the NULL character. +********************************************************************************************************* +*/ + +#define SHELL_CFG_CMD_TBL_SIZE 3 /* Cfg Shell cmd tbl size (see Note #1). */ +#define SHELL_CFG_CMD_ARG_NBR_MAX 5 /* Cfg cmd max nbr of arg (see Note #2). */ + +#define SHELL_CFG_MODULE_CMD_NAME_LEN_MAX 6 /* Cfg module cmd name len (See Note #3). */ + + +/* +********************************************************************************************************* +* TRACING +********************************************************************************************************* +*/ + +#ifndef TRACE_LEVEL_OFF +#define TRACE_LEVEL_OFF 0u +#endif + +#ifndef TRACE_LEVEL_INFO +#define TRACE_LEVEL_INFO 1u +#endif + +#ifndef TRACE_LEVEL_DBG +#define TRACE_LEVEL_DBG 2u +#endif + +#define SHELL_TRACE_LEVEL TRACE_LEVEL_OFF +#define SHELL_TRACE printf + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif \ No newline at end of file diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/terminal_cfg.h b/src/APP/Aufgabe2/ps7/core0/cfg/terminal_cfg.h new file mode 100644 index 0000000..c6c5502 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/terminal_cfg.h @@ -0,0 +1,70 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* Knowledge of the source code may not be used to write a similar +* product. This file may only be used in accordance with a license +* and should not be redistributed in any way. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* TERMINAL +* +* CONFIGURATION TEMPLATE FILE +* +* Filename : terminal_cfg.h +* Version : V1.03.01 +* Programmer(s) : BAN +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* TASKS PRIORITIES +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_PRIO 16u + + +/* +********************************************************************************************************* +* STACK SIZES +* Size of the task stacks (# of OS_STK entries) +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_STK_SIZE 1024u + + +/* +********************************************************************************************************* +* TERMINAL +* +* Note(s) : (1) Defines the maximum length of a command entered on the terminal, in characters. +* +* (2) Defines the maximum path length of the Current Working Directory (CWD). +* +* (3) Enables/disables command history. +* +* (4) Defines the number of items to hold in the command history. +* +* (5) Defines the length of a item in the command history. If a command is entered into the +* terminal that exceeds this length, then only the first characters, up to this number of +* characters, will be copied into the command history. +********************************************************************************************************* +*/ + +#define TERMINAL_CFG_MAX_CMD_LEN 260u /* Cfg max cmd len (see Note #1). */ +#define TERMINAL_CFG_MAX_PATH_LEN 260u /* Cfg max path len (see Note #2). */ + +#define TERMINAL_CFG_HISTORY_EN DEF_ENABLED /* En/dis history (see Note #3). */ +#define TERMINAL_CFG_HISTORY_ITEMS_NBR 16u /* Cfg nbr history items (see Note #4). */ +#define TERMINAL_CFG_HISTORY_ITEM_LEN 64u /* Cfg history item len (see Note #5). */ diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/xparameters.h b/src/APP/Aufgabe2/ps7/core0/cfg/xparameters.h new file mode 100644 index 0000000..648aa15 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/xparameters.h @@ -0,0 +1,704 @@ +/******************************************************************/ + +/* Definition for CPU ID */ +#define XPAR_CPU_ID 0 + +/* Definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_PS7_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_CPU_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + +/******************************************************************/ + +#undef DEF_DISABLED +#undef DEF_ENABLED +#define DEF_ENABLED 1 +#define DEF_DISABLED 0 + +#include "xparameters_ps.h" + + + +/******************************************************************/ + +/* Definitions for driver BRAM */ +#define XPAR_XBRAM_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_AXI_BRAM_CTRL_0_DEVICE_ID 0 +#define XPAR_AXI_BRAM_CTRL_0_DATA_WIDTH 32 +#define XPAR_AXI_BRAM_CTRL_0_ECC 0 +#define XPAR_AXI_BRAM_CTRL_0_FAULT_INJECT 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_UE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_STATUS_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_COUNTER_WIDTH 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_REGISTER 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_AXI_BRAM_CTRL_0_WRITE_ACCESS 0 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_BASEADDR 0x40000000 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_HIGHADDR 0x40001FFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_BASEADDR 0xFFFFFFFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_HIGHADDR 0xFFFFFFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_BRAM_0_DEVICE_ID XPAR_AXI_BRAM_CTRL_0_DEVICE_ID +#define XPAR_BRAM_0_DATA_WIDTH 32 +#define XPAR_BRAM_0_ECC 0 +#define XPAR_BRAM_0_FAULT_INJECT 0 +#define XPAR_BRAM_0_CE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_UE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_ECC_STATUS_REGISTERS 0 +#define XPAR_BRAM_0_CE_COUNTER_WIDTH 0 +#define XPAR_BRAM_0_ECC_ONOFF_REGISTER 0 +#define XPAR_BRAM_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_BRAM_0_WRITE_ACCESS 0 +#define XPAR_BRAM_0_BASEADDR 0x40000000 +#define XPAR_BRAM_0_HIGHADDR 0x40001FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_DDR_0 */ +#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000 +#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x3FFFFFFF + + +/******************************************************************/ + +/* Definitions for driver DEVCFG */ +#define XPAR_XDCFG_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_PS7_DEV_CFG_0_DEVICE_ID 0 +#define XPAR_PS7_DEV_CFG_0_BASEADDR 0xF8007000 +#define XPAR_PS7_DEV_CFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_XDCFG_0_DEVICE_ID XPAR_PS7_DEV_CFG_0_DEVICE_ID +#define XPAR_XDCFG_0_BASEADDR 0xF8007000 +#define XPAR_XDCFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Definitions for driver DMAPS */ +#define XPAR_XDMAPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_DMA_NS */ +#define XPAR_PS7_DMA_NS_DEVICE_ID 0 +#define XPAR_PS7_DMA_NS_BASEADDR 0xF8004000 +#define XPAR_PS7_DMA_NS_HIGHADDR 0xF8004FFF + + +/* Definitions for peripheral PS7_DMA_S */ +#define XPAR_PS7_DMA_S_DEVICE_ID 1 +#define XPAR_PS7_DMA_S_BASEADDR 0xF8003000 +#define XPAR_PS7_DMA_S_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DMA_NS */ +#define XPAR_XDMAPS_0_DEVICE_ID XPAR_PS7_DMA_NS_DEVICE_ID +#define XPAR_XDMAPS_0_BASEADDR 0xF8004000 +#define XPAR_XDMAPS_0_HIGHADDR 0xF8004FFF + +/* Canonical definitions for peripheral PS7_DMA_S */ +#define XPAR_XDMAPS_1_DEVICE_ID XPAR_PS7_DMA_S_DEVICE_ID +#define XPAR_XDMAPS_1_BASEADDR 0xF8003000 +#define XPAR_XDMAPS_1_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_AFI_0 */ +#define XPAR_PS7_AFI_0_S_AXI_BASEADDR 0xF8008000 +#define XPAR_PS7_AFI_0_S_AXI_HIGHADDR 0xF8008FFF + + +/* Definitions for peripheral PS7_AFI_1 */ +#define XPAR_PS7_AFI_1_S_AXI_BASEADDR 0xF8009000 +#define XPAR_PS7_AFI_1_S_AXI_HIGHADDR 0xF8009FFF + + +/* Definitions for peripheral PS7_AFI_2 */ +#define XPAR_PS7_AFI_2_S_AXI_BASEADDR 0xF800A000 +#define XPAR_PS7_AFI_2_S_AXI_HIGHADDR 0xF800AFFF + + +/* Definitions for peripheral PS7_AFI_3 */ +#define XPAR_PS7_AFI_3_S_AXI_BASEADDR 0xF800B000 +#define XPAR_PS7_AFI_3_S_AXI_HIGHADDR 0xF800BFFF + + +/* Definitions for peripheral PS7_DDRC_0 */ +#define XPAR_PS7_DDRC_0_S_AXI_BASEADDR 0xF8006000 +#define XPAR_PS7_DDRC_0_S_AXI_HIGHADDR 0xF8006FFF + + +/* Definitions for peripheral PS7_GLOBALTIMER_0 */ +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_BASEADDR 0xF8F00200 +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_HIGHADDR 0xF8F002FF + + +/* Definitions for peripheral PS7_GPV_0 */ +#define XPAR_PS7_GPV_0_S_AXI_BASEADDR 0xF8900000 +#define XPAR_PS7_GPV_0_S_AXI_HIGHADDR 0xF89FFFFF + + +/* Definitions for peripheral PS7_INTC_DIST_0 */ +#define XPAR_PS7_INTC_DIST_0_S_AXI_BASEADDR 0xF8F01000 +#define XPAR_PS7_INTC_DIST_0_S_AXI_HIGHADDR 0xF8F01FFF + + +/* Definitions for peripheral PS7_IOP_BUS_CONFIG_0 */ +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_BASEADDR 0xE0200000 +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_HIGHADDR 0xE0200FFF + + +/* Definitions for peripheral PS7_OCMC_0 */ +#define XPAR_PS7_OCMC_0_S_AXI_BASEADDR 0xF800C000 +#define XPAR_PS7_OCMC_0_S_AXI_HIGHADDR 0xF800CFFF + + +/* Definitions for peripheral PS7_PL310_0 */ +#define XPAR_PS7_PL310_0_S_AXI_BASEADDR 0xF8F02000 +#define XPAR_PS7_PL310_0_S_AXI_HIGHADDR 0xF8F02FFF + + +/* Definitions for peripheral PS7_PMU_0 */ +#define XPAR_PS7_PMU_0_S_AXI_BASEADDR 0xF8891000 +#define XPAR_PS7_PMU_0_S_AXI_HIGHADDR 0xF8891FFF +#define XPAR_PS7_PMU_0_PMU1_S_AXI_BASEADDR 0xF8893000 +#define XPAR_PS7_PMU_0_PMU1_S_AXI_HIGHADDR 0xF8893FFF + + +/* Definitions for peripheral PS7_QSPI_LINEAR_0 */ +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_BASEADDR 0xFC000000 +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_HIGHADDR 0xFDFFFFFF + + +/* Definitions for peripheral PS7_RAM_0 */ +#define XPAR_PS7_RAM_0_S_AXI_BASEADDR 0x00000000 +#define XPAR_PS7_RAM_0_S_AXI_HIGHADDR 0x0003FFFF + + +/* Definitions for peripheral PS7_RAM_1 */ +#define XPAR_PS7_RAM_1_S_AXI_BASEADDR 0xFFFC0000 +#define XPAR_PS7_RAM_1_S_AXI_HIGHADDR 0xFFFFFFFF + + +/* Definitions for peripheral PS7_SLCR_0 */ +#define XPAR_PS7_SLCR_0_S_AXI_BASEADDR 0xF8000000 +#define XPAR_PS7_SLCR_0_S_AXI_HIGHADDR 0xF8000FFF + + +/******************************************************************/ + +/* Definitions for driver GPIO */ +#define XPAR_XGPIO_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_GPIO_0 */ +#define XPAR_AXI_GPIO_0_BASEADDR 0x41200000 +#define XPAR_AXI_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_AXI_GPIO_0_DEVICE_ID 0 +#define XPAR_AXI_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_AXI_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_GPIO_0 */ +#define XPAR_GPIO_0_BASEADDR 0x41200000 +#define XPAR_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID +#define XPAR_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +///* Definitions for driver IICPS */ +//#define XPAR_XIICPS_NUM_INSTANCES 1 +// +///* Definitions for peripheral PS7_I2C_0 */ +//#define XPAR_PS7_I2C_0_DEVICE_ID 0 +//#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +//#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +//#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver QSPIPS */ +#define XPAR_XQSPIPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_QSPI_0 */ +#define XPAR_PS7_QSPI_0_DEVICE_ID 0 +#define XPAR_PS7_QSPI_0_BASEADDR 0xE000D000 +#define XPAR_PS7_QSPI_0_HIGHADDR 0xE000DFFF +#define XPAR_PS7_QSPI_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_PS7_QSPI_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_QSPI_0 */ +#define XPAR_XQSPIPS_0_DEVICE_ID XPAR_PS7_QSPI_0_DEVICE_ID +#define XPAR_XQSPIPS_0_BASEADDR 0xE000D000 +#define XPAR_XQSPIPS_0_HIGHADDR 0xE000DFFF +#define XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_XQSPIPS_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Definitions for driver SCUWDT */ +#define XPAR_XSCUWDT_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_PS7_SCUWDT_0_DEVICE_ID 0 +#define XPAR_PS7_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_PS7_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_SCUWDT_0_DEVICE_ID XPAR_PS7_SCUWDT_0_DEVICE_ID +#define XPAR_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Definitions for driver UCOS_EMACPS */ +#define XPAR_UCOS_EMACPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_PS7_ETHERNET_0_DEVICE_ID 0 +#define XPAR_PS7_ETHERNET_0_BASEADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_HIGHADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_UCOS_EMACPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_EMACPS_0_DEVICE_ID XPAR_PS7_ETHERNET_0_DEVICE_ID +#define XPAR_UCOS_EMACPS_0_BASEADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_HIGHADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_L2CACHEC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_L2CACHEC_0 */ +#define XPAR_PS7_L2CACHEC_0_DEVICE_ID 0 +#define XPAR_PS7_L2CACHEC_0_BASEADDR 0xF8F02000 +#define XPAR_PS7_L2CACHEC_0_HIGHADDR 0xF8F02FFF + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUC_0 */ +#define XPAR_PS7_SCUC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUC_0_BASEADDR 0xF8F00000 +#define XPAR_PS7_SCUC_0_HIGHADDR 0xF8F000FC + + +/******************************************************************/ + + +/***Definitions for Core_nIRQ/nFIQ interrupts ****/ +/* Definitions for driver UCOS_SCUGIC */ +#define XPAR_XSCUGIC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_PS7_SCUGIC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUGIC_0_BASEADDR 0xF8F00100 +#define XPAR_PS7_SCUGIC_0_HIGHADDR 0xF8F001FF +#define XPAR_PS7_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_SCUGIC_0_DEVICE_ID 0 +#define XPAR_SCUGIC_0_CPU_BASEADDR 0xF8F00100 +#define XPAR_SCUGIC_0_CPU_HIGHADDR 0xF8F001FF +#define XPAR_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUTIMER */ +#define XPAR_UCOS_SCUC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUTIMER_0 */ +#define XPAR_PS7_SCUTIMER_0_DEVICE_ID 0 +#define XPAR_PS7_SCUTIMER_0_BASEADDR 0xF8F00600 +#define XPAR_PS7_SCUTIMER_0_HIGHADDR 0xF8F0061F + + +/******************************************************************/ + +/* Definitions for driver UCOS_SDPS */ +#define XPAR_UCOS_SDPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SD_0 */ +#define XPAR_PS7_SD_0_DEVICE_ID 0 +#define XPAR_PS7_SD_0_BASEADDR 0xE0100000 +#define XPAR_PS7_SD_0_HIGHADDR 0xE0100FFF +#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SD_0 */ +#define XPAR_UCOS_SDPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_SDPS_0_DEVICE_ID XPAR_PS7_SD_0_DEVICE_ID +#define XPAR_UCOS_SDPS_0_BASEADDR 0xE0100000 +#define XPAR_UCOS_SDPS_0_HIGHADDR 0xE0100FFF +#define XPAR_UCOS_SDPS_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +///* Definitions for driver UCOS_TTCPS */ +//#define XPAR_UCOS_TTCPS_NUM_INSTANCES 3 +// +///* Definitions for peripheral PS7_TTC_0 */ +//#define XPAR_PS7_TTC_0_DEVICE_ID 0 +//#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000 +//#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_1_DEVICE_ID 1 +//#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004 +//#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_2_DEVICE_ID 2 +//#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008 +//#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_UARTPS */ +#define XPAR_UCOS_UARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_UCOS_UARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_UCOS_UARTPS_0_BASEADDR 0xE0001000 +#define XPAR_UCOS_UARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_UCOS_UARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_UCOS_UARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_USBPS */ +#define XPAR_UCOS_USBPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_USB_0 */ +#define XPAR_PS7_USB_0_DEVICE_ID 0 +#define XPAR_PS7_USB_0_BASEADDR 0xE0002000 +#define XPAR_PS7_USB_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_USB_0 */ +#define XPAR_UCOS_USBPS_0_DEVICE_ID XPAR_PS7_USB_0_DEVICE_ID +#define XPAR_UCOS_USBPS_0_BASEADDR 0xE0002000 +#define XPAR_UCOS_USBPS_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Definitions for driver XADCPS */ +#define XPAR_XADCPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_XADC_0 */ +#define XPAR_PS7_XADC_0_DEVICE_ID 0 +#define XPAR_PS7_XADC_0_BASEADDR 0xF8007100 +#define XPAR_PS7_XADC_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_XADC_0 */ +#define XPAR_XADCPS_0_DEVICE_ID XPAR_PS7_XADC_0_DEVICE_ID +#define XPAR_XADCPS_0_BASEADDR 0xF8007100 +#define XPAR_XADCPS_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + + +//UCOS STDOUT +#define UCOS_STDOUT_DRIVER UCOS_UART_PS7_UART +#define UCOS_STDOUT_DEVICE_ID 0 +#define STDOUT_BASEADDRESS + +//UCOS Ethernet +#define UCOS_ETHERNET_DRIVER UCOS_ETHERNET_EMACPS + +//UCOS TASK PARAMETERS +#define UCOS_START_TASK_PRIO 5 +#define UCOS_START_TASK_STACK_SIZE 784 +#define UCOS_START_DEBUG_TRACE DEF_ENABLED +#define NET_TASK_CFG_RX_PRIO 30 +#define NET_TASK_CFG_RX_STACK_SIZE 3072 +#define NET_TASK_CFG_TXDEALLOC_PRIO 6 +#define NET_TASK_CFG_TXDEALLOC_STACK_SIZE 2048 +#define NET_TASK_CFG_TMR_PRIO 18 +#define NET_TASK_CFG_TMR_STACK_SIZE 2048 +#define HTTPc_OS_CFG_TASK_PRIO 20 +#define HTTPc_OS_CFG_TASK_STK_SIZE 2048 +#define UCOS_HTTPc_OS_CFG_TASK_DELAY 1 +#define UCOS_HTTPc_OS_CFG_MSG_Q_SIZE 5 +#define UCOS_HTTPc_OS_CFG_TIMEOUT 2000 +#define UCOS_HTTPc_OS_CFG_INACTIVITY_TIMEOUT 30 + +#define UCOS_AMP_MASTER DEF_ENABLED + + +#define UCOS_CFG_INIT_CAN DEF_ENABLED +#define UCOS_CFG_INIT_NET DEF_ENABLED +#define UCOS_CFG_INIT_FS DEF_DISABLED +#define UCOS_CFG_INIT_OPENAMP DEF_DISABLED +#define UCOS_CFG_INIT_USBD DEF_DISABLED +#define UCOS_CFG_INIT_USBH DEF_DISABLED + + +#define UCOS_ETHERNET_ADDRESS "10.10.110.2" +#define UCOS_ETHERNET_GATEWAY "10.10.110.1" +#define UCOS_ETHERNET_SUBMASK "255.255.255.0" +#define UCOS_ETHERNET_DHCP DEF_ENABLED + + +#define UCOS_IF_RX_BUF_NBR 12 +#define UCOS_IF_TX_LARGE_BUF_NBR 8 +#define UCOS_IF_TX_SMALL_BUF_NBR 8 +#define UCOS_IF_RX_DESC_NBR 0 +#define UCOS_IF_TX_DESC_NBR 0 +#define UCOS_IF_DEDIC_MEM_ADDR 0 +#define UCOS_IF_DEDIC_MEM_SIZE 0 +#define UCOS_IF_HW_ADDR "50:E5:49:E6:8D:28" + + +#define UCOS_PHY_BUS_ADDR 255 +#define UCOS_PHY_BUS_MODE UCOS_NET_PHY_BUS_MODE_GMII +#define UCOS_PHY_TYPE UCOS_NET_PHY_TYPE_INT +#define UCOS_PHY_SPEED UCOS_NET_PHY_SPD_AUTO +#define UCOS_PHY_DUPLEX UCOS_NET_PHY_DUPLEX_AUTO + + +#define UCOS_USB_DRIVER UCOS_USB_NONE +#define UCOS_USB_DEVICE_ID 0 +#define UCOS_USB_TYPE UCOS_USB_TYPE_DEVICE + + +#define UCOS_RAMDISK_EN DEF_DISABLED +#define UCOS_RAMDISK_SIZE 128 +#define UCOS_RAMDISK_SECTOR_SIZE 512 +#define UCOS_RAMDISK_BASE_ADDRESS 0 + + +#define UCOS_SDCARD_EN DEF_DISABLED + + +#define XPAR_PS7_ETHERNET_0_INT_SOURCE 54 +#define XPAR_PS7_SD_0_INT_SOURCE 56 +#define XPAR_PS7_UART_1_INT_SOURCE 82 +#define XPAR_PS7_USB_0_INT_SOURCE 53 + +#define UCOS_ZYNQ_CONFIG_MMU DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_MMU DEF_DISABLED +#define UCOS_ZYNQ_CONFIG_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_OPTIMS DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_I_EN DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_D_EN DEF_DISABLED +#define UCOS_CPU_TYPE UCOS_CPU_TYPE_PS7 + +//Parameters added by Kai Gemlau +#define UCOS_SMP_ENABLE DEF_DISABLED + +/******************************************************************/ + +/* Definitions for driver TTCPS */ +#define XPAR_XTTCPS_NUM_INSTANCES 3U + +/* Definitions for peripheral PS7_TTC_0 */ +#define XPAR_PS7_TTC_0_DEVICE_ID 0U +#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000U +#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_1_DEVICE_ID 1U +#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004U +#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_2_DEVICE_ID 2U +#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008U +#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_TTC_0 */ +#define XPAR_XTTCPS_0_DEVICE_ID XPAR_PS7_TTC_0_DEVICE_ID +#define XPAR_XTTCPS_0_BASEADDR 0xF8001000U +#define XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_0_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_1_DEVICE_ID XPAR_PS7_TTC_1_DEVICE_ID +#define XPAR_XTTCPS_1_BASEADDR 0xF8001004U +#define XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_1_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_2_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define XPAR_XTTCPS_2_BASEADDR 0xF8001008U +#define XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Definitions for driver IICPS */ +#define XPAR_XIICPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_I2C_0 */ +#define XPAR_PS7_I2C_0_DEVICE_ID 0 +#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/* Definitions for peripheral PS7_I2C_1 */ +#define XPAR_PS7_I2C_1_DEVICE_ID 1 +#define XPAR_PS7_I2C_1_BASEADDR 0xE0005000 +#define XPAR_PS7_I2C_1_HIGHADDR 0xE0005FFF +#define XPAR_PS7_I2C_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + +/* Canonical definitions for peripheral PS7_I2C_1 */ +#define XPAR_XIICPS_1_DEVICE_ID XPAR_PS7_I2C_1_DEVICE_ID +#define XPAR_XIICPS_1_BASEADDR 0xE0005000 +#define XPAR_XIICPS_1_HIGHADDR 0xE0005FFF +#define XPAR_XIICPS_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver UARTPS */ +#define XPAR_XUARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 2 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 9600 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_XUARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_XUARTPS_0_BASEADDR 0xE0001000 +#define XPAR_XUARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_XUARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_XUARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ diff --git a/src/APP/Aufgabe2/ps7/core0/cfg/xparameters_ps.h b/src/APP/Aufgabe2/ps7/core0/cfg/xparameters_ps.h new file mode 100644 index 0000000..7cdb12f --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/cfg/xparameters_ps.h @@ -0,0 +1,325 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xparameters_ps.h +* +* This file contains the address definitions for the hard peripherals +* attached to the ARM Cortex A9 core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 1.00a ecm/sdm 02/01/10 Initial version
+* 3.04a sdm     02/02/12 Removed some of the defines as they are being generated through
+*                        driver tcl
+* 5.0	pkp		01/16/15 Added interrupt ID definition of ttc for TEST APP
+*
+* +* @note +* +* None. +* +******************************************************************************/ + +#ifndef _XPARAMETERS_PS_H_ +#define _XPARAMETERS_PS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/************************** Constant Definitions *****************************/ + +/* + * This block contains constant declarations for the peripherals + * within the hardblock + */ + +/* Canonical definitions for DDR MEMORY */ +#define XPAR_DDR_MEM_BASEADDR 0x00000000U +#define XPAR_DDR_MEM_HIGHADDR 0x3FFFFFFFU + +/* Canonical definitions for Interrupts */ +#define XPAR_XUARTPS_0_INTR XPS_UART0_INT_ID +#define XPAR_XUARTPS_1_INTR XPS_UART1_INT_ID +#define XPAR_XUSBPS_0_INTR XPS_USB0_INT_ID +#define XPAR_XUSBPS_1_INTR XPS_USB1_INT_ID +#define XPAR_XIICPS_0_INTR XPS_I2C0_INT_ID +#define XPAR_XIICPS_1_INTR XPS_I2C1_INT_ID +#define XPAR_XSPIPS_0_INTR XPS_SPI0_INT_ID +#define XPAR_XSPIPS_1_INTR XPS_SPI1_INT_ID +#define XPAR_XCANPS_0_INTR XPS_CAN0_INT_ID +#define XPAR_XCANPS_1_INTR XPS_CAN1_INT_ID +#define XPAR_XGPIOPS_0_INTR XPS_GPIO_INT_ID +#define XPAR_XEMACPS_0_INTR XPS_GEM0_INT_ID +#define XPAR_XEMACPS_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_XEMACPS_1_INTR XPS_GEM1_INT_ID +#define XPAR_XEMACPS_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_XSDIOPS_0_INTR XPS_SDIO0_INT_ID +#define XPAR_XQSPIPS_0_INTR XPS_QSPI_INT_ID +#define XPAR_XSDIOPS_1_INTR XPS_SDIO1_INT_ID +#define XPAR_XWDTPS_0_INTR XPS_WDT_INT_ID +#define XPAR_XDCFG_0_INTR XPS_DVC_INT_ID +#define XPAR_SCUTIMER_INTR XPS_SCU_TMR_INT_ID +#define XPAR_SCUWDT_INTR XPS_SCU_WDT_INT_ID +#define XPAR_XTTCPS_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_XTTCPS_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_XTTCPS_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_XTTCPS_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_XTTCPS_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_XTTCPS_5_INTR XPS_TTC1_2_INT_ID +#define XPAR_XDMAPS_0_FAULT_INTR XPS_DMA0_ABORT_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_0 XPS_DMA0_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_1 XPS_DMA1_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_2 XPS_DMA2_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_3 XPS_DMA3_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_4 XPS_DMA4_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_5 XPS_DMA5_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_6 XPS_DMA6_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_7 XPS_DMA7_INT_ID + + +#define XPAR_XQSPIPS_0_LINEAR_BASEADDR XPS_QSPI_LINEAR_BASEADDR +#define XPAR_XPARPORTPS_CTRL_BASEADDR XPS_PARPORT_CRTL_BASEADDR + + + +/* Canonical definitions for DMAC */ + + +/* Canonical definitions for WDT */ + +/* Canonical definitions for SLCR */ +#define XPAR_XSLCR_NUM_INSTANCES 1U +#define XPAR_XSLCR_0_DEVICE_ID 0U +#define XPAR_XSLCR_0_BASEADDR XPS_SYS_CTRL_BASEADDR + +/* Canonical definitions for SCU GIC */ +#define XPAR_SCUGIC_NUM_INSTANCES 1U +#define XPAR_SCUGIC_SINGLE_DEVICE_ID 0U +#define XPAR_SCUGIC_CPU_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000100U) +#define XPAR_SCUGIC_DIST_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00001000U) +#define XPAR_SCUGIC_ACK_BEFORE 0U + +/* Canonical definitions for Global Timer */ +#define XPAR_GLOBAL_TMR_NUM_INSTANCES 1U +#define XPAR_GLOBAL_TMR_DEVICE_ID 0U +#define XPAR_GLOBAL_TMR_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000200U) +#define XPAR_GLOBAL_TMR_INTR XPS_GLOBAL_TMR_INT_ID + + +/* Xilinx Parallel Flash Library (XilFlash) User Settings */ +#define XPAR_AXI_EMC + + +#define XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/* + * This block contains constant declarations for the peripherals + * within the hardblock. These have been put for bacwards compatibilty + */ + +#define XPS_PERIPHERAL_BASEADDR 0xE0000000U +#define XPS_UART0_BASEADDR 0xE0000000U +#define XPS_UART1_BASEADDR 0xE0001000U +#define XPS_USB0_BASEADDR 0xE0002000U +#define XPS_USB1_BASEADDR 0xE0003000U +#define XPS_I2C0_BASEADDR 0xE0004000U +#define XPS_I2C1_BASEADDR 0xE0005000U +#define XPS_SPI0_BASEADDR 0xE0006000U +#define XPS_SPI1_BASEADDR 0xE0007000U +#define XPS_CAN0_BASEADDR 0xE0008000U +#define XPS_CAN1_BASEADDR 0xE0009000U +#define XPS_GPIO_BASEADDR 0xE000A000U +#define XPS_GEM0_BASEADDR 0xE000B000U +#define XPS_GEM1_BASEADDR 0xE000C000U +#define XPS_QSPI_BASEADDR 0xE000D000U +#define XPS_PARPORT_CRTL_BASEADDR 0xE000E000U +#define XPS_SDIO0_BASEADDR 0xE0100000U +#define XPS_SDIO1_BASEADDR 0xE0101000U +#define XPS_IOU_BUS_CFG_BASEADDR 0xE0200000U +#define XPS_NAND_BASEADDR 0xE1000000U +#define XPS_PARPORT0_BASEADDR 0xE2000000U +#define XPS_PARPORT1_BASEADDR 0xE4000000U +#define XPS_QSPI_LINEAR_BASEADDR 0xFC000000U +#define XPS_SYS_CTRL_BASEADDR 0xF8000000U /* AKA SLCR */ +#define XPS_TTC0_BASEADDR 0xF8001000U +#define XPS_TTC1_BASEADDR 0xF8002000U +#define XPS_DMAC0_SEC_BASEADDR 0xF8003000U +#define XPS_DMAC0_NON_SEC_BASEADDR 0xF8004000U +#define XPS_WDT_BASEADDR 0xF8005000U +#define XPS_DDR_CTRL_BASEADDR 0xF8006000U +#define XPS_DEV_CFG_APB_BASEADDR 0xF8007000U +#define XPS_AFI0_BASEADDR 0xF8008000U +#define XPS_AFI1_BASEADDR 0xF8009000U +#define XPS_AFI2_BASEADDR 0xF800A000U +#define XPS_AFI3_BASEADDR 0xF800B000U +#define XPS_OCM_BASEADDR 0xF800C000U +#define XPS_EFUSE_BASEADDR 0xF800D000U +#define XPS_CORESIGHT_BASEADDR 0xF8800000U +#define XPS_TOP_BUS_CFG_BASEADDR 0xF8900000U +#define XPS_SCU_PERIPH_BASE 0xF8F00000U +#define XPS_L2CC_BASEADDR 0xF8F02000U +#define XPS_SAM_RAM_BASEADDR 0xFFFC0000U +#define XPS_FPGA_AXI_S0_BASEADDR 0x40000000U +#define XPS_FPGA_AXI_S1_BASEADDR 0x80000000U +#define XPS_IOU_S_SWITCH_BASEADDR 0xE0000000U +#define XPS_PERIPH_APB_BASEADDR 0xF8000000U + +/* Shared Peripheral Interrupts (SPI) */ +#define XPS_CORE_PARITY0_INT_ID 32U +#define XPS_CORE_PARITY1_INT_ID 33U +#define XPS_L2CC_INT_ID 34U +#define XPS_OCMINTR_INT_ID 35U +#define XPS_ECC_INT_ID 36U +#define XPS_PMU0_INT_ID 37U +#define XPS_PMU1_INT_ID 38U +#define XPS_SYSMON_INT_ID 39U +#define XPS_DVC_INT_ID 40U +#define XPS_WDT_INT_ID 41U +#define XPS_TTC0_0_INT_ID 42U +#define XPS_TTC0_1_INT_ID 43U +#define XPS_TTC0_2_INT_ID 44U +#define XPS_DMA0_ABORT_INT_ID 45U +#define XPS_DMA0_INT_ID 46U +#define XPS_DMA1_INT_ID 47U +#define XPS_DMA2_INT_ID 48U +#define XPS_DMA3_INT_ID 49U +#define XPS_SMC_INT_ID 50U +#define XPS_QSPI_INT_ID 51U +#define XPS_GPIO_INT_ID 52U +#define XPS_USB0_INT_ID 53U +#define XPS_GEM0_INT_ID 54U +#define XPS_GEM0_WAKE_INT_ID 55U +#define XPS_SDIO0_INT_ID 56U +#define XPS_I2C0_INT_ID 57U +#define XPS_SPI0_INT_ID 58U +#define XPS_UART0_INT_ID 59U +#define XPS_CAN0_INT_ID 60U +#define XPS_FPGA0_INT_ID 61U +#define XPS_FPGA1_INT_ID 62U +#define XPS_FPGA2_INT_ID 63U +#define XPS_FPGA3_INT_ID 64U +#define XPS_FPGA4_INT_ID 65U +#define XPS_FPGA5_INT_ID 66U +#define XPS_FPGA6_INT_ID 67U +#define XPS_FPGA7_INT_ID 68U +#define XPS_TTC1_0_INT_ID 69U +#define XPS_TTC1_1_INT_ID 70U +#define XPS_TTC1_2_INT_ID 71U +#define XPS_DMA4_INT_ID 72U +#define XPS_DMA5_INT_ID 73U +#define XPS_DMA6_INT_ID 74U +#define XPS_DMA7_INT_ID 75U +#define XPS_USB1_INT_ID 76U +#define XPS_GEM1_INT_ID 77U +#define XPS_GEM1_WAKE_INT_ID 78U +#define XPS_SDIO1_INT_ID 79U +#define XPS_I2C1_INT_ID 80U +#define XPS_SPI1_INT_ID 81U +#define XPS_UART1_INT_ID 82U +#define XPS_CAN1_INT_ID 83U +#define XPS_FPGA8_INT_ID 84U +#define XPS_FPGA9_INT_ID 85U +#define XPS_FPGA10_INT_ID 86U +#define XPS_FPGA11_INT_ID 87U +#define XPS_FPGA12_INT_ID 88U +#define XPS_FPGA13_INT_ID 89U +#define XPS_FPGA14_INT_ID 90U +#define XPS_FPGA15_INT_ID 91U + +/* Private Peripheral Interrupts (PPI) */ +#define XPS_GLOBAL_TMR_INT_ID 27U /* SCU Global Timer interrupt */ +#define XPS_FIQ_INT_ID 28U /* FIQ from FPGA fabric */ +#define XPS_SCU_TMR_INT_ID 29U /* SCU Private Timer interrupt */ +#define XPS_SCU_WDT_INT_ID 30U /* SCU Private WDT interrupt */ +#define XPS_IRQ_INT_ID 31U /* IRQ from FPGA fabric */ + + +/* REDEFINES for TEST APP */ +/* Definitions for UART */ +#define XPAR_PS7_UART_0_INTR XPS_UART0_INT_ID +#define XPAR_PS7_UART_1_INTR XPS_UART1_INT_ID +#define XPAR_PS7_USB_0_INTR XPS_USB0_INT_ID +#define XPAR_PS7_USB_1_INTR XPS_USB1_INT_ID +#define XPAR_PS7_I2C_0_INTR XPS_I2C0_INT_ID +#define XPAR_PS7_I2C_1_INTR XPS_I2C1_INT_ID +#define XPAR_PS7_SPI_0_INTR XPS_SPI0_INT_ID +#define XPAR_PS7_SPI_1_INTR XPS_SPI1_INT_ID +#define XPAR_PS7_CAN_0_INTR XPS_CAN0_INT_ID +#define XPAR_PS7_CAN_1_INTR XPS_CAN1_INT_ID +#define XPAR_PS7_GPIO_0_INTR XPS_GPIO_INT_ID +#define XPAR_PS7_ETHERNET_0_INTR XPS_GEM0_INT_ID +#define XPAR_PS7_ETHERNET_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_PS7_ETHERNET_1_INTR XPS_GEM1_INT_ID +#define XPAR_PS7_ETHERNET_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_PS7_QSPI_0_INTR XPS_QSPI_INT_ID +#define XPAR_PS7_WDT_0_INTR XPS_WDT_INT_ID +#define XPAR_PS7_SCUWDT_0_INTR XPS_SCU_WDT_INT_ID +#define XPAR_PS7_SCUTIMER_0_INTR XPS_SCU_TMR_INT_ID +#define XPAR_PS7_XADC_0_INTR XPS_SYSMON_INT_ID +#define XPAR_PS7_TTC_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_PS7_TTC_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_PS7_TTC_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_PS7_TTC_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_PS7_TTC_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_PS7_TTC_5_INTR XPS_TTC1_2_INT_ID + +#define XPAR_XADCPS_INT_ID XPS_SYSMON_INT_ID + +/* For backwards compatibilty */ +#define XPAR_XUARTPS_0_CLOCK_HZ XPAR_XUARTPS_0_UART_CLK_FREQ_HZ +#define XPAR_XUARTPS_1_CLOCK_HZ XPAR_XUARTPS_1_UART_CLK_FREQ_HZ +#define XPAR_XTTCPS_0_CLOCK_HZ XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_1_CLOCK_HZ XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_2_CLOCK_HZ XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_3_CLOCK_HZ XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_4_CLOCK_HZ XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_5_CLOCK_HZ XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ +#define XPAR_XIICPS_0_CLOCK_HZ XPAR_XIICPS_0_I2C_CLK_FREQ_HZ +#define XPAR_XIICPS_1_CLOCK_HZ XPAR_XIICPS_1_I2C_CLK_FREQ_HZ + +#define XPAR_XQSPIPS_0_CLOCK_HZ XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ + +#define XPAR_SCUTIMER_DEVICE_ID 0U +#define XPAR_SCUWDT_DEVICE_ID 0U + + +#ifdef __cplusplus +} +#endif + +#endif /* protection macro */ diff --git a/src/APP/Aufgabe2/ps7/core0/linker/lscript.ld b/src/APP/Aufgabe2/ps7/core0/linker/lscript.ld new file mode 100644 index 0000000..a9f145a --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/linker/lscript.ld @@ -0,0 +1,291 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: */ +/* */ +/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : Cortex-A9 Linker Script */ +/* */ +/*******************************************************************/ + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000; +_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x2000; + +_ABORT_STACK_SIZE = DEFINED(_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024; +_SUPERVISOR_STACK_SIZE = DEFINED(_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048; +_IRQ_STACK_SIZE = DEFINED(_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024; +_FIQ_STACK_SIZE = DEFINED(_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024; +_UNDEF_STACK_SIZE = DEFINED(_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024; + +/* Define Memories in the system */ + +MEMORY +{ + axi_bram_ctrl_0_Mem0 : ORIGIN = 0x40000000, LENGTH = 0x2000 + ps7_ddr_0 : ORIGIN = 0x100000, LENGTH = 0x3FF00000 + ps7_qspi_linear_0 : ORIGIN = 0xFC000000, LENGTH = 0x2000000 + ps7_ram_0 : ORIGIN = 0x0, LENGTH = 0x30000 + ps7_ram_1 : ORIGIN = 0xFFFF0000, LENGTH = 0xFE00 + ps7_ddr_core_0 : ORIGIN = 0x100000, LENGTH = 0x700000 + ps7_ddr_core_1 : ORIGIN = 0x800000, LENGTH = 0x800000 +} + +/* Specify the default entry point to the program */ + +ENTRY(_vector_table) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ +.text : { + KEEP (*(.vectors)) + *(.boot) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.plt) + *(.gnu_warning) + *(.gcc_execpt_table) + *(.glue_7) + *(.glue_7t) + *(.vfp11_veneer) + *(.ARM.extab) + *(.gnu.linkonce.armextab.*) +} > ps7_ddr_core_0 + +.init : { + KEEP (*(.init)) +} > ps7_ddr_core_0 + +.fini : { + KEEP (*(.fini)) +} > ps7_ddr_core_0 + +.rodata : { + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > ps7_ddr_core_0 + +.rodata1 : { + __rodata1_start = .; + *(.rodata1) + *(.rodata1.*) + __rodata1_end = .; +} > ps7_ddr_core_0 + +.sdata2 : { + __sdata2_start = .; + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + __sdata2_end = .; +} > ps7_ddr_core_0 + +.sbss2 : { + __sbss2_start = .; + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + __sbss2_end = .; +} > ps7_ddr_core_0 + +.data : { + __data_start = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.jcr) + *(.got) + *(.got.plt) + __data_end = .; +} > ps7_ddr_core_0 + +.data1 : { + __data1_start = .; + *(.data1) + *(.data1.*) + __data1_end = .; +} > ps7_ddr_core_0 + +.got : { + *(.got) +} > ps7_ddr_core_0 + +.ctors : { + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > ps7_ddr_core_0 + +.dtors : { + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > ps7_ddr_core_0 + +.fixup : { + __fixup_start = .; + *(.fixup) + __fixup_end = .; +} > ps7_ddr_core_0 + +.eh_frame : { + *(.eh_frame) +} > ps7_ddr_core_0 + +.eh_framehdr : { + __eh_framehdr_start = .; + *(.eh_framehdr) + __eh_framehdr_end = .; +} > ps7_ddr_core_0 + +.gcc_except_table : { + *(.gcc_except_table) +} > ps7_ddr_core_0 + +.mmu_tbl (ALIGN(16384)) : { + __mmu_tbl_start = .; + *(.mmu_tbl) + __mmu_tbl_end = .; +} > ps7_ddr_core_0 + +.ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx*) + *(.gnu.linkonce.armexidix.*.*) + __exidx_end = .; +} > ps7_ddr_core_0 + +.preinit_array : { + __preinit_array_start = .; + KEEP (*(SORT(.preinit_array.*))) + KEEP (*(.preinit_array)) + __preinit_array_end = .; +} > ps7_ddr_core_0 + +.init_array : { + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; +} > ps7_ddr_core_0 + +.fini_array : { + __fini_array_start = .; + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array)) + __fini_array_end = .; +} > ps7_ddr_core_0 + +.ARM.attributes : { + __ARM.attributes_start = .; + *(.ARM.attributes) + __ARM.attributes_end = .; +} > ps7_ddr_core_0 + +.sdata : { + __sdata_start = .; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + __sdata_end = .; +} > ps7_ddr_core_0 + +.sbss (NOLOAD) : { + __sbss_start = .; + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + __sbss_end = .; +} > ps7_ddr_core_0 + +.tdata : { + __tdata_start = .; + *(.tdata) + *(.tdata.*) + *(.gnu.linkonce.td.*) + __tdata_end = .; +} > ps7_ddr_core_0 + +.tbss : { + __tbss_start = .; + *(.tbss) + *(.tbss.*) + *(.gnu.linkonce.tb.*) + __tbss_end = .; +} > ps7_ddr_core_0 + +.bss (NOLOAD) : { + __bss_start = .; + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + __bss_end = .; +} > ps7_ddr_core_0 + +_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 ); + +_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 ); + +/* Generate Stack and Heap definitions */ + +.heap (NOLOAD) : { + . = ALIGN(16); + _heap = .; + HeapBase = .; + _heap_start = .; + . += _HEAP_SIZE; + _heap_end = .; + HeapLimit = .; +} > ps7_ddr_core_0 + +.stack (NOLOAD) : { + . = ALIGN(16); + _stack_end = .; + . += _STACK_SIZE; + . = ALIGN(16); + _stack = .; + __stack = _stack; + . = ALIGN(16); + _irq_stack_end = .; + . += _IRQ_STACK_SIZE; + . = ALIGN(16); + __irq_stack = .; + _supervisor_stack_end = .; + . += _SUPERVISOR_STACK_SIZE; + . = ALIGN(16); + __supervisor_stack = .; + _abort_stack_end = .; + . += _ABORT_STACK_SIZE; + . = ALIGN(16); + __abort_stack = .; + _fiq_stack_end = .; + . += _FIQ_STACK_SIZE; + . = ALIGN(16); + __fiq_stack = .; + _undef_stack_end = .; + . += _UNDEF_STACK_SIZE; + . = ALIGN(16); + __undef_stack = .; +} > ps7_ddr_core_0 + +_end = .; +} + diff --git a/src/APP/Aufgabe2/ps7/core0/main.c b/src/APP/Aufgabe2/ps7/core0/main.c new file mode 100644 index 0000000..62db893 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/main.c @@ -0,0 +1,83 @@ +/* + ============================================================================ + Name : main.c + Author : Laurenz Borchers + Version : + Copyright : Copyright belongs to the authors + Description : Hello World in C, Praktikum Aufgabe 2 + ============================================================================ + */ + +#include +#include +#include "ucos_uartps.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "xil_testmem.h" +#include "xil_printf.h" + +#define HELLO_WORLD_TASK_PRIO 64 +#define CALC_TASK_PRIO 64 + +#define HELLO_WORLD_TASK_STK_SIZE 16 +#define CALC_TASK_STK_SIZE 32 + +static OS_STK HelloWorldTaskStk[HELLO_WORLD_TASK_STK_SIZE]; +static OS_STK CalcTaskStk[HELLO_WORLD_TASK_STK_SIZE]; + + +int f(int n) +{ + if (n == 1) + return n; + else + return (f(n-1) + f(n-3)); +} + +void HelloWorldTask (void *pdata) +{ + while(1){ + UCOS_Printf("Hello World!"); + OSTimeDly(OS_TICKS_PER_SEC*50); + } +} + +void CalcTask (void *pdata) +{ + uint8_t n=50; + for (uint8_t i = 1; i <= n; i) + { + UCOS_Printf("%u", f(i)); + } +} + +void InitDoneCallback(void * p_arg){ + (void) p_arg; + UCOS_Print("OS started!\r\n"); + + OSTaskCreateExt(HelloWorldTask, + 0, + &HelloWorldTaskStk[0], + HELLO_WORLD_TASK_PRIO, + &HelloWorldTaskStk[0], + 0, + 0); + + OSTaskCreateExt(CalcTask, + 0, + CALC_TASK_PRIO, + CALC_TASK_PRIO, + &CalcTaskStk[0], + CALC_TASK_STK_SIZE, + 0 + ); + + while(1){ + OSTimeDly(); + } +} + +int main(void) { + MMUInit(); + while (1);; +} diff --git a/src/APP/Aufgabe2/ps7/core0/src/app_hooks.c b/src/APP/Aufgabe2/ps7/core0/src/app_hooks.c new file mode 100644 index 0000000..b375307 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/src/app_hooks.c @@ -0,0 +1,259 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* uC/OS-II +* Application Hooks +* +* Filename : app_hooks.c +* Version : V1.00 +* Programmer(s) : FT +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +*/ + +#include + + +/* +********************************************************************************************************* +* EXTERN GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL CONSTANTS +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL DATA TYPES +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* LOCAL TABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL FUNCTION PROTOTYPES +********************************************************************************************************* +*/ + + + +/* +********************************************************************************************************** +********************************************************************************************************** +** GLOBAL FUNCTIONS +********************************************************************************************************** +********************************************************************************************************** +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +** uC/OS-II APP HOOKS +********************************************************************************************************* +********************************************************************************************************* +*/ + +#if (OS_APP_HOOKS_EN > 0) + +/* +********************************************************************************************************* +* TASK CREATION HOOK (APPLICATION) +* +* Description : This function is called when a task is created. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being created. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskCreateHook (OS_TCB *ptcb) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskCreateHook(ptcb); +#endif +} + +/* +********************************************************************************************************* +* TASK DELETION HOOK (APPLICATION) +* +* Description : This function is called when a task is deleted. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being deleted. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskDelHook (OS_TCB *ptcb) +{ + (void)ptcb; +} + +/* +********************************************************************************************************* +* IDLE TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskIdleHook(), which is called by the idle task. This hook +* has been added to allow you to do such things as STOP the CPU to conserve power. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are enabled during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 251 +void App_TaskIdleHook (void) +{ +} +#endif + +/* +********************************************************************************************************* +* STATISTIC TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskStatHook(), which is called every second by uC/OS-II's +* statistics task. This allows your application to add functionality to the statistics task. +* +* Argument(s) : none. +********************************************************************************************************* +*/ + +void App_TaskStatHook (void) +{ +} + +/* +********************************************************************************************************* +* TASK RETURN HOOK (APPLICATION) +* +* Description: This function is called if a task accidentally returns. In other words, a task should +* either be an infinite loop or delete itself when done. +* +* Arguments : ptcb is a pointer to the task control block of the task that is returning. +* +* Note(s) : none +********************************************************************************************************* +*/ + + +#if OS_VERSION >= 289 +void App_TaskReturnHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TASK SWITCH HOOK (APPLICATION) +* +* Description : This function is called when a task switch is performed. This allows you to perform other +* operations during a context switch. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are disabled during this call. +* +* (2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that +* will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the +* task being switched out (i.e. the preempted task). +********************************************************************************************************* +*/ + +#if OS_TASK_SW_HOOK_EN > 0 +void App_TaskSwHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN > 0) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskSwHook(); +#endif +} +#endif + +/* +********************************************************************************************************* +* OS_TCBInit() HOOK (APPLICATION) +* +* Description : This function is called by OSTCBInitHook(), which is called by OS_TCBInit() after setting +* up most of the TCB. +* +* Argument(s) : ptcb is a pointer to the TCB of the task being created. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 204 +void App_TCBInitHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TICK HOOK (APPLICATION) +* +* Description : This function is called every tick. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_TIME_TICK_HOOK_EN > 0 +void App_TimeTickHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TickHook(); +#endif +} +#endif +#endif diff --git a/src/APP/Aufgabe2/ps7/core0/src/uartps_cfg.c b/src/APP/Aufgabe2/ps7/core0/src/uartps_cfg.c new file mode 100644 index 0000000..dae6c62 --- /dev/null +++ b/src/APP/Aufgabe2/ps7/core0/src/uartps_cfg.c @@ -0,0 +1,17 @@ + +#include "ucos_uartps.h" +#include "xparameters.h" +#include "xparameters_ps.h" + +/* + * The uart configuration table for devices + */ +UCOS_UARTPS_Config UCOS_UARTPS_ConfigTable[] = { + { + XPAR_PS7_UART_1_DEVICE_ID, + XPAR_PS7_UART_1_BASEADDR, + XPAR_PS7_UART_1_UART_CLK_FREQ_HZ, + XPAR_PS7_UART_1_HAS_MODEM, + XPAR_PS7_UART_1_INT_SOURCE + } +}; diff --git a/src/APP/Aufgabe3/ps7/core0/build/config.mk b/src/APP/Aufgabe3/ps7/core0/build/config.mk new file mode 100644 index 0000000..2135778 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/build/config.mk @@ -0,0 +1,11 @@ +#µController dependent flags +MCFLAGS =-mcpu=cortex-a9 -march=armv7-a -mthumb -mthumb-interwork -mfloat-abi=softfp -mfpu=neon + +#Optimization +OPTIMIZE=-O0 -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections + +#Debug Level +DEBUG =-g3 + +#Linker flags +LDFLAGS = -nostartfiles -Xlinker --gc-sections -lm diff --git a/src/APP/Aufgabe3/ps7/core0/build/includes.mk b/src/APP/Aufgabe3/ps7/core0/build/includes.mk new file mode 100644 index 0000000..7095510 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/build/includes.mk @@ -0,0 +1,48 @@ + +INC += -I"$(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/cfg/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ipi" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_ttcps/src" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common" + +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/" +INC += -I"$(SRC_DIR)/Modules/MMU" + + +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/" + +#scugic.h fix +INC += -I"$(SRC_DIR)/Xilinx/libsrc/scugic_v3_9/src/" + +#uart includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/uartps_v3_6/src/" + +#xttcps includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/" + + +#gpio includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/" + + + diff --git a/src/APP/Aufgabe3/ps7/core0/build/sources.mk b/src/APP/Aufgabe3/ps7/core0/build/sources.mk new file mode 100644 index 0000000..e4aea8c --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/build/sources.mk @@ -0,0 +1,66 @@ +#Startup file +SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/asm_vectors.S +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/subdir.mk +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/subdir.mk + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_osii/src/bsp/$(ARCH)/ucos_osii_bsp.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_common/src/$(ARCH)/cpu_bsp.c + + + +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/main.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/app_hooks.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/uartps_cfg.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/ttc_timer.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xttcps_g.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xgpiops_g.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/GNU/cpu_cache_armv7_generic_l1_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/cpu_cache_armv7_generic_l1.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/cpu_core.c +#SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.c +#SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_math.c + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.c + +-include $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-II/kal.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Collections/slist.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Auth/auth.c + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/subdir.mk + +#mmu +SRC += $(SRC_DIR)/Modules/MMU/mmu.c + + +#src for triple timer counter +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_options.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_sinit.c + +#src for GPIO +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_hw.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_intr.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_sinit.c + + + + diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/app_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/app_cfg.h new file mode 100644 index 0000000..9b1cac2 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/app_cfg.h @@ -0,0 +1,82 @@ +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* This BSP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* Filename : app_cfg.h +* Version : V1.42 +* Programmer(s) : JBL +********************************************************************************************************* +*/ + +#ifndef UCOS_APP_CFG_PRESENT +#define UCOS_APP_CFG_PRESENT + +#include + +#include "../../../../Aufgabe3/ps7/core0/cfg/xparameters.h" + +#define APP_CPU_ENABLED DEF_ENABLED + +#define APP_LIB_ENABLED DEF_ENABLED + +#define APP_COMMON_ENABLED DEF_ENABLED + +#define APP_SHELL_ENABLED DEF_DISABLED + +#define APP_CLK_ENABLED DEF_DISABLED + +#define APP_OSIII_ENABLED DEF_DISABLED + +#define APP_OSII_ENABLED DEF_ENABLED + +#define APP_TCPIP_ENABLED DEF_DISABLED + +#define APP_TCPIP_EXP_ENABLED DEF_DISABLED + +#define APP_DHCPC_ENABLED DEF_DISABLED + +#define APP_DNSC_ENABLED DEF_DISABLED + +#define APP_HTTPC_ENABLED DEF_DISABLED + +#define APP_MQTTC_ENABLED DEF_DISABLED + +#define APP_TELNETS_ENABLED DEF_DISABLED + +#define APP_IPERF_ENABLED DEF_DISABLED + +#define APP_FS_ENABLED DEF_DISABLED + +#define APP_USBD_ENABLED DEF_DISABLED + +#define APP_USBH_ENABLED DEF_DISABLED + +#define APP_OPENAMP_ENABLED DEF_DISABLED + +#define OS_TASK_TMR_PRIO 3 + + +#endif /* #ifndef UCOS_APP_CFG_PRESENT */ + diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/can_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/can_cfg.h new file mode 100644 index 0000000..e2d25db --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/can_cfg.h @@ -0,0 +1,202 @@ +/* +********************************************************************************************************* +* uC/CAN +* The Embedded CAN suite +* +* (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CAN is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* uC/CAN CONFIGURATION +* +* ZYNQ ZC7000 Series +* CAN DRIVER +* Filename : can_cfg.h +* Version : V2.41.00 +* Programmer(s) : E0 +* DC +********************************************************************************************************* +*/ + +#ifndef _CAN_CFG_H_ +#define _CAN_CFG_H_ + +#include "lib_def.h" + + +/* +********************************************************************************************************* +* COMMON DEFINES & ENUMERATIONS +********************************************************************************************************* +*/ + + /* Definiton for CANSIG_GRANULARITY, Options: */ +#define CAN_CFG_BIT 0u /* BIT */ +#define CAN_CFG_BYTE 1u /* BYTE */ + +#ifndef CAN_FALSE +#define CAN_FALSE 0u +#endif + +#ifndef CAN_TRUE +#define CAN_TRUE 1u +#endif + +#ifndef NULL_PTR +#define NULL_PTR (void *)0 +#endif + + /* ------------ APPLICATION ENUMERATIONS -------------- */ +enum { + S_NODESTATUS = 0, + S_CPULOAD, + S_COUNTER, + S_MAX, +}; + +enum { + M_STATUS = 0, + M_COMMAND, + M_MAX +}; + + +/* +********************************************************************************************************* +* MULTIPLE CAN CONTROLLERS +********************************************************************************************************* +*/ + +#define CAN_MODULE_CHANNEL_0 DEF_ENABLED +#define CAN_MODULE_CHANNEL_1 DEF_DISABLED + + +/* +********************************************************************************************************* +* DRIVER SPECIFIC DEFINES +********************************************************************************************************* +*/ + /* ---------------- BAUDRATE SETTINGS ----------------- */ +#define CAN_DEFAULT_BAUDRATE 1000000u /* Default Baudrate */ +#define CAN_DEFAULT_SP 750u /* Default Bit Sample Point in 1/10 % */ +#define CAN_DEFAULT_RJW 125u /* Default Re-Synch Jump Width in 1/10 % */ + + /* ---------------- TIMEOUT SETTINGS ------------------ */ +#define CAN_TIMEOUT_ERR_VAL 100000uL /* Timeout Value for While Loop Error Checks */ + + +/* ================================== ADVANCED DRIVER CONFIGURATION: DEFAULT VALUES ================================== */ +/* By Default, the following Driver specific settings for the ZYNQ ZC7xxx Driver are set to their default values */ +/* unless they are modified by customer needs. */ +/* */ +/* By Default, the Watermark level is configured to Maximum Watermark Value in the Driver, based on the reset value */ +/* presented by the Reference Manual. Redefine the following define to modify the Watermark Level for the following. */ +/* Tx FIFO Empty & Rx FIFO Full Watermark Level(s): */ +/* NOTE : The VALID range is between 1 & 63. */ +/* */ +/* #define CAN_WATERMARK_Rx_Tx_SIZE 63u */ +/* */ +/* By Default, the Operating Mode of the CAN controller is configured to "NORMAL" Mode. For diagnostic checking, */ +/* additional operating modes have been included in the driver. Redefine the following define to modify the Operating */ +/* Mode to either "LOOP BACK" or "SNOOP" Mode(s). */ +/* NOTE that only one operating mode can be selected at once at Initialization. Once CAN has been Initialized it */ +/* is possible to change between Operating Modes at run-time using the xxx_CAN_IoCtl() API Function call. */ +/* */ +/* #define CAN_DIAGNOSTIC_OFF 0u */ +/* #define CAN_DIAGNOSTIC_LOOPBACK 1u */ +/* #define CAN_DIAGNOSTIC_SNOOP 2u */ +/* */ +/* #define CAN_DIAGNOSTIC_SELECT CAN_DIAGNOSTIC_LOOPBACK */ +/* */ +/* ==================================================================================================================== */ + + +/* +********************************************************************************************************* +* CAN BUS +********************************************************************************************************* +*/ + +#define CANBUS_EN 1u /* Enable CAN Bus Management */ +#define CANBUS_N 3u /* Number of busses */ +#define CANBUS_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANBUS_TX_HANDLER_EN 1u /* Enable usage of CanBusTxHandler */ +#define CANBUS_RX_HANDLER_EN 1u /* Enable usage of CanBusRxHandler */ +#define CANBUS_NS_HANDLER_EN 1u /* Enable usage of CanBusNsHandler */ + +#define CANBUS_STAT_EN 1u /* Enable Bus Statistics */ +#define CANBUS_TX_QSIZE (2u * CANBUS_N) /* Transmit Queue Size in CAN Frames for each CAN Bus */ +#define CANBUS_RX_QSIZE (2u * CANBUS_N) /* Receive Queue Size in CAN Frames for each CAN Bus */ + +#define CANBUS_HOOK_NS_EN 1u /* Enable Node Status Handler Hook Function */ +#define CANBUS_HOOK_RX_EN 1u /* Enable Rx Handler Hook Function */ +#define CANBUS_RX_READ_ALWAYS_EN 1u /* If enabled the Rx Handler executes a read even.. */ + /* .. when frames can't be allocated */ + + +/* +********************************************************************************************************* +* CAN MESSAGE +********************************************************************************************************* +*/ + +#define CANMSG_EN 1u /* Enable CAN Message Support */ +#define CANMSG_N 2u /* Number of messages */ +#define CANMSG_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN SIGNAL +********************************************************************************************************* +*/ + +#define CANSIG_EN 1u /* Enable CAN Signal Database */ +#define CANSIG_N 3u /* Number of signals */ +#define CANSIG_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANSIG_MAX_WIDTH 4u /* Maximal signal width in byte */ +#define CANSIG_GRANULARITY CAN_CFG_BYTE /* Set signal resolution to byte */ +#define CANSIG_STATIC_CONFIG 1u /* To reduce memory usage, declare static signal table */ +#define CANSIG_USE_DELETE 0u /* To reduce memory usage don't use delete functions */ +#define CANSIG_CALLBACK_EN 0u /* Enable callback functions */ + + +/* +********************************************************************************************************* +* CAN FRAME +********************************************************************************************************* +*/ + +#define CANFRM_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN OS +********************************************************************************************************* +*/ + +#define CANOS_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CONFIGURATION END +********************************************************************************************************* +*/ + +#endif /* #ifndef _CAN_CFG_H_ */ diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/cpu_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/cpu_cfg.h new file mode 100644 index 0000000..b7b42d2 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/cpu_cfg.h @@ -0,0 +1,216 @@ +/* +********************************************************************************************************* +* uC/CPU +* CPU CONFIGURATION & PORT LAYER +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CPU is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CPU CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : cpu_cfg.h +* Version : V1.30.02 +* Programmer(s) : SR +* ITJ +* JBL +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef CPU_CFG_MODULE_PRESENT +#define CPU_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +* CPU NAME CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_NAME_EN to enable/disable CPU host name feature : +* +* (a) CPU host name storage +* (b) CPU host name API functions +* +* (2) Configure CPU_CFG_NAME_SIZE with the desired ASCII string size of the CPU host name, +* including the terminating NULL character. +* +* See also 'cpu_core.h GLOBAL VARIABLES Note #1'. +********************************************************************************************************* +*/ + + /* Configure CPU host name feature (see Note #1) : */ +#define CPU_CFG_NAME_EN DEF_DISABLED + /* DEF_DISABLED CPU host name DISABLED */ + /* DEF_ENABLED CPU host name ENABLED */ + + /* Configure CPU host name ASCII string size ... */ +#define CPU_CFG_NAME_SIZE 16 + + +/* +********************************************************************************************************* +* CPU TIMESTAMP CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_TS_xx_EN to enable/disable CPU timestamp features : +* +* (a) CPU_CFG_TS_32_EN enable/disable 32-bit CPU timestamp feature +* (b) CPU_CFG_TS_64_EN enable/disable 64-bit CPU timestamp feature +* +* (2) (a) Configure CPU_CFG_TS_TMR_SIZE with the CPU timestamp timer's word size : +* +* CPU_WORD_SIZE_08 8-bit word size +* CPU_WORD_SIZE_16 16-bit word size +* CPU_WORD_SIZE_32 32-bit word size +* CPU_WORD_SIZE_64 64-bit word size +* +* (b) If the size of the CPU timestamp timer is not a binary multiple of 8-bit octets +* (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple octet word +* size SHOULD be configured (e.g. to 16-bits). However, the minimum supported word +* size for CPU timestamp timers is 8-bits. +* +* See also 'cpu_core.h FUNCTION PROTOTYPES CPU_TS_TmrRd() Note #2a'. +********************************************************************************************************* +*/ + + /* Configure CPU timestamp features (see Note #1) : */ +#define CPU_CFG_TS_32_EN DEF_ENABLED +#define CPU_CFG_TS_64_EN DEF_ENABLED + /* DEF_DISABLED CPU timestamps DISABLED */ + /* DEF_ENABLED CPU timestamps ENABLED */ + + /* Configure CPU timestamp timer word size ... */ + /* ... (see Note #2) : */ +#define CPU_CFG_TS_TMR_SIZE CPU_WORD_SIZE_64 + + +/* +********************************************************************************************************* +* CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_INT_DIS_MEAS_EN to enable/disable measuring CPU's interrupts +* disabled time : +* +* (a) Enabled, if CPU_CFG_INT_DIS_MEAS_EN #define'd in 'cpu_cfg.h' +* +* (b) Disabled, if CPU_CFG_INT_DIS_MEAS_EN NOT #define'd in 'cpu_cfg.h' +* +* See also 'cpu_core.h FUNCTION PROTOTYPES Note #1'. +* +* (b) Configure CPU_CFG_INT_DIS_MEAS_OVRHD_NBR with the number of times to measure & +* average the interrupts disabled time measurements overhead. +* +* See also 'cpu_core.c CPU_IntDisMeasInit() Note #3a'. +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU interrupts disabled time ... */ +#define CPU_CFG_INT_DIS_MEAS_EN /* ... measurements feature (see Note #1a). */ +#endif + + /* Configure number of interrupts disabled overhead ... */ +#define CPU_CFG_INT_DIS_MEAS_OVRHD_NBR 1u /* ... time measurements (see Note #1b). */ + + +/* +********************************************************************************************************* +* CPU COUNT ZEROS CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT to define count leading zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +* +* (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU count leading zeros bits ... */ +#define CPU_CFG_LEAD_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1a). */ +#endif + +#if 0 /* Configure CPU count trailing zeros bits ... */ +#define CPU_CFG_TRAIL_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1b). */ +#endif + + +/* +********************************************************************************************************* +* CPU ENDIAN TYPE OVERRIDE +* +* Note(s) : (1) Configure CPU_CFG_ENDIAN_TYPE to override the default CPU endian type defined in cpu.h. +* +* (a) CPU_ENDIAN_TYPE_BIG Big- endian word order (CPU words' most significant +* octet @ lowest memory address) +* (b) CPU_ENDIAN_TYPE_LITTLE Little-endian word order (CPU words' least significant +* octet @ lowest memory address) +* +* (2) Defining CPU_CFG_ENDIAN_TYPE here is only valid for supported bi-endian architectures. +* See 'cpu.h CPU WORD CONFIGURATION Note #3' for details +********************************************************************************************************* +*/ + +#if 0 +#define CPU_CFG_ENDIAN_TYPE CPU_ENDIAN_TYPE_BIG /* Defines CPU data word-memory order (see Note #2). */ +#endif + + +/* +********************************************************************************************************* +* CACHE MANAGEMENT +* +* Note(s) : (1) Configure CPU_CFG_CACHE_MGMT_EN to enable the cache managment API. + +* +* (2) Defining CPU_CFG_CACHE_MGMT_EN to DEF_ENABLED only enable the cache management function. +* Cache are assumed to be configured and enabled by the time CPU_init() is called. +********************************************************************************************************* +*/ + +#define CPU_CFG_CACHE_MGMT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of CPU cfg module include. */ + +#define CPU_CACHE_CFG_L2C310_BASE_ADDR 0xF8F02000 diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/dhcp-c_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/dhcp-c_cfg.h new file mode 100644 index 0000000..911724f --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/dhcp-c_cfg.h @@ -0,0 +1,146 @@ +/* +********************************************************************************************************* +* uC/DHCPc +* Dynamic Host Configuration Protocol Client +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DHCP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DHCP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dhcp-c_cfg.h +* Version : V2.10.00 +* Programmer(s) : SR +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* TASKS PRIORITIES +* Notes: (1) Task priorities configuration values should be used by the DHCPc OS port. The following task priorities +* should be defined: +* +* DHCPc_OS_CFG_TASK_PRIO +* DHCPc_OS_CFG_TMR_TASK_PRIO +* +* Task priorities can be defined either in this configuration file 'dhcp-c_cfg.h' or in a global +* OS tasks priorities configuration header file which must be included in 'dhcp-c_cfg.h'. +********************************************************************************************************* +*/ + + /* See Note #1. */ +#define DHCPc_OS_CFG_TASK_PRIO 13 +#define DHCPc_OS_CFG_TMR_TASK_PRIO 14 + + +/* +********************************************************************************************************* +* STACK SIZES +* Size (depth) of the task stacks (See the definition of CPU_STK for stack width) +********************************************************************************************************* +*/ + +#define DHCPc_OS_CFG_TASK_STK_SIZE 512 +#define DHCPc_OS_CFG_TMR_TASK_STK_SIZE 256 + + +/* +********************************************************************************************************* +* DHCPc +* +* Note(s) : (1) Default port for DHCP server is 67, and default port for DHCP client is 68. +* +* (3) Configure DHCPc_CFG_MAX_NBR_IF to the maximum number of interface this DHCP client will +* be able to manage at a given time. +* +* (4) Once the DHCP server has assigned the client an address, the later may perform a final +* check prior to use this address in order to make sure it is not being used by another +* host on the network. +********************************************************************************************************* +*/ + +#define DHCPc_CFG_IP_PORT_SERVER 67 +#define DHCPc_CFG_IP_PORT_CLIENT 68 + +#define DHCPc_CFG_MAX_RX_TIMEOUT_MS 1000 + +#define DHCPc_CFG_PARAM_REQ_TBL_SIZE 5 + +#define DHCPc_CFG_MAX_NBR_IF 1 + +#define DHCPc_CFG_ADDR_VALIDATE_EN DEF_ENABLED + /* ... (see Note #4) : */ + /* DEF_DISABLED Validation NOT performed */ + /* DEF_ENABLED Validation performed */ + +#define DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN DEF_ENABLED + /* DEF_DISABLED local-link configuration DISABLED */ + /* DEF_ENABLED local-link configuration ENABLED */ + +#define DHCPc_CFG_LOCAL_LINK_MAX_RETRY 3 + /* link-local address. */ + + +/* +********************************************************************************************************* +* DHCPc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DHCPc_CFG_ARG_CHK_EXT_EN to enable/disable the DHCP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure DHCPc_CFG_ARG_CHK_DBG_EN to enable/disable the DHCP client internal debug +* argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the DHCP client. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the DHCP client. +* +* (3) Configure DHCPc_DBG_CFG_MEM_CLR_EN to enable/disable the DHCP client from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define DHCPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define DHCPc_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure memory clear feature (see Note #3) : */ +#define DHCPc_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/dns-c_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/dns-c_cfg.h new file mode 100644 index 0000000..2756762 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/dns-c_cfg.h @@ -0,0 +1,111 @@ +/* +********************************************************************************************************* +* uC/DNSc +* Domain Name Server (client) +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DNSc is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DNS CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dns-c_cfg.h +* Version : V2.00.01 +* Programmer(s) : AA +********************************************************************************************************* +*/ + +#ifndef DNSc_CFG_MODULE_PRESENT +#define DNSc_CFG_MODULE_PRESENT + +#include + + +/* +********************************************************************************************************* +* DNSc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_ARG_CHK_EXT_EN to enable/disable the DNS client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* See Note 1. */ +#define DNSc_CFG_ARG_CHK_EXT_EN DEF_DISABLED + /* DEF_DISABLED External argument check DISABLED */ + /* DEF_ENABLED External argument check ENABLED */ + +/* +********************************************************************************************************* +* DNSc FEATURES CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_MODE_ASYNC_EN to enable/disable the DNS client asynchronous communication mode: +* +* (a) When ENABLED, A dedicated task will handle all host resolution request. It will be possible to +* call DNS API to get remote host address without blocking. +* +* (b) When DISABLED, The API to get remote host will always block until the resolution is completed. +* +* (2) Configure DNSc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the asynchronous +* communication is enabled. +* +* (a) When ENABLED, It will be possible to block when calling the DNS API to get remote host until the +* resolution is completed (via a flag option). +* +* (b) When DISABLED, The API to get remote host will always be non-blocking, must poll DNS client to +* know when the resolution is completed. +********************************************************************************************************* +*/ + + /* Configure asynchronous mode feature, See Note #1 ... */ +#define DNSc_CFG_MODE_ASYNC_EN DEF_DISABLED + /* DEF_DISABLED Asynchronous mode DISABLED */ + /* DEF_ENABLED Asynchronous mode ENABLED */ + + + /* Configure blocking option feature, See Note #2 ... */ +#define DNSc_CFG_MODE_BLOCK_EN DEF_DISABLED + /* DEF_DISABLED Blocking option DISABLED */ + /* DEF_ENABLED Blocking option ENABLED */ + +/* +********************************************************************************************************* +* DNSc RUN-TIME STRUCTURE CONFIGURATION +* +* Note(s) : (1) These structures should be defined into a 'C' file. +********************************************************************************************************* +*/ + +extern const DNSc_CFG DNSc_Cfg; /* Must always be defined. */ + +#if (DNSc_CFG_MODE_ASYNC_EN == DEF_ENABLED) +extern const DNSc_CFG_TASK DNSc_CfgTask; /* Not required when Asynchronous mode is disabled. */ +#endif + +#endif diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/gt_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/gt_cfg.h new file mode 100644 index 0000000..01dd48f --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/gt_cfg.h @@ -0,0 +1,23 @@ +/* + * gt_cfg.h + * + * Created on: Aug 19, 2014 + * Author: matthiasb + */ + +#ifndef GT_CFG_H_ +#define GT_CFG_H_ + +#define GT_USE_NP_REGIONS 1 +#define GT_USE_NP_MEAS 1 +#define GT_NUM_OF_TASKS 3 +#define GT_REPORT_CONSOLE 0 +#define GT_REPORT_SVC 0 + +#define GT_TTC_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define GT_TTC_PWM_INTR_ID XPAR_XTTCPS_2_INTR +#define GT_TIMER_TICKS_PER_SEC 10000 + +#include "../../../../Aufgabe3/ps7/core0/cfg/gt_core_cfg.h" + +#endif /* GT_CFG_H_ */ diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/gt_core_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/gt_core_cfg.h new file mode 100644 index 0000000..3d1a566 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/gt_core_cfg.h @@ -0,0 +1,24 @@ +/* + * gt_core_cfg.h + * + * Created on: Aug 19, 2014 + * Author: matthiasb + */ + +#ifndef GT_CORE_CFG_H_ +#define GT_CORE_CFG_H_ + +#define GT_USE_CPU_ARM9 0 +#define GT_USE_CPU_CM3 0 +#define GT_USE_CPU_CM7 0 +#define GT_USE_CPU_ARM_V7_A 1 + +#define GT_STACKSIZE 256 +#define GT_MAXTASKS 10 +#define GT_MAXQACT 5 + +#if ( GT_NUM_OF_TASKS > GT_MAXTASKS ) +#error "Too many tasks, increase GT_MAXTASKS or decrease GT_NUM_OF_TASKS" +#endif + +#endif /* GT_CORE_CFG_H_ */ diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/http-c_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/http-c_cfg.h new file mode 100644 index 0000000..26df728 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/http-c_cfg.h @@ -0,0 +1,224 @@ +/* +********************************************************************************************************* +* uC/HTTP +* Hypertext Transfer Protocol +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/HTTP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* HTTP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : http-c_cfg.h +* Version : V3.00.01 +* Programmer(s) : MM +* AL +********************************************************************************************************* +* Note(s) : (1) Assumes the following versions (or more recent) of software modules are included in +* the project build : +* +* (a) uC/CPU V1.29.02 +* (b) uC/LIB V1.38.00 +* (c) uC/Common V1.00.00 +* (d) uC/TCP-IP V3.03.00 +* +* +* (2) For additional details on the features available with uC/HTTPc, the API, the +* installation, etc. Please refer to the uC/HTTPc documentation available at +* https://doc.micrium.com/HTTPc. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef HTTPc_CFG_MODULE_PRESENT +#define HTTPc_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* COMPILE-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* HTTP ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_ARG_CHK_EXT_EN to enable/disable the HTTP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT TASK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_MODE_ASYNC_TASK_EN to enable/disable HTTP client task. +* (a) DEF_DISABLED : No HTTP client task will be created to process the HTTP requests. +* The Blocking HTTPc API will be enabled. +* +* (b) DEF_ENABLED : An HTTP client task will be created to process all the HTTP requests. +* The Non-Blocking HTTPc API will be enabled. Therefore, multiple +* connections can be handle by the task simultaneously. +* +* (2) Configure HTTPc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the +* asynchronous HTTPc Task is enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_MODE_ASYNC_TASK_EN DEF_DISABLED + +#define HTTPc_CFG_MODE_BLOCK_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT PERSISTENT CONNECTION CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_PERSISTENT_EN to enable/disable Persistent Connection support. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_PERSISTENT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT CHUNKED TRANSFER CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_CHUNK_TX_EN to enable/disable Chunked Transfer support in Transmission. +* +* (2) Chunked Transfer in Reception is always enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_CHUNK_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT QUERY STRING CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_QUERY_STR_EN to enable/disable Query String support in URL. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_QUERY_STR_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT HEADER FIELD CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_HDR_RX_EN to enable/disable header field processing in reception +* (i.e for headers received in the HTTP response. +* +* (2) Configure HTTPc_CFG_HDR_TX_EN to enable/disable header field processing in transmission +* (i.e for headers to include in the HTTP request. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_HDR_RX_EN DEF_ENABLED + + +#define HTTPc_CFG_HDR_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT FORM CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_FORM_EN to enable/disable HTTP form creation source code. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_FORM_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT USER DATA CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_USER_DATA_EN to enable/disable user data pointer in HTTPc_CONN +* and HTTPc_REQ structure. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_USER_DATA_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT WEBSOCKET CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_WEBSOCKET_EN to enable/disable the Websocket feature. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_WEBSOCKET_EN DEF_DISABLED + + +/* +********************************************************************************************************* +********************************************************************************************************* +* RUN-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const HTTP_TASK_CFG HTTPc_TaskCfg; +extern const HTTPc_CFG HTTPc_Cfg; + + +/* =============================================== END =============================================== */ +#endif /* HTTPc_CFG_MODULE_PRESENT */ diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/imu.h b/src/APP/Aufgabe3/ps7/core0/cfg/imu.h new file mode 100644 index 0000000..eb504c5 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/imu.h @@ -0,0 +1,45 @@ +/* + * imu.h + * + * Created on: Nov 6, 2018 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ + +#include + +#include "../../../../Aufgabe3/ps7/core0/cfg/xparameters.h" +#include "xiicps.h" + + + + +#define MPU9250_AD 0x68 //Adresse d. I²C slaves festlegen +#define GYRO_CONFIG_AD 0x1B //Gyroskop config register +#define ACCEL_CONFIG_1_AD 0x1C //Beschleunigungssensor config reg1 +#define ACCEL_CONFIG_2_AD 0x1D //Beschleunigungssensor config reg1 +#define CONFIG_AD 0x1A //IMU config reg +#define PWR_MGMT_1_AD 0x6B //cloc power management register +#define GYRO_XOUT_H_AD 0x43 //hier das Startregister der Gyroskopdaten +#define ACCEL_XOUT_H_AD 0x3B //startreg Accel Daten + +#define IIC_DEVICE_ID XPAR_XIICPS_1_DEVICE_ID //??? in xparameters.h noch die iic Daten für das Gerät festlegen? +#define IIC_SCLK_RATE 100000 + +unsigned int mpu9250_Imu_Init(void *pdata); +uint8_t mpu9250_Iic_Init(); +void mpu9250_Init(void); +uint8_t mpu9250_Write_Reg(uint8_t iic_address, uint8_t data); +int8_t mpu9250_Read_Data(uint8_t iic_address, uint8_t length, u8 RecvBuffer[]); +uint8_t mpu9250_Map_Gyro_Data(int16_t result[]); +uint8_t mpu9250_Map_Acc_Data(int16_t result[]); +uint8_t mpu9250_Read_Status(int16_t result[]); +unsigned int mpu9250_Get_Data_Task(void *pdata); + + + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ */ + + diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/intr_timer.h b/src/APP/Aufgabe3/ps7/core0/cfg/intr_timer.h new file mode 100644 index 0000000..b7a4302 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/intr_timer.h @@ -0,0 +1,58 @@ +/* + * intr_timer.h + * + * Created on: Nov 13, 2018 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE3_PS7_CORE0_CFG_INTR_TIMER_H_ +/************************** Constant Definitions *****************************/ + +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are only defined here such that a user can easily + * change all the needed parameters in one place. + */ +#define TTC_TICK_DEVICE_ID XPAR_XTTCPS_1_DEVICE_ID +#define TTC_TICK_INTR_ID XPAR_XTTCPS_1_INTR + +#define TTC_PWM_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID +#define TTC_PWM_INTR_ID XPAR_XTTCPS_0_INTR +#define TTCPS_CLOCK_HZ XPAR_XTTCPS_0_CLOCK_HZ + +#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID + +/* + * Constants to set the basic operating parameters. + * PWM_DELTA_DUTY is critical to the running time of the test. Smaller values + * make the test run longer. + */ +#define TICK_TIMER_FREQ_HZ 100 /* Tick timer counter's output frequency */ +#define PWM_OUT_FREQ 350 /* PWM timer counter's output frequency */ + +#define PWM_DELTA_DUTY 50 /* Initial and increment to duty cycle for PWM */ +#define TICKS_PER_CHANGE_PERIOD TICK_TIMER_FREQ_HZ * 5 /* Tick signals PWM */ + + + +/************************** Function Prototypes ******************************/ + +static int TmrInterruptExample(void); /* Main test */ + +/* Set up routines for timer counters */ +static int SetupTicker(void); +static int SetupPWM(void); +static int SetupTimer(int DeviceID); + +/* Interleaved interrupt test for both timer counters */ +static int WaitForDutyCycleFull(void); + +static int SetupInterruptSystem(u16 IntcDeviceID, XScuGic *IntcInstancePtr); + +static void TickHandler(void *CallBackRef); +static void PWMHandler(void *CallBackRef); + + + + +#endif /* SRC_APP_AUFGABE3_PS7_CORE0_CFG_INTR_TIMER_H_ */ diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/lib_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/lib_cfg.h new file mode 100644 index 0000000..cf447ea --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/lib_cfg.h @@ -0,0 +1,171 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find information about uC/LIB by visiting doc.micrium.com. +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CUSTOM LIBRARY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : lib_cfg.h +* Version : V1.38.01.00 +* Programmer(s) : FBJ +* JFD +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef LIB_CFG_MODULE_PRESENT +#define LIB_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MEMORY LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* MEMORY LIBRARY ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_ARG_CHK_EXT_EN to enable/disable the memory library suite external +* argument check feature : +* +* (a) When ENABLED, arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +********************************************************************************************************* +*/ + + /* External argument check. */ + /* Indicates if arguments received from any port ... */ + /* ... interface provided by the developer or ... */ + /* ... application are checked/validated. */ +#define LIB_MEM_CFG_ARG_CHK_EXT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY LIBRARY ASSEMBLY OPTIMIZATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_OPTIMIZE_ASM_EN to enable/disable assembly-optimized memory function(s). +********************************************************************************************************* +*/ + + /* Assembly-optimized function(s). */ + /* Enable/disable assembly-optimized memory ... */ + /* ... function(s). [see Note #1] */ +#define LIB_MEM_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY ALLOCATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_DBG_INFO_EN to enable/disable memory allocation usage tracking +* that associates a name with each segment or dynamic pool allocated. +* +* (2) (a) Configure LIB_MEM_CFG_HEAP_SIZE with the desired size of heap memory (in octets). +* +* (b) Configure LIB_MEM_CFG_HEAP_BASE_ADDR to specify a base address for heap memory : +* +* (1) Heap initialized to specified application memory, if LIB_MEM_CFG_HEAP_BASE_ADDR +* #define'd in 'lib_cfg.h'; +* CANNOT #define to address 0x0 +* +* (2) Heap declared to Mem_Heap[] in 'lib_mem.c', if LIB_MEM_CFG_HEAP_BASE_ADDR +* NOT #define'd in 'lib_cfg.h' +********************************************************************************************************* +*/ + + /* Allocation debugging information. */ + /* Enable/disable allocation of debug information ... */ + /* ... associated to each memory allocation. */ +#define LIB_MEM_CFG_DBG_INFO_EN DEF_DISABLED + + + /* Heap memory size (in bytes). */ + /* Configure the desired size of the heap memory. ... */ + /* ... Set to 0 to disable heap allocation features. */ +#define LIB_MEM_CFG_HEAP_SIZE 64*1024 + + + /* Heap memory padding alignment (in bytes). */ + /* Configure the desired size of padding alignment ... */ + /* ... of each buffer allocated from the heap. */ +#define LIB_MEM_CFG_HEAP_PADDING_ALIGN LIB_MEM_PADDING_ALIGN_NONE + +#if 0 /* Remove this to have heap alloc at specified addr. */ +#define LIB_MEM_CFG_HEAP_BASE_ADDR 0 +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* STRING LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* STRING FLOATING POINT CONFIGURATION +* +* Note(s) : (1) Configure LIB_STR_CFG_FP_EN to enable/disable floating point string function(s). +* +* (2) Configure LIB_STR_CFG_FP_MAX_NBR_DIG_SIG to configure the maximum number of significant +* digits to calculate &/or display for floating point string function(s). +* +* See also 'lib_str.h STRING FLOATING POINT DEFINES Note #1'. +********************************************************************************************************* +*/ + + /* Floating point feature(s). */ + /* Enable/disable floating point to string functions. */ +#define LIB_STR_CFG_FP_EN DEF_DISABLED + + + /* Floating point number of significant digits. */ + /* Configure the maximum number of significant ... */ + /* ... digits to calculate &/or display for ... */ + /* ... floating point string function(s). */ +#define LIB_STR_CFG_FP_MAX_NBR_DIG_SIG LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of lib cfg module include. */ + diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/mmu_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/mmu_cfg.h new file mode 100644 index 0000000..4dda478 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/mmu_cfg.h @@ -0,0 +1,42 @@ +/* + * mmu_cfg.h + * + * Created on: 25.04.2018 + * Author: kaige + */ + +#ifndef SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ +#define SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ + +#include "mmu.h" + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief FIRST LEVEL TRANSLATION TABLE (FTT) +* +* \ingroup PAR_CPU_MMU +* +* This variable represents the first level translation table. Each entry within +* the table represents the configuration of a 1MB memory segment. If a memory +* portion below 1MB must be accessed, the entry represents a pointer to the +* linked coarse page table, which contains the information of that 1MB in detail. +* +* \note This table MUST be aligned at 16kB boundary. +*/ +/*------------------------------------------------------------------------------------------------*/ + +const PAR_MEM_REGION_T PARMemTbl_Core[] = { +/* +-------------------------------------------------------------------------------------------+ +* | virtual | physical | size | owner | permissions | HID Field | +* +-----------+-----------+---------------+------------------+-----------------+--------------+*/ + // First 1MB is marked as non-cacheable/non-bufferable (contains 3x 64KB SRAM @ address 0x00000000 + { 0x00000000, 0x00000000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER_CB | PAR_HID_CACHE_OUTER_CB }, + // DDR Memory is marked as normal (only 512MB for now) + { 0x00100000, 0x00100000, MMU_SIZE_16MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER___ | PAR_HID_CACHE_OUTER___ }, + // Device section + { 0xE0000000, 0xE0000000, MMU_SIZE_512MB-MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_EXCLUSIVE_SYS_DEVICE }, + // Upper 1MB section contains 1x 64KB SRAM @ address 0xFFFF0000 + { 0xFFF00000, 0xFFF00000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_OUT_IN_NON_CACHABLE } +}; + +#endif /* SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ */ diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/net_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/net_cfg.h new file mode 100644 index 0000000..ee42e1f --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/net_cfg.h @@ -0,0 +1,676 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_cfg.h +* Version : V3.03.01 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_CFG_MODULE_PRESENT +#define NET_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK EXTERNAL APPLICATION CONFIGURATION +* +* Note(s) : (1) When uC/DNS-Client is present in the project some high level functions can resolve hostname. +* So uC/TCPIP should know that uC/DNS-Client is present to call the proper API. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure DNS Client feature (see Note #1) : */ +#define NET_EXT_MODULE_CFG_DNS_EN DEF_ENABLED + /* DEF_DISABLED DNS Client is DISABLED */ + /* DEF_ENABLED DNS Client is ENABLED */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS CONFIGURATION +* +* Note(s) : (1) (a) Each network task maps to a unique, developer-configured task configuration that +* MUST be defined in application files, typically 'net_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to Net_Init(). +* +* (b) Since these task configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const NET_TASK_CFG NetRxTaskCfg; +extern const NET_TASK_CFG NetTxDeallocTaskCfg; +extern const NET_TASK_CFG NetTmrTaskCfg; + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS Q CONFIGURATION +* +* Note(s) : (1) Rx queue size should be configured such that it reflects the total number of DMA receive descriptors on all +* devices. If DMA is not available, or a combination of DMA and I/O based interfaces are configured then this +* number reflects the maximum number of packets that can be acknowledged and signalled during a single receive +* interrupt event for all interfaces. +* +* (2) Tx queue size should be defined to be the total number of small and large transmit buffers declared for +* all interfaces. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_CFG_IF_RX_Q_SIZE 100 +#define NET_CFG_IF_TX_DEALLOC_Q_SIZE 100 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK CONFIGURATION +* +* Note(s) : (1) uC/TCP-IP code may call optimized assembly functions. Optimized assembly files/functions must be included +* in the project to be enabled. Optimized functions are located in files under folders: +* +* $uC-TCPIP/Ports// +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network protocol suite's assembly ... */ + /* ... optimization (see Note #1) : */ +#define NET_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + /* DEF_DISABLED Assembly optimization DISABLED */ + /* DEF_ENABLED Assembly optimization ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEBUG CONFIGURATION +* +* Note(s) : (1) Configure NET_DBG_CFG_MEM_CLR_EN to enable/disable the network protocol suite from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure memory clear feature (see Note #1) : */ +#define NET_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure NET_ERR_CFG_ARG_CHK_EXT_EN to enable/disable the network protocol suite external +* argument check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure NET_ERR_CFG_ARG_CHK_DBG_EN to enable/disable the network protocol suite internal, +* debug argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the network protocol +* suite. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the network protocol +* suite. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define NET_ERR_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define NET_ERR_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK COUNTER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_CTR_CFG_STAT_EN to enable/disable network protocol suite statistics counters. +* +* (2) Configure NET_CTR_CFG_ERR_EN to enable/disable network protocol suite error counters. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure statistics counter feature (see Note #1) : */ +#define NET_CTR_CFG_STAT_EN DEF_DISABLED + /* DEF_DISABLED Stat counters DISABLED */ + /* DEF_ENABLED Stat counters ENABLED */ + + /* Configure error counter feature (see Note #2) : */ +#define NET_CTR_CFG_ERR_EN DEF_DISABLED + /* DEF_DISABLED Error counters DISABLED */ + /* DEF_ENABLED Error counters ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK TIMER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_TMR_CFG_NBR_TMR with the desired number of network TIMER objects. +* +* Timers are required for : +* +* (a) ARP & NDP cache entries +* (b) IP fragment reassembly +* (c) TCP state machine connections +* (d) IF Link status check-up +* +* (2) Configure NET_TMR_CFG_TASK_FREQ to schedule the execution frequency of the network timer +* task -- how often NetTmr_TaskHandler() is scheduled to run per second as implemented in +* NetTmr_Task(). +* +* (a) NET_TMR_CFG_TASK_FREQ MUST NOT be configured as a floating-point frequency. +* +* See also 'net_tmr.h NETWORK TIMER TASK TIME DEFINES Notes #1 & #2' +* & 'net_tmr.c NetTmr_Task() Notes #1 & #2'. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_TMR_CFG_NBR_TMR 100 +#define NET_TMR_CFG_TASK_FREQ 10 + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK INTERFACE LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_IF_CFG_MAX_NBR_IF 1 + + /* Configure specific interface(s) : */ +#define NET_IF_CFG_LOOPBACK_EN DEF_DISABLED + +#define NET_IF_CFG_ETHER_EN DEF_ENABLED + +#define NET_IF_CFG_WIFI_EN DEF_DISABLED + /* DEF_DISABLED Interface type DISABLED */ + /* DEF_ENABLED interface type ENABLED */ + +#define NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* ADDRESS RESOLUTION PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Address resolution protocol ONLY required for IPv4. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_ARP_CFG_CACHE_NBR 3 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NEIGHBOR DISCOVERY PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Neighbor Discovery Protocol ONLY required for IPv6. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_NDP_CFG_CACHE_NBR 5 +#define NET_NDP_CFG_DEST_NBR 5 +#define NET_NDP_CFG_PREFIX_NBR 5 +#define NET_NDP_CFG_ROUTER_NBR 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET PROTOCOL LAYER VERSION CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* IPv4 +********************************************************************************************************* +*/ + /* Configure IPv4. */ +#define NET_IPv4_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv4 disabled. */ + /* DEF_ENABLED IPv4 enabled. */ + + +#define NET_IPv4_CFG_IF_MAX_NBR_ADDR 1 + +/* +********************************************************************************************************* +* IPv6 +********************************************************************************************************* +*/ + + /* Configure IPv6. */ +#define NET_IPv6_CFG_EN DEF_DISABLED + /* DEF_DISABLED IPv6 disabled. */ + /* DEF_ENABLED IPv6 enabled. */ + + /* Configure IPv6 Stateless Address Auto-Configuration. */ +#define NET_IPv6_CFG_ADDR_AUTO_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv6 Auto-Cfg disabled. */ + /* DEF_ENABLED IPv6 Auto-Cfg enabled. */ + + /* Configure IPv6 Duplication Address Detection (DAD). */ +#define NET_IPv6_CFG_DAD_EN DEF_ENABLED + /* DEF_DISABLED IPv6 DAD disabled. */ + /* DEF_ENABLED IPv6 DAD enabled. */ + +#define NET_IPv6_CFG_IF_MAX_NBR_ADDR 2 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET GROUP MANAGEMENT PROTOCOL(MULTICAST) LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure IPv4 multicast support : */ +#define NET_MCAST_CFG_IPv4_RX_EN DEF_ENABLED +#define NET_MCAST_CFG_IPv4_TX_EN DEF_ENABLED + /* DEF_DISABLED Multicast rx or tx disabled. */ + /* DEF_ENABLED Multicast rx or tx enabled. */ + +#define NET_MCAST_CFG_HOST_GRP_NBR_MAX 2 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SOCKET LAYER CONFIGURATION +* +* Note(s) : (1) The maximum accept queue size represents the number of connection that can be queued by +* the stack before being accepted. For a TCP server when a connection is queued, it means +* that the SYN, ACK packet has been sent back, so the remote host can start transmitting +* data once the connection is queued and the stack will queue up all data received until +* the connection is accepted and the data is read. +* +* (2) Receive and transmit queue size MUST be properly configured to optimize performance. +* +* (a) It represents the number of bytes that can be queued by one socket. It's important +* that all socket are not able to queue more data than what the device can hold in its +* buffers. +* +* (b) The size should be also a multiple of the maximum segment size (MSS) to optimize +* performance. UDP MSS is 1470 and TCP MSS is 1460. +* +* (c) RX and TX queue size can be reduce at runtime using socket option API. +* +* (d) Window calculation example: +* +* Number of TCP connection : 2 +* Number of UDP connection : 0 +* Number of RX large buffer : 10 +* Number of TX Large buffer : 6 +* Number of TX small buffer : 2 +* Size of RX large buffer : 1518 +* Size of TX large buffer : 1518 +* Size of TX small buffer : 60 +* +* TCP MSS RX = 1460 +* TCP MSS TX large buffer = 1460 +* TCP MSS TX small buffer = 0 +* +* Maximum receive window = (10 * 1460) = 14600 bytes +* Maximum transmit window = (6 * 1460) + (2 * 0) = 8760 bytes +* +* RX window size per socket = (14600 / 2) = 7300 bytes +* TX window size per socket = (8760 / 2) = 4380 bytes +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_SOCK_CFG_SOCK_NBR_TCP 2 +#define NET_SOCK_CFG_SOCK_NBR_UDP 1 + + /* Configure socket select functionality : */ +#define NET_SOCK_CFG_SEL_EN DEF_ENABLED + /* DEF_DISABLED Socket select DISABLED */ + /* DEF_ENABLED Socket select ENABLED */ + + /* Configure stream-type sockets' accept queue */ +#define NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX 2 + + + /* Configure sockets' buffer sizes in number of octets */ + /* (see Note #2): */ +#define NET_SOCK_CFG_RX_Q_SIZE_OCTET 4096 +#define NET_SOCK_CFG_TX_Q_SIZE_OCTET 4096 + + +/* ================================== ADVANCED SOCKET CONFIGURATION: DEFAULT VALUES ================================== */ +/* By default sockets are set to block. Add the following define to set all sockets as non-blocking. Note that it's */ +/* possible to change socket's blocking mode at runtime using socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_NO_BLOCK_EN DEF_ENABLED */ +/* */ +/* By default random port start at 65000, redefine the following define to modify where random port start: */ +/* */ +/* #define NET_SOCK_DFLT_PORT_NBR_RANDOM_BASE 65000u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeouts. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_TIMEOUT_RX_Q_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS 10000u */ +/* ==================================================================================================================== */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TRANSMISSION CONTROL PROTOCOL LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure TCP support : */ +#define NET_TCP_CFG_EN DEF_ENABLED + /* DEF_DISABLED TCP layer DISABLED */ + /* DEF_ENABLED TCP layer ENABLED */ + +/* ========================================= ADVANCED TCP LAYER CONFIGURATION ========================================= */ +/* By default TCP RX and TX windows are set to equal the socket RX and TX queue sizes. Default values can be changed by */ +/* redefining the following defines. TCP windows must be properly configured to optimize performance (see note about */ +/* Socket TX and RX windows). Note that it's possible to decrease window size at run time using Socket option API. */ +/* */ +/* #define NET_TCP_DFLT_RX_WIN_SIZE_OCTET NET_SOCK_CFG_RX_Q_SIZE_OCTET */ +/* #define NET_TCP_DFLT_TX_WIN_SIZE_OCTET NET_SOCK_CFG_TX_Q_SIZE_OCTET */ +/* */ +/* As shown in the TCP state diagram (see RFC #793), before moving from 'TIME-WAIT' state to 'CLOSED' state a timeout */ +/* (2MSL) must expire. This means that the TCP connection cannot be made available for subsequent TCP connections until */ +/* this timeout. It can be a problem for embedded systems with low resources especially when many TCP connections are */ +/* made in a small period of time since it is possible to run out of free TCP connections quickly. Therefore this */ +/* timeout is set to 0 by default to avoid this kind of problem and the connection is made available as soon as the */ +/* 'TIME-WAIT' state is reached. However, it's possible to set the default MSL timeout to something else by redefining */ +/* the following define. Note that it is possible to change the MSL timeout for a specific TCP connection using Socket */ +/* option API. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC 0u */ +/* */ +/* To avoid leaving a connection in the FIN_WAIT_2 state forever when a connection moves from the 'FIN_WAIT_1' state to */ +/* the FIN_WAIT_2, the TCP connection's timer is set to 15 second, and when it expires the connection is dropped. Thus, */ +/* if the other host doesn't response to the close request, the connection will still be closed after the timeout. */ +/* This default timeout can be change by redefining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC 15u */ +/* */ +/* The number of TCP connections is configured following the number of TCP sockets and the accept queue size when the */ +/* MSL is set to 0 ms. However, since the default MSL can be modified, it might be needed to increase the number of TCP */ +/* connections to establish more connections when waiting for the MSL expiration. It is possible to add more TCP */ +/* connections by defining the following define. */ +/* */ +/* #define NET_TCP_CFG_NBR_CONN 0u */ +/* */ +/* By default an 'ACK' is generated within 500 ms of the arrival of the first unacknowledged packet, as specified in */ +/* RFC #2581, Section 4.2. However it's possible to modify this value by defining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS 500u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeout. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS 1000u */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS 1000u */ +/* ==================================================================================================================== */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* USER DATAGRAM PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Configure NET_UDP_CFG_APP_API_SEL with the desired configuration for demultiplexing +* UDP datagrams to application connections : +* +* NET_UDP_APP_API_SEL_SOCK Demultiplex UDP datagrams to BSD sockets ONLY. +* NET_UDP_APP_API_SEL_APP Demultiplex UDP datagrams to application-specific +* connections ONLY. +* NET_UDP_APP_API_SEL_SOCK_APP Demultiplex UDP datagrams to BSD sockets first; +* if NO socket connection found to demultiplex +* a UDP datagram, demultiplex to application- +* specific connection. +* +* See also 'net_udp.c NetUDP_RxPktDemuxDatagram() Note #1' +* & 'net_udp.c NetUDP_RxPktDemuxAppData() Note #1'. +* +* (2) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally ... discard +* ... [or allow] ... received ... UDP datagrams without checksums". +* +* (b) Configure NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN to enable/disable discarding of UDP +* datagrams received with NO computed check-sum : +* +* (1) When ENABLED, ALL UDP datagrams received without a check-sum are discarded. +* +* (2) When DISABLED, ALL UDP datagrams received without a check-sum are flagged so +* that application(s) may handle &/or discard. +* +* See also 'net_udp.c NetUDP_RxPktValidate() Note #4d3A'. +* +* (3) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally be able to +* control whether a UDP checksum will be generated". +* +* (b) Configure NET_UDP_CFG_TX_CHK_SUM_EN to enable/disable transmitting UDP datagrams +* with check-sums : +* +* (1) When ENABLED, ALL UDP datagrams are transmitted with a computed check-sum. +* +* (2) When DISABLED, ALL UDP datagrams are transmitted without a computed check-sum. +* +* See also 'net_udp.c NetUDP_TxPktPrepareHdr() Note #3b'. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure UDP Receive Check-Sum Discard feature ... */ + /* ... (see Note #2b) : */ +#define NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN DEF_DISABLED + /* DEF_DISABLED UDP Check-Sums Received without ... */ + /* Check-Sums Validated */ + /* DEF_ENABLED UDP Datagrams Received without ... */ + /* Check-Sums Discarded */ + + /* Configure UDP Transmit Check-Sum feature ... */ + /* ... (see Note #3b) : */ +#define NET_UDP_CFG_TX_CHK_SUM_EN DEF_DISABLED + /* DEF_DISABLED Transmit Check-Sums DISABLED */ + /* DEF_ENABLED Transmit Check-Sums ENABLED */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SECURITY MANAGER CONFIGURATION +* +* Note(s): (1) The network security layer can be enabled ONLY if the application project contains a secure module +* supported by uC/TCPIP such as: +* +* (a) NanoSSL provided by Mocana. +* (b) CyaSSL provided by YaSSL. +* +* (2) The network security port must be also added to the project. Security port can be found under the folder: +* +* $uC-TCPIP/Secure/ +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network security layer (See Note #1 & #2): */ +#define NET_SECURE_CFG_EN DEF_DISABLED + /* DEF_DISABLED Security layer DISABLED */ + /* DEF_ENABLED Security layer ENABLED */ + +#define NET_SECURE_CFG_MAX_NBR_SOCK_SERVER 2u /* Configure total number of server secure sockets. */ +#define NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT 2u /* Configure total number of client secure sockets. */ + +#define NET_SECURE_CFG_MAX_CERT_LEN 1500u /* Configure servers certificate maximum length (bytes) */ +#define NET_SECURE_CFG_MAX_KEY_LEN 1500u /* Configure servers key maximum length (bytes) */ + + /* Configure maximum number of certificate authorities */ +#define NET_SECURE_CFG_MAX_NBR_CA 1u /* that can be installed. */ + +#define NET_SECURE_CFG_MAX_CA_CERT_LEN 1500u /* Configure CA certificate maximum length (bytes) */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERFACE CHECKSUM OFFLOAD CONFIGURATION +* +* Note(s): (1) These configuration can be enabled only if all your interfaces support specific checksum offload +* option. +* +* (2) By default a driver should enabled the all checksum offload option. +********************************************************************************************************* +********************************************************************************************************* +*/ +/* ========================================== ADVANCED OFFLOAD CONFIGURATION ========================================== */ +/* By default all checksum are validated by the stack however it is possible to enable or disable specific checksum */ +/* validate and calculation if the interface controller is able to achieve it. You can add the following define in this */ +/* file to change the default behavior. */ +/* */ +/* -------------------------------------------------- IPv4 CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* -------------------------------------------------- ICMP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- UDP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- TCP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* ==================================================================================================================== */ + + +/* ======================================================= END ======================================================== */ +#endif /* NET_CFG_MODULE_PRESENT */ + +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h new file mode 100644 index 0000000..cb76d08 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h @@ -0,0 +1,115 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK DEVICE CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_dev_cfg.h +* Version : V3.00.00 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +* +* Note(s) : (1) This network device configuration header file is protected from multiple pre-processor +* inclusion through use of the network module present pre-processor macro definition. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_DEV_CFG_MODULE_PRESENT /* See Note #1. */ +#define NET_DEV_CFG_MODULE_PRESENT + +#include + +#ifdef NET_IF_ETHER_MODULE_EN +#include +#endif + +#ifdef NET_IF_WIFI_MODULE_EN +#include +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEVICE CONFIGURATION +* +* Note(s) : (1) (a) Each network device maps to a unique, developer-configured device configuration that +* MUST be defined in application files, typically 'net_dev_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to NetIF_Add(). +* +* (b) Since these device configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. However, +* the following naming convention is suggested for all developer-configured network +* device configuration structures : +* +* NetDev_Cfg_[_Number] +* +* where +* Name of device or device driver +* [Number] Network device number for each specific instance of +* device (optional if the development board does NOT +* support multiple instances of the specific device) +* +* Examples : +* +* NET_DEV_CFG_ETHER NetDev_Cfg_MACB; Ethernet configuration for MACB +* +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_0; Ethernet configuration for FEC #0 +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_1; Ethernet configuration for FEC #1 +* +* NET_DEV_CFG_WIFI NetDev_Cfg_RS9110N21_0; Wireless configuration for RS9110-N-21 +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifdef NET_IF_ETHER_MODULE_EN + +extern NET_DEV_CFG_ETHER NetDev_AXIEthernetLite_0; +extern NET_PHY_CFG_ETHER NetPhy_Cfg_Ether_0; + +#endif /* NET_IF_ETHER_MODULE_EN */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +********************************************************************************************************* +*/ + +#endif /* NET_DEV_CFG_MODULE_PRESENT */ + diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/os_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/os_cfg.h new file mode 100644 index 0000000..a25fa55 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/os_cfg.h @@ -0,0 +1,145 @@ +/* +********************************************************************************************************* +* uC/OS-II +* The Real-Time Kernel +* uC/OS-II Configuration File for V2.9x +* +* (c) Copyright 2005-2014, Micrium, Weston, FL +* All Rights Reserved +* +* +* File : OS_CFG.H +* By : Jean J. Labrosse +* Version : V2.92.11 +* +* LICENSING TERMS: +* --------------- +* uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research. +* If you plan on using uC/OS-II in a commercial product you need to contact Micrium to properly license +* its use in your product. We provide ALL the source code for your convenience and to help you experience +* uC/OS-II. The fact that the source is provided does NOT mean that you can use it without paying a +* licensing fee. +********************************************************************************************************* +*/ + +#ifndef OS_CFG_H +#define OS_CFG_H + + + /* ---------------------- MISCELLANEOUS ----------------------- */ +#define OS_APP_HOOKS_EN 1u /* Application-defined hooks are called from the uC/OS-II hooks */ +#define OS_ARG_CHK_EN 0u /* Enable (1) or Disable (0) argument checking */ +#define OS_CPU_HOOKS_EN 1u /* uC/OS-II hooks are found in the processor port files */ + +#define OS_DEBUG_EN 1u /* Enable(1) debug variables */ + +#define OS_EVENT_MULTI_EN 1u /* Include code for OSEventPendMulti() */ +#define OS_EVENT_NAME_EN 1u /* Enable names for Sem, Mutex, Mbox and Q */ + +#define OS_LOWEST_PRIO 63u /* Defines the lowest priority that can be assigned ... */ + /* ... MUST NEVER be higher than 254! */ + +#define OS_MAX_EVENTS 20u /* Max. number of event control blocks in your application */ +#define OS_MAX_FLAGS 5u /* Max. number of Event Flag Groups in your application */ +#define OS_MAX_MEM_PART 5u /* Max. number of memory partitions */ +#define OS_MAX_QS 6u /* Max. number of queue control blocks in your application */ +#define OS_MAX_TASKS 20u /* Max. number of tasks in your application, MUST be >= 2 */ + +#define OS_SCHED_LOCK_EN 1u /* Include code for OSSchedLock() and OSSchedUnlock() */ + +#define OS_TICK_STEP_EN 1u /* Enable tick stepping feature for uC/OS-View */ +#define OS_TICKS_PER_SEC 1000u /* Set the number of ticks in one second */ + +#define OS_TLS_TBL_SIZE 0u /* Size of Thread-Local Storage Table */ + + + /* --------------------- TASK STACK SIZE ---------------------- */ +#define OS_TASK_TMR_STK_SIZE 128u /* Timer task stack size (# of OS_STK wide entries) */ +#define OS_TASK_STAT_STK_SIZE 128u /* Statistics task stack size (# of OS_STK wide entries) */ +#define OS_TASK_IDLE_STK_SIZE 128u /* Idle task stack size (# of OS_STK wide entries) */ + + + /* --------------------- TASK MANAGEMENT ---------------------- */ +#define OS_TASK_CHANGE_PRIO_EN 1u /* Include code for OSTaskChangePrio() */ +#define OS_TASK_CREATE_EN 1u /* Include code for OSTaskCreate() */ +#define OS_TASK_CREATE_EXT_EN 1u /* Include code for OSTaskCreateExt() */ +#define OS_TASK_DEL_EN 1u /* Include code for OSTaskDel() */ +#define OS_TASK_NAME_EN 1u /* Enable task names */ +#define OS_TASK_PROFILE_EN 1u /* Include variables in OS_TCB for profiling */ +#define OS_TASK_QUERY_EN 1u /* Include code for OSTaskQuery() */ +#define OS_TASK_REG_TBL_SIZE 1u /* Size of task variables array (#of INT32U entries) */ +#define OS_TASK_STAT_EN 1u /* Enable (1) or Disable(0) the statistics task */ +#define OS_TASK_STAT_STK_CHK_EN 1u /* Check task stacks from statistic task */ +#define OS_TASK_SUSPEND_EN 1u /* Include code for OSTaskSuspend() and OSTaskResume() */ +#define OS_TASK_SW_HOOK_EN 1u /* Include code for OSTaskSwHook() */ + + + /* ----------------------- EVENT FLAGS ------------------------ */ +#define OS_FLAG_EN 1u /* Enable (1) or Disable (0) code generation for EVENT FLAGS */ +#define OS_FLAG_ACCEPT_EN 1u /* Include code for OSFlagAccept() */ +#define OS_FLAG_DEL_EN 1u /* Include code for OSFlagDel() */ +#define OS_FLAG_NAME_EN 1u /* Enable names for event flag group */ +#define OS_FLAG_QUERY_EN 1u /* Include code for OSFlagQuery() */ +#define OS_FLAG_WAIT_CLR_EN 1u /* Include code for Wait on Clear EVENT FLAGS */ +#define OS_FLAGS_NBITS 16u /* Size in #bits of OS_FLAGS data type (8, 16 or 32) */ + + + /* -------------------- MESSAGE MAILBOXES --------------------- */ +#define OS_MBOX_EN 1u /* Enable (1) or Disable (0) code generation for MAILBOXES */ +#define OS_MBOX_ACCEPT_EN 1u /* Include code for OSMboxAccept() */ +#define OS_MBOX_DEL_EN 1u /* Include code for OSMboxDel() */ +#define OS_MBOX_PEND_ABORT_EN 1u /* Include code for OSMboxPendAbort() */ +#define OS_MBOX_POST_EN 1u /* Include code for OSMboxPost() */ +#define OS_MBOX_POST_OPT_EN 1u /* Include code for OSMboxPostOpt() */ +#define OS_MBOX_QUERY_EN 1u /* Include code for OSMboxQuery() */ + + + /* --------------------- MEMORY MANAGEMENT -------------------- */ +#define OS_MEM_EN 1u /* Enable (1) or Disable (0) code generation for MEMORY MANAGER */ +#define OS_MEM_NAME_EN 1u /* Enable memory partition names */ +#define OS_MEM_QUERY_EN 1u /* Include code for OSMemQuery() */ + + + /* ---------------- MUTUAL EXCLUSION SEMAPHORES --------------- */ +#define OS_MUTEX_EN 1u /* Enable (1) or Disable (0) code generation for MUTEX */ +#define OS_MUTEX_ACCEPT_EN 1u /* Include code for OSMutexAccept() */ +#define OS_MUTEX_DEL_EN 1u /* Include code for OSMutexDel() */ +#define OS_MUTEX_QUERY_EN 1u /* Include code for OSMutexQuery() */ + + + /* ---------------------- MESSAGE QUEUES ---------------------- */ +#define OS_Q_EN 1u /* Enable (1) or Disable (0) code generation for QUEUES */ +#define OS_Q_ACCEPT_EN 1u /* Include code for OSQAccept() */ +#define OS_Q_DEL_EN 1u /* Include code for OSQDel() */ +#define OS_Q_FLUSH_EN 1u /* Include code for OSQFlush() */ +#define OS_Q_PEND_ABORT_EN 1u /* Include code for OSQPendAbort() */ +#define OS_Q_POST_EN 1u /* Include code for OSQPost() */ +#define OS_Q_POST_FRONT_EN 1u /* Include code for OSQPostFront() */ +#define OS_Q_POST_OPT_EN 1u /* Include code for OSQPostOpt() */ +#define OS_Q_QUERY_EN 1u /* Include code for OSQQuery() */ + + + /* ------------------------ SEMAPHORES ------------------------ */ +#define OS_SEM_EN 1u /* Enable (1) or Disable (0) code generation for SEMAPHORES */ +#define OS_SEM_ACCEPT_EN 1u /* Include code for OSSemAccept() */ +#define OS_SEM_DEL_EN 1u /* Include code for OSSemDel() */ +#define OS_SEM_PEND_ABORT_EN 1u /* Include code for OSSemPendAbort() */ +#define OS_SEM_QUERY_EN 1u /* Include code for OSSemQuery() */ +#define OS_SEM_SET_EN 1u /* Include code for OSSemSet() */ + + + /* --------------------- TIME MANAGEMENT ---------------------- */ +#define OS_TIME_DLY_HMSM_EN 1u /* Include code for OSTimeDlyHMSM() */ +#define OS_TIME_DLY_RESUME_EN 1u /* Include code for OSTimeDlyResume() */ +#define OS_TIME_GET_SET_EN 1u /* Include code for OSTimeGet() and OSTimeSet() */ +#define OS_TIME_TICK_HOOK_EN 1u /* Include code for OSTimeTickHook() */ + + + /* --------------------- TIMER MANAGEMENT --------------------- */ +#define OS_TMR_EN 0u /* Enable (1) or Disable (0) code generation for TIMERS */ +#define OS_TMR_CFG_MAX 16u /* Maximum number of timers */ +#define OS_TMR_CFG_NAME_EN 1u /* Determine timer names */ +#define OS_TMR_CFG_WHEEL_SIZE 7u /* Size of timer wheel (#Spokes) */ +#define OS_TMR_CFG_TICKS_PER_SEC 10u /* Rate at which timer management task runs (Hz) */ + +#endif diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/pid.h b/src/APP/Aufgabe3/ps7/core0/cfg/pid.h new file mode 100644 index 0000000..5297ca6 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/pid.h @@ -0,0 +1,18 @@ +/* + * pid.h + * + * Created on: Jan 28, 2019 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ + +unsigned int pid_Init(void *pdata); +int16_t pid_Constrain(int16_t value, int16_t lowerBorder, int16_t higherBorder); +unsigned int pid_Task(void *pdata); +int16_t map(int16_t x, int16_t in_min, int16_t in_max, int16_t out_min, int16_t out_max); + + + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ */ diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/shell_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/shell_cfg.h new file mode 100644 index 0000000..15e41af --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/shell_cfg.h @@ -0,0 +1,96 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell Utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/Shell is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* SHELL UTILITY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : shell_cfg.h +* Version : V1.03.01 +* Programmer(s) : SR +* FBJ +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef SHELL_CFG_H +#define SHELL_CFG_H + + +/* +********************************************************************************************************* +* SHELL +* +* Note(s) : (1) Defines the size of the table used to hold the various modules' command tables. Command +* tables are added using the Shell_CmdTblAdd() function. Once the table is full, it is not +* possible to add any more unless Shell_CmdTblRem() is first called. +* +* (2) Defines the maximum number or argument(s) a command may pass on the string holding the +* complete command. The minimum value is 1. +* +* (3) Defines the maximum length for module command name, including the NULL character. +********************************************************************************************************* +*/ + +#define SHELL_CFG_CMD_TBL_SIZE 3 /* Cfg Shell cmd tbl size (see Note #1). */ +#define SHELL_CFG_CMD_ARG_NBR_MAX 5 /* Cfg cmd max nbr of arg (see Note #2). */ + +#define SHELL_CFG_MODULE_CMD_NAME_LEN_MAX 6 /* Cfg module cmd name len (See Note #3). */ + + +/* +********************************************************************************************************* +* TRACING +********************************************************************************************************* +*/ + +#ifndef TRACE_LEVEL_OFF +#define TRACE_LEVEL_OFF 0u +#endif + +#ifndef TRACE_LEVEL_INFO +#define TRACE_LEVEL_INFO 1u +#endif + +#ifndef TRACE_LEVEL_DBG +#define TRACE_LEVEL_DBG 2u +#endif + +#define SHELL_TRACE_LEVEL TRACE_LEVEL_OFF +#define SHELL_TRACE printf + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif \ No newline at end of file diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/terminal_cfg.h b/src/APP/Aufgabe3/ps7/core0/cfg/terminal_cfg.h new file mode 100644 index 0000000..6d35076 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/terminal_cfg.h @@ -0,0 +1,70 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* Knowledge of the source code may not be used to write a similar +* product. This file may only be used in accordance with a license +* and should not be redistributed in any way. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* TERMINAL +* +* CONFIGURATION TEMPLATE FILE +* +* Filename : terminal_cfg.h +* Version : V1.03.01 +* Programmer(s) : BAN +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* TASKS PRIORITIES +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_PRIO 16u + + +/* +********************************************************************************************************* +* STACK SIZES +* Size of the task stacks (# of OS_STK entries) +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_STK_SIZE 1024u + + +/* +********************************************************************************************************* +* TERMINAL +* +* Note(s) : (1) Defines the maximum length of a command entered on the terminal, in characters. +* +* (2) Defines the maximum path length of the Current Working Directory (CWD). +* +* (3) Enables/disables command history. +* +* (4) Defines the number of items to hold in the command history. +* +* (5) Defines the length of a item in the command history. If a command is entered into the +* terminal that exceeds this length, then only the first characters, up to this number of +* characters, will be copied into the command history. +********************************************************************************************************* +*/ + +#define TERMINAL_CFG_MAX_CMD_LEN 260u /* Cfg max cmd len (see Note #1). */ +#define TERMINAL_CFG_MAX_PATH_LEN 260u /* Cfg max path len (see Note #2). */ + +#define TERMINAL_CFG_HISTORY_EN DEF_ENABLED /* En/dis history (see Note #3). */ +#define TERMINAL_CFG_HISTORY_ITEMS_NBR 16u /* Cfg nbr history items (see Note #4). */ +#define TERMINAL_CFG_HISTORY_ITEM_LEN 64u /* Cfg history item len (see Note #5). */ diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/ttc_timer.h b/src/APP/Aufgabe3/ps7/core0/cfg/ttc_timer.h new file mode 100644 index 0000000..130ad6c --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/ttc_timer.h @@ -0,0 +1,15 @@ +/* + * ttc_timer.h + * + * Created on: Nov 13, 2018 + * Author: laurenzb + */ + +#include + +#ifndef SRC_APP_AUFGABE3_PS7_CORE0_CFG_TTC_TIMER_H_ +#define SRC_APP_AUFGABE3_PS7_CORE0_CFG_TTC_TIMER_H_ + + + +#endif /* SRC_APP_AUFGABE3_PS7_CORE0_CFG_TTC_TIMER_H_ */ diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/xparameters.h b/src/APP/Aufgabe3/ps7/core0/cfg/xparameters.h new file mode 100644 index 0000000..0ae49a9 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/xparameters.h @@ -0,0 +1,704 @@ +/******************************************************************/ + +/* Definition for CPU ID */ +#define XPAR_CPU_ID 0 + +/* Definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_PS7_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_CPU_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + +/******************************************************************/ + +#undef DEF_DISABLED +#undef DEF_ENABLED +#define DEF_ENABLED 1 +#define DEF_DISABLED 0 + +#include "../../../../Aufgabe3/ps7/core0/cfg/xparameters_ps.h" + + + +/******************************************************************/ + +/* Definitions for driver BRAM */ +#define XPAR_XBRAM_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_AXI_BRAM_CTRL_0_DEVICE_ID 0 +#define XPAR_AXI_BRAM_CTRL_0_DATA_WIDTH 32 +#define XPAR_AXI_BRAM_CTRL_0_ECC 0 +#define XPAR_AXI_BRAM_CTRL_0_FAULT_INJECT 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_UE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_STATUS_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_COUNTER_WIDTH 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_REGISTER 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_AXI_BRAM_CTRL_0_WRITE_ACCESS 0 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_BASEADDR 0x40000000 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_HIGHADDR 0x40001FFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_BASEADDR 0xFFFFFFFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_HIGHADDR 0xFFFFFFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_BRAM_0_DEVICE_ID XPAR_AXI_BRAM_CTRL_0_DEVICE_ID +#define XPAR_BRAM_0_DATA_WIDTH 32 +#define XPAR_BRAM_0_ECC 0 +#define XPAR_BRAM_0_FAULT_INJECT 0 +#define XPAR_BRAM_0_CE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_UE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_ECC_STATUS_REGISTERS 0 +#define XPAR_BRAM_0_CE_COUNTER_WIDTH 0 +#define XPAR_BRAM_0_ECC_ONOFF_REGISTER 0 +#define XPAR_BRAM_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_BRAM_0_WRITE_ACCESS 0 +#define XPAR_BRAM_0_BASEADDR 0x40000000 +#define XPAR_BRAM_0_HIGHADDR 0x40001FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_DDR_0 */ +#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000 +#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x3FFFFFFF + + +/******************************************************************/ + +/* Definitions for driver DEVCFG */ +#define XPAR_XDCFG_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_PS7_DEV_CFG_0_DEVICE_ID 0 +#define XPAR_PS7_DEV_CFG_0_BASEADDR 0xF8007000 +#define XPAR_PS7_DEV_CFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_XDCFG_0_DEVICE_ID XPAR_PS7_DEV_CFG_0_DEVICE_ID +#define XPAR_XDCFG_0_BASEADDR 0xF8007000 +#define XPAR_XDCFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Definitions for driver DMAPS */ +#define XPAR_XDMAPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_DMA_NS */ +#define XPAR_PS7_DMA_NS_DEVICE_ID 0 +#define XPAR_PS7_DMA_NS_BASEADDR 0xF8004000 +#define XPAR_PS7_DMA_NS_HIGHADDR 0xF8004FFF + + +/* Definitions for peripheral PS7_DMA_S */ +#define XPAR_PS7_DMA_S_DEVICE_ID 1 +#define XPAR_PS7_DMA_S_BASEADDR 0xF8003000 +#define XPAR_PS7_DMA_S_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DMA_NS */ +#define XPAR_XDMAPS_0_DEVICE_ID XPAR_PS7_DMA_NS_DEVICE_ID +#define XPAR_XDMAPS_0_BASEADDR 0xF8004000 +#define XPAR_XDMAPS_0_HIGHADDR 0xF8004FFF + +/* Canonical definitions for peripheral PS7_DMA_S */ +#define XPAR_XDMAPS_1_DEVICE_ID XPAR_PS7_DMA_S_DEVICE_ID +#define XPAR_XDMAPS_1_BASEADDR 0xF8003000 +#define XPAR_XDMAPS_1_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_AFI_0 */ +#define XPAR_PS7_AFI_0_S_AXI_BASEADDR 0xF8008000 +#define XPAR_PS7_AFI_0_S_AXI_HIGHADDR 0xF8008FFF + + +/* Definitions for peripheral PS7_AFI_1 */ +#define XPAR_PS7_AFI_1_S_AXI_BASEADDR 0xF8009000 +#define XPAR_PS7_AFI_1_S_AXI_HIGHADDR 0xF8009FFF + + +/* Definitions for peripheral PS7_AFI_2 */ +#define XPAR_PS7_AFI_2_S_AXI_BASEADDR 0xF800A000 +#define XPAR_PS7_AFI_2_S_AXI_HIGHADDR 0xF800AFFF + + +/* Definitions for peripheral PS7_AFI_3 */ +#define XPAR_PS7_AFI_3_S_AXI_BASEADDR 0xF800B000 +#define XPAR_PS7_AFI_3_S_AXI_HIGHADDR 0xF800BFFF + + +/* Definitions for peripheral PS7_DDRC_0 */ +#define XPAR_PS7_DDRC_0_S_AXI_BASEADDR 0xF8006000 +#define XPAR_PS7_DDRC_0_S_AXI_HIGHADDR 0xF8006FFF + + +/* Definitions for peripheral PS7_GLOBALTIMER_0 */ +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_BASEADDR 0xF8F00200 +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_HIGHADDR 0xF8F002FF + + +/* Definitions for peripheral PS7_GPV_0 */ +#define XPAR_PS7_GPV_0_S_AXI_BASEADDR 0xF8900000 +#define XPAR_PS7_GPV_0_S_AXI_HIGHADDR 0xF89FFFFF + + +/* Definitions for peripheral PS7_INTC_DIST_0 */ +#define XPAR_PS7_INTC_DIST_0_S_AXI_BASEADDR 0xF8F01000 +#define XPAR_PS7_INTC_DIST_0_S_AXI_HIGHADDR 0xF8F01FFF + + +/* Definitions for peripheral PS7_IOP_BUS_CONFIG_0 */ +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_BASEADDR 0xE0200000 +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_HIGHADDR 0xE0200FFF + + +/* Definitions for peripheral PS7_OCMC_0 */ +#define XPAR_PS7_OCMC_0_S_AXI_BASEADDR 0xF800C000 +#define XPAR_PS7_OCMC_0_S_AXI_HIGHADDR 0xF800CFFF + + +/* Definitions for peripheral PS7_PL310_0 */ +#define XPAR_PS7_PL310_0_S_AXI_BASEADDR 0xF8F02000 +#define XPAR_PS7_PL310_0_S_AXI_HIGHADDR 0xF8F02FFF + + +/* Definitions for peripheral PS7_PMU_0 */ +#define XPAR_PS7_PMU_0_S_AXI_BASEADDR 0xF8891000 +#define XPAR_PS7_PMU_0_S_AXI_HIGHADDR 0xF8891FFF +#define XPAR_PS7_PMU_0_PMU1_S_AXI_BASEADDR 0xF8893000 +#define XPAR_PS7_PMU_0_PMU1_S_AXI_HIGHADDR 0xF8893FFF + + +/* Definitions for peripheral PS7_QSPI_LINEAR_0 */ +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_BASEADDR 0xFC000000 +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_HIGHADDR 0xFDFFFFFF + + +/* Definitions for peripheral PS7_RAM_0 */ +#define XPAR_PS7_RAM_0_S_AXI_BASEADDR 0x00000000 +#define XPAR_PS7_RAM_0_S_AXI_HIGHADDR 0x0003FFFF + + +/* Definitions for peripheral PS7_RAM_1 */ +#define XPAR_PS7_RAM_1_S_AXI_BASEADDR 0xFFFC0000 +#define XPAR_PS7_RAM_1_S_AXI_HIGHADDR 0xFFFFFFFF + + +/* Definitions for peripheral PS7_SLCR_0 */ +#define XPAR_PS7_SLCR_0_S_AXI_BASEADDR 0xF8000000 +#define XPAR_PS7_SLCR_0_S_AXI_HIGHADDR 0xF8000FFF + + +/******************************************************************/ + +/* Definitions for driver GPIO */ +#define XPAR_XGPIO_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_GPIO_0 */ +#define XPAR_AXI_GPIO_0_BASEADDR 0x41200000 +#define XPAR_AXI_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_AXI_GPIO_0_DEVICE_ID 0 +#define XPAR_AXI_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_AXI_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_GPIO_0 */ +#define XPAR_GPIO_0_BASEADDR 0x41200000 +#define XPAR_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID +#define XPAR_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +///* Definitions for driver IICPS */ +//#define XPAR_XIICPS_NUM_INSTANCES 1 +// +///* Definitions for peripheral PS7_I2C_0 */ +//#define XPAR_PS7_I2C_0_DEVICE_ID 0 +//#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +//#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +//#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver QSPIPS */ +#define XPAR_XQSPIPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_QSPI_0 */ +#define XPAR_PS7_QSPI_0_DEVICE_ID 0 +#define XPAR_PS7_QSPI_0_BASEADDR 0xE000D000 +#define XPAR_PS7_QSPI_0_HIGHADDR 0xE000DFFF +#define XPAR_PS7_QSPI_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_PS7_QSPI_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_QSPI_0 */ +#define XPAR_XQSPIPS_0_DEVICE_ID XPAR_PS7_QSPI_0_DEVICE_ID +#define XPAR_XQSPIPS_0_BASEADDR 0xE000D000 +#define XPAR_XQSPIPS_0_HIGHADDR 0xE000DFFF +#define XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_XQSPIPS_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Definitions for driver SCUWDT */ +#define XPAR_XSCUWDT_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_PS7_SCUWDT_0_DEVICE_ID 0 +#define XPAR_PS7_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_PS7_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_SCUWDT_0_DEVICE_ID XPAR_PS7_SCUWDT_0_DEVICE_ID +#define XPAR_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Definitions for driver UCOS_EMACPS */ +#define XPAR_UCOS_EMACPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_PS7_ETHERNET_0_DEVICE_ID 0 +#define XPAR_PS7_ETHERNET_0_BASEADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_HIGHADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_UCOS_EMACPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_EMACPS_0_DEVICE_ID XPAR_PS7_ETHERNET_0_DEVICE_ID +#define XPAR_UCOS_EMACPS_0_BASEADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_HIGHADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_L2CACHEC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_L2CACHEC_0 */ +#define XPAR_PS7_L2CACHEC_0_DEVICE_ID 0 +#define XPAR_PS7_L2CACHEC_0_BASEADDR 0xF8F02000 +#define XPAR_PS7_L2CACHEC_0_HIGHADDR 0xF8F02FFF + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUC_0 */ +#define XPAR_PS7_SCUC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUC_0_BASEADDR 0xF8F00000 +#define XPAR_PS7_SCUC_0_HIGHADDR 0xF8F000FC + + +/******************************************************************/ + + +/***Definitions for Core_nIRQ/nFIQ interrupts ****/ +/* Definitions for driver UCOS_SCUGIC */ +#define XPAR_XSCUGIC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_PS7_SCUGIC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUGIC_0_BASEADDR 0xF8F00100 +#define XPAR_PS7_SCUGIC_0_HIGHADDR 0xF8F001FF +#define XPAR_PS7_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_SCUGIC_0_DEVICE_ID 0 +#define XPAR_SCUGIC_0_CPU_BASEADDR 0xF8F00100 +#define XPAR_SCUGIC_0_CPU_HIGHADDR 0xF8F001FF +#define XPAR_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUTIMER */ +#define XPAR_UCOS_SCUC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUTIMER_0 */ +#define XPAR_PS7_SCUTIMER_0_DEVICE_ID 0 +#define XPAR_PS7_SCUTIMER_0_BASEADDR 0xF8F00600 +#define XPAR_PS7_SCUTIMER_0_HIGHADDR 0xF8F0061F + + +/******************************************************************/ + +/* Definitions for driver UCOS_SDPS */ +#define XPAR_UCOS_SDPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SD_0 */ +#define XPAR_PS7_SD_0_DEVICE_ID 0 +#define XPAR_PS7_SD_0_BASEADDR 0xE0100000 +#define XPAR_PS7_SD_0_HIGHADDR 0xE0100FFF +#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SD_0 */ +#define XPAR_UCOS_SDPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_SDPS_0_DEVICE_ID XPAR_PS7_SD_0_DEVICE_ID +#define XPAR_UCOS_SDPS_0_BASEADDR 0xE0100000 +#define XPAR_UCOS_SDPS_0_HIGHADDR 0xE0100FFF +#define XPAR_UCOS_SDPS_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +///* Definitions for driver UCOS_TTCPS */ +//#define XPAR_UCOS_TTCPS_NUM_INSTANCES 3 +// +///* Definitions for peripheral PS7_TTC_0 */ +//#define XPAR_PS7_TTC_0_DEVICE_ID 0 +//#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000 +//#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_1_DEVICE_ID 1 +//#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004 +//#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_2_DEVICE_ID 2 +//#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008 +//#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_UARTPS */ +#define XPAR_UCOS_UARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_UCOS_UARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_UCOS_UARTPS_0_BASEADDR 0xE0001000 +#define XPAR_UCOS_UARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_UCOS_UARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_UCOS_UARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_USBPS */ +#define XPAR_UCOS_USBPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_USB_0 */ +#define XPAR_PS7_USB_0_DEVICE_ID 0 +#define XPAR_PS7_USB_0_BASEADDR 0xE0002000 +#define XPAR_PS7_USB_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_USB_0 */ +#define XPAR_UCOS_USBPS_0_DEVICE_ID XPAR_PS7_USB_0_DEVICE_ID +#define XPAR_UCOS_USBPS_0_BASEADDR 0xE0002000 +#define XPAR_UCOS_USBPS_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Definitions for driver XADCPS */ +#define XPAR_XADCPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_XADC_0 */ +#define XPAR_PS7_XADC_0_DEVICE_ID 0 +#define XPAR_PS7_XADC_0_BASEADDR 0xF8007100 +#define XPAR_PS7_XADC_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_XADC_0 */ +#define XPAR_XADCPS_0_DEVICE_ID XPAR_PS7_XADC_0_DEVICE_ID +#define XPAR_XADCPS_0_BASEADDR 0xF8007100 +#define XPAR_XADCPS_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + + +//UCOS STDOUT +#define UCOS_STDOUT_DRIVER UCOS_UART_PS7_UART +#define UCOS_STDOUT_DEVICE_ID 0 +#define STDOUT_BASEADDRESS + +//UCOS Ethernet +#define UCOS_ETHERNET_DRIVER UCOS_ETHERNET_EMACPS + +//UCOS TASK PARAMETERS +#define UCOS_START_TASK_PRIO 5 +#define UCOS_START_TASK_STACK_SIZE 784 +#define UCOS_START_DEBUG_TRACE DEF_ENABLED +#define NET_TASK_CFG_RX_PRIO 30 +#define NET_TASK_CFG_RX_STACK_SIZE 3072 +#define NET_TASK_CFG_TXDEALLOC_PRIO 6 +#define NET_TASK_CFG_TXDEALLOC_STACK_SIZE 2048 +#define NET_TASK_CFG_TMR_PRIO 18 +#define NET_TASK_CFG_TMR_STACK_SIZE 2048 +#define HTTPc_OS_CFG_TASK_PRIO 20 +#define HTTPc_OS_CFG_TASK_STK_SIZE 2048 +#define UCOS_HTTPc_OS_CFG_TASK_DELAY 1 +#define UCOS_HTTPc_OS_CFG_MSG_Q_SIZE 5 +#define UCOS_HTTPc_OS_CFG_TIMEOUT 2000 +#define UCOS_HTTPc_OS_CFG_INACTIVITY_TIMEOUT 30 + +#define UCOS_AMP_MASTER DEF_ENABLED + + +#define UCOS_CFG_INIT_CAN DEF_ENABLED +#define UCOS_CFG_INIT_NET DEF_ENABLED +#define UCOS_CFG_INIT_FS DEF_DISABLED +#define UCOS_CFG_INIT_OPENAMP DEF_DISABLED +#define UCOS_CFG_INIT_USBD DEF_DISABLED +#define UCOS_CFG_INIT_USBH DEF_DISABLED + + +#define UCOS_ETHERNET_ADDRESS "10.10.110.2" +#define UCOS_ETHERNET_GATEWAY "10.10.110.1" +#define UCOS_ETHERNET_SUBMASK "255.255.255.0" +#define UCOS_ETHERNET_DHCP DEF_ENABLED + + +#define UCOS_IF_RX_BUF_NBR 12 +#define UCOS_IF_TX_LARGE_BUF_NBR 8 +#define UCOS_IF_TX_SMALL_BUF_NBR 8 +#define UCOS_IF_RX_DESC_NBR 0 +#define UCOS_IF_TX_DESC_NBR 0 +#define UCOS_IF_DEDIC_MEM_ADDR 0 +#define UCOS_IF_DEDIC_MEM_SIZE 0 +#define UCOS_IF_HW_ADDR "50:E5:49:E6:8D:28" + + +#define UCOS_PHY_BUS_ADDR 255 +#define UCOS_PHY_BUS_MODE UCOS_NET_PHY_BUS_MODE_GMII +#define UCOS_PHY_TYPE UCOS_NET_PHY_TYPE_INT +#define UCOS_PHY_SPEED UCOS_NET_PHY_SPD_AUTO +#define UCOS_PHY_DUPLEX UCOS_NET_PHY_DUPLEX_AUTO + + +#define UCOS_USB_DRIVER UCOS_USB_NONE +#define UCOS_USB_DEVICE_ID 0 +#define UCOS_USB_TYPE UCOS_USB_TYPE_DEVICE + + +#define UCOS_RAMDISK_EN DEF_DISABLED +#define UCOS_RAMDISK_SIZE 128 +#define UCOS_RAMDISK_SECTOR_SIZE 512 +#define UCOS_RAMDISK_BASE_ADDRESS 0 + + +#define UCOS_SDCARD_EN DEF_DISABLED + + +#define XPAR_PS7_ETHERNET_0_INT_SOURCE 54 +#define XPAR_PS7_SD_0_INT_SOURCE 56 +#define XPAR_PS7_UART_1_INT_SOURCE 82 +#define XPAR_PS7_USB_0_INT_SOURCE 53 + +#define UCOS_ZYNQ_CONFIG_MMU DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_MMU DEF_DISABLED +#define UCOS_ZYNQ_CONFIG_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_OPTIMS DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_I_EN DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_D_EN DEF_DISABLED +#define UCOS_CPU_TYPE UCOS_CPU_TYPE_PS7 + +//Parameters added by Kai Gemlau +#define UCOS_SMP_ENABLE DEF_DISABLED + +/******************************************************************/ + +/* Definitions for driver TTCPS */ +#define XPAR_XTTCPS_NUM_INSTANCES 3U + +/* Definitions for peripheral PS7_TTC_0 */ +#define XPAR_PS7_TTC_0_DEVICE_ID 0U +#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000U +#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_1_DEVICE_ID 1U +#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004U +#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_2_DEVICE_ID 2U +#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008U +#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_TTC_0 */ +#define XPAR_XTTCPS_0_DEVICE_ID XPAR_PS7_TTC_0_DEVICE_ID +#define XPAR_XTTCPS_0_BASEADDR 0xF8001000U +#define XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_0_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_1_DEVICE_ID XPAR_PS7_TTC_1_DEVICE_ID +#define XPAR_XTTCPS_1_BASEADDR 0xF8001004U +#define XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_1_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_2_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define XPAR_XTTCPS_2_BASEADDR 0xF8001008U +#define XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Definitions for driver IICPS */ +#define XPAR_XIICPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_I2C_0 */ +#define XPAR_PS7_I2C_0_DEVICE_ID 0 +#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/* Definitions for peripheral PS7_I2C_1 */ +#define XPAR_PS7_I2C_1_DEVICE_ID 1 +#define XPAR_PS7_I2C_1_BASEADDR 0xE0005000 +#define XPAR_PS7_I2C_1_HIGHADDR 0xE0005FFF +#define XPAR_PS7_I2C_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + +/* Canonical definitions for peripheral PS7_I2C_1 */ +#define XPAR_XIICPS_1_DEVICE_ID XPAR_PS7_I2C_1_DEVICE_ID +#define XPAR_XIICPS_1_BASEADDR 0xE0005000 +#define XPAR_XIICPS_1_HIGHADDR 0xE0005FFF +#define XPAR_XIICPS_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver UARTPS */ +#define XPAR_XUARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_XUARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_XUARTPS_0_BASEADDR 0xE0001000 +#define XPAR_XUARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_XUARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_XUARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ diff --git a/src/APP/Aufgabe3/ps7/core0/cfg/xparameters_ps.h b/src/APP/Aufgabe3/ps7/core0/cfg/xparameters_ps.h new file mode 100644 index 0000000..e7ab8e3 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/cfg/xparameters_ps.h @@ -0,0 +1,325 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xparameters_ps.h +* +* This file contains the address definitions for the hard peripherals +* attached to the ARM Cortex A9 core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 1.00a ecm/sdm 02/01/10 Initial version
+* 3.04a sdm     02/02/12 Removed some of the defines as they are being generated through
+*                        driver tcl
+* 5.0	pkp		01/16/15 Added interrupt ID definition of ttc for TEST APP
+*
+* +* @note +* +* None. +* +******************************************************************************/ + +#ifndef _XPARAMETERS_PS_H_ +#define _XPARAMETERS_PS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/************************** Constant Definitions *****************************/ + +/* + * This block contains constant declarations for the peripherals + * within the hardblock + */ + +/* Canonical definitions for DDR MEMORY */ +#define XPAR_DDR_MEM_BASEADDR 0x00000000U +#define XPAR_DDR_MEM_HIGHADDR 0x3FFFFFFFU + +/* Canonical definitions for Interrupts */ +#define XPAR_XUARTPS_0_INTR XPS_UART0_INT_ID +#define XPAR_XUARTPS_1_INTR XPS_UART1_INT_ID +#define XPAR_XUSBPS_0_INTR XPS_USB0_INT_ID +#define XPAR_XUSBPS_1_INTR XPS_USB1_INT_ID +#define XPAR_XIICPS_0_INTR XPS_I2C0_INT_ID +#define XPAR_XIICPS_1_INTR XPS_I2C1_INT_ID +#define XPAR_XSPIPS_0_INTR XPS_SPI0_INT_ID +#define XPAR_XSPIPS_1_INTR XPS_SPI1_INT_ID +#define XPAR_XCANPS_0_INTR XPS_CAN0_INT_ID +#define XPAR_XCANPS_1_INTR XPS_CAN1_INT_ID +#define XPAR_XGPIOPS_0_INTR XPS_GPIO_INT_ID +#define XPAR_XEMACPS_0_INTR XPS_GEM0_INT_ID +#define XPAR_XEMACPS_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_XEMACPS_1_INTR XPS_GEM1_INT_ID +#define XPAR_XEMACPS_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_XSDIOPS_0_INTR XPS_SDIO0_INT_ID +#define XPAR_XQSPIPS_0_INTR XPS_QSPI_INT_ID +#define XPAR_XSDIOPS_1_INTR XPS_SDIO1_INT_ID +#define XPAR_XWDTPS_0_INTR XPS_WDT_INT_ID +#define XPAR_XDCFG_0_INTR XPS_DVC_INT_ID +#define XPAR_SCUTIMER_INTR XPS_SCU_TMR_INT_ID +#define XPAR_SCUWDT_INTR XPS_SCU_WDT_INT_ID +#define XPAR_XTTCPS_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_XTTCPS_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_XTTCPS_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_XTTCPS_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_XTTCPS_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_XTTCPS_5_INTR XPS_TTC1_2_INT_ID +#define XPAR_XDMAPS_0_FAULT_INTR XPS_DMA0_ABORT_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_0 XPS_DMA0_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_1 XPS_DMA1_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_2 XPS_DMA2_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_3 XPS_DMA3_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_4 XPS_DMA4_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_5 XPS_DMA5_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_6 XPS_DMA6_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_7 XPS_DMA7_INT_ID + + +#define XPAR_XQSPIPS_0_LINEAR_BASEADDR XPS_QSPI_LINEAR_BASEADDR +#define XPAR_XPARPORTPS_CTRL_BASEADDR XPS_PARPORT_CRTL_BASEADDR + + + +/* Canonical definitions for DMAC */ + + +/* Canonical definitions for WDT */ + +/* Canonical definitions for SLCR */ +#define XPAR_XSLCR_NUM_INSTANCES 1U +#define XPAR_XSLCR_0_DEVICE_ID 0U +#define XPAR_XSLCR_0_BASEADDR XPS_SYS_CTRL_BASEADDR + +/* Canonical definitions for SCU GIC */ +#define XPAR_SCUGIC_NUM_INSTANCES 1U +#define XPAR_SCUGIC_SINGLE_DEVICE_ID 0U +#define XPAR_SCUGIC_CPU_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000100U) +#define XPAR_SCUGIC_DIST_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00001000U) +#define XPAR_SCUGIC_ACK_BEFORE 0U + +/* Canonical definitions for Global Timer */ +#define XPAR_GLOBAL_TMR_NUM_INSTANCES 1U +#define XPAR_GLOBAL_TMR_DEVICE_ID 0U +#define XPAR_GLOBAL_TMR_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000200U) +#define XPAR_GLOBAL_TMR_INTR XPS_GLOBAL_TMR_INT_ID + + +/* Xilinx Parallel Flash Library (XilFlash) User Settings */ +#define XPAR_AXI_EMC + + +#define XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/* + * This block contains constant declarations for the peripherals + * within the hardblock. These have been put for bacwards compatibilty + */ + +#define XPS_PERIPHERAL_BASEADDR 0xE0000000U +#define XPS_UART0_BASEADDR 0xE0000000U +#define XPS_UART1_BASEADDR 0xE0001000U +#define XPS_USB0_BASEADDR 0xE0002000U +#define XPS_USB1_BASEADDR 0xE0003000U +#define XPS_I2C0_BASEADDR 0xE0004000U +#define XPS_I2C1_BASEADDR 0xE0005000U +#define XPS_SPI0_BASEADDR 0xE0006000U +#define XPS_SPI1_BASEADDR 0xE0007000U +#define XPS_CAN0_BASEADDR 0xE0008000U +#define XPS_CAN1_BASEADDR 0xE0009000U +#define XPS_GPIO_BASEADDR 0xE000A000U +#define XPS_GEM0_BASEADDR 0xE000B000U +#define XPS_GEM1_BASEADDR 0xE000C000U +#define XPS_QSPI_BASEADDR 0xE000D000U +#define XPS_PARPORT_CRTL_BASEADDR 0xE000E000U +#define XPS_SDIO0_BASEADDR 0xE0100000U +#define XPS_SDIO1_BASEADDR 0xE0101000U +#define XPS_IOU_BUS_CFG_BASEADDR 0xE0200000U +#define XPS_NAND_BASEADDR 0xE1000000U +#define XPS_PARPORT0_BASEADDR 0xE2000000U +#define XPS_PARPORT1_BASEADDR 0xE4000000U +#define XPS_QSPI_LINEAR_BASEADDR 0xFC000000U +#define XPS_SYS_CTRL_BASEADDR 0xF8000000U /* AKA SLCR */ +#define XPS_TTC0_BASEADDR 0xF8001000U +#define XPS_TTC1_BASEADDR 0xF8002000U +#define XPS_DMAC0_SEC_BASEADDR 0xF8003000U +#define XPS_DMAC0_NON_SEC_BASEADDR 0xF8004000U +#define XPS_WDT_BASEADDR 0xF8005000U +#define XPS_DDR_CTRL_BASEADDR 0xF8006000U +#define XPS_DEV_CFG_APB_BASEADDR 0xF8007000U +#define XPS_AFI0_BASEADDR 0xF8008000U +#define XPS_AFI1_BASEADDR 0xF8009000U +#define XPS_AFI2_BASEADDR 0xF800A000U +#define XPS_AFI3_BASEADDR 0xF800B000U +#define XPS_OCM_BASEADDR 0xF800C000U +#define XPS_EFUSE_BASEADDR 0xF800D000U +#define XPS_CORESIGHT_BASEADDR 0xF8800000U +#define XPS_TOP_BUS_CFG_BASEADDR 0xF8900000U +#define XPS_SCU_PERIPH_BASE 0xF8F00000U +#define XPS_L2CC_BASEADDR 0xF8F02000U +#define XPS_SAM_RAM_BASEADDR 0xFFFC0000U +#define XPS_FPGA_AXI_S0_BASEADDR 0x40000000U +#define XPS_FPGA_AXI_S1_BASEADDR 0x80000000U +#define XPS_IOU_S_SWITCH_BASEADDR 0xE0000000U +#define XPS_PERIPH_APB_BASEADDR 0xF8000000U + +/* Shared Peripheral Interrupts (SPI) */ +#define XPS_CORE_PARITY0_INT_ID 32U +#define XPS_CORE_PARITY1_INT_ID 33U +#define XPS_L2CC_INT_ID 34U +#define XPS_OCMINTR_INT_ID 35U +#define XPS_ECC_INT_ID 36U +#define XPS_PMU0_INT_ID 37U +#define XPS_PMU1_INT_ID 38U +#define XPS_SYSMON_INT_ID 39U +#define XPS_DVC_INT_ID 40U +#define XPS_WDT_INT_ID 41U +#define XPS_TTC0_0_INT_ID 42U +#define XPS_TTC0_1_INT_ID 43U +#define XPS_TTC0_2_INT_ID 44U +#define XPS_DMA0_ABORT_INT_ID 45U +#define XPS_DMA0_INT_ID 46U +#define XPS_DMA1_INT_ID 47U +#define XPS_DMA2_INT_ID 48U +#define XPS_DMA3_INT_ID 49U +#define XPS_SMC_INT_ID 50U +#define XPS_QSPI_INT_ID 51U +#define XPS_GPIO_INT_ID 52U +#define XPS_USB0_INT_ID 53U +#define XPS_GEM0_INT_ID 54U +#define XPS_GEM0_WAKE_INT_ID 55U +#define XPS_SDIO0_INT_ID 56U +#define XPS_I2C0_INT_ID 57U +#define XPS_SPI0_INT_ID 58U +#define XPS_UART0_INT_ID 59U +#define XPS_CAN0_INT_ID 60U +#define XPS_FPGA0_INT_ID 61U +#define XPS_FPGA1_INT_ID 62U +#define XPS_FPGA2_INT_ID 63U +#define XPS_FPGA3_INT_ID 64U +#define XPS_FPGA4_INT_ID 65U +#define XPS_FPGA5_INT_ID 66U +#define XPS_FPGA6_INT_ID 67U +#define XPS_FPGA7_INT_ID 68U +#define XPS_TTC1_0_INT_ID 69U +#define XPS_TTC1_1_INT_ID 70U +#define XPS_TTC1_2_INT_ID 71U +#define XPS_DMA4_INT_ID 72U +#define XPS_DMA5_INT_ID 73U +#define XPS_DMA6_INT_ID 74U +#define XPS_DMA7_INT_ID 75U +#define XPS_USB1_INT_ID 76U +#define XPS_GEM1_INT_ID 77U +#define XPS_GEM1_WAKE_INT_ID 78U +#define XPS_SDIO1_INT_ID 79U +#define XPS_I2C1_INT_ID 80U +#define XPS_SPI1_INT_ID 81U +#define XPS_UART1_INT_ID 82U +#define XPS_CAN1_INT_ID 83U +#define XPS_FPGA8_INT_ID 84U +#define XPS_FPGA9_INT_ID 85U +#define XPS_FPGA10_INT_ID 86U +#define XPS_FPGA11_INT_ID 87U +#define XPS_FPGA12_INT_ID 88U +#define XPS_FPGA13_INT_ID 89U +#define XPS_FPGA14_INT_ID 90U +#define XPS_FPGA15_INT_ID 91U + +/* Private Peripheral Interrupts (PPI) */ +#define XPS_GLOBAL_TMR_INT_ID 27U /* SCU Global Timer interrupt */ +#define XPS_FIQ_INT_ID 28U /* FIQ from FPGA fabric */ +#define XPS_SCU_TMR_INT_ID 29U /* SCU Private Timer interrupt */ +#define XPS_SCU_WDT_INT_ID 30U /* SCU Private WDT interrupt */ +#define XPS_IRQ_INT_ID 31U /* IRQ from FPGA fabric */ + + +/* REDEFINES for TEST APP */ +/* Definitions for UART */ +#define XPAR_PS7_UART_0_INTR XPS_UART0_INT_ID +#define XPAR_PS7_UART_1_INTR XPS_UART1_INT_ID +#define XPAR_PS7_USB_0_INTR XPS_USB0_INT_ID +#define XPAR_PS7_USB_1_INTR XPS_USB1_INT_ID +#define XPAR_PS7_I2C_0_INTR XPS_I2C0_INT_ID +#define XPAR_PS7_I2C_1_INTR XPS_I2C1_INT_ID +#define XPAR_PS7_SPI_0_INTR XPS_SPI0_INT_ID +#define XPAR_PS7_SPI_1_INTR XPS_SPI1_INT_ID +#define XPAR_PS7_CAN_0_INTR XPS_CAN0_INT_ID +#define XPAR_PS7_CAN_1_INTR XPS_CAN1_INT_ID +#define XPAR_PS7_GPIO_0_INTR XPS_GPIO_INT_ID +#define XPAR_PS7_ETHERNET_0_INTR XPS_GEM0_INT_ID +#define XPAR_PS7_ETHERNET_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_PS7_ETHERNET_1_INTR XPS_GEM1_INT_ID +#define XPAR_PS7_ETHERNET_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_PS7_QSPI_0_INTR XPS_QSPI_INT_ID +#define XPAR_PS7_WDT_0_INTR XPS_WDT_INT_ID +#define XPAR_PS7_SCUWDT_0_INTR XPS_SCU_WDT_INT_ID +#define XPAR_PS7_SCUTIMER_0_INTR XPS_SCU_TMR_INT_ID +#define XPAR_PS7_XADC_0_INTR XPS_SYSMON_INT_ID +#define XPAR_PS7_TTC_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_PS7_TTC_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_PS7_TTC_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_PS7_TTC_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_PS7_TTC_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_PS7_TTC_5_INTR XPS_TTC1_2_INT_ID + +#define XPAR_XADCPS_INT_ID XPS_SYSMON_INT_ID + +/* For backwards compatibilty */ +#define XPAR_XUARTPS_0_CLOCK_HZ XPAR_XUARTPS_0_UART_CLK_FREQ_HZ +#define XPAR_XUARTPS_1_CLOCK_HZ XPAR_XUARTPS_1_UART_CLK_FREQ_HZ +#define XPAR_XTTCPS_0_CLOCK_HZ XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_1_CLOCK_HZ XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_2_CLOCK_HZ XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_3_CLOCK_HZ XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_4_CLOCK_HZ XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_5_CLOCK_HZ XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ +#define XPAR_XIICPS_0_CLOCK_HZ XPAR_XIICPS_0_I2C_CLK_FREQ_HZ +#define XPAR_XIICPS_1_CLOCK_HZ XPAR_XIICPS_1_I2C_CLK_FREQ_HZ + +#define XPAR_XQSPIPS_0_CLOCK_HZ XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ + +#define XPAR_SCUTIMER_DEVICE_ID 0U +#define XPAR_SCUWDT_DEVICE_ID 0U + + +#ifdef __cplusplus +} +#endif + +#endif /* protection macro */ diff --git a/src/APP/Aufgabe3/ps7/core0/linker/lscript.ld b/src/APP/Aufgabe3/ps7/core0/linker/lscript.ld new file mode 100644 index 0000000..a9f145a --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/linker/lscript.ld @@ -0,0 +1,291 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: */ +/* */ +/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : Cortex-A9 Linker Script */ +/* */ +/*******************************************************************/ + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000; +_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x2000; + +_ABORT_STACK_SIZE = DEFINED(_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024; +_SUPERVISOR_STACK_SIZE = DEFINED(_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048; +_IRQ_STACK_SIZE = DEFINED(_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024; +_FIQ_STACK_SIZE = DEFINED(_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024; +_UNDEF_STACK_SIZE = DEFINED(_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024; + +/* Define Memories in the system */ + +MEMORY +{ + axi_bram_ctrl_0_Mem0 : ORIGIN = 0x40000000, LENGTH = 0x2000 + ps7_ddr_0 : ORIGIN = 0x100000, LENGTH = 0x3FF00000 + ps7_qspi_linear_0 : ORIGIN = 0xFC000000, LENGTH = 0x2000000 + ps7_ram_0 : ORIGIN = 0x0, LENGTH = 0x30000 + ps7_ram_1 : ORIGIN = 0xFFFF0000, LENGTH = 0xFE00 + ps7_ddr_core_0 : ORIGIN = 0x100000, LENGTH = 0x700000 + ps7_ddr_core_1 : ORIGIN = 0x800000, LENGTH = 0x800000 +} + +/* Specify the default entry point to the program */ + +ENTRY(_vector_table) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ +.text : { + KEEP (*(.vectors)) + *(.boot) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.plt) + *(.gnu_warning) + *(.gcc_execpt_table) + *(.glue_7) + *(.glue_7t) + *(.vfp11_veneer) + *(.ARM.extab) + *(.gnu.linkonce.armextab.*) +} > ps7_ddr_core_0 + +.init : { + KEEP (*(.init)) +} > ps7_ddr_core_0 + +.fini : { + KEEP (*(.fini)) +} > ps7_ddr_core_0 + +.rodata : { + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > ps7_ddr_core_0 + +.rodata1 : { + __rodata1_start = .; + *(.rodata1) + *(.rodata1.*) + __rodata1_end = .; +} > ps7_ddr_core_0 + +.sdata2 : { + __sdata2_start = .; + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + __sdata2_end = .; +} > ps7_ddr_core_0 + +.sbss2 : { + __sbss2_start = .; + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + __sbss2_end = .; +} > ps7_ddr_core_0 + +.data : { + __data_start = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.jcr) + *(.got) + *(.got.plt) + __data_end = .; +} > ps7_ddr_core_0 + +.data1 : { + __data1_start = .; + *(.data1) + *(.data1.*) + __data1_end = .; +} > ps7_ddr_core_0 + +.got : { + *(.got) +} > ps7_ddr_core_0 + +.ctors : { + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > ps7_ddr_core_0 + +.dtors : { + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > ps7_ddr_core_0 + +.fixup : { + __fixup_start = .; + *(.fixup) + __fixup_end = .; +} > ps7_ddr_core_0 + +.eh_frame : { + *(.eh_frame) +} > ps7_ddr_core_0 + +.eh_framehdr : { + __eh_framehdr_start = .; + *(.eh_framehdr) + __eh_framehdr_end = .; +} > ps7_ddr_core_0 + +.gcc_except_table : { + *(.gcc_except_table) +} > ps7_ddr_core_0 + +.mmu_tbl (ALIGN(16384)) : { + __mmu_tbl_start = .; + *(.mmu_tbl) + __mmu_tbl_end = .; +} > ps7_ddr_core_0 + +.ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx*) + *(.gnu.linkonce.armexidix.*.*) + __exidx_end = .; +} > ps7_ddr_core_0 + +.preinit_array : { + __preinit_array_start = .; + KEEP (*(SORT(.preinit_array.*))) + KEEP (*(.preinit_array)) + __preinit_array_end = .; +} > ps7_ddr_core_0 + +.init_array : { + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; +} > ps7_ddr_core_0 + +.fini_array : { + __fini_array_start = .; + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array)) + __fini_array_end = .; +} > ps7_ddr_core_0 + +.ARM.attributes : { + __ARM.attributes_start = .; + *(.ARM.attributes) + __ARM.attributes_end = .; +} > ps7_ddr_core_0 + +.sdata : { + __sdata_start = .; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + __sdata_end = .; +} > ps7_ddr_core_0 + +.sbss (NOLOAD) : { + __sbss_start = .; + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + __sbss_end = .; +} > ps7_ddr_core_0 + +.tdata : { + __tdata_start = .; + *(.tdata) + *(.tdata.*) + *(.gnu.linkonce.td.*) + __tdata_end = .; +} > ps7_ddr_core_0 + +.tbss : { + __tbss_start = .; + *(.tbss) + *(.tbss.*) + *(.gnu.linkonce.tb.*) + __tbss_end = .; +} > ps7_ddr_core_0 + +.bss (NOLOAD) : { + __bss_start = .; + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + __bss_end = .; +} > ps7_ddr_core_0 + +_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 ); + +_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 ); + +/* Generate Stack and Heap definitions */ + +.heap (NOLOAD) : { + . = ALIGN(16); + _heap = .; + HeapBase = .; + _heap_start = .; + . += _HEAP_SIZE; + _heap_end = .; + HeapLimit = .; +} > ps7_ddr_core_0 + +.stack (NOLOAD) : { + . = ALIGN(16); + _stack_end = .; + . += _STACK_SIZE; + . = ALIGN(16); + _stack = .; + __stack = _stack; + . = ALIGN(16); + _irq_stack_end = .; + . += _IRQ_STACK_SIZE; + . = ALIGN(16); + __irq_stack = .; + _supervisor_stack_end = .; + . += _SUPERVISOR_STACK_SIZE; + . = ALIGN(16); + __supervisor_stack = .; + _abort_stack_end = .; + . += _ABORT_STACK_SIZE; + . = ALIGN(16); + __abort_stack = .; + _fiq_stack_end = .; + . += _FIQ_STACK_SIZE; + . = ALIGN(16); + __fiq_stack = .; + _undef_stack_end = .; + . += _UNDEF_STACK_SIZE; + . = ALIGN(16); + __undef_stack = .; +} > ps7_ddr_core_0 + +_end = .; +} + diff --git a/src/APP/Aufgabe3/ps7/core0/main.c b/src/APP/Aufgabe3/ps7/core0/main.c new file mode 100644 index 0000000..4260ebc --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/main.c @@ -0,0 +1,31 @@ +/* + ============================================================================ + Name : main.c + Author : Laurenz Borchers + Version : + Copyright : Copyright belongs to the authors + Description : Hello World in C, Praktikum Aufgabe 3 + ============================================================================ + */ + +#include +#include +#include "ucos_uartps.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "xil_testmem.h" +#include "xil_printf.h" +#include "ttc_timer.h" + + +void InitDoneCallback(void * p_arg) { + (void) p_arg; + UCOS_Print("OS started!\r\n"); +} + +int main(void) { + MMUInit(); + UCOSStartup(InitDoneCallback); + while (1) + ; +} diff --git a/src/APP/Aufgabe3/ps7/core0/src/app_hooks.c b/src/APP/Aufgabe3/ps7/core0/src/app_hooks.c new file mode 100644 index 0000000..7db7750 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/src/app_hooks.c @@ -0,0 +1,259 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* uC/OS-II +* Application Hooks +* +* Filename : app_hooks.c +* Version : V1.00 +* Programmer(s) : FT +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +*/ + +#include + + +/* +********************************************************************************************************* +* EXTERN GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL CONSTANTS +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL DATA TYPES +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* LOCAL TABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL FUNCTION PROTOTYPES +********************************************************************************************************* +*/ + + + +/* +********************************************************************************************************** +********************************************************************************************************** +** GLOBAL FUNCTIONS +********************************************************************************************************** +********************************************************************************************************** +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +** uC/OS-II APP HOOKS +********************************************************************************************************* +********************************************************************************************************* +*/ + +#if (OS_APP_HOOKS_EN > 0) + +/* +********************************************************************************************************* +* TASK CREATION HOOK (APPLICATION) +* +* Description : This function is called when a task is created. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being created. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskCreateHook (OS_TCB *ptcb) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskCreateHook(ptcb); +#endif +} + +/* +********************************************************************************************************* +* TASK DELETION HOOK (APPLICATION) +* +* Description : This function is called when a task is deleted. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being deleted. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskDelHook (OS_TCB *ptcb) +{ + (void)ptcb; +} + +/* +********************************************************************************************************* +* IDLE TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskIdleHook(), which is called by the idle task. This hook +* has been added to allow you to do such things as STOP the CPU to conserve power. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are enabled during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 251 +void App_TaskIdleHook (void) +{ +} +#endif + +/* +********************************************************************************************************* +* STATISTIC TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskStatHook(), which is called every second by uC/OS-II's +* statistics task. This allows your application to add functionality to the statistics task. +* +* Argument(s) : none. +********************************************************************************************************* +*/ + +void App_TaskStatHook (void) +{ +} + +/* +********************************************************************************************************* +* TASK RETURN HOOK (APPLICATION) +* +* Description: This function is called if a task accidentally returns. In other words, a task should +* either be an infinite loop or delete itself when done. +* +* Arguments : ptcb is a pointer to the task control block of the task that is returning. +* +* Note(s) : none +********************************************************************************************************* +*/ + + +#if OS_VERSION >= 289 +void App_TaskReturnHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TASK SWITCH HOOK (APPLICATION) +* +* Description : This function is called when a task switch is performed. This allows you to perform other +* operations during a context switch. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are disabled during this call. +* +* (2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that +* will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the +* task being switched out (i.e. the preempted task). +********************************************************************************************************* +*/ + +#if OS_TASK_SW_HOOK_EN > 0 +void App_TaskSwHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN > 0) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskSwHook(); +#endif +} +#endif + +/* +********************************************************************************************************* +* OS_TCBInit() HOOK (APPLICATION) +* +* Description : This function is called by OSTCBInitHook(), which is called by OS_TCBInit() after setting +* up most of the TCB. +* +* Argument(s) : ptcb is a pointer to the TCB of the task being created. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 204 +void App_TCBInitHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TICK HOOK (APPLICATION) +* +* Description : This function is called every tick. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_TIME_TICK_HOOK_EN > 0 +void App_TimeTickHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TickHook(); +#endif +} +#endif +#endif diff --git a/src/APP/Aufgabe3/ps7/core0/src/ttc_timer.c b/src/APP/Aufgabe3/ps7/core0/src/ttc_timer.c new file mode 100644 index 0000000..7c4e599 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/src/ttc_timer.c @@ -0,0 +1,38 @@ +#include +#include +#include "xparameters.h" +#include "xstatus.h" +#include "xil_exception.h" +#include "xil_printf.h" +#include "xttcps.h" +#include "xscugic.h" +#include "ucos_uartps.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "ucos_int.h" +#include "ttc_timer.h" +#include "xgpiops.h" +#include "pid.h" + + +#define TTC_PWM_INTR_ID XPAR_XTTCPS_0_INTR + + +int timer_Init(void *pdata); +static void timer_gpio_Init(); +static void intervalHandler(void *CallBackRef); + + +int timer_Init(void *pdata){ + UCOS_Print("Setting up Timer!\r\n"); + UCOS_Print("Done!\r\n"); + return 0; +} + +static void timer_gpio_Init(){ +} + + +static void intervalHandler(void *CallBackRef){ + +} diff --git a/src/APP/Aufgabe3/ps7/core0/src/uartps_cfg.c b/src/APP/Aufgabe3/ps7/core0/src/uartps_cfg.c new file mode 100644 index 0000000..dae6c62 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/src/uartps_cfg.c @@ -0,0 +1,17 @@ + +#include "ucos_uartps.h" +#include "xparameters.h" +#include "xparameters_ps.h" + +/* + * The uart configuration table for devices + */ +UCOS_UARTPS_Config UCOS_UARTPS_ConfigTable[] = { + { + XPAR_PS7_UART_1_DEVICE_ID, + XPAR_PS7_UART_1_BASEADDR, + XPAR_PS7_UART_1_UART_CLK_FREQ_HZ, + XPAR_PS7_UART_1_HAS_MODEM, + XPAR_PS7_UART_1_INT_SOURCE + } +}; diff --git a/src/APP/Aufgabe3/ps7/core0/src/xgpiops_g.c b/src/APP/Aufgabe3/ps7/core0/src/xgpiops_g.c new file mode 100644 index 0000000..31cfbbb --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/src/xgpiops_g.c @@ -0,0 +1,56 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ + +#include "xparameters.h" +#include "xparameters_ps.h" +#include "xgpiops.h" + +/* +* The configuration table for devices +*/ + +XGpioPs_Config XGpioPs_ConfigTable[XPAR_XGPIOPS_NUM_INSTANCES] = +{ + { + XPAR_PS7_GPIO_0_DEVICE_ID, + XPAR_PS7_GPIO_0_BASEADDR + } +}; + + diff --git a/src/APP/Aufgabe3/ps7/core0/src/xiicps_g.c b/src/APP/Aufgabe3/ps7/core0/src/xiicps_g.c new file mode 100644 index 0000000..2e9d0ff --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/src/xiicps_g.c @@ -0,0 +1,63 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ + +#include "xparameters.h" +#include "xparameters_ps.h" + +#include "xiicps.h" + +/* +* The configuration table for devices +*/ + +XIicPs_Config XIicPs_ConfigTable[XPAR_XIICPS_NUM_INSTANCES] = +{ + { + XPAR_PS7_I2C_0_DEVICE_ID, + XPAR_PS7_I2C_0_BASEADDR, + XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ + }, + { + XPAR_PS7_I2C_1_DEVICE_ID, + XPAR_PS7_I2C_1_BASEADDR, + XPAR_PS7_I2C_1_I2C_CLK_FREQ_HZ + } +}; + + diff --git a/src/APP/Aufgabe3/ps7/core0/src/xttcps_g.c b/src/APP/Aufgabe3/ps7/core0/src/xttcps_g.c new file mode 100644 index 0000000..15658b3 --- /dev/null +++ b/src/APP/Aufgabe3/ps7/core0/src/xttcps_g.c @@ -0,0 +1,111 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ +#include "xparameters_ps.h" +#include "xparameters.h" +#include "xttcps.h" + +/* +* The configuration table for devices +*/ + +XTtcPs_Config XTtcPs_ConfigTable[] = +{ + { + XPAR_PS7_TTC_0_DEVICE_ID, + XPAR_PS7_TTC_0_BASEADDR, + XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ + }, + { + XPAR_PS7_TTC_1_DEVICE_ID, + XPAR_PS7_TTC_1_BASEADDR, + XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ + }, + { + XPAR_PS7_TTC_2_DEVICE_ID, + XPAR_PS7_TTC_2_BASEADDR, + XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ + }//, +// { +// XPAR_PS7_TTC_3_DEVICE_ID, +// XPAR_PS7_TTC_3_BASEADDR, +// XPAR_PS7_TTC_3_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_4_DEVICE_ID, +// XPAR_PS7_TTC_4_BASEADDR, +// XPAR_PS7_TTC_4_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_5_DEVICE_ID, +// XPAR_PS7_TTC_5_BASEADDR, +// XPAR_PS7_TTC_5_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_6_DEVICE_ID, +// XPAR_PS7_TTC_6_BASEADDR, +// XPAR_PS7_TTC_6_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_7_DEVICE_ID, +// XPAR_PS7_TTC_7_BASEADDR, +// XPAR_PS7_TTC_7_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_8_DEVICE_ID, +// XPAR_PS7_TTC_8_BASEADDR, +// XPAR_PS7_TTC_8_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_9_DEVICE_ID, +// XPAR_PS7_TTC_9_BASEADDR, +// XPAR_PS7_TTC_9_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_10_DEVICE_ID, +// XPAR_PS7_TTC_10_BASEADDR, +// XPAR_PS7_TTC_10_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_11_DEVICE_ID, +// XPAR_PS7_TTC_11_BASEADDR, +// XPAR_PS7_TTC_11_TTC_CLK_FREQ_HZ +// } +}; + + diff --git a/src/APP/Aufgabe4/ps7/core0/build/config.mk b/src/APP/Aufgabe4/ps7/core0/build/config.mk new file mode 100644 index 0000000..2135778 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/build/config.mk @@ -0,0 +1,11 @@ +#µController dependent flags +MCFLAGS =-mcpu=cortex-a9 -march=armv7-a -mthumb -mthumb-interwork -mfloat-abi=softfp -mfpu=neon + +#Optimization +OPTIMIZE=-O0 -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections + +#Debug Level +DEBUG =-g3 + +#Linker flags +LDFLAGS = -nostartfiles -Xlinker --gc-sections -lm diff --git a/src/APP/Aufgabe4/ps7/core0/build/includes.mk b/src/APP/Aufgabe4/ps7/core0/build/includes.mk new file mode 100644 index 0000000..3f9b143 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/build/includes.mk @@ -0,0 +1,52 @@ + +INC += -I"$(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/cfg/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ipi" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_ttcps/src" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common" + +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/" +INC += -I"$(SRC_DIR)/Modules/MMU" + + +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/" + +#scugic.h fix +INC += -I"$(SRC_DIR)/Xilinx/libsrc/scugic_v3_9/src/" + +#uart includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/uartps_v3_6/src/" + +#xttcps includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/" + + +#gpio includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/" + +#I2C includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/" + +#task set includes +INC += -I"$(SRC_DIR)/Modules/genericTaskset/if" + diff --git a/src/APP/Aufgabe4/ps7/core0/build/sources.mk b/src/APP/Aufgabe4/ps7/core0/build/sources.mk new file mode 100644 index 0000000..0546757 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/build/sources.mk @@ -0,0 +1,78 @@ +#Startup file +SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/asm_vectors.S +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/subdir.mk +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/subdir.mk + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_osii/src/bsp/$(ARCH)/ucos_osii_bsp.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_common/src/$(ARCH)/cpu_bsp.c + + + +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/main.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/app_hooks.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/uartps_cfg.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/imu.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xttcps_g.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xgpiops_g.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xiicps_g.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/GNU/cpu_cache_armv7_generic_l1_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/cpu_cache_armv7_generic_l1.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/cpu_core.c +#SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.c +#SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_math.c + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.c + +-include $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-II/kal.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Collections/slist.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Auth/auth.c + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/subdir.mk + +#mmu +SRC += $(SRC_DIR)/Modules/MMU/mmu.c + + +#src for triple timer counter +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_options.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_sinit.c + +#src for GPIO +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_hw.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_intr.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_sinit.c + +#src for I2C +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_hw.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_intr.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_master.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_options.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_sinit.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_slave.c + + + + diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/app_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/app_cfg.h new file mode 100644 index 0000000..c5426f0 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/app_cfg.h @@ -0,0 +1,82 @@ +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* This BSP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* Filename : app_cfg.h +* Version : V1.42 +* Programmer(s) : JBL +********************************************************************************************************* +*/ + +#ifndef UCOS_APP_CFG_PRESENT +#define UCOS_APP_CFG_PRESENT + +#include + +#include + +#define APP_CPU_ENABLED DEF_ENABLED + +#define APP_LIB_ENABLED DEF_ENABLED + +#define APP_COMMON_ENABLED DEF_ENABLED + +#define APP_SHELL_ENABLED DEF_DISABLED + +#define APP_CLK_ENABLED DEF_DISABLED + +#define APP_OSIII_ENABLED DEF_DISABLED + +#define APP_OSII_ENABLED DEF_ENABLED + +#define APP_TCPIP_ENABLED DEF_DISABLED + +#define APP_TCPIP_EXP_ENABLED DEF_DISABLED + +#define APP_DHCPC_ENABLED DEF_DISABLED + +#define APP_DNSC_ENABLED DEF_DISABLED + +#define APP_HTTPC_ENABLED DEF_DISABLED + +#define APP_MQTTC_ENABLED DEF_DISABLED + +#define APP_TELNETS_ENABLED DEF_DISABLED + +#define APP_IPERF_ENABLED DEF_DISABLED + +#define APP_FS_ENABLED DEF_DISABLED + +#define APP_USBD_ENABLED DEF_DISABLED + +#define APP_USBH_ENABLED DEF_DISABLED + +#define APP_OPENAMP_ENABLED DEF_DISABLED + +#define OS_TASK_TMR_PRIO 3 + + +#endif /* #ifndef UCOS_APP_CFG_PRESENT */ + diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/can_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/can_cfg.h new file mode 100644 index 0000000..ebb502c --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/can_cfg.h @@ -0,0 +1,202 @@ +/* +********************************************************************************************************* +* uC/CAN +* The Embedded CAN suite +* +* (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CAN is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* uC/CAN CONFIGURATION +* +* ZYNQ ZC7000 Series +* CAN DRIVER +* Filename : can_cfg.h +* Version : V2.41.00 +* Programmer(s) : E0 +* DC +********************************************************************************************************* +*/ + +#ifndef _CAN_CFG_H_ +#define _CAN_CFG_H_ + +#include "lib_def.h" + + +/* +********************************************************************************************************* +* COMMON DEFINES & ENUMERATIONS +********************************************************************************************************* +*/ + + /* Definiton for CANSIG_GRANULARITY, Options: */ +#define CAN_CFG_BIT 0u /* BIT */ +#define CAN_CFG_BYTE 1u /* BYTE */ + +#ifndef CAN_FALSE +#define CAN_FALSE 0u +#endif + +#ifndef CAN_TRUE +#define CAN_TRUE 1u +#endif + +#ifndef NULL_PTR +#define NULL_PTR (void *)0 +#endif + + /* ------------ APPLICATION ENUMERATIONS -------------- */ +enum { + S_NODESTATUS = 0, + S_CPULOAD, + S_COUNTER, + S_MAX, +}; + +enum { + M_STATUS = 0, + M_COMMAND, + M_MAX +}; + + +/* +********************************************************************************************************* +* MULTIPLE CAN CONTROLLERS +********************************************************************************************************* +*/ + +#define CAN_MODULE_CHANNEL_0 DEF_ENABLED +#define CAN_MODULE_CHANNEL_1 DEF_DISABLED + + +/* +********************************************************************************************************* +* DRIVER SPECIFIC DEFINES +********************************************************************************************************* +*/ + /* ---------------- BAUDRATE SETTINGS ----------------- */ +#define CAN_DEFAULT_BAUDRATE 1000000u /* Default Baudrate */ +#define CAN_DEFAULT_SP 750u /* Default Bit Sample Point in 1/10 % */ +#define CAN_DEFAULT_RJW 125u /* Default Re-Synch Jump Width in 1/10 % */ + + /* ---------------- TIMEOUT SETTINGS ------------------ */ +#define CAN_TIMEOUT_ERR_VAL 100000uL /* Timeout Value for While Loop Error Checks */ + + +/* ================================== ADVANCED DRIVER CONFIGURATION: DEFAULT VALUES ================================== */ +/* By Default, the following Driver specific settings for the ZYNQ ZC7xxx Driver are set to their default values */ +/* unless they are modified by customer needs. */ +/* */ +/* By Default, the Watermark level is configured to Maximum Watermark Value in the Driver, based on the reset value */ +/* presented by the Reference Manual. Redefine the following define to modify the Watermark Level for the following. */ +/* Tx FIFO Empty & Rx FIFO Full Watermark Level(s): */ +/* NOTE : The VALID range is between 1 & 63. */ +/* */ +/* #define CAN_WATERMARK_Rx_Tx_SIZE 63u */ +/* */ +/* By Default, the Operating Mode of the CAN controller is configured to "NORMAL" Mode. For diagnostic checking, */ +/* additional operating modes have been included in the driver. Redefine the following define to modify the Operating */ +/* Mode to either "LOOP BACK" or "SNOOP" Mode(s). */ +/* NOTE that only one operating mode can be selected at once at Initialization. Once CAN has been Initialized it */ +/* is possible to change between Operating Modes at run-time using the xxx_CAN_IoCtl() API Function call. */ +/* */ +/* #define CAN_DIAGNOSTIC_OFF 0u */ +/* #define CAN_DIAGNOSTIC_LOOPBACK 1u */ +/* #define CAN_DIAGNOSTIC_SNOOP 2u */ +/* */ +/* #define CAN_DIAGNOSTIC_SELECT CAN_DIAGNOSTIC_LOOPBACK */ +/* */ +/* ==================================================================================================================== */ + + +/* +********************************************************************************************************* +* CAN BUS +********************************************************************************************************* +*/ + +#define CANBUS_EN 1u /* Enable CAN Bus Management */ +#define CANBUS_N 3u /* Number of busses */ +#define CANBUS_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANBUS_TX_HANDLER_EN 1u /* Enable usage of CanBusTxHandler */ +#define CANBUS_RX_HANDLER_EN 1u /* Enable usage of CanBusRxHandler */ +#define CANBUS_NS_HANDLER_EN 1u /* Enable usage of CanBusNsHandler */ + +#define CANBUS_STAT_EN 1u /* Enable Bus Statistics */ +#define CANBUS_TX_QSIZE (2u * CANBUS_N) /* Transmit Queue Size in CAN Frames for each CAN Bus */ +#define CANBUS_RX_QSIZE (2u * CANBUS_N) /* Receive Queue Size in CAN Frames for each CAN Bus */ + +#define CANBUS_HOOK_NS_EN 1u /* Enable Node Status Handler Hook Function */ +#define CANBUS_HOOK_RX_EN 1u /* Enable Rx Handler Hook Function */ +#define CANBUS_RX_READ_ALWAYS_EN 1u /* If enabled the Rx Handler executes a read even.. */ + /* .. when frames can't be allocated */ + + +/* +********************************************************************************************************* +* CAN MESSAGE +********************************************************************************************************* +*/ + +#define CANMSG_EN 1u /* Enable CAN Message Support */ +#define CANMSG_N 2u /* Number of messages */ +#define CANMSG_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN SIGNAL +********************************************************************************************************* +*/ + +#define CANSIG_EN 1u /* Enable CAN Signal Database */ +#define CANSIG_N 3u /* Number of signals */ +#define CANSIG_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANSIG_MAX_WIDTH 4u /* Maximal signal width in byte */ +#define CANSIG_GRANULARITY CAN_CFG_BYTE /* Set signal resolution to byte */ +#define CANSIG_STATIC_CONFIG 1u /* To reduce memory usage, declare static signal table */ +#define CANSIG_USE_DELETE 0u /* To reduce memory usage don't use delete functions */ +#define CANSIG_CALLBACK_EN 0u /* Enable callback functions */ + + +/* +********************************************************************************************************* +* CAN FRAME +********************************************************************************************************* +*/ + +#define CANFRM_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN OS +********************************************************************************************************* +*/ + +#define CANOS_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CONFIGURATION END +********************************************************************************************************* +*/ + +#endif /* #ifndef _CAN_CFG_H_ */ diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/cpu_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/cpu_cfg.h new file mode 100644 index 0000000..b7b42d2 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/cpu_cfg.h @@ -0,0 +1,216 @@ +/* +********************************************************************************************************* +* uC/CPU +* CPU CONFIGURATION & PORT LAYER +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CPU is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CPU CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : cpu_cfg.h +* Version : V1.30.02 +* Programmer(s) : SR +* ITJ +* JBL +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef CPU_CFG_MODULE_PRESENT +#define CPU_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +* CPU NAME CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_NAME_EN to enable/disable CPU host name feature : +* +* (a) CPU host name storage +* (b) CPU host name API functions +* +* (2) Configure CPU_CFG_NAME_SIZE with the desired ASCII string size of the CPU host name, +* including the terminating NULL character. +* +* See also 'cpu_core.h GLOBAL VARIABLES Note #1'. +********************************************************************************************************* +*/ + + /* Configure CPU host name feature (see Note #1) : */ +#define CPU_CFG_NAME_EN DEF_DISABLED + /* DEF_DISABLED CPU host name DISABLED */ + /* DEF_ENABLED CPU host name ENABLED */ + + /* Configure CPU host name ASCII string size ... */ +#define CPU_CFG_NAME_SIZE 16 + + +/* +********************************************************************************************************* +* CPU TIMESTAMP CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_TS_xx_EN to enable/disable CPU timestamp features : +* +* (a) CPU_CFG_TS_32_EN enable/disable 32-bit CPU timestamp feature +* (b) CPU_CFG_TS_64_EN enable/disable 64-bit CPU timestamp feature +* +* (2) (a) Configure CPU_CFG_TS_TMR_SIZE with the CPU timestamp timer's word size : +* +* CPU_WORD_SIZE_08 8-bit word size +* CPU_WORD_SIZE_16 16-bit word size +* CPU_WORD_SIZE_32 32-bit word size +* CPU_WORD_SIZE_64 64-bit word size +* +* (b) If the size of the CPU timestamp timer is not a binary multiple of 8-bit octets +* (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple octet word +* size SHOULD be configured (e.g. to 16-bits). However, the minimum supported word +* size for CPU timestamp timers is 8-bits. +* +* See also 'cpu_core.h FUNCTION PROTOTYPES CPU_TS_TmrRd() Note #2a'. +********************************************************************************************************* +*/ + + /* Configure CPU timestamp features (see Note #1) : */ +#define CPU_CFG_TS_32_EN DEF_ENABLED +#define CPU_CFG_TS_64_EN DEF_ENABLED + /* DEF_DISABLED CPU timestamps DISABLED */ + /* DEF_ENABLED CPU timestamps ENABLED */ + + /* Configure CPU timestamp timer word size ... */ + /* ... (see Note #2) : */ +#define CPU_CFG_TS_TMR_SIZE CPU_WORD_SIZE_64 + + +/* +********************************************************************************************************* +* CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_INT_DIS_MEAS_EN to enable/disable measuring CPU's interrupts +* disabled time : +* +* (a) Enabled, if CPU_CFG_INT_DIS_MEAS_EN #define'd in 'cpu_cfg.h' +* +* (b) Disabled, if CPU_CFG_INT_DIS_MEAS_EN NOT #define'd in 'cpu_cfg.h' +* +* See also 'cpu_core.h FUNCTION PROTOTYPES Note #1'. +* +* (b) Configure CPU_CFG_INT_DIS_MEAS_OVRHD_NBR with the number of times to measure & +* average the interrupts disabled time measurements overhead. +* +* See also 'cpu_core.c CPU_IntDisMeasInit() Note #3a'. +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU interrupts disabled time ... */ +#define CPU_CFG_INT_DIS_MEAS_EN /* ... measurements feature (see Note #1a). */ +#endif + + /* Configure number of interrupts disabled overhead ... */ +#define CPU_CFG_INT_DIS_MEAS_OVRHD_NBR 1u /* ... time measurements (see Note #1b). */ + + +/* +********************************************************************************************************* +* CPU COUNT ZEROS CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT to define count leading zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +* +* (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU count leading zeros bits ... */ +#define CPU_CFG_LEAD_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1a). */ +#endif + +#if 0 /* Configure CPU count trailing zeros bits ... */ +#define CPU_CFG_TRAIL_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1b). */ +#endif + + +/* +********************************************************************************************************* +* CPU ENDIAN TYPE OVERRIDE +* +* Note(s) : (1) Configure CPU_CFG_ENDIAN_TYPE to override the default CPU endian type defined in cpu.h. +* +* (a) CPU_ENDIAN_TYPE_BIG Big- endian word order (CPU words' most significant +* octet @ lowest memory address) +* (b) CPU_ENDIAN_TYPE_LITTLE Little-endian word order (CPU words' least significant +* octet @ lowest memory address) +* +* (2) Defining CPU_CFG_ENDIAN_TYPE here is only valid for supported bi-endian architectures. +* See 'cpu.h CPU WORD CONFIGURATION Note #3' for details +********************************************************************************************************* +*/ + +#if 0 +#define CPU_CFG_ENDIAN_TYPE CPU_ENDIAN_TYPE_BIG /* Defines CPU data word-memory order (see Note #2). */ +#endif + + +/* +********************************************************************************************************* +* CACHE MANAGEMENT +* +* Note(s) : (1) Configure CPU_CFG_CACHE_MGMT_EN to enable the cache managment API. + +* +* (2) Defining CPU_CFG_CACHE_MGMT_EN to DEF_ENABLED only enable the cache management function. +* Cache are assumed to be configured and enabled by the time CPU_init() is called. +********************************************************************************************************* +*/ + +#define CPU_CFG_CACHE_MGMT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of CPU cfg module include. */ + +#define CPU_CACHE_CFG_L2C310_BASE_ADDR 0xF8F02000 diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/dhcp-c_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/dhcp-c_cfg.h new file mode 100644 index 0000000..911724f --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/dhcp-c_cfg.h @@ -0,0 +1,146 @@ +/* +********************************************************************************************************* +* uC/DHCPc +* Dynamic Host Configuration Protocol Client +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DHCP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DHCP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dhcp-c_cfg.h +* Version : V2.10.00 +* Programmer(s) : SR +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* TASKS PRIORITIES +* Notes: (1) Task priorities configuration values should be used by the DHCPc OS port. The following task priorities +* should be defined: +* +* DHCPc_OS_CFG_TASK_PRIO +* DHCPc_OS_CFG_TMR_TASK_PRIO +* +* Task priorities can be defined either in this configuration file 'dhcp-c_cfg.h' or in a global +* OS tasks priorities configuration header file which must be included in 'dhcp-c_cfg.h'. +********************************************************************************************************* +*/ + + /* See Note #1. */ +#define DHCPc_OS_CFG_TASK_PRIO 13 +#define DHCPc_OS_CFG_TMR_TASK_PRIO 14 + + +/* +********************************************************************************************************* +* STACK SIZES +* Size (depth) of the task stacks (See the definition of CPU_STK for stack width) +********************************************************************************************************* +*/ + +#define DHCPc_OS_CFG_TASK_STK_SIZE 512 +#define DHCPc_OS_CFG_TMR_TASK_STK_SIZE 256 + + +/* +********************************************************************************************************* +* DHCPc +* +* Note(s) : (1) Default port for DHCP server is 67, and default port for DHCP client is 68. +* +* (3) Configure DHCPc_CFG_MAX_NBR_IF to the maximum number of interface this DHCP client will +* be able to manage at a given time. +* +* (4) Once the DHCP server has assigned the client an address, the later may perform a final +* check prior to use this address in order to make sure it is not being used by another +* host on the network. +********************************************************************************************************* +*/ + +#define DHCPc_CFG_IP_PORT_SERVER 67 +#define DHCPc_CFG_IP_PORT_CLIENT 68 + +#define DHCPc_CFG_MAX_RX_TIMEOUT_MS 1000 + +#define DHCPc_CFG_PARAM_REQ_TBL_SIZE 5 + +#define DHCPc_CFG_MAX_NBR_IF 1 + +#define DHCPc_CFG_ADDR_VALIDATE_EN DEF_ENABLED + /* ... (see Note #4) : */ + /* DEF_DISABLED Validation NOT performed */ + /* DEF_ENABLED Validation performed */ + +#define DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN DEF_ENABLED + /* DEF_DISABLED local-link configuration DISABLED */ + /* DEF_ENABLED local-link configuration ENABLED */ + +#define DHCPc_CFG_LOCAL_LINK_MAX_RETRY 3 + /* link-local address. */ + + +/* +********************************************************************************************************* +* DHCPc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DHCPc_CFG_ARG_CHK_EXT_EN to enable/disable the DHCP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure DHCPc_CFG_ARG_CHK_DBG_EN to enable/disable the DHCP client internal debug +* argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the DHCP client. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the DHCP client. +* +* (3) Configure DHCPc_DBG_CFG_MEM_CLR_EN to enable/disable the DHCP client from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define DHCPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define DHCPc_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure memory clear feature (see Note #3) : */ +#define DHCPc_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/dns-c_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/dns-c_cfg.h new file mode 100644 index 0000000..2756762 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/dns-c_cfg.h @@ -0,0 +1,111 @@ +/* +********************************************************************************************************* +* uC/DNSc +* Domain Name Server (client) +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DNSc is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DNS CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dns-c_cfg.h +* Version : V2.00.01 +* Programmer(s) : AA +********************************************************************************************************* +*/ + +#ifndef DNSc_CFG_MODULE_PRESENT +#define DNSc_CFG_MODULE_PRESENT + +#include + + +/* +********************************************************************************************************* +* DNSc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_ARG_CHK_EXT_EN to enable/disable the DNS client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* See Note 1. */ +#define DNSc_CFG_ARG_CHK_EXT_EN DEF_DISABLED + /* DEF_DISABLED External argument check DISABLED */ + /* DEF_ENABLED External argument check ENABLED */ + +/* +********************************************************************************************************* +* DNSc FEATURES CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_MODE_ASYNC_EN to enable/disable the DNS client asynchronous communication mode: +* +* (a) When ENABLED, A dedicated task will handle all host resolution request. It will be possible to +* call DNS API to get remote host address without blocking. +* +* (b) When DISABLED, The API to get remote host will always block until the resolution is completed. +* +* (2) Configure DNSc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the asynchronous +* communication is enabled. +* +* (a) When ENABLED, It will be possible to block when calling the DNS API to get remote host until the +* resolution is completed (via a flag option). +* +* (b) When DISABLED, The API to get remote host will always be non-blocking, must poll DNS client to +* know when the resolution is completed. +********************************************************************************************************* +*/ + + /* Configure asynchronous mode feature, See Note #1 ... */ +#define DNSc_CFG_MODE_ASYNC_EN DEF_DISABLED + /* DEF_DISABLED Asynchronous mode DISABLED */ + /* DEF_ENABLED Asynchronous mode ENABLED */ + + + /* Configure blocking option feature, See Note #2 ... */ +#define DNSc_CFG_MODE_BLOCK_EN DEF_DISABLED + /* DEF_DISABLED Blocking option DISABLED */ + /* DEF_ENABLED Blocking option ENABLED */ + +/* +********************************************************************************************************* +* DNSc RUN-TIME STRUCTURE CONFIGURATION +* +* Note(s) : (1) These structures should be defined into a 'C' file. +********************************************************************************************************* +*/ + +extern const DNSc_CFG DNSc_Cfg; /* Must always be defined. */ + +#if (DNSc_CFG_MODE_ASYNC_EN == DEF_ENABLED) +extern const DNSc_CFG_TASK DNSc_CfgTask; /* Not required when Asynchronous mode is disabled. */ +#endif + +#endif diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/gt_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/gt_cfg.h new file mode 100644 index 0000000..fb93481 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/gt_cfg.h @@ -0,0 +1,23 @@ +/* + * gt_cfg.h + * + * Created on: Aug 19, 2014 + * Author: matthiasb + */ + +#ifndef GT_CFG_H_ +#define GT_CFG_H_ + +#define GT_USE_NP_REGIONS 1 +#define GT_USE_NP_MEAS 1 +#define GT_NUM_OF_TASKS 3 +#define GT_REPORT_CONSOLE 0 +#define GT_REPORT_SVC 0 + +#define GT_TTC_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define GT_TTC_PWM_INTR_ID XPAR_XTTCPS_2_INTR +#define GT_TIMER_TICKS_PER_SEC 10000 + +#include "gt_core_cfg.h" + +#endif /* GT_CFG_H_ */ diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/gt_core_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/gt_core_cfg.h new file mode 100644 index 0000000..3d1a566 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/gt_core_cfg.h @@ -0,0 +1,24 @@ +/* + * gt_core_cfg.h + * + * Created on: Aug 19, 2014 + * Author: matthiasb + */ + +#ifndef GT_CORE_CFG_H_ +#define GT_CORE_CFG_H_ + +#define GT_USE_CPU_ARM9 0 +#define GT_USE_CPU_CM3 0 +#define GT_USE_CPU_CM7 0 +#define GT_USE_CPU_ARM_V7_A 1 + +#define GT_STACKSIZE 256 +#define GT_MAXTASKS 10 +#define GT_MAXQACT 5 + +#if ( GT_NUM_OF_TASKS > GT_MAXTASKS ) +#error "Too many tasks, increase GT_MAXTASKS or decrease GT_NUM_OF_TASKS" +#endif + +#endif /* GT_CORE_CFG_H_ */ diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/http-c_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/http-c_cfg.h new file mode 100644 index 0000000..26df728 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/http-c_cfg.h @@ -0,0 +1,224 @@ +/* +********************************************************************************************************* +* uC/HTTP +* Hypertext Transfer Protocol +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/HTTP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* HTTP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : http-c_cfg.h +* Version : V3.00.01 +* Programmer(s) : MM +* AL +********************************************************************************************************* +* Note(s) : (1) Assumes the following versions (or more recent) of software modules are included in +* the project build : +* +* (a) uC/CPU V1.29.02 +* (b) uC/LIB V1.38.00 +* (c) uC/Common V1.00.00 +* (d) uC/TCP-IP V3.03.00 +* +* +* (2) For additional details on the features available with uC/HTTPc, the API, the +* installation, etc. Please refer to the uC/HTTPc documentation available at +* https://doc.micrium.com/HTTPc. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef HTTPc_CFG_MODULE_PRESENT +#define HTTPc_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* COMPILE-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* HTTP ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_ARG_CHK_EXT_EN to enable/disable the HTTP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT TASK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_MODE_ASYNC_TASK_EN to enable/disable HTTP client task. +* (a) DEF_DISABLED : No HTTP client task will be created to process the HTTP requests. +* The Blocking HTTPc API will be enabled. +* +* (b) DEF_ENABLED : An HTTP client task will be created to process all the HTTP requests. +* The Non-Blocking HTTPc API will be enabled. Therefore, multiple +* connections can be handle by the task simultaneously. +* +* (2) Configure HTTPc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the +* asynchronous HTTPc Task is enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_MODE_ASYNC_TASK_EN DEF_DISABLED + +#define HTTPc_CFG_MODE_BLOCK_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT PERSISTENT CONNECTION CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_PERSISTENT_EN to enable/disable Persistent Connection support. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_PERSISTENT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT CHUNKED TRANSFER CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_CHUNK_TX_EN to enable/disable Chunked Transfer support in Transmission. +* +* (2) Chunked Transfer in Reception is always enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_CHUNK_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT QUERY STRING CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_QUERY_STR_EN to enable/disable Query String support in URL. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_QUERY_STR_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT HEADER FIELD CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_HDR_RX_EN to enable/disable header field processing in reception +* (i.e for headers received in the HTTP response. +* +* (2) Configure HTTPc_CFG_HDR_TX_EN to enable/disable header field processing in transmission +* (i.e for headers to include in the HTTP request. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_HDR_RX_EN DEF_ENABLED + + +#define HTTPc_CFG_HDR_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT FORM CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_FORM_EN to enable/disable HTTP form creation source code. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_FORM_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT USER DATA CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_USER_DATA_EN to enable/disable user data pointer in HTTPc_CONN +* and HTTPc_REQ structure. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_USER_DATA_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT WEBSOCKET CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_WEBSOCKET_EN to enable/disable the Websocket feature. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_WEBSOCKET_EN DEF_DISABLED + + +/* +********************************************************************************************************* +********************************************************************************************************* +* RUN-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const HTTP_TASK_CFG HTTPc_TaskCfg; +extern const HTTPc_CFG HTTPc_Cfg; + + +/* =============================================== END =============================================== */ +#endif /* HTTPc_CFG_MODULE_PRESENT */ diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/imu.h b/src/APP/Aufgabe4/ps7/core0/cfg/imu.h new file mode 100644 index 0000000..ef0259e --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/imu.h @@ -0,0 +1,35 @@ +/* + * imu.h + * + * Created on: Nov 6, 2018 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ + +#include +#include "xiicps.h" +#include "xparameters.h" + + + + +#define MPU9250_AD 0x68 //Adresse d. I²C slaves festlegen + + +#define IIC_DEVICE_ID XPAR_XIICPS_1_DEVICE_ID +#define IIC_SCLK_RATE 4000000 + +uint8_t mpu9250_Iic_Init(); +void mpu9250_Init(void); +uint8_t mpu9250_Write_Reg(); +int8_t mpu9250_Read_Data(); +uint8_t mpu9250_Read_Status(); +void mpu9250_Get_Data_Task(); + + + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ */ + + diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/intr_timer.h b/src/APP/Aufgabe4/ps7/core0/cfg/intr_timer.h new file mode 100644 index 0000000..b7a4302 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/intr_timer.h @@ -0,0 +1,58 @@ +/* + * intr_timer.h + * + * Created on: Nov 13, 2018 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE3_PS7_CORE0_CFG_INTR_TIMER_H_ +/************************** Constant Definitions *****************************/ + +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are only defined here such that a user can easily + * change all the needed parameters in one place. + */ +#define TTC_TICK_DEVICE_ID XPAR_XTTCPS_1_DEVICE_ID +#define TTC_TICK_INTR_ID XPAR_XTTCPS_1_INTR + +#define TTC_PWM_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID +#define TTC_PWM_INTR_ID XPAR_XTTCPS_0_INTR +#define TTCPS_CLOCK_HZ XPAR_XTTCPS_0_CLOCK_HZ + +#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID + +/* + * Constants to set the basic operating parameters. + * PWM_DELTA_DUTY is critical to the running time of the test. Smaller values + * make the test run longer. + */ +#define TICK_TIMER_FREQ_HZ 100 /* Tick timer counter's output frequency */ +#define PWM_OUT_FREQ 350 /* PWM timer counter's output frequency */ + +#define PWM_DELTA_DUTY 50 /* Initial and increment to duty cycle for PWM */ +#define TICKS_PER_CHANGE_PERIOD TICK_TIMER_FREQ_HZ * 5 /* Tick signals PWM */ + + + +/************************** Function Prototypes ******************************/ + +static int TmrInterruptExample(void); /* Main test */ + +/* Set up routines for timer counters */ +static int SetupTicker(void); +static int SetupPWM(void); +static int SetupTimer(int DeviceID); + +/* Interleaved interrupt test for both timer counters */ +static int WaitForDutyCycleFull(void); + +static int SetupInterruptSystem(u16 IntcDeviceID, XScuGic *IntcInstancePtr); + +static void TickHandler(void *CallBackRef); +static void PWMHandler(void *CallBackRef); + + + + +#endif /* SRC_APP_AUFGABE3_PS7_CORE0_CFG_INTR_TIMER_H_ */ diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/lib_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/lib_cfg.h new file mode 100644 index 0000000..cf447ea --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/lib_cfg.h @@ -0,0 +1,171 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find information about uC/LIB by visiting doc.micrium.com. +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CUSTOM LIBRARY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : lib_cfg.h +* Version : V1.38.01.00 +* Programmer(s) : FBJ +* JFD +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef LIB_CFG_MODULE_PRESENT +#define LIB_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MEMORY LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* MEMORY LIBRARY ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_ARG_CHK_EXT_EN to enable/disable the memory library suite external +* argument check feature : +* +* (a) When ENABLED, arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +********************************************************************************************************* +*/ + + /* External argument check. */ + /* Indicates if arguments received from any port ... */ + /* ... interface provided by the developer or ... */ + /* ... application are checked/validated. */ +#define LIB_MEM_CFG_ARG_CHK_EXT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY LIBRARY ASSEMBLY OPTIMIZATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_OPTIMIZE_ASM_EN to enable/disable assembly-optimized memory function(s). +********************************************************************************************************* +*/ + + /* Assembly-optimized function(s). */ + /* Enable/disable assembly-optimized memory ... */ + /* ... function(s). [see Note #1] */ +#define LIB_MEM_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY ALLOCATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_DBG_INFO_EN to enable/disable memory allocation usage tracking +* that associates a name with each segment or dynamic pool allocated. +* +* (2) (a) Configure LIB_MEM_CFG_HEAP_SIZE with the desired size of heap memory (in octets). +* +* (b) Configure LIB_MEM_CFG_HEAP_BASE_ADDR to specify a base address for heap memory : +* +* (1) Heap initialized to specified application memory, if LIB_MEM_CFG_HEAP_BASE_ADDR +* #define'd in 'lib_cfg.h'; +* CANNOT #define to address 0x0 +* +* (2) Heap declared to Mem_Heap[] in 'lib_mem.c', if LIB_MEM_CFG_HEAP_BASE_ADDR +* NOT #define'd in 'lib_cfg.h' +********************************************************************************************************* +*/ + + /* Allocation debugging information. */ + /* Enable/disable allocation of debug information ... */ + /* ... associated to each memory allocation. */ +#define LIB_MEM_CFG_DBG_INFO_EN DEF_DISABLED + + + /* Heap memory size (in bytes). */ + /* Configure the desired size of the heap memory. ... */ + /* ... Set to 0 to disable heap allocation features. */ +#define LIB_MEM_CFG_HEAP_SIZE 64*1024 + + + /* Heap memory padding alignment (in bytes). */ + /* Configure the desired size of padding alignment ... */ + /* ... of each buffer allocated from the heap. */ +#define LIB_MEM_CFG_HEAP_PADDING_ALIGN LIB_MEM_PADDING_ALIGN_NONE + +#if 0 /* Remove this to have heap alloc at specified addr. */ +#define LIB_MEM_CFG_HEAP_BASE_ADDR 0 +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* STRING LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* STRING FLOATING POINT CONFIGURATION +* +* Note(s) : (1) Configure LIB_STR_CFG_FP_EN to enable/disable floating point string function(s). +* +* (2) Configure LIB_STR_CFG_FP_MAX_NBR_DIG_SIG to configure the maximum number of significant +* digits to calculate &/or display for floating point string function(s). +* +* See also 'lib_str.h STRING FLOATING POINT DEFINES Note #1'. +********************************************************************************************************* +*/ + + /* Floating point feature(s). */ + /* Enable/disable floating point to string functions. */ +#define LIB_STR_CFG_FP_EN DEF_DISABLED + + + /* Floating point number of significant digits. */ + /* Configure the maximum number of significant ... */ + /* ... digits to calculate &/or display for ... */ + /* ... floating point string function(s). */ +#define LIB_STR_CFG_FP_MAX_NBR_DIG_SIG LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of lib cfg module include. */ + diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/mmu_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/mmu_cfg.h new file mode 100644 index 0000000..4dda478 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/mmu_cfg.h @@ -0,0 +1,42 @@ +/* + * mmu_cfg.h + * + * Created on: 25.04.2018 + * Author: kaige + */ + +#ifndef SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ +#define SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ + +#include "mmu.h" + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief FIRST LEVEL TRANSLATION TABLE (FTT) +* +* \ingroup PAR_CPU_MMU +* +* This variable represents the first level translation table. Each entry within +* the table represents the configuration of a 1MB memory segment. If a memory +* portion below 1MB must be accessed, the entry represents a pointer to the +* linked coarse page table, which contains the information of that 1MB in detail. +* +* \note This table MUST be aligned at 16kB boundary. +*/ +/*------------------------------------------------------------------------------------------------*/ + +const PAR_MEM_REGION_T PARMemTbl_Core[] = { +/* +-------------------------------------------------------------------------------------------+ +* | virtual | physical | size | owner | permissions | HID Field | +* +-----------+-----------+---------------+------------------+-----------------+--------------+*/ + // First 1MB is marked as non-cacheable/non-bufferable (contains 3x 64KB SRAM @ address 0x00000000 + { 0x00000000, 0x00000000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER_CB | PAR_HID_CACHE_OUTER_CB }, + // DDR Memory is marked as normal (only 512MB for now) + { 0x00100000, 0x00100000, MMU_SIZE_16MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER___ | PAR_HID_CACHE_OUTER___ }, + // Device section + { 0xE0000000, 0xE0000000, MMU_SIZE_512MB-MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_EXCLUSIVE_SYS_DEVICE }, + // Upper 1MB section contains 1x 64KB SRAM @ address 0xFFFF0000 + { 0xFFF00000, 0xFFF00000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_OUT_IN_NON_CACHABLE } +}; + +#endif /* SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ */ diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/net_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/net_cfg.h new file mode 100644 index 0000000..ee42e1f --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/net_cfg.h @@ -0,0 +1,676 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_cfg.h +* Version : V3.03.01 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_CFG_MODULE_PRESENT +#define NET_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK EXTERNAL APPLICATION CONFIGURATION +* +* Note(s) : (1) When uC/DNS-Client is present in the project some high level functions can resolve hostname. +* So uC/TCPIP should know that uC/DNS-Client is present to call the proper API. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure DNS Client feature (see Note #1) : */ +#define NET_EXT_MODULE_CFG_DNS_EN DEF_ENABLED + /* DEF_DISABLED DNS Client is DISABLED */ + /* DEF_ENABLED DNS Client is ENABLED */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS CONFIGURATION +* +* Note(s) : (1) (a) Each network task maps to a unique, developer-configured task configuration that +* MUST be defined in application files, typically 'net_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to Net_Init(). +* +* (b) Since these task configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const NET_TASK_CFG NetRxTaskCfg; +extern const NET_TASK_CFG NetTxDeallocTaskCfg; +extern const NET_TASK_CFG NetTmrTaskCfg; + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS Q CONFIGURATION +* +* Note(s) : (1) Rx queue size should be configured such that it reflects the total number of DMA receive descriptors on all +* devices. If DMA is not available, or a combination of DMA and I/O based interfaces are configured then this +* number reflects the maximum number of packets that can be acknowledged and signalled during a single receive +* interrupt event for all interfaces. +* +* (2) Tx queue size should be defined to be the total number of small and large transmit buffers declared for +* all interfaces. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_CFG_IF_RX_Q_SIZE 100 +#define NET_CFG_IF_TX_DEALLOC_Q_SIZE 100 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK CONFIGURATION +* +* Note(s) : (1) uC/TCP-IP code may call optimized assembly functions. Optimized assembly files/functions must be included +* in the project to be enabled. Optimized functions are located in files under folders: +* +* $uC-TCPIP/Ports// +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network protocol suite's assembly ... */ + /* ... optimization (see Note #1) : */ +#define NET_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + /* DEF_DISABLED Assembly optimization DISABLED */ + /* DEF_ENABLED Assembly optimization ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEBUG CONFIGURATION +* +* Note(s) : (1) Configure NET_DBG_CFG_MEM_CLR_EN to enable/disable the network protocol suite from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure memory clear feature (see Note #1) : */ +#define NET_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure NET_ERR_CFG_ARG_CHK_EXT_EN to enable/disable the network protocol suite external +* argument check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure NET_ERR_CFG_ARG_CHK_DBG_EN to enable/disable the network protocol suite internal, +* debug argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the network protocol +* suite. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the network protocol +* suite. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define NET_ERR_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define NET_ERR_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK COUNTER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_CTR_CFG_STAT_EN to enable/disable network protocol suite statistics counters. +* +* (2) Configure NET_CTR_CFG_ERR_EN to enable/disable network protocol suite error counters. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure statistics counter feature (see Note #1) : */ +#define NET_CTR_CFG_STAT_EN DEF_DISABLED + /* DEF_DISABLED Stat counters DISABLED */ + /* DEF_ENABLED Stat counters ENABLED */ + + /* Configure error counter feature (see Note #2) : */ +#define NET_CTR_CFG_ERR_EN DEF_DISABLED + /* DEF_DISABLED Error counters DISABLED */ + /* DEF_ENABLED Error counters ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK TIMER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_TMR_CFG_NBR_TMR with the desired number of network TIMER objects. +* +* Timers are required for : +* +* (a) ARP & NDP cache entries +* (b) IP fragment reassembly +* (c) TCP state machine connections +* (d) IF Link status check-up +* +* (2) Configure NET_TMR_CFG_TASK_FREQ to schedule the execution frequency of the network timer +* task -- how often NetTmr_TaskHandler() is scheduled to run per second as implemented in +* NetTmr_Task(). +* +* (a) NET_TMR_CFG_TASK_FREQ MUST NOT be configured as a floating-point frequency. +* +* See also 'net_tmr.h NETWORK TIMER TASK TIME DEFINES Notes #1 & #2' +* & 'net_tmr.c NetTmr_Task() Notes #1 & #2'. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_TMR_CFG_NBR_TMR 100 +#define NET_TMR_CFG_TASK_FREQ 10 + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK INTERFACE LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_IF_CFG_MAX_NBR_IF 1 + + /* Configure specific interface(s) : */ +#define NET_IF_CFG_LOOPBACK_EN DEF_DISABLED + +#define NET_IF_CFG_ETHER_EN DEF_ENABLED + +#define NET_IF_CFG_WIFI_EN DEF_DISABLED + /* DEF_DISABLED Interface type DISABLED */ + /* DEF_ENABLED interface type ENABLED */ + +#define NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* ADDRESS RESOLUTION PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Address resolution protocol ONLY required for IPv4. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_ARP_CFG_CACHE_NBR 3 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NEIGHBOR DISCOVERY PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Neighbor Discovery Protocol ONLY required for IPv6. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_NDP_CFG_CACHE_NBR 5 +#define NET_NDP_CFG_DEST_NBR 5 +#define NET_NDP_CFG_PREFIX_NBR 5 +#define NET_NDP_CFG_ROUTER_NBR 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET PROTOCOL LAYER VERSION CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* IPv4 +********************************************************************************************************* +*/ + /* Configure IPv4. */ +#define NET_IPv4_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv4 disabled. */ + /* DEF_ENABLED IPv4 enabled. */ + + +#define NET_IPv4_CFG_IF_MAX_NBR_ADDR 1 + +/* +********************************************************************************************************* +* IPv6 +********************************************************************************************************* +*/ + + /* Configure IPv6. */ +#define NET_IPv6_CFG_EN DEF_DISABLED + /* DEF_DISABLED IPv6 disabled. */ + /* DEF_ENABLED IPv6 enabled. */ + + /* Configure IPv6 Stateless Address Auto-Configuration. */ +#define NET_IPv6_CFG_ADDR_AUTO_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv6 Auto-Cfg disabled. */ + /* DEF_ENABLED IPv6 Auto-Cfg enabled. */ + + /* Configure IPv6 Duplication Address Detection (DAD). */ +#define NET_IPv6_CFG_DAD_EN DEF_ENABLED + /* DEF_DISABLED IPv6 DAD disabled. */ + /* DEF_ENABLED IPv6 DAD enabled. */ + +#define NET_IPv6_CFG_IF_MAX_NBR_ADDR 2 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET GROUP MANAGEMENT PROTOCOL(MULTICAST) LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure IPv4 multicast support : */ +#define NET_MCAST_CFG_IPv4_RX_EN DEF_ENABLED +#define NET_MCAST_CFG_IPv4_TX_EN DEF_ENABLED + /* DEF_DISABLED Multicast rx or tx disabled. */ + /* DEF_ENABLED Multicast rx or tx enabled. */ + +#define NET_MCAST_CFG_HOST_GRP_NBR_MAX 2 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SOCKET LAYER CONFIGURATION +* +* Note(s) : (1) The maximum accept queue size represents the number of connection that can be queued by +* the stack before being accepted. For a TCP server when a connection is queued, it means +* that the SYN, ACK packet has been sent back, so the remote host can start transmitting +* data once the connection is queued and the stack will queue up all data received until +* the connection is accepted and the data is read. +* +* (2) Receive and transmit queue size MUST be properly configured to optimize performance. +* +* (a) It represents the number of bytes that can be queued by one socket. It's important +* that all socket are not able to queue more data than what the device can hold in its +* buffers. +* +* (b) The size should be also a multiple of the maximum segment size (MSS) to optimize +* performance. UDP MSS is 1470 and TCP MSS is 1460. +* +* (c) RX and TX queue size can be reduce at runtime using socket option API. +* +* (d) Window calculation example: +* +* Number of TCP connection : 2 +* Number of UDP connection : 0 +* Number of RX large buffer : 10 +* Number of TX Large buffer : 6 +* Number of TX small buffer : 2 +* Size of RX large buffer : 1518 +* Size of TX large buffer : 1518 +* Size of TX small buffer : 60 +* +* TCP MSS RX = 1460 +* TCP MSS TX large buffer = 1460 +* TCP MSS TX small buffer = 0 +* +* Maximum receive window = (10 * 1460) = 14600 bytes +* Maximum transmit window = (6 * 1460) + (2 * 0) = 8760 bytes +* +* RX window size per socket = (14600 / 2) = 7300 bytes +* TX window size per socket = (8760 / 2) = 4380 bytes +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_SOCK_CFG_SOCK_NBR_TCP 2 +#define NET_SOCK_CFG_SOCK_NBR_UDP 1 + + /* Configure socket select functionality : */ +#define NET_SOCK_CFG_SEL_EN DEF_ENABLED + /* DEF_DISABLED Socket select DISABLED */ + /* DEF_ENABLED Socket select ENABLED */ + + /* Configure stream-type sockets' accept queue */ +#define NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX 2 + + + /* Configure sockets' buffer sizes in number of octets */ + /* (see Note #2): */ +#define NET_SOCK_CFG_RX_Q_SIZE_OCTET 4096 +#define NET_SOCK_CFG_TX_Q_SIZE_OCTET 4096 + + +/* ================================== ADVANCED SOCKET CONFIGURATION: DEFAULT VALUES ================================== */ +/* By default sockets are set to block. Add the following define to set all sockets as non-blocking. Note that it's */ +/* possible to change socket's blocking mode at runtime using socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_NO_BLOCK_EN DEF_ENABLED */ +/* */ +/* By default random port start at 65000, redefine the following define to modify where random port start: */ +/* */ +/* #define NET_SOCK_DFLT_PORT_NBR_RANDOM_BASE 65000u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeouts. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_TIMEOUT_RX_Q_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS 10000u */ +/* ==================================================================================================================== */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TRANSMISSION CONTROL PROTOCOL LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure TCP support : */ +#define NET_TCP_CFG_EN DEF_ENABLED + /* DEF_DISABLED TCP layer DISABLED */ + /* DEF_ENABLED TCP layer ENABLED */ + +/* ========================================= ADVANCED TCP LAYER CONFIGURATION ========================================= */ +/* By default TCP RX and TX windows are set to equal the socket RX and TX queue sizes. Default values can be changed by */ +/* redefining the following defines. TCP windows must be properly configured to optimize performance (see note about */ +/* Socket TX and RX windows). Note that it's possible to decrease window size at run time using Socket option API. */ +/* */ +/* #define NET_TCP_DFLT_RX_WIN_SIZE_OCTET NET_SOCK_CFG_RX_Q_SIZE_OCTET */ +/* #define NET_TCP_DFLT_TX_WIN_SIZE_OCTET NET_SOCK_CFG_TX_Q_SIZE_OCTET */ +/* */ +/* As shown in the TCP state diagram (see RFC #793), before moving from 'TIME-WAIT' state to 'CLOSED' state a timeout */ +/* (2MSL) must expire. This means that the TCP connection cannot be made available for subsequent TCP connections until */ +/* this timeout. It can be a problem for embedded systems with low resources especially when many TCP connections are */ +/* made in a small period of time since it is possible to run out of free TCP connections quickly. Therefore this */ +/* timeout is set to 0 by default to avoid this kind of problem and the connection is made available as soon as the */ +/* 'TIME-WAIT' state is reached. However, it's possible to set the default MSL timeout to something else by redefining */ +/* the following define. Note that it is possible to change the MSL timeout for a specific TCP connection using Socket */ +/* option API. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC 0u */ +/* */ +/* To avoid leaving a connection in the FIN_WAIT_2 state forever when a connection moves from the 'FIN_WAIT_1' state to */ +/* the FIN_WAIT_2, the TCP connection's timer is set to 15 second, and when it expires the connection is dropped. Thus, */ +/* if the other host doesn't response to the close request, the connection will still be closed after the timeout. */ +/* This default timeout can be change by redefining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC 15u */ +/* */ +/* The number of TCP connections is configured following the number of TCP sockets and the accept queue size when the */ +/* MSL is set to 0 ms. However, since the default MSL can be modified, it might be needed to increase the number of TCP */ +/* connections to establish more connections when waiting for the MSL expiration. It is possible to add more TCP */ +/* connections by defining the following define. */ +/* */ +/* #define NET_TCP_CFG_NBR_CONN 0u */ +/* */ +/* By default an 'ACK' is generated within 500 ms of the arrival of the first unacknowledged packet, as specified in */ +/* RFC #2581, Section 4.2. However it's possible to modify this value by defining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS 500u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeout. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS 1000u */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS 1000u */ +/* ==================================================================================================================== */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* USER DATAGRAM PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Configure NET_UDP_CFG_APP_API_SEL with the desired configuration for demultiplexing +* UDP datagrams to application connections : +* +* NET_UDP_APP_API_SEL_SOCK Demultiplex UDP datagrams to BSD sockets ONLY. +* NET_UDP_APP_API_SEL_APP Demultiplex UDP datagrams to application-specific +* connections ONLY. +* NET_UDP_APP_API_SEL_SOCK_APP Demultiplex UDP datagrams to BSD sockets first; +* if NO socket connection found to demultiplex +* a UDP datagram, demultiplex to application- +* specific connection. +* +* See also 'net_udp.c NetUDP_RxPktDemuxDatagram() Note #1' +* & 'net_udp.c NetUDP_RxPktDemuxAppData() Note #1'. +* +* (2) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally ... discard +* ... [or allow] ... received ... UDP datagrams without checksums". +* +* (b) Configure NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN to enable/disable discarding of UDP +* datagrams received with NO computed check-sum : +* +* (1) When ENABLED, ALL UDP datagrams received without a check-sum are discarded. +* +* (2) When DISABLED, ALL UDP datagrams received without a check-sum are flagged so +* that application(s) may handle &/or discard. +* +* See also 'net_udp.c NetUDP_RxPktValidate() Note #4d3A'. +* +* (3) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally be able to +* control whether a UDP checksum will be generated". +* +* (b) Configure NET_UDP_CFG_TX_CHK_SUM_EN to enable/disable transmitting UDP datagrams +* with check-sums : +* +* (1) When ENABLED, ALL UDP datagrams are transmitted with a computed check-sum. +* +* (2) When DISABLED, ALL UDP datagrams are transmitted without a computed check-sum. +* +* See also 'net_udp.c NetUDP_TxPktPrepareHdr() Note #3b'. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure UDP Receive Check-Sum Discard feature ... */ + /* ... (see Note #2b) : */ +#define NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN DEF_DISABLED + /* DEF_DISABLED UDP Check-Sums Received without ... */ + /* Check-Sums Validated */ + /* DEF_ENABLED UDP Datagrams Received without ... */ + /* Check-Sums Discarded */ + + /* Configure UDP Transmit Check-Sum feature ... */ + /* ... (see Note #3b) : */ +#define NET_UDP_CFG_TX_CHK_SUM_EN DEF_DISABLED + /* DEF_DISABLED Transmit Check-Sums DISABLED */ + /* DEF_ENABLED Transmit Check-Sums ENABLED */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SECURITY MANAGER CONFIGURATION +* +* Note(s): (1) The network security layer can be enabled ONLY if the application project contains a secure module +* supported by uC/TCPIP such as: +* +* (a) NanoSSL provided by Mocana. +* (b) CyaSSL provided by YaSSL. +* +* (2) The network security port must be also added to the project. Security port can be found under the folder: +* +* $uC-TCPIP/Secure/ +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network security layer (See Note #1 & #2): */ +#define NET_SECURE_CFG_EN DEF_DISABLED + /* DEF_DISABLED Security layer DISABLED */ + /* DEF_ENABLED Security layer ENABLED */ + +#define NET_SECURE_CFG_MAX_NBR_SOCK_SERVER 2u /* Configure total number of server secure sockets. */ +#define NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT 2u /* Configure total number of client secure sockets. */ + +#define NET_SECURE_CFG_MAX_CERT_LEN 1500u /* Configure servers certificate maximum length (bytes) */ +#define NET_SECURE_CFG_MAX_KEY_LEN 1500u /* Configure servers key maximum length (bytes) */ + + /* Configure maximum number of certificate authorities */ +#define NET_SECURE_CFG_MAX_NBR_CA 1u /* that can be installed. */ + +#define NET_SECURE_CFG_MAX_CA_CERT_LEN 1500u /* Configure CA certificate maximum length (bytes) */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERFACE CHECKSUM OFFLOAD CONFIGURATION +* +* Note(s): (1) These configuration can be enabled only if all your interfaces support specific checksum offload +* option. +* +* (2) By default a driver should enabled the all checksum offload option. +********************************************************************************************************* +********************************************************************************************************* +*/ +/* ========================================== ADVANCED OFFLOAD CONFIGURATION ========================================== */ +/* By default all checksum are validated by the stack however it is possible to enable or disable specific checksum */ +/* validate and calculation if the interface controller is able to achieve it. You can add the following define in this */ +/* file to change the default behavior. */ +/* */ +/* -------------------------------------------------- IPv4 CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* -------------------------------------------------- ICMP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- UDP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- TCP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* ==================================================================================================================== */ + + +/* ======================================================= END ======================================================== */ +#endif /* NET_CFG_MODULE_PRESENT */ + +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h new file mode 100644 index 0000000..b4886a6 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h @@ -0,0 +1,115 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK DEVICE CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_dev_cfg.h +* Version : V3.00.00 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +* +* Note(s) : (1) This network device configuration header file is protected from multiple pre-processor +* inclusion through use of the network module present pre-processor macro definition. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_DEV_CFG_MODULE_PRESENT /* See Note #1. */ +#define NET_DEV_CFG_MODULE_PRESENT + +#include + +#ifdef NET_IF_ETHER_MODULE_EN +#include +#endif + +#ifdef NET_IF_WIFI_MODULE_EN +#include +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEVICE CONFIGURATION +* +* Note(s) : (1) (a) Each network device maps to a unique, developer-configured device configuration that +* MUST be defined in application files, typically 'net_dev_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to NetIF_Add(). +* +* (b) Since these device configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. However, +* the following naming convention is suggested for all developer-configured network +* device configuration structures : +* +* NetDev_Cfg_[_Number] +* +* where +* Name of device or device driver +* [Number] Network device number for each specific instance of +* device (optional if the development board does NOT +* support multiple instances of the specific device) +* +* Examples : +* +* NET_DEV_CFG_ETHER NetDev_Cfg_MACB; Ethernet configuration for MACB +* +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_0; Ethernet configuration for FEC #0 +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_1; Ethernet configuration for FEC #1 +* +* NET_DEV_CFG_WIFI NetDev_Cfg_RS9110N21_0; Wireless configuration for RS9110-N-21 +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifdef NET_IF_ETHER_MODULE_EN + +extern NET_DEV_CFG_ETHER NetDev_AXIEthernetLite_0; +extern NET_PHY_CFG_ETHER NetPhy_Cfg_Ether_0; + +#endif /* NET_IF_ETHER_MODULE_EN */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +********************************************************************************************************* +*/ + +#endif /* NET_DEV_CFG_MODULE_PRESENT */ + diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/os_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/os_cfg.h new file mode 100644 index 0000000..7fdd193 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/os_cfg.h @@ -0,0 +1,145 @@ +/* +********************************************************************************************************* +* uC/OS-II +* The Real-Time Kernel +* uC/OS-II Configuration File for V2.9x +* +* (c) Copyright 2005-2014, Micrium, Weston, FL +* All Rights Reserved +* +* +* File : OS_CFG.H +* By : Jean J. Labrosse +* Version : V2.92.11 +* +* LICENSING TERMS: +* --------------- +* uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research. +* If you plan on using uC/OS-II in a commercial product you need to contact Micrium to properly license +* its use in your product. We provide ALL the source code for your convenience and to help you experience +* uC/OS-II. The fact that the source is provided does NOT mean that you can use it without paying a +* licensing fee. +********************************************************************************************************* +*/ + +#ifndef OS_CFG_H +#define OS_CFG_H + + + /* ---------------------- MISCELLANEOUS ----------------------- */ +#define OS_APP_HOOKS_EN 1u /* Application-defined hooks are called from the uC/OS-II hooks */ +#define OS_ARG_CHK_EN 0u /* Enable (1) or Disable (0) argument checking */ +#define OS_CPU_HOOKS_EN 1u /* uC/OS-II hooks are found in the processor port files */ + +#define OS_DEBUG_EN 1u /* Enable(1) debug variables */ + +#define OS_EVENT_MULTI_EN 1u /* Include code for OSEventPendMulti() */ +#define OS_EVENT_NAME_EN 1u /* Enable names for Sem, Mutex, Mbox and Q */ + +#define OS_LOWEST_PRIO 63u /* Defines the lowest priority that can be assigned ... */ + /* ... MUST NEVER be higher than 254! */ + +#define OS_MAX_EVENTS 20u /* Max. number of event control blocks in your application */ +#define OS_MAX_FLAGS 5u /* Max. number of Event Flag Groups in your application */ +#define OS_MAX_MEM_PART 5u /* Max. number of memory partitions */ +#define OS_MAX_QS 6u /* Max. number of queue control blocks in your application */ +#define OS_MAX_TASKS 20u /* Max. number of tasks in your application, MUST be >= 2 */ + +#define OS_SCHED_LOCK_EN 1u /* Include code for OSSchedLock() and OSSchedUnlock() */ + +#define OS_TICK_STEP_EN 1u /* Enable tick stepping feature for uC/OS-View */ +#define OS_TICKS_PER_SEC 1000u /* Set the number of ticks in one second */ + +#define OS_TLS_TBL_SIZE 0u /* Size of Thread-Local Storage Table */ + + + /* --------------------- TASK STACK SIZE ---------------------- */ +#define OS_TASK_TMR_STK_SIZE 128u /* Timer task stack size (# of OS_STK wide entries) */ +#define OS_TASK_STAT_STK_SIZE 128u /* Statistics task stack size (# of OS_STK wide entries) */ +#define OS_TASK_IDLE_STK_SIZE 128u /* Idle task stack size (# of OS_STK wide entries) */ + + + /* --------------------- TASK MANAGEMENT ---------------------- */ +#define OS_TASK_CHANGE_PRIO_EN 1u /* Include code for OSTaskChangePrio() */ +#define OS_TASK_CREATE_EN 1u /* Include code for OSTaskCreate() */ +#define OS_TASK_CREATE_EXT_EN 1u /* Include code for OSTaskCreateExt() */ +#define OS_TASK_DEL_EN 1u /* Include code for OSTaskDel() */ +#define OS_TASK_NAME_EN 1u /* Enable task names */ +#define OS_TASK_PROFILE_EN 1u /* Include variables in OS_TCB for profiling */ +#define OS_TASK_QUERY_EN 1u /* Include code for OSTaskQuery() */ +#define OS_TASK_REG_TBL_SIZE 1u /* Size of task variables array (#of INT32U entries) */ +#define OS_TASK_STAT_EN 1u /* Enable (1) or Disable(0) the statistics task */ +#define OS_TASK_STAT_STK_CHK_EN 1u /* Check task stacks from statistic task */ +#define OS_TASK_SUSPEND_EN 1u /* Include code for OSTaskSuspend() and OSTaskResume() */ +#define OS_TASK_SW_HOOK_EN 1u /* Include code for OSTaskSwHook() */ + + + /* ----------------------- EVENT FLAGS ------------------------ */ +#define OS_FLAG_EN 1u /* Enable (1) or Disable (0) code generation for EVENT FLAGS */ +#define OS_FLAG_ACCEPT_EN 1u /* Include code for OSFlagAccept() */ +#define OS_FLAG_DEL_EN 1u /* Include code for OSFlagDel() */ +#define OS_FLAG_NAME_EN 1u /* Enable names for event flag group */ +#define OS_FLAG_QUERY_EN 1u /* Include code for OSFlagQuery() */ +#define OS_FLAG_WAIT_CLR_EN 1u /* Include code for Wait on Clear EVENT FLAGS */ +#define OS_FLAGS_NBITS 16u /* Size in #bits of OS_FLAGS data type (8, 16 or 32) */ + + + /* -------------------- MESSAGE MAILBOXES --------------------- */ +#define OS_MBOX_EN 1u /* Enable (1) or Disable (0) code generation for MAILBOXES */ +#define OS_MBOX_ACCEPT_EN 1u /* Include code for OSMboxAccept() */ +#define OS_MBOX_DEL_EN 1u /* Include code for OSMboxDel() */ +#define OS_MBOX_PEND_ABORT_EN 1u /* Include code for OSMboxPendAbort() */ +#define OS_MBOX_POST_EN 1u /* Include code for OSMboxPost() */ +#define OS_MBOX_POST_OPT_EN 1u /* Include code for OSMboxPostOpt() */ +#define OS_MBOX_QUERY_EN 1u /* Include code for OSMboxQuery() */ + + + /* --------------------- MEMORY MANAGEMENT -------------------- */ +#define OS_MEM_EN 1u /* Enable (1) or Disable (0) code generation for MEMORY MANAGER */ +#define OS_MEM_NAME_EN 1u /* Enable memory partition names */ +#define OS_MEM_QUERY_EN 1u /* Include code for OSMemQuery() */ + + + /* ---------------- MUTUAL EXCLUSION SEMAPHORES --------------- */ +#define OS_MUTEX_EN 1u /* Enable (1) or Disable (0) code generation for MUTEX */ +#define OS_MUTEX_ACCEPT_EN 1u /* Include code for OSMutexAccept() */ +#define OS_MUTEX_DEL_EN 1u /* Include code for OSMutexDel() */ +#define OS_MUTEX_QUERY_EN 1u /* Include code for OSMutexQuery() */ + + + /* ---------------------- MESSAGE QUEUES ---------------------- */ +#define OS_Q_EN 1u /* Enable (1) or Disable (0) code generation for QUEUES */ +#define OS_Q_ACCEPT_EN 1u /* Include code for OSQAccept() */ +#define OS_Q_DEL_EN 1u /* Include code for OSQDel() */ +#define OS_Q_FLUSH_EN 1u /* Include code for OSQFlush() */ +#define OS_Q_PEND_ABORT_EN 1u /* Include code for OSQPendAbort() */ +#define OS_Q_POST_EN 1u /* Include code for OSQPost() */ +#define OS_Q_POST_FRONT_EN 1u /* Include code for OSQPostFront() */ +#define OS_Q_POST_OPT_EN 1u /* Include code for OSQPostOpt() */ +#define OS_Q_QUERY_EN 1u /* Include code for OSQQuery() */ + + + /* ------------------------ SEMAPHORES ------------------------ */ +#define OS_SEM_EN 1u /* Enable (1) or Disable (0) code generation for SEMAPHORES */ +#define OS_SEM_ACCEPT_EN 1u /* Include code for OSSemAccept() */ +#define OS_SEM_DEL_EN 1u /* Include code for OSSemDel() */ +#define OS_SEM_PEND_ABORT_EN 1u /* Include code for OSSemPendAbort() */ +#define OS_SEM_QUERY_EN 1u /* Include code for OSSemQuery() */ +#define OS_SEM_SET_EN 1u /* Include code for OSSemSet() */ + + + /* --------------------- TIME MANAGEMENT ---------------------- */ +#define OS_TIME_DLY_HMSM_EN 1u /* Include code for OSTimeDlyHMSM() */ +#define OS_TIME_DLY_RESUME_EN 1u /* Include code for OSTimeDlyResume() */ +#define OS_TIME_GET_SET_EN 1u /* Include code for OSTimeGet() and OSTimeSet() */ +#define OS_TIME_TICK_HOOK_EN 1u /* Include code for OSTimeTickHook() */ + + + /* --------------------- TIMER MANAGEMENT --------------------- */ +#define OS_TMR_EN 0u /* Enable (1) or Disable (0) code generation for TIMERS */ +#define OS_TMR_CFG_MAX 16u /* Maximum number of timers */ +#define OS_TMR_CFG_NAME_EN 1u /* Determine timer names */ +#define OS_TMR_CFG_WHEEL_SIZE 7u /* Size of timer wheel (#Spokes) */ +#define OS_TMR_CFG_TICKS_PER_SEC 10u /* Rate at which timer management task runs (Hz) */ + +#endif diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/pid.h b/src/APP/Aufgabe4/ps7/core0/cfg/pid.h new file mode 100644 index 0000000..5297ca6 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/pid.h @@ -0,0 +1,18 @@ +/* + * pid.h + * + * Created on: Jan 28, 2019 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ + +unsigned int pid_Init(void *pdata); +int16_t pid_Constrain(int16_t value, int16_t lowerBorder, int16_t higherBorder); +unsigned int pid_Task(void *pdata); +int16_t map(int16_t x, int16_t in_min, int16_t in_max, int16_t out_min, int16_t out_max); + + + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ */ diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/shell_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/shell_cfg.h new file mode 100644 index 0000000..c06add8 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/shell_cfg.h @@ -0,0 +1,96 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell Utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/Shell is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* SHELL UTILITY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : shell_cfg.h +* Version : V1.03.01 +* Programmer(s) : SR +* FBJ +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef SHELL_CFG_H +#define SHELL_CFG_H + + +/* +********************************************************************************************************* +* SHELL +* +* Note(s) : (1) Defines the size of the table used to hold the various modules' command tables. Command +* tables are added using the Shell_CmdTblAdd() function. Once the table is full, it is not +* possible to add any more unless Shell_CmdTblRem() is first called. +* +* (2) Defines the maximum number or argument(s) a command may pass on the string holding the +* complete command. The minimum value is 1. +* +* (3) Defines the maximum length for module command name, including the NULL character. +********************************************************************************************************* +*/ + +#define SHELL_CFG_CMD_TBL_SIZE 3 /* Cfg Shell cmd tbl size (see Note #1). */ +#define SHELL_CFG_CMD_ARG_NBR_MAX 5 /* Cfg cmd max nbr of arg (see Note #2). */ + +#define SHELL_CFG_MODULE_CMD_NAME_LEN_MAX 6 /* Cfg module cmd name len (See Note #3). */ + + +/* +********************************************************************************************************* +* TRACING +********************************************************************************************************* +*/ + +#ifndef TRACE_LEVEL_OFF +#define TRACE_LEVEL_OFF 0u +#endif + +#ifndef TRACE_LEVEL_INFO +#define TRACE_LEVEL_INFO 1u +#endif + +#ifndef TRACE_LEVEL_DBG +#define TRACE_LEVEL_DBG 2u +#endif + +#define SHELL_TRACE_LEVEL TRACE_LEVEL_OFF +#define SHELL_TRACE printf + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif \ No newline at end of file diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/terminal_cfg.h b/src/APP/Aufgabe4/ps7/core0/cfg/terminal_cfg.h new file mode 100644 index 0000000..c6c5502 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/terminal_cfg.h @@ -0,0 +1,70 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* Knowledge of the source code may not be used to write a similar +* product. This file may only be used in accordance with a license +* and should not be redistributed in any way. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* TERMINAL +* +* CONFIGURATION TEMPLATE FILE +* +* Filename : terminal_cfg.h +* Version : V1.03.01 +* Programmer(s) : BAN +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* TASKS PRIORITIES +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_PRIO 16u + + +/* +********************************************************************************************************* +* STACK SIZES +* Size of the task stacks (# of OS_STK entries) +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_STK_SIZE 1024u + + +/* +********************************************************************************************************* +* TERMINAL +* +* Note(s) : (1) Defines the maximum length of a command entered on the terminal, in characters. +* +* (2) Defines the maximum path length of the Current Working Directory (CWD). +* +* (3) Enables/disables command history. +* +* (4) Defines the number of items to hold in the command history. +* +* (5) Defines the length of a item in the command history. If a command is entered into the +* terminal that exceeds this length, then only the first characters, up to this number of +* characters, will be copied into the command history. +********************************************************************************************************* +*/ + +#define TERMINAL_CFG_MAX_CMD_LEN 260u /* Cfg max cmd len (see Note #1). */ +#define TERMINAL_CFG_MAX_PATH_LEN 260u /* Cfg max path len (see Note #2). */ + +#define TERMINAL_CFG_HISTORY_EN DEF_ENABLED /* En/dis history (see Note #3). */ +#define TERMINAL_CFG_HISTORY_ITEMS_NBR 16u /* Cfg nbr history items (see Note #4). */ +#define TERMINAL_CFG_HISTORY_ITEM_LEN 64u /* Cfg history item len (see Note #5). */ diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/ttc_timer.h b/src/APP/Aufgabe4/ps7/core0/cfg/ttc_timer.h new file mode 100644 index 0000000..099a14a --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/ttc_timer.h @@ -0,0 +1,32 @@ +/* + * ttc_timer.h + * + * Created on: Nov 13, 2018 + * Author: laurenzb + */ + +#include + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_TTC_TIMER_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_TTC_TIMER_H_ + +//#define INTC_DEVICE_ID XPAR_SCUGIC_0_DEVICE_ID +//#define TTC_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID +//#define TICK_TIMER_FREQ_HZ 100 /* Tick timer counter's output frequency */ +//#define TTC_PWM_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID +// +// +//#define TTC_PWM_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID +//#define TTC_PWM_INTR_ID XPAR_XTTCPS_0_INTR +//#define TTCPS_CLOCK_HZ XPAR_XTTCPS_0_CLOCK_HZ +// +// +//#define TICK_TIMER_FREQ_HZ 100 /* Tick timer counter's output frequency */ +//#define PWM_OUT_FREQ 350 /* PWM timer counter's output frequency */ +// +//#define TICKS_PER_CHANGE_PERIOD TICK_TIMER_FREQ_HZ * 5 /* Tick signals PWM */ + +int timer_Task(void *pdata); +int timer_Init(); + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_TTC_TIMER_H_ */ diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/xparameters.h b/src/APP/Aufgabe4/ps7/core0/cfg/xparameters.h new file mode 100644 index 0000000..bf2c811 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/xparameters.h @@ -0,0 +1,704 @@ +/******************************************************************/ + +/* Definition for CPU ID */ +#define XPAR_CPU_ID 0 + +/* Definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_PS7_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_CPU_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + +/******************************************************************/ + +#undef DEF_DISABLED +#undef DEF_ENABLED +#define DEF_ENABLED 1 +#define DEF_DISABLED 0 + +#include "xparameters_ps.h" + + + +/******************************************************************/ + +/* Definitions for driver BRAM */ +#define XPAR_XBRAM_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_AXI_BRAM_CTRL_0_DEVICE_ID 0 +#define XPAR_AXI_BRAM_CTRL_0_DATA_WIDTH 32 +#define XPAR_AXI_BRAM_CTRL_0_ECC 0 +#define XPAR_AXI_BRAM_CTRL_0_FAULT_INJECT 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_UE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_STATUS_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_COUNTER_WIDTH 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_REGISTER 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_AXI_BRAM_CTRL_0_WRITE_ACCESS 0 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_BASEADDR 0x40000000 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_HIGHADDR 0x40001FFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_BASEADDR 0xFFFFFFFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_HIGHADDR 0xFFFFFFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_BRAM_0_DEVICE_ID XPAR_AXI_BRAM_CTRL_0_DEVICE_ID +#define XPAR_BRAM_0_DATA_WIDTH 32 +#define XPAR_BRAM_0_ECC 0 +#define XPAR_BRAM_0_FAULT_INJECT 0 +#define XPAR_BRAM_0_CE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_UE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_ECC_STATUS_REGISTERS 0 +#define XPAR_BRAM_0_CE_COUNTER_WIDTH 0 +#define XPAR_BRAM_0_ECC_ONOFF_REGISTER 0 +#define XPAR_BRAM_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_BRAM_0_WRITE_ACCESS 0 +#define XPAR_BRAM_0_BASEADDR 0x40000000 +#define XPAR_BRAM_0_HIGHADDR 0x40001FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_DDR_0 */ +#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000 +#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x3FFFFFFF + + +/******************************************************************/ + +/* Definitions for driver DEVCFG */ +#define XPAR_XDCFG_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_PS7_DEV_CFG_0_DEVICE_ID 0 +#define XPAR_PS7_DEV_CFG_0_BASEADDR 0xF8007000 +#define XPAR_PS7_DEV_CFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_XDCFG_0_DEVICE_ID XPAR_PS7_DEV_CFG_0_DEVICE_ID +#define XPAR_XDCFG_0_BASEADDR 0xF8007000 +#define XPAR_XDCFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Definitions for driver DMAPS */ +#define XPAR_XDMAPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_DMA_NS */ +#define XPAR_PS7_DMA_NS_DEVICE_ID 0 +#define XPAR_PS7_DMA_NS_BASEADDR 0xF8004000 +#define XPAR_PS7_DMA_NS_HIGHADDR 0xF8004FFF + + +/* Definitions for peripheral PS7_DMA_S */ +#define XPAR_PS7_DMA_S_DEVICE_ID 1 +#define XPAR_PS7_DMA_S_BASEADDR 0xF8003000 +#define XPAR_PS7_DMA_S_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DMA_NS */ +#define XPAR_XDMAPS_0_DEVICE_ID XPAR_PS7_DMA_NS_DEVICE_ID +#define XPAR_XDMAPS_0_BASEADDR 0xF8004000 +#define XPAR_XDMAPS_0_HIGHADDR 0xF8004FFF + +/* Canonical definitions for peripheral PS7_DMA_S */ +#define XPAR_XDMAPS_1_DEVICE_ID XPAR_PS7_DMA_S_DEVICE_ID +#define XPAR_XDMAPS_1_BASEADDR 0xF8003000 +#define XPAR_XDMAPS_1_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_AFI_0 */ +#define XPAR_PS7_AFI_0_S_AXI_BASEADDR 0xF8008000 +#define XPAR_PS7_AFI_0_S_AXI_HIGHADDR 0xF8008FFF + + +/* Definitions for peripheral PS7_AFI_1 */ +#define XPAR_PS7_AFI_1_S_AXI_BASEADDR 0xF8009000 +#define XPAR_PS7_AFI_1_S_AXI_HIGHADDR 0xF8009FFF + + +/* Definitions for peripheral PS7_AFI_2 */ +#define XPAR_PS7_AFI_2_S_AXI_BASEADDR 0xF800A000 +#define XPAR_PS7_AFI_2_S_AXI_HIGHADDR 0xF800AFFF + + +/* Definitions for peripheral PS7_AFI_3 */ +#define XPAR_PS7_AFI_3_S_AXI_BASEADDR 0xF800B000 +#define XPAR_PS7_AFI_3_S_AXI_HIGHADDR 0xF800BFFF + + +/* Definitions for peripheral PS7_DDRC_0 */ +#define XPAR_PS7_DDRC_0_S_AXI_BASEADDR 0xF8006000 +#define XPAR_PS7_DDRC_0_S_AXI_HIGHADDR 0xF8006FFF + + +/* Definitions for peripheral PS7_GLOBALTIMER_0 */ +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_BASEADDR 0xF8F00200 +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_HIGHADDR 0xF8F002FF + + +/* Definitions for peripheral PS7_GPV_0 */ +#define XPAR_PS7_GPV_0_S_AXI_BASEADDR 0xF8900000 +#define XPAR_PS7_GPV_0_S_AXI_HIGHADDR 0xF89FFFFF + + +/* Definitions for peripheral PS7_INTC_DIST_0 */ +#define XPAR_PS7_INTC_DIST_0_S_AXI_BASEADDR 0xF8F01000 +#define XPAR_PS7_INTC_DIST_0_S_AXI_HIGHADDR 0xF8F01FFF + + +/* Definitions for peripheral PS7_IOP_BUS_CONFIG_0 */ +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_BASEADDR 0xE0200000 +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_HIGHADDR 0xE0200FFF + + +/* Definitions for peripheral PS7_OCMC_0 */ +#define XPAR_PS7_OCMC_0_S_AXI_BASEADDR 0xF800C000 +#define XPAR_PS7_OCMC_0_S_AXI_HIGHADDR 0xF800CFFF + + +/* Definitions for peripheral PS7_PL310_0 */ +#define XPAR_PS7_PL310_0_S_AXI_BASEADDR 0xF8F02000 +#define XPAR_PS7_PL310_0_S_AXI_HIGHADDR 0xF8F02FFF + + +/* Definitions for peripheral PS7_PMU_0 */ +#define XPAR_PS7_PMU_0_S_AXI_BASEADDR 0xF8891000 +#define XPAR_PS7_PMU_0_S_AXI_HIGHADDR 0xF8891FFF +#define XPAR_PS7_PMU_0_PMU1_S_AXI_BASEADDR 0xF8893000 +#define XPAR_PS7_PMU_0_PMU1_S_AXI_HIGHADDR 0xF8893FFF + + +/* Definitions for peripheral PS7_QSPI_LINEAR_0 */ +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_BASEADDR 0xFC000000 +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_HIGHADDR 0xFDFFFFFF + + +/* Definitions for peripheral PS7_RAM_0 */ +#define XPAR_PS7_RAM_0_S_AXI_BASEADDR 0x00000000 +#define XPAR_PS7_RAM_0_S_AXI_HIGHADDR 0x0003FFFF + + +/* Definitions for peripheral PS7_RAM_1 */ +#define XPAR_PS7_RAM_1_S_AXI_BASEADDR 0xFFFC0000 +#define XPAR_PS7_RAM_1_S_AXI_HIGHADDR 0xFFFFFFFF + + +/* Definitions for peripheral PS7_SLCR_0 */ +#define XPAR_PS7_SLCR_0_S_AXI_BASEADDR 0xF8000000 +#define XPAR_PS7_SLCR_0_S_AXI_HIGHADDR 0xF8000FFF + + +/******************************************************************/ + +/* Definitions for driver GPIO */ +#define XPAR_XGPIO_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_GPIO_0 */ +#define XPAR_AXI_GPIO_0_BASEADDR 0x41200000 +#define XPAR_AXI_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_AXI_GPIO_0_DEVICE_ID 0 +#define XPAR_AXI_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_AXI_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_GPIO_0 */ +#define XPAR_GPIO_0_BASEADDR 0x41200000 +#define XPAR_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID +#define XPAR_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +///* Definitions for driver IICPS */ +//#define XPAR_XIICPS_NUM_INSTANCES 1 +// +///* Definitions for peripheral PS7_I2C_0 */ +//#define XPAR_PS7_I2C_0_DEVICE_ID 0 +//#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +//#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +//#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver QSPIPS */ +#define XPAR_XQSPIPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_QSPI_0 */ +#define XPAR_PS7_QSPI_0_DEVICE_ID 0 +#define XPAR_PS7_QSPI_0_BASEADDR 0xE000D000 +#define XPAR_PS7_QSPI_0_HIGHADDR 0xE000DFFF +#define XPAR_PS7_QSPI_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_PS7_QSPI_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_QSPI_0 */ +#define XPAR_XQSPIPS_0_DEVICE_ID XPAR_PS7_QSPI_0_DEVICE_ID +#define XPAR_XQSPIPS_0_BASEADDR 0xE000D000 +#define XPAR_XQSPIPS_0_HIGHADDR 0xE000DFFF +#define XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_XQSPIPS_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Definitions for driver SCUWDT */ +#define XPAR_XSCUWDT_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_PS7_SCUWDT_0_DEVICE_ID 0 +#define XPAR_PS7_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_PS7_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_SCUWDT_0_DEVICE_ID XPAR_PS7_SCUWDT_0_DEVICE_ID +#define XPAR_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Definitions for driver UCOS_EMACPS */ +#define XPAR_UCOS_EMACPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_PS7_ETHERNET_0_DEVICE_ID 0 +#define XPAR_PS7_ETHERNET_0_BASEADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_HIGHADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_UCOS_EMACPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_EMACPS_0_DEVICE_ID XPAR_PS7_ETHERNET_0_DEVICE_ID +#define XPAR_UCOS_EMACPS_0_BASEADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_HIGHADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_L2CACHEC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_L2CACHEC_0 */ +#define XPAR_PS7_L2CACHEC_0_DEVICE_ID 0 +#define XPAR_PS7_L2CACHEC_0_BASEADDR 0xF8F02000 +#define XPAR_PS7_L2CACHEC_0_HIGHADDR 0xF8F02FFF + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUC_0 */ +#define XPAR_PS7_SCUC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUC_0_BASEADDR 0xF8F00000 +#define XPAR_PS7_SCUC_0_HIGHADDR 0xF8F000FC + + +/******************************************************************/ + + +/***Definitions for Core_nIRQ/nFIQ interrupts ****/ +/* Definitions for driver UCOS_SCUGIC */ +#define XPAR_XSCUGIC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_PS7_SCUGIC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUGIC_0_BASEADDR 0xF8F00100 +#define XPAR_PS7_SCUGIC_0_HIGHADDR 0xF8F001FF +#define XPAR_PS7_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_SCUGIC_0_DEVICE_ID 0 +#define XPAR_SCUGIC_0_CPU_BASEADDR 0xF8F00100 +#define XPAR_SCUGIC_0_CPU_HIGHADDR 0xF8F001FF +#define XPAR_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUTIMER */ +#define XPAR_UCOS_SCUC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUTIMER_0 */ +#define XPAR_PS7_SCUTIMER_0_DEVICE_ID 0 +#define XPAR_PS7_SCUTIMER_0_BASEADDR 0xF8F00600 +#define XPAR_PS7_SCUTIMER_0_HIGHADDR 0xF8F0061F + + +/******************************************************************/ + +/* Definitions for driver UCOS_SDPS */ +#define XPAR_UCOS_SDPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SD_0 */ +#define XPAR_PS7_SD_0_DEVICE_ID 0 +#define XPAR_PS7_SD_0_BASEADDR 0xE0100000 +#define XPAR_PS7_SD_0_HIGHADDR 0xE0100FFF +#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SD_0 */ +#define XPAR_UCOS_SDPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_SDPS_0_DEVICE_ID XPAR_PS7_SD_0_DEVICE_ID +#define XPAR_UCOS_SDPS_0_BASEADDR 0xE0100000 +#define XPAR_UCOS_SDPS_0_HIGHADDR 0xE0100FFF +#define XPAR_UCOS_SDPS_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +///* Definitions for driver UCOS_TTCPS */ +//#define XPAR_UCOS_TTCPS_NUM_INSTANCES 3 +// +///* Definitions for peripheral PS7_TTC_0 */ +//#define XPAR_PS7_TTC_0_DEVICE_ID 0 +//#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000 +//#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_1_DEVICE_ID 1 +//#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004 +//#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_2_DEVICE_ID 2 +//#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008 +//#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_UARTPS */ +#define XPAR_UCOS_UARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_UCOS_UARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_UCOS_UARTPS_0_BASEADDR 0xE0001000 +#define XPAR_UCOS_UARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_UCOS_UARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_UCOS_UARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_USBPS */ +#define XPAR_UCOS_USBPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_USB_0 */ +#define XPAR_PS7_USB_0_DEVICE_ID 0 +#define XPAR_PS7_USB_0_BASEADDR 0xE0002000 +#define XPAR_PS7_USB_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_USB_0 */ +#define XPAR_UCOS_USBPS_0_DEVICE_ID XPAR_PS7_USB_0_DEVICE_ID +#define XPAR_UCOS_USBPS_0_BASEADDR 0xE0002000 +#define XPAR_UCOS_USBPS_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Definitions for driver XADCPS */ +#define XPAR_XADCPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_XADC_0 */ +#define XPAR_PS7_XADC_0_DEVICE_ID 0 +#define XPAR_PS7_XADC_0_BASEADDR 0xF8007100 +#define XPAR_PS7_XADC_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_XADC_0 */ +#define XPAR_XADCPS_0_DEVICE_ID XPAR_PS7_XADC_0_DEVICE_ID +#define XPAR_XADCPS_0_BASEADDR 0xF8007100 +#define XPAR_XADCPS_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + + +//UCOS STDOUT +#define UCOS_STDOUT_DRIVER UCOS_UART_PS7_UART +#define UCOS_STDOUT_DEVICE_ID 0 +#define STDOUT_BASEADDRESS + +//UCOS Ethernet +#define UCOS_ETHERNET_DRIVER UCOS_ETHERNET_EMACPS + +//UCOS TASK PARAMETERS +#define UCOS_START_TASK_PRIO 5 +#define UCOS_START_TASK_STACK_SIZE 784 +#define UCOS_START_DEBUG_TRACE DEF_ENABLED +#define NET_TASK_CFG_RX_PRIO 30 +#define NET_TASK_CFG_RX_STACK_SIZE 3072 +#define NET_TASK_CFG_TXDEALLOC_PRIO 6 +#define NET_TASK_CFG_TXDEALLOC_STACK_SIZE 2048 +#define NET_TASK_CFG_TMR_PRIO 18 +#define NET_TASK_CFG_TMR_STACK_SIZE 2048 +#define HTTPc_OS_CFG_TASK_PRIO 20 +#define HTTPc_OS_CFG_TASK_STK_SIZE 2048 +#define UCOS_HTTPc_OS_CFG_TASK_DELAY 1 +#define UCOS_HTTPc_OS_CFG_MSG_Q_SIZE 5 +#define UCOS_HTTPc_OS_CFG_TIMEOUT 2000 +#define UCOS_HTTPc_OS_CFG_INACTIVITY_TIMEOUT 30 + +#define UCOS_AMP_MASTER DEF_ENABLED + + +#define UCOS_CFG_INIT_CAN DEF_ENABLED +#define UCOS_CFG_INIT_NET DEF_ENABLED +#define UCOS_CFG_INIT_FS DEF_DISABLED +#define UCOS_CFG_INIT_OPENAMP DEF_DISABLED +#define UCOS_CFG_INIT_USBD DEF_DISABLED +#define UCOS_CFG_INIT_USBH DEF_DISABLED + + +#define UCOS_ETHERNET_ADDRESS "10.10.110.2" +#define UCOS_ETHERNET_GATEWAY "10.10.110.1" +#define UCOS_ETHERNET_SUBMASK "255.255.255.0" +#define UCOS_ETHERNET_DHCP DEF_ENABLED + + +#define UCOS_IF_RX_BUF_NBR 12 +#define UCOS_IF_TX_LARGE_BUF_NBR 8 +#define UCOS_IF_TX_SMALL_BUF_NBR 8 +#define UCOS_IF_RX_DESC_NBR 0 +#define UCOS_IF_TX_DESC_NBR 0 +#define UCOS_IF_DEDIC_MEM_ADDR 0 +#define UCOS_IF_DEDIC_MEM_SIZE 0 +#define UCOS_IF_HW_ADDR "50:E5:49:E6:8D:28" + + +#define UCOS_PHY_BUS_ADDR 255 +#define UCOS_PHY_BUS_MODE UCOS_NET_PHY_BUS_MODE_GMII +#define UCOS_PHY_TYPE UCOS_NET_PHY_TYPE_INT +#define UCOS_PHY_SPEED UCOS_NET_PHY_SPD_AUTO +#define UCOS_PHY_DUPLEX UCOS_NET_PHY_DUPLEX_AUTO + + +#define UCOS_USB_DRIVER UCOS_USB_NONE +#define UCOS_USB_DEVICE_ID 0 +#define UCOS_USB_TYPE UCOS_USB_TYPE_DEVICE + + +#define UCOS_RAMDISK_EN DEF_DISABLED +#define UCOS_RAMDISK_SIZE 128 +#define UCOS_RAMDISK_SECTOR_SIZE 512 +#define UCOS_RAMDISK_BASE_ADDRESS 0 + + +#define UCOS_SDCARD_EN DEF_DISABLED + + +#define XPAR_PS7_ETHERNET_0_INT_SOURCE 54 +#define XPAR_PS7_SD_0_INT_SOURCE 56 +#define XPAR_PS7_UART_1_INT_SOURCE 82 +#define XPAR_PS7_USB_0_INT_SOURCE 53 + +#define UCOS_ZYNQ_CONFIG_MMU DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_MMU DEF_DISABLED +#define UCOS_ZYNQ_CONFIG_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_OPTIMS DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_I_EN DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_D_EN DEF_DISABLED +#define UCOS_CPU_TYPE UCOS_CPU_TYPE_PS7 + +//Parameters added by Kai Gemlau +#define UCOS_SMP_ENABLE DEF_DISABLED + +/******************************************************************/ + +/* Definitions for driver TTCPS */ +#define XPAR_XTTCPS_NUM_INSTANCES 3U + +/* Definitions for peripheral PS7_TTC_0 */ +#define XPAR_PS7_TTC_0_DEVICE_ID 0U +#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000U +#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_1_DEVICE_ID 1U +#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004U +#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_2_DEVICE_ID 2U +#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008U +#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_TTC_0 */ +#define XPAR_XTTCPS_0_DEVICE_ID XPAR_PS7_TTC_0_DEVICE_ID +#define XPAR_XTTCPS_0_BASEADDR 0xF8001000U +#define XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_0_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_1_DEVICE_ID XPAR_PS7_TTC_1_DEVICE_ID +#define XPAR_XTTCPS_1_BASEADDR 0xF8001004U +#define XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_1_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_2_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define XPAR_XTTCPS_2_BASEADDR 0xF8001008U +#define XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Definitions for driver IICPS */ +#define XPAR_XIICPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_I2C_0 */ +#define XPAR_PS7_I2C_0_DEVICE_ID 0 +#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/* Definitions for peripheral PS7_I2C_1 */ +#define XPAR_PS7_I2C_1_DEVICE_ID 1 +#define XPAR_PS7_I2C_1_BASEADDR 0xE0005000 +#define XPAR_PS7_I2C_1_HIGHADDR 0xE0005FFF +#define XPAR_PS7_I2C_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + +/* Canonical definitions for peripheral PS7_I2C_1 */ +#define XPAR_XIICPS_1_DEVICE_ID XPAR_PS7_I2C_1_DEVICE_ID +#define XPAR_XIICPS_1_BASEADDR 0xE0005000 +#define XPAR_XIICPS_1_HIGHADDR 0xE0005FFF +#define XPAR_XIICPS_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver UARTPS */ +#define XPAR_XUARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_XUARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_XUARTPS_0_BASEADDR 0xE0001000 +#define XPAR_XUARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_XUARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_XUARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ diff --git a/src/APP/Aufgabe4/ps7/core0/cfg/xparameters_ps.h b/src/APP/Aufgabe4/ps7/core0/cfg/xparameters_ps.h new file mode 100644 index 0000000..7cdb12f --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/cfg/xparameters_ps.h @@ -0,0 +1,325 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xparameters_ps.h +* +* This file contains the address definitions for the hard peripherals +* attached to the ARM Cortex A9 core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 1.00a ecm/sdm 02/01/10 Initial version
+* 3.04a sdm     02/02/12 Removed some of the defines as they are being generated through
+*                        driver tcl
+* 5.0	pkp		01/16/15 Added interrupt ID definition of ttc for TEST APP
+*
+* +* @note +* +* None. +* +******************************************************************************/ + +#ifndef _XPARAMETERS_PS_H_ +#define _XPARAMETERS_PS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/************************** Constant Definitions *****************************/ + +/* + * This block contains constant declarations for the peripherals + * within the hardblock + */ + +/* Canonical definitions for DDR MEMORY */ +#define XPAR_DDR_MEM_BASEADDR 0x00000000U +#define XPAR_DDR_MEM_HIGHADDR 0x3FFFFFFFU + +/* Canonical definitions for Interrupts */ +#define XPAR_XUARTPS_0_INTR XPS_UART0_INT_ID +#define XPAR_XUARTPS_1_INTR XPS_UART1_INT_ID +#define XPAR_XUSBPS_0_INTR XPS_USB0_INT_ID +#define XPAR_XUSBPS_1_INTR XPS_USB1_INT_ID +#define XPAR_XIICPS_0_INTR XPS_I2C0_INT_ID +#define XPAR_XIICPS_1_INTR XPS_I2C1_INT_ID +#define XPAR_XSPIPS_0_INTR XPS_SPI0_INT_ID +#define XPAR_XSPIPS_1_INTR XPS_SPI1_INT_ID +#define XPAR_XCANPS_0_INTR XPS_CAN0_INT_ID +#define XPAR_XCANPS_1_INTR XPS_CAN1_INT_ID +#define XPAR_XGPIOPS_0_INTR XPS_GPIO_INT_ID +#define XPAR_XEMACPS_0_INTR XPS_GEM0_INT_ID +#define XPAR_XEMACPS_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_XEMACPS_1_INTR XPS_GEM1_INT_ID +#define XPAR_XEMACPS_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_XSDIOPS_0_INTR XPS_SDIO0_INT_ID +#define XPAR_XQSPIPS_0_INTR XPS_QSPI_INT_ID +#define XPAR_XSDIOPS_1_INTR XPS_SDIO1_INT_ID +#define XPAR_XWDTPS_0_INTR XPS_WDT_INT_ID +#define XPAR_XDCFG_0_INTR XPS_DVC_INT_ID +#define XPAR_SCUTIMER_INTR XPS_SCU_TMR_INT_ID +#define XPAR_SCUWDT_INTR XPS_SCU_WDT_INT_ID +#define XPAR_XTTCPS_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_XTTCPS_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_XTTCPS_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_XTTCPS_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_XTTCPS_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_XTTCPS_5_INTR XPS_TTC1_2_INT_ID +#define XPAR_XDMAPS_0_FAULT_INTR XPS_DMA0_ABORT_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_0 XPS_DMA0_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_1 XPS_DMA1_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_2 XPS_DMA2_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_3 XPS_DMA3_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_4 XPS_DMA4_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_5 XPS_DMA5_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_6 XPS_DMA6_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_7 XPS_DMA7_INT_ID + + +#define XPAR_XQSPIPS_0_LINEAR_BASEADDR XPS_QSPI_LINEAR_BASEADDR +#define XPAR_XPARPORTPS_CTRL_BASEADDR XPS_PARPORT_CRTL_BASEADDR + + + +/* Canonical definitions for DMAC */ + + +/* Canonical definitions for WDT */ + +/* Canonical definitions for SLCR */ +#define XPAR_XSLCR_NUM_INSTANCES 1U +#define XPAR_XSLCR_0_DEVICE_ID 0U +#define XPAR_XSLCR_0_BASEADDR XPS_SYS_CTRL_BASEADDR + +/* Canonical definitions for SCU GIC */ +#define XPAR_SCUGIC_NUM_INSTANCES 1U +#define XPAR_SCUGIC_SINGLE_DEVICE_ID 0U +#define XPAR_SCUGIC_CPU_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000100U) +#define XPAR_SCUGIC_DIST_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00001000U) +#define XPAR_SCUGIC_ACK_BEFORE 0U + +/* Canonical definitions for Global Timer */ +#define XPAR_GLOBAL_TMR_NUM_INSTANCES 1U +#define XPAR_GLOBAL_TMR_DEVICE_ID 0U +#define XPAR_GLOBAL_TMR_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000200U) +#define XPAR_GLOBAL_TMR_INTR XPS_GLOBAL_TMR_INT_ID + + +/* Xilinx Parallel Flash Library (XilFlash) User Settings */ +#define XPAR_AXI_EMC + + +#define XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/* + * This block contains constant declarations for the peripherals + * within the hardblock. These have been put for bacwards compatibilty + */ + +#define XPS_PERIPHERAL_BASEADDR 0xE0000000U +#define XPS_UART0_BASEADDR 0xE0000000U +#define XPS_UART1_BASEADDR 0xE0001000U +#define XPS_USB0_BASEADDR 0xE0002000U +#define XPS_USB1_BASEADDR 0xE0003000U +#define XPS_I2C0_BASEADDR 0xE0004000U +#define XPS_I2C1_BASEADDR 0xE0005000U +#define XPS_SPI0_BASEADDR 0xE0006000U +#define XPS_SPI1_BASEADDR 0xE0007000U +#define XPS_CAN0_BASEADDR 0xE0008000U +#define XPS_CAN1_BASEADDR 0xE0009000U +#define XPS_GPIO_BASEADDR 0xE000A000U +#define XPS_GEM0_BASEADDR 0xE000B000U +#define XPS_GEM1_BASEADDR 0xE000C000U +#define XPS_QSPI_BASEADDR 0xE000D000U +#define XPS_PARPORT_CRTL_BASEADDR 0xE000E000U +#define XPS_SDIO0_BASEADDR 0xE0100000U +#define XPS_SDIO1_BASEADDR 0xE0101000U +#define XPS_IOU_BUS_CFG_BASEADDR 0xE0200000U +#define XPS_NAND_BASEADDR 0xE1000000U +#define XPS_PARPORT0_BASEADDR 0xE2000000U +#define XPS_PARPORT1_BASEADDR 0xE4000000U +#define XPS_QSPI_LINEAR_BASEADDR 0xFC000000U +#define XPS_SYS_CTRL_BASEADDR 0xF8000000U /* AKA SLCR */ +#define XPS_TTC0_BASEADDR 0xF8001000U +#define XPS_TTC1_BASEADDR 0xF8002000U +#define XPS_DMAC0_SEC_BASEADDR 0xF8003000U +#define XPS_DMAC0_NON_SEC_BASEADDR 0xF8004000U +#define XPS_WDT_BASEADDR 0xF8005000U +#define XPS_DDR_CTRL_BASEADDR 0xF8006000U +#define XPS_DEV_CFG_APB_BASEADDR 0xF8007000U +#define XPS_AFI0_BASEADDR 0xF8008000U +#define XPS_AFI1_BASEADDR 0xF8009000U +#define XPS_AFI2_BASEADDR 0xF800A000U +#define XPS_AFI3_BASEADDR 0xF800B000U +#define XPS_OCM_BASEADDR 0xF800C000U +#define XPS_EFUSE_BASEADDR 0xF800D000U +#define XPS_CORESIGHT_BASEADDR 0xF8800000U +#define XPS_TOP_BUS_CFG_BASEADDR 0xF8900000U +#define XPS_SCU_PERIPH_BASE 0xF8F00000U +#define XPS_L2CC_BASEADDR 0xF8F02000U +#define XPS_SAM_RAM_BASEADDR 0xFFFC0000U +#define XPS_FPGA_AXI_S0_BASEADDR 0x40000000U +#define XPS_FPGA_AXI_S1_BASEADDR 0x80000000U +#define XPS_IOU_S_SWITCH_BASEADDR 0xE0000000U +#define XPS_PERIPH_APB_BASEADDR 0xF8000000U + +/* Shared Peripheral Interrupts (SPI) */ +#define XPS_CORE_PARITY0_INT_ID 32U +#define XPS_CORE_PARITY1_INT_ID 33U +#define XPS_L2CC_INT_ID 34U +#define XPS_OCMINTR_INT_ID 35U +#define XPS_ECC_INT_ID 36U +#define XPS_PMU0_INT_ID 37U +#define XPS_PMU1_INT_ID 38U +#define XPS_SYSMON_INT_ID 39U +#define XPS_DVC_INT_ID 40U +#define XPS_WDT_INT_ID 41U +#define XPS_TTC0_0_INT_ID 42U +#define XPS_TTC0_1_INT_ID 43U +#define XPS_TTC0_2_INT_ID 44U +#define XPS_DMA0_ABORT_INT_ID 45U +#define XPS_DMA0_INT_ID 46U +#define XPS_DMA1_INT_ID 47U +#define XPS_DMA2_INT_ID 48U +#define XPS_DMA3_INT_ID 49U +#define XPS_SMC_INT_ID 50U +#define XPS_QSPI_INT_ID 51U +#define XPS_GPIO_INT_ID 52U +#define XPS_USB0_INT_ID 53U +#define XPS_GEM0_INT_ID 54U +#define XPS_GEM0_WAKE_INT_ID 55U +#define XPS_SDIO0_INT_ID 56U +#define XPS_I2C0_INT_ID 57U +#define XPS_SPI0_INT_ID 58U +#define XPS_UART0_INT_ID 59U +#define XPS_CAN0_INT_ID 60U +#define XPS_FPGA0_INT_ID 61U +#define XPS_FPGA1_INT_ID 62U +#define XPS_FPGA2_INT_ID 63U +#define XPS_FPGA3_INT_ID 64U +#define XPS_FPGA4_INT_ID 65U +#define XPS_FPGA5_INT_ID 66U +#define XPS_FPGA6_INT_ID 67U +#define XPS_FPGA7_INT_ID 68U +#define XPS_TTC1_0_INT_ID 69U +#define XPS_TTC1_1_INT_ID 70U +#define XPS_TTC1_2_INT_ID 71U +#define XPS_DMA4_INT_ID 72U +#define XPS_DMA5_INT_ID 73U +#define XPS_DMA6_INT_ID 74U +#define XPS_DMA7_INT_ID 75U +#define XPS_USB1_INT_ID 76U +#define XPS_GEM1_INT_ID 77U +#define XPS_GEM1_WAKE_INT_ID 78U +#define XPS_SDIO1_INT_ID 79U +#define XPS_I2C1_INT_ID 80U +#define XPS_SPI1_INT_ID 81U +#define XPS_UART1_INT_ID 82U +#define XPS_CAN1_INT_ID 83U +#define XPS_FPGA8_INT_ID 84U +#define XPS_FPGA9_INT_ID 85U +#define XPS_FPGA10_INT_ID 86U +#define XPS_FPGA11_INT_ID 87U +#define XPS_FPGA12_INT_ID 88U +#define XPS_FPGA13_INT_ID 89U +#define XPS_FPGA14_INT_ID 90U +#define XPS_FPGA15_INT_ID 91U + +/* Private Peripheral Interrupts (PPI) */ +#define XPS_GLOBAL_TMR_INT_ID 27U /* SCU Global Timer interrupt */ +#define XPS_FIQ_INT_ID 28U /* FIQ from FPGA fabric */ +#define XPS_SCU_TMR_INT_ID 29U /* SCU Private Timer interrupt */ +#define XPS_SCU_WDT_INT_ID 30U /* SCU Private WDT interrupt */ +#define XPS_IRQ_INT_ID 31U /* IRQ from FPGA fabric */ + + +/* REDEFINES for TEST APP */ +/* Definitions for UART */ +#define XPAR_PS7_UART_0_INTR XPS_UART0_INT_ID +#define XPAR_PS7_UART_1_INTR XPS_UART1_INT_ID +#define XPAR_PS7_USB_0_INTR XPS_USB0_INT_ID +#define XPAR_PS7_USB_1_INTR XPS_USB1_INT_ID +#define XPAR_PS7_I2C_0_INTR XPS_I2C0_INT_ID +#define XPAR_PS7_I2C_1_INTR XPS_I2C1_INT_ID +#define XPAR_PS7_SPI_0_INTR XPS_SPI0_INT_ID +#define XPAR_PS7_SPI_1_INTR XPS_SPI1_INT_ID +#define XPAR_PS7_CAN_0_INTR XPS_CAN0_INT_ID +#define XPAR_PS7_CAN_1_INTR XPS_CAN1_INT_ID +#define XPAR_PS7_GPIO_0_INTR XPS_GPIO_INT_ID +#define XPAR_PS7_ETHERNET_0_INTR XPS_GEM0_INT_ID +#define XPAR_PS7_ETHERNET_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_PS7_ETHERNET_1_INTR XPS_GEM1_INT_ID +#define XPAR_PS7_ETHERNET_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_PS7_QSPI_0_INTR XPS_QSPI_INT_ID +#define XPAR_PS7_WDT_0_INTR XPS_WDT_INT_ID +#define XPAR_PS7_SCUWDT_0_INTR XPS_SCU_WDT_INT_ID +#define XPAR_PS7_SCUTIMER_0_INTR XPS_SCU_TMR_INT_ID +#define XPAR_PS7_XADC_0_INTR XPS_SYSMON_INT_ID +#define XPAR_PS7_TTC_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_PS7_TTC_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_PS7_TTC_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_PS7_TTC_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_PS7_TTC_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_PS7_TTC_5_INTR XPS_TTC1_2_INT_ID + +#define XPAR_XADCPS_INT_ID XPS_SYSMON_INT_ID + +/* For backwards compatibilty */ +#define XPAR_XUARTPS_0_CLOCK_HZ XPAR_XUARTPS_0_UART_CLK_FREQ_HZ +#define XPAR_XUARTPS_1_CLOCK_HZ XPAR_XUARTPS_1_UART_CLK_FREQ_HZ +#define XPAR_XTTCPS_0_CLOCK_HZ XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_1_CLOCK_HZ XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_2_CLOCK_HZ XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_3_CLOCK_HZ XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_4_CLOCK_HZ XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_5_CLOCK_HZ XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ +#define XPAR_XIICPS_0_CLOCK_HZ XPAR_XIICPS_0_I2C_CLK_FREQ_HZ +#define XPAR_XIICPS_1_CLOCK_HZ XPAR_XIICPS_1_I2C_CLK_FREQ_HZ + +#define XPAR_XQSPIPS_0_CLOCK_HZ XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ + +#define XPAR_SCUTIMER_DEVICE_ID 0U +#define XPAR_SCUWDT_DEVICE_ID 0U + + +#ifdef __cplusplus +} +#endif + +#endif /* protection macro */ diff --git a/src/APP/Aufgabe4/ps7/core0/linker/lscript.ld b/src/APP/Aufgabe4/ps7/core0/linker/lscript.ld new file mode 100644 index 0000000..a9f145a --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/linker/lscript.ld @@ -0,0 +1,291 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: */ +/* */ +/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : Cortex-A9 Linker Script */ +/* */ +/*******************************************************************/ + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000; +_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x2000; + +_ABORT_STACK_SIZE = DEFINED(_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024; +_SUPERVISOR_STACK_SIZE = DEFINED(_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048; +_IRQ_STACK_SIZE = DEFINED(_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024; +_FIQ_STACK_SIZE = DEFINED(_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024; +_UNDEF_STACK_SIZE = DEFINED(_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024; + +/* Define Memories in the system */ + +MEMORY +{ + axi_bram_ctrl_0_Mem0 : ORIGIN = 0x40000000, LENGTH = 0x2000 + ps7_ddr_0 : ORIGIN = 0x100000, LENGTH = 0x3FF00000 + ps7_qspi_linear_0 : ORIGIN = 0xFC000000, LENGTH = 0x2000000 + ps7_ram_0 : ORIGIN = 0x0, LENGTH = 0x30000 + ps7_ram_1 : ORIGIN = 0xFFFF0000, LENGTH = 0xFE00 + ps7_ddr_core_0 : ORIGIN = 0x100000, LENGTH = 0x700000 + ps7_ddr_core_1 : ORIGIN = 0x800000, LENGTH = 0x800000 +} + +/* Specify the default entry point to the program */ + +ENTRY(_vector_table) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ +.text : { + KEEP (*(.vectors)) + *(.boot) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.plt) + *(.gnu_warning) + *(.gcc_execpt_table) + *(.glue_7) + *(.glue_7t) + *(.vfp11_veneer) + *(.ARM.extab) + *(.gnu.linkonce.armextab.*) +} > ps7_ddr_core_0 + +.init : { + KEEP (*(.init)) +} > ps7_ddr_core_0 + +.fini : { + KEEP (*(.fini)) +} > ps7_ddr_core_0 + +.rodata : { + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > ps7_ddr_core_0 + +.rodata1 : { + __rodata1_start = .; + *(.rodata1) + *(.rodata1.*) + __rodata1_end = .; +} > ps7_ddr_core_0 + +.sdata2 : { + __sdata2_start = .; + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + __sdata2_end = .; +} > ps7_ddr_core_0 + +.sbss2 : { + __sbss2_start = .; + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + __sbss2_end = .; +} > ps7_ddr_core_0 + +.data : { + __data_start = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.jcr) + *(.got) + *(.got.plt) + __data_end = .; +} > ps7_ddr_core_0 + +.data1 : { + __data1_start = .; + *(.data1) + *(.data1.*) + __data1_end = .; +} > ps7_ddr_core_0 + +.got : { + *(.got) +} > ps7_ddr_core_0 + +.ctors : { + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > ps7_ddr_core_0 + +.dtors : { + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > ps7_ddr_core_0 + +.fixup : { + __fixup_start = .; + *(.fixup) + __fixup_end = .; +} > ps7_ddr_core_0 + +.eh_frame : { + *(.eh_frame) +} > ps7_ddr_core_0 + +.eh_framehdr : { + __eh_framehdr_start = .; + *(.eh_framehdr) + __eh_framehdr_end = .; +} > ps7_ddr_core_0 + +.gcc_except_table : { + *(.gcc_except_table) +} > ps7_ddr_core_0 + +.mmu_tbl (ALIGN(16384)) : { + __mmu_tbl_start = .; + *(.mmu_tbl) + __mmu_tbl_end = .; +} > ps7_ddr_core_0 + +.ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx*) + *(.gnu.linkonce.armexidix.*.*) + __exidx_end = .; +} > ps7_ddr_core_0 + +.preinit_array : { + __preinit_array_start = .; + KEEP (*(SORT(.preinit_array.*))) + KEEP (*(.preinit_array)) + __preinit_array_end = .; +} > ps7_ddr_core_0 + +.init_array : { + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; +} > ps7_ddr_core_0 + +.fini_array : { + __fini_array_start = .; + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array)) + __fini_array_end = .; +} > ps7_ddr_core_0 + +.ARM.attributes : { + __ARM.attributes_start = .; + *(.ARM.attributes) + __ARM.attributes_end = .; +} > ps7_ddr_core_0 + +.sdata : { + __sdata_start = .; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + __sdata_end = .; +} > ps7_ddr_core_0 + +.sbss (NOLOAD) : { + __sbss_start = .; + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + __sbss_end = .; +} > ps7_ddr_core_0 + +.tdata : { + __tdata_start = .; + *(.tdata) + *(.tdata.*) + *(.gnu.linkonce.td.*) + __tdata_end = .; +} > ps7_ddr_core_0 + +.tbss : { + __tbss_start = .; + *(.tbss) + *(.tbss.*) + *(.gnu.linkonce.tb.*) + __tbss_end = .; +} > ps7_ddr_core_0 + +.bss (NOLOAD) : { + __bss_start = .; + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + __bss_end = .; +} > ps7_ddr_core_0 + +_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 ); + +_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 ); + +/* Generate Stack and Heap definitions */ + +.heap (NOLOAD) : { + . = ALIGN(16); + _heap = .; + HeapBase = .; + _heap_start = .; + . += _HEAP_SIZE; + _heap_end = .; + HeapLimit = .; +} > ps7_ddr_core_0 + +.stack (NOLOAD) : { + . = ALIGN(16); + _stack_end = .; + . += _STACK_SIZE; + . = ALIGN(16); + _stack = .; + __stack = _stack; + . = ALIGN(16); + _irq_stack_end = .; + . += _IRQ_STACK_SIZE; + . = ALIGN(16); + __irq_stack = .; + _supervisor_stack_end = .; + . += _SUPERVISOR_STACK_SIZE; + . = ALIGN(16); + __supervisor_stack = .; + _abort_stack_end = .; + . += _ABORT_STACK_SIZE; + . = ALIGN(16); + __abort_stack = .; + _fiq_stack_end = .; + . += _FIQ_STACK_SIZE; + . = ALIGN(16); + __fiq_stack = .; + _undef_stack_end = .; + . += _UNDEF_STACK_SIZE; + . = ALIGN(16); + __undef_stack = .; +} > ps7_ddr_core_0 + +_end = .; +} + diff --git a/src/APP/Aufgabe4/ps7/core0/main.c b/src/APP/Aufgabe4/ps7/core0/main.c new file mode 100644 index 0000000..73666be --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/main.c @@ -0,0 +1,31 @@ +/* + ============================================================================ + Name : main.c + Author : Kai-Björn Gemlau + Version : + Copyright : Copyright belongs to the authors + Description : Hello World in C, Praktikum Aufgabe 7s + ============================================================================ + */ + +#include +#include +#include "ucos_uartps.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "xil_printf.h" +#include "imu.h" + + +void InitDoneCallback(void * p_arg) { + (void) p_arg; + UCOS_Print("OS started!\r\n"); +} + +int main(void) { + + MMUInit(); + UCOSStartup(InitDoneCallback); + while (1) + ; +} diff --git a/src/APP/Aufgabe4/ps7/core0/src/app_hooks.c b/src/APP/Aufgabe4/ps7/core0/src/app_hooks.c new file mode 100644 index 0000000..b375307 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/src/app_hooks.c @@ -0,0 +1,259 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* uC/OS-II +* Application Hooks +* +* Filename : app_hooks.c +* Version : V1.00 +* Programmer(s) : FT +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +*/ + +#include + + +/* +********************************************************************************************************* +* EXTERN GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL CONSTANTS +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL DATA TYPES +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* LOCAL TABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL FUNCTION PROTOTYPES +********************************************************************************************************* +*/ + + + +/* +********************************************************************************************************** +********************************************************************************************************** +** GLOBAL FUNCTIONS +********************************************************************************************************** +********************************************************************************************************** +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +** uC/OS-II APP HOOKS +********************************************************************************************************* +********************************************************************************************************* +*/ + +#if (OS_APP_HOOKS_EN > 0) + +/* +********************************************************************************************************* +* TASK CREATION HOOK (APPLICATION) +* +* Description : This function is called when a task is created. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being created. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskCreateHook (OS_TCB *ptcb) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskCreateHook(ptcb); +#endif +} + +/* +********************************************************************************************************* +* TASK DELETION HOOK (APPLICATION) +* +* Description : This function is called when a task is deleted. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being deleted. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskDelHook (OS_TCB *ptcb) +{ + (void)ptcb; +} + +/* +********************************************************************************************************* +* IDLE TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskIdleHook(), which is called by the idle task. This hook +* has been added to allow you to do such things as STOP the CPU to conserve power. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are enabled during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 251 +void App_TaskIdleHook (void) +{ +} +#endif + +/* +********************************************************************************************************* +* STATISTIC TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskStatHook(), which is called every second by uC/OS-II's +* statistics task. This allows your application to add functionality to the statistics task. +* +* Argument(s) : none. +********************************************************************************************************* +*/ + +void App_TaskStatHook (void) +{ +} + +/* +********************************************************************************************************* +* TASK RETURN HOOK (APPLICATION) +* +* Description: This function is called if a task accidentally returns. In other words, a task should +* either be an infinite loop or delete itself when done. +* +* Arguments : ptcb is a pointer to the task control block of the task that is returning. +* +* Note(s) : none +********************************************************************************************************* +*/ + + +#if OS_VERSION >= 289 +void App_TaskReturnHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TASK SWITCH HOOK (APPLICATION) +* +* Description : This function is called when a task switch is performed. This allows you to perform other +* operations during a context switch. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are disabled during this call. +* +* (2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that +* will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the +* task being switched out (i.e. the preempted task). +********************************************************************************************************* +*/ + +#if OS_TASK_SW_HOOK_EN > 0 +void App_TaskSwHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN > 0) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskSwHook(); +#endif +} +#endif + +/* +********************************************************************************************************* +* OS_TCBInit() HOOK (APPLICATION) +* +* Description : This function is called by OSTCBInitHook(), which is called by OS_TCBInit() after setting +* up most of the TCB. +* +* Argument(s) : ptcb is a pointer to the TCB of the task being created. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 204 +void App_TCBInitHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TICK HOOK (APPLICATION) +* +* Description : This function is called every tick. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_TIME_TICK_HOOK_EN > 0 +void App_TimeTickHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TickHook(); +#endif +} +#endif +#endif diff --git a/src/APP/Aufgabe4/ps7/core0/src/imu.c b/src/APP/Aufgabe4/ps7/core0/src/imu.c new file mode 100644 index 0000000..8823631 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/src/imu.c @@ -0,0 +1,50 @@ +/* + * imu.c + * Source code for + * - init of MPU9250, + * - gathering motion data + * from the IMU/MPU 9250 via I2C + * Created on: Nov 6, 2018 + * Author: laurenzb + */ +#include "imu.h" +#include "xiicps.h" +#include "xparameters.h" +#include "ucos_uartps.h" +#include "xil_printf.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" + + +void mpu9250_Get_Data_Task() { + +} + +uint8_t mpu9250_Iic_Init(){ + +} + +void mpu9250_Init(void){ + +} + + +uint8_t mpu9250_Write_Reg(){ + +} + + +int8_t mpu9250_Read_Data(){ + +} + +//optional +uint8_t mpu9250_Read_Status() { + +} + + + + + + diff --git a/src/APP/Aufgabe4/ps7/core0/src/uartps_cfg.c b/src/APP/Aufgabe4/ps7/core0/src/uartps_cfg.c new file mode 100644 index 0000000..dae6c62 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/src/uartps_cfg.c @@ -0,0 +1,17 @@ + +#include "ucos_uartps.h" +#include "xparameters.h" +#include "xparameters_ps.h" + +/* + * The uart configuration table for devices + */ +UCOS_UARTPS_Config UCOS_UARTPS_ConfigTable[] = { + { + XPAR_PS7_UART_1_DEVICE_ID, + XPAR_PS7_UART_1_BASEADDR, + XPAR_PS7_UART_1_UART_CLK_FREQ_HZ, + XPAR_PS7_UART_1_HAS_MODEM, + XPAR_PS7_UART_1_INT_SOURCE + } +}; diff --git a/src/APP/Aufgabe4/ps7/core0/src/xgpiops_g.c b/src/APP/Aufgabe4/ps7/core0/src/xgpiops_g.c new file mode 100644 index 0000000..31cfbbb --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/src/xgpiops_g.c @@ -0,0 +1,56 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ + +#include "xparameters.h" +#include "xparameters_ps.h" +#include "xgpiops.h" + +/* +* The configuration table for devices +*/ + +XGpioPs_Config XGpioPs_ConfigTable[XPAR_XGPIOPS_NUM_INSTANCES] = +{ + { + XPAR_PS7_GPIO_0_DEVICE_ID, + XPAR_PS7_GPIO_0_BASEADDR + } +}; + + diff --git a/src/APP/Aufgabe4/ps7/core0/src/xiicps_g.c b/src/APP/Aufgabe4/ps7/core0/src/xiicps_g.c new file mode 100644 index 0000000..2e9d0ff --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/src/xiicps_g.c @@ -0,0 +1,63 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ + +#include "xparameters.h" +#include "xparameters_ps.h" + +#include "xiicps.h" + +/* +* The configuration table for devices +*/ + +XIicPs_Config XIicPs_ConfigTable[XPAR_XIICPS_NUM_INSTANCES] = +{ + { + XPAR_PS7_I2C_0_DEVICE_ID, + XPAR_PS7_I2C_0_BASEADDR, + XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ + }, + { + XPAR_PS7_I2C_1_DEVICE_ID, + XPAR_PS7_I2C_1_BASEADDR, + XPAR_PS7_I2C_1_I2C_CLK_FREQ_HZ + } +}; + + diff --git a/src/APP/Aufgabe4/ps7/core0/src/xttcps_g.c b/src/APP/Aufgabe4/ps7/core0/src/xttcps_g.c new file mode 100644 index 0000000..15658b3 --- /dev/null +++ b/src/APP/Aufgabe4/ps7/core0/src/xttcps_g.c @@ -0,0 +1,111 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ +#include "xparameters_ps.h" +#include "xparameters.h" +#include "xttcps.h" + +/* +* The configuration table for devices +*/ + +XTtcPs_Config XTtcPs_ConfigTable[] = +{ + { + XPAR_PS7_TTC_0_DEVICE_ID, + XPAR_PS7_TTC_0_BASEADDR, + XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ + }, + { + XPAR_PS7_TTC_1_DEVICE_ID, + XPAR_PS7_TTC_1_BASEADDR, + XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ + }, + { + XPAR_PS7_TTC_2_DEVICE_ID, + XPAR_PS7_TTC_2_BASEADDR, + XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ + }//, +// { +// XPAR_PS7_TTC_3_DEVICE_ID, +// XPAR_PS7_TTC_3_BASEADDR, +// XPAR_PS7_TTC_3_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_4_DEVICE_ID, +// XPAR_PS7_TTC_4_BASEADDR, +// XPAR_PS7_TTC_4_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_5_DEVICE_ID, +// XPAR_PS7_TTC_5_BASEADDR, +// XPAR_PS7_TTC_5_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_6_DEVICE_ID, +// XPAR_PS7_TTC_6_BASEADDR, +// XPAR_PS7_TTC_6_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_7_DEVICE_ID, +// XPAR_PS7_TTC_7_BASEADDR, +// XPAR_PS7_TTC_7_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_8_DEVICE_ID, +// XPAR_PS7_TTC_8_BASEADDR, +// XPAR_PS7_TTC_8_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_9_DEVICE_ID, +// XPAR_PS7_TTC_9_BASEADDR, +// XPAR_PS7_TTC_9_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_10_DEVICE_ID, +// XPAR_PS7_TTC_10_BASEADDR, +// XPAR_PS7_TTC_10_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_11_DEVICE_ID, +// XPAR_PS7_TTC_11_BASEADDR, +// XPAR_PS7_TTC_11_TTC_CLK_FREQ_HZ +// } +}; + + diff --git a/src/APP/Aufgabe6/ps7/core0/build/config.mk b/src/APP/Aufgabe6/ps7/core0/build/config.mk new file mode 100644 index 0000000..2135778 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/build/config.mk @@ -0,0 +1,11 @@ +#µController dependent flags +MCFLAGS =-mcpu=cortex-a9 -march=armv7-a -mthumb -mthumb-interwork -mfloat-abi=softfp -mfpu=neon + +#Optimization +OPTIMIZE=-O0 -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections + +#Debug Level +DEBUG =-g3 + +#Linker flags +LDFLAGS = -nostartfiles -Xlinker --gc-sections -lm diff --git a/src/APP/Aufgabe6/ps7/core0/build/includes.mk b/src/APP/Aufgabe6/ps7/core0/build/includes.mk new file mode 100644 index 0000000..3f9b143 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/build/includes.mk @@ -0,0 +1,52 @@ + +INC += -I"$(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/cfg/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ipi" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_ttcps/src" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common" + +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/" +INC += -I"$(SRC_DIR)/Modules/MMU" + + +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/" + +#scugic.h fix +INC += -I"$(SRC_DIR)/Xilinx/libsrc/scugic_v3_9/src/" + +#uart includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/uartps_v3_6/src/" + +#xttcps includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/" + + +#gpio includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/" + +#I2C includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/" + +#task set includes +INC += -I"$(SRC_DIR)/Modules/genericTaskset/if" + diff --git a/src/APP/Aufgabe6/ps7/core0/build/sources.mk b/src/APP/Aufgabe6/ps7/core0/build/sources.mk new file mode 100644 index 0000000..8774813 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/build/sources.mk @@ -0,0 +1,83 @@ +#Startup file +SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/asm_vectors.S +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/subdir.mk +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/subdir.mk + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_osii/src/bsp/$(ARCH)/ucos_osii_bsp.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_common/src/$(ARCH)/cpu_bsp.c + + + +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/main.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/app_hooks.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/uartps_cfg.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/gt_tasks.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xttcps_g.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xgpiops_g.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xiicps_g.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/GNU/cpu_cache_armv7_generic_l1_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/cpu_cache_armv7_generic_l1.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/cpu_core.c +#SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.c +#SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_math.c + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.c + +-include $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-II/kal.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Collections/slist.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Auth/auth.c + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/subdir.mk + +#mmu +SRC += $(SRC_DIR)/Modules/MMU/mmu.c + + +#src for triple timer counter +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_options.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_sinit.c + +#src for GPIO +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_hw.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_intr.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_sinit.c + +#src for I2C +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_hw.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_intr.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_master.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_options.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_sinit.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_slave.c + +#src for task set sim +SRC +=$(SRC_DIR)/Modules/genericTaskset/src/gt_core.c +SRC +=$(SRC_DIR)/Modules/genericTaskset/hw/gt_xilTtcPs.c + +#interrupts +SRC +=$(SRC_DIR)/Xilinx/libsrc/scugic_v3_9/src/xscugic.c + + diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/app_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/app_cfg.h new file mode 100644 index 0000000..c5426f0 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/app_cfg.h @@ -0,0 +1,82 @@ +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* This BSP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* Filename : app_cfg.h +* Version : V1.42 +* Programmer(s) : JBL +********************************************************************************************************* +*/ + +#ifndef UCOS_APP_CFG_PRESENT +#define UCOS_APP_CFG_PRESENT + +#include + +#include + +#define APP_CPU_ENABLED DEF_ENABLED + +#define APP_LIB_ENABLED DEF_ENABLED + +#define APP_COMMON_ENABLED DEF_ENABLED + +#define APP_SHELL_ENABLED DEF_DISABLED + +#define APP_CLK_ENABLED DEF_DISABLED + +#define APP_OSIII_ENABLED DEF_DISABLED + +#define APP_OSII_ENABLED DEF_ENABLED + +#define APP_TCPIP_ENABLED DEF_DISABLED + +#define APP_TCPIP_EXP_ENABLED DEF_DISABLED + +#define APP_DHCPC_ENABLED DEF_DISABLED + +#define APP_DNSC_ENABLED DEF_DISABLED + +#define APP_HTTPC_ENABLED DEF_DISABLED + +#define APP_MQTTC_ENABLED DEF_DISABLED + +#define APP_TELNETS_ENABLED DEF_DISABLED + +#define APP_IPERF_ENABLED DEF_DISABLED + +#define APP_FS_ENABLED DEF_DISABLED + +#define APP_USBD_ENABLED DEF_DISABLED + +#define APP_USBH_ENABLED DEF_DISABLED + +#define APP_OPENAMP_ENABLED DEF_DISABLED + +#define OS_TASK_TMR_PRIO 3 + + +#endif /* #ifndef UCOS_APP_CFG_PRESENT */ + diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/can_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/can_cfg.h new file mode 100644 index 0000000..e2d25db --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/can_cfg.h @@ -0,0 +1,202 @@ +/* +********************************************************************************************************* +* uC/CAN +* The Embedded CAN suite +* +* (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CAN is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* uC/CAN CONFIGURATION +* +* ZYNQ ZC7000 Series +* CAN DRIVER +* Filename : can_cfg.h +* Version : V2.41.00 +* Programmer(s) : E0 +* DC +********************************************************************************************************* +*/ + +#ifndef _CAN_CFG_H_ +#define _CAN_CFG_H_ + +#include "lib_def.h" + + +/* +********************************************************************************************************* +* COMMON DEFINES & ENUMERATIONS +********************************************************************************************************* +*/ + + /* Definiton for CANSIG_GRANULARITY, Options: */ +#define CAN_CFG_BIT 0u /* BIT */ +#define CAN_CFG_BYTE 1u /* BYTE */ + +#ifndef CAN_FALSE +#define CAN_FALSE 0u +#endif + +#ifndef CAN_TRUE +#define CAN_TRUE 1u +#endif + +#ifndef NULL_PTR +#define NULL_PTR (void *)0 +#endif + + /* ------------ APPLICATION ENUMERATIONS -------------- */ +enum { + S_NODESTATUS = 0, + S_CPULOAD, + S_COUNTER, + S_MAX, +}; + +enum { + M_STATUS = 0, + M_COMMAND, + M_MAX +}; + + +/* +********************************************************************************************************* +* MULTIPLE CAN CONTROLLERS +********************************************************************************************************* +*/ + +#define CAN_MODULE_CHANNEL_0 DEF_ENABLED +#define CAN_MODULE_CHANNEL_1 DEF_DISABLED + + +/* +********************************************************************************************************* +* DRIVER SPECIFIC DEFINES +********************************************************************************************************* +*/ + /* ---------------- BAUDRATE SETTINGS ----------------- */ +#define CAN_DEFAULT_BAUDRATE 1000000u /* Default Baudrate */ +#define CAN_DEFAULT_SP 750u /* Default Bit Sample Point in 1/10 % */ +#define CAN_DEFAULT_RJW 125u /* Default Re-Synch Jump Width in 1/10 % */ + + /* ---------------- TIMEOUT SETTINGS ------------------ */ +#define CAN_TIMEOUT_ERR_VAL 100000uL /* Timeout Value for While Loop Error Checks */ + + +/* ================================== ADVANCED DRIVER CONFIGURATION: DEFAULT VALUES ================================== */ +/* By Default, the following Driver specific settings for the ZYNQ ZC7xxx Driver are set to their default values */ +/* unless they are modified by customer needs. */ +/* */ +/* By Default, the Watermark level is configured to Maximum Watermark Value in the Driver, based on the reset value */ +/* presented by the Reference Manual. Redefine the following define to modify the Watermark Level for the following. */ +/* Tx FIFO Empty & Rx FIFO Full Watermark Level(s): */ +/* NOTE : The VALID range is between 1 & 63. */ +/* */ +/* #define CAN_WATERMARK_Rx_Tx_SIZE 63u */ +/* */ +/* By Default, the Operating Mode of the CAN controller is configured to "NORMAL" Mode. For diagnostic checking, */ +/* additional operating modes have been included in the driver. Redefine the following define to modify the Operating */ +/* Mode to either "LOOP BACK" or "SNOOP" Mode(s). */ +/* NOTE that only one operating mode can be selected at once at Initialization. Once CAN has been Initialized it */ +/* is possible to change between Operating Modes at run-time using the xxx_CAN_IoCtl() API Function call. */ +/* */ +/* #define CAN_DIAGNOSTIC_OFF 0u */ +/* #define CAN_DIAGNOSTIC_LOOPBACK 1u */ +/* #define CAN_DIAGNOSTIC_SNOOP 2u */ +/* */ +/* #define CAN_DIAGNOSTIC_SELECT CAN_DIAGNOSTIC_LOOPBACK */ +/* */ +/* ==================================================================================================================== */ + + +/* +********************************************************************************************************* +* CAN BUS +********************************************************************************************************* +*/ + +#define CANBUS_EN 1u /* Enable CAN Bus Management */ +#define CANBUS_N 3u /* Number of busses */ +#define CANBUS_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANBUS_TX_HANDLER_EN 1u /* Enable usage of CanBusTxHandler */ +#define CANBUS_RX_HANDLER_EN 1u /* Enable usage of CanBusRxHandler */ +#define CANBUS_NS_HANDLER_EN 1u /* Enable usage of CanBusNsHandler */ + +#define CANBUS_STAT_EN 1u /* Enable Bus Statistics */ +#define CANBUS_TX_QSIZE (2u * CANBUS_N) /* Transmit Queue Size in CAN Frames for each CAN Bus */ +#define CANBUS_RX_QSIZE (2u * CANBUS_N) /* Receive Queue Size in CAN Frames for each CAN Bus */ + +#define CANBUS_HOOK_NS_EN 1u /* Enable Node Status Handler Hook Function */ +#define CANBUS_HOOK_RX_EN 1u /* Enable Rx Handler Hook Function */ +#define CANBUS_RX_READ_ALWAYS_EN 1u /* If enabled the Rx Handler executes a read even.. */ + /* .. when frames can't be allocated */ + + +/* +********************************************************************************************************* +* CAN MESSAGE +********************************************************************************************************* +*/ + +#define CANMSG_EN 1u /* Enable CAN Message Support */ +#define CANMSG_N 2u /* Number of messages */ +#define CANMSG_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN SIGNAL +********************************************************************************************************* +*/ + +#define CANSIG_EN 1u /* Enable CAN Signal Database */ +#define CANSIG_N 3u /* Number of signals */ +#define CANSIG_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANSIG_MAX_WIDTH 4u /* Maximal signal width in byte */ +#define CANSIG_GRANULARITY CAN_CFG_BYTE /* Set signal resolution to byte */ +#define CANSIG_STATIC_CONFIG 1u /* To reduce memory usage, declare static signal table */ +#define CANSIG_USE_DELETE 0u /* To reduce memory usage don't use delete functions */ +#define CANSIG_CALLBACK_EN 0u /* Enable callback functions */ + + +/* +********************************************************************************************************* +* CAN FRAME +********************************************************************************************************* +*/ + +#define CANFRM_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN OS +********************************************************************************************************* +*/ + +#define CANOS_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CONFIGURATION END +********************************************************************************************************* +*/ + +#endif /* #ifndef _CAN_CFG_H_ */ diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/cpu_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/cpu_cfg.h new file mode 100644 index 0000000..b7b42d2 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/cpu_cfg.h @@ -0,0 +1,216 @@ +/* +********************************************************************************************************* +* uC/CPU +* CPU CONFIGURATION & PORT LAYER +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CPU is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CPU CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : cpu_cfg.h +* Version : V1.30.02 +* Programmer(s) : SR +* ITJ +* JBL +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef CPU_CFG_MODULE_PRESENT +#define CPU_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +* CPU NAME CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_NAME_EN to enable/disable CPU host name feature : +* +* (a) CPU host name storage +* (b) CPU host name API functions +* +* (2) Configure CPU_CFG_NAME_SIZE with the desired ASCII string size of the CPU host name, +* including the terminating NULL character. +* +* See also 'cpu_core.h GLOBAL VARIABLES Note #1'. +********************************************************************************************************* +*/ + + /* Configure CPU host name feature (see Note #1) : */ +#define CPU_CFG_NAME_EN DEF_DISABLED + /* DEF_DISABLED CPU host name DISABLED */ + /* DEF_ENABLED CPU host name ENABLED */ + + /* Configure CPU host name ASCII string size ... */ +#define CPU_CFG_NAME_SIZE 16 + + +/* +********************************************************************************************************* +* CPU TIMESTAMP CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_TS_xx_EN to enable/disable CPU timestamp features : +* +* (a) CPU_CFG_TS_32_EN enable/disable 32-bit CPU timestamp feature +* (b) CPU_CFG_TS_64_EN enable/disable 64-bit CPU timestamp feature +* +* (2) (a) Configure CPU_CFG_TS_TMR_SIZE with the CPU timestamp timer's word size : +* +* CPU_WORD_SIZE_08 8-bit word size +* CPU_WORD_SIZE_16 16-bit word size +* CPU_WORD_SIZE_32 32-bit word size +* CPU_WORD_SIZE_64 64-bit word size +* +* (b) If the size of the CPU timestamp timer is not a binary multiple of 8-bit octets +* (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple octet word +* size SHOULD be configured (e.g. to 16-bits). However, the minimum supported word +* size for CPU timestamp timers is 8-bits. +* +* See also 'cpu_core.h FUNCTION PROTOTYPES CPU_TS_TmrRd() Note #2a'. +********************************************************************************************************* +*/ + + /* Configure CPU timestamp features (see Note #1) : */ +#define CPU_CFG_TS_32_EN DEF_ENABLED +#define CPU_CFG_TS_64_EN DEF_ENABLED + /* DEF_DISABLED CPU timestamps DISABLED */ + /* DEF_ENABLED CPU timestamps ENABLED */ + + /* Configure CPU timestamp timer word size ... */ + /* ... (see Note #2) : */ +#define CPU_CFG_TS_TMR_SIZE CPU_WORD_SIZE_64 + + +/* +********************************************************************************************************* +* CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_INT_DIS_MEAS_EN to enable/disable measuring CPU's interrupts +* disabled time : +* +* (a) Enabled, if CPU_CFG_INT_DIS_MEAS_EN #define'd in 'cpu_cfg.h' +* +* (b) Disabled, if CPU_CFG_INT_DIS_MEAS_EN NOT #define'd in 'cpu_cfg.h' +* +* See also 'cpu_core.h FUNCTION PROTOTYPES Note #1'. +* +* (b) Configure CPU_CFG_INT_DIS_MEAS_OVRHD_NBR with the number of times to measure & +* average the interrupts disabled time measurements overhead. +* +* See also 'cpu_core.c CPU_IntDisMeasInit() Note #3a'. +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU interrupts disabled time ... */ +#define CPU_CFG_INT_DIS_MEAS_EN /* ... measurements feature (see Note #1a). */ +#endif + + /* Configure number of interrupts disabled overhead ... */ +#define CPU_CFG_INT_DIS_MEAS_OVRHD_NBR 1u /* ... time measurements (see Note #1b). */ + + +/* +********************************************************************************************************* +* CPU COUNT ZEROS CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT to define count leading zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +* +* (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU count leading zeros bits ... */ +#define CPU_CFG_LEAD_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1a). */ +#endif + +#if 0 /* Configure CPU count trailing zeros bits ... */ +#define CPU_CFG_TRAIL_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1b). */ +#endif + + +/* +********************************************************************************************************* +* CPU ENDIAN TYPE OVERRIDE +* +* Note(s) : (1) Configure CPU_CFG_ENDIAN_TYPE to override the default CPU endian type defined in cpu.h. +* +* (a) CPU_ENDIAN_TYPE_BIG Big- endian word order (CPU words' most significant +* octet @ lowest memory address) +* (b) CPU_ENDIAN_TYPE_LITTLE Little-endian word order (CPU words' least significant +* octet @ lowest memory address) +* +* (2) Defining CPU_CFG_ENDIAN_TYPE here is only valid for supported bi-endian architectures. +* See 'cpu.h CPU WORD CONFIGURATION Note #3' for details +********************************************************************************************************* +*/ + +#if 0 +#define CPU_CFG_ENDIAN_TYPE CPU_ENDIAN_TYPE_BIG /* Defines CPU data word-memory order (see Note #2). */ +#endif + + +/* +********************************************************************************************************* +* CACHE MANAGEMENT +* +* Note(s) : (1) Configure CPU_CFG_CACHE_MGMT_EN to enable the cache managment API. + +* +* (2) Defining CPU_CFG_CACHE_MGMT_EN to DEF_ENABLED only enable the cache management function. +* Cache are assumed to be configured and enabled by the time CPU_init() is called. +********************************************************************************************************* +*/ + +#define CPU_CFG_CACHE_MGMT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of CPU cfg module include. */ + +#define CPU_CACHE_CFG_L2C310_BASE_ADDR 0xF8F02000 diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/dhcp-c_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/dhcp-c_cfg.h new file mode 100644 index 0000000..911724f --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/dhcp-c_cfg.h @@ -0,0 +1,146 @@ +/* +********************************************************************************************************* +* uC/DHCPc +* Dynamic Host Configuration Protocol Client +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DHCP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DHCP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dhcp-c_cfg.h +* Version : V2.10.00 +* Programmer(s) : SR +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* TASKS PRIORITIES +* Notes: (1) Task priorities configuration values should be used by the DHCPc OS port. The following task priorities +* should be defined: +* +* DHCPc_OS_CFG_TASK_PRIO +* DHCPc_OS_CFG_TMR_TASK_PRIO +* +* Task priorities can be defined either in this configuration file 'dhcp-c_cfg.h' or in a global +* OS tasks priorities configuration header file which must be included in 'dhcp-c_cfg.h'. +********************************************************************************************************* +*/ + + /* See Note #1. */ +#define DHCPc_OS_CFG_TASK_PRIO 13 +#define DHCPc_OS_CFG_TMR_TASK_PRIO 14 + + +/* +********************************************************************************************************* +* STACK SIZES +* Size (depth) of the task stacks (See the definition of CPU_STK for stack width) +********************************************************************************************************* +*/ + +#define DHCPc_OS_CFG_TASK_STK_SIZE 512 +#define DHCPc_OS_CFG_TMR_TASK_STK_SIZE 256 + + +/* +********************************************************************************************************* +* DHCPc +* +* Note(s) : (1) Default port for DHCP server is 67, and default port for DHCP client is 68. +* +* (3) Configure DHCPc_CFG_MAX_NBR_IF to the maximum number of interface this DHCP client will +* be able to manage at a given time. +* +* (4) Once the DHCP server has assigned the client an address, the later may perform a final +* check prior to use this address in order to make sure it is not being used by another +* host on the network. +********************************************************************************************************* +*/ + +#define DHCPc_CFG_IP_PORT_SERVER 67 +#define DHCPc_CFG_IP_PORT_CLIENT 68 + +#define DHCPc_CFG_MAX_RX_TIMEOUT_MS 1000 + +#define DHCPc_CFG_PARAM_REQ_TBL_SIZE 5 + +#define DHCPc_CFG_MAX_NBR_IF 1 + +#define DHCPc_CFG_ADDR_VALIDATE_EN DEF_ENABLED + /* ... (see Note #4) : */ + /* DEF_DISABLED Validation NOT performed */ + /* DEF_ENABLED Validation performed */ + +#define DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN DEF_ENABLED + /* DEF_DISABLED local-link configuration DISABLED */ + /* DEF_ENABLED local-link configuration ENABLED */ + +#define DHCPc_CFG_LOCAL_LINK_MAX_RETRY 3 + /* link-local address. */ + + +/* +********************************************************************************************************* +* DHCPc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DHCPc_CFG_ARG_CHK_EXT_EN to enable/disable the DHCP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure DHCPc_CFG_ARG_CHK_DBG_EN to enable/disable the DHCP client internal debug +* argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the DHCP client. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the DHCP client. +* +* (3) Configure DHCPc_DBG_CFG_MEM_CLR_EN to enable/disable the DHCP client from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define DHCPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define DHCPc_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure memory clear feature (see Note #3) : */ +#define DHCPc_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/dns-c_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/dns-c_cfg.h new file mode 100644 index 0000000..2756762 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/dns-c_cfg.h @@ -0,0 +1,111 @@ +/* +********************************************************************************************************* +* uC/DNSc +* Domain Name Server (client) +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DNSc is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DNS CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dns-c_cfg.h +* Version : V2.00.01 +* Programmer(s) : AA +********************************************************************************************************* +*/ + +#ifndef DNSc_CFG_MODULE_PRESENT +#define DNSc_CFG_MODULE_PRESENT + +#include + + +/* +********************************************************************************************************* +* DNSc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_ARG_CHK_EXT_EN to enable/disable the DNS client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* See Note 1. */ +#define DNSc_CFG_ARG_CHK_EXT_EN DEF_DISABLED + /* DEF_DISABLED External argument check DISABLED */ + /* DEF_ENABLED External argument check ENABLED */ + +/* +********************************************************************************************************* +* DNSc FEATURES CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_MODE_ASYNC_EN to enable/disable the DNS client asynchronous communication mode: +* +* (a) When ENABLED, A dedicated task will handle all host resolution request. It will be possible to +* call DNS API to get remote host address without blocking. +* +* (b) When DISABLED, The API to get remote host will always block until the resolution is completed. +* +* (2) Configure DNSc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the asynchronous +* communication is enabled. +* +* (a) When ENABLED, It will be possible to block when calling the DNS API to get remote host until the +* resolution is completed (via a flag option). +* +* (b) When DISABLED, The API to get remote host will always be non-blocking, must poll DNS client to +* know when the resolution is completed. +********************************************************************************************************* +*/ + + /* Configure asynchronous mode feature, See Note #1 ... */ +#define DNSc_CFG_MODE_ASYNC_EN DEF_DISABLED + /* DEF_DISABLED Asynchronous mode DISABLED */ + /* DEF_ENABLED Asynchronous mode ENABLED */ + + + /* Configure blocking option feature, See Note #2 ... */ +#define DNSc_CFG_MODE_BLOCK_EN DEF_DISABLED + /* DEF_DISABLED Blocking option DISABLED */ + /* DEF_ENABLED Blocking option ENABLED */ + +/* +********************************************************************************************************* +* DNSc RUN-TIME STRUCTURE CONFIGURATION +* +* Note(s) : (1) These structures should be defined into a 'C' file. +********************************************************************************************************* +*/ + +extern const DNSc_CFG DNSc_Cfg; /* Must always be defined. */ + +#if (DNSc_CFG_MODE_ASYNC_EN == DEF_ENABLED) +extern const DNSc_CFG_TASK DNSc_CfgTask; /* Not required when Asynchronous mode is disabled. */ +#endif + +#endif diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/gt_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/gt_cfg.h new file mode 100644 index 0000000..7441358 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/gt_cfg.h @@ -0,0 +1,23 @@ +/* + * gt_cfg.h + * + * Created on: Aug 19, 2014 + * Author: matthiasb + */ + +#ifndef GT_CFG_H_ +#define GT_CFG_H_ + +#define GT_USE_NP_REGIONS 1 +#define GT_USE_NP_MEAS 1 +#define GT_NUM_OF_TASKS 5 +#define GT_REPORT_CONSOLE 0 +#define GT_REPORT_SVC 0 + +#define GT_TTC_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define GT_TTC_PWM_INTR_ID XPAR_XTTCPS_2_INTR +#define GT_TIMER_TICKS_PER_SEC 10000 + +#include "gt_core_cfg.h" + +#endif /* GT_CFG_H_ */ diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/gt_core_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/gt_core_cfg.h new file mode 100644 index 0000000..3d1a566 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/gt_core_cfg.h @@ -0,0 +1,24 @@ +/* + * gt_core_cfg.h + * + * Created on: Aug 19, 2014 + * Author: matthiasb + */ + +#ifndef GT_CORE_CFG_H_ +#define GT_CORE_CFG_H_ + +#define GT_USE_CPU_ARM9 0 +#define GT_USE_CPU_CM3 0 +#define GT_USE_CPU_CM7 0 +#define GT_USE_CPU_ARM_V7_A 1 + +#define GT_STACKSIZE 256 +#define GT_MAXTASKS 10 +#define GT_MAXQACT 5 + +#if ( GT_NUM_OF_TASKS > GT_MAXTASKS ) +#error "Too many tasks, increase GT_MAXTASKS or decrease GT_NUM_OF_TASKS" +#endif + +#endif /* GT_CORE_CFG_H_ */ diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/http-c_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/http-c_cfg.h new file mode 100644 index 0000000..26df728 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/http-c_cfg.h @@ -0,0 +1,224 @@ +/* +********************************************************************************************************* +* uC/HTTP +* Hypertext Transfer Protocol +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/HTTP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* HTTP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : http-c_cfg.h +* Version : V3.00.01 +* Programmer(s) : MM +* AL +********************************************************************************************************* +* Note(s) : (1) Assumes the following versions (or more recent) of software modules are included in +* the project build : +* +* (a) uC/CPU V1.29.02 +* (b) uC/LIB V1.38.00 +* (c) uC/Common V1.00.00 +* (d) uC/TCP-IP V3.03.00 +* +* +* (2) For additional details on the features available with uC/HTTPc, the API, the +* installation, etc. Please refer to the uC/HTTPc documentation available at +* https://doc.micrium.com/HTTPc. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef HTTPc_CFG_MODULE_PRESENT +#define HTTPc_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* COMPILE-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* HTTP ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_ARG_CHK_EXT_EN to enable/disable the HTTP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT TASK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_MODE_ASYNC_TASK_EN to enable/disable HTTP client task. +* (a) DEF_DISABLED : No HTTP client task will be created to process the HTTP requests. +* The Blocking HTTPc API will be enabled. +* +* (b) DEF_ENABLED : An HTTP client task will be created to process all the HTTP requests. +* The Non-Blocking HTTPc API will be enabled. Therefore, multiple +* connections can be handle by the task simultaneously. +* +* (2) Configure HTTPc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the +* asynchronous HTTPc Task is enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_MODE_ASYNC_TASK_EN DEF_DISABLED + +#define HTTPc_CFG_MODE_BLOCK_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT PERSISTENT CONNECTION CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_PERSISTENT_EN to enable/disable Persistent Connection support. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_PERSISTENT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT CHUNKED TRANSFER CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_CHUNK_TX_EN to enable/disable Chunked Transfer support in Transmission. +* +* (2) Chunked Transfer in Reception is always enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_CHUNK_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT QUERY STRING CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_QUERY_STR_EN to enable/disable Query String support in URL. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_QUERY_STR_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT HEADER FIELD CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_HDR_RX_EN to enable/disable header field processing in reception +* (i.e for headers received in the HTTP response. +* +* (2) Configure HTTPc_CFG_HDR_TX_EN to enable/disable header field processing in transmission +* (i.e for headers to include in the HTTP request. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_HDR_RX_EN DEF_ENABLED + + +#define HTTPc_CFG_HDR_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT FORM CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_FORM_EN to enable/disable HTTP form creation source code. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_FORM_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT USER DATA CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_USER_DATA_EN to enable/disable user data pointer in HTTPc_CONN +* and HTTPc_REQ structure. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_USER_DATA_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT WEBSOCKET CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_WEBSOCKET_EN to enable/disable the Websocket feature. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_WEBSOCKET_EN DEF_DISABLED + + +/* +********************************************************************************************************* +********************************************************************************************************* +* RUN-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const HTTP_TASK_CFG HTTPc_TaskCfg; +extern const HTTPc_CFG HTTPc_Cfg; + + +/* =============================================== END =============================================== */ +#endif /* HTTPc_CFG_MODULE_PRESENT */ diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/imu.h b/src/APP/Aufgabe6/ps7/core0/cfg/imu.h new file mode 100644 index 0000000..a3c2469 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/imu.h @@ -0,0 +1,44 @@ +/* + * imu.h + * + * Created on: Nov 6, 2018 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ + +#include +#include "xiicps.h" +#include "xparameters.h" + + + + +#define MPU9250_AD 0x68 //Adresse d. I²C slaves festlegen +#define GYRO_CONFIG_AD 0x1B //Gyroskop config register +#define ACCEL_CONFIG_1_AD 0x1C //Beschleunigungssensor config reg1 +#define ACCEL_CONFIG_2_AD 0x1D //Beschleunigungssensor config reg1 +#define CONFIG_AD 0x1A //IMU config reg +#define PWR_MGMT_1_AD 0x6B //cloc power management register +#define GYRO_XOUT_H_AD 0x43 //hier das Startregister der Gyroskopdaten +#define ACCEL_XOUT_H_AD 0x3B //startreg Accel Daten + +#define IIC_DEVICE_ID XPAR_XIICPS_1_DEVICE_ID //??? in xparameters.h noch die iic Daten für das Gerät festlegen? +#define IIC_SCLK_RATE 100000 + +int mpu9250_Imu_Init(void *pdata); +uint8_t mpu9250_Iic_Init(); +void mpu9250_Init(void); +uint8_t mpu9250_Write_Reg(uint8_t iic_address, uint8_t data); +int8_t mpu9250_Read_Data(uint8_t iic_address, uint8_t length, u8 RecvBuffer[]); +uint8_t mpu9250_Map_Gyro_Data(int16_t result[]); +uint8_t mpu9250_Map_Acc_Data(int16_t result[]); +uint8_t mpu9250_Read_Status(int16_t result[]); +int mpu9250_Get_Data_Task(void *pdata); + + + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ */ + + diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/intr_timer.h b/src/APP/Aufgabe6/ps7/core0/cfg/intr_timer.h new file mode 100644 index 0000000..b7a4302 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/intr_timer.h @@ -0,0 +1,58 @@ +/* + * intr_timer.h + * + * Created on: Nov 13, 2018 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE3_PS7_CORE0_CFG_INTR_TIMER_H_ +/************************** Constant Definitions *****************************/ + +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are only defined here such that a user can easily + * change all the needed parameters in one place. + */ +#define TTC_TICK_DEVICE_ID XPAR_XTTCPS_1_DEVICE_ID +#define TTC_TICK_INTR_ID XPAR_XTTCPS_1_INTR + +#define TTC_PWM_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID +#define TTC_PWM_INTR_ID XPAR_XTTCPS_0_INTR +#define TTCPS_CLOCK_HZ XPAR_XTTCPS_0_CLOCK_HZ + +#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID + +/* + * Constants to set the basic operating parameters. + * PWM_DELTA_DUTY is critical to the running time of the test. Smaller values + * make the test run longer. + */ +#define TICK_TIMER_FREQ_HZ 100 /* Tick timer counter's output frequency */ +#define PWM_OUT_FREQ 350 /* PWM timer counter's output frequency */ + +#define PWM_DELTA_DUTY 50 /* Initial and increment to duty cycle for PWM */ +#define TICKS_PER_CHANGE_PERIOD TICK_TIMER_FREQ_HZ * 5 /* Tick signals PWM */ + + + +/************************** Function Prototypes ******************************/ + +static int TmrInterruptExample(void); /* Main test */ + +/* Set up routines for timer counters */ +static int SetupTicker(void); +static int SetupPWM(void); +static int SetupTimer(int DeviceID); + +/* Interleaved interrupt test for both timer counters */ +static int WaitForDutyCycleFull(void); + +static int SetupInterruptSystem(u16 IntcDeviceID, XScuGic *IntcInstancePtr); + +static void TickHandler(void *CallBackRef); +static void PWMHandler(void *CallBackRef); + + + + +#endif /* SRC_APP_AUFGABE3_PS7_CORE0_CFG_INTR_TIMER_H_ */ diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/lib_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/lib_cfg.h new file mode 100644 index 0000000..cf447ea --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/lib_cfg.h @@ -0,0 +1,171 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find information about uC/LIB by visiting doc.micrium.com. +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CUSTOM LIBRARY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : lib_cfg.h +* Version : V1.38.01.00 +* Programmer(s) : FBJ +* JFD +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef LIB_CFG_MODULE_PRESENT +#define LIB_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MEMORY LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* MEMORY LIBRARY ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_ARG_CHK_EXT_EN to enable/disable the memory library suite external +* argument check feature : +* +* (a) When ENABLED, arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +********************************************************************************************************* +*/ + + /* External argument check. */ + /* Indicates if arguments received from any port ... */ + /* ... interface provided by the developer or ... */ + /* ... application are checked/validated. */ +#define LIB_MEM_CFG_ARG_CHK_EXT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY LIBRARY ASSEMBLY OPTIMIZATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_OPTIMIZE_ASM_EN to enable/disable assembly-optimized memory function(s). +********************************************************************************************************* +*/ + + /* Assembly-optimized function(s). */ + /* Enable/disable assembly-optimized memory ... */ + /* ... function(s). [see Note #1] */ +#define LIB_MEM_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY ALLOCATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_DBG_INFO_EN to enable/disable memory allocation usage tracking +* that associates a name with each segment or dynamic pool allocated. +* +* (2) (a) Configure LIB_MEM_CFG_HEAP_SIZE with the desired size of heap memory (in octets). +* +* (b) Configure LIB_MEM_CFG_HEAP_BASE_ADDR to specify a base address for heap memory : +* +* (1) Heap initialized to specified application memory, if LIB_MEM_CFG_HEAP_BASE_ADDR +* #define'd in 'lib_cfg.h'; +* CANNOT #define to address 0x0 +* +* (2) Heap declared to Mem_Heap[] in 'lib_mem.c', if LIB_MEM_CFG_HEAP_BASE_ADDR +* NOT #define'd in 'lib_cfg.h' +********************************************************************************************************* +*/ + + /* Allocation debugging information. */ + /* Enable/disable allocation of debug information ... */ + /* ... associated to each memory allocation. */ +#define LIB_MEM_CFG_DBG_INFO_EN DEF_DISABLED + + + /* Heap memory size (in bytes). */ + /* Configure the desired size of the heap memory. ... */ + /* ... Set to 0 to disable heap allocation features. */ +#define LIB_MEM_CFG_HEAP_SIZE 64*1024 + + + /* Heap memory padding alignment (in bytes). */ + /* Configure the desired size of padding alignment ... */ + /* ... of each buffer allocated from the heap. */ +#define LIB_MEM_CFG_HEAP_PADDING_ALIGN LIB_MEM_PADDING_ALIGN_NONE + +#if 0 /* Remove this to have heap alloc at specified addr. */ +#define LIB_MEM_CFG_HEAP_BASE_ADDR 0 +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* STRING LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* STRING FLOATING POINT CONFIGURATION +* +* Note(s) : (1) Configure LIB_STR_CFG_FP_EN to enable/disable floating point string function(s). +* +* (2) Configure LIB_STR_CFG_FP_MAX_NBR_DIG_SIG to configure the maximum number of significant +* digits to calculate &/or display for floating point string function(s). +* +* See also 'lib_str.h STRING FLOATING POINT DEFINES Note #1'. +********************************************************************************************************* +*/ + + /* Floating point feature(s). */ + /* Enable/disable floating point to string functions. */ +#define LIB_STR_CFG_FP_EN DEF_DISABLED + + + /* Floating point number of significant digits. */ + /* Configure the maximum number of significant ... */ + /* ... digits to calculate &/or display for ... */ + /* ... floating point string function(s). */ +#define LIB_STR_CFG_FP_MAX_NBR_DIG_SIG LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of lib cfg module include. */ + diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/mmu_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/mmu_cfg.h new file mode 100644 index 0000000..4dda478 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/mmu_cfg.h @@ -0,0 +1,42 @@ +/* + * mmu_cfg.h + * + * Created on: 25.04.2018 + * Author: kaige + */ + +#ifndef SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ +#define SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ + +#include "mmu.h" + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief FIRST LEVEL TRANSLATION TABLE (FTT) +* +* \ingroup PAR_CPU_MMU +* +* This variable represents the first level translation table. Each entry within +* the table represents the configuration of a 1MB memory segment. If a memory +* portion below 1MB must be accessed, the entry represents a pointer to the +* linked coarse page table, which contains the information of that 1MB in detail. +* +* \note This table MUST be aligned at 16kB boundary. +*/ +/*------------------------------------------------------------------------------------------------*/ + +const PAR_MEM_REGION_T PARMemTbl_Core[] = { +/* +-------------------------------------------------------------------------------------------+ +* | virtual | physical | size | owner | permissions | HID Field | +* +-----------+-----------+---------------+------------------+-----------------+--------------+*/ + // First 1MB is marked as non-cacheable/non-bufferable (contains 3x 64KB SRAM @ address 0x00000000 + { 0x00000000, 0x00000000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER_CB | PAR_HID_CACHE_OUTER_CB }, + // DDR Memory is marked as normal (only 512MB for now) + { 0x00100000, 0x00100000, MMU_SIZE_16MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER___ | PAR_HID_CACHE_OUTER___ }, + // Device section + { 0xE0000000, 0xE0000000, MMU_SIZE_512MB-MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_EXCLUSIVE_SYS_DEVICE }, + // Upper 1MB section contains 1x 64KB SRAM @ address 0xFFFF0000 + { 0xFFF00000, 0xFFF00000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_OUT_IN_NON_CACHABLE } +}; + +#endif /* SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ */ diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/net_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/net_cfg.h new file mode 100644 index 0000000..ee42e1f --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/net_cfg.h @@ -0,0 +1,676 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_cfg.h +* Version : V3.03.01 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_CFG_MODULE_PRESENT +#define NET_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK EXTERNAL APPLICATION CONFIGURATION +* +* Note(s) : (1) When uC/DNS-Client is present in the project some high level functions can resolve hostname. +* So uC/TCPIP should know that uC/DNS-Client is present to call the proper API. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure DNS Client feature (see Note #1) : */ +#define NET_EXT_MODULE_CFG_DNS_EN DEF_ENABLED + /* DEF_DISABLED DNS Client is DISABLED */ + /* DEF_ENABLED DNS Client is ENABLED */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS CONFIGURATION +* +* Note(s) : (1) (a) Each network task maps to a unique, developer-configured task configuration that +* MUST be defined in application files, typically 'net_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to Net_Init(). +* +* (b) Since these task configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const NET_TASK_CFG NetRxTaskCfg; +extern const NET_TASK_CFG NetTxDeallocTaskCfg; +extern const NET_TASK_CFG NetTmrTaskCfg; + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS Q CONFIGURATION +* +* Note(s) : (1) Rx queue size should be configured such that it reflects the total number of DMA receive descriptors on all +* devices. If DMA is not available, or a combination of DMA and I/O based interfaces are configured then this +* number reflects the maximum number of packets that can be acknowledged and signalled during a single receive +* interrupt event for all interfaces. +* +* (2) Tx queue size should be defined to be the total number of small and large transmit buffers declared for +* all interfaces. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_CFG_IF_RX_Q_SIZE 100 +#define NET_CFG_IF_TX_DEALLOC_Q_SIZE 100 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK CONFIGURATION +* +* Note(s) : (1) uC/TCP-IP code may call optimized assembly functions. Optimized assembly files/functions must be included +* in the project to be enabled. Optimized functions are located in files under folders: +* +* $uC-TCPIP/Ports// +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network protocol suite's assembly ... */ + /* ... optimization (see Note #1) : */ +#define NET_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + /* DEF_DISABLED Assembly optimization DISABLED */ + /* DEF_ENABLED Assembly optimization ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEBUG CONFIGURATION +* +* Note(s) : (1) Configure NET_DBG_CFG_MEM_CLR_EN to enable/disable the network protocol suite from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure memory clear feature (see Note #1) : */ +#define NET_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure NET_ERR_CFG_ARG_CHK_EXT_EN to enable/disable the network protocol suite external +* argument check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure NET_ERR_CFG_ARG_CHK_DBG_EN to enable/disable the network protocol suite internal, +* debug argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the network protocol +* suite. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the network protocol +* suite. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define NET_ERR_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define NET_ERR_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK COUNTER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_CTR_CFG_STAT_EN to enable/disable network protocol suite statistics counters. +* +* (2) Configure NET_CTR_CFG_ERR_EN to enable/disable network protocol suite error counters. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure statistics counter feature (see Note #1) : */ +#define NET_CTR_CFG_STAT_EN DEF_DISABLED + /* DEF_DISABLED Stat counters DISABLED */ + /* DEF_ENABLED Stat counters ENABLED */ + + /* Configure error counter feature (see Note #2) : */ +#define NET_CTR_CFG_ERR_EN DEF_DISABLED + /* DEF_DISABLED Error counters DISABLED */ + /* DEF_ENABLED Error counters ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK TIMER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_TMR_CFG_NBR_TMR with the desired number of network TIMER objects. +* +* Timers are required for : +* +* (a) ARP & NDP cache entries +* (b) IP fragment reassembly +* (c) TCP state machine connections +* (d) IF Link status check-up +* +* (2) Configure NET_TMR_CFG_TASK_FREQ to schedule the execution frequency of the network timer +* task -- how often NetTmr_TaskHandler() is scheduled to run per second as implemented in +* NetTmr_Task(). +* +* (a) NET_TMR_CFG_TASK_FREQ MUST NOT be configured as a floating-point frequency. +* +* See also 'net_tmr.h NETWORK TIMER TASK TIME DEFINES Notes #1 & #2' +* & 'net_tmr.c NetTmr_Task() Notes #1 & #2'. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_TMR_CFG_NBR_TMR 100 +#define NET_TMR_CFG_TASK_FREQ 10 + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK INTERFACE LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_IF_CFG_MAX_NBR_IF 1 + + /* Configure specific interface(s) : */ +#define NET_IF_CFG_LOOPBACK_EN DEF_DISABLED + +#define NET_IF_CFG_ETHER_EN DEF_ENABLED + +#define NET_IF_CFG_WIFI_EN DEF_DISABLED + /* DEF_DISABLED Interface type DISABLED */ + /* DEF_ENABLED interface type ENABLED */ + +#define NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* ADDRESS RESOLUTION PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Address resolution protocol ONLY required for IPv4. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_ARP_CFG_CACHE_NBR 3 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NEIGHBOR DISCOVERY PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Neighbor Discovery Protocol ONLY required for IPv6. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_NDP_CFG_CACHE_NBR 5 +#define NET_NDP_CFG_DEST_NBR 5 +#define NET_NDP_CFG_PREFIX_NBR 5 +#define NET_NDP_CFG_ROUTER_NBR 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET PROTOCOL LAYER VERSION CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* IPv4 +********************************************************************************************************* +*/ + /* Configure IPv4. */ +#define NET_IPv4_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv4 disabled. */ + /* DEF_ENABLED IPv4 enabled. */ + + +#define NET_IPv4_CFG_IF_MAX_NBR_ADDR 1 + +/* +********************************************************************************************************* +* IPv6 +********************************************************************************************************* +*/ + + /* Configure IPv6. */ +#define NET_IPv6_CFG_EN DEF_DISABLED + /* DEF_DISABLED IPv6 disabled. */ + /* DEF_ENABLED IPv6 enabled. */ + + /* Configure IPv6 Stateless Address Auto-Configuration. */ +#define NET_IPv6_CFG_ADDR_AUTO_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv6 Auto-Cfg disabled. */ + /* DEF_ENABLED IPv6 Auto-Cfg enabled. */ + + /* Configure IPv6 Duplication Address Detection (DAD). */ +#define NET_IPv6_CFG_DAD_EN DEF_ENABLED + /* DEF_DISABLED IPv6 DAD disabled. */ + /* DEF_ENABLED IPv6 DAD enabled. */ + +#define NET_IPv6_CFG_IF_MAX_NBR_ADDR 2 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET GROUP MANAGEMENT PROTOCOL(MULTICAST) LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure IPv4 multicast support : */ +#define NET_MCAST_CFG_IPv4_RX_EN DEF_ENABLED +#define NET_MCAST_CFG_IPv4_TX_EN DEF_ENABLED + /* DEF_DISABLED Multicast rx or tx disabled. */ + /* DEF_ENABLED Multicast rx or tx enabled. */ + +#define NET_MCAST_CFG_HOST_GRP_NBR_MAX 2 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SOCKET LAYER CONFIGURATION +* +* Note(s) : (1) The maximum accept queue size represents the number of connection that can be queued by +* the stack before being accepted. For a TCP server when a connection is queued, it means +* that the SYN, ACK packet has been sent back, so the remote host can start transmitting +* data once the connection is queued and the stack will queue up all data received until +* the connection is accepted and the data is read. +* +* (2) Receive and transmit queue size MUST be properly configured to optimize performance. +* +* (a) It represents the number of bytes that can be queued by one socket. It's important +* that all socket are not able to queue more data than what the device can hold in its +* buffers. +* +* (b) The size should be also a multiple of the maximum segment size (MSS) to optimize +* performance. UDP MSS is 1470 and TCP MSS is 1460. +* +* (c) RX and TX queue size can be reduce at runtime using socket option API. +* +* (d) Window calculation example: +* +* Number of TCP connection : 2 +* Number of UDP connection : 0 +* Number of RX large buffer : 10 +* Number of TX Large buffer : 6 +* Number of TX small buffer : 2 +* Size of RX large buffer : 1518 +* Size of TX large buffer : 1518 +* Size of TX small buffer : 60 +* +* TCP MSS RX = 1460 +* TCP MSS TX large buffer = 1460 +* TCP MSS TX small buffer = 0 +* +* Maximum receive window = (10 * 1460) = 14600 bytes +* Maximum transmit window = (6 * 1460) + (2 * 0) = 8760 bytes +* +* RX window size per socket = (14600 / 2) = 7300 bytes +* TX window size per socket = (8760 / 2) = 4380 bytes +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_SOCK_CFG_SOCK_NBR_TCP 2 +#define NET_SOCK_CFG_SOCK_NBR_UDP 1 + + /* Configure socket select functionality : */ +#define NET_SOCK_CFG_SEL_EN DEF_ENABLED + /* DEF_DISABLED Socket select DISABLED */ + /* DEF_ENABLED Socket select ENABLED */ + + /* Configure stream-type sockets' accept queue */ +#define NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX 2 + + + /* Configure sockets' buffer sizes in number of octets */ + /* (see Note #2): */ +#define NET_SOCK_CFG_RX_Q_SIZE_OCTET 4096 +#define NET_SOCK_CFG_TX_Q_SIZE_OCTET 4096 + + +/* ================================== ADVANCED SOCKET CONFIGURATION: DEFAULT VALUES ================================== */ +/* By default sockets are set to block. Add the following define to set all sockets as non-blocking. Note that it's */ +/* possible to change socket's blocking mode at runtime using socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_NO_BLOCK_EN DEF_ENABLED */ +/* */ +/* By default random port start at 65000, redefine the following define to modify where random port start: */ +/* */ +/* #define NET_SOCK_DFLT_PORT_NBR_RANDOM_BASE 65000u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeouts. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_TIMEOUT_RX_Q_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS 10000u */ +/* ==================================================================================================================== */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TRANSMISSION CONTROL PROTOCOL LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure TCP support : */ +#define NET_TCP_CFG_EN DEF_ENABLED + /* DEF_DISABLED TCP layer DISABLED */ + /* DEF_ENABLED TCP layer ENABLED */ + +/* ========================================= ADVANCED TCP LAYER CONFIGURATION ========================================= */ +/* By default TCP RX and TX windows are set to equal the socket RX and TX queue sizes. Default values can be changed by */ +/* redefining the following defines. TCP windows must be properly configured to optimize performance (see note about */ +/* Socket TX and RX windows). Note that it's possible to decrease window size at run time using Socket option API. */ +/* */ +/* #define NET_TCP_DFLT_RX_WIN_SIZE_OCTET NET_SOCK_CFG_RX_Q_SIZE_OCTET */ +/* #define NET_TCP_DFLT_TX_WIN_SIZE_OCTET NET_SOCK_CFG_TX_Q_SIZE_OCTET */ +/* */ +/* As shown in the TCP state diagram (see RFC #793), before moving from 'TIME-WAIT' state to 'CLOSED' state a timeout */ +/* (2MSL) must expire. This means that the TCP connection cannot be made available for subsequent TCP connections until */ +/* this timeout. It can be a problem for embedded systems with low resources especially when many TCP connections are */ +/* made in a small period of time since it is possible to run out of free TCP connections quickly. Therefore this */ +/* timeout is set to 0 by default to avoid this kind of problem and the connection is made available as soon as the */ +/* 'TIME-WAIT' state is reached. However, it's possible to set the default MSL timeout to something else by redefining */ +/* the following define. Note that it is possible to change the MSL timeout for a specific TCP connection using Socket */ +/* option API. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC 0u */ +/* */ +/* To avoid leaving a connection in the FIN_WAIT_2 state forever when a connection moves from the 'FIN_WAIT_1' state to */ +/* the FIN_WAIT_2, the TCP connection's timer is set to 15 second, and when it expires the connection is dropped. Thus, */ +/* if the other host doesn't response to the close request, the connection will still be closed after the timeout. */ +/* This default timeout can be change by redefining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC 15u */ +/* */ +/* The number of TCP connections is configured following the number of TCP sockets and the accept queue size when the */ +/* MSL is set to 0 ms. However, since the default MSL can be modified, it might be needed to increase the number of TCP */ +/* connections to establish more connections when waiting for the MSL expiration. It is possible to add more TCP */ +/* connections by defining the following define. */ +/* */ +/* #define NET_TCP_CFG_NBR_CONN 0u */ +/* */ +/* By default an 'ACK' is generated within 500 ms of the arrival of the first unacknowledged packet, as specified in */ +/* RFC #2581, Section 4.2. However it's possible to modify this value by defining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS 500u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeout. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS 1000u */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS 1000u */ +/* ==================================================================================================================== */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* USER DATAGRAM PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Configure NET_UDP_CFG_APP_API_SEL with the desired configuration for demultiplexing +* UDP datagrams to application connections : +* +* NET_UDP_APP_API_SEL_SOCK Demultiplex UDP datagrams to BSD sockets ONLY. +* NET_UDP_APP_API_SEL_APP Demultiplex UDP datagrams to application-specific +* connections ONLY. +* NET_UDP_APP_API_SEL_SOCK_APP Demultiplex UDP datagrams to BSD sockets first; +* if NO socket connection found to demultiplex +* a UDP datagram, demultiplex to application- +* specific connection. +* +* See also 'net_udp.c NetUDP_RxPktDemuxDatagram() Note #1' +* & 'net_udp.c NetUDP_RxPktDemuxAppData() Note #1'. +* +* (2) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally ... discard +* ... [or allow] ... received ... UDP datagrams without checksums". +* +* (b) Configure NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN to enable/disable discarding of UDP +* datagrams received with NO computed check-sum : +* +* (1) When ENABLED, ALL UDP datagrams received without a check-sum are discarded. +* +* (2) When DISABLED, ALL UDP datagrams received without a check-sum are flagged so +* that application(s) may handle &/or discard. +* +* See also 'net_udp.c NetUDP_RxPktValidate() Note #4d3A'. +* +* (3) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally be able to +* control whether a UDP checksum will be generated". +* +* (b) Configure NET_UDP_CFG_TX_CHK_SUM_EN to enable/disable transmitting UDP datagrams +* with check-sums : +* +* (1) When ENABLED, ALL UDP datagrams are transmitted with a computed check-sum. +* +* (2) When DISABLED, ALL UDP datagrams are transmitted without a computed check-sum. +* +* See also 'net_udp.c NetUDP_TxPktPrepareHdr() Note #3b'. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure UDP Receive Check-Sum Discard feature ... */ + /* ... (see Note #2b) : */ +#define NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN DEF_DISABLED + /* DEF_DISABLED UDP Check-Sums Received without ... */ + /* Check-Sums Validated */ + /* DEF_ENABLED UDP Datagrams Received without ... */ + /* Check-Sums Discarded */ + + /* Configure UDP Transmit Check-Sum feature ... */ + /* ... (see Note #3b) : */ +#define NET_UDP_CFG_TX_CHK_SUM_EN DEF_DISABLED + /* DEF_DISABLED Transmit Check-Sums DISABLED */ + /* DEF_ENABLED Transmit Check-Sums ENABLED */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SECURITY MANAGER CONFIGURATION +* +* Note(s): (1) The network security layer can be enabled ONLY if the application project contains a secure module +* supported by uC/TCPIP such as: +* +* (a) NanoSSL provided by Mocana. +* (b) CyaSSL provided by YaSSL. +* +* (2) The network security port must be also added to the project. Security port can be found under the folder: +* +* $uC-TCPIP/Secure/ +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network security layer (See Note #1 & #2): */ +#define NET_SECURE_CFG_EN DEF_DISABLED + /* DEF_DISABLED Security layer DISABLED */ + /* DEF_ENABLED Security layer ENABLED */ + +#define NET_SECURE_CFG_MAX_NBR_SOCK_SERVER 2u /* Configure total number of server secure sockets. */ +#define NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT 2u /* Configure total number of client secure sockets. */ + +#define NET_SECURE_CFG_MAX_CERT_LEN 1500u /* Configure servers certificate maximum length (bytes) */ +#define NET_SECURE_CFG_MAX_KEY_LEN 1500u /* Configure servers key maximum length (bytes) */ + + /* Configure maximum number of certificate authorities */ +#define NET_SECURE_CFG_MAX_NBR_CA 1u /* that can be installed. */ + +#define NET_SECURE_CFG_MAX_CA_CERT_LEN 1500u /* Configure CA certificate maximum length (bytes) */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERFACE CHECKSUM OFFLOAD CONFIGURATION +* +* Note(s): (1) These configuration can be enabled only if all your interfaces support specific checksum offload +* option. +* +* (2) By default a driver should enabled the all checksum offload option. +********************************************************************************************************* +********************************************************************************************************* +*/ +/* ========================================== ADVANCED OFFLOAD CONFIGURATION ========================================== */ +/* By default all checksum are validated by the stack however it is possible to enable or disable specific checksum */ +/* validate and calculation if the interface controller is able to achieve it. You can add the following define in this */ +/* file to change the default behavior. */ +/* */ +/* -------------------------------------------------- IPv4 CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* -------------------------------------------------- ICMP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- UDP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- TCP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* ==================================================================================================================== */ + + +/* ======================================================= END ======================================================== */ +#endif /* NET_CFG_MODULE_PRESENT */ + +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h new file mode 100644 index 0000000..cb76d08 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h @@ -0,0 +1,115 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK DEVICE CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_dev_cfg.h +* Version : V3.00.00 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +* +* Note(s) : (1) This network device configuration header file is protected from multiple pre-processor +* inclusion through use of the network module present pre-processor macro definition. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_DEV_CFG_MODULE_PRESENT /* See Note #1. */ +#define NET_DEV_CFG_MODULE_PRESENT + +#include + +#ifdef NET_IF_ETHER_MODULE_EN +#include +#endif + +#ifdef NET_IF_WIFI_MODULE_EN +#include +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEVICE CONFIGURATION +* +* Note(s) : (1) (a) Each network device maps to a unique, developer-configured device configuration that +* MUST be defined in application files, typically 'net_dev_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to NetIF_Add(). +* +* (b) Since these device configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. However, +* the following naming convention is suggested for all developer-configured network +* device configuration structures : +* +* NetDev_Cfg_[_Number] +* +* where +* Name of device or device driver +* [Number] Network device number for each specific instance of +* device (optional if the development board does NOT +* support multiple instances of the specific device) +* +* Examples : +* +* NET_DEV_CFG_ETHER NetDev_Cfg_MACB; Ethernet configuration for MACB +* +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_0; Ethernet configuration for FEC #0 +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_1; Ethernet configuration for FEC #1 +* +* NET_DEV_CFG_WIFI NetDev_Cfg_RS9110N21_0; Wireless configuration for RS9110-N-21 +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifdef NET_IF_ETHER_MODULE_EN + +extern NET_DEV_CFG_ETHER NetDev_AXIEthernetLite_0; +extern NET_PHY_CFG_ETHER NetPhy_Cfg_Ether_0; + +#endif /* NET_IF_ETHER_MODULE_EN */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +********************************************************************************************************* +*/ + +#endif /* NET_DEV_CFG_MODULE_PRESENT */ + diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/os_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/os_cfg.h new file mode 100644 index 0000000..a25fa55 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/os_cfg.h @@ -0,0 +1,145 @@ +/* +********************************************************************************************************* +* uC/OS-II +* The Real-Time Kernel +* uC/OS-II Configuration File for V2.9x +* +* (c) Copyright 2005-2014, Micrium, Weston, FL +* All Rights Reserved +* +* +* File : OS_CFG.H +* By : Jean J. Labrosse +* Version : V2.92.11 +* +* LICENSING TERMS: +* --------------- +* uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research. +* If you plan on using uC/OS-II in a commercial product you need to contact Micrium to properly license +* its use in your product. We provide ALL the source code for your convenience and to help you experience +* uC/OS-II. The fact that the source is provided does NOT mean that you can use it without paying a +* licensing fee. +********************************************************************************************************* +*/ + +#ifndef OS_CFG_H +#define OS_CFG_H + + + /* ---------------------- MISCELLANEOUS ----------------------- */ +#define OS_APP_HOOKS_EN 1u /* Application-defined hooks are called from the uC/OS-II hooks */ +#define OS_ARG_CHK_EN 0u /* Enable (1) or Disable (0) argument checking */ +#define OS_CPU_HOOKS_EN 1u /* uC/OS-II hooks are found in the processor port files */ + +#define OS_DEBUG_EN 1u /* Enable(1) debug variables */ + +#define OS_EVENT_MULTI_EN 1u /* Include code for OSEventPendMulti() */ +#define OS_EVENT_NAME_EN 1u /* Enable names for Sem, Mutex, Mbox and Q */ + +#define OS_LOWEST_PRIO 63u /* Defines the lowest priority that can be assigned ... */ + /* ... MUST NEVER be higher than 254! */ + +#define OS_MAX_EVENTS 20u /* Max. number of event control blocks in your application */ +#define OS_MAX_FLAGS 5u /* Max. number of Event Flag Groups in your application */ +#define OS_MAX_MEM_PART 5u /* Max. number of memory partitions */ +#define OS_MAX_QS 6u /* Max. number of queue control blocks in your application */ +#define OS_MAX_TASKS 20u /* Max. number of tasks in your application, MUST be >= 2 */ + +#define OS_SCHED_LOCK_EN 1u /* Include code for OSSchedLock() and OSSchedUnlock() */ + +#define OS_TICK_STEP_EN 1u /* Enable tick stepping feature for uC/OS-View */ +#define OS_TICKS_PER_SEC 1000u /* Set the number of ticks in one second */ + +#define OS_TLS_TBL_SIZE 0u /* Size of Thread-Local Storage Table */ + + + /* --------------------- TASK STACK SIZE ---------------------- */ +#define OS_TASK_TMR_STK_SIZE 128u /* Timer task stack size (# of OS_STK wide entries) */ +#define OS_TASK_STAT_STK_SIZE 128u /* Statistics task stack size (# of OS_STK wide entries) */ +#define OS_TASK_IDLE_STK_SIZE 128u /* Idle task stack size (# of OS_STK wide entries) */ + + + /* --------------------- TASK MANAGEMENT ---------------------- */ +#define OS_TASK_CHANGE_PRIO_EN 1u /* Include code for OSTaskChangePrio() */ +#define OS_TASK_CREATE_EN 1u /* Include code for OSTaskCreate() */ +#define OS_TASK_CREATE_EXT_EN 1u /* Include code for OSTaskCreateExt() */ +#define OS_TASK_DEL_EN 1u /* Include code for OSTaskDel() */ +#define OS_TASK_NAME_EN 1u /* Enable task names */ +#define OS_TASK_PROFILE_EN 1u /* Include variables in OS_TCB for profiling */ +#define OS_TASK_QUERY_EN 1u /* Include code for OSTaskQuery() */ +#define OS_TASK_REG_TBL_SIZE 1u /* Size of task variables array (#of INT32U entries) */ +#define OS_TASK_STAT_EN 1u /* Enable (1) or Disable(0) the statistics task */ +#define OS_TASK_STAT_STK_CHK_EN 1u /* Check task stacks from statistic task */ +#define OS_TASK_SUSPEND_EN 1u /* Include code for OSTaskSuspend() and OSTaskResume() */ +#define OS_TASK_SW_HOOK_EN 1u /* Include code for OSTaskSwHook() */ + + + /* ----------------------- EVENT FLAGS ------------------------ */ +#define OS_FLAG_EN 1u /* Enable (1) or Disable (0) code generation for EVENT FLAGS */ +#define OS_FLAG_ACCEPT_EN 1u /* Include code for OSFlagAccept() */ +#define OS_FLAG_DEL_EN 1u /* Include code for OSFlagDel() */ +#define OS_FLAG_NAME_EN 1u /* Enable names for event flag group */ +#define OS_FLAG_QUERY_EN 1u /* Include code for OSFlagQuery() */ +#define OS_FLAG_WAIT_CLR_EN 1u /* Include code for Wait on Clear EVENT FLAGS */ +#define OS_FLAGS_NBITS 16u /* Size in #bits of OS_FLAGS data type (8, 16 or 32) */ + + + /* -------------------- MESSAGE MAILBOXES --------------------- */ +#define OS_MBOX_EN 1u /* Enable (1) or Disable (0) code generation for MAILBOXES */ +#define OS_MBOX_ACCEPT_EN 1u /* Include code for OSMboxAccept() */ +#define OS_MBOX_DEL_EN 1u /* Include code for OSMboxDel() */ +#define OS_MBOX_PEND_ABORT_EN 1u /* Include code for OSMboxPendAbort() */ +#define OS_MBOX_POST_EN 1u /* Include code for OSMboxPost() */ +#define OS_MBOX_POST_OPT_EN 1u /* Include code for OSMboxPostOpt() */ +#define OS_MBOX_QUERY_EN 1u /* Include code for OSMboxQuery() */ + + + /* --------------------- MEMORY MANAGEMENT -------------------- */ +#define OS_MEM_EN 1u /* Enable (1) or Disable (0) code generation for MEMORY MANAGER */ +#define OS_MEM_NAME_EN 1u /* Enable memory partition names */ +#define OS_MEM_QUERY_EN 1u /* Include code for OSMemQuery() */ + + + /* ---------------- MUTUAL EXCLUSION SEMAPHORES --------------- */ +#define OS_MUTEX_EN 1u /* Enable (1) or Disable (0) code generation for MUTEX */ +#define OS_MUTEX_ACCEPT_EN 1u /* Include code for OSMutexAccept() */ +#define OS_MUTEX_DEL_EN 1u /* Include code for OSMutexDel() */ +#define OS_MUTEX_QUERY_EN 1u /* Include code for OSMutexQuery() */ + + + /* ---------------------- MESSAGE QUEUES ---------------------- */ +#define OS_Q_EN 1u /* Enable (1) or Disable (0) code generation for QUEUES */ +#define OS_Q_ACCEPT_EN 1u /* Include code for OSQAccept() */ +#define OS_Q_DEL_EN 1u /* Include code for OSQDel() */ +#define OS_Q_FLUSH_EN 1u /* Include code for OSQFlush() */ +#define OS_Q_PEND_ABORT_EN 1u /* Include code for OSQPendAbort() */ +#define OS_Q_POST_EN 1u /* Include code for OSQPost() */ +#define OS_Q_POST_FRONT_EN 1u /* Include code for OSQPostFront() */ +#define OS_Q_POST_OPT_EN 1u /* Include code for OSQPostOpt() */ +#define OS_Q_QUERY_EN 1u /* Include code for OSQQuery() */ + + + /* ------------------------ SEMAPHORES ------------------------ */ +#define OS_SEM_EN 1u /* Enable (1) or Disable (0) code generation for SEMAPHORES */ +#define OS_SEM_ACCEPT_EN 1u /* Include code for OSSemAccept() */ +#define OS_SEM_DEL_EN 1u /* Include code for OSSemDel() */ +#define OS_SEM_PEND_ABORT_EN 1u /* Include code for OSSemPendAbort() */ +#define OS_SEM_QUERY_EN 1u /* Include code for OSSemQuery() */ +#define OS_SEM_SET_EN 1u /* Include code for OSSemSet() */ + + + /* --------------------- TIME MANAGEMENT ---------------------- */ +#define OS_TIME_DLY_HMSM_EN 1u /* Include code for OSTimeDlyHMSM() */ +#define OS_TIME_DLY_RESUME_EN 1u /* Include code for OSTimeDlyResume() */ +#define OS_TIME_GET_SET_EN 1u /* Include code for OSTimeGet() and OSTimeSet() */ +#define OS_TIME_TICK_HOOK_EN 1u /* Include code for OSTimeTickHook() */ + + + /* --------------------- TIMER MANAGEMENT --------------------- */ +#define OS_TMR_EN 0u /* Enable (1) or Disable (0) code generation for TIMERS */ +#define OS_TMR_CFG_MAX 16u /* Maximum number of timers */ +#define OS_TMR_CFG_NAME_EN 1u /* Determine timer names */ +#define OS_TMR_CFG_WHEEL_SIZE 7u /* Size of timer wheel (#Spokes) */ +#define OS_TMR_CFG_TICKS_PER_SEC 10u /* Rate at which timer management task runs (Hz) */ + +#endif diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/pid.h b/src/APP/Aufgabe6/ps7/core0/cfg/pid.h new file mode 100644 index 0000000..97ce0a0 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/pid.h @@ -0,0 +1,18 @@ +/* + * pid.h + * + * Created on: Jan 28, 2019 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ + +unsigned int pid_Init(void *pdata); +int16_t pid_Constrain(int16_t value, int16_t lowerBorder, int16_t higherBorder); +int pid_Task(void *pdata); +int16_t map(int16_t x, int16_t in_min, int16_t in_max, int16_t out_min, int16_t out_max); + + + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ */ diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/shell_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/shell_cfg.h new file mode 100644 index 0000000..15e41af --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/shell_cfg.h @@ -0,0 +1,96 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell Utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/Shell is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* SHELL UTILITY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : shell_cfg.h +* Version : V1.03.01 +* Programmer(s) : SR +* FBJ +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef SHELL_CFG_H +#define SHELL_CFG_H + + +/* +********************************************************************************************************* +* SHELL +* +* Note(s) : (1) Defines the size of the table used to hold the various modules' command tables. Command +* tables are added using the Shell_CmdTblAdd() function. Once the table is full, it is not +* possible to add any more unless Shell_CmdTblRem() is first called. +* +* (2) Defines the maximum number or argument(s) a command may pass on the string holding the +* complete command. The minimum value is 1. +* +* (3) Defines the maximum length for module command name, including the NULL character. +********************************************************************************************************* +*/ + +#define SHELL_CFG_CMD_TBL_SIZE 3 /* Cfg Shell cmd tbl size (see Note #1). */ +#define SHELL_CFG_CMD_ARG_NBR_MAX 5 /* Cfg cmd max nbr of arg (see Note #2). */ + +#define SHELL_CFG_MODULE_CMD_NAME_LEN_MAX 6 /* Cfg module cmd name len (See Note #3). */ + + +/* +********************************************************************************************************* +* TRACING +********************************************************************************************************* +*/ + +#ifndef TRACE_LEVEL_OFF +#define TRACE_LEVEL_OFF 0u +#endif + +#ifndef TRACE_LEVEL_INFO +#define TRACE_LEVEL_INFO 1u +#endif + +#ifndef TRACE_LEVEL_DBG +#define TRACE_LEVEL_DBG 2u +#endif + +#define SHELL_TRACE_LEVEL TRACE_LEVEL_OFF +#define SHELL_TRACE printf + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif \ No newline at end of file diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/tasks.h b/src/APP/Aufgabe6/ps7/core0/cfg/tasks.h new file mode 100644 index 0000000..3a989b2 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/tasks.h @@ -0,0 +1,20 @@ +/* + * Created on: Nov 6, 2018 + * Author: laurenzb + */ + + +int Task_A(void *pdata); +int task_a_init(void *pdata); + +int Task_B(void *pdata); +int task_b_init(void *pdata); + +int Task_C(void *pdata); +int task_c_init(void *pdata); + +int Task_D(void *pdata); +int task_d_init(void *pdata); + +int Task_E(void *pdata); +int task_e_init(void *pdata); diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/terminal_cfg.h b/src/APP/Aufgabe6/ps7/core0/cfg/terminal_cfg.h new file mode 100644 index 0000000..6d35076 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/terminal_cfg.h @@ -0,0 +1,70 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* Knowledge of the source code may not be used to write a similar +* product. This file may only be used in accordance with a license +* and should not be redistributed in any way. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* TERMINAL +* +* CONFIGURATION TEMPLATE FILE +* +* Filename : terminal_cfg.h +* Version : V1.03.01 +* Programmer(s) : BAN +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* TASKS PRIORITIES +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_PRIO 16u + + +/* +********************************************************************************************************* +* STACK SIZES +* Size of the task stacks (# of OS_STK entries) +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_STK_SIZE 1024u + + +/* +********************************************************************************************************* +* TERMINAL +* +* Note(s) : (1) Defines the maximum length of a command entered on the terminal, in characters. +* +* (2) Defines the maximum path length of the Current Working Directory (CWD). +* +* (3) Enables/disables command history. +* +* (4) Defines the number of items to hold in the command history. +* +* (5) Defines the length of a item in the command history. If a command is entered into the +* terminal that exceeds this length, then only the first characters, up to this number of +* characters, will be copied into the command history. +********************************************************************************************************* +*/ + +#define TERMINAL_CFG_MAX_CMD_LEN 260u /* Cfg max cmd len (see Note #1). */ +#define TERMINAL_CFG_MAX_PATH_LEN 260u /* Cfg max path len (see Note #2). */ + +#define TERMINAL_CFG_HISTORY_EN DEF_ENABLED /* En/dis history (see Note #3). */ +#define TERMINAL_CFG_HISTORY_ITEMS_NBR 16u /* Cfg nbr history items (see Note #4). */ +#define TERMINAL_CFG_HISTORY_ITEM_LEN 64u /* Cfg history item len (see Note #5). */ diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/ttc_timer.h b/src/APP/Aufgabe6/ps7/core0/cfg/ttc_timer.h new file mode 100644 index 0000000..099a14a --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/ttc_timer.h @@ -0,0 +1,32 @@ +/* + * ttc_timer.h + * + * Created on: Nov 13, 2018 + * Author: laurenzb + */ + +#include + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_TTC_TIMER_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_TTC_TIMER_H_ + +//#define INTC_DEVICE_ID XPAR_SCUGIC_0_DEVICE_ID +//#define TTC_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID +//#define TICK_TIMER_FREQ_HZ 100 /* Tick timer counter's output frequency */ +//#define TTC_PWM_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID +// +// +//#define TTC_PWM_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID +//#define TTC_PWM_INTR_ID XPAR_XTTCPS_0_INTR +//#define TTCPS_CLOCK_HZ XPAR_XTTCPS_0_CLOCK_HZ +// +// +//#define TICK_TIMER_FREQ_HZ 100 /* Tick timer counter's output frequency */ +//#define PWM_OUT_FREQ 350 /* PWM timer counter's output frequency */ +// +//#define TICKS_PER_CHANGE_PERIOD TICK_TIMER_FREQ_HZ * 5 /* Tick signals PWM */ + +int timer_Task(void *pdata); +int timer_Init(); + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_TTC_TIMER_H_ */ diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/xparameters.h b/src/APP/Aufgabe6/ps7/core0/cfg/xparameters.h new file mode 100644 index 0000000..bf2c811 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/xparameters.h @@ -0,0 +1,704 @@ +/******************************************************************/ + +/* Definition for CPU ID */ +#define XPAR_CPU_ID 0 + +/* Definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_PS7_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_CPU_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + +/******************************************************************/ + +#undef DEF_DISABLED +#undef DEF_ENABLED +#define DEF_ENABLED 1 +#define DEF_DISABLED 0 + +#include "xparameters_ps.h" + + + +/******************************************************************/ + +/* Definitions for driver BRAM */ +#define XPAR_XBRAM_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_AXI_BRAM_CTRL_0_DEVICE_ID 0 +#define XPAR_AXI_BRAM_CTRL_0_DATA_WIDTH 32 +#define XPAR_AXI_BRAM_CTRL_0_ECC 0 +#define XPAR_AXI_BRAM_CTRL_0_FAULT_INJECT 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_UE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_STATUS_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_COUNTER_WIDTH 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_REGISTER 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_AXI_BRAM_CTRL_0_WRITE_ACCESS 0 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_BASEADDR 0x40000000 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_HIGHADDR 0x40001FFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_BASEADDR 0xFFFFFFFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_HIGHADDR 0xFFFFFFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_BRAM_0_DEVICE_ID XPAR_AXI_BRAM_CTRL_0_DEVICE_ID +#define XPAR_BRAM_0_DATA_WIDTH 32 +#define XPAR_BRAM_0_ECC 0 +#define XPAR_BRAM_0_FAULT_INJECT 0 +#define XPAR_BRAM_0_CE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_UE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_ECC_STATUS_REGISTERS 0 +#define XPAR_BRAM_0_CE_COUNTER_WIDTH 0 +#define XPAR_BRAM_0_ECC_ONOFF_REGISTER 0 +#define XPAR_BRAM_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_BRAM_0_WRITE_ACCESS 0 +#define XPAR_BRAM_0_BASEADDR 0x40000000 +#define XPAR_BRAM_0_HIGHADDR 0x40001FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_DDR_0 */ +#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000 +#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x3FFFFFFF + + +/******************************************************************/ + +/* Definitions for driver DEVCFG */ +#define XPAR_XDCFG_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_PS7_DEV_CFG_0_DEVICE_ID 0 +#define XPAR_PS7_DEV_CFG_0_BASEADDR 0xF8007000 +#define XPAR_PS7_DEV_CFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_XDCFG_0_DEVICE_ID XPAR_PS7_DEV_CFG_0_DEVICE_ID +#define XPAR_XDCFG_0_BASEADDR 0xF8007000 +#define XPAR_XDCFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Definitions for driver DMAPS */ +#define XPAR_XDMAPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_DMA_NS */ +#define XPAR_PS7_DMA_NS_DEVICE_ID 0 +#define XPAR_PS7_DMA_NS_BASEADDR 0xF8004000 +#define XPAR_PS7_DMA_NS_HIGHADDR 0xF8004FFF + + +/* Definitions for peripheral PS7_DMA_S */ +#define XPAR_PS7_DMA_S_DEVICE_ID 1 +#define XPAR_PS7_DMA_S_BASEADDR 0xF8003000 +#define XPAR_PS7_DMA_S_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DMA_NS */ +#define XPAR_XDMAPS_0_DEVICE_ID XPAR_PS7_DMA_NS_DEVICE_ID +#define XPAR_XDMAPS_0_BASEADDR 0xF8004000 +#define XPAR_XDMAPS_0_HIGHADDR 0xF8004FFF + +/* Canonical definitions for peripheral PS7_DMA_S */ +#define XPAR_XDMAPS_1_DEVICE_ID XPAR_PS7_DMA_S_DEVICE_ID +#define XPAR_XDMAPS_1_BASEADDR 0xF8003000 +#define XPAR_XDMAPS_1_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_AFI_0 */ +#define XPAR_PS7_AFI_0_S_AXI_BASEADDR 0xF8008000 +#define XPAR_PS7_AFI_0_S_AXI_HIGHADDR 0xF8008FFF + + +/* Definitions for peripheral PS7_AFI_1 */ +#define XPAR_PS7_AFI_1_S_AXI_BASEADDR 0xF8009000 +#define XPAR_PS7_AFI_1_S_AXI_HIGHADDR 0xF8009FFF + + +/* Definitions for peripheral PS7_AFI_2 */ +#define XPAR_PS7_AFI_2_S_AXI_BASEADDR 0xF800A000 +#define XPAR_PS7_AFI_2_S_AXI_HIGHADDR 0xF800AFFF + + +/* Definitions for peripheral PS7_AFI_3 */ +#define XPAR_PS7_AFI_3_S_AXI_BASEADDR 0xF800B000 +#define XPAR_PS7_AFI_3_S_AXI_HIGHADDR 0xF800BFFF + + +/* Definitions for peripheral PS7_DDRC_0 */ +#define XPAR_PS7_DDRC_0_S_AXI_BASEADDR 0xF8006000 +#define XPAR_PS7_DDRC_0_S_AXI_HIGHADDR 0xF8006FFF + + +/* Definitions for peripheral PS7_GLOBALTIMER_0 */ +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_BASEADDR 0xF8F00200 +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_HIGHADDR 0xF8F002FF + + +/* Definitions for peripheral PS7_GPV_0 */ +#define XPAR_PS7_GPV_0_S_AXI_BASEADDR 0xF8900000 +#define XPAR_PS7_GPV_0_S_AXI_HIGHADDR 0xF89FFFFF + + +/* Definitions for peripheral PS7_INTC_DIST_0 */ +#define XPAR_PS7_INTC_DIST_0_S_AXI_BASEADDR 0xF8F01000 +#define XPAR_PS7_INTC_DIST_0_S_AXI_HIGHADDR 0xF8F01FFF + + +/* Definitions for peripheral PS7_IOP_BUS_CONFIG_0 */ +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_BASEADDR 0xE0200000 +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_HIGHADDR 0xE0200FFF + + +/* Definitions for peripheral PS7_OCMC_0 */ +#define XPAR_PS7_OCMC_0_S_AXI_BASEADDR 0xF800C000 +#define XPAR_PS7_OCMC_0_S_AXI_HIGHADDR 0xF800CFFF + + +/* Definitions for peripheral PS7_PL310_0 */ +#define XPAR_PS7_PL310_0_S_AXI_BASEADDR 0xF8F02000 +#define XPAR_PS7_PL310_0_S_AXI_HIGHADDR 0xF8F02FFF + + +/* Definitions for peripheral PS7_PMU_0 */ +#define XPAR_PS7_PMU_0_S_AXI_BASEADDR 0xF8891000 +#define XPAR_PS7_PMU_0_S_AXI_HIGHADDR 0xF8891FFF +#define XPAR_PS7_PMU_0_PMU1_S_AXI_BASEADDR 0xF8893000 +#define XPAR_PS7_PMU_0_PMU1_S_AXI_HIGHADDR 0xF8893FFF + + +/* Definitions for peripheral PS7_QSPI_LINEAR_0 */ +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_BASEADDR 0xFC000000 +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_HIGHADDR 0xFDFFFFFF + + +/* Definitions for peripheral PS7_RAM_0 */ +#define XPAR_PS7_RAM_0_S_AXI_BASEADDR 0x00000000 +#define XPAR_PS7_RAM_0_S_AXI_HIGHADDR 0x0003FFFF + + +/* Definitions for peripheral PS7_RAM_1 */ +#define XPAR_PS7_RAM_1_S_AXI_BASEADDR 0xFFFC0000 +#define XPAR_PS7_RAM_1_S_AXI_HIGHADDR 0xFFFFFFFF + + +/* Definitions for peripheral PS7_SLCR_0 */ +#define XPAR_PS7_SLCR_0_S_AXI_BASEADDR 0xF8000000 +#define XPAR_PS7_SLCR_0_S_AXI_HIGHADDR 0xF8000FFF + + +/******************************************************************/ + +/* Definitions for driver GPIO */ +#define XPAR_XGPIO_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_GPIO_0 */ +#define XPAR_AXI_GPIO_0_BASEADDR 0x41200000 +#define XPAR_AXI_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_AXI_GPIO_0_DEVICE_ID 0 +#define XPAR_AXI_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_AXI_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_GPIO_0 */ +#define XPAR_GPIO_0_BASEADDR 0x41200000 +#define XPAR_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID +#define XPAR_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +///* Definitions for driver IICPS */ +//#define XPAR_XIICPS_NUM_INSTANCES 1 +// +///* Definitions for peripheral PS7_I2C_0 */ +//#define XPAR_PS7_I2C_0_DEVICE_ID 0 +//#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +//#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +//#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver QSPIPS */ +#define XPAR_XQSPIPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_QSPI_0 */ +#define XPAR_PS7_QSPI_0_DEVICE_ID 0 +#define XPAR_PS7_QSPI_0_BASEADDR 0xE000D000 +#define XPAR_PS7_QSPI_0_HIGHADDR 0xE000DFFF +#define XPAR_PS7_QSPI_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_PS7_QSPI_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_QSPI_0 */ +#define XPAR_XQSPIPS_0_DEVICE_ID XPAR_PS7_QSPI_0_DEVICE_ID +#define XPAR_XQSPIPS_0_BASEADDR 0xE000D000 +#define XPAR_XQSPIPS_0_HIGHADDR 0xE000DFFF +#define XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_XQSPIPS_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Definitions for driver SCUWDT */ +#define XPAR_XSCUWDT_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_PS7_SCUWDT_0_DEVICE_ID 0 +#define XPAR_PS7_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_PS7_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_SCUWDT_0_DEVICE_ID XPAR_PS7_SCUWDT_0_DEVICE_ID +#define XPAR_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Definitions for driver UCOS_EMACPS */ +#define XPAR_UCOS_EMACPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_PS7_ETHERNET_0_DEVICE_ID 0 +#define XPAR_PS7_ETHERNET_0_BASEADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_HIGHADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_UCOS_EMACPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_EMACPS_0_DEVICE_ID XPAR_PS7_ETHERNET_0_DEVICE_ID +#define XPAR_UCOS_EMACPS_0_BASEADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_HIGHADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_L2CACHEC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_L2CACHEC_0 */ +#define XPAR_PS7_L2CACHEC_0_DEVICE_ID 0 +#define XPAR_PS7_L2CACHEC_0_BASEADDR 0xF8F02000 +#define XPAR_PS7_L2CACHEC_0_HIGHADDR 0xF8F02FFF + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUC_0 */ +#define XPAR_PS7_SCUC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUC_0_BASEADDR 0xF8F00000 +#define XPAR_PS7_SCUC_0_HIGHADDR 0xF8F000FC + + +/******************************************************************/ + + +/***Definitions for Core_nIRQ/nFIQ interrupts ****/ +/* Definitions for driver UCOS_SCUGIC */ +#define XPAR_XSCUGIC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_PS7_SCUGIC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUGIC_0_BASEADDR 0xF8F00100 +#define XPAR_PS7_SCUGIC_0_HIGHADDR 0xF8F001FF +#define XPAR_PS7_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_SCUGIC_0_DEVICE_ID 0 +#define XPAR_SCUGIC_0_CPU_BASEADDR 0xF8F00100 +#define XPAR_SCUGIC_0_CPU_HIGHADDR 0xF8F001FF +#define XPAR_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUTIMER */ +#define XPAR_UCOS_SCUC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUTIMER_0 */ +#define XPAR_PS7_SCUTIMER_0_DEVICE_ID 0 +#define XPAR_PS7_SCUTIMER_0_BASEADDR 0xF8F00600 +#define XPAR_PS7_SCUTIMER_0_HIGHADDR 0xF8F0061F + + +/******************************************************************/ + +/* Definitions for driver UCOS_SDPS */ +#define XPAR_UCOS_SDPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SD_0 */ +#define XPAR_PS7_SD_0_DEVICE_ID 0 +#define XPAR_PS7_SD_0_BASEADDR 0xE0100000 +#define XPAR_PS7_SD_0_HIGHADDR 0xE0100FFF +#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SD_0 */ +#define XPAR_UCOS_SDPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_SDPS_0_DEVICE_ID XPAR_PS7_SD_0_DEVICE_ID +#define XPAR_UCOS_SDPS_0_BASEADDR 0xE0100000 +#define XPAR_UCOS_SDPS_0_HIGHADDR 0xE0100FFF +#define XPAR_UCOS_SDPS_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +///* Definitions for driver UCOS_TTCPS */ +//#define XPAR_UCOS_TTCPS_NUM_INSTANCES 3 +// +///* Definitions for peripheral PS7_TTC_0 */ +//#define XPAR_PS7_TTC_0_DEVICE_ID 0 +//#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000 +//#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_1_DEVICE_ID 1 +//#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004 +//#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_2_DEVICE_ID 2 +//#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008 +//#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_UARTPS */ +#define XPAR_UCOS_UARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_UCOS_UARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_UCOS_UARTPS_0_BASEADDR 0xE0001000 +#define XPAR_UCOS_UARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_UCOS_UARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_UCOS_UARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_USBPS */ +#define XPAR_UCOS_USBPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_USB_0 */ +#define XPAR_PS7_USB_0_DEVICE_ID 0 +#define XPAR_PS7_USB_0_BASEADDR 0xE0002000 +#define XPAR_PS7_USB_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_USB_0 */ +#define XPAR_UCOS_USBPS_0_DEVICE_ID XPAR_PS7_USB_0_DEVICE_ID +#define XPAR_UCOS_USBPS_0_BASEADDR 0xE0002000 +#define XPAR_UCOS_USBPS_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Definitions for driver XADCPS */ +#define XPAR_XADCPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_XADC_0 */ +#define XPAR_PS7_XADC_0_DEVICE_ID 0 +#define XPAR_PS7_XADC_0_BASEADDR 0xF8007100 +#define XPAR_PS7_XADC_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_XADC_0 */ +#define XPAR_XADCPS_0_DEVICE_ID XPAR_PS7_XADC_0_DEVICE_ID +#define XPAR_XADCPS_0_BASEADDR 0xF8007100 +#define XPAR_XADCPS_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + + +//UCOS STDOUT +#define UCOS_STDOUT_DRIVER UCOS_UART_PS7_UART +#define UCOS_STDOUT_DEVICE_ID 0 +#define STDOUT_BASEADDRESS + +//UCOS Ethernet +#define UCOS_ETHERNET_DRIVER UCOS_ETHERNET_EMACPS + +//UCOS TASK PARAMETERS +#define UCOS_START_TASK_PRIO 5 +#define UCOS_START_TASK_STACK_SIZE 784 +#define UCOS_START_DEBUG_TRACE DEF_ENABLED +#define NET_TASK_CFG_RX_PRIO 30 +#define NET_TASK_CFG_RX_STACK_SIZE 3072 +#define NET_TASK_CFG_TXDEALLOC_PRIO 6 +#define NET_TASK_CFG_TXDEALLOC_STACK_SIZE 2048 +#define NET_TASK_CFG_TMR_PRIO 18 +#define NET_TASK_CFG_TMR_STACK_SIZE 2048 +#define HTTPc_OS_CFG_TASK_PRIO 20 +#define HTTPc_OS_CFG_TASK_STK_SIZE 2048 +#define UCOS_HTTPc_OS_CFG_TASK_DELAY 1 +#define UCOS_HTTPc_OS_CFG_MSG_Q_SIZE 5 +#define UCOS_HTTPc_OS_CFG_TIMEOUT 2000 +#define UCOS_HTTPc_OS_CFG_INACTIVITY_TIMEOUT 30 + +#define UCOS_AMP_MASTER DEF_ENABLED + + +#define UCOS_CFG_INIT_CAN DEF_ENABLED +#define UCOS_CFG_INIT_NET DEF_ENABLED +#define UCOS_CFG_INIT_FS DEF_DISABLED +#define UCOS_CFG_INIT_OPENAMP DEF_DISABLED +#define UCOS_CFG_INIT_USBD DEF_DISABLED +#define UCOS_CFG_INIT_USBH DEF_DISABLED + + +#define UCOS_ETHERNET_ADDRESS "10.10.110.2" +#define UCOS_ETHERNET_GATEWAY "10.10.110.1" +#define UCOS_ETHERNET_SUBMASK "255.255.255.0" +#define UCOS_ETHERNET_DHCP DEF_ENABLED + + +#define UCOS_IF_RX_BUF_NBR 12 +#define UCOS_IF_TX_LARGE_BUF_NBR 8 +#define UCOS_IF_TX_SMALL_BUF_NBR 8 +#define UCOS_IF_RX_DESC_NBR 0 +#define UCOS_IF_TX_DESC_NBR 0 +#define UCOS_IF_DEDIC_MEM_ADDR 0 +#define UCOS_IF_DEDIC_MEM_SIZE 0 +#define UCOS_IF_HW_ADDR "50:E5:49:E6:8D:28" + + +#define UCOS_PHY_BUS_ADDR 255 +#define UCOS_PHY_BUS_MODE UCOS_NET_PHY_BUS_MODE_GMII +#define UCOS_PHY_TYPE UCOS_NET_PHY_TYPE_INT +#define UCOS_PHY_SPEED UCOS_NET_PHY_SPD_AUTO +#define UCOS_PHY_DUPLEX UCOS_NET_PHY_DUPLEX_AUTO + + +#define UCOS_USB_DRIVER UCOS_USB_NONE +#define UCOS_USB_DEVICE_ID 0 +#define UCOS_USB_TYPE UCOS_USB_TYPE_DEVICE + + +#define UCOS_RAMDISK_EN DEF_DISABLED +#define UCOS_RAMDISK_SIZE 128 +#define UCOS_RAMDISK_SECTOR_SIZE 512 +#define UCOS_RAMDISK_BASE_ADDRESS 0 + + +#define UCOS_SDCARD_EN DEF_DISABLED + + +#define XPAR_PS7_ETHERNET_0_INT_SOURCE 54 +#define XPAR_PS7_SD_0_INT_SOURCE 56 +#define XPAR_PS7_UART_1_INT_SOURCE 82 +#define XPAR_PS7_USB_0_INT_SOURCE 53 + +#define UCOS_ZYNQ_CONFIG_MMU DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_MMU DEF_DISABLED +#define UCOS_ZYNQ_CONFIG_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_OPTIMS DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_I_EN DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_D_EN DEF_DISABLED +#define UCOS_CPU_TYPE UCOS_CPU_TYPE_PS7 + +//Parameters added by Kai Gemlau +#define UCOS_SMP_ENABLE DEF_DISABLED + +/******************************************************************/ + +/* Definitions for driver TTCPS */ +#define XPAR_XTTCPS_NUM_INSTANCES 3U + +/* Definitions for peripheral PS7_TTC_0 */ +#define XPAR_PS7_TTC_0_DEVICE_ID 0U +#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000U +#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_1_DEVICE_ID 1U +#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004U +#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_2_DEVICE_ID 2U +#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008U +#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_TTC_0 */ +#define XPAR_XTTCPS_0_DEVICE_ID XPAR_PS7_TTC_0_DEVICE_ID +#define XPAR_XTTCPS_0_BASEADDR 0xF8001000U +#define XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_0_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_1_DEVICE_ID XPAR_PS7_TTC_1_DEVICE_ID +#define XPAR_XTTCPS_1_BASEADDR 0xF8001004U +#define XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_1_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_2_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define XPAR_XTTCPS_2_BASEADDR 0xF8001008U +#define XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Definitions for driver IICPS */ +#define XPAR_XIICPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_I2C_0 */ +#define XPAR_PS7_I2C_0_DEVICE_ID 0 +#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/* Definitions for peripheral PS7_I2C_1 */ +#define XPAR_PS7_I2C_1_DEVICE_ID 1 +#define XPAR_PS7_I2C_1_BASEADDR 0xE0005000 +#define XPAR_PS7_I2C_1_HIGHADDR 0xE0005FFF +#define XPAR_PS7_I2C_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + +/* Canonical definitions for peripheral PS7_I2C_1 */ +#define XPAR_XIICPS_1_DEVICE_ID XPAR_PS7_I2C_1_DEVICE_ID +#define XPAR_XIICPS_1_BASEADDR 0xE0005000 +#define XPAR_XIICPS_1_HIGHADDR 0xE0005FFF +#define XPAR_XIICPS_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver UARTPS */ +#define XPAR_XUARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_XUARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_XUARTPS_0_BASEADDR 0xE0001000 +#define XPAR_XUARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_XUARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_XUARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ diff --git a/src/APP/Aufgabe6/ps7/core0/cfg/xparameters_ps.h b/src/APP/Aufgabe6/ps7/core0/cfg/xparameters_ps.h new file mode 100644 index 0000000..e7ab8e3 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/cfg/xparameters_ps.h @@ -0,0 +1,325 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xparameters_ps.h +* +* This file contains the address definitions for the hard peripherals +* attached to the ARM Cortex A9 core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 1.00a ecm/sdm 02/01/10 Initial version
+* 3.04a sdm     02/02/12 Removed some of the defines as they are being generated through
+*                        driver tcl
+* 5.0	pkp		01/16/15 Added interrupt ID definition of ttc for TEST APP
+*
+* +* @note +* +* None. +* +******************************************************************************/ + +#ifndef _XPARAMETERS_PS_H_ +#define _XPARAMETERS_PS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/************************** Constant Definitions *****************************/ + +/* + * This block contains constant declarations for the peripherals + * within the hardblock + */ + +/* Canonical definitions for DDR MEMORY */ +#define XPAR_DDR_MEM_BASEADDR 0x00000000U +#define XPAR_DDR_MEM_HIGHADDR 0x3FFFFFFFU + +/* Canonical definitions for Interrupts */ +#define XPAR_XUARTPS_0_INTR XPS_UART0_INT_ID +#define XPAR_XUARTPS_1_INTR XPS_UART1_INT_ID +#define XPAR_XUSBPS_0_INTR XPS_USB0_INT_ID +#define XPAR_XUSBPS_1_INTR XPS_USB1_INT_ID +#define XPAR_XIICPS_0_INTR XPS_I2C0_INT_ID +#define XPAR_XIICPS_1_INTR XPS_I2C1_INT_ID +#define XPAR_XSPIPS_0_INTR XPS_SPI0_INT_ID +#define XPAR_XSPIPS_1_INTR XPS_SPI1_INT_ID +#define XPAR_XCANPS_0_INTR XPS_CAN0_INT_ID +#define XPAR_XCANPS_1_INTR XPS_CAN1_INT_ID +#define XPAR_XGPIOPS_0_INTR XPS_GPIO_INT_ID +#define XPAR_XEMACPS_0_INTR XPS_GEM0_INT_ID +#define XPAR_XEMACPS_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_XEMACPS_1_INTR XPS_GEM1_INT_ID +#define XPAR_XEMACPS_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_XSDIOPS_0_INTR XPS_SDIO0_INT_ID +#define XPAR_XQSPIPS_0_INTR XPS_QSPI_INT_ID +#define XPAR_XSDIOPS_1_INTR XPS_SDIO1_INT_ID +#define XPAR_XWDTPS_0_INTR XPS_WDT_INT_ID +#define XPAR_XDCFG_0_INTR XPS_DVC_INT_ID +#define XPAR_SCUTIMER_INTR XPS_SCU_TMR_INT_ID +#define XPAR_SCUWDT_INTR XPS_SCU_WDT_INT_ID +#define XPAR_XTTCPS_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_XTTCPS_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_XTTCPS_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_XTTCPS_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_XTTCPS_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_XTTCPS_5_INTR XPS_TTC1_2_INT_ID +#define XPAR_XDMAPS_0_FAULT_INTR XPS_DMA0_ABORT_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_0 XPS_DMA0_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_1 XPS_DMA1_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_2 XPS_DMA2_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_3 XPS_DMA3_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_4 XPS_DMA4_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_5 XPS_DMA5_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_6 XPS_DMA6_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_7 XPS_DMA7_INT_ID + + +#define XPAR_XQSPIPS_0_LINEAR_BASEADDR XPS_QSPI_LINEAR_BASEADDR +#define XPAR_XPARPORTPS_CTRL_BASEADDR XPS_PARPORT_CRTL_BASEADDR + + + +/* Canonical definitions for DMAC */ + + +/* Canonical definitions for WDT */ + +/* Canonical definitions for SLCR */ +#define XPAR_XSLCR_NUM_INSTANCES 1U +#define XPAR_XSLCR_0_DEVICE_ID 0U +#define XPAR_XSLCR_0_BASEADDR XPS_SYS_CTRL_BASEADDR + +/* Canonical definitions for SCU GIC */ +#define XPAR_SCUGIC_NUM_INSTANCES 1U +#define XPAR_SCUGIC_SINGLE_DEVICE_ID 0U +#define XPAR_SCUGIC_CPU_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000100U) +#define XPAR_SCUGIC_DIST_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00001000U) +#define XPAR_SCUGIC_ACK_BEFORE 0U + +/* Canonical definitions for Global Timer */ +#define XPAR_GLOBAL_TMR_NUM_INSTANCES 1U +#define XPAR_GLOBAL_TMR_DEVICE_ID 0U +#define XPAR_GLOBAL_TMR_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000200U) +#define XPAR_GLOBAL_TMR_INTR XPS_GLOBAL_TMR_INT_ID + + +/* Xilinx Parallel Flash Library (XilFlash) User Settings */ +#define XPAR_AXI_EMC + + +#define XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/* + * This block contains constant declarations for the peripherals + * within the hardblock. These have been put for bacwards compatibilty + */ + +#define XPS_PERIPHERAL_BASEADDR 0xE0000000U +#define XPS_UART0_BASEADDR 0xE0000000U +#define XPS_UART1_BASEADDR 0xE0001000U +#define XPS_USB0_BASEADDR 0xE0002000U +#define XPS_USB1_BASEADDR 0xE0003000U +#define XPS_I2C0_BASEADDR 0xE0004000U +#define XPS_I2C1_BASEADDR 0xE0005000U +#define XPS_SPI0_BASEADDR 0xE0006000U +#define XPS_SPI1_BASEADDR 0xE0007000U +#define XPS_CAN0_BASEADDR 0xE0008000U +#define XPS_CAN1_BASEADDR 0xE0009000U +#define XPS_GPIO_BASEADDR 0xE000A000U +#define XPS_GEM0_BASEADDR 0xE000B000U +#define XPS_GEM1_BASEADDR 0xE000C000U +#define XPS_QSPI_BASEADDR 0xE000D000U +#define XPS_PARPORT_CRTL_BASEADDR 0xE000E000U +#define XPS_SDIO0_BASEADDR 0xE0100000U +#define XPS_SDIO1_BASEADDR 0xE0101000U +#define XPS_IOU_BUS_CFG_BASEADDR 0xE0200000U +#define XPS_NAND_BASEADDR 0xE1000000U +#define XPS_PARPORT0_BASEADDR 0xE2000000U +#define XPS_PARPORT1_BASEADDR 0xE4000000U +#define XPS_QSPI_LINEAR_BASEADDR 0xFC000000U +#define XPS_SYS_CTRL_BASEADDR 0xF8000000U /* AKA SLCR */ +#define XPS_TTC0_BASEADDR 0xF8001000U +#define XPS_TTC1_BASEADDR 0xF8002000U +#define XPS_DMAC0_SEC_BASEADDR 0xF8003000U +#define XPS_DMAC0_NON_SEC_BASEADDR 0xF8004000U +#define XPS_WDT_BASEADDR 0xF8005000U +#define XPS_DDR_CTRL_BASEADDR 0xF8006000U +#define XPS_DEV_CFG_APB_BASEADDR 0xF8007000U +#define XPS_AFI0_BASEADDR 0xF8008000U +#define XPS_AFI1_BASEADDR 0xF8009000U +#define XPS_AFI2_BASEADDR 0xF800A000U +#define XPS_AFI3_BASEADDR 0xF800B000U +#define XPS_OCM_BASEADDR 0xF800C000U +#define XPS_EFUSE_BASEADDR 0xF800D000U +#define XPS_CORESIGHT_BASEADDR 0xF8800000U +#define XPS_TOP_BUS_CFG_BASEADDR 0xF8900000U +#define XPS_SCU_PERIPH_BASE 0xF8F00000U +#define XPS_L2CC_BASEADDR 0xF8F02000U +#define XPS_SAM_RAM_BASEADDR 0xFFFC0000U +#define XPS_FPGA_AXI_S0_BASEADDR 0x40000000U +#define XPS_FPGA_AXI_S1_BASEADDR 0x80000000U +#define XPS_IOU_S_SWITCH_BASEADDR 0xE0000000U +#define XPS_PERIPH_APB_BASEADDR 0xF8000000U + +/* Shared Peripheral Interrupts (SPI) */ +#define XPS_CORE_PARITY0_INT_ID 32U +#define XPS_CORE_PARITY1_INT_ID 33U +#define XPS_L2CC_INT_ID 34U +#define XPS_OCMINTR_INT_ID 35U +#define XPS_ECC_INT_ID 36U +#define XPS_PMU0_INT_ID 37U +#define XPS_PMU1_INT_ID 38U +#define XPS_SYSMON_INT_ID 39U +#define XPS_DVC_INT_ID 40U +#define XPS_WDT_INT_ID 41U +#define XPS_TTC0_0_INT_ID 42U +#define XPS_TTC0_1_INT_ID 43U +#define XPS_TTC0_2_INT_ID 44U +#define XPS_DMA0_ABORT_INT_ID 45U +#define XPS_DMA0_INT_ID 46U +#define XPS_DMA1_INT_ID 47U +#define XPS_DMA2_INT_ID 48U +#define XPS_DMA3_INT_ID 49U +#define XPS_SMC_INT_ID 50U +#define XPS_QSPI_INT_ID 51U +#define XPS_GPIO_INT_ID 52U +#define XPS_USB0_INT_ID 53U +#define XPS_GEM0_INT_ID 54U +#define XPS_GEM0_WAKE_INT_ID 55U +#define XPS_SDIO0_INT_ID 56U +#define XPS_I2C0_INT_ID 57U +#define XPS_SPI0_INT_ID 58U +#define XPS_UART0_INT_ID 59U +#define XPS_CAN0_INT_ID 60U +#define XPS_FPGA0_INT_ID 61U +#define XPS_FPGA1_INT_ID 62U +#define XPS_FPGA2_INT_ID 63U +#define XPS_FPGA3_INT_ID 64U +#define XPS_FPGA4_INT_ID 65U +#define XPS_FPGA5_INT_ID 66U +#define XPS_FPGA6_INT_ID 67U +#define XPS_FPGA7_INT_ID 68U +#define XPS_TTC1_0_INT_ID 69U +#define XPS_TTC1_1_INT_ID 70U +#define XPS_TTC1_2_INT_ID 71U +#define XPS_DMA4_INT_ID 72U +#define XPS_DMA5_INT_ID 73U +#define XPS_DMA6_INT_ID 74U +#define XPS_DMA7_INT_ID 75U +#define XPS_USB1_INT_ID 76U +#define XPS_GEM1_INT_ID 77U +#define XPS_GEM1_WAKE_INT_ID 78U +#define XPS_SDIO1_INT_ID 79U +#define XPS_I2C1_INT_ID 80U +#define XPS_SPI1_INT_ID 81U +#define XPS_UART1_INT_ID 82U +#define XPS_CAN1_INT_ID 83U +#define XPS_FPGA8_INT_ID 84U +#define XPS_FPGA9_INT_ID 85U +#define XPS_FPGA10_INT_ID 86U +#define XPS_FPGA11_INT_ID 87U +#define XPS_FPGA12_INT_ID 88U +#define XPS_FPGA13_INT_ID 89U +#define XPS_FPGA14_INT_ID 90U +#define XPS_FPGA15_INT_ID 91U + +/* Private Peripheral Interrupts (PPI) */ +#define XPS_GLOBAL_TMR_INT_ID 27U /* SCU Global Timer interrupt */ +#define XPS_FIQ_INT_ID 28U /* FIQ from FPGA fabric */ +#define XPS_SCU_TMR_INT_ID 29U /* SCU Private Timer interrupt */ +#define XPS_SCU_WDT_INT_ID 30U /* SCU Private WDT interrupt */ +#define XPS_IRQ_INT_ID 31U /* IRQ from FPGA fabric */ + + +/* REDEFINES for TEST APP */ +/* Definitions for UART */ +#define XPAR_PS7_UART_0_INTR XPS_UART0_INT_ID +#define XPAR_PS7_UART_1_INTR XPS_UART1_INT_ID +#define XPAR_PS7_USB_0_INTR XPS_USB0_INT_ID +#define XPAR_PS7_USB_1_INTR XPS_USB1_INT_ID +#define XPAR_PS7_I2C_0_INTR XPS_I2C0_INT_ID +#define XPAR_PS7_I2C_1_INTR XPS_I2C1_INT_ID +#define XPAR_PS7_SPI_0_INTR XPS_SPI0_INT_ID +#define XPAR_PS7_SPI_1_INTR XPS_SPI1_INT_ID +#define XPAR_PS7_CAN_0_INTR XPS_CAN0_INT_ID +#define XPAR_PS7_CAN_1_INTR XPS_CAN1_INT_ID +#define XPAR_PS7_GPIO_0_INTR XPS_GPIO_INT_ID +#define XPAR_PS7_ETHERNET_0_INTR XPS_GEM0_INT_ID +#define XPAR_PS7_ETHERNET_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_PS7_ETHERNET_1_INTR XPS_GEM1_INT_ID +#define XPAR_PS7_ETHERNET_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_PS7_QSPI_0_INTR XPS_QSPI_INT_ID +#define XPAR_PS7_WDT_0_INTR XPS_WDT_INT_ID +#define XPAR_PS7_SCUWDT_0_INTR XPS_SCU_WDT_INT_ID +#define XPAR_PS7_SCUTIMER_0_INTR XPS_SCU_TMR_INT_ID +#define XPAR_PS7_XADC_0_INTR XPS_SYSMON_INT_ID +#define XPAR_PS7_TTC_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_PS7_TTC_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_PS7_TTC_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_PS7_TTC_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_PS7_TTC_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_PS7_TTC_5_INTR XPS_TTC1_2_INT_ID + +#define XPAR_XADCPS_INT_ID XPS_SYSMON_INT_ID + +/* For backwards compatibilty */ +#define XPAR_XUARTPS_0_CLOCK_HZ XPAR_XUARTPS_0_UART_CLK_FREQ_HZ +#define XPAR_XUARTPS_1_CLOCK_HZ XPAR_XUARTPS_1_UART_CLK_FREQ_HZ +#define XPAR_XTTCPS_0_CLOCK_HZ XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_1_CLOCK_HZ XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_2_CLOCK_HZ XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_3_CLOCK_HZ XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_4_CLOCK_HZ XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_5_CLOCK_HZ XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ +#define XPAR_XIICPS_0_CLOCK_HZ XPAR_XIICPS_0_I2C_CLK_FREQ_HZ +#define XPAR_XIICPS_1_CLOCK_HZ XPAR_XIICPS_1_I2C_CLK_FREQ_HZ + +#define XPAR_XQSPIPS_0_CLOCK_HZ XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ + +#define XPAR_SCUTIMER_DEVICE_ID 0U +#define XPAR_SCUWDT_DEVICE_ID 0U + + +#ifdef __cplusplus +} +#endif + +#endif /* protection macro */ diff --git a/src/APP/Aufgabe6/ps7/core0/linker/lscript.ld b/src/APP/Aufgabe6/ps7/core0/linker/lscript.ld new file mode 100644 index 0000000..a9f145a --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/linker/lscript.ld @@ -0,0 +1,291 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: */ +/* */ +/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : Cortex-A9 Linker Script */ +/* */ +/*******************************************************************/ + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000; +_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x2000; + +_ABORT_STACK_SIZE = DEFINED(_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024; +_SUPERVISOR_STACK_SIZE = DEFINED(_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048; +_IRQ_STACK_SIZE = DEFINED(_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024; +_FIQ_STACK_SIZE = DEFINED(_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024; +_UNDEF_STACK_SIZE = DEFINED(_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024; + +/* Define Memories in the system */ + +MEMORY +{ + axi_bram_ctrl_0_Mem0 : ORIGIN = 0x40000000, LENGTH = 0x2000 + ps7_ddr_0 : ORIGIN = 0x100000, LENGTH = 0x3FF00000 + ps7_qspi_linear_0 : ORIGIN = 0xFC000000, LENGTH = 0x2000000 + ps7_ram_0 : ORIGIN = 0x0, LENGTH = 0x30000 + ps7_ram_1 : ORIGIN = 0xFFFF0000, LENGTH = 0xFE00 + ps7_ddr_core_0 : ORIGIN = 0x100000, LENGTH = 0x700000 + ps7_ddr_core_1 : ORIGIN = 0x800000, LENGTH = 0x800000 +} + +/* Specify the default entry point to the program */ + +ENTRY(_vector_table) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ +.text : { + KEEP (*(.vectors)) + *(.boot) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.plt) + *(.gnu_warning) + *(.gcc_execpt_table) + *(.glue_7) + *(.glue_7t) + *(.vfp11_veneer) + *(.ARM.extab) + *(.gnu.linkonce.armextab.*) +} > ps7_ddr_core_0 + +.init : { + KEEP (*(.init)) +} > ps7_ddr_core_0 + +.fini : { + KEEP (*(.fini)) +} > ps7_ddr_core_0 + +.rodata : { + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > ps7_ddr_core_0 + +.rodata1 : { + __rodata1_start = .; + *(.rodata1) + *(.rodata1.*) + __rodata1_end = .; +} > ps7_ddr_core_0 + +.sdata2 : { + __sdata2_start = .; + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + __sdata2_end = .; +} > ps7_ddr_core_0 + +.sbss2 : { + __sbss2_start = .; + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + __sbss2_end = .; +} > ps7_ddr_core_0 + +.data : { + __data_start = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.jcr) + *(.got) + *(.got.plt) + __data_end = .; +} > ps7_ddr_core_0 + +.data1 : { + __data1_start = .; + *(.data1) + *(.data1.*) + __data1_end = .; +} > ps7_ddr_core_0 + +.got : { + *(.got) +} > ps7_ddr_core_0 + +.ctors : { + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > ps7_ddr_core_0 + +.dtors : { + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > ps7_ddr_core_0 + +.fixup : { + __fixup_start = .; + *(.fixup) + __fixup_end = .; +} > ps7_ddr_core_0 + +.eh_frame : { + *(.eh_frame) +} > ps7_ddr_core_0 + +.eh_framehdr : { + __eh_framehdr_start = .; + *(.eh_framehdr) + __eh_framehdr_end = .; +} > ps7_ddr_core_0 + +.gcc_except_table : { + *(.gcc_except_table) +} > ps7_ddr_core_0 + +.mmu_tbl (ALIGN(16384)) : { + __mmu_tbl_start = .; + *(.mmu_tbl) + __mmu_tbl_end = .; +} > ps7_ddr_core_0 + +.ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx*) + *(.gnu.linkonce.armexidix.*.*) + __exidx_end = .; +} > ps7_ddr_core_0 + +.preinit_array : { + __preinit_array_start = .; + KEEP (*(SORT(.preinit_array.*))) + KEEP (*(.preinit_array)) + __preinit_array_end = .; +} > ps7_ddr_core_0 + +.init_array : { + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; +} > ps7_ddr_core_0 + +.fini_array : { + __fini_array_start = .; + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array)) + __fini_array_end = .; +} > ps7_ddr_core_0 + +.ARM.attributes : { + __ARM.attributes_start = .; + *(.ARM.attributes) + __ARM.attributes_end = .; +} > ps7_ddr_core_0 + +.sdata : { + __sdata_start = .; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + __sdata_end = .; +} > ps7_ddr_core_0 + +.sbss (NOLOAD) : { + __sbss_start = .; + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + __sbss_end = .; +} > ps7_ddr_core_0 + +.tdata : { + __tdata_start = .; + *(.tdata) + *(.tdata.*) + *(.gnu.linkonce.td.*) + __tdata_end = .; +} > ps7_ddr_core_0 + +.tbss : { + __tbss_start = .; + *(.tbss) + *(.tbss.*) + *(.gnu.linkonce.tb.*) + __tbss_end = .; +} > ps7_ddr_core_0 + +.bss (NOLOAD) : { + __bss_start = .; + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + __bss_end = .; +} > ps7_ddr_core_0 + +_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 ); + +_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 ); + +/* Generate Stack and Heap definitions */ + +.heap (NOLOAD) : { + . = ALIGN(16); + _heap = .; + HeapBase = .; + _heap_start = .; + . += _HEAP_SIZE; + _heap_end = .; + HeapLimit = .; +} > ps7_ddr_core_0 + +.stack (NOLOAD) : { + . = ALIGN(16); + _stack_end = .; + . += _STACK_SIZE; + . = ALIGN(16); + _stack = .; + __stack = _stack; + . = ALIGN(16); + _irq_stack_end = .; + . += _IRQ_STACK_SIZE; + . = ALIGN(16); + __irq_stack = .; + _supervisor_stack_end = .; + . += _SUPERVISOR_STACK_SIZE; + . = ALIGN(16); + __supervisor_stack = .; + _abort_stack_end = .; + . += _ABORT_STACK_SIZE; + . = ALIGN(16); + __abort_stack = .; + _fiq_stack_end = .; + . += _FIQ_STACK_SIZE; + . = ALIGN(16); + __fiq_stack = .; + _undef_stack_end = .; + . += _UNDEF_STACK_SIZE; + . = ALIGN(16); + __undef_stack = .; +} > ps7_ddr_core_0 + +_end = .; +} + diff --git a/src/APP/Aufgabe6/ps7/core0/main.c b/src/APP/Aufgabe6/ps7/core0/main.c new file mode 100644 index 0000000..2ec30b2 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/main.c @@ -0,0 +1,44 @@ +/* + ============================================================================ + Name : main.c + Author : Kai-Björn Gemlau + Version : + Copyright : Copyright belongs to the authors + Description : Hello World in C, Praktikum Aufgabe 7s + ============================================================================ + */ + +#include +#include +#include "ucos_uartps.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "xil_testmem.h" +#include "xil_printf.h" +#include "imu.h" +#include "ttc_timer.h" +#include "gt_core.h" +#include "gt_cpu.h" + + + +void InitDoneCallback(void * p_arg) { + (void) p_arg; + UCOS_Print("OS started!\r\n"); + GT_Init(); + + +} + +int main(void) { + MMUInit(); + + + GT_Calibrate(); + + + UCOSStartup(InitDoneCallback); + + while (1) + ; +} diff --git a/src/APP/Aufgabe6/ps7/core0/src/app_hooks.c b/src/APP/Aufgabe6/ps7/core0/src/app_hooks.c new file mode 100644 index 0000000..0f55548 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/src/app_hooks.c @@ -0,0 +1,260 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* uC/OS-II +* Application Hooks +* +* Filename : app_hooks.c +* Version : V1.00 +* Programmer(s) : FT +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +*/ + +#include + + +/* +********************************************************************************************************* +* EXTERN GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL CONSTANTS +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL DATA TYPES +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* LOCAL TABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL FUNCTION PROTOTYPES +********************************************************************************************************* +*/ + + + +/* +********************************************************************************************************** +********************************************************************************************************** +** GLOBAL FUNCTIONS +********************************************************************************************************** +********************************************************************************************************** +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +** uC/OS-II APP HOOKS +********************************************************************************************************* +********************************************************************************************************* +*/ + +#if (OS_APP_HOOKS_EN > 0) + +/* +********************************************************************************************************* +* TASK CREATION HOOK (APPLICATION) +* +* Description : This function is called when a task is created. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being created. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskCreateHook (OS_TCB *ptcb) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskCreateHook(ptcb); +#endif +} + +/* +********************************************************************************************************* +* TASK DELETION HOOK (APPLICATION) +* +* Description : This function is called when a task is deleted. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being deleted. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskDelHook (OS_TCB *ptcb) +{ + (void)ptcb; +} + +/* +********************************************************************************************************* +* IDLE TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskIdleHook(), which is called by the idle task. This hook +* has been added to allow you to do such things as STOP the CPU to conserve power. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are enabled during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 251 +void App_TaskIdleHook (void) +{ +} +#endif + +/* +********************************************************************************************************* +* STATISTIC TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskStatHook(), which is called every second by uC/OS-II's +* statistics task. This allows your application to add functionality to the statistics task. +* +* Argument(s) : none. +********************************************************************************************************* +*/ + +void App_TaskStatHook (void) +{ +} + +/* +********************************************************************************************************* +* TASK RETURN HOOK (APPLICATION) +* +* Description: This function is called if a task accidentally returns. In other words, a task should +* either be an infinite loop or delete itself when done. +* +* Arguments : ptcb is a pointer to the task control block of the task that is returning. +* +* Note(s) : none +********************************************************************************************************* +*/ + + +#if OS_VERSION >= 289 +void App_TaskReturnHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TASK SWITCH HOOK (APPLICATION) +* +* Description : This function is called when a task switch is performed. This allows you to perform other +* operations during a context switch. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are disabled during this call. +* +* (2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that +* will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the +* task being switched out (i.e. the preempted task). +********************************************************************************************************* +*/ + +#if OS_TASK_SW_HOOK_EN > 0 +void App_TaskSwHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN > 0) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskSwHook(); +#endif + GT_TaskSw(); +} +#endif + +/* +********************************************************************************************************* +* OS_TCBInit() HOOK (APPLICATION) +* +* Description : This function is called by OSTCBInitHook(), which is called by OS_TCBInit() after setting +* up most of the TCB. +* +* Argument(s) : ptcb is a pointer to the TCB of the task being created. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 204 +void App_TCBInitHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TICK HOOK (APPLICATION) +* +* Description : This function is called every tick. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_TIME_TICK_HOOK_EN > 0 +void App_TimeTickHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TickHook(); +#endif +} +#endif +#endif diff --git a/src/APP/Aufgabe6/ps7/core0/src/gt_tasks.c b/src/APP/Aufgabe6/ps7/core0/src/gt_tasks.c new file mode 100644 index 0000000..75a654b --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/src/gt_tasks.c @@ -0,0 +1,115 @@ +/* + * gt_tasks.c + * + * Created on: Aug 22, 2014 + * Author: matthiasb + */ + + +#include "ucos_uartps.h" +#include "xil_printf.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "gt_types.h" +//#include "gt_cfg_types.h" +#include "gt_cfg.h" + +#include /* memset */ +#include "tasks.h" + + + + +#define TASK_A_PRIO 11 +#define TASK_B_PRIO +#define TASK_C_PRIO +#define TASK_D_PRIO +#define TASK_E_PRIO + +#define TASK_STK_SIZE 256 + +static OS_STK TaskStacks[GT_NUM_OF_TASKS][TASK_STK_SIZE]; + +/*-------------------------------Task model internal struct definitions-------------------------------*/ + + + +/*------------------------------------Execution times and periods-------------------------------------*/ +/* + * All times given in (1/10)ms + */ + +/* + * Task model + */ +GT_TASK_EXT_T GT_AllTasks[GT_NUM_OF_TASKS] = { +/* Period Jitter Distance BCET WCET */ + {20, 0, 0, {5, 10}}, + {10, 0, 0, {1, 2}}, + {100, 0, 0, {2, 2}}, + {50, 0, 0, {2, 10}}, + {200, 0, 0, {2, 5}}, +}; + +/*------------------------------------Internal call back functions-------------------------------------*/ + + +/* + * Main task table, used for GT_Init call + */ +GT_TASK_T GT_Tasks[GT_NUM_OF_TASKS] = +{ + /*Type Activation Id Prio Next Activation CET Task init Function Task Function TaskArg D WL/Runable Internal External */ + { GT_TASK_DEF , GT_ACT_INT , 0, TASK_A_PRIO, NULL ,NULL , NULL, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[0]}, + { GT_TASK_DEF , GT_ACT_INT , 1, TASK_B_PRIO, NULL ,NULL , NULL, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[1]}, + { GT_TASK_DEF , GT_ACT_INT , 2, TASK_C_PRIO, NULL ,NULL , NULL, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[2]}, + { GT_TASK_DEF , GT_ACT_INT , 3, TASK_D_PRIO, NULL ,NULL , NULL, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[3]}, + { GT_TASK_DEF , GT_ACT_INT , 4, TASK_E_PRIO, NULL ,NULL , NULL, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[4]}, +}; + +/* + * Internal activation + */ + +/* + * + * start and end hooks + * + */ + +void _taskScheduled(void){ + return; +} + +void _taskNotScheduled(void){ + return; +} + +void _taskStarted(void){ + return; +} + +void _taskFinished(void){ + return; +} + + +void GT_TaskStartHook(GT_TASK_T *pMyOwnTask) { + //call _taskStarted +} + +void GT_TaskEndHook(GT_TASK_T *pMyOwnTask){ + //Call _taskFinished +} + +void GT_TaskInitHook(GT_TASK_T *pMyOwnTask){ + if(pMyOwnTask->Id == 4){ + UCOS_Print("Init Task\n"); + } +} + +void GT_TaskSwHook(GT_TASK_T *pMyOwnTask) { + //call Task scheduled or not +} + + diff --git a/src/APP/Aufgabe6/ps7/core0/src/uartps_cfg.c b/src/APP/Aufgabe6/ps7/core0/src/uartps_cfg.c new file mode 100644 index 0000000..dae6c62 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/src/uartps_cfg.c @@ -0,0 +1,17 @@ + +#include "ucos_uartps.h" +#include "xparameters.h" +#include "xparameters_ps.h" + +/* + * The uart configuration table for devices + */ +UCOS_UARTPS_Config UCOS_UARTPS_ConfigTable[] = { + { + XPAR_PS7_UART_1_DEVICE_ID, + XPAR_PS7_UART_1_BASEADDR, + XPAR_PS7_UART_1_UART_CLK_FREQ_HZ, + XPAR_PS7_UART_1_HAS_MODEM, + XPAR_PS7_UART_1_INT_SOURCE + } +}; diff --git a/src/APP/Aufgabe6/ps7/core0/src/xgpiops_g.c b/src/APP/Aufgabe6/ps7/core0/src/xgpiops_g.c new file mode 100644 index 0000000..31cfbbb --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/src/xgpiops_g.c @@ -0,0 +1,56 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ + +#include "xparameters.h" +#include "xparameters_ps.h" +#include "xgpiops.h" + +/* +* The configuration table for devices +*/ + +XGpioPs_Config XGpioPs_ConfigTable[XPAR_XGPIOPS_NUM_INSTANCES] = +{ + { + XPAR_PS7_GPIO_0_DEVICE_ID, + XPAR_PS7_GPIO_0_BASEADDR + } +}; + + diff --git a/src/APP/Aufgabe6/ps7/core0/src/xiicps_g.c b/src/APP/Aufgabe6/ps7/core0/src/xiicps_g.c new file mode 100644 index 0000000..2e9d0ff --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/src/xiicps_g.c @@ -0,0 +1,63 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ + +#include "xparameters.h" +#include "xparameters_ps.h" + +#include "xiicps.h" + +/* +* The configuration table for devices +*/ + +XIicPs_Config XIicPs_ConfigTable[XPAR_XIICPS_NUM_INSTANCES] = +{ + { + XPAR_PS7_I2C_0_DEVICE_ID, + XPAR_PS7_I2C_0_BASEADDR, + XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ + }, + { + XPAR_PS7_I2C_1_DEVICE_ID, + XPAR_PS7_I2C_1_BASEADDR, + XPAR_PS7_I2C_1_I2C_CLK_FREQ_HZ + } +}; + + diff --git a/src/APP/Aufgabe6/ps7/core0/src/xttcps_g.c b/src/APP/Aufgabe6/ps7/core0/src/xttcps_g.c new file mode 100644 index 0000000..15658b3 --- /dev/null +++ b/src/APP/Aufgabe6/ps7/core0/src/xttcps_g.c @@ -0,0 +1,111 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ +#include "xparameters_ps.h" +#include "xparameters.h" +#include "xttcps.h" + +/* +* The configuration table for devices +*/ + +XTtcPs_Config XTtcPs_ConfigTable[] = +{ + { + XPAR_PS7_TTC_0_DEVICE_ID, + XPAR_PS7_TTC_0_BASEADDR, + XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ + }, + { + XPAR_PS7_TTC_1_DEVICE_ID, + XPAR_PS7_TTC_1_BASEADDR, + XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ + }, + { + XPAR_PS7_TTC_2_DEVICE_ID, + XPAR_PS7_TTC_2_BASEADDR, + XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ + }//, +// { +// XPAR_PS7_TTC_3_DEVICE_ID, +// XPAR_PS7_TTC_3_BASEADDR, +// XPAR_PS7_TTC_3_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_4_DEVICE_ID, +// XPAR_PS7_TTC_4_BASEADDR, +// XPAR_PS7_TTC_4_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_5_DEVICE_ID, +// XPAR_PS7_TTC_5_BASEADDR, +// XPAR_PS7_TTC_5_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_6_DEVICE_ID, +// XPAR_PS7_TTC_6_BASEADDR, +// XPAR_PS7_TTC_6_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_7_DEVICE_ID, +// XPAR_PS7_TTC_7_BASEADDR, +// XPAR_PS7_TTC_7_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_8_DEVICE_ID, +// XPAR_PS7_TTC_8_BASEADDR, +// XPAR_PS7_TTC_8_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_9_DEVICE_ID, +// XPAR_PS7_TTC_9_BASEADDR, +// XPAR_PS7_TTC_9_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_10_DEVICE_ID, +// XPAR_PS7_TTC_10_BASEADDR, +// XPAR_PS7_TTC_10_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_11_DEVICE_ID, +// XPAR_PS7_TTC_11_BASEADDR, +// XPAR_PS7_TTC_11_TTC_CLK_FREQ_HZ +// } +}; + + diff --git a/src/APP/Aufgabe7/ps7/core0/build/config.mk b/src/APP/Aufgabe7/ps7/core0/build/config.mk new file mode 100644 index 0000000..2135778 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/build/config.mk @@ -0,0 +1,11 @@ +#µController dependent flags +MCFLAGS =-mcpu=cortex-a9 -march=armv7-a -mthumb -mthumb-interwork -mfloat-abi=softfp -mfpu=neon + +#Optimization +OPTIMIZE=-O0 -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections + +#Debug Level +DEBUG =-g3 + +#Linker flags +LDFLAGS = -nostartfiles -Xlinker --gc-sections -lm diff --git a/src/APP/Aufgabe7/ps7/core0/build/includes.mk b/src/APP/Aufgabe7/ps7/core0/build/includes.mk new file mode 100644 index 0000000..3f9b143 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/build/includes.mk @@ -0,0 +1,52 @@ + +INC += -I"$(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/cfg/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source" +INC += -I"$(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ipi" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_ttcps/src" + +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc" +INC += -I"$(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common" + +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/" +INC += -I"$(SRC_DIR)/Modules/MMU" + + +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/" + +#scugic.h fix +INC += -I"$(SRC_DIR)/Xilinx/libsrc/scugic_v3_9/src/" + +#uart includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/uartps_v3_6/src/" + +#xttcps includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/" + + +#gpio includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/" + +#I2C includes +INC += -I"$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/" + +#task set includes +INC += -I"$(SRC_DIR)/Modules/genericTaskset/if" + diff --git a/src/APP/Aufgabe7/ps7/core0/build/sources.mk b/src/APP/Aufgabe7/ps7/core0/build/sources.mk new file mode 100644 index 0000000..83f39b7 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/build/sources.mk @@ -0,0 +1,86 @@ +#Startup file +SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/asm_vectors.S +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/$(ARCH)/subdir.mk +-include $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/subdir.mk + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_osii/src/bsp/$(ARCH)/ucos_osii_bsp.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_common/src/$(ARCH)/cpu_bsp.c + + + +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/main.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/app_hooks.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/uartps_cfg.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/imu.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/ttc_timer.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/gt_tasks.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/pid.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xttcps_g.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xgpiops_g.c +SRC += $(SRC_DIR)/APP/$(APP)/$(ARCH)/core$(CORE)/src/xiicps_g.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d32.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/GNU/cpu_cache_armv7_generic_l1_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/cpu_cache_armv7_generic_l1.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu_a.S +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-CPU/cpu_core.c +#SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.c +#SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_math.c + +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.c +SRC += $(SRC_DIR)/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.c + +-include $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/subdir.mk + +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-II/kal.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Collections/slist.c +SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Common/Auth/auth.c + +-include $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/subdir.mk + +#mmu +SRC += $(SRC_DIR)/Modules/MMU/mmu.c + + +#src for triple timer counter +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_options.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_sinit.c + +#src for GPIO +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_hw.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_intr.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_sinit.c + +#src for I2C +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps.c +#SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_g.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_hw.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_intr.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_master.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_options.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_selftest.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_sinit.c +SRC +=$(SRC_DIR)/Xilinx/libsrc/iicps_v3_6/src/xiicps_slave.c + +#src for task set sim +SRC +=$(SRC_DIR)/Modules/genericTaskset/src/gt_core.c +SRC +=$(SRC_DIR)/Modules/genericTaskset/hw/gt_xilTtcPs.c + +#interrupts +SRC +=$(SRC_DIR)/Xilinx/libsrc/scugic_v3_9/src/xscugic.c + + diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/app_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/app_cfg.h new file mode 100644 index 0000000..c5426f0 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/app_cfg.h @@ -0,0 +1,82 @@ +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* This BSP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* MICRIUM BOARD SUPPORT PACKAGE +* +* Filename : app_cfg.h +* Version : V1.42 +* Programmer(s) : JBL +********************************************************************************************************* +*/ + +#ifndef UCOS_APP_CFG_PRESENT +#define UCOS_APP_CFG_PRESENT + +#include + +#include + +#define APP_CPU_ENABLED DEF_ENABLED + +#define APP_LIB_ENABLED DEF_ENABLED + +#define APP_COMMON_ENABLED DEF_ENABLED + +#define APP_SHELL_ENABLED DEF_DISABLED + +#define APP_CLK_ENABLED DEF_DISABLED + +#define APP_OSIII_ENABLED DEF_DISABLED + +#define APP_OSII_ENABLED DEF_ENABLED + +#define APP_TCPIP_ENABLED DEF_DISABLED + +#define APP_TCPIP_EXP_ENABLED DEF_DISABLED + +#define APP_DHCPC_ENABLED DEF_DISABLED + +#define APP_DNSC_ENABLED DEF_DISABLED + +#define APP_HTTPC_ENABLED DEF_DISABLED + +#define APP_MQTTC_ENABLED DEF_DISABLED + +#define APP_TELNETS_ENABLED DEF_DISABLED + +#define APP_IPERF_ENABLED DEF_DISABLED + +#define APP_FS_ENABLED DEF_DISABLED + +#define APP_USBD_ENABLED DEF_DISABLED + +#define APP_USBH_ENABLED DEF_DISABLED + +#define APP_OPENAMP_ENABLED DEF_DISABLED + +#define OS_TASK_TMR_PRIO 3 + + +#endif /* #ifndef UCOS_APP_CFG_PRESENT */ + diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/can_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/can_cfg.h new file mode 100644 index 0000000..e2d25db --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/can_cfg.h @@ -0,0 +1,202 @@ +/* +********************************************************************************************************* +* uC/CAN +* The Embedded CAN suite +* +* (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CAN is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* uC/CAN CONFIGURATION +* +* ZYNQ ZC7000 Series +* CAN DRIVER +* Filename : can_cfg.h +* Version : V2.41.00 +* Programmer(s) : E0 +* DC +********************************************************************************************************* +*/ + +#ifndef _CAN_CFG_H_ +#define _CAN_CFG_H_ + +#include "lib_def.h" + + +/* +********************************************************************************************************* +* COMMON DEFINES & ENUMERATIONS +********************************************************************************************************* +*/ + + /* Definiton for CANSIG_GRANULARITY, Options: */ +#define CAN_CFG_BIT 0u /* BIT */ +#define CAN_CFG_BYTE 1u /* BYTE */ + +#ifndef CAN_FALSE +#define CAN_FALSE 0u +#endif + +#ifndef CAN_TRUE +#define CAN_TRUE 1u +#endif + +#ifndef NULL_PTR +#define NULL_PTR (void *)0 +#endif + + /* ------------ APPLICATION ENUMERATIONS -------------- */ +enum { + S_NODESTATUS = 0, + S_CPULOAD, + S_COUNTER, + S_MAX, +}; + +enum { + M_STATUS = 0, + M_COMMAND, + M_MAX +}; + + +/* +********************************************************************************************************* +* MULTIPLE CAN CONTROLLERS +********************************************************************************************************* +*/ + +#define CAN_MODULE_CHANNEL_0 DEF_ENABLED +#define CAN_MODULE_CHANNEL_1 DEF_DISABLED + + +/* +********************************************************************************************************* +* DRIVER SPECIFIC DEFINES +********************************************************************************************************* +*/ + /* ---------------- BAUDRATE SETTINGS ----------------- */ +#define CAN_DEFAULT_BAUDRATE 1000000u /* Default Baudrate */ +#define CAN_DEFAULT_SP 750u /* Default Bit Sample Point in 1/10 % */ +#define CAN_DEFAULT_RJW 125u /* Default Re-Synch Jump Width in 1/10 % */ + + /* ---------------- TIMEOUT SETTINGS ------------------ */ +#define CAN_TIMEOUT_ERR_VAL 100000uL /* Timeout Value for While Loop Error Checks */ + + +/* ================================== ADVANCED DRIVER CONFIGURATION: DEFAULT VALUES ================================== */ +/* By Default, the following Driver specific settings for the ZYNQ ZC7xxx Driver are set to their default values */ +/* unless they are modified by customer needs. */ +/* */ +/* By Default, the Watermark level is configured to Maximum Watermark Value in the Driver, based on the reset value */ +/* presented by the Reference Manual. Redefine the following define to modify the Watermark Level for the following. */ +/* Tx FIFO Empty & Rx FIFO Full Watermark Level(s): */ +/* NOTE : The VALID range is between 1 & 63. */ +/* */ +/* #define CAN_WATERMARK_Rx_Tx_SIZE 63u */ +/* */ +/* By Default, the Operating Mode of the CAN controller is configured to "NORMAL" Mode. For diagnostic checking, */ +/* additional operating modes have been included in the driver. Redefine the following define to modify the Operating */ +/* Mode to either "LOOP BACK" or "SNOOP" Mode(s). */ +/* NOTE that only one operating mode can be selected at once at Initialization. Once CAN has been Initialized it */ +/* is possible to change between Operating Modes at run-time using the xxx_CAN_IoCtl() API Function call. */ +/* */ +/* #define CAN_DIAGNOSTIC_OFF 0u */ +/* #define CAN_DIAGNOSTIC_LOOPBACK 1u */ +/* #define CAN_DIAGNOSTIC_SNOOP 2u */ +/* */ +/* #define CAN_DIAGNOSTIC_SELECT CAN_DIAGNOSTIC_LOOPBACK */ +/* */ +/* ==================================================================================================================== */ + + +/* +********************************************************************************************************* +* CAN BUS +********************************************************************************************************* +*/ + +#define CANBUS_EN 1u /* Enable CAN Bus Management */ +#define CANBUS_N 3u /* Number of busses */ +#define CANBUS_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANBUS_TX_HANDLER_EN 1u /* Enable usage of CanBusTxHandler */ +#define CANBUS_RX_HANDLER_EN 1u /* Enable usage of CanBusRxHandler */ +#define CANBUS_NS_HANDLER_EN 1u /* Enable usage of CanBusNsHandler */ + +#define CANBUS_STAT_EN 1u /* Enable Bus Statistics */ +#define CANBUS_TX_QSIZE (2u * CANBUS_N) /* Transmit Queue Size in CAN Frames for each CAN Bus */ +#define CANBUS_RX_QSIZE (2u * CANBUS_N) /* Receive Queue Size in CAN Frames for each CAN Bus */ + +#define CANBUS_HOOK_NS_EN 1u /* Enable Node Status Handler Hook Function */ +#define CANBUS_HOOK_RX_EN 1u /* Enable Rx Handler Hook Function */ +#define CANBUS_RX_READ_ALWAYS_EN 1u /* If enabled the Rx Handler executes a read even.. */ + /* .. when frames can't be allocated */ + + +/* +********************************************************************************************************* +* CAN MESSAGE +********************************************************************************************************* +*/ + +#define CANMSG_EN 1u /* Enable CAN Message Support */ +#define CANMSG_N 2u /* Number of messages */ +#define CANMSG_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN SIGNAL +********************************************************************************************************* +*/ + +#define CANSIG_EN 1u /* Enable CAN Signal Database */ +#define CANSIG_N 3u /* Number of signals */ +#define CANSIG_ARG_CHK_EN 1u /* Enable runtime argument checking */ +#define CANSIG_MAX_WIDTH 4u /* Maximal signal width in byte */ +#define CANSIG_GRANULARITY CAN_CFG_BYTE /* Set signal resolution to byte */ +#define CANSIG_STATIC_CONFIG 1u /* To reduce memory usage, declare static signal table */ +#define CANSIG_USE_DELETE 0u /* To reduce memory usage don't use delete functions */ +#define CANSIG_CALLBACK_EN 0u /* Enable callback functions */ + + +/* +********************************************************************************************************* +* CAN FRAME +********************************************************************************************************* +*/ + +#define CANFRM_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CAN OS +********************************************************************************************************* +*/ + +#define CANOS_ARG_CHK_EN 1u /* Enable runtime argument checking */ + + +/* +********************************************************************************************************* +* CONFIGURATION END +********************************************************************************************************* +*/ + +#endif /* #ifndef _CAN_CFG_H_ */ diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/cpu_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/cpu_cfg.h new file mode 100644 index 0000000..b7b42d2 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/cpu_cfg.h @@ -0,0 +1,216 @@ +/* +********************************************************************************************************* +* uC/CPU +* CPU CONFIGURATION & PORT LAYER +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/CPU is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CPU CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : cpu_cfg.h +* Version : V1.30.02 +* Programmer(s) : SR +* ITJ +* JBL +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef CPU_CFG_MODULE_PRESENT +#define CPU_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +* CPU NAME CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_NAME_EN to enable/disable CPU host name feature : +* +* (a) CPU host name storage +* (b) CPU host name API functions +* +* (2) Configure CPU_CFG_NAME_SIZE with the desired ASCII string size of the CPU host name, +* including the terminating NULL character. +* +* See also 'cpu_core.h GLOBAL VARIABLES Note #1'. +********************************************************************************************************* +*/ + + /* Configure CPU host name feature (see Note #1) : */ +#define CPU_CFG_NAME_EN DEF_DISABLED + /* DEF_DISABLED CPU host name DISABLED */ + /* DEF_ENABLED CPU host name ENABLED */ + + /* Configure CPU host name ASCII string size ... */ +#define CPU_CFG_NAME_SIZE 16 + + +/* +********************************************************************************************************* +* CPU TIMESTAMP CONFIGURATION +* +* Note(s) : (1) Configure CPU_CFG_TS_xx_EN to enable/disable CPU timestamp features : +* +* (a) CPU_CFG_TS_32_EN enable/disable 32-bit CPU timestamp feature +* (b) CPU_CFG_TS_64_EN enable/disable 64-bit CPU timestamp feature +* +* (2) (a) Configure CPU_CFG_TS_TMR_SIZE with the CPU timestamp timer's word size : +* +* CPU_WORD_SIZE_08 8-bit word size +* CPU_WORD_SIZE_16 16-bit word size +* CPU_WORD_SIZE_32 32-bit word size +* CPU_WORD_SIZE_64 64-bit word size +* +* (b) If the size of the CPU timestamp timer is not a binary multiple of 8-bit octets +* (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple octet word +* size SHOULD be configured (e.g. to 16-bits). However, the minimum supported word +* size for CPU timestamp timers is 8-bits. +* +* See also 'cpu_core.h FUNCTION PROTOTYPES CPU_TS_TmrRd() Note #2a'. +********************************************************************************************************* +*/ + + /* Configure CPU timestamp features (see Note #1) : */ +#define CPU_CFG_TS_32_EN DEF_ENABLED +#define CPU_CFG_TS_64_EN DEF_ENABLED + /* DEF_DISABLED CPU timestamps DISABLED */ + /* DEF_ENABLED CPU timestamps ENABLED */ + + /* Configure CPU timestamp timer word size ... */ + /* ... (see Note #2) : */ +#define CPU_CFG_TS_TMR_SIZE CPU_WORD_SIZE_64 + + +/* +********************************************************************************************************* +* CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_INT_DIS_MEAS_EN to enable/disable measuring CPU's interrupts +* disabled time : +* +* (a) Enabled, if CPU_CFG_INT_DIS_MEAS_EN #define'd in 'cpu_cfg.h' +* +* (b) Disabled, if CPU_CFG_INT_DIS_MEAS_EN NOT #define'd in 'cpu_cfg.h' +* +* See also 'cpu_core.h FUNCTION PROTOTYPES Note #1'. +* +* (b) Configure CPU_CFG_INT_DIS_MEAS_OVRHD_NBR with the number of times to measure & +* average the interrupts disabled time measurements overhead. +* +* See also 'cpu_core.c CPU_IntDisMeasInit() Note #3a'. +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU interrupts disabled time ... */ +#define CPU_CFG_INT_DIS_MEAS_EN /* ... measurements feature (see Note #1a). */ +#endif + + /* Configure number of interrupts disabled overhead ... */ +#define CPU_CFG_INT_DIS_MEAS_OVRHD_NBR 1u /* ... time measurements (see Note #1b). */ + + +/* +********************************************************************************************************* +* CPU COUNT ZEROS CONFIGURATION +* +* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT to define count leading zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +* +* (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits +* function(s) in : +* +* (1) 'cpu_a.asm', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable assembly-optimized function(s) +* +* (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ +* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise +********************************************************************************************************* +*/ + +#if 0 /* Configure CPU count leading zeros bits ... */ +#define CPU_CFG_LEAD_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1a). */ +#endif + +#if 0 /* Configure CPU count trailing zeros bits ... */ +#define CPU_CFG_TRAIL_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1b). */ +#endif + + +/* +********************************************************************************************************* +* CPU ENDIAN TYPE OVERRIDE +* +* Note(s) : (1) Configure CPU_CFG_ENDIAN_TYPE to override the default CPU endian type defined in cpu.h. +* +* (a) CPU_ENDIAN_TYPE_BIG Big- endian word order (CPU words' most significant +* octet @ lowest memory address) +* (b) CPU_ENDIAN_TYPE_LITTLE Little-endian word order (CPU words' least significant +* octet @ lowest memory address) +* +* (2) Defining CPU_CFG_ENDIAN_TYPE here is only valid for supported bi-endian architectures. +* See 'cpu.h CPU WORD CONFIGURATION Note #3' for details +********************************************************************************************************* +*/ + +#if 0 +#define CPU_CFG_ENDIAN_TYPE CPU_ENDIAN_TYPE_BIG /* Defines CPU data word-memory order (see Note #2). */ +#endif + + +/* +********************************************************************************************************* +* CACHE MANAGEMENT +* +* Note(s) : (1) Configure CPU_CFG_CACHE_MGMT_EN to enable the cache managment API. + +* +* (2) Defining CPU_CFG_CACHE_MGMT_EN to DEF_ENABLED only enable the cache management function. +* Cache are assumed to be configured and enabled by the time CPU_init() is called. +********************************************************************************************************* +*/ + +#define CPU_CFG_CACHE_MGMT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of CPU cfg module include. */ + +#define CPU_CACHE_CFG_L2C310_BASE_ADDR 0xF8F02000 diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/dhcp-c_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/dhcp-c_cfg.h new file mode 100644 index 0000000..911724f --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/dhcp-c_cfg.h @@ -0,0 +1,146 @@ +/* +********************************************************************************************************* +* uC/DHCPc +* Dynamic Host Configuration Protocol Client +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DHCP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DHCP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dhcp-c_cfg.h +* Version : V2.10.00 +* Programmer(s) : SR +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* TASKS PRIORITIES +* Notes: (1) Task priorities configuration values should be used by the DHCPc OS port. The following task priorities +* should be defined: +* +* DHCPc_OS_CFG_TASK_PRIO +* DHCPc_OS_CFG_TMR_TASK_PRIO +* +* Task priorities can be defined either in this configuration file 'dhcp-c_cfg.h' or in a global +* OS tasks priorities configuration header file which must be included in 'dhcp-c_cfg.h'. +********************************************************************************************************* +*/ + + /* See Note #1. */ +#define DHCPc_OS_CFG_TASK_PRIO 13 +#define DHCPc_OS_CFG_TMR_TASK_PRIO 14 + + +/* +********************************************************************************************************* +* STACK SIZES +* Size (depth) of the task stacks (See the definition of CPU_STK for stack width) +********************************************************************************************************* +*/ + +#define DHCPc_OS_CFG_TASK_STK_SIZE 512 +#define DHCPc_OS_CFG_TMR_TASK_STK_SIZE 256 + + +/* +********************************************************************************************************* +* DHCPc +* +* Note(s) : (1) Default port for DHCP server is 67, and default port for DHCP client is 68. +* +* (3) Configure DHCPc_CFG_MAX_NBR_IF to the maximum number of interface this DHCP client will +* be able to manage at a given time. +* +* (4) Once the DHCP server has assigned the client an address, the later may perform a final +* check prior to use this address in order to make sure it is not being used by another +* host on the network. +********************************************************************************************************* +*/ + +#define DHCPc_CFG_IP_PORT_SERVER 67 +#define DHCPc_CFG_IP_PORT_CLIENT 68 + +#define DHCPc_CFG_MAX_RX_TIMEOUT_MS 1000 + +#define DHCPc_CFG_PARAM_REQ_TBL_SIZE 5 + +#define DHCPc_CFG_MAX_NBR_IF 1 + +#define DHCPc_CFG_ADDR_VALIDATE_EN DEF_ENABLED + /* ... (see Note #4) : */ + /* DEF_DISABLED Validation NOT performed */ + /* DEF_ENABLED Validation performed */ + +#define DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN DEF_ENABLED + /* DEF_DISABLED local-link configuration DISABLED */ + /* DEF_ENABLED local-link configuration ENABLED */ + +#define DHCPc_CFG_LOCAL_LINK_MAX_RETRY 3 + /* link-local address. */ + + +/* +********************************************************************************************************* +* DHCPc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DHCPc_CFG_ARG_CHK_EXT_EN to enable/disable the DHCP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure DHCPc_CFG_ARG_CHK_DBG_EN to enable/disable the DHCP client internal debug +* argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the DHCP client. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the DHCP client. +* +* (3) Configure DHCPc_DBG_CFG_MEM_CLR_EN to enable/disable the DHCP client from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define DHCPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define DHCPc_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure memory clear feature (see Note #3) : */ +#define DHCPc_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/dns-c_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/dns-c_cfg.h new file mode 100644 index 0000000..2756762 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/dns-c_cfg.h @@ -0,0 +1,111 @@ +/* +********************************************************************************************************* +* uC/DNSc +* Domain Name Server (client) +* +* (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/DNSc is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* DNS CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : dns-c_cfg.h +* Version : V2.00.01 +* Programmer(s) : AA +********************************************************************************************************* +*/ + +#ifndef DNSc_CFG_MODULE_PRESENT +#define DNSc_CFG_MODULE_PRESENT + +#include + + +/* +********************************************************************************************************* +* DNSc ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_ARG_CHK_EXT_EN to enable/disable the DNS client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* See Note 1. */ +#define DNSc_CFG_ARG_CHK_EXT_EN DEF_DISABLED + /* DEF_DISABLED External argument check DISABLED */ + /* DEF_ENABLED External argument check ENABLED */ + +/* +********************************************************************************************************* +* DNSc FEATURES CONFIGURATION +* +* Note(s) : (1) Configure DNSc_CFG_MODE_ASYNC_EN to enable/disable the DNS client asynchronous communication mode: +* +* (a) When ENABLED, A dedicated task will handle all host resolution request. It will be possible to +* call DNS API to get remote host address without blocking. +* +* (b) When DISABLED, The API to get remote host will always block until the resolution is completed. +* +* (2) Configure DNSc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the asynchronous +* communication is enabled. +* +* (a) When ENABLED, It will be possible to block when calling the DNS API to get remote host until the +* resolution is completed (via a flag option). +* +* (b) When DISABLED, The API to get remote host will always be non-blocking, must poll DNS client to +* know when the resolution is completed. +********************************************************************************************************* +*/ + + /* Configure asynchronous mode feature, See Note #1 ... */ +#define DNSc_CFG_MODE_ASYNC_EN DEF_DISABLED + /* DEF_DISABLED Asynchronous mode DISABLED */ + /* DEF_ENABLED Asynchronous mode ENABLED */ + + + /* Configure blocking option feature, See Note #2 ... */ +#define DNSc_CFG_MODE_BLOCK_EN DEF_DISABLED + /* DEF_DISABLED Blocking option DISABLED */ + /* DEF_ENABLED Blocking option ENABLED */ + +/* +********************************************************************************************************* +* DNSc RUN-TIME STRUCTURE CONFIGURATION +* +* Note(s) : (1) These structures should be defined into a 'C' file. +********************************************************************************************************* +*/ + +extern const DNSc_CFG DNSc_Cfg; /* Must always be defined. */ + +#if (DNSc_CFG_MODE_ASYNC_EN == DEF_ENABLED) +extern const DNSc_CFG_TASK DNSc_CfgTask; /* Not required when Asynchronous mode is disabled. */ +#endif + +#endif diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/gt_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/gt_cfg.h new file mode 100644 index 0000000..fb93481 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/gt_cfg.h @@ -0,0 +1,23 @@ +/* + * gt_cfg.h + * + * Created on: Aug 19, 2014 + * Author: matthiasb + */ + +#ifndef GT_CFG_H_ +#define GT_CFG_H_ + +#define GT_USE_NP_REGIONS 1 +#define GT_USE_NP_MEAS 1 +#define GT_NUM_OF_TASKS 3 +#define GT_REPORT_CONSOLE 0 +#define GT_REPORT_SVC 0 + +#define GT_TTC_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define GT_TTC_PWM_INTR_ID XPAR_XTTCPS_2_INTR +#define GT_TIMER_TICKS_PER_SEC 10000 + +#include "gt_core_cfg.h" + +#endif /* GT_CFG_H_ */ diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/gt_core_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/gt_core_cfg.h new file mode 100644 index 0000000..3d1a566 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/gt_core_cfg.h @@ -0,0 +1,24 @@ +/* + * gt_core_cfg.h + * + * Created on: Aug 19, 2014 + * Author: matthiasb + */ + +#ifndef GT_CORE_CFG_H_ +#define GT_CORE_CFG_H_ + +#define GT_USE_CPU_ARM9 0 +#define GT_USE_CPU_CM3 0 +#define GT_USE_CPU_CM7 0 +#define GT_USE_CPU_ARM_V7_A 1 + +#define GT_STACKSIZE 256 +#define GT_MAXTASKS 10 +#define GT_MAXQACT 5 + +#if ( GT_NUM_OF_TASKS > GT_MAXTASKS ) +#error "Too many tasks, increase GT_MAXTASKS or decrease GT_NUM_OF_TASKS" +#endif + +#endif /* GT_CORE_CFG_H_ */ diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/http-c_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/http-c_cfg.h new file mode 100644 index 0000000..26df728 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/http-c_cfg.h @@ -0,0 +1,224 @@ +/* +********************************************************************************************************* +* uC/HTTP +* Hypertext Transfer Protocol +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/HTTP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* HTTP CLIENT CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : http-c_cfg.h +* Version : V3.00.01 +* Programmer(s) : MM +* AL +********************************************************************************************************* +* Note(s) : (1) Assumes the following versions (or more recent) of software modules are included in +* the project build : +* +* (a) uC/CPU V1.29.02 +* (b) uC/LIB V1.38.00 +* (c) uC/Common V1.00.00 +* (d) uC/TCP-IP V3.03.00 +* +* +* (2) For additional details on the features available with uC/HTTPc, the API, the +* installation, etc. Please refer to the uC/HTTPc documentation available at +* https://doc.micrium.com/HTTPc. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef HTTPc_CFG_MODULE_PRESENT +#define HTTPc_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* COMPILE-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* HTTP ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_ARG_CHK_EXT_EN to enable/disable the HTTP client external argument +* check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* are checked/validated. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_ARG_CHK_EXT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT TASK CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_MODE_ASYNC_TASK_EN to enable/disable HTTP client task. +* (a) DEF_DISABLED : No HTTP client task will be created to process the HTTP requests. +* The Blocking HTTPc API will be enabled. +* +* (b) DEF_ENABLED : An HTTP client task will be created to process all the HTTP requests. +* The Non-Blocking HTTPc API will be enabled. Therefore, multiple +* connections can be handle by the task simultaneously. +* +* (2) Configure HTTPc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the +* asynchronous HTTPc Task is enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_MODE_ASYNC_TASK_EN DEF_DISABLED + +#define HTTPc_CFG_MODE_BLOCK_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT PERSISTENT CONNECTION CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_PERSISTENT_EN to enable/disable Persistent Connection support. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_PERSISTENT_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT CHUNKED TRANSFER CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_CHUNK_TX_EN to enable/disable Chunked Transfer support in Transmission. +* +* (2) Chunked Transfer in Reception is always enabled. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_CHUNK_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT QUERY STRING CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_QUERY_STR_EN to enable/disable Query String support in URL. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_QUERY_STR_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT HEADER FIELD CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_HDR_RX_EN to enable/disable header field processing in reception +* (i.e for headers received in the HTTP response. +* +* (2) Configure HTTPc_CFG_HDR_TX_EN to enable/disable header field processing in transmission +* (i.e for headers to include in the HTTP request. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_HDR_RX_EN DEF_ENABLED + + +#define HTTPc_CFG_HDR_TX_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT FORM CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_FORM_EN to enable/disable HTTP form creation source code. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_FORM_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT USER DATA CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_USER_DATA_EN to enable/disable user data pointer in HTTPc_CONN +* and HTTPc_REQ structure. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_USER_DATA_EN DEF_ENABLED + + +/* +********************************************************************************************************* +* HTTP CLIENT WEBSOCKET CONFIGURATION +* +* Note(s) : (1) Configure HTTPc_CFG_WEBSOCKET_EN to enable/disable the Websocket feature. +********************************************************************************************************* +*/ + +#define HTTPc_CFG_WEBSOCKET_EN DEF_DISABLED + + +/* +********************************************************************************************************* +********************************************************************************************************* +* RUN-TIME CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const HTTP_TASK_CFG HTTPc_TaskCfg; +extern const HTTPc_CFG HTTPc_Cfg; + + +/* =============================================== END =============================================== */ +#endif /* HTTPc_CFG_MODULE_PRESENT */ diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/imu.h b/src/APP/Aufgabe7/ps7/core0/cfg/imu.h new file mode 100644 index 0000000..30d79b4 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/imu.h @@ -0,0 +1,19 @@ +/* + * imu.h + * + * Created on: Nov 6, 2018 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ + +#include +#include "xiicps.h" +#include "xparameters.h" + +//insert your imu-code from task 4 + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_IMU_H_ */ + + diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/intr_timer.h b/src/APP/Aufgabe7/ps7/core0/cfg/intr_timer.h new file mode 100644 index 0000000..b7a4302 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/intr_timer.h @@ -0,0 +1,58 @@ +/* + * intr_timer.h + * + * Created on: Nov 13, 2018 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE3_PS7_CORE0_CFG_INTR_TIMER_H_ +/************************** Constant Definitions *****************************/ + +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are only defined here such that a user can easily + * change all the needed parameters in one place. + */ +#define TTC_TICK_DEVICE_ID XPAR_XTTCPS_1_DEVICE_ID +#define TTC_TICK_INTR_ID XPAR_XTTCPS_1_INTR + +#define TTC_PWM_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID +#define TTC_PWM_INTR_ID XPAR_XTTCPS_0_INTR +#define TTCPS_CLOCK_HZ XPAR_XTTCPS_0_CLOCK_HZ + +#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID + +/* + * Constants to set the basic operating parameters. + * PWM_DELTA_DUTY is critical to the running time of the test. Smaller values + * make the test run longer. + */ +#define TICK_TIMER_FREQ_HZ 100 /* Tick timer counter's output frequency */ +#define PWM_OUT_FREQ 350 /* PWM timer counter's output frequency */ + +#define PWM_DELTA_DUTY 50 /* Initial and increment to duty cycle for PWM */ +#define TICKS_PER_CHANGE_PERIOD TICK_TIMER_FREQ_HZ * 5 /* Tick signals PWM */ + + + +/************************** Function Prototypes ******************************/ + +static int TmrInterruptExample(void); /* Main test */ + +/* Set up routines for timer counters */ +static int SetupTicker(void); +static int SetupPWM(void); +static int SetupTimer(int DeviceID); + +/* Interleaved interrupt test for both timer counters */ +static int WaitForDutyCycleFull(void); + +static int SetupInterruptSystem(u16 IntcDeviceID, XScuGic *IntcInstancePtr); + +static void TickHandler(void *CallBackRef); +static void PWMHandler(void *CallBackRef); + + + + +#endif /* SRC_APP_AUFGABE3_PS7_CORE0_CFG_INTR_TIMER_H_ */ diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/lib_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/lib_cfg.h new file mode 100644 index 0000000..cf447ea --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/lib_cfg.h @@ -0,0 +1,171 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find information about uC/LIB by visiting doc.micrium.com. +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* CUSTOM LIBRARY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : lib_cfg.h +* Version : V1.38.01.00 +* Programmer(s) : FBJ +* JFD +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef LIB_CFG_MODULE_PRESENT +#define LIB_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MEMORY LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* MEMORY LIBRARY ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_ARG_CHK_EXT_EN to enable/disable the memory library suite external +* argument check feature : +* +* (a) When ENABLED, arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +********************************************************************************************************* +*/ + + /* External argument check. */ + /* Indicates if arguments received from any port ... */ + /* ... interface provided by the developer or ... */ + /* ... application are checked/validated. */ +#define LIB_MEM_CFG_ARG_CHK_EXT_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY LIBRARY ASSEMBLY OPTIMIZATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_OPTIMIZE_ASM_EN to enable/disable assembly-optimized memory function(s). +********************************************************************************************************* +*/ + + /* Assembly-optimized function(s). */ + /* Enable/disable assembly-optimized memory ... */ + /* ... function(s). [see Note #1] */ +#define LIB_MEM_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + + +/* +********************************************************************************************************* +* MEMORY ALLOCATION CONFIGURATION +* +* Note(s) : (1) Configure LIB_MEM_CFG_DBG_INFO_EN to enable/disable memory allocation usage tracking +* that associates a name with each segment or dynamic pool allocated. +* +* (2) (a) Configure LIB_MEM_CFG_HEAP_SIZE with the desired size of heap memory (in octets). +* +* (b) Configure LIB_MEM_CFG_HEAP_BASE_ADDR to specify a base address for heap memory : +* +* (1) Heap initialized to specified application memory, if LIB_MEM_CFG_HEAP_BASE_ADDR +* #define'd in 'lib_cfg.h'; +* CANNOT #define to address 0x0 +* +* (2) Heap declared to Mem_Heap[] in 'lib_mem.c', if LIB_MEM_CFG_HEAP_BASE_ADDR +* NOT #define'd in 'lib_cfg.h' +********************************************************************************************************* +*/ + + /* Allocation debugging information. */ + /* Enable/disable allocation of debug information ... */ + /* ... associated to each memory allocation. */ +#define LIB_MEM_CFG_DBG_INFO_EN DEF_DISABLED + + + /* Heap memory size (in bytes). */ + /* Configure the desired size of the heap memory. ... */ + /* ... Set to 0 to disable heap allocation features. */ +#define LIB_MEM_CFG_HEAP_SIZE 64*1024 + + + /* Heap memory padding alignment (in bytes). */ + /* Configure the desired size of padding alignment ... */ + /* ... of each buffer allocated from the heap. */ +#define LIB_MEM_CFG_HEAP_PADDING_ALIGN LIB_MEM_PADDING_ALIGN_NONE + +#if 0 /* Remove this to have heap alloc at specified addr. */ +#define LIB_MEM_CFG_HEAP_BASE_ADDR 0 +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* STRING LIBRARY CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* STRING FLOATING POINT CONFIGURATION +* +* Note(s) : (1) Configure LIB_STR_CFG_FP_EN to enable/disable floating point string function(s). +* +* (2) Configure LIB_STR_CFG_FP_MAX_NBR_DIG_SIG to configure the maximum number of significant +* digits to calculate &/or display for floating point string function(s). +* +* See also 'lib_str.h STRING FLOATING POINT DEFINES Note #1'. +********************************************************************************************************* +*/ + + /* Floating point feature(s). */ + /* Enable/disable floating point to string functions. */ +#define LIB_STR_CFG_FP_EN DEF_DISABLED + + + /* Floating point number of significant digits. */ + /* Configure the maximum number of significant ... */ + /* ... digits to calculate &/or display for ... */ + /* ... floating point string function(s). */ +#define LIB_STR_CFG_FP_MAX_NBR_DIG_SIG LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif /* End of lib cfg module include. */ + diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/mmu_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/mmu_cfg.h new file mode 100644 index 0000000..4dda478 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/mmu_cfg.h @@ -0,0 +1,42 @@ +/* + * mmu_cfg.h + * + * Created on: 25.04.2018 + * Author: kaige + */ + +#ifndef SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ +#define SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ + +#include "mmu.h" + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief FIRST LEVEL TRANSLATION TABLE (FTT) +* +* \ingroup PAR_CPU_MMU +* +* This variable represents the first level translation table. Each entry within +* the table represents the configuration of a 1MB memory segment. If a memory +* portion below 1MB must be accessed, the entry represents a pointer to the +* linked coarse page table, which contains the information of that 1MB in detail. +* +* \note This table MUST be aligned at 16kB boundary. +*/ +/*------------------------------------------------------------------------------------------------*/ + +const PAR_MEM_REGION_T PARMemTbl_Core[] = { +/* +-------------------------------------------------------------------------------------------+ +* | virtual | physical | size | owner | permissions | HID Field | +* +-----------+-----------+---------------+------------------+-----------------+--------------+*/ + // First 1MB is marked as non-cacheable/non-bufferable (contains 3x 64KB SRAM @ address 0x00000000 + { 0x00000000, 0x00000000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER_CB | PAR_HID_CACHE_OUTER_CB }, + // DDR Memory is marked as normal (only 512MB for now) + { 0x00100000, 0x00100000, MMU_SIZE_16MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_CACHED_MEMORY | PAR_HID_CACHE_INNER___ | PAR_HID_CACHE_OUTER___ }, + // Device section + { 0xE0000000, 0xE0000000, MMU_SIZE_512MB-MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_EXCLUSIVE_SYS_DEVICE }, + // Upper 1MB section contains 1x 64KB SRAM @ address 0xFFFF0000 + { 0xFFF00000, 0xFFF00000, MMU_SIZE_1MB, PAR_AP_PRW__URW_, PAR_HID_TEX_CB_OUT_IN_NON_CACHABLE } +}; + +#endif /* SRC_APP_LWIPREWORK_PS7_CORE0_CFG_MMU_CFG_H_ */ diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/net_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/net_cfg.h new file mode 100644 index 0000000..ee42e1f --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/net_cfg.h @@ -0,0 +1,676 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_cfg.h +* Version : V3.03.01 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_CFG_MODULE_PRESENT +#define NET_CFG_MODULE_PRESENT + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK EXTERNAL APPLICATION CONFIGURATION +* +* Note(s) : (1) When uC/DNS-Client is present in the project some high level functions can resolve hostname. +* So uC/TCPIP should know that uC/DNS-Client is present to call the proper API. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure DNS Client feature (see Note #1) : */ +#define NET_EXT_MODULE_CFG_DNS_EN DEF_ENABLED + /* DEF_DISABLED DNS Client is DISABLED */ + /* DEF_ENABLED DNS Client is ENABLED */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS CONFIGURATION +* +* Note(s) : (1) (a) Each network task maps to a unique, developer-configured task configuration that +* MUST be defined in application files, typically 'net_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to Net_Init(). +* +* (b) Since these task configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. +********************************************************************************************************* +********************************************************************************************************* +*/ + +extern const NET_TASK_CFG NetRxTaskCfg; +extern const NET_TASK_CFG NetTxDeallocTaskCfg; +extern const NET_TASK_CFG NetTmrTaskCfg; + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TASKS Q CONFIGURATION +* +* Note(s) : (1) Rx queue size should be configured such that it reflects the total number of DMA receive descriptors on all +* devices. If DMA is not available, or a combination of DMA and I/O based interfaces are configured then this +* number reflects the maximum number of packets that can be acknowledged and signalled during a single receive +* interrupt event for all interfaces. +* +* (2) Tx queue size should be defined to be the total number of small and large transmit buffers declared for +* all interfaces. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_CFG_IF_RX_Q_SIZE 100 +#define NET_CFG_IF_TX_DEALLOC_Q_SIZE 100 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK CONFIGURATION +* +* Note(s) : (1) uC/TCP-IP code may call optimized assembly functions. Optimized assembly files/functions must be included +* in the project to be enabled. Optimized functions are located in files under folders: +* +* $uC-TCPIP/Ports// +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network protocol suite's assembly ... */ + /* ... optimization (see Note #1) : */ +#define NET_CFG_OPTIMIZE_ASM_EN DEF_DISABLED + /* DEF_DISABLED Assembly optimization DISABLED */ + /* DEF_ENABLED Assembly optimization ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEBUG CONFIGURATION +* +* Note(s) : (1) Configure NET_DBG_CFG_MEM_CLR_EN to enable/disable the network protocol suite from clearing +* internal data structure memory buffers; a convenient feature while debugging. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure memory clear feature (see Note #1) : */ +#define NET_DBG_CFG_MEM_CLR_EN DEF_DISABLED + /* DEF_DISABLED Data structure clears DISABLED */ + /* DEF_ENABLED Data structure clears ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK ARGUMENT CHECK CONFIGURATION +* +* Note(s) : (1) Configure NET_ERR_CFG_ARG_CHK_EXT_EN to enable/disable the network protocol suite external +* argument check feature : +* +* (a) When ENABLED, ALL arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (b) When DISABLED, NO arguments received from any port interface provided by the developer +* or application are checked/validated. +* +* (2) Configure NET_ERR_CFG_ARG_CHK_DBG_EN to enable/disable the network protocol suite internal, +* debug argument check feature : +* +* (a) When ENABLED, internal arguments are checked/validated to debug the network protocol +* suite. +* +* (b) When DISABLED, NO internal arguments are checked/validated to debug the network protocol +* suite. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure external argument check feature ... */ + /* ... (see Note #1) : */ +#define NET_ERR_CFG_ARG_CHK_EXT_EN DEF_ENABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + /* Configure internal argument check feature ... */ + /* ... (see Note #2) : */ +#define NET_ERR_CFG_ARG_CHK_DBG_EN DEF_DISABLED + /* DEF_DISABLED Argument check DISABLED */ + /* DEF_ENABLED Argument check ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK COUNTER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_CTR_CFG_STAT_EN to enable/disable network protocol suite statistics counters. +* +* (2) Configure NET_CTR_CFG_ERR_EN to enable/disable network protocol suite error counters. +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure statistics counter feature (see Note #1) : */ +#define NET_CTR_CFG_STAT_EN DEF_DISABLED + /* DEF_DISABLED Stat counters DISABLED */ + /* DEF_ENABLED Stat counters ENABLED */ + + /* Configure error counter feature (see Note #2) : */ +#define NET_CTR_CFG_ERR_EN DEF_DISABLED + /* DEF_DISABLED Error counters DISABLED */ + /* DEF_ENABLED Error counters ENABLED */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK TIMER MANAGEMENT CONFIGURATION +* +* Note(s) : (1) Configure NET_TMR_CFG_NBR_TMR with the desired number of network TIMER objects. +* +* Timers are required for : +* +* (a) ARP & NDP cache entries +* (b) IP fragment reassembly +* (c) TCP state machine connections +* (d) IF Link status check-up +* +* (2) Configure NET_TMR_CFG_TASK_FREQ to schedule the execution frequency of the network timer +* task -- how often NetTmr_TaskHandler() is scheduled to run per second as implemented in +* NetTmr_Task(). +* +* (a) NET_TMR_CFG_TASK_FREQ MUST NOT be configured as a floating-point frequency. +* +* See also 'net_tmr.h NETWORK TIMER TASK TIME DEFINES Notes #1 & #2' +* & 'net_tmr.c NetTmr_Task() Notes #1 & #2'. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_TMR_CFG_NBR_TMR 100 +#define NET_TMR_CFG_TASK_FREQ 10 + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK INTERFACE LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_IF_CFG_MAX_NBR_IF 1 + + /* Configure specific interface(s) : */ +#define NET_IF_CFG_LOOPBACK_EN DEF_DISABLED + +#define NET_IF_CFG_ETHER_EN DEF_ENABLED + +#define NET_IF_CFG_WIFI_EN DEF_DISABLED + /* DEF_DISABLED Interface type DISABLED */ + /* DEF_ENABLED interface type ENABLED */ + +#define NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* ADDRESS RESOLUTION PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Address resolution protocol ONLY required for IPv4. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_ARP_CFG_CACHE_NBR 3 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NEIGHBOR DISCOVERY PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Neighbor Discovery Protocol ONLY required for IPv6. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_NDP_CFG_CACHE_NBR 5 +#define NET_NDP_CFG_DEST_NBR 5 +#define NET_NDP_CFG_PREFIX_NBR 5 +#define NET_NDP_CFG_ROUTER_NBR 1 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET PROTOCOL LAYER VERSION CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* IPv4 +********************************************************************************************************* +*/ + /* Configure IPv4. */ +#define NET_IPv4_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv4 disabled. */ + /* DEF_ENABLED IPv4 enabled. */ + + +#define NET_IPv4_CFG_IF_MAX_NBR_ADDR 1 + +/* +********************************************************************************************************* +* IPv6 +********************************************************************************************************* +*/ + + /* Configure IPv6. */ +#define NET_IPv6_CFG_EN DEF_DISABLED + /* DEF_DISABLED IPv6 disabled. */ + /* DEF_ENABLED IPv6 enabled. */ + + /* Configure IPv6 Stateless Address Auto-Configuration. */ +#define NET_IPv6_CFG_ADDR_AUTO_CFG_EN DEF_ENABLED + /* DEF_DISABLED IPv6 Auto-Cfg disabled. */ + /* DEF_ENABLED IPv6 Auto-Cfg enabled. */ + + /* Configure IPv6 Duplication Address Detection (DAD). */ +#define NET_IPv6_CFG_DAD_EN DEF_ENABLED + /* DEF_DISABLED IPv6 DAD disabled. */ + /* DEF_ENABLED IPv6 DAD enabled. */ + +#define NET_IPv6_CFG_IF_MAX_NBR_ADDR 2 + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERNET GROUP MANAGEMENT PROTOCOL(MULTICAST) LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure IPv4 multicast support : */ +#define NET_MCAST_CFG_IPv4_RX_EN DEF_ENABLED +#define NET_MCAST_CFG_IPv4_TX_EN DEF_ENABLED + /* DEF_DISABLED Multicast rx or tx disabled. */ + /* DEF_ENABLED Multicast rx or tx enabled. */ + +#define NET_MCAST_CFG_HOST_GRP_NBR_MAX 2 + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SOCKET LAYER CONFIGURATION +* +* Note(s) : (1) The maximum accept queue size represents the number of connection that can be queued by +* the stack before being accepted. For a TCP server when a connection is queued, it means +* that the SYN, ACK packet has been sent back, so the remote host can start transmitting +* data once the connection is queued and the stack will queue up all data received until +* the connection is accepted and the data is read. +* +* (2) Receive and transmit queue size MUST be properly configured to optimize performance. +* +* (a) It represents the number of bytes that can be queued by one socket. It's important +* that all socket are not able to queue more data than what the device can hold in its +* buffers. +* +* (b) The size should be also a multiple of the maximum segment size (MSS) to optimize +* performance. UDP MSS is 1470 and TCP MSS is 1460. +* +* (c) RX and TX queue size can be reduce at runtime using socket option API. +* +* (d) Window calculation example: +* +* Number of TCP connection : 2 +* Number of UDP connection : 0 +* Number of RX large buffer : 10 +* Number of TX Large buffer : 6 +* Number of TX small buffer : 2 +* Size of RX large buffer : 1518 +* Size of TX large buffer : 1518 +* Size of TX small buffer : 60 +* +* TCP MSS RX = 1460 +* TCP MSS TX large buffer = 1460 +* TCP MSS TX small buffer = 0 +* +* Maximum receive window = (10 * 1460) = 14600 bytes +* Maximum transmit window = (6 * 1460) + (2 * 0) = 8760 bytes +* +* RX window size per socket = (14600 / 2) = 7300 bytes +* TX window size per socket = (8760 / 2) = 4380 bytes +********************************************************************************************************* +********************************************************************************************************* +*/ + +#define NET_SOCK_CFG_SOCK_NBR_TCP 2 +#define NET_SOCK_CFG_SOCK_NBR_UDP 1 + + /* Configure socket select functionality : */ +#define NET_SOCK_CFG_SEL_EN DEF_ENABLED + /* DEF_DISABLED Socket select DISABLED */ + /* DEF_ENABLED Socket select ENABLED */ + + /* Configure stream-type sockets' accept queue */ +#define NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX 2 + + + /* Configure sockets' buffer sizes in number of octets */ + /* (see Note #2): */ +#define NET_SOCK_CFG_RX_Q_SIZE_OCTET 4096 +#define NET_SOCK_CFG_TX_Q_SIZE_OCTET 4096 + + +/* ================================== ADVANCED SOCKET CONFIGURATION: DEFAULT VALUES ================================== */ +/* By default sockets are set to block. Add the following define to set all sockets as non-blocking. Note that it's */ +/* possible to change socket's blocking mode at runtime using socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_NO_BLOCK_EN DEF_ENABLED */ +/* */ +/* By default random port start at 65000, redefine the following define to modify where random port start: */ +/* */ +/* #define NET_SOCK_DFLT_PORT_NBR_RANDOM_BASE 65000u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeouts. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* */ +/* #define NET_SOCK_DFLT_TIMEOUT_RX_Q_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS 10000u */ +/* #define NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS 10000u */ +/* ==================================================================================================================== */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* TRANSMISSION CONTROL PROTOCOL LAYER CONFIGURATION +********************************************************************************************************* +********************************************************************************************************* +*/ + + /* Configure TCP support : */ +#define NET_TCP_CFG_EN DEF_ENABLED + /* DEF_DISABLED TCP layer DISABLED */ + /* DEF_ENABLED TCP layer ENABLED */ + +/* ========================================= ADVANCED TCP LAYER CONFIGURATION ========================================= */ +/* By default TCP RX and TX windows are set to equal the socket RX and TX queue sizes. Default values can be changed by */ +/* redefining the following defines. TCP windows must be properly configured to optimize performance (see note about */ +/* Socket TX and RX windows). Note that it's possible to decrease window size at run time using Socket option API. */ +/* */ +/* #define NET_TCP_DFLT_RX_WIN_SIZE_OCTET NET_SOCK_CFG_RX_Q_SIZE_OCTET */ +/* #define NET_TCP_DFLT_TX_WIN_SIZE_OCTET NET_SOCK_CFG_TX_Q_SIZE_OCTET */ +/* */ +/* As shown in the TCP state diagram (see RFC #793), before moving from 'TIME-WAIT' state to 'CLOSED' state a timeout */ +/* (2MSL) must expire. This means that the TCP connection cannot be made available for subsequent TCP connections until */ +/* this timeout. It can be a problem for embedded systems with low resources especially when many TCP connections are */ +/* made in a small period of time since it is possible to run out of free TCP connections quickly. Therefore this */ +/* timeout is set to 0 by default to avoid this kind of problem and the connection is made available as soon as the */ +/* 'TIME-WAIT' state is reached. However, it's possible to set the default MSL timeout to something else by redefining */ +/* the following define. Note that it is possible to change the MSL timeout for a specific TCP connection using Socket */ +/* option API. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC 0u */ +/* */ +/* To avoid leaving a connection in the FIN_WAIT_2 state forever when a connection moves from the 'FIN_WAIT_1' state to */ +/* the FIN_WAIT_2, the TCP connection's timer is set to 15 second, and when it expires the connection is dropped. Thus, */ +/* if the other host doesn't response to the close request, the connection will still be closed after the timeout. */ +/* This default timeout can be change by redefining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC 15u */ +/* */ +/* The number of TCP connections is configured following the number of TCP sockets and the accept queue size when the */ +/* MSL is set to 0 ms. However, since the default MSL can be modified, it might be needed to increase the number of TCP */ +/* connections to establish more connections when waiting for the MSL expiration. It is possible to add more TCP */ +/* connections by defining the following define. */ +/* */ +/* #define NET_TCP_CFG_NBR_CONN 0u */ +/* */ +/* By default an 'ACK' is generated within 500 ms of the arrival of the first unacknowledged packet, as specified in */ +/* RFC #2581, Section 4.2. However it's possible to modify this value by defining the following define. */ +/* */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS 500u */ +/* */ +/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to */ +/* change default timeout. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE, */ +/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API. */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS 1000u */ +/* #define NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS 1000u */ +/* ==================================================================================================================== */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* USER DATAGRAM PROTOCOL LAYER CONFIGURATION +* +* Note(s) : (1) Configure NET_UDP_CFG_APP_API_SEL with the desired configuration for demultiplexing +* UDP datagrams to application connections : +* +* NET_UDP_APP_API_SEL_SOCK Demultiplex UDP datagrams to BSD sockets ONLY. +* NET_UDP_APP_API_SEL_APP Demultiplex UDP datagrams to application-specific +* connections ONLY. +* NET_UDP_APP_API_SEL_SOCK_APP Demultiplex UDP datagrams to BSD sockets first; +* if NO socket connection found to demultiplex +* a UDP datagram, demultiplex to application- +* specific connection. +* +* See also 'net_udp.c NetUDP_RxPktDemuxDatagram() Note #1' +* & 'net_udp.c NetUDP_RxPktDemuxAppData() Note #1'. +* +* (2) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally ... discard +* ... [or allow] ... received ... UDP datagrams without checksums". +* +* (b) Configure NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN to enable/disable discarding of UDP +* datagrams received with NO computed check-sum : +* +* (1) When ENABLED, ALL UDP datagrams received without a check-sum are discarded. +* +* (2) When DISABLED, ALL UDP datagrams received without a check-sum are flagged so +* that application(s) may handle &/or discard. +* +* See also 'net_udp.c NetUDP_RxPktValidate() Note #4d3A'. +* +* (3) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally be able to +* control whether a UDP checksum will be generated". +* +* (b) Configure NET_UDP_CFG_TX_CHK_SUM_EN to enable/disable transmitting UDP datagrams +* with check-sums : +* +* (1) When ENABLED, ALL UDP datagrams are transmitted with a computed check-sum. +* +* (2) When DISABLED, ALL UDP datagrams are transmitted without a computed check-sum. +* +* See also 'net_udp.c NetUDP_TxPktPrepareHdr() Note #3b'. +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure UDP Receive Check-Sum Discard feature ... */ + /* ... (see Note #2b) : */ +#define NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN DEF_DISABLED + /* DEF_DISABLED UDP Check-Sums Received without ... */ + /* Check-Sums Validated */ + /* DEF_ENABLED UDP Datagrams Received without ... */ + /* Check-Sums Discarded */ + + /* Configure UDP Transmit Check-Sum feature ... */ + /* ... (see Note #3b) : */ +#define NET_UDP_CFG_TX_CHK_SUM_EN DEF_DISABLED + /* DEF_DISABLED Transmit Check-Sums DISABLED */ + /* DEF_ENABLED Transmit Check-Sums ENABLED */ + + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK SECURITY MANAGER CONFIGURATION +* +* Note(s): (1) The network security layer can be enabled ONLY if the application project contains a secure module +* supported by uC/TCPIP such as: +* +* (a) NanoSSL provided by Mocana. +* (b) CyaSSL provided by YaSSL. +* +* (2) The network security port must be also added to the project. Security port can be found under the folder: +* +* $uC-TCPIP/Secure/ +********************************************************************************************************* +********************************************************************************************************* +*/ + /* Configure network security layer (See Note #1 & #2): */ +#define NET_SECURE_CFG_EN DEF_DISABLED + /* DEF_DISABLED Security layer DISABLED */ + /* DEF_ENABLED Security layer ENABLED */ + +#define NET_SECURE_CFG_MAX_NBR_SOCK_SERVER 2u /* Configure total number of server secure sockets. */ +#define NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT 2u /* Configure total number of client secure sockets. */ + +#define NET_SECURE_CFG_MAX_CERT_LEN 1500u /* Configure servers certificate maximum length (bytes) */ +#define NET_SECURE_CFG_MAX_KEY_LEN 1500u /* Configure servers key maximum length (bytes) */ + + /* Configure maximum number of certificate authorities */ +#define NET_SECURE_CFG_MAX_NBR_CA 1u /* that can be installed. */ + +#define NET_SECURE_CFG_MAX_CA_CERT_LEN 1500u /* Configure CA certificate maximum length (bytes) */ + + + +/* +********************************************************************************************************* +********************************************************************************************************* +* INTERFACE CHECKSUM OFFLOAD CONFIGURATION +* +* Note(s): (1) These configuration can be enabled only if all your interfaces support specific checksum offload +* option. +* +* (2) By default a driver should enabled the all checksum offload option. +********************************************************************************************************* +********************************************************************************************************* +*/ +/* ========================================== ADVANCED OFFLOAD CONFIGURATION ========================================== */ +/* By default all checksum are validated by the stack however it is possible to enable or disable specific checksum */ +/* validate and calculation if the interface controller is able to achieve it. You can add the following define in this */ +/* file to change the default behavior. */ +/* */ +/* -------------------------------------------------- IPv4 CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* -------------------------------------------------- ICMP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- UDP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* */ +/* */ +/* --------------------------------------------------- TCP CHECKSUM --------------------------------------------------- */ +/* Configure validation in reception. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED */ +/* */ +/* Configure calculation in transmission. */ +/* #define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED */ +/* ==================================================================================================================== */ + + +/* ======================================================= END ======================================================== */ +#endif /* NET_CFG_MODULE_PRESENT */ + +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN DEF_DISABLED +#define NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN DEF_DISABLED diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h new file mode 100644 index 0000000..cb76d08 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/net_xil_ether_lite_dev_cfg.h @@ -0,0 +1,115 @@ +/* +********************************************************************************************************* +* uC/TCP-IP +* The Embedded TCP/IP Suite +* +* (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/TCP-IP is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at: https://doc.micrium.com +* +* You can contact us at: http://www.micrium.com +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* NETWORK DEVICE CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : net_dev_cfg.h +* Version : V3.00.00 +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE +* +* Note(s) : (1) This network device configuration header file is protected from multiple pre-processor +* inclusion through use of the network module present pre-processor macro definition. +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifndef NET_DEV_CFG_MODULE_PRESENT /* See Note #1. */ +#define NET_DEV_CFG_MODULE_PRESENT + +#include + +#ifdef NET_IF_ETHER_MODULE_EN +#include +#endif + +#ifdef NET_IF_WIFI_MODULE_EN +#include +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* NETWORK DEVICE CONFIGURATION +* +* Note(s) : (1) (a) Each network device maps to a unique, developer-configured device configuration that +* MUST be defined in application files, typically 'net_dev_cfg.c', & SHOULD be forward- +* declared with the exact same name & type in order to be used by the application during +* calls to NetIF_Add(). +* +* (b) Since these device configuration structures are referenced ONLY by application files, +* there is NO required naming convention for these configuration structures. However, +* the following naming convention is suggested for all developer-configured network +* device configuration structures : +* +* NetDev_Cfg_[_Number] +* +* where +* Name of device or device driver +* [Number] Network device number for each specific instance of +* device (optional if the development board does NOT +* support multiple instances of the specific device) +* +* Examples : +* +* NET_DEV_CFG_ETHER NetDev_Cfg_MACB; Ethernet configuration for MACB +* +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_0; Ethernet configuration for FEC #0 +* NET_DEV_CFG_ETHER NetDev_Cfg_FEC_1; Ethernet configuration for FEC #1 +* +* NET_DEV_CFG_WIFI NetDev_Cfg_RS9110N21_0; Wireless configuration for RS9110-N-21 +********************************************************************************************************* +********************************************************************************************************* +*/ + +#ifdef NET_IF_ETHER_MODULE_EN + +extern NET_DEV_CFG_ETHER NetDev_AXIEthernetLite_0; +extern NET_PHY_CFG_ETHER NetPhy_Cfg_Ether_0; + +#endif /* NET_IF_ETHER_MODULE_EN */ + + +/* +********************************************************************************************************* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +********************************************************************************************************* +*/ + +#endif /* NET_DEV_CFG_MODULE_PRESENT */ + diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/os_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/os_cfg.h new file mode 100644 index 0000000..a25fa55 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/os_cfg.h @@ -0,0 +1,145 @@ +/* +********************************************************************************************************* +* uC/OS-II +* The Real-Time Kernel +* uC/OS-II Configuration File for V2.9x +* +* (c) Copyright 2005-2014, Micrium, Weston, FL +* All Rights Reserved +* +* +* File : OS_CFG.H +* By : Jean J. Labrosse +* Version : V2.92.11 +* +* LICENSING TERMS: +* --------------- +* uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research. +* If you plan on using uC/OS-II in a commercial product you need to contact Micrium to properly license +* its use in your product. We provide ALL the source code for your convenience and to help you experience +* uC/OS-II. The fact that the source is provided does NOT mean that you can use it without paying a +* licensing fee. +********************************************************************************************************* +*/ + +#ifndef OS_CFG_H +#define OS_CFG_H + + + /* ---------------------- MISCELLANEOUS ----------------------- */ +#define OS_APP_HOOKS_EN 1u /* Application-defined hooks are called from the uC/OS-II hooks */ +#define OS_ARG_CHK_EN 0u /* Enable (1) or Disable (0) argument checking */ +#define OS_CPU_HOOKS_EN 1u /* uC/OS-II hooks are found in the processor port files */ + +#define OS_DEBUG_EN 1u /* Enable(1) debug variables */ + +#define OS_EVENT_MULTI_EN 1u /* Include code for OSEventPendMulti() */ +#define OS_EVENT_NAME_EN 1u /* Enable names for Sem, Mutex, Mbox and Q */ + +#define OS_LOWEST_PRIO 63u /* Defines the lowest priority that can be assigned ... */ + /* ... MUST NEVER be higher than 254! */ + +#define OS_MAX_EVENTS 20u /* Max. number of event control blocks in your application */ +#define OS_MAX_FLAGS 5u /* Max. number of Event Flag Groups in your application */ +#define OS_MAX_MEM_PART 5u /* Max. number of memory partitions */ +#define OS_MAX_QS 6u /* Max. number of queue control blocks in your application */ +#define OS_MAX_TASKS 20u /* Max. number of tasks in your application, MUST be >= 2 */ + +#define OS_SCHED_LOCK_EN 1u /* Include code for OSSchedLock() and OSSchedUnlock() */ + +#define OS_TICK_STEP_EN 1u /* Enable tick stepping feature for uC/OS-View */ +#define OS_TICKS_PER_SEC 1000u /* Set the number of ticks in one second */ + +#define OS_TLS_TBL_SIZE 0u /* Size of Thread-Local Storage Table */ + + + /* --------------------- TASK STACK SIZE ---------------------- */ +#define OS_TASK_TMR_STK_SIZE 128u /* Timer task stack size (# of OS_STK wide entries) */ +#define OS_TASK_STAT_STK_SIZE 128u /* Statistics task stack size (# of OS_STK wide entries) */ +#define OS_TASK_IDLE_STK_SIZE 128u /* Idle task stack size (# of OS_STK wide entries) */ + + + /* --------------------- TASK MANAGEMENT ---------------------- */ +#define OS_TASK_CHANGE_PRIO_EN 1u /* Include code for OSTaskChangePrio() */ +#define OS_TASK_CREATE_EN 1u /* Include code for OSTaskCreate() */ +#define OS_TASK_CREATE_EXT_EN 1u /* Include code for OSTaskCreateExt() */ +#define OS_TASK_DEL_EN 1u /* Include code for OSTaskDel() */ +#define OS_TASK_NAME_EN 1u /* Enable task names */ +#define OS_TASK_PROFILE_EN 1u /* Include variables in OS_TCB for profiling */ +#define OS_TASK_QUERY_EN 1u /* Include code for OSTaskQuery() */ +#define OS_TASK_REG_TBL_SIZE 1u /* Size of task variables array (#of INT32U entries) */ +#define OS_TASK_STAT_EN 1u /* Enable (1) or Disable(0) the statistics task */ +#define OS_TASK_STAT_STK_CHK_EN 1u /* Check task stacks from statistic task */ +#define OS_TASK_SUSPEND_EN 1u /* Include code for OSTaskSuspend() and OSTaskResume() */ +#define OS_TASK_SW_HOOK_EN 1u /* Include code for OSTaskSwHook() */ + + + /* ----------------------- EVENT FLAGS ------------------------ */ +#define OS_FLAG_EN 1u /* Enable (1) or Disable (0) code generation for EVENT FLAGS */ +#define OS_FLAG_ACCEPT_EN 1u /* Include code for OSFlagAccept() */ +#define OS_FLAG_DEL_EN 1u /* Include code for OSFlagDel() */ +#define OS_FLAG_NAME_EN 1u /* Enable names for event flag group */ +#define OS_FLAG_QUERY_EN 1u /* Include code for OSFlagQuery() */ +#define OS_FLAG_WAIT_CLR_EN 1u /* Include code for Wait on Clear EVENT FLAGS */ +#define OS_FLAGS_NBITS 16u /* Size in #bits of OS_FLAGS data type (8, 16 or 32) */ + + + /* -------------------- MESSAGE MAILBOXES --------------------- */ +#define OS_MBOX_EN 1u /* Enable (1) or Disable (0) code generation for MAILBOXES */ +#define OS_MBOX_ACCEPT_EN 1u /* Include code for OSMboxAccept() */ +#define OS_MBOX_DEL_EN 1u /* Include code for OSMboxDel() */ +#define OS_MBOX_PEND_ABORT_EN 1u /* Include code for OSMboxPendAbort() */ +#define OS_MBOX_POST_EN 1u /* Include code for OSMboxPost() */ +#define OS_MBOX_POST_OPT_EN 1u /* Include code for OSMboxPostOpt() */ +#define OS_MBOX_QUERY_EN 1u /* Include code for OSMboxQuery() */ + + + /* --------------------- MEMORY MANAGEMENT -------------------- */ +#define OS_MEM_EN 1u /* Enable (1) or Disable (0) code generation for MEMORY MANAGER */ +#define OS_MEM_NAME_EN 1u /* Enable memory partition names */ +#define OS_MEM_QUERY_EN 1u /* Include code for OSMemQuery() */ + + + /* ---------------- MUTUAL EXCLUSION SEMAPHORES --------------- */ +#define OS_MUTEX_EN 1u /* Enable (1) or Disable (0) code generation for MUTEX */ +#define OS_MUTEX_ACCEPT_EN 1u /* Include code for OSMutexAccept() */ +#define OS_MUTEX_DEL_EN 1u /* Include code for OSMutexDel() */ +#define OS_MUTEX_QUERY_EN 1u /* Include code for OSMutexQuery() */ + + + /* ---------------------- MESSAGE QUEUES ---------------------- */ +#define OS_Q_EN 1u /* Enable (1) or Disable (0) code generation for QUEUES */ +#define OS_Q_ACCEPT_EN 1u /* Include code for OSQAccept() */ +#define OS_Q_DEL_EN 1u /* Include code for OSQDel() */ +#define OS_Q_FLUSH_EN 1u /* Include code for OSQFlush() */ +#define OS_Q_PEND_ABORT_EN 1u /* Include code for OSQPendAbort() */ +#define OS_Q_POST_EN 1u /* Include code for OSQPost() */ +#define OS_Q_POST_FRONT_EN 1u /* Include code for OSQPostFront() */ +#define OS_Q_POST_OPT_EN 1u /* Include code for OSQPostOpt() */ +#define OS_Q_QUERY_EN 1u /* Include code for OSQQuery() */ + + + /* ------------------------ SEMAPHORES ------------------------ */ +#define OS_SEM_EN 1u /* Enable (1) or Disable (0) code generation for SEMAPHORES */ +#define OS_SEM_ACCEPT_EN 1u /* Include code for OSSemAccept() */ +#define OS_SEM_DEL_EN 1u /* Include code for OSSemDel() */ +#define OS_SEM_PEND_ABORT_EN 1u /* Include code for OSSemPendAbort() */ +#define OS_SEM_QUERY_EN 1u /* Include code for OSSemQuery() */ +#define OS_SEM_SET_EN 1u /* Include code for OSSemSet() */ + + + /* --------------------- TIME MANAGEMENT ---------------------- */ +#define OS_TIME_DLY_HMSM_EN 1u /* Include code for OSTimeDlyHMSM() */ +#define OS_TIME_DLY_RESUME_EN 1u /* Include code for OSTimeDlyResume() */ +#define OS_TIME_GET_SET_EN 1u /* Include code for OSTimeGet() and OSTimeSet() */ +#define OS_TIME_TICK_HOOK_EN 1u /* Include code for OSTimeTickHook() */ + + + /* --------------------- TIMER MANAGEMENT --------------------- */ +#define OS_TMR_EN 0u /* Enable (1) or Disable (0) code generation for TIMERS */ +#define OS_TMR_CFG_MAX 16u /* Maximum number of timers */ +#define OS_TMR_CFG_NAME_EN 1u /* Determine timer names */ +#define OS_TMR_CFG_WHEEL_SIZE 7u /* Size of timer wheel (#Spokes) */ +#define OS_TMR_CFG_TICKS_PER_SEC 10u /* Rate at which timer management task runs (Hz) */ + +#endif diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/pid.h b/src/APP/Aufgabe7/ps7/core0/cfg/pid.h new file mode 100644 index 0000000..6b92bda --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/pid.h @@ -0,0 +1,13 @@ +/* + * pid.h + * + * Created on: Jan 28, 2019 + * Author: laurenzb + */ + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ + + + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_PID_H_ */ diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/shell_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/shell_cfg.h new file mode 100644 index 0000000..15e41af --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/shell_cfg.h @@ -0,0 +1,96 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell Utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* +* uC/Shell is provided in source form to registered licensees ONLY. It is +* illegal to distribute this source code to any third party unless you receive +* written permission by an authorized Micrium representative. Knowledge of +* the source code may NOT be used to develop a similar product. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* SHELL UTILITY CONFIGURATION FILE +* +* TEMPLATE +* +* Filename : shell_cfg.h +* Version : V1.03.01 +* Programmer(s) : SR +* FBJ +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* MODULE +********************************************************************************************************* +*/ + +#ifndef SHELL_CFG_H +#define SHELL_CFG_H + + +/* +********************************************************************************************************* +* SHELL +* +* Note(s) : (1) Defines the size of the table used to hold the various modules' command tables. Command +* tables are added using the Shell_CmdTblAdd() function. Once the table is full, it is not +* possible to add any more unless Shell_CmdTblRem() is first called. +* +* (2) Defines the maximum number or argument(s) a command may pass on the string holding the +* complete command. The minimum value is 1. +* +* (3) Defines the maximum length for module command name, including the NULL character. +********************************************************************************************************* +*/ + +#define SHELL_CFG_CMD_TBL_SIZE 3 /* Cfg Shell cmd tbl size (see Note #1). */ +#define SHELL_CFG_CMD_ARG_NBR_MAX 5 /* Cfg cmd max nbr of arg (see Note #2). */ + +#define SHELL_CFG_MODULE_CMD_NAME_LEN_MAX 6 /* Cfg module cmd name len (See Note #3). */ + + +/* +********************************************************************************************************* +* TRACING +********************************************************************************************************* +*/ + +#ifndef TRACE_LEVEL_OFF +#define TRACE_LEVEL_OFF 0u +#endif + +#ifndef TRACE_LEVEL_INFO +#define TRACE_LEVEL_INFO 1u +#endif + +#ifndef TRACE_LEVEL_DBG +#define TRACE_LEVEL_DBG 2u +#endif + +#define SHELL_TRACE_LEVEL TRACE_LEVEL_OFF +#define SHELL_TRACE printf + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ + +#endif \ No newline at end of file diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/terminal_cfg.h b/src/APP/Aufgabe7/ps7/core0/cfg/terminal_cfg.h new file mode 100644 index 0000000..6d35076 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/terminal_cfg.h @@ -0,0 +1,70 @@ +/* +********************************************************************************************************* +* uC/Shell +* Shell utility +* +* (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL +* +* All rights reserved. Protected by international copyright laws. +* Knowledge of the source code may not be used to write a similar +* product. This file may only be used in accordance with a license +* and should not be redistributed in any way. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* TERMINAL +* +* CONFIGURATION TEMPLATE FILE +* +* Filename : terminal_cfg.h +* Version : V1.03.01 +* Programmer(s) : BAN +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* TASKS PRIORITIES +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_PRIO 16u + + +/* +********************************************************************************************************* +* STACK SIZES +* Size of the task stacks (# of OS_STK entries) +********************************************************************************************************* +*/ + +#define TERMINAL_OS_CFG_TASK_STK_SIZE 1024u + + +/* +********************************************************************************************************* +* TERMINAL +* +* Note(s) : (1) Defines the maximum length of a command entered on the terminal, in characters. +* +* (2) Defines the maximum path length of the Current Working Directory (CWD). +* +* (3) Enables/disables command history. +* +* (4) Defines the number of items to hold in the command history. +* +* (5) Defines the length of a item in the command history. If a command is entered into the +* terminal that exceeds this length, then only the first characters, up to this number of +* characters, will be copied into the command history. +********************************************************************************************************* +*/ + +#define TERMINAL_CFG_MAX_CMD_LEN 260u /* Cfg max cmd len (see Note #1). */ +#define TERMINAL_CFG_MAX_PATH_LEN 260u /* Cfg max path len (see Note #2). */ + +#define TERMINAL_CFG_HISTORY_EN DEF_ENABLED /* En/dis history (see Note #3). */ +#define TERMINAL_CFG_HISTORY_ITEMS_NBR 16u /* Cfg nbr history items (see Note #4). */ +#define TERMINAL_CFG_HISTORY_ITEM_LEN 64u /* Cfg history item len (see Note #5). */ diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/ttc_timer.h b/src/APP/Aufgabe7/ps7/core0/cfg/ttc_timer.h new file mode 100644 index 0000000..078d7df --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/ttc_timer.h @@ -0,0 +1,15 @@ +/* + * ttc_timer.h + * + * Created on: Nov 13, 2018 + * Author: laurenzb + */ + +#include + +#ifndef SRC_APP_AUFGABE7_PS7_CORE0_CFG_TTC_TIMER_H_ +#define SRC_APP_AUFGABE7_PS7_CORE0_CFG_TTC_TIMER_H_ + +//insert your timer-code from task 3 + +#endif /* SRC_APP_AUFGABE7_PS7_CORE0_CFG_TTC_TIMER_H_ */ diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/xparameters.h b/src/APP/Aufgabe7/ps7/core0/cfg/xparameters.h new file mode 100644 index 0000000..bf2c811 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/xparameters.h @@ -0,0 +1,704 @@ +/******************************************************************/ + +/* Definition for CPU ID */ +#define XPAR_CPU_ID 0 + +/* Definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_PS7_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_CORTEXA9_0 */ +#define XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687 +#define XPAR_CPU_CORTEXA9_1_CPU_CLK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + +/******************************************************************/ + +#undef DEF_DISABLED +#undef DEF_ENABLED +#define DEF_ENABLED 1 +#define DEF_DISABLED 0 + +#include "xparameters_ps.h" + + + +/******************************************************************/ + +/* Definitions for driver BRAM */ +#define XPAR_XBRAM_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_AXI_BRAM_CTRL_0_DEVICE_ID 0 +#define XPAR_AXI_BRAM_CTRL_0_DATA_WIDTH 32 +#define XPAR_AXI_BRAM_CTRL_0_ECC 0 +#define XPAR_AXI_BRAM_CTRL_0_FAULT_INJECT 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_UE_FAILING_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_STATUS_REGISTERS 0 +#define XPAR_AXI_BRAM_CTRL_0_CE_COUNTER_WIDTH 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_REGISTER 0 +#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_AXI_BRAM_CTRL_0_WRITE_ACCESS 0 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_BASEADDR 0x40000000 +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_HIGHADDR 0x40001FFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_BASEADDR 0xFFFFFFFF +#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_HIGHADDR 0xFFFFFFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_BRAM_CTRL_0 */ +#define XPAR_BRAM_0_DEVICE_ID XPAR_AXI_BRAM_CTRL_0_DEVICE_ID +#define XPAR_BRAM_0_DATA_WIDTH 32 +#define XPAR_BRAM_0_ECC 0 +#define XPAR_BRAM_0_FAULT_INJECT 0 +#define XPAR_BRAM_0_CE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_UE_FAILING_REGISTERS 0 +#define XPAR_BRAM_0_ECC_STATUS_REGISTERS 0 +#define XPAR_BRAM_0_CE_COUNTER_WIDTH 0 +#define XPAR_BRAM_0_ECC_ONOFF_REGISTER 0 +#define XPAR_BRAM_0_ECC_ONOFF_RESET_VALUE 0 +#define XPAR_BRAM_0_WRITE_ACCESS 0 +#define XPAR_BRAM_0_BASEADDR 0x40000000 +#define XPAR_BRAM_0_HIGHADDR 0x40001FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_DDR_0 */ +#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000 +#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x3FFFFFFF + + +/******************************************************************/ + +/* Definitions for driver DEVCFG */ +#define XPAR_XDCFG_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_PS7_DEV_CFG_0_DEVICE_ID 0 +#define XPAR_PS7_DEV_CFG_0_BASEADDR 0xF8007000 +#define XPAR_PS7_DEV_CFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DEV_CFG_0 */ +#define XPAR_XDCFG_0_DEVICE_ID XPAR_PS7_DEV_CFG_0_DEVICE_ID +#define XPAR_XDCFG_0_BASEADDR 0xF8007000 +#define XPAR_XDCFG_0_HIGHADDR 0xF80070FF + + +/******************************************************************/ + +/* Definitions for driver DMAPS */ +#define XPAR_XDMAPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_DMA_NS */ +#define XPAR_PS7_DMA_NS_DEVICE_ID 0 +#define XPAR_PS7_DMA_NS_BASEADDR 0xF8004000 +#define XPAR_PS7_DMA_NS_HIGHADDR 0xF8004FFF + + +/* Definitions for peripheral PS7_DMA_S */ +#define XPAR_PS7_DMA_S_DEVICE_ID 1 +#define XPAR_PS7_DMA_S_BASEADDR 0xF8003000 +#define XPAR_PS7_DMA_S_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_DMA_NS */ +#define XPAR_XDMAPS_0_DEVICE_ID XPAR_PS7_DMA_NS_DEVICE_ID +#define XPAR_XDMAPS_0_BASEADDR 0xF8004000 +#define XPAR_XDMAPS_0_HIGHADDR 0xF8004FFF + +/* Canonical definitions for peripheral PS7_DMA_S */ +#define XPAR_XDMAPS_1_DEVICE_ID XPAR_PS7_DMA_S_DEVICE_ID +#define XPAR_XDMAPS_1_BASEADDR 0xF8003000 +#define XPAR_XDMAPS_1_HIGHADDR 0xF8003FFF + + +/******************************************************************/ + + +/* Definitions for peripheral PS7_AFI_0 */ +#define XPAR_PS7_AFI_0_S_AXI_BASEADDR 0xF8008000 +#define XPAR_PS7_AFI_0_S_AXI_HIGHADDR 0xF8008FFF + + +/* Definitions for peripheral PS7_AFI_1 */ +#define XPAR_PS7_AFI_1_S_AXI_BASEADDR 0xF8009000 +#define XPAR_PS7_AFI_1_S_AXI_HIGHADDR 0xF8009FFF + + +/* Definitions for peripheral PS7_AFI_2 */ +#define XPAR_PS7_AFI_2_S_AXI_BASEADDR 0xF800A000 +#define XPAR_PS7_AFI_2_S_AXI_HIGHADDR 0xF800AFFF + + +/* Definitions for peripheral PS7_AFI_3 */ +#define XPAR_PS7_AFI_3_S_AXI_BASEADDR 0xF800B000 +#define XPAR_PS7_AFI_3_S_AXI_HIGHADDR 0xF800BFFF + + +/* Definitions for peripheral PS7_DDRC_0 */ +#define XPAR_PS7_DDRC_0_S_AXI_BASEADDR 0xF8006000 +#define XPAR_PS7_DDRC_0_S_AXI_HIGHADDR 0xF8006FFF + + +/* Definitions for peripheral PS7_GLOBALTIMER_0 */ +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_BASEADDR 0xF8F00200 +#define XPAR_PS7_GLOBALTIMER_0_S_AXI_HIGHADDR 0xF8F002FF + + +/* Definitions for peripheral PS7_GPV_0 */ +#define XPAR_PS7_GPV_0_S_AXI_BASEADDR 0xF8900000 +#define XPAR_PS7_GPV_0_S_AXI_HIGHADDR 0xF89FFFFF + + +/* Definitions for peripheral PS7_INTC_DIST_0 */ +#define XPAR_PS7_INTC_DIST_0_S_AXI_BASEADDR 0xF8F01000 +#define XPAR_PS7_INTC_DIST_0_S_AXI_HIGHADDR 0xF8F01FFF + + +/* Definitions for peripheral PS7_IOP_BUS_CONFIG_0 */ +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_BASEADDR 0xE0200000 +#define XPAR_PS7_IOP_BUS_CONFIG_0_S_AXI_HIGHADDR 0xE0200FFF + + +/* Definitions for peripheral PS7_OCMC_0 */ +#define XPAR_PS7_OCMC_0_S_AXI_BASEADDR 0xF800C000 +#define XPAR_PS7_OCMC_0_S_AXI_HIGHADDR 0xF800CFFF + + +/* Definitions for peripheral PS7_PL310_0 */ +#define XPAR_PS7_PL310_0_S_AXI_BASEADDR 0xF8F02000 +#define XPAR_PS7_PL310_0_S_AXI_HIGHADDR 0xF8F02FFF + + +/* Definitions for peripheral PS7_PMU_0 */ +#define XPAR_PS7_PMU_0_S_AXI_BASEADDR 0xF8891000 +#define XPAR_PS7_PMU_0_S_AXI_HIGHADDR 0xF8891FFF +#define XPAR_PS7_PMU_0_PMU1_S_AXI_BASEADDR 0xF8893000 +#define XPAR_PS7_PMU_0_PMU1_S_AXI_HIGHADDR 0xF8893FFF + + +/* Definitions for peripheral PS7_QSPI_LINEAR_0 */ +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_BASEADDR 0xFC000000 +#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_HIGHADDR 0xFDFFFFFF + + +/* Definitions for peripheral PS7_RAM_0 */ +#define XPAR_PS7_RAM_0_S_AXI_BASEADDR 0x00000000 +#define XPAR_PS7_RAM_0_S_AXI_HIGHADDR 0x0003FFFF + + +/* Definitions for peripheral PS7_RAM_1 */ +#define XPAR_PS7_RAM_1_S_AXI_BASEADDR 0xFFFC0000 +#define XPAR_PS7_RAM_1_S_AXI_HIGHADDR 0xFFFFFFFF + + +/* Definitions for peripheral PS7_SLCR_0 */ +#define XPAR_PS7_SLCR_0_S_AXI_BASEADDR 0xF8000000 +#define XPAR_PS7_SLCR_0_S_AXI_HIGHADDR 0xF8000FFF + + +/******************************************************************/ + +/* Definitions for driver GPIO */ +#define XPAR_XGPIO_NUM_INSTANCES 1 + +/* Definitions for peripheral AXI_GPIO_0 */ +#define XPAR_AXI_GPIO_0_BASEADDR 0x41200000 +#define XPAR_AXI_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_AXI_GPIO_0_DEVICE_ID 0 +#define XPAR_AXI_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_AXI_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral AXI_GPIO_0 */ +#define XPAR_GPIO_0_BASEADDR 0x41200000 +#define XPAR_GPIO_0_HIGHADDR 0x4120FFFF +#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID +#define XPAR_GPIO_0_INTERRUPT_PRESENT 0 +#define XPAR_GPIO_0_IS_DUAL 0 + + +/******************************************************************/ + +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +///* Definitions for driver IICPS */ +//#define XPAR_XIICPS_NUM_INSTANCES 1 +// +///* Definitions for peripheral PS7_I2C_0 */ +//#define XPAR_PS7_I2C_0_DEVICE_ID 0 +//#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +//#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +//#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver QSPIPS */ +#define XPAR_XQSPIPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_QSPI_0 */ +#define XPAR_PS7_QSPI_0_DEVICE_ID 0 +#define XPAR_PS7_QSPI_0_BASEADDR 0xE000D000 +#define XPAR_PS7_QSPI_0_HIGHADDR 0xE000DFFF +#define XPAR_PS7_QSPI_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_PS7_QSPI_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_QSPI_0 */ +#define XPAR_XQSPIPS_0_DEVICE_ID XPAR_PS7_QSPI_0_DEVICE_ID +#define XPAR_XQSPIPS_0_BASEADDR 0xE000D000 +#define XPAR_XQSPIPS_0_HIGHADDR 0xE000DFFF +#define XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ 200000000 +#define XPAR_XQSPIPS_0_QSPI_MODE 2 + + +/******************************************************************/ + +/* Definitions for driver SCUWDT */ +#define XPAR_XSCUWDT_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_PS7_SCUWDT_0_DEVICE_ID 0 +#define XPAR_PS7_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_PS7_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUWDT_0 */ +#define XPAR_SCUWDT_0_DEVICE_ID XPAR_PS7_SCUWDT_0_DEVICE_ID +#define XPAR_SCUWDT_0_BASEADDR 0xF8F00620 +#define XPAR_SCUWDT_0_HIGHADDR 0xF8F006FF + + +/******************************************************************/ + +/* Definitions for driver UCOS_EMACPS */ +#define XPAR_UCOS_EMACPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_PS7_ETHERNET_0_DEVICE_ID 0 +#define XPAR_PS7_ETHERNET_0_BASEADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_HIGHADDR 0x00000000 +#define XPAR_PS7_ETHERNET_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_ETHERNET_0 */ +#define XPAR_UCOS_EMACPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_EMACPS_0_DEVICE_ID XPAR_PS7_ETHERNET_0_DEVICE_ID +#define XPAR_UCOS_EMACPS_0_BASEADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_HIGHADDR 0x00000000 +#define XPAR_UCOS_EMACPS_0_CLOCK_FREQ_HZ 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_L2CACHEC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_L2CACHEC_0 */ +#define XPAR_PS7_L2CACHEC_0_DEVICE_ID 0 +#define XPAR_PS7_L2CACHEC_0_BASEADDR 0xF8F02000 +#define XPAR_PS7_L2CACHEC_0_HIGHADDR 0xF8F02FFF + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUC */ +#define XPAR_UCOS_L2CACHEC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUC_0 */ +#define XPAR_PS7_SCUC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUC_0_BASEADDR 0xF8F00000 +#define XPAR_PS7_SCUC_0_HIGHADDR 0xF8F000FC + + +/******************************************************************/ + + +/***Definitions for Core_nIRQ/nFIQ interrupts ****/ +/* Definitions for driver UCOS_SCUGIC */ +#define XPAR_XSCUGIC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_PS7_SCUGIC_0_DEVICE_ID 0 +#define XPAR_PS7_SCUGIC_0_BASEADDR 0xF8F00100 +#define XPAR_PS7_SCUGIC_0_HIGHADDR 0xF8F001FF +#define XPAR_PS7_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SCUGIC_0 */ +#define XPAR_SCUGIC_0_DEVICE_ID 0 +#define XPAR_SCUGIC_0_CPU_BASEADDR 0xF8F00100 +#define XPAR_SCUGIC_0_CPU_HIGHADDR 0xF8F001FF +#define XPAR_SCUGIC_0_DIST_BASEADDR 0xF8F01000 + + +/******************************************************************/ + +/* Definitions for driver UCOS_SCUTIMER */ +#define XPAR_UCOS_SCUC_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SCUTIMER_0 */ +#define XPAR_PS7_SCUTIMER_0_DEVICE_ID 0 +#define XPAR_PS7_SCUTIMER_0_BASEADDR 0xF8F00600 +#define XPAR_PS7_SCUTIMER_0_HIGHADDR 0xF8F0061F + + +/******************************************************************/ + +/* Definitions for driver UCOS_SDPS */ +#define XPAR_UCOS_SDPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_SD_0 */ +#define XPAR_PS7_SD_0_DEVICE_ID 0 +#define XPAR_PS7_SD_0_BASEADDR 0xE0100000 +#define XPAR_PS7_SD_0_HIGHADDR 0xE0100FFF +#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_SD_0 */ +#define XPAR_UCOS_SDPS_0_NUM_INSTANCES 0 +#define XPAR_UCOS_SDPS_0_DEVICE_ID XPAR_PS7_SD_0_DEVICE_ID +#define XPAR_UCOS_SDPS_0_BASEADDR 0xE0100000 +#define XPAR_UCOS_SDPS_0_HIGHADDR 0xE0100FFF +#define XPAR_UCOS_SDPS_0_SDIO_CLK_FREQ_HZ 50000000 + + +/******************************************************************/ + +///* Definitions for driver UCOS_TTCPS */ +//#define XPAR_UCOS_TTCPS_NUM_INSTANCES 3 +// +///* Definitions for peripheral PS7_TTC_0 */ +//#define XPAR_PS7_TTC_0_DEVICE_ID 0 +//#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000 +//#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_1_DEVICE_ID 1 +//#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004 +//#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0 +//#define XPAR_PS7_TTC_2_DEVICE_ID 2 +//#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008 +//#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115 +//#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_UARTPS */ +#define XPAR_UCOS_UARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_UCOS_UARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_UCOS_UARTPS_0_BASEADDR 0xE0001000 +#define XPAR_UCOS_UARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_UCOS_UARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_UCOS_UARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ + +/* Definitions for driver UCOS_USBPS */ +#define XPAR_UCOS_USBPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_USB_0 */ +#define XPAR_PS7_USB_0_DEVICE_ID 0 +#define XPAR_PS7_USB_0_BASEADDR 0xE0002000 +#define XPAR_PS7_USB_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_USB_0 */ +#define XPAR_UCOS_USBPS_0_DEVICE_ID XPAR_PS7_USB_0_DEVICE_ID +#define XPAR_UCOS_USBPS_0_BASEADDR 0xE0002000 +#define XPAR_UCOS_USBPS_0_HIGHADDR 0xE0002FFF + + +/******************************************************************/ + +/* Definitions for driver XADCPS */ +#define XPAR_XADCPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_XADC_0 */ +#define XPAR_PS7_XADC_0_DEVICE_ID 0 +#define XPAR_PS7_XADC_0_BASEADDR 0xF8007100 +#define XPAR_PS7_XADC_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_XADC_0 */ +#define XPAR_XADCPS_0_DEVICE_ID XPAR_PS7_XADC_0_DEVICE_ID +#define XPAR_XADCPS_0_BASEADDR 0xF8007100 +#define XPAR_XADCPS_0_HIGHADDR 0xF8007120 + + +/******************************************************************/ + + +//UCOS STDOUT +#define UCOS_STDOUT_DRIVER UCOS_UART_PS7_UART +#define UCOS_STDOUT_DEVICE_ID 0 +#define STDOUT_BASEADDRESS + +//UCOS Ethernet +#define UCOS_ETHERNET_DRIVER UCOS_ETHERNET_EMACPS + +//UCOS TASK PARAMETERS +#define UCOS_START_TASK_PRIO 5 +#define UCOS_START_TASK_STACK_SIZE 784 +#define UCOS_START_DEBUG_TRACE DEF_ENABLED +#define NET_TASK_CFG_RX_PRIO 30 +#define NET_TASK_CFG_RX_STACK_SIZE 3072 +#define NET_TASK_CFG_TXDEALLOC_PRIO 6 +#define NET_TASK_CFG_TXDEALLOC_STACK_SIZE 2048 +#define NET_TASK_CFG_TMR_PRIO 18 +#define NET_TASK_CFG_TMR_STACK_SIZE 2048 +#define HTTPc_OS_CFG_TASK_PRIO 20 +#define HTTPc_OS_CFG_TASK_STK_SIZE 2048 +#define UCOS_HTTPc_OS_CFG_TASK_DELAY 1 +#define UCOS_HTTPc_OS_CFG_MSG_Q_SIZE 5 +#define UCOS_HTTPc_OS_CFG_TIMEOUT 2000 +#define UCOS_HTTPc_OS_CFG_INACTIVITY_TIMEOUT 30 + +#define UCOS_AMP_MASTER DEF_ENABLED + + +#define UCOS_CFG_INIT_CAN DEF_ENABLED +#define UCOS_CFG_INIT_NET DEF_ENABLED +#define UCOS_CFG_INIT_FS DEF_DISABLED +#define UCOS_CFG_INIT_OPENAMP DEF_DISABLED +#define UCOS_CFG_INIT_USBD DEF_DISABLED +#define UCOS_CFG_INIT_USBH DEF_DISABLED + + +#define UCOS_ETHERNET_ADDRESS "10.10.110.2" +#define UCOS_ETHERNET_GATEWAY "10.10.110.1" +#define UCOS_ETHERNET_SUBMASK "255.255.255.0" +#define UCOS_ETHERNET_DHCP DEF_ENABLED + + +#define UCOS_IF_RX_BUF_NBR 12 +#define UCOS_IF_TX_LARGE_BUF_NBR 8 +#define UCOS_IF_TX_SMALL_BUF_NBR 8 +#define UCOS_IF_RX_DESC_NBR 0 +#define UCOS_IF_TX_DESC_NBR 0 +#define UCOS_IF_DEDIC_MEM_ADDR 0 +#define UCOS_IF_DEDIC_MEM_SIZE 0 +#define UCOS_IF_HW_ADDR "50:E5:49:E6:8D:28" + + +#define UCOS_PHY_BUS_ADDR 255 +#define UCOS_PHY_BUS_MODE UCOS_NET_PHY_BUS_MODE_GMII +#define UCOS_PHY_TYPE UCOS_NET_PHY_TYPE_INT +#define UCOS_PHY_SPEED UCOS_NET_PHY_SPD_AUTO +#define UCOS_PHY_DUPLEX UCOS_NET_PHY_DUPLEX_AUTO + + +#define UCOS_USB_DRIVER UCOS_USB_NONE +#define UCOS_USB_DEVICE_ID 0 +#define UCOS_USB_TYPE UCOS_USB_TYPE_DEVICE + + +#define UCOS_RAMDISK_EN DEF_DISABLED +#define UCOS_RAMDISK_SIZE 128 +#define UCOS_RAMDISK_SECTOR_SIZE 512 +#define UCOS_RAMDISK_BASE_ADDRESS 0 + + +#define UCOS_SDCARD_EN DEF_DISABLED + + +#define XPAR_PS7_ETHERNET_0_INT_SOURCE 54 +#define XPAR_PS7_SD_0_INT_SOURCE 56 +#define XPAR_PS7_UART_1_INT_SOURCE 82 +#define XPAR_PS7_USB_0_INT_SOURCE 53 + +#define UCOS_ZYNQ_CONFIG_MMU DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_MMU DEF_DISABLED +#define UCOS_ZYNQ_CONFIG_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_CACHES DEF_DISABLED +#define UCOS_ZYNQ_ENABLE_OPTIMS DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_I_EN DEF_DISABLED +#define ZYNQ_ENABLE_EARLY_L1_D_EN DEF_DISABLED +#define UCOS_CPU_TYPE UCOS_CPU_TYPE_PS7 + +//Parameters added by Kai Gemlau +#define UCOS_SMP_ENABLE DEF_DISABLED + +/******************************************************************/ + +/* Definitions for driver TTCPS */ +#define XPAR_XTTCPS_NUM_INSTANCES 3U + +/* Definitions for peripheral PS7_TTC_0 */ +#define XPAR_PS7_TTC_0_DEVICE_ID 0U +#define XPAR_PS7_TTC_0_BASEADDR 0XF8001000U +#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_1_DEVICE_ID 1U +#define XPAR_PS7_TTC_1_BASEADDR 0XF8001004U +#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0U +#define XPAR_PS7_TTC_2_DEVICE_ID 2U +#define XPAR_PS7_TTC_2_BASEADDR 0XF8001008U +#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_TTC_0 */ +#define XPAR_XTTCPS_0_DEVICE_ID XPAR_PS7_TTC_0_DEVICE_ID +#define XPAR_XTTCPS_0_BASEADDR 0xF8001000U +#define XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_0_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_1_DEVICE_ID XPAR_PS7_TTC_1_DEVICE_ID +#define XPAR_XTTCPS_1_BASEADDR 0xF8001004U +#define XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_1_TTC_CLK_CLKSRC 0U + +#define XPAR_XTTCPS_2_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define XPAR_XTTCPS_2_BASEADDR 0xF8001008U +#define XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ 111111115U +#define XPAR_XTTCPS_2_TTC_CLK_CLKSRC 0U + + +/******************************************************************/ +/* Definitions for driver GPIOPS */ +#define XPAR_XGPIOPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_GPIO_0 */ +#define XPAR_PS7_GPIO_0_DEVICE_ID 0 +#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000 +#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_GPIO_0 */ +#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID +#define XPAR_XGPIOPS_0_BASEADDR 0xE000A000 +#define XPAR_XGPIOPS_0_HIGHADDR 0xE000AFFF + + +/******************************************************************/ + +/* Definitions for driver IICPS */ +#define XPAR_XIICPS_NUM_INSTANCES 2 + +/* Definitions for peripheral PS7_I2C_0 */ +#define XPAR_PS7_I2C_0_DEVICE_ID 0 +#define XPAR_PS7_I2C_0_BASEADDR 0xE0004000 +#define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF +#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115 + + +/* Definitions for peripheral PS7_I2C_1 */ +#define XPAR_PS7_I2C_1_DEVICE_ID 1 +#define XPAR_PS7_I2C_1_BASEADDR 0xE0005000 +#define XPAR_PS7_I2C_1_HIGHADDR 0xE0005FFF +#define XPAR_PS7_I2C_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_I2C_0 */ +#define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID +#define XPAR_XIICPS_0_BASEADDR 0xE0004000 +#define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF +#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115 + +/* Canonical definitions for peripheral PS7_I2C_1 */ +#define XPAR_XIICPS_1_DEVICE_ID XPAR_PS7_I2C_1_DEVICE_ID +#define XPAR_XIICPS_1_BASEADDR 0xE0005000 +#define XPAR_XIICPS_1_HIGHADDR 0xE0005FFF +#define XPAR_XIICPS_1_I2C_CLK_FREQ_HZ 111111115 + + +/******************************************************************/ + +/* Definitions for driver UARTPS */ +#define XPAR_XUARTPS_NUM_INSTANCES 1 + +/* Definitions for peripheral PS7_UART_1 */ +#define XPAR_PS7_UART_1_DEVICE_ID 0 +#define XPAR_PS7_UART_1_BASEADDR 0xE0001000 +#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF +#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000 +#define XPAR_PS7_UART_1_HAS_MODEM 0 + + +/******************************************************************/ + +/* Canonical definitions for peripheral PS7_UART_1 */ +#define XPAR_XUARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID +#define XPAR_XUARTPS_0_BASEADDR 0xE0001000 +#define XPAR_XUARTPS_0_HIGHADDR 0xE0001FFF +#define XPAR_XUARTPS_0_UART_CLK_FREQ_HZ 50000000 +#define XPAR_XUARTPS_0_HAS_MODEM 0 + + +/******************************************************************/ diff --git a/src/APP/Aufgabe7/ps7/core0/cfg/xparameters_ps.h b/src/APP/Aufgabe7/ps7/core0/cfg/xparameters_ps.h new file mode 100644 index 0000000..e7ab8e3 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/cfg/xparameters_ps.h @@ -0,0 +1,325 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xparameters_ps.h +* +* This file contains the address definitions for the hard peripherals +* attached to the ARM Cortex A9 core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 1.00a ecm/sdm 02/01/10 Initial version
+* 3.04a sdm     02/02/12 Removed some of the defines as they are being generated through
+*                        driver tcl
+* 5.0	pkp		01/16/15 Added interrupt ID definition of ttc for TEST APP
+*
+* +* @note +* +* None. +* +******************************************************************************/ + +#ifndef _XPARAMETERS_PS_H_ +#define _XPARAMETERS_PS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/************************** Constant Definitions *****************************/ + +/* + * This block contains constant declarations for the peripherals + * within the hardblock + */ + +/* Canonical definitions for DDR MEMORY */ +#define XPAR_DDR_MEM_BASEADDR 0x00000000U +#define XPAR_DDR_MEM_HIGHADDR 0x3FFFFFFFU + +/* Canonical definitions for Interrupts */ +#define XPAR_XUARTPS_0_INTR XPS_UART0_INT_ID +#define XPAR_XUARTPS_1_INTR XPS_UART1_INT_ID +#define XPAR_XUSBPS_0_INTR XPS_USB0_INT_ID +#define XPAR_XUSBPS_1_INTR XPS_USB1_INT_ID +#define XPAR_XIICPS_0_INTR XPS_I2C0_INT_ID +#define XPAR_XIICPS_1_INTR XPS_I2C1_INT_ID +#define XPAR_XSPIPS_0_INTR XPS_SPI0_INT_ID +#define XPAR_XSPIPS_1_INTR XPS_SPI1_INT_ID +#define XPAR_XCANPS_0_INTR XPS_CAN0_INT_ID +#define XPAR_XCANPS_1_INTR XPS_CAN1_INT_ID +#define XPAR_XGPIOPS_0_INTR XPS_GPIO_INT_ID +#define XPAR_XEMACPS_0_INTR XPS_GEM0_INT_ID +#define XPAR_XEMACPS_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_XEMACPS_1_INTR XPS_GEM1_INT_ID +#define XPAR_XEMACPS_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_XSDIOPS_0_INTR XPS_SDIO0_INT_ID +#define XPAR_XQSPIPS_0_INTR XPS_QSPI_INT_ID +#define XPAR_XSDIOPS_1_INTR XPS_SDIO1_INT_ID +#define XPAR_XWDTPS_0_INTR XPS_WDT_INT_ID +#define XPAR_XDCFG_0_INTR XPS_DVC_INT_ID +#define XPAR_SCUTIMER_INTR XPS_SCU_TMR_INT_ID +#define XPAR_SCUWDT_INTR XPS_SCU_WDT_INT_ID +#define XPAR_XTTCPS_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_XTTCPS_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_XTTCPS_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_XTTCPS_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_XTTCPS_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_XTTCPS_5_INTR XPS_TTC1_2_INT_ID +#define XPAR_XDMAPS_0_FAULT_INTR XPS_DMA0_ABORT_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_0 XPS_DMA0_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_1 XPS_DMA1_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_2 XPS_DMA2_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_3 XPS_DMA3_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_4 XPS_DMA4_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_5 XPS_DMA5_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_6 XPS_DMA6_INT_ID +#define XPAR_XDMAPS_0_DONE_INTR_7 XPS_DMA7_INT_ID + + +#define XPAR_XQSPIPS_0_LINEAR_BASEADDR XPS_QSPI_LINEAR_BASEADDR +#define XPAR_XPARPORTPS_CTRL_BASEADDR XPS_PARPORT_CRTL_BASEADDR + + + +/* Canonical definitions for DMAC */ + + +/* Canonical definitions for WDT */ + +/* Canonical definitions for SLCR */ +#define XPAR_XSLCR_NUM_INSTANCES 1U +#define XPAR_XSLCR_0_DEVICE_ID 0U +#define XPAR_XSLCR_0_BASEADDR XPS_SYS_CTRL_BASEADDR + +/* Canonical definitions for SCU GIC */ +#define XPAR_SCUGIC_NUM_INSTANCES 1U +#define XPAR_SCUGIC_SINGLE_DEVICE_ID 0U +#define XPAR_SCUGIC_CPU_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000100U) +#define XPAR_SCUGIC_DIST_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00001000U) +#define XPAR_SCUGIC_ACK_BEFORE 0U + +/* Canonical definitions for Global Timer */ +#define XPAR_GLOBAL_TMR_NUM_INSTANCES 1U +#define XPAR_GLOBAL_TMR_DEVICE_ID 0U +#define XPAR_GLOBAL_TMR_BASEADDR (XPS_SCU_PERIPH_BASE + 0x00000200U) +#define XPAR_GLOBAL_TMR_INTR XPS_GLOBAL_TMR_INT_ID + + +/* Xilinx Parallel Flash Library (XilFlash) User Settings */ +#define XPAR_AXI_EMC + + +#define XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ + + +/* + * This block contains constant declarations for the peripherals + * within the hardblock. These have been put for bacwards compatibilty + */ + +#define XPS_PERIPHERAL_BASEADDR 0xE0000000U +#define XPS_UART0_BASEADDR 0xE0000000U +#define XPS_UART1_BASEADDR 0xE0001000U +#define XPS_USB0_BASEADDR 0xE0002000U +#define XPS_USB1_BASEADDR 0xE0003000U +#define XPS_I2C0_BASEADDR 0xE0004000U +#define XPS_I2C1_BASEADDR 0xE0005000U +#define XPS_SPI0_BASEADDR 0xE0006000U +#define XPS_SPI1_BASEADDR 0xE0007000U +#define XPS_CAN0_BASEADDR 0xE0008000U +#define XPS_CAN1_BASEADDR 0xE0009000U +#define XPS_GPIO_BASEADDR 0xE000A000U +#define XPS_GEM0_BASEADDR 0xE000B000U +#define XPS_GEM1_BASEADDR 0xE000C000U +#define XPS_QSPI_BASEADDR 0xE000D000U +#define XPS_PARPORT_CRTL_BASEADDR 0xE000E000U +#define XPS_SDIO0_BASEADDR 0xE0100000U +#define XPS_SDIO1_BASEADDR 0xE0101000U +#define XPS_IOU_BUS_CFG_BASEADDR 0xE0200000U +#define XPS_NAND_BASEADDR 0xE1000000U +#define XPS_PARPORT0_BASEADDR 0xE2000000U +#define XPS_PARPORT1_BASEADDR 0xE4000000U +#define XPS_QSPI_LINEAR_BASEADDR 0xFC000000U +#define XPS_SYS_CTRL_BASEADDR 0xF8000000U /* AKA SLCR */ +#define XPS_TTC0_BASEADDR 0xF8001000U +#define XPS_TTC1_BASEADDR 0xF8002000U +#define XPS_DMAC0_SEC_BASEADDR 0xF8003000U +#define XPS_DMAC0_NON_SEC_BASEADDR 0xF8004000U +#define XPS_WDT_BASEADDR 0xF8005000U +#define XPS_DDR_CTRL_BASEADDR 0xF8006000U +#define XPS_DEV_CFG_APB_BASEADDR 0xF8007000U +#define XPS_AFI0_BASEADDR 0xF8008000U +#define XPS_AFI1_BASEADDR 0xF8009000U +#define XPS_AFI2_BASEADDR 0xF800A000U +#define XPS_AFI3_BASEADDR 0xF800B000U +#define XPS_OCM_BASEADDR 0xF800C000U +#define XPS_EFUSE_BASEADDR 0xF800D000U +#define XPS_CORESIGHT_BASEADDR 0xF8800000U +#define XPS_TOP_BUS_CFG_BASEADDR 0xF8900000U +#define XPS_SCU_PERIPH_BASE 0xF8F00000U +#define XPS_L2CC_BASEADDR 0xF8F02000U +#define XPS_SAM_RAM_BASEADDR 0xFFFC0000U +#define XPS_FPGA_AXI_S0_BASEADDR 0x40000000U +#define XPS_FPGA_AXI_S1_BASEADDR 0x80000000U +#define XPS_IOU_S_SWITCH_BASEADDR 0xE0000000U +#define XPS_PERIPH_APB_BASEADDR 0xF8000000U + +/* Shared Peripheral Interrupts (SPI) */ +#define XPS_CORE_PARITY0_INT_ID 32U +#define XPS_CORE_PARITY1_INT_ID 33U +#define XPS_L2CC_INT_ID 34U +#define XPS_OCMINTR_INT_ID 35U +#define XPS_ECC_INT_ID 36U +#define XPS_PMU0_INT_ID 37U +#define XPS_PMU1_INT_ID 38U +#define XPS_SYSMON_INT_ID 39U +#define XPS_DVC_INT_ID 40U +#define XPS_WDT_INT_ID 41U +#define XPS_TTC0_0_INT_ID 42U +#define XPS_TTC0_1_INT_ID 43U +#define XPS_TTC0_2_INT_ID 44U +#define XPS_DMA0_ABORT_INT_ID 45U +#define XPS_DMA0_INT_ID 46U +#define XPS_DMA1_INT_ID 47U +#define XPS_DMA2_INT_ID 48U +#define XPS_DMA3_INT_ID 49U +#define XPS_SMC_INT_ID 50U +#define XPS_QSPI_INT_ID 51U +#define XPS_GPIO_INT_ID 52U +#define XPS_USB0_INT_ID 53U +#define XPS_GEM0_INT_ID 54U +#define XPS_GEM0_WAKE_INT_ID 55U +#define XPS_SDIO0_INT_ID 56U +#define XPS_I2C0_INT_ID 57U +#define XPS_SPI0_INT_ID 58U +#define XPS_UART0_INT_ID 59U +#define XPS_CAN0_INT_ID 60U +#define XPS_FPGA0_INT_ID 61U +#define XPS_FPGA1_INT_ID 62U +#define XPS_FPGA2_INT_ID 63U +#define XPS_FPGA3_INT_ID 64U +#define XPS_FPGA4_INT_ID 65U +#define XPS_FPGA5_INT_ID 66U +#define XPS_FPGA6_INT_ID 67U +#define XPS_FPGA7_INT_ID 68U +#define XPS_TTC1_0_INT_ID 69U +#define XPS_TTC1_1_INT_ID 70U +#define XPS_TTC1_2_INT_ID 71U +#define XPS_DMA4_INT_ID 72U +#define XPS_DMA5_INT_ID 73U +#define XPS_DMA6_INT_ID 74U +#define XPS_DMA7_INT_ID 75U +#define XPS_USB1_INT_ID 76U +#define XPS_GEM1_INT_ID 77U +#define XPS_GEM1_WAKE_INT_ID 78U +#define XPS_SDIO1_INT_ID 79U +#define XPS_I2C1_INT_ID 80U +#define XPS_SPI1_INT_ID 81U +#define XPS_UART1_INT_ID 82U +#define XPS_CAN1_INT_ID 83U +#define XPS_FPGA8_INT_ID 84U +#define XPS_FPGA9_INT_ID 85U +#define XPS_FPGA10_INT_ID 86U +#define XPS_FPGA11_INT_ID 87U +#define XPS_FPGA12_INT_ID 88U +#define XPS_FPGA13_INT_ID 89U +#define XPS_FPGA14_INT_ID 90U +#define XPS_FPGA15_INT_ID 91U + +/* Private Peripheral Interrupts (PPI) */ +#define XPS_GLOBAL_TMR_INT_ID 27U /* SCU Global Timer interrupt */ +#define XPS_FIQ_INT_ID 28U /* FIQ from FPGA fabric */ +#define XPS_SCU_TMR_INT_ID 29U /* SCU Private Timer interrupt */ +#define XPS_SCU_WDT_INT_ID 30U /* SCU Private WDT interrupt */ +#define XPS_IRQ_INT_ID 31U /* IRQ from FPGA fabric */ + + +/* REDEFINES for TEST APP */ +/* Definitions for UART */ +#define XPAR_PS7_UART_0_INTR XPS_UART0_INT_ID +#define XPAR_PS7_UART_1_INTR XPS_UART1_INT_ID +#define XPAR_PS7_USB_0_INTR XPS_USB0_INT_ID +#define XPAR_PS7_USB_1_INTR XPS_USB1_INT_ID +#define XPAR_PS7_I2C_0_INTR XPS_I2C0_INT_ID +#define XPAR_PS7_I2C_1_INTR XPS_I2C1_INT_ID +#define XPAR_PS7_SPI_0_INTR XPS_SPI0_INT_ID +#define XPAR_PS7_SPI_1_INTR XPS_SPI1_INT_ID +#define XPAR_PS7_CAN_0_INTR XPS_CAN0_INT_ID +#define XPAR_PS7_CAN_1_INTR XPS_CAN1_INT_ID +#define XPAR_PS7_GPIO_0_INTR XPS_GPIO_INT_ID +#define XPAR_PS7_ETHERNET_0_INTR XPS_GEM0_INT_ID +#define XPAR_PS7_ETHERNET_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_PS7_ETHERNET_1_INTR XPS_GEM1_INT_ID +#define XPAR_PS7_ETHERNET_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_PS7_QSPI_0_INTR XPS_QSPI_INT_ID +#define XPAR_PS7_WDT_0_INTR XPS_WDT_INT_ID +#define XPAR_PS7_SCUWDT_0_INTR XPS_SCU_WDT_INT_ID +#define XPAR_PS7_SCUTIMER_0_INTR XPS_SCU_TMR_INT_ID +#define XPAR_PS7_XADC_0_INTR XPS_SYSMON_INT_ID +#define XPAR_PS7_TTC_0_INTR XPS_TTC0_0_INT_ID +#define XPAR_PS7_TTC_1_INTR XPS_TTC0_1_INT_ID +#define XPAR_PS7_TTC_2_INTR XPS_TTC0_2_INT_ID +#define XPAR_PS7_TTC_3_INTR XPS_TTC1_0_INT_ID +#define XPAR_PS7_TTC_4_INTR XPS_TTC1_1_INT_ID +#define XPAR_PS7_TTC_5_INTR XPS_TTC1_2_INT_ID + +#define XPAR_XADCPS_INT_ID XPS_SYSMON_INT_ID + +/* For backwards compatibilty */ +#define XPAR_XUARTPS_0_CLOCK_HZ XPAR_XUARTPS_0_UART_CLK_FREQ_HZ +#define XPAR_XUARTPS_1_CLOCK_HZ XPAR_XUARTPS_1_UART_CLK_FREQ_HZ +#define XPAR_XTTCPS_0_CLOCK_HZ XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_1_CLOCK_HZ XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_2_CLOCK_HZ XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_3_CLOCK_HZ XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_4_CLOCK_HZ XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ +#define XPAR_XTTCPS_5_CLOCK_HZ XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ +#define XPAR_XIICPS_0_CLOCK_HZ XPAR_XIICPS_0_I2C_CLK_FREQ_HZ +#define XPAR_XIICPS_1_CLOCK_HZ XPAR_XIICPS_1_I2C_CLK_FREQ_HZ + +#define XPAR_XQSPIPS_0_CLOCK_HZ XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ + +#define XPAR_SCUTIMER_DEVICE_ID 0U +#define XPAR_SCUWDT_DEVICE_ID 0U + + +#ifdef __cplusplus +} +#endif + +#endif /* protection macro */ diff --git a/src/APP/Aufgabe7/ps7/core0/linker/lscript.ld b/src/APP/Aufgabe7/ps7/core0/linker/lscript.ld new file mode 100644 index 0000000..a9f145a --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/linker/lscript.ld @@ -0,0 +1,291 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: */ +/* */ +/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : Cortex-A9 Linker Script */ +/* */ +/*******************************************************************/ + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000; +_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x2000; + +_ABORT_STACK_SIZE = DEFINED(_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024; +_SUPERVISOR_STACK_SIZE = DEFINED(_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048; +_IRQ_STACK_SIZE = DEFINED(_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024; +_FIQ_STACK_SIZE = DEFINED(_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024; +_UNDEF_STACK_SIZE = DEFINED(_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024; + +/* Define Memories in the system */ + +MEMORY +{ + axi_bram_ctrl_0_Mem0 : ORIGIN = 0x40000000, LENGTH = 0x2000 + ps7_ddr_0 : ORIGIN = 0x100000, LENGTH = 0x3FF00000 + ps7_qspi_linear_0 : ORIGIN = 0xFC000000, LENGTH = 0x2000000 + ps7_ram_0 : ORIGIN = 0x0, LENGTH = 0x30000 + ps7_ram_1 : ORIGIN = 0xFFFF0000, LENGTH = 0xFE00 + ps7_ddr_core_0 : ORIGIN = 0x100000, LENGTH = 0x700000 + ps7_ddr_core_1 : ORIGIN = 0x800000, LENGTH = 0x800000 +} + +/* Specify the default entry point to the program */ + +ENTRY(_vector_table) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ +.text : { + KEEP (*(.vectors)) + *(.boot) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.plt) + *(.gnu_warning) + *(.gcc_execpt_table) + *(.glue_7) + *(.glue_7t) + *(.vfp11_veneer) + *(.ARM.extab) + *(.gnu.linkonce.armextab.*) +} > ps7_ddr_core_0 + +.init : { + KEEP (*(.init)) +} > ps7_ddr_core_0 + +.fini : { + KEEP (*(.fini)) +} > ps7_ddr_core_0 + +.rodata : { + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > ps7_ddr_core_0 + +.rodata1 : { + __rodata1_start = .; + *(.rodata1) + *(.rodata1.*) + __rodata1_end = .; +} > ps7_ddr_core_0 + +.sdata2 : { + __sdata2_start = .; + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + __sdata2_end = .; +} > ps7_ddr_core_0 + +.sbss2 : { + __sbss2_start = .; + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + __sbss2_end = .; +} > ps7_ddr_core_0 + +.data : { + __data_start = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.jcr) + *(.got) + *(.got.plt) + __data_end = .; +} > ps7_ddr_core_0 + +.data1 : { + __data1_start = .; + *(.data1) + *(.data1.*) + __data1_end = .; +} > ps7_ddr_core_0 + +.got : { + *(.got) +} > ps7_ddr_core_0 + +.ctors : { + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > ps7_ddr_core_0 + +.dtors : { + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > ps7_ddr_core_0 + +.fixup : { + __fixup_start = .; + *(.fixup) + __fixup_end = .; +} > ps7_ddr_core_0 + +.eh_frame : { + *(.eh_frame) +} > ps7_ddr_core_0 + +.eh_framehdr : { + __eh_framehdr_start = .; + *(.eh_framehdr) + __eh_framehdr_end = .; +} > ps7_ddr_core_0 + +.gcc_except_table : { + *(.gcc_except_table) +} > ps7_ddr_core_0 + +.mmu_tbl (ALIGN(16384)) : { + __mmu_tbl_start = .; + *(.mmu_tbl) + __mmu_tbl_end = .; +} > ps7_ddr_core_0 + +.ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx*) + *(.gnu.linkonce.armexidix.*.*) + __exidx_end = .; +} > ps7_ddr_core_0 + +.preinit_array : { + __preinit_array_start = .; + KEEP (*(SORT(.preinit_array.*))) + KEEP (*(.preinit_array)) + __preinit_array_end = .; +} > ps7_ddr_core_0 + +.init_array : { + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; +} > ps7_ddr_core_0 + +.fini_array : { + __fini_array_start = .; + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array)) + __fini_array_end = .; +} > ps7_ddr_core_0 + +.ARM.attributes : { + __ARM.attributes_start = .; + *(.ARM.attributes) + __ARM.attributes_end = .; +} > ps7_ddr_core_0 + +.sdata : { + __sdata_start = .; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + __sdata_end = .; +} > ps7_ddr_core_0 + +.sbss (NOLOAD) : { + __sbss_start = .; + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + __sbss_end = .; +} > ps7_ddr_core_0 + +.tdata : { + __tdata_start = .; + *(.tdata) + *(.tdata.*) + *(.gnu.linkonce.td.*) + __tdata_end = .; +} > ps7_ddr_core_0 + +.tbss : { + __tbss_start = .; + *(.tbss) + *(.tbss.*) + *(.gnu.linkonce.tb.*) + __tbss_end = .; +} > ps7_ddr_core_0 + +.bss (NOLOAD) : { + __bss_start = .; + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + __bss_end = .; +} > ps7_ddr_core_0 + +_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 ); + +_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 ); + +/* Generate Stack and Heap definitions */ + +.heap (NOLOAD) : { + . = ALIGN(16); + _heap = .; + HeapBase = .; + _heap_start = .; + . += _HEAP_SIZE; + _heap_end = .; + HeapLimit = .; +} > ps7_ddr_core_0 + +.stack (NOLOAD) : { + . = ALIGN(16); + _stack_end = .; + . += _STACK_SIZE; + . = ALIGN(16); + _stack = .; + __stack = _stack; + . = ALIGN(16); + _irq_stack_end = .; + . += _IRQ_STACK_SIZE; + . = ALIGN(16); + __irq_stack = .; + _supervisor_stack_end = .; + . += _SUPERVISOR_STACK_SIZE; + . = ALIGN(16); + __supervisor_stack = .; + _abort_stack_end = .; + . += _ABORT_STACK_SIZE; + . = ALIGN(16); + __abort_stack = .; + _fiq_stack_end = .; + . += _FIQ_STACK_SIZE; + . = ALIGN(16); + __fiq_stack = .; + _undef_stack_end = .; + . += _UNDEF_STACK_SIZE; + . = ALIGN(16); + __undef_stack = .; +} > ps7_ddr_core_0 + +_end = .; +} + diff --git a/src/APP/Aufgabe7/ps7/core0/main.c b/src/APP/Aufgabe7/ps7/core0/main.c new file mode 100644 index 0000000..72ffda3 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/main.c @@ -0,0 +1,36 @@ +/* + ============================================================================ + Name : main.c + Author : Laurenz Borchers + Version : + Copyright : Copyright belongs to the authors + Description : Self Balancing Robot , Praktikum Aufgabe 7 + ============================================================================ + */ + +#include +#include +#include "ucos_uartps.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "xil_testmem.h" +#include "xil_printf.h" +#include "imu.h" +#include "ttc_timer.h" +#include "gt_core.h" +#include "gt_cpu.h" + + + +void InitDoneCallback(void * p_arg) { + (void) p_arg; + UCOS_Print("OS started!\r\n"); + GT_Init(); +} + +int main(void) { + MMUInit(); + UCOSStartup(InitDoneCallback); + while (1) + ; +} diff --git a/src/APP/Aufgabe7/ps7/core0/src/app_hooks.c b/src/APP/Aufgabe7/ps7/core0/src/app_hooks.c new file mode 100644 index 0000000..99f1f25 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/src/app_hooks.c @@ -0,0 +1,262 @@ +/* +********************************************************************************************************* +* EXAMPLE CODE +* +* This file is provided as an example on how to use Micrium products. +* +* Please feel free to use any application code labeled as 'EXAMPLE CODE' in +* your application products. Example code may be used as is, in whole or in +* part, or may be used as a reference only. This file can be modified as +* required to meet the end-product requirements. +* +* Please help us continue to provide the Embedded community with the finest +* software available. Your honesty is greatly appreciated. +* +* You can find our product's user manual, API reference, release notes and +* more information at https://doc.micrium.com. +* You can contact us at www.micrium.com. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* uC/OS-II +* Application Hooks +* +* Filename : app_hooks.c +* Version : V1.00 +* Programmer(s) : FT +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +*/ + +#include + + +/* +********************************************************************************************************* +* EXTERN GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL CONSTANTS +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL DATA TYPES +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* LOCAL TABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL GLOBAL VARIABLES +********************************************************************************************************* +*/ + + +/* +********************************************************************************************************* +* LOCAL FUNCTION PROTOTYPES +********************************************************************************************************* +*/ + + + +/* +********************************************************************************************************** +********************************************************************************************************** +** GLOBAL FUNCTIONS +********************************************************************************************************** +********************************************************************************************************** +*/ + +/* +********************************************************************************************************* +********************************************************************************************************* +** uC/OS-II APP HOOKS +********************************************************************************************************* +********************************************************************************************************* +*/ + +#if (OS_APP_HOOKS_EN > 0) + +/* +********************************************************************************************************* +* TASK CREATION HOOK (APPLICATION) +* +* Description : This function is called when a task is created. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being created. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskCreateHook (OS_TCB *ptcb) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskCreateHook(ptcb); +#endif +} + +/* +********************************************************************************************************* +* TASK DELETION HOOK (APPLICATION) +* +* Description : This function is called when a task is deleted. +* +* Argument(s) : ptcb is a pointer to the task control block of the task being deleted. +* +* Note(s) : (1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ + +void App_TaskDelHook (OS_TCB *ptcb) +{ + (void)ptcb; +} + +/* +********************************************************************************************************* +* IDLE TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskIdleHook(), which is called by the idle task. This hook +* has been added to allow you to do such things as STOP the CPU to conserve power. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are enabled during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 251 +void App_TaskIdleHook (void) +{ + __asm volatile( "dsb" ); + __asm volatile( "wfi" ); + __asm volatile( "isb" ); +} +#endif + +/* +********************************************************************************************************* +* STATISTIC TASK HOOK (APPLICATION) +* +* Description : This function is called by OSTaskStatHook(), which is called every second by uC/OS-II's +* statistics task. This allows your application to add functionality to the statistics task. +* +* Argument(s) : none. +********************************************************************************************************* +*/ + +void App_TaskStatHook (void) +{ +} + +/* +********************************************************************************************************* +* TASK RETURN HOOK (APPLICATION) +* +* Description: This function is called if a task accidentally returns. In other words, a task should +* either be an infinite loop or delete itself when done. +* +* Arguments : ptcb is a pointer to the task control block of the task that is returning. +* +* Note(s) : none +********************************************************************************************************* +*/ + + +#if OS_VERSION >= 289 +void App_TaskReturnHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TASK SWITCH HOOK (APPLICATION) +* +* Description : This function is called when a task switch is performed. This allows you to perform other +* operations during a context switch. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts are disabled during this call. +* +* (2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that +* will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the +* task being switched out (i.e. the preempted task). +********************************************************************************************************* +*/ + +#if OS_TASK_SW_HOOK_EN > 0 +void App_TaskSwHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN > 0) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TaskSwHook(); +#endif +} +#endif + +/* +********************************************************************************************************* +* OS_TCBInit() HOOK (APPLICATION) +* +* Description : This function is called by OSTCBInitHook(), which is called by OS_TCBInit() after setting +* up most of the TCB. +* +* Argument(s) : ptcb is a pointer to the TCB of the task being created. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_VERSION >= 204 +void App_TCBInitHook (OS_TCB *ptcb) +{ + (void)ptcb; +} +#endif + +/* +********************************************************************************************************* +* TICK HOOK (APPLICATION) +* +* Description : This function is called every tick. +* +* Argument(s) : none. +* +* Note(s) : (1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ + +#if OS_TIME_TICK_HOOK_EN > 0 +void App_TimeTickHook (void) +{ +#if (APP_CFG_PROBE_OS_PLUGIN_EN == DEF_ENABLED) && (OS_PROBE_HOOKS_EN > 0) + OSProbe_TickHook(); +#endif +} +#endif +#endif diff --git a/src/APP/Aufgabe7/ps7/core0/src/gt_tasks.c b/src/APP/Aufgabe7/ps7/core0/src/gt_tasks.c new file mode 100644 index 0000000..822eaf5 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/src/gt_tasks.c @@ -0,0 +1,149 @@ +/* + * gt_tasks.c + * + * Created on: Aug 22, 2014 + * Author: matthiasb + * + */ + +#include "ucos_uartps.h" +#include "xil_printf.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "gt_types.h" +#include "gt_cfg.h" +#include /* rand */ +#include /* memset */ +#include "ttc_timer.h" +#include "imu.h" +#include "pid.h" + +/*-------------------------------Task model internal struct definitions------------------------------- + * Internal task extension struct + */ +typedef struct +{ + CPU_INT32U BCET; + CPU_INT32U WCET; +}GT_WL_CET_T; + +/* + * Internal task extension struct + */ +typedef struct +{ + CPU_INT32U Period; + CPU_INT32U Jitter; + CPU_INT32U Distance; + GT_WL_CET_T CET; +}GT_TASK_EXT_T; + +/*------------------------------------Execution times and periods-------------------------------------*/ +/* + * All times given in (1/10)ms + */ +/* + * Task model + */ +GT_TASK_EXT_T GT_AllTasks[GT_NUM_OF_TASKS] = { +/* P J D BCET WCET */ + {50, 0, 0, {1, 1}}, + {120, 0, 0, {2, 4}}, + {50, 0, 0, {3, 5}}, + //{50, 0, 0, {3, 5}}, +}; + +/*------------------------------------Internal call back functions-------------------------------------*/ +/* + * Function to determine task execution time + */ +static CPU_INT32U _GT_GetTaskCet(GT_TASK_T * pThisTask) +{ + /* + * Simple randomized jitter between BCET and WCET + */ + GT_TASK_EXT_T * pTaskExt = (GT_TASK_EXT_T*)pThisTask->Extension; + CPU_INT32U BCET = pTaskExt->CET.BCET; + CPU_INT32U WCET = pTaskExt->CET.WCET; + return (BCET < WCET) ? (WCET - (rand() % (WCET - BCET))) : WCET; +} + +/* + * Function to determine next task activation + * For this model we use a simple PJD model + */ +static CPU_INT32U _GT_GetNextActivation(GT_TASK_T * pThisTask) +{ + GT_TASK_EXT_T * pTaskExt = (GT_TASK_EXT_T*)pThisTask->Extension; + /* + * Calculate next activation based on PJ Model + */ + CPU_INT32S NextDistance = (pTaskExt->Jitter) ? pTaskExt->Period + (rand()%(pTaskExt->Jitter) - (pTaskExt->Jitter/2)) + : pTaskExt->Period; + /* + * Adjust activation to PJD if needed + */ + return ((CPU_INT32S)pTaskExt->Distance > NextDistance) ? pTaskExt->Distance : (CPU_INT32U)NextDistance; +} + +static CPU_INT32U _GT_ComStackFkt(GT_TASK_T * pThisTask){ +} + +/* + * Main task table, used for GT_Init call + */ +GT_TASK_T GT_Tasks[GT_NUM_OF_TASKS] = +{ + /*Type Activation Type Id Prio Next Activation CET Task init Function Task Function TaskArg D WL/Runable Internal External */ + { GT_TASK_EXT , GT_ACT_INT , 0, 32, _GT_GetNextActivation, _GT_GetTaskCet, your-timer-taskinitfunction ,your-timer_Task , NULL, 50, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[0]}, + { GT_TASK_EXT , GT_ACT_INT , 1, 31, _GT_GetNextActivation, _GT_GetTaskCet, your-imu-taskinitfunction ,your-imu_Task , NULL, 50, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[1]}, + { GT_TASK_EXT , GT_ACT_INT , 2, 33, _GT_GetNextActivation, _GT_GetTaskCet, your-pid-taskinitfunction ,your-pid_Task , NULL, 20, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[2]}, + //{ GT_TASK_DEF , GT_ACT_INT , 3, 33, _GT_GetNextActivation, _GT_GetTaskCet, NULL ,NULL , NULL, 20, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[3]}, + +}; + +void GT_T00_Start(void){ + asm volatile("nop"); +} + +void GT_T01_Start(void){ + asm volatile("nop"); +} + +void GT_T02_Start(void){ + asm volatile("nop"); +} + +void GT_T00_Stop(void){ + asm volatile("nop"); +} +void GT_T01_Stop(void){ + asm volatile("nop"); +} +void GT_T02_Stop(void){ + asm volatile("nop"); +} + + +/* + * start and end hooks + */ + +void GT_TaskStartHook(GT_TASK_T *pMyOwnTask) { + switch(pMyOwnTask->Id){ + case 0: GT_T00_Start(); break; + case 1: GT_T01_Start(); break; + case 2: GT_T02_Start(); break; + } +} + + +void GT_TaskEndHook(GT_TASK_T *pMyOwnTask){ + switch(pMyOwnTask->Id){ + case 0: GT_T00_Stop(); break; + case 1: GT_T01_Stop(); break; + case 2: GT_T02_Stop(); break; + } +} + + diff --git a/src/APP/Aufgabe7/ps7/core0/src/imu.c b/src/APP/Aufgabe7/ps7/core0/src/imu.c new file mode 100644 index 0000000..a6565b9 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/src/imu.c @@ -0,0 +1,25 @@ +/* + * imu.c + * Source code for + * - init of MPU9250, + * - gathering motion data + * from IMU/MPU 9250 via I2C + * Created on: Nov 6, 2018 + * Author: laurenzb + * more information to iic at: + * https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/iicps/examples/xiicps_polled_master_example.c + * https://forums.xilinx.com/t5/Embedded-Development-Tools/XIIC-PS-Master-Send-polled/td-p/664488 + */ +#include "imu.h" +#include "xiicps.h" +#include "xparameters.h" +#include "ucos_uartps.h" +#include "xil_printf.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "ucos_int.h" + + +//insert your imu-code from task 4 + + diff --git a/src/APP/Aufgabe7/ps7/core0/src/pid.c b/src/APP/Aufgabe7/ps7/core0/src/pid.c new file mode 100644 index 0000000..ca6a61a --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/src/pid.c @@ -0,0 +1,18 @@ +/* + * pid.c + * Created on: Jan 28, 2019 + * Author: laurenzb + */ + +#include "xparameters.h" +#include "ucos_uartps.h" +#include "xil_printf.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include +#include +#include +#include "pid.h" + + +//insert your pid-code from task 4 diff --git a/src/APP/Aufgabe7/ps7/core0/src/pid_orig.c b/src/APP/Aufgabe7/ps7/core0/src/pid_orig.c new file mode 100644 index 0000000..e9b5c40 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/src/pid_orig.c @@ -0,0 +1,128 @@ +/* + * pid.c + * Created on: Jan 28, 2019 + * Author: laurenzb + */ + +#include "xparameters.h" +#include "ucos_uartps.h" +#include "xil_printf.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include +#include +#include +#include "pid.h" + + +#define PRINTPID 0 + +#define KP 300.0 +#define KD 0.0 +#define KI 200.0 +#define SAMPLE_TIME ((float)(5.0/1000.0)) + + + +static float targetAngle = 0.0; +extern int16_t accData[3]; +extern int16_t gyroData[3]; +int16_t gyroOffset[3]; + +//int16_t accMin[3] = {-8960, -9560, -8767}; //gelb +//int16_t accMax[3] = {9077, 9010, 9429}; //gelb + +//int16_t accMin[3] = {-7890, -8277, -9915}; //braun +//int16_t accMax[3] = {9870, 8983, 8420}; //braun + +int16_t accMin[3] = {-8757 , -8649 , -8547}; //gruen +int16_t accMax[3] = {9221 , 9725 , 9158}; //gruen + +//int16_t accMin[3] = {-8554 ,-8513 , -8341}; //rot +//int16_t accMax[3] = {8862 ,8385 ,9283}; //rot + + + + +int32_t pidValue=0; +float errorSumAngle=0; +float prevAngle=0; +float gyroAnglePerStep=0; +int cycle = 0; + +/* * * * * * * * calculates a PID value from -1000 to 1000 by using acc and gyro data * * * * * * * * */ +int pid_Task(void* pdata) { + mpu9250_Get_Acc_Min_Max(); + cycle++; + if (cycle == 10 * 1000/5) + targetAngle = prevAngle; + + float accAngle=0, currentAngle=0, errorAngle=0, gyroRate=0; + int16_t accAxisOne = map(pid_Constrain(accData[0], accMin[0], accMax[0]), accMin[0], accMax[0],-32767, 32767); + int16_t accAxisTwo = map(pid_Constrain(accData[2], accMin[2], accMax[2]), accMin[2], accMax[2],-32767, 32767); + accAngle = (float)atan2((double)(accAxisOne), (double)(accAxisTwo))*(180/PI); //calc the angle of inclination only by using accelerometer data + accAngle = -accAngle; //change the orientation + gyroRate = (((float)(gyroData[1]+gyroOffset[1]))/(65.5)); //calculate real gyro value according to the set sensivity, for more info see datasheet + gyroAnglePerStep = gyroRate*SAMPLE_TIME; //change to last step, calculated by gyro + currentAngle = 0.98*(prevAngle + gyroAnglePerStep) + 0.02*accAngle; //complementary filter, eleminates noise from the acc and fixes gyro drift + errorAngle = currentAngle - targetAngle; //calc the error to the disired angle + errorSumAngle = errorSumAngle + errorAngle; //integrate the error to use it in the PID + errorSumAngle = (float)pid_Constrain((int)errorSumAngle, -750, 750); //constrain maximum integrated error + + CPU_SR cpu_sr; + OS_ENTER_CRITICAL(); + pidValue = (int16_t)(KP*(errorAngle) + KI*(errorSumAngle)*SAMPLE_TIME + KD/SAMPLE_TIME*(currentAngle-prevAngle)); //calculate output from P, I and D values + pidValue = pid_Constrain(pidValue, -PID_BOUND, PID_BOUND); //constrain maximum integrated error, to use the max value in calculations for step frequency + + if(pidValue == 0){ //prevent divison by 0 + pidValue=1; + } + OS_EXIT_CRITICAL(); + prevAngle = currentAngle; //prepare next iteration + + if (PRINTPID==1){ + UCOS_Print("Angle:"); + UCOS_Printf("%8d ", (int)currentAngle); + + UCOS_Print("Acc:"); + UCOS_Printf("%8d ", (int)accAngle); + + //UCOS_Print("Pid:"); + //UCOS_Printf("%8d ", (int)pidValue); + + UCOS_Printf("\r\n"); + } + return 0; +} + +/* * * * * * * * clears Gyro offset and sets it new * * * * * * * * */ +unsigned int pid_Init(void *pdata){ + uint8_t i = 0; + uint8_t t = 0; + for (i = 0; i < 3; i++) { + gyroOffset[i]=0; + } + for (t = 0; t <10; t++) { + for (i = 0; i < 3; i++) { + gyroOffset[i]=(gyroData[i]/10); + } + OSTimeDly(OS_TICKS_PER_SEC/10); + } + return 0; +} + +/* * * * * * * * sets outer bounds * * * * * * * * */ +int16_t pid_Constrain(int16_t value, int16_t lowerBorder, int16_t higherBorder){ + if (value > higherBorder){ + value = higherBorder; + } + if (value < lowerBorder){ + value = lowerBorder; + } + return value; +} + +/* * * * * * maps to another numberroom * * * * * * */ +int16_t map(int16_t x, int16_t in_min, int16_t in_max, int16_t out_min, int16_t out_max) { + return ((x - in_min) * (out_max - out_min)) / (in_max - in_min) + out_min; +} diff --git a/src/APP/Aufgabe7/ps7/core0/src/ttc_timer.c b/src/APP/Aufgabe7/ps7/core0/src/ttc_timer.c new file mode 100644 index 0000000..26f0f89 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/src/ttc_timer.c @@ -0,0 +1,19 @@ +#include +#include +#include "xparameters.h" +#include "xstatus.h" +#include "xil_exception.h" +#include "xil_printf.h" +#include "xttcps.h" +#include "xscugic.h" +#include "ucos_uartps.h" +#include "ucos_ii.h" +#include "ucos_bsp.h" +#include "ucos_int.h" +#include "ttc_timer.h" +#include "xgpiops.h" +#include "pid.h" + + + +//insert your timer-code from task 3 diff --git a/src/APP/Aufgabe7/ps7/core0/src/uartps_cfg.c b/src/APP/Aufgabe7/ps7/core0/src/uartps_cfg.c new file mode 100644 index 0000000..dae6c62 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/src/uartps_cfg.c @@ -0,0 +1,17 @@ + +#include "ucos_uartps.h" +#include "xparameters.h" +#include "xparameters_ps.h" + +/* + * The uart configuration table for devices + */ +UCOS_UARTPS_Config UCOS_UARTPS_ConfigTable[] = { + { + XPAR_PS7_UART_1_DEVICE_ID, + XPAR_PS7_UART_1_BASEADDR, + XPAR_PS7_UART_1_UART_CLK_FREQ_HZ, + XPAR_PS7_UART_1_HAS_MODEM, + XPAR_PS7_UART_1_INT_SOURCE + } +}; diff --git a/src/APP/Aufgabe7/ps7/core0/src/xgpiops_g.c b/src/APP/Aufgabe7/ps7/core0/src/xgpiops_g.c new file mode 100644 index 0000000..31cfbbb --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/src/xgpiops_g.c @@ -0,0 +1,56 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ + +#include "xparameters.h" +#include "xparameters_ps.h" +#include "xgpiops.h" + +/* +* The configuration table for devices +*/ + +XGpioPs_Config XGpioPs_ConfigTable[XPAR_XGPIOPS_NUM_INSTANCES] = +{ + { + XPAR_PS7_GPIO_0_DEVICE_ID, + XPAR_PS7_GPIO_0_BASEADDR + } +}; + + diff --git a/src/APP/Aufgabe7/ps7/core0/src/xiicps_g.c b/src/APP/Aufgabe7/ps7/core0/src/xiicps_g.c new file mode 100644 index 0000000..2e9d0ff --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/src/xiicps_g.c @@ -0,0 +1,63 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ + +#include "xparameters.h" +#include "xparameters_ps.h" + +#include "xiicps.h" + +/* +* The configuration table for devices +*/ + +XIicPs_Config XIicPs_ConfigTable[XPAR_XIICPS_NUM_INSTANCES] = +{ + { + XPAR_PS7_I2C_0_DEVICE_ID, + XPAR_PS7_I2C_0_BASEADDR, + XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ + }, + { + XPAR_PS7_I2C_1_DEVICE_ID, + XPAR_PS7_I2C_1_BASEADDR, + XPAR_PS7_I2C_1_I2C_CLK_FREQ_HZ + } +}; + + diff --git a/src/APP/Aufgabe7/ps7/core0/src/xttcps_g.c b/src/APP/Aufgabe7/ps7/core0/src/xttcps_g.c new file mode 100644 index 0000000..15658b3 --- /dev/null +++ b/src/APP/Aufgabe7/ps7/core0/src/xttcps_g.c @@ -0,0 +1,111 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ +#include "xparameters_ps.h" +#include "xparameters.h" +#include "xttcps.h" + +/* +* The configuration table for devices +*/ + +XTtcPs_Config XTtcPs_ConfigTable[] = +{ + { + XPAR_PS7_TTC_0_DEVICE_ID, + XPAR_PS7_TTC_0_BASEADDR, + XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ + }, + { + XPAR_PS7_TTC_1_DEVICE_ID, + XPAR_PS7_TTC_1_BASEADDR, + XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ + }, + { + XPAR_PS7_TTC_2_DEVICE_ID, + XPAR_PS7_TTC_2_BASEADDR, + XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ + }//, +// { +// XPAR_PS7_TTC_3_DEVICE_ID, +// XPAR_PS7_TTC_3_BASEADDR, +// XPAR_PS7_TTC_3_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_4_DEVICE_ID, +// XPAR_PS7_TTC_4_BASEADDR, +// XPAR_PS7_TTC_4_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_5_DEVICE_ID, +// XPAR_PS7_TTC_5_BASEADDR, +// XPAR_PS7_TTC_5_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_6_DEVICE_ID, +// XPAR_PS7_TTC_6_BASEADDR, +// XPAR_PS7_TTC_6_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_7_DEVICE_ID, +// XPAR_PS7_TTC_7_BASEADDR, +// XPAR_PS7_TTC_7_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_8_DEVICE_ID, +// XPAR_PS7_TTC_8_BASEADDR, +// XPAR_PS7_TTC_8_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_9_DEVICE_ID, +// XPAR_PS7_TTC_9_BASEADDR, +// XPAR_PS7_TTC_9_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_10_DEVICE_ID, +// XPAR_PS7_TTC_10_BASEADDR, +// XPAR_PS7_TTC_10_TTC_CLK_FREQ_HZ +// }, +// { +// XPAR_PS7_TTC_11_DEVICE_ID, +// XPAR_PS7_TTC_11_BASEADDR, +// XPAR_PS7_TTC_11_TTC_CLK_FREQ_HZ +// } +}; + + diff --git a/src/Modules/MMU/mmu.c b/src/Modules/MMU/mmu.c new file mode 100644 index 0000000..0597c44 --- /dev/null +++ b/src/Modules/MMU/mmu.c @@ -0,0 +1,392 @@ +/* +**************************************************************************************************** +* +* uC/OS-MMU +* +* (c) Copyright 2012, Micrium, FL +* All rights reserved. +* +* All rights reserved. Protected by international copyright laws. +* Knowledge of the source code may not be used to write a similar +* product. This file may only be used in accordance with a license +* and should not be redistributed in any way. +* +* +* Version : 3.1.2pp-35237 +* File : MMU.c (#1) +* Programmer(s) : EO +**************************************************************************************************** +*/ + +/*! +**************************************************************************************************** +* \defgroup PAR_CPU_MMU Target Specific MMU Implementation +* \ingroup PAR_CORE +* +* +* The memory management unit (MMU) for the ... +* +**************************************************************************************************** +*/ + +/* +**************************************************************************************************** +* INCLUDES +**************************************************************************************************** +*/ + +#include "mmu.h" +#include "xpseudo_asm.h" +#include "xil_cache.h" +#include "lib_mem.h" +#include "mmu_cfg.h" + +/* +**************************************************************************************************** +* GOBAL DATA +**************************************************************************************************** +*/ + + +extern INT32U MMUTable; + +/* +**************************************************************************************************** +* PRIVATE FUNCTION PROTOTYPES +**************************************************************************************************** +*/ +static MMU_ERR_T MMUTblAdd (PAR_MEM_REGION_REF_T mem, INT32U * pMMUTable); +static MMU_ERR_T MMUTblAdd1M (PAR_MEM_REGION_REF_T mem, INT32U off, INT32U * pMMUTable); +static void FTTSet (INT32U va, INT32U descr, INT32U * pMMUTable); +static INT32U FTTGet (INT32U va, INT32U * pMMUTable); +static INT32U FTTDescr (PAR_MEM_REGION_REF_T mem, INT32U offset, INT32U type, INT32U tbl); +static void MMUEnable (INT32U * pMMUTable); +static void MMUSwitchContext (INT32U id); + +/* +**************************************************************************************************** +* FUNCTIONS +**************************************************************************************************** +*/ + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief INIT THE MMU +* +* \ingroup PAR_CPU_MMU +* +* This function initialize the target specific MMU +* +* \note The integrator must supply the contents of the PARErrLogging() function to handle +* possible error conditions. +*/ +/*------------------------------------------------------------------------------------------------*/ +MMU_ERR_T MMUInit (void) +{ + INT32U n; /* Local: loop counter */ + MMU_ERR_T err = MMU_ERR_NONE; + + Mem_Clr(&MMUTable,FTT_SIZE * sizeof(CPU_WORD_SIZE_32)); + + for(n = 0; n < sizeof(PARMemTbl_Core)/sizeof(PAR_MEM_REGION_T); n++){ + err = MMUTblAdd((PAR_MEM_REGION_REF_T)&PARMemTbl_Core[n], &MMUTable); + if(err != MMU_ERR_NONE) + return err; + } + + MMUEnable(&MMUTable); /* Enable the MMU */ + + return MMU_ERR_NONE; +} + +/* +**************************************************************************************************** +* LOCAL FUNCTIONS +**************************************************************************************************** +*/ + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief MMU TABLE CONSTRUCTION +* +* \ingroup PAR_CPU_MMU +* +* This function constructs the needed table entries for a single user defined memory +* region with the following rules: +* +* - build user memory size with blocks of 4K, 64K and 1M portions +* +* - ensure that each block is aligned at size (4K Block is aligned at 4K boundary, etc.) +* +* \param mem Reference to memory region +* +* \note Memory portions below 1KB will be ignored, because the MMU granularity starts with 1kB +*/ +/*------------------------------------------------------------------------------------------------*/ +static MMU_ERR_T MMUTblAdd(const PAR_MEM_REGION_REF_T mem, INT32U * pMMUTable) +{ + INT32U vaddr; /* Local: virtual address */ + INT32U off; /* Local: offset in memory region */ + INT32U size; /* Local: remaining size of memory region */ + MMU_ERR_T err = MMU_ERR_NONE; + /*------------------------------------------*/ + vaddr = mem->VA_Start; /* set virtual memory address */ + size = mem->Size; /* set size to memory region size */ + off = 0; /* set memory region offset to 0 */ + + if ((vaddr & (MMU_SIZE_1MB - 1)) != 0) { /* see, if VA is not aligned at 4k */ + return MMU_ERR_ALIGN; + } + if ((size % MMU_SIZE_1MB) != 0) { /* see, if size is not multiple of 4k */ + return MMU_ERR_SIZE; + } + + while(size >= MMU_SIZE_1MB) { /* create section for memory region */ + err = MMUTblAdd1M(mem, off, pMMUTable); /* add a 1M section */ + if(err != MMU_ERR_NONE) + return err; + vaddr += MMU_SIZE_1MB; /* update virtual address and */ + off += MMU_SIZE_1MB; /* offset and */ + size -= MMU_SIZE_1MB; /* remaining bytes in memory region */ + } + + return MMU_ERR_NONE; +} + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief INSERT 1M SECTION IN MMU TABLE +* +* \ingroup PAR_CPU_MMU +* +* This function constructs the needed table entries for a single 1M memory block. +* +* \param mem Reference to memory region +* +* \param off Offset within the referenced memory region +*/ +/*------------------------------------------------------------------------------------------------*/ +static MMU_ERR_T MMUTblAdd1M(PAR_MEM_REGION_REF_T mem, INT32U off, INT32U * pMMUTable) +{ + INT32U vaddr; /* Local: virtual address */ + INT32U descr; /* Local: translation table descriptor */ + INT32U type; /* Local: descriptor type information */ + /*------------------------------------------*/ + vaddr = mem->VA_Start + off; /* calculate virtual address */ + type = FTTGet(vaddr, pMMUTable) & FTT_TYPE; /* get descriptor type */ + + if (type != FTT_TYPE_FLT) { /* see, if section is already in use */ + return MMU_ERR_ENTRY_IN_USE; + } + + descr = FTTDescr(mem, off, FTT_TYPE_SEC, 0); /* construct first level section descr. */ + FTTSet(vaddr, descr, pMMUTable); /* set section for virtual address */ + return MMU_ERR_NONE; +} + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief SET FIRST LEVEL TRANSLATION TABLE DESCRIPTOR +* +* \ingroup PAR_CPU_MMU +* +* This function sets the given descriptor in the first level translation table +* which corresponds to the given virtual address. +* +* \param va Virtual Address +* +* \param descr First level descriptor +*/ +/*------------------------------------------------------------------------------------------------*/ +static void FTTSet(INT32U va, INT32U descr, INT32U * pMMUTable) +{ + volatile INT32U *tbl; /* Local: ptr to first level table entry */ + INT32U tbl_idx; /* Local: first level table index */ + /*------------------------------------------*/ + tbl_idx = (va >> 20) & 0x00000FFF; /* get table index out of virtual address */ + tbl = pMMUTable + tbl_idx; /* set first level table base address */ + /*------------------------------------------*/ + *tbl = descr; /* set descriptor in first level table */ + dsb(); + isb(); +} + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief GET FIRST LEVEL TRANSLATION TABLE DESCRIPTOR +* +* \ingroup PAR_CPU_MMU +* +* This function returns the first level translation table descriptor of the given +* virtual address. +* +* \param va Virtual Address +* +* \return The current active descriptor is returned. +*/ +/*------------------------------------------------------------------------------------------------*/ +static INT32U FTTGet(INT32U va, INT32U * pMMUTable) +{ + volatile INT32U *tbl; /* Local: ptr to first level table entry */ + INT32U tbl_idx; /* Local: first level table index */ + /*------------------------------------------*/ + tbl_idx = (va >> 20) & 0x00000FFF; /* get table index out of virtual address */ + tbl = pMMUTable + tbl_idx; /* set first level table base address */ + /*------------------------------------------*/ + return (*tbl); /* get descriptor in first level table */ +} + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief CONSTRUCT FIRST LEVEL TRANSLATION TABLE DESCRIPTOR +* +* \ingroup PAR_CPU_MMU +* +* This function constructs the first level translation table descriptor of the given +* type for the offset within the memory region. +* +* \param mem Reference to memory region +* +* \param offset Offset within the referenced memory region +* +* \param type Type information (section / coarse page / fine page / fault) +* +* \param base Base address of page table +* +* \return For the types FTT_TYPE_SEC, FTT_TYPE_CPT and FTT_TYPE_FPT, the +* corresponding table descriptor is returned. For any other type, the return value is +* the table descriptor for FTT_TYPE_FLT. +* +* \see FTT_TYPE_FLT, FTT_TYPE_CPT, FTT_TYPE_SEC, FTT_TYPE_FPT +*/ +/*------------------------------------------------------------------------------------------------*/ +static INT32U FTTDescr(PAR_MEM_REGION_REF_T mem, INT32U offset, INT32U type, INT32U base) +{ + INT32U result = 0; /* Local: function result */ + INT32U pa; /* Local: physical address */ + + switch(type){ + case FTT_TYPE_SEC: + pa = mem->PA_Start + offset; /* yes: calculate physical address */ + result = FTT_TYPE_SEC | /* set descriptor type to section */ + ((mem->HID & PAR_HID_CB_MASK) << 2u) | /* cachable & bufferable flag */ + ((mem->HID & PAR_HID_F_XN) >> 6u) | /* Execute-Never Flag */ + ((PAR_DOMAIN_MASTER) << 5) | /* owner = domain */ + ((mem->AP & 0x3) << 10u) | /* access permissions AP0 and AP1 */ + ((mem->AP & 0x4) << 13u) | /* access permissions AP2 */ + ((mem->HID & PAR_HID_TEX_MASK) << 10u) | /* TEX attributes */ + ((mem->HID & PAR_HID_F_S) << 8u) | /* shareable-flag */ + ((mem->HID & PAR_HID_F_NG) << 8u) | /* Non-Global-Flag */ + ((mem->HID & PAR_HID_F_NS) << 8u) | /* non-secure bit */ + (pa & 0xFFF00000); /* bits[31:20] of physical address */ + break; + case FTT_TYPE_PT: + case FTT_TYPE_FLT: + case FTT_TYPE_RES: + default: + break; + } + return result; +} + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief ENABLE MMU +* +* \ingroup PAR_CPU_MMU +* +* This function enables the MMU. +* +* \note The first level translation table and the page tables must be initialized before +* calling this function. +*/ +/*------------------------------------------------------------------------------------------------*/ +static void MMUEnable(INT32U * pMMUTable) +{ + INT32U ctrl; /* Local: control register */ + + //Invalidate data and instruction cache + Xil_DCacheDisable(); + + __set_mmu_table(((INT32U)pMMUTable & 0xFFFFC000) | PAR_TTBR0_FLAGS); /* Set first level transl. table base addr. */ + + __set_domain_control(0x55555555u); /* set all domains to client */ + //eo verwenden noch PD1 = 1 für tlb miss in TTBR1 wird zu translation fault. + __set_asid(0 & 0xFF); + __set_mmu_control(0x00000000); /* Set TTBCR to 0 -> Use TTBR0 and 14Bit alignment */ + + __clr_mmu_fault(); + + __dsb(); + + __invalidate_tlb(); + __invalidate_branchpred(); + __dsb(); + __isb(); + + + + ctrl = __get_sys_control(); /* get current control register */ + ctrl |= MMU_SCTLR_FLAGS; /* set I,C,S and M to enable MMU */ + __set_sys_control(ctrl); /* write new control register */ + /*------------------------------------------*/ + __no_operation(); /* perform 2 flat fetches */ + __no_operation(); + +#if (UCOS_AMP_MASTER == DEF_ENABLED) + // /* Enable L2 Cache */ + // This is a "mandatory" step, don't now why, see Zynq Reference manual + *((CPU_INT32U*)0xF8000A1C) = 0x020202; + + Xil_L2CacheEnable(); + /* set L2 Aux register */ +// CPU_INT32U dat = *((CPU_INT32U*)0xF8F02104); +// dat = 0x72760000; +// *((CPU_INT32U*)0xF8F02104) = dat; +// // /* Set all latencies of tag-ram to 2 */ +// // *((CPU_INT32U*)0xF8F02108) = 0x00000111; +// // /* set data ram write and setup latencies to 2, data ram read to 3 */ +// // *((CPU_INT32U*)0xF8F0210C) = 0x00000121; +// // /* set prefetch conrtol register */ +// // *((CPU_INT32U*)0xF8F02F60) = 0x30000000; +// /* enable L2 Cache */ +// *((CPU_INT32U*)0xF8F02100) = 0x1; +#endif + CPU_INT32U actlr = __get_actlr(); + actlr &= ~(0x00000040); + __set_actlr(actlr); + /*--- MMU/address translation is enabled ---*/ +} + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief Switch Address Space +* +* \ingroup PAR_CPU_MMU +* +* This function switches the address space and manipulates the virt->phys translation. +* +* \param id Partition ID +*/ +/*------------------------------------------------------------------------------------------------*/ + +static void MMUSwitchContext(INT32U id) +{ + + CPU_INT32U cpu_sr = 0; + /*------------------------------------------*/ + OS_ENTER_CRITICAL(); /* Enter critical section */ + //We don't need to flush caches, when for all shared memory regions the L1 cache policy is correct write through or disabled +// __flush_caches(); /* Flush caches */ +// MMU_DCacheClean(); + //We don't need to invalidate the tlb, beacuase we have the ASID value corresponding to a partition +// __invalidate_tlb(); /* Invalidate TLB */ + + __dsb(); + __set_asid(id & 0xFF); + __set_mmu_table(((INT32U)MMUTable & 0xFFFFC000) | PAR_TTBR0_FLAGS); /* Set first level transl. table base addr. */ + __dsb(); + __isb(); + OS_EXIT_CRITICAL(); /* Exit critical section */ + /*------------------------------------------*/ +} diff --git a/src/Modules/MMU/mmu.h b/src/Modules/MMU/mmu.h new file mode 100644 index 0000000..64a24a4 --- /dev/null +++ b/src/Modules/MMU/mmu.h @@ -0,0 +1,201 @@ +/* +**************************************************************************************************** +* +* uC/OS-MMU +* +* (c) Copyright 2012, Micrium, FL +* All rights reserved. +* +* All rights reserved. Protected by international copyright laws. +* Knowledge of the source code may not be used to write a similar +* product. This file may only be used in accordance with a license +* and should not be redistributed in any way. +* +* +* Version : 3.1.2pp-35237 +* File : par_mmu.h (#1) +* Programmer(s) : EO +**************************************************************************************************** +*/ + +#ifndef _MMU_H_ +#define _MMU_H_ + +/* +**************************************************************************************************** +* INCLUDES +**************************************************************************************************** +*/ + +#include "ucos_ii.h" + + +/* +**************************************************************************************************** +* ERROR DEFINITIONS +**************************************************************************************************** +*/ +typedef enum{ + MMU_ERR_NONE = 0, + MMU_ERR_STT_NOT_IMPLEMENTED, + MMU_ERR_ALIGN, + MMU_ERR_SIZE, + MMU_ERR_ENTRY_IN_USE +}MMU_ERR_T; + +/* +**************************************************************************************************** +* GENERAL DEFINES FOR MEMORY SPACE CONFIG +**************************************************************************************************** +*/ +typedef CPU_INT32U PAR_MEM_SIZE_T; + +#define MMU_SIZE_1MB (CPU_INT32U)0x00100000 /*!< Region size 1Mbytes */ +#define MMU_SIZE_2MB (CPU_INT32U)0x00200000 /*!< Region size 2Mbytes */ +#define MMU_SIZE_4MB (CPU_INT32U)0x00400000 /*!< Region size 4Mbytes */ +#define MMU_SIZE_8MB (CPU_INT32U)0x00800000 /*!< Region size 8Mbytes */ +#define MMU_SIZE_16MB (CPU_INT32U)0x01000000 /*!< Region size 16Mbytes */ +#define MMU_SIZE_32MB (CPU_INT32U)0x02000000 /*!< Region size 32Mbytes */ +#define MMU_SIZE_64MB (CPU_INT32U)0x04000000 /*!< Region size 64Mbytes */ +#define MMU_SIZE_128MB (CPU_INT32U)0x08000000 /*!< Region size 128Mbytes */ +#define MMU_SIZE_256MB (CPU_INT32U)0x10000000 /*!< Region size 256Mbytes */ +#define MMU_SIZE_512MB (CPU_INT32U)0x20000000 /*!< Region size 512Mbytes */ +#define MMU_SIZE_1GB (CPU_INT32U)0x40000000 /*!< Region size 1Gbytes */ +#define MMU_SIZE_2GB (CPU_INT32U)0x80000000 /*!< Region size 2Gbytes */ +#define MMU_SIZE_4GB (CPU_INT32U)0x00000000 /*!< Region size 4Gbytes */ + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief GENERAL ACCESS PERMISSION DEFINES +* +*/ +/*------------------------------------------------------------------------------------------------*/ +typedef enum{ + PAR_AP_P____U___ = 0, /* No Access */ + PAR_AP_PRW__U___, /* Priviledged: R+W User: no access */ + PAR_AP_PRW__UR__, /* Priviledged: R+W User: R */ + PAR_AP_PRW__URW_, /* Priviledged: R+W User: R+W */ + PAR_AP_RESERVED1, /* Reserved */ + PAR_AP_PR___U___, /* Priviledged: R User: no access */ + PAR_AP_PR___UR__, /* Priviledged: R User: R */ + PAR_AP_RESERVED2 /* Reserved */ +}PAR_MEM_AP_T; + +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief GENERAL HARDWARE IMPLEMENTATION DEPENDENT FLAGS +* +* \ingroup PAR_CPU_MMU +* +* This definitions must be used to configure the memory region hardware implementation +* dependent flags within the memory map (\ref PARMemTbl) table: +*/ +/*------------------------------------------------------------------------------------------------*/ +#define PAR_HID_F__ (CPU_INT32U)(0x00000000) +#define PAR_HID_F_S (CPU_INT32U)(0x00000100) /* Shareable: YES */ +#define PAR_HID_F_NG (CPU_INT32U)(0x00000200) /* Non-Global: YES */ +#define PAR_HID_F_XN (CPU_INT32U)(0x00000400) /* Execute-Never: YES */ +#define PAR_HID_F_NS (CPU_INT32U)(0x00000800) /* Non-secure bit (only available for L1 page table) */ + +#define PAR_HID_CACHE_INNER___ (CPU_INT32U)(0x00000000) /* Non-Cachable */ +#define PAR_HID_CACHE_INNER__B (CPU_INT32U)(0x00000001) /* Write Back, Write Allocate */ +#define PAR_HID_CACHE_INNER_C_ (CPU_INT32U)(0x00000002) /* Write through, no write-allocate */ +#define PAR_HID_CACHE_INNER_CB (CPU_INT32U)(0x00000003) /* Write Back, no write-allocate */ + +#define PAR_HID_CACHE_OUTER___ (CPU_INT32U)(0x00000000) /* Non-Cachable */ +#define PAR_HID_CACHE_OUTER__B (CPU_INT32U)(0x00000004) /* Write Back, Write Allocate */ +#define PAR_HID_CACHE_OUTER_C_ (CPU_INT32U)(0x00000008) /* Write through, no write-allocate */ +#define PAR_HID_CACHE_OUTER_CB (CPU_INT32U)(0x0000000C) /* Write Back, no write-allocate */ + +#define PAR_HID_TEX_CB_STRONGLY_ORDERED (CPU_INT32U)(0x00000000) /* Strongly Ordered */ +#define PAR_HID_TEX_CB_SHAREABLE_DEVICE (CPU_INT32U)(0x00000001) /* Shareable device */ +#define PAR_HIT_TEX_CB_WRITE_THR_NO_ALLOCATE (CPU_INT32U)(0x00000002) /* Outer and inner write through, no allocate on write */ +#define PAR_HID_TEX_CB_WRITEBACK_NO_ALLOCATE (CPU_INT32U)(0x00000003) /* Outer and inner write BACK, no allocate on write */ +#define PAR_HID_TEX_CB_OUT_IN_NON_CACHABLE (CPU_INT32U)(0x00000004) /* Outer and inner non-cachable */ +#define PAR_HID_TEX_CB_NON_SHAREABLE_DEVICE (CPU_INT32U)(0x0000000A) /* Non-Shareable device */ +#define PAR_HID_TEX_CB_CACHED_MEMORY (CPU_INT32U)(0x00000010) /* Cached Memory, use PAR_HID_CACHE_OUTER_XX and PAR_HID_CACHE_INNER_XX to define policies */ + +#define PAR_HID_TEX_MASK (CPU_INT32U)(0x0000001C) +#define PAR_HID_CB_MASK (CPU_INT32U)(0x00000003) + +/* short version for standard system device only accessible from hypervisor and cpu0, not shared between anyone, also called "Mein Schatz!" ;-) */ +#define PAR_HID_EXCLUSIVE_SYS_DEVICE (CPU_INT32U)(PAR_HID_TEX_CB_NON_SHAREABLE_DEVICE | PAR_HID_F_NG | PAR_HID_F_XN) + + + + +/* +**************************************************************************************************** +* TYPE DEFINITIONS +**************************************************************************************************** +*/ +/*------------------------------------------------------------------------------------------------*/ +/*! +* \brief MEMORY SPACE CONFIGURATION STRUCT +* +* \ingroup PAR_CPU_MMU +* +* This structure holds the memory region definitions. +*/ +/*------------------------------------------------------------------------------------------------*/ +typedef struct { + CPU_INT32U VA_Start; /*!< Virtual Start Address */ + CPU_INT32U PA_Start; /*!< Physical Start Address */ + PAR_MEM_SIZE_T Size; /*!< Size of Memory Region */ + + PAR_MEM_AP_T AP; /*!< Access Permission of Memory Region */ + CPU_INT32U HID; /*!< Hardware Implementation Dependent Field*/ + +} PAR_MEM_REGION_T, *PAR_MEM_REGION_REF_T; + +/* +**************************************************************************************************** +* TARGET SPECIFIC DEFINES +**************************************************************************************************** +*/ +#define FTT_SIZE 4096 /*!< Size of First Level Translation Table */ + /*----- First Level Translation Table ------*/ +#define FTT_TYPE (CPU_INT32U)0x00000003 /*!< First Level Descriptor Type Mask */ +#define FTT_TYPE_FLT (CPU_INT32U)0x00000000 /*!< Type: Fault */ +#define FTT_TYPE_PT (CPU_INT32U)0x00000001 /*!< Type: Page Table */ +#define FTT_TYPE_SEC (CPU_INT32U)0x00000002 /*!< Type: Section (1MB) */ +#define FTT_TYPE_RES (CPU_INT32U)0x00000003 /*!< Type: Reserved */ + +#define FTT_OWNER (CPU_INT32U)0x000001E0 /*!< First Level Descriptor Owner Mask */ + + /*----- Domain Management ------------------*/ +#define PAR_DOMAIN_NOACCESS (CPU_INT32U)0x0 /*!< Domain: diable domain */ +#define PAR_DOMAIN_CLIENT (CPU_INT32U)0x1 /*!< Domain: domain owner is client */ +#define PAR_DOMAIN_MASTER (CPU_INT32U)0x3 /*!< Domain: domain owner is master */ + + + +/* TTBR0 Config (armv7refman B4.1.154) Outer Region | not-outer-shareable | inner region | shareable */ +#define PAR_TTBR0_FLAGS (CPU_INT32U)((0x41 << 0) | (0x00 << 5u) | (0x03 << 3u) | (0x00 << 1u)) + + +#define MMU_SCTLR_ACCESS_FLAG_ENABLE (0x01 << 29u) //Enable Access flag mode +#define MMU_SCTLR_RR_EN (0x01 << 14u) //Enable RoundRobin Cache Replacement +#define MMU_SCTLR_ICACHE_EN (0x01 << 12u) //Enable Instruction Cache +#define MMU_SCTLR_BRANCH_EN (0x01 << 11u) //Enable Branch Prediction +#define MMU_SCTLR_CACHE_EN (0x01 << 2u) //Enable Data and unified cache +#define MMU_SCTLR_MMU_EN (0x01 << 0u) //Enable MMU +#define MMU_SCTLR_SWP_EN (0x01 << 10u) + +#define MMU_SCTLR_FLAGS (CPU_INT32U) (MMU_SCTLR_RR_EN \ + | MMU_SCTLR_ICACHE_EN \ + | MMU_SCTLR_BRANCH_EN \ + | MMU_SCTLR_CACHE_EN \ + | MMU_SCTLR_SWP_EN \ + | MMU_SCTLR_MMU_EN ) + +/* +**************************************************************************************************** +* FUNCTION PROTOTYPES +**************************************************************************************************** +*/ + +MMU_ERR_T MMUInit (void); + +#endif /* #ifndef _MMU_H_ */ + diff --git a/src/Modules/genericTaskset/cfgTemplate/gt_cfg.h b/src/Modules/genericTaskset/cfgTemplate/gt_cfg.h new file mode 100644 index 0000000..6151eaf --- /dev/null +++ b/src/Modules/genericTaskset/cfgTemplate/gt_cfg.h @@ -0,0 +1,23 @@ +/* + * gt_cfg.h + * + * Created on: Jan 15, 2019 + * Author: Kai Gemlau + */ + +#ifndef GT_CFG_H_ +#define GT_CFG_H_ + +#define GT_USE_NP_REGIONS 1 +#define GT_USE_NP_MEAS 1 +#define GT_NUM_OF_TASKS 1 +#define GT_REPORT_CONSOLE 0 +#define GT_REPORT_SVC 0 + +#define GT_TTC_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID +#define GT_TTC_PWM_INTR_ID XPAR_XTTCPS_2_INTR +#define GT_TIMER_TICKS_PER_SEC 10000 + +#include "gt_core_cfg.h" + +#endif /* GT_CFG_H_ */ diff --git a/src/Modules/genericTaskset/cfgTemplate/gt_core_cfg.h b/src/Modules/genericTaskset/cfgTemplate/gt_core_cfg.h new file mode 100644 index 0000000..1d735fe --- /dev/null +++ b/src/Modules/genericTaskset/cfgTemplate/gt_core_cfg.h @@ -0,0 +1,18 @@ +/* + * gt_core_cfg.h + * + * Created on: Jan 15, 2019 + * Author: Kai Gemlau + */ + +#ifndef GT_CORE_CFG_H_ +#define GT_CORE_CFG_H_ + +#define GT_USE_CPU_CM7 0 /* Cortex M7 TODO: Specify */ +#define GT_USE_CPU_ARM_V7_A 0 /* Cortex A9 @ 666MHz on Zynq 7000 */ +#define GT_USE_CPU_PSUR5 1 /* Cortex R5 @ 100MHz on Zynq Ultrascale+ */ + +#define GT_STACKSIZE 256 +#define GT_MAXQACT 5 + +#endif /* GT_CORE_CFG_H_ */ diff --git a/src/Modules/genericTaskset/cfgTemplate/gt_tasks.c b/src/Modules/genericTaskset/cfgTemplate/gt_tasks.c new file mode 100644 index 0000000..234f237 --- /dev/null +++ b/src/Modules/genericTaskset/cfgTemplate/gt_tasks.c @@ -0,0 +1,103 @@ +/* + * gt_tasks.c + * + * Created on: Aug 22, 2014 + * Author: matthiasb + */ + + +#include "ucos_ii.h" +#include "gt_types.h" +#include "gt_cfg.h" +#include /* rand */ +#include /* memset */ + +/*-------------------------------Task model internal struct definitions-------------------------------*/ +/* + * Internal task extension struct + */ +typedef struct +{ + CPU_INT32U BCET; + CPU_INT32U WCET; +}GT_WL_CET_T; + +/* + * Internal task extension struct + */ +typedef struct +{ + CPU_INT32U Period; + CPU_INT32U Jitter; + CPU_INT32U Distance; + GT_WL_CET_T CET; +}GT_TASK_EXT_T; + +/*------------------------------------Execution times and periods-------------------------------------*/ +/* + * All times given in (1/10)ms + */ + +/* + * Task model + */ +GT_TASK_EXT_T GT_AllTasks[GT_NUM_OF_TASKS] = { +/* P J D BCET WCET */ + {10, 0, 0, {1, 1}}, + {20, 0, 0, {2, 4}}, + {50, 0, 0, {3, 5}}, + {100, 0, 0, {35, 40}}, +}; + +/*------------------------------------Internal call back functions-------------------------------------*/ +/* + * Function to determine task execution time + */ +static CPU_INT32U _GT_GetTaskCet(GT_TASK_T * pThisTask) +{ + /* + * Simple randomized jitter between BCET and WCET + */ + GT_TASK_EXT_T * pTaskExt = (GT_TASK_EXT_T*)pThisTask->Extension; + CPU_INT32U BCET = pTaskExt->CET.BCET; + CPU_INT32U WCET = pTaskExt->CET.WCET; + return (BCET < WCET) ? (WCET - (rand() % (WCET - BCET))) : WCET; +} + +/* + * Function to determine next task activation + * For this model we use a simple PJD model + */ +static CPU_INT32U _GT_GetNextActivation(GT_TASK_T * pThisTask) +{ + GT_TASK_EXT_T * pTaskExt = (GT_TASK_EXT_T*)pThisTask->Extension; + /* + * Calculate next activation based on PJ Model + */ + CPU_INT32S NextDistance = (pTaskExt->Jitter) ? pTaskExt->Period + (rand()%(pTaskExt->Jitter) - (pTaskExt->Jitter/2)) + : pTaskExt->Period; + /* + * Adjust activation to PJD if needed + */ + return ((CPU_INT32S)pTaskExt->Distance > NextDistance) ? pTaskExt->Distance : (CPU_INT32U)NextDistance; +} + +/* + * Main task table, used for GT_Init call + */ +GT_TASK_T GT_Tasks[GT_NUM_OF_TASKS] = +{ + /*Type Activation Type Id Prio Next Activation CET Init Function Task Function D WL Internal External */ + { GT_TASK_DEF, GT_ACT_INT, 0, 30, _GT_GetNextActivation, _GT_GetTaskCet, NULL, NULL, 10, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[0]}, + { GT_TASK_DEF, GT_ACT_INT, 1, 31, _GT_GetNextActivation, _GT_GetTaskCet, NULL, NULL, 20, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[1]}, + { GT_TASK_DEF, GT_ACT_INT, 2, 32, _GT_GetNextActivation, _GT_GetTaskCet, NULL, NULL, 50, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[2]}, + { GT_TASK_DEF, GT_ACT_INT, 3, 33, _GT_GetNextActivation, _GT_GetTaskCet, NULL, NULL, 100, GT_RUNABLE_NULL, GT_INTERNAL_NULL, (void *)>_AllTasks[3]}, +}; + +/* + * Internal activation + */ + + + + diff --git a/src/Modules/genericTaskset/hw/gt_xilTtcPs.c b/src/Modules/genericTaskset/hw/gt_xilTtcPs.c new file mode 100644 index 0000000..046a8aa --- /dev/null +++ b/src/Modules/genericTaskset/hw/gt_xilTtcPs.c @@ -0,0 +1,149 @@ +/* + * gt_stm32f7.c + * + * Created on: 05.06.2018 + * Author: kaige + */ + +#include "ucos_ii.h" +#include "gt_types.h" +#include "gt_core.h" + +#include +#include +#include +#include "xparameters.h" +#include "xstatus.h" +#include "xil_exception.h" +#include "xttcps.h" +#include "ucos_int.h" + +/* + * Last interval / time since last interrupt + */ +static CPU_INT32U GT_LastInterval = 0; +/* + * Scaling factor used to convert GT Times to timer ticks + */ +static uint32_t GT_TickScalingFactor = 0; + +/* + * Task Config Table + */ +extern volatile GT_TASK_T *GT_TaskTable; + +/* + * Hardware Timer + */ +static XTtcPs GT_Timer; + +/* + * Function to determine next task activation + * For this model we use a simple PJD model + */ +static CPU_INT32U _GT_GetNextActivation(GT_TASK_T * pThisTask) +{ + GT_TASK_EXT_T * pTaskExt = (GT_TASK_EXT_T*)pThisTask->Extension; + /* + * Calculate next activation based on PJ Model + */ + CPU_INT32S NextDistance = (pTaskExt->Jitter) ? pTaskExt->Period + (rand()%(pTaskExt->Jitter) - (pTaskExt->Jitter/2)) + : pTaskExt->Period; + /* + * Adjust activation to PJD if needed + */ + return ((CPU_INT32S)pTaskExt->Distance > NextDistance) ? pTaskExt->Distance : (CPU_INT32U)NextDistance; +} + +static void GT_TickHandler(void *CallBackRef) +{ + CPU_INT32U nextIRQ = 0xFFFFFFFF; /* The next activation of all tasks is used as next IRQ */ + CPU_INT32U nextActivation = 0; + int i = 0; + GT_TASK_T *pTask; + u32 StatusEvent; + XTtcPs_Stop(>_Timer); + + /* + * Read the interrupt status, then write it back to clear the interrupt. + */ + StatusEvent = XTtcPs_GetInterruptStatus(>_Timer); + XTtcPs_ClearInterruptStatus(>_Timer, StatusEvent); + + if ((XTTCPS_IXR_INTERVAL_MASK & StatusEvent) != 0) { + for(i=0; i < GT_NUM_OF_TASKS; i++){ + pTask = (GT_TASK_T *)>_TaskTable[i]; + if(pTask->ActivationType == GT_ACT_INT && pTask->Internal.Ready) + { + if(GT_LastInterval < pTask->Internal.NextAct) + pTask->Internal.NextAct -= GT_LastInterval; + else + pTask->Internal.NextAct = 0; + if(!pTask->Internal.NextAct) + { + /* + * Get next activation time + */ + nextActivation = _GT_GetNextActivation(pTask); + pTask->Internal.NextAct = nextActivation; + /* + * Activate task + */ + GT_ActivateTask(i); + //pTask->Internal.NextAbsD=pTask->D; + if(nextActivation < nextIRQ){ + nextIRQ = nextActivation; + } + } + } + } + GT_LastInterval = nextIRQ; + XTtcPs_SetInterval(>_Timer, nextIRQ * GT_TickScalingFactor); + } + + XTtcPs_Start(>_Timer); +} + +void GT_HW_InitTimer(){ + int Status; + XTtcPs_Config *Config; + + /* + * Look up the configuration based on the device identifier + * and initialize the device + */ + Config = XTtcPs_LookupConfig(GT_TTC_DEVICE_ID); + XTtcPs_CfgInitialize(>_Timer, Config, Config->BaseAddress); + + /* + * Set the options and calculate prescaler + */ + XTtcPs_SetOptions(>_Timer, XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE); + + /* + * Set the interval and prescaler + */ +#ifdef GT_USE_CPU_ARM_V7_A + /* Calculate Prescaler for TTC with 16 Bit width */ + XTtcPs_SetPrescaler(>_Timer, 7); + GT_TickScalingFactor = GT_Timer.Config.InputClockHz / GT_TIMER_TICKS_PER_SEC / 256; +#else + /* Disable Prescaler for TTC with 32 Bit width */ + XTtcPs_SetPrescaler(>_Timer, XTTCPS_CLK_CNTRL_PS_DISABLE); + GT_TickScalingFactor = GT_Timer.Config.InputClockHz / GT_TIMER_TICKS_PER_SEC; +#endif + XTtcPs_SetInterval(>_Timer, 0); + + GT_LastInterval = 0; + + UCOS_IntVectSet (GT_TTC_PWM_INTR_ID, 0u, 0u, GT_TickHandler, NULL); + UCOS_IntSrcEn (GT_TTC_PWM_INTR_ID); + + /* + * Enable the interrupts for the tick timer/counter + * We only care about the interval timeout. + * Start the timer + */ + XTtcPs_EnableInterrupts(>_Timer, XTTCPS_IXR_INTERVAL_MASK); + XTtcPs_Start(>_Timer); +} diff --git a/src/Modules/genericTaskset/if/gt_core.h b/src/Modules/genericTaskset/if/gt_core.h new file mode 100644 index 0000000..765b128 --- /dev/null +++ b/src/Modules/genericTaskset/if/gt_core.h @@ -0,0 +1,27 @@ +/* + * gt_core.h + * + * Created on: Aug 22, 2014 + * Author: matthiasb + */ + +#ifndef GT_CORE_H_ +#define GT_CORE_H_ + +#include "ucos_ii.h" +#include "gt_types.h" +#include "gt_cfg.h" + +extern void GT_Calibrate(); +extern void GT_Init(); +extern void GT_TimeTick(void); +extern void GT_TaskSw (void); +extern void GT_Stop(void); +extern void GT_ActivateTask(CPU_INT08U id); +extern CPU_INT32U GT_GetActivationNumber(void); + +extern volatile CPU_INT32U GT_TaskNumber; +extern volatile GT_TASK_T *GT_TaskTable; +extern volatile CPU_INT32U GT_PrioOffset; + +#endif /* GT_CORE_H_ */ diff --git a/src/Modules/genericTaskset/if/gt_cpu.h b/src/Modules/genericTaskset/if/gt_cpu.h new file mode 100644 index 0000000..98ad390 --- /dev/null +++ b/src/Modules/genericTaskset/if/gt_cpu.h @@ -0,0 +1,111 @@ +/* + * gt_cpu.h + * + * Created on: Aug 25, 2014 + * Author: matthiasb + */ + +#ifndef GT_CPU_H_ +#define GT_CPU_H_ + +#include "gt_cfg.h" + +#define __ARCH_ARM_V_5_ASSEMBLY(x,y,z) \ + ({ CPU_INT32U __mul = (x); \ + CPU_INT32U __scale = (y); \ + asm volatile( " mov r0,#0 \n\t" \ + " mul r1,%0,%1 \n\t" \ + "1: add r0,r0,#1 \n\t" \ + " cmp r1,r0 \n\t" \ + " bne 1b \n\t" \ + : : "r" (__mul) , "r" (__scale) : ); }) + +#define __ARCH_ARM_V_7_ASSEMBLY(x,y,z) \ + ({ CPU_INT32U __mul = (x); \ + CPU_INT32U __offset = (y); \ + CPU_INT32U __scale = (z); \ + asm volatile( " cbz %0,2f \n\t" \ + " isb \n\t" \ + " mul r0,%0,%1 \n\t" \ + " subs r0,r0,%2 \n\t" \ + "1: itt ne \n\t" \ + " subsne r0,r0,#1 \n\t" \ + " bne 1b \n\t" \ + "2: \n\t" \ + : : "r" (__mul) , "r" (__scale) ,"r" (__offset) : ); }) + +/* + * The task&runnable offsets heavily depend on the user implemented hook functions! + * + * The cycle scale is based on the used freq. and the arch. specific inline assembly + * In order to generate a suitable result, provide the input in 0.1ms: 1ms => 10 + * + * You can overwrite this defaults with your app specific gt_cfg.h + */ +#if GT_USE_CPU_ARM9 > 0 +#warning "Offsets for runables & tasks not supported in __ARCH_ARM_V_5_ASSEMBLY at the moment" +#ifndef GT_CPU_CYCLE_SCALE +#define GT_CPU_CYCLE_SCALE 5347 //arm9@200MHz +#endif +#ifndef GT_CPU_OS_RUNABLE_OFFSET +#error "TODO: GT_CPU_OS_RUNABLE_OFFSET for arm9@200MHz" +#endif +#ifndef GT_CPU_OS_TASK_OFFSET +#error "TODO: GT_CPU_OS_TASK_OFFSET for arm9@200MHz" +#endif +#define __burn_wcet(x,y) __ARCH_ARM_V_5_ASSEMBLY(x,y) +#endif + +#if GT_USE_CPU_CM3 > 0 +#ifndef GT_CPU_CYCLE_SCALE +#define GT_CPU_CYCLE_SCALE 2800 //cm3@120MHz +#endif +#ifndef GT_CPU_OS_RUNABLE_OFFSET +#define GT_CPU_OS_RUNABLE_OFFSET 950 //cm3@120MHz +#endif +#ifndef GT_CPU_OS_TASK_OFFSET +#define GT_CPU_OS_TASK_OFFSET 850 //cm3@120MHz +#endif +#define __burn_wcet(x,y,z) __ARCH_ARM_V_7_ASSEMBLY(x,y,z) +#endif + +#if GT_USE_CPU_CM7 > 0 +#ifndef GT_CPU_CYCLE_SCALE +#define GT_CPU_CYCLE_SCALE 7200 +#endif +#ifndef GT_CPU_OS_RUNABLE_OFFSET +#define GT_CPU_OS_RUNABLE_OFFSET 1240 +#endif +#ifndef GT_CPU_OS_TASK_OFFSET +#define GT_CPU_OS_TASK_OFFSET 200//1110 +#endif +#define __burn_wcet(x,y,z) __ARCH_ARM_V_7_ASSEMBLY(x,y,z) +#endif + +#if GT_USE_CPU_ARM_V7_A > 0 +#ifndef GT_CPU_CYCLE_SCALE +#define GT_CPU_CYCLE_SCALE 25000 //armv7a@666MHz +#endif +#ifndef GT_CPU_OS_RUNABLE_OFFSET +#define GT_CPU_OS_RUNABLE_OFFSET 1240 +#endif +#ifndef GT_CPU_OS_TASK_OFFSET +#define GT_CPU_OS_TASK_OFFSET 3000 //extrapoliert von CM3 auf cortex_a9@666,666MHz +#endif +#define __burn_wcet(x,y,z) __ARCH_ARM_V_7_ASSEMBLY(x,y,z) +#endif + +#if GT_USE_CPU_PSUR5 > 0 +#ifndef GT_CPU_CYCLE_SCALE +#define GT_CPU_CYCLE_SCALE 10000 /* Cortex R5 @ 100MHz */ +#endif +#ifndef GT_CPU_OS_RUNABLE_OFFSET +#define GT_CPU_OS_RUNABLE_OFFSET 0 /* Not used yet */ +#endif +#ifndef GT_CPU_OS_TASK_OFFSET +#define GT_CPU_OS_TASK_OFFSET 0 /* Not used yet */ +#endif +#define __burn_wcet(x,y,z) __ARCH_ARM_V_7_ASSEMBLY(x,y,z) +#endif + +#endif /* GT_CPU_H_ */ diff --git a/src/Modules/genericTaskset/if/gt_hw_port.h b/src/Modules/genericTaskset/if/gt_hw_port.h new file mode 100644 index 0000000..fac4f46 --- /dev/null +++ b/src/Modules/genericTaskset/if/gt_hw_port.h @@ -0,0 +1,13 @@ +/* + * gt_hw_port.h + * + * Created on: 05.06.2018 + * Author: kaige + */ + +#ifndef SRC_MODULES_GENERICTASKSET_IF_GT_HW_PORT_H_ +#define SRC_MODULES_GENERICTASKSET_IF_GT_HW_PORT_H_ + +void GT_HW_InitTimer(); + +#endif /* SRC_MODULES_GENERICTASKSET_IF_GT_HW_PORT_H_ */ diff --git a/src/Modules/genericTaskset/if/gt_types.h b/src/Modules/genericTaskset/if/gt_types.h new file mode 100644 index 0000000..b7ac5d3 --- /dev/null +++ b/src/Modules/genericTaskset/if/gt_types.h @@ -0,0 +1,94 @@ +/* + * gt_types.h + * + * Created on: Aug 19, 2014 + * Author: matthiasb + */ + +#ifndef GT_TYPES_H_ +#define GT_TYPES_H_ + +#include "cpu.h" +#include "ucos_ii.h" +#include "gt_cfg.h" + +#define GT_INTERNAL_NULL {0,0,0,0,0,0,0,0,"\0\0\0\0"} +#define GT_RUNABLE_NULL {0,0,(void *)0} + +typedef struct _GT_TASK_T GT_TASK_T; + +typedef struct +{ + OS_TCB *pTCB; + CPU_INT32U CurrAct; + CPU_INT32U NextAct; + OS_EVENT *pActQ; + CPU_INT08U Ready; + CPU_INT32U ActCounter; + CPU_INT32U SeqNr; + CPU_INT32U NextAbsD; + CPU_INT08U Name[4]; +}GT_RT_VAL_T; + +typedef enum +{ + GT_TASK_DEF = 0, /* Default Task (burns CET) */ + GT_TASK_RUN = 1, /* Task consisting fo runnables (that burn CET) */ + GT_TASK_EXT = 2, /* External task described by init and loop function */ +}GT_TYPE_T; + +typedef enum { + GT_ACT_OFF = 0, /* Task is not activated */ + GT_ACT_INT = 1, /* Task is activated by generic taskset */ + GT_ACT_EXT = 2, /* Task has an external activation */ + GT_ACT_ONE = 3, /* Task is activated once (task create) */ +}GT_ACTIVATION_TYPE; + +struct _GT_TASK_T +{ + GT_TYPE_T Type; + GT_ACTIVATION_TYPE ActivationType; + CPU_INT08U Id; + CPU_INT08U Prio; + int (*TaskInitFunction)(void*); + int (*TaskFunction)(void*); + void* TaskArg; + struct + { + CPU_INT32U Count; + CPU_INT32U Max; + void *Extension; + }Runable; + GT_RT_VAL_T Internal; + void * Extension; +}; + +/* + * Internal task extension struct + */ + + /* + * Internal task extension struct + */ +typedef struct +{ + CPU_INT32U BCET; + CPU_INT32U WCET; +}GT_WL_CET_T; + +typedef struct +{ + CPU_INT32U Period; + CPU_INT32U Jitter; + CPU_INT32U Distance; + GT_WL_CET_T CET; +}GT_TASK_EXT_T; + +typedef struct +{ + GT_TASK_T *pTaskTable; + CPU_INT08U TaskCount; + void *Extension; +}GT_INIT_T; + +#endif /* GT_TYPES_H_ */ diff --git a/src/Modules/genericTaskset/src/gt_core.c b/src/Modules/genericTaskset/src/gt_core.c new file mode 100644 index 0000000..5e54810 --- /dev/null +++ b/src/Modules/genericTaskset/src/gt_core.c @@ -0,0 +1,358 @@ +/* + * gt_core.c + * + * Created on: Aug 19, 2014 + * Author: matthiasb + */ +#include "gt_cfg.h" /* Module config */ +//#include "gt_hooks.h" /* Module hooks */ +#include "gt_types.h" /* Typedef */ +#include "gt_cpu.h" /* CPU assembly */ +#include "gt_hw_port.h" +#include /* memcpy */ +#include +#include /* rand */ + +/* + * Global varibales + */ +//volatile CPU_INT32U GT_TaskNumber = 0; +volatile GT_TASK_T *GT_TaskTable = (GT_TASK_T *)0; + +extern GT_TASK_T GT_Tasks[]; +/* + * Internal variables + */ +static OS_STK TASK_STACKS[GT_NUM_OF_TASKS][GT_STACKSIZE]; +static void * ActivationQ[GT_NUM_OF_TASKS][GT_MAXQACT]; + +/* + * Function prototypes for static inline functions + * We always inline functions to reduce the RAM usage, therefore we can minimize the stack sizes + */ +static void _GT_TaskLoop (GT_TASK_T *pMyOwnTask) __attribute__ ((always_inline)); +static void _GT_RunableLoop (GT_TASK_T *pMyOwnTask) __attribute__ ((always_inline)); + +/** + * Weak functions for hooks that are not implemented + */ +__attribute__((weak)) void GT_TaskStartHook(GT_TASK_T *pMyOwnTask) {(void)pMyOwnTask;return;} +__attribute__((weak)) void GT_TaskEndHook(GT_TASK_T *pMyOwnTask){return;} +__attribute__((weak)) void GT_RunableStartHook(GT_TASK_T *pMyOwnTask){(void)pMyOwnTask;return;} +__attribute__((weak)) void GT_RunableEndHook(GT_TASK_T *pMyOwnTask){return;} +__attribute__((weak)) void GT_TaskSwHook (GT_TASK_T *pMyOwnTask){return;} +__attribute__((weak)) void GT_InitHook(GT_INIT_T * pInit){return;} +__attribute__((weak)) void GT_StopHook(void){return;} +__attribute__((weak)) volatile void GT_CalibrateStartHook(void){return;} +__attribute__((weak)) volatile void GT_CalibrateEndHook(void){return;} + +inline static void _GT_WaitForActivation(GT_TASK_T *pMyOwnTask){ + INT8U err = OS_ERR_NONE; + if(pMyOwnTask->ActivationType != GT_ACT_ONE) + pMyOwnTask->Internal.CurrAct = (CPU_INT32U)OSQPend(pMyOwnTask->Internal.pActQ,0,&err); +} + +/* + * Function to determine task execution time + */ +static CPU_INT32U _GT_GetTaskCet(GT_TASK_T * pThisTask) +{ + /* + * Simple randomized jitter between BCET and WCET + */ + GT_TASK_EXT_T * pTaskExt = (GT_TASK_EXT_T*)pThisTask->Extension; + CPU_INT32U BCET = pTaskExt->CET.BCET; + CPU_INT32U WCET = pTaskExt->CET.WCET; + return (BCET < WCET) ? (WCET - (rand() % (WCET - BCET + 1))) : WCET; +} + +/* + * Hook function for default task main loop + */ +inline static void _GT_TaskLoop(GT_TASK_T *pMyOwnTask) +{ + OS_CPU_SR cpu_sr = 0; + + OS_ENTER_CRITICAL(); + pMyOwnTask->Internal.Ready = 1; + OS_EXIT_CRITICAL(); + + for(;;) + { + _GT_WaitForActivation(pMyOwnTask); + /* + * Call task start hook + */ + GT_TaskStartHook(pMyOwnTask); + /* + * Determine CET + */ + CPU_INT32U CET = _GT_GetTaskCet(pMyOwnTask); + /* + * Burn CET + */ + __burn_wcet(CET,GT_CPU_OS_TASK_OFFSET,GT_CPU_CYCLE_SCALE); + /* + * Call task end hook + */ + GT_TaskEndHook(pMyOwnTask); + /* + * Increment sequence number + */ + pMyOwnTask->Internal.SeqNr++; + + } +} + +/* + * Hook function for runable task main loop + */ +inline static void _GT_RunableLoop(GT_TASK_T *pMyOwnTask) +{ + OS_CPU_SR cpu_sr = 0; + + OS_ENTER_CRITICAL(); + pMyOwnTask->Internal.Ready = 1; + OS_EXIT_CRITICAL(); + + for(;;) + { + _GT_WaitForActivation(pMyOwnTask); + + for(pMyOwnTask->Runable.Count=0; + pMyOwnTask->Runable.Count < pMyOwnTask->Runable.Max; + pMyOwnTask->Runable.Count++) + { + /* + * Call runable start hook + */ + GT_RunableStartHook(pMyOwnTask); + /* + * Determine CET + */ + CPU_INT32U CET = _GT_GetTaskCet(pMyOwnTask); + /* + * Burn WCET + */ + __burn_wcet(CET,GT_CPU_OS_RUNABLE_OFFSET,GT_CPU_CYCLE_SCALE); + /* + * Call runable end hook + */ + GT_RunableEndHook(pMyOwnTask); + } + } +} + +/* + * Hook function for external task main loop + */ +inline static void _GT_ExtTaskLoop(GT_TASK_T *pMyOwnTask) +{ + OS_CPU_SR cpu_sr = 0; + + OS_ENTER_CRITICAL(); + pMyOwnTask->Internal.Ready = 1; + OS_EXIT_CRITICAL(); + + for(;;) + { + _GT_WaitForActivation(pMyOwnTask); + /* + * Call task start hook + */ + GT_TaskStartHook(pMyOwnTask); + /* + * Execute Real Task + */ + if(pMyOwnTask->TaskFunction(pMyOwnTask->TaskArg) < 0){ + OSTaskDel(OS_PRIO_SELF); + } + /* + * Call task end hook + */ + GT_TaskEndHook(pMyOwnTask); + /* + * Increment sequence number + */ + pMyOwnTask->Internal.SeqNr++; + + } +} + +/* + * Reentrant task body + */ +static void _GT_Task(void *pArg) +{ + GT_TASK_T *pMyOwnTask = (GT_TASK_T *)pArg; + + if(pMyOwnTask->Type == GT_TASK_EXT && pMyOwnTask->TaskInitFunction != NULL){ + CPU_INT32U result = pMyOwnTask->TaskInitFunction(pMyOwnTask->TaskArg); + if(result < 0){ + printf("GT: Init function returned -1\n"); + OSTaskSuspend(OS_PRIO_SELF); + } + } + + /* + * Determine task type and call + * corresponding loop hook + */ + switch(pMyOwnTask->Type) + { + case GT_TASK_DEF: + _GT_TaskLoop(pMyOwnTask); + break; + case GT_TASK_RUN: + _GT_RunableLoop(pMyOwnTask); + break; + case GT_TASK_EXT: + _GT_ExtTaskLoop(pMyOwnTask); + break; + } +} + +/* + * add this function to "void App_TaskSwHook (void){}" + */ +void GT_TaskSw (void) +{ + uint16_t id = OSTCBHighRdy->OSTCBId; + if(id <= GT_NUM_OF_TASKS){ + GT_TaskSwHook(>_Tasks[id]); + } +} + +/* + * Helper function to calibrate GT_CPU_CYCLE_SCALE and GT_CPU_OS_TASK_OFFSET for gt_cpu.h + * Set Tracepoint on the "nop" command to trace runtime. + * Start by setting GT_CPU_OS_TASK_OFFSET=0 and try to calibrate long delays by modyfing GT_CPU_CYCLE_SCALE + * Then start to increase GT_CPU_OS_TASK_OFFSET to fix offset for short delays + * Use this before any other background jobs (like OS Tasks) are started + * (at the beginning of your main when for example caching is configured) + */ +void GT_Calibrate() +{ + int i = 0; + int delay = 1; + for(i = 0; i < 10; i++){ + GT_CalibrateStartHook(); + __burn_wcet(delay,GT_CPU_OS_TASK_OFFSET,GT_CPU_CYCLE_SCALE); + GT_CalibrateEndHook(); + delay = delay * 2; + } +} + +/* + * Init function for GT module + */ +void GT_Init() +{ + CPU_INT08U i = 0; + CPU_INT08U err = OS_ERR_NONE; + + /* + * Init task stacks + */ + memset(TASK_STACKS,0,sizeof(CPU_STK)*GT_NUM_OF_TASKS*GT_STACKSIZE); + + /* + * Init internal variables + */ + GT_TASK_T *pTasks = GT_Tasks; + /* + * Create tasks + */ + for(i=0;i 0 + opt |= OS_TASK_OPT_SCHED_EDF; /* Add EDF scheduling paradigm if needed */ +#endif + err = OSTaskCreateExt( _GT_Task, /* Application task */ + (void *)&pTasks[i], /* argument passed to the task */ + &TASK_STACKS[i][GT_STACKSIZE-1],/* Set Top-Of-Stack */ + pTasks[i].Prio, /* Set priority level */ + pTasks[i].Id, /* ID -> Index of the created task */ + &TASK_STACKS[i][0], /* Set Bottom-Of-Stack */ + GT_STACKSIZE, /* Stacksize */ + (void *)0, /* TCB extension */ + opt); + if(err != OS_ERR_NONE){ + printf("GT: Error while creating a task\n"); + return; + } + sprintf((char *)pTasks[i].Internal.Name,"T%02d",pTasks[i].Id); + +#if OS_TASK_NAME_EN > 0 + /* Give the Task a name */ + OSTaskNameSet ( pTasks[i].Prio,(CPU_INT08U *)pTasks[i].Internal.Name, &err); +#endif + +#if OS_EVENT_NAME_EN > 0 + /* Give the activation queue the tasks name */ + OSEventNameSet(pTasks[i].Internal.pActQ,(CPU_INT08U *)pTasks[i].Internal.Name, &err); +#endif + /* + * Add cross reference to corresponding + * task control block + */ + pTasks[i].Internal.pTCB = OSTCBPrioTbl[pTasks[i].Prio]; + } + /* + * Call init hook + */ + GT_InitHook(NULL); + + /* + * Wait 1ms to start the tasks and + * release tasks + */ + OSTimeDly(OS_TICKS_PER_SEC/100); + GT_TaskTable = pTasks; + GT_HW_InitTimer(); +} +/* + * Stop taskset + */ +void GT_Stop(void) +{ + CPU_INT08U i = 0; + OS_CPU_SR cpu_sr = 0; + if(GT_TaskTable) + { + OS_ENTER_CRITICAL(); + for(i=0;iOSTCBId].Internal.SeqNr; +} diff --git a/src/Modules/tlsf/COPYING b/src/Modules/tlsf/COPYING new file mode 100644 index 0000000..6085898 --- /dev/null +++ b/src/Modules/tlsf/COPYING @@ -0,0 +1,23 @@ + LICENSE INFORMATION + +TLSF is released as LGPL and GPL. A copy of both licences can be found in this +directoy. For the GPL licence, the following exception applies. + + +TLSF is free software; you can redistribute it and/or modify it under terms of +the GNU General Public License as published by the Free Software Foundation; +either version 2, or (at your option) any later version. TLSF is distributed +in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the +implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See +the GNU General Public License for more details. You should have received a +copy of the GNU General Public License along with TLSF; see file COPYING. If +not, write to the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, +USA. + +As a special exception, including TLSF header files in a file, or linking with +other files objects to produce an executable application, is merely considered +normal use of the library, and does *not* fall under the heading of "derived +work". Therfore does not by itself cause the resulting executable application +to be covered by the GNU General Public License. This exception does not +however invalidate any other reasons why the executable file might be covered +by the GNU Public License. diff --git a/src/Modules/tlsf/Changelog b/src/Modules/tlsf/Changelog new file mode 100644 index 0000000..dfc0a33 --- /dev/null +++ b/src/Modules/tlsf/Changelog @@ -0,0 +1,132 @@ + Version History + --------------- + + + -v2.4.6 (September 10 2009) + * Fixed a bug in the realloc func (discovered by the rockbox + project: www.rockbox.org). + + + -v2.4.5 (November 24 2008) + * Working on OSX/FreeBSD (may be for OpenBSD/NetBSD too). + Reported by Younès HAFRI. + printf (and stdio.h include) is now optional. + Reported by Masaki Muranaka + + -v2.4.4 (October 13 2008) + * Corrected minor syntactic bug on statistic gathering code. + Reported by Tim Cussins and P. Mantegazza. + + -v2.4.3 (July 30 2008) + * Minor fixes to compile with the greenhills compiler. + Reported by "Kaya, Sinan SEA" + * Small change in the license in order to include TLSF in the RTEMS + project. + + -v2.4.2 (May 16 2008) (Herman ten Brugge) + * Memory usage statistics added again, with cleaner and more compacted + code. + + -v2.4.1 (April 30 2008) + * Fixed a bug in the tlsf_realloc function: init the pool automatically + on the first call. + Reported by: Alejandro Mery + + -v2.4 (Feb 19 2008) + * "rtl_*" functions renamed to "tlsf_*". + * Added the add_new_area function to insert new memory areas to an + existing memory pool. + * A single TLSF pool can manage non-contiguous memory areas. + * Support for mmap and sbrk added. + * The init_memory_pool is not longer needed when used on a system + with mmap or sbrk. + * Removed the get_used_size counting.The same functionality can be + implemented outside the TLSF code. + + -v2.3.2 (Sep 27 2007) + * Minor cosmetic code improvements. + + -v2.3.1 (Jul 30 2007) + * Fixed some minor bugs in the version 2.3. Herman ten Brugge + + + -v2.3 (Jul 28 2007) Released a new version with all the contributions + received from Herman ten Brugge + (This is his summary of changes in the TLSF's code): + * Add 64 bit support. It now runs on x86_64 and solaris64. + * I also tested this on vxworks/32 and solaris/32 and i386/32 + processors. + * Remove assembly code. I could not measure any performance difference + on my core2 processor. This also makes the code more portable. + * Moved defines/typedefs from tlsf.h to tlsf.c + * Changed MIN_BLOCK_SIZE to sizeof (free_ptr_t) and BHDR_OVERHEAD to + (sizeof (bhdr_t) - MIN_BLOCK_SIZE). This does not change the fact + that the minumum size is still sizeof (bhdr_t). + * Changed all C++ comment style to C style. (// -> /* ... *./) + * Used ls_bit instead of ffs and ms_bit instead of fls. I did this to + avoid confusion with the standard ffs function which returns + different values. + * Created set_bit/clear_bit fuctions because they are not present + on x86_64. + * Added locking support + extra file target.h to show how to use it. + * Added get_used_size function + * Added rtl_realloc and rtl_calloc function + * Implemented realloc clever support. + * Added some test code in the example directory. + + -- Thank you very much for your help Herman! + + -v2.2.1 (Oct 23 2006) + * Support for ARMv5 implemented by Adam Scislowicz + . Thank you for your contribution. + + - v2.2.0 (Jun 30 2006) Miguel Masmano & Ismael Ripoll. + + * Blocks smaller than 128 bytes are stored on a single + segregated list. The already existing bits maps and data + structures are used. + * Minor code speed-up improvements. + * Worst case response time both on malloc and free improved. + * External fragmantation also improved!. + * Segragared lists are AGAIN sorted by LIFO order. Version + 2.1b was proven to be no better than 2.1. + + - v2.1b: Allocation policy has been always a LIFO Good-Fit, that + is, between several free blocks in the same range, TLSF will + always allocate the most recently released. In this version of + TLSF, we have implemented a FIFO Good-Fit. However, + fragmentation doesn't seems to be altered so is it worth it?. + + - v2.1: Realloc and calloc included again in TLSF 2.0. + + - v2.0: In this version, TLSF has been programmed from scratch. + Now the allocator is provided as an unique file. Realloc and + calloc are not longer implemented. + + + - v1.4: Created the section "Version History". Studied real + behaviour of actual applications (regular applications tend + to require small memory blocks (less than 16 bytes) whereas + TLSF is optimised to be used with blocks larger than 16 + bytes: Added special lists to deal with blocks smaller than + 16 bytes. + + + - v1.3: Change of concept, now the main TLSF structure is created + inside of the beginning of the block instead of being an + static structure, allowing multiple TLSFs working at the + same time. Now, TLSF uses specific processor instructions to + deal with bitmaps. TLSF sanity functions added to find TLSF + overflows. The TLSF code will not be RTLinux-oriented any + more. + + - v1.1 ... v1.2: Many little bugs fixed, code cleaned and splitted + in several files because of cosmetic requirements. + Starting from TLSF v1.1, MaRTE OS + (http://marte.unican.es) uses the TLSF allocator + as its default memory allocator. + + - v0.1 ... v1.0: First implementations were created for testing and + research purposes. Basically TLSF is implemented to + be used by RTLinux-GPL (www.rtlinux-gpl.org), so + it is RTLinux-oriented. diff --git a/src/Modules/tlsf/GPL.txt b/src/Modules/tlsf/GPL.txt new file mode 100644 index 0000000..f47bd6d --- /dev/null +++ b/src/Modules/tlsf/GPL.txt @@ -0,0 +1,280 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. 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The exact terms of the licence +are described in the COPYING file. + +This component provides basic memory allocation functions: +malloc and free, as defined in the standard "C" library. + +This allocator was designed to provide real-time performance, that is: +1.- Bounded time malloc and free. +2.- Fast response time. +3.- Efficient memory management, that is low fragmentation. + + +The worst response time for both malloc and free is O(1). + + + +How to use it: + +This code is prepared to be used as a stand-alone code that can be +linked with a regular application or it can be compiled to be a Linux +module (which required the BigPhysicalArea patch). Initially the +module was designed to work jointly with RTLinux-GPL, but it can be +used as a stand alone Linux module. + +When compiled as a regular linux process the API is: + +Initialisation and destruction functions +---------------------------------------- + +init_memory_pool may be called before any request or release call: + +- size_t init_memory_pool(size_t, void *); +- void destroy_memory_pool(void *); + +Request and release functions +----------------------------- + +As can be seen, there are two functions for each traditional memory +allocation function (malloc, free, realloc, and calloc). One with the +prefix "tlsf_" and the other with the suffix "_ex". + +The versions with the prefix "tlsf_" provides the expected behaviour, +that is, allocating/releasing memory from the default memory pool. The +default memory pool is the last pool initialised by the +init_memory_pool function. + +On the other hand, the functions with the prefix "_ex" enable the use of several memory pools. + +- void *tlsf_malloc(size_t); +- void *malloc_ex(size_t, void *); + +- void tlsf_free(void *ptr); +- void free_ex(void *, void *); + +- void *tlsf_realloc(void *ptr, size_t size); +- void *realloc_ex(void *, size_t, void *); + +- void *tlsf_calloc(size_t nelem, size_t elem_size); +- void *calloc_ex(size_t, size_t, void *); + +EXAMPLE OF USE: + +char memory_pool[1024*1024]; + +{ + ... + + init_memory_pool(1024*1024, memory_pool); + + ... + + ptr1=malloc_ex(100, memory_pool); + ptr2=tlsf_malloc(100); // This function will use memory_pool + + ... + + tlsf_free(ptr2); + free_ex(ptr1, memory_pool); +} + +Growing the memory pool +----------------------- + +Starting from the version 2.4, the function add_new_area adds an +memory area to an existing memory pool. + +- size_t add_new_area(void *, size_t, void *); + +This feature is pretty useful when an existing memory pool is running +low and we want to add more free memory to it. +EXAMPLE OF USE: + +char memory_pool[1024*1024]; +char memory_pool2[1024*1024]; + +{ + ... + + init_memory_pool(1024*1024, memory_pool); + + ... + + ptr[0]=malloc_ex(1024*256 memory_pool); + ptr[1]=malloc_ex(1024*512, memory_pool); + add_new_area(memory_pool2, 1024*1024, memory_pool); + // Now we have an extra free memory area of 1Mb + // The next malloc may not fail + ptr[2]=malloc_ex(1024*512, memory_pool); + + ... + +} + + +SBRK and MMAP support +--------------------- + +The version 2.4 can use the functions SBRK and MMAP to _automatically_ +growing the memory pool, before running out of memory. + +So, when this feature is enabled, unless the operating system were out +of memory, a malloc operation would not fail due to an "out-of-memory" +error. + +To enable this support, compile tlsf.c with the FLAGS -DUSE_MMAP=1 or +-DUSE_SBRK=1 depending on whether you want to use "mmap" or "sbrk" or both. + +** By default (default Makefile) this feature is enabled. + +EXAMPLE OF USE: + +gcc -o tlsf.o -O2 -Wall -DUSE_MMAP=1 -DUSE_SBRK=1 + +--- + +If the sbrk/mmap support is enabled and we are _only_ going to use one +memory pool, it is not necessary to call init_memory_pool + +EXAMPLE OF USE (with MMAP/SBRK support enabled): + +{ + ... + + ptr2=tlsf_malloc(100); // This function will use memory_pool + + ... + + tlsf_free(ptr2); +} + + + + +This work has been supported by the followin projects: +EUROPEAN: IST-2001-35102(OCERA) http://www.ocera.org. +SPANISH: TIN2005-08665-C3-03 diff --git a/src/Modules/tlsf/TODO b/src/Modules/tlsf/TODO new file mode 100644 index 0000000..97ac7ee --- /dev/null +++ b/src/Modules/tlsf/TODO @@ -0,0 +1,9 @@ +To do list +========== + +* Add mmap/sbrk support (DONE - V2.4). + +* TLSF rounds-up request size to the head of a free list. + It has been shown to be a good policy for small blocks (<2048). + But for larger blocks this policy may cause excesive fragmentation. + A deeper analisys should be done. diff --git a/src/Modules/tlsf/target.h b/src/Modules/tlsf/target.h new file mode 100644 index 0000000..59746e0 --- /dev/null +++ b/src/Modules/tlsf/target.h @@ -0,0 +1,13 @@ +#ifndef _TARGET_H_ +#define _TARGET_H_ + +#include "ucos_ii.h" +#include "tlsf.h" +//uCOS-II port - make semaphore available to TLSF +#define TLSF_MLOCK_T OS_EVENT* +#define TLSF_CREATE_LOCK(l) *(l) = OSSemCreate(1) +#define TLSF_DESTROY_LOCK(l) INT8U err; OSSemDel(*(l), OS_DEL_ALWAYS, &err) +#define TLSF_ACQUIRE_LOCK(l) INT8U err; OSSemPend(*(l), 0, &err) +#define TLSF_RELEASE_LOCK(l) OSSemPost(*(l)) + +#endif diff --git a/src/Modules/tlsf/tlsf.c b/src/Modules/tlsf/tlsf.c new file mode 100644 index 0000000..cdb78ab --- /dev/null +++ b/src/Modules/tlsf/tlsf.c @@ -0,0 +1,1017 @@ +/* + * Two Levels Segregate Fit memory allocator (TLSF) + * Version 2.4.6 + * + * Written by Miguel Masmano Tello + * + * Thanks to Ismael Ripoll for his suggestions and reviews + * + * Copyright (C) 2008, 2007, 2006, 2005, 2004 + * + * This code is released using a dual license strategy: GPL/LGPL + * You can choose the licence that better fits your requirements. + * + * Released under the terms of the GNU General Public License Version 2.0 + * Released under the terms of the GNU Lesser General Public License Version 2.1 + * + */ + +/* + * Code contributions: + * + * (Jul 28 2007) Herman ten Brugge : + * + * - Add 64 bit support. It now runs on x86_64 and solaris64. + * - I also tested this on vxworks/32and solaris/32 and i386/32 processors. + * - Remove assembly code. I could not measure any performance difference + * on my core2 processor. This also makes the code more portable. + * - Moved defines/typedefs from tlsf.h to tlsf.c + * - Changed MIN_BLOCK_SIZE to sizeof (free_ptr_t) and BHDR_OVERHEAD to + * (sizeof (bhdr_t) - MIN_BLOCK_SIZE). This does not change the fact + * that the minumum size is still sizeof + * (bhdr_t). + * - Changed all C++ comment style to C style. (// -> /.* ... *./) + * - Used ls_bit instead of ffs and ms_bit instead of fls. I did this to + * avoid confusion with the standard ffs function which returns + * different values. + * - Created set_bit/clear_bit fuctions because they are not present + * on x86_64. + * - Added locking support + extra file target.h to show how to use it. + * - Added get_used_size function (REMOVED in 2.4) + * - Added rtl_realloc and rtl_calloc function + * - Implemented realloc clever support. + * - Added some test code in the example directory. + * - Bug fixed (discovered by the rockbox project: www.rockbox.org). + * + * (Oct 23 2006) Adam Scislowicz: + * + * - Support for ARMv5 implemented + * + */ + +/*#define USE_SBRK (0) */ +/*#define USE_MMAP (0) */ + +#define TLSF_STATISTIC 1 +#ifndef USE_PRINTF +#define USE_PRINTF (0) +#endif + +#include + +#ifndef TLSF_USE_LOCKS +#define TLSF_USE_LOCKS (1) +#endif + +#ifndef TLSF_STATISTIC +#define TLSF_STATISTIC (0) +#endif + +#ifndef USE_MMAP +#define USE_MMAP (0) +#endif + +#ifndef USE_SBRK +#define USE_SBRK (0) +#endif + + +#if TLSF_USE_LOCKS +#include "target.h" +#else +#define TLSF_CREATE_LOCK(_unused_) do{}while(0) +#define TLSF_DESTROY_LOCK(_unused_) do{}while(0) +#define TLSF_ACQUIRE_LOCK(_unused_) do{}while(0) +#define TLSF_RELEASE_LOCK(_unused_) do{}while(0) +#endif + +#if TLSF_STATISTIC +#define TLSF_ADD_SIZE(tlsf, b) do { \ + tlsf->used_size += (b->size & BLOCK_SIZE) + BHDR_OVERHEAD; \ + if (tlsf->used_size > tlsf->max_size) \ + tlsf->max_size = tlsf->used_size; \ + } while(0) + +#define TLSF_REMOVE_SIZE(tlsf, b) do { \ + tlsf->used_size -= (b->size & BLOCK_SIZE) + BHDR_OVERHEAD; \ + } while(0) +#else +#define TLSF_ADD_SIZE(tlsf, b) do{}while(0) +#define TLSF_REMOVE_SIZE(tlsf, b) do{}while(0) +#endif + +#if USE_MMAP || USE_SBRK +#include +#endif + +#if USE_MMAP +#include +#endif + +#include "tlsf.h" + +#if !defined(__GNUC__) +#ifndef __inline__ +#define __inline__ +#endif +#endif + +/* The debug functions only can be used when _DEBUG_TLSF_ is set. */ +#ifndef _DEBUG_TLSF_ +#define _DEBUG_TLSF_ (0) +#endif + +/*************************************************************************/ +/* Definition of the structures used by TLSF */ + + +/* Some IMPORTANT TLSF parameters */ +/* Unlike the preview TLSF versions, now they are statics */ +#define BLOCK_ALIGN (sizeof(void *) * 2) + +#define MAX_FLI (30) +#define MAX_LOG2_SLI (5) +#define MAX_SLI (1 << MAX_LOG2_SLI) /* MAX_SLI = 2^MAX_LOG2_SLI */ + +#define FLI_OFFSET (6) /* tlsf structure just will manage blocks bigger */ +/* than 128 bytes */ +#define SMALL_BLOCK (128) +#define REAL_FLI (MAX_FLI - FLI_OFFSET) +#define MIN_BLOCK_SIZE (sizeof (free_ptr_t)) +#define BHDR_OVERHEAD (sizeof (bhdr_t) - MIN_BLOCK_SIZE) +#define TLSF_SIGNATURE (0x2A59FA59) + +#define PTR_MASK (sizeof(void *) - 1) +#define BLOCK_SIZE (0xFFFFFFFF - PTR_MASK) + +#define GET_NEXT_BLOCK(_addr, _r) ((bhdr_t *) ((char *) (_addr) + (_r))) +#define MEM_ALIGN ((BLOCK_ALIGN) - 1) +#define ROUNDUP_SIZE(_r) (((_r) + MEM_ALIGN) & ~MEM_ALIGN) +#define ROUNDDOWN_SIZE(_r) ((_r) & ~MEM_ALIGN) +#define ROUNDUP(_x, _v) ((((~(_x)) + 1) & ((_v)-1)) + (_x)) + +#define BLOCK_STATE (0x1) +#define PREV_STATE (0x2) + +/* bit 0 of the block size */ +#define FREE_BLOCK (0x1) +#define USED_BLOCK (0x0) + +/* bit 1 of the block size */ +#define PREV_FREE (0x2) +#define PREV_USED (0x0) + + +#define DEFAULT_AREA_SIZE (1024*10) + +#ifdef USE_MMAP +#define PAGE_SIZE (getpagesize()) +#endif + +#if USE_PRINTF>0 +#include +# define PRINT_MSG(fmt, args...) printf(fmt, ## args) +# define ERROR_MSG(fmt, args...) printf(fmt, ## args) +#else +# if !defined(PRINT_MSG) +# define PRINT_MSG(fmt, args...) +# endif +# if !defined(ERROR_MSG) +# define ERROR_MSG(fmt, args...) +# endif +#endif + +typedef unsigned int u32_t; /* NOTE: Make sure that this type is 4 bytes long on your computer */ +typedef unsigned char u8_t; /* NOTE: Make sure that this type is 1 byte on your computer */ + +typedef struct free_ptr_struct { + struct bhdr_struct *prev; + struct bhdr_struct *next; +} free_ptr_t; + +typedef struct bhdr_struct { + /* This pointer is just valid if the first bit of size is set */ + struct bhdr_struct *prev_hdr; + /* The size is stored in bytes */ + size_t size; /* bit 0 indicates whether the block is used and */ + /* bit 1 allows to know whether the previous block is free */ + union { + struct free_ptr_struct free_ptr; + u8_t buffer[1]; /*sizeof(struct free_ptr_struct)]; */ + } ptr; +} bhdr_t; + +/* This structure is embedded at the beginning of each area, giving us + * enough information to cope with a set of areas */ + +typedef struct area_info_struct { + bhdr_t *end; + struct area_info_struct *next; +} area_info_t; + +typedef struct TLSF_struct { + /* the TLSF's structure signature */ + u32_t tlsf_signature; + +#if TLSF_USE_LOCKS + TLSF_MLOCK_T lock; +#endif + +#if TLSF_STATISTIC + /* These can not be calculated outside tlsf because we + * do not know the sizes when freeing/reallocing memory. */ + size_t used_size; + size_t max_size; +#endif + + /* A linked list holding all the existing areas */ + area_info_t *area_head; + + /* the first-level bitmap */ + /* This array should have a size of REAL_FLI bits */ + u32_t fl_bitmap; + + /* the second-level bitmap */ + u32_t sl_bitmap[REAL_FLI]; + + bhdr_t *matrix[REAL_FLI][MAX_SLI]; +} tlsf_t; + + +/******************************************************************/ +/************** Helping functions **************************/ +/******************************************************************/ +static __inline__ void set_bit(int nr, u32_t * addr); +static __inline__ void clear_bit(int nr, u32_t * addr); +static __inline__ int ls_bit(int x); +static __inline__ int ms_bit(int x); +static __inline__ void MAPPING_SEARCH(size_t * _r, int *_fl, int *_sl); +static __inline__ void MAPPING_INSERT(size_t _r, int *_fl, int *_sl); +static __inline__ bhdr_t *FIND_SUITABLE_BLOCK(tlsf_t * _tlsf, int *_fl, int *_sl); +static __inline__ bhdr_t *process_area(void *area, size_t size); +#if USE_SBRK || USE_MMAP +static __inline__ void *get_new_area(size_t * size); +#endif + +static const int table[] = { + -1, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, + 4, 4, + 4, 4, 4, 4, 4, 4, 4, + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + 5, + 5, 5, 5, 5, 5, 5, 5, + 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, + 6, + 6, 6, 6, 6, 6, 6, 6, + 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, + 6, + 6, 6, 6, 6, 6, 6, 6, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, + 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, + 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, + 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, + 7, 7, 7, 7, 7, 7, 7 +}; + +static __inline__ int ls_bit(int i) +{ + unsigned int a; + unsigned int x = i & -i; + + a = x <= 0xffff ? (x <= 0xff ? 0 : 8) : (x <= 0xffffff ? 16 : 24); + return table[x >> a] + a; +} + +static __inline__ int ms_bit(int i) +{ + unsigned int a; + unsigned int x = (unsigned int) i; + + a = x <= 0xffff ? (x <= 0xff ? 0 : 8) : (x <= 0xffffff ? 16 : 24); + return table[x >> a] + a; +} + +static __inline__ void set_bit(int nr, u32_t * addr) +{ + addr[nr >> 5] |= 1 << (nr & 0x1f); +} + +static __inline__ void clear_bit(int nr, u32_t * addr) +{ + addr[nr >> 5] &= ~(1 << (nr & 0x1f)); +} + +static __inline__ void MAPPING_SEARCH(size_t * _r, int *_fl, int *_sl) +{ + int _t; + + if (*_r < SMALL_BLOCK) { + *_fl = 0; + *_sl = *_r / (SMALL_BLOCK / MAX_SLI); + } else { + _t = (1 << (ms_bit(*_r) - MAX_LOG2_SLI)) - 1; + *_r = *_r + _t; + *_fl = ms_bit(*_r); + *_sl = (*_r >> (*_fl - MAX_LOG2_SLI)) - MAX_SLI; + *_fl -= FLI_OFFSET; + /*if ((*_fl -= FLI_OFFSET) < 0) // FL wil be always >0! + *_fl = *_sl = 0; + */ + *_r &= ~_t; + } +} + +static __inline__ void MAPPING_INSERT(size_t _r, int *_fl, int *_sl) +{ + if (_r < SMALL_BLOCK) { + *_fl = 0; + *_sl = _r / (SMALL_BLOCK / MAX_SLI); + } else { + *_fl = ms_bit(_r); + *_sl = (_r >> (*_fl - MAX_LOG2_SLI)) - MAX_SLI; + *_fl -= FLI_OFFSET; + } +} + + +static __inline__ bhdr_t *FIND_SUITABLE_BLOCK(tlsf_t * _tlsf, int *_fl, int *_sl) +{ + u32_t _tmp = _tlsf->sl_bitmap[*_fl] & (~0 << *_sl); + bhdr_t *_b = NULL; + + if (_tmp) { + *_sl = ls_bit(_tmp); + _b = _tlsf->matrix[*_fl][*_sl]; + } else { + *_fl = ls_bit(_tlsf->fl_bitmap & (~0 << (*_fl + 1))); + if (*_fl > 0) { /* likely */ + *_sl = ls_bit(_tlsf->sl_bitmap[*_fl]); + _b = _tlsf->matrix[*_fl][*_sl]; + } + } + return _b; +} + + +#define EXTRACT_BLOCK_HDR(_b, _tlsf, _fl, _sl) do { \ + _tlsf -> matrix [_fl] [_sl] = _b -> ptr.free_ptr.next; \ + if (_tlsf -> matrix[_fl][_sl]) \ + _tlsf -> matrix[_fl][_sl] -> ptr.free_ptr.prev = NULL; \ + else { \ + clear_bit (_sl, &_tlsf -> sl_bitmap [_fl]); \ + if (!_tlsf -> sl_bitmap [_fl]) \ + clear_bit (_fl, &_tlsf -> fl_bitmap); \ + } \ + _b -> ptr.free_ptr.prev = NULL; \ + _b -> ptr.free_ptr.next = NULL; \ + }while(0) + + +#define EXTRACT_BLOCK(_b, _tlsf, _fl, _sl) do { \ + if (_b -> ptr.free_ptr.next) \ + _b -> ptr.free_ptr.next -> ptr.free_ptr.prev = _b -> ptr.free_ptr.prev; \ + if (_b -> ptr.free_ptr.prev) \ + _b -> ptr.free_ptr.prev -> ptr.free_ptr.next = _b -> ptr.free_ptr.next; \ + if (_tlsf -> matrix [_fl][_sl] == _b) { \ + _tlsf -> matrix [_fl][_sl] = _b -> ptr.free_ptr.next; \ + if (!_tlsf -> matrix [_fl][_sl]) { \ + clear_bit (_sl, &_tlsf -> sl_bitmap[_fl]); \ + if (!_tlsf -> sl_bitmap [_fl]) \ + clear_bit (_fl, &_tlsf -> fl_bitmap); \ + } \ + } \ + _b -> ptr.free_ptr.prev = NULL; \ + _b -> ptr.free_ptr.next = NULL; \ + } while(0) + +#define INSERT_BLOCK(_b, _tlsf, _fl, _sl) do { \ + _b -> ptr.free_ptr.prev = NULL; \ + _b -> ptr.free_ptr.next = _tlsf -> matrix [_fl][_sl]; \ + if (_tlsf -> matrix [_fl][_sl]) \ + _tlsf -> matrix [_fl][_sl] -> ptr.free_ptr.prev = _b; \ + _tlsf -> matrix [_fl][_sl] = _b; \ + set_bit (_sl, &_tlsf -> sl_bitmap [_fl]); \ + set_bit (_fl, &_tlsf -> fl_bitmap); \ + } while(0) + +#if USE_SBRK || USE_MMAP +static __inline__ void *get_new_area(size_t * size) +{ + void *area; + +#if USE_SBRK + area = (void *)sbrk(0); + if (((void *)sbrk(*size)) != ((void *) -1)) + return area; +#endif + +#ifndef MAP_ANONYMOUS +/* https://dev.openwrt.org/ticket/322 */ +# define MAP_ANONYMOUS MAP_ANON +#endif + + +#if USE_MMAP + *size = ROUNDUP(*size, PAGE_SIZE); + if ((area = mmap(0, *size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0)) != MAP_FAILED) + return area; +#endif + return ((void *) ~0); +} +#endif + +static __inline__ bhdr_t *process_area(void *area, size_t size) +{ + bhdr_t *b, *lb, *ib; + area_info_t *ai; + + ib = (bhdr_t *) area; + ib->size = + (sizeof(area_info_t) < + MIN_BLOCK_SIZE) ? MIN_BLOCK_SIZE : ROUNDUP_SIZE(sizeof(area_info_t)) | USED_BLOCK | PREV_USED; + b = (bhdr_t *) GET_NEXT_BLOCK(ib->ptr.buffer, ib->size & BLOCK_SIZE); + b->size = ROUNDDOWN_SIZE(size - 3 * BHDR_OVERHEAD - (ib->size & BLOCK_SIZE)) | USED_BLOCK | PREV_USED; + b->ptr.free_ptr.prev = b->ptr.free_ptr.next = 0; + lb = GET_NEXT_BLOCK(b->ptr.buffer, b->size & BLOCK_SIZE); + lb->prev_hdr = b; + lb->size = 0 | USED_BLOCK | PREV_FREE; + ai = (area_info_t *) ib->ptr.buffer; + ai->next = 0; + ai->end = lb; + return ib; +} + +/******************************************************************/ +/******************** Begin of the allocator code *****************/ +/******************************************************************/ + +static char *mp = NULL; /* Default memory pool. */ + +/******************************************************************/ +size_t init_memory_pool(size_t mem_pool_size, void *mem_pool) +{ +/******************************************************************/ + tlsf_t *tlsf; + bhdr_t *b, *ib; + + if (!mem_pool || !mem_pool_size || mem_pool_size < sizeof(tlsf_t) + BHDR_OVERHEAD * 8) { + ERROR_MSG("init_memory_pool (): memory_pool invalid\n"); + return -1; + } + + if (((unsigned long) mem_pool & PTR_MASK)) { + ERROR_MSG("init_memory_pool (): mem_pool must be aligned to a word\n"); + return -1; + } + tlsf = (tlsf_t *) mem_pool; + /* Check if already initialised */ + if (tlsf->tlsf_signature == TLSF_SIGNATURE) { + mp = mem_pool; + b = GET_NEXT_BLOCK(mp, ROUNDUP_SIZE(sizeof(tlsf_t))); + return b->size & BLOCK_SIZE; + } + + mp = mem_pool; + + /* Zeroing the memory pool */ + memset(mem_pool, 0, sizeof(tlsf_t)); + + tlsf->tlsf_signature = TLSF_SIGNATURE; + + ib = process_area(GET_NEXT_BLOCK + (mem_pool, ROUNDUP_SIZE(sizeof(tlsf_t))), ROUNDDOWN_SIZE(mem_pool_size - sizeof(tlsf_t))); + b = GET_NEXT_BLOCK(ib->ptr.buffer, ib->size & BLOCK_SIZE); + free_ex(b->ptr.buffer, tlsf); + tlsf->area_head = (area_info_t *) ib->ptr.buffer; + +#if TLSF_STATISTIC + tlsf->used_size = mem_pool_size - (b->size & BLOCK_SIZE); + tlsf->max_size = tlsf->used_size; +#endif + + // create lock in the end so FreeRTOS can already use the heap to allocate the lock + TLSF_CREATE_LOCK(&tlsf->lock); + + return (b->size & BLOCK_SIZE); +} + +/******************************************************************/ +size_t add_new_area(void *area, size_t area_size, void *mem_pool) +{ +/******************************************************************/ + tlsf_t *tlsf = (tlsf_t *) mem_pool; + area_info_t *ptr, *ptr_prev, *ai; + bhdr_t *ib0, *b0, *lb0, *ib1, *b1, *lb1, *next_b; + + memset(area, 0, area_size); + ptr = tlsf->area_head; + ptr_prev = 0; + + ib0 = process_area(area, area_size); + b0 = GET_NEXT_BLOCK(ib0->ptr.buffer, ib0->size & BLOCK_SIZE); + lb0 = GET_NEXT_BLOCK(b0->ptr.buffer, b0->size & BLOCK_SIZE); + + /* Before inserting the new area, we have to merge this area with the + already existing ones */ + + while (ptr) { + ib1 = (bhdr_t *) ((char *) ptr - BHDR_OVERHEAD); + b1 = GET_NEXT_BLOCK(ib1->ptr.buffer, ib1->size & BLOCK_SIZE); + lb1 = ptr->end; + + /* Merging the new area with the next physically contigous one */ + if ((unsigned long) ib1 == (unsigned long) lb0 + BHDR_OVERHEAD) { + if (tlsf->area_head == ptr) { + tlsf->area_head = ptr->next; + ptr = ptr->next; + } else { + ptr_prev->next = ptr->next; + ptr = ptr->next; + } + + b0->size = + ROUNDDOWN_SIZE((b0->size & BLOCK_SIZE) + + (ib1->size & BLOCK_SIZE) + 2 * BHDR_OVERHEAD) | USED_BLOCK | PREV_USED; + + b1->prev_hdr = b0; + lb0 = lb1; + + continue; + } + + /* Merging the new area with the previous physically contigous + one */ + if ((unsigned long) lb1->ptr.buffer == (unsigned long) ib0) { + if (tlsf->area_head == ptr) { + tlsf->area_head = ptr->next; + ptr = ptr->next; + } else { + ptr_prev->next = ptr->next; + ptr = ptr->next; + } + + lb1->size = + ROUNDDOWN_SIZE((b0->size & BLOCK_SIZE) + + (ib0->size & BLOCK_SIZE) + 2 * BHDR_OVERHEAD) | USED_BLOCK | (lb1->size & PREV_STATE); + next_b = GET_NEXT_BLOCK(lb1->ptr.buffer, lb1->size & BLOCK_SIZE); + next_b->prev_hdr = lb1; + b0 = lb1; + ib0 = ib1; + + continue; + } + ptr_prev = ptr; + ptr = ptr->next; + } + + /* Inserting the area in the list of linked areas */ + ai = (area_info_t *) ib0->ptr.buffer; + ai->next = tlsf->area_head; + ai->end = lb0; + tlsf->area_head = ai; + free_ex(b0->ptr.buffer, mem_pool); + return (b0->size & BLOCK_SIZE); +} + + +/******************************************************************/ +size_t get_used_size(void *mem_pool) +{ +/******************************************************************/ +#if TLSF_STATISTIC + return ((tlsf_t *) mem_pool)->used_size; +#else + return 0; +#endif +} + +/******************************************************************/ +size_t get_max_size(void *mem_pool) +{ +/******************************************************************/ +#if TLSF_STATISTIC + return ((tlsf_t *) mem_pool)->max_size; +#else + return 0; +#endif +} + +/******************************************************************/ +void destroy_memory_pool(void *mem_pool) +{ +/******************************************************************/ + tlsf_t *tlsf = (tlsf_t *) mem_pool; + + tlsf->tlsf_signature = 0; + + TLSF_DESTROY_LOCK(&tlsf->lock); + +} + + +/******************************************************************/ +void *tlsf_malloc(size_t size) +{ +/******************************************************************/ + void *ret; + +#if USE_MMAP || USE_SBRK + if (!mp) { + size_t area_size; + void *area; + + area_size = sizeof(tlsf_t) + BHDR_OVERHEAD * 8; /* Just a safety constant */ + area_size = (area_size > DEFAULT_AREA_SIZE) ? area_size : DEFAULT_AREA_SIZE; + area = get_new_area(&area_size); + if (area == ((void *) ~0)) + return NULL; /* Not enough system memory */ + init_memory_pool(area_size, area); + } +#endif + + TLSF_ACQUIRE_LOCK(&((tlsf_t *)mp)->lock); + + ret = malloc_ex(size, mp); + + TLSF_RELEASE_LOCK(&((tlsf_t *)mp)->lock); + + return ret; +} + +/******************************************************************/ +void tlsf_free(void *ptr) +{ +/******************************************************************/ + + TLSF_ACQUIRE_LOCK(&((tlsf_t *)mp)->lock); + + free_ex(ptr, mp); + + TLSF_RELEASE_LOCK(&((tlsf_t *)mp)->lock); + +} + +/******************************************************************/ +void *tlsf_realloc(void *ptr, size_t size) +{ +/******************************************************************/ + void *ret; + +#if USE_MMAP || USE_SBRK + if (!mp) { + return tlsf_malloc(size); + } +#endif + + TLSF_ACQUIRE_LOCK(&((tlsf_t *)mp)->lock); + + ret = realloc_ex(ptr, size, mp); + + TLSF_RELEASE_LOCK(&((tlsf_t *)mp)->lock); + + return ret; +} + +/******************************************************************/ +void *tlsf_calloc(size_t nelem, size_t elem_size) +{ +/******************************************************************/ + void *ret; + + TLSF_ACQUIRE_LOCK(&((tlsf_t *)mp)->lock); + + ret = calloc_ex(nelem, elem_size, mp); + + TLSF_RELEASE_LOCK(&((tlsf_t *)mp)->lock); + + return ret; +} + +/******************************************************************/ +void *malloc_ex(size_t size, void *mem_pool) +{ +/******************************************************************/ + tlsf_t *tlsf = (tlsf_t *) mem_pool; + bhdr_t *b, *b2, *next_b; + int fl, sl; + size_t tmp_size; + + size = (size < MIN_BLOCK_SIZE) ? MIN_BLOCK_SIZE : ROUNDUP_SIZE(size); + + /* Rounding up the requested size and calculating fl and sl */ + MAPPING_SEARCH(&size, &fl, &sl); + + /* Searching a free block, recall that this function changes the values of fl and sl, + so they are not longer valid when the function fails */ + b = FIND_SUITABLE_BLOCK(tlsf, &fl, &sl); +#if USE_MMAP || USE_SBRK + if (!b) { + size_t area_size; + void *area; + /* Growing the pool size when needed */ + area_size = size + BHDR_OVERHEAD * 8; /* size plus enough room for the requered headers. */ + area_size = (area_size > DEFAULT_AREA_SIZE) ? area_size : DEFAULT_AREA_SIZE; + area = get_new_area(&area_size); /* Call sbrk or mmap */ + if (area == ((void *) ~0)) + return NULL; /* Not enough system memory */ + add_new_area(area, area_size, mem_pool); + /* Rounding up the requested size and calculating fl and sl */ + MAPPING_SEARCH(&size, &fl, &sl); + /* Searching a free block */ + b = FIND_SUITABLE_BLOCK(tlsf, &fl, &sl); + } +#endif + if (!b) + return NULL; /* Not found */ + + EXTRACT_BLOCK_HDR(b, tlsf, fl, sl); + + /*-- found: */ + next_b = GET_NEXT_BLOCK(b->ptr.buffer, b->size & BLOCK_SIZE); + /* Should the block be split? */ + tmp_size = (b->size & BLOCK_SIZE) - size; + if (tmp_size >= sizeof(bhdr_t)) { + tmp_size -= BHDR_OVERHEAD; + b2 = GET_NEXT_BLOCK(b->ptr.buffer, size); + b2->size = tmp_size | FREE_BLOCK | PREV_USED; + next_b->prev_hdr = b2; + MAPPING_INSERT(tmp_size, &fl, &sl); + INSERT_BLOCK(b2, tlsf, fl, sl); + + b->size = size | (b->size & PREV_STATE); + } else { + next_b->size &= (~PREV_FREE); + b->size &= (~FREE_BLOCK); /* Now it's used */ + } + + TLSF_ADD_SIZE(tlsf, b); + + return (void *) b->ptr.buffer; +} + +/******************************************************************/ +void free_ex(void *ptr, void *mem_pool) +{ +/******************************************************************/ + tlsf_t *tlsf = (tlsf_t *) mem_pool; + bhdr_t *b, *tmp_b; + int fl = 0, sl = 0; + + if (!ptr) { + return; + } + b = (bhdr_t *) ((char *) ptr - BHDR_OVERHEAD); + b->size |= FREE_BLOCK; + + TLSF_REMOVE_SIZE(tlsf, b); + + b->ptr.free_ptr.prev = NULL; + b->ptr.free_ptr.next = NULL; + tmp_b = GET_NEXT_BLOCK(b->ptr.buffer, b->size & BLOCK_SIZE); + if (tmp_b->size & FREE_BLOCK) { + MAPPING_INSERT(tmp_b->size & BLOCK_SIZE, &fl, &sl); + EXTRACT_BLOCK(tmp_b, tlsf, fl, sl); + b->size += (tmp_b->size & BLOCK_SIZE) + BHDR_OVERHEAD; + } + if (b->size & PREV_FREE) { + tmp_b = b->prev_hdr; + MAPPING_INSERT(tmp_b->size & BLOCK_SIZE, &fl, &sl); + EXTRACT_BLOCK(tmp_b, tlsf, fl, sl); + tmp_b->size += (b->size & BLOCK_SIZE) + BHDR_OVERHEAD; + b = tmp_b; + } + MAPPING_INSERT(b->size & BLOCK_SIZE, &fl, &sl); + INSERT_BLOCK(b, tlsf, fl, sl); + + tmp_b = GET_NEXT_BLOCK(b->ptr.buffer, b->size & BLOCK_SIZE); + tmp_b->size |= PREV_FREE; + tmp_b->prev_hdr = b; +} + +/******************************************************************/ +void *realloc_ex(void *ptr, size_t new_size, void *mem_pool) +{ +/******************************************************************/ + tlsf_t *tlsf = (tlsf_t *) mem_pool; + void *ptr_aux; + unsigned int cpsize; + bhdr_t *b, *tmp_b, *next_b; + int fl, sl; + size_t tmp_size; + + if (!ptr) { + if (new_size) + return (void *) malloc_ex(new_size, mem_pool); + if (!new_size) + return NULL; + } else if (!new_size) { + free_ex(ptr, mem_pool); + return NULL; + } + + b = (bhdr_t *) ((char *) ptr - BHDR_OVERHEAD); + next_b = GET_NEXT_BLOCK(b->ptr.buffer, b->size & BLOCK_SIZE); + new_size = (new_size < MIN_BLOCK_SIZE) ? MIN_BLOCK_SIZE : ROUNDUP_SIZE(new_size); + tmp_size = (b->size & BLOCK_SIZE); + if (new_size <= tmp_size) { + TLSF_REMOVE_SIZE(tlsf, b); + if (next_b->size & FREE_BLOCK) { + MAPPING_INSERT(next_b->size & BLOCK_SIZE, &fl, &sl); + EXTRACT_BLOCK(next_b, tlsf, fl, sl); + tmp_size += (next_b->size & BLOCK_SIZE) + BHDR_OVERHEAD; + next_b = GET_NEXT_BLOCK(next_b->ptr.buffer, next_b->size & BLOCK_SIZE); + /* We allways reenter this free block because tmp_size will + be greater then sizeof (bhdr_t) */ + } + tmp_size -= new_size; + if (tmp_size >= sizeof(bhdr_t)) { + tmp_size -= BHDR_OVERHEAD; + tmp_b = GET_NEXT_BLOCK(b->ptr.buffer, new_size); + tmp_b->size = tmp_size | FREE_BLOCK | PREV_USED; + next_b->prev_hdr = tmp_b; + next_b->size |= PREV_FREE; + MAPPING_INSERT(tmp_size, &fl, &sl); + INSERT_BLOCK(tmp_b, tlsf, fl, sl); + b->size = new_size | (b->size & PREV_STATE); + } + TLSF_ADD_SIZE(tlsf, b); + return (void *) b->ptr.buffer; + } + if ((next_b->size & FREE_BLOCK)) { + if (new_size <= (tmp_size + (next_b->size & BLOCK_SIZE))) { + TLSF_REMOVE_SIZE(tlsf, b); + MAPPING_INSERT(next_b->size & BLOCK_SIZE, &fl, &sl); + EXTRACT_BLOCK(next_b, tlsf, fl, sl); + b->size += (next_b->size & BLOCK_SIZE) + BHDR_OVERHEAD; + next_b = GET_NEXT_BLOCK(b->ptr.buffer, b->size & BLOCK_SIZE); + next_b->prev_hdr = b; + next_b->size &= ~PREV_FREE; + tmp_size = (b->size & BLOCK_SIZE) - new_size; + if (tmp_size >= sizeof(bhdr_t)) { + tmp_size -= BHDR_OVERHEAD; + tmp_b = GET_NEXT_BLOCK(b->ptr.buffer, new_size); + tmp_b->size = tmp_size | FREE_BLOCK | PREV_USED; + next_b->prev_hdr = tmp_b; + next_b->size |= PREV_FREE; + MAPPING_INSERT(tmp_size, &fl, &sl); + INSERT_BLOCK(tmp_b, tlsf, fl, sl); + b->size = new_size | (b->size & PREV_STATE); + } + TLSF_ADD_SIZE(tlsf, b); + return (void *) b->ptr.buffer; + } + } + + if (!(ptr_aux = malloc_ex(new_size, mem_pool))){ + return NULL; + } + + cpsize = ((b->size & BLOCK_SIZE) > new_size) ? new_size : (b->size & BLOCK_SIZE); + + memcpy(ptr_aux, ptr, cpsize); + + free_ex(ptr, mem_pool); + return ptr_aux; +} + + +/******************************************************************/ +void *calloc_ex(size_t nelem, size_t elem_size, void *mem_pool) +{ +/******************************************************************/ + void *ptr; + + if (nelem <= 0 || elem_size <= 0) + return NULL; + + if (!(ptr = malloc_ex(nelem * elem_size, mem_pool))) + return NULL; + memset(ptr, 0, nelem * elem_size); + + return ptr; +} + + + +#if _DEBUG_TLSF_ + +/*************** DEBUG FUNCTIONS **************/ + +/* The following functions have been designed to ease the debugging of */ +/* the TLSF structure. For non-developing purposes, it may be they */ +/* haven't too much worth. To enable them, _DEBUG_TLSF_ must be set. */ + +extern void dump_memory_region(unsigned char *mem_ptr, unsigned int size); +extern void print_block(bhdr_t * b); +extern void print_tlsf(tlsf_t * tlsf); +void print_all_blocks(tlsf_t * tlsf); + +void dump_memory_region(unsigned char *mem_ptr, unsigned int size) +{ + + unsigned long begin = (unsigned long) mem_ptr; + unsigned long end = (unsigned long) mem_ptr + size; + int column = 0; + + begin >>= 2; + begin <<= 2; + + end >>= 2; + end++; + end <<= 2; + + PRINT_MSG("\nMemory region dumped: 0x%lx - 0x%lx\n\n", begin, end); + + column = 0; + PRINT_MSG("0x%lx ", begin); + + while (begin < end) { + if (((unsigned char *) begin)[0] == 0) + PRINT_MSG("00"); + else + PRINT_MSG("%02x", ((unsigned char *) begin)[0]); + if (((unsigned char *) begin)[1] == 0) + PRINT_MSG("00 "); + else + PRINT_MSG("%02x ", ((unsigned char *) begin)[1]); + begin += 2; + column++; + if (column == 8) { + PRINT_MSG("\n0x%lx ", begin); + column = 0; + } + + } + PRINT_MSG("\n\n"); +} + +void print_block(bhdr_t * b) +{ + if (!b) + return; + PRINT_MSG(">> [%p] (", b); + if ((b->size & BLOCK_SIZE)) + PRINT_MSG("%lu bytes, ", (unsigned long) (b->size & BLOCK_SIZE)); + else + PRINT_MSG("sentinel, "); + if ((b->size & BLOCK_STATE) == FREE_BLOCK) + PRINT_MSG("free [%p, %p], ", b->ptr.free_ptr.prev, b->ptr.free_ptr.next); + else + PRINT_MSG("used, "); + if ((b->size & PREV_STATE) == PREV_FREE) + PRINT_MSG("prev. free [%p])\n", b->prev_hdr); + else + PRINT_MSG("prev used)\n"); +} + +void print_tlsf(tlsf_t * tlsf) +{ + bhdr_t *next; + int i, j; + + PRINT_MSG("\nTLSF at %p\n", tlsf); + + PRINT_MSG("FL bitmap: 0x%x\n\n", (unsigned) tlsf->fl_bitmap); + + for (i = 0; i < REAL_FLI; i++) { + if (tlsf->sl_bitmap[i]) + PRINT_MSG("SL bitmap 0x%x\n", (unsigned) tlsf->sl_bitmap[i]); + for (j = 0; j < MAX_SLI; j++) { + next = tlsf->matrix[i][j]; + if (next) + PRINT_MSG("-> [%d][%d]\n", i, j); + while (next) { + print_block(next); + next = next->ptr.free_ptr.next; + } + } + } +} + +void print_all_blocks(tlsf_t * tlsf) +{ + area_info_t *ai; + bhdr_t *next; + PRINT_MSG("\nTLSF at %p\nALL BLOCKS\n\n", tlsf); + ai = tlsf->area_head; + while (ai) { + next = (bhdr_t *) ((char *) ai - BHDR_OVERHEAD); + while (next) { + print_block(next); + if ((next->size & BLOCK_SIZE)) + next = GET_NEXT_BLOCK(next->ptr.buffer, next->size & BLOCK_SIZE); + else + next = NULL; + } + ai = ai->next; + } +} + +#endif diff --git a/src/Modules/tlsf/tlsf.h b/src/Modules/tlsf/tlsf.h new file mode 100644 index 0000000..65ed852 --- /dev/null +++ b/src/Modules/tlsf/tlsf.h @@ -0,0 +1,39 @@ +/* + * Two Levels Segregate Fit memory allocator (TLSF) + * Version 2.4.6 + * + * Written by Miguel Masmano Tello + * + * Thanks to Ismael Ripoll for his suggestions and reviews + * + * Copyright (C) 2008, 2007, 2006, 2005, 2004 + * + * This code is released using a dual license strategy: GPL/LGPL + * You can choose the licence that better fits your requirements. + * + * Released under the terms of the GNU General Public License Version 2.0 + * Released under the terms of the GNU Lesser General Public License Version 2.1 + * + */ + +#ifndef _TLSF_H_ +#define _TLSF_H_ + +#include + +extern size_t init_memory_pool(size_t, void *); +extern size_t get_used_size(void *); +extern size_t get_max_size(void *); +extern void destroy_memory_pool(void *); +extern size_t add_new_area(void *, size_t, void *); +extern void *malloc_ex(size_t, void *); +extern void free_ex(void *, void *); +extern void *realloc_ex(void *, size_t, void *); +extern void *calloc_ex(size_t, size_t, void *); + +extern void *tlsf_malloc(size_t size); +extern void tlsf_free(void *ptr); +extern void *tlsf_realloc(void *ptr, size_t size); +extern void *tlsf_calloc(size_t nelem, size_t elem_size); + +#endif diff --git a/src/Xilinx/include/bspconfig.h b/src/Xilinx/include/bspconfig.h new file mode 100644 index 0000000..b977241 --- /dev/null +++ b/src/Xilinx/include/bspconfig.h @@ -0,0 +1,45 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Configurations for Standalone BSP +* +*******************************************************************/ + +#ifndef BSPCONFIG_H /* prevent circular inclusions */ +#define BSPCONFIG_H /* by using protection macros */ + +#define MICROBLAZE_PVR_NONE + +#endif /*end of __BSPCONFIG_H_*/ diff --git a/src/Xilinx/include/diskio.h b/src/Xilinx/include/diskio.h new file mode 100644 index 0000000..e8cb253 --- /dev/null +++ b/src/Xilinx/include/diskio.h @@ -0,0 +1,79 @@ +/*-----------------------------------------------------------------------/ +/ Low level disk interface modlue include file (C)ChaN, 2014 / +/-----------------------------------------------------------------------*/ + +#ifndef DISKIO_DEFINED +#define DISKIO_DEFINED + +#ifdef __cplusplus +extern "C" { +#endif + +#define USE_WRITE 1 /* 1: Enable disk_write function */ +#define USE_IOCTL 1 /* 1: Enable disk_ioctl fucntion */ + +#include "integer.h" +#include "xil_types.h" + +/* Status of Disk Functions */ +typedef BYTE DSTATUS; + +/* Results of Disk Functions */ +typedef enum { + RES_OK = 0, /* 0: Successful */ + RES_ERROR, /* 1: R/W Error */ + RES_WRPRT, /* 2: Write Protected */ + RES_NOTRDY, /* 3: Not Ready */ + RES_PARERR /* 4: Invalid Parameter */ +} DRESULT; + + +/*---------------------------------------*/ +/* Prototypes for disk control functions */ + +DSTATUS disk_initialize (BYTE pdrv); +DSTATUS disk_status (BYTE pdrv); +DRESULT disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count); +DRESULT disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count); +DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff); + + +/* Disk Status Bits (DSTATUS) */ + +#define STA_NOINIT 0x01U /* Drive not initialized */ +#define STA_NODISK 0x02U /* No medium in the drive */ +#define STA_PROTECT 0x04U /* Write protected */ + + +/* Command code for disk_ioctrl fucntion */ + +/* Generic command (used by FatFs) */ +#define CTRL_SYNC 0U /* Flush disk cache (for write functions) */ +#define GET_SECTOR_COUNT 1U /* Get media size (for only f_mkfs()) */ +#define GET_SECTOR_SIZE 2U /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */ +#define GET_BLOCK_SIZE 3U /* Get erase block size (for only f_mkfs()) */ +#define CTRL_ERASE_SECTOR 4U /* Force erased a block of sectors (for only _USE_ERASE) */ + +/* Generic command (not used by FatFs) */ +#define CTRL_POWER 5U /* Get/Set power status */ +#define CTRL_LOCK 6U /* Lock/Unlock media removal */ +#define CTRL_EJECT 7U /* Eject media */ +#define CTRL_FORMAT 8U /* Create physical format on the media */ + +/* MMC/SDC specific ioctl command */ +#define MMC_GET_TYPE 10U /* Get card type */ +#define MMC_GET_CSD 11U /* Get CSD */ +#define MMC_GET_CID 12U /* Get CID */ +#define MMC_GET_OCR 13U /* Get OCR */ +#define MMC_GET_SDSTAT 14U /* Get SD status */ + +/* ATA/CF specific ioctl command */ +#define ATA_GET_REV 20U /* Get F/W revision */ +#define ATA_GET_MODEL 21U /* Get model name */ +#define ATA_GET_SN 22U /* Get serial number */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/Xilinx/include/ff.h b/src/Xilinx/include/ff.h new file mode 100644 index 0000000..2eb2268 --- /dev/null +++ b/src/Xilinx/include/ff.h @@ -0,0 +1,385 @@ +/*---------------------------------------------------------------------------/ +/ FatFs - FAT file system module include file R0.10b (C)ChaN, 2014 +/----------------------------------------------------------------------------/ +/ FatFs module is a generic FAT file system module for small embedded systems. +/ This is a free software that opened for education, research and commercial +/ developments under license policy of following terms. +/ +/ Copyright (C) 2014, ChaN, all right reserved. +/ +/ * The FatFs module is a free software and there is NO WARRANTY. +/ * No restriction on use. You can use, modify and redistribute it for +/ personal, non-profit or commercial product UNDER YOUR RESPONSIBILITY. +/ * Redistributions of source code must retain the above copyright notice. +/ +/----------------------------------------------------------------------------*/ + +#ifndef FAT_FS +#define FAT_FS 8051 /* Revision ID */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "xil_types.h" +#include "integer.h" /* Basic integer types */ +#include "ffconf.h" /* FatFs configuration options */ + +#if FAT_FS != _FFCONF +#error Wrong configuration file (ffconf.h). +#endif + + + +/* Definitions of volume management */ + +#if _MULTI_PARTITION /* Multiple partition configuration */ +typedef struct { + BYTE pd; /* Physical drive number */ + BYTE pt; /* Partition: 0:Auto detect, 1-4:Forced partition) */ +} PARTITION; +extern PARTITION VolToPart[]; /* Volume - Partition resolution table */ +#define LD2PD(vol) (VolToPart[vol].pd) /* Get physical drive number */ +#define LD2PT(vol) (VolToPart[vol].pt) /* Get partition index */ + +#else /* Single partition configuration */ +#define LD2PD(vol) (BYTE)((vol)) /* Each logical drive is bound to the same physical drive number */ +#define LD2PT(vol) 0U /* Find first valid partition or in SFD */ + +#endif + + + +/* Type of path name strings on FatFs API */ + +#if _LFN_UNICODE /* Unicode string */ +#if !_USE_LFN +#error _LFN_UNICODE must be 0 at non-LFN cfg. +#endif +#ifndef _INC_TCHAR +typedef WCHAR TCHAR; +#define T(x) L ## x +#define TEXT(x) L ## x +#endif + +#else /* ANSI/OEM string */ +#ifndef _INC_TCHAR +typedef char TCHAR; +#define T(x) (x) +#define TEXT(x) (x) +#endif + +#endif + + + +/* File system object structure (FATFS) */ + +typedef struct { + BYTE fs_type; /* FAT sub-type (0:Not mounted) */ + BYTE drv; /* Physical drive number */ + BYTE csize; /* Sectors per cluster (1,2,4...128) */ + BYTE n_fats; /* Number of FAT copies (1 or 2) */ + BYTE wflag; /* win[] flag (b0:dirty) */ + BYTE fsi_flag; /* FSINFO flags (b7:disabled, b0:dirty) */ + WORD id; /* File system mount ID */ + WORD n_rootdir; /* Number of root directory entries (FAT12/16) */ +#if _MAX_SS != _MIN_SS + WORD ssize; /* Bytes per sector (512, 1024, 2048 or 4096) */ +#endif +#if _FS_REENTRANT + _SYNC_t sobj; /* Identifier of sync object */ +#endif +#if !_FS_READONLY + DWORD last_clust; /* Last allocated cluster */ + DWORD free_clust; /* Number of free clusters */ +#endif +#if _FS_RPATH + DWORD cdir; /* Current directory start cluster (0:root) */ +#endif + DWORD n_fatent; /* Number of FAT entries, = number of clusters + 2 */ + DWORD fsize; /* Sectors per FAT */ + DWORD volbase; /* Volume start sector */ + DWORD fatbase; /* FAT start sector */ + DWORD dirbase; /* Root directory start sector (FAT32:Cluster#) */ + DWORD database; /* Data start sector */ + DWORD winsect; /* Current sector appearing in the win[] */ +#ifdef __ICCARM__ +#pragma data_alignment = 32 + BYTE win[_MAX_SS]; +#pragma data_alignment = 4 +#else + BYTE win[_MAX_SS] __attribute__ ((aligned(32))); /* Disk access window for Directory, FAT (and Data on tiny cfg) */ +#endif +} FATFS; + + + +/* File object structure (FIL) */ + +typedef struct { + FATFS* fs; /* Pointer to the related file system object (**do not change order**) */ + WORD id; /* Owner file system mount ID (**do not change order**) */ + BYTE flag; /* Status flags */ + BYTE err; /* Abort flag (error code) */ + DWORD fptr; /* File read/write pointer (Zeroed on file open) */ + DWORD fsize; /* File size */ + DWORD sclust; /* File start cluster (0:no cluster chain, always 0 when fsize is 0) */ + DWORD clust; /* Current cluster of fpter (not valid when fprt is 0) */ + DWORD dsect; /* Sector number appearing in buf[] (0:invalid) */ +#if !_FS_READONLY + DWORD dir_sect; /* Sector number containing the directory entry */ + BYTE* dir_ptr; /* Pointer to the directory entry in the win[] */ +#endif +#if _USE_FASTSEEK + DWORD* cltbl; /* Pointer to the cluster link map table (Nulled on file open) */ +#endif +#if _FS_LOCK + UINT lockid; /* File lock ID origin from 1 (index of file semaphore table Files[]) */ +#endif +#if !_FS_TINY +#ifdef __ICCARM__ +#pragma data_alignment = 32 + BYTE buf[_MAX_SS]; /* File data read/write buffer */ +#pragma data_alignment = 4 +#else + BYTE buf[_MAX_SS] __attribute__ ((aligned(32))); /* File data read/write buffer */ +#endif +#endif +} FIL; + + + +/* Directory object structure (DIR) */ + +typedef struct { + FATFS* fs; /* Pointer to the owner file system object (**do not change order**) */ + WORD id; /* Owner file system mount ID (**do not change order**) */ + WORD index; /* Current read/write index number */ + DWORD sclust; /* Table start cluster (0:Root dir) */ + DWORD clust; /* Current cluster */ + DWORD sect; /* Current sector */ + BYTE* dir; /* Pointer to the current SFN entry in the win[] */ + BYTE* fn; /* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */ +#if _FS_LOCK + UINT lockid; /* File lock ID (index of file semaphore table Files[]) */ +#endif +#if _USE_LFN + WCHAR* lfn; /* Pointer to the LFN working buffer */ + WORD lfn_idx; /* Last matched LFN index number (0xFFFF:No LFN) */ +#endif +} DIR; + + + +/* File status structure (FILINFO) */ + +typedef struct { + DWORD fsize; /* File size */ + WORD fdate; /* Last modified date */ + WORD ftime; /* Last modified time */ + BYTE fattrib; /* Attribute */ + TCHAR fname[13]; /* Short file name (8.3 format) */ +#if _USE_LFN + TCHAR* lfname; /* Pointer to the LFN buffer */ + UINT lfsize; /* Size of LFN buffer in TCHAR */ +#endif +} FILINFO; + + + +/* File function return code (FRESULT) */ + +typedef enum { + FR_OK = 0U, /* (0) Succeeded */ + FR_DISK_ERR, /* (1) A hard error occurred in the low level disk I/O layer */ + FR_INT_ERR, /* (2) Assertion failed */ + FR_NOT_READY, /* (3) The physical drive cannot work */ + FR_NO_FILE, /* (4) Could not find the file */ + FR_NO_PATH, /* (5) Could not find the path */ + FR_INVALID_NAME, /* (6) The path name format is invalid */ + FR_DENIED, /* (7) Access denied due to prohibited access or directory full */ + FR_EXIST, /* (8) Access denied due to prohibited access */ + FR_INVALID_OBJECT, /* (9) The file/directory object is invalid */ + FR_WRITE_PROTECTED, /* (10) The physical drive is write protected */ + FR_INVALID_DRIVE, /* (11) The logical drive number is invalid */ + FR_NOT_ENABLED, /* (12) The volume has no work area */ + FR_NO_FILESYSTEM, /* (13) There is no valid FAT volume */ + FR_MKFS_ABORTED, /* (14) The f_mkfs() aborted due to any parameter error */ + FR_TIMEOUT, /* (15) Could not get a grant to access the volume within defined period */ + FR_LOCKED, /* (16) The operation is rejected according to the file sharing policy */ + FR_NOT_ENOUGH_CORE, /* (17) LFN working buffer could not be allocated */ + FR_TOO_MANY_OPEN_FILES, /* (18) Number of open files > _FS_SHARE */ + FR_INVALID_PARAMETER /* (19) Given parameter is invalid */ +} FRESULT; + + + +/*--------------------------------------------------------------*/ +/* FatFs module application interface */ + +FRESULT f_open (FIL* fp, const TCHAR* path, BYTE mode); /* Open or create a file */ +FRESULT f_close (FIL* fp); /* Close an open file object */ +FRESULT f_read (FIL* fp, void* buff, UINT btr, UINT* br); /* Read data from a file */ +FRESULT f_write (FIL* fp, const void* buff, UINT btw, UINT* bw); /* Write data to a file */ +#if _USE_FORWARD +FRESULT f_forward (FIL* fp, UINT(*func)(const BYTE*,UINT), UINT btf, UINT* bf); /* Forward data to the stream */ +#endif +FRESULT f_lseek (FIL* fp, DWORD ofs); /* Move file pointer of a file object */ +FRESULT f_sync (FIL* fp); /* Flush cached data of a writing file */ +#if _FS_MINIMIZE <= 2 +#if _FS_MINIMIZE <= 1 +FRESULT f_opendir (DIR* dp, const TCHAR* path); /* Open a directory */ +FRESULT f_closedir (DIR* dp); /* Close an open directory */ +FRESULT f_readdir (DIR* dp, FILINFO* fno); /* Read a directory item */ +#if _FS_MINIMIZE == 0 +FRESULT f_stat (const TCHAR* path, FILINFO* fno); /* Get file status */ +#if !_FS_READONLY +FRESULT f_getfree (const TCHAR* path, DWORD* nclst, FATFS** fatfsys); +FRESULT f_truncate (FIL* fp); /* Truncate file */ +FRESULT f_unlink (const TCHAR* path); /* Delete an existing file or directory */ +FRESULT f_mkdir (const TCHAR* path); /* Create a sub directory */ +FRESULT f_rename (const TCHAR* path_old, const TCHAR* path_new); /* Rename/Move a file or directory */ +FRESULT f_chmod (const TCHAR* path, BYTE value, BYTE mask); /* Change attribute of the file/dir */ +FRESULT f_utime (const TCHAR* path, const FILINFO* fno); /* Change times-tamp of the file/dir */ +#endif +#endif +#endif +#endif +DWORD clust2sect (FATFS* fs, DWORD clst); +DWORD get_fat ( FATFS* fs, DWORD clst); +FRESULT put_fat (FATFS* fs, DWORD clst, DWORD val); +#if _FS_RPATH >= 1 +#if _VOLUMES >= 2 +FRESULT f_chdrive (const TCHAR* path); /* Change current drive */ +#endif +FRESULT f_chdir (const TCHAR* path); /* Change current directory */ +#if _FS_RPATH >= 2 +FRESULT f_getcwd (TCHAR* buff, UINT len); /* Get current directory */ +#endif +#endif +#if _USE_LABEL +FRESULT f_getlabel (const TCHAR* path, TCHAR* label, DWORD* vsn); /* Get volume label */ +#if !_FS_READONLY +FRESULT f_setlabel (const TCHAR* label); /* Set volume label */ +#endif +#endif +FRESULT f_mount (FATFS* fs, const TCHAR* path, BYTE opt); /* Mount/Unmount a logical drive */ +#if _USE_MKFS && !_FS_READONLY +FRESULT f_mkfs (const TCHAR* path, BYTE sfd, UINT au); /* Create a file system on the volume */ +#if _MULTI_PARTITION +FRESULT f_fdisk (BYTE pdrv, const DWORD szt[], void* work); /* Divide a physical drive into some partitions */ +#endif +#endif +#if _USE_STRFUNC +TCHAR* f_gets (TCHAR* buff, s32 len, FIL* fp); /* Get a string from the file */ +#if !_FS_READONLY +int f_putc (TCHAR c, FIL* fp); /* Put a character to the file */ +int f_puts (const TCHAR* str, FIL* cp); /* Put a string to the file */ +int f_printf (FIL* fp, const TCHAR* str, ...); /* Put a formatted string to the file */ +#endif +#endif +#define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0) +#define f_error(fp) ((fp)->err) +#define f_tell(fp) ((fp)->fptr) +#define file_size(fp) ((fp)->fsize) + +#ifndef EOF +#define EOF (-1) +#endif + + + + +/*--------------------------------------------------------------*/ +/* Additional user defined functions */ + +/* RTC function */ +#if !_FS_READONLY +DWORD get_fattime (void); +#endif + +/* Unicode support functions */ +#if _USE_LFN /* Unicode - OEM code conversion */ +WCHAR ff_convert (WCHAR chr, UINT dir); /* OEM-Unicode bidirectional conversion */ +WCHAR ff_wtoupper (WCHAR chr); /* Unicode upper-case conversion */ +#if _USE_LFN == 3 /* Memory functions */ +void* ff_memalloc (UINT msize); /* Allocate memory block */ +void ff_memfree (void* mblock); /* Free memory block */ +#endif +#endif + +/* Sync functions */ +#if _FS_REENTRANT +int ff_cre_syncobj (BYTE vol, _SYNC_t* sobj); /* Create a sync object */ +int ff_req_grant (_SYNC_t sobj); /* Lock sync object */ +void ff_rel_grant (_SYNC_t sobj); /* Unlock sync object */ +int ff_del_syncobj (_SYNC_t sobj); /* Delete a sync object */ +#endif + + + + +/*--------------------------------------------------------------*/ +/* Flags and offset address */ + + +/* File access control and file status flags (FIL.flag) */ + +#define FA_READ 0x01U +#define FA_OPEN_EXISTING 0x00U + +#if !_FS_READONLY +#define FA_WRITE 0x02U +#define FA_CREATE_NEW 0x04U +#define FA_CREATE_ALWAYS 0x08U +#define FA_OPEN_ALWAYS 0x10U +#define FA__WRITTEN 0x20U +#define FA__DIRTY 0x40U +#endif + + +/* FAT sub type (FATFS.fs_type) */ + +#define FS_FAT12 1U +#define FS_FAT16 2U +#define FS_FAT32 3U + + +/* File attribute bits for directory entry */ + +#define AM_RDO 0x01U /* Read only */ +#define AM_HID 0x02U /* Hidden */ +#define AM_SYS 0x04U /* System */ +#define AM_VOL 0x08U /* Volume label */ +#define AM_LFN 0x0FU /* LFN entry */ +#define AM_DIR 0x10U /* Directory */ +#define AM_ARC 0x20U /* Archive */ +#define AM_MASK 0x3FU /* Mask of defined bits */ + + +/* Fast seek feature */ +#define CREATE_LINKMAP 0xFFFFFFFFU + + + +/*--------------------------------*/ +/* Multi-byte word access macros */ + +#if _WORD_ACCESS == 1 /* Enable word access to the FAT structure */ +#define LD_WORD(ptr) (*(WORD*)(BYTE*)(ptr)) +#define LD_DWORD(ptr) (DWORD)(*(DWORD*)(BYTE*)(ptr)) +#define ST_WORD(ptr,val) (*(WORD*)(BYTE*)(ptr))=(WORD)(val) +#define ST_DWORD(ptr,val) (*(DWORD*)(BYTE*)(ptr))=(DWORD)(val) +#else /* Use byte-by-byte access to the FAT structure */ +#define LD_WORD(ptr) (((WORD)*((BYTE*)(ptr)+1U)<<8)|(WORD)*(BYTE*)(ptr)) +#define LD_DWORD(ptr) ((DWORD)(((DWORD)*((BYTE*)(ptr)+3U)<<24)|((DWORD)*((BYTE*)(ptr)+2U)<<16)|((WORD)*((BYTE*)(ptr)+1U)<<8)|*(BYTE*)(ptr))) +#define ST_WORD(ptr,val) (*((BYTE*)((void *)(ptr))))=((BYTE)(val)); (*((BYTE *)((ptr)+1U)))=((BYTE)((val)>>8)) +#define ST_DWORD(ptr,val) (*((BYTE*)((void *)(ptr))))=((BYTE)(val)); (*((BYTE*)(void *)((ptr)+1U)))=((BYTE)((DWORD)(val)>>8)); (*((BYTE*)(void *)((ptr)+2U)))=((BYTE)((DWORD)(val)>>16)); (*((BYTE*)(void *)((ptr)+3U)))=((BYTE)((DWORD)(val)>>24)) +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* FAT_FS */ diff --git a/src/Xilinx/include/ffconf.h b/src/Xilinx/include/ffconf.h new file mode 100644 index 0000000..e715d68 --- /dev/null +++ b/src/Xilinx/include/ffconf.h @@ -0,0 +1,282 @@ +/*---------------------------------------------------------------------------/ +/ FatFs - FAT file system module configuration file R0.10b (C)ChaN, 2014 +/---------------------------------------------------------------------------*/ + +#ifndef _FFCONF +#define _FFCONF 8051 /* Revision ID */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "xparameters.h" + +/*---------------------------------------------------------------------------/ +/ Functions and Buffer Configurations +/---------------------------------------------------------------------------*/ + +#define _FS_TINY 0 /* 0:Normal or 1:Tiny */ +/* When _FS_TINY is set to 1, it reduces memory consumption _MAX_SS bytes each +/ file object. For file data transfer, FatFs uses the common sector buffer in +/ the file system object (FATFS) instead of private sector buffer eliminated +/ from the file object (FIL). */ + +#ifdef FILE_SYSTEM_READ_ONLY +#define _FS_READONLY 1 /* 1:Read only */ +#else +#define _FS_READONLY 0 /* 0:Read/Write */ +#endif +/* Setting _FS_READONLY to 1 defines read only configuration. This removes +/ writing functions, f_write(), f_sync(), f_unlink(), f_mkdir(), f_chmod(), +/ f_rename(), f_truncate() and useless f_getfree(). */ + + +#define _FS_MINIMIZE 0 /* 0 to 3 */ +/* The _FS_MINIMIZE option defines minimization level to remove API functions. +/ +/ 0: All basic functions are enabled. +/ 1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_chmod(), f_utime(), +/ f_truncate() and f_rename() function are removed. +/ 2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1. +/ 3: f_lseek() function is removed in addition to 2. */ + +#if FILE_SYSTEM_USE_STRFUNC == 0 +#define _USE_STRFUNC 0 /* 0:Disable */ +#elif FILE_SYSTEM_USE_STRFUNC == 1 +#define _USE_STRFUNC 1 /* 1:Enable */ +#elif FILE_SYSTEM_USE_STRFUNC == 2 +#define _USE_STRFUNC 2 /* 2:Enable */ +#endif +/* To enable string functions, set _USE_STRFUNC to 1 or 2. */ + +#ifdef FILE_SYSTEM_USE_MKFS +#define _USE_MKFS 1 /* 1:Enable */ +#else +#define _USE_MKFS 0 /* 0:Disable */ +#endif +/* To enable f_mkfs() function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */ + + +#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */ +/* To enable fast seek feature, set _USE_FASTSEEK to 1. */ + + +#define _USE_LABEL 0 /* 0:Disable or 1:Enable */ +/* To enable volume label functions, set _USE_LAVEL to 1 */ + + +#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */ +/* To enable f_forward() function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */ + + +/*---------------------------------------------------------------------------/ +/ Locale and Namespace Configurations +/---------------------------------------------------------------------------*/ + +#define _CODE_PAGE 932 +/* The _CODE_PAGE specifies the OEM code page to be used on the target system. +/ Incorrect setting of the code page can cause a file open failure. +/ +/ 932 - Japanese Shift_JIS (DBCS, OEM, Windows) +/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows) +/ 949 - Korean (DBCS, OEM, Windows) +/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows) +/ 1250 - Central Europe (Windows) +/ 1251 - Cyrillic (Windows) +/ 1252 - Latin 1 (Windows) +/ 1253 - Greek (Windows) +/ 1254 - Turkish (Windows) +/ 1255 - Hebrew (Windows) +/ 1256 - Arabic (Windows) +/ 1257 - Baltic (Windows) +/ 1258 - Vietnam (OEM, Windows) +/ 437 - U.S. (OEM) +/ 720 - Arabic (OEM) +/ 737 - Greek (OEM) +/ 775 - Baltic (OEM) +/ 850 - Multilingual Latin 1 (OEM) +/ 858 - Multilingual Latin 1 + Euro (OEM) +/ 852 - Latin 2 (OEM) +/ 855 - Cyrillic (OEM) +/ 866 - Russian (OEM) +/ 857 - Turkish (OEM) +/ 862 - Hebrew (OEM) +/ 874 - Thai (OEM, Windows) +/ 1 - ASCII (Valid for only non-LFN configuration) */ + +#ifdef FILE_SYSTEM_USE_LFN +#define _USE_LFN 1 /* 0 to 3 */ +#else +#define _USE_LFN 0 /* 0 to 3 */ +#endif +#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */ +/* The _USE_LFN option switches the LFN feature. +/ +/ 0: Disable LFN feature. _MAX_LFN has no effect. +/ 1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe. +/ 2: Enable LFN with dynamic working buffer on the STACK. +/ 3: Enable LFN with dynamic working buffer on the HEAP. +/ +/ When enable LFN feature, Unicode handling functions ff_convert() and ff_wtoupper() +/ function must be added to the project. +/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. When use stack for the +/ working buffer, take care on stack overflow. When use heap memory for the working +/ buffer, memory management functions, ff_memalloc() and ff_memfree(), must be added +/ to the project. */ + + +#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */ +/* To switch the character encoding on the FatFs API (TCHAR) to Unicode, enable LFN +/ feature and set _LFN_UNICODE to 1. This option affects behavior of string I/O +/ functions. This option must be 0 when LFN feature is not enabled. */ + + +#define _STRF_ENCODE 3 /* 0:ANSI/OEM, 1:UTF-16LE, 2:UTF-16BE, 3:UTF-8 */ +/* When Unicode API is enabled by _LFN_UNICODE option, this option selects the character +/ encoding on the file to be read/written via string I/O functions, f_gets(), f_putc(), +/ f_puts and f_printf(). This option has no effect when _LFN_UNICODE == 0. Note that +/ FatFs supports only BMP. */ + + +#if FILE_SYSTEM_SET_FS_RPATH == 0 +#define _FS_RPATH 0U +#elif FILE_SYSTEM_SET_FS_RPATH == 1 +#define _FS_RPATH 1U +#elif FILE_SYSTEM_SET_FS_RPATH == 2 +#define _FS_RPATH 2U +#endif +/* The _FS_RPATH option configures relative path feature. +/ +/ 0: Disable relative path feature and remove related functions. +/ 1: Enable relative path. f_chdrive() and f_chdir() function are available. +/ 2: f_getcwd() function is available in addition to 1. +/ +/ Note that output of the f_readdir() fnction is affected by this option. */ + + +/*---------------------------------------------------------------------------/ +/ Drive/Volume Configurations +/---------------------------------------------------------------------------*/ + +#if FILE_SYSTEM_NUM_LOGIC_VOL == 1 +#define _VOLUMES 1U +#elif FILE_SYSTEM_NUM_LOGIC_VOL == 2 +#define _VOLUMES 2U +#elif FILE_SYSTEM_NUM_LOGIC_VOL == 3 +#define _VOLUMES 3U +#elif FILE_SYSTEM_NUM_LOGIC_VOL == 4 +#define _VOLUMES 4U +#elif FILE_SYSTEM_NUM_LOGIC_VOL == 5 +#define _VOLUMES 5U +#elif FILE_SYSTEM_NUM_LOGIC_VOL == 6 +#define _VOLUMES 6U +#elif FILE_SYSTEM_NUM_LOGIC_VOL == 7 +#define _VOLUMES 7U +#elif FILE_SYSTEM_NUM_LOGIC_VOL == 8 +#define _VOLUMES 8U +#elif FILE_SYSTEM_NUM_LOGIC_VOL == 9 +#define _VOLUMES 9U +#else +#define _VOLUMES 10U +#endif +/* Number of volumes (logical drives) to be used. */ + + +#define _STR_VOLUME_ID 0 /* 0:Use only 0-9 for drive ID, 1:Use strings for drive ID */ +#define _VOLUME_STRS "RAM","NAND","CF","SD1","SD2","USB1","USB2","USB3" +/* When _STR_VOLUME_ID is set to 1, also pre-defined strings can be used as drive +/ number in the path name. _VOLUME_STRS defines the drive ID strings for each logical +/ drives. Number of items must be equal to _VOLUMES. Valid characters for the drive ID +/ strings are: 0-9 and A-Z. */ + +#ifdef FILE_SYSTEM_MULTI_PARTITION +#define _MULTI_PARTITION 1 /* 1:Enable multiple partition */ +#else +#define _MULTI_PARTITION 0 /* 0:Single partition */ +#endif +/* By default(0), each logical drive number is bound to the same physical drive number +/ and only a FAT volume found on the physical drive is mounted. When it is set to 1, +/ each logical drive number is bound to arbitrary drive/partition listed in VolToPart[]. +*/ + + +#define _MIN_SS 512U +#define _MAX_SS 512U +/* These options configure the range of sector size to be supported. (512, 1024, 2048 or +/ 4096) Always set both 512 for most systems, all memory card and harddisk. But a larger +/ value may be required for on-board flash memory and some type of optical media. +/ When _MAX_SS is larger than _MIN_SS, FatFs is configured to variable sector size and +/ GET_SECTOR_SIZE command must be implemented to the disk_ioctl() function. */ + + +#define _USE_ERASE 0 /* 0:Disable or 1:Enable */ +/* To enable sector erase feature, set _USE_ERASE to 1. Also CTRL_ERASE_SECTOR command +/ should be added to the disk_ioctl() function. */ + + +#define _FS_NOFSINFO 0 /* 0 to 3 */ +/* If you need to know correct free space on the FAT32 volume, set bit 0 of this option +/ and f_getfree() function at first time after volume mount will force a full FAT scan. +/ Bit 1 controls the last allocated cluster number as bit 0. +/ +/ bit0=0: Use free cluster count in the FSINFO if available. +/ bit0=1: Do not trust free cluster count in the FSINFO. +/ bit1=0: Use last allocated cluster number in the FSINFO if available. +/ bit1=1: Do not trust last allocated cluster number in the FSINFO. +*/ + + + +/*---------------------------------------------------------------------------/ +/ System Configurations +/---------------------------------------------------------------------------*/ + +#define _FS_LOCK 0 /* 0:Disable or >=1:Enable */ +/* To enable file lock control feature, set _FS_LOCK to non-zero value. +/ The value defines how many files/sub-directories can be opened simultaneously +/ with file lock control. This feature uses bss _FS_LOCK * 12 bytes. */ + + +#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */ +#define _FS_TIMEOUT 1000 /* Timeout period in unit of time tick */ +#define _SYNC_t HANDLE /* O/S dependent sync object type. e.g. HANDLE, OS_EVENT*, ID, SemaphoreHandle_t and etc.. */ +/* The _FS_REENTRANT option switches the re-entrancy (thread safe) of the FatFs module. +/ +/ 0: Disable re-entrancy. _FS_TIMEOUT and _SYNC_t have no effect. +/ 1: Enable re-entrancy. Also user provided synchronization handlers, +/ ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj() +/ function must be added to the project. +*/ + +#ifdef FILE_SYSTEM_WORD_ACCESS +#define _WORD_ACCESS 1 +#else +#define _WORD_ACCESS 0 +#endif +/* The _WORD_ACCESS option is an only platform dependent option. It defines +/ which access method is used to the word data on the FAT volume. +/ +/ 0: Byte-by-byte access. Always compatible with all platforms. +/ 1: Word access. Do not choose this unless under both the following conditions. +/ +/ * Address misaligned memory access is always allowed for ALL instructions. +/ * Byte order on the memory is little-endian. +/ +/ If it is the case, _WORD_ACCESS can also be set to 1 to improve performance and +/ reduce code size. Following table shows an example of some processor types. +/ +/ ARM7TDMI 0 ColdFire 0 V850E 0 +/ Cortex-M3 0 Z80 0/1 V850ES 0/1 +/ Cortex-M0 0 RX600(LE) 0/1 TLCS-870 0/1 +/ AVR 0/1 RX600(BE) 0 TLCS-900 0/1 +/ AVR32 0 RL78 0 R32C 0 +/ PIC18 0/1 SH-2 0 M16C 0/1 +/ PIC24 0 H8S 0 MSP430 0 +/ PIC32 0 H8/300H 0 x86 0/1 +*/ + +#ifdef __cplusplus +} +#endif + +#endif /* _FFCONF */ diff --git a/src/Xilinx/include/integer.h b/src/Xilinx/include/integer.h new file mode 100644 index 0000000..8933f14 --- /dev/null +++ b/src/Xilinx/include/integer.h @@ -0,0 +1,33 @@ +/*-------------------------------------------*/ +/* Integer type definitions for FatFs module */ +/*-------------------------------------------*/ + +#ifndef _FF_INTEGER +#define _FF_INTEGER + +#ifdef _WIN32 /* FatFs development platform */ + +#include +#include + +#else /* Embedded platform */ + +/* This type MUST be 8 bit */ +typedef unsigned char BYTE; + +/* These types MUST be 16 bit */ +typedef short SHORT; +typedef unsigned short WORD; +typedef unsigned short WCHAR; + +/* These types MUST be 16 bit or 32 bit */ +typedef int INT; +typedef unsigned int UINT; + +/* These types MUST be 32 bit */ +typedef long LONG; +typedef unsigned int DWORD; + +#endif + +#endif diff --git a/src/Xilinx/include/pm_api_sys.h b/src/Xilinx/include/pm_api_sys.h new file mode 100644 index 0000000..e5919ca --- /dev/null +++ b/src/Xilinx/include/pm_api_sys.h @@ -0,0 +1,221 @@ +/****************************************************************************** +* +* Copyright (C) 2015-2016 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +/*****************************************************************************/ +/** + * @file pm_api_sys.h + * PM API System implementation + * @addtogroup xpm_apis XilPM APIs + * + * Xilinx Power Management(XilPM) provides Embedded Energy Management + * Interface (EEMI) APIs for power management on Zynq® UltraScale+™ + * MPSoC. For more details about power management on Zynq Ultrascale+ MPSoC, + * see the Zynq UltraScale+ MPSoC Power Management User Guide (UG1199). + * For more details about EEMI, see the Embedded Energy Management Interface + * (EEMI) API User Guide(UG1200). + * @{ + *****************************************************************************/ + +#ifndef _PM_API_SYS_H_ +#define _PM_API_SYS_H_ + +#include +#include +#include +#include "pm_defs.h" +#include "pm_common.h" + +XStatus XPm_InitXilpm(XIpiPsu *IpiInst); + +void XPm_SuspendFinalize(); + +enum XPmBootStatus XPm_GetBootStatus(); + +/* System-level API function declarations */ +XStatus XPm_RequestSuspend(const enum XPmNodeId node, + const enum XPmRequestAck ack, + const u32 latency, + const u8 state); + +XStatus XPm_SelfSuspend(const enum XPmNodeId node, + const u32 latency, + const u8 state, + const u64 address); + +XStatus XPm_ForcePowerDown(const enum XPmNodeId node, + const enum XPmRequestAck ack); + +XStatus XPm_AbortSuspend(const enum XPmAbortReason reason); + +XStatus XPm_RequestWakeUp(const enum XPmNodeId node, + const bool setAddress, + const u64 address, + const enum XPmRequestAck ack); + +XStatus XPm_SetWakeUpSource(const enum XPmNodeId target, + const enum XPmNodeId wkup_node, + const u8 enable); + +XStatus XPm_SystemShutdown(u32 type, u32 subtype); + +XStatus XPm_SetConfiguration(const u32 address); + +XStatus XPm_InitFinalize(); + +/* Callback API function */ +/* + * pm_init_suspend - Init suspend callback arguments (save for custom handling) + */ +struct pm_init_suspend { + volatile bool received; /**< Has init suspend callback been received/handled */ + enum XPmSuspendReason reason; /**< Reason of initializing suspend */ + u32 latency; /**< Maximum allowed latency */ + u32 state; /**< Targeted sleep/suspend state */ + u32 timeout; /**< Period of time the client has to response */ +}; + +/* + * pm_acknowledge - Acknowledge callback arguments (save for custom handling) + */ +struct pm_acknowledge { + volatile bool received; /**< Has acknowledge argument been received? */ + enum XPmNodeId node; /**< Node argument about which the acknowledge is */ + XStatus status; /**< Acknowledged status */ + u32 opp; /**< Operating point of node in question */ +}; + +/* Forward declaration to enable self reference in struct definition */ +typedef struct XPm_Notifier XPm_Notifier; + +/** + * XPm_Notifier - Notifier structure registered with a callback by app + */ +typedef struct XPm_Notifier { + /** + * Custom callback handler to be called when the notification is + * received. The custom handler would execute from interrupt + * context, it shall return quickly and must not block! (enables + * event-driven notifications) + */ + void (*const callback)(XPm_Notifier* const notifier); + enum XPmNodeId node; /**< Node argument (the node to receive notifications about) */ + enum XPmNotifyEvent event; /**< Event argument (the event type to receive notifications about) */ + u32 flags; /**< Flags */ + /** + * Operating point of node in question. Contains the value updated + * when the last event notification is received. User shall not + * modify this value while the notifier is registered. + */ + volatile u32 oppoint; + /** + * How many times the notification has been received - to be used + * by application (enables polling). User shall not modify this + * value while the notifier is registered. + */ + volatile u32 received; + /** + * Pointer to next notifier in linked list. Must not be modified + * while the notifier is registered. User shall not ever modify + * this value. + */ + XPm_Notifier* next; +} XPm_Notifier; + +/* Notifier Flags */ +#define XILPM_NOTIFIER_FLAG_WAKE BIT(0) /* wake up PU for notification */ + +/** + * XPm_NodeStatus - struct containing node status information + */ +typedef struct XPm_NodeStatus { + u32 status; /**< Node power state */ + u32 requirements; /**< Current requirements asserted on the node (slaves only) */ + u32 usage; /**< Usage information (which master is currently using the slave) */ +} XPm_NodeStatus; + +/********************************************************************/ +/** + * Global data declarations + ********************************************************************/ +extern struct pm_init_suspend pm_susp; +extern struct pm_acknowledge pm_ack; + +void XPm_InitSuspendCb(const enum XPmSuspendReason reason, + const u32 latency, + const u32 state, + const u32 timeout); + +void XPm_AcknowledgeCb(const enum XPmNodeId node, + const XStatus status, + const u32 oppoint); + +void XPm_NotifyCb(const enum XPmNodeId node, + const u32 event, + const u32 oppoint); + +/* API functions for managing PM Slaves */ +XStatus XPm_RequestNode(const enum XPmNodeId node, + const u32 capabilities, + const u32 qos, + const enum XPmRequestAck ack); +XStatus XPm_ReleaseNode(const enum XPmNodeId node); +XStatus XPm_SetRequirement(const enum XPmNodeId node, + const u32 capabilities, + const u32 qos, + const enum XPmRequestAck ack); +XStatus XPm_SetMaxLatency(const enum XPmNodeId node, + const u32 latency); + +/* Miscellaneous API functions */ +XStatus XPm_GetApiVersion(u32 *version); + +XStatus XPm_GetNodeStatus(const enum XPmNodeId node, + XPm_NodeStatus *const nodestatus); + +XStatus XPm_RegisterNotifier(XPm_Notifier* const notifier); +XStatus XPm_UnregisterNotifier(XPm_Notifier* const notifier); + +XStatus XPm_GetOpCharacteristic(const enum XPmNodeId node, + const enum XPmOpCharType type, + u32* const result); + +/* Direct-Control API functions */ +XStatus XPm_ResetAssert(const enum XPmReset reset, + const enum XPmResetAction assert); + +XStatus XPm_ResetGetStatus(const enum XPmReset reset, u32 *status); + +XStatus XPm_MmioWrite(const u32 address, const u32 mask, const u32 value); + +XStatus XPm_MmioRead(const u32 address, u32 *const value); +/** @} */ +#endif /* _PM_API_SYS_H_ */ diff --git a/src/Xilinx/include/pm_callbacks.h b/src/Xilinx/include/pm_callbacks.h new file mode 100644 index 0000000..6047b64 --- /dev/null +++ b/src/Xilinx/include/pm_callbacks.h @@ -0,0 +1,56 @@ +/****************************************************************************** +* +* Copyright (C) 2015-2016 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +/*****************************************************************************/ +/** + * @file pm_callbacks.h + * + * Callbacks implementation - for xilpm internal purposes only + *****************************************************************************/ + +#ifndef XILPM_CALLBACKS_H_ +#define XILPM_CALLBACKS_H_ + +#include +#include +#include "pm_defs.h" +#include "pm_api_sys.h" + +XStatus XPm_NotifierAdd(XPm_Notifier* const notifier); + +XStatus XPm_NotifierRemove(XPm_Notifier* const notifier); + +void XPm_NotifierProcessEvent(const enum XPmNodeId node, + const enum XPmNotifyEvent event, + const u32 oppoint); + +#endif diff --git a/src/Xilinx/include/pm_cfg_obj.h b/src/Xilinx/include/pm_cfg_obj.h new file mode 100644 index 0000000..ac3bcbe --- /dev/null +++ b/src/Xilinx/include/pm_cfg_obj.h @@ -0,0 +1,40 @@ +/****************************************************************************** +* +* Copyright (C) 2017 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +#ifndef _PM_CFG_OBJ_H_ +#define _PM_CFG_OBJ_H_ + +#include "xil_types.h" + +extern const u32 XPm_ConfigObject[]; + +#endif /* _PM_CFG_OBJ_H_ */ diff --git a/src/Xilinx/include/pm_client.h b/src/Xilinx/include/pm_client.h new file mode 100644 index 0000000..a778449 --- /dev/null +++ b/src/Xilinx/include/pm_client.h @@ -0,0 +1,58 @@ +/****************************************************************************** +* +* Copyright (C) 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +/* + * CONTENT + * File is specific for each PU instance and must exist in order to + * port Power Management code for some new PU. + * Contains PU specific macros and macros to be defined depending on + * the execution environment. + */ + +#ifndef _PM_CLIENT_H_ +#define _PM_CLIENT_H_ + +#include +#include +#include "pm_rpu.h" +#include "pm_defs.h" +#include "pm_common.h" + +#define IPI_TRIG_OFFSET 0x0 +#define IPI_OBS_OFFSET 0x4 + +char* XPm_GetMasterName(void); + +#define pm_print(MSG, ...) xil_printf("%s: "MSG, \ + XPm_GetMasterName(), ##__VA_ARGS__) + +#endif /* _PM_CLIENT_H_ */ diff --git a/src/Xilinx/include/pm_common.h b/src/Xilinx/include/pm_common.h new file mode 100644 index 0000000..c8cfe9b --- /dev/null +++ b/src/Xilinx/include/pm_common.h @@ -0,0 +1,112 @@ +/****************************************************************************** +* +* Copyright (C) 2015-2016 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +/*****************************************************************************/ +/** + * @file pm_common.h + * + * Definitions of commonly used macros and data types needed for + * PU Power Management. This file should be common for all PU's. + *****************************************************************************/ + +#ifndef _PM_COMMON_H_ +#define _PM_COMMON_H_ + +#include +#include "pm_defs.h" +#include "xparameters.h" + +#define DEBUG_MODE + +#define PM_ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) + +#define PAYLOAD_ARG_CNT 6U /* 1 for API ID + 5 for API arguments */ +#define RESPONSE_ARG_CNT 4U /* 1 for status + 3 for values */ + +#define PM_IPI_TIMEOUT (~0) + +#define IPI_PMU_PM_INT_MASK XPAR_XIPIPS_TARGET_PSU_PMU_0_CH0_MASK + +/** + * XPm_Master - Master structure + */ +struct XPm_Master { + const enum XPmNodeId node_id; /**< Node ID */ + const u32 pwrctl; /** < Power Control Register Address */ + const u32 pwrdn_mask; /**< Power Down Mask */ + XIpiPsu *ipi; /**< IPI Instance */ +}; + +enum XPmNodeId pm_get_subsystem_node(void); +struct XPm_Master *pm_get_master(const u32 cpuid); +struct XPm_Master *pm_get_master_by_node(const enum XPmNodeId nid); + +#define APU_0_PWRCTL_CPUPWRDWNREQ_MASK 0x00000001U +#define APU_1_PWRCTL_CPUPWRDWNREQ_MASK 0x00000002U +#define APU_2_PWRCTL_CPUPWRDWNREQ_MASK 0x00000004U +#define APU_3_PWRCTL_CPUPWRDWNREQ_MASK 0x00000008U +#define IPI_RPU_MASK 0x00000100U + +#define UNDEFINED_CPUID (~0U) + +#define pm_read(addr) Xil_In32(addr) +#define pm_write(addr, value) Xil_Out32(addr, value) +#define pm_enable_int() Xil_ExceptionEnable() +#define pm_disable_int() Xil_ExceptionDisable() + +/* Conditional debugging prints */ +#ifdef DEBUG_MODE + #define pm_dbg(MSG, ...) \ + do { \ + pm_print(MSG,##__VA_ARGS__); \ + } while (0) +#else + #define pm_dbg(MSG, ...) {} +#endif + +#ifndef bool + #define bool u8 + #define true 1U + #define false 0U +#endif + +void XPm_ClientSuspend(const struct XPm_Master *const master); +void XPm_ClientAbortSuspend(void); +void XPm_ClientWakeup(const struct XPm_Master *const master); +void XPm_ClientSuspendFinalize(void); +void XPm_ClientSetPrimaryMaster(void); + +/* Do not modify below this line */ +extern const enum XPmNodeId subsystem_node; +extern struct XPm_Master *primary_master; + +#endif /* _PM_COMMON_H_ */ diff --git a/src/Xilinx/include/pm_defs.h b/src/Xilinx/include/pm_defs.h new file mode 100644 index 0000000..96418f8 --- /dev/null +++ b/src/Xilinx/include/pm_defs.h @@ -0,0 +1,481 @@ +/****************************************************************************** +* +* Copyright (C) 2015-2016 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +/*****************************************************************************/ +/** + * @file pm_defs.h + * + * PM Definitions implementation + * @addtogroup xpm_apis XilPM APIs + * @{ + *****************************************************************************/ + +#ifndef PM_DEFS_H_ +#define PM_DEFS_H_ + +/** @name PM Version Number macros + * + * @{ + */ +#define PM_VERSION_MAJOR 1 +#define PM_VERSION_MINOR 0 + +#define PM_VERSION ((PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR) +/*@}*/ + +/** @name Capabilities for RAM + * + * @{ + */ +#define PM_CAP_ACCESS 0x1U +#define PM_CAP_CONTEXT 0x2U +#define PM_CAP_WAKEUP 0x4U +/*@}*/ + +/** @name Node default states macros + * + * @{ + */ +#define NODE_STATE_OFF 0 +#define NODE_STATE_ON 1 +/*@}*/ + +/** @name Processor's states macros + * + * @{ + */ +#define PROC_STATE_FORCEDOFF 0 +#define PROC_STATE_ACTIVE 1 +#define PROC_STATE_SLEEP 2 +#define PROC_STATE_SUSPENDING 3 +/*@}*/ + +/** @name Maximum Latency/QOS macros + * + * @{ + */ +#define MAX_LATENCY (~0U) +#define MAX_QOS 100U +/*@}*/ + +/** @name System shutdown/Restart macros + * + * @{ + */ +#define PMF_SHUTDOWN_TYPE_SHUTDOWN 0U +#define PMF_SHUTDOWN_TYPE_RESET 1U + +#define PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM 0U +#define PMF_SHUTDOWN_SUBTYPE_PS_ONLY 1U +#define PMF_SHUTDOWN_SUBTYPE_SYSTEM 2U +/*@}*/ + +/** + * @name APIs for Miscellaneous functions, suspending of PUs, managing PM slaves and Direct control. + */ +enum XPmApiId { + /** Miscellaneous API functions: */ + PM_GET_API_VERSION = 1, /**< Do not change or move */ + PM_SET_CONFIGURATION, + PM_GET_NODE_STATUS, + PM_GET_OP_CHARACTERISTIC, + PM_REGISTER_NOTIFIER, + /** API for suspending of PUs: */ + PM_REQUEST_SUSPEND, + PM_SELF_SUSPEND, + PM_FORCE_POWERDOWN, + PM_ABORT_SUSPEND, + PM_REQUEST_WAKEUP, + PM_SET_WAKEUP_SOURCE, + PM_SYSTEM_SHUTDOWN, + /** API for managing PM slaves: */ + PM_REQUEST_NODE, + PM_RELEASE_NODE, + PM_SET_REQUIREMENT, + PM_SET_MAX_LATENCY, + /** Direct control API functions: */ + PM_RESET_ASSERT, + PM_RESET_GET_STATUS, + PM_MMIO_WRITE, + PM_MMIO_READ, + PM_INIT_FINALIZE, + PM_FPGA_LOAD, + PM_FPGA_GET_STATUS, + PM_GET_CHIPID, + /* Secure library generic API functions */ + PM_SECURE_RSA_AES, + PM_SECURE_SHA, + PM_SECURE_RSA, + PM_PINCTRL_REQUEST, + PM_PINCTRL_RELEASE, + PM_PINCTRL_GET_FUNCTION, + PM_PINCTRL_SET_FUNCTION, + PM_PINCTRL_CONFIG_PARAM_GET, + PM_PINCTRL_CONFIG_PARAM_SET, + /* PM IOCTL API */ + PM_IOCTL, + /* API to query information from firmware */ + PM_QUERY_DATA, + /* Clock control API functions */ + PM_CLOCK_ENABLE, + PM_CLOCK_DISABLE, + PM_CLOCK_GETSTATE, + PM_CLOCK_SETDIVIDER, + PM_CLOCK_GETDIVIDER, + PM_CLOCK_SETRATE, + PM_CLOCK_GETRATE, + PM_CLOCK_SETPARENT, + PM_CLOCK_GETPARENT, + /* Secure image */ + PM_SECURE_IMAGE, + PM_API_MAX +}; + +/** @name PM API Min and Max macros + * + * @{ + */ +#define PM_API_MIN PM_GET_API_VERSION +/*@}*/ + +/** + * @name PM API Callback Id Enum + */ +enum XPmApiCbId { + PM_INIT_SUSPEND_CB = 30, + PM_ACKNOWLEDGE_CB, + PM_NOTIFY_CB, +}; + +/** + * @name PM Node ID Enum + */ +enum XPmNodeId { + NODE_UNKNOWN, + NODE_APU, + NODE_APU_0, + NODE_APU_1, + NODE_APU_2, + NODE_APU_3, + NODE_RPU, + NODE_RPU_0, + NODE_RPU_1, + NODE_PLD, + NODE_FPD, + NODE_OCM_BANK_0, + NODE_OCM_BANK_1, + NODE_OCM_BANK_2, + NODE_OCM_BANK_3, + NODE_TCM_0_A, + NODE_TCM_0_B, + NODE_TCM_1_A, + NODE_TCM_1_B, + NODE_L2, + NODE_GPU_PP_0, + NODE_GPU_PP_1, + NODE_USB_0, + NODE_USB_1, + NODE_TTC_0, + NODE_TTC_1, + NODE_TTC_2, + NODE_TTC_3, + NODE_SATA, + NODE_ETH_0, + NODE_ETH_1, + NODE_ETH_2, + NODE_ETH_3, + NODE_UART_0, + NODE_UART_1, + NODE_SPI_0, + NODE_SPI_1, + NODE_I2C_0, + NODE_I2C_1, + NODE_SD_0, + NODE_SD_1, + NODE_DP, + NODE_GDMA, + NODE_ADMA, + NODE_NAND, + NODE_QSPI, + NODE_GPIO, + NODE_CAN_0, + NODE_CAN_1, + NODE_EXTERN, + NODE_APLL, + NODE_VPLL, + NODE_DPLL, + NODE_RPLL, + NODE_IOPLL, + NODE_DDR, + NODE_IPI_APU, + NODE_IPI_RPU_0, + NODE_GPU, + NODE_PCIE, + NODE_PCAP, + NODE_RTC, + NODE_LPD, + NODE_VCU, + NODE_IPI_RPU_1, + NODE_IPI_PL_0, + NODE_IPI_PL_1, + NODE_IPI_PL_2, + NODE_IPI_PL_3, + NODE_PL, + NODE_ID_MAX +}; + +/** + * @name PM Acknowledge Request Types + */ +enum XPmRequestAck { + REQUEST_ACK_NO = 1, + REQUEST_ACK_BLOCKING, + REQUEST_ACK_NON_BLOCKING, + REQUEST_ACK_CB_CERROR, +}; + +/** + * @name PM Abort Reasons Enum + */ +enum XPmAbortReason { + ABORT_REASON_WKUP_EVENT = 100, + ABORT_REASON_PU_BUSY, + ABORT_REASON_NO_PWRDN, + ABORT_REASON_UNKNOWN, +}; + +/** + * @name PM Suspend Reasons Enum + */ +enum XPmSuspendReason { + SUSPEND_REASON_PU_REQ = 201, + SUSPEND_REASON_ALERT, + SUSPEND_REASON_SYS_SHUTDOWN, +}; + +/** + * @name PM RAM States Enum + */ +enum XPmRamState { + PM_RAM_STATE_OFF = 0, + PM_RAM_STATE_RETENTION, + PM_RAM_STATE_ON, +}; + +/** + * @name PM Operating Characteristic types Enum + */ +enum XPmOpCharType { + PM_OPCHAR_TYPE_POWER = 1, + PM_OPCHAR_TYPE_TEMP, + PM_OPCHAR_TYPE_LATENCY, +}; + + /* Power management specific return error statuses */ +/** @defgroup pmstatmacro + * @{ + */ +/** An internal error occurred while performing the requested operation */ +#define XST_PM_INTERNAL 2000L +/** Conflicting requirements have been asserted when more than one processing + * cluster is using the same PM slave */ +#define XST_PM_CONFLICT 2001L +/** The processing cluster does not have access to the requested node or + * operation */ +#define XST_PM_NO_ACCESS 2002L +/** The API function does not apply to the node passed as argument */ +#define XST_PM_INVALID_NODE 2003L +/** A processing cluster has already been assigned access to a PM slave and + * has issued a duplicate request for that PM slave */ +#define XST_PM_DOUBLE_REQ 2004L +/** The target processing cluster has aborted suspend */ +#define XST_PM_ABORT_SUSPEND 2005L +/** A timeout occurred while performing the requested operation*/ +#define XST_PM_TIMEOUT 2006L +/** Slave request cannot be granted since node is non-shareable and used */ +#define XST_PM_NODE_USED 2007L +/**@}*/ + +/** + * @name Boot Status Enum + */ +enum XPmBootStatus { + PM_INITIAL_BOOT, /**< boot is a fresh system startup */ + PM_RESUME, /**< boot is a resume */ + PM_BOOT_ERROR, /**< error, boot cause cannot be identified */ +}; + +/** + * @name PM Reset Action types + */ +enum XPmResetAction { + XILPM_RESET_ACTION_RELEASE, + XILPM_RESET_ACTION_ASSERT, + XILPM_RESET_ACTION_PULSE, +}; + +/** + * @name PM Reset Line IDs + */ +enum XPmReset { + XILPM_RESET_PCIE_CFG = 1000, + XILPM_RESET_PCIE_BRIDGE, + XILPM_RESET_PCIE_CTRL, + XILPM_RESET_DP, + XILPM_RESET_SWDT_CRF, + XILPM_RESET_AFI_FM5, + XILPM_RESET_AFI_FM4, + XILPM_RESET_AFI_FM3, + XILPM_RESET_AFI_FM2, + XILPM_RESET_AFI_FM1, + XILPM_RESET_AFI_FM0, + XILPM_RESET_GDMA, + XILPM_RESET_GPU_PP1, + XILPM_RESET_GPU_PP0, + XILPM_RESET_GPU, + XILPM_RESET_GT, + XILPM_RESET_SATA, + XILPM_RESET_ACPU3_PWRON, + XILPM_RESET_ACPU2_PWRON, + XILPM_RESET_ACPU1_PWRON, + XILPM_RESET_ACPU0_PWRON, + XILPM_RESET_APU_L2, + XILPM_RESET_ACPU3, + XILPM_RESET_ACPU2, + XILPM_RESET_ACPU1, + XILPM_RESET_ACPU0, + XILPM_RESET_DDR, + XILPM_RESET_APM_FPD, + XILPM_RESET_SOFT, + XILPM_RESET_GEM0, + XILPM_RESET_GEM1, + XILPM_RESET_GEM2, + XILPM_RESET_GEM3, + XILPM_RESET_QSPI, + XILPM_RESET_UART0, + XILPM_RESET_UART1, + XILPM_RESET_SPI0, + XILPM_RESET_SPI1, + XILPM_RESET_SDIO0, + XILPM_RESET_SDIO1, + XILPM_RESET_CAN0, + XILPM_RESET_CAN1, + XILPM_RESET_I2C0, + XILPM_RESET_I2C1, + XILPM_RESET_TTC0, + XILPM_RESET_TTC1, + XILPM_RESET_TTC2, + XILPM_RESET_TTC3, + XILPM_RESET_SWDT_CRL, + XILPM_RESET_NAND, + XILPM_RESET_ADMA, + XILPM_RESET_GPIO, + XILPM_RESET_IOU_CC, + XILPM_RESET_TIMESTAMP, + XILPM_RESET_RPU_R50, + XILPM_RESET_RPU_R51, + XILPM_RESET_RPU_AMBA, + XILPM_RESET_OCM, + XILPM_RESET_RPU_PGE, + XILPM_RESET_USB0_CORERESET, + XILPM_RESET_USB1_CORERESET, + XILPM_RESET_USB0_HIBERRESET, + XILPM_RESET_USB1_HIBERRESET, + XILPM_RESET_USB0_APB, + XILPM_RESET_USB1_APB, + XILPM_RESET_IPI, + XILPM_RESET_APM_LPD, + XILPM_RESET_RTC, + XILPM_RESET_SYSMON, + XILPM_RESET_AFI_FM6, + XILPM_RESET_LPD_SWDT, + XILPM_RESET_FPD, + XILPM_RESET_RPU_DBG1, + XILPM_RESET_RPU_DBG0, + XILPM_RESET_DBG_LPD, + XILPM_RESET_DBG_FPD, + XILPM_RESET_APLL, + XILPM_RESET_DPLL, + XILPM_RESET_VPLL, + XILPM_RESET_IOPLL, + XILPM_RESET_RPLL, + XILPM_RESET_GPO3_PL_0, + XILPM_RESET_GPO3_PL_1, + XILPM_RESET_GPO3_PL_2, + XILPM_RESET_GPO3_PL_3, + XILPM_RESET_GPO3_PL_4, + XILPM_RESET_GPO3_PL_5, + XILPM_RESET_GPO3_PL_6, + XILPM_RESET_GPO3_PL_7, + XILPM_RESET_GPO3_PL_8, + XILPM_RESET_GPO3_PL_9, + XILPM_RESET_GPO3_PL_10, + XILPM_RESET_GPO3_PL_11, + XILPM_RESET_GPO3_PL_12, + XILPM_RESET_GPO3_PL_13, + XILPM_RESET_GPO3_PL_14, + XILPM_RESET_GPO3_PL_15, + XILPM_RESET_GPO3_PL_16, + XILPM_RESET_GPO3_PL_17, + XILPM_RESET_GPO3_PL_18, + XILPM_RESET_GPO3_PL_19, + XILPM_RESET_GPO3_PL_20, + XILPM_RESET_GPO3_PL_21, + XILPM_RESET_GPO3_PL_22, + XILPM_RESET_GPO3_PL_23, + XILPM_RESET_GPO3_PL_24, + XILPM_RESET_GPO3_PL_25, + XILPM_RESET_GPO3_PL_26, + XILPM_RESET_GPO3_PL_27, + XILPM_RESET_GPO3_PL_28, + XILPM_RESET_GPO3_PL_29, + XILPM_RESET_GPO3_PL_30, + XILPM_RESET_GPO3_PL_31, + XILPM_RESET_RPU_LS, + XILPM_RESET_PS_ONLY, + XILPM_RESET_PL, + XILPM_RESET_GPIO5_EMIO_92, + XILPM_RESET_GPIO5_EMIO_93, + XILPM_RESET_GPIO5_EMIO_94, + XILPM_RESET_GPIO5_EMIO_95, +}; + +/** + * @name PM Notify Events Enum + */ +enum XPmNotifyEvent { + EVENT_STATE_CHANGE = 1, + EVENT_ZERO_USERS = 2, + EVENT_ERROR_CONDITION = 4, +}; + /** @} */ +#endif /* PM_DEFS_H_ */ diff --git a/src/Xilinx/include/pm_rpu.h b/src/Xilinx/include/pm_rpu.h new file mode 100644 index 0000000..cf8eef1 --- /dev/null +++ b/src/Xilinx/include/pm_rpu.h @@ -0,0 +1,1527 @@ +/****************************************************************************** +* +* Copyright (C) 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +#ifndef _PM_RPU_H_ +#define _PM_RPU_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * RPU Base Address + */ +#define RPU_BASEADDR 0XFF9A0000 + +/** + * Register: RPU_RPU_GLBL_CNTL + */ +#define RPU_RPU_GLBL_CNTL ( ( RPU_BASEADDR ) + 0X00000000 ) + +#define RPU_RPU_GLBL_CNTL_GIC_AXPROT_SHIFT 10 +#define RPU_RPU_GLBL_CNTL_GIC_AXPROT_WIDTH 1 +#define RPU_RPU_GLBL_CNTL_GIC_AXPROT_MASK 0X00000400 + +#define RPU_RPU_GLBL_CNTL_TCM_CLK_CNTL_SHIFT 8 +#define RPU_RPU_GLBL_CNTL_TCM_CLK_CNTL_WIDTH 1 +#define RPU_RPU_GLBL_CNTL_TCM_CLK_CNTL_MASK 0X00000100 + +#define RPU_RPU_GLBL_CNTL_TCM_WAIT_SHIFT 7 +#define RPU_RPU_GLBL_CNTL_TCM_WAIT_WIDTH 1 +#define RPU_RPU_GLBL_CNTL_TCM_WAIT_MASK 0X00000080 + +#define RPU_RPU_GLBL_CNTL_TCM_COMB_SHIFT 6 +#define RPU_RPU_GLBL_CNTL_TCM_COMB_WIDTH 1 +#define RPU_RPU_GLBL_CNTL_TCM_COMB_MASK 0X00000040 + +#define RPU_RPU_GLBL_CNTL_TEINIT_SHIFT 5 +#define RPU_RPU_GLBL_CNTL_TEINIT_WIDTH 1 +#define RPU_RPU_GLBL_CNTL_TEINIT_MASK 0X00000020 + +#define RPU_RPU_GLBL_CNTL_SLCLAMP_SHIFT 4 +#define RPU_RPU_GLBL_CNTL_SLCLAMP_WIDTH 1 +#define RPU_RPU_GLBL_CNTL_SLCLAMP_MASK 0X00000010 + +#define RPU_RPU_GLBL_CNTL_SLSPLIT_SHIFT 3 +#define RPU_RPU_GLBL_CNTL_SLSPLIT_WIDTH 1 +#define RPU_RPU_GLBL_CNTL_SLSPLIT_MASK 0X00000008 + +#define RPU_RPU_GLBL_CNTL_DBGNOCLKSTOP_SHIFT 2 +#define RPU_RPU_GLBL_CNTL_DBGNOCLKSTOP_WIDTH 1 +#define RPU_RPU_GLBL_CNTL_DBGNOCLKSTOP_MASK 0X00000004 + +#define RPU_RPU_GLBL_CNTL_CFGIE_SHIFT 1 +#define RPU_RPU_GLBL_CNTL_CFGIE_WIDTH 1 +#define RPU_RPU_GLBL_CNTL_CFGIE_MASK 0X00000002 + +#define RPU_RPU_GLBL_CNTL_CFGEE_SHIFT 0 +#define RPU_RPU_GLBL_CNTL_CFGEE_WIDTH 1 +#define RPU_RPU_GLBL_CNTL_CFGEE_MASK 0X00000001 + +/** + * Register: RPU_RPU_GLBL_STATUS + */ +#define RPU_RPU_GLBL_STATUS ( ( RPU_BASEADDR ) + 0X00000004 ) + +#define RPU_RPU_GLBL_STATUS_DBGNOPWRDWN_SHIFT 0 +#define RPU_RPU_GLBL_STATUS_DBGNOPWRDWN_WIDTH 1 +#define RPU_RPU_GLBL_STATUS_DBGNOPWRDWN_MASK 0X00000001 + +/** + * Register: RPU_RPU_ERR_CNTL + */ +#define RPU_RPU_ERR_CNTL ( ( RPU_BASEADDR ) + 0X00000008 ) + +#define RPU_RPU_ERR_CNTL_APB_ERR_RES_SHIFT 0 +#define RPU_RPU_ERR_CNTL_APB_ERR_RES_WIDTH 1 +#define RPU_RPU_ERR_CNTL_APB_ERR_RES_MASK 0X00000001 + +/** + * Register: RPU_RPU_RAM + */ +#define RPU_RPU_RAM ( ( RPU_BASEADDR ) + 0X0000000C ) + +#define RPU_RPU_RAM_RAMCONTROL1_SHIFT 8 +#define RPU_RPU_RAM_RAMCONTROL1_WIDTH 8 +#define RPU_RPU_RAM_RAMCONTROL1_MASK 0X0000FF00 + +#define RPU_RPU_RAM_RAMCONTROL0_SHIFT 0 +#define RPU_RPU_RAM_RAMCONTROL0_WIDTH 8 +#define RPU_RPU_RAM_RAMCONTROL0_MASK 0X000000FF + +/** + * Register: RPU_RPU_CACHE_DATA + */ +#define RPU_RPU_CACHE_DATA ( ( RPU_BASEADDR ) + 0X00000010 ) + +#define RPU_RPU_CACHE_DATA_DDIRTY_EMAS_SHIFT 29 +#define RPU_RPU_CACHE_DATA_DDIRTY_EMAS_WIDTH 1 +#define RPU_RPU_CACHE_DATA_DDIRTY_EMAS_MASK 0X20000000 + +#define RPU_RPU_CACHE_DATA_DDIRTY_EMAW_SHIFT 27 +#define RPU_RPU_CACHE_DATA_DDIRTY_EMAW_WIDTH 2 +#define RPU_RPU_CACHE_DATA_DDIRTY_EMAW_MASK 0X18000000 + +#define RPU_RPU_CACHE_DATA_DDIRTY_EMA_SHIFT 24 +#define RPU_RPU_CACHE_DATA_DDIRTY_EMA_WIDTH 3 +#define RPU_RPU_CACHE_DATA_DDIRTY_EMA_MASK 0X07000000 + +#define RPU_RPU_CACHE_DATA_DTAG_EMAS_SHIFT 23 +#define RPU_RPU_CACHE_DATA_DTAG_EMAS_WIDTH 1 +#define RPU_RPU_CACHE_DATA_DTAG_EMAS_MASK 0X00800000 + +#define RPU_RPU_CACHE_DATA_DTAG_EMAW_SHIFT 21 +#define RPU_RPU_CACHE_DATA_DTAG_EMAW_WIDTH 2 +#define RPU_RPU_CACHE_DATA_DTAG_EMAW_MASK 0X00600000 + +#define RPU_RPU_CACHE_DATA_DTAG_EMA_SHIFT 18 +#define RPU_RPU_CACHE_DATA_DTAG_EMA_WIDTH 3 +#define RPU_RPU_CACHE_DATA_DTAG_EMA_MASK 0X001C0000 + +#define RPU_RPU_CACHE_DATA_DDATA_EMAS_SHIFT 17 +#define RPU_RPU_CACHE_DATA_DDATA_EMAS_WIDTH 1 +#define RPU_RPU_CACHE_DATA_DDATA_EMAS_MASK 0X00020000 + +#define RPU_RPU_CACHE_DATA_DDATA_EMAW_SHIFT 15 +#define RPU_RPU_CACHE_DATA_DDATA_EMAW_WIDTH 2 +#define RPU_RPU_CACHE_DATA_DDATA_EMAW_MASK 0X00018000 + +#define RPU_RPU_CACHE_DATA_DDATA_EMA_SHIFT 12 +#define RPU_RPU_CACHE_DATA_DDATA_EMA_WIDTH 3 +#define RPU_RPU_CACHE_DATA_DDATA_EMA_MASK 0X00007000 + +#define RPU_RPU_CACHE_DATA_ITAG_EMAS_SHIFT 11 +#define RPU_RPU_CACHE_DATA_ITAG_EMAS_WIDTH 1 +#define RPU_RPU_CACHE_DATA_ITAG_EMAS_MASK 0X00000800 + +#define RPU_RPU_CACHE_DATA_ITAG_EMAW_SHIFT 9 +#define RPU_RPU_CACHE_DATA_ITAG_EMAW_WIDTH 2 +#define RPU_RPU_CACHE_DATA_ITAG_EMAW_MASK 0X00000600 + +#define RPU_RPU_CACHE_DATA_ITAG_EMA_SHIFT 6 +#define RPU_RPU_CACHE_DATA_ITAG_EMA_WIDTH 3 +#define RPU_RPU_CACHE_DATA_ITAG_EMA_MASK 0X000001C0 + +#define RPU_RPU_CACHE_DATA_IDATA_EMAS_SHIFT 5 +#define RPU_RPU_CACHE_DATA_IDATA_EMAS_WIDTH 1 +#define RPU_RPU_CACHE_DATA_IDATA_EMAS_MASK 0X00000020 + +#define RPU_RPU_CACHE_DATA_IDATA_EMAW_SHIFT 3 +#define RPU_RPU_CACHE_DATA_IDATA_EMAW_WIDTH 2 +#define RPU_RPU_CACHE_DATA_IDATA_EMAW_MASK 0X00000018 + +#define RPU_RPU_CACHE_DATA_IDATA_EMA_SHIFT 0 +#define RPU_RPU_CACHE_DATA_IDATA_EMA_WIDTH 3 +#define RPU_RPU_CACHE_DATA_IDATA_EMA_MASK 0X00000007 + +/** + * Register: RPU_RPU_CACHE_SYN + */ +#define RPU_RPU_CACHE_SYN ( ( RPU_BASEADDR ) + 0X00000014 ) + +#define RPU_RPU_CACHE_SYN_DDIRTY_EMAS_SHIFT 29 +#define RPU_RPU_CACHE_SYN_DDIRTY_EMAS_WIDTH 1 +#define RPU_RPU_CACHE_SYN_DDIRTY_EMAS_MASK 0X20000000 + +#define RPU_RPU_CACHE_SYN_DDIRTY_EMAW_SHIFT 27 +#define RPU_RPU_CACHE_SYN_DDIRTY_EMAW_WIDTH 2 +#define RPU_RPU_CACHE_SYN_DDIRTY_EMAW_MASK 0X18000000 + +#define RPU_RPU_CACHE_SYN_DDIRTY_EMA_SHIFT 24 +#define RPU_RPU_CACHE_SYN_DDIRTY_EMA_WIDTH 3 +#define RPU_RPU_CACHE_SYN_DDIRTY_EMA_MASK 0X07000000 + +#define RPU_RPU_CACHE_SYN_DTAG_EMAS_SHIFT 23 +#define RPU_RPU_CACHE_SYN_DTAG_EMAS_WIDTH 1 +#define RPU_RPU_CACHE_SYN_DTAG_EMAS_MASK 0X00800000 + +#define RPU_RPU_CACHE_SYN_DTAG_EMAW_SHIFT 21 +#define RPU_RPU_CACHE_SYN_DTAG_EMAW_WIDTH 2 +#define RPU_RPU_CACHE_SYN_DTAG_EMAW_MASK 0X00600000 + +#define RPU_RPU_CACHE_SYN_DTAG_EMA_SHIFT 18 +#define RPU_RPU_CACHE_SYN_DTAG_EMA_WIDTH 3 +#define RPU_RPU_CACHE_SYN_DTAG_EMA_MASK 0X001C0000 + +#define RPU_RPU_CACHE_SYN_DDATA_EMAS_SHIFT 17 +#define RPU_RPU_CACHE_SYN_DDATA_EMAS_WIDTH 1 +#define RPU_RPU_CACHE_SYN_DDATA_EMAS_MASK 0X00020000 + +#define RPU_RPU_CACHE_SYN_DDATA_EMAW_SHIFT 15 +#define RPU_RPU_CACHE_SYN_DDATA_EMAW_WIDTH 2 +#define RPU_RPU_CACHE_SYN_DDATA_EMAW_MASK 0X00018000 + +#define RPU_RPU_CACHE_SYN_DDATA_EMA_SHIFT 12 +#define RPU_RPU_CACHE_SYN_DDATA_EMA_WIDTH 3 +#define RPU_RPU_CACHE_SYN_DDATA_EMA_MASK 0X00007000 + +#define RPU_RPU_CACHE_SYN_ITAG_EMAS_SHIFT 11 +#define RPU_RPU_CACHE_SYN_ITAG_EMAS_WIDTH 1 +#define RPU_RPU_CACHE_SYN_ITAG_EMAS_MASK 0X00000800 + +#define RPU_RPU_CACHE_SYN_ITAG_EMAW_SHIFT 9 +#define RPU_RPU_CACHE_SYN_ITAG_EMAW_WIDTH 2 +#define RPU_RPU_CACHE_SYN_ITAG_EMAW_MASK 0X00000600 + +#define RPU_RPU_CACHE_SYN_ITAG_EMA_SHIFT 6 +#define RPU_RPU_CACHE_SYN_ITAG_EMA_WIDTH 3 +#define RPU_RPU_CACHE_SYN_ITAG_EMA_MASK 0X000001C0 + +#define RPU_RPU_CACHE_SYN_IDATA_EMAS_SHIFT 5 +#define RPU_RPU_CACHE_SYN_IDATA_EMAS_WIDTH 1 +#define RPU_RPU_CACHE_SYN_IDATA_EMAS_MASK 0X00000020 + +#define RPU_RPU_CACHE_SYN_IDATA_EMAW_SHIFT 3 +#define RPU_RPU_CACHE_SYN_IDATA_EMAW_WIDTH 2 +#define RPU_RPU_CACHE_SYN_IDATA_EMAW_MASK 0X00000018 + +#define RPU_RPU_CACHE_SYN_IDATA_EMA_SHIFT 0 +#define RPU_RPU_CACHE_SYN_IDATA_EMA_WIDTH 3 +#define RPU_RPU_CACHE_SYN_IDATA_EMA_MASK 0X00000007 + +/** + * Register: RPU_RPU_TCM_DATA + */ +#define RPU_RPU_TCM_DATA ( ( RPU_BASEADDR ) + 0X00000018 ) + +#define RPU_RPU_TCM_DATA_B_EMAS_SHIFT 17 +#define RPU_RPU_TCM_DATA_B_EMAS_WIDTH 1 +#define RPU_RPU_TCM_DATA_B_EMAS_MASK 0X00020000 + +#define RPU_RPU_TCM_DATA_B_EMAW_SHIFT 15 +#define RPU_RPU_TCM_DATA_B_EMAW_WIDTH 2 +#define RPU_RPU_TCM_DATA_B_EMAW_MASK 0X00018000 + +#define RPU_RPU_TCM_DATA_B_EMA_SHIFT 12 +#define RPU_RPU_TCM_DATA_B_EMA_WIDTH 3 +#define RPU_RPU_TCM_DATA_B_EMA_MASK 0X00007000 + +#define RPU_RPU_TCM_DATA_A_EMAS_SHIFT 5 +#define RPU_RPU_TCM_DATA_A_EMAS_WIDTH 1 +#define RPU_RPU_TCM_DATA_A_EMAS_MASK 0X00000020 + +#define RPU_RPU_TCM_DATA_A_EMAW_SHIFT 3 +#define RPU_RPU_TCM_DATA_A_EMAW_WIDTH 2 +#define RPU_RPU_TCM_DATA_A_EMAW_MASK 0X00000018 + +#define RPU_RPU_TCM_DATA_A_EMA_SHIFT 0 +#define RPU_RPU_TCM_DATA_A_EMA_WIDTH 3 +#define RPU_RPU_TCM_DATA_A_EMA_MASK 0X00000007 + +/** + * Register: RPU_RPU_TCM_SYN + */ +#define RPU_RPU_TCM_SYN ( ( RPU_BASEADDR ) + 0X0000001C ) + +#define RPU_RPU_TCM_SYN_B_EMAS_SHIFT 23 +#define RPU_RPU_TCM_SYN_B_EMAS_WIDTH 1 +#define RPU_RPU_TCM_SYN_B_EMAS_MASK 0X00800000 + +#define RPU_RPU_TCM_SYN_B_EMAW_SHIFT 21 +#define RPU_RPU_TCM_SYN_B_EMAW_WIDTH 2 +#define RPU_RPU_TCM_SYN_B_EMAW_MASK 0X00600000 + +#define RPU_RPU_TCM_SYN_B_EMA_SHIFT 18 +#define RPU_RPU_TCM_SYN_B_EMA_WIDTH 3 +#define RPU_RPU_TCM_SYN_B_EMA_MASK 0X001C0000 + +#define RPU_RPU_TCM_SYN_A_EMAS_SHIFT 11 +#define RPU_RPU_TCM_SYN_A_EMAS_WIDTH 1 +#define RPU_RPU_TCM_SYN_A_EMAS_MASK 0X00000800 + +#define RPU_RPU_TCM_SYN_A_EMAW_SHIFT 9 +#define RPU_RPU_TCM_SYN_A_EMAW_WIDTH 2 +#define RPU_RPU_TCM_SYN_A_EMAW_MASK 0X00000600 + +#define RPU_RPU_TCM_SYN_A_EMA_SHIFT 6 +#define RPU_RPU_TCM_SYN_A_EMA_WIDTH 3 +#define RPU_RPU_TCM_SYN_A_EMA_MASK 0X000001C0 + +/** + * Register: RPU_RPU_ERR_INJ + */ +#define RPU_RPU_ERR_INJ ( ( RPU_BASEADDR ) + 0X00000020 ) + +#define RPU_RPU_ERR_INJ_DCCMINP2_SHIFT 8 +#define RPU_RPU_ERR_INJ_DCCMINP2_WIDTH 8 +#define RPU_RPU_ERR_INJ_DCCMINP2_MASK 0X0000FF00 + +#define RPU_RPU_ERR_INJ_DCCMINP_SHIFT 0 +#define RPU_RPU_ERR_INJ_DCCMINP_WIDTH 8 +#define RPU_RPU_ERR_INJ_DCCMINP_MASK 0X000000FF + +/** + * Register: RPU_RPU_CCF_MASK + */ +#define RPU_RPU_CCF_MASK ( ( RPU_BASEADDR ) + 0X00000024 ) + +#define RPU_RPU_CCF_MASK_TEST_MBIST_MODE_SHIFT 7 +#define RPU_RPU_CCF_MASK_TEST_MBIST_MODE_WIDTH 1 +#define RPU_RPU_CCF_MASK_TEST_MBIST_MODE_MASK 0X00000080 + +#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_LP_SHIFT 6 +#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_LP_WIDTH 1 +#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_LP_MASK 0X00000040 + +#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_SHIFT 5 +#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_WIDTH 1 +#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_MASK 0X00000020 + +#define RPU_RPU_CCF_MASK_ISO_SHIFT 4 +#define RPU_RPU_CCF_MASK_ISO_WIDTH 1 +#define RPU_RPU_CCF_MASK_ISO_MASK 0X00000010 + +#define RPU_RPU_CCF_MASK_PGE_SHIFT 3 +#define RPU_RPU_CCF_MASK_PGE_WIDTH 1 +#define RPU_RPU_CCF_MASK_PGE_MASK 0X00000008 + +#define RPU_RPU_CCF_MASK_R50_DBG_RST_SHIFT 2 +#define RPU_RPU_CCF_MASK_R50_DBG_RST_WIDTH 1 +#define RPU_RPU_CCF_MASK_R50_DBG_RST_MASK 0X00000004 + +#define RPU_RPU_CCF_MASK_R50_RST_SHIFT 1 +#define RPU_RPU_CCF_MASK_R50_RST_WIDTH 1 +#define RPU_RPU_CCF_MASK_R50_RST_MASK 0X00000002 + +#define RPU_RPU_CCF_MASK_PGE_RST_SHIFT 0 +#define RPU_RPU_CCF_MASK_PGE_RST_WIDTH 1 +#define RPU_RPU_CCF_MASK_PGE_RST_MASK 0X00000001 + +/** + * Register: RPU_RPU_INTR_0 + */ +#define RPU_RPU_INTR_0 ( ( RPU_BASEADDR ) + 0X00000028 ) + +#define RPU_RPU_INTR_0_SPI_SHIFT 0 +#define RPU_RPU_INTR_0_SPI_WIDTH 32 +#define RPU_RPU_INTR_0_SPI_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_INTR_1 + */ +#define RPU_RPU_INTR_1 ( ( RPU_BASEADDR ) + 0X0000002C ) + +#define RPU_RPU_INTR_1_SPI_SHIFT 0 +#define RPU_RPU_INTR_1_SPI_WIDTH 32 +#define RPU_RPU_INTR_1_SPI_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_INTR_2 + */ +#define RPU_RPU_INTR_2 ( ( RPU_BASEADDR ) + 0X00000030 ) + +#define RPU_RPU_INTR_2_SPI_SHIFT 0 +#define RPU_RPU_INTR_2_SPI_WIDTH 32 +#define RPU_RPU_INTR_2_SPI_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_INTR_3 + */ +#define RPU_RPU_INTR_3 ( ( RPU_BASEADDR ) + 0X00000034 ) + +#define RPU_RPU_INTR_3_SPI_SHIFT 0 +#define RPU_RPU_INTR_3_SPI_WIDTH 32 +#define RPU_RPU_INTR_3_SPI_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_INTR_4 + */ +#define RPU_RPU_INTR_4 ( ( RPU_BASEADDR ) + 0X00000038 ) + +#define RPU_RPU_INTR_4_SPI_SHIFT 0 +#define RPU_RPU_INTR_4_SPI_WIDTH 32 +#define RPU_RPU_INTR_4_SPI_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_INTR_MASK_0 + */ +#define RPU_RPU_INTR_MASK_0 ( ( RPU_BASEADDR ) + 0X00000040 ) + +#define RPU_RPU_INTR_MASK_0_SPI_SHIFT 0 +#define RPU_RPU_INTR_MASK_0_SPI_WIDTH 32 +#define RPU_RPU_INTR_MASK_0_SPI_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_INTR_MASK_1 + */ +#define RPU_RPU_INTR_MASK_1 ( ( RPU_BASEADDR ) + 0X00000044 ) + +#define RPU_RPU_INTR_MASK_1_SPI_SHIFT 0 +#define RPU_RPU_INTR_MASK_1_SPI_WIDTH 32 +#define RPU_RPU_INTR_MASK_1_SPI_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_INTR_MASK_2 + */ +#define RPU_RPU_INTR_MASK_2 ( ( RPU_BASEADDR ) + 0X00000048 ) + +#define RPU_RPU_INTR_MASK_2_SPI_SHIFT 0 +#define RPU_RPU_INTR_MASK_2_SPI_WIDTH 32 +#define RPU_RPU_INTR_MASK_2_SPI_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_INTR_MASK_3 + */ +#define RPU_RPU_INTR_MASK_3 ( ( RPU_BASEADDR ) + 0X0000004C ) + +#define RPU_RPU_INTR_MASK_3_SPI_SHIFT 0 +#define RPU_RPU_INTR_MASK_3_SPI_WIDTH 32 +#define RPU_RPU_INTR_MASK_3_SPI_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_INTR_MASK_4 + */ +#define RPU_RPU_INTR_MASK_4 ( ( RPU_BASEADDR ) + 0X00000050 ) + +#define RPU_RPU_INTR_MASK_4_SPI_SHIFT 0 +#define RPU_RPU_INTR_MASK_4_SPI_WIDTH 32 +#define RPU_RPU_INTR_MASK_4_SPI_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_CCF_VAL + */ +#define RPU_RPU_CCF_VAL ( ( RPU_BASEADDR ) + 0X00000054 ) + +#define RPU_RPU_CCF_VAL_TEST_MBIST_MODE_SHIFT 7 +#define RPU_RPU_CCF_VAL_TEST_MBIST_MODE_WIDTH 1 +#define RPU_RPU_CCF_VAL_TEST_MBIST_MODE_MASK 0X00000080 + +#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_LP_SHIFT 6 +#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_LP_WIDTH 1 +#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_LP_MASK 0X00000040 + +#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_SHIFT 5 +#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_WIDTH 1 +#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_MASK 0X00000020 + +#define RPU_RPU_CCF_VAL_ISO_SHIFT 4 +#define RPU_RPU_CCF_VAL_ISO_WIDTH 1 +#define RPU_RPU_CCF_VAL_ISO_MASK 0X00000010 + +#define RPU_RPU_CCF_VAL_PGE_SHIFT 3 +#define RPU_RPU_CCF_VAL_PGE_WIDTH 1 +#define RPU_RPU_CCF_VAL_PGE_MASK 0X00000008 + +#define RPU_RPU_CCF_VAL_R50_DBG_RST_SHIFT 2 +#define RPU_RPU_CCF_VAL_R50_DBG_RST_WIDTH 1 +#define RPU_RPU_CCF_VAL_R50_DBG_RST_MASK 0X00000004 + +#define RPU_RPU_CCF_VAL_R50_RST_SHIFT 1 +#define RPU_RPU_CCF_VAL_R50_RST_WIDTH 1 +#define RPU_RPU_CCF_VAL_R50_RST_MASK 0X00000002 + +#define RPU_RPU_CCF_VAL_PGE_RST_SHIFT 0 +#define RPU_RPU_CCF_VAL_PGE_RST_WIDTH 1 +#define RPU_RPU_CCF_VAL_PGE_RST_MASK 0X00000001 + +/** + * Register: RPU_RPU_SAFETY_CHK + */ +#define RPU_RPU_SAFETY_CHK ( ( RPU_BASEADDR ) + 0X000000F0 ) + +#define RPU_RPU_SAFETY_CHK_VAL_SHIFT 0 +#define RPU_RPU_SAFETY_CHK_VAL_WIDTH 32 +#define RPU_RPU_SAFETY_CHK_VAL_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU + */ +#define RPU_RPU ( ( RPU_BASEADDR ) + 0X000000F4 ) + +#define RPU_RPU_ECO_SHIFT 0 +#define RPU_RPU_ECO_WIDTH 32 +#define RPU_RPU_ECO_MASK 0XFFFFFFFF + +/** + * Register: RPU_RPU_0_CFG + */ +#define RPU_RPU_0_CFG ( ( RPU_BASEADDR ) + 0X00000100 ) + +#define RPU_RPU_0_CFG_CFGNMFI0_SHIFT 3 +#define RPU_RPU_0_CFG_CFGNMFI0_WIDTH 1 +#define RPU_RPU_0_CFG_CFGNMFI0_MASK 0X00000008 + +#define RPU_RPU_0_CFG_VINITHI_SHIFT 2 +#define RPU_RPU_0_CFG_VINITHI_WIDTH 1 +#define RPU_RPU_0_CFG_VINITHI_MASK 0X00000004 + +#define RPU_RPU_0_CFG_COHERENT_SHIFT 1 +#define RPU_RPU_0_CFG_COHERENT_WIDTH 1 +#define RPU_RPU_0_CFG_COHERENT_MASK 0X00000002 + +#define RPU_RPU_0_CFG_NCPUHALT_SHIFT 0 +#define RPU_RPU_0_CFG_NCPUHALT_WIDTH 1 +#define RPU_RPU_0_CFG_NCPUHALT_MASK 0X00000001 + +/** + * Register: RPU_RPU_0_STATUS + */ +#define RPU_RPU_0_STATUS ( ( RPU_BASEADDR ) + 0X00000104 ) + +#define RPU_RPU_0_STATUS_NVALRESET_SHIFT 5 +#define RPU_RPU_0_STATUS_NVALRESET_WIDTH 1 +#define RPU_RPU_0_STATUS_NVALRESET_MASK 0X00000020 + +#define RPU_RPU_0_STATUS_NVALIRQ_SHIFT 4 +#define RPU_RPU_0_STATUS_NVALIRQ_WIDTH 1 +#define RPU_RPU_0_STATUS_NVALIRQ_MASK 0X00000010 + +#define RPU_RPU_0_STATUS_NVALFIQ_SHIFT 3 +#define RPU_RPU_0_STATUS_NVALFIQ_WIDTH 1 +#define RPU_RPU_0_STATUS_NVALFIQ_MASK 0X00000008 + +#define RPU_RPU_0_STATUS_NWFIPIPESTOPPED_SHIFT 2 +#define RPU_RPU_0_STATUS_NWFIPIPESTOPPED_WIDTH 1 +#define RPU_RPU_0_STATUS_NWFIPIPESTOPPED_MASK 0X00000004 + +#define RPU_RPU_0_STATUS_NWFEPIPESTOPPED_SHIFT 1 +#define RPU_RPU_0_STATUS_NWFEPIPESTOPPED_WIDTH 1 +#define RPU_RPU_0_STATUS_NWFEPIPESTOPPED_MASK 0X00000002 + +#define RPU_RPU_0_STATUS_NCLKSTOPPED_SHIFT 0 +#define RPU_RPU_0_STATUS_NCLKSTOPPED_WIDTH 1 +#define RPU_RPU_0_STATUS_NCLKSTOPPED_MASK 0X00000001 + +/** + * Register: RPU_RPU_0_PWRDWN + */ +#define RPU_RPU_0_PWRDWN ( ( RPU_BASEADDR ) + 0X00000108 ) + +#define RPU_RPU_0_PWRDWN_EN_SHIFT 0 +#define RPU_RPU_0_PWRDWN_EN_WIDTH 1 +#define RPU_RPU_0_PWRDWN_EN_MASK 0X00000001 + +/** + * Register: RPU_RPU_0_ISR + */ +#define RPU_RPU_0_ISR ( ( RPU_BASEADDR ) + 0X00000114 ) + +#define RPU_RPU_0_ISR_FPUFC_SHIFT 24 +#define RPU_RPU_0_ISR_FPUFC_WIDTH 1 +#define RPU_RPU_0_ISR_FPUFC_MASK 0X01000000 + +#define RPU_RPU_0_ISR_FPOFC_SHIFT 23 +#define RPU_RPU_0_ISR_FPOFC_WIDTH 1 +#define RPU_RPU_0_ISR_FPOFC_MASK 0X00800000 + +#define RPU_RPU_0_ISR_FPIXC_SHIFT 22 +#define RPU_RPU_0_ISR_FPIXC_WIDTH 1 +#define RPU_RPU_0_ISR_FPIXC_MASK 0X00400000 + +#define RPU_RPU_0_ISR_FPIOC_SHIFT 21 +#define RPU_RPU_0_ISR_FPIOC_WIDTH 1 +#define RPU_RPU_0_ISR_FPIOC_MASK 0X00200000 + +#define RPU_RPU_0_ISR_FPIDC_SHIFT 20 +#define RPU_RPU_0_ISR_FPIDC_WIDTH 1 +#define RPU_RPU_0_ISR_FPIDC_MASK 0X00100000 + +#define RPU_RPU_0_ISR_FPDZC_SHIFT 19 +#define RPU_RPU_0_ISR_FPDZC_WIDTH 1 +#define RPU_RPU_0_ISR_FPDZC_MASK 0X00080000 + +#define RPU_RPU_0_ISR_TCM_ASLV_CE_SHIFT 18 +#define RPU_RPU_0_ISR_TCM_ASLV_CE_WIDTH 1 +#define RPU_RPU_0_ISR_TCM_ASLV_CE_MASK 0X00040000 + +#define RPU_RPU_0_ISR_TCM_ASLV_FAT_SHIFT 17 +#define RPU_RPU_0_ISR_TCM_ASLV_FAT_WIDTH 1 +#define RPU_RPU_0_ISR_TCM_ASLV_FAT_MASK 0X00020000 + +#define RPU_RPU_0_ISR_TCM_LST_CE_SHIFT 16 +#define RPU_RPU_0_ISR_TCM_LST_CE_WIDTH 1 +#define RPU_RPU_0_ISR_TCM_LST_CE_MASK 0X00010000 + +#define RPU_RPU_0_ISR_TCM_PREFETCH_CE_SHIFT 15 +#define RPU_RPU_0_ISR_TCM_PREFETCH_CE_WIDTH 1 +#define RPU_RPU_0_ISR_TCM_PREFETCH_CE_MASK 0X00008000 + +#define RPU_RPU_0_ISR_B1TCM_CE_SHIFT 14 +#define RPU_RPU_0_ISR_B1TCM_CE_WIDTH 1 +#define RPU_RPU_0_ISR_B1TCM_CE_MASK 0X00004000 + +#define RPU_RPU_0_ISR_B0TCM_CE_SHIFT 13 +#define RPU_RPU_0_ISR_B0TCM_CE_WIDTH 1 +#define RPU_RPU_0_ISR_B0TCM_CE_MASK 0X00002000 + +#define RPU_RPU_0_ISR_ATCM_CE_SHIFT 12 +#define RPU_RPU_0_ISR_ATCM_CE_WIDTH 1 +#define RPU_RPU_0_ISR_ATCM_CE_MASK 0X00001000 + +#define RPU_RPU_0_ISR_B1TCM_UE_SHIFT 11 +#define RPU_RPU_0_ISR_B1TCM_UE_WIDTH 1 +#define RPU_RPU_0_ISR_B1TCM_UE_MASK 0X00000800 + +#define RPU_RPU_0_ISR_B0TCM_UE_SHIFT 10 +#define RPU_RPU_0_ISR_B0TCM_UE_WIDTH 1 +#define RPU_RPU_0_ISR_B0TCM_UE_MASK 0X00000400 + +#define RPU_RPU_0_ISR_ATCM_UE_SHIFT 9 +#define RPU_RPU_0_ISR_ATCM_UE_WIDTH 1 +#define RPU_RPU_0_ISR_ATCM_UE_MASK 0X00000200 + +#define RPU_RPU_0_ISR_DTAG_DIRTY_FAT_SHIFT 8 +#define RPU_RPU_0_ISR_DTAG_DIRTY_FAT_WIDTH 1 +#define RPU_RPU_0_ISR_DTAG_DIRTY_FAT_MASK 0X00000100 + +#define RPU_RPU_0_ISR_DDATA_FAT_SHIFT 7 +#define RPU_RPU_0_ISR_DDATA_FAT_WIDTH 1 +#define RPU_RPU_0_ISR_DDATA_FAT_MASK 0X00000080 + +#define RPU_RPU_0_ISR_TCM_LST_FAT_SHIFT 6 +#define RPU_RPU_0_ISR_TCM_LST_FAT_WIDTH 1 +#define RPU_RPU_0_ISR_TCM_LST_FAT_MASK 0X00000040 + +#define RPU_RPU_0_ISR_TCM_PREFETCH_FAT_SHIFT 5 +#define RPU_RPU_0_ISR_TCM_PREFETCH_FAT_WIDTH 1 +#define RPU_RPU_0_ISR_TCM_PREFETCH_FAT_MASK 0X00000020 + +#define RPU_RPU_0_ISR_DDATA_CE_SHIFT 4 +#define RPU_RPU_0_ISR_DDATA_CE_WIDTH 1 +#define RPU_RPU_0_ISR_DDATA_CE_MASK 0X00000010 + +#define RPU_RPU_0_ISR_DTAG_DIRTY_CE_SHIFT 3 +#define RPU_RPU_0_ISR_DTAG_DIRTY_CE_WIDTH 1 +#define RPU_RPU_0_ISR_DTAG_DIRTY_CE_MASK 0X00000008 + +#define RPU_RPU_0_ISR_IDATA_CE_SHIFT 2 +#define RPU_RPU_0_ISR_IDATA_CE_WIDTH 1 +#define RPU_RPU_0_ISR_IDATA_CE_MASK 0X00000004 + +#define RPU_RPU_0_ISR_ITAG_CE_SHIFT 1 +#define RPU_RPU_0_ISR_ITAG_CE_WIDTH 1 +#define RPU_RPU_0_ISR_ITAG_CE_MASK 0X00000002 + +#define RPU_RPU_0_ISR_APB_ERR_SHIFT 0 +#define RPU_RPU_0_ISR_APB_ERR_WIDTH 1 +#define RPU_RPU_0_ISR_APB_ERR_MASK 0X00000001 + +/** + * Register: RPU_RPU_0_IMR + */ +#define RPU_RPU_0_IMR ( ( RPU_BASEADDR ) + 0X00000118 ) + +#define RPU_RPU_0_IMR_FPUFC_SHIFT 24 +#define RPU_RPU_0_IMR_FPUFC_WIDTH 1 +#define RPU_RPU_0_IMR_FPUFC_MASK 0X01000000 + +#define RPU_RPU_0_IMR_FPOFC_SHIFT 23 +#define RPU_RPU_0_IMR_FPOFC_WIDTH 1 +#define RPU_RPU_0_IMR_FPOFC_MASK 0X00800000 + +#define RPU_RPU_0_IMR_FPIXC_SHIFT 22 +#define RPU_RPU_0_IMR_FPIXC_WIDTH 1 +#define RPU_RPU_0_IMR_FPIXC_MASK 0X00400000 + +#define RPU_RPU_0_IMR_FPIOC_SHIFT 21 +#define RPU_RPU_0_IMR_FPIOC_WIDTH 1 +#define RPU_RPU_0_IMR_FPIOC_MASK 0X00200000 + +#define RPU_RPU_0_IMR_FPIDC_SHIFT 20 +#define RPU_RPU_0_IMR_FPIDC_WIDTH 1 +#define RPU_RPU_0_IMR_FPIDC_MASK 0X00100000 + +#define RPU_RPU_0_IMR_FPDZC_SHIFT 19 +#define RPU_RPU_0_IMR_FPDZC_WIDTH 1 +#define RPU_RPU_0_IMR_FPDZC_MASK 0X00080000 + +#define RPU_RPU_0_IMR_TCM_ASLV_CE_SHIFT 18 +#define RPU_RPU_0_IMR_TCM_ASLV_CE_WIDTH 1 +#define RPU_RPU_0_IMR_TCM_ASLV_CE_MASK 0X00040000 + +#define RPU_RPU_0_IMR_TCM_ASLV_FAT_SHIFT 17 +#define RPU_RPU_0_IMR_TCM_ASLV_FAT_WIDTH 1 +#define RPU_RPU_0_IMR_TCM_ASLV_FAT_MASK 0X00020000 + +#define RPU_RPU_0_IMR_TCM_LST_CE_SHIFT 16 +#define RPU_RPU_0_IMR_TCM_LST_CE_WIDTH 1 +#define RPU_RPU_0_IMR_TCM_LST_CE_MASK 0X00010000 + +#define RPU_RPU_0_IMR_TCM_PREFETCH_CE_SHIFT 15 +#define RPU_RPU_0_IMR_TCM_PREFETCH_CE_WIDTH 1 +#define RPU_RPU_0_IMR_TCM_PREFETCH_CE_MASK 0X00008000 + +#define RPU_RPU_0_IMR_B1TCM_CE_SHIFT 14 +#define RPU_RPU_0_IMR_B1TCM_CE_WIDTH 1 +#define RPU_RPU_0_IMR_B1TCM_CE_MASK 0X00004000 + +#define RPU_RPU_0_IMR_B0TCM_CE_SHIFT 13 +#define RPU_RPU_0_IMR_B0TCM_CE_WIDTH 1 +#define RPU_RPU_0_IMR_B0TCM_CE_MASK 0X00002000 + +#define RPU_RPU_0_IMR_ATCM_CE_SHIFT 12 +#define RPU_RPU_0_IMR_ATCM_CE_WIDTH 1 +#define RPU_RPU_0_IMR_ATCM_CE_MASK 0X00001000 + +#define RPU_RPU_0_IMR_B1TCM_UE_SHIFT 11 +#define RPU_RPU_0_IMR_B1TCM_UE_WIDTH 1 +#define RPU_RPU_0_IMR_B1TCM_UE_MASK 0X00000800 + +#define RPU_RPU_0_IMR_B0TCM_UE_SHIFT 10 +#define RPU_RPU_0_IMR_B0TCM_UE_WIDTH 1 +#define RPU_RPU_0_IMR_B0TCM_UE_MASK 0X00000400 + +#define RPU_RPU_0_IMR_ATCM_UE_SHIFT 9 +#define RPU_RPU_0_IMR_ATCM_UE_WIDTH 1 +#define RPU_RPU_0_IMR_ATCM_UE_MASK 0X00000200 + +#define RPU_RPU_0_IMR_DTAG_DIRTY_FAT_SHIFT 8 +#define RPU_RPU_0_IMR_DTAG_DIRTY_FAT_WIDTH 1 +#define RPU_RPU_0_IMR_DTAG_DIRTY_FAT_MASK 0X00000100 + +#define RPU_RPU_0_IMR_DDATA_FAT_SHIFT 7 +#define RPU_RPU_0_IMR_DDATA_FAT_WIDTH 1 +#define RPU_RPU_0_IMR_DDATA_FAT_MASK 0X00000080 + +#define RPU_RPU_0_IMR_TCM_LST_FAT_SHIFT 6 +#define RPU_RPU_0_IMR_TCM_LST_FAT_WIDTH 1 +#define RPU_RPU_0_IMR_TCM_LST_FAT_MASK 0X00000040 + +#define RPU_RPU_0_IMR_TCM_PREFETCH_FAT_SHIFT 5 +#define RPU_RPU_0_IMR_TCM_PREFETCH_FAT_WIDTH 1 +#define RPU_RPU_0_IMR_TCM_PREFETCH_FAT_MASK 0X00000020 + +#define RPU_RPU_0_IMR_DDATA_CE_SHIFT 4 +#define RPU_RPU_0_IMR_DDATA_CE_WIDTH 1 +#define RPU_RPU_0_IMR_DDATA_CE_MASK 0X00000010 + +#define RPU_RPU_0_IMR_DTAG_DIRTY_CE_SHIFT 3 +#define RPU_RPU_0_IMR_DTAG_DIRTY_CE_WIDTH 1 +#define RPU_RPU_0_IMR_DTAG_DIRTY_CE_MASK 0X00000008 + +#define RPU_RPU_0_IMR_IDATA_CE_SHIFT 2 +#define RPU_RPU_0_IMR_IDATA_CE_WIDTH 1 +#define RPU_RPU_0_IMR_IDATA_CE_MASK 0X00000004 + +#define RPU_RPU_0_IMR_ITAG_CE_SHIFT 1 +#define RPU_RPU_0_IMR_ITAG_CE_WIDTH 1 +#define RPU_RPU_0_IMR_ITAG_CE_MASK 0X00000002 + +#define RPU_RPU_0_IMR_APB_ERR_SHIFT 0 +#define RPU_RPU_0_IMR_APB_ERR_WIDTH 1 +#define RPU_RPU_0_IMR_APB_ERR_MASK 0X00000001 + +/** + * Register: RPU_RPU_0_IEN + */ +#define RPU_RPU_0_IEN ( ( RPU_BASEADDR ) + 0X0000011C ) + +#define RPU_RPU_0_IEN_FPUFC_SHIFT 24 +#define RPU_RPU_0_IEN_FPUFC_WIDTH 1 +#define RPU_RPU_0_IEN_FPUFC_MASK 0X01000000 + +#define RPU_RPU_0_IEN_FPOFC_SHIFT 23 +#define RPU_RPU_0_IEN_FPOFC_WIDTH 1 +#define RPU_RPU_0_IEN_FPOFC_MASK 0X00800000 + +#define RPU_RPU_0_IEN_FPIXC_SHIFT 22 +#define RPU_RPU_0_IEN_FPIXC_WIDTH 1 +#define RPU_RPU_0_IEN_FPIXC_MASK 0X00400000 + +#define RPU_RPU_0_IEN_FPIOC_SHIFT 21 +#define RPU_RPU_0_IEN_FPIOC_WIDTH 1 +#define RPU_RPU_0_IEN_FPIOC_MASK 0X00200000 + +#define RPU_RPU_0_IEN_FPIDC_SHIFT 20 +#define RPU_RPU_0_IEN_FPIDC_WIDTH 1 +#define RPU_RPU_0_IEN_FPIDC_MASK 0X00100000 + +#define RPU_RPU_0_IEN_FPDZC_SHIFT 19 +#define RPU_RPU_0_IEN_FPDZC_WIDTH 1 +#define RPU_RPU_0_IEN_FPDZC_MASK 0X00080000 + +#define RPU_RPU_0_IEN_TCM_ASLV_CE_SHIFT 18 +#define RPU_RPU_0_IEN_TCM_ASLV_CE_WIDTH 1 +#define RPU_RPU_0_IEN_TCM_ASLV_CE_MASK 0X00040000 + +#define RPU_RPU_0_IEN_TCM_ASLV_FAT_SHIFT 17 +#define RPU_RPU_0_IEN_TCM_ASLV_FAT_WIDTH 1 +#define RPU_RPU_0_IEN_TCM_ASLV_FAT_MASK 0X00020000 + +#define RPU_RPU_0_IEN_TCM_LST_CE_SHIFT 16 +#define RPU_RPU_0_IEN_TCM_LST_CE_WIDTH 1 +#define RPU_RPU_0_IEN_TCM_LST_CE_MASK 0X00010000 + +#define RPU_RPU_0_IEN_TCM_PREFETCH_CE_SHIFT 15 +#define RPU_RPU_0_IEN_TCM_PREFETCH_CE_WIDTH 1 +#define RPU_RPU_0_IEN_TCM_PREFETCH_CE_MASK 0X00008000 + +#define RPU_RPU_0_IEN_B1TCM_CE_SHIFT 14 +#define RPU_RPU_0_IEN_B1TCM_CE_WIDTH 1 +#define RPU_RPU_0_IEN_B1TCM_CE_MASK 0X00004000 + +#define RPU_RPU_0_IEN_B0TCM_CE_SHIFT 13 +#define RPU_RPU_0_IEN_B0TCM_CE_WIDTH 1 +#define RPU_RPU_0_IEN_B0TCM_CE_MASK 0X00002000 + +#define RPU_RPU_0_IEN_ATCM_CE_SHIFT 12 +#define RPU_RPU_0_IEN_ATCM_CE_WIDTH 1 +#define RPU_RPU_0_IEN_ATCM_CE_MASK 0X00001000 + +#define RPU_RPU_0_IEN_B1TCM_UE_SHIFT 11 +#define RPU_RPU_0_IEN_B1TCM_UE_WIDTH 1 +#define RPU_RPU_0_IEN_B1TCM_UE_MASK 0X00000800 + +#define RPU_RPU_0_IEN_B0TCM_UE_SHIFT 10 +#define RPU_RPU_0_IEN_B0TCM_UE_WIDTH 1 +#define RPU_RPU_0_IEN_B0TCM_UE_MASK 0X00000400 + +#define RPU_RPU_0_IEN_ATCM_UE_SHIFT 9 +#define RPU_RPU_0_IEN_ATCM_UE_WIDTH 1 +#define RPU_RPU_0_IEN_ATCM_UE_MASK 0X00000200 + +#define RPU_RPU_0_IEN_DTAG_DIRTY_FAT_SHIFT 8 +#define RPU_RPU_0_IEN_DTAG_DIRTY_FAT_WIDTH 1 +#define RPU_RPU_0_IEN_DTAG_DIRTY_FAT_MASK 0X00000100 + +#define RPU_RPU_0_IEN_DDATA_FAT_SHIFT 7 +#define RPU_RPU_0_IEN_DDATA_FAT_WIDTH 1 +#define RPU_RPU_0_IEN_DDATA_FAT_MASK 0X00000080 + +#define RPU_RPU_0_IEN_TCM_LST_FAT_SHIFT 6 +#define RPU_RPU_0_IEN_TCM_LST_FAT_WIDTH 1 +#define RPU_RPU_0_IEN_TCM_LST_FAT_MASK 0X00000040 + +#define RPU_RPU_0_IEN_TCM_PREFETCH_FAT_SHIFT 5 +#define RPU_RPU_0_IEN_TCM_PREFETCH_FAT_WIDTH 1 +#define RPU_RPU_0_IEN_TCM_PREFETCH_FAT_MASK 0X00000020 + +#define RPU_RPU_0_IEN_DDATA_CE_SHIFT 4 +#define RPU_RPU_0_IEN_DDATA_CE_WIDTH 1 +#define RPU_RPU_0_IEN_DDATA_CE_MASK 0X00000010 + +#define RPU_RPU_0_IEN_DTAG_DIRTY_CE_SHIFT 3 +#define RPU_RPU_0_IEN_DTAG_DIRTY_CE_WIDTH 1 +#define RPU_RPU_0_IEN_DTAG_DIRTY_CE_MASK 0X00000008 + +#define RPU_RPU_0_IEN_IDATA_CE_SHIFT 2 +#define RPU_RPU_0_IEN_IDATA_CE_WIDTH 1 +#define RPU_RPU_0_IEN_IDATA_CE_MASK 0X00000004 + +#define RPU_RPU_0_IEN_ITAG_CE_SHIFT 1 +#define RPU_RPU_0_IEN_ITAG_CE_WIDTH 1 +#define RPU_RPU_0_IEN_ITAG_CE_MASK 0X00000002 + +#define RPU_RPU_0_IEN_APB_ERR_SHIFT 0 +#define RPU_RPU_0_IEN_APB_ERR_WIDTH 1 +#define RPU_RPU_0_IEN_APB_ERR_MASK 0X00000001 + +/** + * Register: RPU_RPU_0_IDS + */ +#define RPU_RPU_0_IDS ( ( RPU_BASEADDR ) + 0X00000120 ) + +#define RPU_RPU_0_IDS_FPUFC_SHIFT 24 +#define RPU_RPU_0_IDS_FPUFC_WIDTH 1 +#define RPU_RPU_0_IDS_FPUFC_MASK 0X01000000 + +#define RPU_RPU_0_IDS_FPOFC_SHIFT 23 +#define RPU_RPU_0_IDS_FPOFC_WIDTH 1 +#define RPU_RPU_0_IDS_FPOFC_MASK 0X00800000 + +#define RPU_RPU_0_IDS_FPIXC_SHIFT 22 +#define RPU_RPU_0_IDS_FPIXC_WIDTH 1 +#define RPU_RPU_0_IDS_FPIXC_MASK 0X00400000 + +#define RPU_RPU_0_IDS_FPIOC_SHIFT 21 +#define RPU_RPU_0_IDS_FPIOC_WIDTH 1 +#define RPU_RPU_0_IDS_FPIOC_MASK 0X00200000 + +#define RPU_RPU_0_IDS_FPIDC_SHIFT 20 +#define RPU_RPU_0_IDS_FPIDC_WIDTH 1 +#define RPU_RPU_0_IDS_FPIDC_MASK 0X00100000 + +#define RPU_RPU_0_IDS_FPDZC_SHIFT 19 +#define RPU_RPU_0_IDS_FPDZC_WIDTH 1 +#define RPU_RPU_0_IDS_FPDZC_MASK 0X00080000 + +#define RPU_RPU_0_IDS_TCM_ASLV_CE_SHIFT 18 +#define RPU_RPU_0_IDS_TCM_ASLV_CE_WIDTH 1 +#define RPU_RPU_0_IDS_TCM_ASLV_CE_MASK 0X00040000 + +#define RPU_RPU_0_IDS_TCM_ASLV_FAT_SHIFT 17 +#define RPU_RPU_0_IDS_TCM_ASLV_FAT_WIDTH 1 +#define RPU_RPU_0_IDS_TCM_ASLV_FAT_MASK 0X00020000 + +#define RPU_RPU_0_IDS_TCM_LST_CE_SHIFT 16 +#define RPU_RPU_0_IDS_TCM_LST_CE_WIDTH 1 +#define RPU_RPU_0_IDS_TCM_LST_CE_MASK 0X00010000 + +#define RPU_RPU_0_IDS_TCM_PREFETCH_CE_SHIFT 15 +#define RPU_RPU_0_IDS_TCM_PREFETCH_CE_WIDTH 1 +#define RPU_RPU_0_IDS_TCM_PREFETCH_CE_MASK 0X00008000 + +#define RPU_RPU_0_IDS_B1TCM_CE_SHIFT 14 +#define RPU_RPU_0_IDS_B1TCM_CE_WIDTH 1 +#define RPU_RPU_0_IDS_B1TCM_CE_MASK 0X00004000 + +#define RPU_RPU_0_IDS_B0TCM_CE_SHIFT 13 +#define RPU_RPU_0_IDS_B0TCM_CE_WIDTH 1 +#define RPU_RPU_0_IDS_B0TCM_CE_MASK 0X00002000 + +#define RPU_RPU_0_IDS_ATCM_CE_SHIFT 12 +#define RPU_RPU_0_IDS_ATCM_CE_WIDTH 1 +#define RPU_RPU_0_IDS_ATCM_CE_MASK 0X00001000 + +#define RPU_RPU_0_IDS_B1TCM_UE_SHIFT 11 +#define RPU_RPU_0_IDS_B1TCM_UE_WIDTH 1 +#define RPU_RPU_0_IDS_B1TCM_UE_MASK 0X00000800 + +#define RPU_RPU_0_IDS_B0TCM_UE_SHIFT 10 +#define RPU_RPU_0_IDS_B0TCM_UE_WIDTH 1 +#define RPU_RPU_0_IDS_B0TCM_UE_MASK 0X00000400 + +#define RPU_RPU_0_IDS_ATCM_UE_SHIFT 9 +#define RPU_RPU_0_IDS_ATCM_UE_WIDTH 1 +#define RPU_RPU_0_IDS_ATCM_UE_MASK 0X00000200 + +#define RPU_RPU_0_IDS_DTAG_DIRTY_FAT_SHIFT 8 +#define RPU_RPU_0_IDS_DTAG_DIRTY_FAT_WIDTH 1 +#define RPU_RPU_0_IDS_DTAG_DIRTY_FAT_MASK 0X00000100 + +#define RPU_RPU_0_IDS_DDATA_FAT_SHIFT 7 +#define RPU_RPU_0_IDS_DDATA_FAT_WIDTH 1 +#define RPU_RPU_0_IDS_DDATA_FAT_MASK 0X00000080 + +#define RPU_RPU_0_IDS_TCM_LST_FAT_SHIFT 6 +#define RPU_RPU_0_IDS_TCM_LST_FAT_WIDTH 1 +#define RPU_RPU_0_IDS_TCM_LST_FAT_MASK 0X00000040 + +#define RPU_RPU_0_IDS_TCM_PREFETCH_FAT_SHIFT 5 +#define RPU_RPU_0_IDS_TCM_PREFETCH_FAT_WIDTH 1 +#define RPU_RPU_0_IDS_TCM_PREFETCH_FAT_MASK 0X00000020 + +#define RPU_RPU_0_IDS_DDATA_CE_SHIFT 4 +#define RPU_RPU_0_IDS_DDATA_CE_WIDTH 1 +#define RPU_RPU_0_IDS_DDATA_CE_MASK 0X00000010 + +#define RPU_RPU_0_IDS_DTAG_DIRTY_CE_SHIFT 3 +#define RPU_RPU_0_IDS_DTAG_DIRTY_CE_WIDTH 1 +#define RPU_RPU_0_IDS_DTAG_DIRTY_CE_MASK 0X00000008 + +#define RPU_RPU_0_IDS_IDATA_CE_SHIFT 2 +#define RPU_RPU_0_IDS_IDATA_CE_WIDTH 1 +#define RPU_RPU_0_IDS_IDATA_CE_MASK 0X00000004 + +#define RPU_RPU_0_IDS_ITAG_CE_SHIFT 1 +#define RPU_RPU_0_IDS_ITAG_CE_WIDTH 1 +#define RPU_RPU_0_IDS_ITAG_CE_MASK 0X00000002 + +#define RPU_RPU_0_IDS_APB_ERR_SHIFT 0 +#define RPU_RPU_0_IDS_APB_ERR_WIDTH 1 +#define RPU_RPU_0_IDS_APB_ERR_MASK 0X00000001 + +/** + * Register: RPU_RPU_0_SLV_BASE + */ +#define RPU_RPU_0_SLV_BASE ( ( RPU_BASEADDR ) + 0X00000124 ) + +#define RPU_RPU_0_SLV_BASE_ADDR_SHIFT 0 +#define RPU_RPU_0_SLV_BASE_ADDR_WIDTH 8 +#define RPU_RPU_0_SLV_BASE_ADDR_MASK 0X000000FF + +/** + * Register: RPU_RPU_0_AXI_OVER + */ +#define RPU_RPU_0_AXI_OVER ( ( RPU_BASEADDR ) + 0X00000128 ) + +#define RPU_RPU_0_AXI_OVER_AWCACHE_SHIFT 6 +#define RPU_RPU_0_AXI_OVER_AWCACHE_WIDTH 4 +#define RPU_RPU_0_AXI_OVER_AWCACHE_MASK 0X000003C0 + +#define RPU_RPU_0_AXI_OVER_ARCACHE_SHIFT 2 +#define RPU_RPU_0_AXI_OVER_ARCACHE_WIDTH 4 +#define RPU_RPU_0_AXI_OVER_ARCACHE_MASK 0X0000003C + +#define RPU_RPU_0_AXI_OVER_AWCACHE_EN_SHIFT 1 +#define RPU_RPU_0_AXI_OVER_AWCACHE_EN_WIDTH 1 +#define RPU_RPU_0_AXI_OVER_AWCACHE_EN_MASK 0X00000002 + +#define RPU_RPU_0_AXI_OVER_ARCACHE_EN_SHIFT 0 +#define RPU_RPU_0_AXI_OVER_ARCACHE_EN_WIDTH 1 +#define RPU_RPU_0_AXI_OVER_ARCACHE_EN_MASK 0X00000001 + +/** + * Register: RPU_RPU_1_CFG + */ +#define RPU_RPU_1_CFG ( ( RPU_BASEADDR ) + 0X00000200 ) + +#define RPU_RPU_1_CFG_CFGNMFI1_SHIFT 3 +#define RPU_RPU_1_CFG_CFGNMFI1_WIDTH 1 +#define RPU_RPU_1_CFG_CFGNMFI1_MASK 0X00000008 + +#define RPU_RPU_1_CFG_VINITHI_SHIFT 2 +#define RPU_RPU_1_CFG_VINITHI_WIDTH 1 +#define RPU_RPU_1_CFG_VINITHI_MASK 0X00000004 + +#define RPU_RPU_1_CFG_COHERENT_SHIFT 1 +#define RPU_RPU_1_CFG_COHERENT_WIDTH 1 +#define RPU_RPU_1_CFG_COHERENT_MASK 0X00000002 + +#define RPU_RPU_1_CFG_NCPUHALT_SHIFT 0 +#define RPU_RPU_1_CFG_NCPUHALT_WIDTH 1 +#define RPU_RPU_1_CFG_NCPUHALT_MASK 0X00000001 + +/** + * Register: RPU_RPU_1_STATUS + */ +#define RPU_RPU_1_STATUS ( ( RPU_BASEADDR ) + 0X00000204 ) + +#define RPU_RPU_1_STATUS_NVALRESET_SHIFT 5 +#define RPU_RPU_1_STATUS_NVALRESET_WIDTH 1 +#define RPU_RPU_1_STATUS_NVALRESET_MASK 0X00000020 + +#define RPU_RPU_1_STATUS_NVALIRQ_SHIFT 4 +#define RPU_RPU_1_STATUS_NVALIRQ_WIDTH 1 +#define RPU_RPU_1_STATUS_NVALIRQ_MASK 0X00000010 + +#define RPU_RPU_1_STATUS_NVALFIQ_SHIFT 3 +#define RPU_RPU_1_STATUS_NVALFIQ_WIDTH 1 +#define RPU_RPU_1_STATUS_NVALFIQ_MASK 0X00000008 + +#define RPU_RPU_1_STATUS_NWFIPIPESTOPPED_SHIFT 2 +#define RPU_RPU_1_STATUS_NWFIPIPESTOPPED_WIDTH 1 +#define RPU_RPU_1_STATUS_NWFIPIPESTOPPED_MASK 0X00000004 + +#define RPU_RPU_1_STATUS_NWFEPIPESTOPPED_SHIFT 1 +#define RPU_RPU_1_STATUS_NWFEPIPESTOPPED_WIDTH 1 +#define RPU_RPU_1_STATUS_NWFEPIPESTOPPED_MASK 0X00000002 + +#define RPU_RPU_1_STATUS_NCLKSTOPPED_SHIFT 0 +#define RPU_RPU_1_STATUS_NCLKSTOPPED_WIDTH 1 +#define RPU_RPU_1_STATUS_NCLKSTOPPED_MASK 0X00000001 + +/** + * Register: RPU_RPU_1_PWRDWN + */ +#define RPU_RPU_1_PWRDWN ( ( RPU_BASEADDR ) + 0X00000208 ) + +#define RPU_RPU_1_PWRDWN_EN_SHIFT 0 +#define RPU_RPU_1_PWRDWN_EN_WIDTH 1 +#define RPU_RPU_1_PWRDWN_EN_MASK 0X00000001 + +/** + * Register: RPU_RPU_1_ISR + */ +#define RPU_RPU_1_ISR ( ( RPU_BASEADDR ) + 0X00000214 ) + +#define RPU_RPU_1_ISR_FPUFC_SHIFT 24 +#define RPU_RPU_1_ISR_FPUFC_WIDTH 1 +#define RPU_RPU_1_ISR_FPUFC_MASK 0X01000000 + +#define RPU_RPU_1_ISR_FPOFC_SHIFT 23 +#define RPU_RPU_1_ISR_FPOFC_WIDTH 1 +#define RPU_RPU_1_ISR_FPOFC_MASK 0X00800000 + +#define RPU_RPU_1_ISR_FPIXC_SHIFT 22 +#define RPU_RPU_1_ISR_FPIXC_WIDTH 1 +#define RPU_RPU_1_ISR_FPIXC_MASK 0X00400000 + +#define RPU_RPU_1_ISR_FPIOC_SHIFT 21 +#define RPU_RPU_1_ISR_FPIOC_WIDTH 1 +#define RPU_RPU_1_ISR_FPIOC_MASK 0X00200000 + +#define RPU_RPU_1_ISR_FPIDC_SHIFT 20 +#define RPU_RPU_1_ISR_FPIDC_WIDTH 1 +#define RPU_RPU_1_ISR_FPIDC_MASK 0X00100000 + +#define RPU_RPU_1_ISR_FPDZC_SHIFT 19 +#define RPU_RPU_1_ISR_FPDZC_WIDTH 1 +#define RPU_RPU_1_ISR_FPDZC_MASK 0X00080000 + +#define RPU_RPU_1_ISR_TCM_ASLV_CE_SHIFT 18 +#define RPU_RPU_1_ISR_TCM_ASLV_CE_WIDTH 1 +#define RPU_RPU_1_ISR_TCM_ASLV_CE_MASK 0X00040000 + +#define RPU_RPU_1_ISR_TCM_ASLV_FAT_SHIFT 17 +#define RPU_RPU_1_ISR_TCM_ASLV_FAT_WIDTH 1 +#define RPU_RPU_1_ISR_TCM_ASLV_FAT_MASK 0X00020000 + +#define RPU_RPU_1_ISR_TCM_LST_CE_SHIFT 16 +#define RPU_RPU_1_ISR_TCM_LST_CE_WIDTH 1 +#define RPU_RPU_1_ISR_TCM_LST_CE_MASK 0X00010000 + +#define RPU_RPU_1_ISR_TCM_PREFETCH_CE_SHIFT 15 +#define RPU_RPU_1_ISR_TCM_PREFETCH_CE_WIDTH 1 +#define RPU_RPU_1_ISR_TCM_PREFETCH_CE_MASK 0X00008000 + +#define RPU_RPU_1_ISR_B1TCM_CE_SHIFT 14 +#define RPU_RPU_1_ISR_B1TCM_CE_WIDTH 1 +#define RPU_RPU_1_ISR_B1TCM_CE_MASK 0X00004000 + +#define RPU_RPU_1_ISR_B0TCM_CE_SHIFT 13 +#define RPU_RPU_1_ISR_B0TCM_CE_WIDTH 1 +#define RPU_RPU_1_ISR_B0TCM_CE_MASK 0X00002000 + +#define RPU_RPU_1_ISR_ATCM_CE_SHIFT 12 +#define RPU_RPU_1_ISR_ATCM_CE_WIDTH 1 +#define RPU_RPU_1_ISR_ATCM_CE_MASK 0X00001000 + +#define RPU_RPU_1_ISR_B1TCM_UE_SHIFT 11 +#define RPU_RPU_1_ISR_B1TCM_UE_WIDTH 1 +#define RPU_RPU_1_ISR_B1TCM_UE_MASK 0X00000800 + +#define RPU_RPU_1_ISR_B0TCM_UE_SHIFT 10 +#define RPU_RPU_1_ISR_B0TCM_UE_WIDTH 1 +#define RPU_RPU_1_ISR_B0TCM_UE_MASK 0X00000400 + +#define RPU_RPU_1_ISR_ATCM_UE_SHIFT 9 +#define RPU_RPU_1_ISR_ATCM_UE_WIDTH 1 +#define RPU_RPU_1_ISR_ATCM_UE_MASK 0X00000200 + +#define RPU_RPU_1_ISR_DTAG_DIRTY_FAT_SHIFT 8 +#define RPU_RPU_1_ISR_DTAG_DIRTY_FAT_WIDTH 1 +#define RPU_RPU_1_ISR_DTAG_DIRTY_FAT_MASK 0X00000100 + +#define RPU_RPU_1_ISR_DDATA_FAT_SHIFT 7 +#define RPU_RPU_1_ISR_DDATA_FAT_WIDTH 1 +#define RPU_RPU_1_ISR_DDATA_FAT_MASK 0X00000080 + +#define RPU_RPU_1_ISR_TCM_LST_FAT_SHIFT 6 +#define RPU_RPU_1_ISR_TCM_LST_FAT_WIDTH 1 +#define RPU_RPU_1_ISR_TCM_LST_FAT_MASK 0X00000040 + +#define RPU_RPU_1_ISR_TCM_PREFETCH_FAT_SHIFT 5 +#define RPU_RPU_1_ISR_TCM_PREFETCH_FAT_WIDTH 1 +#define RPU_RPU_1_ISR_TCM_PREFETCH_FAT_MASK 0X00000020 + +#define RPU_RPU_1_ISR_DDATA_CE_SHIFT 4 +#define RPU_RPU_1_ISR_DDATA_CE_WIDTH 1 +#define RPU_RPU_1_ISR_DDATA_CE_MASK 0X00000010 + +#define RPU_RPU_1_ISR_DTAG_DIRTY_CE_SHIFT 3 +#define RPU_RPU_1_ISR_DTAG_DIRTY_CE_WIDTH 1 +#define RPU_RPU_1_ISR_DTAG_DIRTY_CE_MASK 0X00000008 + +#define RPU_RPU_1_ISR_IDATA_CE_SHIFT 2 +#define RPU_RPU_1_ISR_IDATA_CE_WIDTH 1 +#define RPU_RPU_1_ISR_IDATA_CE_MASK 0X00000004 + +#define RPU_RPU_1_ISR_ITAG_CE_SHIFT 1 +#define RPU_RPU_1_ISR_ITAG_CE_WIDTH 1 +#define RPU_RPU_1_ISR_ITAG_CE_MASK 0X00000002 + +#define RPU_RPU_1_ISR_APB_ERR_SHIFT 0 +#define RPU_RPU_1_ISR_APB_ERR_WIDTH 1 +#define RPU_RPU_1_ISR_APB_ERR_MASK 0X00000001 + +/** + * Register: RPU_RPU_1_IMR + */ +#define RPU_RPU_1_IMR ( ( RPU_BASEADDR ) + 0X00000218 ) + +#define RPU_RPU_1_IMR_FPUFC_SHIFT 24 +#define RPU_RPU_1_IMR_FPUFC_WIDTH 1 +#define RPU_RPU_1_IMR_FPUFC_MASK 0X01000000 + +#define RPU_RPU_1_IMR_FPOFC_SHIFT 23 +#define RPU_RPU_1_IMR_FPOFC_WIDTH 1 +#define RPU_RPU_1_IMR_FPOFC_MASK 0X00800000 + +#define RPU_RPU_1_IMR_FPIXC_SHIFT 22 +#define RPU_RPU_1_IMR_FPIXC_WIDTH 1 +#define RPU_RPU_1_IMR_FPIXC_MASK 0X00400000 + +#define RPU_RPU_1_IMR_FPIOC_SHIFT 21 +#define RPU_RPU_1_IMR_FPIOC_WIDTH 1 +#define RPU_RPU_1_IMR_FPIOC_MASK 0X00200000 + +#define RPU_RPU_1_IMR_FPIDC_SHIFT 20 +#define RPU_RPU_1_IMR_FPIDC_WIDTH 1 +#define RPU_RPU_1_IMR_FPIDC_MASK 0X00100000 + +#define RPU_RPU_1_IMR_FPDZC_SHIFT 19 +#define RPU_RPU_1_IMR_FPDZC_WIDTH 1 +#define RPU_RPU_1_IMR_FPDZC_MASK 0X00080000 + +#define RPU_RPU_1_IMR_TCM_ASLV_CE_SHIFT 18 +#define RPU_RPU_1_IMR_TCM_ASLV_CE_WIDTH 1 +#define RPU_RPU_1_IMR_TCM_ASLV_CE_MASK 0X00040000 + +#define RPU_RPU_1_IMR_TCM_ASLV_FAT_SHIFT 17 +#define RPU_RPU_1_IMR_TCM_ASLV_FAT_WIDTH 1 +#define RPU_RPU_1_IMR_TCM_ASLV_FAT_MASK 0X00020000 + +#define RPU_RPU_1_IMR_TCM_LST_CE_SHIFT 16 +#define RPU_RPU_1_IMR_TCM_LST_CE_WIDTH 1 +#define RPU_RPU_1_IMR_TCM_LST_CE_MASK 0X00010000 + +#define RPU_RPU_1_IMR_TCM_PREFETCH_CE_SHIFT 15 +#define RPU_RPU_1_IMR_TCM_PREFETCH_CE_WIDTH 1 +#define RPU_RPU_1_IMR_TCM_PREFETCH_CE_MASK 0X00008000 + +#define RPU_RPU_1_IMR_B1TCM_CE_SHIFT 14 +#define RPU_RPU_1_IMR_B1TCM_CE_WIDTH 1 +#define RPU_RPU_1_IMR_B1TCM_CE_MASK 0X00004000 + +#define RPU_RPU_1_IMR_B0TCM_CE_SHIFT 13 +#define RPU_RPU_1_IMR_B0TCM_CE_WIDTH 1 +#define RPU_RPU_1_IMR_B0TCM_CE_MASK 0X00002000 + +#define RPU_RPU_1_IMR_ATCM_CE_SHIFT 12 +#define RPU_RPU_1_IMR_ATCM_CE_WIDTH 1 +#define RPU_RPU_1_IMR_ATCM_CE_MASK 0X00001000 + +#define RPU_RPU_1_IMR_B1TCM_UE_SHIFT 11 +#define RPU_RPU_1_IMR_B1TCM_UE_WIDTH 1 +#define RPU_RPU_1_IMR_B1TCM_UE_MASK 0X00000800 + +#define RPU_RPU_1_IMR_B0TCM_UE_SHIFT 10 +#define RPU_RPU_1_IMR_B0TCM_UE_WIDTH 1 +#define RPU_RPU_1_IMR_B0TCM_UE_MASK 0X00000400 + +#define RPU_RPU_1_IMR_ATCM_UE_SHIFT 9 +#define RPU_RPU_1_IMR_ATCM_UE_WIDTH 1 +#define RPU_RPU_1_IMR_ATCM_UE_MASK 0X00000200 + +#define RPU_RPU_1_IMR_DTAG_DIRTY_FAT_SHIFT 8 +#define RPU_RPU_1_IMR_DTAG_DIRTY_FAT_WIDTH 1 +#define RPU_RPU_1_IMR_DTAG_DIRTY_FAT_MASK 0X00000100 + +#define RPU_RPU_1_IMR_DDATA_FAT_SHIFT 7 +#define RPU_RPU_1_IMR_DDATA_FAT_WIDTH 1 +#define RPU_RPU_1_IMR_DDATA_FAT_MASK 0X00000080 + +#define RPU_RPU_1_IMR_TCM_LST_FAT_SHIFT 6 +#define RPU_RPU_1_IMR_TCM_LST_FAT_WIDTH 1 +#define RPU_RPU_1_IMR_TCM_LST_FAT_MASK 0X00000040 + +#define RPU_RPU_1_IMR_TCM_PREFETCH_FAT_SHIFT 5 +#define RPU_RPU_1_IMR_TCM_PREFETCH_FAT_WIDTH 1 +#define RPU_RPU_1_IMR_TCM_PREFETCH_FAT_MASK 0X00000020 + +#define RPU_RPU_1_IMR_DDATA_CE_SHIFT 4 +#define RPU_RPU_1_IMR_DDATA_CE_WIDTH 1 +#define RPU_RPU_1_IMR_DDATA_CE_MASK 0X00000010 + +#define RPU_RPU_1_IMR_DTAG_DIRTY_CE_SHIFT 3 +#define RPU_RPU_1_IMR_DTAG_DIRTY_CE_WIDTH 1 +#define RPU_RPU_1_IMR_DTAG_DIRTY_CE_MASK 0X00000008 + +#define RPU_RPU_1_IMR_IDATA_CE_SHIFT 2 +#define RPU_RPU_1_IMR_IDATA_CE_WIDTH 1 +#define RPU_RPU_1_IMR_IDATA_CE_MASK 0X00000004 + +#define RPU_RPU_1_IMR_ITAG_CE_SHIFT 1 +#define RPU_RPU_1_IMR_ITAG_CE_WIDTH 1 +#define RPU_RPU_1_IMR_ITAG_CE_MASK 0X00000002 + +#define RPU_RPU_1_IMR_APB_ERR_SHIFT 0 +#define RPU_RPU_1_IMR_APB_ERR_WIDTH 1 +#define RPU_RPU_1_IMR_APB_ERR_MASK 0X00000001 + +/** + * Register: RPU_RPU_1_IEN + */ +#define RPU_RPU_1_IEN ( ( RPU_BASEADDR ) + 0X0000021C ) + +#define RPU_RPU_1_IEN_FPUFC_SHIFT 24 +#define RPU_RPU_1_IEN_FPUFC_WIDTH 1 +#define RPU_RPU_1_IEN_FPUFC_MASK 0X01000000 + +#define RPU_RPU_1_IEN_FPOFC_SHIFT 23 +#define RPU_RPU_1_IEN_FPOFC_WIDTH 1 +#define RPU_RPU_1_IEN_FPOFC_MASK 0X00800000 + +#define RPU_RPU_1_IEN_FPIXC_SHIFT 22 +#define RPU_RPU_1_IEN_FPIXC_WIDTH 1 +#define RPU_RPU_1_IEN_FPIXC_MASK 0X00400000 + +#define RPU_RPU_1_IEN_FPIOC_SHIFT 21 +#define RPU_RPU_1_IEN_FPIOC_WIDTH 1 +#define RPU_RPU_1_IEN_FPIOC_MASK 0X00200000 + +#define RPU_RPU_1_IEN_FPIDC_SHIFT 20 +#define RPU_RPU_1_IEN_FPIDC_WIDTH 1 +#define RPU_RPU_1_IEN_FPIDC_MASK 0X00100000 + +#define RPU_RPU_1_IEN_FPDZC_SHIFT 19 +#define RPU_RPU_1_IEN_FPDZC_WIDTH 1 +#define RPU_RPU_1_IEN_FPDZC_MASK 0X00080000 + +#define RPU_RPU_1_IEN_TCM_ASLV_CE_SHIFT 18 +#define RPU_RPU_1_IEN_TCM_ASLV_CE_WIDTH 1 +#define RPU_RPU_1_IEN_TCM_ASLV_CE_MASK 0X00040000 + +#define RPU_RPU_1_IEN_TCM_ASLV_FAT_SHIFT 17 +#define RPU_RPU_1_IEN_TCM_ASLV_FAT_WIDTH 1 +#define RPU_RPU_1_IEN_TCM_ASLV_FAT_MASK 0X00020000 + +#define RPU_RPU_1_IEN_TCM_LST_CE_SHIFT 16 +#define RPU_RPU_1_IEN_TCM_LST_CE_WIDTH 1 +#define RPU_RPU_1_IEN_TCM_LST_CE_MASK 0X00010000 + +#define RPU_RPU_1_IEN_TCM_PREFETCH_CE_SHIFT 15 +#define RPU_RPU_1_IEN_TCM_PREFETCH_CE_WIDTH 1 +#define RPU_RPU_1_IEN_TCM_PREFETCH_CE_MASK 0X00008000 + +#define RPU_RPU_1_IEN_B1TCM_CE_SHIFT 14 +#define RPU_RPU_1_IEN_B1TCM_CE_WIDTH 1 +#define RPU_RPU_1_IEN_B1TCM_CE_MASK 0X00004000 + +#define RPU_RPU_1_IEN_B0TCM_CE_SHIFT 13 +#define RPU_RPU_1_IEN_B0TCM_CE_WIDTH 1 +#define RPU_RPU_1_IEN_B0TCM_CE_MASK 0X00002000 + +#define RPU_RPU_1_IEN_ATCM_CE_SHIFT 12 +#define RPU_RPU_1_IEN_ATCM_CE_WIDTH 1 +#define RPU_RPU_1_IEN_ATCM_CE_MASK 0X00001000 + +#define RPU_RPU_1_IEN_B1TCM_UE_SHIFT 11 +#define RPU_RPU_1_IEN_B1TCM_UE_WIDTH 1 +#define RPU_RPU_1_IEN_B1TCM_UE_MASK 0X00000800 + +#define RPU_RPU_1_IEN_B0TCM_UE_SHIFT 10 +#define RPU_RPU_1_IEN_B0TCM_UE_WIDTH 1 +#define RPU_RPU_1_IEN_B0TCM_UE_MASK 0X00000400 + +#define RPU_RPU_1_IEN_ATCM_UE_SHIFT 9 +#define RPU_RPU_1_IEN_ATCM_UE_WIDTH 1 +#define RPU_RPU_1_IEN_ATCM_UE_MASK 0X00000200 + +#define RPU_RPU_1_IEN_DTAG_DIRTY_FAT_SHIFT 8 +#define RPU_RPU_1_IEN_DTAG_DIRTY_FAT_WIDTH 1 +#define RPU_RPU_1_IEN_DTAG_DIRTY_FAT_MASK 0X00000100 + +#define RPU_RPU_1_IEN_DDATA_FAT_SHIFT 7 +#define RPU_RPU_1_IEN_DDATA_FAT_WIDTH 1 +#define RPU_RPU_1_IEN_DDATA_FAT_MASK 0X00000080 + +#define RPU_RPU_1_IEN_TCM_LST_FAT_SHIFT 6 +#define RPU_RPU_1_IEN_TCM_LST_FAT_WIDTH 1 +#define RPU_RPU_1_IEN_TCM_LST_FAT_MASK 0X00000040 + +#define RPU_RPU_1_IEN_TCM_PREFETCH_FAT_SHIFT 5 +#define RPU_RPU_1_IEN_TCM_PREFETCH_FAT_WIDTH 1 +#define RPU_RPU_1_IEN_TCM_PREFETCH_FAT_MASK 0X00000020 + +#define RPU_RPU_1_IEN_DDATA_CE_SHIFT 4 +#define RPU_RPU_1_IEN_DDATA_CE_WIDTH 1 +#define RPU_RPU_1_IEN_DDATA_CE_MASK 0X00000010 + +#define RPU_RPU_1_IEN_DTAG_DIRTY_CE_SHIFT 3 +#define RPU_RPU_1_IEN_DTAG_DIRTY_CE_WIDTH 1 +#define RPU_RPU_1_IEN_DTAG_DIRTY_CE_MASK 0X00000008 + +#define RPU_RPU_1_IEN_IDATA_CE_SHIFT 2 +#define RPU_RPU_1_IEN_IDATA_CE_WIDTH 1 +#define RPU_RPU_1_IEN_IDATA_CE_MASK 0X00000004 + +#define RPU_RPU_1_IEN_ITAG_CE_SHIFT 1 +#define RPU_RPU_1_IEN_ITAG_CE_WIDTH 1 +#define RPU_RPU_1_IEN_ITAG_CE_MASK 0X00000002 + +#define RPU_RPU_1_IEN_APB_ERR_SHIFT 0 +#define RPU_RPU_1_IEN_APB_ERR_WIDTH 1 +#define RPU_RPU_1_IEN_APB_ERR_MASK 0X00000001 + +/** + * Register: RPU_RPU_1_IDS + */ +#define RPU_RPU_1_IDS ( ( RPU_BASEADDR ) + 0X00000220 ) + +#define RPU_RPU_1_IDS_FPUFC_SHIFT 24 +#define RPU_RPU_1_IDS_FPUFC_WIDTH 1 +#define RPU_RPU_1_IDS_FPUFC_MASK 0X01000000 + +#define RPU_RPU_1_IDS_FPOFC_SHIFT 23 +#define RPU_RPU_1_IDS_FPOFC_WIDTH 1 +#define RPU_RPU_1_IDS_FPOFC_MASK 0X00800000 + +#define RPU_RPU_1_IDS_FPIXC_SHIFT 22 +#define RPU_RPU_1_IDS_FPIXC_WIDTH 1 +#define RPU_RPU_1_IDS_FPIXC_MASK 0X00400000 + +#define RPU_RPU_1_IDS_FPIOC_SHIFT 21 +#define RPU_RPU_1_IDS_FPIOC_WIDTH 1 +#define RPU_RPU_1_IDS_FPIOC_MASK 0X00200000 + +#define RPU_RPU_1_IDS_FPIDC_SHIFT 20 +#define RPU_RPU_1_IDS_FPIDC_WIDTH 1 +#define RPU_RPU_1_IDS_FPIDC_MASK 0X00100000 + +#define RPU_RPU_1_IDS_FPDZC_SHIFT 19 +#define RPU_RPU_1_IDS_FPDZC_WIDTH 1 +#define RPU_RPU_1_IDS_FPDZC_MASK 0X00080000 + +#define RPU_RPU_1_IDS_TCM_ASLV_CE_SHIFT 18 +#define RPU_RPU_1_IDS_TCM_ASLV_CE_WIDTH 1 +#define RPU_RPU_1_IDS_TCM_ASLV_CE_MASK 0X00040000 + +#define RPU_RPU_1_IDS_TCM_ASLV_FAT_SHIFT 17 +#define RPU_RPU_1_IDS_TCM_ASLV_FAT_WIDTH 1 +#define RPU_RPU_1_IDS_TCM_ASLV_FAT_MASK 0X00020000 + +#define RPU_RPU_1_IDS_TCM_LST_CE_SHIFT 16 +#define RPU_RPU_1_IDS_TCM_LST_CE_WIDTH 1 +#define RPU_RPU_1_IDS_TCM_LST_CE_MASK 0X00010000 + +#define RPU_RPU_1_IDS_TCM_PREFETCH_CE_SHIFT 15 +#define RPU_RPU_1_IDS_TCM_PREFETCH_CE_WIDTH 1 +#define RPU_RPU_1_IDS_TCM_PREFETCH_CE_MASK 0X00008000 + +#define RPU_RPU_1_IDS_B1TCM_CE_SHIFT 14 +#define RPU_RPU_1_IDS_B1TCM_CE_WIDTH 1 +#define RPU_RPU_1_IDS_B1TCM_CE_MASK 0X00004000 + +#define RPU_RPU_1_IDS_B0TCM_CE_SHIFT 13 +#define RPU_RPU_1_IDS_B0TCM_CE_WIDTH 1 +#define RPU_RPU_1_IDS_B0TCM_CE_MASK 0X00002000 + +#define RPU_RPU_1_IDS_ATCM_CE_SHIFT 12 +#define RPU_RPU_1_IDS_ATCM_CE_WIDTH 1 +#define RPU_RPU_1_IDS_ATCM_CE_MASK 0X00001000 + +#define RPU_RPU_1_IDS_B1TCM_UE_SHIFT 11 +#define RPU_RPU_1_IDS_B1TCM_UE_WIDTH 1 +#define RPU_RPU_1_IDS_B1TCM_UE_MASK 0X00000800 + +#define RPU_RPU_1_IDS_B0TCM_UE_SHIFT 10 +#define RPU_RPU_1_IDS_B0TCM_UE_WIDTH 1 +#define RPU_RPU_1_IDS_B0TCM_UE_MASK 0X00000400 + +#define RPU_RPU_1_IDS_ATCM_UE_SHIFT 9 +#define RPU_RPU_1_IDS_ATCM_UE_WIDTH 1 +#define RPU_RPU_1_IDS_ATCM_UE_MASK 0X00000200 + +#define RPU_RPU_1_IDS_DTAG_DIRTY_FAT_SHIFT 8 +#define RPU_RPU_1_IDS_DTAG_DIRTY_FAT_WIDTH 1 +#define RPU_RPU_1_IDS_DTAG_DIRTY_FAT_MASK 0X00000100 + +#define RPU_RPU_1_IDS_DDATA_FAT_SHIFT 7 +#define RPU_RPU_1_IDS_DDATA_FAT_WIDTH 1 +#define RPU_RPU_1_IDS_DDATA_FAT_MASK 0X00000080 + +#define RPU_RPU_1_IDS_TCM_LST_FAT_SHIFT 6 +#define RPU_RPU_1_IDS_TCM_LST_FAT_WIDTH 1 +#define RPU_RPU_1_IDS_TCM_LST_FAT_MASK 0X00000040 + +#define RPU_RPU_1_IDS_TCM_PREFETCH_FAT_SHIFT 5 +#define RPU_RPU_1_IDS_TCM_PREFETCH_FAT_WIDTH 1 +#define RPU_RPU_1_IDS_TCM_PREFETCH_FAT_MASK 0X00000020 + +#define RPU_RPU_1_IDS_DDATA_CE_SHIFT 4 +#define RPU_RPU_1_IDS_DDATA_CE_WIDTH 1 +#define RPU_RPU_1_IDS_DDATA_CE_MASK 0X00000010 + +#define RPU_RPU_1_IDS_DTAG_DIRTY_CE_SHIFT 3 +#define RPU_RPU_1_IDS_DTAG_DIRTY_CE_WIDTH 1 +#define RPU_RPU_1_IDS_DTAG_DIRTY_CE_MASK 0X00000008 + +#define RPU_RPU_1_IDS_IDATA_CE_SHIFT 2 +#define RPU_RPU_1_IDS_IDATA_CE_WIDTH 1 +#define RPU_RPU_1_IDS_IDATA_CE_MASK 0X00000004 + +#define RPU_RPU_1_IDS_ITAG_CE_SHIFT 1 +#define RPU_RPU_1_IDS_ITAG_CE_WIDTH 1 +#define RPU_RPU_1_IDS_ITAG_CE_MASK 0X00000002 + +#define RPU_RPU_1_IDS_APB_ERR_SHIFT 0 +#define RPU_RPU_1_IDS_APB_ERR_WIDTH 1 +#define RPU_RPU_1_IDS_APB_ERR_MASK 0X00000001 + +/** + * Register: RPU_RPU_1_SLV_BASE + */ +#define RPU_RPU_1_SLV_BASE ( ( RPU_BASEADDR ) + 0X00000224 ) + +#define RPU_RPU_1_SLV_BASE_ADDR_SHIFT 0 +#define RPU_RPU_1_SLV_BASE_ADDR_WIDTH 8 +#define RPU_RPU_1_SLV_BASE_ADDR_MASK 0X000000FF + +/** + * Register: RPU_RPU_1_AXI_OVER + */ +#define RPU_RPU_1_AXI_OVER ( ( RPU_BASEADDR ) + 0X00000228 ) + +#define RPU_RPU_1_AXI_OVER_AWCACHE_SHIFT 6 +#define RPU_RPU_1_AXI_OVER_AWCACHE_WIDTH 4 +#define RPU_RPU_1_AXI_OVER_AWCACHE_MASK 0X000003C0 + +#define RPU_RPU_1_AXI_OVER_ARCACHE_SHIFT 2 +#define RPU_RPU_1_AXI_OVER_ARCACHE_WIDTH 4 +#define RPU_RPU_1_AXI_OVER_ARCACHE_MASK 0X0000003C + +#define RPU_RPU_1_AXI_OVER_AWCACHE_EN_SHIFT 1 +#define RPU_RPU_1_AXI_OVER_AWCACHE_EN_WIDTH 1 +#define RPU_RPU_1_AXI_OVER_AWCACHE_EN_MASK 0X00000002 + +#define RPU_RPU_1_AXI_OVER_ARCACHE_EN_SHIFT 0 +#define RPU_RPU_1_AXI_OVER_ARCACHE_EN_WIDTH 1 +#define RPU_RPU_1_AXI_OVER_ARCACHE_EN_MASK 0X00000001 + +#ifdef __cplusplus +} +#endif + + +#endif /* _PM_RPU_H_ */ diff --git a/src/Xilinx/include/sleep.h b/src/Xilinx/include/sleep.h new file mode 100644 index 0000000..f53b2d8 --- /dev/null +++ b/src/Xilinx/include/sleep.h @@ -0,0 +1,119 @@ +/****************************************************************************** +* +* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +/*****************************************************************************/ +/** +* @file sleep.h +* +* This header file contains ARM Cortex A53,A9,R5,Microblaze specific sleep +* related APIs. +* +* 
+* MODIFICATION HISTORY :
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 6.6   srm  11/02/17 Added processor specific sleep rountines
+*								 function prototypes.
+*
+*
+* +******************************************************************************/ + +#ifndef SLEEP_H +#define SLEEP_H + +#include "xil_types.h" +#include "xil_io.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/*****************************************************************************/ +/** +* +* This macro polls an address periodically until a condition is met or till the +* timeout occurs. +* The minimum timeout for calling this macro is 100us. If the timeout is less +* than 100us, it still waits for 100us. Also the unit for the timeout is 100us. +* If the timeout is not a multiple of 100us, it waits for a timeout of +* the next usec value which is a multiple of 100us. +* +* @param IO_func - accessor function to read the register contents. +* Depends on the register width. +* @param ADDR - Address to be polled +* @param VALUE - variable to read the value +* @param COND - Condition to checked (usually involves VALUE) +* @param TIMEOUT_US - timeout in micro seconds +* +* @return 0 - when the condition is met +* -1 - when the condition is not met till the timeout period +* +* @note none +* +*****************************************************************************/ +#define Xil_poll_timeout(IO_func, ADDR, VALUE, COND, TIMEOUT_US) \ + ( { \ + u64 timeout = TIMEOUT_US/100; \ + if(TIMEOUT_US%100!=0) \ + timeout++; \ + for(;;) { \ + VALUE = IO_func(ADDR); \ + if(COND) \ + break; \ + else { \ + usleep(100); \ + timeout--; \ + if(timeout==0) \ + break; \ + } \ + } \ + (timeout>0) ? 0 : -1; \ + } ) + +void usleep(unsigned long useconds); +void sleep(unsigned int seconds); +int usleep_R5(unsigned long useconds); +unsigned sleep_R5(unsigned int seconds); +int usleep_MB(unsigned long useconds); +unsigned sleep_MB(unsigned int seconds); +int usleep_A53(unsigned long useconds); +unsigned sleep_A53(unsigned int seconds); +int usleep_A9(unsigned long useconds); +unsigned sleep_A9(unsigned int seconds); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/Xilinx/include/vectors.h b/src/Xilinx/include/vectors.h new file mode 100644 index 0000000..bb599b5 --- /dev/null +++ b/src/Xilinx/include/vectors.h @@ -0,0 +1,88 @@ +/****************************************************************************** +* +* Copyright (C) 2009 - 2016 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file vectors.h +* +* This file contains the C level vector prototypes for the ARM Cortex A9 core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a ecm  10/20/10 Initial version, moved over from bsp area
+* 6.0   mus  07/27/16 Consolidated vectors for a9,a53 and r5 processors
+*
+* +* @note +* +* None. +* +******************************************************************************/ + +#ifndef _VECTORS_H_ +#define _VECTORS_H_ + +/***************************** Include Files *********************************/ + +#include "xil_types.h" +#include "xil_assert.h" + +#ifdef __cplusplus +extern "C" { +#endif +/***************** Macros (Inline Functions) Definitions *********************/ + +/**************************** Type Definitions *******************************/ + +/************************** Constant Definitions *****************************/ + +/************************** Function Prototypes ******************************/ + +void FIQInterrupt(void); +void IRQInterrupt(void); +#if !defined (__aarch64__) +void SWInterrupt(void); +void DataAbortInterrupt(void); +void PrefetchAbortInterrupt(void); +void UndefinedException(void); +#else +void SynchronousInterrupt(void); +void SErrorInterrupt(void); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* protection macro */ diff --git a/src/Xilinx/include/xavbuf.h b/src/Xilinx/include/xavbuf.h new file mode 100644 index 0000000..386bfba --- /dev/null +++ b/src/Xilinx/include/xavbuf.h @@ -0,0 +1,302 @@ +/******************************************************************************* + * + * Copyright (C) 2017 Xilinx, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * Use of the Software is limited solely to applications: + * (a) running on a Xilinx device, or + * (b) that interact with a Xilinx device through a bus or interconnect. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Except as contained in this notice, the name of the Xilinx shall not be used + * in advertising or otherwise to promote the sale, use or other dealings in + * this Software without prior written authorization from Xilinx. + * +*******************************************************************************/ +/******************************************************************************/ +/** + * + * @file xavbuf.h + * + * This file implements all the functions related to the Video Pipeline of the + * DisplayPort Subsystem. + * + * Features supported by this driver + * - Live Video and Graphics input. + * - Non-Live Video Graphics input. + * - Output Formats Supported - RGB, YUV444, YUV4222. + * + * + * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   aad  06/24/17 Initial release.
+ * 2.0   aad  10/07/17 Added Enums for Video and Audio sources.
+ *
+ * +*******************************************************************************/ +#ifndef XAVBUF_H_ +/* Prevent circular inclusions by using protection macros. */ +#define XAVBUF_H_ + + +/******************************* Include Files ********************************/ +#include "xavbuf_hw.h" +#include "sleep.h" +/****************************** Type Definitions ******************************/ +/** + * This typedef describes all the Video Formats supported by the driver + */ +typedef enum { + //Non-Live Video Formats + CbY0CrY1, + CrY0CbY1, + Y0CrY1Cb, + Y0CbY1Cr, + YV16, + YV24, + YV16Ci, + MONOCHROME, + YV16Ci2, + YUV444, + RGB888, + RGBA8880, + RGB888_10BPC, + YUV444_10BPC, + YV16Ci2_10BPC, + YV16Ci_10BPC, + YV16_10BPC, + YV24_10BPC, + MONOCHROME_10BPC, + YV16_420, + YV16Ci_420, + YV16Ci2_420, + YV16_420_10BPC, + YV16Ci_420_10BPC, + YV16Ci2_420_10BPC, + + // Non-Live Graphics formats + RGBA8888, + ABGR8888, + RGB888_GFX, + BGR888, + RGBA5551, + RGBA4444, + RGB565, + BPP8, + BPP4, + BPP2, + BPP1, + YUV422, + YOnly, + + //Live Input/Output Video/Graphics Formats + RGB_6BPC, + RGB_8BPC, + RGB_10BPC, + RGB_12BPC, + YCbCr444_6BPC, + YCbCr444_8BPC, + YCbCr444_10BPC, + YCbCr444_12BPC, + YCbCr422_8BPC, + YCbCr422_10BPC, + YCbCr422_12BPC, + YOnly_8BPC, + YOnly_10BPC, + YOnly_12BPC, +} XAVBuf_VideoFormat; + +/** + * This data structure describes video planes. + */ +typedef enum { + Interleaved, + SemiPlanar, + Planar +} XAVBuf_VideoModes; + +/** + * This typedef describes the video source list + */ +typedef enum { + XAVBUF_VIDSTREAM1_LIVE, + XAVBUF_VIDSTREAM1_NONLIVE, + XAVBUF_VIDSTREAM1_TPG, + XAVBUF_VIDSTREAM1_NONE, +} XAVBuf_VideoStream; + +/** + * This typedef describes the graphics source list + */ +typedef enum { + XAVBUF_VIDSTREAM2_DISABLEGFX = 0x0, + XAVBUF_VIDSTREAM2_NONLIVE_GFX = 0x4, + XAVBUF_VIDSTREAM2_LIVE_GFX = 0x8, + XAVBUF_VIDSTREAM2_NONE = 0xC0, +} XAVBuf_GfxStream; + +/** + * This typedef describes the audio stream 1 source list + */ +typedef enum { + XAVBUF_AUDSTREAM1_LIVE = 0x00, + XAVBUF_AUDSTREAM1_NONLIVE = 0x10, + XAVBUF_AUDSTREAM1_TPG = 0x20, + XAVBUF_AUDSTREAM1_NO_AUDIO = 0x30, +} XAVBuf_AudioStream1; + +/** + * This typedef describes the audio stream 2 source list + */ +typedef enum { + XAVBUF_AUDSTREAM2_NO_AUDIO = 0X00, + XAVBUF_AUDSTREAM2_AUDIOGFX = 0X40, +} XAVBuf_AudioStream2; + +/** + * This typedef describes the attributes associated with the video formats. + */ +typedef struct { + XAVBuf_VideoFormat VideoFormat; + u8 Value; + XAVBuf_VideoModes Mode; + u32 SF[3]; + u8 SamplingEn; + u8 IsRGB; + u8 Swap; + u8 BPP; +} XAVBuf_VideoAttribute; + +/** + * This typedef stores the attributes of an audio stream + */ +typedef struct { + u32 Volume; + u8 SwapLR; +} XAVBuf_AudioAttribute; + +/** + * This typedef stores the data associated with the Audio Video input modes. + */ +typedef struct { + XAVBuf_VideoAttribute *NonLiveVideo, *NonLiveGraphics; + XAVBuf_VideoAttribute *LiveVideo, *LiveGraphics; + XAVBuf_AudioAttribute *Audio, *GraphicsAudio; + XAVBuf_VideoStream VideoSrc; + XAVBuf_GfxStream GraphicsSrc; + XAVBuf_AudioStream1 AudioSrc1; + XAVBuf_AudioStream2 AudioSrc2; + u8 AudioClk, VideoClk; +} XAVBuf_AVModes; + +/** + * This structure stores the background color information. + */ +typedef struct { + u16 RCr; + u16 GY; + u16 BCb; +} XAVBuf_BlenderBgClr; + +/** + * This typedef stores the AVBuf Configuration information. + */ +typedef struct { + u16 DeviceId; + u32 BaseAddr; +} XAVBuf_Config; + +/** + * This typedef stores all the attributes associated to the Blender block of the + * DisplayPort Subsystem + */ +typedef struct { + u8 GlobalAlphaEn; + u8 Alpha; + XAVBuf_VideoAttribute *OutputVideo; +} XAVBuf_Blender; + +/** + * The XAVBuf driver instance data. The user is required to allocate a variable + * of this type for every XAVBUF instance in the system. A pointer to this type + * is then passed to the driver API functions + */ +typedef struct { + XAVBuf_Config Config; + XAVBuf_AVModes AVMode; + XAVBuf_Blender Blender; +} XAVBuf; + + +/**************************** Function Prototypes *****************************/ + +/* xavbuf.c: Setup and initialization functions. */ +void XAVBuf_CfgInitialize(XAVBuf *InstancePtr, u32 BaseAddr, u16 DeviceId); + +/* xavbuf.c: Functions to setup the Input Video and Audio sources */ +void XAVBuf_InputVideoSelect(XAVBuf *InstancePtr, XAVBuf_VideoStream VidStream, + XAVBuf_GfxStream GfxStream); +void XAVBuf_InputAudioSelect(XAVBuf *InstancePtr, XAVBuf_AudioStream1 AudStream, + XAVBuf_AudioStream2 AudioStream2); + +/* xavbuf.c: Functions to setup the Video Format attributes */ +int XAVBuf_SetInputNonLiveVideoFormat(XAVBuf *InstancePtr, + XAVBuf_VideoFormat Format); +int XAVBuf_SetInputNonLiveGraphicsFormat(XAVBuf *InstancePtr, + XAVBuf_VideoFormat Format); +int XAVBuf_SetInputLiveVideoFormat(XAVBuf *InstancePtr, + XAVBuf_VideoFormat Format); +int XAVBuf_SetInputLiveGraphicsFormat(XAVBuf *InstancePtr, + XAVBuf_VideoFormat Format); +int XAVBuf_SetOutputVideoFormat(XAVBuf *InstancePtr, XAVBuf_VideoFormat Format); +XAVBuf_VideoAttribute *XAVBuf_GetLiveVideoAttribute(XAVBuf_VideoFormat Format); +XAVBuf_VideoAttribute *XAVBuf_GetNLiveVideoAttribute(XAVBuf_VideoFormat Format); +XAVBuf_VideoAttribute *XAVBuf_GetNLGraphicsAttribute(XAVBuf_VideoFormat Format); + +/* xavbuf.c: Functions to setup the clock sources for video and audio */ +void XAVBuf_SetAudioVideoClkSrc(XAVBuf *InstancePtr, u8 VideoClk, u8 AudioClk); + +/* xavbuf.c: Functions that setup Video and Graphics pipeline depending on the + * sources and format selected. + */ +void XAVBuf_ConfigureVideoPipeline(XAVBuf *InstancePtr); +void XAVBuf_ConfigureGraphicsPipeline(XAVBuf *InstancePtr); + +/* Functions to setup Blender Properties */ +void XAVBuf_BlendSetBgColor(XAVBuf *InstancePtr, XAVBuf_BlenderBgClr *Color); +void XAVBuf_SetBlenderAlpha(XAVBuf *InstancePtr, u8 Alpha, u8 Enable); +void XAVBuf_SoftReset(XAVBuf *InstancePtr); +void XABuf_LineResetDisable(XAVBuf *InstancePtr, u8 Disable); +void XAVBuf_ConfigureOutputVideo(XAVBuf *InstancePtr); + +/* Audio Configuration functions */ +void XAVBuf_AudioSoftReset(XAVBuf *InstancePtr); +void XAVBuf_AudioMixerVolumeControl(XAVBuf *InstancePtr, u8 Channel0Volume, + u8 Channel1Volume); + +/* DPDMA Interface functions */ +void XAVBuf_EnableGraphicsBuffers(XAVBuf *InstancePtr, u8 Enable); +void XAVBuf_EnableVideoBuffers(XAVBuf *InstancePtr, u8 Enable); +void XAVBuf_EnableAudio0Buffers(XAVBuf *InstancePtr, u8 Enable); +void XAVBuf_EnableAudio1Buffers(XAVBuf *InstancePtr, u8 Enable); + +#endif //XAVBUF_H_ diff --git a/src/Xilinx/include/xavbuf_clk.h b/src/Xilinx/include/xavbuf_clk.h new file mode 100644 index 0000000..91ca3b5 --- /dev/null +++ b/src/Xilinx/include/xavbuf_clk.h @@ -0,0 +1,97 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/******************************************************************************/ +/** + * + * @file xavbuf_clk.h + * + * This header file contains the identifiers and low-level driver functions (or + * macros) that can be used to configure PLL to generate required frequency. + * + * @note None. + * + * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   mh  06/24/17 Initial release.
+ * 2.1   tu  12/29/17 LPD and FPD offsets adjusted
+ *
+ * +*******************************************************************************/ + +#ifndef XAVBUF_CLK_H_ +#define XAVBUF_CLK_H_ + +/******************************* Include Files ********************************/ +#include "xavbuf_hw.h" +#include "xstatus.h" +#include "sleep.h" + +/****************************** Type Definitions ******************************/ +/** + * This enum enumerates various PLL + */ +enum PLL{ + APLL = 0, + DPLL = 1, + VPLL = 2, + IOPLL = 3, + RPLL = 4 +}; + +/** + * This typedef enumerates various variables used to configure Pll + */ +typedef struct { + u64 BaseAddress; + u64 Fractional; + u64 RefClkFreqhz; + u32 Divider; + u8 Offset; + u8 ClkDividBy2; + u8 ExtDivider0; + u8 ExtDivider1; + u8 ExtDividerCnt; + u8 DomainSwitchDiv; + u8 FracIntegerFBDIV; + u8 IntegerFBDIV; + u8 InputRefClk; + u8 Fpd; + u8 Pll; +}XAVBuf_Pll; + +/**************************** Function Prototypes *****************************/ +int XAVBuf_SetPixelClock(u64 FreqHz); +int XAVBuf_SetAudioClock(u64 FreqHz); +#endif /* XAVBUF_CLK_H_ */ diff --git a/src/Xilinx/include/xavbuf_hw.h b/src/Xilinx/include/xavbuf_hw.h new file mode 100644 index 0000000..3454fa0 --- /dev/null +++ b/src/Xilinx/include/xavbuf_hw.h @@ -0,0 +1,1675 @@ +/******************************************************************************* + * + * Copyright C 2014 Xilinx, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * Use of the Software is limited solely to applications: + * (a) running on a Xilinx device, or + * (b) that interact with a Xilinx device through a bus or interconnect. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Except as contained in this notice, the name of the Xilinx shall not be used + * in advertising or otherwise to promote the sale, use or other dealings in + * this Software without prior written authorization from Xilinx. + * +*******************************************************************************/ +/******************************************************************************/ +/** + * + * @file xavbuf_hw.h + * + * This header file contains macros that can be used to access the device + * + * @note None. + * + * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0	 aad 02/24/17	Initial Release
+ * 1.0   mh  06/24/17	Added Clock related register information
+ * 2.0   aad 10/07/17   Removed Macros related to Video and Audio Src
+ *
+ * +*******************************************************************************/ +#ifndef XAVBUF_HW_H_ +/* Prevent circular inclusions by using protection macros. */ +#define XAVBUF_HW_H_ + +#ifdef __cplusplus +extern "C" { +#endif +/***************************** Include Files **********************************/ + +#include "xil_io.h" +#include "xil_types.h" + +/************************** Constant Definitions ******************************/ + +/******************************************************************************/ +/** + * Address mapping for the DisplayPort TX core. + * +*******************************************************************************/ + +#define XAVBUF_BASEADDR 0xFD4A0000 +/** + * * Register: XAVBUF_V_BLEND_BG_CLR_0 + * */ +#define XAVBUF_V_BLEND_BG_CLR_0 0X0000A000 + +#define XAVBUF_V_BLEND_BG_CLR_0_CLR0_SHIFT 0 +#define XAVBUF_V_BLEND_BG_CLR_0_CLR0_WIDTH 12 +#define XAVBUF_V_BLEND_BG_CLR_0_CLR0_MASK 0X00000FFF + +/** + * * Register: XAVBUF_V_BLEND_BG_CLR_1 + * */ +#define XAVBUF_V_BLEND_BG_CLR_1 0X0000A004 + +#define XAVBUF_V_BLEND_BG_CLR_1_CLR1_SHIFT 0 +#define XAVBUF_V_BLEND_BG_CLR_1_CLR1_WIDTH 12 +#define XAVBUF_V_BLEND_BG_CLR_1_CLR1_MASK 0X00000FFF + +/** + * * Register: XAVBUF_V_BLEND_BG_CLR_2 + * */ +#define XAVBUF_V_BLEND_BG_CLR_2 0X0000A008 + +#define XAVBUF_V_BLEND_BG_CLR_2_CLR2_SHIFT 0 +#define XAVBUF_V_BLEND_BG_CLR_2_CLR2_WIDTH 12 +#define XAVBUF_V_BLEND_BG_CLR_2_CLR2_MASK 0X00000FFF + +/** + * * Register: XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG + * */ +#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG 0X0000A00C + +#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_VALUE_SHIFT 1 +#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_VALUE_WIDTH 8 +#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_VALUE_MASK 0X000001FE + +#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_EN_SHIFT 0 +#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_EN_WIDTH 1 +#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_EN_MASK 0X00000001 + +/** + * * Register: XAVBUF_V_BLEND_OUTPUT_VID_FORMAT + * */ +#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT 0X0000A014 + +#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_EN_DOWNSAMPLE_SHIFT 4 +#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_EN_DOWNSAMPLE_WIDTH 1 +#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_EN_DOWNSAMPLE_MASK 0X00000010 + +#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_VID_FORMAT_SHIFT 0 +#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_VID_FORMAT_WIDTH 3 +#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_VID_FORMAT_MASK 0X00000007 + +/** + * * Register: XAVBUF_V_BLEND_LAYER0_CONTROL + * */ +#define XAVBUF_V_BLEND_LAYER0_CONTROL 0X0000A018 + +#define XAVBUF_V_BLEND_LAYER0_CONTROL_BYPASS_SHIFT 8 +#define XAVBUF_V_BLEND_LAYER0_CONTROL_BYPASS_WIDTH 1 +#define XAVBUF_V_BLEND_LAYER0_CONTROL_BYPASS_MASK 0X00000100 + +#define XAVBUF_V_BLEND_LAYER0_CONTROL_RGB_MODE_SHIFT 1 +#define XAVBUF_V_BLEND_LAYER0_CONTROL_RGB_MODE_WIDTH 1 +#define XAVBUF_V_BLEND_LAYER0_CONTROL_RGB_MODE_MASK 0X00000002 + +#define XAVBUF_V_BLEND_LAYER0_CONTROL_EN_US_SHIFT 0 +#define XAVBUF_V_BLEND_LAYER0_CONTROL_EN_US_WIDTH 1 +#define XAVBUF_V_BLEND_LAYER0_CONTROL_EN_US_MASK 0X00000001 + +/** + * * Register: XAVBUF_V_BLEND_LAYER1_CONTROL + * */ +#define XAVBUF_V_BLEND_LAYER1_CONTROL 0X0000A01C + +#define XAVBUF_V_BLEND_LAYER1_CONTROL_BYPASS_SHIFT 8 +#define XAVBUF_V_BLEND_LAYER1_CONTROL_BYPASS_WIDTH 1 +#define XAVBUF_V_BLEND_LAYER1_CONTROL_BYPASS_MASK 0X00000100 + +#define XAVBUF_V_BLEND_LAYER1_CONTROL_RGB_MODE_SHIFT 1 +#define XAVBUF_V_BLEND_LAYER1_CONTROL_RGB_MODE_WIDTH 1 +#define XAVBUF_V_BLEND_LAYER1_CONTROL_RGB_MODE_MASK 0X00000002 + +#define XAVBUF_V_BLEND_LAYER1_CONTROL_EN_US_SHIFT 0 +#define XAVBUF_V_BLEND_LAYER1_CONTROL_EN_US_WIDTH 1 +#define XAVBUF_V_BLEND_LAYER1_CONTROL_EN_US_MASK 0X00000001 + +/** + * * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF0 + * */ +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF0 0X0000A020 + +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF0_RGB2Y_C0_SHIFT 0 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF0_RGB2Y_C0_WIDTH 15 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF0_RGB2Y_C0_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF1 + * */ +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF1 0X0000A024 + +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF1_RGB2Y_C1_SHIFT 0 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF1_RGB2Y_C1_WIDTH 15 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF1_RGB2Y_C1_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF2 + * */ +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF2 0X0000A028 + +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF2_RGB2Y_C2_SHIFT 0 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF2_RGB2Y_C2_WIDTH 15 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF2_RGB2Y_C2_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF3 + * */ +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF3 0X0000A02C + +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF3_RGB2Y_C3_SHIFT 0 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF3_RGB2Y_C3_WIDTH 15 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF3_RGB2Y_C3_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF4 + * */ +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF4 0X0000A030 + +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF4_RGB2Y_C4_SHIFT 0 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF4_RGB2Y_C4_WIDTH 15 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF4_RGB2Y_C4_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF5 + * */ +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF5 0X0000A034 + +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF5_RGB2Y_C5_SHIFT 0 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF5_RGB2Y_C5_WIDTH 15 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF5_RGB2Y_C5_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF6 + * */ +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF6 0X0000A038 + +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF6_RGB2Y_C6_SHIFT 0 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF6_RGB2Y_C6_WIDTH 15 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF6_RGB2Y_C6_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF7 + * */ +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF7 0X0000A03C + +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF7_RGB2Y_C7_SHIFT 0 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF7_RGB2Y_C7_WIDTH 15 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF7_RGB2Y_C7_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF8 + * */ +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF8 0X0000A040 + +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF8_RGB2Y_C8_SHIFT 0 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF8_RGB2Y_C8_WIDTH 15 +#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF8_RGB2Y_C8_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN1CSC_COEFF0 + * */ +#define XAVBUF_V_BLEND_IN1CSC_COEFF0 0X0000A044 + +#define XAVBUF_V_BLEND_IN1CSC_COEFF0_Y2R_C0_SHIFT 0 +#define XAVBUF_V_BLEND_IN1CSC_COEFF0_Y2R_C0_WIDTH 15 +#define XAVBUF_V_BLEND_IN1CSC_COEFF0_Y2R_C0_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN1CSC_COEFF1 + * */ +#define XAVBUF_V_BLEND_IN1CSC_COEFF1 0X0000A048 + +#define XAVBUF_V_BLEND_IN1CSC_COEFF1_Y2R_C1_SHIFT 0 +#define XAVBUF_V_BLEND_IN1CSC_COEFF1_Y2R_C1_WIDTH 15 +#define XAVBUF_V_BLEND_IN1CSC_COEFF1_Y2R_C1_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN1CSC_COEFF2 + * */ +#define XAVBUF_V_BLEND_IN1CSC_COEFF2 0X0000A04C + +#define XAVBUF_V_BLEND_IN1CSC_COEFF2_Y2R_C2_SHIFT 0 +#define XAVBUF_V_BLEND_IN1CSC_COEFF2_Y2R_C2_WIDTH 15 +#define XAVBUF_V_BLEND_IN1CSC_COEFF2_Y2R_C2_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN1CSC_COEFF3 + * */ +#define XAVBUF_V_BLEND_IN1CSC_COEFF3 0X0000A050 + +#define XAVBUF_V_BLEND_IN1CSC_COEFF3_Y2R_C3_SHIFT 0 +#define XAVBUF_V_BLEND_IN1CSC_COEFF3_Y2R_C3_WIDTH 15 +#define XAVBUF_V_BLEND_IN1CSC_COEFF3_Y2R_C3_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN1CSC_COEFF4 + * */ +#define XAVBUF_V_BLEND_IN1CSC_COEFF4 0X0000A054 + +#define XAVBUF_V_BLEND_IN1CSC_COEFF4_Y2R_C4_SHIFT 0 +#define XAVBUF_V_BLEND_IN1CSC_COEFF4_Y2R_C4_WIDTH 15 +#define XAVBUF_V_BLEND_IN1CSC_COEFF4_Y2R_C4_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN1CSC_COEFF5 + * */ +#define XAVBUF_V_BLEND_IN1CSC_COEFF5 0X0000A058 + +#define XAVBUF_V_BLEND_IN1CSC_COEFF5_Y2R_C5_SHIFT 0 +#define XAVBUF_V_BLEND_IN1CSC_COEFF5_Y2R_C5_WIDTH 15 +#define XAVBUF_V_BLEND_IN1CSC_COEFF5_Y2R_C5_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN1CSC_COEFF6 + * */ +#define XAVBUF_V_BLEND_IN1CSC_COEFF6 0X0000A05C + +#define XAVBUF_V_BLEND_IN1CSC_COEFF6_Y2R_C6_SHIFT 0 +#define XAVBUF_V_BLEND_IN1CSC_COEFF6_Y2R_C6_WIDTH 15 +#define XAVBUF_V_BLEND_IN1CSC_COEFF6_Y2R_C6_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN1CSC_COEFF7 + * */ +#define XAVBUF_V_BLEND_IN1CSC_COEFF7 0X0000A060 + +#define XAVBUF_V_BLEND_IN1CSC_COEFF7_Y2R_C7_SHIFT 0 +#define XAVBUF_V_BLEND_IN1CSC_COEFF7_Y2R_C7_WIDTH 15 +#define XAVBUF_V_BLEND_IN1CSC_COEFF7_Y2R_C7_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN1CSC_COEFF8 + * */ +#define XAVBUF_V_BLEND_IN1CSC_COEFF8 0X0000A064 + +#define XAVBUF_V_BLEND_IN1CSC_COEFF8_Y2R_C8_SHIFT 0 +#define XAVBUF_V_BLEND_IN1CSC_COEFF8_Y2R_C8_WIDTH 15 +#define XAVBUF_V_BLEND_IN1CSC_COEFF8_Y2R_C8_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET + * */ +#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET 0X0000A068 + +#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_POST_OFFSET_SHIFT 16 +#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_POST_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_POST_OFFSET_MASK 0X1FFF0000 + +#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_PRE_OFFSET_SHIFT 0 +#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_PRE_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_PRE_OFFSET_MASK 0X00001FFF + +/** + * * Register: XAVBUF_V_BLEND_CR_IN1CSC_OFFSET + * */ +#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET 0X0000A06C + +#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_POST_OFFSET_SHIFT 16 +#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_POST_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_POST_OFFSET_MASK 0X1FFF0000 + +#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_PRE_OFFSET_SHIFT 0 +#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_PRE_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_PRE_OFFSET_MASK 0X00001FFF + +/** + * * Register: XAVBUF_V_BLEND_CB_IN1CSC_OFFSET + * */ +#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET 0X0000A070 + +#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_POST_OFFSET_SHIFT 16 +#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_POST_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_POST_OFFSET_MASK 0X1FFF0000 + +#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_PRE_OFFSET_SHIFT 0 +#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_PRE_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_PRE_OFFSET_MASK 0X00001FFF + +/** + * * Register: XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET + * */ +#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET 0X0000A074 + +#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_POST_OFFSET_SHIFT 16 +#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_POST_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_POST_OFFSET_MASK 0X1FFF0000 + +#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_PRE_OFFSET_SHIFT 0 +#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_PRE_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_PRE_OFFSET_MASK 0X00001FFF + +/** + * * Register: XAVBUF_V_BLEND_CR_OUTCSC_OFFSET + * */ +#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET 0X0000A078 + +#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_POST_OFFSET_SHIFT 16 +#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_POST_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_POST_OFFSET_MASK 0X1FFF0000 + +#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_PRE_OFFSET_SHIFT 0 +#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_PRE_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_PRE_OFFSET_MASK 0X00001FFF + +/** + * * Register: XAVBUF_V_BLEND_CB_OUTCSC_OFFSET + * */ +#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET 0X0000A07C + +#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_POST_OFFSET_SHIFT 16 +#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_POST_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_POST_OFFSET_MASK 0X1FFF0000 + +#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_PRE_OFFSET_SHIFT 0 +#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_PRE_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_PRE_OFFSET_MASK 0X00001FFF + +/** + * * Register: XAVBUF_V_BLEND_IN2CSC_COEFF0 + * */ +#define XAVBUF_V_BLEND_IN2CSC_COEFF0 0X0000A080 + +#define XAVBUF_V_BLEND_IN2CSC_COEFF0_Y2R_C0_SHIFT 0 +#define XAVBUF_V_BLEND_IN2CSC_COEFF0_Y2R_C0_WIDTH 15 +#define XAVBUF_V_BLEND_IN2CSC_COEFF0_Y2R_C0_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN2CSC_COEFF1 + * */ +#define XAVBUF_V_BLEND_IN2CSC_COEFF1 0X0000A084 + +#define XAVBUF_V_BLEND_IN2CSC_COEFF1_Y2R_C1_SHIFT 0 +#define XAVBUF_V_BLEND_IN2CSC_COEFF1_Y2R_C1_WIDTH 15 +#define XAVBUF_V_BLEND_IN2CSC_COEFF1_Y2R_C1_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN2CSC_COEFF2 + * */ +#define XAVBUF_V_BLEND_IN2CSC_COEFF2 0X0000A088 + +#define XAVBUF_V_BLEND_IN2CSC_COEFF2_Y2R_C2_SHIFT 0 +#define XAVBUF_V_BLEND_IN2CSC_COEFF2_Y2R_C2_WIDTH 15 +#define XAVBUF_V_BLEND_IN2CSC_COEFF2_Y2R_C2_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN2CSC_COEFF3 + * */ +#define XAVBUF_V_BLEND_IN2CSC_COEFF3 0X0000A08C + +#define XAVBUF_V_BLEND_IN2CSC_COEFF3_Y2R_C3_SHIFT 0 +#define XAVBUF_V_BLEND_IN2CSC_COEFF3_Y2R_C3_WIDTH 15 +#define XAVBUF_V_BLEND_IN2CSC_COEFF3_Y2R_C3_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN2CSC_COEFF4 + * */ +#define XAVBUF_V_BLEND_IN2CSC_COEFF4 0X0000A090 + +#define XAVBUF_V_BLEND_IN2CSC_COEFF4_Y2R_C4_SHIFT 0 +#define XAVBUF_V_BLEND_IN2CSC_COEFF4_Y2R_C4_WIDTH 15 +#define XAVBUF_V_BLEND_IN2CSC_COEFF4_Y2R_C4_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN2CSC_COEFF5 + * */ +#define XAVBUF_V_BLEND_IN2CSC_COEFF5 0X0000A094 + +#define XAVBUF_V_BLEND_IN2CSC_COEFF5_Y2R_C5_SHIFT 0 +#define XAVBUF_V_BLEND_IN2CSC_COEFF5_Y2R_C5_WIDTH 15 +#define XAVBUF_V_BLEND_IN2CSC_COEFF5_Y2R_C5_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN2CSC_COEFF6 + * */ +#define XAVBUF_V_BLEND_IN2CSC_COEFF6 0X0000A098 + +#define XAVBUF_V_BLEND_IN2CSC_COEFF6_Y2R_C6_SHIFT 0 +#define XAVBUF_V_BLEND_IN2CSC_COEFF6_Y2R_C6_WIDTH 15 +#define XAVBUF_V_BLEND_IN2CSC_COEFF6_Y2R_C6_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN2CSC_COEFF7 + * */ +#define XAVBUF_V_BLEND_IN2CSC_COEFF7 0X0000A09C + +#define XAVBUF_V_BLEND_IN2CSC_COEFF7_Y2R_C7_SHIFT 0 +#define XAVBUF_V_BLEND_IN2CSC_COEFF7_Y2R_C7_WIDTH 15 +#define XAVBUF_V_BLEND_IN2CSC_COEFF7_Y2R_C7_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_IN2CSC_COEFF8 + * */ +#define XAVBUF_V_BLEND_IN2CSC_COEFF8 0X0000A0A0 + +#define XAVBUF_V_BLEND_IN2CSC_COEFF8_Y2R_C8_SHIFT 0 +#define XAVBUF_V_BLEND_IN2CSC_COEFF8_Y2R_C8_WIDTH 15 +#define XAVBUF_V_BLEND_IN2CSC_COEFF8_Y2R_C8_MASK 0X00007FFF + +/** + * * Register: XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET + * */ +#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET 0X0000A0A4 + +#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_POST_OFFSET_SHIFT 16 +#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_POST_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_POST_OFFSET_MASK 0X1FFF0000 + +#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_PRE_OFFSET_SHIFT 0 +#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_PRE_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_PRE_OFFSET_MASK 0X00001FFF + +/** + * * Register: XAVBUF_V_BLEND_CR_IN2CSC_OFFSET + * */ +#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET 0X0000A0A8 + +#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_POST_OFFSET_SHIFT 16 +#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_POST_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_POST_OFFSET_MASK 0X1FFF0000 + +#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_PRE_OFFSET_SHIFT 0 +#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_PRE_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_PRE_OFFSET_MASK 0X00001FFF + +/** + * * Register: XAVBUF_V_BLEND_CB_IN2CSC_OFFSET + * */ +#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET 0X0000A0AC + +#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_POST_OFFSET_SHIFT 16 +#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_POST_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_POST_OFFSET_MASK 0X1FFF0000 + +#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_PRE_OFFSET_SHIFT 0 +#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_PRE_OFFSET_WIDTH 13 +#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_PRE_OFFSET_MASK 0X00001FFF + +/** + * * Register: XAVBUF_V_BLEND_CHROMA_KEY_ENABLE + * */ +#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE 0X0000A1D0 + +#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_M_SEL_SHIFT 1 +#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_M_SEL_WIDTH 1 +#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_M_SEL_MASK 0X00000002 + +#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_EN_SHIFT 0 +#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_EN_WIDTH 1 +#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_EN_MASK 0X00000001 + +/** + * * Register: XAVBUF_V_BLEND_CHROMA_KEY_COMP1 + * */ +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1 0X0000A1D4 + +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MAX_SHIFT 16 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MAX_WIDTH 12 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MAX_MASK 0X0FFF0000 + +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MIN_SHIFT 0 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MIN_WIDTH 12 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MIN_MASK 0X00000FFF + +/** + * * Register: XAVBUF_V_BLEND_CHROMA_KEY_COMP2 + * */ +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2 0X0000A1D8 + +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MAX_SHIFT 16 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MAX_WIDTH 12 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MAX_MASK 0X0FFF0000 + +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MIN_SHIFT 0 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MIN_WIDTH 12 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MIN_MASK 0X00000FFF + +/** + * * Register: XAVBUF_V_BLEND_CHROMA_KEY_COMP3 + * */ +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3 0X0000A1DC + +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MAX_SHIFT 16 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MAX_WIDTH 12 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MAX_MASK 0X0FFF0000 + +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MIN_SHIFT 0 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MIN_WIDTH 12 +#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MIN_MASK 0X00000FFF + +/** + * * Register: XAVBUF_BUF_FORMAT + * */ +#define XAVBUF_BUF_FORMAT 0X0000B000 + +#define XAVBUF_BUF_FORMAT_NL_GRAPHX_FORMAT_SHIFT 8 +#define XAVBUF_BUF_FORMAT_NL_GRAPHX_FORMAT_WIDTH 4 +#define XAVBUF_BUF_FORMAT_NL_GRAPHX_FORMAT_MASK 0X00000F00 + +#define XAVBUF_BUF_FORMAT_NL_VID_FORMAT_SHIFT 0 +#define XAVBUF_BUF_FORMAT_NL_VID_FORMAT_WIDTH 5 +#define XAVBUF_BUF_FORMAT_NL_VID_FORMAT_MASK 0X0000001F + +/** + * * Register: XAVBUF_BUF_NON_LIVE_LATENCY + * */ +#define XAVBUF_BUF_NON_LIVE_LATENCY 0X0000B008 + +#define XAVBUF_BUF_NON_LIVE_LATENCY_NL_LATENCY_SHIFT 0 +#define XAVBUF_BUF_NON_LIVE_LATENCY_NL_LATENCY_WIDTH 10 +#define XAVBUF_BUF_NON_LIVE_LATENCY_NL_LATENCY_MASK 0X000003FF + +/** + * * Register: XAVBUF_CHBUF0 + * */ +#define XAVBUF_CHBUF0 0X0000B010 + +#define XAVBUF_CHBUF0_BURST_LEN_SHIFT 2 +#define XAVBUF_CHBUF0_BURST_LEN_WIDTH 5 +#define XAVBUF_CHBUF0_BURST_LEN_MASK 0X0000007C + +#define XAVBUF_CHBUF0_FLUSH_SHIFT 1 +#define XAVBUF_CHBUF0_FLUSH_WIDTH 1 +#define XAVBUF_CHBUF0_FLUSH_MASK 0X00000002 + +#define XAVBUF_CHBUF0_EN_SHIFT 0 +#define XAVBUF_CHBUF0_EN_WIDTH 1 +#define XAVBUF_CHBUF0_EN_MASK 0X00000001 + +/** + * * Register: XAVBUF_CHBUF1 + * */ +#define XAVBUF_CHBUF1 0X0000B014 + +#define XAVBUF_CHBUF1_BURST_LEN_SHIFT 2 +#define XAVBUF_CHBUF1_BURST_LEN_WIDTH 5 +#define XAVBUF_CHBUF1_BURST_LEN_MASK 0X0000007C + +#define XAVBUF_CHBUF1_FLUSH_SHIFT 1 +#define XAVBUF_CHBUF1_FLUSH_WIDTH 1 +#define XAVBUF_CHBUF1_FLUSH_MASK 0X00000002 + +#define XAVBUF_CHBUF1_EN_SHIFT 0 +#define XAVBUF_CHBUF1_EN_WIDTH 1 +#define XAVBUF_CHBUF1_EN_MASK 0X00000001 + +/** + * * Register: XAVBUF_CHBUF2 + * */ +#define XAVBUF_CHBUF2 0X0000B018 + +#define XAVBUF_CHBUF2_BURST_LEN_SHIFT 2 +#define XAVBUF_CHBUF2_BURST_LEN_WIDTH 5 +#define XAVBUF_CHBUF2_BURST_LEN_MASK 0X0000007C + +#define XAVBUF_CHBUF2_FLUSH_SHIFT 1 +#define XAVBUF_CHBUF2_FLUSH_WIDTH 1 +#define XAVBUF_CHBUF2_FLUSH_MASK 0X00000002 + +#define XAVBUF_CHBUF2_EN_SHIFT 0 +#define XAVBUF_CHBUF2_EN_WIDTH 1 +#define XAVBUF_CHBUF2_EN_MASK 0X00000001 + +/** + * * Register: XAVBUF_CHBUF3 + * */ +#define XAVBUF_CHBUF3 0X0000B01C + +#define XAVBUF_CHBUF3_BURST_LEN_SHIFT 2 +#define XAVBUF_CHBUF3_BURST_LEN_WIDTH 5 +#define XAVBUF_CHBUF3_BURST_LEN_MASK 0X0000007C + +#define XAVBUF_CHBUF3_FLUSH_SHIFT 1 +#define XAVBUF_CHBUF3_FLUSH_WIDTH 1 +#define XAVBUF_CHBUF3_FLUSH_MASK 0X00000002 + +#define XAVBUF_CHBUF3_EN_SHIFT 0 +#define XAVBUF_CHBUF3_EN_WIDTH 1 +#define XAVBUF_CHBUF3_EN_MASK 0X00000001 + +/** + * * Register: XAVBUF_CHBUF4 + * */ +#define XAVBUF_CHBUF4 0X0000B020 + +#define XAVBUF_CHBUF4_BURST_LEN_SHIFT 2 +#define XAVBUF_CHBUF4_BURST_LEN_WIDTH 5 +#define XAVBUF_CHBUF4_BURST_LEN_MASK 0X0000007C + +#define XAVBUF_CHBUF4_FLUSH_SHIFT 1 +#define XAVBUF_CHBUF4_FLUSH_WIDTH 1 +#define XAVBUF_CHBUF4_FLUSH_MASK 0X00000002 + +#define XAVBUF_CHBUF4_EN_SHIFT 0 +#define XAVBUF_CHBUF4_EN_WIDTH 1 +#define XAVBUF_CHBUF4_EN_MASK 0X00000001 + +/** + * * Register: XAVBUF_CHBUF5 + * */ +#define XAVBUF_CHBUF5 0X0000B024 + +#define XAVBUF_CHBUF5_BURST_LEN_SHIFT 2 +#define XAVBUF_CHBUF5_BURST_LEN_WIDTH 5 +#define XAVBUF_CHBUF5_BURST_LEN_MASK 0X0000007C + +#define XAVBUF_CHBUF5_FLUSH_SHIFT 1 +#define XAVBUF_CHBUF5_FLUSH_WIDTH 1 +#define XAVBUF_CHBUF5_FLUSH_MASK 0X00000002 + +#define XAVBUF_CHBUF5_EN_SHIFT 0 +#define XAVBUF_CHBUF5_EN_WIDTH 1 +#define XAVBUF_CHBUF5_EN_MASK 0X00000001 + +/** + * * Register: XAVBUF_BUF_STC_CONTROL + * */ +#define XAVBUF_BUF_STC_CONTROL 0X0000B02C + +#define XAVBUF_BUF_STC_CONTROL_EN_SHIFT 0 +#define XAVBUF_BUF_STC_CONTROL_EN_WIDTH 1 +#define XAVBUF_BUF_STC_CONTROL_EN_MASK 0X00000001 + +/** + * * Register: XAVBUF_BUF_STC_INIT_VALUE0 + * */ +#define XAVBUF_BUF_STC_INIT_VALUE0 0X0000B030 + +#define XAVBUF_BUF_STC_INIT_VALUE0_INIT_VALUE0_SHIFT 0 +#define XAVBUF_BUF_STC_INIT_VALUE0_INIT_VALUE0_WIDTH 32 +#define XAVBUF_BUF_STC_INIT_VALUE0_INIT_VALUE0_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_BUF_STC_INIT_VALUE1 + * */ +#define XAVBUF_BUF_STC_INIT_VALUE1 0X0000B034 + +#define XAVBUF_BUF_STC_INIT_VALUE1_INIT_VALUE1_SHIFT 0 +#define XAVBUF_BUF_STC_INIT_VALUE1_INIT_VALUE1_WIDTH 10 +#define XAVBUF_BUF_STC_INIT_VALUE1_INIT_VALUE1_MASK 0X000003FF + +/** + * * Register: XAVBUF_BUF_STC_ADJ + * */ +#define XAVBUF_BUF_STC_ADJ 0X0000B038 + +#define XAVBUF_BUF_STC_ADJ_SIGN_SHIFT 31 +#define XAVBUF_BUF_STC_ADJ_SIGN_WIDTH 1 +#define XAVBUF_BUF_STC_ADJ_SIGN_MASK 0X80000000 + +#define XAVBUF_BUF_STC_ADJ_VALUE_SHIFT 0 +#define XAVBUF_BUF_STC_ADJ_VALUE_WIDTH 31 +#define XAVBUF_BUF_STC_ADJ_VALUE_MASK 0X7FFFFFFF + +/** + * * Register: XAVBUF_BUF_STC_VID_VSYNC_TS_REG0 + * */ +#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG0 0X0000B03C + +#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG0_VSYNC_TS0_SHIFT 0 +#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG0_VSYNC_TS0_WIDTH 32 +#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG0_VSYNC_TS0_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_BUF_STC_VID_VSYNC_TS_REG1 + * */ +#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG1 0X0000B040 + +#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG1_VSYNC_TS1_SHIFT 0 +#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG1_VSYNC_TS1_WIDTH 10 +#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG1_VSYNC_TS1_MASK 0X000003FF + +/** + * * Register: XAVBUF_BUF_STC_EXT_VSYNC_TS_REG0 + * */ +#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG0 0X0000B044 + +#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG0_EXT_VSYNC_TS0_SHIFT 0 +#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG0_EXT_VSYNC_TS0_WIDTH 32 +#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG0_EXT_VSYNC_TS0_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_BUF_STC_EXT_VSYNC_TS_REG1 + * */ +#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG1 0X0000B048 + +#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG1_EXT_VSYNC_TS1_SHIFT 0 +#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG1_EXT_VSYNC_TS1_WIDTH 10 +#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG1_EXT_VSYNC_TS1_MASK 0X000003FF + +/** + * * Register: XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG0 + * */ +#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG0 0X0000B04C + +#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG0_CUST_EVENT_TS0_SHIFT 0 +#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG0_CUST_EVENT_TS0_WIDTH 32 +#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG0_CUST_EVENT_TS0_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG1 + * */ +#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG1 0X0000B050 + +#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG1_CUST_EVENT_TS1_SHIFT 0 +#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG1_CUST_EVENT_TS1_WIDTH 10 +#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG1_CUST_EVENT_TS1_MASK 0X000003FF + +/** + * * Register: XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG0 + * */ +#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG0 0X0000B054 + +#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG0_CUST_EVENT2_TS0_SHIFT 0 +#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG0_CUST_EVENT2_TS0_WIDTH 32 +#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG0_CUST_EVENT2_TS0_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG1 + * */ +#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG1 0X0000B058 + +#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG1_CUST_EVENT2_TS1_SHIFT 0 +#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG1_CUST_EVENT2_TS1_WIDTH 10 +#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG1_CUST_EVENT2_TS1_MASK 0X000003FF + +/** + * * Register: XAVBUF_BUF_STC_SNAPSHOT0 + * */ +#define XAVBUF_BUF_STC_SNAPSHOT0 0X0000B060 + +#define XAVBUF_BUF_STC_SNAPSHOT0_STC0_SHIFT 0 +#define XAVBUF_BUF_STC_SNAPSHOT0_STC0_WIDTH 32 +#define XAVBUF_BUF_STC_SNAPSHOT0_STC0_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_BUF_STC_SNAPSHOT1 + * */ +#define XAVBUF_BUF_STC_SNAPSHOT1 0X0000B064 + +#define XAVBUF_BUF_STC_SNAPSHOT1_STC1_SHIFT 0 +#define XAVBUF_BUF_STC_SNAPSHOT1_STC1_WIDTH 10 +#define XAVBUF_BUF_STC_SNAPSHOT1_STC1_MASK 0X000003FF + +/** + * * Register: XAVBUF_BUF_OUTPUT_AUD_VID_SELECT + * */ +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT 0X0000B070 + +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM2_SEL_SHIFT 6 +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM2_SEL_WIDTH 1 +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM2_SEL_MASK 0X00000040 + +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM1_SEL_SHIFT 4 +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM1_SEL_WIDTH 2 +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM1_SEL_MASK 0X00000030 + +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM2_SEL_SHIFT 2 +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM2_SEL_WIDTH 2 +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM2_SEL_MASK 0X0000000C + +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM1_SEL_SHIFT 0 +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM1_SEL_WIDTH 2 +#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM1_SEL_MASK 0X00000003 + +/** + * * Register: XAVBUF_BUF_HCOUNT_VCOUNT_INT0 + * */ +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0 0X0000B074 + +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_HCOUNT_SHIFT 16 +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_HCOUNT_WIDTH 14 +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_HCOUNT_MASK 0X3FFF0000 + +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_VCOUNT_SHIFT 0 +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_VCOUNT_WIDTH 14 +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_VCOUNT_MASK 0X00003FFF + +/** + * * Register: XAVBUF_BUF_HCOUNT_VCOUNT_INT1 + * */ +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1 0X0000B078 + +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_HCOUNT_SHIFT 16 +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_HCOUNT_WIDTH 14 +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_HCOUNT_MASK 0X3FFF0000 + +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_VCOUNT_SHIFT 0 +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_VCOUNT_WIDTH 14 +#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_VCOUNT_MASK 0X00003FFF + +/** + * * Register: XAVBUF_BUF_DITHER_CFG + * */ +#define XAVBUF_BUF_DITHER_CFG 0X0000B07C + +#define XAVBUF_BUF_DITHER_CFG_TAP_MSB_SHIFT 10 +#define XAVBUF_BUF_DITHER_CFG_TAP_MSB_WIDTH 1 +#define XAVBUF_BUF_DITHER_CFG_TAP_MSB_MASK 0X00000400 + +#define XAVBUF_BUF_DITHER_CFG_DW_SEL_SHIFT 9 +#define XAVBUF_BUF_DITHER_CFG_DW_SEL_WIDTH 1 +#define XAVBUF_BUF_DITHER_CFG_DW_SEL_MASK 0X00000200 + +#define XAVBUF_BUF_DITHER_CFG_LD_SHIFT 8 +#define XAVBUF_BUF_DITHER_CFG_LD_WIDTH 1 +#define XAVBUF_BUF_DITHER_CFG_LD_MASK 0X00000100 + +#define XAVBUF_BUF_DITHER_CFG_TRUNC_PT_SHIFT 5 +#define XAVBUF_BUF_DITHER_CFG_TRUNC_PT_WIDTH 3 +#define XAVBUF_BUF_DITHER_CFG_TRUNC_PT_MASK 0X000000E0 + +#define XAVBUF_BUF_DITHER_CFG_MODE_SHIFT 3 +#define XAVBUF_BUF_DITHER_CFG_MODE_WIDTH 2 +#define XAVBUF_BUF_DITHER_CFG_MODE_MASK 0X00000018 + +#define XAVBUF_BUF_DITHER_CFG_SIZE_SHIFT 0 +#define XAVBUF_BUF_DITHER_CFG_SIZE_WIDTH 3 +#define XAVBUF_BUF_DITHER_CFG_SIZE_MASK 0X00000007 + +/** + * * Register: XAVBUF_DITHER_CFG_SEED0 + * */ +#define XAVBUF_DITHER_CFG_SEED0 0X0000B080 + +#define XAVBUF_DITHER_CFG_SEED0_COLR0_SHIFT 0 +#define XAVBUF_DITHER_CFG_SEED0_COLR0_WIDTH 16 +#define XAVBUF_DITHER_CFG_SEED0_COLR0_MASK 0X0000FFFF + +/** + * * Register: XAVBUF_DITHER_CFG_SEED1 + * */ +#define XAVBUF_DITHER_CFG_SEED1 0X0000B084 + +#define XAVBUF_DITHER_CFG_SEED1_COLR1_SHIFT 0 +#define XAVBUF_DITHER_CFG_SEED1_COLR1_WIDTH 16 +#define XAVBUF_DITHER_CFG_SEED1_COLR1_MASK 0X0000FFFF + +/** + * * Register: XAVBUF_DITHER_CFG_SEED2 + * */ +#define XAVBUF_DITHER_CFG_SEED2 0X0000B088 + +#define XAVBUF_DITHER_CFG_SEED2_COLR2_SHIFT 0 +#define XAVBUF_DITHER_CFG_SEED2_COLR2_WIDTH 16 +#define XAVBUF_DITHER_CFG_SEED2_COLR2_MASK 0X0000FFFF + +/** + * * Register: XAVBUF_DITHER_CFG_MAX + * */ +#define XAVBUF_DITHER_CFG_MAX 0X0000B08C + +#define XAVBUF_DITHER_CFG_MAX_COLR_MAX_SHIFT 0 +#define XAVBUF_DITHER_CFG_MAX_COLR_MAX_WIDTH 12 +#define XAVBUF_DITHER_CFG_MAX_COLR_MAX_MASK 0X00000FFF + +/** + * * Register: XAVBUF_DITHER_CFG_MIN + * */ +#define XAVBUF_DITHER_CFG_MIN 0X0000B090 + +#define XAVBUF_DITHER_CFG_MIN_COLR_MIN_SHIFT 0 +#define XAVBUF_DITHER_CFG_MIN_COLR_MIN_WIDTH 12 +#define XAVBUF_DITHER_CFG_MIN_COLR_MIN_MASK 0X00000FFF + +/** + * * Register: XAVBUF_PATTERN_GEN_SELECT + * */ +#define XAVBUF_PATTERN_GEN_SELECT 0X0000B100 + +#define XAVBUF_PATTERN_GEN_SELECT_OFFSET_EQ_SHIFT 8 +#define XAVBUF_PATTERN_GEN_SELECT_OFFSET_EQ_WIDTH 24 +#define XAVBUF_PATTERN_GEN_SELECT_OFFSET_EQ_MASK 0XFFFFFF00 + +#define XAVBUF_PATTERN_GEN_SELECT_AUD_RATE_SEL_SHIFT 0 +#define XAVBUF_PATTERN_GEN_SELECT_AUD_RATE_SEL_WIDTH 2 +#define XAVBUF_PATTERN_GEN_SELECT_AUD_RATE_SEL_MASK 0X00000003 + +/** + * * Register: XAVBUF_AUD_PATTERN_SELECT1 + * */ +#define XAVBUF_AUD_PATTERN_SELECT1 0X0000B104 + +#define XAVBUF_AUD_PATTERN_SELECT1_PATTERN_SHIFT 0 +#define XAVBUF_AUD_PATTERN_SELECT1_PATTERN_WIDTH 2 +#define XAVBUF_AUD_PATTERN_SELECT1_PATTERN_MASK 0X00000003 + +/** + * * Register: XAVBUF_AUD_PATTERN_SELECT2 + * */ +#define XAVBUF_AUD_PATTERN_SELECT2 0X0000B108 + +#define XAVBUF_AUD_PATTERN_SELECT2_PATTERN_SHIFT 0 +#define XAVBUF_AUD_PATTERN_SELECT2_PATTERN_WIDTH 2 +#define XAVBUF_AUD_PATTERN_SELECT2_PATTERN_MASK 0X00000003 + +/** + * * Register: XAVBUF_BUF_AUD_VID_CLK_SOURCE + * */ +#define XAVBUF_BUF_AUD_VID_CLK_SOURCE 0X0000B120 + +#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_TIMING_SRC_SHIFT 2 +#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_TIMING_SRC_WIDTH 1 +#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_TIMING_SRC_MASK 0X00000004 + +#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_AUD_CLK_SRC_SHIFT 1 +#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_AUD_CLK_SRC_WIDTH 1 +#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_AUD_CLK_SRC_MASK 0X00000002 + +#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_CLK_SRC_SHIFT 0 +#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_CLK_SRC_WIDTH 1 +#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_CLK_SRC_MASK 0X00000001 + +/** + * * Register: XAVBUF_BUF_SRST_REG + * */ +#define XAVBUF_BUF_SRST_REG 0X0000B124 + +#define XAVBUF_BUF_SRST_REG_VID_RST_SHIFT 1 +#define XAVBUF_BUF_SRST_REG_VID_RST_WIDTH 1 +#define XAVBUF_BUF_SRST_REG_VID_RST_MASK 0X00000002 + +/** + * * Register: XAVBUF_BUF_AUD_RDY_INTERVAL + * */ +#define XAVBUF_BUF_AUD_RDY_INTERVAL 0X0000B128 + +#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH1_INT_SHIFT 16 +#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH1_INT_WIDTH 16 +#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH1_INT_MASK 0XFFFF0000 + +#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH0_INT_SHIFT 0 +#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH0_INT_WIDTH 16 +#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH0_INT_MASK 0X0000FFFF + +/** + * * Register: XAVBUF_BUF_AUD_CH_CFG + * */ +#define XAVBUF_BUF_AUD_CH_CFG 0X0000B12C + +#define XAVBUF_BUF_AUD_CH_CFG_AUD_CH_ID_SHIFT 0 +#define XAVBUF_BUF_AUD_CH_CFG_AUD_CH_ID_WIDTH 2 +#define XAVBUF_BUF_AUD_CH_CFG_AUD_CH_ID_MASK 0X00000003 + +/** + * * Register: XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR + * */ +#define XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR 0X0000B200 + +#define XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR0_SHIFT 0 +#define XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR0_WIDTH 17 +#define XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR0_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_GRAPHICS_COMP1_SCALE_FACTOR + * */ +#define XAVBUF_BUF_GRAPHICS_COMP1_SCALE_FACTOR 0X0000B204 + +#define XAVBUF_BUF_GRAPHICS_COMP1_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR1_SHIFT 0 +#define XAVBUF_BUF_GRAPHICS_COMP1_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR1_WIDTH 17 +#define XAVBUF_BUF_GRAPHICS_COMP1_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR1_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_GRAPHICS_COMP2_SCALE_FACTOR + * */ +#define XAVBUF_BUF_GRAPHICS_COMP2_SCALE_FACTOR 0X0000B208 + +#define XAVBUF_BUF_GRAPHICS_COMP2_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR2_SHIFT 0 +#define XAVBUF_BUF_GRAPHICS_COMP2_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR2_WIDTH 17 +#define XAVBUF_BUF_GRAPHICS_COMP2_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR2_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_VID_COMP0_SCALE_FACTOR + * */ +#define XAVBUF_BUF_VID_COMP0_SCALE_FACTOR 0X0000B20C + +#define XAVBUF_BUF_VID_COMP0_SCALE_FACTOR_VID_SCA_FACT0_SHIFT 0 +#define XAVBUF_BUF_VID_COMP0_SCALE_FACTOR_VID_SCA_FACT0_WIDTH 17 +#define XAVBUF_BUF_VID_COMP0_SCALE_FACTOR_VID_SCA_FACT0_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_VID_COMP1_SCALE_FACTOR + * */ +#define XAVBUF_BUF_VID_COMP1_SCALE_FACTOR 0X0000B210 + +#define XAVBUF_BUF_VID_COMP1_SCALE_FACTOR_VID_SCA_FACT1_SHIFT 0 +#define XAVBUF_BUF_VID_COMP1_SCALE_FACTOR_VID_SCA_FACT1_WIDTH 17 +#define XAVBUF_BUF_VID_COMP1_SCALE_FACTOR_VID_SCA_FACT1_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_VID_COMP2_SCALE_FACTOR + * */ +#define XAVBUF_BUF_VID_COMP2_SCALE_FACTOR 0X0000B214 + +#define XAVBUF_BUF_VID_COMP2_SCALE_FACTOR_VID_SCA_FACT2_SHIFT 0 +#define XAVBUF_BUF_VID_COMP2_SCALE_FACTOR_VID_SCA_FACT2_WIDTH 17 +#define XAVBUF_BUF_VID_COMP2_SCALE_FACTOR_VID_SCA_FACT2_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_LIVE_VID_COMP0_SF + * */ +#define XAVBUF_BUF_LIVE_VID_COMP0_SF 0X0000B218 + +#define XAVBUF_BUF_LIVE_VID_COMP0_SF_LIV_VID_SCA_FACT0_SHIFT 0 +#define XAVBUF_BUF_LIVE_VID_COMP0_SF_LIV_VID_SCA_FACT0_WIDTH 17 +#define XAVBUF_BUF_LIVE_VID_COMP0_SF_LIV_VID_SCA_FACT0_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_LIVE_VID_COMP1_SF + * */ +#define XAVBUF_BUF_LIVE_VID_COMP1_SF 0X0000B21C + +#define XAVBUF_BUF_LIVE_VID_COMP1_SF_LIV_VID_SCA_FACT1_SHIFT 0 +#define XAVBUF_BUF_LIVE_VID_COMP1_SF_LIV_VID_SCA_FACT1_WIDTH 17 +#define XAVBUF_BUF_LIVE_VID_COMP1_SF_LIV_VID_SCA_FACT1_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_LIVE_VID_COMP2_SF + * */ +#define XAVBUF_BUF_LIVE_VID_COMP2_SF 0X0000B220 + +#define XAVBUF_BUF_LIVE_VID_COMP2_SF_LIV_VID_SCA_FACT2_SHIFT 0 +#define XAVBUF_BUF_LIVE_VID_COMP2_SF_LIV_VID_SCA_FACT2_WIDTH 17 +#define XAVBUF_BUF_LIVE_VID_COMP2_SF_LIV_VID_SCA_FACT2_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_LIVE_VID_CFG + * */ +#define XAVBUF_BUF_LIVE_VID_CFG 0X0000B224 + +#define XAVBUF_BUF_LIVE_VID_CFG_CB_FIRST_SHIFT 8 +#define XAVBUF_BUF_LIVE_VID_CFG_CB_FIRST_WIDTH 1 +#define XAVBUF_BUF_LIVE_VID_CFG_CB_FIRST_MASK 0X00000100 + +#define XAVBUF_BUF_LIVE_VID_CFG_FORMAT_SHIFT 4 +#define XAVBUF_BUF_LIVE_VID_CFG_FORMAT_WIDTH 2 +#define XAVBUF_BUF_LIVE_VID_CFG_FORMAT_MASK 0X00000030 + +#define XAVBUF_BUF_LIVE_VID_CFG_BPC_SHIFT 0 +#define XAVBUF_BUF_LIVE_VID_CFG_BPC_WIDTH 3 +#define XAVBUF_BUF_LIVE_VID_CFG_BPC_MASK 0X00000007 + +/** + * * Register: XAVBUF_BUF_LIVE_GFX_COMP0_SF + * */ +#define XAVBUF_BUF_LIVE_GFX_COMP0_SF 0X0000B228 + +#define XAVBUF_BUF_LIVE_GFX_COMP0_SF_LIV_VID_SCA_FACT0_SHIFT 0 +#define XAVBUF_BUF_LIVE_GFX_COMP0_SF_LIV_VID_SCA_FACT0_WIDTH 17 +#define XAVBUF_BUF_LIVE_GFX_COMP0_SF_LIV_VID_SCA_FACT0_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_LIVE_GFX_COMP1_SF + * */ +#define XAVBUF_BUF_LIVE_GFX_COMP1_SF 0X0000B22C + +#define XAVBUF_BUF_LIVE_GFX_COMP1_SF_LIV_VID_SCA_FACT1_SHIFT 0 +#define XAVBUF_BUF_LIVE_GFX_COMP1_SF_LIV_VID_SCA_FACT1_WIDTH 17 +#define XAVBUF_BUF_LIVE_GFX_COMP1_SF_LIV_VID_SCA_FACT1_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_LIVE_GFX_COMP2_SF + * */ +#define XAVBUF_BUF_LIVE_GFX_COMP2_SF 0X0000B230 + +#define XAVBUF_BUF_LIVE_GFX_COMP2_SF_LIV_VID_SCA_FACT2_SHIFT 0 +#define XAVBUF_BUF_LIVE_GFX_COMP2_SF_LIV_VID_SCA_FACT2_WIDTH 17 +#define XAVBUF_BUF_LIVE_GFX_COMP2_SF_LIV_VID_SCA_FACT2_MASK 0X0001FFFF + +/** + * * Register: XAVBUF_BUF_LIVE_GFX_CFG + * */ +#define XAVBUF_BUF_LIVE_GFX_CFG 0X0000B234 + +#define XAVBUF_BUF_LIVE_GFX_CFG_CB_FIRST_SHIFT 8 +#define XAVBUF_BUF_LIVE_GFX_CFG_CB_FIRST_WIDTH 1 +#define XAVBUF_BUF_LIVE_GFX_CFG_CB_FIRST_MASK 0X00000100 + +#define XAVBUF_BUF_LIVE_GFX_CFG_FORMAT_SHIFT 4 +#define XAVBUF_BUF_LIVE_GFX_CFG_FORMAT_WIDTH 2 +#define XAVBUF_BUF_LIVE_GFX_CFG_FORMAT_MASK 0X00000030 + +#define XAVBUF_BUF_LIVE_GFX_CFG_BPC_SHIFT 0 +#define XAVBUF_BUF_LIVE_GFX_CFG_BPC_WIDTH 3 +#define XAVBUF_BUF_LIVE_GFX_CFG_BPC_MASK 0X00000007 + +/** + * * Register: XAVBUF_AUD_MIXER_VOLUME_CONTROL + * */ +#define XAVBUF_AUD_MIXER_VOLUME_CONTROL 0X0000C000 + +#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH1_SHIFT 16 +#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH1_WIDTH 16 +#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH1_MASK 0XFFFF0000 + +#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH0_SHIFT 0 +#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH0_WIDTH 16 +#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH0_MASK 0X0000FFFF + +/** + * * Register: XAVBUF_AUD_MIXER_META_DATA + * */ +#define XAVBUF_AUD_MIXER_META_DATA 0X0000C004 + +#define XAVBUF_AUD_MIXER_META_DATA_AUD_META_DATA_SEL_SHIFT 0 +#define XAVBUF_AUD_MIXER_META_DATA_AUD_META_DATA_SEL_WIDTH 1 +#define XAVBUF_AUD_MIXER_META_DATA_AUD_META_DATA_SEL_MASK 0X00000001 + +/** + * * Register: XAVBUF_AUD_CH_STATUS_REG0 + * */ +#define XAVBUF_AUD_CH_STATUS_REG0 0X0000C008 + +#define XAVBUF_AUD_CH_STATUS_REG0_STATUS0_SHIFT 0 +#define XAVBUF_AUD_CH_STATUS_REG0_STATUS0_WIDTH 32 +#define XAVBUF_AUD_CH_STATUS_REG0_STATUS0_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_STATUS_REG1 + * */ +#define XAVBUF_AUD_CH_STATUS_REG1 0X0000C00C + +#define XAVBUF_AUD_CH_STATUS_REG1_STATUS1_SHIFT 0 +#define XAVBUF_AUD_CH_STATUS_REG1_STATUS1_WIDTH 32 +#define XAVBUF_AUD_CH_STATUS_REG1_STATUS1_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_STATUS_REG2 + * */ +#define XAVBUF_AUD_CH_STATUS_REG2 0X0000C010 + +#define XAVBUF_AUD_CH_STATUS_REG2_STATUS2_SHIFT 0 +#define XAVBUF_AUD_CH_STATUS_REG2_STATUS2_WIDTH 32 +#define XAVBUF_AUD_CH_STATUS_REG2_STATUS2_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_STATUS_REG3 + * */ +#define XAVBUF_AUD_CH_STATUS_REG3 0X0000C014 + +#define XAVBUF_AUD_CH_STATUS_REG3_STATUS3_SHIFT 0 +#define XAVBUF_AUD_CH_STATUS_REG3_STATUS3_WIDTH 32 +#define XAVBUF_AUD_CH_STATUS_REG3_STATUS3_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_STATUS_REG4 + * */ +#define XAVBUF_AUD_CH_STATUS_REG4 0X0000C018 + +#define XAVBUF_AUD_CH_STATUS_REG4_STATUS4_SHIFT 0 +#define XAVBUF_AUD_CH_STATUS_REG4_STATUS4_WIDTH 32 +#define XAVBUF_AUD_CH_STATUS_REG4_STATUS4_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_STATUS_REG5 + * */ +#define XAVBUF_AUD_CH_STATUS_REG5 0X0000C01C + +#define XAVBUF_AUD_CH_STATUS_REG5_STATUS5_SHIFT 0 +#define XAVBUF_AUD_CH_STATUS_REG5_STATUS5_WIDTH 32 +#define XAVBUF_AUD_CH_STATUS_REG5_STATUS5_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_A_DATA_REG0 + * */ +#define XAVBUF_AUD_CH_A_DATA_REG0 0X0000C020 + +#define XAVBUF_AUD_CH_A_DATA_REG0_USER_DATA0_SHIFT 0 +#define XAVBUF_AUD_CH_A_DATA_REG0_USER_DATA0_WIDTH 32 +#define XAVBUF_AUD_CH_A_DATA_REG0_USER_DATA0_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_A_DATA_REG1 + * */ +#define XAVBUF_AUD_CH_A_DATA_REG1 0X0000C024 + +#define XAVBUF_AUD_CH_A_DATA_REG1_USER_DATA1_SHIFT 0 +#define XAVBUF_AUD_CH_A_DATA_REG1_USER_DATA1_WIDTH 32 +#define XAVBUF_AUD_CH_A_DATA_REG1_USER_DATA1_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_A_DATA_REG2 + * */ +#define XAVBUF_AUD_CH_A_DATA_REG2 0X0000C028 + +#define XAVBUF_AUD_CH_A_DATA_REG2_USER_DATA2_SHIFT 0 +#define XAVBUF_AUD_CH_A_DATA_REG2_USER_DATA2_WIDTH 32 +#define XAVBUF_AUD_CH_A_DATA_REG2_USER_DATA2_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_A_DATA_REG3 + * */ +#define XAVBUF_AUD_CH_A_DATA_REG3 0X0000C02C + +#define XAVBUF_AUD_CH_A_DATA_REG3_USER_DATA3_SHIFT 0 +#define XAVBUF_AUD_CH_A_DATA_REG3_USER_DATA3_WIDTH 32 +#define XAVBUF_AUD_CH_A_DATA_REG3_USER_DATA3_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_A_DATA_REG4 + * */ +#define XAVBUF_AUD_CH_A_DATA_REG4 0X0000C030 + +#define XAVBUF_AUD_CH_A_DATA_REG4_USER_DATA4_SHIFT 0 +#define XAVBUF_AUD_CH_A_DATA_REG4_USER_DATA4_WIDTH 32 +#define XAVBUF_AUD_CH_A_DATA_REG4_USER_DATA4_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_A_DATA_REG5 + * */ +#define XAVBUF_AUD_CH_A_DATA_REG5 0X0000C034 + +#define XAVBUF_AUD_CH_A_DATA_REG5_USER_DATA5_SHIFT 0 +#define XAVBUF_AUD_CH_A_DATA_REG5_USER_DATA5_WIDTH 32 +#define XAVBUF_AUD_CH_A_DATA_REG5_USER_DATA5_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_B_DATA_REG0 + * */ +#define XAVBUF_AUD_CH_B_DATA_REG0 0X0000C038 + +#define XAVBUF_AUD_CH_B_DATA_REG0_USER_DATA0_SHIFT 0 +#define XAVBUF_AUD_CH_B_DATA_REG0_USER_DATA0_WIDTH 32 +#define XAVBUF_AUD_CH_B_DATA_REG0_USER_DATA0_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_B_DATA_REG1 + * */ +#define XAVBUF_AUD_CH_B_DATA_REG1 0X0000C03C + +#define XAVBUF_AUD_CH_B_DATA_REG1_USER_DATA1_SHIFT 0 +#define XAVBUF_AUD_CH_B_DATA_REG1_USER_DATA1_WIDTH 32 +#define XAVBUF_AUD_CH_B_DATA_REG1_USER_DATA1_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_B_DATA_REG2 + * */ +#define XAVBUF_AUD_CH_B_DATA_REG2 0X0000C040 + +#define XAVBUF_AUD_CH_B_DATA_REG2_USER_DATA2_SHIFT 0 +#define XAVBUF_AUD_CH_B_DATA_REG2_USER_DATA2_WIDTH 32 +#define XAVBUF_AUD_CH_B_DATA_REG2_USER_DATA2_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_B_DATA_REG3 + * */ +#define XAVBUF_AUD_CH_B_DATA_REG3 0X0000C044 + +#define XAVBUF_AUD_CH_B_DATA_REG3_USER_DATA3_SHIFT 0 +#define XAVBUF_AUD_CH_B_DATA_REG3_USER_DATA3_WIDTH 32 +#define XAVBUF_AUD_CH_B_DATA_REG3_USER_DATA3_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_B_DATA_REG4 + * */ +#define XAVBUF_AUD_CH_B_DATA_REG4 0X0000C048 + +#define XAVBUF_AUD_CH_B_DATA_REG4_USER_DATA4_SHIFT 0 +#define XAVBUF_AUD_CH_B_DATA_REG4_USER_DATA4_WIDTH 32 +#define XAVBUF_AUD_CH_B_DATA_REG4_USER_DATA4_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_CH_B_DATA_REG5 + * */ +#define XAVBUF_AUD_CH_B_DATA_REG5 0X0000C04C + +#define XAVBUF_AUD_CH_B_DATA_REG5_USER_DATA5_SHIFT 0 +#define XAVBUF_AUD_CH_B_DATA_REG5_USER_DATA5_WIDTH 32 +#define XAVBUF_AUD_CH_B_DATA_REG5_USER_DATA5_MASK 0XFFFFFFFF + +/** + * * Register: XAVBUF_AUD_SOFT_RST + * */ +#define XAVBUF_AUD_SOFT_RST 0X0000CC00 + +#define XAVBUF_AUD_SOFT_RST_EXTRA_BS_CONTROL_SHIFT 2 +#define XAVBUF_AUD_SOFT_RST_EXTRA_BS_CONTROL_WIDTH 1 +#define XAVBUF_AUD_SOFT_RST_EXTRA_BS_CONTROL_MASK 0X00000004 + +#define XAVBUF_AUD_SOFT_RST_LINE_RST_DISABLE_SHIFT 1 +#define XAVBUF_AUD_SOFT_RST_LINE_RST_DISABLE_WIDTH 1 +#define XAVBUF_AUD_SOFT_RST_LINE_RST_DISABLE_MASK 0X00000002 + +#define XAVBUF_AUD_SOFT_RST_AUD_SRST_SHIFT 0 +#define XAVBUF_AUD_SOFT_RST_AUD_SRST_WIDTH 1 +#define XAVBUF_AUD_SOFT_RST_AUD_SRST_MASK 0X00000001 + +/** + * * Register: XAVBUF_PATGEN_CRC_R + * */ +#define XAVBUF_PATGEN_CRC_R 0X0000CC10 + +#define XAVBUF_PATGEN_CRC_R_CRC_R_SHIFT 0 +#define XAVBUF_PATGEN_CRC_R_CRC_R_WIDTH 16 +#define XAVBUF_PATGEN_CRC_R_CRC_R_MASK 0X0000FFFF + +/** + * * Register: XAVBUF_PATGEN_CRC_G + * */ +#define XAVBUF_PATGEN_CRC_G 0X0000CC14 + +#define XAVBUF_PATGEN_CRC_G_CRC_G_SHIFT 0 +#define XAVBUF_PATGEN_CRC_G_CRC_G_WIDTH 16 +#define XAVBUF_PATGEN_CRC_G_CRC_G_MASK 0X0000FFFF + +/** + * * Register: XAVBUF_PATGEN_CRC_B + * */ +#define XAVBUF_PATGEN_CRC_B 0X0000CC18 + +#define XAVBUF_PATGEN_CRC_B_CRC_B_SHIFT 0 +#define XAVBUF_PATGEN_CRC_B_CRC_B_WIDTH 16 +#define XAVBUF_PATGEN_CRC_B_CRC_B_MASK 0X0000FFFF + +#define XAVBUF_NUM_SUPPORTED 52 + +#define XAVBUF_BUF_4BIT_SF 0x11111 +#define XAVBUF_BUF_5BIT_SF 0x10842 +#define XAVBUF_BUF_6BIT_SF 0x10410 +#define XAVBUF_BUF_8BIT_SF 0x10101 +#define XAVBUF_BUF_10BIT_SF 0x10040 +#define XAVBUF_BUF_12BIT_SF 0x10000 + +#define XAVBUF_BUF_6BPC 0x000 +#define XAVBUF_BUF_8BPC 0x001 +#define XAVBUF_BUF_10BPC 0x010 +#define XAVBUF_BUF_12BPC 0x011 + +#define XAVBUF_CHBUF_V_BURST_LEN 0xF +#define XAVBUF_CHBUF_A_BURST_LEN 0x3 + +#define XAVBUF_PL_CLK 0x0 +#define XAVBUF_PS_CLK 0x1 + +#define XAVBUF_NUM_SUPPORTED_NLVID 25 +#define XAVBUF_NUM_SUPPORTED_NLGFX 14 +#define XAVBUF_NUM_SUPPORTED_LIVE 14 +#define XAVBUF_NUM_OUTPUT_FORMATS 14 + +/** + * Address mapping for PLL (CRF and CRL) + */ + +/* Base Address for CLOCK in FPD. */ +#define XAVBUF_CLK_FPD_BASEADDR 0XFD1A0000 + +/* Base Address for CLOCK in LPD. */ +#define XAVBUF_CLK_LPD_BASEADDR 0XFF5E0000 + +/** + * The following constants define values to manipulate + * the bits of the VPLL control register. + */ +#define XAVBUF_PLL_CTRL 0X00000020 + +#define XAVBUF_PLL_CTRL_POST_SRC_SHIFT 24 +#define XAVBUF_PLL_CTRL_POST_SRC_WIDTH 3 +#define XAVBUF_PLL_CTRL_POST_SRC_MASK 0X07000000 + +#define XAVBUF_PLL_CTRL_PRE_SRC_SHIFT 20 +#define XAVBUF_VPLL_CTRL_PRE_SRC_WIDTH 3 +#define XAVBUF_VPLL_CTRL_PRE_SRC_MASK 0X00700000 + +#define XAVBUF_PLL_CTRL_CLKOUTDIV_SHIFT 17 +#define XAVBUF_PLL_CTRL_CLKOUTDIV_WIDTH 1 +#define XAVBUF_PLL_CTRL_CLKOUTDIV_MASK 0X00020000 + +#define XAVBUF_PLL_CTRL_DIV2_SHIFT 16 +#define XAVBUF_PLL_CTRL_DIV2_WIDTH 1 +#define XAVBUF_PLL_CTRL_DIV2_MASK 0X00010000 + +#define XAVBUF_PLL_CTRL_FBDIV_SHIFT 8 +#define XAVBUF_PLL_CTRL_FBDIV_WIDTH 7 +#define XAVBUF_PLL_CTRL_FBDIV_MASK 0X00007F00 + +#define XAVBUF_PLL_CTRL_BYPASS_SHIFT 3 +#define XAVBUF_PLL_CTRL_BYPASS_WIDTH 1 +#define XAVBUF_PLL_CTRL_BYPASS_MASK 0X00000008 + +#define XAVBUF_PLL_CTRL_RESET_SHIFT 0 +#define XAVBUF_PLL_CTRL_RESET_WIDTH 1 +#define XAVBUF_PLL_CTRL_RESET_MASK 0X00000001 + +/** + * The following constants define values to manipulate + * the bits of the PLL config register. + */ +#define XAVBUF_PLL_CFG 0X00000024 + +#define XAVBUF_PLL_CFG_LOCK_DLY_SHIFT 25 +#define XAVBUF_PLL_CFG_LOCK_DLY_WIDTH 7 +#define XAVBUF_PLL_CFG_LOCK_DLY_MASK 0XFE000000 + +#define XAVBUF_PLL_CFG_LOCK_CNT_SHIFT 13 +#define XAVBUF_PLL_CFG_LOCK_CNT_WIDTH 10 +#define XAVBUF_PLL_CFG_LOCK_CNT_MASK 0X007FE000 + +#define XAVBUF_PLL_CFG_LFHF_SHIFT 10 +#define XAVBUF_PLL_CFG_LFHF_WIDTH 2 +#define XAVBUF_PLL_CFG_LFHF_MASK 0X00000C00 + +#define XAVBUF_PLL_CFG_CP_SHIFT 5 +#define XAVBUF_PLL_CFG_CP_WIDTH 4 +#define XAVBUF_PLL_CFG_CP_MASK 0X000001E0 + +#define XAVBUF_PLL_CFG_RES_SHIFT 0 +#define XAVBUF_PLL_CFG_RES_WIDTH 4 +#define XAVBUF_PLL_CFG_RES_MASK 0X0000000F + +/** + * The following constants define values to manipulate + * the bits of the VPLL fractional config register. + */ +#define XAVBUF_PLL_FRAC_CFG 0X00000028 + +#define XAVBUF_PLL_FRAC_CFG_ENABLED_SHIFT 31 +#define XAVBUF_PLL_FRAC_CFG_ENABLED_WIDTH 1 +#define XAVBUF_PLL_FRAC_CFG_ENABLED_MASK 0X80000000 + +#define XAVBUF_PLL_FRAC_CFG_SEED_SHIFT 22 +#define XAVBUF_PLL_FRAC_CFG_SEED_WIDTH 3 +#define XAVBUF_PLL_FRAC_CFG_SEED_MASK 0X01C00000 + +#define XAVBUF_PLL_FRAC_CFG_ALGRTHM_SHIFT 19 +#define XAVBUF_PLL_FRAC_CFG_ALGRTHM_WIDTH 1 +#define XAVBUF_PLL_FRAC_CFG_ALGRTHM_MASK 0X00080000 + +#define XAVBUF_PLL_FRAC_CFG_ORDER_SHIFT 18 +#define XAVBUF_PLL_FRAC_CFG_ORDER_WIDTH 1 +#define XAVBUF_PLL_FRAC_CFG_ORDER_MASK 0X00040000 + +#define XAVBUF_PLL_FRAC_CFG_DATA_SHIFT 0 +#define XAVBUF_PLL_FRAC_CFG_DATA_WIDTH 16 +#define XAVBUF_PLL_FRAC_CFG_DATA_MASK 0X0000FFFF + +/** + * The following constants define values to manipulate + * the bits of the PLL STATUS register. + */ +#define XAVBUF_PLL_STATUS 0X00000044 + +#define XAVBUF_PLL_STATUS_VPLL_STABLE_SHIFT 5 +#define XAVBUF_PLL_STATUS_VPLL_STABLE_WIDTH 1 +#define XAVBUF_PLL_STATUS_VPLL_STABLE_MASK 0X00000020 + +#define XAVBUF_PLL_STATUS_DPLL_STABLE_SHIFT 4 +#define XAVBUF_PLL_STATUS_DPLL_STABLE_WIDTH 1 +#define XAVBUF_PLL_STATUS_DPLL_STABLE_MASK 0X00000010 + +#define XAVBUF_PLL_STATUS_APLL_STABLE_SHIFT 3 +#define XAVBUF_PLL_STATUS_APLL_STABLE_WIDTH 1 +#define XAVBUF_PLL_STATUS_APLL_STABLE_MASK 0X00000008 + +#define XAVBUF_PLL_STATUS_VPLL_LOCK_SHIFT 2 +#define XAVBUF_PLL_STATUS_VPLL_LOCK_WIDTH 1 +#define XAVBUF_PLL_STATUS_VPLL_LOCK_MASK 0X00000004 + +#define XAVBUF_PLL_STATUS_DPLL_LOCK_SHIFT 1 +#define XAVBUF_PLL_STATUS_DPLL_LOCK_WIDTH 1 +#define XAVBUF_PLL_STATUS_DPLL_LOCK_MASK 0X00000002 + +#define XAVBUF_PLL_STATUS_APLL_LOCK_SHIFT 0 +#define XAVBUF_PLL_STATUS_APLL_LOCK_WIDTH 1 +#define XAVBUF_PLL_STATUS_APLL_LOCK_MASK 0X00000001 + +/** + * The following constants define values to manipulate + * the bits of the VIDEO reference control register. + */ +#define XAVBUF_VIDEO_REF_CTRL 0X00000070 + +#define XAVBUF_VIDEO_REF_CTRL_CLKACT_SHIFT 24 +#define XAVBUF_VIDEO_REF_CTRL_CLKACT_WIDTH 1 +#define XAVBUF_VIDEO_REF_CTRL_CLKACT_MASK 0X01000000 + +#define XAVBUF_VIDEO_REF_CTRL_DIVISOR1_SHIFT 16 +#define XAVBUF_VIDEO_REF_CTRL_DIVISOR1_WIDTH 6 +#define XAVBUF_VIDEO_REF_CTRL_DIVISOR1_MASK 0X003F0000 + +#define XAVBUF_VIDEO_REF_CTRL_DIVISOR0_SHIFT 8 +#define XAVBUF_VIDEO_REF_CTRL_DIVISOR0_WIDTH 6 +#define XAVBUF_VIDEO_REF_CTRL_DIVISOR0_MASK 0X00003F00 + +#define XAVBUF_VIDEO_REF_CTRL_SRCSEL_SHIFT 0 +#define XAVBUF_VIDEO_REF_CTRL_SRCSEL_WIDTH 3 +#define XAVBUF_VIDEO_REF_CTRL_SRCSEL_MASK 0X00000007 + +/** + * The following constants define values to manipulate + * the bits of the AUDIO reference control register. + */ +#define XAVBUF_AUDIO_REF_CTRL 0X00000074 + +#define XAVBUF_AUDIO_REF_CTRL_CLKACT_SHIFT 24 +#define XAVBUF_AUDIO_REF_CTRL_CLKACT_WIDTH 1 +#define XAVBUF_AUDIO_REF_CTRL_CLKACT_MASK 0X01000000 + +#define XAVBUF_AUDIO_REF_CTRL_DIVISOR1_SHIFT 16 +#define XAVBUF_AUDIO_REF_CTRL_DIVISOR1_WIDTH 6 +#define XAVBUF_AUDIO_REF_CTRL_DIVISOR1_MASK 0X003F0000 + +#define XAVBUF_AUDIO_REF_CTRL_DIVISOR0_SHIFT 8 +#define XAVBUF_AUDIO_REF_CTRL_DIVISOR0_WIDTH 6 +#define XAVBUF_AUDIO_REF_CTRL_DIVISOR0_MASK 0X00003F00 + +#define XAVBUF_AUDIO_REF_CTRL_SRCSEL_SHIFT 0 +#define XAVBUF_AUDIO_REF_CTRL_SRCSEL_WIDTH 3 +#define XAVBUF_AUDIO_REF_CTRL_SRCSEL_MASK 0X00000007 + +/** + * The following constants define values to manipulate + * the bits of the Domain Switch register. + * For eg. FPD to LPD. + */ +#define XAVBUF_DOMAIN_SWITCH_CTRL 0X00000044 + +#define XAVBUF_DOMAIN_SWITCH_DIVISOR0_SHIFT 8 +#define XAVBUF_DOMAIN_SWITCH_DIVISOR0_WIDTH 6 +#define XAVBUF_DOMAIN_SWITCH_DIVISOR0_MASK 0X00003F00 + +/** + * The following constants define values to Reference + * clock. + */ +#define XAVBUF_Pss_Ref_Clk 0 +#define XAVBUF_Video_Clk 4 +#define XAVBUF_Pss_alt_Ref_Clk 5 +#define XAVBUF_Aux_Ref_clk 6 +#define XAVBUF_Gt_Crx_Ref_Clk 7 + +/** + * The following constants define values to manipulate + * the bits of any register. + */ +#define XAVBUF_ENABLE_BIT 1 +#define XAVBUF_DISABLE_BIT 0 + +/** + * The following constants define values available + * PLL source to Audio and Video. + */ +#define XAVBUF_VPLL_SRC_SEL 0 +#define XAVBUF_DPLL_SRC_SEL 2 +#define XAVBUF_RPLL_TO_FPD_SRC_SEL 3 + +/******************* Macros (Inline Functions) Definitions ********************/ + +/** @name Register access macro definitions. + * @{ + */ +#define XAVBuf_In32 Xil_In32 +#define XAVBuf_Out32 Xil_Out32 +/* @} */ + +/******************************************************************************/ +/** + * This is a low-level function that reads from the specified register. + * + * @param BaseAddress is the base address of the device. + * @param RegOffset is the register offset to be read from. + * + * @return The 32-bit value of the specified register. + * + * @note C-style signature: + * u32 XAVBuf_ReadReg(u32 BaseAddress, u32 RegOffset) + * +*******************************************************************************/ +#define XAVBuf_ReadReg(BaseAddress, RegOffset) \ + XAVBuf_In32((BaseAddress) + (RegOffset)) + +/******************************************************************************/ +/** + * This is a low-level function that writes to the specified register. + * + * @param BaseAddress is the base address of the device. + * @param RegOffset is the register offset to write to. + * @param Data is the 32-bit data to write to the specified register. + * + * @return None. + * + * @note C-style signature: + * void XAVBuf_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data) + * +*******************************************************************************/ +#define XAVBuf_WriteReg(BaseAddress, RegOffset, Data) \ + XAVBuf_Out32((BaseAddress) + (RegOffset), (Data)) + + +#ifdef __cplusplus +} +#endif + + +#endif //XAVBUF_H_ diff --git a/src/Xilinx/include/xaxipmon.h b/src/Xilinx/include/xaxipmon.h new file mode 100644 index 0000000..ea347e0 --- /dev/null +++ b/src/Xilinx/include/xaxipmon.h @@ -0,0 +1,946 @@ +/****************************************************************************** +* +* Copyright (C) 2007 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/****************************************************************************/ +/** +* +* @file xaxipmon.h +* @addtogroup axipmon_v6_6 +* @{ +* @details +* +* The XAxiPmon driver supports the Xilinx AXI Performance Monitor device. +* +* The AXI Performance Monitor device provides following features: +* +* Configurable number of Metric Counters and Incrementers +* Computes performance metrics for Agents connected to +* monitor slots (Up to 8 slots) +* +* The following Metrics can be computed: +* +* Metrics computed for an AXI4 MM agent: +* Write Request Count: Total number of write requests by/to the agent. +* Read Request Count: Total number of read requests given by/to the +* agent. +* Read Latency: It is defined as the time from the start of read address +* transaction to the beginning of the read data service. +* Write Latency: It is defined as the period needed a master completes +* write data transaction, i.e. from write address +* transaction to write response from slave. +* Write Byte Count: Total number of bytes written by/to the agent. +* This metric is helpful when calculating the +* throughput of the system. +* Read Byte Count: Total number of bytes read from/by the agent. +* Average Write Latency: Average write latency seen by the agent. +* It can be derived from total write latency +* and the write request count. +* Average Read Latency: Average read latency seen by the agent. It can be +* derived from total read latency and the read +* request count. +* Master Write Idle Cycle Count: Number of idle cycles caused by the +* masters during write transactions to +* the slave. +* Slave Write Idle Cycle Count: Number of idle cycles caused by this slave +* during write transactions to the slave. +* Master Read Idle Cycle Count: Number of idle cycles caused by the +* master during read transactions to the +* slave. +* Slave Read Idle Cycle Count: Number of idle cycles caused by this slave +* during read transactions to the slave. +* +* Metrics computed for an AXI4-Stream agent: +* +* Transfer Cycle Count: Total number of writes by/to the agent. +* Data Byte Count: Total number of data bytes written by/to the agent. +* This metric helps in calculating the throughput +* of the system. +* Position Byte Count: Total number of position bytes transferred. +* Null Byte Count: Total number of null bytes transferred. +* Packet Count: Total number of packets transferred. +* +* There are three modes : Advanced, Profile and Trace. +* - Advanced mode has 10 Mertic Counters, Sampled Metric Counters, Incrementors +* and Sampled Incrementors. +* - Profile mode has only 47 Metric Counters and Sampled Metric Counters. +* - Trace mode has no Counters. +* User should refer to the hardware device specification for detailed +* information about the device. +* +* This header file contains the prototypes of driver functions that can +* be used to access the AXI Performance Monitor device. +* +* +* Initialization and Configuration +* +* The device driver enables higher layer software (e.g., an application) to +* communicate to the AXI Performance Monitor device. +* +* XAxiPmon_CfgInitialize() API is used to initialize the AXI Performance Monitor +* device. The user needs to first call the XAxiPmon_LookupConfig() API which +* returns the Configuration structure pointer which is passed as a parameter to +* the XAxiPmon_CfgInitialize() API. +* +* +* Interrupts +* +* The AXI Performance Monitor does not support Interrupts +* +* +* Virtual Memory +* +* This driver supports Virtual Memory. The RTOS is responsible for calculating +* the correct device base address in Virtual Memory space. +* +* +* Threads +* +* This driver is not thread safe. Any needs for threads or thread mutual +* exclusion must be satisfied by the layer above this driver. +* +* Asserts +* +* Asserts are used within all Xilinx drivers to enforce constraints on argument +* values. Asserts can be turned off on a system-wide basis by defining, at +* compile time, the NDEBUG identifier. By default, asserts are turned on and it +* is recommended that users leave asserts on during development. +* +* +* Building the driver +* +* The XAxiPmon driver is composed of several source files. This allows the user +* to build and link only those parts of the driver that are necessary. +* +* Limitations of the driver +* +* +*

+* +* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.00a bss    02/27/12 First release
+* 2.00a bss    06/23/12 Updated to support v2_00a version of IP.
+* 3.00a bss    09/03/12 To support v2_01_a version of IP:
+*			Deleted XAxiPmon_SetAgent, XAxiPmon_GetAgent APIs and
+*			added XAPM_FLAG_EVENT, XAPM_FLAG_EVNTSTAR,
+*			XAPM_FLAG_EVNTSTOP.
+*			Deleted XAxiPmon_SetAgent, XAxiPmon_GetAgent APIs and
+*			modified XAxiPmon_SetMetrics, XAxiPmon_GetMetrics APIs
+*			in xaxipmon.c
+*			Deleted XAPM_AGENT_OFFSET Macro in xaxipmon_hw.h
+* 3.01a bss    10/25/12 To support new version of IP:
+*			Added XAPM_MCXLOGEN_OFFSET macros in xaxipmon_hw.h.
+*			Added XAxiPmon_SetMetricCounterCutOff,
+*			XAxiPmon_GetMetricCounterCutOff,
+*			XAxiPmon_EnableExternalTrigger and
+*			XAxiPmon_DisableExternalTrigger APIs in xaxipmon.c
+*			Modified XAxiPmon_SetMetrics and XAxiPmon_GetMetrics
+*			(CR #683746) in xaxipmon.c
+*			Added XAxiPmon_EnableEventLog,
+*			XAxiPmon_DisableMetricsCounter,
+*			XAxiPmon_EnableMetricsCounter APIs in xaxipmon.c to
+*			replace macros in this file.
+*			Added XAPM_FLAG_XXX macros.
+*			Added XAxiPmon_StartCounters and XAxiPmon_StopCounters
+*			APIs (CR #683799).
+*			Added XAxiPmon_StartEventLog and XAxiPmon_StopEventLog
+*			APIs (CR #683801).
+*			Added XAxiPmon_GetMetricName API (CR #683803).
+*			Deleted XAxiPmon_SetAgent, XAxiPmon_GetAgent
+*			declarations (CR #677337)
+* 4.00a bss    01/17/13 To support new version of IP:
+*			Added XAPM_METRIC_SET_12 to XAPM_METRIC_SET_15 macros.
+*			Added XAxiPmon_SetLogEnableRanges,
+*	  		XAxiPmon_GetLogEnableRanges,
+*			XAxiPmon_EnableMetricCounterTrigger,
+*			XAxiPmon_DisableMetricCounterTrigger,
+*			XAxiPmon_EnableEventLogTrigger,
+*			XAxiPmon_DisableEventLogTrigger,
+*			XAxiPmon_SetWriteLatencyId,
+*			XAxiPmon_SetReadLatencyId,
+*			XAxiPmon_GetWriteLatencyId,
+*			XAxiPmon_GetReadLatencyId APIs and removed
+*			XAxiPmon_SetMetricCounterCutOff,
+*			XAxiPmon_GetMetricCounterCutOff,
+*			XAxiPmon_EnableExternalTrigger and
+*			XAxiPmon_DisableExternalTrigger APIs in xaxipmon.c
+*			Added XAPM_LATENCYID_OFFSET,
+*			XAPM_CR_EVTLOG_EXTTRIGGER_MASK,
+*			XAPM_LATENCYID_RID_MASK and XAPM_LATENCYID_WID_MASK in
+*			xaxipmon_hw.h
+* 5.00a bss   08/26/13  To support new version of IP:
+*			XAxiPmon_SampleMetrics Macro.
+*			Modified XAxiPmon_CfgInitialize, Assert functions
+*			Added XAxiPmon_GetMetricCounter,
+*			XAxiPmon_SetSampleInterval, XAxiPmon_GetSampleInterval,
+*			XAxiPmon_SetWrLatencyStart, XAxiPmon_SetWrLatencyEnd,
+*			XAxiPmon_SetRdLatencyStart, XAxiPmon_SetRdLatencyEnd,
+*			XAxiPmon_GetWrLatencyStart, XAxiPmon_GetWrLatencyEnd,
+*			XAxiPmon_GetRdLatencyStart, XAxiPmon_GetRdLatencyEnd,
+*			XAxiPmon_SetWriteIdMask, XAxiPmon_SetReadIdMask,
+*			XAxiPmon_GetWriteIdMask and XAxiPmon_GetReadIdMask APIs
+*			Renamed :
+*			XAxiPmon_SetWriteLatencyId to
+*			XAxiPmon_SetWriteId, XAxiPmon_SetReadLatencyId to
+*			XAxiPmon_SetReadId, XAxiPmon_GetWriteLatencyId to
+*			XAxiPmon_GetWriteId and XAxiPmon_SetReadLatencyId to
+*			XAxiPmon_GetReadId. in xaxipmon.c
+*			Added Macros XAPM_MC10_OFFSET to XAPM_MC47_OFFSET,
+*			XAPM_SMC10_OFFSET to XAPM_SMC47_OFFSET,
+*			XAPM_IDMASK_OFFSET, XAPM_CR_IDFILTER_ENABLE_MASK,
+*			XAPM_CR_WRLATENCY_START_MASK,
+*			XAPM_CR_WRLATENCY_END_MASK,
+*			XAPM_CR_RDLATENCY_START_MASK,
+*			XAPM_CR_RDLATENCY_END_MASK and
+*			XAPM_MAX_COUNTERS_PROFILE.
+*			Renamed:
+*			XAPM_LATENCYID_OFFSET to XAPM_ID_OFFSET,
+*			XAPM_LATENCYID_RID_MASK to XAPM_ID_RID_MASK,
+*			XAPM_LATENCYID_WID_MASK to XAPM_ID_WID_MASK.
+*			in xaxipmon_hw.h.
+*			Modified driver tcl to generate new parameters
+*			ScaleFactor, ModeProfile, ModeTrace and ModeAdvanced
+*			in Config structure.
+* 6.0   adk  19/12/13 Updated as per the New Tcl API's
+* 6.1   adk  16/04/14 Updated the driver tcl for the newly added parameters in
+* 		      The Axi pmon IP.
+* 6.2   bss  04/21/14   Updated XAxiPmon_CfgInitialize in xaxipmon.c to Reset
+*			counters and FIFOs based on Modes(CR#782671). And if
+*			both profile and trace modes are present set mode as
+*			Advanced.
+* 6.2	bss  03/02/15	To support Zynq MP APM:
+*						Added Is32BitFiltering in XAxiPmon_Config structure.
+*						Updated XAxiPmon_SetWriteId, XAxiPmon_SetReadId,
+*						XAxiPmon_GetWriteId, XAxiPmon_GetReadId
+*						XAxiPmon_SetWriteIdMask, XAxiPmon_SetReadIdMask
+*						XAxiPmon_GetWriteIdMask, XAxiPmon_GetReadIdMask
+*						functions in xaxipmon.c.
+*						Added XAPM_RID_OFFSET and XAPM_RIDMASK_OFFSET in
+*						xaxipmon_hw.h
+*
+* 6.3	kvn  07/02/15	Modified code according to MISRA-C:2012 guidelines.
+* 6.4   sk   11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
+*                     Changed the prototype of XAxiPmon_CfgInitialize API.
+* 6.5   ms   01/23/17 Modified xil_printf statement in main function for all
+*                     examples to ensure that "Successfully ran" and "Failed"
+*                     strings are available in all examples. This is a fix
+*                     for CR-965028.
+*       ms   03/17/17 Added readme.txt file in examples folder for doxygen
+*                     generation.
+* 6.6   ms   04/18/17 Modified tcl file to add suffix U for all macro
+*                     definitions of axipmon in xparameters.h
+*
+* +*****************************************************************************/ +#ifndef XAXIPMON_H /* Prevent circular inclusions */ +#define XAXIPMON_H /* by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files ********************************/ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xstatus.h" +#include "xaxipmon_hw.h" + +/************************** Constant Definitions ****************************/ + + +/** + * @name Macro for Maximum number of Counters + * + * @{ + */ +#define XAPM_MAX_COUNTERS 10U /**< Maximum number of Counters */ +#define XAPM_MAX_COUNTERS_PROFILE 48U /**< Maximum number of Counters */ + +/*@}*/ + + +/** + * @name Indices for Metric Counters and Sampled Metric Coounters used with + * XAxiPmon_GetMetricCounter and XAxiPmon_GetSampledMetricCounter APIs + * @{ + */ + +#define XAPM_METRIC_COUNTER_0 0U /**< Metric Counter 0 Register Index */ +#define XAPM_METRIC_COUNTER_1 1U /**< Metric Counter 1 Register Index */ +#define XAPM_METRIC_COUNTER_2 2U /**< Metric Counter 2 Register Index */ +#define XAPM_METRIC_COUNTER_3 3U /**< Metric Counter 3 Register Index */ +#define XAPM_METRIC_COUNTER_4 4U /**< Metric Counter 4 Register Index */ +#define XAPM_METRIC_COUNTER_5 5U /**< Metric Counter 5 Register Index */ +#define XAPM_METRIC_COUNTER_6 6U /**< Metric Counter 6 Register Index */ +#define XAPM_METRIC_COUNTER_7 7U /**< Metric Counter 7 Register Index */ +#define XAPM_METRIC_COUNTER_8 8U /**< Metric Counter 8 Register Index */ +#define XAPM_METRIC_COUNTER_9 9U /**< Metric Counter 9 Register Index */ + +/*@}*/ + +/** + * @name Indices for Incrementers and Sampled Incrementers used with + * XAxiPmon_GetIncrementer and XAxiPmon_GetSampledIncrementer APIs + * @{ + */ + +#define XAPM_INCREMENTER_0 0U /**< Metric Counter 0 Register Index */ +#define XAPM_INCREMENTER_1 1U /**< Metric Counter 0 Register Index */ +#define XAPM_INCREMENTER_2 2U /**< Metric Counter 0 Register Index */ +#define XAPM_INCREMENTER_3 3U /**< Metric Counter 0 Register Index */ +#define XAPM_INCREMENTER_4 4U /**< Metric Counter 0 Register Index */ +#define XAPM_INCREMENTER_5 5U /**< Metric Counter 0 Register Index */ +#define XAPM_INCREMENTER_6 6U /**< Metric Counter 0 Register Index */ +#define XAPM_INCREMENTER_7 7U /**< Metric Counter 0 Register Index */ +#define XAPM_INCREMENTER_8 8U /**< Metric Counter 0 Register Index */ +#define XAPM_INCREMENTER_9 9U /**< Metric Counter 0 Register Index */ + +/*@}*/ + +/** + * @name Macros for Metric Selector Settings + * @{ + */ + +#define XAPM_METRIC_SET_0 0U /**< Write Transaction Count */ +#define XAPM_METRIC_SET_1 1U /**< Read Transaction Count */ +#define XAPM_METRIC_SET_2 2U /**< Write Byte Count */ +#define XAPM_METRIC_SET_3 3U /**< Read Byte Count */ +#define XAPM_METRIC_SET_4 4U /**< Write Beat Count */ +#define XAPM_METRIC_SET_5 5U /**< Total Read Latency */ +#define XAPM_METRIC_SET_6 6U /**< Total Write Latency */ +#define XAPM_METRIC_SET_7 7U /**< Slv_Wr_Idle_Cnt */ +#define XAPM_METRIC_SET_8 8U /**< Mst_Rd_Idle_Cnt */ +#define XAPM_METRIC_SET_9 9U /**< Num_BValids */ +#define XAPM_METRIC_SET_10 10U /**< Num_WLasts */ +#define XAPM_METRIC_SET_11 11U /**< Num_RLasts */ +#define XAPM_METRIC_SET_12 12U /**< Minimum Write Latency */ +#define XAPM_METRIC_SET_13 13U /**< Maximum Write Latency */ +#define XAPM_METRIC_SET_14 14U /**< Minimum Read Latency */ +#define XAPM_METRIC_SET_15 15U /**< Maximum Read Latency */ +#define XAPM_METRIC_SET_16 16U /**< Transfer Cycle Count */ +#define XAPM_METRIC_SET_17 17U /**< Packet Count */ +#define XAPM_METRIC_SET_18 18U /**< Data Byte Count */ +#define XAPM_METRIC_SET_19 19U /**< Position Byte Count */ +#define XAPM_METRIC_SET_20 20U /**< Null Byte Count */ +#define XAPM_METRIC_SET_21 21U /**< Slv_Idle_Cnt */ +#define XAPM_METRIC_SET_22 22U /**< Mst_Idle_Cnt */ +#define XAPM_METRIC_SET_30 30U /**< External event count */ + + +/*@}*/ + + +/** + * @name Macros for Maximum number of Agents + * @{ + */ + +#define XAPM_MAX_AGENTS 8U /**< Maximum number of Agents */ + +/*@}*/ + +/** + * @name Macros for Flags in Flag Enable Control Register + * @{ + */ + +#define XAPM_FLAG_WRADDR 0x00000001 /**< Write Address Flag */ +#define XAPM_FLAG_FIRSTWR 0x00000002 /**< First Write Flag */ +#define XAPM_FLAG_LASTWR 0x00000004 /**< Last Write Flag */ +#define XAPM_FLAG_RESPONSE 0x00000008 /**< Response Flag */ +#define XAPM_FLAG_RDADDR 0x00000010 /**< Read Address Flag */ +#define XAPM_FLAG_FIRSTRD 0x00000020 /**< First Read Flag */ +#define XAPM_FLAG_LASTRD 0x00000040 /**< Last Read Flag */ +#define XAPM_FLAG_SWDATA 0x00010000 /**< Software-written Data Flag */ +#define XAPM_FLAG_EVENT 0x00020000 /**< Last Read Flag */ +#define XAPM_FLAG_EVNTSTOP 0x00040000 /**< Last Read Flag */ +#define XAPM_FLAG_EVNTSTART 0x00080000 /**< Last Read Flag */ +#define XAPM_FLAG_GCCOVF 0x00100000 /**< Global Clock Counter Overflow + * Flag */ +#define XAPM_FLAG_SCLAPSE 0x00200000 /**< Sample Counter Lapse Flag */ +#define XAPM_FLAG_MC0 0x00400000U /**< Metric Counter 0 Flag */ +#define XAPM_FLAG_MC1 0x00800000U /**< Metric Counter 1 Flag */ +#define XAPM_FLAG_MC2 0x01000000U /**< Metric Counter 2 Flag */ +#define XAPM_FLAG_MC3 0x02000000U /**< Metric Counter 3 Flag */ +#define XAPM_FLAG_MC4 0x04000000U /**< Metric Counter 4 Flag */ +#define XAPM_FLAG_MC5 0x08000000U /**< Metric Counter 5 Flag */ +#define XAPM_FLAG_MC6 0x10000000U /**< Metric Counter 6 Flag */ +#define XAPM_FLAG_MC7 0x20000000U /**< Metric Counter 7 Flag */ +#define XAPM_FLAG_MC8 0x40000000U /**< Metric Counter 8 Flag */ +#define XAPM_FLAG_MC9 0x80000000U /**< Metric Counter 9 Flag */ + +/*@}*/ + +/** + * @name Macros for Read/Write Latency Start and End points + * @{ + */ +#define XAPM_LATENCY_ADDR_ISSUE 0U /**< Address Issue as start + point for Latency calculation*/ +#define XAPM_LATENCY_ADDR_ACCEPT 1U /**< Address Acceptance as start + point for Latency calculation*/ +#define XAPM_LATENCY_LASTRD 0U /**< Last Read as end point for + Latency calculation */ +#define XAPM_LATENCY_LASTWR 0U /**< Last Write as end point for + Latency calculation */ +#define XAPM_LATENCY_FIRSTRD 1U /**< First Read as end point for + Latency calculation */ +#define XAPM_LATENCY_FIRSTWR 1U /**< First Write as end point for + Latency calculation */ + +/*@}*/ + +/** + * @name Macros for Modes of APM + * @{ + */ + +#define XAPM_MODE_TRACE 2U /**< APM in Trace mode */ + +#define XAPM_MODE_PROFILE 1U /**< APM in Profile mode */ + +#define XAPM_MODE_ADVANCED 0U /**< APM in Advanced mode */ + +/*@}*/ + +/**************************** Type Definitions *******************************/ + +/** + * This typedef contains configuration information for the AXI Performance + * Monitor device. + */ +typedef struct { + u16 DeviceId; /**< Unique ID of device */ + UINTPTR BaseAddress; /**< Device base address */ + s32 GlobalClkCounterWidth; /**< Global Clock Counter Width */ + s32 MetricSampleCounterWidth ; /**< Metric Sample Counters Width */ + u8 IsEventCount; /**< Event Count Enabled 1 - enabled + 0 - not enabled */ + u8 NumberofSlots; /**< Number of Monitor Slots */ + u8 NumberofCounters; /**< Number of Counters */ + u8 HaveSampledCounters; /**< Have Sampled Counters 1 - present + 0 - Not present */ + u8 IsEventLog; /**< Event Logging Enabled 1 - enabled + 0 - Not enabled */ + u32 FifoDepth; /**< Event Log FIFO Depth */ + u32 FifoWidth; /**< Event Log FIFO Width */ + u32 TidWidth; /**< Streaming Interface TID Width */ + u8 ScaleFactor; /**< Event Count Scaling factor */ + u8 ModeAdvanced; /**< Advanced Mode */ + u8 ModeProfile; /**< Profile Mode */ + u8 ModeTrace; /**< Trace Mode */ + u8 Is32BitFiltering; /**< 32 bit filtering enabled */ +} XAxiPmon_Config; + + +/** + * The driver's instance data. The user is required to allocate a variable + * of this type for every AXI Performance Monitor device in system. A pointer + * to a variable of this type is then passed to the driver API functions. + */ +typedef struct { + XAxiPmon_Config Config; /**< XAxiPmon_Config of current device */ + u32 IsReady; /**< Device is initialized and ready */ + u8 Mode; /**< APM Mode */ +} XAxiPmon; + +/***************** Macros (Inline Functions) Definitions ********************/ + + +/****************************************************************************/ +/** +* +* This routine enables the Global Interrupt. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None. +* +* @note C-Style signature: +* void XAxiPmon_IntrGlobalEnable(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_IntrGlobalEnable(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, \ + XAPM_GIE_OFFSET, 1) + + +/****************************************************************************/ +/** +* +* This routine disables the Global Interrupt. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None. +* +* @note C-Style signature: +* void XAxiPmon_IntrGlobalDisable(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_IntrGlobalDisable(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, \ + XAPM_GIE_OFFSET, 0) + + +/****************************************************************************/ +/** +* +* This routine enables interrupt(s). Use the XAPM_IXR_* constants defined in +* xaxipmon_hw.h to create the bit-mask to enable interrupts. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* @param Mask is the mask to enable. Bit positions of 1 will be enabled. +* Bit positions of 0 will keep the previous setting. This mask is +* formed by OR'ing XAPM_IXR__* bits defined in xaxipmon_hw.h. +* +* @return None. +* +* @note C-Style signature: +* void XAxiPmon_IntrEnable(XAxiPmon *InstancePtr, u32 Mask) +* +*****************************************************************************/ +#define XAxiPmon_IntrEnable(InstancePtr, Mask) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_IE_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_IE_OFFSET) | (Mask)); + + +/****************************************************************************/ +/** +* +* This routine disable interrupt(s). Use the XAPM_IXR_* constants defined in +* xaxipmon_hw.h to create the bit-mask to disable interrupts. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* @param Mask is the mask to disable. Bit positions of 1 will be +* disabled. Bit positions of 0 will keep the previous setting. +* This mask is formed by OR'ing XAPM_IXR_* bits defined in +* xaxipmon_hw.h. +* +* @return None. +* +* @note C-Style signature: +* void XAxiPmon_IntrEnable(XAxiPmon *InstancePtr, u32 Mask) +* +*****************************************************************************/ +#define XAxiPmon_IntrDisable(InstancePtr, Mask) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_IE_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_IE_OFFSET) | (Mask)); + +/****************************************************************************/ +/** +* +* This routine clears the specified interrupt(s). +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* @param Mask is the mask to clear. Bit positions of 1 will be cleared. +* This mask is formed by OR'ing XAPM_IXR_* bits defined in +* xaxipmon_hw.h. +* +* @return None. +* +* @note C-Style signature: +* void XAxiPmon_IntrClear(XAxiPmon *InstancePtr, u32 Mask) +* +*****************************************************************************/ +#define XAxiPmon_IntrClear(InstancePtr, Mask) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_IS_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_IS_OFFSET) | (Mask)); + +/****************************************************************************/ +/** +* +* This routine returns the Interrupt Status Register. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return Interrupt Status Register contents +* +* @note C-Style signature: +* void XAxiPmon_IntrClear(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_IntrGetStatus(InstancePtr) \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_IS_OFFSET); + +/****************************************************************************/ +/** +* +* This function enables the Global Clock Counter. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_EnableGlobalClkCounter(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_EnableGlobalClkCounter(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_CTL_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_CTL_OFFSET) | XAPM_CR_GCC_ENABLE_MASK); + +/****************************************************************************/ +/** +* +* This function disbles the Global Clock Counter. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_DisableGlobalClkCounter(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_DisableGlobalClkCounter(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_CTL_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_CTL_OFFSET) & ~(XAPM_CR_GCC_ENABLE_MASK)); + +/****************************************************************************/ +/** +* +* This function enables the specified flag in Flag Control Register. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* @param Flag is one of the XAPM_FLAG_* masks defined in xaxipmon.h +* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_EnableFlag(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_EnableFlag(InstancePtr, Flag) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_FEC_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_FEC_OFFSET) | (Flag)); + +/****************************************************************************/ +/** +* +* This function disables the specified flag in Flag Control Register. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* @param Flag is one of the XAPM_FLAG_* masks defined in xaxipmon.h* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_DisableFlag(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_DisableFlag(InstancePtr, Flag) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_FEC_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_FEC_OFFSET) & ~(Flag)); + +/****************************************************************************/ +/** +* +* This function loads the sample interval register value into the sample +* interval counter. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_LoadSampleIntervalCounter(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_LoadSampleIntervalCounter(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_SICR_OFFSET, \ + XAPM_SICR_LOAD_MASK); + + + +/****************************************************************************/ +/** +* +* This enables the down count of the sample interval counter. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_EnableSampleIntervalCounter(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_EnableSampleIntervalCounter(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_SICR_OFFSET,\ + XAPM_SICR_ENABLE_MASK); + + +/****************************************************************************/ +/** +* +* This disables the down count of the sample interval counter. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_DisableSampleIntervalCounter(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_DisableSampleIntervalCounter(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_SICR_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_SICR_OFFSET) & ~(XAPM_SICR_ENABLE_MASK)); + +/****************************************************************************/ +/** +* +* This enables Reset of Metric Counters when Sample Interval Counter lapses. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_EnableMetricCounterReset(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_EnableMetricCounterReset(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_SICR_OFFSET,\ + XAPM_SICR_MCNTR_RST_MASK); + +/****************************************************************************/ +/** +* +* This disables the down count of the sample interval counter. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_DisableMetricCounterReset(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_DisableMetricCounterReset(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_SICR_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_SICR_OFFSET) & ~(XAPM_SICR_MCNTR_RST_MASK)); + +/****************************************************************************/ +/** +* +* This function enables the ID Filter Masking. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_EnableIDFilter(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_EnableIDFilter(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_CTL_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_CTL_OFFSET) | XAPM_CR_IDFILTER_ENABLE_MASK); + +/****************************************************************************/ +/** +* +* This function disbles the ID Filter masking. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return None +* +* @note C-Style signature: +* void XAxiPmon_DisableIDFilter(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_DisableIDFilter(InstancePtr) \ + XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_CTL_OFFSET, \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \ + XAPM_CTL_OFFSET) & ~(XAPM_CR_IDFILTER_ENABLE_MASK)); + +/****************************************************************************/ +/** +* +* This function samples Metric Counters to Sampled Metric Counters by +* reading Sample Register and also returns interval. i.e. the number of +* clocks in between previous read to the current read of sample register. +* +* @param InstancePtr is a pointer to the XAxiPmon instance. +* +* @return Interval. i.e. the number of clocks in between previous +* read to the current read of sample register. +* +* @note C-Style signature: +* u32 XAxiPmon_SampleMetrics(XAxiPmon *InstancePtr) +* +*****************************************************************************/ +#define XAxiPmon_SampleMetrics(InstancePtr) \ + XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, XAPM_SR_OFFSET); + + +/************************** Function Prototypes *****************************/ + +/** + * Functions in xaxipmon_sinit.c + */ +XAxiPmon_Config *XAxiPmon_LookupConfig(u16 DeviceId); + +/** + * Functions in xaxipmon.c + */ +s32 XAxiPmon_CfgInitialize(XAxiPmon *InstancePtr, + XAxiPmon_Config *ConfigPtr, UINTPTR EffectiveAddr); + +s32 XAxiPmon_ResetMetricCounter(XAxiPmon *InstancePtr); + +void XAxiPmon_ResetGlobalClkCounter(XAxiPmon *InstancePtr); + +s32 XAxiPmon_ResetFifo(XAxiPmon *InstancePtr); + +void XAxiPmon_SetIncrementerRange(XAxiPmon *InstancePtr, u8 IncrementerNum, + u16 RangeUpper, u16 RangeLower); + +void XAxiPmon_GetIncrementerRange(XAxiPmon *InstancePtr, u8 IncrementerNum, + u16 *RangeUpper, u16 *RangeLower); + +void XAxiPmon_SetSampleInterval(XAxiPmon *InstancePtr, u32 SampleInterval); + +void XAxiPmon_GetSampleInterval(XAxiPmon *InstancePtr, u32 *SampleInterval); + +s32 XAxiPmon_SetMetrics(XAxiPmon *InstancePtr, u8 Slot, u8 Metrics, + u8 CounterNum); + +s32 XAxiPmon_GetMetrics(XAxiPmon *InstancePtr, u8 CounterNum, u8 *Metrics, + u8 *Slot); +void XAxiPmon_GetGlobalClkCounter(XAxiPmon *InstancePtr,u32 *CntHighValue, + u32 *CntLowValue); + +u32 XAxiPmon_GetMetricCounter(XAxiPmon *InstancePtr, u32 CounterNum); + +u32 XAxiPmon_GetSampledMetricCounter(XAxiPmon *InstancePtr, u32 CounterNum); + +u32 XAxiPmon_GetIncrementer(XAxiPmon *InstancePtr, u32 IncrementerNum); + +u32 XAxiPmon_GetSampledIncrementer(XAxiPmon *InstancePtr, u32 IncrementerNum); + +void XAxiPmon_SetSwDataReg(XAxiPmon *InstancePtr, u32 SwData); + +u32 XAxiPmon_GetSwDataReg(XAxiPmon *InstancePtr); + +s32 XAxiPmon_StartEventLog(XAxiPmon *InstancePtr, u32 FlagEnables); + +s32 XAxiPmon_StopEventLog(XAxiPmon *InstancePtr); + +s32 XAxiPmon_StartCounters(XAxiPmon *InstancePtr, u32 SampleInterval); + +s32 XAxiPmon_StopCounters(XAxiPmon *InstancePtr); + +void XAxiPmon_EnableMetricsCounter(XAxiPmon *InstancePtr); + +void XAxiPmon_DisableMetricsCounter(XAxiPmon *InstancePtr); + +void XAxiPmon_SetLogEnableRanges(XAxiPmon *InstancePtr, u32 CounterNum, + u16 RangeUpper, u16 RangeLower); + +void XAxiPmon_GetLogEnableRanges(XAxiPmon *InstancePtr, u32 CounterNum, + u16 *RangeUpper, u16 *RangeLower); + +void XAxiPmon_EnableEventLog(XAxiPmon *InstancePtr); + +void XAxiPmon_EnableMetricCounterTrigger(XAxiPmon *InstancePtr); + +void XAxiPmon_DisableMetricCounterTrigger(XAxiPmon *InstancePtr); + +void XAxiPmon_EnableEventLogTrigger(XAxiPmon *InstancePtr); + +void XAxiPmon_DisableEventLogTrigger(XAxiPmon *InstancePtr); + +const char * XAxiPmon_GetMetricName(u8 Metrics); + +void XAxiPmon_SetWriteId(XAxiPmon *InstancePtr, u32 WriteId); + +void XAxiPmon_SetReadId(XAxiPmon *InstancePtr, u32 ReadId); + +u32 XAxiPmon_GetWriteId(XAxiPmon *InstancePtr); + +u32 XAxiPmon_GetReadId(XAxiPmon *InstancePtr); + +void XAxiPmon_SetWrLatencyStart(XAxiPmon *InstancePtr, u8 Param); + +void XAxiPmon_SetWrLatencyEnd(XAxiPmon *InstancePtr, u8 Param); + +void XAxiPmon_SetRdLatencyStart(XAxiPmon *InstancePtr, u8 Param); + +void XAxiPmon_SetRdLatencyEnd(XAxiPmon *InstancePtr, u8 Param); + +u8 XAxiPmon_GetWrLatencyStart(XAxiPmon *InstancePtr); + +u8 XAxiPmon_GetWrLatencyEnd(XAxiPmon *InstancePtr); + +u8 XAxiPmon_GetRdLatencyStart(XAxiPmon *InstancePtr); + +u8 XAxiPmon_GetRdLatencyEnd(XAxiPmon *InstancePtr); + +void XAxiPmon_SetWriteIdMask(XAxiPmon *InstancePtr, u32 WrMask); + +void XAxiPmon_SetReadIdMask(XAxiPmon *InstancePtr, u32 RdMask); + +u32 XAxiPmon_GetWriteIdMask(XAxiPmon *InstancePtr); + +u32 XAxiPmon_GetReadIdMask(XAxiPmon *InstancePtr); + + +/** + * Functions in xaxipmon_selftest.c + */ +s32 XAxiPmon_SelfTest(XAxiPmon *InstancePtr); + +#ifdef __cplusplus +} +#endif + +#endif /* End of protection macro. */ +/** @} */ diff --git a/src/Xilinx/include/xaxipmon_hw.h b/src/Xilinx/include/xaxipmon_hw.h new file mode 100644 index 0000000..b5d20f5 --- /dev/null +++ b/src/Xilinx/include/xaxipmon_hw.h @@ -0,0 +1,571 @@ +/****************************************************************************** +* +* Copyright (C) 2012 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/****************************************************************************/ +/** +* +* @file xaxipmon_hw.h +* @addtogroup axipmon_v6_6 +* @{ +* +* This header file contains identifiers and basic driver functions (or +* macros) that can be used to access the AXI Performance Monitor. +* +* Refer to the device specification for more information about this driver. +* +* @note None. +* +* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.00a bss    02/27/12 First release
+* 2.00a bss    06/23/12 Updated to support v2_00a version of IP.
+* 3.00a bss    09/03/12 Deleted XAPM_AGENT_OFFSET Macro to support
+*			v2_01a version of IP.
+* 3.01a bss    10/25/12 To support new version of IP:
+*			Added XAPM_MCXLOGEN_OFFSET and
+*			XAPM_CR_EXTERNAL_TRIGGER_MASK macros.
+* 4.00a bss    01/17/13 To support new version of IP:
+*			Added XAPM_LATENCYID_OFFSET,
+*			XAPM_CR_EVTLOG_EXTTRIGGER_MASK,
+*			XAPM_LATENCYID_RID_MASK and XAPM_LATENCYID_WID_MASK
+* 5.00a bss   08/26/13  To support new version of IP:
+*			Added Macros XAPM_MC10_OFFSET to XAPM_MC47_OFFSET,
+*			XAPM_SMC10_OFFSET to XAPM_SMC47_OFFSET.
+*			Added macro XAPM_IDMASK_OFFSET, XAPM_SR_OFFSET.
+*			Added XAPM_CR_IDFILTER_ENABLE_MASK,
+*			XAPM_CR_WRLATENCY_START_MASK,
+*			XAPM_CR_WRLATENCY_END_MASK,
+*			XAPM_CR_RDLATENCY_START_MASK,
+*			XAPM_CR_RDLATENCY_END_MASK, XAPM_MASKID_RID_MASK
+*			and XAPM_MASKID_WID_MASK macros.
+*			Renamed:
+*			XAPM_LATENCYID_OFFSET to XAPM_ID_OFFSET,
+*			XAPM_LATENCYID_RID_MASK to XAPM_ID_RID_MASK,
+*			XAPM_LATENCYID_WID_MASK to XAPM_ID_WID_MASK.
+*
+* 6.2  bss  03/02/15 Added XAPM_RID_OFFSET and XAPM_RIDMASK_OFFSET to support
+*					 Zynq MP APM.
+*
+* 6.3  kvn  07/02/15 Modified code according to MISRA-C:2012 guidelines.
+*
+* +*****************************************************************************/ +#ifndef XAXIPMON_HW_H /* Prevent circular inclusions */ +#define XAXIPMON_HW_H /* by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files ********************************/ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xil_io.h" + +/************************** Constant Definitions ****************************/ + + +/**@name Register offsets of AXIMONITOR in the Device Config + * + * The following constants provide access to each of the registers of the + * AXI PERFORMANCE MONITOR device. + * @{ + */ + +#define XAPM_GCC_HIGH_OFFSET 0x00000000U /**< Global Clock Counter + 32 to 63 bits */ +#define XAPM_GCC_LOW_OFFSET 0x00000004U /**< Global Clock Counter Lower + 0-31 bits */ +#define XAPM_SI_HIGH_OFFSET 0x00000020U /**< Sample Interval MSB */ +#define XAPM_SI_LOW_OFFSET 0x00000024U /**< Sample Interval LSB */ +#define XAPM_SICR_OFFSET 0x00000028U /**< Sample Interval Control + Register */ +#define XAPM_SR_OFFSET 0x0000002CU /**< Sample Register */ +#define XAPM_GIE_OFFSET 0x00000030U /**< Global Interrupt Enable + Register */ +#define XAPM_IE_OFFSET 0x00000034U /**< Interrupt Enable Register */ +#define XAPM_IS_OFFSET 0x00000038U /**< Interrupt Status Register */ + +#define XAPM_MSR0_OFFSET 0x00000044U /**< Metric Selector 0 Register */ +#define XAPM_MSR1_OFFSET 0x00000048U /**< Metric Selector 1 Register */ +#define XAPM_MSR2_OFFSET 0x0000004CU /**< Metric Selector 2 Register */ + +#define XAPM_MC0_OFFSET 0x00000100U /**< Metric Counter 0 Register */ +#define XAPM_INC0_OFFSET 0x00000104U /**< Incrementer 0 Register */ +#define XAPM_RANGE0_OFFSET 0x00000108U /**< Range 0 Register */ +#define XAPM_MC0LOGEN_OFFSET 0x0000010CU /**< Metric Counter 0 + Log Enable Register */ +#define XAPM_MC1_OFFSET 0x00000110U /**< Metric Counter 1 Register */ +#define XAPM_INC1_OFFSET 0x00000114U /**< Incrementer 1 Register */ +#define XAPM_RANGE1_OFFSET 0x00000118U /**< Range 1 Register */ +#define XAPM_MC1LOGEN_OFFSET 0x0000011CU /**< Metric Counter 1 + Log Enable Register */ +#define XAPM_MC2_OFFSET 0x00000120U /**< Metric Counter 2 Register */ +#define XAPM_INC2_OFFSET 0x00000124U /**< Incrementer 2 Register */ +#define XAPM_RANGE2_OFFSET 0x00000128U /**< Range 2 Register */ +#define XAPM_MC2LOGEN_OFFSET 0x0000012CU /**< Metric Counter 2 + Log Enable Register */ +#define XAPM_MC3_OFFSET 0x00000130U /**< Metric Counter 3 Register */ +#define XAPM_INC3_OFFSET 0x00000134U /**< Incrementer 3 Register */ +#define XAPM_RANGE3_OFFSET 0x00000138U /**< Range 3 Register */ +#define XAPM_MC3LOGEN_OFFSET 0x0000013CU /**< Metric Counter 3 + Log Enable Register */ +#define XAPM_MC4_OFFSET 0x00000140U /**< Metric Counter 4 Register */ +#define XAPM_INC4_OFFSET 0x00000144U /**< Incrementer 4 Register */ +#define XAPM_RANGE4_OFFSET 0x00000148U /**< Range 4 Register */ +#define XAPM_MC4LOGEN_OFFSET 0x0000014CU /**< Metric Counter 4 + Log Enable Register */ +#define XAPM_MC5_OFFSET 0x00000150U /**< Metric Counter 5 + Register */ +#define XAPM_INC5_OFFSET 0x00000154U /**< Incrementer 5 Register */ +#define XAPM_RANGE5_OFFSET 0x00000158U /**< Range 5 Register */ +#define XAPM_MC5LOGEN_OFFSET 0x0000015CU /**< Metric Counter 5 + Log Enable Register */ +#define XAPM_MC6_OFFSET 0x00000160U /**< Metric Counter 6 + Register */ +#define XAPM_INC6_OFFSET 0x00000164U /**< Incrementer 6 Register */ +#define XAPM_RANGE6_OFFSET 0x00000168U /**< Range 6 Register */ +#define XAPM_MC6LOGEN_OFFSET 0x0000016CU /**< Metric Counter 6 + Log Enable Register */ +#define XAPM_MC7_OFFSET 0x00000170U /**< Metric Counter 7 + Register */ +#define XAPM_INC7_OFFSET 0x00000174U /**< Incrementer 7 Register */ +#define XAPM_RANGE7_OFFSET 0x00000178U /**< Range 7 Register */ +#define XAPM_MC7LOGEN_OFFSET 0x0000017CU /**< Metric Counter 7 + Log Enable Register */ +#define XAPM_MC8_OFFSET 0x00000180U /**< Metric Counter 8 + Register */ +#define XAPM_INC8_OFFSET 0x00000184U /**< Incrementer 8 Register */ +#define XAPM_RANGE8_OFFSET 0x00000188U /**< Range 8 Register */ +#define XAPM_MC8LOGEN_OFFSET 0x0000018CU /**< Metric Counter 8 + Log Enable Register */ +#define XAPM_MC9_OFFSET 0x00000190U /**< Metric Counter 9 + Register */ +#define XAPM_INC9_OFFSET 0x00000194U /**< Incrementer 9 Register */ +#define XAPM_RANGE9_OFFSET 0x00000198U /**< Range 9 Register */ +#define XAPM_MC9LOGEN_OFFSET 0x0000019CU /**< Metric Counter 9 + Log Enable Register */ +#define XAPM_SMC0_OFFSET 0x00000200U /**< Sampled Metric Counter + 0 Register */ +#define XAPM_SINC0_OFFSET 0x00000204U /**< Sampled Incrementer + 0 Register */ +#define XAPM_SMC1_OFFSET 0x00000210U /**< Sampled Metric Counter + 1 Register */ +#define XAPM_SINC1_OFFSET 0x00000214U /**< Sampled Incrementer + 1 Register */ +#define XAPM_SMC2_OFFSET 0x00000220U /**< Sampled Metric Counter + 2 Register */ +#define XAPM_SINC2_OFFSET 0x00000224U /**< Sampled Incrementer + 2 Register */ +#define XAPM_SMC3_OFFSET 0x00000230U /**< Sampled Metric Counter + 3 Register */ +#define XAPM_SINC3_OFFSET 0x00000234U /**< Sampled Incrementer + 3 Register */ +#define XAPM_SMC4_OFFSET 0x00000240U /**< Sampled Metric Counter + 4 Register */ +#define XAPM_SINC4_OFFSET 0x00000244U /**< Sampled Incrementer + 4 Register */ +#define XAPM_SMC5_OFFSET 0x00000250U /**< Sampled Metric Counter + 5 Register */ +#define XAPM_SINC5_OFFSET 0x00000254U /**< Sampled Incrementer + 5 Register */ +#define XAPM_SMC6_OFFSET 0x00000260U /**< Sampled Metric Counter + 6 Register */ +#define XAPM_SINC6_OFFSET 0x00000264U /**< Sampled Incrementer + 6 Register */ +#define XAPM_SMC7_OFFSET 0x00000270U /**< Sampled Metric Counter + 7 Register */ +#define XAPM_SINC7_OFFSET 0x00000274U /**< Sampled Incrementer + 7 Register */ +#define XAPM_SMC8_OFFSET 0x00000280U /**< Sampled Metric Counter + 8 Register */ +#define XAPM_SINC8_OFFSET 0x00000284U /**< Sampled Incrementer + 8 Register */ +#define XAPM_SMC9_OFFSET 0x00000290U /**< Sampled Metric Counter + 9 Register */ +#define XAPM_SINC9_OFFSET 0x00000294U /**< Sampled Incrementer + 9 Register */ + +#define XAPM_MC10_OFFSET 0x000001A0U /**< Metric Counter 10 + Register */ +#define XAPM_MC11_OFFSET 0x000001B0U /**< Metric Counter 11 + Register */ +#define XAPM_MC12_OFFSET 0x00000500U /**< Metric Counter 12 + Register */ +#define XAPM_MC13_OFFSET 0x00000510U /**< Metric Counter 13 + Register */ +#define XAPM_MC14_OFFSET 0x00000520U /**< Metric Counter 14 + Register */ +#define XAPM_MC15_OFFSET 0x00000530U /**< Metric Counter 15 + Register */ +#define XAPM_MC16_OFFSET 0x00000540U /**< Metric Counter 16 + Register */ +#define XAPM_MC17_OFFSET 0x00000550U /**< Metric Counter 17 + Register */ +#define XAPM_MC18_OFFSET 0x00000560U /**< Metric Counter 18 + Register */ +#define XAPM_MC19_OFFSET 0x00000570U /**< Metric Counter 19 + Register */ +#define XAPM_MC20_OFFSET 0x00000580U /**< Metric Counter 20 + Register */ +#define XAPM_MC21_OFFSET 0x00000590U /**< Metric Counter 21 + Register */ +#define XAPM_MC22_OFFSET 0x000005A0U /**< Metric Counter 22 + Register */ +#define XAPM_MC23_OFFSET 0x000005B0U /**< Metric Counter 23 + Register */ +#define XAPM_MC24_OFFSET 0x00000700U /**< Metric Counter 24 + Register */ +#define XAPM_MC25_OFFSET 0x00000710U /**< Metric Counter 25 + Register */ +#define XAPM_MC26_OFFSET 0x00000720U /**< Metric Counter 26 + Register */ +#define XAPM_MC27_OFFSET 0x00000730U /**< Metric Counter 27 + Register */ +#define XAPM_MC28_OFFSET 0x00000740U /**< Metric Counter 28 + Register */ +#define XAPM_MC29_OFFSET 0x00000750U /**< Metric Counter 29 + Register */ +#define XAPM_MC30_OFFSET 0x00000760U /**< Metric Counter 30 + Register */ +#define XAPM_MC31_OFFSET 0x00000770U /**< Metric Counter 31 + Register */ +#define XAPM_MC32_OFFSET 0x00000780U /**< Metric Counter 32 + Register */ +#define XAPM_MC33_OFFSET 0x00000790U /**< Metric Counter 33 + Register */ +#define XAPM_MC34_OFFSET 0x000007A0U /**< Metric Counter 34 + Register */ +#define XAPM_MC35_OFFSET 0x000007B0U /**< Metric Counter 35 + Register */ +#define XAPM_MC36_OFFSET 0x00000900U /**< Metric Counter 36 + Register */ +#define XAPM_MC37_OFFSET 0x00000910U /**< Metric Counter 37 + Register */ +#define XAPM_MC38_OFFSET 0x00000920U /**< Metric Counter 38 + Register */ +#define XAPM_MC39_OFFSET 0x00000930U /**< Metric Counter 39 + Register */ +#define XAPM_MC40_OFFSET 0x00000940U /**< Metric Counter 40 + Register */ +#define XAPM_MC41_OFFSET 0x00000950U /**< Metric Counter 41 + Register */ +#define XAPM_MC42_OFFSET 0x00000960U /**< Metric Counter 42 + Register */ +#define XAPM_MC43_OFFSET 0x00000970U /**< Metric Counter 43 + Register */ +#define XAPM_MC44_OFFSET 0x00000980U /**< Metric Counter 44 + Register */ +#define XAPM_MC45_OFFSET 0x00000990U /**< Metric Counter 45 + Register */ +#define XAPM_MC46_OFFSET 0x000009A0U /**< Metric Counter 46 + Register */ +#define XAPM_MC47_OFFSET 0x000009B0U /**< Metric Counter 47 + Register */ + +#define XAPM_SMC10_OFFSET 0x000002A0U /**< Sampled Metric Counter + 10 Register */ +#define XAPM_SMC11_OFFSET 0x000002B0U /**< Sampled Metric Counter + 11 Register */ +#define XAPM_SMC12_OFFSET 0x00000600U /**< Sampled Metric Counter + 12 Register */ +#define XAPM_SMC13_OFFSET 0x00000610U /**< Sampled Metric Counter + 13 Register */ +#define XAPM_SMC14_OFFSET 0x00000620U /**< Sampled Metric Counter + 14 Register */ +#define XAPM_SMC15_OFFSET 0x00000630U /**< Sampled Metric Counter + 15 Register */ +#define XAPM_SMC16_OFFSET 0x00000640U /**< Sampled Metric Counter + 16 Register */ +#define XAPM_SMC17_OFFSET 0x00000650U /**< Sampled Metric Counter + 17 Register */ +#define XAPM_SMC18_OFFSET 0x00000660U /**< Sampled Metric Counter + 18 Register */ +#define XAPM_SMC19_OFFSET 0x00000670U /**< Sampled Metric Counter + 19 Register */ +#define XAPM_SMC20_OFFSET 0x00000680U /**< Sampled Metric Counter + 20 Register */ +#define XAPM_SMC21_OFFSET 0x00000690U /**< Sampled Metric Counter + 21 Register */ +#define XAPM_SMC22_OFFSET 0x000006A0U /**< Sampled Metric Counter + 22 Register */ +#define XAPM_SMC23_OFFSET 0x000006B0U /**< Sampled Metric Counter + 23 Register */ +#define XAPM_SMC24_OFFSET 0x00000800U /**< Sampled Metric Counter + 24 Register */ +#define XAPM_SMC25_OFFSET 0x00000810U /**< Sampled Metric Counter + 25 Register */ +#define XAPM_SMC26_OFFSET 0x00000820U /**< Sampled Metric Counter + 26 Register */ +#define XAPM_SMC27_OFFSET 0x00000830U /**< Sampled Metric Counter + 27 Register */ +#define XAPM_SMC28_OFFSET 0x00000840U /**< Sampled Metric Counter + 28 Register */ +#define XAPM_SMC29_OFFSET 0x00000850U /**< Sampled Metric Counter + 29 Register */ +#define XAPM_SMC30_OFFSET 0x00000860U /**< Sampled Metric Counter + 30 Register */ +#define XAPM_SMC31_OFFSET 0x00000870U /**< Sampled Metric Counter + 31 Register */ +#define XAPM_SMC32_OFFSET 0x00000880U /**< Sampled Metric Counter + 32 Register */ +#define XAPM_SMC33_OFFSET 0x00000890U /**< Sampled Metric Counter + 33 Register */ +#define XAPM_SMC34_OFFSET 0x000008A0U /**< Sampled Metric Counter + 34 Register */ +#define XAPM_SMC35_OFFSET 0x000008B0U /**< Sampled Metric Counter + 35 Register */ +#define XAPM_SMC36_OFFSET 0x00000A00U /**< Sampled Metric Counter + 36 Register */ +#define XAPM_SMC37_OFFSET 0x00000A10U /**< Sampled Metric Counter + 37 Register */ +#define XAPM_SMC38_OFFSET 0x00000A20U /**< Sampled Metric Counter + 38 Register */ +#define XAPM_SMC39_OFFSET 0x00000A30U /**< Sampled Metric Counter + 39 Register */ +#define XAPM_SMC40_OFFSET 0x00000A40U /**< Sampled Metric Counter + 40 Register */ +#define XAPM_SMC41_OFFSET 0x00000A50U /**< Sampled Metric Counter + 41 Register */ +#define XAPM_SMC42_OFFSET 0x00000A60U /**< Sampled Metric Counter + 42 Register */ +#define XAPM_SMC43_OFFSET 0x00000A70U /**< Sampled Metric Counter + 43 Register */ +#define XAPM_SMC44_OFFSET 0x00000A80U /**< Sampled Metric Counter + 44 Register */ +#define XAPM_SMC45_OFFSET 0x00000A90U /**< Sampled Metric Counter + 45 Register */ +#define XAPM_SMC46_OFFSET 0x00000AA0U /**< Sampled Metric Counter + 46 Register */ +#define XAPM_SMC47_OFFSET 0x00000AB0U /**< Sampled Metric Counter + 47 Register */ + +#define XAPM_CTL_OFFSET 0x00000300U /**< Control Register */ + +#define XAPM_ID_OFFSET 0x00000304U /**< Latency ID Register */ + +#define XAPM_IDMASK_OFFSET 0x00000308U /**< ID Mask Register */ + +#define XAPM_RID_OFFSET 0x0000030CU /**< Latency Write ID Register */ + +#define XAPM_RIDMASK_OFFSET 0x00000310U /**< Read ID Mask Register */ + +#define XAPM_FEC_OFFSET 0x00000400U /**< Flag Enable + Control Register */ + +#define XAPM_SWD_OFFSET 0x00000404U /**< Software-written + Data Register */ + +/* @} */ + +/** + * @name AXI Monitor Sample Interval Control Register mask(s) + * @{ + */ + +#define XAPM_SICR_MCNTR_RST_MASK 0x00000100U /**< Enable the Metric + Counter Reset */ +#define XAPM_SICR_LOAD_MASK 0x00000002U /**< Load the Sample Interval + * Register Value into the + * counter */ +#define XAPM_SICR_ENABLE_MASK 0x00000001U /**< Enable the downcounter */ + +/*@}*/ + + +/** @name Interrupt Status/Enable Register Bit Definitions and Masks + * @{ + */ + +#define XAPM_IXR_MC9_OVERFLOW_MASK 0x00001000U /**< Metric Counter 9 + * Overflow> */ +#define XAPM_IXR_MC8_OVERFLOW_MASK 0x00000800U /**< Metric Counter 8 + * Overflow> */ +#define XAPM_IXR_MC7_OVERFLOW_MASK 0x00000400U /**< Metric Counter 7 + * Overflow> */ +#define XAPM_IXR_MC6_OVERFLOW_MASK 0x00000200U /**< Metric Counter 6 + * Overflow> */ +#define XAPM_IXR_MC5_OVERFLOW_MASK 0x00000100U /**< Metric Counter 5 + * Overflow> */ +#define XAPM_IXR_MC4_OVERFLOW_MASK 0x00000080U /**< Metric Counter 4 + * Overflow> */ +#define XAPM_IXR_MC3_OVERFLOW_MASK 0x00000040U /**< Metric Counter 3 + * Overflow> */ +#define XAPM_IXR_MC2_OVERFLOW_MASK 0x00000020U /**< Metric Counter 2 + * Overflow> */ +#define XAPM_IXR_MC1_OVERFLOW_MASK 0x00000010U /**< Metric Counter 1 + * Overflow> */ +#define XAPM_IXR_MC0_OVERFLOW_MASK 0x00000008U /**< Metric Counter 0 + * Overflow> */ +#define XAPM_IXR_FIFO_FULL_MASK 0x00000004U /**< Event Log FIFO + * full> */ +#define XAPM_IXR_SIC_OVERFLOW_MASK 0x00000002U /**< Sample Interval + * Counter Overflow> */ +#define XAPM_IXR_GCC_OVERFLOW_MASK 0x00000001U /**< Global Clock Counter + * Overflow> */ +#define XAPM_IXR_ALL_MASK (XAPM_IXR_SIC_OVERFLOW_MASK | \ + XAPM_IXR_GCC_OVERFLOW_MASK | \ + XAPM_IXR_FIFO_FULL_MASK | \ + XAPM_IXR_MC0_OVERFLOW_MASK | \ + XAPM_IXR_MC1_OVERFLOW_MASK | \ + XAPM_IXR_MC2_OVERFLOW_MASK | \ + XAPM_IXR_MC3_OVERFLOW_MASK | \ + XAPM_IXR_MC4_OVERFLOW_MASK | \ + XAPM_IXR_MC5_OVERFLOW_MASK | \ + XAPM_IXR_MC6_OVERFLOW_MASK | \ + XAPM_IXR_MC7_OVERFLOW_MASK | \ + XAPM_IXR_MC8_OVERFLOW_MASK | \ + XAPM_IXR_MC9_OVERFLOW_MASK) +/* @} */ + +/** + * @name AXI Monitor Control Register mask(s) + * @{ + */ + +#define XAPM_CR_FIFO_RESET_MASK 0x02000000U + /**< FIFO Reset */ +#define XAPM_CR_GCC_RESET_MASK 0x00020000U + /**< Global Clk + Counter Reset */ +#define XAPM_CR_GCC_ENABLE_MASK 0x00010000U + /**< Global Clk + Counter Enable */ +#define XAPM_CR_EVTLOG_EXTTRIGGER_MASK 0x00000200U + /**< Enable External trigger + to start event Log */ +#define XAPM_CR_EVENTLOG_ENABLE_MASK 0x00000100U + /**< Event Log Enable */ + +#define XAPM_CR_RDLATENCY_END_MASK 0x00000080U + /**< Write Latency + End point */ +#define XAPM_CR_RDLATENCY_START_MASK 0x00000040U + /**< Read Latency + Start point */ +#define XAPM_CR_WRLATENCY_END_MASK 0x00000020U + /**< Write Latency + End point */ +#define XAPM_CR_WRLATENCY_START_MASK 0x00000010U + /**< Write Latency + Start point */ +#define XAPM_CR_IDFILTER_ENABLE_MASK 0x00000008U + /**< ID Filter Enable */ + +#define XAPM_CR_MCNTR_EXTTRIGGER_MASK 0x00000004U + /**< Enable External + trigger to start + Metric Counters */ +#define XAPM_CR_MCNTR_RESET_MASK 0x00000002U + /**< Metrics Counter + Reset */ +#define XAPM_CR_MCNTR_ENABLE_MASK 0x00000001U + /**< Metrics Counter + Enable */ +/*@}*/ + +/** + * @name AXI Monitor ID Register mask(s) + * @{ + */ + +#define XAPM_ID_RID_MASK 0xFFFF0000U /**< Read ID */ + +#define XAPM_ID_WID_MASK 0x0000FFFFU /**< Write ID */ + +/*@}*/ + +/** + * @name AXI Monitor ID Mask Register mask(s) + * @{ + */ + +#define XAPM_MASKID_RID_MASK 0xFFFF0000U /**< Read ID Mask */ + +#define XAPM_MASKID_WID_MASK 0x0000FFFFU /**< Write ID Mask*/ + +/*@}*/ + +/**************************** Type Definitions *******************************/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +/*****************************************************************************/ +/** +* +* Read a register of the AXI Performance Monitor device. This macro provides +* register access to all registers using the register offsets defined above. +* +* @param BaseAddress contains the base address of the device. +* @param RegOffset is the offset of the register to read. +* +* @return The contents of the register. +* +* @note C-style Signature: +* u32 XAxiPmon_ReadReg(u32 BaseAddress, u32 RegOffset); +* +******************************************************************************/ +#define XAxiPmon_ReadReg(BaseAddress, RegOffset) \ + (Xil_In32((BaseAddress) + (RegOffset))) + +/*****************************************************************************/ +/** +* +* Write a register of the AXI Performance Monitor device. This macro provides +* register access to all registers using the register offsets defined above. +* +* @param BaseAddress contains the base address of the device. +* @param RegOffset is the offset of the register to write. +* @param Data is the value to write to the register. +* +* @return None. +* +* @note C-style Signature: +* void XAxiPmon_WriteReg(u32 BaseAddress, +* u32 RegOffset,u32 Data) +* +******************************************************************************/ +#define XAxiPmon_WriteReg(BaseAddress, RegOffset, Data) \ + (Xil_Out32((BaseAddress) + (RegOffset), (Data))) + +/************************** Function Prototypes ******************************/ + +#ifdef __cplusplus +} +#endif + +#endif /* End of protection macro. */ +/** @} */ diff --git a/src/Xilinx/include/xbasic_types.h b/src/Xilinx/include/xbasic_types.h new file mode 100644 index 0000000..787212c --- /dev/null +++ b/src/Xilinx/include/xbasic_types.h @@ -0,0 +1,119 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xbasic_types.h +* +* +* @note Dummy File for backwards compatibility +* + +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a adk   1/31/14  Added in bsp common folder for backward compatibility
+*
+* +******************************************************************************/ + +#ifndef XBASIC_TYPES_H /* prevent circular inclusions */ +#define XBASIC_TYPES_H /* by using protection macros */ + +/** @name Legacy types + * Deprecated legacy types. + * @{ + */ +typedef unsigned char Xuint8; /**< unsigned 8-bit */ +typedef char Xint8; /**< signed 8-bit */ +typedef unsigned short Xuint16; /**< unsigned 16-bit */ +typedef short Xint16; /**< signed 16-bit */ +typedef unsigned long Xuint32; /**< unsigned 32-bit */ +typedef long Xint32; /**< signed 32-bit */ +typedef float Xfloat32; /**< 32-bit floating point */ +typedef double Xfloat64; /**< 64-bit double precision FP */ +typedef unsigned long Xboolean; /**< boolean (XTRUE or XFALSE) */ + +#if !defined __XUINT64__ +typedef struct +{ + Xuint32 Upper; + Xuint32 Lower; +} Xuint64; +#endif + +/** @name New types + * New simple types. + * @{ + */ +#ifndef __KERNEL__ +#ifndef XIL_TYPES_H +typedef Xuint32 u32; +typedef Xuint16 u16; +typedef Xuint8 u8; +#endif +#else +#include +#endif + +#ifndef TRUE +# define TRUE 1U +#endif + +#ifndef FALSE +# define FALSE 0U +#endif + +#ifndef NULL +#define NULL 0U +#endif + +/* + * Xilinx NULL, TRUE and FALSE legacy support. Deprecated. + * Please use NULL, TRUE and FALSE + */ +#define XNULL NULL +#define XTRUE TRUE +#define XFALSE FALSE + +/* + * This file is deprecated and users + * should use xil_types.h and xil_assert.h\n\r + */ +#warning The xbasics_type.h file is deprecated and users should use xil_types.h and xil_assert. +#warning Please refer the Standalone BSP UG647 for further details + + +#endif /* end of protection macro */ diff --git a/src/Xilinx/include/xbram.h b/src/Xilinx/include/xbram.h new file mode 100644 index 0000000..3005132 --- /dev/null +++ b/src/Xilinx/include/xbram.h @@ -0,0 +1,225 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2017 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xbram.h +* @addtogroup bram_v4_2 +* @{ +* @details +* +* If ECC is not enabled, this driver exists only to allow the tools to +* create a memory test application and to populate xparameters.h with memory +* range constants. In this case there is no source code. +* +* If ECC is enabled, this file contains the software API definition of the +* Xilinx BRAM Interface Controller (XBram) device driver. +* +* The Xilinx BRAM controller is a soft IP core designed for Xilinx +* FPGAs and contains the following general features: +* - LMB v2.0 bus interfaces with byte enable support +* - Used in conjunction with bram_block peripheral to provide fast BRAM +* memory solution for MicroBlaze ILMB and DLMB ports +* - Supports byte, half-word, and word transfers +* - Supports optional BRAM error correction and detection. +* +* The driver provides interrupt management functions. Implementation of +* interrupt handlers is left to the user. Refer to the provided interrupt +* example in the examples directory for details. +* +* This driver is intended to be RTOS and processor independent. Any needs for +* dynamic memory management, threads or thread mutual exclusion, virtual +* memory, or cache control must be satisfied by the layer above this driver. +* +* Initialization & Configuration +* +* The XBram_Config structure is used by the driver to configure +* itself. This configuration structure is typically created by the tool-chain +* based on HW build properties. +* +* To support multiple runtime loading and initialization strategies employed +* by various operating systems, the driver instance can be initialized as +* follows: +* +* - XBram_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - +* Uses a configuration structure provided by the caller. If running in a +* system with address translation, the provided virtual memory base address +* replaces the physical address present in the configuration structure. +* +* @note +* +* This API utilizes 32 bit I/O to the BRAM registers. With less +* than 32 bits, the unused bits from registers are read as zero and written as +* don't cares. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 3.00a sa  05/11/10 Added ECC support
+* 3.01a sa  01/13/12  Changed Selftest API from
+*		      XBram_SelfTest(XBram *InstancePtr) to
+*		      XBram_SelfTest(XBram *InstancePtr, u8 IntMask) and
+*		      fixed a problem with interrupt generation for CR 639274
+*		      Modified Selftest example to return XST_SUCCESS when
+*		      ECC is not enabled and return XST_FAILURE when ECC is
+*		      enabled and Control Base Address is zero (CR 636581)
+*		      Modified Selftest to use correct CorrectableCounterBits
+*		      for CR 635655
+*		      Updated to check CorrectableFailingDataRegs in the case
+*		      of LMB BRAM.
+* 		      Added CorrectableFailingDataRegs and
+*		      UncorrectableFailingDataRegs to the config structure to
+*		      distinguish between AXI BRAM and LMB BRAM.
+*		      These registers are not present in the current version of
+*		      the AXI BRAM Controller.
+* 3.02a sa 04/16/12   Added test of byte and halfword read-modify-write
+* 3.02a sa 04/16/12   Modified driver tcl to sort the address parameters
+*  	       	      to support both xps and vivado designs.
+* 3.02a adk 24/4/13   Modified the tcl file to avoid warnings
+*	       	      when ecc is disabled cr:705002.
+* 3.03a bss 05/22/13  Added Xil_DCacheFlushRange in xbram_selftest.c to
+*		      flush the Cache after writing to BRAM in InjectErrors
+*		      API(CR #719011)
+* 4.0   adk  19/12/13 Updated as per the New Tcl API's
+* 4.1   sk   11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
+*                     Changed the prototype of XBram_CfgInitialize API.
+*       ms  01/23/17 Modified xil_printf statement in main function for all
+*                    examples to ensure that "Successfully ran" and "Failed"
+*                    strings are available in all examples. This is a fix
+*                    for CR-965028.
+*       ms  03/17/17 Added readme.txt file in examples folder for doxygen
+*                    generation.
+* 4.2   ms  04/18/17 Modified tcl file to add suffix U for all macro
+*                    definitions of bram in xparameters.h
+*       ms  08/07/17 Fixed compilation warnings in xbram_sinit.c
+*
+*****************************************************************************/ +#ifndef XBRAM_H /* prevent circular inclusions */ +#define XBRAM_H /* by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files ********************************/ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xstatus.h" +#include "xbram_hw.h" + +/************************** Constant Definitions ****************************/ + + +/**************************** Type Definitions ******************************/ + +/** + * This typedef contains configuration information for the device. + */ +typedef struct { + u16 DeviceId; /**< Unique ID of device */ + u32 DataWidth; /**< BRAM data width */ + int EccPresent; /**< Is ECC supported in H/W */ + int FaultInjectionPresent; /**< Is Fault Injection + * supported in H/W */ + int CorrectableFailingRegisters; /**< Is Correctable Failing Registers + * supported in H/W */ + int CorrectableFailingDataRegs; /**< Is Correctable Failing Data + * Registers supported in H/W */ + int UncorrectableFailingRegisters; /**< Is Un-correctable Failing + * Registers supported in H/W */ + int UncorrectableFailingDataRegs; /**< Is Un-correctable Failing Data + * Registers supported in H/W */ + int EccStatusInterruptPresent; /**< Are ECC status and interrupts + * supported in H/W */ + int CorrectableCounterBits; /**< Number of bits in the + * Correctable Error Counter */ + int EccOnOffRegister; /**< Is ECC on/off register supported + * in h/w */ + int EccOnOffResetValue; /**< Reset value of the ECC on/off + * register in h/w */ + int WriteAccess; /**< Is write access enabled in + * h/w */ + u32 MemBaseAddress; /**< Device memory base address */ + u32 MemHighAddress; /**< Device memory high address */ + UINTPTR CtrlBaseAddress; /**< Device register base address.*/ + UINTPTR CtrlHighAddress; /**< Device register base address.*/ +} XBram_Config; + +/** + * The XBram driver instance data. The user is required to + * allocate a variable of this type for every BRAM device in the + * system. A pointer to a variable of this type is then passed to the driver + * API functions. + */ +typedef struct { + XBram_Config Config; /* BRAM config structure */ + u32 IsReady; /* Device is initialized and ready */ +} XBram; + +/***************** Macros (Inline Functions) Definitions ********************/ + + +/************************** Function Prototypes *****************************/ + +/* + * Functions in xbram_sinit.c + */ +XBram_Config *XBram_LookupConfig(u16 DeviceId); + +/* + * Functions implemented in xbram.c + */ +int XBram_CfgInitialize(XBram *InstancePtr, XBram_Config *Config, + UINTPTR EffectiveAddr); + +/* + * Functions implemented in xbram_selftest.c + */ +int XBram_SelfTest(XBram *InstancePtr, u8 IntMask); + +/* + * Functions implemented in xbram_intr.c + */ +void XBram_InterruptEnable(XBram *InstancePtr, u32 Mask); +void XBram_InterruptDisable(XBram *InstancePtr, u32 Mask); +void XBram_InterruptClear(XBram *InstancePtr, u32 Mask); +u32 XBram_InterruptGetEnabled(XBram *InstancePtr); +u32 XBram_InterruptGetStatus(XBram *InstancePtr); + +#ifdef __cplusplus +} +#endif + +#endif /* end of protection macro */ +/** @} */ diff --git a/src/Xilinx/include/xbram_hw.h b/src/Xilinx/include/xbram_hw.h new file mode 100644 index 0000000..1c28493 --- /dev/null +++ b/src/Xilinx/include/xbram_hw.h @@ -0,0 +1,409 @@ +/****************************************************************************** +* +* Copyright (C) 2011 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xbram_hw.h +* @addtogroup bram_v4_2 +* @{ +* +* This header file contains identifiers and driver functions (or +* macros) that can be used to access the device. The user should refer to the +* hardware device specification for more details of the device operation. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sa   24/11/10 First release
+*
+* +******************************************************************************/ +#ifndef XBRAM_HW_H /* prevent circular inclusions */ +#define XBRAM_HW_H /* by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files *********************************/ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xil_io.h" + +/************************** Constant Definitions *****************************/ + +/** @name Registers + * + * Register offsets for this device. + * @{ + */ + +#define XBRAM_ECC_STATUS_OFFSET 0x0 /**< ECC status Register */ +#define XBRAM_ECC_EN_IRQ_OFFSET 0x4 /**< ECC interrupt enable Register */ +#define XBRAM_ECC_ON_OFF_OFFSET 0x8 /**< ECC on/off register */ +#define XBRAM_CE_CNT_OFFSET 0xC /**< Correctable error counter Register */ + +#define XBRAM_CE_FFD_0_OFFSET 0x100 /**< Correctable error first failing + * data Register, 31-0 */ +#define XBRAM_CE_FFD_1_OFFSET 0x104 /**< Correctable error first failing + * data Register, 63-32 */ +#define XBRAM_CE_FFD_2_OFFSET 0x108 /**< Correctable error first failing + * data Register, 95-64 */ +#define XBRAM_CE_FFD_3_OFFSET 0x10C /**< Correctable error first failing + * data Register, 127-96 */ +#define XBRAM_CE_FFD_4_OFFSET 0x110 /**< Correctable error first failing + * data Register, 159-128 */ +#define XBRAM_CE_FFD_5_OFFSET 0x114 /**< Correctable error first failing + * data Register, 191-160 */ +#define XBRAM_CE_FFD_6_OFFSET 0x118 /**< Correctable error first failing + * data Register, 223-192 */ +#define XBRAM_CE_FFD_7_OFFSET 0x11C /**< Correctable error first failing + * data Register, 255-224 */ +#define XBRAM_CE_FFD_8_OFFSET 0x120 /**< Correctable error first failing + * data Register, 287-256 */ +#define XBRAM_CE_FFD_9_OFFSET 0x124 /**< Correctable error first failing + * data Register, 319-288 */ +#define XBRAM_CE_FFD_10_OFFSET 0x128 /**< Correctable error first failing + * data Register, 351-320 */ +#define XBRAM_CE_FFD_11_OFFSET 0x12C /**< Correctable error first failing + * data Register, 383-352 */ +#define XBRAM_CE_FFD_12_OFFSET 0x130 /**< Correctable error first failing + * data Register, 415-384 */ +#define XBRAM_CE_FFD_13_OFFSET 0x134 /**< Correctable error first failing + * data Register, 447-416 */ +#define XBRAM_CE_FFD_14_OFFSET 0x138 /**< Correctable error first failing + * data Register, 479-448 */ +#define XBRAM_CE_FFD_15_OFFSET 0x13C /**< Correctable error first failing + * data Register, 511-480 */ +#define XBRAM_CE_FFD_16_OFFSET 0x140 /**< Correctable error first failing + * data Register, 543-512 */ +#define XBRAM_CE_FFD_17_OFFSET 0x144 /**< Correctable error first failing + * data Register, 575-544 */ +#define XBRAM_CE_FFD_18_OFFSET 0x148 /**< Correctable error first failing + * data Register, 607-576 */ +#define XBRAM_CE_FFD_19_OFFSET 0x14C /**< Correctable error first failing + * data Register, 639-608 */ +#define XBRAM_CE_FFD_20_OFFSET 0x150 /**< Correctable error first failing + * data Register, 671-640 */ +#define XBRAM_CE_FFD_21_OFFSET 0x154 /**< Correctable error first failing + * data Register, 703-672 */ +#define XBRAM_CE_FFD_22_OFFSET 0x158 /**< Correctable error first failing + * data Register, 735-704 */ +#define XBRAM_CE_FFD_23_OFFSET 0x15C /**< Correctable error first failing + * data Register, 767-736 */ +#define XBRAM_CE_FFD_24_OFFSET 0x160 /**< Correctable error first failing + * data Register, 799-768 */ +#define XBRAM_CE_FFD_25_OFFSET 0x164 /**< Correctable error first failing + * data Register, 831-800 */ +#define XBRAM_CE_FFD_26_OFFSET 0x168 /**< Correctable error first failing + * data Register, 863-832 */ +#define XBRAM_CE_FFD_27_OFFSET 0x16C /**< Correctable error first failing + * data Register, 895-864 */ +#define XBRAM_CE_FFD_28_OFFSET 0x170 /**< Correctable error first failing + * data Register, 927-896 */ +#define XBRAM_CE_FFD_29_OFFSET 0x174 /**< Correctable error first failing + * data Register, 959-928 */ +#define XBRAM_CE_FFD_30_OFFSET 0x178 /**< Correctable error first failing + * data Register, 991-960 */ +#define XBRAM_CE_FFD_31_OFFSET 0x17C /**< Correctable error first failing + * data Register, 1023-992 */ + +#define XBRAM_CE_FFE_0_OFFSET 0x180 /**< Correctable error first failing + * ECC Register, 31-0 */ +#define XBRAM_CE_FFE_1_OFFSET 0x184 /**< Correctable error first failing + * ECC Register, 63-32 */ +#define XBRAM_CE_FFE_2_OFFSET 0x188 /**< Correctable error first failing + * ECC Register, 95-64 */ +#define XBRAM_CE_FFE_3_OFFSET 0x18C /**< Correctable error first failing + * ECC Register, 127-96 */ +#define XBRAM_CE_FFE_4_OFFSET 0x190 /**< Correctable error first failing + * ECC Register, 159-128 */ +#define XBRAM_CE_FFE_5_OFFSET 0x194 /**< Correctable error first failing + * ECC Register, 191-160 */ +#define XBRAM_CE_FFE_6_OFFSET 0x198 /**< Correctable error first failing + * ECC Register, 223-192 */ +#define XBRAM_CE_FFE_7_OFFSET 0x19C /**< Correctable error first failing + * ECC Register, 255-224 */ + +#define XBRAM_CE_FFA_0_OFFSET 0x1C0 /**< Correctable error first failing + * address Register 31-0 */ +#define XBRAM_CE_FFA_1_OFFSET 0x1C4 /**< Correctable error first failing + * address Register 63-32 */ + +#define XBRAM_UE_FFD_0_OFFSET 0x200 /**< Uncorrectable error first failing + * data Register, 31-0 */ +#define XBRAM_UE_FFD_1_OFFSET 0x204 /**< Uncorrectable error first failing + * data Register, 63-32 */ +#define XBRAM_UE_FFD_2_OFFSET 0x208 /**< Uncorrectable error first failing + * data Register, 95-64 */ +#define XBRAM_UE_FFD_3_OFFSET 0x20C /**< Uncorrectable error first failing + * data Register, 127-96 */ +#define XBRAM_UE_FFD_4_OFFSET 0x210 /**< Uncorrectable error first failing + * data Register, 159-128 */ +#define XBRAM_UE_FFD_5_OFFSET 0x214 /**< Uncorrectable error first failing + * data Register, 191-160 */ +#define XBRAM_UE_FFD_6_OFFSET 0x218 /**< Uncorrectable error first failing + * data Register, 223-192 */ +#define XBRAM_UE_FFD_7_OFFSET 0x21C /**< Uncorrectable error first failing + * data Register, 255-224 */ +#define XBRAM_UE_FFD_8_OFFSET 0x220 /**< Uncorrectable error first failing + * data Register, 287-256 */ +#define XBRAM_UE_FFD_9_OFFSET 0x224 /**< Uncorrectable error first failing + * data Register, 319-288 */ +#define XBRAM_UE_FFD_10_OFFSET 0x228 /**< Uncorrectable error first failing + * data Register, 351-320 */ +#define XBRAM_UE_FFD_11_OFFSET 0x22C /**< Uncorrectable error first failing + * data Register, 383-352 */ +#define XBRAM_UE_FFD_12_OFFSET 0x230 /**< Uncorrectable error first failing + * data Register, 415-384 */ +#define XBRAM_UE_FFD_13_OFFSET 0x234 /**< Uncorrectable error first failing + * data Register, 447-416 */ +#define XBRAM_UE_FFD_14_OFFSET 0x238 /**< Uncorrectable error first failing + * data Register, 479-448 */ +#define XBRAM_UE_FFD_15_OFFSET 0x23C /**< Uncorrectable error first failing + * data Register, 511-480 */ +#define XBRAM_UE_FFD_16_OFFSET 0x240 /**< Uncorrectable error first failing + * data Register, 543-512 */ +#define XBRAM_UE_FFD_17_OFFSET 0x244 /**< Uncorrectable error first failing + * data Register, 575-544 */ +#define XBRAM_UE_FFD_18_OFFSET 0x248 /**< Uncorrectable error first failing + * data Register, 607-576 */ +#define XBRAM_UE_FFD_19_OFFSET 0x24C /**< Uncorrectable error first failing + * data Register, 639-608 */ +#define XBRAM_UE_FFD_20_OFFSET 0x250 /**< Uncorrectable error first failing + * data Register, 671-640 */ +#define XBRAM_UE_FFD_21_OFFSET 0x254 /**< Uncorrectable error first failing + * data Register, 703-672 */ +#define XBRAM_UE_FFD_22_OFFSET 0x258 /**< Uncorrectable error first failing + * data Register, 735-704 */ +#define XBRAM_UE_FFD_23_OFFSET 0x25C /**< Uncorrectable error first failing + * data Register, 767-736 */ +#define XBRAM_UE_FFD_24_OFFSET 0x260 /**< Uncorrectable error first failing + * data Register, 799-768 */ +#define XBRAM_UE_FFD_25_OFFSET 0x264 /**< Uncorrectable error first failing + * data Register, 831-800 */ +#define XBRAM_UE_FFD_26_OFFSET 0x268 /**< Uncorrectable error first failing + * data Register, 863-832 */ +#define XBRAM_UE_FFD_27_OFFSET 0x26C /**< Uncorrectable error first failing + * data Register, 895-864 */ +#define XBRAM_UE_FFD_28_OFFSET 0x270 /**< Uncorrectable error first failing + * data Register, 927-896 */ +#define XBRAM_UE_FFD_29_OFFSET 0x274 /**< Uncorrectable error first failing + * data Register, 959-928 */ +#define XBRAM_UE_FFD_30_OFFSET 0x278 /**< Uncorrectable error first failing + * data Register, 991-960 */ +#define XBRAM_UE_FFD_31_OFFSET 0x27C /**< Uncorrectable error first failing + * data Register, 1023-992 */ + +#define XBRAM_UE_FFE_0_OFFSET 0x280 /**< Uncorrectable error first failing + * ECC Register, 31-0 */ +#define XBRAM_UE_FFE_1_OFFSET 0x284 /**< Uncorrectable error first failing + * ECC Register, 63-32 */ +#define XBRAM_UE_FFE_2_OFFSET 0x288 /**< Uncorrectable error first failing + * ECC Register, 95-64 */ +#define XBRAM_UE_FFE_3_OFFSET 0x28C /**< Uncorrectable error first failing + * ECC Register, 127-96 */ +#define XBRAM_UE_FFE_4_OFFSET 0x290 /**< Uncorrectable error first failing + * ECC Register, 159-128 */ +#define XBRAM_UE_FFE_5_OFFSET 0x294 /**< Uncorrectable error first failing + * ECC Register, 191-160 */ +#define XBRAM_UE_FFE_6_OFFSET 0x298 /**< Uncorrectable error first failing + * ECC Register, 223-192 */ +#define XBRAM_UE_FFE_7_OFFSET 0x29C /**< Uncorrectable error first failing + * ECC Register, 255-224 */ + +#define XBRAM_UE_FFA_0_OFFSET 0x2C0 /**< Uncorrectable error first failing + * address Register 31-0 */ +#define XBRAM_UE_FFA_1_OFFSET 0x2C4 /**< Uncorrectable error first failing + * address Register 63-32 */ + +#define XBRAM_FI_D_0_OFFSET 0x300 /**< Fault injection Data Register, + * 31-0 */ +#define XBRAM_FI_D_1_OFFSET 0x304 /**< Fault injection Data Register, + * 63-32 */ +#define XBRAM_FI_D_2_OFFSET 0x308 /**< Fault injection Data Register, + * 95-64 */ +#define XBRAM_FI_D_3_OFFSET 0x30C /**< Fault injection Data Register, + * 127-96 */ +#define XBRAM_FI_D_4_OFFSET 0x310 /**< Fault injection Data Register, + * 159-128 */ +#define XBRAM_FI_D_5_OFFSET 0x314 /**< Fault injection Data Register, + * 191-160 */ +#define XBRAM_FI_D_6_OFFSET 0x318 /**< Fault injection Data Register, + * 223-192 */ +#define XBRAM_FI_D_7_OFFSET 0x31C /**< Fault injection Data Register, + * 255-224 */ +#define XBRAM_FI_D_8_OFFSET 0x320 /**< Fault injection Data Register, + * 287-256 */ +#define XBRAM_FI_D_9_OFFSET 0x324 /**< Fault injection Data Register, + * 319-288 */ +#define XBRAM_FI_D_10_OFFSET 0x328 /**< Fault injection Data Register, + * 351-320 */ +#define XBRAM_FI_D_11_OFFSET 0x32C /**< Fault injection Data Register, + * 383-352 */ +#define XBRAM_FI_D_12_OFFSET 0x330 /**< Fault injection Data Register, + * 415-384 */ +#define XBRAM_FI_D_13_OFFSET 0x334 /**< Fault injection Data Register, + * 447-416 */ +#define XBRAM_FI_D_14_OFFSET 0x338 /**< Fault injection Data Register, + * 479-448 */ +#define XBRAM_FI_D_15_OFFSET 0x33C /**< Fault injection Data Register, + * 511-480 */ +#define XBRAM_FI_D_16_OFFSET 0x340 /**< Fault injection Data Register, + * 543-512 */ +#define XBRAM_FI_D_17_OFFSET 0x344 /**< Fault injection Data Register, + * 575-544 */ +#define XBRAM_FI_D_18_OFFSET 0x348 /**< Fault injection Data Register, + * 607-576 */ +#define XBRAM_FI_D_19_OFFSET 0x34C /**< Fault injection Data Register, + * 639-608 */ +#define XBRAM_FI_D_20_OFFSET 0x350 /**< Fault injection Data Register, + * 671-640 */ +#define XBRAM_FI_D_21_OFFSET 0x354 /**< Fault injection Data Register, + * 703-672 */ +#define XBRAM_FI_D_22_OFFSET 0x358 /**< Fault injection Data Register, + * 735-704 */ +#define XBRAM_FI_D_23_OFFSET 0x35C /**< Fault injection Data Register, + * 767-736 */ +#define XBRAM_FI_D_24_OFFSET 0x360 /**< Fault injection Data Register, + * 799-768 */ +#define XBRAM_FI_D_25_OFFSET 0x364 /**< Fault injection Data Register, + * 831-800 */ +#define XBRAM_FI_D_26_OFFSET 0x368 /**< Fault injection Data Register, + * 863-832 */ +#define XBRAM_FI_D_27_OFFSET 0x36C /**< Fault injection Data Register, + * 895-864 */ +#define XBRAM_FI_D_28_OFFSET 0x370 /**< Fault injection Data Register, + * 927-896 */ +#define XBRAM_FI_D_29_OFFSET 0x374 /**< Fault injection Data Register, + * 959-928 */ +#define XBRAM_FI_D_30_OFFSET 0x378 /**< Fault injection Data Register, + * 991-960 */ +#define XBRAM_FI_D_31_OFFSET 0x37C /**< Fault injection Data Register, + * 1023-992 */ + +#define XBRAM_FI_ECC_0_OFFSET 0x380 /**< Fault injection ECC Register, + * 31-0 */ +#define XBRAM_FI_ECC_1_OFFSET 0x384 /**< Fault injection ECC Register, + * 63-32 */ +#define XBRAM_FI_ECC_2_OFFSET 0x388 /**< Fault injection ECC Register, + * 95-64 */ +#define XBRAM_FI_ECC_3_OFFSET 0x38C /**< Fault injection ECC Register, + * 127-96 */ +#define XBRAM_FI_ECC_4_OFFSET 0x390 /**< Fault injection ECC Register, + * 159-128 */ +#define XBRAM_FI_ECC_5_OFFSET 0x394 /**< Fault injection ECC Register, + * 191-160 */ +#define XBRAM_FI_ECC_6_OFFSET 0x398 /**< Fault injection ECC Register, + * 223-192 */ +#define XBRAM_FI_ECC_7_OFFSET 0x39C /**< Fault injection ECC Register, + * 255-224 */ + + +/* @} */ + +/** @name Interrupt Status and Enable Register bitmaps and masks + * + * Bit definitions for the ECC status register and ECC interrupt enable register. + * @{ + */ +#define XBRAM_IR_CE_MASK 0x2 /**< Mask for the correctable error */ +#define XBRAM_IR_UE_MASK 0x1 /**< Mask for the uncorrectable error */ +#define XBRAM_IR_ALL_MASK 0x3 /**< Mask of all bits */ +/*@}*/ + + +/**************************** Type Definitions *******************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + +#define XBram_In32 Xil_In32 +#define XBram_Out32 Xil_Out32 + +#define XBram_In16 Xil_In16 +#define XBram_Out16 Xil_Out16 + +#define XBram_In8 Xil_In8 +#define XBram_Out8 Xil_Out8 + + +/****************************************************************************/ +/** +* +* Write a value to a BRAM register. A 32 bit write is performed. +* +* @param BaseAddress is the base address of the BRAM device register. +* @param RegOffset is the register offset from the base to write to. +* @param Data is the data written to the register. +* +* @return None. +* +* @note C-style signature: +* void XBram_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data) +* +****************************************************************************/ +#define XBram_WriteReg(BaseAddress, RegOffset, Data) \ + XBram_Out32((BaseAddress) + (RegOffset), (u32)(Data)) + +/****************************************************************************/ +/** +* +* Read a value from a BRAM register. A 32 bit read is performed. +* +* @param BaseAddress is the base address of the BRAM device registers. +* @param RegOffset is the register offset from the base to read from. +* +* @return Data read from the register. +* +* @note C-style signature: +* u32 XBram_ReadReg(u32 BaseAddress, u32 RegOffset) +* +****************************************************************************/ +#define XBram_ReadReg(BaseAddress, RegOffset) \ + XBram_In32((BaseAddress) + (RegOffset)) + +/************************** Function Prototypes ******************************/ + +/************************** Variable Definitions *****************************/ + + + +#ifdef __cplusplus +} +#endif + +#endif /* end of protection macro */ +/** @} */ diff --git a/src/Xilinx/include/xcanps.h b/src/Xilinx/include/xcanps.h new file mode 100644 index 0000000..9feb45e --- /dev/null +++ b/src/Xilinx/include/xcanps.h @@ -0,0 +1,577 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xcanps.h +* @addtogroup canps_v3_2 +* @{ +* @details +* +* The Xilinx CAN driver component. This component supports the Xilinx +* CAN Controller. +* +* The CAN Controller supports the following features: +* - Confirms to the ISO 11898-1, CAN 2.0A and CAN 2.0B standards. +* - Supports both Standard (11 bit Identifier) and Extended (29 bit +* Identifier) frames. +* - Supports Bit Rates up to 1 Mbps. +* - Transmit message object FIFO with a user configurable depth of +* up to 64 message objects. +* - Transmit prioritization through one TX High Priority Buffer. +* - Receive message object FIFO with a user configurable depth of +* up to 64 message objects. +* - Watermark interrupts for Rx FIFO with configurable Watermark. +* - Acceptance filtering with 4 acceptance filters. +* - Sleep mode with automatic wake up. +* - Loop Back mode for diagnostic applications. +* - Snoop mode for diagnostic applications. +* - Maskable Error and Status Interrupts. +* - Readable Error Counters. +* - External PHY chip required. +* - Receive Timestamp. +* +* The device driver supports all the features listed above, if applicable. +* +* Driver Description +* +* The device driver enables higher layer software (e.g., an application) to +* communicate to the CAN. The driver handles transmission and reception of +* CAN frames, as well as configuration of the controller. The driver is simply a +* pass-through mechanism between a protocol stack and the CAN. A single device +* driver can support multiple CANs. +* +* Since the driver is a simple pass-through mechanism between a protocol stack +* and the CAN, no assembly or disassembly of CAN frames is done at the +* driver-level. This assumes that the protocol stack passes a correctly +* formatted CAN frame to the driver for transmission, and that the driver +* does not validate the contents of an incoming frame +* +* Operation Modes +* +* The CAN controller supports the following modes of operation: +* - Configuration Mode: In this mode the CAN timing parameters and +* Baud Rate Pre-scalar parameters can be changed. In this mode the CAN +* controller loses synchronization with the CAN bus and drives a +* constant recessive bit on the bus line. The Error Counter Register are +* reset. The CAN controller does not receive or transmit any messages +* even if there are pending transmit requests from the TX FIFO or the TX +* High Priority Buffer. The Storage FIFOs and the CAN configuration +* registers are still accessible. +* - Normal Mode:In Normal Mode the CAN controller participates in bus +* communication, by transmitting and receiving messages. +* - Sleep Mode: In Sleep Mode the CAN Controller does not transmit any +* messages. However, if any other node transmits a message, then the CAN +* Controller receives the transmitted message and exits from Sleep Mode. +* If there are new transmission requests from either the TX FIFO or the +* TX High Priority Buffer when the CAN Controller is in Sleep Mode, these +* requests are not serviced, and the CAN Controller continues to remain +* in Sleep Mode. Interrupts are generated when the CAN controller enters +* Sleep mode or Wakes up from Sleep mode. +* - Loop Back Mode: In Loop Back mode, the CAN controller transmits a +* recessive bit stream on to the CAN Bus. Any message that is transmitted +* is looped back to the �Rx� line and acknowledged. The CAN controller +* thus receives any message that it transmits. It does not participate in +* normal bus communication and does not receive any messages that are +* transmitted by other CAN nodes. This mode is used for diagnostic +* purposes. +* - Snoop Mode: In Snoop mode, the CAN controller transmits a +* recessive bit stream on to the CAN Bus and does not participate +* in normal bus communication but receives messages that are transmitted +* by other CAN nodes. This mode is used for diagnostic purposes. +* +* +* Buffer Alignment +* +* It is important to note that frame buffers passed to the driver must be +* 32-bit aligned. +* +* Receive Address Filtering +* +* The device can be set to accept frames whose Identifiers match any of the +* 4 filters set in the Acceptance Filter Mask/ID registers. +* +* The incoming Identifier is masked with the bits in the Acceptance Filter Mask +* Register. This value is compared with the result of masking the bits in the +* Acceptance Filter ID Register with the Acceptance Filter Mask Register. If +* both these values are equal, the message will be stored in the RX FIFO. +* +* Acceptance Filtering is performed by each of the defined acceptance filters. +* If the incoming identifier passes through any acceptance filter then the +* frame is stored in the RX FIFO. +* +* If the Accpetance Filters are not set up then all the received messages are +* stroed in the RX FIFO. +* +* PHY Communication +* +* This driver does not provide any mechanism for directly programming PHY. +* +* Interrupts +* +* The driver has no dependencies on the interrupt controller. The driver +* provides an interrupt handler. User of this driver needs to provide +* callback functions. An interrupt handler example is available with +* the driver. +* +* Threads +* +* This driver is not thread safe. Any needs for threads or thread mutual +* exclusion must be satisfied by the layer above this driver. +* +* Device Reset +* +* Bus Off interrupt that can occur in the device requires a device reset. +* The user is responsible for resetting the device and re-configuring it +* based on its needs (the driver does not save the current configuration). +* When integrating into an RTOS, these reset and re-configure obligations are +* taken care of by the OS adapter software if it exists for that RTOS. +* +* Device Configuration +* +* The device can be configured in various ways during the FPGA implementation +* process. Configuration parameters are stored in the xcanps_g.c files. +* A table is defined where each entry contains configuration information +* for a CAN device. This information includes such things as the base address +* of the memory-mapped device. +* +* Asserts +* +* Asserts are used within all Xilinx drivers to enforce constraints on argument +* values. Asserts can be turned off on a system-wide basis by defining, at +* compile time, the NDEBUG identifier. By default, asserts are turned on and it +* is recommended that users leave asserts on during development. +* +* Building the driver +* +* The XCanPs driver is composed of several source files. This allows the user +* to build and link only those parts of the driver that are necessary. +*

+* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00a xd/sv  01/12/10 First release
+* 1.01a bss    12/27/11 Added the APIs XCanPs_SetTxIntrWatermark and
+* 			XCanPs_GetTxIntrWatermark.
+*			Updated the Register/bit definitions
+*                       Changed XCANPS_RXFWIR_RXFLL_MASK to XCANPS_WIR_FW_MASK
+*                       Changed XCANPS_RXWIR_OFFSET to XCANPS_WIR_OFFSET
+*			Added XCANPS_IXR_TXFEMP_MASK for Tx Fifo Empty
+*			Changed XCANPS_IXR_RXFLL_MASK to
+*			XCANPS_IXR_RXFWMFLL_MASK
+* 			Changed
+*			XCANPS_TXBUF_ID_OFFSET to XCANPS_TXHPB_ID_OFFSET
+* 			XCANPS_TXBUF_DLC_OFFSET to XCANPS_TXHPB_DLC_OFFSET
+*			XCANPS_TXBUF_DW1_OFFSET to XCANPS_TXHPB_DW1_OFFSET
+*			XCANPS_TXBUF_DW2_OFFSET to XCANPS_TXHPB_DW2_OFFSET
+* 2.1 adk 		23/08/14 Fixed CR:798792 Peripheral test for CANPS IP in
+*			SDK claims a 40kbps baud rate but it's not.
+* 3.0 adk     09/12/14  Added support for Zynq Ultrascale Mp.Also code
+*			modified for MISRA-C:2012 compliance.
+* 3.1 adk     10/11/15  Fixed CR#911958 Add support for Tx Watermark example.
+*			Data mismatch while sending data less than 8 bytes.
+* 3.1 nsk     12/21/15  Updated XCanPs_IntrHandler in xcanps_intr.c to handle
+*			error interrupts correctly. CR#925615
+*     ms      03/17/17  Added readme.txt file in examples folder for doxygen
+*                       generation.
+*
+* +******************************************************************************/ +#ifndef XCANPS_H /* prevent circular inclusions */ +#define XCANPS_H /* by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files *********************************/ + +#include "xstatus.h" +#include "xcanps_hw.h" +#include "xil_types.h" + +/************************** Constant Definitions *****************************/ + +/** @name CAN operation modes + * @{ + */ +#define XCANPS_MODE_CONFIG 0x00000001U /**< Configuration mode */ +#define XCANPS_MODE_NORMAL 0x00000002U /**< Normal mode */ +#define XCANPS_MODE_LOOPBACK 0x00000004U /**< Loop Back mode */ +#define XCANPS_MODE_SLEEP 0x00000008U /**< Sleep mode */ +#define XCANPS_MODE_SNOOP 0x00000010U /**< Snoop mode */ +/* @} */ + +/** @name Callback identifiers used as parameters to XCanPs_SetHandler() + * @{ + */ +#define XCANPS_HANDLER_SEND 1U /**< Handler type for frame sending interrupt */ +#define XCANPS_HANDLER_RECV 2U /**< Handler type for frame reception interrupt*/ +#define XCANPS_HANDLER_ERROR 3U /**< Handler type for error interrupt */ +#define XCANPS_HANDLER_EVENT 4U /**< Handler type for all other interrupts */ +/* @} */ + +/**************************** Type Definitions *******************************/ + +/** + * This typedef contains configuration information for a device. + */ +typedef struct { + u16 DeviceId; /**< Unique ID of device */ + u32 BaseAddr; /**< Register base address */ +} XCanPs_Config; + +/******************************************************************************/ +/** + * Callback type for frame sending and reception interrupts. + * + * @param CallBackRef is a callback reference passed in by the upper layer + * when setting the callback functions, and passed back to the + * upper layer when the callback is invoked. +*******************************************************************************/ +typedef void (*XCanPs_SendRecvHandler) (void *CallBackRef); + +/******************************************************************************/ +/** + * Callback type for error interrupt. + * + * @param CallBackRef is a callback reference passed in by the upper layer + * when setting the callback functions, and passed back to the + * upper layer when the callback is invoked. + * @param ErrorMask is a bit mask indicating the cause of the error. Its + * value equals 'OR'ing one or more XCANPS_ESR_* values defined in + * xcanps_hw.h +*******************************************************************************/ +typedef void (*XCanPs_ErrorHandler) (void *CallBackRef, u32 ErrorMask); + +/******************************************************************************/ +/** + * Callback type for all kinds of interrupts except sending frame interrupt, + * receiving frame interrupt, and error interrupt. + * + * @param CallBackRef is a callback reference passed in by the upper layer + * when setting the callback functions, and passed back to the + * upper layer when the callback is invoked. + * @param Mask is a bit mask indicating the pending interrupts. Its value + * equals 'OR'ing one or more XCANPS_IXR_* defined in xcanps_hw.h +*******************************************************************************/ +typedef void (*XCanPs_EventHandler) (void *CallBackRef, u32 Mask); + +/** + * The XCanPs driver instance data. The user is required to allocate a + * variable of this type for every CAN device in the system. A pointer + * to a variable of this type is then passed to the driver API functions. + */ +typedef struct { + XCanPs_Config CanConfig; /**< Device configuration */ + u32 IsReady; /**< Device is initialized and ready */ + + /** + * Callback and callback reference for TXOK interrupt. + */ + XCanPs_SendRecvHandler SendHandler; + void *SendRef; + + /** + * Callback and callback reference for RXOK/RXNEMP/RXFLL interrupts. + */ + XCanPs_SendRecvHandler RecvHandler; + void *RecvRef; + + /** + * Callback and callback reference for ERROR interrupt. + */ + XCanPs_ErrorHandler ErrorHandler; + void *ErrorRef; + + /** + * Callback and callback reference for RXOFLW/RXUFLW/TXBFLL/TXFLL/ + * Wakeup/Sleep/Bus off/ARBLST interrupts. + */ + XCanPs_EventHandler EventHandler; + void *EventRef; + +} XCanPs; + + +/***************** Macros (Inline Functions) Definitions *********************/ + +/****************************************************************************/ +/** +* +* This macro checks if the transmission is complete. +* +* @param InstancePtr is a pointer to the XCanPs instance. +* +* @return +* - TRUE if the transmission is done. +* - FALSE if the transmission is not done. +* +* @note C-Style signature: +* int XCanPs_IsTxDone(XCanPs *InstancePtr) +* +*******************************************************************************/ +#define XCanPs_IsTxDone(InstancePtr) \ + (((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \ + XCANPS_ISR_OFFSET) & XCANPS_IXR_TXOK_MASK) != (u32)0) ? TRUE : FALSE) + + +/****************************************************************************/ +/** +* +* This macro checks if the transmission FIFO is full. +* +* @param InstancePtr is a pointer to the XCanPs instance. +* +* @return +* - TRUE if TX FIFO is full. +* - FALSE if the TX FIFO is NOT full. +* +* @note C-Style signature: +* int XCanPs_IsTxFifoFull(XCanPs *InstancePtr) +* +*****************************************************************************/ +#define XCanPs_IsTxFifoFull(InstancePtr) \ + (((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \ + XCANPS_SR_OFFSET) & XCANPS_SR_TXFLL_MASK) != (u32)0) ? TRUE : FALSE) + + +/****************************************************************************/ +/** +* +* This macro checks if the Transmission High Priority Buffer is full. +* +* @param InstancePtr is a pointer to the XCanPs instance. +* +* @return +* - TRUE if the TX High Priority Buffer is full. +* - FALSE if the TX High Priority Buffer is NOT full. +* +* @note C-Style signature: +* int XCanPs_IsHighPriorityBufFull(XCanPs *InstancePtr) +* +*****************************************************************************/ +#define XCanPs_IsHighPriorityBufFull(InstancePtr) \ + (((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \ + XCANPS_SR_OFFSET) & XCANPS_SR_TXBFLL_MASK) != (u32)0) ? TRUE : FALSE) + + +/****************************************************************************/ +/** +* +* This macro checks if the receive FIFO is empty. +* +* @param InstancePtr is a pointer to the XCanPs instance. +* +* @return +* - TRUE if RX FIFO is empty. +* - FALSE if the RX FIFO is NOT empty. +* +* @note C-Style signature: +* int XCanPs_IsRxEmpty(XCanPs *InstancePtr) +* +*****************************************************************************/ +#define XCanPs_IsRxEmpty(InstancePtr) \ + (((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \ + XCANPS_ISR_OFFSET) & XCANPS_IXR_RXNEMP_MASK) != (u32)0) ? FALSE : TRUE) + + +/****************************************************************************/ +/** +* +* This macro checks if the CAN device is ready for the driver to change +* Acceptance Filter Identifier Registers (AFIR) and Acceptance Filter Mask +* Registers (AFMR). +* +* AFIR and AFMR for a filter are changeable only after the filter is disabled +* and this routine returns FALSE. The filter can be disabled using the +* XCanPs_AcceptFilterDisable function. +* +* Use the XCanPs_Accept_* functions for configuring the acceptance filters. +* +* @param InstancePtr is a pointer to the XCanPs instance. +* +* @return +* - TRUE if the device is busy and NOT ready to accept writes to +* AFIR and AFMR. +* - FALSE if the device is ready to accept writes to AFIR and +* AFMR. +* +* @note C-Style signature: +* int XCanPs_IsAcceptFilterBusy(XCanPs *InstancePtr) +* +*****************************************************************************/ +#define XCanPs_IsAcceptFilterBusy(InstancePtr) \ + (((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), \ + XCANPS_SR_OFFSET) & XCANPS_SR_ACFBSY_MASK) != (u32)0) ? TRUE : FALSE) + + +/****************************************************************************/ +/** +* +* This macro calculates CAN message identifier value given identifier field +* values. +* +* @param StandardId contains Standard Message ID value. +* @param SubRemoteTransReq contains Substitute Remote Transmission +* Request value. +* @param IdExtension contains Identifier Extension value. +* @param ExtendedId contains Extended Message ID value. +* @param RemoteTransReq contains Remote Transmission Request value. +* +* @return Message Identifier value. +* +* @note C-Style signature: +* u32 XCanPs_CreateIdValue(u32 StandardId, +* u32 SubRemoteTransReq, +* u32 IdExtension, u32 ExtendedId, +* u32 RemoteTransReq) +* +* Read the CAN specification for meaning of each parameter. +* +*****************************************************************************/ +#define XCanPs_CreateIdValue(StandardId, SubRemoteTransReq, IdExtension, \ + ExtendedId, RemoteTransReq) \ + ((((StandardId) << XCANPS_IDR_ID1_SHIFT) & XCANPS_IDR_ID1_MASK) | \ + (((SubRemoteTransReq) << XCANPS_IDR_SRR_SHIFT) & XCANPS_IDR_SRR_MASK)|\ + (((IdExtension) << XCANPS_IDR_IDE_SHIFT) & XCANPS_IDR_IDE_MASK) | \ + (((ExtendedId) << XCANPS_IDR_ID2_SHIFT) & XCANPS_IDR_ID2_MASK) | \ + ((RemoteTransReq) & XCANPS_IDR_RTR_MASK)) + + +/****************************************************************************/ +/** +* +* This macro calculates value for Data Length Code register given Data +* Length Code value. +* +* @param DataLengCode indicates Data Length Code value. +* +* @return Value that can be assigned to Data Length Code register. +* +* @note C-Style signature: +* u32 XCanPs_CreateDlcValue(u32 DataLengCode) +* +* Read the CAN specification for meaning of Data Length Code. +* +*****************************************************************************/ +#define XCanPs_CreateDlcValue(DataLengCode) \ + (((DataLengCode) << XCANPS_DLCR_DLC_SHIFT) & XCANPS_DLCR_DLC_MASK) + + +/****************************************************************************/ +/** +* +* This macro clears the timestamp in the Timestamp Control Register. +* +* @param InstancePtr is a pointer to the XCanPs instance. +* +* @return None. +* +* @note C-Style signature: +* void XCanPs_ClearTimestamp(XCanPs *InstancePtr) +* +*****************************************************************************/ +#define XCanPs_ClearTimestamp(InstancePtr) \ + XCanPs_WriteReg((InstancePtr)->CanConfig.BaseAddr, \ + XCANPS_TCR_OFFSET, XCANPS_TCR_CTS_MASK) + +/************************** Function Prototypes ******************************/ + +/* + * Functions in xcanps.c + */ +s32 XCanPs_CfgInitialize(XCanPs *InstancePtr, XCanPs_Config *ConfigPtr, + u32 EffectiveAddr); + +void XCanPs_Reset(XCanPs *InstancePtr); +u8 XCanPs_GetMode(XCanPs *InstancePtr); +void XCanPs_EnterMode(XCanPs *InstancePtr, u8 OperationMode); +u32 XCanPs_GetStatus(XCanPs *InstancePtr); +void XCanPs_GetBusErrorCounter(XCanPs *InstancePtr, u8 *RxErrorCount, + u8 *TxErrorCount); +u32 XCanPs_GetBusErrorStatus(XCanPs *InstancePtr); +void XCanPs_ClearBusErrorStatus(XCanPs *InstancePtr, u32 Mask); +s32 XCanPs_Send(XCanPs *InstancePtr, u32 *FramePtr); +s32 XCanPs_Recv(XCanPs *InstancePtr, u32 *FramePtr); +s32 XCanPs_SendHighPriority(XCanPs *InstancePtr, u32 *FramePtr); +void XCanPs_AcceptFilterEnable(XCanPs *InstancePtr, u32 FilterIndexes); +void XCanPs_AcceptFilterDisable(XCanPs *InstancePtr, u32 FilterIndexes); +u32 XCanPs_AcceptFilterGetEnabled(XCanPs *InstancePtr); +s32 XCanPs_AcceptFilterSet(XCanPs *InstancePtr, u32 FilterIndex, + u32 MaskValue, u32 IdValue); +void XCanPs_AcceptFilterGet(XCanPs *InstancePtr, u32 FilterIndex, + u32 *MaskValue, u32 *IdValue); + +s32 XCanPs_SetBaudRatePrescaler(XCanPs *InstancePtr, u8 Prescaler); +u8 XCanPs_GetBaudRatePrescaler(XCanPs *InstancePtr); +s32 XCanPs_SetBitTiming(XCanPs *InstancePtr, u8 SyncJumpWidth, + u8 TimeSegment2, u8 TimeSegment1); +void XCanPs_GetBitTiming(XCanPs *InstancePtr, u8 *SyncJumpWidth, + u8 *TimeSegment2, u8 *TimeSegment1); + +s32 XCanPs_SetRxIntrWatermark(XCanPs *InstancePtr, u8 Threshold); +u8 XCanPs_GetRxIntrWatermark(XCanPs *InstancePtr); +s32 XCanPs_SetTxIntrWatermark(XCanPs *InstancePtr, u8 Threshold); +u8 XCanPs_GetTxIntrWatermark(XCanPs *InstancePtr); + +/* + * Diagnostic functions in xcanps_selftest.c + */ +s32 XCanPs_SelfTest(XCanPs *InstancePtr); + +/* + * Functions in xcanps_intr.c + */ +void XCanPs_IntrEnable(XCanPs *InstancePtr, u32 Mask); +void XCanPs_IntrDisable(XCanPs *InstancePtr, u32 Mask); +u32 XCanPs_IntrGetEnabled(XCanPs *InstancePtr); +u32 XCanPs_IntrGetStatus(XCanPs *InstancePtr); +void XCanPs_IntrClear(XCanPs *InstancePtr, u32 Mask); +void XCanPs_IntrHandler(void *InstancePtr); +s32 XCanPs_SetHandler(XCanPs *InstancePtr, u32 HandlerType, + void *CallBackFunc, void *CallBackRef); + +/* + * Functions in xcanps_sinit.c + */ +XCanPs_Config *XCanPs_LookupConfig(u16 DeviceId); + +#ifdef __cplusplus +} +#endif + +#endif /* end of protection macro */ +/** @} */ diff --git a/src/Xilinx/include/xcanps_hw.h b/src/Xilinx/include/xcanps_hw.h new file mode 100644 index 0000000..30ec68a --- /dev/null +++ b/src/Xilinx/include/xcanps_hw.h @@ -0,0 +1,369 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xcanps_hw.h +* @addtogroup canps_v3_2 +* @{ +* +* This header file contains the identifiers and basic driver functions (or +* macros) that can be used to access the device. Other driver functions +* are defined in xcanps.h. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00a xd/sv  01/12/10 First release
+* 1.01a sbs    12/27/11 Updated the Register/bit definitions
+*                       Changed XCANPS_RXFWIR_RXFLL_MASK to XCANPS_WIR_FW_MASK
+*                       Changed XCANPS_RXWIR_OFFSET to XCANPS_WIR_OFFSET
+*			Added XCANPS_IXR_TXFEMP_MASK for Tx Fifo Empty
+*			Changed XCANPS_IXR_RXFLL_MASK to
+*			XCANPS_IXR_RXFWMFLL_MASK
+* 			Changed
+*			XCANPS_TXBUF_ID_OFFSET to XCANPS_TXHPB_ID_OFFSET
+* 			XCANPS_TXBUF_DLC_OFFSET to XCANPS_TXHPB_DLC_OFFSET
+*			XCANPS_TXBUF_DW1_OFFSET  to XCANPS_TXHPB_DW1_OFFSET
+*			XCANPS_TXBUF_DW2_OFFSET  to XCANPS_TXHPB_DW2_OFFSET
+* 1.02a adk   08/08/13  Updated for inclding the function prototype
+* 3.00  kvn   02/13/15  Modified code for MISRA-C:2012 compliance.
+*
+* +******************************************************************************/ + +#ifndef XCANPS_HW_H /* prevent circular inclusions */ +#define XCANPS_HW_H /* by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + + +/***************************** Include Files *********************************/ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xil_io.h" + +/************************** Constant Definitions *****************************/ + +/** @name Register offsets for the CAN. Each register is 32 bits. + * @{ + */ +#define XCANPS_SRR_OFFSET 0x00000000U /**< Software Reset Register */ +#define XCANPS_MSR_OFFSET 0x00000004U /**< Mode Select Register */ +#define XCANPS_BRPR_OFFSET 0x00000008U /**< Baud Rate Prescaler */ +#define XCANPS_BTR_OFFSET 0x0000000CU /**< Bit Timing Register */ +#define XCANPS_ECR_OFFSET 0x00000010U /**< Error Counter Register */ +#define XCANPS_ESR_OFFSET 0x00000014U /**< Error Status Register */ +#define XCANPS_SR_OFFSET 0x00000018U /**< Status Register */ + +#define XCANPS_ISR_OFFSET 0x0000001CU /**< Interrupt Status Register */ +#define XCANPS_IER_OFFSET 0x00000020U /**< Interrupt Enable Register */ +#define XCANPS_ICR_OFFSET 0x00000024U /**< Interrupt Clear Register */ +#define XCANPS_TCR_OFFSET 0x00000028U /**< Timestamp Control Register */ +#define XCANPS_WIR_OFFSET 0x0000002CU /**< Watermark Interrupt Reg */ + +#define XCANPS_TXFIFO_ID_OFFSET 0x00000030U /**< TX FIFO ID */ +#define XCANPS_TXFIFO_DLC_OFFSET 0x00000034U /**< TX FIFO DLC */ +#define XCANPS_TXFIFO_DW1_OFFSET 0x00000038U /**< TX FIFO Data Word 1 */ +#define XCANPS_TXFIFO_DW2_OFFSET 0x0000003CU /**< TX FIFO Data Word 2 */ + +#define XCANPS_TXHPB_ID_OFFSET 0x00000040U /**< TX High Priority Buffer ID */ +#define XCANPS_TXHPB_DLC_OFFSET 0x00000044U /**< TX High Priority Buffer DLC */ +#define XCANPS_TXHPB_DW1_OFFSET 0x00000048U /**< TX High Priority Buf Data 1 */ +#define XCANPS_TXHPB_DW2_OFFSET 0x0000004CU /**< TX High Priority Buf Data Word 2 */ + +#define XCANPS_RXFIFO_ID_OFFSET 0x00000050U /**< RX FIFO ID */ +#define XCANPS_RXFIFO_DLC_OFFSET 0x00000054U /**< RX FIFO DLC */ +#define XCANPS_RXFIFO_DW1_OFFSET 0x00000058U /**< RX FIFO Data Word 1 */ +#define XCANPS_RXFIFO_DW2_OFFSET 0x0000005CU /**< RX FIFO Data Word 2 */ + +#define XCANPS_AFR_OFFSET 0x00000060U /**< Acceptance Filter Register */ +#define XCANPS_AFMR1_OFFSET 0x00000064U /**< Acceptance Filter Mask 1 */ +#define XCANPS_AFIR1_OFFSET 0x00000068U /**< Acceptance Filter ID 1 */ +#define XCANPS_AFMR2_OFFSET 0x0000006CU /**< Acceptance Filter Mask 2 */ +#define XCANPS_AFIR2_OFFSET 0x00000070U /**< Acceptance Filter ID 2 */ +#define XCANPS_AFMR3_OFFSET 0x00000074U /**< Acceptance Filter Mask 3 */ +#define XCANPS_AFIR3_OFFSET 0x00000078U /**< Acceptance Filter ID 3 */ +#define XCANPS_AFMR4_OFFSET 0x0000007CU /**< Acceptance Filter Mask 4 */ +#define XCANPS_AFIR4_OFFSET 0x00000080U /**< Acceptance Filter ID 4 */ +/* @} */ + +/** @name Software Reset Register (SRR) Bit Definitions and Masks + * @{ + */ +#define XCANPS_SRR_CEN_MASK 0x00000002U /**< Can Enable */ +#define XCANPS_SRR_SRST_MASK 0x00000001U /**< Reset */ +/* @} */ + +/** @name Mode Select Register (MSR) Bit Definitions and Masks + * @{ + */ +#define XCANPS_MSR_SNOOP_MASK 0x00000004U /**< Snoop Mode Select */ +#define XCANPS_MSR_LBACK_MASK 0x00000002U /**< Loop Back Mode Select */ +#define XCANPS_MSR_SLEEP_MASK 0x00000001U /**< Sleep Mode Select */ +/* @} */ + +/** @name Baud Rate Prescaler register (BRPR) Bit Definitions and Masks + * @{ + */ +#define XCANPS_BRPR_BRP_MASK 0x000000FFU /**< Baud Rate Prescaler */ +/* @} */ + +/** @name Bit Timing Register (BTR) Bit Definitions and Masks + * @{ + */ +#define XCANPS_BTR_SJW_MASK 0x00000180U /**< Synchronization Jump Width */ +#define XCANPS_BTR_SJW_SHIFT 7U +#define XCANPS_BTR_TS2_MASK 0x00000070U /**< Time Segment 2 */ +#define XCANPS_BTR_TS2_SHIFT 4U +#define XCANPS_BTR_TS1_MASK 0x0000000FU /**< Time Segment 1 */ +/* @} */ + +/** @name Error Counter Register (ECR) Bit Definitions and Masks + * @{ + */ +#define XCANPS_ECR_REC_MASK 0x0000FF00U /**< Receive Error Counter */ +#define XCANPS_ECR_REC_SHIFT 8U +#define XCANPS_ECR_TEC_MASK 0x000000FFU /**< Transmit Error Counter */ +/* @} */ + +/** @name Error Status Register (ESR) Bit Definitions and Masks + * @{ + */ +#define XCANPS_ESR_ACKER_MASK 0x00000010U /**< ACK Error */ +#define XCANPS_ESR_BERR_MASK 0x00000008U /**< Bit Error */ +#define XCANPS_ESR_STER_MASK 0x00000004U /**< Stuff Error */ +#define XCANPS_ESR_FMER_MASK 0x00000002U /**< Form Error */ +#define XCANPS_ESR_CRCER_MASK 0x00000001U /**< CRC Error */ +/* @} */ + +/** @name Status Register (SR) Bit Definitions and Masks + * @{ + */ +#define XCANPS_SR_SNOOP_MASK 0x00001000U /**< Snoop Mask */ +#define XCANPS_SR_ACFBSY_MASK 0x00000800U /**< Acceptance Filter busy */ +#define XCANPS_SR_TXFLL_MASK 0x00000400U /**< TX FIFO is full */ +#define XCANPS_SR_TXBFLL_MASK 0x00000200U /**< TX High Priority Buffer full */ +#define XCANPS_SR_ESTAT_MASK 0x00000180U /**< Error Status */ +#define XCANPS_SR_ESTAT_SHIFT 7U +#define XCANPS_SR_ERRWRN_MASK 0x00000040U /**< Error Warning */ +#define XCANPS_SR_BBSY_MASK 0x00000020U /**< Bus Busy */ +#define XCANPS_SR_BIDLE_MASK 0x00000010U /**< Bus Idle */ +#define XCANPS_SR_NORMAL_MASK 0x00000008U /**< Normal Mode */ +#define XCANPS_SR_SLEEP_MASK 0x00000004U /**< Sleep Mode */ +#define XCANPS_SR_LBACK_MASK 0x00000002U /**< Loop Back Mode */ +#define XCANPS_SR_CONFIG_MASK 0x00000001U /**< Configuration Mode */ +/* @} */ + +/** @name Interrupt Status/Enable/Clear Register Bit Definitions and Masks + * @{ + */ +#define XCANPS_IXR_TXFEMP_MASK 0x00004000U /**< Tx Fifo Empty Interrupt */ +#define XCANPS_IXR_TXFWMEMP_MASK 0x00002000U /**< Tx Fifo Watermark Empty */ +#define XCANPS_IXR_RXFWMFLL_MASK 0x00001000U /**< Rx FIFO Watermark Full */ +#define XCANPS_IXR_WKUP_MASK 0x00000800U /**< Wake up Interrupt */ +#define XCANPS_IXR_SLP_MASK 0x00000400U /**< Sleep Interrupt */ +#define XCANPS_IXR_BSOFF_MASK 0x00000200U /**< Bus Off Interrupt */ +#define XCANPS_IXR_ERROR_MASK 0x00000100U /**< Error Interrupt */ +#define XCANPS_IXR_RXNEMP_MASK 0x00000080U /**< RX FIFO Not Empty Interrupt */ +#define XCANPS_IXR_RXOFLW_MASK 0x00000040U /**< RX FIFO Overflow Interrupt */ +#define XCANPS_IXR_RXUFLW_MASK 0x00000020U /**< RX FIFO Underflow Interrupt */ +#define XCANPS_IXR_RXOK_MASK 0x00000010U /**< New Message Received Intr */ +#define XCANPS_IXR_TXBFLL_MASK 0x00000008U /**< TX High Priority Buf Full */ +#define XCANPS_IXR_TXFLL_MASK 0x00000004U /**< TX FIFO Full Interrupt */ +#define XCANPS_IXR_TXOK_MASK 0x00000002U /**< TX Successful Interrupt */ +#define XCANPS_IXR_ARBLST_MASK 0x00000001U /**< Arbitration Lost Interrupt */ +#define XCANPS_IXR_ALL ((u32)XCANPS_IXR_RXFWMFLL_MASK | \ + (u32)XCANPS_IXR_WKUP_MASK | \ + (u32)XCANPS_IXR_SLP_MASK | \ + (u32)XCANPS_IXR_BSOFF_MASK | \ + (u32)XCANPS_IXR_ERROR_MASK | \ + (u32)XCANPS_IXR_RXNEMP_MASK | \ + (u32)XCANPS_IXR_RXOFLW_MASK | \ + (u32)XCANPS_IXR_RXUFLW_MASK | \ + (u32)XCANPS_IXR_RXOK_MASK | \ + (u32)XCANPS_IXR_TXBFLL_MASK | \ + (u32)XCANPS_IXR_TXFLL_MASK | \ + (u32)XCANPS_IXR_TXOK_MASK | \ + (u32)XCANPS_IXR_ARBLST_MASK) +/* @} */ + +/** @name CAN Timestamp Control Register (TCR) Bit Definitions and Masks + * @{ + */ +#define XCANPS_TCR_CTS_MASK 0x00000001U /**< Clear Timestamp counter mask */ +/* @} */ + +/** @name CAN Watermark Register (WIR) Bit Definitions and Masks + * @{ + */ +#define XCANPS_WIR_FW_MASK 0x0000003FU /**< Rx Full Threshold mask */ +#define XCANPS_WIR_EW_MASK 0x00003F00U /**< Tx Empty Threshold mask */ +#define XCANPS_WIR_EW_SHIFT 0x00000008U /**< Tx Empty Threshold shift */ + +/* @} */ + +/** @name CAN Frame Identifier (TX High Priority Buffer/TX/RX/Acceptance Filter + Mask/Acceptance Filter ID) + * @{ + */ +#define XCANPS_IDR_ID1_MASK 0xFFE00000U /**< Standard Messg Identifier */ +#define XCANPS_IDR_ID1_SHIFT 21U +#define XCANPS_IDR_SRR_MASK 0x00100000U /**< Substitute Remote TX Req */ +#define XCANPS_IDR_SRR_SHIFT 20U +#define XCANPS_IDR_IDE_MASK 0x00080000U /**< Identifier Extension */ +#define XCANPS_IDR_IDE_SHIFT 19U +#define XCANPS_IDR_ID2_MASK 0x0007FFFEU /**< Extended Message Ident */ +#define XCANPS_IDR_ID2_SHIFT 1U +#define XCANPS_IDR_RTR_MASK 0x00000001U /**< Remote TX Request */ +/* @} */ + +/** @name CAN Frame Data Length Code (TX High Priority Buffer/TX/RX) + * @{ + */ +#define XCANPS_DLCR_DLC_MASK 0xF0000000U /**< Data Length Code */ +#define XCANPS_DLCR_DLC_SHIFT 28U +#define XCANPS_DLCR_TIMESTAMP_MASK 0x0000FFFFU /**< Timestamp Mask (Rx only) */ + +/* @} */ + +/** @name CAN Frame Data Word 1 (TX High Priority Buffer/TX/RX) + * @{ + */ +#define XCANPS_DW1R_DB0_MASK 0xFF000000U /**< Data Byte 0 */ +#define XCANPS_DW1R_DB0_SHIFT 24U +#define XCANPS_DW1R_DB1_MASK 0x00FF0000U /**< Data Byte 1 */ +#define XCANPS_DW1R_DB1_SHIFT 16U +#define XCANPS_DW1R_DB2_MASK 0x0000FF00U /**< Data Byte 2 */ +#define XCANPS_DW1R_DB2_SHIFT 8U +#define XCANPS_DW1R_DB3_MASK 0x000000FFU /**< Data Byte 3 */ +/* @} */ + +/** @name CAN Frame Data Word 2 (TX High Priority Buffer/TX/RX) + * @{ + */ +#define XCANPS_DW2R_DB4_MASK 0xFF000000U /**< Data Byte 4 */ +#define XCANPS_DW2R_DB4_SHIFT 24U +#define XCANPS_DW2R_DB5_MASK 0x00FF0000U /**< Data Byte 5 */ +#define XCANPS_DW2R_DB5_SHIFT 16U +#define XCANPS_DW2R_DB6_MASK 0x0000FF00U /**< Data Byte 6 */ +#define XCANPS_DW2R_DB6_SHIFT 8U +#define XCANPS_DW2R_DB7_MASK 0x000000FFU /**< Data Byte 7 */ +/* @} */ + +/** @name Acceptance Filter Register (AFR) Bit Definitions and Masks + * @{ + */ +#define XCANPS_AFR_UAF4_MASK 0x00000008U /**< Use Acceptance Filter No.4 */ +#define XCANPS_AFR_UAF3_MASK 0x00000004U /**< Use Acceptance Filter No.3 */ +#define XCANPS_AFR_UAF2_MASK 0x00000002U /**< Use Acceptance Filter No.2 */ +#define XCANPS_AFR_UAF1_MASK 0x00000001U /**< Use Acceptance Filter No.1 */ +#define XCANPS_AFR_UAF_ALL_MASK ((u32)XCANPS_AFR_UAF4_MASK | \ + (u32)XCANPS_AFR_UAF3_MASK | \ + (u32)XCANPS_AFR_UAF2_MASK | \ + (u32)XCANPS_AFR_UAF1_MASK) +/* @} */ + +/** @name CAN frame length constants + * @{ + */ +#define XCANPS_MAX_FRAME_SIZE sizeof(u32)*16U /**< Maximum CAN frame length in bytes */ +/* @} */ + +/* For backwards compatibilty */ +#define XCANPS_TXBUF_ID_OFFSET XCANPS_TXHPB_ID_OFFSET +#define XCANPS_TXBUF_DLC_OFFSET XCANPS_TXHPB_DLC_OFFSET +#define XCANPS_TXBUF_DW1_OFFSET XCANPS_TXHPB_DW1_OFFSET +#define XCANPS_TXBUF_DW2_OFFSET XCANPS_TXHPB_DW2_OFFSET + +#define XCANPS_RXFWIR_RXFLL_MASK XCANPS_WIR_FW_MASK +#define XCANPS_RXWIR_OFFSET XCANPS_WIR_OFFSET +#define XCANPS_IXR_RXFLL_MASK XCANPS_IXR_RXFWMFLL_MASK + + + + +/**************************** Type Definitions *******************************/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +/****************************************************************************/ +/** +* +* This macro reads the given register. +* +* @param BaseAddr is the base address of the device. +* @param RegOffset is the register offset to be read. +* +* @return The 32-bit value of the register +* +* @note None. +* +*****************************************************************************/ +#define XCanPs_ReadReg(BaseAddr, RegOffset) \ + Xil_In32((BaseAddr) + (u32)(RegOffset)) + + +/****************************************************************************/ +/** +* +* This macro writes the given register. +* +* @param BaseAddr is the base address of the device. +* @param RegOffset is the register offset to be written. +* @param Data is the 32-bit value to write to the register. +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +#define XCanPs_WriteReg(BaseAddr, RegOffset, Data) \ + Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data)) + +/************************** Function Prototypes ******************************/ +/* + * Perform reset operation to the CanPs interface + */ +void XCanPs_ResetHw(u32 BaseAddr); + +#ifdef __cplusplus +} +#endif + +#endif /* end of protection macro */ +/** @} */ diff --git a/src/Xilinx/include/xcoresightpsdcc.h b/src/Xilinx/include/xcoresightpsdcc.h new file mode 100644 index 0000000..67959e3 --- /dev/null +++ b/src/Xilinx/include/xcoresightpsdcc.h @@ -0,0 +1,74 @@ +/****************************************************************************** +* +* Copyright (C) 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xcoresightpsdcc.h +* @addtogroup coresightps_dcc_v1_4 +* @{ +* @details +* +* CoreSight driver component. +* +* The coresight is a part of debug communication channel (DCC) group. Jtag UART +* for ARM uses DCC. Each ARM core has its own DCC, so one need to select an +* ARM target in XSDB console before running the jtag terminal command. Using the +* coresight driver component, the output stream can be directed to a log file. +* +* @note None. +* +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date		Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00  kvn    02/14/15 First release
+* 1.1   kvn    06/12/15 Add support for Zynq Ultrascale+ MP.
+*       kvn    08/18/15 Modified Makefile according to compiler changes.
+* 1.3   asa    07/01/16 Made changes to ensure that the file does not compile
+*                       for MB BSPs. Instead it throws up a warning. This
+*                       fixes the CR#953056.
+*
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ +#ifndef __MICROBLAZE__ +#include + +void XCoresightPs_DccSendByte(u32 BaseAddress, u8 Data); + +u8 XCoresightPs_DccRecvByte(u32 BaseAddress); +#endif +/** @} */ diff --git a/src/Xilinx/include/xcpu_cortexr5.h b/src/Xilinx/include/xcpu_cortexr5.h new file mode 100644 index 0000000..108dc7e --- /dev/null +++ b/src/Xilinx/include/xcpu_cortexr5.h @@ -0,0 +1,48 @@ +/****************************************************************************** +* +* Copyright (C) 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xcpu_cortexr5.h +* @addtogroup cpu_cortexr5_v1_4 +* @{ +* @details +* +* dummy file +* MODIFICATION HISTORY: +* +* Ver Who Date Changes +* ----- ---- -------- --------------------------------------------------------- +* 1.4 ms 04/18/17 Modified tcl file to add suffix U for XPAR_CPU_ID +* parameter of cpu_cortexr5 in xparameters.h +******************************************************************************/ +/** @} */ diff --git a/src/Xilinx/include/xcsudma.h b/src/Xilinx/include/xcsudma.h new file mode 100644 index 0000000..fc675a1 --- /dev/null +++ b/src/Xilinx/include/xcsudma.h @@ -0,0 +1,429 @@ +/****************************************************************************** +* +* Copyright (C) 2014-2018 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* The CSU_DMA is present inside CSU (Configuration Security Unit) module which +* is located within the Low-Power Subsystem (LPS) internal to the PS. +* CSU_DMA allows the CSU to move data efficiently between the memory (32 bit +* AXI interface) and the CSU stream peripherals (SHA, AES and PCAP) via Secure +* Stream Switch (SSS). +* +* The CSU_DMA is a 2 channel simple DMA, allowing separate control of the SRC +* (read) channel and DST (write) channel. The DMA is effectively able to +* transfer data: +* - From PS-side to the SSS-side (SRC DMA only) +* - From SSS-side to the PS-side (DST DMA only) +* - Simultaneous PS-side to SSS_side and SSS-side to the PS-side +* +* Initialization & Configuration +* +* The device driver enables higher layer software (e.g., an application) to +* communicate to the CSU_DMA core. +* +* XCsuDma_CfgInitialize() API is used to initialize the CSU_DMA core. +* The user needs to first call the XCsuDma_LookupConfig() API which returns +* the Configuration structure pointer which is passed as a parameter to the +* XCsuDma_CfgInitialize() API. +* +* Interrupts +* This driver will not support handling of interrupts user should write handler +* to handle the interrupts. +* +* Virtual Memory +* +* This driver supports Virtual Memory. The RTOS is responsible for calculating +* the correct device base address in Virtual Memory space. +* +* Threads +* +* This driver is not thread safe. Any needs for threads or thread mutual +* exclusion must be satisfied by the layer above this driver. +* +* Asserts +* +* Asserts are used within all Xilinx drivers to enforce constraints on argument +* values. Asserts can be turned off on a system-wide basis by defining, at +* compile time, the NDEBUG identifier. By default, asserts are turned on and it +* is recommended that users leave asserts on during development. +* +* Building the driver +* +* The XCsuDma driver is composed of several source files. This allows the user +* to build and link only those parts of the driver that are necessary. +* +* @file xcsudma.h +* @addtogroup csudma_v1_2 +* @{ +* @details +* +* This header file contains identifiers and register-level driver functions (or +* macros), range macros, structure typedefs that can be used to access the +* Xilinx CSU_DMA core instance. +* +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- -----------------------------------------------------
+* 1.0   vnsld   22/10/14 First release
+* 1.1   adk     10/05/16 Fixed CR#951040 race condition in the recv path when
+*                        source and destination points to the same buffer.
+*       ms      03/17/17 Added readme.txt file in examples folder for doxygen
+*                        generation.
+*       ms      04/10/17 Modified filename tag in xcsudma_selftest_example.c to
+*                        include the file in doxygen examples.
+* 1.2   adk     11/22/17 Added peripheral test app support for CSUDMA driver.
+*	adk	09/03/18 Added new API XCsuDma_64BitTransfer() useful for 64-bit
+*			 dma transfers through PMU processor(CR#996201).
+*
+* +******************************************************************************/ + +#ifndef XCSUDMA_H_ +#define XCSUDMA_H_ /**< Prevent circular inclusions + * by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files *********************************/ + +#include "xcsudma_hw.h" +#include "xil_types.h" +#include "xil_assert.h" +#include "xstatus.h" +#include "xil_cache.h" + +/************************** Constant Definitions *****************************/ + +/** @name CSU_DMA Channels + * @{ + */ +typedef enum { + XCSUDMA_SRC_CHANNEL = 0U, /**< Source Channel of CSU_DMA */ + XCSUDMA_DST_CHANNEL /**< Destination Channel of CSU_DMA */ +}XCsuDma_Channel; +/*@}*/ + +/** @name CSU_DMA pause types + * @{ + */ +typedef enum { + XCSUDMA_PAUSE_MEMORY, /**< Pauses memory data transfer + * to/from CSU_DMA */ + XCSUDMA_PAUSE_STREAM, /**< Pauses stream data transfer + * to/from CSU_DMA */ +}XCsuDma_PauseType; + +/*@}*/ + + +/** @name Ranges of Size + * @{ + */ +#define XCSUDMA_SIZE_MAX 0x07FFFFFF /**< Maximum allowed no of words */ + +/*@}*/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +/*****************************************************************************/ +/** +* +* This function resets the CSU_DMA core. +* +* @param None. +* +* @return None. +* +* @note None. +* C-style signature: +* void XCsuDma_Reset() +* +******************************************************************************/ +#define XCsuDma_Reset() \ + Xil_Out32(((u32)(XCSU_BASEADDRESS) + (u32)(XCSU_DMA_RESET_OFFSET)), \ + (u32)(XCSUDMA_RESET_SET_MASK)); \ + Xil_Out32(((u32)(XCSU_BASEADDRESS) + (u32)(XCSU_DMA_RESET_OFFSET)), \ + (u32)(XCSUDMA_RESET_UNSET_MASK)); + +/*****************************************************************************/ +/** +* This function will be in busy while loop until the data transfer is +* completed. +* +* @param InstancePtr is a pointer to XCsuDma instance to be worked on. +* @param Channel represents the type of channel either it is Source or +* Destination. +* Source channel - XCSUDMA_SRC_CHANNEL +* Destination Channel - XCSUDMA_DST_CHANNEL +* +* @return None. +* +* @note This function should be called after XCsuDma_Transfer in polled +* mode to wait until the data gets transfered completely. +* C-style signature: +* void XCsuDma_WaitForDone(XCsuDma *InstancePtr, +* XCsuDma_Channel Channel) +* +******************************************************************************/ +#define XCsuDma_WaitForDone(InstancePtr,Channel) \ + while((XCsuDma_ReadReg(((InstancePtr)->Config.BaseAddress), \ + ((u32)(XCSUDMA_I_STS_OFFSET) + \ + ((u32)(Channel) * (u32)(XCSUDMA_OFFSET_DIFF)))) & \ + (u32)(XCSUDMA_IXR_DONE_MASK)) != (XCSUDMA_IXR_DONE_MASK)) + +/*****************************************************************************/ +/** +* +* This function returns the number of completed SRC/DST DMA transfers that +* have not been acknowledged by software based on the channel selection. +* +* @param InstancePtr is a pointer to XCsuDma instance to be worked on. +* @param Channel represents the type of channel either it is Source or +* Destination. +* Source channel - XCSUDMA_SRC_CHANNEL +* Destination Channel - XCSUDMA_DST_CHANNEL +* +* @return Count is number of completed DMA transfers but not acknowledged +* (Range is 0 to 7). +* - 000 - All finished transfers have been acknowledged. +* - Count - Count number of finished transfers are still +* outstanding. +* +* @note None. +* C-style signature: +* u8 XCsuDma_GetDoneCount(XCsuDma *InstancePtr, +* XCsuDma_Channel Channel) +* +******************************************************************************/ +#define XCsuDma_GetDoneCount(InstancePtr, Channel) \ + ((XCsuDma_ReadReg(((InstancePtr)->Config.BaseAddress), \ + ((u32)(XCSUDMA_STS_OFFSET) + \ + ((u32)(Channel) * (u32)(XCSUDMA_OFFSET_DIFF)))) & \ + (u32)(XCSUDMA_STS_DONE_CNT_MASK)) >> \ + (u32)(XCSUDMA_STS_DONE_CNT_SHIFT)) + +/*****************************************************************************/ +/** +* +* This function returns the current SRC/DST FIFO level in 32 bit words of the +* selected channel +* @param InstancePtr is a pointer to XCsuDma instance to be worked on. +* @param Channel represents the type of channel either it is Source or +* Destination. +* Source channel - XCSUDMA_SRC_CHANNEL +* Destination Channel - XCSUDMA_DST_CHANNEL +* +* @return FIFO level. (Range is 0 to 128) +* - 0 Indicates empty +* - Any number 1 to 128 indicates the number of entries in FIFO. +* +* @note None. +* C-style signature: +* u8 XCsuDma_GetFIFOLevel(XCsuDma *InstancePtr, +* XCsuDma_Channel Channel) +* +******************************************************************************/ +#define XCsuDma_GetFIFOLevel(InstancePtr, Channel) \ + ((XCsuDma_ReadReg(((InstancePtr)->Config.BaseAddress), \ + ((u32)(XCSUDMA_STS_OFFSET) + \ + ((u32)(Channel) * (u32)(XCSUDMA_OFFSET_DIFF)))) & \ + (u32)(XCSUDMA_STS_FIFO_LEVEL_MASK)) >> \ + (u32)(XCSUDMA_STS_FIFO_LEVEL_SHIFT)) + +/*****************************************************************************/ +/** +* +* This function returns the current number of read(src)/write(dst) outstanding +* commands based on the type of channel selected. +* +* @param InstancePtr is a pointer to XCsuDma instance to be worked on. +* @param Channel represents the type of channel either it is Source or +* Destination. +* Source channel - XCSUDMA_SRC_CHANNEL +* Destination Channel - XCSUDMA_DST_CHANNEL +* +* @return Count of outstanding commands. (Range is 0 to 9). +* +* @note None. +* C-style signature: +* u8 XCsuDma_GetWROutstandCount(XCsuDma *InstancePtr, +* XCsuDma_Channel Channel) +* +******************************************************************************/ +#define XCsuDma_GetWROutstandCount(InstancePtr, Channel) \ + ((XCsuDma_ReadReg(((InstancePtr)->Config.BaseAddress), \ + ((u32)(XCSUDMA_STS_OFFSET) + \ + ((u32)(Channel) * (u32)(XCSUDMA_OFFSET_DIFF)))) & \ + (u32)(XCUSDMA_STS_OUTSTDG_MASK)) >> \ + (u32)(XCUSDMA_STS_OUTSTDG_SHIFT)) + +/*****************************************************************************/ +/** +* +* This function returns the status of Channel either it is busy or not. +* +* @param InstancePtr is a pointer to XCsuDma instance to be worked on. +* @param Channel represents the type of channel either it is Source or +* Destination. +* Source channel - XCSUDMA_SRC_CHANNEL +* Destination Channel - XCSUDMA_DST_CHANNEL +* +* @return Returns the current status of the core. +* - TRUE represents core is currently busy. +* - FALSE represents core is not involved in any transfers. +* +* @note None. +* C-style signature: +* s32 XCsuDma_IsBusy(XCsuDma *InstancePtr, XCsuDma_Channel Channel) +* +******************************************************************************/ + +#define XCsuDma_IsBusy(InstancePtr, Channel) \ + ((XCsuDma_ReadReg(((InstancePtr)->Config.BaseAddress), \ + ((u32)(XCSUDMA_STS_OFFSET) + \ + ((u32)(Channel) * (u32)(XCSUDMA_OFFSET_DIFF)))) & \ + (u32)(XCSUDMA_STS_BUSY_MASK)) == (XCSUDMA_STS_BUSY_MASK)) ? \ + (TRUE) : (FALSE) + + +/**************************** Type Definitions *******************************/ + +/** +* This typedef contains configuration information for a CSU_DMA core. +* Each CSU_DMA core should have a configuration structure associated. +*/ +typedef struct { + u16 DeviceId; /**< DeviceId is the unique ID of the + * device */ + u32 BaseAddress; /**< BaseAddress is the physical base address + * of the device's registers */ +} XCsuDma_Config; + + +/******************************************************************************/ +/** +* +* The XCsuDma driver instance data structure. A pointer to an instance data +* structure is passed around by functions to refer to a specific driver +* instance. +*/ +typedef struct { + XCsuDma_Config Config; /**< Hardware configuration */ + u32 IsReady; /**< Device and the driver instance + * are initialized */ +}XCsuDma; + + +/******************************************************************************/ +/** +* This typedef contains all the configuration feilds which needs to be set +* before the start of the data transfer. All these feilds of CSU_DMA can be +* configured by using XCsuDma_SetConfig API. +*/ +typedef struct { + u8 SssFifoThesh; /**< SSS FIFO threshold value */ + u8 ApbErr; /**< ABP invalid access error */ + u8 EndianType; /**< Type of endianess */ + u8 AxiBurstType; /**< Type of AXI bus */ + u32 TimeoutValue; /**< Time out value */ + u8 FifoThresh; /**< FIFO threshold value */ + u8 Acache; /**< AXI CACHE selection */ + u8 RouteBit; /**< Selection of Route */ + u8 TimeoutEn; /**< Enable of time out counters */ + u16 TimeoutPre; /**< Pre scaler value */ + u8 MaxOutCmds; /**< Maximum number of outstanding + * commands */ +}XCsuDma_Configure; + +/*****************************************************************************/ + + +/************************** Function Prototypes ******************************/ + +XCsuDma_Config *XCsuDma_LookupConfig(u16 DeviceId); + +s32 XCsuDma_CfgInitialize(XCsuDma *InstancePtr, XCsuDma_Config *CfgPtr, + u32 EffectiveAddr); +void XCsuDma_Transfer(XCsuDma *InstancePtr, XCsuDma_Channel Channel, + UINTPTR Addr, u32 Size, u8 EnDataLast); +void XCsuDma_64BitTransfer(XCsuDma *InstancePtr, XCsuDma_Channel Channel, + u32 AddrLow, u32 AddrHigh, u32 Size, u8 EnDataLast); +void XCsuDma_LoopBackTransfer(XCsuDma *InstancePtr, u64 SrcAddr, u64 DstAddr, + u32 Size); +u64 XCsuDma_GetAddr(XCsuDma *InstancePtr, XCsuDma_Channel Channel); +u32 XCsuDma_GetSize(XCsuDma *InstancePtr, XCsuDma_Channel Channel); + +void XCsuDma_Pause(XCsuDma *InstancePtr, XCsuDma_Channel Channel, + XCsuDma_PauseType Type); +s32 XCsuDma_IsPaused(XCsuDma *InstancePtr, XCsuDma_Channel Channel, + XCsuDma_PauseType Type); +void XCsuDma_Resume(XCsuDma *InstancePtr, XCsuDma_Channel Channel, + XCsuDma_PauseType Type); + +u32 XCsuDma_GetCheckSum(XCsuDma *InstancePtr); +void XCsuDma_ClearCheckSum(XCsuDma *InstancePtr); + +void XCsuDma_SetConfig(XCsuDma *InstancePtr, XCsuDma_Channel Channel, + XCsuDma_Configure *ConfigurValues); +void XCsuDma_GetConfig(XCsuDma *InstancePtr, XCsuDma_Channel Channel, + XCsuDma_Configure *ConfigurValues); +void XCsuDma_ClearDoneCount(XCsuDma *InstancePtr, XCsuDma_Channel Channel); + +void XCsuDma_SetSafetyCheck(XCsuDma *InstancePtr, u32 Value); +u32 XCsuDma_GetSafetyCheck(XCsuDma *InstancePtr); + +/* Interrupt related APIs */ +u32 XCsuDma_IntrGetStatus(XCsuDma *InstancePtr, XCsuDma_Channel Channel); +void XCsuDma_IntrClear(XCsuDma *InstancePtr, XCsuDma_Channel Channel, + u32 Mask); +void XCsuDma_EnableIntr(XCsuDma *InstancePtr, XCsuDma_Channel Channel, + u32 Mask); +void XCsuDma_DisableIntr(XCsuDma *InstancePtr, XCsuDma_Channel Channel, + u32 Mask); +u32 XCsuDma_GetIntrMask(XCsuDma *InstancePtr, XCsuDma_Channel Channel); + +s32 XCsuDma_SelfTest(XCsuDma *InstancePtr); + +/******************************************************************************/ + +#ifdef __cplusplus +} + +#endif + +#endif /* End of protection macro */ +/** @} */ diff --git a/src/Xilinx/include/xcsudma_hw.h b/src/Xilinx/include/xcsudma_hw.h new file mode 100644 index 0000000..031c134 --- /dev/null +++ b/src/Xilinx/include/xcsudma_hw.h @@ -0,0 +1,311 @@ +/****************************************************************************** +* +* Copyright (C) 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xcsudma_hw.h +* @addtogroup csudma_v1_2 +* @{ +* +* This header file contains identifiers and register-level driver functions (or +* macros) that can be used to access the Xilinx CSU_DMA core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ------------------------------------------------------
+* 1.0   vnsld  22/10/14 First release
+*
+* +******************************************************************************/ + +#ifndef XCSUDMA_HW_H_ +#define XCSUDMA_HW_H_ /**< Prevent circular inclusions + * by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files *********************************/ + +#include "xil_io.h" + +/************************** Constant Definitions *****************************/ + +/** @name Registers offsets + * @{ + */ +#define XCSUDMA_ADDR_OFFSET 0x000 /**< Address Register Offset */ +#define XCSUDMA_SIZE_OFFSET 0x004 /**< Size Register Offset */ +#define XCSUDMA_STS_OFFSET 0x008 /**< Status Register Offset */ +#define XCSUDMA_CTRL_OFFSET 0x00C /**< Control Register Offset */ +#define XCSUDMA_CRC_OFFSET 0x010 /**< CheckSum Register Offset */ +#define XCSUDMA_I_STS_OFFSET 0x014 /**< Interrupt Status Register + * Offset */ +#define XCSUDMA_I_EN_OFFSET 0x018 /**< Interrupt Enable Register + * Offset */ +#define XCSUDMA_I_DIS_OFFSET 0x01C /**< Interrupt Disable Register + * Offset */ +#define XCSUDMA_I_MASK_OFFSET 0x020 /**< Interrupt Mask Register Offset */ +#define XCSUDMA_CTRL2_OFFSET 0x024 /**< Interrupt Control Register 2 + * Offset */ +#define XCSUDMA_ADDR_MSB_OFFSET 0x028 /**< Address's MSB Register Offset */ +#define XCSUDMA_SAFETY_CHK_OFFSET 0xFF8 /**< Safety Check Field Offset */ +#define XCSUDMA_FUTURE_ECO_OFFSET 0xFFC /**< Future potential ECO Offset */ +/*@}*/ + +/** @name CSU Base address and CSU_DMA reset offset + * @{ + */ +#define XCSU_BASEADDRESS 0xFFCA0000 + /**< CSU Base Address */ +#define XCSU_DMA_RESET_OFFSET 0x0000000CU /**< CSU_DMA Reset offset */ +/*@}*/ + +/** @name CSU_DMA Reset register bit masks + * @{ + */ +#define XCSUDMA_RESET_SET_MASK 0x00000001U /**< Reset set mask */ +#define XCSUDMA_RESET_UNSET_MASK 0x00000000U /**< Reset unset mask*/ +/*@}*/ + +/** @name Offset difference for Source and destination + * @{ + */ +#define XCSUDMA_OFFSET_DIFF 0x00000800U /**< Offset difference for + * source and + * destination channels */ +/*@}*/ + +/** @name Address register bit masks + * @{ + */ +#define XCSUDMA_ADDR_MASK 0xFFFFFFFCU /**< Address mask */ +#define XCSUDMA_ADDR_LSB_MASK 0x00000003U /**< Address alignment check + * mask */ +/*@}*/ + +/** @name Size register bit masks and shifts + * @{ + */ +#define XCSUDMA_SIZE_MASK 0x1FFFFFFCU /**< Mask for size */ +#define XCSUDMA_LAST_WORD_MASK 0x00000001U /**< Last word check bit mask*/ +#define XCSUDMA_SIZE_SHIFT 2U /**< Shift for size */ +/*@}*/ + +/** @name Status register bit masks and shifts + * @{ + */ +#define XCSUDMA_STS_DONE_CNT_MASK 0x0000E000U /**< Count done mask */ +#define XCSUDMA_STS_FIFO_LEVEL_MASK 0x00001FE0U /**< FIFO level mask */ +#define XCUSDMA_STS_OUTSTDG_MASK 0x0000001EU /**< No.of outstanding + * read/write + * commands mask */ +#define XCSUDMA_STS_BUSY_MASK 0x00000001U /**< Busy mask */ +#define XCSUDMA_STS_DONE_CNT_SHIFT 13U /**< Shift for Count + * done */ +#define XCSUDMA_STS_FIFO_LEVEL_SHIFT 5U /**< Shift for FIFO + * level */ +#define XCUSDMA_STS_OUTSTDG_SHIFT 1U /**< Shift for No.of + * outstanding + * read/write + * commands */ +/*@}*/ + +/** @name Control register bit masks and shifts + * @{ + */ +#define XCSUDMA_CTRL_SSS_FIFOTHRESH_MASK 0xFE000000U /**< SSS FIFO threshold + * value mask */ +#define XCSUDMA_CTRL_APB_ERR_MASK 0x01000000U /**< APB register + * access error + * mask */ +#define XCSUDMA_CTRL_ENDIAN_MASK 0x00800000U /**< Endianess mask */ +#define XCSUDMA_CTRL_BURST_MASK 0x00400000U /**< AXI burst type + * mask */ +#define XCSUDMA_CTRL_TIMEOUT_MASK 0x003FFC00U /**< Time out value + * mask */ +#define XCSUDMA_CTRL_FIFO_THRESH_MASK 0x000003FCU /**< FIFO threshold + * mask */ +#define XCSUDMA_CTRL_PAUSE_MEM_MASK 0x00000001U /**< Memory pause + * mask */ +#define XCSUDMA_CTRL_PAUSE_STRM_MASK 0x00000002U /**< Stream pause + * mask */ +#define XCSUDMA_CTRL_SSS_FIFOTHRESH_SHIFT 25U /**< SSS FIFO threshold + * shift */ +#define XCSUDMA_CTRL_APB_ERR_SHIFT 24U /**< APB error shift */ +#define XCSUDMA_CTRL_ENDIAN_SHIFT 23U /**< Endianess shift */ +#define XCSUDMA_CTRL_BURST_SHIFT 22U /**< AXI burst type + * shift */ +#define XCSUDMA_CTRL_TIMEOUT_SHIFT 10U /**< Time out value + * shift */ +#define XCSUDMA_CTRL_FIFO_THRESH_SHIFT 2U /**< FIFO thresh + * shift */ +/*@}*/ + +/** @name CheckSum register bit masks + * @{ + */ +#define XCSUDMA_CRC_RESET_MASK 0x00000000U /**< Mask to reset + * value of + * check sum */ +/*@}*/ + +/** @name Interrupt Enable/Disable/Mask/Status registers bit masks + * @{ + */ +#define XCSUDMA_IXR_FIFO_OVERFLOW_MASK 0x00000001U /**< FIFO overflow + * mask, it is valid + * only to Destination + * Channel */ +#define XCSUDMA_IXR_INVALID_APB_MASK 0x00000040U /**< Invalid APB access + * mask */ +#define XCSUDMA_IXR_FIFO_THRESHHIT_MASK 0x00000020U /**< FIFO threshold hit + * indicator mask */ +#define XCSUDMA_IXR_TIMEOUT_MEM_MASK 0x00000010U /**< Time out counter + * expired to access + * memory mask */ +#define XCSUDMA_IXR_TIMEOUT_STRM_MASK 0x00000008U /**< Time out counter + * expired to access + * stream mask */ +#define XCSUDMA_IXR_AXI_WRERR_MASK 0x00000004U /**< AXI Read/Write + * error mask */ +#define XCSUDMA_IXR_DONE_MASK 0x00000002U /**< Done mask */ +#define XCSUDMA_IXR_MEM_DONE_MASK 0x00000001U /**< Memory done + * mask, it is valid + * only for source + * channel*/ +#define XCSUDMA_IXR_SRC_MASK 0x0000007FU + /**< ((XCSUDMA_IXR_INVALID_APB_MASK)| + (XCSUDMA_IXR_FIFO_THRESHHIT_MASK) | + (XCSUDMA_IXR_TIMEOUT_MEM_MASK) | + (XCSUDMA_IXR_TIMEOUT_STRM_MASK) | + (XCSUDMA_IXR_AXI_WRERR_MASK) | + (XCSUDMA_IXR_DONE_MASK) | + (XCSUDMA_IXR_MEM_DONE_MASK)) */ + /**< All interrupt mask + * for source */ +#define XCSUDMA_IXR_DST_MASK 0x000000FEU + /**< ((XCSUDMA_IXR_FIFO_OVERFLOW_MASK) | + (XCSUDMA_IXR_INVALID_APB_MASK) | + (XCSUDMA_IXR_FIFO_THRESHHIT_MASK) | + (XCSUDMA_IXR_TIMEOUT_MEM_MASK) | + (XCSUDMA_IXR_TIMEOUT_STRM_MASK) | + (XCSUDMA_IXR_AXI_WRERR_MASK) | + (XCSUDMA_IXR_DONE_MASK)) */ + /**< All interrupt mask + * for destination */ +/*@}*/ + +/** @name Control register 2 bit masks and shifts + * @{ + */ +#define XCSUDMA_CTRL2_RESERVED_MASK 0x083F0000U /**< Reserved bits + * mask */ +#define XCSUDMA_CTRL2_ACACHE_MASK 0X07000000U /**< AXI CACHE mask */ +#define XCSUDMA_CTRL2_ROUTE_MASK 0x00800000U /**< Route mask */ +#define XCSUDMA_CTRL2_TIMEOUT_EN_MASK 0x00400000U /**< Time out counters + * enable mask */ +#define XCSUDMA_CTRL2_TIMEOUT_PRE_MASK 0x0000FFF0U /**< Time out pre + * mask */ +#define XCSUDMA_CTRL2_MAXCMDS_MASK 0x0000000FU /**< Maximum commands + * mask */ +#define XCSUDMA_CTRL2_RESET_MASK 0x0000FFF8U /**< Reset mask */ +#define XCSUDMA_CTRL2_ACACHE_SHIFT 24U /**< Shift for + * AXI R/W CACHE */ +#define XCSUDMA_CTRL2_ROUTE_SHIFT 23U /**< Shift for route */ +#define XCSUDMA_CTRL2_TIMEOUT_EN_SHIFT 22U /**< Shift for Timeout + * enable feild */ +#define XCSUDMA_CTRL2_TIMEOUT_PRE_SHIFT 4U /**< Shift for Timeout + * pre feild */ +/*@}*/ + +/** @name MSB Address register bit masks and shifts + * @{ + */ +#define XCSUDMA_MSB_ADDR_MASK 0x0001FFFFU /**< MSB bits of address + * mask */ +#define XCSUDMA_MSB_ADDR_SHIFT 32U /**< Shift for MSB bits of + * address */ +/*@}*/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +#define XCsuDma_In32 Xil_In32 /**< Input operation */ +#define XCsuDma_Out32 Xil_Out32 /**< Output operation */ + +/*****************************************************************************/ +/** +* +* This macro reads the given register. +* +* @param BaseAddress is the Xilinx base address of the CSU_DMA core. +* @param RegOffset is the register offset of the register. +* +* @return The 32-bit value of the register. +* +* @note C-style signature: +* u32 XCsuDma_ReadReg(u32 BaseAddress, u32 RegOffset) +* +******************************************************************************/ +#define XCsuDma_ReadReg(BaseAddress, RegOffset) \ + XCsuDma_In32((BaseAddress) + (u32)(RegOffset)) + +/*****************************************************************************/ +/** +* +* This macro writes the value into the given register. +* +* @param BaseAddress is the Xilinx base address of the CSU_DMA core. +* @param RegOffset is the register offset of the register. +* @param Data is the 32-bit value to write to the register. +* +* @return None. +* +* @note C-style signature: +* void XCsuDma_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data) +* +******************************************************************************/ +#define XCsuDma_WriteReg(BaseAddress, RegOffset, Data) \ + XCsuDma_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data)) + + +#ifdef __cplusplus +} + +#endif + + +#endif /* End of protection macro */ +/** @} */ diff --git a/src/Xilinx/include/xddr_xmpu0_cfg.h b/src/Xilinx/include/xddr_xmpu0_cfg.h new file mode 100644 index 0000000..9029bea --- /dev/null +++ b/src/Xilinx/include/xddr_xmpu0_cfg.h @@ -0,0 +1,1304 @@ +/* ### HEADER ### */ + +#ifndef __XDDR_XMPU0_CFG_H__ +#define __XDDR_XMPU0_CFG_H__ + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * XddrXmpu0Cfg Base Address + */ +#define XDDR_XMPU0_CFG_BASEADDR 0xFD000000UL + +/** + * Register: XddrXmpu0CfgCtrl + */ +#define XDDR_XMPU0_CFG_CTRL ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000000UL ) +#define XDDR_XMPU0_CFG_CTRL_RSTVAL 0x00000003UL + +#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_SHIFT 3UL +#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_WIDTH 1UL +#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_CTRL_POISONCFG_SHIFT 2UL +#define XDDR_XMPU0_CFG_CTRL_POISONCFG_WIDTH 1UL +#define XDDR_XMPU0_CFG_CTRL_POISONCFG_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_CTRL_POISONCFG_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_SHIFT 0UL +#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_DEFVAL 0x1UL + +/** + * Register: XddrXmpu0CfgErrSts1 + */ +#define XDDR_XMPU0_CFG_ERR_STS1 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000004UL ) +#define XDDR_XMPU0_CFG_ERR_STS1_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_WIDTH 32UL +#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_MASK 0xffffffffUL +#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgErrSts2 + */ +#define XDDR_XMPU0_CFG_ERR_STS2 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000008UL ) +#define XDDR_XMPU0_CFG_ERR_STS2_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgPoison + */ +#define XDDR_XMPU0_CFG_POISON ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000000CUL ) +#define XDDR_XMPU0_CFG_POISON_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_POISON_ATTRIB_SHIFT 20UL +#define XDDR_XMPU0_CFG_POISON_ATTRIB_WIDTH 12UL +#define XDDR_XMPU0_CFG_POISON_ATTRIB_MASK 0xfff00000UL +#define XDDR_XMPU0_CFG_POISON_ATTRIB_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_POISON_BASE_SHIFT 0UL +#define XDDR_XMPU0_CFG_POISON_BASE_WIDTH 20UL +#define XDDR_XMPU0_CFG_POISON_BASE_MASK 0x000fffffUL +#define XDDR_XMPU0_CFG_POISON_BASE_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgIsr + */ +#define XDDR_XMPU0_CFG_ISR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000010UL ) +#define XDDR_XMPU0_CFG_ISR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_ISR_INV_APB_SHIFT 0UL +#define XDDR_XMPU0_CFG_ISR_INV_APB_WIDTH 1UL +#define XDDR_XMPU0_CFG_ISR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_ISR_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgImr + */ +#define XDDR_XMPU0_CFG_IMR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000014UL ) +#define XDDR_XMPU0_CFG_IMR_RSTVAL 0x0000000fUL + +#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_IMR_INV_APB_SHIFT 0UL +#define XDDR_XMPU0_CFG_IMR_INV_APB_WIDTH 1UL +#define XDDR_XMPU0_CFG_IMR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_IMR_INV_APB_DEFVAL 0x1UL + +/** + * Register: XddrXmpu0CfgIen + */ +#define XDDR_XMPU0_CFG_IEN ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000018UL ) +#define XDDR_XMPU0_CFG_IEN_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_IEN_INV_APB_SHIFT 0UL +#define XDDR_XMPU0_CFG_IEN_INV_APB_WIDTH 1UL +#define XDDR_XMPU0_CFG_IEN_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_IEN_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgIds + */ +#define XDDR_XMPU0_CFG_IDS ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000001CUL ) +#define XDDR_XMPU0_CFG_IDS_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_IDS_INV_APB_SHIFT 0UL +#define XDDR_XMPU0_CFG_IDS_INV_APB_WIDTH 1UL +#define XDDR_XMPU0_CFG_IDS_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_IDS_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgLock + */ +#define XDDR_XMPU0_CFG_LOCK ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000020UL ) +#define XDDR_XMPU0_CFG_LOCK_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_SHIFT 0UL +#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_WIDTH 1UL +#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR00Strt + */ +#define XDDR_XMPU0_CFG_R00_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000100UL ) +#define XDDR_XMPU0_CFG_R00_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R00_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R00_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R00_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R00_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR00End + */ +#define XDDR_XMPU0_CFG_R00_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000104UL ) +#define XDDR_XMPU0_CFG_R00_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R00_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R00_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R00_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R00_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR00Mstr + */ +#define XDDR_XMPU0_CFG_R00_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000108UL ) +#define XDDR_XMPU0_CFG_R00_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R00_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R00_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R00_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R00_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R00_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R00_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R00_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R00_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR00 + */ +#define XDDR_XMPU0_CFG_R00 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000010CUL ) +#define XDDR_XMPU0_CFG_R00_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R00_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R00_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R00_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R00_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R00_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R00_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R00_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R00_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R00_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R00_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R00_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R00_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R00_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R00_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R00_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R00_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR01Strt + */ +#define XDDR_XMPU0_CFG_R01_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000110UL ) +#define XDDR_XMPU0_CFG_R01_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R01_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R01_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R01_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R01_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR01End + */ +#define XDDR_XMPU0_CFG_R01_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000114UL ) +#define XDDR_XMPU0_CFG_R01_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R01_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R01_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R01_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R01_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR01Mstr + */ +#define XDDR_XMPU0_CFG_R01_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000118UL ) +#define XDDR_XMPU0_CFG_R01_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R01_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R01_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R01_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R01_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R01_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R01_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R01_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R01_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR01 + */ +#define XDDR_XMPU0_CFG_R01 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000011CUL ) +#define XDDR_XMPU0_CFG_R01_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R01_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R01_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R01_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R01_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R01_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R01_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R01_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R01_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R01_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R01_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R01_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R01_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R01_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R01_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R01_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R01_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR02Strt + */ +#define XDDR_XMPU0_CFG_R02_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000120UL ) +#define XDDR_XMPU0_CFG_R02_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R02_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R02_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R02_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R02_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR02End + */ +#define XDDR_XMPU0_CFG_R02_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000124UL ) +#define XDDR_XMPU0_CFG_R02_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R02_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R02_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R02_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R02_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR02Mstr + */ +#define XDDR_XMPU0_CFG_R02_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000128UL ) +#define XDDR_XMPU0_CFG_R02_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R02_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R02_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R02_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R02_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R02_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R02_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R02_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R02_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR02 + */ +#define XDDR_XMPU0_CFG_R02 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000012CUL ) +#define XDDR_XMPU0_CFG_R02_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R02_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R02_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R02_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R02_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R02_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R02_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R02_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R02_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R02_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R02_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R02_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R02_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R02_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R02_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R02_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R02_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR03Strt + */ +#define XDDR_XMPU0_CFG_R03_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000130UL ) +#define XDDR_XMPU0_CFG_R03_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R03_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R03_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R03_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R03_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR03End + */ +#define XDDR_XMPU0_CFG_R03_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000134UL ) +#define XDDR_XMPU0_CFG_R03_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R03_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R03_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R03_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R03_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR03Mstr + */ +#define XDDR_XMPU0_CFG_R03_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000138UL ) +#define XDDR_XMPU0_CFG_R03_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R03_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R03_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R03_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R03_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R03_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R03_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R03_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R03_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR03 + */ +#define XDDR_XMPU0_CFG_R03 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000013CUL ) +#define XDDR_XMPU0_CFG_R03_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R03_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R03_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R03_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R03_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R03_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R03_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R03_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R03_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R03_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R03_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R03_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R03_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R03_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R03_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R03_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R03_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR04Strt + */ +#define XDDR_XMPU0_CFG_R04_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000140UL ) +#define XDDR_XMPU0_CFG_R04_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R04_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R04_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R04_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R04_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR04End + */ +#define XDDR_XMPU0_CFG_R04_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000144UL ) +#define XDDR_XMPU0_CFG_R04_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R04_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R04_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R04_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R04_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR04Mstr + */ +#define XDDR_XMPU0_CFG_R04_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000148UL ) +#define XDDR_XMPU0_CFG_R04_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R04_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R04_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R04_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R04_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R04_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R04_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R04_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R04_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR04 + */ +#define XDDR_XMPU0_CFG_R04 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000014CUL ) +#define XDDR_XMPU0_CFG_R04_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R04_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R04_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R04_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R04_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R04_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R04_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R04_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R04_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R04_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R04_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R04_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R04_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R04_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R04_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R04_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R04_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR05Strt + */ +#define XDDR_XMPU0_CFG_R05_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000150UL ) +#define XDDR_XMPU0_CFG_R05_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R05_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R05_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R05_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R05_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR05End + */ +#define XDDR_XMPU0_CFG_R05_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000154UL ) +#define XDDR_XMPU0_CFG_R05_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R05_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R05_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R05_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R05_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR05Mstr + */ +#define XDDR_XMPU0_CFG_R05_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000158UL ) +#define XDDR_XMPU0_CFG_R05_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R05_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R05_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R05_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R05_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R05_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R05_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R05_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R05_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR05 + */ +#define XDDR_XMPU0_CFG_R05 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000015CUL ) +#define XDDR_XMPU0_CFG_R05_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R05_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R05_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R05_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R05_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R05_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R05_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R05_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R05_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R05_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R05_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R05_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R05_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R05_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R05_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R05_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R05_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR06Strt + */ +#define XDDR_XMPU0_CFG_R06_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000160UL ) +#define XDDR_XMPU0_CFG_R06_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R06_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R06_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R06_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R06_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR06End + */ +#define XDDR_XMPU0_CFG_R06_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000164UL ) +#define XDDR_XMPU0_CFG_R06_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R06_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R06_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R06_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R06_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR06Mstr + */ +#define XDDR_XMPU0_CFG_R06_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000168UL ) +#define XDDR_XMPU0_CFG_R06_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R06_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R06_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R06_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R06_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R06_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R06_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R06_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R06_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR06 + */ +#define XDDR_XMPU0_CFG_R06 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000016CUL ) +#define XDDR_XMPU0_CFG_R06_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R06_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R06_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R06_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R06_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R06_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R06_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R06_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R06_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R06_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R06_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R06_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R06_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R06_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R06_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R06_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R06_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR07Strt + */ +#define XDDR_XMPU0_CFG_R07_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000170UL ) +#define XDDR_XMPU0_CFG_R07_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R07_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R07_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R07_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R07_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR07End + */ +#define XDDR_XMPU0_CFG_R07_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000174UL ) +#define XDDR_XMPU0_CFG_R07_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R07_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R07_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R07_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R07_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR07Mstr + */ +#define XDDR_XMPU0_CFG_R07_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000178UL ) +#define XDDR_XMPU0_CFG_R07_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R07_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R07_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R07_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R07_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R07_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R07_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R07_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R07_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR07 + */ +#define XDDR_XMPU0_CFG_R07 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000017CUL ) +#define XDDR_XMPU0_CFG_R07_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R07_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R07_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R07_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R07_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R07_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R07_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R07_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R07_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R07_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R07_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R07_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R07_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R07_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R07_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R07_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R07_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR08Strt + */ +#define XDDR_XMPU0_CFG_R08_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000180UL ) +#define XDDR_XMPU0_CFG_R08_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R08_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R08_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R08_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R08_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR08End + */ +#define XDDR_XMPU0_CFG_R08_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000184UL ) +#define XDDR_XMPU0_CFG_R08_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R08_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R08_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R08_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R08_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR08Mstr + */ +#define XDDR_XMPU0_CFG_R08_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000188UL ) +#define XDDR_XMPU0_CFG_R08_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R08_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R08_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R08_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R08_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R08_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R08_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R08_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R08_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR08 + */ +#define XDDR_XMPU0_CFG_R08 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000018CUL ) +#define XDDR_XMPU0_CFG_R08_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R08_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R08_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R08_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R08_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R08_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R08_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R08_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R08_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R08_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R08_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R08_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R08_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R08_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R08_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R08_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R08_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR09Strt + */ +#define XDDR_XMPU0_CFG_R09_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000190UL ) +#define XDDR_XMPU0_CFG_R09_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R09_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R09_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R09_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R09_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR09End + */ +#define XDDR_XMPU0_CFG_R09_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000194UL ) +#define XDDR_XMPU0_CFG_R09_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R09_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R09_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R09_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R09_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR09Mstr + */ +#define XDDR_XMPU0_CFG_R09_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000198UL ) +#define XDDR_XMPU0_CFG_R09_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R09_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R09_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R09_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R09_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R09_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R09_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R09_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R09_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR09 + */ +#define XDDR_XMPU0_CFG_R09 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000019CUL ) +#define XDDR_XMPU0_CFG_R09_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R09_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R09_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R09_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R09_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R09_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R09_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R09_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R09_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R09_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R09_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R09_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R09_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R09_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R09_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R09_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R09_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR10Strt + */ +#define XDDR_XMPU0_CFG_R10_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A0UL ) +#define XDDR_XMPU0_CFG_R10_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R10_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R10_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R10_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R10_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR10End + */ +#define XDDR_XMPU0_CFG_R10_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A4UL ) +#define XDDR_XMPU0_CFG_R10_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R10_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R10_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R10_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R10_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR10Mstr + */ +#define XDDR_XMPU0_CFG_R10_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A8UL ) +#define XDDR_XMPU0_CFG_R10_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R10_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R10_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R10_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R10_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R10_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R10_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R10_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R10_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR10 + */ +#define XDDR_XMPU0_CFG_R10 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001ACUL ) +#define XDDR_XMPU0_CFG_R10_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R10_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R10_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R10_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R10_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R10_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R10_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R10_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R10_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R10_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R10_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R10_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R10_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R10_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R10_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R10_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R10_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR11Strt + */ +#define XDDR_XMPU0_CFG_R11_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B0UL ) +#define XDDR_XMPU0_CFG_R11_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R11_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R11_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R11_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R11_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR11End + */ +#define XDDR_XMPU0_CFG_R11_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B4UL ) +#define XDDR_XMPU0_CFG_R11_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R11_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R11_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R11_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R11_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR11Mstr + */ +#define XDDR_XMPU0_CFG_R11_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B8UL ) +#define XDDR_XMPU0_CFG_R11_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R11_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R11_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R11_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R11_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R11_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R11_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R11_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R11_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR11 + */ +#define XDDR_XMPU0_CFG_R11 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001BCUL ) +#define XDDR_XMPU0_CFG_R11_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R11_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R11_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R11_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R11_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R11_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R11_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R11_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R11_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R11_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R11_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R11_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R11_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R11_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R11_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R11_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R11_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR12Strt + */ +#define XDDR_XMPU0_CFG_R12_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C0UL ) +#define XDDR_XMPU0_CFG_R12_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R12_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R12_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R12_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R12_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR12End + */ +#define XDDR_XMPU0_CFG_R12_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C4UL ) +#define XDDR_XMPU0_CFG_R12_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R12_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R12_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R12_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R12_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR12Mstr + */ +#define XDDR_XMPU0_CFG_R12_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C8UL ) +#define XDDR_XMPU0_CFG_R12_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R12_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R12_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R12_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R12_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R12_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R12_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R12_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R12_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR12 + */ +#define XDDR_XMPU0_CFG_R12 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001CCUL ) +#define XDDR_XMPU0_CFG_R12_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R12_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R12_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R12_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R12_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R12_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R12_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R12_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R12_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R12_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R12_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R12_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R12_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R12_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R12_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R12_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R12_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR13Strt + */ +#define XDDR_XMPU0_CFG_R13_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D0UL ) +#define XDDR_XMPU0_CFG_R13_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R13_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R13_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R13_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R13_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR13End + */ +#define XDDR_XMPU0_CFG_R13_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D4UL ) +#define XDDR_XMPU0_CFG_R13_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R13_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R13_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R13_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R13_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR13Mstr + */ +#define XDDR_XMPU0_CFG_R13_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D8UL ) +#define XDDR_XMPU0_CFG_R13_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R13_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R13_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R13_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R13_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R13_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R13_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R13_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R13_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR13 + */ +#define XDDR_XMPU0_CFG_R13 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001DCUL ) +#define XDDR_XMPU0_CFG_R13_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R13_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R13_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R13_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R13_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R13_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R13_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R13_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R13_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R13_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R13_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R13_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R13_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R13_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R13_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R13_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R13_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR14Strt + */ +#define XDDR_XMPU0_CFG_R14_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E0UL ) +#define XDDR_XMPU0_CFG_R14_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R14_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R14_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R14_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R14_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR14End + */ +#define XDDR_XMPU0_CFG_R14_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E4UL ) +#define XDDR_XMPU0_CFG_R14_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R14_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R14_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R14_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R14_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR14Mstr + */ +#define XDDR_XMPU0_CFG_R14_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E8UL ) +#define XDDR_XMPU0_CFG_R14_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R14_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R14_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R14_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R14_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R14_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R14_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R14_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R14_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR14 + */ +#define XDDR_XMPU0_CFG_R14 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001ECUL ) +#define XDDR_XMPU0_CFG_R14_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R14_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R14_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R14_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R14_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R14_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R14_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R14_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R14_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R14_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R14_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R14_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R14_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R14_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R14_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R14_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R14_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR15Strt + */ +#define XDDR_XMPU0_CFG_R15_STRT ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F0UL ) +#define XDDR_XMPU0_CFG_R15_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R15_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R15_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R15_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R15_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR15End + */ +#define XDDR_XMPU0_CFG_R15_END ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F4UL ) +#define XDDR_XMPU0_CFG_R15_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R15_END_ADDR_SHIFT 0UL +#define XDDR_XMPU0_CFG_R15_END_ADDR_WIDTH 28UL +#define XDDR_XMPU0_CFG_R15_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU0_CFG_R15_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR15Mstr + */ +#define XDDR_XMPU0_CFG_R15_MSTR ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F8UL ) +#define XDDR_XMPU0_CFG_R15_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU0_CFG_R15_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU0_CFG_R15_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU0_CFG_R15_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU0_CFG_R15_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R15_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU0_CFG_R15_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU0_CFG_R15_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU0_CFG_R15_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu0CfgR15 + */ +#define XDDR_XMPU0_CFG_R15 ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001FCUL ) +#define XDDR_XMPU0_CFG_R15_RSTVAL 0x00000008UL + +#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R15_REGNNS_SHIFT 3UL +#define XDDR_XMPU0_CFG_R15_REGNNS_WIDTH 1UL +#define XDDR_XMPU0_CFG_R15_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU0_CFG_R15_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU0_CFG_R15_WRALWD_SHIFT 2UL +#define XDDR_XMPU0_CFG_R15_WRALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R15_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU0_CFG_R15_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R15_RDALWD_SHIFT 1UL +#define XDDR_XMPU0_CFG_R15_RDALWD_WIDTH 1UL +#define XDDR_XMPU0_CFG_R15_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU0_CFG_R15_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU0_CFG_R15_EN_SHIFT 0UL +#define XDDR_XMPU0_CFG_R15_EN_WIDTH 1UL +#define XDDR_XMPU0_CFG_R15_EN_MASK 0x00000001UL +#define XDDR_XMPU0_CFG_R15_EN_DEFVAL 0x0UL + + +#ifdef __cplusplus +} +#endif + +#endif /* __XDDR_XMPU0_CFG_H__ */ diff --git a/src/Xilinx/include/xddr_xmpu1_cfg.h b/src/Xilinx/include/xddr_xmpu1_cfg.h new file mode 100644 index 0000000..e2fa6d4 --- /dev/null +++ b/src/Xilinx/include/xddr_xmpu1_cfg.h @@ -0,0 +1,1304 @@ +/* ### HEADER ### */ + +#ifndef __XDDR_XMPU1_CFG_H__ +#define __XDDR_XMPU1_CFG_H__ + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * XddrXmpu1Cfg Base Address + */ +#define XDDR_XMPU1_CFG_BASEADDR 0xFD010000UL + +/** + * Register: XddrXmpu1CfgCtrl + */ +#define XDDR_XMPU1_CFG_CTRL ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000000UL ) +#define XDDR_XMPU1_CFG_CTRL_RSTVAL 0x00000003UL + +#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_SHIFT 3UL +#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_WIDTH 1UL +#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_CTRL_POISONCFG_SHIFT 2UL +#define XDDR_XMPU1_CFG_CTRL_POISONCFG_WIDTH 1UL +#define XDDR_XMPU1_CFG_CTRL_POISONCFG_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_CTRL_POISONCFG_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_SHIFT 0UL +#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_DEFVAL 0x1UL + +/** + * Register: XddrXmpu1CfgErrSts1 + */ +#define XDDR_XMPU1_CFG_ERR_STS1 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000004UL ) +#define XDDR_XMPU1_CFG_ERR_STS1_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_WIDTH 32UL +#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_MASK 0xffffffffUL +#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgErrSts2 + */ +#define XDDR_XMPU1_CFG_ERR_STS2 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000008UL ) +#define XDDR_XMPU1_CFG_ERR_STS2_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgPoison + */ +#define XDDR_XMPU1_CFG_POISON ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000000CUL ) +#define XDDR_XMPU1_CFG_POISON_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_POISON_ATTRIB_SHIFT 20UL +#define XDDR_XMPU1_CFG_POISON_ATTRIB_WIDTH 12UL +#define XDDR_XMPU1_CFG_POISON_ATTRIB_MASK 0xfff00000UL +#define XDDR_XMPU1_CFG_POISON_ATTRIB_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_POISON_BASE_SHIFT 0UL +#define XDDR_XMPU1_CFG_POISON_BASE_WIDTH 20UL +#define XDDR_XMPU1_CFG_POISON_BASE_MASK 0x000fffffUL +#define XDDR_XMPU1_CFG_POISON_BASE_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgIsr + */ +#define XDDR_XMPU1_CFG_ISR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000010UL ) +#define XDDR_XMPU1_CFG_ISR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_ISR_INV_APB_SHIFT 0UL +#define XDDR_XMPU1_CFG_ISR_INV_APB_WIDTH 1UL +#define XDDR_XMPU1_CFG_ISR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_ISR_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgImr + */ +#define XDDR_XMPU1_CFG_IMR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000014UL ) +#define XDDR_XMPU1_CFG_IMR_RSTVAL 0x0000000fUL + +#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_IMR_INV_APB_SHIFT 0UL +#define XDDR_XMPU1_CFG_IMR_INV_APB_WIDTH 1UL +#define XDDR_XMPU1_CFG_IMR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_IMR_INV_APB_DEFVAL 0x1UL + +/** + * Register: XddrXmpu1CfgIen + */ +#define XDDR_XMPU1_CFG_IEN ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000018UL ) +#define XDDR_XMPU1_CFG_IEN_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_IEN_INV_APB_SHIFT 0UL +#define XDDR_XMPU1_CFG_IEN_INV_APB_WIDTH 1UL +#define XDDR_XMPU1_CFG_IEN_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_IEN_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgIds + */ +#define XDDR_XMPU1_CFG_IDS ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000001CUL ) +#define XDDR_XMPU1_CFG_IDS_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_IDS_INV_APB_SHIFT 0UL +#define XDDR_XMPU1_CFG_IDS_INV_APB_WIDTH 1UL +#define XDDR_XMPU1_CFG_IDS_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_IDS_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgLock + */ +#define XDDR_XMPU1_CFG_LOCK ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000020UL ) +#define XDDR_XMPU1_CFG_LOCK_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_SHIFT 0UL +#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_WIDTH 1UL +#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR00Strt + */ +#define XDDR_XMPU1_CFG_R00_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000100UL ) +#define XDDR_XMPU1_CFG_R00_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R00_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R00_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R00_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R00_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR00End + */ +#define XDDR_XMPU1_CFG_R00_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000104UL ) +#define XDDR_XMPU1_CFG_R00_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R00_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R00_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R00_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R00_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR00Mstr + */ +#define XDDR_XMPU1_CFG_R00_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000108UL ) +#define XDDR_XMPU1_CFG_R00_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R00_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R00_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R00_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R00_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R00_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R00_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R00_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R00_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR00 + */ +#define XDDR_XMPU1_CFG_R00 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000010CUL ) +#define XDDR_XMPU1_CFG_R00_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R00_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R00_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R00_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R00_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R00_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R00_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R00_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R00_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R00_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R00_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R00_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R00_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R00_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R00_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R00_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R00_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR01Strt + */ +#define XDDR_XMPU1_CFG_R01_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000110UL ) +#define XDDR_XMPU1_CFG_R01_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R01_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R01_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R01_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R01_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR01End + */ +#define XDDR_XMPU1_CFG_R01_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000114UL ) +#define XDDR_XMPU1_CFG_R01_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R01_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R01_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R01_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R01_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR01Mstr + */ +#define XDDR_XMPU1_CFG_R01_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000118UL ) +#define XDDR_XMPU1_CFG_R01_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R01_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R01_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R01_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R01_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R01_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R01_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R01_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R01_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR01 + */ +#define XDDR_XMPU1_CFG_R01 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000011CUL ) +#define XDDR_XMPU1_CFG_R01_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R01_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R01_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R01_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R01_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R01_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R01_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R01_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R01_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R01_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R01_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R01_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R01_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R01_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R01_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R01_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R01_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR02Strt + */ +#define XDDR_XMPU1_CFG_R02_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000120UL ) +#define XDDR_XMPU1_CFG_R02_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R02_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R02_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R02_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R02_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR02End + */ +#define XDDR_XMPU1_CFG_R02_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000124UL ) +#define XDDR_XMPU1_CFG_R02_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R02_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R02_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R02_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R02_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR02Mstr + */ +#define XDDR_XMPU1_CFG_R02_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000128UL ) +#define XDDR_XMPU1_CFG_R02_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R02_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R02_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R02_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R02_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R02_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R02_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R02_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R02_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR02 + */ +#define XDDR_XMPU1_CFG_R02 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000012CUL ) +#define XDDR_XMPU1_CFG_R02_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R02_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R02_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R02_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R02_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R02_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R02_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R02_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R02_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R02_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R02_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R02_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R02_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R02_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R02_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R02_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R02_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR03Strt + */ +#define XDDR_XMPU1_CFG_R03_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000130UL ) +#define XDDR_XMPU1_CFG_R03_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R03_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R03_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R03_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R03_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR03End + */ +#define XDDR_XMPU1_CFG_R03_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000134UL ) +#define XDDR_XMPU1_CFG_R03_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R03_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R03_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R03_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R03_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR03Mstr + */ +#define XDDR_XMPU1_CFG_R03_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000138UL ) +#define XDDR_XMPU1_CFG_R03_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R03_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R03_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R03_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R03_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R03_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R03_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R03_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R03_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR03 + */ +#define XDDR_XMPU1_CFG_R03 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000013CUL ) +#define XDDR_XMPU1_CFG_R03_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R03_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R03_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R03_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R03_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R03_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R03_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R03_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R03_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R03_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R03_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R03_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R03_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R03_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R03_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R03_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R03_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR04Strt + */ +#define XDDR_XMPU1_CFG_R04_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000140UL ) +#define XDDR_XMPU1_CFG_R04_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R04_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R04_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R04_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R04_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR04End + */ +#define XDDR_XMPU1_CFG_R04_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000144UL ) +#define XDDR_XMPU1_CFG_R04_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R04_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R04_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R04_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R04_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR04Mstr + */ +#define XDDR_XMPU1_CFG_R04_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000148UL ) +#define XDDR_XMPU1_CFG_R04_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R04_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R04_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R04_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R04_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R04_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R04_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R04_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R04_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR04 + */ +#define XDDR_XMPU1_CFG_R04 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000014CUL ) +#define XDDR_XMPU1_CFG_R04_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R04_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R04_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R04_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R04_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R04_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R04_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R04_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R04_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R04_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R04_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R04_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R04_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R04_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R04_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R04_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R04_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR05Strt + */ +#define XDDR_XMPU1_CFG_R05_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000150UL ) +#define XDDR_XMPU1_CFG_R05_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R05_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R05_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R05_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R05_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR05End + */ +#define XDDR_XMPU1_CFG_R05_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000154UL ) +#define XDDR_XMPU1_CFG_R05_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R05_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R05_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R05_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R05_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR05Mstr + */ +#define XDDR_XMPU1_CFG_R05_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000158UL ) +#define XDDR_XMPU1_CFG_R05_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R05_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R05_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R05_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R05_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R05_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R05_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R05_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R05_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR05 + */ +#define XDDR_XMPU1_CFG_R05 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000015CUL ) +#define XDDR_XMPU1_CFG_R05_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R05_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R05_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R05_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R05_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R05_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R05_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R05_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R05_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R05_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R05_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R05_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R05_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R05_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R05_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R05_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R05_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR06Strt + */ +#define XDDR_XMPU1_CFG_R06_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000160UL ) +#define XDDR_XMPU1_CFG_R06_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R06_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R06_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R06_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R06_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR06End + */ +#define XDDR_XMPU1_CFG_R06_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000164UL ) +#define XDDR_XMPU1_CFG_R06_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R06_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R06_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R06_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R06_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR06Mstr + */ +#define XDDR_XMPU1_CFG_R06_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000168UL ) +#define XDDR_XMPU1_CFG_R06_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R06_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R06_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R06_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R06_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R06_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R06_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R06_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R06_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR06 + */ +#define XDDR_XMPU1_CFG_R06 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000016CUL ) +#define XDDR_XMPU1_CFG_R06_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R06_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R06_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R06_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R06_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R06_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R06_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R06_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R06_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R06_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R06_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R06_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R06_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R06_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R06_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R06_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R06_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR07Strt + */ +#define XDDR_XMPU1_CFG_R07_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000170UL ) +#define XDDR_XMPU1_CFG_R07_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R07_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R07_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R07_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R07_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR07End + */ +#define XDDR_XMPU1_CFG_R07_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000174UL ) +#define XDDR_XMPU1_CFG_R07_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R07_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R07_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R07_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R07_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR07Mstr + */ +#define XDDR_XMPU1_CFG_R07_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000178UL ) +#define XDDR_XMPU1_CFG_R07_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R07_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R07_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R07_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R07_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R07_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R07_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R07_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R07_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR07 + */ +#define XDDR_XMPU1_CFG_R07 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000017CUL ) +#define XDDR_XMPU1_CFG_R07_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R07_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R07_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R07_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R07_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R07_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R07_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R07_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R07_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R07_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R07_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R07_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R07_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R07_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R07_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R07_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R07_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR08Strt + */ +#define XDDR_XMPU1_CFG_R08_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000180UL ) +#define XDDR_XMPU1_CFG_R08_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R08_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R08_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R08_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R08_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR08End + */ +#define XDDR_XMPU1_CFG_R08_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000184UL ) +#define XDDR_XMPU1_CFG_R08_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R08_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R08_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R08_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R08_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR08Mstr + */ +#define XDDR_XMPU1_CFG_R08_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000188UL ) +#define XDDR_XMPU1_CFG_R08_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R08_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R08_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R08_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R08_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R08_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R08_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R08_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R08_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR08 + */ +#define XDDR_XMPU1_CFG_R08 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000018CUL ) +#define XDDR_XMPU1_CFG_R08_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R08_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R08_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R08_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R08_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R08_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R08_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R08_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R08_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R08_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R08_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R08_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R08_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R08_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R08_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R08_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R08_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR09Strt + */ +#define XDDR_XMPU1_CFG_R09_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000190UL ) +#define XDDR_XMPU1_CFG_R09_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R09_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R09_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R09_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R09_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR09End + */ +#define XDDR_XMPU1_CFG_R09_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000194UL ) +#define XDDR_XMPU1_CFG_R09_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R09_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R09_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R09_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R09_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR09Mstr + */ +#define XDDR_XMPU1_CFG_R09_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000198UL ) +#define XDDR_XMPU1_CFG_R09_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R09_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R09_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R09_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R09_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R09_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R09_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R09_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R09_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR09 + */ +#define XDDR_XMPU1_CFG_R09 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000019CUL ) +#define XDDR_XMPU1_CFG_R09_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R09_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R09_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R09_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R09_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R09_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R09_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R09_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R09_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R09_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R09_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R09_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R09_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R09_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R09_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R09_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R09_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR10Strt + */ +#define XDDR_XMPU1_CFG_R10_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A0UL ) +#define XDDR_XMPU1_CFG_R10_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R10_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R10_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R10_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R10_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR10End + */ +#define XDDR_XMPU1_CFG_R10_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A4UL ) +#define XDDR_XMPU1_CFG_R10_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R10_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R10_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R10_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R10_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR10Mstr + */ +#define XDDR_XMPU1_CFG_R10_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A8UL ) +#define XDDR_XMPU1_CFG_R10_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R10_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R10_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R10_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R10_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R10_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R10_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R10_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R10_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR10 + */ +#define XDDR_XMPU1_CFG_R10 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001ACUL ) +#define XDDR_XMPU1_CFG_R10_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R10_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R10_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R10_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R10_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R10_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R10_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R10_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R10_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R10_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R10_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R10_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R10_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R10_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R10_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R10_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R10_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR11Strt + */ +#define XDDR_XMPU1_CFG_R11_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B0UL ) +#define XDDR_XMPU1_CFG_R11_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R11_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R11_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R11_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R11_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR11End + */ +#define XDDR_XMPU1_CFG_R11_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B4UL ) +#define XDDR_XMPU1_CFG_R11_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R11_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R11_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R11_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R11_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR11Mstr + */ +#define XDDR_XMPU1_CFG_R11_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B8UL ) +#define XDDR_XMPU1_CFG_R11_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R11_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R11_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R11_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R11_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R11_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R11_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R11_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R11_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR11 + */ +#define XDDR_XMPU1_CFG_R11 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001BCUL ) +#define XDDR_XMPU1_CFG_R11_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R11_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R11_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R11_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R11_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R11_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R11_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R11_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R11_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R11_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R11_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R11_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R11_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R11_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R11_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R11_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R11_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR12Strt + */ +#define XDDR_XMPU1_CFG_R12_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C0UL ) +#define XDDR_XMPU1_CFG_R12_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R12_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R12_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R12_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R12_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR12End + */ +#define XDDR_XMPU1_CFG_R12_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C4UL ) +#define XDDR_XMPU1_CFG_R12_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R12_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R12_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R12_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R12_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR12Mstr + */ +#define XDDR_XMPU1_CFG_R12_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C8UL ) +#define XDDR_XMPU1_CFG_R12_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R12_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R12_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R12_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R12_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R12_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R12_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R12_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R12_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR12 + */ +#define XDDR_XMPU1_CFG_R12 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001CCUL ) +#define XDDR_XMPU1_CFG_R12_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R12_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R12_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R12_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R12_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R12_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R12_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R12_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R12_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R12_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R12_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R12_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R12_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R12_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R12_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R12_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R12_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR13Strt + */ +#define XDDR_XMPU1_CFG_R13_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D0UL ) +#define XDDR_XMPU1_CFG_R13_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R13_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R13_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R13_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R13_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR13End + */ +#define XDDR_XMPU1_CFG_R13_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D4UL ) +#define XDDR_XMPU1_CFG_R13_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R13_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R13_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R13_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R13_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR13Mstr + */ +#define XDDR_XMPU1_CFG_R13_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D8UL ) +#define XDDR_XMPU1_CFG_R13_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R13_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R13_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R13_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R13_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R13_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R13_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R13_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R13_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR13 + */ +#define XDDR_XMPU1_CFG_R13 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001DCUL ) +#define XDDR_XMPU1_CFG_R13_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R13_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R13_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R13_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R13_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R13_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R13_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R13_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R13_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R13_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R13_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R13_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R13_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R13_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R13_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R13_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R13_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR14Strt + */ +#define XDDR_XMPU1_CFG_R14_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E0UL ) +#define XDDR_XMPU1_CFG_R14_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R14_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R14_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R14_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R14_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR14End + */ +#define XDDR_XMPU1_CFG_R14_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E4UL ) +#define XDDR_XMPU1_CFG_R14_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R14_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R14_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R14_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R14_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR14Mstr + */ +#define XDDR_XMPU1_CFG_R14_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E8UL ) +#define XDDR_XMPU1_CFG_R14_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R14_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R14_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R14_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R14_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R14_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R14_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R14_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R14_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR14 + */ +#define XDDR_XMPU1_CFG_R14 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001ECUL ) +#define XDDR_XMPU1_CFG_R14_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R14_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R14_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R14_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R14_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R14_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R14_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R14_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R14_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R14_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R14_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R14_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R14_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R14_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R14_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R14_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R14_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR15Strt + */ +#define XDDR_XMPU1_CFG_R15_STRT ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F0UL ) +#define XDDR_XMPU1_CFG_R15_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R15_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R15_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R15_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R15_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR15End + */ +#define XDDR_XMPU1_CFG_R15_END ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F4UL ) +#define XDDR_XMPU1_CFG_R15_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R15_END_ADDR_SHIFT 0UL +#define XDDR_XMPU1_CFG_R15_END_ADDR_WIDTH 28UL +#define XDDR_XMPU1_CFG_R15_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU1_CFG_R15_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR15Mstr + */ +#define XDDR_XMPU1_CFG_R15_MSTR ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F8UL ) +#define XDDR_XMPU1_CFG_R15_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU1_CFG_R15_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU1_CFG_R15_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU1_CFG_R15_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU1_CFG_R15_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R15_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU1_CFG_R15_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU1_CFG_R15_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU1_CFG_R15_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu1CfgR15 + */ +#define XDDR_XMPU1_CFG_R15 ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001FCUL ) +#define XDDR_XMPU1_CFG_R15_RSTVAL 0x00000008UL + +#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R15_REGNNS_SHIFT 3UL +#define XDDR_XMPU1_CFG_R15_REGNNS_WIDTH 1UL +#define XDDR_XMPU1_CFG_R15_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU1_CFG_R15_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU1_CFG_R15_WRALWD_SHIFT 2UL +#define XDDR_XMPU1_CFG_R15_WRALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R15_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU1_CFG_R15_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R15_RDALWD_SHIFT 1UL +#define XDDR_XMPU1_CFG_R15_RDALWD_WIDTH 1UL +#define XDDR_XMPU1_CFG_R15_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU1_CFG_R15_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU1_CFG_R15_EN_SHIFT 0UL +#define XDDR_XMPU1_CFG_R15_EN_WIDTH 1UL +#define XDDR_XMPU1_CFG_R15_EN_MASK 0x00000001UL +#define XDDR_XMPU1_CFG_R15_EN_DEFVAL 0x0UL + + +#ifdef __cplusplus +} +#endif + +#endif /* __XDDR_XMPU1_CFG_H__ */ diff --git a/src/Xilinx/include/xddr_xmpu2_cfg.h b/src/Xilinx/include/xddr_xmpu2_cfg.h new file mode 100644 index 0000000..55ea2a7 --- /dev/null +++ b/src/Xilinx/include/xddr_xmpu2_cfg.h @@ -0,0 +1,1304 @@ +/* ### HEADER ### */ + +#ifndef __XDDR_XMPU2_CFG_H__ +#define __XDDR_XMPU2_CFG_H__ + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * XddrXmpu2Cfg Base Address + */ +#define XDDR_XMPU2_CFG_BASEADDR 0xFD020000UL + +/** + * Register: XddrXmpu2CfgCtrl + */ +#define XDDR_XMPU2_CFG_CTRL ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000000UL ) +#define XDDR_XMPU2_CFG_CTRL_RSTVAL 0x00000003UL + +#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_SHIFT 3UL +#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_WIDTH 1UL +#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_CTRL_POISONCFG_SHIFT 2UL +#define XDDR_XMPU2_CFG_CTRL_POISONCFG_WIDTH 1UL +#define XDDR_XMPU2_CFG_CTRL_POISONCFG_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_CTRL_POISONCFG_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_SHIFT 0UL +#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_DEFVAL 0x1UL + +/** + * Register: XddrXmpu2CfgErrSts1 + */ +#define XDDR_XMPU2_CFG_ERR_STS1 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000004UL ) +#define XDDR_XMPU2_CFG_ERR_STS1_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_WIDTH 32UL +#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_MASK 0xffffffffUL +#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgErrSts2 + */ +#define XDDR_XMPU2_CFG_ERR_STS2 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000008UL ) +#define XDDR_XMPU2_CFG_ERR_STS2_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgPoison + */ +#define XDDR_XMPU2_CFG_POISON ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000000CUL ) +#define XDDR_XMPU2_CFG_POISON_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_POISON_ATTRIB_SHIFT 20UL +#define XDDR_XMPU2_CFG_POISON_ATTRIB_WIDTH 12UL +#define XDDR_XMPU2_CFG_POISON_ATTRIB_MASK 0xfff00000UL +#define XDDR_XMPU2_CFG_POISON_ATTRIB_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_POISON_BASE_SHIFT 0UL +#define XDDR_XMPU2_CFG_POISON_BASE_WIDTH 20UL +#define XDDR_XMPU2_CFG_POISON_BASE_MASK 0x000fffffUL +#define XDDR_XMPU2_CFG_POISON_BASE_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgIsr + */ +#define XDDR_XMPU2_CFG_ISR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000010UL ) +#define XDDR_XMPU2_CFG_ISR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_ISR_INV_APB_SHIFT 0UL +#define XDDR_XMPU2_CFG_ISR_INV_APB_WIDTH 1UL +#define XDDR_XMPU2_CFG_ISR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_ISR_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgImr + */ +#define XDDR_XMPU2_CFG_IMR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000014UL ) +#define XDDR_XMPU2_CFG_IMR_RSTVAL 0x0000000fUL + +#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_IMR_INV_APB_SHIFT 0UL +#define XDDR_XMPU2_CFG_IMR_INV_APB_WIDTH 1UL +#define XDDR_XMPU2_CFG_IMR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_IMR_INV_APB_DEFVAL 0x1UL + +/** + * Register: XddrXmpu2CfgIen + */ +#define XDDR_XMPU2_CFG_IEN ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000018UL ) +#define XDDR_XMPU2_CFG_IEN_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_IEN_INV_APB_SHIFT 0UL +#define XDDR_XMPU2_CFG_IEN_INV_APB_WIDTH 1UL +#define XDDR_XMPU2_CFG_IEN_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_IEN_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgIds + */ +#define XDDR_XMPU2_CFG_IDS ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000001CUL ) +#define XDDR_XMPU2_CFG_IDS_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_IDS_INV_APB_SHIFT 0UL +#define XDDR_XMPU2_CFG_IDS_INV_APB_WIDTH 1UL +#define XDDR_XMPU2_CFG_IDS_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_IDS_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgLock + */ +#define XDDR_XMPU2_CFG_LOCK ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000020UL ) +#define XDDR_XMPU2_CFG_LOCK_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_SHIFT 0UL +#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_WIDTH 1UL +#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR00Strt + */ +#define XDDR_XMPU2_CFG_R00_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000100UL ) +#define XDDR_XMPU2_CFG_R00_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R00_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R00_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R00_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R00_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR00End + */ +#define XDDR_XMPU2_CFG_R00_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000104UL ) +#define XDDR_XMPU2_CFG_R00_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R00_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R00_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R00_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R00_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR00Mstr + */ +#define XDDR_XMPU2_CFG_R00_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000108UL ) +#define XDDR_XMPU2_CFG_R00_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R00_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R00_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R00_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R00_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R00_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R00_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R00_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R00_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR00 + */ +#define XDDR_XMPU2_CFG_R00 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000010CUL ) +#define XDDR_XMPU2_CFG_R00_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R00_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R00_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R00_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R00_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R00_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R00_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R00_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R00_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R00_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R00_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R00_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R00_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R00_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R00_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R00_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R00_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR01Strt + */ +#define XDDR_XMPU2_CFG_R01_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000110UL ) +#define XDDR_XMPU2_CFG_R01_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R01_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R01_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R01_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R01_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR01End + */ +#define XDDR_XMPU2_CFG_R01_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000114UL ) +#define XDDR_XMPU2_CFG_R01_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R01_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R01_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R01_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R01_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR01Mstr + */ +#define XDDR_XMPU2_CFG_R01_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000118UL ) +#define XDDR_XMPU2_CFG_R01_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R01_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R01_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R01_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R01_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R01_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R01_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R01_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R01_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR01 + */ +#define XDDR_XMPU2_CFG_R01 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000011CUL ) +#define XDDR_XMPU2_CFG_R01_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R01_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R01_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R01_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R01_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R01_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R01_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R01_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R01_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R01_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R01_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R01_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R01_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R01_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R01_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R01_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R01_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR02Strt + */ +#define XDDR_XMPU2_CFG_R02_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000120UL ) +#define XDDR_XMPU2_CFG_R02_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R02_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R02_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R02_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R02_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR02End + */ +#define XDDR_XMPU2_CFG_R02_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000124UL ) +#define XDDR_XMPU2_CFG_R02_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R02_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R02_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R02_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R02_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR02Mstr + */ +#define XDDR_XMPU2_CFG_R02_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000128UL ) +#define XDDR_XMPU2_CFG_R02_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R02_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R02_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R02_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R02_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R02_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R02_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R02_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R02_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR02 + */ +#define XDDR_XMPU2_CFG_R02 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000012CUL ) +#define XDDR_XMPU2_CFG_R02_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R02_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R02_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R02_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R02_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R02_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R02_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R02_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R02_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R02_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R02_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R02_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R02_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R02_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R02_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R02_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R02_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR03Strt + */ +#define XDDR_XMPU2_CFG_R03_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000130UL ) +#define XDDR_XMPU2_CFG_R03_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R03_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R03_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R03_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R03_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR03End + */ +#define XDDR_XMPU2_CFG_R03_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000134UL ) +#define XDDR_XMPU2_CFG_R03_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R03_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R03_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R03_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R03_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR03Mstr + */ +#define XDDR_XMPU2_CFG_R03_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000138UL ) +#define XDDR_XMPU2_CFG_R03_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R03_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R03_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R03_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R03_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R03_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R03_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R03_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R03_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR03 + */ +#define XDDR_XMPU2_CFG_R03 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000013CUL ) +#define XDDR_XMPU2_CFG_R03_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R03_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R03_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R03_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R03_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R03_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R03_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R03_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R03_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R03_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R03_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R03_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R03_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R03_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R03_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R03_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R03_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR04Strt + */ +#define XDDR_XMPU2_CFG_R04_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000140UL ) +#define XDDR_XMPU2_CFG_R04_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R04_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R04_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R04_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R04_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR04End + */ +#define XDDR_XMPU2_CFG_R04_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000144UL ) +#define XDDR_XMPU2_CFG_R04_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R04_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R04_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R04_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R04_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR04Mstr + */ +#define XDDR_XMPU2_CFG_R04_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000148UL ) +#define XDDR_XMPU2_CFG_R04_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R04_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R04_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R04_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R04_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R04_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R04_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R04_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R04_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR04 + */ +#define XDDR_XMPU2_CFG_R04 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000014CUL ) +#define XDDR_XMPU2_CFG_R04_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R04_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R04_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R04_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R04_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R04_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R04_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R04_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R04_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R04_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R04_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R04_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R04_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R04_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R04_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R04_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R04_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR05Strt + */ +#define XDDR_XMPU2_CFG_R05_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000150UL ) +#define XDDR_XMPU2_CFG_R05_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R05_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R05_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R05_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R05_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR05End + */ +#define XDDR_XMPU2_CFG_R05_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000154UL ) +#define XDDR_XMPU2_CFG_R05_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R05_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R05_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R05_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R05_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR05Mstr + */ +#define XDDR_XMPU2_CFG_R05_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000158UL ) +#define XDDR_XMPU2_CFG_R05_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R05_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R05_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R05_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R05_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R05_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R05_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R05_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R05_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR05 + */ +#define XDDR_XMPU2_CFG_R05 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000015CUL ) +#define XDDR_XMPU2_CFG_R05_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R05_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R05_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R05_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R05_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R05_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R05_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R05_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R05_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R05_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R05_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R05_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R05_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R05_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R05_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R05_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R05_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR06Strt + */ +#define XDDR_XMPU2_CFG_R06_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000160UL ) +#define XDDR_XMPU2_CFG_R06_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R06_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R06_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R06_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R06_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR06End + */ +#define XDDR_XMPU2_CFG_R06_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000164UL ) +#define XDDR_XMPU2_CFG_R06_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R06_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R06_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R06_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R06_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR06Mstr + */ +#define XDDR_XMPU2_CFG_R06_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000168UL ) +#define XDDR_XMPU2_CFG_R06_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R06_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R06_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R06_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R06_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R06_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R06_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R06_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R06_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR06 + */ +#define XDDR_XMPU2_CFG_R06 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000016CUL ) +#define XDDR_XMPU2_CFG_R06_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R06_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R06_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R06_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R06_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R06_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R06_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R06_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R06_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R06_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R06_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R06_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R06_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R06_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R06_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R06_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R06_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR07Strt + */ +#define XDDR_XMPU2_CFG_R07_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000170UL ) +#define XDDR_XMPU2_CFG_R07_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R07_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R07_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R07_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R07_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR07End + */ +#define XDDR_XMPU2_CFG_R07_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000174UL ) +#define XDDR_XMPU2_CFG_R07_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R07_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R07_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R07_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R07_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR07Mstr + */ +#define XDDR_XMPU2_CFG_R07_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000178UL ) +#define XDDR_XMPU2_CFG_R07_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R07_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R07_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R07_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R07_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R07_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R07_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R07_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R07_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR07 + */ +#define XDDR_XMPU2_CFG_R07 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000017CUL ) +#define XDDR_XMPU2_CFG_R07_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R07_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R07_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R07_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R07_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R07_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R07_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R07_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R07_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R07_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R07_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R07_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R07_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R07_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R07_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R07_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R07_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR08Strt + */ +#define XDDR_XMPU2_CFG_R08_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000180UL ) +#define XDDR_XMPU2_CFG_R08_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R08_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R08_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R08_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R08_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR08End + */ +#define XDDR_XMPU2_CFG_R08_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000184UL ) +#define XDDR_XMPU2_CFG_R08_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R08_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R08_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R08_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R08_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR08Mstr + */ +#define XDDR_XMPU2_CFG_R08_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000188UL ) +#define XDDR_XMPU2_CFG_R08_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R08_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R08_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R08_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R08_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R08_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R08_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R08_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R08_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR08 + */ +#define XDDR_XMPU2_CFG_R08 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000018CUL ) +#define XDDR_XMPU2_CFG_R08_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R08_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R08_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R08_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R08_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R08_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R08_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R08_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R08_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R08_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R08_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R08_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R08_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R08_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R08_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R08_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R08_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR09Strt + */ +#define XDDR_XMPU2_CFG_R09_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000190UL ) +#define XDDR_XMPU2_CFG_R09_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R09_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R09_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R09_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R09_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR09End + */ +#define XDDR_XMPU2_CFG_R09_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000194UL ) +#define XDDR_XMPU2_CFG_R09_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R09_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R09_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R09_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R09_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR09Mstr + */ +#define XDDR_XMPU2_CFG_R09_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000198UL ) +#define XDDR_XMPU2_CFG_R09_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R09_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R09_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R09_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R09_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R09_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R09_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R09_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R09_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR09 + */ +#define XDDR_XMPU2_CFG_R09 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000019CUL ) +#define XDDR_XMPU2_CFG_R09_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R09_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R09_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R09_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R09_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R09_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R09_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R09_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R09_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R09_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R09_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R09_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R09_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R09_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R09_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R09_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R09_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR10Strt + */ +#define XDDR_XMPU2_CFG_R10_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A0UL ) +#define XDDR_XMPU2_CFG_R10_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R10_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R10_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R10_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R10_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR10End + */ +#define XDDR_XMPU2_CFG_R10_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A4UL ) +#define XDDR_XMPU2_CFG_R10_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R10_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R10_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R10_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R10_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR10Mstr + */ +#define XDDR_XMPU2_CFG_R10_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A8UL ) +#define XDDR_XMPU2_CFG_R10_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R10_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R10_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R10_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R10_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R10_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R10_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R10_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R10_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR10 + */ +#define XDDR_XMPU2_CFG_R10 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001ACUL ) +#define XDDR_XMPU2_CFG_R10_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R10_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R10_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R10_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R10_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R10_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R10_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R10_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R10_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R10_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R10_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R10_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R10_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R10_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R10_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R10_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R10_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR11Strt + */ +#define XDDR_XMPU2_CFG_R11_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B0UL ) +#define XDDR_XMPU2_CFG_R11_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R11_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R11_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R11_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R11_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR11End + */ +#define XDDR_XMPU2_CFG_R11_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B4UL ) +#define XDDR_XMPU2_CFG_R11_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R11_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R11_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R11_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R11_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR11Mstr + */ +#define XDDR_XMPU2_CFG_R11_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B8UL ) +#define XDDR_XMPU2_CFG_R11_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R11_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R11_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R11_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R11_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R11_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R11_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R11_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R11_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR11 + */ +#define XDDR_XMPU2_CFG_R11 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001BCUL ) +#define XDDR_XMPU2_CFG_R11_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R11_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R11_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R11_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R11_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R11_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R11_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R11_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R11_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R11_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R11_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R11_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R11_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R11_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R11_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R11_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R11_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR12Strt + */ +#define XDDR_XMPU2_CFG_R12_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C0UL ) +#define XDDR_XMPU2_CFG_R12_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R12_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R12_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R12_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R12_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR12End + */ +#define XDDR_XMPU2_CFG_R12_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C4UL ) +#define XDDR_XMPU2_CFG_R12_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R12_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R12_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R12_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R12_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR12Mstr + */ +#define XDDR_XMPU2_CFG_R12_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C8UL ) +#define XDDR_XMPU2_CFG_R12_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R12_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R12_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R12_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R12_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R12_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R12_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R12_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R12_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR12 + */ +#define XDDR_XMPU2_CFG_R12 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001CCUL ) +#define XDDR_XMPU2_CFG_R12_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R12_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R12_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R12_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R12_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R12_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R12_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R12_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R12_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R12_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R12_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R12_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R12_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R12_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R12_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R12_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R12_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR13Strt + */ +#define XDDR_XMPU2_CFG_R13_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D0UL ) +#define XDDR_XMPU2_CFG_R13_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R13_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R13_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R13_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R13_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR13End + */ +#define XDDR_XMPU2_CFG_R13_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D4UL ) +#define XDDR_XMPU2_CFG_R13_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R13_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R13_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R13_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R13_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR13Mstr + */ +#define XDDR_XMPU2_CFG_R13_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D8UL ) +#define XDDR_XMPU2_CFG_R13_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R13_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R13_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R13_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R13_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R13_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R13_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R13_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R13_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR13 + */ +#define XDDR_XMPU2_CFG_R13 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001DCUL ) +#define XDDR_XMPU2_CFG_R13_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R13_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R13_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R13_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R13_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R13_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R13_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R13_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R13_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R13_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R13_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R13_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R13_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R13_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R13_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R13_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R13_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR14Strt + */ +#define XDDR_XMPU2_CFG_R14_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E0UL ) +#define XDDR_XMPU2_CFG_R14_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R14_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R14_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R14_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R14_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR14End + */ +#define XDDR_XMPU2_CFG_R14_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E4UL ) +#define XDDR_XMPU2_CFG_R14_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R14_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R14_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R14_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R14_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR14Mstr + */ +#define XDDR_XMPU2_CFG_R14_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E8UL ) +#define XDDR_XMPU2_CFG_R14_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R14_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R14_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R14_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R14_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R14_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R14_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R14_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R14_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR14 + */ +#define XDDR_XMPU2_CFG_R14 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001ECUL ) +#define XDDR_XMPU2_CFG_R14_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R14_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R14_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R14_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R14_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R14_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R14_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R14_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R14_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R14_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R14_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R14_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R14_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R14_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R14_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R14_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R14_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR15Strt + */ +#define XDDR_XMPU2_CFG_R15_STRT ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F0UL ) +#define XDDR_XMPU2_CFG_R15_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R15_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R15_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R15_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R15_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR15End + */ +#define XDDR_XMPU2_CFG_R15_END ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F4UL ) +#define XDDR_XMPU2_CFG_R15_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R15_END_ADDR_SHIFT 0UL +#define XDDR_XMPU2_CFG_R15_END_ADDR_WIDTH 28UL +#define XDDR_XMPU2_CFG_R15_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU2_CFG_R15_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR15Mstr + */ +#define XDDR_XMPU2_CFG_R15_MSTR ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F8UL ) +#define XDDR_XMPU2_CFG_R15_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU2_CFG_R15_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU2_CFG_R15_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU2_CFG_R15_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU2_CFG_R15_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R15_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU2_CFG_R15_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU2_CFG_R15_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU2_CFG_R15_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu2CfgR15 + */ +#define XDDR_XMPU2_CFG_R15 ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001FCUL ) +#define XDDR_XMPU2_CFG_R15_RSTVAL 0x00000008UL + +#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R15_REGNNS_SHIFT 3UL +#define XDDR_XMPU2_CFG_R15_REGNNS_WIDTH 1UL +#define XDDR_XMPU2_CFG_R15_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU2_CFG_R15_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU2_CFG_R15_WRALWD_SHIFT 2UL +#define XDDR_XMPU2_CFG_R15_WRALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R15_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU2_CFG_R15_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R15_RDALWD_SHIFT 1UL +#define XDDR_XMPU2_CFG_R15_RDALWD_WIDTH 1UL +#define XDDR_XMPU2_CFG_R15_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU2_CFG_R15_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU2_CFG_R15_EN_SHIFT 0UL +#define XDDR_XMPU2_CFG_R15_EN_WIDTH 1UL +#define XDDR_XMPU2_CFG_R15_EN_MASK 0x00000001UL +#define XDDR_XMPU2_CFG_R15_EN_DEFVAL 0x0UL + + +#ifdef __cplusplus +} +#endif + +#endif /* __XDDR_XMPU2_CFG_H__ */ diff --git a/src/Xilinx/include/xddr_xmpu3_cfg.h b/src/Xilinx/include/xddr_xmpu3_cfg.h new file mode 100644 index 0000000..4163149 --- /dev/null +++ b/src/Xilinx/include/xddr_xmpu3_cfg.h @@ -0,0 +1,1304 @@ +/* ### HEADER ### */ + +#ifndef __XDDR_XMPU3_CFG_H__ +#define __XDDR_XMPU3_CFG_H__ + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * XddrXmpu3Cfg Base Address + */ +#define XDDR_XMPU3_CFG_BASEADDR 0xFD030000UL + +/** + * Register: XddrXmpu3CfgCtrl + */ +#define XDDR_XMPU3_CFG_CTRL ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000000UL ) +#define XDDR_XMPU3_CFG_CTRL_RSTVAL 0x00000003UL + +#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_SHIFT 3UL +#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_WIDTH 1UL +#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_CTRL_POISONCFG_SHIFT 2UL +#define XDDR_XMPU3_CFG_CTRL_POISONCFG_WIDTH 1UL +#define XDDR_XMPU3_CFG_CTRL_POISONCFG_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_CTRL_POISONCFG_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_SHIFT 0UL +#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_DEFVAL 0x1UL + +/** + * Register: XddrXmpu3CfgErrSts1 + */ +#define XDDR_XMPU3_CFG_ERR_STS1 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000004UL ) +#define XDDR_XMPU3_CFG_ERR_STS1_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_WIDTH 32UL +#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_MASK 0xffffffffUL +#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgErrSts2 + */ +#define XDDR_XMPU3_CFG_ERR_STS2 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000008UL ) +#define XDDR_XMPU3_CFG_ERR_STS2_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgPoison + */ +#define XDDR_XMPU3_CFG_POISON ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000000CUL ) +#define XDDR_XMPU3_CFG_POISON_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_POISON_ATTRIB_SHIFT 20UL +#define XDDR_XMPU3_CFG_POISON_ATTRIB_WIDTH 12UL +#define XDDR_XMPU3_CFG_POISON_ATTRIB_MASK 0xfff00000UL +#define XDDR_XMPU3_CFG_POISON_ATTRIB_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_POISON_BASE_SHIFT 0UL +#define XDDR_XMPU3_CFG_POISON_BASE_WIDTH 20UL +#define XDDR_XMPU3_CFG_POISON_BASE_MASK 0x000fffffUL +#define XDDR_XMPU3_CFG_POISON_BASE_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgIsr + */ +#define XDDR_XMPU3_CFG_ISR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000010UL ) +#define XDDR_XMPU3_CFG_ISR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_ISR_INV_APB_SHIFT 0UL +#define XDDR_XMPU3_CFG_ISR_INV_APB_WIDTH 1UL +#define XDDR_XMPU3_CFG_ISR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_ISR_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgImr + */ +#define XDDR_XMPU3_CFG_IMR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000014UL ) +#define XDDR_XMPU3_CFG_IMR_RSTVAL 0x0000000fUL + +#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_IMR_INV_APB_SHIFT 0UL +#define XDDR_XMPU3_CFG_IMR_INV_APB_WIDTH 1UL +#define XDDR_XMPU3_CFG_IMR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_IMR_INV_APB_DEFVAL 0x1UL + +/** + * Register: XddrXmpu3CfgIen + */ +#define XDDR_XMPU3_CFG_IEN ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000018UL ) +#define XDDR_XMPU3_CFG_IEN_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_IEN_INV_APB_SHIFT 0UL +#define XDDR_XMPU3_CFG_IEN_INV_APB_WIDTH 1UL +#define XDDR_XMPU3_CFG_IEN_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_IEN_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgIds + */ +#define XDDR_XMPU3_CFG_IDS ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000001CUL ) +#define XDDR_XMPU3_CFG_IDS_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_IDS_INV_APB_SHIFT 0UL +#define XDDR_XMPU3_CFG_IDS_INV_APB_WIDTH 1UL +#define XDDR_XMPU3_CFG_IDS_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_IDS_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgLock + */ +#define XDDR_XMPU3_CFG_LOCK ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000020UL ) +#define XDDR_XMPU3_CFG_LOCK_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_SHIFT 0UL +#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_WIDTH 1UL +#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR00Strt + */ +#define XDDR_XMPU3_CFG_R00_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000100UL ) +#define XDDR_XMPU3_CFG_R00_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R00_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R00_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R00_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R00_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR00End + */ +#define XDDR_XMPU3_CFG_R00_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000104UL ) +#define XDDR_XMPU3_CFG_R00_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R00_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R00_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R00_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R00_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR00Mstr + */ +#define XDDR_XMPU3_CFG_R00_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000108UL ) +#define XDDR_XMPU3_CFG_R00_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R00_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R00_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R00_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R00_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R00_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R00_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R00_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R00_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR00 + */ +#define XDDR_XMPU3_CFG_R00 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000010CUL ) +#define XDDR_XMPU3_CFG_R00_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R00_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R00_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R00_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R00_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R00_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R00_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R00_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R00_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R00_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R00_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R00_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R00_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R00_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R00_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R00_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R00_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR01Strt + */ +#define XDDR_XMPU3_CFG_R01_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000110UL ) +#define XDDR_XMPU3_CFG_R01_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R01_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R01_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R01_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R01_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR01End + */ +#define XDDR_XMPU3_CFG_R01_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000114UL ) +#define XDDR_XMPU3_CFG_R01_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R01_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R01_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R01_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R01_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR01Mstr + */ +#define XDDR_XMPU3_CFG_R01_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000118UL ) +#define XDDR_XMPU3_CFG_R01_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R01_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R01_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R01_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R01_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R01_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R01_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R01_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R01_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR01 + */ +#define XDDR_XMPU3_CFG_R01 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000011CUL ) +#define XDDR_XMPU3_CFG_R01_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R01_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R01_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R01_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R01_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R01_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R01_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R01_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R01_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R01_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R01_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R01_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R01_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R01_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R01_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R01_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R01_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR02Strt + */ +#define XDDR_XMPU3_CFG_R02_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000120UL ) +#define XDDR_XMPU3_CFG_R02_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R02_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R02_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R02_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R02_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR02End + */ +#define XDDR_XMPU3_CFG_R02_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000124UL ) +#define XDDR_XMPU3_CFG_R02_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R02_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R02_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R02_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R02_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR02Mstr + */ +#define XDDR_XMPU3_CFG_R02_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000128UL ) +#define XDDR_XMPU3_CFG_R02_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R02_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R02_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R02_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R02_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R02_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R02_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R02_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R02_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR02 + */ +#define XDDR_XMPU3_CFG_R02 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000012CUL ) +#define XDDR_XMPU3_CFG_R02_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R02_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R02_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R02_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R02_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R02_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R02_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R02_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R02_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R02_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R02_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R02_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R02_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R02_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R02_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R02_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R02_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR03Strt + */ +#define XDDR_XMPU3_CFG_R03_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000130UL ) +#define XDDR_XMPU3_CFG_R03_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R03_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R03_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R03_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R03_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR03End + */ +#define XDDR_XMPU3_CFG_R03_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000134UL ) +#define XDDR_XMPU3_CFG_R03_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R03_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R03_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R03_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R03_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR03Mstr + */ +#define XDDR_XMPU3_CFG_R03_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000138UL ) +#define XDDR_XMPU3_CFG_R03_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R03_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R03_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R03_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R03_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R03_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R03_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R03_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R03_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR03 + */ +#define XDDR_XMPU3_CFG_R03 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000013CUL ) +#define XDDR_XMPU3_CFG_R03_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R03_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R03_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R03_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R03_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R03_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R03_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R03_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R03_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R03_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R03_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R03_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R03_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R03_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R03_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R03_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R03_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR04Strt + */ +#define XDDR_XMPU3_CFG_R04_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000140UL ) +#define XDDR_XMPU3_CFG_R04_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R04_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R04_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R04_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R04_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR04End + */ +#define XDDR_XMPU3_CFG_R04_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000144UL ) +#define XDDR_XMPU3_CFG_R04_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R04_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R04_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R04_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R04_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR04Mstr + */ +#define XDDR_XMPU3_CFG_R04_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000148UL ) +#define XDDR_XMPU3_CFG_R04_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R04_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R04_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R04_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R04_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R04_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R04_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R04_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R04_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR04 + */ +#define XDDR_XMPU3_CFG_R04 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000014CUL ) +#define XDDR_XMPU3_CFG_R04_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R04_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R04_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R04_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R04_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R04_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R04_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R04_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R04_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R04_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R04_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R04_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R04_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R04_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R04_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R04_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R04_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR05Strt + */ +#define XDDR_XMPU3_CFG_R05_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000150UL ) +#define XDDR_XMPU3_CFG_R05_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R05_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R05_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R05_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R05_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR05End + */ +#define XDDR_XMPU3_CFG_R05_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000154UL ) +#define XDDR_XMPU3_CFG_R05_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R05_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R05_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R05_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R05_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR05Mstr + */ +#define XDDR_XMPU3_CFG_R05_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000158UL ) +#define XDDR_XMPU3_CFG_R05_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R05_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R05_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R05_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R05_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R05_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R05_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R05_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R05_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR05 + */ +#define XDDR_XMPU3_CFG_R05 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000015CUL ) +#define XDDR_XMPU3_CFG_R05_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R05_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R05_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R05_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R05_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R05_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R05_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R05_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R05_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R05_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R05_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R05_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R05_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R05_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R05_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R05_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R05_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR06Strt + */ +#define XDDR_XMPU3_CFG_R06_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000160UL ) +#define XDDR_XMPU3_CFG_R06_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R06_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R06_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R06_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R06_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR06End + */ +#define XDDR_XMPU3_CFG_R06_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000164UL ) +#define XDDR_XMPU3_CFG_R06_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R06_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R06_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R06_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R06_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR06Mstr + */ +#define XDDR_XMPU3_CFG_R06_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000168UL ) +#define XDDR_XMPU3_CFG_R06_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R06_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R06_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R06_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R06_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R06_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R06_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R06_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R06_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR06 + */ +#define XDDR_XMPU3_CFG_R06 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000016CUL ) +#define XDDR_XMPU3_CFG_R06_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R06_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R06_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R06_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R06_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R06_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R06_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R06_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R06_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R06_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R06_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R06_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R06_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R06_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R06_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R06_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R06_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR07Strt + */ +#define XDDR_XMPU3_CFG_R07_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000170UL ) +#define XDDR_XMPU3_CFG_R07_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R07_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R07_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R07_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R07_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR07End + */ +#define XDDR_XMPU3_CFG_R07_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000174UL ) +#define XDDR_XMPU3_CFG_R07_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R07_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R07_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R07_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R07_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR07Mstr + */ +#define XDDR_XMPU3_CFG_R07_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000178UL ) +#define XDDR_XMPU3_CFG_R07_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R07_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R07_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R07_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R07_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R07_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R07_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R07_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R07_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR07 + */ +#define XDDR_XMPU3_CFG_R07 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000017CUL ) +#define XDDR_XMPU3_CFG_R07_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R07_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R07_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R07_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R07_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R07_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R07_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R07_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R07_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R07_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R07_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R07_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R07_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R07_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R07_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R07_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R07_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR08Strt + */ +#define XDDR_XMPU3_CFG_R08_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000180UL ) +#define XDDR_XMPU3_CFG_R08_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R08_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R08_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R08_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R08_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR08End + */ +#define XDDR_XMPU3_CFG_R08_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000184UL ) +#define XDDR_XMPU3_CFG_R08_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R08_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R08_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R08_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R08_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR08Mstr + */ +#define XDDR_XMPU3_CFG_R08_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000188UL ) +#define XDDR_XMPU3_CFG_R08_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R08_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R08_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R08_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R08_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R08_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R08_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R08_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R08_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR08 + */ +#define XDDR_XMPU3_CFG_R08 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000018CUL ) +#define XDDR_XMPU3_CFG_R08_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R08_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R08_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R08_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R08_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R08_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R08_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R08_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R08_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R08_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R08_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R08_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R08_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R08_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R08_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R08_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R08_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR09Strt + */ +#define XDDR_XMPU3_CFG_R09_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000190UL ) +#define XDDR_XMPU3_CFG_R09_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R09_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R09_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R09_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R09_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR09End + */ +#define XDDR_XMPU3_CFG_R09_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000194UL ) +#define XDDR_XMPU3_CFG_R09_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R09_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R09_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R09_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R09_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR09Mstr + */ +#define XDDR_XMPU3_CFG_R09_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000198UL ) +#define XDDR_XMPU3_CFG_R09_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R09_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R09_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R09_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R09_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R09_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R09_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R09_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R09_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR09 + */ +#define XDDR_XMPU3_CFG_R09 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000019CUL ) +#define XDDR_XMPU3_CFG_R09_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R09_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R09_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R09_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R09_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R09_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R09_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R09_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R09_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R09_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R09_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R09_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R09_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R09_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R09_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R09_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R09_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR10Strt + */ +#define XDDR_XMPU3_CFG_R10_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A0UL ) +#define XDDR_XMPU3_CFG_R10_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R10_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R10_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R10_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R10_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR10End + */ +#define XDDR_XMPU3_CFG_R10_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A4UL ) +#define XDDR_XMPU3_CFG_R10_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R10_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R10_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R10_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R10_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR10Mstr + */ +#define XDDR_XMPU3_CFG_R10_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A8UL ) +#define XDDR_XMPU3_CFG_R10_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R10_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R10_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R10_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R10_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R10_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R10_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R10_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R10_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR10 + */ +#define XDDR_XMPU3_CFG_R10 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001ACUL ) +#define XDDR_XMPU3_CFG_R10_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R10_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R10_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R10_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R10_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R10_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R10_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R10_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R10_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R10_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R10_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R10_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R10_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R10_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R10_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R10_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R10_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR11Strt + */ +#define XDDR_XMPU3_CFG_R11_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B0UL ) +#define XDDR_XMPU3_CFG_R11_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R11_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R11_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R11_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R11_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR11End + */ +#define XDDR_XMPU3_CFG_R11_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B4UL ) +#define XDDR_XMPU3_CFG_R11_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R11_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R11_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R11_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R11_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR11Mstr + */ +#define XDDR_XMPU3_CFG_R11_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B8UL ) +#define XDDR_XMPU3_CFG_R11_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R11_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R11_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R11_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R11_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R11_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R11_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R11_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R11_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR11 + */ +#define XDDR_XMPU3_CFG_R11 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001BCUL ) +#define XDDR_XMPU3_CFG_R11_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R11_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R11_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R11_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R11_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R11_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R11_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R11_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R11_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R11_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R11_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R11_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R11_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R11_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R11_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R11_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R11_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR12Strt + */ +#define XDDR_XMPU3_CFG_R12_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C0UL ) +#define XDDR_XMPU3_CFG_R12_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R12_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R12_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R12_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R12_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR12End + */ +#define XDDR_XMPU3_CFG_R12_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C4UL ) +#define XDDR_XMPU3_CFG_R12_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R12_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R12_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R12_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R12_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR12Mstr + */ +#define XDDR_XMPU3_CFG_R12_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C8UL ) +#define XDDR_XMPU3_CFG_R12_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R12_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R12_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R12_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R12_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R12_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R12_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R12_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R12_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR12 + */ +#define XDDR_XMPU3_CFG_R12 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001CCUL ) +#define XDDR_XMPU3_CFG_R12_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R12_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R12_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R12_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R12_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R12_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R12_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R12_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R12_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R12_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R12_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R12_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R12_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R12_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R12_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R12_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R12_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR13Strt + */ +#define XDDR_XMPU3_CFG_R13_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D0UL ) +#define XDDR_XMPU3_CFG_R13_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R13_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R13_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R13_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R13_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR13End + */ +#define XDDR_XMPU3_CFG_R13_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D4UL ) +#define XDDR_XMPU3_CFG_R13_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R13_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R13_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R13_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R13_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR13Mstr + */ +#define XDDR_XMPU3_CFG_R13_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D8UL ) +#define XDDR_XMPU3_CFG_R13_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R13_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R13_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R13_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R13_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R13_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R13_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R13_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R13_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR13 + */ +#define XDDR_XMPU3_CFG_R13 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001DCUL ) +#define XDDR_XMPU3_CFG_R13_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R13_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R13_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R13_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R13_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R13_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R13_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R13_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R13_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R13_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R13_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R13_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R13_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R13_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R13_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R13_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R13_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR14Strt + */ +#define XDDR_XMPU3_CFG_R14_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E0UL ) +#define XDDR_XMPU3_CFG_R14_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R14_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R14_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R14_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R14_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR14End + */ +#define XDDR_XMPU3_CFG_R14_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E4UL ) +#define XDDR_XMPU3_CFG_R14_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R14_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R14_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R14_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R14_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR14Mstr + */ +#define XDDR_XMPU3_CFG_R14_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E8UL ) +#define XDDR_XMPU3_CFG_R14_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R14_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R14_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R14_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R14_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R14_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R14_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R14_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R14_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR14 + */ +#define XDDR_XMPU3_CFG_R14 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001ECUL ) +#define XDDR_XMPU3_CFG_R14_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R14_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R14_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R14_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R14_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R14_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R14_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R14_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R14_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R14_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R14_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R14_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R14_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R14_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R14_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R14_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R14_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR15Strt + */ +#define XDDR_XMPU3_CFG_R15_STRT ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F0UL ) +#define XDDR_XMPU3_CFG_R15_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R15_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R15_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R15_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R15_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR15End + */ +#define XDDR_XMPU3_CFG_R15_END ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F4UL ) +#define XDDR_XMPU3_CFG_R15_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R15_END_ADDR_SHIFT 0UL +#define XDDR_XMPU3_CFG_R15_END_ADDR_WIDTH 28UL +#define XDDR_XMPU3_CFG_R15_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU3_CFG_R15_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR15Mstr + */ +#define XDDR_XMPU3_CFG_R15_MSTR ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F8UL ) +#define XDDR_XMPU3_CFG_R15_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU3_CFG_R15_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU3_CFG_R15_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU3_CFG_R15_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU3_CFG_R15_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R15_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU3_CFG_R15_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU3_CFG_R15_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU3_CFG_R15_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu3CfgR15 + */ +#define XDDR_XMPU3_CFG_R15 ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001FCUL ) +#define XDDR_XMPU3_CFG_R15_RSTVAL 0x00000008UL + +#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R15_REGNNS_SHIFT 3UL +#define XDDR_XMPU3_CFG_R15_REGNNS_WIDTH 1UL +#define XDDR_XMPU3_CFG_R15_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU3_CFG_R15_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU3_CFG_R15_WRALWD_SHIFT 2UL +#define XDDR_XMPU3_CFG_R15_WRALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R15_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU3_CFG_R15_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R15_RDALWD_SHIFT 1UL +#define XDDR_XMPU3_CFG_R15_RDALWD_WIDTH 1UL +#define XDDR_XMPU3_CFG_R15_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU3_CFG_R15_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU3_CFG_R15_EN_SHIFT 0UL +#define XDDR_XMPU3_CFG_R15_EN_WIDTH 1UL +#define XDDR_XMPU3_CFG_R15_EN_MASK 0x00000001UL +#define XDDR_XMPU3_CFG_R15_EN_DEFVAL 0x0UL + + +#ifdef __cplusplus +} +#endif + +#endif /* __XDDR_XMPU3_CFG_H__ */ diff --git a/src/Xilinx/include/xddr_xmpu4_cfg.h b/src/Xilinx/include/xddr_xmpu4_cfg.h new file mode 100644 index 0000000..2df8144 --- /dev/null +++ b/src/Xilinx/include/xddr_xmpu4_cfg.h @@ -0,0 +1,1304 @@ +/* ### HEADER ### */ + +#ifndef __XDDR_XMPU4_CFG_H__ +#define __XDDR_XMPU4_CFG_H__ + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * XddrXmpu4Cfg Base Address + */ +#define XDDR_XMPU4_CFG_BASEADDR 0xFD040000UL + +/** + * Register: XddrXmpu4CfgCtrl + */ +#define XDDR_XMPU4_CFG_CTRL ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000000UL ) +#define XDDR_XMPU4_CFG_CTRL_RSTVAL 0x00000003UL + +#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_SHIFT 3UL +#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_WIDTH 1UL +#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_CTRL_POISONCFG_SHIFT 2UL +#define XDDR_XMPU4_CFG_CTRL_POISONCFG_WIDTH 1UL +#define XDDR_XMPU4_CFG_CTRL_POISONCFG_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_CTRL_POISONCFG_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_SHIFT 0UL +#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_DEFVAL 0x1UL + +/** + * Register: XddrXmpu4CfgErrSts1 + */ +#define XDDR_XMPU4_CFG_ERR_STS1 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000004UL ) +#define XDDR_XMPU4_CFG_ERR_STS1_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_WIDTH 32UL +#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_MASK 0xffffffffUL +#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgErrSts2 + */ +#define XDDR_XMPU4_CFG_ERR_STS2 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000008UL ) +#define XDDR_XMPU4_CFG_ERR_STS2_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgPoison + */ +#define XDDR_XMPU4_CFG_POISON ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000000CUL ) +#define XDDR_XMPU4_CFG_POISON_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_POISON_ATTRIB_SHIFT 20UL +#define XDDR_XMPU4_CFG_POISON_ATTRIB_WIDTH 12UL +#define XDDR_XMPU4_CFG_POISON_ATTRIB_MASK 0xfff00000UL +#define XDDR_XMPU4_CFG_POISON_ATTRIB_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_POISON_BASE_SHIFT 0UL +#define XDDR_XMPU4_CFG_POISON_BASE_WIDTH 20UL +#define XDDR_XMPU4_CFG_POISON_BASE_MASK 0x000fffffUL +#define XDDR_XMPU4_CFG_POISON_BASE_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgIsr + */ +#define XDDR_XMPU4_CFG_ISR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000010UL ) +#define XDDR_XMPU4_CFG_ISR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_ISR_INV_APB_SHIFT 0UL +#define XDDR_XMPU4_CFG_ISR_INV_APB_WIDTH 1UL +#define XDDR_XMPU4_CFG_ISR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_ISR_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgImr + */ +#define XDDR_XMPU4_CFG_IMR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000014UL ) +#define XDDR_XMPU4_CFG_IMR_RSTVAL 0x0000000fUL + +#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_IMR_INV_APB_SHIFT 0UL +#define XDDR_XMPU4_CFG_IMR_INV_APB_WIDTH 1UL +#define XDDR_XMPU4_CFG_IMR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_IMR_INV_APB_DEFVAL 0x1UL + +/** + * Register: XddrXmpu4CfgIen + */ +#define XDDR_XMPU4_CFG_IEN ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000018UL ) +#define XDDR_XMPU4_CFG_IEN_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_IEN_INV_APB_SHIFT 0UL +#define XDDR_XMPU4_CFG_IEN_INV_APB_WIDTH 1UL +#define XDDR_XMPU4_CFG_IEN_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_IEN_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgIds + */ +#define XDDR_XMPU4_CFG_IDS ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000001CUL ) +#define XDDR_XMPU4_CFG_IDS_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_IDS_INV_APB_SHIFT 0UL +#define XDDR_XMPU4_CFG_IDS_INV_APB_WIDTH 1UL +#define XDDR_XMPU4_CFG_IDS_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_IDS_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgLock + */ +#define XDDR_XMPU4_CFG_LOCK ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000020UL ) +#define XDDR_XMPU4_CFG_LOCK_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_SHIFT 0UL +#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_WIDTH 1UL +#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR00Strt + */ +#define XDDR_XMPU4_CFG_R00_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000100UL ) +#define XDDR_XMPU4_CFG_R00_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R00_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R00_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R00_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R00_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR00End + */ +#define XDDR_XMPU4_CFG_R00_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000104UL ) +#define XDDR_XMPU4_CFG_R00_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R00_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R00_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R00_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R00_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR00Mstr + */ +#define XDDR_XMPU4_CFG_R00_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000108UL ) +#define XDDR_XMPU4_CFG_R00_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R00_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R00_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R00_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R00_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R00_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R00_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R00_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R00_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR00 + */ +#define XDDR_XMPU4_CFG_R00 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000010CUL ) +#define XDDR_XMPU4_CFG_R00_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R00_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R00_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R00_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R00_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R00_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R00_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R00_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R00_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R00_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R00_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R00_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R00_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R00_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R00_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R00_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R00_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR01Strt + */ +#define XDDR_XMPU4_CFG_R01_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000110UL ) +#define XDDR_XMPU4_CFG_R01_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R01_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R01_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R01_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R01_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR01End + */ +#define XDDR_XMPU4_CFG_R01_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000114UL ) +#define XDDR_XMPU4_CFG_R01_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R01_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R01_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R01_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R01_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR01Mstr + */ +#define XDDR_XMPU4_CFG_R01_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000118UL ) +#define XDDR_XMPU4_CFG_R01_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R01_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R01_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R01_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R01_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R01_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R01_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R01_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R01_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR01 + */ +#define XDDR_XMPU4_CFG_R01 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000011CUL ) +#define XDDR_XMPU4_CFG_R01_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R01_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R01_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R01_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R01_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R01_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R01_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R01_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R01_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R01_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R01_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R01_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R01_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R01_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R01_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R01_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R01_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR02Strt + */ +#define XDDR_XMPU4_CFG_R02_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000120UL ) +#define XDDR_XMPU4_CFG_R02_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R02_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R02_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R02_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R02_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR02End + */ +#define XDDR_XMPU4_CFG_R02_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000124UL ) +#define XDDR_XMPU4_CFG_R02_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R02_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R02_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R02_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R02_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR02Mstr + */ +#define XDDR_XMPU4_CFG_R02_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000128UL ) +#define XDDR_XMPU4_CFG_R02_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R02_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R02_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R02_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R02_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R02_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R02_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R02_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R02_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR02 + */ +#define XDDR_XMPU4_CFG_R02 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000012CUL ) +#define XDDR_XMPU4_CFG_R02_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R02_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R02_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R02_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R02_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R02_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R02_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R02_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R02_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R02_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R02_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R02_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R02_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R02_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R02_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R02_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R02_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR03Strt + */ +#define XDDR_XMPU4_CFG_R03_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000130UL ) +#define XDDR_XMPU4_CFG_R03_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R03_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R03_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R03_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R03_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR03End + */ +#define XDDR_XMPU4_CFG_R03_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000134UL ) +#define XDDR_XMPU4_CFG_R03_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R03_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R03_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R03_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R03_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR03Mstr + */ +#define XDDR_XMPU4_CFG_R03_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000138UL ) +#define XDDR_XMPU4_CFG_R03_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R03_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R03_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R03_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R03_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R03_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R03_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R03_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R03_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR03 + */ +#define XDDR_XMPU4_CFG_R03 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000013CUL ) +#define XDDR_XMPU4_CFG_R03_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R03_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R03_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R03_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R03_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R03_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R03_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R03_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R03_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R03_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R03_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R03_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R03_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R03_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R03_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R03_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R03_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR04Strt + */ +#define XDDR_XMPU4_CFG_R04_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000140UL ) +#define XDDR_XMPU4_CFG_R04_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R04_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R04_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R04_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R04_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR04End + */ +#define XDDR_XMPU4_CFG_R04_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000144UL ) +#define XDDR_XMPU4_CFG_R04_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R04_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R04_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R04_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R04_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR04Mstr + */ +#define XDDR_XMPU4_CFG_R04_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000148UL ) +#define XDDR_XMPU4_CFG_R04_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R04_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R04_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R04_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R04_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R04_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R04_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R04_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R04_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR04 + */ +#define XDDR_XMPU4_CFG_R04 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000014CUL ) +#define XDDR_XMPU4_CFG_R04_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R04_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R04_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R04_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R04_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R04_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R04_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R04_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R04_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R04_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R04_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R04_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R04_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R04_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R04_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R04_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R04_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR05Strt + */ +#define XDDR_XMPU4_CFG_R05_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000150UL ) +#define XDDR_XMPU4_CFG_R05_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R05_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R05_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R05_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R05_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR05End + */ +#define XDDR_XMPU4_CFG_R05_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000154UL ) +#define XDDR_XMPU4_CFG_R05_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R05_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R05_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R05_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R05_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR05Mstr + */ +#define XDDR_XMPU4_CFG_R05_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000158UL ) +#define XDDR_XMPU4_CFG_R05_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R05_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R05_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R05_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R05_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R05_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R05_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R05_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R05_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR05 + */ +#define XDDR_XMPU4_CFG_R05 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000015CUL ) +#define XDDR_XMPU4_CFG_R05_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R05_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R05_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R05_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R05_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R05_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R05_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R05_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R05_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R05_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R05_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R05_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R05_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R05_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R05_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R05_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R05_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR06Strt + */ +#define XDDR_XMPU4_CFG_R06_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000160UL ) +#define XDDR_XMPU4_CFG_R06_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R06_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R06_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R06_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R06_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR06End + */ +#define XDDR_XMPU4_CFG_R06_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000164UL ) +#define XDDR_XMPU4_CFG_R06_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R06_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R06_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R06_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R06_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR06Mstr + */ +#define XDDR_XMPU4_CFG_R06_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000168UL ) +#define XDDR_XMPU4_CFG_R06_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R06_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R06_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R06_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R06_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R06_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R06_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R06_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R06_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR06 + */ +#define XDDR_XMPU4_CFG_R06 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000016CUL ) +#define XDDR_XMPU4_CFG_R06_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R06_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R06_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R06_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R06_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R06_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R06_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R06_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R06_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R06_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R06_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R06_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R06_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R06_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R06_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R06_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R06_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR07Strt + */ +#define XDDR_XMPU4_CFG_R07_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000170UL ) +#define XDDR_XMPU4_CFG_R07_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R07_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R07_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R07_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R07_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR07End + */ +#define XDDR_XMPU4_CFG_R07_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000174UL ) +#define XDDR_XMPU4_CFG_R07_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R07_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R07_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R07_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R07_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR07Mstr + */ +#define XDDR_XMPU4_CFG_R07_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000178UL ) +#define XDDR_XMPU4_CFG_R07_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R07_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R07_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R07_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R07_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R07_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R07_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R07_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R07_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR07 + */ +#define XDDR_XMPU4_CFG_R07 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000017CUL ) +#define XDDR_XMPU4_CFG_R07_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R07_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R07_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R07_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R07_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R07_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R07_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R07_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R07_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R07_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R07_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R07_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R07_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R07_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R07_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R07_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R07_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR08Strt + */ +#define XDDR_XMPU4_CFG_R08_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000180UL ) +#define XDDR_XMPU4_CFG_R08_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R08_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R08_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R08_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R08_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR08End + */ +#define XDDR_XMPU4_CFG_R08_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000184UL ) +#define XDDR_XMPU4_CFG_R08_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R08_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R08_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R08_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R08_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR08Mstr + */ +#define XDDR_XMPU4_CFG_R08_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000188UL ) +#define XDDR_XMPU4_CFG_R08_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R08_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R08_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R08_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R08_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R08_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R08_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R08_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R08_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR08 + */ +#define XDDR_XMPU4_CFG_R08 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000018CUL ) +#define XDDR_XMPU4_CFG_R08_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R08_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R08_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R08_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R08_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R08_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R08_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R08_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R08_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R08_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R08_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R08_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R08_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R08_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R08_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R08_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R08_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR09Strt + */ +#define XDDR_XMPU4_CFG_R09_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000190UL ) +#define XDDR_XMPU4_CFG_R09_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R09_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R09_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R09_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R09_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR09End + */ +#define XDDR_XMPU4_CFG_R09_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000194UL ) +#define XDDR_XMPU4_CFG_R09_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R09_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R09_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R09_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R09_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR09Mstr + */ +#define XDDR_XMPU4_CFG_R09_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000198UL ) +#define XDDR_XMPU4_CFG_R09_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R09_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R09_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R09_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R09_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R09_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R09_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R09_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R09_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR09 + */ +#define XDDR_XMPU4_CFG_R09 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000019CUL ) +#define XDDR_XMPU4_CFG_R09_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R09_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R09_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R09_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R09_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R09_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R09_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R09_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R09_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R09_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R09_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R09_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R09_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R09_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R09_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R09_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R09_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR10Strt + */ +#define XDDR_XMPU4_CFG_R10_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A0UL ) +#define XDDR_XMPU4_CFG_R10_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R10_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R10_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R10_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R10_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR10End + */ +#define XDDR_XMPU4_CFG_R10_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A4UL ) +#define XDDR_XMPU4_CFG_R10_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R10_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R10_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R10_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R10_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR10Mstr + */ +#define XDDR_XMPU4_CFG_R10_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A8UL ) +#define XDDR_XMPU4_CFG_R10_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R10_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R10_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R10_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R10_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R10_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R10_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R10_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R10_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR10 + */ +#define XDDR_XMPU4_CFG_R10 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001ACUL ) +#define XDDR_XMPU4_CFG_R10_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R10_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R10_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R10_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R10_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R10_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R10_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R10_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R10_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R10_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R10_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R10_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R10_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R10_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R10_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R10_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R10_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR11Strt + */ +#define XDDR_XMPU4_CFG_R11_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B0UL ) +#define XDDR_XMPU4_CFG_R11_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R11_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R11_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R11_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R11_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR11End + */ +#define XDDR_XMPU4_CFG_R11_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B4UL ) +#define XDDR_XMPU4_CFG_R11_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R11_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R11_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R11_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R11_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR11Mstr + */ +#define XDDR_XMPU4_CFG_R11_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B8UL ) +#define XDDR_XMPU4_CFG_R11_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R11_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R11_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R11_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R11_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R11_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R11_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R11_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R11_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR11 + */ +#define XDDR_XMPU4_CFG_R11 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001BCUL ) +#define XDDR_XMPU4_CFG_R11_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R11_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R11_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R11_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R11_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R11_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R11_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R11_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R11_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R11_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R11_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R11_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R11_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R11_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R11_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R11_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R11_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR12Strt + */ +#define XDDR_XMPU4_CFG_R12_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C0UL ) +#define XDDR_XMPU4_CFG_R12_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R12_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R12_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R12_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R12_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR12End + */ +#define XDDR_XMPU4_CFG_R12_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C4UL ) +#define XDDR_XMPU4_CFG_R12_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R12_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R12_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R12_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R12_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR12Mstr + */ +#define XDDR_XMPU4_CFG_R12_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C8UL ) +#define XDDR_XMPU4_CFG_R12_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R12_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R12_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R12_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R12_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R12_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R12_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R12_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R12_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR12 + */ +#define XDDR_XMPU4_CFG_R12 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001CCUL ) +#define XDDR_XMPU4_CFG_R12_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R12_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R12_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R12_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R12_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R12_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R12_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R12_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R12_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R12_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R12_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R12_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R12_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R12_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R12_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R12_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R12_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR13Strt + */ +#define XDDR_XMPU4_CFG_R13_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D0UL ) +#define XDDR_XMPU4_CFG_R13_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R13_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R13_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R13_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R13_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR13End + */ +#define XDDR_XMPU4_CFG_R13_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D4UL ) +#define XDDR_XMPU4_CFG_R13_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R13_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R13_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R13_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R13_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR13Mstr + */ +#define XDDR_XMPU4_CFG_R13_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D8UL ) +#define XDDR_XMPU4_CFG_R13_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R13_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R13_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R13_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R13_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R13_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R13_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R13_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R13_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR13 + */ +#define XDDR_XMPU4_CFG_R13 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001DCUL ) +#define XDDR_XMPU4_CFG_R13_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R13_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R13_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R13_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R13_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R13_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R13_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R13_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R13_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R13_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R13_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R13_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R13_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R13_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R13_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R13_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R13_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR14Strt + */ +#define XDDR_XMPU4_CFG_R14_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E0UL ) +#define XDDR_XMPU4_CFG_R14_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R14_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R14_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R14_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R14_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR14End + */ +#define XDDR_XMPU4_CFG_R14_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E4UL ) +#define XDDR_XMPU4_CFG_R14_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R14_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R14_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R14_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R14_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR14Mstr + */ +#define XDDR_XMPU4_CFG_R14_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E8UL ) +#define XDDR_XMPU4_CFG_R14_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R14_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R14_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R14_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R14_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R14_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R14_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R14_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R14_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR14 + */ +#define XDDR_XMPU4_CFG_R14 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001ECUL ) +#define XDDR_XMPU4_CFG_R14_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R14_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R14_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R14_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R14_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R14_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R14_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R14_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R14_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R14_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R14_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R14_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R14_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R14_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R14_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R14_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R14_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR15Strt + */ +#define XDDR_XMPU4_CFG_R15_STRT ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F0UL ) +#define XDDR_XMPU4_CFG_R15_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R15_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R15_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R15_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R15_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR15End + */ +#define XDDR_XMPU4_CFG_R15_END ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F4UL ) +#define XDDR_XMPU4_CFG_R15_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R15_END_ADDR_SHIFT 0UL +#define XDDR_XMPU4_CFG_R15_END_ADDR_WIDTH 28UL +#define XDDR_XMPU4_CFG_R15_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU4_CFG_R15_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR15Mstr + */ +#define XDDR_XMPU4_CFG_R15_MSTR ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F8UL ) +#define XDDR_XMPU4_CFG_R15_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU4_CFG_R15_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU4_CFG_R15_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU4_CFG_R15_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU4_CFG_R15_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R15_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU4_CFG_R15_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU4_CFG_R15_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU4_CFG_R15_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu4CfgR15 + */ +#define XDDR_XMPU4_CFG_R15 ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001FCUL ) +#define XDDR_XMPU4_CFG_R15_RSTVAL 0x00000008UL + +#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R15_REGNNS_SHIFT 3UL +#define XDDR_XMPU4_CFG_R15_REGNNS_WIDTH 1UL +#define XDDR_XMPU4_CFG_R15_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU4_CFG_R15_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU4_CFG_R15_WRALWD_SHIFT 2UL +#define XDDR_XMPU4_CFG_R15_WRALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R15_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU4_CFG_R15_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R15_RDALWD_SHIFT 1UL +#define XDDR_XMPU4_CFG_R15_RDALWD_WIDTH 1UL +#define XDDR_XMPU4_CFG_R15_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU4_CFG_R15_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU4_CFG_R15_EN_SHIFT 0UL +#define XDDR_XMPU4_CFG_R15_EN_WIDTH 1UL +#define XDDR_XMPU4_CFG_R15_EN_MASK 0x00000001UL +#define XDDR_XMPU4_CFG_R15_EN_DEFVAL 0x0UL + + +#ifdef __cplusplus +} +#endif + +#endif /* __XDDR_XMPU4_CFG_H__ */ diff --git a/src/Xilinx/include/xddr_xmpu5_cfg.h b/src/Xilinx/include/xddr_xmpu5_cfg.h new file mode 100644 index 0000000..6081171 --- /dev/null +++ b/src/Xilinx/include/xddr_xmpu5_cfg.h @@ -0,0 +1,1304 @@ +/* ### HEADER ### */ + +#ifndef __XDDR_XMPU5_CFG_H__ +#define __XDDR_XMPU5_CFG_H__ + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * XddrXmpu5Cfg Base Address + */ +#define XDDR_XMPU5_CFG_BASEADDR 0xFD050000UL + +/** + * Register: XddrXmpu5CfgCtrl + */ +#define XDDR_XMPU5_CFG_CTRL ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000000UL ) +#define XDDR_XMPU5_CFG_CTRL_RSTVAL 0x00000003UL + +#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_SHIFT 3UL +#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_WIDTH 1UL +#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_CTRL_POISONCFG_SHIFT 2UL +#define XDDR_XMPU5_CFG_CTRL_POISONCFG_WIDTH 1UL +#define XDDR_XMPU5_CFG_CTRL_POISONCFG_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_CTRL_POISONCFG_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_SHIFT 0UL +#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_DEFVAL 0x1UL + +/** + * Register: XddrXmpu5CfgErrSts1 + */ +#define XDDR_XMPU5_CFG_ERR_STS1 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000004UL ) +#define XDDR_XMPU5_CFG_ERR_STS1_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_WIDTH 32UL +#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_MASK 0xffffffffUL +#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgErrSts2 + */ +#define XDDR_XMPU5_CFG_ERR_STS2 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000008UL ) +#define XDDR_XMPU5_CFG_ERR_STS2_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgPoison + */ +#define XDDR_XMPU5_CFG_POISON ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000000CUL ) +#define XDDR_XMPU5_CFG_POISON_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_POISON_ATTRIB_SHIFT 20UL +#define XDDR_XMPU5_CFG_POISON_ATTRIB_WIDTH 12UL +#define XDDR_XMPU5_CFG_POISON_ATTRIB_MASK 0xfff00000UL +#define XDDR_XMPU5_CFG_POISON_ATTRIB_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_POISON_BASE_SHIFT 0UL +#define XDDR_XMPU5_CFG_POISON_BASE_WIDTH 20UL +#define XDDR_XMPU5_CFG_POISON_BASE_MASK 0x000fffffUL +#define XDDR_XMPU5_CFG_POISON_BASE_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgIsr + */ +#define XDDR_XMPU5_CFG_ISR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000010UL ) +#define XDDR_XMPU5_CFG_ISR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_ISR_INV_APB_SHIFT 0UL +#define XDDR_XMPU5_CFG_ISR_INV_APB_WIDTH 1UL +#define XDDR_XMPU5_CFG_ISR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_ISR_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgImr + */ +#define XDDR_XMPU5_CFG_IMR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000014UL ) +#define XDDR_XMPU5_CFG_IMR_RSTVAL 0x0000000fUL + +#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_IMR_INV_APB_SHIFT 0UL +#define XDDR_XMPU5_CFG_IMR_INV_APB_WIDTH 1UL +#define XDDR_XMPU5_CFG_IMR_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_IMR_INV_APB_DEFVAL 0x1UL + +/** + * Register: XddrXmpu5CfgIen + */ +#define XDDR_XMPU5_CFG_IEN ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000018UL ) +#define XDDR_XMPU5_CFG_IEN_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_IEN_INV_APB_SHIFT 0UL +#define XDDR_XMPU5_CFG_IEN_INV_APB_WIDTH 1UL +#define XDDR_XMPU5_CFG_IEN_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_IEN_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgIds + */ +#define XDDR_XMPU5_CFG_IDS ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000001CUL ) +#define XDDR_XMPU5_CFG_IDS_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_SHIFT 3UL +#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_SHIFT 2UL +#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_SHIFT 1UL +#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_WIDTH 1UL +#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_IDS_INV_APB_SHIFT 0UL +#define XDDR_XMPU5_CFG_IDS_INV_APB_WIDTH 1UL +#define XDDR_XMPU5_CFG_IDS_INV_APB_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_IDS_INV_APB_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgLock + */ +#define XDDR_XMPU5_CFG_LOCK ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000020UL ) +#define XDDR_XMPU5_CFG_LOCK_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_SHIFT 0UL +#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_WIDTH 1UL +#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR00Strt + */ +#define XDDR_XMPU5_CFG_R00_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000100UL ) +#define XDDR_XMPU5_CFG_R00_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R00_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R00_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R00_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R00_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR00End + */ +#define XDDR_XMPU5_CFG_R00_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000104UL ) +#define XDDR_XMPU5_CFG_R00_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R00_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R00_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R00_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R00_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR00Mstr + */ +#define XDDR_XMPU5_CFG_R00_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000108UL ) +#define XDDR_XMPU5_CFG_R00_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R00_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R00_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R00_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R00_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R00_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R00_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R00_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R00_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR00 + */ +#define XDDR_XMPU5_CFG_R00 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000010CUL ) +#define XDDR_XMPU5_CFG_R00_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R00_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R00_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R00_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R00_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R00_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R00_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R00_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R00_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R00_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R00_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R00_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R00_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R00_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R00_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R00_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R00_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR01Strt + */ +#define XDDR_XMPU5_CFG_R01_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000110UL ) +#define XDDR_XMPU5_CFG_R01_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R01_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R01_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R01_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R01_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR01End + */ +#define XDDR_XMPU5_CFG_R01_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000114UL ) +#define XDDR_XMPU5_CFG_R01_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R01_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R01_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R01_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R01_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR01Mstr + */ +#define XDDR_XMPU5_CFG_R01_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000118UL ) +#define XDDR_XMPU5_CFG_R01_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R01_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R01_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R01_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R01_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R01_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R01_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R01_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R01_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR01 + */ +#define XDDR_XMPU5_CFG_R01 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000011CUL ) +#define XDDR_XMPU5_CFG_R01_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R01_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R01_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R01_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R01_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R01_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R01_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R01_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R01_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R01_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R01_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R01_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R01_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R01_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R01_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R01_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R01_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR02Strt + */ +#define XDDR_XMPU5_CFG_R02_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000120UL ) +#define XDDR_XMPU5_CFG_R02_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R02_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R02_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R02_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R02_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR02End + */ +#define XDDR_XMPU5_CFG_R02_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000124UL ) +#define XDDR_XMPU5_CFG_R02_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R02_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R02_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R02_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R02_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR02Mstr + */ +#define XDDR_XMPU5_CFG_R02_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000128UL ) +#define XDDR_XMPU5_CFG_R02_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R02_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R02_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R02_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R02_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R02_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R02_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R02_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R02_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR02 + */ +#define XDDR_XMPU5_CFG_R02 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000012CUL ) +#define XDDR_XMPU5_CFG_R02_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R02_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R02_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R02_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R02_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R02_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R02_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R02_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R02_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R02_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R02_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R02_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R02_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R02_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R02_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R02_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R02_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR03Strt + */ +#define XDDR_XMPU5_CFG_R03_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000130UL ) +#define XDDR_XMPU5_CFG_R03_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R03_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R03_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R03_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R03_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR03End + */ +#define XDDR_XMPU5_CFG_R03_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000134UL ) +#define XDDR_XMPU5_CFG_R03_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R03_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R03_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R03_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R03_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR03Mstr + */ +#define XDDR_XMPU5_CFG_R03_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000138UL ) +#define XDDR_XMPU5_CFG_R03_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R03_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R03_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R03_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R03_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R03_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R03_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R03_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R03_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR03 + */ +#define XDDR_XMPU5_CFG_R03 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000013CUL ) +#define XDDR_XMPU5_CFG_R03_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R03_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R03_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R03_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R03_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R03_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R03_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R03_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R03_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R03_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R03_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R03_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R03_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R03_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R03_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R03_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R03_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR04Strt + */ +#define XDDR_XMPU5_CFG_R04_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000140UL ) +#define XDDR_XMPU5_CFG_R04_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R04_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R04_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R04_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R04_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR04End + */ +#define XDDR_XMPU5_CFG_R04_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000144UL ) +#define XDDR_XMPU5_CFG_R04_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R04_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R04_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R04_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R04_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR04Mstr + */ +#define XDDR_XMPU5_CFG_R04_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000148UL ) +#define XDDR_XMPU5_CFG_R04_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R04_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R04_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R04_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R04_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R04_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R04_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R04_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R04_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR04 + */ +#define XDDR_XMPU5_CFG_R04 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000014CUL ) +#define XDDR_XMPU5_CFG_R04_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R04_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R04_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R04_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R04_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R04_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R04_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R04_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R04_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R04_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R04_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R04_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R04_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R04_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R04_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R04_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R04_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR05Strt + */ +#define XDDR_XMPU5_CFG_R05_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000150UL ) +#define XDDR_XMPU5_CFG_R05_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R05_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R05_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R05_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R05_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR05End + */ +#define XDDR_XMPU5_CFG_R05_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000154UL ) +#define XDDR_XMPU5_CFG_R05_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R05_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R05_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R05_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R05_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR05Mstr + */ +#define XDDR_XMPU5_CFG_R05_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000158UL ) +#define XDDR_XMPU5_CFG_R05_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R05_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R05_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R05_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R05_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R05_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R05_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R05_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R05_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR05 + */ +#define XDDR_XMPU5_CFG_R05 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000015CUL ) +#define XDDR_XMPU5_CFG_R05_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R05_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R05_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R05_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R05_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R05_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R05_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R05_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R05_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R05_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R05_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R05_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R05_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R05_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R05_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R05_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R05_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR06Strt + */ +#define XDDR_XMPU5_CFG_R06_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000160UL ) +#define XDDR_XMPU5_CFG_R06_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R06_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R06_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R06_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R06_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR06End + */ +#define XDDR_XMPU5_CFG_R06_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000164UL ) +#define XDDR_XMPU5_CFG_R06_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R06_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R06_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R06_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R06_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR06Mstr + */ +#define XDDR_XMPU5_CFG_R06_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000168UL ) +#define XDDR_XMPU5_CFG_R06_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R06_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R06_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R06_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R06_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R06_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R06_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R06_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R06_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR06 + */ +#define XDDR_XMPU5_CFG_R06 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000016CUL ) +#define XDDR_XMPU5_CFG_R06_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R06_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R06_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R06_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R06_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R06_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R06_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R06_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R06_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R06_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R06_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R06_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R06_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R06_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R06_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R06_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R06_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR07Strt + */ +#define XDDR_XMPU5_CFG_R07_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000170UL ) +#define XDDR_XMPU5_CFG_R07_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R07_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R07_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R07_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R07_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR07End + */ +#define XDDR_XMPU5_CFG_R07_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000174UL ) +#define XDDR_XMPU5_CFG_R07_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R07_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R07_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R07_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R07_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR07Mstr + */ +#define XDDR_XMPU5_CFG_R07_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000178UL ) +#define XDDR_XMPU5_CFG_R07_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R07_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R07_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R07_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R07_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R07_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R07_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R07_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R07_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR07 + */ +#define XDDR_XMPU5_CFG_R07 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000017CUL ) +#define XDDR_XMPU5_CFG_R07_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R07_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R07_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R07_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R07_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R07_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R07_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R07_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R07_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R07_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R07_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R07_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R07_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R07_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R07_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R07_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R07_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR08Strt + */ +#define XDDR_XMPU5_CFG_R08_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000180UL ) +#define XDDR_XMPU5_CFG_R08_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R08_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R08_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R08_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R08_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR08End + */ +#define XDDR_XMPU5_CFG_R08_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000184UL ) +#define XDDR_XMPU5_CFG_R08_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R08_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R08_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R08_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R08_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR08Mstr + */ +#define XDDR_XMPU5_CFG_R08_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000188UL ) +#define XDDR_XMPU5_CFG_R08_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R08_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R08_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R08_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R08_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R08_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R08_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R08_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R08_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR08 + */ +#define XDDR_XMPU5_CFG_R08 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000018CUL ) +#define XDDR_XMPU5_CFG_R08_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R08_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R08_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R08_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R08_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R08_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R08_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R08_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R08_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R08_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R08_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R08_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R08_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R08_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R08_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R08_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R08_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR09Strt + */ +#define XDDR_XMPU5_CFG_R09_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000190UL ) +#define XDDR_XMPU5_CFG_R09_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R09_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R09_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R09_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R09_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR09End + */ +#define XDDR_XMPU5_CFG_R09_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000194UL ) +#define XDDR_XMPU5_CFG_R09_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R09_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R09_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R09_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R09_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR09Mstr + */ +#define XDDR_XMPU5_CFG_R09_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000198UL ) +#define XDDR_XMPU5_CFG_R09_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R09_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R09_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R09_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R09_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R09_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R09_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R09_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R09_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR09 + */ +#define XDDR_XMPU5_CFG_R09 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000019CUL ) +#define XDDR_XMPU5_CFG_R09_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R09_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R09_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R09_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R09_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R09_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R09_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R09_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R09_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R09_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R09_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R09_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R09_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R09_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R09_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R09_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R09_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR10Strt + */ +#define XDDR_XMPU5_CFG_R10_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A0UL ) +#define XDDR_XMPU5_CFG_R10_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R10_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R10_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R10_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R10_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR10End + */ +#define XDDR_XMPU5_CFG_R10_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A4UL ) +#define XDDR_XMPU5_CFG_R10_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R10_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R10_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R10_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R10_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR10Mstr + */ +#define XDDR_XMPU5_CFG_R10_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A8UL ) +#define XDDR_XMPU5_CFG_R10_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R10_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R10_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R10_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R10_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R10_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R10_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R10_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R10_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR10 + */ +#define XDDR_XMPU5_CFG_R10 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001ACUL ) +#define XDDR_XMPU5_CFG_R10_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R10_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R10_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R10_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R10_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R10_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R10_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R10_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R10_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R10_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R10_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R10_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R10_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R10_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R10_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R10_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R10_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR11Strt + */ +#define XDDR_XMPU5_CFG_R11_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B0UL ) +#define XDDR_XMPU5_CFG_R11_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R11_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R11_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R11_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R11_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR11End + */ +#define XDDR_XMPU5_CFG_R11_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B4UL ) +#define XDDR_XMPU5_CFG_R11_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R11_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R11_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R11_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R11_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR11Mstr + */ +#define XDDR_XMPU5_CFG_R11_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B8UL ) +#define XDDR_XMPU5_CFG_R11_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R11_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R11_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R11_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R11_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R11_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R11_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R11_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R11_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR11 + */ +#define XDDR_XMPU5_CFG_R11 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001BCUL ) +#define XDDR_XMPU5_CFG_R11_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R11_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R11_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R11_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R11_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R11_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R11_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R11_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R11_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R11_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R11_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R11_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R11_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R11_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R11_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R11_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R11_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR12Strt + */ +#define XDDR_XMPU5_CFG_R12_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C0UL ) +#define XDDR_XMPU5_CFG_R12_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R12_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R12_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R12_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R12_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR12End + */ +#define XDDR_XMPU5_CFG_R12_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C4UL ) +#define XDDR_XMPU5_CFG_R12_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R12_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R12_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R12_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R12_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR12Mstr + */ +#define XDDR_XMPU5_CFG_R12_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C8UL ) +#define XDDR_XMPU5_CFG_R12_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R12_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R12_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R12_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R12_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R12_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R12_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R12_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R12_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR12 + */ +#define XDDR_XMPU5_CFG_R12 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001CCUL ) +#define XDDR_XMPU5_CFG_R12_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R12_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R12_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R12_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R12_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R12_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R12_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R12_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R12_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R12_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R12_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R12_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R12_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R12_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R12_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R12_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R12_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR13Strt + */ +#define XDDR_XMPU5_CFG_R13_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D0UL ) +#define XDDR_XMPU5_CFG_R13_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R13_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R13_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R13_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R13_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR13End + */ +#define XDDR_XMPU5_CFG_R13_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D4UL ) +#define XDDR_XMPU5_CFG_R13_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R13_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R13_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R13_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R13_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR13Mstr + */ +#define XDDR_XMPU5_CFG_R13_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D8UL ) +#define XDDR_XMPU5_CFG_R13_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R13_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R13_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R13_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R13_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R13_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R13_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R13_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R13_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR13 + */ +#define XDDR_XMPU5_CFG_R13 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001DCUL ) +#define XDDR_XMPU5_CFG_R13_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R13_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R13_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R13_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R13_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R13_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R13_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R13_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R13_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R13_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R13_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R13_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R13_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R13_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R13_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R13_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R13_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR14Strt + */ +#define XDDR_XMPU5_CFG_R14_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E0UL ) +#define XDDR_XMPU5_CFG_R14_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R14_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R14_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R14_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R14_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR14End + */ +#define XDDR_XMPU5_CFG_R14_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E4UL ) +#define XDDR_XMPU5_CFG_R14_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R14_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R14_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R14_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R14_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR14Mstr + */ +#define XDDR_XMPU5_CFG_R14_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E8UL ) +#define XDDR_XMPU5_CFG_R14_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R14_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R14_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R14_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R14_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R14_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R14_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R14_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R14_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR14 + */ +#define XDDR_XMPU5_CFG_R14 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001ECUL ) +#define XDDR_XMPU5_CFG_R14_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R14_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R14_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R14_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R14_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R14_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R14_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R14_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R14_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R14_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R14_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R14_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R14_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R14_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R14_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R14_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R14_EN_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR15Strt + */ +#define XDDR_XMPU5_CFG_R15_STRT ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F0UL ) +#define XDDR_XMPU5_CFG_R15_STRT_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R15_STRT_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R15_STRT_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R15_STRT_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R15_STRT_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR15End + */ +#define XDDR_XMPU5_CFG_R15_END ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F4UL ) +#define XDDR_XMPU5_CFG_R15_END_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R15_END_ADDR_SHIFT 0UL +#define XDDR_XMPU5_CFG_R15_END_ADDR_WIDTH 28UL +#define XDDR_XMPU5_CFG_R15_END_ADDR_MASK 0x0fffffffUL +#define XDDR_XMPU5_CFG_R15_END_ADDR_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR15Mstr + */ +#define XDDR_XMPU5_CFG_R15_MSTR ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F8UL ) +#define XDDR_XMPU5_CFG_R15_MSTR_RSTVAL 0x00000000UL + +#define XDDR_XMPU5_CFG_R15_MSTR_MSK_SHIFT 16UL +#define XDDR_XMPU5_CFG_R15_MSTR_MSK_WIDTH 16UL +#define XDDR_XMPU5_CFG_R15_MSTR_MSK_MASK 0xffff0000UL +#define XDDR_XMPU5_CFG_R15_MSTR_MSK_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R15_MSTR_ID_SHIFT 0UL +#define XDDR_XMPU5_CFG_R15_MSTR_ID_WIDTH 16UL +#define XDDR_XMPU5_CFG_R15_MSTR_ID_MASK 0x0000ffffUL +#define XDDR_XMPU5_CFG_R15_MSTR_ID_DEFVAL 0x0UL + +/** + * Register: XddrXmpu5CfgR15 + */ +#define XDDR_XMPU5_CFG_R15 ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001FCUL ) +#define XDDR_XMPU5_CFG_R15_RSTVAL 0x00000008UL + +#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_SHIFT 4UL +#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_WIDTH 1UL +#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_MASK 0x00000010UL +#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R15_REGNNS_SHIFT 3UL +#define XDDR_XMPU5_CFG_R15_REGNNS_WIDTH 1UL +#define XDDR_XMPU5_CFG_R15_REGNNS_MASK 0x00000008UL +#define XDDR_XMPU5_CFG_R15_REGNNS_DEFVAL 0x1UL + +#define XDDR_XMPU5_CFG_R15_WRALWD_SHIFT 2UL +#define XDDR_XMPU5_CFG_R15_WRALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R15_WRALWD_MASK 0x00000004UL +#define XDDR_XMPU5_CFG_R15_WRALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R15_RDALWD_SHIFT 1UL +#define XDDR_XMPU5_CFG_R15_RDALWD_WIDTH 1UL +#define XDDR_XMPU5_CFG_R15_RDALWD_MASK 0x00000002UL +#define XDDR_XMPU5_CFG_R15_RDALWD_DEFVAL 0x0UL + +#define XDDR_XMPU5_CFG_R15_EN_SHIFT 0UL +#define XDDR_XMPU5_CFG_R15_EN_WIDTH 1UL +#define XDDR_XMPU5_CFG_R15_EN_MASK 0x00000001UL +#define XDDR_XMPU5_CFG_R15_EN_DEFVAL 0x0UL + + +#ifdef __cplusplus +} +#endif + +#endif /* __XDDR_XMPU5_CFG_H__ */ diff --git a/src/Xilinx/include/xddrcpsu.h b/src/Xilinx/include/xddrcpsu.h new file mode 100644 index 0000000..412f335 --- /dev/null +++ b/src/Xilinx/include/xddrcpsu.h @@ -0,0 +1,65 @@ +/******************************************************************************* + * + * Copyright (C) 2016 Xilinx, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * Use of the Software is limited solely to applications: + * (a) running on a Xilinx device, or + * (b) that interact with a Xilinx device through a bus or interconnect. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Except as contained in this notice, the name of the Xilinx shall not be used + * in advertising or otherwise to promote the sale, use or other dealings in + * this Software without prior written authorization from Xilinx. + * +*******************************************************************************/ +/******************************************************************************/ +/** + * + * @file xddcrpsu.h + * @addtogroup ddrcpsu_v1_1 + * @{ + * @details + * + * The Xilinx DdrcPsu driver. This driver supports the Xilinx ddrcpsu + * IP core. + * + * @note None. + * + * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0	ssc   04/28/16 First Release.
+ * 1.1  adk   04/08/16 Export DDR freq to xparameters.h file.
+ *
+ *
+ * +*******************************************************************************/ + +#ifndef XDDRCPS_H_ +/* Prevent circular inclusions by using protection macros. */ +#define XDDRCPS_H_ + +/******************************* Include Files ********************************/ + + +#endif /* XDDRCPS_H_ */ +/** @} */ diff --git a/src/Xilinx/include/xdebug.h b/src/Xilinx/include/xdebug.h new file mode 100644 index 0000000..650946b --- /dev/null +++ b/src/Xilinx/include/xdebug.h @@ -0,0 +1,32 @@ +#ifndef XDEBUG /* prevent circular inclusions */ +#define XDEBUG /* by using protection macros */ + +#if defined(DEBUG) && !defined(NDEBUG) + +#ifndef XDEBUG_WARNING +#define XDEBUG_WARNING +#warning DEBUG is enabled +#endif + +int printf(const char *format, ...); + +#define XDBG_DEBUG_ERROR 0x00000001U /* error condition messages */ +#define XDBG_DEBUG_GENERAL 0x00000002U /* general debug messages */ +#define XDBG_DEBUG_ALL 0xFFFFFFFFU /* all debugging data */ + +#define xdbg_current_types (XDBG_DEBUG_GENERAL) + +#define xdbg_stmnt(x) x + +#define xdbg_printf(type, ...) (((type) & xdbg_current_types) ? printf (__VA_ARGS__) : 0) + + +#else /* defined(DEBUG) && !defined(NDEBUG) */ + +#define xdbg_stmnt(x) + +#define xdbg_printf(...) + +#endif /* defined(DEBUG) && !defined(NDEBUG) */ + +#endif /* XDEBUG */ diff --git a/src/Xilinx/include/xdpdma.h b/src/Xilinx/include/xdpdma.h new file mode 100644 index 0000000..95315b0 --- /dev/null +++ b/src/Xilinx/include/xdpdma.h @@ -0,0 +1,283 @@ +/****************************************************************************** + * + * Copyright (C) 2017 Xilinx, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * Use of the Software is limited solely to applications: + * (a) running on a Xilinx device, or + * (b) that interact with a Xilinx device through a bus or interconnect. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Except as contained in this notice, the name of the Xilinx shall not be used + * in advertising or otherwise to promote the sale, use or other dealings in + * this Software without prior written authorization from Xilinx. + * + ******************************************************************************/ + +/*****************************************************************************/ +/** + * + * @file xdpdma.h + * + * This file defines the functions implemented by the DPDMA driver present + * in the Zynq Ultrascale MP. + * + * @note None. + * + * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver	Who   Date     Changes
+ * ---- ----- -------- ----------------------------------------------------
+ * 1.0  aad   04/12/16 Initial release.
+ *
+ *****************************************************************************/
+
+
+#ifndef XDPDMA_H_
+/* Prevent circular inclusions by using protection macros. */
+#define XDPDMA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files **********************************/
+
+#include "xdpdma_hw.h"
+#include "xvidc.h"
+#include "xil_io.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xavbuf.h"
+/************************** Constant Definitions ******************************/
+
+/* Alignment for DPDMA Descriptor and Payload */
+#define XDPDMA_DESCRIPTOR_ALIGN 256
+/* DPDMA preamble field */
+#define XDPDMA_DESCRIPTOR_PREAMBLE 0xA5
+/**************************** Type Definitions ********************************/
+
+/**
+ *  This typedef describes the DPDMA descriptor structure and its internals
+ *  which will be used when fetching data from a nonlive path
+ */
+typedef struct {
+	u32 Control;			/**<	[7:0] Descriptor Preamble
+						[8] Enable completion Interrupt
+						[9] Enable descriptor update
+						[10] Ignore Done
+						[11] AXI burst type
+						[15:12] AXACHE
+						[17:16] AXPROT
+						[18] Descriptor mode
+						[19] Last Descriptor
+						[20] Enable CRC
+						[21] Last descriptor frame
+						[31:22] Reserved */
+	u32 DSCR_ID;			/**<	[15:0] Descriptor ID
+						[31:16] Reserved */
+	u32 XFER_SIZE;			/**<	Size of transfer in bytes */
+	u32 LINE_SIZE_STRIDE;		/**<	[17:0] Horizontal Resolution
+						[31:18] Stride */
+	u32 LSB_Timestamp;		/**<	LSB of the Timestamp */
+	u32 MSB_Timestamp;		/**<	MSB of the Timestamp */
+	u32 ADDR_EXT;			/**<	[15:0] Next descriptor
+						extenstion
+						[31:16] SRC address extemsion */
+	u32 NEXT_DESR;			/**<	Address of next descriptor */
+	u32 SRC_ADDR;			/**<	Source Address */
+	u32 ADDR_EXT_23;		/**<	[15:0] Address extension for SRC
+						Address2
+						[31:16] Address extension for
+						SRC Address 3 */
+	u32 ADDR_EXT_45;		/**<	[15:0] Address extension for SRC
+						Address4
+						[31:16] Address extension for
+						SRC Address 5 */
+	u32 SRC_ADDR2;			/**<	Source address of 2nd page */
+	u32 SRC_ADDR3;			/**<	Source address of 3rd page */
+	u32 SRC_ADDR4;			/**<	Source address of 4th page */
+	u32 SRC_ADDR5;			/**<	Source address of 5th page */
+	u32 CRC;			/**<	Reserved */
+
+} XDpDma_Descriptor __attribute__ ((aligned(XDPDMA_DESCRIPTOR_ALIGN)));
+
+/**
+ * This typedef contains configuration information for the DPDMA.
+ */
+typedef struct {
+	u16 DeviceId;			/**< Device ID */
+	u32 BaseAddr;			/**< Base Address */
+} XDpDma_Config;
+
+/**
+ * The following data structure enumerates the types of
+ * DPDMA channels
+ */
+typedef enum {
+	VideoChan,
+	GraphicsChan,
+	AudioChan0,
+	AudioChan1,
+} XDpDma_ChannelType;
+
+/**
+ * This typedef lists the channel status.
+ */
+typedef enum {
+	XDPDMA_DISABLE,
+	XDPDMA_ENABLE,
+	XDPDMA_IDLE,
+	XDPDMA_PAUSE
+} XDpDma_ChannelState;
+
+/**
+ * This typedef is the information needed to transfer video info.
+ */
+typedef struct {
+	u64 Address;
+	u32 Size;
+	u32 Stride;
+	u32 LineSize;
+} XDpDma_FrameBuffer;
+/**
+ * This typedef is the information needed to transfer audio info.
+ */
+typedef struct {
+	u64 Address;
+	u64 Size;
+} XDpDma_AudioBuffer;
+
+/**
+ * This typedef defines the Video/Graphics Channel attributes.
+ */
+typedef struct {
+	XDpDma_Descriptor Descriptor0;
+	XDpDma_Descriptor Descriptor1;
+	XDpDma_Descriptor *Current;
+} XDpDma_Channel;
+
+/**
+ * This typedef defines the Video Channel attributes.
+ */
+typedef struct {
+	XDpDma_Channel Channel[3];
+	u8 TriggerStatus;
+	u8 AVBufEn;
+	XAVBuf_VideoAttribute *VideoInfo;
+	XDpDma_FrameBuffer *FrameBuffer[3];
+} XDpDma_VideoChannel;
+
+/**
+ * This typedef defines the Graphics Channel attributes.
+ */
+typedef struct {
+	XDpDma_Channel Channel;
+	u8 TriggerStatus;
+	u8 AVBufEn;
+	XAVBuf_VideoAttribute *VideoInfo;
+	XDpDma_FrameBuffer *FrameBuffer;
+} XDpDma_GfxChannel;
+
+/**
+ * This typedef defines the Audio Channel attributes.
+ */
+typedef struct {
+	XDpDma_Descriptor Descriptor0, Descriptor1, Descriptor2;
+	XDpDma_Descriptor Descriptor3, Descriptor4, Descriptor5;
+	XDpDma_Descriptor Descriptor6, Descriptor7;
+	XDpDma_Descriptor *Current;
+	u8 TriggerStatus;
+	XDpDma_AudioBuffer *Buffer;
+	u8 Used;
+} XDpDma_AudioChannel;
+/*************************************************************************/
+/**
+ * This callback type represents the handler for a DPDMA VSync interrupt.
+ *
+ * @param	InstancePtr is a pointer to the XDpDma instance.
+ *
+ * @note	None.
+ *
+**************************************************************************/
+typedef void (*XDpDma_VSyncInterruptHandler)(void *InstancePtr);
+
+/*************************************************************************/
+/**
+ * This callback type represents the handler for a DPDMA Done interrupt.
+ *
+ * @param	InstancePtr is a pointer to the XDpDma instance.
+ *
+ * @note	None.
+ *
+**************************************************************************/
+typedef void (*XDpDma_DoneInterruptHandler)(void *InstancePtr);
+
+/**
+ * The XDpDma driver instance data representing the DPDMA operation.
+ */
+typedef struct {
+	XDpDma_Config Config;
+	XDpDma_VideoChannel Video;
+	XDpDma_GfxChannel Gfx;
+	XDpDma_AudioChannel Audio[2];
+	XVidC_VideoTiming *Timing;
+	u8 QOS;
+
+	XDpDma_VSyncInterruptHandler VSyncHandler;
+	void * VSyncInterruptHandler;
+
+	XDpDma_DoneInterruptHandler DoneHandler;
+	void * DoneInterruptHandler;
+
+} XDpDma;
+
+void XDpDma_CfgInitialize(XDpDma *InstancePtr, XDpDma_Config *CfgPtr);
+XDpDma_Config *XDpDma_LookupConfig(u16 DeviceId);
+int XDpDma_SetChannelState(XDpDma *InstancePtr, XDpDma_ChannelType Channel,
+					XDpDma_ChannelState ChannelState);
+void XDpDma_SetQOS(XDpDma *InstancePtr, u8 QOS);
+void XDpDma_SetupChannel(XDpDma *InstancePtr, XDpDma_ChannelType Channel);
+int XDpDma_SetVideoFormat(XDpDma *InstancePtr, XAVBuf_VideoFormat Format);
+int XDpDma_SetGraphicsFormat(XDpDma *InstancePtr, XAVBuf_VideoFormat Format);
+void XDpDma_SetVideoTiming(XDpDma *InstancePtr, XVidC_VideoTiming *Timing);
+int XDpDma_Trigger(XDpDma *InstancePtr, XDpDma_ChannelType Channel);
+int XDpDma_ReTrigger(XDpDma *InstancePtr, XDpDma_ChannelType Channel);
+void XDpDma_InterruptEnable(XDpDma *InstancePtr, u32 Mask);
+void XDpDma_InterruptHandler(XDpDma *InstancePtr);
+void XDpDma_VSyncHandler(XDpDma *InstancePtr);
+void XDpDma_DoneHandler(XDpDma *InstancePtr);
+void XDpDma_InitVideoDescriptor(XDpDma_Descriptor *CurrDesc,
+				XDpDma_FrameBuffer *FrameBuffer);
+void  XDpDma_DisplayVideoFrameBuffer(XDpDma *InstancePtr,
+				   XDpDma_FrameBuffer *Plane1,
+				   XDpDma_FrameBuffer *Plane2,
+				   XDpDma_FrameBuffer *Plane3);
+void XDpDma_DisplayGfxFrameBuffer(XDpDma *InstancePtr,
+				   XDpDma_FrameBuffer *Plane);
+void XDpDma_InitAudioDescriptor(XDpDma_AudioChannel *Channel,
+			       XDpDma_AudioBuffer *AudioBuffer);
+int XDpDma_PlayAudio(XDpDma *InstancePtr, XDpDma_AudioBuffer *Buffer,
+		      u8 ChannelNum);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XDPDMA_H_ */
diff --git a/src/Xilinx/include/xdpdma_hw.h b/src/Xilinx/include/xdpdma_hw.h
new file mode 100644
index 0000000..14ebce2
--- /dev/null
+++ b/src/Xilinx/include/xdpdma_hw.h
@@ -0,0 +1,1811 @@
+/******************************************************************************
+ *
+ * Copyright (C) 2010 - 2017 Xilinx, Inc. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+ ******************************************************************************/
+
+/*****************************************************************************/
+/**
+ *
+ * @file xdpdma_hw.h
+ *
+ * This header file contains identifiers and low-level driver functions (or
+ * macros) that can be used to access the device. High-level driver functions
+ * are defined in xdpdma.h
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver	Who   Date     Changes
+ * ---- ----- -------- ----------------------------------------------------
+ * 1.0  aad   04/12/16 Initial release.
+ *
+ *****************************************************************************/
+
+
+#ifndef XDPDMAHW_H_
+/* Prevent circular inclusions by using protection macros. */
+#define XDPDMAHW_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files **********************************/
+
+#include "xil_io.h"
+
+/************************** Constant Definitions ******************************/
+
+/******************************************************************************/
+/**
+ * Address mapping for the DPDMA.
+ */
+/******************************************************************************/
+/** @name DPDMA registers
+ *  @{
+ */
+
+#define XDPDMA_BASEADDR					0XFD4C0000
+
+/**
+ * Register: XDPDMA_ERR_CTRL
+ */
+#define XDPDMA_ERR_CTRL					0X0000
+
+#define XDPDMA_ERR_CTRL_APB_ERR_RES_SHIFT		0
+#define XDPDMA_ERR_CTRL_APB_ERR_RES_WIDTH		1
+#define XDPDMA_ERR_CTRL_APB_ERR_RES_MASK		0X1
+
+/**
+ * Register: XDPDMA_ISR
+ */
+#define XDPDMA_ISR					0X0004
+
+#define XDPDMA_ISR_VSYNC_INT_SHIFT			27
+#define XDPDMA_ISR_VSYNC_INT_WIDTH			1
+#define XDPDMA_ISR_VSYNC_INT_MASK			0X08000000
+
+#define XDPDMA_ISR_AXI_RD_4K_CROSS_SHIFT		26
+#define XDPDMA_ISR_AXI_RD_4K_CROSS_WIDTH		1
+#define XDPDMA_ISR_AXI_RD_4K_CROSS_MASK			0X04000000
+
+#define XDPDMA_ISR_WR_DATA_FIFO_FULL_SHIFT		25
+#define XDPDMA_ISR_WR_DATA_FIFO_FULL_WIDTH		1
+#define XDPDMA_ISR_WR_DATA_FIFO_FULL_MASK		0X02000000
+
+#define XDPDMA_ISR_WR_CMD_FIFO_FULL_SHIFT		24
+#define XDPDMA_ISR_WR_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_ISR_WR_CMD_FIFO_FULL_MASK		0X01000000
+
+#define XDPDMA_ISR_DSCR_ERR5_SHIFT			23
+#define XDPDMA_ISR_DSCR_ERR5_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR5_MASK			0X800000
+
+#define XDPDMA_ISR_DSCR_ERR4_SHIFT			22
+#define XDPDMA_ISR_DSCR_ERR4_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR4_MASK			0X400000
+
+#define XDPDMA_ISR_DSCR_ERR3_SHIFT			21
+#define XDPDMA_ISR_DSCR_ERR3_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR3_MASK			0X200000
+
+#define XDPDMA_ISR_DSCR_ERR2_SHIFT			20
+#define XDPDMA_ISR_DSCR_ERR2_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR2_MASK			0X100000
+
+#define XDPDMA_ISR_DSCR_ERR1_SHIFT			19
+#define XDPDMA_ISR_DSCR_ERR1_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR1_MASK			0X80000
+
+#define XDPDMA_ISR_DSCR_ERR0_SHIFT			18
+#define XDPDMA_ISR_DSCR_ERR0_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR0_MASK			0X40000
+
+#define XDPDMA_ISR_DATA_AXI_ERR5_SHIFT			17
+#define XDPDMA_ISR_DATA_AXI_ERR5_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR5_MASK			0X20000
+
+#define XDPDMA_ISR_DATA_AXI_ERR4_SHIFT			16
+#define XDPDMA_ISR_DATA_AXI_ERR4_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR4_MASK			0X10000
+
+#define XDPDMA_ISR_DATA_AXI_ERR3_SHIFT			15
+#define XDPDMA_ISR_DATA_AXI_ERR3_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR3_MASK			0X8000
+
+#define XDPDMA_ISR_DATA_AXI_ERR2_SHIFT			14
+#define XDPDMA_ISR_DATA_AXI_ERR2_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR2_MASK			0X4000
+
+#define XDPDMA_ISR_DATA_AXI_ERR1_SHIFT			13
+#define XDPDMA_ISR_DATA_AXI_ERR1_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR1_MASK			0X2000
+
+#define XDPDMA_ISR_DATA_AXI_ERR0_SHIFT			12
+#define XDPDMA_ISR_DATA_AXI_ERR0_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR0_MASK			0X1000
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN5_SHIFT		11
+#define XDPDMA_ISR_NO_OSTAND_TRAN5_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN5_MASK			0X0800
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN4_SHIFT		10
+#define XDPDMA_ISR_NO_OSTAND_TRAN4_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN4_MASK			0X0400
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN3_SHIFT		9
+#define XDPDMA_ISR_NO_OSTAND_TRAN3_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN3_MASK			0X0200
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN2_SHIFT		8
+#define XDPDMA_ISR_NO_OSTAND_TRAN2_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN2_MASK			0X0100
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN1_SHIFT		7
+#define XDPDMA_ISR_NO_OSTAND_TRAN1_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN1_MASK			0X80
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN0_SHIFT		6
+#define XDPDMA_ISR_NO_OSTAND_TRAN0_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN0_MASK			0X40
+
+#define XDPDMA_ISR_DSCR_DONE5_SHIFT			5
+#define XDPDMA_ISR_DSCR_DONE5_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE5_MASK			0X20
+
+#define XDPDMA_ISR_DSCR_DONE4_SHIFT			4
+#define XDPDMA_ISR_DSCR_DONE4_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE4_MASK			0X10
+
+#define XDPDMA_ISR_DSCR_DONE3_SHIFT			3
+#define XDPDMA_ISR_DSCR_DONE3_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE3_MASK			0X8
+
+#define XDPDMA_ISR_DSCR_DONE2_SHIFT			2
+#define XDPDMA_ISR_DSCR_DONE2_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE2_MASK			0X4
+
+#define XDPDMA_ISR_DSCR_DONE1_SHIFT			1
+#define XDPDMA_ISR_DSCR_DONE1_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE1_MASK			0X2
+
+#define XDPDMA_ISR_DSCR_DONE0_SHIFT			0
+#define XDPDMA_ISR_DSCR_DONE0_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE0_MASK			0X1
+
+/**
+ * Register: XDPDMA_IMR
+ */
+#define XDPDMA_IMR					0X0008
+
+#define XDPDMA_IMR_VSYNC_INT_SHIFT			27
+#define XDPDMA_IMR_VSYNC_INT_WIDTH			1
+#define XDPDMA_IMR_VSYNC_INT_MASK			0X08000000
+
+#define XDPDMA_IMR_AXI_RD_4K_CROSS_SHIFT		26
+#define XDPDMA_IMR_AXI_RD_4K_CROSS_WIDTH		1
+#define XDPDMA_IMR_AXI_RD_4K_CROSS_MASK			0X04000000
+
+#define XDPDMA_IMR_WR_DATA_FIFO_FULL_SHIFT		25
+#define XDPDMA_IMR_WR_DATA_FIFO_FULL_WIDTH		1
+#define XDPDMA_IMR_WR_DATA_FIFO_FULL_MASK		0X02000000
+
+#define XDPDMA_IMR_WR_CMD_FIFO_FULL_SHIFT		24
+#define XDPDMA_IMR_WR_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_IMR_WR_CMD_FIFO_FULL_MASK		0X01000000
+
+#define XDPDMA_IMR_DSCR_ERR5_SHIFT			23
+#define XDPDMA_IMR_DSCR_ERR5_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR5_MASK			0X800000
+
+#define XDPDMA_IMR_DSCR_ERR4_SHIFT			22
+#define XDPDMA_IMR_DSCR_ERR4_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR4_MASK			0X400000
+
+#define XDPDMA_IMR_DSCR_ERR3_SHIFT			21
+#define XDPDMA_IMR_DSCR_ERR3_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR3_MASK			0X200000
+
+#define XDPDMA_IMR_DSCR_ERR2_SHIFT			20
+#define XDPDMA_IMR_DSCR_ERR2_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR2_MASK			0X100000
+
+#define XDPDMA_IMR_DSCR_ERR1_SHIFT			19
+#define XDPDMA_IMR_DSCR_ERR1_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR1_MASK			0X80000
+
+#define XDPDMA_IMR_DSCR_ERR0_SHIFT			18
+#define XDPDMA_IMR_DSCR_ERR0_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR0_MASK			0X40000
+
+#define XDPDMA_IMR_DATA_AXI_ERR5_SHIFT			17
+#define XDPDMA_IMR_DATA_AXI_ERR5_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR5_MASK			0X20000
+
+#define XDPDMA_IMR_DATA_AXI_ERR4_SHIFT			16
+#define XDPDMA_IMR_DATA_AXI_ERR4_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR4_MASK			0X10000
+
+#define XDPDMA_IMR_DATA_AXI_ERR3_SHIFT			15
+#define XDPDMA_IMR_DATA_AXI_ERR3_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR3_MASK			0X8000
+
+#define XDPDMA_IMR_DATA_AXI_ERR2_SHIFT			14
+#define XDPDMA_IMR_DATA_AXI_ERR2_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR2_MASK			0X4000
+
+#define XDPDMA_IMR_DATA_AXI_ERR1_SHIFT			13
+#define XDPDMA_IMR_DATA_AXI_ERR1_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR1_MASK			0X2000
+
+#define XDPDMA_IMR_DATA_AXI_ERR0_SHIFT			12
+#define XDPDMA_IMR_DATA_AXI_ERR0_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR0_MASK			0X1000
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN5_SHIFT		11
+#define XDPDMA_IMR_NO_OSTAND_TRAN5_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN5_MASK			0X0800
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN4_SHIFT		10
+#define XDPDMA_IMR_NO_OSTAND_TRAN4_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN4_MASK			0X0400
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN3_SHIFT		9
+#define XDPDMA_IMR_NO_OSTAND_TRAN3_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN3_MASK			0X0200
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN2_SHIFT		8
+#define XDPDMA_IMR_NO_OSTAND_TRAN2_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN2_MASK			0X0100
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN1_SHIFT		7
+#define XDPDMA_IMR_NO_OSTAND_TRAN1_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN1_MASK			0X80
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN0_SHIFT		6
+#define XDPDMA_IMR_NO_OSTAND_TRAN0_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN0_MASK			0X40
+
+#define XDPDMA_IMR_DSCR_DONE5_SHIFT			5
+#define XDPDMA_IMR_DSCR_DONE5_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE5_MASK			0X20
+
+#define XDPDMA_IMR_DSCR_DONE4_SHIFT			4
+#define XDPDMA_IMR_DSCR_DONE4_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE4_MASK			0X10
+
+#define XDPDMA_IMR_DSCR_DONE3_SHIFT			3
+#define XDPDMA_IMR_DSCR_DONE3_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE3_MASK			0X8
+
+#define XDPDMA_IMR_DSCR_DONE2_SHIFT			2
+#define XDPDMA_IMR_DSCR_DONE2_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE2_MASK			0X4
+
+#define XDPDMA_IMR_DSCR_DONE1_SHIFT			1
+#define XDPDMA_IMR_DSCR_DONE1_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE1_MASK			0X2
+
+#define XDPDMA_IMR_DSCR_DONE0_SHIFT			0
+#define XDPDMA_IMR_DSCR_DONE0_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE0_MASK			0X1
+
+/**
+ * Register: XDPDMA_IEN
+ */
+#define XDPDMA_IEN					0X000C
+
+#define XDPDMA_IEN_VSYNC_INT_SHIFT			27
+#define XDPDMA_IEN_VSYNC_INT_WIDTH			1
+#define XDPDMA_IEN_VSYNC_INT_MASK			0X08000000
+
+#define XDPDMA_IEN_AXI_RD_4K_CROSS_SHIFT		26
+#define XDPDMA_IEN_AXI_RD_4K_CROSS_WIDTH		1
+#define XDPDMA_IEN_AXI_RD_4K_CROSS_MASK			0X04000000
+
+#define XDPDMA_IEN_WR_DATA_FIFO_FULL_SHIFT		25
+#define XDPDMA_IEN_WR_DATA_FIFO_FULL_WIDTH		1
+#define XDPDMA_IEN_WR_DATA_FIFO_FULL_MASK		0X02000000
+
+#define XDPDMA_IEN_WR_CMD_FIFO_FULL_SHIFT		24
+#define XDPDMA_IEN_WR_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_IEN_WR_CMD_FIFO_FULL_MASK		0X01000000
+
+#define XDPDMA_IEN_DSCR_ERR5_SHIFT			23
+#define XDPDMA_IEN_DSCR_ERR5_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR5_MASK			0X800000
+
+#define XDPDMA_IEN_DSCR_ERR4_SHIFT			22
+#define XDPDMA_IEN_DSCR_ERR4_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR4_MASK			0X400000
+
+#define XDPDMA_IEN_DSCR_ERR3_SHIFT			21
+#define XDPDMA_IEN_DSCR_ERR3_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR3_MASK			0X200000
+
+#define XDPDMA_IEN_DSCR_ERR2_SHIFT			20
+#define XDPDMA_IEN_DSCR_ERR2_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR2_MASK			0X100000
+
+#define XDPDMA_IEN_DSCR_ERR1_SHIFT			19
+#define XDPDMA_IEN_DSCR_ERR1_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR1_MASK			0X80000
+
+#define XDPDMA_IEN_DSCR_ERR0_SHIFT			18
+#define XDPDMA_IEN_DSCR_ERR0_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR0_MASK			0X40000
+
+#define XDPDMA_IEN_DATA_AXI_ERR5_SHIFT			17
+#define XDPDMA_IEN_DATA_AXI_ERR5_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR5_MASK			0X20000
+
+#define XDPDMA_IEN_DATA_AXI_ERR4_SHIFT			16
+#define XDPDMA_IEN_DATA_AXI_ERR4_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR4_MASK			0X10000
+
+#define XDPDMA_IEN_DATA_AXI_ERR3_SHIFT			15
+#define XDPDMA_IEN_DATA_AXI_ERR3_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR3_MASK			0X8000
+
+#define XDPDMA_IEN_DATA_AXI_ERR2_SHIFT			14
+#define XDPDMA_IEN_DATA_AXI_ERR2_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR2_MASK			0X4000
+
+#define XDPDMA_IEN_DATA_AXI_ERR1_SHIFT			13
+#define XDPDMA_IEN_DATA_AXI_ERR1_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR1_MASK			0X2000
+
+#define XDPDMA_IEN_DATA_AXI_ERR0_SHIFT			12
+#define XDPDMA_IEN_DATA_AXI_ERR0_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR0_MASK			0X1000
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN5_SHIFT		11
+#define XDPDMA_IEN_NO_OSTAND_TRAN5_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN5_MASK			0X0800
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN4_SHIFT		10
+#define XDPDMA_IEN_NO_OSTAND_TRAN4_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN4_MASK			0X0400
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN3_SHIFT		9
+#define XDPDMA_IEN_NO_OSTAND_TRAN3_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN3_MASK			0X0200
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN2_SHIFT		8
+#define XDPDMA_IEN_NO_OSTAND_TRAN2_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN2_MASK			0X0100
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN1_SHIFT		7
+#define XDPDMA_IEN_NO_OSTAND_TRAN1_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN1_MASK			0X80
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN0_SHIFT		6
+#define XDPDMA_IEN_NO_OSTAND_TRAN0_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN0_MASK			0X40
+
+#define XDPDMA_IEN_DSCR_DONE5_SHIFT			5
+#define XDPDMA_IEN_DSCR_DONE5_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE5_MASK			0X20
+
+#define XDPDMA_IEN_DSCR_DONE4_SHIFT			4
+#define XDPDMA_IEN_DSCR_DONE4_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE4_MASK			0X10
+
+#define XDPDMA_IEN_DSCR_DONE3_SHIFT			3
+#define XDPDMA_IEN_DSCR_DONE3_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE3_MASK			0X8
+
+#define XDPDMA_IEN_DSCR_DONE2_SHIFT			2
+#define XDPDMA_IEN_DSCR_DONE2_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE2_MASK			0X4
+
+#define XDPDMA_IEN_DSCR_DONE1_SHIFT			1
+#define XDPDMA_IEN_DSCR_DONE1_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE1_MASK			0X2
+
+#define XDPDMA_IEN_DSCR_DONE0_SHIFT			0
+#define XDPDMA_IEN_DSCR_DONE0_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE0_MASK			0X1
+
+/**
+ * Register: XDPDMA_IDS
+ */
+#define XDPDMA_IDS					0X0010
+
+#define XDPDMA_IDS_VSYNC_INT_SHIFT			27
+#define XDPDMA_IDS_VSYNC_INT_WIDTH			1
+#define XDPDMA_IDS_VSYNC_INT_MASK			0X08000000
+
+#define XDPDMA_IDS_AXI_RD_4K_CROSS_SHIFT		26
+#define XDPDMA_IDS_AXI_RD_4K_CROSS_WIDTH		1
+#define XDPDMA_IDS_AXI_RD_4K_CROSS_MASK		0X04000000
+
+#define XDPDMA_IDS_WR_DATA_FIFO_FULL_SHIFT		25
+#define XDPDMA_IDS_WR_DATA_FIFO_FULL_WIDTH		1
+#define XDPDMA_IDS_WR_DATA_FIFO_FULL_MASK		0X02000000
+
+#define XDPDMA_IDS_WR_CMD_FIFO_FULL_SHIFT		24
+#define XDPDMA_IDS_WR_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_IDS_WR_CMD_FIFO_FULL_MASK		0X01000000
+
+#define XDPDMA_IDS_DSCR_ERR5_SHIFT			23
+#define XDPDMA_IDS_DSCR_ERR5_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR5_MASK			0X800000
+
+#define XDPDMA_IDS_DSCR_ERR4_SHIFT			22
+#define XDPDMA_IDS_DSCR_ERR4_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR4_MASK			0X400000
+
+#define XDPDMA_IDS_DSCR_ERR3_SHIFT			21
+#define XDPDMA_IDS_DSCR_ERR3_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR3_MASK			0X200000
+
+#define XDPDMA_IDS_DSCR_ERR2_SHIFT			20
+#define XDPDMA_IDS_DSCR_ERR2_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR2_MASK			0X100000
+
+#define XDPDMA_IDS_DSCR_ERR1_SHIFT			19
+#define XDPDMA_IDS_DSCR_ERR1_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR1_MASK			0X80000
+
+#define XDPDMA_IDS_DSCR_ERR0_SHIFT			18
+#define XDPDMA_IDS_DSCR_ERR0_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR0_MASK			0X40000
+
+#define XDPDMA_IDS_DATA_AXI_ERR5_SHIFT			17
+#define XDPDMA_IDS_DATA_AXI_ERR5_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR5_MASK			0X20000
+
+#define XDPDMA_IDS_DATA_AXI_ERR4_SHIFT			16
+#define XDPDMA_IDS_DATA_AXI_ERR4_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR4_MASK			0X10000
+
+#define XDPDMA_IDS_DATA_AXI_ERR3_SHIFT			15
+#define XDPDMA_IDS_DATA_AXI_ERR3_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR3_MASK			0X8000
+
+#define XDPDMA_IDS_DATA_AXI_ERR2_SHIFT			14
+#define XDPDMA_IDS_DATA_AXI_ERR2_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR2_MASK			0X4000
+
+#define XDPDMA_IDS_DATA_AXI_ERR1_SHIFT			13
+#define XDPDMA_IDS_DATA_AXI_ERR1_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR1_MASK			0X2000
+
+#define XDPDMA_IDS_DATA_AXI_ERR0_SHIFT			12
+#define XDPDMA_IDS_DATA_AXI_ERR0_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR0_MASK			0X1000
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN5_SHIFT		11
+#define XDPDMA_IDS_NO_OSTAND_TRAN5_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN5_MASK			0X0800
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN4_SHIFT		10
+#define XDPDMA_IDS_NO_OSTAND_TRAN4_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN4_MASK			0X0400
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN3_SHIFT		9
+#define XDPDMA_IDS_NO_OSTAND_TRAN3_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN3_MASK			0X0200
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN2_SHIFT		8
+#define XDPDMA_IDS_NO_OSTAND_TRAN2_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN2_MASK			0X0100
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN1_SHIFT		7
+#define XDPDMA_IDS_NO_OSTAND_TRAN1_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN1_MASK			0X80
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN0_SHIFT		6
+#define XDPDMA_IDS_NO_OSTAND_TRAN0_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN0_MASK			0X40
+
+#define XDPDMA_IDS_DSCR_DONE5_SHIFT			5
+#define XDPDMA_IDS_DSCR_DONE5_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE5_MASK			0X20
+
+#define XDPDMA_IDS_DSCR_DONE4_SHIFT			4
+#define XDPDMA_IDS_DSCR_DONE4_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE4_MASK			0X10
+
+#define XDPDMA_IDS_DSCR_DONE3_SHIFT			3
+#define XDPDMA_IDS_DSCR_DONE3_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE3_MASK			0X8
+
+#define XDPDMA_IDS_DSCR_DONE2_SHIFT			2
+#define XDPDMA_IDS_DSCR_DONE2_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE2_MASK			0X4
+
+#define XDPDMA_IDS_DSCR_DONE1_SHIFT			1
+#define XDPDMA_IDS_DSCR_DONE1_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE1_MASK			0X2
+
+#define XDPDMA_IDS_DSCR_DONE0_SHIFT			0
+#define XDPDMA_IDS_DSCR_DONE0_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE0_MASK			0X1
+
+/**
+ * Register: XDPDMA_EISR
+ */
+#define XDPDMA_EISR					0X0014
+
+#define XDPDMA_EISR_RD_CMD_FIFO_FULL_SHIFT		31
+#define XDPDMA_EISR_RD_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_EISR_RD_CMD_FIFO_FULL_MASK		0X80000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR5_SHIFT		30
+#define XDPDMA_EISR_DSCR_DONE_ERR5_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR5_MASK			0X40000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR4_SHIFT		29
+#define XDPDMA_EISR_DSCR_DONE_ERR4_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR4_MASK			0X20000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR3_SHIFT		28
+#define XDPDMA_EISR_DSCR_DONE_ERR3_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR3_MASK			0X10000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR2_SHIFT		27
+#define XDPDMA_EISR_DSCR_DONE_ERR2_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR2_MASK			0X08000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR1_SHIFT		26
+#define XDPDMA_EISR_DSCR_DONE_ERR1_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR1_MASK			0X04000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR0_SHIFT		25
+#define XDPDMA_EISR_DSCR_DONE_ERR0_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR0_MASK			0X02000000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR5_SHIFT		24
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR5_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR5_MASK		0X01000000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR4_SHIFT		23
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR4_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR4_MASK		0X800000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR3_SHIFT		22
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR3_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR3_MASK		0X400000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR2_SHIFT		21
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR2_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR2_MASK		0X200000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR1_SHIFT		20
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR1_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR1_MASK		0X100000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR0_SHIFT		19
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR0_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR0_MASK		0X80000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR5_SHIFT			18
+#define XDPDMA_EISR_DSCR_CRC_ERR5_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR5_MASK			0X40000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR4_SHIFT			17
+#define XDPDMA_EISR_DSCR_CRC_ERR4_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR4_MASK			0X20000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR3_SHIFT			16
+#define XDPDMA_EISR_DSCR_CRC_ERR3_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR3_MASK			0X10000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR2_SHIFT			15
+#define XDPDMA_EISR_DSCR_CRC_ERR2_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR2_MASK			0X8000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR1_SHIFT			14
+#define XDPDMA_EISR_DSCR_CRC_ERR1_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR1_MASK			0X4000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR0_SHIFT			13
+#define XDPDMA_EISR_DSCR_CRC_ERR0_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR0_MASK			0X2000
+
+#define XDPDMA_EISR_DSCR_PRE_ERR5_SHIFT			12
+#define XDPDMA_EISR_DSCR_PRE_ERR5_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR5_MASK			0X1000
+
+#define XDPDMA_EISR_DSCR_PRE_ERR4_SHIFT			11
+#define XDPDMA_EISR_DSCR_PRE_ERR4_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR4_MASK			0X0800
+
+#define XDPDMA_EISR_DSCR_PRE_ERR3_SHIFT			10
+#define XDPDMA_EISR_DSCR_PRE_ERR3_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR3_MASK			0X0400
+
+#define XDPDMA_EISR_DSCR_PRE_ERR2_SHIFT			9
+#define XDPDMA_EISR_DSCR_PRE_ERR2_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR2_MASK			0X0200
+
+#define XDPDMA_EISR_DSCR_PRE_ERR1_SHIFT			8
+#define XDPDMA_EISR_DSCR_PRE_ERR1_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR1_MASK			0X0100
+
+#define XDPDMA_EISR_DSCR_PRE_ERR0_SHIFT			7
+#define XDPDMA_EISR_DSCR_PRE_ERR0_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR0_MASK			0X80
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR5_SHIFT		6
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR5_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR5_MASK		0X40
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR4_SHIFT		5
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR4_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR4_MASK		0X20
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR3_SHIFT		4
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR3_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR3_MASK		0X10
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR2_SHIFT		3
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR2_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR2_MASK		0X8
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR1_SHIFT		2
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR1_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR1_MASK		0X4
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR0_SHIFT		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR0_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR0_MASK		0X2
+
+#define XDPDMA_EISR_INV_APB_SHIFT			0
+#define XDPDMA_EISR_INV_APB_WIDTH			1
+#define XDPDMA_EISR_INV_APB_MASK			0X1
+
+/**
+ * Register: XDPDMA_EIMR
+ */
+#define XDPDMA_EIMR					0X0018
+
+#define XDPDMA_EIMR_RD_CMD_FIFO_FULL_SHIFT		31
+#define XDPDMA_EIMR_RD_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_EIMR_RD_CMD_FIFO_FULL_MASK		0X80000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR5_SHIFT		30
+#define XDPDMA_EIMR_DSCR_DONE_ERR5_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR5_MASK			0X40000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR4_SHIFT		29
+#define XDPDMA_EIMR_DSCR_DONE_ERR4_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR4_MASK			0X20000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR3_SHIFT		28
+#define XDPDMA_EIMR_DSCR_DONE_ERR3_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR3_MASK			0X10000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR2_SHIFT		27
+#define XDPDMA_EIMR_DSCR_DONE_ERR2_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR2_MASK			0X08000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR1_SHIFT		26
+#define XDPDMA_EIMR_DSCR_DONE_ERR1_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR1_MASK			0X04000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR0_SHIFT		25
+#define XDPDMA_EIMR_DSCR_DONE_ERR0_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR0_MASK			0X02000000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR5_SHIFT		24
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR5_MASK		0X01000000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR4_SHIFT		23
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR4_MASK		0X800000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR3_SHIFT		22
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR3_MASK		0X400000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR2_SHIFT		21
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR2_MASK		0X200000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR1_SHIFT		20
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR1_MASK		0X100000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR0_SHIFT		19
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR0_MASK		0X80000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR5_SHIFT			18
+#define XDPDMA_EIMR_DSCR_CRC_ERR5_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR5_MASK			0X40000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR4_SHIFT			17
+#define XDPDMA_EIMR_DSCR_CRC_ERR4_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR4_MASK			0X20000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR3_SHIFT			16
+#define XDPDMA_EIMR_DSCR_CRC_ERR3_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR3_MASK			0X10000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR2_SHIFT			15
+#define XDPDMA_EIMR_DSCR_CRC_ERR2_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR2_MASK			0X8000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR1_SHIFT			14
+#define XDPDMA_EIMR_DSCR_CRC_ERR1_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR1_MASK			0X4000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR0_SHIFT			13
+#define XDPDMA_EIMR_DSCR_CRC_ERR0_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR0_MASK			0X2000
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR5_SHIFT			12
+#define XDPDMA_EIMR_DSCR_PRE_ERR5_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR5_MASK			0X1000
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR4_SHIFT			11
+#define XDPDMA_EIMR_DSCR_PRE_ERR4_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR4_MASK			0X0800
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR3_SHIFT			10
+#define XDPDMA_EIMR_DSCR_PRE_ERR3_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR3_MASK			0X0400
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR2_SHIFT			9
+#define XDPDMA_EIMR_DSCR_PRE_ERR2_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR2_MASK			0X0200
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR1_SHIFT			8
+#define XDPDMA_EIMR_DSCR_PRE_ERR1_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR1_MASK			0X0100
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR0_SHIFT			7
+#define XDPDMA_EIMR_DSCR_PRE_ERR0_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR0_MASK			0X80
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR5_SHIFT		6
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR5_MASK		0X40
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR4_SHIFT		5
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR4_MASK		0X20
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR3_SHIFT		4
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR3_MASK		0X10
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR2_SHIFT		3
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR2_MASK		0X8
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR1_SHIFT		2
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR1_MASK		0X4
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR0_SHIFT		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR0_MASK		0X2
+
+#define XDPDMA_EIMR_INV_APB_SHIFT			0
+#define XDPDMA_EIMR_INV_APB_WIDTH			1
+#define XDPDMA_EIMR_INV_APB_MASK			0X1
+
+/**
+ * Register: XDPDMA_EIEN
+ */
+#define XDPDMA_EIEN					0X001C
+
+#define XDPDMA_EIEN_RD_CMD_FIFO_FULL_SHIFT		31
+#define XDPDMA_EIEN_RD_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_EIEN_RD_CMD_FIFO_FULL_MASK		0X80000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR5_SHIFT		30
+#define XDPDMA_EIEN_DSCR_DONE_ERR5_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR5_MASK			0X40000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR4_SHIFT		29
+#define XDPDMA_EIEN_DSCR_DONE_ERR4_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR4_MASK			0X20000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR3_SHIFT		28
+#define XDPDMA_EIEN_DSCR_DONE_ERR3_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR3_MASK			0X10000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR2_SHIFT		27
+#define XDPDMA_EIEN_DSCR_DONE_ERR2_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR2_MASK			0X08000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR1_SHIFT		26
+#define XDPDMA_EIEN_DSCR_DONE_ERR1_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR1_MASK			0X04000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR0_SHIFT		25
+#define XDPDMA_EIEN_DSCR_DONE_ERR0_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR0_MASK			0X02000000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR5_SHIFT		24
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR5_MASK		0X01000000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR4_SHIFT		23
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR4_MASK		0X800000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR3_SHIFT		22
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR3_MASK		0X400000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR2_SHIFT		21
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR2_MASK		0X200000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR1_SHIFT		20
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR1_MASK		0X100000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR0_SHIFT		19
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR0_MASK		0X80000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR5_SHIFT			18
+#define XDPDMA_EIEN_DSCR_CRC_ERR5_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR5_MASK			0X40000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR4_SHIFT			17
+#define XDPDMA_EIEN_DSCR_CRC_ERR4_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR4_MASK			0X20000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR3_SHIFT			16
+#define XDPDMA_EIEN_DSCR_CRC_ERR3_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR3_MASK			0X10000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR2_SHIFT			15
+#define XDPDMA_EIEN_DSCR_CRC_ERR2_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR2_MASK			0X8000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR1_SHIFT			14
+#define XDPDMA_EIEN_DSCR_CRC_ERR1_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR1_MASK			0X4000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR0_SHIFT			13
+#define XDPDMA_EIEN_DSCR_CRC_ERR0_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR0_MASK			0X2000
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR5_SHIFT			12
+#define XDPDMA_EIEN_DSCR_PRE_ERR5_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR5_MASK			0X1000
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR4_SHIFT			11
+#define XDPDMA_EIEN_DSCR_PRE_ERR4_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR4_MASK			0X0800
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR3_SHIFT			10
+#define XDPDMA_EIEN_DSCR_PRE_ERR3_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR3_MASK			0X0400
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR2_SHIFT			9
+#define XDPDMA_EIEN_DSCR_PRE_ERR2_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR2_MASK			0X0200
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR1_SHIFT			8
+#define XDPDMA_EIEN_DSCR_PRE_ERR1_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR1_MASK			0X0100
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR0_SHIFT			7
+#define XDPDMA_EIEN_DSCR_PRE_ERR0_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR0_MASK			0X80
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR5_SHIFT		6
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR5_MASK		0X40
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR4_SHIFT		5
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR4_MASK		0X20
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR3_SHIFT		4
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR3_MASK		0X10
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR2_SHIFT		3
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR2_MASK		0X8
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR1_SHIFT		2
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR1_MASK		0X4
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR0_SHIFT		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR0_MASK		0X2
+
+#define XDPDMA_EIEN_INV_APB_SHIFT			0
+#define XDPDMA_EIEN_INV_APB_WIDTH			1
+#define XDPDMA_EIEN_INV_APB_MASK			0X1
+
+/**
+ * Register: XDPDMA_EIDS
+ */
+#define XDPDMA_EIDS					0X0020
+
+#define XDPDMA_EIDS_RD_CMD_FIFO_FULL_SHIFT		31
+#define XDPDMA_EIDS_RD_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_EIDS_RD_CMD_FIFO_FULL_MASK		0X80000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR5_SHIFT		30
+#define XDPDMA_EIDS_DSCR_DONE_ERR5_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR5_MASK			0X40000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR4_SHIFT		29
+#define XDPDMA_EIDS_DSCR_DONE_ERR4_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR4_MASK			0X20000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR3_SHIFT		28
+#define XDPDMA_EIDS_DSCR_DONE_ERR3_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR3_MASK			0X10000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR2_SHIFT		27
+#define XDPDMA_EIDS_DSCR_DONE_ERR2_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR2_MASK			0X08000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR1_SHIFT		26
+#define XDPDMA_EIDS_DSCR_DONE_ERR1_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR1_MASK			0X04000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR0_SHIFT		25
+#define XDPDMA_EIDS_DSCR_DONE_ERR0_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR0_MASK			0X02000000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR5_SHIFT		24
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR5_MASK		0X01000000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR4_SHIFT		23
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR4_MASK		0X800000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR3_SHIFT		22
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR3_MASK		0X400000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR2_SHIFT		21
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR2_MASK		0X200000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR1_SHIFT		20
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR1_MASK		0X100000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR0_SHIFT		19
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR0_MASK		0X80000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR5_SHIFT			18
+#define XDPDMA_EIDS_DSCR_CRC_ERR5_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR5_MASK			0X40000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR4_SHIFT			17
+#define XDPDMA_EIDS_DSCR_CRC_ERR4_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR4_MASK			0X20000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR3_SHIFT			16
+#define XDPDMA_EIDS_DSCR_CRC_ERR3_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR3_MASK			0X10000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR2_SHIFT			15
+#define XDPDMA_EIDS_DSCR_CRC_ERR2_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR2_MASK			0X8000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR1_SHIFT			14
+#define XDPDMA_EIDS_DSCR_CRC_ERR1_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR1_MASK			0X4000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR0_SHIFT			13
+#define XDPDMA_EIDS_DSCR_CRC_ERR0_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR0_MASK			0X2000
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR5_SHIFT			12
+#define XDPDMA_EIDS_DSCR_PRE_ERR5_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR5_MASK			0X1000
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR4_SHIFT			11
+#define XDPDMA_EIDS_DSCR_PRE_ERR4_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR4_MASK			0X0800
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR3_SHIFT			10
+#define XDPDMA_EIDS_DSCR_PRE_ERR3_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR3_MASK			0X0400
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR2_SHIFT			9
+#define XDPDMA_EIDS_DSCR_PRE_ERR2_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR2_MASK			0X0200
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR1_SHIFT			8
+#define XDPDMA_EIDS_DSCR_PRE_ERR1_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR1_MASK			0X0100
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR0_SHIFT			7
+#define XDPDMA_EIDS_DSCR_PRE_ERR0_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR0_MASK			0X80
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR5_SHIFT		6
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR5_MASK		0X40
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR4_SHIFT		5
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR4_MASK		0X20
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR3_SHIFT		4
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR3_MASK		0X10
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR2_SHIFT		3
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR2_MASK		0X8
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR1_SHIFT		2
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR1_MASK		0X4
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR0_SHIFT		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR0_MASK		0X2
+
+#define XDPDMA_EIDS_INV_APB_SHIFT			0
+#define XDPDMA_EIDS_INV_APB_WIDTH			1
+#define XDPDMA_EIDS_INV_APB_MASK			0X1
+
+/**
+ * Register: XDPDMA_CNTL
+ */
+#define XDPDMA_CNTL					0X0100
+
+/**
+ * Register: XDPDMA_GBL
+ */
+#define XDPDMA_GBL					0X0104
+
+#define XDPDMA_GBL_RTRG_CH5_SHIFT			11
+#define XDPDMA_GBL_RTRG_CH5_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH5_MASK			0X0800
+
+#define XDPDMA_GBL_RTRG_CH4_SHIFT			10
+#define XDPDMA_GBL_RTRG_CH4_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH4_MASK			0X0400
+
+#define XDPDMA_GBL_RTRG_CH3_SHIFT			9
+#define XDPDMA_GBL_RTRG_CH3_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH3_MASK			0X0200
+
+#define XDPDMA_GBL_RTRG_CH2_SHIFT			8
+#define XDPDMA_GBL_RTRG_CH2_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH2_MASK			0X0100
+
+#define XDPDMA_GBL_RTRG_CH1_SHIFT			7
+#define XDPDMA_GBL_RTRG_CH1_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH1_MASK			0X80
+
+#define XDPDMA_GBL_RTRG_CH0_SHIFT			6
+#define XDPDMA_GBL_RTRG_CH0_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH0_MASK			0X40
+
+#define XDPDMA_GBL_TRG_CH5_SHIFT			5
+#define XDPDMA_GBL_TRG_CH5_WIDTH			1
+#define XDPDMA_GBL_TRG_CH5_MASK				0X20
+
+#define XDPDMA_GBL_TRG_CH4_SHIFT			4
+#define XDPDMA_GBL_TRG_CH4_WIDTH			1
+#define XDPDMA_GBL_TRG_CH4_MASK				0X10
+
+#define XDPDMA_GBL_TRG_CH3_SHIFT			3
+#define XDPDMA_GBL_TRG_CH3_WIDTH			1
+#define XDPDMA_GBL_TRG_CH3_MASK				0X8
+
+#define XDPDMA_GBL_TRG_CH2_SHIFT			2
+#define XDPDMA_GBL_TRG_CH2_WIDTH			1
+#define XDPDMA_GBL_TRG_CH2_MASK				0X4
+
+#define XDPDMA_GBL_TRG_CH1_SHIFT			1
+#define XDPDMA_GBL_TRG_CH1_WIDTH			1
+#define XDPDMA_GBL_TRG_CH1_MASK				0X2
+
+#define XDPDMA_GBL_TRG_CH0_SHIFT			0
+#define XDPDMA_GBL_TRG_CH0_WIDTH			1
+#define XDPDMA_GBL_TRG_CH0_MASK				0X1
+
+/**
+ * Register: XDPDMA_CH0_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH0_DSCR_STRT_ADDRE			0X0200
+
+/**
+ * Register: XDPDMA_CH0_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH0_DSCR_STRT_ADDR			0X0204
+
+/**
+ * Register: XDPDMA_CH0_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH0_DSCR_NEXT_ADDRE			0X0208
+
+/**
+ * Register: XDPDMA_CH0_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH0_DSCR_NEXT_ADDR			0X020C
+
+/**
+ * Register: XDPDMA_CH0_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH0_PYLD_CUR_ADDRE			0X0210
+
+/**
+ * Register: XDPDMA_CH0_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH0_PYLD_CUR_ADDR			0X0214
+
+/**
+ * Register: XDPDMA_CH0_CNTL
+ */
+#define XDPDMA_CH0_CNTL					0X0218
+
+#define XDPDMA_CNTL_QOS_VIDEO				0x11
+
+/**
+ * Register: XDPDMA_CH0_STATUS
+ */
+#define XDPDMA_CH0_STATUS				0X021C
+
+/**
+ * Register: XDPDMA_CH0_VDO
+ */
+#define XDPDMA_CH0_VDO					0X0220
+
+/**
+ * Register: XDPDMA_CH0_PYLD_SZ
+ */
+#define XDPDMA_CH0_PYLD_SZ				0X0224
+
+/**
+ * Register: XDPDMA_CH0_DSCR_ID
+ */
+#define XDPDMA_CH0_DSCR_ID				0X0228
+
+/**
+ * Register: XDPDMA_CH1_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH1_DSCR_STRT_ADDRE			0X0300
+
+/**
+ * Register: XDPDMA_CH1_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH1_DSCR_STRT_ADDR			0X0304
+
+/**
+ * Register: XDPDMA_CH1_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH1_DSCR_NEXT_ADDRE			0X0308
+
+/**
+ * Register: XDPDMA_CH1_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH1_DSCR_NEXT_ADDR			0X030C
+
+/**
+ * Register: XDPDMA_CH1_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH1_PYLD_CUR_ADDRE			0X0310
+
+/**
+ * Register: XDPDMA_CH1_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH1_PYLD_CUR_ADDR			0X0314
+
+/**
+ * Register: XDPDMA_CH1_CNTL
+ */
+#define XDPDMA_CH1_CNTL					0X0318
+/**
+ * Register: XDPDMA_CH1_STATUS
+ */
+#define XDPDMA_CH1_STATUS				0X031C
+
+/**
+ * Register: XDPDMA_CH1_VDO
+ */
+#define XDPDMA_CH1_VDO					0X0320
+
+/**
+ * Register: XDPDMA_CH1_PYLD_SZ
+ */
+#define XDPDMA_CH1_PYLD_SZ				0X0324
+
+/**
+ * Register: XDPDMA_CH1_DSCR_ID
+ */
+#define XDPDMA_CH1_DSCR_ID				0X0328
+
+/**
+ * Register: XDPDMA_CH2_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH2_DSCR_STRT_ADDRE			0X0400
+
+/**
+ * Register: XDPDMA_CH2_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH2_DSCR_STRT_ADDR			0X0404
+
+/**
+ * Register: XDPDMA_CH2_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH2_DSCR_NEXT_ADDRE			0X0408
+
+/**
+ * Register: XDPDMA_CH2_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH2_DSCR_NEXT_ADDR			0X040C
+
+/**
+ * Register: XDPDMA_CH2_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH2_PYLD_CUR_ADDRE			0X0410
+
+/**
+ * Register: XDPDMA_CH2_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH2_PYLD_CUR_ADDR			0X0414
+
+/**
+ * Register: XDPDMA_CH2_CNTL
+ */
+#define XDPDMA_CH2_CNTL					0X0418
+
+/**
+ * Register: XDPDMA_CH2_STATUS
+ */
+#define XDPDMA_CH2_STATUS				0X041C
+
+/**
+ * Register: XDPDMA_CH2_VDO
+ */
+#define XDPDMA_CH2_VDO					0X0420
+
+/**
+ * Register: XDPDMA_CH2_PYLD_SZ
+ */
+#define XDPDMA_CH2_PYLD_SZ				0X0424
+
+/**
+ * Register: XDPDMA_CH2_DSCR_ID
+ */
+#define XDPDMA_CH2_DSCR_ID				0X0428
+
+/**
+ * Register: XDPDMA_CH3_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH3_DSCR_STRT_ADDRE			0X0500
+
+/**
+ * Register: XDPDMA_CH3_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH3_DSCR_STRT_ADDR			0X0504
+
+/**
+ * Register: XDPDMA_CH3_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH3_DSCR_NEXT_ADDRE			0X0508
+
+/**
+ * Register: XDPDMA_CH3_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH3_DSCR_NEXT_ADDR			0X050C
+
+/**
+ * Register: XDPDMA_CH3_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH3_PYLD_CUR_ADDRE			0X0510
+
+/**
+ * Register: XDPDMA_CH3_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH3_PYLD_CUR_ADDR			0X0514
+
+/**
+ * Register: XDPDMA_CH3_CNTL
+ */
+#define XDPDMA_CH3_CNTL					0X0518
+/**
+ * Register: XDPDMA_CH3_STATUS
+ */
+#define XDPDMA_CH3_STATUS				0X051C
+
+/**
+ * Register: XDPDMA_CH3_VDO
+ */
+#define XDPDMA_CH3_VDO					0X0520
+
+/**
+ * Register: XDPDMA_CH3_PYLD_SZ
+ */
+#define XDPDMA_CH3_PYLD_SZ				0X0524
+
+/**
+ * Register: XDPDMA_CH3_DSCR_ID
+ */
+#define XDPDMA_CH3_DSCR_ID				0X0528
+
+/**
+ * Register: XDPDMA_CH4_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH4_DSCR_STRT_ADDRE			0X0600
+
+/**
+ * Register: XDPDMA_CH4_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH4_DSCR_STRT_ADDR			0X0604
+/**
+ * Register: XDPDMA_CH4_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH4_DSCR_NEXT_ADDRE			0X0608
+
+/**
+ * Register: XDPDMA_CH4_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH4_DSCR_NEXT_ADDR			0X060C
+
+/**
+ * Register: XDPDMA_CH4_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH4_PYLD_CUR_ADDRE			0X0610
+
+/**
+ * Register: XDPDMA_CH4_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH4_PYLD_CUR_ADDR			0X0614
+
+/**
+ * Register: XDPDMA_CH4_CNTL
+ */
+#define XDPDMA_CH4_CNTL					0X0618
+
+/**
+ * Register: XDPDMA_CH4_STATUS
+ */
+#define XDPDMA_CH4_STATUS				0X061C
+
+/**
+ * Register: XDPDMA_CH4_VDO
+ */
+#define XDPDMA_CH4_VDO					0X0620
+
+/**
+ * Register: XDPDMA_CH4_PYLD_SZ
+ */
+#define XDPDMA_CH4_PYLD_SZ				0X0624
+
+/**
+ * Register: XDPDMA_CH4_DSCR_ID
+ */
+#define XDPDMA_CH4_DSCR_ID				0X0628
+
+/**
+ * Register: XDPDMA_CH5_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH5_DSCR_STRT_ADDRE			0X0700
+
+/**
+ * Register: XDPDMA_CH5_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH5_DSCR_STRT_ADDR			0X0704
+
+/**
+ * Register: XDPDMA_CH5_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH5_DSCR_NEXT_ADDRE			0X0708
+
+/**
+ * Register: XDPDMA_CH5_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH5_DSCR_NEXT_ADDR			0X070C
+
+/**
+ * Register: XDPDMA_CH5_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH5_PYLD_CUR_ADDRE			0X0710
+
+/**
+ * Register: XDPDMA_CH5_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH5_PYLD_CUR_ADDR			0X0714
+
+/**
+ * Register: XDPDMA_CH5_CNTL
+ */
+#define XDPDMA_CH5_CNTL					0X0718
+
+/**
+ * Register: XDPDMA_CH5_STATUS
+ */
+#define XDPDMA_CH5_STATUS				0X071C
+
+/**
+ * Register: XDPDMA_CH5_VDO
+ */
+#define XDPDMA_CH5_VDO					0X0720
+
+/**
+ * Register: XDPDMA_CH5_PYLD_SZ
+ */
+#define XDPDMA_CH5_PYLD_SZ				0X0724
+
+/**
+ * Register: XDPDMA_CH5_DSCR_ID
+ */
+#define XDPDMA_CH5_DSCR_ID				0X0728
+
+
+#define XDPDMA_CH_DSCR_STRT_ADDRE_MSB_SHIFT		0
+#define XDPDMA_CH_DSCR_STRT_ADDRE_MSB_WIDTH		16
+#define XDPDMA_CH_DSCR_STRT_ADDRE_MSB_MASK		0XFFFF
+
+
+#define XDPDMA_CH_DSCR_STRT_ADDR_LSB_SHIFT		0
+#define XDPDMA_CH_DSCR_STRT_ADDR_LSB_WIDTH		32
+#define XDPDMA_CH_DSCR_STRT_ADDR_LSB_MASK		0XFFFFFFFF
+
+
+#define XDPDMA_CH_DSCR_NEXT_ADDRE_MSB_SHIFT		0
+#define XDPDMA_CH_DSCR_NEXT_ADDRE_MSB_WIDTH		16
+#define XDPDMA_CH_DSCR_NEXT_ADDRE_MSB_MASK		0XFFFF
+
+
+#define XDPDMA_CH_DSCR_NEXT_ADDR_LSB_SHIFT		0
+#define XDPDMA_CH_DSCR_NEXT_ADDR_LSB_WIDTH		32
+#define XDPDMA_CH_DSCR_NEXT_ADDR_LSB_MASK		0XFFFFFFFF
+
+
+#define XDPDMA_CH_PYLD_CUR_ADDRE_MSB_SHIFT		0
+#define XDPDMA_CH_PYLD_CUR_ADDRE_MSB_WIDTH		16
+#define XDPDMA_CH_PYLD_CUR_ADDRE_MSB_MASK		0XFFFF
+
+#define XDPDMA_CH_PYLD_CUR_ADDR_LSB_SHIFT		0
+#define XDPDMA_CH_PYLD_CUR_ADDR_LSB_WIDTH		32
+#define XDPDMA_CH_PYLD_CUR_ADDR_LSB_MASK		0XFFFFFFFF
+
+#define XDPDMA_CH_CNTL_DSCR_AXCACHE_SHIFT		16
+#define XDPDMA_CH_CNTL_DSCR_AXCACHE_WIDTH		4
+#define XDPDMA_CH_CNTL_DSCR_AXCACHE_MASK		0XF0000
+
+#define XDPDMA_CH_CNTL_DSCR_AXPROT_SHIFT		14
+#define XDPDMA_CH_CNTL_DSCR_AXPROT_WIDTH		2
+#define XDPDMA_CH_CNTL_DSCR_AXPROT_MASK			0XC000
+
+#define XDPDMA_CH_CNTL_QOS_DATA_RD_SHIFT		10
+#define XDPDMA_CH_CNTL_QOS_DATA_RD_WIDTH		4
+#define XDPDMA_CH_CNTL_QOS_DATA_RD_MASK			0X3C00
+
+#define XDPDMA_CH_CNTL_QOS_DSCR_RD_SHIFT		6
+#define XDPDMA_CH_CNTL_QOS_DSCR_RD_WIDTH		4
+#define XDPDMA_CH_CNTL_QOS_DSCR_RD_MASK			0X03C0
+
+#define XDPDMA_CH_CNTL_QOS_DSCR_WR_SHIFT		2
+#define XDPDMA_CH_CNTL_QOS_DSCR_WR_WIDTH		4
+#define XDPDMA_CH_CNTL_QOS_DSCR_WR_MASK			0X3C
+
+#define XDPDMA_CH_CNTL_PAUSE_SHIFT			1
+#define XDPDMA_CH_CNTL_PAUSE_WIDTH			1
+#define XDPDMA_CH_CNTL_PAUSE_MASK			0X2
+
+#define XDPDMA_CH_CNTL_EN_SHIFT				0
+#define XDPDMA_CH_CNTL_EN_WIDTH				1
+#define XDPDMA_CH_CNTL_EN_MASK				0X1
+
+
+#define XDPDMA_CH_STATUS_OTRAN_CNT_SHIFT		21
+#define XDPDMA_CH_STATUS_OTRAN_CNT_WIDTH		4
+#define XDPDMA_CH_STATUS_OTRAN_CNT_MASK			0X01E00000
+
+#define XDPDMA_CH_STATUS_PREAMBLE_SHIFT			13
+#define XDPDMA_CH_STATUS_PREAMBLE_WIDTH			8
+#define XDPDMA_CH_STATUS_PREAMBLE_MASK			0X1FE000
+
+#define XDPDMA_CH_STATUS_EN_DSCR_INTR_SHIFT		12
+#define XDPDMA_CH_STATUS_EN_DSCR_INTR_WIDTH		1
+#define XDPDMA_CH_STATUS_EN_DSCR_INTR_MASK		0X1000
+
+#define XDPDMA_CH_STATUS_EN_DSCR_UP_SHIFT		11
+#define XDPDMA_CH_STATUS_EN_DSCR_UP_WIDTH		1
+#define XDPDMA_CH_STATUS_EN_DSCR_UP_MASK		0X0800
+
+#define XDPDMA_CH_STATUS_DSCR_DONE_SHIFT		10
+#define XDPDMA_CH_STATUS_DSCR_DONE_WIDTH		1
+#define XDPDMA_CH_STATUS_DSCR_DONE_MASK			0X0400
+
+#define XDPDMA_CH_STATUS_IGNR_DONE_SHIFT		9
+#define XDPDMA_CH_STATUS_IGNR_DONE_WIDTH		1
+#define XDPDMA_CH_STATUS_IGNR_DONE_MASK			0X0200
+
+#define XDPDMA_CH_STATUS_LDSCR_FRAME_SHIFT		8
+#define XDPDMA_CH_STATUS_LDSCR_FRAME_WIDTH		1
+#define XDPDMA_CH_STATUS_LDSCR_FRAME_MASK		0X0100
+
+#define XDPDMA_CH_STATUS_LAST_DSCR_SHIFT		7
+#define XDPDMA_CH_STATUS_LAST_DSCR_WIDTH		1
+#define XDPDMA_CH_STATUS_LAST_DSCR_MASK			0X80
+
+#define XDPDMA_CH_STATUS_EN_CRC_SHIFT			6
+#define XDPDMA_CH_STATUS_EN_CRC_WIDTH			1
+#define XDPDMA_CH_STATUS_EN_CRC_MASK			0X40
+
+#define XDPDMA_CH_STATUS_MODE_SHIFT			5
+#define XDPDMA_CH_STATUS_MODE_WIDTH			1
+#define XDPDMA_CH_STATUS_MODE_MASK			0X20
+
+#define XDPDMA_CH_STATUS_BURST_TYPE_SHIFT		4
+#define XDPDMA_CH_STATUS_BURST_TYPE_WIDTH		1
+#define XDPDMA_CH_STATUS_BURST_TYPE_MASK		0X10
+
+#define XDPDMA_CH_STATUS_BURST_LEN_SHIFT		0
+#define XDPDMA_CH_STATUS_BURST_LEN_WIDTH		4
+#define XDPDMA_CH_STATUS_BURST_LEN_MASK			0XF
+
+
+#define XDPDMA_CH_VDO_LINE_LENGTH_SHIFT			14
+#define XDPDMA_CH_VDO_LINE_LENGTH_WIDTH			18
+#define XDPDMA_CH_VDO_LINE_LENGTH_MASK			0XFFFFC000
+
+#define XDPDMA_CH_VDO_STRIDE_SHIFT			0
+#define XDPDMA_CH_VDO_STRIDE_WIDTH			14
+#define XDPDMA_CH_VDO_STRIDE_MASK			0X3FFF
+
+#define XDPDMA_CH_PYLD_SZ_BYTE_SHIFT			0
+#define XDPDMA_CH_PYLD_SZ_BYTE_WIDTH			32
+#define XDPDMA_CH_PYLD_SZ_BYTE_MASK			0XFFFFFFFF
+
+#define XDPDMA_CH_DSCR_ID_VAL_SHIFT			0
+#define XDPDMA_CH_DSCR_ID_VAL_WIDTH			16
+#define XDPDMA_CH_DSCR_ID_VAL_MASK			0XFFFF
+
+/**
+ * Register: XDPDMA_ECO
+ */
+#define XDPDMA_ECO					0X0FFC
+
+#define XDPDMA_ECO_VAL_SHIFT				0
+#define XDPDMA_ECO_VAL_WIDTH				32
+#define XDPDMA_ECO_VAL_MASK				0XFFFFFFFF
+
+/**
+ * DPDMA descriptor
+ */
+
+#define XDPDMA_DESCRIPTOR_CONTROL_PREAMBLE_SHIFT		0
+#define XDPDMA_DESCRIPTOR_CONTROL_PREAMBLE_WIDTH		8
+#define XDPDMA_DESCRIPTOR_CONTROL_PREAMBLE_MASK			0XFF
+
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_COMP_INTR_SHIFT		8
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_COMP_INTR_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_COMP_INTR_MASK		0X0100
+
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_DESC_UPDATE_SHIFT		9
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_DESC_UPDATE_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_DESC_UPDATE_MASK		0X0200
+
+#define XDPDMA_DESCRIPTOR_CONTROL_IGNORE_DONE_SHIFT		10
+#define XDPDMA_DESCRIPTOR_CONTROL_IGNORE_DONE_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_IGNORE_DONE_MASK		0X0400
+
+#define XDPDMA_DESCRIPTOR_CONTROL_AXI_BURST_TYPE_SHIFT		11
+#define XDPDMA_DESCRIPTOR_CONTROL_AXI_BURST_TYPE_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_AXI_BURST_TYPE_MASK		0X0800
+
+#define XDPDMA_DESCRIPTOR_CONTROL_AXACACHE_SHIFT		12
+#define XDPDMA_DESCRIPTOR_CONTROL_AXACACHE_WIDTH		4
+#define XDPDMA_DESCRIPTOR_CONTROL_AXACACHE_MASK			0XF000
+
+#define XDPDMA_DESCRIPTOR_CONTROL_AXPROT_SHIFT			16
+#define XDPDMA_DESCRIPTOR_CONTROL_AXPROT_WIDTH			2
+#define XDPDMA_DESCRIPTOR_CONTROL_AXPROT_MASK			0X30000
+
+#define XDPDMA_DESCRIPTOR_CONTROL_MODE_SHIFT			18
+#define XDPDMA_DESCRIPTOR_CONTROL_MODE_WIDTH			1
+#define XDPDMA_DESCRIPTOR_CONTROL_MODE_MASK			0X40000
+
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_SHIFT		19
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_MASK		0X80000
+
+#define XDPDMA_DESCRIPTOR_CONTROL_ENABLE_CRC_SHIFT		20
+#define XDPDMA_DESCRIPTOR_CONTROL_ENABLE_CRC_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_ENABLE_CRC_MASK		0x00100000
+
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_FRAME_SHIFT		21
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_FRAME_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_FRAME_MASK		0X200000
+
+#define XDPDMA_DESCRIPTOR_DSCR_ID_SHIFT				0
+#define XDPDMA_DESCRIPTOR_DSCR_ID_WIDTH				16
+#define XDPDMA_DESCRIPTOR_DSCR_ID_MASK				0XFFFF
+
+#define XDPDMA_DESCRIPTOR_XFER_SIZE_SHIFT			0
+#define XDPDMA_DESCRIPTOR_XFER_SIZE_WIDTH			32
+#define XDPDMA_DESCRIPTOR_XFER_SIZE_MASK			0x0000FFFF
+
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_HZ_RES_SHIFT		0
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_HZ_RES_WIDTH		18
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_HZ_RES_MASK			0X3FFFF
+
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_STRIDE_SHIFT		18
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_STRIDE_WIDTH		14
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_STRIDE_MASK			0XFFFC0000
+
+#define XDPDMA_DESCRIPTOR_TS_LSB_SHIFT				0
+#define XDPDMA_DESCRIPTOR_TS_LSB_WIDTH				32
+#define XDPDMA_DESCRIPTOR_TS_LSB_MASK				0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_TS_MSB_SHIFT				0
+#define XDPDMA_DESCRIPTOR_TS_MSB_WIDTH				32
+#define XDPDMA_DESCRIPTOR_TS_MSB_MASK				0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_TS_MSB_TS_SHIFT			0
+#define XDPDMA_DESCRIPTOR_TS_MSB_TS_WIDTH			9
+#define XDPDMA_DESCRIPTOR_TS_MSB_TS_MASK			0X01FF
+
+#define XDPDMA_DESCRIPTOR_TS_MSB_STATUS_SHIFT			31
+#define XDPDMA_DESCRIPTOR_TS_MSB_STATUS_WIDTH			1
+#define XDPDMA_DESCRIPTOR_TS_MSB_STATUS_MASK			0X80000000
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_DSC_NXT_SHIFT		0
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_DSC_NXT_WIDTH		16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_DSC_NXT_MASK			0XFFFF
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_SRC_ADDR_EXT_SHIFT		16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_SRC_ADDR_EXT_WIDTH		16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_SRC_ADDR_EXT_MASK		0XFFFF0000
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_2_SHIFT			0
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_2_WIDTH			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_2_MASK			0XFFFF
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_3_SHIFT			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_3_WIDTH			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_3_MASK			0xFFFF0000
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_4_SHIFT			0
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_4_WIDTH			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_4_MASK			0XFFFF
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_5_SHIFT			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_5_WIDTH			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_5_MASK			0XFFFF0000
+
+#define XDPDMA_DESCRIPTOR_NEXT_DESR_SHIFT			0
+#define XDPDMA_DESCRIPTOR_NEXT_DESR_WIDTH			32
+#define XDPDMA_DESCRIPTOR_NEXT_DESR_MASK			0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_SRC_ADDR_SHIFT			0
+#define XDPDMA_DESCRIPTOR_SRC_ADDR_WIDTH			32
+#define XDPDMA_DESCRIPTOR_SRC_ADDR_MASK				0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_SRC_ADDR2_SHIFT			0
+#define XDPDMA_DESCRIPTOR_SRC_ADDR2_WIDTH			32
+#define XDPDMA_DESCRIPTOR_SRC_ADDR2_MASK			0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_SRC_ADDR3_SHIFT			0
+#define XDPDMA_DESCRIPTOR_SRC_ADDR3_WIDTH			32
+#define XDPDMA_DESCRIPTOR_SRC_ADDR3_MASK			0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_SRC_ADDR4_SHIFT			0
+#define XDPDMA_DESCRIPTOR_SRC_ADDR4_WIDTH			32
+#define XDPDMA_DESCRIPTOR_SRC_ADDR4_MASK			0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_SRC_ADDR5_SHIFT			0
+#define XDPDMA_DESCRIPTOR_SRC_ADDR5_WIDTH			32
+#define XDPDMA_DESCRIPTOR_SRC_ADDR5_MASK			0XFFFFFFFF
+
+#define XDPDMA_TRIGGER_EN					1
+#define XDPDMA_RETRIGGER_EN					2
+#define XDPDMA_TRIGGER_DONE					0
+#define XDPDMA_RETRIGGER_DONE					0
+/* @} */
+
+/******************* Macros (Inline Functions Definitions ********************/
+
+/** @name Register access macro definitions.
+  * @{
+  */
+#define XDpDma_In32 Xil_In32
+#define XDpDma_Out32 Xil_Out32
+/* @} */
+
+/******************************************************************************/
+/**
+ * This is a low-level function that reads from the specified register.
+ *
+ * @param	BaseAddress is the base address of the device.
+ * @param	RegOffset is the register offset to be read from.
+ *
+ * @return	The 32-bit value of the specified register.
+ *
+ * @note	C-style signature:
+ *		u32 XDpDma_ReadReg(u32 BaseAddress, u32 RegOffset
+ *
+*******************************************************************************/
+#define XDpDma_ReadReg(BaseAddress, RegOffset) \
+					XDpDma_In32((BaseAddress) + (RegOffset))
+
+/******************************************************************************/
+/**
+ * This is a low-level function that writes to the specified register.
+ *
+ * @param	BaseAddress is the base address of the device.
+ * @param	RegOffset is the register offset to write to.
+ * @param	Data is the 32-bit data to write to the specified register.
+ *
+ * @return	None.
+ *
+ * @note	C-style signature:
+ *		void XDpDma_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+ *
+*******************************************************************************/
+#define XDpDma_WriteReg(BaseAddress, RegOffset, Data) \
+				XDpDma_Out32((BaseAddress) + (RegOffset), (Data))
+
+
+/******************************************************************************/
+/**
+ * This is a low-level function that writes to the specified register.
+ *
+ * @param	BaseAddress is the base address of the device.
+ * @param	RegOffset is the register offset to write to.
+ * @param	Data is the 32-bit data to write to the specified register.
+ * @param	Mask is the 32-bit field to which data is to be written
+ *
+ * @return	None.
+ *
+ * @note	C-style signature:
+ *		void XDpDma_ReadModifyWrite(u32 BaseAddress,
+ *							u32 RegOffset, u32 Data)
+ *
+*******************************************************************************/
+#define XDpDma_ReadModifyWrite(BaseAddress, RegOffset, Data, Mask) \
+				XDpDma_WriteReg((BaseAddress), (RegOffset), \
+				((XDpDma_ReadReg(BaseAddress, RegOffset) &  \
+				 ~(Mask)) | Data))
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* _XDPDMAHW_H_ */
diff --git a/src/Xilinx/include/xemacps.h b/src/Xilinx/include/xemacps.h
new file mode 100644
index 0000000..6d4b15b
--- /dev/null
+++ b/src/Xilinx/include/xemacps.h
@@ -0,0 +1,809 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+ *
+ * @file xemacps.h
+* @addtogroup emacps_v3_7
+* @{
+* @details
+ *
+ * The Xilinx Embedded Processor Block Ethernet driver.
+ *
+ * For a full description of XEMACPS features, please see the hardware spec.
+ * This driver supports the following features:
+ *   - Memory mapped access to host interface registers
+ *   - Statistics counter registers for RMON/MIB
+ *   - API for interrupt driven frame transfers for hardware configured DMA
+ *   - Virtual memory support
+ *   - Unicast, broadcast, and multicast receive address filtering
+ *   - Full and half duplex operation
+ *   - Automatic PAD & FCS insertion and stripping
+ *   - Flow control
+ *   - Support up to four 48bit addresses
+ *   - Address checking for four specific 48bit addresses
+ *   - VLAN frame support
+ *   - Pause frame support
+ *   - Large frame support up to 1536 bytes
+ *   - Checksum offload
+ *
+ * Driver Description
+ *
+ * The device driver enables higher layer software (e.g., an application) to
+ * communicate to the XEmacPs. The driver handles transmission and reception
+ * of Ethernet frames, as well as configuration and control. No pre or post
+ * processing of frame data is performed. The driver does not validate the
+ * contents of an incoming frame in addition to what has already occurred in
+ * hardware.
+ * A single device driver can support multiple devices even when those devices
+ * have significantly different configurations.
+ *
+ * Initialization & Configuration
+ *
+ * The XEmacPs_Config structure is used by the driver to configure itself.
+ * This configuration structure is typically created by the tool-chain based
+ * on hardware build properties.
+ *
+ * The driver instance can be initialized in
+ *
+ *   - XEmacPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddress):  Uses a
+ *     configuration structure provided by the caller. If running in a system
+ *     with address translation, the provided virtual memory base address
+ *     replaces the physical address present in the configuration structure.
+ *
+ * The device supports DMA only as current development plan. No FIFO mode is
+ * supported. The driver expects to start the DMA channels and expects that
+ * the user has set up the buffer descriptor lists.
+ *
+ * Interrupts and Asynchronous Callbacks
+ *
+ * The driver has no dependencies on the interrupt controller. When an
+ * interrupt occurs, the handler will perform a small amount of
+ * housekeeping work, determine the source of the interrupt, and call the
+ * appropriate callback function. All callbacks are registered by the user
+ * level application.
+ *
+ * Virtual Memory
+ *
+ * All virtual to physical memory mappings must occur prior to accessing the
+ * driver API.
+ *
+ * For DMA transactions, user buffers supplied to the driver must be in terms
+ * of their physical address.
+ *
+ * DMA
+ *
+ * The DMA engine uses buffer descriptors (BDs) to describe Ethernet frames.
+ * These BDs are typically chained together into a list the hardware follows
+ * when transferring data in and out of the packet buffers. Each BD describes
+ * a memory region containing either a full or partial Ethernet packet.
+ *
+ * Interrupt coalescing is not suppoted from this built-in DMA engine.
+ *
+ * This API requires the user to understand how the DMA operates. The
+ * following paragraphs provide some explanation, but the user is encouraged
+ * to read documentation in xemacps_bdring.h as well as study example code
+ * that accompanies this driver.
+ *
+ * The API is designed to get BDs to and from the DMA engine in the most
+ * efficient means possible. The first step is to establish a  memory region
+ * to contain all BDs for a specific channel. This is done with
+ * XEmacPs_BdRingCreate(). This function sets up a BD ring that hardware will
+ * follow as BDs are processed. The ring will consist of a user defined number
+ * of BDs which will all be partially initialized. For example on the transmit
+ * channel, the driver will initialize all BDs' so that they are configured
+ * for transmit. The more fields that can be permanently setup at
+ * initialization, then the fewer accesses will be needed to each BD while
+ * the DMA engine is in operation resulting in better throughput and CPU
+ * utilization. The best case initialization would require the user to set
+ * only a frame buffer address and length prior to submitting the BD to the
+ * engine.
+ *
+ * BDs move through the engine with the help of functions
+ * XEmacPs_BdRingAlloc(), XEmacPs_BdRingToHw(), XEmacPs_BdRingFromHw(),
+ * and XEmacPs_BdRingFree().
+ * All these functions handle BDs that are in place. That is, there are no
+ * copies of BDs kept anywhere and any BD the user interacts with is an actual
+ * BD from the same ring hardware accesses.
+ *
+ * BDs in the ring go through a series of states as follows:
+ *   1. Idle. The driver controls BDs in this state.
+ *   2. The user has data to transfer. XEmacPs_BdRingAlloc() is called to
+ *      reserve BD(s). Once allocated, the user may setup the BD(s) with
+ *      frame buffer address, length, and other attributes. The user controls
+ *      BDs in this state.
+ *   3. The user submits BDs to the DMA engine with XEmacPs_BdRingToHw. BDs
+ *      in this state are either waiting to be processed by hardware, are in
+ *      process, or have been processed. The DMA engine controls BDs in this
+ *      state.
+ *   4. Processed BDs are retrieved with XEmacEpv_BdRingFromHw() by the
+ *      user. Once retrieved, the user can examine each BD for the outcome of
+ *      the DMA transfer. The user controls BDs in this state. After examining
+ *      the BDs the user calls XEmacPs_BdRingFree() which places the BDs back
+ *      into state 1.
+ *
+ * Each of the four BD accessor functions operate on a set of BDs. A set is
+ * defined as a segment of the BD ring consisting of one or more BDs. The user
+ * views the set as a pointer to the first BD along with the number of BDs for
+ * that set. The set can be navigated by using macros XEmacPs_BdNext(). The
+ * user must exercise extreme caution when changing BDs in a set as there is
+ * nothing to prevent doing a mBdNext past the end of the set and modifying a
+ * BD out of bounds.
+ *
+ * XEmacPs_BdRingAlloc() + XEmacPs_BdRingToHw(), as well as
+ * XEmacPs_BdRingFromHw() + XEmacPs_BdRingFree() are designed to be used in
+ * tandem. The same BD set retrieved with BdRingAlloc should be the same one
+ * provided to hardware with BdRingToHw. Same goes with BdRingFromHw and
+ * BdRIngFree.
+ *
+ * Alignment & Data Cache Restrictions
+ *
+ * Due to the design of the hardware, all RX buffers, BDs need to be 4-byte
+ * aligned. Please reference xemacps_bd.h for cache related macros.
+ *
+ * DMA Tx:
+ *
+ *   - If frame buffers exist in cached memory, then they must be flushed
+ *     prior to committing them to hardware.
+ *
+ * DMA Rx:
+ *
+ *   - If frame buffers exist in cached memory, then the cache must be
+ *     invalidated for the memory region containing the frame prior to data
+ *     access
+ *
+ * Both cache invalidate/flush are taken care of in driver code.
+ *
+ * Buffer Copying
+ *
+ * The driver is designed for a zero-copy buffer scheme. That is, the driver
+ * will not copy buffers. This avoids potential throughput bottlenecks within
+ * the driver. If byte copying is required, then the transfer will take longer
+ * to complete.
+ *
+ * Checksum Offloading
+ *
+ * The Embedded Processor Block Ethernet can be configured to perform IP, TCP
+ * and UDP checksum offloading in both receive and transmit directions.
+ *
+ * IP packets contain a 16-bit checksum field, which is the 16-bit 1s
+ * complement of the 1s complement sum of all 16-bit words in the header.
+ * TCP and UDP packets contain a 16-bit checksum field, which is the 16-bit
+ * 1s complement of the 1s complement sum of all 16-bit words in the header,
+ * the data and a conceptual pseudo header.
+ *
+ * To calculate these checksums in software requires each byte of the packet
+ * to be read. For TCP and UDP this can use a large amount of processing power.
+ * Offloading the checksum calculation to hardware can result in significant
+ * performance improvements.
+ *
+ * The transmit checksum offload is only available to use DMA in packet buffer
+ * mode. This is because the complete frame to be transmitted must be read
+ * into the packet buffer memory before the checksum can be calculated and
+ * written to the header at the beginning of the frame.
+ *
+ * For IP, TCP or UDP receive checksum offload to be useful, the operating
+ * system containing the protocol stack must be aware that this offload is
+ * available so that it can make use of the fact that the hardware has verified
+ * the checksum.
+ *
+ * When receive checksum offloading is enabled in the hardware, the IP header
+ * checksum is checked, where the packet meets the following criteria:
+ *
+ * 1. If present, the VLAN header must be four octets long and the CFI bit
+ *    must not be set.
+ * 2. Encapsulation must be RFC 894 Ethernet Type Encoding or RFC 1042 SNAP
+ *    encoding.
+ * 3. IP v4 packet.
+ * 4. IP header is of a valid length.
+ * 5. Good IP header checksum.
+ * 6. No IP fragmentation.
+ * 7. TCP or UDP packet.
+ *
+ * When an IP, TCP or UDP frame is received, the receive buffer descriptor
+ * gives an indication if the hardware was able to verify the checksums.
+ * There is also an indication if the frame had SNAP encapsulation. These
+ * indication bits will replace the type ID match indication bits when the
+ * receive checksum offload is enabled.
+ *
+ * If any of the checksums are verified incorrect by the hardware, the packet
+ * is discarded and the appropriate statistics counter incremented.
+ *
+ * PHY Interfaces
+ *
+ * RGMII 1.3 is the only interface supported.
+ *
+ * Asserts
+ *
+ * Asserts are used within all Xilinx drivers to enforce constraints on
+ * parameters. Asserts can be turned off on a system-wide basis by defining,
+ * at compile time, the NDEBUG identifier. By default, asserts are turned on
+ * and it is recommended that users leave asserts on during development. For
+ * deployment use -DNDEBUG compiler switch to remove assert code.
+ *
+ * @note
+ *
+ * Xilinx drivers are typically composed of two parts, one is the driver
+ * and the other is the adapter.  The driver is independent of OS and processor
+ * and is intended to be highly portable.  The adapter is OS-specific and
+ * facilitates communication between the driver and an OS.
+ * This driver is intended to be RTOS and processor independent. Any needs for
+ * dynamic memory management, threads or thread mutual exclusion, or cache
+ * control must be satisfied bythe layer above this driver.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -------------------------------------------------------
+ * 1.00a wsy  01/10/10 First release
+ * 1.00a asa  11/21/11 The function XEmacPs_BdRingFromHwTx in file
+ *		       xemacps_bdring.c is modified. Earlier it was checking for
+ *		       "BdLimit"(passed argument) number of BDs for finding out
+ *		       which BDs are successfully processed. Now one more check
+ *		       is added. It looks for BDs till the current BD pointer
+ *		       reaches HwTail. By doing this processing time is saved.
+ * 1.00a asa  01/24/12 The function XEmacPs_BdRingFromHwTx in file
+ *		       xemacps_bdring.c is modified. Now start of packet is
+ *		       searched for returning the number of BDs processed.
+ * 1.02a asa  11/05/12 Added a new API for deleting an entry from the HASH
+ *		       registers. Added a new API to set the bust length.
+ *		       Added some new hash-defines.
+ * 1.03a asa  01/23/12 Fix for CR #692702 which updates error handling for
+ *		       Rx errors. Under heavy Rx traffic, there will be a large
+ *		       number of errors related to receive buffer not available.
+ *		       Because of a HW bug (SI #692601), under such heavy errors,
+ *		       the Rx data path can become unresponsive. To reduce the
+ *		       probabilities for hitting this HW bug, the SW writes to
+ *		       bit 18 to flush a packet from Rx DPRAM immediately. The
+ *		       changes for it are done in the function
+ *		       XEmacPs_IntrHandler.
+ * 1.05a asa  09/23/13 Cache operations on BDs are not required and hence
+ *		       removed. It is expected that all BDs are allocated in
+ *		       from uncached area.
+ * 1.06a asa  11/02/13 Changed the value for XEMACPS_RXBUF_LEN_MASK from 0x3fff
+ *				to 0x1fff. This fixes the CR#744902.
+ *			  Made changes in example file xemacps_example.h to fix compilation
+ *			  issues with iarcc compiler.
+ * 2.0   adk  10/12/13 Updated as per the New Tcl API's
+ * 2.1   adk  11/08/14 Fixed the CR#811288. Changes are made in the driver tcl file.
+ * 2.1   bss  09/08/14 Modified driver tcl to fix CR#820349 to export phy
+ *		       address in xparameters.h when GMII to RGMII converter
+ *		       is present in hw.
+ * 2.1   srt  07/15/14 Add support for Zynq Ultrascale Mp GEM specification and 64-bit
+ *		       changes.
+ * 2.2   adk  29/10/14 Fixed CR#827686 when PCS/PMA core is configured with
+ *                    1000BASE-X mode export proper values to the xparameters.h
+ *                    file. Changes are made in the driver tcl file.
+ * 3.0   adk  08/1/15  Don't include gem in peripheral test when gem is
+ *                    configured with PCS/PMA Core. Changes are made in the
+ *		       test app tcl(CR:827686).
+ * 3.0   kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+ * 3.0   hk   03/18/15 Added support for jumbo frames. Increase AHB burst.
+ *                     Disable extended mode. Perform all 64 bit changes under
+ *                     check for arch64.
+ *                     Remove "used bit set" from TX error interrupt masks.
+ * 3.1   hk   07/27/15 Do not call error handler with '0' error code when
+ *                     there is no error. CR# 869403
+ *            08/10/15 Update upper 32 bit tx and rx queue ptr registers.
+ * 3.2   hk   02/22/16 Added SGMII support for Zynq Ultrascale+ MPSoC.
+ * 3.4   ms   01/23/17 Modified xil_printf statement in main function for all
+ *                     examples to ensure that "Successfully ran" and "Failed"
+ *                     strings are available in all examples. This is a fix
+ *                     for CR-965028.
+ *       ms   03/17/17 Modified text file in examples folder for doxygen
+ *                     generation.
+ *       ms   04/05/17 Added tabspace for return statements in functions of
+ *                     xemacps_ieee1588_example.c for proper documentation
+ *                     while generating doxygen.
+ * 3.5   hk   08/14/17 Update cache coherency information of the interface in
+ *                     its config structure.
+ * 3.6   rb   09/08/17 HwCnt variable (in XEmacPs_BdRing structure) is
+ *		       changed to volatile.
+ *		       Add API XEmacPs_BdRingPtrReset() to reset pointers
+ *
+ * 

+ *
+ ****************************************************************************/
+
+#ifndef XEMACPS_H		/* prevent circular inclusions */
+#define XEMACPS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xemacps_hw.h"
+#include "xemacps_bd.h"
+#include "xemacps_bdring.h"
+
+/************************** Constant Definitions ****************************/
+
+/*
+ * Device information
+ */
+#define XEMACPS_DEVICE_NAME     "xemacps"
+#define XEMACPS_DEVICE_DESC     "Xilinx PS 10/100/1000 MAC"
+
+
+/** @name Configuration options
+ *
+ * Device configuration options. See the XEmacPs_SetOptions(),
+ * XEmacPs_ClearOptions() and XEmacPs_GetOptions() for information on how to
+ * use options.
+ *
+ * The default state of the options are noted and are what the device and
+ * driver will be set to after calling XEmacPs_Reset() or
+ * XEmacPs_Initialize().
+ *
+ * @{
+ */
+
+#define XEMACPS_PROMISC_OPTION               0x00000001U
+/**< Accept all incoming packets.
+ *   This option defaults to disabled (cleared) */
+
+#define XEMACPS_FRAME1536_OPTION             0x00000002U
+/**< Frame larger than 1516 support for Tx & Rx.
+ *   This option defaults to disabled (cleared) */
+
+#define XEMACPS_VLAN_OPTION                  0x00000004U
+/**< VLAN Rx & Tx frame support.
+ *   This option defaults to disabled (cleared) */
+
+#define XEMACPS_FLOW_CONTROL_OPTION          0x00000010U
+/**< Enable recognition of flow control frames on Rx
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_FCS_STRIP_OPTION             0x00000020U
+/**< Strip FCS and PAD from incoming frames. Note: PAD from VLAN frames is not
+ *   stripped.
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_FCS_INSERT_OPTION            0x00000040U
+/**< Generate FCS field and add PAD automatically for outgoing frames.
+ *   This option defaults to disabled (cleared) */
+
+#define XEMACPS_LENTYPE_ERR_OPTION           0x00000080U
+/**< Enable Length/Type error checking for incoming frames. When this option is
+ *   set, the MAC will filter frames that have a mismatched type/length field
+ *   and if XEMACPS_REPORT_RXERR_OPTION is set, the user is notified when these
+ *   types of frames are encountered. When this option is cleared, the MAC will
+ *   allow these types of frames to be received.
+ *
+ *   This option defaults to disabled (cleared) */
+
+#define XEMACPS_TRANSMITTER_ENABLE_OPTION    0x00000100U
+/**< Enable the transmitter.
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_RECEIVER_ENABLE_OPTION       0x00000200U
+/**< Enable the receiver
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_BROADCAST_OPTION             0x00000400U
+/**< Allow reception of the broadcast address
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_MULTICAST_OPTION             0x00000800U
+/**< Allows reception of multicast addresses programmed into hash
+ *   This option defaults to disabled (clear) */
+
+#define XEMACPS_RX_CHKSUM_ENABLE_OPTION      0x00001000U
+/**< Enable the RX checksum offload
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_TX_CHKSUM_ENABLE_OPTION      0x00002000U
+/**< Enable the TX checksum offload
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_JUMBO_ENABLE_OPTION	0x00004000U
+#define XEMACPS_SGMII_ENABLE_OPTION	0x00008000U
+
+#define XEMACPS_DEFAULT_OPTIONS                     \
+    ((u32)XEMACPS_FLOW_CONTROL_OPTION |                  \
+     (u32)XEMACPS_FCS_INSERT_OPTION |                    \
+     (u32)XEMACPS_FCS_STRIP_OPTION |                     \
+     (u32)XEMACPS_BROADCAST_OPTION |                     \
+     (u32)XEMACPS_LENTYPE_ERR_OPTION |                   \
+     (u32)XEMACPS_TRANSMITTER_ENABLE_OPTION |            \
+     (u32)XEMACPS_RECEIVER_ENABLE_OPTION |               \
+     (u32)XEMACPS_RX_CHKSUM_ENABLE_OPTION |              \
+     (u32)XEMACPS_TX_CHKSUM_ENABLE_OPTION)
+
+/**< Default options set when device is initialized or reset */
+/*@}*/
+
+/** @name Callback identifiers
+ *
+ * These constants are used as parameters to XEmacPs_SetHandler()
+ * @{
+ */
+#define XEMACPS_HANDLER_DMASEND 1U
+#define XEMACPS_HANDLER_DMARECV 2U
+#define XEMACPS_HANDLER_ERROR   3U
+/*@}*/
+
+/* Constants to determine the configuration of the hardware device. They are
+ * used to allow the driver to verify it can operate with the hardware.
+ */
+#define XEMACPS_MDIO_DIV_DFT    MDC_DIV_32 /**< Default MDIO clock divisor */
+
+/* The next few constants help upper layers determine the size of memory
+ * pools used for Ethernet buffers and descriptor lists.
+ */
+#define XEMACPS_MAC_ADDR_SIZE   6U	/* size of Ethernet header */
+
+#define XEMACPS_MTU             1500U	/* max MTU size of Ethernet frame */
+#define XEMACPS_MTU_JUMBO       10240U	/* max MTU size of jumbo frame */
+#define XEMACPS_HDR_SIZE        14U	/* size of Ethernet header */
+#define XEMACPS_HDR_VLAN_SIZE   18U	/* size of Ethernet header with VLAN */
+#define XEMACPS_TRL_SIZE        4U	/* size of Ethernet trailer (FCS) */
+#define XEMACPS_MAX_FRAME_SIZE       (XEMACPS_MTU + XEMACPS_HDR_SIZE + \
+        XEMACPS_TRL_SIZE)
+#define XEMACPS_MAX_VLAN_FRAME_SIZE  (XEMACPS_MTU + XEMACPS_HDR_SIZE + \
+        XEMACPS_HDR_VLAN_SIZE + XEMACPS_TRL_SIZE)
+#define XEMACPS_MAX_VLAN_FRAME_SIZE_JUMBO  (XEMACPS_MTU_JUMBO + XEMACPS_HDR_SIZE + \
+        XEMACPS_HDR_VLAN_SIZE + XEMACPS_TRL_SIZE)
+
+/* DMACR Bust length hash defines */
+
+#define XEMACPS_SINGLE_BURST	0x00000001
+#define XEMACPS_4BYTE_BURST		0x00000004
+#define XEMACPS_8BYTE_BURST		0x00000008
+#define XEMACPS_16BYTE_BURST	0x00000010
+
+
+/**************************** Type Definitions ******************************/
+/** @name Typedefs for callback functions
+ *
+ * These callbacks are invoked in interrupt context.
+ * @{
+ */
+/**
+ * Callback invoked when frame(s) have been sent or received in interrupt
+ * driven DMA mode. To set the send callback, invoke XEmacPs_SetHandler().
+ *
+ * @param CallBackRef is user data assigned when the callback was set.
+ *
+ * @note
+ * See xemacps_hw.h for bitmasks definitions and the device hardware spec for
+ * further information on their meaning.
+ *
+ */
+typedef void (*XEmacPs_Handler) (void *CallBackRef);
+
+/**
+ * Callback when an asynchronous error occurs. To set this callback, invoke
+ * XEmacPs_SetHandler() with XEMACPS_HANDLER_ERROR in the HandlerType
+ * paramter.
+ *
+ * @param CallBackRef is user data assigned when the callback was set.
+ * @param Direction defines either receive or transmit error(s) has occurred.
+ * @param ErrorWord definition varies with Direction
+ *
+ */
+typedef void (*XEmacPs_ErrHandler) (void *CallBackRef, u8 Direction,
+				     u32 ErrorWord);
+
+/*@}*/
+
+/**
+ * This typedef contains configuration information for a device.
+ */
+typedef struct {
+	u16 DeviceId;	/**< Unique ID  of device */
+	UINTPTR BaseAddress;/**< Physical base address of IPIF registers */
+	u8 IsCacheCoherent; /**< Applicable only to A53 in EL1 mode;
+				* describes whether Cache Coherent or not */
+} XEmacPs_Config;
+
+
+/**
+ * The XEmacPs driver instance data. The user is required to allocate a
+ * structure of this type for every XEmacPs device in the system. A pointer
+ * to a structure of this type is then passed to the driver API functions.
+ */
+typedef struct XEmacPs_Instance {
+	XEmacPs_Config Config;	/* Hardware configuration */
+	u32 IsStarted;		/* Device is currently started */
+	u32 IsReady;		/* Device is initialized and ready */
+	u32 Options;		/* Current options word */
+
+	XEmacPs_BdRing TxBdRing;	/* Transmit BD ring */
+	XEmacPs_BdRing RxBdRing;	/* Receive BD ring */
+
+	XEmacPs_Handler SendHandler;
+	XEmacPs_Handler RecvHandler;
+	void *SendRef;
+	void *RecvRef;
+
+	XEmacPs_ErrHandler ErrorHandler;
+	void *ErrorRef;
+	u32 Version;
+	u32 RxBufMask;
+	u32 MaxMtuSize;
+	u32 MaxFrameSize;
+	u32 MaxVlanFrameSize;
+
+} XEmacPs;
+
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* Retrieve the Tx ring object. This object can be used in the various Ring
+* API functions.
+*
+* @param  InstancePtr is the DMA channel to operate on.
+*
+* @return TxBdRing attribute
+*
+* @note
+* C-style signature:
+*    XEmacPs_BdRing XEmacPs_GetTxRing(XEmacPs *InstancePtr)
+*
+*****************************************************************************/
+#define XEmacPs_GetTxRing(InstancePtr) ((InstancePtr)->TxBdRing)
+
+/****************************************************************************/
+/**
+* Retrieve the Rx ring object. This object can be used in the various Ring
+* API functions.
+*
+* @param  InstancePtr is the DMA channel to operate on.
+*
+* @return RxBdRing attribute
+*
+* @note
+* C-style signature:
+*    XEmacPs_BdRing XEmacPs_GetRxRing(XEmacPs *InstancePtr)
+*
+*****************************************************************************/
+#define XEmacPs_GetRxRing(InstancePtr) ((InstancePtr)->RxBdRing)
+
+/****************************************************************************/
+/**
+*
+* Enable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be enabled.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param Mask contains a bit mask of interrupts to enable. The mask can
+*        be formed using a set of bitwise or'd values.
+*
+* @note
+* The state of the transmitter and receiver are not modified by this function.
+* C-style signature
+*     void XEmacPs_IntEnable(XEmacPs *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XEmacPs_IntEnable(InstancePtr, Mask)                            \
+	XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
+		XEMACPS_IER_OFFSET,                                     \
+		((Mask) & XEMACPS_IXR_ALL_MASK));
+
+/****************************************************************************/
+/**
+*
+* Disable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be enabled.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param Mask contains a bit mask of interrupts to disable. The mask can
+*        be formed using a set of bitwise or'd values.
+*
+* @note
+* The state of the transmitter and receiver are not modified by this function.
+* C-style signature
+*     void XEmacPs_IntDisable(XEmacPs *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XEmacPs_IntDisable(InstancePtr, Mask)                           \
+	XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
+		XEMACPS_IDR_OFFSET,                                     \
+		((Mask) & XEMACPS_IXR_ALL_MASK));
+
+/****************************************************************************/
+/**
+*
+* Enable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be enabled.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param Mask contains a bit mask of interrupts to enable. The mask can
+*        be formed using a set of bitwise or'd values.
+*
+* @note
+* The state of the transmitter and receiver are not modified by this function.
+* C-style signature
+*     void XEmacPs_IntQ1Enable(XEmacPs *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XEmacPs_IntQ1Enable(InstancePtr, Mask)                            \
+	XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
+		XEMACPS_INTQ1_IER_OFFSET,                                \
+		((Mask) & XEMACPS_INTQ1_IXR_ALL_MASK));
+
+/****************************************************************************/
+/**
+*
+* Disable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be enabled.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param Mask contains a bit mask of interrupts to disable. The mask can
+*        be formed using a set of bitwise or'd values.
+*
+* @note
+* The state of the transmitter and receiver are not modified by this function.
+* C-style signature
+*     void XEmacPs_IntDisable(XEmacPs *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XEmacPs_IntQ1Disable(InstancePtr, Mask)                           \
+	XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
+		XEMACPS_INTQ1_IDR_OFFSET,                               \
+		((Mask) & XEMACPS_INTQ1_IXR_ALL_MASK));
+
+/****************************************************************************/
+/**
+*
+* This macro triggers trasmit circuit to send data currently in TX buffer(s).
+*
+* @param InstancePtr is a pointer to the XEmacPs instance to be worked on.
+*
+* @return
+*
+* @note
+*
+* Signature: void XEmacPs_Transmit(XEmacPs *InstancePtr)
+*
+*****************************************************************************/
+#define XEmacPs_Transmit(InstancePtr)                              \
+        XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,          \
+        XEMACPS_NWCTRL_OFFSET,                                     \
+        (XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,          \
+        XEMACPS_NWCTRL_OFFSET) | XEMACPS_NWCTRL_STARTTX_MASK))
+
+/****************************************************************************/
+/**
+*
+* This macro determines if the device is configured with checksum offloading
+* on the receive channel
+*
+* @param InstancePtr is a pointer to the XEmacPs instance to be worked on.
+*
+* @return
+*
+* Boolean TRUE if the device is configured with checksum offloading, or
+* FALSE otherwise.
+*
+* @note
+*
+* Signature: u32 XEmacPs_IsRxCsum(XEmacPs *InstancePtr)
+*
+*****************************************************************************/
+#define XEmacPs_IsRxCsum(InstancePtr)                                     \
+        ((XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,             \
+          XEMACPS_NWCFG_OFFSET) & XEMACPS_NWCFG_RXCHKSUMEN_MASK) != 0U     \
+          ? TRUE : FALSE)
+
+/****************************************************************************/
+/**
+*
+* This macro determines if the device is configured with checksum offloading
+* on the transmit channel
+*
+* @param InstancePtr is a pointer to the XEmacPs instance to be worked on.
+*
+* @return
+*
+* Boolean TRUE if the device is configured with checksum offloading, or
+* FALSE otherwise.
+*
+* @note
+*
+* Signature: u32 XEmacPs_IsTxCsum(XEmacPs *InstancePtr)
+*
+*****************************************************************************/
+#define XEmacPs_IsTxCsum(InstancePtr)                                     \
+        ((XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,              \
+          XEMACPS_DMACR_OFFSET) & XEMACPS_DMACR_TCPCKSUM_MASK) != 0U       \
+          ? TRUE : FALSE)
+
+/************************** Function Prototypes *****************************/
+
+/*
+ * Initialization functions in xemacps.c
+ */
+LONG XEmacPs_CfgInitialize(XEmacPs *InstancePtr, XEmacPs_Config *CfgPtr,
+			   UINTPTR EffectiveAddress);
+void XEmacPs_Start(XEmacPs *InstancePtr);
+void XEmacPs_Stop(XEmacPs *InstancePtr);
+void XEmacPs_Reset(XEmacPs *InstancePtr);
+void XEmacPs_SetQueuePtr(XEmacPs *InstancePtr, UINTPTR QPtr, u8 QueueNum,
+			 u16 Direction);
+
+/*
+ * Lookup configuration in xemacps_sinit.c
+ */
+XEmacPs_Config *XEmacPs_LookupConfig(u16 DeviceId);
+
+/*
+ * Interrupt-related functions in xemacps_intr.c
+ * DMA only and FIFO is not supported. This DMA does not support coalescing.
+ */
+LONG XEmacPs_SetHandler(XEmacPs *InstancePtr, u32 HandlerType,
+			void *FuncPointer, void *CallBackRef);
+void XEmacPs_IntrHandler(void *XEmacPsPtr);
+
+/*
+ * MAC configuration/control functions in XEmacPs_control.c
+ */
+LONG XEmacPs_SetOptions(XEmacPs *InstancePtr, u32 Options);
+LONG XEmacPs_ClearOptions(XEmacPs *InstancePtr, u32 Options);
+u32 XEmacPs_GetOptions(XEmacPs *InstancePtr);
+
+LONG XEmacPs_SetMacAddress(XEmacPs *InstancePtr, void *AddressPtr, u8 Index);
+LONG XEmacPs_DeleteHash(XEmacPs *InstancePtr, void *AddressPtr);
+void XEmacPs_GetMacAddress(XEmacPs *InstancePtr, void *AddressPtr, u8 Index);
+
+LONG XEmacPs_SetHash(XEmacPs *InstancePtr, void *AddressPtr);
+void XEmacPs_ClearHash(XEmacPs *InstancePtr);
+void XEmacPs_GetHash(XEmacPs *InstancePtr, void *AddressPtr);
+
+void XEmacPs_SetMdioDivisor(XEmacPs *InstancePtr,
+				XEmacPs_MdcDiv Divisor);
+void XEmacPs_SetOperatingSpeed(XEmacPs *InstancePtr, u16 Speed);
+u16 XEmacPs_GetOperatingSpeed(XEmacPs *InstancePtr);
+LONG XEmacPs_PhyRead(XEmacPs *InstancePtr, u32 PhyAddress,
+		     u32 RegisterNum, u16 *PhyDataPtr);
+LONG XEmacPs_PhyWrite(XEmacPs *InstancePtr, u32 PhyAddress,
+		      u32 RegisterNum, u16 PhyData);
+LONG XEmacPs_SetTypeIdCheck(XEmacPs *InstancePtr, u32 Id_Check, u8 Index);
+
+LONG XEmacPs_SendPausePacket(XEmacPs *InstancePtr);
+void XEmacPs_DMABLengthUpdate(XEmacPs *InstancePtr, s32 BLength);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xemacps_bd.h b/src/Xilinx/include/xemacps_bd.h
new file mode 100644
index 0000000..83f9a87
--- /dev/null
+++ b/src/Xilinx/include/xemacps_bd.h
@@ -0,0 +1,804 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * @file xemacps_bd.h
+* @addtogroup emacps_v3_7
+* @{
+ *
+ * This header provides operations to manage buffer descriptors in support
+ * of scatter-gather DMA.
+ *
+ * The API exported by this header defines abstracted macros that allow the
+ * user to read/write specific BD fields.
+ *
+ * Buffer Descriptors
+ *
+ * A buffer descriptor (BD) defines a DMA transaction. The macros defined by
+ * this header file allow access to most fields within a BD to tailor a DMA
+ * transaction according to user and hardware requirements.  See the hardware
+ * IP DMA spec for more information on BD fields and how they affect transfers.
+ *
+ * The XEmacPs_Bd structure defines a BD. The organization of this structure
+ * is driven mainly by the hardware for use in scatter-gather DMA transfers.
+ *
+ * Performance
+ *
+ * Limiting I/O to BDs can improve overall performance of the DMA channel.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -------------------------------------------------------
+ * 1.00a wsy  01/10/10 First release
+ * 2.1   srt  07/15/14 Add support for Zynq Ultrascale MP GEM specification
+ *                     and 64-bit changes.
+ * 3.0   kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+ * 3.0   hk   02/20/15 Added support for jumbo frames.
+ *                     Disable extended mode. Perform all 64 bit changes under
+ *                     check for arch64.
+ * 3.2   hk   11/18/15 Change BD typedef and number of words.
+ *
+ * 

+ *
+ * ***************************************************************************
+ */
+
+#ifndef XEMACPS_BD_H		/* prevent circular inclusions */
+#define XEMACPS_BD_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include 
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+#ifdef __aarch64__
+/* Minimum BD alignment */
+#define XEMACPS_DMABD_MINIMUM_ALIGNMENT  64U
+#define XEMACPS_BD_NUM_WORDS 4U
+#else
+/* Minimum BD alignment */
+#define XEMACPS_DMABD_MINIMUM_ALIGNMENT  4U
+#define XEMACPS_BD_NUM_WORDS 2U
+#endif
+
+/**
+ * The XEmacPs_Bd is the type for buffer descriptors (BDs).
+ */
+typedef u32 XEmacPs_Bd[XEMACPS_BD_NUM_WORDS];
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+ * Zero out BD fields
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @return Nothing
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdClear(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdClear(BdPtr)                                  \
+    memset((BdPtr), 0, sizeof(XEmacPs_Bd))
+
+/****************************************************************************/
+/**
+*
+* Read the given Buffer Descriptor word.
+*
+* @param    BaseAddress is the base address of the BD to read
+* @param    Offset is the word offset to be read
+*
+* @return   The 32-bit value of the field
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_BdRead(UINTPTR BaseAddress, UINTPTR Offset)
+*
+*****************************************************************************/
+#define XEmacPs_BdRead(BaseAddress, Offset)             \
+	(*(u32 *)((UINTPTR)((void*)(BaseAddress)) + (u32)(Offset)))
+
+/****************************************************************************/
+/**
+*
+* Write the given Buffer Descriptor word.
+*
+* @param    BaseAddress is the base address of the BD to write
+* @param    Offset is the word offset to be written
+* @param    Data is the 32-bit value to write to the field
+*
+* @return   None.
+*
+* @note
+* C-style signature:
+*    void XEmacPs_BdWrite(UINTPTR BaseAddress, UINTPTR Offset, UINTPTR Data)
+*
+*****************************************************************************/
+#define XEmacPs_BdWrite(BaseAddress, Offset, Data)              \
+    (*(u32 *)((UINTPTR)(void*)(BaseAddress) + (u32)(Offset)) = (u32)(Data))
+
+/*****************************************************************************/
+/**
+ * Set the BD's Address field (word 0).
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ * @param  Addr  is the value to write to BD's status field.
+ *
+ * @note :
+ *
+ * C-style signature:
+ *    void XEmacPs_BdSetAddressTx(XEmacPs_Bd* BdPtr, UINTPTR Addr)
+ *
+ *****************************************************************************/
+#ifdef __aarch64__
+#define XEmacPs_BdSetAddressTx(BdPtr, Addr)                        \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,		\
+			(u32)((Addr) & ULONG64_LO_MASK));		\
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_HI_OFFSET,		\
+	(u32)(((Addr) & ULONG64_HI_MASK) >> 32U));
+#else
+#define XEmacPs_BdSetAddressTx(BdPtr, Addr)                        \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET, (u32)(Addr))
+#endif
+
+/*****************************************************************************/
+/**
+ * Set the BD's Address field (word 0).
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ * @param  Addr  is the value to write to BD's status field.
+ *
+ * @note : Due to some bits are mixed within recevie BD's address field,
+ *         read-modify-write is performed.
+ *
+ * C-style signature:
+ *    void XEmacPs_BdSetAddressRx(XEmacPs_Bd* BdPtr, UINTPTR Addr)
+ *
+ *****************************************************************************/
+#ifdef __aarch64__
+#define XEmacPs_BdSetAddressRx(BdPtr, Addr)                        \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,              \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+	~XEMACPS_RXBUF_ADD_MASK) | ((u32)((Addr) & ULONG64_LO_MASK))));  \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_HI_OFFSET, 	\
+	(u32)(((Addr) & ULONG64_HI_MASK) >> 32U));
+#else
+#define XEmacPs_BdSetAddressRx(BdPtr, Addr)                        \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,              \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+    ~XEMACPS_RXBUF_ADD_MASK) | (UINTPTR)(Addr)))
+#endif
+
+/*****************************************************************************/
+/**
+ * Set the BD's Status field (word 1).
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ * @param  Data  is the value to write to BD's status field.
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetStatus(XEmacPs_Bd* BdPtr, UINTPTR Data)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetStatus(BdPtr, Data)                           \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,              \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) | (Data))
+
+
+/*****************************************************************************/
+/**
+ * Retrieve the BD's Packet DMA transfer status word (word 1).
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @return Status word
+ *
+ * @note
+ * C-style signature:
+ *    u32 XEmacPs_BdGetStatus(XEmacPs_Bd* BdPtr)
+ *
+ * Due to the BD bit layout differences in transmit and receive. User's
+ * caution is required.
+ *****************************************************************************/
+#define XEmacPs_BdGetStatus(BdPtr)                                 \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET)
+
+
+/*****************************************************************************/
+/**
+ * Get the address (bits 0..31) of the BD's buffer address (word 0)
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdGetBufAddr(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#ifdef __aarch64__
+#define XEmacPs_BdGetBufAddr(BdPtr)                               \
+    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) |		  \
+	(XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_HI_OFFSET)) << 32U)
+#else
+#define XEmacPs_BdGetBufAddr(BdPtr)                               \
+    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET))
+#endif
+
+/*****************************************************************************/
+/**
+ * Set transfer length in bytes for the given BD. The length must be set each
+ * time a BD is submitted to hardware.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ * @param  LenBytes is the number of bytes to transfer.
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetLength(XEmacPs_Bd* BdPtr, u32 LenBytes)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetLength(BdPtr, LenBytes)                       \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,              \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    ~XEMACPS_TXBUF_LEN_MASK) | (LenBytes)))
+
+
+
+/*****************************************************************************/
+/**
+ * Set transfer length in bytes for the given BD. The length must be set each
+ * time a BD is submitted to hardware.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ * @param  LenBytes is the number of bytes to transfer.
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetLength(XEmacPs_Bd* BdPtr, u32 LenBytes)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetLength(BdPtr, LenBytes)                       \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,              \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    ~XEMACPS_TXBUF_LEN_MASK) | (LenBytes)))
+
+
+/*****************************************************************************/
+/**
+ * Retrieve the BD length field.
+ *
+ * For Tx channels, the returned value is the same as that written with
+ * XEmacPs_BdSetLength().
+ *
+ * For Rx channels, the returned value is the size of the received packet.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @return Length field processed by hardware or set by
+ *         XEmacPs_BdSetLength().
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdGetLength(XEmacPs_Bd* BdPtr)
+ *    XEAMCPS_RXBUF_LEN_MASK is same as XEMACPS_TXBUF_LEN_MASK.
+ *
+ *****************************************************************************/
+#define XEmacPs_BdGetLength(BdPtr)                                 \
+    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &            \
+    XEMACPS_RXBUF_LEN_MASK)
+
+/*****************************************************************************/
+/**
+ * Retrieve the RX frame size.
+ *
+ * The returned value is the size of the received packet.
+ * This API supports jumbo frame sizes if enabled.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @return Length field processed by hardware or set by
+ *         XEmacPs_BdSetLength().
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_GetRxFrameSize(XEmacPs* InstancePtr, XEmacPs_Bd* BdPtr)
+ *    RxBufMask is dependent on whether jumbo is enabled or not.
+ *
+ *****************************************************************************/
+#define XEmacPs_GetRxFrameSize(InstancePtr, BdPtr)                   \
+    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &            \
+    (InstancePtr)->RxBufMask)
+
+/*****************************************************************************/
+/**
+ * Test whether the given BD has been marked as the last BD of a packet.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @return TRUE if BD represents the "Last" BD of a packet, FALSE otherwise
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsLast(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsLast(BdPtr)                                    \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_EOF_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Tell the DMA engine that the given transmit BD marks the end of the current
+ * packet to be processed.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetLast(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetLast(BdPtr)                                   \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_LAST_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Tell the DMA engine that the current packet does not end with the given
+ * BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdClearLast(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdClearLast(BdPtr)                                 \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
+    ~XEMACPS_TXBUF_LAST_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Set this bit to mark the last descriptor in the receive buffer descriptor
+ * list.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetRxWrap(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+/*#define XEmacPs_BdSetRxWrap(BdPtr)                                 \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) |             \
+    XEMACPS_RXBUF_WRAP_MASK))
+*/
+
+/*****************************************************************************/
+/**
+ * Determine the wrap bit of the receive BD which indicates end of the
+ * BD list.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    u8 XEmacPs_BdIsRxWrap(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxWrap(BdPtr)                                  \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+    XEMACPS_RXBUF_WRAP_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Sets this bit to mark the last descriptor in the transmit buffer
+ * descriptor list.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetTxWrap(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+/*#define XEmacPs_BdSetTxWrap(BdPtr)                                 \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_WRAP_MASK))
+*/
+
+/*****************************************************************************/
+/**
+ * Determine the wrap bit of the transmit BD which indicates end of the
+ * BD list.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    u8 XEmacPs_BdGetTxWrap(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsTxWrap(BdPtr)                                  \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_WRAP_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/*
+ * Must clear this bit to enable the MAC to write data to the receive
+ * buffer. Hardware sets this bit once it has successfully written a frame to
+ * memory. Once set, software has to clear the bit before the buffer can be
+ * used again. This macro clear the new bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdClearRxNew(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdClearRxNew(BdPtr)                                \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &             \
+    ~XEMACPS_RXBUF_NEW_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Determine the new bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxNew(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxNew(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+    XEMACPS_RXBUF_NEW_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Software sets this bit to disable the buffer to be read by the hardware.
+ * Hardware sets this bit for the first buffer of a frame once it has been
+ * successfully transmitted. This macro sets this bit of transmit BD to avoid
+ * confusion.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetTxUsed(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetTxUsed(BdPtr)                                 \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_USED_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Software clears this bit to enable the buffer to be read by the hardware.
+ * Hardware sets this bit for the first buffer of a frame once it has been
+ * successfully transmitted. This macro clears this bit of transmit BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdClearTxUsed(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdClearTxUsed(BdPtr)                               \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
+    ~XEMACPS_TXBUF_USED_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Determine the used bit of the transmit BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsTxUsed(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsTxUsed(BdPtr)                                  \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_USED_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if a frame fails to be transmitted due to too many retries.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsTxRetry(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsTxRetry(BdPtr)                                 \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_RETRY_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if a frame fails to be transmitted due to data can not be
+ * feteched in time or buffers are exhausted.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsTxUrun(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsTxUrun(BdPtr)                                  \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_URUN_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if a frame fails to be transmitted due to buffer is exhausted
+ * mid-frame.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsTxExh(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsTxExh(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_EXH_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Sets this bit, no CRC will be appended to the current frame. This control
+ * bit must be set for the first buffer in a frame and will be ignored for
+ * the subsequent buffers of a frame.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * This bit must be clear when using the transmit checksum generation offload,
+ * otherwise checksum generation and substitution will not occur.
+ *
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdSetTxNoCRC(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetTxNoCRC(BdPtr)                                \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_NOCRC_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Clear this bit, CRC will be appended to the current frame. This control
+ * bit must be set for the first buffer in a frame and will be ignored for
+ * the subsequent buffers of a frame.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * This bit must be clear when using the transmit checksum generation offload,
+ * otherwise checksum generation and substitution will not occur.
+ *
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdClearTxNoCRC(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdClearTxNoCRC(BdPtr)                              \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
+    ~XEMACPS_TXBUF_NOCRC_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Determine the broadcast bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxBcast(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxBcast(BdPtr)                                 \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_BCAST_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine the multicast hash bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxMultiHash(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxMultiHash(BdPtr)                             \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_MULTIHASH_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine the unicast hash bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxUniHash(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxUniHash(BdPtr)                               \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_UNIHASH_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if the received frame is a VLAN Tagged frame.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxVlan(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxVlan(BdPtr)                                  \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_VLAN_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if the received frame has Type ID of 8100h and null VLAN
+ * identifier(Priority tag).
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxPri(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxPri(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_PRI_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if the received frame's Concatenation Format Indicator (CFI) of
+ * the frames VLANTCI field was set.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxCFI(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxCFI(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_CFI_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine the End Of Frame (EOF) bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdGetRxEOF(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxEOF(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_EOF_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine the Start Of Frame (SOF) bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdGetRxSOF(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxSOF(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_SOF_MASK)!=0U ? TRUE : FALSE)
+
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xemacps_bdring.h b/src/Xilinx/include/xemacps_bdring.h
new file mode 100644
index 0000000..b89e898
--- /dev/null
+++ b/src/Xilinx/include/xemacps_bdring.h
@@ -0,0 +1,241 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xemacps_bdring.h
+* @addtogroup emacps_v3_7
+* @{
+*
+* The Xiline EmacPs Buffer Descriptor ring driver. This is part of EmacPs
+* DMA functionalities.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a wsy  01/10/10 First release
+* 2.1   srt  07/15/14 Add support for Zynq Ultrascale Mp architecture.
+* 3.0   kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.6   rb   09/08/17 HwCnt variable (in XEmacPs_BdRing structure) is
+*		      changed to volatile.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XEMACPS_BDRING_H	/* prevent curcular inclusions */
+#define XEMACPS_BDRING_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**************************** Type Definitions *******************************/
+
+/** This is an internal structure used to maintain the DMA list */
+typedef struct {
+	UINTPTR PhysBaseAddr;/**< Physical address of 1st BD in list */
+	UINTPTR BaseBdAddr;	 /**< Virtual address of 1st BD in list */
+	UINTPTR HighBdAddr;	 /**< Virtual address of last BD in the list */
+	u32 Length;	 /**< Total size of ring in bytes */
+	u32 RunState;	 /**< Flag to indicate DMA is started */
+	u32 Separation;	 /**< Number of bytes between the starting address
+                                  of adjacent BDs */
+	XEmacPs_Bd *FreeHead;
+			     /**< First BD in the free group */
+	XEmacPs_Bd *PreHead;/**< First BD in the pre-work group */
+	XEmacPs_Bd *HwHead; /**< First BD in the work group */
+	XEmacPs_Bd *HwTail; /**< Last BD in the work group */
+	XEmacPs_Bd *PostHead;
+			     /**< First BD in the post-work group */
+	XEmacPs_Bd *BdaRestart;
+			     /**< BDA to load when channel is started */
+
+	volatile u32 HwCnt;    /**< Number of BDs in work group */
+	u32 PreCnt;     /**< Number of BDs in pre-work group */
+	u32 FreeCnt;    /**< Number of allocatable BDs in the free group */
+	u32 PostCnt;    /**< Number of BDs in post-work group */
+	u32 AllCnt;     /**< Total Number of BDs for channel */
+} XEmacPs_BdRing;
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+* Use this macro at initialization time to determine how many BDs will fit
+* in a BD list within the given memory constraints.
+*
+* The results of this macro can be provided to XEmacPs_BdRingCreate().
+*
+* @param Alignment specifies what byte alignment the BDs must fall on and
+*        must be a power of 2 to get an accurate calculation (32, 64, 128,...)
+* @param Bytes is the number of bytes to be used to store BDs.
+*
+* @return Number of BDs that can fit in the given memory area
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_BdRingCntCalc(u32 Alignment, u32 Bytes)
+*
+******************************************************************************/
+#define XEmacPs_BdRingCntCalc(Alignment, Bytes)                    \
+    (u32)((Bytes) / (sizeof(XEmacPs_Bd)))
+
+/*****************************************************************************/
+/**
+* Use this macro at initialization time to determine how many bytes of memory
+* is required to contain a given number of BDs at a given alignment.
+*
+* @param Alignment specifies what byte alignment the BDs must fall on. This
+*        parameter must be a power of 2 to get an accurate calculation (32, 64,
+*        128,...)
+* @param NumBd is the number of BDs to calculate memory size requirements for
+*
+* @return The number of bytes of memory required to create a BD list with the
+*         given memory constraints.
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_BdRingMemCalc(u32 Alignment, u32 NumBd)
+*
+******************************************************************************/
+#define XEmacPs_BdRingMemCalc(Alignment, NumBd)                    \
+    (u32)(sizeof(XEmacPs_Bd) * (NumBd))
+
+/****************************************************************************/
+/**
+* Return the total number of BDs allocated by this channel with
+* XEmacPs_BdRingCreate().
+*
+* @param  RingPtr is the DMA channel to operate on.
+*
+* @return The total number of BDs allocated for this channel.
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_BdRingGetCnt(XEmacPs_BdRing* RingPtr)
+*
+*****************************************************************************/
+#define XEmacPs_BdRingGetCnt(RingPtr) ((RingPtr)->AllCnt)
+
+/****************************************************************************/
+/**
+* Return the number of BDs allocatable with XEmacPs_BdRingAlloc() for pre-
+* processing.
+*
+* @param  RingPtr is the DMA channel to operate on.
+*
+* @return The number of BDs currently allocatable.
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_BdRingGetFreeCnt(XEmacPs_BdRing* RingPtr)
+*
+*****************************************************************************/
+#define XEmacPs_BdRingGetFreeCnt(RingPtr)   ((RingPtr)->FreeCnt)
+
+/****************************************************************************/
+/**
+* Return the next BD from BdPtr in a list.
+*
+* @param  RingPtr is the DMA channel to operate on.
+* @param  BdPtr is the BD to operate on.
+*
+* @return The next BD in the list relative to the BdPtr parameter.
+*
+* @note
+* C-style signature:
+*    XEmacPs_Bd *XEmacPs_BdRingNext(XEmacPs_BdRing* RingPtr,
+*                                      XEmacPs_Bd *BdPtr)
+*
+*****************************************************************************/
+#define XEmacPs_BdRingNext(RingPtr, BdPtr)                           \
+    (((UINTPTR)((void *)(BdPtr)) >= (RingPtr)->HighBdAddr) ?                     \
+    (XEmacPs_Bd*)((void*)(RingPtr)->BaseBdAddr) :                              \
+    (XEmacPs_Bd*)((UINTPTR)((void *)(BdPtr)) + (RingPtr)->Separation))
+
+/****************************************************************************/
+/**
+* Return the previous BD from BdPtr in the list.
+*
+* @param  RingPtr is the DMA channel to operate on.
+* @param  BdPtr is the BD to operate on
+*
+* @return The previous BD in the list relative to the BdPtr parameter.
+*
+* @note
+* C-style signature:
+*    XEmacPs_Bd *XEmacPs_BdRingPrev(XEmacPs_BdRing* RingPtr,
+*                                      XEmacPs_Bd *BdPtr)
+*
+*****************************************************************************/
+#define XEmacPs_BdRingPrev(RingPtr, BdPtr)                           \
+    (((UINTPTR)(BdPtr) <= (RingPtr)->BaseBdAddr) ?                     \
+    (XEmacPs_Bd*)(RingPtr)->HighBdAddr :                              \
+    (XEmacPs_Bd*)((UINTPTR)(BdPtr) - (RingPtr)->Separation))
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Scatter gather DMA related functions in xemacps_bdring.c
+ */
+LONG XEmacPs_BdRingCreate(XEmacPs_BdRing * RingPtr, UINTPTR PhysAddr,
+			  UINTPTR VirtAddr, u32 Alignment, u32 BdCount);
+LONG XEmacPs_BdRingClone(XEmacPs_BdRing * RingPtr, XEmacPs_Bd * SrcBdPtr,
+			 u8 Direction);
+LONG XEmacPs_BdRingAlloc(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			 XEmacPs_Bd ** BdSetPtr);
+LONG XEmacPs_BdRingUnAlloc(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			   XEmacPs_Bd * BdSetPtr);
+LONG XEmacPs_BdRingToHw(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			XEmacPs_Bd * BdSetPtr);
+LONG XEmacPs_BdRingFree(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			XEmacPs_Bd * BdSetPtr);
+u32 XEmacPs_BdRingFromHwTx(XEmacPs_BdRing * RingPtr, u32 BdLimit,
+				 XEmacPs_Bd ** BdSetPtr);
+u32 XEmacPs_BdRingFromHwRx(XEmacPs_BdRing * RingPtr, u32 BdLimit,
+				 XEmacPs_Bd ** BdSetPtr);
+LONG XEmacPs_BdRingCheck(XEmacPs_BdRing * RingPtr, u8 Direction);
+
+void XEmacPs_BdRingPtrReset(XEmacPs_BdRing * RingPtr, void *virtaddrloc);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* end of protection macros */
+/** @} */
diff --git a/src/Xilinx/include/xemacps_hw.h b/src/Xilinx/include/xemacps_hw.h
new file mode 100644
index 0000000..e535470
--- /dev/null
+++ b/src/Xilinx/include/xemacps_hw.h
@@ -0,0 +1,656 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xemacps_hw.h
+* @addtogroup emacps_v3_7
+* @{
+*
+* This header file contains identifiers and low-level driver functions (or
+* macros) that can be used to access the PS Ethernet MAC (XEmacPs) device.
+* High-level driver functions are defined in xemacps.h.
+*
+* @note
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a wsy  01/10/10 First release.
+* 1.02a asa  11/05/12 Added hash defines for DMACR burst length configuration.
+* 1.05a kpc  28/06/13 Added XEmacPs_ResetHw function prototype
+* 1.06a asa  11/02/13 Changed the value for XEMACPS_RXBUF_LEN_MASK from 0x3fff
+*					  to 0x1fff. This fixes the CR#744902.
+* 2.1   srt  07/15/14 Add support for Zynq Ultrascale Mp GEM specification.
+* 3.0   kvn  12/16/14 Changed name of XEMACPS_NWCFG_LENGTHERRDSCRD_MASK to
+*					  XEMACPS_NWCFG_LENERRDSCRD_MASK as it exceeds 31 characters.
+* 3.0  kpc   1/23/15  Corrected the extended descriptor macro values.
+* 3.0  kvn   02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.0  hk   03/18/15 Added support for jumbo frames.
+*                    Remove "used bit set" from TX error interrupt masks.
+* 3.1  hk   08/10/15 Update upper 32 bit tx and rx queue ptr register offsets.
+* 3.2   hk   02/22/16 Added SGMII support for Zynq Ultrascale+ MPSoC.
+* 

+*
+******************************************************************************/
+
+#ifndef XEMACPS_HW_H		/* prevent circular inclusions */
+#define XEMACPS_HW_H		/* by using protection macros */
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+
+#define XEMACPS_MAX_MAC_ADDR     4U   /**< Maxmum number of mac address
+                                           supported */
+#define XEMACPS_MAX_TYPE_ID      4U   /**< Maxmum number of type id supported */
+
+#ifdef __aarch64__
+#define XEMACPS_BD_ALIGNMENT     64U   /**< Minimum buffer descriptor alignment
+                                           on the local bus */
+#else
+
+#define XEMACPS_BD_ALIGNMENT     4U   /**< Minimum buffer descriptor alignment
+                                           on the local bus */
+#endif
+#define XEMACPS_RX_BUF_ALIGNMENT 4U   /**< Minimum buffer alignment when using
+                                           options that impose alignment
+                                           restrictions on the buffer data on
+                                           the local bus */
+
+/** @name Direction identifiers
+ *
+ *  These are used by several functions and callbacks that need
+ *  to specify whether an operation specifies a send or receive channel.
+ * @{
+ */
+#define XEMACPS_SEND        1U	      /**< send direction */
+#define XEMACPS_RECV        2U	      /**< receive direction */
+/*@}*/
+
+/**  @name MDC clock division
+ *  currently supporting 8, 16, 32, 48, 64, 96, 128, 224.
+ * @{
+ */
+typedef enum { MDC_DIV_8 = 0U, MDC_DIV_16, MDC_DIV_32, MDC_DIV_48,
+	MDC_DIV_64, MDC_DIV_96, MDC_DIV_128, MDC_DIV_224
+} XEmacPs_MdcDiv;
+
+/*@}*/
+
+#define XEMACPS_RX_BUF_SIZE 1536U /**< Specify the receive buffer size in
+                                       bytes, 64, 128, ... 10240 */
+#define XEMACPS_RX_BUF_SIZE_JUMBO 10240U
+
+#define XEMACPS_RX_BUF_UNIT   64U /**< Number of receive buffer bytes as a
+                                       unit, this is HW setup */
+
+#define XEMACPS_MAX_RXBD     128U /**< Size of RX buffer descriptor queues */
+#define XEMACPS_MAX_TXBD     128U /**< Size of TX buffer descriptor queues */
+
+#define XEMACPS_MAX_HASH_BITS 64U /**< Maximum value for hash bits. 2**6 */
+
+/* Register offset definitions. Unless otherwise noted, register access is
+ * 32 bit. Names are self explained here.
+ */
+
+#define XEMACPS_NWCTRL_OFFSET        0x00000000U /**< Network Control reg */
+#define XEMACPS_NWCFG_OFFSET         0x00000004U /**< Network Config reg */
+#define XEMACPS_NWSR_OFFSET          0x00000008U /**< Network Status reg */
+
+#define XEMACPS_DMACR_OFFSET         0x00000010U /**< DMA Control reg */
+#define XEMACPS_TXSR_OFFSET          0x00000014U /**< TX Status reg */
+#define XEMACPS_RXQBASE_OFFSET       0x00000018U /**< RX Q Base address reg */
+#define XEMACPS_TXQBASE_OFFSET       0x0000001CU /**< TX Q Base address reg */
+#define XEMACPS_RXSR_OFFSET          0x00000020U /**< RX Status reg */
+
+#define XEMACPS_ISR_OFFSET           0x00000024U /**< Interrupt Status reg */
+#define XEMACPS_IER_OFFSET           0x00000028U /**< Interrupt Enable reg */
+#define XEMACPS_IDR_OFFSET           0x0000002CU /**< Interrupt Disable reg */
+#define XEMACPS_IMR_OFFSET           0x00000030U /**< Interrupt Mask reg */
+
+#define XEMACPS_PHYMNTNC_OFFSET      0x00000034U /**< Phy Maintaince reg */
+#define XEMACPS_RXPAUSE_OFFSET       0x00000038U /**< RX Pause Time reg */
+#define XEMACPS_TXPAUSE_OFFSET       0x0000003CU /**< TX Pause Time reg */
+
+#define XEMACPS_JUMBOMAXLEN_OFFSET   0x00000048U /**< Jumbo max length reg */
+
+#define XEMACPS_HASHL_OFFSET         0x00000080U /**< Hash Low address reg */
+#define XEMACPS_HASHH_OFFSET         0x00000084U /**< Hash High address reg */
+
+#define XEMACPS_LADDR1L_OFFSET       0x00000088U /**< Specific1 addr low reg */
+#define XEMACPS_LADDR1H_OFFSET       0x0000008CU /**< Specific1 addr high reg */
+#define XEMACPS_LADDR2L_OFFSET       0x00000090U /**< Specific2 addr low reg */
+#define XEMACPS_LADDR2H_OFFSET       0x00000094U /**< Specific2 addr high reg */
+#define XEMACPS_LADDR3L_OFFSET       0x00000098U /**< Specific3 addr low reg */
+#define XEMACPS_LADDR3H_OFFSET       0x0000009CU /**< Specific3 addr high reg */
+#define XEMACPS_LADDR4L_OFFSET       0x000000A0U /**< Specific4 addr low reg */
+#define XEMACPS_LADDR4H_OFFSET       0x000000A4U /**< Specific4 addr high reg */
+
+#define XEMACPS_MATCH1_OFFSET        0x000000A8U /**< Type ID1 Match reg */
+#define XEMACPS_MATCH2_OFFSET        0x000000ACU /**< Type ID2 Match reg */
+#define XEMACPS_MATCH3_OFFSET        0x000000B0U /**< Type ID3 Match reg */
+#define XEMACPS_MATCH4_OFFSET        0x000000B4U /**< Type ID4 Match reg */
+
+#define XEMACPS_STRETCH_OFFSET       0x000000BCU /**< IPG Stretch reg */
+
+#define XEMACPS_OCTTXL_OFFSET        0x00000100U /**< Octects transmitted Low
+                                                      reg */
+#define XEMACPS_OCTTXH_OFFSET        0x00000104U /**< Octects transmitted High
+                                                      reg */
+
+#define XEMACPS_TXCNT_OFFSET         0x00000108U /**< Error-free Frmaes
+                                                      transmitted counter */
+#define XEMACPS_TXBCCNT_OFFSET       0x0000010CU /**< Error-free Broadcast
+                                                      Frames counter*/
+#define XEMACPS_TXMCCNT_OFFSET       0x00000110U /**< Error-free Multicast
+                                                      Frame counter */
+#define XEMACPS_TXPAUSECNT_OFFSET    0x00000114U /**< Pause Frames Transmitted
+                                                      Counter */
+#define XEMACPS_TX64CNT_OFFSET       0x00000118U /**< Error-free 64 byte Frames
+                                                      Transmitted counter */
+#define XEMACPS_TX65CNT_OFFSET       0x0000011CU /**< Error-free 65-127 byte
+                                                      Frames Transmitted
+                                                      counter */
+#define XEMACPS_TX128CNT_OFFSET      0x00000120U /**< Error-free 128-255 byte
+                                                      Frames Transmitted
+                                                      counter*/
+#define XEMACPS_TX256CNT_OFFSET      0x00000124U /**< Error-free 256-511 byte
+                                                      Frames transmitted
+                                                      counter */
+#define XEMACPS_TX512CNT_OFFSET      0x00000128U /**< Error-free 512-1023 byte
+                                                      Frames transmitted
+                                                      counter */
+#define XEMACPS_TX1024CNT_OFFSET     0x0000012CU /**< Error-free 1024-1518 byte
+                                                      Frames transmitted
+                                                      counter */
+#define XEMACPS_TX1519CNT_OFFSET     0x00000130U /**< Error-free larger than
+                                                      1519 byte Frames
+                                                      transmitted counter */
+#define XEMACPS_TXURUNCNT_OFFSET     0x00000134U /**< TX under run error
+                                                      counter */
+
+#define XEMACPS_SNGLCOLLCNT_OFFSET   0x00000138U /**< Single Collision Frame
+                                                      Counter */
+#define XEMACPS_MULTICOLLCNT_OFFSET  0x0000013CU /**< Multiple Collision Frame
+                                                      Counter */
+#define XEMACPS_EXCESSCOLLCNT_OFFSET 0x00000140U /**< Excessive Collision Frame
+                                                      Counter */
+#define XEMACPS_LATECOLLCNT_OFFSET   0x00000144U /**< Late Collision Frame
+                                                      Counter */
+#define XEMACPS_TXDEFERCNT_OFFSET    0x00000148U /**< Deferred Transmission
+                                                      Frame Counter */
+#define XEMACPS_TXCSENSECNT_OFFSET   0x0000014CU /**< Transmit Carrier Sense
+                                                      Error Counter */
+
+#define XEMACPS_OCTRXL_OFFSET        0x00000150U /**< Octects Received register
+                                                      Low */
+#define XEMACPS_OCTRXH_OFFSET        0x00000154U /**< Octects Received register
+                                                      High */
+
+#define XEMACPS_RXCNT_OFFSET         0x00000158U /**< Error-free Frames
+                                                      Received Counter */
+#define XEMACPS_RXBROADCNT_OFFSET    0x0000015CU /**< Error-free Broadcast
+                                                      Frames Received Counter */
+#define XEMACPS_RXMULTICNT_OFFSET    0x00000160U /**< Error-free Multicast
+                                                      Frames Received Counter */
+#define XEMACPS_RXPAUSECNT_OFFSET    0x00000164U /**< Pause Frames
+                                                      Received Counter */
+#define XEMACPS_RX64CNT_OFFSET       0x00000168U /**< Error-free 64 byte Frames
+                                                      Received Counter */
+#define XEMACPS_RX65CNT_OFFSET       0x0000016CU /**< Error-free 65-127 byte
+                                                      Frames Received Counter */
+#define XEMACPS_RX128CNT_OFFSET      0x00000170U /**< Error-free 128-255 byte
+                                                      Frames Received Counter */
+#define XEMACPS_RX256CNT_OFFSET      0x00000174U /**< Error-free 256-512 byte
+                                                      Frames Received Counter */
+#define XEMACPS_RX512CNT_OFFSET      0x00000178U /**< Error-free 512-1023 byte
+                                                      Frames Received Counter */
+#define XEMACPS_RX1024CNT_OFFSET     0x0000017CU /**< Error-free 1024-1518 byte
+                                                      Frames Received Counter */
+#define XEMACPS_RX1519CNT_OFFSET     0x00000180U /**< Error-free 1519-max byte
+                                                      Frames Received Counter */
+#define XEMACPS_RXUNDRCNT_OFFSET     0x00000184U /**< Undersize Frames Received
+                                                      Counter */
+#define XEMACPS_RXOVRCNT_OFFSET      0x00000188U /**< Oversize Frames Received
+                                                      Counter */
+#define XEMACPS_RXJABCNT_OFFSET      0x0000018CU /**< Jabbers Received
+                                                      Counter */
+#define XEMACPS_RXFCSCNT_OFFSET      0x00000190U /**< Frame Check Sequence
+                                                      Error Counter */
+#define XEMACPS_RXLENGTHCNT_OFFSET   0x00000194U /**< Length Field Error
+                                                      Counter */
+#define XEMACPS_RXSYMBCNT_OFFSET     0x00000198U /**< Symbol Error Counter */
+#define XEMACPS_RXALIGNCNT_OFFSET    0x0000019CU /**< Alignment Error Counter */
+#define XEMACPS_RXRESERRCNT_OFFSET   0x000001A0U /**< Receive Resource Error
+                                                      Counter */
+#define XEMACPS_RXORCNT_OFFSET       0x000001A4U /**< Receive Overrun Counter */
+#define XEMACPS_RXIPCCNT_OFFSET      0x000001A8U /**< IP header Checksum Error
+                                                      Counter */
+#define XEMACPS_RXTCPCCNT_OFFSET     0x000001ACU /**< TCP Checksum Error
+                                                      Counter */
+#define XEMACPS_RXUDPCCNT_OFFSET     0x000001B0U /**< UDP Checksum Error
+                                                      Counter */
+#define XEMACPS_LAST_OFFSET          0x000001B4U /**< Last statistic counter
+						      offset, for clearing */
+
+#define XEMACPS_1588_SEC_OFFSET      0x000001D0U /**< 1588 second counter */
+#define XEMACPS_1588_NANOSEC_OFFSET  0x000001D4U /**< 1588 nanosecond counter */
+#define XEMACPS_1588_ADJ_OFFSET      0x000001D8U /**< 1588 nanosecond
+						      adjustment counter */
+#define XEMACPS_1588_INC_OFFSET      0x000001DCU /**< 1588 nanosecond
+						      increment counter */
+#define XEMACPS_PTP_TXSEC_OFFSET     0x000001E0U /**< 1588 PTP transmit second
+						      counter */
+#define XEMACPS_PTP_TXNANOSEC_OFFSET 0x000001E4U /**< 1588 PTP transmit
+						      nanosecond counter */
+#define XEMACPS_PTP_RXSEC_OFFSET     0x000001E8U /**< 1588 PTP receive second
+						      counter */
+#define XEMACPS_PTP_RXNANOSEC_OFFSET 0x000001ECU /**< 1588 PTP receive
+						      nanosecond counter */
+#define XEMACPS_PTPP_TXSEC_OFFSET    0x000001F0U /**< 1588 PTP peer transmit
+						      second counter */
+#define XEMACPS_PTPP_TXNANOSEC_OFFSET 0x000001F4U /**< 1588 PTP peer transmit
+						      nanosecond counter */
+#define XEMACPS_PTPP_RXSEC_OFFSET    0x000001F8U /**< 1588 PTP peer receive
+						      second counter */
+#define XEMACPS_PTPP_RXNANOSEC_OFFSET 0x000001FCU /**< 1588 PTP peer receive
+						      nanosecond counter */
+
+#define XEMACPS_INTQ1_STS_OFFSET     0x00000400U /**< Interrupt Q1 Status
+							reg */
+#define XEMACPS_TXQ1BASE_OFFSET	     0x00000440U /**< TX Q1 Base address
+							reg */
+#define XEMACPS_RXQ1BASE_OFFSET	     0x00000480U /**< RX Q1 Base address
+							reg */
+#define XEMACPS_MSBBUF_TXQBASE_OFFSET  0x000004C8U /**< MSB Buffer TX Q Base
+							reg */
+#define XEMACPS_MSBBUF_RXQBASE_OFFSET  0x000004D4U /**< MSB Buffer RX Q Base
+							reg */
+#define XEMACPS_INTQ1_IER_OFFSET     0x00000600U /**< Interrupt Q1 Enable
+							reg */
+#define XEMACPS_INTQ1_IDR_OFFSET     0x00000620U /**< Interrupt Q1 Disable
+							reg */
+#define XEMACPS_INTQ1_IMR_OFFSET     0x00000640U /**< Interrupt Q1 Mask
+							reg */
+
+/* Define some bit positions for registers. */
+
+/** @name network control register bit definitions
+ * @{
+ */
+#define XEMACPS_NWCTRL_FLUSH_DPRAM_MASK	0x00040000U /**< Flush a packet from
+							Rx SRAM */
+#define XEMACPS_NWCTRL_ZEROPAUSETX_MASK 0x00000800U /**< Transmit zero quantum
+                                                         pause frame */
+#define XEMACPS_NWCTRL_PAUSETX_MASK     0x00000800U /**< Transmit pause frame */
+#define XEMACPS_NWCTRL_HALTTX_MASK      0x00000400U /**< Halt transmission
+                                                         after current frame */
+#define XEMACPS_NWCTRL_STARTTX_MASK     0x00000200U /**< Start tx (tx_go) */
+
+#define XEMACPS_NWCTRL_STATWEN_MASK     0x00000080U /**< Enable writing to
+                                                         stat counters */
+#define XEMACPS_NWCTRL_STATINC_MASK     0x00000040U /**< Increment statistic
+                                                         registers */
+#define XEMACPS_NWCTRL_STATCLR_MASK     0x00000020U /**< Clear statistic
+                                                         registers */
+#define XEMACPS_NWCTRL_MDEN_MASK        0x00000010U /**< Enable MDIO port */
+#define XEMACPS_NWCTRL_TXEN_MASK        0x00000008U /**< Enable transmit */
+#define XEMACPS_NWCTRL_RXEN_MASK        0x00000004U /**< Enable receive */
+#define XEMACPS_NWCTRL_LOOPEN_MASK      0x00000002U /**< local loopback */
+/*@}*/
+
+/** @name network configuration register bit definitions
+ * @{
+ */
+#define XEMACPS_NWCFG_BADPREAMBEN_MASK 0x20000000U /**< disable rejection of
+                                                        non-standard preamble */
+#define XEMACPS_NWCFG_IPDSTRETCH_MASK  0x10000000U /**< enable transmit IPG */
+#define XEMACPS_NWCFG_SGMIIEN_MASK     0x08000000U /**< SGMII Enable */
+#define XEMACPS_NWCFG_FCSIGNORE_MASK   0x04000000U /**< disable rejection of
+                                                        FCS error */
+#define XEMACPS_NWCFG_HDRXEN_MASK      0x02000000U /**< RX half duplex */
+#define XEMACPS_NWCFG_RXCHKSUMEN_MASK  0x01000000U /**< enable RX checksum
+                                                        offload */
+#define XEMACPS_NWCFG_PAUSECOPYDI_MASK 0x00800000U /**< Do not copy pause
+                                                        Frames to memory */
+#define XEMACPS_NWCFG_DWIDTH_64_MASK   0x00200000U /**< 64 bit Data bus width */
+#define XEMACPS_NWCFG_MDC_SHIFT_MASK   18U	   /**< shift bits for MDC */
+#define XEMACPS_NWCFG_MDCCLKDIV_MASK   0x001C0000U /**< MDC Mask PCLK divisor */
+#define XEMACPS_NWCFG_FCSREM_MASK      0x00020000U /**< Discard FCS from
+                                                        received frames */
+#define XEMACPS_NWCFG_LENERRDSCRD_MASK 0x00010000U
+/**< RX length error discard */
+#define XEMACPS_NWCFG_RXOFFS_MASK      0x0000C000U /**< RX buffer offset */
+#define XEMACPS_NWCFG_PAUSEEN_MASK     0x00002000U /**< Enable pause RX */
+#define XEMACPS_NWCFG_RETRYTESTEN_MASK 0x00001000U /**< Retry test */
+#define XEMACPS_NWCFG_XTADDMACHEN_MASK 0x00000200U
+/**< External address match enable */
+#define XEMACPS_NWCFG_PCSSEL_MASK      0x00000800U /**< PCS Select */
+#define XEMACPS_NWCFG_1000_MASK        0x00000400U /**< 1000 Mbps */
+#define XEMACPS_NWCFG_1536RXEN_MASK    0x00000100U /**< Enable 1536 byte
+                                                        frames reception */
+#define XEMACPS_NWCFG_UCASTHASHEN_MASK 0x00000080U /**< Receive unicast hash
+                                                        frames */
+#define XEMACPS_NWCFG_MCASTHASHEN_MASK 0x00000040U /**< Receive multicast hash
+                                                        frames */
+#define XEMACPS_NWCFG_BCASTDI_MASK     0x00000020U /**< Do not receive
+                                                        broadcast frames */
+#define XEMACPS_NWCFG_COPYALLEN_MASK   0x00000010U /**< Copy all frames */
+#define XEMACPS_NWCFG_JUMBO_MASK       0x00000008U /**< Jumbo frames */
+#define XEMACPS_NWCFG_NVLANDISC_MASK   0x00000004U /**< Receive only VLAN
+                                                        frames */
+#define XEMACPS_NWCFG_FDEN_MASK        0x00000002U/**< full duplex */
+#define XEMACPS_NWCFG_100_MASK         0x00000001U /**< 100 Mbps */
+#define XEMACPS_NWCFG_RESET_MASK       0x00080000U/**< reset value */
+/*@}*/
+
+/** @name network status register bit definitaions
+ * @{
+ */
+#define XEMACPS_NWSR_MDIOIDLE_MASK     0x00000004U /**< PHY management idle */
+#define XEMACPS_NWSR_MDIO_MASK         0x00000002U /**< Status of mdio_in */
+/*@}*/
+
+
+/** @name MAC address register word 1 mask
+ * @{
+ */
+#define XEMACPS_LADDR_MACH_MASK        0x0000FFFFU /**< Address bits[47:32]
+                                                      bit[31:0] are in BOTTOM */
+/*@}*/
+
+
+/** @name DMA control register bit definitions
+ * @{
+ */
+#define XEMACPS_DMACR_ADDR_WIDTH_64		0x40000000U /**< 64 bit address bus */
+#define XEMACPS_DMACR_TXEXTEND_MASK		0x20000000U /**< Tx Extended desc mode */
+#define XEMACPS_DMACR_RXEXTEND_MASK		0x10000000U /**< Rx Extended desc mode */
+#define XEMACPS_DMACR_RXBUF_MASK		0x00FF0000U /**< Mask bit for RX buffer
+													size */
+#define XEMACPS_DMACR_RXBUF_SHIFT 		16U	/**< Shift bit for RX buffer
+												size */
+#define XEMACPS_DMACR_TCPCKSUM_MASK		0x00000800U /**< enable/disable TX
+													    checksum offload */
+#define XEMACPS_DMACR_TXSIZE_MASK		0x00000400U /**< TX buffer memory size */
+#define XEMACPS_DMACR_RXSIZE_MASK		0x00000300U /**< RX buffer memory size */
+#define XEMACPS_DMACR_ENDIAN_MASK		0x00000080U /**< endian configuration */
+#define XEMACPS_DMACR_BLENGTH_MASK		0x0000001FU /**< buffer burst length */
+#define XEMACPS_DMACR_SINGLE_AHB_BURST	0x00000001U /**< single AHB bursts */
+#define XEMACPS_DMACR_INCR4_AHB_BURST	0x00000004U /**< 4 bytes AHB bursts */
+#define XEMACPS_DMACR_INCR8_AHB_BURST	0x00000008U /**< 8 bytes AHB bursts */
+#define XEMACPS_DMACR_INCR16_AHB_BURST	0x00000010U /**< 16 bytes AHB bursts */
+/*@}*/
+
+/** @name transmit status register bit definitions
+ * @{
+ */
+#define XEMACPS_TXSR_HRESPNOK_MASK    0x00000100U /**< Transmit hresp not OK */
+#define XEMACPS_TXSR_URUN_MASK        0x00000040U /**< Transmit underrun */
+#define XEMACPS_TXSR_TXCOMPL_MASK     0x00000020U /**< Transmit completed OK */
+#define XEMACPS_TXSR_BUFEXH_MASK      0x00000010U /**< Transmit buffs exhausted
+                                                       mid frame */
+#define XEMACPS_TXSR_TXGO_MASK        0x00000008U /**< Status of go flag */
+#define XEMACPS_TXSR_RXOVR_MASK       0x00000004U /**< Retry limit exceeded */
+#define XEMACPS_TXSR_FRAMERX_MASK     0x00000002U /**< Collision tx frame */
+#define XEMACPS_TXSR_USEDREAD_MASK    0x00000001U /**< TX buffer used bit set */
+
+#define XEMACPS_TXSR_ERROR_MASK      ((u32)XEMACPS_TXSR_HRESPNOK_MASK | \
+                                       (u32)XEMACPS_TXSR_URUN_MASK | \
+                                       (u32)XEMACPS_TXSR_BUFEXH_MASK | \
+                                       (u32)XEMACPS_TXSR_RXOVR_MASK | \
+                                       (u32)XEMACPS_TXSR_FRAMERX_MASK | \
+                                       (u32)XEMACPS_TXSR_USEDREAD_MASK)
+/*@}*/
+
+/**
+ * @name receive status register bit definitions
+ * @{
+ */
+#define XEMACPS_RXSR_HRESPNOK_MASK    0x00000008U /**< Receive hresp not OK */
+#define XEMACPS_RXSR_RXOVR_MASK       0x00000004U /**< Receive overrun */
+#define XEMACPS_RXSR_FRAMERX_MASK     0x00000002U /**< Frame received OK */
+#define XEMACPS_RXSR_BUFFNA_MASK      0x00000001U /**< RX buffer used bit set */
+
+#define XEMACPS_RXSR_ERROR_MASK      ((u32)XEMACPS_RXSR_HRESPNOK_MASK | \
+                                       (u32)XEMACPS_RXSR_RXOVR_MASK | \
+                                       (u32)XEMACPS_RXSR_BUFFNA_MASK)
+/*@}*/
+
+/**
+ * @name Interrupt Q1 status register bit definitions
+ * @{
+ */
+#define XEMACPS_INTQ1SR_TXCOMPL_MASK	0x00000080U /**< Transmit completed OK */
+#define XEMACPS_INTQ1SR_TXERR_MASK	0x00000040U /**< Transmit AMBA Error */
+
+#define XEMACPS_INTQ1_IXR_ALL_MASK	((u32)XEMACPS_INTQ1SR_TXCOMPL_MASK | \
+					 (u32)XEMACPS_INTQ1SR_TXERR_MASK)
+
+/*@}*/
+
+/**
+ * @name interrupts bit definitions
+ * Bits definitions are same in XEMACPS_ISR_OFFSET,
+ * XEMACPS_IER_OFFSET, XEMACPS_IDR_OFFSET, and XEMACPS_IMR_OFFSET
+ * @{
+ */
+#define XEMACPS_IXR_PTPPSTX_MASK    0x02000000U /**< PTP Psync transmitted */
+#define XEMACPS_IXR_PTPPDRTX_MASK   0x01000000U /**< PTP Pdelay_req
+						     transmitted */
+#define XEMACPS_IXR_PTPSTX_MASK     0x00800000U /**< PTP Sync transmitted */
+#define XEMACPS_IXR_PTPDRTX_MASK    0x00400000U /**< PTP Delay_req transmitted
+						*/
+#define XEMACPS_IXR_PTPPSRX_MASK    0x00200000U /**< PTP Psync received */
+#define XEMACPS_IXR_PTPPDRRX_MASK   0x00100000U /**< PTP Pdelay_req received */
+#define XEMACPS_IXR_PTPSRX_MASK     0x00080000U /**< PTP Sync received */
+#define XEMACPS_IXR_PTPDRRX_MASK    0x00040000U /**< PTP Delay_req received */
+#define XEMACPS_IXR_PAUSETX_MASK    0x00004000U	/**< Pause frame transmitted */
+#define XEMACPS_IXR_PAUSEZERO_MASK  0x00002000U	/**< Pause time has reached
+                                                     zero */
+#define XEMACPS_IXR_PAUSENZERO_MASK 0x00001000U	/**< Pause frame received */
+#define XEMACPS_IXR_HRESPNOK_MASK   0x00000800U	/**< hresp not ok */
+#define XEMACPS_IXR_RXOVR_MASK      0x00000400U	/**< Receive overrun occurred */
+#define XEMACPS_IXR_TXCOMPL_MASK    0x00000080U	/**< Frame transmitted ok */
+#define XEMACPS_IXR_TXEXH_MASK      0x00000040U	/**< Transmit err occurred or
+                                                     no buffers*/
+#define XEMACPS_IXR_RETRY_MASK      0x00000020U	/**< Retry limit exceeded */
+#define XEMACPS_IXR_URUN_MASK       0x00000010U	/**< Transmit underrun */
+#define XEMACPS_IXR_TXUSED_MASK     0x00000008U	/**< Tx buffer used bit read */
+#define XEMACPS_IXR_RXUSED_MASK     0x00000004U	/**< Rx buffer used bit read */
+#define XEMACPS_IXR_FRAMERX_MASK    0x00000002U	/**< Frame received ok */
+#define XEMACPS_IXR_MGMNT_MASK      0x00000001U	/**< PHY management complete */
+#define XEMACPS_IXR_ALL_MASK        0x00007FFFU	/**< Everything! */
+
+#define XEMACPS_IXR_TX_ERR_MASK    ((u32)XEMACPS_IXR_TXEXH_MASK |         \
+                                     (u32)XEMACPS_IXR_RETRY_MASK |         \
+                                     (u32)XEMACPS_IXR_URUN_MASK)
+
+
+#define XEMACPS_IXR_RX_ERR_MASK    ((u32)XEMACPS_IXR_HRESPNOK_MASK |      \
+                                     (u32)XEMACPS_IXR_RXUSED_MASK |        \
+                                     (u32)XEMACPS_IXR_RXOVR_MASK)
+
+/*@}*/
+
+/** @name PHY Maintenance bit definitions
+ * @{
+ */
+#define XEMACPS_PHYMNTNC_OP_MASK    0x40020000U	/**< operation mask bits */
+#define XEMACPS_PHYMNTNC_OP_R_MASK  0x20000000U	/**< read operation */
+#define XEMACPS_PHYMNTNC_OP_W_MASK  0x10000000U	/**< write operation */
+#define XEMACPS_PHYMNTNC_ADDR_MASK  0x0F800000U	/**< Address bits */
+#define XEMACPS_PHYMNTNC_REG_MASK   0x007C0000U	/**< register bits */
+#define XEMACPS_PHYMNTNC_DATA_MASK  0x00000FFFU	/**< data bits */
+#define XEMACPS_PHYMNTNC_PHAD_SHFT_MSK   23U	/**< Shift bits for PHYAD */
+#define XEMACPS_PHYMNTNC_PREG_SHFT_MSK   18U	/**< Shift bits for PHREG */
+/*@}*/
+
+/* Transmit buffer descriptor status words offset
+ * @{
+ */
+#define XEMACPS_BD_ADDR_OFFSET  0x00000000U /**< word 0/addr of BDs */
+#define XEMACPS_BD_STAT_OFFSET  0x00000004U /**< word 1/status of BDs */
+#define XEMACPS_BD_ADDR_HI_OFFSET  0x00000008U /**< word 2/addr of BDs */
+
+/*
+ * @}
+ */
+
+/* Transmit buffer descriptor status words bit positions.
+ * Transmit buffer descriptor consists of two 32-bit registers,
+ * the first - word0 contains a 32-bit address pointing to the location of
+ * the transmit data.
+ * The following register - word1, consists of various information to control
+ * the XEmacPs transmit process.  After transmit, this is updated with status
+ * information, whether the frame was transmitted OK or why it had failed.
+ * @{
+ */
+#define XEMACPS_TXBUF_USED_MASK  0x80000000U /**< Used bit. */
+#define XEMACPS_TXBUF_WRAP_MASK  0x40000000U /**< Wrap bit, last descriptor */
+#define XEMACPS_TXBUF_RETRY_MASK 0x20000000U /**< Retry limit exceeded */
+#define XEMACPS_TXBUF_URUN_MASK  0x10000000U /**< Transmit underrun occurred */
+#define XEMACPS_TXBUF_EXH_MASK   0x08000000U /**< Buffers exhausted */
+#define XEMACPS_TXBUF_TCP_MASK   0x04000000U /**< Late collision. */
+#define XEMACPS_TXBUF_NOCRC_MASK 0x00010000U /**< No CRC */
+#define XEMACPS_TXBUF_LAST_MASK  0x00008000U /**< Last buffer */
+#define XEMACPS_TXBUF_LEN_MASK   0x00003FFFU /**< Mask for length field */
+/*
+ * @}
+ */
+
+/* Receive buffer descriptor status words bit positions.
+ * Receive buffer descriptor consists of two 32-bit registers,
+ * the first - word0 contains a 32-bit word aligned address pointing to the
+ * address of the buffer. The lower two bits make up the wrap bit indicating
+ * the last descriptor and the ownership bit to indicate it has been used by
+ * the XEmacPs.
+ * The following register - word1, contains status information regarding why
+ * the frame was received (the filter match condition) as well as other
+ * useful info.
+ * @{
+ */
+#define XEMACPS_RXBUF_BCAST_MASK     0x80000000U /**< Broadcast frame */
+#define XEMACPS_RXBUF_MULTIHASH_MASK 0x40000000U /**< Multicast hashed frame */
+#define XEMACPS_RXBUF_UNIHASH_MASK   0x20000000U /**< Unicast hashed frame */
+#define XEMACPS_RXBUF_EXH_MASK       0x08000000U /**< buffer exhausted */
+#define XEMACPS_RXBUF_AMATCH_MASK    0x06000000U /**< Specific address
+                                                      matched */
+#define XEMACPS_RXBUF_IDFOUND_MASK   0x01000000U /**< Type ID matched */
+#define XEMACPS_RXBUF_IDMATCH_MASK   0x00C00000U /**< ID matched mask */
+#define XEMACPS_RXBUF_VLAN_MASK      0x00200000U /**< VLAN tagged */
+#define XEMACPS_RXBUF_PRI_MASK       0x00100000U /**< Priority tagged */
+#define XEMACPS_RXBUF_VPRI_MASK      0x000E0000U /**< Vlan priority */
+#define XEMACPS_RXBUF_CFI_MASK       0x00010000U /**< CFI frame */
+#define XEMACPS_RXBUF_EOF_MASK       0x00008000U /**< End of frame. */
+#define XEMACPS_RXBUF_SOF_MASK       0x00004000U /**< Start of frame. */
+#define XEMACPS_RXBUF_LEN_MASK       0x00001FFFU /**< Mask for length field */
+#define XEMACPS_RXBUF_LEN_JUMBO_MASK 0x00003FFFU /**< Mask for jumbo length */
+
+#define XEMACPS_RXBUF_WRAP_MASK      0x00000002U /**< Wrap bit, last BD */
+#define XEMACPS_RXBUF_NEW_MASK       0x00000001U /**< Used bit.. */
+#define XEMACPS_RXBUF_ADD_MASK       0xFFFFFFFCU /**< Mask for address */
+/*
+ * @}
+ */
+
+/*
+ * Define appropriate I/O access method to memory mapped I/O or other
+ * interface if necessary.
+ */
+
+#define XEmacPs_In32  Xil_In32
+#define XEmacPs_Out32 Xil_Out32
+
+
+/****************************************************************************/
+/**
+*
+* Read the given register.
+*
+* @param    BaseAddress is the base address of the device
+* @param    RegOffset is the register offset to be read
+*
+* @return   The 32-bit value of the register
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+*****************************************************************************/
+#define XEmacPs_ReadReg(BaseAddress, RegOffset) \
+    XEmacPs_In32((BaseAddress) + (u32)(RegOffset))
+
+
+/****************************************************************************/
+/**
+*
+* Write the given register.
+*
+* @param    BaseAddress is the base address of the device
+* @param    RegOffset is the register offset to be written
+* @param    Data is the 32-bit value to write to the register
+*
+* @return   None.
+*
+* @note
+* C-style signature:
+*    void XEmacPs_WriteReg(u32 BaseAddress, u32 RegOffset,
+*         u32 Data)
+*
+*****************************************************************************/
+#define XEmacPs_WriteReg(BaseAddress, RegOffset, Data) \
+    XEmacPs_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data))
+
+/************************** Function Prototypes *****************************/
+/*
+ * Perform reset operation to the emacps interface
+ */
+void XEmacPs_ResetHw(u32 BaseAddr);
+
+#ifdef __cplusplus
+  }
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xenv.h b/src/Xilinx/include/xenv.h
new file mode 100644
index 0000000..3d97beb
--- /dev/null
+++ b/src/Xilinx/include/xenv.h
@@ -0,0 +1,187 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xenv.h
+*
+* Defines common services that are typically found in a host operating.
+* environment. This include file simply includes an OS specific file based
+* on the compile-time constant BUILD_ENV_*, where * is the name of the target
+* environment.
+*
+* All services are defined as macros.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00b ch   10/24/02 Added XENV_LINUX
+* 1.00a rmm  04/17/02 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XENV_H /* prevent circular inclusions */
+#define XENV_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Select which target environment we are operating under
+ */
+
+/* VxWorks target environment */
+#if defined XENV_VXWORKS
+#include "xenv_vxworks.h"
+
+/* Linux target environment */
+#elif defined XENV_LINUX
+#include "xenv_linux.h"
+
+/* Unit test environment */
+#elif defined XENV_UNITTEST
+#include "ut_xenv.h"
+
+/* Integration test environment */
+#elif defined XENV_INTTEST
+#include "int_xenv.h"
+
+/* Standalone environment selected */
+#else
+#include "xenv_standalone.h"
+#endif
+
+
+/*
+ * The following comments specify the types and macro wrappers that are
+ * expected to be defined by the target specific header files
+ */
+
+/**************************** Type Definitions *******************************/
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP
+ *
+ * A structure that contains a time stamp used by other time stamp macros
+ * defined below. This structure is processor dependent.
+ */
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_MEM_COPY(void *DestPtr, void *SrcPtr, unsigned Bytes)
+ *
+ * Copies a non-overlapping block of memory.
+ *
+ * @param   DestPtr is the destination address to copy data to.
+ * @param   SrcPtr is the source address to copy data from.
+ * @param   Bytes is the number of bytes to copy.
+ *
+ * @return  None
+ */
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_MEM_FILL(void *DestPtr, char Data, unsigned Bytes)
+ *
+ * Fills an area of memory with constant data.
+ *
+ * @param   DestPtr is the destination address to set.
+ * @param   Data contains the value to set.
+ * @param   Bytes is the number of bytes to set.
+ *
+ * @return  None
+ */
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP_GET(XTIME_STAMP *StampPtr)
+ *
+ * Samples the processor's or external timer's time base counter.
+ *
+ * @param   StampPtr is the storage for the retrieved time stamp.
+ *
+ * @return  None
+ */
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP_DELTA_US(XTIME_STAMP *Stamp1Ptr, XTIME_STAMP* Stamp2Ptr)
+ *
+ * Computes the delta between the two time stamps.
+ *
+ * @param   Stamp1Ptr - First sampled time stamp.
+ * @param   Stamp1Ptr - Sedond sampled time stamp.
+ *
+ * @return  An unsigned int value with units of microseconds.
+ */
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP_DELTA_MS(XTIME_STAMP *Stamp1Ptr, XTIME_STAMP* Stamp2Ptr)
+ *
+ * Computes the delta between the two time stamps.
+ *
+ * @param   Stamp1Ptr - First sampled time stamp.
+ * @param   Stamp1Ptr - Sedond sampled time stamp.
+ *
+ * @return  An unsigned int value with units of milliseconds.
+ */
+
+/*****************************************************************************//**
+ *
+ * XENV_USLEEP(unsigned delay)
+ *
+ * Delay the specified number of microseconds.
+ *
+ * @param   delay is the number of microseconds to delay.
+ *
+ * @return  None
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif            /* end of protection macro */
diff --git a/src/Xilinx/include/xenv_standalone.h b/src/Xilinx/include/xenv_standalone.h
new file mode 100644
index 0000000..f186018
--- /dev/null
+++ b/src/Xilinx/include/xenv_standalone.h
@@ -0,0 +1,368 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xenv_standalone.h
+*
+* Defines common services specified by xenv.h.
+*
+* @note
+* 	This file is not intended to be included directly by driver code.
+* 	Instead, the generic xenv.h file is intended to be included by driver
+* 	code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a wgr  02/28/07 Added cache handling macros.
+* 1.00a wgr  02/27/07 Simplified code. Deprecated old-style macro names.
+* 1.00a rmm  01/24/06 Implemented XENV_USLEEP. Assume implementation is being
+*                     used under Xilinx standalone BSP.
+* 1.00a xd   11/03/04 Improved support for doxygen.
+* 1.00a rmm  03/21/02 First release
+* 1.00a wgr  03/22/07 Converted to new coding style.
+* 1.00a rpm  06/29/07 Added udelay macro for standalone
+* 1.00a xd   07/19/07 Included xparameters.h as XPAR_ constants are referred
+*                     to in MICROBLAZE section
+* 1.00a ecm  09/19/08 updated for v7.20 of Microblaze, new functionality
+*
+* 

+*
+*
+******************************************************************************/
+
+#ifndef XENV_STANDALONE_H
+#define XENV_STANDALONE_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+/******************************************************************************
+ *
+ * Get the processor dependent includes
+ *
+ ******************************************************************************/
+
+#include 
+
+#if defined __MICROBLAZE__
+#  include "mb_interface.h"
+#  include "xparameters.h"   /* XPAR constants used below in MB section */
+
+#elif defined __PPC__
+#  include "sleep.h"
+#  include "xcache_l.h"      /* also include xcache_l.h for caching macros */
+#endif
+
+/******************************************************************************
+ *
+ * MEMCPY / MEMSET related macros.
+ *
+ * The following are straight forward implementations of memset and memcpy.
+ *
+ * NOTE: memcpy may not work if source and target memory area are overlapping.
+ *
+ ******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * Copies a non-overlapping block of memory.
+ *
+ * @param	DestPtr
+ *		Destination address to copy data to.
+ *
+ * @param	SrcPtr
+ * 		Source address to copy data from.
+ *
+ * @param	Bytes
+ * 		Number of bytes to copy.
+ *
+ * @return	None.
+ *
+ * @note
+ * 		The use of XENV_MEM_COPY is deprecated. Use memcpy() instead.
+ *
+ * @note
+ * 		This implemention MAY BREAK work if source and target memory
+ * 		area are overlapping.
+ *
+ *****************************************************************************/
+
+#define XENV_MEM_COPY(DestPtr, SrcPtr, Bytes) \
+	memcpy((void *) DestPtr, (const void *) SrcPtr, (size_t) Bytes)
+
+
+
+/*****************************************************************************/
+/**
+ *
+ * Fills an area of memory with constant data.
+ *
+ * @param	DestPtr
+ *		Destination address to copy data to.
+ *
+ * @param	Data
+ * 		Value to set.
+ *
+ * @param	Bytes
+ * 		Number of bytes to copy.
+ *
+ * @return	None.
+ *
+ * @note
+ * 		The use of XENV_MEM_FILL is deprecated. Use memset() instead.
+ *
+ *****************************************************************************/
+
+#define XENV_MEM_FILL(DestPtr, Data, Bytes) \
+	memset((void *) DestPtr, (s32) Data, (size_t) Bytes)
+
+
+
+/******************************************************************************
+ *
+ * TIME related macros
+ *
+ ******************************************************************************/
+
+/**
+ * A structure that contains a time stamp used by other time stamp macros
+ * defined below. This structure is processor dependent.
+ */
+typedef s32 XENV_TIME_STAMP;
+
+/*****************************************************************************/
+/**
+ *
+ * Time is derived from the 64 bit PPC timebase register
+ *
+ * @param   StampPtr is the storage for the retrieved time stamp.
+ *
+ * @return  None.
+ *
+ * @note
+ *
+ * Signature: void XENV_TIME_STAMP_GET(XTIME_STAMP *StampPtr)
+ * 


+ * This macro must be implemented by the user.
+ *
+ *****************************************************************************/
+#define XENV_TIME_STAMP_GET(StampPtr)
+
+/*****************************************************************************/
+/**
+ *
+ * This macro is not yet implemented and always returns 0.
+ *
+ * @param   Stamp1Ptr is the first sampled time stamp.
+ * @param   Stamp2Ptr is the second sampled time stamp.
+ *
+ * @return  0
+ *
+ * @note
+ *
+ * This macro must be implemented by the user.
+ *
+ *****************************************************************************/
+#define XENV_TIME_STAMP_DELTA_US(Stamp1Ptr, Stamp2Ptr)     (0)
+
+/*****************************************************************************/
+/**
+ *
+ * This macro is not yet implemented and always returns 0.
+ *
+ * @param   Stamp1Ptr is the first sampled time stamp.
+ * @param   Stamp2Ptr is the second sampled time stamp.
+ *
+ * @return  0
+ *
+ * @note
+ *
+ * This macro must be implemented by the user.
+ *
+ *****************************************************************************/
+#define XENV_TIME_STAMP_DELTA_MS(Stamp1Ptr, Stamp2Ptr)     (0)
+
+/*****************************************************************************/
+/**
+ * XENV_USLEEP(unsigned delay)
+ *
+ * Delay the specified number of microseconds. Not implemented without OS
+ * support.
+ *
+ * @param	delay
+ * 		Number of microseconds to delay.
+ *
+ * @return	None.
+ *
+ *****************************************************************************/
+
+#ifdef __PPC__
+#define XENV_USLEEP(delay)	usleep(delay)
+#define udelay(delay)	usleep(delay)
+#else
+#define XENV_USLEEP(delay)
+#define udelay(delay)
+#endif
+
+
+/******************************************************************************
+ *
+ * CACHE handling macros / mappings
+ *
+ ******************************************************************************/
+/******************************************************************************
+ *
+ * Processor independent macros
+ *
+ ******************************************************************************/
+
+#define XCACHE_ENABLE_CACHE()	\
+		{ XCACHE_ENABLE_DCACHE(); XCACHE_ENABLE_ICACHE(); }
+
+#define XCACHE_DISABLE_CACHE()	\
+		{ XCACHE_DISABLE_DCACHE(); XCACHE_DISABLE_ICACHE(); }
+
+
+/******************************************************************************
+ *
+ * MicroBlaze case
+ *
+ * NOTE: Currently the following macros will only work on systems that contain
+ * only ONE MicroBlaze processor. Also, the macros will only be enabled if the
+ * system is built using a xparameters.h file.
+ *
+ ******************************************************************************/
+
+#if defined __MICROBLAZE__
+
+/* Check if MicroBlaze data cache was built into the core.
+ */
+#if (XPAR_MICROBLAZE_USE_DCACHE == 1)
+#  define XCACHE_ENABLE_DCACHE()		microblaze_enable_dcache()
+#  define XCACHE_DISABLE_DCACHE()		microblaze_disable_dcache()
+#  define XCACHE_INVALIDATE_DCACHE()  	microblaze_invalidate_dcache()
+
+#  define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
+			microblaze_invalidate_dcache_range((s32)(Addr), (s32)(Len))
+
+#if (XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK == 1)
+#  define XCACHE_FLUSH_DCACHE()  		microblaze_flush_dcache()
+#  define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
+			microblaze_flush_dcache_range((s32)(Addr), (s32)(Len))
+#else
+#  define XCACHE_FLUSH_DCACHE()  		microblaze_invalidate_dcache()
+#  define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
+			microblaze_invalidate_dcache_range((s32)(Addr), (s32)(Len))
+#endif	/*XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK*/
+
+#else
+#  define XCACHE_ENABLE_DCACHE()
+#  define XCACHE_DISABLE_DCACHE()
+#  define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len)
+#  define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len)
+#endif	/*XPAR_MICROBLAZE_USE_DCACHE*/
+
+
+/* Check if MicroBlaze instruction cache was built into the core.
+ */
+#if (XPAR_MICROBLAZE_USE_ICACHE == 1)
+#  define XCACHE_ENABLE_ICACHE()		microblaze_enable_icache()
+#  define XCACHE_DISABLE_ICACHE()		microblaze_disable_icache()
+
+#  define XCACHE_INVALIDATE_ICACHE()  	microblaze_invalidate_icache()
+
+#  define XCACHE_INVALIDATE_ICACHE_RANGE(Addr, Len) \
+			microblaze_invalidate_icache_range((s32)(Addr), (s32)(Len))
+
+#else
+#  define XCACHE_ENABLE_ICACHE()
+#  define XCACHE_DISABLE_ICACHE()
+#endif	/*XPAR_MICROBLAZE_USE_ICACHE*/
+
+
+/******************************************************************************
+ *
+ * PowerPC case
+ *
+ *   Note that the XCACHE_ENABLE_xxx functions are hardcoded to enable a
+ *   specific memory region (0x80000001). Each bit (0-30) in the regions
+ *   bitmask stands for 128MB of memory. Bit 31 stands for the upper 2GB
+ *   range.
+ *
+ *   regions    --> cached address range
+ *   ------------|--------------------------------------------------
+ *   0x80000000  | [0, 0x7FFFFFF]
+ *   0x00000001  | [0xF8000000, 0xFFFFFFFF]
+ *   0x80000001  | [0, 0x7FFFFFF],[0xF8000000, 0xFFFFFFFF]
+ *
+ ******************************************************************************/
+
+#elif defined __PPC__
+
+#define XCACHE_ENABLE_DCACHE()		XCache_EnableDCache(0x80000001)
+#define XCACHE_DISABLE_DCACHE()		XCache_DisableDCache()
+#define XCACHE_ENABLE_ICACHE()		XCache_EnableICache(0x80000001)
+#define XCACHE_DISABLE_ICACHE()		XCache_DisableICache()
+
+#define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
+		XCache_InvalidateDCacheRange((u32)(Addr), (u32)(Len))
+
+#define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
+		XCache_FlushDCacheRange((u32)(Addr), (u32)(Len))
+
+#define XCACHE_INVALIDATE_ICACHE()	XCache_InvalidateICache()
+
+
+/******************************************************************************
+ *
+ * Unknown processor / architecture
+ *
+ ******************************************************************************/
+
+#else
+/* #error "Unknown processor / architecture. Must be MicroBlaze or PowerPC." */
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* #ifndef XENV_STANDALONE_H */
diff --git a/src/Xilinx/include/xfpd_slcr.h b/src/Xilinx/include/xfpd_slcr.h
new file mode 100644
index 0000000..b565b95
--- /dev/null
+++ b/src/Xilinx/include/xfpd_slcr.h
@@ -0,0 +1,382 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_SLCR_H__
+#define __XFPD_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdSlcr Base Address
+ */
+#define XFPD_SLCR_BASEADDR      0xFD610000UL
+
+/**
+ * Register: XfpdSlcrWprot0
+ */
+#define XFPD_SLCR_WPROT0    ( ( XFPD_SLCR_BASEADDR ) + 0x00000000UL )
+#define XFPD_SLCR_WPROT0_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_WPROT0_ACT_SHIFT   0UL
+#define XFPD_SLCR_WPROT0_ACT_WIDTH   1UL
+#define XFPD_SLCR_WPROT0_ACT_MASK    0x00000001UL
+#define XFPD_SLCR_WPROT0_ACT_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrCtrl
+ */
+#define XFPD_SLCR_CTRL    ( ( XFPD_SLCR_BASEADDR ) + 0x00000004UL )
+#define XFPD_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIsr
+ */
+#define XFPD_SLCR_ISR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000008UL )
+#define XFPD_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrImr
+ */
+#define XFPD_SLCR_IMR    ( ( XFPD_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XFPD_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrIer
+ */
+#define XFPD_SLCR_IER    ( ( XFPD_SLCR_BASEADDR ) + 0x00000010UL )
+#define XFPD_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIdr
+ */
+#define XFPD_SLCR_IDR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000014UL )
+#define XFPD_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrItr
+ */
+#define XFPD_SLCR_ITR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000018UL )
+#define XFPD_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrWdtClkSel
+ */
+#define XFPD_SLCR_WDT_CLK_SEL    ( ( XFPD_SLCR_BASEADDR ) + 0x00000100UL )
+#define XFPD_SLCR_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_WDT_CLK_SEL_SHIFT   0UL
+#define XFPD_SLCR_WDT_CLK_SEL_WIDTH   1UL
+#define XFPD_SLCR_WDT_CLK_SEL_MASK    0x00000001UL
+#define XFPD_SLCR_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIntFpd
+ */
+#define XFPD_SLCR_INT_FPD    ( ( XFPD_SLCR_BASEADDR ) + 0x00000200UL )
+#define XFPD_SLCR_INT_FPD_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_INT_FPD_GFM_SEL_SHIFT   0UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_WIDTH   1UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_MASK    0x00000001UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrGpu
+ */
+#define XFPD_SLCR_GPU    ( ( XFPD_SLCR_BASEADDR ) + 0x0000100CUL )
+#define XFPD_SLCR_GPU_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_GPU_ARCACHE_SHIFT   7UL
+#define XFPD_SLCR_GPU_ARCACHE_WIDTH   4UL
+#define XFPD_SLCR_GPU_ARCACHE_MASK    0x00000780UL
+#define XFPD_SLCR_GPU_ARCACHE_DEFVAL  0x0UL
+
+#define XFPD_SLCR_GPU_AWCACHE_SHIFT   3UL
+#define XFPD_SLCR_GPU_AWCACHE_WIDTH   4UL
+#define XFPD_SLCR_GPU_AWCACHE_MASK    0x00000078UL
+#define XFPD_SLCR_GPU_AWCACHE_DEFVAL  0x0UL
+
+#define XFPD_SLCR_GPU_PP1_IDLE_SHIFT   2UL
+#define XFPD_SLCR_GPU_PP1_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_PP1_IDLE_MASK    0x00000004UL
+#define XFPD_SLCR_GPU_PP1_IDLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GPU_PP0_IDLE_SHIFT   1UL
+#define XFPD_SLCR_GPU_PP0_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_PP0_IDLE_MASK    0x00000002UL
+#define XFPD_SLCR_GPU_PP0_IDLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GPU_IDLE_SHIFT   0UL
+#define XFPD_SLCR_GPU_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_IDLE_MASK    0x00000001UL
+#define XFPD_SLCR_GPU_IDLE_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrGdmaCfg
+ */
+#define XFPD_SLCR_GDMA_CFG    ( ( XFPD_SLCR_BASEADDR ) + 0x00003000UL )
+#define XFPD_SLCR_GDMA_CFG_RSTVAL   0x00000048UL
+
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_SHIFT   5UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_WIDTH   2UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_MASK    0x00000060UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_DEFVAL  0x2UL
+
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_SHIFT   0UL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_WIDTH   5UL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_MASK    0x0000001fUL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_DEFVAL  0x8UL
+
+/**
+ * Register: XfpdSlcrGdma
+ */
+#define XFPD_SLCR_GDMA    ( ( XFPD_SLCR_BASEADDR ) + 0x00003010UL )
+#define XFPD_SLCR_GDMA_RSTVAL   0x00003b3bUL
+
+#define XFPD_SLCR_GDMA_RAM1_EMAB_SHIFT   12UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_MASK    0x00007000UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM1_EMASA_SHIFT   11UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_WIDTH   1UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_MASK    0x00000800UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GDMA_RAM1_EMAA_SHIFT   8UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_MASK    0x00000700UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMAB_SHIFT   4UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_MASK    0x00000070UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMASA_SHIFT   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_WIDTH   1UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_MASK    0x00000008UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMAA_SHIFT   0UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_MASK    0x00000007UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_DEFVAL  0x3UL
+
+/**
+ * Register: XfpdSlcrAfiFs
+ */
+#define XFPD_SLCR_AFI_FS    ( ( XFPD_SLCR_BASEADDR ) + 0x00005000UL )
+#define XFPD_SLCR_AFI_FS_RSTVAL   0x00000a00UL
+
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_SHIFT   10UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_WIDTH   2UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_MASK    0x00000c00UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_DEFVAL  0x2UL
+
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_SHIFT   8UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_WIDTH   2UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_MASK    0x00000300UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_DEFVAL  0x2UL
+
+/**
+ * Register: XfpdSlcrErrAtbIsr
+ */
+#define XFPD_SLCR_ERR_ATB_ISR    ( ( XFPD_SLCR_BASEADDR ) + 0x00006000UL )
+#define XFPD_SLCR_ERR_ATB_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrErrAtbImr
+ */
+#define XFPD_SLCR_ERR_ATB_IMR    ( ( XFPD_SLCR_BASEADDR ) + 0x00006004UL )
+#define XFPD_SLCR_ERR_ATB_IMR_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrErrAtbIer
+ */
+#define XFPD_SLCR_ERR_ATB_IER    ( ( XFPD_SLCR_BASEADDR ) + 0x00006008UL )
+#define XFPD_SLCR_ERR_ATB_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrErrAtbIdr
+ */
+#define XFPD_SLCR_ERR_ATB_IDR    ( ( XFPD_SLCR_BASEADDR ) + 0x0000600CUL )
+#define XFPD_SLCR_ERR_ATB_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrAtbCmdstore
+ */
+#define XFPD_SLCR_ATB_CMDSTORE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006010UL )
+#define XFPD_SLCR_ATB_CMDSTORE_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrAtbRespEn
+ */
+#define XFPD_SLCR_ATB_RESP_EN    ( ( XFPD_SLCR_BASEADDR ) + 0x00006014UL )
+#define XFPD_SLCR_ATB_RESP_EN_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrAtbResptype
+ */
+#define XFPD_SLCR_ATB_RESPTYPE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006018UL )
+#define XFPD_SLCR_ATB_RESPTYPE_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrAtbPrescale
+ */
+#define XFPD_SLCR_ATB_PRESCALE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006020UL )
+#define XFPD_SLCR_ATB_PRESCALE_RSTVAL   0x0000ffffUL
+
+#define XFPD_SLCR_ATB_PRESCALE_EN_SHIFT   16UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_WIDTH   1UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_MASK    0x00010000UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_PRESCALE_VAL_SHIFT   0UL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_WIDTH   16UL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_MASK    0x0000ffffUL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_DEFVAL  0xffffUL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_SLCR_H__ */
diff --git a/src/Xilinx/include/xfpd_slcr_secure.h b/src/Xilinx/include/xfpd_slcr_secure.h
new file mode 100644
index 0000000..6541a4f
--- /dev/null
+++ b/src/Xilinx/include/xfpd_slcr_secure.h
@@ -0,0 +1,277 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_SLCR_SECURE_H__
+#define __XFPD_SLCR_SECURE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdSlcrSecure Base Address
+ */
+#define XFPD_SLCR_SECURE_BASEADDR      0xFD690000UL
+
+/**
+ * Register: XfpdSlcrSecCtrl
+ */
+#define XFPD_SLCR_SEC_CTRL    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000004UL )
+#define XFPD_SLCR_SEC_CTRL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_SHIFT   0UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_WIDTH   1UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecIsr
+ */
+#define XFPD_SLCR_SEC_ISR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000008UL )
+#define XFPD_SLCR_SEC_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecImr
+ */
+#define XFPD_SLCR_SEC_IMR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x0000000CUL )
+#define XFPD_SLCR_SEC_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecIer
+ */
+#define XFPD_SLCR_SEC_IER    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000010UL )
+#define XFPD_SLCR_SEC_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecIdr
+ */
+#define XFPD_SLCR_SEC_IDR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000014UL )
+#define XFPD_SLCR_SEC_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecItr
+ */
+#define XFPD_SLCR_SEC_ITR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000018UL )
+#define XFPD_SLCR_SEC_ITR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecSata
+ */
+#define XFPD_SLCR_SEC_SATA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000020UL )
+#define XFPD_SLCR_SEC_SATA_RSTVAL   0x0000000eUL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_SHIFT   3UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_MASK    0x00000008UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_SHIFT   2UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_MASK    0x00000004UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_SHIFT   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_MASK    0x00000002UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_EN_SHIFT   0UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecPcie
+ */
+#define XFPD_SLCR_SEC_PCIE    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000030UL )
+#define XFPD_SLCR_SEC_PCIE_RSTVAL   0x01ffffffUL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_SHIFT   24UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_MASK    0x01000000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_SHIFT   23UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_MASK    0x00800000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_SHIFT   22UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_MASK    0x00400000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_SHIFT   21UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_MASK    0x00200000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_SHIFT   20UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_MASK    0x00100000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_SHIFT   19UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_MASK    0x00080000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_SHIFT   18UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_MASK    0x00040000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_SHIFT   17UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_MASK    0x00020000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_SHIFT   16UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_MASK    0x00010000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_SHIFT   15UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_MASK    0x00008000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_SHIFT   14UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_MASK    0x00004000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_SHIFT   13UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_MASK    0x00002000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_SHIFT   12UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_MASK    0x00001000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_SHIFT   11UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_MASK    0x00000800UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_SHIFT   10UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_MASK    0x00000400UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_SHIFT   9UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_MASK    0x00000200UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_SHIFT   8UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_MASK    0x00000100UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_SHIFT   7UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_MASK    0x00000080UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_SHIFT   6UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_MASK    0x00000040UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_SHIFT   5UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_MASK    0x00000020UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_SHIFT   4UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_MASK    0x00000010UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_SHIFT   3UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_MASK    0x00000008UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_SHIFT   2UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_MASK    0x00000004UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_SHIFT   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_MASK    0x00000002UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_SHIFT   0UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecDpdma
+ */
+#define XFPD_SLCR_SEC_DPDMA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000040UL )
+#define XFPD_SLCR_SEC_DPDMA_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_SEC_DPDMA_TZ_SHIFT   0UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_WIDTH   1UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecGdma
+ */
+#define XFPD_SLCR_SEC_GDMA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000050UL )
+#define XFPD_SLCR_SEC_GDMA_RSTVAL   0x000000ffUL
+
+#define XFPD_SLCR_SEC_GDMA_TZ_SHIFT   0UL
+#define XFPD_SLCR_SEC_GDMA_TZ_WIDTH   8UL
+#define XFPD_SLCR_SEC_GDMA_TZ_MASK    0x000000ffUL
+#define XFPD_SLCR_SEC_GDMA_TZ_DEFVAL  0xffUL
+
+/**
+ * Register: XfpdSlcrSecGic
+ */
+#define XFPD_SLCR_SEC_GIC    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000060UL )
+#define XFPD_SLCR_SEC_GIC_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_SHIFT   0UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_WIDTH   1UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_SLCR_SECURE_H__ */
diff --git a/src/Xilinx/include/xfpd_xmpu_cfg.h b/src/Xilinx/include/xfpd_xmpu_cfg.h
new file mode 100644
index 0000000..75aef19
--- /dev/null
+++ b/src/Xilinx/include/xfpd_xmpu_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_XMPU_CFG_H__
+#define __XFPD_XMPU_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdXmpuCfg Base Address
+ */
+#define XFPD_XMPU_CFG_BASEADDR      0xFD5D0000UL
+
+/**
+ * Register: XfpdXmpuCfgCtrl
+ */
+#define XFPD_XMPU_CFG_CTRL    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000000UL )
+#define XFPD_XMPU_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuCfgErrSts1
+ */
+#define XFPD_XMPU_CFG_ERR_STS1    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000004UL )
+#define XFPD_XMPU_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgErrSts2
+ */
+#define XFPD_XMPU_CFG_ERR_STS2    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000008UL )
+#define XFPD_XMPU_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgPoison
+ */
+#define XFPD_XMPU_CFG_POISON    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000000CUL )
+#define XFPD_XMPU_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_POISON_BASE_SHIFT   0UL
+#define XFPD_XMPU_CFG_POISON_BASE_WIDTH   20UL
+#define XFPD_XMPU_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XFPD_XMPU_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgIsr
+ */
+#define XFPD_XMPU_CFG_ISR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000010UL )
+#define XFPD_XMPU_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgImr
+ */
+#define XFPD_XMPU_CFG_IMR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000014UL )
+#define XFPD_XMPU_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuCfgIen
+ */
+#define XFPD_XMPU_CFG_IEN    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000018UL )
+#define XFPD_XMPU_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgIds
+ */
+#define XFPD_XMPU_CFG_IDS    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000001CUL )
+#define XFPD_XMPU_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgLock
+ */
+#define XFPD_XMPU_CFG_LOCK    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000020UL )
+#define XFPD_XMPU_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00Strt
+ */
+#define XFPD_XMPU_CFG_R00_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000100UL )
+#define XFPD_XMPU_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00End
+ */
+#define XFPD_XMPU_CFG_R00_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000104UL )
+#define XFPD_XMPU_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00Mstr
+ */
+#define XFPD_XMPU_CFG_R00_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000108UL )
+#define XFPD_XMPU_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00
+ */
+#define XFPD_XMPU_CFG_R00    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000010CUL )
+#define XFPD_XMPU_CFG_R00_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R00_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R00_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R00_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R00_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01Strt
+ */
+#define XFPD_XMPU_CFG_R01_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000110UL )
+#define XFPD_XMPU_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01End
+ */
+#define XFPD_XMPU_CFG_R01_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000114UL )
+#define XFPD_XMPU_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01Mstr
+ */
+#define XFPD_XMPU_CFG_R01_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000118UL )
+#define XFPD_XMPU_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01
+ */
+#define XFPD_XMPU_CFG_R01    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000011CUL )
+#define XFPD_XMPU_CFG_R01_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R01_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R01_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R01_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R01_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02Strt
+ */
+#define XFPD_XMPU_CFG_R02_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000120UL )
+#define XFPD_XMPU_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02End
+ */
+#define XFPD_XMPU_CFG_R02_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000124UL )
+#define XFPD_XMPU_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02Mstr
+ */
+#define XFPD_XMPU_CFG_R02_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000128UL )
+#define XFPD_XMPU_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02
+ */
+#define XFPD_XMPU_CFG_R02    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000012CUL )
+#define XFPD_XMPU_CFG_R02_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R02_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R02_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R02_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R02_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03Strt
+ */
+#define XFPD_XMPU_CFG_R03_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000130UL )
+#define XFPD_XMPU_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03End
+ */
+#define XFPD_XMPU_CFG_R03_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000134UL )
+#define XFPD_XMPU_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03Mstr
+ */
+#define XFPD_XMPU_CFG_R03_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000138UL )
+#define XFPD_XMPU_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03
+ */
+#define XFPD_XMPU_CFG_R03    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000013CUL )
+#define XFPD_XMPU_CFG_R03_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R03_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R03_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R03_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R03_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04Strt
+ */
+#define XFPD_XMPU_CFG_R04_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000140UL )
+#define XFPD_XMPU_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04End
+ */
+#define XFPD_XMPU_CFG_R04_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000144UL )
+#define XFPD_XMPU_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04Mstr
+ */
+#define XFPD_XMPU_CFG_R04_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000148UL )
+#define XFPD_XMPU_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04
+ */
+#define XFPD_XMPU_CFG_R04    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000014CUL )
+#define XFPD_XMPU_CFG_R04_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R04_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R04_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R04_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R04_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05Strt
+ */
+#define XFPD_XMPU_CFG_R05_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000150UL )
+#define XFPD_XMPU_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05End
+ */
+#define XFPD_XMPU_CFG_R05_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000154UL )
+#define XFPD_XMPU_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05Mstr
+ */
+#define XFPD_XMPU_CFG_R05_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000158UL )
+#define XFPD_XMPU_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05
+ */
+#define XFPD_XMPU_CFG_R05    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000015CUL )
+#define XFPD_XMPU_CFG_R05_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R05_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R05_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R05_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R05_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06Strt
+ */
+#define XFPD_XMPU_CFG_R06_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000160UL )
+#define XFPD_XMPU_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06End
+ */
+#define XFPD_XMPU_CFG_R06_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000164UL )
+#define XFPD_XMPU_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06Mstr
+ */
+#define XFPD_XMPU_CFG_R06_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000168UL )
+#define XFPD_XMPU_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06
+ */
+#define XFPD_XMPU_CFG_R06    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000016CUL )
+#define XFPD_XMPU_CFG_R06_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R06_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R06_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R06_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R06_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07Strt
+ */
+#define XFPD_XMPU_CFG_R07_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000170UL )
+#define XFPD_XMPU_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07End
+ */
+#define XFPD_XMPU_CFG_R07_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000174UL )
+#define XFPD_XMPU_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07Mstr
+ */
+#define XFPD_XMPU_CFG_R07_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000178UL )
+#define XFPD_XMPU_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07
+ */
+#define XFPD_XMPU_CFG_R07    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000017CUL )
+#define XFPD_XMPU_CFG_R07_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R07_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R07_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R07_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R07_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08Strt
+ */
+#define XFPD_XMPU_CFG_R08_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000180UL )
+#define XFPD_XMPU_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08End
+ */
+#define XFPD_XMPU_CFG_R08_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000184UL )
+#define XFPD_XMPU_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08Mstr
+ */
+#define XFPD_XMPU_CFG_R08_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000188UL )
+#define XFPD_XMPU_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08
+ */
+#define XFPD_XMPU_CFG_R08    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000018CUL )
+#define XFPD_XMPU_CFG_R08_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R08_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R08_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R08_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R08_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09Strt
+ */
+#define XFPD_XMPU_CFG_R09_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000190UL )
+#define XFPD_XMPU_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09End
+ */
+#define XFPD_XMPU_CFG_R09_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000194UL )
+#define XFPD_XMPU_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09Mstr
+ */
+#define XFPD_XMPU_CFG_R09_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000198UL )
+#define XFPD_XMPU_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09
+ */
+#define XFPD_XMPU_CFG_R09    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000019CUL )
+#define XFPD_XMPU_CFG_R09_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R09_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R09_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R09_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R09_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10Strt
+ */
+#define XFPD_XMPU_CFG_R10_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A0UL )
+#define XFPD_XMPU_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10End
+ */
+#define XFPD_XMPU_CFG_R10_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A4UL )
+#define XFPD_XMPU_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10Mstr
+ */
+#define XFPD_XMPU_CFG_R10_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A8UL )
+#define XFPD_XMPU_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10
+ */
+#define XFPD_XMPU_CFG_R10    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001ACUL )
+#define XFPD_XMPU_CFG_R10_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R10_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R10_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R10_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R10_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11Strt
+ */
+#define XFPD_XMPU_CFG_R11_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B0UL )
+#define XFPD_XMPU_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11End
+ */
+#define XFPD_XMPU_CFG_R11_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B4UL )
+#define XFPD_XMPU_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11Mstr
+ */
+#define XFPD_XMPU_CFG_R11_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B8UL )
+#define XFPD_XMPU_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11
+ */
+#define XFPD_XMPU_CFG_R11    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001BCUL )
+#define XFPD_XMPU_CFG_R11_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R11_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R11_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R11_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R11_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12Strt
+ */
+#define XFPD_XMPU_CFG_R12_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C0UL )
+#define XFPD_XMPU_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12End
+ */
+#define XFPD_XMPU_CFG_R12_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C4UL )
+#define XFPD_XMPU_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12Mstr
+ */
+#define XFPD_XMPU_CFG_R12_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C8UL )
+#define XFPD_XMPU_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12
+ */
+#define XFPD_XMPU_CFG_R12    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001CCUL )
+#define XFPD_XMPU_CFG_R12_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R12_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R12_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R12_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R12_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13Strt
+ */
+#define XFPD_XMPU_CFG_R13_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D0UL )
+#define XFPD_XMPU_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13End
+ */
+#define XFPD_XMPU_CFG_R13_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D4UL )
+#define XFPD_XMPU_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13Mstr
+ */
+#define XFPD_XMPU_CFG_R13_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D8UL )
+#define XFPD_XMPU_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13
+ */
+#define XFPD_XMPU_CFG_R13    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001DCUL )
+#define XFPD_XMPU_CFG_R13_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R13_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R13_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R13_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R13_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14Strt
+ */
+#define XFPD_XMPU_CFG_R14_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E0UL )
+#define XFPD_XMPU_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14End
+ */
+#define XFPD_XMPU_CFG_R14_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E4UL )
+#define XFPD_XMPU_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14Mstr
+ */
+#define XFPD_XMPU_CFG_R14_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E8UL )
+#define XFPD_XMPU_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14
+ */
+#define XFPD_XMPU_CFG_R14    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001ECUL )
+#define XFPD_XMPU_CFG_R14_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R14_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R14_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R14_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R14_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15Strt
+ */
+#define XFPD_XMPU_CFG_R15_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F0UL )
+#define XFPD_XMPU_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15End
+ */
+#define XFPD_XMPU_CFG_R15_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F4UL )
+#define XFPD_XMPU_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15Mstr
+ */
+#define XFPD_XMPU_CFG_R15_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F8UL )
+#define XFPD_XMPU_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15
+ */
+#define XFPD_XMPU_CFG_R15    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001FCUL )
+#define XFPD_XMPU_CFG_R15_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R15_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R15_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R15_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R15_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_XMPU_CFG_H__ */
diff --git a/src/Xilinx/include/xfpd_xmpu_sink.h b/src/Xilinx/include/xfpd_xmpu_sink.h
new file mode 100644
index 0000000..39172f1
--- /dev/null
+++ b/src/Xilinx/include/xfpd_xmpu_sink.h
@@ -0,0 +1,81 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_XMPU_SINK_H__
+#define __XFPD_XMPU_SINK_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdXmpuSink Base Address
+ */
+#define XFPD_XMPU_SINK_BASEADDR      0xFD4F0000UL
+
+/**
+ * Register: XfpdXmpuSinkErrSts
+ */
+#define XFPD_XMPU_SINK_ERR_STS    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF00UL )
+#define XFPD_XMPU_SINK_ERR_STS_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_SHIFT   31UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_WIDTH   1UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_MASK    0x80000000UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_DEFVAL  0x0UL
+
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_SHIFT   0UL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_WIDTH   12UL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_MASK    0x00000fffUL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkIsr
+ */
+#define XFPD_XMPU_SINK_ISR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF10UL )
+#define XFPD_XMPU_SINK_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkImr
+ */
+#define XFPD_XMPU_SINK_IMR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF14UL )
+#define XFPD_XMPU_SINK_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuSinkIer
+ */
+#define XFPD_XMPU_SINK_IER    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF18UL )
+#define XFPD_XMPU_SINK_IER_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_IERADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkIdr
+ */
+#define XFPD_XMPU_SINK_IDR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF1CUL )
+#define XFPD_XMPU_SINK_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_XMPU_SINK_H__ */
diff --git a/src/Xilinx/include/xgpio.h b/src/Xilinx/include/xgpio.h
new file mode 100644
index 0000000..582d94a
--- /dev/null
+++ b/src/Xilinx/include/xgpio.h
@@ -0,0 +1,214 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xgpio.h
+* @addtogroup gpio_v4_3
+* @{
+* @details
+*
+* This file contains the software API definition of the Xilinx General Purpose
+* I/O (XGpio) device driver.
+*
+* The Xilinx GPIO controller is a soft IP core designed for Xilinx FPGAs and
+* contains the following general features:
+*   - Support for up to 32 I/O discretes for each channel (64 bits total).
+*   - Each of the discretes can be configured for input or output.
+*   - Configurable support for dual channels and interrupt generation.
+*
+* The driver provides interrupt management functions. Implementation of
+* interrupt handlers is left to the user. Refer to the provided interrupt
+* example in the examples directory for details.
+*
+* This driver is intended to be RTOS and processor independent. Any needs for
+* dynamic memory management, threads or thread mutual exclusion, virtual
+* memory, or cache control must be satisfied by the layer above this driver.
+*
+* Initialization & Configuration
+*
+* The XGpio_Config structure is used by the driver to configure itself. This
+* configuration structure is typically created by the tool-chain based on HW
+* build properties.
+*
+* To support multiple runtime loading and initialization strategies employed
+* by various operating systems, the driver instance can be initialized in one
+* of the following ways:
+*
+*   - XGpio_Initialize(InstancePtr, DeviceId) - The driver looks up its own
+*     configuration structure created by the tool-chain based on an ID provided
+*     by the tool-chain.
+*
+*   - XGpio_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
+*     configuration structure provided by the caller. If running in a system
+*     with address translation, the provided virtual memory base address
+*     replaces the physical address present in the configuration structure.
+*
+* @note
+*
+* This API utilizes 32 bit I/O to the GPIO registers. With less than 32 bits,
+* the unused bits from registers are read as zero and written as don't cares.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a rmm  03/13/02 First release
+* 2.00a jhl  11/26/03 Added support for dual channels and interrupts
+* 2.01a jvb  12/14/05 I separated dependency on the static config table and
+*                     xparameters.h from the driver initialization by moving
+*                     _Initialize and _LookupConfig to _sinit.c. I also added
+*                     the new _CfgInitialize routine.
+* 2.11a mta  03/21/07 Updated to new coding style, added GetDataDirection
+* 2.12a sv   11/21/07 Updated driver to support access through DCR bus
+* 2.12a sv   06/05/08 Updated driver to fix the XGpio_InterruptDisable function
+*		      to properly update the Interrupt Enable register
+* 2.13a sdm  08/22/08 Removed support for static interrupt handlers from the MDD
+*		      file
+* 3.00a sv   11/21/09 Updated to use HAL Processor APIs.
+*		      Renamed the macros XGpio_mWriteReg to XGpio_WriteReg and
+*		      XGpio_mReadReg to XGpio_ReadReg. Removed the macros
+*		      XGpio_mSetDataDirection, XGpio_mGetDataReg and
+*		      XGpio_mSetDataReg. Users should use XGpio_WriteReg and
+*		      XGpio_ReadReg to achieve the same functionality.
+* 3.01a bss  04/18/13 Updated driver tcl to generate Canonical params in
+*		      xparameters.h. CR#698589
+* 4.0   adk  19/12/13 Updated as per the New Tcl API's
+* 4.1   lks  11/18/15 Updated to use cannonical xparameters in examples and
+*		      clean up of the comments, removed support for DCR bridge
+*		      and removed xgpio_intr_example for CR 900381
+* 4.2   sk   08/16/16 Used UINTPTR instead of u32 for Baseaddress as part of
+*                     adding 64 bit support. CR# 867425.
+*                     Changed the prototype of XGpio_CfgInitialize API.
+* 4.3   sk   09/29/16 Modified the example to make it work when LED_bits are
+*                     configured as an output. CR# 958644
+*       ms   01/23/17 Added xil_printf statement in main function for all
+*                     examples to ensure that "Successfully ran" and "Failed"
+*                     strings are available in all examples. This is a fix
+*                     for CR-965028.
+*       ms   03/17/17 Added readme.txt file in examples folder for doxygen
+*                     generation.
+*
+* 

+*****************************************************************************/
+
+#ifndef XGPIO_H			/* prevent circular inclusions */
+#define XGPIO_H			/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xgpio_l.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;		/* Unique ID  of device */
+	UINTPTR BaseAddress;	/* Device base address */
+	int InterruptPresent;	/* Are interrupts supported in h/w */
+	int IsDual;		/* Are 2 channels supported in h/w */
+} XGpio_Config;
+
+/**
+ * The XGpio driver instance data. The user is required to allocate a
+ * variable of this type for every GPIO device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	UINTPTR BaseAddress;	/* Device base address */
+	u32 IsReady;		/* Device is initialized and ready */
+	int InterruptPresent;	/* Are interrupts supported in h/w */
+	int IsDual;		/* Are 2 channels supported in h/w */
+} XGpio;
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+
+/************************** Function Prototypes *****************************/
+
+/*
+ * Initialization functions in xgpio_sinit.c
+ */
+int XGpio_Initialize(XGpio *InstancePtr, u16 DeviceId);
+XGpio_Config *XGpio_LookupConfig(u16 DeviceId);
+
+/*
+ * API Basic functions implemented in xgpio.c
+ */
+int XGpio_CfgInitialize(XGpio *InstancePtr, XGpio_Config * Config,
+			UINTPTR EffectiveAddr);
+void XGpio_SetDataDirection(XGpio *InstancePtr, unsigned Channel,
+			    u32 DirectionMask);
+u32 XGpio_GetDataDirection(XGpio *InstancePtr, unsigned Channel);
+u32 XGpio_DiscreteRead(XGpio *InstancePtr, unsigned Channel);
+void XGpio_DiscreteWrite(XGpio *InstancePtr, unsigned Channel, u32 Mask);
+
+
+/*
+ * API Functions implemented in xgpio_extra.c
+ */
+void XGpio_DiscreteSet(XGpio *InstancePtr, unsigned Channel, u32 Mask);
+void XGpio_DiscreteClear(XGpio *InstancePtr, unsigned Channel, u32 Mask);
+
+/*
+ * API Functions implemented in xgpio_selftest.c
+ */
+int XGpio_SelfTest(XGpio *InstancePtr);
+
+/*
+ * API Functions implemented in xgpio_intr.c
+ */
+void XGpio_InterruptGlobalEnable(XGpio *InstancePtr);
+void XGpio_InterruptGlobalDisable(XGpio *InstancePtr);
+void XGpio_InterruptEnable(XGpio *InstancePtr, u32 Mask);
+void XGpio_InterruptDisable(XGpio *InstancePtr, u32 Mask);
+void XGpio_InterruptClear(XGpio *InstancePtr, u32 Mask);
+u32 XGpio_InterruptGetEnabled(XGpio *InstancePtr);
+u32 XGpio_InterruptGetStatus(XGpio *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xgpio_l.h b/src/Xilinx/include/xgpio_l.h
new file mode 100644
index 0000000..153fdfd
--- /dev/null
+++ b/src/Xilinx/include/xgpio_l.h
@@ -0,0 +1,193 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpio_l.h
+* @addtogroup gpio_v4_3
+* @{
+*
+* This header file contains identifiers and driver functions (or
+* macros) that can be used to access the device.  The user should refer to the
+* hardware device specification for more details of the device operation.
+*
+* The macros that are available in this file use a multiply to calculate the
+* addresses of registers. The user can control whether that multiply is done
+* at run time or at compile time. A constant passed as the channel parameter
+* will cause the multiply to be done at compile time. A variable passed as the
+* channel parameter will cause it to occur at run time.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a jhl  04/24/02 First release of low level driver
+* 2.00a jhl  11/26/03 Added support for dual channels and interrupts. This
+*                     change required the functions to be changed such that
+*                     the interface is not compatible with previous versions.
+*                     See the examples in the example directory for macros
+*                     to help compile an application that was designed for
+*                     previous versions of the driver. The interrupt registers
+*                     are accessible using the ReadReg and WriteReg macros and
+*                     a channel parameter was added to the other macros.
+* 2.11a mta  03/21/07 Updated to new coding style
+* 2.12a sv   11/21/07 Updated driver to support access through DCR bus.
+* 3.00a sv   11/21/09 Renamed the macros XGpio_mWriteReg to XGpio_WriteReg
+*		      XGpio_mReadReg to XGpio_ReadReg.
+*		      Removed the macros XGpio_mSetDataDirection,
+*		      XGpio_mGetDataReg and XGpio_mSetDataReg. Users
+*		      should use XGpio_WriteReg/XGpio_ReadReg to achieve the
+*		      same functionality.
+* 4.1  lks   11/18/15 Removed support for DCR bridge
+* 

+*
+******************************************************************************/
+
+#ifndef XGPIO_L_H		/* prevent circular inclusions */
+#define XGPIO_L_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+
+/************************** Constant Definitions *****************************/
+
+/** @name Registers
+ *
+ * Register offsets for this device.
+ * @{
+ */
+#define XGPIO_DATA_OFFSET	0x0   /**< Data register for 1st channel */
+#define XGPIO_TRI_OFFSET	0x4   /**< I/O direction reg for 1st channel */
+#define XGPIO_DATA2_OFFSET	0x8   /**< Data register for 2nd channel */
+#define XGPIO_TRI2_OFFSET	0xC   /**< I/O direction reg for 2nd channel */
+
+#define XGPIO_GIE_OFFSET	0x11C /**< Glogal interrupt enable register */
+#define XGPIO_ISR_OFFSET	0x120 /**< Interrupt status register */
+#define XGPIO_IER_OFFSET	0x128 /**< Interrupt enable register */
+
+/* @} */
+
+/* The following constant describes the offset of each channels data and
+ * tristate register from the base address.
+ */
+#define XGPIO_CHAN_OFFSET  8
+
+/** @name Interrupt Status and Enable Register bitmaps and masks
+ *
+ * Bit definitions for the interrupt status register and interrupt enable
+ * registers.
+ * @{
+ */
+#define XGPIO_IR_MASK		0x3 /**< Mask of all bits */
+#define XGPIO_IR_CH1_MASK	0x1 /**< Mask for the 1st channel */
+#define XGPIO_IR_CH2_MASK	0x2 /**< Mask for the 2nd channel */
+/*@}*/
+
+
+/** @name Global Interrupt Enable Register bitmaps and masks
+ *
+ * Bit definitions for the Global Interrupt  Enable register
+ * @{
+ */
+#define XGPIO_GIE_GINTR_ENABLE_MASK	0x80000000
+/*@}*/
+
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XGpio_In32  Xil_In32
+#define XGpio_Out32 Xil_Out32
+
+
+/****************************************************************************/
+/**
+*
+* Write a value to a GPIO register. A 32 bit write is performed. If the
+* GPIO core is implemented in a smaller width, only the least significant data
+* is written.
+*
+* @param	BaseAddress is the base address of the GPIO device.
+* @param	RegOffset is the register offset from the base to write to.
+* @param	Data is the data written to the register.
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XGpio_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+****************************************************************************/
+#define XGpio_WriteReg(BaseAddress, RegOffset, Data) \
+	XGpio_Out32((BaseAddress) + (RegOffset), (u32)(Data))
+
+/****************************************************************************/
+/**
+*
+* Read a value from a GPIO register. A 32 bit read is performed. If the
+* GPIO core is implemented in a smaller width, only the least
+* significant data is read from the register. The most significant data
+* will be read as 0.
+*
+* @param	BaseAddress is the base address of the GPIO device.
+* @param	RegOffset is the register offset from the base to read from.
+*
+* @return	Data read from the register.
+*
+* @note		C-style signature:
+*		u32 XGpio_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+****************************************************************************/
+#define XGpio_ReadReg(BaseAddress, RegOffset) \
+	XGpio_In32((BaseAddress) + (RegOffset))
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xgpiops.h b/src/Xilinx/include/xgpiops.h
new file mode 100644
index 0000000..fda562d
--- /dev/null
+++ b/src/Xilinx/include/xgpiops.h
@@ -0,0 +1,277 @@
+
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpiops.h
+* @addtogroup gpiops_v3_3
+* @{
+* @details
+*
+* The Xilinx PS GPIO driver. This driver supports the Xilinx PS GPIO
+* Controller.
+*
+* The GPIO Controller supports the following features:
+*	- 4 banks
+*	- Masked writes (There are no masked reads)
+*	- Bypass mode
+*	- Configurable Interrupts (Level/Edge)
+*
+* This driver is intended to be RTOS and processor independent. Any needs for
+* dynamic memory management, threads or thread mutual exclusion, virtual
+* memory, or cache control must be satisfied by the layer above this driver.
+
+* This driver supports all the features listed above, if applicable.
+*
+* Driver Description
+*
+* The device driver enables higher layer software (e.g., an application) to
+* communicate to the GPIO.
+*
+* Interrupts
+*
+* The driver provides interrupt management functions and an interrupt handler.
+* Users of this driver need to provide callback functions. An interrupt handler
+* example is available with the driver.
+*
+* Threads
+*
+* This driver is not thread safe. Any needs for threads or thread mutual
+* exclusion must be satisfied by the layer above this driver.
+*
+* Asserts
+*
+* Asserts are used within all Xilinx drivers to enforce constraints on argument
+* values. Asserts can be turned off on a system-wide basis by defining, at
+* compile time, the NDEBUG identifier. By default, asserts are turned on and it
+* is recommended that users leave asserts on during development.
+*
+* Building the driver
+*
+* The XGpioPs driver is composed of several source files. This allows the user
+* to build and link only those parts of the driver that are necessary.
+* 


+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sv   01/15/10 First Release
+* 1.01a sv   04/15/12 Removed the APIs XGpioPs_SetMode, XGpioPs_SetModePin
+*                     XGpioPs_GetMode, XGpioPs_GetModePin as they are not
+*		      relevant to Zynq device.The interrupts are disabled
+*		      for output pins on all banks during initialization.
+* 1.02a hk   08/22/13 Added low level reset API
+* 2.1   hk   04/29/14 Use Input data register DATA_RO for read. CR# 771667.
+* 2.2	sk	 10/13/14 Used Pin number in Bank instead of pin number
+* 					  passed to APIs. CR# 822636
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn  04/13/15 Add support for Zynq Ultrascale+ MP. CR# 856980.
+*       ms   03/17/17 Added readme.txt file in examples folder for doxygen
+*                     generation.
+*       ms   04/05/17 Added tabspace for return statements in functions of
+*                     gpiops examples for proper documentation while
+*                     generating doxygen.
+* 3.3   ms   04/17/17 Added notes about gpio input and output pin description
+*                     for zcu102 and zc702 boards in polled and interrupt
+*                     example, configured Interrupt pin to input pin for
+*                     proper functioning of interrupt example.
+* 

+*
+******************************************************************************/
+#ifndef XGPIOPS_H		/* prevent circular inclusions */
+#define XGPIOPS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xgpiops_hw.h"
+#include "xplatform_info.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Interrupt types
+ *  @{
+ * The following constants define the interrupt types that can be set for each
+ * GPIO pin.
+ */
+#define XGPIOPS_IRQ_TYPE_EDGE_RISING	0x00U  /**< Interrupt on Rising edge */
+#define XGPIOPS_IRQ_TYPE_EDGE_FALLING	0x01U  /**< Interrupt Falling edge */
+#define XGPIOPS_IRQ_TYPE_EDGE_BOTH	0x02U  /**< Interrupt on both edges */
+#define XGPIOPS_IRQ_TYPE_LEVEL_HIGH	0x03U  /**< Interrupt on high level */
+#define XGPIOPS_IRQ_TYPE_LEVEL_LOW	0x04U  /**< Interrupt on low level */
+/*@}*/
+
+#define XGPIOPS_BANK_MAX_PINS		(u32)32 /**< Max pins in a GPIO bank */
+#define XGPIOPS_BANK0			0x00U  /**< GPIO Bank 0 */
+#define XGPIOPS_BANK1			0x01U  /**< GPIO Bank 1 */
+#define XGPIOPS_BANK2			0x02U  /**< GPIO Bank 2 */
+#define XGPIOPS_BANK3			0x03U  /**< GPIO Bank 3 */
+
+#ifdef XPAR_PSU_GPIO_0_BASEADDR
+#define XGPIOPS_BANK4			0x04U  /**< GPIO Bank 4 */
+#define XGPIOPS_BANK5			0x05U  /**< GPIO Bank 5 */
+#endif
+
+#define XGPIOPS_MAX_BANKS_ZYNQMP		0x06U  /**< Max banks in a
+										*	Zynq Ultrascale+ MP GPIO device
+										*/
+#define XGPIOPS_MAX_BANKS		0x04U  /**< Max banks in a Zynq GPIO device */
+
+#define XGPIOPS_DEVICE_MAX_PIN_NUM_ZYNQMP	(u32)174 /**< Max pins in the
+						  *	Zynq Ultrascale+ MP GPIO device
+					      * 0 - 25,  Bank 0
+					      * 26 - 51, Bank 1
+					      *	52 - 77, Bank 2
+					      *	78 - 109, Bank 3
+					      *	110 - 141, Bank 4
+					      *	142 - 173, Bank 5
+					      */
+#define XGPIOPS_DEVICE_MAX_PIN_NUM	(u32)118 /**< Max pins in the Zynq GPIO device
+					      * 0 - 31,  Bank 0
+					      * 32 - 53, Bank 1
+					      *	54 - 85, Bank 2
+					      *	86 - 117, Bank 3
+					      */
+
+/**************************** Type Definitions *******************************/
+
+/****************************************************************************/
+/**
+ * This handler data type allows the user to define a callback function to
+ * handle the interrupts for the GPIO device. The application using this
+ * driver is expected to define a handler of this type, to support interrupt
+ * driven mode. The handler executes in an interrupt context such that minimal
+ * processing should be performed.
+ *
+ * @param	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the callback functions for a GPIO bank. It is
+ *		passed back to the upper layer when the callback is invoked. Its
+ *		type is not important to the driver component, so it is a void
+ *		pointer.
+ * @param	Bank is the bank for which the interrupt status has changed.
+ * @param	Status is the Interrupt status of the GPIO bank.
+ *
+ *****************************************************************************/
+typedef void (*XGpioPs_Handler) (void *CallBackRef, u32 Bank, u32 Status);
+
+/**
+ * This typedef contains configuration information for a device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID of device */
+	u32 BaseAddr;		/**< Register base address */
+} XGpioPs_Config;
+
+/**
+ * The XGpioPs driver instance data. The user is required to allocate a
+ * variable of this type for the GPIO device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XGpioPs_Config GpioConfig;	/**< Device configuration */
+	u32 IsReady;			/**< Device is initialized and ready */
+	XGpioPs_Handler Handler;	/**< Status handlers for all banks */
+	void *CallBackRef; 		/**< Callback ref for bank handlers */
+	u32 Platform;			/**< Platform data */
+	u32 MaxPinNum;			/**< Max pins in the GPIO device */
+	u8 MaxBanks;			/**< Max banks in a GPIO device */
+} XGpioPs;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/* Functions in xgpiops.c */
+s32 XGpioPs_CfgInitialize(XGpioPs *InstancePtr, XGpioPs_Config *ConfigPtr,
+			   u32 EffectiveAddr);
+
+/* Bank APIs in xgpiops.c */
+u32 XGpioPs_Read(XGpioPs *InstancePtr, u8 Bank);
+void XGpioPs_Write(XGpioPs *InstancePtr, u8 Bank, u32 Data);
+void XGpioPs_SetDirection(XGpioPs *InstancePtr, u8 Bank, u32 Direction);
+u32 XGpioPs_GetDirection(XGpioPs *InstancePtr, u8 Bank);
+void XGpioPs_SetOutputEnable(XGpioPs *InstancePtr, u8 Bank, u32 OpEnable);
+u32 XGpioPs_GetOutputEnable(XGpioPs *InstancePtr, u8 Bank);
+void XGpioPs_GetBankPin(u8 PinNumber,	u8 *BankNumber, u8 *PinNumberInBank);
+
+/* Pin APIs in xgpiops.c */
+u32 XGpioPs_ReadPin(XGpioPs *InstancePtr, u32 Pin);
+void XGpioPs_WritePin(XGpioPs *InstancePtr, u32 Pin, u32 Data);
+void XGpioPs_SetDirectionPin(XGpioPs *InstancePtr, u32 Pin, u32 Direction);
+u32 XGpioPs_GetDirectionPin(XGpioPs *InstancePtr, u32 Pin);
+void XGpioPs_SetOutputEnablePin(XGpioPs *InstancePtr, u32 Pin, u32 OpEnable);
+u32 XGpioPs_GetOutputEnablePin(XGpioPs *InstancePtr, u32 Pin);
+
+/* Diagnostic functions in xgpiops_selftest.c */
+s32 XGpioPs_SelfTest(XGpioPs *InstancePtr);
+
+/* Functions in xgpiops_intr.c */
+/* Bank APIs in xgpiops_intr.c */
+void XGpioPs_IntrEnable(XGpioPs *InstancePtr, u8 Bank, u32 Mask);
+void XGpioPs_IntrDisable(XGpioPs *InstancePtr, u8 Bank, u32 Mask);
+u32 XGpioPs_IntrGetEnabled(XGpioPs *InstancePtr, u8 Bank);
+u32 XGpioPs_IntrGetStatus(XGpioPs *InstancePtr, u8 Bank);
+void XGpioPs_IntrClear(XGpioPs *InstancePtr, u8 Bank, u32 Mask);
+void XGpioPs_SetIntrType(XGpioPs *InstancePtr, u8 Bank, u32 IntrType,
+			  u32 IntrPolarity, u32 IntrOnAny);
+void XGpioPs_GetIntrType(XGpioPs *InstancePtr, u8 Bank, u32 *IntrType,
+			  u32 *IntrPolarity, u32 *IntrOnAny);
+void XGpioPs_SetCallbackHandler(XGpioPs *InstancePtr, void *CallBackRef,
+			     XGpioPs_Handler FuncPointer);
+void XGpioPs_IntrHandler(XGpioPs *InstancePtr);
+
+/* Pin APIs in xgpiops_intr.c */
+void XGpioPs_SetIntrTypePin(XGpioPs *InstancePtr, u32 Pin, u8 IrqType);
+u8 XGpioPs_GetIntrTypePin(XGpioPs *InstancePtr, u32 Pin);
+
+void XGpioPs_IntrEnablePin(XGpioPs *InstancePtr, u32 Pin);
+void XGpioPs_IntrDisablePin(XGpioPs *InstancePtr, u32 Pin);
+u32 XGpioPs_IntrGetEnabledPin(XGpioPs *InstancePtr, u32 Pin);
+u32 XGpioPs_IntrGetStatusPin(XGpioPs *InstancePtr, u32 Pin);
+void XGpioPs_IntrClearPin(XGpioPs *InstancePtr, u32 Pin);
+
+/* Functions in xgpiops_sinit.c */
+XGpioPs_Config *XGpioPs_LookupConfig(u16 DeviceId);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xgpiops_hw.h b/src/Xilinx/include/xgpiops_hw.h
new file mode 100644
index 0000000..ff01906
--- /dev/null
+++ b/src/Xilinx/include/xgpiops_hw.h
@@ -0,0 +1,164 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpiops_hw.h
+* @addtogroup gpiops_v3_3
+* @{
+*
+* This header file contains the identifiers and basic driver functions (or
+* macros) that can be used to access the device. Other driver functions
+* are defined in xgpiops.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------
+* 1.00a sv   01/15/10 First Release
+* 1.02a hk   08/22/13 Added low level reset API function prototype and
+*                     related constant definitions
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn  04/13/15 Corrected reset values of banks.
+* 

+*
+******************************************************************************/
+#ifndef XGPIOPS_HW_H		/* prevent circular inclusions */
+#define XGPIOPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register offsets for the GPIO. Each register is 32 bits.
+ *  @{
+ */
+#define XGPIOPS_DATA_LSW_OFFSET  0x00000000U  /* Mask and Data Register LSW, WO */
+#define XGPIOPS_DATA_MSW_OFFSET  0x00000004U  /* Mask and Data Register MSW, WO */
+#define XGPIOPS_DATA_OFFSET	 0x00000040U  /* Data Register, RW */
+#define XGPIOPS_DATA_RO_OFFSET	 0x00000060U  /* Data Register - Input, RO */
+#define XGPIOPS_DIRM_OFFSET	 0x00000204U  /* Direction Mode Register, RW */
+#define XGPIOPS_OUTEN_OFFSET	 0x00000208U  /* Output Enable Register, RW */
+#define XGPIOPS_INTMASK_OFFSET	 0x0000020CU  /* Interrupt Mask Register, RO */
+#define XGPIOPS_INTEN_OFFSET	 0x00000210U  /* Interrupt Enable Register, WO */
+#define XGPIOPS_INTDIS_OFFSET	 0x00000214U  /* Interrupt Disable Register, WO*/
+#define XGPIOPS_INTSTS_OFFSET	 0x00000218U  /* Interrupt Status Register, RO */
+#define XGPIOPS_INTTYPE_OFFSET	 0x0000021CU  /* Interrupt Type Register, RW */
+#define XGPIOPS_INTPOL_OFFSET	 0x00000220U  /* Interrupt Polarity Register, RW */
+#define XGPIOPS_INTANY_OFFSET	 0x00000224U  /* Interrupt On Any Register, RW */
+/* @} */
+
+/** @name Register offsets for each Bank.
+ *  @{
+ */
+#define XGPIOPS_DATA_MASK_OFFSET 0x00000008U  /* Data/Mask Registers offset */
+#define XGPIOPS_DATA_BANK_OFFSET 0x00000004U  /* Data Registers offset */
+#define XGPIOPS_REG_MASK_OFFSET  0x00000040U  /* Registers offset */
+/* @} */
+
+/* For backwards compatibility */
+#define XGPIOPS_BYPM_MASK_OFFSET	(u32)0x40
+
+/** @name Interrupt type reset values for each bank
+ *  @{
+ */
+#ifdef XPAR_PSU_GPIO_0_BASEADDR
+#define XGPIOPS_INTTYPE_BANK0_RESET  0x03FFFFFFU  /* Resets specific to Zynq Ultrascale+ MP */
+#define XGPIOPS_INTTYPE_BANK1_RESET  0x03FFFFFFU
+#define XGPIOPS_INTTYPE_BANK2_RESET  0x03FFFFFFU
+#else
+#define XGPIOPS_INTTYPE_BANK0_RESET  0xFFFFFFFFU  /* Resets specific to Zynq */
+#define XGPIOPS_INTTYPE_BANK1_RESET  0x003FFFFFU
+#define XGPIOPS_INTTYPE_BANK2_RESET  0xFFFFFFFFU
+#endif
+
+#define XGPIOPS_INTTYPE_BANK3_RESET  0xFFFFFFFFU  /* Reset common to both platforms */
+#define XGPIOPS_INTTYPE_BANK4_RESET  0xFFFFFFFFU  /* Resets specific to Zynq Ultrascale+ MP */
+#define XGPIOPS_INTTYPE_BANK5_RESET  0xFFFFFFFFU
+/* @} */
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* This macro reads the given register.
+*
+* @param	BaseAddr is the base address of the device.
+* @param	RegOffset is the register offset to be read.
+*
+* @return	The 32-bit value of the register
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XGpioPs_ReadReg(BaseAddr, RegOffset)		\
+		Xil_In32((BaseAddr) + (u32)(RegOffset))
+
+/****************************************************************************/
+/**
+*
+* This macro writes to the given register.
+*
+* @param	BaseAddr is the base address of the device.
+* @param	RegOffset is the offset of the register to be written.
+* @param	Data is the 32-bit value to write to the register.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XGpioPs_WriteReg(BaseAddr, RegOffset, Data)	\
+		Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data))
+
+/************************** Function Prototypes ******************************/
+
+void XGpioPs_ResetHw(u32 BaseAddress);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XGPIOPS_HW_H */
+/** @} */
diff --git a/src/Xilinx/include/xiicps.h b/src/Xilinx/include/xiicps.h
new file mode 100644
index 0000000..cc837a1
--- /dev/null
+++ b/src/Xilinx/include/xiicps.h
@@ -0,0 +1,423 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps.h
+* @addtogroup iicps_v3_5
+* @{
+* @details
+*
+* This is an implementation of IIC driver in the PS block. The device can
+* be either a master or a slave on the IIC bus. This implementation supports
+* both interrupt mode transfer and polled mode transfer. Only 7-bit address
+* is used in the driver, although the hardware also supports 10-bit address.
+*
+* IIC is a 2-wire serial interface.  The master controls the clock, so it can
+* regulate when it wants to send or receive data. The slave is under control of
+* the master, it must respond quickly since it has no control of the clock and
+* must send/receive data as fast or as slow as the master does.
+*
+* The higher level software must implement a higher layer protocol to inform
+* the slave what to send to the master.
+*
+* Initialization & Configuration
+*
+* The XIicPs_Config structure is used by the driver to configure itself. This
+* configuration structure is typically created by the tool-chain based on HW
+* build properties.
+*
+* To support multiple runtime loading and initialization strategies employed by
+* various operating systems, the driver instance can be initialized in the
+* following way:
+*
+*    - XIicPs_LookupConfig(DeviceId) - Use the device identifier to find
+*      the static configuration structure defined in xiicps_g.c. This is
+*      setup by the tools. For some operating systems the config structure
+*      will be initialized by the software and this call is not needed.
+*
+*   - XIicPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
+*     configuration structure provided by the caller. If running in a
+*     system with address translation, the provided virtual memory base
+*     address replaces the physical address in the configuration
+*     structure.
+*
+* Multiple Masters
+*
+* More than one master can exist, bus arbitration is defined in the IIC
+* standard. Lost of arbitration causes arbitration loss interrupt on the device.
+*
+* Multiple Slaves
+*
+* Multiple slaves are supported by selecting them with unique addresses. It is
+* up to the system designer to be sure all devices on the IIC bus have
+* unique addresses.
+*
+* Addressing
+*
+* The IIC hardware can use 7 or 10 bit addresses.  The driver provides the
+* ability to control which address size is sent in messages as a master to a
+* slave device.
+*
+* FIFO Size 
+* The hardware FIFO is 32 bytes deep. The user must know the limitations of
+* other IIC devices on the bus. Some are only able to receive a limited number
+* of bytes in a single transfer.
+*
+* Data Rates
+*
+* The data rate is set by values in the control register. The formula for
+* determining the correct register values is:
+* Fscl = Fpclk/(22 x (divisor_a+1) x (divisor_b+1))
+*
+* When the device is configured as a slave, the slck setting controls the
+* sample rate and so must be set to be at least as fast as the fastest scl
+* expected to be seen in the system.
+*
+* Polled Mode Operation
+*
+* This driver supports polled mode transfers.
+*
+* Interrupts
+*
+* The user must connect the interrupt handler of the driver,
+* XIicPs_InterruptHandler to an interrupt system such that it will be called
+* when an interrupt occurs. This function does not save and restore the
+* processor context such that the user must provide this processing.
+*
+* The driver handles the following interrupts:
+* - Transfer complete
+* - More Data
+* - Transfer not Acknowledged
+* - Transfer Time out
+* - Monitored slave ready - master mode only
+* - Receive Overflow
+* - Transmit FIFO overflow
+* - Receive FIFO underflow
+* - Arbitration lost
+*
+* Bus Busy
+*
+* Bus busy is checked before the setup of a master mode device, to avoid
+* unnecessary arbitration loss interrupt.
+*
+* RTOS Independence
+*
+* This driver is intended to be RTOS and processor independent.  It works with
+* physical addresses only.  Any needs for dynamic memory management, threads or
+* thread mutual exclusion, virtual memory, or cache control must be satisfied by
+* the layer above this driver.
+*
+*Repeated Start
+*
+* The I2C controller does not indicate completion of a receive transfer if HOLD
+* bit is set. Due to this errata, repeated start cannot be used if a receive
+* transfer is followed by any other transfer.
+*
+* 
 MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- -----------------------------------------------
+* 1.00a drg/jz  01/30/08 First release
+* 1.00a sdm     09/21/11 Fixed an issue in the XIicPs_SetOptions and
+*			 XIicPs_ClearOptions where the InstancePtr->Options
+*			 was not updated correctly.
+* 			 Updated the InstancePtr->Options in the
+*			 XIicPs_CfgInitialize by calling XIicPs_GetOptions.
+*			 Updated the XIicPs_SetupMaster to not check for
+*			 Bus Busy condition when the Hold Bit is set.
+*			 Removed some unused variables.
+* 1.01a sg      03/30/12 Fixed an issue in XIicPs_MasterSendPolled where a
+*			 check for transfer completion is added, which indicates
+*			 the completion of current transfer.
+* 1.02a sg	08/29/12 Updated the logic to arrive at the best divisors
+*			 to achieve I2C clock with minimum error for
+*			 CR #674195
+* 1.03a hk  05/04/13 Initialized BestDivA and BestDivB to 0.
+*			 This is fix for CR#704398 to remove warning.
+* 2.0   hk  03/07/14 Added check for error status in the while loop that
+*                    checks for completion.
+*                    (XIicPs_MasterSendPolled function). CR# 762244, 764875.
+*                    Limited frequency set when 100KHz or 400KHz is
+*                    selected. This is a hardware limitation. CR#779290.
+* 2.1   hk  04/24/14 Fix for CR# 789821 to handle >14 byte transfers.
+*                    Explicitly reset CR and clear FIFO in Abort function
+*                    and state the same in the comments. CR# 784254.
+*                    Fix for CR# 761060 - provision for repeated start.
+* 2.2   hk  08/23/14 Slave monitor mode changes - clear FIFO, enable
+*                    read mode and clear transfer size register.
+*                    Disable NACK to avoid interrupts on each retry.
+* 2.3	sk	10/07/14 Repeated start feature deleted.
+* 3.0	sk	11/03/14 Modified TimeOut Register value to 0xFF
+* 					 in XIicPs_Reset.
+* 			12/06/14 Implemented Repeated start feature.
+*			01/31/15 Modified the code according to MISRAC 2012 Compliant.
+*			02/18/15 Implemented larger data transfer using repeated start
+*					  in Zynq UltraScale MP.
+* 3.3   kvn 05/05/16 Modified latest code for MISRA-C:2012 Compliance.
+*       ms  03/17/17 Added readme.txt file in examples folder for doxygen
+*                    generation.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XIICPS_H       /* prevent circular inclusions */
+#define XIICPS_H       /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xiicps_hw.h"
+#include "xplatform_info.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Configuration options
+ *
+ * The following options may be specified or retrieved for the device and
+ * enable/disable additional features of the IIC.  Each of the options
+ * are bit fields, so more than one may be specified.
+ *
+ * @{
+ */
+#define XIICPS_7_BIT_ADDR_OPTION	0x01U  /**< 7-bit address mode */
+#define XIICPS_10_BIT_ADDR_OPTION	0x02U  /**< 10-bit address mode */
+#define XIICPS_SLAVE_MON_OPTION		0x04U  /**< Slave monitor mode */
+#define XIICPS_REP_START_OPTION		0x08U  /**< Repeated Start */
+/*@}*/
+
+/** @name Callback events
+ *
+ * These constants specify the handler events that are passed to an application
+ * event handler from the driver.  These constants are bit masks such that
+ * more than one event can be passed to the handler.
+ *
+ * @{
+ */
+#define XIICPS_EVENT_COMPLETE_SEND	0x0001U  /**< Transmit Complete Event*/
+#define XIICPS_EVENT_COMPLETE_RECV	0x0002U  /**< Receive Complete Event*/
+#define XIICPS_EVENT_TIME_OUT		0x0004U  /**< Transfer timed out */
+#define XIICPS_EVENT_ERROR			0x0008U  /**< Receive error */
+#define XIICPS_EVENT_ARB_LOST		0x0010U  /**< Arbitration lost */
+#define XIICPS_EVENT_NACK			0x0020U  /**< NACK Received */
+#define XIICPS_EVENT_SLAVE_RDY		0x0040U  /**< Slave ready */
+#define XIICPS_EVENT_RX_OVR			0x0080U  /**< RX overflow */
+#define XIICPS_EVENT_TX_OVR			0x0100U  /**< TX overflow */
+#define XIICPS_EVENT_RX_UNF			0x0200U  /**< RX underflow */
+/*@}*/
+
+/** @name Role constants
+ *
+ * These constants are used to pass into the device setup routines to
+ * set up the device according to transfer direction.
+ */
+#define SENDING_ROLE		1  /**< Transfer direction is sending */
+#define RECVING_ROLE		0  /**< Transfer direction is receiving */
+
+/* Maximum transfer size */
+#define XIICPS_MAX_TRANSFER_SIZE	(u32)(255U - 3U)
+
+/**************************** Type Definitions *******************************/
+
+/**
+* The handler data type allows the user to define a callback function to
+* respond to interrupt events in the system. This function is executed
+* in interrupt context, so amount of processing should be minimized.
+*
+* @param	CallBackRef is the callback reference passed in by the upper
+*		layer when setting the callback functions, and passed back to
+*		the upper layer when the callback is invoked. Its type is
+*		not important to the driver, so it is a void pointer.
+* @param	StatusEvent indicates one or more status events that occurred.
+*/
+typedef void (*XIicPs_IntrHandler) (void *CallBackRef, u32 StatusEvent);
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;     /**< Unique ID  of device */
+	u32 BaseAddress;  /**< Base address of the device */
+	u32 InputClockHz; /**< Input clock frequency */
+} XIicPs_Config;
+
+/**
+ * The XIicPs driver instance data. The user is required to allocate a
+ * variable of this type for each IIC device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XIicPs_Config Config;	/* Configuration structure */
+	u32 IsReady;		/* Device is initialized and ready */
+	u32 Options;		/* Options set in the device */
+
+	u8 *SendBufferPtr;	/* Pointer to send buffer */
+	u8 *RecvBufferPtr;	/* Pointer to recv buffer */
+	s32 SendByteCount;	/* Number of bytes still expected to send */
+	s32 RecvByteCount;	/* Number of bytes still expected to receive */
+	s32 CurrByteCount;	/* No. of bytes expected in current transfer */
+
+	s32 UpdateTxSize;	/* If tx size register has to be updated */
+	s32 IsSend;		/* Whether master is sending or receiving */
+	s32 IsRepeatedStart;	/* Indicates if user set repeated start */
+
+	XIicPs_IntrHandler StatusHandler;  /* Event handler function */
+	void *CallBackRef;	/* Callback reference for event handler */
+} XIicPs;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+/****************************************************************************/
+/*
+*
+* Place one byte into the transmit FIFO.
+*
+* @param	InstancePtr is the instance of IIC
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XIicPs_SendByte(XIicPs *InstancePtr)
+*
+*****************************************************************************/
+#define XIicPs_SendByte(InstancePtr)					\
+{									\
+	u8 Data;							\
+	Data = *((InstancePtr)->SendBufferPtr);				\
+	 XIicPs_Out32((InstancePtr)->Config.BaseAddress			\
+			 + (u32)(XIICPS_DATA_OFFSET), 			\
+					(u32)(Data));			\
+	(InstancePtr)->SendBufferPtr += 1;				\
+	(InstancePtr)->SendByteCount -= 1;\
+}
+
+/****************************************************************************/
+/*
+*
+* Receive one byte from FIFO.
+*
+* @param	InstancePtr is the instance of IIC
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		u8 XIicPs_RecvByte(XIicPs *InstancePtr)
+*
+*****************************************************************************/
+#define XIicPs_RecvByte(InstancePtr)					\
+{									\
+	u8 *Data, Value;						\
+	Value = (u8)(XIicPs_In32((InstancePtr)->Config.BaseAddress	\
+		  + (u32)XIICPS_DATA_OFFSET));  			\
+	Data = &Value;							\
+	*(InstancePtr)->RecvBufferPtr = *Data;				\
+	(InstancePtr)->RecvBufferPtr += 1;				\
+	 (InstancePtr)->RecvByteCount --; 				\
+}
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Function for configuration lookup, in xiicps_sinit.c
+ */
+XIicPs_Config *XIicPs_LookupConfig(u16 DeviceId);
+
+/*
+ * Functions for general setup, in xiicps.c
+ */
+s32 XIicPs_CfgInitialize(XIicPs *InstancePtr, XIicPs_Config * ConfigPtr,
+				  u32 EffectiveAddr);
+
+void XIicPs_Abort(XIicPs *InstancePtr);
+void XIicPs_Reset(XIicPs *InstancePtr);
+
+s32 XIicPs_BusIsBusy(XIicPs *InstancePtr);
+s32 TransmitFifoFill(XIicPs *InstancePtr);
+
+/*
+ * Functions for interrupts, in xiicps_intr.c
+ */
+void XIicPs_SetStatusHandler(XIicPs *InstancePtr, void *CallBackRef,
+				  XIicPs_IntrHandler FunctionPtr);
+
+/*
+ * Functions for device as master, in xiicps_master.c
+ */
+void XIicPs_MasterSend(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
+		u16 SlaveAddr);
+void XIicPs_MasterRecv(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
+		u16 SlaveAddr);
+s32 XIicPs_MasterSendPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
+		u16 SlaveAddr);
+s32 XIicPs_MasterRecvPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
+		u16 SlaveAddr);
+void XIicPs_EnableSlaveMonitor(XIicPs *InstancePtr, u16 SlaveAddr);
+void XIicPs_DisableSlaveMonitor(XIicPs *InstancePtr);
+void XIicPs_MasterInterruptHandler(XIicPs *InstancePtr);
+
+/*
+ * Functions for device as slave, in xiicps_slave.c
+ */
+void XIicPs_SetupSlave(XIicPs *InstancePtr, u16 SlaveAddr);
+void XIicPs_SlaveSend(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
+void XIicPs_SlaveRecv(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
+s32 XIicPs_SlaveSendPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
+s32 XIicPs_SlaveRecvPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
+void XIicPs_SlaveInterruptHandler(XIicPs *InstancePtr);
+
+/*
+ * Functions for selftest, in xiicps_selftest.c
+ */
+s32 XIicPs_SelfTest(XIicPs *InstancePtr);
+
+/*
+ * Functions for setting and getting data rate, in xiicps_options.c
+ */
+s32 XIicPs_SetOptions(XIicPs *InstancePtr, u32 Options);
+s32 XIicPs_ClearOptions(XIicPs *InstancePtr, u32 Options);
+u32 XIicPs_GetOptions(XIicPs *InstancePtr);
+
+s32 XIicPs_SetSClk(XIicPs *InstancePtr, u32 FsclHz);
+u32 XIicPs_GetSClk(XIicPs *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xiicps_hw.h b/src/Xilinx/include/xiicps_hw.h
new file mode 100644
index 0000000..d1eee82
--- /dev/null
+++ b/src/Xilinx/include/xiicps_hw.h
@@ -0,0 +1,383 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps_hw.h
+* @addtogroup iicps_v3_5
+* @{
+*
+* This header file contains the hardware definition for an IIC device.
+* It includes register definitions and interface functions to read/write
+* the registers.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who 	Date     Changes
+* ----- ------  -------- -----------------------------------------------
+* 1.00a drg/jz  01/30/10 First release
+* 1.04a kpc		11/07/13 Added function prototype.
+* 3.0	sk		11/03/14 Modified the TimeOut Register value to 0xFF
+*				01/31/15 Modified the code according to MISRAC 2012 Compliant.
+* 

+*
+******************************************************************************/
+#ifndef XIICPS_HW_H		/* prevent circular inclusions */
+#define XIICPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register Map
+ *
+ * Register offsets for the IIC.
+ * @{
+ */
+#define XIICPS_CR_OFFSET			0x00U  /**< 32-bit Control */
+#define XIICPS_SR_OFFSET			0x04U  /**< Status */
+#define XIICPS_ADDR_OFFSET			0x08U  /**< IIC Address */
+#define XIICPS_DATA_OFFSET			0x0CU  /**< IIC FIFO Data */
+#define XIICPS_ISR_OFFSET			0x10U  /**< Interrupt Status */
+#define XIICPS_TRANS_SIZE_OFFSET	0x14U  /**< Transfer Size */
+#define XIICPS_SLV_PAUSE_OFFSET		0x18U  /**< Slave monitor pause */
+#define XIICPS_TIME_OUT_OFFSET		0x1CU  /**< Time Out */
+#define XIICPS_IMR_OFFSET			0x20U  /**< Interrupt Enabled Mask */
+#define XIICPS_IER_OFFSET			0x24U  /**< Interrupt Enable */
+#define XIICPS_IDR_OFFSET			0x28U  /**< Interrupt Disable */
+/* @} */
+
+/** @name Control Register
+ *
+ * This register contains various control bits that
+ * affects the operation of the IIC controller. Read/Write.
+ * @{
+ */
+
+#define XIICPS_CR_DIV_A_MASK	0x0000C000U /**< Clock Divisor A */
+#define XIICPS_CR_DIV_A_SHIFT			14U /**< Clock Divisor A shift */
+#define XIICPS_DIV_A_MAX				 4U /**< Maximum value of Divisor A */
+#define XIICPS_CR_DIV_B_MASK	0x00003F00U /**< Clock Divisor B */
+#define XIICPS_CR_DIV_B_SHIFT			 8U /**< Clock Divisor B shift */
+#define XIICPS_CR_CLR_FIFO_MASK	0x00000040U /**< Clear FIFO, auto clears*/
+#define XIICPS_CR_SLVMON_MASK	0x00000020U /**< Slave monitor mode */
+#define XIICPS_CR_HOLD_MASK		0x00000010U /**<  Hold bus 1=Hold scl,
+												0=terminate transfer */
+#define XIICPS_CR_ACKEN_MASK	0x00000008U /**< Enable TX of ACK when
+												Master receiver*/
+#define XIICPS_CR_NEA_MASK		0x00000004U /**< Addressing Mode 1=7 bit,
+												0=10 bit */
+#define XIICPS_CR_MS_MASK		0x00000002U /**< Master mode bit 1=Master,
+												0=Slave */
+#define XIICPS_CR_RD_WR_MASK	0x00000001U /**< Read or Write Master
+												transfer  0=Transmitter,
+												1=Receiver*/
+#define XIICPS_CR_RESET_VALUE			 0U /**< Reset value of the Control
+												register */
+/* @} */
+
+/** @name IIC Status Register
+ *
+ * This register is used to indicate status of the IIC controller. Read only
+ * @{
+ */
+#define XIICPS_SR_BA_MASK		0x00000100U  /**< Bus Active Mask */
+#define XIICPS_SR_RXOVF_MASK	0x00000080U  /**< Receiver Overflow Mask */
+#define XIICPS_SR_TXDV_MASK		0x00000040U  /**< Transmit Data Valid Mask */
+#define XIICPS_SR_RXDV_MASK		0x00000020U  /**< Receiver Data Valid Mask */
+#define XIICPS_SR_RXRW_MASK		0x00000008U  /**< Receive read/write Mask */
+/* @} */
+
+/** @name IIC Address Register
+ *
+ * Normal addressing mode uses add[6:0]. Extended addressing mode uses add[9:0].
+ * A write access to this register always initiates a transfer if the IIC is in
+ * master mode. Read/Write
+ * @{
+ */
+#define XIICPS_ADDR_MASK	0x000003FF  /**< IIC Address Mask */
+/* @} */
+
+/** @name IIC Data Register
+ *
+ * When written to, the data register sets data to transmit. When read from, the
+ * data register reads the last received byte of data. Read/Write
+ * @{
+ */
+#define XIICPS_DATA_MASK	0x000000FF  /**< IIC Data Mask */
+/* @} */
+
+/** @name IIC Interrupt Registers
+ *
+ * IIC Interrupt Status Register
+ *
+ * This register holds the interrupt status flags for the IIC controller. Some
+ * of the flags are level triggered
+ * - i.e. are set as long as the interrupt condition exists.  Other flags are
+ *   edge triggered, which means they are set one the interrupt condition occurs
+ *   then remain set until they are cleared by software.
+ *   The interrupts are cleared by writing a one to the interrupt bit position
+ *   in the Interrupt Status Register. Read/Write.
+ *
+ * IIC Interrupt Enable Register
+ *
+ * This register is used to enable interrupt sources for the IIC controller.
+ * Writing a '1' to a bit in this register clears the corresponding bit in the
+ * IIC Interrupt Mask register.  Write only.
+ *
+ * IIC Interrupt Disable Register 
+ *
+ * This register is used to disable interrupt sources for the IIC controller.
+ * Writing a '1' to a bit in this register sets the corresponding bit in the
+ * IIC Interrupt Mask register. Write only.
+ *
+ * IIC Interrupt Mask Register
+ *
+ * This register shows the enabled/disabled status of each IIC controller
+ * interrupt source. A bit set to 1 will ignore the corresponding interrupt in
+ * the status register. A bit set to 0 means the interrupt is enabled.
+ * All mask bits are set and all interrupts are disabled after reset. Read only.
+ *
+ * All four registers have the same bit definitions. They are only defined once
+ * for each of the Interrupt Enable Register, Interrupt Disable Register,
+ * Interrupt Mask Register, and Interrupt Status Register
+ * @{
+ */
+
+#define XIICPS_IXR_ARB_LOST_MASK  0x00000200U	 /**< Arbitration Lost Interrupt
+													mask */
+#define XIICPS_IXR_RX_UNF_MASK    0x00000080U	 /**< FIFO Recieve Underflow
+													Interrupt mask */
+#define XIICPS_IXR_TX_OVR_MASK    0x00000040U	 /**< Transmit Overflow
+													Interrupt mask */
+#define XIICPS_IXR_RX_OVR_MASK    0x00000020U	 /**< Receive Overflow Interrupt
+													mask */
+#define XIICPS_IXR_SLV_RDY_MASK   0x00000010U	 /**< Monitored Slave Ready
+													Interrupt mask */
+#define XIICPS_IXR_TO_MASK        0x00000008U	 /**< Transfer Time Out
+													Interrupt mask */
+#define XIICPS_IXR_NACK_MASK      0x00000004U	 /**< NACK Interrupt mask */
+#define XIICPS_IXR_DATA_MASK      0x00000002U	 /**< Data Interrupt mask */
+#define XIICPS_IXR_COMP_MASK      0x00000001U	 /**< Transfer Complete
+													Interrupt mask */
+#define XIICPS_IXR_DEFAULT_MASK   0x000002FFU	 /**< Default ISR Mask */
+#define XIICPS_IXR_ALL_INTR_MASK  0x000002FFU	 /**< All ISR Mask */
+/* @} */
+
+
+/** @name IIC Transfer Size Register
+*
+* The register's meaning varies according to the operating mode as follows:
+*   - Master transmitter mode: number of data bytes still not transmitted minus
+*     one
+*   - Master receiver mode: number of data bytes that are still expected to be
+*     received
+*   - Slave transmitter mode: number of bytes remaining in the FIFO after the
+*     master terminates the transfer
+*   - Slave receiver mode: number of valid data bytes in the FIFO
+*
+* This register is cleared if CLR_FIFO bit in the control register is set.
+* Read/Write
+* @{
+*/
+#define XIICPS_TRANS_SIZE_MASK  0x0000003F /**< IIC Transfer Size Mask */
+#define XIICPS_FIFO_DEPTH          16	  /**< Number of bytes in the FIFO */
+#define XIICPS_DATA_INTR_DEPTH     14    /**< Number of bytes at DATA intr */
+/* @} */
+
+
+/** @name IIC Slave Monitor Pause Register
+*
+* This register is associated with the slave monitor mode of the I2C interface.
+* It is meaningful only when the module is in master mode and bit SLVMON in the
+* control register is set.
+*
+* This register defines the pause interval between consecutive attempts to
+* address the slave once a write to an I2C address register is done by the
+* host. It represents the number of sclk cycles minus one between two attempts.
+*
+* The reset value of the register is 0, which results in the master repeatedly
+* trying to access the slave immediately after unsuccessful attempt.
+* Read/Write
+* @{
+*/
+#define XIICPS_SLV_PAUSE_MASK    0x0000000F  /**< Slave monitor pause mask */
+/* @} */
+
+
+/** @name IIC Time Out Register
+*
+* The value of time out register represents the time out interval in number of
+* sclk cycles minus one.
+*
+* When the accessed slave holds the sclk line low for longer than the time out
+* period, thus prohibiting the I2C interface in master mode to complete the
+* current transfer, an interrupt is generated and TO interrupt flag is set.
+*
+* The reset value of the register is 0x1f.
+* Read/Write
+* @{
+ */
+#define XIICPS_TIME_OUT_MASK    0x000000FFU    /**< IIC Time Out mask */
+#define XIICPS_TO_RESET_VALUE   0x000000FFU    /**< IIC Time Out reset value */
+/* @} */
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XIicPs_In32 Xil_In32
+#define XIicPs_Out32 Xil_Out32
+
+/****************************************************************************/
+/**
+* Read an IIC register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to select the specific register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XIicPs_ReadReg(u32 BaseAddress. int RegOffset)
+*
+******************************************************************************/
+#define XIicPs_ReadReg(BaseAddress, RegOffset) \
+	XIicPs_In32((BaseAddress) + (u32)(RegOffset))
+
+/***************************************************************************/
+/**
+* Write an IIC register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to select the specific register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note	C-Style signature:
+*	void XIicPs_WriteReg(u32 BaseAddress, int RegOffset, u32 RegisterValue)
+*
+******************************************************************************/
+#define XIicPs_WriteReg(BaseAddress, RegOffset, RegisterValue) \
+	XIicPs_Out32((BaseAddress) + (u32)(RegOffset), (u32)(RegisterValue))
+
+/***************************************************************************/
+/**
+* Read the interrupt enable register.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	Current bit mask that represents currently enabled interrupts.
+*
+* @note		C-Style signature:
+*		u32 XIicPs_ReadIER(u32 BaseAddress)
+*
+******************************************************************************/
+#define XIicPs_ReadIER(BaseAddress) \
+	XIicPs_ReadReg((BaseAddress),  XIICPS_IER_OFFSET)
+
+/***************************************************************************/
+/**
+* Write to the interrupt enable register.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @param	IntrMask is the interrupts to be enabled.
+*
+* @return	None.
+*
+* @note	C-Style signature:
+*	void XIicPs_EnabledInterrupts(u32 BaseAddress, u32 IntrMask)
+*
+******************************************************************************/
+#define XIicPs_EnableInterrupts(BaseAddress, IntrMask) \
+	XIicPs_WriteReg((BaseAddress), XIICPS_IER_OFFSET, (IntrMask))
+
+/***************************************************************************/
+/**
+* Disable all interrupts.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XIicPs_DisableAllInterrupts(u32 BaseAddress)
+*
+******************************************************************************/
+#define XIicPs_DisableAllInterrupts(BaseAddress) \
+	XIicPs_WriteReg((BaseAddress), XIICPS_IDR_OFFSET, \
+		XIICPS_IXR_ALL_INTR_MASK)
+
+/***************************************************************************/
+/**
+* Disable selected interrupts.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @param	IntrMask is the interrupts to be disabled.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XIicPs_DisableInterrupts(u32 BaseAddress, u32 IntrMask)
+*
+******************************************************************************/
+#define XIicPs_DisableInterrupts(BaseAddress, IntrMask) \
+	XIicPs_WriteReg((BaseAddress), XIICPS_IDR_OFFSET, \
+		(IntrMask))
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+/*
+ * Perform reset operation to the I2c interface
+ */
+void XIicPs_ResetHw(u32 BaseAddress);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xil_assert.h b/src/Xilinx/include/xil_assert.h
new file mode 100644
index 0000000..add4124
--- /dev/null
+++ b/src/Xilinx/include/xil_assert.h
@@ -0,0 +1,195 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_assert.h
+*
+* @addtogroup common_assert_apis Assert APIs and Macros
+*
+* The xil_assert.h file contains assert related functions and macros.
+* Assert APIs/Macros specifies that a application program satisfies certain
+* conditions at particular points in its execution. These function can be
+* used by application programs to ensure that, application code is satisfying
+* certain conditions.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/14/09 First release
+* 6.0   kvn  05/31/16 Make Xil_AsserWait a global variable
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_ASSERT_H	/* prevent circular inclusions */
+#define XIL_ASSERT_H	/* by using protection macros */
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/***************************** Include Files *********************************/
+
+
+/************************** Constant Definitions *****************************/
+
+#define XIL_ASSERT_NONE     0U
+#define XIL_ASSERT_OCCURRED 1U
+#define XNULL NULL
+
+extern u32 Xil_AssertStatus;
+extern s32 Xil_AssertWait;
+extern void Xil_Assert(const char8 *File, s32 Line);
+void XNullHandler(void *NullParameter);
+
+/**
+ * This data type defines a callback to be invoked when an
+ * assert occurs. The callback is invoked only when asserts are enabled
+ */
+typedef void (*Xil_AssertCallback) (const char8 *File, s32 Line);
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#ifndef NDEBUG
+
+/*****************************************************************************/
+/**
+* @brief    This assert macro is to be used for void functions. This in
+*           conjunction with the Xil_AssertWait boolean can be used to
+*           accomodate tests so that asserts which fail allow execution to
+*           continue.
+*
+* @param    Expression: expression to be evaluated. If it evaluates to
+*           false, the assert occurs.
+*
+* @return   Returns void unless the Xil_AssertWait variable is true, in which
+*           case no return is made and an infinite loop is entered.
+*
+******************************************************************************/
+#define Xil_AssertVoid(Expression)                \
+{                                                  \
+    if (Expression) {                              \
+        Xil_AssertStatus = XIL_ASSERT_NONE;       \
+    } else {                                       \
+        Xil_Assert(__FILE__, __LINE__);            \
+        Xil_AssertStatus = XIL_ASSERT_OCCURRED;   \
+        return;                                    \
+    }                                              \
+}
+
+/*****************************************************************************/
+/**
+* @brief    This assert macro is to be used for functions that do return a
+*           value. This in conjunction with the Xil_AssertWait boolean can be
+*           used to accomodate tests so that asserts which fail allow execution
+*           to continue.
+*
+* @param    Expression: expression to be evaluated. If it evaluates to false,
+*           the assert occurs.
+*
+* @return   Returns 0 unless the Xil_AssertWait variable is true, in which
+* 	        case no return is made and an infinite loop is entered.
+*
+******************************************************************************/
+#define Xil_AssertNonvoid(Expression)             \
+{                                                  \
+    if (Expression) {                              \
+        Xil_AssertStatus = XIL_ASSERT_NONE;       \
+    } else {                                       \
+        Xil_Assert(__FILE__, __LINE__);            \
+        Xil_AssertStatus = XIL_ASSERT_OCCURRED;   \
+        return 0;                                  \
+    }                                              \
+}
+
+/*****************************************************************************/
+/**
+* @brief     Always assert. This assert macro is to be used for void functions.
+*            Use for instances where an assert should always occur.
+*
+* @return    Returns void unless the Xil_AssertWait variable is true, in which
+*	         case no return is made and an infinite loop is entered.
+*
+******************************************************************************/
+#define Xil_AssertVoidAlways()                   \
+{                                                  \
+   Xil_Assert(__FILE__, __LINE__);                 \
+   Xil_AssertStatus = XIL_ASSERT_OCCURRED;        \
+   return;                                         \
+}
+
+/*****************************************************************************/
+/**
+* @brief   Always assert. This assert macro is to be used for functions that
+*          do return a value. Use for instances where an assert should always
+*          occur.
+*
+* @return Returns void unless the Xil_AssertWait variable is true, in which
+*	      case no return is made and an infinite loop is entered.
+*
+******************************************************************************/
+#define Xil_AssertNonvoidAlways()                \
+{                                                  \
+   Xil_Assert(__FILE__, __LINE__);                 \
+   Xil_AssertStatus = XIL_ASSERT_OCCURRED;        \
+   return 0;                                       \
+}
+
+
+#else
+
+#define Xil_AssertVoid(Expression)
+#define Xil_AssertVoidAlways()
+#define Xil_AssertNonvoid(Expression)
+#define Xil_AssertNonvoidAlways()
+
+#endif
+
+/************************** Function Prototypes ******************************/
+
+void Xil_AssertSetCallback(Xil_AssertCallback Routine);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
+/**
+* @} End of "addtogroup common_assert_apis".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/include/xil_cache.h b/src/Xilinx/include/xil_cache.h
new file mode 100644
index 0000000..ad1d10a
--- /dev/null
+++ b/src/Xilinx/include/xil_cache.h
@@ -0,0 +1,113 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.h
+*
+* @addtogroup r5_cache_apis Cortex R5 Processor Cache Functions
+*
+* Cache functions provide access to cache related operations such as flush
+*  and invalidate for instruction and data caches. It gives option to perform
+* the cache operations on a single cacheline, a range of memory and an entire
+* cache.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 6.2   mus  01/27/17 Updated to support IAR compiler
+* 

+*
+******************************************************************************/
+#ifndef XIL_CACHE_H
+#define XIL_CACHE_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined (__GNUC__)
+#define asm_inval_dc_line_mva_poc(param) __asm__ __volatile__("mcr " \
+		XREG_CP15_INVAL_DC_LINE_MVA_POC :: "r" (param))
+
+#define asm_clean_inval_dc_line_sw(param) __asm__ __volatile__("mcr " \
+		XREG_CP15_CLEAN_INVAL_DC_LINE_SW :: "r" (param))
+
+#define asm_clean_inval_dc_line_mva_poc(param) __asm__ __volatile__("mcr " \
+		XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC :: "r" (param))
+
+#define asm_inval_ic_line_mva_pou(param) __asm__ __volatile__("mcr " \
+		XREG_CP15_INVAL_IC_LINE_MVA_POU :: "r" (param))
+#elif defined (__ICCARM__)
+#define asm_inval_dc_line_mva_poc(param) __asm volatile("mcr " \
+		XREG_CP15_INVAL_DC_LINE_MVA_POC :: "r" (param))
+
+#define asm_clean_inval_dc_line_sw(param) __asm volatile("mcr " \
+		XREG_CP15_CLEAN_INVAL_DC_LINE_SW :: "r" (param))
+
+#define asm_clean_inval_dc_line_mva_poc(param) __asm volatile("mcr " \
+		XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC :: "r" (param))
+
+#define asm_inval_ic_line_mva_pou(param) __asm volatile("mcr " \
+		XREG_CP15_INVAL_IC_LINE_MVA_POU :: "r" (param))
+#endif
+
+void Xil_DCacheEnable(void);
+void Xil_DCacheDisable(void);
+void Xil_DCacheInvalidate(void);
+void Xil_DCacheInvalidateRange(INTPTR adr, u32 len);
+void Xil_DCacheFlush(void);
+void Xil_DCacheFlushRange(INTPTR adr, u32 len);
+void Xil_DCacheInvalidateLine(INTPTR adr);
+void Xil_DCacheFlushLine(INTPTR adr);
+void Xil_DCacheStoreLine(INTPTR adr);
+
+void Xil_ICacheEnable(void);
+void Xil_ICacheDisable(void);
+void Xil_ICacheInvalidate(void);
+void Xil_ICacheInvalidateRange(INTPTR adr, u32 len);
+void Xil_ICacheInvalidateLine(INTPTR adr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/**
+* @} End of "addtogroup r5_cache_apis".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/include/xil_cache_vxworks.h b/src/Xilinx/include/xil_cache_vxworks.h
new file mode 100644
index 0000000..6e8cfa7
--- /dev/null
+++ b/src/Xilinx/include/xil_cache_vxworks.h
@@ -0,0 +1,93 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache_vxworks.h
+*
+* Contains the cache related functions for VxWorks that is wrapped by
+* xil_cache.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  12/11/09 Initial release
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+#ifndef XIL_CACHE_VXWORKS_H
+#define XIL_CACHE_VXWORKS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "vxWorks.h"
+#include "vxLib.h"
+#include "sysLibExtra.h"
+#include "cacheLib.h"
+
+#if (CPU_FAMILY==PPC)
+
+#define Xil_DCacheEnable()		cacheEnable(DATA_CACHE)
+
+#define Xil_DCacheDisable()		cacheDisable(DATA_CACHE)
+
+#define Xil_DCacheInvalidateRange(Addr, Len) \
+		cacheInvalidate(DATA_CACHE, (void *)(Addr), (Len))
+
+#define Xil_DCacheFlushRange(Addr, Len) \
+		cacheFlush(DATA_CACHE, (void *)(Addr), (Len))
+
+#define Xil_ICacheEnable()		cacheEnable(INSTRUCTION_CACHE)
+
+#define Xil_ICacheDisable()		cacheDisable(INSTRUCTION_CACHE)
+
+#define Xil_ICacheInvalidateRange(Addr, Len) \
+		cacheInvalidate(INSTRUCTION_CACHE, (void *)(Addr), (Len))
+
+
+#else
+#error "Unknown processor / architecture. Must be PPC for VxWorks."
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/Xilinx/include/xil_exception.h b/src/Xilinx/include/xil_exception.h
new file mode 100644
index 0000000..ad48222
--- /dev/null
+++ b/src/Xilinx/include/xil_exception.h
@@ -0,0 +1,256 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_exception.h
+*
+* This header file contains ARM Cortex A53,A9,R5 specific exception related APIs.
+* For exception related functions that can be used across all Xilinx supported
+* processors, please use xil_exception.h.
+*
+* @addtogroup arm_exception_apis ARM Processor Exception Handling
+* @{
+* ARM processors specific exception related APIs for cortex A53,A9 and R5 can
+* utilized for enabling/disabling IRQ, registering/removing handler for
+* exceptions or initializing exception vector table with null handler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp  	 28/05/15 First release
+* 6.0   mus      27/07/16 Consolidated file for a53,a9 and r5 processors
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_EXCEPTION_H /* prevent circular inclusions */
+#define XIL_EXCEPTION_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions ****************************/
+
+#define XIL_EXCEPTION_FIQ	XREG_CPSR_FIQ_ENABLE
+#define XIL_EXCEPTION_IRQ	XREG_CPSR_IRQ_ENABLE
+#define XIL_EXCEPTION_ALL	(XREG_CPSR_FIQ_ENABLE | XREG_CPSR_IRQ_ENABLE)
+
+#define XIL_EXCEPTION_ID_FIRST			0U
+#if defined (__aarch64__)
+#define XIL_EXCEPTION_ID_SYNC_INT		1U
+#define XIL_EXCEPTION_ID_IRQ_INT		2U
+#define XIL_EXCEPTION_ID_FIQ_INT		3U
+#define XIL_EXCEPTION_ID_SERROR_ABORT_INT		4U
+#define XIL_EXCEPTION_ID_LAST			5U
+#else
+#define XIL_EXCEPTION_ID_RESET			0U
+#define XIL_EXCEPTION_ID_UNDEFINED_INT		1U
+#define XIL_EXCEPTION_ID_SWI_INT		2U
+#define XIL_EXCEPTION_ID_PREFETCH_ABORT_INT	3U
+#define XIL_EXCEPTION_ID_DATA_ABORT_INT		4U
+#define XIL_EXCEPTION_ID_IRQ_INT		5U
+#define XIL_EXCEPTION_ID_FIQ_INT		6U
+#define XIL_EXCEPTION_ID_LAST			6U
+#endif
+
+/*
+ * XIL_EXCEPTION_ID_INT is defined for all Xilinx processors.
+ */
+#define XIL_EXCEPTION_ID_INT	XIL_EXCEPTION_ID_IRQ_INT
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef is the exception handler function.
+ */
+typedef void (*Xil_ExceptionHandler)(void *data);
+typedef void (*Xil_InterruptHandler)(void *data);
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* @brief	Enable Exceptions.
+*
+* @param	Mask: Value for enabling the exceptions.
+*
+* @return	None.
+*
+* @note		If bit is 0, exception is enabled.
+*			C-Style signature: void Xil_ExceptionEnableMask(Mask)
+*
+******************************************************************************/
+#if defined (__GNUC__) || defined (__ICCARM__)
+#define Xil_ExceptionEnableMask(Mask)	\
+		mtcpsr(mfcpsr() & ~ ((Mask) & XIL_EXCEPTION_ALL))
+#else
+#define Xil_ExceptionEnableMask(Mask)	\
+		{								\
+		  register u32 Reg __asm("cpsr"); \
+		  mtcpsr((Reg) & (~((Mask) & XIL_EXCEPTION_ALL))); \
+		}
+#endif
+/****************************************************************************/
+/**
+* @brief	Enable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionEnable() \
+		Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ)
+
+/****************************************************************************/
+/**
+* @brief	Disable Exceptions.
+*
+* @param	Mask: Value for disabling the exceptions.
+*
+* @return	None.
+*
+* @note		If bit is 1, exception is disabled.
+*			C-Style signature: Xil_ExceptionDisableMask(Mask)
+*
+******************************************************************************/
+#if defined (__GNUC__) || defined (__ICCARM__)
+#define Xil_ExceptionDisableMask(Mask)	\
+		mtcpsr(mfcpsr() | ((Mask) & XIL_EXCEPTION_ALL))
+#else
+#define Xil_ExceptionDisableMask(Mask)	\
+		{									\
+		  register u32 Reg __asm("cpsr"); \
+		  mtcpsr((Reg) | ((Mask) & XIL_EXCEPTION_ALL)); \
+		}
+#endif
+/****************************************************************************/
+/**
+* Disable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionDisable() \
+		Xil_ExceptionDisableMask(XIL_EXCEPTION_IRQ)
+
+#if !defined (__aarch64__) && !defined (ARMA53_32)
+/****************************************************************************/
+/**
+* @brief	Enable nested interrupts by clearing the I and F bits in CPSR. This
+* 			API is defined for cortex-a9 and cortex-r5.
+*
+* @return   None.
+*
+* @note     This macro is supposed to be used from interrupt handlers. In the
+*			interrupt handler the interrupts are disabled by default (I and F
+*			are 1). To allow nesting of interrupts, this macro should be
+*			used. It clears the I and F bits by changing the ARM mode to
+*			system mode. Once these bits are cleared and provided the
+*			preemption of interrupt conditions are met in the GIC, nesting of
+*			interrupts will start happening.
+*			Caution: This macro must be used with caution. Before calling this
+*			macro, the user must ensure that the source of the current IRQ
+*			is appropriately cleared. Otherwise, as soon as we clear the I and
+*			F bits, there can be an infinite loop of interrupts with an
+*			eventual crash (all the stack space getting consumed).
+******************************************************************************/
+#define Xil_EnableNestedInterrupts() \
+		__asm__ __volatile__ ("stmfd   sp!, {lr}"); \
+		__asm__ __volatile__ ("mrs     lr, spsr");  \
+		__asm__ __volatile__ ("stmfd   sp!, {lr}"); \
+		__asm__ __volatile__ ("msr     cpsr_c, #0x1F"); \
+		__asm__ __volatile__ ("stmfd   sp!, {lr}");
+
+/****************************************************************************/
+/**
+* @brief	Disable the nested interrupts by setting the I and F bits. This API
+*			is defined for cortex-a9 and cortex-r5.
+*
+* @return   None.
+*
+* @note     This macro is meant to be called in the interrupt service routines.
+*			This macro cannot be used independently. It can only be used when
+*			nesting of interrupts have been enabled by using the macro
+*			Xil_EnableNestedInterrupts(). In a typical flow, the user first
+*			calls the Xil_EnableNestedInterrupts in the ISR at the appropriate
+*			point. The user then must call this macro before exiting the interrupt
+*			service routine. This macro puts the ARM back in IRQ/FIQ mode and
+*			hence sets back the I and F bits.
+******************************************************************************/
+#define Xil_DisableNestedInterrupts() \
+		__asm__ __volatile__ ("ldmfd   sp!, {lr}");   \
+		__asm__ __volatile__ ("msr     cpsr_c, #0x92"); \
+		__asm__ __volatile__ ("ldmfd   sp!, {lr}"); \
+		__asm__ __volatile__ ("msr     spsr_cxsf, lr"); \
+		__asm__ __volatile__ ("ldmfd   sp!, {lr}"); \
+
+#endif
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+extern void Xil_ExceptionRegisterHandler(u32 Exception_id,
+					 Xil_ExceptionHandler Handler,
+					 void *Data);
+
+extern void Xil_ExceptionRemoveHandler(u32 Exception_id);
+
+extern void Xil_ExceptionInit(void);
+#if defined (__aarch64__)
+void Xil_SyncAbortHandler(void *CallBackRef);
+void Xil_SErrorAbortHandler(void *CallBackRef);
+#else
+extern void Xil_DataAbortHandler(void *CallBackRef);
+extern void Xil_PrefetchAbortHandler(void *CallBackRef);
+extern void Xil_UndefinedExceptionHandler(void *CallBackRef);
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_EXCEPTION_H */
+/**
+* @} End of "addtogroup arm_exception_apis".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/include/xil_hal.h b/src/Xilinx/include/xil_hal.h
new file mode 100644
index 0000000..d4434d0
--- /dev/null
+++ b/src/Xilinx/include/xil_hal.h
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_hal.h
+*
+* Contains all the HAL header files.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/28/09 Initial release
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+#ifndef XIL_HAL_H
+#define XIL_HAL_H
+
+#include "xil_cache.h"
+#include "xil_io.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+#include "xil_types.h"
+
+#endif
diff --git a/src/Xilinx/include/xil_io.h b/src/Xilinx/include/xil_io.h
new file mode 100644
index 0000000..9c5aa43
--- /dev/null
+++ b/src/Xilinx/include/xil_io.h
@@ -0,0 +1,345 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.h
+*
+* @addtogroup common_io_interfacing_apis Register IO interfacing APIs
+*
+* The xil_io.h file contains the interface for the general I/O component, which
+* encapsulates the Input/Output functions for the processors that do not
+* require any special I/O handling.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 6.00  mus      08/19/16 Remove checking of __LITTLE_ENDIAN__ flag for
+*                         ARM processors
+* 

+******************************************************************************/
+
+#ifndef XIL_IO_H           /* prevent circular inclusions */
+#define XIL_IO_H           /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_printf.h"
+
+#if defined (__MICROBLAZE__)
+#include "mb_interface.h"
+#else
+#include "xpseudo_asm.h"
+#endif
+
+/************************** Function Prototypes ******************************/
+u16 Xil_EndianSwap16(u16 Data);
+u32 Xil_EndianSwap32(u32 Data);
+#ifdef ENABLE_SAFETY
+extern u32 XStl_RegUpdate(u32 RegAddr, u32 RegVal);
+#endif
+
+/***************** Macros (Inline Functions) Definitions *********************/
+#if defined __GNUC__
+#if defined (__MICROBLAZE__)
+#  define INST_SYNC		mbar(0)
+#  define DATA_SYNC		mbar(1)
+# else
+#  define SYNCHRONIZE_IO	dmb()
+#  define INST_SYNC		isb()
+#  define DATA_SYNC		dsb()
+# endif
+#else
+# define SYNCHRONIZE_IO
+# define INST_SYNC
+# define DATA_SYNC
+# define INST_SYNC
+# define DATA_SYNC
+#endif
+
+#if defined (__GNUC__) || defined (__ICCARM__) || defined (__MICROBLAZE__)
+#define INLINE inline
+#else
+#define INLINE __inline
+#endif
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an input operation for a memory location by reading
+*           from the specified address and returning the 8 bit Value read from
+*            that address.
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 8 bit Value read from the specified input address.
+
+*
+******************************************************************************/
+static INLINE u8 Xil_In8(UINTPTR Addr)
+{
+	return *(volatile u8 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an input operation for a memory location by reading from
+*           the specified address and returning the 16 bit Value read from that
+*           address.
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 16 bit Value read from the specified input address.
+*
+******************************************************************************/
+static INLINE u16 Xil_In16(UINTPTR Addr)
+{
+	return *(volatile u16 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an input operation for a memory location by
+*           reading from the specified address and returning the 32 bit Value
+*           read  from that address.
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 32 bit Value read from the specified input address.
+*
+******************************************************************************/
+static INLINE u32 Xil_In32(UINTPTR Addr)
+{
+	return *(volatile u32 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief     Performs an input operation for a memory location by reading the
+*            64 bit Value read  from that address.
+*
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 64 bit Value read from the specified input address.
+*
+******************************************************************************/
+static INLINE u64 Xil_In64(UINTPTR Addr)
+{
+	return *(volatile u64 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for an memory location by
+*           writing the 8 bit Value to the the specified address.
+*
+* @param	Addr: contains the address to perform the output operation
+* @param	Value: contains the 8 bit Value to be written at the specified
+*           address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out8(UINTPTR Addr, u8 Value)
+{
+	volatile u8 *LocalAddr = (volatile u8 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for a memory location by writing the
+*            16 bit Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+* @param	Value contains the Value to be written at the specified address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out16(UINTPTR Addr, u16 Value)
+{
+	volatile u16 *LocalAddr = (volatile u16 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for a memory location by writing the
+*           32 bit Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+* @param	Value contains the 32 bit Value to be written at the specified
+*           address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out32(UINTPTR Addr, u32 Value)
+{
+#ifndef ENABLE_SAFETY
+	volatile u32 *LocalAddr = (volatile u32 *)Addr;
+	*LocalAddr = Value;
+#else
+	XStl_RegUpdate(Addr, Value);
+#endif
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for a memory location by writing the
+*           64 bit Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+* @param	Value contains 64 bit Value to be written at the specified address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out64(UINTPTR Addr, u64 Value)
+{
+	volatile u64 *LocalAddr = (volatile u64 *)Addr;
+	*LocalAddr = Value;
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+# define Xil_In16LE	Xil_In16
+# define Xil_In32LE	Xil_In32
+# define Xil_Out16LE	Xil_Out16
+# define Xil_Out32LE	Xil_Out32
+# define Xil_Htons	Xil_EndianSwap16
+# define Xil_Htonl	Xil_EndianSwap32
+# define Xil_Ntohs	Xil_EndianSwap16
+# define Xil_Ntohl	Xil_EndianSwap32
+# else
+# define Xil_In16BE	Xil_In16
+# define Xil_In32BE	Xil_In32
+# define Xil_Out16BE	Xil_Out16
+# define Xil_Out32BE	Xil_Out32
+# define Xil_Htons(Data) (Data)
+# define Xil_Htonl(Data) (Data)
+# define Xil_Ntohs(Data) (Data)
+# define Xil_Ntohl(Data) (Data)
+#endif
+#else
+# define Xil_In16LE	Xil_In16
+# define Xil_In32LE	Xil_In32
+# define Xil_Out16LE	Xil_Out16
+# define Xil_Out32LE	Xil_Out32
+# define Xil_Htons	Xil_EndianSwap16
+# define Xil_Htonl	Xil_EndianSwap32
+# define Xil_Ntohs	Xil_EndianSwap16
+# define Xil_Ntohl	Xil_EndianSwap32
+#endif
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE u16 Xil_In16BE(UINTPTR Addr)
+#else
+static INLINE u16 Xil_In16LE(UINTPTR Addr)
+#endif
+#else
+static INLINE u16 Xil_In16BE(UINTPTR Addr)
+#endif
+{
+	u16 value = Xil_In16(Addr);
+	return Xil_EndianSwap16(value);
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE u32 Xil_In32BE(UINTPTR Addr)
+#else
+static INLINE u32 Xil_In32LE(UINTPTR Addr)
+#endif
+#else
+static INLINE u32 Xil_In32BE(UINTPTR Addr)
+#endif
+{
+	u32 value = Xil_In32(Addr);
+	return Xil_EndianSwap32(value);
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE void Xil_Out16BE(UINTPTR Addr, u16 Value)
+#else
+static INLINE void Xil_Out16LE(UINTPTR Addr, u16 Value)
+#endif
+#else
+static INLINE void Xil_Out16BE(UINTPTR Addr, u16 Value)
+#endif
+{
+	Value = Xil_EndianSwap16(Value);
+	Xil_Out16(Addr, Value);
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE void Xil_Out32BE(UINTPTR Addr, u32 Value)
+#else
+static INLINE void Xil_Out32LE(UINTPTR Addr, u32 Value)
+#endif
+#else
+static INLINE void Xil_Out32BE(UINTPTR Addr, u32 Value)
+#endif
+{
+	Value = Xil_EndianSwap32(Value);
+	Xil_Out32(Addr, Value);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_io_interfacing_apis".
+*/
diff --git a/src/Xilinx/include/xil_macroback.h b/src/Xilinx/include/xil_macroback.h
new file mode 100644
index 0000000..ebafde8
--- /dev/null
+++ b/src/Xilinx/include/xil_macroback.h
@@ -0,0 +1,1052 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*********************************************************************/
+/**
+ * @file xil_macroback.h
+ *
+ * This header file is meant to bring back the removed _m macros.
+ * This header file must be included last.
+ * The following macros are not defined here due to the driver change:
+ *   XGpio_mSetDataDirection
+ *   XGpio_mGetDataReg
+ *   XGpio_mSetDataReg
+ *   XIIC_RESET
+ *   XIIC_CLEAR_STATS
+ *   XSpi_mReset
+ *   XSysAce_mSetCfgAddr
+ *   XSysAce_mIsCfgDone
+ *   XTft_mSetPixel
+ *   XTft_mGetPixel
+ *   XWdtTb_mEnableWdt
+ *   XWdtTb_mDisbleWdt
+ *   XWdtTb_mRestartWdt
+ *   XWdtTb_mGetTimebaseReg
+ *   XWdtTb_mHasReset
+ *
+ * Please refer the corresonding driver document for replacement.
+ *
+ *********************************************************************/
+
+#ifndef XIL_MACROBACK_H
+#define XIL_MACROBACK_H
+
+/*********************************************************************/
+/**
+ * Macros for Driver XCan
+ *
+ *********************************************************************/
+#ifndef XCan_mReadReg
+#define XCan_mReadReg XCan_ReadReg
+#endif
+
+#ifndef XCan_mWriteReg
+#define XCan_mWriteReg XCan_WriteReg
+#endif
+
+#ifndef XCan_mIsTxDone
+#define XCan_mIsTxDone XCan_IsTxDone
+#endif
+
+#ifndef XCan_mIsTxFifoFull
+#define XCan_mIsTxFifoFull XCan_IsTxFifoFull
+#endif
+
+#ifndef XCan_mIsHighPriorityBufFull
+#define XCan_mIsHighPriorityBufFull XCan_IsHighPriorityBufFull
+#endif
+
+#ifndef XCan_mIsRxEmpty
+#define XCan_mIsRxEmpty XCan_IsRxEmpty
+#endif
+
+#ifndef XCan_mIsAcceptFilterBusy
+#define XCan_mIsAcceptFilterBusy XCan_IsAcceptFilterBusy
+#endif
+
+#ifndef XCan_mCreateIdValue
+#define XCan_mCreateIdValue XCan_CreateIdValue
+#endif
+
+#ifndef XCan_mCreateDlcValue
+#define XCan_mCreateDlcValue XCan_CreateDlcValue
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XDmaCentral
+ *
+ *********************************************************************/
+#ifndef XDmaCentral_mWriteReg
+#define XDmaCentral_mWriteReg XDmaCentral_WriteReg
+#endif
+
+#ifndef XDmaCentral_mReadReg
+#define XDmaCentral_mReadReg XDmaCentral_ReadReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XDsAdc
+ *
+ *********************************************************************/
+#ifndef XDsAdc_mWriteReg
+#define XDsAdc_mWriteReg XDsAdc_WriteReg
+#endif
+
+#ifndef XDsAdc_mReadReg
+#define XDsAdc_mReadReg XDsAdc_ReadReg
+#endif
+
+#ifndef XDsAdc_mIsEmpty
+#define XDsAdc_mIsEmpty XDsAdc_IsEmpty
+#endif
+
+#ifndef XDsAdc_mSetFstmReg
+#define XDsAdc_mSetFstmReg XDsAdc_SetFstmReg
+#endif
+
+#ifndef XDsAdc_mGetFstmReg
+#define XDsAdc_mGetFstmReg XDsAdc_GetFstmReg
+#endif
+
+#ifndef XDsAdc_mEnableConversion
+#define XDsAdc_mEnableConversion XDsAdc_EnableConversion
+#endif
+
+#ifndef XDsAdc_mDisableConversion
+#define XDsAdc_mDisableConversion XDsAdc_DisableConversion
+#endif
+
+#ifndef XDsAdc_mGetFifoOccyReg
+#define XDsAdc_mGetFifoOccyReg XDsAdc_GetFifoOccyReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XDsDac
+ *
+ *********************************************************************/
+#ifndef XDsDac_mWriteReg
+#define XDsDac_mWriteReg XDsDac_WriteReg
+#endif
+
+#ifndef XDsDac_mReadReg
+#define XDsDac_mReadReg XDsDac_ReadReg
+#endif
+
+#ifndef XDsDac_mIsEmpty
+#define XDsDac_mIsEmpty XDsDac_IsEmpty
+#endif
+
+#ifndef XDsDac_mFifoIsFull
+#define XDsDac_mFifoIsFull XDsDac_FifoIsFull
+#endif
+
+#ifndef XDsDac_mGetVacancy
+#define XDsDac_mGetVacancy XDsDac_GetVacancy
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XEmacLite
+ *
+ *********************************************************************/
+#ifndef XEmacLite_mReadReg
+#define XEmacLite_mReadReg XEmacLite_ReadReg
+#endif
+
+#ifndef XEmacLite_mWriteReg
+#define XEmacLite_mWriteReg XEmacLite_WriteReg
+#endif
+
+#ifndef XEmacLite_mGetTxStatus
+#define XEmacLite_mGetTxStatus XEmacLite_GetTxStatus
+#endif
+
+#ifndef XEmacLite_mSetTxStatus
+#define XEmacLite_mSetTxStatus XEmacLite_SetTxStatus
+#endif
+
+#ifndef XEmacLite_mGetRxStatus
+#define XEmacLite_mGetRxStatus XEmacLite_GetRxStatus
+#endif
+
+#ifndef XEmacLite_mSetRxStatus
+#define XEmacLite_mSetRxStatus XEmacLite_SetRxStatus
+#endif
+
+#ifndef XEmacLite_mIsTxDone
+#define XEmacLite_mIsTxDone XEmacLite_IsTxDone
+#endif
+
+#ifndef XEmacLite_mIsRxEmpty
+#define XEmacLite_mIsRxEmpty XEmacLite_IsRxEmpty
+#endif
+
+#ifndef XEmacLite_mNextTransmitAddr
+#define XEmacLite_mNextTransmitAddr XEmacLite_NextTransmitAddr
+#endif
+
+#ifndef XEmacLite_mNextReceiveAddr
+#define XEmacLite_mNextReceiveAddr XEmacLite_NextReceiveAddr
+#endif
+
+#ifndef XEmacLite_mIsMdioConfigured
+#define XEmacLite_mIsMdioConfigured XEmacLite_IsMdioConfigured
+#endif
+
+#ifndef XEmacLite_mIsLoopbackConfigured
+#define XEmacLite_mIsLoopbackConfigured XEmacLite_IsLoopbackConfigured
+#endif
+
+#ifndef XEmacLite_mGetReceiveDataLength
+#define XEmacLite_mGetReceiveDataLength XEmacLite_GetReceiveDataLength
+#endif
+
+#ifndef XEmacLite_mGetTxActive
+#define XEmacLite_mGetTxActive XEmacLite_GetTxActive
+#endif
+
+#ifndef XEmacLite_mSetTxActive
+#define XEmacLite_mSetTxActive XEmacLite_SetTxActive
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XGpio
+ *
+ *********************************************************************/
+#ifndef XGpio_mWriteReg
+#define XGpio_mWriteReg XGpio_WriteReg
+#endif
+
+#ifndef XGpio_mReadReg
+#define XGpio_mReadReg XGpio_ReadReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XHwIcap
+ *
+ *********************************************************************/
+#ifndef XHwIcap_mFifoWrite
+#define XHwIcap_mFifoWrite XHwIcap_FifoWrite
+#endif
+
+#ifndef XHwIcap_mFifoRead
+#define XHwIcap_mFifoRead XHwIcap_FifoRead
+#endif
+
+#ifndef XHwIcap_mSetSizeReg
+#define XHwIcap_mSetSizeReg XHwIcap_SetSizeReg
+#endif
+
+#ifndef XHwIcap_mGetControlReg
+#define XHwIcap_mGetControlReg XHwIcap_GetControlReg
+#endif
+
+#ifndef XHwIcap_mStartConfig
+#define XHwIcap_mStartConfig XHwIcap_StartConfig
+#endif
+
+#ifndef XHwIcap_mStartReadBack
+#define XHwIcap_mStartReadBack XHwIcap_StartReadBack
+#endif
+
+#ifndef XHwIcap_mGetStatusReg
+#define XHwIcap_mGetStatusReg XHwIcap_GetStatusReg
+#endif
+
+#ifndef XHwIcap_mIsTransferDone
+#define XHwIcap_mIsTransferDone XHwIcap_IsTransferDone
+#endif
+
+#ifndef XHwIcap_mIsDeviceBusy
+#define XHwIcap_mIsDeviceBusy XHwIcap_IsDeviceBusy
+#endif
+
+#ifndef XHwIcap_mIntrGlobalEnable
+#define XHwIcap_mIntrGlobalEnable XHwIcap_IntrGlobalEnable
+#endif
+
+#ifndef XHwIcap_mIntrGlobalDisable
+#define XHwIcap_mIntrGlobalDisable XHwIcap_IntrGlobalDisable
+#endif
+
+#ifndef XHwIcap_mIntrGetStatus
+#define XHwIcap_mIntrGetStatus XHwIcap_IntrGetStatus
+#endif
+
+#ifndef XHwIcap_mIntrDisable
+#define XHwIcap_mIntrDisable XHwIcap_IntrDisable
+#endif
+
+#ifndef XHwIcap_mIntrEnable
+#define XHwIcap_mIntrEnable XHwIcap_IntrEnable
+#endif
+
+#ifndef XHwIcap_mIntrGetEnabled
+#define XHwIcap_mIntrGetEnabled XHwIcap_IntrGetEnabled
+#endif
+
+#ifndef XHwIcap_mIntrClear
+#define XHwIcap_mIntrClear XHwIcap_IntrClear
+#endif
+
+#ifndef XHwIcap_mGetWrFifoVacancy
+#define XHwIcap_mGetWrFifoVacancy XHwIcap_GetWrFifoVacancy
+#endif
+
+#ifndef XHwIcap_mGetRdFifoOccupancy
+#define XHwIcap_mGetRdFifoOccupancy XHwIcap_GetRdFifoOccupancy
+#endif
+
+#ifndef XHwIcap_mSliceX2Col
+#define XHwIcap_mSliceX2Col XHwIcap_SliceX2Col
+#endif
+
+#ifndef XHwIcap_mSliceY2Row
+#define XHwIcap_mSliceY2Row XHwIcap_SliceY2Row
+#endif
+
+#ifndef XHwIcap_mSliceXY2Slice
+#define XHwIcap_mSliceXY2Slice XHwIcap_SliceXY2Slice
+#endif
+
+#ifndef XHwIcap_mReadReg
+#define XHwIcap_mReadReg XHwIcap_ReadReg
+#endif
+
+#ifndef XHwIcap_mWriteReg
+#define XHwIcap_mWriteReg XHwIcap_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XIic
+ *
+ *********************************************************************/
+#ifndef XIic_mReadReg
+#define XIic_mReadReg XIic_ReadReg
+#endif
+
+#ifndef XIic_mWriteReg
+#define XIic_mWriteReg XIic_WriteReg
+#endif
+
+#ifndef XIic_mEnterCriticalRegion
+#define XIic_mEnterCriticalRegion XIic_IntrGlobalDisable
+#endif
+
+#ifndef XIic_mExitCriticalRegion
+#define XIic_mExitCriticalRegion XIic_IntrGlobalEnable
+#endif
+
+#ifndef XIIC_GINTR_DISABLE
+#define XIIC_GINTR_DISABLE XIic_IntrGlobalDisable
+#endif
+
+#ifndef XIIC_GINTR_ENABLE
+#define XIIC_GINTR_ENABLE XIic_IntrGlobalEnable
+#endif
+
+#ifndef XIIC_IS_GINTR_ENABLED
+#define XIIC_IS_GINTR_ENABLED XIic_IsIntrGlobalEnabled
+#endif
+
+#ifndef XIIC_WRITE_IISR
+#define XIIC_WRITE_IISR XIic_WriteIisr
+#endif
+
+#ifndef XIIC_READ_IISR
+#define XIIC_READ_IISR XIic_ReadIisr
+#endif
+
+#ifndef XIIC_WRITE_IIER
+#define XIIC_WRITE_IIER XIic_WriteIier
+#endif
+
+#ifndef XIic_mClearIisr
+#define XIic_mClearIisr XIic_ClearIisr
+#endif
+
+#ifndef XIic_mSend7BitAddress
+#define XIic_mSend7BitAddress XIic_Send7BitAddress
+#endif
+
+#ifndef XIic_mDynSend7BitAddress
+#define XIic_mDynSend7BitAddress XIic_DynSend7BitAddress
+#endif
+
+#ifndef XIic_mDynSendStartStopAddress
+#define XIic_mDynSendStartStopAddress XIic_DynSendStartStopAddress
+#endif
+
+#ifndef XIic_mDynSendStop
+#define XIic_mDynSendStop XIic_DynSendStop
+#endif
+
+#ifndef XIic_mSend10BitAddrByte1
+#define XIic_mSend10BitAddrByte1 XIic_Send10BitAddrByte1
+#endif
+
+#ifndef XIic_mSend10BitAddrByte2
+#define XIic_mSend10BitAddrByte2 XIic_Send10BitAddrByte2
+#endif
+
+#ifndef XIic_mSend7BitAddr
+#define XIic_mSend7BitAddr XIic_Send7BitAddr
+#endif
+
+#ifndef XIic_mDisableIntr
+#define XIic_mDisableIntr XIic_DisableIntr
+#endif
+
+#ifndef XIic_mEnableIntr
+#define XIic_mEnableIntr XIic_EnableIntr
+#endif
+
+#ifndef XIic_mClearIntr
+#define XIic_mClearIntr XIic_ClearIntr
+#endif
+
+#ifndef XIic_mClearEnableIntr
+#define XIic_mClearEnableIntr XIic_ClearEnableIntr
+#endif
+
+#ifndef XIic_mFlushRxFifo
+#define XIic_mFlushRxFifo XIic_FlushRxFifo
+#endif
+
+#ifndef XIic_mFlushTxFifo
+#define XIic_mFlushTxFifo XIic_FlushTxFifo
+#endif
+
+#ifndef XIic_mReadRecvByte
+#define XIic_mReadRecvByte XIic_ReadRecvByte
+#endif
+
+#ifndef XIic_mWriteSendByte
+#define XIic_mWriteSendByte XIic_WriteSendByte
+#endif
+
+#ifndef XIic_mSetControlRegister
+#define XIic_mSetControlRegister XIic_SetControlRegister
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XIntc
+ *
+ *********************************************************************/
+#ifndef XIntc_mMasterEnable
+#define XIntc_mMasterEnable XIntc_MasterEnable
+#endif
+
+#ifndef XIntc_mMasterDisable
+#define XIntc_mMasterDisable XIntc_MasterDisable
+#endif
+
+#ifndef XIntc_mEnableIntr
+#define XIntc_mEnableIntr XIntc_EnableIntr
+#endif
+
+#ifndef XIntc_mDisableIntr
+#define XIntc_mDisableIntr XIntc_DisableIntr
+#endif
+
+#ifndef XIntc_mAckIntr
+#define XIntc_mAckIntr XIntc_AckIntr
+#endif
+
+#ifndef XIntc_mGetIntrStatus
+#define XIntc_mGetIntrStatus XIntc_GetIntrStatus
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XLlDma
+ *
+ *********************************************************************/
+#ifndef XLlDma_mBdRead
+#define XLlDma_mBdRead XLlDma_BdRead
+#endif
+
+#ifndef XLlDma_mBdWrite
+#define XLlDma_mBdWrite XLlDma_BdWrite
+#endif
+
+#ifndef XLlDma_mWriteReg
+#define XLlDma_mWriteReg XLlDma_WriteReg
+#endif
+
+#ifndef XLlDma_mReadReg
+#define XLlDma_mReadReg XLlDma_ReadReg
+#endif
+
+#ifndef XLlDma_mBdClear
+#define XLlDma_mBdClear XLlDma_BdClear
+#endif
+
+#ifndef XLlDma_mBdSetStsCtrl
+#define XLlDma_mBdSetStsCtrl XLlDma_BdSetStsCtrl
+#endif
+
+#ifndef XLlDma_mBdGetStsCtrl
+#define XLlDma_mBdGetStsCtrl XLlDma_BdGetStsCtrl
+#endif
+
+#ifndef XLlDma_mBdSetLength
+#define XLlDma_mBdSetLength XLlDma_BdSetLength
+#endif
+
+#ifndef XLlDma_mBdGetLength
+#define XLlDma_mBdGetLength XLlDma_BdGetLength
+#endif
+
+#ifndef XLlDma_mBdSetId
+#define XLlDma_mBdSetId XLlDma_BdSetId
+#endif
+
+#ifndef XLlDma_mBdGetId
+#define XLlDma_mBdGetId XLlDma_BdGetId
+#endif
+
+#ifndef XLlDma_mBdSetBufAddr
+#define XLlDma_mBdSetBufAddr XLlDma_BdSetBufAddr
+#endif
+
+#ifndef XLlDma_mBdGetBufAddr
+#define XLlDma_mBdGetBufAddr XLlDma_BdGetBufAddr
+#endif
+
+#ifndef XLlDma_mBdGetLength
+#define XLlDma_mBdGetLength XLlDma_BdGetLength
+#endif
+
+#ifndef XLlDma_mGetTxRing
+#define XLlDma_mGetTxRing XLlDma_GetTxRing
+#endif
+
+#ifndef XLlDma_mGetRxRing
+#define XLlDma_mGetRxRing XLlDma_GetRxRing
+#endif
+
+#ifndef XLlDma_mGetCr
+#define XLlDma_mGetCr XLlDma_GetCr
+#endif
+
+#ifndef XLlDma_mSetCr
+#define XLlDma_mSetCr XLlDma_SetCr
+#endif
+
+#ifndef XLlDma_mBdRingCntCalc
+#define XLlDma_mBdRingCntCalc XLlDma_BdRingCntCalc
+#endif
+
+#ifndef XLlDma_mBdRingMemCalc
+#define XLlDma_mBdRingMemCalc XLlDma_BdRingMemCalc
+#endif
+
+#ifndef XLlDma_mBdRingGetCnt
+#define XLlDma_mBdRingGetCnt XLlDma_BdRingGetCnt
+#endif
+
+#ifndef XLlDma_mBdRingGetFreeCnt
+#define XLlDma_mBdRingGetFreeCnt XLlDma_BdRingGetFreeCnt
+#endif
+
+#ifndef XLlDma_mBdRingSnapShotCurrBd
+#define XLlDma_mBdRingSnapShotCurrBd XLlDma_BdRingSnapShotCurrBd
+#endif
+
+#ifndef XLlDma_mBdRingNext
+#define XLlDma_mBdRingNext XLlDma_BdRingNext
+#endif
+
+#ifndef XLlDma_mBdRingPrev
+#define XLlDma_mBdRingPrev XLlDma_BdRingPrev
+#endif
+
+#ifndef XLlDma_mBdRingGetSr
+#define XLlDma_mBdRingGetSr XLlDma_BdRingGetSr
+#endif
+
+#ifndef XLlDma_mBdRingSetSr
+#define XLlDma_mBdRingSetSr XLlDma_BdRingSetSr
+#endif
+
+#ifndef XLlDma_mBdRingGetCr
+#define XLlDma_mBdRingGetCr XLlDma_BdRingGetCr
+#endif
+
+#ifndef XLlDma_mBdRingSetCr
+#define XLlDma_mBdRingSetCr XLlDma_BdRingSetCr
+#endif
+
+#ifndef XLlDma_mBdRingBusy
+#define XLlDma_mBdRingBusy XLlDma_BdRingBusy
+#endif
+
+#ifndef XLlDma_mBdRingIntEnable
+#define XLlDma_mBdRingIntEnable XLlDma_BdRingIntEnable
+#endif
+
+#ifndef XLlDma_mBdRingIntDisable
+#define XLlDma_mBdRingIntDisable XLlDma_BdRingIntDisable
+#endif
+
+#ifndef XLlDma_mBdRingIntGetEnabled
+#define XLlDma_mBdRingIntGetEnabled XLlDma_BdRingIntGetEnabled
+#endif
+
+#ifndef XLlDma_mBdRingGetIrq
+#define XLlDma_mBdRingGetIrq XLlDma_BdRingGetIrq
+#endif
+
+#ifndef XLlDma_mBdRingAckIrq
+#define XLlDma_mBdRingAckIrq XLlDma_BdRingAckIrq
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XMbox
+ *
+ *********************************************************************/
+#ifndef XMbox_mWriteReg
+#define XMbox_mWriteReg XMbox_WriteReg
+#endif
+
+#ifndef XMbox_mReadReg
+#define XMbox_mReadReg XMbox_ReadReg
+#endif
+
+#ifndef XMbox_mWriteMBox
+#define XMbox_mWriteMBox XMbox_WriteMBox
+#endif
+
+#ifndef XMbox_mReadMBox
+#define XMbox_mReadMBox XMbox_ReadMBox
+#endif
+
+#ifndef XMbox_mFSLReadMBox
+#define XMbox_mFSLReadMBox XMbox_FSLReadMBox
+#endif
+
+#ifndef XMbox_mFSLWriteMBox
+#define XMbox_mFSLWriteMBox XMbox_FSLWriteMBox
+#endif
+
+#ifndef XMbox_mFSLIsEmpty
+#define XMbox_mFSLIsEmpty XMbox_FSLIsEmpty
+#endif
+
+#ifndef XMbox_mFSLIsFull
+#define XMbox_mFSLIsFull XMbox_FSLIsFull
+#endif
+
+#ifndef XMbox_mIsEmpty
+#define XMbox_mIsEmpty XMbox_IsEmptyHw
+#endif
+
+#ifndef XMbox_mIsFull
+#define XMbox_mIsFull XMbox_IsFullHw
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XMpmc
+ *
+ *********************************************************************/
+#ifndef XMpmc_mReadReg
+#define XMpmc_mReadReg XMpmc_ReadReg
+#endif
+
+#ifndef XMpmc_mWriteReg
+#define XMpmc_mWriteReg XMpmc_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XMutex
+ *
+ *********************************************************************/
+#ifndef XMutex_mWriteReg
+#define XMutex_mWriteReg XMutex_WriteReg
+#endif
+
+#ifndef XMutex_mReadReg
+#define XMutex_mReadReg XMutex_ReadReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XPcie
+ *
+ *********************************************************************/
+#ifndef XPcie_mReadReg
+#define XPcie_mReadReg XPcie_ReadReg
+#endif
+
+#ifndef XPcie_mWriteReg
+#define XPcie_mWriteReg XPcie_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XSpi
+ *
+ *********************************************************************/
+#ifndef XSpi_mIntrGlobalEnable
+#define XSpi_mIntrGlobalEnable XSpi_IntrGlobalEnable
+#endif
+
+#ifndef XSpi_mIntrGlobalDisable
+#define XSpi_mIntrGlobalDisable XSpi_IntrGlobalDisable
+#endif
+
+#ifndef XSpi_mIsIntrGlobalEnabled
+#define XSpi_mIsIntrGlobalEnabled XSpi_IsIntrGlobalEnabled
+#endif
+
+#ifndef XSpi_mIntrGetStatus
+#define XSpi_mIntrGetStatus XSpi_IntrGetStatus
+#endif
+
+#ifndef XSpi_mIntrClear
+#define XSpi_mIntrClear XSpi_IntrClear
+#endif
+
+#ifndef XSpi_mIntrEnable
+#define XSpi_mIntrEnable XSpi_IntrEnable
+#endif
+
+#ifndef XSpi_mIntrDisable
+#define XSpi_mIntrDisable XSpi_IntrDisable
+#endif
+
+#ifndef XSpi_mIntrGetEnabled
+#define XSpi_mIntrGetEnabled XSpi_IntrGetEnabled
+#endif
+
+#ifndef XSpi_mSetControlReg
+#define XSpi_mSetControlReg XSpi_SetControlReg
+#endif
+
+#ifndef XSpi_mGetControlReg
+#define XSpi_mGetControlReg XSpi_GetControlReg
+#endif
+
+#ifndef XSpi_mGetStatusReg
+#define XSpi_mGetStatusReg XSpi_GetStatusReg
+#endif
+
+#ifndef XSpi_mSetSlaveSelectReg
+#define XSpi_mSetSlaveSelectReg XSpi_SetSlaveSelectReg
+#endif
+
+#ifndef XSpi_mGetSlaveSelectReg
+#define XSpi_mGetSlaveSelectReg XSpi_GetSlaveSelectReg
+#endif
+
+#ifndef XSpi_mEnable
+#define XSpi_mEnable XSpi_Enable
+#endif
+
+#ifndef XSpi_mDisable
+#define XSpi_mDisable XSpi_Disable
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XSysAce
+ *
+ *********************************************************************/
+#ifndef XSysAce_mGetControlReg
+#define XSysAce_mGetControlReg XSysAce_GetControlReg
+#endif
+
+#ifndef XSysAce_mSetControlReg
+#define XSysAce_mSetControlReg XSysAce_SetControlReg
+#endif
+
+#ifndef XSysAce_mOrControlReg
+#define XSysAce_mOrControlReg XSysAce_OrControlReg
+#endif
+
+#ifndef XSysAce_mAndControlReg
+#define XSysAce_mAndControlReg XSysAce_AndControlReg
+#endif
+
+#ifndef XSysAce_mGetErrorReg
+#define XSysAce_mGetErrorReg XSysAce_GetErrorReg
+#endif
+
+#ifndef XSysAce_mGetStatusReg
+#define XSysAce_mGetStatusReg XSysAce_GetStatusReg
+#endif
+
+#ifndef XSysAce_mWaitForLock
+#define XSysAce_mWaitForLock XSysAce_WaitForLock
+#endif
+
+#ifndef XSysAce_mEnableIntr
+#define XSysAce_mEnableIntr XSysAce_EnableIntr
+#endif
+
+#ifndef XSysAce_mDisableIntr
+#define XSysAce_mDisableIntr XSysAce_DisableIntr
+#endif
+
+#ifndef XSysAce_mIsReadyForCmd
+#define XSysAce_mIsReadyForCmd XSysAce_IsReadyForCmd
+#endif
+
+#ifndef XSysAce_mIsMpuLocked
+#define XSysAce_mIsMpuLocked XSysAce_IsMpuLocked
+#endif
+
+#ifndef XSysAce_mIsIntrEnabled
+#define XSysAce_mIsIntrEnabled XSysAce_IsIntrEnabled
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XSysMon
+ *
+ *********************************************************************/
+#ifndef XSysMon_mIsEventSamplingModeSet
+#define XSysMon_mIsEventSamplingModeSet XSysMon_IsEventSamplingModeSet
+#endif
+
+#ifndef XSysMon_mIsDrpBusy
+#define XSysMon_mIsDrpBusy XSysMon_IsDrpBusy
+#endif
+
+#ifndef XSysMon_mIsDrpLocked
+#define XSysMon_mIsDrpLocked XSysMon_IsDrpLocked
+#endif
+
+#ifndef XSysMon_mRawToTemperature
+#define XSysMon_mRawToTemperature XSysMon_RawToTemperature
+#endif
+
+#ifndef XSysMon_mRawToVoltage
+#define XSysMon_mRawToVoltage XSysMon_RawToVoltage
+#endif
+
+#ifndef XSysMon_mTemperatureToRaw
+#define XSysMon_mTemperatureToRaw XSysMon_TemperatureToRaw
+#endif
+
+#ifndef XSysMon_mVoltageToRaw
+#define XSysMon_mVoltageToRaw XSysMon_VoltageToRaw
+#endif
+
+#ifndef XSysMon_mReadReg
+#define XSysMon_mReadReg XSysMon_ReadReg
+#endif
+
+#ifndef XSysMon_mWriteReg
+#define XSysMon_mWriteReg XSysMon_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XTmrCtr
+ *
+ *********************************************************************/
+#ifndef XTimerCtr_mReadReg
+#define XTimerCtr_mReadReg XTimerCtr_ReadReg
+#endif
+
+#ifndef XTmrCtr_mWriteReg
+#define XTmrCtr_mWriteReg XTmrCtr_WriteReg
+#endif
+
+#ifndef XTmrCtr_mSetControlStatusReg
+#define XTmrCtr_mSetControlStatusReg XTmrCtr_SetControlStatusReg
+#endif
+
+#ifndef XTmrCtr_mGetControlStatusReg
+#define XTmrCtr_mGetControlStatusReg XTmrCtr_GetControlStatusReg
+#endif
+
+#ifndef XTmrCtr_mGetTimerCounterReg
+#define XTmrCtr_mGetTimerCounterReg XTmrCtr_GetTimerCounterReg
+#endif
+
+#ifndef XTmrCtr_mSetLoadReg
+#define XTmrCtr_mSetLoadReg XTmrCtr_SetLoadReg
+#endif
+
+#ifndef XTmrCtr_mGetLoadReg
+#define XTmrCtr_mGetLoadReg XTmrCtr_GetLoadReg
+#endif
+
+#ifndef XTmrCtr_mEnable
+#define XTmrCtr_mEnable XTmrCtr_Enable
+#endif
+
+#ifndef XTmrCtr_mDisable
+#define XTmrCtr_mDisable XTmrCtr_Disable
+#endif
+
+#ifndef XTmrCtr_mEnableIntr
+#define XTmrCtr_mEnableIntr XTmrCtr_EnableIntr
+#endif
+
+#ifndef XTmrCtr_mDisableIntr
+#define XTmrCtr_mDisableIntr XTmrCtr_DisableIntr
+#endif
+
+#ifndef XTmrCtr_mLoadTimerCounterReg
+#define XTmrCtr_mLoadTimerCounterReg XTmrCtr_LoadTimerCounterReg
+#endif
+
+#ifndef XTmrCtr_mHasEventOccurred
+#define XTmrCtr_mHasEventOccurred XTmrCtr_HasEventOccurred
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XUartLite
+ *
+ *********************************************************************/
+#ifndef XUartLite_mUpdateStats
+#define XUartLite_mUpdateStats XUartLite_UpdateStats
+#endif
+
+#ifndef XUartLite_mWriteReg
+#define XUartLite_mWriteReg XUartLite_WriteReg
+#endif
+
+#ifndef XUartLite_mReadReg
+#define XUartLite_mReadReg XUartLite_ReadReg
+#endif
+
+#ifndef XUartLite_mClearStats
+#define XUartLite_mClearStats XUartLite_ClearStats
+#endif
+
+#ifndef XUartLite_mSetControlReg
+#define XUartLite_mSetControlReg XUartLite_SetControlReg
+#endif
+
+#ifndef XUartLite_mGetStatusReg
+#define XUartLite_mGetStatusReg XUartLite_GetStatusReg
+#endif
+
+#ifndef XUartLite_mIsReceiveEmpty
+#define XUartLite_mIsReceiveEmpty XUartLite_IsReceiveEmpty
+#endif
+
+#ifndef XUartLite_mIsTransmitFull
+#define XUartLite_mIsTransmitFull XUartLite_IsTransmitFull
+#endif
+
+#ifndef XUartLite_mIsIntrEnabled
+#define XUartLite_mIsIntrEnabled XUartLite_IsIntrEnabled
+#endif
+
+#ifndef XUartLite_mEnableIntr
+#define XUartLite_mEnableIntr XUartLite_EnableIntr
+#endif
+
+#ifndef XUartLite_mDisableIntr
+#define XUartLite_mDisableIntr XUartLite_DisableIntr
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XUartNs550
+ *
+ *********************************************************************/
+#ifndef XUartNs550_mUpdateStats
+#define XUartNs550_mUpdateStats XUartNs550_UpdateStats
+#endif
+
+#ifndef XUartNs550_mReadReg
+#define XUartNs550_mReadReg XUartNs550_ReadReg
+#endif
+
+#ifndef XUartNs550_mWriteReg
+#define XUartNs550_mWriteReg XUartNs550_WriteReg
+#endif
+
+#ifndef XUartNs550_mClearStats
+#define XUartNs550_mClearStats XUartNs550_ClearStats
+#endif
+
+#ifndef XUartNs550_mGetLineStatusReg
+#define XUartNs550_mGetLineStatusReg XUartNs550_GetLineStatusReg
+#endif
+
+#ifndef XUartNs550_mGetLineControlReg
+#define XUartNs550_mGetLineControlReg XUartNs550_GetLineControlReg
+#endif
+
+#ifndef XUartNs550_mSetLineControlReg
+#define XUartNs550_mSetLineControlReg XUartNs550_SetLineControlReg
+#endif
+
+#ifndef XUartNs550_mEnableIntr
+#define XUartNs550_mEnableIntr XUartNs550_EnableIntr
+#endif
+
+#ifndef XUartNs550_mDisableIntr
+#define XUartNs550_mDisableIntr XUartNs550_DisableIntr
+#endif
+
+#ifndef XUartNs550_mIsReceiveData
+#define XUartNs550_mIsReceiveData XUartNs550_IsReceiveData
+#endif
+
+#ifndef XUartNs550_mIsTransmitEmpty
+#define XUartNs550_mIsTransmitEmpty XUartNs550_IsTransmitEmpty
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XUsb
+ *
+ *********************************************************************/
+#ifndef XUsb_mReadReg
+#define XUsb_mReadReg XUsb_ReadReg
+#endif
+
+#ifndef XUsb_mWriteReg
+#define XUsb_mWriteReg XUsb_WriteReg
+#endif
+
+#endif
diff --git a/src/Xilinx/include/xil_mem.h b/src/Xilinx/include/xil_mem.h
new file mode 100644
index 0000000..a2d5e66
--- /dev/null
+++ b/src/Xilinx/include/xil_mem.h
@@ -0,0 +1,59 @@
+/******************************************************************************/
+/**
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+* @file xil_mem.h
+*
+* @addtogroup common_mem_operation_api Customized APIs for Memory Operations
+*
+* The xil_mem.h file contains prototype for functions related
+* to memory operations. These APIs are applicable for all processors supported
+* by Xilinx.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 6.1   nsk      11/07/16 First release.
+*
+* 

+*
+*****************************************************************************/
+
+/************************** Function Prototypes *****************************/
+
+void Xil_MemCpy(void* dst, const void* src, u32 cnt);
+/**
+* @} End of "addtogroup common_mem_operation_api".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/include/xil_mmu.h b/src/Xilinx/include/xil_mmu.h
new file mode 100644
index 0000000..28a7c78
--- /dev/null
+++ b/src/Xilinx/include/xil_mmu.h
@@ -0,0 +1,80 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.h
+* This file only includes xil_mpu.h which contains Xil_SetTlbAttributes API
+* defined for MPU in R5. R5 does not have mmu and for usage of similiar API
+* the file has been created.
+*
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.0	pkp  2/12/15 Initial version
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef XIL_MMU_H
+#define XIL_MMU_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/***************************** Include Files *********************************/
+
+#include "xil_mpu.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_MMU_H */
diff --git a/src/Xilinx/include/xil_mpu.h b/src/Xilinx/include/xil_mpu.h
new file mode 100644
index 0000000..95ffc66
--- /dev/null
+++ b/src/Xilinx/include/xil_mpu.h
@@ -0,0 +1,134 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.h
+*
+* @addtogroup r5_mpu_apis Cortex R5 Processor MPU specific APIs
+*
+* MPU functions provides access to MPU operations such as enable MPU, disable
+* MPU and set attribute for section of memory.
+* Boot code invokes Init_MPU function to configure the MPU. A total of 10 MPU
+* regions are allocated with another 6 being free for users. Overview of the
+* memory attributes for different MPU regions is as given below,
+*
+*|                       | Memory Range            | Attributes of MPURegion     |
+*|-----------------------|-------------------------|-----------------------------|
+*| DDR                   | 0x00000000 - 0x7FFFFFFF | Normal write-back Cacheable |
+*| PL                    | 0x80000000 - 0xBFFFFFFF | Strongly Ordered            |
+*| QSPI                  | 0xC0000000 - 0xDFFFFFFF | Device Memory               |
+*| PCIe                  | 0xE0000000 - 0xEFFFFFFF | Device Memory               |
+*| STM_CORESIGHT         | 0xF8000000 - 0xF8FFFFFF | Device Memory               |
+*| RPU_R5_GIC            | 0xF9000000 - 0xF90FFFFF | Device memory               |
+*| FPS                   | 0xFD000000 - 0xFDFFFFFF | Device Memory               |
+*| LPS                   | 0xFE000000 - 0xFFFFFFFF | Device Memory               |
+*| OCM                   | 0xFFFC0000 - 0xFFFFFFFF | Normal write-back Cacheable |
+*
+*
+* @note
+* For a system where DDR is less than 2GB, region after DDR and before PL is
+* marked as undefined in translation table. Memory range 0xFE000000-0xFEFFFFFF is
+* allocated for upper LPS slaves, where as memory region 0xFF000000-0xFFFFFFFF is
+* allocated for lower LPS slaves.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 6.4   asa  08/16/17 Added many APIs for MPU access to make MPU usage
+* 					  user-friendly. The APIs added are: Xil_UpdateMPUConfig,
+* 					  Xil_GetMPUConfig, Xil_GetNumOfFreeRegions,
+* 					  Xil_GetNextMPURegion, Xil_DisableMPURegionByRegNum,
+* 					  Xil_GetMPUFreeRegMask, Xil_SetMPURegionByRegNum, and
+* 					  Xil_InitializeExistingMPURegConfig.
+* 					  Added a new array of structure of type XMpuConfig to
+* 					  represent the MPU configuration table.
+* 

+*
+
+*
+*
+******************************************************************************/
+
+#ifndef XIL_MPU_H
+#define XIL_MPU_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+#include "xil_types.h"
+/***************************** Include Files *********************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+#define MPU_REG_DISABLED		0U
+#define MPU_REG_ENABLED			1U
+#define MAX_POSSIBLE_MPU_REGS	16U
+/**************************** Type Definitions *******************************/
+struct XMpuConfig{
+	u32 RegionStatus; /* Enabled or disabled */
+	INTPTR BaseAddress;/* MPU region base address */
+	u64 Size; /* MPU region size address */
+	u32 Attribute; /* MPU region size attribute */
+};
+
+typedef struct XMpuConfig XMpu_Config[MAX_POSSIBLE_MPU_REGS];
+
+extern XMpu_Config Mpu_Config;
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void Xil_SetTlbAttributes(INTPTR Addr, u32 attrib);
+void Xil_EnableMPU(void);
+void Xil_DisableMPU(void);
+u32 Xil_SetMPURegion(INTPTR addr, u64 size, u32 attrib);
+u32 Xil_UpdateMPUConfig(u32 reg_num, INTPTR address, u32 size, u32 attrib);
+void Xil_GetMPUConfig (XMpu_Config mpuconfig);
+u32 Xil_GetNumOfFreeRegions (void);
+u32 Xil_GetNextMPURegion(void);
+u32 Xil_DisableMPURegionByRegNum (u32 reg_num);
+u16 Xil_GetMPUFreeRegMask (void);
+u32 Xil_SetMPURegionByRegNum (u32 reg_num, INTPTR addr, u64 size, u32 attrib);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_MPU_H */
+/**
+* @} End of "addtogroup r5_mpu_apis".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/include/xil_printf.h b/src/Xilinx/include/xil_printf.h
new file mode 100644
index 0000000..016ae3b
--- /dev/null
+++ b/src/Xilinx/include/xil_printf.h
@@ -0,0 +1,48 @@
+ #ifndef XIL_PRINTF_H
+ #define XIL_PRINTF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include 
+#include 
+#include 
+#include "xil_types.h"
+#include "xparameters.h"
+#include "bspconfig.h"
+#if HYP_GUEST && EL1_NONSECURE && XEN_USE_PV_CONSOLE
+#include "xen_console.h"
+#endif
+
+/*----------------------------------------------------*/
+/* Use the following parameter passing structure to   */
+/* make xil_printf re-entrant.                        */
+/*----------------------------------------------------*/
+
+struct params_s;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+typedef char8* charptr;
+typedef s32 (*func_ptr)(int c);
+
+/*                                                   */
+
+void xil_printf( const char8 *ctrl1, ...);
+void print( const char8 *ptr);
+extern void outbyte (char8 c);
+extern char8 inbyte(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/Xilinx/include/xil_sleeptimer.h b/src/Xilinx/include/xil_sleeptimer.h
new file mode 100644
index 0000000..4bfac0a
--- /dev/null
+++ b/src/Xilinx/include/xil_sleeptimer.h
@@ -0,0 +1,116 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_sleeptimer.h
+*
+* This header file contains ARM Cortex A53,A9,R5 specific sleep related APIs.
+* For sleep related functions that can be used across all Xilinx supported
+* processors, please use xil_sleeptimer.h.
+*
+*
+* 
+* MODIFICATION HISTORY :
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 6.6	srm  10/18/17 First Release.
+*
+* 

+*****************************************************************************/
+
+#ifndef XIL_SLEEPTIMER_H		/* prevent circular inclusions */
+#define XIL_SLEEPTIMER_H		/* by using protection macros */
+/****************************  Include Files  ********************************/
+
+#include "xil_io.h"
+#include "xparameters.h"
+#include "bspconfig.h"
+
+/************************** Constant Definitions *****************************/
+
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32)
+#define XSLEEP_TIMER_REG_SHIFT  32U
+#define XSleep_ReadCounterVal   Xil_In32
+#define XCntrVal 			    u32
+#else
+#define XSLEEP_TIMER_REG_SHIFT  16U
+#define XSleep_ReadCounterVal   Xil_In16
+#define XCntrVal 			    u16
+#endif
+
+#if defined(ARMR5) || (defined (__aarch64__) && EL3==1) || defined (ARMA53_32)
+#define RST_LPD_IOU2 					    0xFF5E0238U
+#define RST_LPD_IOU2_TTC_BASE_RESET_MASK 	0x00000800U
+#endif
+
+#if defined (SLEEP_TIMER_BASEADDR)
+/** @name Register Map
+*
+* Register offsets from the base address of the TTC device
+*
+* @{
+*/
+ #define XSLEEP_TIMER_TTC_CLK_CNTRL_OFFSET		0x00000000U
+					     /**< Clock Control Register */
+ #define XSLEEP_TIMER_TTC_CNT_CNTRL_OFFSET		0x0000000CU
+	                                     /**< Counter Control Register*/
+ #define XSLEEP_TIMER_TTC_COUNT_VALUE_OFFSET	0x00000018U
+					     /**< Current Counter Value */
+/* @} */
+/** @name Clock Control Register
+* Clock Control Register definitions of TTC
+* @{
+*/
+ #define XSLEEP_TIMER_TTC_CLK_CNTRL_PS_EN_MASK		0x00000001U
+						   /**< Prescale enable */
+/* @} */
+/** @name Counter Control Register
+* Counter Control Register definitions of TTC
+* @{
+*/
+#define XSLEEP_TIMER_TTC_CNT_CNTRL_DIS_MASK		0x00000001U
+						/**< Disable the counter */
+#define XSLEEP_TIMER_TTC_CNT_CNTRL_RST_MASK		0x00000010U
+						  /**< Reset counter */
+/* @} */
+
+/**************************** Type Definitions *******************************/
+
+/************************** Function Prototypes ******************************/
+
+void Xil_SleepTTCCommon(u32 delay, u64 frequency);
+void XTime_StartTTCTimer();
+
+#endif
+#endif /* XIL_SLEEPTIMER_H */
diff --git a/src/Xilinx/include/xil_testcache.h b/src/Xilinx/include/xil_testcache.h
new file mode 100644
index 0000000..c35e9a4
--- /dev/null
+++ b/src/Xilinx/include/xil_testcache.h
@@ -0,0 +1,71 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testcache.h
+*
+* @addtogroup common_test_utils
+* 
Cache test 

+* The xil_testcache.h file contains utility functions to test cache.
+*
+* @{
+* 
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a hbm  07/29/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TESTCACHE_H	/* prevent circular inclusions */
+#define XIL_TESTCACHE_H	/* by using protection macros */
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern s32 Xil_TestDCacheRange(void);
+extern s32 Xil_TestDCacheAll(void);
+extern s32 Xil_TestICacheRange(void);
+extern s32 Xil_TestICacheAll(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_test_utils".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/include/xil_testio.h b/src/Xilinx/include/xil_testio.h
new file mode 100644
index 0000000..ad68ead
--- /dev/null
+++ b/src/Xilinx/include/xil_testio.h
@@ -0,0 +1,94 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testio.h
+*
+* @addtogroup common_test_utils Test Utilities
+* 
I/O test 

+* The xil_testio.h file contains utility functions to test endian related memory
+* IO functions.
+*
+* A subset of the memory tests can be selected or all of the tests can be run
+* in order. If there is an error detected by a subtest, the test stops and the
+* failure code is returned. Further tests are not run even if all of the tests
+* are selected.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00 hbm  08/05/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TESTIO_H	/* prevent circular inclusions */
+#define XIL_TESTIO_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+
+#define XIL_TESTIO_DEFAULT 	0
+#define XIL_TESTIO_LE		1
+#define XIL_TESTIO_BE		2
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+extern s32 Xil_TestIO8(u8 *Addr, s32 Length, u8 Value);
+extern s32 Xil_TestIO16(u16 *Addr, s32 Length, u16 Value, s32 Kind, s32 Swap);
+extern s32 Xil_TestIO32(u32 *Addr, s32 Length, u32 Value, s32 Kind, s32 Swap);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_test_utils".
+*/
diff --git a/src/Xilinx/include/xil_testmem.h b/src/Xilinx/include/xil_testmem.h
new file mode 100644
index 0000000..c204728
--- /dev/null
+++ b/src/Xilinx/include/xil_testmem.h
@@ -0,0 +1,158 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testmem.h
+* @addtogroup common_test_utils
+*
+* 
Memory test

+*
+* The xil_testmem.h file contains utility functions to test memory.
+* A subset of the memory tests can be selected or all of the tests can be run
+* in order. If there is an error detected by a subtest, the test stops and the
+* failure code is returned. Further tests are not run even if all of the tests
+* are selected.
+* Following list describes the supported memory tests:
+*
+*  - XIL_TESTMEM_ALLMEMTESTS: This test runs all of the subtests.
+*
+*  - XIL_TESTMEM_INCREMENT: This test
+* starts at 'XIL_TESTMEM_INIT_VALUE' and uses the incrementing value as the
+* test value for memory.
+*
+*  - XIL_TESTMEM_WALKONES: Also known as the Walking ones test. This test
+* uses a walking '1' as the test value for memory.
+* @code
+*          location 1 = 0x00000001
+*          location 2 = 0x00000002
+*          ...
+* @endcode
+*
+*  - XIL_TESTMEM_WALKZEROS: Also known as the Walking zero's test.
+* This test uses the inverse value of the walking ones test
+* as the test value for memory.
+* @code
+*       location 1 = 0xFFFFFFFE
+*       location 2 = 0xFFFFFFFD
+*       ...
+*@endcode
+*
+*  - XIL_TESTMEM_INVERSEADDR: Also known as the inverse address test.
+* This test uses the inverse of the address of the location under test
+* as the test value for memory.
+*
+*  - XIL_TESTMEM_FIXEDPATTERN: Also known as the fixed pattern test.
+* This test uses the provided patters as the test value for memory.
+* If zero is provided as the pattern the test uses '0xDEADBEEF".
+*
+* @warning
+* The tests are DESTRUCTIVE. Run before any initialized memory spaces
+* have been set up.
+* The address provided to the memory tests is not checked for
+* validity except for the NULL case. It is possible to provide a code-space
+* pointer for this test to start with and ultimately destroy executable code
+* causing random failures.
+*
+* @note
+* Used for spaces where the address range of the region is smaller than
+* the data width. If the memory range is greater than 2 ** width,
+* the patterns used in XIL_TESTMEM_WALKONES and XIL_TESTMEM_WALKZEROS will
+* repeat on a boundry of a power of two making it more difficult to detect
+* addressing errors. The XIL_TESTMEM_INCREMENT and XIL_TESTMEM_INVERSEADDR
+* tests suffer the same problem. Ideally, if large blocks of memory are to be
+* tested, break them up into smaller regions of memory to allow the test
+* patterns used not to repeat over the region tested.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a hbm  08/25/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TESTMEM_H	/* prevent circular inclusions */
+#define XIL_TESTMEM_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+/* xutil_memtest defines */
+
+#define XIL_TESTMEM_INIT_VALUE	1U
+
+/** @name Memory subtests
+ * @{
+ */
+/**
+ * See the detailed description of the subtests in the file description.
+ */
+#define XIL_TESTMEM_ALLMEMTESTS     0x00U
+#define XIL_TESTMEM_INCREMENT       0x01U
+#define XIL_TESTMEM_WALKONES        0x02U
+#define XIL_TESTMEM_WALKZEROS       0x03U
+#define XIL_TESTMEM_INVERSEADDR     0x04U
+#define XIL_TESTMEM_FIXEDPATTERN    0x05U
+#define XIL_TESTMEM_MAXTEST         XIL_TESTMEM_FIXEDPATTERN
+/* @} */
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+/* xutil_testmem prototypes */
+
+extern s32 Xil_TestMem32(u32 *Addr, u32 Words, u32 Pattern, u8 Subtest);
+extern s32 Xil_TestMem16(u16 *Addr, u32 Words, u16 Pattern, u8 Subtest);
+extern s32 Xil_TestMem8(u8 *Addr, u32 Words, u8 Pattern, u8 Subtest);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_test_utils".
+*/
diff --git a/src/Xilinx/include/xil_types.h b/src/Xilinx/include/xil_types.h
new file mode 100644
index 0000000..8143aff
--- /dev/null
+++ b/src/Xilinx/include/xil_types.h
@@ -0,0 +1,209 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_types.h
+*
+* @addtogroup common_types Basic Data types for Xilinx® Software IP
+*
+* The xil_types.h file contains basic types for Xilinx software IP. These data types
+* are applicable for all processors supported by Xilinx.
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/14/09 First release
+* 3.03a sdm  05/30/11 Added Xuint64 typedef and XUINT64_MSW/XUINT64_LSW macros
+* 5.00 	pkp  05/29/14 Made changes for 64 bit architecture
+*	srt  07/14/14 Use standard definitions from stdint.h and stddef.h
+*		      Define LONG and ULONG datatypes and mask values
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TYPES_H	/* prevent circular inclusions */
+#define XIL_TYPES_H	/* by using protection macros */
+
+#include 
+#include 
+
+/************************** Constant Definitions *****************************/
+
+#ifndef TRUE
+#  define TRUE		1U
+#endif
+
+#ifndef FALSE
+#  define FALSE		0U
+#endif
+
+#ifndef NULL
+#define NULL		0U
+#endif
+
+#define XIL_COMPONENT_IS_READY     0x11111111U  /**< In device drivers, This macro will be
+                                                 assigend to "IsReady" member of driver
+												 instance to indicate that driver
+												 instance is initialized and ready to use. */
+#define XIL_COMPONENT_IS_STARTED   0x22222222U  /**< In device drivers, This macro will be assigend to
+                                                 "IsStarted" member of driver instance
+												 to indicate that driver instance is
+												 started and it can be enabled. */
+
+/* @name New types
+ * New simple types.
+ * @{
+ */
+#ifndef __KERNEL__
+#ifndef XBASIC_TYPES_H
+/*
+ * guarded against xbasic_types.h.
+ */
+typedef uint8_t u8;
+typedef uint16_t u16;
+typedef uint32_t u32;
+/** @}*/
+#define __XUINT64__
+typedef struct
+{
+	u32 Upper;
+	u32 Lower;
+} Xuint64;
+
+
+/*****************************************************************************/
+/**
+* @brief    Return the most significant half of the 64 bit data type.
+*
+* @param    x is the 64 bit word.
+*
+* @return   The upper 32 bits of the 64 bit word.
+*
+******************************************************************************/
+#define XUINT64_MSW(x) ((x).Upper)
+
+/*****************************************************************************/
+/**
+* @brief    Return the least significant half of the 64 bit data type.
+*
+* @param    x is the 64 bit word.
+*
+* @return   The lower 32 bits of the 64 bit word.
+*
+******************************************************************************/
+#define XUINT64_LSW(x) ((x).Lower)
+
+#endif /* XBASIC_TYPES_H */
+
+/*
+ * xbasic_types.h does not typedef s* or u64
+ */
+/** @{ */
+typedef char char8;
+typedef int8_t s8;
+typedef int16_t s16;
+typedef int32_t s32;
+typedef int64_t s64;
+typedef uint64_t u64;
+typedef int sint32;
+
+typedef intptr_t INTPTR;
+typedef uintptr_t UINTPTR;
+typedef ptrdiff_t PTRDIFF;
+/** @}*/
+#if !defined(LONG) || !defined(ULONG)
+typedef long LONG;
+typedef unsigned long ULONG;
+#endif
+
+#define ULONG64_HI_MASK	0xFFFFFFFF00000000U
+#define ULONG64_LO_MASK	~ULONG64_HI_MASK
+
+#else
+#include 
+#endif
+
+/** @{ */
+/**
+ * This data type defines an interrupt handler for a device.
+ * The argument points to the instance of the component
+ */
+typedef void (*XInterruptHandler) (void *InstancePtr);
+
+/**
+ * This data type defines an exception handler for a processor.
+ * The argument points to the instance of the component
+ */
+typedef void (*XExceptionHandler) (void *InstancePtr);
+
+/**
+ * @brief  Returns 32-63 bits of a number.
+ * @param  n : Number being accessed.
+ * @return Bits 32-63 of number.
+ *
+ * @note    A basic shift-right of a 64- or 32-bit quantity.
+ *          Use this to suppress the "right shift count >= width of type"
+ *          warning when that quantity is 32-bits.
+ */
+#define UPPER_32_BITS(n) ((u32)(((n) >> 16) >> 16))
+
+/**
+ * @brief  Returns 0-31 bits of a number
+ * @param  n : Number being accessed.
+ * @return Bits 0-31 of number
+ */
+#define LOWER_32_BITS(n) ((u32)(n))
+
+
+
+
+/************************** Constant Definitions *****************************/
+
+#ifndef TRUE
+#define TRUE		1U
+#endif
+
+#ifndef FALSE
+#define FALSE		0U
+#endif
+
+#ifndef NULL
+#define NULL		0U
+#endif
+
+#endif	/* end of protection macro */
+/**
+* @} End of "addtogroup common_types".
+*/
diff --git a/src/Xilinx/include/xiou_secure_slcr.h b/src/Xilinx/include/xiou_secure_slcr.h
new file mode 100644
index 0000000..cb4ad49
--- /dev/null
+++ b/src/Xilinx/include/xiou_secure_slcr.h
@@ -0,0 +1,174 @@
+/* ### HEADER ### */
+
+#ifndef __XIOU_SECURE_SLCR_H__
+#define __XIOU_SECURE_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XiouSecureSlcr Base Address
+ */
+#define XIOU_SECURE_SLCR_BASEADDR      0xFF240000UL
+
+/**
+ * Register: XiouSecSlcrAxiWprtcn
+ */
+#define XIOU_SEC_SLCR_AXI_WPRTCN    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000000UL )
+#define XIOU_SEC_SLCR_AXI_WPRTCN_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_SHIFT   25UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_MASK    0x0e000000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_SHIFT   22UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_MASK    0x01c00000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_SHIFT   19UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_MASK    0x00380000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_SHIFT   16UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_MASK    0x00070000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   9UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000e00UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   6UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x000001c0UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000038UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   0UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000007UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrAxiRprtcn
+ */
+#define XIOU_SEC_SLCR_AXI_RPRTCN    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000004UL )
+#define XIOU_SEC_SLCR_AXI_RPRTCN_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_SHIFT   22UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_MASK    0x01c00000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_SHIFT   19UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_MASK    0x00380000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_SHIFT   16UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_MASK    0x00070000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   9UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000e00UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   6UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x000001c0UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000038UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   0UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000007UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrCtrl
+ */
+#define XIOU_SEC_SLCR_CTRL    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000040UL )
+#define XIOU_SEC_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrIsr
+ */
+#define XIOU_SEC_SLCR_ISR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000044UL )
+#define XIOU_SEC_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrImr
+ */
+#define XIOU_SEC_SLCR_IMR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000048UL )
+#define XIOU_SEC_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSecSlcrIer
+ */
+#define XIOU_SEC_SLCR_IER    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XIOU_SEC_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrIdr
+ */
+#define XIOU_SEC_SLCR_IDR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000050UL )
+#define XIOU_SEC_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrItr
+ */
+#define XIOU_SEC_SLCR_ITR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000054UL )
+#define XIOU_SEC_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XIOU_SECURE_SLCR_H__ */
diff --git a/src/Xilinx/include/xiou_slcr.h b/src/Xilinx/include/xiou_slcr.h
new file mode 100644
index 0000000..c53954c
--- /dev/null
+++ b/src/Xilinx/include/xiou_slcr.h
@@ -0,0 +1,4029 @@
+/* ### HEADER ### */
+
+#ifndef __XIOU_SLCR_H__
+#define __XIOU_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XiouSlcr Base Address
+ */
+#define XIOU_SLCR_BASEADDR      0xFF180000UL
+
+/**
+ * Register: XiouSlcrMioPin0
+ */
+#define XIOU_SLCR_MIO_PIN_0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000000UL )
+#define XIOU_SLCR_MIO_PIN_0_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin1
+ */
+#define XIOU_SLCR_MIO_PIN_1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000004UL )
+#define XIOU_SLCR_MIO_PIN_1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin2
+ */
+#define XIOU_SLCR_MIO_PIN_2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000008UL )
+#define XIOU_SLCR_MIO_PIN_2_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin3
+ */
+#define XIOU_SLCR_MIO_PIN_3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XIOU_SLCR_MIO_PIN_3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin4
+ */
+#define XIOU_SLCR_MIO_PIN_4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000010UL )
+#define XIOU_SLCR_MIO_PIN_4_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin5
+ */
+#define XIOU_SLCR_MIO_PIN_5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000014UL )
+#define XIOU_SLCR_MIO_PIN_5_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin6
+ */
+#define XIOU_SLCR_MIO_PIN_6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000018UL )
+#define XIOU_SLCR_MIO_PIN_6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin7
+ */
+#define XIOU_SLCR_MIO_PIN_7    ( ( XIOU_SLCR_BASEADDR ) + 0x0000001CUL )
+#define XIOU_SLCR_MIO_PIN_7_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin8
+ */
+#define XIOU_SLCR_MIO_PIN_8    ( ( XIOU_SLCR_BASEADDR ) + 0x00000020UL )
+#define XIOU_SLCR_MIO_PIN_8_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin9
+ */
+#define XIOU_SLCR_MIO_PIN_9    ( ( XIOU_SLCR_BASEADDR ) + 0x00000024UL )
+#define XIOU_SLCR_MIO_PIN_9_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin10
+ */
+#define XIOU_SLCR_MIO_PIN_10    ( ( XIOU_SLCR_BASEADDR ) + 0x00000028UL )
+#define XIOU_SLCR_MIO_PIN_10_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin11
+ */
+#define XIOU_SLCR_MIO_PIN_11    ( ( XIOU_SLCR_BASEADDR ) + 0x0000002CUL )
+#define XIOU_SLCR_MIO_PIN_11_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin12
+ */
+#define XIOU_SLCR_MIO_PIN_12    ( ( XIOU_SLCR_BASEADDR ) + 0x00000030UL )
+#define XIOU_SLCR_MIO_PIN_12_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin13
+ */
+#define XIOU_SLCR_MIO_PIN_13    ( ( XIOU_SLCR_BASEADDR ) + 0x00000034UL )
+#define XIOU_SLCR_MIO_PIN_13_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin14
+ */
+#define XIOU_SLCR_MIO_PIN_14    ( ( XIOU_SLCR_BASEADDR ) + 0x00000038UL )
+#define XIOU_SLCR_MIO_PIN_14_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin15
+ */
+#define XIOU_SLCR_MIO_PIN_15    ( ( XIOU_SLCR_BASEADDR ) + 0x0000003CUL )
+#define XIOU_SLCR_MIO_PIN_15_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin16
+ */
+#define XIOU_SLCR_MIO_PIN_16    ( ( XIOU_SLCR_BASEADDR ) + 0x00000040UL )
+#define XIOU_SLCR_MIO_PIN_16_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin17
+ */
+#define XIOU_SLCR_MIO_PIN_17    ( ( XIOU_SLCR_BASEADDR ) + 0x00000044UL )
+#define XIOU_SLCR_MIO_PIN_17_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin18
+ */
+#define XIOU_SLCR_MIO_PIN_18    ( ( XIOU_SLCR_BASEADDR ) + 0x00000048UL )
+#define XIOU_SLCR_MIO_PIN_18_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin19
+ */
+#define XIOU_SLCR_MIO_PIN_19    ( ( XIOU_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XIOU_SLCR_MIO_PIN_19_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin20
+ */
+#define XIOU_SLCR_MIO_PIN_20    ( ( XIOU_SLCR_BASEADDR ) + 0x00000050UL )
+#define XIOU_SLCR_MIO_PIN_20_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin21
+ */
+#define XIOU_SLCR_MIO_PIN_21    ( ( XIOU_SLCR_BASEADDR ) + 0x00000054UL )
+#define XIOU_SLCR_MIO_PIN_21_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin22
+ */
+#define XIOU_SLCR_MIO_PIN_22    ( ( XIOU_SLCR_BASEADDR ) + 0x00000058UL )
+#define XIOU_SLCR_MIO_PIN_22_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin23
+ */
+#define XIOU_SLCR_MIO_PIN_23    ( ( XIOU_SLCR_BASEADDR ) + 0x0000005CUL )
+#define XIOU_SLCR_MIO_PIN_23_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin24
+ */
+#define XIOU_SLCR_MIO_PIN_24    ( ( XIOU_SLCR_BASEADDR ) + 0x00000060UL )
+#define XIOU_SLCR_MIO_PIN_24_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin25
+ */
+#define XIOU_SLCR_MIO_PIN_25    ( ( XIOU_SLCR_BASEADDR ) + 0x00000064UL )
+#define XIOU_SLCR_MIO_PIN_25_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin26
+ */
+#define XIOU_SLCR_MIO_PIN_26    ( ( XIOU_SLCR_BASEADDR ) + 0x00000068UL )
+#define XIOU_SLCR_MIO_PIN_26_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin27
+ */
+#define XIOU_SLCR_MIO_PIN_27    ( ( XIOU_SLCR_BASEADDR ) + 0x0000006CUL )
+#define XIOU_SLCR_MIO_PIN_27_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin28
+ */
+#define XIOU_SLCR_MIO_PIN_28    ( ( XIOU_SLCR_BASEADDR ) + 0x00000070UL )
+#define XIOU_SLCR_MIO_PIN_28_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin29
+ */
+#define XIOU_SLCR_MIO_PIN_29    ( ( XIOU_SLCR_BASEADDR ) + 0x00000074UL )
+#define XIOU_SLCR_MIO_PIN_29_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin30
+ */
+#define XIOU_SLCR_MIO_PIN_30    ( ( XIOU_SLCR_BASEADDR ) + 0x00000078UL )
+#define XIOU_SLCR_MIO_PIN_30_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin31
+ */
+#define XIOU_SLCR_MIO_PIN_31    ( ( XIOU_SLCR_BASEADDR ) + 0x0000007CUL )
+#define XIOU_SLCR_MIO_PIN_31_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin32
+ */
+#define XIOU_SLCR_MIO_PIN_32    ( ( XIOU_SLCR_BASEADDR ) + 0x00000080UL )
+#define XIOU_SLCR_MIO_PIN_32_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin33
+ */
+#define XIOU_SLCR_MIO_PIN_33    ( ( XIOU_SLCR_BASEADDR ) + 0x00000084UL )
+#define XIOU_SLCR_MIO_PIN_33_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin34
+ */
+#define XIOU_SLCR_MIO_PIN_34    ( ( XIOU_SLCR_BASEADDR ) + 0x00000088UL )
+#define XIOU_SLCR_MIO_PIN_34_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin35
+ */
+#define XIOU_SLCR_MIO_PIN_35    ( ( XIOU_SLCR_BASEADDR ) + 0x0000008CUL )
+#define XIOU_SLCR_MIO_PIN_35_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin36
+ */
+#define XIOU_SLCR_MIO_PIN_36    ( ( XIOU_SLCR_BASEADDR ) + 0x00000090UL )
+#define XIOU_SLCR_MIO_PIN_36_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin37
+ */
+#define XIOU_SLCR_MIO_PIN_37    ( ( XIOU_SLCR_BASEADDR ) + 0x00000094UL )
+#define XIOU_SLCR_MIO_PIN_37_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin38
+ */
+#define XIOU_SLCR_MIO_PIN_38    ( ( XIOU_SLCR_BASEADDR ) + 0x00000098UL )
+#define XIOU_SLCR_MIO_PIN_38_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin39
+ */
+#define XIOU_SLCR_MIO_PIN_39    ( ( XIOU_SLCR_BASEADDR ) + 0x0000009CUL )
+#define XIOU_SLCR_MIO_PIN_39_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin40
+ */
+#define XIOU_SLCR_MIO_PIN_40    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A0UL )
+#define XIOU_SLCR_MIO_PIN_40_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin41
+ */
+#define XIOU_SLCR_MIO_PIN_41    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A4UL )
+#define XIOU_SLCR_MIO_PIN_41_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin42
+ */
+#define XIOU_SLCR_MIO_PIN_42    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A8UL )
+#define XIOU_SLCR_MIO_PIN_42_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin43
+ */
+#define XIOU_SLCR_MIO_PIN_43    ( ( XIOU_SLCR_BASEADDR ) + 0x000000ACUL )
+#define XIOU_SLCR_MIO_PIN_43_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin44
+ */
+#define XIOU_SLCR_MIO_PIN_44    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B0UL )
+#define XIOU_SLCR_MIO_PIN_44_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin45
+ */
+#define XIOU_SLCR_MIO_PIN_45    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B4UL )
+#define XIOU_SLCR_MIO_PIN_45_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin46
+ */
+#define XIOU_SLCR_MIO_PIN_46    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B8UL )
+#define XIOU_SLCR_MIO_PIN_46_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin47
+ */
+#define XIOU_SLCR_MIO_PIN_47    ( ( XIOU_SLCR_BASEADDR ) + 0x000000BCUL )
+#define XIOU_SLCR_MIO_PIN_47_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin48
+ */
+#define XIOU_SLCR_MIO_PIN_48    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C0UL )
+#define XIOU_SLCR_MIO_PIN_48_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin49
+ */
+#define XIOU_SLCR_MIO_PIN_49    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C4UL )
+#define XIOU_SLCR_MIO_PIN_49_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin50
+ */
+#define XIOU_SLCR_MIO_PIN_50    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C8UL )
+#define XIOU_SLCR_MIO_PIN_50_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin51
+ */
+#define XIOU_SLCR_MIO_PIN_51    ( ( XIOU_SLCR_BASEADDR ) + 0x000000CCUL )
+#define XIOU_SLCR_MIO_PIN_51_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin52
+ */
+#define XIOU_SLCR_MIO_PIN_52    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D0UL )
+#define XIOU_SLCR_MIO_PIN_52_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin53
+ */
+#define XIOU_SLCR_MIO_PIN_53    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D4UL )
+#define XIOU_SLCR_MIO_PIN_53_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin54
+ */
+#define XIOU_SLCR_MIO_PIN_54    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D8UL )
+#define XIOU_SLCR_MIO_PIN_54_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin55
+ */
+#define XIOU_SLCR_MIO_PIN_55    ( ( XIOU_SLCR_BASEADDR ) + 0x000000DCUL )
+#define XIOU_SLCR_MIO_PIN_55_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin56
+ */
+#define XIOU_SLCR_MIO_PIN_56    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E0UL )
+#define XIOU_SLCR_MIO_PIN_56_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin57
+ */
+#define XIOU_SLCR_MIO_PIN_57    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E4UL )
+#define XIOU_SLCR_MIO_PIN_57_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin58
+ */
+#define XIOU_SLCR_MIO_PIN_58    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E8UL )
+#define XIOU_SLCR_MIO_PIN_58_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin59
+ */
+#define XIOU_SLCR_MIO_PIN_59    ( ( XIOU_SLCR_BASEADDR ) + 0x000000ECUL )
+#define XIOU_SLCR_MIO_PIN_59_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin60
+ */
+#define XIOU_SLCR_MIO_PIN_60    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F0UL )
+#define XIOU_SLCR_MIO_PIN_60_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin61
+ */
+#define XIOU_SLCR_MIO_PIN_61    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F4UL )
+#define XIOU_SLCR_MIO_PIN_61_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin62
+ */
+#define XIOU_SLCR_MIO_PIN_62    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F8UL )
+#define XIOU_SLCR_MIO_PIN_62_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin63
+ */
+#define XIOU_SLCR_MIO_PIN_63    ( ( XIOU_SLCR_BASEADDR ) + 0x000000FCUL )
+#define XIOU_SLCR_MIO_PIN_63_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin64
+ */
+#define XIOU_SLCR_MIO_PIN_64    ( ( XIOU_SLCR_BASEADDR ) + 0x00000100UL )
+#define XIOU_SLCR_MIO_PIN_64_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin65
+ */
+#define XIOU_SLCR_MIO_PIN_65    ( ( XIOU_SLCR_BASEADDR ) + 0x00000104UL )
+#define XIOU_SLCR_MIO_PIN_65_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin66
+ */
+#define XIOU_SLCR_MIO_PIN_66    ( ( XIOU_SLCR_BASEADDR ) + 0x00000108UL )
+#define XIOU_SLCR_MIO_PIN_66_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin67
+ */
+#define XIOU_SLCR_MIO_PIN_67    ( ( XIOU_SLCR_BASEADDR ) + 0x0000010CUL )
+#define XIOU_SLCR_MIO_PIN_67_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin68
+ */
+#define XIOU_SLCR_MIO_PIN_68    ( ( XIOU_SLCR_BASEADDR ) + 0x00000110UL )
+#define XIOU_SLCR_MIO_PIN_68_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin69
+ */
+#define XIOU_SLCR_MIO_PIN_69    ( ( XIOU_SLCR_BASEADDR ) + 0x00000114UL )
+#define XIOU_SLCR_MIO_PIN_69_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin70
+ */
+#define XIOU_SLCR_MIO_PIN_70    ( ( XIOU_SLCR_BASEADDR ) + 0x00000118UL )
+#define XIOU_SLCR_MIO_PIN_70_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin71
+ */
+#define XIOU_SLCR_MIO_PIN_71    ( ( XIOU_SLCR_BASEADDR ) + 0x0000011CUL )
+#define XIOU_SLCR_MIO_PIN_71_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin72
+ */
+#define XIOU_SLCR_MIO_PIN_72    ( ( XIOU_SLCR_BASEADDR ) + 0x00000120UL )
+#define XIOU_SLCR_MIO_PIN_72_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin73
+ */
+#define XIOU_SLCR_MIO_PIN_73    ( ( XIOU_SLCR_BASEADDR ) + 0x00000124UL )
+#define XIOU_SLCR_MIO_PIN_73_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin74
+ */
+#define XIOU_SLCR_MIO_PIN_74    ( ( XIOU_SLCR_BASEADDR ) + 0x00000128UL )
+#define XIOU_SLCR_MIO_PIN_74_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin75
+ */
+#define XIOU_SLCR_MIO_PIN_75    ( ( XIOU_SLCR_BASEADDR ) + 0x0000012CUL )
+#define XIOU_SLCR_MIO_PIN_75_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin76
+ */
+#define XIOU_SLCR_MIO_PIN_76    ( ( XIOU_SLCR_BASEADDR ) + 0x00000130UL )
+#define XIOU_SLCR_MIO_PIN_76_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin77
+ */
+#define XIOU_SLCR_MIO_PIN_77    ( ( XIOU_SLCR_BASEADDR ) + 0x00000134UL )
+#define XIOU_SLCR_MIO_PIN_77_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl0
+ */
+#define XIOU_SLCR_BANK0_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000138UL )
+#define XIOU_SLCR_BANK0_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl1
+ */
+#define XIOU_SLCR_BANK0_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000013CUL )
+#define XIOU_SLCR_BANK0_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl3
+ */
+#define XIOU_SLCR_BANK0_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000140UL )
+#define XIOU_SLCR_BANK0_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl4
+ */
+#define XIOU_SLCR_BANK0_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000144UL )
+#define XIOU_SLCR_BANK0_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl5
+ */
+#define XIOU_SLCR_BANK0_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000148UL )
+#define XIOU_SLCR_BANK0_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl6
+ */
+#define XIOU_SLCR_BANK0_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x0000014CUL )
+#define XIOU_SLCR_BANK0_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Sts
+ */
+#define XIOU_SLCR_BANK0_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000150UL )
+#define XIOU_SLCR_BANK0_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl0
+ */
+#define XIOU_SLCR_BANK1_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000154UL )
+#define XIOU_SLCR_BANK1_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl1
+ */
+#define XIOU_SLCR_BANK1_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000158UL )
+#define XIOU_SLCR_BANK1_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl3
+ */
+#define XIOU_SLCR_BANK1_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000015CUL )
+#define XIOU_SLCR_BANK1_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl4
+ */
+#define XIOU_SLCR_BANK1_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000160UL )
+#define XIOU_SLCR_BANK1_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl5
+ */
+#define XIOU_SLCR_BANK1_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000164UL )
+#define XIOU_SLCR_BANK1_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl6
+ */
+#define XIOU_SLCR_BANK1_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000168UL )
+#define XIOU_SLCR_BANK1_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Sts
+ */
+#define XIOU_SLCR_BANK1_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x0000016CUL )
+#define XIOU_SLCR_BANK1_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl0
+ */
+#define XIOU_SLCR_BANK2_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000170UL )
+#define XIOU_SLCR_BANK2_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl1
+ */
+#define XIOU_SLCR_BANK2_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000174UL )
+#define XIOU_SLCR_BANK2_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl3
+ */
+#define XIOU_SLCR_BANK2_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000178UL )
+#define XIOU_SLCR_BANK2_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl4
+ */
+#define XIOU_SLCR_BANK2_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x0000017CUL )
+#define XIOU_SLCR_BANK2_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl5
+ */
+#define XIOU_SLCR_BANK2_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000180UL )
+#define XIOU_SLCR_BANK2_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl6
+ */
+#define XIOU_SLCR_BANK2_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000184UL )
+#define XIOU_SLCR_BANK2_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Sts
+ */
+#define XIOU_SLCR_BANK2_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000188UL )
+#define XIOU_SLCR_BANK2_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioLpbck
+ */
+#define XIOU_SLCR_MIO_LPBCK    ( ( XIOU_SLCR_BASEADDR ) + 0x00000200UL )
+#define XIOU_SLCR_MIO_LPBCK_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_SHIFT   3UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_SHIFT   2UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_SHIFT   1UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_SHIFT   0UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioMstTri0
+ */
+#define XIOU_SLCR_MIO_MST_TRI0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000204UL )
+#define XIOU_SLCR_MIO_MST_TRI0_RSTVAL   0xffffffffUL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_SHIFT   31UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_MASK    0x80000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_SHIFT   30UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_MASK    0x40000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_SHIFT   29UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_MASK    0x20000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_SHIFT   28UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_MASK    0x10000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_SHIFT   27UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_MASK    0x08000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_SHIFT   26UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_MASK    0x04000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_SHIFT   25UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_MASK    0x02000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_SHIFT   24UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_MASK    0x01000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_SHIFT   23UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_MASK    0x00800000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_SHIFT   22UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_MASK    0x00400000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_SHIFT   21UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_MASK    0x00200000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_SHIFT   20UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_MASK    0x00100000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_SHIFT   19UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_MASK    0x00080000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_SHIFT   18UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_MASK    0x00040000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_SHIFT   17UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_MASK    0x00020000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_SHIFT   16UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_MASK    0x00010000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_SHIFT   15UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_MASK    0x00008000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_SHIFT   14UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_MASK    0x00004000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrMioMstTri1
+ */
+#define XIOU_SLCR_MIO_MST_TRI1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000208UL )
+#define XIOU_SLCR_MIO_MST_TRI1_RSTVAL   0xffffffffUL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_SHIFT   31UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_MASK    0x80000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_SHIFT   30UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_MASK    0x40000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_SHIFT   29UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_MASK    0x20000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_SHIFT   28UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_MASK    0x10000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_SHIFT   27UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_MASK    0x08000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_SHIFT   26UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_MASK    0x04000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_SHIFT   25UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_MASK    0x02000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_SHIFT   24UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_MASK    0x01000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_SHIFT   23UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_MASK    0x00800000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_SHIFT   22UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_MASK    0x00400000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_SHIFT   21UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_MASK    0x00200000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_SHIFT   20UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_MASK    0x00100000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_SHIFT   19UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_MASK    0x00080000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_SHIFT   18UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_MASK    0x00040000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_SHIFT   17UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_MASK    0x00020000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_SHIFT   16UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_MASK    0x00010000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_SHIFT   15UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_MASK    0x00008000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_SHIFT   14UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_MASK    0x00004000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrMioMstTri2
+ */
+#define XIOU_SLCR_MIO_MST_TRI2    ( ( XIOU_SLCR_BASEADDR ) + 0x0000020CUL )
+#define XIOU_SLCR_MIO_MST_TRI2_RSTVAL   0x00003fffUL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrWdtClkSel
+ */
+#define XIOU_SLCR_WDT_CLK_SEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000300UL )
+#define XIOU_SLCR_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_WDT_CLK_SEL_SHIFT   0UL
+#define XIOU_SLCR_WDT_CLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_WDT_CLK_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrCanMioCtrl
+ */
+#define XIOU_SLCR_CAN_MIO_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000304UL )
+#define XIOU_SLCR_CAN_MIO_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_SHIFT   23UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_MASK    0x00800000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_SHIFT   22UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_MASK    0x00400000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_SHIFT   15UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_WIDTH   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_MASK    0x003f8000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_SHIFT   8UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_MASK    0x00000100UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_SHIFT   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_MASK    0x00000080UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_SHIFT   0UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_WIDTH   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_MASK    0x0000007fUL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrGemClkCtrl
+ */
+#define XIOU_SLCR_GEM_CLK_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000308UL )
+#define XIOU_SLCR_GEM_CLK_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_SHIFT   22UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_MASK    0x00400000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_SHIFT   20UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_WIDTH   2UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_MASK    0x00300000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   18UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00040000UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   17UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00020000UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   16UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00010000UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   15UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00008000UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   13UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00002000UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   12UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00001000UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   11UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000800UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   10UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000400UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   8UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00000100UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   7UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00000080UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   6UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000040UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   5UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000020UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   3UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00000008UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   2UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00000004UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   1UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   0UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdioClkCtrl
+ */
+#define XIOU_SLCR_SDIO_CLK_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x0000030CUL )
+#define XIOU_SLCR_SDIO_CLK_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_SHIFT   18UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_MASK    0x00040000UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_SHIFT   17UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_MASK    0x00020000UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_SHIFT   2UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_SHIFT   0UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_WIDTH   2UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_MASK    0x00000003UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrCtrlRegSd
+ */
+#define XIOU_SLCR_CTRL_REG_SD    ( ( XIOU_SLCR_BASEADDR ) + 0x00000310UL )
+#define XIOU_SLCR_CTRL_REG_SD_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CTRL_REG_SD1_XSDPS_EMMC_SEL_SHIFT      15UL
+#define XIOU_SLCR_CTRL_REG_SD1_XSDPS_EMMC_SEL_WIDTH   1UL
+#define XIOU_SLCR_CTRL_REG_SD1_XSDPS_EMMC_SEL_MASK    0x00008000UL
+#define XIOU_SLCR_CTRL_REG_SD1_XSDPS_EMMC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CTRL_REG_SD0_XSDPS_EMMC_SEL_SHIFT      0UL
+#define XIOU_SLCR_CTRL_REG_SD0_XSDPS_EMMC_SEL_WIDTH   1UL
+#define XIOU_SLCR_CTRL_REG_SD0_XSDPS_EMMC_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_CTRL_REG_SD0_XSDPS_EMMC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdItapdly
+ */
+#define XIOU_SLCR_SD_ITAPDLY    ( ( XIOU_SLCR_BASEADDR ) + 0x00000314UL )
+#define XIOU_SLCR_SD_ITAPDLY_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPCHGWIN_SHIFT      25UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPCHGWIN_WIDTH   1UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPCHGWIN_MASK    0x02000000UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPCHGWIN_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYENA_SHIFT   24UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYENA_MASK    0x01000000UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYSEL_SHIFT   16UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYSEL_WIDTH   8UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYSEL_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYSEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPCHGWIN_SHIFT   9UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPCHGWIN_WIDTH   1UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPCHGWIN_MASK    0x00000200UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPCHGWIN_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYENA_SHIFT   8UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYENA_MASK    0x00000100UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYSEL_SHIFT   0UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYSEL_WIDTH   8UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYSEL_MASK    0x000000ffUL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYSEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdOtapdlysel
+ */
+#define XIOU_SLCR_SD_OTAPDLYSEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000318UL )
+#define XIOU_SLCR_SD_OTAPDLYSEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_OTAPDLYENA_SHIFT   22UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_OTAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_OTAPDLYENA_MASK    0x00400000UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_OTAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_WIDTH   6UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_MASK    0x003f0000UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_OTAPDLYENA_SHIFT      6UL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_OTAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_OTAPDLYENA_MASK    0x00000040UL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_OTAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_WIDTH   6UL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_MASK    0x0000003fUL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg1
+ */
+#define XIOU_SLCR_SD_CFG_REG1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000031CUL )
+#define XIOU_SLCR_SD_CFG_REG1_RSTVAL   0x32403240UL
+
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_BASECLK_SHIFT   23UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_BASECLK_WIDTH   8UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_BASECLK_MASK    0x7f800000UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_BASECLK_DEFVAL  0x64UL
+
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_TUNIGCOUNT_SHIFT   17UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_TUNIGCOUNT_WIDTH   6UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_TUNIGCOUNT_MASK    0x007e0000UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_TUNIGCOUNT_DEFVAL  0x20UL
+
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_ASYNCWKPENA_SHIFT   16UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_ASYNCWKPENA_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_ASYNCWKPENA_MASK    0x00010000UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_ASYNCWKPENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_BASECLK_SHIFT   7UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_BASECLK_WIDTH   8UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_BASECLK_MASK    0x00007f80UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_BASECLK_DEFVAL  0x64UL
+
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_TUNIGCOUNT_SHIFT   1UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_TUNIGCOUNT_WIDTH   6UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_TUNIGCOUNT_MASK    0x0000007eUL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_TUNIGCOUNT_DEFVAL  0x20UL
+
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_ASYNCWKPENA_SHIFT   0UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_ASYNCWKPENA_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_ASYNCWKPENA_MASK    0x00000001UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_ASYNCWKPENA_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg2
+ */
+#define XIOU_SLCR_SD_CFG_REG2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000320UL )
+#define XIOU_SLCR_SD_CFG_REG2_RSTVAL   0x0ffc0ffcUL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SLOTTYPE_SHIFT   28UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SLOTTYPE_WIDTH   2UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SLOTTYPE_MASK    0x30000000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SLOTTYPE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ASYCINTR_SHIFT   27UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ASYCINTR_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ASYCINTR_MASK    0x08000000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ASYCINTR_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_64BIT_SHIFT   26UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_64BIT_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_64BIT_MASK    0x04000000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_64BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_1P8V_SHIFT   25UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_1P8V_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_1P8V_MASK    0x02000000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_1P8V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P0V_SHIFT   24UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P0V_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P0V_MASK    0x01000000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P0V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P3V_SHIFT   23UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P3V_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P3V_MASK    0x00800000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P3V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SUSPRES_SHIFT   22UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SUSPRES_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SUSPRES_MASK    0x00400000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SUSPRES_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SDMA_SHIFT   21UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SDMA_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SDMA_MASK    0x00200000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SDMA_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_HIGHSPEED_SHIFT   20UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_HIGHSPEED_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_HIGHSPEED_MASK    0x00100000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_HIGHSPEED_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ADMA2_SHIFT   19UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ADMA2_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ADMA2_MASK    0x00080000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ADMA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_8BIT_SHIFT   18UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_8BIT_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_8BIT_MASK    0x00040000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_8BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_MAXBLK_SHIFT   16UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_MAXBLK_WIDTH   2UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_MAXBLK_MASK    0x00030000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_MAXBLK_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SLOTTYPE_SHIFT   12UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SLOTTYPE_WIDTH   2UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SLOTTYPE_MASK    0x00003000UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SLOTTYPE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ASYCINTR_SHIFT   11UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ASYCINTR_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ASYCINTR_MASK    0x00000800UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ASYCINTR_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_64BIT_SHIFT   10UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_64BIT_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_64BIT_MASK    0x00000400UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_64BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_1P8V_SHIFT   9UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_1P8V_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_1P8V_MASK    0x00000200UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_1P8V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P0V_SHIFT   8UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P0V_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P0V_MASK    0x00000100UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P0V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P3V_SHIFT   7UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P3V_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P3V_MASK    0x00000080UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P3V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SUSPRES_SHIFT   6UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SUSPRES_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SUSPRES_MASK    0x00000040UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SUSPRES_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SDMA_SHIFT   5UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SDMA_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SDMA_MASK    0x00000020UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SDMA_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_HIGHSPEED_SHIFT   4UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_HIGHSPEED_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_HIGHSPEED_MASK    0x00000010UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_HIGHSPEED_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ADMA2_SHIFT   3UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ADMA2_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ADMA2_MASK    0x00000008UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ADMA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_8BIT_SHIFT   2UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_8BIT_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_8BIT_MASK    0x00000004UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_8BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_MAXBLK_SHIFT   0UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_MAXBLK_WIDTH   2UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_MAXBLK_MASK    0x00000003UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_MAXBLK_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg3
+ */
+#define XIOU_SLCR_SD_CFG_REG3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000324UL )
+#define XIOU_SLCR_SD_CFG_REG3_RSTVAL   0x06070607UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_TUNINGSDR50_SHIFT   26UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_TUNINGSDR50_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_TUNINGSDR50_MASK    0x04000000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_TUNINGSDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_RETUNETMR_SHIFT   22UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_RETUNETMR_WIDTH   4UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_RETUNETMR_MASK    0x03c00000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_RETUNETMR_DEFVAL  0x8UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDRIVER_SHIFT   21UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDRIVER_MASK    0x00200000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_CDRIVER_SHIFT   20UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_CDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_CDRIVER_MASK    0x00100000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_CDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_ADRIVER_SHIFT   19UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_ADRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_ADRIVER_MASK    0x00080000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_ADRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDR50_SHIFT   18UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDR50_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDR50_MASK    0x00040000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR104_SHIFT   17UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR104_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR104_MASK    0x00020000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR104_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR50_SHIFT   16UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR50_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR50_MASK    0x00010000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_TUNINGSDR50_SHIFT   10UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_TUNINGSDR50_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_TUNINGSDR50_MASK    0x00000400UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_TUNINGSDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_RETUNETMR_SHIFT   6UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_RETUNETMR_WIDTH   4UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_RETUNETMR_MASK    0x000003c0UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_RETUNETMR_DEFVAL  0x8UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDRIVER_SHIFT   5UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDRIVER_MASK    0x00000020UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_CDRIVER_SHIFT   4UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_CDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_CDRIVER_MASK    0x00000010UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_CDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_ADRIVER_SHIFT   3UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_ADRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_ADRIVER_MASK    0x00000008UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_ADRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDR50_SHIFT   2UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDR50_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDR50_MASK    0x00000004UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR104_SHIFT   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR104_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR104_MASK    0x00000002UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR104_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR50_SHIFT   0UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR50_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR50_MASK    0x00000001UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR50_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrSdInitpreset
+ */
+#define XIOU_SLCR_SD_INITPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000328UL )
+#define XIOU_SLCR_SD_INITPRESET_RSTVAL   0x01000100UL
+
+#define XIOU_SLCR_SD1_INITPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_INITPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_INITPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_INITPRESET_XSDPS_DEFVAL  0x100UL
+
+#define XIOU_SLCR_SD0_INITPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_INITPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_INITPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_INITPRESET_XSDPS_DEFVAL  0x100UL
+
+/**
+ * Register: XiouSlcrSdDsppreset
+ */
+#define XIOU_SLCR_SD_DSPPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x0000032CUL )
+#define XIOU_SLCR_SD_DSPPRESET_RSTVAL   0x00040004UL
+
+#define XIOU_SLCR_SD1_DSPPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_DSPPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_DSPPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_DSPPRESET_XSDPS_DEFVAL  0x4UL
+
+#define XIOU_SLCR_SD0_DSPPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_DSPPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_DSPPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_DSPPRESET_XSDPS_DEFVAL  0x4UL
+
+/**
+ * Register: XiouSlcrSdHspdpreset
+ */
+#define XIOU_SLCR_SD_HSPDPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000330UL )
+#define XIOU_SLCR_SD_HSPDPRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD1_HSPDPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_HSPDPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_HSPDPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_HSPDPRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD0_HSPDPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_HSPDPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_HSPDPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_HSPDPRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdSdr12preset
+ */
+#define XIOU_SLCR_SD_SDR12PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000334UL )
+#define XIOU_SLCR_SD_SDR12PRESET_RSTVAL   0x00040004UL
+
+#define XIOU_SLCR_SD1_SDR12PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_SDR12PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_SDR12PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_SDR12PRESET_XSDPS_DEFVAL  0x4UL
+
+#define XIOU_SLCR_SD0_SDR12PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_SDR12PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_SDR12PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_SDR12PRESET_XSDPS_DEFVAL  0x4UL
+
+/**
+ * Register: XiouSlcrSdSdr25preset
+ */
+#define XIOU_SLCR_SD_SDR25PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000338UL )
+#define XIOU_SLCR_SD_SDR25PRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD1_SDR25PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_SDR25PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_SDR25PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_SDR25PRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD0_SDR25PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_SDR25PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_SDR25PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_SDR25PRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdSdr50prset
+ */
+#define XIOU_SLCR_SD_SDR50PRSET    ( ( XIOU_SLCR_BASEADDR ) + 0x0000033CUL )
+#define XIOU_SLCR_SD_SDR50PRSET_RSTVAL   0x00010001UL
+
+#define XIOU_SLCR_SD1_SDR50PRSET_XSDPS_SDR50PRESET_SHIFT   16UL
+#define XIOU_SLCR_SD1_SDR50PRSET_XSDPS_SDR50PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD1_SDR50PRSET_XSDPS_SDR50PRESET_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_SDR50PRSET_XSDPS_SDR50PRESET_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_SDR50PRSET_XSDPS_SDR50PRESET_SHIFT   0UL
+#define XIOU_SLCR_SD0_SDR50PRSET_XSDPS_SDR50PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD0_SDR50PRSET_XSDPS_SDR50PRESET_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_SDR50PRSET_XSDPS_SDR50PRESET_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrSdSdr104prst
+ */
+#define XIOU_SLCR_SD_SDR104PRST    ( ( XIOU_SLCR_BASEADDR ) + 0x00000340UL )
+#define XIOU_SLCR_SD_SDR104PRST_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_SDR104PRST_XSDPS_SDR104PRESET_SHIFT   16UL
+#define XIOU_SLCR_SD1_SDR104PRST_XSDPS_SDR104PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD1_SDR104PRST_XSDPS_SDR104PRESET_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_SDR104PRST_XSDPS_SDR104PRESET_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_SDR104PRST_XSDPS_SDR104PRESET_SHIFT   0UL
+#define XIOU_SLCR_SD0_SDR104PRST_XSDPS_SDR104PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD0_SDR104PRST_XSDPS_SDR104PRESET_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_SDR104PRST_XSDPS_SDR104PRESET_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdDdr50preset
+ */
+#define XIOU_SLCR_SD_DDR50PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000344UL )
+#define XIOU_SLCR_SD_DDR50PRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD1_DDR50PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_DDR50PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_DDR50PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_DDR50PRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD0_DDR50PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_DDR50PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_DDR50PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_DDR50PRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdMaxcur1p8
+ */
+#define XIOU_SLCR_SD_MAXCUR1P8    ( ( XIOU_SLCR_BASEADDR ) + 0x0000034CUL )
+#define XIOU_SLCR_SD_MAXCUR1P8_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_MAXCUR1P8_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_MAXCUR1P8_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD1_MAXCUR1P8_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD1_MAXCUR1P8_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_MAXCUR1P8_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_MAXCUR1P8_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD0_MAXCUR1P8_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD0_MAXCUR1P8_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdMaxcur3p0
+ */
+#define XIOU_SLCR_SD_MAXCUR3P0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000350UL )
+#define XIOU_SLCR_SD_MAXCUR3P0_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_MAXCUR3P0_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_MAXCUR3P0_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD1_MAXCUR3P0_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD1_MAXCUR3P0_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_MAXCUR3P0_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_MAXCUR3P0_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD0_MAXCUR3P0_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD0_MAXCUR3P0_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdMaxcur3p3
+ */
+#define XIOU_SLCR_SD_MAXCUR3P3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000354UL )
+#define XIOU_SLCR_SD_MAXCUR3P3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_MAXCUR3P3_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_MAXCUR3P3_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD1_MAXCUR3P3_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD1_MAXCUR3P3_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_MAXCUR3P3_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_MAXCUR3P3_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD0_MAXCUR3P3_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD0_MAXCUR3P3_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdDllCtrl
+ */
+#define XIOU_SLCR_SD_DLL_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000358UL )
+#define XIOU_SLCR_SD_DLL_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_RST_SHIFT   18UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_RST_WIDTH   1UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_RST_MASK    0x00040000UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_RST_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_TESTMODE_SHIFT   17UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_TESTMODE_WIDTH   1UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_TESTMODE_MASK    0x00020000UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_TESTMODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_LOCK_SHIFT   16UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_LOCK_WIDTH   1UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_LOCK_MASK    0x00010000UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_LOCK_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_RST_SHIFT   2UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_RST_WIDTH   1UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_RST_MASK    0x00000004UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_RST_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_TESTMODE_SHIFT   1UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_TESTMODE_WIDTH   1UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_TESTMODE_MASK    0x00000002UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_TESTMODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_LOCK_SHIFT   0UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_LOCK_WIDTH   1UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_LOCK_MASK    0x00000001UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_LOCK_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCdnCtrl
+ */
+#define XIOU_SLCR_SD_CDN_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x0000035CUL )
+#define XIOU_SLCR_SD_CDN_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_CDN_CTRL_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_CDN_CTRL_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_SD1_CDN_CTRL_XSDPS_MASK    0x00010000UL
+#define XIOU_SLCR_SD1_CDN_CTRL_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CDN_CTRL_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_CDN_CTRL_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_SD0_CDN_CTRL_XSDPS_MASK    0x00000001UL
+#define XIOU_SLCR_SD0_CDN_CTRL_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrGemCtrl
+ */
+#define XIOU_SLCR_GEM_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000360UL )
+#define XIOU_SLCR_GEM_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_GEM3_CTRL_XEMACPS_SGMII_SD_SHIFT   6UL
+#define XIOU_SLCR_GEM3_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM3_CTRL_XEMACPS_SGMII_SD_MASK    0x000000c0UL
+#define XIOU_SLCR_GEM3_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM2_CTRL_XEMACPS_SGMII_SD_SHIFT   4UL
+#define XIOU_SLCR_GEM2_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM2_CTRL_XEMACPS_SGMII_SD_MASK    0x00000030UL
+#define XIOU_SLCR_GEM2_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM1_CTRL_XEMACPS_SGMII_SD_SHIFT   2UL
+#define XIOU_SLCR_GEM1_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM1_CTRL_XEMACPS_SGMII_SD_MASK    0x0000000cUL
+#define XIOU_SLCR_GEM1_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM0_CTRL_XEMACPS_SGMII_SD_SHIFT   0UL
+#define XIOU_SLCR_GEM0_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM0_CTRL_XEMACPS_SGMII_SD_MASK    0x00000003UL
+#define XIOU_SLCR_GEM0_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrTtcApbClk
+ */
+#define XIOU_SLCR_TTC_APB_CLK    ( ( XIOU_SLCR_BASEADDR ) + 0x00000380UL )
+#define XIOU_SLCR_TTC_APB_CLK_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_SHIFT   6UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_MASK    0x000000c0UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_SHIFT   4UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_MASK    0x00000030UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_SHIFT   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_MASK    0x0000000cUL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_SHIFT   0UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_MASK    0x00000003UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrTapdlyBypass
+ */
+#define XIOU_SLCR_TAPDLY_BYPASS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000390UL )
+#define XIOU_SLCR_TAPDLY_BYPASS_RSTVAL   0x00000007UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_SHIFT   2UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_MASK    0x00000004UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_DEFVAL  0x1UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_SHIFT   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_MASK    0x00000002UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_SHIFT   0UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_MASK    0x00000001UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrCoherentCtrl
+ */
+#define XIOU_SLCR_COHERENT_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000400UL )
+#define XIOU_SLCR_COHERENT_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_SHIFT   28UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_MASK    0xf0000000UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_SHIFT   24UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_MASK    0x0f000000UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS1_AXI_COH_SHIFT   20UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS1_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS1_AXI_COH_MASK    0x00f00000UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS1_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS0_AXI_COH_SHIFT   16UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS0_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS0_AXI_COH_MASK    0x000f0000UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS0_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_GEM3_AXI_COH_SHIFT   12UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM3_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM3_AXI_COH_MASK    0x0000f000UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM3_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_GEM2_AXI_COH_SHIFT   8UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM2_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM2_AXI_COH_MASK    0x00000f00UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM2_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_GEM1_AXI_COH_SHIFT   4UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM1_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM1_AXI_COH_MASK    0x000000f0UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM1_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_GEM0_AXI_COH_SHIFT   0UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM0_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM0_AXI_COH_MASK    0x0000000fUL
+#define XIOU_SLCR_COHERENT_CTRL_GEM0_AXI_COH_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrVideoPssClkSel
+ */
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000404UL )
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_SHIFT   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_WIDTH   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_MASK    0x00000002UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_DEFVAL  0x0UL
+
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_SHIFT   0UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrInterconnectRoute
+ */
+#define XIOU_SLCR_INTERCONNECT_ROUTE    ( ( XIOU_SLCR_BASEADDR ) + 0x00000408UL )
+#define XIOU_SLCR_INTERCONNECT_ROUTE_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_SHIFT   7UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_MASK    0x00000080UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_SHIFT   6UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_MASK    0x00000040UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS1_SHIFT   5UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS1_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS1_MASK    0x00000020UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS0_SHIFT   4UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS0_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS0_MASK    0x00000010UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS0_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM3_SHIFT   3UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM3_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM3_MASK    0x00000008UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM3_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM2_SHIFT   2UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM2_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM2_MASK    0x00000004UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM2_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM1_SHIFT   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM1_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM1_MASK    0x00000002UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM0_SHIFT   0UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM0_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM0_MASK    0x00000001UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM0_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrRamGem0
+ */
+#define XIOU_SLCR_RAM_GEM0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000500UL )
+#define XIOU_SLCR_RAM_GEM0_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_GEM0_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_GEM0_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM0_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_GEM0_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM0_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_GEM0_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM0_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_GEM0_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM0_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_GEM0_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM0_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_GEM0_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM0_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_GEM0_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM0_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_GEM0_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM0_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_GEM0_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM0_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_GEM0_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM0_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_GEM0_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM0_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_GEM0_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamgem1
+ */
+#define XIOU_SLCR_RAM_GEM1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000504UL )
+#define XIOU_SLCR_RAM_GEM1_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_GEM1_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_GEM1_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM1_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_GEM1_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM1_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_GEM1_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM1_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_GEM1_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM1_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_GEM1_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM1_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_GEM1_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM1_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_GEM1_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM1_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_GEM1_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM1_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_GEM1_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM1_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_GEM1_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM1_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_GEM1_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM1_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_GEM1_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamGem2
+ */
+#define XIOU_SLCR_RAM_GEM2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000508UL )
+#define XIOU_SLCR_RAM_GEM2_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_GEM2_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_GEM2_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM2_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_GEM2_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM2_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_GEM2_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM2_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_GEM2_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM2_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_GEM2_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM2_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_GEM2_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM2_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_GEM2_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM2_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_GEM2_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM2_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_GEM2_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM2_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_GEM2_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM2_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_GEM2_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM2_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_GEM2_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamGem3
+ */
+#define XIOU_SLCR_RAM_GEM3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000050CUL )
+#define XIOU_SLCR_RAM_GEM3_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_GEM3_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_GEM3_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM3_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_GEM3_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM3_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_GEM3_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM3_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_GEM3_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM3_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_GEM3_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM3_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_GEM3_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM3_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_GEM3_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM3_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_GEM3_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM3_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_GEM3_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM3_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_GEM3_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM3_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_GEM3_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM3_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_GEM3_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXsdps0
+ */
+#define XIOU_SLCR_RAM_XSDPS0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000510UL )
+#define XIOU_SLCR_RAM_XSDPS0_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XSDPS0_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XSDPS0_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XSDPS0_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XSDPS0_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XSDPS0_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XSDPS0_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXsdps1
+ */
+#define XIOU_SLCR_RAM_XSDPS1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000514UL )
+#define XIOU_SLCR_RAM_XSDPS1_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XSDPS1_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XSDPS1_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XSDPS1_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XSDPS1_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XSDPS1_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XSDPS1_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamCan0
+ */
+#define XIOU_SLCR_RAM_CAN0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000518UL )
+#define XIOU_SLCR_RAM_CAN0_RSTVAL   0x005b5b5bUL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA2_SHIFT   22UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_MASK    0x00400000UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB2_SHIFT   19UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_MASK    0x00380000UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA2_SHIFT   16UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_MASK    0x00070000UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamCan1
+ */
+#define XIOU_SLCR_RAM_CAN1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000051CUL )
+#define XIOU_SLCR_RAM_CAN1_RSTVAL   0x005b5b5bUL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA2_SHIFT   22UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_MASK    0x00400000UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB2_SHIFT   19UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_MASK    0x00380000UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA2_SHIFT   16UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_MASK    0x00070000UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamLqspi
+ */
+#define XIOU_SLCR_RAM_LQSPI    ( ( XIOU_SLCR_BASEADDR ) + 0x00000520UL )
+#define XIOU_SLCR_RAM_LQSPI_RSTVAL   0x00002ddbUL
+
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_SHIFT   13UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_MASK    0x00002000UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_SHIFT   10UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_MASK    0x00001c00UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_SHIFT   7UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_MASK    0x00000380UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXnandps8
+ */
+#define XIOU_SLCR_RAM_XNANDPS8    ( ( XIOU_SLCR_BASEADDR ) + 0x00000524UL )
+#define XIOU_SLCR_RAM_XNANDPS8_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrCtrl
+ */
+#define XIOU_SLCR_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000600UL )
+#define XIOU_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrIsr
+ */
+#define XIOU_SLCR_ISR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000700UL )
+#define XIOU_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrImr
+ */
+#define XIOU_SLCR_IMR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000704UL )
+#define XIOU_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrIer
+ */
+#define XIOU_SLCR_IER    ( ( XIOU_SLCR_BASEADDR ) + 0x00000708UL )
+#define XIOU_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrIdr
+ */
+#define XIOU_SLCR_IDR    ( ( XIOU_SLCR_BASEADDR ) + 0x0000070CUL )
+#define XIOU_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrItr
+ */
+#define XIOU_SLCR_ITR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000710UL )
+#define XIOU_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XIOU_SLCR_H__ */
diff --git a/src/Xilinx/include/xipipsu.h b/src/Xilinx/include/xipipsu.h
new file mode 100644
index 0000000..83701f4
--- /dev/null
+++ b/src/Xilinx/include/xipipsu.h
@@ -0,0 +1,298 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+ * @file xipipsu.h
+* @addtogroup ipipsu_v2_3
+* @{
+* @details
+ *
+ * This is the header file for implementation of IPIPSU driver.
+ * Inter Processor Interrupt (IPI) is used for communication between
+ * different processors on ZynqMP SoC. Each IPI register set has Trigger, Status
+ * and Observation registers for communication between processors. Each IPI path
+ * has a 32 byte buffer associated with it and these buffers are located in the
+ * XPPU RAM. This driver supports the following operations:
+ *
+ * - Trigger IPIs to CPUs on the SoC
+ * - Write and Read Message buffers
+ * - Read the status of Observation Register to get status of Triggered IPI
+ * - Enable/Disable IPIs from selected Masters
+ * - Read the Status register to get the source of an incoming IPI
+ *
+ * Initialization
+ * The config data for the driver is loaded and is based on the HW build. The
+ * XIpiPsu_Config data structure contains all the data related to the
+ * IPI driver instance and also teh available Target CPUs.
+ *
+ * Sending an IPI
+ * The following steps can be followed to send an IPI:
+ * - Write the Message into Message Buffer using XIpiPsu_WriteMessage()
+ * - Trigger IPI using XIpiPsu_TriggerIpi()
+ * - Wait for Ack using XIpiPsu_PollForAck()
+ * - Read response using XIpiPsu_ReadMessage()
+ *
+ * @note	XIpiPsu_GetObsStatus() before sending an IPI to ensure that the
+ * previous IPI was serviced by the target
+ *
+ * Receiving an IPI
+ * To receive an IPI, the following sequence can be followed:
+ * - Register an interrupt handler for the IPIs interrupt ID
+ * - Enable the required sources using XIpiPsu_InterruptEnable()
+ * - In the interrupt handler, Check for source using XIpiPsu_GetInterruptStatus
+ * - Read the message form source using XIpiPsu_ReadMessage()
+ * - Write the response using XIpiPsu_WriteMessage()
+ * - Ack the IPI using XIpiPsu_ClearInterruptStatus()
+ *
+ * @note	XIpiPsu_Reset can be used at startup to clear the status and
+ * disable all sources
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver  Who Date     Changes
+ * ---- --- -------- --------------------------------------------------
+ * 2.2  ms  01/23/17 Modified xil_printf statement in main function for all
+ *                    examples to ensure that "Successfully ran" and "Failed"
+ *                    strings are available in all examples. This is a fix
+ *                    for CR-965028.
+ *  	kvn 02/17/17  Add support for updating ConfigTable at run time
+ *      ms  03/17/17  Added readme.txt file in examples folder for doxygen
+ *                    generation.
+ * 2.3  ms  04/11/17  Modified tcl file to add suffix U for all macro
+ *                    definitions of ipipsu in xparameters.h
+ * 

+ *
+ *****************************************************************************/
+/*****************************************************************************/
+#ifndef XIPIPSU_H_
+#define XIPIPSU_H_
+
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "xstatus.h"
+#include "xipipsu_hw.h"
+
+/************************** Constant Definitions *****************************/
+#define XIPIPSU_BUF_TYPE_MSG	(0x00000001U)
+#define XIPIPSU_BUF_TYPE_RESP	(0x00000002U)
+#define XIPIPSU_MAX_MSG_LEN		XIPIPSU_MSG_BUF_SIZE
+/**************************** Type Definitions *******************************/
+/**
+ * Data structure used to refer IPI Targets
+ */
+typedef struct {
+	u32 Mask; /**< Bit Mask for the target */
+	u32 BufferIndex; /**< Buffer Index used for calculating buffer address */
+} XIpiPsu_Target;
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u32 DeviceId; /**< Unique ID  of device */
+	u32 BaseAddress; /**< Base address of the device */
+	u32 BitMask; /**< BitMask to be used to identify this CPU */
+	u32 BufferIndex; /**< Index of the IPI Message Buffer */
+	u32 IntId; /**< Interrupt ID on GIC **/
+	u32 TargetCount; /**< Number of available IPI Targets */
+	XIpiPsu_Target TargetList[XIPIPSU_MAX_TARGETS] ; /** < List of IPI Targets */
+} XIpiPsu_Config;
+
+/**
+ * The XIpiPsu driver instance data. The user is required to allocate a
+ * variable of this type for each IPI device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XIpiPsu_Config Config; /**< Configuration structure */
+	u32 IsReady; /**< Device is initialized and ready */
+	u32 Options; /**< Options set in the device */
+} XIpiPsu;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+/**
+*
+* Read the register specified by the base address and offset
+*
+* @param	BaseAddress is the base address of the IPI instance
+* @param	RegOffset is the offset of the register relative to base
+*
+* @return	Value of the specified register
+* @note
+* C-style signature
+*	u32 XIpiPsu_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+*****************************************************************************/
+
+#define XIpiPsu_ReadReg(BaseAddress, RegOffset) \
+		Xil_In32((BaseAddress) + (RegOffset))
+
+/****************************************************************************/
+/**
+*
+* Write a value into a register specified by base address and offset
+*
+* @param BaseAddress is the base address of the IPI instance
+* @param RegOffset is the offset of the register relative to base
+* @param Data is a 32-bit value that is to be written into the specified register
+*
+* @note
+* C-style signature
+*	void XIpiPsu_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+*****************************************************************************/
+
+#define XIpiPsu_WriteReg(BaseAddress, RegOffset, Data) \
+		Xil_Out32(((BaseAddress) + (RegOffset)), (Data))
+
+/****************************************************************************/
+/**
+*
+* Enable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be enabled.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Mask contains a bit mask of interrupts to enable. The mask can
+*			be formed using a set of bitwise or'd values of individual CPU masks
+*
+* @note
+* C-style signature
+*	void XIpiPsu_InterruptEnable(XIpiPsu *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XIpiPsu_InterruptEnable(InstancePtr, Mask) \
+	XIpiPsu_WriteReg((InstancePtr)->Config.BaseAddress, \
+		XIPIPSU_IER_OFFSET, \
+		((Mask) & XIPIPSU_ALL_MASK));
+
+/****************************************************************************/
+/**
+*
+* Disable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be disabled.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Mask contains a bit mask of interrupts to disable. The mask can
+*			be formed using a set of bitwise or'd values of individual CPU masks
+*
+* @note
+* C-style signature
+*	void XIpiPsu_InterruptDisable(XIpiPsu *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XIpiPsu_InterruptDisable(InstancePtr, Mask)  \
+	XIpiPsu_WriteReg((InstancePtr)->Config.BaseAddress, \
+		XIPIPSU_IDR_OFFSET, \
+		((Mask) & XIPIPSU_ALL_MASK));
+/****************************************************************************/
+/**
+*
+* Get the STATUS REGISTER of the current IPI instance.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @return Returns the Interrupt Status register(ISR) contents
+* @note User needs to parse this 32-bit value to check the source CPU
+* C-style signature
+*	u32 XIpiPsu_GetInterruptStatus(XIpiPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XIpiPsu_GetInterruptStatus(InstancePtr)  \
+	XIpiPsu_ReadReg((InstancePtr)->Config.BaseAddress, \
+		XIPIPSU_ISR_OFFSET)
+/****************************************************************************/
+/**
+*
+* Clear the STATUS REGISTER of the current IPI instance.
+* The corresponding interrupt status for
+* each bit set to 1 in Mask, will be cleared
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param Mask corresponding to the source CPU*
+*
+* @note This function should be used after handling the IPI.
+* Clearing the status will automatically clear the corresponding bit in
+* OBSERVATION register of Source CPU
+* C-style signature
+*	void XIpiPsu_ClearInterruptStatus(XIpiPsu *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+
+#define XIpiPsu_ClearInterruptStatus(InstancePtr, Mask)  \
+	XIpiPsu_WriteReg((InstancePtr)->Config.BaseAddress, \
+		XIPIPSU_ISR_OFFSET, \
+		((Mask) & XIPIPSU_ALL_MASK));
+/****************************************************************************/
+/**
+*
+* Get the OBSERVATION REGISTER of the current IPI instance.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @return	Returns the Observation register(OBS) contents
+* @note		User needs to parse this 32-bit value to check the status of
+*			individual CPUs
+* C-style signature
+*	u32 XIpiPsu_GetObsStatus(XIpiPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XIpiPsu_GetObsStatus(InstancePtr)  \
+	XIpiPsu_ReadReg((InstancePtr)->Config.BaseAddress, \
+		XIPIPSU_OBS_OFFSET)
+/****************************************************************************/
+/************************** Function Prototypes *****************************/
+
+/* Static lookup function implemented in xipipsu_sinit.c */
+
+XIpiPsu_Config *XIpiPsu_LookupConfig(u32 DeviceId);
+
+/* Interface Functions implemented in xipipsu.c */
+
+XStatus XIpiPsu_CfgInitialize(XIpiPsu *InstancePtr, XIpiPsu_Config * CfgPtr,
+		UINTPTR EffectiveAddress);
+
+void XIpiPsu_Reset(XIpiPsu *InstancePtr);
+
+XStatus XIpiPsu_TriggerIpi(XIpiPsu *InstancePtr, u32 DestCpuMask);
+
+XStatus XIpiPsu_PollForAck(XIpiPsu *InstancePtr, u32 DestCpuMask,
+		u32 TimeOutCount);
+
+XStatus XIpiPsu_ReadMessage(XIpiPsu *InstancePtr, u32 SrcCpuMask, u32 *MsgPtr,
+		u32 MsgLength, u8 BufferType);
+
+XStatus XIpiPsu_WriteMessage(XIpiPsu *InstancePtr, u32 DestCpuMask, u32 *MsgPtr,
+		u32 MsgLength, u8 BufferType);
+void XIpiPsu_SetConfigTable(u32 DeviceId, XIpiPsu_Config *ConfigTblPtr);
+
+#endif /* XIPIPSU_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xipipsu_hw.h b/src/Xilinx/include/xipipsu_hw.h
new file mode 100644
index 0000000..5a32021
--- /dev/null
+++ b/src/Xilinx/include/xipipsu_hw.h
@@ -0,0 +1,80 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/**
+*
+* @file xipipsu_hw.h
+* @addtogroup ipipsu_v2_3
+* @{
+*
+* This file contains macro definitions for low level HW related params
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------.
+* 1.0   mjr  03/15/15 First release
+* 2.1   kvn  05/05/16 Modified code for MISRA-C:2012 Compliance
+*
+* 

+*
+******************************************************************************/
+#ifndef XIPIPSU_HW_H_	/* prevent circular inclusions */
+#define XIPIPSU_HW_H_	/* by using protection macros */
+
+/************************** Constant Definitions *****************************/
+/* Message RAM related params */
+#define XIPIPSU_MSG_RAM_BASE 0xFF990000U
+#define XIPIPSU_MSG_BUF_SIZE 8U	/* Size in Words */
+#define XIPIPSU_MAX_BUFF_INDEX	7U
+
+/* EIGHT pairs of TWO buffers(msg+resp) of THIRTY TWO bytes each */
+#define XIPIPSU_BUFFER_OFFSET_GROUP	(8U * 2U * 32U)
+#define XIPIPSU_BUFFER_OFFSET_TARGET (32U * 2U)
+#define XIPIPSU_BUFFER_OFFSET_RESPONSE		(32U)
+
+/* Number of IPI slots enabled on the device */
+#define XIPIPSU_MAX_TARGETS	XPAR_XIPIPSU_NUM_TARGETS
+
+/* Register Offsets for each member  of IPI Register Set */
+#define XIPIPSU_TRIG_OFFSET 0x00U
+#define XIPIPSU_OBS_OFFSET 0x04U
+#define XIPIPSU_ISR_OFFSET 0x10U
+#define XIPIPSU_IMR_OFFSET 0x14U
+#define XIPIPSU_IER_OFFSET 0x18U
+#define XIPIPSU_IDR_OFFSET 0x1CU
+
+/* MASK of all valid IPI bits in above registers */
+#define XIPIPSU_ALL_MASK	0x0F0F0301U
+
+#endif /* XIPIPSU_HW_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xlpd_slcr.h b/src/Xilinx/include/xlpd_slcr.h
new file mode 100644
index 0000000..cc05672
--- /dev/null
+++ b/src/Xilinx/include/xlpd_slcr.h
@@ -0,0 +1,5667 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_SLCR_H__
+#define __XLPD_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdSlcr Base Address
+ */
+#define XLPD_SLCR_BASEADDR      0xFF410000UL
+
+/**
+ * Register: XlpdSlcrWprot0
+ */
+#define XLPD_SLCR_WPROT0    ( ( XLPD_SLCR_BASEADDR ) + 0x00000000UL )
+#define XLPD_SLCR_WPROT0_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_WPROT0_ACT_SHIFT   0UL
+#define XLPD_SLCR_WPROT0_ACT_WIDTH   1UL
+#define XLPD_SLCR_WPROT0_ACT_MASK    0x00000001UL
+#define XLPD_SLCR_WPROT0_ACT_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrCtrl
+ */
+#define XLPD_SLCR_CTRL    ( ( XLPD_SLCR_BASEADDR ) + 0x00000004UL )
+#define XLPD_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsr
+ */
+#define XLPD_SLCR_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000008UL )
+#define XLPD_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrImr
+ */
+#define XLPD_SLCR_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XLPD_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIer
+ */
+#define XLPD_SLCR_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00000010UL )
+#define XLPD_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIdr
+ */
+#define XLPD_SLCR_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000014UL )
+#define XLPD_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrItr
+ */
+#define XLPD_SLCR_ITR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000018UL )
+#define XLPD_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk0
+ */
+#define XLPD_SLCR_SAFETY_CHK0    ( ( XLPD_SLCR_BASEADDR ) + 0x00000040UL )
+#define XLPD_SLCR_SAFETY_CHK0_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK0_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk1
+ */
+#define XLPD_SLCR_SAFETY_CHK1    ( ( XLPD_SLCR_BASEADDR ) + 0x00000044UL )
+#define XLPD_SLCR_SAFETY_CHK1_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK1_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk2
+ */
+#define XLPD_SLCR_SAFETY_CHK2    ( ( XLPD_SLCR_BASEADDR ) + 0x00000048UL )
+#define XLPD_SLCR_SAFETY_CHK2_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK2_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk3
+ */
+#define XLPD_SLCR_SAFETY_CHK3    ( ( XLPD_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XLPD_SLCR_SAFETY_CHK3_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK3_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrXcsupmuWdtClkSel
+ */
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL    ( ( XLPD_SLCR_BASEADDR ) + 0x00000050UL )
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_SHIFT   0UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_WIDTH   1UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_MASK    0x00000001UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAdmaCfg
+ */
+#define XLPD_SLCR_ADMA_CFG    ( ( XLPD_SLCR_BASEADDR ) + 0x0000200CUL )
+#define XLPD_SLCR_ADMA_CFG_RSTVAL   0x00000028UL
+
+#define XLPD_SLCR_ADMA_CFG_BUSWID_SHIFT   5UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_WIDTH   2UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_MASK    0x00000060UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_SHIFT   0UL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_WIDTH   5UL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_MASK    0x0000001fUL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_DEFVAL  0x8UL
+
+/**
+ * Register: XlpdSlcrAdmaRam
+ */
+#define XLPD_SLCR_ADMA_RAM    ( ( XLPD_SLCR_BASEADDR ) + 0x00002010UL )
+#define XLPD_SLCR_ADMA_RAM_RSTVAL   0x00003b3bUL
+
+#define XLPD_SLCR_ADMA_RAM1_EMAB_SHIFT   12UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_MASK    0x00007000UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM1_EMASA_SHIFT   11UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_WIDTH   1UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_MASK    0x00000800UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_RAM1_EMAA_SHIFT   8UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_MASK    0x00000700UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMAB_SHIFT   4UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_MASK    0x00000070UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMASA_SHIFT   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_WIDTH   1UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_MASK    0x00000008UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMAA_SHIFT   0UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_MASK    0x00000007UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIsr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003000UL )
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiImr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003008UL )
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RSTVAL   0x1dcf000fUL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIer
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00003010UL )
+#define XLPD_SLCR_ERR_AIBAXI_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIdr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003018UL )
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIsr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003020UL )
+#define XLPD_SLCR_ERR_AIBAPB_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbImr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003024UL )
+#define XLPD_SLCR_ERR_AIBAPB_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIer
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00003028UL )
+#define XLPD_SLCR_ERR_AIBAPB_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIdr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000302CUL )
+#define XLPD_SLCR_ERR_AIBAPB_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiReq
+ */
+#define XLPD_SLCR_ISO_AIBAXI_REQ    ( ( XLPD_SLCR_BASEADDR ) + 0x00003030UL )
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiType
+ */
+#define XLPD_SLCR_ISO_AIBAXI_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x00003038UL )
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RSTVAL   0x19cf000fUL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiAck
+ */
+#define XLPD_SLCR_ISO_AIBAXI_ACK    ( ( XLPD_SLCR_BASEADDR ) + 0x00003040UL )
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbReq
+ */
+#define XLPD_SLCR_ISO_AIBAPB_REQ    ( ( XLPD_SLCR_BASEADDR ) + 0x00003048UL )
+#define XLPD_SLCR_ISO_AIBAPB_REQ_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbType
+ */
+#define XLPD_SLCR_ISO_AIBAPB_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x0000304CUL )
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbAck
+ */
+#define XLPD_SLCR_ISO_AIBAPB_ACK    ( ( XLPD_SLCR_BASEADDR ) + 0x00003050UL )
+#define XLPD_SLCR_ISO_AIBAPB_ACK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbIsr
+ */
+#define XLPD_SLCR_ERR_ATB_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00006000UL )
+#define XLPD_SLCR_ERR_ATB_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbImr
+ */
+#define XLPD_SLCR_ERR_ATB_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00006004UL )
+#define XLPD_SLCR_ERR_ATB_IMR_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAtbIer
+ */
+#define XLPD_SLCR_ERR_ATB_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00006008UL )
+#define XLPD_SLCR_ERR_ATB_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbIdr
+ */
+#define XLPD_SLCR_ERR_ATB_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000600CUL )
+#define XLPD_SLCR_ERR_ATB_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAtbCmdStoreEn
+ */
+#define XLPD_SLCR_ATB_CMD_STORE_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00006010UL )
+#define XLPD_SLCR_ATB_CMD_STORE_EN_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrAtbRespEn
+ */
+#define XLPD_SLCR_ATB_RESP_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00006014UL )
+#define XLPD_SLCR_ATB_RESP_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAtbRespType
+ */
+#define XLPD_SLCR_ATB_RESP_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x00006018UL )
+#define XLPD_SLCR_ATB_RESP_TYPE_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrAtbPrescale
+ */
+#define XLPD_SLCR_ATB_PRESCALE    ( ( XLPD_SLCR_BASEADDR ) + 0x00006020UL )
+#define XLPD_SLCR_ATB_PRESCALE_RSTVAL   0x0000ffffUL
+
+#define XLPD_SLCR_ATB_PRESCALE_EN_SHIFT   16UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_WIDTH   1UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_MASK    0x00010000UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ATB_PRESCALE_VAL_SHIFT   0UL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_WIDTH   16UL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_MASK    0x0000ffffUL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_DEFVAL  0xffffUL
+
+/**
+ * Register: XlpdSlcrMutex0
+ */
+#define XLPD_SLCR_MUTEX0    ( ( XLPD_SLCR_BASEADDR ) + 0x00007000UL )
+#define XLPD_SLCR_MUTEX0_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX0_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX0_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX0_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX0_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex1
+ */
+#define XLPD_SLCR_MUTEX1    ( ( XLPD_SLCR_BASEADDR ) + 0x00007004UL )
+#define XLPD_SLCR_MUTEX1_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX1_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX1_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX1_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX1_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex2
+ */
+#define XLPD_SLCR_MUTEX2    ( ( XLPD_SLCR_BASEADDR ) + 0x00007008UL )
+#define XLPD_SLCR_MUTEX2_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX2_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX2_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX2_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX2_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex3
+ */
+#define XLPD_SLCR_MUTEX3    ( ( XLPD_SLCR_BASEADDR ) + 0x0000700CUL )
+#define XLPD_SLCR_MUTEX3_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX3_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX3_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX3_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX3_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqSts
+ */
+#define XLPD_SLCR_GICP0_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008000UL )
+#define XLPD_SLCR_GICP0_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqMsk
+ */
+#define XLPD_SLCR_GICP0_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008004UL )
+#define XLPD_SLCR_GICP0_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqEn
+ */
+#define XLPD_SLCR_GICP0_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008008UL )
+#define XLPD_SLCR_GICP0_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqDis
+ */
+#define XLPD_SLCR_GICP0_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000800CUL )
+#define XLPD_SLCR_GICP0_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqTrig
+ */
+#define XLPD_SLCR_GICP0_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008010UL )
+#define XLPD_SLCR_GICP0_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqSts
+ */
+#define XLPD_SLCR_GICP1_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008014UL )
+#define XLPD_SLCR_GICP1_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqMsk
+ */
+#define XLPD_SLCR_GICP1_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008018UL )
+#define XLPD_SLCR_GICP1_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqEn
+ */
+#define XLPD_SLCR_GICP1_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x0000801CUL )
+#define XLPD_SLCR_GICP1_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqDis
+ */
+#define XLPD_SLCR_GICP1_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008020UL )
+#define XLPD_SLCR_GICP1_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqTrig
+ */
+#define XLPD_SLCR_GICP1_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008024UL )
+#define XLPD_SLCR_GICP1_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqSts
+ */
+#define XLPD_SLCR_GICP2_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008028UL )
+#define XLPD_SLCR_GICP2_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqMsk
+ */
+#define XLPD_SLCR_GICP2_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x0000802CUL )
+#define XLPD_SLCR_GICP2_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqEn
+ */
+#define XLPD_SLCR_GICP2_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008030UL )
+#define XLPD_SLCR_GICP2_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqDis
+ */
+#define XLPD_SLCR_GICP2_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008034UL )
+#define XLPD_SLCR_GICP2_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqTrig
+ */
+#define XLPD_SLCR_GICP2_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008038UL )
+#define XLPD_SLCR_GICP2_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqSts
+ */
+#define XLPD_SLCR_GICP3_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000803CUL )
+#define XLPD_SLCR_GICP3_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqMsk
+ */
+#define XLPD_SLCR_GICP3_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008040UL )
+#define XLPD_SLCR_GICP3_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqEn
+ */
+#define XLPD_SLCR_GICP3_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008044UL )
+#define XLPD_SLCR_GICP3_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqDis
+ */
+#define XLPD_SLCR_GICP3_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008048UL )
+#define XLPD_SLCR_GICP3_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqTrig
+ */
+#define XLPD_SLCR_GICP3_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x0000804CUL )
+#define XLPD_SLCR_GICP3_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqSts
+ */
+#define XLPD_SLCR_GICP4_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008050UL )
+#define XLPD_SLCR_GICP4_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqMsk
+ */
+#define XLPD_SLCR_GICP4_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008054UL )
+#define XLPD_SLCR_GICP4_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqEn
+ */
+#define XLPD_SLCR_GICP4_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008058UL )
+#define XLPD_SLCR_GICP4_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqDis
+ */
+#define XLPD_SLCR_GICP4_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000805CUL )
+#define XLPD_SLCR_GICP4_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqTrig
+ */
+#define XLPD_SLCR_GICP4_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008060UL )
+#define XLPD_SLCR_GICP4_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqSts
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A0UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqMsk
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A4UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_RSTVAL   0x000000ffUL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqEn
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A8UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqDis
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x000080ACUL )
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqTrig
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x000080B0UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAfiFs
+ */
+#define XLPD_SLCR_AFI_FS    ( ( XLPD_SLCR_BASEADDR ) + 0x00009000UL )
+#define XLPD_SLCR_AFI_FS_RSTVAL   0x00000200UL
+
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_SHIFT   8UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_WIDTH   2UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_MASK    0x00000300UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_DEFVAL  0x2UL
+
+/**
+ * Register: XlpdSlcrCci
+ */
+#define XLPD_SLCR_CCI    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A000UL )
+#define XLPD_SLCR_CCI_RSTVAL   0x03801c07UL
+
+#define XLPD_SLCR_CCI_SPR_SHIFT   28UL
+#define XLPD_SLCR_CCI_SPR_WIDTH   4UL
+#define XLPD_SLCR_CCI_SPR_MASK    0xf0000000UL
+#define XLPD_SLCR_CCI_SPR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS4_SHIFT   27UL
+#define XLPD_SLCR_CCI_QVNVNETS4_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS4_MASK    0x08000000UL
+#define XLPD_SLCR_CCI_QVNVNETS4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS3_SHIFT   26UL
+#define XLPD_SLCR_CCI_QVNVNETS3_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS3_MASK    0x04000000UL
+#define XLPD_SLCR_CCI_QVNVNETS3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS2_SHIFT   25UL
+#define XLPD_SLCR_CCI_QVNVNETS2_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS2_MASK    0x02000000UL
+#define XLPD_SLCR_CCI_QVNVNETS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QVNVNETS1_SHIFT   24UL
+#define XLPD_SLCR_CCI_QVNVNETS1_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS1_MASK    0x01000000UL
+#define XLPD_SLCR_CCI_QVNVNETS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QVNVNETS0_SHIFT   23UL
+#define XLPD_SLCR_CCI_QVNVNETS0_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS0_MASK    0x00800000UL
+#define XLPD_SLCR_CCI_QVNVNETS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QOS_OVRRD_SHIFT   18UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_WIDTH   5UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_MASK    0x007c0000UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVN_EN_M2_SHIFT   17UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_MASK    0x00020000UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVN_EN_M1_SHIFT   16UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_MASK    0x00010000UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_STRPG_GRAN_SHIFT   13UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_WIDTH   3UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_MASK    0x0000e000UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN4_SHIFT   12UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_MASK    0x00001000UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN3_SHIFT   11UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_MASK    0x00000800UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN0_SHIFT   10UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_MASK    0x00000400UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ECOREVNUM_SHIFT   6UL
+#define XLPD_SLCR_CCI_ECOREVNUM_WIDTH   4UL
+#define XLPD_SLCR_CCI_ECOREVNUM_MASK    0x000003c0UL
+#define XLPD_SLCR_CCI_ECOREVNUM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA2_SHIFT   5UL
+#define XLPD_SLCR_CCI_ASA2_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA2_MASK    0x00000020UL
+#define XLPD_SLCR_CCI_ASA2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA1_SHIFT   4UL
+#define XLPD_SLCR_CCI_ASA1_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA1_MASK    0x00000010UL
+#define XLPD_SLCR_CCI_ASA1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA0_SHIFT   3UL
+#define XLPD_SLCR_CCI_ASA0_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA0_MASK    0x00000008UL
+#define XLPD_SLCR_CCI_ASA0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_OWO2_SHIFT   2UL
+#define XLPD_SLCR_CCI_OWO2_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO2_MASK    0x00000004UL
+#define XLPD_SLCR_CCI_OWO2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_OWO1_SHIFT   1UL
+#define XLPD_SLCR_CCI_OWO1_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO1_MASK    0x00000002UL
+#define XLPD_SLCR_CCI_OWO1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_OWO0_SHIFT   0UL
+#define XLPD_SLCR_CCI_OWO0_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO0_MASK    0x00000001UL
+#define XLPD_SLCR_CCI_OWO0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrCciAddrmap
+ */
+#define XLPD_SLCR_CCI_ADDRMAP    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A004UL )
+#define XLPD_SLCR_CCI_ADDRMAP_RSTVAL   0x00c000ffUL
+
+#define XLPD_SLCR_CCI_ADDRMAP_15_SHIFT   30UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_MASK    0xc0000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_14_SHIFT   28UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_MASK    0x30000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_13_SHIFT   26UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_MASK    0x0c000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_12_SHIFT   24UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_MASK    0x03000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_11_SHIFT   22UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_MASK    0x00c00000UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_10_SHIFT   20UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_MASK    0x00300000UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_9_SHIFT   18UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_MASK    0x000c0000UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_8_SHIFT   16UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_MASK    0x00030000UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_7_SHIFT   14UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_MASK    0x0000c000UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_6_SHIFT   12UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_MASK    0x00003000UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_5_SHIFT   10UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_MASK    0x00000c00UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_4_SHIFT   8UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_MASK    0x00000300UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_3_SHIFT   6UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_MASK    0x000000c0UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_2_SHIFT   4UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_MASK    0x00000030UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_1_SHIFT   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_1_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_1_MASK    0x0000000cUL
+#define XLPD_SLCR_CCI_ADDRMAP_1_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_0_SHIFT   0UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_MASK    0x00000003UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrCciQvnprealloc
+ */
+#define XLPD_SLCR_CCI_QVNPREALLOC    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A008UL )
+#define XLPD_SLCR_CCI_QVNPREALLOC_RSTVAL   0x00330330UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_SHIFT   20UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_MASK    0x00f00000UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_SHIFT   16UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_MASK    0x000f0000UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_SHIFT   8UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_MASK    0x00000f00UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_SHIFT   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_MASK    0x000000f0UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrSmmu
+ */
+#define XLPD_SLCR_SMMU    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A020UL )
+#define XLPD_SLCR_SMMU_RSTVAL   0x0000003fUL
+
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_SHIFT   7UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_WIDTH   1UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_MASK    0x00000080UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SMMU_CTTW_SHIFT   6UL
+#define XLPD_SLCR_SMMU_CTTW_WIDTH   1UL
+#define XLPD_SLCR_SMMU_CTTW_MASK    0x00000040UL
+#define XLPD_SLCR_SMMU_CTTW_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_SHIFT   5UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_MASK    0x00000020UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_SHIFT   4UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_MASK    0x00000010UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_SHIFT   3UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_MASK    0x00000008UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_SHIFT   2UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_MASK    0x00000004UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_SHIFT   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_MASK    0x00000002UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_SHIFT   0UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_MASK    0x00000001UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrApu
+ */
+#define XLPD_SLCR_APU    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A040UL )
+#define XLPD_SLCR_APU_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_APU_BRDC_BARRIER_SHIFT   3UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_MASK    0x00000008UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_CMNT_SHIFT   2UL
+#define XLPD_SLCR_APU_BRDC_CMNT_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_CMNT_MASK    0x00000004UL
+#define XLPD_SLCR_APU_BRDC_CMNT_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_INNER_SHIFT   1UL
+#define XLPD_SLCR_APU_BRDC_INNER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_INNER_MASK    0x00000002UL
+#define XLPD_SLCR_APU_BRDC_INNER_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_OUTER_SHIFT   0UL
+#define XLPD_SLCR_APU_BRDC_OUTER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_OUTER_MASK    0x00000001UL
+#define XLPD_SLCR_APU_BRDC_OUTER_DEFVAL  0x1UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_SLCR_H__ */
diff --git a/src/Xilinx/include/xlpd_slcr_secure.h b/src/Xilinx/include/xlpd_slcr_secure.h
new file mode 100644
index 0000000..aff3bf2
--- /dev/null
+++ b/src/Xilinx/include/xlpd_slcr_secure.h
@@ -0,0 +1,141 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_SLCR_SECURE_H__
+#define __XLPD_SLCR_SECURE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdSlcrSecure Base Address
+ */
+#define XLPD_SLCR_SECURE_BASEADDR      0xFF4B0000UL
+
+/**
+ * Register: XlpdSlcrSecCtrl
+ */
+#define XLPD_SLCR_SEC_CTRL    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000004UL )
+#define XLPD_SLCR_SEC_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_SHIFT   0UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_WIDTH   1UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecIsr
+ */
+#define XLPD_SLCR_SEC_ISR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000008UL )
+#define XLPD_SLCR_SEC_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecImr
+ */
+#define XLPD_SLCR_SEC_IMR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x0000000CUL )
+#define XLPD_SLCR_SEC_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrSecIer
+ */
+#define XLPD_SLCR_SEC_IER    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000010UL )
+#define XLPD_SLCR_SEC_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecIdr
+ */
+#define XLPD_SLCR_SEC_IDR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000014UL )
+#define XLPD_SLCR_SEC_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecItr
+ */
+#define XLPD_SLCR_SEC_ITR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000018UL )
+#define XLPD_SLCR_SEC_ITR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecRpu
+ */
+#define XLPD_SLCR_SEC_RPU    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000020UL )
+#define XLPD_SLCR_SEC_RPU_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_SHIFT   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_WIDTH   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_MASK    0x00000002UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_SHIFT   0UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_WIDTH   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecAdma
+ */
+#define XLPD_SLCR_SEC_ADMA    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000024UL )
+#define XLPD_SLCR_SEC_ADMA_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ADMA_TZ_SHIFT   0UL
+#define XLPD_SLCR_SEC_ADMA_TZ_WIDTH   8UL
+#define XLPD_SLCR_SEC_ADMA_TZ_MASK    0x000000ffUL
+#define XLPD_SLCR_SEC_ADMA_TZ_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecSafetyChk
+ */
+#define XLPD_SLCR_SEC_SAFETY_CHK    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000030UL )
+#define XLPD_SLCR_SEC_SAFETY_CHK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_SHIFT   0UL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_WIDTH   32UL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecUsb
+ */
+#define XLPD_SLCR_SEC_USB    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000034UL )
+#define XLPD_SLCR_SEC_USB_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_SHIFT   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_WIDTH   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_MASK    0x00000002UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_SHIFT   0UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_WIDTH   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_DEFVAL  0x1UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_SLCR_SECURE_H__ */
diff --git a/src/Xilinx/include/xlpd_xppu.h b/src/Xilinx/include/xlpd_xppu.h
new file mode 100644
index 0000000..a5145ea
--- /dev/null
+++ b/src/Xilinx/include/xlpd_xppu.h
@@ -0,0 +1,858 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_XPPU_H__
+#define __XLPD_XPPU_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdXppu Base Address
+ */
+#define XLPD_XPPU_BASEADDR      0xFF980000UL
+
+/**
+ * Register: XlpdXppuCtrl
+ */
+#define XLPD_XPPU_CTRL    ( ( XLPD_XPPU_BASEADDR ) + 0x00000000UL )
+#define XLPD_XPPU_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_SHIFT   2UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_MASK    0x00000004UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_DEFVAL  0x0UL
+
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_SHIFT   1UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_MASK    0x00000002UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_DEFVAL  0x0UL
+
+#define XLPD_XPPU_CTRL_EN_SHIFT   0UL
+#define XLPD_XPPU_CTRL_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_EN_MASK    0x00000001UL
+#define XLPD_XPPU_CTRL_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuErrSts1
+ */
+#define XLPD_XPPU_ERR_STS1    ( ( XLPD_XPPU_BASEADDR ) + 0x00000004UL )
+#define XLPD_XPPU_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuErrSts2
+ */
+#define XLPD_XPPU_ERR_STS2    ( ( XLPD_XPPU_BASEADDR ) + 0x00000008UL )
+#define XLPD_XPPU_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuPoison
+ */
+#define XLPD_XPPU_POISON    ( ( XLPD_XPPU_BASEADDR ) + 0x0000000CUL )
+#define XLPD_XPPU_POISON_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_POISON_BASE_SHIFT   0UL
+#define XLPD_XPPU_POISON_BASE_WIDTH   20UL
+#define XLPD_XPPU_POISON_BASE_MASK    0x000fffffUL
+#define XLPD_XPPU_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuIsr
+ */
+#define XLPD_XPPU_ISR    ( ( XLPD_XPPU_BASEADDR ) + 0x00000010UL )
+#define XLPD_XPPU_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ISR_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_ISR_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_ISR_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_ISR_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_ISR_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_ISR_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_ISR_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_ISR_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_ISR_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_ISR_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_ISR_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_ISR_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_ISR_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_ISR_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_ISR_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuImr
+ */
+#define XLPD_XPPU_IMR    ( ( XLPD_XPPU_BASEADDR ) + 0x00000014UL )
+#define XLPD_XPPU_IMR_RSTVAL   0x000000efUL
+
+#define XLPD_XPPU_IMR_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IMR_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IMR_APER_PARITY_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IMR_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IMR_APER_TZ_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IMR_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IMR_APER_PERM_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IMR_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IMR_MID_PARITY_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IMR_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IMR_MID_RO_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IMR_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IMR_MID_MISS_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IMR_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IMR_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuIen
+ */
+#define XLPD_XPPU_IEN    ( ( XLPD_XPPU_BASEADDR ) + 0x00000018UL )
+#define XLPD_XPPU_IEN_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_IEN_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IEN_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IEN_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IEN_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IEN_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IEN_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IEN_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IEN_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IEN_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IEN_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IEN_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IEN_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IEN_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IEN_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IEN_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuIds
+ */
+#define XLPD_XPPU_IDS    ( ( XLPD_XPPU_BASEADDR ) + 0x0000001CUL )
+#define XLPD_XPPU_IDS_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_IDS_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IDS_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IDS_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IDS_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IDS_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IDS_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IDS_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IDS_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IDS_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IDS_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IDS_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IDS_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IDS_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IDS_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IDS_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMMstrIds
+ */
+#define XLPD_XPPU_M_MSTR_IDS    ( ( XLPD_XPPU_BASEADDR ) + 0x0000003CUL )
+#define XLPD_XPPU_M_MSTR_IDS_RSTVAL   0x00000014UL
+
+#define XLPD_XPPU_M_MSTR_IDS_NO_SHIFT   0UL
+#define XLPD_XPPU_M_MSTR_IDS_NO_WIDTH   32UL
+#define XLPD_XPPU_M_MSTR_IDS_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_MSTR_IDS_NO_DEFVAL  0x14UL
+
+/**
+ * Register: XlpdXppuMAperture32b
+ */
+#define XLPD_XPPU_M_APERTURE_32B    ( ( XLPD_XPPU_BASEADDR ) + 0x00000040UL )
+#define XLPD_XPPU_M_APERTURE_32B_RSTVAL   0x00000080UL
+
+#define XLPD_XPPU_M_APERTURE_32B_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_32B_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_32B_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_32B_NO_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMAperture64kb
+ */
+#define XLPD_XPPU_M_APERTURE_64KB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000044UL )
+#define XLPD_XPPU_M_APERTURE_64KB_RSTVAL   0x00000100UL
+
+#define XLPD_XPPU_M_APERTURE_64KB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_DEFVAL  0x100UL
+
+/**
+ * Register: XlpdXppuMAperture1mb
+ */
+#define XLPD_XPPU_M_APERTURE_1MB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000048UL )
+#define XLPD_XPPU_M_APERTURE_1MB_RSTVAL   0x00000010UL
+
+#define XLPD_XPPU_M_APERTURE_1MB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_DEFVAL  0x10UL
+
+/**
+ * Register: XlpdXppuMAperture512mb
+ */
+#define XLPD_XPPU_M_APERTURE_512MB    ( ( XLPD_XPPU_BASEADDR ) + 0x0000004CUL )
+#define XLPD_XPPU_M_APERTURE_512MB_RSTVAL   0x00000001UL
+
+#define XLPD_XPPU_M_APERTURE_512MB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuBase32b
+ */
+#define XLPD_XPPU_BASE_32B    ( ( XLPD_XPPU_BASEADDR ) + 0x00000050UL )
+#define XLPD_XPPU_BASE_32B_RSTVAL   0xff990000UL
+
+#define XLPD_XPPU_BASE_32B_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_32B_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_32B_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_32B_ADDR_DEFVAL  0xff990000UL
+
+/**
+ * Register: XlpdXppuBase64kb
+ */
+#define XLPD_XPPU_BASE_64KB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000054UL )
+#define XLPD_XPPU_BASE_64KB_RSTVAL   0xff000000UL
+
+#define XLPD_XPPU_BASE_64KB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_64KB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_64KB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_64KB_ADDR_DEFVAL  0xff000000UL
+
+/**
+ * Register: XlpdXppuBase1mb
+ */
+#define XLPD_XPPU_BASE_1MB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000058UL )
+#define XLPD_XPPU_BASE_1MB_RSTVAL   0xfe000000UL
+
+#define XLPD_XPPU_BASE_1MB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_1MB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_1MB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_1MB_ADDR_DEFVAL  0xfe000000UL
+
+/**
+ * Register: XlpdXppuBase512mb
+ */
+#define XLPD_XPPU_BASE_512MB    ( ( XLPD_XPPU_BASEADDR ) + 0x0000005CUL )
+#define XLPD_XPPU_BASE_512MB_RSTVAL   0xc0000000UL
+
+#define XLPD_XPPU_BASE_512MB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_512MB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_512MB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_512MB_ADDR_DEFVAL  0xc0000000UL
+
+/**
+ * Register: XlpdXppuMstrId00
+ */
+#define XLPD_XPPU_MSTR_ID00    ( ( XLPD_XPPU_BASEADDR ) + 0x00000100UL )
+#define XLPD_XPPU_MSTR_ID00_RSTVAL   0x83ff0040UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_DEFVAL  0x3ffUL
+
+#define XLPD_XPPU_MSTR_ID00_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID00_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID00_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID00_MID_DEFVAL  0x40UL
+
+/**
+ * Register: XlpdXppuMstrId01
+ */
+#define XLPD_XPPU_MSTR_ID01    ( ( XLPD_XPPU_BASEADDR ) + 0x00000104UL )
+#define XLPD_XPPU_MSTR_ID01_RSTVAL   0x03f00000UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_DEFVAL  0x3f0UL
+
+#define XLPD_XPPU_MSTR_ID01_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID01_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID01_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID01_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId02
+ */
+#define XLPD_XPPU_MSTR_ID02    ( ( XLPD_XPPU_BASEADDR ) + 0x00000108UL )
+#define XLPD_XPPU_MSTR_ID02_RSTVAL   0x83f00010UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_DEFVAL  0x3f0UL
+
+#define XLPD_XPPU_MSTR_ID02_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID02_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID02_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID02_MID_DEFVAL  0x10UL
+
+/**
+ * Register: XlpdXppuMstrId03
+ */
+#define XLPD_XPPU_MSTR_ID03    ( ( XLPD_XPPU_BASEADDR ) + 0x0000010CUL )
+#define XLPD_XPPU_MSTR_ID03_RSTVAL   0x83c00080UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_DEFVAL  0x3c0UL
+
+#define XLPD_XPPU_MSTR_ID03_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID03_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID03_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID03_MID_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMstrId04
+ */
+#define XLPD_XPPU_MSTR_ID04    ( ( XLPD_XPPU_BASEADDR ) + 0x00000110UL )
+#define XLPD_XPPU_MSTR_ID04_RSTVAL   0x83c30080UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID04_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID04_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID04_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID04_MID_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMstrId05
+ */
+#define XLPD_XPPU_MSTR_ID05    ( ( XLPD_XPPU_BASEADDR ) + 0x00000114UL )
+#define XLPD_XPPU_MSTR_ID05_RSTVAL   0x03c30081UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID05_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID05_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID05_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID05_MID_DEFVAL  0x81UL
+
+/**
+ * Register: XlpdXppuMstrId06
+ */
+#define XLPD_XPPU_MSTR_ID06    ( ( XLPD_XPPU_BASEADDR ) + 0x00000118UL )
+#define XLPD_XPPU_MSTR_ID06_RSTVAL   0x03c30082UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID06_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID06_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID06_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID06_MID_DEFVAL  0x82UL
+
+/**
+ * Register: XlpdXppuMstrId07
+ */
+#define XLPD_XPPU_MSTR_ID07    ( ( XLPD_XPPU_BASEADDR ) + 0x0000011CUL )
+#define XLPD_XPPU_MSTR_ID07_RSTVAL   0x83c30083UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID07_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID07_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID07_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID07_MID_DEFVAL  0x83UL
+
+/**
+ * Register: XlpdXppuMstrId08
+ */
+#define XLPD_XPPU_MSTR_ID08    ( ( XLPD_XPPU_BASEADDR ) + 0x00000120UL )
+#define XLPD_XPPU_MSTR_ID08_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID08_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID08_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID08_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId09
+ */
+#define XLPD_XPPU_MSTR_ID09    ( ( XLPD_XPPU_BASEADDR ) + 0x00000124UL )
+#define XLPD_XPPU_MSTR_ID09_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID09_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID09_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID09_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId10
+ */
+#define XLPD_XPPU_MSTR_ID10    ( ( XLPD_XPPU_BASEADDR ) + 0x00000128UL )
+#define XLPD_XPPU_MSTR_ID10_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID10_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID10_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID10_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId11
+ */
+#define XLPD_XPPU_MSTR_ID11    ( ( XLPD_XPPU_BASEADDR ) + 0x0000012CUL )
+#define XLPD_XPPU_MSTR_ID11_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID11_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID11_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID11_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId12
+ */
+#define XLPD_XPPU_MSTR_ID12    ( ( XLPD_XPPU_BASEADDR ) + 0x00000130UL )
+#define XLPD_XPPU_MSTR_ID12_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID12_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID12_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID12_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId13
+ */
+#define XLPD_XPPU_MSTR_ID13    ( ( XLPD_XPPU_BASEADDR ) + 0x00000134UL )
+#define XLPD_XPPU_MSTR_ID13_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID13_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID13_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID13_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId14
+ */
+#define XLPD_XPPU_MSTR_ID14    ( ( XLPD_XPPU_BASEADDR ) + 0x00000138UL )
+#define XLPD_XPPU_MSTR_ID14_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID14_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID14_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID14_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId15
+ */
+#define XLPD_XPPU_MSTR_ID15    ( ( XLPD_XPPU_BASEADDR ) + 0x0000013CUL )
+#define XLPD_XPPU_MSTR_ID15_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID15_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID15_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID15_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId16
+ */
+#define XLPD_XPPU_MSTR_ID16    ( ( XLPD_XPPU_BASEADDR ) + 0x00000140UL )
+#define XLPD_XPPU_MSTR_ID16_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID16_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID16_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID16_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId17
+ */
+#define XLPD_XPPU_MSTR_ID17    ( ( XLPD_XPPU_BASEADDR ) + 0x00000144UL )
+#define XLPD_XPPU_MSTR_ID17_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID17_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID17_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID17_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId18
+ */
+#define XLPD_XPPU_MSTR_ID18    ( ( XLPD_XPPU_BASEADDR ) + 0x00000148UL )
+#define XLPD_XPPU_MSTR_ID18_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID18_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID18_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID18_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId19
+ */
+#define XLPD_XPPU_MSTR_ID19    ( ( XLPD_XPPU_BASEADDR ) + 0x0000014CUL )
+#define XLPD_XPPU_MSTR_ID19_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID19_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID19_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID19_MID_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_XPPU_H__ */
diff --git a/src/Xilinx/include/xlpd_xppu_sink.h b/src/Xilinx/include/xlpd_xppu_sink.h
new file mode 100644
index 0000000..95f7e20
--- /dev/null
+++ b/src/Xilinx/include/xlpd_xppu_sink.h
@@ -0,0 +1,81 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_XPPU_SINK_H__
+#define __XLPD_XPPU_SINK_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdXppuSink Base Address
+ */
+#define XLPD_XPPU_SINK_BASEADDR      0xFF9C0000UL
+
+/**
+ * Register: XlpdXppuSinkErrSts
+ */
+#define XLPD_XPPU_SINK_ERR_STS    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF00UL )
+#define XLPD_XPPU_SINK_ERR_STS_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_SHIFT   31UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_WIDTH   1UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_MASK    0x80000000UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_SHIFT   0UL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_WIDTH   12UL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_MASK    0x00000fffUL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkIsr
+ */
+#define XLPD_XPPU_SINK_ISR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF10UL )
+#define XLPD_XPPU_SINK_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkImr
+ */
+#define XLPD_XPPU_SINK_IMR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF14UL )
+#define XLPD_XPPU_SINK_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuSinkIer
+ */
+#define XLPD_XPPU_SINK_IER    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF18UL )
+#define XLPD_XPPU_SINK_IER_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_IERADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkIdr
+ */
+#define XLPD_XPPU_SINK_IDR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF1CUL )
+#define XLPD_XPPU_SINK_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_XPPU_SINK_H__ */
diff --git a/src/Xilinx/include/xocm_xmpu_cfg.h b/src/Xilinx/include/xocm_xmpu_cfg.h
new file mode 100644
index 0000000..5e3631f
--- /dev/null
+++ b/src/Xilinx/include/xocm_xmpu_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XOCM_XMPU_CFG_H__
+#define __XOCM_XMPU_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XocmXmpuCfg Base Address
+ */
+#define XOCM_XMPU_CFG_BASEADDR      0xFFA70000UL
+
+/**
+ * Register: XocmXmpuCfgCtrl
+ */
+#define XOCM_XMPU_CFG_CTRL    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000000UL )
+#define XOCM_XMPU_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XocmXmpuCfgErrSts1
+ */
+#define XOCM_XMPU_CFG_ERR_STS1    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000004UL )
+#define XOCM_XMPU_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgErrSts2
+ */
+#define XOCM_XMPU_CFG_ERR_STS2    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000008UL )
+#define XOCM_XMPU_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgPoison
+ */
+#define XOCM_XMPU_CFG_POISON    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000000CUL )
+#define XOCM_XMPU_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_POISON_BASE_SHIFT   0UL
+#define XOCM_XMPU_CFG_POISON_BASE_WIDTH   20UL
+#define XOCM_XMPU_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XOCM_XMPU_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgIsr
+ */
+#define XOCM_XMPU_CFG_ISR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000010UL )
+#define XOCM_XMPU_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgImr
+ */
+#define XOCM_XMPU_CFG_IMR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000014UL )
+#define XOCM_XMPU_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XocmXmpuCfgIen
+ */
+#define XOCM_XMPU_CFG_IEN    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000018UL )
+#define XOCM_XMPU_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgIds
+ */
+#define XOCM_XMPU_CFG_IDS    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000001CUL )
+#define XOCM_XMPU_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgLock
+ */
+#define XOCM_XMPU_CFG_LOCK    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000020UL )
+#define XOCM_XMPU_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00Strt
+ */
+#define XOCM_XMPU_CFG_R00_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000100UL )
+#define XOCM_XMPU_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00End
+ */
+#define XOCM_XMPU_CFG_R00_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000104UL )
+#define XOCM_XMPU_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00Mstr
+ */
+#define XOCM_XMPU_CFG_R00_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000108UL )
+#define XOCM_XMPU_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00
+ */
+#define XOCM_XMPU_CFG_R00    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000010CUL )
+#define XOCM_XMPU_CFG_R00_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R00_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R00_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R00_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R00_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01Strt
+ */
+#define XOCM_XMPU_CFG_R01_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000110UL )
+#define XOCM_XMPU_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01End
+ */
+#define XOCM_XMPU_CFG_R01_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000114UL )
+#define XOCM_XMPU_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01Mstr
+ */
+#define XOCM_XMPU_CFG_R01_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000118UL )
+#define XOCM_XMPU_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01
+ */
+#define XOCM_XMPU_CFG_R01    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000011CUL )
+#define XOCM_XMPU_CFG_R01_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R01_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R01_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R01_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R01_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02Strt
+ */
+#define XOCM_XMPU_CFG_R02_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000120UL )
+#define XOCM_XMPU_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02End
+ */
+#define XOCM_XMPU_CFG_R02_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000124UL )
+#define XOCM_XMPU_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02Mstr
+ */
+#define XOCM_XMPU_CFG_R02_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000128UL )
+#define XOCM_XMPU_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02
+ */
+#define XOCM_XMPU_CFG_R02    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000012CUL )
+#define XOCM_XMPU_CFG_R02_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R02_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R02_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R02_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R02_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03Strt
+ */
+#define XOCM_XMPU_CFG_R03_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000130UL )
+#define XOCM_XMPU_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03End
+ */
+#define XOCM_XMPU_CFG_R03_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000134UL )
+#define XOCM_XMPU_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03Mstr
+ */
+#define XOCM_XMPU_CFG_R03_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000138UL )
+#define XOCM_XMPU_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03
+ */
+#define XOCM_XMPU_CFG_R03    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000013CUL )
+#define XOCM_XMPU_CFG_R03_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R03_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R03_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R03_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R03_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04Strt
+ */
+#define XOCM_XMPU_CFG_R04_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000140UL )
+#define XOCM_XMPU_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04End
+ */
+#define XOCM_XMPU_CFG_R04_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000144UL )
+#define XOCM_XMPU_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04Mstr
+ */
+#define XOCM_XMPU_CFG_R04_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000148UL )
+#define XOCM_XMPU_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04
+ */
+#define XOCM_XMPU_CFG_R04    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000014CUL )
+#define XOCM_XMPU_CFG_R04_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R04_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R04_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R04_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R04_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05Strt
+ */
+#define XOCM_XMPU_CFG_R05_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000150UL )
+#define XOCM_XMPU_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05End
+ */
+#define XOCM_XMPU_CFG_R05_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000154UL )
+#define XOCM_XMPU_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05Mstr
+ */
+#define XOCM_XMPU_CFG_R05_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000158UL )
+#define XOCM_XMPU_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05
+ */
+#define XOCM_XMPU_CFG_R05    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000015CUL )
+#define XOCM_XMPU_CFG_R05_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R05_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R05_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R05_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R05_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06Strt
+ */
+#define XOCM_XMPU_CFG_R06_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000160UL )
+#define XOCM_XMPU_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06End
+ */
+#define XOCM_XMPU_CFG_R06_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000164UL )
+#define XOCM_XMPU_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06Mstr
+ */
+#define XOCM_XMPU_CFG_R06_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000168UL )
+#define XOCM_XMPU_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06
+ */
+#define XOCM_XMPU_CFG_R06    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000016CUL )
+#define XOCM_XMPU_CFG_R06_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R06_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R06_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R06_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R06_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07Strt
+ */
+#define XOCM_XMPU_CFG_R07_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000170UL )
+#define XOCM_XMPU_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07End
+ */
+#define XOCM_XMPU_CFG_R07_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000174UL )
+#define XOCM_XMPU_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07Mstr
+ */
+#define XOCM_XMPU_CFG_R07_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000178UL )
+#define XOCM_XMPU_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07
+ */
+#define XOCM_XMPU_CFG_R07    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000017CUL )
+#define XOCM_XMPU_CFG_R07_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R07_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R07_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R07_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R07_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08Strt
+ */
+#define XOCM_XMPU_CFG_R08_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000180UL )
+#define XOCM_XMPU_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08End
+ */
+#define XOCM_XMPU_CFG_R08_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000184UL )
+#define XOCM_XMPU_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08Mstr
+ */
+#define XOCM_XMPU_CFG_R08_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000188UL )
+#define XOCM_XMPU_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08
+ */
+#define XOCM_XMPU_CFG_R08    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000018CUL )
+#define XOCM_XMPU_CFG_R08_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R08_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R08_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R08_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R08_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09Strt
+ */
+#define XOCM_XMPU_CFG_R09_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000190UL )
+#define XOCM_XMPU_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09End
+ */
+#define XOCM_XMPU_CFG_R09_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000194UL )
+#define XOCM_XMPU_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09Mstr
+ */
+#define XOCM_XMPU_CFG_R09_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000198UL )
+#define XOCM_XMPU_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09
+ */
+#define XOCM_XMPU_CFG_R09    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000019CUL )
+#define XOCM_XMPU_CFG_R09_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R09_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R09_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R09_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R09_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10Strt
+ */
+#define XOCM_XMPU_CFG_R10_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A0UL )
+#define XOCM_XMPU_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10End
+ */
+#define XOCM_XMPU_CFG_R10_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A4UL )
+#define XOCM_XMPU_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10Mstr
+ */
+#define XOCM_XMPU_CFG_R10_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A8UL )
+#define XOCM_XMPU_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10
+ */
+#define XOCM_XMPU_CFG_R10    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001ACUL )
+#define XOCM_XMPU_CFG_R10_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R10_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R10_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R10_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R10_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11Strt
+ */
+#define XOCM_XMPU_CFG_R11_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B0UL )
+#define XOCM_XMPU_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11End
+ */
+#define XOCM_XMPU_CFG_R11_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B4UL )
+#define XOCM_XMPU_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11Mstr
+ */
+#define XOCM_XMPU_CFG_R11_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B8UL )
+#define XOCM_XMPU_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11
+ */
+#define XOCM_XMPU_CFG_R11    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001BCUL )
+#define XOCM_XMPU_CFG_R11_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R11_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R11_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R11_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R11_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12Strt
+ */
+#define XOCM_XMPU_CFG_R12_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C0UL )
+#define XOCM_XMPU_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12End
+ */
+#define XOCM_XMPU_CFG_R12_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C4UL )
+#define XOCM_XMPU_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12Mstr
+ */
+#define XOCM_XMPU_CFG_R12_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C8UL )
+#define XOCM_XMPU_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12
+ */
+#define XOCM_XMPU_CFG_R12    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001CCUL )
+#define XOCM_XMPU_CFG_R12_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R12_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R12_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R12_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R12_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13Strt
+ */
+#define XOCM_XMPU_CFG_R13_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D0UL )
+#define XOCM_XMPU_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13End
+ */
+#define XOCM_XMPU_CFG_R13_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D4UL )
+#define XOCM_XMPU_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13Mstr
+ */
+#define XOCM_XMPU_CFG_R13_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D8UL )
+#define XOCM_XMPU_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13
+ */
+#define XOCM_XMPU_CFG_R13    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001DCUL )
+#define XOCM_XMPU_CFG_R13_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R13_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R13_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R13_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R13_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14Strt
+ */
+#define XOCM_XMPU_CFG_R14_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E0UL )
+#define XOCM_XMPU_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14End
+ */
+#define XOCM_XMPU_CFG_R14_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E4UL )
+#define XOCM_XMPU_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14Mstr
+ */
+#define XOCM_XMPU_CFG_R14_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E8UL )
+#define XOCM_XMPU_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14
+ */
+#define XOCM_XMPU_CFG_R14    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001ECUL )
+#define XOCM_XMPU_CFG_R14_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R14_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R14_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R14_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R14_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15Strt
+ */
+#define XOCM_XMPU_CFG_R15_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F0UL )
+#define XOCM_XMPU_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15End
+ */
+#define XOCM_XMPU_CFG_R15_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F4UL )
+#define XOCM_XMPU_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15Mstr
+ */
+#define XOCM_XMPU_CFG_R15_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F8UL )
+#define XOCM_XMPU_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15
+ */
+#define XOCM_XMPU_CFG_R15    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001FCUL )
+#define XOCM_XMPU_CFG_R15_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R15_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R15_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R15_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R15_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XOCM_XMPU_CFG_H__ */
diff --git a/src/Xilinx/include/xparameters.h b/src/Xilinx/include/xparameters.h
new file mode 100644
index 0000000..6184c91
--- /dev/null
+++ b/src/Xilinx/include/xparameters.h
@@ -0,0 +1,1497 @@
+#ifndef XPARAMETERS_H   /* prevent circular inclusions */
+#define XPARAMETERS_H   /* by using protection macros */
+
+/* Definition for CPU ID */
+#define XPAR_CPU_ID 0U
+
+/* Definitions for peripheral PSU_CORTEXR5_0 */
+#define XPAR_PSU_CORTEXR5_0_CPU_CLK_FREQ_HZ 499950000
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_CORTEXR5_0 */
+#define XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ 499950000
+
+
+/******************************************************************/
+
+ /* Definition for PSS REF CLK FREQUENCY */
+#define XPAR_PSU_PSS_REF_CLK_FREQ_HZ 33330000U
+
+#include "xparameters_ps.h"
+
+#define XPS_BOARD_ZCU102
+
+/******************************************************************/
+
+ /*Definitions for peripheral PSU_R5_DDR_1 */
+#define XPAR_PSU_R5_DDR_1_S_AXI_BASEADDR 0x800000000
+#define XPAR_PSU_R5_DDR_1_S_AXI_HIGHADDR 0x87fffffff
+
+
+/* Number of Fabric Resets */
+#define XPAR_NUM_FABRIC_RESETS 1
+
+#define STDIN_BASEADDRESS 0xFF000000
+#define STDOUT_BASEADDRESS 0xFF000000
+
+/******************************************************************/
+
+/* Platform specific definitions */
+#define PLATFORM_ZYNQMP
+ 
+/* Definitions for debug logic configuration in lockstep mode */
+#define LOCKSTEP_MODE_DEBUG 0U
+ 
+/* Definitions for sleep timer configuration */
+#define SLEEP_TIMER_BASEADDR XPAR_PSU_TTC_9_BASEADDR
+#define SLEEP_TIMER_FREQUENCY XPAR_PSU_TTC_9_TTC_CLK_FREQ_HZ
+#define XSLEEP_TTC_INSTANCE 3
+#define XSLEEP_TIMER_IS_DEFAULT_TIMER
+ 
+ 
+/******************************************************************/
+/* Definitions for driver AVBUF */
+#define XPAR_XAVBUF_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_DP */
+#define XPAR_PSU_DP_DEVICE_ID 0
+#define XPAR_PSU_DP_BASEADDR 0xFD4A0000
+#define XPAR_PSU_DP_HIGHADDR 0xFD4AFFFF
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_DP */
+#define XPAR_XAVBUF_0_DEVICE_ID XPAR_PSU_DP_DEVICE_ID
+#define XPAR_XAVBUF_0_BASEADDR 0xFD4A0000
+#define XPAR_XAVBUF_0_HIGHADDR 0xFD4AFFFF
+
+
+/******************************************************************/
+
+/* Definitions for driver AXIPMON */
+#define XPAR_XAXIPMON_NUM_INSTANCES 4U
+
+/* Definitions for peripheral PSU_APM_0 */
+#define XPAR_PSU_APM_0_DEVICE_ID 0U
+#define XPAR_PSU_APM_0_BASEADDR 0xFD0B0000U
+#define XPAR_PSU_APM_0_HIGHADDR 0xFD0BFFFFU
+#define XPAR_PSU_APM_0_GLOBAL_COUNT_WIDTH 32U
+#define XPAR_PSU_APM_0_METRICS_SAMPLE_COUNT_WIDTH 32U
+#define XPAR_PSU_APM_0_ENABLE_EVENT_COUNT 1U
+#define XPAR_PSU_APM_0_NUM_MONITOR_SLOTS 6U
+#define XPAR_PSU_APM_0_NUM_OF_COUNTERS 10U
+#define XPAR_PSU_APM_0_HAVE_SAMPLED_METRIC_CNT 1U
+#define XPAR_PSU_APM_0_ENABLE_EVENT_LOG 0U
+#define XPAR_PSU_APM_0_FIFO_AXIS_DEPTH 32U
+#define XPAR_PSU_APM_0_FIFO_AXIS_TDATA_WIDTH 56U
+#define XPAR_PSU_APM_0_FIFO_AXIS_TID_WIDTH 1U
+#define XPAR_PSU_APM_0_METRIC_COUNT_SCALE 1U
+#define XPAR_PSU_APM_0_ENABLE_ADVANCED 1U
+#define XPAR_PSU_APM_0_ENABLE_PROFILE 0U
+#define XPAR_PSU_APM_0_ENABLE_TRACE 0U
+#define XPAR_PSU_APM_0_S_AXI4_BASEADDR 0x00000000U
+#define XPAR_PSU_APM_0_S_AXI4_HIGHADDR 0x00000000U
+#define XPAR_PSU_APM_0_ENABLE_32BIT_FILTER_ID 1U
+
+
+/* Definitions for peripheral PSU_APM_1 */
+#define XPAR_PSU_APM_1_DEVICE_ID 1U
+#define XPAR_PSU_APM_1_BASEADDR 0xFFA00000U
+#define XPAR_PSU_APM_1_HIGHADDR 0xFFA0FFFFU
+#define XPAR_PSU_APM_1_GLOBAL_COUNT_WIDTH 32U
+#define XPAR_PSU_APM_1_METRICS_SAMPLE_COUNT_WIDTH 32U
+#define XPAR_PSU_APM_1_ENABLE_EVENT_COUNT 1U
+#define XPAR_PSU_APM_1_NUM_MONITOR_SLOTS 1U
+#define XPAR_PSU_APM_1_NUM_OF_COUNTERS 3U
+#define XPAR_PSU_APM_1_HAVE_SAMPLED_METRIC_CNT 1U
+#define XPAR_PSU_APM_1_ENABLE_EVENT_LOG 0U
+#define XPAR_PSU_APM_1_FIFO_AXIS_DEPTH 32U
+#define XPAR_PSU_APM_1_FIFO_AXIS_TDATA_WIDTH 56U
+#define XPAR_PSU_APM_1_FIFO_AXIS_TID_WIDTH 1U
+#define XPAR_PSU_APM_1_METRIC_COUNT_SCALE 1U
+#define XPAR_PSU_APM_1_ENABLE_ADVANCED 1U
+#define XPAR_PSU_APM_1_ENABLE_PROFILE 0U
+#define XPAR_PSU_APM_1_ENABLE_TRACE 0U
+#define XPAR_PSU_APM_1_S_AXI4_BASEADDR 0x00000000U
+#define XPAR_PSU_APM_1_S_AXI4_HIGHADDR 0x00000000U
+#define XPAR_PSU_APM_1_ENABLE_32BIT_FILTER_ID 1U
+
+
+/* Definitions for peripheral PSU_APM_2 */
+#define XPAR_PSU_APM_2_DEVICE_ID 2U
+#define XPAR_PSU_APM_2_BASEADDR 0xFFA10000U
+#define XPAR_PSU_APM_2_HIGHADDR 0xFFA1FFFFU
+#define XPAR_PSU_APM_2_GLOBAL_COUNT_WIDTH 32U
+#define XPAR_PSU_APM_2_METRICS_SAMPLE_COUNT_WIDTH 32U
+#define XPAR_PSU_APM_2_ENABLE_EVENT_COUNT 1U
+#define XPAR_PSU_APM_2_NUM_MONITOR_SLOTS 1U
+#define XPAR_PSU_APM_2_NUM_OF_COUNTERS 3U
+#define XPAR_PSU_APM_2_HAVE_SAMPLED_METRIC_CNT 1U
+#define XPAR_PSU_APM_2_ENABLE_EVENT_LOG 0U
+#define XPAR_PSU_APM_2_FIFO_AXIS_DEPTH 32U
+#define XPAR_PSU_APM_2_FIFO_AXIS_TDATA_WIDTH 56U
+#define XPAR_PSU_APM_2_FIFO_AXIS_TID_WIDTH 1U
+#define XPAR_PSU_APM_2_METRIC_COUNT_SCALE 1U
+#define XPAR_PSU_APM_2_ENABLE_ADVANCED 1U
+#define XPAR_PSU_APM_2_ENABLE_PROFILE 0U
+#define XPAR_PSU_APM_2_ENABLE_TRACE 0U
+#define XPAR_PSU_APM_2_S_AXI4_BASEADDR 0x00000000U
+#define XPAR_PSU_APM_2_S_AXI4_HIGHADDR 0x00000000U
+#define XPAR_PSU_APM_2_ENABLE_32BIT_FILTER_ID 1U
+
+
+/* Definitions for peripheral PSU_APM_5 */
+#define XPAR_PSU_APM_5_DEVICE_ID 3U
+#define XPAR_PSU_APM_5_BASEADDR 0xFD490000U
+#define XPAR_PSU_APM_5_HIGHADDR 0xFD49FFFFU
+#define XPAR_PSU_APM_5_GLOBAL_COUNT_WIDTH 32U
+#define XPAR_PSU_APM_5_METRICS_SAMPLE_COUNT_WIDTH 32U
+#define XPAR_PSU_APM_5_ENABLE_EVENT_COUNT 1U
+#define XPAR_PSU_APM_5_NUM_MONITOR_SLOTS 1U
+#define XPAR_PSU_APM_5_NUM_OF_COUNTERS 3U
+#define XPAR_PSU_APM_5_HAVE_SAMPLED_METRIC_CNT 1U
+#define XPAR_PSU_APM_5_ENABLE_EVENT_LOG 0U
+#define XPAR_PSU_APM_5_FIFO_AXIS_DEPTH 32U
+#define XPAR_PSU_APM_5_FIFO_AXIS_TDATA_WIDTH 56U
+#define XPAR_PSU_APM_5_FIFO_AXIS_TID_WIDTH 1U
+#define XPAR_PSU_APM_5_METRIC_COUNT_SCALE 1U
+#define XPAR_PSU_APM_5_ENABLE_ADVANCED 1U
+#define XPAR_PSU_APM_5_ENABLE_PROFILE 0U
+#define XPAR_PSU_APM_5_ENABLE_TRACE 0U
+#define XPAR_PSU_APM_5_S_AXI4_BASEADDR 0x00000000U
+#define XPAR_PSU_APM_5_S_AXI4_HIGHADDR 0x00000000U
+#define XPAR_PSU_APM_5_ENABLE_32BIT_FILTER_ID 1U
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_APM_0 */
+#define XPAR_AXIPMON_0_DEVICE_ID XPAR_PSU_APM_0_DEVICE_ID
+#define XPAR_AXIPMON_0_BASEADDR 0xFD0B0000U
+#define XPAR_AXIPMON_0_HIGHADDR 0xFD0BFFFFU
+#define XPAR_AXIPMON_0_GLOBAL_COUNT_WIDTH 32U
+#define XPAR_AXIPMON_0_METRICS_SAMPLE_COUNT_WIDTH 32U
+#define XPAR_AXIPMON_0_ENABLE_EVENT_COUNT 1U
+#define XPAR_AXIPMON_0_NUM_MONITOR_SLOTS 6U
+#define XPAR_AXIPMON_0_NUM_OF_COUNTERS 10U
+#define XPAR_AXIPMON_0_HAVE_SAMPLED_METRIC_CNT 1U
+#define XPAR_AXIPMON_0_ENABLE_EVENT_LOG 0U
+#define XPAR_AXIPMON_0_FIFO_AXIS_DEPTH 32U
+#define XPAR_AXIPMON_0_FIFO_AXIS_TDATA_WIDTH 56U
+#define XPAR_AXIPMON_0_FIFO_AXIS_TID_WIDTH 1U
+#define XPAR_AXIPMON_0_METRIC_COUNT_SCALE 1U
+#define XPAR_AXIPMON_0_ENABLE_ADVANCED 1U
+#define XPAR_AXIPMON_0_ENABLE_PROFILE 0U
+#define XPAR_AXIPMON_0_ENABLE_TRACE 0U
+#define XPAR_AXIPMON_0_S_AXI4_BASEADDR 0x00000000U
+#define XPAR_AXIPMON_0_S_AXI4_HIGHADDR 0x00000000U
+#define XPAR_AXIPMON_0_ENABLE_32BIT_FILTER_ID 1U
+
+/* Canonical definitions for peripheral PSU_APM_1 */
+#define XPAR_AXIPMON_1_DEVICE_ID XPAR_PSU_APM_1_DEVICE_ID
+#define XPAR_AXIPMON_1_BASEADDR 0xFFA00000U
+#define XPAR_AXIPMON_1_HIGHADDR 0xFFA0FFFFU
+#define XPAR_AXIPMON_1_GLOBAL_COUNT_WIDTH 32U
+#define XPAR_AXIPMON_1_METRICS_SAMPLE_COUNT_WIDTH 32U
+#define XPAR_AXIPMON_1_ENABLE_EVENT_COUNT 1U
+#define XPAR_AXIPMON_1_NUM_MONITOR_SLOTS 1U
+#define XPAR_AXIPMON_1_NUM_OF_COUNTERS 3U
+#define XPAR_AXIPMON_1_HAVE_SAMPLED_METRIC_CNT 1U
+#define XPAR_AXIPMON_1_ENABLE_EVENT_LOG 0U
+#define XPAR_AXIPMON_1_FIFO_AXIS_DEPTH 32U
+#define XPAR_AXIPMON_1_FIFO_AXIS_TDATA_WIDTH 56U
+#define XPAR_AXIPMON_1_FIFO_AXIS_TID_WIDTH 1U
+#define XPAR_AXIPMON_1_METRIC_COUNT_SCALE 1U
+#define XPAR_AXIPMON_1_ENABLE_ADVANCED 1U
+#define XPAR_AXIPMON_1_ENABLE_PROFILE 0U
+#define XPAR_AXIPMON_1_ENABLE_TRACE 0U
+#define XPAR_AXIPMON_1_S_AXI4_BASEADDR 0x00000000U
+#define XPAR_AXIPMON_1_S_AXI4_HIGHADDR 0x00000000U
+#define XPAR_AXIPMON_1_ENABLE_32BIT_FILTER_ID 1U
+
+/* Canonical definitions for peripheral PSU_APM_2 */
+#define XPAR_AXIPMON_2_DEVICE_ID XPAR_PSU_APM_2_DEVICE_ID
+#define XPAR_AXIPMON_2_BASEADDR 0xFFA10000U
+#define XPAR_AXIPMON_2_HIGHADDR 0xFFA1FFFFU
+#define XPAR_AXIPMON_2_GLOBAL_COUNT_WIDTH 32U
+#define XPAR_AXIPMON_2_METRICS_SAMPLE_COUNT_WIDTH 32U
+#define XPAR_AXIPMON_2_ENABLE_EVENT_COUNT 1U
+#define XPAR_AXIPMON_2_NUM_MONITOR_SLOTS 1U
+#define XPAR_AXIPMON_2_NUM_OF_COUNTERS 3U
+#define XPAR_AXIPMON_2_HAVE_SAMPLED_METRIC_CNT 1U
+#define XPAR_AXIPMON_2_ENABLE_EVENT_LOG 0U
+#define XPAR_AXIPMON_2_FIFO_AXIS_DEPTH 32U
+#define XPAR_AXIPMON_2_FIFO_AXIS_TDATA_WIDTH 56U
+#define XPAR_AXIPMON_2_FIFO_AXIS_TID_WIDTH 1U
+#define XPAR_AXIPMON_2_METRIC_COUNT_SCALE 1U
+#define XPAR_AXIPMON_2_ENABLE_ADVANCED 1U
+#define XPAR_AXIPMON_2_ENABLE_PROFILE 0U
+#define XPAR_AXIPMON_2_ENABLE_TRACE 0U
+#define XPAR_AXIPMON_2_S_AXI4_BASEADDR 0x00000000U
+#define XPAR_AXIPMON_2_S_AXI4_HIGHADDR 0x00000000U
+#define XPAR_AXIPMON_2_ENABLE_32BIT_FILTER_ID 1U
+
+/* Canonical definitions for peripheral PSU_APM_5 */
+#define XPAR_AXIPMON_3_DEVICE_ID XPAR_PSU_APM_5_DEVICE_ID
+#define XPAR_AXIPMON_3_BASEADDR 0xFD490000U
+#define XPAR_AXIPMON_3_HIGHADDR 0xFD49FFFFU
+#define XPAR_AXIPMON_3_GLOBAL_COUNT_WIDTH 32U
+#define XPAR_AXIPMON_3_METRICS_SAMPLE_COUNT_WIDTH 32U
+#define XPAR_AXIPMON_3_ENABLE_EVENT_COUNT 1U
+#define XPAR_AXIPMON_3_NUM_MONITOR_SLOTS 1U
+#define XPAR_AXIPMON_3_NUM_OF_COUNTERS 3U
+#define XPAR_AXIPMON_3_HAVE_SAMPLED_METRIC_CNT 1U
+#define XPAR_AXIPMON_3_ENABLE_EVENT_LOG 0U
+#define XPAR_AXIPMON_3_FIFO_AXIS_DEPTH 32U
+#define XPAR_AXIPMON_3_FIFO_AXIS_TDATA_WIDTH 56U
+#define XPAR_AXIPMON_3_FIFO_AXIS_TID_WIDTH 1U
+#define XPAR_AXIPMON_3_METRIC_COUNT_SCALE 1U
+#define XPAR_AXIPMON_3_ENABLE_ADVANCED 1U
+#define XPAR_AXIPMON_3_ENABLE_PROFILE 0U
+#define XPAR_AXIPMON_3_ENABLE_TRACE 0U
+#define XPAR_AXIPMON_3_S_AXI4_BASEADDR 0x00000000U
+#define XPAR_AXIPMON_3_S_AXI4_HIGHADDR 0x00000000U
+#define XPAR_AXIPMON_3_ENABLE_32BIT_FILTER_ID 1U
+
+
+/******************************************************************/
+
+/* Definitions for driver BRAM */
+#define XPAR_XBRAM_NUM_INSTANCES 1U
+
+/* Definitions for peripheral AXI_BRAM_CTRL_0 */
+#define XPAR_AXI_BRAM_CTRL_0_DEVICE_ID 0U
+#define XPAR_AXI_BRAM_CTRL_0_DATA_WIDTH 32U
+#define XPAR_AXI_BRAM_CTRL_0_ECC 0U
+#define XPAR_AXI_BRAM_CTRL_0_FAULT_INJECT 0U
+#define XPAR_AXI_BRAM_CTRL_0_CE_FAILING_REGISTERS 0U
+#define XPAR_AXI_BRAM_CTRL_0_UE_FAILING_REGISTERS 0U
+#define XPAR_AXI_BRAM_CTRL_0_ECC_STATUS_REGISTERS 0U
+#define XPAR_AXI_BRAM_CTRL_0_CE_COUNTER_WIDTH 0U
+#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_REGISTER 0U
+#define XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_RESET_VALUE 0U
+#define XPAR_AXI_BRAM_CTRL_0_WRITE_ACCESS 0U
+#define XPAR_AXI_BRAM_CTRL_0_S_AXI_BASEADDR 0xB0000000U
+#define XPAR_AXI_BRAM_CTRL_0_S_AXI_HIGHADDR 0xB0000FFFU
+#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_BASEADDR 0xFFFFFFFFU 
+#define XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_HIGHADDR 0xFFFFFFFFU 
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral AXI_BRAM_CTRL_0 */
+#define XPAR_BRAM_0_DEVICE_ID XPAR_AXI_BRAM_CTRL_0_DEVICE_ID
+#define XPAR_BRAM_0_DATA_WIDTH 32U
+#define XPAR_BRAM_0_ECC 0U
+#define XPAR_BRAM_0_FAULT_INJECT 0U
+#define XPAR_BRAM_0_CE_FAILING_REGISTERS 0U
+#define XPAR_BRAM_0_UE_FAILING_REGISTERS 0U
+#define XPAR_BRAM_0_ECC_STATUS_REGISTERS 0U
+#define XPAR_BRAM_0_CE_COUNTER_WIDTH 0U
+#define XPAR_BRAM_0_ECC_ONOFF_REGISTER 0U
+#define XPAR_BRAM_0_ECC_ONOFF_RESET_VALUE 0U
+#define XPAR_BRAM_0_WRITE_ACCESS 0U
+#define XPAR_BRAM_0_BASEADDR 0xB0000000U
+#define XPAR_BRAM_0_HIGHADDR 0xB0000FFFU
+
+
+/******************************************************************/
+
+/* Definitions for driver CANPS */
+#define XPAR_XCANPS_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_CAN_1 */
+#define XPAR_PSU_CAN_1_DEVICE_ID 0
+#define XPAR_PSU_CAN_1_BASEADDR 0xFF070000
+#define XPAR_PSU_CAN_1_HIGHADDR 0xFF07FFFF
+#define XPAR_PSU_CAN_1_CAN_CLK_FREQ_HZ 99990000
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_CAN_1 */
+#define XPAR_XCANPS_0_DEVICE_ID XPAR_PSU_CAN_1_DEVICE_ID
+#define XPAR_XCANPS_0_BASEADDR 0xFF070000
+#define XPAR_XCANPS_0_HIGHADDR 0xFF07FFFF
+#define XPAR_XCANPS_0_CAN_CLK_FREQ_HZ 99990000
+
+
+/******************************************************************/
+
+/* Definitions for driver CSUDMA */
+#define XPAR_XCSUDMA_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_CSUDMA */
+#define XPAR_PSU_CSUDMA_DEVICE_ID 0
+#define XPAR_PSU_CSUDMA_BASEADDR 0xFFC80000
+#define XPAR_PSU_CSUDMA_HIGHADDR 0xFFC9FFFF
+#define XPAR_PSU_CSUDMA_CSUDMA_CLK_FREQ_HZ 0
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_CSUDMA */
+#define XPAR_XCSUDMA_0_DEVICE_ID XPAR_PSU_CSUDMA_DEVICE_ID
+#define XPAR_XCSUDMA_0_BASEADDR 0xFFC80000
+#define XPAR_XCSUDMA_0_HIGHADDR 0xFFC9FFFF
+#define XPAR_XCSUDMA_0_CSUDMA_CLK_FREQ_HZ 0
+
+
+/******************************************************************/
+
+/* Definitions for driver DDRCPSU */
+#define XPAR_XDDRCPSU_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_DDRC_0 */
+#define XPAR_PSU_DDRC_0_DEVICE_ID 0
+#define XPAR_PSU_DDRC_0_BASEADDR 0xFD070000
+#define XPAR_PSU_DDRC_0_HIGHADDR 0xFD070FFF
+#define XPAR_PSU_DDRC_0_HAS_ECC 0
+#define XPAR_PSU_DDRC_0_DDRC_CLK_FREQ_HZ 533280000
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_DDRC_0 */
+#define XPAR_DDRCPSU_0_DEVICE_ID XPAR_PSU_DDRC_0_DEVICE_ID
+#define XPAR_DDRCPSU_0_BASEADDR 0xFD070000
+#define XPAR_DDRCPSU_0_HIGHADDR 0xFD070FFF
+#define XPAR_DDRCPSU_0_DDRC_CLK_FREQ_HZ 533280000
+
+
+/******************************************************************/
+
+/* Definitions for driver DPDMA */
+#define XPAR_XDPDMA_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_DPDMA */
+#define XPAR_PSU_DPDMA_DEVICE_ID 0
+#define XPAR_PSU_DPDMA_BASEADDR 0xFD4C0000
+#define XPAR_PSU_DPDMA_HIGHADDR 0xFD4CFFFF
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_DPDMA */
+#define XPAR_XDPDMA_0_DEVICE_ID XPAR_PSU_DPDMA_DEVICE_ID
+#define XPAR_XDPDMA_0_BASEADDR 0xFD4C0000
+#define XPAR_XDPDMA_0_HIGHADDR 0xFD4CFFFF
+
+
+/******************************************************************/
+
+/* Definitions for driver EMACPS */
+#define XPAR_XEMACPS_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_ETHERNET_3 */
+#define XPAR_PSU_ETHERNET_3_DEVICE_ID 0
+#define XPAR_PSU_ETHERNET_3_BASEADDR 0xFF0E0000
+#define XPAR_PSU_ETHERNET_3_HIGHADDR 0xFF0EFFFF
+#define XPAR_PSU_ETHERNET_3_ENET_CLK_FREQ_HZ 124987500
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_1000MBPS_DIV0 12
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_1000MBPS_DIV1 1
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_100MBPS_DIV0 60
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_100MBPS_DIV1 1
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_10MBPS_DIV0 60
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_10MBPS_DIV1 10
+#define XPAR_PSU_ETHERNET_3_ENET_TSU_CLK_FREQ_HZ 249975000
+
+
+/******************************************************************/
+
+#define XPAR_PSU_ETHERNET_3_IS_CACHE_COHERENT 0
+/* Canonical definitions for peripheral PSU_ETHERNET_3 */
+#define XPAR_XEMACPS_0_DEVICE_ID XPAR_PSU_ETHERNET_3_DEVICE_ID
+#define XPAR_XEMACPS_0_BASEADDR 0xFF0E0000
+#define XPAR_XEMACPS_0_HIGHADDR 0xFF0EFFFF
+#define XPAR_XEMACPS_0_ENET_CLK_FREQ_HZ 124987500
+#define XPAR_XEMACPS_0_ENET_SLCR_1000Mbps_DIV0 12
+#define XPAR_XEMACPS_0_ENET_SLCR_1000Mbps_DIV1 1
+#define XPAR_XEMACPS_0_ENET_SLCR_100Mbps_DIV0 60
+#define XPAR_XEMACPS_0_ENET_SLCR_100Mbps_DIV1 1
+#define XPAR_XEMACPS_0_ENET_SLCR_10Mbps_DIV0 60
+#define XPAR_XEMACPS_0_ENET_SLCR_10Mbps_DIV1 10
+#define XPAR_XEMACPS_0_ENET_TSU_CLK_FREQ_HZ 249975000
+
+
+/******************************************************************/
+
+
+/* Definitions for peripheral PSU_AFI_0 */
+#define XPAR_PSU_AFI_0_S_AXI_BASEADDR 0xFD360000
+#define XPAR_PSU_AFI_0_S_AXI_HIGHADDR 0xFD36FFFF
+
+
+/* Definitions for peripheral PSU_AFI_1 */
+#define XPAR_PSU_AFI_1_S_AXI_BASEADDR 0xFD370000
+#define XPAR_PSU_AFI_1_S_AXI_HIGHADDR 0xFD37FFFF
+
+
+/* Definitions for peripheral PSU_AFI_2 */
+#define XPAR_PSU_AFI_2_S_AXI_BASEADDR 0xFD380000
+#define XPAR_PSU_AFI_2_S_AXI_HIGHADDR 0xFD38FFFF
+
+
+/* Definitions for peripheral PSU_AFI_3 */
+#define XPAR_PSU_AFI_3_S_AXI_BASEADDR 0xFD390000
+#define XPAR_PSU_AFI_3_S_AXI_HIGHADDR 0xFD39FFFF
+
+
+/* Definitions for peripheral PSU_AFI_4 */
+#define XPAR_PSU_AFI_4_S_AXI_BASEADDR 0xFD3A0000
+#define XPAR_PSU_AFI_4_S_AXI_HIGHADDR 0xFD3AFFFF
+
+
+/* Definitions for peripheral PSU_AFI_5 */
+#define XPAR_PSU_AFI_5_S_AXI_BASEADDR 0xFD3B0000
+#define XPAR_PSU_AFI_5_S_AXI_HIGHADDR 0xFD3BFFFF
+
+
+/* Definitions for peripheral PSU_AFI_6 */
+#define XPAR_PSU_AFI_6_S_AXI_BASEADDR 0xFF9B0000
+#define XPAR_PSU_AFI_6_S_AXI_HIGHADDR 0xFF9BFFFF
+
+
+/* Definitions for peripheral PSU_APU */
+#define XPAR_PSU_APU_S_AXI_BASEADDR 0xFD5C0000
+#define XPAR_PSU_APU_S_AXI_HIGHADDR 0xFD5CFFFF
+
+
+/* Definitions for peripheral PSU_CCI_GPV */
+#define XPAR_PSU_CCI_GPV_S_AXI_BASEADDR 0xFD6E0000
+#define XPAR_PSU_CCI_GPV_S_AXI_HIGHADDR 0xFD6EFFFF
+
+
+/* Definitions for peripheral PSU_CCI_REG */
+#define XPAR_PSU_CCI_REG_S_AXI_BASEADDR 0xFD5E0000
+#define XPAR_PSU_CCI_REG_S_AXI_HIGHADDR 0xFD5EFFFF
+
+
+/* Definitions for peripheral PSU_CRL_APB */
+#define XPAR_PSU_CRL_APB_S_AXI_BASEADDR 0xFF5E0000
+#define XPAR_PSU_CRL_APB_S_AXI_HIGHADDR 0xFF85FFFF
+
+
+/* Definitions for peripheral PSU_CTRL_IPI */
+#define XPAR_PSU_CTRL_IPI_S_AXI_BASEADDR 0xFF380000
+#define XPAR_PSU_CTRL_IPI_S_AXI_HIGHADDR 0xFF3FFFFF
+
+
+/* Definitions for peripheral PSU_DDR_PHY */
+#define XPAR_PSU_DDR_PHY_S_AXI_BASEADDR 0xFD080000
+#define XPAR_PSU_DDR_PHY_S_AXI_HIGHADDR 0xFD08FFFF
+
+
+/* Definitions for peripheral PSU_DDR_QOS_CTRL */
+#define XPAR_PSU_DDR_QOS_CTRL_S_AXI_BASEADDR 0xFD090000
+#define XPAR_PSU_DDR_QOS_CTRL_S_AXI_HIGHADDR 0xFD09FFFF
+
+
+/* Definitions for peripheral PSU_DDR_XMPU0_CFG */
+#define XPAR_PSU_DDR_XMPU0_CFG_S_AXI_BASEADDR 0xFD000000
+#define XPAR_PSU_DDR_XMPU0_CFG_S_AXI_HIGHADDR 0xFD00FFFF
+
+
+/* Definitions for peripheral PSU_DDR_XMPU1_CFG */
+#define XPAR_PSU_DDR_XMPU1_CFG_S_AXI_BASEADDR 0xFD010000
+#define XPAR_PSU_DDR_XMPU1_CFG_S_AXI_HIGHADDR 0xFD01FFFF
+
+
+/* Definitions for peripheral PSU_DDR_XMPU2_CFG */
+#define XPAR_PSU_DDR_XMPU2_CFG_S_AXI_BASEADDR 0xFD020000
+#define XPAR_PSU_DDR_XMPU2_CFG_S_AXI_HIGHADDR 0xFD02FFFF
+
+
+/* Definitions for peripheral PSU_DDR_XMPU3_CFG */
+#define XPAR_PSU_DDR_XMPU3_CFG_S_AXI_BASEADDR 0xFD030000
+#define XPAR_PSU_DDR_XMPU3_CFG_S_AXI_HIGHADDR 0xFD03FFFF
+
+
+/* Definitions for peripheral PSU_DDR_XMPU4_CFG */
+#define XPAR_PSU_DDR_XMPU4_CFG_S_AXI_BASEADDR 0xFD040000
+#define XPAR_PSU_DDR_XMPU4_CFG_S_AXI_HIGHADDR 0xFD04FFFF
+
+
+/* Definitions for peripheral PSU_DDR_XMPU5_CFG */
+#define XPAR_PSU_DDR_XMPU5_CFG_S_AXI_BASEADDR 0xFD050000
+#define XPAR_PSU_DDR_XMPU5_CFG_S_AXI_HIGHADDR 0xFD05FFFF
+
+
+/* Definitions for peripheral PSU_EFUSE */
+#define XPAR_PSU_EFUSE_S_AXI_BASEADDR 0xFFCC0000
+#define XPAR_PSU_EFUSE_S_AXI_HIGHADDR 0xFFCCFFFF
+
+
+/* Definitions for peripheral PSU_FPD_GPV */
+#define XPAR_PSU_FPD_GPV_S_AXI_BASEADDR 0xFD700000
+#define XPAR_PSU_FPD_GPV_S_AXI_HIGHADDR 0xFD7FFFFF
+
+
+/* Definitions for peripheral PSU_FPD_SLCR */
+#define XPAR_PSU_FPD_SLCR_S_AXI_BASEADDR 0xFD610000
+#define XPAR_PSU_FPD_SLCR_S_AXI_HIGHADDR 0xFD68FFFF
+
+
+/* Definitions for peripheral PSU_FPD_SLCR_SECURE */
+#define XPAR_PSU_FPD_SLCR_SECURE_S_AXI_BASEADDR 0xFD690000
+#define XPAR_PSU_FPD_SLCR_SECURE_S_AXI_HIGHADDR 0xFD6CFFFF
+
+
+/* Definitions for peripheral PSU_FPD_XMPU_CFG */
+#define XPAR_PSU_FPD_XMPU_CFG_S_AXI_BASEADDR 0xFD5D0000
+#define XPAR_PSU_FPD_XMPU_CFG_S_AXI_HIGHADDR 0xFD5DFFFF
+
+
+/* Definitions for peripheral PSU_FPD_XMPU_SINK */
+#define XPAR_PSU_FPD_XMPU_SINK_S_AXI_BASEADDR 0xFD4F0000
+#define XPAR_PSU_FPD_XMPU_SINK_S_AXI_HIGHADDR 0xFD4FFFFF
+
+
+/* Definitions for peripheral PSU_GPU */
+#define XPAR_PSU_GPU_S_AXI_BASEADDR 0xFD4B0000
+#define XPAR_PSU_GPU_S_AXI_HIGHADDR 0xFD4BFFFF
+
+
+/* Definitions for peripheral PSU_IOU_SCNTR */
+#define XPAR_PSU_IOU_SCNTR_S_AXI_BASEADDR 0xFF250000
+#define XPAR_PSU_IOU_SCNTR_S_AXI_HIGHADDR 0xFF25FFFF
+
+
+/* Definitions for peripheral PSU_IOU_SCNTRS */
+#define XPAR_PSU_IOU_SCNTRS_S_AXI_BASEADDR 0xFF260000
+#define XPAR_PSU_IOU_SCNTRS_S_AXI_HIGHADDR 0xFF26FFFF
+
+
+/* Definitions for peripheral PSU_IOUSECURE_SLCR */
+#define XPAR_PSU_IOUSECURE_SLCR_S_AXI_BASEADDR 0xFF240000
+#define XPAR_PSU_IOUSECURE_SLCR_S_AXI_HIGHADDR 0xFF24FFFF
+
+
+/* Definitions for peripheral PSU_IOUSLCR_0 */
+#define XPAR_PSU_IOUSLCR_0_S_AXI_BASEADDR 0xFF180000
+#define XPAR_PSU_IOUSLCR_0_S_AXI_HIGHADDR 0xFF23FFFF
+
+
+/* Definitions for peripheral PSU_LPD_SLCR */
+#define XPAR_PSU_LPD_SLCR_S_AXI_BASEADDR 0xFF410000
+#define XPAR_PSU_LPD_SLCR_S_AXI_HIGHADDR 0xFF4AFFFF
+
+
+/* Definitions for peripheral PSU_LPD_SLCR_SECURE */
+#define XPAR_PSU_LPD_SLCR_SECURE_S_AXI_BASEADDR 0xFF4B0000
+#define XPAR_PSU_LPD_SLCR_SECURE_S_AXI_HIGHADDR 0xFF4DFFFF
+
+
+/* Definitions for peripheral PSU_LPD_XPPU */
+#define XPAR_PSU_LPD_XPPU_S_AXI_BASEADDR 0xFF980000
+#define XPAR_PSU_LPD_XPPU_S_AXI_HIGHADDR 0xFF99FFFF
+
+
+/* Definitions for peripheral PSU_LPD_XPPU_SINK */
+#define XPAR_PSU_LPD_XPPU_SINK_S_AXI_BASEADDR 0xFF9C0000
+#define XPAR_PSU_LPD_XPPU_SINK_S_AXI_HIGHADDR 0xFF9CFFFF
+
+
+/* Definitions for peripheral PSU_MBISTJTAG */
+#define XPAR_PSU_MBISTJTAG_S_AXI_BASEADDR 0xFFCF0000
+#define XPAR_PSU_MBISTJTAG_S_AXI_HIGHADDR 0xFFCFFFFF
+
+
+/* Definitions for peripheral PSU_MESSAGE_BUFFERS */
+#define XPAR_PSU_MESSAGE_BUFFERS_S_AXI_BASEADDR 0xFF990000
+#define XPAR_PSU_MESSAGE_BUFFERS_S_AXI_HIGHADDR 0xFF99FFFF
+
+
+/* Definitions for peripheral PSU_OCM */
+#define XPAR_PSU_OCM_S_AXI_BASEADDR 0xFF960000
+#define XPAR_PSU_OCM_S_AXI_HIGHADDR 0xFF96FFFF
+
+
+/* Definitions for peripheral PSU_OCM_RAM_0 */
+#define XPAR_PSU_OCM_RAM_0_S_AXI_BASEADDR 0xFFFC0000
+#define XPAR_PSU_OCM_RAM_0_S_AXI_HIGHADDR 0xFFFFFFFF
+
+
+/* Definitions for peripheral PSU_OCM_XMPU_CFG */
+#define XPAR_PSU_OCM_XMPU_CFG_S_AXI_BASEADDR 0xFFA70000
+#define XPAR_PSU_OCM_XMPU_CFG_S_AXI_HIGHADDR 0xFFA7FFFF
+
+
+/* Definitions for peripheral PSU_PCIE */
+#define XPAR_PSU_PCIE_S_AXI_BASEADDR 0xFD0E0000
+#define XPAR_PSU_PCIE_S_AXI_HIGHADDR 0xFD0EFFFF
+
+
+/* Definitions for peripheral PSU_PCIE_ATTRIB_0 */
+#define XPAR_PSU_PCIE_ATTRIB_0_S_AXI_BASEADDR 0xFD480000
+#define XPAR_PSU_PCIE_ATTRIB_0_S_AXI_HIGHADDR 0xFD48FFFF
+
+
+/* Definitions for peripheral PSU_PCIE_DMA */
+#define XPAR_PSU_PCIE_DMA_S_AXI_BASEADDR 0xFD0F0000
+#define XPAR_PSU_PCIE_DMA_S_AXI_HIGHADDR 0xFD0FFFFF
+
+
+/* Definitions for peripheral PSU_PCIE_HIGH1 */
+#define XPAR_PSU_PCIE_HIGH1_S_AXI_BASEADDR 0x600000000
+#define XPAR_PSU_PCIE_HIGH1_S_AXI_HIGHADDR 0x7FFFFFFFF
+
+
+/* Definitions for peripheral PSU_PCIE_HIGH2 */
+#define XPAR_PSU_PCIE_HIGH2_S_AXI_BASEADDR 0x8000000000
+#define XPAR_PSU_PCIE_HIGH2_S_AXI_HIGHADDR 0xBFFFFFFFFF
+
+
+/* Definitions for peripheral PSU_PCIE_LOW */
+#define XPAR_PSU_PCIE_LOW_S_AXI_BASEADDR 0xE0000000
+#define XPAR_PSU_PCIE_LOW_S_AXI_HIGHADDR 0xEFFFFFFF
+
+
+/* Definitions for peripheral PSU_PMU_GLOBAL_0 */
+#define XPAR_PSU_PMU_GLOBAL_0_S_AXI_BASEADDR 0xFFD80000
+#define XPAR_PSU_PMU_GLOBAL_0_S_AXI_HIGHADDR 0xFFDBFFFF
+
+
+/* Definitions for peripheral PSU_QSPI_LINEAR_0 */
+#define XPAR_PSU_QSPI_LINEAR_0_S_AXI_BASEADDR 0xC0000000
+#define XPAR_PSU_QSPI_LINEAR_0_S_AXI_HIGHADDR 0xDFFFFFFF
+
+
+/* Definitions for peripheral PSU_R5_0_ATCM */
+#define XPAR_PSU_R5_0_ATCM_S_AXI_BASEADDR 0x00000000
+#define XPAR_PSU_R5_0_ATCM_S_AXI_HIGHADDR 0x0000FFFF
+
+
+/* Definitions for peripheral PSU_R5_0_BTCM */
+#define XPAR_PSU_R5_0_BTCM_S_AXI_BASEADDR 0x00020000
+#define XPAR_PSU_R5_0_BTCM_S_AXI_HIGHADDR 0x0002FFFF
+
+
+/* Definitions for peripheral PSU_R5_DDR_0 */
+#define XPAR_PSU_R5_DDR_0_S_AXI_BASEADDR 0x00100000
+#define XPAR_PSU_R5_DDR_0_S_AXI_HIGHADDR 0x7FFFFFFF
+
+
+/* Definitions for peripheral PSU_R5_TCM_RAM_0 */
+#define XPAR_PSU_R5_TCM_RAM_0_S_AXI_BASEADDR 0x00000000
+#define XPAR_PSU_R5_TCM_RAM_0_S_AXI_HIGHADDR 0x0003FFFF
+
+
+/* Definitions for peripheral PSU_RPU */
+#define XPAR_PSU_RPU_S_AXI_BASEADDR 0xFF9A0000
+#define XPAR_PSU_RPU_S_AXI_HIGHADDR 0xFF9AFFFF
+
+
+/* Definitions for peripheral PSU_RSA */
+#define XPAR_PSU_RSA_S_AXI_BASEADDR 0xFFCE0000
+#define XPAR_PSU_RSA_S_AXI_HIGHADDR 0xFFCEFFFF
+
+
+/* Definitions for peripheral PSU_SATA */
+#define XPAR_PSU_SATA_S_AXI_BASEADDR 0xFD0C0000
+#define XPAR_PSU_SATA_S_AXI_HIGHADDR 0xFD0CFFFF
+
+
+/* Definitions for peripheral PSU_SERDES */
+#define XPAR_PSU_SERDES_S_AXI_BASEADDR 0xFD400000
+#define XPAR_PSU_SERDES_S_AXI_HIGHADDR 0xFD47FFFF
+
+
+/* Definitions for peripheral PSU_SIOU */
+#define XPAR_PSU_SIOU_S_AXI_BASEADDR 0xFD3D0000
+#define XPAR_PSU_SIOU_S_AXI_HIGHADDR 0xFD3DFFFF
+
+
+/* Definitions for peripheral PSU_SMMU_GPV */
+#define XPAR_PSU_SMMU_GPV_S_AXI_BASEADDR 0xFD800000
+#define XPAR_PSU_SMMU_GPV_S_AXI_HIGHADDR 0xFDFFFFFF
+
+
+/* Definitions for peripheral PSU_SMMU_REG */
+#define XPAR_PSU_SMMU_REG_S_AXI_BASEADDR 0xFD5F0000
+#define XPAR_PSU_SMMU_REG_S_AXI_HIGHADDR 0xFD5FFFFF
+
+
+/* Definitions for peripheral PSU_USB_0 */
+#define XPAR_PSU_USB_0_S_AXI_BASEADDR 0xFF9D0000
+#define XPAR_PSU_USB_0_S_AXI_HIGHADDR 0xFF9DFFFF
+
+
+/******************************************************************/
+
+/* Definitions for driver GPIO */
+#define XPAR_XGPIO_NUM_INSTANCES 1
+
+/* Definitions for peripheral AXI_GPIO_0 */
+#define XPAR_AXI_GPIO_0_BASEADDR 0xA0000000
+#define XPAR_AXI_GPIO_0_HIGHADDR 0xA0000FFF
+#define XPAR_AXI_GPIO_0_DEVICE_ID 0
+#define XPAR_AXI_GPIO_0_INTERRUPT_PRESENT 0
+#define XPAR_AXI_GPIO_0_IS_DUAL 0
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral AXI_GPIO_0 */
+#define XPAR_GPIO_0_BASEADDR 0xA0000000
+#define XPAR_GPIO_0_HIGHADDR 0xA0000FFF
+#define XPAR_GPIO_0_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID
+#define XPAR_GPIO_0_INTERRUPT_PRESENT 0
+#define XPAR_GPIO_0_IS_DUAL 0
+
+
+/******************************************************************/
+
+/* Definitions for driver GPIOPS */
+#define XPAR_XGPIOPS_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_GPIO_0 */
+#define XPAR_PSU_GPIO_0_DEVICE_ID 0
+#define XPAR_PSU_GPIO_0_BASEADDR 0xFF0A0000
+#define XPAR_PSU_GPIO_0_HIGHADDR 0xFF0AFFFF
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_GPIO_0 */
+#define XPAR_XGPIOPS_0_DEVICE_ID XPAR_PSU_GPIO_0_DEVICE_ID
+#define XPAR_XGPIOPS_0_BASEADDR 0xFF0A0000
+#define XPAR_XGPIOPS_0_HIGHADDR 0xFF0AFFFF
+
+
+/******************************************************************/
+
+/* Definitions for driver IICPS */
+#define XPAR_XIICPS_NUM_INSTANCES 2
+
+/* Definitions for peripheral PSU_I2C_0 */
+#define XPAR_PSU_I2C_0_DEVICE_ID 0
+#define XPAR_PSU_I2C_0_BASEADDR 0xFF020000
+#define XPAR_PSU_I2C_0_HIGHADDR 0xFF02FFFF
+#define XPAR_PSU_I2C_0_I2C_CLK_FREQ_HZ 99990000
+
+
+/* Definitions for peripheral PSU_I2C_1 */
+#define XPAR_PSU_I2C_1_DEVICE_ID 1
+#define XPAR_PSU_I2C_1_BASEADDR 0xFF030000
+#define XPAR_PSU_I2C_1_HIGHADDR 0xFF03FFFF
+#define XPAR_PSU_I2C_1_I2C_CLK_FREQ_HZ 99990000
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_I2C_0 */
+#define XPAR_XIICPS_0_DEVICE_ID XPAR_PSU_I2C_0_DEVICE_ID
+#define XPAR_XIICPS_0_BASEADDR 0xFF020000
+#define XPAR_XIICPS_0_HIGHADDR 0xFF02FFFF
+#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 99990000
+
+/* Canonical definitions for peripheral PSU_I2C_1 */
+#define XPAR_XIICPS_1_DEVICE_ID XPAR_PSU_I2C_1_DEVICE_ID
+#define XPAR_XIICPS_1_BASEADDR 0xFF030000
+#define XPAR_XIICPS_1_HIGHADDR 0xFF03FFFF
+#define XPAR_XIICPS_1_I2C_CLK_FREQ_HZ 99990000
+
+
+/******************************************************************/
+
+#define  XPAR_XIPIPSU_NUM_INSTANCES  1U
+
+/* Parameter definitions for peripheral psu_ipi_1 */
+#define  XPAR_PSU_IPI_1_DEVICE_ID  0U
+#define  XPAR_PSU_IPI_1_BASE_ADDRESS  0xFF310000U
+#define  XPAR_PSU_IPI_1_BIT_MASK  0x00000100U
+#define  XPAR_PSU_IPI_1_BUFFER_INDEX  0U
+#define  XPAR_PSU_IPI_1_INT_ID  65U
+
+/* Canonical definitions for peripheral psu_ipi_1 */
+#define  XPAR_XIPIPSU_0_DEVICE_ID	XPAR_PSU_IPI_1_DEVICE_ID
+#define  XPAR_XIPIPSU_0_BASE_ADDRESS	XPAR_PSU_IPI_1_BASE_ADDRESS
+#define  XPAR_XIPIPSU_0_BIT_MASK	XPAR_PSU_IPI_1_BIT_MASK
+#define  XPAR_XIPIPSU_0_BUFFER_INDEX	XPAR_PSU_IPI_1_BUFFER_INDEX
+#define  XPAR_XIPIPSU_0_INT_ID	XPAR_PSU_IPI_1_INT_ID
+
+#define  XPAR_XIPIPSU_NUM_TARGETS  7U
+
+#define  XPAR_PSU_IPI_0_BIT_MASK  0x00000001U
+#define  XPAR_PSU_IPI_0_BUFFER_INDEX  2U
+#define  XPAR_PSU_IPI_1_BIT_MASK  0x00000100U
+#define  XPAR_PSU_IPI_1_BUFFER_INDEX  0U
+#define  XPAR_PSU_IPI_2_BIT_MASK  0x00000200U
+#define  XPAR_PSU_IPI_2_BUFFER_INDEX  1U
+#define  XPAR_PSU_IPI_3_BIT_MASK  0x00010000U
+#define  XPAR_PSU_IPI_3_BUFFER_INDEX  7U
+#define  XPAR_PSU_IPI_4_BIT_MASK  0x00020000U
+#define  XPAR_PSU_IPI_4_BUFFER_INDEX  7U
+#define  XPAR_PSU_IPI_5_BIT_MASK  0x00040000U
+#define  XPAR_PSU_IPI_5_BUFFER_INDEX  7U
+#define  XPAR_PSU_IPI_6_BIT_MASK  0x00080000U
+#define  XPAR_PSU_IPI_6_BUFFER_INDEX  7U
+/* Target List for referring to processor IPI Targets */
+
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXA53_0_CH0_MASK  XPAR_PSU_IPI_0_BIT_MASK
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXA53_0_CH0_INDEX  0U
+
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXA53_1_CH0_MASK  XPAR_PSU_IPI_0_BIT_MASK
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXA53_1_CH0_INDEX  0U
+
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXA53_2_CH0_MASK  XPAR_PSU_IPI_0_BIT_MASK
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXA53_2_CH0_INDEX  0U
+
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXA53_3_CH0_MASK  XPAR_PSU_IPI_0_BIT_MASK
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXA53_3_CH0_INDEX  0U
+
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXR5_0_CH0_MASK  XPAR_PSU_IPI_1_BIT_MASK
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXR5_0_CH0_INDEX  1U
+
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXR5_1_CH0_MASK  XPAR_PSU_IPI_2_BIT_MASK
+#define  XPAR_XIPIPS_TARGET_PSU_CORTEXR5_1_CH0_INDEX  2U
+
+#define  XPAR_XIPIPS_TARGET_PSU_PMU_0_CH0_MASK  XPAR_PSU_IPI_3_BIT_MASK
+#define  XPAR_XIPIPS_TARGET_PSU_PMU_0_CH0_INDEX  3U
+#define  XPAR_XIPIPS_TARGET_PSU_PMU_0_CH1_MASK  XPAR_PSU_IPI_4_BIT_MASK
+#define  XPAR_XIPIPS_TARGET_PSU_PMU_0_CH1_INDEX  4U
+#define  XPAR_XIPIPS_TARGET_PSU_PMU_0_CH2_MASK  XPAR_PSU_IPI_5_BIT_MASK
+#define  XPAR_XIPIPS_TARGET_PSU_PMU_0_CH2_INDEX  5U
+#define  XPAR_XIPIPS_TARGET_PSU_PMU_0_CH3_MASK  XPAR_PSU_IPI_6_BIT_MASK
+#define  XPAR_XIPIPS_TARGET_PSU_PMU_0_CH3_INDEX  6U
+
+/* Definitions for driver QSPIPSU */
+#define XPAR_XQSPIPSU_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_QSPI_0 */
+#define XPAR_PSU_QSPI_0_DEVICE_ID 0
+#define XPAR_PSU_QSPI_0_BASEADDR 0xFF0F0000
+#define XPAR_PSU_QSPI_0_HIGHADDR 0xFF0FFFFF
+#define XPAR_PSU_QSPI_0_QSPI_CLK_FREQ_HZ 124987500
+#define XPAR_PSU_QSPI_0_QSPI_MODE 2
+#define XPAR_PSU_QSPI_0_QSPI_BUS_WIDTH 2
+
+
+/******************************************************************/
+
+#define XPAR_PSU_QSPI_0_IS_CACHE_COHERENT 0
+/* Canonical definitions for peripheral PSU_QSPI_0 */
+#define XPAR_XQSPIPSU_0_DEVICE_ID XPAR_PSU_QSPI_0_DEVICE_ID
+#define XPAR_XQSPIPSU_0_BASEADDR 0xFF0F0000
+#define XPAR_XQSPIPSU_0_HIGHADDR 0xFF0FFFFF
+#define XPAR_XQSPIPSU_0_QSPI_CLK_FREQ_HZ 124987500
+#define XPAR_XQSPIPSU_0_QSPI_MODE 2
+#define XPAR_XQSPIPSU_0_QSPI_BUS_WIDTH 2
+
+
+/******************************************************************/
+
+/* Definitions for driver RESETPS */
+#define XPAR_XRESETPS_NUM_INSTANCES 1U
+/* Definitions for peripheral RESETPS */
+#define XPAR_XRESETPS_DEVICE_ID 0
+#define XPAR_XRESETPS_BASEADDR 0xFFFFFFFFU
+
+/******************************************************************/
+
+/* Definitions for driver RTCPSU */
+#define XPAR_XRTCPSU_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_RTC */
+#define XPAR_PSU_RTC_DEVICE_ID 0
+#define XPAR_PSU_RTC_BASEADDR 0xFFA60000
+#define XPAR_PSU_RTC_HIGHADDR 0xFFA6FFFF
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_RTC */
+#define XPAR_XRTCPSU_0_DEVICE_ID XPAR_PSU_RTC_DEVICE_ID
+#define XPAR_XRTCPSU_0_BASEADDR 0xFFA60000
+#define XPAR_XRTCPSU_0_HIGHADDR 0xFFA6FFFF
+
+
+/******************************************************************/
+
+/* Definitions for driver SCUGIC */
+#define XPAR_XSCUGIC_NUM_INSTANCES 1U
+
+/* Definitions for peripheral PSU_RCPU_GIC */
+#define XPAR_PSU_RCPU_GIC_DEVICE_ID 0U
+#define XPAR_PSU_RCPU_GIC_BASEADDR 0xF9001000U
+#define XPAR_PSU_RCPU_GIC_HIGHADDR 0xF9001FFFU
+#define XPAR_PSU_RCPU_GIC_DIST_BASEADDR 0xF9000000U
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_RCPU_GIC */
+#define XPAR_SCUGIC_0_DEVICE_ID 0U
+#define XPAR_SCUGIC_0_CPU_BASEADDR 0xF9001000U
+#define XPAR_SCUGIC_0_CPU_HIGHADDR 0xF9001FFFU
+#define XPAR_SCUGIC_0_DIST_BASEADDR 0xF9000000U
+
+
+/******************************************************************/
+
+/* Definitions for driver SDPS */
+#define XPAR_XSDPS_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_SD_1 */
+#define XPAR_PSU_SD_1_DEVICE_ID 0
+#define XPAR_PSU_SD_1_BASEADDR 0xFF170000
+#define XPAR_PSU_SD_1_HIGHADDR 0xFF17FFFF
+#define XPAR_PSU_SD_1_SDIO_CLK_FREQ_HZ 187481250
+#define XPAR_PSU_SD_1_HAS_CD 1
+#define XPAR_PSU_SD_1_HAS_WP 1
+#define XPAR_PSU_SD_1_BUS_WIDTH 8
+#define XPAR_PSU_SD_1_MIO_BANK 1
+#define XPAR_PSU_SD_1_HAS_EMIO 0
+
+
+/******************************************************************/
+
+#define XPAR_PSU_SD_1_IS_CACHE_COHERENT 0
+/* Canonical definitions for peripheral PSU_SD_1 */
+#define XPAR_XSDPS_0_DEVICE_ID XPAR_PSU_SD_1_DEVICE_ID
+#define XPAR_XSDPS_0_BASEADDR 0xFF170000
+#define XPAR_XSDPS_0_HIGHADDR 0xFF17FFFF
+#define XPAR_XSDPS_0_SDIO_CLK_FREQ_HZ 187481250
+#define XPAR_XSDPS_0_HAS_CD 1
+#define XPAR_XSDPS_0_HAS_WP 1
+#define XPAR_XSDPS_0_BUS_WIDTH 8
+#define XPAR_XSDPS_0_MIO_BANK 1
+#define XPAR_XSDPS_0_HAS_EMIO 0
+
+
+/******************************************************************/
+
+/* Definitions for driver SYSMONPSU */
+#define XPAR_XSYSMONPSU_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_AMS */
+#define XPAR_PSU_AMS_DEVICE_ID 0
+#define XPAR_PSU_AMS_BASEADDR 0xFFA50000
+#define XPAR_PSU_AMS_HIGHADDR 0xFFA5FFFF
+
+
+/******************************************************************/
+
+#define XPAR_PSU_AMS_REF_FREQMHZ 49.995000
+/* Canonical definitions for peripheral PSU_AMS */
+#define XPAR_XSYSMONPSU_0_DEVICE_ID XPAR_PSU_AMS_DEVICE_ID
+#define XPAR_XSYSMONPSU_0_BASEADDR 0xFFA50000
+#define XPAR_XSYSMONPSU_0_HIGHADDR 0xFFA5FFFF
+
+
+/******************************************************************/
+
+/* Definitions for driver TTCPS */
+#define XPAR_XTTCPS_NUM_INSTANCES 12U
+
+/* Definitions for peripheral PSU_TTC_0 */
+#define XPAR_PSU_TTC_0_DEVICE_ID 0U
+#define XPAR_PSU_TTC_0_BASEADDR 0XFF110000U
+#define XPAR_PSU_TTC_0_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_0_TTC_CLK_CLKSRC 0U
+#define XPAR_PSU_TTC_1_DEVICE_ID 1U
+#define XPAR_PSU_TTC_1_BASEADDR 0XFF110004U
+#define XPAR_PSU_TTC_1_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_1_TTC_CLK_CLKSRC 0U
+#define XPAR_PSU_TTC_2_DEVICE_ID 2U
+#define XPAR_PSU_TTC_2_BASEADDR 0XFF110008U
+#define XPAR_PSU_TTC_2_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_2_TTC_CLK_CLKSRC 0U
+
+
+/* Definitions for peripheral PSU_TTC_1 */
+#define XPAR_PSU_TTC_3_DEVICE_ID 3U
+#define XPAR_PSU_TTC_3_BASEADDR 0XFF120000U
+#define XPAR_PSU_TTC_3_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_3_TTC_CLK_CLKSRC 0U
+#define XPAR_PSU_TTC_4_DEVICE_ID 4U
+#define XPAR_PSU_TTC_4_BASEADDR 0XFF120004U
+#define XPAR_PSU_TTC_4_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_4_TTC_CLK_CLKSRC 0U
+#define XPAR_PSU_TTC_5_DEVICE_ID 5U
+#define XPAR_PSU_TTC_5_BASEADDR 0XFF120008U
+#define XPAR_PSU_TTC_5_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_5_TTC_CLK_CLKSRC 0U
+
+
+/* Definitions for peripheral PSU_TTC_2 */
+#define XPAR_PSU_TTC_6_DEVICE_ID 6U
+#define XPAR_PSU_TTC_6_BASEADDR 0XFF130000U
+#define XPAR_PSU_TTC_6_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_6_TTC_CLK_CLKSRC 0U
+#define XPAR_PSU_TTC_7_DEVICE_ID 7U
+#define XPAR_PSU_TTC_7_BASEADDR 0XFF130004U
+#define XPAR_PSU_TTC_7_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_7_TTC_CLK_CLKSRC 0U
+#define XPAR_PSU_TTC_8_DEVICE_ID 8U
+#define XPAR_PSU_TTC_8_BASEADDR 0XFF130008U
+#define XPAR_PSU_TTC_8_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_8_TTC_CLK_CLKSRC 0U
+
+
+/* Definitions for peripheral PSU_TTC_3 */
+#define XPAR_PSU_TTC_9_DEVICE_ID 9U
+#define XPAR_PSU_TTC_9_BASEADDR 0XFF140000U
+#define XPAR_PSU_TTC_9_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_9_TTC_CLK_CLKSRC 0U
+#define XPAR_PSU_TTC_10_DEVICE_ID 10U
+#define XPAR_PSU_TTC_10_BASEADDR 0XFF140004U
+#define XPAR_PSU_TTC_10_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_10_TTC_CLK_CLKSRC 0U
+#define XPAR_PSU_TTC_11_DEVICE_ID 11U
+#define XPAR_PSU_TTC_11_BASEADDR 0XFF140008U
+#define XPAR_PSU_TTC_11_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_PSU_TTC_11_TTC_CLK_CLKSRC 0U
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_TTC_0 */
+#define XPAR_XTTCPS_0_DEVICE_ID XPAR_PSU_TTC_0_DEVICE_ID
+#define XPAR_XTTCPS_0_BASEADDR 0xFF110000U
+#define XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_0_TTC_CLK_CLKSRC 0U
+
+#define XPAR_XTTCPS_1_DEVICE_ID XPAR_PSU_TTC_1_DEVICE_ID
+#define XPAR_XTTCPS_1_BASEADDR 0xFF110004U
+#define XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_1_TTC_CLK_CLKSRC 0U
+
+#define XPAR_XTTCPS_2_DEVICE_ID XPAR_PSU_TTC_2_DEVICE_ID
+#define XPAR_XTTCPS_2_BASEADDR 0xFF110008U
+#define XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_2_TTC_CLK_CLKSRC 0U
+
+/* Canonical definitions for peripheral PSU_TTC_1 */
+#define XPAR_XTTCPS_3_DEVICE_ID XPAR_PSU_TTC_3_DEVICE_ID
+#define XPAR_XTTCPS_3_BASEADDR 0xFF120000U
+#define XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_3_TTC_CLK_CLKSRC 0U
+
+#define XPAR_XTTCPS_4_DEVICE_ID XPAR_PSU_TTC_4_DEVICE_ID
+#define XPAR_XTTCPS_4_BASEADDR 0xFF120004U
+#define XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_4_TTC_CLK_CLKSRC 0U
+
+#define XPAR_XTTCPS_5_DEVICE_ID XPAR_PSU_TTC_5_DEVICE_ID
+#define XPAR_XTTCPS_5_BASEADDR 0xFF120008U
+#define XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_5_TTC_CLK_CLKSRC 0U
+
+/* Canonical definitions for peripheral PSU_TTC_2 */
+#define XPAR_XTTCPS_6_DEVICE_ID XPAR_PSU_TTC_6_DEVICE_ID
+#define XPAR_XTTCPS_6_BASEADDR 0xFF130000U
+#define XPAR_XTTCPS_6_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_6_TTC_CLK_CLKSRC 0U
+
+#define XPAR_XTTCPS_7_DEVICE_ID XPAR_PSU_TTC_7_DEVICE_ID
+#define XPAR_XTTCPS_7_BASEADDR 0xFF130004U
+#define XPAR_XTTCPS_7_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_7_TTC_CLK_CLKSRC 0U
+
+#define XPAR_XTTCPS_8_DEVICE_ID XPAR_PSU_TTC_8_DEVICE_ID
+#define XPAR_XTTCPS_8_BASEADDR 0xFF130008U
+#define XPAR_XTTCPS_8_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_8_TTC_CLK_CLKSRC 0U
+
+/* Canonical definitions for peripheral PSU_TTC_3 */
+#define XPAR_XTTCPS_9_DEVICE_ID XPAR_PSU_TTC_9_DEVICE_ID
+#define XPAR_XTTCPS_9_BASEADDR 0xFF140000U
+#define XPAR_XTTCPS_9_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_9_TTC_CLK_CLKSRC 0U
+
+#define XPAR_XTTCPS_10_DEVICE_ID XPAR_PSU_TTC_10_DEVICE_ID
+#define XPAR_XTTCPS_10_BASEADDR 0xFF140004U
+#define XPAR_XTTCPS_10_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_10_TTC_CLK_CLKSRC 0U
+
+#define XPAR_XTTCPS_11_DEVICE_ID XPAR_PSU_TTC_11_DEVICE_ID
+#define XPAR_XTTCPS_11_BASEADDR 0xFF140008U
+#define XPAR_XTTCPS_11_TTC_CLK_FREQ_HZ 100000000U
+#define XPAR_XTTCPS_11_TTC_CLK_CLKSRC 0U
+
+
+/******************************************************************/
+
+/* Definitions for driver UARTPS */
+#define XPAR_XUARTPS_NUM_INSTANCES 2
+
+/* Definitions for peripheral PSU_UART_0 */
+#define XPAR_PSU_UART_0_DEVICE_ID 0
+#define XPAR_PSU_UART_0_BASEADDR 0xFF000000
+#define XPAR_PSU_UART_0_HIGHADDR 0xFF00FFFF
+#define XPAR_PSU_UART_0_UART_CLK_FREQ_HZ 99990000
+#define XPAR_PSU_UART_0_HAS_MODEM 0
+
+
+/* Definitions for peripheral PSU_UART_1 */
+#define XPAR_PSU_UART_1_DEVICE_ID 1
+#define XPAR_PSU_UART_1_BASEADDR 0xFF010000
+#define XPAR_PSU_UART_1_HIGHADDR 0xFF01FFFF
+#define XPAR_PSU_UART_1_UART_CLK_FREQ_HZ 99990000
+#define XPAR_PSU_UART_1_HAS_MODEM 0
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_UART_0 */
+#define XPAR_XUARTPS_0_DEVICE_ID XPAR_PSU_UART_0_DEVICE_ID
+#define XPAR_XUARTPS_0_BASEADDR 0xFF000000
+#define XPAR_XUARTPS_0_HIGHADDR 0xFF00FFFF
+#define XPAR_XUARTPS_0_UART_CLK_FREQ_HZ 99990000
+#define XPAR_XUARTPS_0_HAS_MODEM 0
+
+/* Canonical definitions for peripheral PSU_UART_1 */
+#define XPAR_XUARTPS_1_DEVICE_ID XPAR_PSU_UART_1_DEVICE_ID
+#define XPAR_XUARTPS_1_BASEADDR 0xFF010000
+#define XPAR_XUARTPS_1_HIGHADDR 0xFF01FFFF
+#define XPAR_XUARTPS_1_UART_CLK_FREQ_HZ 99990000
+#define XPAR_XUARTPS_1_HAS_MODEM 0
+
+
+/******************************************************************/
+
+/* Definitions for driver USBPSU */
+#define XPAR_XUSBPSU_NUM_INSTANCES 1
+
+/* Definitions for peripheral PSU_USB_XHCI_0 */
+#define XPAR_PSU_USB_XHCI_0_DEVICE_ID 0
+#define XPAR_PSU_USB_XHCI_0_BASEADDR 0xFE200000
+#define XPAR_PSU_USB_XHCI_0_HIGHADDR 0xFE20FFFF
+
+
+/******************************************************************/
+
+#define XPAR_PSU_USB_XHCI_0_IS_CACHE_COHERENT 0
+/* Canonical definitions for peripheral PSU_USB_XHCI_0 */
+#define XPAR_XUSBPSU_0_DEVICE_ID XPAR_PSU_USB_XHCI_0_DEVICE_ID
+#define XPAR_XUSBPSU_0_BASEADDR 0xFE200000
+#define XPAR_XUSBPSU_0_HIGHADDR 0xFE20FFFF
+
+
+/******************************************************************/
+
+/* Definitions for driver WDTPS */
+#define XPAR_XWDTPS_NUM_INSTANCES 3
+
+/* Definitions for peripheral PSU_CSU_WDT */
+#define XPAR_PSU_CSU_WDT_DEVICE_ID 0
+#define XPAR_PSU_CSU_WDT_BASEADDR 0xFFCB0000
+#define XPAR_PSU_CSU_WDT_HIGHADDR 0xFFCBFFFF
+#define XPAR_PSU_CSU_WDT_WDT_CLK_FREQ_HZ 100000000
+
+
+/* Definitions for peripheral PSU_WDT_0 */
+#define XPAR_PSU_WDT_0_DEVICE_ID 1
+#define XPAR_PSU_WDT_0_BASEADDR 0xFF150000
+#define XPAR_PSU_WDT_0_HIGHADDR 0xFF15FFFF
+#define XPAR_PSU_WDT_0_WDT_CLK_FREQ_HZ 99989998
+
+
+/* Definitions for peripheral PSU_WDT_1 */
+#define XPAR_PSU_WDT_1_DEVICE_ID 2
+#define XPAR_PSU_WDT_1_BASEADDR 0xFD4D0000
+#define XPAR_PSU_WDT_1_HIGHADDR 0xFD4DFFFF
+#define XPAR_PSU_WDT_1_WDT_CLK_FREQ_HZ 99989998
+
+
+/******************************************************************/
+
+/* Canonical definitions for peripheral PSU_CSU_WDT */
+#define XPAR_XWDTPS_0_DEVICE_ID XPAR_PSU_CSU_WDT_DEVICE_ID
+#define XPAR_XWDTPS_0_BASEADDR 0xFFCB0000
+#define XPAR_XWDTPS_0_HIGHADDR 0xFFCBFFFF
+#define XPAR_XWDTPS_0_WDT_CLK_FREQ_HZ 100000000
+
+/* Canonical definitions for peripheral PSU_WDT_0 */
+#define XPAR_XWDTPS_1_DEVICE_ID XPAR_PSU_WDT_0_DEVICE_ID
+#define XPAR_XWDTPS_1_BASEADDR 0xFF150000
+#define XPAR_XWDTPS_1_HIGHADDR 0xFF15FFFF
+#define XPAR_XWDTPS_1_WDT_CLK_FREQ_HZ 99989998
+
+/* Canonical definitions for peripheral PSU_WDT_1 */
+#define XPAR_XWDTPS_2_DEVICE_ID XPAR_PSU_WDT_1_DEVICE_ID
+#define XPAR_XWDTPS_2_BASEADDR 0xFD4D0000
+#define XPAR_XWDTPS_2_HIGHADDR 0xFD4DFFFF
+#define XPAR_XWDTPS_2_WDT_CLK_FREQ_HZ 99989998
+
+
+/******************************************************************/
+
+/* Definitions for driver ZDMA */
+#define XPAR_XZDMA_NUM_INSTANCES 16
+
+/* Definitions for peripheral PSU_ADMA_0 */
+#define XPAR_PSU_ADMA_0_DEVICE_ID 0
+#define XPAR_PSU_ADMA_0_BASEADDR 0xFFA80000
+#define XPAR_PSU_ADMA_0_DMA_MODE 1
+#define XPAR_PSU_ADMA_0_HIGHADDR 0xFFA8FFFF
+#define XPAR_PSU_ADMA_0_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_ADMA_1 */
+#define XPAR_PSU_ADMA_1_DEVICE_ID 1
+#define XPAR_PSU_ADMA_1_BASEADDR 0xFFA90000
+#define XPAR_PSU_ADMA_1_DMA_MODE 1
+#define XPAR_PSU_ADMA_1_HIGHADDR 0xFFA9FFFF
+#define XPAR_PSU_ADMA_1_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_ADMA_2 */
+#define XPAR_PSU_ADMA_2_DEVICE_ID 2
+#define XPAR_PSU_ADMA_2_BASEADDR 0xFFAA0000
+#define XPAR_PSU_ADMA_2_DMA_MODE 1
+#define XPAR_PSU_ADMA_2_HIGHADDR 0xFFAAFFFF
+#define XPAR_PSU_ADMA_2_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_ADMA_3 */
+#define XPAR_PSU_ADMA_3_DEVICE_ID 3
+#define XPAR_PSU_ADMA_3_BASEADDR 0xFFAB0000
+#define XPAR_PSU_ADMA_3_DMA_MODE 1
+#define XPAR_PSU_ADMA_3_HIGHADDR 0xFFABFFFF
+#define XPAR_PSU_ADMA_3_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_ADMA_4 */
+#define XPAR_PSU_ADMA_4_DEVICE_ID 4
+#define XPAR_PSU_ADMA_4_BASEADDR 0xFFAC0000
+#define XPAR_PSU_ADMA_4_DMA_MODE 1
+#define XPAR_PSU_ADMA_4_HIGHADDR 0xFFACFFFF
+#define XPAR_PSU_ADMA_4_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_ADMA_5 */
+#define XPAR_PSU_ADMA_5_DEVICE_ID 5
+#define XPAR_PSU_ADMA_5_BASEADDR 0xFFAD0000
+#define XPAR_PSU_ADMA_5_DMA_MODE 1
+#define XPAR_PSU_ADMA_5_HIGHADDR 0xFFADFFFF
+#define XPAR_PSU_ADMA_5_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_ADMA_6 */
+#define XPAR_PSU_ADMA_6_DEVICE_ID 6
+#define XPAR_PSU_ADMA_6_BASEADDR 0xFFAE0000
+#define XPAR_PSU_ADMA_6_DMA_MODE 1
+#define XPAR_PSU_ADMA_6_HIGHADDR 0xFFAEFFFF
+#define XPAR_PSU_ADMA_6_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_ADMA_7 */
+#define XPAR_PSU_ADMA_7_DEVICE_ID 7
+#define XPAR_PSU_ADMA_7_BASEADDR 0xFFAF0000
+#define XPAR_PSU_ADMA_7_DMA_MODE 1
+#define XPAR_PSU_ADMA_7_HIGHADDR 0xFFAFFFFF
+#define XPAR_PSU_ADMA_7_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_GDMA_0 */
+#define XPAR_PSU_GDMA_0_DEVICE_ID 8
+#define XPAR_PSU_GDMA_0_BASEADDR 0xFD500000
+#define XPAR_PSU_GDMA_0_DMA_MODE 0
+#define XPAR_PSU_GDMA_0_HIGHADDR 0xFD50FFFF
+#define XPAR_PSU_GDMA_0_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_GDMA_1 */
+#define XPAR_PSU_GDMA_1_DEVICE_ID 9
+#define XPAR_PSU_GDMA_1_BASEADDR 0xFD510000
+#define XPAR_PSU_GDMA_1_DMA_MODE 0
+#define XPAR_PSU_GDMA_1_HIGHADDR 0xFD51FFFF
+#define XPAR_PSU_GDMA_1_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_GDMA_2 */
+#define XPAR_PSU_GDMA_2_DEVICE_ID 10
+#define XPAR_PSU_GDMA_2_BASEADDR 0xFD520000
+#define XPAR_PSU_GDMA_2_DMA_MODE 0
+#define XPAR_PSU_GDMA_2_HIGHADDR 0xFD52FFFF
+#define XPAR_PSU_GDMA_2_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_GDMA_3 */
+#define XPAR_PSU_GDMA_3_DEVICE_ID 11
+#define XPAR_PSU_GDMA_3_BASEADDR 0xFD530000
+#define XPAR_PSU_GDMA_3_DMA_MODE 0
+#define XPAR_PSU_GDMA_3_HIGHADDR 0xFD53FFFF
+#define XPAR_PSU_GDMA_3_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_GDMA_4 */
+#define XPAR_PSU_GDMA_4_DEVICE_ID 12
+#define XPAR_PSU_GDMA_4_BASEADDR 0xFD540000
+#define XPAR_PSU_GDMA_4_DMA_MODE 0
+#define XPAR_PSU_GDMA_4_HIGHADDR 0xFD54FFFF
+#define XPAR_PSU_GDMA_4_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_GDMA_5 */
+#define XPAR_PSU_GDMA_5_DEVICE_ID 13
+#define XPAR_PSU_GDMA_5_BASEADDR 0xFD550000
+#define XPAR_PSU_GDMA_5_DMA_MODE 0
+#define XPAR_PSU_GDMA_5_HIGHADDR 0xFD55FFFF
+#define XPAR_PSU_GDMA_5_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_GDMA_6 */
+#define XPAR_PSU_GDMA_6_DEVICE_ID 14
+#define XPAR_PSU_GDMA_6_BASEADDR 0xFD560000
+#define XPAR_PSU_GDMA_6_DMA_MODE 0
+#define XPAR_PSU_GDMA_6_HIGHADDR 0xFD56FFFF
+#define XPAR_PSU_GDMA_6_ZDMA_CLK_FREQ_HZ 0
+
+
+/* Definitions for peripheral PSU_GDMA_7 */
+#define XPAR_PSU_GDMA_7_DEVICE_ID 15
+#define XPAR_PSU_GDMA_7_BASEADDR 0xFD570000
+#define XPAR_PSU_GDMA_7_DMA_MODE 0
+#define XPAR_PSU_GDMA_7_HIGHADDR 0xFD57FFFF
+#define XPAR_PSU_GDMA_7_ZDMA_CLK_FREQ_HZ 0
+
+
+/******************************************************************/
+
+#define XPAR_PSU_ADMA_0_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ADMA_1_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ADMA_2_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ADMA_3_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ADMA_4_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ADMA_5_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ADMA_6_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ADMA_7_IS_CACHE_COHERENT 0
+#define XPAR_PSU_GDMA_0_IS_CACHE_COHERENT 0
+#define XPAR_PSU_GDMA_1_IS_CACHE_COHERENT 0
+#define XPAR_PSU_GDMA_2_IS_CACHE_COHERENT 0
+#define XPAR_PSU_GDMA_3_IS_CACHE_COHERENT 0
+#define XPAR_PSU_GDMA_4_IS_CACHE_COHERENT 0
+#define XPAR_PSU_GDMA_5_IS_CACHE_COHERENT 0
+#define XPAR_PSU_GDMA_6_IS_CACHE_COHERENT 0
+#define XPAR_PSU_GDMA_7_IS_CACHE_COHERENT 0
+/* Canonical definitions for peripheral PSU_ADMA_0 */
+#define XPAR_XZDMA_0_DEVICE_ID XPAR_PSU_ADMA_0_DEVICE_ID
+#define XPAR_XZDMA_0_BASEADDR 0xFFA80000
+#define XPAR_XZDMA_0_DMA_MODE 1
+#define XPAR_XZDMA_0_HIGHADDR 0xFFA8FFFF
+#define XPAR_XZDMA_0_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_ADMA_1 */
+#define XPAR_XZDMA_1_DEVICE_ID XPAR_PSU_ADMA_1_DEVICE_ID
+#define XPAR_XZDMA_1_BASEADDR 0xFFA90000
+#define XPAR_XZDMA_1_DMA_MODE 1
+#define XPAR_XZDMA_1_HIGHADDR 0xFFA9FFFF
+#define XPAR_XZDMA_1_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_ADMA_2 */
+#define XPAR_XZDMA_2_DEVICE_ID XPAR_PSU_ADMA_2_DEVICE_ID
+#define XPAR_XZDMA_2_BASEADDR 0xFFAA0000
+#define XPAR_XZDMA_2_DMA_MODE 1
+#define XPAR_XZDMA_2_HIGHADDR 0xFFAAFFFF
+#define XPAR_XZDMA_2_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_ADMA_3 */
+#define XPAR_XZDMA_3_DEVICE_ID XPAR_PSU_ADMA_3_DEVICE_ID
+#define XPAR_XZDMA_3_BASEADDR 0xFFAB0000
+#define XPAR_XZDMA_3_DMA_MODE 1
+#define XPAR_XZDMA_3_HIGHADDR 0xFFABFFFF
+#define XPAR_XZDMA_3_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_ADMA_4 */
+#define XPAR_XZDMA_4_DEVICE_ID XPAR_PSU_ADMA_4_DEVICE_ID
+#define XPAR_XZDMA_4_BASEADDR 0xFFAC0000
+#define XPAR_XZDMA_4_DMA_MODE 1
+#define XPAR_XZDMA_4_HIGHADDR 0xFFACFFFF
+#define XPAR_XZDMA_4_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_ADMA_5 */
+#define XPAR_XZDMA_5_DEVICE_ID XPAR_PSU_ADMA_5_DEVICE_ID
+#define XPAR_XZDMA_5_BASEADDR 0xFFAD0000
+#define XPAR_XZDMA_5_DMA_MODE 1
+#define XPAR_XZDMA_5_HIGHADDR 0xFFADFFFF
+#define XPAR_XZDMA_5_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_ADMA_6 */
+#define XPAR_XZDMA_6_DEVICE_ID XPAR_PSU_ADMA_6_DEVICE_ID
+#define XPAR_XZDMA_6_BASEADDR 0xFFAE0000
+#define XPAR_XZDMA_6_DMA_MODE 1
+#define XPAR_XZDMA_6_HIGHADDR 0xFFAEFFFF
+#define XPAR_XZDMA_6_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_ADMA_7 */
+#define XPAR_XZDMA_7_DEVICE_ID XPAR_PSU_ADMA_7_DEVICE_ID
+#define XPAR_XZDMA_7_BASEADDR 0xFFAF0000
+#define XPAR_XZDMA_7_DMA_MODE 1
+#define XPAR_XZDMA_7_HIGHADDR 0xFFAFFFFF
+#define XPAR_XZDMA_7_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_GDMA_0 */
+#define XPAR_XZDMA_8_DEVICE_ID XPAR_PSU_GDMA_0_DEVICE_ID
+#define XPAR_XZDMA_8_BASEADDR 0xFD500000
+#define XPAR_XZDMA_8_DMA_MODE 0
+#define XPAR_XZDMA_8_HIGHADDR 0xFD50FFFF
+#define XPAR_XZDMA_8_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_GDMA_1 */
+#define XPAR_XZDMA_9_DEVICE_ID XPAR_PSU_GDMA_1_DEVICE_ID
+#define XPAR_XZDMA_9_BASEADDR 0xFD510000
+#define XPAR_XZDMA_9_DMA_MODE 0
+#define XPAR_XZDMA_9_HIGHADDR 0xFD51FFFF
+#define XPAR_XZDMA_9_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_GDMA_2 */
+#define XPAR_XZDMA_10_DEVICE_ID XPAR_PSU_GDMA_2_DEVICE_ID
+#define XPAR_XZDMA_10_BASEADDR 0xFD520000
+#define XPAR_XZDMA_10_DMA_MODE 0
+#define XPAR_XZDMA_10_HIGHADDR 0xFD52FFFF
+#define XPAR_XZDMA_10_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_GDMA_3 */
+#define XPAR_XZDMA_11_DEVICE_ID XPAR_PSU_GDMA_3_DEVICE_ID
+#define XPAR_XZDMA_11_BASEADDR 0xFD530000
+#define XPAR_XZDMA_11_DMA_MODE 0
+#define XPAR_XZDMA_11_HIGHADDR 0xFD53FFFF
+#define XPAR_XZDMA_11_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_GDMA_4 */
+#define XPAR_XZDMA_12_DEVICE_ID XPAR_PSU_GDMA_4_DEVICE_ID
+#define XPAR_XZDMA_12_BASEADDR 0xFD540000
+#define XPAR_XZDMA_12_DMA_MODE 0
+#define XPAR_XZDMA_12_HIGHADDR 0xFD54FFFF
+#define XPAR_XZDMA_12_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_GDMA_5 */
+#define XPAR_XZDMA_13_DEVICE_ID XPAR_PSU_GDMA_5_DEVICE_ID
+#define XPAR_XZDMA_13_BASEADDR 0xFD550000
+#define XPAR_XZDMA_13_DMA_MODE 0
+#define XPAR_XZDMA_13_HIGHADDR 0xFD55FFFF
+#define XPAR_XZDMA_13_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_GDMA_6 */
+#define XPAR_XZDMA_14_DEVICE_ID XPAR_PSU_GDMA_6_DEVICE_ID
+#define XPAR_XZDMA_14_BASEADDR 0xFD560000
+#define XPAR_XZDMA_14_DMA_MODE 0
+#define XPAR_XZDMA_14_HIGHADDR 0xFD56FFFF
+#define XPAR_XZDMA_14_ZDMA_CLK_FREQ_HZ 0
+
+/* Canonical definitions for peripheral PSU_GDMA_7 */
+#define XPAR_XZDMA_15_DEVICE_ID XPAR_PSU_GDMA_7_DEVICE_ID
+#define XPAR_XZDMA_15_BASEADDR 0xFD570000
+#define XPAR_XZDMA_15_DMA_MODE 0
+#define XPAR_XZDMA_15_HIGHADDR 0xFD57FFFF
+#define XPAR_XZDMA_15_ZDMA_CLK_FREQ_HZ 0
+
+
+/******************************************************************/
+
+/* Xilinx FAT File System Library (XilFFs) User Settings */
+#define FILE_SYSTEM_INTERFACE_SD
+#define FILE_SYSTEM_READ_ONLY
+#define FILE_SYSTEM_NUM_LOGIC_VOL 2
+#define FILE_SYSTEM_USE_STRFUNC 0
+#define FILE_SYSTEM_SET_FS_RPATH 0
+#define FILE_SYSTEM_WORD_ACCESS
+#define XPAR_XILPM_ENABLED
+#endif  /* end of protection macro */
diff --git a/src/Xilinx/include/xparameters_ps.h b/src/Xilinx/include/xparameters_ps.h
new file mode 100644
index 0000000..260c4d5
--- /dev/null
+++ b/src/Xilinx/include/xparameters_ps.h
@@ -0,0 +1,346 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xparameters_ps.h
+*
+* @addtogroup r5_peripheral_definitions Cortex R5 peripheral definitions
+*
+* The xparameters_ps.h file contains the canonical definitions and constant
+* declarations for peripherals within hardblock, attached to the ARM Cortex R5
+* core. These definitions can be used by drivers or applications to access the
+* peripherals.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00  pkp  	02/29/14 Initial version
+* 6.0   mus     08/18/16 Defined ARMR5 flag
+* 

+*
+******************************************************************************/
+
+#ifndef XPARAMETERS_PS_H_
+#define XPARAMETERS_PS_H_
+
+#ifndef ARMR5
+#define ARMR5 ARMR5
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock
+ */
+
+/* Canonical definitions for DDR MEMORY */
+#define XPAR_DDR_MEM_BASEADDR		0x00000000U
+#define XPAR_DDR_MEM_HIGHADDR		0x3FFFFFFFU
+
+/* Canonical definitions for Interrupts  */
+#define XPAR_XUARTPS_0_INTR		XPS_UART0_INT_ID
+#define XPAR_XUARTPS_1_INTR		XPS_UART1_INT_ID
+#define XPAR_XIICPS_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_XIICPS_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_XSPIPS_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_XSPIPS_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_XCANPS_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_XCANPS_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_XGPIOPS_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_XEMACPS_0_INTR		XPS_GEM0_INT_ID
+#define XPAR_XEMACPS_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_XEMACPS_1_INTR		XPS_GEM1_INT_ID
+#define XPAR_XEMACPS_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_XEMACPS_2_INTR		XPS_GEM2_INT_ID
+#define XPAR_XEMACPS_2_WAKE_INTR	XPS_GEM2_WAKE_INT_ID
+#define XPAR_XEMACPS_3_INTR		XPS_GEM3_INT_ID
+#define XPAR_XEMACPS_3_WAKE_INTR	XPS_GEM3_WAKE_INT_ID
+#define XPAR_XSDIOPS_0_INTR		XPS_SDIO0_INT_ID
+#define XPAR_XQSPIPS_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_XSDIOPS_1_INTR		XPS_SDIO1_INT_ID
+#define XPAR_XWDTPS_0_INTR		XPS_CSU_WDT_INT_ID
+#define XPAR_XWDTPS_1_INTR		XPS_LPD_SWDT_INT_ID
+#define XPAR_XWDTPS_2_INTR		XPS_FPD_SWDT_INT_ID
+#define XPAR_XDCFG_0_INTR		XPS_DVC_INT_ID
+#define XPAR_XTTCPS_0_INTR		XPS_TTC0_0_INT_ID
+#define XPAR_XTTCPS_1_INTR		XPS_TTC0_1_INT_ID
+#define XPAR_XTTCPS_2_INTR		XPS_TTC0_2_INT_ID
+#define XPAR_XTTCPS_3_INTR		XPS_TTC1_0_INT_ID
+#define XPAR_XTTCPS_4_INTR		XPS_TTC1_1_INT_ID
+#define XPAR_XTTCPS_5_INTR		XPS_TTC1_2_INT_ID
+#define XPAR_XTTCPS_6_INTR		XPS_TTC2_0_INT_ID
+#define XPAR_XTTCPS_7_INTR		XPS_TTC2_1_INT_ID
+#define XPAR_XTTCPS_8_INTR		XPS_TTC2_2_INT_ID
+#define XPAR_XTTCPS_9_INTR		XPS_TTC3_0_INT_ID
+#define XPAR_XTTCPS_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_XTTCPS_11_INTR		XPS_TTC3_2_INT_ID
+#define XPAR_XNANDPS8_0_INTR        	XPS_NAND_INT_ID
+#define XPAR_XADMAPS_0_INTR 		XPS_ADMA_CH0_INT_ID
+#define XPAR_XADMAPS_1_INTR 		XPS_ADMA_CH1_INT_ID
+#define XPAR_XADMAPS_2_INTR		XPS_ADMA_CH2_INT_ID
+#define XPAR_XADMAPS_3_INTR 		XPS_ADMA_CH3_INT_ID
+#define XPAR_XADMAPS_4_INTR		XPS_ADMA_CH4_INT_ID
+#define XPAR_XADMAPS_5_INTR 		XPS_ADMA_CH5_INT_ID
+#define XPAR_XADMAPS_6_INTR 		XPS_ADMA_CH6_INT_ID
+#define XPAR_XADMAPS_7_INTR 		XPS_ADMA_CH7_INT_ID
+#define XPAR_XCSUDMA_INTR 		XPS_CSU_DMA_INT_ID
+#define XPAR_PSU_ADMA_0_INTR 		XPS_ADMA_CH0_INT_ID
+#define XPAR_PSU_ADMA_1_INTR 		XPS_ADMA_CH1_INT_ID
+#define XPAR_PSU_ADMA_2_INTR		XPS_ADMA_CH2_INT_ID
+#define XPAR_PSU_ADMA_3_INTR 		XPS_ADMA_CH3_INT_ID
+#define XPAR_PSU_ADMA_4_INTR		XPS_ADMA_CH4_INT_ID
+#define XPAR_PSU_ADMA_5_INTR 		XPS_ADMA_CH5_INT_ID
+#define XPAR_PSU_ADMA_6_INTR 		XPS_ADMA_CH6_INT_ID
+#define XPAR_PSU_ADMA_7_INTR 		XPS_ADMA_CH7_INT_ID
+#define XPAR_PSU_CSUDMA_INTR 		XPS_CSU_DMA_INT_ID
+#define XPAR_XMPU_LPD_INTR 		XPS_XMPU_LPD_INT_ID
+#define XPAR_XZDMAPS_0_INTR		XPS_ZDMA_CH0_INT_ID
+#define XPAR_XZDMAPS_1_INTR		XPS_ZDMA_CH1_INT_ID
+#define XPAR_XZDMAPS_2_INTR 		XPS_ZDMA_CH2_INT_ID
+#define XPAR_XZDMAPS_3_INTR 		XPS_ZDMA_CH3_INT_ID
+#define XPAR_XZDMAPS_4_INTR		XPS_ZDMA_CH4_INT_ID
+#define XPAR_XZDMAPS_5_INTR 		XPS_ZDMA_CH5_INT_ID
+#define XPAR_XZDMAPS_6_INTR 		XPS_ZDMA_CH6_INT_ID
+#define XPAR_XZDMAPS_7_INTR 		XPS_ZDMA_CH7_INT_ID
+#define XPAR_PSU_GDMA_0_INTR		XPS_ZDMA_CH0_INT_ID
+#define XPAR_PSU_GDMA_1_INTR		XPS_ZDMA_CH1_INT_ID
+#define XPAR_PSU_GDMA_2_INTR 		XPS_ZDMA_CH2_INT_ID
+#define XPAR_PSU_GDMA_3_INTR 		XPS_ZDMA_CH3_INT_ID
+#define XPAR_PSU_GDMA_4_INTR		XPS_ZDMA_CH4_INT_ID
+#define XPAR_PSU_GDMA_5_INTR 		XPS_ZDMA_CH5_INT_ID
+#define XPAR_PSU_GDMA_6_INTR 		XPS_ZDMA_CH6_INT_ID
+#define XPAR_PSU_GDMA_7_INTR 		XPS_ZDMA_CH7_INT_ID
+#define XPAR_XMPU_FPD_INTR 		XPS_XMPU_FPD_INT_ID
+#define XPAR_XCCI_FPD_INTR 		XPS_FPD_CCI_INT_ID
+#define XPAR_XSMMU_FPD_INTR 		XPS_FPD_SMMU_INT_ID
+#define XPAR_XUSBPS_0_INTR		XPS_USB3_0_ENDPT_INT_ID
+#define XPAR_XUSBPS_1_INTR		XPS_USB3_1_ENDPT_INT_ID
+#define	XPAR_XRTCPSU_ALARM_INTR 	XPS_RTC_ALARM_INT_ID
+#define	XPAR_XRTCPSU_SECONDS_INTR	XPS_RTC_SEC_INT_ID
+#define XPAR_XAPMPS_0_INTR		XPS_APM0_INT_ID
+#define XPAR_XAPMPS_1_INTR		XPS_APM1_INT_ID
+#define XPAR_XAPMPS_2_INTR		XPS_APM2_INT_ID
+#define XPAR_XAPMPS_5_INTR		XPS_APM5_INT_ID
+#define XPAR_XSYSMONPSU_INTR		XPS_AMS_INT_ID
+
+/* Canonical definitions for SCU GIC */
+#define XPAR_SCUGIC_NUM_INSTANCES	1U
+#define XPAR_SCUGIC_SINGLE_DEVICE_ID	0U
+#define XPAR_SCUGIC_CPU_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00001000U)
+#define XPAR_SCUGIC_DIST_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00002000U)
+#define XPAR_SCUGIC_ACK_BEFORE		0U
+
+#define XPAR_CPU_CORTEXR5_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ
+
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock. These have been put for bacwards compatibilty
+ */
+
+#define XPS_SYS_CTRL_BASEADDR	0xFF180000U
+#define XPS_SCU_PERIPH_BASE		0xF9000000U
+
+
+/* Shared Peripheral Interrupts (SPI) */
+#define XPS_FPGA0_INT_ID		121U
+#define XPS_FPGA1_INT_ID		122U
+#define XPS_FPGA2_INT_ID		123U
+#define XPS_FPGA3_INT_ID		124U
+#define XPS_FPGA4_INT_ID		125U
+#define XPS_FPGA5_INT_ID		126U
+#define XPS_FPGA6_INT_ID		127U
+#define XPS_FPGA7_INT_ID		128U
+#define XPS_FPGA8_INT_ID		136U
+#define XPS_FPGA9_INT_ID		137U
+#define XPS_FPGA10_INT_ID		138U
+#define XPS_FPGA11_INT_ID		139U
+#define XPS_FPGA12_INT_ID		140U
+#define XPS_FPGA13_INT_ID		141U
+#define XPS_FPGA14_INT_ID		142U
+#define XPS_FPGA15_INT_ID		143U
+
+/* Updated Interrupt-IDs */
+#define XPS_OCMINTR_INT_ID		(10U + 32U)
+#define XPS_NAND_INT_ID        		(14U + 32U)
+#define XPS_QSPI_INT_ID			(15U + 32U)
+#define XPS_GPIO_INT_ID			(16U + 32U)
+#define XPS_I2C0_INT_ID			(17U + 32U)
+#define XPS_I2C1_INT_ID			(18U + 32U)
+#define XPS_SPI0_INT_ID			(19U + 32U)
+#define XPS_SPI1_INT_ID			(20U + 32U)
+#define XPS_UART0_INT_ID		(21U + 32U)
+#define XPS_UART1_INT_ID		(22U + 32U)
+#define XPS_CAN0_INT_ID			(23U + 32U)
+#define XPS_CAN1_INT_ID			(24U + 32U)
+#define	XPS_RTC_ALARM_INT_ID 	(26U + 32U)
+#define	XPS_RTC_SEC_INT_ID	 	(27U + 32U)
+#define XPS_LPD_SWDT_INT_ID		(52U + 32U)
+#define XPS_CSU_WDT_INT_ID	    (53U + 32U)
+#define XPS_FPD_SWDT_INT_ID		(113U + 32U)
+#define XPS_TTC0_0_INT_ID		(36U + 32U)
+#define XPS_TTC0_1_INT_ID		(37U + 32U)
+#define XPS_TTC0_2_INT_ID 		(38U + 32U)
+#define XPS_TTC1_0_INT_ID		(39U + 32U)
+#define XPS_TTC1_1_INT_ID		(40U + 32U)
+#define XPS_TTC1_2_INT_ID		(41U + 32U)
+#define XPS_TTC2_0_INT_ID		(42U + 32U)
+#define XPS_TTC2_1_INT_ID		(43U + 32U)
+#define XPS_TTC2_2_INT_ID		(44U + 32U)
+#define XPS_TTC3_0_INT_ID		(45U + 32U)
+#define XPS_TTC3_1_INT_ID		(46U + 32U)
+#define XPS_TTC3_2_INT_ID		(47U + 32U)
+#define XPS_SDIO0_INT_ID		(48U + 32U)
+#define XPS_SDIO1_INT_ID		(49U + 32U)
+#define XPS_AMS_INT_ID			(56U + 32U)
+#define XPS_GEM0_INT_ID			(57U + 32U)
+#define XPS_GEM0_WAKE_INT_ID		(58U + 32U)
+#define XPS_GEM1_INT_ID			(59U + 32U)
+#define XPS_GEM1_WAKE_INT_ID		(60U + 32U)
+#define XPS_GEM2_INT_ID			(61U + 32U)
+#define XPS_GEM2_WAKE_INT_ID		(62U + 32U)
+#define XPS_GEM3_INT_ID			(63U + 32U)
+#define XPS_GEM3_WAKE_INT_ID		(64U + 32U)
+#define XPS_USB3_0_ENDPT_INT_ID		(65U + 32U)
+#define XPS_USB3_1_ENDPT_INT_ID		(70U + 32U)
+#define XPS_ADMA_CH0_INT_ID		(77U + 32U)
+#define XPS_ADMA_CH1_INT_ID		(78U + 32U)
+#define XPS_ADMA_CH2_INT_ID		(79U + 32U)
+#define XPS_ADMA_CH3_INT_ID		(80U + 32U)
+#define XPS_ADMA_CH4_INT_ID		(81U + 32U)
+#define XPS_ADMA_CH5_INT_ID		(82U + 32U)
+#define XPS_ADMA_CH6_INT_ID		(83U + 32U)
+#define XPS_ADMA_CH7_INT_ID		(84U + 32U)
+#define XPS_CSU_DMA_INT_ID		(86U + 32U)
+#define XPS_XMPU_LPD_INT_ID		(88U + 32U)
+#define XPS_ZDMA_CH0_INT_ID		(124U + 32U)
+#define XPS_ZDMA_CH1_INT_ID		(125U + 32U)
+#define XPS_ZDMA_CH2_INT_ID		(126U + 32U)
+#define XPS_ZDMA_CH3_INT_ID		(127U + 32U)
+#define XPS_ZDMA_CH4_INT_ID		(128U + 32U)
+#define XPS_ZDMA_CH5_INT_ID		(129U + 32U)
+#define XPS_ZDMA_CH6_INT_ID		(130U + 32U)
+#define XPS_ZDMA_CH7_INT_ID		(131U + 32U)
+#define XPS_XMPU_FPD_INT_ID		(134U + 32U)
+#define XPS_FPD_CCI_INT_ID		(154U + 32U)
+#define XPS_FPD_SMMU_INT_ID		(155U + 32U)
+#define XPS_APM0_INT_ID		(123U + 32U)
+#define XPS_APM1_INT_ID		(25U + 32U)
+#define XPS_APM2_INT_ID		(25U + 32U)
+#define XPS_APM5_INT_ID		(123U + 32U)
+
+/* REDEFINES for TEST APP */
+#define XPAR_PSU_UART_0_INTR        XPS_UART0_INT_ID
+#define XPAR_PSU_UART_1_INTR        XPS_UART1_INT_ID
+#define XPAR_PSU_USB_0_INTR     XPS_USB0_INT_ID
+#define XPAR_PSU_USB_1_INTR     XPS_USB1_INT_ID
+#define XPAR_PSU_I2C_0_INTR     XPS_I2C0_INT_ID
+#define XPAR_PSU_I2C_1_INTR     XPS_I2C1_INT_ID
+#define XPAR_PSU_SPI_0_INTR     XPS_SPI0_INT_ID
+#define XPAR_PSU_SPI_1_INTR     XPS_SPI1_INT_ID
+#define XPAR_PSU_CAN_0_INTR     XPS_CAN0_INT_ID
+#define XPAR_PSU_CAN_1_INTR     XPS_CAN1_INT_ID
+#define XPAR_PSU_GPIO_0_INTR        XPS_GPIO_INT_ID
+#define XPAR_PSU_ETHERNET_0_INTR    XPS_GEM0_INT_ID
+#define XPAR_PSU_ETHERNET_0_WAKE_INTR   XPS_GEM0_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_1_INTR    XPS_GEM1_INT_ID
+#define XPAR_PSU_ETHERNET_1_WAKE_INTR   XPS_GEM1_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_2_INTR    XPS_GEM2_INT_ID
+#define XPAR_PSU_ETHERNET_2_WAKE_INTR   XPS_GEM2_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_3_INTR    XPS_GEM3_INT_ID
+#define XPAR_PSU_ETHERNET_3_WAKE_INTR   XPS_GEM3_WAKE_INT_ID
+#define XPAR_PSU_QSPI_0_INTR        XPS_QSPI_INT_ID
+#define XPAR_PSU_WDT_0_INTR    		XPS_LPD_SWDT_INT_ID
+#define XPAR_PSU_WDT_1_INTR     	XPS_FPD_SWDT_INT_ID
+#define XPAR_PSU_XADC_0_INTR        XPS_SYSMON_INT_ID
+#define XPAR_PSU_TTC_0_INTR         XPS_TTC0_0_INT_ID
+#define XPAR_PSU_TTC_1_INTR         XPS_TTC0_1_INT_ID
+#define XPAR_PSU_TTC_2_INTR         XPS_TTC0_2_INT_ID
+#define XPAR_PSU_TTC_3_INTR         XPS_TTC1_0_INT_ID
+#define XPAR_PSU_TTC_4_INTR         XPS_TTC1_1_INT_ID
+#define XPAR_PSU_TTC_5_INTR         XPS_TTC1_2_INT_ID
+#define XPAR_PSU_TTC_6_INTR			XPS_TTC2_0_INT_ID
+#define XPAR_PSU_TTC_7_INTR			XPS_TTC2_1_INT_ID
+#define XPAR_PSU_TTC_8_INTR			XPS_TTC2_2_INT_ID
+#define XPAR_PSU_TTC_9_INTR			XPS_TTC3_0_INT_ID
+#define XPAR_PSU_TTC_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_PSU_TTC_11_INTR		XPS_TTC3_2_INT_ID
+#define XPAR_PSU_AMS_INTR			XPS_AMS_INT_ID
+
+#define XPAR_XADCPS_NUM_INSTANCES 1U
+#define XPAR_XADCPS_0_DEVICE_ID   0U
+#define XPAR_XADCPS_0_BASEADDR	  (0xF8007000U)
+#define XPAR_XADCPS_INT_ID		XPS_SYSMON_INT_ID
+
+/* For backwards compatibilty */
+#define XPAR_XUARTPS_0_CLOCK_HZ		XPAR_XUARTPS_0_UART_CLK_FREQ_HZ
+#define XPAR_XUARTPS_1_CLOCK_HZ		XPAR_XUARTPS_1_UART_CLK_FREQ_HZ
+#define XPAR_XTTCPS_0_CLOCK_HZ		XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_1_CLOCK_HZ		XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_2_CLOCK_HZ		XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_3_CLOCK_HZ		XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_4_CLOCK_HZ		XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_5_CLOCK_HZ		XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ
+#define XPAR_XIICPS_0_CLOCK_HZ		XPAR_XIICPS_0_I2C_CLK_FREQ_HZ
+#define XPAR_XIICPS_1_CLOCK_HZ		XPAR_XIICPS_1_I2C_CLK_FREQ_HZ
+
+#define XPAR_XQSPIPS_0_CLOCK_HZ		XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ
+
+#ifdef XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXR5_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ
+#endif
+
+#ifdef XPAR_CPU_CORTEXR5_1_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXR5_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXR5_1_CPU_CLK_FREQ_HZ
+#endif
+
+#define XPAR_SCUWDT_DEVICE_ID		0U
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
+/**
+* @} End of "addtogroup r5_peripheral_definitions".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/include/xplatform_info.h b/src/Xilinx/include/xplatform_info.h
new file mode 100644
index 0000000..0582222
--- /dev/null
+++ b/src/Xilinx/include/xplatform_info.h
@@ -0,0 +1,109 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xplatform_info.h
+*
+* @addtogroup common_platform_info APIs to Get Platform Information
+*
+* The xplatform_info.h file contains definitions for various available Xilinx®
+* platforms. Also, it contains prototype of APIs, which can be used to get the
+* platform information.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date    Changes
+* ----- ---- --------- -------------------------------------------------------
+* 6.4    ms   05/23/17 Added PSU_PMU macro to support XGetPSVersion_Info
+*                      function for PMUFW.
+* 

+*
+******************************************************************************/
+
+#ifndef XPLATFORM_INFO_H		/* prevent circular inclusions */
+#define XPLATFORM_INFO_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+#define XPAR_CSU_BASEADDR 0xFFCA0000U
+#define	XPAR_CSU_VER_OFFSET 0x00000044U
+
+#define XPLAT_ZYNQ_ULTRA_MP_SILICON 0x0
+#define XPLAT_ZYNQ_ULTRA_MP 0x1
+#define XPLAT_ZYNQ_ULTRA_MPVEL 0x2
+#define XPLAT_ZYNQ_ULTRA_MPQEMU 0x3
+#define XPLAT_ZYNQ 0x4
+#define XPLAT_MICROBLAZE 0x5
+
+#define XPS_VERSION_1 0x0
+#define XPS_VERSION_2 0x1
+
+#define XPLAT_INFO_MASK (0xF)
+#define XPLAT_INFO_SHIFT (0xC)
+#define XPS_VERSION_INFO_MASK (0xF)
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+u32 XGetPlatform_Info();
+
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32) || (PSU_PMU)
+u32 XGetPSVersion_Info();
+#endif
+
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32)
+u32 XGet_Zynq_UltraMp_Platform_info();
+#endif
+/************************** Function Prototypes ******************************/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_platform_info".
+*/
diff --git a/src/Xilinx/include/xpm_counter.h b/src/Xilinx/include/xpm_counter.h
new file mode 100644
index 0000000..b24f4ae
--- /dev/null
+++ b/src/Xilinx/include/xpm_counter.h
@@ -0,0 +1,573 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpm_counter.h
+*
+* @addtogroup r5_event_counter_apis Cortex R5 Event Counters Functions
+*
+* Cortex R5 event counter functions can be utilized to configure and control
+* the Cortex-R5 performance monitor events.
+* Cortex-R5 Performance Monitor has 6 event counters which can be used to
+* count a variety of events described in Coretx-R5 TRM. The xpm_counter.h file
+* defines configurations XPM_CNTRCFGx which can be used to program the event
+* counters to count a set of events.
+*
+* @note
+* It doesn't handle the Cortex-R5 cycle counter, as the cycle counter is
+* being used for time keeping.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 

+*
+******************************************************************************/
+
+#ifndef XPMCOUNTER_H /* prevent circular inclusions */
+#define XPMCOUNTER_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include 
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/* Number of performance counters */
+#define XPM_CTRCOUNT 6U
+
+/* The following constants define the Cortex-R5 Performance Monitor Events */
+
+/*
+ * Software increment. The register is incremented only on writes to the
+ * Software Increment Register
+ */
+#define XPM_EVENT_SOFTINCR 0x00U
+
+/*
+ * Instruction fetch that causes a refill at (at least) the lowest level(s) of
+ * instruction or unified cache. Includes the speculative linefills in the
+ * count
+ */
+#define XPM_EVENT_INSRFETCH_CACHEREFILL 0x01U
+
+/*
+ * Instruction fetch that causes a TLB refill at (at least) the lowest level of
+ * TLB. Includes the speculative requests in the count
+ */
+#define XPM_EVENT_INSTRFECT_TLBREFILL 0x02U
+
+/*
+ * Data read or write operation that causes a refill at (at least) the lowest
+ * level(s)of data or unified cache. Counts the number of allocations performed
+ * in the Data Cache due to a read or a write
+ */
+#define XPM_EVENT_DATA_CACHEREFILL 0x03U
+
+/*
+ * Data read or write operation that causes a cache access at (at least) the
+ * lowest level(s) of data or unified cache. This includes speculative reads
+ */
+#define XPM_EVENT_DATA_CACHEACCESS 0x04U
+
+/*
+ * Data read or write operation that causes a TLB refill at (at least) the
+ * lowest level of TLB. This does not include micro TLB misses due to PLD, PLI,
+ * CP15 Cache operation by MVA and CP15 VA to PA operations
+ */
+#define XPM_EVENT_DATA_TLBREFILL 0x05U
+
+/*
+ * Data read architecturally executed. Counts the number of data read
+ * instructions accepted by the Load Store Unit. This includes counting the
+ * speculative and aborted LDR/LDM, as well as the reads due to the SWP
+ * instructions
+ */
+#define XPM_EVENT_DATA_READS 0x06U
+
+/*
+ * Data write architecturally executed. Counts the number of data write
+ * instructions accepted by the Load Store Unit. This includes counting the
+ * speculative and aborted STR/STM, as well as the writes due to the SWP
+ * instructions
+ */
+#define XPM_EVENT_DATA_WRITE 0x07U
+
+/* Exception taken. Counts the number of exceptions architecturally taken.*/
+#define XPM_EVENT_EXCEPTION 0x09U
+
+/* Exception return architecturally executed.*/
+#define XPM_EVENT_EXCEPRETURN 0x0AU
+
+/*
+ * Change to ContextID retired. Counts the number of instructions
+ * architecturally executed writing into the ContextID Register
+ */
+#define XPM_EVENT_CHANGECONTEXT 0x0BU
+
+/*
+ * Software change of PC, except by an exception, architecturally executed.
+ * Count the number of PC changes architecturally executed, excluding the PC
+ * changes due to taken exceptions
+ */
+#define XPM_EVENT_SW_CHANGEPC 0x0CU
+
+/*
+ * Immediate branch architecturally executed (taken or not taken). This includes
+ * the branches which are flushed due to a previous load/store which aborts
+ * late
+ */
+#define XPM_EVENT_IMMEDBRANCH 0x0DU
+
+/*
+ * Unaligned access architecturally executed. Counts the number of aborted
+ * unaligned accessed architecturally executed, and the number of not-aborted
+ * unaligned accesses, including the speculative ones
+ */
+#define XPM_EVENT_UNALIGNEDACCESS 0x0FU
+
+/*
+ * Branch mispredicted/not predicted. Counts the number of mispredicted or
+ * not-predicted branches executed. This includes the branches which are flushed
+ * due to a previous load/store which aborts late
+ */
+#define XPM_EVENT_BRANCHMISS 0x10U
+
+/*
+ * Counts clock cycles when the Cortex-R5 processor is not in WFE/WFI. This
+ * event is not exported on the PMUEVENT bus
+ */
+#define XPM_EVENT_CLOCKCYCLES 0x11U
+
+/*
+ * Branches or other change in program flow that could have been predicted by
+ * the branch prediction resources of the processor. This includes the branches
+ * which are flushed due to a previous load/store which aborts late
+ */
+#define XPM_EVENT_BRANCHPREDICT 0x12U
+
+/*
+ * Java bytecode execute. Counts the number of Java bytecodes being decoded,
+ * including speculative ones
+ */
+#define XPM_EVENT_JAVABYTECODE 0x40U
+
+/*
+ * Software Java bytecode executed. Counts the number of software java bytecodes
+ * being decoded, including speculative ones
+ */
+#define XPM_EVENT_SWJAVABYTECODE 0x41U
+
+/*
+ * Jazelle backward branches executed. Counts the number of Jazelle taken
+ * branches being executed. This includes the branches which are flushed due
+ * to a previous load/store which aborts late
+ */
+#define XPM_EVENT_JAVABACKBRANCH 0x42U
+
+/*
+ * Coherent linefill miss Counts the number of coherent linefill requests
+ * performed by the Cortex-R5 processor which also miss in all the other
+ * Cortex-R5 processors, meaning that the request is sent to the external
+ * memory
+ */
+#define XPM_EVENT_COHERLINEMISS 0x50U
+
+/*
+ * Coherent linefill hit. Counts the number of coherent linefill requests
+ * performed by the Cortex-R5 processor which hit in another Cortex-R5
+ * processor, meaning that the linefill data is fetched directly from the
+ * relevant Cortex-R5 cache
+ */
+#define XPM_EVENT_COHERLINEHIT 0x51U
+
+/*
+ * Instruction cache dependent stall cycles. Counts the number of cycles where
+ * the processor is ready to accept new instructions, but does not receive any
+ * due to the instruction side not being able to provide any and the
+ * instruction cache is currently performing at least one linefill
+ */
+#define XPM_EVENT_INSTRSTALL 0x60U
+
+/*
+ * Data cache dependent stall cycles. Counts the number of cycles where the core
+ * has some instructions that it cannot issue to any pipeline, and the Load
+ * Store unit has at least one pending linefill request, and no pending
+ */
+#define XPM_EVENT_DATASTALL 0x61U
+
+/*
+ * Main TLB miss stall cycles. Counts the number of cycles where the processor
+ * is stalled waiting for the completion of translation table walks from the
+ * main TLB. The processor stalls can be due to the instruction side not being
+ * able to provide the instructions, or to the data side not being able to
+ * provide the necessary data, due to them waiting for the main TLB translation
+ * table walk to complete
+ */
+#define XPM_EVENT_MAINTLBSTALL 0x62U
+
+/*
+ * Counts the number of STREX instructions architecturally executed and
+ * passed
+ */
+#define XPM_EVENT_STREXPASS 0x63U
+
+/*
+ * Counts the number of STREX instructions architecturally executed and
+ * failed
+ */
+#define XPM_EVENT_STREXFAIL 0x64U
+
+/*
+ * Data eviction. Counts the number of eviction requests due to a linefill in
+ * the data cache
+ */
+#define XPM_EVENT_DATAEVICT 0x65U
+
+/*
+ * Counts the number of cycles where the issue stage does not dispatch any
+ * instruction because it is empty or cannot dispatch any instructions
+ */
+#define XPM_EVENT_NODISPATCH 0x66U
+
+/*
+ * Counts the number of cycles where the issue stage is empty
+ */
+#define XPM_EVENT_ISSUEEMPTY 0x67U
+
+/*
+ * Counts the number of instructions going through the Register Renaming stage.
+ * This number is an approximate number of the total number of instructions
+ * speculatively executed, and even more approximate of the total number of
+ * instructions architecturally executed. The approximation depends mainly on
+ * the branch misprediction rate.
+ * The renaming stage can handle two instructions in the same cycle so the event
+ * is two bits long:
+ *    - b00 no instructions renamed
+ *    - b01 one instruction renamed
+ *    - b10 two instructions renamed
+ */
+#define XPM_EVENT_INSTRRENAME 0x68U
+
+/*
+ * Counts the number of procedure returns whose condition codes do not fail,
+ * excluding all returns from exception. This count includes procedure returns
+ * which are flushed due to a previous load/store which aborts late.
+ * Only the following instructions are reported:
+ * - BX R14
+ * - MOV PC LR
+ * - POP {..,pc}
+ * - LDR pc,[sp],#offset
+ * The following instructions are not reported:
+ * - LDMIA R9!,{..,PC} (ThumbEE state only)
+ * - LDR PC,[R9],#offset (ThumbEE state only)
+ * - BX R0 (Rm != R14)
+ * - MOV PC,R0 (Rm != R14)
+ * - LDM SP,{...,PC} (writeback not specified)
+ * - LDR PC,[SP,#offset] (wrong addressing mode)
+ */
+#define XPM_EVENT_PREDICTFUNCRET 0x6EU
+
+/*
+ * Counts the number of instructions being executed in the main execution
+ * pipeline of the processor, the multiply pipeline and arithmetic logic unit
+ * pipeline. The counted instructions are still speculative
+ */
+#define XPM_EVENT_MAINEXEC 0x70U
+
+/*
+ * Counts the number of instructions being executed in the processor second
+ * execution pipeline (ALU). The counted instructions are still speculative
+ */
+#define XPM_EVENT_SECEXEC 0x71U
+
+/*
+ * Counts the number of instructions being executed in the Load/Store unit. The
+ * counted instructions are still speculative
+ */
+#define XPM_EVENT_LDRSTR 0x72U
+
+/*
+ * Counts the number of Floating-point instructions going through the Register
+ * Rename stage. Instructions are still speculative in this stage.
+ *Two floating-point instructions can be renamed in the same cycle so the event
+ * is two bitslong:
+ *0b00 no floating-point instruction renamed
+ *0b01 one floating-point instruction renamed
+ *0b10 two floating-point instructions renamed
+ */
+#define XPM_EVENT_FLOATRENAME 0x73U
+
+/*
+ * Counts the number of Neon instructions going through the Register Rename
+ * stage.Instructions are still speculative in this stage.
+ * Two NEON instructions can be renamed in the same cycle so the event is two
+ * bits long:
+ *0b00 no NEON instruction renamed
+ *0b01 one NEON instruction renamed
+ *0b10 two NEON instructions renamed
+ */
+#define XPM_EVENT_NEONRENAME 0x74U
+
+/*
+ * Counts the number of cycles where the processor is stalled because PLD slots
+ * are all full
+ */
+#define XPM_EVENT_PLDSTALL 0x80U
+
+/*
+ * Counts the number of cycles when the processor is stalled and the data side
+ * is stalled too because it is full and executing writes to the external
+ * memory
+ */
+#define XPM_EVENT_WRITESTALL 0x81U
+
+/*
+ * Counts the number of stall cycles due to main TLB misses on requests issued
+ * by the instruction side
+ */
+#define XPM_EVENT_INSTRTLBSTALL 0x82U
+
+/*
+ * Counts the number of stall cycles due to main TLB misses on requests issued
+ * by the data side
+ */
+#define XPM_EVENT_DATATLBSTALL 0x83U
+
+/*
+ * Counts the number of stall cycles due to micro TLB misses on the instruction
+ * side. This event does not include main TLB miss stall cycles that are already
+ * counted in the corresponding main TLB event
+ */
+#define XPM_EVENT_INSTR_uTLBSTALL 0x84U
+
+/*
+ * Counts the number of stall cycles due to micro TLB misses on the data side.
+ * This event does not include main TLB miss stall cycles that are already
+ * counted in the corresponding main TLB event
+ */
+#define XPM_EVENT_DATA_uTLBSTALL 0x85U
+
+/*
+ * Counts the number of stall cycles because of the execution of a DMB memory
+ * barrier. This includes all DMB instructions being executed, even
+ * speculatively
+ */
+#define XPM_EVENT_DMB_STALL 0x86U
+
+/*
+ * Counts the number of cycles during which the integer core clock is enabled
+ */
+#define XPM_EVENT_INT_CLKEN 0x8AU
+
+/*
+ * Counts the number of cycles during which the Data Engine clock is enabled
+ */
+#define XPM_EVENT_DE_CLKEN 0x8BU
+
+/*
+ * Counts the number of ISB instructions architecturally executed
+ */
+#define XPM_EVENT_INSTRISB 0x90U
+
+/*
+ * Counts the number of DSB instructions architecturally executed
+ */
+#define XPM_EVENT_INSTRDSB 0x91U
+
+/*
+ * Counts the number of DMB instructions speculatively executed
+ */
+#define XPM_EVENT_INSTRDMB 0x92U
+
+/*
+ * Counts the number of external interrupts executed by the processor
+ */
+#define XPM_EVENT_EXTINT 0x93U
+
+/*
+ * PLE cache line request completed
+ */
+#define XPM_EVENT_PLE_LRC 0xA0U
+
+/*
+ * PLE cache line request skipped
+ */
+#define XPM_EVENT_PLE_LRS 0xA1U
+
+/*
+ * PLE FIFO flush
+ */
+#define XPM_EVENT_PLE_FLUSH 0xA2U
+
+/*
+ * PLE request complete
+ */
+#define XPM_EVENT_PLE_CMPL 0xA3U
+
+/*
+ * PLE FIFO overflow
+ */
+#define XPM_EVENT_PLE_OVFL 0xA4U
+
+/*
+ * PLE request programmed
+ */
+#define XPM_EVENT_PLE_PROG 0xA5U
+
+/*
+ * The following constants define the configurations for Cortex-R5 Performance
+ * Monitor Events. Each configuration configures the event counters for a set
+ * of events.
+ * -----------------------------------------------
+ * Config		PmCtr0... PmCtr5
+ * -----------------------------------------------
+ * XPM_CNTRCFG1		{ XPM_EVENT_SOFTINCR,
+ *			  XPM_EVENT_INSRFETCH_CACHEREFILL,
+ *			  XPM_EVENT_INSTRFECT_TLBREFILL,
+ *			  XPM_EVENT_DATA_CACHEREFILL,
+ *			  XPM_EVENT_DATA_CACHEACCESS,
+ *			  XPM_EVENT_DATA_TLBREFILL }
+ *
+ * XPM_CNTRCFG2		{ XPM_EVENT_DATA_READS,
+ *			  XPM_EVENT_DATA_WRITE,
+ *			  XPM_EVENT_EXCEPTION,
+ *			  XPM_EVENT_EXCEPRETURN,
+ *			  XPM_EVENT_CHANGECONTEXT,
+ *			  XPM_EVENT_SW_CHANGEPC }
+ *
+ * XPM_CNTRCFG3		{ XPM_EVENT_IMMEDBRANCH,
+ *			  XPM_EVENT_UNALIGNEDACCESS,
+ *			  XPM_EVENT_BRANCHMISS,
+ *			  XPM_EVENT_CLOCKCYCLES,
+ *			  XPM_EVENT_BRANCHPREDICT,
+ *			  XPM_EVENT_JAVABYTECODE }
+ *
+ * XPM_CNTRCFG4		{ XPM_EVENT_SWJAVABYTECODE,
+ *			  XPM_EVENT_JAVABACKBRANCH,
+ *			  XPM_EVENT_COHERLINEMISS,
+ *			  XPM_EVENT_COHERLINEHIT,
+ *			  XPM_EVENT_INSTRSTALL,
+ *			  XPM_EVENT_DATASTALL }
+ *
+ * XPM_CNTRCFG5		{ XPM_EVENT_MAINTLBSTALL,
+ *			  XPM_EVENT_STREXPASS,
+ *			  XPM_EVENT_STREXFAIL,
+ *			  XPM_EVENT_DATAEVICT,
+ *			  XPM_EVENT_NODISPATCH,
+ *			  XPM_EVENT_ISSUEEMPTY }
+ *
+ * XPM_CNTRCFG6		{ XPM_EVENT_INSTRRENAME,
+ *			  XPM_EVENT_PREDICTFUNCRET,
+ *			  XPM_EVENT_MAINEXEC,
+ *			  XPM_EVENT_SECEXEC,
+ *			  XPM_EVENT_LDRSTR,
+ *			  XPM_EVENT_FLOATRENAME }
+ *
+ * XPM_CNTRCFG7		{ XPM_EVENT_NEONRENAME,
+ *			  XPM_EVENT_PLDSTALL,
+ *			  XPM_EVENT_WRITESTALL,
+ *			  XPM_EVENT_INSTRTLBSTALL,
+ *			  XPM_EVENT_DATATLBSTALL,
+ *			  XPM_EVENT_INSTR_uTLBSTALL }
+ *
+ * XPM_CNTRCFG8		{ XPM_EVENT_DATA_uTLBSTALL,
+ *			  XPM_EVENT_DMB_STALL,
+ *			  XPM_EVENT_INT_CLKEN,
+ *			  XPM_EVENT_DE_CLKEN,
+ *			  XPM_EVENT_INSTRISB,
+ *			  XPM_EVENT_INSTRDSB }
+ *
+ * XPM_CNTRCFG9		{ XPM_EVENT_INSTRDMB,
+ *			  XPM_EVENT_EXTINT,
+ *			  XPM_EVENT_PLE_LRC,
+ *			  XPM_EVENT_PLE_LRS,
+ *			  XPM_EVENT_PLE_FLUSH,
+ *			  XPM_EVENT_PLE_CMPL }
+ *
+ * XPM_CNTRCFG10	{ XPM_EVENT_PLE_OVFL,
+ *			  XPM_EVENT_PLE_PROG,
+ *			  XPM_EVENT_PLE_LRC,
+ *			  XPM_EVENT_PLE_LRS,
+ *			  XPM_EVENT_PLE_FLUSH,
+ *			  XPM_EVENT_PLE_CMPL }
+ *
+ * XPM_CNTRCFG11	{ XPM_EVENT_DATASTALL,
+ *			  XPM_EVENT_INSRFETCH_CACHEREFILL,
+ *			  XPM_EVENT_INSTRFECT_TLBREFILL,
+ *			  XPM_EVENT_DATA_CACHEREFILL,
+ *			  XPM_EVENT_DATA_CACHEACCESS,
+ *			  XPM_EVENT_DATA_TLBREFILL }
+ */
+#define XPM_CNTRCFG1	0
+#define XPM_CNTRCFG2	1
+#define XPM_CNTRCFG3	2
+#define XPM_CNTRCFG4	3
+#define XPM_CNTRCFG5	4
+#define XPM_CNTRCFG6	5
+#define XPM_CNTRCFG7	6
+#define XPM_CNTRCFG8	7
+#define XPM_CNTRCFG9	8
+#define XPM_CNTRCFG10	9
+#define XPM_CNTRCFG11	10
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+/* Interface fuctions to access perfromance counters from abstraction layer */
+void Xpm_SetEvents(s32 PmcrCfg);
+void Xpm_GetEventCounters(u32 *PmCtrValue);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/**
+* @} End of "addtogroup r5_event_counter_apis".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/include/xpseudo_asm.h b/src/Xilinx/include/xpseudo_asm.h
new file mode 100644
index 0000000..4d587af
--- /dev/null
+++ b/src/Xilinx/include/xpseudo_asm.h
@@ -0,0 +1,74 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm.h
+*
+* @addtogroup r5_specific Cortex R5 Processor Specific Include Files
+*
+* The xpseudo_asm.h includes xreg_cortexr5.h and xpseudo_asm_gcc.h.
+*
+* The xreg_cortexr5.h file contains definitions for inline assembler code.
+* It provides inline definitions for Cortex R5 GPRs, SPRs,co-processor
+* registers and Debug register
+*
+* The xpseudo_asm_gcc.h contains the definitions for the most often used
+* inline assembler instructions, available as macros. These can be very
+* useful for tasks such as setting or getting special purpose registers,
+* synchronization,or cache manipulation. These inline assembler instructions
+* can be used from drivers and user applications written in C.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 6.2   mus  01/27/17 Updated to support IAR compiler
+* 

+*
+******************************************************************************/
+#ifndef XPSEUDO_ASM_H /* prevent circular inclusions */
+#define XPSEUDO_ASM_H /* by using protection macros */
+
+#include "xreg_cortexr5.h"
+#if defined (__GNUC__)
+#include "xpseudo_asm_gcc.h"
+#elif defined (__ICCARM__)
+#include "xpseudo_asm_iccarm.h"
+#endif
+#endif /* XPSEUDO_ASM_H */
+/**
+* @} End of "addtogroup r5_specific".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/include/xpseudo_asm_gcc.h b/src/Xilinx/include/xpseudo_asm_gcc.h
new file mode 100644
index 0000000..1b67263
--- /dev/null
+++ b/src/Xilinx/include/xpseudo_asm_gcc.h
@@ -0,0 +1,249 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_gcc.h
+*
+* This header file contains macros for using inline assembler code. It is
+* written specifically for the GNU compiler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp		 05/21/14 First release
+* 6.0   mus      07/27/16 Consolidated file for a53,a9 and r5 processors
+* 

+*
+******************************************************************************/
+
+#ifndef XPSEUDO_ASM_GCC_H  /* prevent circular inclusions */
+#define XPSEUDO_ASM_GCC_H  /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/* necessary for pre-processor */
+#define stringify(s)	tostring(s)
+#define tostring(s)	#s
+
+#if defined (__aarch64__)
+/* pseudo assembler instructions */
+#define mfcpsr()	({u32 rval = 0U; \
+			   asm volatile("mrs %0,  DAIF" : "=r" (rval));\
+			  rval;\
+			 })
+
+#define mtcpsr(v) __asm__ __volatile__ ("msr DAIF, %0" : : "r" (v))
+
+#define cpsiei()	//__asm__ __volatile__("cpsie	i\n")
+#define cpsidi()	//__asm__ __volatile__("cpsid	i\n")
+
+#define cpsief()	//__asm__ __volatile__("cpsie	f\n")
+#define cpsidf()	//__asm__ __volatile__("cpsid	f\n")
+
+
+
+#define mtgpr(rn, v)	/*__asm__ __volatile__(\
+			  "mov r" stringify(rn) ", %0 \n"\
+			  : : "r" (v)\
+			)*/
+
+#define mfgpr(rn)	/*({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mov %0,r" stringify(rn) "\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })*/
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+#define isb() __asm__ __volatile__ ("isb sy")
+
+/* Data Synchronization Barrier */
+#define dsb() __asm__ __volatile__("dsb sy")
+
+/* Data Memory Barrier */
+#define dmb() __asm__ __volatile__("dmb sy")
+
+
+/* Memory Operations */
+#define ldr(adr)	({u64 rval; \
+			  __asm__ __volatile__(\
+			    "ldr	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#else
+
+/* pseudo assembler instructions */
+#define mfcpsr()	({u32 rval = 0U; \
+			  __asm__ __volatile__(\
+			    "mrs	%0, cpsr\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+#define mtcpsr(v)	__asm__ __volatile__(\
+			  "msr	cpsr,%0\n"\
+			  : : "r" (v)\
+			)
+
+#define cpsiei()	__asm__ __volatile__("cpsie	i\n")
+#define cpsidi()	__asm__ __volatile__("cpsid	i\n")
+
+#define cpsief()	__asm__ __volatile__("cpsie	f\n")
+#define cpsidf()	__asm__ __volatile__("cpsid	f\n")
+
+
+
+#define mtgpr(rn, v)	__asm__ __volatile__(\
+			  "mov r" stringify(rn) ", %0 \n"\
+			  : : "r" (v)\
+			)
+
+#define mfgpr(rn)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mov %0,r" stringify(rn) "\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+#define isb() __asm__ __volatile__ ("isb" : : : "memory")
+
+/* Data Synchronization Barrier */
+#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
+
+/* Data Memory Barrier */
+#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
+
+
+/* Memory Operations */
+#define ldr(adr)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "ldr	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#endif
+
+#define ldrb(adr)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "ldrb	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define str(adr, val)	__asm__ __volatile__(\
+			  "str	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+#define strb(adr, val)	__asm__ __volatile__(\
+			  "strb	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+/* Count leading zeroes (clz) */
+#define clz(arg)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "clz	%0,%1"\
+			    : "=r" (rval) : "r" (arg)\
+			  );\
+			  rval;\
+			 })
+
+#if defined (__aarch64__)
+#define mtcpdc(reg,val)	__asm__ __volatile__("dc " #reg ",%0"  : : "r" (val))
+#define mtcpic(reg,val)	__asm__ __volatile__("ic " #reg ",%0"  : : "r" (val))
+
+#define mtcpicall(reg)	__asm__ __volatile__("ic " #reg)
+#define mtcptlbi(reg)	__asm__ __volatile__("tlbi " #reg)
+#define mtcpat(reg,val)	__asm__ __volatile__("at " #reg ",%0"  : : "r" (val))
+/* CP15 operations */
+#define mfcp(reg)	({u64 rval = 0U;\
+			__asm__ __volatile__("mrs	%0, " #reg : "=r" (rval));\
+			rval;\
+			})
+
+#define mtcp(reg,val)	__asm__ __volatile__("msr " #reg ",%0"  : : "r" (val))
+
+#else
+/* CP15 operations */
+#define mtcp(rn, v)	__asm__ __volatile__(\
+			 "mcr " rn "\n"\
+			 : : "r" (v)\
+			);
+
+#define mfcp(rn)	({u32 rval = 0U; \
+			 __asm__ __volatile__(\
+			   "mrc " rn "\n"\
+			   : "=r" (rval)\
+			 );\
+			 rval;\
+			 })
+#endif
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XPSEUDO_ASM_GCC_H */
diff --git a/src/Xilinx/include/xqspipsu.h b/src/Xilinx/include/xqspipsu.h
new file mode 100644
index 0000000..b73b722
--- /dev/null
+++ b/src/Xilinx/include/xqspipsu.h
@@ -0,0 +1,335 @@
+/******************************************************************************
+*
+* Copyright (C) 2018 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xqspipsu.h
+* @addtogroup qspipsu_v1_7
+* @{
+* @details
+*
+* This is the header file for the implementation of QSPIPSU driver.
+* Generic QSPI interface allows for communication to any QSPI slave device.
+* GQSPI contains a GENFIFO into which the bus transfers required are to be
+* pushed with appropriate configuration. The controller provides TX and RX
+* FIFO's and a DMA to be used for RX transfers. The controller executes each
+* GENFIFO entry noting the configuration and places data on the bus as required
+*
+* The different options in GENFIFO are as follows:
+* IMM_DATA : Can be one byte of data to be transmitted, number of clocks or
+*            number of bytes in transfer.
+* DATA_XFER : Indicates that data/clocks need to be transmitted or received.
+* EXPONENT : e when 2^e bytes are involved in transfer.
+* SPI_MODE : SPI/Dual SPI/Quad SPI
+* CS : Lower or Upper CS or Both
+* Bus : Lower or Upper Bus or Both
+* TX : When selected, controller transmits data in IMM or fetches number of
+*      bytes mentioned form TX FIFO. If not selected, dummies are pumped.
+* RX : When selected, controller receives and fills the RX FIFO/allows RX DMA
+*      of requested number of bytes. If not selected, RX data is discarded.
+* Stripe : Byte stripe over lower and upper bus or not.
+* Poll : Polls response to match for to a set value (used along with POLL_CFG
+*        registers) and then proceeds to next GENFIFO entry.
+*        This feature is not currently used in the driver.
+*
+* GENFIFO has manual and auto start options.
+* All DMA requests need a 4-byte aligned destination address buffer and
+* size of transfer should also be a multiple of 4.
+* This driver supports DMA RX and IO RX.
+*
+* Initialization:
+* This driver uses the GQSPI controller with RX DMA. It supports both
+* interrupt and polled transfers. Manual start of GENFIFO is used.
+* XQspiPsu_CfgInitialize() initializes the instance variables.
+* Additional setting can be done using SetOptions/ClearOptions functions
+* and SelectSlave function.
+*
+* Transfer:
+* Polled or Interrupt transfers can be done. The transfer function needs the
+* message(s) to be transmitted in the form of an array of type XQspiPsu_Msg.
+* This is supposed to contain the byte count and any TX/RX buffers as required.
+* Flags can be used indicate further information such as whether the message
+* should be striped. The transfer functions form and write GENFIFO entries,
+* check the status of the transfer and report back to the application
+* when done.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------.
+* 1.0   hk  08/21/14 First release
+*       sk  03/13/15 Added IO mode support.
+*       hk  03/18/15 Switch to I/O mode before clearing RX FIFO.
+*                    Clear and disbale DMA interrupts/status in abort.
+*                    Use DMA DONE bit instead of BUSY as recommended.
+*       sk  04/24/15 Modified the code according to MISRAC-2012.
+*       sk  06/17/15 Removed NULL checks for Rx/Tx buffers. As
+*                    writing/reading from 0x0 location is permitted.
+* 1.1   sk  04/12/16 Added debug message prints.
+* 1.2	nsk 07/01/16 Added LQSPI support
+*		     Modified XQspiPsu_Select() macro in xqspipsu.h
+*		     Added XQspiPsu_GetLqspiConfigReg() in xqspipsu.h
+*		     Added required macros in xqspipsu_hw.h
+*		     Modified XQspiPsu_SetOptions() to support
+*		     LQSPI options and updated OptionsTable in
+*		     xqspipsu_options.c
+*       rk  07/15/16 Added support for TapDelays at different frequencies.
+*	nsk 08/05/16 Added example support PollData and PollTimeout
+*		     Added  XQSPIPSU_MSG_FLAG_POLL macro in xqspipsu.h
+*		     Added XQspiPsu_Create_PollConfigData and
+*		     XQspiPsu_PollData() functions in xqspipsu.c
+* 1.3	nsk 09/16/16 Update PollData and Polltimeout support for dual parallel
+*	             configuration. Updated XQspiPsu_PollData() and
+*	             XQspiPsu_Create_PollConfigData() functions in xqspipsu.c
+*                    and also modified the polldata example
+*       ms  03/17/17 Added readme.txt file in examples folder for doxygen
+*                    generation.
+*       ms  04/05/17 Modified Comment lines in functions of qspipsu
+*                    examples to recognize it as documentation block
+*                    and modified filename tag to include them in
+*                    doxygen examples.
+* 1.4	tjs 05/26/17 Added support for accessing upper DDR (0x800000000)
+*		     while booting images from QSPI
+* 1.5	tjs	08/08/17 Added index.html file for importing examples from system.mss
+* 1.5	nsk 08/14/17 Added CCI support
+* 1.5	tjs 09/14/17 Modified the checks for 4 byte addressing and commands.
+* 1.6	tjs 10/16/17 Flow for accessing flash is made similar to u-boot and linux
+* 					 For CR-984966
+* 1.6   tjs 11/02/17 Resolved the compilation errors for ICCARM. CR-988625
+* 1.7   tjs 11/16/17 Removed the unsupported 4 Byte write and sector erase
+*                    commands.
+* 1.7	tjs	12/01/17 Added support for MT25QL02G Flash from Micron. CR-990642
+* 1.7	tjs 12/19/17 Added support for S25FL064L from Spansion. CR-990724
+* 1.7	tjs 01/11/18 Added support for MX66L1G45G flash from Macronix CR-992367
+* 1.7	tjs	01/16/18 Removed the check for DMA MSB to be written. (CR#992560)
+* 1.7	tjs	01/17/18 Added support to toggle the WP pin of flash. (PR#2448)
+*                    Added XQspiPsu_SetWP() in xqspipsu_options.c
+*                    Added XQspiPsu_WriteProtectToggle() in xqspipsu.c and
+*                    also added write protect example.
+* 1.7	tjs	03/14/18 Added support in EL1 NS mode (CR#974882)
+* 1.7	tjs 26/03/18 In dual parallel mode enable both CS when issuing Write
+*		     		 enable command. CR-998478
+* 

+*
+******************************************************************************/
+#ifndef XQSPIPSU_H_		/* prevent circular inclusions */
+#define XQSPIPSU_H_		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xqspipsu_hw.h"
+#include "xil_cache.h"
+
+/**************************** Type Definitions *******************************/
+/**
+ * The handler data type allows the user to define a callback function to
+ * handle the asynchronous processing for the QSPIPSU device.  The application
+ * using this driver is expected to define a handler of this type to support
+ * interrupt driven mode.  The handler executes in an interrupt context, so
+ * only minimal processing should be performed.
+ *
+ * @param	CallBackRef is the callback reference passed in by the upper
+ *		layer when setting the callback functions, and passed back to
+ *		the upper layer when the callback is invoked. Its type is
+ *		not important to the driver, so it is a void pointer.
+ * @param 	StatusEvent holds one or more status events that have occurred.
+ *		See the XQspiPsu_SetStatusHandler() for details on the status
+ *		events that can be passed in the callback.
+ * @param	ByteCount indicates how many bytes of data were successfully
+ *		transferred.  This may be less than the number of bytes
+ *		requested if the status event indicates an error.
+ */
+typedef void (*XQspiPsu_StatusHandler) (void *CallBackRef, u32 StatusEvent,
+					u32 ByteCount);
+
+/**
+ * This typedef contains configuration information for a flash message.
+ */
+typedef struct {
+	u8 *TxBfrPtr;
+	u8 *RxBfrPtr;
+	u32 ByteCount;
+	u32 BusWidth;
+	u32 Flags;
+	u8 PollData;
+	u32 PollTimeout;
+	u8 PollStatusCmd;
+	u8 PollBusMask;
+} XQspiPsu_Msg;
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID  of device */
+	u32 BaseAddress;	/**< Base address of the device */
+	u32 InputClockHz;	/**< Input clock frequency */
+	u8  ConnectionMode; /**< Single, Stacked and Parallel mode */
+	u8  BusWidth; 	/**< Bus width available on board */
+	u8 IsCacheCoherent; /**< Describes whether Cache Coherent or not */
+} XQspiPsu_Config;
+
+/**
+ * The XQspiPsu driver instance data. The user is required to allocate a
+ * variable of this type for every QSPIPSU device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XQspiPsu_Config Config;	 /**< Configuration structure */
+	u32 IsReady;		 /**< Device is initialized and ready */
+
+	u8 *SendBufferPtr;	 /**< Buffer to send (state) */
+	u8 *RecvBufferPtr;	 /**< Buffer to receive (state) */
+	u8 *GenFifoBufferPtr;	 /**< Gen FIFO entries */
+	s32 TxBytes;	 /**< Number of bytes to transfer (state) */
+	s32 RxBytes;	 /**< Number of bytes left to transfer(state) */
+	s32 GenFifoEntries;	 /**< Number of Gen FIFO entries remaining */
+	u32 IsBusy;		 /**< A transfer is in progress (state) */
+	u32 ReadMode;		 /**< DMA or IO mode */
+	u32 GenFifoCS;
+	u32 GenFifoBus;
+	s32 NumMsg;
+	s32 MsgCnt;
+	s32 IsUnaligned;
+	u8 IsManualstart;
+	XQspiPsu_Msg *Msg;
+	XQspiPsu_StatusHandler StatusHandler;
+	void *StatusRef;  	 /**< Callback reference for status handler */
+} XQspiPsu;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XQSPIPSU_READMODE_DMA	0x0U
+#define XQSPIPSU_READMODE_IO	0x1U
+
+#define XQSPIPSU_SELECT_FLASH_CS_LOWER	0x1U
+#define XQSPIPSU_SELECT_FLASH_CS_UPPER	0x2U
+#define XQSPIPSU_SELECT_FLASH_CS_BOTH	0x3U
+
+#define XQSPIPSU_SELECT_FLASH_BUS_LOWER	0x1U
+#define XQSPIPSU_SELECT_FLASH_BUS_UPPER	0x2U
+#define XQSPIPSU_SELECT_FLASH_BUS_BOTH	0x3U
+
+#define XQSPIPSU_SELECT_MODE_SPI	0x1U
+#define XQSPIPSU_SELECT_MODE_DUALSPI	0x2U
+#define XQSPIPSU_SELECT_MODE_QUADSPI	0x4U
+
+#define XQSPIPSU_GENFIFO_CS_SETUP	0x05U
+#define XQSPIPSU_GENFIFO_CS_HOLD	0x04U
+
+#define XQSPIPSU_CLK_ACTIVE_LOW_OPTION	0x2U
+#define XQSPIPSU_CLK_PHASE_1_OPTION	0x4U
+#define XQSPIPSU_MANUAL_START_OPTION	0x8U
+#define XQSPIPSU_LQSPI_MODE_OPTION	0x20U
+
+#define XQSPIPSU_GENFIFO_EXP_START	0x100U
+
+#define XQSPIPSU_DMA_BYTES_MAX		0x10000000U
+
+#define XQSPIPSU_CLK_PRESCALE_2		0x00U
+#define XQSPIPSU_CLK_PRESCALE_4		0x01U
+#define XQSPIPSU_CLK_PRESCALE_8		0x02U
+#define XQSPIPSU_CLK_PRESCALE_16		0x03U
+#define XQSPIPSU_CLK_PRESCALE_32		0x04U
+#define XQSPIPSU_CLK_PRESCALE_64		0x05U
+#define XQSPIPSU_CLK_PRESCALE_128	0x06U
+#define XQSPIPSU_CLK_PRESCALE_256	0x07U
+#define XQSPIPSU_CR_PRESC_MAXIMUM	7U
+
+#define XQSPIPSU_CONNECTION_MODE_SINGLE		0U
+#define XQSPIPSU_CONNECTION_MODE_STACKED	1U
+#define XQSPIPSU_CONNECTION_MODE_PARALLEL	2U
+
+/*QSPI Frequencies*/
+#define XQSPIPSU_FREQ_40MHZ 40000000
+#define XQSPIPSU_FREQ_100MHZ 100000000
+#define XQSPIPSU_FREQ_150MHZ 150000000
+
+/* Add more flags as required */
+#define XQSPIPSU_MSG_FLAG_STRIPE	0x1U
+#define XQSPIPSU_MSG_FLAG_RX		0x2U
+#define XQSPIPSU_MSG_FLAG_TX		0x4U
+#define XQSPIPSU_MSG_FLAG_POLL		0x8U
+
+/* GQSPI configuration to toggle WP of flash*/
+#define XQSPIPSU_SET_WP					1
+
+#define XQspiPsu_Select(InstancePtr, Mask)	XQspiPsu_Out32(((InstancePtr)->Config.BaseAddress) + XQSPIPSU_SEL_OFFSET, Mask)
+
+#define XQspiPsu_Enable(InstancePtr)	XQspiPsu_Out32(((InstancePtr)->Config.BaseAddress) + XQSPIPSU_EN_OFFSET, XQSPIPSU_EN_MASK)
+
+#define XQspiPsu_Disable(InstancePtr)	XQspiPsu_Out32(((InstancePtr)->Config.BaseAddress) + XQSPIPSU_EN_OFFSET, 0x0U)
+
+#define XQspiPsu_GetLqspiConfigReg(InstancePtr)   XQspiPsu_In32((XQSPIPS_BASEADDR) + XQSPIPSU_LQSPI_CR_OFFSET)
+
+
+/************************** Function Prototypes ******************************/
+
+/* Initialization and reset */
+XQspiPsu_Config *XQspiPsu_LookupConfig(u16 DeviceId);
+s32 XQspiPsu_CfgInitialize(XQspiPsu *InstancePtr, XQspiPsu_Config *ConfigPtr,
+				u32 EffectiveAddr);
+void XQspiPsu_Reset(XQspiPsu *InstancePtr);
+void XQspiPsu_Abort(XQspiPsu *InstancePtr);
+
+/* Transfer functions and handlers */
+s32 XQspiPsu_PolledTransfer(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg,
+				u32 NumMsg);
+s32 XQspiPsu_InterruptTransfer(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg,
+				u32 NumMsg);
+s32 XQspiPsu_InterruptHandler(XQspiPsu *InstancePtr);
+void XQspiPsu_SetStatusHandler(XQspiPsu *InstancePtr, void *CallBackRef,
+				XQspiPsu_StatusHandler FuncPointer);
+
+/* Configuration functions */
+s32 XQspiPsu_SetClkPrescaler(XQspiPsu *InstancePtr, u8 Prescaler);
+void XQspiPsu_SelectFlash(XQspiPsu *InstancePtr, u8 FlashCS, u8 FlashBus);
+s32 XQspiPsu_SetOptions(XQspiPsu *InstancePtr, u32 Options);
+s32 XQspiPsu_ClearOptions(XQspiPsu *InstancePtr, u32 Options);
+u32 XQspiPsu_GetOptions(XQspiPsu *InstancePtr);
+s32 XQspiPsu_SetReadMode(XQspiPsu *InstancePtr, u32 Mode);
+void XQspiPsu_SetWP(XQspiPsu *InstancePtr, u8 Value);
+void XQspiPsu_WriteProtectToggle(XQspiPsu *InstancePtr, u32 Toggle);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* XQSPIPSU_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xqspipsu_hw.h b/src/Xilinx/include/xqspipsu_hw.h
new file mode 100644
index 0000000..a7e8563
--- /dev/null
+++ b/src/Xilinx/include/xqspipsu_hw.h
@@ -0,0 +1,881 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xqspipsu_hw.h
+* @addtogroup qspipsu_v1_7
+* @{
+*
+* This file contains low level access funcitons using the base address
+* directly without an instance.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------.
+* 1.0   hk  08/21/14 First release
+*       hk  03/18/15 Add DMA status register masks required.
+*       sk  04/24/15 Modified the code according to MISRAC-2012.
+* 1.2	nsk 07/01/16 Added LQSPI supported Masks
+*       rk  07/15/16 Added support for TapDelays at different frequencies.
+* 1.7	tjs	03/14/18 Added support in EL1 NS mode.
+*
+* 

+*
+******************************************************************************/
+#ifndef _XQSPIPSU_HW_H_		/* prevent circular inclusions */
+#define _XQSPIPSU_HW_H_		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**
+ * QSPI Base Address
+ */
+#define XQSPIPS_BASEADDR      0XFF0F0000U
+
+/**
+ * GQSPI Base Address
+ */
+#define XQSPIPSU_BASEADDR     0xFF0F0100U
+#define XQSPIPSU_OFFSET     0x100U
+
+/**
+ * Register: XQSPIPS_EN_REG
+ */
+#define XQSPIPS_EN_REG    ( ( XQSPIPS_BASEADDR ) + 0X00000014U )
+
+#define XQSPIPS_EN_SHIFT   0
+#define XQSPIPS_EN_WIDTH   1
+#define XQSPIPS_EN_MASK    0X00000001U
+
+/**
+ * Register: XQSPIPSU_CFG
+ */
+#define XQSPIPSU_CFG_OFFSET    0X00000000U
+#define XQSPIPSU_LQSPI_CR_OFFSET    0X000000A0U
+
+#define XQSPIPSU_CFG_MODE_EN_SHIFT   30
+#define XQSPIPSU_CFG_MODE_EN_WIDTH   2
+#define XQSPIPSU_CFG_MODE_EN_MASK    0XC0000000U
+#define XQSPIPSU_CFG_MODE_EN_DMA_MASK	0X80000000U
+
+#define XQSPIPSU_CFG_GEN_FIFO_START_MODE_SHIFT   29
+#define XQSPIPSU_CFG_GEN_FIFO_START_MODE_WIDTH   1
+#define XQSPIPSU_CFG_GEN_FIFO_START_MODE_MASK    0X20000000U
+
+#define XQSPIPSU_CFG_START_GEN_FIFO_SHIFT   28
+#define XQSPIPSU_CFG_START_GEN_FIFO_WIDTH   1
+#define XQSPIPSU_CFG_START_GEN_FIFO_MASK    0X10000000U
+
+#define XQSPIPSU_CFG_ENDIAN_SHIFT   26
+#define XQSPIPSU_CFG_ENDIAN_WIDTH   1
+#define XQSPIPSU_CFG_ENDIAN_MASK    0X04000000U
+
+#define XQSPIPSU_CFG_EN_POLL_TO_SHIFT   20
+#define XQSPIPSU_CFG_EN_POLL_TO_WIDTH   1
+#define XQSPIPSU_CFG_EN_POLL_TO_MASK    0X00100000U
+
+#define XQSPIPSU_CFG_WP_HOLD_SHIFT   19
+#define XQSPIPSU_CFG_WP_HOLD_WIDTH   1
+#define XQSPIPSU_CFG_WP_HOLD_MASK    0X00080000U
+
+#define XQSPIPSU_CFG_BAUD_RATE_DIV_SHIFT   3
+#define XQSPIPSU_CFG_BAUD_RATE_DIV_WIDTH   3
+#define XQSPIPSU_CFG_BAUD_RATE_DIV_MASK    0X00000038U
+
+#define XQSPIPSU_CFG_CLK_PHA_SHIFT   2
+#define XQSPIPSU_CFG_CLK_PHA_WIDTH   1
+#define XQSPIPSU_CFG_CLK_PHA_MASK    0X00000004U
+
+#define XQSPIPSU_CFG_CLK_POL_SHIFT   1
+#define XQSPIPSU_CFG_CLK_POL_WIDTH   1
+#define XQSPIPSU_CFG_CLK_POL_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_CFG
+ */
+#define XQSPIPSU_LQSPI_CR_OFFSET	0X000000A0U
+#define XQSPIPSU_LQSPI_CR_LINEAR_MASK     0x80000000 /**< LQSPI mode enable */
+#define XQSPIPSU_LQSPI_CR_TWO_MEM_MASK    0x40000000 /**< Both memories or one */
+#define XQSPIPSU_LQSPI_CR_SEP_BUS_MASK    0x20000000 /**< Seperate memory bus */
+#define XQSPIPSU_LQSPI_CR_U_PAGE_MASK     0x10000000 /**< Upper memory page */
+#define XQSPIPSU_LQSPI_CR_ADDR_32BIT_MASK     0x01000000 /**< Upper memory page */
+#define XQSPIPSU_LQSPI_CR_MODE_EN_MASK    0x02000000 /**< Enable mode bits */
+#define XQSPIPSU_LQSPI_CR_MODE_ON_MASK    0x01000000 /**< Mode on */
+#define XQSPIPSU_LQSPI_CR_MODE_BITS_MASK  0x00FF0000 /**< Mode value for dual I/O
+                                                         or quad I/O */
+#define XQSPIPS_LQSPI_CR_INST_MASK       0x000000FF /**< Read instr code */
+#define XQSPIPS_LQSPI_CR_RST_STATE       0x80000003 /**< Default LQSPI CR value */
+#define XQSPIPS_LQSPI_CR_4_BYTE_STATE       0x88000013 /**< Default 4 Byte LQSPI CR value */
+#define XQSPIPS_LQSPI_CFG_RST_STATE       0x800238C1 /**< Default LQSPI CFG value */
+/**
+ * Register: XQSPIPSU_ISR
+ */
+#define XQSPIPSU_ISR_OFFSET	0X00000004U
+
+#define XQSPIPSU_ISR_RXEMPTY_SHIFT   11
+#define XQSPIPSU_ISR_RXEMPTY_WIDTH   1
+#define XQSPIPSU_ISR_RXEMPTY_MASK    0X00000800U
+
+#define XQSPIPSU_ISR_GENFIFOFULL_SHIFT   10
+#define XQSPIPSU_ISR_GENFIFOFULL_WIDTH   1
+#define XQSPIPSU_ISR_GENFIFOFULL_MASK    0X00000400U
+
+#define XQSPIPSU_ISR_GENFIFONOT_FULL_SHIFT   9
+#define XQSPIPSU_ISR_GENFIFONOT_FULL_WIDTH   1
+#define XQSPIPSU_ISR_GENFIFONOT_FULL_MASK    0X00000200U
+
+#define XQSPIPSU_ISR_TXEMPTY_SHIFT   8
+#define XQSPIPSU_ISR_TXEMPTY_WIDTH   1
+#define XQSPIPSU_ISR_TXEMPTY_MASK    0X00000100U
+
+#define XQSPIPSU_ISR_GENFIFOEMPTY_SHIFT   7
+#define XQSPIPSU_ISR_GENFIFOEMPTY_WIDTH   1
+#define XQSPIPSU_ISR_GENFIFOEMPTY_MASK    0X00000080U
+
+#define XQSPIPSU_ISR_RXFULL_SHIFT   5
+#define XQSPIPSU_ISR_RXFULL_WIDTH   1
+#define XQSPIPSU_ISR_RXFULL_MASK    0X00000020U
+
+#define XQSPIPSU_ISR_RXNEMPTY_SHIFT   4
+#define XQSPIPSU_ISR_RXNEMPTY_WIDTH   1
+#define XQSPIPSU_ISR_RXNEMPTY_MASK    0X00000010U
+
+#define XQSPIPSU_ISR_TXFULL_SHIFT   3
+#define XQSPIPSU_ISR_TXFULL_WIDTH   1
+#define XQSPIPSU_ISR_TXFULL_MASK    0X00000008U
+
+#define XQSPIPSU_ISR_TXNOT_FULL_SHIFT   2
+#define XQSPIPSU_ISR_TXNOT_FULL_WIDTH   1
+#define XQSPIPSU_ISR_TXNOT_FULL_MASK    0X00000004U
+
+#define XQSPIPSU_ISR_POLL_TIME_EXPIRE_SHIFT   1
+#define XQSPIPSU_ISR_POLL_TIME_EXPIRE_WIDTH   1
+#define XQSPIPSU_ISR_POLL_TIME_EXPIRE_MASK    0X00000002U
+
+#define XQSPIPSU_ISR_WR_TO_CLR_MASK 0X00000002U
+
+/**
+ * Register: XQSPIPSU_IER
+ */
+#define XQSPIPSU_IER_OFFSET    0X00000008U
+
+#define XQSPIPSU_IER_RXEMPTY_SHIFT   11
+#define XQSPIPSU_IER_RXEMPTY_WIDTH   1
+#define XQSPIPSU_IER_RXEMPTY_MASK    0X00000800U
+
+#define XQSPIPSU_IER_GENFIFOFULL_SHIFT   10
+#define XQSPIPSU_IER_GENFIFOFULL_WIDTH   1
+#define XQSPIPSU_IER_GENFIFOFULL_MASK    0X00000400U
+
+#define XQSPIPSU_IER_GENFIFONOT_FULL_SHIFT   9
+#define XQSPIPSU_IER_GENFIFONOT_FULL_WIDTH   1
+#define XQSPIPSU_IER_GENFIFONOT_FULL_MASK    0X00000200U
+
+#define XQSPIPSU_IER_TXEMPTY_SHIFT   8
+#define XQSPIPSU_IER_TXEMPTY_WIDTH   1
+#define XQSPIPSU_IER_TXEMPTY_MASK    0X00000100U
+
+#define XQSPIPSU_IER_GENFIFOEMPTY_SHIFT   7
+#define XQSPIPSU_IER_GENFIFOEMPTY_WIDTH   1
+#define XQSPIPSU_IER_GENFIFOEMPTY_MASK    0X00000080U
+
+#define XQSPIPSU_IER_RXFULL_SHIFT   5
+#define XQSPIPSU_IER_RXFULL_WIDTH   1
+#define XQSPIPSU_IER_RXFULL_MASK    0X00000020U
+
+#define XQSPIPSU_IER_RXNEMPTY_SHIFT   4
+#define XQSPIPSU_IER_RXNEMPTY_WIDTH   1
+#define XQSPIPSU_IER_RXNEMPTY_MASK    0X00000010U
+
+#define XQSPIPSU_IER_TXFULL_SHIFT   3
+#define XQSPIPSU_IER_TXFULL_WIDTH   1
+#define XQSPIPSU_IER_TXFULL_MASK    0X00000008U
+
+#define XQSPIPSU_IER_TXNOT_FULL_SHIFT   2
+#define XQSPIPSU_IER_TXNOT_FULL_WIDTH   1
+#define XQSPIPSU_IER_TXNOT_FULL_MASK    0X00000004U
+
+#define XQSPIPSU_IER_POLL_TIME_EXPIRE_SHIFT   1
+#define XQSPIPSU_IER_POLL_TIME_EXPIRE_WIDTH   1
+#define XQSPIPSU_IER_POLL_TIME_EXPIRE_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_IDR
+ */
+#define XQSPIPSU_IDR_OFFSET    0X0000000CU
+
+#define XQSPIPSU_IDR_RXEMPTY_SHIFT   11
+#define XQSPIPSU_IDR_RXEMPTY_WIDTH   1
+#define XQSPIPSU_IDR_RXEMPTY_MASK    0X00000800U
+
+#define XQSPIPSU_IDR_GENFIFOFULL_SHIFT   10
+#define XQSPIPSU_IDR_GENFIFOFULL_WIDTH   1
+#define XQSPIPSU_IDR_GENFIFOFULL_MASK    0X00000400U
+
+#define XQSPIPSU_IDR_GENFIFONOT_FULL_SHIFT   9
+#define XQSPIPSU_IDR_GENFIFONOT_FULL_WIDTH   1
+#define XQSPIPSU_IDR_GENFIFONOT_FULL_MASK    0X00000200U
+
+#define XQSPIPSU_IDR_TXEMPTY_SHIFT   8
+#define XQSPIPSU_IDR_TXEMPTY_WIDTH   1
+#define XQSPIPSU_IDR_TXEMPTY_MASK    0X00000100U
+
+#define XQSPIPSU_IDR_GENFIFOEMPTY_SHIFT   7
+#define XQSPIPSU_IDR_GENFIFOEMPTY_WIDTH   1
+#define XQSPIPSU_IDR_GENFIFOEMPTY_MASK    0X00000080U
+
+#define XQSPIPSU_IDR_RXFULL_SHIFT   5
+#define XQSPIPSU_IDR_RXFULL_WIDTH   1
+#define XQSPIPSU_IDR_RXFULL_MASK    0X00000020U
+
+#define XQSPIPSU_IDR_RXNEMPTY_SHIFT   4
+#define XQSPIPSU_IDR_RXNEMPTY_WIDTH   1
+#define XQSPIPSU_IDR_RXNEMPTY_MASK    0X00000010U
+
+#define XQSPIPSU_IDR_TXFULL_SHIFT   3
+#define XQSPIPSU_IDR_TXFULL_WIDTH   1
+#define XQSPIPSU_IDR_TXFULL_MASK    0X00000008U
+
+#define XQSPIPSU_IDR_TXNOT_FULL_SHIFT   2
+#define XQSPIPSU_IDR_TXNOT_FULL_WIDTH   1
+#define XQSPIPSU_IDR_TXNOT_FULL_MASK    0X00000004U
+
+#define XQSPIPSU_IDR_POLL_TIME_EXPIRE_SHIFT   1
+#define XQSPIPSU_IDR_POLL_TIME_EXPIRE_WIDTH   1
+#define XQSPIPSU_IDR_POLL_TIME_EXPIRE_MASK    0X00000002U
+
+#define XQSPIPSU_IDR_ALL_MASK    0X0FBEU
+
+/**
+ * Register: XQSPIPSU_IMR
+ */
+#define XQSPIPSU_IMR_OFFSET    0X00000010U
+
+#define XQSPIPSU_IMR_RXEMPTY_SHIFT   11
+#define XQSPIPSU_IMR_RXEMPTY_WIDTH   1
+#define XQSPIPSU_IMR_RXEMPTY_MASK    0X00000800U
+
+#define XQSPIPSU_IMR_GENFIFOFULL_SHIFT   10
+#define XQSPIPSU_IMR_GENFIFOFULL_WIDTH   1
+#define XQSPIPSU_IMR_GENFIFOFULL_MASK    0X00000400U
+
+#define XQSPIPSU_IMR_GENFIFONOT_FULL_SHIFT   9
+#define XQSPIPSU_IMR_GENFIFONOT_FULL_WIDTH   1
+#define XQSPIPSU_IMR_GENFIFONOT_FULL_MASK    0X00000200U
+
+#define XQSPIPSU_IMR_TXEMPTY_SHIFT   8
+#define XQSPIPSU_IMR_TXEMPTY_WIDTH   1
+#define XQSPIPSU_IMR_TXEMPTY_MASK    0X00000100U
+
+#define XQSPIPSU_IMR_GENFIFOEMPTY_SHIFT   7
+#define XQSPIPSU_IMR_GENFIFOEMPTY_WIDTH   1
+#define XQSPIPSU_IMR_GENFIFOEMPTY_MASK    0X00000080U
+
+#define XQSPIPSU_IMR_RXFULL_SHIFT   5
+#define XQSPIPSU_IMR_RXFULL_WIDTH   1
+#define XQSPIPSU_IMR_RXFULL_MASK    0X00000020U
+
+#define XQSPIPSU_IMR_RXNEMPTY_SHIFT   4
+#define XQSPIPSU_IMR_RXNEMPTY_WIDTH   1
+#define XQSPIPSU_IMR_RXNEMPTY_MASK    0X00000010U
+
+#define XQSPIPSU_IMR_TXFULL_SHIFT   3
+#define XQSPIPSU_IMR_TXFULL_WIDTH   1
+#define XQSPIPSU_IMR_TXFULL_MASK    0X00000008U
+
+#define XQSPIPSU_IMR_TXNOT_FULL_SHIFT   2
+#define XQSPIPSU_IMR_TXNOT_FULL_WIDTH   1
+#define XQSPIPSU_IMR_TXNOT_FULL_MASK    0X00000004U
+
+#define XQSPIPSU_IMR_POLL_TIME_EXPIRE_SHIFT   1
+#define XQSPIPSU_IMR_POLL_TIME_EXPIRE_WIDTH   1
+#define XQSPIPSU_IMR_POLL_TIME_EXPIRE_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_EN_REG
+ */
+#define XQSPIPSU_EN_OFFSET    0X00000014U
+
+#define XQSPIPSU_EN_SHIFT   0
+#define XQSPIPSU_EN_WIDTH   1
+#define XQSPIPSU_EN_MASK    0X00000001U
+
+/**
+ * Register: XQSPIPSU_TXD
+ */
+#define XQSPIPSU_TXD_OFFSET    0X0000001CU
+
+#define XQSPIPSU_TXD_SHIFT   0
+#define XQSPIPSU_TXD_WIDTH   32
+#define XQSPIPSU_TXD_MASK    0XFFFFFFFFU
+
+#define XQSPIPSU_TXD_DEPTH    64
+
+/**
+ * Register: XQSPIPSU_RXD
+ */
+#define XQSPIPSU_RXD_OFFSET    0X00000020U
+
+#define XQSPIPSU_RXD_SHIFT   0
+#define XQSPIPSU_RXD_WIDTH   32
+#define XQSPIPSU_RXD_MASK    0XFFFFFFFFU
+
+/**
+ * Register: XQSPIPSU_TX_THRESHOLD
+ */
+#define XQSPIPSU_TX_THRESHOLD_OFFSET    0X00000028U
+
+#define XQSPIPSU_TX_FIFO_THRESHOLD_SHIFT   0
+#define XQSPIPSU_TX_FIFO_THRESHOLD_WIDTH   6
+#define XQSPIPSU_TX_FIFO_THRESHOLD_MASK    0X0000003FU
+#define XQSPIPSU_TX_FIFO_THRESHOLD_RESET_VAL    0X01U
+
+/**
+ * Register: XQSPIPSU_RX_THRESHOLD
+ */
+#define XQSPIPSU_RX_THRESHOLD_OFFSET    0X0000002CU
+
+#define XQSPIPSU_RX_FIFO_THRESHOLD_SHIFT   0
+#define XQSPIPSU_RX_FIFO_THRESHOLD_WIDTH   6
+#define XQSPIPSU_RX_FIFO_THRESHOLD_MASK    0X0000003FU
+#define XQSPIPSU_RX_FIFO_THRESHOLD_RESET_VAL    0X01U
+
+#define XQSPIPSU_RXFIFO_THRESHOLD_OPT 32U
+
+/**
+ * Register: XQSPIPSU_GPIO
+ */
+#define XQSPIPSU_GPIO_OFFSET    0X00000030U
+
+#define XQSPIPSU_GPIO_WP_N_SHIFT   0
+#define XQSPIPSU_GPIO_WP_N_WIDTH   1
+#define XQSPIPSU_GPIO_WP_N_MASK    0X00000001U
+
+/**
+ * Register: XQSPIPSU_LPBK_DLY_ADJ
+ */
+#define XQSPIPSU_LPBK_DLY_ADJ_OFFSET    0X00000038U
+
+#define XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_SHIFT   5
+#define XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_WIDTH   1
+#define XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_MASK    0X00000020U
+
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY1_SHIFT   3
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY1_WIDTH   2
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY1_MASK    0X00000018U
+
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY0_SHIFT   0
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY0_WIDTH   3
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY0_MASK    0X00000007U
+
+/**
+ * Register: XQSPIPSU_GEN_FIFO
+ */
+#define XQSPIPSU_GEN_FIFO_OFFSET    0X00000040U
+
+#define XQSPIPSU_GEN_FIFO_DATA_SHIFT   0
+#define XQSPIPSU_GEN_FIFO_DATA_WIDTH   20
+#define XQSPIPSU_GEN_FIFO_DATA_MASK    0X000FFFFFU
+
+/**
+ * Register: XQSPIPSU_SEL
+ */
+#define XQSPIPSU_SEL_OFFSET    0X00000044U
+
+#define XQSPIPSU_SEL_SHIFT   0
+#define XQSPIPSU_SEL_WIDTH   1
+#define XQSPIPSU_SEL_LQSPI_MASK    0X0U
+#define XQSPIPSU_SEL_GQSPI_MASK    0X00000001U
+
+/**
+ * Register: XQSPIPSU_FIFO_CTRL
+ */
+#define XQSPIPSU_FIFO_CTRL_OFFSET    0X0000004CU
+
+#define XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_SHIFT   2
+#define XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_WIDTH   1
+#define XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_MASK    0X00000004U
+
+#define XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_SHIFT   1
+#define XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_WIDTH   1
+#define XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_MASK    0X00000002U
+
+#define XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_SHIFT   0
+#define XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_WIDTH   1
+#define XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_MASK    0X00000001U
+
+/**
+ * Register: XQSPIPSU_GF_THRESHOLD
+ */
+#define XQSPIPSU_GF_THRESHOLD_OFFSET    0X00000050U
+
+#define XQSPIPSU_GEN_FIFO_THRESHOLD_SHIFT   0
+#define XQSPIPSU_GEN_FIFO_THRESHOLD_WIDTH   5
+#define XQSPIPSU_GEN_FIFO_THRESHOLD_MASK    0X0000001F
+#define XQSPIPSU_GEN_FIFO_THRESHOLD_RESET_VAL    0X10U
+
+/**
+ * Register: XQSPIPSU_POLL_CFG
+ */
+#define XQSPIPSU_POLL_CFG_OFFSET    0X00000054U
+
+#define XQSPIPSU_POLL_CFG_EN_MASK_UPPER_SHIFT   31
+#define XQSPIPSU_POLL_CFG_EN_MASK_UPPER_WIDTH   1
+#define XQSPIPSU_POLL_CFG_EN_MASK_UPPER_MASK    0X80000000U
+
+#define XQSPIPSU_POLL_CFG_EN_MASK_LOWER_SHIFT   30
+#define XQSPIPSU_POLL_CFG_EN_MASK_LOWER_WIDTH   1
+#define XQSPIPSU_POLL_CFG_EN_MASK_LOWER_MASK    0X40000000U
+
+#define XQSPIPSU_POLL_CFG_MASK_EN_SHIFT   8
+#define XQSPIPSU_POLL_CFG_MASK_EN_WIDTH   8
+#define XQSPIPSU_POLL_CFG_MASK_EN_MASK    0X0000FF00U
+
+#define XQSPIPSU_POLL_CFG_DATA_VALUE_SHIFT   0
+#define XQSPIPSU_POLL_CFG_DATA_VALUE_WIDTH   8
+#define XQSPIPSU_POLL_CFG_DATA_VALUE_MASK    0X000000FFU
+
+/**
+ * Register: XQSPIPSU_P_TIMEOUT
+ */
+#define XQSPIPSU_P_TO_OFFSET    0X00000058U
+
+#define XQSPIPSU_P_TO_VALUE_SHIFT   0
+#define XQSPIPSU_P_TO_VALUE_WIDTH   32
+#define XQSPIPSU_P_TO_VALUE_MASK    0XFFFFFFFFU
+
+/**
+ * Register: XQSPIPSU_XFER_STS
+ */
+#define XQSPIPSU_XFER_STS_OFFSET	0X0000005CU
+
+#define XQSPIPSU_XFER_STS_PEND_BYTES_SHIFT   0
+#define XQSPIPSU_XFER_STS_PEND_BYTES_WIDTH   32
+#define XQSPIPSU_XFER_STS_PEND_BYTES_MASK    0XFFFFFFFFU
+
+/**
+ * Register: XQSPIPSU_GF_SNAPSHOT
+ */
+#define XQSPIPSU_GF_SNAPSHOT_OFFSET    0X00000060U
+
+#define XQSPIPSU_GF_SNAPSHOT_SHIFT   0
+#define XQSPIPSU_GF_SNAPSHOT_WIDTH   20
+#define XQSPIPSU_GF_SNAPSHOT_MASK    0X000FFFFFU
+
+/**
+ * Register: XQSPIPSU_RX_COPY
+ */
+#define XQSPIPSU_RX_COPY_OFFSET    0X00000064U
+
+#define XQSPIPSU_RX_COPY_UPPER_SHIFT   8
+#define XQSPIPSU_RX_COPY_UPPER_WIDTH   8
+#define XQSPIPSU_RX_COPY_UPPER_MASK    0X0000FF00U
+
+#define XQSPIPSU_RX_COPY_LOWER_SHIFT   0
+#define XQSPIPSU_RX_COPY_LOWER_WIDTH   8
+#define XQSPIPSU_RX_COPY_LOWER_MASK    0X000000FFU
+
+/**
+ * Register: XQSPIPSU_MOD_ID
+ */
+#define XQSPIPSU_MOD_ID_OFFSET    0X000000FCU
+
+#define XQSPIPSU_MOD_ID_SHIFT   0
+#define XQSPIPSU_MOD_ID_WIDTH   32
+#define XQSPIPSU_MOD_ID_MASK    0XFFFFFFFFU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_ADDR
+ */
+#define XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET    0X00000700U
+
+#define XQSPIPSU_QSPIDMA_DST_ADDR_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_ADDR_WIDTH   30
+#define XQSPIPSU_QSPIDMA_DST_ADDR_MASK    0XFFFFFFFCU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_SIZE
+ */
+#define XQSPIPSU_QSPIDMA_DST_SIZE_OFFSET    0X00000704U
+
+#define XQSPIPSU_QSPIDMA_DST_SIZE_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_SIZE_WIDTH   27
+#define XQSPIPSU_QSPIDMA_DST_SIZE_MASK    0X1FFFFFFCU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_STS
+ */
+#define XQSPIPSU_QSPIDMA_DST_STS_OFFSET    0X00000708U
+
+#define XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_SHIFT   13
+#define XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_WIDTH   3
+#define XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_MASK    0X0000E000U
+
+#define XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_SHIFT   5
+#define XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_WIDTH   8
+#define XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_MASK    0X00001FE0U
+
+#define XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_WIDTH   4
+#define XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_MASK    0X0000001EU
+
+#define XQSPIPSU_QSPIDMA_DST_STS_BUSY_SHIFT   0
+#define XQSPIPSU_QSPIDMA_DST_STS_BUSY_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_STS_BUSY_MASK    0X00000001U
+
+#define XQSPIPSU_QSPIDMA_DST_STS_WTC	0xE000U
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_CTRL
+ */
+#define XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET    0X0000070CU
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_SHIFT   25
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_WIDTH   7
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_MASK    0XFE000000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_SHIFT   24
+#define XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_MASK    0X01000000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_SHIFT   23
+#define XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_MASK    0X00800000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_SHIFT   22
+#define XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_MASK    0X00400000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_SHIFT   10
+#define XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_WIDTH   12
+#define XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_MASK    0X003FFC00U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_WIDTH   8
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_MASK    0X000003FCU
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_MASK    0X00000002U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_SHIFT   0
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_MASK    0X00000001U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_RESET_VAL	0x403FFA00U
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_I_STS
+ */
+#define XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET    0X00000714U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_SHIFT   7
+#define XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_MASK    0X00000080U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_SHIFT   6
+#define XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_MASK    0X00000040U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_SHIFT   5
+#define XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_MASK    0X00000020U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_SHIFT   4
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_MASK    0X00000010U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_SHIFT   3
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_MASK    0X00000008U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_MASK    0X00000004U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_DONE_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_DONE_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_DONE_MASK    0X00000002U
+
+#define XQSPIPSU_QSPIDMA_DST_INTR_ERR_MASK    0X000000FCU
+#define XQSPIPSU_QSPIDMA_DST_INTR_ALL_MASK    0X000000FEU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_I_EN
+ */
+#define XQSPIPSU_QSPIDMA_DST_I_EN_OFFSET    0X00000718U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_SHIFT   7
+#define XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_MASK    0X00000080U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_SHIFT   6
+#define XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_MASK    0X00000040U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_SHIFT   5
+#define XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_MASK    0X00000020U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_SHIFT   4
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_MASK    0X00000010U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_SHIFT   3
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_MASK    0X00000008U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_MASK    0X00000004U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_DONE_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_DONE_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_DONE_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_I_DIS
+ */
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET    0X0000071CU
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_SHIFT   7
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_MASK    0X00000080U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_SHIFT   6
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_MASK    0X00000040U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_SHIFT   5
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_MASK    0X00000020U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_SHIFT   4
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_MASK    0X00000010U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_SHIFT   3
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_MASK    0X00000008U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_MASK    0X00000004U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_IMR
+ */
+#define XQSPIPSU_QSPIDMA_DST_IMR_OFFSET    0X00000720U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_SHIFT   7
+#define XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_MASK    0X00000080U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_SHIFT   6
+#define XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_MASK    0X00000040U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_SHIFT   5
+#define XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_MASK    0X00000020U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_SHIFT   4
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_MASK    0X00000010U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_SHIFT   3
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_MASK    0X00000008U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_MASK    0X00000004U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_DONE_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_DONE_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_DONE_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_CTRL2
+ */
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_OFFSET    0X00000724U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_SHIFT   27
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_MASK    0X08000000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_SHIFT   24
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_WIDTH   3
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_MASK    0X07000000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_SHIFT   22
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_MASK    0X00400000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_SHIFT   19
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_WIDTH   3
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_MASK    0X00380000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_SHIFT   16
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_WIDTH   3
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_MASK    0X00070000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_SHIFT   4
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_WIDTH   12
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_MASK    0X0000FFF0U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_SHIFT   0
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_WIDTH   4
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_MASK    0X0000000FU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_ADDR_MSB
+ */
+#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_OFFSET    0X00000728U
+
+#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_SHIFT   0
+#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_WIDTH   12
+#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_MASK    0X00000FFFU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_FUTURE_ECO
+ */
+#define XQSPIPSU_QSPIDMA_FUTURE_ECO_OFFSET    0X00000EFCU
+
+#define XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_SHIFT   0
+#define XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_WIDTH   32
+#define XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_MASK    0XFFFFFFFFU
+
+/*
+ * Generic FIFO masks
+ */
+#define XQSPIPSU_GENFIFO_IMM_DATA_MASK	0xFFU
+#define XQSPIPSU_GENFIFO_DATA_XFER	0x100U
+#define XQSPIPSU_GENFIFO_EXP		0x200U
+#define XQSPIPSU_GENFIFO_MODE_SPI	0x400U
+#define XQSPIPSU_GENFIFO_MODE_DUALSPI	0x800U
+#define XQSPIPSU_GENFIFO_MODE_QUADSPI	0xC00U
+#define XQSPIPSU_GENFIFO_MODE_MASK	0xC00U	/* And with ~MASK first */
+#define XQSPIPSU_GENFIFO_CS_LOWER	0x1000U
+#define XQSPIPSU_GENFIFO_CS_UPPER	0x2000U
+#define XQSPIPSU_GENFIFO_BUS_LOWER	0x4000U
+#define XQSPIPSU_GENFIFO_BUS_UPPER	0x8000U
+#define XQSPIPSU_GENFIFO_BUS_BOTH	0xC000U	/* inverse is no bus */
+#define XQSPIPSU_GENFIFO_BUS_MASK	0xC000U	/* And with ~MASK first */
+#define XQSPIPSU_GENFIFO_TX		0x10000U	/* inverse is zero pump */
+#define XQSPIPSU_GENFIFO_RX		0x20000U	/* inverse is RX discard */
+#define XQSPIPSU_GENFIFO_STRIPE		0x40000U
+#define XQSPIPSU_GENFIFO_POLL		0x80000U
+
+/*QSPI Data delay register*/
+#define XQSPIPSU_DATA_DLY_ADJ_OFFSET    0X000000F8U
+
+#define XQSPIPSU_DATA_DLY_ADJ_USE_DATA_DLY_SHIFT   31
+#define XQSPIPSU_DATA_DLY_ADJ_USE_DATA_DLY_WIDTH   1
+#define XQSPIPSU_DATA_DLY_ADJ_USE_DATA_DLY_MASK    0X80000000U
+
+#define XQSPIPSU_DATA_DLY_ADJ_DLY_SHIFT   28
+#define XQSPIPSU_DATA_DLY_ADJ_DLY_WIDTH   3
+#define XQSPIPSU_DATA_DLY_ADJ_DLY_MASK    0X70000000U
+
+/* Tapdelay Bypass register*/
+#define IOU_TAPDLY_BYPASS_OFFSET 0X00000390
+#define IOU_TAPDLY_BYPASS_LQSPI_RX_SHIFT 0X02
+#define IOU_TAPDLY_BYPASS_LQSPI_RX_WIDTH 0X01
+#define IOU_TAPDLY_BYPASS_LQSPI_RX_MASK 0x00000004
+#define IOU_TAPDLY_RESET_STATE 0x7
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XQspiPsu_In32 Xil_In32
+#define XQspiPsu_Out32 Xil_Out32
+
+/****************************************************************************/
+/**
+* Read a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to the target register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XQspiPsu_ReadReg(u32 BaseAddress. s32 RegOffset)
+*
+******************************************************************************/
+#define XQspiPsu_ReadReg(BaseAddress, RegOffset) XQspiPsu_In32((BaseAddress) + (RegOffset))
+
+/***************************************************************************/
+/**
+* Write to a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to target register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XQspiPsu_WriteReg(u32 BaseAddress, s32 RegOffset,
+*		u32 RegisterValue)
+*
+******************************************************************************/
+#define XQspiPsu_WriteReg(BaseAddress, RegOffset, RegisterValue) XQspiPsu_Out32((BaseAddress) + (RegOffset), (RegisterValue))
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* _XQSPIPSU_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xreg_cortexr5.h b/src/Xilinx/include/xreg_cortexr5.h
new file mode 100644
index 0000000..9d28c0a
--- /dev/null
+++ b/src/Xilinx/include/xreg_cortexr5.h
@@ -0,0 +1,445 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xreg_cortexr5.h
+*
+* This header file contains definitions for using inline assembler code. It is
+* written specifically for the GNU, IAR, ARMCC compiler.
+*
+* All of the ARM Cortex R5 GPRs, SPRs, and Debug Registers are defined along
+* with the positions of the bits within the registers.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 

+*
+******************************************************************************/
+#ifndef XREG_CORTEXR5_H	/* prevent circular inclusions */
+#define XREG_CORTEXR5_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* GPRs */
+#define XREG_GPR0				r0
+#define XREG_GPR1				r1
+#define XREG_GPR2				r2
+#define XREG_GPR3				r3
+#define XREG_GPR4				r4
+#define XREG_GPR5				r5
+#define XREG_GPR6				r6
+#define XREG_GPR7				r7
+#define XREG_GPR8				r8
+#define XREG_GPR9				r9
+#define XREG_GPR10				r10
+#define XREG_GPR11				r11
+#define XREG_GPR12				r12
+#define XREG_GPR13				r13
+#define XREG_GPR14				r14
+#define XREG_GPR15				r15
+#define XREG_CPSR				cpsr
+
+/* Coprocessor number defines */
+#define XREG_CP0				0
+#define XREG_CP1				1
+#define XREG_CP2				2
+#define XREG_CP3				3
+#define XREG_CP4				4
+#define XREG_CP5				5
+#define XREG_CP6				6
+#define XREG_CP7				7
+#define XREG_CP8				8
+#define XREG_CP9				9
+#define XREG_CP10				10
+#define XREG_CP11				11
+#define XREG_CP12				12
+#define XREG_CP13				13
+#define XREG_CP14				14
+#define XREG_CP15				15
+
+/* Coprocessor control register defines */
+#define XREG_CR0				cr0
+#define XREG_CR1				cr1
+#define XREG_CR2				cr2
+#define XREG_CR3				cr3
+#define XREG_CR4				cr4
+#define XREG_CR5				cr5
+#define XREG_CR6				cr6
+#define XREG_CR7				cr7
+#define XREG_CR8				cr8
+#define XREG_CR9				cr9
+#define XREG_CR10				cr10
+#define XREG_CR11				cr11
+#define XREG_CR12				cr12
+#define XREG_CR13				cr13
+#define XREG_CR14				cr14
+#define XREG_CR15				cr15
+
+/* Current Processor Status Register (CPSR) Bits */
+#define XREG_CPSR_THUMB_MODE			0x20U
+#define XREG_CPSR_MODE_BITS			0x1FU
+#define XREG_CPSR_SYSTEM_MODE			0x1FU
+#define XREG_CPSR_UNDEFINED_MODE		0x1BU
+#define XREG_CPSR_DATA_ABORT_MODE		0x17U
+#define XREG_CPSR_SVC_MODE			0x13U
+#define XREG_CPSR_IRQ_MODE			0x12U
+#define XREG_CPSR_FIQ_MODE			0x11U
+#define XREG_CPSR_USER_MODE			0x10U
+
+#define XREG_CPSR_IRQ_ENABLE			0x80U
+#define XREG_CPSR_FIQ_ENABLE			0x40U
+
+#define XREG_CPSR_N_BIT				0x80000000U
+#define XREG_CPSR_Z_BIT				0x40000000U
+#define XREG_CPSR_C_BIT				0x20000000U
+#define XREG_CPSR_V_BIT				0x10000000U
+
+/*MPU region definitions*/
+#define REGION_32B     0x00000004U
+#define REGION_64B     0x00000005U
+#define REGION_128B    0x00000006U
+#define REGION_256B    0x00000007U
+#define REGION_512B    0x00000008U
+#define REGION_1K      0x00000009U
+#define REGION_2K      0x0000000AU
+#define REGION_4K      0x0000000BU
+#define REGION_8K      0x0000000CU
+#define REGION_16K     0x0000000DU
+#define REGION_32K     0x0000000EU
+#define REGION_64K     0x0000000FU
+#define REGION_128K    0x00000010U
+#define REGION_256K    0x00000011U
+#define REGION_512K    0x00000012U
+#define REGION_1M      0x00000013U
+#define REGION_2M      0x00000014U
+#define REGION_4M      0x00000015U
+#define REGION_8M      0x00000016U
+#define REGION_16M     0x00000017U
+#define REGION_32M     0x00000018U
+#define REGION_64M     0x00000019U
+#define REGION_128M    0x0000001AU
+#define REGION_256M    0x0000001BU
+#define REGION_512M    0x0000001CU
+#define REGION_1G      0x0000001DU
+#define REGION_2G      0x0000001EU
+#define REGION_4G      0x0000001FU
+
+#define REGION_EN  0x00000001U
+
+
+
+#define SHAREABLE				0x00000004U 	/*shareable */
+#define STRONG_ORDERD_SHARED	0x00000000U	/*strongly ordered, always shareable*/
+
+#define DEVICE_SHARED			0x00000001U	/*device, shareable*/
+#define DEVICE_NONSHARED		0x00000010U	/*device, non shareable*/
+
+#define NORM_NSHARED_WT_NWA		0x00000002U 	/*Outer and Inner write-through, no write-allocate non-shareable*/
+#define NORM_SHARED_WT_NWA		0x00000006U 	/*Outer and Inner write-through, no write-allocate shareable*/
+
+#define NORM_NSHARED_WB_NWA 	0x00000003U 	/*Outer and Inner write-back, no write-allocate non shareable*/
+#define NORM_SHARED_WB_NWA 		0x00000007U 	/*Outer and Inner write-back, no write-allocate shareable*/
+
+#define NORM_NSHARED_NCACHE 	0x00000008U 	/*Outer and Inner Non cacheable  non shareable*/
+#define NORM_SHARED_NCACHE 		0x0000000CU 	/*Outer and Inner Non cacheable shareable*/
+
+#define NORM_NSHARED_WB_WA 		0x0000000BU 	/*Outer and Inner write-back non shared*/
+#define NORM_SHARED_WB_WA 		0x0000000FU 	/*Outer and Inner write-back shared*/
+
+/* inner and outer cache policies can be combined for different combinations */
+
+#define NORM_IN_POLICY_NCACHE	0x00000020U	/*inner non cacheable*/
+#define NORM_IN_POLICY_WB_WA	0x00000021U	/*inner write back write allocate*/
+#define NORM_IN_POLICY_WT_NWA	0x00000022U	/*inner write through no write allocate*/
+#define NORM_IN_POLICY_WB_NWA	0x00000023U	/*inner write back no write allocate*/
+
+#define NORM_OUT_POLICY_NCACHE	0x00000020U	/*outer non cacheable*/
+#define NORM_OUT_POLICY_WB_WA	0x00000028U	/*outer write back write allocate*/
+#define NORM_OUT_POLICY_WT_NWA	0x00000030U	/*outer write through no write allocate*/
+#define NORM_OUT_POLICY_WB_NWA	0x00000038U	/*outer write back no write allocate*/
+
+#define NO_ACCESS				(0x00000000U<<8U)	/*No access*/
+#define PRIV_RW_USER_NA			(0x00000001U<<8U) /*Privileged access only*/
+#define PRIV_RW_USER_RO			(0x00000002U<<8U) /*Writes in User mode generate permission faults*/
+#define	PRIV_RW_USER_RW			(0x00000003U<<8U)	/*Full Access*/
+#define PRIV_RO_USER_NA			(0x00000005U<<8U) /*Privileged eead only*/
+#define PRIV_RO_USER_RO			(0x00000006U<<8U) /*Privileged/User read-only*/
+
+#define EXECUTE_NEVER  			(0x00000001U<<12U)  /* Bit 12*/
+
+
+/* CP15 defines */
+
+/* C0 Register defines */
+#define XREG_CP15_MAIN_ID			"p15, 0, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_TYPE			"p15, 0, %0,  c0,  c0, 1"
+#define XREG_CP15_TCM_TYPE			"p15, 0, %0,  c0,  c0, 2"
+#define XREG_CP15_TLB_TYPE			"p15, 0, %0,  c0,  c0, 3"
+#define XREG_CP15_MPU_TYPE			"p15, 0, %0,  c0,  c0, 4"
+#define XREG_CP15_MULTI_PROC_AFFINITY		"p15, 0, %0,  c0,  c0, 5"
+
+#define XREG_CP15_PROC_FEATURE_0		"p15, 0, %0,  c0,  c1, 0"
+#define XREG_CP15_PROC_FEATURE_1		"p15, 0, %0,  c0,  c1, 1"
+#define XREG_CP15_DEBUG_FEATURE_0		"p15, 0, %0,  c0,  c1, 2"
+#define XREG_CP15_MEMORY_FEATURE_0		"p15, 0, %0,  c0,  c1, 4"
+#define XREG_CP15_MEMORY_FEATURE_1		"p15, 0, %0,  c0,  c1, 5"
+#define XREG_CP15_MEMORY_FEATURE_2		"p15, 0, %0,  c0,  c1, 6"
+#define XREG_CP15_MEMORY_FEATURE_3		"p15, 0, %0,  c0,  c1, 7"
+
+#define XREG_CP15_INST_FEATURE_0		"p15, 0, %0,  c0,  c2, 0"
+#define XREG_CP15_INST_FEATURE_1		"p15, 0, %0,  c0,  c2, 1"
+#define XREG_CP15_INST_FEATURE_2		"p15, 0, %0,  c0,  c2, 2"
+#define XREG_CP15_INST_FEATURE_3		"p15, 0, %0,  c0,  c2, 3"
+#define XREG_CP15_INST_FEATURE_4		"p15, 0, %0,  c0,  c2, 4"
+#define XREG_CP15_INST_FEATURE_5		"p15, 0, %0,  c0,  c2, 5"
+
+#define XREG_CP15_CACHE_SIZE_ID			"p15, 1, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_LEVEL_ID		"p15, 1, %0,  c0,  c0, 1"
+#define XREG_CP15_AUXILARY_ID			"p15, 1, %0,  c0,  c0, 7"
+
+#define XREG_CP15_CACHE_SIZE_SEL		"p15, 2, %0,  c0,  c0, 0"
+
+/* C1 Register Defines */
+#define XREG_CP15_SYS_CONTROL			"p15, 0, %0,  c1,  c0, 0"
+#define XREG_CP15_AUX_CONTROL			"p15, 0, %0,  c1,  c0, 1"
+#define XREG_CP15_CP_ACCESS_CONTROL		"p15, 0, %0,  c1,  c0, 2"
+
+
+/* XREG_CP15_CONTROL bit defines */
+#define XREG_CP15_CONTROL_TE_BIT		0x40000000U
+#define XREG_CP15_CONTROL_AFE_BIT		0x20000000U
+#define XREG_CP15_CONTROL_TRE_BIT		0x10000000U
+#define XREG_CP15_CONTROL_NMFI_BIT		0x08000000U
+#define XREG_CP15_CONTROL_EE_BIT		0x02000000U
+#define XREG_CP15_CONTROL_HA_BIT		0x00020000U
+#define XREG_CP15_CONTROL_RR_BIT		0x00004000U
+#define XREG_CP15_CONTROL_V_BIT			0x00002000U
+#define XREG_CP15_CONTROL_I_BIT			0x00001000U
+#define XREG_CP15_CONTROL_Z_BIT			0x00000800U
+#define XREG_CP15_CONTROL_SW_BIT		0x00000400U
+#define XREG_CP15_CONTROL_B_BIT			0x00000080U
+#define XREG_CP15_CONTROL_C_BIT			0x00000004U
+#define XREG_CP15_CONTROL_A_BIT			0x00000002U
+#define XREG_CP15_CONTROL_M_BIT			0x00000001U
+/* C2 Register Defines */
+/* Not Used */
+
+/* C3 Register Defines */
+/* Not Used */
+
+/* C4 Register Defines */
+/* Not Used */
+
+/* C5 Register Defines */
+#define XREG_CP15_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 0"
+#define XREG_CP15_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 1"
+
+#define XREG_CP15_AUX_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 0"
+#define XREG_CP15_AUX_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 1"
+
+/* C6 Register Defines */
+#define XREG_CP15_DATA_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 0"
+#define XREG_CP15_INST_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 2"
+
+#define XREG_CP15_MPU_REG_BASEADDR			"p15, 0, %0,  c6,  c1, 0"
+#define XREG_CP15_MPU_REG_SIZE_EN			"p15, 0, %0,  c6,  c1, 2"
+#define XREG_CP15_MPU_REG_ACCESS_CTRL		"p15, 0, %0,  c6,  c1, 4"
+
+#define XREG_CP15_MPU_MEMORY_REG_NUMBER			"p15, 0, %0,  c6,  c2, 0"
+
+/* C7 Register Defines */
+#define XREG_CP15_NOP				"p15, 0, %0,  c7,  c0, 4"
+
+#define XREG_CP15_INVAL_IC_POU			"p15, 0, %0,  c7,  c5, 0"
+#define XREG_CP15_INVAL_IC_LINE_MVA_POU		"p15, 0, %0,  c7,  c5, 1"
+
+/* The CP15 register access below has been deprecated in favor of the new
+ * isb instruction in Cortex R5.
+ */
+#define XREG_CP15_INST_SYNC_BARRIER		"p15, 0, %0,  c7,  c5, 4"
+#define XREG_CP15_INVAL_BRANCH_ARRAY		"p15, 0, %0,  c7,  c5, 6"
+#define XREG_CP15_INVAL_BRANCH_ARRAY_LINE		"p15, 0, %0,  c7,  c5, 7"
+
+#define XREG_CP15_INVAL_DC_LINE_MVA_POC		"p15, 0, %0,  c7,  c6, 1"
+#define XREG_CP15_INVAL_DC_LINE_SW		"p15, 0, %0,  c7,  c6, 2"
+
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POC		"p15, 0, %0,  c7, c10, 1"
+#define XREG_CP15_CLEAN_DC_LINE_SW		"p15, 0, %0,  c7, c10, 2"
+
+#define XREG_CP15_INVAL_DC_ALL		"p15, 0, %0,  c15, c5, 0"
+/* The next two CP15 register accesses below have been deprecated in favor
+ * of the new dsb and dmb instructions in Cortex R5.
+ */
+#define XREG_CP15_DATA_SYNC_BARRIER		"p15, 0, %0,  c7, c10, 4"
+#define XREG_CP15_DATA_MEMORY_BARRIER		"p15, 0, %0,  c7, c10, 5"
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POU		"p15, 0, %0,  c7, c11, 1"
+
+#define XREG_CP15_NOP2				"p15, 0, %0,  c7, c13, 1"
+
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC	"p15, 0, %0,  c7, c14, 1"
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_SW	"p15, 0, %0,  c7, c14, 2"
+
+/* C8 Register Defines */
+/* Not Used */
+
+
+/* C9 Register Defines */
+
+#define XREG_CP15_ATCM_REG_SIZE_ADDR		"p15, 0, %0,  c9, c1, 1"
+#define XREG_CP15_BTCM_REG_SIZE_ADDR		"p15, 0, %0,  c9, c1, 0"
+#define XREG_CP15_TCM_SELECTION				"p15, 0, %0,  c9, c2, 0"
+
+#define XREG_CP15_PERF_MONITOR_CTRL		"p15, 0, %0,  c9, c12, 0"
+#define XREG_CP15_COUNT_ENABLE_SET		"p15, 0, %0,  c9, c12, 1"
+#define XREG_CP15_COUNT_ENABLE_CLR		"p15, 0, %0,  c9, c12, 2"
+#define XREG_CP15_V_FLAG_STATUS			"p15, 0, %0,  c9, c12, 3"
+#define XREG_CP15_SW_INC			"p15, 0, %0,  c9, c12, 4"
+#define XREG_CP15_EVENT_CNTR_SEL		"p15, 0, %0,  c9, c12, 5"
+
+#define XREG_CP15_PERF_CYCLE_COUNTER		"p15, 0, %0,  c9, c13, 0"
+#define XREG_CP15_EVENT_TYPE_SEL		"p15, 0, %0,  c9, c13, 1"
+#define XREG_CP15_PERF_MONITOR_COUNT		"p15, 0, %0,  c9, c13, 2"
+
+#define XREG_CP15_USER_ENABLE			"p15, 0, %0,  c9, c14, 0"
+#define XREG_CP15_INTR_ENABLE_SET		"p15, 0, %0,  c9, c14, 1"
+#define XREG_CP15_INTR_ENABLE_CLR		"p15, 0, %0,  c9, c14, 2"
+
+/* C10 Register Defines */
+/* Not used */
+
+/* C11 Register Defines */
+/* Not used */
+
+/* C12 Register Defines */
+/* Not used */
+
+/* C13 Register Defines */
+#define XREG_CP15_CONTEXT_ID			"p15, 0, %0, c13,  c0, 1"
+#define USER_RW_THREAD_PID			"p15, 0, %0, c13,  c0, 2"
+#define USER_RO_THREAD_PID			"p15, 0, %0, c13,  c0, 3"
+#define USER_PRIV_THREAD_PID			"p15, 0, %0, c13,  c0, 4"
+
+/* C14 Register Defines */
+/* not used */
+
+/* C15 Register Defines */
+#define XREG_CP15_SEC_AUX_CTRL			"p15, 0, %0, c15,  c0, 0"
+
+
+
+
+/* MPE register definitions */
+#define XREG_FPSID				c0
+#define XREG_FPSCR				c1
+#define XREG_MVFR1				c6
+#define XREG_MVFR0				c7
+#define XREG_FPEXC				c8
+#define XREG_FPINST				c9
+#define XREG_FPINST2			c10
+
+/* FPSID bits */
+#define XREG_FPSID_IMPLEMENTER_BIT	(24U)
+#define XREG_FPSID_IMPLEMENTER_MASK	(0x000000FFU << FPSID_IMPLEMENTER_BIT)
+#define XREG_FPSID_SOFTWARE		(0X00000001U << 23U)
+#define XREG_FPSID_ARCH_BIT		(16U)
+#define XREG_FPSID_ARCH_MASK		(0x0000000FU  << FPSID_ARCH_BIT)
+#define XREG_FPSID_PART_BIT		(8U)
+#define XREG_FPSID_PART_MASK		(0x000000FFU << FPSID_PART_BIT)
+#define XREG_FPSID_VARIANT_BIT		(4U)
+#define XREG_FPSID_VARIANT_MASK		(0x0000000FU  << FPSID_VARIANT_BIT)
+#define XREG_FPSID_REV_BIT		(0U)
+#define XREG_FPSID_REV_MASK		(0x0000000FU  << FPSID_REV_BIT)
+
+/* FPSCR bits */
+#define XREG_FPSCR_N_BIT		(0X00000001U << 31U)
+#define XREG_FPSCR_Z_BIT		(0X00000001U << 30U)
+#define XREG_FPSCR_C_BIT		(0X00000001U << 29U)
+#define XREG_FPSCR_V_BIT		(0X00000001U << 28U)
+#define XREG_FPSCR_QC			(0X00000001U << 27U)
+#define XREG_FPSCR_AHP			(0X00000001U << 26U)
+#define XREG_FPSCR_DEFAULT_NAN		(0X00000001U << 25U)
+#define XREG_FPSCR_FLUSHTOZERO		(0X00000001U << 24U)
+#define XREG_FPSCR_ROUND_NEAREST	(0X00000000U << 22U)
+#define XREG_FPSCR_ROUND_PLUSINF	(0X00000001U << 22U)
+#define XREG_FPSCR_ROUND_MINUSINF	(0X00000002U << 22U)
+#define XREG_FPSCR_ROUND_TOZERO		(0X00000003U << 22U)
+#define XREG_FPSCR_RMODE_BIT		(22U)
+#define XREG_FPSCR_RMODE_MASK		(0X00000003U << FPSCR_RMODE_BIT)
+#define XREG_FPSCR_STRIDE_BIT		(20U)
+#define XREG_FPSCR_STRIDE_MASK		(0X00000003U << FPSCR_STRIDE_BIT)
+#define XREG_FPSCR_LENGTH_BIT		(16U)
+#define XREG_FPSCR_LENGTH_MASK		(0X00000007U << FPSCR_LENGTH_BIT)
+#define XREG_FPSCR_IDC			(0X00000001U << 7U)
+#define XREG_FPSCR_IXC			(0X00000001U << 4U)
+#define XREG_FPSCR_UFC			(0X00000001U << 3U)
+#define XREG_FPSCR_OFC			(0X00000001U << 2U)
+#define XREG_FPSCR_DZC			(0X00000001U << 1U)
+#define XREG_FPSCR_IOC			(0X00000001U << 0U)
+
+/* MVFR0 bits */
+#define XREG_MVFR0_RMODE_BIT		(28U)
+#define XREG_MVFR0_RMODE_MASK		(0x0000000FU << XREG_MVFR0_RMODE_BIT)
+#define XREG_MVFR0_SHORT_VEC_BIT	(24U)
+#define XREG_MVFR0_SHORT_VEC_MASK	(0x0000000FU << XREG_MVFR0_SHORT_VEC_BIT)
+#define XREG_MVFR0_SQRT_BIT		(20U)
+#define XREG_MVFR0_SQRT_MASK		(0x0000000FU << XREG_MVFR0_SQRT_BIT)
+#define XREG_MVFR0_DIVIDE_BIT		(16U)
+#define XREG_MVFR0_DIVIDE_MASK		(0x0000000FU << XREG_MVFR0_DIVIDE_BIT)
+#define XREG_MVFR0_EXEC_TRAP_BIT	(12U)
+#define XREG_MVFR0_EXEC_TRAP_MASK	(0x0000000FU << XREG_MVFR0_EXEC_TRAP_BIT)
+#define XREG_MVFR0_DP_BIT		(8U)
+#define XREG_MVFR0_DP_MASK		(0x0000000FU << XREG_MVFR0_DP_BIT)
+#define XREG_MVFR0_SP_BIT		(4U)
+#define XREG_MVFR0_SP_MASK		(0x0000000FU << XREG_MVFR0_SP_BIT)
+#define XREG_MVFR0_A_SIMD_BIT		(0U)
+#define XREG_MVFR0_A_SIMD_MASK		(0x0000000FU << MVFR0_A_SIMD_BIT)
+
+/* FPEXC bits */
+#define XREG_FPEXC_EX			(0X00000001U << 31U)
+#define XREG_FPEXC_EN			(0X00000001U << 30U)
+#define XREG_FPEXC_DEX			(0X00000001U << 29U)
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XREG_CORTEXR5_H */
diff --git a/src/Xilinx/include/xresetps.h b/src/Xilinx/include/xresetps.h
new file mode 100644
index 0000000..f6a632b
--- /dev/null
+++ b/src/Xilinx/include/xresetps.h
@@ -0,0 +1,382 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xresetps.h
+* @addtogroup xresetps_v1_0
+* @{
+* @details
+*
+* The Xilinx Reset Controller driver supports the following features:
+*   - Assert reset for specific peripheral.
+*   - Deassert reset for specific peripheral.
+*   - Pulse reset for specific peripheral.
+*   - Get reset status for specific peripheral.
+*
+* This driver is intended to be RTOS and processor independent. It works with
+* physical addresses only.  Any needs for dynamic memory management, threads
+* or thread mutual exclusion, virtual memory, or cache control must be
+* satisfied by the layer above this driver.
+*
+* 
+* MODIFICATION HISTORY:
+* Ver   Who    Date     Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00  cjp    09/05/17 First release
+* 

+*
+******************************************************************************/
+#ifndef XRESETPS_H		/* prevent circular inclusions */
+#define XRESETPS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xresetps_hw.h"
+
+#if defined (__aarch64__)
+#include "xil_smc.h"
+#endif
+
+/************************** Constant Definitions *****************************/
+/*
+ * Constants for supported/Not supported reset actions
+ */
+#define XRESETPS_SUP                   1
+#define XRESETPS_NOSUP                 0
+
+/**************************** Type Definitions *******************************/
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;                    /**< Unique ID of device */
+	u32 BaseAddress;                 /**< Base address of the device */
+} XResetPs_Config;
+
+/**
+ * The XResetPs driver instance data. The user is required to allocate a
+ * variable of this type for every reset controller device in the system.
+ * A pointer to a variable of this type is then passed to the driver API
+ * functions.
+ */
+typedef struct {
+	XResetPs_Config Config;          /**< Hardware Configuration */
+} XResetPs;
+
+/**
+ * This typedef defines type of pulse reset to be executed for peripherals.
+ * 3 type of pulse reset are possible:
+ * 	1. Pulse with no delay and no power state validation
+ * 	2. Pulse with delay but no power state validation
+ * 	3. Pulse with delay and power state validation
+ */
+typedef enum {
+	XRESETPS_PT_NO_DLY_NO_PSCHK,     /**< No delay, no power state check */
+	XRESETPS_PT_DLY_NO_PSCHK,        /**< Delay, no power state check */
+	XRESETPS_PT_DLY_PSCHK,           /**< Delay, power state check */
+	XRESETPS_PT_INVALID,             /**< Invalid pulse type */
+} XResetPs_PulseTypes;
+
+/**
+ * This typedef defines reset actions on the peripherals.
+ */
+typedef enum {
+	XRESETPS_RSTACT_RELEASE,
+	XRESETPS_RSTACT_ASSERT,
+	XRESETPS_RSTACT_PULSE,
+} XresetPs_ResetAction;
+
+/**
+ * This typedef defines resetIDs of peripherals maps to PMUFW resetIDs. This
+ * resetIDs are not offseted by 1000 and are relative.
+ */
+typedef enum {
+	XRESETPS_RSTID_START,
+	XRESETPS_RSTID_PCIE_CFG = XRESETPS_RSTID_START,
+	XRESETPS_RSTID_PCIE_BRIDGE,
+	XRESETPS_RSTID_PCIE_CTRL,
+	XRESETPS_RSTID_DP,
+	XRESETPS_RSTID_SWDT_CRF,
+	XRESETPS_RSTID_AFI_FM5,
+	XRESETPS_RSTID_AFI_FM4,
+	XRESETPS_RSTID_AFI_FM3,
+	XRESETPS_RSTID_AFI_FM2,
+	XRESETPS_RSTID_AFI_FM1,
+	XRESETPS_RSTID_AFI_FM0,
+	XRESETPS_RSTID_GDMA,
+	XRESETPS_RSTID_GPU_PP1,
+	XRESETPS_RSTID_GPU_PP0,
+	XRESETPS_RSTID_GPU,
+	XRESETPS_RSTID_GT,
+	XRESETPS_RSTID_SATA,
+	XRESETPS_RSTID_ACPU3_PWRON,
+	XRESETPS_RSTID_ACPU2_PWRON,
+	XRESETPS_RSTID_ACPU1_PWRON,
+	XRESETPS_RSTID_ACPU0_PWRON,
+	XRESETPS_RSTID_APU_L2,
+	XRESETPS_RSTID_ACPU3,
+	XRESETPS_RSTID_ACPU2,
+	XRESETPS_RSTID_ACPU1,
+	XRESETPS_RSTID_ACPU0,
+	XRESETPS_RSTID_DDR,
+	XRESETPS_RSTID_APM_FPD,
+	XRESETPS_RSTID_SOFT,
+	XRESETPS_RSTID_GEM0,
+	XRESETPS_RSTID_GEM1,
+	XRESETPS_RSTID_GEM2,
+	XRESETPS_RSTID_GEM3,
+	XRESETPS_RSTID_QSPI,
+	XRESETPS_RSTID_UART0,
+	XRESETPS_RSTID_UART1,
+	XRESETPS_RSTID_SPI0,
+	XRESETPS_RSTID_SPI1,
+	XRESETPS_RSTID_SDIO0,
+	XRESETPS_RSTID_SDIO1,
+	XRESETPS_RSTID_CAN0,
+	XRESETPS_RSTID_CAN1,
+	XRESETPS_RSTID_I2C0,
+	XRESETPS_RSTID_I2C1,
+	XRESETPS_RSTID_TTC0,
+	XRESETPS_RSTID_TTC1,
+	XRESETPS_RSTID_TTC2,
+	XRESETPS_RSTID_TTC3,
+	XRESETPS_RSTID_SWDT_CRL,
+	XRESETPS_RSTID_NAND,
+	XRESETPS_RSTID_ADMA,
+	XRESETPS_RSTID_GPIO,
+	XRESETPS_RSTID_IOU_CC,
+	XRESETPS_RSTID_TIMESTAMP,
+	XRESETPS_RSTID_RPU_R50,
+	XRESETPS_RSTID_RPU_R51,
+	XRESETPS_RSTID_RPU_AMBA,
+	XRESETPS_RSTID_OCM,
+	XRESETPS_RSTID_RPU_PGE,
+	XRESETPS_RSTID_USB0_CORERESET,
+	XRESETPS_RSTID_USB1_CORERESET,
+	XRESETPS_RSTID_USB0_HIBERRESET,
+	XRESETPS_RSTID_USB1_HIBERRESET,
+	XRESETPS_RSTID_USB0_APB,
+	XRESETPS_RSTID_USB1_APB,
+	XRESETPS_RSTID_IPI,
+	XRESETPS_RSTID_APM_LPD,
+	XRESETPS_RSTID_RTC,
+	XRESETPS_RSTID_SYSMON,
+	XRESETPS_RSTID_AFI_FM6,
+	XRESETPS_RSTID_LPD_SWDT,
+	XRESETPS_RSTID_FPD,
+	XRESETPS_RSTID_RPU_DBG1,
+	XRESETPS_RSTID_RPU_DBG0,
+	XRESETPS_RSTID_DBG_LPD,
+	XRESETPS_RSTID_DBG_FPD,
+	XRESETPS_RSTID_APLL,
+	XRESETPS_RSTID_DPLL,
+	XRESETPS_RSTID_VPLL,
+	XRESETPS_RSTID_IOPLL,
+	XRESETPS_RSTID_RPLL,
+	XRESETPS_RSTID_GPO3PL0,
+	XRESETPS_RSTID_GPO3PL1,
+	XRESETPS_RSTID_GPO3PL2,
+	XRESETPS_RSTID_GPO3PL3,
+	XRESETPS_RSTID_GPO3PL4,
+	XRESETPS_RSTID_GPO3PL5,
+	XRESETPS_RSTID_GPO3PL6,
+	XRESETPS_RSTID_GPO3PL7,
+	XRESETPS_RSTID_GPO3PL8,
+	XRESETPS_RSTID_GPO3PL9,
+	XRESETPS_RSTID_GPO3PL10,
+	XRESETPS_RSTID_GPO3PL11,
+	XRESETPS_RSTID_GPO3PL12,
+	XRESETPS_RSTID_GPO3PL13,
+	XRESETPS_RSTID_GPO3PL14,
+	XRESETPS_RSTID_GPO3PL15,
+	XRESETPS_RSTID_GPO3PL16,
+	XRESETPS_RSTID_GPO3PL17,
+	XRESETPS_RSTID_GPO3PL18,
+	XRESETPS_RSTID_GPO3PL19,
+	XRESETPS_RSTID_GPO3PL20,
+	XRESETPS_RSTID_GPO3PL21,
+	XRESETPS_RSTID_GPO3PL22,
+	XRESETPS_RSTID_GPO3PL23,
+	XRESETPS_RSTID_GPO3PL24,
+	XRESETPS_RSTID_GPO3PL25,
+	XRESETPS_RSTID_GPO3PL26,
+	XRESETPS_RSTID_GPO3PL27,
+	XRESETPS_RSTID_GPO3PL28,
+	XRESETPS_RSTID_GPO3PL29,
+	XRESETPS_RSTID_GPO3PL30,
+	XRESETPS_RSTID_GPO3PL31,
+	XRESETPS_RSTID_RPU_LS,
+	XRESETPS_RSTID_PS_ONLY,
+	XRESETPS_RSTID_PL,
+	XRESETPS_RSTID_END = XRESETPS_RSTID_PL,
+} XResetPs_RstId;
+
+/**
+ * This typedef defines possible values for  reset status of peripherals.
+ */
+typedef enum {
+	XRESETPS_RESETRELEASED,
+	XRESETPS_RESETASSERTED
+} XResetPs_RstStatus;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+/****************************************************************************/
+/**
+*
+* Set supported reset action.
+*
+* @param        StatusSupport indicates if reset status check is supported
+* @param        PulseSupport indicates if pulse reset action is supported
+* @param        AssertSupport indicates if reset assert/deassert is supported
+*
+* @return	Supported reset actions
+*
+* @note         Here bit fields are used decide supported actions as defined
+* 		below:
+* 		BIT 1 - Assert/Deassert
+* 		BIT 2 - Pulse
+* 		BIT 3 - Reset status
+* 		Bit set indicates corresponding action is supported and
+* 		vice versa.
+******************************************************************************/
+#define XRESETPS_SUPPORTED_ACT(ResetSupport, PulseSupport, AssertSupport) \
+		     ((ResetSupport << 2) | (PulseSupport << 1) | AssertSupport)
+
+/****************************************************************************/
+/**
+*
+* Check if assert/dessert reset is supported.
+*
+* @param        Actions is supported reset actions
+*
+* @return       1 - Supported
+* 		0 - Not Supported
+*
+* @note         None.
+*
+******************************************************************************/
+#define XRESETPS_CHK_ASSERT_SUPPORT(Actions) ((Actions & 0x1))
+
+/****************************************************************************/
+/**
+*
+* Check if pulse reset is supported.
+*
+* @param        Actions is supported reset actions
+*
+* @return       1 - Supported
+* 		0 - Not Supported
+*
+* @note         None.
+*
+******************************************************************************/
+#define XRESETPS_CHK_PULSE_SUPPORT(Actions)  ((Actions & 0x2) >> 1)
+
+/****************************************************************************/
+/**
+*
+* Check if Status check is supported.
+*
+* @param        Actions is supported reset actions
+*
+* @return       1 - Supported
+* 		0 - Not Supported
+*
+* @note         None.
+*
+******************************************************************************/
+#define XRESETPS_CHK_STATUS_SUPPORT(Actions) ((Actions & 0x4) >> 2)
+
+/****************************************************************************/
+/**
+*
+* Read the given register.
+*
+* @param        RegAddress is the address of the register to read
+*
+* @return       The 32-bit value of the register
+*
+* @note         None.
+*
+******************************************************************************/
+#define XResetPs_ReadReg(RegAddress) \
+				Xil_In32((u32)RegAddress)
+
+/****************************************************************************/
+/**
+*
+* Write the given register.
+*
+* @param        RegAddress is the address of the register to write
+* @param        Data is the 32-bit value to write to the register
+*
+* @return       None.
+*
+* @note         None.
+*
+******************************************************************************/
+#define XResetPs_WriteReg(RegAddress, Data) \
+				Xil_Out32((u32)RegAddress, (u32)Data)
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Lookup configuration in xresetps_sinit.c.
+ */
+XResetPs_Config *XResetPs_LookupConfig(u16 DeviceId);
+
+/*
+ * Interface functions in xresetps.c
+ */
+XStatus XResetPs_CfgInitialize(XResetPs *InstancePtr,
+			      XResetPs_Config *ConfigPtr, u32 EffectiveAddress);
+XStatus XResetPs_ResetAssert(XResetPs *InstancePtr,
+						  const XResetPs_RstId ResetID);
+XStatus XResetPs_ResetDeassert(XResetPs *InstancePtr,
+						  const XResetPs_RstId ResetID);
+XStatus XResetPs_ResetPulse(XResetPs *InstancePtr,
+						  const XResetPs_RstId ResetID);
+XStatus XResetPs_ResetStatus(XResetPs *InstancePtr,
+		      const XResetPs_RstId ResetID, XResetPs_RstStatus *Status);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xresetps_hw.h b/src/Xilinx/include/xresetps_hw.h
new file mode 100644
index 0000000..a97162d
--- /dev/null
+++ b/src/Xilinx/include/xresetps_hw.h
@@ -0,0 +1,327 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xresetps_hw.h
+* @addtogroup xresetps_v1_0
+* @{
+*
+* This file contains the hardware interface to the System Reset controller.
+*
+* 
+* MODIFICATION HISTORY:
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------
+* 1.00  cjp    09/05/17 First release
+* 

+*
+******************************************************************************/
+#ifndef XRESETPS_HW_H		/* prevent circular inclusions */
+#define XRESETPS_HW_H		/* by using protection macros */
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+/* Register address defines */
+/* CRF_APB defines */
+#define XRESETPS_CRF_APB_BASE         (0XFD1A0000U)
+/* RST_FPD_TOP Address and mask definations */
+#define XRESETPS_CRF_APB_RST_FPD_TOP \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X00000100U))
+#define PCIE_CFG_RESET_MASK       ((u32)0X00080000U)
+#define PCIE_BRIDGE_RESET_MASK    ((u32)0X00040000U)
+#define PCIE_CTRL_RESET_MASK      ((u32)0X00020000U)
+#define DP_RESET_MASK             ((u32)0X00010000U)
+#define SWDT_RESET_MASK           ((u32)0X00008000U)
+#define AFI_FM5_RESET_MASK        ((u32)0X00001000U)
+#define AFI_FM4_RESET_MASK        ((u32)0X00000800U)
+#define AFI_FM3_RESET_MASK        ((u32)0X00000400U)
+#define AFI_FM2_RESET_MASK        ((u32)0X00000200U)
+#define AFI_FM1_RESET_MASK        ((u32)0X00000100U)
+#define AFI_FM0_RESET_MASK        ((u32)0X00000080U)
+#define GDMA_RESET_MASK           ((u32)0X00000040U)
+#define GPU_PP1_RESET_MASK        ((u32)0X00000020U)
+#define GPU_PP0_RESET_MASK        ((u32)0X00000010U)
+#define GPU_RESET_MASK            ((u32)0X00000008U)
+#define GT_RESET_MASK             ((u32)0X00000004U)
+#define SATA_RESET_MASK           ((u32)0X00000002U)
+/* RST_FPD_APU Address and mask definations */
+#define XRESETPS_CRF_APB_RST_FPD_APU \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X00000104U))
+#define ACPU3_PWRON_RESET_MASK    ((u32)0X00002000U)
+#define ACPU2_PWRON_RESET_MASK    ((u32)0X00001000U)
+#define ACPU1_PWRON_RESET_MASK    ((u32)0X00000800U)
+#define ACPU0_PWRON_RESET_MASK    ((u32)0X00000400U)
+#define APU_L2_RESET_MASK         ((u32)0X00000100U)
+#define ACPU3_RESET_MASK          ((u32)0X00000008U)
+#define ACPU2_RESET_MASK          ((u32)0X00000004U)
+#define ACPU1_RESET_MASK          ((u32)0X00000002U)
+#define ACPU0_RESET_MASK          ((u32)0X00000001U)
+/* RST_DDR_SS Address and mask definations */
+#define XRESETPS_CRF_APB_RST_DDR_SS \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X00000108U))
+#define DDR_RESET_MASK            ((u32)0X00000008U)
+#define DDR_APM_RESET_MASK        ((u32)0X00000004U)
+/* APLL_CTRL Address and mask definations */
+#define XRESETPS_CRF_APB_APLL_CTRL \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X00000020U))
+#define APLL_RESET_MASK           ((u32)0X00000001U)
+/* DPLL_CTRL Address and mask definations */
+#define XRESETPS_CRF_APB_DPLL_CTRL \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X0000002CU))
+#define DPLL_RESET_MASK           ((u32)0X00000001U)
+/* VPLL_CTRL Address and mask definations */
+#define XRESETPS_CRF_APB_VPLL_CTRL \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X00000038U))
+#define VPLL_RESET_MASK           ((u32)0X00000001U)
+
+/* CRL_APB defines */
+#define XRESETPS_CRL_APB_BASE     (0XFF5E0000U)
+/* RESET_CTRL Address and mask definations */
+#define XRESETPS_CRL_APB_RESET_CTRL \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000218U))
+#define SOFT_RESET_MASK           ((u32)0X00000010U)
+/* RST_LPD_IOU0 Address and mask definations */
+#define XRESETPS_CRL_APB_RST_LPD_IOU0 \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000230U))
+#define GEM0_RESET_MASK           ((u32)0X00000001U)
+#define GEM1_RESET_MASK           ((u32)0X00000002U)
+#define GEM2_RESET_MASK           ((u32)0X00000004U)
+#define GEM3_RESET_MASK           ((u32)0X00000008U)
+/* RST_LPD_IOU2 Address and mask definations */
+#define XRESETPS_CRL_APB_RST_LPD_IOU2 \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000238U))
+#define QSPI_RESET_MASK           ((u32)0X00000001U)
+#define UART0_RESET_MASK          ((u32)0X00000002U)
+#define UART1_RESET_MASK          ((u32)0X00000004U)
+#define SPI0_RESET_MASK           ((u32)0X00000008U)
+#define SPI1_RESET_MASK           ((u32)0X00000010U)
+#define SDIO0_RESET_MASK          ((u32)0X00000020U)
+#define SDIO1_RESET_MASK          ((u32)0X00000040U)
+#define CAN0_RESET_MASK           ((u32)0X00000080U)
+#define CAN1_RESET_MASK           ((u32)0X00000100U)
+#define I2C0_RESET_MASK           ((u32)0X00000200U)
+#define I2C1_RESET_MASK           ((u32)0X00000400U)
+#define TTC0_RESET_MASK           ((u32)0X00000800U)
+#define TTC1_RESET_MASK           ((u32)0X00001000U)
+#define TTC2_RESET_MASK           ((u32)0X00002000U)
+#define TTC3_RESET_MASK           ((u32)0X00004000U)
+#define SWDT_RESET_MASK           ((u32)0X00008000U)
+#define NAND_RESET_MASK           ((u32)0X00010000U)
+#define ADMA_RESET_MASK           ((u32)0X00020000U)
+#define GPIO_RESET_MASK           ((u32)0X00040000U)
+#define IOU_CC_RESET_MASK         ((u32)0X00080000U)
+#define TIMESTAMP_RESET_MASK      ((u32)0X00100000U)
+/* RST_LPD_TOP Address and mask definations */
+#define XRESETPS_CRL_APB_RST_LPD_TOP \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X0000023CU))
+#define RPU_R50_RESET_MASK        ((u32)0X00000001U)
+#define RPU_R51_RESET_MASK        ((u32)0X00000002U)
+#define RPU_AMBA_RESET_MASK       ((u32)0X00000004U)
+#define OCM_RESET_MASK            ((u32)0X00000008U)
+#define RPU_PGE_RESET_MASK        ((u32)0X00000010U)
+#define USB0_CORERESET_MASK       ((u32)0X00000040U)
+#define USB1_CORERESET_MASK       ((u32)0X00000080U)
+#define USB0_HIBERRESET_MASK      ((u32)0X00000100U)
+#define USB1_HIBERRESET_MASK      ((u32)0X00000200U)
+#define USB0_APB_RESET_MASK       ((u32)0X00000400U)
+#define USB1_APB_RESET_MASK       ((u32)0X00000800U)
+#define IPI_RESET_MASK            ((u32)0X00004000U)
+#define APM_RESET_MASK            ((u32)0X00008000U)
+#define RTC_RESET_MASK            ((u32)0X00010000U)
+#define SYSMON_RESET_MASK         ((u32)0X00020000U)
+#define AFI_FM6_RESET_MASK        ((u32)0X00080000U)
+#define LPD_SWDT_RESET_MASK       ((u32)0X00100000U)
+#define FPD_RESET_MASK            ((u32)0X00800000U)
+/* RST_LPD_DBG Address and mask definations */
+#define XRESETPS_CRL_APB_RST_LPD_DBG \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000240U))
+#define RPU_DBG1_RESET_MASK       ((u32)0X00000020U)
+#define RPU_DBG0_RESET_MASK       ((u32)0X00000010U)
+#define DBG_LPD_RESET_MASK        ((u32)0X00000002U)
+#define DBG_FPD_RESET_MASK        ((u32)0X00000001U)
+/* IOPLL_CTRL Address and mask definations */
+#define XRESETPS_CRL_APB_IOPLL_CTRL \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000020U))
+#define IOPLL_RESET_MASK          ((u32)0X00000001U)
+/* RPLL_CTRL Address and mask definations */
+#define XRESETPS_CRL_APB_RPLL_CTRL \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000030U))
+#define RPLL_RESET_MASK           ((u32)0X00000001U)
+#define RPLL_BYPASS_MASK          ((u32)0X00000008U)
+
+/* PMU_IOM defines */
+#define XRESETPS_PMU_IOM_BASE     (0XFFD40000U)
+/* PMU_IOM_GPO3 Address and mask definations */
+#define XRESETPS_PMU_IOM_GPO3_CTRL \
+				  ((XRESETPS_PMU_IOM_BASE) + ((u32)0X0000001CU))
+#define GPO3_PL0_RESET_MASK       ((u32)0X00000001U)
+#define GPO3_PL1_RESET_MASK       ((u32)0X00000002U)
+#define GPO3_PL2_RESET_MASK       ((u32)0X00000004U)
+#define GPO3_PL3_RESET_MASK       ((u32)0X00000008U)
+#define GPO3_PL4_RESET_MASK       ((u32)0X00000010U)
+#define GPO3_PL5_RESET_MASK       ((u32)0X00000020U)
+#define GPO3_PL6_RESET_MASK       ((u32)0X00000040U)
+#define GPO3_PL7_RESET_MASK       ((u32)0X00000080U)
+#define GPO3_PL8_RESET_MASK       ((u32)0X00000100U)
+#define GPO3_PL9_RESET_MASK       ((u32)0X00000200U)
+#define GPO3_PL10_RESET_MASK      ((u32)0X00000400U)
+#define GPO3_PL11_RESET_MASK      ((u32)0X00000800U)
+#define GPO3_PL12_RESET_MASK      ((u32)0X00001000U)
+#define GPO3_PL13_RESET_MASK      ((u32)0X00002000U)
+#define GPO3_PL14_RESET_MASK      ((u32)0X00004000U)
+#define GPO3_PL15_RESET_MASK      ((u32)0X00008000U)
+#define GPO3_PL16_RESET_MASK      ((u32)0X00010000U)
+#define GPO3_PL17_RESET_MASK      ((u32)0X00020000U)
+#define GPO3_PL18_RESET_MASK      ((u32)0X00040000U)
+#define GPO3_PL19_RESET_MASK      ((u32)0X00080000U)
+#define GPO3_PL20_RESET_MASK      ((u32)0X00100000U)
+#define GPO3_PL21_RESET_MASK      ((u32)0X00200000U)
+#define GPO3_PL22_RESET_MASK      ((u32)0X00400000U)
+#define GPO3_PL23_RESET_MASK      ((u32)0X00800000U)
+#define GPO3_PL24_RESET_MASK      ((u32)0X01000000U)
+#define GPO3_PL25_RESET_MASK      ((u32)0X02000000U)
+#define GPO3_PL26_RESET_MASK      ((u32)0X04000000U)
+#define GPO3_PL27_RESET_MASK      ((u32)0X08000000U)
+#define GPO3_PL28_RESET_MASK      ((u32)0X10000000U)
+#define GPO3_PL29_RESET_MASK      ((u32)0X20000000U)
+#define GPO3_PL30_RESET_MASK      ((u32)0X40000000U)
+#define GPO3_PL31_RESET_MASK      ((u32)0X80000000U)
+
+/* PMU_LCL defines */
+#define XRESETPS_PMU_LCL_BASE     (0XFFD60000U)
+/* GPO Read control address */
+#define XRESETPS_PMU_LCL_READ_CTRL \
+				  ((XRESETPS_PMU_LCL_BASE) + ((u32)0X0000021CU))
+
+/* PMU_GLB defines */
+#define XRESETPS_PMU_GLB_BASE     (0XFFD80000U)
+/* PMU_GLB_RST Address and mask definations */
+#define XRESETPS_PMU_GLB_RST_CTRL ((XRESETPS_PMU_GLB_BASE) + ((u32)0X00000608U))
+#define RPU_LS_RESET_MASK         ((u32)0X00000100U)
+#define FPD_APU_RESET_MASK        ((u32)0X00000200U)
+#define PS_ONLY_RESET_MASK        ((u32)0X00000400U)
+/* PMU_GLB_PS Address and mask definations */
+#define XRESETPS_PMU_GLB_PS_CTRL  ((XRESETPS_PMU_GLB_BASE) + ((u32)0X00000004U))
+#define PROG_ENABLE_MASK          ((u32)0X00000002U)
+#define PROG_GATE_MASK            ((u32)0X00000001U)
+/* PMU_GLB_AIB Address and mask definations */
+#define XRESETPS_PMU_GLB_AIB_CTRL ((XRESETPS_PMU_GLB_BASE) + ((u32)0X00000600U))
+#define LPD_AFI_FM_ISO_MASK       ((u32)0X00000001U)
+#define LPD_AFI_FS_ISO_MASK       ((u32)0X00000002U)
+#define FPD_AFI_FM_ISO_MASK       ((u32)0X00000004U)
+#define FPD_AFI_FS_ISO_MASK       ((u32)0X00000008U)
+#define AIB_ISO_CTRL_MASK         (LPD_AFI_FM_ISO_MASK | LPD_AFI_FS_ISO_MASK | \
+				      FPD_AFI_FM_ISO_MASK | FPD_AFI_FS_ISO_MASK)
+/* PMU_GLB_AIB status Address and mask definations */
+#define XRESETPS_PMU_GLB_AIB_STATUS \
+				  ((XRESETPS_PMU_GLB_BASE) + ((u32)0X00000604U))
+#define AIB_ISO_STATUS_MASK       (AIB_ISO_CTRL_MASK)
+/* PMU_GLB_PWR status Address and mask definations */
+#define XRESETPS_PMU_GLB_PWR_STATUS \
+				  ((XRESETPS_PMU_GLB_BASE) + ((u32)0X00000100U))
+#define FPD_PSCHK_MASK            ((u32)0x00400000U)
+#define PCIE_CTRL_PSCHK_MASK      (FPD_PSCHK_MASK)
+#define DP_PSCHK_MASK             (FPD_PSCHK_MASK)
+#define SATA_PSCHK_MASK           (FPD_PSCHK_MASK)
+#define R50_PSCHK_MASK            ((u32)0x00000400U)
+#define R51_PSCHK_MASK            ((u32)0x00000800U)
+#define GPU_PP0_PSCHK_MASK        (((u32)0x00000010U) | (FPD_PSCHK_MASK))
+#define GPU_PP1_PSCHK_MASK        (((u32)0x00000020U) | (FPD_PSCHK_MASK))
+#define GPU_PSCHK_MASK            ((GPU_PP0_PSCHK_MASK) | \
+					(GPU_PP1_PSCHK_MASK) | (FPD_PSCHK_MASK))
+
+/* LPD_SLCR defines */
+#define XRESETPS_LPD_SCR_BASE     (0XFF410000U)
+/* LPD_SCR_AXIISO_REQ and LPD_SCR_AXIISO_ACK Address and mask definations */
+#define XRESETPS_LPD_SCR_AXIISO_REQ_CTRL \
+				  ((XRESETPS_LPD_SCR_BASE) + ((u32)0X00003030U))
+#define XRESETPS_LPD_SCR_AXIISO_ACK_CTRL \
+				  ((XRESETPS_LPD_SCR_BASE) + ((u32)0X00003040U))
+#define RPU0_MASTER_ISO_MASK      ((u32)0X00010000U)
+#define RPU1_MASTER_ISO_MASK      ((u32)0X00020000U)
+#define RPU_MASTER_ISO_MASK	  (RPU0_MASTER_ISO_MASK | RPU1_MASTER_ISO_MASK)
+#define RPU0_SLAVE_ISO_MASK       ((u32)0X00040000U)
+#define RPU1_SLAVE_ISO_MASK       ((u32)0X00080000U)
+#define RPU_SLAVE_ISO_MASK	  (RPU0_SLAVE_ISO_MASK | RPU1_SLAVE_ISO_MASK)
+#define FPD_OCM_ISO_MASK          ((u32)0X00000008U)
+#define FPD_LPDIBS_ISO_MASK       ((u32)0X00000004U)
+#define AFIFS1_ISO_MASK           ((u32)0X00000002U)
+#define AFIFS0_ISO_MASK           ((u32)0X00000001U)
+#define FPD_TO_LPD_ISO_MASK       (FPD_LPDIBS_ISO_MASK | FPD_OCM_ISO_MASK | \
+					      AFIFS0_ISO_MASK | AFIFS1_ISO_MASK)
+#define LPD_DDR_ISO_MASK          ((u32)0X08000000U)
+#define FPD_MAIN_ISO_MASK         ((u32)0X01000000U)
+#define LPD_TO_FPD_ISO_MASK       (LPD_DDR_ISO_MASK | FPD_MAIN_ISO_MASK)
+/* LPD_SLCR_APBISO_REQ Address and mask definations */
+#define XRESETPS_LPD_SLCR_APBISO_REQ_CTRL \
+				  ((XRESETPS_LPD_SCR_BASE) + ((u32)0X00003048U))
+#define GPU_ISO_MASK              ((u32)0X00000001U)
+
+/* CSU defines */
+#define XRESETPS_CSU_BASE         (0xFFCA0000U)
+#define XRESETPS_CSU_VERSION_REG  ((XRESETPS_CSU_BASE) + ((u32)0x00000044U))
+#define XRESETPS_PLATFORM_PS_VER1 ((u32)0x00000000U)
+#define PS_VERSION_MASK           ((u32)0x0000000FU)
+
+/* Timeout delay defines */
+#define XRESETPS_RST_PROP_DELAY   (0xFU)
+#define XRESETPS_AIB_ISO_DELAY	  (0xFU)
+#define XRESETPS_AIB_PSPL_DELAY	  (0xFU)
+#define XRESETPS_PULSE_PROP_DELAY (0xFU)
+
+/* AIB ack reconfirmation count */
+#define XRESETPS_AIB_PSPL_RECONFIRM_CNT \
+				  (0x2U)
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xrtcpsu.h b/src/Xilinx/include/xrtcpsu.h
new file mode 100644
index 0000000..8320470
--- /dev/null
+++ b/src/Xilinx/include/xrtcpsu.h
@@ -0,0 +1,400 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xrtcpsu.h
+* @addtogroup rtcpsu_v1_5
+* @{
+* @details
+*
+* The Xilinx RTC driver component.  This component supports the Xilinx
+* RTC Controller. RTC Core and RTC controller are the two main important sub-
+* components for this RTC module. RTC core can run even in the battery powered
+* domain when the power from auxiliary source is down. Because of this, RTC core
+* latches the calibration,programmed time. This core interfaces with the crystal
+* oscillator and maintains current time in seconds.Calibration circuitry
+* calculates a second with maximum 1 PPM inaccuracy using a crystal oscillator
+* with arbitrary static inaccuracy. Core also responsible to maintain control
+* value used by the oscillator and power switching circuitry.
+*
+* RTC controller includes an APB interface responsible for register access with
+* in controller and core. It contains alarm generation logic including the alarm
+* register to hold alarm time in seconds.Interrupt management using Interrupt
+* status, Interrupt mask, Interrupt enable, Interrupt disable registers are
+* included to manage alarm and seconds interrupts. Address Slave error interrupts
+* are not being handled by this driver component.
+*
+* This driver supports the following features:
+* - Setting the RTC time.
+* - Setting the Alarm value that can be one-time alarm or a periodic alarm.
+* - Modifying the calibration value.
+*
+* Initialization & Configuration
+*
+* The XRtcPsu_Config structure is used by the driver to configure itself.
+* Fields inside this structure are properties of XRtcPsu based on its hardware
+* build.
+*
+* To support multiple runtime loading and initialization strategies employed
+* by various operating systems, the driver instance can be initialized in the
+* following way:
+*
+*   - XRtcPsu_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
+*	 configuration structure provided by the caller. If running in a system
+*	 with address translation, the parameter EffectiveAddr should be the
+* 	  virtual address.
+*
+* Interrupts
+*
+* The driver defaults to no interrupts at initialization such that interrupts
+* must be enabled if desired. An interrupt is generated for one of the
+* following conditions.
+*
+* - Alarm is generated.
+* - A new second is generated.
+*
+* The application can control which interrupts are enabled using the
+* XRtcPsu_SetInterruptMask() function.
+*
+* In order to use interrupts, it is necessary for the user to connect the
+* driver interrupt handler, XRtcPsu_InterruptHandler(), to the interrupt
+* system of the application. A separate handler should be provided by the
+* application to communicate with the interrupt system, and conduct
+* application specific interrupt handling. An application registers its own
+* handler through the XRtcPsu_SetHandler() function.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00  kvn    04/21/15 First release
+* 1.1   kvn    09/25/15 Modify control register to enable battery
+*                       switching when vcc_psaux is not available.
+* 1.3   vak    04/25/16 Corrected the RTC read and write time logic(cr#948833).
+* 1.4 	MNK    01/27/17 Corrected calibration and frequency macros based on
+* 			rtc input oscillator frequency ( 32.768Khz).
+*       ms     03/17/17 Added readme.txt file in examples folder for doxygen
+*                       generation.
+*       ms     04/10/17 Modified filename tag in examples to include them in
+*                       doxygen examples.
+* 1.5   ms     08/27/17 Fixed compilation warnings in xrtcpsu.c file.
+*       ms     08/29/17 Updated the code as per source code style.
+* 

+*
+******************************************************************************/
+
+
+#ifndef XRTC_H_			/* prevent circular inclusions */
+#define XRTC_H_			/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xrtcpsu_hw.h"
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Callback events
+ *
+ * These constants specify the handler events that an application can handle
+ * using its specific handler function. Note that these constants are not bit
+ * mask, so only one event can be passed to an application at a time.
+ *
+ * @{
+ */
+#define XRTCPSU_EVENT_ALARM_GEN		1U /**< Alarm generated event */
+#define XRTCPSU_EVENT_SECS_GEN		2U /**< A new second generated event */
+/*@}*/
+
+#define XRTCPSU_CRYSTAL_OSC_EN		(u32)1 << XRTC_CTL_OSC_SHIFT
+/**< Separate Mask for Crystal oscillator bit Enable */
+
+/**************************** Type Definitions *******************************/
+
+/******************************************************************************/
+/**
+ * This data type defines a handler that an application defines to communicate
+ * with interrupt system to retrieve state information about an application.
+ *
+ * @param	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the handler, and is passed back to the upper layer
+ *		when the handler is called. It is used to find the device driver
+ *		instance.
+ * @param	Event contains one of the event constants indicating events that
+ *		have occurred.
+ * @param	EventData contains the number of bytes sent or received at the
+ *		time of the call for send and receive events and contains the
+ *		modem status for modem events.
+ *
+ ******************************************************************************/
+typedef void (*XRtcPsu_Handler) (void *CallBackRef, u32 Event);
+
+/**
+ * This typedef contains configuration information for a device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID of device */
+	u32 BaseAddr;		/**< Register base address */
+} XRtcPsu_Config;
+
+/**
+ * The XRtcPsu driver instance data. The user is required to allocate a
+ * variable of this type for the RTC device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XRtcPsu_Config RtcConfig; 	/**< Device configuration */
+	u32 IsReady;				/**< Device is initialized and ready */
+	u32 PeriodicAlarmTime;
+	u8 IsPeriodicAlarm;
+	u32 OscillatorFreq;
+	u32 CalibrationValue;
+	XRtcPsu_Handler Handler;
+	void *CallBackRef;			/**< Callback reference for event handler */
+	u32 TimeUpdated;
+	u32 CurrTimeUpdated;
+} XRtcPsu;
+
+/**
+ * This typedef contains DateTime format structure.
+ */
+typedef struct {
+	u32 Year;
+	u32 Month;
+	u32 Day;
+	u32 Hour;
+	u32 Min;
+	u32 Sec;
+	u32 WeekDay;
+} XRtcPsu_DT;
+
+
+/************************* Variable Definitions ******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XRTC_CALIBRATION_VALUE 0x8000U
+#define XRTC_TYPICAL_OSC_FREQ 32768U
+
+/****************************************************************************/
+/**
+*
+* This macro updates the current time of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+* @param	Time is the desired time for RTC in seconds.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+* 		void XRtcPsu_SetTime(XRtcPsu *InstancePtr, u32 Time)
+*
+*****************************************************************************/
+#define XRtcPsu_WriteSetTime(InstancePtr,Time) \
+	XRtcPsu_WriteReg(((InstancePtr)->RtcConfig.BaseAddr + \
+				XRTC_SET_TIME_WR_OFFSET),(Time))
+
+/****************************************************************************/
+/**
+*
+* This macro returns the last set time of RTC device. Whenever a reset
+* happens, the last set time will be zeroth day first sec.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	The last set time in seconds.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_GetLastSetTime(XRtcPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XRtcPsu_GetLastSetTime(InstancePtr) \
+	XRtcPsu_ReadReg((InstancePtr)->RtcConfig.BaseAddr + XRTC_SET_TIME_RD_OFFSET)
+
+/****************************************************************************/
+/**
+*
+* This macro returns the calibration value of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	Calibration value for RTC.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_GetCalibration(XRtcPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XRtcPsu_GetCalibration(InstancePtr) \
+	XRtcPsu_ReadReg((InstancePtr)->RtcConfig.BaseAddr+XRTC_CALIB_RD_OFFSET)
+
+/****************************************************************************/
+/**
+*
+* This macro returns the current time of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	Current Time. This current time will be in seconds.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_ReadCurrentTime(XRtcPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XRtcPsu_ReadCurrentTime(InstancePtr) \
+	XRtcPsu_ReadReg((InstancePtr)->RtcConfig.BaseAddr+XRTC_CUR_TIME_OFFSET)
+
+/****************************************************************************/
+/**
+*
+* This macro sets the control register value of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+* @param	Value is the desired control register value for RTC.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+* 		void XRtcPsu_SetControlRegister(XRtcPsu *InstancePtr, u32 Value)
+*
+*****************************************************************************/
+#define XRtcPsu_SetControlRegister(InstancePtr, Value) \
+	XRtcPsu_WriteReg((InstancePtr)->RtcConfig.BaseAddr + \
+			XRTC_CTL_OFFSET,(Value))
+
+/****************************************************************************/
+/**
+*
+* This macro returns the safety check register value of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	Safety check register value.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_GetSafetyCheck(XRtcPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XRtcPsu_GetSafetyCheck(InstancePtr)	\
+	XRtcPsu_ReadReg((InstancePtr)->RtcConfig.BaseAddr+XRTC_SFTY_CHK_OFFSET)
+
+/****************************************************************************/
+/**
+*
+* This macro sets the safety check register value of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+* @param	Value is a safety check value to be written in register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+* 		void XRtcPsu_SetSafetyCheck(XRtcPsu *InstancePtr, u32 Value)
+*
+*****************************************************************************/
+#define XRtcPsu_SetSafetyCheck(InstancePtr, Value)	\
+	XRtcPsu_WriteReg((InstancePtr)->RtcConfig.BaseAddr + \
+			XRTC_SFTY_CHK_OFFSET,(Value))
+
+/****************************************************************************/
+/**
+*
+* This macro resets the alarm register
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_ResetAlarm(XRtcPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XRtcPsu_ResetAlarm(InstancePtr) \
+		XRtcPsu_WriteReg((InstancePtr)->RtcConfig.BaseAddr + \
+				XRTC_ALRM_OFFSET,XRTC_ALRM_RSTVAL)
+
+/****************************************************************************/
+/**
+*
+* This macro rounds off the given number
+*
+* @param	Number is the one that needs to be rounded off..
+*
+* @return	The rounded off value of the input number.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_RoundOff(float Number)
+*
+*****************************************************************************/
+#define XRtcPsu_RoundOff(Number) \
+	(u32)(((Number) < (u32)0) ? ((Number) - (u32)0.5) : ((Number) + (u32)0.5))
+
+/************************** Function Prototypes ******************************/
+
+/* Functions in xrtcpsu.c */
+s32 XRtcPsu_CfgInitialize(XRtcPsu *InstancePtr, XRtcPsu_Config *ConfigPtr,
+				u32 EffectiveAddr);
+
+void XRtcPsu_SetAlarm(XRtcPsu *InstancePtr, u32 Alarm, u32 Periodic);
+void XRtcPsu_SecToDateTime(u32 Seconds, XRtcPsu_DT *dt);
+u32 XRtcPsu_DateTimeToSec(XRtcPsu_DT *dt);
+void XRtcPsu_CalculateCalibration(XRtcPsu *InstancePtr,u32 TimeReal,
+		u32 CrystalOscFreq);
+u32 XRtcPsu_IsSecondsEventGenerated(XRtcPsu *InstancePtr);
+u32 XRtcPsu_IsAlarmEventGenerated(XRtcPsu *InstancePtr);
+u32 XRtcPsu_GetCurrentTime(XRtcPsu *InstancePtr);
+void XRtcPsu_SetTime(XRtcPsu *InstancePtr,u32 Time);
+
+/* interrupt functions in xrtcpsu_intr.c */
+void XRtcPsu_SetInterruptMask(XRtcPsu *InstancePtr, u32 Mask);
+void XRtcPsu_ClearInterruptMask(XRtcPsu *InstancePtr, u32 Mask);
+void XRtcPsu_InterruptHandler(XRtcPsu *InstancePtr);
+void XRtcPsu_SetHandler(XRtcPsu *InstancePtr, XRtcPsu_Handler FuncPtr,
+			 void *CallBackRef);
+
+/* Functions in xrtcpsu_selftest.c */
+s32 XRtcPsu_SelfTest(XRtcPsu *InstancePtr);
+
+/* Functions in xrtcpsu_sinit.c */
+XRtcPsu_Config *XRtcPsu_LookupConfig(u16 DeviceId);
+
+
+#endif /* XRTC_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xrtcpsu_hw.h b/src/Xilinx/include/xrtcpsu_hw.h
new file mode 100644
index 0000000..b535359
--- /dev/null
+++ b/src/Xilinx/include/xrtcpsu_hw.h
@@ -0,0 +1,362 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xrtcpsu_hw.h
+* @addtogroup rtcpsu_v1_5
+* @{
+*
+* This header file contains the identifiers and basic driver functions (or
+* macros) that can be used to access the device. Other driver functions
+* are defined in xrtcpsu.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00a kvn	  04/21/15 First release
+* 1.1   kvn   09/25/15 Modify control register to enable battery
+*                      switching when vcc_psaux is not available.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XRTC_HW_H_		/* prevent circular inclusions */
+#define XRTC_HW_H_		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/**
+ * Xrtc Base Address
+ */
+#define XRTC_BASEADDR      0xFFA60000U
+
+/**
+ * Register: XrtcSetTimeWr
+ */
+#define XRTC_SET_TIME_WR_OFFSET    0x00000000U
+#define XRTC_SET_TIME_WR_RSTVAL   0x00000000U
+
+#define XRTC_SET_TIME_WR_VAL_SHIFT   0U
+#define XRTC_SET_TIME_WR_VAL_WIDTH   32U
+#define XRTC_SET_TIME_WR_VAL_MASK    0xffffffffU
+#define XRTC_SET_TIME_WR_VAL_DEFVAL  0x0U
+
+/**
+ * Register: XrtcSetTimeRd
+ */
+#define XRTC_SET_TIME_RD_OFFSET    0x00000004U
+#define XRTC_SET_TIME_RD_RSTVAL   0x00000000U
+
+#define XRTC_SET_TIME_RD_VAL_SHIFT   0U
+#define XRTC_SET_TIME_RD_VAL_WIDTH   32U
+#define XRTC_SET_TIME_RD_VAL_MASK    0xffffffffU
+#define XRTC_SET_TIME_RD_VAL_DEFVAL  0x0U
+
+/**
+ * Register: XrtcCalibWr
+ */
+#define XRTC_CALIB_WR_OFFSET    0x00000008U
+#define XRTC_CALIB_WR_RSTVAL   0x00000000U
+
+#define XRTC_CALIB_WR_FRACTN_EN_SHIFT   20U
+#define XRTC_CALIB_WR_FRACTN_EN_WIDTH   1U
+#define XRTC_CALIB_WR_FRACTN_EN_MASK    0x00100000U
+#define XRTC_CALIB_WR_FRACTN_EN_DEFVAL  0x0U
+
+#define XRTC_CALIB_WR_FRACTN_DATA_SHIFT   16U
+#define XRTC_CALIB_WR_FRACTN_DATA_WIDTH   4U
+#define XRTC_CALIB_WR_FRACTN_DATA_MASK    0x000f0000U
+#define XRTC_CALIB_WR_FRACTN_DATA_DEFVAL  0x0U
+
+#define XRTC_CALIB_WR_MAX_TCK_SHIFT   0U
+#define XRTC_CALIB_WR_MAX_TCK_WIDTH   16U
+#define XRTC_CALIB_WR_MAX_TCK_MASK    0x0000ffffU
+#define XRTC_CALIB_WR_MAX_TCK_DEFVAL  0x0U
+
+/**
+ * Register: XrtcCalibRd
+ */
+#define XRTC_CALIB_RD_OFFSET    0x0000000CU
+#define XRTC_CALIB_RD_RSTVAL   0x00000000U
+
+#define XRTC_CALIB_RD_FRACTN_EN_SHIFT   20U
+#define XRTC_CALIB_RD_FRACTN_EN_WIDTH   1U
+#define XRTC_CALIB_RD_FRACTN_EN_MASK    0x00100000U
+#define XRTC_CALIB_RD_FRACTN_EN_DEFVAL  0x0U
+
+#define XRTC_CALIB_RD_FRACTN_DATA_SHIFT   16U
+#define XRTC_CALIB_RD_FRACTN_DATA_WIDTH   4U
+#define XRTC_CALIB_RD_FRACTN_DATA_MASK    0x000f0000U
+#define XRTC_CALIB_RD_FRACTN_DATA_DEFVAL  0x0U
+
+#define XRTC_CALIB_RD_MAX_TCK_SHIFT   0U
+#define XRTC_CALIB_RD_MAX_TCK_WIDTH   16U
+#define XRTC_CALIB_RD_MAX_TCK_MASK    0x0000ffffU
+#define XRTC_CALIB_RD_MAX_TCK_DEFVAL  0x0U
+
+/**
+ * Register: XrtcCurTime
+ */
+#define XRTC_CUR_TIME_OFFSET    0x00000010U
+#define XRTC_CUR_TIME_RSTVAL   0x00000000U
+
+#define XRTC_CUR_TIME_VAL_SHIFT   0U
+#define XRTC_CUR_TIME_VAL_WIDTH   32U
+#define XRTC_CUR_TIME_VAL_MASK    0xffffffffU
+#define XRTC_CUR_TIME_VAL_DEFVAL  0x0U
+
+/**
+ * Register: XrtcCurTck
+ */
+#define XRTC_CUR_TCK_OFFSET    0x00000014U
+#define XRTC_CUR_TCK_RSTVAL   0x00000000U
+
+#define XRTC_CUR_TCK_VAL_SHIFT   0U
+#define XRTC_CUR_TCK_VAL_WIDTH   16U
+#define XRTC_CUR_TCK_VAL_MASK    0x0000ffffU
+#define XRTC_CUR_TCK_VAL_DEFVAL  0x0U
+
+/**
+ * Register: XrtcAlrm
+ */
+#define XRTC_ALRM_OFFSET    0x00000018U
+#define XRTC_ALRM_RSTVAL   0x00000000U
+
+#define XRTC_ALRM_VAL_SHIFT   0U
+#define XRTC_ALRM_VAL_WIDTH   32U
+#define XRTC_ALRM_VAL_MASK    0xffffffffU
+#define XRTC_ALRM_VAL_DEFVAL  0x0U
+
+/**
+ * Register: XrtcIntSts
+ */
+#define XRTC_INT_STS_OFFSET    0x00000020U
+#define XRTC_INT_STS_RSTVAL   0x00000000U
+
+#define XRTC_INT_STS_ALRM_SHIFT   1U
+#define XRTC_INT_STS_ALRM_WIDTH   1U
+#define XRTC_INT_STS_ALRM_MASK    0x00000002U
+#define XRTC_INT_STS_ALRM_DEFVAL  0x0U
+
+#define XRTC_INT_STS_SECS_SHIFT   0U
+#define XRTC_INT_STS_SECS_WIDTH   1U
+#define XRTC_INT_STS_SECS_MASK    0x00000001U
+#define XRTC_INT_STS_SECS_DEFVAL  0x0U
+
+/**
+ * Register: XrtcIntMsk
+ */
+#define XRTC_INT_MSK_OFFSET    0x00000024U
+#define XRTC_INT_MSK_RSTVAL   0x00000003U
+
+#define XRTC_INT_MSK_ALRM_SHIFT   1U
+#define XRTC_INT_MSK_ALRM_WIDTH   1U
+#define XRTC_INT_MSK_ALRM_MASK    0x00000002U
+#define XRTC_INT_MSK_ALRM_DEFVAL  0x1U
+
+#define XRTC_INT_MSK_SECS_SHIFT   0U
+#define XRTC_INT_MSK_SECS_WIDTH   1U
+#define XRTC_INT_MSK_SECS_MASK    0x00000001U
+#define XRTC_INT_MSK_SECS_DEFVAL  0x1U
+
+/**
+ * Register: XrtcIntEn
+ */
+#define XRTC_INT_EN_OFFSET    0x00000028U
+#define XRTC_INT_EN_RSTVAL   0x00000000U
+
+#define XRTC_INT_EN_ALRM_SHIFT   1U
+#define XRTC_INT_EN_ALRM_WIDTH   1U
+#define XRTC_INT_EN_ALRM_MASK    0x00000002U
+#define XRTC_INT_EN_ALRM_DEFVAL  0x0U
+
+#define XRTC_INT_EN_SECS_SHIFT   0U
+#define XRTC_INT_EN_SECS_WIDTH   1U
+#define XRTC_INT_EN_SECS_MASK    0x00000001U
+#define XRTC_INT_EN_SECS_DEFVAL  0x0U
+
+/**
+ * Register: XrtcIntDis
+ */
+#define XRTC_INT_DIS_OFFSET    0x0000002CU
+#define XRTC_INT_DIS_RSTVAL   0x00000000U
+
+#define XRTC_INT_DIS_ALRM_SHIFT   1U
+#define XRTC_INT_DIS_ALRM_WIDTH   1U
+#define XRTC_INT_DIS_ALRM_MASK    0x00000002U
+#define XRTC_INT_DIS_ALRM_DEFVAL  0x0U
+
+#define XRTC_INT_DIS_SECS_SHIFT   0U
+#define XRTC_INT_DIS_SECS_WIDTH   1U
+#define XRTC_INT_DIS_SECS_MASK    0x00000001U
+#define XRTC_INT_DIS_SECS_DEFVAL  0x0U
+
+/**
+ * Register: XrtcAddErr
+ */
+#define XRTC_ADD_ERR_OFFSET    0x00000030U
+#define XRTC_ADD_ERR_RSTVAL   0x00000000U
+
+#define XRTC_ADD_ERR_STS_SHIFT   0U
+#define XRTC_ADD_ERR_STS_WIDTH   1U
+#define XRTC_ADD_ERR_STS_MASK    0x00000001U
+#define XRTC_ADD_ERR_STS_DEFVAL  0x0U
+
+/**
+ * Register: XrtcAddErrIntMsk
+ */
+#define XRTC_ADD_ERR_INT_MSK_OFFSET    0x00000034U
+#define XRTC_ADD_ERR_INT_MSK_RSTVAL   0x00000001U
+
+#define XRTC_ADD_ERR_INT_MSK_SHIFT   0U
+#define XRTC_ADD_ERR_INT_MSK_WIDTH   1U
+#define XRTC_ADD_ERR_INT_MSK_MASK    0x00000001U
+#define XRTC_ADD_ERR_INT_MSK_DEFVAL  0x1U
+
+/**
+ * Register: XrtcAddErrIntEn
+ */
+#define XRTC_ADD_ERR_INT_EN_OFFSET    0x00000038U
+#define XRTC_ADD_ERR_INT_EN_RSTVAL   0x00000000U
+
+#define XRTC_ADD_ERR_INT_EN_MSK_SHIFT   0U
+#define XRTC_ADD_ERR_INT_EN_MSK_WIDTH   1U
+#define XRTC_ADD_ERR_INT_EN_MSK_MASK    0x00000001U
+#define XRTC_ADD_ERR_INT_EN_MSK_DEFVAL  0x0U
+
+/**
+ * Register: XrtcAddErrIntDis
+ */
+#define XRTC_ADD_ERR_INT_DIS_OFFSET    0x0000003CU
+#define XRTC_ADD_ERR_INT_DIS_RSTVAL   0x00000000U
+
+#define XRTC_ADD_ERR_INT_DIS_MSK_SHIFT   0U
+#define XRTC_ADD_ERR_INT_DIS_MSK_WIDTH   1U
+#define XRTC_ADD_ERR_INT_DIS_MSK_MASK    0x00000001U
+#define XRTC_ADD_ERR_INT_DIS_MSK_DEFVAL  0x0U
+
+/**
+ * Register: XrtcCtl
+ */
+#define XRTC_CTL_OFFSET    0x00000040U
+#define XRTC_CTL_RSTVAL   0x01000000U
+
+#define XRTC_CTL_BATTERY_EN_SHIFT   31U
+#define XRTC_CTL_BATTERY_EN_WIDTH   1U
+#define XRTC_CTL_BATTERY_EN_MASK    0x80000000U
+#define XRTC_CTL_BATTERY_EN_DEFVAL  0x0U
+
+#define XRTC_CTL_OSC_SHIFT   24U
+#define XRTC_CTL_OSC_WIDTH   4U
+#define XRTC_CTL_OSC_MASK    0x0f000000U
+#define XRTC_CTL_OSC_DEFVAL  0x1U
+
+#define XRTC_CTL_SLVERR_EN_SHIFT   0U
+#define XRTC_CTL_SLVERR_EN_WIDTH   1U
+#define XRTC_CTL_SLVERR_EN_MASK    0x00000001U
+#define XRTC_CTL_SLVERR_EN_DEFVAL  0x0U
+
+/**
+ * Register: XrtcSftyChk
+ */
+#define XRTC_SFTY_CHK_OFFSET    0x00000050U
+#define XRTC_SFTY_CHK_RSTVAL   0x00000000U
+
+#define XRTC_SFTY_CHK_REG_SHIFT   0U
+#define XRTC_SFTY_CHK_REG_WIDTH   32U
+#define XRTC_SFTY_CHK_REG_MASK    0xffffffffU
+#define XRTC_SFTY_CHK_REG_DEFVAL  0x0U
+
+/**
+ * Register: XrtcEco
+ */
+#define XRTC_ECO_OFFSET    0x00000060U
+#define XRTC_ECO_RSTVAL   0x00000000U
+
+#define XRTC_ECO_REG_SHIFT   0U
+#define XRTC_ECO_REG_WIDTH   32U
+#define XRTC_ECO_REG_MASK    0xffffffffU
+#define XRTC_ECO_REG_DEFVAL  0x0U
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* This macro reads the given register.
+*
+* @param	RegisterAddr is the register address in the address
+* 			space of the RTC device.
+*
+* @return	The 32-bit value of the register
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XRtcPsu_ReadReg(RegisterAddr) Xil_In32(RegisterAddr)
+
+/****************************************************************************/
+/**
+*
+* This macro writes the given register.
+*
+* @param	RegisterAddr is the register address in the address
+* 			space of the RTC device.
+* @param	Data is the 32-bit value to write to the register.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XRtcPsu_WriteReg(RegisterAddr, Data) Xil_Out32(RegisterAddr, (u32)(Data))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XRTC_HW_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xscugic.h b/src/Xilinx/include/xscugic.h
new file mode 100644
index 0000000..e22ee5b
--- /dev/null
+++ b/src/Xilinx/include/xscugic.h
@@ -0,0 +1,372 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2018 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xscugic.h
+* @addtogroup scugic_v3_8
+* @{
+* @details
+*
+* The generic interrupt controller driver component.
+*
+* The interrupt controller driver uses the idea of priority for the various
+* handlers. Priority is an integer within the range of 1 and 31 inclusive with
+* default of 1 being the highest priority interrupt source. The priorities
+* of the various sources can be dynamically altered as needed through
+* hardware configuration.
+*
+* The generic interrupt controller supports the following
+* features:
+*
+*   - specific individual interrupt enabling/disabling
+*   - specific individual interrupt acknowledging
+*   - attaching specific callback function to handle interrupt source
+*   - assigning desired priority to interrupt source if default is not
+*     acceptable.
+*
+* Details about connecting the interrupt handler of the driver are contained
+* in the source file specific to interrupt processing, xscugic_intr.c.
+*
+* This driver is intended to be RTOS and processor independent.  It works with
+* physical addresses only.  Any needs for dynamic memory management, threads
+* or thread mutual exclusion, virtual memory, or cache control must be
+* satisfied by the layer above this driver.
+*
+* Interrupt Vector Tables
+*
+* The device ID of the interrupt controller device is used by the driver as a
+* direct index into the configuration data table. The user should populate the
+* vector table with handlers and callbacks at run-time using the
+* XScuGic_Connect() and XScuGic_Disconnect() functions.
+*
+* Each vector table entry corresponds to a device that can generate an
+* interrupt. Each entry contains an interrupt handler function and an
+* argument to be passed to the handler when an interrupt occurs.  The
+* user must use XScuGic_Connect() when the interrupt handler takes an
+* argument other than the base address.
+*
+* Nested Interrupts Processing
+*
+* Nested interrupts are not supported by this driver.
+*
+* NOTE:
+* The generic interrupt controller is not a part of the snoop control unit
+* as indicated by the prefix "scu" in the name of the driver.
+* It is an independent module in APU.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------------
+* 1.00a drg  01/19/00 First release
+* 1.01a sdm  11/09/11 The XScuGic and XScuGic_Config structures have changed.
+*		      The HandlerTable (of type XScuGic_VectorTableEntry) is
+*		      moved to XScuGic_Config structure from XScuGic structure.
+*
+*		      The "Config" entry in XScuGic structure is made as
+*		      pointer for better efficiency.
+*
+*		      A new file named as xscugic_hw.c is now added. It is
+*		      to implement low level driver routines without using
+*		      any xscugic instance pointer. They are useful when the
+*		      user wants to use xscugic through device id or
+*		      base address. The driver routines provided are explained
+*		      below.
+*		      XScuGic_DeviceInitialize that takes device id as
+*		      argument and initializes the device (without calling
+*		      XScuGic_CfgInitialize).
+*		      XScuGic_DeviceInterruptHandler that takes device id
+*		      as argument and calls appropriate handlers from the
+*		      HandlerTable.
+*		      XScuGic_RegisterHandler that registers a new handler
+*		      by taking xscugic hardware base address as argument.
+*		      LookupConfigByBaseAddress is used to return the
+*		      corresponding config structure from XScuGic_ConfigTable
+*		      based on the scugic base address passed.
+* 1.02a sdm  12/20/11 Removed AckBeforeService from the XScuGic_Config
+*		      structure.
+* 1.03a srt  02/27/13 Moved Offset calculation macros from *.c and *_hw.c to
+*		      *_hw.h
+*		      Added APIs
+*			- XScuGic_SetPriTrigTypeByDistAddr()
+*			- XScuGic_GetPriTrigTypeByDistAddr()
+*		      (CR 702687)
+*			Added support to direct interrupts to the appropriate CPU. Earlier
+*			  interrupts were directed to CPU1 (hard coded). Now depending
+*			  upon the CPU selected by the user (xparameters.h), interrupts
+*			  will be directed to the relevant CPU. This fixes CR 699688.
+* 1.04a hk   05/04/13 Assigned EffectiveAddr to CpuBaseAddress in
+*			  XScuGic_CfgInitialize. Fix for CR#704400 to remove warnings.
+*			  Moved functions XScuGic_SetPriTrigTypeByDistAddr and
+*             XScuGic_GetPriTrigTypeByDistAddr to xscugic_hw.c.
+*			  This is fix for CR#705621.
+* 1.05a hk   06/26/13 Modified tcl to export external interrupts correctly to
+*                     xparameters.h. Fix for CR's 690505, 708928 & 719359.
+* 2.0   adk  12/10/13 Updated as per the New Tcl API's
+* 2.1   adk  25/04/14 Fixed the CR:789373 changes are made in the driver tcl file.
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.2   asa  02/29/16 Modified DistributorInit function for Zynq AMP case. The
+*			  distributor is left uninitialized for Zynq AMP. It is assumed
+*             that the distributor will be initialized by Linux master. However
+*             for CortexR5 case, the earlier code is left unchanged where the
+*             the interrupt processor target registers in the distributor is
+*             initialized with the corresponding CPU ID on which the application
+*             built over the scugic driver runs.
+*             These changes fix CR#937243.
+*
+* 3.4   asa  04/07/16 Created a new static function DoDistributorInit to simplify
+*            the flow and avoid code duplication. Changes are made for
+*            USE_AMP use case for R5. In a scenario (in R5 split mode) when
+*            one R5 is operating with A53 in open amp config and other
+*            R5 running baremetal app, the existing code
+*            had the potential to stop the whole AMP solution to work (if
+*            for some reason the R5 running the baremetal app tasked to
+*            initialize the Distributor hangs or crashes before initializing).
+*            Changes are made so that the R5 under AMP first checks if
+*            the distributor is enabled or not and if not, it does the
+*            standard Distributor initialization.
+*            This fixes the CR#952962.
+* 3.6   ms   01/23/17 Modified xil_printf statement in main function for all
+*                     examples to ensure that "Successfully ran" and "Failed"
+*                     strings are available in all examples. This is a fix
+*                     for CR-965028.
+*       kvn  02/17/17 Add support for changing GIC CPU master at run time.
+*       kvn  02/28/17 Make the CpuId as static variable and Added new
+*                     XScugiC_GetCpuId to access CpuId.
+*       ms   03/17/17 Added readme.txt file in examples folder for doxygen
+*                     generation.
+* 3.7   ms   04/11/17 Modified tcl file to add suffix U for all macro
+*                     definitions of scugic in xparameters.h
+* 3.8   mus  07/05/17 Updated scugic.tcl to add support for intrrupts connected
+*                     through util_reduced_vector IP(OR gate)
+*       mus  07/05/17 Updated xdefine_zynq_canonical_xpars proc to initialize
+*                     the HandlerTable in XScuGic_ConfigTable to 0, it removes
+*                     the compilation warning in xscugic_g.c. Fix for CR#978736.
+*       mus  07/25/17 Updated xdefine_gic_params proc to export correct canonical
+*                     definitions for pl to ps interrupts.Fix for CR#980534
+* 3.9   mus  02/21/18 Added new API's XScuGic_UnmapAllInterruptsFromCpu and
+*                     XScuGic_InterruptUnmapFromCpu, These API's can be used
+*                     by applications to unmap specific/all interrupts from
+*                     target CPU.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XSCUGIC_H /* prevent circular inclusions */
+#define XSCUGIC_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xil_io.h"
+#include "xscugic_hw.h"
+#include "xil_exception.h"
+
+/************************** Constant Definitions *****************************/
+
+#define EFUSE_STATUS_OFFSET   0x10
+#define EFUSE_STATUS_CPU_MASK 0x80
+
+#if !defined (ARMR5) && !defined (__aarch64__) && !defined (ARMA53_32)
+#define ARMA9
+#endif
+/**************************** Type Definitions *******************************/
+
+/* The following data type defines each entry in an interrupt vector table.
+ * The callback reference is the base address of the interrupting device
+ * for the low level driver and an instance pointer for the high level driver.
+ */
+typedef struct
+{
+	Xil_InterruptHandler Handler;
+	void *CallBackRef;
+} XScuGic_VectorTableEntry;
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct
+{
+	u16 DeviceId;		/**< Unique ID  of device */
+	u32 CpuBaseAddress;	/**< CPU Interface Register base address */
+	u32 DistBaseAddress;	/**< Distributor Register base address */
+	XScuGic_VectorTableEntry HandlerTable[XSCUGIC_MAX_NUM_INTR_INPUTS];/**<
+				 Vector table of interrupt handlers */
+} XScuGic_Config;
+
+/**
+ * The XScuGic driver instance data. The user is required to allocate a
+ * variable of this type for every intc device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct
+{
+	XScuGic_Config *Config;  /**< Configuration table entry */
+	u32 IsReady;		 /**< Device is initialized and ready */
+	u32 UnhandledInterrupts; /**< Intc Statistics */
+} XScuGic;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* Write the given CPU Interface register
+*
+* @param    InstancePtr is a pointer to the instance to be worked on.
+* @param    RegOffset is the register offset to be written
+* @param    Data is the 32-bit value to write to the register
+*
+* @return   None.
+*
+* @note
+* C-style signature:
+*    void XScuGic_CPUWriteReg(XScuGic *InstancePtr, u32 RegOffset, u32 Data)
+*
+*****************************************************************************/
+#define XScuGic_CPUWriteReg(InstancePtr, RegOffset, Data) \
+(XScuGic_WriteReg(((InstancePtr)->Config->CpuBaseAddress), (RegOffset), \
+					((u32)(Data))))
+
+/****************************************************************************/
+/**
+*
+* Read the given CPU Interface register
+*
+* @param    InstancePtr is a pointer to the instance to be worked on.
+* @param    RegOffset is the register offset to be read
+*
+* @return   The 32-bit value of the register
+*
+* @note
+* C-style signature:
+*    u32 XScuGic_CPUReadReg(XScuGic *InstancePtr, u32 RegOffset)
+*
+*****************************************************************************/
+#define XScuGic_CPUReadReg(InstancePtr, RegOffset) \
+	(XScuGic_ReadReg(((InstancePtr)->Config->CpuBaseAddress), (RegOffset)))
+
+/****************************************************************************/
+/**
+*
+* Write the given Distributor Interface register
+*
+* @param    InstancePtr is a pointer to the instance to be worked on.
+* @param    RegOffset is the register offset to be written
+* @param    Data is the 32-bit value to write to the register
+*
+* @return   None.
+*
+* @note
+* C-style signature:
+*    void XScuGic_DistWriteReg(XScuGic *InstancePtr, u32 RegOffset, u32 Data)
+*
+*****************************************************************************/
+#define XScuGic_DistWriteReg(InstancePtr, RegOffset, Data) \
+(XScuGic_WriteReg(((InstancePtr)->Config->DistBaseAddress), (RegOffset), \
+					((u32)(Data))))
+
+/****************************************************************************/
+/**
+*
+* Read the given Distributor Interface register
+*
+* @param    InstancePtr is a pointer to the instance to be worked on.
+* @param    RegOffset is the register offset to be read
+*
+* @return   The 32-bit value of the register
+*
+* @note
+* C-style signature:
+*    u32 XScuGic_DistReadReg(XScuGic *InstancePtr, u32 RegOffset)
+*
+*****************************************************************************/
+#define XScuGic_DistReadReg(InstancePtr, RegOffset) \
+(XScuGic_ReadReg(((InstancePtr)->Config->DistBaseAddress), (RegOffset)))
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Required functions in xscugic.c
+ */
+
+s32  XScuGic_Connect(XScuGic *InstancePtr, u32 Int_Id,
+			Xil_InterruptHandler Handler, void *CallBackRef);
+void XScuGic_Disconnect(XScuGic *InstancePtr, u32 Int_Id);
+
+void XScuGic_Enable(XScuGic *InstancePtr, u32 Int_Id);
+void XScuGic_Disable(XScuGic *InstancePtr, u32 Int_Id);
+
+s32  XScuGic_CfgInitialize(XScuGic *InstancePtr, XScuGic_Config *ConfigPtr,
+							u32 EffectiveAddr);
+
+s32  XScuGic_SoftwareIntr(XScuGic *InstancePtr, u32 Int_Id, u32 Cpu_Id);
+
+void XScuGic_GetPriorityTriggerType(XScuGic *InstancePtr, u32 Int_Id,
+					u8 *Priority, u8 *Trigger);
+void XScuGic_SetPriorityTriggerType(XScuGic *InstancePtr, u32 Int_Id,
+					u8 Priority, u8 Trigger);
+void XScuGic_InterruptMaptoCpu(XScuGic *InstancePtr, u8 Cpu_Id, u32 Int_Id);
+void XScuGic_InterruptUnmapFromCpu(XScuGic *InstancePtr, u8 Cpu_Id, u32 Int_Id);
+void XScuGic_UnmapAllInterruptsFromCpu(XScuGic *InstancePtr, u8 Cpu_Id);
+void XScuGic_Stop(XScuGic *InstancePtr);
+void XScuGic_SetCpuID(u32 CpuCoreId);
+u32 XScuGic_GetCpuID(void);
+/*
+ * Initialization functions in xscugic_sinit.c
+ */
+XScuGic_Config *XScuGic_LookupConfig(u16 DeviceId);
+
+/*
+ * Interrupt functions in xscugic_intr.c
+ */
+void XScuGic_InterruptHandler(XScuGic *InstancePtr);
+
+/*
+ * Self-test functions in xscugic_selftest.c
+ */
+s32  XScuGic_SelfTest(XScuGic *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif            /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xscugic_hw.h b/src/Xilinx/include/xscugic_hw.h
new file mode 100644
index 0000000..08e65f4
--- /dev/null
+++ b/src/Xilinx/include/xscugic_hw.h
@@ -0,0 +1,650 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xscugic_hw.h
+* @addtogroup scugic_v3_8
+* @{
+*
+* This header file contains identifiers and HW access functions (or
+* macros) that can be used to access the device.  The user should refer to the
+* hardware device specification for more details of the device operation.
+* The driver functions/APIs are defined in xscugic.h.
+*
+* This GIC device has two parts, a distributor and CPU interface(s). Each part
+* has separate register definition sections.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------------
+* 1.00a drg  01/19/10 First release
+* 1.01a sdm  11/09/11 "xil_exception.h" added as include.
+*		      Macros XScuGic_EnableIntr and XScuGic_DisableIntr are
+*		      added to enable or disable interrupts based on
+*		      Distributor Register base address. Normally users use
+*		      XScuGic instance and call XScuGic_Enable or
+*		      XScuGic_Disable to enable/disable interrupts. These
+*		      new macros are provided when user does not want to
+*		      use an instance pointer but still wants to enable or
+*		      disable interrupts.
+*		      Function prototypes for functions (present in newly
+*		      added file xscugic_hw.c) are added.
+* 1.03a srt  02/27/13 Moved Offset calculation macros from *_hw.c (CR
+*		      702687).
+* 1.04a hk   05/04/13 Fix for CR#705621. Moved function prototypes
+*		      XScuGic_SetPriTrigTypeByDistAddr and
+*         	      XScuGic_GetPriTrigTypeByDistAddr here from xscugic.h
+* 3.0	pkp  12/09/14 changed XSCUGIC_MAX_NUM_INTR_INPUTS for
+*		      Zynq Ultrascale Mp
+* 3.0   kvn  02/13/14 Modified code for MISRA-C:2012 compliance.
+* 3.2	pkp  11/09/15 Corrected the interrupt processsor target mask value
+*					  for CPU interface 2 i.e. XSCUGIC_SPI_CPU2_MASK
+* 3.9   mus  02/21/18 Added new API's XScuGic_InterruptUnmapFromCpuByDistAddr
+*					  and XScuGic_UnmapAllInterruptsFromCpuByDistAddr, These
+*					  API's can be used by applications to unmap specific/all
+*					  interrupts from target CPU. It fixes CR#992490.
+* 

+*
+******************************************************************************/
+
+#ifndef XSCUGIC_HW_H /* prevent circular inclusions */
+#define XSCUGIC_HW_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xil_exception.h"
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * The maximum number of interrupts supported by the hardware.
+ */
+#ifdef __ARM_NEON__
+#define XSCUGIC_MAX_NUM_INTR_INPUTS    	95U /* Maximum number of interrupt defined by Zynq */
+#else
+#define XSCUGIC_MAX_NUM_INTR_INPUTS    	195U /* Maximum number of interrupt defined by Zynq Ultrascale Mp */
+#endif
+
+/*
+ * The maximum priority value that can be used in the GIC.
+ */
+#define XSCUGIC_MAX_INTR_PRIO_VAL    	248U
+#define XSCUGIC_INTR_PRIO_MASK			0x000000F8U
+
+/** @name Distributor Interface Register Map
+ *
+ * Define the offsets from the base address for all Distributor registers of
+ * the interrupt controller, some registers may be reserved in the hardware
+ * device.
+ * @{
+ */
+#define XSCUGIC_DIST_EN_OFFSET		0x00000000U /**< Distributor Enable
+							Register */
+#define XSCUGIC_IC_TYPE_OFFSET		0x00000004U /**< Interrupt Controller
+							Type Register */
+#define XSCUGIC_DIST_IDENT_OFFSET	0x00000008U /**< Implementor ID
+							Register */
+#define XSCUGIC_SECURITY_OFFSET		0x00000080U /**< Interrupt Security
+							Register */
+#define XSCUGIC_ENABLE_SET_OFFSET	0x00000100U /**< Enable Set
+							Register */
+#define XSCUGIC_DISABLE_OFFSET		0x00000180U /**< Enable Clear Register */
+#define XSCUGIC_PENDING_SET_OFFSET	0x00000200U /**< Pending Set
+							Register */
+#define XSCUGIC_PENDING_CLR_OFFSET	0x00000280U /**< Pending Clear
+							Register */
+#define XSCUGIC_ACTIVE_OFFSET		0x00000300U /**< Active Status Register */
+#define XSCUGIC_PRIORITY_OFFSET		0x00000400U /**< Priority Level Register */
+#define XSCUGIC_SPI_TARGET_OFFSET	0x00000800U /**< SPI Target
+							Register 0x800-0x8FB */
+#define XSCUGIC_INT_CFG_OFFSET		0x00000C00U /**< Interrupt Configuration
+							Register 0xC00-0xCFC */
+#define XSCUGIC_PPI_STAT_OFFSET		0x00000D00U /**< PPI Status Register */
+#define XSCUGIC_SPI_STAT_OFFSET		0x00000D04U /**< SPI Status Register
+							0xd04-0xd7C */
+#define XSCUGIC_AHB_CONFIG_OFFSET	0x00000D80U /**< AHB Configuration
+							Register */
+#define XSCUGIC_SFI_TRIG_OFFSET		0x00000F00U /**< Software Triggered
+							Interrupt Register */
+#define XSCUGIC_PERPHID_OFFSET		0x00000FD0U /**< Peripheral ID Reg */
+#define XSCUGIC_PCELLID_OFFSET		0x00000FF0U /**< Pcell ID Register */
+/* @} */
+
+/** @name  Distributor Enable Register
+ * Controls if the distributor response to external interrupt inputs.
+ * @{
+ */
+#define XSCUGIC_EN_INT_MASK		0x00000001U /**< Interrupt In Enable */
+/* @} */
+
+/** @name  Interrupt Controller Type Register
+ * @{
+ */
+#define XSCUGIC_LSPI_MASK	0x0000F800U /**< Number of Lockable
+						Shared Peripheral
+						Interrupts*/
+#define XSCUGIC_DOMAIN_MASK	0x00000400U /**< Number os Security domains*/
+#define XSCUGIC_CPU_NUM_MASK	0x000000E0U /**< Number of CPU Interfaces */
+#define XSCUGIC_NUM_INT_MASK	0x0000001FU /**< Number of Interrupt IDs */
+/* @} */
+
+/** @name  Implementor ID Register
+ * Implementor and revision information.
+ * @{
+ */
+#define XSCUGIC_REV_MASK	0x00FFF000U /**< Revision Number */
+#define XSCUGIC_IMPL_MASK	0x00000FFFU /**< Implementor */
+/* @} */
+
+/** @name  Interrupt Security Registers
+ * Each bit controls the security level of an interrupt, either secure or non
+ * secure. These registers can only be accessed using secure read and write.
+ * There are registers for each of the CPU interfaces at offset 0x080.  A
+ * register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x084.
+ * @{
+ */
+#define XSCUGIC_INT_NS_MASK	0x00000001U /**< Each bit corresponds to an
+						INT_ID */
+/* @} */
+
+/** @name  Enable Set Register
+ * Each bit controls the enabling of an interrupt, a 0 is disabled, a 1 is
+ * enabled. Writing a 0 has no effect. Use the ENABLE_CLR register to set a
+ * bit to 0.
+ * There are registers for each of the CPU interfaces at offset 0x100. With up
+ * to 8 registers aliased to the same address. A register set for the SPI
+ * interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x104.
+ * @{
+ */
+#define XSCUGIC_INT_EN_MASK	0x00000001U /**< Each bit corresponds to an
+						INT_ID */
+/* @} */
+
+/** @name  Enable Clear Register
+ * Each bit controls the disabling of an interrupt, a 0 is disabled, a 1 is
+ * enabled. Writing a 0 has no effect. Writing a 1 disables an interrupt and
+ * sets the corresponding bit to 0.
+ * There are registers for each of the CPU interfaces at offset 0x180. With up
+ * to 8 registers aliased to the same address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x184.
+ * @{
+ */
+#define XSCUGIC_INT_CLR_MASK	0x00000001U /**< Each bit corresponds to an
+						INT_ID */
+/* @} */
+
+/** @name  Pending Set Register
+ * Each bit controls the Pending or Active and Pending state of an interrupt, a
+ * 0 is not pending, a 1 is pending. Writing a 0 has no effect. Writing a 1 sets
+ * an interrupt to the pending state.
+ * There are registers for each of the CPU interfaces at offset 0x200. With up
+ * to 8 registers aliased to the same address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x204.
+ * @{
+ */
+#define XSCUGIC_PEND_SET_MASK	0x00000001U /**< Each bit corresponds to an
+						INT_ID */
+/* @} */
+
+/** @name  Pending Clear Register
+ * Each bit can clear the Pending or Active and Pending state of an interrupt, a
+ * 0 is not pending, a 1 is pending. Writing a 0 has no effect. Writing a 1
+ * clears the pending state of an interrupt.
+ * There are registers for each of the CPU interfaces at offset 0x280. With up
+ * to 8 registers aliased to the same address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x284.
+ * @{
+ */
+#define XSCUGIC_PEND_CLR_MASK	0x00000001U /**< Each bit corresponds to an
+						INT_ID */
+/* @} */
+
+/** @name  Active Status Register
+ * Each bit provides the Active status of an interrupt, a
+ * 0 is not Active, a 1 is Active. This is a read only register.
+ * There are registers for each of the CPU interfaces at offset 0x300. With up
+ * to 8 registers aliased to each address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x380.
+ * @{
+ */
+#define XSCUGIC_ACTIVE_MASK	0x00000001U /**< Each bit corresponds to an
+					      INT_ID */
+/* @} */
+
+/** @name  Priority Level Register
+ * Each byte in a Priority Level Register sets the priority level of an
+ * interrupt. Reading the register provides the priority level of an interrupt.
+ * There are registers for each of the CPU interfaces at offset 0x400 through
+ * 0x41C. With up to 8 registers aliased to each address.
+ * 0 is highest priority, 0xFF is lowest.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 255 of these registers staring at location 0x420.
+ * @{
+ */
+#define XSCUGIC_PRIORITY_MASK	0x000000FFU /**< Each Byte corresponds to an
+						INT_ID */
+#define XSCUGIC_PRIORITY_MAX	0x000000FFU /**< Highest value of a priority
+						actually the lowest priority*/
+/* @} */
+
+/** @name  SPI Target Register 0x800-0x8FB
+ * Each byte references a separate SPI and programs which of the up to 8 CPU
+ * interfaces are sent a Pending interrupt.
+ * There are registers for each of the CPU interfaces at offset 0x800 through
+ * 0x81C. With up to 8 registers aliased to each address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 255 of these registers staring at location 0x820.
+ *
+ * This driver does not support multiple CPU interfaces. These are included
+ * for complete documentation.
+ * @{
+ */
+#define XSCUGIC_SPI_CPU7_MASK	0x00000080U /**< CPU 7 Mask*/
+#define XSCUGIC_SPI_CPU6_MASK	0x00000040U /**< CPU 6 Mask*/
+#define XSCUGIC_SPI_CPU5_MASK	0x00000020U /**< CPU 5 Mask*/
+#define XSCUGIC_SPI_CPU4_MASK	0x00000010U /**< CPU 4 Mask*/
+#define XSCUGIC_SPI_CPU3_MASK	0x00000008U /**< CPU 3 Mask*/
+#define XSCUGIC_SPI_CPU2_MASK	0x00000004U /**< CPU 2 Mask*/
+#define XSCUGIC_SPI_CPU1_MASK	0x00000002U /**< CPU 1 Mask*/
+#define XSCUGIC_SPI_CPU0_MASK	0x00000001U /**< CPU 0 Mask*/
+/* @} */
+
+/** @name  Interrupt Configuration Register 0xC00-0xCFC
+ * The interrupt configuration registers program an SFI to be active HIGH level
+ * sensitive or rising edge sensitive.
+ * Each bit pair describes the configuration for an INT_ID.
+ * SFI    Read Only    b10 always
+ * PPI    Read Only    depending on how the PPIs are configured.
+ *                    b01    Active HIGH level sensitive
+ *                    b11 Rising edge sensitive
+ * SPI                LSB is read only.
+ *                    b01    Active HIGH level sensitive
+ *                    b11 Rising edge sensitive/
+ * There are registers for each of the CPU interfaces at offset 0xC00 through
+ * 0xC04. With up to 8 registers aliased to each address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 255 of these registers staring at location 0xC08.
+ * @{
+ */
+#define XSCUGIC_INT_CFG_MASK    0x00000003U    /**< */
+/* @} */
+
+/** @name  PPI Status Register
+ * Enables an external AMBA master to access the status of the PPI inputs.
+ * A CPU can only read the status of its local PPI signals and cannot read the
+ * status for other CPUs.
+ * This register is aliased for each CPU interface.
+ * @{
+ */
+#define XSCUGIC_PPI_C15_MASK	0x00008000U    /**< PPI Status */
+#define XSCUGIC_PPI_C14_MASK	0x00004000U    /**< PPI Status */
+#define XSCUGIC_PPI_C13_MASK	0x00002000U    /**< PPI Status */
+#define XSCUGIC_PPI_C12_MASK	0x00001000U    /**< PPI Status */
+#define XSCUGIC_PPI_C11_MASK	0x00000800U    /**< PPI Status */
+#define XSCUGIC_PPI_C10_MASK	0x00000400U    /**< PPI Status */
+#define XSCUGIC_PPI_C09_MASK	0x00000200U    /**< PPI Status */
+#define XSCUGIC_PPI_C08_MASK	0x00000100U    /**< PPI Status */
+#define XSCUGIC_PPI_C07_MASK	0x00000080U    /**< PPI Status */
+#define XSCUGIC_PPI_C06_MASK	0x00000040U    /**< PPI Status */
+#define XSCUGIC_PPI_C05_MASK	0x00000020U    /**< PPI Status */
+#define XSCUGIC_PPI_C04_MASK	0x00000010U    /**< PPI Status */
+#define XSCUGIC_PPI_C03_MASK	0x00000008U    /**< PPI Status */
+#define XSCUGIC_PPI_C02_MASK	0x00000004U    /**< PPI Status */
+#define XSCUGIC_PPI_C01_MASK	0x00000002U    /**< PPI Status */
+#define XSCUGIC_PPI_C00_MASK	0x00000001U    /**< PPI Status */
+/* @} */
+
+/** @name  SPI Status Register 0xd04-0xd7C
+ * Enables an external AMBA master to access the status of the SPI inputs.
+ * There are up to 63 registers if the maximum number of SPI inputs are
+ * configured.
+ * @{
+ */
+#define XSCUGIC_SPI_N_MASK    0x00000001U    /**< Each bit corresponds to an SPI
+					     input */
+/* @} */
+
+/** @name  AHB Configuration Register
+ * Provides the status of the CFGBIGEND input signal and allows the endianess
+ * of the GIC to be set.
+ * @{
+ */
+#define XSCUGIC_AHB_END_MASK       0x00000004U    /**< 0-GIC uses little Endian,
+                                                  1-GIC uses Big Endian */
+#define XSCUGIC_AHB_ENDOVR_MASK    0x00000002U    /**< 0-Uses CFGBIGEND control,
+                                                  1-use the AHB_END bit */
+#define XSCUGIC_AHB_TIE_OFF_MASK   0x00000001U    /**< State of CFGBIGEND */
+
+/* @} */
+
+/** @name  Software Triggered Interrupt Register
+ * Controls issueing of software interrupts.
+ * @{
+ */
+#define XSCUGIC_SFI_SELFTRIG_MASK	0x02010000U
+#define XSCUGIC_SFI_TRIG_TRGFILT_MASK    0x03000000U    /**< Target List filter
+                                                            b00-Use the target List
+                                                            b01-All CPUs except requester
+                                                            b10-To Requester
+                                                            b11-reserved */
+#define XSCUGIC_SFI_TRIG_CPU_MASK	0x00FF0000U    /**< CPU Target list */
+#define XSCUGIC_SFI_TRIG_SATT_MASK	0x00008000U    /**< 0= Use a secure interrupt */
+#define XSCUGIC_SFI_TRIG_INTID_MASK	0x0000000FU    /**< Set to the INTID
+                                                        signaled to the CPU*/
+/* @} */
+
+/** @name CPU Interface Register Map
+ *
+ * Define the offsets from the base address for all CPU registers of the
+ * interrupt controller, some registers may be reserved in the hardware device.
+ * @{
+ */
+#define XSCUGIC_CONTROL_OFFSET		0x00000000U /**< CPU Interface Control
+							Register */
+#define XSCUGIC_CPU_PRIOR_OFFSET	0x00000004U /**< Priority Mask Reg */
+#define XSCUGIC_BIN_PT_OFFSET		0x00000008U /**< Binary Point Register */
+#define XSCUGIC_INT_ACK_OFFSET		0x0000000CU /**< Interrupt ACK Reg */
+#define XSCUGIC_EOI_OFFSET		0x00000010U /**< End of Interrupt Reg */
+#define XSCUGIC_RUN_PRIOR_OFFSET	0x00000014U /**< Running Priority Reg */
+#define XSCUGIC_HI_PEND_OFFSET		0x00000018U /**< Highest Pending Interrupt
+							Register */
+#define XSCUGIC_ALIAS_BIN_PT_OFFSET	0x0000001CU /**< Aliased non-Secure
+						        Binary Point Register */
+
+/**<  0x00000020 to 0x00000FBC are reserved and should not be read or written
+ * to. */
+/* @} */
+
+
+/** @name Control Register
+ * CPU Interface Control register definitions
+ * All bits are defined here although some are not available in the non-secure
+ * mode.
+ * @{
+ */
+#define XSCUGIC_CNTR_SBPR_MASK	0x00000010U    /**< Secure Binary Pointer,
+                                                 0=separate registers,
+                                                 1=both use bin_pt_s */
+#define XSCUGIC_CNTR_FIQEN_MASK	0x00000008U    /**< Use nFIQ_C for secure
+                                                  interrupts,
+                                                  0= use IRQ for both,
+                                                  1=Use FIQ for secure, IRQ for non*/
+#define XSCUGIC_CNTR_ACKCTL_MASK	0x00000004U    /**< Ack control for secure or non secure */
+#define XSCUGIC_CNTR_EN_NS_MASK		0x00000002U    /**< Non Secure enable */
+#define XSCUGIC_CNTR_EN_S_MASK		0x00000001U    /**< Secure enable, 0=Disabled, 1=Enabled */
+/* @} */
+
+/** @name Priority Mask Register
+ * Priority Mask register definitions
+ * The CPU interface does not send interrupt if the level of the interrupt is
+ * lower than the level of the register.
+ * @{
+ */
+/*#define XSCUGIC_PRIORITY_MASK		0x000000FFU*/   /**< All interrupts */
+/* @} */
+
+/** @name Binary Point Register
+ * Binary Point register definitions
+ * @{
+ */
+
+#define XSCUGIC_BIN_PT_MASK	0x00000007U  /**< Binary point mask value
+						Value  Secure  Non-secure
+						b000    0xFE    0xFF
+						b001    0xFC    0xFE
+						b010    0xF8    0xFC
+						b011    0xF0    0xF8
+						b100    0xE0    0xF0
+						b101    0xC0    0xE0
+						b110    0x80    0xC0
+						b111    0x00    0x80
+						*/
+/*@}*/
+
+/** @name Interrupt Acknowledge Register
+ * Interrupt Acknowledge register definitions
+ * Identifies the current Pending interrupt, and the CPU ID for software
+ * interrupts.
+ */
+#define XSCUGIC_ACK_INTID_MASK		0x000003FFU /**< Interrupt ID */
+#define XSCUGIC_CPUID_MASK		0x00000C00U /**< CPU ID */
+/* @} */
+
+/** @name End of Interrupt Register
+ * End of Interrupt register definitions
+ * Allows the CPU to signal the GIC when it completes an interrupt service
+ * routine.
+ */
+#define XSCUGIC_EOI_INTID_MASK		0x000003FFU /**< Interrupt ID */
+
+/* @} */
+
+/** @name Running Priority Register
+ * Running Priority register definitions
+ * Identifies the interrupt priority level of the highest priority active
+ * interrupt.
+ */
+#define XSCUGIC_RUN_PRIORITY_MASK	0x000000FFU    /**< Interrupt Priority */
+/* @} */
+
+/*
+ * Highest Pending Interrupt register definitions
+ * Identifies the interrupt priority of the highest priority pending interupt
+ */
+#define XSCUGIC_PEND_INTID_MASK		0x000003FFU /**< Pending Interrupt ID */
+/*#define XSCUGIC_CPUID_MASK		0x00000C00U */	 /**< CPU ID */
+/* @} */
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* Read the Interrupt Configuration Register offset for an interrupt id.
+*
+* @param	InterruptID is the interrupt number.
+*
+* @return	The 32-bit value of the offset
+*
+* @note
+*
+*****************************************************************************/
+#define XSCUGIC_INT_CFG_OFFSET_CALC(InterruptID) \
+	((u32)XSCUGIC_INT_CFG_OFFSET + (((InterruptID)/16U) * 4U))
+
+/****************************************************************************/
+/**
+*
+* Read the Interrupt Priority Register offset for an interrupt id.
+*
+* @param	InterruptID is the interrupt number.
+*
+* @return	The 32-bit value of the offset
+*
+* @note
+*
+*****************************************************************************/
+#define XSCUGIC_PRIORITY_OFFSET_CALC(InterruptID) \
+	((u32)XSCUGIC_PRIORITY_OFFSET + (((InterruptID)/4U) * 4U))
+
+/****************************************************************************/
+/**
+*
+* Read the SPI Target Register offset for an interrupt id.
+*
+* @param	InterruptID is the interrupt number.
+*
+* @return	The 32-bit value of the offset
+*
+* @note
+*
+*****************************************************************************/
+#define XSCUGIC_SPI_TARGET_OFFSET_CALC(InterruptID) \
+	((u32)XSCUGIC_SPI_TARGET_OFFSET + (((InterruptID)/4U) * 4U))
+
+/****************************************************************************/
+/**
+*
+* Read the Interrupt Clear-Enable Register offset for an interrupt ID
+*
+* @param	Register is the register offset for the clear/enable bank.
+* @param	InterruptID is the interrupt number.
+*
+* @return	The 32-bit value of the offset
+*
+* @note
+*
+*****************************************************************************/
+#define XSCUGIC_EN_DIS_OFFSET_CALC(Register, InterruptID) \
+		((Register) + (((InterruptID)/32U) * 4U))
+
+/****************************************************************************/
+/**
+*
+* Read the given Intc register.
+*
+* @param	BaseAddress is the base address of the device.
+* @param	RegOffset is the register offset to be read
+*
+* @return	The 32-bit value of the register
+*
+* @note
+* C-style signature:
+*    u32 XScuGic_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+*****************************************************************************/
+#define XScuGic_ReadReg(BaseAddress, RegOffset) \
+	(Xil_In32((BaseAddress) + (RegOffset)))
+
+
+/****************************************************************************/
+/**
+*
+* Write the given Intc register.
+*
+* @param	BaseAddress is the base address of the device.
+* @param	RegOffset is the register offset to be written
+* @param	Data is the 32-bit value to write to the register
+*
+* @return	None.
+*
+* @note
+* C-style signature:
+*    void XScuGic_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+*****************************************************************************/
+#define XScuGic_WriteReg(BaseAddress, RegOffset, Data) \
+	(Xil_Out32(((BaseAddress) + (RegOffset)), ((u32)(Data))))
+
+
+/****************************************************************************/
+/**
+*
+* Enable specific interrupt(s) in the interrupt controller.
+*
+* @param	DistBaseAddress is the Distributor Register base address of the
+*		device
+* @param	Int_Id is the ID of the interrupt source and should be in the
+*		range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XScuGic_EnableIntr(u32 DistBaseAddress, u32 Int_Id)
+*
+*****************************************************************************/
+#define XScuGic_EnableIntr(DistBaseAddress, Int_Id) \
+	XScuGic_WriteReg((DistBaseAddress), \
+			 XSCUGIC_ENABLE_SET_OFFSET + (((Int_Id) / 32U) * 4U), \
+			 (0x00000001U << ((Int_Id) % 32U)))
+
+/****************************************************************************/
+/**
+*
+* Disable specific interrupt(s) in the interrupt controller.
+*
+* @param	DistBaseAddress is the Distributor Register base address of the
+*		device
+* @param	Int_Id is the ID of the interrupt source and should be in the
+*		range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
+*
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XScuGic_DisableIntr(u32 DistBaseAddress, u32 Int_Id)
+*
+*****************************************************************************/
+#define XScuGic_DisableIntr(DistBaseAddress, Int_Id) \
+	XScuGic_WriteReg((DistBaseAddress), \
+			 XSCUGIC_DISABLE_OFFSET + (((Int_Id) / 32U) * 4U), \
+			 (0x00000001U << ((Int_Id) % 32U)))
+
+
+/************************** Function Prototypes ******************************/
+
+void XScuGic_DeviceInterruptHandler(void *DeviceId);
+s32  XScuGic_DeviceInitialize(u32 DeviceId);
+void XScuGic_RegisterHandler(u32 BaseAddress, s32 InterruptID,
+			     Xil_InterruptHandler Handler, void *CallBackRef);
+void XScuGic_SetPriTrigTypeByDistAddr(u32 DistBaseAddress, u32 Int_Id,
+                                        u8 Priority, u8 Trigger);
+void XScuGic_GetPriTrigTypeByDistAddr(u32 DistBaseAddress, u32 Int_Id,
+					u8 *Priority, u8 *Trigger);
+void XScuGic_InterruptUnmapFromCpuByDistAddr(u32 DistBaseAddress,
+											u8 Cpu_Id, u32 Int_Id);
+void XScuGic_UnmapAllInterruptsFromCpuByDistAddr(u32 DistBaseAddress,
+												u8 Cpu_Id);
+/************************** Variable Definitions *****************************/
+#ifdef __cplusplus
+}
+#endif
+
+#endif            /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xsdps.h b/src/Xilinx/include/xsdps.h
new file mode 100644
index 0000000..3f9ffd2
--- /dev/null
+++ b/src/Xilinx/include/xsdps.h
@@ -0,0 +1,280 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsdps.h
+* @addtogroup sdps_v3_4
+* @{
+* @details
+*
+* This file contains the implementation of XSdPs driver.
+* This driver is used initialize read from and write to the SD card.
+* Features such as switching bus width to 4-bit and switching to high speed,
+* changing clock frequency, block size etc. are supported.
+* SD 2.0 uses 1/4 bus width and speeds of 25/50KHz. Initialization, however
+* is done using 1-bit bus width and 400KHz clock frequency.
+* SD commands are classified as broadcast and addressed. Commands can be
+* those with response only (using only command line) or
+* response + data (using command and data lines).
+* Only one command can be sent at a time. During a data transfer however,
+* when dsta lines are in use, certain commands (which use only the command
+* line) can be sent, most often to obtain status.
+* This driver does not support multi card slots at present.
+*
+* Intialization:
+* This includes initialization on the host controller side to select
+* clock frequency, bus power and default transfer related parameters.
+* The default voltage is 3.3V.
+* On the SD card side, the initialization and identification state diagram is
+* implemented. This resets the card, gives it a unique address/ID and
+* identifies key card related specifications.
+*
+* Data transfer:
+* The SD card is put in tranfer state to read from or write to it.
+* The default block size is 512 bytes and if supported,
+* default bus width is 4-bit and bus speed is High speed.
+* The read and write functions are implemented in polled mode using ADMA2.
+*
+* At any point, when key parameters such as block size or
+* clock/speed or bus width are modified, this driver takes care of
+* maintaining the same selection on host and card.
+* All error bits in host controller are monitored by the driver and in the
+* event one of them is set, driver will clear the interrupt status and
+* communicate failure to the upper layer.
+*
+* File system use:
+* This driver can be used with xilffs library to read and write files to SD.
+* (Please refer to procedure in diskio.c). The file system read/write example
+* in polled mode can used for reference.
+*
+* There is no example for using SD driver without file system at present.
+* However, the driver can be used without the file system. The glue layer
+* in filesytem can be used as reference for the same. The block count
+* passed to the read/write function in one call is limited by the ADMA2
+* descriptor table and hence care will have to be taken to call read/write
+* API's in a loop for large file sizes.
+*
+* Interrupt mode is not supported because it offers no improvement when used
+* with file system.
+*
+* eMMC support:
+* SD driver supports SD and eMMC based on the "enable MMC" parameter in SDK.
+* The features of eMMC supported by the driver will depend on those supported
+* by the host controller. The current driver supports read/write on eMMC card
+* using 4-bit and high speed mode currently.
+*
+* Features not supported include - card write protect, password setting,
+* lock/unlock, interrupts, SDMA mode, programmed I/O mode and
+* 64-bit addressed ADMA2, erase/pre-erase commands.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ---    -------- -----------------------------------------------
+* 1.00a hk/sg  10/17/13 Initial release
+* 2.0   hk      03/07/14 Version number revised.
+* 2.1   hk     04/18/14 Increase sleep for eMMC switch command.
+*                       Add sleep for microblaze designs. CR# 781117.
+* 2.2   hk     07/28/14 Make changes to enable use of data cache.
+* 2.3   sk     09/23/14 Send command for relative card address
+*                       when re-initialization is done.CR# 819614.
+*						Use XSdPs_Change_ClkFreq API whenever changing
+*						clock.CR# 816586.
+* 2.4	sk	   12/04/14 Added support for micro SD without
+* 						WP/CD. CR# 810655.
+*						Checked for DAT Inhibit mask instead of CMD
+* 						Inhibit mask in Cmd Transfer API.
+*						Added Support for SD Card v1.0
+* 2.5 	sg		07/09/15 Added SD 3.0 features
+*       kvn     07/15/15 Modified the code according to MISRAC-2012.
+* 2.6   sk     10/12/15 Added support for SD card v1.0 CR# 840601.
+* 2.7   sk     11/24/15 Considered the slot type befoe checking CD/WP pins.
+*       sk     12/10/15 Added support for MMC cards.
+*              01/08/16 Added workaround for issue in auto tuning mode
+*                       of SDR50, SDR104 and HS200.
+*       sk     02/16/16 Corrected the Tuning logic.
+*       sk     03/01/16 Removed Bus Width check for eMMC. CR# 938311.
+* 2.8   sk     04/20/16 Added new workaround for auto tuning.
+*              05/03/16 Standard Speed for SD to 19MHz in ZynqMPSoC. CR#951024
+* 3.0   sk     06/09/16 Added support for mkfs to calculate sector count.
+*       sk     07/16/16 Added support for UHS modes.
+*       sk     07/07/16 Used usleep API for both arm and microblaze.
+*       sk     07/16/16 Added Tap delays accordingly to different SD/eMMC
+*                       operating modes.
+*       sk     08/13/16 Removed sleep.h from xsdps.h as a temporary fix for
+*                       CR#956899.
+* 3.1   mi     09/07/16 Removed compilation warnings with extra compiler flags.
+*       sk     10/13/16 Reduced the delay during power cycle to 1ms as per spec
+*       sk     10/19/16 Used emmc_hwreset pin to reset eMMC.
+*       sk     11/07/16 Enable Rst_n bit in ext_csd reg if not enabled.
+*       sk     11/16/16 Issue DLL reset at 31 iteration to load new zero value.
+* 3.2   sk     11/30/16 Modified the voltage switching sequence as per spec.
+*       sk     02/01/17 Added HSD and DDR mode support for eMMC.
+*       sk     02/01/17 Consider bus width parameter from design for switching
+*       vns    02/09/17 Added ARMA53_32 support for ZynqMP CR#968397
+*       sk     03/20/17 Add support for EL1 non-secure mode.
+* 3.3   mn     05/17/17 Add support for 64bit DMA addressing
+* 	mn     08/07/17 Modify driver to support 64-bit DMA in arm64 only
+*       mn     08/17/17 Enabled CCI support for A53 by adding cache coherency
+*                       information.
+*       mn     09/06/17 Resolved compilation errors with IAR toolchain
+*
+* 

+*
+******************************************************************************/
+
+
+#ifndef SDPS_H_
+#define SDPS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "xil_printf.h"
+#include "xil_cache.h"
+#include "xstatus.h"
+#include "xsdps_hw.h"
+#include "xplatform_info.h"
+#include 
+
+/************************** Constant Definitions *****************************/
+
+#define XSDPS_CT_ERROR	0x2U	/**< Command timeout flag */
+#define MAX_TUNING_COUNT	40U		/**< Maximum Tuning count */
+
+/**************************** Type Definitions *******************************/
+
+typedef void (*XSdPs_ConfigTap) (u32 Bank, u32 DeviceId, u32 CardType);
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;			/**< Unique ID  of device */
+	u32 BaseAddress;		/**< Base address of the device */
+	u32 InputClockHz;		/**< Input clock frequency */
+	u32 CardDetect;			/**< Card Detect */
+	u32 WriteProtect;			/**< Write Protect */
+	u32 BusWidth;			/**< Bus Width */
+	u32 BankNumber;			/**< MIO Bank selection for SD */
+	u32 HasEMIO;			/**< If SD is connected to EMIO */
+	u8 IsCacheCoherent; 		/**< If SD is Cache Coherent or not */
+} XSdPs_Config;
+
+/* ADMA2 descriptor table */
+typedef struct {
+	u16 Attribute;		/**< Attributes of descriptor */
+	u16 Length;		/**< Length of current dma transfer */
+#ifdef __aarch64__
+	u64 Address;		/**< Address of current dma transfer */
+#else
+	u32 Address;		/**< Address of current dma transfer */
+#endif
+#ifdef __ICCARM__
+#pragma data_alignment = 32
+} XSdPs_Adma2Descriptor;
+#pragma data_alignment = 4
+#else
+}  __attribute__((__packed__))XSdPs_Adma2Descriptor;
+#endif
+
+/**
+ * The XSdPs driver instance data. The user is required to allocate a
+ * variable of this type for every SD device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XSdPs_Config Config;	/**< Configuration structure */
+	u32 IsReady;		/**< Device is initialized and ready */
+	u32 Host_Caps;		/**< Capabilities of host controller */
+	u32 Host_CapsExt;	/**< Extended Capabilities */
+	u32 HCS;		/**< High capacity support in card */
+	u8  CardType;		/**< Type of card - SD/MMC/eMMC */
+	u8  Card_Version;	/**< Card version */
+	u8  HC_Version;		/**< Host controller version */
+	u8  BusWidth;		/**< Current operating bus width */
+	u32 BusSpeed;		/**< Current operating bus speed */
+	u8  Switch1v8;		/**< 1.8V Switch support */
+	u32 CardID[4];		/**< Card ID Register */
+	u32 RelCardAddr;	/**< Relative Card Address */
+	u32 CardSpecData[4];	/**< Card Specific Data Register */
+	u32 SectorCount;		/**< Sector Count */
+	u32 SdCardConfig;	/**< Sd Card Configuration Register */
+	u32 Mode;			/**< Bus Speed Mode */
+	XSdPs_ConfigTap Config_TapDelay;	/**< Configuring the tap delays */
+	/**< ADMA Descriptors */
+#ifdef __ICCARM__
+#pragma data_alignment = 32
+	XSdPs_Adma2Descriptor Adma2_DescrTbl[32];
+#pragma data_alignment = 4
+#else
+	XSdPs_Adma2Descriptor Adma2_DescrTbl[32] __attribute__ ((aligned(32)));
+#endif
+} XSdPs;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+XSdPs_Config *XSdPs_LookupConfig(u16 DeviceId);
+s32 XSdPs_CfgInitialize(XSdPs *InstancePtr, XSdPs_Config *ConfigPtr,
+				u32 EffectiveAddr);
+s32 XSdPs_SdCardInitialize(XSdPs *InstancePtr);
+s32 XSdPs_ReadPolled(XSdPs *InstancePtr, u32 Arg, u32 BlkCnt, u8 *Buff);
+s32 XSdPs_WritePolled(XSdPs *InstancePtr, u32 Arg, u32 BlkCnt, const u8 *Buff);
+s32 XSdPs_SetBlkSize(XSdPs *InstancePtr, u16 BlkSize);
+s32 XSdPs_Select_Card (XSdPs *InstancePtr);
+s32 XSdPs_Change_ClkFreq(XSdPs *InstancePtr, u32 SelFreq);
+s32 XSdPs_Change_BusWidth(XSdPs *InstancePtr);
+s32 XSdPs_Change_BusSpeed(XSdPs *InstancePtr);
+s32 XSdPs_Get_BusWidth(XSdPs *InstancePtr, u8 *SCR);
+s32 XSdPs_Get_BusSpeed(XSdPs *InstancePtr, u8 *ReadBuff);
+s32 XSdPs_Pullup(XSdPs *InstancePtr);
+s32 XSdPs_MmcCardInitialize(XSdPs *InstancePtr);
+s32 XSdPs_CardInitialize(XSdPs *InstancePtr);
+s32 XSdPs_Get_Mmc_ExtCsd(XSdPs *InstancePtr, u8 *ReadBuff);
+s32 XSdPs_Set_Mmc_ExtCsd(XSdPs *InstancePtr, u32 Arg);
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+void XSdPs_Identify_UhsMode(XSdPs *InstancePtr, u8 *ReadBuff);
+void XSdPs_ddr50_tapdelay(u32 Bank, u32 DeviceId, u32 CardType);
+void XSdPs_hsd_sdr25_tapdelay(u32 Bank, u32 DeviceId, u32 CardType);
+void XSdPs_sdr104_hs200_tapdelay(u32 Bank, u32 DeviceId, u32 CardType);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SD_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xsdps_hw.h b/src/Xilinx/include/xsdps_hw.h
new file mode 100644
index 0000000..8d190ef
--- /dev/null
+++ b/src/Xilinx/include/xsdps_hw.h
@@ -0,0 +1,1301 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsdps_hw.h
+* @addtogroup sdps_v3_4
+* @{
+*
+* This header file contains the identifiers and basic HW access driver
+* functions (or  macros) that can be used to access the device. Other driver
+* functions are defined in xsdps.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ---    -------- -----------------------------------------------
+* 1.00a hk/sg  10/17/13 Initial release
+* 2.5 	sg	   07/09/15 Added SD 3.0 features
+*       kvn    07/15/15 Modified the code according to MISRAC-2012.
+* 2.7   sk     12/10/15 Added support for MMC cards.
+*       sk     03/02/16 Configured the Tap Delay values for eMMC HS200 mode.
+* 2.8   sk     04/20/16 Added new workaround for auto tuning.
+* 3.0   sk     06/09/16 Added support for mkfs to calculate sector count.
+*       sk     07/16/16 Added support for UHS modes.
+*       sk     07/16/16 Added Tap delays accordingly to different SD/eMMC
+*                       operating modes.
+* 3.1   sk     11/07/16 Enable Rst_n bit in ext_csd reg if not enabled.
+* 3.2   sk     03/20/17 Add support for EL1 non-secure mode.
+* 3.3   mn     08/22/17 Updated for Word Access System support
+*       mn     09/06/17 Added support for ARMCC toolchain
+* 3.4   mn     01/22/18 Separated out SDR104 and HS200 clock defines
+*
+* 

+*
+******************************************************************************/
+
+#ifndef SD_HW_H_
+#define SD_HW_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register Map
+ *
+ * Register offsets from the base address of an SD device.
+ * @{
+ */
+
+#define XSDPS_SDMA_SYS_ADDR_OFFSET	0x00U	/**< SDMA System Address
+							Register */
+#define XSDPS_SDMA_SYS_ADDR_LO_OFFSET	XSDPS_SDMA_SYS_ADDR_OFFSET
+						/**< SDMA System Address
+							Low Register */
+#define XSDPS_ARGMT2_LO_OFFSET		0x00U	/**< Argument2 Low Register */
+#define XSDPS_SDMA_SYS_ADDR_HI_OFFSET	0x02U	/**< SDMA System Address
+							High Register */
+#define XSDPS_ARGMT2_HI_OFFSET		0x02U	/**< Argument2 High Register */
+
+#define XSDPS_BLK_SIZE_OFFSET		0x04U	/**< Block Size Register */
+#define XSDPS_BLK_CNT_OFFSET		0x06U	/**< Block Count Register */
+#define XSDPS_ARGMT_OFFSET		0x08U	/**< Argument Register */
+#define XSDPS_ARGMT1_LO_OFFSET		XSDPS_ARGMT_OFFSET
+						/**< Argument1 Register */
+#define XSDPS_ARGMT1_HI_OFFSET		0x0AU	/**< Argument1 Register */
+
+#define XSDPS_XFER_MODE_OFFSET		0x0CU	/**< Transfer Mode Register */
+#define XSDPS_CMD_OFFSET		0x0EU	/**< Command Register */
+#define XSDPS_RESP0_OFFSET		0x10U	/**< Response0 Register */
+#define XSDPS_RESP1_OFFSET		0x14U	/**< Response1 Register */
+#define XSDPS_RESP2_OFFSET		0x18U	/**< Response2 Register */
+#define XSDPS_RESP3_OFFSET		0x1CU	/**< Response3 Register */
+#define XSDPS_BUF_DAT_PORT_OFFSET	0x20U	/**< Buffer Data Port */
+#define XSDPS_PRES_STATE_OFFSET		0x24U	/**< Present State */
+#define XSDPS_HOST_CTRL1_OFFSET		0x28U	/**< Host Control 1 */
+#define XSDPS_POWER_CTRL_OFFSET		0x29U	/**< Power Control */
+#define XSDPS_BLK_GAP_CTRL_OFFSET	0x2AU	/**< Block Gap Control */
+#define XSDPS_WAKE_UP_CTRL_OFFSET	0x2BU	/**< Wake Up Control */
+#define XSDPS_CLK_CTRL_OFFSET		0x2CU	/**< Clock Control */
+#define XSDPS_TIMEOUT_CTRL_OFFSET	0x2EU	/**< Timeout Control */
+#define XSDPS_SW_RST_OFFSET		0x2FU	/**< Software Reset */
+#define XSDPS_NORM_INTR_STS_OFFSET 	0x30U	/**< Normal Interrupt
+							Status Register */
+#define XSDPS_ERR_INTR_STS_OFFSET 	0x32U	/**< Error Interrupt
+							Status Register */
+#define XSDPS_NORM_INTR_STS_EN_OFFSET	0x34U	/**< Normal Interrupt
+						Status Enable Register */
+#define XSDPS_ERR_INTR_STS_EN_OFFSET	0x36U	/**< Error Interrupt
+						Status Enable Register */
+#define XSDPS_NORM_INTR_SIG_EN_OFFSET	0x38U	/**< Normal Interrupt
+						Signal Enable Register */
+#define XSDPS_ERR_INTR_SIG_EN_OFFSET	0x3AU	/**< Error Interrupt
+						Signal Enable Register */
+
+#define XSDPS_AUTO_CMD12_ERR_STS_OFFSET	0x3CU	/**< Auto CMD12 Error Status
+							Register */
+#define XSDPS_HOST_CTRL2_OFFSET		0x3EU	/**< Host Control2 Register */
+#define XSDPS_CAPS_OFFSET 		0x40U	/**< Capabilities Register */
+#define XSDPS_CAPS_EXT_OFFSET 		0x44U	/**< Capabilities Extended */
+#define XSDPS_MAX_CURR_CAPS_OFFSET	0x48U	/**< Maximum Current
+						Capabilities Register */
+#define XSDPS_MAX_CURR_CAPS_EXT_OFFSET	0x4CU	/**< Maximum Current
+						Capabilities Ext Register */
+#define XSDPS_FE_ERR_INT_STS_OFFSET	0x52U	/**< Force Event for
+						Error Interrupt Status */
+#define XSDPS_FE_AUTO_CMD12_EIS_OFFSET	0x50U	/**< Auto CM12 Error Interrupt
+							Status Register */
+#define XSDPS_ADMA_ERR_STS_OFFSET	0x54U	/**< ADMA Error Status
+							Register */
+#define XSDPS_ADMA_SAR_OFFSET		0x58U	/**< ADMA System Address
+							Register */
+#define XSDPS_ADMA_SAR_EXT_OFFSET	0x5CU	/**< ADMA System Address
+							Extended Register */
+#define XSDPS_PRE_VAL_1_OFFSET		0x60U	/**< Preset Value Register */
+#define XSDPS_PRE_VAL_2_OFFSET		0x64U	/**< Preset Value Register */
+#define XSDPS_PRE_VAL_3_OFFSET		0x68U	/**< Preset Value Register */
+#define XSDPS_PRE_VAL_4_OFFSET		0x6CU	/**< Preset Value Register */
+#define XSDPS_BOOT_TOUT_CTRL_OFFSET	0x70U	/**< Boot timeout control
+							register */
+
+#define XSDPS_SHARED_BUS_CTRL_OFFSET	0xE0U	/**< Shared Bus Control
+							Register */
+#define XSDPS_SLOT_INTR_STS_OFFSET	0xFCU	/**< Slot Interrupt Status
+							Register */
+#define XSDPS_HOST_CTRL_VER_OFFSET	0xFEU	/**< Host Controller Version
+							Register */
+
+/* @} */
+
+/** @name Control Register - Host control, Power control,
+ * 			Block Gap control and Wakeup control
+ *
+ * This register contains bits for various configuration options of
+ * the SD host controller. Read/Write apart from the reserved bits.
+ * @{
+ */
+
+#define XSDPS_HC_LED_MASK		0x00000001U /**< LED Control */
+#define XSDPS_HC_WIDTH_MASK		0x00000002U /**< Bus width */
+#define XSDPS_HC_BUS_WIDTH_4		0x00000002U
+#define XSDPS_HC_SPEED_MASK		0x00000004U /**< High Speed */
+#define XSDPS_HC_DMA_MASK		0x00000018U /**< DMA Mode Select */
+#define XSDPS_HC_DMA_SDMA_MASK		0x00000000U /**< SDMA Mode */
+#define XSDPS_HC_DMA_ADMA1_MASK		0x00000008U /**< ADMA1 Mode */
+#define XSDPS_HC_DMA_ADMA2_32_MASK	0x00000010U /**< ADMA2 Mode - 32 bit */
+#define XSDPS_HC_DMA_ADMA2_64_MASK	0x00000018U /**< ADMA2 Mode - 64 bit */
+#define XSDPS_HC_EXT_BUS_WIDTH		0x00000020U /**< Bus width - 8 bit */
+#define XSDPS_HC_CARD_DET_TL_MASK	0x00000040U /**< Card Detect Tst Lvl */
+#define XSDPS_HC_CARD_DET_SD_MASK	0x00000080U /**< Card Detect Sig Det */
+
+#define XSDPS_PC_BUS_PWR_MASK		0x00000001U /**< Bus Power Control */
+#define XSDPS_PC_BUS_VSEL_MASK		0x0000000EU /**< Bus Voltage Select */
+#define XSDPS_PC_BUS_VSEL_3V3_MASK	0x0000000EU /**< Bus Voltage 3.3V */
+#define XSDPS_PC_BUS_VSEL_3V0_MASK	0x0000000CU /**< Bus Voltage 3.0V */
+#define XSDPS_PC_BUS_VSEL_1V8_MASK	0x0000000AU /**< Bus Voltage 1.8V */
+#define XSDPS_PC_EMMC_HW_RST_MASK	0x00000010U /**< HW reset for eMMC */
+
+#define XSDPS_BGC_STP_REQ_MASK		0x00000001U /**< Block Gap Stop Req */
+#define XSDPS_BGC_CNT_REQ_MASK		0x00000002U /**< Block Gap Cont Req */
+#define XSDPS_BGC_RWC_MASK		0x00000004U /**< Block Gap Rd Wait */
+#define XSDPS_BGC_INTR_MASK		0x00000008U /**< Block Gap Intr */
+#define XSDPS_BGC_SPI_MODE_MASK		0x00000010U /**< Block Gap SPI Mode */
+#define XSDPS_BGC_BOOT_EN_MASK		0x00000020U /**< Block Gap Boot Enb */
+#define XSDPS_BGC_ALT_BOOT_EN_MASK	0x00000040U /**< Block Gap Alt BootEn */
+#define XSDPS_BGC_BOOT_ACK_MASK		0x00000080U /**< Block Gap Boot Ack */
+
+#define XSDPS_WC_WUP_ON_INTR_MASK	0x00000001U /**< Wakeup Card Intr */
+#define XSDPS_WC_WUP_ON_INSRT_MASK	0x00000002U /**< Wakeup Card Insert */
+#define XSDPS_WC_WUP_ON_REM_MASK	0x00000004U /**< Wakeup Card Removal */
+
+/* @} */
+
+/** @name Control Register - Clock control, Timeout control & Software reset
+ *
+ * This register contains bits for configuration options of clock, timeout and
+ * software reset.
+ * Read/Write except for Inter_Clock_Stable bit (read only) and reserved bits.
+ * @{
+ */
+
+#define XSDPS_CC_INT_CLK_EN_MASK		0x00000001U
+#define XSDPS_CC_INT_CLK_STABLE_MASK	0x00000002U
+#define XSDPS_CC_SD_CLK_EN_MASK			0x00000004U
+#define XSDPS_CC_SD_CLK_GEN_SEL_MASK		0x00000020U
+#define XSDPS_CC_SDCLK_FREQ_SEL_EXT_MASK	0x000000C0U
+#define XSDPS_CC_SDCLK_FREQ_SEL_MASK		0x0000FF00U
+#define XSDPS_CC_SDCLK_FREQ_D256_MASK		0x00008000U
+#define XSDPS_CC_SDCLK_FREQ_D128_MASK		0x00004000U
+#define XSDPS_CC_SDCLK_FREQ_D64_MASK		0x00002000U
+#define XSDPS_CC_SDCLK_FREQ_D32_MASK		0x00001000U
+#define XSDPS_CC_SDCLK_FREQ_D16_MASK		0x00000800U
+#define XSDPS_CC_SDCLK_FREQ_D8_MASK		0x00000400U
+#define XSDPS_CC_SDCLK_FREQ_D4_MASK		0x00000200U
+#define XSDPS_CC_SDCLK_FREQ_D2_MASK		0x00000100U
+#define XSDPS_CC_SDCLK_FREQ_BASE_MASK	0x00000000U
+#define XSDPS_CC_MAX_DIV_CNT			256U
+#define XSDPS_CC_EXT_MAX_DIV_CNT		2046U
+#define XSDPS_CC_EXT_DIV_SHIFT			6U
+
+#define XSDPS_TC_CNTR_VAL_MASK			0x0000000FU
+
+#define XSDPS_SWRST_ALL_MASK			0x00000001U
+#define XSDPS_SWRST_CMD_LINE_MASK		0x00000002U
+#define XSDPS_SWRST_DAT_LINE_MASK		0x00000004U
+
+#define XSDPS_CC_MAX_NUM_OF_DIV		9U
+#define XSDPS_CC_DIV_SHIFT		8U
+
+/* @} */
+
+/** @name SD Interrupt Registers
+ *
+ *  Normal and Error Interrupt Status Register 
+ * This register shows the normal and error interrupt status.
+ * Status enable register affects reads of this register.
+ * If Signal enable register is set and the corresponding status bit is set,
+ * interrupt is generated.
+ * Write to clear except
+ * Error_interrupt and Card_Interrupt bits - Read only
+ *
+ *  Normal and Error Interrupt Status Enable Register 
+ * Setting this register bits enables Interrupt status.
+ * Read/Write except Fixed_to_0 bit (Read only)
+ *
+ *  Normal and Error Interrupt Signal Enable Register 
+ * This register is used to select which interrupt status is
+ * indicated to the Host System as the interrupt.
+ * Read/Write except Fixed_to_0 bit (Read only)
+ *
+ * All three registers have same bit definitions
+ * @{
+ */
+
+#define XSDPS_INTR_CC_MASK		0x00000001U /**< Command Complete */
+#define XSDPS_INTR_TC_MASK		0x00000002U /**< Transfer Complete */
+#define XSDPS_INTR_BGE_MASK		0x00000004U /**< Block Gap Event */
+#define XSDPS_INTR_DMA_MASK		0x00000008U /**< DMA Interrupt */
+#define XSDPS_INTR_BWR_MASK		0x00000010U /**< Buffer Write Ready */
+#define XSDPS_INTR_BRR_MASK		0x00000020U /**< Buffer Read Ready */
+#define XSDPS_INTR_CARD_INSRT_MASK	0x00000040U /**< Card Insert */
+#define XSDPS_INTR_CARD_REM_MASK	0x00000080U /**< Card Remove */
+#define XSDPS_INTR_CARD_MASK		0x00000100U /**< Card Interrupt */
+#define XSDPS_INTR_INT_A_MASK		0x00000200U /**< INT A Interrupt */
+#define XSDPS_INTR_INT_B_MASK		0x00000400U /**< INT B Interrupt */
+#define XSDPS_INTR_INT_C_MASK		0x00000800U /**< INT C Interrupt */
+#define XSDPS_INTR_RE_TUNING_MASK	0x00001000U /**< Re-Tuning Interrupt */
+#define XSDPS_INTR_BOOT_ACK_RECV_MASK	0x00002000U /**< Boot Ack Recv
+							Interrupt */
+#define XSDPS_INTR_BOOT_TERM_MASK	0x00004000U /**< Boot Terminate
+							Interrupt */
+#define XSDPS_INTR_ERR_MASK		0x00008000U /**< Error Interrupt */
+#define XSDPS_NORM_INTR_ALL_MASK	0x0000FFFFU
+
+#define XSDPS_INTR_ERR_CT_MASK		0x00000001U /**< Command Timeout
+							Error */
+#define XSDPS_INTR_ERR_CCRC_MASK	0x00000002U /**< Command CRC Error */
+#define XSDPS_INTR_ERR_CEB_MASK		0x00000004U /**< Command End Bit
+							Error */
+#define XSDPS_INTR_ERR_CI_MASK		0x00000008U /**< Command Index Error */
+#define XSDPS_INTR_ERR_DT_MASK		0x00000010U /**< Data Timeout Error */
+#define XSDPS_INTR_ERR_DCRC_MASK	0x00000020U /**< Data CRC Error */
+#define XSDPS_INTR_ERR_DEB_MASK		0x00000040U /**< Data End Bit Error */
+#define XSDPS_INTR_ERR_CUR_LMT_MASK	0x00000080U /**< Current Limit Error */
+#define XSDPS_INTR_ERR_AUTO_CMD12_MASK	0x00000100U /**< Auto CMD12 Error */
+#define XSDPS_INTR_ERR_ADMA_MASK	0x00000200U /**< ADMA Error */
+#define XSDPS_INTR_ERR_TR_MASK		0x00001000U /**< Tuning Error */
+#define XSDPS_INTR_VEND_SPF_ERR_MASK	0x0000E000U /**< Vendor Specific
+							Error */
+#define XSDPS_ERROR_INTR_ALL_MASK	0x0000F3FFU /**< Mask for error bits */
+/* @} */
+
+/** @name Block Size and Block Count Register
+ *
+ * This register contains the block count for current transfer,
+ * block size and SDMA buffer size.
+ * Read/Write except for reserved bits.
+ * @{
+ */
+
+#define XSDPS_BLK_SIZE_MASK		0x00000FFFU /**< Transfer Block Size */
+#define XSDPS_SDMA_BUFF_SIZE_MASK	0x00007000U /**< Host SDMA Buffer Size */
+#define XSDPS_BLK_SIZE_1024		0x400U
+#define XSDPS_BLK_SIZE_2048		0x800U
+#define XSDPS_BLK_CNT_MASK		0x0000FFFFU /**< Block Count for
+								Current Transfer */
+
+/* @} */
+
+/** @name Transfer Mode and Command Register
+ *
+ * The Transfer Mode register is used to control the data transfers and
+ * Command register is used for command generation
+ * Read/Write except for reserved bits.
+ * @{
+ */
+
+#define XSDPS_TM_DMA_EN_MASK		0x00000001U /**< DMA Enable */
+#define XSDPS_TM_BLK_CNT_EN_MASK	0x00000002U /**< Block Count Enable */
+#define XSDPS_TM_AUTO_CMD12_EN_MASK	0x00000004U /**< Auto CMD12 Enable */
+#define XSDPS_TM_DAT_DIR_SEL_MASK	0x00000010U /**< Data Transfer
+							Direction Select */
+#define XSDPS_TM_MUL_SIN_BLK_SEL_MASK	0x00000020U /**< Multi/Single
+							Block Select */
+
+#define XSDPS_CMD_RESP_SEL_MASK		0x00000003U /**< Response Type
+							Select */
+#define XSDPS_CMD_RESP_NONE_MASK	0x00000000U /**< No Response */
+#define XSDPS_CMD_RESP_L136_MASK	0x00000001U /**< Response length 138 */
+#define XSDPS_CMD_RESP_L48_MASK		0x00000002U /**< Response length 48 */
+#define XSDPS_CMD_RESP_L48_BSY_CHK_MASK	0x00000003U /**< Response length 48 &
+							check busy after
+							response */
+#define XSDPS_CMD_CRC_CHK_EN_MASK	0x00000008U /**< Command CRC Check
+							Enable */
+#define XSDPS_CMD_INX_CHK_EN_MASK	0x00000010U /**< Command Index Check
+							Enable */
+#define XSDPS_DAT_PRESENT_SEL_MASK	0x00000020U /**< Data Present Select */
+#define XSDPS_CMD_TYPE_MASK		0x000000C0U /**< Command Type */
+#define XSDPS_CMD_TYPE_NORM_MASK	0x00000000U /**< CMD Type - Normal */
+#define XSDPS_CMD_TYPE_SUSPEND_MASK	0x00000040U /**< CMD Type - Suspend */
+#define XSDPS_CMD_TYPE_RESUME_MASK	0x00000080U /**< CMD Type - Resume */
+#define XSDPS_CMD_TYPE_ABORT_MASK	0x000000C0U /**< CMD Type - Abort */
+#define XSDPS_CMD_MASK			0x00003F00U /**< Command Index Mask -
+							Set to CMD0-63,
+							AMCD0-63 */
+
+/* @} */
+
+/** @name Auto CMD Error Status Register
+ *
+ * This register is read only register which contains
+ * information about the error status of Auto CMD 12 and 23.
+ * Read Only
+ * @{
+ */
+#define XSDPS_AUTO_CMD12_NT_EX_MASK	0x0001U /**< Auto CMD12 Not
+							executed */
+#define XSDPS_AUTO_CMD_TOUT_MASK	0x0002U /**< Auto CMD Timeout
+							Error */
+#define XSDPS_AUTO_CMD_CRC_MASK		0x0004U /**< Auto CMD CRC Error */
+#define XSDPS_AUTO_CMD_EB_MASK		0x0008U /**< Auto CMD End Bit
+							Error */
+#define XSDPS_AUTO_CMD_IND_MASK		0x0010U /**< Auto CMD Index Error */
+#define XSDPS_AUTO_CMD_CNI_ERR_MASK	0x0080U /**< Command not issued by
+							Auto CMD12 Error */
+/* @} */
+
+/** @name Host Control2 Register
+ *
+ * This register contains extended configuration bits.
+ * Read Write
+ * @{
+ */
+#define XSDPS_HC2_UHS_MODE_MASK		0x0007U /**< UHS Mode select bits */
+#define XSDPS_HC2_UHS_MODE_SDR12_MASK	0x0000U /**< SDR12 UHS Mode */
+#define XSDPS_HC2_UHS_MODE_SDR25_MASK	0x0001U /**< SDR25 UHS Mode */
+#define XSDPS_HC2_UHS_MODE_SDR50_MASK	0x0002U /**< SDR50 UHS Mode */
+#define XSDPS_HC2_UHS_MODE_SDR104_MASK	0x0003U /**< SDR104 UHS Mode */
+#define XSDPS_HC2_UHS_MODE_DDR50_MASK	0x0004U /**< DDR50 UHS Mode */
+#define XSDPS_HC2_1V8_EN_MASK		0x0008U /**< 1.8V Signal Enable */
+#define XSDPS_HC2_DRV_STR_SEL_MASK	0x0030U /**< Driver Strength
+							Selection */
+#define XSDPS_HC2_DRV_STR_B_MASK	0x0000U /**< Driver Strength B */
+#define XSDPS_HC2_DRV_STR_A_MASK	0x0010U /**< Driver Strength A */
+#define XSDPS_HC2_DRV_STR_C_MASK	0x0020U /**< Driver Strength C */
+#define XSDPS_HC2_DRV_STR_D_MASK	0x0030U /**< Driver Strength D */
+#define XSDPS_HC2_EXEC_TNG_MASK		0x0040U /**< Execute Tuning */
+#define XSDPS_HC2_SAMP_CLK_SEL_MASK	0x0080U /**< Sampling Clock
+							Selection */
+#define XSDPS_HC2_ASYNC_INTR_EN_MASK	0x4000U /**< Asynchronous Interrupt
+							Enable */
+#define XSDPS_HC2_PRE_VAL_EN_MASK	0x8000U /**< Preset Value Enable */
+
+/* @} */
+
+/** @name Capabilities Register
+ *
+ * Capabilities register is a read only register which contains
+ * information about the host controller.
+ * Sufficient if read once after power on.
+ * Read Only
+ * @{
+ */
+#define XSDPS_CAP_TOUT_CLK_FREQ_MASK	0x0000003FU /**< Timeout clock freq
+							select */
+#define XSDPS_CAP_TOUT_CLK_UNIT_MASK	0x00000080U /**< Timeout clock unit -
+							MHz/KHz */
+#define XSDPS_CAP_MAX_BLK_LEN_MASK	0x00030000U /**< Max block length */
+#define XSDPS_CAP_MAX_BLK_LEN_512B_MASK	0x00000000U /**< Max block 512 bytes */
+#define XSDPS_CAP_MAX_BL_LN_1024_MASK	0x00010000U /**< Max block 1024 bytes */
+#define XSDPS_CAP_MAX_BL_LN_2048_MASK	0x00020000U /**< Max block 2048 bytes */
+#define XSDPS_CAP_MAX_BL_LN_4096_MASK	0x00030000U /**< Max block 4096 bytes */
+
+#define XSDPS_CAP_EXT_MEDIA_BUS_MASK	0x00040000U /**< Extended media bus */
+#define XSDPS_CAP_ADMA2_MASK		0x00080000U /**< ADMA2 support */
+#define XSDPS_CAP_HIGH_SPEED_MASK	0x00200000U /**< High speed support */
+#define XSDPS_CAP_SDMA_MASK		0x00400000U /**< SDMA support */
+#define XSDPS_CAP_SUSP_RESUME_MASK	0x00800000U /**< Suspend/Resume
+							support */
+#define XSDPS_CAP_VOLT_3V3_MASK		0x01000000U /**< 3.3V support */
+#define XSDPS_CAP_VOLT_3V0_MASK		0x02000000U /**< 3.0V support */
+#define XSDPS_CAP_VOLT_1V8_MASK		0x04000000U /**< 1.8V support */
+
+#define XSDPS_CAP_SYS_BUS_64_MASK	0x10000000U /**< 64 bit system bus
+							support */
+/* Spec 2.0 */
+#define XSDPS_CAP_INTR_MODE_MASK	0x08000000U /**< Interrupt mode
+							support */
+#define XSDPS_CAP_SPI_MODE_MASK		0x20000000U /**< SPI mode */
+#define XSDPS_CAP_SPI_BLOCK_MODE_MASK	0x40000000U /**< SPI block mode */
+
+
+/* Spec 3.0 */
+#define XSDPS_CAPS_ASYNC_INTR_MASK	0x20000000U /**< Async Interrupt
+							support */
+#define XSDPS_CAPS_SLOT_TYPE_MASK	0xC0000000U /**< Slot Type */
+#define XSDPS_CAPS_REM_CARD			0x00000000U /**< Removable Slot */
+#define XSDPS_CAPS_EMB_SLOT			0x40000000U /**< Embedded Slot */
+#define XSDPS_CAPS_SHR_BUS			0x80000000U /**< Shared Bus Slot */
+
+#define XSDPS_ECAPS_SDR50_MASK		0x00000001U /**< SDR50 Mode support */
+#define XSDPS_ECAPS_SDR104_MASK		0x00000002U /**< SDR104 Mode support */
+#define XSDPS_ECAPS_DDR50_MASK		0x00000004U /**< DDR50 Mode support */
+#define XSDPS_ECAPS_DRV_TYPE_A_MASK	0x00000010U /**< DriverType A support */
+#define XSDPS_ECAPS_DRV_TYPE_C_MASK	0x00000020U /**< DriverType C support */
+#define XSDPS_ECAPS_DRV_TYPE_D_MASK	0x00000040U /**< DriverType D support */
+#define XSDPS_ECAPS_TMR_CNT_MASK	0x00000F00U /**< Timer Count for
+							Re-tuning */
+#define XSDPS_ECAPS_USE_TNG_SDR50_MASK	0x00002000U /**< SDR50 Mode needs
+							tuning */
+#define XSDPS_ECAPS_RE_TNG_MODES_MASK	0x0000C000U /**< Re-tuning modes
+							support */
+#define XSDPS_ECAPS_RE_TNG_MODE1_MASK	0x00000000U /**< Re-tuning mode 1 */
+#define XSDPS_ECAPS_RE_TNG_MODE2_MASK	0x00004000U /**< Re-tuning mode 2 */
+#define XSDPS_ECAPS_RE_TNG_MODE3_MASK	0x00008000U /**< Re-tuning mode 3 */
+#define XSDPS_ECAPS_CLK_MULT_MASK	0x00FF0000U /**< Clock Multiplier value
+							for Programmable clock
+							mode */
+#define XSDPS_ECAPS_SPI_MODE_MASK	0x01000000U /**< SPI mode */
+#define XSDPS_ECAPS_SPI_BLK_MODE_MASK	0x02000000U /**< SPI block mode */
+
+/* @} */
+
+/** @name Present State Register
+ *
+ * Gives the current status of the host controller
+ * Read Only
+ * @{
+ */
+
+#define XSDPS_PSR_INHIBIT_CMD_MASK	0x00000001U /**< Command inhibit - CMD */
+#define XSDPS_PSR_INHIBIT_DAT_MASK	0x00000002U /**< Command Inhibit - DAT */
+#define XSDPS_PSR_DAT_ACTIVE_MASK	0x00000004U /**< DAT line active */
+#define XSDPS_PSR_RE_TUNING_REQ_MASK	0x00000008U /**< Re-tuning request */
+#define XSDPS_PSR_WR_ACTIVE_MASK	0x00000100U /**< Write transfer active */
+#define XSDPS_PSR_RD_ACTIVE_MASK	0x00000200U /**< Read transfer active */
+#define XSDPS_PSR_BUFF_WR_EN_MASK	0x00000400U /**< Buffer write enable */
+#define XSDPS_PSR_BUFF_RD_EN_MASK	0x00000800U /**< Buffer read enable */
+#define XSDPS_PSR_CARD_INSRT_MASK	0x00010000U /**< Card inserted */
+#define XSDPS_PSR_CARD_STABLE_MASK	0x00020000U /**< Card state stable */
+#define XSDPS_PSR_CARD_DPL_MASK		0x00040000U /**< Card detect pin level */
+#define XSDPS_PSR_WPS_PL_MASK		0x00080000U /**< Write protect switch
+								pin level */
+#define XSDPS_PSR_DAT30_SG_LVL_MASK	0x00F00000U /**< Data 3:0 signal lvl */
+#define XSDPS_PSR_CMD_SG_LVL_MASK	0x01000000U /**< Cmd Line signal lvl */
+#define XSDPS_PSR_DAT74_SG_LVL_MASK	0x1E000000U /**< Data 7:4 signal lvl */
+
+/* @} */
+
+/** @name Maximum Current Capablities Register
+ *
+ * This register is read only register which contains
+ * information about current capabilities at each voltage levels.
+ * Read Only
+ * @{
+ */
+#define XSDPS_MAX_CUR_CAPS_1V8_MASK	0x00000F00U /**< Maximum Current
+							Capability at 1.8V */
+#define XSDPS_MAX_CUR_CAPS_3V0_MASK	0x000000F0U /**< Maximum Current
+							Capability at 3.0V */
+#define XSDPS_MAX_CUR_CAPS_3V3_MASK	0x0000000FU /**< Maximum Current
+							Capability at 3.3V */
+/* @} */
+
+
+/** @name Force Event for Auto CMD Error Status Register
+ *
+ * This register is write only register which contains
+ * control bits to generate events for Auto CMD error status.
+ * Write Only
+ * @{
+ */
+#define XSDPS_FE_AUTO_CMD12_NT_EX_MASK	0x0001U /**< Auto CMD12 Not
+							executed */
+#define XSDPS_FE_AUTO_CMD_TOUT_MASK	0x0002U /**< Auto CMD Timeout
+							Error */
+#define XSDPS_FE_AUTO_CMD_CRC_MASK	0x0004U /**< Auto CMD CRC Error */
+#define XSDPS_FE_AUTO_CMD_EB_MASK	0x0008U /**< Auto CMD End Bit
+							Error */
+#define XSDPS_FE_AUTO_CMD_IND_MASK	0x0010U /**< Auto CMD Index Error */
+#define XSDPS_FE_AUTO_CMD_CNI_ERR_MASK	0x0080U /**< Command not issued by
+							Auto CMD12 Error */
+/* @} */
+
+
+
+/** @name Force Event for Error Interrupt Status Register
+ *
+ * This register is write only register which contains
+ * control bits to generate events of error interrupt status register.
+ * Write Only
+ * @{
+ */
+#define XSDPS_FE_INTR_ERR_CT_MASK	0x0001U /**< Command Timeout
+							Error */
+#define XSDPS_FE_INTR_ERR_CCRC_MASK	0x0002U /**< Command CRC Error */
+#define XSDPS_FE_INTR_ERR_CEB_MASK	0x0004U /**< Command End Bit
+							Error */
+#define XSDPS_FE_INTR_ERR_CI_MASK	0x0008U /**< Command Index Error */
+#define XSDPS_FE_INTR_ERR_DT_MASK	0x0010U /**< Data Timeout Error */
+#define XSDPS_FE_INTR_ERR_DCRC_MASK	0x0020U /**< Data CRC Error */
+#define XSDPS_FE_INTR_ERR_DEB_MASK	0x0040U /**< Data End Bit Error */
+#define XSDPS_FE_INTR_ERR_CUR_LMT_MASK	0x0080U /**< Current Limit Error */
+#define XSDPS_FE_INTR_ERR_AUTO_CMD_MASK	0x0100U /**< Auto CMD Error */
+#define XSDPS_FE_INTR_ERR_ADMA_MASK	0x0200U /**< ADMA Error */
+#define XSDPS_FE_INTR_ERR_TR_MASK	0x1000U /**< Target Reponse */
+#define XSDPS_FE_INTR_VEND_SPF_ERR_MASK	0xE000U /**< Vendor Specific
+							Error */
+
+/* @} */
+
+/** @name ADMA Error Status Register
+ *
+ * This register is read only register which contains
+ * status information about ADMA errors.
+ * Read Only
+ * @{
+ */
+#define XSDPS_ADMA_ERR_MM_LEN_MASK	0x04U /**< ADMA Length Mismatch
+							Error */
+#define XSDPS_ADMA_ERR_STATE_MASK	0x03U /**< ADMA Error State */
+#define XSDPS_ADMA_ERR_STATE_STOP_MASK	0x00U /**< ADMA Error State
+							STOP */
+#define XSDPS_ADMA_ERR_STATE_FDS_MASK	0x01U /**< ADMA Error State
+							FDS */
+#define XSDPS_ADMA_ERR_STATE_TFR_MASK	0x03U /**< ADMA Error State
+							TFR */
+/* @} */
+
+/** @name Preset Values Register
+ *
+ * This register is read only register which contains
+ * preset values for each of speed modes.
+ * Read Only
+ * @{
+ */
+#define XSDPS_PRE_VAL_SDCLK_FSEL_MASK	0x03FFU /**< SDCLK Frequency
+							Select Value */
+#define XSDPS_PRE_VAL_CLK_GEN_SEL_MASK	0x0400U /**< Clock Generator
+							Mode Select */
+#define XSDPS_PRE_VAL_DRV_STR_SEL_MASK	0xC000U /**< Driver Strength
+							Select Value */
+
+/* @} */
+
+/** @name Slot Interrupt Status Register
+ *
+ * This register is read only register which contains
+ * interrupt slot signal for each slot.
+ * Read Only
+ * @{
+ */
+#define XSDPS_SLOT_INTR_STS_INT_MASK	0x0007U /**< Interrupt Signal
+							mask */
+
+/* @} */
+
+/** @name Host Controller Version Register
+ *
+ * This register is read only register which contains
+ * Host Controller and Vendor Specific version.
+ * Read Only
+ * @{
+ */
+#define XSDPS_HC_VENDOR_VER		0xFF00U /**< Vendor
+							Specification
+							version mask */
+#define XSDPS_HC_SPEC_VER_MASK		0x00FFU /**< Host
+							Specification
+							version mask */
+#define XSDPS_HC_SPEC_V3		0x0002U
+#define XSDPS_HC_SPEC_V2		0x0001U
+#define XSDPS_HC_SPEC_V1		0x0000U
+
+/** @name Block size mask for 512 bytes
+ *
+ * Block size mask for 512 bytes - This is the default block size.
+ * @{
+ */
+
+#define XSDPS_BLK_SIZE_512_MASK	0x200U
+
+/* @} */
+
+/** @name Commands
+ *
+ * Constant definitions for commands and response related to SD
+ * @{
+ */
+
+#define XSDPS_APP_CMD_PREFIX	 0x8000U
+#define CMD0	 0x0000U
+#define CMD1	 0x0100U
+#define CMD2	 0x0200U
+#define CMD3	 0x0300U
+#define CMD4	 0x0400U
+#define CMD5	 0x0500U
+#define CMD6	 0x0600U
+#define ACMD6	(XSDPS_APP_CMD_PREFIX + 0x0600U)
+#define CMD7	 0x0700U
+#define CMD8	 0x0800U
+#define CMD9	 0x0900U
+#define CMD10	 0x0A00U
+#define CMD11	 0x0B00U
+#define CMD12	 0x0C00U
+#define ACMD13	 (XSDPS_APP_CMD_PREFIX + 0x0D00U)
+#define CMD16	 0x1000U
+#define CMD17	 0x1100U
+#define CMD18	 0x1200U
+#define CMD19	 0x1300U
+#define CMD21	 0x1500U
+#define CMD23	 0x1700U
+#define ACMD23	 (XSDPS_APP_CMD_PREFIX + 0x1700U)
+#define CMD24	 0x1800U
+#define CMD25	 0x1900U
+#define CMD41	 0x2900U
+#define ACMD41	 (XSDPS_APP_CMD_PREFIX + 0x2900U)
+#define ACMD42	 (XSDPS_APP_CMD_PREFIX + 0x2A00U)
+#define ACMD51	 (XSDPS_APP_CMD_PREFIX + 0x3300U)
+#define CMD52	 0x3400U
+#define CMD55	 0x3700U
+#define CMD58	 0x3A00U
+
+#define RESP_NONE	(u32)XSDPS_CMD_RESP_NONE_MASK
+#define RESP_R1		(u32)XSDPS_CMD_RESP_L48_MASK | (u32)XSDPS_CMD_CRC_CHK_EN_MASK | \
+			(u32)XSDPS_CMD_INX_CHK_EN_MASK
+
+#define RESP_R1B	(u32)XSDPS_CMD_RESP_L48_BSY_CHK_MASK | \
+			(u32)XSDPS_CMD_CRC_CHK_EN_MASK | (u32)XSDPS_CMD_INX_CHK_EN_MASK
+
+#define RESP_R2		(u32)XSDPS_CMD_RESP_L136_MASK | (u32)XSDPS_CMD_CRC_CHK_EN_MASK
+#define RESP_R3		(u32)XSDPS_CMD_RESP_L48_MASK
+
+#define RESP_R6		(u32)XSDPS_CMD_RESP_L48_BSY_CHK_MASK | \
+			(u32)XSDPS_CMD_CRC_CHK_EN_MASK | (u32)XSDPS_CMD_INX_CHK_EN_MASK
+
+/* @} */
+
+/* Card Interface Conditions Definitions */
+#define XSDPS_CIC_CHK_PATTERN	0xAAU
+#define XSDPS_CIC_VOLT_MASK	(0xFU<<8)
+#define XSDPS_CIC_VOLT_2V7_3V6	(1U<<8)
+#define XSDPS_CIC_VOLT_LOW	(1U<<9)
+
+/* Operation Conditions Register Definitions */
+#define XSDPS_OCR_PWRUP_STS	(1U<<31)
+#define XSDPS_OCR_CC_STS	(1U<<30)
+#define XSDPS_OCR_S18		(1U<<24)
+#define XSDPS_OCR_3V5_3V6	(1U<<23)
+#define XSDPS_OCR_3V4_3V5	(1U<<22)
+#define XSDPS_OCR_3V3_3V4	(1U<<21)
+#define XSDPS_OCR_3V2_3V3	(1U<<20)
+#define XSDPS_OCR_3V1_3V2	(1U<<19)
+#define XSDPS_OCR_3V0_3V1	(1U<<18)
+#define XSDPS_OCR_2V9_3V0	(1U<<17)
+#define XSDPS_OCR_2V8_2V9	(1U<<16)
+#define XSDPS_OCR_2V7_2V8	(1U<<15)
+#define XSDPS_OCR_1V7_1V95	(1U<<7)
+#define XSDPS_OCR_HIGH_VOL	0x00FF8000U
+#define XSDPS_OCR_LOW_VOL	0x00000080U
+
+/* SD Card Configuration Register Definitions */
+#define XSDPS_SCR_REG_LEN		8U
+#define XSDPS_SCR_STRUCT_MASK		(0xFU<<28)
+#define XSDPS_SCR_SPEC_MASK		(0xFU<<24)
+#define XSDPS_SCR_SPEC_1V0		0U
+#define XSDPS_SCR_SPEC_1V1		(1U<<24)
+#define XSDPS_SCR_SPEC_2V0_3V0		(2U<<24)
+#define XSDPS_SCR_MEM_VAL_AF_ERASE	(1U<<23)
+#define XSDPS_SCR_SEC_SUPP_MASK		(7U<<20)
+#define XSDPS_SCR_SEC_SUPP_NONE		0U
+#define XSDPS_SCR_SEC_SUPP_1V1		(2U<<20)
+#define XSDPS_SCR_SEC_SUPP_2V0		(3U<<20)
+#define XSDPS_SCR_SEC_SUPP_3V0		(4U<<20)
+#define XSDPS_SCR_BUS_WIDTH_MASK	(0xFU<<16)
+#define XSDPS_SCR_BUS_WIDTH_1		(1U<<16)
+#define XSDPS_SCR_BUS_WIDTH_4		(4U<<16)
+#define XSDPS_SCR_SPEC3_MASK		(1U<<12)
+#define XSDPS_SCR_SPEC3_2V0		0U
+#define XSDPS_SCR_SPEC3_3V0		(1U<<12)
+#define XSDPS_SCR_CMD_SUPP_MASK		0x3U
+#define XSDPS_SCR_CMD23_SUPP		(1U<<1)
+#define XSDPS_SCR_CMD20_SUPP		(1U<<0)
+
+/* Card Status Register Definitions */
+#define XSDPS_CD_STS_OUT_OF_RANGE	(1U<<31)
+#define XSDPS_CD_STS_ADDR_ERR		(1U<<30)
+#define XSDPS_CD_STS_BLK_LEN_ERR	(1U<<29)
+#define XSDPS_CD_STS_ER_SEQ_ERR		(1U<<28)
+#define XSDPS_CD_STS_ER_PRM_ERR		(1U<<27)
+#define XSDPS_CD_STS_WP_VIO		(1U<<26)
+#define XSDPS_CD_STS_IS_LOCKED		(1U<<25)
+#define XSDPS_CD_STS_LOCK_UNLOCK_FAIL	(1U<<24)
+#define XSDPS_CD_STS_CMD_CRC_ERR	(1U<<23)
+#define XSDPS_CD_STS_ILGL_CMD		(1U<<22)
+#define XSDPS_CD_STS_CARD_ECC_FAIL	(1U<<21)
+#define XSDPS_CD_STS_CC_ERR		(1U<<20)
+#define XSDPS_CD_STS_ERR		(1U<<19)
+#define XSDPS_CD_STS_CSD_OVRWR		(1U<<16)
+#define XSDPS_CD_STS_WP_ER_SKIP		(1U<<15)
+#define XSDPS_CD_STS_CARD_ECC_DIS	(1U<<14)
+#define XSDPS_CD_STS_ER_RST		(1U<<13)
+#define XSDPS_CD_STS_CUR_STATE		(0xFU<<9)
+#define XSDPS_CD_STS_RDY_FOR_DATA	(1U<<8)
+#define XSDPS_CD_STS_APP_CMD		(1U<<5)
+#define XSDPS_CD_STS_AKE_SEQ_ERR	(1U<<2)
+
+/* Switch Function Definitions CMD6 */
+#define XSDPS_SWITCH_SD_RESP_LEN	64U
+
+#define XSDPS_SWITCH_FUNC_SWITCH	(1U<<31)
+#define XSDPS_SWITCH_FUNC_CHECK		0U
+
+#define XSDPS_MODE_FUNC_GRP1		1U
+#define XSDPS_MODE_FUNC_GRP2		2U
+#define XSDPS_MODE_FUNC_GRP3		3U
+#define XSDPS_MODE_FUNC_GRP4		4U
+#define XSDPS_MODE_FUNC_GRP5		5U
+#define XSDPS_MODE_FUNC_GRP6		6U
+
+#define XSDPS_FUNC_GRP_DEF_VAL		0xFU
+#define XSDPS_FUNC_ALL_GRP_DEF_VAL	0xFFFFFFU
+
+#define XSDPS_ACC_MODE_DEF_SDR12	0U
+#define XSDPS_ACC_MODE_HS_SDR25		1U
+#define XSDPS_ACC_MODE_SDR50		2U
+#define XSDPS_ACC_MODE_SDR104		3U
+#define XSDPS_ACC_MODE_DDR50		4U
+
+#define XSDPS_CMD_SYS_ARG_SHIFT		4U
+#define XSDPS_CMD_SYS_DEF		0U
+#define XSDPS_CMD_SYS_eC		1U
+#define XSDPS_CMD_SYS_OTP		3U
+#define XSDPS_CMD_SYS_ASSD		4U
+#define XSDPS_CMD_SYS_VEND		5U
+
+#define XSDPS_DRV_TYPE_ARG_SHIFT	8U
+#define XSDPS_DRV_TYPE_B		0U
+#define XSDPS_DRV_TYPE_A		1U
+#define XSDPS_DRV_TYPE_C		2U
+#define XSDPS_DRV_TYPE_D		3U
+
+#define XSDPS_CUR_LIM_ARG_SHIFT		12U
+#define XSDPS_CUR_LIM_200		0U
+#define XSDPS_CUR_LIM_400		1U
+#define XSDPS_CUR_LIM_600		2U
+#define XSDPS_CUR_LIM_800		3U
+
+#define CSD_SPEC_VER_MASK		0x3C0000U
+#define READ_BLK_LEN_MASK		0x00000F00U
+#define C_SIZE_MULT_MASK		0x00000380U
+#define C_SIZE_LOWER_MASK		0xFFC00000U
+#define C_SIZE_UPPER_MASK		0x00000003U
+#define CSD_STRUCT_MASK			0x00C00000U
+#define CSD_V2_C_SIZE_MASK		0x3FFFFF00U
+
+/* EXT_CSD field definitions */
+#define XSDPS_EXT_CSD_SIZE		512U
+
+#define EXT_CSD_WR_REL_PARAM_EN		(1U<<2)
+
+#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS    (0x40U)
+#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS   (0x10U)
+#define EXT_CSD_BOOT_WP_B_PERM_WP_EN    (0x04U)
+#define EXT_CSD_BOOT_WP_B_PWR_WP_EN     (0x01U)
+
+#define EXT_CSD_PART_CONFIG_ACC_MASK    (0x7U)
+#define EXT_CSD_PART_CONFIG_ACC_BOOT0   (0x1U)
+#define EXT_CSD_PART_CONFIG_ACC_RPMB    (0x3U)
+#define EXT_CSD_PART_CONFIG_ACC_GP0     (0x4U)
+
+#define EXT_CSD_PART_SUPPORT_PART_EN    (0x1U)
+
+#define EXT_CSD_CMD_SET_NORMAL          (1U<<0)
+#define EXT_CSD_CMD_SET_SECURE          (1U<<1)
+#define EXT_CSD_CMD_SET_CPSECURE        (1U<<2)
+
+#define EXT_CSD_CARD_TYPE_26    	(1U<<0)  /* Card can run at 26MHz */
+#define EXT_CSD_CARD_TYPE_52    	(1U<<1)  /* Card can run at 52MHz */
+#define EXT_CSD_CARD_TYPE_MASK  	0x3FU    /* Mask out reserved bits */
+#define EXT_CSD_CARD_TYPE_DDR_1_8V	(1U<<2)   /* Card can run at 52MHz */
+                                             /* DDR mode @1.8V or 3V I/O */
+#define EXT_CSD_CARD_TYPE_DDR_1_2V	(1U<<3)   /* Card can run at 52MHz */
+                                             /* DDR mode @1.2V I/O */
+#define EXT_CSD_CARD_TYPE_DDR_52	(EXT_CSD_CARD_TYPE_DDR_1_8V  \
+                                        | EXT_CSD_CARD_TYPE_DDR_1_2V)
+#define EXT_CSD_CARD_TYPE_SDR_1_8V      (1U<<4)  /* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_SDR_1_2V      (1U<<5)  /* Card can run at 200MHz */
+                                                /* SDR mode @1.2V I/O */
+#define EXT_CSD_BUS_WIDTH_BYTE			183U
+#define EXT_CSD_BUS_WIDTH_1_BIT			0U	/* Card is in 1 bit mode */
+#define EXT_CSD_BUS_WIDTH_4_BIT			1U	/* Card is in 4 bit mode */
+#define EXT_CSD_BUS_WIDTH_8_BIT			2U	/* Card is in 8 bit mode */
+#define EXT_CSD_BUS_WIDTH_DDR_4_BIT		5U	/* Card is in 4 bit DDR mode */
+#define EXT_CSD_BUS_WIDTH_DDR_8_BIT		6U	/* Card is in 8 bit DDR mode */
+
+#define EXT_CSD_HS_TIMING_BYTE		185U
+#define EXT_CSD_HS_TIMING_DEF		0U
+#define EXT_CSD_HS_TIMING_HIGH		1U	/* Card is in high speed mode */
+#define EXT_CSD_HS_TIMING_HS200		2U	/* Card is in HS200 mode */
+
+#define EXT_CSD_RST_N_FUN_BYTE		162U
+#define EXT_CSD_RST_N_FUN_TEMP_DIS	0U	/* RST_n signal is temporarily disabled */
+#define EXT_CSD_RST_N_FUN_PERM_EN	1U	/* RST_n signal is permanently enabled */
+#define EXT_CSD_RST_N_FUN_PERM_DIS	2U	/* RST_n signal is permanently disabled */
+
+#define XSDPS_EXT_CSD_CMD_SET		0U
+#define XSDPS_EXT_CSD_SET_BITS		1U
+#define XSDPS_EXT_CSD_CLR_BITS		2U
+#define XSDPS_EXT_CSD_WRITE_BYTE	3U
+
+#define XSDPS_MMC_DEF_SPEED_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					| ((u32)EXT_CSD_HS_TIMING_BYTE << 16) \
+					| ((u32)EXT_CSD_HS_TIMING_DEF << 8))
+
+#define XSDPS_MMC_HIGH_SPEED_ARG	(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_HS_TIMING_BYTE << 16) \
+					 | ((u32)EXT_CSD_HS_TIMING_HIGH << 8))
+
+#define XSDPS_MMC_HS200_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_HS_TIMING_BYTE << 16) \
+					 | ((u32)EXT_CSD_HS_TIMING_HS200 << 8))
+
+#define XSDPS_MMC_1_BIT_BUS_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_BYTE << 16) \
+					 | ((u32)EXT_CSD_BUS_WITH_1_BIT << 8))
+
+#define XSDPS_MMC_4_BIT_BUS_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_BYTE << 16) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_4_BIT << 8))
+
+#define XSDPS_MMC_8_BIT_BUS_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_BYTE << 16) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_8_BIT << 8))
+
+#define XSDPS_MMC_DDR_4_BIT_BUS_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_BYTE << 16) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_DDR_4_BIT << 8))
+
+#define XSDPS_MMC_DDR_8_BIT_BUS_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_BYTE << 16) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_DDR_8_BIT << 8))
+
+#define XSDPS_MMC_RST_FUN_EN_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_RST_N_FUN_BYTE << 16) \
+					 | ((u32)EXT_CSD_RST_N_FUN_PERM_EN << 8))
+
+#define XSDPS_MMC_DELAY_FOR_SWITCH	1000U
+
+/* @} */
+
+/* @400KHz, in usec */
+#define XSDPS_74CLK_DELAY	2960U
+#define XSDPS_100CLK_DELAY	4000U
+#define XSDPS_INIT_DELAY	10000U
+
+#define XSDPS_DEF_VOLT_LVL	XSDPS_PC_BUS_VSEL_3V0_MASK
+#define XSDPS_CARD_DEF_ADDR	0x1234U
+
+#define XSDPS_CARD_SD		1U
+#define XSDPS_CARD_MMC		2U
+#define XSDPS_CARD_SDIO		3U
+#define XSDPS_CARD_SDCOMBO	4U
+#define XSDPS_CHIP_EMMC		5U
+
+
+/** @name ADMA2 Descriptor related definitions
+ *
+ * ADMA2 Descriptor related definitions
+ * @{
+ */
+
+#define XSDPS_DESC_MAX_LENGTH 65536U
+
+#define XSDPS_DESC_VALID     	(0x1U << 0)
+#define XSDPS_DESC_END       	(0x1U << 1)
+#define XSDPS_DESC_INT       	(0x1U << 2)
+#define XSDPS_DESC_TRAN  	(0x2U << 4)
+
+/* @} */
+
+/* For changing clock frequencies */
+#define XSDPS_CLK_400_KHZ		400000U		/**< 400 KHZ */
+#define XSDPS_CLK_50_MHZ		50000000U	/**< 50 MHZ */
+#define XSDPS_CLK_52_MHZ		52000000U	/**< 52 MHZ */
+#define XSDPS_SD_VER_1_0		0x1U		/**< SD ver 1 */
+#define XSDPS_SD_VER_2_0		0x2U		/**< SD ver 2 */
+#define XSDPS_SCR_BLKCNT	1U
+#define XSDPS_SCR_BLKSIZE	8U
+#define XSDPS_1_BIT_WIDTH	0x1U
+#define XSDPS_4_BIT_WIDTH	0x2U
+#define XSDPS_8_BIT_WIDTH	0x3U
+#define XSDPS_UHS_SPEED_MODE_SDR12	0x0U
+#define XSDPS_UHS_SPEED_MODE_SDR25	0x1U
+#define XSDPS_UHS_SPEED_MODE_SDR50	0x2U
+#define XSDPS_UHS_SPEED_MODE_SDR104	0x3U
+#define XSDPS_UHS_SPEED_MODE_DDR50	0x4U
+#define XSDPS_HIGH_SPEED_MODE		0x5U
+#define XSDPS_DEFAULT_SPEED_MODE	0x6U
+#define XSDPS_HS200_MODE			0x7U
+#define XSDPS_DDR52_MODE			0x4U
+#define XSDPS_SWITCH_CMD_BLKCNT		1U
+#define XSDPS_SWITCH_CMD_BLKSIZE	64U
+#define XSDPS_SWITCH_CMD_HS_GET		0x00FFFFF0U
+#define XSDPS_SWITCH_CMD_HS_SET		0x80FFFFF1U
+#define XSDPS_SWITCH_CMD_SDR12_SET		0x80FFFFF0U
+#define XSDPS_SWITCH_CMD_SDR25_SET		0x80FFFFF1U
+#define XSDPS_SWITCH_CMD_SDR50_SET		0x80FFFFF2U
+#define XSDPS_SWITCH_CMD_SDR104_SET		0x80FFFFF3U
+#define XSDPS_SWITCH_CMD_DDR50_SET		0x80FFFFF4U
+#define XSDPS_EXT_CSD_CMD_BLKCNT	1U
+#define XSDPS_EXT_CSD_CMD_BLKSIZE	512U
+#define XSDPS_TUNING_CMD_BLKCNT		1U
+#define XSDPS_TUNING_CMD_BLKSIZE	64U
+
+#define XSDPS_HIGH_SPEED_MAX_CLK	50000000U
+#define XSDPS_UHS_SDR104_MAX_CLK	208000000U
+#define XSDPS_UHS_SDR50_MAX_CLK		100000000U
+#define XSDPS_UHS_DDR50_MAX_CLK		50000000U
+#define XSDPS_UHS_SDR25_MAX_CLK		50000000U
+#define XSDPS_UHS_SDR12_MAX_CLK		25000000U
+
+#define SD_DRIVER_TYPE_B	0x01U
+#define SD_DRIVER_TYPE_A	0x02U
+#define SD_DRIVER_TYPE_C	0x04U
+#define SD_DRIVER_TYPE_D	0x08U
+#define SD_SET_CURRENT_LIMIT_200	0U
+#define SD_SET_CURRENT_LIMIT_400	1U
+#define SD_SET_CURRENT_LIMIT_600	2U
+#define SD_SET_CURRENT_LIMIT_800	3U
+
+#define SD_MAX_CURRENT_200	(1U << SD_SET_CURRENT_LIMIT_200)
+#define SD_MAX_CURRENT_400	(1U << SD_SET_CURRENT_LIMIT_400)
+#define SD_MAX_CURRENT_600	(1U << SD_SET_CURRENT_LIMIT_600)
+#define SD_MAX_CURRENT_800	(1U << SD_SET_CURRENT_LIMIT_800)
+
+#define XSDPS_SD_SDR12_MAX_CLK	25000000U
+#define XSDPS_SD_SDR25_MAX_CLK	50000000U
+#define XSDPS_SD_SDR50_MAX_CLK	100000000U
+#define XSDPS_SD_DDR50_MAX_CLK	50000000U
+#define XSDPS_SD_SDR104_MAX_CLK	208000000U
+/*
+ * XSDPS_SD_INPUT_MAX_CLK is set to 175000000 in order to keep it smaller
+ * than the clock value coming from the core. This value is kept to safely
+ * switch to SDR104 mode if the SD card supports it.
+ */
+#define XSDPS_SD_INPUT_MAX_CLK	175000000U
+
+#define XSDPS_MMC_HS200_MAX_CLK	200000000U
+#define XSDPS_MMC_HSD_MAX_CLK	52000000U
+#define XSDPS_MMC_DDR_MAX_CLK	52000000U
+
+#define XSDPS_CARD_STATE_IDLE		0U
+#define XSDPS_CARD_STATE_RDY		1U
+#define XSDPS_CARD_STATE_IDEN		2U
+#define XSDPS_CARD_STATE_STBY		3U
+#define XSDPS_CARD_STATE_TRAN		4U
+#define XSDPS_CARD_STATE_DATA		5U
+#define XSDPS_CARD_STATE_RCV		6U
+#define XSDPS_CARD_STATE_PROG		7U
+#define XSDPS_CARD_STATE_DIS		8U
+#define XSDPS_CARD_STATE_BTST		9U
+#define XSDPS_CARD_STATE_SLP		10U
+
+#define XSDPS_SLOT_REM			0U
+#define XSDPS_SLOT_EMB			1U
+
+#define XSDPS_WIDTH_8		8U
+#define XSDPS_WIDTH_4		4U
+
+
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+#define SD0_ITAPDLY_SEL_MASK		0x000000FFU
+#define SD0_OTAPDLY_SEL_MASK		0x0000003FU
+#define SD1_ITAPDLY_SEL_MASK		0x00FF0000U
+#define SD1_OTAPDLY_SEL_MASK		0x003F0000U
+#define SD_DLL_CTRL 				0x00000358U
+#define SD_ITAPDLY					0x00000314U
+#define SD_OTAPDLY					0x00000318U
+#define SD0_DLL_RST					0x00000004U
+#define SD1_DLL_RST					0x00040000U
+#define SD0_ITAPCHGWIN				0x00000200U
+#define SD0_ITAPDLYENA				0x00000100U
+#define SD0_OTAPDLYENA				0x00000040U
+#define SD1_ITAPCHGWIN				0x02000000U
+#define SD1_ITAPDLYENA				0x01000000U
+#define SD1_OTAPDLYENA				0x00400000U
+
+#define SD0_OTAPDLYSEL_HS200_B0		0x00000003U
+#define SD0_OTAPDLYSEL_HS200_B2		0x00000002U
+#define SD0_ITAPDLYSEL_SD50			0x00000014U
+#define SD0_OTAPDLYSEL_SD50			0x00000003U
+#define SD0_ITAPDLYSEL_SD_DDR50		0x0000003DU
+#define SD0_ITAPDLYSEL_EMMC_DDR50	0x00000012U
+#define SD0_OTAPDLYSEL_SD_DDR50		0x00000004U
+#define SD0_OTAPDLYSEL_EMMC_DDR50	0x00000006U
+#define SD0_ITAPDLYSEL_HSD			0x00000015U
+#define SD0_OTAPDLYSEL_SD_HSD		0x00000005U
+#define SD0_OTAPDLYSEL_EMMC_HSD		0x00000006U
+
+#define SD1_OTAPDLYSEL_HS200_B0		0x00030000U
+#define SD1_OTAPDLYSEL_HS200_B2		0x00020000U
+#define SD1_ITAPDLYSEL_SD50			0x00140000U
+#define SD1_OTAPDLYSEL_SD50			0x00030000U
+#define SD1_ITAPDLYSEL_SD_DDR50		0x003D0000U
+#define SD1_ITAPDLYSEL_EMMC_DDR50	0x00120000U
+#define SD1_OTAPDLYSEL_SD_DDR50		0x00040000U
+#define SD1_OTAPDLYSEL_EMMC_DDR50	0x00060000U
+#define SD1_ITAPDLYSEL_HSD			0x00150000U
+#define SD1_OTAPDLYSEL_SD_HSD		0x00050000U
+#define SD1_OTAPDLYSEL_EMMC_HSD		0x00060000U
+
+#endif
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+#define XSdPs_In64 Xil_In64
+#define XSdPs_Out64 Xil_Out64
+
+#define XSdPs_In32 Xil_In32
+#define XSdPs_Out32 Xil_Out32
+
+#define XSdPs_In16 Xil_In16
+#define XSdPs_Out16 Xil_Out16
+
+#define XSdPs_In8 Xil_In8
+#define XSdPs_Out8 Xil_Out8
+
+/****************************************************************************/
+/**
+* Read a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to the target register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XSdPs_ReadReg(XSdPs *InstancePtr. s32 RegOffset)
+*
+******************************************************************************/
+#define XSdPs_ReadReg64(InstancePtr, RegOffset) \
+	XSdPs_In64((InstancePtr->Config.BaseAddress) + RegOffset)
+
+/***************************************************************************/
+/**
+* Write to a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to target register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XSdPs_WriteReg(XSdPs *InstancePtr, s32 RegOffset,
+*		u64 RegisterValue)
+*
+******************************************************************************/
+#define XSdPs_WriteReg64(InstancePtr, RegOffset, RegisterValue) \
+	XSdPs_Out64((InstancePtr->Config.BaseAddress) + (RegOffset), \
+		(RegisterValue))
+
+/****************************************************************************/
+/**
+* Read a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to the target register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XSdPs_ReadReg(u32 BaseAddress. int RegOffset)
+*
+******************************************************************************/
+#define XSdPs_ReadReg(BaseAddress, RegOffset) \
+	XSdPs_In32((BaseAddress) + (RegOffset))
+
+/***************************************************************************/
+/**
+* Write to a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to target register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XSdPs_WriteReg(u32 BaseAddress, int RegOffset,
+*		u32 RegisterValue)
+*
+******************************************************************************/
+#define XSdPs_WriteReg(BaseAddress, RegOffset, RegisterValue) \
+	XSdPs_Out32((BaseAddress) + (RegOffset), (RegisterValue))
+
+/****************************************************************************/
+/**
+* Read a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to the target register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u16 XSdPs_ReadReg(u32 BaseAddress. int RegOffset)
+*
+******************************************************************************/
+static INLINE u16 XSdPs_ReadReg16(u32 BaseAddress, u8 RegOffset)
+{
+#if defined (__MICROBLAZE__)
+	u32 Reg;
+	BaseAddress += RegOffset & 0xFC;
+	Reg = XSdPs_In32(BaseAddress);
+	Reg >>= ((RegOffset & 0x3)*8);
+	return (u16)Reg;
+#else
+	return XSdPs_In16((BaseAddress) + (RegOffset));
+#endif
+}
+
+/***************************************************************************/
+/**
+* Write to a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to target register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XSdPs_WriteReg(u32 BaseAddress, int RegOffset,
+*		u16 RegisterValue)
+*
+******************************************************************************/
+
+static INLINE void XSdPs_WriteReg16(u32 BaseAddress, u8 RegOffset, u16 RegisterValue)
+{
+#if defined (__MICROBLAZE__)
+	u32 Reg;
+	BaseAddress += RegOffset & 0xFC;
+	Reg = XSdPs_In32(BaseAddress);
+	Reg &= ~(0xFFFF<<((RegOffset & 0x3)*8));
+	Reg |= RegisterValue <<((RegOffset & 0x3)*8);
+	XSdPs_Out32(BaseAddress, Reg);
+#else
+	XSdPs_Out16((BaseAddress) + (RegOffset), (RegisterValue));
+#endif
+}
+
+/****************************************************************************/
+/**
+* Read a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to the target register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u8 XSdPs_ReadReg(u32 BaseAddress. int RegOffset)
+*
+******************************************************************************/
+static INLINE u8 XSdPs_ReadReg8(u32 BaseAddress, u8 RegOffset)
+{
+#if defined (__MICROBLAZE__)
+	u32 Reg;
+	BaseAddress += RegOffset & 0xFC;
+	Reg = XSdPs_In32(BaseAddress);
+	Reg >>= ((RegOffset & 0x3)*8);
+	return (u8)Reg;
+#else
+	return XSdPs_In8((BaseAddress) + (RegOffset));
+#endif
+}
+/***************************************************************************/
+/**
+* Write to a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to target register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XSdPs_WriteReg(u32 BaseAddress, int RegOffset,
+*		u8 RegisterValue)
+*
+******************************************************************************/
+static INLINE void XSdPs_WriteReg8(u32 BaseAddress, u8 RegOffset, u8 RegisterValue)
+{
+#if defined (__MICROBLAZE__)
+	u32 Reg;
+	BaseAddress += RegOffset & 0xFC;
+	Reg = XSdPs_In32(BaseAddress);
+	Reg &= ~(0xFF<<((RegOffset & 0x3)*8));
+	Reg |= RegisterValue <<((RegOffset & 0x3)*8);
+	XSdPs_Out32(BaseAddress, Reg);
+#else
+	XSdPs_Out8((BaseAddress) + (RegOffset), (RegisterValue));
+#endif
+}
+/***************************************************************************/
+/**
+* Macro to get present status register
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XSdPs_WriteReg(u32 BaseAddress, int RegOffset,
+*		u8 RegisterValue)
+*
+******************************************************************************/
+#define XSdPs_GetPresentStatusReg(BaseAddress) \
+		XSdPs_In32((BaseAddress) + (XSDPS_PRES_STATE_OFFSET))
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SD_HW_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xsecure.h b/src/Xilinx/include/xsecure.h
new file mode 100644
index 0000000..ce04c4e
--- /dev/null
+++ b/src/Xilinx/include/xsecure.h
@@ -0,0 +1,329 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 - 18 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xsecure.h
+*
+* This is the header file which contains secure library interface function prototype
+* for authentication and decryption of images.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date        Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  dp   02/15/17 Initial release
+* 2.2   vns  09/18/17 Added APIs to support generic functionality
+*                     for SHA3 and RSA hardware at linux level.
+* 3.0   vns  02/19/18 Added error codes and macros for secure image.
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+#ifndef XSECURE_H
+#define XSECURE_H
+
+/************************** Include Files ***********************************/
+
+#include "xcsudma.h"
+#include "xsecure_aes.h"
+#include "xsecure_rsa.h"
+#include "xsecure_sha.h"
+
+/************************** Constant Definitions *****************************/
+
+#define XSECURE_AES		1
+#define XSECURE_RSA		2
+#define XSECURE_RSA_AES		3
+
+#define XSECURE_SHA3_INIT	1
+#define XSECURE_SHA3_UPDATE	2
+#define XSECURE_SHA3_FINAL	4
+#define XSECURE_SHA3_MASK	(XSECURE_SHA3_INIT | \
+				XSECURE_SHA3_UPDATE | XSECURE_SHA3_FINAL)
+
+/* 0th bit of flag tells about encryption or decryption */
+#define XSECURE_ENC		1
+#define XSECURE_DEC		0
+
+#define XSECURE_RSA_OPERATION	1
+#define XSECURE_RSA_KEY_SELECT  2
+
+#define XSECURE_MASK		(XSECURE_AES | XSECURE_RSA)
+
+#define XSECURE_KEY_STR_LEN		64	/* String length */
+#define XSECURE_IV_STR_LEN		24	/* String length */
+#define XSECURE_KEY_LEN			8
+#define XSECURE_IV_LEN			3
+#define XSECURE_GCM_TAG_LEN		128
+#define XSECURE_WORD_LEN		4
+#define XSECURE_MAX_NIBBLES		8
+
+#define XSECURE_WORD_SHIFT		32
+
+#define XSECURE_ARRAY_LENGTH(array) (sizeof((array))/sizeof((array)[0]))
+
+#define XSECURE_ERROR_CSUDMA_INIT_FAIL	0x1
+#define XSECURE_STRING_INVALID_ERROR	0x2
+#define XSECURE_INVALID_FLAG		0x3
+#define XSECURE_ISNOT_SECURE_IMAGE	0x4
+#define XSECURE_SHA3_INIT_FAIL		0x5
+#define XSECURE_SIZE_ERR		0x6
+
+#define XSECURE_SEL_ERR			0x7
+#define XSECURE_REVOKE_ERR		0x8
+#define XSECURE_VERIFY_ERR		0x9
+#define XSECURE_RSA_INIT_ERR		0xA
+#define XSECURE_RSA_ENCRYPT_ERR		0xB
+#define XSECURE_SHA3_PADSELECT_ERR	0xC
+#define XSECURE_IMAGE_WITH_MUL_PARTITIONS 0xD
+#define XSECURE_AUTH_ISCOMPULSORY	0xE
+#define XSECURE_ENC_ISCOMPULSORY	0xF
+
+#define XSECURE_BHDR_AUTH_NOT_ALLOWED	0x10
+#define	XSECURE_ONLY_BHDR_AUTH_ALLOWED	0x11
+#define XSECURE_HDR_NOAUTH_PART_AUTH	0x12
+#define XSECURE_DEC_WRONG_KEY_SOURCE	0x13
+#define XSECURE_KUP_KEY_NOT_PROVIDED	0x14
+#define XSECURE_KUP_KEY_NOT_REQUIRED	0x15
+#define XSECURE_AES_GCM_TAG_NOT_MATCH	0x16
+
+#define XSECURE_AUTH_NOT_ENABLED 	0xFF
+
+#define XSECURE_PPK_ERR			0x100
+#define XSECURE_SPK_ERR			0x200
+#define XSECURE_AUTH_FAILURE		0x300
+#define XSECURE_AES_DECRYPTION_FAILURE	0x400
+
+#define XSECURE_BOOT_HDR_FAIL		0x1000
+#define XSECURE_IMG_HDR_FAIL		0x2000
+#define XSECURE_PARTITION_FAIL		0x3000
+
+
+
+#define XSECURE_CSUDMA_DEVICEID		0
+
+#define XSECURE_MOD_LEN			512
+
+#define XSECURE_PH_ATTR_AUTH_ENABLE	0x8000U
+#define XSECURE_PH_ATTR_ENC_ENABLE	0x0080U
+
+#define XSECURE_AH_ATTR_PPK_SEL_MASK   	0x30000U
+#define XSECURE_AH_ATTR_PPK_SEL_SHIFT	16
+
+#define XSECURE_AC_SPKID_OFFSET		0x04U
+#define XSECURE_AC_PPK_OFFSET		0x40U
+#define XSECURE_AC_SPK_OFFSET		0x480U
+#define XSECURE_AC_SPK_SIG_OFFSET	0x8C0U
+
+#define XSECURE_KEY_SIZE		(512U+512U+64U)
+
+#define XSECURE_ENABLED			0xFF
+#define XSECURE_NOTENABLED		0
+
+
+#define XSECURE_EFUSE_BASEADDR		(0XFFCC0000U)
+/* Register PPK0_0 */
+#define XSECURE_EFUSE_PPK0	(XSECURE_EFUSE_BASEADDR + 0x000010A0U)
+
+/* Register PPK1_0 */
+#define XSECURE_EFUSE_PPK1	(XSECURE_EFUSE_BASEADDR + 0x000010D0U)
+
+/* Register SPK ID */
+#define XSECURE_EFUSE_SPKID	(XSECURE_EFUSE_BASEADDR + 0x0000105CU)
+
+/* Register: EFUSE_SEC_CTRL */
+#define XSECURE_EFUSE_SEC_CTRL    (XSECURE_EFUSE_BASEADDR  + 0X00001058U)
+#define XSECURE_EFUSE_SEC_CTRL_PPK0_REVOKE	(0x18000000U)
+#define XSECURE_EFUSE_SEC_CTRL_PPK1_REVOKE	(0xC0000000U)
+#define XSECURE_EFUSE_SEC_CTRL_RSA_ENABLE   	(0x03FFF800U)
+#define XSECURE_EFUSE_SEC_CTRL_ENC_ONLY		(0x00000004U)
+
+#define XSECURE_SPK_SIZE			(512U+512U+64U)
+#define XSECURE_PPK_SIZE			(XSECURE_SPK_SIZE)
+#define XSECURE_PPK_MOD_SIZE			(512U)
+#define XSECURE_PPK_MOD_EXT_SIZE		(512U)
+#define XSECURE_SPK_MOD_SIZE			XSECURE_PPK_MOD_SIZE
+#define XSECURE_SPK_MOD_EXT_SIZE		XSECURE_PPK_MOD_EXT_SIZE
+#define XSECURE_SPK_SIG_SIZE			(512U)
+#define XSECURE_BHDR_SIG_SIZE			(512U)
+#define XSECURE_PARTITION_SIG_SIZE		(512U)
+#define XSECURE_RSA_AC_ALIGN			(64U)
+#define XSECURE_SPKID_AC_ALIGN			(4U)
+
+#define XSECURE_AUTH_HEADER_SIZE		(8U)
+
+#define	XSECURE_AUTH_CERT_USER_DATA	((u32)64U - XSECURE_AUTH_HEADER_SIZE)
+
+#define XSECURE_AUTH_CERT_MIN_SIZE	(XSECURE_AUTH_HEADER_SIZE 	\
+					+ XSECURE_AUTH_CERT_USER_DATA 	\
+					+ XSECURE_PPK_SIZE 		\
+					+ XSECURE_SPK_SIZE 		\
+					+ XSECURE_SPK_SIG_SIZE 		\
+					+ XSECURE_BHDR_SIG_SIZE 	\
+					+ XSECURE_PARTITION_SIG_SIZE)
+
+#define XSECURE_AUTH_CERT_BHDRSIG_OFFSET	0xAC0
+#define XSECURE_AUTH_CERT_PARTSIG_OFFSET	0xCC0
+
+#define XSECURE_BOOT_HDR_MIN_SIZE	(0x000008B8U)
+#define XSECURE_BOOT_HDR_MAX_SIZE	(XSECURE_BOOT_HDR_MIN_SIZE + \
+					(0x00000182U * 4))
+			/**< When boot header contains PUF helper data */
+#define XSECURE_BUFFER_SIZE		(0x00001080U)
+#define XSECURE_IV_SIZE			(4U)
+
+#define XSECURE_IV_OFFSET		(0xA0U)
+#define XSECURE_PH_TABLE_OFFSET		(0x9CU)
+#define XSECURE_IMAGE_HDR_OFFSET	(0x98U)
+#define XSECURE_IMAGE_ATTR_OFFSET	(0x44U)
+#define XSECURE_KEY_SOURCE_OFFSET	(0x28U)
+
+#define XSECURE_IMG_ATTR_BHDR_MASK	(0xC000U)
+#define XSECURE_IMG_ATTR_PUFHD_MASK	(0x00C0U)
+
+#define XSECURE_PH_OFFSET		(0x8U)
+#define XSECURE_AC_IMAGE_HDR_OFFSET	(0x10U)
+
+#define XSECURE_PH_IV_MASK		(0xFFU)
+
+#define XSECURE_KEY_SRC_KUP		(0xA3A5C3C5U)
+#define XSECURE_KEY_SRC_BBRAM		(0x3A5C3C5AU)
+#define XSECURE_KEY_SRC_BLACK_BH	(0xA35C7C53U)
+#define XSECURE_KEY_SRC_GREY_BH		(0xA35C7CA5U)
+
+/**************************** Type Definitions *******************************/
+
+/* Partition address */
+typedef struct {
+	u32 AddrHigh;	/**< Partition address high */
+	u32 AddrLow;	/**< Partition address low */
+}XSecure_DataAddr;
+
+/* RSA key components */
+typedef struct {
+	u8 *Modulus;		/**< Modulus */
+	u8 *Exponentiation;	/**< Exponentitation */
+	u8 *Exponent;		/**< Exponent */
+}XSecure_RsaKey;
+
+/**
+ * Structure to store the partition header details.
+ * It contains all the information of partition header in order.
+ */
+typedef struct {
+	u32 EncryptedDataWordLength; /**< Encrypted word length of partition*/
+	u32 UnEncryptedDataWordLength; /**< unencrypted word length */
+	u32 TotalDataWordLength;
+		/**< Total word length including the authentication
+			certificate if any*/
+	u32 NextPartitionOffset; /**< Address of the next partition header*/
+	u64 DestinationExecutionAddress; /**< Execution address */
+	u64 DestinationLoadAddress; /**< Load address in DDR/TCM */
+	u32 DataWordOffset; /**< */
+	u32 PartitionAttributes; /**< partition attributes */
+	u32 SectionCount; /**< section count */
+	u32 ChecksumWordOffset; /**< address to checksum when enabled */
+	u32 ImageHeaderOffset; /**< address to image header */
+	u32 AuthCertificateOffset;
+		/**< address to the authentication certificate when enabled */
+	u32 Iv; /**< 8 bits are to be added to  and remaining are reserved */
+	u32 Checksum; /**< checksum of the partition header */
+} XSecure_PartitionHeader;
+
+/* Image info */
+typedef struct {
+	u32 EfuseRsaenable; /**< 0 if not burnt 0xFF if burnt */
+	XSecure_PartitionHeader *PartitionHdr; /**< Pointer to the buffer
+					* which is holding image header */
+	u32 BhdrAuth; /**< 0 if not enabled and 0xFF if set */
+	u32 KeySrc;  /**< Key src from boot header */
+	u32 *Iv;
+			/**< From Boot header + 8bits from partition header */
+	u8 *AuthCerPtr; /**< Buffer allocated to copy AC of the partition */
+}XSecure_ImageInfo;
+
+/************************** Variable Definitions *****************************/
+#if defined (PSU_PMU)
+u8 EfusePpk[XSECURE_PPK_SIZE]__attribute__ ((aligned (32)));
+			/**< eFUSE verified PPK */
+u8 AcBuf[XSECURE_AUTH_CERT_MIN_SIZE]__attribute__ ((aligned (32)));
+			/**< Buffer to store authentication certificate */
+u8 Buffer[XSECURE_BUFFER_SIZE] __attribute__ ((aligned (32)));
+			/**< Buffer to store */
+#endif
+
+u32 Iv[XSECURE_IV_LEN];
+u32 Key[XSECURE_KEY_LEN];
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+u32 XSecure_RsaAes(u32 SrcAddrHigh, u32 SrcAddrLow, u32 WrSize, u32 flags);
+u32 XSecure_Sha3Hash(u32 SrcAddrHigh, u32 SrcAddrLow, u32 SrcSize, u32 Flags);
+u32 XSecure_RsaCore(u32 SrcAddrHigh, u32 SrcAddrLow, u32 SrcSize, u32 Flags);
+
+/* Memory copy */
+u32 XSecure_MemCopy(void * DestPtr, void * SrcPtr, u32 Size);
+
+/* Keys verification */
+#if defined (PSU_PMU)
+u32 XSecure_VerifySpk(u8 *Acptr, u32 EfuseRsaenable);
+#endif
+u32 XSecure_PpkVerify(XCsuDma *CsuDmaInstPtr, u8 *AuthCert);
+u32 XSecure_SpkAuthentication(XCsuDma *CsuDmaInstPtr, u8 *AuthCert, u8 *Ppk);
+u32 XSecure_SpkRevokeCheck(u8 *AuthCert);
+
+/* Authentication functions */
+u32 XSecure_PartitionAuthentication(XCsuDma *CsuDmaInstPtr, u8 *Data,
+				u32 Size, u8 *AuthCertPtr);
+#if defined (PSU_PMU)
+u32 XSecure_AuthenticationHeaders(u8 *StartAddr, XSecure_ImageInfo *ImageInfo);
+#endif
+
+/* eFUSE read functions */
+u32 XSecure_IsRsaEnabled();
+u32 XSecure_IsEncOnlyEnabled();
+
+#if defined (PSU_PMU)
+/* For single partition secure image */
+u32 XSecure_SecureImage(u32 AddrHigh, u32 AddrLow,
+		u32 KupAddrHigh, u32 KupAddrLow, XSecure_DataAddr *Addr);
+#endif
+/*****************************************************************************/
+
+#endif  /* XSECURE_HW_H */
diff --git a/src/Xilinx/include/xsecure_aes.h b/src/Xilinx/include/xsecure_aes.h
new file mode 100644
index 0000000..8c53b0b
--- /dev/null
+++ b/src/Xilinx/include/xsecure_aes.h
@@ -0,0 +1,253 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 18 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xsecure_aes.h
+* @addtogroup xsecure_aes_apis XilSecure AES APIs
+* @{
+* @cond xsecure_internal
+* This file contains hardware interface related information for CSU AES device
+*
+* This driver supports the following features:
+*
+* - AES decryption with/without keyrolling
+* - Authentication using GCM tag
+* - AES encryption
+*
+* Initialization & Configuration
+*
+* The Aes driver instance can be initialized
+* in the following way:
+*
+*   - XSecure_AesInitialize(XSecure_Aes *InstancePtr, XCsuDma *CsuDmaPtr,
+*					u32 KeySel, u32* Iv, u32* Key)
+*
+* The key for decryption can be the device key or user provided key.
+* KeySel variable denotes the key to be used. In case the key is user
+* provided, key has to be provided in Key variable. If it is device key,
+* the key variable will be ignored and device key will be used
+*
+* The initial Initialization vector will be used for decrypting secure header
+* and block 0 of given encrypted data.
+*
+*
+* @note
+*	-The format of encrypted data(boot image) has to be exactly as
+*	 specified by the bootgen. Any encrypted data has to start with a
+*	 secure header first and then the data blocks.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date        Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  ba   10/10/14 Initial release
+* 1.1   ba   11/10/15 Modified Key loading logic in AES encryption
+* 2.0   vns  01/28/17 Added APIs for decryption which can be used for decrypting
+*                     data rather than a boot image.
+*       vns  02/03/17 Added APIs for encryption in generic way.
+*                     Modified existing XSecure_AesEncrypt to
+*                     XSecure_AesEncryptData, and added XSecure_AesEncryptInit
+*                     and XSecure_AesEncryptUpdate APIs for generic usage.
+* 2.2   vns  07/06/16 Added doxygen tags
+* 3.0   vns  02/19/18 Added error code for key clear
+*                     XSECURE_CSU_AES_KEY_CLEAR_ERROR and timeout macro
+*                     XSECURE_AES_TIMEOUT_MAX
+*
+* 

+* @endcond
+*
+******************************************************************************/
+
+#ifndef XSECURE_CSU_AES_H
+#define XSECURE_CSU_AES_H
+
+/************************** Include Files ***********************************/
+
+#include "xsecure_hw.h"
+#include "xcsudma.h"
+#include "xstatus.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions ****************************/
+/** @cond xsecure_internal
+@{
+*/
+#define XSECURE_CSU_AES_STS_AES_BUSY	(1U << 0) /**< AES busy */
+#define XSECURE_CSU_AES_STS_AES_READY	(1U << 1)
+					/**< Ready to Receive Data */
+#define XSECURE_CSU_AES_STS_AES_DONE	(1U << 2)
+					/**< Operation Complete */
+#define XSECURE_CSU_AES_STS_GCM_TAG_OK	(1U << 3) /**< GCM Tag Passed */
+#define XSECURE_CSU_AES_STS_KEY_INIT_DONE	(1U << 4)
+					/**< Key Initialize */
+#define XSECURE_CSU_AES_STS_AES_KEY_ZERO	(1U << 8)
+					/**< AES key zeroed */
+#define XSECURE_CSU_AES_STS_KUP_ZEROED	(1U << 9) /**< KUP key Zeroed */
+#define XSECURE_CSU_AES_STS_BOOT_KEY_ZERO	(1U << 10)
+					/**< Boot Key zeroed */
+#define XSECURE_CSU_AES_STS_OKR_ZERO 	(1U << 11)
+					/**< Operational Key zeroed */
+
+#define XSECURE_CSU_AES_KEY_SRC_KUP	(0x0U) /**< KUP key source */
+#define XSECURE_CSU_AES_KEY_SRC_DEV	(0x1U) /**< Device Key source */
+
+#define XSECURE_CSU_AES_CHUNKING_DISABLED (0x0U)
+#define XSECURE_CSU_AES_CHUNKING_ENABLED (0x1U)
+
+#define XSECURE_CSU_AES_KEY_LOAD	(1U << 0)
+					/**< Load AES key from Source */
+
+#define XSECURE_CSU_AES_START_MSG	(1U << 0) /**< AES Start message */
+
+#define XSECURE_CSU_AES_KUP_WR		(1U << 0)
+					/**< Direct AES Output to KUP */
+#define XSECURE_CSU_AES_IV_WR		(1U << 1)
+					/**< Direct AES Output to IV Reg */
+
+#define XSECURE_CSU_AES_RESET		(1U << 0) /**< Reset Value */
+
+#define XSECURE_CSU_AES_KEY_ZERO	(1U << 0)
+					/**< set AES key to zero */
+#define XSECURE_CSU_AES_KUP_ZERO	(1U << 1)
+					/**< Set KUP Reg. to zero */
+
+#define XSECURE_CSU_AES_CFG_DEC		(0x0U) /**< AES mode Decrypt */
+#define XSECURE_CSU_AES_CFG_ENC		(0x1U) /**< AES Mode Encrypt */
+
+#define XSECURE_CSU_KUP_WR		(1U << 0)
+					/**< Direct output to KUP */
+#define XSECURE_CSU_IV_WR		(1U << 4)
+					/**< image length mismatch */
+
+/* Error Codes and Statuses */
+#define XSECURE_CSU_AES_DECRYPTION_DONE	(0L)
+					/**< AES Decryption successful */
+#define XSECURE_CSU_AES_GCM_TAG_MISMATCH	(1L)
+					/**< user provided GCM tag does
+						not match calculated tag */
+#define XSECURE_CSU_AES_IMAGE_LEN_MISMATCH	(2L)
+					/**< image length mismatch */
+#define XSECURE_CSU_AES_DEVICE_COPY_ERROR	(3L)
+					/**< device copy failed */
+#define XSECURE_CSU_AES_KEY_CLEAR_ERROR		(4L)
+					/**< AES key clear error */
+
+#define XSECURE_SECURE_HDR_SIZE		(48U)
+					/**< Secure Header Size in Bytes*/
+#define XSECURE_SECURE_GCM_TAG_SIZE	(16U) /**< GCM Tag Size in Bytes */
+
+#define XSECURE_DESTINATION_PCAP_ADDR    (0XFFFFFFFFU)
+
+#define XSECURE_AES_TIMEOUT_MAX		(0x1FFFFU)
+
+/************************** Type Definitions ********************************/
+
+/**
+ * The AES-GCM driver instance data structure. A pointer to an instance data
+ * structure is passed around by functions to refer to a specific driver
+ * instance.
+ */
+typedef struct {
+	u32 BaseAddress; /**< Device Base Address */
+	XCsuDma *CsuDmaPtr; /**< CSUDMA Instance Pointer */
+	u32* Iv; /**< Initialization Vector */
+	u32* Key; /**< AES Key */
+	u32* GcmTagAddr; /**< GCM tag address for decryption */
+	u32  KeySel; /**< Key Source selection */
+	u8 IsChunkingEnabled; /**< Data Chunking enabled/disabled */
+	u8* ReadBuffer; /**< Data Buffer to be used in case of chunking */
+	u32 ChunkSize; /**< Size of one chunk in bytes */
+	u32 (*DeviceCopy) (u32 SrcAddress, UINTPTR DestAddress, u32 Length);
+		/**< Function pointer for copying data chunk from device to buffer.
+		 * Arguments are:
+		 * SrcAddress: Address of data in device.
+		 * DestAddress: Address where data will be copied
+		 * Length: Length of data in bytes.
+		 * Return value should be 0 in case of success and 1 for failure.
+		 */
+	u32 SizeofData; /**< Size of Data to be encrypted or decrypted */
+	u8  *Destination; /**< Destination for decrypted/encrypted data */
+} XSecure_Aes;
+
+/** @}
+@endcond */
+/************************** Function Prototypes ******************************/
+
+/* Initialization Functions */
+
+s32  XSecure_AesInitialize(XSecure_Aes *InstancePtr, XCsuDma *CsuDmaPtr,
+				u32 KeySel, u32* Iv,  u32* Key);
+
+/* Decryption of data */
+void XSecure_AesDecryptInit(XSecure_Aes *InstancePtr, u8 * DecData,
+		u32 Size, u8 * GcmTagAddr);
+s32 XSecure_AesDecryptUpdate(XSecure_Aes *InstancePtr, u8 *EncData, u32 Size);
+
+s32 XSecure_AesDecryptData(XSecure_Aes *InstancePtr, u8 * DecData, u8 *EncData,
+		u32 Size, u8 * GcmTagAddr);
+
+/* Decryption of boot image created by using bootgen */
+s32 XSecure_AesDecrypt(XSecure_Aes *InstancePtr, u8 *Dst, const u8 *Src,
+				u32 Length);
+
+/* Encryption */
+void XSecure_AesEncryptInit(XSecure_Aes *InstancePtr, u8 *EncData, u32 Size);
+void XSecure_AesEncryptUpdate(XSecure_Aes *InstancePtr, const u8 *Data,
+							u32 Size);
+void XSecure_AesEncryptData(XSecure_Aes *InstancePtr, u8 *Dst, const u8 *Src,
+				u32 Len);
+
+/* Reset */
+void XSecure_AesReset(XSecure_Aes  *InstancePtr);
+
+void XSecure_AesWaitForDone(XSecure_Aes *InstancePtr);
+
+/** @cond xsecure_internal
+@{ */
+void XSecure_AesKeySelNLoad(XSecure_Aes *InstancePtr);
+s32 XSecure_AesDecryptBlk(XSecure_Aes *InstancePtr, u8 *Dst,
+			const u8 *Src, const u8 *Tag, u32 Len, u32 Flag);
+/* Enable/Disable chunking */
+void XSecure_AesSetChunking(XSecure_Aes *InstancePtr, u8 Chunking);
+
+/* Configuring Data chunking settings */
+void XSecure_AesSetChunkConfig(XSecure_Aes *InstancePtr, u8 *ReadBuffer,
+		u32 ChunkSize, u32(*DeviceCopy)(u32, UINTPTR, u32));
+/** @}
+@endcond */
+
+#endif /* XSECURE_AES_H_ */
+
+/**@}*/
diff --git a/src/Xilinx/include/xsecure_hw.h b/src/Xilinx/include/xsecure_hw.h
new file mode 100644
index 0000000..4ba143c
--- /dev/null
+++ b/src/Xilinx/include/xsecure_hw.h
@@ -0,0 +1,364 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 17 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xsecure_hw.h
+*
+* This is the header file which contains definitions for the hardware
+* interface of secure hardware devices.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date        Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  ba   09/25/14 Initial release
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+#ifndef XSECURE_HW_H
+#define XSECURE_HW_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "xparameters.h"
+#include "xil_types.h"
+#include "sleep.h"
+
+/************************** Constant Definitions *****************************/
+
+#define XSECURE_CSU_REG_BASE_ADDR	(0xFFCA0000U)
+					/**< CSU base address */
+#define XSECURE_CSU_DMA_BASE		(0xFFC80000U)
+					/**< CSUDMA base address */
+
+#define XSECURE_CSU_SHA3_BASE	(XSECURE_CSU_REG_BASE_ADDR + 0x2000U)
+					/**< SHA3 base address */
+#define XSECURE_CSU_CTRL_REG	(XSECURE_CSU_REG_BASE_ADDR + 0x4U)
+					/**< CSU control reg. */
+#define XSECURE_CSU_SSS_BASE	(XSECURE_CSU_REG_BASE_ADDR + 0x8U)
+					/**< CSU SSS base address */
+#define XSECURE_CSU_AES_BASE	(XSECURE_CSU_REG_BASE_ADDR + 0x1000U)
+					/**< CSU AES base address */
+#define XSECURE_CSU_RSA_BASE	(0xFFCE0000U)
+					/**< RSA reg. base address */
+#define XSECURE_CSU_PCAP_STATUS (XSECURE_CSU_REG_BASE_ADDR + 0X00003010U)
+					/**< CSU PCAP Status reg. */
+#define XSECURE_CSU_PCAP_STATUS_PCAP_WR_IDLE_MASK    (0X00000001U)
+					/**< PCAP Write Idle */
+
+/** @name Register Map
+ *
+ * Register offsets for the SHA module.
+ * @{
+ */
+#define XSECURE_CSU_SHA3_START_OFFSET	(0x00U) /**< SHA start message */
+#define XSECURE_CSU_SHA3_RESET_OFFSET	(0x04U) /**< Reset Register */
+#define XSECURE_CSU_SHA3_DONE_OFFSET	(0x08U) /**< SHA Done Register */
+
+#define XSECURE_CSU_SHA3_DIGEST_0_OFFSET	(0x10U)
+					/**< SHA3 Digest: Reg 0 */
+#define XSECURE_CSU_SHA3_DIGEST_11_OFFSET	(0x34U)
+					/**< SHA3 Digest: Last Register */
+/* @} */
+
+/** @name Register Map
+ *
+ * Register offsets for the AES module.
+ * @{
+ */
+#define XSECURE_CSU_AES_STS_OFFSET	(0x00U) /**< AES Status */
+#define XSECURE_CSU_AES_KEY_SRC_OFFSET	(0x04U) /**< AES Key Source */
+#define XSECURE_CSU_AES_KEY_LOAD_OFFSET	(0x08U) /**< AES Key Load Reg */
+#define XSECURE_CSU_AES_START_MSG_OFFSET (0x0CU) /**< AES Start Message */
+#define XSECURE_CSU_AES_RESET_OFFSET	(0x10U) /**< AES Reset Register */
+#define XSECURE_CSU_AES_KEY_CLR_OFFSET	(0x14U) /**< AES Key Clear */
+#define XSECURE_CSU_AES_CFG_OFFSET	(0x18U)/**< AES Operational Mode */
+#define XSECURE_CSU_AES_KUP_WR_OFFSET	(0x1CU)
+						/**< AES KUP Write Control */
+
+#define XSECURE_CSU_AES_KUP_0_OFFSET	(0x20U)
+						/**< AES Key Update 0 */
+#define XSECURE_CSU_AES_KUP_1_OFFSET	(0x24U) /**< AES Key Update 1 */
+#define XSECURE_CSU_AES_KUP_2_OFFSET	(0x28U) /**< AES Key Update 2 */
+#define XSECURE_CSU_AES_KUP_3_OFFSET	(0x2CU) /**< AES Key Update 3 */
+#define XSECURE_CSU_AES_KUP_4_OFFSET	(0x30U) /**< AES Key Update 4 */
+#define XSECURE_CSU_AES_KUP_5_OFFSET	(0x34U) /**< AES Key Update 5 */
+#define XSECURE_CSU_AES_KUP_6_OFFSET	(0x38U) /**< AES Key Update 6 */
+#define XSECURE_CSU_AES_KUP_7_OFFSET	(0x3CU) /**< AES Key Update 7 */
+
+#define XSECURE_CSU_AES_IV_0_OFFSET		(0x40U) /**< AES IV 0 */
+#define XSECURE_CSU_AES_IV_1_OFFSET		(0x44U) /**< AES IV 1 */
+#define XSECURE_CSU_AES_IV_2_OFFSET		(0x48U) /**< AES IV 2 */
+#define XSECURE_CSU_AES_IV_3_OFFSET		(0x4CU) /**< AES IV 3 */
+/* @} */
+
+
+/** @name Register Map
+ *
+ * Register offsets for the RSA module.
+ * @{
+ */
+#define XSECURE_CSU_RSA_WRITE_DATA_OFFSET	(0x00U)
+						/**< RAM write data offset */
+#define XSECURE_CSU_RSA_WRITE_ADDR_OFFSET	(0x04U)
+						/**< RAM write address offset */
+#define XSECURE_CSU_RSA_READ_DATA_OFFSET	(0x08U)
+						/**< RAM data read offset */
+#define XSECURE_CSU_RSA_READ_ADDR_OFFSET	(0x0CU)
+						/**< RAM read offset */
+#define XSECURE_CSU_RSA_CONTROL_OFFSET		(0x10U)
+						/**< RSA Control Reg */
+
+#define XSECURE_CSU_RSA_STATUS_OFFSET		(0x14U)
+						/**< Status Register */
+
+#define XSECURE_CSU_RSA_MINV0_OFFSET		(0x18U)
+					/**< RSA MINV(Mod 32 Inverse) 0 */
+#define XSECURE_CSU_RSA_MINV1_OFFSET		(0x1CU)
+						/**< RSA MINV 1 */
+#define XSECURE_CSU_RSA_MINV2_OFFSET		(0x20U) /**< RSA MINV 2 */
+#define XSECURE_CSU_RSA_MINV3_OFFSET		(0x24U) /**< RSA MINV 3 */
+#define XSECURE_CSU_RSA_ZERO_OFFSET		(0x28U) /**< RSA Zero offset */
+
+#define XSECURE_CSU_RSA_WR_DATA_0_OFFSET	(0x2cU) /**< Write Data 0 */
+#define XSECURE_CSU_RSA_WR_DATA_1_OFFSET	(0x30U) /**< Write Data 1 */
+#define XSECURE_CSU_RSA_WR_DATA_2_OFFSET	(0x34U) /**< Write Data 2 */
+#define XSECURE_CSU_RSA_WR_DATA_3_OFFSET	(0x38U) /**< Write Data 3 */
+#define XSECURE_CSU_RSA_WR_DATA_4_OFFSET	(0x3cU) /**< Write Data 4 */
+#define XSECURE_CSU_RSA_WR_DATA_5_OFFSET	(0x40U) /**< Write Data 5 */
+#define XSECURE_CSU_RSA_WR_ADDR_OFFSET		(0x44U)
+					/**< Write address in RSA RAM */
+
+#define XSECURE_CSU_RSA_RD_DATA_0_OFFSET	(0x48U) /**< Read Data 0 */
+#define XSECURE_CSU_RSA_RD_DATA_1_OFFSET	(0x4cU) /**< Read Data 1 */
+#define XSECURE_CSU_RSA_RD_DATA_2_OFFSET	(0x50U) /**< Read Data 2 */
+#define XSECURE_CSU_RSA_RD_DATA_3_OFFSET	(0x54U) /**< Read Data 3 */
+#define XSECURE_CSU_RSA_RD_DATA_4_OFFSET	(0x58U) /**< Read Data 4 */
+#define XSECURE_CSU_RSA_RD_DATA_5_OFFSET	(0x5cU) /**< Read Data 5 */
+#define XSECURE_CSU_RSA_RD_ADDR_OFFSET		(0x60U)
+						/**< Read address in RSA RAM */
+
+/* @} */
+
+/**************************** Type Definitions *******************************/
+
+/* Definition for SSS reg Source bits. */
+typedef enum
+{
+	XSECURE_CSU_SSS_SRC_PCAP	= 0x3U,	/**< SSS source is PCAP */
+	XSECURE_CSU_SSS_SRC_SRC_DMA	= 0x5U,	/**< SSS source is DMA */
+	XSECURE_CSU_SSS_SRC_AES		= 0xAU,	/**< SSS source is AES */
+	XSECURE_CSU_SSS_SRC_PSTP	= 0xCU,	/**< SSS source is PSTP */
+	XSECURE_CSU_SSS_SRC_NONE	= 0x0U,	/**< NO Source */
+	XSECURE_CSU_SSS_SRC_MASK	= 0xFU	/**< Mask for SSS source */
+}XSECURE_CSU_SSS_SRC;				/**< SSS source values */
+
+/**
+* Definition for SSS reg Destination bits.
+*/
+typedef enum
+{
+	XSECURE_CSU_SSS_PCAP_SHIFT = 0U,/**< Offset for destination PCAP */
+	XSECURE_CSU_SSS_DMA_SHIFT = 4U,	/**< Offset for destination DMA */
+	XSECURE_CSU_SSS_AES_SHIFT = 8U,	/**< Offset for destination AES */
+	XSECURE_CSU_SSS_SHA_SHIFT = 12U,/**< Offset for destination SHA */
+	XSECURE_CSU_SSS_PSTP_SHIFT = 16U/**< Offset for destination PSTP */
+}XSECURE_CSU_SSS_DEST_SHIFT;		/**<.Offset for SSS destination.*/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+* Read a CSU register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the base address of
+*		the device.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XSecure_ReadReg(u32 BaseAddress, int RegOffset)
+*
+******************************************************************************/
+#define XSecure_ReadReg(BaseAddress, RegOffset) \
+				Xil_In32((BaseAddress) + (RegOffset))
+
+/***************************************************************************/
+/**
+* Write a CSU register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the base address of
+*		the device.
+* @param	RegisterValue is the value to be written to the register
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_WriteReg(u32 BaseAddress, int RegOffset,
+*			u16 RegisterValue)
+*
+******************************************************************************/
+#define XSecure_WriteReg(BaseAddress, RegOffset, RegisterValue) \
+			Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))
+
+#define XSecure_In32(Addr)			Xil_In32(Addr)
+
+#define XSecure_In64(Addr)			Xil_In64(Addr)
+
+#define XSecure_Out32(Addr, Data)		Xil_Out32(Addr, Data)
+
+#define XSecure_Out64(Addr, Data)		Xil_Out64(Addr, Data)
+
+/**
+* Definition for SSS inline functions
+*/
+
+static inline u32 XSecure_SssInputPcap(XSECURE_CSU_SSS_SRC Src)
+{
+    Src &= XSECURE_CSU_SSS_SRC_MASK;
+    return (Src << XSECURE_CSU_SSS_PCAP_SHIFT);
+}
+
+/***************************************************************************/
+/**
+* Set the SSS configuration mask for a data transfer to DMA device
+*
+* @param	Src contains the bits for source device sending data to DMA.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_SssInputDstDma(XSECURE_CSU_SSS_SRC Src)
+*
+******************************************************************************/
+static inline u32 XSecure_SssInputDstDma(XSECURE_CSU_SSS_SRC Src)
+{
+	Src &= XSECURE_CSU_SSS_SRC_MASK;
+	return (Src << XSECURE_CSU_SSS_DMA_SHIFT);
+}
+
+/***************************************************************************/
+/**
+* Set the SSS configuration mask for a data transfer to AES device
+*
+* @param	Src contains the bits for AES source device
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_SssInputAes(XSECURE_CSU_SSS_SRC Src)
+*
+******************************************************************************/
+static inline u32 XSecure_SssInputAes(XSECURE_CSU_SSS_SRC Src)
+{
+	Src &= XSECURE_CSU_SSS_SRC_MASK;
+	return (Src << XSECURE_CSU_SSS_AES_SHIFT);
+}
+
+/***************************************************************************/
+/**
+* Set the SSS configuration mask for a data transfer to SHA device
+*
+* @param	Src contains the bits for SHA source device
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_SssInputSha3(XSECURE_CSU_SSS_SRC Src)
+*
+******************************************************************************/
+static inline u32 XSecure_SssInputSha3(XSECURE_CSU_SSS_SRC Src)
+{
+	Src &= XSECURE_CSU_SSS_SRC_MASK;
+	return (Src << XSECURE_CSU_SSS_SHA_SHIFT);
+}
+
+/***************************************************************************/
+/**
+* Set up the CSU Secure Stream Switch configuration
+*
+* @param	Cfg contains the 32 bit value to be written into SSS config
+*			register
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_SssSetup(u32 Cfg)
+*
+******************************************************************************/
+static inline void XSecure_SssSetup(u32 Cfg)
+{
+	XSecure_Out32(XSECURE_CSU_SSS_BASE, Cfg);
+}
+
+/***************************************************************************/
+/**
+* Wait for writes to PL and hence PCAP write cycle to complete
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_PcapWaitForDone(void)
+*
+******************************************************************************/
+static inline void XSecure_PcapWaitForDone()
+{
+	while ((Xil_In32(XSECURE_CSU_PCAP_STATUS) &
+			XSECURE_CSU_PCAP_STATUS_PCAP_WR_IDLE_MASK) !=
+			XSECURE_CSU_PCAP_STATUS_PCAP_WR_IDLE_MASK);
+}
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* XSECURE_HW_H */
diff --git a/src/Xilinx/include/xsecure_rsa.h b/src/Xilinx/include/xsecure_rsa.h
new file mode 100644
index 0000000..0854d3b
--- /dev/null
+++ b/src/Xilinx/include/xsecure_rsa.h
@@ -0,0 +1,194 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 17 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsecure_rsa.h
+* @addtogroup xsecure_rsa_apis XilSecure RSA APIs
+* @{
+* @cond xsecure_internal
+* This file contains hardware interface related information for RSA device
+*
+* This driver supports the following features:
+*
+* - RSA 4096 based decryption
+* - verification/authentication of decrypted data
+*
+* Initialization & Configuration
+*
+* The Rsa driver instance can be initialized
+* in the following way:
+*
+*   - XSecure_RsaInitialize(XSecure_Rsa *InstancePtr, u8* EncText,
+*					u8 *Mod, u8 *ModExt, u8 *ModExpo)
+*
+* The method used for RSA decryption needs precalculated value off R^2 mod N
+* which is generated by bootgen and is present in the signature along with
+* modulus and exponent.
+*
+* @note
+*	-The format of the public key( modulus, exponent and precalculated
+*	 R^2 mod N should be same as specified by the bootgen
+*
+*	-For matching, PKCS paddding scheme has to be applied in the manner
+*	 specified by the bootgen.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date        Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.0   ba   10/10/14 Initial release
+* 2.2   vns  07/06/17 Added doxygen tags
+*       vns  17/08/17 Added APIs XSecure_RsaPublicEncrypt and
+*                     XSecure_RsaPrivateDecrypt.As per functionality
+*                     XSecure_RsaPublicEncrypt is same as XSecure_RsaDecrypt.
+*
+* 

+*
+* @endcond
+******************************************************************************/
+
+#ifndef XSECURE_RSA_H_
+#define XSECURE_RSA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xsecure_hw.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xstatus.h"
+#include "xplatform_info.h"
+/************************** Constant Definitions ****************************/
+/** @cond xsecure_internal
+@{
+*/
+
+#define XSECURE_RSA_4096_KEY_SIZE		(4096/8)	/**< RSA 4096 key size */
+#define XSECURE_RSA_2048_KEY_SIZE		(2048/8)	/**< RSA 2048 key size */
+
+#define XSECURE_RSA_4096_SIZE_WORDS		(128)	/**< RSA 4096 Size in words */
+#define XSECURE_RSA_2048_SIZE_WORDS		(64)	/**< RSA 2048 Size in words */
+
+/** @name Control Register
+ *
+ * The Control register (CR) controls the major functions of the device.
+ * It is used to set the function to be implemented by the RSA device in
+ * the next iteration.
+ *
+ * Control Register Bit Definition
+ */
+#define XSECURE_CSU_RSA_CONTROL_2048	(0xA0U) /**< RSA 2048 Length Code */
+#define XSECURE_CSU_RSA_CONTROL_4096	(0xC0U) /**< RSA 4096 Length Code */
+#define XSECURE_CSU_RSA_CONTROL_DCA	(0x08U) /**< Abort Operation */
+#define XSECURE_CSU_RSA_CONTROL_NOP	(0x00U) /**< No Operation */
+#define XSECURE_CSU_RSA_CONTROL_EXP	(0x01U) /**< Exponentiation Opcode */
+#define XSECURE_CSU_RSA_CONTROL_EXP_PRE	(0x05U) /**< Expo. using R*R mod M */
+#define XSECURE_CSU_RSA_CONTROL_MASK	(XSECURE_CSU_RSA_CONTROL_4096 + \
+					XSECURE_CSU_RSA_CONTROL_EXP_PRE)
+/* @} */
+
+/** @name RSA status Register
+ *
+ * The Status Register(SR) indicates the current state of RSA device.
+ *
+ * Status Register Bit Definition
+ */
+#define XSECURE_CSU_RSA_STATUS_DONE		(0x1U) /**< Operation Done */
+#define XSECURE_CSU_RSA_STATUS_BUSY		(0x2U) /**< RSA busy */
+#define XSECURE_CSU_RSA_STATUS_ERROR	(0x4U) /**< Error */
+#define XSECURE_CSU_RSA_STATUS_PROG_CNT	(0xF8U)  /**< Progress Counter */
+/* @}*/
+
+#define XSECURE_CSU_RSA_RAM_EXPO	(0U) /**< bit for RSA RAM Exponent */
+#define XSECURE_CSU_RSA_RAM_MOD		(1U) /**< bit for RSA RAM modulus */
+#define XSECURE_CSU_RSA_RAM_DIGEST	(2U) /**< bit for RSA RAM Digest */
+#define XSECURE_CSU_RSA_RAM_SPAD	(3U) /**< bit for RSA RAM SPAD */
+#define XSECURE_CSU_RSA_RAM_RES_Y	(4U) /**< bit for RSA RAM Result(Y) */
+#define XSECURE_CSU_RSA_RAM_RES_Q	(5U) /**< bit for RSA RAM Result(Q) */
+
+#define XSECURE_CSU_RSA_RAM_WORDS	(6U) /**< Total Locations in RSA RAM */
+
+#define XSECURE_RSA_FAILED		0x1U /**< RSA Failed Error Code */
+
+#define XSECURE_HASH_TYPE_SHA3		(48U) /**< SHA-3 hash size */
+#define XSECURE_HASH_TYPE_SHA2		(32U)/**< SHA-2 hash size */
+#define XSECURE_FSBL_SIG_SIZE		(512U) /**< FSBL signature size */
+
+#define XSECURE_RSA_SIGN_ENC		0U
+#define XSECURE_RSA_SIGN_DEC		1U
+
+/***************************** Type Definitions ******************************/
+/**
+ * The RSA driver instance data structure. A pointer to an instance data
+ * structure is passed around by functions to refer to a specific driver
+ * instance.
+ */
+typedef struct {
+	u32 BaseAddress; /**< Device Base Address */
+	u8* Mod; /**< Modulus */
+	u8* ModExt; /**< Precalc. R sq. mod N */
+	u8* ModExpo; /**< Exponent */
+	u8 EncDec; /**< 0 for signature verification and 1 for generation */
+	u32 SizeInWords;/** RSA key size in words */
+} XSecure_Rsa;
+/**
+@}
+@endcond */
+/***************************** Function Prototypes ***************************/
+
+/* Initialization */
+s32  XSecure_RsaInitialize(XSecure_Rsa *InstancePtr, u8 *Mod, u8 *ModExt,
+				u8 *ModExpo);
+
+/* RSA Decryption */
+s32 XSecure_RsaDecrypt(XSecure_Rsa *InstancePtr, u8* EncText, u8* Result);
+
+/* RSA Signature Validation, assuming PKCS padding */
+u32 XSecure_RsaSignVerification(u8 *Signature, u8 *Hash, u32 HashLen);
+
+/* XSecure_RsaPublicEncrypt performs same as XSecure_RsaDecrypt API */
+s32 XSecure_RsaPublicEncrypt(XSecure_Rsa *InstancePtr, u8 *Input, u32 Size,
+								u8 *Result);
+
+s32 XSecure_RsaPrivateDecrypt(XSecure_Rsa *InstancePtr, u8 *Input, u32 Size,
+								u8 *Result);
+
+#ifdef __cplusplus
+extern "C" }
+#endif
+
+#endif /* XSECURE_RSA_H_ */
+/* @} */
diff --git a/src/Xilinx/include/xsecure_sha.h b/src/Xilinx/include/xsecure_sha.h
new file mode 100644
index 0000000..b2f98b2
--- /dev/null
+++ b/src/Xilinx/include/xsecure_sha.h
@@ -0,0 +1,150 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 18 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsecure_sha.h
+* @addtogroup xsecure_sha3_apis SHA-3
+* @{
+* @cond xsecure_internal
+* This file Contains the function prototypes, defines and macros for
+* the SHA-384 hardware module.
+*
+* This driver supports the following features:
+*
+* - SHA-3 hash calculation
+*
+* Initialization & Configuration
+*
+* The SHA-3 driver instance can be initialized
+* in the following way:
+*
+*   - XSecure_Sha3Initialize(XSecure_Sha3 *InstancePtr, XCsuDma *CsuDmaPtr)
+*
+* A pointer to CsuDma instance has to be passed in initialization as CSU
+* DMA will be used for data transfers to SHA module.
+*
+*
+* @note
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date        Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  ba   11/05/14 Initial release
+* 2.0   vns  01/28/17 Added API to read SHA3 hash.
+* 2.2   vns  07/06/17 Added doxygen tags
+* 3.0   vns  01/23/18 Added NIST SHA3 support.
+*
+* 

+*
+* @note
+* @endcond
+*
+******************************************************************************/
+#ifndef XSECURE_SHA_H
+#define XSECURE_SHA_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xsecure_hw.h"
+#include "xcsudma.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions ****************************/
+/** @cond xsecure_internal
+@{
+*/
+
+/**
+* CSU SHA3 Memory Map
+*/
+#define XSECURE_CSU_SHA3_START_START	(1U << 0) /**< SHA Start Message */
+
+#define XSECURE_CSU_SHA3_RESET_RESET	(1U << 0) /**< SHA Reset Value */
+
+#define XSECURE_CSU_SHA3_DONE_DONE	(1U << 0) /**< SHA Done */
+
+#define XSECURE_SHA3_BLOCK_LEN		(104U) /**< SHA min block length */
+
+#define XSECURE_SHA3_LAST_PACKET	(0x1U) /**< Last Data Packet */
+
+/***************************** Type Definitions******************************/
+
+/* SHA3 type selection */
+typedef enum {
+	XSECURE_CSU_NIST_SHA3, /**< NIST sha3 */
+	XSECURE_CSU_KECCAK_SHA3 /**< Keccak sha3 */
+}XSecure_Sha3PadType;
+
+/**
+ * The SHA-3 driver instance data structure. A pointer to an instance data
+ * structure is passed around by functions to refer to a specific driver
+ * instance.
+ */
+typedef struct {
+	u32 BaseAddress;  /**< Device Base Address */
+	XCsuDma *CsuDmaPtr; /**< Pointer to CSU DMA Instance */
+	u32 Sha3Len; /**< SHA3 Input Length */
+	XSecure_Sha3PadType Sha3PadType; /** Selection for Sha3 */
+} XSecure_Sha3;
+/**
+@}
+@endcond */
+/***************************** Function Prototypes ***************************/
+/* Initialization */
+s32 XSecure_Sha3Initialize(XSecure_Sha3 *InstancePtr, XCsuDma *CsuDmaPtr);
+
+void XSecure_Sha3Start(XSecure_Sha3 *InstancePtr);
+
+/* Data Transfer */
+void XSecure_Sha3Update(XSecure_Sha3 *InstancePtr, const u8 *Data,
+						const u32 Size);
+void XSecure_Sha3Finish(XSecure_Sha3 *InstancePtr, u8 *Hash);
+
+/* Complete SHA digest calculation */
+void XSecure_Sha3Digest(XSecure_Sha3 *InstancePtr, const u8 *In,
+						const u32 Size, u8 *Out);
+void XSecure_Sha3_ReadHash(XSecure_Sha3 *InstancePtr, u8 *Hash);
+s32 XSecure_Sha3PadSelection(XSecure_Sha3 *InstancePtr,
+		XSecure_Sha3PadType Sha3Type);
+
+#ifdef __cplusplus
+extern "C" }
+#endif
+
+#endif /** XSECURE_SHA_H */
+/* @} */
\ No newline at end of file
diff --git a/src/Xilinx/include/xsecure_sha2.h b/src/Xilinx/include/xsecure_sha2.h
new file mode 100644
index 0000000..79a2afc
--- /dev/null
+++ b/src/Xilinx/include/xsecure_sha2.h
@@ -0,0 +1,171 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 - 17 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsecure_sha2.h
+* @addtogroup xsecure_sha2_apis XilSecure SHA2 APIs
+* @{
+* @cond xsecure_internal
+*
+* This file contains the RSA algorithm functions
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver	Who	Date		Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.2   vns  23/08/16 First release
+* 2.2   vns  07/06/16 Added doxygen tags
+*
+* 

+*
+* @note
+* @endcond
+******************************************************************************/
+#ifndef ___XSECURE_H___
+#define ___XSECURE_H___
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/***************************** Include Files *********************************/
+/** @cond xsecure_internal
+@{
+*/
+#define SHA_BLKSIZE		512
+#define SHA_BLKBYTES	(SHA_BLKSIZE/8)
+#define SHA_BLKWORDS	(SHA_BLKBYTES/4)
+
+#define SHA_VALSIZE		256
+#define SHA_VALBYTES	(SHA_VALSIZE/8)
+#define SHA_VALWORDS	(SHA_VALBYTES/4)
+
+/*
+ * SHA-256 context structure
+ * Includes SHA-256 state, coalescing buffer to collect the processed strings, and
+ * total byte length counter (used both to manage the buffer and for padding)
+ */
+typedef struct
+{
+	unsigned int state[8];
+	unsigned char buffer[SHA_BLKBYTES];
+	unsigned long long bytes;
+} sha2_context;
+/** @}
+@endcond */
+/*
+ * SHA-256 user interfaces
+ */
+/*****************************************************************************/
+/**
+ * @brief
+ * This function calculates the hash for the input data using SHA-256
+ * algorithm. This function internally calls the sha2_init, updates and
+ * finishes functions and updates the result.
+ *
+ * @param   	In 	Char pointer which contains the input data.
+ * @param	Size 	Length of the input data
+ * @param	Out 	Pointer to location where resulting hash will be
+ *		written.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void sha_256(const unsigned char *in, const unsigned int size, unsigned char *out);
+/*****************************************************************************/
+/**
+ * @brief
+ * This function initializes the SHA2 context.
+ *
+ * @param  	ctx 	Pointer to sha2_context structure that stores status and
+ *			buffer.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void sha2_starts(sha2_context *ctx);
+/*****************************************************************************/
+/**
+ * @brief
+ * This function adds the input data to SHA256 calculation.
+ *
+ * @param   	ctx 	Pointer to sha2_context structure that stores status and
+ *			buffer.
+ * @param	input 	Pointer to the data to add.
+ * @param	Out 	Length of the input data.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void sha2_update(sha2_context *ctx, unsigned char* input, unsigned int ilen);
+/*****************************************************************************/
+/**
+ * @brief
+ * This function finishes the SHA calculation.
+ *
+ * @param   	ctx 	Pointer to sha2_context structure that stores status and
+ * 			buffer.
+ * @param	output 	Pointer to the calculated hash data.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void sha2_finish(sha2_context *ctx, unsigned char* output);
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function reads the SHA2 hash, it can be called intermediately of
+ * updates to read the SHA2 hash.
+ *
+ * @param   	ctx 	Pointer to sha2_context structure that stores status and
+ * 			buffer.
+ * @param	output 	Pointer to the calculated hash data.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void sha2_hash(sha2_context *ctx, unsigned char *output);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ___XSECURE_H___ */
+/** @} */
\ No newline at end of file
diff --git a/src/Xilinx/include/xstatus.h b/src/Xilinx/include/xstatus.h
new file mode 100644
index 0000000..9937475
--- /dev/null
+++ b/src/Xilinx/include/xstatus.h
@@ -0,0 +1,535 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xstatus.h
+*
+* @addtogroup common_status_codes Xilinx® software status codes
+*
+* The xstatus.h file contains the Xilinx® software status codes.These codes are
+* used throughout the Xilinx device drivers.
+*
+* @{
+******************************************************************************/
+
+#ifndef XSTATUS_H		/* prevent circular inclusions */
+#define XSTATUS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/*********************** Common statuses 0 - 500 *****************************/
+/**
+@name Common Status Codes for All Device Drivers
+@{
+*/
+#define XST_SUCCESS                     0L
+#define XST_FAILURE                     1L
+#define XST_DEVICE_NOT_FOUND            2L
+#define XST_DEVICE_BLOCK_NOT_FOUND      3L
+#define XST_INVALID_VERSION             4L
+#define XST_DEVICE_IS_STARTED           5L
+#define XST_DEVICE_IS_STOPPED           6L
+#define XST_FIFO_ERROR                  7L	/*!< An error occurred during an
+						   operation with a FIFO such as
+						   an underrun or overrun, this
+						   error requires the device to
+						   be reset */
+#define XST_RESET_ERROR                 8L	/*!< An error occurred which requires
+						   the device to be reset */
+#define XST_DMA_ERROR                   9L	/*!< A DMA error occurred, this error
+						   typically requires the device
+						   using the DMA to be reset */
+#define XST_NOT_POLLED                  10L	/*!< The device is not configured for
+						   polled mode operation */
+#define XST_FIFO_NO_ROOM                11L	/*!< A FIFO did not have room to put
+						   the specified data into */
+#define XST_BUFFER_TOO_SMALL            12L	/*!< The buffer is not large enough
+						   to hold the expected data */
+#define XST_NO_DATA                     13L	/*!< There was no data available */
+#define XST_REGISTER_ERROR              14L	/*!< A register did not contain the
+						   expected value */
+#define XST_INVALID_PARAM               15L	/*!< An invalid parameter was passed
+						   into the function */
+#define XST_NOT_SGDMA                   16L	/*!< The device is not configured for
+						   scatter-gather DMA operation */
+#define XST_LOOPBACK_ERROR              17L	/*!< A loopback test failed */
+#define XST_NO_CALLBACK                 18L	/*!< A callback has not yet been
+						   registered */
+#define XST_NO_FEATURE                  19L	/*!< Device is not configured with
+						   the requested feature */
+#define XST_NOT_INTERRUPT               20L	/*!< Device is not configured for
+						   interrupt mode operation */
+#define XST_DEVICE_BUSY                 21L	/*!< Device is busy */
+#define XST_ERROR_COUNT_MAX             22L	/*!< The error counters of a device
+						   have maxed out */
+#define XST_IS_STARTED                  23L	/*!< Used when part of device is
+						   already started i.e.
+						   sub channel */
+#define XST_IS_STOPPED                  24L	/*!< Used when part of device is
+						   already stopped i.e.
+						   sub channel */
+#define XST_DATA_LOST                   26L	/*!< Driver defined error */
+#define XST_RECV_ERROR                  27L	/*!< Generic receive error */
+#define XST_SEND_ERROR                  28L	/*!< Generic transmit error */
+#define XST_NOT_ENABLED                 29L	/*!< A requested service is not
+						   available because it has not
+						   been enabled */
+/** @} */
+/***************** Utility Component statuses 401 - 500  *********************/
+/**
+@name Utility Component Status Codes 401 - 500
+@{
+*/
+#define XST_MEMTEST_FAILED              401L	/*!< Memory test failed */
+
+/** @} */
+/***************** Common Components statuses 501 - 1000 *********************/
+/**
+@name Packet Fifo Status Codes 501 - 510
+@{
+*/
+/********************* Packet Fifo statuses 501 - 510 ************************/
+
+#define XST_PFIFO_LACK_OF_DATA          501L	/*!< Not enough data in FIFO   */
+#define XST_PFIFO_NO_ROOM               502L	/*!< Not enough room in FIFO   */
+#define XST_PFIFO_BAD_REG_VALUE         503L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_PFIFO_ERROR                 504L	/*!< Generic packet FIFO error */
+#define XST_PFIFO_DEADLOCK              505L	/*!< Packet FIFO is reporting
+						 * empty and full simultaneously
+						 */
+/** @} */
+/**
+@name DMA Status Codes 511 - 530
+@{
+*/
+/************************** DMA statuses 511 - 530 ***************************/
+
+#define XST_DMA_TRANSFER_ERROR          511L	/*!< Self test, DMA transfer
+						   failed */
+#define XST_DMA_RESET_REGISTER_ERROR    512L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_DMA_SG_LIST_EMPTY           513L	/*!< Scatter gather list contains
+						   no buffer descriptors ready
+						   to be processed */
+#define XST_DMA_SG_IS_STARTED           514L	/*!< Scatter gather not stopped */
+#define XST_DMA_SG_IS_STOPPED           515L	/*!< Scatter gather not running */
+#define XST_DMA_SG_LIST_FULL            517L	/*!< All the buffer desciptors of
+						   the scatter gather list are
+						   being used */
+#define XST_DMA_SG_BD_LOCKED            518L	/*!< The scatter gather buffer
+						   descriptor which is to be
+						   copied over in the scatter
+						   list is locked */
+#define XST_DMA_SG_NOTHING_TO_COMMIT    519L	/*!< No buffer descriptors have been
+						   put into the scatter gather
+						   list to be commited */
+#define XST_DMA_SG_COUNT_EXCEEDED       521L	/*!< The packet count threshold
+						   specified was larger than the
+						   total # of buffer descriptors
+						   in the scatter gather list */
+#define XST_DMA_SG_LIST_EXISTS          522L	/*!< The scatter gather list has
+						   already been created */
+#define XST_DMA_SG_NO_LIST              523L	/*!< No scatter gather list has
+						   been created */
+#define XST_DMA_SG_BD_NOT_COMMITTED     524L	/*!< The buffer descriptor which was
+						   being started was not committed
+						   to the list */
+#define XST_DMA_SG_NO_DATA              525L	/*!< The buffer descriptor to start
+						   has already been used by the
+						   hardware so it can't be reused
+						 */
+#define XST_DMA_SG_LIST_ERROR           526L	/*!< General purpose list access
+						   error */
+#define XST_DMA_BD_ERROR                527L	/*!< General buffer descriptor
+						   error */
+/** @} */
+/**
+@name IPIF Status Codes Codes 531 - 550
+@{
+*/
+/************************** IPIF statuses 531 - 550 ***************************/
+
+#define XST_IPIF_REG_WIDTH_ERROR        531L	/*!< An invalid register width
+						   was passed into the function */
+#define XST_IPIF_RESET_REGISTER_ERROR   532L	/*!< The value of a register at
+						   reset was not valid */
+#define XST_IPIF_DEVICE_STATUS_ERROR    533L	/*!< A write to the device interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_DEVICE_ACK_ERROR       534L	/*!< The device interrupt status
+						   register did not reset when
+						   acked */
+#define XST_IPIF_DEVICE_ENABLE_ERROR    535L	/*!< The device interrupt enable
+						   register was not updated when
+						   other registers changed */
+#define XST_IPIF_IP_STATUS_ERROR        536L	/*!< A write to the IP interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_IP_ACK_ERROR           537L	/*!< The IP interrupt status register
+						   did not reset when acked */
+#define XST_IPIF_IP_ENABLE_ERROR        538L	/*!< IP interrupt enable register was
+						   not updated correctly when other
+						   registers changed */
+#define XST_IPIF_DEVICE_PENDING_ERROR   539L	/*!< The device interrupt pending
+						   register did not indicate the
+						   expected value */
+#define XST_IPIF_DEVICE_ID_ERROR        540L	/*!< The device interrupt ID register
+						   did not indicate the expected
+						   value */
+#define XST_IPIF_ERROR                  541L	/*!< Generic ipif error */
+/** @} */
+
+/****************** Device specific statuses 1001 - 4095 *********************/
+/**
+@name Ethernet Status Codes 1001 - 1050
+@{
+*/
+/********************* Ethernet statuses 1001 - 1050 *************************/
+
+#define XST_EMAC_MEMORY_SIZE_ERROR  1001L	/*!< Memory space is not big enough
+						 * to hold the minimum number of
+						 * buffers or descriptors */
+#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L	/*!< Memory allocation failed */
+#define XST_EMAC_MII_READ_ERROR     1003L	/*!< MII read error */
+#define XST_EMAC_MII_BUSY           1004L	/*!< An MII operation is in progress */
+#define XST_EMAC_OUT_OF_BUFFERS     1005L	/*!< Driver is out of buffers */
+#define XST_EMAC_PARSE_ERROR        1006L	/*!< Invalid driver init string */
+#define XST_EMAC_COLLISION_ERROR    1007L	/*!< Excess deferral or late
+						 * collision on polled send */
+/** @} */
+/**
+@name UART Status Codes 1051 - 1075
+@{
+*/
+/*********************** UART statuses 1051 - 1075 ***************************/
+#define XST_UART
+
+#define XST_UART_INIT_ERROR         1051L
+#define XST_UART_START_ERROR        1052L
+#define XST_UART_CONFIG_ERROR       1053L
+#define XST_UART_TEST_FAIL          1054L
+#define XST_UART_BAUD_ERROR         1055L
+#define XST_UART_BAUD_RANGE         1056L
+
+/** @} */
+/**
+@name IIC Status Codes 1076 - 1100
+@{
+*/
+/************************ IIC statuses 1076 - 1100 ***************************/
+
+#define XST_IIC_SELFTEST_FAILED         1076	/*!< self test failed            */
+#define XST_IIC_BUS_BUSY                1077	/*!< bus found busy              */
+#define XST_IIC_GENERAL_CALL_ADDRESS    1078	/*!< mastersend attempted with   */
+					     /* general call address        */
+#define XST_IIC_STAND_REG_RESET_ERROR   1079	/*!< A non parameterizable reg   */
+					     /* value after reset not valid */
+#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080	/*!< Tx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081	/*!< Rx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_TBA_REG_RESET_ERROR     1082	/*!< 10 bit addr incl in design  */
+					     /* value after reset not valid */
+#define XST_IIC_CR_READBACK_ERROR       1083	/*!< Read of the control register */
+					     /* didn't return value written */
+#define XST_IIC_DTR_READBACK_ERROR      1084	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_DRR_READBACK_ERROR      1085	/*!< Read of the data Receive reg */
+					     /* didn't return value written */
+#define XST_IIC_ADR_READBACK_ERROR      1086	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_TBA_READBACK_ERROR      1087	/*!< Read of the 10 bit addr reg */
+					     /* didn't return written value */
+#define XST_IIC_NOT_SLAVE               1088	/*!< The device isn't a slave    */
+/** @} */
+/**
+@name ATMC Status Codes 1101 - 1125
+@{
+*/
+/*********************** ATMC statuses 1101 - 1125 ***************************/
+
+#define XST_ATMC_ERROR_COUNT_MAX    1101L	/*!< the error counters in the ATM
+						   controller hit the max value
+						   which requires the statistics
+						   to be cleared */
+/** @} */
+/**
+@name Flash Status Codes 1126 - 1150
+@{
+*/
+/*********************** Flash statuses 1126 - 1150 **************************/
+
+#define XST_FLASH_BUSY                1126L	/*!< Flash is erasing or programming
+						 */
+#define XST_FLASH_READY               1127L	/*!< Flash is ready for commands */
+#define XST_FLASH_ERROR               1128L	/*!< Flash had detected an internal
+						   error. Use XFlash_DeviceControl
+						   to retrieve device specific codes
+						 */
+#define XST_FLASH_ERASE_SUSPENDED     1129L	/*!< Flash is in suspended erase state
+						 */
+#define XST_FLASH_WRITE_SUSPENDED     1130L	/*!< Flash is in suspended write state
+						 */
+#define XST_FLASH_PART_NOT_SUPPORTED  1131L	/*!< Flash type not supported by
+						   driver */
+#define XST_FLASH_NOT_SUPPORTED       1132L	/*!< Operation not supported */
+#define XST_FLASH_TOO_MANY_REGIONS    1133L	/*!< Too many erase regions */
+#define XST_FLASH_TIMEOUT_ERROR       1134L	/*!< Programming or erase operation
+						   aborted due to a timeout */
+#define XST_FLASH_ADDRESS_ERROR       1135L	/*!< Accessed flash outside its
+						   addressible range */
+#define XST_FLASH_ALIGNMENT_ERROR     1136L	/*!< Write alignment error */
+#define XST_FLASH_BLOCKING_CALL_ERROR 1137L	/*!< Couldn't return immediately from
+						   write/erase function with
+						   XFL_NON_BLOCKING_WRITE/ERASE
+						   option cleared */
+#define XST_FLASH_CFI_QUERY_ERROR     1138L	/*!< Failed to query the device */
+/** @} */
+/**
+@name SPI Status Codes 1151 - 1175
+@{
+*/
+/*********************** SPI statuses 1151 - 1175 ****************************/
+
+#define XST_SPI_MODE_FAULT          1151	/*!< master was selected as slave */
+#define XST_SPI_TRANSFER_DONE       1152	/*!< data transfer is complete */
+#define XST_SPI_TRANSMIT_UNDERRUN   1153	/*!< slave underruns transmit register */
+#define XST_SPI_RECEIVE_OVERRUN     1154	/*!< device overruns receive register */
+#define XST_SPI_NO_SLAVE            1155	/*!< no slave has been selected yet */
+#define XST_SPI_TOO_MANY_SLAVES     1156	/*!< more than one slave is being
+						 * selected */
+#define XST_SPI_NOT_MASTER          1157	/*!< operation is valid only as master */
+#define XST_SPI_SLAVE_ONLY          1158	/*!< device is configured as slave-only
+						 */
+#define XST_SPI_SLAVE_MODE_FAULT    1159	/*!< slave was selected while disabled */
+#define XST_SPI_SLAVE_MODE          1160	/*!< device has been addressed as slave */
+#define XST_SPI_RECEIVE_NOT_EMPTY   1161	/*!< device received data in slave mode */
+
+#define XST_SPI_COMMAND_ERROR       1162	/*!< unrecognised command - qspi only */
+#define XST_SPI_POLL_DONE           1163        /*!< controller completed polling the
+						   device for status */
+/** @} */
+/**
+@name OPB Arbiter Status Codes 1176 - 1200
+@{
+*/
+/********************** OPB Arbiter statuses 1176 - 1200 *********************/
+
+#define XST_OPBARB_INVALID_PRIORITY  1176	/*!< the priority registers have either
+						 * one master assigned to two or more
+						 * priorities, or one master not
+						 * assigned to any priority
+						 */
+#define XST_OPBARB_NOT_SUSPENDED     1177	/*!< an attempt was made to modify the
+						 * priority levels without first
+						 * suspending the use of priority
+						 * levels
+						 */
+#define XST_OPBARB_PARK_NOT_ENABLED  1178	/*!< bus parking by id was enabled but
+						 * bus parking was not enabled
+						 */
+#define XST_OPBARB_NOT_FIXED_PRIORITY 1179	/*!< the arbiter must be in fixed
+						 * priority mode to allow the
+						 * priorities to be changed
+						 */
+/** @} */
+/**
+@name INTC Status Codes 1201 - 1225
+@{
+*/
+/************************ Intc statuses 1201 - 1225 **************************/
+
+#define XST_INTC_FAIL_SELFTEST      1201	/*!< self test failed */
+#define XST_INTC_CONNECT_ERROR      1202	/*!< interrupt already in use */
+/** @} */
+/**
+@name TmrCtr Status Codes 1226 - 1250
+@{
+*/
+/********************** TmrCtr statuses 1226 - 1250 **************************/
+
+#define XST_TMRCTR_TIMER_FAILED     1226	/*!< self test failed */
+/** @} */
+/**
+@name WdtTb Status Codes 1251 - 1275
+@{
+*/
+/********************** WdtTb statuses 1251 - 1275 ***************************/
+
+#define XST_WDTTB_TIMER_FAILED      1251L
+/** @} */
+/**
+@name PlbArb status Codes 1276 - 1300
+@{
+*/
+/********************** PlbArb statuses 1276 - 1300 **************************/
+
+#define XST_PLBARB_FAIL_SELFTEST    1276L
+/** @} */
+/**
+@name Plb2Opb Status Codes 1301 - 1325
+@{
+*/
+/********************** Plb2Opb statuses 1301 - 1325 *************************/
+
+#define XST_PLB2OPB_FAIL_SELFTEST   1301L
+/** @} */
+/**
+@name Opb2Plb Status 1326 - 1350
+@{
+*/
+/********************** Opb2Plb statuses 1326 - 1350 *************************/
+
+#define XST_OPB2PLB_FAIL_SELFTEST   1326L
+/** @} */
+/**
+@name SysAce Status Codes 1351 - 1360
+@{
+*/
+/********************** SysAce statuses 1351 - 1360 **************************/
+
+#define XST_SYSACE_NO_LOCK          1351L	/*!< No MPU lock has been granted */
+/** @} */
+/**
+@name PCI Bridge Status Codes 1361 - 1375
+@{
+*/
+/********************** PCI Bridge statuses 1361 - 1375 **********************/
+
+#define XST_PCI_INVALID_ADDRESS     1361L
+/** @} */
+/**
+@name FlexRay Constants 1400 - 1409
+@{
+*/
+/********************** FlexRay constants 1400 - 1409 *************************/
+
+#define XST_FR_TX_ERROR			1400
+#define XST_FR_TX_BUSY			1401
+#define XST_FR_BUF_LOCKED		1402
+#define XST_FR_NO_BUF			1403
+/** @} */
+/**
+@name USB constants 1410 - 1420
+@{
+*/
+/****************** USB constants 1410 - 1420  *******************************/
+
+#define XST_USB_ALREADY_CONFIGURED	1410
+#define XST_USB_BUF_ALIGN_ERROR		1411
+#define XST_USB_NO_DESC_AVAILABLE	1412
+#define XST_USB_BUF_TOO_BIG		1413
+#define XST_USB_NO_BUF			1414
+/** @} */
+/**
+@name HWICAP constants 1421 - 1429
+@{
+*/
+/****************** HWICAP constants 1421 - 1429  *****************************/
+
+#define XST_HWICAP_WRITE_DONE		1421
+
+/** @} */
+/**
+@name AXI VDMA constants 1430 - 1440
+@{
+*/
+/****************** AXI VDMA constants 1430 - 1440  *****************************/
+
+#define XST_VDMA_MISMATCH_ERROR		1430
+/** @} */
+/**
+@name NAND Flash Status Codes 1441 - 1459
+@{
+*/
+/*********************** NAND Flash statuses 1441 - 1459  *********************/
+
+#define XST_NAND_BUSY			1441L	/*!< Flash is erasing or
+						 * programming
+						 */
+#define XST_NAND_READY			1442L	/*!< Flash is ready for commands
+						 */
+#define XST_NAND_ERROR			1443L	/*!< Flash had detected an
+						 * internal error.
+						 */
+#define XST_NAND_PART_NOT_SUPPORTED	1444L	/*!< Flash type not supported by
+						 * driver
+						 */
+#define XST_NAND_OPT_NOT_SUPPORTED	1445L	/*!< Operation not supported
+						 */
+#define XST_NAND_TIMEOUT_ERROR		1446L	/*!< Programming or erase
+						 * operation aborted due to a
+						 * timeout
+						 */
+#define XST_NAND_ADDRESS_ERROR		1447L	/*!< Accessed flash outside its
+						 * addressible range
+						 */
+#define XST_NAND_ALIGNMENT_ERROR	1448L	/*!< Write alignment error
+						 */
+#define XST_NAND_PARAM_PAGE_ERROR	1449L	/*!< Failed to read parameter
+						 * page of the device
+						 */
+#define XST_NAND_CACHE_ERROR		1450L	/*!< Flash page buffer error
+						 */
+
+#define XST_NAND_WRITE_PROTECTED	1451L	/*!< Flash is write protected
+						 */
+/** @} */
+
+/**************************** Type Definitions *******************************/
+
+typedef s32 XStatus;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_status_codes".
+*/
diff --git a/src/Xilinx/include/xsysmonpsu.h b/src/Xilinx/include/xsysmonpsu.h
new file mode 100644
index 0000000..8fcaa19
--- /dev/null
+++ b/src/Xilinx/include/xsysmonpsu.h
@@ -0,0 +1,677 @@
+/******************************************************************************
+*
+* Copyright (C) 2016-2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xsysmonpsu.h
+*
+* The XSysMon driver supports the Xilinx System Monitor device.
+*
+* The System Monitor device has the following features:
+*	- PL Sysmon instance has 10-bit, 200-KSPS (kilo samples per second)
+*		Analog-to-Digital Converter (ADC)
+*	- PS Sysmon instance has 10-bit, 1000-KSPS ADC.
+*	- Monitoring of on-chip supply voltages and temperature
+*	- 1 dedicated differential analog-input pair and
+*	  16 auxiliary differential analog-input pairs
+*	- Automatic alarms based on user defined limits for the on-chip
+*	  supply voltages and temperature
+*	- Automatic Channel Sequencer, programmable averaging, programmable
+*	  acquisition time for the external inputs, unipolar or differential
+*	  input selection for the external inputs
+*	- Inbuilt Calibration
+*	- Optional interrupt request generation
+*	- External Mux
+*
+*
+* The user should refer to the hardware device specification for detailed
+* information about the device.
+*
+* This header file contains the prototypes of driver functions that can
+* be used to access the System Monitor device.
+*
+*
+*  System Monitor Channel Sequencer Modes 
+*
+* The  System Monitor Channel Sequencer supports the following operating modes:
+*
+*   -  Default : This is the default mode after power up.
+*		In this mode of operation the System Monitor operates in
+*		a sequence mode, monitoring the on chip sensors:
+*		Temperature, VCCINT, and VCCAUX.
+*   -  One pass through sequence : In this mode the System Monitor
+*		converts the channels enabled in the Sequencer Channel Enable
+*		registers for a single pass and then stops.
+*   -  Continuous cycling of sequence : In this mode the System Monitor
+*		converts the channels enabled in the Sequencer Channel Enable
+*		registers continuously.
+*   -  Single channel mode: In this mode the System Monitor Channel
+*		Sequencer is disabled and the System Monitor operates in a
+*		Single Channel Mode.
+*		The System Monitor can operate either in a Continuous or Event
+*		driven sampling mode in the single channel mode.
+*
+*
+*  Initialization and Configuration 
+*
+* The device driver enables higher layer software (e.g., an application) to
+* communicate to the System Monitor device.
+*
+* XSysMonPsu_CfgInitialize() API is used to initialize the System Monitor
+* device. The user needs to first call the XSysMonPsu_LookupConfig() API which
+* returns the Configuration structure pointer which is passed as a parameter to
+* the XSysMonPsu_CfgInitialize() API.
+*
+*
+* Interrupts
+*
+* The System Monitor device supports interrupt driven mode and the default
+* operation mode is polling mode.
+*
+* This driver does not provide a Interrupt Service Routine (ISR) for the device.
+* It is the responsibility of the application to provide one if needed. Refer to
+* the interrupt example provided with this driver for details on using the
+* device in interrupt mode.
+*
+*
+*  Virtual Memory 
+*
+* This driver supports Virtual Memory. The RTOS is responsible for calculating
+* the correct device base address in Virtual Memory space.
+*
+*
+*  Threads 
+*
+* This driver is not thread safe. Any needs for threads or thread mutual
+* exclusion must be satisfied by the layer above this driver.
+*
+*
+*  Asserts 
+*
+* Asserts are used within all Xilinx drivers to enforce constraints on argument
+* values. Asserts can be turned off on a system-wide basis by defining, at
+* compile time, the NDEBUG identifier. By default, asserts are turned on and it
+* is recommended that users leave asserts on during development.
+*
+*
+*  Building the driver 
+*
+* The XSysMonPsu driver is composed of several source files. This allows the user
+* to build and link only those parts of the driver that are necessary.
+*
+*
+*  Limitations of the driver 
+*
+* System Monitor device can be accessed through the JTAG port and the AXI
+* interface. The driver implementation does not support the simultaneous access
+* of the device by both these interfaces. The user has to take care of this
+* situation in the user application code.
+*
+*
+*
+* 


+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00  kvn    12/15/15 First release
+*              02/15/16 Corrected Assert function call in
+*                       XSysMonPsu_GetMonitorStatus API.
+*              03/03/16 Added Temperature remote channel for Setsingle
+*                       channel API. Also corrected external mux channel
+*                       numbers.
+* 1.1   kvn    05/05/16 Modified code for MISRA-C:2012 Compliance.
+* 2.0   vns    08/14/16 Fixed CR #956780, added support for enabling/disabling
+*                       SEQ_CH2 and SEQ_AVG2 registers, modified function
+*                       prototypes of XSysMonPsu_GetSeqAvgEnables,
+*                       XSysMonPsu_SetSeqAvgEnables, XSysMonPsu_SetSeqChEnables,
+*                       XSysMonPsu_GetSeqChEnables,
+*                       XSysMonPsu_SetSeqInputMode, XSysMonPsu_GetSeqInputMode,
+*                       XSysMonPsu_SetSeqAcqTime
+*                       and XSysMonPsu_GetSeqAcqTime to provide support for
+*                       set/get 64 bit value.
+*                       Added constants XSM_CFR_ALM_SUPPLY*(8-31)_MASKs to
+*                       provide support for enabling extra PS alarams.
+* 2.1   sk     03/03/16 Check for PL reset before doing PL Sysmon reset.
+*       ms     03/17/17 Added readme.txt file in examples folder for doxygen
+*                       generation.
+*       ms     04/05/17 Modified Comment lines in functions of sysmonpsu
+*                       examples to recognize it as documentation block
+*                       for doxygen generation.
+* 2.2   sk     04/14/17 Corrected temperature conversion formulas.
+* 2.3   mn     12/11/17 Added missing closing bracket error when C++ is used
+*       mn     12/12/17 Added Conversion Support for voltages having Range of
+*                       1 Volt
+*       mn     12/13/17 Correct the AMS block channel numbers
+*       ms     12/15/17 Added peripheral test support.
+*       ms     01/04/18 Provided conditional checks for interrupt example
+*                       in sysmonpsu_header.h
+*       mn     03/08/18 Update Clock Divisor to the proper value
+*
+* 

+*
+******************************************************************************/
+
+
+#ifndef XSYSMONPSU_H_			/* prevent circular inclusions */
+#define XSYSMONPSU_H_			/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xsysmonpsu_hw.h"
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+/**
+ * @name Indexes for the different channels.
+ * @{
+ */
+#define XSM_CH_TEMP 		0x0U  /**< On Chip Temperature */
+#define XSM_CH_SUPPLY1		0x1U  /**< SUPPLY1 VCC_PSINTLP */
+#define XSM_CH_SUPPLY2		0x2U  /**< SUPPLY2 VCC_PSINTFP */
+#define XSM_CH_VPVN 		0x3U  /**< VP/VN Dedicated analog inputs */
+#define XSM_CH_VREFP		0x4U  /**< VREFP */
+#define XSM_CH_VREFN		0x5U  /**< VREFN */
+#define XSM_CH_SUPPLY3		0x6U  /**< SUPPLY3 VCC_PSAUX */
+#define XSM_CH_SUPPLY_CALIB	0x08U /**< Supply Calib Data Reg */
+#define XSM_CH_ADC_CALIB	0x09U /**< ADC Offset Channel Reg */
+#define XSM_CH_GAINERR_CALIB 	0x0AU /**< Gain Error Channel Reg  */
+#define XSM_CH_SUPPLY4		0x0DU /**< SUPPLY4 VCC_PSDDR_504 */
+#define XSM_CH_SUPPLY5		0x0EU /**< SUPPLY5 VCC_PSIO3_503 */
+#define XSM_CH_SUPPLY6		0x0FU /**< SUPPLY6 VCC_PSIO0_500 */
+#define XSM_CH_AUX_MIN		16U   /**< Channel number for 1st Aux Channel */
+#define XSM_CH_AUX_MAX		31U   /**< Channel number for Last Aux channel */
+#define XSM_CH_SUPPLY7      32U   /**< SUPPLY7 VCC_PSIO1_501 */
+#define XSM_CH_SUPPLY8      33U   /**< SUPPLY8 VCC_PSIO2_502 */
+#define XSM_CH_SUPPLY9      34U   /**< SUPPLY9 PS_MGTRAVCC */
+#define XSM_CH_SUPPLY10     35U   /**< SUPPLY10 PS_MGTRAVTT */
+#define XSM_CH_VCCAMS       36U   /**< VCCAMS */
+#define XSM_CH_TEMP_REMTE   37U   /**< Temperature Remote */
+#define XSM_CH_VCC_PSLL0    48U   /**< VCC_PSLL0 */
+#define XSM_CH_VCC_PSLL3    51U   /**< VCC_PSLL3 */
+#define XSM_CH_VCCINT       54U   /**< VCCINT */
+#define XSM_CH_VCCBRAM      55U   /**< VCCBRAM */
+#define XSM_CH_VCCAUX       56U   /**< VCCAUX */
+#define XSM_CH_VCC_PSDDRPLL 57U   /**< VCC_PSDDRPLL */
+#define XSM_CH_DDRPHY_VREF  58U   /**< DDRPHY_VREF */
+#define XSM_CH_RESERVE1     63U   /**< PSGT_AT0 */
+
+/*@}*/
+
+/**
+ * @name Indexes for reading the Calibration Coefficient Data.
+ * @{
+ */
+#define XSM_CALIB_SUPPLY_OFFSET_COEFF 0U /**< Supply Offset Calib Coefficient */
+#define XSM_CALIB_ADC_OFFSET_COEFF    1U /**< ADC Offset Calib Coefficient */
+#define XSM_CALIB_GAIN_ERROR_COEFF    2U /**< Gain Error Calib Coefficient*/
+
+/*@}*/
+
+/**
+ * @name Indexes for reading the Minimum/Maximum Measurement Data.
+ * @{
+ */
+#define XSM_MAX_TEMP		0U    /**< Maximum Temperature Data */
+#define XSM_MAX_SUPPLY1		1U    /**< Maximum SUPPLY1 Data */
+#define XSM_MAX_SUPPLY2		2U    /**< Maximum SUPPLY2 Data */
+#define XSM_MAX_SUPPLY3		3U    /**< Maximum SUPPLY3 Data */
+#define XSM_MIN_TEMP		4U    /**< Minimum Temperature Data */
+#define XSM_MIN_SUPPLY1		5U    /**< Minimum SUPPLY1 Data */
+#define XSM_MIN_SUPPLY2     6U    /**< Minimum SUPPLY2 Data */
+#define XSM_MIN_SUPPLY3     7U    /**< Minimum SUPPLY3 Data */
+#define XSM_MAX_SUPPLY4		8U    /**< Maximum SUPPLY4 Data */
+#define XSM_MAX_SUPPLY5		9U    /**< Maximum SUPPLY5 Data */
+#define XSM_MAX_SUPPLY6		0xAU  /**< Maximum SUPPLY6 Data */
+#define XSM_MIN_SUPPLY4     0xCU  /**< Minimum SUPPLY4 Data */
+#define XSM_MIN_SUPPLY5     0xDU  /**< Minimum SUPPLY5 Data */
+#define XSM_MIN_SUPPLY6     0xEU  /**< Minimum SUPPLY6 Data */
+#define XSM_MAX_SUPPLY7		0x80U  /**< Maximum SUPPLY7 Data */
+#define XSM_MAX_SUPPLY8		0x81U  /**< Maximum SUPPLY8 Data */
+#define XSM_MAX_SUPPLY9		0x82U  /**< Maximum SUPPLY9 Data */
+#define XSM_MAX_SUPPLY10	0x83U  /**< Maximum SUPPLY10 Data */
+#define XSM_MAX_VCCAMS  	0x84U  /**< Maximum VCCAMS Data */
+#define XSM_MAX_TEMP_REMOTE  	0x85U  /**< Maximum Remote Temperature Data */
+#define XSM_MIN_SUPPLY7     0x88U  /**< Minimum SUPPLY7 Data */
+#define XSM_MIN_SUPPLY8     0x89U  /**< Minimum SUPPLY8 Data */
+#define XSM_MIN_SUPPLY9     0x8AU  /**< Minimum SUPPLY9 Data */
+#define XSM_MIN_SUPPLY10    0x8BU  /**< Minimum SUPPLY10 Data */
+#define XSM_MIN_VCCAMS      0x8CU  /**< Minimum VCCAMS Data */
+#define XSM_MIN_TEMP_REMOTE     0x8DU  /**< Minimum Remote Temperature Data */
+
+/*@}*/
+
+/**
+ * @name Averaging to be done for the channels.
+ * @{
+ */
+#define XSM_AVG_0_SAMPLES	0U /**< No Averaging */
+#define XSM_AVG_16_SAMPLES	1U /**< Average 16 samples */
+#define XSM_AVG_64_SAMPLES	2U /**< Average 64 samples */
+#define XSM_AVG_256_SAMPLES	3U /**< Average 256 samples */
+
+/*@}*/
+
+/**
+ * @name Channel Sequencer Modes of operation.
+ * @{
+ */
+#define XSM_SEQ_MODE_SAFE	 0U /**< Default Safe Mode */
+#define XSM_SEQ_MODE_ONEPASS	 1U /**< Onepass through Sequencer */
+#define XSM_SEQ_MODE_CONTINPASS	 2U /**< Continuous Cycling Seqquencer */
+#define XSM_SEQ_MODE_SINGCHAN	 3U /**< Single channel - No Sequencing */
+#define XSM_SEQ_MODE_OYLMPUS	 6U /**< Olympus mode */
+
+/*@}*/
+
+/**
+ * @name Clock Divisor values range.
+ * @{
+ */
+#define XSM_CLK_DIV_MIN	 0U /**< Minimum Clock Divisor value */
+#define XSM_CLK_DIV_MAX	 255U /**< Maximum Clock Divisor value */
+
+/*@}*/
+
+/**
+ * @name Alarm Threshold(Limit) Register (ATR) indexes.
+ * @{
+ */
+#define XSM_ATR_TEMP_UPPER	 0U   /**< High user Temperature limit */
+#define XSM_ATR_SUP1_UPPER	 1U   /**< Supply1 high voltage limit */
+#define XSM_ATR_SUP2_UPPER	 2U   /**< Supply2 high voltage limit */
+#define XSM_ATR_OT_UPPER	 3U   /**< Upper Over Temperature limit */
+#define XSM_ATR_TEMP_LOWER	 4U   /**< Low user Temperature */
+#define XSM_ATR_SUP1_LOWER	 5U   /**< Suuply1 low voltage limit */
+#define XSM_ATR_SUP2_LOWER	 6U   /**< Supply2 low voltage limit */
+#define XSM_ATR_OT_LOWER	 7U   /**< Lower Over Temperature limit */
+#define XSM_ATR_SUP3_UPPER	 8U   /**< Supply3 high voltage limit */
+#define XSM_ATR_SUP4_UPPER 	 9U   /**< Supply4 high voltage limit */
+#define XSM_ATR_SUP5_UPPER 	 0xAU /**< Supply5 high voltage limit */
+#define XSM_ATR_SUP6_UPPER 	 0xBU /**< Supply6 high voltage limit */
+#define XSM_ATR_SUP3_LOWER	 0xCU /**< Supply3 low voltage limit */
+#define XSM_ATR_SUP4_LOWER 	 0xDU /**< Supply4 low voltage limit */
+#define XSM_ATR_SUP5_LOWER 	 0xEU /**< Supply5 low voltage limit */
+#define XSM_ATR_SUP6_LOWER 	 0xFU /**< Supply6 low voltage limit */
+#define XSM_ATR_SUP7_UPPER	 0x10U /**< Supply7 high voltage limit */
+#define XSM_ATR_SUP8_UPPER	 0x11U /**< Supply8 high voltage limit */
+#define XSM_ATR_SUP9_UPPER	 0x12U /**< Supply9 high voltage limit */
+#define XSM_ATR_SUP10_UPPER	 0x13U /**< Supply10 high voltage limit */
+#define XSM_ATR_VCCAMS_UPPER	 0x14U /**< VCCAMS high voltage limit */
+#define XSM_ATR_TEMP_RMTE_UPPER	 0x15U /**< High remote Temperature limit */
+#define XSM_ATR_SUP7_LOWER	 0x18U /**< Supply7 low voltage limit */
+#define XSM_ATR_SUP8_LOWER	 0x19U /**< Supply8 low voltage limit */
+#define XSM_ATR_SUP9_LOWER	 0x1AU /**< Supply9 low voltage limit */
+#define XSM_ATR_SUP10_LOWER	 0x1BU /**< Supply10 low voltage limit */
+#define XSM_ATR_VCCAMS_LOWER	 0x1CU /**< VCCAMS low voltage limit */
+#define XSM_ATR_TEMP_RMTE_LOWER	 0x1DU /**< Low remote Temperature limit */
+
+/*@}*/
+
+/**
+ * @name Alarm masks for channels in Configuration registers 1
+ * @{
+ */
+#define XSM_CFR_ALM_SUPPLY13_MASK	0x200000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY12_MASK	0x100000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY11_MASK	0x080000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY10_MASK	0x040000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY9_MASK	0x020000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY8_MASK	0x010000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY6_MASK	0x0800 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY5_MASK	0x0400 /**< Alarm 5 - SUPPLY5 */
+#define XSM_CFR_ALM_SUPPLY4_MASK	0x0200 /**< Alarm 4 - SUPPLY4 */
+#define XSM_CFR_ALM_SUPPLY3_MASK 	0x0100 /**< Alarm 3 - SUPPLY3 */
+#define XSM_CFR_ALM_SUPPLY2_MASK	0x0008 /**< Alarm 2 - SUPPLY2 */
+#define XSM_CFR_ALM_SUPPLY1_MASK	0x0004 /**< Alarm 1 - SUPPLY1 */
+#define XSM_CFR_ALM_TEMP_MASK		0x0002 /**< Alarm 0 - Temperature */
+#define XSM_CFR_ALM_OT_MASK		0x0001 /**< Over Temperature Alarm */
+
+/*@}*/
+
+/**************************** Type Definitions *******************************/
+
+/******************************************************************************/
+/**
+ * This data type defines a handler that an application defines to communicate
+ * with interrupt system to retrieve state information about an application.
+ *
+ * @param	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the handler, and is passed back to the upper layer
+ *		when the handler is called. It is used to find the device driver
+ *		instance.
+ *
+ ******************************************************************************/
+typedef void (*XSysMonPsu_Handler) (void *CallBackRef);
+
+/**
+ * This typedef contains configuration information for a device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID of device */
+	u32 BaseAddress;	/**< Register base address */
+	u16 InputClockMHz;	/**< Input clock frequency */
+} XSysMonPsu_Config;
+
+/**
+ * The XSysmonPsu driver instance data. The user is required to allocate a
+ * variable of this type for the SYSMON device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XSysMonPsu_Config Config; 	/**< Device configuration */
+	u32 IsReady;				/**< Device is initialized and ready */
+	XSysMonPsu_Handler Handler;
+	void *CallBackRef;			/**< Callback reference for event handler */
+} XSysMonPsu;
+
+/* BaseAddress Offsets */
+#define XSYSMON_PS 1U
+#define XSYSMON_PL 2U
+#define XSYSMON_AMS 3U
+#define XPS_BA_OFFSET   0x00000800U
+#define XPL_BA_OFFSET   0x00000C00U
+#define XSM_ADC_CH_OFFSET 0x00000200U
+#define XSM_AMS_CH_OFFSET 0x00000060U
+#define XSM_MIN_MAX_CH_OFFSET 0x00000080U
+
+/************************* Variable Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* This macro converts System Monitor Raw Data to Temperature(centigrades)
+* for On-Chip Sensors.
+*
+* @param	AdcData is the SysMon Raw ADC Data.
+*
+* @return 	The Temperature in centigrades.
+*
+* @note		C-Style signature:
+*		float XSysMon_RawToTemperature_OnChip(u32 AdcData)
+*
+*****************************************************************************/
+#define XSysMonPsu_RawToTemperature_OnChip(AdcData)				\
+	((((float)(AdcData)/65536.0f)/0.00196342531f ) - 280.2309f)
+
+/****************************************************************************/
+/**
+*
+* This macro converts System Monitor Raw Data to Temperature(centigrades)
+* for external reference.
+*
+* @param	AdcData is the SysMon Raw ADC Data.
+*
+* @return 	The Temperature in centigrades.
+*
+* @note		C-Style signature:
+*		float XSysMon_RawToTemperature_ExternalRef(u32 AdcData)
+*
+*****************************************************************************/
+#define XSysMonPsu_RawToTemperature_ExternalRef(AdcData)			\
+	((((float)(AdcData)/65536.0f)/0.00197008621f ) - 279.4266f)
+
+/****************************************************************************/
+/**
+*
+* This macro converts System Monitor Raw Data to Voltage(volts) for VpVn
+* supply.
+*
+* @param	AdcData is the System Monitor ADC Raw Data.
+*
+* @return 	The Voltage in volts.
+*
+* @note		C-Style signature:
+*		float XSysMon_VpVnRawToVoltage(u32 AdcData)
+*
+*****************************************************************************/
+#define XSysMonPsu_VpVnRawToVoltage(AdcData) 					\
+	((((float)(AdcData))* (1.0f))/65536.0f)
+
+/****************************************************************************/
+/**
+*
+* This macro converts System Monitor Raw Data to Voltage(volts) other than
+* VCCO_PSIO supply.
+*
+* @param	AdcData is the System Monitor ADC Raw Data.
+*
+* @return 	The Voltage in volts.
+*
+* @note		C-Style signature:
+*		float XSysMon_RawToVoltage(u32 AdcData)
+*
+*****************************************************************************/
+#define XSysMonPsu_RawToVoltage(AdcData) 					\
+	((((float)(AdcData))* (3.0f))/65536.0f)
+
+/****************************************************************************/
+/**
+*
+* This macro converts System Monitor Raw Data to Voltage(volts) for
+* VCCO_PSIO supply.
+*
+* @param	AdcData is the System Monitor ADC Raw Data.
+*
+* @return 	The Voltage in volts.
+*
+* @note		C-Style signature:
+*		float XSysMon_RawToVoltage(u32 AdcData)
+*
+*****************************************************************************/
+#define XSysMonPsu_VccopsioRawToVoltage(AdcData) 					\
+	((((float)(AdcData))* (6.0f))/65536.0f)
+
+/****************************************************************************/
+/**
+*
+* This macro converts Temperature in centigrades to System Monitor Raw Data
+* for On-Chip Sensors.
+*
+* @param	Temperature is the Temperature in centigrades to be
+*		converted to System Monitor ADC Raw Data.
+*
+* @return 	The System Monitor ADC Raw Data.
+*
+* @note		C-Style signature:
+*		int XSysMon_TemperatureToRaw_OnChip(float Temperature)
+*
+*****************************************************************************/
+#define XSysMonPsu_TemperatureToRaw_OnChip(Temperature)				\
+	((s32)(((Temperature) + 280.2309f)*65536.0f*0.00196342531f))
+
+/****************************************************************************/
+/**
+*
+* This macro converts Temperature in centigrades to System Monitor Raw Data
+* for external reference.
+*
+* @param	Temperature is the Temperature in centigrades to be
+*		converted to System Monitor ADC Raw Data.
+*
+* @return 	The System Monitor ADC Raw Data.
+*
+* @note		C-Style signature:
+*		int XSysMon_TemperatureToRaw_ExternalRef(float Temperature)
+*
+*****************************************************************************/
+#define XSysMonPsu_TemperatureToRaw_ExternalRef(Temperature)		\
+	((s32)(((Temperature) + 279.4266f)*65536.0f*0.00197008621f))
+
+/****************************************************************************/
+/**
+*
+* This macro converts Voltage in Volts to System Monitor Raw Data other than
+* VCCO_PSIO supply
+*
+* @param	Voltage is the Voltage in volts to be converted to
+*		System Monitor/ADC Raw Data.
+*
+* @return 	The System Monitor ADC Raw Data.
+*
+* @note		C-Style signature:
+*		int XSysMon_VoltageToRaw(float Voltage)
+*
+*****************************************************************************/
+#define XSysMonPsu_VoltageToRaw(Voltage)			 		\
+	((s32)((Voltage)*65536.0f/3.0f))
+
+/****************************************************************************/
+/**
+*
+* This macro converts Voltage in Volts to System Monitor Raw Data for
+* VCCO_PSIO supply
+*
+* @param	Voltage is the Voltage in volts to be converted to
+*		System Monitor/ADC Raw Data.
+*
+* @return 	The System Monitor ADC Raw Data.
+*
+* @note		C-Style signature:
+*		int XSysMon_VoltageToRaw(float Voltage)
+*
+*****************************************************************************/
+#define XSysMonPsu_VccopsioVoltageToRaw(Voltage)			 		\
+	((s32)((Voltage)*65536.0f/6.0f))
+
+/****************************************************************************/
+/**
+*
+* This static inline macro calculates the effective baseaddress based on the
+* Sysmon instance. For PS Sysmon, use additional offset XPS_BA_OFFSET and For
+* PL Sysmon, use additional offset XPL_BA_OFFSET.
+*
+* @param	BaseAddress is the starting address of the SysMon block in
+* 		register database.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon block
+*       or PL Sysmon block or the AMS controller register region.
+*
+* @return 	Returns the effective baseaddress of the sysmon instance.
+*
+*****************************************************************************/
+static inline u32 XSysMonPsu_GetEffBaseAddress(u32 BaseAddress, u32 SysmonBlk)
+	{
+		u32 EffBaseAddr;
+
+		if (SysmonBlk == XSYSMON_PS) {
+			EffBaseAddr = BaseAddress + XPS_BA_OFFSET;
+		} else if(SysmonBlk == XSYSMON_PL) {
+			EffBaseAddr = BaseAddress + XPL_BA_OFFSET;
+		} else {
+			EffBaseAddr = BaseAddress;
+		}
+
+		return EffBaseAddr;
+	}
+
+/************************** Function Prototypes ******************************/
+
+/* Functions in xsysmonpsu.c */
+s32 XSysMonPsu_CfgInitialize(XSysMonPsu *InstancePtr, XSysMonPsu_Config *ConfigPtr,
+			  u32 EffectiveAddr);
+void XSysMonPsu_Reset(XSysMonPsu *InstancePtr);
+void XSysMonPsu_Reset_FromLPD(XSysMonPsu *InstancePtr);
+u32 XSysMonPsu_GetStatus(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_StartAdcConversion(XSysMonPsu *InstancePtr);
+u16 XSysMonPsu_GetAdcData(XSysMonPsu *InstancePtr, u8 Channel, u32 Block);
+u16 XSysMonPsu_GetCalibCoefficient(XSysMonPsu *InstancePtr, u8 CoeffType, u32 SysmonBlk);
+u16 XSysMonPsu_GetMinMaxMeasurement(XSysMonPsu *InstancePtr, u8 MeasurementType,
+		u32 SysmonBlk);
+void XSysMonPsu_SetAvg(XSysMonPsu *InstancePtr, u8 Average, u32 SysmonBlk);
+u8 XSysMonPsu_GetAvg(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+s32 XSysMonPsu_SetSingleChParams(XSysMonPsu *InstancePtr, u8 Channel,
+				u32 IncreaseAcqCycles, u32 IsEventMode,
+				u32 IsDifferentialMode, u32 SysmonBlk);
+void XSysMonPsu_SetAlarmEnables(XSysMonPsu *InstancePtr, u32 AlmEnableMask,
+		u32 SysmonBlk);
+u32 XSysMonPsu_GetAlarmEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_SetSequencerMode(XSysMonPsu *InstancePtr, u8 SequencerMode,
+		u32 SysmonBlk);
+u8 XSysMonPsu_GetSequencerMode(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_SetSequencerEvent(XSysMonPsu *InstancePtr, u32 IsEventMode,
+		u32 SysmonBlk);
+s32 XSysMonPsu_GetSequencerEvent(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_SetExtenalMux(XSysMonPsu *InstancePtr, u8 Channel, u32 SysmonBlk);
+u32 XSysMonPsu_GetExtenalMux(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_SetAdcClkDivisor(XSysMonPsu *InstancePtr, u8 Divisor, u32 SysmonBlk);
+u8 XSysMonPsu_GetAdcClkDivisor(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+u8 XSysMonPsu_UpdateAdcClkDivisor(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+s32 XSysMonPsu_SetSeqChEnables(XSysMonPsu *InstancePtr, u64 ChEnableMask,
+		u32 SysmonBlk);
+u64 XSysMonPsu_GetSeqAvgEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+u64 XSysMonPsu_GetSeqChEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+s32 XSysMonPsu_SetSeqAvgEnables(XSysMonPsu *InstancePtr, u64 AvgEnableChMask,
+		u32 SysmonBlk);
+s32 XSysMonPsu_SetSeqInputMode(XSysMonPsu *InstancePtr, u64 InputModeChMask,
+		u32 SysmonBlk);
+u64 XSysMonPsu_GetSeqInputMode(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+s32 XSysMonPsu_SetSeqAcqTime(XSysMonPsu *InstancePtr, u64 AcqCyclesChMask,
+		u32 SysmonBlk);
+u64 XSysMonPsu_GetSeqAcqTime(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_SetAlarmThreshold(XSysMonPsu *InstancePtr, u8 AlarmThrReg,
+		u16 Value, u32 SysmonBlk);
+u16 XSysMonPsu_GetAlarmThreshold(XSysMonPsu *InstancePtr, u8 AlarmThrReg,
+		u32 SysmonBlk);
+void XSysMonPsu_SetPSAutoConversion(XSysMonPsu *InstancePtr);
+u32 XSysMonPsu_GetMonitorStatus(XSysMonPsu *InstancePtr);
+
+/* interrupt functions in xsysmonpsu_intr.c */
+void XSysMonPsu_IntrEnable(XSysMonPsu *InstancePtr, u64 Mask);
+void XSysMonPsu_IntrDisable(XSysMonPsu *InstancePtr, u64 Mask);
+u64 XSysMonPsu_IntrGetEnabled(XSysMonPsu *InstancePtr);
+u64 XSysMonPsu_IntrGetStatus(XSysMonPsu *InstancePtr);
+void XSysMonPsu_IntrClear(XSysMonPsu *InstancePtr, u64 Mask);
+
+/* Functions in xsysmonpsu_selftest.c */
+s32 XSysMonPsu_SelfTest(XSysMonPsu *InstancePtr);
+
+/* Functions in xsysmonpsu_sinit.c */
+XSysMonPsu_Config *XSysMonPsu_LookupConfig(u16 DeviceId);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XSYSMONPSU_H_ */
diff --git a/src/Xilinx/include/xsysmonpsu_hw.h b/src/Xilinx/include/xsysmonpsu_hw.h
new file mode 100644
index 0000000..2008277
--- /dev/null
+++ b/src/Xilinx/include/xsysmonpsu_hw.h
@@ -0,0 +1,2327 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsysmonpsu_hw.h
+*
+* This header file contains the identifiers and basic driver functions (or
+* macros) that can be used to access the device. Other driver functions
+* are defined in xsysmonpsu.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.0   kvn	  12/15/15 First release
+* 2.0   vns    08/14/16  Added CFG_REG3, SEQ_INPUT_MODE2, SEQ_ACQ2,
+*                        SEQ_CH2 and SEQ_AVG2 offsets and bit masks
+* 2.1   sk     03/03/16 Check for PL reset before doing PL Sysmon reset.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XSYSMONPSU_HW_H__
+#define XSYSMONPSU_HW_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xparameters.h"
+
+/**
+ * XSysmonPsu Base Address
+ */
+#define XSYSMONPSU_BASEADDR      0xFFA50000U
+
+/**
+ * Register: XSysmonPsuMisc
+ */
+#define XSYSMONPSU_MISC_OFFSET   0x00000000U
+#define XSYSMONPSU_MISC_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MISC_SLVERR_EN_DRP_SHIFT   1U
+#define XSYSMONPSU_MISC_SLVERR_EN_DRP_WIDTH   1U
+#define XSYSMONPSU_MISC_SLVERR_EN_DRP_MASK    0x00000002U
+
+#define XSYSMONPSU_MISC_SLVERR_EN_SHIFT   0U
+#define XSYSMONPSU_MISC_SLVERR_EN_WIDTH   1U
+#define XSYSMONPSU_MISC_SLVERR_EN_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuIsr0
+ */
+#define XSYSMONPSU_ISR_0_OFFSET   0x00000010U
+#define XSYSMONPSU_ISR_0_MASK	  0xffffffffU
+#define XSYSMONPSU_ISR_0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_15_SHIFT   31U
+#define XSYSMONPSU_ISR_0_PL_ALM_15_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_15_MASK    0x80000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_14_SHIFT   30U
+#define XSYSMONPSU_ISR_0_PL_ALM_14_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_14_MASK    0x40000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_13_SHIFT   29U
+#define XSYSMONPSU_ISR_0_PL_ALM_13_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_13_MASK    0x20000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_12_SHIFT   28U
+#define XSYSMONPSU_ISR_0_PL_ALM_12_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_12_MASK    0x10000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_11_SHIFT   27U
+#define XSYSMONPSU_ISR_0_PL_ALM_11_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_11_MASK    0x08000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_10_SHIFT   26U
+#define XSYSMONPSU_ISR_0_PL_ALM_10_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_10_MASK    0x04000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_9_SHIFT   25U
+#define XSYSMONPSU_ISR_0_PL_ALM_9_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_9_MASK    0x02000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_8_SHIFT   24U
+#define XSYSMONPSU_ISR_0_PL_ALM_8_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_8_MASK    0x01000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_7_SHIFT   23U
+#define XSYSMONPSU_ISR_0_PL_ALM_7_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_7_MASK    0x00800000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_6_SHIFT   22U
+#define XSYSMONPSU_ISR_0_PL_ALM_6_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_6_MASK    0x00400000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_5_SHIFT   21U
+#define XSYSMONPSU_ISR_0_PL_ALM_5_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_5_MASK    0x00200000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_4_SHIFT   20U
+#define XSYSMONPSU_ISR_0_PL_ALM_4_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_4_MASK    0x00100000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_3_SHIFT   19U
+#define XSYSMONPSU_ISR_0_PL_ALM_3_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_3_MASK    0x00080000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_2_SHIFT   18U
+#define XSYSMONPSU_ISR_0_PL_ALM_2_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_2_MASK    0x00040000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_1_SHIFT   17U
+#define XSYSMONPSU_ISR_0_PL_ALM_1_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_1_MASK    0x00020000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_0_SHIFT   16U
+#define XSYSMONPSU_ISR_0_PL_ALM_0_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_0_MASK    0x00010000U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_15_SHIFT   15U
+#define XSYSMONPSU_ISR_0_PS_ALM_15_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_15_MASK    0x00008000U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_14_SHIFT   14U
+#define XSYSMONPSU_ISR_0_PS_ALM_14_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_14_MASK    0x00004000U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_13_SHIFT   13U
+#define XSYSMONPSU_ISR_0_PS_ALM_13_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_13_MASK    0x00002000U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_12_SHIFT   12U
+#define XSYSMONPSU_ISR_0_PS_ALM_12_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_12_MASK    0x00001000U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_11_SHIFT   11U
+#define XSYSMONPSU_ISR_0_PS_ALM_11_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_11_MASK    0x00000800U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_10_SHIFT   10U
+#define XSYSMONPSU_ISR_0_PS_ALM_10_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_10_MASK    0x00000400U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_9_SHIFT   9U
+#define XSYSMONPSU_ISR_0_PS_ALM_9_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_9_MASK    0x00000200U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_8_SHIFT   8U
+#define XSYSMONPSU_ISR_0_PS_ALM_8_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_8_MASK    0x00000100U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_7_SHIFT   7U
+#define XSYSMONPSU_ISR_0_PS_ALM_7_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_7_MASK    0x00000080U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_6_SHIFT   6U
+#define XSYSMONPSU_ISR_0_PS_ALM_6_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_6_MASK    0x00000040U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_5_SHIFT   5U
+#define XSYSMONPSU_ISR_0_PS_ALM_5_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_5_MASK    0x00000020U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_4_SHIFT   4U
+#define XSYSMONPSU_ISR_0_PS_ALM_4_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_4_MASK    0x00000010U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_3_SHIFT   3U
+#define XSYSMONPSU_ISR_0_PS_ALM_3_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_3_MASK    0x00000008U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_2_SHIFT   2U
+#define XSYSMONPSU_ISR_0_PS_ALM_2_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_2_MASK    0x00000004U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_1_SHIFT   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_1_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_1_MASK    0x00000002U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_0_SHIFT   0U
+#define XSYSMONPSU_ISR_0_PS_ALM_0_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_0_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuIsr1
+ */
+#define XSYSMONPSU_ISR_1_OFFSET   0x00000014U
+#define XSYSMONPSU_ISR_1_MASK	  0xe000001fU
+#define XSYSMONPSU_ISR_1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_SHIFT   31U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_WIDTH   1U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_MASK    0x80000000U
+
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PL_SYSMON_SHIFT   30U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PL_SYSMON_WIDTH   1U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PL_SYSMON_MASK    0x40000000U
+
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PS_SYSMON_SHIFT   29U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PS_SYSMON_WIDTH   1U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PS_SYSMON_MASK    0x20000000U
+
+#define XSYSMONPSU_ISR_1_EOS_SHIFT   4U
+#define XSYSMONPSU_ISR_1_EOS_WIDTH   1U
+#define XSYSMONPSU_ISR_1_EOS_MASK    0x00000010U
+
+#define XSYSMONPSU_ISR_1_EOC_SHIFT   3U
+#define XSYSMONPSU_ISR_1_EOC_WIDTH   1U
+#define XSYSMONPSU_ISR_1_EOC_MASK    0x00000008U
+
+#define XSYSMONPSU_ISR_1_PL_OT_SHIFT   2U
+#define XSYSMONPSU_ISR_1_PL_OT_WIDTH   1U
+#define XSYSMONPSU_ISR_1_PL_OT_MASK    0x00000004U
+
+#define XSYSMONPSU_ISR_1_PS_LPD_OT_SHIFT   1U
+#define XSYSMONPSU_ISR_1_PS_LPD_OT_WIDTH   1U
+#define XSYSMONPSU_ISR_1_PS_LPD_OT_MASK    0x00000002U
+
+#define XSYSMONPSU_ISR_1_PS_FPD_OT_SHIFT   0U
+#define XSYSMONPSU_ISR_1_PS_FPD_OT_WIDTH   1U
+#define XSYSMONPSU_ISR_1_PS_FPD_OT_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuImr0
+ */
+#define XSYSMONPSU_IMR_0_OFFSET   0x00000018U
+#define XSYSMONPSU_IMR_0_RSTVAL   0xffffffffU
+
+#define XSYSMONPSU_IMR_0_PL_ALM_15_SHIFT   31U
+#define XSYSMONPSU_IMR_0_PL_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_15_MASK    0x80000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_14_SHIFT   30U
+#define XSYSMONPSU_IMR_0_PL_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_14_MASK    0x40000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_13_SHIFT   29U
+#define XSYSMONPSU_IMR_0_PL_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_13_MASK    0x20000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_12_SHIFT   28U
+#define XSYSMONPSU_IMR_0_PL_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_12_MASK    0x10000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_11_SHIFT   27U
+#define XSYSMONPSU_IMR_0_PL_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_11_MASK    0x08000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_10_SHIFT   26U
+#define XSYSMONPSU_IMR_0_PL_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_10_MASK    0x04000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_9_SHIFT   25U
+#define XSYSMONPSU_IMR_0_PL_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_9_MASK    0x02000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_8_SHIFT   24U
+#define XSYSMONPSU_IMR_0_PL_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_8_MASK    0x01000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_7_SHIFT   23U
+#define XSYSMONPSU_IMR_0_PL_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_7_MASK    0x00800000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_6_SHIFT   22U
+#define XSYSMONPSU_IMR_0_PL_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_6_MASK    0x00400000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_5_SHIFT   21U
+#define XSYSMONPSU_IMR_0_PL_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_5_MASK    0x00200000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_4_SHIFT   20U
+#define XSYSMONPSU_IMR_0_PL_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_4_MASK    0x00100000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_3_SHIFT   19U
+#define XSYSMONPSU_IMR_0_PL_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_3_MASK    0x00080000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_2_SHIFT   18U
+#define XSYSMONPSU_IMR_0_PL_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_2_MASK    0x00040000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_1_SHIFT   17U
+#define XSYSMONPSU_IMR_0_PL_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_1_MASK    0x00020000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_0_SHIFT   16U
+#define XSYSMONPSU_IMR_0_PL_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_0_MASK    0x00010000U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_15_SHIFT   15U
+#define XSYSMONPSU_IMR_0_PS_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_15_MASK    0x00008000U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_14_SHIFT   14U
+#define XSYSMONPSU_IMR_0_PS_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_14_MASK    0x00004000U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_13_SHIFT   13U
+#define XSYSMONPSU_IMR_0_PS_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_13_MASK    0x00002000U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_12_SHIFT   12U
+#define XSYSMONPSU_IMR_0_PS_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_12_MASK    0x00001000U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_11_SHIFT   11U
+#define XSYSMONPSU_IMR_0_PS_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_11_MASK    0x00000800U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_10_SHIFT   10U
+#define XSYSMONPSU_IMR_0_PS_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_10_MASK    0x00000400U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_9_SHIFT   9U
+#define XSYSMONPSU_IMR_0_PS_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_9_MASK    0x00000200U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_8_SHIFT   8U
+#define XSYSMONPSU_IMR_0_PS_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_8_MASK    0x00000100U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_7_SHIFT   7U
+#define XSYSMONPSU_IMR_0_PS_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_7_MASK    0x00000080U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_6_SHIFT   6U
+#define XSYSMONPSU_IMR_0_PS_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_6_MASK    0x00000040U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_5_SHIFT   5U
+#define XSYSMONPSU_IMR_0_PS_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_5_MASK    0x00000020U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_4_SHIFT   4U
+#define XSYSMONPSU_IMR_0_PS_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_4_MASK    0x00000010U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_3_SHIFT   3U
+#define XSYSMONPSU_IMR_0_PS_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_3_MASK    0x00000008U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_2_SHIFT   2U
+#define XSYSMONPSU_IMR_0_PS_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_2_MASK    0x00000004U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_1_SHIFT   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_1_MASK    0x00000002U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_0_SHIFT   0U
+#define XSYSMONPSU_IMR_0_PS_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_0_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuImr1
+ */
+#define XSYSMONPSU_IMR_1_OFFSET   0x0000001CU
+#define XSYSMONPSU_IMR_1_RSTVAL   0xe000001fU
+
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_SHIFT   31U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_WIDTH   1U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_MASK    0x80000000U
+
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PL_SYSMON_SHIFT   30U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PL_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PL_SYSMON_MASK    0x40000000U
+
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PS_SYSMON_SHIFT   29U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PS_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PS_SYSMON_MASK    0x20000000U
+
+#define XSYSMONPSU_IMR_1_EOS_SHIFT   4U
+#define XSYSMONPSU_IMR_1_EOS_WIDTH   1U
+#define XSYSMONPSU_IMR_1_EOS_MASK    0x00000010U
+
+#define XSYSMONPSU_IMR_1_EOC_SHIFT   3U
+#define XSYSMONPSU_IMR_1_EOC_WIDTH   1U
+#define XSYSMONPSU_IMR_1_EOC_MASK    0x00000008U
+
+#define XSYSMONPSU_IMR_1_PL_OT_SHIFT   2U
+#define XSYSMONPSU_IMR_1_PL_OT_WIDTH   1U
+#define XSYSMONPSU_IMR_1_PL_OT_MASK    0x00000004U
+
+#define XSYSMONPSU_IMR_1_PS_LPD_OT_SHIFT   1U
+#define XSYSMONPSU_IMR_1_PS_LPD_OT_WIDTH   1U
+#define XSYSMONPSU_IMR_1_PS_LPD_OT_MASK    0x00000002U
+
+#define XSYSMONPSU_IMR_1_PS_FPD_OT_SHIFT   0U
+#define XSYSMONPSU_IMR_1_PS_FPD_OT_WIDTH   1U
+#define XSYSMONPSU_IMR_1_PS_FPD_OT_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuIer0
+ */
+#define XSYSMONPSU_IER_0_OFFSET   0x00000020U
+#define XSYSMONPSU_IXR_0_MASK     0xFFFFFFFFU
+#define XSYSMONPSU_IER_0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_15_SHIFT   31U
+#define XSYSMONPSU_IER_0_PL_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_15_MASK    0x80000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_14_SHIFT   30U
+#define XSYSMONPSU_IER_0_PL_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_14_MASK    0x40000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_13_SHIFT   29U
+#define XSYSMONPSU_IER_0_PL_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_13_MASK    0x20000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_12_SHIFT   28U
+#define XSYSMONPSU_IER_0_PL_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_12_MASK    0x10000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_11_SHIFT   27U
+#define XSYSMONPSU_IER_0_PL_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_11_MASK    0x08000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_10_SHIFT   26U
+#define XSYSMONPSU_IER_0_PL_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_10_MASK    0x04000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_9_SHIFT   25U
+#define XSYSMONPSU_IER_0_PL_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_9_MASK    0x02000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_8_SHIFT   24U
+#define XSYSMONPSU_IER_0_PL_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_8_MASK    0x01000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_7_SHIFT   23U
+#define XSYSMONPSU_IER_0_PL_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_7_MASK    0x00800000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_6_SHIFT   22U
+#define XSYSMONPSU_IER_0_PL_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_6_MASK    0x00400000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_5_SHIFT   21U
+#define XSYSMONPSU_IER_0_PL_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_5_MASK    0x00200000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_4_SHIFT   20U
+#define XSYSMONPSU_IER_0_PL_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_4_MASK    0x00100000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_3_SHIFT   19U
+#define XSYSMONPSU_IER_0_PL_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_3_MASK    0x00080000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_2_SHIFT   18U
+#define XSYSMONPSU_IER_0_PL_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_2_MASK    0x00040000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_1_SHIFT   17U
+#define XSYSMONPSU_IER_0_PL_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_1_MASK    0x00020000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_0_SHIFT   16U
+#define XSYSMONPSU_IER_0_PL_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_0_MASK    0x00010000U
+
+#define XSYSMONPSU_IER_0_PS_ALM_15_SHIFT   15U
+#define XSYSMONPSU_IER_0_PS_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_15_MASK    0x00008000U
+
+#define XSYSMONPSU_IER_0_PS_ALM_14_SHIFT   14U
+#define XSYSMONPSU_IER_0_PS_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_14_MASK    0x00004000U
+
+#define XSYSMONPSU_IER_0_PS_ALM_13_SHIFT   13U
+#define XSYSMONPSU_IER_0_PS_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_13_MASK    0x00002000U
+
+#define XSYSMONPSU_IER_0_PS_ALM_12_SHIFT   12U
+#define XSYSMONPSU_IER_0_PS_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_12_MASK    0x00001000U
+
+#define XSYSMONPSU_IER_0_PS_ALM_11_SHIFT   11U
+#define XSYSMONPSU_IER_0_PS_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_11_MASK    0x00000800U
+
+#define XSYSMONPSU_IER_0_PS_ALM_10_SHIFT   10U
+#define XSYSMONPSU_IER_0_PS_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_10_MASK    0x00000400U
+
+#define XSYSMONPSU_IER_0_PS_ALM_9_SHIFT   9U
+#define XSYSMONPSU_IER_0_PS_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_9_MASK    0x00000200U
+
+#define XSYSMONPSU_IER_0_PS_ALM_8_SHIFT   8U
+#define XSYSMONPSU_IER_0_PS_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_8_MASK    0x00000100U
+
+#define XSYSMONPSU_IER_0_PS_ALM_7_SHIFT   7U
+#define XSYSMONPSU_IER_0_PS_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_7_MASK    0x00000080U
+
+#define XSYSMONPSU_IER_0_PS_ALM_6_SHIFT   6U
+#define XSYSMONPSU_IER_0_PS_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_6_MASK    0x00000040U
+
+#define XSYSMONPSU_IER_0_PS_ALM_5_SHIFT   5U
+#define XSYSMONPSU_IER_0_PS_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_5_MASK    0x00000020U
+
+#define XSYSMONPSU_IER_0_PS_ALM_4_SHIFT   4U
+#define XSYSMONPSU_IER_0_PS_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_4_MASK    0x00000010U
+
+#define XSYSMONPSU_IER_0_PS_ALM_3_SHIFT   3U
+#define XSYSMONPSU_IER_0_PS_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_3_MASK    0x00000008U
+
+#define XSYSMONPSU_IER_0_PS_ALM_2_SHIFT   2U
+#define XSYSMONPSU_IER_0_PS_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_2_MASK    0x00000004U
+
+#define XSYSMONPSU_IER_0_PS_ALM_1_SHIFT   1U
+#define XSYSMONPSU_IER_0_PS_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_1_MASK    0x00000002U
+
+#define XSYSMONPSU_IER_0_PS_ALM_0_SHIFT   0U
+#define XSYSMONPSU_IER_0_PS_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_0_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuIer1
+ */
+#define XSYSMONPSU_IER_1_OFFSET   0x00000024U
+#define XSYSMONPSU_IXR_1_MASK     0xE000001FU
+#define XSYSMONPSU_IER_1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_SHIFT   31U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_WIDTH   1U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_MASK    0x80000000U
+
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PL_SYSMON_SHIFT   30U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PL_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PL_SYSMON_MASK    0x40000000U
+
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PS_SYSMON_SHIFT   29U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PS_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PS_SYSMON_MASK    0x20000000U
+
+#define XSYSMONPSU_IER_1_EOS_SHIFT   4U
+#define XSYSMONPSU_IER_1_EOS_WIDTH   1U
+#define XSYSMONPSU_IER_1_EOS_MASK    0x00000010U
+
+#define XSYSMONPSU_IER_1_EOC_SHIFT   3U
+#define XSYSMONPSU_IER_1_EOC_WIDTH   1U
+#define XSYSMONPSU_IER_1_EOC_MASK    0x00000008U
+
+#define XSYSMONPSU_IER_1_PL_OT_SHIFT   2U
+#define XSYSMONPSU_IER_1_PL_OT_WIDTH   1U
+#define XSYSMONPSU_IER_1_PL_OT_MASK    0x00000004U
+
+#define XSYSMONPSU_IER_1_PS_LPD_OT_SHIFT   1U
+#define XSYSMONPSU_IER_1_PS_LPD_OT_WIDTH   1U
+#define XSYSMONPSU_IER_1_PS_LPD_OT_MASK    0x00000002U
+
+#define XSYSMONPSU_IER_1_PS_FPD_OT_SHIFT   0U
+#define XSYSMONPSU_IER_1_PS_FPD_OT_WIDTH   1U
+#define XSYSMONPSU_IER_1_PS_FPD_OT_MASK    0x00000001U
+
+#define XSYSMONPSU_IXR_1_SHIFT  32U
+
+/**
+ * Register: XSysmonPsuIdr0
+ */
+#define XSYSMONPSU_IDR_0_OFFSET   0x00000028U
+#define XSYSMONPSU_IDR_0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_15_SHIFT   31U
+#define XSYSMONPSU_IDR_0_PL_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_15_MASK    0x80000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_14_SHIFT   30U
+#define XSYSMONPSU_IDR_0_PL_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_14_MASK    0x40000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_13_SHIFT   29U
+#define XSYSMONPSU_IDR_0_PL_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_13_MASK    0x20000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_12_SHIFT   28U
+#define XSYSMONPSU_IDR_0_PL_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_12_MASK    0x10000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_11_SHIFT   27U
+#define XSYSMONPSU_IDR_0_PL_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_11_MASK    0x08000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_10_SHIFT   26U
+#define XSYSMONPSU_IDR_0_PL_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_10_MASK    0x04000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_9_SHIFT   25U
+#define XSYSMONPSU_IDR_0_PL_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_9_MASK    0x02000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_8_SHIFT   24U
+#define XSYSMONPSU_IDR_0_PL_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_8_MASK    0x01000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_7_SHIFT   23U
+#define XSYSMONPSU_IDR_0_PL_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_7_MASK    0x00800000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_6_SHIFT   22U
+#define XSYSMONPSU_IDR_0_PL_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_6_MASK    0x00400000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_5_SHIFT   21U
+#define XSYSMONPSU_IDR_0_PL_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_5_MASK    0x00200000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_4_SHIFT   20U
+#define XSYSMONPSU_IDR_0_PL_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_4_MASK    0x00100000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_3_SHIFT   19U
+#define XSYSMONPSU_IDR_0_PL_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_3_MASK    0x00080000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_2_SHIFT   18U
+#define XSYSMONPSU_IDR_0_PL_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_2_MASK    0x00040000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_1_SHIFT   17U
+#define XSYSMONPSU_IDR_0_PL_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_1_MASK    0x00020000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_0_SHIFT   16U
+#define XSYSMONPSU_IDR_0_PL_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_0_MASK    0x00010000U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_15_SHIFT   15U
+#define XSYSMONPSU_IDR_0_PS_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_15_MASK    0x00008000U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_14_SHIFT   14U
+#define XSYSMONPSU_IDR_0_PS_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_14_MASK    0x00004000U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_13_SHIFT   13U
+#define XSYSMONPSU_IDR_0_PS_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_13_MASK    0x00002000U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_12_SHIFT   12U
+#define XSYSMONPSU_IDR_0_PS_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_12_MASK    0x00001000U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_11_SHIFT   11U
+#define XSYSMONPSU_IDR_0_PS_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_11_MASK    0x00000800U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_10_SHIFT   10U
+#define XSYSMONPSU_IDR_0_PS_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_10_MASK    0x00000400U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_9_SHIFT   9U
+#define XSYSMONPSU_IDR_0_PS_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_9_MASK    0x00000200U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_8_SHIFT   8U
+#define XSYSMONPSU_IDR_0_PS_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_8_MASK    0x00000100U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_7_SHIFT   7U
+#define XSYSMONPSU_IDR_0_PS_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_7_MASK    0x00000080U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_6_SHIFT   6U
+#define XSYSMONPSU_IDR_0_PS_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_6_MASK    0x00000040U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_5_SHIFT   5U
+#define XSYSMONPSU_IDR_0_PS_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_5_MASK    0x00000020U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_4_SHIFT   4U
+#define XSYSMONPSU_IDR_0_PS_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_4_MASK    0x00000010U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_3_SHIFT   3U
+#define XSYSMONPSU_IDR_0_PS_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_3_MASK    0x00000008U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_2_SHIFT   2U
+#define XSYSMONPSU_IDR_0_PS_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_2_MASK    0x00000004U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_1_SHIFT   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_1_MASK    0x00000002U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_0_SHIFT   0U
+#define XSYSMONPSU_IDR_0_PS_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_0_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuIdr1
+ */
+#define XSYSMONPSU_IDR_1_OFFSET   0x0000002CU
+#define XSYSMONPSU_IDR_1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_SHIFT   31U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_WIDTH   1U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_MASK    0x80000000U
+
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PL_SYSMON_SHIFT   30U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PL_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PL_SYSMON_MASK    0x40000000U
+
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PS_SYSMON_SHIFT   29U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PS_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PS_SYSMON_MASK    0x20000000U
+
+#define XSYSMONPSU_IDR_1_EOS_SHIFT   4U
+#define XSYSMONPSU_IDR_1_EOS_WIDTH   1U
+#define XSYSMONPSU_IDR_1_EOS_MASK    0x00000010U
+
+#define XSYSMONPSU_IDR_1_EOC_SHIFT   3U
+#define XSYSMONPSU_IDR_1_EOC_WIDTH   1U
+#define XSYSMONPSU_IDR_1_EOC_MASK    0x00000008U
+
+#define XSYSMONPSU_IDR_1_PL_OT_SHIFT   2U
+#define XSYSMONPSU_IDR_1_PL_OT_WIDTH   1U
+#define XSYSMONPSU_IDR_1_PL_OT_MASK    0x00000004U
+
+#define XSYSMONPSU_IDR_1_PS_LPD_OT_SHIFT   1U
+#define XSYSMONPSU_IDR_1_PS_LPD_OT_WIDTH   1U
+#define XSYSMONPSU_IDR_1_PS_LPD_OT_MASK    0x00000002U
+
+#define XSYSMONPSU_IDR_1_PS_FPD_OT_SHIFT   0U
+#define XSYSMONPSU_IDR_1_PS_FPD_OT_WIDTH   1U
+#define XSYSMONPSU_IDR_1_PS_FPD_OT_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuPsSysmonSts
+ */
+#define XSYSMONPSU_PS_SYSMON_CSTS_OFFSET   0x00000040U
+#define XSYSMONPSU_PS_SYSMON_CSTS_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_STE_SHIFT   24U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_STE_WIDTH   4U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_STE_MASK    0x0f000000U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_DNE_SHIFT   16U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_DNE_WIDTH   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_DNE_MASK    0x00010000U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_SHIFT   3U
+#define XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_WIDTH   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_MASK    0x00000008U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_CONVST_SHIFT   2U
+#define XSYSMONPSU_PS_SYSMON_CSTS_CONVST_WIDTH   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_CONVST_MASK    0x00000004U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_RST_USR_SHIFT   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_RST_USR_WIDTH   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_RST_USR_MASK    0x00000002U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_TRIG_SHIFT   0U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_TRIG_WIDTH   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_TRIG_MASK    0x00000001U
+
+#define XSYSMONPSU_PS_SYSMON_READY 0x08010000U
+
+/**
+ * Register: XSysmonPsuPlSysmonSts
+ */
+#define XSYSMONPSU_PL_SYSMON_CSTS_OFFSET   0x00000044U
+#define XSYSMONPSU_PL_SYSMON_CSTS_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_PL_SYSMON_CSTS_ACESBLE_SHIFT   0U
+#define XSYSMONPSU_PL_SYSMON_CSTS_ACESBLE_WIDTH   1U
+#define XSYSMONPSU_PL_SYSMON_CSTS_ACESBLE_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuMonSts
+ */
+#define XSYSMONPSU_MON_STS_OFFSET   0x00000050U
+#define XSYSMONPSU_MON_STS_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MON_STS_JTAG_LCKD_SHIFT   23U
+#define XSYSMONPSU_MON_STS_JTAG_LCKD_WIDTH   1U
+#define XSYSMONPSU_MON_STS_JTAG_LCKD_MASK    0x00800000U
+
+#define XSYSMONPSU_MON_STS_BSY_SHIFT   22U
+#define XSYSMONPSU_MON_STS_BSY_WIDTH   1U
+#define XSYSMONPSU_MON_STS_BSY_MASK    0x00400000U
+
+#define XSYSMONPSU_MON_STS_CH_SHIFT   16U
+#define XSYSMONPSU_MON_STS_CH_WIDTH   6U
+#define XSYSMONPSU_MON_STS_CH_MASK    0x003f0000U
+
+#define XSYSMONPSU_MON_STS_DATA_SHIFT   0U
+#define XSYSMONPSU_MON_STS_DATA_WIDTH   16U
+#define XSYSMONPSU_MON_STS_DATA_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPspll0
+ */
+#define XSYSMONPSU_VCC_PSPLL0_OFFSET   0x00000060U
+#define XSYSMONPSU_VCC_PSPLL0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSPLL0_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSPLL0_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSPLL0_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPspll1
+ */
+#define XSYSMONPSU_VCC_PSPLL1_OFFSET   0x00000064U
+#define XSYSMONPSU_VCC_PSPLL1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSPLL1_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSPLL1_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSPLL1_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPspll2
+ */
+#define XSYSMONPSU_VCC_PSPLL2_OFFSET   0x00000068U
+#define XSYSMONPSU_VCC_PSPLL2_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSPLL2_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSPLL2_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSPLL2_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPspll3
+ */
+#define XSYSMONPSU_VCC_PSPLL3_OFFSET   0x0000006CU
+#define XSYSMONPSU_VCC_PSPLL3_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSPLL3_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSPLL3_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSPLL3_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPspll4
+ */
+#define XSYSMONPSU_VCC_PSPLL4_OFFSET   0x00000070U
+#define XSYSMONPSU_VCC_PSPLL4_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSPLL4_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSPLL4_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSPLL4_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPsbatt
+ */
+#define XSYSMONPSU_VCC_PSBATT_OFFSET   0x00000074U
+#define XSYSMONPSU_VCC_PSBATT_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSBATT_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSBATT_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSBATT_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccint
+ */
+#define XSYSMONPSU_VCCINT_OFFSET   0x00000078U
+#define XSYSMONPSU_VCCINT_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCCINT_VAL_SHIFT   0U
+#define XSYSMONPSU_VCCINT_VAL_WIDTH   16U
+#define XSYSMONPSU_VCCINT_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccbram
+ */
+#define XSYSMONPSU_VCCBRAM_OFFSET   0x0000007CU
+#define XSYSMONPSU_VCCBRAM_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCCBRAM_VAL_SHIFT   0U
+#define XSYSMONPSU_VCCBRAM_VAL_WIDTH   16U
+#define XSYSMONPSU_VCCBRAM_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccaux
+ */
+#define XSYSMONPSU_VCCAUX_OFFSET   0x00000080U
+#define XSYSMONPSU_VCCAUX_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCCAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VCCAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VCCAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPsddrpll
+ */
+#define XSYSMONPSU_VCC_PSDDRPLL_OFFSET   0x00000084U
+#define XSYSMONPSU_VCC_PSDDRPLL_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSDDRPLL_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSDDRPLL_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSDDRPLL_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuDdrphyVref
+ */
+#define XSYSMONPSU_DDRPHY_VREF_OFFSET   0x00000088U
+#define XSYSMONPSU_DDRPHY_VREF_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_DDRPHY_VREF_VAL_SHIFT   0U
+#define XSYSMONPSU_DDRPHY_VREF_VAL_WIDTH   16U
+#define XSYSMONPSU_DDRPHY_VREF_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuDdrphyAto
+ */
+#define XSYSMONPSU_DDRPHY_ATO_OFFSET   0x0000008CU
+#define XSYSMONPSU_DDRPHY_ATO_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_DDRPHY_ATO_VAL_SHIFT   0U
+#define XSYSMONPSU_DDRPHY_ATO_VAL_WIDTH   16U
+#define XSYSMONPSU_DDRPHY_ATO_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuPsgtAt0
+ */
+#define XSYSMONPSU_PSGT_AT0_OFFSET   0x00000090U
+#define XSYSMONPSU_PSGT_AT0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_PSGT_AT0_VAL_SHIFT   0U
+#define XSYSMONPSU_PSGT_AT0_VAL_WIDTH   16U
+#define XSYSMONPSU_PSGT_AT0_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuPsgtAt1
+ */
+#define XSYSMONPSU_PSGT_AT1_OFFSET   0x00000094U
+#define XSYSMONPSU_PSGT_AT1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_PSGT_AT1_VAL_SHIFT   0U
+#define XSYSMONPSU_PSGT_AT1_VAL_WIDTH   16U
+#define XSYSMONPSU_PSGT_AT1_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuReserve0
+ */
+#define XSYSMONPSU_RESERVE0_OFFSET   0x00000098U
+#define XSYSMONPSU_RESERVE0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_RESERVE0_VAL_SHIFT   0U
+#define XSYSMONPSU_RESERVE0_VAL_WIDTH   16U
+#define XSYSMONPSU_RESERVE0_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuReserve1
+ */
+#define XSYSMONPSU_RESERVE1_OFFSET   0x0000009CU
+#define XSYSMONPSU_RESERVE1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_RESERVE1_VAL_SHIFT   0U
+#define XSYSMONPSU_RESERVE1_VAL_WIDTH   16U
+#define XSYSMONPSU_RESERVE1_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuTemp
+ */
+#define XSYSMONPSU_TEMP_OFFSET   0x00000000U
+#define XSYSMONPSU_TEMP_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_TEMP_SHIFT   0U
+#define XSYSMONPSU_TEMP_WIDTH   16U
+#define XSYSMONPSU_TEMP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup1
+ */
+#define XSYSMONPSU_SUP1_OFFSET   0x00000004U
+#define XSYSMONPSU_SUP1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP1_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP1_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP1_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup2
+ */
+#define XSYSMONPSU_SUP2_OFFSET   0x00000008U
+#define XSYSMONPSU_SUP2_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP2_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP2_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP2_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVpVn
+ */
+#define XSYSMONPSU_VP_VN_OFFSET   0x0000000CU
+#define XSYSMONPSU_VP_VN_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VP_VN_SHIFT   0U
+#define XSYSMONPSU_VP_VN_WIDTH   16U
+#define XSYSMONPSU_VP_VN_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVrefp
+ */
+#define XSYSMONPSU_VREFP_OFFSET   0x00000010U
+#define XSYSMONPSU_VREFP_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VREFP_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_VREFP_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_VREFP_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVrefn
+ */
+#define XSYSMONPSU_VREFN_OFFSET   0x00000014U
+#define XSYSMONPSU_VREFN_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VREFN_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_VREFN_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_VREFN_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup3
+ */
+#define XSYSMONPSU_SUP3_OFFSET   0x00000018U
+#define XSYSMONPSU_SUP3_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP3_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP3_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP3_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuCalSupOff
+ */
+#define XSYSMONPSU_CAL_SUP_OFF_OFFSET   0x00000020U
+#define XSYSMONPSU_CAL_SUP_OFF_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CAL_SUP_OFF_VAL_SHIFT   0U
+#define XSYSMONPSU_CAL_SUP_OFF_VAL_WIDTH   16U
+#define XSYSMONPSU_CAL_SUP_OFF_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuCalAdcBiplrOff
+ */
+#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_OFFSET   0x00000024U
+#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_VAL_SHIFT   0U
+#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_VAL_WIDTH   16U
+#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuCalGainErr
+ */
+#define XSYSMONPSU_CAL_GAIN_ERR_OFFSET   0x00000028U
+#define XSYSMONPSU_CAL_GAIN_ERR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CAL_GAIN_ERR_VAL_SHIFT   0U
+#define XSYSMONPSU_CAL_GAIN_ERR_VAL_WIDTH   16U
+#define XSYSMONPSU_CAL_GAIN_ERR_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup4
+ */
+#define XSYSMONPSU_SUP4_OFFSET   0x00000034U
+#define XSYSMONPSU_SUP4_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP4_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP4_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP4_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup5
+ */
+#define XSYSMONPSU_SUP5_OFFSET   0x00000038U
+#define XSYSMONPSU_SUP5_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP5_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP5_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP5_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup6
+ */
+#define XSYSMONPSU_SUP6_OFFSET   0x0000003CU
+#define XSYSMONPSU_SUP6_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP6_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP6_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP6_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux00
+ */
+#define XSYSMONPSU_VAUX00_OFFSET   0x00000040U
+#define XSYSMONPSU_VAUX00_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX00_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX00_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX00_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux01
+ */
+#define XSYSMONPSU_VAUX01_OFFSET   0x00000044U
+#define XSYSMONPSU_VAUX01_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX01_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX01_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX01_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux02
+ */
+#define XSYSMONPSU_VAUX02_OFFSET   0x00000048U
+#define XSYSMONPSU_VAUX02_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX02_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX02_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX02_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux03
+ */
+#define XSYSMONPSU_VAUX03_OFFSET   0x0000004CU
+#define XSYSMONPSU_VAUX03_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX03_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX03_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX03_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux04
+ */
+#define XSYSMONPSU_VAUX04_OFFSET   0x00000050U
+#define XSYSMONPSU_VAUX04_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX04_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX04_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX04_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux05
+ */
+#define XSYSMONPSU_VAUX05_OFFSET   0x00000054U
+#define XSYSMONPSU_VAUX05_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX05_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX05_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX05_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux06
+ */
+#define XSYSMONPSU_VAUX06_OFFSET   0x00000058U
+#define XSYSMONPSU_VAUX06_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX06_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX06_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX06_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux07
+ */
+#define XSYSMONPSU_VAUX07_OFFSET   0x0000005CU
+#define XSYSMONPSU_VAUX07_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX07_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX07_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX07_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux08
+ */
+#define XSYSMONPSU_VAUX08_OFFSET   0x00000060U
+#define XSYSMONPSU_VAUX08_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX08_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX08_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX08_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux09
+ */
+#define XSYSMONPSU_VAUX09_OFFSET   0x00000064U
+#define XSYSMONPSU_VAUX09_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX09_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX09_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX09_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0a
+ */
+#define XSYSMONPSU_VAUX0A_OFFSET   0x00000068U
+#define XSYSMONPSU_VAUX0A_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0A_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0A_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0A_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0b
+ */
+#define XSYSMONPSU_VAUX0B_OFFSET   0x0000006CU
+#define XSYSMONPSU_VAUX0B_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0B_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0B_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0B_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0c
+ */
+#define XSYSMONPSU_VAUX0C_OFFSET   0x00000070U
+#define XSYSMONPSU_VAUX0C_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0C_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0C_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0C_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0d
+ */
+#define XSYSMONPSU_VAUX0D_OFFSET   0x00000074U
+#define XSYSMONPSU_VAUX0D_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0D_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0D_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0D_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0e
+ */
+#define XSYSMONPSU_VAUX0E_OFFSET   0x00000078U
+#define XSYSMONPSU_VAUX0E_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0E_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0E_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0E_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0f
+ */
+#define XSYSMONPSU_VAUX0F_OFFSET   0x0000007CU
+#define XSYSMONPSU_VAUX0F_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0F_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0F_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0F_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxTemp
+ */
+#define XSYSMONPSU_MAX_TEMP_OFFSET   0x00000080U
+#define XSYSMONPSU_MAX_TEMP_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_TEMP_SHIFT   0U
+#define XSYSMONPSU_MAX_TEMP_WIDTH   16U
+#define XSYSMONPSU_MAX_TEMP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup1
+ */
+#define XSYSMONPSU_MAX_SUP1_OFFSET   0x00000084U
+#define XSYSMONPSU_MAX_SUP1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP1_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP1_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP1_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup2
+ */
+#define XSYSMONPSU_MAX_SUP2_OFFSET   0x00000088U
+#define XSYSMONPSU_MAX_SUP2_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP2_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP2_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP2_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup3
+ */
+#define XSYSMONPSU_MAX_SUP3_OFFSET   0x0000008CU
+#define XSYSMONPSU_MAX_SUP3_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP3_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP3_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP3_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinTemp
+ */
+#define XSYSMONPSU_MIN_TEMP_OFFSET   0x00000090U
+#define XSYSMONPSU_MIN_TEMP_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_TEMP_SHIFT   0U
+#define XSYSMONPSU_MIN_TEMP_WIDTH   16U
+#define XSYSMONPSU_MIN_TEMP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup1
+ */
+#define XSYSMONPSU_MIN_SUP1_OFFSET   0x00000094U
+#define XSYSMONPSU_MIN_SUP1_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP1_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP1_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP1_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup2
+ */
+#define XSYSMONPSU_MIN_SUP2_OFFSET   0x00000098U
+#define XSYSMONPSU_MIN_SUP2_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP2_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP2_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP2_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup3
+ */
+#define XSYSMONPSU_MIN_SUP3_OFFSET   0x0000009CU
+#define XSYSMONPSU_MIN_SUP3_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP3_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP3_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP3_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup4
+ */
+#define XSYSMONPSU_MAX_SUP4_OFFSET   0x000000A0U
+#define XSYSMONPSU_MAX_SUP4_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP4_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP4_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP4_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup5
+ */
+#define XSYSMONPSU_MAX_SUP5_OFFSET   0x000000A4U
+#define XSYSMONPSU_MAX_SUP5_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP5_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP5_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP5_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup6
+ */
+#define XSYSMONPSU_MAX_SUP6_OFFSET   0x000000A8U
+#define XSYSMONPSU_MAX_SUP6_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP6_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP6_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP6_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup4
+ */
+#define XSYSMONPSU_MIN_SUP4_OFFSET   0x000000B0U
+#define XSYSMONPSU_MIN_SUP4_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP4_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP4_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP4_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup5
+ */
+#define XSYSMONPSU_MIN_SUP5_OFFSET   0x000000B4U
+#define XSYSMONPSU_MIN_SUP5_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP5_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP5_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP5_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup6
+ */
+#define XSYSMONPSU_MIN_SUP6_OFFSET   0x000000B8U
+#define XSYSMONPSU_MIN_SUP6_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP6_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP6_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP6_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuStsFlag
+ */
+#define XSYSMONPSU_STS_FLAG_OFFSET   0x000000FCU
+#define XSYSMONPSU_STS_FLAG_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_STS_FLAG_CLK_OSC_USED_SHIFT   15U
+#define XSYSMONPSU_STS_FLAG_CLK_OSC_USED_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_CLK_OSC_USED_MASK    0x00008000U
+
+#define XSYSMONPSU_STS_FLAG_BLK_IN_RST_SHIFT   14U
+#define XSYSMONPSU_STS_FLAG_BLK_IN_RST_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_BLK_IN_RST_MASK    0x00004000U
+
+#define XSYSMONPSU_STS_FLAG_JTAG_DISD_SHIFT   11U
+#define XSYSMONPSU_STS_FLAG_JTAG_DISD_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_JTAG_DISD_MASK    0x00000800U
+
+#define XSYSMONPSU_STS_FLAG_JTAG_RD_ONLY_SHIFT   10U
+#define XSYSMONPSU_STS_FLAG_JTAG_RD_ONLY_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_JTAG_RD_ONLY_MASK    0x00000400U
+
+#define XSYSMONPSU_STS_FLAG_INTRNL_REF_SHIFT   9U
+#define XSYSMONPSU_STS_FLAG_INTRNL_REF_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_INTRNL_REF_MASK    0x00000200U
+
+#define XSYSMONPSU_STS_FLAG_DISD_SHIFT   8U
+#define XSYSMONPSU_STS_FLAG_DISD_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_DISD_MASK    0x00000100U
+
+#define XSYSMONPSU_STS_FLAG_ALM_6_3_SHIFT   4U
+#define XSYSMONPSU_STS_FLAG_ALM_6_3_WIDTH   4U
+#define XSYSMONPSU_STS_FLAG_ALM_6_3_MASK    0x000000f0U
+
+#define XSYSMONPSU_STS_FLAG_OT_SHIFT   3U
+#define XSYSMONPSU_STS_FLAG_OT_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_OT_MASK    0x00000008U
+
+#define XSYSMONPSU_STS_FLAG_ALM_2_0_SHIFT   0U
+#define XSYSMONPSU_STS_FLAG_ALM_2_0_WIDTH   3U
+#define XSYSMONPSU_STS_FLAG_ALM_2_0_MASK    0x00000007U
+
+/**
+ * Register: XSysmonPsuCfgReg0
+ */
+#define XSYSMONPSU_CFG_REG0_OFFSET   0x00000100U
+#define XSYSMONPSU_CFG_REG0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CFG_REG0_AVRGNG_SHIFT   12U
+#define XSYSMONPSU_CFG_REG0_AVRGNG_WIDTH   2U
+#define XSYSMONPSU_CFG_REG0_AVRGNG_MASK    0x00003000U
+
+#define XSYSMONPSU_CFG_REG0_XTRNL_MUX_SHIFT   11U
+#define XSYSMONPSU_CFG_REG0_XTRNL_MUX_WIDTH   1U
+#define XSYSMONPSU_CFG_REG0_XTRNL_MUX_MASK    0x00000800U
+
+#define XSYSMONPSU_CFG_REG0_BU_SHIFT   10U
+#define XSYSMONPSU_CFG_REG0_BU_WIDTH   1U
+#define XSYSMONPSU_CFG_REG0_BU_MASK    0x00000400U
+
+#define XSYSMONPSU_CFG_REG0_EC_SHIFT   9U
+#define XSYSMONPSU_CFG_REG0_EC_WIDTH   1U
+#define XSYSMONPSU_CFG_REG0_EC_MASK    0x00000200U
+
+#define XSYSMONPSU_EVENT_MODE	1
+#define XSYSMONPSU_CONTINUOUS_MODE 2
+
+#define XSYSMONPSU_CFG_REG0_ACQ_SHIFT   8U
+#define XSYSMONPSU_CFG_REG0_ACQ_WIDTH   1U
+#define XSYSMONPSU_CFG_REG0_ACQ_MASK    0x00000100U
+
+#define XSYSMONPSU_CFG_REG0_MUX_CH_SHIFT   0U
+#define XSYSMONPSU_CFG_REG0_MUX_CH_WIDTH   6U
+#define XSYSMONPSU_CFG_REG0_MUX_CH_MASK    0x0000003fU
+
+/**
+ * Register: XSysmonPsuCfgReg1
+ */
+#define XSYSMONPSU_CFG_REG1_OFFSET   0x00000104U
+#define XSYSMONPSU_CFG_REG1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CFG_REG1_SEQ_MDE_SHIFT   12U
+#define XSYSMONPSU_CFG_REG1_SEQ_MDE_WIDTH   4U
+#define XSYSMONPSU_CFG_REG1_SEQ_MDE_MASK    0x0000f000U
+
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS6TO3_SHIFT   8U
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS6TO3_WIDTH   4U
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS6TO3_MASK    0x00000f00U
+
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS2TO0_SHIFT   1U
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS2TO0_WIDTH   3U
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS2TO0_MASK    0x0000000eU
+
+#define XSYSMONPSU_CFG_REG1_OVR_TEMP_DIS_SHIFT   0U
+#define XSYSMONPSU_CFG_REG1_OVR_TEMP_DIS_WIDTH   1U
+#define XSYSMONPSU_CFG_REG1_OVR_TEMP_DIS_MASK    0x00000001U
+
+#define XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK 0x00000f0fU
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP6_MASK		0x0800U
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP5_MASK		0x0400U
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP4_MASK		0x0200U
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP3_MASK		0x0100U
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP2_MASK		0x0008U
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP1_MASK		0x0004U
+#define XSYSMONPSU_CFR_REG1_ALRM_TEMP_MASK		0x0002U
+#define XSYSMONPSU_CFR_REG1_ALRM_OT_MASK		0x0001U
+
+/**
+ * Register: XSysmonPsuCfgReg2
+ */
+#define XSYSMONPSU_CFG_REG2_OFFSET   0x00000108U
+#define XSYSMONPSU_CFG_REG2_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT   8U
+#define XSYSMONPSU_CFG_REG2_CLK_DVDR_WIDTH   8U
+#define XSYSMONPSU_CFG_REG2_CLK_DVDR_MASK    0x0000ff00U
+
+#define XSYSMONPSU_CLK_DVDR_MIN_VAL			0U
+#define XSYSMONPSU_CLK_DVDR_MAX_VAL			255U
+
+#define XSYSMONPSU_CFG_REG2_PWR_DOWN_SHIFT   4U
+#define XSYSMONPSU_CFG_REG2_PWR_DOWN_WIDTH   4U
+#define XSYSMONPSU_CFG_REG2_PWR_DOWN_MASK    0x000000f0U
+
+#define XSYSMONPSU_CFG_REG2_TST_CH_EN_SHIFT   2U
+#define XSYSMONPSU_CFG_REG2_TST_CH_EN_WIDTH   1U
+#define XSYSMONPSU_CFG_REG2_TST_CH_EN_MASK    0x00000004U
+
+#define XSYSMONPSU_CFG_REG2_TST_MDE_SHIFT   0U
+#define XSYSMONPSU_CFG_REG2_TST_MDE_WIDTH   2U
+#define XSYSMONPSU_CFG_REG2_TST_MDE_MASK    0x00000003U
+
+/* Register: XSysmonPsuCfgReg3 */
+#define XSYSMONPSU_CFG_REG3_OFFSET		0x0000010CU
+#define XSYSMONPSU_CFG_REG3_ALRM_ALL_MASK	0x0000003FU
+
+#define XSM_CFG_ALARM_SHIFT			16U
+
+/* Register: XSysmonPsuSeqCh2 */
+#define XSYSMONPSU_SEQ_CH2_OFFSET   0x00000118U
+
+#define XSYSMONPSU_SEQ_CH2_TEMP_RMT_SHIFT	5U
+#define XSYSMONPSU_SEQ_CH2_TEMP_RMT_MASK	0x00000020U
+
+#define XSYSMONPSU_SEQ_CH2_VCCAMS_SHIFT		4U
+#define XSYSMONPSU_SEQ_CH2_VCCAMS_MASK		0x00000010U
+
+#define XSYSMONPSU_SEQ_CH2_SUP10_SHIFT		3U
+#define XSYSMONPSU_SEQ_CH2_SUP10_MASK		0x00000008U
+
+#define XSYSMONPSU_SEQ_CH2_SUP9_SHIFT		2U
+#define XSYSMONPSU_SEQ_CH2_SUP9_MASK		0x00000004U
+
+#define XSYSMONPSU_SEQ_CH2_SUP8_SHIFT		1U
+#define XSYSMONPSU_SEQ_CH2_SUP8_MASK		0x00000002U
+
+#define XSYSMONPSU_SEQ_CH2_SUP7_SHIFT		0U
+#define XSYSMONPSU_SEQ_CH2_SUP7_MASK		0x00000001U
+
+#define XSYSMONPSU_SEQ_CH2_VALID_MASK     	0x0000003FU
+
+/* Register: XSysmonPsuSeqAverage0 */
+#define XSYSMONPSU_SEQ_AVERAGE2_OFFSET  0x0000011CU
+#define XSYSMONPSU_SEQ_AVERAGE1_RSTVAL  0x00000000U
+#define XSYSMONPSU_SEQ_AVERAGE2_MASK	0x0000003FU
+
+/**
+ * Register: XSysmonPsuSeqCh0
+ */
+#define XSYSMONPSU_SEQ_CH0_OFFSET   0x00000120U
+#define XSYSMONPSU_SEQ_CH0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_CH0_CUR_MON_SHIFT   15U
+#define XSYSMONPSU_SEQ_CH0_CUR_MON_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_CUR_MON_MASK    0x00008000U
+
+#define XSYSMONPSU_SEQ_CH0_SUP3_SHIFT   14U
+#define XSYSMONPSU_SEQ_CH0_SUP3_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP3_MASK    0x00004000U
+
+#define XSYSMONPSU_SEQ_CH0_VREFN_SHIFT   13U
+#define XSYSMONPSU_SEQ_CH0_VREFN_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_VREFN_MASK    0x00002000U
+
+#define XSYSMONPSU_SEQ_CH0_VREFP_SHIFT   12U
+#define XSYSMONPSU_SEQ_CH0_VREFP_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_VREFP_MASK    0x00001000U
+
+#define XSYSMONPSU_SEQ_CH0_VP_VN_SHIFT   11U
+#define XSYSMONPSU_SEQ_CH0_VP_VN_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_VP_VN_MASK    0x00000800U
+
+#define XSYSMONPSU_SEQ_CH0_SUP2_SHIFT   10U
+#define XSYSMONPSU_SEQ_CH0_SUP2_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP2_MASK    0x00000400U
+
+#define XSYSMONPSU_SEQ_CH0_SUP1_SHIFT   9U
+#define XSYSMONPSU_SEQ_CH0_SUP1_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP1_MASK    0x00000200U
+
+#define XSYSMONPSU_SEQ_CH0_TEMP_SHIFT   8U
+#define XSYSMONPSU_SEQ_CH0_TEMP_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_TEMP_MASK    0x00000100U
+
+#define XSYSMONPSU_SEQ_CH0_SUP6_SHIFT   7U
+#define XSYSMONPSU_SEQ_CH0_SUP6_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP6_MASK    0x00000080U
+
+#define XSYSMONPSU_SEQ_CH0_SUP5_SHIFT   6U
+#define XSYSMONPSU_SEQ_CH0_SUP5_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP5_MASK    0x00000040U
+
+#define XSYSMONPSU_SEQ_CH0_SUP4_SHIFT   5U
+#define XSYSMONPSU_SEQ_CH0_SUP4_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP4_MASK    0x00000020U
+
+#define XSYSMONPSU_SEQ_CH0_TST_CH_SHIFT   3U
+#define XSYSMONPSU_SEQ_CH0_TST_CH_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_TST_CH_MASK    0x00000008U
+
+#define XSYSMONPSU_SEQ_CH0_CALIBRTN_SHIFT   0U
+#define XSYSMONPSU_SEQ_CH0_CALIBRTN_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_CALIBRTN_MASK    0x00000001U
+
+#define XSYSMONPSU_SEQ_CH0_VALID_MASK     0x0000FFE9U
+
+/**
+ * Register: XSysmonPsuSeqCh1
+ */
+#define XSYSMONPSU_SEQ_CH1_OFFSET         0x00000124U
+#define XSYSMONPSU_SEQ_CH1_VALID_MASK     0x0000FFFFU
+#define XSYSMONPSU_SEQ_CH1_RSTVAL         0x00000000U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0F_SHIFT   15U
+#define XSYSMONPSU_SEQ_CH1_VAUX0F_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0F_MASK    0x00008000U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0E_SHIFT   14U
+#define XSYSMONPSU_SEQ_CH1_VAUX0E_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0E_MASK    0x00004000U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0D_SHIFT   13U
+#define XSYSMONPSU_SEQ_CH1_VAUX0D_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0D_MASK    0x00002000U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0C_SHIFT   12U
+#define XSYSMONPSU_SEQ_CH1_VAUX0C_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0C_MASK    0x00001000U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0B_SHIFT   11U
+#define XSYSMONPSU_SEQ_CH1_VAUX0B_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0B_MASK    0x00000800U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0A_SHIFT   10U
+#define XSYSMONPSU_SEQ_CH1_VAUX0A_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0A_MASK    0x00000400U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX09_SHIFT   9U
+#define XSYSMONPSU_SEQ_CH1_VAUX09_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX09_MASK    0x00000200U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX08_SHIFT   8U
+#define XSYSMONPSU_SEQ_CH1_VAUX08_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX08_MASK    0x00000100U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX07_SHIFT   7U
+#define XSYSMONPSU_SEQ_CH1_VAUX07_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX07_MASK    0x00000080U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX06_SHIFT   6U
+#define XSYSMONPSU_SEQ_CH1_VAUX06_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX06_MASK    0x00000040U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX05_SHIFT   5U
+#define XSYSMONPSU_SEQ_CH1_VAUX05_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX05_MASK    0x00000020U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX04_SHIFT   4U
+#define XSYSMONPSU_SEQ_CH1_VAUX04_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX04_MASK    0x00000010U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX03_SHIFT   3U
+#define XSYSMONPSU_SEQ_CH1_VAUX03_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX03_MASK    0x00000008U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX02_SHIFT   2U
+#define XSYSMONPSU_SEQ_CH1_VAUX02_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX02_MASK    0x00000004U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX01_SHIFT   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX01_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX01_MASK    0x00000002U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX00_SHIFT   0U
+#define XSYSMONPSU_SEQ_CH1_VAUX00_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX00_MASK    0x00000001U
+
+#define XSM_SEQ_CH_SHIFT                  16U
+#define XSM_SEQ_CH2_SHIFT                 32U
+
+/**
+ * Register: XSysmonPsuSeqAverage0
+ */
+#define XSYSMONPSU_SEQ_AVERAGE0_OFFSET   0x00000128U
+#define XSYSMONPSU_SEQ_AVERAGE0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_AVERAGE0_SHIFT   0U
+#define XSYSMONPSU_SEQ_AVERAGE0_WIDTH   16U
+#define XSYSMONPSU_SEQ_AVERAGE0_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSeqAverage1
+ */
+#define XSYSMONPSU_SEQ_AVERAGE1_OFFSET   0x0000012CU
+#define XSYSMONPSU_SEQ_AVERAGE1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_AVERAGE1_SHIFT   0U
+#define XSYSMONPSU_SEQ_AVERAGE1_WIDTH   16U
+#define XSYSMONPSU_SEQ_AVERAGE1_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSeqInputMde0
+ */
+#define XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET   0x00000130U
+#define XSYSMONPSU_SEQ_INPUT_MDE0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_INPUT_MDE0_SHIFT   0U
+#define XSYSMONPSU_SEQ_INPUT_MDE0_WIDTH   16U
+#define XSYSMONPSU_SEQ_INPUT_MDE0_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSeqInputMde1
+ */
+#define XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET   0x00000134U
+#define XSYSMONPSU_SEQ_INPUT_MDE1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_INPUT_MDE1_SHIFT   0U
+#define XSYSMONPSU_SEQ_INPUT_MDE1_WIDTH   16U
+#define XSYSMONPSU_SEQ_INPUT_MDE1_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSeqAcq0
+ */
+#define XSYSMONPSU_SEQ_ACQ0_OFFSET   0x00000138U
+#define XSYSMONPSU_SEQ_ACQ0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_ACQ0_SHIFT   0U
+#define XSYSMONPSU_SEQ_ACQ0_WIDTH   16U
+#define XSYSMONPSU_SEQ_ACQ0_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSeqAcq1
+ */
+#define XSYSMONPSU_SEQ_ACQ1_OFFSET   0x0000013CU
+#define XSYSMONPSU_SEQ_ACQ1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_ACQ1_SHIFT   0U
+#define XSYSMONPSU_SEQ_ACQ1_WIDTH   16U
+#define XSYSMONPSU_SEQ_ACQ1_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmTempUpr
+ */
+#define XSYSMONPSU_ALRM_TEMP_UPR_OFFSET   0x00000140U
+#define XSYSMONPSU_ALRM_TEMP_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_TEMP_UPR_SHIFT   0U
+#define XSYSMONPSU_ALRM_TEMP_UPR_WIDTH   16U
+#define XSYSMONPSU_ALRM_TEMP_UPR_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup1Upr
+ */
+#define XSYSMONPSU_ALRM_SUP1_UPR_OFFSET   0x00000144U
+#define XSYSMONPSU_ALRM_SUP1_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP1_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP1_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP1_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup2Upr
+ */
+#define XSYSMONPSU_ALRM_SUP2_UPR_OFFSET   0x00000148U
+#define XSYSMONPSU_ALRM_SUP2_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP2_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP2_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP2_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmOtUpr
+ */
+#define XSYSMONPSU_ALRM_OT_UPR_OFFSET   0x0000014CU
+#define XSYSMONPSU_ALRM_OT_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_OT_UPR_TEMP_SHIFT   0U
+#define XSYSMONPSU_ALRM_OT_UPR_TEMP_WIDTH   16U
+#define XSYSMONPSU_ALRM_OT_UPR_TEMP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmTempLwr
+ */
+#define XSYSMONPSU_ALRM_TEMP_LWR_OFFSET   0x00000150U
+#define XSYSMONPSU_ALRM_TEMP_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_TEMP_LWR_SHIFT   1U
+#define XSYSMONPSU_ALRM_TEMP_LWR_WIDTH   15U
+#define XSYSMONPSU_ALRM_TEMP_LWR_MASK    0x0000fffeU
+
+#define XSYSMONPSU_ALRM_TEMP_LWR_TSHLD_MDE_SHIFT   0U
+#define XSYSMONPSU_ALRM_TEMP_LWR_TSHLD_MDE_WIDTH   1U
+#define XSYSMONPSU_ALRM_TEMP_LWR_TSHLD_MDE_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuAlrmSup1Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP1_LWR_OFFSET   0x00000154U
+#define XSYSMONPSU_ALRM_SUP1_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP1_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP1_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP1_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup2Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP2_LWR_OFFSET   0x00000158U
+#define XSYSMONPSU_ALRM_SUP2_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP2_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP2_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP2_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmOtLwr
+ */
+#define XSYSMONPSU_ALRM_OT_LWR_OFFSET   0x0000015CU
+#define XSYSMONPSU_ALRM_OT_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_OT_LWR_TEMP_SHIFT   1U
+#define XSYSMONPSU_ALRM_OT_LWR_TEMP_WIDTH   15U
+#define XSYSMONPSU_ALRM_OT_LWR_TEMP_MASK    0x0000fffeU
+
+#define XSYSMONPSU_ALRM_OT_LWR_TSHLD_MDE_SHIFT   0U
+#define XSYSMONPSU_ALRM_OT_LWR_TSHLD_MDE_WIDTH   1U
+#define XSYSMONPSU_ALRM_OT_LWR_TSHLD_MDE_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuAlrmSup3Upr
+ */
+#define XSYSMONPSU_ALRM_SUP3_UPR_OFFSET   0x00000160U
+#define XSYSMONPSU_ALRM_SUP3_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP3_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP3_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP3_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup4Upr
+ */
+#define XSYSMONPSU_ALRM_SUP4_UPR_OFFSET   0x00000164U
+#define XSYSMONPSU_ALRM_SUP4_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP4_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP4_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP4_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup5Upr
+ */
+#define XSYSMONPSU_ALRM_SUP5_UPR_OFFSET   0x00000168U
+#define XSYSMONPSU_ALRM_SUP5_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP5_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP5_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP5_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup6Upr
+ */
+#define XSYSMONPSU_ALRM_SUP6_UPR_OFFSET   0x0000016CU
+#define XSYSMONPSU_ALRM_SUP6_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP6_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP6_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP6_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup3Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP3_LWR_OFFSET   0x00000170U
+#define XSYSMONPSU_ALRM_SUP3_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP3_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP3_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP3_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup4Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP4_LWR_OFFSET   0x00000174U
+#define XSYSMONPSU_ALRM_SUP4_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP4_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP4_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP4_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup5Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP5_LWR_OFFSET   0x00000178U
+#define XSYSMONPSU_ALRM_SUP5_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP5_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP5_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP5_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup6Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP6_LWR_OFFSET   0x0000017CU
+#define XSYSMONPSU_ALRM_SUP6_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP6_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP6_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP6_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup7Upr
+ */
+#define XSYSMONPSU_ALRM_SUP7_UPR_OFFSET   0x00000180U
+#define XSYSMONPSU_ALRM_SUP7_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP7_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP7_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP7_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup8Upr
+ */
+#define XSYSMONPSU_ALRM_SUP8_UPR_OFFSET   0x00000184U
+#define XSYSMONPSU_ALRM_SUP8_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP8_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP8_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP8_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup9Upr
+ */
+#define XSYSMONPSU_ALRM_SUP9_UPR_OFFSET   0x00000188U
+#define XSYSMONPSU_ALRM_SUP9_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP9_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP9_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP9_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup10Upr
+ */
+#define XSYSMONPSU_ALRM_SUP10_UPR_OFFSET   0x0000018CU
+#define XSYSMONPSU_ALRM_SUP10_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP10_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP10_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP10_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmVccamsUpr
+ */
+#define XSYSMONPSU_ALRM_VCCAMS_UPR_OFFSET   0x00000190U
+#define XSYSMONPSU_ALRM_VCCAMS_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_VCCAMS_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_VCCAMS_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_VCCAMS_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmTremoteUpr
+ */
+#define XSYSMONPSU_ALRM_TREMOTE_UPR_OFFSET   0x00000194U
+#define XSYSMONPSU_ALRM_TREMOTE_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_TREMOTE_UPR_TEMP_SHIFT   0U
+#define XSYSMONPSU_ALRM_TREMOTE_UPR_TEMP_WIDTH   16U
+#define XSYSMONPSU_ALRM_TREMOTE_UPR_TEMP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup7Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP7_LWR_OFFSET   0x000001A0U
+#define XSYSMONPSU_ALRM_SUP7_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP7_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP7_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP7_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup8Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP8_LWR_OFFSET   0x000001A4U
+#define XSYSMONPSU_ALRM_SUP8_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP8_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP8_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP8_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup9Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP9_LWR_OFFSET   0x000001A8U
+#define XSYSMONPSU_ALRM_SUP9_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP9_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP9_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP9_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup10Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP10_LWR_OFFSET   0x000001ACU
+#define XSYSMONPSU_ALRM_SUP10_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP10_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP10_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP10_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmVccamsLwr
+ */
+#define XSYSMONPSU_ALRM_VCCAMS_LWR_OFFSET   0x000001B0U
+#define XSYSMONPSU_ALRM_VCCAMS_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_VCCAMS_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_VCCAMS_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_VCCAMS_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmTremoteLwr
+ */
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_OFFSET   0x000001B4U
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TEMP_SHIFT   1U
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TEMP_WIDTH   15U
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TEMP_MASK    0x0000fffeU
+
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TSHLD_MDE_SHIFT   0U
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TSHLD_MDE_WIDTH   1U
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TSHLD_MDE_MASK    0x00000001U
+
+/* Register: XSysmonPsuSeqInputMde2 */
+#define XSYSMONPSU_SEQ_INPUT_MDE2_OFFSET	0x000001E0U
+#define XSYSMONPSU_SEQ_INPUT_MDE2_RSTVAL	0x00000000U
+
+#define XSYSMONPSU_SEQ_INPUT_MDE2_SHIFT		0U
+#define XSYSMONPSU_SEQ_INPUT_MDE2_MASK		0x0000003FU
+
+/**
+ * Register: XSysmonPsuSeqAcq2
+ */
+#define XSYSMONPSU_SEQ_ACQ2_OFFSET		0x000001E4U
+#define XSYSMONPSU_SEQ_ACQ2_RSTVAL		0x00000000U
+
+#define XSYSMONPSU_SEQ_ACQ2_SHIFT		0U
+#define XSYSMONPSU_SEQ_ACQ2_MASK		0x0000003FU
+
+/**
+ * Register: XSysmonPsuSup7
+ */
+#define XSYSMONPSU_SUP7_OFFSET   0x00000200U
+#define XSYSMONPSU_SUP7_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP7_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP7_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP7_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup8
+ */
+#define XSYSMONPSU_SUP8_OFFSET   0x00000204U
+#define XSYSMONPSU_SUP8_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP8_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP8_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP8_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup9
+ */
+#define XSYSMONPSU_SUP9_OFFSET   0x00000208U
+#define XSYSMONPSU_SUP9_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP9_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP9_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP9_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup10
+ */
+#define XSYSMONPSU_SUP10_OFFSET   0x0000020CU
+#define XSYSMONPSU_SUP10_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP10_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP10_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP10_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccams
+ */
+#define XSYSMONPSU_VCCAMS_OFFSET   0x00000210U
+#define XSYSMONPSU_VCCAMS_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCCAMS_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_VCCAMS_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_VCCAMS_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuTempRemte
+ */
+#define XSYSMONPSU_TEMP_REMTE_OFFSET   0x00000214U
+#define XSYSMONPSU_TEMP_REMTE_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_TEMP_REMTE_SHIFT   0U
+#define XSYSMONPSU_TEMP_REMTE_WIDTH   16U
+#define XSYSMONPSU_TEMP_REMTE_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup7
+ */
+#define XSYSMONPSU_MAX_SUP7_OFFSET   0x00000280U
+#define XSYSMONPSU_MAX_SUP7_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP7_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP7_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP7_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup8
+ */
+#define XSYSMONPSU_MAX_SUP8_OFFSET   0x00000284U
+#define XSYSMONPSU_MAX_SUP8_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP8_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP8_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP8_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup9
+ */
+#define XSYSMONPSU_MAX_SUP9_OFFSET   0x00000288U
+#define XSYSMONPSU_MAX_SUP9_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP9_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP9_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP9_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup10
+ */
+#define XSYSMONPSU_MAX_SUP10_OFFSET   0x0000028CU
+#define XSYSMONPSU_MAX_SUP10_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP10_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP10_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP10_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxVccams
+ */
+#define XSYSMONPSU_MAX_VCCAMS_OFFSET   0x00000290U
+#define XSYSMONPSU_MAX_VCCAMS_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_VCCAMS_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_VCCAMS_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_VCCAMS_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxTempRemte
+ */
+#define XSYSMONPSU_MAX_TEMP_REMTE_OFFSET   0x00000294U
+#define XSYSMONPSU_MAX_TEMP_REMTE_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_TEMP_REMTE_SHIFT   0U
+#define XSYSMONPSU_MAX_TEMP_REMTE_WIDTH   16U
+#define XSYSMONPSU_MAX_TEMP_REMTE_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup7
+ */
+#define XSYSMONPSU_MIN_SUP7_OFFSET   0x000002A0U
+#define XSYSMONPSU_MIN_SUP7_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP7_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP7_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP7_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup8
+ */
+#define XSYSMONPSU_MIN_SUP8_OFFSET   0x000002A4U
+#define XSYSMONPSU_MIN_SUP8_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP8_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP8_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP8_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup9
+ */
+#define XSYSMONPSU_MIN_SUP9_OFFSET   0x000002A8U
+#define XSYSMONPSU_MIN_SUP9_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP9_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP9_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP9_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup10
+ */
+#define XSYSMONPSU_MIN_SUP10_OFFSET   0x000002ACU
+#define XSYSMONPSU_MIN_SUP10_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP10_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP10_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP10_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinVccams
+ */
+#define XSYSMONPSU_MIN_VCCAMS_OFFSET   0x000002B0U
+#define XSYSMONPSU_MIN_VCCAMS_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_VCCAMS_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_VCCAMS_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_VCCAMS_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinTempRemte
+ */
+#define XSYSMONPSU_MIN_TEMP_REMTE_OFFSET   0x000002B4U
+#define XSYSMONPSU_MIN_TEMP_REMTE_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_TEMP_REMTE_SHIFT   0U
+#define XSYSMONPSU_MIN_TEMP_REMTE_WIDTH   16U
+#define XSYSMONPSU_MIN_TEMP_REMTE_MASK    0x0000ffffU
+
+#define CSU_BASEADDR			0xFFCA0000U
+#define PCAP_STATUS_OFFSET		0x00003010U
+#define PL_CFG_RESET_MASK		0x00000040U
+#define PL_CFG_RESET_SHIFT		6U
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* This macro reads the given register.
+*
+* @param	RegisterAddr is the register address in the address
+* 			space of the SYSMONPSU device.
+*
+* @return	The 32-bit value of the register
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XSysmonPsu_ReadReg(RegisterAddr) Xil_In32(RegisterAddr)
+
+/****************************************************************************/
+/**
+*
+* This macro writes the given register.
+*
+* @param	RegisterAddr is the register address in the address
+* 			space of the SYSMONPSU device.
+* @param	Data is the 32-bit value to write to the register.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XSysmonPsu_WriteReg(RegisterAddr, Data) Xil_Out32(RegisterAddr, (u32)(Data))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XSYSMONPSU_HW_H__ */
diff --git a/src/Xilinx/include/xtime_l.h b/src/Xilinx/include/xtime_l.h
new file mode 100644
index 0000000..4974664
--- /dev/null
+++ b/src/Xilinx/include/xtime_l.h
@@ -0,0 +1,102 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.h
+*
+* @addtogroup r5_time_apis Cortex R5 Time Functions
+* The xtime_l.h provides access to 32-bit TTC timer counter. These functions
+* can be used by applications to track the time.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.00 	pkp	   05/29/14 First release
+* 5.04  pkp	   02/19/16 Added timer configuration register offset definitions
+* 5.04	pkp	   03/11/16 Removed definitions for overflow interrupt register
+*						and mask
+* 6.6   srm    10/22/17 Added a warning message for the user configurable sleep
+*                       implementation when default timer is selected by the user
+* 

+*
+******************************************************************************/
+
+#ifndef XTIME_H /* prevent circular inclusions */
+#define XTIME_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xparameters.h"
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Constant Definitions *****************************/
+
+#ifdef SLEEP_TIMER_BASEADDR
+
+#define COUNTS_PER_SECOND				SLEEP_TIMER_FREQUENCY
+#define COUNTS_PER_USECOND 				COUNTS_PER_SECOND/1000000
+
+#else
+#define ITERS_PER_SEC  (XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ / 4)
+#define ITERS_PER_USEC  (XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ / 4000000)
+#define IRQ_FIQ_MASK 	0xC0	/* Mask IRQ and FIQ interrupts in cpsr */
+#endif
+
+#if defined (XSLEEP_TIMER_IS_DEFAULT_TIMER)
+#pragma message ("For the sleep routines, TTC3 is used if present else the assembly instructions are called")
+#endif
+
+/**************************** Type Definitions *******************************/
+
+/* The following definitions are applicable only when TTC3 is present*/
+#ifdef SLEEP_TIMER_BASEADDR
+typedef u32 XTime;
+
+void XTime_SetTime(XTime Xtime_Global);
+void XTime_GetTime(XTime *Xtime_Global);
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XTIME_H */
+/**
+* @} End of "@addtogroup r5_time_apis".
+*/
diff --git a/src/Xilinx/include/xttcps.h b/src/Xilinx/include/xttcps.h
new file mode 100644
index 0000000..b7b4e19
--- /dev/null
+++ b/src/Xilinx/include/xttcps.h
@@ -0,0 +1,467 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xttcps.h
+* @addtogroup ttcps_v3_5
+* @{
+* @details
+*
+* This is the driver for one 16-bit timer counter in the Triple Timer Counter
+* (TTC) module in the Ps block.
+*
+* The TTC module provides three independent timer/counter modules that can each
+* be clocked using either the system clock (pclk) or an externally driven
+* clock (ext_clk). In addition, each counter can independently prescale its
+* selected clock input (divided by 2 to 65536). Counters can be set to
+* decrement or increment.
+*
+* Each of the counters can be programmed to generate interrupt pulses:
+*	. At a regular, predefined period, that is on a timed interval
+*	. When the counter registers overflow
+* 	. When the count matches any one of the three 'match' registers
+*
+* Therefore, up to six different events can trigger a timer interrupt: three
+* match interrupts, an overflow interrupt, an interval interrupt and an event
+* timer interrupt. Note that the overflow interrupt and the interval interrupt
+* are mutually exclusive.
+*
+* Initialization & Configuration
+*
+* An XTtcPs_Config structure is used to configure a driver instance.
+* Information in the XTtcPs_Config structure is the hardware properties
+* about the device.
+*
+* A driver instance is initialized through
+* XTtcPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr). Where CfgPtr
+* is a pointer to the XTtcPs_Config structure, it can be looked up statically
+* through XTtcPs_LookupConfig(DeviceID), or passed in by the caller. The
+* EffectiveAddr can be the static base address of the device or virtual
+* mapped address if address translation is supported.
+*
+* Interrupts
+*
+* Interrupt handler is not provided by the driver, as handling of interrupt
+* is application specific.
+*
+* @note
+* The default setting for a timer/counter is:
+*  - Overflow Mode
+*  - Internal clock (pclk) selected
+*  - Counter disabled
+*  - All Interrupts disabled
+*  - Output waveforms disabled
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -----------------------------------------------------
+* 1.00a drg/jz 01/20/10 First release..
+* 2.0   adk    12/10/13 Updated as per the New Tcl API's
+* 3.0	pkp    12/09/14 Added support for Zynq Ultrascale Mp.Also code
+*			modified for MISRA-C:2012 compliance.
+* 3.2   mus    10/28/16 Modified XTtcPs_GetCounterValue and XTtcPs_SetInterval
+*                       macros to return 32 bit values for zynq ultrascale+mpsoc
+*       ms   01/23/17 Modified xil_printf statement in main function for all
+*                     examples to ensure that "Successfully ran" and "Failed"
+*                     strings are available in all examples. This is a fix
+*                     for CR-965028.
+*       ms   03/17/17 Added readme.txt file in examples folder for doxygen
+*                     generation.
+* 3.4   ms   04/18/17 Modified tcl file to add suffix U for all macros
+*                     definitions of ttcps in xparameters.h
+* 3.5   srm  10/06/17 Added new typedef XMatchRegValue for match register width
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XTTCPS_H		/* prevent circular inclusions */
+#define XTTCPS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xttcps_hw.h"
+#include "xstatus.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/*
+ * Maximum Value for interval counter
+ */
+ #if defined(ARMA9)
+ #define XTTCPS_MAX_INTERVAL_COUNT 0xFFFFU
+ #else
+ #define XTTCPS_MAX_INTERVAL_COUNT 0xFFFFFFFFU
+ #endif
+
+/** @name Configuration options
+ *
+ * Options for the device. Each of the options is bit field, so more than one
+ * options can be specified.
+ *
+ * @{
+ */
+#define XTTCPS_OPTION_EXTERNAL_CLK	0x00000001U 	/**< External clock source */
+#define XTTCPS_OPTION_CLK_EDGE_NEG	0x00000002U	/**< Clock on trailing edge for
+						     external clock*/
+#define XTTCPS_OPTION_INTERVAL_MODE	0x00000004U	/**< Interval mode */
+#define XTTCPS_OPTION_DECREMENT		0x00000008U	/**< Decrement the counter */
+#define XTTCPS_OPTION_MATCH_MODE	0x00000010U	/**< Match mode */
+#define XTTCPS_OPTION_WAVE_DISABLE	0x00000020U 	/**< No waveform output */
+#define XTTCPS_OPTION_WAVE_POLARITY	0x00000040U	/**< Waveform polarity */
+/*@}*/
+/**************************** Type Definitions *******************************/
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;	  /**< Unique ID for device */
+	u32 BaseAddress;  /**< Base address for device */
+	u32 InputClockHz; /**< Input clock frequency */
+} XTtcPs_Config;
+
+/**
+ * The XTtcPs driver instance data. The user is required to allocate a
+ * variable of this type for each PS timer/counter device in the system. A
+ * pointer to a variable of this type is then passed to various driver API
+ * functions.
+ */
+typedef struct {
+	XTtcPs_Config Config;	/**< Configuration structure */
+	u32 IsReady;		/**< Device is initialized and ready */
+} XTtcPs;
+
+/**
+ * This typedef contains interval count and Match register value
+ */
+#if defined(ARMA9)
+typedef u16 XInterval;
+typedef u16 XMatchRegValue;
+#else
+typedef u32 XInterval;
+typedef u32 XMatchRegValue;
+#endif
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*
+ * Internal helper macros
+ */
+#define InstReadReg(InstancePtr, RegOffset) \
+    (Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)(RegOffset)))
+
+#define InstWriteReg(InstancePtr, RegOffset, Data) \
+    (Xil_Out32(((InstancePtr)->Config.BaseAddress) + (u32)(RegOffset), (u32)(Data)))
+
+/*****************************************************************************/
+/**
+*
+* This function starts the counter/timer without resetting the counter value.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	None
+*
+* @note		C-style signature:
+*		void XTtcPs_Start(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#define XTtcPs_Start(InstancePtr)	\
+		InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET,	\
+		(InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) &	\
+		 ~XTTCPS_CNT_CNTRL_DIS_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function stops the counter/timer. This macro may be called at any time
+* to stop the counter. The counter holds the last value until it is reset,
+* restarted or enabled.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	None
+*
+* @note		C-style signature:
+*		void XTtcPs_Stop(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#define XTtcPs_Stop(InstancePtr)		\
+		InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET,	\
+		(InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) |	\
+		 XTTCPS_CNT_CNTRL_DIS_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function checks whether the timer counter has already started.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance
+*
+* @return	Non-zero if the device has started, '0' otherwise.
+*
+* @note		C-style signature:
+*		int XTtcPs_IsStarted(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#define XTtcPs_IsStarted(InstancePtr) \
+     ((InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) & \
+       XTTCPS_CNT_CNTRL_DIS_MASK) == 0U)
+
+/*****************************************************************************/
+/**
+*
+* This function returns the current 16-bit counter value. It may be called at
+* any time.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	zynq:16 bit counter value.
+*           zynq ultrascale+mpsoc:32 bit counter value.
+*
+* @note		C-style signature:
+*		zynq: u16 XTtcPs_GetCounterValue(XTtcPs *InstancePtr)
+*       zynq ultrascale+mpsoc: u32 XTtcPs_GetCounterValue(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#if defined(ARMA9)
+/*
+ * ttc supports 16 bit counter for zynq
+ */
+#define XTtcPs_GetCounterValue(InstancePtr) \
+		(u16)InstReadReg((InstancePtr), XTTCPS_COUNT_VALUE_OFFSET)
+#else
+/*
+ * ttc supports 32 bit counter for zynq ultrascale+mpsoc
+ */
+#define XTtcPs_GetCounterValue(InstancePtr) \
+               InstReadReg((InstancePtr), XTTCPS_COUNT_VALUE_OFFSET)
+#endif
+
+/*****************************************************************************/
+/**
+*
+* This function sets the interval value to be used in interval mode.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	Value is the 16-bit value to be set in the interval register.
+*
+* @return	None
+*
+* @note		C-style signature:
+*		void XTtcPs_SetInterval(XTtcPs *InstancePtr, XInterval Value)
+*
+****************************************************************************/
+#define XTtcPs_SetInterval(InstancePtr, Value)	\
+		InstWriteReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET, (Value))
+
+/*****************************************************************************/
+/**
+*
+* This function gets the interval value from the interval register.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	zynq:16 bit interval value.
+*           zynq ultrascale+mpsoc:32 bit interval value.
+*
+* @note		C-style signature:
+*		zynq: u16 XTtcPs_GetInterval(XTtcPs *InstancePtr)
+*       zynq ultrascale+mpsoc: u32 XTtcPs_GetInterval(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#if defined(ARMA9)
+/*
+ * ttc supports 16 bit interval counter for zynq
+ */
+#define XTtcPs_GetInterval(InstancePtr) \
+		(u16)InstReadReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET)
+#else
+/*
+ * ttc supports 32 bit interval counter for zynq ultrascale+mpsoc
+ */
+#define XTtcPs_GetInterval(InstancePtr) \
+		InstReadReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET)
+#endif
+/*****************************************************************************/
+/**
+*
+* This macro resets the count register. It may be called at any time. The
+* counter is reset to either 0 or 0xFFFF, or the interval value, depending on
+* the increment/decrement mode. The state of the counter, as started or
+* stopped, is not affected by calling reset.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	None
+*
+* @note		C-style signature:
+*		void XTtcPs_ResetCounterValue(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#define XTtcPs_ResetCounterValue(InstancePtr) \
+		InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET,	\
+		(InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) | \
+		 (u32)XTTCPS_CNT_CNTRL_RST_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function enables the interrupts.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	InterruptMask defines which interrupt should be enabled.
+*		Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
+*		This is a bit mask, all set bits will be enabled, cleared bits
+*		will not be disabled.
+*
+* @return	None.
+*
+* @note
+* C-style signature:
+*	void XTtcPs_EnableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
+*
+******************************************************************************/
+#define XTtcPs_EnableInterrupts(InstancePtr, InterruptMask)		\
+		InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET,		\
+		(InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) |	\
+		 (InterruptMask)))
+
+/*****************************************************************************/
+/**
+*
+* This function disables the interrupts.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	InterruptMask defines which interrupt should be disabled.
+*		Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
+*		This is a bit mask, all set bits will be disabled, cleared bits
+*		will not be disabled.
+*
+* @return	None.
+*
+* @note
+* C-style signature:
+*	void XTtcPs_DisableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
+*
+******************************************************************************/
+#define XTtcPs_DisableInterrupts(InstancePtr, InterruptMask) \
+		InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET,	\
+		(InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) &	\
+		 ~(InterruptMask)))
+
+/*****************************************************************************/
+/**
+*
+* This function reads the interrupt status.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		u32 XTtcPs_GetInterruptStatus(XTtcPs *InstancePtr)
+*
+******************************************************************************/
+#define XTtcPs_GetInterruptStatus(InstancePtr)	 \
+		InstReadReg((InstancePtr), XTTCPS_ISR_OFFSET)
+
+/*****************************************************************************/
+/**
+*
+* This function clears the interrupt status.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	InterruptMask defines which interrupt should be cleared.
+*		Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
+*		This is a bit mask, all set bits will be cleared, cleared bits
+*		will not be cleared.
+*
+* @return	None.
+*
+* @note
+* C-style signature:
+*	void XTtcPs_ClearInterruptStatus(XTtcPs *InstancePtr, u32 InterruptMask)
+*
+******************************************************************************/
+#define XTtcPs_ClearInterruptStatus(InstancePtr, InterruptMask) \
+		InstWriteReg((InstancePtr), XTTCPS_ISR_OFFSET, \
+		 (InterruptMask))
+
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Initialization functions in xttcps_sinit.c
+ */
+XTtcPs_Config *XTtcPs_LookupConfig(u16 DeviceId);
+
+/*
+ * Required functions, in xttcps.c
+ */
+s32 XTtcPs_CfgInitialize(XTtcPs *InstancePtr,
+         XTtcPs_Config * ConfigPtr, u32 EffectiveAddr);
+
+void XTtcPs_SetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex, XMatchRegValue Value);
+XMatchRegValue XTtcPs_GetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex);
+
+void XTtcPs_SetPrescaler(XTtcPs *InstancePtr, u8 PrescalerValue);
+u8 XTtcPs_GetPrescaler(XTtcPs *InstancePtr);
+
+void XTtcPs_CalcIntervalFromFreq(XTtcPs *InstancePtr, u32 Freq,
+        XInterval *Interval, u8 *Prescaler);
+
+/*
+ * Functions for options, in file xttcps_options.c
+ */
+s32 XTtcPs_SetOptions(XTtcPs *InstancePtr, u32 Options);
+u32 XTtcPs_GetOptions(XTtcPs *InstancePtr);
+
+/*
+ * Function for self-test, in file xttcps_selftest.c
+ */
+s32 XTtcPs_SelfTest(XTtcPs *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xttcps_hw.h b/src/Xilinx/include/xttcps_hw.h
new file mode 100644
index 0000000..b1fa545
--- /dev/null
+++ b/src/Xilinx/include/xttcps_hw.h
@@ -0,0 +1,233 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xttcps_hw.h
+* @addtogroup ttcps_v3_5
+* @{
+*
+* This file defines the hardware interface to one of the three timer counters
+* in the Ps block.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -------------------------------------------------
+* 1.00a drg/jz 01/21/10 First release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.5   srm    10/06/17 Updated XTTCPS_COUNT_VALUE_MASK,
+*                       XTTCPS_INTERVAL_VAL_MASK, XTTCPS_MATCH_MASK macros to
+*                       mask 16 bit values for zynq and 32 bit values for
+*                       zynq ultrascale+mpsoc "
+* 

+*
+******************************************************************************/
+
+#ifndef XTTCPS_HW_H		/* prevent circular inclusions */
+#define XTTCPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+/*
+ * Flag for a9 processor
+ */
+ #if !defined (ARMR5) && !defined (__aarch64__) && !defined (ARMA53_32)
+ #define ARMA9
+ #endif
+
+/** @name Register Map
+ *
+ * Register offsets from the base address of the device.
+ *
+ * @{
+ */
+#define XTTCPS_CLK_CNTRL_OFFSET		0x00000000U  /**< Clock Control Register */
+#define XTTCPS_CNT_CNTRL_OFFSET		0x0000000CU  /**< Counter Control Register*/
+#define XTTCPS_COUNT_VALUE_OFFSET	0x00000018U  /**< Current Counter Value */
+#define XTTCPS_INTERVAL_VAL_OFFSET	0x00000024U  /**< Interval Count Value */
+#define XTTCPS_MATCH_0_OFFSET		0x00000030U  /**< Match 1 value */
+#define XTTCPS_MATCH_1_OFFSET		0x0000003CU  /**< Match 2 value */
+#define XTTCPS_MATCH_2_OFFSET		0x00000048U  /**< Match 3 value */
+#define XTTCPS_ISR_OFFSET			0x00000054U  /**< Interrupt Status Register */
+#define XTTCPS_IER_OFFSET			0x00000060U  /**< Interrupt Enable Register */
+/* @} */
+
+/** @name Clock Control Register
+ * Clock Control Register definitions
+ * @{
+ */
+#define XTTCPS_CLK_CNTRL_PS_EN_MASK		0x00000001U  /**< Prescale enable */
+#define XTTCPS_CLK_CNTRL_PS_VAL_MASK	0x0000001EU  /**< Prescale value */
+#define XTTCPS_CLK_CNTRL_PS_VAL_SHIFT			 1U  /**< Prescale shift */
+#define XTTCPS_CLK_CNTRL_PS_DISABLE				16U  /**< Prescale disable */
+#define XTTCPS_CLK_CNTRL_SRC_MASK		0x00000020U  /**< Clock source */
+#define XTTCPS_CLK_CNTRL_EXT_EDGE_MASK	0x00000040U  /**< External Clock edge */
+/* @} */
+
+/** @name Counter Control Register
+ * Counter Control Register definitions
+ * @{
+ */
+#define XTTCPS_CNT_CNTRL_DIS_MASK		0x00000001U /**< Disable the counter */
+#define XTTCPS_CNT_CNTRL_INT_MASK		0x00000002U /**< Interval mode */
+#define XTTCPS_CNT_CNTRL_DECR_MASK		0x00000004U /**< Decrement mode */
+#define XTTCPS_CNT_CNTRL_MATCH_MASK		0x00000008U /**< Match mode */
+#define XTTCPS_CNT_CNTRL_RST_MASK		0x00000010U /**< Reset counter */
+#define XTTCPS_CNT_CNTRL_EN_WAVE_MASK	0x00000020U /**< Enable waveform */
+#define XTTCPS_CNT_CNTRL_POL_WAVE_MASK	0x00000040U /**< Waveform polarity */
+#define XTTCPS_CNT_CNTRL_RESET_VALUE	0x00000021U /**< Reset value */
+/* @} */
+
+/** @name Current Counter Value Register
+ * Current Counter Value Register definitions
+ * @{
+ */
+#if defined(ARMA9)
+#define XTTCPS_COUNT_VALUE_MASK		0x0000FFFFU /**< 16-bit counter value */
+#else
+#define XTTCPS_COUNT_VALUE_MASK		0xFFFFFFFFU /**< 32-bit counter value */
+#endif
+/* @} */
+
+/** @name Interval Value Register
+ * Interval Value Register is the maximum value the counter will count up or
+ * down to.
+ * @{
+ */
+#if defined(ARMA9)
+#define XTTCPS_INTERVAL_VAL_MASK	0x0000FFFFU /**< 16-bit Interval value*/
+#else
+#define XTTCPS_INTERVAL_VAL_MASK	0xFFFFFFFFU /**< 32-bit Interval value*/
+#endif
+/* @} */
+
+/** @name Match Registers
+ * Definitions for Match registers, each timer counter has three match
+ * registers.
+ * @{
+ */
+#if defined(ARMA9)
+#define XTTCPS_MATCH_MASK		0x0000FFFFU /**< 16-bit Match value */
+#else
+#define XTTCPS_MATCH_MASK		0xFFFFFFFFU /**< 32-bit Match value */
+#endif
+#define XTTCPS_NUM_MATCH_REG			 3U /**< Num of Match reg */
+/* @} */
+
+/** @name Interrupt Registers
+ * Following register bit mask is for all interrupt registers.
+ *
+ * @{
+ */
+#define XTTCPS_IXR_INTERVAL_MASK	0x00000001U  /**< Interval Interrupt */
+#define XTTCPS_IXR_MATCH_0_MASK		0x00000002U  /**< Match 1 Interrupt */
+#define XTTCPS_IXR_MATCH_1_MASK		0x00000004U  /**< Match 2 Interrupt */
+#define XTTCPS_IXR_MATCH_2_MASK		0x00000008U  /**< Match 3 Interrupt */
+#define XTTCPS_IXR_CNT_OVR_MASK		0x00000010U  /**< Counter Overflow */
+#define XTTCPS_IXR_ALL_MASK			0x0000001FU  /**< All valid Interrupts */
+/* @} */
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* Read the given Timer Counter register.
+*
+* @param	BaseAddress is the base address of the timer counter device.
+* @param	RegOffset is the register offset to be read
+*
+* @return	The 32-bit value of the register
+*
+* @note		C-style signature:
+*		u32 XTtcPs_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+*****************************************************************************/
+#define XTtcPs_ReadReg(BaseAddress, RegOffset) \
+    (Xil_In32((BaseAddress) + (u32)(RegOffset)))
+
+/****************************************************************************/
+/**
+*
+* Write the given Timer Counter register.
+*
+* @param	BaseAddress is the base address of the timer counter device.
+* @param	RegOffset is the register offset to be written
+* @param	Data is the 32-bit value to write to the register
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XTtcPs_WriteReg(XTtcPs BaseAddress, u32 RegOffset,
+*		u32 Data)
+*
+*****************************************************************************/
+#define XTtcPs_WriteReg(BaseAddress, RegOffset, Data) \
+    (Xil_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data)))
+
+/****************************************************************************/
+/**
+*
+* Calculate a match register offset using the Match Register index.
+*
+* @param	MatchIndex is the 0-2 value of the match register
+*
+* @return	MATCH_N_OFFSET.
+*
+* @note		C-style signature:
+*		u32 XTtcPs_Match_N_Offset(u8 MatchIndex)
+*
+*****************************************************************************/
+#define XTtcPs_Match_N_Offset(MatchIndex) \
+		((u32)XTTCPS_MATCH_0_OFFSET + ((u32)(12U) * (u32)(MatchIndex)))
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+#ifdef __cplusplus
+}
+#endif
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xuartps.h b/src/Xilinx/include/xuartps.h
new file mode 100644
index 0000000..33758c2
--- /dev/null
+++ b/src/Xilinx/include/xuartps.h
@@ -0,0 +1,520 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xuartps.h
+* @addtogroup uartps_v3_5
+* @{
+* @details
+*
+* This driver supports the following features:
+*
+* - Dynamic data format (baud rate, data bits, stop bits, parity)
+* - Polled mode
+* - Interrupt driven mode
+* - Transmit and receive FIFOs (32 byte FIFO depth)
+* - Access to the external modem control lines
+*
+* Initialization & Configuration
+*
+* The XUartPs_Config structure is used by the driver to configure itself.
+* Fields inside this structure are properties of XUartPs based on its hardware
+* build.
+*
+* To support multiple runtime loading and initialization strategies employed
+* by various operating systems, the driver instance can be initialized in the
+* following way:
+*
+*   - XUartPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
+*	 configuration structure provided by the caller. If running in a system
+*	 with address translation, the parameter EffectiveAddr should be the
+* 	  virtual address.
+*
+* Baud Rate
+*
+* The UART has an internal baud rate generator, which furnishes the baud rate
+* clock for both the receiver and the transmitter. Ther input clock frequency
+* can be either the master clock or the master clock divided by 8, configured
+* through the mode register.
+*
+* Accompanied with the baud rate divider register, the baud rate is determined
+* by:
+* 
+*	baud_rate = input_clock / (bgen * (bdiv + 1)
+* 

+* where bgen is the value of the baud rate generator, and bdiv is the value of
+* baud rate divider.
+*
+* Interrupts
+*
+* The FIFOs are not flushed when the driver is initialized, but a function is
+* provided to allow the user to reset the FIFOs if desired.
+*
+* The driver defaults to no interrupts at initialization such that interrupts
+* must be enabled if desired. An interrupt is generated for one of the
+* following conditions.
+*
+* - A change in the modem signals
+* - Data in the receive FIFO for a configuable time without receiver activity
+* - A parity error
+* - A framing error
+* - An overrun error
+* - Transmit FIFO is full
+* - Transmit FIFO is empty
+* - Receive FIFO is full
+* - Receive FIFO is empty
+* - Data in the receive FIFO equal to the receive threshold
+*
+* The application can control which interrupts are enabled using the
+* XUartPs_SetInterruptMask() function.
+*
+* In order to use interrupts, it is necessary for the user to connect the
+* driver interrupt handler, XUartPs_InterruptHandler(), to the interrupt
+* system of the application. A separate handler should be provided by the
+* application to communicate with the interrupt system, and conduct
+* application specific interrupt handling. An application registers its own
+* handler through the XUartPs_SetHandler() function.
+*
+* Data Transfer
+*
+* The functions, XUartPs_Send() and XUartPs_Recv(), are provided in the
+* driver to allow data to be sent and received. They can be used in either
+* polled or interrupt mode.
+*
+* @note
+*
+* The default configuration for the UART after initialization is:
+*
+* - 9,600 bps or XPAR_DFT_BAUDRATE if defined
+* - 8 data bits
+* - 1 stop bit
+* - no parity
+* - FIFO's are enabled with a receive threshold of 8 bytes
+* - The RX timeout is enabled with a timeout of 1 (4 char times)
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- ------ -------- ----------------------------------------------
+* 1.00a	drg/jz 01/12/10 First Release
+* 1.00a sdm    09/27/11 Fixed compiler warnings and also a bug
+*		        in XUartPs_SetFlowDelay where the value was not
+*			being written to the register.
+* 1.01a sdm    12/20/11 Removed the InputClockHz parameter from the XUartPs
+*			instance structure and the driver is updated to use
+*			InputClockHz parameter from the XUartPs_Config config
+*			structure.
+*			Added a parameter to XUartPs_Config structure which
+*			specifies whether the user has selected Modem pins
+*			to be connected to MIO or FMIO.
+*			Added the tcl file to generate the xparameters.h
+* 1.02a sg     05/16/12	Changed XUARTPS_RXWM_MASK to 0x3F for CR 652540 fix.
+* 1.03a sg     07/16/12 Updated XUARTPS_FORMAT_7_BITS and XUARTPS_FORMAT_6_BITS
+*			with the correct values for CR 666724
+* 			Added defines for XUARTPS_IXR_TOVR,  XUARTPS_IXR_TNFUL
+*			and XUARTPS_IXR_TTRIG.
+*			Modified the name of these defines
+*			XUARTPS_MEDEMSR_DCDX to XUARTPS_MODEMSR_DDCD
+*			XUARTPS_MEDEMSR_RIX to XUARTPS_MODEMSR_TERI
+*			XUARTPS_MEDEMSR_DSRX to XUARTPS_MODEMSR_DDSR
+*			XUARTPS_MEDEMSR_CTSX to XUARTPS_MODEMSR_DCTS
+* 1.05a hk     08/22/13 Added API for uart reset and related
+*			constant definitions.
+* 2.0   hk      03/07/14 Version number revised.
+* 2.1   hk     04/16/14 Change XUARTPS_MAX_RATE to 921600. CR# 780625.
+* 2.2   hk     06/23/14 SW reset of RX and TX should be done when changing
+*                       baud rate. CR# 804281.
+* 3.0   vm     12/09/14 Modified source code according to misrac guideline.
+*			Support for Zynq Ultrascale Mp added.
+* 3.1	kvn    04/10/15 Modified code for latest RTL changes. Also added
+*						platform variable in driver instance structure.
+* 3.1   adk   14/03/16  Include interrupt examples in the peripheral test when
+*			uart is connected to a valid interrupt controller CR#946803.
+* 3.2   rk     07/20/16 Modified the logic for transmission break bit set
+* 3.4   ms     01/23/17 Added xil_printf statement in main function for all
+*                       examples to ensure that "Successfully ran" and "Failed"
+*                       strings are available in all examples. This is a fix
+*                       for CR-965028.
+*       ms     03/17/17 Added readme.txt file in examples folder for doxygen
+*                       generation.
+* 3.6   ms     02/16/18 Updates the flow control mode offset value in modem
+*                       control register.
+*
+* 

+*
+*****************************************************************************/
+
+#ifndef XUARTPS_H		/* prevent circular inclusions */
+#define XUARTPS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xuartps_hw.h"
+#include "xplatform_info.h"
+
+/************************** Constant Definitions ****************************/
+
+/*
+ * The following constants indicate the max and min baud rates and these
+ * numbers are based only on the testing that has been done. The hardware
+ * is capable of other baud rates.
+ */
+#define XUARTPS_MAX_RATE	 921600U
+#define XUARTPS_MIN_RATE	 110U
+
+#define XUARTPS_DFT_BAUDRATE  115200U   /* Default baud rate */
+
+/** @name Configuration options
+ * @{
+ */
+/**
+ * These constants specify the options that may be set or retrieved
+ * with the driver, each is a unique bit mask such that multiple options
+ * may be specified.  These constants indicate the available options
+ * in active state.
+ *
+ */
+
+#define XUARTPS_OPTION_SET_BREAK	0x0080U /**< Starts break transmission */
+#define XUARTPS_OPTION_STOP_BREAK	0x0040U /**< Stops break transmission */
+#define XUARTPS_OPTION_RESET_TMOUT	0x0020U /**< Reset the receive timeout */
+#define XUARTPS_OPTION_RESET_TX		0x0010U /**< Reset the transmitter */
+#define XUARTPS_OPTION_RESET_RX		0x0008U /**< Reset the receiver */
+#define XUARTPS_OPTION_ASSERT_RTS	0x0004U /**< Assert the RTS bit */
+#define XUARTPS_OPTION_ASSERT_DTR	0x0002U /**< Assert the DTR bit */
+#define XUARTPS_OPTION_SET_FCM		0x0001U /**< Turn on flow control mode */
+/*@}*/
+
+
+/** @name Channel Operational Mode
+ *
+ * The UART can operate in one of four modes: Normal, Local Loopback, Remote
+ * Loopback, or automatic echo.
+ *
+ * @{
+ */
+
+#define XUARTPS_OPER_MODE_NORMAL		(u8)0x00U	/**< Normal Mode */
+#define XUARTPS_OPER_MODE_AUTO_ECHO		(u8)0x01U	/**< Auto Echo Mode */
+#define XUARTPS_OPER_MODE_LOCAL_LOOP	(u8)0x02U	/**< Local Loopback Mode */
+#define XUARTPS_OPER_MODE_REMOTE_LOOP	(u8)0x03U	/**< Remote Loopback Mode */
+
+/* @} */
+
+/** @name Data format values
+ *
+ * These constants specify the data format that the driver supports.
+ * The data format includes the number of data bits, the number of stop
+ * bits and parity.
+ *
+ * @{
+ */
+#define XUARTPS_FORMAT_8_BITS		0U /**< 8 data bits */
+#define XUARTPS_FORMAT_7_BITS		2U /**< 7 data bits */
+#define XUARTPS_FORMAT_6_BITS		3U /**< 6 data bits */
+
+#define XUARTPS_FORMAT_NO_PARITY	4U /**< No parity */
+#define XUARTPS_FORMAT_MARK_PARITY	3U /**< Mark parity */
+#define XUARTPS_FORMAT_SPACE_PARITY	2U /**< parity */
+#define XUARTPS_FORMAT_ODD_PARITY	1U /**< Odd parity */
+#define XUARTPS_FORMAT_EVEN_PARITY	0U /**< Even parity */
+
+#define XUARTPS_FORMAT_2_STOP_BIT	2U /**< 2 stop bits */
+#define XUARTPS_FORMAT_1_5_STOP_BIT	1U /**< 1.5 stop bits */
+#define XUARTPS_FORMAT_1_STOP_BIT	0U /**< 1 stop bit */
+/*@}*/
+
+/** @name Callback events
+ *
+ * These constants specify the handler events that an application can handle
+ * using its specific handler function. Note that these constants are not bit
+ * mask, so only one event can be passed to an application at a time.
+ *
+ * @{
+ */
+#define XUARTPS_EVENT_RECV_DATA			1U /**< Data receiving done */
+#define XUARTPS_EVENT_RECV_TOUT			2U /**< A receive timeout occurred */
+#define XUARTPS_EVENT_SENT_DATA			3U /**< Data transmission done */
+#define XUARTPS_EVENT_RECV_ERROR		4U /**< A receive error detected */
+#define XUARTPS_EVENT_MODEM				5U /**< Modem status changed */
+#define XUARTPS_EVENT_PARE_FRAME_BRKE	6U /**< A receive parity, frame, break
+											 *	error detected */
+#define XUARTPS_EVENT_RECV_ORERR		7U /**< A receive overrun error detected */
+/*@}*/
+
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;	 /**< Unique ID  of device */
+	u32 BaseAddress; /**< Base address of device (IPIF) */
+	u32 InputClockHz;/**< Input clock frequency */
+	s32 ModemPinsConnected; /** Specifies whether modem pins are connected
+				 *  to MIO or FMIO */
+} XUartPs_Config;
+
+/* Keep track of state information about a data buffer in the interrupt mode. */
+typedef struct {
+	u8 *NextBytePtr;
+	u32 RequestedBytes;
+	u32 RemainingBytes;
+} XUartPsBuffer;
+
+/**
+ * Keep track of data format setting of a device.
+ */
+typedef struct {
+	u32 BaudRate;	/**< In bps, ie 1200 */
+	u32 DataBits;	/**< Number of data bits */
+	u32 Parity;		/**< Parity */
+	u8 StopBits;	/**< Number of stop bits */
+} XUartPsFormat;
+
+/******************************************************************************/
+/**
+ * This data type defines a handler that an application defines to communicate
+ * with interrupt system to retrieve state information about an application.
+ *
+ * @param	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the handler, and is passed back to the upper layer
+ *		when the handler is called. It is used to find the device driver
+ *		instance.
+ * @param	Event contains one of the event constants indicating events that
+ *		have occurred.
+ * @param	EventData contains the number of bytes sent or received at the
+ *		time of the call for send and receive events and contains the
+ *		modem status for modem events.
+ *
+ ******************************************************************************/
+typedef void (*XUartPs_Handler) (void *CallBackRef, u32 Event,
+				  u32 EventData);
+
+/**
+ * The XUartPs driver instance data structure. A pointer to an instance data
+ * structure is passed around by functions to refer to a specific driver
+ * instance.
+ */
+typedef struct {
+	XUartPs_Config Config;	/* Configuration data structure */
+	u32 InputClockHz;	/* Input clock frequency */
+	u32 IsReady;		/* Device is initialized and ready */
+	u32 BaudRate;		/* Current baud rate */
+
+	XUartPsBuffer SendBuffer;
+	XUartPsBuffer ReceiveBuffer;
+
+	XUartPs_Handler Handler;
+	void *CallBackRef;	/* Callback reference for event handler */
+	u32 Platform;
+	u8 is_rxbs_error;
+} XUartPs;
+
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* Get the UART Channel Status Register.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u16 XUartPs_GetChannelStatus(XUartPs *InstancePtr)
+*
+******************************************************************************/
+#define XUartPs_GetChannelStatus(InstancePtr)   \
+	Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_SR_OFFSET)
+
+/****************************************************************************/
+/**
+* Get the UART Mode Control Register.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XUartPs_GetControl(XUartPs *InstancePtr)
+*
+******************************************************************************/
+#define XUartPs_GetModeControl(InstancePtr)  \
+	Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_CR_OFFSET)
+
+/****************************************************************************/
+/**
+* Set the UART Mode Control Register.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*	void XUartPs_SetModeControl(XUartPs *InstancePtr, u16 RegisterValue)
+*
+******************************************************************************/
+#define XUartPs_SetModeControl(InstancePtr, RegisterValue) \
+   Xil_Out32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_CR_OFFSET, \
+			(u32)(RegisterValue))
+
+/****************************************************************************/
+/**
+* Enable the transmitter and receiver of the UART.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XUartPs_EnableUart(XUartPs *InstancePtr)
+*
+******************************************************************************/
+#define XUartPs_EnableUart(InstancePtr) \
+   Xil_Out32(((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET), \
+	  ((Xil_In32((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET) & \
+	  (u32)(~XUARTPS_CR_EN_DIS_MASK)) | ((u32)XUARTPS_CR_RX_EN | (u32)XUARTPS_CR_TX_EN)))
+
+/****************************************************************************/
+/**
+* Disable the transmitter and receiver of the UART.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XUartPs_DisableUart(XUartPs *InstancePtr)
+*
+******************************************************************************/
+#define XUartPs_DisableUart(InstancePtr) \
+   Xil_Out32(((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET), \
+	  (((Xil_In32((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET)) & \
+	  (u32)(~XUARTPS_CR_EN_DIS_MASK)) | ((u32)XUARTPS_CR_RX_DIS | (u32)XUARTPS_CR_TX_DIS)))
+
+/****************************************************************************/
+/**
+* Determine if the transmitter FIFO is empty.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return
+*		- TRUE if a byte can be sent
+*		- FALSE if the Transmitter Fifo is not empty
+*
+* @note		C-Style signature:
+*		u32 XUartPs_IsTransmitEmpty(XUartPs InstancePtr)
+*
+******************************************************************************/
+#define XUartPs_IsTransmitEmpty(InstancePtr)				\
+	((Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_SR_OFFSET) & \
+	 (u32)XUARTPS_SR_TXEMPTY) == (u32)XUARTPS_SR_TXEMPTY)
+
+
+/************************** Function Prototypes *****************************/
+
+/* Static lookup function implemented in xuartps_sinit.c */
+XUartPs_Config *XUartPs_LookupConfig(u16 DeviceId);
+
+/* Interface functions implemented in xuartps.c */
+s32 XUartPs_CfgInitialize(XUartPs *InstancePtr,
+				  XUartPs_Config * Config, u32 EffectiveAddr);
+
+u32 XUartPs_Send(XUartPs *InstancePtr,u8 *BufferPtr,
+			   u32 NumBytes);
+
+u32 XUartPs_Recv(XUartPs *InstancePtr,u8 *BufferPtr,
+			   u32 NumBytes);
+
+s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate);
+
+/* Options functions in xuartps_options.c */
+void XUartPs_SetOptions(XUartPs *InstancePtr, u16 Options);
+
+u16 XUartPs_GetOptions(XUartPs *InstancePtr);
+
+void XUartPs_SetFifoThreshold(XUartPs *InstancePtr, u8 TriggerLevel);
+
+u8 XUartPs_GetFifoThreshold(XUartPs *InstancePtr);
+
+u16 XUartPs_GetModemStatus(XUartPs *InstancePtr);
+
+u32 XUartPs_IsSending(XUartPs *InstancePtr);
+
+u8 XUartPs_GetOperMode(XUartPs *InstancePtr);
+
+void XUartPs_SetOperMode(XUartPs *InstancePtr, u8 OperationMode);
+
+u8 XUartPs_GetFlowDelay(XUartPs *InstancePtr);
+
+void XUartPs_SetFlowDelay(XUartPs *InstancePtr, u8 FlowDelayValue);
+
+u8 XUartPs_GetRecvTimeout(XUartPs *InstancePtr);
+
+void XUartPs_SetRecvTimeout(XUartPs *InstancePtr, u8 RecvTimeout);
+
+s32 XUartPs_SetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr);
+
+void XUartPs_GetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr);
+
+/* interrupt functions in xuartps_intr.c */
+u32 XUartPs_GetInterruptMask(XUartPs *InstancePtr);
+
+void XUartPs_SetInterruptMask(XUartPs *InstancePtr, u32 Mask);
+
+void XUartPs_InterruptHandler(XUartPs *InstancePtr);
+
+void XUartPs_SetHandler(XUartPs *InstancePtr, XUartPs_Handler FuncPtr,
+			 void *CallBackRef);
+
+/* self-test functions in xuartps_selftest.c */
+s32 XUartPs_SelfTest(XUartPs *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xuartps_hw.h b/src/Xilinx/include/xuartps_hw.h
new file mode 100644
index 0000000..9a2bc43
--- /dev/null
+++ b/src/Xilinx/include/xuartps_hw.h
@@ -0,0 +1,451 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xuartps_hw.h
+* @addtogroup uartps_v3_5
+* @{
+*
+* This header file contains the hardware interface of an XUartPs device.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- ------ -------- ----------------------------------------------
+* 1.00	drg/jz 01/12/10 First Release
+* 1.03a sg     09/04/12 Added defines for XUARTPS_IXR_TOVR,  XUARTPS_IXR_TNFUL
+*			and XUARTPS_IXR_TTRIG.
+*			Modified the names of these defines
+*			XUARTPS_MEDEMSR_DCDX to XUARTPS_MODEMSR_DDCD
+*			XUARTPS_MEDEMSR_RIX to XUARTPS_MODEMSR_TERI
+*			XUARTPS_MEDEMSR_DSRX to XUARTPS_MODEMSR_DDSR
+*			XUARTPS_MEDEMSR_CTSX to XUARTPS_MODEMSR_DCTS
+* 1.05a hk     08/22/13 Added prototype for uart reset and related
+*			constant definitions.
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn    04/10/15 Modified code for latest RTL changes.
+* 3.6   ms     02/16/18 Updates flow control mode offset value in
+*			modem control register.
+*
+* 

+*
+******************************************************************************/
+#ifndef XUARTPS_HW_H		/* prevent circular inclusions */
+#define XUARTPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register Map
+ *
+ * Register offsets for the UART.
+ * @{
+ */
+#define XUARTPS_CR_OFFSET		0x0000U  /**< Control Register [8:0] */
+#define XUARTPS_MR_OFFSET		0x0004U  /**< Mode Register [9:0] */
+#define XUARTPS_IER_OFFSET		0x0008U  /**< Interrupt Enable [12:0] */
+#define XUARTPS_IDR_OFFSET		0x000CU  /**< Interrupt Disable [12:0] */
+#define XUARTPS_IMR_OFFSET		0x0010U  /**< Interrupt Mask [12:0] */
+#define XUARTPS_ISR_OFFSET		0x0014U  /**< Interrupt Status [12:0]*/
+#define XUARTPS_BAUDGEN_OFFSET	0x0018U  /**< Baud Rate Generator [15:0] */
+#define XUARTPS_RXTOUT_OFFSET	0x001CU  /**< RX Timeout [7:0] */
+#define XUARTPS_RXWM_OFFSET		0x0020U  /**< RX FIFO Trigger Level [5:0] */
+#define XUARTPS_MODEMCR_OFFSET	0x0024U  /**< Modem Control [5:0] */
+#define XUARTPS_MODEMSR_OFFSET	0x0028U  /**< Modem Status [8:0] */
+#define XUARTPS_SR_OFFSET		0x002CU  /**< Channel Status [14:0] */
+#define XUARTPS_FIFO_OFFSET		0x0030U  /**< FIFO [7:0] */
+#define XUARTPS_BAUDDIV_OFFSET	0x0034U  /**< Baud Rate Divider [7:0] */
+#define XUARTPS_FLOWDEL_OFFSET	0x0038U  /**< Flow Delay [5:0] */
+#define XUARTPS_TXWM_OFFSET		0x0044U  /**< TX FIFO Trigger Level [5:0] */
+#define XUARTPS_RXBS_OFFSET		0x0048U  /**< RX FIFO Byte Status [11:0] */
+/* @} */
+
+/** @name Control Register
+ *
+ * The Control register (CR) controls the major functions of the device.
+ *
+ * Control Register Bit Definition
+ */
+
+#define XUARTPS_CR_STOPBRK	0x00000100U  /**< Stop transmission of break */
+#define XUARTPS_CR_STARTBRK	0x00000080U  /**< Set break */
+#define XUARTPS_CR_TORST	0x00000040U  /**< RX timeout counter restart */
+#define XUARTPS_CR_TX_DIS	0x00000020U  /**< TX disabled. */
+#define XUARTPS_CR_TX_EN	0x00000010U  /**< TX enabled */
+#define XUARTPS_CR_RX_DIS	0x00000008U  /**< RX disabled. */
+#define XUARTPS_CR_RX_EN	0x00000004U  /**< RX enabled */
+#define XUARTPS_CR_EN_DIS_MASK	0x0000003CU  /**< Enable/disable Mask */
+#define XUARTPS_CR_TXRST	0x00000002U  /**< TX logic reset */
+#define XUARTPS_CR_RXRST	0x00000001U  /**< RX logic reset */
+/* @}*/
+
+
+/** @name Mode Register
+ *
+ * The mode register (MR) defines the mode of transfer as well as the data
+ * format. If this register is modified during transmission or reception,
+ * data validity cannot be guaranteed.
+ *
+ * Mode Register Bit Definition
+ * @{
+ */
+#define XUARTPS_MR_CCLK				0x00000400U /**< Input clock selection */
+#define XUARTPS_MR_CHMODE_R_LOOP	0x00000300U /**< Remote loopback mode */
+#define XUARTPS_MR_CHMODE_L_LOOP	0x00000200U /**< Local loopback mode */
+#define XUARTPS_MR_CHMODE_ECHO		0x00000100U /**< Auto echo mode */
+#define XUARTPS_MR_CHMODE_NORM		0x00000000U /**< Normal mode */
+#define XUARTPS_MR_CHMODE_SHIFT				8U  /**< Mode shift */
+#define XUARTPS_MR_CHMODE_MASK		0x00000300U /**< Mode mask */
+#define XUARTPS_MR_STOPMODE_2_BIT	0x00000080U /**< 2 stop bits */
+#define XUARTPS_MR_STOPMODE_1_5_BIT	0x00000040U /**< 1.5 stop bits */
+#define XUARTPS_MR_STOPMODE_1_BIT	0x00000000U /**< 1 stop bit */
+#define XUARTPS_MR_STOPMODE_SHIFT			6U  /**< Stop bits shift */
+#define XUARTPS_MR_STOPMODE_MASK	0x000000A0U /**< Stop bits mask */
+#define XUARTPS_MR_PARITY_NONE		0x00000020U /**< No parity mode */
+#define XUARTPS_MR_PARITY_MARK		0x00000018U /**< Mark parity mode */
+#define XUARTPS_MR_PARITY_SPACE		0x00000010U /**< Space parity mode */
+#define XUARTPS_MR_PARITY_ODD		0x00000008U /**< Odd parity mode */
+#define XUARTPS_MR_PARITY_EVEN		0x00000000U /**< Even parity mode */
+#define XUARTPS_MR_PARITY_SHIFT				3U  /**< Parity setting shift */
+#define XUARTPS_MR_PARITY_MASK		0x00000038U /**< Parity mask */
+#define XUARTPS_MR_CHARLEN_6_BIT	0x00000006U /**< 6 bits data */
+#define XUARTPS_MR_CHARLEN_7_BIT	0x00000004U /**< 7 bits data */
+#define XUARTPS_MR_CHARLEN_8_BIT	0x00000000U /**< 8 bits data */
+#define XUARTPS_MR_CHARLEN_SHIFT			1U  /**< Data Length shift */
+#define XUARTPS_MR_CHARLEN_MASK		0x00000006U /**< Data length mask */
+#define XUARTPS_MR_CLKSEL			0x00000001U /**< Input clock selection */
+/* @} */
+
+
+/** @name Interrupt Registers
+ *
+ * Interrupt control logic uses the interrupt enable register (IER) and the
+ * interrupt disable register (IDR) to set the value of the bits in the
+ * interrupt mask register (IMR). The IMR determines whether to pass an
+ * interrupt to the interrupt status register (ISR).
+ * Writing a 1 to IER Enbables an interrupt, writing a 1 to IDR disables an
+ * interrupt. IMR and ISR are read only, and IER and IDR are write only.
+ * Reading either IER or IDR returns 0x00.
+ *
+ * All four registers have the same bit definitions.
+ *
+ * @{
+ */
+#define XUARTPS_IXR_RBRK	0x00002000U /**< Rx FIFO break detect interrupt */
+#define XUARTPS_IXR_TOVR	0x00001000U /**< Tx FIFO Overflow interrupt */
+#define XUARTPS_IXR_TNFUL	0x00000800U /**< Tx FIFO Nearly Full interrupt */
+#define XUARTPS_IXR_TTRIG	0x00000400U /**< Tx Trig interrupt */
+#define XUARTPS_IXR_DMS		0x00000200U /**< Modem status change interrupt */
+#define XUARTPS_IXR_TOUT	0x00000100U /**< Timeout error interrupt */
+#define XUARTPS_IXR_PARITY 	0x00000080U /**< Parity error interrupt */
+#define XUARTPS_IXR_FRAMING	0x00000040U /**< Framing error interrupt */
+#define XUARTPS_IXR_OVER	0x00000020U /**< Overrun error interrupt */
+#define XUARTPS_IXR_TXFULL 	0x00000010U /**< TX FIFO full interrupt. */
+#define XUARTPS_IXR_TXEMPTY	0x00000008U /**< TX FIFO empty interrupt. */
+#define XUARTPS_IXR_RXFULL 	0x00000004U /**< RX FIFO full interrupt. */
+#define XUARTPS_IXR_RXEMPTY	0x00000002U /**< RX FIFO empty interrupt. */
+#define XUARTPS_IXR_RXOVR  	0x00000001U /**< RX FIFO trigger interrupt. */
+#define XUARTPS_IXR_MASK	0x00003FFFU /**< Valid bit mask */
+/* @} */
+
+
+/** @name Baud Rate Generator Register
+ *
+ * The baud rate generator control register (BRGR) is a 16 bit register that
+ * controls the receiver bit sample clock and baud rate.
+ * Valid values are 1 - 65535.
+ *
+ * Bit Sample Rate = CCLK / BRGR, where the CCLK is selected by the MR_CCLK bit
+ * in the MR register.
+ * @{
+ */
+#define XUARTPS_BAUDGEN_DISABLE		0x00000000U /**< Disable clock */
+#define XUARTPS_BAUDGEN_MASK		0x0000FFFFU /**< Valid bits mask */
+#define XUARTPS_BAUDGEN_RESET_VAL	0x0000028BU /**< Reset value */
+
+/** @name Baud Divisor Rate register
+ *
+ * The baud rate divider register (BDIV) controls how much the bit sample
+ * rate is divided by. It sets the baud rate.
+ * Valid values are 0x04 to 0xFF. Writing a value less than 4 will be ignored.
+ *
+ * Baud rate = CCLK / ((BAUDDIV + 1) x BRGR), where the CCLK is selected by
+ * the MR_CCLK bit in the MR register.
+ * @{
+ */
+#define XUARTPS_BAUDDIV_MASK        0x000000FFU	/**< 8 bit baud divider mask */
+#define XUARTPS_BAUDDIV_RESET_VAL   0x0000000FU	/**< Reset value */
+/* @} */
+
+
+/** @name Receiver Timeout Register
+ *
+ * Use the receiver timeout register (RTR) to detect an idle condition on
+ * the receiver data line.
+ *
+ * @{
+ */
+#define XUARTPS_RXTOUT_DISABLE		0x00000000U  /**< Disable time out */
+#define XUARTPS_RXTOUT_MASK			0x000000FFU  /**< Valid bits mask */
+
+/** @name Receiver FIFO Trigger Level Register
+ *
+ * Use the Receiver FIFO Trigger Level Register (RTRIG) to set the value at
+ * which the RX FIFO triggers an interrupt event.
+ * @{
+ */
+
+#define XUARTPS_RXWM_DISABLE	0x00000000U  /**< Disable RX trigger interrupt */
+#define XUARTPS_RXWM_MASK		0x0000003FU  /**< Valid bits mask */
+#define XUARTPS_RXWM_RESET_VAL	0x00000020U  /**< Reset value */
+/* @} */
+
+/** @name Transmit FIFO Trigger Level Register
+ *
+ * Use the Transmit FIFO Trigger Level Register (TTRIG) to set the value at
+ * which the TX FIFO triggers an interrupt event.
+ * @{
+ */
+
+#define XUARTPS_TXWM_MASK		0x0000003FU  /**< Valid bits mask */
+#define XUARTPS_TXWM_RESET_VAL	0x00000020U  /**< Reset value */
+/* @} */
+
+/** @name Modem Control Register
+ *
+ * This register (MODEMCR) controls the interface with the modem or data set,
+ * or a peripheral device emulating a modem.
+ *
+ * @{
+ */
+#define XUARTPS_MODEMCR_FCM	0x00000020U  /**< Flow control mode */
+#define XUARTPS_MODEMCR_RTS	0x00000002U  /**< Request to send */
+#define XUARTPS_MODEMCR_DTR	0x00000001U  /**< Data terminal ready */
+/* @} */
+
+/** @name Modem Status Register
+ *
+ * This register (MODEMSR) indicates the current state of the control lines
+ * from a modem, or another peripheral device, to the CPU. In addition, four
+ * bits of the modem status register provide change information. These bits
+ * are set to a logic 1 whenever a control input from the modem changes state.
+ *
+ * Note: Whenever the DCTS, DDSR, TERI, or DDCD bit is set to logic 1, a modem
+ * status interrupt is generated and this is reflected in the modem status
+ * register.
+ *
+ * @{
+ */
+#define XUARTPS_MODEMSR_FCMS	0x00000100U  /**< Flow control mode (FCMS) */
+#define XUARTPS_MODEMSR_DCD		0x00000080U  /**< Complement of DCD input */
+#define XUARTPS_MODEMSR_RI		0x00000040U  /**< Complement of RI input */
+#define XUARTPS_MODEMSR_DSR		0x00000020U  /**< Complement of DSR input */
+#define XUARTPS_MODEMSR_CTS		0x00000010U  /**< Complement of CTS input */
+#define XUARTPS_MODEMSR_DDCD	0x00000008U  /**< Delta DCD indicator */
+#define XUARTPS_MODEMSR_TERI  0x00000004U  /**< Trailing Edge Ring Indicator */
+#define XUARTPS_MODEMSR_DDSR	0x00000002U  /**< Change of DSR */
+#define XUARTPS_MODEMSR_DCTS	0x00000001U  /**< Change of CTS */
+/* @} */
+
+/** @name Channel Status Register
+ *
+ * The channel status register (CSR) is provided to enable the control logic
+ * to monitor the status of bits in the channel interrupt status register,
+ * even if these are masked out by the interrupt mask register.
+ *
+ * @{
+ */
+#define XUARTPS_SR_TNFUL	0x00004000U /**< TX FIFO Nearly Full Status */
+#define XUARTPS_SR_TTRIG	0x00002000U /**< TX FIFO Trigger Status */
+#define XUARTPS_SR_FLOWDEL	0x00001000U /**< RX FIFO fill over flow delay */
+#define XUARTPS_SR_TACTIVE	0x00000800U /**< TX active */
+#define XUARTPS_SR_RACTIVE	0x00000400U /**< RX active */
+#define XUARTPS_SR_TXFULL	0x00000010U /**< TX FIFO full */
+#define XUARTPS_SR_TXEMPTY	0x00000008U /**< TX FIFO empty */
+#define XUARTPS_SR_RXFULL	0x00000004U /**< RX FIFO full */
+#define XUARTPS_SR_RXEMPTY	0x00000002U /**< RX FIFO empty */
+#define XUARTPS_SR_RXOVR	0x00000001U /**< RX FIFO fill over trigger */
+/* @} */
+
+/** @name Flow Delay Register
+ *
+ * Operation of the flow delay register (FLOWDEL) is very similar to the
+ * receive FIFO trigger register. An internal trigger signal activates when the
+ * FIFO is filled to the level set by this register. This trigger will not
+ * cause an interrupt, although it can be read through the channel status
+ * register. In hardware flow control mode, RTS is deactivated when the trigger
+ * becomes active. RTS only resets when the FIFO level is four less than the
+ * level of the flow delay trigger and the flow delay trigger is not activated.
+ * A value less than 4 disables the flow delay.
+ * @{
+ */
+#define XUARTPS_FLOWDEL_MASK	XUARTPS_RXWM_MASK	/**< Valid bit mask */
+/* @} */
+
+/** @name Receiver FIFO Byte Status Register
+ *
+ * The Receiver FIFO Status register is used to have a continuous
+ * monitoring of the raw unmasked byte status information. The register
+ * contains frame, parity and break status information for the top
+ * four bytes in the RX FIFO.
+ *
+ * Receiver FIFO Byte Status Register Bit Definition
+ * @{
+ */
+#define XUARTPS_RXBS_BYTE3_BRKE		0x00000800U /**< Byte3 Break Error */
+#define XUARTPS_RXBS_BYTE3_FRME		0x00000400U /**< Byte3 Frame Error */
+#define XUARTPS_RXBS_BYTE3_PARE		0x00000200U /**< Byte3 Parity Error */
+#define XUARTPS_RXBS_BYTE2_BRKE		0x00000100U /**< Byte2 Break Error */
+#define XUARTPS_RXBS_BYTE2_FRME		0x00000080U /**< Byte2 Frame Error */
+#define XUARTPS_RXBS_BYTE2_PARE		0x00000040U /**< Byte2 Parity Error */
+#define XUARTPS_RXBS_BYTE1_BRKE		0x00000020U /**< Byte1 Break Error */
+#define XUARTPS_RXBS_BYTE1_FRME		0x00000010U /**< Byte1 Frame Error */
+#define XUARTPS_RXBS_BYTE1_PARE		0x00000008U /**< Byte1 Parity Error */
+#define XUARTPS_RXBS_BYTE0_BRKE		0x00000004U /**< Byte0 Break Error */
+#define XUARTPS_RXBS_BYTE0_FRME		0x00000002U /**< Byte0 Frame Error */
+#define XUARTPS_RXBS_BYTE0_PARE		0x00000001U /**< Byte0 Parity Error */
+#define XUARTPS_RXBS_MASK		0x00000007U /**< 3 bit RX byte status mask */
+/* @} */
+
+
+/*
+ * Defines for backwards compatabilty, will be removed
+ * in the next version of the driver
+ */
+#define XUARTPS_MEDEMSR_DCDX  XUARTPS_MODEMSR_DDCD
+#define XUARTPS_MEDEMSR_RIX   XUARTPS_MODEMSR_TERI
+#define XUARTPS_MEDEMSR_DSRX  XUARTPS_MODEMSR_DDSR
+#define	XUARTPS_MEDEMSR_CTSX  XUARTPS_MODEMSR_DCTS
+
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+* Read a UART register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the base address of the
+*		device.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XUartPs_ReadReg(u32 BaseAddress, int RegOffset)
+*
+******************************************************************************/
+#define XUartPs_ReadReg(BaseAddress, RegOffset) \
+	Xil_In32((BaseAddress) + (u32)(RegOffset))
+
+/***************************************************************************/
+/**
+* Write a UART register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the base address of the
+*		device.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XUartPs_WriteReg(u32 BaseAddress, int RegOffset,
+*						   u16 RegisterValue)
+*
+******************************************************************************/
+#define XUartPs_WriteReg(BaseAddress, RegOffset, RegisterValue) \
+	Xil_Out32((BaseAddress) + (u32)(RegOffset), (u32)(RegisterValue))
+
+/****************************************************************************/
+/**
+* Determine if there is receive data in the receiver and/or FIFO.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	TRUE if there is receive data, FALSE otherwise.
+*
+* @note		C-Style signature:
+*		u32 XUartPs_IsReceiveData(u32 BaseAddress)
+*
+******************************************************************************/
+#define XUartPs_IsReceiveData(BaseAddress)			 \
+	!((Xil_In32((BaseAddress) + XUARTPS_SR_OFFSET) & 	\
+	(u32)XUARTPS_SR_RXEMPTY) == (u32)XUARTPS_SR_RXEMPTY)
+
+/****************************************************************************/
+/**
+* Determine if a byte of data can be sent with the transmitter.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	TRUE if the TX FIFO is full, FALSE if a byte can be put in the
+*		FIFO.
+*
+* @note		C-Style signature:
+*		u32 XUartPs_IsTransmitFull(u32 BaseAddress)
+*
+******************************************************************************/
+#define XUartPs_IsTransmitFull(BaseAddress)			 \
+	((Xil_In32((BaseAddress) + XUARTPS_SR_OFFSET) & 	\
+	 (u32)XUARTPS_SR_TXFULL) == (u32)XUARTPS_SR_TXFULL)
+
+/************************** Function Prototypes ******************************/
+
+void XUartPs_SendByte(u32 BaseAddress, u8 Data);
+
+u8 XUartPs_RecvByte(u32 BaseAddress);
+
+void XUartPs_ResetHw(u32 BaseAddress);
+
+/************************** Variable Definitions *****************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xusb_wrapper.h b/src/Xilinx/include/xusb_wrapper.h
new file mode 100644
index 0000000..d21072b
--- /dev/null
+++ b/src/Xilinx/include/xusb_wrapper.h
@@ -0,0 +1,190 @@
+/******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+ ******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * @file xusb_wrapper.h
+ *
+ * This file contains declarations for USBPSU Driver wrappers.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  	Date     Changes
+ * ----- ---- 	-------- -------------------------------------------------------
+ *  1.0  BK	12/01/18 First release
+ *	 MYK	12/01/18 Added hibernation support for device mode
+ *	 vak	22/01/18 Added Microblaze support for usbpsu driver
+ *	 vak	13/03/18 Moved the setup interrupt system calls from driver to
+ *			 example.
+ *
+ * 

+ *
+ *****************************************************************************/
+
+#ifndef XUSB_WRAPPER_H  /* Prevent circular inclusions */
+#define XUSB_WRAPPER_H  /* by using protection macros  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+#include "xusbpsu.h"
+
+/************************** Constant Definitions ****************************/
+#define USB_DEVICE_ID		XPAR_XUSBPSU_0_DEVICE_ID
+
+#define USB_EP_DIR_IN		XUSBPSU_EP_DIR_IN
+#define USB_EP_DIR_OUT		XUSBPSU_EP_DIR_OUT
+
+#define USB_DIR_OUT				0U		/* to device */
+#define USB_DIR_IN				0x80U	/* to host */
+
+/**
+ * @name Endpoint Address
+ * @{
+ */
+#define USB_EP1_IN		0x81
+#define USB_EP1_OUT		0x01
+#define USB_EP2_IN		0x82
+#define USB_EP2_OUT		0x02
+/* @} */
+
+/**
+ * @name Endpoint Type
+ * @{
+ */
+#define USB_EP_TYPE_CONTROL			XUSBPSU_ENDPOINT_XFER_CONTROL
+#define USB_EP_TYPE_ISOCHRONOUS		XUSBPSU_ENDPOINT_XFER_ISOC
+#define USB_EP_TYPE_BULK			XUSBPSU_ENDPOINT_XFER_BULK
+#define USB_EP_TYPE_INTERRUPT		XUSBPSU_ENDPOINT_XFER_INT
+/* @} */
+
+#define USB_ENDPOINT_NUMBER_MASK        0x0f    /* in bEndpointAddress */
+#define USB_ENDPOINT_DIR_MASK           0x80
+
+/*
+ * Device States
+ */
+#define		USB_STATE_ATTACHED		XUSBPSU_STATE_ATTACHED
+#define		USB_STATE_POWERED		XUSBPSU_STATE_POWERED
+#define		USB_STATE_DEFAULT		XUSBPSU_STATE_DEFAULT
+#define		USB_STATE_ADDRESS		XUSBPSU_STATE_ADDRESS
+#define		USB_STATE_CONFIGURED	XUSBPSU_STATE_CONFIGURED
+#define		USB_STATE_SUSPENDED		XUSBPSU_STATE_SUSPENDED
+
+#define XUSBPSU_REQ_REPLY_LEN	    1024	/**< Max size of reply buffer. */
+#define USB_REQ_REPLY_LEN			XUSBPSU_REQ_REPLY_LEN
+
+/*
+ * Device Speeds
+ */
+#define	USB_SPEED_UNKNOWN		XUSBPSU_SPEED_UNKNOWN
+#define	USB_SPEED_LOW			XUSBPSU_SPEED_LOW
+#define	USB_SPEED_FULL			XUSBPSU_SPEED_FULL
+#define	USB_SPEED_HIGH			XUSBPSU_SPEED_HIGH
+#define	USB_SPEED_SUPER			XUSBPSU_SPEED_SUPER
+
+/* Device Configuration Speed */
+#define	USB_DCFG_SPEED_MASK		XUSBPSU_DCFG_SPEED_MASK
+#define	USB_DCFG_SUPERSPEED		XUSBPSU_DCFG_SUPERSPEED
+#define	USB_DCFG_HIGHSPEED		XUSBPSU_DCFG_HIGHSPEED
+#define	USB_DCFG_FULLSPEED2		XUSBPSU_DCFG_FULLSPEED2
+#define	USB_DCFG_LOWSPEED		XUSBPSU_DCFG_LOWSPEED
+#define	USB_DCFG_FULLSPEED1		XUSBPSU_DCFG_FULLSPEED1
+
+#define	USB_TEST_J				XUSBPSU_TEST_J
+#define	USB_TEST_K				XUSBPSU_TEST_K
+#define	USB_TEST_SE0_NAK		XUSBPSU_TEST_SE0_NAK
+#define	USB_TEST_PACKET			XUSBPSU_TEST_PACKET
+#define	USB_TEST_FORCE_ENABLE	XUSBPSU_TEST_FORCE_ENABLE
+
+/* TODO: If we enable this macro, reconnection is failed with 2017.3 */
+#define USB_LPM_MODE			XUSBPSU_LPM_MODE
+
+/*
+ * return Physical EP number as dwc3 mapping
+ */
+#define PhysicalEp(epnum, direction)	(((epnum) << 1 ) | (direction))
+
+/**************************** Type Definitions ******************************/
+
+/************************** Variable Definitions *****************************/
+struct XUsbPsu PrivateData;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+Usb_Config* LookupConfig(u16 DeviceId);
+void CacheInit(void);
+s32 CfgInitialize(struct Usb_DevData *InstancePtr,
+			Usb_Config *ConfigPtr, u32 BaseAddress);
+void Set_Ch9Handler(void *InstancePtr,
+				void (*func)(struct Usb_DevData *, SetupPacket *));
+void Set_RstHandler(void *InstancePtr, void (*func)(struct Usb_DevData *));
+void Set_Disconnect(void *InstancePtr, void (*func)(struct Usb_DevData *));
+void EpConfigure(void *UsbInstance, u8 EndpointNo, u8 dir, u32 Type);
+s32 ConfigureDevice(void *UsbInstance, u8 *MemPtr, u32 memSize);
+void SetEpHandler(void *InstancePtr, u8 Epnum,
+			u8 Dir, void (*Handler)(void *, u32, u32));
+s32 Usb_Start(void *InstancePtr);
+void *Get_DrvData(void *InstancePtr);
+void Set_DrvData(void *InstancePtr, void *data);
+s32 IsEpStalled(void *InstancePtr, u8 Epnum, u8 Dir);
+void EpClearStall(void *InstancePtr, u8 Epnum, u8 Dir);
+s32 EpBufferSend(void *InstancePtr, u8 UsbEp,
+			u8 *BufferPtr, u32 BufferLen);
+s32 EpBufferRecv(void *InstancePtr, u8 UsbEp,
+				u8 *BufferPtr, u32 Length);
+void EpSetStall(void *InstancePtr, u8 Epnum, u8 Dir);
+void SetBits(void *InstancePtr, u32 TestSel);
+s32 SetDeviceAddress(void *InstancePtr, u16 Addr);
+s32 SetU1SleepTimeout(void *InstancePtr, u8 Sleep);
+s32 SetU2SleepTimeout(void *InstancePtr, u8 Sleep);
+s32 AcceptU1U2Sleep(void *InstancePtr);
+s32 U1SleepEnable(void *InstancePtr);
+s32 U2SleepEnable(void *InstancePtr);
+s32 U1SleepDisable(void *InstancePtr);
+s32 U2SleepDisable(void *InstancePtr);
+s32 EpEnable(void *InstancePtr, u8 UsbEpNum, u8 Dir, u16 Maxsize, u8 Type);
+s32 EpDisable(void *InstancePtr, u8 UsbEpNum, u8 Dir);
+void Usb_SetSpeed(void *InstancePtr, u32 Speed);
+s32 IsSuperSpeed(struct Usb_DevData *InstancePtr);
+void SetConfigDone(void *InstancePtr, u8 Flag);
+u8 GetConfigDone(void *InstancePtr);
+void Ep0StallRestart(void *InstancePtr);
+void SetEpInterval(void *InstancePtr, u8 UsbEpNum, u8 Dir, u32 Interval);
+void StopTransfer(void *InstancePtr, u8 EpNum, u8 Dir);
+s32 StreamOn(void *InstancePtr, u8 EpNum, u8 Dir, u8 *BufferPtr);
+void StreamOff(void *InstancePtr, u8 EpNum, u8 Dir);
+
+#endif  /* End of protection macro. */
+/** @} */
diff --git a/src/Xilinx/include/xusbpsu.h b/src/Xilinx/include/xusbpsu.h
new file mode 100644
index 0000000..2d1498a
--- /dev/null
+++ b/src/Xilinx/include/xusbpsu.h
@@ -0,0 +1,753 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xusbpsu.h
+* @addtogroup usbpsu_v1_3
+* @{
+* @details
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.0   sg    06/06/16 First release
+* 1.1   sg    10/24/16 Update for backward compatability
+*                      Added XUsbPsu_IsSuperSpeed function in xusbpsu.c
+* 1.2   mn    01/20/17 removed unnecessary declaration of
+*                      XUsbPsu_SetConfiguration in xusbpsu.h
+* 1.2   mn    01/30/17 Corrected InstancePtr->UnalignedTx with
+*                      Ept->UnalignedTx in xusbpsu_controltransfers.c
+* 1.2   mus   02/10/17 Updated data structures to fix compilation errors for IAR
+*                      compiler
+*       ms    03/17/17 Added readme.txt file in examples folder for doxygen
+*                      generation.
+*       ms    04/10/17 Modified filename tag to include the file in doxygen
+*                      examples.
+* 1.4	bk    12/01/18 Modify USBPSU driver code to fit USB common example code
+*		       for all USB IPs.
+*	myk   12/01/18 Added hibernation support for device mode
+*	vak   22/01/18 Added changes for supporting microblaze platform
+*	vak   13/03/18 Moved the setup interrupt system calls from driver to
+*		       example.
+*
+* 

+*
+*****************************************************************************/
+#ifndef XUSBPSU_H  /* Prevent circular inclusions */
+#define XUSBPSU_H  /* by using protection macros  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+/* Enable XUSBPSU_HIBERNATION_ENABLE to enable hibernation */
+//#define XUSBPSU_HIBERNATION_ENABLE		1
+
+#include "xparameters.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xusbpsu_hw.h"
+#include "xil_io.h"
+
+/*
+ * The header sleep.h and API usleep() can only be used with an arm design.
+ * MB_Sleep() is used for microblaze design.
+ */
+#if defined (__arm__) || defined (__aarch64__) || (__ICCARM__)
+#include "sleep.h"
+#endif
+
+#ifdef __MICROBLAZE__
+#include "microblaze_sleep.h"
+#endif
+#include "xil_cache.h"
+
+/************************** Constant Definitions ****************************/
+
+#define NO_OF_TRB_PER_EP		2
+
+#ifdef PLATFORM_ZYNQMP
+#define ALIGNMENT_CACHELINE		__attribute__ ((aligned(64)))
+#else
+#define ALIGNMENT_CACHELINE		__attribute__ ((aligned(32)))
+#endif
+
+#define	XUSBPSU_PHY_TIMEOUT		5000U /* in micro seconds */
+
+#define XUSBPSU_EP_DIR_IN				1U
+#define XUSBPSU_EP_DIR_OUT				0U
+
+#define XUSBPSU_ENDPOINT_XFERTYPE_MASK      0x03    /* in bmAttributes */
+#define XUSBPSU_ENDPOINT_XFER_CONTROL       0U
+#define XUSBPSU_ENDPOINT_XFER_ISOC          1U
+#define XUSBPSU_ENDPOINT_XFER_BULK          2U
+#define XUSBPSU_ENDPOINT_XFER_INT           3U
+#define XUSBPSU_ENDPOINT_MAX_ADJUSTABLE     0x80
+
+#define	XUSBPSU_TEST_J							1U
+#define	XUSBPSU_TEST_K							2U
+#define	XUSBPSU_TEST_SE0_NAK					3U
+#define	XUSBPSU_TEST_PACKET						4U
+#define	XUSBPSU_TEST_FORCE_ENABLE				5U
+
+#define XUSBPSU_NUM_TRBS				8
+
+#define XUSBPSU_EVENT_PENDING		(0x00000001U << 0)
+
+#define XUSBPSU_EP_ENABLED			(0x00000001U << 0)
+#define XUSBPSU_EP_STALL			(0x00000001U << 1)
+#define XUSBPSU_EP_WEDGE			(0x00000001U << 2)
+#define XUSBPSU_EP_BUSY				((u32)0x00000001U << 4)
+#define XUSBPSU_EP_PENDING_REQUEST	(0x00000001U << 5)
+#define XUSBPSU_EP_MISSED_ISOC		(0x00000001U << 6)
+
+#define	XUSBPSU_GHWPARAMS0				0U
+#define	XUSBPSU_GHWPARAMS1				1U
+#define	XUSBPSU_GHWPARAMS2				2U
+#define	XUSBPSU_GHWPARAMS3				3U
+#define	XUSBPSU_GHWPARAMS4				4U
+#define	XUSBPSU_GHWPARAMS5				5U
+#define	XUSBPSU_GHWPARAMS6				6U
+#define	XUSBPSU_GHWPARAMS7				7U
+
+/* HWPARAMS0 */
+#define XUSBPSU_MODE(n)					((n) & 0x7)
+#define XUSBPSU_MDWIDTH(n)				(((n) & 0xff00) >> 8)
+
+/* HWPARAMS1 */
+#define XUSBPSU_NUM_INT(n)				(((n) & (0x3f << 15)) >> 15)
+
+/* HWPARAMS3 */
+#define XUSBPSU_NUM_IN_EPS_MASK		((u32)0x0000001fU << (u32)18)
+#define XUSBPSU_NUM_EPS_MASK		((u32)0x0000003fU << (u32)12)
+#define XUSBPSU_NUM_EPS(p)			(((u32)(p) &		\
+									(XUSBPSU_NUM_EPS_MASK)) >> (u32)12)
+#define XUSBPSU_NUM_IN_EPS(p)		(((u32)(p) &		\
+									(XUSBPSU_NUM_IN_EPS_MASK)) >> (u32)18)
+
+/* HWPARAMS7 */
+#define XUSBPSU_RAM1_DEPTH(n)			((n) & 0xffff)
+
+#define XUSBPSU_DEPEVT_XFERCOMPLETE		0x01U
+#define XUSBPSU_DEPEVT_XFERINPROGRESS	0x02U
+#define XUSBPSU_DEPEVT_XFERNOTREADY		0x03U
+#define XUSBPSU_DEPEVT_STREAMEVT		0x06U
+#define XUSBPSU_DEPEVT_EPCMDCMPLT		0x07U
+
+/* Within XferNotReady */
+#define DEPEVT_STATUS_TRANSFER_ACTIVE	(1 << 3)
+
+/* Within XferComplete */
+#define DEPEVT_STATUS_BUSERR			(1 << 0)
+#define DEPEVT_STATUS_SHORT				(1 << 1)
+#define DEPEVT_STATUS_IOC				(1 << 2)
+#define DEPEVT_STATUS_LST				(1 << 3)
+
+/* Stream event only */
+#define DEPEVT_STREAMEVT_FOUND		1U
+#define DEPEVT_STREAMEVT_NOTFOUND	2U
+
+/* Control-only Status */
+#define DEPEVT_STATUS_CONTROL_DATA				1U
+#define DEPEVT_STATUS_CONTROL_STATUS			2U
+#define DEPEVT_STATUS_CONTROL_DATA_INVALTRB		9
+#define DEPEVT_STATUS_CONTROL_STATUS_INVALTRB	0xA
+
+#define XUSBPSU_ENDPOINTS_NUM			12U
+
+#define XUSBPSU_EVENT_SIZE				4U       /* bytes */
+#define XUSBPSU_EVENT_MAX_NUM			64U      /* 2 events/endpoint */
+#define XUSBPSU_EVENT_BUFFERS_SIZE		(XUSBPSU_EVENT_SIZE * \
+										XUSBPSU_EVENT_MAX_NUM)
+
+#define XUSBPSU_EVENT_TYPE_MASK                 0x000000feU
+
+#define XUSBPSU_EVENT_TYPE_DEV                  0U
+#define XUSBPSU_EVENT_TYPE_CARKIT               3U
+#define XUSBPSU_EVENT_TYPE_I2C                  4U
+
+#define XUSBPSU_DEVICE_EVENT_DISCONNECT         0U
+#define XUSBPSU_DEVICE_EVENT_RESET              1U
+#define XUSBPSU_DEVICE_EVENT_CONNECT_DONE       2U
+#define XUSBPSU_DEVICE_EVENT_LINK_STATUS_CHANGE 3U
+#define XUSBPSU_DEVICE_EVENT_WAKEUP             4U
+#define XUSBPSU_DEVICE_EVENT_HIBER_REQ          5U
+#define XUSBPSU_DEVICE_EVENT_EOPF               6U
+#define XUSBPSU_DEVICE_EVENT_SOF                7U
+#define XUSBPSU_DEVICE_EVENT_ERRATIC_ERROR      9U
+#define XUSBPSU_DEVICE_EVENT_CMD_CMPL           10U
+#define XUSBPSU_DEVICE_EVENT_OVERFLOW           11U
+
+#define XUSBPSU_GEVNTCOUNT_MASK                 0x0000fffcU
+
+/*
+ * Control Endpoint state
+ */
+#define	XUSBPSU_EP0_SETUP_PHASE				1U	/**< Setup Phase */
+#define	XUSBPSU_EP0_DATA_PHASE				2U	/**< Data Phase */
+#define	XUSBPSU_EP0_STATUS_PHASE			3U	/**< Status Pahse */
+
+/*
+ * Link State
+ */
+#define		XUSBPSU_LINK_STATE_MASK			0x0FU
+
+typedef enum {
+	XUSBPSU_LINK_STATE_U0 = 0x00U, /**< in HS - ON */
+	XUSBPSU_LINK_STATE_U1 =	0x01U,
+	XUSBPSU_LINK_STATE_U2 =	0x02U, /**< in HS - SLEEP */
+	XUSBPSU_LINK_STATE_U3 =	0x03U, /**< in HS - SUSPEND */
+	XUSBPSU_LINK_STATE_SS_DIS =	0x04U,
+	XUSBPSU_LINK_STATE_RX_DET =	0x05U,
+	XUSBPSU_LINK_STATE_SS_INACT = 0x06U,
+	XUSBPSU_LINK_STATE_POLL	=	0x07U,
+	XUSBPSU_LINK_STATE_RECOV =	0x08U,
+	XUSBPSU_LINK_STATE_HRESET =	0x09U,
+	XUSBPSU_LINK_STATE_CMPLY =	0x0AU,
+	XUSBPSU_LINK_STATE_LPBK	=	0x0BU,
+	XUSBPSU_LINK_STATE_RESET = 	0x0EU,
+	XUSBPSU_LINK_STATE_RESUME =	0x0FU,
+}XusbPsuLinkState;
+
+typedef enum {
+	XUSBPSU_LINK_STATE_CHANGE_U0 = 0x00U, /**< in HS - ON */
+	XUSBPSU_LINK_STATE_CHANGE_SS_DIS =	0x04U,
+	XUSBPSU_LINK_STATE_CHANGE_RX_DET =	0x05U,
+	XUSBPSU_LINK_STATE_CHANGE_SS_INACT = 0x06U,
+	XUSBPSU_LINK_STATE_CHANGE_RECOV =	0x08U,
+	XUSBPSU_LINK_STATE_CHANGE_CMPLY =	0x0AU,
+}XusbPsuLinkStateChange;
+
+/*
+ * Device States
+ */
+#define		XUSBPSU_STATE_ATTACHED			0U
+#define		XUSBPSU_STATE_POWERED			1U
+#define		XUSBPSU_STATE_DEFAULT			2U
+#define		XUSBPSU_STATE_ADDRESS			3U
+#define		XUSBPSU_STATE_CONFIGURED		4U
+#define		XUSBPSU_STATE_SUSPENDED			5U
+
+/*
+ * Device Speeds
+ */
+#define		XUSBPSU_SPEED_UNKNOWN			0U
+#define		XUSBPSU_SPEED_LOW				1U
+#define		XUSBPSU_SPEED_FULL				2U
+#define		XUSBPSU_SPEED_HIGH				3U
+#define		XUSBPSU_SPEED_SUPER				4U
+
+
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * Software Event buffer representation
+ */
+struct XUsbPsu_EvtBuffer {
+	void	*BuffAddr;
+	u32		Offset;
+	u32		Count;
+	u32		Flags;
+};
+
+/**
+ * Transfer Request Block - Hardware format
+ */
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+struct XUsbPsu_Trb {
+	u32		BufferPtrLow;
+	u32		BufferPtrHigh;
+	u32		Size;
+	u32		Ctrl;
+#if defined (__ICCARM__)
+};
+#pragma pack(pop)
+#else
+} __attribute__((packed));
+#endif
+
+/*
+ * Endpoint Parameters
+ */
+struct XUsbPsu_EpParams {
+	u32	Param2;		/**< Parameter 2 */
+	u32	Param1;		/**< Parameter 1 */
+	u32	Param0;		/**< Parameter 0 */
+};
+
+/**
+ * USB Standard Control Request
+ */
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+typedef struct {
+        u8  bRequestType;
+        u8  bRequest;
+        u16 wValue;
+        u16 wIndex;
+        u16 wLength;
+#if defined (__ICCARM__)
+}SetupPacket;
+#pragma pack(pop)
+#else
+} __attribute__ ((packed)) SetupPacket;
+#endif
+
+/**
+ * Endpoint representation
+ */
+struct XUsbPsu_Ep {
+	void (*Handler)(void *, u32, u32);
+						/** < User handler called
+						 *   when data is sent for IN Ep
+						 *   and received for OUT Ep
+						 */
+#if defined (__ICCARM__)
+    #pragma data_alignment = 64
+	struct XUsbPsu_Trb	EpTrb[NO_OF_TRB_PER_EP + 1]; /**< One extra Trb is for Link Trb */
+	#pragma data_alignment = 4
+#else
+	struct XUsbPsu_Trb	EpTrb[NO_OF_TRB_PER_EP + 1] ALIGNMENT_CACHELINE;/**< TRB used by endpoint */
+#endif
+	u32	EpStatus;		/**< Flags to represent Endpoint status */
+	u32	EpSavedState;	/**< Endpoint status saved at the time of hibernation */
+	u32	RequestedBytes;	/**< RequestedBytes for transfer */
+	u32	BytesTxed;		/**< Actual Bytes transferred */
+	u32	Interval;		/**< Data transfer service interval */
+	u32	TrbEnqueue;
+	u32	TrbDequeue;
+	u16	MaxSize;		/**< Size of endpoint */
+	u16	CurUf;			/**< current microframe */
+	u8	*BufferPtr;		/**< Buffer location */
+	u8	ResourceIndex;	/**< Resource Index assigned to
+						 *  Endpoint by core
+						 */
+	u8	PhyEpNum;		/**< Physical Endpoint Number in core */
+	u8	UsbEpNum;		/**< USB Endpoint Number */
+	u8	Type;			/**< Type of Endpoint -
+						 *	 Control/BULK/INTERRUPT/ISOC
+						 */
+	u8	Direction;		/**< Direction - EP_DIR_OUT/EP_DIR_IN */
+	u8	UnalignedTx;
+};
+
+/**
+ * This typedef contains configuration information for the USB
+ * device.
+ */
+typedef struct {
+        u16 DeviceId;		/**< Unique ID of controller */
+        u32 BaseAddress;	/**< Core register base address */
+		u8 IsCacheCoherent;	/**< Describes whether Cache Coherent or not */
+} XUsbPsu_Config;
+
+typedef XUsbPsu_Config Usb_Config;
+
+struct Usb_DevData {
+	u8 Speed;
+	u8 State;
+
+	void *PrivateData;
+};
+
+/**
+ * USB Device Controller representation
+ */
+struct XUsbPsu {
+#if defined (__ICCARM__)
+    #pragma data_alignment = 64
+	SetupPacket SetupData;
+	struct XUsbPsu_Trb Ep0_Trb;
+	#pragma data_alignment = 4
+#else
+	SetupPacket SetupData ALIGNMENT_CACHELINE;
+					/**< Setup Packet buffer */
+	struct XUsbPsu_Trb Ep0_Trb ALIGNMENT_CACHELINE;
+#endif
+					/**< TRB for control transfers */
+	XUsbPsu_Config *ConfigPtr;	/**< Configuration info pointer */
+	struct XUsbPsu_Ep eps[XUSBPSU_ENDPOINTS_NUM]; /**< Endpoints */
+	struct XUsbPsu_EvtBuffer Evt;
+	struct XUsbPsu_EpParams EpParams;
+	u32 BaseAddress;	/**< Core register base address */
+	u32 DevDescSize;
+	u32 ConfigDescSize;
+	struct Usb_DevData *AppData;
+	void (*Chapter9)(struct Usb_DevData *, SetupPacket *);
+	void (*ResetIntrHandler)(struct Usb_DevData *);
+	void (*DisconnectIntrHandler)(struct Usb_DevData *);
+	void *DevDesc;
+	void *ConfigDesc;
+#if defined(__ICCARM__)
+    #pragma data_alignment = XUSBPSU_EVENT_BUFFERS_SIZE
+	u8 EventBuffer[XUSBPSU_EVENT_BUFFERS_SIZE];
+	#pragma data_alignment = 4
+#else
+	u8 EventBuffer[XUSBPSU_EVENT_BUFFERS_SIZE]
+						__attribute__((aligned(XUSBPSU_EVENT_BUFFERS_SIZE)));
+#endif
+	u8 NumOutEps;
+	u8 NumInEps;
+	u8 ControlDir;
+	u8 IsInTestMode;
+	u8 TestMode;
+	u8 Ep0State;
+	u8 LinkState;
+	u8 UnalignedTx;
+	u8 IsConfigDone;
+	u8 IsThreeStage;
+	u8 IsHibernated;                /**< Hibernated state */
+	u8 HasHibernation;              /**< Has hibernation support */
+	void *data_ptr;		/* pointer for storing applications data */
+};
+
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+struct XUsbPsu_Event_Type {
+	u32	Is_DevEvt:1;
+	u32	Type:7;
+	u32	Reserved8_31:24;
+#if defined (__ICCARM__)
+};
+#pragma pack(pop)
+#else
+} __attribute__((packed));
+#endif
+/**
+ * struct XUsbPsu_event_depvt - Device Endpoint Events
+ * @Is_EpEvt: indicates this is an endpoint event
+ * @endpoint_number: number of the endpoint
+ * @endpoint_event: The event we have:
+ *	0x00	- Reserved
+ *	0x01	- XferComplete
+ *	0x02	- XferInProgress
+ *	0x03	- XferNotReady
+ *	0x04	- RxTxFifoEvt (IN->Underrun, OUT->Overrun)
+ *	0x05	- Reserved
+ *	0x06	- StreamEvt
+ *	0x07	- EPCmdCmplt
+ * @Reserved11_10: Reserved, don't use.
+ * @Status: Indicates the status of the event. Refer to databook for
+ *	more information.
+ * @Parameters: Parameters of the current event. Refer to databook for
+ *	more information.
+ */
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+struct XUsbPsu_Event_Epevt {
+	u32	Is_EpEvt:1;
+	u32	Epnumber:5;
+	u32	Endpoint_Event:4;
+	u32	Reserved11_10:2;
+	u32	Status:4;
+	u32	Parameters:16;
+#if defined (__ICCARM__)
+};
+#pragma pack(pop)
+#else
+} __attribute__((packed));
+#endif
+/**
+ * struct XUsbPsu_event_devt - Device Events
+ * @Is_DevEvt: indicates this is a non-endpoint event
+ * @Device_Event: indicates it's a device event. Should read as 0x00
+ * @Type: indicates the type of device event.
+ *	0	- DisconnEvt
+ *	1	- USBRst
+ *	2	- ConnectDone
+ *	3	- ULStChng
+ *	4	- WkUpEvt
+ *	5	- Reserved
+ *	6	- EOPF
+ *	7	- SOF
+ *	8	- Reserved
+ *	9	- ErrticErr
+ *	10	- CmdCmplt
+ *	11	- EvntOverflow
+ *	12	- VndrDevTstRcved
+ * @Reserved15_12: Reserved, not used
+ * @Event_Info: Information about this event
+ * @Reserved31_25: Reserved, not used
+ */
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+struct XUsbPsu_Event_Devt {
+	u32	Is_DevEvt:1;
+	u32	Device_Event:7;
+	u32	Type:4;
+	u32	Reserved15_12:4;
+	u32	Event_Info:9;
+	u32	Reserved31_25:7;
+#if defined (__ICCARM__)
+};
+#pragma pack(pop)
+#else
+} __attribute__((packed));
+#endif
+/**
+ * struct XUsbPsu_event_gevt - Other Core Events
+ * @one_bit: indicates this is a non-endpoint event (not used)
+ * @device_event: indicates it's (0x03) Carkit or (0x04) I2C event.
+ * @phy_port_number: self-explanatory
+ * @reserved31_12: Reserved, not used.
+ */
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+struct XUsbPsu_Event_Gevt {
+	u32	Is_GlobalEvt:1;
+	u32	Device_Event:7;
+	u32	Phy_Port_Number:4;
+	u32	Reserved31_12:20;
+#if defined (__ICCARM__)
+};
+#pragma pack(pop)
+#else
+} __attribute__((packed));
+#endif
+/**
+ * union XUsbPsu_event - representation of Event Buffer contents
+ * @raw: raw 32-bit event
+ * @type: the type of the event
+ * @depevt: Device Endpoint Event
+ * @devt: Device Event
+ * @gevt: Global Event
+ */
+union XUsbPsu_Event {
+	u32				Raw;
+	struct XUsbPsu_Event_Type	Type;
+	struct XUsbPsu_Event_Epevt	Epevt;
+	struct XUsbPsu_Event_Devt	Devt;
+	struct XUsbPsu_Event_Gevt	Gevt;
+};
+
+/***************** Macros (Inline Functions) Definitions *********************/
+#if defined (__ICCARM__)
+#define IS_ALIGNED(x, a)	(((x) & ((u32)(a) - 1)) == 0U)
+#else
+#define IS_ALIGNED(x, a)	(((x) & ((typeof(x))(a) - 1)) == 0U)
+#endif
+
+#if defined (__ICCARM__)
+#define roundup(x, y) (((((x) + (u32)(y - 1)) / (u32)y) * (u32)y))
+
+#else
+#define roundup(x, y) (                                 \
+        (((x) + (u32)((const typeof(y))y - 1)) / \
+			(u32)((const typeof(y))y)) * \
+				(u32)((const typeof(y))y)               \
+)
+#endif
+#define DECLARE_DEV_DESC(Instance, desc)			\
+	(Instance).DevDesc = &(desc); 					\
+	(Instance).DevDescSize = sizeof((desc))
+
+#define DECLARE_CONFIG_DESC(Instance, desc) 		\
+	(Instance).ConfigDesc = &(desc); 				\
+	(Instance).ConfigDescSize = sizeof((desc))
+
+static inline void *XUsbPsu_get_drvdata(struct XUsbPsu *InstancePtr) {
+	return InstancePtr->data_ptr;
+}
+
+static inline void XUsbPsu_set_drvdata(struct XUsbPsu *InstancePtr, void *data) {
+	InstancePtr->data_ptr = data;
+}
+
+static inline void XUsbPsu_set_ch9handler(
+		struct XUsbPsu *InstancePtr,
+		void (*func)(struct Usb_DevData *, SetupPacket *)) {
+	InstancePtr->Chapter9 = func;
+}
+
+static inline void XUsbPsu_set_rsthandler(
+		struct XUsbPsu *InstancePtr,
+		void (*func)(struct Usb_DevData *)) {
+	InstancePtr->ResetIntrHandler = func;
+}
+
+static inline void XUsbPsu_set_disconnect(
+		struct XUsbPsu *InstancePtr,
+		void (*func)(struct Usb_DevData *)) {
+	InstancePtr->DisconnectIntrHandler = func;
+}
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Functions in xusbpsu.c
+ */
+s32 XUsbPsu_Wait_Clear_Timeout(struct XUsbPsu *InstancePtr, u32 Offset,
+								u32 BitMask, u32 Timeout);
+s32 XUsbPsu_Wait_Set_Timeout(struct XUsbPsu *InstancePtr, u32 Offset,
+								u32 BitMask, u32 Timeout);
+void XUsbPsu_SetMode(struct XUsbPsu *InstancePtr, u32 Mode);
+void XUsbPsu_PhyReset(struct XUsbPsu *InstancePtr);
+void XUsbPsu_EventBuffersSetup(struct XUsbPsu *InstancePtr);
+void XUsbPsu_EventBuffersReset(struct XUsbPsu *InstancePtr);
+void XUsbPsu_CoreNumEps(struct XUsbPsu *InstancePtr);
+void XUsbPsu_cache_hwparams(struct XUsbPsu *InstancePtr);
+u32 XUsbPsu_ReadHwParams(struct XUsbPsu *InstancePtr, u8 RegIndex);
+s32 XUsbPsu_CoreInit(struct XUsbPsu *InstancePtr);
+void XUsbPsu_EnableIntr(struct XUsbPsu *InstancePtr, u32 Mask);
+void XUsbPsu_DisableIntr(struct XUsbPsu *InstancePtr, u32 Mask);
+s32 XUsbPsu_CfgInitialize(struct XUsbPsu *InstancePtr,
+			XUsbPsu_Config *ConfigPtr, u32 BaseAddress);
+s32 XUsbPsu_Start(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_Stop(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_SetTestMode(struct XUsbPsu *InstancePtr, u32 Mode);
+XusbPsuLinkState XUsbPsu_GetLinkState(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_SetLinkState(struct XUsbPsu *InstancePtr,
+		XusbPsuLinkStateChange State);
+s32 XUsbPsu_SendGenericCmd(struct XUsbPsu *InstancePtr,
+					s32 Cmd, u32 Param);
+void XUsbPsu_SetSpeed(struct XUsbPsu *InstancePtr, u32 Speed);
+s32 XUsbPsu_SetDeviceAddress(struct XUsbPsu *InstancePtr, u16 Addr);
+s32 XUsbPsu_SetU1SleepTimeout(struct XUsbPsu *InstancePtr, u8 Sleep);
+s32 XUsbPsu_SetU2SleepTimeout(struct XUsbPsu *InstancePtr, u8 Sleep);
+s32 XUsbPsu_AcceptU1U2Sleep(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_U1SleepEnable(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_U2SleepEnable(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_U1SleepDisable(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_U2SleepDisable(struct XUsbPsu *InstancePtr);
+
+/*
+ * Functions in xusbpsu_endpoint.c
+ */
+struct XUsbPsu_EpParams *XUsbPsu_GetEpParams(struct XUsbPsu *InstancePtr);
+u32 XUsbPsu_EpGetTransferIndex(struct XUsbPsu *InstancePtr, u8 UsbEpNum,
+				u8 Dir);
+s32 XUsbPsu_SendEpCmd(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
+			u32 Cmd, struct XUsbPsu_EpParams *Params);
+s32 XUsbPsu_StartEpConfig(struct XUsbPsu *InstancePtr, u32 UsbEpNum,
+				u8 Dir);
+s32 XUsbPsu_SetEpConfig(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
+				u16 Size, u8 Type, u8 Restore);
+s32 XUsbPsu_SetXferResource(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir);
+s32 XUsbPsu_EpEnable(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
+				u16 Maxsize, u8 Type, u8 Restore);
+s32 XUsbPsu_EpDisable(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir);
+s32 XUsbPsu_EnableControlEp(struct XUsbPsu *InstancePtr, u16 Size);
+void XUsbPsu_InitializeEps(struct XUsbPsu *InstancePtr);
+void XUsbPsu_StopTransfer(struct XUsbPsu *InstancePtr, u8 UsbEpNum,
+				u8 Dir, u8 Force);
+void XUsbPsu_SaveEndpointState(struct XUsbPsu *InstancePtr,
+				struct XUsbPsu_Ep *Ept);
+void XUsbPsu_ClearStalls(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_EpBufferSend(struct XUsbPsu *InstancePtr, u8 UsbEp,
+				u8 *BufferPtr, u32 BufferLen);
+s32 XUsbPsu_EpBufferRecv(struct XUsbPsu *InstancePtr, u8 UsbEp,
+				u8 *BufferPtr, u32 Length);
+void XUsbPsu_EpSetStall(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir);
+void XUsbPsu_EpClearStall(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir);
+void XUsbPsu_SetEpHandler(struct XUsbPsu *InstancePtr, u8 Epnum,
+			u8 Dir, void (*Handler)(void *, u32, u32));
+s32 XUsbPsu_IsEpStalled(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir);
+void XUsbPsu_EpXferComplete(struct XUsbPsu *InstancePtr,
+							const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_EpXferNotReady(struct XUsbPsu *InstancePtr,
+							const struct XUsbPsu_Event_Epevt *Event);
+
+/*
+ * Functions in xusbpsu_controltransfers.c
+ */
+s32 XUsbPsu_RecvSetup(struct XUsbPsu *InstancePtr);
+void XUsbPsu_Ep0StallRestart(struct XUsbPsu *InstancePtr);
+void XUsbPsu_Ep0DataDone(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_Ep0StatusDone(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_Ep0XferComplete(struct XUsbPsu *InstancePtr,
+			const struct XUsbPsu_Event_Epevt *Event);
+s32 XUsbPsu_Ep0StartStatus(struct XUsbPsu *InstancePtr,
+				const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_Ep0_EndControlData(struct XUsbPsu *InstancePtr,
+					struct XUsbPsu_Ep *Ept);
+void XUsbPsu_Ep0XferNotReady(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_Ep0Intr(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event);
+s32 XUsbPsu_Ep0Send(struct XUsbPsu *InstancePtr, u8 *BufferPtr,
+			u32 BufferLen);
+s32 XUsbPsu_Ep0Recv(struct XUsbPsu *InstancePtr, u8 *BufferPtr, u32 Length);
+void XUsbSleep(u32 USeconds);
+
+/*
+ * Functions in xusbpsu_intr.c
+ */
+void XUsbPsu_EpInterrupt(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_DisconnectIntr(struct XUsbPsu *InstancePtr);
+void XUsbPsu_ResetIntr(struct XUsbPsu *InstancePtr);
+void XUsbPsu_ConnDoneIntr(struct XUsbPsu *InstancePtr);
+void XUsbPsu_LinkStsChangeIntr(struct XUsbPsu *InstancePtr,
+				u32 EvtInfo);
+void XUsbPsu_DevInterrupt(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Devt *Event);
+void XUsbPsu_EventHandler(struct XUsbPsu *InstancePtr,
+                const union XUsbPsu_Event *Event);
+void XUsbPsu_EventBufferHandler(struct XUsbPsu *InstancePtr);
+void XUsbPsu_IntrHandler(void *XUsbPsuInstancePtr);
+
+#ifdef XUSBPSU_HIBERNATION_ENABLE
+void XUsbPsu_InitHibernation(struct XUsbPsu *InstancePtr);
+void Xusbpsu_HibernationIntr(struct XUsbPsu *InstancePtr);
+void XUsbPsu_WakeUpIntrHandler(void *XUsbPsuInstancePtr);
+void XUsbPsu_WakeupIntr(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_SetupScratchpad(struct XUsbPsu *InstancePtr);
+#endif
+
+/*
+ * Functions in xusbpsu_sinit.c
+ */
+XUsbPsu_Config *XUsbPsu_LookupConfig(u16 DeviceId);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* End of protection macro. */
+/** @} */
diff --git a/src/Xilinx/include/xusbpsu_endpoint.h b/src/Xilinx/include/xusbpsu_endpoint.h
new file mode 100644
index 0000000..b80da48
--- /dev/null
+++ b/src/Xilinx/include/xusbpsu_endpoint.h
@@ -0,0 +1,187 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * @file xusbps_endpoint.h
+* @addtogroup usbpsu_v1_3
+* @{
+ *
+ * This is an internal file containing the definitions for endpoints. It is
+ * included by the xusbps_endpoint.c which is implementing the endpoint
+ * functions and by xusbps_intr.c.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- --------------------------------------------------------
+ * 1.0   sg  06/06/16  First release
+ * 1.4 	 bk  12/01/18  Modify USBPSU driver code to fit USB common example code
+ *		       for all USB IPs.
+ *
+ * 

+ *
+ ******************************************************************************/
+#ifndef XUSBPSU_ENDPOINT_H
+#define XUSBPSU_ENDPOINT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xusb_wrapper.h"
+#include "xil_types.h"
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/* Device Generic Command Register */
+#define XUSBPSU_DGCMD_SET_LMP                   0x00000001U
+#define XUSBPSU_DGCMD_SET_PERIODIC_PAR          0x00000002U
+#define XUSBPSU_DGCMD_XMIT_FUNCTION             0x00000003U
+
+/* These apply for core versions 1.94a and later */
+#define XUSBPSU_DGCMD_SET_SCRATCHPAD_ADDR_LO    0x00000004U
+#define XUSBPSU_DGCMD_SET_SCRATCHPAD_ADDR_HI    0x00000005U
+
+#define XUSBPSU_DGCMD_SELECTED_FIFO_FLUSH       0x00000009U
+#define XUSBPSU_DGCMD_ALL_FIFO_FLUSH            0x0000000aU
+#define XUSBPSU_DGCMD_SET_ENDPOINT_NRDY         0x0000000cU
+#define XUSBPSU_DGCMD_RUN_SOC_BUS_LOOPBACK      0x00000010U
+
+#define XUSBPSU_DGCMD_STATUS(n)                 (((u32)(n) >> 15) & 1)
+#define XUSBPSU_DGCMD_CMDACT                    (0x00000001U << 10)
+#define XUSBPSU_DGCMD_CMDIOC                    (0x00000001U << 8)
+
+/* Device Generic Command Parameter Register */
+#define XUSBPSU_DGCMDPAR_FORCE_LINKPM_ACCEPT    (0x00000001U << 0)
+#define XUSBPSU_DGCMDPAR_FIFO_NUM(n)            ((u32)(n) << 0)
+#define XUSBPSU_DGCMDPAR_RX_FIFO                (0x00000000U << 5)
+#define XUSBPSU_DGCMDPAR_TX_FIFO                (0x00000001U << 5)
+#define XUSBPSU_DGCMDPAR_LOOPBACK_DIS           (0x00000000U << 0)
+#define XUSBPSU_DGCMDPAR_LOOPBACK_ENA           (0x00000001U << 0)
+
+/* Device Endpoint Command Register */
+#define XUSBPSU_DEPCMD_PARAM_SHIFT              16U
+#define XUSBPSU_DEPCMD_PARAM(x)         ((u32)(x) << XUSBPSU_DEPCMD_PARAM_SHIFT)
+#define XUSBPSU_DEPCMD_GET_RSC_IDX(x)  (((u32)(x) >> XUSBPSU_DEPCMD_PARAM_SHIFT) & \
+                                        (u32)0x0000007fU)
+#define XUSBPSU_DEPCMD_STATUS(x)                (((u32)(x) >> 12) & (u32)0xF)
+#define XUSBPSU_DEPCMD_HIPRI_FORCERM            (0x00000001U << 11)
+#define XUSBPSU_DEPCMD_CMDACT                   (0x00000001U << 10)
+#define XUSBPSU_DEPCMD_CMDIOC                   (0x00000001U << 8)
+
+#define XUSBPSU_DEPCMD_DEPSTARTCFG              0x00000009U
+#define XUSBPSU_DEPCMD_ENDTRANSFER              0x00000008U
+#define XUSBPSU_DEPCMD_UPDATETRANSFER           0x00000007U
+#define XUSBPSU_DEPCMD_STARTTRANSFER            0x00000006U
+#define XUSBPSU_DEPCMD_CLEARSTALL               0x00000005U
+#define XUSBPSU_DEPCMD_SETSTALL                 0x00000004U
+#define XUSBPSU_DEPCMD_GETEPSTATE               0x00000003U
+#define XUSBPSU_DEPCMD_SETTRANSFRESOURCE        0x00000002U
+#define XUSBPSU_DEPCMD_SETEPCONFIG              0x00000001U
+
+/* The EP number goes 0..31 so ep0 is always out and ep1 is always in */
+#define XUSBPSU_DALEPENA_EP(n)                  (0x00000001U << (n))
+
+#define XUSBPSU_DEPCFG_INT_NUM(n)               ((u32)(n) << 0)
+#define XUSBPSU_DEPCFG_XFER_COMPLETE_EN         (0x00000001U << 8)
+#define XUSBPSU_DEPCFG_XFER_IN_PROGRESS_EN      (0x00000001U << 9)
+#define XUSBPSU_DEPCFG_XFER_NOT_READY_EN        (0x00000001U << 10)
+#define XUSBPSU_DEPCFG_FIFO_ERROR_EN            (0x00000001U << 11)
+#define XUSBPSU_DEPCFG_STREAM_EVENT_EN          (0x00000001U << 13)
+#define XUSBPSU_DEPCFG_BINTERVAL_M1(n)          ((u32)(n) << 16)
+#define XUSBPSU_DEPCFG_STREAM_CAPABLE           (0x00000001U << 24)
+#define XUSBPSU_DEPCFG_EP_NUMBER(n)             ((u32)(n) << 25)
+#define XUSBPSU_DEPCFG_BULK_BASED               (0x00000001U << 30)
+#define XUSBPSU_DEPCFG_FIFO_BASED               (0x00000001U << 31)
+
+/* DEPCFG parameter 0 */
+#define XUSBPSU_DEPCFG_EP_TYPE(n)               ((u32)(n) << 1)
+#define XUSBPSU_DEPCFG_MAX_PACKET_SIZE(n)       ((u32)(n) << 3)
+#define XUSBPSU_DEPCFG_FIFO_NUMBER(n)           ((u32)(n) << 17)
+#define XUSBPSU_DEPCFG_BURST_SIZE(n)            ((u32)(n) << 22)
+#define XUSBPSU_DEPCFG_DATA_SEQ_NUM(n)          ((u32)(n) << 26)
+/* This applies for core versions earlier than 1.94a */
+#define XUSBPSU_DEPCFG_IGN_SEQ_NUM              (0x00000001U << 31)
+/* These apply for core versions 1.94a and later */
+#define XUSBPSU_DEPCFG_ACTION_INIT              (0x00000000U << 30)
+#define XUSBPSU_DEPCFG_ACTION_RESTORE           (0x00000001U << 30)
+#define XUSBPSU_DEPCFG_ACTION_MODIFY            (0x00000002U << 30)
+
+/* DEPXFERCFG parameter 0 */
+#define XUSBPSU_DEPXFERCFG_NUM_XFER_RES(n) ((u32)(n) & (u32)0xffff)
+
+#define XUSBPSU_DEPCMD_TYPE_BULK                2U
+#define XUSBPSU_DEPCMD_TYPE_INTR                3U
+
+/* TRB Length, PCM and Status */
+#define XUSBPSU_TRB_SIZE_MASK           (0x00ffffffU)
+#define XUSBPSU_TRB_SIZE_LENGTH(n)      ((u32)(n) & XUSBPSU_TRB_SIZE_MASK)
+#define XUSBPSU_TRB_SIZE_PCM1(n)        (((u32)(n) & (u32)0x03) << 24)
+#define XUSBPSU_TRB_SIZE_TRBSTS(n)      (((u32)(n) & ((u32)0x0f << 28)) >> 28)
+
+#define XUSBPSU_TRBSTS_OK               0U
+#define XUSBPSU_TRBSTS_MISSED_ISOC      1U
+#define XUSBPSU_TRBSTS_SETUP_PENDING    2U
+#define XUSBPSU_TRB_STS_XFER_IN_PROG    4U
+
+/* TRB Control */
+#define XUSBPSU_TRB_CTRL_HWO            ((u32)0x00000001U << 0)
+#define XUSBPSU_TRB_CTRL_LST            ((u32)0x00000001U << 1)
+#define XUSBPSU_TRB_CTRL_CHN            ((u32)0x00000001U << 2)
+#define XUSBPSU_TRB_CTRL_CSP            ((u32)0x00000001U << 3)
+#define XUSBPSU_TRB_CTRL_TRBCTL(n)      (((u32)(n) & (u32)0x3f) << 4)
+#define XUSBPSU_TRB_CTRL_ISP_IMI        (0x00000001U << 10)
+#define XUSBPSU_TRB_CTRL_IOC            (0x00000001U << 11)
+#define XUSBPSU_TRB_CTRL_SID_SOFN(n)    (((u32)(n) & (u32)0xffff) << 14)
+
+#define XUSBPSU_TRBCTL_NORMAL                   XUSBPSU_TRB_CTRL_TRBCTL(1)
+#define XUSBPSU_TRBCTL_CONTROL_SETUP            XUSBPSU_TRB_CTRL_TRBCTL(2)
+#define XUSBPSU_TRBCTL_CONTROL_STATUS2          XUSBPSU_TRB_CTRL_TRBCTL(3)
+#define XUSBPSU_TRBCTL_CONTROL_STATUS3          XUSBPSU_TRB_CTRL_TRBCTL(4)
+#define XUSBPSU_TRBCTL_CONTROL_DATA             XUSBPSU_TRB_CTRL_TRBCTL(5)
+#define XUSBPSU_TRBCTL_ISOCHRONOUS_FIRST        XUSBPSU_TRB_CTRL_TRBCTL(6)
+#define XUSBPSU_TRBCTL_ISOCHRONOUS              XUSBPSU_TRB_CTRL_TRBCTL(7)
+#define XUSBPSU_TRBCTL_LINK_TRB                 XUSBPSU_TRB_CTRL_TRBCTL(8)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XUSBPSU_ENDPOINT_H */
+/** @} */
diff --git a/src/Xilinx/include/xusbpsu_hw.h b/src/Xilinx/include/xusbpsu_hw.h
new file mode 100644
index 0000000..344f919
--- /dev/null
+++ b/src/Xilinx/include/xusbpsu_hw.h
@@ -0,0 +1,455 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xusbpsu_hw.h
+* @addtogroup usbpsu_v1_3
+* @{
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.0   sg    06/06/16 First release
+* 1.4   myk   12/01/18 Added support of hibernation
+*
+* 

+*
+*****************************************************************************/
+
+#ifndef XUSBPSU_HW_H	/* Prevent circular inclusions */
+#define XUSBPSU_HW_H	/* by using protection macros  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+/************************** Constant Definitions ****************************/
+
+/**@name Register offsets
+ *
+ * The following constants provide access to each of the registers of the
+ * USBPSU device.
+ * @{
+ */
+
+/**/
+#define XUSBPSU_PORTSC_30						0x430
+#define XUSBPSU_PORTMSC_30						0x434
+
+/* XUSBPSU registers memory space boundries */
+#define XUSBPSU_GLOBALS_REGS_START              0xc100
+#define XUSBPSU_GLOBALS_REGS_END                0xc6ff
+#define XUSBPSU_DEVICE_REGS_START               0xc700
+#define XUSBPSU_DEVICE_REGS_END                 0xcbff
+#define XUSBPSU_OTG_REGS_START                  0xcc00
+#define XUSBPSU_OTG_REGS_END                    0xccff
+
+/* Global Registers */
+#define XUSBPSU_GSBUSCFG0                       0xc100
+#define XUSBPSU_GSBUSCFG1                       0xc104
+#define XUSBPSU_GTXTHRCFG                       0xc108
+#define XUSBPSU_GRXTHRCFG                       0xc10c
+#define XUSBPSU_GCTL                            0xc110
+#define XUSBPSU_GEVTEN                          0xc114
+#define XUSBPSU_GSTS                            0xc118
+#define XUSBPSU_GSNPSID                         0xc120
+#define XUSBPSU_GGPIO                           0xc124
+#define XUSBPSU_GUID                            0xc128
+#define XUSBPSU_GUCTL                           0xc12c
+#define XUSBPSU_GBUSERRADDR0                    0xc130
+#define XUSBPSU_GBUSERRADDR1                    0xc134
+#define XUSBPSU_GPRTBIMAP0                      0xc138
+#define XUSBPSU_GPRTBIMAP1                      0xc13c
+#define XUSBPSU_GHWPARAMS0_OFFSET               0xc140U
+#define XUSBPSU_GHWPARAMS1_OFFSET               0xc144U
+#define XUSBPSU_GHWPARAMS2_OFFSET               0xc148U
+#define XUSBPSU_GHWPARAMS3_OFFSET               0xc14cU
+#define XUSBPSU_GHWPARAMS4_OFFSET               0xc150U
+#define XUSBPSU_GHWPARAMS5_OFFSET               0xc154U
+#define XUSBPSU_GHWPARAMS6_OFFSET               0xc158U
+#define XUSBPSU_GHWPARAMS7_OFFSET               0xc15cU
+#define XUSBPSU_GDBGFIFOSPACE                   0xc160
+#define XUSBPSU_GDBGLTSSM                       0xc164
+#define XUSBPSU_GPRTBIMAP_HS0                   0xc180
+#define XUSBPSU_GPRTBIMAP_HS1                   0xc184
+#define XUSBPSU_GPRTBIMAP_FS0                   0xc188
+#define XUSBPSU_GPRTBIMAP_FS1                   0xc18c
+
+#define XUSBPSU_GUSB2PHYCFG(n)                  ((u32)0xc200 + ((u32)(n) * (u32)0x04))
+#define XUSBPSU_GUSB2I2CCTL(n)                  ((u32)0xc240 + ((u32)(n) * (u32)0x04))
+
+#define XUSBPSU_GUSB2PHYACC(n)                  ((u32)0xc280 + ((u32)(n) * (u32)0x04))
+
+#define XUSBPSU_GUSB3PIPECTL(n)                 ((u32)0xc2c0 + ((u32)(n) * (u32)0x04))
+
+#define XUSBPSU_GTXFIFOSIZ(n)                   ((u32)0xc300 + ((u32)(n) * (u32)0x04))
+#define XUSBPSU_GRXFIFOSIZ(n)                   ((u32)0xc380 + ((u32)(n) * (u32)0x04))
+
+#define XUSBPSU_GEVNTADRLO(n)                   ((u32)0xc400 + ((u32)(n) * (u32)0x10))
+#define XUSBPSU_GEVNTADRHI(n)                   ((u32)0xc404 + ((u32)(n) * (u32)0x10))
+#define XUSBPSU_GEVNTSIZ(n)                     ((u32)0xc408 + ((u32)(n) * (u32)0x10))
+#define XUSBPSU_GEVNTCOUNT(n)                   ((u32)0xc40c + ((u32)(n) * (u32)0x10))
+
+#define XUSBPSU_GHWPARAMS8                      0x0000c600U
+
+/* Device Registers */
+#define XUSBPSU_DCFG                            0x0000c700U
+#define XUSBPSU_DCTL                            0x0000c704U
+#define XUSBPSU_DEVTEN                          0x0000c708U
+#define XUSBPSU_DSTS                            0x0000c70cU
+#define XUSBPSU_DGCMDPAR                        0x0000c710U
+#define XUSBPSU_DGCMD                           0x0000c714U
+#define XUSBPSU_DALEPENA                        0x0000c720U
+#define XUSBPSU_DEPCMDPAR2(n)                   ((u32)0xc800 + ((u32)n * (u32)0x10))
+#define XUSBPSU_DEPCMDPAR1(n)                   ((u32)0xc804 + ((u32)n * (u32)0x10))
+#define XUSBPSU_DEPCMDPAR0(n)                   ((u32)0xc808 + ((u32)n * (u32)0x10))
+#define XUSBPSU_DEPCMD(n)                       ((u32)0xc80c + ((u32)n * (u32)0x10))
+
+/* OTG Registers */
+#define XUSBPSU_OCFG                            0x0000cc00U
+#define XUSBPSU_OCTL                            0x0000cc04U
+#define XUSBPSU_OEVT                            0xcc08U
+#define XUSBPSU_OEVTEN                          0xcc0CU
+#define XUSBPSU_OSTS                            0xcc10U
+
+/* Bit fields */
+
+/* Global Configuration Register */
+#define XUSBPSU_GCTL_PWRDNSCALE(n)              ((n) << 19)
+#define XUSBPSU_GCTL_U2RSTECN                   (1 << 16)
+#define XUSBPSU_GCTL_RAMCLKSEL(x)       (((x) & XUSBPSU_GCTL_CLK_MASK) << 6)
+#define XUSBPSU_GCTL_CLK_BUS                    (0U)
+#define XUSBPSU_GCTL_CLK_PIPE                   (1U)
+#define XUSBPSU_GCTL_CLK_PIPEHALF               (2U)
+#define XUSBPSU_GCTL_CLK_MASK                   (3U)
+
+#define XUSBPSU_GCTL_PRTCAP(n)                  (((n) & (3 << 12)) >> 12)
+#define XUSBPSU_GCTL_PRTCAPDIR(n)               ((n) << 12)
+#define XUSBPSU_GCTL_PRTCAP_HOST                1U
+#define XUSBPSU_GCTL_PRTCAP_DEVICE              2U
+#define XUSBPSU_GCTL_PRTCAP_OTG                 3U
+
+#define XUSBPSU_GCTL_CORESOFTRESET              (0x00000001U << 11)
+#define XUSBPSU_GCTL_SOFITPSYNC                 (0x00000001U << 10)
+#define XUSBPSU_GCTL_SCALEDOWN(n)               ((u32)(n) << 4)
+#define XUSBPSU_GCTL_SCALEDOWN_MASK             XUSBPSU_GCTL_SCALEDOWN(3)
+#define XUSBPSU_GCTL_DISSCRAMBLE                (0x00000001U << 3)
+#define XUSBPSU_GCTL_U2EXIT_LFPS                (0x00000001U << 2)
+#define XUSBPSU_GCTL_GBLHIBERNATIONEN           (0x00000001U << 1)
+#define XUSBPSU_GCTL_DSBLCLKGTNG                (0x00000001U << 0)
+
+/* Global Status Register Device Interrupt Mask */
+#define XUSBPSU_GSTS_DEVICE_IP_MASK 			0x00000040
+#define XUSBPSU_GSTS_CUR_MODE			(0x00000001U << 0)
+
+/* Global USB2 PHY Configuration Register */
+#define XUSBPSU_GUSB2PHYCFG_PHYSOFTRST          (0x00000001U << 31)
+#define XUSBPSU_GUSB2PHYCFG_SUSPHY              (0x00000001U << 6)
+
+/* Global USB3 PIPE Control Register */
+#define XUSBPSU_GUSB3PIPECTL_PHYSOFTRST         (0x00000001U << 31)
+#define XUSBPSU_GUSB3PIPECTL_SUSPHY             (0x00000001U << 17)
+
+/* Global TX Fifo Size Register */
+#define XUSBPSU_GTXFIFOSIZ_TXFDEF(n)            ((u32)(n) & (u32)0xffffU)
+#define XUSBPSU_GTXFIFOSIZ_TXFSTADDR(n)         ((u32)(n) & 0xffff0000U)
+
+/* Global Event Size Registers */
+#define XUSBPSU_GEVNTSIZ_INTMASK                ((u32)0x00000001U << 31U)
+#define XUSBPSU_GEVNTSIZ_SIZE(n)                ((u32)(n) & (u32)0xffffU)
+
+/* Global HWPARAMS1 Register */
+#define XUSBPSU_GHWPARAMS1_EN_PWROPT(n)         (((u32)(n) & ((u32)3 << 24)) >> 24)
+#define XUSBPSU_GHWPARAMS1_EN_PWROPT_NO         0U
+#define XUSBPSU_GHWPARAMS1_EN_PWROPT_CLK        1U
+#define XUSBPSU_GHWPARAMS1_EN_PWROPT_HIB        2U
+#define XUSBPSU_GHWPARAMS1_PWROPT(n)            ((u32)(n) << 24)
+#define XUSBPSU_GHWPARAMS1_PWROPT_MASK          XUSBPSU_GHWPARAMS1_PWROPT(3)
+
+/* Global HWPARAMS4 Register */
+#define XUSBPSU_GHWPARAMS4_HIBER_SCRATCHBUFS(n) (((u32)(n) & ((u32)0x0f << 13)) >> 13)
+#define XUSBPSU_MAX_HIBER_SCRATCHBUFS           15U
+
+/* Device Configuration Register */
+#define XUSBPSU_DCFG_DEVADDR(addr)              ((u32)(addr) << 3)
+#define XUSBPSU_DCFG_DEVADDR_MASK               XUSBPSU_DCFG_DEVADDR(0x7f)
+
+#define XUSBPSU_DCFG_SPEED_MASK					7U
+#define XUSBPSU_DCFG_SUPERSPEED					4U
+#define XUSBPSU_DCFG_HIGHSPEED					0U
+#define XUSBPSU_DCFG_FULLSPEED2					1U
+#define XUSBPSU_DCFG_LOWSPEED					2U
+#define XUSBPSU_DCFG_FULLSPEED1					3U
+
+#define XUSBPSU_DCFG_LPM_CAP                    (0x00000001U << 22U)
+
+/* Device Control Register */
+#define XUSBPSU_DCTL_RUN_STOP                   (0x00000001U << 31U)
+#define XUSBPSU_DCTL_CSFTRST                    ((u32)0x00000001U << 30U)
+#define XUSBPSU_DCTL_LSFTRST                    (0x00000001U << 29U)
+
+#define XUSBPSU_DCTL_HIRD_THRES_MASK            (0x0000001fU << 24U)
+#define XUSBPSU_DCTL_HIRD_THRES(n)              ((u32)(n) << 24)
+
+#define XUSBPSU_DCTL_APPL1RES                   (0x00000001U << 23)
+
+/* These apply for core versions 1.87a and earlier */
+#define XUSBPSU_DCTL_TRGTULST_MASK              (0x0000000fU << 17)
+#define XUSBPSU_DCTL_TRGTULST(n)                ((u32)(n) << 17)
+#define XUSBPSU_DCTL_TRGTULST_U2                (XUSBPSU_DCTL_TRGTULST(2))
+#define XUSBPSU_DCTL_TRGTULST_U3                (XUSBPSU_DCTL_TRGTULST(3))
+#define XUSBPSU_DCTL_TRGTULST_SS_DIS            (XUSBPSU_DCTL_TRGTULST(4))
+#define XUSBPSU_DCTL_TRGTULST_RX_DET            (XUSBPSU_DCTL_TRGTULST(5))
+#define XUSBPSU_DCTL_TRGTULST_SS_INACT          (XUSBPSU_DCTL_TRGTULST(6))
+
+/* These apply for core versions 1.94a and later */
+#define XUSBPSU_DCTL_KEEP_CONNECT               (0x00000001U << 19)
+#define XUSBPSU_DCTL_L1_HIBER_EN                (0x00000001U << 18)
+#define XUSBPSU_DCTL_CRS                        (0x00000001U << 17)
+#define XUSBPSU_DCTL_CSS                        (0x00000001U << 16)
+
+#define XUSBPSU_DCTL_INITU2ENA                  (0x00000001U << 12)
+#define XUSBPSU_DCTL_ACCEPTU2ENA                (0x00000001U << 11)
+#define XUSBPSU_DCTL_INITU1ENA                  (0x00000001U << 10)
+#define XUSBPSU_DCTL_ACCEPTU1ENA                (0x00000001U << 9)
+#define XUSBPSU_DCTL_TSTCTRL_MASK               (0x0000000fU << 1)
+
+#define XUSBPSU_DCTL_ULSTCHNGREQ_MASK           (0x0000000fU << 5)
+#define XUSBPSU_DCTL_ULSTCHNGREQ(n) (((u32)(n) << 5) & XUSBPSU_DCTL_ULSTCHNGREQ_MASK)
+
+#define XUSBPSU_DCTL_ULSTCHNG_NO_ACTION         (XUSBPSU_DCTL_ULSTCHNGREQ(0))
+#define XUSBPSU_DCTL_ULSTCHNG_SS_DISABLED       (XUSBPSU_DCTL_ULSTCHNGREQ(4))
+#define XUSBPSU_DCTL_ULSTCHNG_RX_DETECT         (XUSBPSU_DCTL_ULSTCHNGREQ(5))
+#define XUSBPSU_DCTL_ULSTCHNG_SS_INACTIVE       (XUSBPSU_DCTL_ULSTCHNGREQ(6))
+#define XUSBPSU_DCTL_ULSTCHNG_RECOVERY          (XUSBPSU_DCTL_ULSTCHNGREQ(8))
+#define XUSBPSU_DCTL_ULSTCHNG_COMPLIANCE        (XUSBPSU_DCTL_ULSTCHNGREQ(10))
+#define XUSBPSU_DCTL_ULSTCHNG_LOOPBACK          (XUSBPSU_DCTL_ULSTCHNGREQ(11))
+
+/* Device Event Enable Register */
+#define XUSBPSU_DEVTEN_VNDRDEVTSTRCVEDEN        ((u32)0x00000001 << 12)
+#define XUSBPSU_DEVTEN_EVNTOVERFLOWEN           ((u32)0x00000001 << 11)
+#define XUSBPSU_DEVTEN_CMDCMPLTEN               ((u32)0x00000001 << 10)
+#define XUSBPSU_DEVTEN_ERRTICERREN              ((u32)0x00000001 << 9)
+#define XUSBPSU_DEVTEN_SOFEN                    ((u32)0x00000001 << 7)
+#define XUSBPSU_DEVTEN_EOPFEN                   ((u32)0x00000001 << 6)
+#define XUSBPSU_DEVTEN_HIBERNATIONREQEVTEN      ((u32)0x00000001 << 5)
+#define XUSBPSU_DEVTEN_WKUPEVTEN                ((u32)0x00000001 << 4)
+#define XUSBPSU_DEVTEN_ULSTCNGEN                ((u32)0x00000001 << 3)
+#define XUSBPSU_DEVTEN_CONNECTDONEEN            ((u32)0x00000001 << 2)
+#define XUSBPSU_DEVTEN_USBRSTEN                 ((u32)0x00000001 << 1)
+#define XUSBPSU_DEVTEN_DISCONNEVTEN             ((u32)0x00000001 << 0)
+
+/* Device Status Register */
+#define XUSBPSU_DSTS_DCNRD                      (0x00000001U << 29)
+
+/* This applies for core versions 1.87a and earlier */
+#define XUSBPSU_DSTS_PWRUPREQ                   (0x00000001U << 24)
+
+/* These apply for core versions 1.94a and later */
+#define XUSBPSU_DSTS_RSS                        (0x00000001U << 25)
+#define XUSBPSU_DSTS_SSS                        (0x00000001U << 24)
+
+#define XUSBPSU_DSTS_COREIDLE                   (0x00000001U << 23)
+#define XUSBPSU_DSTS_DEVCTRLHLT                 (0x00000001U << 22)
+
+#define XUSBPSU_DSTS_USBLNKST_MASK              (0x0000000fU << 18)
+#define XUSBPSU_DSTS_USBLNKST(n) (((u32)(n) & XUSBPSU_DSTS_USBLNKST_MASK) >> 18)
+
+#define XUSBPSU_DSTS_RXFIFOEMPTY                (0x00000001U << 17)
+
+#define XUSBPSU_DSTS_SOFFN_MASK                 (0x00003fffU << 3)
+#define XUSBPSU_DSTS_SOFFN(n)           (((u32)(n) & XUSBPSU_DSTS_SOFFN_MASK) >> 3)
+
+#define XUSBPSU_DSTS_CONNECTSPD                 (0x00000007U << 0)
+
+#define XUSBPSU_DSTS_SUPERSPEED                 (4U << 0)
+#define XUSBPSU_DSTS_HIGHSPEED                  (0U << 0)
+#define XUSBPSU_DSTS_FULLSPEED2                 (1U << 0)
+#define XUSBPSU_DSTS_LOWSPEED                   (2U << 0)
+#define XUSBPSU_DSTS_FULLSPEED1                 (3U << 0)
+
+/*Portpmsc 3.0 bit field*/
+#define XUSBPSU_PORTMSC_30_FLA_MASK				(1U << 16)
+#define XUSBPSU_PORTMSC_30_U2_TIMEOUT_MASK		(0xffU << 8)
+#define XUSBPSU_PORTMSC_30_U2_TIMEOUT_SHIFT		(8U)
+#define XUSBPSU_PORTMSC_30_U1_TIMEOUT_MASK		(0xffU << 0)
+#define XUSBPSU_PORTMSC_30_U1_TIMEOUT_SHIFT		(0U)
+
+/* Register for LPD block */
+#define RST_LPD_TOP				0x23C
+#define USB0_CORE_RST				(1 << 6)
+#define USB1_CORE_RST				(1 << 7)
+
+/* Vendor registers for Xilinx */
+#define XIL_CUR_PWR_STATE			0x00
+#define XIL_PME_ENABLE				0x34
+#define XIL_REQ_PWR_STATE			0x3c
+#define XIL_PWR_CONFIG_USB3			0x48
+
+#define XIL_REQ_PWR_STATE_D0			0
+#define XIL_REQ_PWR_STATE_D3			3
+#define XIL_PME_ENABLE_SIG_GEN			1
+#define XIL_CUR_PWR_STATE_D0			0
+#define XIL_CUR_PWR_STATE_D3			3
+#define XIL_CUR_PWR_STATE_BITMASK		0x03
+
+#define VENDOR_BASE_ADDRESS			0xFF9D0000
+#define LPD_BASE_ADDRESS			0xFF5E0000
+
+ /*@}*/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+*
+* Read a register of the USBPS8 device. This macro provides register
+* access to all registers using the register offsets defined above.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Offset is the offset of the register to read.
+*
+* @return	The contents of the register.
+*
+* @note		C-style Signature:
+*		u32 XUsbPsu_ReadReg(struct XUsbPsu *InstancePtr, u32 Offset);
+*
+******************************************************************************/
+#define XUsbPsu_ReadReg(InstancePtr, Offset) \
+	Xil_In32((InstancePtr)->ConfigPtr->BaseAddress + (u32)(Offset))
+
+/*****************************************************************************/
+/**
+*
+* Write a register of the USBPS8 device. This macro provides
+* register access to all registers using the register offsets defined above.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	RegOffset is the offset of the register to write.
+* @param	Data is the value to write to the register.
+*
+* @return	None.
+*
+* @note 	C-style Signature:
+*		void XUsbPsu_WriteReg(struct XUsbPsu *InstancePtr,
+*								u32 Offset,u32 Data)
+*
+******************************************************************************/
+#define XUsbPsu_WriteReg(InstancePtr, Offset, Data) \
+	Xil_Out32((InstancePtr)->ConfigPtr->BaseAddress + (u32)(Offset), (u32)(Data))
+
+/*****************************************************************************/
+/**
+*
+* Read a vendor register of the USBPS8 device.
+*
+* @param       Offset is the offset of the register to read.
+*
+* @return      The contents of the register.
+*
+* @note                C-style Signature:
+*              u32 XUsbPsu_ReadVendorReg(struct XUsbPsu *InstancePtr, u32 Offset);
+*
+******************************************************************************/
+#define XUsbPsu_ReadVendorReg(Offset) \
+       Xil_In32(VENDOR_BASE_ADDRESS + (u32)(Offset))
+
+/*****************************************************************************/
+/**
+*
+* Write a Vendor register of the USBPS8 device.
+*
+* @param       RegOffset is the offset of the register to write.
+* @param       Data is the value to write to the register.
+*
+* @return      None.
+*
+* @note        C-style Signature:
+*              void XUsbPsu_WriteVendorReg(struct XUsbPsu *InstancePtr,
+*                                                              u32 Offset,u32 Data)
+*
+******************************************************************************/
+#define XUsbPsu_WriteVendorReg(Offset, Data) \
+       Xil_Out32(VENDOR_BASE_ADDRESS + (u32)(Offset), (u32)(Data))
+
+/*****************************************************************************/
+/**
+*
+* Read a LPD register of the USBPS8 device.
+*
+* @param       InstancePtr is a pointer to the XUsbPsu instance.
+* @param       Offset is the offset of the register to read.
+*
+* @return      The contents of the register.
+*
+* @note                C-style Signature:
+*              u32 XUsbPsu_ReadLpdReg(struct XUsbPsu *InstancePtr, u32 Offset);
+*
+******************************************************************************/
+#define XUsbPsu_ReadLpdReg(Offset) \
+       Xil_In32(LPD_BASE_ADDRESS + (u32)(Offset))
+
+/*****************************************************************************/
+/**
+*
+* Write a LPD register of the USBPS8 device.
+*
+* @param       InstancePtr is a pointer to the XUsbPsu instance.
+* @param       RegOffset is the offset of the register to write.
+* @param       Data is the value to write to the register.
+*
+* @return      None.
+*
+* @note        C-style Signature:
+*              void XUsbPsu_WriteLpdReg(struct XUsbPsu *InstancePtr,
+*                                                              u32 Offset,u32 Data)
+*
+******************************************************************************/
+#define XUsbPsu_WriteLpdReg(Offset, Data) \
+       Xil_Out32(LPD_BASE_ADDRESS + (u32)(Offset), (u32)(Data))
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* End of protection macro. */
+/** @} */
diff --git a/src/Xilinx/include/xvidc.h b/src/Xilinx/include/xvidc.h
new file mode 100644
index 0000000..bcd3d0b
--- /dev/null
+++ b/src/Xilinx/include/xvidc.h
@@ -0,0 +1,621 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xvidc.h
+ * @addtogroup video_common_v4_3
+ * @{
+ * @details
+ *
+ * Contains common structures, definitions, macros, and utility functions that
+ * are typically used by video-related drivers and applications.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   rc,  01/10/15 Initial release.
+ *       als
+ * 2.0   als  08/14/15 Added new video timings.
+ * 2.2   als  02/01/16 Functions with pointer arguments that don't modify
+ *                     contents now const.
+ *                     Added ability to insert a custom video timing table:
+ *                         XVidC_RegisterCustomTimingModes
+ *                         XVidC_UnregisterCustomTimingMode
+ *       yh            Added 3D support.
+ * 3.0   aad  05/13/16 Added API to search for RB video modes.
+ *       als  05/16/16 Added Y-only to color format enum.
+ * 3.1   rco  07/26/17 Moved timing table extern definition to xvidc.c
+ *                     Added video-in-memory color formats
+ *                     Updated XVidC_RegisterCustomTimingModes API signature
+ * 4.1   rco  11/23/17 Added new memory formats
+ *                     Added xil_printf include statement
+ *                     Added new API XVidC_GetVideoModeIdWBlanking
+ *                     Fix C++ warnings
+ * 4.2   jsr  07/22/17 Added new video modes, framerates, color formats for SDI
+ *                     New member AspectRatio is added to video stream structure
+ *                     Reordered XVidC_VideoMode enum variables and corrected the
+ *                     memory format enums
+ *       aad  07/10/17 Add XVIDC_VM_3840x2160_60_P_RB video format
+ *       vyc  10/04/17 Added new streaming alpha formats and new memory formats
+ *       aad  09/05/17 Add XVIDC_VM_1366x768_60_P_RB resolution
+ * 4.3   eb   26/01/18 Added API XVidC_GetVideoModeIdExtensive
+ *       jsr  02/22/18 Added XVIDC_CSF_YCBCR_420 color space format
+ *       vyc  04/04/18 Added BGR8 memory format
+ * 

+ *
+*******************************************************************************/
+
+#ifndef XVIDC_H_  /* Prevent circular inclusions by using protection macros. */
+#define XVIDC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************* Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_printf.h"
+
+/************************** Constant Definitions ******************************/
+
+/**
+ * This typedef enumerates the list of available standard display monitor
+ * timings as specified in the xvidc_timings_table.c file. The naming format is:
+ *
+ * XVIDC_VM___(_RB)
+ *
+ * Where RB stands for reduced blanking.
+ */
+typedef enum {
+	/* Interlaced modes. */
+	XVIDC_VM_720x480_60_I = 0,
+	XVIDC_VM_720x576_50_I,
+	XVIDC_VM_1440x480_60_I,
+	XVIDC_VM_1440x576_50_I,
+	XVIDC_VM_1920x1080_48_I,
+	XVIDC_VM_1920x1080_50_I,
+	XVIDC_VM_1920x1080_60_I,
+	XVIDC_VM_1920x1080_96_I,
+	XVIDC_VM_1920x1080_100_I,
+	XVIDC_VM_1920x1080_120_I,
+	XVIDC_VM_2048x1080_48_I,
+	XVIDC_VM_2048x1080_50_I,
+	XVIDC_VM_2048x1080_60_I,
+	XVIDC_VM_2048x1080_96_I,
+	XVIDC_VM_2048x1080_100_I,
+	XVIDC_VM_2048x1080_120_I,
+
+
+	/* Progressive modes. */
+	XVIDC_VM_640x350_85_P,
+	XVIDC_VM_640x480_60_P,
+	XVIDC_VM_640x480_72_P,
+	XVIDC_VM_640x480_75_P,
+	XVIDC_VM_640x480_85_P,
+	XVIDC_VM_720x400_85_P,
+	XVIDC_VM_720x480_60_P,
+	XVIDC_VM_720x576_50_P,
+	XVIDC_VM_800x600_56_P,
+	XVIDC_VM_800x600_60_P,
+	XVIDC_VM_800x600_72_P,
+	XVIDC_VM_800x600_75_P,
+	XVIDC_VM_800x600_85_P,
+	XVIDC_VM_800x600_120_P_RB,
+	XVIDC_VM_848x480_60_P,
+	XVIDC_VM_1024x768_60_P,
+	XVIDC_VM_1024x768_70_P,
+	XVIDC_VM_1024x768_75_P,
+	XVIDC_VM_1024x768_85_P,
+	XVIDC_VM_1024x768_120_P_RB,
+	XVIDC_VM_1152x864_75_P,
+	XVIDC_VM_1280x720_24_P,
+	XVIDC_VM_1280x720_25_P,
+	XVIDC_VM_1280x720_30_P,
+	XVIDC_VM_1280x720_50_P,
+	XVIDC_VM_1280x720_60_P,
+	XVIDC_VM_1280x768_60_P,
+	XVIDC_VM_1280x768_60_P_RB,
+	XVIDC_VM_1280x768_75_P,
+	XVIDC_VM_1280x768_85_P,
+	XVIDC_VM_1280x768_120_P_RB,
+	XVIDC_VM_1280x800_60_P,
+	XVIDC_VM_1280x800_60_P_RB,
+	XVIDC_VM_1280x800_75_P,
+	XVIDC_VM_1280x800_85_P,
+	XVIDC_VM_1280x800_120_P_RB,
+	XVIDC_VM_1280x960_60_P,
+	XVIDC_VM_1280x960_85_P,
+	XVIDC_VM_1280x960_120_P_RB,
+	XVIDC_VM_1280x1024_60_P,
+	XVIDC_VM_1280x1024_75_P,
+	XVIDC_VM_1280x1024_85_P,
+	XVIDC_VM_1280x1024_120_P_RB,
+	XVIDC_VM_1360x768_60_P,
+	XVIDC_VM_1360x768_120_P_RB,
+	XVIDC_VM_1366x768_60_P,
+	XVIDC_VM_1366x768_60_P_RB,
+	XVIDC_VM_1400x1050_60_P,
+	XVIDC_VM_1400x1050_60_P_RB,
+	XVIDC_VM_1400x1050_75_P,
+	XVIDC_VM_1400x1050_85_P,
+	XVIDC_VM_1400x1050_120_P_RB,
+	XVIDC_VM_1440x240_60_P,
+	XVIDC_VM_1440x900_60_P,
+	XVIDC_VM_1440x900_60_P_RB,
+	XVIDC_VM_1440x900_75_P,
+	XVIDC_VM_1440x900_85_P,
+	XVIDC_VM_1440x900_120_P_RB,
+	XVIDC_VM_1600x1200_60_P,
+	XVIDC_VM_1600x1200_65_P,
+	XVIDC_VM_1600x1200_70_P,
+	XVIDC_VM_1600x1200_75_P,
+	XVIDC_VM_1600x1200_85_P,
+	XVIDC_VM_1600x1200_120_P_RB,
+	XVIDC_VM_1680x720_50_P,
+	XVIDC_VM_1680x720_60_P,
+	XVIDC_VM_1680x720_100_P,
+	XVIDC_VM_1680x720_120_P,
+	XVIDC_VM_1680x1050_50_P,
+	XVIDC_VM_1680x1050_60_P,
+	XVIDC_VM_1680x1050_60_P_RB,
+	XVIDC_VM_1680x1050_75_P,
+	XVIDC_VM_1680x1050_85_P,
+	XVIDC_VM_1680x1050_120_P_RB,
+	XVIDC_VM_1792x1344_60_P,
+	XVIDC_VM_1792x1344_75_P,
+	XVIDC_VM_1792x1344_120_P_RB,
+	XVIDC_VM_1856x1392_60_P,
+	XVIDC_VM_1856x1392_75_P,
+	XVIDC_VM_1856x1392_120_P_RB,
+	XVIDC_VM_1920x1080_24_P,
+	XVIDC_VM_1920x1080_25_P,
+	XVIDC_VM_1920x1080_30_P,
+	XVIDC_VM_1920x1080_48_P,
+	XVIDC_VM_1920x1080_50_P,
+	XVIDC_VM_1920x1080_60_P,
+	XVIDC_VM_1920x1080_100_P,
+	XVIDC_VM_1920x1080_120_P,
+	XVIDC_VM_1920x1200_60_P,
+	XVIDC_VM_1920x1200_60_P_RB,
+	XVIDC_VM_1920x1200_75_P,
+	XVIDC_VM_1920x1200_85_P,
+	XVIDC_VM_1920x1200_120_P_RB,
+	XVIDC_VM_1920x1440_60_P,
+	XVIDC_VM_1920x1440_75_P,
+	XVIDC_VM_1920x1440_120_P_RB,
+	XVIDC_VM_1920x2160_60_P,
+	XVIDC_VM_2048x1080_24_P,
+	XVIDC_VM_2048x1080_25_P,
+	XVIDC_VM_2048x1080_30_P,
+	XVIDC_VM_2048x1080_48_P,
+	XVIDC_VM_2048x1080_50_P,
+	XVIDC_VM_2048x1080_60_P,
+	XVIDC_VM_2048x1080_100_P,
+	XVIDC_VM_2048x1080_120_P,
+	XVIDC_VM_2560x1080_50_P,
+	XVIDC_VM_2560x1080_60_P,
+	XVIDC_VM_2560x1080_100_P,
+	XVIDC_VM_2560x1080_120_P,
+	XVIDC_VM_2560x1600_60_P,
+	XVIDC_VM_2560x1600_60_P_RB,
+	XVIDC_VM_2560x1600_75_P,
+	XVIDC_VM_2560x1600_85_P,
+	XVIDC_VM_2560x1600_120_P_RB,
+	XVIDC_VM_3840x2160_24_P,
+	XVIDC_VM_3840x2160_25_P,
+	XVIDC_VM_3840x2160_30_P,
+	XVIDC_VM_3840x2160_48_P,
+	XVIDC_VM_3840x2160_50_P,
+	XVIDC_VM_3840x2160_60_P,
+	XVIDC_VM_3840x2160_60_P_RB,
+	XVIDC_VM_4096x2160_24_P,
+	XVIDC_VM_4096x2160_25_P,
+	XVIDC_VM_4096x2160_30_P,
+	XVIDC_VM_4096x2160_48_P,
+	XVIDC_VM_4096x2160_50_P,
+	XVIDC_VM_4096x2160_60_P,
+	XVIDC_VM_4096x2160_60_P_RB,
+
+	XVIDC_VM_NUM_SUPPORTED,
+	XVIDC_VM_USE_EDID_PREFERRED,
+	XVIDC_VM_NO_INPUT,
+	XVIDC_VM_NOT_SUPPORTED,
+	XVIDC_VM_CUSTOM,
+
+	/* Marks beginning/end of interlaced/progressive modes in the table. */
+	XVIDC_VM_INTL_START = XVIDC_VM_720x480_60_I,
+	XVIDC_VM_PROG_START = XVIDC_VM_640x350_85_P,
+	XVIDC_VM_INTL_END = (XVIDC_VM_PROG_START - 1),
+	XVIDC_VM_PROG_END = (XVIDC_VM_NUM_SUPPORTED - 1),
+
+	/* Common naming. */
+	XVIDC_VM_480_60_I = XVIDC_VM_720x480_60_I,
+	XVIDC_VM_576_50_I = XVIDC_VM_720x576_50_I,
+	XVIDC_VM_1080_50_I = XVIDC_VM_1920x1080_50_I,
+	XVIDC_VM_1080_60_I = XVIDC_VM_1920x1080_60_I,
+	XVIDC_VM_VGA_60_P = XVIDC_VM_640x480_60_P,
+	XVIDC_VM_480_60_P = XVIDC_VM_720x480_60_P,
+	XVIDC_VM_SVGA_60_P = XVIDC_VM_800x600_60_P,
+	XVIDC_VM_XGA_60_P = XVIDC_VM_1024x768_60_P,
+	XVIDC_VM_720_50_P = XVIDC_VM_1280x720_50_P,
+	XVIDC_VM_720_60_P = XVIDC_VM_1280x720_60_P,
+	XVIDC_VM_WXGA_60_P = XVIDC_VM_1366x768_60_P,
+	XVIDC_VM_UXGA_60_P = XVIDC_VM_1600x1200_60_P,
+	XVIDC_VM_WSXGA_60_P = XVIDC_VM_1680x1050_60_P,
+	XVIDC_VM_1080_24_P = XVIDC_VM_1920x1080_24_P,
+	XVIDC_VM_1080_25_P = XVIDC_VM_1920x1080_25_P,
+	XVIDC_VM_1080_30_P = XVIDC_VM_1920x1080_30_P,
+	XVIDC_VM_1080_50_P = XVIDC_VM_1920x1080_50_P,
+	XVIDC_VM_1080_60_P = XVIDC_VM_1920x1080_60_P,
+	XVIDC_VM_WUXGA_60_P = XVIDC_VM_1920x1200_60_P,
+	XVIDC_VM_UHD2_60_P = XVIDC_VM_1920x2160_60_P,
+	XVIDC_VM_UHD_24_P = XVIDC_VM_3840x2160_24_P,
+	XVIDC_VM_UHD_25_P = XVIDC_VM_3840x2160_25_P,
+	XVIDC_VM_UHD_30_P = XVIDC_VM_3840x2160_30_P,
+	XVIDC_VM_UHD_60_P = XVIDC_VM_3840x2160_60_P,
+	XVIDC_VM_4K2K_60_P = XVIDC_VM_4096x2160_60_P,
+	XVIDC_VM_4K2K_60_P_RB = XVIDC_VM_4096x2160_60_P_RB,
+} XVidC_VideoMode;
+
+/**
+ * Progressive/interlaced video format.
+ */
+typedef enum {
+	XVIDC_VF_PROGRESSIVE = 0,
+	XVIDC_VF_INTERLACED,
+	XVIDC_VF_UNKNOWN
+} XVidC_VideoFormat;
+
+/**
+ * Frame rate.
+ */
+typedef enum {
+	XVIDC_FR_24HZ = 24,
+	XVIDC_FR_25HZ = 25,
+	XVIDC_FR_30HZ = 30,
+	XVIDC_FR_48HZ = 48,
+	XVIDC_FR_50HZ = 50,
+	XVIDC_FR_56HZ = 56,
+	XVIDC_FR_60HZ = 60,
+	XVIDC_FR_65HZ = 65,
+	XVIDC_FR_67HZ = 67,
+	XVIDC_FR_70HZ = 70,
+	XVIDC_FR_72HZ = 72,
+	XVIDC_FR_75HZ = 75,
+	XVIDC_FR_85HZ = 85,
+	XVIDC_FR_87HZ = 87,
+	XVIDC_FR_88HZ = 88,
+	XVIDC_FR_96HZ = 96,
+	XVIDC_FR_100HZ = 100,
+	XVIDC_FR_120HZ = 120,
+	XVIDC_FR_NUM_SUPPORTED = 18,
+	XVIDC_FR_UNKNOWN
+} XVidC_FrameRate;
+
+/**
+ * Color depth - bits per color component.
+ */
+typedef enum {
+	XVIDC_BPC_6 = 6,
+	XVIDC_BPC_8 = 8,
+	XVIDC_BPC_10 = 10,
+	XVIDC_BPC_12 = 12,
+	XVIDC_BPC_14 = 14,
+	XVIDC_BPC_16 = 16,
+	XVIDC_BPC_NUM_SUPPORTED = 6,
+	XVIDC_BPC_UNKNOWN
+} XVidC_ColorDepth;
+
+/**
+ * Pixels per clock.
+ */
+typedef enum {
+	XVIDC_PPC_1 = 1,
+	XVIDC_PPC_2 = 2,
+	XVIDC_PPC_4 = 4,
+	XVIDC_PPC_8 = 8,
+	XVIDC_PPC_NUM_SUPPORTED = 4,
+} XVidC_PixelsPerClock;
+
+/**
+ * Color space format.
+ */
+typedef enum {
+	/* Streaming video formats */
+	XVIDC_CSF_RGB = 0,
+	XVIDC_CSF_YCRCB_444,
+	XVIDC_CSF_YCRCB_422,
+	XVIDC_CSF_YCRCB_420,
+	XVIDC_CSF_YONLY,
+	XVIDC_CSF_RGBA,
+	XVIDC_CSF_YCRCBA_444,
+
+	/* 6 empty slots reserved for video formats for future
+	 * extension
+	 */
+
+	/* Video in memory formats */
+	XVIDC_CSF_MEM_RGBX8 = 10,   // [31:0] x:B:G:R 8:8:8:8
+	XVIDC_CSF_MEM_YUVX8,        // [31:0] x:V:U:Y 8:8:8:8
+	XVIDC_CSF_MEM_YUYV8,        // [31:0] V:Y:U:Y 8:8:8:8
+	XVIDC_CSF_MEM_RGBA8,        // [31:0] A:B:G:R 8:8:8:8
+	XVIDC_CSF_MEM_YUVA8,        // [31:0] A:V:U:Y 8:8:8:8
+	XVIDC_CSF_MEM_RGBX10,       // [31:0] x:B:G:R 2:10:10:10
+	XVIDC_CSF_MEM_YUVX10,       // [31:0] x:V:U:Y 2:10:10:10
+	XVIDC_CSF_MEM_RGB565,       // [15:0] B:G:R 5:6:5
+	XVIDC_CSF_MEM_Y_UV8,        // [15:0] Y:Y 8:8, [15:0] V:U 8:8
+	XVIDC_CSF_MEM_Y_UV8_420,    // [15:0] Y:Y 8:8, [15:0] V:U 8:8
+	XVIDC_CSF_MEM_RGB8,         // [23:0] B:G:R 8:8:8
+	XVIDC_CSF_MEM_YUV8,         // [24:0] V:U:Y 8:8:8
+	XVIDC_CSF_MEM_Y_UV10,       // [31:0] x:Y:Y:Y 2:10:10:10 [31:0] x:U:V:U 2:10:10:10
+	XVIDC_CSF_MEM_Y_UV10_420,   // [31:0] x:Y:Y:Y 2:10:10:10 [31:0] x:U:V:U 2:10:10:10
+	XVIDC_CSF_MEM_Y8,           // [31:0] Y:Y:Y:Y 8:8:8:8
+	XVIDC_CSF_MEM_Y10,          // [31:0] x:Y:Y:Y 2:10:10:10
+	XVIDC_CSF_MEM_BGRA8,        // [31:0] A:R:G:B 8:8:8:8
+	XVIDC_CSF_MEM_BGRX8,        // [31:0] X:R:G:B 8:8:8:8
+	XVIDC_CSF_MEM_UYVY8,        // [31:0] Y:V:Y:U 8:8:8:8
+	XVIDC_CSF_MEM_BGR8,         // [23:0] R:G:B 8:8:8
+	XVIDC_CSF_MEM_END,          // End of memory formats
+
+	/* Streaming formats with components re-ordered */
+	XVIDC_CSF_YCBCR_422 = 64,
+	XVIDC_CSF_YCBCR_420,
+
+
+	XVIDC_CSF_NUM_SUPPORTED,    // includes the reserved slots
+	XVIDC_CSF_UNKNOWN,
+	XVIDC_CSF_STRM_START = XVIDC_CSF_RGB,
+	XVIDC_CSF_STRM_END   = XVIDC_CSF_YONLY,
+	XVIDC_CSF_MEM_START  = XVIDC_CSF_MEM_RGBX8,
+	XVIDC_CSF_NUM_STRM   = (XVIDC_CSF_STRM_END - XVIDC_CSF_STRM_START + 1),
+	XVIDC_CSF_NUM_MEM    = (XVIDC_CSF_MEM_END - XVIDC_CSF_MEM_START)
+} XVidC_ColorFormat;
+
+
+/**
+ * Image Aspect Ratio.
+ */
+typedef enum {
+	XVIDC_AR_4_3 = 0,
+	XVIDC_AR_16_9 = 1
+} XVidC_AspectRatio;
+
+/**
+ * Color space conversion standard.
+ */
+typedef enum {
+	XVIDC_BT_2020 = 0,
+	XVIDC_BT_709,
+	XVIDC_BT_601,
+	XVIDC_BT_NUM_SUPPORTED,
+	XVIDC_BT_UNKNOWN
+} XVidC_ColorStd;
+
+/**
+ * Color conversion output range.
+ */
+typedef enum {
+	XVIDC_CR_16_235 = 0,
+	XVIDC_CR_16_240,
+	XVIDC_CR_0_255,
+	XVIDC_CR_NUM_SUPPORTED,
+	XVIDC_CR_UNKNOWN_RANGE
+} XVidC_ColorRange;
+
+/**
+ * 3D formats.
+ */
+typedef enum {
+	XVIDC_3D_FRAME_PACKING = 0,	/**< Frame packing.         */
+	XVIDC_3D_FIELD_ALTERNATIVE,	/**< Field alternative.     */
+	XVIDC_3D_LINE_ALTERNATIVE,	/**< Line alternative.      */
+	XVIDC_3D_SIDE_BY_SIDE_FULL,	/**< Side-by-side (full).   */
+	XVIDC_3D_TOP_AND_BOTTOM_HALF,	/**< Top-and-bottom (half). */
+	XVIDC_3D_SIDE_BY_SIDE_HALF,	/**< Side-by-side (half).   */
+	XVIDC_3D_UNKNOWN
+} XVidC_3DFormat;
+
+/**
+ * 3D Sub-sampling methods.
+ */
+typedef enum {
+	XVIDC_3D_SAMPLING_HORIZONTAL = 0, /**< Horizontal sub-sampling. */
+	XVIDC_3D_SAMPLING_QUINCUNX,	  /**< Quincunx matrix.         */
+	XVIDC_3D_SAMPLING_UNKNOWN
+} XVidC_3DSamplingMethod;
+
+/**
+ * 3D Sub-sampling positions.
+ */
+typedef enum {
+	XVIDC_3D_SAMPPOS_OLOR = 0,	/**< Odd/Left,  Odd/Right.  */
+	XVIDC_3D_SAMPPOS_OLER,		/**< Odd/Left,  Even/Right. */
+	XVIDC_3D_SAMPPOS_ELOR,		/**< Even/Left, Odd/Right.  */
+	XVIDC_3D_SAMPPOS_ELER,		/**< Even/Left, Even/Right. */
+	XVIDC_3D_SAMPPOS_UNKNOWN
+} XVidC_3DSamplingPosition;
+
+/****************************** Type Definitions ******************************/
+
+/**
+ * Video timing structure.
+ */
+typedef struct {
+	u16 HActive;
+	u16 HFrontPorch;
+	u16 HSyncWidth;
+	u16 HBackPorch;
+	u16 HTotal;
+	u8 HSyncPolarity;
+	u16 VActive;
+	u16 F0PVFrontPorch;
+	u16 F0PVSyncWidth;
+	u16 F0PVBackPorch;
+	u16 F0PVTotal;
+	u16 F1VFrontPorch;
+	u16 F1VSyncWidth;
+	u16 F1VBackPorch;
+	u16 F1VTotal;
+	u8 VSyncPolarity;
+} XVidC_VideoTiming;
+
+/**
+ * 3D Sampling info structure.
+ */
+typedef struct {
+	XVidC_3DSamplingMethod   Method;
+	XVidC_3DSamplingPosition Position;
+} XVidC_3DSamplingInfo;
+
+/**
+ * 3D info structure.
+ */
+typedef struct {
+	XVidC_3DFormat		  Format;
+	XVidC_3DSamplingInfo  Sampling;
+} XVidC_3DInfo;
+
+/**
+ * Video stream structure.
+ */
+typedef struct {
+	XVidC_ColorFormat	  ColorFormatId;
+	XVidC_ColorDepth	  ColorDepth;
+	XVidC_PixelsPerClock  PixPerClk;
+	XVidC_FrameRate		  FrameRate;
+	XVidC_AspectRatio	  AspectRatio;
+	u8			          IsInterlaced;
+	u8			          Is3D;
+	XVidC_3DInfo		  Info_3D;
+	XVidC_VideoMode		  VmId;
+	XVidC_VideoTiming	  Timing;
+} XVidC_VideoStream;
+
+/**
+ * Video window structure.
+ */
+typedef struct {
+	u32 StartX;
+	u32 StartY;
+	u32 Width;
+	u32 Height;
+} XVidC_VideoWindow;
+
+/**
+ * Video timing mode from the video timing table.
+ */
+typedef struct {
+	XVidC_VideoMode		VmId;
+	const char		    Name[21];
+	XVidC_FrameRate		FrameRate;
+	XVidC_VideoTiming	Timing;
+} XVidC_VideoTimingMode;
+
+/**
+ * Callback type which represents a custom timer wait handler. This is only
+ * used for Microblaze since it doesn't have a native sleep function. To avoid
+ * dependency on a hardware timer, the default wait functionality is implemented
+ * using loop iterations; this isn't too accurate. Therefore a custom timer
+ * handler is used, the user may implement their own wait implementation.
+ *
+ * @param	TimerPtr is a pointer to the timer instance.
+ * @param	Delay is the duration (msec/usec) to be passed to the timer
+ *		function.
+ *
+*******************************************************************************/
+typedef void (*XVidC_DelayHandler)(void *TimerPtr, u32 Delay);
+
+/**************************** Function Prototypes *****************************/
+
+u32 XVidC_RegisterCustomTimingModes(const XVidC_VideoTimingMode *CustomTable,
+		                            u16 NumElems);
+void XVidC_UnregisterCustomTimingModes(void);
+u32 XVidC_GetPixelClockHzByHVFr(u32 HTotal, u32 VTotal, u8 FrameRate);
+u32 XVidC_GetPixelClockHzByVmId(XVidC_VideoMode VmId);
+XVidC_VideoFormat XVidC_GetVideoFormat(XVidC_VideoMode VmId);
+u8 XVidC_IsInterlaced(XVidC_VideoMode VmId);
+const XVidC_VideoTimingMode* XVidC_GetVideoModeData(XVidC_VideoMode VmId);
+const char *XVidC_GetVideoModeStr(XVidC_VideoMode VmId);
+const char *XVidC_GetFrameRateStr(XVidC_VideoMode VmId);
+const char *XVidC_GetColorFormatStr(XVidC_ColorFormat ColorFormatId);
+XVidC_FrameRate XVidC_GetFrameRate(XVidC_VideoMode VmId);
+const XVidC_VideoTiming* XVidC_GetTimingInfo(XVidC_VideoMode VmId);
+void XVidC_ReportStreamInfo(const XVidC_VideoStream *Stream);
+void XVidC_ReportTiming(const XVidC_VideoTiming *Timing, u8 IsInterlaced);
+const char *XVidC_Get3DFormatStr(XVidC_3DFormat Format);
+u32 XVidC_SetVideoStream(XVidC_VideoStream *VidStrmPtr, XVidC_VideoMode VmId,
+			             XVidC_ColorFormat ColorFormat, XVidC_ColorDepth Bpc,
+			             XVidC_PixelsPerClock Ppc);
+u32 XVidC_Set3DVideoStream(XVidC_VideoStream *VidStrmPtr, XVidC_VideoMode VmId,
+			               XVidC_ColorFormat ColorFormat, XVidC_ColorDepth Bpc,
+			               XVidC_PixelsPerClock Ppc, XVidC_3DInfo *Info3DPtr);
+XVidC_VideoMode XVidC_GetVideoModeId(u32 Width, u32 Height, u32 FrameRate,
+		                             u8 IsInterlaced);
+XVidC_VideoMode XVidC_GetVideoModeIdExtensive(XVidC_VideoTiming *Timing,
+											  u32 FrameRate,
+											  u8 IsInterlaced,
+											  u8 IsExtensive);
+XVidC_VideoMode XVidC_GetVideoModeIdRb(u32 Width, u32 Height, u32 FrameRate,
+		                               u8 IsInterlaced, u8 RbN);
+XVidC_VideoMode XVidC_GetVideoModeIdWBlanking(const XVidC_VideoTiming *Timing,
+		                                      u32 FrameRate, u8 IsInterlaced);
+
+/******************* Macros (Inline Functions) Definitions ********************/
+
+/*****************************************************************************/
+/**
+ * This macro check if video stream is 3D or 2D.
+ *
+ * @param	VidStreamPtr is a pointer to the XVidC_VideoStream structure.
+ *
+ * @return	3D(1)/2D(0)
+ *
+ * @note	C-style signature:
+ *		u8 XDp_IsStream3D(XVidC_VideoStream *VidStreamPtr)
+ *
+ *****************************************************************************/
+#define XVidC_IsStream3D(VidStreamPtr)       ((VidStreamPtr)->Is3D)
+
+/*************************** Variable Declarations ****************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XVIDC_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xvidc_cea861.h b/src/Xilinx/include/xvidc_cea861.h
new file mode 100644
index 0000000..9e50b9d
--- /dev/null
+++ b/src/Xilinx/include/xvidc_cea861.h
@@ -0,0 +1,399 @@
+/* vim: set et fde fdm=syntax ft=c.doxygen ts=4 sts=4 sw=4 : */
+/*
+ * Copyright © 2010-2011 Saleem Abdulrasool .
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef xvidc_cea861_h
+#define xvidc_cea861_h
+
+#define XVIDC_EDID_VERBOSITY                    0
+
+#define ARRAY_SIZE(arr)                         (sizeof(arr) / sizeof(arr[0]))
+
+#define XVIDC_CEA861_NO_DTDS_PRESENT            (0x04)
+
+#define HDMI_VSDB_EXTENSION_FLAGS_OFFSET        (0x06)
+#define HDMI_VSDB_MAX_TMDS_OFFSET               (0x07)
+#define HDMI_VSDB_LATENCY_FIELDS_OFFSET         (0x08)
+
+static const u8 HDMI_OUI[]                 = { 0x00, 0x0C, 0x03 };
+static const u8 HDMI_OUI_HF[]              = { 0xC4, 0x5D, 0xD8 };
+
+enum xvidc_cea861_data_block_type {
+    XVIDC_CEA861_DATA_BLOCK_TYPE_RESERVED0,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_AUDIO,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_VIDEO,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_VENDOR_SPECIFIC,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_SPEAKER_ALLOCATION,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_VESA_DTC,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_RESERVED6,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_EXTENDED,
+};
+
+enum xvidc_cea861_extended_tag_type_data_block {
+    XVIDC_CEA861_EXT_TAG_TYPE_VIDEO_CAPABILITY,
+    XVIDC_CEA861_EXT_TAG_TYPE_VENDOR_SPECIFIC,
+    XVIDC_CEA861_EXT_TAG_TYPE_VESA_DISPLAY_DEVICE,
+    XVIDC_CEA861_EXT_TAG_TYPE_VESA_VIDEO_TIMING_BLOCK_EXT,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED_FOR_HDMI_VIDEO_DATA_BLOCK,
+    XVIDC_CEA861_EXT_TAG_TYPE_COLORIMETRY,
+    XVIDC_CEA861_EXT_TAG_TYPE_HDR_STATIC_METADATA,
+    XVIDC_CEA861_EXT_TAG_TYPE_HDR_DYNAMIC_METADATA,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED2,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED3,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED4,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED5,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED6,
+    XVIDC_CEA861_EXT_TAG_TYPE_VIDEO_FRMT_PREFERENCE,
+    XVIDC_CEA861_EXT_TAG_TYPE_YCBCR420_VIDEO,
+    XVIDC_CEA861_EXT_TAG_TYPE_YCBCR420_CAPABILITY_MAP,
+    XVIDC_CEA861_EXT_TAG_TYPE_CEA_MISC_AUDIO_FIELDS,
+    XVIDC_CEA861_EXT_TAG_TYPE_VENDOR_SPECIFC_AUDIO,
+    XVIDC_CEA861_EXT_TAG_TYPE_HDMI_AUDIO,
+    XVIDC_CEA861_EXT_TAG_TYPE_ROOM_CONFIGURATION,
+    XVIDC_CEA861_EXT_TAG_TYPE_SPEAKER_LOCATION,
+    XVIDC_CEA861_EXT_TAG_TYPE_INFOFRAME = 32,
+/* Can be extend to 255, refer table 46 cea data block tag codes cea-861-f */
+};
+
+enum xvidc_cea861_audio_format {
+    XVIDC_CEA861_AUDIO_FORMAT_RESERVED,
+    XVIDC_CEA861_AUDIO_FORMAT_LPCM,
+    XVIDC_CEA861_AUDIO_FORMAT_AC_3,
+    XVIDC_CEA861_AUDIO_FORMAT_MPEG_1,
+    XVIDC_CEA861_AUDIO_FORMAT_MP3,
+    XVIDC_CEA861_AUDIO_FORMAT_MPEG2,
+    XVIDC_CEA861_AUDIO_FORMAT_AAC_LC,
+    XVIDC_CEA861_AUDIO_FORMAT_DTS,
+    XVIDC_CEA861_AUDIO_FORMAT_ATRAC,
+    XVIDC_CEA861_AUDIO_FORMAT_DSD,
+    XVIDC_CEA861_AUDIO_FORMAT_E_AC_3,
+    XVIDC_CEA861_AUDIO_FORMAT_DTS_HD,
+    XVIDC_CEA861_AUDIO_FORMAT_MLP,
+    XVIDC_CEA861_AUDIO_FORMAT_DST,
+    XVIDC_CEA861_AUDIO_FORMAT_WMA_PRO,
+    XVIDC_CEA861_AUDIO_FORMAT_EXTENDED,
+};
+
+struct __attribute__ (( packed )) xvidc_cea861_timing_block {
+    /* CEA Extension Header */
+    u8  tag;
+    u8  revision;
+    u8  dtd_offset;
+
+    /* Global Declarations */
+    unsigned native_dtds           : 4;
+    unsigned yuv_422_supported     : 1;
+    unsigned yuv_444_supported     : 1;
+    unsigned basic_audio_supported : 1;
+    unsigned underscan_supported   : 1;
+
+    u8  data[123];
+
+    u8  checksum;
+};
+
+struct __attribute__ (( packed )) xvidc_cea861_data_block_header {
+    unsigned length : 5;
+    unsigned tag    : 3;
+};
+
+struct __attribute__ (( packed )) xvidc_cea861_short_video_descriptor {
+    unsigned video_identification_code : 7;
+    unsigned native                    : 1;
+};
+#if XVIDC_EDID_VERBOSITY > 1
+struct __attribute__ (( packed )) xvidc_cea861_video_data_block {
+    struct xvidc_cea861_data_block_header      header;
+    struct xvidc_cea861_short_video_descriptor svd[];
+};
+#endif
+struct __attribute__ (( packed )) xvidc_cea861_short_audio_descriptor {
+    unsigned channels              : 3; /* = value + 1 */
+    unsigned audio_format          : 4;
+    unsigned                       : 1;
+
+    unsigned sample_rate_32_kHz    : 1;
+    unsigned sample_rate_44_1_kHz  : 1;
+    unsigned sample_rate_48_kHz    : 1;
+    unsigned sample_rate_88_2_kHz  : 1;
+    unsigned sample_rate_96_kHz    : 1;
+    unsigned sample_rate_176_4_kHz : 1;
+    unsigned sample_rate_192_kHz   : 1;
+    unsigned                       : 1;
+
+    union {
+        struct __attribute__ (( packed )) {
+            unsigned bitrate_16_bit : 1;
+            unsigned bitrate_20_bit : 1;
+            unsigned bitrate_24_bit : 1;
+            unsigned                : 5;
+        } lpcm;
+
+        u8 maximum_bit_rate;       /* formats 2-8; = value * 8 kHz */
+
+        u8 format_dependent;       /* formats 9-13; */
+
+        struct __attribute__ (( packed )) {
+            unsigned profile : 3;
+            unsigned         : 5;
+        } wma_pro;
+
+        struct __attribute__ (( packed )) {
+            unsigned      : 3;
+            unsigned code : 5;
+        } extension;
+    } flags;
+};
+#if XVIDC_EDID_VERBOSITY > 1
+struct __attribute__ (( packed )) xvidc_cea861_audio_data_block {
+    struct xvidc_cea861_data_block_header      header;
+    struct xvidc_cea861_short_audio_descriptor sad[];
+};
+#endif
+#if XVIDC_EDID_VERBOSITY > 1
+struct __attribute__ (( packed )) xvidc_cea861_speaker_allocation {
+    unsigned front_left_right        : 1;
+    unsigned front_lfe               : 1;   /* low frequency effects */
+    unsigned front_center            : 1;
+    unsigned rear_left_right         : 1;
+    unsigned rear_center             : 1;
+    unsigned front_left_right_center : 1;
+    unsigned rear_left_right_center  : 1;
+    unsigned front_left_right_wide   : 1;
+
+    unsigned front_left_right_high   : 1;
+    unsigned top_center              : 1;
+    unsigned front_center_high       : 1;
+    unsigned                         : 5;
+
+    unsigned                         : 8;
+};
+#endif
+#if XVIDC_EDID_VERBOSITY > 1
+struct __attribute__ (( packed )) xvidc_cea861_speaker_allocation_data_block {
+    struct xvidc_cea861_data_block_header  header;
+    struct xvidc_cea861_speaker_allocation payload;
+};
+#endif
+struct __attribute__ (( packed )) xvidc_cea861_vendor_specific_data_block {
+    struct xvidc_cea861_data_block_header  header;
+    u8                               ieee_registration[3];
+    u8                               data[30];
+};
+
+struct __attribute__ (( packed )) xvidc_cea861_extended_data_block {
+    struct xvidc_cea861_data_block_header  header;
+    u8                               xvidc_cea861_extended_tag_codes;
+    u8                               data[30];
+};
+
+#if XVIDC_EDID_VERBOSITY > 1
+static const struct xvidc_cea861_timing {
+    const u16 hactive;
+    const u16 vactive;
+    const enum {
+        INTERLACED,
+        PROGRESSIVE,
+    } mode;
+    const u16 htotal;
+    const u16 hblank;
+    const u16 vtotal;
+    const double   vblank;
+    const double   hfreq;
+    const double   vfreq;
+    const double   pixclk;
+} xvidc_cea861_timings[] = {
+    [  1]  = {  640, 480, PROGRESSIVE,  800,  160,  525, 45.0,  31.469,  59.940,  25.175 },
+    [  2]  = {  720, 480, PROGRESSIVE,  858,  138,  525, 45.0,  31.469,  59.940,  27.000 },
+    [  3]  = {  720, 480, PROGRESSIVE,  858,  138,  525, 45.0,  31.469,  59.940,  27.000 },
+    [  4]  = { 1280, 720, PROGRESSIVE, 1650,  370,  750, 30.0,  45.000,  60.000,  74.250 },
+    [  5]  = { 1920,1080,  INTERLACED, 2200,  280, 1125, 22.5,  33.750,  60.000,  72.250 },
+    [  6]  = { 1440, 480,  INTERLACED, 1716,  276,  525, 22.5,  15.734,  59.940,  27.000 },
+    [  7]  = { 1440, 480,  INTERLACED, 1716,  276,  525, 22.5,  15.734,  59.940,  27.000 },
+    [  8]  = { 1440, 240, PROGRESSIVE, 1716,  276,  262, 22.0,  15.734,  60.054,  27.000 },
+    [  9]  = { 1440, 240, PROGRESSIVE, 1716,  276,  262, 22.0,  15.734,  59.826,  27.000 },
+    [ 10] = { 2880,  480,  INTERLACED, 3432,  552,  525, 22.5,  15.734,  59.940,  54.000 },
+    [ 11] = { 2880,  480,  INTERLACED, 3432,  552,  525, 22.5,  15.734,  59.940,  54.000 },
+    [ 12] = { 2880,  240, PROGRESSIVE, 3432,  552,  262, 22.0,  15.734,  60.054,  54.000 },
+    [ 13] = { 2880,  240, PROGRESSIVE, 3432,  552,  262, 22.0,  15.734,  59.826,  54.000 },
+    [ 14] = { 1440,  480, PROGRESSIVE, 1716,  276,  525, 45.0,  31.469,  59.940,  54.000 },
+    [ 15] = { 1440,  480, PROGRESSIVE, 1716,  276,  525, 45.0,  31.469,  59.940,  54.000 },
+    [ 16] = { 1920, 1080, PROGRESSIVE, 2200,  280, 1125, 45.0,  67.500,  60.000, 148.500 },
+    [ 17] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0,  31.250,  50.000,  27.000 },
+    [ 18] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0,  31.250,  50.000,  27.000 },
+    [ 19] = { 1280,  720, PROGRESSIVE, 1980,  700,  750, 30.0,  37.500,  50.000,  74.250 },
+    [ 20] = { 1920, 1080,  INTERLACED, 2640,  720, 1125, 22.5,  28.125,  50.000,  74.250 },
+    [ 21] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  15.625,  50.000,  27.000 },
+    [ 22] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  15.625,  50.000,  27.000 },
+    [ 23] = { 1440,  288, PROGRESSIVE, 1728,  288,  312, 24.0,  15.625,  50.080,  27.000 },
+    [ 24] = { 1440,  288, PROGRESSIVE, 1728,  288,  313, 25.0,  15.625,  49.920,  27.000 },
+    [ 25] = { 2880,  576,  INTERLACED, 3456,  576,  625, 24.5,  15.625,  50.000,  54.000 },
+    [ 26] = { 2880,  576,  INTERLACED, 3456,  576,  625, 24.5,  15.625,  50.000,  54.000 },
+    [ 27] = { 2880,  288, PROGRESSIVE, 3456,  576,  312, 24.0,  15.625,  50.080,  54.000 },
+    [ 28] = { 2880,  288, PROGRESSIVE, 3456,  576,  313, 25.0,  15.625,  49.920,  54.000 },
+    [ 29] = { 1440,  576, PROGRESSIVE, 1728,  288,  625, 49.0,  31.250,  50.000,  54.000 },
+    [ 30] = { 1440,  576, PROGRESSIVE, 1728,  288,  625, 49.0,  31.250,  50.000,  54.000 },
+    [ 31] = { 1920, 1080, PROGRESSIVE, 2640,  720, 1125, 45.0,  56.250,  50.000, 148.500 },
+    [ 32] = { 1920, 1080, PROGRESSIVE, 2750,  830, 1125, 45.0,  27.000,  24.000,  74.250 },
+    [ 33] = { 1920, 1080, PROGRESSIVE, 2640,  720, 1125, 45.0,  28.125,  25.000,  74.250 },
+    [ 34] = { 1920, 1080, PROGRESSIVE, 2200,  280, 1125, 45.0,  33.750,  30.000,  74.250 },
+    [ 35] = { 2880,  480, PROGRESSIVE, 3432,  552,  525, 45.0,  31.469,  59.940, 108.500 },
+    [ 36] = { 2880,  480, PROGRESSIVE, 3432,  552,  525, 45.0,  31.469,  59.940, 108.500 },
+    [ 37] = { 2880,  576, PROGRESSIVE, 3456,  576,  625, 49.0,  31.250,  50.000, 108.000 },
+    [ 38] = { 2880,  576, PROGRESSIVE, 3456,  576,  625, 49.0,  31.250,  50.000, 108.000 },
+    [ 39] = { 1920, 1080,  INTERLACED, 2304,  384, 1250, 85.0,  31.250,  50.000,  72.000 },
+    [ 40] = { 1920, 1080,  INTERLACED, 2640,  720, 1125, 22.5,  56.250, 100.000, 148.500 },
+    [ 41] = { 1280,  720, PROGRESSIVE, 1980,  700,  750, 30.0,  75.000, 100.000, 148.500 },
+    [ 42] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0,  62.500, 100.000,  54.000 },
+    [ 43] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0,  62.500, 100.000,  54.000 },
+    [ 44] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  31.250, 100.000,  54.000 },
+    [ 45] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  31.250, 100.000,  54.000 },
+    [ 46] = { 1920, 1080,  INTERLACED, 2200,  280, 1125, 22.5,  67.500, 120.000, 148.500 },
+    [ 47] = { 1280,  720, PROGRESSIVE, 1650,  370,  750, 30.0,  90.000, 120.000, 148.500 },
+    [ 48] = {  720,  480, PROGRESSIVE,  858,  138,  525, 45.0,  62.937, 119.880,  54.000 },
+    [ 49] = {  720,  480, PROGRESSIVE,  858,  138,  525, 45.0,  62.937, 119.880,  54.000 },
+    [ 50] = { 1440,  480,  INTERLACED, 1716,  276,  525, 22.5,  31.469, 119.880,  54.000 },
+    [ 51] = { 1440,  480,  INTERLACED, 1716,  276,  525, 22.5,  31.469, 119.880,  54.000 },
+    [ 52] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0, 125.000, 200.000, 108.000 },
+    [ 53] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0, 125.000, 200.000, 108.000 },
+    [ 54] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  62.500, 200.000, 108.000 },
+    [ 55] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  62.500, 200.000, 108.000 },
+    [ 56] = {  720,  480, PROGRESSIVE,  858,  138,  525, 45.0, 125.874, 239.760, 108.000 },
+    [ 57] = {  720,  480, PROGRESSIVE,  858,  138,  525, 45.0, 125.874, 239.760, 108.000 },
+    [ 58] = { 1440,  480,  INTERLACED, 1716,  276,  525, 22.5,  62.937, 239.760, 108.000 },
+    [ 59] = { 1440,  480,  INTERLACED, 1716,  276,  525, 22.5,  62.937, 239.760, 108.000 },
+    [60 ] = {1280,  720 , PROGRESSIVE, 3300, 2020, 750 , 30  , 18     , 24.0003, 59.4    },
+    [61 ] = {1280,  720 , PROGRESSIVE, 3960, 2680, 750 , 30  , 18.75  , 25     , 74.25   },
+    [62 ] = {1280,  720 , PROGRESSIVE, 3300, 2020, 750 , 30  , 22.5   , 30.0003, 74.25   },
+    [63 ] = {1920,  1080, PROGRESSIVE, 2200, 280 , 1125, 45  , 135    , 120.003, 297     },
+    [64 ] = {1920,  1080, PROGRESSIVE, 2640, 720 , 1125, 45  , 112.5  , 100    , 297     },
+    [65 ] = {1280,  720 , PROGRESSIVE, 3300, 2020, 750 , 30  , 18     , 24.0003, 59.4    },
+    [66 ] = {1280,  720 , PROGRESSIVE, 3960, 2680, 750 , 30  , 18.75  , 25     , 74.25   },
+    [67 ] = {1280,  720 , PROGRESSIVE, 3300, 2020, 750 , 30  , 22.5   , 30.0003, 74.25   },
+    [68 ] = {1280,  720 , PROGRESSIVE, 1980, 700 , 750 , 30  , 37.5   , 50     , 74.25   },
+    [69 ] = {1280,  720 , PROGRESSIVE, 1650, 370 , 750 , 30  , 45     , 60.0003, 74.25   },
+    [70 ] = {1280,  720 , PROGRESSIVE, 1980, 700 , 750 , 30  , 75     , 100    , 148.5   },
+    [71 ] = {1280,  720 , PROGRESSIVE, 1650, 370 , 750 , 30  , 90     , 120.003, 148.5   },
+    [72 ] = {1920,  1080, PROGRESSIVE, 2750, 830 , 1125, 45  , 27     , 24.0003, 74.25   },
+    [73 ] = {1920,  1080, PROGRESSIVE, 2640, 720 , 1125, 45  , 28.125 , 25     , 74.25   },
+    [74 ] = {1920,  1080, PROGRESSIVE, 2200, 280 , 1125, 45  , 33.75  , 30.0003, 74.25   },
+    [75 ] = {1920,  1080, PROGRESSIVE, 2640, 720 , 1125, 45  , 56.25  , 50     , 148.5   },
+    [76 ] = {1920,  1080, PROGRESSIVE, 2200, 280 , 1125, 45  , 67.5   , 60.0003, 148.5   },
+    [77 ] = {1920,  1080, PROGRESSIVE, 2640, 720 , 1125, 45  , 112.5  , 100    , 297     },
+    [78 ] = {1920,  1080, PROGRESSIVE, 2200, 280 , 1125, 45  , 135    , 120.003, 297     },
+    [79 ] = {1680,  720 , PROGRESSIVE, 3300, 1620, 750 , 30  , 18     , 24.0003, 59.4    },
+    [80 ] = {1680,  720 , PROGRESSIVE, 3168, 1488, 750 , 30  , 18.75  , 25     , 59.4    },
+    [81 ] = {1680,  720 , PROGRESSIVE, 2640, 960 , 750 , 30  , 22.5   , 30.0003, 59.4    },
+    [82 ] = {1680,  720 , PROGRESSIVE, 2200, 520 , 750 , 30  , 37.5   , 50     , 82.5    },
+    [83 ] = {1680,  720 , PROGRESSIVE, 2200, 520 , 750 , 30  , 45     , 60.0003, 99      },
+    [84 ] = {1680,  720 , PROGRESSIVE, 2000, 320 , 825 , 105 , 82.5   , 100    , 165     },
+    [85 ] = {1680,  720 , PROGRESSIVE, 2000, 320 , 825 , 105 , 99     , 120.003, 198     },
+    [86 ] = {2560,  1080, PROGRESSIVE, 3750, 1190, 1100, 20  , 26.4   , 24.0003, 99      },
+    [87 ] = {2560,  1080, PROGRESSIVE, 3200, 640 , 1125, 45  , 28.125 , 25     , 90      },
+    [88 ] = {2560,  1080, PROGRESSIVE, 3520, 960 , 1125, 45  , 33.75  , 30.0003, 118.8   },
+    [89 ] = {2560,  1080, PROGRESSIVE, 3300, 740 , 1125, 45  , 56.25  , 50     , 185.625 },
+    [90 ] = {2560,  1080, PROGRESSIVE, 3000, 440 , 1100, 20  , 66     , 60.0003, 198     },
+    [91 ] = {2560,  1080, PROGRESSIVE, 2970, 410 , 1250, 170 , 125    , 100    , 371.25  },
+    [92 ] = {2560,  1080, PROGRESSIVE, 3300, 740 , 1250, 170 , 150    , 120.003, 495     },
+    [93 ] = {3840,  2160, PROGRESSIVE, 5500, 1660, 2250, 90  , 54     , 24.0003, 297     },
+    [94 ] = {3840,  2160, PROGRESSIVE, 5280, 1440, 2250, 90  , 56.25  , 25     , 297     },
+    [95 ] = {3840,  2160, PROGRESSIVE, 4400, 560 , 2250, 90  , 67.5   , 30.0003, 297     },
+    [96 ] = {3840,  2160, PROGRESSIVE, 5280, 1440, 2250, 90  , 112.5  , 50     , 594     },
+    [97 ] = {3840,  2160, PROGRESSIVE, 4400, 560 , 2250, 90  , 135    , 60.0003, 594     },
+    [98 ] = {4096,  2160, PROGRESSIVE, 5500, 1404, 2250, 90  , 54     , 24.0003, 297     },
+    [99 ] = {4096,  2160, PROGRESSIVE, 5280, 1184, 2250, 90  , 56.25  , 25     , 297     },
+    [100] = {4096,  2160, PROGRESSIVE, 4400, 304 , 2250, 90  , 67.5   , 30.0003, 297     },
+    [101] = {4096,  2160, PROGRESSIVE, 5280, 1184, 2250, 90  , 112.5  , 50     , 594     },
+    [102] = {4096,  2160, PROGRESSIVE, 4400, 304 , 2250, 90  , 135    , 60.0003, 594     },
+    [103] = {3840,  2160, PROGRESSIVE, 5500, 1660, 2250, 90  , 54     , 24.0003, 297     },
+    [104] = {3840,  2160, PROGRESSIVE, 5280, 1440, 2250, 90  , 56.25  , 25     , 297     },
+    [105] = {3840,  2160, PROGRESSIVE, 4400, 560 , 2250, 90  , 67.5   , 30.0003, 297     },
+    [106] = {3840,  2160, PROGRESSIVE, 5280, 1440, 2250, 90  , 112.5  , 50     , 594     },
+    [107] = {3840,  2160, PROGRESSIVE, 4400, 560 , 2250, 90  , 135    , 60.0003, 594     },
+};
+#endif
+
+struct __attribute__ (( packed )) xvidc_cea861_hdmi_vendor_specific_data_block {
+    struct xvidc_cea861_data_block_header header;
+
+    u8  ieee_registration_id[3];           /* LSB */
+
+    unsigned port_configuration_b      : 4;
+    unsigned port_configuration_a      : 4;
+    unsigned port_configuration_d      : 4;
+    unsigned port_configuration_c      : 4;
+
+    /* extension fields */
+    unsigned dvi_dual_link             : 1;
+    unsigned                           : 2;
+    unsigned yuv_444_supported         : 1;
+    unsigned colour_depth_30_bit       : 1;
+    unsigned colour_depth_36_bit       : 1;
+    unsigned colour_depth_48_bit       : 1;
+    unsigned audio_info_frame          : 1;
+
+    u8  max_tmds_clock;                    /* = value * 5 */
+
+    unsigned                           : 6;
+    unsigned interlaced_latency_fields : 1;
+    unsigned latency_fields            : 1;
+
+    u8  video_latency;                     /* = (value - 1) * 2 */
+    u8  audio_latency;                     /* = (value - 1) * 2 */
+    u8  interlaced_video_latency;
+    u8  interlaced_audio_latency;
+
+    u8  reserved[];
+};
+
+struct __attribute__ (( packed )) xvidc_cea861_hdmi_hf_vendor_specific_data_block {
+    struct xvidc_cea861_data_block_header header;
+
+    u8  ieee_registration_id[3];           /* LSB */
+
+    u8  version;
+    u8  max_tmds_char_rate;
+
+    unsigned osd_disparity_3d          : 1;
+    unsigned dual_view_3d              : 1;
+    unsigned independent_view_3d       : 1;
+    unsigned lte_340mcsc_scramble      : 1;
+
+    unsigned                           : 2;
+
+    unsigned rr_capable                : 1;
+    unsigned scdc_present              : 1;
+    unsigned dc_30bit_yuv420           : 1;
+    unsigned dc_36bit_yuv420           : 1;
+    unsigned dc_48bit_yuv420           : 1;
+
+    u8  reserved[];
+};
+
+#endif
diff --git a/src/Xilinx/include/xvidc_edid.h b/src/Xilinx/include/xvidc_edid.h
new file mode 100644
index 0000000..347b4f3
--- /dev/null
+++ b/src/Xilinx/include/xvidc_edid.h
@@ -0,0 +1,484 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xvidc_edid.h
+ * @addtogroup video_common_v4_2
+ * @{
+ *
+ * Contains macros, definitions, and function declarations related to the
+ * Extended Display Identification Data (EDID) structure which is present in all
+ * monitors. All content in this file is agnostic of communication interface
+ * protocol.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   als  11/09/14 Initial release.
+ * 2.2   als  02/01/16 Functions with pointer arguments that don't modify
+ *                     contents now const.
+ * 4.0   aad  10/26/16 Functions which return fixed point values instead of
+ *		       float
+ * 

+ *
+*******************************************************************************/
+
+#ifndef XVIDC_EDID_H_
+/* Prevent circular inclusions by using protection macros. */
+#define XVIDC_EDID_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/******************************* Include Files ********************************/
+
+#include "xstatus.h"
+#include "xvidc.h"
+
+/************************** Constant Definitions ******************************/
+
+/** @name Address mapping for the base EDID block.
+ * @{
+ */
+#define XVIDC_EDID_HEADER				0x00
+/* Vendor and product identification. */
+#define XVIDC_EDID_VPI_ID_MAN_NAME0			0x08
+#define XVIDC_EDID_VPI_ID_MAN_NAME1			0x09
+#define XVIDC_EDID_VPI_ID_PROD_CODE_LSB			0x0A
+#define XVIDC_EDID_VPI_ID_PROD_CODE_MSB			0x0B
+#define XVIDC_EDID_VPI_ID_SN0				0x0C
+#define XVIDC_EDID_VPI_ID_SN1				0x0D
+#define XVIDC_EDID_VPI_ID_SN2				0x0E
+#define XVIDC_EDID_VPI_ID_SN3				0x0F
+#define XVIDC_EDID_VPI_WEEK_MAN				0x10
+#define XVIDC_EDID_VPI_YEAR				0x11
+/* EDID structure version and revision. */
+#define XVIDC_EDID_STRUCT_VER				0x12
+#define XVIDC_EDID_STRUCT_REV				0x13
+/* Basic display parameters and features. */
+#define XVIDC_EDID_BDISP_VID				0x14
+#define XVIDC_EDID_BDISP_H_SSAR				0x15
+#define XVIDC_EDID_BDISP_V_SSAR				0x16
+#define XVIDC_EDID_BDISP_GAMMA				0x17
+#define XVIDC_EDID_BDISP_FEATURE			0x18
+/* Color characteristics (display x,y chromaticity coordinates). */
+#define XVIDC_EDID_CC_RG_LOW				0x19
+#define XVIDC_EDID_CC_BW_LOW				0x1A
+#define XVIDC_EDID_CC_REDX_HIGH				0x1B
+#define XVIDC_EDID_CC_REDY_HIGH				0x1C
+#define XVIDC_EDID_CC_GREENX_HIGH			0x1D
+#define XVIDC_EDID_CC_GREENY_HIGH			0x1E
+#define XVIDC_EDID_CC_BLUEX_HIGH			0x1F
+#define XVIDC_EDID_CC_BLUEY_HIGH			0x20
+#define XVIDC_EDID_CC_WHITEX_HIGH			0x21
+#define XVIDC_EDID_CC_WHITEY_HIGH			0x22
+/* Established timings. */
+#define XVIDC_EDID_EST_TIMINGS_I			0x23
+#define XVIDC_EDID_EST_TIMINGS_II			0x24
+#define XVIDC_EDID_EST_TIMINGS_MAN			0x25
+/* Standard timings. */
+#define XVIDC_EDID_STD_TIMINGS_H(N)			(0x26 + 2 * (N - 1))
+#define XVIDC_EDID_STD_TIMINGS_AR_FRR(N)		(0x27 + 2 * (N - 1))
+/* 18 byte descriptors. */
+#define XVIDC_EDID_18BYTE_DESCRIPTOR(N)			(0x36 + 18 * (N - 1))
+#define XVIDC_EDID_PTM			(XVIDC_EDID_18BYTE_DESCRIPTOR(1))
+/* - Detailed timing descriptor (DTD) / Preferred timing mode (PTM). */
+#define XVIDC_EDID_DTD_PTM_PIXEL_CLK_KHZ_LSB		0x00
+#define XVIDC_EDID_DTD_PTM_PIXEL_CLK_KHZ_MSB		0x01
+#define XVIDC_EDID_DTD_PTM_HRES_LSB			0x02
+#define XVIDC_EDID_DTD_PTM_HBLANK_LSB			0x03
+#define XVIDC_EDID_DTD_PTM_HRES_HBLANK_U4		0x04
+#define XVIDC_EDID_DTD_PTM_VRES_LSB			0x05
+#define XVIDC_EDID_DTD_PTM_VBLANK_LSB			0x06
+#define XVIDC_EDID_DTD_PTM_VRES_VBLANK_U4		0x07
+#define XVIDC_EDID_DTD_PTM_HFPORCH_LSB			0x08
+#define XVIDC_EDID_DTD_PTM_HSPW_LSB			0x09
+#define XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4		0x0A
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2		0x0B
+#define XVIDC_EDID_DTD_PTM_HIMGSIZE_MM_LSB		0x0C
+#define XVIDC_EDID_DTD_PTM_VIMGSIZE_MM_LSB		0x0D
+#define XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4		0x0E
+#define XVIDC_EDID_DTD_PTM_HBORDER			0x0F
+#define XVIDC_EDID_DTD_PTM_VBORDER			0x10
+#define XVIDC_EDID_DTD_PTM_SIGNAL			0x11
+
+/* Extension block count. */
+#define XVIDC_EDID_EXT_BLK_COUNT			0x7E
+/* Checksum. */
+#define XVIDC_EDID_CHECKSUM				0x7F
+/* @} */
+
+/******************************************************************************/
+
+/** @name Extended Display Identification Data: Masks, shifts, and values.
+ * @{
+ */
+#define XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR0_SHIFT		2
+#define XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR0_MASK		(0x1F << 2)
+#define XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR1_MASK		0x03
+#define XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR1_POS		3
+#define XVIDC_EDID_VPI_ID_MAN_NAME1_CHAR1_SHIFT		5
+#define XVIDC_EDID_VPI_ID_MAN_NAME1_CHAR2_MASK		0x1F
+
+/* Basic display parameters and features: Video input definition. */
+#define XVIDC_EDID_BDISP_VID_VSI_SHIFT			7
+#define XVIDC_EDID_BDISP_VID_VSI_MASK			(0x01 << 7)
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_SHIFT		5
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_MASK		(0x03 << 5)
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_0700_0300_1000	0x0
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_0714_0286_1000	0x1
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_1000_0400_1400	0x2
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_0700_0000_0700	0x3
+#define XVIDC_EDID_BDISP_VID_ANA_VID_SETUP_MASK		(0x01 << 4)
+#define XVIDC_EDID_BDISP_VID_ANA_SEP_SYNC_HV_MASK	(0x01 << 3)
+#define XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_H_MASK	(0x01 << 2)
+#define XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_G_MASK	(0x01 << 1)
+#define XVIDC_EDID_BDISP_VID_ANA_SERR_V_SYNC_MASK	(0x01)
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_SHIFT		4
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_MASK		(0x7 << 4)
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_UNDEF		0x0
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_6			0x1
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_8			0x2
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_10			0x3
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_12			0x4
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_14			0x5
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_16			0x6
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_MASK		0xF
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_UNDEF		0x0
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_DVI		0x1
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_HDMIA		0x2
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_HDMIB		0x3
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_MDDI		0x4
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_DP			0x5
+
+/* Basic display parameters and features: Feature support. */
+#define XVIDC_EDID_BDISP_FEATURE_PM_STANDBY_MASK	(0x1 << 7)
+#define XVIDC_EDID_BDISP_FEATURE_PM_SUSPEND_MASK	(0x1 << 6)
+#define XVIDC_EDID_BDISP_FEATURE_PM_OFF_VLP_MASK	(0x1 << 5)
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_SHIFT	3
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_MASK	(0x3 << 3)
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_MCG	0x0
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_RGB	0x1
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_NRGB	0x2
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_UNDEF	0x3
+#define XVIDC_EDID_BDISP_FEATURE_DIG_COLORENC_YCRCB444_MASK	(0x1 << 3)
+#define XVIDC_EDID_BDISP_FEATURE_DIG_COLORENC_YCRCB422_MASK	(0x1 << 4)
+#define XVIDC_EDID_BDISP_FEATURE_SRGB_DEF_MASK		(0x1 << 2)
+#define XVIDC_EDID_BDISP_FEATURE_PTM_INC_MASK		(0x1 << 1)
+#define XVIDC_EDID_BDISP_FEATURE_CONTFREQ_MASK		(0x1)
+
+/* Color characteristics (display x,y chromaticity coordinates). */
+#define XVIDC_EDID_CC_HIGH_SHIFT			2
+#define XVIDC_EDID_CC_RBX_LOW_SHIFT			6
+#define XVIDC_EDID_CC_RBY_LOW_SHIFT			4
+#define XVIDC_EDID_CC_RBY_LOW_MASK			(0x3 << 4)
+#define XVIDC_EDID_CC_GWX_LOW_SHIFT			2
+#define XVIDC_EDID_CC_GWX_LOW_MASK			(0x3 << 2)
+#define XVIDC_EDID_CC_GWY_LOW_MASK			(0x3)
+#define XVIDC_EDID_CC_GREENY_HIGH			0x1E
+#define XVIDC_EDID_CC_BLUEX_HIGH			0x1F
+#define XVIDC_EDID_CC_BLUEY_HIGH			0x20
+#define XVIDC_EDID_CC_WHITEX_HIGH			0x21
+#define XVIDC_EDID_CC_WHITEY_HIGH			0x22
+
+/* Established timings. */
+#define XVIDC_EDID_EST_TIMINGS_I_720x400_70_MASK	(0x1 << 7)
+#define XVIDC_EDID_EST_TIMINGS_I_720x400_88_MASK	(0x1 << 6)
+#define XVIDC_EDID_EST_TIMINGS_I_640x480_60_MASK	(0x1 << 5)
+#define XVIDC_EDID_EST_TIMINGS_I_640x480_67_MASK	(0x1 << 4)
+#define XVIDC_EDID_EST_TIMINGS_I_640x480_72_MASK	(0x1 << 3)
+#define XVIDC_EDID_EST_TIMINGS_I_640x480_75_MASK	(0x1 << 2)
+#define XVIDC_EDID_EST_TIMINGS_I_800x600_56_MASK	(0x1 << 1)
+#define XVIDC_EDID_EST_TIMINGS_I_800x600_60_MASK	(0x1)
+#define XVIDC_EDID_EST_TIMINGS_II_800x600_72_MASK	(0x1 << 7)
+#define XVIDC_EDID_EST_TIMINGS_II_800x600_75_MASK	(0x1 << 6)
+#define XVIDC_EDID_EST_TIMINGS_II_832x624_75_MASK	(0x1 << 5)
+#define XVIDC_EDID_EST_TIMINGS_II_1024x768_87_MASK	(0x1 << 4)
+#define XVIDC_EDID_EST_TIMINGS_II_1024x768_60_MASK	(0x1 << 3)
+#define XVIDC_EDID_EST_TIMINGS_II_1024x768_70_MASK	(0x1 << 2)
+#define XVIDC_EDID_EST_TIMINGS_II_1024x768_75_MASK	(0x1 << 1)
+#define XVIDC_EDID_EST_TIMINGS_II_1280x1024_75_MASK	(0x1)
+#define XVIDC_EDID_EST_TIMINGS_MAN_1152x870_75_MASK	(0x1 << 7)
+#define XVIDC_EDID_EST_TIMINGS_MAN_MASK			(0x7F)
+
+/* Standard timings. */
+#define XVIDC_EDID_STD_TIMINGS_AR_SHIFT			6
+#define XVIDC_EDID_STD_TIMINGS_AR_16_10			0x0
+#define XVIDC_EDID_STD_TIMINGS_AR_4_3			0x1
+#define XVIDC_EDID_STD_TIMINGS_AR_5_4			0x2
+#define XVIDC_EDID_STD_TIMINGS_AR_16_9			0x3
+#define XVIDC_EDID_STD_TIMINGS_FRR_MASK			(0x3F)
+
+/* Detailed timing descriptor (DTD) / Preferred timing mode (PTM). */
+#define XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XBLANK_MASK		0x0F
+#define XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XRES_MASK		0xF0
+#define XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XRES_SHIFT		4
+#define XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4_VSPW_MASK		0x0F
+#define XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4_VFPORCH_MASK		0xF0
+#define XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4_VFPORCH_SHIFT	4
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HFPORCH_MASK		0xC0
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HSPW_MASK		0x30
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_VFPORCH_MASK		0x0C
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_VSPW_MASK		0x03
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HFPORCH_SHIFT	6
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HSPW_SHIFT		4
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_VFPORCH_SHIFT	2
+#define XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4_VIMGSIZE_MM_MASK	0x0F
+#define XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4_HIMGSIZE_MM_MASK	0xF0
+#define XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4_HIMGSIZE_MM_SHIFT	4
+#define XVIDC_EDID_DTD_PTM_SIGNAL_INTERLACED_MASK		0x80
+#define XVIDC_EDID_DTD_PTM_SIGNAL_INTERLACED_SHIFT		7
+#define XVIDC_EDID_DTD_PTM_SIGNAL_HPOLARITY_MASK		0x02
+#define XVIDC_EDID_DTD_PTM_SIGNAL_VPOLARITY_MASK		0x04
+#define XVIDC_EDID_DTD_PTM_SIGNAL_HPOLARITY_SHIFT		1
+#define XVIDC_EDID_DTD_PTM_SIGNAL_VPOLARITY_SHIFT		2
+/* @} */
+
+/******************* Macros (Inline Functions) Definitions ********************/
+
+#define XVidC_EdidIsHeaderValid(E) \
+	!memcmp(E, "\x00\xFF\xFF\xFF\xFF\xFF\xFF\x00", 8)
+
+/* Vendor and product identification: ID manufacturer name. */
+/* void XVidC_EdidGetManName(const u8 *EdidRaw, char ManName[4]); */
+
+/* Vendor and product identification: ID product code. */
+#define XVidC_EdidGetIdProdCode(E) \
+	((u16)((E[XVIDC_EDID_VPI_ID_PROD_CODE_MSB] << 8) | \
+	E[XVIDC_EDID_VPI_ID_PROD_CODE_LSB]))
+
+/* Vendor and product identification: ID serial number. */
+#define XVidC_EdidGetIdSn(E) \
+	((u32)((E[XVIDC_EDID_VPI_ID_SN3] << 24) | \
+	(E[XVIDC_EDID_VPI_ID_SN2] << 16) | (E[XVIDC_EDID_VPI_ID_SN1] << 8) | \
+	E[XVIDC_EDID_VPI_ID_SN0]))
+
+/* Vendor and product identification: Week and year of manufacture or model
+ * year. */
+#define XVidC_EdidGetManWeek(E)		(E[XVIDC_EDID_VPI_WEEK_MAN])
+#define XVidC_EdidGetModManYear(E)	(E[XVIDC_EDID_VPI_YEAR] + 1990)
+#define XVidC_EdidIsYearModel(E)	(XVidC_EdidGetManWeek(E) == 0xFF)
+#define XVidC_EdidIsYearMan(E)		(XVidC_EdidGetManWeek(E) != 0xFF)
+
+/* EDID structure version and revision. */
+#define XVidC_EdidGetStructVer(E)	(E[XVIDC_EDID_STRUCT_VER])
+#define XVidC_EdidGetStructRev(E)	(E[XVIDC_EDID_STRUCT_REV])
+
+/* Basic display parameters and features: Video input definition. */
+#define XVidC_EdidIsDigitalSig(E) \
+	((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_VSI_MASK) != 0)
+#define XVidC_EdidIsAnalogSig(E) \
+	((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_VSI_MASK) == 0)
+#define XVidC_EdidGetAnalogSigLvlStd(E) \
+	((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_ANA_SLS_MASK) >> \
+	XVIDC_EDID_BDISP_VID_ANA_SLS_SHIFT)
+#define XVidC_EdidGetAnalogSigVidSetup(E) \
+	((E[XVIDC_EDID_BDISP_VID] & \
+	XVIDC_EDID_BDISP_VID_ANA_VID_SETUP_MASK) != 0)
+#define XVidC_EdidSuppAnalogSigSepSyncHv(E) \
+	((E[XVIDC_EDID_BDISP_VID] & \
+	XVIDC_EDID_BDISP_VID_ANA_SEP_SYNC_HV_MASK) != 0)
+#define XVidC_EdidSuppAnalogSigCompSyncH(E) \
+	((E[XVIDC_EDID_BDISP_VID] & \
+	XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_H_MASK) != 0)
+#define XVidC_EdidSuppAnalogSigCompSyncG(E) \
+	((E[XVIDC_EDID_BDISP_VID] & \
+	XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_G_MASK) != 0)
+#define XVidC_EdidSuppAnalogSigSerrVsync(E) \
+	((E[XVIDC_EDID_BDISP_VID] & \
+	XVIDC_EDID_BDISP_VID_ANA_SERR_V_SYNC_MASK) != 0)
+/* XVidC_ColorDepth XVidC_EdidGetColorDepth(const u8 *EdidRaw); */
+#define XVidC_EdidGetDigitalSigIfaceStd(E) \
+	(E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_DIG_VIS_MASK)
+
+/* Basic display parameters and features: Horizontal and vertical screen size or
+ * aspect ratio. */
+#define XVidC_EdidIsSsArDefined(E) \
+	((E[XVIDC_EDID_BDISP_H_SSAR] | E[XVIDC_EDID_BDISP_V_SSAR]) != 0)
+#define XVidC_EdidGetSsArH(E)	E[XVIDC_EDID_BDISP_H_SSAR]
+#define XVidC_EdidGetSsArV(E)	E[XVIDC_EDID_BDISP_V_SSAR]
+#define XVidC_EdidIsSsArSs(E) \
+	((XVidC_EdidGetSsArH(E) != 0) && (XVidC_EdidGetSsArV(E) != 0))
+#define XVidC_EdidIsSsArArL(E) \
+	((XVidC_EdidGetSsArH(E) != 0) && (XVidC_EdidGetSsArV(E) == 0))
+#define XVidC_EdidIsSsArArP(E) \
+	((XVidC_EdidGetSsArH(E) == 0) && (XVidC_EdidGetSsArV(E) != 0))
+#define XVidC_EdidGetSsArArL(E) \
+	((float)((XVidC_EdidGetSsArH(E) + 99.0) / 100.0))
+#define XVidC_EdidGetSsArArP(E) \
+	((float)(100.0 / (XVidC_EdidGetSsArV(E) + 99.0)))
+
+/* Basic display parameters and features: Gamma. */
+#define XVidC_EdidIsGammaInExt(E)	(E[XVIDC_EDID_BDISP_GAMMA] == 0xFF)
+#define XVidC_EdidGetGamma(E) \
+	((float)((E[XVIDC_EDID_BDISP_GAMMA] + 100.0) / 100.0))
+
+/* Basic display parameters and features: Feature support. */
+#define XVidC_EdidSuppFeaturePmStandby(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_PM_STANDBY_MASK) != 0)
+#define XVidC_EdidSuppFeaturePmSuspend(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_PM_SUSPEND_MASK) != 0)
+#define XVidC_EdidSuppFeaturePmOffVlp(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_PM_OFF_VLP_MASK) != 0)
+#define XVidC_EdidGetFeatureAnaColorType(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_MASK) >> \
+	XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_SHIFT)
+#define XVidC_EdidSuppFeatureDigColorEncYCrCb444(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_DIG_COLORENC_YCRCB444_MASK) != 0)
+#define XVidC_EdidSuppFeatureDigColorEncYCrCb422(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_DIG_COLORENC_YCRCB422_MASK) != 0)
+#define XVidC_EdidIsFeatureSrgbDef(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_SRGB_DEF_MASK) != 0)
+#define XVidC_EdidIsFeaturePtmInc(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_PTM_INC_MASK) != 0)
+#define XVidC_EdidIsFeatureContFreq(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_CONTFREQ_MASK) != 0)
+
+/* Established timings. */
+#define XVidC_EdidSuppEstTimings720x400_70(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_720x400_70_MASK) != 0)
+#define XVidC_EdidSuppEstTimings720x400_88(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_720x400_88_MASK) != 0)
+#define XVidC_EdidSuppEstTimings640x480_60(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_640x480_60_MASK) != 0)
+#define XVidC_EdidSuppEstTimings640x480_67(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_640x480_67_MASK) != 0)
+#define XVidC_EdidSuppEstTimings640x480_72(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_640x480_72_MASK) != 0)
+#define XVidC_EdidSuppEstTimings640x480_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_640x480_75_MASK) != 0)
+#define XVidC_EdidSuppEstTimings800x600_56(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_800x600_56_MASK) != 0)
+#define XVidC_EdidSuppEstTimings800x600_60(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_800x600_60_MASK) != 0)
+#define XVidC_EdidSuppEstTimings800x600_72(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_800x600_72_MASK) != 0)
+#define XVidC_EdidSuppEstTimings800x600_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_800x600_75_MASK) != 0)
+#define XVidC_EdidSuppEstTimings832x624_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_832x624_75_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1024x768_87(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_1024x768_87_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1024x768_60(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_1024x768_60_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1024x768_70(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_1024x768_70_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1024x768_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_1024x768_75_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1280x1024_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_1280x1024_75_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1152x870_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_MAN] & \
+	XVIDC_EDID_EST_TIMINGS_MAN_1152x870_75_MASK) != 0)
+#define XVidC_EdidGetTimingsMan(E) \
+	(E[XVIDC_EDID_EST_TIMINGS_MAN] & XVIDC_EDID_EST_TIMINGS_MAN_MASK)
+
+/* Standard timings. */
+#define XVidC_EdidGetStdTimingsH(E, N) \
+	((E[XVIDC_EDID_STD_TIMINGS_H(N)] + 31) * 8)
+#define XVidC_EdidGetStdTimingsAr(E, N) \
+	(E[XVIDC_EDID_STD_TIMINGS_AR_FRR(N)] >> XVIDC_EDID_STD_TIMINGS_AR_SHIFT)
+#define XVidC_EdidGetStdTimingsFrr(E, N) \
+	((E[XVIDC_EDID_STD_TIMINGS_AR_FRR(N)] & \
+	XVIDC_EDID_STD_TIMINGS_FRR_MASK) + 60)
+/* u16 XVidC_EdidGetStdTimingsV(const u8 *EdidRaw, u8 StdTimingsNum); */
+#define XVidC_EdidIsDtdPtmInterlaced(E) \
+	((E[XVIDC_EDID_PTM + XVIDC_EDID_DTD_PTM_SIGNAL] & \
+	XVIDC_EDID_DTD_PTM_SIGNAL_INTERLACED_MASK) >> \
+	XVIDC_EDID_DTD_PTM_SIGNAL_INTERLACED_SHIFT)
+
+/* Extension block count. */
+#define XVidC_EdidGetExtBlkCount(E)	(E[XVIDC_EDID_EXT_BLK_COUNT])
+
+/* Checksum. */
+#define XVidC_EdidGetChecksum(E)	(E[XVIDC_EDID_CHECKSUM])
+
+/**************************** Function Prototypes *****************************/
+
+/* Vendor and product identification: ID manufacturer name. */
+void XVidC_EdidGetManName(const u8 *EdidRaw, char ManName[4]);
+
+/* Basic display parameters and features: Video input definition. */
+XVidC_ColorDepth XVidC_EdidGetColorDepth(const u8 *EdidRaw);
+
+/* Color characteristics (display x,y chromaticity coordinates). */
+int XVidC_EdidGetCcRedX(const u8 *EdidRaw);
+int XVidC_EdidGetCcRedY(const u8 *EdidRaw);
+int XVidC_EdidGetCcGreenX(const u8 *EdidRaw);
+int XVidC_EdidGetCcGreenY(const u8 *EdidRaw);
+int XVidC_EdidGetCcBlueX(const u8 *EdidRaw);
+int XVidC_EdidGetCcBlueY(const u8 *EdidRaw);
+int XVidC_EdidGetCcWhiteX(const u8 *EdidRaw);
+int XVidC_EdidGetCcWhiteY(const u8 *EdidRaw);
+
+/* Standard timings. */
+u16 XVidC_EdidGetStdTimingsV(const u8 *EdidRaw, u8 StdTimingsNum);
+
+/* Utility functions. */
+u32 XVidC_EdidIsVideoTimingSupported(const u8 *EdidRaw,
+		const XVidC_VideoTimingMode *VtMode);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* XVIDC_EDID_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xvidc_edid_ext.h b/src/Xilinx/include/xvidc_edid_ext.h
new file mode 100644
index 0000000..d685723
--- /dev/null
+++ b/src/Xilinx/include/xvidc_edid_ext.h
@@ -0,0 +1,626 @@
+/* vim: set et fde fdm=syntax ft=c.doxygen ts=4 sts=4 sw=4 : */
+/*
+ * Copyright © 2010-2011 Saleem Abdulrasool .
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef xvidc_edid_h
+#define xvidc_edid_h
+
+#include "stdbool.h"
+#include "xvidc.h"
+#include "xil_assert.h"
+#include "xvidc_cea861.h"
+
+#define XVIDC_EDID_BLOCK_SIZE                         (0x80)
+#define XVIDC_EDID_MAX_EXTENSIONS                     (0xFE)
+
+
+static const u8 XVIDC_EDID_EXT_HEADER[] =
+                            { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
+static const u8 XVIDC_EDID_STANDARD_TIMING_DESCRIPTOR_INVALID[] =
+                                                                { 0x01, 0x01 };
+
+enum xvidc_edid_extension_type {
+    XVIDC_EDID_EXTENSION_TIMING           = 0x01, /* Timing Extension */
+    XVIDC_EDID_EXTENSION_CEA              = 0x02, /* Additional Timing Block
+                                             Data (CEA EDID Timing Extension)*/
+    XVIDC_EDID_EXTENSION_VTB              = 0x10, /* Video Timing Block
+                                                          Extension (VTB-EXT)*/
+    XVIDC_EDID_EXTENSION_XVIDC_EDID_2_0= 0x20, /* EDID 2.0 Extension  */
+    XVIDC_EDID_EXTENSION_DI               = 0x40, /* Display Information
+                                                          Extension (DI-EXT) */
+    XVIDC_EDID_EXTENSION_LS               = 0x50, /* Localised String
+                                                          Extension (LS-EXT) */
+    XVIDC_EDID_EXTENSION_MI               = 0x60, /* Microdisplay Interface
+                                                          Extension (MI-EXT) */
+    XVIDC_EDID_EXTENSION_DTCDB_1          = 0xA7, /* Display Transfer
+                                          Characteristics Data Block (DTCDB) */
+    XVIDC_EDID_EXTENSION_DTCDB_2          = 0xAF,
+    XVIDC_EDID_EXTENSION_DTCDB_3          = 0xBF,
+    XVIDC_EDID_EXTENSION_BLOCK_MAP        = 0xF0, /* Block Map*/
+    XVIDC_EDID_EXTENSION_DDDB             = 0xFF, /* Display Device Data
+                                                                 Block (DDDB)*/
+};
+
+enum xvidc_edid_display_type {
+    XVIDC_EDID_DISPLAY_TYPE_MONOCHROME,
+    XVIDC_EDID_DISPLAY_TYPE_RGB,
+    XVIDC_EDID_DISPLAY_TYPE_NON_RGB,
+    XVIDC_EDID_DISPLAY_TYPE_UNDEFINED,
+};
+
+enum xvidc_edid_aspect_ratio {
+    XVIDC_EDID_ASPECT_RATIO_16_10,
+    XVIDC_EDID_ASPECT_RATIO_4_3,
+    XVIDC_EDID_ASPECT_RATIO_5_4,
+    XVIDC_EDID_ASPECT_RATIO_16_9,
+};
+
+enum xvidc_edid_signal_sync {
+    XVIDC_EDID_SIGNAL_SYNC_ANALOG_COMPOSITE,
+    XVIDC_EDID_SIGNAL_SYNC_BIPOLAR_ANALOG_COMPOSITE,
+    XVIDC_EDID_SIGNAL_SYNC_DIGITAL_COMPOSITE,
+    XVIDC_EDID_SIGNAL_SYNC_DIGITAL_SEPARATE,
+};
+
+enum xvidc_edid_stereo_mode {
+    XVIDC_EDID_STEREO_MODE_NONE,
+    XVIDC_EDID_STEREO_MODE_RESERVED,
+    XVIDC_EDID_STEREO_MODE_FIELD_SEQUENTIAL_RIGHT,
+    XVIDC_EDID_STEREO_MODE_2_WAY_INTERLEAVED_RIGHT,
+    XVIDC_EDID_STEREO_MODE_FIELD_SEQUENTIAL_LEFT,
+    XVIDC_EDID_STEREO_MODE_2_WAY_INTERLEAVED_LEFT,
+    XVIDC_EDID_STEREO_MODE_4_WAY_INTERLEAVED,
+    XVIDC_EDID_STEREO_MODE_SIDE_BY_SIDE_INTERLEAVED,
+};
+
+enum xvidc_edid_monitor_descriptor_type {
+    XVIDC_EDID_MONTIOR_DESCRIPTOR_MANUFACTURER_DEFINED        = 0x0F,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_STANDARD_TIMING_IDENTIFIERS = 0xFA,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_COLOR_POINT                 = 0xFB,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_MONITOR_NAME                = 0xFC,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_MONITOR_RANGE_LIMITS        = 0xFD,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_ASCII_STRING                = 0xFE,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_MONITOR_SERIAL_NUMBER       = 0xFF,
+};
+
+enum xvidc_edid_secondary_timing_support {
+    XVIDC_EDID_SECONDARY_TIMING_NOT_SUPPORTED,
+    XVIDC_EDID_SECONDARY_TIMING_GFT           = 0x02,
+};
+
+
+struct __attribute__ (( packed )) xvidc_edid_detailed_timing_descriptor {
+    u16 pixel_clock;                               /* = value * 10000 */
+
+    u8  horizontal_active_lo;
+    u8  horizontal_blanking_lo;
+
+    unsigned horizontal_blanking_hi         : 4;
+    unsigned horizontal_active_hi           : 4;
+
+    u8  vertical_active_lo;
+    u8  vertical_blanking_lo;
+
+    unsigned vertical_blanking_hi           : 4;
+    unsigned vertical_active_hi             : 4;
+
+    u8  horizontal_sync_offset_lo;
+    u8  horizontal_sync_pulse_width_lo;
+
+    unsigned vertical_sync_pulse_width_lo   : 4;
+    unsigned vertical_sync_offset_lo        : 4;
+
+    unsigned vertical_sync_pulse_width_hi   : 2;
+    unsigned vertical_sync_offset_hi        : 2;
+    unsigned horizontal_sync_pulse_width_hi : 2;
+    unsigned horizontal_sync_offset_hi      : 2;
+
+    u8  horizontal_image_size_lo;
+    u8  vertical_image_size_lo;
+
+    unsigned vertical_image_size_hi         : 4;
+    unsigned horizontal_image_size_hi       : 4;
+
+    u8  horizontal_border;
+    u8  vertical_border;
+
+    unsigned stereo_mode_lo                 : 1;
+    unsigned signal_pulse_polarity          : 1; /* pulse on sync,
+                                               composite/horizontal polarity */
+    unsigned signal_serration_polarity      : 1; /* serrate on sync, vertical
+                                                                    polarity */
+    unsigned signal_sync                    : 2;
+    unsigned stereo_mode_hi                 : 2;
+    unsigned interlaced                     : 1;
+};
+
+static inline u32
+xvidc_edid_detailed_timing_pixel_clock
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return dtb->pixel_clock * 10000;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_horizontal_blanking
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->horizontal_blanking_hi << 8) | dtb->horizontal_blanking_lo;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_horizontal_active
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->horizontal_active_hi << 8) | dtb->horizontal_active_lo;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_vertical_blanking
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->vertical_blanking_hi << 8) | dtb->vertical_blanking_lo;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_vertical_active
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->vertical_active_hi << 8) | dtb->vertical_active_lo;
+}
+
+static inline u8
+xvidc_edid_detailed_timing_vertical_sync_offset
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->vertical_sync_offset_hi << 4) | dtb->vertical_sync_offset_lo;
+}
+
+static inline u8
+xvidc_edid_detailed_timing_vertical_sync_pulse_width
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->vertical_sync_pulse_width_hi << 4) |
+                                             dtb->vertical_sync_pulse_width_lo;
+}
+
+static inline u8
+xvidc_edid_detailed_timing_horizontal_sync_offset
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->horizontal_sync_offset_hi << 4) |
+                                                dtb->horizontal_sync_offset_lo;
+}
+
+static inline u8
+xvidc_edid_detailed_timing_horizontal_sync_pulse_width
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->horizontal_sync_pulse_width_hi << 4) |
+                                           dtb->horizontal_sync_pulse_width_lo;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_horizontal_image_size
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return
+          (dtb->horizontal_image_size_hi << 8) | dtb->horizontal_image_size_lo;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_vertical_image_size
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->vertical_image_size_hi << 8) | dtb->vertical_image_size_lo;
+}
+
+static inline u8
+xvidc_edid_detailed_timing_stereo_mode
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->stereo_mode_hi << 2 | dtb->stereo_mode_lo);
+}
+
+
+struct __attribute__ (( packed )) xvidc_edid_monitor_descriptor {
+    u16 flag0;
+    u8  flag1;
+    u8  tag;
+    u8  flag2;
+    u8  data[13];
+};
+
+typedef char xvidc_edid_monitor_descriptor_string
+            [sizeof(((struct xvidc_edid_monitor_descriptor *)0)->data) + 1];
+
+
+struct __attribute__ (( packed )) xvidc_edid_monitor_range_limits {
+    u8  minimum_vertical_rate;             /* Hz */
+    u8  maximum_vertical_rate;             /* Hz */
+    u8  minimum_horizontal_rate;           /* kHz */
+    u8  maximum_horizontal_rate;           /* kHz */
+    u8  maximum_supported_pixel_clock;     /* = (value * 10) Mhz
+                                                   (round to 10 MHz) */
+
+    /* secondary timing formula */
+    u8  secondary_timing_support;
+    u8  reserved;
+    u8  secondary_curve_start_frequency;   /* horizontal frequency / 2 kHz */
+    u8  c;                                 /* = (value >> 1) */
+    u16 m;
+    u8  k;
+    u8  j;                                 /* = (value >> 1) */
+};
+
+
+struct __attribute__ (( packed )) xvidc_edid_standard_timing_descriptor {
+    u8  horizontal_active_pixels;         /* = (value + 31) * 8 */
+
+    unsigned refresh_rate       : 6;           /* = value + 60 */
+    unsigned image_aspect_ratio : 2;
+};
+
+inline u32
+xvidc_edid_standard_timing_horizontal_active
+(const struct xvidc_edid_standard_timing_descriptor * const desc) {
+    return ((desc->horizontal_active_pixels + 31) << 3);
+}
+
+inline u32
+xvidc_edid_standard_timing_vertical_active
+(const struct xvidc_edid_standard_timing_descriptor * const desc) {
+    const u32 hres = xvidc_edid_standard_timing_horizontal_active(desc);
+
+    switch (desc->image_aspect_ratio) {
+    case XVIDC_EDID_ASPECT_RATIO_16_10:
+        return ((hres * 10) >> 4);
+    case XVIDC_EDID_ASPECT_RATIO_4_3:
+        return ((hres * 3) >> 2);
+    case XVIDC_EDID_ASPECT_RATIO_5_4:
+        return ((hres << 2) / 5);
+    case XVIDC_EDID_ASPECT_RATIO_16_9:
+        return ((hres * 9) >> 4);
+    }
+
+    return hres;
+}
+
+inline u32
+xvidc_edid_standard_timing_refresh_rate
+(const struct xvidc_edid_standard_timing_descriptor * const desc) {
+    return (desc->refresh_rate + 60);
+}
+
+
+struct __attribute__ (( packed )) edid {
+    /* header information */
+    u8  header[8];
+
+    /* vendor/product identification */
+    u16 manufacturer;
+    union {
+        u16 product_u16;
+        u8  product[2];
+    };
+    union {
+        u32 serial_number_u32;
+        u8  serial_number[4];
+    };
+    u8  manufacture_week;
+    u8  manufacture_year;                  /* = value + 1990 */
+
+    /* EDID version */
+    u8  version;
+    u8  revision;
+
+    /* basic display parameters and features */
+    union {
+        struct __attribute__ (( packed )) {
+            unsigned dfp_1x                 : 1;    /* VESA DFP 1.x */
+            unsigned                        : 6;
+            unsigned digital                : 1;
+        } digital;
+        struct __attribute__ (( packed )) {
+            unsigned vsync_serration        : 1;
+            unsigned green_video_sync       : 1;
+            unsigned composite_sync         : 1;
+            unsigned separate_sync          : 1;
+            unsigned blank_to_black_setup   : 1;
+            unsigned signal_level_standard  : 2;
+            unsigned digital                : 1;
+        } analog;
+    } video_input_definition;
+
+    u8  maximum_horizontal_image_size;     /* cm */
+    u8  maximum_vertical_image_size;       /* cm */
+
+    u8  display_transfer_characteristics;  /* gamma = (value + 100) / 100 */
+
+    struct __attribute__ (( packed )) {
+        unsigned default_gtf                    : 1; /* generalised timing
+                                                     formula */
+        unsigned preferred_timing_mode          : 1;
+        unsigned standard_default_color_space   : 1;
+        unsigned display_type                   : 2;
+        unsigned active_off                     : 1;
+        unsigned suspend                        : 1;
+        unsigned standby                        : 1;
+    } feature_support;
+
+    /* color characteristics block */
+    unsigned green_y_low    : 2;
+    unsigned green_x_low    : 2;
+    unsigned red_y_low      : 2;
+    unsigned red_x_low      : 2;
+
+    unsigned white_y_low    : 2;
+    unsigned white_x_low    : 2;
+    unsigned blue_y_low     : 2;
+    unsigned blue_x_low     : 2;
+
+    u8  red_x;
+    u8  red_y;
+    u8  green_x;
+    u8  green_y;
+    u8  blue_x;
+    u8  blue_y;
+    u8  white_x;
+    u8  white_y;
+
+    /* established timings */
+    struct __attribute__ (( packed )) {
+        unsigned timing_800x600_60   : 1;
+        unsigned timing_800x600_56   : 1;
+        unsigned timing_640x480_75   : 1;
+        unsigned timing_640x480_72   : 1;
+        unsigned timing_640x480_67   : 1;
+        unsigned timing_640x480_60   : 1;
+        unsigned timing_720x400_88   : 1;
+        unsigned timing_720x400_70   : 1;
+
+        unsigned timing_1280x1024_75 : 1;
+        unsigned timing_1024x768_75  : 1;
+        unsigned timing_1024x768_70  : 1;
+        unsigned timing_1024x768_60  : 1;
+        unsigned timing_1024x768_87  : 1;
+        unsigned timing_832x624_75   : 1;
+        unsigned timing_800x600_75   : 1;
+        unsigned timing_800x600_72   : 1;
+    } established_timings;
+
+    struct __attribute__ (( packed )) {
+        unsigned reserved            : 7;
+        unsigned timing_1152x870_75  : 1;
+    } manufacturer_timings;
+
+    /* standard timing id */
+    struct  xvidc_edid_standard_timing_descriptor standard_timing_id[8];
+
+    /* detailed timing */
+    union {
+        struct xvidc_edid_monitor_descriptor         monitor;
+        struct xvidc_edid_detailed_timing_descriptor timing;
+    } detailed_timings[4];
+
+    u8  extensions;
+    u8  checksum;
+};
+
+static inline void
+xvidc_edid_manufacturer(const struct edid * const edid, char manufacturer[4])
+{
+    manufacturer[0] = '@' + ((edid->manufacturer & 0x007c) >> 2);
+    manufacturer[1] = '@' + ((((edid->manufacturer & 0x0003) >> 00) << 3) | (((edid->manufacturer & 0xe000) >> 13) << 0));
+    manufacturer[2] = '@' + ((edid->manufacturer & 0x1f00) >> 8);
+    manufacturer[3] = '\0';
+}
+
+static inline double
+xvidc_edid_gamma(const struct edid * const edid)
+{
+    return (edid->display_transfer_characteristics + 100) / 100.0;
+}
+
+static inline bool
+xvidc_edid_detailed_timing_is_monitor_descriptor(const struct edid * const edid,
+                                           const u8 timing)
+{
+    const struct xvidc_edid_monitor_descriptor * const mon =
+        &edid->detailed_timings[timing].monitor;
+
+    Xil_AssertNonvoid(timing < ARRAY_SIZE(edid->detailed_timings));
+
+    return mon->flag0 == 0x0000 && mon->flag1 == 0x00 && mon->flag2 == 0x00;
+}
+
+
+struct __attribute__ (( packed )) xvidc_edid_color_characteristics_data {
+    struct {
+        u16 x;
+        u16 y;
+    } red, green, blue, white;
+};
+
+static inline struct xvidc_edid_color_characteristics_data
+xvidc_edid_color_characteristics(const struct edid * const edid)
+{
+    const struct xvidc_edid_color_characteristics_data characteristics = {
+        .red = {
+            .x = (edid->red_x << 2) | edid->red_x_low,
+            .y = (edid->red_y << 2) | edid->red_y_low,
+        },
+        .green = {
+            .x = (edid->green_x << 2) | edid->green_x_low,
+            .y = (edid->green_y << 2) | edid->green_y_low,
+        },
+        .blue = {
+            .x = (edid->blue_x << 2) | edid->blue_x_low,
+            .y = (edid->blue_y << 2) | edid->blue_y_low,
+        },
+        .white = {
+            .x = (edid->white_x << 2) | edid->white_x_low,
+            .y = (edid->white_y << 2) | edid->white_y_low,
+        },
+    };
+
+    return characteristics;
+}
+
+
+struct __attribute__ (( packed )) xvidc_edid_block_map {
+    u8 tag;
+    u8 extension_tag[126];
+    u8 checksum;
+};
+
+
+struct __attribute__ (( packed )) xvidc_edid_extension {
+    u8 tag;
+    u8 revision;
+    u8 extension_data[125];
+    u8 checksum;
+};
+
+
+static inline bool
+xvidc_edid_verify_checksum(const u8 * const block)
+{
+    u8 checksum = 0;
+    int i;
+
+    for (i = 0; i < XVIDC_EDID_BLOCK_SIZE; i++)
+        checksum += block[i];
+
+    return (checksum == 0);
+}
+
+static inline double
+xvidc_edid_decode_fixed_point(u16 value)
+{
+    double result = 0.0;
+
+    Xil_AssertNonvoid((~value & 0xfc00) == 0xfc00);
+                                                 /* edid fraction is 10 bits */
+
+    for (u8 i = 0; value && (i < 10); i++, value >>= 1)
+        result = result + ((value & 0x1) * (1.0 / (1 << (10 - i))));
+
+    return result;
+}
+
+typedef enum {
+    XVIDC_VERBOSE_DISABLE,
+    XVIDC_VERBOSE_ENABLE
+} XV_VidC_Verbose;
+
+typedef enum {
+    XVIDC_ISDVI,
+    XVIDC_ISHDMI
+} XV_VidC_IsHdmi;
+
+typedef enum {
+    XVIDC_NOT_SUPPORTED,
+    XVIDC_SUPPORTED
+} XV_VidC_Supp;
+#if XVIDC_EDID_VERBOSITY > 1
+typedef struct {
+	u32 Integer;
+	u32 Decimal;
+} XV_VidC_DoubleRep;
+#endif
+
+typedef struct {
+    u8 width;
+    u8 height;
+} XV_VidC_PicAspectRatio;
+
+typedef struct {
+    u16 hres;
+    u16 vres;
+    u16 htotal;
+    u16 vtotal;
+    XVidC_VideoFormat vidfrmt;
+    u32 pixclk;
+    u16 hsync_width;
+    u16 vsync_width;
+    u16 hfp;
+    u16 vfp;
+    u8 vfreq;
+    XV_VidC_PicAspectRatio aspect_ratio;
+    unsigned hsync_polarity : 1;
+    unsigned vsync_polarity : 1;
+} XV_VidC_TimingParam;
+
+typedef struct {
+	/*Checks whether Sink able to support HDMI*/
+	XV_VidC_IsHdmi IsHdmi;
+	/*Color Space Support*/
+    XV_VidC_Supp   IsYCbCr444Supp;
+    XV_VidC_Supp   IsYCbCr420Supp;
+    XV_VidC_Supp   IsYCbCr422Supp;
+	/*YCbCr444/YCbCr422/RGB444 Deep Color Support*/
+    XV_VidC_Supp   IsYCbCr444DeepColSupp;
+    XV_VidC_Supp   Is30bppSupp;
+    XV_VidC_Supp   Is36bppSupp;
+    XV_VidC_Supp   Is48bppSupp;
+	/*YCbCr420 Deep Color Support*/
+    XV_VidC_Supp   IsYCbCr420dc30bppSupp;
+    XV_VidC_Supp   IsYCbCr420dc36bppSupp;
+    XV_VidC_Supp   IsYCbCr420dc48bppSupp;
+	/*SCDC and SCDC ReadRequest Support*/
+    XV_VidC_Supp   IsSCDCReadRequestReady;
+    XV_VidC_Supp   IsSCDCPresent;
+	/*Sink Capability Support*/
+    u8             MaxFrameRateSupp;
+    u16            MaxTmdsMhz;
+	/*CEA 861 Supported VIC Support*/
+    u8             SuppCeaVIC[32];
+	/*VESA Sink Preffered Timing Support*/
+    XV_VidC_TimingParam PreferedTiming[4];
+} XV_VidC_EdidCntrlParam;
+
+
+XV_VidC_TimingParam
+XV_VidC_timing
+           (const struct xvidc_edid_detailed_timing_descriptor * const dtb);
+#if XVIDC_EDID_VERBOSITY > 1
+XV_VidC_DoubleRep Double2Int (double in_val);
+#endif
+void XV_VidC_EdidCtrlParamInit (XV_VidC_EdidCntrlParam *EdidCtrlParam);
+
+void
+XV_VidC_parse_edid(const u8 * const data,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/src/Xilinx/include/xwdtps.h b/src/Xilinx/include/xwdtps.h
new file mode 100644
index 0000000..58e5596
--- /dev/null
+++ b/src/Xilinx/include/xwdtps.h
@@ -0,0 +1,225 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xwdtps.h
+* @addtogroup wdtps_v3_0
+* @{
+* @details
+*
+* The Xilinx watchdog timer driver supports the Xilinx watchdog timer hardware.
+*
+* The Xilinx watchdog timer (WDT) driver supports the following features:
+*   - Both Interrupt driven and Polled mode
+*   - enabling and disabling the watchdog timer
+*   - restarting the watchdog.
+*   - initializing the most significant digit of the counter restart value.
+*   - multiple individually enabling/disabling outputs
+*
+* It is the responsibility of the application to provide an interrupt handler
+* for the watchdog timer and connect it to the interrupt system if interrupt
+* driven mode is desired.
+*
+* If interrupt is enabled, the watchdog timer device generates an interrupt
+* when the counter reaches zero.
+*
+* If the hardware interrupt signal is not connected/enabled, polled mode is the
+* only option (using IsWdtExpired) for the watchdog.
+*
+* The outputs from the WDT are individually enabled/disabled using
+* _EnableOutput()/_DisableOutput(). The clock divisor ratio and initial restart
+* value of the count is configurable using _SetControlValues().
+*
+* The reset condition of the hardware has the maximum initial count in the
+* Counter Reset Value (CRV) and the WDT is disabled with the reset enable
+* enabled and the reset length set to 32 clocks. i.e.
+* 
+*     register ZMR = 0x1C2
+*     register CCR = 0x3FC
+* 

+*
+* This driver is intended to be RTOS and processor independent. It works with
+* physical addresses only.  Any needs for dynamic memory management, threads
+* or thread mutual exclusion, virtual memory, or cache control must be
+* satisfied by the layer above this driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00a ecm/jz 01/15/10 First release
+* 1.01a asa    02/15/12 Added tcl file to generate xparameters
+* 1.02a  sg    07/15/12 Removed code/APIs related to  External Signal
+*						Length functionality for CR 658287
+*						Removed APIs XWdtPs_SetExternalSignalLength,
+*						XWdtPs_GetExternalSignalLength
+*						Modified the Self Test to use the Reset Length mask
+*						for CR 658287
+* 3.0	pkp	   12/09/14 Added support for Zynq Ultrascale Mp.Also
+*			modified code for MISRA-C:2012 compliance.
+*       ms     03/17/17 Added readme.txt file in examples folder for doxygen
+*                       generation.
+* 

+*
+******************************************************************************/
+#ifndef XWDTPS_H		/* prevent circular inclusions */
+#define XWDTPS_H		/* by using protection macros */
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xwdtps_hw.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * Choices for output selections for the device, used in
+ * XWdtPs_EnableOutput()/XWdtPs_DisableOutput() functions
+ */
+#define XWDTPS_RESET_SIGNAL	0x01U   /**< Reset signal request */
+#define XWDTPS_IRQ_SIGNAL	0x02U   /**< IRQ signal request */
+
+/*
+ * Control value setting flags, used in
+ * XWdtPs_SetControlValues()/XWdtPs_GetControlValues() functions
+ */
+#define XWDTPS_CLK_PRESCALE		0x01U   /**< Clock Prescale request */
+#define XWDTPS_COUNTER_RESET	0x02U   /**< Counter Reset request */
+
+/**************************** Type Definitions *******************************/
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID of device */
+	u32 BaseAddress;	/**< Base address of the device */
+} XWdtPs_Config;
+
+
+/**
+ * The XWdtPs driver instance data. The user is required to allocate a
+ * variable of this type for every watchdog/timer device in the system.
+ * A pointer to a variable of this type is then passed to the driver API
+ * functions.
+ */
+typedef struct {
+	XWdtPs_Config Config;   /**< Hardware Configuration */
+	u32 IsReady;		/**< Device is initialized and ready */
+	u32 IsStarted;		/**< Device watchdog timer is running */
+} XWdtPs;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+/****************************************************************************/
+/**
+*
+* Check if the watchdog timer has expired. This function is used for polled
+* mode and it is also used to check if the last reset was caused by the
+* watchdog timer.
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+*
+* @return
+*		- TRUE if the watchdog has expired.
+*		- FALSE if the watchdog has not expired.
+*
+* @note		C-style signature:
+*		int XWdtPs_IsWdtExpired(XWdtPs *InstancePtr)
+*
+******************************************************************************/
+#define XWdtPs_IsWdtExpired(InstancePtr)				  \
+((XWdtPs_ReadReg((InstancePtr)->Config.BaseAddress, XWDTPS_SR_OFFSET) & \
+   XWDTPS_SR_WDZ_MASK) == XWDTPS_SR_WDZ_MASK)
+
+
+/****************************************************************************/
+/**
+*
+* Restart the watchdog timer. An application needs to call this function
+* periodically to keep the timer from asserting the enabled output.
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XWdtPs_RestartWdt(XWdtPs *InstancePtr)
+*
+******************************************************************************/
+#define XWdtPs_RestartWdt(InstancePtr)					\
+	XWdtPs_WriteReg((InstancePtr)->Config.BaseAddress,		\
+		XWDTPS_RESTART_OFFSET, XWDTPS_RESTART_KEY_VAL)
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Lookup configuration in xwdtps_sinit.c.
+ */
+XWdtPs_Config *XWdtPs_LookupConfig(u16 DeviceId);
+
+/*
+ * Interface functions in xwdtps.c
+ */
+s32 XWdtPs_CfgInitialize(XWdtPs *InstancePtr,
+			XWdtPs_Config *ConfigPtr, u32 EffectiveAddress);
+
+void XWdtPs_Start(XWdtPs *InstancePtr);
+
+void XWdtPs_Stop(XWdtPs *InstancePtr);
+
+void XWdtPs_EnableOutput(XWdtPs *InstancePtr, u8 Signal);
+
+void XWdtPs_DisableOutput(XWdtPs *InstancePtr, u8 Signal);
+
+u32 XWdtPs_GetControlValue(XWdtPs *InstancePtr, u8 Control);
+
+void XWdtPs_SetControlValue(XWdtPs *InstancePtr, u8 Control, u32 Value);
+
+/*
+ * Self-test function in xwdttb_selftest.c.
+ */
+s32 XWdtPs_SelfTest(XWdtPs *InstancePtr);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/include/xwdtps_hw.h b/src/Xilinx/include/xwdtps_hw.h
new file mode 100644
index 0000000..4b5a3df
--- /dev/null
+++ b/src/Xilinx/include/xwdtps_hw.h
@@ -0,0 +1,193 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xwdtps_hw.h
+* @addtogroup wdtps_v3_0
+* @{
+*
+* This file contains the hardware interface to the System Watch Dog Timer (WDT).
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------
+* 1.00a ecm/jz 01/15/10 First release
+* 1.02a  sg    07/15/12 Removed defines related to  External Signal
+*			Length functionality for CR 658287
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+#ifndef XWDTPS_HW_H		/* prevent circular inclusions */
+#define XWDTPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register Map
+ * Offsets of registers from the start of the device
+ * @{
+ */
+
+#define XWDTPS_ZMR_OFFSET	0x00000000U /**< Zero Mode Register */
+#define XWDTPS_CCR_OFFSET	0x00000004U /**< Counter Control Register */
+#define XWDTPS_RESTART_OFFSET	0x00000008U /**< Restart Register */
+#define XWDTPS_SR_OFFSET	0x0000000CU /**< Status Register */
+/* @} */
+
+
+/** @name Zero Mode Register
+ * This register controls how the time out is indicated and also contains
+ * the access code (0xABC) to allow writes to the register
+ * @{
+ */
+#define XWDTPS_ZMR_WDEN_MASK	0x00000001U /**< enable the WDT */
+#define XWDTPS_ZMR_RSTEN_MASK	0x00000002U /**< enable the reset output */
+#define XWDTPS_ZMR_IRQEN_MASK	0x00000004U /**< enable the IRQ output */
+
+#define XWDTPS_ZMR_RSTLN_MASK	0x00000070U /**< set length of reset pulse */
+#define XWDTPS_ZMR_RSTLN_SHIFT	4U	   /**< shift for reset pulse */
+
+#define XWDTPS_ZMR_IRQLN_MASK	0x00000180U /**< set length of interrupt pulse */
+#define XWDTPS_ZMR_IRQLN_SHIFT	7U	   /**< shift for interrupt pulse */
+
+#define XWDTPS_ZMR_ZKEY_MASK	0x00FFF000U /**< mask for writing access key */
+#define XWDTPS_ZMR_ZKEY_VAL		0x00ABC000U /**< access key, 0xABC << 12 */
+
+/* @} */
+
+/** @name  Counter Control register
+ * This register controls how fast the timer runs and the reset value
+ * and also contains the access code (0x248) to allow writes to the
+ * register
+ * @{
+ */
+
+#define XWDTPS_CCR_CLKSEL_MASK	0x00000003U /**< counter clock prescale */
+
+#define XWDTPS_CCR_CRV_MASK	0x00003FFCU /**< counter reset value */
+#define XWDTPS_CCR_CRV_SHIFT	2U	   /**< shift for writing value */
+
+#define XWDTPS_CCR_CKEY_MASK	0x03FFC000U /**< mask for writing access key */
+#define XWDTPS_CCR_CKEY_VAL	0x00920000U /**< access key, 0x248 << 14 */
+
+/* Bit patterns for Clock prescale divider values */
+
+#define XWDTPS_CCR_PSCALE_0008  0x00000000U /**< divide clock by 8 */
+#define XWDTPS_CCR_PSCALE_0064  0x00000001U /**< divide clock by 64 */
+#define XWDTPS_CCR_PSCALE_0512  0x00000002U /**< divide clock by 512 */
+#define XWDTPS_CCR_PSCALE_4096  0x00000003U /**< divide clock by 4096 */
+
+/* @} */
+
+/** @name  Restart register
+ * This register resets the timer preventing a timeout. Value is specific
+ * 0x1999
+ * @{
+ */
+
+#define XWDTPS_RESTART_KEY_VAL	0x00001999U /**< valid key */
+
+/*@}*/
+
+/** @name Status register
+ * This register indicates timer reached zero count.
+ * @{
+ */
+#define XWDTPS_SR_WDZ_MASK	0x00000001U /**< time out occurred */
+
+/*@}*/
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* Read the given register.
+*
+* @param	BaseAddress is the base address of the device
+* @param	RegOffset is the register offset to be read
+*
+* @return	The 32-bit value of the register
+*
+* @note		C-style signature:
+*		u32 XWdtPs_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+*****************************************************************************/
+#define XWdtPs_ReadReg(BaseAddress, RegOffset) \
+	Xil_In32((BaseAddress) + (u32)(RegOffset))
+
+/****************************************************************************/
+/**
+*
+* Write the given register.
+*
+* @param	BaseAddress is the base address of the device
+* @param	RegOffset is the register offset to be written
+* @param	Data is the 32-bit value to write to the register
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XWdtPs_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+*****************************************************************************/
+#define XWdtPs_WriteReg(BaseAddress, RegOffset, Data) \
+	Xil_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data))
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/** @} */
diff --git a/src/Xilinx/include/xzdma.h b/src/Xilinx/include/xzdma.h
new file mode 100644
index 0000000..9ff6907
--- /dev/null
+++ b/src/Xilinx/include/xzdma.h
@@ -0,0 +1,713 @@
+/******************************************************************************
+*
+* Copyright (C) 2014-2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xzdma.h
+* @addtogroup zdma_v1_5
+* @{
+* @details
+*
+* ZDMA is a general purpose DMA designed to support memory to memory and memory
+* to IO buffer transfers. ZynqMP has two instance of general purpose ZDMA.
+* One is located in FPD (full power domain) which is GDMA and other is located
+* in LPD (low power domain) which is ADMA.
+*
+* GMDA & ADMA are configured each with 8 DMA channels and and each channel can
+* be programmed secure or non-secure.
+* Each channel is divided into two functional sides, Source (Read) and
+* Destination (Write). Each DMA channel can be independently programmed
+* in one of following DMA modes.
+*	- Simple DMA
+*		- Normal data transfer from source to destination.
+*		- Write Only mode.
+*		- Read Only mode.
+*	- Scatter Gather DMA
+*		- Only Normal mode it can't support other two modes.
+* In Scatter gather descriptor can be of 3 types
+*	- Linear descriptor.
+*	- Linked list descriptor
+*	- Hybrid descriptor (Combination of both Linear and Linked list)
+* Our driver will not support Hybrid type of descriptor.
+*
+* Initialization & Configuration
+*
+* The device driver enables higher layer software (e.g., an application) to
+* communicate to the ZDMA core.
+*
+* XZDma_CfgInitialize() API is used to initialize the ZDMA core.
+* The user needs to first call the XZDma_LookupConfig() API which returns
+* the Configuration structure pointer which is passed as a parameter to the
+* XZDma_CfgInitialize() API.
+*
+*  Interrupts 
+* The driver provides an interrupt handler XZDma_IntrHandler for handling
+* the interrupt from the ZDMA core. The users of this driver have to
+* register this handler with the interrupt system and provide the callback
+* functions by using XZDma_SetCallBack API. In this version Descriptor done
+* option is disabled.
+*
+*  Virtual Memory 
+*
+* This driver supports Virtual Memory. The RTOS is responsible for calculating
+* the correct device base address in Virtual Memory space.
+*
+*  Threads 
+*
+* This driver is not thread safe. Any needs for threads or thread mutual
+* exclusion must be satisfied by the layer above this driver.
+*
+*  Asserts 
+*
+* Asserts are used within all Xilinx drivers to enforce constraints on argument
+* values. Asserts can be turned off on a system-wide basis by defining, at
+* compile time, the NDEBUG identifier. By default, asserts are turned on and it
+* is recommended that users leave asserts on during development.
+*
+*  Building the driver 
+*
+* The XZDma driver is composed of several source files. This allows the user
+* to build and link only those parts of the driver that are necessary.
+*
+* This header file contains identifiers and register-level driver functions (or
+* macros), range macros, structure typedefs that can be used to access the
+* Xilinx ZDMA core instance.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ------------------------------------------------------
+* 1.0   vns     2/27/15  First release
+* 1.1   vns    15/02/16  Corrected Destination descriptor addresss calculation
+*                        in XZDma_CreateBDList API
+*                        Modified XZDma_SetMode to return XST_FAILURE on
+*                        selecting DMA mode other than normal mode in
+*                        scatter gather mode data transfer and corrected
+*                        XZDma_SetChDataConfig API to set over fetch and
+*                        src issue parameters correctly.
+*       ms     03/17/17  Added readme.txt file in examples folder for doxygen
+*                        generation.
+*       ms     04/05/17  Modified comment lines notation in functions of zdma
+*                        examples to avoid unnecessary description to get
+*                        displayed while generating doxygen and also changed
+*                        filename tag to include the readonly mode example file
+*                        in doxygen.
+* 1.3   mus     08/14/17 Update cache coherency information of the interface in
+*                        its config structure.
+* 1.4   adk 	11/02/17 Updated examples to fix compilation errors for IAR
+*			 compiler.
+* 1.5   adk     11/22/17 Added peripheral test app support for ZDMA driver.
+*		12/11/17 Fixed peripheral test app generation issues when dma
+*			 buffers are configured on OCM memory(CR#990806).
+* 

+*
+******************************************************************************/
+#ifndef XZDMA_H_
+#define XZDMA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xzdma_hw.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xil_cache.h"
+#include "bspconfig.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+/** @name ZDMA Handler Types
+ * @{
+ */
+typedef enum {
+	XZDMA_HANDLER_DONE,	/**< For Done Handler */
+	XZDMA_HANDLER_ERROR,	/**< For Error Handler */
+} XZDma_Handler;
+/*@}*/
+
+/** @name ZDMA Descriptors Types
+ * @{
+ */
+typedef enum {
+	XZDMA_LINEAR,		/**< Linear descriptor */
+	XZDMA_LINKEDLIST,	/**< Linked list descriptor */
+} XZDma_DscrType;
+/*@}*/
+
+/** @name ZDMA Operation modes
+ * @{
+ */
+typedef enum {
+	XZDMA_NORMAL_MODE,	/**< Normal transfer from source to
+				  *  destination*/
+	XZDMA_WRONLY_MODE,	/**< Write only mode */
+	XZDMA_RDONLY_MODE	/**< Read only mode */
+} XZDma_Mode;
+/*@}*/
+
+/** @name ZDMA state
+ * @{
+ */
+typedef enum {
+	XZDMA_IDLE,		/**< ZDMA is in Idle state */
+	XZDMA_PAUSE,		/**< Paused state */
+	XZDMA_BUSY,		/**< Busy state */
+} XZDmaState;
+/*@}*/
+
+/** @name ZDMA AXI Burst type
+ * @{
+ */
+typedef enum {
+	XZDMA_FIXED_BURST = 0,	/**< Fixed burst type */
+	XZDMA_INCR_BURST	/**< Increment burst type */
+} XZDma_BurstType;
+/*@}*/
+
+/******************************************************************************/
+/**
+* This typedef contains scatter gather descriptor fields for ZDMA core.
+*/
+typedef struct {
+	void *SrcDscrPtr;	/**< Source Descriptor pointer */
+	void *DstDscrPtr;	/**< Destination Descriptor pointer */
+	u32 DscrCount;		/**< Count of descriptors available */
+	XZDma_DscrType DscrType;/**< Type of descriptor either Linear or
+				  *  Linked list type */
+} XZDma_Descriptor;
+
+/******************************************************************************/
+/**
+* This typedef contains scatter gather descriptor fields for ZDMA core.
+*/
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+typedef struct {
+	u64 Address;	/**< Address */
+	u32 Size;	/**< Word2, Size of data */
+	u32 Cntl;	/**< Word3 Control data */
+	u64 NextDscr; 	/**< Address of next descriptor */
+	u64 Reserved;	/**< Reserved address */
+#if defined (__ICCARM__)
+}  XZDma_LlDscr ;
+#pragma pack(pop)
+#else
+} __attribute__ ((packed)) XZDma_LlDscr;
+#endif
+/******************************************************************************/
+/**
+* This typedef contains Linear descriptor fields for ZDMA core.
+*/
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+typedef struct {
+	u64 Address;	/**< Address */
+	u32 Size;	/**< Word3, Size of data */
+	u32 Cntl;	/**< Word4, control data */
+#if defined (__ICCARM__)
+}XZDma_LiDscr;
+#pragma pack(pop)
+#else
+}  __attribute__ ((packed)) XZDma_LiDscr;
+#endif
+/******************************************************************************/
+/**
+*
+* This typedef contains the data configurations of ZDMA core
+*/
+typedef struct {
+	u8 OverFetch;		/**< Enable Over fetch */
+	u8 SrcIssue;		/**< Outstanding transactions for Source */
+	XZDma_BurstType SrcBurstType;
+				/**< Burst type for SRC */
+	u8 SrcBurstLen;		/**< AXI length for data read */
+	XZDma_BurstType DstBurstType;
+				/**< Burst type for DST */
+	u8 DstBurstLen;		/**< AXI length for data write */
+	u8 SrcCache;		/**< AXI cache bits for data read */
+	u8 SrcQos;		/**< AXI QOS bits for data read */
+	u8 DstCache;		/**< AXI cache bits for data write */
+	u8 DstQos;		/**< AXI QOS bits for data write */
+} XZDma_DataConfig;
+
+/******************************************************************************/
+/**
+*
+* This typedef contains the descriptor configurations of ZDMA core
+*/
+typedef struct{
+	u8 AxCoherent;	/**< AXI transactions are coherent or non-coherent */
+	u8 AXCache;	/**< AXI cache for DSCR fetch */
+	u8 AXQos;	/**< Qos bit for DSCR fetch */
+} XZDma_DscrConfig;
+
+/******************************************************************************/
+/**
+* Callback type for Completion of all data transfers.
+*
+* @param 	CallBackRef is a callback reference passed in by the upper layer
+*		when setting the callback functions, and passed back to the
+*		upper layer when the callback is invoked.
+*******************************************************************************/
+typedef void (*XZDma_DoneHandler) (void *CallBackRef);
+
+/******************************************************************************/
+/**
+* Callback type for all error interrupts.
+*
+* @param 	CallBackRef is a callback reference passed in by the upper layer
+*		when setting the callback functions, and passed back to the
+*		upper layer when the callback is invoked.
+* @param	ErrorMask is a bit mask indicating the cause of the error. Its
+*		value equals 'OR'ing one or more XZDMA_IXR_* values defined in
+*		xzdma_hw.h
+****************************************************************************/
+typedef void (*XZDma_ErrorHandler) (void *CallBackRef, u32 ErrorMask);
+
+/**
+* This typedef contains configuration information for a ZDMA core
+* Each ZDMA core should have a configuration structure associated.
+*/
+typedef struct {
+	u16 DeviceId;		/**< Device Id of ZDMA */
+	u32 BaseAddress;	/**< BaseAddress of ZDMA */
+	u8 DmaType;		/**< Type of DMA */
+	u8 IsCacheCoherent; /**< Describes whether Cache Coherent or not;
+                              * Applicable only to A53 in EL1 NS mode */
+} XZDma_Config;
+
+/******************************************************************************/
+/**
+*
+* The XZDma driver instance data structure. A pointer to an instance data
+* structure is passed around by functions to refer to a specific driver
+* instance.
+*/
+typedef struct {
+	XZDma_Config Config;	/**< Hardware configuration */
+	u32 IsReady;		/**< Device and the driver instance
+				  *  are initialized */
+	u32 IntrMask;		/**< Mask for enabling interrupts */
+
+	XZDma_Mode Mode;	/**< Mode of ZDMA core to be operated */
+	u8 IsSgDma;		/**< Is ZDMA core is in scatter gather or
+				  *  not will be specified */
+	u32 Slcr_adma;		/**< Used to hold SLCR ADMA register
+				  *  contents */
+	XZDma_Descriptor Descriptor;	/**< It contains information about
+					  * descriptors */
+
+	XZDma_DoneHandler DoneHandler;	/**< Call back for transfer
+					  *  done interrupt */
+	void *DoneRef;			/**< To be passed to the done
+					  * interrupt callback */
+
+	XZDma_ErrorHandler ErrorHandler;/**< Call back for error
+					  *  interrupt */
+	void *ErrorRef;			/**< To be passed to the error
+					  * interrupt callback */
+	XZDma_DataConfig DataConfig;	/**< Current configurations */
+	XZDma_DscrConfig DscrConfig;	/**< Current configurations */
+	XZDmaState ChannelState;	 /**< ZDMA channel is busy */
+
+} XZDma;
+
+/******************************************************************************/
+/**
+*
+* This typedef contains the fields for transfer of data.
+*/
+typedef struct {
+	UINTPTR SrcAddr;	/**< Source address */
+	UINTPTR DstAddr;	/**< Destination Address */
+	u32 Size;		/**< Size of the data to be transferred */
+	u8 SrcCoherent;		/**< Source coherent */
+	u8 DstCoherent;		/**< Destination coherent */
+	u8 Pause;		/**< Will pause data transmission after
+				  *  this transfer only for SG mode */
+} XZDma_Transfer;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+*
+* This function returns interrupt status read from Interrupt Status Register.
+* Use the XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to interpret the
+* returned value.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	The pending interrupts of the ZDMA core.
+*		Use the masks specified in xzdma_hw.h to interpret
+*		the returned value.
+* @note
+* 		C-style signature:
+*		void XZDma_IntrGetStatus(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_IntrGetStatus(InstancePtr) \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress, XZDMA_CH_ISR_OFFSET)
+
+/*****************************************************************************/
+/**
+*
+* This function clears interrupt(s). Every bit set in Interrupt Status
+* Register indicates that a specific type of interrupt is occurring, and this
+* function clears one or more interrupts by writing a bit mask to Interrupt
+* Clear Register.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Mask is the type of the interrupts to enable. Use OR'ing of
+*		XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
+*		this parameter value.
+*
+* @return	None.
+*
+* @note
+* 		C-style signature:
+*		void XZDma_IntrClear(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_IntrClear(InstancePtr, Mask) \
+	XZDma_WriteReg( (InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_ISR_OFFSET, ((u32)(Mask) & (u32)XZDMA_IXR_ALL_INTR_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function returns interrupt mask to know which interrupts are
+* enabled and which of them were disabled.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	The current interrupt mask. The mask indicates which interrupts
+*		are enabled/disabled.
+*		0 bit represents .....corresponding interrupt is enabled.
+*		1 bit represents .....Corresponding interrupt is disabled.
+*
+* @note
+* 		C-style signature:
+*		void XZDma_GetIntrMask(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_GetIntrMask(InstancePtr) \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress,  \
+			(u32)(XZDMA_CH_IMR_OFFSET))
+
+/*****************************************************************************/
+/**
+*
+* This function enables individual interrupts of the ZDMA core by updating
+* the Interrupt Enable register.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Mask is the type of the interrupts to enable. Use OR'ing of
+*		XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
+*		this parameter value.
+*
+* @return	None.
+*
+* @note		The existing enabled interrupt(s) will remain enabled.
+* 		C-style signature:
+*		void XZDma_EnableIntr(XZDma *InstancePtr, u32 Mask)
+*
+******************************************************************************/
+#define XZDma_EnableIntr(InstancePtr, Mask) \
+	(InstancePtr)->IntrMask = ((InstancePtr)->IntrMask | (Mask))
+
+/*****************************************************************************/
+/**
+*
+* This function disables individual interrupts of the ZDMA core by updating
+* the Interrupt Disable register.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Mask is the type of the interrupts to disable. Use OR'ing of
+*		XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
+*		this parameter value.
+*
+* @return	None.
+*
+* @note		The existing disabled interrupt(s) will remain disabled.
+* 		C-style signature:
+*		void XZDma_DisableIntr(XZDma *InstancePtr, u32 Mask)
+*
+******************************************************************************/
+#define XZDma_DisableIntr(InstancePtr, Mask) \
+	XZDma_WriteReg( (InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_IDS_OFFSET, \
+	((u32)XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_IDS_OFFSET) | ((u32)(Mask) & (u32)XZDMA_IXR_ALL_INTR_MASK)))
+
+/*****************************************************************************/
+/**
+*
+* This function returns source current payload address under process
+* of ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		This address may not be precise due to ZDMA pipeline structure
+*		C-style signature:
+*		u64 XZDma_SrcCurPyld(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_SrcCurPyld(InstancePtr) \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_SRC_CUR_PYLD_LSB_OFFSET)) | \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_SRC_CUR_PYLD_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
+
+/*****************************************************************************/
+/**
+*
+* This function returns destination current payload address under process
+* of ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		This address may not be precise due to ZDMA pipeline structure
+*		C-style signature:
+*		u64 XZDma_DstCurPyld(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_DstCurPyld(InstancePtr) \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_DST_CUR_PYLD_LSB_OFFSET)) | \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_DST_CUR_PYLD_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
+
+/*****************************************************************************/
+/**
+*
+* This function returns source descriptor current payload address under
+* process of ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		This address may not be precise due to ZDMA pipeline structure
+*		C-style signature:
+*		u64 XZDma_SrcDscrCurPyld(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_SrcDscrCurPyld(InstancePtr) \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_SRC_CUR_DSCR_LSB_OFFSET)) | \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_SRC_CUR_DSCR_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
+
+
+/*****************************************************************************/
+/**
+*
+* This function returns destination descriptor current payload address under
+* process of ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		This address may not be precise due to ZDMA pipeline structure
+*		C-style signature:
+*		u64 XZDma_DstDscrCurPyld(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_DstDscrCurPyld(InstancePtr) \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_DST_CUR_DSCR_LSB_OFFSET)) | \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_DST_CUR_DSCR_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
+
+/*****************************************************************************/
+/**
+*
+* This function gets the count of total bytes transferred through core
+* since last clear in ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note
+*		C-style signature:
+*		void XZDma_GetTotalByte(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_GetTotalByte(InstancePtr) \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_TOTAL_BYTE_OFFSET)
+
+/*****************************************************************************/
+/**
+*
+* This function clears the count of total bytes transferred in ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note
+*		C-style signature:
+*		void XZDma_TotalByteClear(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_TotalByteClear(InstancePtr) \
+	XZDma_WriteReg((InstancePtr)->Config.BaseAddress, \
+		XZDMA_CH_TOTAL_BYTE_OFFSET, \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+		XZDMA_CH_TOTAL_BYTE_OFFSET))
+
+/*****************************************************************************/
+/**
+*
+* This function gets the total number of Interrupt count for source after last
+* call of this API.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		Once this API is called then count will become zero.
+*		C-style signature:
+*		void XZDma_GetSrcIntrCnt(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_GetSrcIntrCnt(InstancePtr) \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_IRQ_SRC_ACCT_OFFSET)
+
+/*****************************************************************************/
+/**
+*
+* This function gets the total number of Interrupt count for destination
+* after last call of this API.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		Once this API is called then count will become zero.
+*		C-style signature:
+*		void XZDma_GetDstIntrCnt(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_GetDstIntrCnt(InstancePtr) \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_IRQ_DST_ACCT_OFFSET)
+
+/*****************************************************************************/
+/**
+*
+* This function Enable's the ZDMA core for initiating the data transfer once the
+* data transfer completes it will be automatically disabled.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		None.
+*		C-style signature:
+*		void XZDma_EnableCh(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_EnableCh(InstancePtr) \
+	XZDma_WriteReg((InstancePtr)->Config.BaseAddress, \
+			(XZDMA_CH_CTRL2_OFFSET), (XZDMA_CH_CTRL2_EN_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function Disable's the ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		None.
+*		C-style signature:
+*		void XZDma_DisableCh(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_DisableCh(InstancePtr) \
+	XZDma_WriteReg((InstancePtr)->Config.BaseAddress,\
+		(XZDMA_CH_CTRL2_OFFSET), (XZDMA_CH_CTRL2_DIS_MASK))
+
+/************************ Prototypes of functions **************************/
+
+XZDma_Config *XZDma_LookupConfig(u16 DeviceId);
+
+s32 XZDma_CfgInitialize(XZDma *InstancePtr, XZDma_Config *CfgPtr,
+			u32 EffectiveAddr);
+s32 XZDma_SetMode(XZDma *InstancePtr, u8 IsSgDma, XZDma_Mode Mode);
+u32 XZDma_CreateBDList(XZDma *InstancePtr, XZDma_DscrType TypeOfDscr,
+					UINTPTR Dscr_MemPtr, u32 NoOfBytes);
+s32 XZDma_SetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure);
+void XZDma_GetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure);
+s32 XZDma_SetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure);
+void XZDma_GetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure);
+s32 XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num);
+void XZDma_WOData(XZDma *InstancePtr, u32 *Buffer);
+void XZDma_Resume(XZDma *InstancePtr);
+void XZDma_Reset(XZDma *InstancePtr);
+XZDmaState XZDma_ChannelState(XZDma *InstancePtr);
+
+s32 XZDma_SelfTest(XZDma *InstancePtr);
+
+void XZDma_IntrHandler(void *Instance);
+s32 XZDma_SetCallBack(XZDma *InstancePtr, XZDma_Handler HandlerType,
+	void *CallBackFunc, void *CallBackRef);
+
+/*@}*/
+
+#ifdef __cplusplus
+}
+
+#endif
+
+#endif /* XZDMA_H_ */
+/** @} */
diff --git a/src/Xilinx/include/xzdma_hw.h b/src/Xilinx/include/xzdma_hw.h
new file mode 100644
index 0000000..046921c
--- /dev/null
+++ b/src/Xilinx/include/xzdma_hw.h
@@ -0,0 +1,384 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xzdma_hw.h
+* @addtogroup zdma_v1_5
+* @{
+*
+* This header file contains identifiers and register-level driver functions (or
+* macros) that can be used to access the Xilinx ZDMA core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ------------------------------------------------------
+* 1.0   vns     2/27/15  First release
+* 

+*
+******************************************************************************/
+#ifndef XZDMA_HW_H_
+#define XZDMA_HW_H_		/**< Prevent circular inclusions
+				  *  by using protection macros	*/
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Registers offsets
+ * @{
+ */
+#define XZDMA_ERR_CTRL				(0x000U)
+#define XZDMA_CH_ECO				(0x004U)
+#define XZDMA_CH_ISR_OFFSET			(0x100U)
+#define XZDMA_CH_IMR_OFFSET			(0x104U)
+#define XZDMA_CH_IEN_OFFSET			(0x108U)
+#define XZDMA_CH_IDS_OFFSET			(0x10CU)
+#define XZDMA_CH_CTRL0_OFFSET			(0x110U)
+#define XZDMA_CH_CTRL1_OFFSET			(0x114U)
+#define XZDMA_CH_PERIF_OFFSET			(0x118U)
+#define XZDMA_CH_STS_OFFSET			(0x11CU)
+#define XZDMA_CH_DATA_ATTR_OFFSET		(0x120U)
+#define XZDMA_CH_DSCR_ATTR_OFFSET		(0x124U)
+#define XZDMA_CH_SRC_DSCR_WORD0_OFFSET		(0x128U)
+#define XZDMA_CH_SRC_DSCR_WORD1_OFFSET		(0x12CU)
+#define XZDMA_CH_SRC_DSCR_WORD2_OFFSET		(0x130U)
+#define XZDMA_CH_SRC_DSCR_WORD3_OFFSET		(0x134U)
+#define XZDMA_CH_DST_DSCR_WORD0_OFFSET		(0x138U)
+#define XZDMA_CH_DST_DSCR_WORD1_OFFSET		(0x13CU)
+#define XZDMA_CH_DST_DSCR_WORD2_OFFSET		(0x140U)
+#define XZDMA_CH_DST_DSCR_WORD3_OFFSET		(0x144U)
+#define XZDMA_CH_WR_ONLY_WORD0_OFFSET		(0x148U)
+#define XZDMA_CH_WR_ONLY_WORD1_OFFSET		(0x14CU)
+#define XZDMA_CH_WR_ONLY_WORD2_OFFSET		(0x150U)
+#define XZDMA_CH_WR_ONLY_WORD3_OFFSET		(0x154U)
+#define XZDMA_CH_SRC_START_LSB_OFFSET		(0x158U)
+#define XZDMA_CH_SRC_START_MSB_OFFSET		(0x15CU)
+#define XZDMA_CH_DST_START_LSB_OFFSET		(0x160U)
+#define XZDMA_CH_DST_START_MSB_OFFSET		(0x164U)
+#define XZDMA_CH_SRC_CUR_PYLD_LSB_OFFSET	(0x168U)
+#define XZDMA_CH_SRC_CUR_PYLD_MSB_OFFSET	(0x16CU)
+#define XZDMA_CH_DST_CUR_PYLD_LSB_OFFSET	(0x170U)
+#define XZDMA_CH_DST_CUR_PYLD_MSB_OFFSET	(0x174U)
+#define XZDMA_CH_SRC_CUR_DSCR_LSB_OFFSET	(0x178U)
+#define XZDMA_CH_SRC_CUR_DSCR_MSB_OFFSET	(0x17CU)
+#define XZDMA_CH_DST_CUR_DSCR_LSB_OFFSET	(0x180U)
+#define XZDMA_CH_DST_CUR_DSCR_MSB_OFFSET	(0x184U)
+#define XZDMA_CH_TOTAL_BYTE_OFFSET		(0x188U)
+#define XZDMA_CH_RATE_CNTL_OFFSET		(0x18CU)
+#define XZDMA_CH_IRQ_SRC_ACCT_OFFSET		(0x190U)
+#define XZDMA_CH_IRQ_DST_ACCT_OFFSET		(0x194U)
+#define XZDMA_CH_CTRL2_OFFSET			(0x200U)
+/*@}*/
+
+#define XZDMA_SLCR_SECURE_OFFSET		(0xff4b0024)
+/** @name Interrupt Enable/Disable/Mask/Status registers bit masks and shifts
+ * @{
+ */
+#define XZDMA_IXR_DMA_PAUSE_MASK	(0x00000800U) /**< IXR pause mask */
+#define XZDMA_IXR_DMA_DONE_MASK		(0x00000400U) /**< IXR done mask */
+#define XZDMA_IXR_AXI_WR_DATA_MASK	(0x00000200U) /**< IXR AXI write data
+							*  error mask */
+#define XZDMA_IXR_AXI_RD_DATA_MASK	(0x00000100U) /**< IXR AXI read data
+							*  error mask */
+#define XZDMA_IXR_AXI_RD_DST_DSCR_MASK	(0x00000080U) /**< IXR AXI read
+							*  descriptor error
+							*  mask */
+#define XZDMA_IXR_AXI_RD_SRC_DSCR_MASK	(0x00000040U) /**< IXR AXI write
+							*  descriptor error
+							*  mask */
+#define XZDMA_IXR_DST_ACCT_ERR_MASK	(0x00000020U) /**< IXR DST interrupt
+							*  count overflow
+							*  mask */
+#define XZDMA_IXR_SRC_ACCT_ERR_MASK	(0x00000010U) /**< IXR SRC interrupt
+							*  count overflow
+							*  mask */
+#define XZDMA_IXR_BYTE_CNT_OVRFL_MASK	(0x00000008U) /**< IXR byte count over
+							* flow mask */
+#define XZDMA_IXR_DST_DSCR_DONE_MASK	(0x00000004U) /**< IXR destination
+							*  descriptor done
+							*  mask */
+#define XZDMA_IXR_SRC_DSCR_DONE_MASK	(0x00000002U) /**< IXR source
+							*  descriptor done
+							*  mask */
+#define XZDMA_IXR_INV_APB_MASK		(0x00000001U) /**< IXR invalid APB
+							*  access mask */
+#define XZDMA_IXR_ALL_INTR_MASK		(0x00000FFFU) /**< IXR OR of all the
+							*  interrupts mask */
+#define XZDMA_IXR_DONE_MASK		(0x00000400U) /**< IXR All done mask */
+
+#define XZDMA_IXR_ERR_MASK		(0x00000BF9U) /**< IXR all Error mask*/
+					/**< Or of XZDMA_IXR_AXI_WR_DATA_MASK,
+					  * XZDMA_IXR_AXI_RD_DATA_MASK,
+					  * XZDMA_IXR_AXI_RD_DST_DSCR_MASK,
+					  * XZDMA_IXR_AXI_RD_SRC_DSCR_MASK,
+					  * XZDMA_IXR_INV_APB_MASK,
+					  * XZDMA_IXR_DMA_PAUSE_MASK,
+					  * XZDMA_IXR_BYTE_CNT_OVRFL_MASK,
+					  * XZDMA_IXR_SRC_ACCT_ERR_MASK,
+					  *  XZDMA_IXR_DST_ACCT_ERR_MASK */
+/*@}*/
+
+/** @name Channel Control0 register bit masks and shifts
+ * @{
+ */
+#define XZDMA_CTRL0_OVR_FETCH_MASK	(0x00000080U) /**< Over fetch mask */
+#define XZDMA_CTRL0_POINT_TYPE_MASK	(0x00000040U) /**< Pointer type mask */
+#define XZDMA_CTRL0_MODE_MASK		(0x00000030U) /**< Mode mask */
+#define XZDMA_CTRL0_WRONLY_MASK		(0x00000010U) /**< Write only mask */
+#define XZDMA_CTRL0_RDONLY_MASK		(0x00000020U) /**< Read only mask */
+#define XZDMA_CTRL0_RATE_CNTL_MASK	(0x00000008U) /**< Rate control mask */
+#define XZDMA_CTRL0_CONT_ADDR_MASK	(0x00000004U) /**< Continue address
+							*  specified mask */
+#define XZDMA_CTRL0_CONT_MASK		(0x00000002U) /**< Continue mask */
+
+#define XZDMA_CTRL0_OVR_FETCH_SHIFT	(7U)	/**< Over fetch shift */
+#define XZDMA_CTRL0_POINT_TYPE_SHIFT	(6U)	/**< Pointer type shift */
+#define XZDMA_CTRL0_MODE_SHIFT		(4U)	/**< Mode type shift */
+#define XZDMA_CTRL0_RESET_VALUE		(0x00000080U) /**< CTRL0 reset value */
+
+/*@}*/
+
+/** @name Channel Control1 register bit masks and shifts
+ * @{
+ */
+#define XZDMA_CTRL1_SRC_ISSUE_MASK	(0x0000001FU) /**< Source issue mask */
+#define XZDMA_CTRL1_RESET_VALUE		(0x000003FFU) /**< CTRL1 reset value */
+/*@}*/
+
+/** @name Channel Peripheral register bit masks and shifts
+ * @{
+ */
+#define XZDMA_PERIF_PROG_CELL_CNT_MASK	(0x0000003EU) /**< Peripheral program
+							*  cell count */
+#define XZDMA_PERIF_SIDE_MASK		(0x00000002U) /**< Interface attached
+							* the side mask */
+#define XZDMA_PERIF_EN_MASK		(0x00000001U) /**< Peripheral flow
+							* control mask */
+/*@}*/
+
+/** @name Channel Status register bit masks and shifts
+ * @{
+ */
+#define XZDMA_STS_DONE_ERR_MASK	(0x00000003U) /**< Done with errors mask */
+#define XZDMA_STS_BUSY_MASK	(0x00000002U) /**< ZDMA is busy in transfer
+						*  mask */
+#define XZDMA_STS_PAUSE_MASK	(0x00000001U) /**< ZDMA is in Pause state
+						*  mask */
+#define XZDMA_STS_DONE_MASK	(0x00000000U) /**< ZDMA done mask */
+#define XZDMA_STS_ALL_MASK	(0x00000003U) /**< ZDMA status mask */
+
+/*@}*/
+
+/** @name Channel Data Attribute register bit masks and shifts
+ * @{
+ */
+#define XZDMA_DATA_ATTR_ARBURST_MASK	(0x0C000000U) /**< Data ArBurst mask */
+#define XZDMA_DATA_ATTR_ARCACHE_MASK	(0x03C00000U) /**< Data ArCache mask */
+#define XZDMA_DATA_ATTR_ARQOS_MASK	(0x003C0000U) /**< Data ARQos masks */
+#define XZDMA_DATA_ATTR_ARLEN_MASK	(0x0003C000U) /**< Data Arlen mask */
+#define XZDMA_DATA_ATTR_AWBURST_MASK	(0x00003000U) /**< Data Awburst mask */
+#define XZDMA_DATA_ATTR_AWCACHE_MASK	(0x00000F00U) /**< Data AwCache mask */
+#define XZDMA_DATA_ATTR_AWQOS_MASK	(0x000000F0U) /**< Data AwQos mask */
+#define XZDMA_DATA_ATTR_AWLEN_MASK	(0x0000000FU) /**< Data Awlen mask */
+
+#define XZDMA_DATA_ATTR_ARBURST_SHIFT	(26U) /**< Data Arburst shift */
+#define XZDMA_DATA_ATTR_ARCACHE_SHIFT	(22U) /**< Data ArCache shift */
+#define XZDMA_DATA_ATTR_ARQOS_SHIFT	(18U) /**< Data ARQos shift */
+#define XZDMA_DATA_ATTR_ARLEN_SHIFT	(14U) /**< Data Arlen shift */
+#define XZDMA_DATA_ATTR_AWBURST_SHIFT	(12U) /**< Data Awburst shift  */
+#define XZDMA_DATA_ATTR_AWCACHE_SHIFT	(8U)  /**< Data Awcache shift */
+#define XZDMA_DATA_ATTR_AWQOS_SHIFT	(4U)  /**< Data Awqos shift */
+#define XZDMA_DATA_ATTR_RESET_VALUE	(0x0483D20FU) /**< Data Attributes
+							*  reset value */
+
+/*@}*/
+
+/** @name Channel DSCR Attribute register bit masks and shifts
+ * @{
+ */
+#define XZDMA_DSCR_ATTR_AXCOHRNT_MASK	(0x00000100U) /**< Descriptor coherent
+							*  mask */
+#define XZDMA_DSCR_ATTR_AXCACHE_MASK	(0x000000F0U) /**< Descriptor cache
+							* mask */
+#define XZDMA_DSCR_ATTR_AXQOS_MASK	(0x0000000FU) /**< Descriptor AxQos
+							*  mask */
+
+#define XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT	(8U) /**< Descriptor coherent shift */
+#define XZDMA_DSCR_ATTR_AXCACHE_SHIFT	(4U) /**< Descriptor cache shift */
+#define XZDMA_DSCR_ATTR_RESET_VALUE	(0x00000000U) /**< Dscr Attributes
+							*  reset value */
+
+/*@}*/
+
+/** @name Channel Source/Destination Word0 register bit mask
+ * @{
+ */
+#define XZDMA_WORD0_LSB_MASK	(0xFFFFFFFFU)	/**< LSB Address mask */
+/*@}*/
+
+/** @name Channel Source/Destination Word1 register bit mask
+ * @{
+ */
+#define XZDMA_WORD1_MSB_MASK	(0x0001FFFFU)	/**< MSB Address mask */
+#define XZDMA_WORD1_MSB_SHIFT	(32U)		/**< MSB Address shift */
+/*@}*/
+
+/** @name Channel Source/Destination Word2 register bit mask
+ * @{
+ */
+#define XZDMA_WORD2_SIZE_MASK	(0x3FFFFFFFU) /**< Size mask */
+/*@}*/
+
+/** @name Channel Source/Destination Word3 register bit masks and shifts
+ * @{
+ */
+#define XZDMA_WORD3_CMD_MASK		(0x00000018U)	/**< Cmd mask */
+#define XZDMA_WORD3_CMD_SHIFT		(3U)		/**< Cmd shift */
+#define XZDMA_WORD3_CMD_NXTVALID_MASK	(0x00000000U)	/**< Next Dscr is valid
+							  *  mask */
+#define XZDMA_WORD3_CMD_PAUSE_MASK	(0x00000008U)	/**< Pause after this
+							  * dscr mask */
+#define XZDMA_WORD3_CMD_STOP_MASK	(0x00000010U)	/**< Stop after this
+							..*  dscr mask */
+#define XZDMA_WORD3_INTR_MASK		(0x00000004U)	/**< Interrupt
+							  *  enable or disable
+							  *  mask */
+#define XZDMA_WORD3_INTR_SHIFT		(2U)		/**< Interrupt enable
+							  *  disable
+							  *  shift */
+#define XZDMA_WORD3_TYPE_MASK		(0x00000002U)	/**< Type of Descriptor
+							  *  mask */
+#define XZDMA_WORD3_TYPE_SHIFT		(1U)		/**< Type of Descriptor
+							  *  Shift */
+#define XZDMA_WORD3_COHRNT_MASK		(0x00000001U)	/**< Coherence mask */
+/*@}*/
+
+/** @name Channel Source/Destination start address or current payload
+ *  MSB register bit mask
+ * @{
+ */
+#define XZDMA_START_MSB_ADDR_MASK	(0x0001FFFFU)	/**< Start msb address
+							  *  mask */
+/*@}*/
+
+/** @name Channel Rate control count register bit mask
+ * @{
+ */
+#define XZDMA_CH_RATE_CNTL_MASK		(0x00000FFFU) /**< Channel rate control
+							*  mask */
+/*@}*/
+
+/** @name Channel Source/Destination Interrupt account count register bit mask
+ * @{
+ */
+#define XZDMA_CH_IRQ_ACCT_MASK		(0x000000FFU) /**< Interrupt count
+							*  mask */
+/*@}*/
+
+/** @name Channel debug register 0/1 bit mask
+ * @{
+ */
+#define XZDMA_CH_DBG_CMN_BUF_MASK	(0x000001FFU) /**< Common buffer count
+							* mask */
+/*@}*/
+
+/** @name Channel control2 register bit mask
+ * @{
+ */
+#define XZDMA_CH_CTRL2_EN_MASK		(0x00000001U) /**< Channel enable
+							*  mask */
+#define XZDMA_CH_CTRL2_DIS_MASK		(0x00000000U) /**< Channel disable
+							*  mask */
+/*@}*/
+
+/** @name Channel control2 register bit mask
+ * @{
+ */
+ #define XZDMA_WRITE_TO_CLEAR_MASK	(0x00000000U) /**< Write to clear
+							*  mask */
+ /*@}*/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XZDma_In32		Xil_In32	/**< Input operation */
+#define XZDma_Out32		Xil_Out32	/**< Output operation */
+
+/*****************************************************************************/
+/**
+*
+* This macro reads the given register.
+*
+* @param	BaseAddress is the Xilinx base address of the ZDMA core.
+* @param	RegOffset is the register offset of the register.
+*
+* @return	The 32-bit value of the register.
+*
+* @note		C-style signature:
+*		u32 XZDma_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+******************************************************************************/
+#define XZDma_ReadReg(BaseAddress, RegOffset) \
+		XZDma_In32((BaseAddress) + (u32)(RegOffset))
+
+/*****************************************************************************/
+/**
+*
+* This macro writes the value into the given register.
+*
+* @param	BaseAddress is the Xilinx base address of the ZDMA core.
+* @param	RegOffset is the register offset of the register.
+* @param	Data is the 32-bit value to write to the register.
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XZDma_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+******************************************************************************/
+#define XZDma_WriteReg(BaseAddress, RegOffset, Data) \
+		XZDma_Out32(((BaseAddress) + (u32)(RegOffset)), (u32)(Data))
+
+#ifdef __cplusplus
+}
+
+#endif
+
+#endif /* XZDMA_HW_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/avbuf_v2_1/src/Makefile b/src/Xilinx/libsrc/avbuf_v2_1/src/Makefile
new file mode 100644
index 0000000..2a2195c
--- /dev/null
+++ b/src/Xilinx/libsrc/avbuf_v2_1/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner avbuf_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling avbuf"
+
+avbuf_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: avbuf_includes
+
+avbuf_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf.c b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf.c
new file mode 100644
index 0000000..34e841f
--- /dev/null
+++ b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf.c
@@ -0,0 +1,1092 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xavbuf.c
+ *
+ * This file implements all the functions related to the Video Pipeline of the
+ * DisplayPort Subsystem. See xavbuf.h for the detailed description of the
+ * driver.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   aad  06/24/17 Initial release.
+ * 2.0   aad  10/08/17 Some APIs to use enums instead of Macros.
+ *		       Some bug fixes.
+ * 

+ *
+*******************************************************************************/
+/******************************* Include Files ********************************/
+#include "xavbuf.h"
+#include "xstatus.h"
+
+/**************************** Constant Definitions ****************************/
+const XAVBuf_VideoAttribute XAVBuf_SupportedFormats[XAVBUF_NUM_SUPPORTED];
+
+/******************************************************************************/
+/**
+ * This function sets the scaling factors depending on the source video stream.
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	RegOffset is the register offset of the SF0 register from the
+ *		DP BaseAddress.
+ * @param	Scaling Factors is a pointer to the scaling factors needed for
+ *		scaling colors to 12 BPC.
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static void XAVBuf_SetScalingFactors(XAVBuf *InstancePtr, u32 RegOffset,
+				     u32 *ScalingFactors)
+{
+	u32 Index = 0;
+	for (Index = 0; Index < 3; Index++) {
+		XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+				RegOffset + (Index * 4), ScalingFactors[Index]);
+	}
+
+}
+
+/******************************************************************************/
+/**
+ * This function sets the Layer Control for Video and Graphics layers.
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	RegOffset is the register offset of Video Layer or Graphics
+ *		Layer from the base address
+ * @param	Video is a pointer to the XAVBuf_VideoAttribute struct which
+ *		has been configured for the particular layer
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static void XAVBuf_SetLayerControl(XAVBuf *InstancePtr, u32 RegOffset,
+					   XAVBuf_VideoAttribute *Video)
+{
+	u32 RegVal = 0;
+
+	RegVal = (Video->IsRGB <<
+		  XAVBUF_V_BLEND_LAYER0_CONTROL_RGB_MODE_SHIFT) |
+		  Video->SamplingEn;
+
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, RegOffset, RegVal);
+}
+
+/******************************************************************************/
+/**
+ * This function applies Attributes for Live source(Video/Graphics).
+ *
+ * @param	InstancePtr is an pointer to the XAVBuf Instance.
+ * @param	RegConfig is a register offset for Video or Graphics config
+ *		register
+ * @param	Video is a pointer to the attributes of the video to be applied
+ *
+ * @return	None.
+ *
+ * @note	Live source can be live Video or Live Graphics.
+******************************************************************************/
+static void XAVBuf_SetLiveVideoAttributes(XAVBuf *InstancePtr, u32 RegConfig,
+						XAVBuf_VideoAttribute *Video)
+{
+	u32 RegVal = 0;
+
+	RegVal |= Video->Value << XAVBUF_BUF_LIVE_VID_CFG_FORMAT_SHIFT;
+	RegVal |= Video->BPP/6 - 3;
+	RegVal |= Video->Swap << XAVBUF_BUF_LIVE_VID_CFG_CB_FIRST_SHIFT;
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, RegConfig, RegVal);
+}
+
+/******************************************************************************/
+/**
+ * This function applies Attributes for Non - Live source(Video/Graphics).
+ *
+ * @param	InstancePtr is an pointer to the XAVBuf Instance.
+ * @param	VideoSrc is the source of the Non-Live Video
+ * @param	Video is a pointer to the attributes of the video to be applied
+ *
+ * @return	None.
+ *
+ * @note	Non Live source can be Non Live Video or Non Live Graphics.
+******************************************************************************/
+static void XAVBuf_SetNonLiveVideoAttributes(XAVBuf *InstancePtr, u32 VideoSrc,
+					     XAVBuf_VideoAttribute *Video)
+{
+	u32 RegVal = 0;
+
+	RegVal = XAVBuf_ReadReg(InstancePtr->Config.BaseAddr,
+							XAVBUF_BUF_FORMAT);
+	if(VideoSrc == XAVBUF_VIDSTREAM1_NONLIVE) {
+		RegVal &= ~XAVBUF_BUF_FORMAT_NL_VID_FORMAT_MASK;
+		RegVal |= Video->Value;
+	}
+	else if (VideoSrc == XAVBUF_VIDSTREAM2_NONLIVE_GFX) {
+		RegVal &= ~XAVBUF_BUF_FORMAT_NL_GRAPHX_FORMAT_MASK;
+		RegVal |= (Video->Value) <<
+			XAVBUF_BUF_FORMAT_NL_GRAPHX_FORMAT_SHIFT;
+	}
+
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_BUF_FORMAT,
+			RegVal);
+}
+
+/******************************************************************************/
+/**
+ * This function programs the coeffitients for Color Space Conversion.
+ *
+ * @param	InstancePtr is an pointer to the XAVBuf Instance.
+ * @param	RegOffset is a register offset for Video or Graphics config
+ *		register
+ * @param	Video is a pointer to the XAVBuf_Attribute structure
+ *
+ * @return	None.
+ *
+ * @note	None.
+******************************************************************************/
+static void XAVBuf_InConvertToRGB(XAVBuf *InstancePtr, u32 RegOffset,
+						XAVBuf_VideoAttribute *Video)
+{
+	u16 Index;
+	u16 *CSCMatrix;
+	u16 *OffsetMatrix;
+
+	/* SDTV Coefficients */
+	u16 CSCCoeffs[] = { 0x1000, 0x0000, 0x166F,
+			    0x1000, 0x7A7F, 0x7493,
+			    0x1000, 0x1C5A, 0x0000 };
+	u16 CSCOffset[] = { 0x0000, 0x1800, 0x1800 };
+	u16 RGBCoeffs[] = { 0x1000, 0x0000, 0x0000,
+			    0x0000, 0x1000, 0x0000,
+			    0x0000, 0x0000, 0x1000 };
+	u16 RGBOffset[] = { 0x0000, 0x0000, 0x0000 };
+	if(Video->IsRGB) {
+		CSCMatrix = RGBCoeffs;
+		OffsetMatrix = RGBOffset;
+	}
+	else {
+		CSCMatrix = CSCCoeffs;
+		OffsetMatrix = CSCOffset;
+	}
+	/* Program Colorspace conversion coefficients */
+	for (Index = 9; Index < 12; Index++) {
+		XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+				RegOffset + (Index * 4),
+				OffsetMatrix[Index - 9]);
+	}
+
+	/* Program Colorspace conversion matrix */
+	for (Index = 0; Index < 9; Index++) {
+		XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+				RegOffset + (Index * 4), CSCMatrix[Index]);
+	}
+
+}
+
+/******************************************************************************/
+/**
+ * This function converts the Blender output to the desired output format.
+ *
+ * @param	InstancePtr is an pointer to the XAVBuf Instance.
+ * @param	RegConfig is a register offset for Video or Graphics config
+ *		register
+ * @param	Video is a pointer to the XAVBuf_Attribute structure
+ *
+ * @return	None.
+ *
+ * @note	None.
+******************************************************************************/
+static void XAVBuf_InConvertToOutputFormat(XAVBuf *InstancePtr,
+						XAVBuf_VideoAttribute *Video)
+
+{	u32 Index = 0;
+	u32 RegOffset = XAVBUF_V_BLEND_RGB2YCBCR_COEFF0;
+	u32 ColorOffset = XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET;
+	u8 Value = Video->Value;
+	u16 *MatrixCoeff;
+	u16 *MatrixOffset;
+
+	/* SDTV Coeffitients */
+	u16 CSCCoeffs[] = { 0x04C8, 0x0964, 0x01D3,
+			    0x7D4C, 0x7AB4, 0x0800,
+			    0x0800, 0x7945, 0x7EB5 };
+	u16 CSCOffset[] = { 0x0000, 0x800, 0x800 };
+	u16 RGBCoeffs[] = { 0x1000, 0x0000, 0x0000,
+			    0x0000, 0x1000, 0x0000,
+			    0x0000, 0x0000, 0x1000 };
+	u16 RGBOffset[] = { 0x0000, 0x0000, 0x0000 };
+
+
+	if(Value) {
+		MatrixCoeff = CSCCoeffs;
+		MatrixOffset = CSCOffset;
+
+	}
+	else {
+		MatrixCoeff = RGBCoeffs;
+		MatrixOffset = RGBOffset;
+	}
+
+	for (Index = 0; Index < 9; Index++) {
+		XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+			RegOffset + (Index * 4), MatrixCoeff[Index]);
+	}
+	for (Index = 0; Index < 3; Index++) {
+		XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+			ColorOffset + (Index * 4),
+			(MatrixOffset[Index] <<
+			XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_POST_OFFSET_SHIFT));
+	}
+}
+/******************************************************************************/
+/**
+ * This function configures the Video Pipeline for the selected source
+ *
+ * @param	InstancePtr is an pointer to the XAVBuf Instance.
+ * @param	VideoSrc is a parameter which indicates which Video Source
+ *		selected
+ *
+ * @return	None.
+ *
+ * @note	None.
+******************************************************************************/
+static int XAVBuf_ConfigureVideo(XAVBuf *InstancePtr, u8 VideoSrc)
+{
+
+	u32 RegConfig = 0;
+	u32 ScalingOffset = 0;
+	u32 LayerOffset = 0;
+	u32 CSCOffset = 0;
+	XAVBuf_VideoAttribute *Video = NULL;
+	u32 *ScalingFactors = NULL;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	switch(VideoSrc) {
+		case XAVBUF_VIDSTREAM1_LIVE:
+			RegConfig = XAVBUF_BUF_LIVE_VID_CFG;
+			ScalingOffset = XAVBUF_BUF_LIVE_VID_COMP0_SF;
+			LayerOffset = XAVBUF_V_BLEND_LAYER0_CONTROL;
+			CSCOffset = XAVBUF_V_BLEND_IN1CSC_COEFF0;
+			Video = InstancePtr->AVMode.LiveVideo;
+			ScalingFactors = Video->SF;
+
+			/* Set the Video Attributes */
+			XAVBuf_SetLiveVideoAttributes(InstancePtr, RegConfig,
+						      Video);
+			break;
+
+		case XAVBUF_VIDSTREAM2_LIVE_GFX:
+			RegConfig = XAVBUF_BUF_LIVE_GFX_CFG;
+			ScalingOffset = XAVBUF_BUF_LIVE_GFX_COMP0_SF;
+			LayerOffset = XAVBUF_V_BLEND_LAYER1_CONTROL;
+			CSCOffset = XAVBUF_V_BLEND_IN2CSC_COEFF0;
+			Video = InstancePtr->AVMode.LiveGraphics;
+			ScalingFactors = Video->SF;
+
+			/* Set the Video Attributes */
+			XAVBuf_SetLiveVideoAttributes(InstancePtr, RegConfig,
+						      Video);
+			break;
+
+		case XAVBUF_VIDSTREAM1_NONLIVE:
+			RegConfig = XAVBUF_BUF_LIVE_GFX_CFG;
+			ScalingOffset = XAVBUF_BUF_VID_COMP0_SCALE_FACTOR;
+			LayerOffset = XAVBUF_V_BLEND_LAYER0_CONTROL;
+			CSCOffset = XAVBUF_V_BLEND_IN1CSC_COEFF0;
+			Video = InstancePtr->AVMode.NonLiveVideo;
+			ScalingFactors = Video->SF;
+
+			/* Set the Video Attributes */
+			XAVBuf_SetNonLiveVideoAttributes(InstancePtr, VideoSrc,
+							 Video);
+			break;
+
+		case XAVBUF_VIDSTREAM2_NONLIVE_GFX:
+			RegConfig = XAVBUF_BUF_LIVE_GFX_CFG;
+			ScalingOffset = XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR;
+			LayerOffset = XAVBUF_V_BLEND_LAYER1_CONTROL;
+			CSCOffset = XAVBUF_V_BLEND_IN2CSC_COEFF0;
+			Video = InstancePtr->AVMode.NonLiveGraphics;
+			ScalingFactors = Video->SF;
+
+			/* Set the Video Attributes */
+			XAVBuf_SetNonLiveVideoAttributes(InstancePtr, VideoSrc,
+							 Video);
+			break;
+		case XAVBUF_VIDSTREAM1_TPG:
+			RegConfig |= 1 <<
+				XAVBUF_V_BLEND_LAYER0_CONTROL_RGB_MODE_SHIFT;
+			RegConfig |= 1 <<
+				XAVBUF_V_BLEND_LAYER0_CONTROL_BYPASS_SHIFT;
+			XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+					XAVBUF_V_BLEND_LAYER0_CONTROL,
+					RegConfig);
+			break;
+		default:
+			return XST_FAILURE;
+	}
+	/* Setting the scaling factors */
+	XAVBuf_SetScalingFactors(InstancePtr, ScalingOffset, ScalingFactors);
+	/* Layer Control */
+	XAVBuf_SetLayerControl(InstancePtr, LayerOffset, Video);
+	/* Colorspace conversion */
+	XAVBuf_InConvertToRGB(InstancePtr, CSCOffset, Video);
+	return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function intializes the configuration for the AVBuf Instance.
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	BaseAddr sets the base address of the AVBuf instance
+ * @param	Deviceid is the id of the device from the design.
+ *
+ * @return	None.
+ *
+ * @note	Base address and DeviceId is same as the DP Core driver.
+ *
+*******************************************************************************/
+void XAVBuf_CfgInitialize(XAVBuf *InstancePtr, u32 BaseAddr, u16 DeviceId)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	InstancePtr->Config.DeviceId = DeviceId;
+	InstancePtr->Config.BaseAddr = BaseAddr;
+}
+
+/******************************************************************************/
+/**
+ * This function initializes all the data structures of the XAVBuf Instance.
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+void XAVBuf_Initialize(XAVBuf *InstancePtr)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	InstancePtr->AVMode.NonLiveVideo = NULL;
+	InstancePtr->AVMode.LiveVideo = NULL;
+	InstancePtr->AVMode.LiveGraphics = NULL;
+	InstancePtr->AVMode.NonLiveGraphics = NULL;
+	InstancePtr->AVMode.VideoSrc = XAVBUF_VIDSTREAM1_NONE;
+	InstancePtr->AVMode.GraphicsSrc = XAVBUF_VIDSTREAM2_NONE;
+	InstancePtr->AVMode.Audio = NULL;
+	InstancePtr->AVMode.GraphicsAudio = NULL;
+	InstancePtr->AVMode.AudioSrc1 = XAVBUF_AUDSTREAM1_NO_AUDIO;
+	InstancePtr->AVMode.AudioSrc2 = XAVBUF_AUDSTREAM2_NO_AUDIO;
+
+	InstancePtr->Blender.GlobalAlphaEn = 0;
+	InstancePtr->Blender.Alpha = 0;
+	InstancePtr->Blender.OutputVideo = NULL;
+
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_AUD_SOFT_RST, 0);
+}
+
+/******************************************************************************/
+/**
+ * This function selects the source for the Video and Graphics streams that are
+ * passed on to the blender block.
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	VidStream selects the stream coming from the video sources
+ * @param	GfxStream selects the stream coming from the graphics sources
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+void XAVBuf_InputVideoSelect(XAVBuf *InstancePtr, XAVBuf_VideoStream VidStream,
+			      XAVBuf_GfxStream GfxStream)
+{
+
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((VidStream != XAVBUF_VIDSTREAM1_LIVE) |
+		       (VidStream != XAVBUF_VIDSTREAM1_NONLIVE) |
+		       (VidStream != XAVBUF_VIDSTREAM1_TPG) |
+		       (VidStream != XAVBUF_VIDSTREAM1_NONE));
+	Xil_AssertVoid((GfxStream != XAVBUF_VIDSTREAM2_DISABLEGFX) |
+		       (GfxStream != XAVBUF_VIDSTREAM2_NONLIVE_GFX) |
+		       (GfxStream != XAVBUF_VIDSTREAM2_LIVE_GFX) |
+		       (GfxStream != XAVBUF_VIDSTREAM2_NONE));
+
+	InstancePtr->AVMode.VideoSrc = VidStream;
+	InstancePtr->AVMode.GraphicsSrc = GfxStream;
+	u32 RegVal;
+	RegVal = XAVBuf_ReadReg(InstancePtr->Config.BaseAddr,
+			XAVBUF_BUF_OUTPUT_AUD_VID_SELECT);
+	RegVal &= ~(XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM2_SEL_MASK |
+			XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM1_SEL_MASK);
+	RegVal |= VidStream | GfxStream;
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+			XAVBUF_BUF_OUTPUT_AUD_VID_SELECT, RegVal);
+}
+
+/******************************************************************************/
+/**
+ * This function sets the video format for the non-live video
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	Format is the enum for the non-live video format
+ *
+ * @return	XST_SUCCESS if the correct format has been set.
+ *		XST_FAILURE if the format is invalid.
+ *
+ * @note	None.
+*******************************************************************************/
+int XAVBuf_SetInputNonLiveVideoFormat(XAVBuf *InstancePtr,
+				       XAVBuf_VideoFormat Format)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Format >= CbY0CrY1) | (Format <= YV16Ci2_420_10BPC));
+
+	InstancePtr->AVMode.NonLiveVideo =
+		XAVBuf_GetNLiveVideoAttribute(Format);
+	if(InstancePtr->AVMode.NonLiveVideo == NULL)
+		return XST_FAILURE;
+
+	return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function sets the graphics format for the non-live video
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	Format is the enum for the non-live video format
+ *
+ * @return	XST_SUCCESS if the correct format has been set.
+ *		XST_FAILURE if the format is invalid.
+ *
+ * @note	None.
+*******************************************************************************/
+int XAVBuf_SetInputNonLiveGraphicsFormat(XAVBuf *InstancePtr,
+				       XAVBuf_VideoFormat Format)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Format >= RGBA8888) |( Format <= YOnly));
+
+	InstancePtr->AVMode.NonLiveGraphics =
+		XAVBuf_GetNLGraphicsAttribute(Format);
+	if(InstancePtr->AVMode.NonLiveGraphics == NULL)
+		return XST_FAILURE;
+
+	return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function sets the video format for the live video
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	Format is the enum for the non-live video format
+ *
+ * @return	XST_SUCCESS if the correct format has been set.
+ *		XST_FAILURE if the format is invalid.
+ *
+ * @note	None.
+*******************************************************************************/
+int XAVBuf_SetInputLiveVideoFormat(XAVBuf *InstancePtr,
+				       XAVBuf_VideoFormat Format)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Format >= RGB_6BPC) | (Format <= YOnly_12BPC));
+
+	InstancePtr->AVMode.LiveVideo = XAVBuf_GetLiveVideoAttribute(Format);
+	if(InstancePtr->AVMode.LiveVideo == NULL)
+		return XST_FAILURE;
+
+	return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function sets the graphics format for the live video
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	Format is the enum for the non-live video format
+ *
+ * @return	XST_SUCCESS if the correct format has been set.
+ *		XST_FAILURE if the format is invalid.
+ *
+ * @note	None.
+*******************************************************************************/
+int XAVBuf_SetInputLiveGraphicsFormat(XAVBuf *InstancePtr,
+				       XAVBuf_VideoFormat Format)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Format >= RGB_6BPC) | (Format <= YOnly_12BPC));
+
+	InstancePtr->AVMode.LiveGraphics =
+		XAVBuf_GetLiveVideoAttribute(Format);
+	if(InstancePtr->AVMode.LiveGraphics == NULL)
+		return XST_FAILURE;
+
+	return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function sets the Output Video Format
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	Format is the enum for the non-live video format
+ *
+ * @return	XST_SUCCESS if the correct format has been set.
+ *		XST_FAILURE if the format is invalid.
+ *
+ * @note	None.
+*******************************************************************************/
+int XAVBuf_SetOutputVideoFormat(XAVBuf *InstancePtr, XAVBuf_VideoFormat Format)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Format >= RGB_6BPC) | (Format <= YOnly_12BPC));
+
+	InstancePtr->Blender.OutputVideo =
+		XAVBuf_GetLiveVideoAttribute(Format);
+	if(InstancePtr->Blender.OutputVideo == NULL)
+		return XST_FAILURE;
+	else
+		return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function sets the Audio and Video Clock Source and the video timing
+ * source.
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	VideoClk selects the Video Clock Source
+ * @param	AudioClk selects the Audio Clock Source
+ *
+ * @return	None.
+ *
+ * @note	System uses PL Clock for Video when Live source is in use.
+ *
+*******************************************************************************/
+void XAVBuf_SetAudioVideoClkSrc(XAVBuf *InstancePtr, u8 VideoClk, u8 AudioClk)
+{
+
+	u32 RegVal = 0;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((VideoClk != XAVBUF_PS_CLK) |
+			(VideoClk!= XAVBUF_PL_CLK));
+	Xil_AssertVoid((AudioClk != XAVBUF_PS_CLK) |
+		       (AudioClk!= XAVBUF_PL_CLK));
+
+	if((InstancePtr->AVMode.VideoSrc != XAVBUF_VIDSTREAM1_LIVE) &&
+	   (InstancePtr->AVMode.GraphicsSrc != XAVBUF_VIDSTREAM2_LIVE_GFX)) {
+		RegVal = 1 <<
+			XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_TIMING_SRC_SHIFT;
+	}
+	else if((InstancePtr->AVMode.VideoSrc == XAVBUF_VIDSTREAM1_LIVE) ||
+		(InstancePtr->AVMode.GraphicsSrc ==
+		 XAVBUF_VIDSTREAM2_LIVE_GFX)) {
+		VideoClk = XAVBUF_PL_CLK;
+	}
+
+	RegVal |= (VideoClk <<
+			XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_CLK_SRC_SHIFT) |
+		(AudioClk <<
+			XAVBUF_BUF_AUD_VID_CLK_SOURCE_AUD_CLK_SRC_SHIFT);
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+			XAVBUF_BUF_AUD_VID_CLK_SOURCE, RegVal);
+	/*Soft Reset VideoPipeline when changing the clock source*/
+	XAVBuf_SoftReset(InstancePtr);
+}
+
+/******************************************************************************/
+/**
+ * This function applies a soft reset to the Audio Video pipeline.
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+void XAVBuf_SoftReset(XAVBuf *InstancePtr)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_BUF_SRST_REG,
+					XAVBUF_BUF_SRST_REG_VID_RST_MASK);
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_BUF_SRST_REG, 0);
+}
+
+/******************************************************************************/
+/**
+ * This function looks up if the video format is valid or not for the non-live
+ * video datapath and returns a pointer to the attributes of the video.
+ *
+ * @param	Format takes in the video format for which attributes are being
+ *		requested.
+ *
+ * @return	A pointer to the structure XAVBuf_VideoAttribute if the video
+ *		format is valid, else returns NULL.
+ * @note	None.
+*******************************************************************************/
+XAVBuf_VideoAttribute *XAVBuf_GetLiveVideoAttribute(XAVBuf_VideoFormat Format)
+{
+	u8 Index = 0;
+	XAVBuf_VideoAttribute *VideoAttribute;
+	Xil_AssertNonvoid((Format >= RGB_6BPC) |  (Format <= YOnly_12BPC));
+
+	for (Index = RGB_6BPC; Index <= YOnly_12BPC; Index++) {
+		VideoAttribute = (XAVBuf_VideoAttribute *)
+					&XAVBuf_SupportedFormats[Index];
+		if(Format == VideoAttribute->VideoFormat) {
+			return VideoAttribute;
+		}
+	}
+	return NULL;
+}
+
+/******************************************************************************/
+/**
+ * This function looks up if the video format is valid or not and returns a
+ * pointer to the attributes of the video.
+ *
+ * @param	Format takes in the video format for which attributes are being
+ *		requested.
+ *
+ * @return	A pointer to the structure XAVBuf_VideoAttribute if the video
+ *		format is valid, else returns NULL.
+ * @note	None.
+*******************************************************************************/
+XAVBuf_VideoAttribute *XAVBuf_GetNLiveVideoAttribute(XAVBuf_VideoFormat Format)
+{
+	u8 Index = 0;
+	XAVBuf_VideoAttribute *VideoAttribute;
+
+	Xil_AssertNonvoid((Format >= CbY0CrY1) | (Format <= YV16Ci2_420_10BPC));
+
+	for (Index = CbY0CrY1; Index <= YV16Ci2_420_10BPC; Index++) {
+		VideoAttribute = (XAVBuf_VideoAttribute *)
+					&XAVBuf_SupportedFormats[Index];
+		if(Format == VideoAttribute->VideoFormat) {
+			return VideoAttribute;
+		}
+	}
+	return NULL;
+}
+
+/******************************************************************************/
+/**
+ * This function looks up if the video format is valid or not and returns a
+ * pointer to the attributes of the video.
+ *
+ * @param	Format takes in the video format for which attributes are being
+ *		requested.
+ *
+ * @return	A pointer to the structure XAVBuf_VideoAttribute if the video
+ *		format is valid, else returns NULL.
+ * @note	None.
+*******************************************************************************/
+XAVBuf_VideoAttribute *XAVBuf_GetNLGraphicsAttribute(XAVBuf_VideoFormat Format)
+{
+	u32 Index = 0;
+	XAVBuf_VideoAttribute *VideoAttribute;
+
+	Xil_AssertNonvoid((Format >= RGBA8888) | (Format <= YOnly));
+
+	for(Index = RGBA8888; Index <= YOnly; Index++) {
+		VideoAttribute = (XAVBuf_VideoAttribute *)
+					&XAVBuf_SupportedFormats[Index];
+		if(Format == VideoAttribute->VideoFormat) {
+			return VideoAttribute;
+		}
+	}
+	return NULL;
+}
+
+/******************************************************************************/
+/**
+ * This function configures the Video Pipeline
+ *
+ * @param	InstancePtr is an pointer to the XAVBuf Instance.
+ *
+ * @return	None.
+ *
+ * @note	None.
+******************************************************************************/
+void XAVBuf_ConfigureVideoPipeline(XAVBuf *InstancePtr)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	XAVBuf_ConfigureVideo(InstancePtr, InstancePtr->AVMode.VideoSrc);
+}
+
+/******************************************************************************/
+/**
+ * This function configures the Graphics Pipeline
+ *
+ * @param	InstancePtr is an pointer to the XAVBuf Instance.
+ *
+ * @return	None.
+ *
+ * @note	None.
+******************************************************************************/
+void XAVBuf_ConfigureGraphicsPipeline(XAVBuf *InstancePtr)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	XAVBuf_ConfigureVideo(InstancePtr, InstancePtr->AVMode.GraphicsSrc);
+}
+
+/******************************************************************************/
+/**
+ * This function sets the blender background color
+ *
+ * @param	InstancePtr is an pointer to the XAVBuf Instance.
+ * @param	Color is a pointer to the structure XAVBuf_BlenderBgClr
+ *
+ * @return	None.
+ *
+ * @note	None.
+******************************************************************************/
+void XAVBuf_BlendSetBgColor(XAVBuf *InstancePtr, XAVBuf_BlenderBgClr *Color)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Color != NULL);
+
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_V_BLEND_BG_CLR_0,
+			Color->RCr);
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_V_BLEND_BG_CLR_1,
+			Color->GY);
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_V_BLEND_BG_CLR_2,
+			Color->BCb);
+}
+
+/******************************************************************************/
+/**
+ * This function enables or disables global alpha
+ *
+ * @param	InstancePtr is an pointer to the XAVBuf Instance.
+ * @param	Enable sets a software flag for global alpha
+ * @param	Alpha sets the value for the global alpha blending
+ *
+ * @return	None.
+ *
+ * @note	GlobalAlphaEn = 1, enables the global alpha.
+ *		GlobalAlphaEn = 0, disables the global alpha.
+ *		Alpha = 0, passes stream2
+ *		Alpha = 255, passes stream1
+******************************************************************************/
+void XAVBuf_SetBlenderAlpha(XAVBuf *InstancePtr, u8 Alpha, u8 Enable)
+{
+	u32 RegVal;
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((Enable !=0) | (Enable != 1));
+
+	InstancePtr->Blender.GlobalAlphaEn = Enable;
+	InstancePtr->Blender.Alpha = Alpha;
+
+	RegVal = Enable;
+	RegVal |= Alpha << XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_VALUE_SHIFT;
+
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+			XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG, RegVal);
+}
+
+/******************************************************************************/
+/**
+ * This function configures the Output of the Video Pipeline
+ *
+ * @param	InstancePtr is an pointer to the XAVBuf Instance.
+ * @param	OutputVideo is a pointer to the XAVBuf_VideoAttribute.
+ *
+ * @return	None.
+ *
+ * @note	None.
+******************************************************************************/
+void XAVBuf_ConfigureOutputVideo(XAVBuf *InstancePtr)
+{
+	u32 RegVal = 0;
+	XAVBuf_VideoAttribute *OutputVideo = InstancePtr->Blender.OutputVideo;
+
+	RegVal |= OutputVideo->SamplingEn <<
+			XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_EN_DOWNSAMPLE_SHIFT;
+	RegVal |= OutputVideo->Value;
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+			XAVBUF_V_BLEND_OUTPUT_VID_FORMAT, RegVal);
+
+	XAVBuf_InConvertToOutputFormat(InstancePtr, OutputVideo);
+}
+
+/******************************************************************************/
+/**
+ * This function selects the source for audio streams corresponding to the
+ * Video and Graphics streams that are passed on to the blender
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	AudStream1 selects the audio stream source corresponding to
+ *		the video source selected
+ * @param	AudStream2 selects the audio stream source corresponding to
+ *		the graphics source selected.
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+void XAVBuf_InputAudioSelect(XAVBuf *InstancePtr, XAVBuf_AudioStream1 AudStream1,
+			      XAVBuf_AudioStream2 AudStream2)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((AudStream1 != XAVBUF_AUDSTREAM1_NONLIVE) |
+		       (AudStream1 != XAVBUF_AUDSTREAM1_LIVE) |
+		       (AudStream1 != XAVBUF_AUDSTREAM1_TPG));
+	Xil_AssertVoid((AudStream2 != XAVBUF_AUDSTREAM2_NO_AUDIO) |
+		       (AudStream2 != XAVBUF_AUDSTREAM2_AUDIOGFX));
+
+	u32 RegVal;
+	RegVal = XAVBuf_ReadReg(InstancePtr->Config.BaseAddr,
+			XAVBUF_BUF_OUTPUT_AUD_VID_SELECT);
+	RegVal &= ~(XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM2_SEL_MASK |
+			XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM1_SEL_MASK);
+	RegVal |= AudStream1 | AudStream2;
+
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+			XAVBUF_BUF_OUTPUT_AUD_VID_SELECT, RegVal);
+}
+
+/******************************************************************************/
+/**
+ * This function sets up the scaling factor for Audio Mixer Volume Control.
+ *
+ * @param	InstancePtr is a pointer to the XAVBuf instance.
+ * @param	Channel0Volume is the volume to be set for Audio from Channel0
+ * @param	Channel1Volume is the volume to be set for Audio from Channel1
+ *
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+void XAVBuf_AudioMixerVolumeControl(XAVBuf *InstancePtr, u8 Channel0Volume,
+					u8 Channel1Volume)
+{
+	u32 Val;
+	Xil_AssertVoid(InstancePtr != NULL);
+	Val = Channel1Volume <<
+		XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH1_SHIFT;
+	Val |= Channel0Volume;
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+			XAVBUF_AUD_MIXER_VOLUME_CONTROL, Val);
+}
+
+/******************************************************************************/
+/**
+ * This function resets the Audio Pipe.
+ *
+ * @param	InstancePtr is a  pointer to the XAVBuf Instance.
+ *
+ * @returns	None.
+ *
+ * @note	Needed when non-live audio is disabled.
+ *
+ *
+ ******************************************************************************/
+void XAVBuf_AudioSoftReset(XAVBuf *InstancePtr)
+{
+	u32 RegVal = 0;
+	Xil_AssertVoid(InstancePtr != NULL);
+	RegVal = XAVBuf_ReadReg(InstancePtr->Config.BaseAddr,
+				XAVBUF_AUD_SOFT_RST);
+	RegVal |= XAVBUF_AUD_SOFT_RST_AUD_SRST_MASK;
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_AUD_SOFT_RST,
+			RegVal);
+	RegVal &= ~XAVBUF_AUD_SOFT_RST_AUD_SRST_MASK;
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_AUD_SOFT_RST, 0);
+
+}
+
+/******************************************************************************/
+/**
+ * This function enables End of Line Reset for reduced blanking resolutions.
+ *
+ * @param	InstancePtr is a  pointer to the XAVBuf Instance.
+ * @param	Disable is to be set while using Reduced Blanking Resolutions.
+ *
+ * @returns	None.
+ *
+ * @note	None.
+ *
+ ******************************************************************************/
+void XABuf_LineResetDisable(XAVBuf *InstancePtr, u8 Disable)
+{
+	u32 RegVal = 0;
+	Xil_AssertVoid(InstancePtr != NULL);
+	RegVal = XAVBuf_ReadReg(InstancePtr->Config.BaseAddr,
+				XAVBUF_AUD_SOFT_RST);
+	if(Disable)
+		RegVal |= XAVBUF_AUD_SOFT_RST_LINE_RST_DISABLE_MASK;
+	else
+		RegVal &= ~XAVBUF_AUD_SOFT_RST_LINE_RST_DISABLE_MASK;
+
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_AUD_SOFT_RST,
+			RegVal);
+}
+
+/******************************************************************************/
+/**
+ * This function enables the video channel interface between the DPDMA and the
+ * AVBuf
+ *
+ * @param	InstancePtr is a  pointer to the XAVBuf Instance.
+ * @param	Enable sets the corresponding buffers.
+ *
+ * @returns	None.
+ *
+ * @note	None.
+ *
+ ******************************************************************************/
+void XAVBuf_EnableVideoBuffers(XAVBuf *InstancePtr, u8 Enable)
+{
+	u8 Index;
+	u32 RegVal = 0;
+	u8 NumPlanes = InstancePtr->AVMode.NonLiveVideo->Mode;
+
+	RegVal = (0xF << XAVBUF_CHBUF0_BURST_LEN_SHIFT) |
+		(XAVBUF_CHBUF0_FLUSH_MASK);
+
+	for (Index = 0; Index <= NumPlanes; Index++) {
+		XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+				XAVBUF_CHBUF0 + (Index * 4), RegVal);
+	}
+	if(Enable) {
+		RegVal = (0xF << XAVBUF_CHBUF0_BURST_LEN_SHIFT) |
+		XAVBUF_CHBUF0_EN_MASK;
+		for (Index = 0; Index <= NumPlanes; Index++) {
+			XAVBuf_WriteReg(InstancePtr->Config.BaseAddr,
+					XAVBUF_CHBUF0 + (Index * 4), RegVal);
+		}
+	}
+}
+/******************************************************************************/
+/**
+ * This function enables the graphics interface between the DPDMA and the AVBuf.
+ *
+ * @param	InstancePtr is a  pointer to the XAVBuf Instance.
+ * @param	Enable sets the corresponding buffers.
+ *
+ * @returns	None.
+ *
+ * @note	None.
+ *
+ ******************************************************************************/
+void XAVBuf_EnableGraphicsBuffers(XAVBuf *InstancePtr, u8 Enable)
+{
+	u32 RegVal = 0;
+
+	RegVal = (0xF << XAVBUF_CHBUF3_BURST_LEN_SHIFT) |
+		XAVBUF_CHBUF3_FLUSH_MASK;
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_CHBUF3, RegVal);
+	if(Enable) {
+		RegVal = (0xF << XAVBUF_CHBUF3_BURST_LEN_SHIFT) |
+			XAVBUF_CHBUF0_EN_MASK;
+		XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_CHBUF3,
+				RegVal);
+	}
+}
+
+/******************************************************************************/
+/**
+ * This function enables the audio interface between the DPDMA and the AVBuf
+ *
+ * @param	InstancePtr is a  pointer to the XAVBuf Instance.
+ * @param	Enable sets the corresponding buffers.
+ *
+ * @returns	None.
+ *
+ * @note	None.
+ *
+ ******************************************************************************/
+void XAVBuf_EnableAudio0Buffers(XAVBuf *InstancePtr, u8 Enable)
+{
+	u32 RegVal = 0;
+
+	RegVal = (0x3 << XAVBUF_CHBUF4_BURST_LEN_SHIFT) |
+		XAVBUF_CHBUF4_FLUSH_MASK;
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_CHBUF4, RegVal);
+	if(Enable) {
+		RegVal = (0x3 << XAVBUF_CHBUF4_BURST_LEN_SHIFT) |
+			XAVBUF_CHBUF4_EN_MASK;
+		XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_CHBUF4,
+				RegVal);
+	}
+}
+
+/******************************************************************************/
+/**
+ * This function enables the audio interface between the DPDMA and the AVBuf
+ *
+ * @param	InstancePtr is a  pointer to the XAVBuf Instance.
+ * @param	Enable sets the corresponding buffers.
+ *
+ * @returns	None.
+ *
+ * @note	None.
+ *
+ ******************************************************************************/
+void XAVBuf_EnableAudio1Buffers(XAVBuf *InstancePtr, u8 Enable)
+{
+	u32 RegVal = 0;
+
+	RegVal = (0x3 << XAVBUF_CHBUF5_BURST_LEN_SHIFT) |
+		XAVBUF_CHBUF5_FLUSH_MASK;
+	XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_CHBUF5, RegVal);
+	if(Enable) {
+		RegVal = (0x3 << XAVBUF_CHBUF5_BURST_LEN_SHIFT) |
+			XAVBUF_CHBUF5_EN_MASK;
+		XAVBuf_WriteReg(InstancePtr->Config.BaseAddr, XAVBUF_CHBUF5,
+				RegVal);
+	}
+}
diff --git a/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf.h b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf.h
new file mode 100644
index 0000000..386bfba
--- /dev/null
+++ b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf.h
@@ -0,0 +1,302 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xavbuf.h
+ *
+ * This file implements all the functions related to the Video Pipeline of the
+ * DisplayPort Subsystem.
+ *
+ * Features supported by this driver
+ *	- Live Video and Graphics input.
+ *	- Non-Live Video Graphics input.
+ *	- Output Formats Supported - RGB, YUV444, YUV4222.
+ *
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   aad  06/24/17 Initial release.
+ * 2.0   aad  10/07/17 Added Enums for Video and Audio sources.
+ * 

+ *
+*******************************************************************************/
+#ifndef XAVBUF_H_
+/* Prevent circular inclusions by using protection macros. */
+#define XAVBUF_H_
+
+
+/******************************* Include Files ********************************/
+#include "xavbuf_hw.h"
+#include "sleep.h"
+/****************************** Type Definitions ******************************/
+/**
+ * This typedef describes all the Video Formats supported by the driver
+ */
+typedef enum {
+	//Non-Live Video Formats
+	CbY0CrY1,
+	CrY0CbY1,
+	Y0CrY1Cb,
+	Y0CbY1Cr,
+	YV16,
+	YV24,
+	YV16Ci,
+	MONOCHROME,
+	YV16Ci2,
+	YUV444,
+	RGB888,
+	RGBA8880,
+	RGB888_10BPC,
+	YUV444_10BPC,
+	YV16Ci2_10BPC,
+	YV16Ci_10BPC,
+	YV16_10BPC,
+	YV24_10BPC,
+	MONOCHROME_10BPC,
+	YV16_420,
+	YV16Ci_420,
+	YV16Ci2_420,
+	YV16_420_10BPC,
+	YV16Ci_420_10BPC,
+	YV16Ci2_420_10BPC,
+
+	// Non-Live Graphics formats
+	RGBA8888,
+	ABGR8888,
+	RGB888_GFX,
+	BGR888,
+	RGBA5551,
+	RGBA4444,
+	RGB565,
+	BPP8,
+	BPP4,
+	BPP2,
+	BPP1,
+	YUV422,
+	YOnly,
+
+	//Live Input/Output Video/Graphics Formats
+	RGB_6BPC,
+	RGB_8BPC,
+	RGB_10BPC,
+	RGB_12BPC,
+	YCbCr444_6BPC,
+	YCbCr444_8BPC,
+	YCbCr444_10BPC,
+	YCbCr444_12BPC,
+	YCbCr422_8BPC,
+	YCbCr422_10BPC,
+	YCbCr422_12BPC,
+	YOnly_8BPC,
+	YOnly_10BPC,
+	YOnly_12BPC,
+} XAVBuf_VideoFormat;
+
+/**
+ * This data structure describes video planes.
+ */
+typedef enum {
+	Interleaved,
+	SemiPlanar,
+	Planar
+} XAVBuf_VideoModes;
+
+/**
+ * This typedef describes the video source list
+ */
+typedef enum {
+	XAVBUF_VIDSTREAM1_LIVE,
+	XAVBUF_VIDSTREAM1_NONLIVE,
+	XAVBUF_VIDSTREAM1_TPG,
+	XAVBUF_VIDSTREAM1_NONE,
+} XAVBuf_VideoStream;
+
+/**
+ * This typedef describes the graphics source list
+ */
+typedef enum {
+	XAVBUF_VIDSTREAM2_DISABLEGFX = 0x0,
+	XAVBUF_VIDSTREAM2_NONLIVE_GFX = 0x4,
+	XAVBUF_VIDSTREAM2_LIVE_GFX = 0x8,
+	XAVBUF_VIDSTREAM2_NONE = 0xC0,
+} XAVBuf_GfxStream;
+
+/**
+ * This typedef describes the audio stream 1 source list
+ */
+typedef enum {
+	XAVBUF_AUDSTREAM1_LIVE = 0x00,
+	XAVBUF_AUDSTREAM1_NONLIVE = 0x10,
+	XAVBUF_AUDSTREAM1_TPG = 0x20,
+	XAVBUF_AUDSTREAM1_NO_AUDIO = 0x30,
+} XAVBuf_AudioStream1;
+
+/**
+ * This typedef describes the audio stream 2 source list
+ */
+typedef enum {
+	XAVBUF_AUDSTREAM2_NO_AUDIO = 0X00,
+	XAVBUF_AUDSTREAM2_AUDIOGFX = 0X40,
+} XAVBuf_AudioStream2;
+
+/**
+ * This typedef describes the attributes associated with the video formats.
+ */
+typedef struct {
+	XAVBuf_VideoFormat VideoFormat;
+	u8 Value;
+	XAVBuf_VideoModes Mode;
+	u32 SF[3];
+	u8 SamplingEn;
+	u8 IsRGB;
+	u8 Swap;
+	u8 BPP;
+} XAVBuf_VideoAttribute;
+
+/**
+ * This typedef stores the attributes of an audio stream
+ */
+typedef struct {
+	u32 Volume;
+	u8 SwapLR;
+} XAVBuf_AudioAttribute;
+
+/**
+ * This typedef stores the data associated with the Audio Video input modes.
+ */
+typedef struct {
+	XAVBuf_VideoAttribute *NonLiveVideo, *NonLiveGraphics;
+	XAVBuf_VideoAttribute *LiveVideo, *LiveGraphics;
+	XAVBuf_AudioAttribute *Audio, *GraphicsAudio;
+	XAVBuf_VideoStream VideoSrc;
+        XAVBuf_GfxStream GraphicsSrc;
+	XAVBuf_AudioStream1 AudioSrc1;
+	XAVBuf_AudioStream2 AudioSrc2;
+	u8 AudioClk, VideoClk;
+} XAVBuf_AVModes;
+
+/**
+ * This structure stores the background color information.
+ */
+typedef struct {
+	u16 RCr;
+	u16 GY;
+	u16 BCb;
+} XAVBuf_BlenderBgClr;
+
+/**
+ * This typedef stores the AVBuf Configuration information.
+ */
+typedef struct {
+	u16 DeviceId;
+	u32 BaseAddr;
+} XAVBuf_Config;
+
+/**
+ * This typedef stores all the attributes associated to the Blender block of the
+ * DisplayPort Subsystem
+ */
+typedef struct {
+	u8 GlobalAlphaEn;
+	u8 Alpha;
+	XAVBuf_VideoAttribute *OutputVideo;
+} XAVBuf_Blender;
+
+/**
+ * The XAVBuf driver instance data. The user is required to allocate a variable
+ * of this type for every XAVBUF instance in the system. A pointer to this type
+ * is then passed to the driver API functions
+ */
+typedef struct {
+	XAVBuf_Config Config;
+	XAVBuf_AVModes AVMode;
+	XAVBuf_Blender Blender;
+} XAVBuf;
+
+
+/**************************** Function Prototypes *****************************/
+
+/* xavbuf.c: Setup and initialization functions. */
+void XAVBuf_CfgInitialize(XAVBuf *InstancePtr, u32 BaseAddr, u16 DeviceId);
+
+/* xavbuf.c: Functions to setup the Input Video and Audio sources */
+void XAVBuf_InputVideoSelect(XAVBuf *InstancePtr, XAVBuf_VideoStream VidStream,
+			      XAVBuf_GfxStream GfxStream);
+void XAVBuf_InputAudioSelect(XAVBuf *InstancePtr, XAVBuf_AudioStream1 AudStream,
+				XAVBuf_AudioStream2 AudioStream2);
+
+/* xavbuf.c: Functions to setup the Video Format attributes */
+int XAVBuf_SetInputNonLiveVideoFormat(XAVBuf *InstancePtr,
+				       XAVBuf_VideoFormat Format);
+int XAVBuf_SetInputNonLiveGraphicsFormat(XAVBuf *InstancePtr,
+				       XAVBuf_VideoFormat Format);
+int XAVBuf_SetInputLiveVideoFormat(XAVBuf *InstancePtr,
+				       XAVBuf_VideoFormat Format);
+int XAVBuf_SetInputLiveGraphicsFormat(XAVBuf *InstancePtr,
+				       XAVBuf_VideoFormat Format);
+int XAVBuf_SetOutputVideoFormat(XAVBuf *InstancePtr, XAVBuf_VideoFormat Format);
+XAVBuf_VideoAttribute *XAVBuf_GetLiveVideoAttribute(XAVBuf_VideoFormat Format);
+XAVBuf_VideoAttribute *XAVBuf_GetNLiveVideoAttribute(XAVBuf_VideoFormat Format);
+XAVBuf_VideoAttribute *XAVBuf_GetNLGraphicsAttribute(XAVBuf_VideoFormat Format);
+
+/* xavbuf.c: Functions to setup the clock sources for video and audio */
+void XAVBuf_SetAudioVideoClkSrc(XAVBuf *InstancePtr, u8 VideoClk, u8 AudioClk);
+
+/* xavbuf.c: Functions that setup Video and Graphics pipeline depending on the
+ * sources and format selected.
+ */
+void XAVBuf_ConfigureVideoPipeline(XAVBuf *InstancePtr);
+void XAVBuf_ConfigureGraphicsPipeline(XAVBuf *InstancePtr);
+
+/* Functions to setup Blender Properties */
+void XAVBuf_BlendSetBgColor(XAVBuf *InstancePtr, XAVBuf_BlenderBgClr *Color);
+void XAVBuf_SetBlenderAlpha(XAVBuf *InstancePtr, u8 Alpha, u8 Enable);
+void XAVBuf_SoftReset(XAVBuf *InstancePtr);
+void XABuf_LineResetDisable(XAVBuf *InstancePtr, u8 Disable);
+void XAVBuf_ConfigureOutputVideo(XAVBuf *InstancePtr);
+
+/* Audio Configuration functions */
+void XAVBuf_AudioSoftReset(XAVBuf *InstancePtr);
+void XAVBuf_AudioMixerVolumeControl(XAVBuf *InstancePtr, u8 Channel0Volume,
+					u8 Channel1Volume);
+
+/* DPDMA Interface functions */
+void XAVBuf_EnableGraphicsBuffers(XAVBuf *InstancePtr, u8 Enable);
+void XAVBuf_EnableVideoBuffers(XAVBuf *InstancePtr, u8 Enable);
+void XAVBuf_EnableAudio0Buffers(XAVBuf *InstancePtr, u8 Enable);
+void XAVBuf_EnableAudio1Buffers(XAVBuf *InstancePtr, u8 Enable);
+
+#endif //XAVBUF_H_
diff --git a/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_clk.c b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_clk.c
new file mode 100644
index 0000000..6ef5d70
--- /dev/null
+++ b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_clk.c
@@ -0,0 +1,561 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xavbuf.c
+ *
+ * This header file contains PLL configuring functions. These Functions
+ * calculates and configures the PLL depending on desired frequency.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   mh  06/24/17 Initial release.
+ * 2.1   tu  12/29/17 LPD and FPD offsets adjusted
+ * 

+ *
+*******************************************************************************/
+/******************************* Include Files ********************************/
+#include "xavbuf_clk.h"
+
+/**************************** Constant Definitions ****************************/
+/*Input Frequency for the PLL with precision upto two decimals*/
+#define XAVBUF_INPUT_REF_CLK		3333333333
+
+/*Frequency of VCO before divider to meet jitter requirement*/
+#define XAVBUF_PLL_OUT_FREQ		1450000000
+
+/* Precision of Input Ref Frequency for PLL*/
+#define XAVBUF_INPUT_FREQ_PRECISION	100
+
+/* 16 bit  fractional shift to get Integer */
+#define XAVBUF_PRECISION		16
+#define XAVBUF_SHIFT_DECIMAL		(1 <<  XAVBUF_PRECISION)
+#define XAVBUF_DECIMAL			(XAVBUF_SHIFT_DECIMAL - 1)
+#define XDPSSU_MAX_VIDEO_FREQ		300000000
+
+#define XAVBUF_AUDIO_SAMPLES		512
+#define XAVBUF_AUDIO_SAMPLE_RATE_44_1	44100
+#define XAVBUF_AUDIO_SAMPLE_RATE_48_0	48000
+#define XAVBUF_EXTERNAL_DIVIDER		2
+
+/* Register offsets for address manipulation */
+#define XAVBUF_REG_OFFSET		4
+#define XAVBUF_FPD_CTRL_OFFSET          12
+#define XAVBUF_LPD_CTRL_OFFSET          16
+#define MOD_3(a)			((a) % (3))
+
+/*************************** Constant Variable Definitions ********************/
+/**
+ * This typedef enumerates capacitor resistor and lock values to be programmed.
+ */
+typedef struct{
+	u16 cp;
+	u16 res;
+	u16 lfhf;
+	u16 lock_dly;
+	u16 lock_cnt;
+}PllConfig;
+
+/* PLL fractional divide programming table*/
+static const PllConfig PllFracDivideTable[] = {
+		{3,	5,	3,	63,	1000},
+		{3,	5,	3,	63,	1000},
+		{3,	9,	3,	63,	1000},
+		{3,	9,	3,	63,	1000},
+		{3,	9,	3,	63,	1000},
+		{3,	9,	3,	63,	1000},
+		{3,	14,	3,	63,	1000},
+		{3,	14,	3,	63,	1000},
+		{3,	14,	3,	63,	1000},
+		{3,	14,	3,	63,	1000},
+		{3,	14,	3,	63,	1000},
+		{3,	14,	3,	63,	1000},
+		{3,	14,	3,	63,	1000},
+		{3,	14,	3,	63,	975},
+		{3,	14,	3,	63,	950},
+		{3,	14,	3,	63,	925},
+		{3,	1,	3,	63,	900},
+		{3,	1,	3,	63,	875},
+		{3,	1,	3,	63,	850},
+		{3,	1,	3,	63,	850},
+		{3,	1,	3,	63,	825},
+		{3,	1,	3,	63,	800},
+		{3,	1,	3,	63,	775},
+		{3,	6,	3,	63,	775},
+		{3,	6,	3,	63,	750},
+		{3,	6,	3,	63,	725},
+		{3,	6,	3,	63,	700},
+		{3,	6,	3,	63,	700},
+		{3,	6,	3,	63,	675},
+		{3,	6,	3,	63,	675},
+		{3,	6,	3,	63,	650},
+		{3,	6,	3,	63,	650},
+		{3,	6,	3,	63,	625},
+		{3,	6,	3,	63,	625},
+		{3,	6,	3,	63,	625},
+		{3,	6,	3,	63,	600},
+		{3,	6,	3,	63,	600},
+		{3,	6,	3,	63,	600},
+		{3,	6,	3,	63,	600},
+		{3,	6,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{3,	10,	3,	63,	600},
+		{4,	6,	3,	63,	600},
+		{4,	6,	3,	63,	600},
+		{4,	6,	3,	63,	600},
+		{4,	6,	3,	63,	600},
+		{4,	6,	3,	63,	600},
+		{4,	6,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600},
+		{3,	12,	3,	63,	600}
+};
+
+/******************************************************************************/
+/**
+ * This function initializes the parameters required to configure PLL.
+ *
+ * @param	PllInstancePtr is pointer to the XAVBuf_Pll instance.
+ * @param	Pll is the PLL chosen to be configured.
+ * @param	Pll is the PLL chosen to be configured.
+ * @param	CrossDomain is the bool which is used to mention if the PLL
+ *		outputs in other domain.
+ * @param	ExtDividerCnt is number of external divider out of VCO.
+ *
+ * @return	XST_SUCCESS if PLL is configured without an error.
+ *		XST_FAILURE otherwise.
+ *
+ * @note	In order to avoid floating point usage we have a 16bit
+ *		fractional fixed point arithmetic implementation
+ *
+*******************************************************************************/
+static void XAVBuf_PllInitialize(XAVBuf_Pll *PllInstancePtr,
+				     u8 Pll, u8 CrossDomain , u8 ExtDividerCnt)
+{
+	/* Instantiate input frequency. */
+	PllInstancePtr->InputRefClk = XAVBUF_Pss_Ref_Clk;
+	PllInstancePtr->RefClkFreqhz = XAVBUF_INPUT_REF_CLK;
+	/* Turn on internal Divider*/
+	PllInstancePtr->Divider = 1;
+	PllInstancePtr->Pll = Pll;
+	PllInstancePtr->ExtDividerCnt = ExtDividerCnt;
+
+	//Check if CrossDomain is requested
+	if(CrossDomain)
+		PllInstancePtr->DomainSwitchDiv = 6;
+	else
+		PllInstancePtr->DomainSwitchDiv = 1;
+	//Check where PLL falls
+	if (Pll>2){
+		PllInstancePtr->Fpd = 0;
+		PllInstancePtr->BaseAddress = XAVBUF_CLK_LPD_BASEADDR;
+		PllInstancePtr->Offset = XAVBUF_LPD_CTRL_OFFSET;
+	}
+	else{
+		PllInstancePtr->Fpd = 1;
+		PllInstancePtr->BaseAddress = XAVBUF_CLK_FPD_BASEADDR;
+		PllInstancePtr->Offset = XAVBUF_FPD_CTRL_OFFSET;
+	}
+
+}
+
+/******************************************************************************/
+/**
+ * This function calculates the parameters which are required to configure PLL
+ * depending upon the requested frequency.
+ *
+ * @param	PllInstancePtr is pointer to the XAVBuf_Pll instance
+ * @param	FreqHz is the requested frequency to  DP in Hz
+ *
+ * @return	XST_SUCCESS if parameters are calculated
+ *		XST_FAILURE otherwise.
+ *
+ * @note	In order to avoid floating point usage we have a 16bit
+ *		fractional fixed point arithmetic implementation
+ *
+*******************************************************************************/
+static int XAVBuf_PllCalcParameterValues(XAVBuf_Pll *PllInstancePtr,
+				     u64 FreqHz)
+{
+	u64 ExtDivider, Vco, VcoIntFrac;
+
+	/* Instantiate input frequency. */
+	PllInstancePtr->InputRefClk =  XAVBUF_Pss_Ref_Clk;
+	PllInstancePtr->RefClkFreqhz =  XAVBUF_INPUT_REF_CLK ;
+	/* Turn on internal Divider*/
+	PllInstancePtr->Divider = 1;
+	PllInstancePtr->DomainSwitchDiv = 1;
+
+	/* Estimate the total divider. */
+	ExtDivider =  (XAVBUF_PLL_OUT_FREQ / FreqHz) /
+			      PllInstancePtr->DomainSwitchDiv;
+	if(ExtDivider > 63 && PllInstancePtr->ExtDividerCnt == 2){
+		PllInstancePtr->ExtDivider0 = 63;
+		PllInstancePtr->ExtDivider1 = ExtDivider / 63;
+	}
+	else if(ExtDivider < 63){
+		PllInstancePtr->ExtDivider0 = ExtDivider;
+		PllInstancePtr->ExtDivider1 = 1;
+	}
+	else
+		return XST_FAILURE;
+
+	Vco = FreqHz *(PllInstancePtr->ExtDivider1 *
+		PllInstancePtr->ExtDivider0 * 2) *
+		PllInstancePtr->DomainSwitchDiv;
+	/* Calculate integer and fractional part. */
+	VcoIntFrac = (Vco * XAVBUF_INPUT_FREQ_PRECISION *
+		XAVBUF_SHIFT_DECIMAL) /
+		PllInstancePtr->RefClkFreqhz  ;
+	PllInstancePtr->Fractional = VcoIntFrac &  XAVBUF_DECIMAL;
+	PllInstancePtr->FracIntegerFBDIV = VcoIntFrac >> XAVBUF_PRECISION;
+
+	return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function will Read modify and write into corresponding registers.
+ *
+ * @param	BaseAddress is the base address to which the value has to be
+ *		written.
+ * @param	RegOffset is the relative offset from Base address.
+ * @param	Mask is used to select the number of bits to be modified.
+ * @param	Shift is the number bits to be shifted from LSB.
+ * @param	Data is the Data to be written.
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static void XAVBuf_ReadModifyWriteReg(u32 BaseAddress, u32 RegOffset, u32 Mask,
+				      u32 Shift, u32 Data)
+{
+	u32 RegValue;
+
+	RegValue = XAVBuf_ReadReg(BaseAddress, RegOffset);
+	RegValue = (RegValue & ~Mask) | (Data << Shift);
+	XAVBuf_WriteReg(BaseAddress, RegOffset, RegValue);
+}
+
+/******************************************************************************/
+/**
+ * This function configures PLL.
+ *
+ * @param	PllInstancePtr is pointer to the XAVBuf_Pll instance.
+ *
+ * @return	XST_SUCCESS if PLL is configured without an error.
+ *		XST_FAILURE otherwise.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static int  XAVBuf_ConfigurePll(XAVBuf_Pll *PllInstancePtr)
+{
+	u64 BaseAddress = PllInstancePtr->BaseAddress;
+	u64 timer = 0;
+	u32 RegPll = 0;
+	u8 Pll = PllInstancePtr->Pll;
+
+	RegPll |= XAVBUF_ENABLE_BIT << XAVBUF_PLL_CTRL_BYPASS_SHIFT;
+	RegPll |= PllInstancePtr->FracIntegerFBDIV <<
+		XAVBUF_PLL_CTRL_FBDIV_SHIFT;
+	RegPll |= PllInstancePtr->Divider << XAVBUF_PLL_CTRL_DIV2_SHIFT;
+	RegPll |= PllInstancePtr->InputRefClk << XAVBUF_PLL_CTRL_PRE_SRC_SHIFT;
+	XAVBuf_WriteReg(BaseAddress, XAVBUF_PLL_CTRL + (MOD_3(Pll) *
+		PllInstancePtr->Offset), RegPll);
+	RegPll = 0;
+	/* Set the values for lock dly, lock counter, capacitor and resistor. */
+	RegPll |=
+		PllFracDivideTable[PllInstancePtr->FracIntegerFBDIV -25].cp
+		<< XAVBUF_PLL_CFG_CP_SHIFT;
+	RegPll |=
+		PllFracDivideTable[PllInstancePtr->FracIntegerFBDIV -25].res
+		<< XAVBUF_PLL_CFG_RES_SHIFT;
+	RegPll |=
+		PllFracDivideTable[PllInstancePtr->FracIntegerFBDIV -25].lfhf
+		<< XAVBUF_PLL_CFG_LFHF_SHIFT;
+	RegPll |=
+		PllFracDivideTable[PllInstancePtr->FracIntegerFBDIV -25].lock_dly
+		<< XAVBUF_PLL_CFG_LOCK_DLY_SHIFT;
+	RegPll |=
+		PllFracDivideTable[PllInstancePtr->FracIntegerFBDIV -25].lock_cnt
+		<< XAVBUF_PLL_CFG_LOCK_CNT_SHIFT;
+	XAVBuf_WriteReg(BaseAddress, XAVBUF_PLL_CFG + (MOD_3(Pll) *
+		PllInstancePtr->Offset), RegPll);
+	/* Enable and set Fractional Data. */
+	XAVBuf_WriteReg(BaseAddress, XAVBUF_PLL_FRAC_CFG + (MOD_3(Pll) *
+		PllInstancePtr->Offset), (1 << XAVBUF_PLL_FRAC_CFG_ENABLED_SHIFT) |
+		(PllInstancePtr->Fractional <<
+		XAVBUF_PLL_FRAC_CFG_DATA_SHIFT));
+	/* Assert reset to the PLL. */
+	XAVBuf_ReadModifyWriteReg(BaseAddress, XAVBUF_PLL_CTRL + (MOD_3(Pll) *
+		PllInstancePtr->Offset),
+		XAVBUF_PLL_CTRL_RESET_MASK, XAVBUF_PLL_CTRL_RESET_SHIFT,
+		XAVBUF_ENABLE_BIT);
+
+	/* Deassert reset to the PLL. */
+	XAVBuf_ReadModifyWriteReg(BaseAddress, XAVBUF_PLL_CTRL + (MOD_3(Pll) *
+		PllInstancePtr->Offset),
+		XAVBUF_PLL_CTRL_RESET_MASK, XAVBUF_PLL_CTRL_RESET_SHIFT,
+		XAVBUF_DISABLE_BIT);
+
+	while(!(XAVBuf_ReadReg(BaseAddress, XAVBUF_PLL_STATUS -
+		((1 - PllInstancePtr->Fpd) * XAVBUF_REG_OFFSET)) &
+		(1 << MOD_3(Pll))))
+		if(++timer > 1000)
+			return XST_FAILURE;
+
+	/* Deassert Bypass. */
+	XAVBuf_ReadModifyWriteReg(BaseAddress, XAVBUF_PLL_CTRL + (MOD_3(Pll) *
+		PllInstancePtr->Offset),
+		XAVBUF_PLL_CTRL_BYPASS_MASK, XAVBUF_PLL_CTRL_BYPASS_SHIFT,
+		XAVBUF_DISABLE_BIT);
+
+	if(PllInstancePtr->DomainSwitchDiv != 1)
+		XAVBuf_ReadModifyWriteReg(BaseAddress, (XAVBUF_DOMAIN_SWITCH_CTRL
+		+ (MOD_3(Pll) * XAVBUF_REG_OFFSET) - ((1 - PllInstancePtr->Fpd)
+		* XAVBUF_REG_OFFSET)),
+		XAVBUF_DOMAIN_SWITCH_DIVISOR0_MASK,
+		XAVBUF_DOMAIN_SWITCH_DIVISOR0_SHIFT,
+		PllInstancePtr->DomainSwitchDiv);
+	usleep(1);
+
+	return XST_SUCCESS;
+
+}
+
+/******************************************************************************/
+/**
+ * This function configures Configures external divider.
+ *
+ * @param	PllInstancePtr is pointer to the XAVBuf_Pll instance.
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static void  XAVBuf_ConfigureExtDivider(XAVBuf_Pll *PllInstancePtr,
+					u64 BaseAddress, u32 Offset)
+{
+	XAVBuf_ReadModifyWriteReg(BaseAddress, Offset,
+		XAVBUF_VIDEO_REF_CTRL_CLKACT_MASK,
+		XAVBUF_VIDEO_REF_CTRL_CLKACT_SHIFT, XAVBUF_DISABLE_BIT);
+	XAVBuf_ReadModifyWriteReg(BaseAddress, Offset,
+		XAVBUF_VIDEO_REF_CTRL_DIVISOR1_MASK,
+		XAVBUF_VIDEO_REF_CTRL_DIVISOR1_SHIFT,
+		PllInstancePtr->ExtDivider1);
+	XAVBuf_ReadModifyWriteReg(BaseAddress, Offset,
+		XAVBUF_VIDEO_REF_CTRL_DIVISOR0_MASK,
+		XAVBUF_VIDEO_REF_CTRL_DIVISOR0_SHIFT,
+		PllInstancePtr->ExtDivider0);
+	XAVBuf_ReadModifyWriteReg(BaseAddress, Offset,
+		XAVBUF_VIDEO_REF_CTRL_CLKACT_MASK,
+		XAVBUF_VIDEO_REF_CTRL_CLKACT_SHIFT, XAVBUF_ENABLE_BIT);
+	XAVBuf_WriteReg(BaseAddress, Offset, 0x1011003);
+}
+
+/******************************************************************************/
+/**
+ * This function calls API to calculate and configure PLL with desired frequency
+ * for Video.
+ *
+ * @param	FreqHz is the desired frequency in Hz.
+ *
+ * @return	XST_SUCCESS if PLL is configured without an error.
+ *		    XST_FAILURE otherwise.
+ *
+ * @note	The Pll used is design specific.
+ *
+*******************************************************************************/
+int XAVBuf_SetPixelClock(u64 FreqHz)
+{
+	u32 PllAssigned;
+	XAVBuf_Pll PllInstancePtr;
+	u8 Pll, CrossDomain, Flag;
+
+	/*Verify Input Arguments*/
+	Xil_AssertNonvoid(FreqHz < XDPSSU_MAX_VIDEO_FREQ);
+
+	PllAssigned = XAVBuf_ReadReg(XAVBUF_CLK_FPD_BASEADDR,
+		XAVBUF_VIDEO_REF_CTRL) & XAVBUF_VIDEO_REF_CTRL_SRCSEL_MASK;
+
+	switch (PllAssigned) {
+		case XAVBUF_VPLL_SRC_SEL:
+				Pll = VPLL;
+				CrossDomain = 0;
+				break;
+		case XAVBUF_DPLL_SRC_SEL:
+				Pll = DPLL;
+				CrossDomain = 0;
+				break;
+		case XAVBUF_RPLL_TO_FPD_SRC_SEL:
+				Pll = RPLL;
+				CrossDomain = 1;
+				break;
+		default:
+				return XST_FAILURE;
+	}
+
+	/*Calculate configure PLL and External Divider*/
+	XAVBuf_PllInitialize(&PllInstancePtr, Pll, CrossDomain,
+		XAVBUF_EXTERNAL_DIVIDER);
+	Flag = XAVBuf_PllCalcParameterValues(&PllInstancePtr, FreqHz);
+	if(Flag != 0)
+		return XST_FAILURE;
+	Flag = XAVBuf_ConfigurePll(&PllInstancePtr);
+	if(Flag != 0)
+		return XST_FAILURE;
+	XAVBuf_ConfigureExtDivider(&PllInstancePtr, XAVBUF_CLK_FPD_BASEADDR,
+		XAVBUF_VIDEO_REF_CTRL);
+
+	return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function calls API to calculate and configure PLL with desired
+ * frequency for Audio.
+ *
+ * @param	FreqHz is the desired frequency in Hz.
+ *
+ * @return	XST_SUCCESS if PLL is configured without an error.
+ *		    XST_FAILURE otherwise.
+ *
+ * @note	The Pll used is design specific.
+ *
+*******************************************************************************/
+int XAVBuf_SetAudioClock(u64 FreqHz)
+{
+	u32 Flag, PllAssigned;
+	u8 Pll, CrossDomain;
+	XAVBuf_Pll XAVBuf_RPllInstancePtr;
+
+	/*Verify Input Arguments*/
+	Flag = (FreqHz == (XAVBUF_AUDIO_SAMPLE_RATE_44_1 *
+		XAVBUF_AUDIO_SAMPLES)) ||
+		(FreqHz == (XAVBUF_AUDIO_SAMPLE_RATE_48_0 *
+		XAVBUF_AUDIO_SAMPLES));
+	Xil_AssertNonvoid(Flag);
+
+	PllAssigned = XAVBuf_ReadReg(XAVBUF_CLK_FPD_BASEADDR,
+		XAVBUF_AUDIO_REF_CTRL) &
+		XAVBUF_AUDIO_REF_CTRL_SRCSEL_MASK;
+
+	switch (PllAssigned) {
+		case XAVBUF_VPLL_SRC_SEL:
+				Pll = VPLL;
+				CrossDomain = 0;
+				break;
+		case XAVBUF_DPLL_SRC_SEL:
+				Pll = DPLL;
+				CrossDomain = 0;
+				break;
+		case XAVBUF_RPLL_TO_FPD_SRC_SEL:
+				Pll = RPLL;
+				CrossDomain = 1;
+				break;
+		default:
+				return XST_FAILURE;
+	}
+
+	/*Calculate configure PLL and External Divider*/
+	XAVBuf_PllInitialize(&XAVBuf_RPllInstancePtr, Pll, CrossDomain,
+		XAVBUF_EXTERNAL_DIVIDER);
+	Flag = XAVBuf_PllCalcParameterValues(&XAVBuf_RPllInstancePtr, FreqHz);
+	if(Flag != 0)
+		return XST_FAILURE;
+	Flag = XAVBuf_ConfigurePll(&XAVBuf_RPllInstancePtr);
+	if(Flag != 0)
+		return XST_FAILURE;
+	XAVBuf_ConfigureExtDivider(&XAVBuf_RPllInstancePtr,
+		XAVBUF_CLK_FPD_BASEADDR, XAVBUF_AUDIO_REF_CTRL);
+
+	return XST_SUCCESS;
+}
diff --git a/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_clk.h b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_clk.h
new file mode 100644
index 0000000..91ca3b5
--- /dev/null
+++ b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_clk.h
@@ -0,0 +1,97 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xavbuf_clk.h
+ *
+ * This header file contains the identifiers and low-level driver functions (or
+ * macros) that can be used to configure PLL to generate required frequency.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   mh  06/24/17 Initial release.
+ * 2.1   tu  12/29/17 LPD and FPD offsets adjusted
+ * 

+ *
+*******************************************************************************/
+
+#ifndef XAVBUF_CLK_H_
+#define XAVBUF_CLK_H_
+
+/******************************* Include Files ********************************/
+#include "xavbuf_hw.h"
+#include "xstatus.h"
+#include "sleep.h"
+
+/****************************** Type Definitions ******************************/
+/**
+ * This enum enumerates various PLL
+ */
+enum PLL{
+	APLL  = 0,
+	DPLL  = 1,
+	VPLL  = 2,
+	IOPLL = 3,
+	RPLL  = 4
+};
+
+/**
+ * This typedef enumerates various variables used to configure Pll
+ */
+typedef struct {
+	u64 BaseAddress;
+	u64 Fractional;
+	u64 RefClkFreqhz;
+	u32 Divider;
+	u8 Offset;
+	u8 ClkDividBy2;
+	u8 ExtDivider0;
+	u8 ExtDivider1;
+	u8 ExtDividerCnt;
+	u8 DomainSwitchDiv;
+	u8 FracIntegerFBDIV;
+	u8 IntegerFBDIV;
+	u8 InputRefClk;
+	u8 Fpd;
+	u8 Pll;
+}XAVBuf_Pll;
+
+/**************************** Function Prototypes *****************************/
+int XAVBuf_SetPixelClock(u64 FreqHz);
+int XAVBuf_SetAudioClock(u64 FreqHz);
+#endif /* XAVBUF_CLK_H_ */
diff --git a/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_g.c b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_g.c
new file mode 100644
index 0000000..680ca03
--- /dev/null
+++ b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_g.c
@@ -0,0 +1,55 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xavbuf.h"
+
+/*
+* The configuration table for devices
+*/
+
+XAVBuf_Config XAVBuf_ConfigTable[XPAR_XAVBUF_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_DP_DEVICE_ID,
+		XPAR_PSU_DP_BASEADDR
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_hw.h b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_hw.h
new file mode 100644
index 0000000..3454fa0
--- /dev/null
+++ b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_hw.h
@@ -0,0 +1,1675 @@
+/*******************************************************************************
+ *
+ * Copyright C 2014 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xavbuf_hw.h
+ *
+ * This header file contains macros that can be used to access the device
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0	 aad 02/24/17	Initial Release
+ * 1.0   mh  06/24/17	Added Clock related register information
+ * 2.0   aad 10/07/17   Removed Macros related to Video and Audio Src
+ * 

+ *
+*******************************************************************************/
+#ifndef XAVBUF_HW_H_
+/* Prevent circular inclusions by using protection macros. */
+#define XAVBUF_HW_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/***************************** Include Files **********************************/
+
+#include "xil_io.h"
+#include "xil_types.h"
+
+/************************** Constant Definitions ******************************/
+
+/******************************************************************************/
+/**
+ * Address mapping for the DisplayPort TX core.
+ *
+*******************************************************************************/
+
+#define XAVBUF_BASEADDR		0xFD4A0000
+/**
+ *  * Register: XAVBUF_V_BLEND_BG_CLR_0
+ *   */
+#define XAVBUF_V_BLEND_BG_CLR_0         0X0000A000
+
+#define XAVBUF_V_BLEND_BG_CLR_0_CLR0_SHIFT   0
+#define XAVBUF_V_BLEND_BG_CLR_0_CLR0_WIDTH   12
+#define XAVBUF_V_BLEND_BG_CLR_0_CLR0_MASK    0X00000FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_BG_CLR_1
+ *   */
+#define XAVBUF_V_BLEND_BG_CLR_1         0X0000A004
+
+#define XAVBUF_V_BLEND_BG_CLR_1_CLR1_SHIFT   0
+#define XAVBUF_V_BLEND_BG_CLR_1_CLR1_WIDTH   12
+#define XAVBUF_V_BLEND_BG_CLR_1_CLR1_MASK    0X00000FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_BG_CLR_2
+ *   */
+#define XAVBUF_V_BLEND_BG_CLR_2         0X0000A008
+
+#define XAVBUF_V_BLEND_BG_CLR_2_CLR2_SHIFT   0
+#define XAVBUF_V_BLEND_BG_CLR_2_CLR2_WIDTH   12
+#define XAVBUF_V_BLEND_BG_CLR_2_CLR2_MASK    0X00000FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG
+ *   */
+#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG         0X0000A00C
+
+#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_VALUE_SHIFT   1
+#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_VALUE_WIDTH   8
+#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_VALUE_MASK    0X000001FE
+
+#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_EN_SHIFT   0
+#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_EN_WIDTH   1
+#define XAVBUF_V_BLEND_SET_GLOBAL_ALPHA_REG_EN_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_V_BLEND_OUTPUT_VID_FORMAT
+ *   */
+#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT         0X0000A014
+
+#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_EN_DOWNSAMPLE_SHIFT   4
+#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_EN_DOWNSAMPLE_WIDTH   1
+#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_EN_DOWNSAMPLE_MASK    0X00000010
+
+#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_VID_FORMAT_SHIFT   0
+#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_VID_FORMAT_WIDTH   3
+#define XAVBUF_V_BLEND_OUTPUT_VID_FORMAT_VID_FORMAT_MASK    0X00000007
+
+/**
+ *  * Register: XAVBUF_V_BLEND_LAYER0_CONTROL
+ *   */
+#define XAVBUF_V_BLEND_LAYER0_CONTROL         0X0000A018
+
+#define XAVBUF_V_BLEND_LAYER0_CONTROL_BYPASS_SHIFT   8
+#define XAVBUF_V_BLEND_LAYER0_CONTROL_BYPASS_WIDTH   1
+#define XAVBUF_V_BLEND_LAYER0_CONTROL_BYPASS_MASK    0X00000100
+
+#define XAVBUF_V_BLEND_LAYER0_CONTROL_RGB_MODE_SHIFT   1
+#define XAVBUF_V_BLEND_LAYER0_CONTROL_RGB_MODE_WIDTH   1
+#define XAVBUF_V_BLEND_LAYER0_CONTROL_RGB_MODE_MASK    0X00000002
+
+#define XAVBUF_V_BLEND_LAYER0_CONTROL_EN_US_SHIFT   0
+#define XAVBUF_V_BLEND_LAYER0_CONTROL_EN_US_WIDTH   1
+#define XAVBUF_V_BLEND_LAYER0_CONTROL_EN_US_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_V_BLEND_LAYER1_CONTROL
+ *   */
+#define XAVBUF_V_BLEND_LAYER1_CONTROL         0X0000A01C
+
+#define XAVBUF_V_BLEND_LAYER1_CONTROL_BYPASS_SHIFT   8
+#define XAVBUF_V_BLEND_LAYER1_CONTROL_BYPASS_WIDTH   1
+#define XAVBUF_V_BLEND_LAYER1_CONTROL_BYPASS_MASK    0X00000100
+
+#define XAVBUF_V_BLEND_LAYER1_CONTROL_RGB_MODE_SHIFT   1
+#define XAVBUF_V_BLEND_LAYER1_CONTROL_RGB_MODE_WIDTH   1
+#define XAVBUF_V_BLEND_LAYER1_CONTROL_RGB_MODE_MASK    0X00000002
+
+#define XAVBUF_V_BLEND_LAYER1_CONTROL_EN_US_SHIFT   0
+#define XAVBUF_V_BLEND_LAYER1_CONTROL_EN_US_WIDTH   1
+#define XAVBUF_V_BLEND_LAYER1_CONTROL_EN_US_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF0
+ *   */
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF0         0X0000A020
+
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF0_RGB2Y_C0_SHIFT   0
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF0_RGB2Y_C0_WIDTH   15
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF0_RGB2Y_C0_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF1
+ *   */
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF1         0X0000A024
+
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF1_RGB2Y_C1_SHIFT   0
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF1_RGB2Y_C1_WIDTH   15
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF1_RGB2Y_C1_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF2
+ *   */
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF2         0X0000A028
+
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF2_RGB2Y_C2_SHIFT   0
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF2_RGB2Y_C2_WIDTH   15
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF2_RGB2Y_C2_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF3
+ *   */
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF3         0X0000A02C
+
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF3_RGB2Y_C3_SHIFT   0
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF3_RGB2Y_C3_WIDTH   15
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF3_RGB2Y_C3_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF4
+ *   */
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF4         0X0000A030
+
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF4_RGB2Y_C4_SHIFT   0
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF4_RGB2Y_C4_WIDTH   15
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF4_RGB2Y_C4_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF5
+ *   */
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF5         0X0000A034
+
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF5_RGB2Y_C5_SHIFT   0
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF5_RGB2Y_C5_WIDTH   15
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF5_RGB2Y_C5_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF6
+ *   */
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF6         0X0000A038
+
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF6_RGB2Y_C6_SHIFT   0
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF6_RGB2Y_C6_WIDTH   15
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF6_RGB2Y_C6_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF7
+ *   */
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF7         0X0000A03C
+
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF7_RGB2Y_C7_SHIFT   0
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF7_RGB2Y_C7_WIDTH   15
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF7_RGB2Y_C7_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_RGB2YCBCR_COEFF8
+ *   */
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF8         0X0000A040
+
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF8_RGB2Y_C8_SHIFT   0
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF8_RGB2Y_C8_WIDTH   15
+#define XAVBUF_V_BLEND_RGB2YCBCR_COEFF8_RGB2Y_C8_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN1CSC_COEFF0
+ *   */
+#define XAVBUF_V_BLEND_IN1CSC_COEFF0         0X0000A044
+
+#define XAVBUF_V_BLEND_IN1CSC_COEFF0_Y2R_C0_SHIFT   0
+#define XAVBUF_V_BLEND_IN1CSC_COEFF0_Y2R_C0_WIDTH   15
+#define XAVBUF_V_BLEND_IN1CSC_COEFF0_Y2R_C0_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN1CSC_COEFF1
+ *   */
+#define XAVBUF_V_BLEND_IN1CSC_COEFF1         0X0000A048
+
+#define XAVBUF_V_BLEND_IN1CSC_COEFF1_Y2R_C1_SHIFT   0
+#define XAVBUF_V_BLEND_IN1CSC_COEFF1_Y2R_C1_WIDTH   15
+#define XAVBUF_V_BLEND_IN1CSC_COEFF1_Y2R_C1_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN1CSC_COEFF2
+ *   */
+#define XAVBUF_V_BLEND_IN1CSC_COEFF2         0X0000A04C
+
+#define XAVBUF_V_BLEND_IN1CSC_COEFF2_Y2R_C2_SHIFT   0
+#define XAVBUF_V_BLEND_IN1CSC_COEFF2_Y2R_C2_WIDTH   15
+#define XAVBUF_V_BLEND_IN1CSC_COEFF2_Y2R_C2_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN1CSC_COEFF3
+ *   */
+#define XAVBUF_V_BLEND_IN1CSC_COEFF3         0X0000A050
+
+#define XAVBUF_V_BLEND_IN1CSC_COEFF3_Y2R_C3_SHIFT   0
+#define XAVBUF_V_BLEND_IN1CSC_COEFF3_Y2R_C3_WIDTH   15
+#define XAVBUF_V_BLEND_IN1CSC_COEFF3_Y2R_C3_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN1CSC_COEFF4
+ *   */
+#define XAVBUF_V_BLEND_IN1CSC_COEFF4         0X0000A054
+
+#define XAVBUF_V_BLEND_IN1CSC_COEFF4_Y2R_C4_SHIFT   0
+#define XAVBUF_V_BLEND_IN1CSC_COEFF4_Y2R_C4_WIDTH   15
+#define XAVBUF_V_BLEND_IN1CSC_COEFF4_Y2R_C4_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN1CSC_COEFF5
+ *   */
+#define XAVBUF_V_BLEND_IN1CSC_COEFF5         0X0000A058
+
+#define XAVBUF_V_BLEND_IN1CSC_COEFF5_Y2R_C5_SHIFT   0
+#define XAVBUF_V_BLEND_IN1CSC_COEFF5_Y2R_C5_WIDTH   15
+#define XAVBUF_V_BLEND_IN1CSC_COEFF5_Y2R_C5_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN1CSC_COEFF6
+ *   */
+#define XAVBUF_V_BLEND_IN1CSC_COEFF6         0X0000A05C
+
+#define XAVBUF_V_BLEND_IN1CSC_COEFF6_Y2R_C6_SHIFT   0
+#define XAVBUF_V_BLEND_IN1CSC_COEFF6_Y2R_C6_WIDTH   15
+#define XAVBUF_V_BLEND_IN1CSC_COEFF6_Y2R_C6_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN1CSC_COEFF7
+ *   */
+#define XAVBUF_V_BLEND_IN1CSC_COEFF7         0X0000A060
+
+#define XAVBUF_V_BLEND_IN1CSC_COEFF7_Y2R_C7_SHIFT   0
+#define XAVBUF_V_BLEND_IN1CSC_COEFF7_Y2R_C7_WIDTH   15
+#define XAVBUF_V_BLEND_IN1CSC_COEFF7_Y2R_C7_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN1CSC_COEFF8
+ *   */
+#define XAVBUF_V_BLEND_IN1CSC_COEFF8         0X0000A064
+
+#define XAVBUF_V_BLEND_IN1CSC_COEFF8_Y2R_C8_SHIFT   0
+#define XAVBUF_V_BLEND_IN1CSC_COEFF8_Y2R_C8_WIDTH   15
+#define XAVBUF_V_BLEND_IN1CSC_COEFF8_Y2R_C8_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET
+ *   */
+#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET         0X0000A068
+
+#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_POST_OFFSET_SHIFT   16
+#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_POST_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_POST_OFFSET_MASK    0X1FFF0000
+
+#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_PRE_OFFSET_SHIFT   0
+#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_PRE_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_LUMA_IN1CSC_OFFSET_PRE_OFFSET_MASK    0X00001FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_CR_IN1CSC_OFFSET
+ *   */
+#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET         0X0000A06C
+
+#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_POST_OFFSET_SHIFT   16
+#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_POST_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_POST_OFFSET_MASK    0X1FFF0000
+
+#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_PRE_OFFSET_SHIFT   0
+#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_PRE_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CR_IN1CSC_OFFSET_PRE_OFFSET_MASK    0X00001FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_CB_IN1CSC_OFFSET
+ *   */
+#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET         0X0000A070
+
+#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_POST_OFFSET_SHIFT   16
+#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_POST_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_POST_OFFSET_MASK    0X1FFF0000
+
+#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_PRE_OFFSET_SHIFT   0
+#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_PRE_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CB_IN1CSC_OFFSET_PRE_OFFSET_MASK    0X00001FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET
+ *   */
+#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET         0X0000A074
+
+#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_POST_OFFSET_SHIFT   16
+#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_POST_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_POST_OFFSET_MASK    0X1FFF0000
+
+#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_PRE_OFFSET_SHIFT   0
+#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_PRE_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_LUMA_OUTCSC_OFFSET_PRE_OFFSET_MASK    0X00001FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_CR_OUTCSC_OFFSET
+ *   */
+#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET         0X0000A078
+
+#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_POST_OFFSET_SHIFT   16
+#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_POST_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_POST_OFFSET_MASK    0X1FFF0000
+
+#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_PRE_OFFSET_SHIFT   0
+#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_PRE_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CR_OUTCSC_OFFSET_PRE_OFFSET_MASK    0X00001FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_CB_OUTCSC_OFFSET
+ *   */
+#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET         0X0000A07C
+
+#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_POST_OFFSET_SHIFT   16
+#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_POST_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_POST_OFFSET_MASK    0X1FFF0000
+
+#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_PRE_OFFSET_SHIFT   0
+#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_PRE_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CB_OUTCSC_OFFSET_PRE_OFFSET_MASK    0X00001FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN2CSC_COEFF0
+ *   */
+#define XAVBUF_V_BLEND_IN2CSC_COEFF0         0X0000A080
+
+#define XAVBUF_V_BLEND_IN2CSC_COEFF0_Y2R_C0_SHIFT   0
+#define XAVBUF_V_BLEND_IN2CSC_COEFF0_Y2R_C0_WIDTH   15
+#define XAVBUF_V_BLEND_IN2CSC_COEFF0_Y2R_C0_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN2CSC_COEFF1
+ *   */
+#define XAVBUF_V_BLEND_IN2CSC_COEFF1         0X0000A084
+
+#define XAVBUF_V_BLEND_IN2CSC_COEFF1_Y2R_C1_SHIFT   0
+#define XAVBUF_V_BLEND_IN2CSC_COEFF1_Y2R_C1_WIDTH   15
+#define XAVBUF_V_BLEND_IN2CSC_COEFF1_Y2R_C1_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN2CSC_COEFF2
+ *   */
+#define XAVBUF_V_BLEND_IN2CSC_COEFF2         0X0000A088
+
+#define XAVBUF_V_BLEND_IN2CSC_COEFF2_Y2R_C2_SHIFT   0
+#define XAVBUF_V_BLEND_IN2CSC_COEFF2_Y2R_C2_WIDTH   15
+#define XAVBUF_V_BLEND_IN2CSC_COEFF2_Y2R_C2_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN2CSC_COEFF3
+ *   */
+#define XAVBUF_V_BLEND_IN2CSC_COEFF3         0X0000A08C
+
+#define XAVBUF_V_BLEND_IN2CSC_COEFF3_Y2R_C3_SHIFT   0
+#define XAVBUF_V_BLEND_IN2CSC_COEFF3_Y2R_C3_WIDTH   15
+#define XAVBUF_V_BLEND_IN2CSC_COEFF3_Y2R_C3_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN2CSC_COEFF4
+ *   */
+#define XAVBUF_V_BLEND_IN2CSC_COEFF4         0X0000A090
+
+#define XAVBUF_V_BLEND_IN2CSC_COEFF4_Y2R_C4_SHIFT   0
+#define XAVBUF_V_BLEND_IN2CSC_COEFF4_Y2R_C4_WIDTH   15
+#define XAVBUF_V_BLEND_IN2CSC_COEFF4_Y2R_C4_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN2CSC_COEFF5
+ *   */
+#define XAVBUF_V_BLEND_IN2CSC_COEFF5         0X0000A094
+
+#define XAVBUF_V_BLEND_IN2CSC_COEFF5_Y2R_C5_SHIFT   0
+#define XAVBUF_V_BLEND_IN2CSC_COEFF5_Y2R_C5_WIDTH   15
+#define XAVBUF_V_BLEND_IN2CSC_COEFF5_Y2R_C5_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN2CSC_COEFF6
+ *   */
+#define XAVBUF_V_BLEND_IN2CSC_COEFF6         0X0000A098
+
+#define XAVBUF_V_BLEND_IN2CSC_COEFF6_Y2R_C6_SHIFT   0
+#define XAVBUF_V_BLEND_IN2CSC_COEFF6_Y2R_C6_WIDTH   15
+#define XAVBUF_V_BLEND_IN2CSC_COEFF6_Y2R_C6_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN2CSC_COEFF7
+ *   */
+#define XAVBUF_V_BLEND_IN2CSC_COEFF7         0X0000A09C
+
+#define XAVBUF_V_BLEND_IN2CSC_COEFF7_Y2R_C7_SHIFT   0
+#define XAVBUF_V_BLEND_IN2CSC_COEFF7_Y2R_C7_WIDTH   15
+#define XAVBUF_V_BLEND_IN2CSC_COEFF7_Y2R_C7_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_IN2CSC_COEFF8
+ *   */
+#define XAVBUF_V_BLEND_IN2CSC_COEFF8         0X0000A0A0
+
+#define XAVBUF_V_BLEND_IN2CSC_COEFF8_Y2R_C8_SHIFT   0
+#define XAVBUF_V_BLEND_IN2CSC_COEFF8_Y2R_C8_WIDTH   15
+#define XAVBUF_V_BLEND_IN2CSC_COEFF8_Y2R_C8_MASK    0X00007FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET
+ *   */
+#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET         0X0000A0A4
+
+#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_POST_OFFSET_SHIFT   16
+#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_POST_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_POST_OFFSET_MASK    0X1FFF0000
+
+#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_PRE_OFFSET_SHIFT   0
+#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_PRE_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_LUMA_IN2CSC_OFFSET_PRE_OFFSET_MASK    0X00001FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_CR_IN2CSC_OFFSET
+ *   */
+#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET         0X0000A0A8
+
+#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_POST_OFFSET_SHIFT   16
+#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_POST_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_POST_OFFSET_MASK    0X1FFF0000
+
+#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_PRE_OFFSET_SHIFT   0
+#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_PRE_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CR_IN2CSC_OFFSET_PRE_OFFSET_MASK    0X00001FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_CB_IN2CSC_OFFSET
+ *   */
+#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET         0X0000A0AC
+
+#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_POST_OFFSET_SHIFT   16
+#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_POST_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_POST_OFFSET_MASK    0X1FFF0000
+
+#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_PRE_OFFSET_SHIFT   0
+#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_PRE_OFFSET_WIDTH   13
+#define XAVBUF_V_BLEND_CB_IN2CSC_OFFSET_PRE_OFFSET_MASK    0X00001FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_CHROMA_KEY_ENABLE
+ *   */
+#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE         0X0000A1D0
+
+#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_M_SEL_SHIFT   1
+#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_M_SEL_WIDTH   1
+#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_M_SEL_MASK    0X00000002
+
+#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_EN_SHIFT   0
+#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_EN_WIDTH   1
+#define XAVBUF_V_BLEND_CHROMA_KEY_ENABLE_EN_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_V_BLEND_CHROMA_KEY_COMP1
+ *   */
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1         0X0000A1D4
+
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MAX_SHIFT   16
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MAX_WIDTH   12
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MAX_MASK    0X0FFF0000
+
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MIN_SHIFT   0
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MIN_WIDTH   12
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP1_MIN_MASK    0X00000FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_CHROMA_KEY_COMP2
+ *   */
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2         0X0000A1D8
+
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MAX_SHIFT   16
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MAX_WIDTH   12
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MAX_MASK    0X0FFF0000
+
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MIN_SHIFT   0
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MIN_WIDTH   12
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP2_MIN_MASK    0X00000FFF
+
+/**
+ *  * Register: XAVBUF_V_BLEND_CHROMA_KEY_COMP3
+ *   */
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3         0X0000A1DC
+
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MAX_SHIFT   16
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MAX_WIDTH   12
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MAX_MASK    0X0FFF0000
+
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MIN_SHIFT   0
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MIN_WIDTH   12
+#define XAVBUF_V_BLEND_CHROMA_KEY_COMP3_MIN_MASK    0X00000FFF
+
+/**
+ *  * Register: XAVBUF_BUF_FORMAT
+ *   */
+#define XAVBUF_BUF_FORMAT         0X0000B000
+
+#define XAVBUF_BUF_FORMAT_NL_GRAPHX_FORMAT_SHIFT   8
+#define XAVBUF_BUF_FORMAT_NL_GRAPHX_FORMAT_WIDTH   4
+#define XAVBUF_BUF_FORMAT_NL_GRAPHX_FORMAT_MASK    0X00000F00
+
+#define XAVBUF_BUF_FORMAT_NL_VID_FORMAT_SHIFT   0
+#define XAVBUF_BUF_FORMAT_NL_VID_FORMAT_WIDTH   5
+#define XAVBUF_BUF_FORMAT_NL_VID_FORMAT_MASK    0X0000001F
+
+/**
+ *  * Register: XAVBUF_BUF_NON_LIVE_LATENCY
+ *   */
+#define XAVBUF_BUF_NON_LIVE_LATENCY         0X0000B008
+
+#define XAVBUF_BUF_NON_LIVE_LATENCY_NL_LATENCY_SHIFT   0
+#define XAVBUF_BUF_NON_LIVE_LATENCY_NL_LATENCY_WIDTH   10
+#define XAVBUF_BUF_NON_LIVE_LATENCY_NL_LATENCY_MASK    0X000003FF
+
+/**
+ *  * Register: XAVBUF_CHBUF0
+ *   */
+#define XAVBUF_CHBUF0         0X0000B010
+
+#define XAVBUF_CHBUF0_BURST_LEN_SHIFT   2
+#define XAVBUF_CHBUF0_BURST_LEN_WIDTH   5
+#define XAVBUF_CHBUF0_BURST_LEN_MASK    0X0000007C
+
+#define XAVBUF_CHBUF0_FLUSH_SHIFT   1
+#define XAVBUF_CHBUF0_FLUSH_WIDTH   1
+#define XAVBUF_CHBUF0_FLUSH_MASK    0X00000002
+
+#define XAVBUF_CHBUF0_EN_SHIFT   0
+#define XAVBUF_CHBUF0_EN_WIDTH   1
+#define XAVBUF_CHBUF0_EN_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_CHBUF1
+ *   */
+#define XAVBUF_CHBUF1         0X0000B014
+
+#define XAVBUF_CHBUF1_BURST_LEN_SHIFT   2
+#define XAVBUF_CHBUF1_BURST_LEN_WIDTH   5
+#define XAVBUF_CHBUF1_BURST_LEN_MASK    0X0000007C
+
+#define XAVBUF_CHBUF1_FLUSH_SHIFT   1
+#define XAVBUF_CHBUF1_FLUSH_WIDTH   1
+#define XAVBUF_CHBUF1_FLUSH_MASK    0X00000002
+
+#define XAVBUF_CHBUF1_EN_SHIFT   0
+#define XAVBUF_CHBUF1_EN_WIDTH   1
+#define XAVBUF_CHBUF1_EN_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_CHBUF2
+ *   */
+#define XAVBUF_CHBUF2         0X0000B018
+
+#define XAVBUF_CHBUF2_BURST_LEN_SHIFT   2
+#define XAVBUF_CHBUF2_BURST_LEN_WIDTH   5
+#define XAVBUF_CHBUF2_BURST_LEN_MASK    0X0000007C
+
+#define XAVBUF_CHBUF2_FLUSH_SHIFT   1
+#define XAVBUF_CHBUF2_FLUSH_WIDTH   1
+#define XAVBUF_CHBUF2_FLUSH_MASK    0X00000002
+
+#define XAVBUF_CHBUF2_EN_SHIFT   0
+#define XAVBUF_CHBUF2_EN_WIDTH   1
+#define XAVBUF_CHBUF2_EN_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_CHBUF3
+ *   */
+#define XAVBUF_CHBUF3         0X0000B01C
+
+#define XAVBUF_CHBUF3_BURST_LEN_SHIFT   2
+#define XAVBUF_CHBUF3_BURST_LEN_WIDTH   5
+#define XAVBUF_CHBUF3_BURST_LEN_MASK    0X0000007C
+
+#define XAVBUF_CHBUF3_FLUSH_SHIFT   1
+#define XAVBUF_CHBUF3_FLUSH_WIDTH   1
+#define XAVBUF_CHBUF3_FLUSH_MASK    0X00000002
+
+#define XAVBUF_CHBUF3_EN_SHIFT   0
+#define XAVBUF_CHBUF3_EN_WIDTH   1
+#define XAVBUF_CHBUF3_EN_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_CHBUF4
+ *   */
+#define XAVBUF_CHBUF4         0X0000B020
+
+#define XAVBUF_CHBUF4_BURST_LEN_SHIFT   2
+#define XAVBUF_CHBUF4_BURST_LEN_WIDTH   5
+#define XAVBUF_CHBUF4_BURST_LEN_MASK    0X0000007C
+
+#define XAVBUF_CHBUF4_FLUSH_SHIFT   1
+#define XAVBUF_CHBUF4_FLUSH_WIDTH   1
+#define XAVBUF_CHBUF4_FLUSH_MASK    0X00000002
+
+#define XAVBUF_CHBUF4_EN_SHIFT   0
+#define XAVBUF_CHBUF4_EN_WIDTH   1
+#define XAVBUF_CHBUF4_EN_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_CHBUF5
+ *   */
+#define XAVBUF_CHBUF5         0X0000B024
+
+#define XAVBUF_CHBUF5_BURST_LEN_SHIFT   2
+#define XAVBUF_CHBUF5_BURST_LEN_WIDTH   5
+#define XAVBUF_CHBUF5_BURST_LEN_MASK    0X0000007C
+
+#define XAVBUF_CHBUF5_FLUSH_SHIFT   1
+#define XAVBUF_CHBUF5_FLUSH_WIDTH   1
+#define XAVBUF_CHBUF5_FLUSH_MASK    0X00000002
+
+#define XAVBUF_CHBUF5_EN_SHIFT   0
+#define XAVBUF_CHBUF5_EN_WIDTH   1
+#define XAVBUF_CHBUF5_EN_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_BUF_STC_CONTROL
+ *   */
+#define XAVBUF_BUF_STC_CONTROL         0X0000B02C
+
+#define XAVBUF_BUF_STC_CONTROL_EN_SHIFT   0
+#define XAVBUF_BUF_STC_CONTROL_EN_WIDTH   1
+#define XAVBUF_BUF_STC_CONTROL_EN_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_BUF_STC_INIT_VALUE0
+ *   */
+#define XAVBUF_BUF_STC_INIT_VALUE0         0X0000B030
+
+#define XAVBUF_BUF_STC_INIT_VALUE0_INIT_VALUE0_SHIFT   0
+#define XAVBUF_BUF_STC_INIT_VALUE0_INIT_VALUE0_WIDTH   32
+#define XAVBUF_BUF_STC_INIT_VALUE0_INIT_VALUE0_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_INIT_VALUE1
+ *   */
+#define XAVBUF_BUF_STC_INIT_VALUE1         0X0000B034
+
+#define XAVBUF_BUF_STC_INIT_VALUE1_INIT_VALUE1_SHIFT   0
+#define XAVBUF_BUF_STC_INIT_VALUE1_INIT_VALUE1_WIDTH   10
+#define XAVBUF_BUF_STC_INIT_VALUE1_INIT_VALUE1_MASK    0X000003FF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_ADJ
+ *   */
+#define XAVBUF_BUF_STC_ADJ         0X0000B038
+
+#define XAVBUF_BUF_STC_ADJ_SIGN_SHIFT   31
+#define XAVBUF_BUF_STC_ADJ_SIGN_WIDTH   1
+#define XAVBUF_BUF_STC_ADJ_SIGN_MASK    0X80000000
+
+#define XAVBUF_BUF_STC_ADJ_VALUE_SHIFT   0
+#define XAVBUF_BUF_STC_ADJ_VALUE_WIDTH   31
+#define XAVBUF_BUF_STC_ADJ_VALUE_MASK    0X7FFFFFFF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_VID_VSYNC_TS_REG0
+ *   */
+#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG0         0X0000B03C
+
+#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG0_VSYNC_TS0_SHIFT   0
+#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG0_VSYNC_TS0_WIDTH   32
+#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG0_VSYNC_TS0_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_VID_VSYNC_TS_REG1
+ *   */
+#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG1         0X0000B040
+
+#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG1_VSYNC_TS1_SHIFT   0
+#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG1_VSYNC_TS1_WIDTH   10
+#define XAVBUF_BUF_STC_VID_VSYNC_TS_REG1_VSYNC_TS1_MASK    0X000003FF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_EXT_VSYNC_TS_REG0
+ *   */
+#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG0         0X0000B044
+
+#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG0_EXT_VSYNC_TS0_SHIFT   0
+#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG0_EXT_VSYNC_TS0_WIDTH   32
+#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG0_EXT_VSYNC_TS0_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_EXT_VSYNC_TS_REG1
+ *   */
+#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG1         0X0000B048
+
+#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG1_EXT_VSYNC_TS1_SHIFT   0
+#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG1_EXT_VSYNC_TS1_WIDTH   10
+#define XAVBUF_BUF_STC_EXT_VSYNC_TS_REG1_EXT_VSYNC_TS1_MASK    0X000003FF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG0
+ *   */
+#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG0         0X0000B04C
+
+#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG0_CUST_EVENT_TS0_SHIFT   0
+#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG0_CUST_EVENT_TS0_WIDTH   32
+#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG0_CUST_EVENT_TS0_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG1
+ *   */
+#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG1         0X0000B050
+
+#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG1_CUST_EVENT_TS1_SHIFT   0
+#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG1_CUST_EVENT_TS1_WIDTH   10
+#define XAVBUF_BUF_STC_CUSTOM_EVENT_TS_REG1_CUST_EVENT_TS1_MASK    0X000003FF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG0
+ *   */
+#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG0         0X0000B054
+
+#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG0_CUST_EVENT2_TS0_SHIFT   0
+#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG0_CUST_EVENT2_TS0_WIDTH   32
+#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG0_CUST_EVENT2_TS0_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG1
+ *   */
+#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG1         0X0000B058
+
+#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG1_CUST_EVENT2_TS1_SHIFT   0
+#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG1_CUST_EVENT2_TS1_WIDTH   10
+#define XAVBUF_BUF_STC_CUSTOM_EVENT2_TS_REG1_CUST_EVENT2_TS1_MASK    0X000003FF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_SNAPSHOT0
+ *   */
+#define XAVBUF_BUF_STC_SNAPSHOT0         0X0000B060
+
+#define XAVBUF_BUF_STC_SNAPSHOT0_STC0_SHIFT   0
+#define XAVBUF_BUF_STC_SNAPSHOT0_STC0_WIDTH   32
+#define XAVBUF_BUF_STC_SNAPSHOT0_STC0_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_BUF_STC_SNAPSHOT1
+ *   */
+#define XAVBUF_BUF_STC_SNAPSHOT1         0X0000B064
+
+#define XAVBUF_BUF_STC_SNAPSHOT1_STC1_SHIFT   0
+#define XAVBUF_BUF_STC_SNAPSHOT1_STC1_WIDTH   10
+#define XAVBUF_BUF_STC_SNAPSHOT1_STC1_MASK    0X000003FF
+
+/**
+ *  * Register: XAVBUF_BUF_OUTPUT_AUD_VID_SELECT
+ *   */
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT         0X0000B070
+
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM2_SEL_SHIFT   6
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM2_SEL_WIDTH   1
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM2_SEL_MASK    0X00000040
+
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM1_SEL_SHIFT   4
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM1_SEL_WIDTH   2
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_AUD_STREAM1_SEL_MASK    0X00000030
+
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM2_SEL_SHIFT   2
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM2_SEL_WIDTH   2
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM2_SEL_MASK    0X0000000C
+
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM1_SEL_SHIFT   0
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM1_SEL_WIDTH   2
+#define XAVBUF_BUF_OUTPUT_AUD_VID_SELECT_VID_STREAM1_SEL_MASK    0X00000003
+
+/**
+ *  * Register: XAVBUF_BUF_HCOUNT_VCOUNT_INT0
+ *   */
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0         0X0000B074
+
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_HCOUNT_SHIFT   16
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_HCOUNT_WIDTH   14
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_HCOUNT_MASK    0X3FFF0000
+
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_VCOUNT_SHIFT   0
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_VCOUNT_WIDTH   14
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT0_VCOUNT_MASK    0X00003FFF
+
+/**
+ *  * Register: XAVBUF_BUF_HCOUNT_VCOUNT_INT1
+ *   */
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1         0X0000B078
+
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_HCOUNT_SHIFT   16
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_HCOUNT_WIDTH   14
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_HCOUNT_MASK    0X3FFF0000
+
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_VCOUNT_SHIFT   0
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_VCOUNT_WIDTH   14
+#define XAVBUF_BUF_HCOUNT_VCOUNT_INT1_VCOUNT_MASK    0X00003FFF
+
+/**
+ *  * Register: XAVBUF_BUF_DITHER_CFG
+ *   */
+#define XAVBUF_BUF_DITHER_CFG         0X0000B07C
+
+#define XAVBUF_BUF_DITHER_CFG_TAP_MSB_SHIFT   10
+#define XAVBUF_BUF_DITHER_CFG_TAP_MSB_WIDTH   1
+#define XAVBUF_BUF_DITHER_CFG_TAP_MSB_MASK    0X00000400
+
+#define XAVBUF_BUF_DITHER_CFG_DW_SEL_SHIFT   9
+#define XAVBUF_BUF_DITHER_CFG_DW_SEL_WIDTH   1
+#define XAVBUF_BUF_DITHER_CFG_DW_SEL_MASK    0X00000200
+
+#define XAVBUF_BUF_DITHER_CFG_LD_SHIFT   8
+#define XAVBUF_BUF_DITHER_CFG_LD_WIDTH   1
+#define XAVBUF_BUF_DITHER_CFG_LD_MASK    0X00000100
+
+#define XAVBUF_BUF_DITHER_CFG_TRUNC_PT_SHIFT   5
+#define XAVBUF_BUF_DITHER_CFG_TRUNC_PT_WIDTH   3
+#define XAVBUF_BUF_DITHER_CFG_TRUNC_PT_MASK    0X000000E0
+
+#define XAVBUF_BUF_DITHER_CFG_MODE_SHIFT   3
+#define XAVBUF_BUF_DITHER_CFG_MODE_WIDTH   2
+#define XAVBUF_BUF_DITHER_CFG_MODE_MASK    0X00000018
+
+#define XAVBUF_BUF_DITHER_CFG_SIZE_SHIFT   0
+#define XAVBUF_BUF_DITHER_CFG_SIZE_WIDTH   3
+#define XAVBUF_BUF_DITHER_CFG_SIZE_MASK    0X00000007
+
+/**
+ *  * Register: XAVBUF_DITHER_CFG_SEED0
+ *   */
+#define XAVBUF_DITHER_CFG_SEED0         0X0000B080
+
+#define XAVBUF_DITHER_CFG_SEED0_COLR0_SHIFT   0
+#define XAVBUF_DITHER_CFG_SEED0_COLR0_WIDTH   16
+#define XAVBUF_DITHER_CFG_SEED0_COLR0_MASK    0X0000FFFF
+
+/**
+ *  * Register: XAVBUF_DITHER_CFG_SEED1
+ *   */
+#define XAVBUF_DITHER_CFG_SEED1         0X0000B084
+
+#define XAVBUF_DITHER_CFG_SEED1_COLR1_SHIFT   0
+#define XAVBUF_DITHER_CFG_SEED1_COLR1_WIDTH   16
+#define XAVBUF_DITHER_CFG_SEED1_COLR1_MASK    0X0000FFFF
+
+/**
+ *  * Register: XAVBUF_DITHER_CFG_SEED2
+ *   */
+#define XAVBUF_DITHER_CFG_SEED2         0X0000B088
+
+#define XAVBUF_DITHER_CFG_SEED2_COLR2_SHIFT   0
+#define XAVBUF_DITHER_CFG_SEED2_COLR2_WIDTH   16
+#define XAVBUF_DITHER_CFG_SEED2_COLR2_MASK    0X0000FFFF
+
+/**
+ *  * Register: XAVBUF_DITHER_CFG_MAX
+ *   */
+#define XAVBUF_DITHER_CFG_MAX         0X0000B08C
+
+#define XAVBUF_DITHER_CFG_MAX_COLR_MAX_SHIFT   0
+#define XAVBUF_DITHER_CFG_MAX_COLR_MAX_WIDTH   12
+#define XAVBUF_DITHER_CFG_MAX_COLR_MAX_MASK    0X00000FFF
+
+/**
+ *  * Register: XAVBUF_DITHER_CFG_MIN
+ *   */
+#define XAVBUF_DITHER_CFG_MIN         0X0000B090
+
+#define XAVBUF_DITHER_CFG_MIN_COLR_MIN_SHIFT   0
+#define XAVBUF_DITHER_CFG_MIN_COLR_MIN_WIDTH   12
+#define XAVBUF_DITHER_CFG_MIN_COLR_MIN_MASK    0X00000FFF
+
+/**
+ *  * Register: XAVBUF_PATTERN_GEN_SELECT
+ *   */
+#define XAVBUF_PATTERN_GEN_SELECT         0X0000B100
+
+#define XAVBUF_PATTERN_GEN_SELECT_OFFSET_EQ_SHIFT   8
+#define XAVBUF_PATTERN_GEN_SELECT_OFFSET_EQ_WIDTH   24
+#define XAVBUF_PATTERN_GEN_SELECT_OFFSET_EQ_MASK    0XFFFFFF00
+
+#define XAVBUF_PATTERN_GEN_SELECT_AUD_RATE_SEL_SHIFT   0
+#define XAVBUF_PATTERN_GEN_SELECT_AUD_RATE_SEL_WIDTH   2
+#define XAVBUF_PATTERN_GEN_SELECT_AUD_RATE_SEL_MASK    0X00000003
+
+/**
+ *  * Register: XAVBUF_AUD_PATTERN_SELECT1
+ *   */
+#define XAVBUF_AUD_PATTERN_SELECT1         0X0000B104
+
+#define XAVBUF_AUD_PATTERN_SELECT1_PATTERN_SHIFT   0
+#define XAVBUF_AUD_PATTERN_SELECT1_PATTERN_WIDTH   2
+#define XAVBUF_AUD_PATTERN_SELECT1_PATTERN_MASK    0X00000003
+
+/**
+ *  * Register: XAVBUF_AUD_PATTERN_SELECT2
+ *   */
+#define XAVBUF_AUD_PATTERN_SELECT2         0X0000B108
+
+#define XAVBUF_AUD_PATTERN_SELECT2_PATTERN_SHIFT   0
+#define XAVBUF_AUD_PATTERN_SELECT2_PATTERN_WIDTH   2
+#define XAVBUF_AUD_PATTERN_SELECT2_PATTERN_MASK    0X00000003
+
+/**
+ *  * Register: XAVBUF_BUF_AUD_VID_CLK_SOURCE
+ *   */
+#define XAVBUF_BUF_AUD_VID_CLK_SOURCE         0X0000B120
+
+#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_TIMING_SRC_SHIFT   2
+#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_TIMING_SRC_WIDTH   1
+#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_TIMING_SRC_MASK    0X00000004
+
+#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_AUD_CLK_SRC_SHIFT   1
+#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_AUD_CLK_SRC_WIDTH   1
+#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_AUD_CLK_SRC_MASK    0X00000002
+
+#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_CLK_SRC_SHIFT   0
+#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_CLK_SRC_WIDTH   1
+#define XAVBUF_BUF_AUD_VID_CLK_SOURCE_VID_CLK_SRC_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_BUF_SRST_REG
+ *   */
+#define XAVBUF_BUF_SRST_REG         0X0000B124
+
+#define XAVBUF_BUF_SRST_REG_VID_RST_SHIFT   1
+#define XAVBUF_BUF_SRST_REG_VID_RST_WIDTH   1
+#define XAVBUF_BUF_SRST_REG_VID_RST_MASK    0X00000002
+
+/**
+ *  * Register: XAVBUF_BUF_AUD_RDY_INTERVAL
+ *   */
+#define XAVBUF_BUF_AUD_RDY_INTERVAL         0X0000B128
+
+#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH1_INT_SHIFT   16
+#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH1_INT_WIDTH   16
+#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH1_INT_MASK    0XFFFF0000
+
+#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH0_INT_SHIFT   0
+#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH0_INT_WIDTH   16
+#define XAVBUF_BUF_AUD_RDY_INTERVAL_CH0_INT_MASK    0X0000FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_AUD_CH_CFG
+ *   */
+#define XAVBUF_BUF_AUD_CH_CFG         0X0000B12C
+
+#define XAVBUF_BUF_AUD_CH_CFG_AUD_CH_ID_SHIFT   0
+#define XAVBUF_BUF_AUD_CH_CFG_AUD_CH_ID_WIDTH   2
+#define XAVBUF_BUF_AUD_CH_CFG_AUD_CH_ID_MASK    0X00000003
+
+/**
+ *  * Register: XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR
+ *   */
+#define XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR         0X0000B200
+
+#define XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR0_SHIFT   0
+#define XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR0_WIDTH   17
+#define XAVBUF_BUF_GRAPHICS_COMP0_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR0_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_GRAPHICS_COMP1_SCALE_FACTOR
+ *   */
+#define XAVBUF_BUF_GRAPHICS_COMP1_SCALE_FACTOR         0X0000B204
+
+#define XAVBUF_BUF_GRAPHICS_COMP1_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR1_SHIFT   0
+#define XAVBUF_BUF_GRAPHICS_COMP1_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR1_WIDTH   17
+#define XAVBUF_BUF_GRAPHICS_COMP1_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR1_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_GRAPHICS_COMP2_SCALE_FACTOR
+ *   */
+#define XAVBUF_BUF_GRAPHICS_COMP2_SCALE_FACTOR         0X0000B208
+
+#define XAVBUF_BUF_GRAPHICS_COMP2_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR2_SHIFT   0
+#define XAVBUF_BUF_GRAPHICS_COMP2_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR2_WIDTH   17
+#define XAVBUF_BUF_GRAPHICS_COMP2_SCALE_FACTOR_GRAPHICS_SCALE_FACTOR2_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_VID_COMP0_SCALE_FACTOR
+ *   */
+#define XAVBUF_BUF_VID_COMP0_SCALE_FACTOR         0X0000B20C
+
+#define XAVBUF_BUF_VID_COMP0_SCALE_FACTOR_VID_SCA_FACT0_SHIFT   0
+#define XAVBUF_BUF_VID_COMP0_SCALE_FACTOR_VID_SCA_FACT0_WIDTH   17
+#define XAVBUF_BUF_VID_COMP0_SCALE_FACTOR_VID_SCA_FACT0_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_VID_COMP1_SCALE_FACTOR
+ *   */
+#define XAVBUF_BUF_VID_COMP1_SCALE_FACTOR         0X0000B210
+
+#define XAVBUF_BUF_VID_COMP1_SCALE_FACTOR_VID_SCA_FACT1_SHIFT   0
+#define XAVBUF_BUF_VID_COMP1_SCALE_FACTOR_VID_SCA_FACT1_WIDTH   17
+#define XAVBUF_BUF_VID_COMP1_SCALE_FACTOR_VID_SCA_FACT1_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_VID_COMP2_SCALE_FACTOR
+ *   */
+#define XAVBUF_BUF_VID_COMP2_SCALE_FACTOR         0X0000B214
+
+#define XAVBUF_BUF_VID_COMP2_SCALE_FACTOR_VID_SCA_FACT2_SHIFT   0
+#define XAVBUF_BUF_VID_COMP2_SCALE_FACTOR_VID_SCA_FACT2_WIDTH   17
+#define XAVBUF_BUF_VID_COMP2_SCALE_FACTOR_VID_SCA_FACT2_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_LIVE_VID_COMP0_SF
+ *   */
+#define XAVBUF_BUF_LIVE_VID_COMP0_SF         0X0000B218
+
+#define XAVBUF_BUF_LIVE_VID_COMP0_SF_LIV_VID_SCA_FACT0_SHIFT   0
+#define XAVBUF_BUF_LIVE_VID_COMP0_SF_LIV_VID_SCA_FACT0_WIDTH   17
+#define XAVBUF_BUF_LIVE_VID_COMP0_SF_LIV_VID_SCA_FACT0_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_LIVE_VID_COMP1_SF
+ *   */
+#define XAVBUF_BUF_LIVE_VID_COMP1_SF         0X0000B21C
+
+#define XAVBUF_BUF_LIVE_VID_COMP1_SF_LIV_VID_SCA_FACT1_SHIFT   0
+#define XAVBUF_BUF_LIVE_VID_COMP1_SF_LIV_VID_SCA_FACT1_WIDTH   17
+#define XAVBUF_BUF_LIVE_VID_COMP1_SF_LIV_VID_SCA_FACT1_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_LIVE_VID_COMP2_SF
+ *   */
+#define XAVBUF_BUF_LIVE_VID_COMP2_SF         0X0000B220
+
+#define XAVBUF_BUF_LIVE_VID_COMP2_SF_LIV_VID_SCA_FACT2_SHIFT   0
+#define XAVBUF_BUF_LIVE_VID_COMP2_SF_LIV_VID_SCA_FACT2_WIDTH   17
+#define XAVBUF_BUF_LIVE_VID_COMP2_SF_LIV_VID_SCA_FACT2_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_LIVE_VID_CFG
+ *   */
+#define XAVBUF_BUF_LIVE_VID_CFG         0X0000B224
+
+#define XAVBUF_BUF_LIVE_VID_CFG_CB_FIRST_SHIFT   8
+#define XAVBUF_BUF_LIVE_VID_CFG_CB_FIRST_WIDTH   1
+#define XAVBUF_BUF_LIVE_VID_CFG_CB_FIRST_MASK    0X00000100
+
+#define XAVBUF_BUF_LIVE_VID_CFG_FORMAT_SHIFT   4
+#define XAVBUF_BUF_LIVE_VID_CFG_FORMAT_WIDTH   2
+#define XAVBUF_BUF_LIVE_VID_CFG_FORMAT_MASK    0X00000030
+
+#define XAVBUF_BUF_LIVE_VID_CFG_BPC_SHIFT   0
+#define XAVBUF_BUF_LIVE_VID_CFG_BPC_WIDTH   3
+#define XAVBUF_BUF_LIVE_VID_CFG_BPC_MASK    0X00000007
+
+/**
+ *  * Register: XAVBUF_BUF_LIVE_GFX_COMP0_SF
+ *   */
+#define XAVBUF_BUF_LIVE_GFX_COMP0_SF         0X0000B228
+
+#define XAVBUF_BUF_LIVE_GFX_COMP0_SF_LIV_VID_SCA_FACT0_SHIFT   0
+#define XAVBUF_BUF_LIVE_GFX_COMP0_SF_LIV_VID_SCA_FACT0_WIDTH   17
+#define XAVBUF_BUF_LIVE_GFX_COMP0_SF_LIV_VID_SCA_FACT0_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_LIVE_GFX_COMP1_SF
+ *   */
+#define XAVBUF_BUF_LIVE_GFX_COMP1_SF         0X0000B22C
+
+#define XAVBUF_BUF_LIVE_GFX_COMP1_SF_LIV_VID_SCA_FACT1_SHIFT   0
+#define XAVBUF_BUF_LIVE_GFX_COMP1_SF_LIV_VID_SCA_FACT1_WIDTH   17
+#define XAVBUF_BUF_LIVE_GFX_COMP1_SF_LIV_VID_SCA_FACT1_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_LIVE_GFX_COMP2_SF
+ *   */
+#define XAVBUF_BUF_LIVE_GFX_COMP2_SF         0X0000B230
+
+#define XAVBUF_BUF_LIVE_GFX_COMP2_SF_LIV_VID_SCA_FACT2_SHIFT   0
+#define XAVBUF_BUF_LIVE_GFX_COMP2_SF_LIV_VID_SCA_FACT2_WIDTH   17
+#define XAVBUF_BUF_LIVE_GFX_COMP2_SF_LIV_VID_SCA_FACT2_MASK    0X0001FFFF
+
+/**
+ *  * Register: XAVBUF_BUF_LIVE_GFX_CFG
+ *   */
+#define XAVBUF_BUF_LIVE_GFX_CFG         0X0000B234
+
+#define XAVBUF_BUF_LIVE_GFX_CFG_CB_FIRST_SHIFT   8
+#define XAVBUF_BUF_LIVE_GFX_CFG_CB_FIRST_WIDTH   1
+#define XAVBUF_BUF_LIVE_GFX_CFG_CB_FIRST_MASK    0X00000100
+
+#define XAVBUF_BUF_LIVE_GFX_CFG_FORMAT_SHIFT   4
+#define XAVBUF_BUF_LIVE_GFX_CFG_FORMAT_WIDTH   2
+#define XAVBUF_BUF_LIVE_GFX_CFG_FORMAT_MASK    0X00000030
+
+#define XAVBUF_BUF_LIVE_GFX_CFG_BPC_SHIFT   0
+#define XAVBUF_BUF_LIVE_GFX_CFG_BPC_WIDTH   3
+#define XAVBUF_BUF_LIVE_GFX_CFG_BPC_MASK    0X00000007
+
+/**
+ *  * Register: XAVBUF_AUD_MIXER_VOLUME_CONTROL
+ *   */
+#define XAVBUF_AUD_MIXER_VOLUME_CONTROL         0X0000C000
+
+#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH1_SHIFT   16
+#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH1_WIDTH   16
+#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH1_MASK    0XFFFF0000
+
+#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH0_SHIFT   0
+#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH0_WIDTH   16
+#define XAVBUF_AUD_MIXER_VOLUME_CONTROL_VOL_CTRL_CH0_MASK    0X0000FFFF
+
+/**
+ *  * Register: XAVBUF_AUD_MIXER_META_DATA
+ *   */
+#define XAVBUF_AUD_MIXER_META_DATA         0X0000C004
+
+#define XAVBUF_AUD_MIXER_META_DATA_AUD_META_DATA_SEL_SHIFT   0
+#define XAVBUF_AUD_MIXER_META_DATA_AUD_META_DATA_SEL_WIDTH   1
+#define XAVBUF_AUD_MIXER_META_DATA_AUD_META_DATA_SEL_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_AUD_CH_STATUS_REG0
+ *   */
+#define XAVBUF_AUD_CH_STATUS_REG0         0X0000C008
+
+#define XAVBUF_AUD_CH_STATUS_REG0_STATUS0_SHIFT   0
+#define XAVBUF_AUD_CH_STATUS_REG0_STATUS0_WIDTH   32
+#define XAVBUF_AUD_CH_STATUS_REG0_STATUS0_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_STATUS_REG1
+ *   */
+#define XAVBUF_AUD_CH_STATUS_REG1         0X0000C00C
+
+#define XAVBUF_AUD_CH_STATUS_REG1_STATUS1_SHIFT   0
+#define XAVBUF_AUD_CH_STATUS_REG1_STATUS1_WIDTH   32
+#define XAVBUF_AUD_CH_STATUS_REG1_STATUS1_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_STATUS_REG2
+ *   */
+#define XAVBUF_AUD_CH_STATUS_REG2         0X0000C010
+
+#define XAVBUF_AUD_CH_STATUS_REG2_STATUS2_SHIFT   0
+#define XAVBUF_AUD_CH_STATUS_REG2_STATUS2_WIDTH   32
+#define XAVBUF_AUD_CH_STATUS_REG2_STATUS2_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_STATUS_REG3
+ *   */
+#define XAVBUF_AUD_CH_STATUS_REG3         0X0000C014
+
+#define XAVBUF_AUD_CH_STATUS_REG3_STATUS3_SHIFT   0
+#define XAVBUF_AUD_CH_STATUS_REG3_STATUS3_WIDTH   32
+#define XAVBUF_AUD_CH_STATUS_REG3_STATUS3_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_STATUS_REG4
+ *   */
+#define XAVBUF_AUD_CH_STATUS_REG4         0X0000C018
+
+#define XAVBUF_AUD_CH_STATUS_REG4_STATUS4_SHIFT   0
+#define XAVBUF_AUD_CH_STATUS_REG4_STATUS4_WIDTH   32
+#define XAVBUF_AUD_CH_STATUS_REG4_STATUS4_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_STATUS_REG5
+ *   */
+#define XAVBUF_AUD_CH_STATUS_REG5         0X0000C01C
+
+#define XAVBUF_AUD_CH_STATUS_REG5_STATUS5_SHIFT   0
+#define XAVBUF_AUD_CH_STATUS_REG5_STATUS5_WIDTH   32
+#define XAVBUF_AUD_CH_STATUS_REG5_STATUS5_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_A_DATA_REG0
+ *   */
+#define XAVBUF_AUD_CH_A_DATA_REG0         0X0000C020
+
+#define XAVBUF_AUD_CH_A_DATA_REG0_USER_DATA0_SHIFT   0
+#define XAVBUF_AUD_CH_A_DATA_REG0_USER_DATA0_WIDTH   32
+#define XAVBUF_AUD_CH_A_DATA_REG0_USER_DATA0_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_A_DATA_REG1
+ *   */
+#define XAVBUF_AUD_CH_A_DATA_REG1         0X0000C024
+
+#define XAVBUF_AUD_CH_A_DATA_REG1_USER_DATA1_SHIFT   0
+#define XAVBUF_AUD_CH_A_DATA_REG1_USER_DATA1_WIDTH   32
+#define XAVBUF_AUD_CH_A_DATA_REG1_USER_DATA1_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_A_DATA_REG2
+ *   */
+#define XAVBUF_AUD_CH_A_DATA_REG2         0X0000C028
+
+#define XAVBUF_AUD_CH_A_DATA_REG2_USER_DATA2_SHIFT   0
+#define XAVBUF_AUD_CH_A_DATA_REG2_USER_DATA2_WIDTH   32
+#define XAVBUF_AUD_CH_A_DATA_REG2_USER_DATA2_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_A_DATA_REG3
+ *   */
+#define XAVBUF_AUD_CH_A_DATA_REG3         0X0000C02C
+
+#define XAVBUF_AUD_CH_A_DATA_REG3_USER_DATA3_SHIFT   0
+#define XAVBUF_AUD_CH_A_DATA_REG3_USER_DATA3_WIDTH   32
+#define XAVBUF_AUD_CH_A_DATA_REG3_USER_DATA3_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_A_DATA_REG4
+ *   */
+#define XAVBUF_AUD_CH_A_DATA_REG4         0X0000C030
+
+#define XAVBUF_AUD_CH_A_DATA_REG4_USER_DATA4_SHIFT   0
+#define XAVBUF_AUD_CH_A_DATA_REG4_USER_DATA4_WIDTH   32
+#define XAVBUF_AUD_CH_A_DATA_REG4_USER_DATA4_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_A_DATA_REG5
+ *   */
+#define XAVBUF_AUD_CH_A_DATA_REG5         0X0000C034
+
+#define XAVBUF_AUD_CH_A_DATA_REG5_USER_DATA5_SHIFT   0
+#define XAVBUF_AUD_CH_A_DATA_REG5_USER_DATA5_WIDTH   32
+#define XAVBUF_AUD_CH_A_DATA_REG5_USER_DATA5_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_B_DATA_REG0
+ *   */
+#define XAVBUF_AUD_CH_B_DATA_REG0         0X0000C038
+
+#define XAVBUF_AUD_CH_B_DATA_REG0_USER_DATA0_SHIFT   0
+#define XAVBUF_AUD_CH_B_DATA_REG0_USER_DATA0_WIDTH   32
+#define XAVBUF_AUD_CH_B_DATA_REG0_USER_DATA0_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_B_DATA_REG1
+ *   */
+#define XAVBUF_AUD_CH_B_DATA_REG1         0X0000C03C
+
+#define XAVBUF_AUD_CH_B_DATA_REG1_USER_DATA1_SHIFT   0
+#define XAVBUF_AUD_CH_B_DATA_REG1_USER_DATA1_WIDTH   32
+#define XAVBUF_AUD_CH_B_DATA_REG1_USER_DATA1_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_B_DATA_REG2
+ *   */
+#define XAVBUF_AUD_CH_B_DATA_REG2         0X0000C040
+
+#define XAVBUF_AUD_CH_B_DATA_REG2_USER_DATA2_SHIFT   0
+#define XAVBUF_AUD_CH_B_DATA_REG2_USER_DATA2_WIDTH   32
+#define XAVBUF_AUD_CH_B_DATA_REG2_USER_DATA2_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_B_DATA_REG3
+ *   */
+#define XAVBUF_AUD_CH_B_DATA_REG3         0X0000C044
+
+#define XAVBUF_AUD_CH_B_DATA_REG3_USER_DATA3_SHIFT   0
+#define XAVBUF_AUD_CH_B_DATA_REG3_USER_DATA3_WIDTH   32
+#define XAVBUF_AUD_CH_B_DATA_REG3_USER_DATA3_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_B_DATA_REG4
+ *   */
+#define XAVBUF_AUD_CH_B_DATA_REG4         0X0000C048
+
+#define XAVBUF_AUD_CH_B_DATA_REG4_USER_DATA4_SHIFT   0
+#define XAVBUF_AUD_CH_B_DATA_REG4_USER_DATA4_WIDTH   32
+#define XAVBUF_AUD_CH_B_DATA_REG4_USER_DATA4_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_CH_B_DATA_REG5
+ *   */
+#define XAVBUF_AUD_CH_B_DATA_REG5         0X0000C04C
+
+#define XAVBUF_AUD_CH_B_DATA_REG5_USER_DATA5_SHIFT   0
+#define XAVBUF_AUD_CH_B_DATA_REG5_USER_DATA5_WIDTH   32
+#define XAVBUF_AUD_CH_B_DATA_REG5_USER_DATA5_MASK    0XFFFFFFFF
+
+/**
+ *  * Register: XAVBUF_AUD_SOFT_RST
+ *   */
+#define XAVBUF_AUD_SOFT_RST         0X0000CC00
+
+#define XAVBUF_AUD_SOFT_RST_EXTRA_BS_CONTROL_SHIFT   2
+#define XAVBUF_AUD_SOFT_RST_EXTRA_BS_CONTROL_WIDTH   1
+#define XAVBUF_AUD_SOFT_RST_EXTRA_BS_CONTROL_MASK    0X00000004
+
+#define XAVBUF_AUD_SOFT_RST_LINE_RST_DISABLE_SHIFT   1
+#define XAVBUF_AUD_SOFT_RST_LINE_RST_DISABLE_WIDTH   1
+#define XAVBUF_AUD_SOFT_RST_LINE_RST_DISABLE_MASK    0X00000002
+
+#define XAVBUF_AUD_SOFT_RST_AUD_SRST_SHIFT   0
+#define XAVBUF_AUD_SOFT_RST_AUD_SRST_WIDTH   1
+#define XAVBUF_AUD_SOFT_RST_AUD_SRST_MASK    0X00000001
+
+/**
+ *  * Register: XAVBUF_PATGEN_CRC_R
+ *   */
+#define XAVBUF_PATGEN_CRC_R         0X0000CC10
+
+#define XAVBUF_PATGEN_CRC_R_CRC_R_SHIFT   0
+#define XAVBUF_PATGEN_CRC_R_CRC_R_WIDTH   16
+#define XAVBUF_PATGEN_CRC_R_CRC_R_MASK    0X0000FFFF
+
+/**
+ *  * Register: XAVBUF_PATGEN_CRC_G
+ *   */
+#define XAVBUF_PATGEN_CRC_G         0X0000CC14
+
+#define XAVBUF_PATGEN_CRC_G_CRC_G_SHIFT   0
+#define XAVBUF_PATGEN_CRC_G_CRC_G_WIDTH   16
+#define XAVBUF_PATGEN_CRC_G_CRC_G_MASK    0X0000FFFF
+
+/**
+ *  * Register: XAVBUF_PATGEN_CRC_B
+ *   */
+#define XAVBUF_PATGEN_CRC_B         0X0000CC18
+
+#define XAVBUF_PATGEN_CRC_B_CRC_B_SHIFT   0
+#define XAVBUF_PATGEN_CRC_B_CRC_B_WIDTH   16
+#define XAVBUF_PATGEN_CRC_B_CRC_B_MASK    0X0000FFFF
+
+#define XAVBUF_NUM_SUPPORTED			52
+
+#define XAVBUF_BUF_4BIT_SF			0x11111
+#define XAVBUF_BUF_5BIT_SF			0x10842
+#define XAVBUF_BUF_6BIT_SF			0x10410
+#define XAVBUF_BUF_8BIT_SF			0x10101
+#define XAVBUF_BUF_10BIT_SF			0x10040
+#define XAVBUF_BUF_12BIT_SF			0x10000
+
+#define XAVBUF_BUF_6BPC				0x000
+#define XAVBUF_BUF_8BPC				0x001
+#define XAVBUF_BUF_10BPC			0x010
+#define XAVBUF_BUF_12BPC			0x011
+
+#define XAVBUF_CHBUF_V_BURST_LEN		0xF
+#define XAVBUF_CHBUF_A_BURST_LEN		0x3
+
+#define XAVBUF_PL_CLK				0x0
+#define XAVBUF_PS_CLK				0x1
+
+#define XAVBUF_NUM_SUPPORTED_NLVID		25
+#define XAVBUF_NUM_SUPPORTED_NLGFX		14
+#define XAVBUF_NUM_SUPPORTED_LIVE		14
+#define XAVBUF_NUM_OUTPUT_FORMATS		14
+
+/**
+ * Address mapping for PLL (CRF and CRL)
+ */
+
+/* Base Address for CLOCK in FPD. */
+#define XAVBUF_CLK_FPD_BASEADDR		0XFD1A0000
+
+/* Base Address for CLOCK in LPD. */
+#define XAVBUF_CLK_LPD_BASEADDR		0XFF5E0000
+
+/**
+ * The following constants define values to manipulate
+ * the bits of the VPLL control register.
+ */
+#define XAVBUF_PLL_CTRL				0X00000020
+
+#define XAVBUF_PLL_CTRL_POST_SRC_SHIFT		24
+#define XAVBUF_PLL_CTRL_POST_SRC_WIDTH		3
+#define XAVBUF_PLL_CTRL_POST_SRC_MASK		0X07000000
+
+#define XAVBUF_PLL_CTRL_PRE_SRC_SHIFT		20
+#define XAVBUF_VPLL_CTRL_PRE_SRC_WIDTH		3
+#define XAVBUF_VPLL_CTRL_PRE_SRC_MASK		0X00700000
+
+#define XAVBUF_PLL_CTRL_CLKOUTDIV_SHIFT		17
+#define XAVBUF_PLL_CTRL_CLKOUTDIV_WIDTH		1
+#define XAVBUF_PLL_CTRL_CLKOUTDIV_MASK		0X00020000
+
+#define XAVBUF_PLL_CTRL_DIV2_SHIFT		16
+#define XAVBUF_PLL_CTRL_DIV2_WIDTH		1
+#define XAVBUF_PLL_CTRL_DIV2_MASK		0X00010000
+
+#define XAVBUF_PLL_CTRL_FBDIV_SHIFT		8
+#define XAVBUF_PLL_CTRL_FBDIV_WIDTH		7
+#define XAVBUF_PLL_CTRL_FBDIV_MASK		0X00007F00
+
+#define XAVBUF_PLL_CTRL_BYPASS_SHIFT		3
+#define XAVBUF_PLL_CTRL_BYPASS_WIDTH		1
+#define XAVBUF_PLL_CTRL_BYPASS_MASK		0X00000008
+
+#define XAVBUF_PLL_CTRL_RESET_SHIFT		0
+#define XAVBUF_PLL_CTRL_RESET_WIDTH		1
+#define XAVBUF_PLL_CTRL_RESET_MASK		0X00000001
+
+/**
+ * The following constants define values to manipulate
+ * the bits of the PLL config register.
+ */
+#define XAVBUF_PLL_CFG			0X00000024
+
+#define XAVBUF_PLL_CFG_LOCK_DLY_SHIFT	25
+#define XAVBUF_PLL_CFG_LOCK_DLY_WIDTH   7
+#define XAVBUF_PLL_CFG_LOCK_DLY_MASK    0XFE000000
+
+#define XAVBUF_PLL_CFG_LOCK_CNT_SHIFT	13
+#define XAVBUF_PLL_CFG_LOCK_CNT_WIDTH	10
+#define XAVBUF_PLL_CFG_LOCK_CNT_MASK	0X007FE000
+
+#define XAVBUF_PLL_CFG_LFHF_SHIFT	10
+#define XAVBUF_PLL_CFG_LFHF_WIDTH	2
+#define XAVBUF_PLL_CFG_LFHF_MASK	0X00000C00
+
+#define XAVBUF_PLL_CFG_CP_SHIFT		5
+#define XAVBUF_PLL_CFG_CP_WIDTH		4
+#define XAVBUF_PLL_CFG_CP_MASK		0X000001E0
+
+#define XAVBUF_PLL_CFG_RES_SHIFT	0
+#define XAVBUF_PLL_CFG_RES_WIDTH	4
+#define XAVBUF_PLL_CFG_RES_MASK		0X0000000F
+
+/**
+ * The following constants define values to manipulate
+ * the bits of the VPLL fractional config register.
+ */
+#define XAVBUF_PLL_FRAC_CFG			0X00000028
+
+#define XAVBUF_PLL_FRAC_CFG_ENABLED_SHIFT	31
+#define XAVBUF_PLL_FRAC_CFG_ENABLED_WIDTH	1
+#define XAVBUF_PLL_FRAC_CFG_ENABLED_MASK	0X80000000
+
+#define XAVBUF_PLL_FRAC_CFG_SEED_SHIFT		22
+#define XAVBUF_PLL_FRAC_CFG_SEED_WIDTH		3
+#define XAVBUF_PLL_FRAC_CFG_SEED_MASK		0X01C00000
+
+#define XAVBUF_PLL_FRAC_CFG_ALGRTHM_SHIFT	19
+#define XAVBUF_PLL_FRAC_CFG_ALGRTHM_WIDTH	1
+#define XAVBUF_PLL_FRAC_CFG_ALGRTHM_MASK	0X00080000
+
+#define XAVBUF_PLL_FRAC_CFG_ORDER_SHIFT		18
+#define XAVBUF_PLL_FRAC_CFG_ORDER_WIDTH		1
+#define XAVBUF_PLL_FRAC_CFG_ORDER_MASK		0X00040000
+
+#define XAVBUF_PLL_FRAC_CFG_DATA_SHIFT		0
+#define XAVBUF_PLL_FRAC_CFG_DATA_WIDTH		16
+#define XAVBUF_PLL_FRAC_CFG_DATA_MASK		0X0000FFFF
+
+/**
+ * The following constants define values to manipulate
+ * the bits of the PLL STATUS register.
+ */
+#define XAVBUF_PLL_STATUS			0X00000044
+
+#define XAVBUF_PLL_STATUS_VPLL_STABLE_SHIFT	5
+#define XAVBUF_PLL_STATUS_VPLL_STABLE_WIDTH	1
+#define XAVBUF_PLL_STATUS_VPLL_STABLE_MASK	0X00000020
+
+#define XAVBUF_PLL_STATUS_DPLL_STABLE_SHIFT	4
+#define XAVBUF_PLL_STATUS_DPLL_STABLE_WIDTH	1
+#define XAVBUF_PLL_STATUS_DPLL_STABLE_MASK	0X00000010
+
+#define XAVBUF_PLL_STATUS_APLL_STABLE_SHIFT	3
+#define XAVBUF_PLL_STATUS_APLL_STABLE_WIDTH	1
+#define XAVBUF_PLL_STATUS_APLL_STABLE_MASK	0X00000008
+
+#define XAVBUF_PLL_STATUS_VPLL_LOCK_SHIFT	2
+#define XAVBUF_PLL_STATUS_VPLL_LOCK_WIDTH	1
+#define XAVBUF_PLL_STATUS_VPLL_LOCK_MASK	0X00000004
+
+#define XAVBUF_PLL_STATUS_DPLL_LOCK_SHIFT	1
+#define XAVBUF_PLL_STATUS_DPLL_LOCK_WIDTH	1
+#define XAVBUF_PLL_STATUS_DPLL_LOCK_MASK	0X00000002
+
+#define XAVBUF_PLL_STATUS_APLL_LOCK_SHIFT	0
+#define XAVBUF_PLL_STATUS_APLL_LOCK_WIDTH	1
+#define XAVBUF_PLL_STATUS_APLL_LOCK_MASK	0X00000001
+
+/**
+ * The following constants define values to manipulate
+ * the bits of the VIDEO reference control register.
+ */
+#define XAVBUF_VIDEO_REF_CTRL			0X00000070
+
+#define XAVBUF_VIDEO_REF_CTRL_CLKACT_SHIFT	24
+#define XAVBUF_VIDEO_REF_CTRL_CLKACT_WIDTH	1
+#define XAVBUF_VIDEO_REF_CTRL_CLKACT_MASK	0X01000000
+
+#define XAVBUF_VIDEO_REF_CTRL_DIVISOR1_SHIFT	16
+#define XAVBUF_VIDEO_REF_CTRL_DIVISOR1_WIDTH	6
+#define XAVBUF_VIDEO_REF_CTRL_DIVISOR1_MASK	0X003F0000
+
+#define XAVBUF_VIDEO_REF_CTRL_DIVISOR0_SHIFT	8
+#define XAVBUF_VIDEO_REF_CTRL_DIVISOR0_WIDTH	6
+#define XAVBUF_VIDEO_REF_CTRL_DIVISOR0_MASK	0X00003F00
+
+#define XAVBUF_VIDEO_REF_CTRL_SRCSEL_SHIFT	0
+#define XAVBUF_VIDEO_REF_CTRL_SRCSEL_WIDTH	3
+#define XAVBUF_VIDEO_REF_CTRL_SRCSEL_MASK	0X00000007
+
+/**
+ * The following constants define values to manipulate
+ * the bits of the AUDIO reference control register.
+ */
+#define XAVBUF_AUDIO_REF_CTRL			0X00000074
+
+#define XAVBUF_AUDIO_REF_CTRL_CLKACT_SHIFT	24
+#define XAVBUF_AUDIO_REF_CTRL_CLKACT_WIDTH	1
+#define XAVBUF_AUDIO_REF_CTRL_CLKACT_MASK	0X01000000
+
+#define XAVBUF_AUDIO_REF_CTRL_DIVISOR1_SHIFT	16
+#define XAVBUF_AUDIO_REF_CTRL_DIVISOR1_WIDTH	6
+#define XAVBUF_AUDIO_REF_CTRL_DIVISOR1_MASK	0X003F0000
+
+#define XAVBUF_AUDIO_REF_CTRL_DIVISOR0_SHIFT	8
+#define XAVBUF_AUDIO_REF_CTRL_DIVISOR0_WIDTH	6
+#define XAVBUF_AUDIO_REF_CTRL_DIVISOR0_MASK	0X00003F00
+
+#define XAVBUF_AUDIO_REF_CTRL_SRCSEL_SHIFT	0
+#define XAVBUF_AUDIO_REF_CTRL_SRCSEL_WIDTH	3
+#define XAVBUF_AUDIO_REF_CTRL_SRCSEL_MASK	0X00000007
+
+/**
+ * The following constants define values to manipulate
+ * the bits of the Domain Switch register.
+ * For eg. FPD to LPD.
+ */
+#define XAVBUF_DOMAIN_SWITCH_CTRL		0X00000044
+
+#define XAVBUF_DOMAIN_SWITCH_DIVISOR0_SHIFT	8
+#define XAVBUF_DOMAIN_SWITCH_DIVISOR0_WIDTH	6
+#define XAVBUF_DOMAIN_SWITCH_DIVISOR0_MASK	0X00003F00
+
+/**
+ * The following constants define values to Reference
+ * clock.
+ */
+#define	XAVBUF_Pss_Ref_Clk	0
+#define	XAVBUF_Video_Clk	4
+#define	XAVBUF_Pss_alt_Ref_Clk	5
+#define	XAVBUF_Aux_Ref_clk	6
+#define	XAVBUF_Gt_Crx_Ref_Clk	7
+
+/**
+ * The following constants define values to manipulate
+ * the bits of any register.
+ */
+#define XAVBUF_ENABLE_BIT		1
+#define XAVBUF_DISABLE_BIT		0
+
+/**
+ * The following constants define values available
+ * PLL source to Audio and Video.
+ */
+#define XAVBUF_VPLL_SRC_SEL		0
+#define XAVBUF_DPLL_SRC_SEL		2
+#define XAVBUF_RPLL_TO_FPD_SRC_SEL	3
+
+/******************* Macros (Inline Functions) Definitions ********************/
+
+/** @name Register access macro definitions.
+  * @{
+  */
+#define XAVBuf_In32 Xil_In32
+#define XAVBuf_Out32 Xil_Out32
+/* @} */
+
+/******************************************************************************/
+/**
+ * This is a low-level function that reads from the specified register.
+ *
+ * @param	BaseAddress is the base address of the device.
+ * @param	RegOffset is the register offset to be read from.
+ *
+ * @return	The 32-bit value of the specified register.
+ *
+ * @note	C-style signature:
+ *		u32 XAVBuf_ReadReg(u32 BaseAddress, u32 RegOffset)
+ *
+*******************************************************************************/
+#define XAVBuf_ReadReg(BaseAddress, RegOffset) \
+					XAVBuf_In32((BaseAddress) + (RegOffset))
+
+/******************************************************************************/
+/**
+ * This is a low-level function that writes to the specified register.
+ *
+ * @param	BaseAddress is the base address of the device.
+ * @param	RegOffset is the register offset to write to.
+ * @param	Data is the 32-bit data to write to the specified register.
+ *
+ * @return	None.
+ *
+ * @note	C-style signature:
+ *		void XAVBuf_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+ *
+*******************************************************************************/
+#define XAVBuf_WriteReg(BaseAddress, RegOffset, Data) \
+				XAVBuf_Out32((BaseAddress) + (RegOffset), (Data))
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif //XAVBUF_H_
diff --git a/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_videoformats.c b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_videoformats.c
new file mode 100644
index 0000000..4651cd8
--- /dev/null
+++ b/src/Xilinx/libsrc/avbuf_v2_1/src/xavbuf_videoformats.c
@@ -0,0 +1,227 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xavbuf_videoformats.c
+ * @addtogroup xavbuf_v2_1
+ * @{
+ *
+ * Contains attributes of the video formats mapped to the hardware
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   aad  03/10/17 Initial release.
+ * 2.0   aad  02/22/18 Fixed scaling factors and bits per pixel
+ * 

+ *
+*******************************************************************************/
+
+/******************************* Include Files ********************************/
+
+#include "xavbuf.h"
+
+
+/**************************** Variable Definitions ****************************/
+#ifdef __cplusplus
+extern "C"
+#endif
+
+const XAVBuf_VideoAttribute XAVBuf_SupportedFormats[XAVBUF_NUM_SUPPORTED] =
+{
+	/* Non - Live Video Formats */
+	{ CbY0CrY1, 0, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 16},
+	{ CrY0CbY1, 1, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 16},
+	{ Y0CrY1Cb, 2, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 16},
+	{ Y0CbY1Cr, 3, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 16},
+	{ YV16, 4, Planar,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 16},
+	{ YV24, 5, Planar,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, FALSE, FALSE, 24},
+	{ YV16Ci, 6, SemiPlanar,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 16},
+	{ MONOCHROME, 7, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 8},
+	{ YV16Ci2, 8, SemiPlanar,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, TRUE, 16},
+	{ YUV444, 9, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, FALSE, FALSE, 24},
+	{ RGB888, 10, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 24},
+	{ RGBA8880, 11, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 32},
+	{ RGB888_10BPC, 12, Interleaved,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		FALSE, TRUE, FALSE, 30},
+	{ YUV444_10BPC, 13, Interleaved,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		FALSE, FALSE, FALSE, 30},
+	{ YV16Ci2_10BPC, 14, SemiPlanar,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		TRUE, FALSE, TRUE, 20},
+	{ YV16Ci_10BPC, 15, SemiPlanar,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		TRUE, FALSE, FALSE, 20},
+	{ YV16_10BPC, 16, Planar,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		TRUE, FALSE, FALSE, 20},
+	{ YV24_10BPC, 17, Planar,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		FALSE, FALSE, FALSE, 30},
+	{ MONOCHROME_10BPC, 18, Interleaved,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		TRUE, FALSE, FALSE, 10},
+	{ YV16_420, 19, Planar,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 16},
+	{ YV16Ci_420, 20, SemiPlanar,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 16},
+	{ YV16Ci2_420, 21, SemiPlanar,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, TRUE, 16},
+	{ YV16_420_10BPC, 22, Planar,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		TRUE, FALSE, FALSE, 20},
+	{ YV16Ci_420_10BPC, 23, SemiPlanar,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		TRUE, FALSE, FALSE, 20},
+	{ YV16Ci2_420_10BPC, 24, SemiPlanar,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		TRUE, FALSE, TRUE, 20},
+
+	/* Non-Live Graphics formats */
+	{ RGBA8888, 0, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 32},
+	{ ABGR8888, 1, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 32},
+	{ RGB888_GFX, 2, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 24},
+	{ BGR888, 3, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 24},
+	{ RGBA5551, 4, Interleaved,
+		{XAVBUF_BUF_5BIT_SF, XAVBUF_BUF_5BIT_SF, XAVBUF_BUF_5BIT_SF},
+		FALSE, TRUE, FALSE, 16},
+	{ RGBA4444, 5, Interleaved,
+		{XAVBUF_BUF_4BIT_SF, XAVBUF_BUF_4BIT_SF, XAVBUF_BUF_4BIT_SF},
+		FALSE, TRUE, FALSE, 16},
+	{ RGB565, 6, Interleaved,
+		{XAVBUF_BUF_5BIT_SF, XAVBUF_BUF_6BIT_SF, XAVBUF_BUF_5BIT_SF},
+		FALSE, TRUE, FALSE, 16},
+	{ BPP8, 7, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 8},
+	{ BPP4, 8, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 4},
+	{ BPP2, 9, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 2},
+	{ BPP1, 10, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 1},
+	{ YUV422, 11, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, FALSE, FALSE, 24},
+
+	/* Video Formats for Live Video/Graphics input and output sources */
+	{ RGB_6BPC, 0, Interleaved,
+		{XAVBUF_BUF_6BIT_SF, XAVBUF_BUF_6BIT_SF, XAVBUF_BUF_6BIT_SF},
+		FALSE, TRUE, FALSE, 18},
+	{ RGB_8BPC, 0, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, TRUE, FALSE, 24},
+	{ RGB_10BPC, 0, Interleaved,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		FALSE, TRUE, FALSE, 30},
+	{ RGB_12BPC, 0, Interleaved,
+		{XAVBUF_BUF_12BIT_SF, XAVBUF_BUF_12BIT_SF, XAVBUF_BUF_12BIT_SF},
+		FALSE, TRUE, FALSE, 36},
+	{ YCbCr444_6BPC, 1, Interleaved,
+		{XAVBUF_BUF_6BIT_SF, XAVBUF_BUF_6BIT_SF, XAVBUF_BUF_6BIT_SF},
+		FALSE, FALSE, FALSE, 18},
+	{ YCbCr444_8BPC, 1, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		FALSE, FALSE, FALSE, 24},
+	{ YCbCr444_10BPC, 1, Interleaved,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		FALSE, FALSE, FALSE, 30},
+	{ YCbCr444_12BPC, 1, Interleaved,
+		{XAVBUF_BUF_12BIT_SF, XAVBUF_BUF_12BIT_SF, XAVBUF_BUF_12BIT_SF},
+		FALSE, FALSE, FALSE, 36},
+	{ YCbCr422_8BPC, 2, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 24},
+	{ YCbCr422_10BPC, 2, Interleaved,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		TRUE, FALSE, FALSE, 30},
+	{ YCbCr422_12BPC, 2, Interleaved,
+		{XAVBUF_BUF_12BIT_SF, XAVBUF_BUF_12BIT_SF, XAVBUF_BUF_12BIT_SF},
+		TRUE, FALSE, FALSE, 36},
+	{ YOnly_8BPC, 3, Interleaved,
+		{XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF, XAVBUF_BUF_8BIT_SF},
+		TRUE, FALSE, FALSE, 24},
+	{ YOnly_10BPC, 3, Interleaved,
+		{XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF, XAVBUF_BUF_10BIT_SF},
+		TRUE, FALSE, FALSE, 30},
+	{ YOnly_12BPC, 3, Interleaved,
+		{XAVBUF_BUF_12BIT_SF, XAVBUF_BUF_12BIT_SF, XAVBUF_BUF_12BIT_SF},
+		TRUE, FALSE, FALSE, 36},
+
+};
+
+/** @} */
diff --git a/src/Xilinx/libsrc/axipmon_v6_6/src/Makefile b/src/Xilinx/libsrc/axipmon_v6_6/src/Makefile
new file mode 100644
index 0000000..8c40126
--- /dev/null
+++ b/src/Xilinx/libsrc/axipmon_v6_6/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xaxipmon_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling axipmon"
+
+xaxipmon_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xaxipmon_includes
+
+xaxipmon_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon.c b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon.c
new file mode 100644
index 0000000..fc5d99f
--- /dev/null
+++ b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon.c
@@ -0,0 +1,2123 @@
+/******************************************************************************
+*
+* Copyright (C) 2012 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xaxipmon.c
+* @addtogroup axipmon_v6_6
+* @{
+*
+* This file contains the driver API functions that can be used to access
+* the AXI Performance Monitor device.
+*
+* Refer to the xaxipmon.h header file for more information about this driver.
+*
+* @note 	None.
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.00a bss   02/27/12  First release
+* 2.00a bss   06/23/12  Updated to support v2_00a version of IP.
+* 3.00a bss   09/03/12  Deleted XAxiPmon_SetAgent, XAxiPmon_GetAgent APIs and
+*			modified XAxiPmon_SetMetrics, XAxiPmon_GetMetrics APIs
+*			to support v2_01a version of IP.
+* 3.01a bss   10/25/12  Added XAxiPmon_StartCounters and XAxiPmon_StopCounters
+*			APIs (CR #683799).
+*			Added XAxiPmon_StartEventLog and XAxiPmon_StopEventLog
+*			APIs (CR #683801).
+*			Added XAxiPmon_GetMetricName API (CR #683803).
+*			Modified XAxiPmon_SetMetrics and XAxiPmon_GetMetrics
+*			(CR #683746)
+*			Added XAxiPmon_EnableEventLog,
+*			XAxiPmon_DisableMetricsCounter,
+*			XAxiPmon_EnableMetricsCounter APIs to replace macros.
+*			Added XAxiPmon_SetMetricCounterCutOff,
+*			XAxiPmon_GetMetricCounterCutOff,
+*			XAxiPmon_EnableExternalTrigger and
+*			XAxiPmon_DisableExternalTrigger APIs to support new
+*			version of IP.
+* 4.00a bss   01/17/13  To support new version of IP:
+* 			Added XAxiPmon_SetLogEnableRanges,
+*	  		XAxiPmon_GetLogEnableRanges,
+*			XAxiPmon_EnableMetricCounterTrigger,
+*			XAxiPmon_DisableMetricCounterTrigger,
+*			XAxiPmon_EnableEventLogTrigger,
+*			XAxiPmon_DisableEventLogTrigger,
+*			XAxiPmon_SetWriteLatencyId,
+*			XAxiPmon_SetReadLatencyId,
+*			XAxiPmon_GetWriteLatencyId,
+*			XAxiPmon_GetReadLatencyId APIs and removed
+*			XAxiPmon_SetMetricCounterCutOff,
+*			XAxiPmon_GetMetricCounterCutOff,
+*			XAxiPmon_EnableExternalTrigger and
+*			XAxiPmon_DisableExternalTrigger APIs
+* 5.00a bss   08/26/13  To support new version of IP:
+*			Modified XAxiPmon_CfgInitialize to add Mode of APM and
+*			ScaleFactor parameter.
+*			Modified Assert functions depending on Mode.
+*			Modified XAxiPmon_GetMetricCounter and
+*			XAxiPmon_GetSampledMetricCounter to include
+*			new Counters.
+*			Modified XAxiPmon_SetSampleInterval and
+*			XAxiPmon_GetSampleInterval to remove higher 32 bit
+*			value of SampleInterval since Sample Interval Register
+*			is only 32 bit.
+*			Added XAxiPmon_SetWrLatencyStart,
+*			XAxiPmon_SetWrLatencyEnd, XAxiPmon_SetRdLatencyStart
+*			XAxiPmon_SetRdLatencyEnd, XAxiPmon_GetWrLatencyStart,
+*			XAxiPmon_GetWrLatencyEnd, XAxiPmon_GetRdLatencyStart,
+*			XAxiPmon_GetRdLatencyEnd, XAxiPmon_SetWriteIdMask,
+*			XAxiPmon_SetReadIdMask,
+*			XAxiPmon_GetWriteIdMask and
+*			XAxiPmon_GetReadIdMask APIs.
+*			Renamed:
+*			XAxiPmon_SetWriteLatencyId to XAxiPmon_SetWriteId
+*			XAxiPmon_SetReadLatencyId to XAxiPmon_SetReadId
+*			XAxiPmon_GetWriteLatencyId to XAxiPmon_GetWriteId
+*			XAxiPmon_SetReadLatencyId to XAxiPmon_GetReadId.
+* 6.2   bss  04/21/14   Updated XAxiPmon_CfgInitialize to Reset counters
+*			and FIFOs based on Modes(CR#782671). And if both
+*			profile and trace modes are present set mode as
+*			Advanced.
+* 6.2	bss  03/02/15	Updated XAxiPmon_SetWriteId, XAxiPmon_SetReadId,
+*						XAxiPmon_GetWriteId, XAxiPmon_GetReadId
+*						XAxiPmon_SetWriteIdMask, XAxiPmon_SetReadIdMask,
+*						XAxiPmon_GetWriteIdMask, XAxiPmon_GetReadIdMask
+*						functions to support Zynq MP APM.
+* 6.3	kvn  07/02/15	Modified code according to MISRA-C:2012 guidelines.
+* 6.4   sk   11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
+*                     Changed the prototype of XAxiPmon_CfgInitialize API.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xaxipmon.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+/*****************************************************************************/
+/**
+*
+* This function initializes a specific XAxiPmon device/instance. This function
+* must be called prior to using the AXI Performance Monitor device.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	ConfigPtr points to the XAxiPmon device configuration structure.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. If the address translation is not used then the
+*		physical address is passed.
+*		Unexpected errors may occur if the address mapping is changed
+*		after this function is invoked.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*
+* @note		The user needs to first call the XAxiPmon_LookupConfig() API
+*		which returns the Configuration structure pointer which is
+*		passed as a parameter to the XAxiPmon_CfgInitialize() API.
+*
+******************************************************************************/
+s32 XAxiPmon_CfgInitialize(XAxiPmon *InstancePtr, XAxiPmon_Config *ConfigPtr,
+						UINTPTR EffectiveAddr)
+{
+	/*
+	 * Assert the input arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+
+	/*
+	 * Set the values read from the device config and the base address.
+	 */
+	InstancePtr->Config.DeviceId = ConfigPtr->DeviceId;
+	InstancePtr->Config.BaseAddress = EffectiveAddr;
+	InstancePtr->Config.GlobalClkCounterWidth =
+				ConfigPtr->GlobalClkCounterWidth;
+	InstancePtr->Config.MetricSampleCounterWidth =
+				ConfigPtr->MetricSampleCounterWidth;
+	InstancePtr->Config.IsEventCount =
+				ConfigPtr->IsEventCount;
+	InstancePtr->Config.NumberofSlots =
+				ConfigPtr->NumberofSlots;
+	InstancePtr->Config.NumberofCounters =
+				ConfigPtr->NumberofCounters;
+	InstancePtr->Config.HaveSampledCounters =
+				ConfigPtr->HaveSampledCounters;
+	InstancePtr->Config.IsEventLog =
+				ConfigPtr->IsEventLog;
+	InstancePtr->Config.FifoDepth =
+				ConfigPtr->FifoDepth;
+	InstancePtr->Config.FifoWidth =
+				ConfigPtr->FifoWidth;
+	InstancePtr->Config.TidWidth =
+				ConfigPtr->TidWidth;
+	InstancePtr->Config.Is32BitFiltering = ConfigPtr->Is32BitFiltering;
+
+	InstancePtr->Config.ScaleFactor = ConfigPtr->ScaleFactor;
+
+	if ((ConfigPtr->ModeProfile == ConfigPtr->ModeTrace)
+			|| (ConfigPtr->ModeAdvanced == 1U))
+	{
+		InstancePtr->Mode = XAPM_MODE_ADVANCED;
+	} else if (ConfigPtr->ModeTrace == 1U) {
+		InstancePtr->Mode = XAPM_MODE_TRACE;
+	} else {
+		InstancePtr->Mode = XAPM_MODE_PROFILE;
+	}
+
+	/*
+	 * Indicate the instance is now ready to use, initialized without error.
+	 */
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+
+	/*
+	 * Reset the Counters and FIFO based on Modes.
+	 */
+
+	/* Advanced and Profile */
+	if((InstancePtr->Mode == XAPM_MODE_ADVANCED) ||
+			(InstancePtr->Mode == XAPM_MODE_PROFILE))
+	{
+		(void)XAxiPmon_ResetMetricCounter(InstancePtr);
+	}
+	/* Advanced */
+	if(InstancePtr->Mode == XAPM_MODE_ADVANCED)
+	{
+		XAxiPmon_ResetGlobalClkCounter(InstancePtr);
+	}
+	/* Advanced and Trace */
+	if((InstancePtr->Mode == XAPM_MODE_ADVANCED) ||
+			(InstancePtr->Mode == XAPM_MODE_TRACE))
+	{
+		(void)XAxiPmon_ResetFifo(InstancePtr);
+	}
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function resets all Metric Counters and Sampled Metric Counters of
+* AXI Performance Monitor.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	XST_SUCCESS
+*
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XAxiPmon_ResetMetricCounter(XAxiPmon *InstancePtr)
+{
+
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(InstancePtr->Mode != XAPM_MODE_TRACE);
+
+	/*
+	 * Write the reset value to the Control register to reset
+	 * Metric counters
+	 */
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							 XAPM_CTL_OFFSET);
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+					(RegValue | XAPM_CR_MCNTR_RESET_MASK));
+	/*
+	 * Release from Reset
+	 */
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+				(RegValue & ~(XAPM_CR_MCNTR_RESET_MASK)));
+	return XST_SUCCESS;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function resets Global Clock Counter of AXI Performance Monitor
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XAxiPmon_ResetGlobalClkCounter(XAxiPmon *InstancePtr)
+{
+
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Mode == XAPM_MODE_ADVANCED);
+
+	/*
+	 * Write the reset value to the Control register to reset
+	 * Global Clock Counter
+	 */
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							 XAPM_CTL_OFFSET);
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+					(RegValue | XAPM_CR_GCC_RESET_MASK));
+
+	/*
+	 * Release from Reset
+	 */
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+				(RegValue & ~(XAPM_CR_GCC_RESET_MASK)));
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function resets Streaming FIFO of AXI Performance Monitor
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	XST_SUCCESS
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XAxiPmon_ResetFifo(XAxiPmon *InstancePtr)
+{
+
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(InstancePtr->Mode != XAPM_MODE_PROFILE);
+
+	/* Check Event Logging is enabled in Hardware */
+	if((InstancePtr->Config.IsEventLog == 0U) &&
+			(InstancePtr->Mode == XAPM_MODE_ADVANCED))
+	{
+		/*Event logging not enabled in Hardware*/
+		return XST_SUCCESS;
+	}
+	/*
+	 * Write the reset value to the Control register to reset
+	 * FIFO
+	 */
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							 XAPM_CTL_OFFSET);
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+					(RegValue | XAPM_CR_FIFO_RESET_MASK));
+	/*
+	 * Release from Reset
+	 */
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+				(RegValue & ~(XAPM_CR_FIFO_RESET_MASK)));
+
+	return XST_SUCCESS;
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets Ranges for Incrementers depending on parameters passed.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	IncrementerNum specifies the Incrementer for which Ranges
+*		need to be set
+* @param 	RangeUpper specifies the Upper limit in 32 bit Register
+* @param 	RangeLower specifies the Lower limit in 32 bit Register
+*
+* @return	None.
+*
+* @note		None
+*
+*****************************************************************************/
+void XAxiPmon_SetIncrementerRange(XAxiPmon *InstancePtr, u8 IncrementerNum,
+					u16 RangeUpper,	u16 RangeLower)
+ {
+
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Mode == XAPM_MODE_ADVANCED);
+	Xil_AssertVoid(IncrementerNum < XAPM_MAX_COUNTERS);
+
+	/*
+	 * Write to the specified Range register
+	 */
+	RegValue = (u32)RangeUpper << 16;
+	RegValue |= RangeLower;
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_RANGE0_OFFSET + ((u32)IncrementerNum * (u32)16)),
+			RegValue);
+ }
+
+/****************************************************************************/
+/**
+*
+* This function returns the Ranges of Incrementers Registers.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	IncrementerNum specifies the Incrementer for which Ranges
+*		need to be returned.
+* @param 	RangeUpper specifies the user reference variable which returns
+*		the Upper Range Value of the specified Incrementer.
+* @param 	RangeLower specifies the user reference variable which returns
+*		the Lower Range Value of the specified Incrementer.
+*
+* @return	None.
+*
+* @note		None
+*
+*****************************************************************************/
+void XAxiPmon_GetIncrementerRange(XAxiPmon *InstancePtr, u8 IncrementerNum,
+				u16 *RangeUpper, u16 *RangeLower)
+ {
+
+	u32 RegValue;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Mode == XAPM_MODE_ADVANCED);
+	Xil_AssertVoid(IncrementerNum < XAPM_MAX_COUNTERS);
+
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+				((u32)XAPM_RANGE0_OFFSET + ((u32)IncrementerNum * (u32)16)));
+
+	*RangeLower = (u16)(RegValue & 0x0000FFFFU);
+	*RangeUpper = (u16)((RegValue >> 16) & 0x0000FFFFU);
+ }
+
+/****************************************************************************/
+/**
+*
+* This function sets the Sample Interval Register
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	SampleInterval is the Sample Interval value to be set
+*
+* @return	None
+*
+* @note		None.
+*
+*****************************************************************************/
+void XAxiPmon_SetSampleInterval(XAxiPmon *InstancePtr, u32 SampleInterval)
+{
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Mode != XAPM_MODE_TRACE);
+
+	/*
+	 * Set Sample Interval Lower
+	 */
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+		XAPM_SI_LOW_OFFSET, SampleInterval);
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the contents of Sample Interval Register
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	SampleInterval is a pointer where the Sample Interval
+*		Counter value is returned.
+*
+* @return 	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XAxiPmon_GetSampleInterval(XAxiPmon *InstancePtr, u32 *SampleInterval)
+{
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Mode != XAPM_MODE_TRACE);
+
+	/*
+	 * Set Sample Interval Lower
+	 */
+	*SampleInterval = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+				XAPM_SI_LOW_OFFSET);
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets Metrics for specified Counter in the corresponding
+* Metric Selector Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	Slot is the slot ID for which specified counter has to
+*		be connected.
+* @param	Metrics is one of the Metric Sets. User has to use
+*		XAPM_METRIC_SET_* macros in xaxipmon.h for this parameter
+* @param	CounterNum is the Counter Number.
+*		The valid values are 0 to 9.
+*
+* @return	XST_SUCCESS if Success
+*		XST_FAILURE if Failure
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XAxiPmon_SetMetrics(XAxiPmon *InstancePtr, u8 Slot, u8 Metrics,
+						u8 CounterNum)
+{
+	u32 RegValue;
+	u32 Mask;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(InstancePtr->Mode == XAPM_MODE_ADVANCED);
+	Xil_AssertNonvoid(Slot < XAPM_MAX_AGENTS);
+	Xil_AssertNonvoid((Metrics <= XAPM_METRIC_SET_22) ||
+			(Metrics == XAPM_METRIC_SET_30));
+	Xil_AssertNonvoid(CounterNum < XAPM_MAX_COUNTERS);
+
+	/* Find Mask value to force zero in counternum byte range */
+	if ((CounterNum == 0U) || (CounterNum == 4U) || (CounterNum == 8U)) {
+		Mask = 0xFFFFFF00U;
+	}
+	else if ((CounterNum == 1U) || (CounterNum == 5U) || (CounterNum == 9U)) {
+		Mask = 0xFFFF00FFU;
+	}
+	else if ((CounterNum == 2U) || (CounterNum == 6U)) {
+		Mask = 0xFF00FFFFU;
+	}
+	else {
+		Mask = 0x00FFFFFFU;
+	}
+
+	if(CounterNum <= 3U) {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+					    XAPM_MSR0_OFFSET);
+
+		RegValue = RegValue & Mask;
+		RegValue = RegValue | ((u32)Metrics << (CounterNum * (u8)8));
+		RegValue = RegValue | ((u32)Slot << ((CounterNum * (u8)8) + (u8)5));
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+					(u32)XAPM_MSR0_OFFSET,RegValue);
+	}
+	else if((CounterNum >= 4U) && (CounterNum <= 7U)) {
+		CounterNum = CounterNum - 4U;
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+					    (u32)XAPM_MSR1_OFFSET);
+
+		RegValue = RegValue & Mask;
+		RegValue = RegValue | ((u32)Metrics << (CounterNum * (u8)8));
+		RegValue = RegValue | ((u32)Slot << ((CounterNum * (u8)8) + (u8)5));
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+					XAPM_MSR1_OFFSET,RegValue);
+	}
+	else {
+		CounterNum = CounterNum - 8U;
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+					    XAPM_MSR2_OFFSET);
+
+		RegValue = RegValue & Mask;
+		RegValue = RegValue | ((u32)Metrics << (CounterNum * (u8)8));
+		RegValue = RegValue | ((u32)Slot << ((CounterNum * (u8)8) + (u8)5));
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+					XAPM_MSR2_OFFSET,RegValue);
+	}
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns Metrics in the specified Counter from the corresponding
+* Metric Selector Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	CounterNum is the Counter Number.
+*		The valid values are 0 to 9.
+* @param	Metrics is a reference parameter from application where metrics
+*		of specified counter is filled.
+* @praram	Slot is a reference parameter in which slot Id of
+*		specified counter is filled
+* @return	XST_SUCCESS if Success
+*		XST_FAILURE if Failure
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XAxiPmon_GetMetrics(XAxiPmon *InstancePtr, u8 CounterNum, u8 *Metrics,
+								u8 *Slot)
+{
+	u32 RegValue;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(InstancePtr->Mode == XAPM_MODE_ADVANCED);
+	Xil_AssertNonvoid(CounterNum <= XAPM_MAX_COUNTERS);
+
+	if(CounterNum <= 3U) {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+					XAPM_MSR0_OFFSET);
+		*Metrics = (u8)(RegValue >> (CounterNum * (u8)8)) & 0x1FU;
+		*Slot 	= (u8)(RegValue >> ((CounterNum * (u8)8) + (u8)5)) & 0x07U;
+
+	}
+	else if((CounterNum >= 4U) && (CounterNum <= 7U)) {
+		CounterNum = CounterNum - 4U;
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+					XAPM_MSR1_OFFSET);
+		*Metrics = (u8)(RegValue >> (CounterNum * (u8)8)) & 0x1FU;
+		*Slot 	= (u8)(RegValue >> ((CounterNum * (u8)8) + (u8)5)) & 0x07U;
+	}
+	else {
+		CounterNum = CounterNum - 8U;
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+					XAPM_MSR2_OFFSET);
+		*Metrics = (u8)(RegValue >> (CounterNum * (u8)8)) & 0x1FU;
+		*Slot 	= (u8)(RegValue >> ((CounterNum * (u8)8) + (u8)5)) & 0x07U;
+	}
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the contents of the Global Clock Counter Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	CntHighValue is the user space pointer with which upper 32 bits
+*		of Global Clock Counter has to be filled
+* @param	CntLowValue is the user space pointer with which lower 32 bits
+*		of Global Clock Counter has to be filled
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XAxiPmon_GetGlobalClkCounter(XAxiPmon *InstancePtr,u32 *CntHighValue,
+							u32 *CntLowValue)
+{
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Mode == XAPM_MODE_ADVANCED);
+
+	*CntHighValue = 0x0U;
+	*CntLowValue  = 0x0U;
+
+	/*
+	 * If Counter width is 64 bit then Counter Value has to be
+	 * filled at CntHighValue address also.
+	 */
+	if(InstancePtr->Config.GlobalClkCounterWidth == 64) {
+
+		/* Bits[63:32] exists at XAPM_GCC_HIGH_OFFSET */
+		*CntHighValue = XAxiPmon_ReadReg(InstancePtr->
+				Config.BaseAddress, XAPM_GCC_HIGH_OFFSET);
+	}
+	/* Bits[31:0] exists at XAPM_GCC_LOW_OFFSET */
+	*CntLowValue = XAxiPmon_ReadReg(InstancePtr->
+				Config.BaseAddress, XAPM_GCC_LOW_OFFSET);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the contents of the Metric Counter Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	CounterNum is the number of the Metric Counter to be read.
+*		Use the XAPM_METRIC_COUNTER* defines for the counter number in
+*		xaxipmon.h. The valid values are 0 (XAPM_METRIC_COUNTER_0) to
+*		47(XAPM_METRIC_COUNTER_47).
+* @return	RegValue is the content of specified Metric Counter.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XAxiPmon_GetMetricCounter(XAxiPmon *InstancePtr, u32 CounterNum)
+{
+
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(InstancePtr->Mode != XAPM_MODE_TRACE);
+	Xil_AssertNonvoid(CounterNum < XAPM_MAX_COUNTERS_PROFILE);
+
+	if (CounterNum < 10U ) {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_MC0_OFFSET + (CounterNum * (u32)16)));
+	}
+	else if ((CounterNum >= 10U) && (CounterNum < 12U)) {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_MC10_OFFSET + ((CounterNum - (u32)10) * (u32)16)));
+	}
+	else if ((CounterNum >= 12U) && (CounterNum < 24U)) {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_MC12_OFFSET + ((CounterNum - (u32)12) * (u32)16)));
+	}
+	else if ((CounterNum >= 24U) && (CounterNum < 36U)) {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_MC24_OFFSET + ((CounterNum - (u32)24) * (u32)16)));
+	}
+	else {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_MC36_OFFSET + ((CounterNum - (u32)36) * (u32)16)));
+	}
+
+	return RegValue;
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the contents of the Sampled Metric Counter Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	CounterNum is the number of the Sampled Metric Counter to read.
+*		Use the XAPM_METRIC_COUNTER* defines for the counter number in
+*		xaxipmon.h. The valid values are 0 (XAPM_METRIC_COUNTER_0) to
+*		47(XAPM_METRIC_COUNTER_47).
+*
+* @return	RegValue is the content of specified Sampled Metric Counter.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XAxiPmon_GetSampledMetricCounter(XAxiPmon *InstancePtr, u32 CounterNum)
+{
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(InstancePtr->Mode != XAPM_MODE_TRACE);
+	Xil_AssertNonvoid(CounterNum < XAPM_MAX_COUNTERS_PROFILE);
+	Xil_AssertNonvoid((InstancePtr->Mode == XAPM_MODE_PROFILE) ||
+		((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+			(InstancePtr->Config.HaveSampledCounters == 1U)));
+
+	if (CounterNum < 10U ) {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_SMC0_OFFSET + (CounterNum * (u32)16)));
+	}
+	else if ((CounterNum >= 10U) && (CounterNum < 12U)) {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_SMC10_OFFSET + ((CounterNum - (u32)10) * (u32)16)));
+	}
+	else if ((CounterNum >= 12U) && (CounterNum < 24U)) {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_SMC12_OFFSET + ((CounterNum - (u32)12) * (u32)16)));
+	}
+	else if ((CounterNum >= 24U) && (CounterNum < 36U)) {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_SMC24_OFFSET + ((CounterNum - (u32)24) * (u32)16)));
+	}
+	else {
+		RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_SMC36_OFFSET + ((CounterNum - (u32)36) * (u32)16)));
+	}
+
+	return RegValue;
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the contents of the Incrementer Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	IncrementerNum is the number of the Incrementer register to
+*		read.Use the XAPM_INCREMENTER_* defines for the Incrementer
+*		number.The valid values are 0 (XAPM_INCREMENTER_0) to
+*		9 (XAPM_INCREMENTER_9).
+* @param	IncrementerNum is the number of the specified Incrementer
+*		register
+* @return	RegValue is content of specified Metric Incrementer register.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XAxiPmon_GetIncrementer(XAxiPmon *InstancePtr, u32 IncrementerNum)
+{
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+				(InstancePtr->Config.IsEventCount == 1U));
+	Xil_AssertNonvoid(IncrementerNum < XAPM_MAX_COUNTERS);
+
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)XAPM_INC0_OFFSET + (IncrementerNum * (u32)16)));
+
+	return RegValue;
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the contents of the Sampled Incrementer Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	IncrementerNum is the number of the Sampled Incrementer
+*		register to read.Use the XAPM_INCREMENTER_* defines for the
+*		Incrementer number.The valid values are 0 (XAPM_INCREMENTER_0)
+*		to 9 (XAPM_INCREMENTER_9).
+* @param	IncrementerNum is the number of the specified Sampled
+*		Incrementer register
+* @return	RegValue is content of specified Sampled Incrementer register.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XAxiPmon_GetSampledIncrementer(XAxiPmon *InstancePtr, u32 IncrementerNum)
+{
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+				(InstancePtr->Config.IsEventCount == 1U) &&
+				(InstancePtr->Config.HaveSampledCounters == 1U));
+	Xil_AssertNonvoid(IncrementerNum < XAPM_MAX_COUNTERS);
+
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+				((u32)XAPM_SINC0_OFFSET + (IncrementerNum * (u32)16)));
+	return RegValue;
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets Software-written Data Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	SwData is the Software written Data.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XAxiPmon_SetSwDataReg(XAxiPmon *InstancePtr, u32 SwData)
+{
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Set Software-written Data Register
+	 */
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, (u32)XAPM_SWD_OFFSET,
+								SwData);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns contents of Software-written Data Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	SwData.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XAxiPmon_GetSwDataReg(XAxiPmon *InstancePtr)
+{
+	 u32 SwData;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Set Metric Selector Register
+	 */
+	SwData = (u32)XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+						XAPM_SWD_OFFSET);
+	return SwData;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function enables the following in the AXI Performance Monitor:
+*   - Event logging
+*
+* @param        InstancePtr is a pointer to the XAxiPmon instance.
+* @param        FlagEnables is a value to write to the flag enables
+*               register defined by XAPM_FEC_OFFSET. It is recommended
+*               to use the XAPM_FEC_*_MASK mask bits to generate.
+*               A value of 0x0 will disable all events to the event
+*               log streaming FIFO.
+*
+* @return       XST_SUCCESS
+*
+* @note         None
+*
+******************************************************************************/
+s32 XAxiPmon_StartEventLog(XAxiPmon *InstancePtr, u32 FlagEnables)
+{
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((InstancePtr->Mode == XAPM_MODE_TRACE) ||
+				((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+			(InstancePtr->Config.IsEventLog == 1U)));
+
+	/* Read current register value */
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							(u32)XAPM_CTL_OFFSET);
+	/* Flag Enable register is present only in Advanced Mode */
+	if(InstancePtr->Mode == XAPM_MODE_ADVANCED)
+	{
+		/* Now write to flag enables register */
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+				(u32)XAPM_FEC_OFFSET, FlagEnables);
+	}
+
+	/* Write the new value to the Control register to
+	 *	enable event logging */
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, (u32)XAPM_CTL_OFFSET,
+		                  RegValue | XAPM_CR_EVENTLOG_ENABLE_MASK);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function disables the following in the AXI Performance Monitor:
+*   - Event logging
+*
+* @param        InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return       XST_SUCCESS
+*
+* @note         None
+*
+******************************************************************************/
+s32 XAxiPmon_StopEventLog(XAxiPmon *InstancePtr)
+{
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((InstancePtr->Mode == XAPM_MODE_TRACE) ||
+			((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+			(InstancePtr->Config.IsEventLog == 1U)));
+
+	/* Read current register value */
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+						(u32)XAPM_CTL_OFFSET);
+
+	/* Write the new value to the Control register to disable
+	 * event logging */
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, (u32)XAPM_CTL_OFFSET,
+	                    RegValue & ~XAPM_CR_EVENTLOG_ENABLE_MASK);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function enables the following in the AXI Performance Monitor:
+*   - Global clock counter
+*   - All metric counters
+*   - All sampled metric counters
+*
+* @param    InstancePtr is a pointer to the XAxiPmon instance.
+*           SampleInterval is the sample interval for the sampled metric
+*           counters
+*
+* @return   XST_SUCCESS
+*
+* @note	    None
+******************************************************************************/
+s32 XAxiPmon_StartCounters(XAxiPmon *InstancePtr, u32 SampleInterval)
+{
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((InstancePtr->Mode == XAPM_MODE_PROFILE) ||
+				((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+				(InstancePtr->Config.IsEventCount == 1U)));
+
+	/* Read current register value */
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							(u32)XAPM_CTL_OFFSET);
+	/* Globlal Clock Counter is present in Advanced mode only */
+	if(InstancePtr->Mode == XAPM_MODE_ADVANCED)
+	{
+		RegValue = RegValue | XAPM_CR_GCC_ENABLE_MASK;
+	}
+
+	/*
+	 * Write the new value to the Control register to enable
+	 * global clock counter and metric counters
+	 */
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, (u32)XAPM_CTL_OFFSET,
+              RegValue | XAPM_CR_MCNTR_ENABLE_MASK);
+
+	/* Set, enable, and load sampled counters */
+	XAxiPmon_SetSampleInterval(InstancePtr, SampleInterval);
+	XAxiPmon_LoadSampleIntervalCounter(InstancePtr);
+	XAxiPmon_EnableSampleIntervalCounter(InstancePtr);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function disables the following in the AXI Performance Monitor:
+*   - Global clock counter
+*   - All metric counters
+*
+* @param        InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return       XST_SUCCESS
+*
+* @note         None
+*
+******************************************************************************/
+s32 XAxiPmon_StopCounters(XAxiPmon *InstancePtr)
+{
+	u32 RegValue;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((InstancePtr->Mode == XAPM_MODE_PROFILE) ||
+				((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+				(InstancePtr->Config.IsEventCount == 1U)));
+
+	/* Read current register value */
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							(u32)XAPM_CTL_OFFSET);
+	/* Globlal Clock Counter is present in Advanced mode only */
+	if(InstancePtr->Mode == XAPM_MODE_ADVANCED)
+	{
+		RegValue = RegValue & ~XAPM_CR_GCC_ENABLE_MASK;
+	}
+
+	/*
+	 * Write the new value to the Control register to disable
+	 * global clock counter and metric counters
+	 */
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, (u32)XAPM_CTL_OFFSET,
+			RegValue & ~XAPM_CR_MCNTR_ENABLE_MASK);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function enables Metric Counters.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		None
+*
+*******************************************************************************/
+void XAxiPmon_EnableMetricsCounter(XAxiPmon *InstancePtr)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((InstancePtr->Mode == XAPM_MODE_PROFILE) ||
+				((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+				(InstancePtr->Config.IsEventCount == 1U)));
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+						XAPM_CTL_OFFSET);
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+					RegVal | XAPM_CR_MCNTR_ENABLE_MASK);
+}
+/****************************************************************************/
+/**
+*
+* This function disables the Metric Counters.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		None
+*
+*****************************************************************************/
+void XAxiPmon_DisableMetricsCounter(XAxiPmon *InstancePtr)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((InstancePtr->Mode == XAPM_MODE_PROFILE) ||
+				((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+				(InstancePtr->Config.IsEventCount == 1U)));
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							(u32)XAPM_CTL_OFFSET);
+
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, (u32)XAPM_CTL_OFFSET,
+					RegVal & ~(XAPM_CR_MCNTR_ENABLE_MASK));
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the Upper and Lower Ranges for specified Metric Counter
+* Log Enable Register.Event Logging starts when corresponding Metric Counter
+* value falls in between these ranges
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	CounterNum is the Metric Counter number for which
+*		Ranges are to be assigned.Use the XAPM_METRIC_COUNTER*
+*		defines for the counter number in xaxipmon.h.
+*		The valid values are 0 (XAPM_METRIC_COUNTER_0) to
+*		9 (XAPM_METRIC_COUNTER_9).
+* @param 	RangeUpper specifies the Upper limit in 32 bit Register
+* @param 	RangeLower specifies the Lower limit in 32 bit Register
+* @return	None
+*
+* @note		None.
+*
+*****************************************************************************/
+void XAxiPmon_SetLogEnableRanges(XAxiPmon *InstancePtr, u32 CounterNum,
+					u16 RangeUpper, u16 RangeLower)
+{
+	u32 RegValue;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(CounterNum < XAPM_MAX_COUNTERS);
+	Xil_AssertVoid((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+				(InstancePtr->Config.IsEventCount == 1U));
+
+
+	/*
+	 * Write the specified Ranges to corresponding Metric Counter Log
+	 * Enable Register
+	 */
+	RegValue = (u32)RangeUpper << 16;
+	RegValue |= RangeLower;
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+		((u32)XAPM_MC0LOGEN_OFFSET + (CounterNum * (u32)16)), RegValue);
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the Ranges of specified Metric Counter Log
+* Enable Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	CounterNum is the Metric Counter number for which
+*		Ranges are to be returned.Use the XAPM_METRIC_COUNTER*
+*		defines for the counter number in xaxipmon.h.
+*		The valid values are 0 (XAPM_METRIC_COUNTER_0) to
+*		9 (XAPM_METRIC_COUNTER_9).
+*
+* @param 	RangeUpper specifies the user reference variable which returns
+*		the Upper Range Value of the specified Metric Counter
+*		Log Enable Register.
+* @param 	RangeLower specifies the user reference variable which returns
+*		the Lower Range Value of the specified Metric Counter
+*		Log Enable Register.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XAxiPmon_GetLogEnableRanges(XAxiPmon *InstancePtr, u32 CounterNum,
+					u16 *RangeUpper, u16 *RangeLower)
+{
+	u32 RegValue;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(CounterNum < XAPM_MAX_COUNTERS);
+	Xil_AssertVoid((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+				(InstancePtr->Config.IsEventCount == 1U));
+
+
+	RegValue = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+				((u32)XAPM_MC0LOGEN_OFFSET + (CounterNum * (u32)16)));
+
+	*RangeLower = (u16)RegValue & 0xFFFFU;
+	*RangeUpper = (u16)(RegValue >> 16) & 0xFFFFU;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function enables Event Logging.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		None
+*
+*******************************************************************************/
+void XAxiPmon_EnableEventLog(XAxiPmon *InstancePtr)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((InstancePtr->Mode == XAPM_MODE_TRACE) ||
+				((InstancePtr->Mode == XAPM_MODE_ADVANCED) &&
+				(InstancePtr->Config.IsEventLog == 1U)));
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_CTL_OFFSET);
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+				RegVal | XAPM_CR_EVENTLOG_ENABLE_MASK);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function enables External trigger pulse so that Metric Counters can be
+* started on external trigger pulse for a Slot.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		None
+*
+*******************************************************************************/
+void XAxiPmon_EnableMetricCounterTrigger(XAxiPmon *InstancePtr)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Mode != XAPM_MODE_TRACE);
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_CTL_OFFSET);
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+				RegVal | XAPM_CR_MCNTR_EXTTRIGGER_MASK);
+}
+
+/****************************************************************************/
+/**
+*
+* This function disables the External trigger pulse used to start Metric
+* Counters on external trigger pulse for a Slot.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		None
+*
+*****************************************************************************/
+void XAxiPmon_DisableMetricCounterTrigger(XAxiPmon *InstancePtr)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Mode != XAPM_MODE_TRACE);
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_CTL_OFFSET);
+
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+				RegVal & ~(XAPM_CR_MCNTR_EXTTRIGGER_MASK));
+}
+
+/*****************************************************************************/
+/**
+*
+* This function enables External trigger pulse for Event Log
+* so that Event Logging can be started on external trigger pulse for a Slot.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		None
+*
+*******************************************************************************/
+void XAxiPmon_EnableEventLogTrigger(XAxiPmon *InstancePtr)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Mode != XAPM_MODE_PROFILE);
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_CTL_OFFSET);
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+				RegVal | XAPM_CR_EVTLOG_EXTTRIGGER_MASK);
+}
+
+/****************************************************************************/
+/**
+*
+* This function disables the External trigger pulse used to start Event
+* Log on external trigger pulse for a Slot.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		None
+*
+*****************************************************************************/
+void XAxiPmon_DisableEventLogTrigger(XAxiPmon *InstancePtr)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Mode != XAPM_MODE_PROFILE);
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_CTL_OFFSET);
+
+	XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress, XAPM_CTL_OFFSET,
+				RegVal & ~(XAPM_CR_EVTLOG_EXTTRIGGER_MASK));
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns a name for a given Metric.
+*
+* @param        Metrics is one of the Metric Sets. User has to use
+*               XAPM_METRIC_SET_* macros in xaxipmon.h for this parameter
+*
+* @return       const char *
+*
+* @note         None
+*
+*****************************************************************************/
+const char * XAxiPmon_GetMetricName(u8 Metrics)
+{
+	if (Metrics == XAPM_METRIC_SET_0 ){
+		return "Write Transaction Count";
+	}
+	if (Metrics == XAPM_METRIC_SET_1 ){
+			return "Read Transaction Count";
+	}
+	if (Metrics == XAPM_METRIC_SET_2 ){
+			return "Write Byte Count";
+	}
+	if (Metrics == XAPM_METRIC_SET_3 ){
+			return "Read Byte Count";
+	}
+	if (Metrics == XAPM_METRIC_SET_4 ){
+			return "Write Beat Count";
+	}
+	if (Metrics == XAPM_METRIC_SET_5 ){
+			return "Total Read Latency";
+	}
+	if (Metrics == XAPM_METRIC_SET_6 ){
+			return "Total Write Latency";
+	}
+	if (Metrics == XAPM_METRIC_SET_7 ){
+		return "Slv_Wr_Idle_Cnt";
+	}
+	if (Metrics == XAPM_METRIC_SET_8 ){
+			return "Mst_Rd_Idle_Cnt";
+	}
+	if (Metrics == XAPM_METRIC_SET_9 ){
+			return "Num_BValids";
+	}
+	if (Metrics == XAPM_METRIC_SET_10){
+		return "Num_WLasts";
+	}
+	if (Metrics == XAPM_METRIC_SET_11){
+			return "Num_RLasts";
+	}
+	if (Metrics == XAPM_METRIC_SET_12){
+			return "Minimum Write Latency";
+	}
+	if (Metrics == XAPM_METRIC_SET_13){
+			return "Maximum Write Latency";
+	}
+	if (Metrics == XAPM_METRIC_SET_14){
+			return "Minimum Read Latency";
+	}
+	if (Metrics == XAPM_METRIC_SET_15){
+			return "Maximum Read Latency";
+	}
+	if (Metrics == XAPM_METRIC_SET_16){
+			return "Transfer Cycle Count";
+	}
+	if (Metrics == XAPM_METRIC_SET_17){
+			return "Packet Count";
+	}
+	if (Metrics == XAPM_METRIC_SET_18){
+			return "Data Byte Count";
+	}
+	if (Metrics == XAPM_METRIC_SET_19){
+			return "Position Byte Count";
+	}
+	if (Metrics == XAPM_METRIC_SET_20){
+			return "Null Byte Count";
+	}
+	if (Metrics == XAPM_METRIC_SET_21){
+			return "Slv_Idle_Cnt";
+	}
+	if (Metrics == XAPM_METRIC_SET_22){
+			return "Mst_Idle_Cnt";
+	}
+	if (Metrics == XAPM_METRIC_SET_30){
+			return "External event count";
+	}
+	return "Unsupported";
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets Write ID in ID register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	WriteId is the Write ID to be written in ID register.
+*
+* @return	None.
+*
+* @note
+*			If ID filtering for write is of 32 bits(for Zynq MP APM) width then
+*			WriteID is written to XAPM_ID_OFFSET or if it is 16 bit width
+*			then lower 16 bits of WriteID are written to XAPM_ID_OFFSET.
+*
+*****************************************************************************/
+void XAxiPmon_SetWriteId(XAxiPmon *InstancePtr, u32 WriteId)
+{
+	u32 RegVal;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (InstancePtr->Config.Is32BitFiltering == 0U)
+	{
+		RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_ID_OFFSET);
+		RegVal = RegVal & ~(XAPM_ID_WID_MASK);
+		RegVal = RegVal | WriteId;
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+					XAPM_ID_OFFSET, RegVal);
+	} else {
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+					XAPM_ID_OFFSET, WriteId);
+	}
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets Read ID in ID register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	ReadId is the Read ID to be written in ID register.
+*
+* @return	None.
+*
+* @note
+*			If ID filtering for read is of 32 bits(for Zynq MP APM) width then
+*			ReadId is written to XAPM_RID_OFFSET or if it is 16 bit width
+*			then lower 16 bits of ReadId are written to XAPM_ID_OFFSET.
+*
+*****************************************************************************/
+void XAxiPmon_SetReadId(XAxiPmon *InstancePtr, u32 ReadId)
+{
+	u32 RegVal;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (InstancePtr->Config.Is32BitFiltering == 0U)
+	{
+		RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_ID_OFFSET);
+		RegVal = RegVal & ~(XAPM_ID_RID_MASK);
+		RegVal = RegVal | (ReadId << 16);
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+					XAPM_ID_OFFSET, RegVal);
+	} else {
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+					XAPM_RID_OFFSET, ReadId);
+	}
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns Write ID in ID register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	WriteId is the required Write ID in ID register.
+*
+* @note		None.
+*			If ID filtering for write is of 32 bits(for Zynq MP APM) width then
+*			32 bit XAPM_ID_OFFSET contents are returned or if it is 16 bit
+*			width then lower 16 bits of XAPM_ID_OFFSET register are returned.
+*
+*****************************************************************************/
+u32 XAxiPmon_GetWriteId(XAxiPmon *InstancePtr)
+{
+
+	u32 WriteId;
+	u32 RegVal;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (InstancePtr->Config.Is32BitFiltering == 0U)
+	{
+		RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_ID_OFFSET);
+		WriteId = RegVal & XAPM_ID_WID_MASK;
+	} else {
+		WriteId = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_ID_OFFSET);
+	}
+
+	return WriteId;
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns Read ID in ID register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	ReadId is the required Read ID in ID register.
+*
+* @note		None.
+*			If ID filtering for write is of 32 bits(for Zynq MP APM) width then
+*			32 bit XAPM_RID_OFFSET contents are returned or if it is 16 bit
+*			width then higher 16 bits of XAPM_ID_OFFSET register are returned.
+*
+*****************************************************************************/
+u32 XAxiPmon_GetReadId(XAxiPmon *InstancePtr)
+{
+
+	u32 ReadId;
+	u32 RegVal;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (InstancePtr->Config.Is32BitFiltering == 0U)
+	{
+		RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_ID_OFFSET);
+		RegVal = RegVal & XAPM_ID_RID_MASK;
+		ReadId = RegVal >> 16;
+	} else {
+		ReadId = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_RID_OFFSET);
+	}
+
+	return ReadId;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets Latency Start point to calculate write latency.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	Param is XAPM_LATENCY_ADDR_ISSUE or XAPM_LATENCY_ADDR_ACCEPT
+*		in xaxipmon.h.
+* @return	None
+*
+* @note		Param can be 0 - XAPM_LATENCY_ADDR_ISSUE
+*		or 1 - XAPM_LATENCY_ADDR_ACCEPT
+*
+*******************************************************************************/
+void XAxiPmon_SetWrLatencyStart(XAxiPmon *InstancePtr, u8 Param)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_CTL_OFFSET);
+	if (Param == XAPM_LATENCY_ADDR_ACCEPT) {
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+		  XAPM_CTL_OFFSET, RegVal | XAPM_CR_WRLATENCY_START_MASK);
+	}
+	else {
+		XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress,
+			XAPM_CTL_OFFSET,
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress,
+			XAPM_CTL_OFFSET) & ~(XAPM_CR_WRLATENCY_START_MASK));
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets Latency End point to calculate write latency.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	Param is XAPM_LATENCY_LASTWR or XAPM_LATENCY_FIRSTWR
+* 		in xaxipmon.h.
+*
+* @return	None
+*
+* @note		Param can be 0 - XAPM_LATENCY_LASTWR
+*		or 1 - XAPM_LATENCY_FIRSTWR
+*
+*******************************************************************************/
+void XAxiPmon_SetWrLatencyEnd(XAxiPmon *InstancePtr, u8 Param)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_CTL_OFFSET);
+	if (Param == XAPM_LATENCY_FIRSTWR) {
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+		  XAPM_CTL_OFFSET, RegVal | XAPM_CR_WRLATENCY_END_MASK);
+	}
+	else {
+		XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress,
+			XAPM_CTL_OFFSET,
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress,
+			XAPM_CTL_OFFSET) & ~(XAPM_CR_WRLATENCY_END_MASK));
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets Latency Start point to calculate read latency.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	Param is XAPM_LATENCY_ADDR_ISSUE or XAPM_LATENCY_ADDR_ACCEPT
+*		in xaxipmon.h.
+*
+* @return	None
+*
+* @note		Param can be 0 - XAPM_LATENCY_ADDR_ISSUE
+*		or 1 - XAPM_LATENCY_ADDR_ACCEPT
+*
+*******************************************************************************/
+void XAxiPmon_SetRdLatencyStart(XAxiPmon *InstancePtr, u8 Param)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_CTL_OFFSET);
+	if (Param == XAPM_LATENCY_ADDR_ACCEPT) {
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+		  XAPM_CTL_OFFSET, RegVal | XAPM_CR_RDLATENCY_START_MASK);
+	}
+	else {
+		XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress,
+			XAPM_CTL_OFFSET,
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress,
+			XAPM_CTL_OFFSET) & ~(XAPM_CR_RDLATENCY_START_MASK));
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets Latency End point to calculate read latency.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	Param is XAPM_LATENCY_LASTRD or XAPM_LATENCY_FIRSTRD
+* 		in xaxipmon.h.
+*
+* @return	None
+*
+* @note		Param can be 0 - XAPM_LATENCY_LASTRD
+*		or 1 - XAPM_LATENCY_FIRSTRD
+*
+*******************************************************************************/
+void XAxiPmon_SetRdLatencyEnd(XAxiPmon *InstancePtr, u8 Param)
+{
+	u32 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_CTL_OFFSET);
+	if (Param == XAPM_LATENCY_FIRSTRD) {
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+		  XAPM_CTL_OFFSET, RegVal | XAPM_CR_RDLATENCY_END_MASK);
+	}
+	else {
+		XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress,
+			XAPM_CTL_OFFSET,
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress,
+			XAPM_CTL_OFFSET) & ~(XAPM_CR_RDLATENCY_END_MASK));
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns Write Latency Start point.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	Returns 0 - XAPM_LATENCY_ADDR_ISSUE or
+*			1 - XAPM_LATENCY_ADDR_ACCEPT
+*
+* @note		None
+*
+*******************************************************************************/
+u8 XAxiPmon_GetWrLatencyStart(XAxiPmon *InstancePtr)
+{
+	u8 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	RegVal = (u8)XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							(u32)XAPM_CTL_OFFSET);
+	RegVal = RegVal & XAPM_CR_WRLATENCY_START_MASK;
+	if (RegVal != XAPM_LATENCY_ADDR_ISSUE) {
+		return (u8)XAPM_LATENCY_ADDR_ACCEPT;
+	}
+	else {
+		return (u8)XAPM_LATENCY_ADDR_ISSUE;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns Write Latency End point.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	Returns 0 - XAPM_LATENCY_LASTWR or
+*			1 - XAPM_LATENCY_FIRSTWR.
+*
+* @note		None
+*
+*******************************************************************************/
+u8 XAxiPmon_GetWrLatencyEnd(XAxiPmon *InstancePtr)
+{
+	u8 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	RegVal = (u8)XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							(u32)XAPM_CTL_OFFSET);
+	RegVal = RegVal & XAPM_CR_WRLATENCY_END_MASK;
+	if (RegVal != XAPM_LATENCY_LASTWR) {
+		return (u8)XAPM_LATENCY_FIRSTWR;
+	}
+	else {
+		return (u8)XAPM_LATENCY_LASTWR;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns read Latency Start point.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	Returns 0 - XAPM_LATENCY_ADDR_ISSUE or
+*			1 - XAPM_LATENCY_ADDR_ACCEPT
+*
+* @note		None
+*
+*******************************************************************************/
+u8 XAxiPmon_GetRdLatencyStart(XAxiPmon *InstancePtr)
+{
+	u8 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	RegVal = (u8)XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							(u32)XAPM_CTL_OFFSET);
+	RegVal = RegVal & XAPM_CR_RDLATENCY_START_MASK;
+
+	if (RegVal != XAPM_LATENCY_ADDR_ISSUE) {
+		return	(u8)XAPM_LATENCY_ADDR_ACCEPT;
+	}
+	else {
+		return (u8)XAPM_LATENCY_ADDR_ISSUE;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns Read Latency End point.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	Returns 0 - XAPM_LATENCY_LASTRD or
+*			1 - XAPM_LATENCY_FIRSTRD.
+*
+* @note		None
+*
+*******************************************************************************/
+u8 XAxiPmon_GetRdLatencyEnd(XAxiPmon *InstancePtr)
+{
+	u8 RegVal;
+
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	RegVal = (u8)XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							(u32)XAPM_CTL_OFFSET);
+	RegVal = RegVal & XAPM_CR_RDLATENCY_END_MASK;
+	if (RegVal != XAPM_LATENCY_LASTRD) {
+		return (u8)XAPM_LATENCY_FIRSTRD;
+	}
+	else {
+		return (u8)XAPM_LATENCY_LASTRD;
+	}
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets Write ID Mask in ID Mask register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	WrMask is the Write ID mask to be written in ID register.
+*
+* @return	None.
+*
+* @note
+*			If ID masking for write is of 32 bits(for Zynq MP APM) width then
+*			WrMask is written to XAPM_IDMASK_OFFSET or if it is 16 bit width
+*			then lower 16 bits of WrMask are written to XAPM_IDMASK_OFFSET.
+*
+*****************************************************************************/
+void XAxiPmon_SetWriteIdMask(XAxiPmon *InstancePtr, u32 WrMask)
+{
+	u32 RegVal;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (InstancePtr->Config.Is32BitFiltering == 0U)
+	{
+		RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_IDMASK_OFFSET);
+		RegVal = RegVal & ~(XAPM_MASKID_WID_MASK);
+		RegVal = RegVal | WrMask;
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+							XAPM_IDMASK_OFFSET, RegVal);
+	} else {
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+							XAPM_IDMASK_OFFSET, WrMask);
+	}
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets Read ID Mask in ID Mask register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	RdMask is the Read ID mask to be written in ID Mask register.
+*
+* @return	None.
+*
+* @note
+*			If ID masking for read is of 32 bits(for Zynq MP APM) width then
+*			RdMask is written to XAPM_RIDMASK_OFFSET or if it is 16 bit width
+*			then lower 16 bits of RdMask are written to XAPM_IDMASK_OFFSET.
+*
+*****************************************************************************/
+void XAxiPmon_SetReadIdMask(XAxiPmon *InstancePtr, u32 RdMask)
+{
+	u32 RegVal;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (InstancePtr->Config.Is32BitFiltering == 0U)
+	{
+		RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_IDMASK_OFFSET);
+		RegVal = RegVal & ~(XAPM_MASKID_RID_MASK);
+		RegVal = RegVal | (RdMask << 16);
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+					XAPM_IDMASK_OFFSET, RegVal);
+	} else {
+		XAxiPmon_WriteReg(InstancePtr->Config.BaseAddress,
+					XAPM_RIDMASK_OFFSET, RdMask);
+	}
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns Write ID Mask in ID Mask register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	WrMask is the required Write ID Mask in ID Mask register.
+*
+* @note
+*			If ID masking for write is of 32 bits(for Zynq MP APM) width then
+*			32 bit XAPM_IDMASK_OFFSET contents are returned or if it is 16 bit
+*			width then lower 16 bits of XAPM_IDMASK_OFFSET register
+*			are returned.
+*
+*****************************************************************************/
+u32 XAxiPmon_GetWriteIdMask(XAxiPmon *InstancePtr)
+{
+
+	u32 WrMask;
+	u32 RegVal;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (InstancePtr->Config.Is32BitFiltering == 0U)
+	{
+		RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_IDMASK_OFFSET);
+		WrMask = RegVal & XAPM_MASKID_WID_MASK;
+	} else {
+		WrMask = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_IDMASK_OFFSET);
+	}
+
+	return WrMask;
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns Read ID Mask in ID Mask register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	RdMask is the required Read ID Mask in ID Mask register.
+*
+* @note
+*			If ID masking for read is of 32 bits(for Zynq MP APM) width then
+*			32 bit XAPM_RIDMASK_OFFSET contents are returned or if it is 16 bit
+*			width then higher 16 bits of XAPM_IDMASK_OFFSET register
+*			are returned.
+*
+*****************************************************************************/
+u32 XAxiPmon_GetReadIdMask(XAxiPmon *InstancePtr)
+{
+
+	u32 RdMask;
+	u32 RegVal;
+	/*
+	 * Assert the arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (InstancePtr->Config.Is32BitFiltering == 0U)
+	{
+		RegVal = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+							XAPM_IDMASK_OFFSET);
+		RegVal = RegVal & XAPM_MASKID_RID_MASK;
+		RdMask = RegVal >> 16;
+	} else {
+		RdMask = XAxiPmon_ReadReg(InstancePtr->Config.BaseAddress,
+								XAPM_RIDMASK_OFFSET);
+	}
+
+	return RdMask;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon.h b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon.h
new file mode 100644
index 0000000..ea347e0
--- /dev/null
+++ b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon.h
@@ -0,0 +1,946 @@
+/******************************************************************************
+*
+* Copyright (C) 2007 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xaxipmon.h
+* @addtogroup axipmon_v6_6
+* @{
+* @details
+*
+* The XAxiPmon driver supports the Xilinx AXI Performance Monitor device.
+*
+* The AXI Performance Monitor device provides following features:
+*
+*	Configurable number of Metric Counters and Incrementers
+* 	Computes performance metrics for Agents connected to
+*	monitor slots (Up to 8 slots)
+*
+* The following Metrics can be computed:
+*
+* Metrics computed for an AXI4 MM agent:
+*	Write Request Count: Total number of write requests by/to the agent.
+*	Read Request Count: Total number of read requests given by/to the
+*			    agent.
+*	Read Latency: It is defined as the time from the start of read address
+*       	      transaction to the beginning of the read data service.
+*	Write Latency: It is defined as the period needed a master completes
+*        	       write data transaction, i.e. from write address
+*        	       transaction to write response from slave.
+*	Write Byte Count: Total number of bytes written by/to the agent.
+*        		  This metric is helpful when calculating the
+*        		  throughput of the system.
+*	Read Byte Count: Total number of bytes read from/by the agent.
+*	Average Write Latency: Average write latency seen by the agent.
+*        		       It can be derived from total write latency
+*        		       and the write request count.
+*	Average Read Latency: Average read latency seen by the agent. It can be
+*        		      derived from total read latency and the read
+*        		      request count.
+*	Master Write Idle Cycle Count: Number of idle cycles caused by the
+*        			       masters during write transactions to
+*        			       the slave.
+*	Slave Write Idle Cycle Count: Number of idle cycles caused by this slave
+*        			      during write transactions to the slave.
+*	Master Read Idle Cycle Count: Number of idle cycles caused by the
+*        			      master during read transactions to the
+*        			      slave.
+*	Slave Read Idle Cycle Count: Number of idle cycles caused by this slave
+*        			     during read transactions to the slave.
+*
+* Metrics computed for an AXI4-Stream agent:
+*
+*	Transfer Cycle Count: Total number of writes by/to the agent.
+*	Data Byte Count: Total number of data bytes written by/to the agent.
+*			 This metric helps in calculating the throughput
+*			 of the system.
+*	Position Byte Count: Total number of position bytes transferred.
+*	Null Byte Count: Total number of null bytes transferred.
+*	Packet Count: Total number of packets transferred.
+*
+* There are three modes : Advanced, Profile and Trace.
+* - Advanced mode has 10 Mertic Counters, Sampled Metric Counters, Incrementors
+*   and Sampled Incrementors.
+* - Profile mode has only 47 Metric Counters and Sampled Metric Counters.
+* - Trace mode has no Counters.
+* User should refer to the hardware device specification for detailed
+* information about the device.
+*
+* This header file contains the prototypes of driver functions that can
+* be used to access the AXI Performance Monitor device.
+*
+*
+*  Initialization and Configuration 
+*
+* The device driver enables higher layer software (e.g., an application) to
+* communicate to the AXI Performance Monitor device.
+*
+* XAxiPmon_CfgInitialize() API is used to initialize the AXI Performance Monitor
+* device. The user needs to first call the XAxiPmon_LookupConfig() API which
+* returns the Configuration structure pointer which is passed as a parameter to
+* the XAxiPmon_CfgInitialize() API.
+*
+*
+* Interrupts
+*
+* The AXI Performance Monitor does not support Interrupts
+*
+*
+*  Virtual Memory 
+*
+* This driver supports Virtual Memory. The RTOS is responsible for calculating
+* the correct device base address in Virtual Memory space.
+*
+*
+*  Threads 
+*
+* This driver is not thread safe. Any needs for threads or thread mutual
+* exclusion must be satisfied by the layer above this driver.
+*
+*  Asserts 
+*
+* Asserts are used within all Xilinx drivers to enforce constraints on argument
+* values. Asserts can be turned off on a system-wide basis by defining, at
+* compile time, the NDEBUG identifier. By default, asserts are turned on and it
+* is recommended that users leave asserts on during development.
+*
+*
+*  Building the driver 
+*
+* The XAxiPmon driver is composed of several source files. This allows the user
+* to build and link only those parts of the driver that are necessary.
+*
+*  Limitations of the driver 
+*
+*
+* 


+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.00a bss    02/27/12 First release
+* 2.00a bss    06/23/12 Updated to support v2_00a version of IP.
+* 3.00a bss    09/03/12 To support v2_01_a version of IP:
+*			Deleted XAxiPmon_SetAgent, XAxiPmon_GetAgent APIs and
+*			added XAPM_FLAG_EVENT, XAPM_FLAG_EVNTSTAR,
+*			XAPM_FLAG_EVNTSTOP.
+*			Deleted XAxiPmon_SetAgent, XAxiPmon_GetAgent APIs and
+*			modified XAxiPmon_SetMetrics, XAxiPmon_GetMetrics APIs
+*			in xaxipmon.c
+*			Deleted XAPM_AGENT_OFFSET Macro in xaxipmon_hw.h
+* 3.01a bss    10/25/12 To support new version of IP:
+*			Added XAPM_MCXLOGEN_OFFSET macros in xaxipmon_hw.h.
+*			Added XAxiPmon_SetMetricCounterCutOff,
+*			XAxiPmon_GetMetricCounterCutOff,
+*			XAxiPmon_EnableExternalTrigger and
+*			XAxiPmon_DisableExternalTrigger APIs in xaxipmon.c
+*			Modified XAxiPmon_SetMetrics and XAxiPmon_GetMetrics
+*			(CR #683746) in xaxipmon.c
+*			Added XAxiPmon_EnableEventLog,
+*			XAxiPmon_DisableMetricsCounter,
+*			XAxiPmon_EnableMetricsCounter APIs in xaxipmon.c to
+*			replace macros in this file.
+*			Added XAPM_FLAG_XXX macros.
+*			Added XAxiPmon_StartCounters and XAxiPmon_StopCounters
+*			APIs (CR #683799).
+*			Added XAxiPmon_StartEventLog and XAxiPmon_StopEventLog
+*			APIs (CR #683801).
+*			Added XAxiPmon_GetMetricName API (CR #683803).
+*			Deleted XAxiPmon_SetAgent, XAxiPmon_GetAgent
+*			declarations (CR #677337)
+* 4.00a bss    01/17/13 To support new version of IP:
+*			Added XAPM_METRIC_SET_12 to XAPM_METRIC_SET_15 macros.
+*			Added XAxiPmon_SetLogEnableRanges,
+*	  		XAxiPmon_GetLogEnableRanges,
+*			XAxiPmon_EnableMetricCounterTrigger,
+*			XAxiPmon_DisableMetricCounterTrigger,
+*			XAxiPmon_EnableEventLogTrigger,
+*			XAxiPmon_DisableEventLogTrigger,
+*			XAxiPmon_SetWriteLatencyId,
+*			XAxiPmon_SetReadLatencyId,
+*			XAxiPmon_GetWriteLatencyId,
+*			XAxiPmon_GetReadLatencyId APIs and removed
+*			XAxiPmon_SetMetricCounterCutOff,
+*			XAxiPmon_GetMetricCounterCutOff,
+*			XAxiPmon_EnableExternalTrigger and
+*			XAxiPmon_DisableExternalTrigger APIs in xaxipmon.c
+*			Added XAPM_LATENCYID_OFFSET,
+*			XAPM_CR_EVTLOG_EXTTRIGGER_MASK,
+*			XAPM_LATENCYID_RID_MASK and XAPM_LATENCYID_WID_MASK in
+*			xaxipmon_hw.h
+* 5.00a bss   08/26/13  To support new version of IP:
+*			XAxiPmon_SampleMetrics Macro.
+*			Modified XAxiPmon_CfgInitialize, Assert functions
+*			Added XAxiPmon_GetMetricCounter,
+*			XAxiPmon_SetSampleInterval, XAxiPmon_GetSampleInterval,
+*			XAxiPmon_SetWrLatencyStart, XAxiPmon_SetWrLatencyEnd,
+*			XAxiPmon_SetRdLatencyStart, XAxiPmon_SetRdLatencyEnd,
+*			XAxiPmon_GetWrLatencyStart, XAxiPmon_GetWrLatencyEnd,
+*			XAxiPmon_GetRdLatencyStart, XAxiPmon_GetRdLatencyEnd,
+*			XAxiPmon_SetWriteIdMask, XAxiPmon_SetReadIdMask,
+*			XAxiPmon_GetWriteIdMask and XAxiPmon_GetReadIdMask APIs
+*			Renamed :
+*			XAxiPmon_SetWriteLatencyId to
+*			XAxiPmon_SetWriteId, XAxiPmon_SetReadLatencyId to
+*			XAxiPmon_SetReadId, XAxiPmon_GetWriteLatencyId to
+*			XAxiPmon_GetWriteId and XAxiPmon_SetReadLatencyId to
+*			XAxiPmon_GetReadId. in xaxipmon.c
+*			Added Macros XAPM_MC10_OFFSET to XAPM_MC47_OFFSET,
+*			XAPM_SMC10_OFFSET to XAPM_SMC47_OFFSET,
+*			XAPM_IDMASK_OFFSET, XAPM_CR_IDFILTER_ENABLE_MASK,
+*			XAPM_CR_WRLATENCY_START_MASK,
+*			XAPM_CR_WRLATENCY_END_MASK,
+*			XAPM_CR_RDLATENCY_START_MASK,
+*			XAPM_CR_RDLATENCY_END_MASK and
+*			XAPM_MAX_COUNTERS_PROFILE.
+*			Renamed:
+*			XAPM_LATENCYID_OFFSET to XAPM_ID_OFFSET,
+*			XAPM_LATENCYID_RID_MASK to XAPM_ID_RID_MASK,
+*			XAPM_LATENCYID_WID_MASK to XAPM_ID_WID_MASK.
+*			in xaxipmon_hw.h.
+*			Modified driver tcl to generate new parameters
+*			ScaleFactor, ModeProfile, ModeTrace and ModeAdvanced
+*			in Config structure.
+* 6.0   adk  19/12/13 Updated as per the New Tcl API's
+* 6.1   adk  16/04/14 Updated the driver tcl for the newly added parameters in
+* 		      The Axi pmon IP.
+* 6.2   bss  04/21/14   Updated XAxiPmon_CfgInitialize in xaxipmon.c to Reset
+*			counters and FIFOs based on Modes(CR#782671). And if
+*			both profile and trace modes are present set mode as
+*			Advanced.
+* 6.2	bss  03/02/15	To support Zynq MP APM:
+*						Added Is32BitFiltering in XAxiPmon_Config structure.
+*						Updated XAxiPmon_SetWriteId, XAxiPmon_SetReadId,
+*						XAxiPmon_GetWriteId, XAxiPmon_GetReadId
+*						XAxiPmon_SetWriteIdMask, XAxiPmon_SetReadIdMask
+*						XAxiPmon_GetWriteIdMask, XAxiPmon_GetReadIdMask
+*						functions in xaxipmon.c.
+*						Added XAPM_RID_OFFSET and XAPM_RIDMASK_OFFSET in
+*						xaxipmon_hw.h
+*
+* 6.3	kvn  07/02/15	Modified code according to MISRA-C:2012 guidelines.
+* 6.4   sk   11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
+*                     Changed the prototype of XAxiPmon_CfgInitialize API.
+* 6.5   ms   01/23/17 Modified xil_printf statement in main function for all
+*                     examples to ensure that "Successfully ran" and "Failed"
+*                     strings are available in all examples. This is a fix
+*                     for CR-965028.
+*       ms   03/17/17 Added readme.txt file in examples folder for doxygen
+*                     generation.
+* 6.6   ms   04/18/17 Modified tcl file to add suffix U for all macro
+*                     definitions of axipmon in xparameters.h
+* 

+*
+*****************************************************************************/
+#ifndef XAXIPMON_H /* Prevent circular inclusions */
+#define XAXIPMON_H /* by using protection macros  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xaxipmon_hw.h"
+
+/************************** Constant Definitions ****************************/
+
+
+/**
+ * @name Macro for Maximum number of Counters
+ *
+ * @{
+ */
+#define XAPM_MAX_COUNTERS		10U /**< Maximum number of Counters */
+#define XAPM_MAX_COUNTERS_PROFILE	48U /**< Maximum number of Counters */
+
+/*@}*/
+
+
+/**
+ * @name Indices for Metric Counters and Sampled Metric Coounters used with
+ * 	 XAxiPmon_GetMetricCounter and XAxiPmon_GetSampledMetricCounter APIs
+ * @{
+ */
+
+#define XAPM_METRIC_COUNTER_0	0U /**< Metric Counter 0 Register Index */
+#define XAPM_METRIC_COUNTER_1	1U /**< Metric Counter 1 Register Index */
+#define XAPM_METRIC_COUNTER_2	2U /**< Metric Counter 2 Register Index */
+#define XAPM_METRIC_COUNTER_3	3U /**< Metric Counter 3 Register Index */
+#define XAPM_METRIC_COUNTER_4	4U /**< Metric Counter 4 Register Index */
+#define XAPM_METRIC_COUNTER_5	5U /**< Metric Counter 5 Register Index */
+#define XAPM_METRIC_COUNTER_6	6U /**< Metric Counter 6 Register Index */
+#define XAPM_METRIC_COUNTER_7	7U /**< Metric Counter 7 Register Index */
+#define XAPM_METRIC_COUNTER_8	8U /**< Metric Counter 8 Register Index */
+#define XAPM_METRIC_COUNTER_9	9U /**< Metric Counter 9 Register Index */
+
+/*@}*/
+
+/**
+ * @name Indices for Incrementers and Sampled Incrementers used with
+ * 	 XAxiPmon_GetIncrementer and XAxiPmon_GetSampledIncrementer APIs
+ * @{
+ */
+
+#define XAPM_INCREMENTER_0	0U /**< Metric Counter 0 Register Index */
+#define XAPM_INCREMENTER_1	1U /**< Metric Counter 0 Register Index */
+#define XAPM_INCREMENTER_2	2U /**< Metric Counter 0 Register Index */
+#define XAPM_INCREMENTER_3	3U /**< Metric Counter 0 Register Index */
+#define XAPM_INCREMENTER_4	4U /**< Metric Counter 0 Register Index */
+#define XAPM_INCREMENTER_5	5U /**< Metric Counter 0 Register Index */
+#define XAPM_INCREMENTER_6	6U /**< Metric Counter 0 Register Index */
+#define XAPM_INCREMENTER_7	7U /**< Metric Counter 0 Register Index */
+#define XAPM_INCREMENTER_8	8U /**< Metric Counter 0 Register Index */
+#define XAPM_INCREMENTER_9	9U /**< Metric Counter 0 Register Index */
+
+/*@}*/
+
+/**
+ * @name Macros for Metric Selector Settings
+ * @{
+ */
+
+#define XAPM_METRIC_SET_0		0U /**< Write Transaction Count */
+#define XAPM_METRIC_SET_1		1U /**< Read Transaction Count */
+#define XAPM_METRIC_SET_2		2U /**< Write Byte Count */
+#define XAPM_METRIC_SET_3		3U /**< Read Byte Count */
+#define XAPM_METRIC_SET_4		4U /**< Write Beat Count */
+#define XAPM_METRIC_SET_5		5U /**< Total Read Latency */
+#define XAPM_METRIC_SET_6		6U /**< Total Write Latency */
+#define XAPM_METRIC_SET_7		7U /**< Slv_Wr_Idle_Cnt */
+#define XAPM_METRIC_SET_8		8U /**< Mst_Rd_Idle_Cnt */
+#define XAPM_METRIC_SET_9		9U /**< Num_BValids */
+#define XAPM_METRIC_SET_10		10U /**< Num_WLasts */
+#define XAPM_METRIC_SET_11		11U /**< Num_RLasts */
+#define XAPM_METRIC_SET_12		12U /**< Minimum Write Latency */
+#define XAPM_METRIC_SET_13		13U /**< Maximum Write Latency */
+#define XAPM_METRIC_SET_14		14U /**< Minimum Read Latency */
+#define XAPM_METRIC_SET_15		15U /**< Maximum Read Latency */
+#define XAPM_METRIC_SET_16		16U /**< Transfer Cycle Count */
+#define XAPM_METRIC_SET_17		17U /**< Packet Count */
+#define XAPM_METRIC_SET_18		18U /**< Data Byte Count */
+#define XAPM_METRIC_SET_19		19U /**< Position Byte Count */
+#define XAPM_METRIC_SET_20		20U /**< Null Byte Count */
+#define XAPM_METRIC_SET_21		21U /**< Slv_Idle_Cnt */
+#define XAPM_METRIC_SET_22		22U /**< Mst_Idle_Cnt */
+#define XAPM_METRIC_SET_30		30U /**< External event count */
+
+
+/*@}*/
+
+
+/**
+ * @name Macros for Maximum number of Agents
+ * @{
+ */
+
+#define XAPM_MAX_AGENTS 	8U /**< Maximum number of Agents */
+
+/*@}*/
+
+/**
+ * @name Macros for Flags in Flag Enable Control Register
+ * @{
+ */
+
+#define XAPM_FLAG_WRADDR	0x00000001 /**< Write Address Flag */
+#define XAPM_FLAG_FIRSTWR	0x00000002 /**< First Write Flag */
+#define XAPM_FLAG_LASTWR	0x00000004 /**< Last Write Flag */
+#define XAPM_FLAG_RESPONSE	0x00000008 /**< Response Flag */
+#define XAPM_FLAG_RDADDR	0x00000010 /**< Read Address Flag */
+#define XAPM_FLAG_FIRSTRD	0x00000020 /**< First Read Flag */
+#define XAPM_FLAG_LASTRD	0x00000040 /**< Last Read Flag */
+#define XAPM_FLAG_SWDATA	0x00010000 /**< Software-written Data Flag */
+#define XAPM_FLAG_EVENT		0x00020000 /**< Last Read Flag */
+#define XAPM_FLAG_EVNTSTOP	0x00040000 /**< Last Read Flag */
+#define XAPM_FLAG_EVNTSTART	0x00080000 /**< Last Read Flag */
+#define XAPM_FLAG_GCCOVF	0x00100000 /**< Global Clock Counter Overflow
+					     *  Flag */
+#define XAPM_FLAG_SCLAPSE	0x00200000 /**< Sample Counter Lapse Flag */
+#define XAPM_FLAG_MC0		0x00400000U /**< Metric Counter 0 Flag */
+#define XAPM_FLAG_MC1		0x00800000U /**< Metric Counter 1 Flag */
+#define XAPM_FLAG_MC2		0x01000000U /**< Metric Counter 2 Flag */
+#define XAPM_FLAG_MC3		0x02000000U /**< Metric Counter 3 Flag */
+#define XAPM_FLAG_MC4		0x04000000U /**< Metric Counter 4 Flag */
+#define XAPM_FLAG_MC5		0x08000000U /**< Metric Counter 5 Flag */
+#define XAPM_FLAG_MC6		0x10000000U /**< Metric Counter 6 Flag */
+#define XAPM_FLAG_MC7		0x20000000U /**< Metric Counter 7 Flag */
+#define XAPM_FLAG_MC8		0x40000000U /**< Metric Counter 8 Flag */
+#define XAPM_FLAG_MC9		0x80000000U /**< Metric Counter 9 Flag */
+
+/*@}*/
+
+/**
+ * @name Macros for Read/Write Latency Start and End points
+ * @{
+ */
+#define XAPM_LATENCY_ADDR_ISSUE		0U /**< Address Issue as start
+					point for Latency calculation*/
+#define XAPM_LATENCY_ADDR_ACCEPT	1U /**< Address Acceptance as start
+					point for Latency calculation*/
+#define XAPM_LATENCY_LASTRD		0U /**< Last Read as end point for
+					Latency calculation */
+#define XAPM_LATENCY_LASTWR		0U /**< Last Write as end point for
+					Latency calculation */
+#define XAPM_LATENCY_FIRSTRD		1U /**< First Read as end point for
+					Latency calculation */
+#define XAPM_LATENCY_FIRSTWR		1U /**< First Write as end point for
+					Latency calculation */
+
+/*@}*/
+
+/**
+ * @name Macros for Modes of APM
+ * @{
+ */
+
+#define XAPM_MODE_TRACE			2U /**< APM in Trace mode */
+
+#define XAPM_MODE_PROFILE		1U /**< APM in Profile mode */
+
+#define XAPM_MODE_ADVANCED		0U /**< APM in Advanced mode */
+
+/*@}*/
+
+/**************************** Type Definitions *******************************/
+
+/**
+ * This typedef contains configuration information for the AXI Performance
+ * Monitor device.
+ */
+typedef struct {
+	u16 DeviceId;			/**< Unique ID of device */
+	UINTPTR BaseAddress;		/**< Device base address */
+	s32 GlobalClkCounterWidth;	/**< Global Clock Counter Width */
+	s32 MetricSampleCounterWidth ;	/**< Metric Sample Counters Width */
+	u8  IsEventCount;		/**< Event Count Enabled 1 - enabled
+							   0 - not enabled */
+	u8  NumberofSlots;		/**< Number of Monitor Slots */
+	u8  NumberofCounters;		/**< Number of Counters */
+	u8  HaveSampledCounters;	/**< Have Sampled Counters 1 - present
+							    0 - Not present */
+	u8 IsEventLog;			/**< Event Logging Enabled 1 - enabled
+							    0 - Not enabled */
+	u32 FifoDepth;			/**< Event Log FIFO Depth */
+	u32 FifoWidth;			/**< Event Log FIFO Width */
+	u32 TidWidth; 			/**< Streaming Interface TID Width */
+	u8  ScaleFactor;		/**< Event Count Scaling factor */
+	u8  ModeAdvanced;		/**< Advanced Mode */
+	u8  ModeProfile;		/**< Profile Mode */
+	u8  ModeTrace;			/**< Trace Mode */
+	u8  Is32BitFiltering;   /**< 32 bit filtering enabled */
+} XAxiPmon_Config;
+
+
+/**
+ * The driver's instance data. The user is required to allocate a variable
+ * of this type for every AXI Performance Monitor device in system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XAxiPmon_Config Config;	/**< XAxiPmon_Config of current device */
+	u32  IsReady;		/**< Device is initialized and ready  */
+	u8   Mode;		/**< APM Mode */
+} XAxiPmon;
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+
+/****************************************************************************/
+/**
+*
+* This routine enables the Global Interrupt.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XAxiPmon_IntrGlobalEnable(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_IntrGlobalEnable(InstancePtr)			\
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, 	\
+			XAPM_GIE_OFFSET, 1)
+
+
+/****************************************************************************/
+/**
+*
+* This routine disables the Global Interrupt.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XAxiPmon_IntrGlobalDisable(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_IntrGlobalDisable(InstancePtr)				\
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, 		\
+				XAPM_GIE_OFFSET, 0)
+
+
+/****************************************************************************/
+/**
+*
+* This routine enables interrupt(s). Use the XAPM_IXR_* constants defined in
+* xaxipmon_hw.h to create the bit-mask to enable interrupts.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	Mask is the mask to enable. Bit positions of 1 will be enabled.
+*		Bit positions of 0 will keep the previous setting. This mask is
+*		formed by OR'ing XAPM_IXR__* bits defined in xaxipmon_hw.h.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XAxiPmon_IntrEnable(XAxiPmon *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XAxiPmon_IntrEnable(InstancePtr, Mask)				     \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_IE_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_IE_OFFSET) | (Mask));
+
+
+/****************************************************************************/
+/**
+*
+* This routine disable interrupt(s). Use the XAPM_IXR_* constants defined in
+* xaxipmon_hw.h to create the bit-mask to disable interrupts.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	Mask is the mask to disable. Bit positions of 1 will be
+*		disabled. Bit positions of 0 will keep the previous setting.
+*		This mask is formed by OR'ing XAPM_IXR_* bits defined in
+*		xaxipmon_hw.h.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XAxiPmon_IntrEnable(XAxiPmon *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XAxiPmon_IntrDisable(InstancePtr, Mask)				     \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_IE_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_IE_OFFSET) | (Mask));
+
+/****************************************************************************/
+/**
+*
+* This routine clears the specified interrupt(s).
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param	Mask is the mask to clear. Bit positions of 1 will be cleared.
+*		This mask is formed by OR'ing XAPM_IXR_* bits defined in
+*		xaxipmon_hw.h.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XAxiPmon_IntrClear(XAxiPmon *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XAxiPmon_IntrClear(InstancePtr, Mask)				     \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_IS_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_IS_OFFSET) | (Mask));
+
+/****************************************************************************/
+/**
+*
+* This routine returns the Interrupt Status Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	Interrupt Status Register contents
+*
+* @note		C-Style signature:
+*		void XAxiPmon_IntrClear(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_IntrGetStatus(InstancePtr)				     \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_IS_OFFSET);
+
+/****************************************************************************/
+/**
+*
+* This function enables the Global Clock Counter.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		C-Style signature:
+*		void XAxiPmon_EnableGlobalClkCounter(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_EnableGlobalClkCounter(InstancePtr) \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_CTL_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_CTL_OFFSET) | XAPM_CR_GCC_ENABLE_MASK);
+
+/****************************************************************************/
+/**
+*
+* This function disbles the Global Clock Counter.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		C-Style signature:
+*		void XAxiPmon_DisableGlobalClkCounter(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_DisableGlobalClkCounter(InstancePtr) \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_CTL_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_CTL_OFFSET) & ~(XAPM_CR_GCC_ENABLE_MASK));
+
+/****************************************************************************/
+/**
+*
+* This function enables the specified flag in Flag Control Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param 	Flag is one of the XAPM_FLAG_* masks defined in xaxipmon.h
+*
+* @return	None
+*
+* @note		C-Style signature:
+*		void XAxiPmon_EnableFlag(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_EnableFlag(InstancePtr, Flag) \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_FEC_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_FEC_OFFSET) | (Flag));
+
+/****************************************************************************/
+/**
+*
+* This function disables the specified flag in Flag Control Register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+* @param 	Flag is one of the XAPM_FLAG_* masks defined in xaxipmon.h*
+* @return	None
+*
+* @note		C-Style signature:
+*		void XAxiPmon_DisableFlag(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_DisableFlag(InstancePtr, Flag) \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_FEC_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_FEC_OFFSET) & ~(Flag));
+
+/****************************************************************************/
+/**
+*
+* This function loads the sample interval register value into the sample
+* interval counter.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		C-Style signature:
+*		void XAxiPmon_LoadSampleIntervalCounter(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_LoadSampleIntervalCounter(InstancePtr) \
+       XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_SICR_OFFSET, \
+							XAPM_SICR_LOAD_MASK);
+
+
+
+/****************************************************************************/
+/**
+*
+* This enables the down count of the sample interval counter.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		C-Style signature:
+*	   void XAxiPmon_EnableSampleIntervalCounter(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_EnableSampleIntervalCounter(InstancePtr) \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_SICR_OFFSET,\
+							XAPM_SICR_ENABLE_MASK);
+
+
+/****************************************************************************/
+/**
+*
+* This disables the down count of the sample interval counter.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		C-Style signature:
+*	    void XAxiPmon_DisableSampleIntervalCounter(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_DisableSampleIntervalCounter(InstancePtr) \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_SICR_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_SICR_OFFSET) & ~(XAPM_SICR_ENABLE_MASK));
+
+/****************************************************************************/
+/**
+*
+* This enables Reset of Metric Counters when Sample Interval Counter lapses.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		C-Style signature:
+*		void XAxiPmon_EnableMetricCounterReset(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_EnableMetricCounterReset(InstancePtr) \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_SICR_OFFSET,\
+						XAPM_SICR_MCNTR_RST_MASK);
+
+/****************************************************************************/
+/**
+*
+* This disables the down count of the sample interval counter.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		C-Style signature:
+*		void XAxiPmon_DisableMetricCounterReset(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_DisableMetricCounterReset(InstancePtr) \
+       XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_SICR_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_SICR_OFFSET) & ~(XAPM_SICR_MCNTR_RST_MASK));
+
+/****************************************************************************/
+/**
+*
+* This function enables the ID Filter Masking.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		C-Style signature:
+*		void XAxiPmon_EnableIDFilter(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_EnableIDFilter(InstancePtr) \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_CTL_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_CTL_OFFSET) | XAPM_CR_IDFILTER_ENABLE_MASK);
+
+/****************************************************************************/
+/**
+*
+* This function disbles the ID Filter masking.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	None
+*
+* @note		C-Style signature:
+*		void XAxiPmon_DisableIDFilter(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_DisableIDFilter(InstancePtr) \
+	XAxiPmon_WriteReg((InstancePtr)->Config.BaseAddress, XAPM_CTL_OFFSET, \
+			XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XAPM_CTL_OFFSET) & ~(XAPM_CR_IDFILTER_ENABLE_MASK));
+
+/****************************************************************************/
+/**
+*
+* This function samples Metric Counters to Sampled Metric Counters by
+* reading Sample Register and also returns interval. i.e. the number of
+* clocks in between previous read to the current read of sample register.
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return	Interval. i.e. the number of clocks in between previous
+*		read to the current read of sample register.
+*
+* @note		C-Style signature:
+*		u32 XAxiPmon_SampleMetrics(XAxiPmon *InstancePtr)
+*
+*****************************************************************************/
+#define XAxiPmon_SampleMetrics(InstancePtr) \
+       XAxiPmon_ReadReg((InstancePtr)->Config.BaseAddress, XAPM_SR_OFFSET);
+
+
+/************************** Function Prototypes *****************************/
+
+/**
+ * Functions in xaxipmon_sinit.c
+ */
+XAxiPmon_Config *XAxiPmon_LookupConfig(u16 DeviceId);
+
+/**
+ * Functions in xaxipmon.c
+ */
+s32 XAxiPmon_CfgInitialize(XAxiPmon *InstancePtr,
+		XAxiPmon_Config *ConfigPtr, UINTPTR EffectiveAddr);
+
+s32 XAxiPmon_ResetMetricCounter(XAxiPmon *InstancePtr);
+
+void XAxiPmon_ResetGlobalClkCounter(XAxiPmon *InstancePtr);
+
+s32 XAxiPmon_ResetFifo(XAxiPmon *InstancePtr);
+
+void XAxiPmon_SetIncrementerRange(XAxiPmon *InstancePtr, u8 IncrementerNum,
+					u16 RangeUpper,	u16 RangeLower);
+
+void XAxiPmon_GetIncrementerRange(XAxiPmon *InstancePtr, u8 IncrementerNum,
+				u16 *RangeUpper, u16 *RangeLower);
+
+void XAxiPmon_SetSampleInterval(XAxiPmon *InstancePtr, u32 SampleInterval);
+
+void XAxiPmon_GetSampleInterval(XAxiPmon *InstancePtr, u32 *SampleInterval);
+
+s32 XAxiPmon_SetMetrics(XAxiPmon *InstancePtr, u8 Slot, u8 Metrics,
+							u8 CounterNum);
+
+s32 XAxiPmon_GetMetrics(XAxiPmon *InstancePtr, u8 CounterNum, u8 *Metrics,
+								u8 *Slot);
+void XAxiPmon_GetGlobalClkCounter(XAxiPmon *InstancePtr,u32 *CntHighValue,
+							u32 *CntLowValue);
+
+u32 XAxiPmon_GetMetricCounter(XAxiPmon *InstancePtr, u32 CounterNum);
+
+u32 XAxiPmon_GetSampledMetricCounter(XAxiPmon *InstancePtr, u32 CounterNum);
+
+u32 XAxiPmon_GetIncrementer(XAxiPmon *InstancePtr, u32 IncrementerNum);
+
+u32 XAxiPmon_GetSampledIncrementer(XAxiPmon *InstancePtr, u32 IncrementerNum);
+
+void XAxiPmon_SetSwDataReg(XAxiPmon *InstancePtr, u32 SwData);
+
+u32 XAxiPmon_GetSwDataReg(XAxiPmon *InstancePtr);
+
+s32 XAxiPmon_StartEventLog(XAxiPmon *InstancePtr, u32 FlagEnables);
+
+s32 XAxiPmon_StopEventLog(XAxiPmon *InstancePtr);
+
+s32 XAxiPmon_StartCounters(XAxiPmon *InstancePtr, u32 SampleInterval);
+
+s32 XAxiPmon_StopCounters(XAxiPmon *InstancePtr);
+
+void XAxiPmon_EnableMetricsCounter(XAxiPmon *InstancePtr);
+
+void XAxiPmon_DisableMetricsCounter(XAxiPmon *InstancePtr);
+
+void XAxiPmon_SetLogEnableRanges(XAxiPmon *InstancePtr, u32 CounterNum,
+					u16 RangeUpper, u16 RangeLower);
+
+void XAxiPmon_GetLogEnableRanges(XAxiPmon *InstancePtr, u32 CounterNum,
+					u16 *RangeUpper, u16 *RangeLower);
+
+void XAxiPmon_EnableEventLog(XAxiPmon *InstancePtr);
+
+void XAxiPmon_EnableMetricCounterTrigger(XAxiPmon *InstancePtr);
+
+void XAxiPmon_DisableMetricCounterTrigger(XAxiPmon *InstancePtr);
+
+void XAxiPmon_EnableEventLogTrigger(XAxiPmon *InstancePtr);
+
+void XAxiPmon_DisableEventLogTrigger(XAxiPmon *InstancePtr);
+
+const char * XAxiPmon_GetMetricName(u8 Metrics);
+
+void XAxiPmon_SetWriteId(XAxiPmon *InstancePtr, u32 WriteId);
+
+void XAxiPmon_SetReadId(XAxiPmon *InstancePtr, u32 ReadId);
+
+u32 XAxiPmon_GetWriteId(XAxiPmon *InstancePtr);
+
+u32 XAxiPmon_GetReadId(XAxiPmon *InstancePtr);
+
+void XAxiPmon_SetWrLatencyStart(XAxiPmon *InstancePtr, u8 Param);
+
+void XAxiPmon_SetWrLatencyEnd(XAxiPmon *InstancePtr, u8 Param);
+
+void XAxiPmon_SetRdLatencyStart(XAxiPmon *InstancePtr, u8 Param);
+
+void XAxiPmon_SetRdLatencyEnd(XAxiPmon *InstancePtr, u8 Param);
+
+u8 XAxiPmon_GetWrLatencyStart(XAxiPmon *InstancePtr);
+
+u8 XAxiPmon_GetWrLatencyEnd(XAxiPmon *InstancePtr);
+
+u8 XAxiPmon_GetRdLatencyStart(XAxiPmon *InstancePtr);
+
+u8 XAxiPmon_GetRdLatencyEnd(XAxiPmon *InstancePtr);
+
+void XAxiPmon_SetWriteIdMask(XAxiPmon *InstancePtr, u32 WrMask);
+
+void XAxiPmon_SetReadIdMask(XAxiPmon *InstancePtr, u32 RdMask);
+
+u32 XAxiPmon_GetWriteIdMask(XAxiPmon *InstancePtr);
+
+u32 XAxiPmon_GetReadIdMask(XAxiPmon *InstancePtr);
+
+
+/**
+ * Functions in xaxipmon_selftest.c
+ */
+s32 XAxiPmon_SelfTest(XAxiPmon *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* End of protection macro. */
+/** @} */
diff --git a/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_g.c b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_g.c
new file mode 100644
index 0000000..29770d9
--- /dev/null
+++ b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_g.c
@@ -0,0 +1,127 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xaxipmon.h"
+
+/*
+* The configuration table for devices
+*/
+
+XAxiPmon_Config XAxiPmon_ConfigTable[XPAR_XAXIPMON_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_APM_0_DEVICE_ID,
+		XPAR_PSU_APM_0_BASEADDR,
+		XPAR_PSU_APM_0_GLOBAL_COUNT_WIDTH,
+		XPAR_PSU_APM_0_METRICS_SAMPLE_COUNT_WIDTH,
+		XPAR_PSU_APM_0_ENABLE_EVENT_COUNT,
+		XPAR_PSU_APM_0_NUM_MONITOR_SLOTS,
+		XPAR_PSU_APM_0_NUM_OF_COUNTERS,
+		XPAR_PSU_APM_0_HAVE_SAMPLED_METRIC_CNT,
+		XPAR_PSU_APM_0_ENABLE_EVENT_LOG,
+		XPAR_PSU_APM_0_FIFO_AXIS_DEPTH,
+		XPAR_PSU_APM_0_FIFO_AXIS_TDATA_WIDTH,
+		XPAR_PSU_APM_0_FIFO_AXIS_TID_WIDTH,
+		XPAR_PSU_APM_0_METRIC_COUNT_SCALE,
+		XPAR_PSU_APM_0_ENABLE_ADVANCED,
+		XPAR_PSU_APM_0_ENABLE_PROFILE,
+		XPAR_PSU_APM_0_ENABLE_TRACE,
+		XPAR_PSU_APM_0_ENABLE_32BIT_FILTER_ID
+	},
+	{
+		XPAR_PSU_APM_1_DEVICE_ID,
+		XPAR_PSU_APM_1_BASEADDR,
+		XPAR_PSU_APM_1_GLOBAL_COUNT_WIDTH,
+		XPAR_PSU_APM_1_METRICS_SAMPLE_COUNT_WIDTH,
+		XPAR_PSU_APM_1_ENABLE_EVENT_COUNT,
+		XPAR_PSU_APM_1_NUM_MONITOR_SLOTS,
+		XPAR_PSU_APM_1_NUM_OF_COUNTERS,
+		XPAR_PSU_APM_1_HAVE_SAMPLED_METRIC_CNT,
+		XPAR_PSU_APM_1_ENABLE_EVENT_LOG,
+		XPAR_PSU_APM_1_FIFO_AXIS_DEPTH,
+		XPAR_PSU_APM_1_FIFO_AXIS_TDATA_WIDTH,
+		XPAR_PSU_APM_1_FIFO_AXIS_TID_WIDTH,
+		XPAR_PSU_APM_1_METRIC_COUNT_SCALE,
+		XPAR_PSU_APM_1_ENABLE_ADVANCED,
+		XPAR_PSU_APM_1_ENABLE_PROFILE,
+		XPAR_PSU_APM_1_ENABLE_TRACE,
+		XPAR_PSU_APM_1_ENABLE_32BIT_FILTER_ID
+	},
+	{
+		XPAR_PSU_APM_2_DEVICE_ID,
+		XPAR_PSU_APM_2_BASEADDR,
+		XPAR_PSU_APM_2_GLOBAL_COUNT_WIDTH,
+		XPAR_PSU_APM_2_METRICS_SAMPLE_COUNT_WIDTH,
+		XPAR_PSU_APM_2_ENABLE_EVENT_COUNT,
+		XPAR_PSU_APM_2_NUM_MONITOR_SLOTS,
+		XPAR_PSU_APM_2_NUM_OF_COUNTERS,
+		XPAR_PSU_APM_2_HAVE_SAMPLED_METRIC_CNT,
+		XPAR_PSU_APM_2_ENABLE_EVENT_LOG,
+		XPAR_PSU_APM_2_FIFO_AXIS_DEPTH,
+		XPAR_PSU_APM_2_FIFO_AXIS_TDATA_WIDTH,
+		XPAR_PSU_APM_2_FIFO_AXIS_TID_WIDTH,
+		XPAR_PSU_APM_2_METRIC_COUNT_SCALE,
+		XPAR_PSU_APM_2_ENABLE_ADVANCED,
+		XPAR_PSU_APM_2_ENABLE_PROFILE,
+		XPAR_PSU_APM_2_ENABLE_TRACE,
+		XPAR_PSU_APM_2_ENABLE_32BIT_FILTER_ID
+	},
+	{
+		XPAR_PSU_APM_5_DEVICE_ID,
+		XPAR_PSU_APM_5_BASEADDR,
+		XPAR_PSU_APM_5_GLOBAL_COUNT_WIDTH,
+		XPAR_PSU_APM_5_METRICS_SAMPLE_COUNT_WIDTH,
+		XPAR_PSU_APM_5_ENABLE_EVENT_COUNT,
+		XPAR_PSU_APM_5_NUM_MONITOR_SLOTS,
+		XPAR_PSU_APM_5_NUM_OF_COUNTERS,
+		XPAR_PSU_APM_5_HAVE_SAMPLED_METRIC_CNT,
+		XPAR_PSU_APM_5_ENABLE_EVENT_LOG,
+		XPAR_PSU_APM_5_FIFO_AXIS_DEPTH,
+		XPAR_PSU_APM_5_FIFO_AXIS_TDATA_WIDTH,
+		XPAR_PSU_APM_5_FIFO_AXIS_TID_WIDTH,
+		XPAR_PSU_APM_5_METRIC_COUNT_SCALE,
+		XPAR_PSU_APM_5_ENABLE_ADVANCED,
+		XPAR_PSU_APM_5_ENABLE_PROFILE,
+		XPAR_PSU_APM_5_ENABLE_TRACE,
+		XPAR_PSU_APM_5_ENABLE_32BIT_FILTER_ID
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_hw.h b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_hw.h
new file mode 100644
index 0000000..b5d20f5
--- /dev/null
+++ b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_hw.h
@@ -0,0 +1,571 @@
+/******************************************************************************
+*
+* Copyright (C) 2012 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xaxipmon_hw.h
+* @addtogroup axipmon_v6_6
+* @{
+*
+* This header file contains identifiers and basic driver functions (or
+* macros) that can be used to access the AXI Performance Monitor.
+*
+* Refer to the device specification for more information about this driver.
+*
+* @note	 None.
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.00a bss    02/27/12 First release
+* 2.00a bss    06/23/12 Updated to support v2_00a version of IP.
+* 3.00a bss    09/03/12 Deleted XAPM_AGENT_OFFSET Macro to support
+*			v2_01a version of IP.
+* 3.01a bss    10/25/12 To support new version of IP:
+*			Added XAPM_MCXLOGEN_OFFSET and
+*			XAPM_CR_EXTERNAL_TRIGGER_MASK macros.
+* 4.00a bss    01/17/13 To support new version of IP:
+*			Added XAPM_LATENCYID_OFFSET,
+*			XAPM_CR_EVTLOG_EXTTRIGGER_MASK,
+*			XAPM_LATENCYID_RID_MASK and XAPM_LATENCYID_WID_MASK
+* 5.00a bss   08/26/13  To support new version of IP:
+*			Added Macros XAPM_MC10_OFFSET to XAPM_MC47_OFFSET,
+*			XAPM_SMC10_OFFSET to XAPM_SMC47_OFFSET.
+*			Added macro XAPM_IDMASK_OFFSET, XAPM_SR_OFFSET.
+*			Added XAPM_CR_IDFILTER_ENABLE_MASK,
+*			XAPM_CR_WRLATENCY_START_MASK,
+*			XAPM_CR_WRLATENCY_END_MASK,
+*			XAPM_CR_RDLATENCY_START_MASK,
+*			XAPM_CR_RDLATENCY_END_MASK, XAPM_MASKID_RID_MASK
+*			and XAPM_MASKID_WID_MASK macros.
+*			Renamed:
+*			XAPM_LATENCYID_OFFSET to XAPM_ID_OFFSET,
+*			XAPM_LATENCYID_RID_MASK to XAPM_ID_RID_MASK,
+*			XAPM_LATENCYID_WID_MASK to XAPM_ID_WID_MASK.
+*
+* 6.2  bss  03/02/15 Added XAPM_RID_OFFSET and XAPM_RIDMASK_OFFSET to support
+*					 Zynq MP APM.
+*
+* 6.3  kvn  07/02/15 Modified code according to MISRA-C:2012 guidelines.
+* 

+*
+*****************************************************************************/
+#ifndef XAXIPMON_HW_H /* Prevent circular inclusions */
+#define XAXIPMON_HW_H /* by using protection macros  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions ****************************/
+
+
+/**@name Register offsets of AXIMONITOR in the Device Config
+ *
+ * The following constants provide access to each of the registers of the
+ * AXI PERFORMANCE MONITOR device.
+ * @{
+ */
+
+#define XAPM_GCC_HIGH_OFFSET		0x00000000U	/**< Global Clock Counter
+							32 to 63 bits  */
+#define XAPM_GCC_LOW_OFFSET		0x00000004U	/**< Global Clock Counter Lower
+							0-31 bits  */
+#define XAPM_SI_HIGH_OFFSET		0x00000020U	/**< Sample Interval MSB */
+#define XAPM_SI_LOW_OFFSET		0x00000024U	/**< Sample Interval LSB */
+#define XAPM_SICR_OFFSET		0x00000028U	/**< Sample Interval Control
+							Register */
+#define XAPM_SR_OFFSET			0x0000002CU	/**< Sample Register */
+#define XAPM_GIE_OFFSET			0x00000030U	/**< Global Interrupt Enable
+							Register */
+#define XAPM_IE_OFFSET			0x00000034U	/**< Interrupt Enable Register */
+#define XAPM_IS_OFFSET			0x00000038U	/**< Interrupt Status Register */
+
+#define XAPM_MSR0_OFFSET		0x00000044U	/**< Metric Selector 0 Register */
+#define XAPM_MSR1_OFFSET		0x00000048U	/**< Metric Selector 1 Register */
+#define XAPM_MSR2_OFFSET		0x0000004CU	/**< Metric Selector 2 Register */
+
+#define XAPM_MC0_OFFSET			0x00000100U	/**< Metric Counter 0 Register */
+#define XAPM_INC0_OFFSET		0x00000104U	/**< Incrementer 0 Register */
+#define XAPM_RANGE0_OFFSET		0x00000108U	/**< Range 0 Register */
+#define XAPM_MC0LOGEN_OFFSET		0x0000010CU	/**< Metric Counter 0
+							Log Enable Register */
+#define XAPM_MC1_OFFSET			0x00000110U	/**< Metric Counter 1 Register */
+#define XAPM_INC1_OFFSET		0x00000114U	/**< Incrementer 1 Register */
+#define XAPM_RANGE1_OFFSET		0x00000118U	/**< Range 1 Register */
+#define XAPM_MC1LOGEN_OFFSET		0x0000011CU	/**< Metric Counter 1
+							Log Enable Register */
+#define XAPM_MC2_OFFSET			0x00000120U	/**< Metric Counter 2 Register */
+#define XAPM_INC2_OFFSET		0x00000124U	/**< Incrementer 2 Register */
+#define XAPM_RANGE2_OFFSET		0x00000128U	/**< Range 2 Register */
+#define XAPM_MC2LOGEN_OFFSET		0x0000012CU	/**< Metric Counter 2
+							Log Enable Register */
+#define XAPM_MC3_OFFSET			0x00000130U	/**< Metric Counter 3 Register */
+#define XAPM_INC3_OFFSET		0x00000134U	/**< Incrementer 3 Register */
+#define XAPM_RANGE3_OFFSET		0x00000138U	/**< Range 3 Register */
+#define XAPM_MC3LOGEN_OFFSET		0x0000013CU	/**< Metric Counter 3
+							Log Enable Register */
+#define XAPM_MC4_OFFSET			0x00000140U	/**< Metric Counter 4 Register */
+#define XAPM_INC4_OFFSET		0x00000144U	/**< Incrementer 4 Register */
+#define XAPM_RANGE4_OFFSET		0x00000148U	/**< Range 4 Register */
+#define XAPM_MC4LOGEN_OFFSET		0x0000014CU	/**< Metric Counter 4
+							Log Enable Register */
+#define XAPM_MC5_OFFSET			0x00000150U	/**< Metric Counter 5
+							Register */
+#define XAPM_INC5_OFFSET		0x00000154U	/**< Incrementer 5 Register */
+#define XAPM_RANGE5_OFFSET		0x00000158U	/**< Range 5 Register */
+#define XAPM_MC5LOGEN_OFFSET		0x0000015CU	/**< Metric Counter 5
+							Log Enable Register */
+#define XAPM_MC6_OFFSET			0x00000160U	/**< Metric Counter 6
+							Register */
+#define XAPM_INC6_OFFSET		0x00000164U	/**< Incrementer 6 Register */
+#define XAPM_RANGE6_OFFSET		0x00000168U	/**< Range 6 Register */
+#define XAPM_MC6LOGEN_OFFSET		0x0000016CU	/**< Metric Counter 6
+							Log Enable Register */
+#define XAPM_MC7_OFFSET			0x00000170U	/**< Metric Counter 7
+							Register */
+#define XAPM_INC7_OFFSET		0x00000174U	/**< Incrementer 7 Register */
+#define XAPM_RANGE7_OFFSET		0x00000178U	/**< Range 7 Register */
+#define XAPM_MC7LOGEN_OFFSET		0x0000017CU	/**< Metric Counter 7
+							Log Enable Register */
+#define XAPM_MC8_OFFSET			0x00000180U	/**< Metric Counter 8
+							Register */
+#define XAPM_INC8_OFFSET		0x00000184U	/**< Incrementer 8 Register */
+#define XAPM_RANGE8_OFFSET		0x00000188U	/**< Range 8 Register */
+#define XAPM_MC8LOGEN_OFFSET		0x0000018CU	/**< Metric Counter 8
+							Log Enable Register */
+#define XAPM_MC9_OFFSET			0x00000190U	/**< Metric Counter 9
+							Register */
+#define XAPM_INC9_OFFSET		0x00000194U	/**< Incrementer 9 Register */
+#define XAPM_RANGE9_OFFSET		0x00000198U	/**< Range 9 Register */
+#define XAPM_MC9LOGEN_OFFSET		0x0000019CU	/**< Metric Counter 9
+							Log Enable Register */
+#define XAPM_SMC0_OFFSET		0x00000200U	/**< Sampled Metric Counter
+							0 Register */
+#define XAPM_SINC0_OFFSET		0x00000204U	/**< Sampled Incrementer
+							0 Register */
+#define XAPM_SMC1_OFFSET		0x00000210U	/**< Sampled Metric Counter
+							1 Register */
+#define XAPM_SINC1_OFFSET		0x00000214U	/**< Sampled Incrementer
+							1 Register */
+#define XAPM_SMC2_OFFSET		0x00000220U	/**< Sampled Metric Counter
+							2 Register */
+#define XAPM_SINC2_OFFSET		0x00000224U	/**< Sampled Incrementer
+							2 Register */
+#define XAPM_SMC3_OFFSET		0x00000230U	/**< Sampled Metric Counter
+							3 Register */
+#define XAPM_SINC3_OFFSET		0x00000234U	/**< Sampled Incrementer
+							3 Register */
+#define XAPM_SMC4_OFFSET		0x00000240U	/**< Sampled Metric Counter
+							4 Register */
+#define XAPM_SINC4_OFFSET		0x00000244U	/**< Sampled Incrementer
+							4 Register */
+#define XAPM_SMC5_OFFSET		0x00000250U	/**< Sampled Metric Counter
+							5 Register */
+#define XAPM_SINC5_OFFSET		0x00000254U	/**< Sampled Incrementer
+							5 Register */
+#define XAPM_SMC6_OFFSET		0x00000260U	/**< Sampled Metric Counter
+							6 Register */
+#define XAPM_SINC6_OFFSET		0x00000264U	/**< Sampled Incrementer
+							6 Register */
+#define XAPM_SMC7_OFFSET		0x00000270U	/**< Sampled Metric Counter
+							7 Register */
+#define XAPM_SINC7_OFFSET		0x00000274U	/**< Sampled Incrementer
+							7 Register */
+#define XAPM_SMC8_OFFSET		0x00000280U	/**< Sampled Metric Counter
+							8 Register */
+#define XAPM_SINC8_OFFSET		0x00000284U	/**< Sampled Incrementer
+							8 Register */
+#define XAPM_SMC9_OFFSET		0x00000290U	/**< Sampled Metric Counter
+							9 Register */
+#define XAPM_SINC9_OFFSET		0x00000294U	/**< Sampled Incrementer
+							9 Register */
+
+#define XAPM_MC10_OFFSET		0x000001A0U	/**< Metric Counter 10
+							Register */
+#define XAPM_MC11_OFFSET		0x000001B0U	/**< Metric Counter 11
+							Register */
+#define XAPM_MC12_OFFSET		0x00000500U	/**< Metric Counter 12
+							Register */
+#define XAPM_MC13_OFFSET		0x00000510U	/**< Metric Counter 13
+							Register */
+#define XAPM_MC14_OFFSET		0x00000520U	/**< Metric Counter 14
+							Register */
+#define XAPM_MC15_OFFSET		0x00000530U	/**< Metric Counter 15
+							Register */
+#define XAPM_MC16_OFFSET		0x00000540U	/**< Metric Counter 16
+							Register */
+#define XAPM_MC17_OFFSET		0x00000550U	/**< Metric Counter 17
+							Register */
+#define XAPM_MC18_OFFSET		0x00000560U	/**< Metric Counter 18
+							Register */
+#define XAPM_MC19_OFFSET		0x00000570U	/**< Metric Counter 19
+							Register */
+#define XAPM_MC20_OFFSET		0x00000580U	/**< Metric Counter 20
+							Register */
+#define XAPM_MC21_OFFSET		0x00000590U	/**< Metric Counter 21
+							Register */
+#define XAPM_MC22_OFFSET		0x000005A0U	/**< Metric Counter 22
+							Register */
+#define XAPM_MC23_OFFSET		0x000005B0U	/**< Metric Counter 23
+							Register */
+#define XAPM_MC24_OFFSET		0x00000700U	/**< Metric Counter 24
+							Register */
+#define XAPM_MC25_OFFSET		0x00000710U	/**< Metric Counter 25
+							Register */
+#define XAPM_MC26_OFFSET		0x00000720U	/**< Metric Counter 26
+							Register */
+#define XAPM_MC27_OFFSET		0x00000730U	/**< Metric Counter 27
+							Register */
+#define XAPM_MC28_OFFSET		0x00000740U	/**< Metric Counter 28
+							Register */
+#define XAPM_MC29_OFFSET		0x00000750U	/**< Metric Counter 29
+							Register */
+#define XAPM_MC30_OFFSET		0x00000760U	/**< Metric Counter 30
+							Register */
+#define XAPM_MC31_OFFSET		0x00000770U	/**< Metric Counter 31
+							Register */
+#define XAPM_MC32_OFFSET		0x00000780U	/**< Metric Counter 32
+							Register */
+#define XAPM_MC33_OFFSET		0x00000790U	/**< Metric Counter 33
+							Register */
+#define XAPM_MC34_OFFSET		0x000007A0U	/**< Metric Counter 34
+							Register */
+#define XAPM_MC35_OFFSET		0x000007B0U	/**< Metric Counter 35
+							Register */
+#define XAPM_MC36_OFFSET		0x00000900U	/**< Metric Counter 36
+							Register */
+#define XAPM_MC37_OFFSET		0x00000910U	/**< Metric Counter 37
+							Register */
+#define XAPM_MC38_OFFSET		0x00000920U	/**< Metric Counter 38
+							Register */
+#define XAPM_MC39_OFFSET		0x00000930U	/**< Metric Counter 39
+							Register */
+#define XAPM_MC40_OFFSET		0x00000940U	/**< Metric Counter 40
+							Register */
+#define XAPM_MC41_OFFSET		0x00000950U	/**< Metric Counter 41
+							Register */
+#define XAPM_MC42_OFFSET		0x00000960U	/**< Metric Counter 42
+							Register */
+#define XAPM_MC43_OFFSET		0x00000970U	/**< Metric Counter 43
+							Register */
+#define XAPM_MC44_OFFSET		0x00000980U	/**< Metric Counter 44
+							Register */
+#define XAPM_MC45_OFFSET		0x00000990U	/**< Metric Counter 45
+							Register */
+#define XAPM_MC46_OFFSET		0x000009A0U	/**< Metric Counter 46
+							Register */
+#define XAPM_MC47_OFFSET		0x000009B0U	/**< Metric Counter 47
+							Register */
+
+#define XAPM_SMC10_OFFSET		0x000002A0U	/**< Sampled Metric Counter
+							10 Register */
+#define XAPM_SMC11_OFFSET		0x000002B0U	/**< Sampled Metric Counter
+							11 Register */
+#define XAPM_SMC12_OFFSET		0x00000600U	/**< Sampled Metric Counter
+							12 Register */
+#define XAPM_SMC13_OFFSET		0x00000610U	/**< Sampled Metric Counter
+							13 Register */
+#define XAPM_SMC14_OFFSET		0x00000620U	/**< Sampled Metric Counter
+							14 Register */
+#define XAPM_SMC15_OFFSET		0x00000630U	/**< Sampled Metric Counter
+							15 Register */
+#define XAPM_SMC16_OFFSET		0x00000640U	/**< Sampled Metric Counter
+							16 Register */
+#define XAPM_SMC17_OFFSET		0x00000650U	/**< Sampled Metric Counter
+							17 Register */
+#define XAPM_SMC18_OFFSET		0x00000660U	/**< Sampled Metric Counter
+							18 Register */
+#define XAPM_SMC19_OFFSET		0x00000670U	/**< Sampled Metric Counter
+							19 Register */
+#define XAPM_SMC20_OFFSET		0x00000680U	/**< Sampled Metric Counter
+							20 Register */
+#define XAPM_SMC21_OFFSET		0x00000690U	/**< Sampled Metric Counter
+							21 Register */
+#define XAPM_SMC22_OFFSET		0x000006A0U	/**< Sampled Metric Counter
+							22 Register */
+#define XAPM_SMC23_OFFSET		0x000006B0U	/**< Sampled Metric Counter
+							23 Register */
+#define XAPM_SMC24_OFFSET		0x00000800U	/**< Sampled Metric Counter
+							24 Register */
+#define XAPM_SMC25_OFFSET		0x00000810U	/**< Sampled Metric Counter
+							25 Register */
+#define XAPM_SMC26_OFFSET		0x00000820U	/**< Sampled Metric Counter
+							26 Register */
+#define XAPM_SMC27_OFFSET		0x00000830U	/**< Sampled Metric Counter
+							27 Register */
+#define XAPM_SMC28_OFFSET		0x00000840U	/**< Sampled Metric Counter
+							28 Register */
+#define XAPM_SMC29_OFFSET		0x00000850U	/**< Sampled Metric Counter
+							29 Register */
+#define XAPM_SMC30_OFFSET		0x00000860U	/**< Sampled Metric Counter
+							30 Register */
+#define XAPM_SMC31_OFFSET		0x00000870U	/**< Sampled Metric Counter
+							31 Register */
+#define XAPM_SMC32_OFFSET		0x00000880U	/**< Sampled Metric Counter
+							32 Register */
+#define XAPM_SMC33_OFFSET		0x00000890U	/**< Sampled Metric Counter
+							33 Register */
+#define XAPM_SMC34_OFFSET		0x000008A0U	/**< Sampled Metric Counter
+							34 Register */
+#define XAPM_SMC35_OFFSET		0x000008B0U	/**< Sampled Metric Counter
+							35 Register */
+#define XAPM_SMC36_OFFSET		0x00000A00U	/**< Sampled Metric Counter
+							36 Register */
+#define XAPM_SMC37_OFFSET		0x00000A10U	/**< Sampled Metric Counter
+							37 Register */
+#define XAPM_SMC38_OFFSET		0x00000A20U	/**< Sampled Metric Counter
+							38 Register */
+#define XAPM_SMC39_OFFSET		0x00000A30U	/**< Sampled Metric Counter
+							39 Register */
+#define XAPM_SMC40_OFFSET		0x00000A40U	/**< Sampled Metric Counter
+							40 Register */
+#define XAPM_SMC41_OFFSET		0x00000A50U	/**< Sampled Metric Counter
+							41 Register */
+#define XAPM_SMC42_OFFSET		0x00000A60U	/**< Sampled Metric Counter
+							42 Register */
+#define XAPM_SMC43_OFFSET		0x00000A70U	/**< Sampled Metric Counter
+							43 Register */
+#define XAPM_SMC44_OFFSET		0x00000A80U	/**< Sampled Metric Counter
+							44 Register */
+#define XAPM_SMC45_OFFSET		0x00000A90U	/**< Sampled Metric Counter
+							45 Register */
+#define XAPM_SMC46_OFFSET		0x00000AA0U	/**< Sampled Metric Counter
+							46 Register */
+#define XAPM_SMC47_OFFSET		0x00000AB0U	/**< Sampled Metric Counter
+							47 Register */
+
+#define XAPM_CTL_OFFSET		 	0x00000300U	/**< Control Register */
+
+#define XAPM_ID_OFFSET			0x00000304U	/**< Latency ID Register */
+
+#define XAPM_IDMASK_OFFSET		0x00000308U	/**< ID Mask Register */
+
+#define XAPM_RID_OFFSET			0x0000030CU	/**< Latency Write ID Register */
+
+#define XAPM_RIDMASK_OFFSET		0x00000310U	/**< Read ID Mask Register */
+
+#define XAPM_FEC_OFFSET			0x00000400U	/**< Flag Enable
+							Control Register */
+
+#define XAPM_SWD_OFFSET			0x00000404U	/**< Software-written
+							Data Register */
+
+/* @} */
+
+/**
+ * @name AXI Monitor Sample Interval Control Register mask(s)
+ * @{
+ */
+
+#define XAPM_SICR_MCNTR_RST_MASK	0x00000100U /**< Enable the Metric
+							Counter Reset */
+#define XAPM_SICR_LOAD_MASK		0x00000002U /**< Load the Sample Interval
+							*  Register Value into the
+							*  counter */
+#define XAPM_SICR_ENABLE_MASK		0x00000001U /**< Enable the downcounter */
+
+/*@}*/
+
+
+/** @name Interrupt Status/Enable Register Bit Definitions and Masks
+ *  @{
+ */
+
+#define XAPM_IXR_MC9_OVERFLOW_MASK	0x00001000U	/**< Metric Counter 9
+							  *  Overflow> */
+#define XAPM_IXR_MC8_OVERFLOW_MASK	0x00000800U	/**< Metric Counter 8
+							  *  Overflow> */
+#define XAPM_IXR_MC7_OVERFLOW_MASK   	0x00000400U	/**< Metric Counter 7
+							  *  Overflow> */
+#define XAPM_IXR_MC6_OVERFLOW_MASK   	0x00000200U	/**< Metric Counter 6
+							  *  Overflow> */
+#define XAPM_IXR_MC5_OVERFLOW_MASK   	0x00000100U	/**< Metric Counter 5
+							  *  Overflow> */
+#define XAPM_IXR_MC4_OVERFLOW_MASK   	0x00000080U	/**< Metric Counter 4
+							  *  Overflow> */
+#define XAPM_IXR_MC3_OVERFLOW_MASK   	0x00000040U	/**< Metric Counter 3
+							  *  Overflow> */
+#define XAPM_IXR_MC2_OVERFLOW_MASK   	0x00000020U	/**< Metric Counter 2
+							  *  Overflow> */
+#define XAPM_IXR_MC1_OVERFLOW_MASK   	0x00000010U	/**< Metric Counter 1
+							  *  Overflow> */
+#define XAPM_IXR_MC0_OVERFLOW_MASK   	0x00000008U	/**< Metric Counter 0
+							  *  Overflow> */
+#define XAPM_IXR_FIFO_FULL_MASK   	0x00000004U	/**< Event Log FIFO
+							  *  full> */
+#define XAPM_IXR_SIC_OVERFLOW_MASK   	0x00000002U	/**< Sample Interval
+							  * Counter Overflow> */
+#define XAPM_IXR_GCC_OVERFLOW_MASK	0x00000001U	/**< Global Clock Counter
+						          *  Overflow> */
+#define XAPM_IXR_ALL_MASK		(XAPM_IXR_SIC_OVERFLOW_MASK | \
+					XAPM_IXR_GCC_OVERFLOW_MASK |  \
+					XAPM_IXR_FIFO_FULL_MASK | \
+					XAPM_IXR_MC0_OVERFLOW_MASK | \
+					XAPM_IXR_MC1_OVERFLOW_MASK | \
+					XAPM_IXR_MC2_OVERFLOW_MASK | \
+					XAPM_IXR_MC3_OVERFLOW_MASK | \
+					XAPM_IXR_MC4_OVERFLOW_MASK | \
+					XAPM_IXR_MC5_OVERFLOW_MASK | \
+					XAPM_IXR_MC6_OVERFLOW_MASK | \
+					XAPM_IXR_MC7_OVERFLOW_MASK | \
+					XAPM_IXR_MC8_OVERFLOW_MASK | \
+					XAPM_IXR_MC9_OVERFLOW_MASK)
+/* @} */
+
+/**
+ * @name AXI Monitor Control Register mask(s)
+ * @{
+ */
+
+#define XAPM_CR_FIFO_RESET_MASK			0x02000000U
+						/**< FIFO Reset */
+#define XAPM_CR_GCC_RESET_MASK			0x00020000U
+						/**< Global Clk
+						  Counter Reset */
+#define XAPM_CR_GCC_ENABLE_MASK			0x00010000U
+						/**< Global Clk
+						   Counter Enable */
+#define XAPM_CR_EVTLOG_EXTTRIGGER_MASK  	0x00000200U
+						/**< Enable External trigger
+						to start event Log */
+#define XAPM_CR_EVENTLOG_ENABLE_MASK  		0x00000100U
+						/**< Event Log Enable */
+
+#define XAPM_CR_RDLATENCY_END_MASK  		0x00000080U
+						/**< Write Latency
+							End point */
+#define XAPM_CR_RDLATENCY_START_MASK  		0x00000040U
+						/**< Read Latency
+							Start point */
+#define XAPM_CR_WRLATENCY_END_MASK  		0x00000020U
+						/**< Write Latency
+							End point */
+#define XAPM_CR_WRLATENCY_START_MASK  		0x00000010U
+						/**< Write Latency
+							Start point */
+#define XAPM_CR_IDFILTER_ENABLE_MASK  		0x00000008U
+						/**< ID Filter Enable */
+
+#define XAPM_CR_MCNTR_EXTTRIGGER_MASK  	 	0x00000004U
+						/**< Enable External
+						   trigger to start
+						   Metric Counters  */
+#define XAPM_CR_MCNTR_RESET_MASK   		0x00000002U
+						/**< Metrics Counter
+						   Reset */
+#define XAPM_CR_MCNTR_ENABLE_MASK  		0x00000001U
+						/**< Metrics Counter
+					           Enable */
+/*@}*/
+
+/**
+ * @name AXI Monitor ID Register mask(s)
+ * @{
+ */
+
+#define XAPM_ID_RID_MASK			0xFFFF0000U /**< Read ID */
+
+#define XAPM_ID_WID_MASK			0x0000FFFFU /**< Write ID */
+
+/*@}*/
+
+/**
+ * @name AXI Monitor ID Mask Register mask(s)
+ * @{
+ */
+
+#define XAPM_MASKID_RID_MASK			0xFFFF0000U /**< Read ID Mask */
+
+#define XAPM_MASKID_WID_MASK			0x0000FFFFU /**< Write ID Mask*/
+
+/*@}*/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+*
+* Read a register of the AXI Performance Monitor device. This macro provides
+* register access to all registers using the register offsets defined above.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset is the offset of the register to read.
+*
+* @return	The contents of the register.
+*
+* @note		C-style Signature:
+*		u32 XAxiPmon_ReadReg(u32 BaseAddress, u32 RegOffset);
+*
+******************************************************************************/
+#define XAxiPmon_ReadReg(BaseAddress, RegOffset) \
+		(Xil_In32((BaseAddress) + (RegOffset)))
+
+/*****************************************************************************/
+/**
+*
+* Write a register of the AXI Performance Monitor device. This macro provides
+* register access to all registers using the register offsets defined above.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset is the offset of the register to write.
+* @param	Data is the value to write to the register.
+*
+* @return	None.
+*
+* @note 	C-style Signature:
+*		void XAxiPmon_WriteReg(u32 BaseAddress,
+*					u32 RegOffset,u32 Data)
+*
+******************************************************************************/
+#define XAxiPmon_WriteReg(BaseAddress, RegOffset, Data) \
+		(Xil_Out32((BaseAddress) + (RegOffset), (Data)))
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* End of protection macro. */
+/** @} */
diff --git a/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_selftest.c b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_selftest.c
new file mode 100644
index 0000000..7a66791
--- /dev/null
+++ b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_selftest.c
@@ -0,0 +1,152 @@
+/******************************************************************************
+*
+* Copyright (C) 2012 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xaxipmon_selftest.c
+* @addtogroup axipmon_v6_6
+* @{
+*
+* This file contains a diagnostic self test function for the XAxiPmon driver.
+* The self test function does a simple read/write test of the Alarm Threshold
+* Register.
+*
+* See XAxiPmon.h for more information.
+*
+* @note	None.
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.00a bss  02/24/12 First release
+* 2.00a bss  06/23/12 Updated to support v2_00a version of IP.
+* 6.3   kvn  07/02/15 Modified code according to MISRA-C:2012 guidelines.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xaxipmon.h"
+
+/************************** Constant Definitions ****************************/
+
+/*
+ * The following constant defines the test value to be written
+ * to the Range Registers of Incrementers
+ */
+
+#define XAPM_TEST_RANGEUPPER_VALUE	16U /**< Test Value for Upper Range */
+#define XAPM_TEST_RANGELOWER_VALUE	 8U /**< Test Value for Lower Range */
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+/*****************************************************************************/
+/**
+*
+* Run a self-test on the driver/device. The test
+*	- Resets the device,
+*	- Writes a value into the Range Registers of Incrementer 0 and reads
+*	  it back for comparison.
+*	- Resets the device again.
+*
+*
+* @param	InstancePtr is a pointer to the XAxiPmon instance.
+*
+* @return
+*		- XST_SUCCESS if the value read from the Range Register of
+*		  Incrementer 0 is the same as the value written.
+*		- XST_FAILURE Otherwise
+*
+* @note		This is a destructive test in that resets of the device are
+*		performed. Refer to the device specification for the
+*		device status after the reset operation.
+*
+******************************************************************************/
+s32 XAxiPmon_SelfTest(XAxiPmon *InstancePtr)
+{
+	s32 Status;
+	u16 RangeUpper = 0U;
+	u16 RangeLower = 0U;
+
+	/*
+	 * Assert the argument
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+
+	/*
+	 * Reset the device to get it back to its default state
+	 */
+	(void)XAxiPmon_ResetMetricCounter(InstancePtr);
+	XAxiPmon_ResetGlobalClkCounter(InstancePtr);
+
+	/*
+	 * Write a value into the Incrementer register and
+	 * read it back, and do the comparison
+	 */
+	XAxiPmon_SetIncrementerRange(InstancePtr, XAPM_INCREMENTER_0,
+					XAPM_TEST_RANGEUPPER_VALUE,
+					XAPM_TEST_RANGELOWER_VALUE);
+
+	XAxiPmon_GetIncrementerRange(InstancePtr, XAPM_INCREMENTER_0,
+					&RangeUpper, &RangeLower);
+
+	if ((RangeUpper == XAPM_TEST_RANGEUPPER_VALUE) &&
+			(RangeLower == XAPM_TEST_RANGELOWER_VALUE)) {
+		Status = XST_SUCCESS;
+	} else {
+		Status = XST_FAILURE;
+	}
+
+	/*
+	 * Reset the device again to its default state.
+	 */
+	(void)XAxiPmon_ResetMetricCounter(InstancePtr);
+	XAxiPmon_ResetGlobalClkCounter(InstancePtr);
+
+	/*
+	 * Return the test result.
+	 */
+	return Status;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_sinit.c b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_sinit.c
new file mode 100644
index 0000000..2494aea
--- /dev/null
+++ b/src/Xilinx/libsrc/axipmon_v6_6/src/xaxipmon_sinit.c
@@ -0,0 +1,104 @@
+/******************************************************************************
+*
+* Copyright (C) 2012 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xaxipmon_sinit.c
+* @addtogroup axipmon_v6_6
+* @{
+*
+* This file contains the implementation of the XAxiPmon driver's static
+* initialization functionality.
+*
+* @note	None.
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.00a bss  02/27/12 First release
+* 2.00a bss  06/23/12 Updated to support v2_00a version of IP.
+* 6.3   kvn  07/02/15 Modified code according to MISRA-C:2012 guidelines.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xparameters.h"
+#include "xaxipmon.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+extern XAxiPmon_Config XAxiPmon_ConfigTable[];
+
+/*****************************************************************************/
+/**
+*
+* This function looks up the device configuration based on the unique device ID.
+* The table XAxiPmon_ConfigTable contains the configuration info for each device
+* in the system.
+*
+* @param	DeviceId contains the ID of the device for which the
+*		device configuration pointer is to be returned.
+*
+* @return
+*		- A pointer to the configuration found.
+*		- NULL if the specified device ID was not found.
+*
+* @note		None.
+*
+******************************************************************************/
+XAxiPmon_Config *XAxiPmon_LookupConfig(u16 DeviceId)
+{
+	XAxiPmon_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index=0U; Index < (u32)XPAR_XAXIPMON_NUM_INSTANCES; Index++) {
+		if (XAxiPmon_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XAxiPmon_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XAxiPmon_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/bram_v4_2/src/Makefile b/src/Xilinx/libsrc/bram_v4_2/src/Makefile
new file mode 100644
index 0000000..18df049
--- /dev/null
+++ b/src/Xilinx/libsrc/bram_v4_2/src/Makefile
@@ -0,0 +1,28 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+INCLUDEFILES=*.h
+
+LIBSOURCES=*.c
+OUTS = *.o 
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs:
+	echo "Compiling bram"
+	$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES)
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} $(OUTS)
+	make clean
+
+include: 
+	 ${CP} ${INCLUDEFILES} ${INCLUDEDIR} 
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/bram_v4_2/src/xbram.c b/src/Xilinx/libsrc/bram_v4_2/src/xbram.c
new file mode 100644
index 0000000..cf65176
--- /dev/null
+++ b/src/Xilinx/libsrc/bram_v4_2/src/xbram.c
@@ -0,0 +1,149 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/**
+* @file xbram.c
+* @addtogroup bram_v4_2
+* @{
+*
+* The implementation of the XBram driver's basic functionality.
+* See xbram.h for more information about the driver.
+*
+* @note
+*
+* None
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sa   05/11/10 First release
+* 3.01a sa   13/01/12 Added CorrectableFailingDataRegs and
+*                     UncorrectableFailingDataRegs in
+*					  XBram_CfgInitialize API.
+* 4.1   sk   11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
+*                     Changed the prototype of XBram_CfgInitialize API.
+*

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xbram.h"
+#include "xstatus.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+
+/************************** Function Prototypes *****************************/
+
+
+/****************************************************************************/
+/**
+* Initialize the XBram instance provided by the caller based on the given
+* configuration data.
+*
+* Nothing is done except to initialize the InstancePtr.
+*
+* @param	InstancePtr is a pointer to an XBram instance.
+*		The memory the pointer references must be pre-allocated by
+*		the caller. Further calls to manipulate the driver through
+*		the XBram API must be made with this pointer.
+* @param	Config is a reference to a structure containing information
+*		about a specific BRAM device. This function
+*		initializes an InstancePtr object for a specific device
+*		specified by the contents of Config. This function can
+*		initialize multiple instance objects with the use of multiple
+*		calls giving different Config information on each call.
+* @param 	EffectiveAddr is the device base address in the virtual memory
+*		address space. The caller is responsible for keeping the
+*		address	mapping from EffectiveAddr to the device physical base
+*		address	unchanged once this function is invoked. Unexpected
+*		errors may occur if the address mapping changes after this
+*		function is called. If address translation is not used, use
+*		Config->BaseAddress for this parameters, passing the physical
+*		address instead.
+*
+* @return
+* 		- XST_SUCCESS	Initialization was successful.
+*
+* @note		None.
+*
+*****************************************************************************/
+int XBram_CfgInitialize(XBram *InstancePtr,
+			XBram_Config *Config,
+			UINTPTR EffectiveAddr)
+{
+	/*
+	 * Assert arguments
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	/*
+	 * Set some default values.
+	 */
+	InstancePtr->Config.CtrlBaseAddress = EffectiveAddr;
+	InstancePtr->Config.MemBaseAddress = Config->MemBaseAddress;
+	InstancePtr->Config.MemHighAddress = Config->MemHighAddress;
+	InstancePtr->Config.DataWidth = Config->DataWidth;
+	InstancePtr->Config.EccPresent = Config->EccPresent;
+	InstancePtr->Config.FaultInjectionPresent =
+					Config->FaultInjectionPresent;
+	InstancePtr->Config.CorrectableFailingRegisters =
+					Config->CorrectableFailingRegisters;
+	InstancePtr->Config.CorrectableFailingDataRegs =
+					Config->CorrectableFailingDataRegs;
+	InstancePtr->Config.UncorrectableFailingRegisters =
+					Config->UncorrectableFailingRegisters;
+	InstancePtr->Config.UncorrectableFailingDataRegs =
+					Config->UncorrectableFailingDataRegs;
+	InstancePtr->Config.EccStatusInterruptPresent =
+					Config->EccStatusInterruptPresent;
+	InstancePtr->Config.CorrectableCounterBits =
+					Config->CorrectableCounterBits;
+	InstancePtr->Config.WriteAccess = Config->WriteAccess;
+
+	/*
+	 * Indicate the instance is now ready to use, initialized without error
+	 */
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+	return (XST_SUCCESS);
+}
+
+/** @} */
diff --git a/src/Xilinx/libsrc/bram_v4_2/src/xbram.h b/src/Xilinx/libsrc/bram_v4_2/src/xbram.h
new file mode 100644
index 0000000..3005132
--- /dev/null
+++ b/src/Xilinx/libsrc/bram_v4_2/src/xbram.h
@@ -0,0 +1,225 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xbram.h
+* @addtogroup bram_v4_2
+* @{
+* @details
+*
+* If ECC is not enabled, this driver exists only to allow the tools to
+* create a memory test application and to populate xparameters.h with memory
+* range constants. In this case there is no source code.
+*
+* If ECC is enabled, this file contains the software API definition of the
+* Xilinx BRAM Interface Controller (XBram) device driver.
+*
+* The Xilinx BRAM controller is a soft IP core designed for Xilinx
+* FPGAs and contains the following general features:
+*   - LMB v2.0 bus interfaces with byte enable support
+*   - Used in conjunction with bram_block peripheral to provide fast BRAM
+*     memory solution for MicroBlaze ILMB and DLMB ports
+*   - Supports byte, half-word, and word transfers
+*   - Supports optional BRAM error correction and detection.
+*
+* The driver provides interrupt management functions. Implementation of
+* interrupt handlers is left to the user. Refer to the provided interrupt
+* example in the examples directory for details.
+*
+* This driver is intended to be RTOS and processor independent. Any needs for
+* dynamic memory management, threads or thread mutual exclusion, virtual
+* memory, or cache control must be satisfied by the layer above this driver.
+*
+* Initialization & Configuration
+*
+* The XBram_Config structure is used by the driver to configure
+* itself. This configuration structure is typically created by the tool-chain
+* based on HW build properties.
+*
+* To support multiple runtime loading and initialization strategies employed
+* by various operating systems, the driver instance can be initialized as
+* follows:
+*
+*   - XBram_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) -
+*     Uses a configuration structure provided by the caller. If running in a
+*     system with address translation, the provided virtual memory base address
+*     replaces the physical address present in the configuration structure.
+*
+* @note
+*
+* This API utilizes 32 bit I/O to the BRAM registers. With less
+* than 32 bits, the unused bits from registers are read as zero and written as
+* don't cares.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 3.00a sa  05/11/10 Added ECC support
+* 3.01a sa  01/13/12  Changed Selftest API from
+*		      XBram_SelfTest(XBram *InstancePtr) to
+*		      XBram_SelfTest(XBram *InstancePtr, u8 IntMask) and
+*		      fixed a problem with interrupt generation for CR 639274
+*		      Modified Selftest example to return XST_SUCCESS when
+*		      ECC is not enabled and return XST_FAILURE when ECC is
+*		      enabled and Control Base Address is zero (CR 636581)
+*		      Modified Selftest to use correct CorrectableCounterBits
+*		      for CR 635655
+*		      Updated to check CorrectableFailingDataRegs in the case
+*		      of LMB BRAM.
+* 		      Added CorrectableFailingDataRegs and
+*		      UncorrectableFailingDataRegs to the config structure to
+*		      distinguish between AXI BRAM and LMB BRAM.
+*		      These registers are not present in the current version of
+*		      the AXI BRAM Controller.
+* 3.02a sa 04/16/12   Added test of byte and halfword read-modify-write
+* 3.02a sa 04/16/12   Modified driver tcl to sort the address parameters
+*  	       	      to support both xps and vivado designs.
+* 3.02a adk 24/4/13   Modified the tcl file to avoid warnings
+*	       	      when ecc is disabled cr:705002.
+* 3.03a bss 05/22/13  Added Xil_DCacheFlushRange in xbram_selftest.c to
+*		      flush the Cache after writing to BRAM in InjectErrors
+*		      API(CR #719011)
+* 4.0   adk  19/12/13 Updated as per the New Tcl API's
+* 4.1   sk   11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
+*                     Changed the prototype of XBram_CfgInitialize API.
+*       ms  01/23/17 Modified xil_printf statement in main function for all
+*                    examples to ensure that "Successfully ran" and "Failed"
+*                    strings are available in all examples. This is a fix
+*                    for CR-965028.
+*       ms  03/17/17 Added readme.txt file in examples folder for doxygen
+*                    generation.
+* 4.2   ms  04/18/17 Modified tcl file to add suffix U for all macro
+*                    definitions of bram in xparameters.h
+*       ms  08/07/17 Fixed compilation warnings in xbram_sinit.c
+* 

+*****************************************************************************/
+#ifndef XBRAM_H		/* prevent circular inclusions */
+#define XBRAM_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xbram_hw.h"
+
+/************************** Constant Definitions ****************************/
+
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;			   /**< Unique ID  of device */
+	u32 DataWidth;			   /**< BRAM data width */
+	int EccPresent;			   /**< Is ECC supported in H/W */
+	int FaultInjectionPresent;	   /**< Is Fault Injection
+					     *  supported in H/W */
+	int CorrectableFailingRegisters;   /**< Is Correctable Failing Registers
+					     *  supported in H/W */
+	int CorrectableFailingDataRegs;    /**< Is Correctable Failing Data
+					    *   Registers supported in H/W */
+	int UncorrectableFailingRegisters; /**< Is Un-correctable Failing
+					     *  Registers supported in H/W */
+	int UncorrectableFailingDataRegs;  /**< Is Un-correctable Failing Data
+					     *  Registers supported in H/W */
+	int EccStatusInterruptPresent;	   /**< Are ECC status and interrupts
+					     *  supported in H/W */
+	int CorrectableCounterBits;	   /**< Number of bits in the
+					     *  Correctable Error Counter */
+	int EccOnOffRegister;		   /**< Is ECC on/off register supported
+					     *  in h/w */
+	int EccOnOffResetValue;		   /**< Reset value of the ECC on/off
+					     *  register in h/w */
+	int WriteAccess;		   /**< Is write access enabled in
+					     *  h/w */
+	u32 MemBaseAddress;		   /**< Device memory base address */
+	u32 MemHighAddress;		   /**< Device memory high address */
+	UINTPTR CtrlBaseAddress;		   /**< Device register base address.*/
+	UINTPTR CtrlHighAddress;		   /**< Device register base address.*/
+} XBram_Config;
+
+/**
+ * The XBram driver instance data. The user is required to
+ * allocate a variable of this type for every BRAM device in the
+ * system. A pointer to a variable of this type is then passed to the driver
+ * API functions.
+ */
+typedef struct {
+	XBram_Config  Config;		/* BRAM config structure */
+	u32 IsReady;			/* Device is initialized and ready */
+} XBram;
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+
+/************************** Function Prototypes *****************************/
+
+/*
+ * Functions in xbram_sinit.c
+ */
+XBram_Config *XBram_LookupConfig(u16 DeviceId);
+
+/*
+ * Functions implemented in xbram.c
+ */
+int XBram_CfgInitialize(XBram *InstancePtr, XBram_Config *Config,
+			UINTPTR EffectiveAddr);
+
+/*
+ * Functions implemented in xbram_selftest.c
+ */
+int XBram_SelfTest(XBram *InstancePtr, u8 IntMask);
+
+/*
+ * Functions implemented in xbram_intr.c
+ */
+void XBram_InterruptEnable(XBram *InstancePtr, u32 Mask);
+void XBram_InterruptDisable(XBram *InstancePtr, u32 Mask);
+void XBram_InterruptClear(XBram *InstancePtr, u32 Mask);
+u32 XBram_InterruptGetEnabled(XBram *InstancePtr);
+u32 XBram_InterruptGetStatus(XBram *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/bram_v4_2/src/xbram_g.c b/src/Xilinx/libsrc/bram_v4_2/src/xbram_g.c
new file mode 100644
index 0000000..14e1d5c
--- /dev/null
+++ b/src/Xilinx/libsrc/bram_v4_2/src/xbram_g.c
@@ -0,0 +1,70 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xbram.h"
+
+/*
+* The configuration table for devices
+*/
+
+XBram_Config XBram_ConfigTable[] =
+{
+	{
+		XPAR_AXI_BRAM_CTRL_0_DEVICE_ID,
+		XPAR_AXI_BRAM_CTRL_0_DATA_WIDTH,
+		XPAR_AXI_BRAM_CTRL_0_ECC,
+		XPAR_AXI_BRAM_CTRL_0_FAULT_INJECT,
+		XPAR_AXI_BRAM_CTRL_0_CE_FAILING_REGISTERS,
+		0,
+		XPAR_AXI_BRAM_CTRL_0_UE_FAILING_REGISTERS,
+		0,
+		XPAR_AXI_BRAM_CTRL_0_ECC_STATUS_REGISTERS,
+		XPAR_AXI_BRAM_CTRL_0_CE_COUNTER_WIDTH,
+		XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_REGISTER,
+		XPAR_AXI_BRAM_CTRL_0_ECC_ONOFF_RESET_VALUE,
+		XPAR_AXI_BRAM_CTRL_0_WRITE_ACCESS,
+		XPAR_AXI_BRAM_CTRL_0_S_AXI_BASEADDR,
+		XPAR_AXI_BRAM_CTRL_0_S_AXI_HIGHADDR,
+		XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_BASEADDR,
+		XPAR_AXI_BRAM_CTRL_0_S_AXI_CTRL_HIGHADDR
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/bram_v4_2/src/xbram_hw.h b/src/Xilinx/libsrc/bram_v4_2/src/xbram_hw.h
new file mode 100644
index 0000000..1c28493
--- /dev/null
+++ b/src/Xilinx/libsrc/bram_v4_2/src/xbram_hw.h
@@ -0,0 +1,409 @@
+/******************************************************************************
+*
+* Copyright (C) 2011 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xbram_hw.h
+* @addtogroup bram_v4_2
+* @{
+*
+* This header file contains identifiers and driver functions (or
+* macros) that can be used to access the device.  The user should refer to the
+* hardware device specification for more details of the device operation.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sa   24/11/10 First release
+* 

+*
+******************************************************************************/
+#ifndef XBRAM_HW_H		/* prevent circular inclusions */
+#define XBRAM_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Registers
+ *
+ * Register offsets for this device.
+ * @{
+ */
+
+#define XBRAM_ECC_STATUS_OFFSET	0x0  /**< ECC status Register */
+#define XBRAM_ECC_EN_IRQ_OFFSET	0x4  /**< ECC interrupt enable Register */
+#define XBRAM_ECC_ON_OFF_OFFSET	0x8  /**< ECC on/off register */
+#define XBRAM_CE_CNT_OFFSET	0xC  /**< Correctable error counter Register */
+
+#define XBRAM_CE_FFD_0_OFFSET	0x100 /**< Correctable error first failing
+				        *  data Register, 31-0 */
+#define XBRAM_CE_FFD_1_OFFSET	0x104 /**< Correctable error first failing
+				        *  data Register, 63-32 */
+#define XBRAM_CE_FFD_2_OFFSET	0x108 /**< Correctable error first failing
+				        *  data Register, 95-64 */
+#define XBRAM_CE_FFD_3_OFFSET	0x10C /**< Correctable error first failing
+				        *  data Register, 127-96 */
+#define XBRAM_CE_FFD_4_OFFSET	0x110 /**< Correctable error first failing
+				        *  data Register, 159-128 */
+#define XBRAM_CE_FFD_5_OFFSET	0x114 /**< Correctable error first failing
+				        *  data Register, 191-160 */
+#define XBRAM_CE_FFD_6_OFFSET	0x118 /**< Correctable error first failing
+				        *  data Register, 223-192 */
+#define XBRAM_CE_FFD_7_OFFSET	0x11C /**< Correctable error first failing
+				        *  data Register, 255-224 */
+#define XBRAM_CE_FFD_8_OFFSET	0x120 /**< Correctable error first failing
+				        *  data Register, 287-256 */
+#define XBRAM_CE_FFD_9_OFFSET	0x124 /**< Correctable error first failing
+				        *  data Register, 319-288 */
+#define XBRAM_CE_FFD_10_OFFSET	0x128 /**< Correctable error first failing
+				        *  data Register, 351-320 */
+#define XBRAM_CE_FFD_11_OFFSET	0x12C /**< Correctable error first failing
+				        *  data Register, 383-352 */
+#define XBRAM_CE_FFD_12_OFFSET	0x130 /**< Correctable error first failing
+				        *  data Register, 415-384 */
+#define XBRAM_CE_FFD_13_OFFSET	0x134 /**< Correctable error first failing
+				        *  data Register, 447-416 */
+#define XBRAM_CE_FFD_14_OFFSET	0x138 /**< Correctable error first failing
+				        *  data Register, 479-448 */
+#define XBRAM_CE_FFD_15_OFFSET	0x13C /**< Correctable error first failing
+				        *  data Register, 511-480 */
+#define XBRAM_CE_FFD_16_OFFSET	0x140 /**< Correctable error first failing
+				        *  data Register, 543-512 */
+#define XBRAM_CE_FFD_17_OFFSET	0x144 /**< Correctable error first failing
+				        *  data Register, 575-544 */
+#define XBRAM_CE_FFD_18_OFFSET	0x148 /**< Correctable error first failing
+				        *  data Register, 607-576 */
+#define XBRAM_CE_FFD_19_OFFSET	0x14C /**< Correctable error first failing
+				        *  data Register, 639-608 */
+#define XBRAM_CE_FFD_20_OFFSET	0x150 /**< Correctable error first failing
+				        *  data Register, 671-640 */
+#define XBRAM_CE_FFD_21_OFFSET	0x154 /**< Correctable error first failing
+				        *  data Register, 703-672 */
+#define XBRAM_CE_FFD_22_OFFSET	0x158 /**< Correctable error first failing
+				        *  data Register, 735-704 */
+#define XBRAM_CE_FFD_23_OFFSET	0x15C /**< Correctable error first failing
+				        *  data Register, 767-736 */
+#define XBRAM_CE_FFD_24_OFFSET	0x160 /**< Correctable error first failing
+				        *  data Register, 799-768 */
+#define XBRAM_CE_FFD_25_OFFSET	0x164 /**< Correctable error first failing
+				        *  data Register, 831-800 */
+#define XBRAM_CE_FFD_26_OFFSET	0x168 /**< Correctable error first failing
+				        *  data Register, 863-832 */
+#define XBRAM_CE_FFD_27_OFFSET	0x16C /**< Correctable error first failing
+				        *  data Register, 895-864 */
+#define XBRAM_CE_FFD_28_OFFSET	0x170 /**< Correctable error first failing
+				        *  data Register, 927-896 */
+#define XBRAM_CE_FFD_29_OFFSET	0x174 /**< Correctable error first failing
+				        *  data Register, 959-928 */
+#define XBRAM_CE_FFD_30_OFFSET	0x178 /**< Correctable error first failing
+				        *  data Register, 991-960 */
+#define XBRAM_CE_FFD_31_OFFSET	0x17C /**< Correctable error first failing
+				        *  data Register, 1023-992 */
+
+#define XBRAM_CE_FFE_0_OFFSET	0x180 /**< Correctable error first failing
+				        *  ECC Register, 31-0 */
+#define XBRAM_CE_FFE_1_OFFSET	0x184 /**< Correctable error first failing
+				        *  ECC Register, 63-32 */
+#define XBRAM_CE_FFE_2_OFFSET	0x188 /**< Correctable error first failing
+				        *  ECC Register, 95-64 */
+#define XBRAM_CE_FFE_3_OFFSET	0x18C /**< Correctable error first failing
+				        *  ECC Register, 127-96 */
+#define XBRAM_CE_FFE_4_OFFSET	0x190 /**< Correctable error first failing
+				        *  ECC Register, 159-128 */
+#define XBRAM_CE_FFE_5_OFFSET	0x194 /**< Correctable error first failing
+				        *  ECC Register, 191-160 */
+#define XBRAM_CE_FFE_6_OFFSET	0x198 /**< Correctable error first failing
+				        *  ECC Register, 223-192 */
+#define XBRAM_CE_FFE_7_OFFSET	0x19C /**< Correctable error first failing
+				        *  ECC Register, 255-224 */
+
+#define XBRAM_CE_FFA_0_OFFSET	0x1C0 /**< Correctable error first failing
+				        *  address Register 31-0 */
+#define XBRAM_CE_FFA_1_OFFSET	0x1C4 /**< Correctable error first failing
+				        *  address Register 63-32 */
+
+#define XBRAM_UE_FFD_0_OFFSET	0x200 /**< Uncorrectable error first failing
+				        *  data Register, 31-0 */
+#define XBRAM_UE_FFD_1_OFFSET	0x204 /**< Uncorrectable error first failing
+				        *  data Register, 63-32 */
+#define XBRAM_UE_FFD_2_OFFSET	0x208 /**< Uncorrectable error first failing
+				        *  data Register, 95-64 */
+#define XBRAM_UE_FFD_3_OFFSET	0x20C /**< Uncorrectable error first failing
+				        *  data Register, 127-96 */
+#define XBRAM_UE_FFD_4_OFFSET	0x210 /**< Uncorrectable error first failing
+				        *  data Register, 159-128 */
+#define XBRAM_UE_FFD_5_OFFSET	0x214 /**< Uncorrectable error first failing
+				        *  data Register, 191-160 */
+#define XBRAM_UE_FFD_6_OFFSET	0x218 /**< Uncorrectable error first failing
+				        *  data Register, 223-192 */
+#define XBRAM_UE_FFD_7_OFFSET	0x21C /**< Uncorrectable error first failing
+				        *  data Register, 255-224 */
+#define XBRAM_UE_FFD_8_OFFSET	0x220 /**< Uncorrectable error first failing
+				        *  data Register, 287-256 */
+#define XBRAM_UE_FFD_9_OFFSET	0x224 /**< Uncorrectable error first failing
+				        *  data Register, 319-288 */
+#define XBRAM_UE_FFD_10_OFFSET	0x228 /**< Uncorrectable error first failing
+				        *  data Register, 351-320 */
+#define XBRAM_UE_FFD_11_OFFSET	0x22C /**< Uncorrectable error first failing
+				        *  data Register, 383-352 */
+#define XBRAM_UE_FFD_12_OFFSET	0x230 /**< Uncorrectable error first failing
+				        *  data Register, 415-384 */
+#define XBRAM_UE_FFD_13_OFFSET	0x234 /**< Uncorrectable error first failing
+				        *  data Register, 447-416 */
+#define XBRAM_UE_FFD_14_OFFSET	0x238 /**< Uncorrectable error first failing
+				        *  data Register, 479-448 */
+#define XBRAM_UE_FFD_15_OFFSET	0x23C /**< Uncorrectable error first failing
+				        *  data Register, 511-480 */
+#define XBRAM_UE_FFD_16_OFFSET	0x240 /**< Uncorrectable error first failing
+				        *  data Register, 543-512 */
+#define XBRAM_UE_FFD_17_OFFSET	0x244 /**< Uncorrectable error first failing
+				        *  data Register, 575-544 */
+#define XBRAM_UE_FFD_18_OFFSET	0x248 /**< Uncorrectable error first failing
+				        *  data Register, 607-576 */
+#define XBRAM_UE_FFD_19_OFFSET	0x24C /**< Uncorrectable error first failing
+				        *  data Register, 639-608 */
+#define XBRAM_UE_FFD_20_OFFSET	0x250 /**< Uncorrectable error first failing
+				        *  data Register, 671-640 */
+#define XBRAM_UE_FFD_21_OFFSET	0x254 /**< Uncorrectable error first failing
+				        *  data Register, 703-672 */
+#define XBRAM_UE_FFD_22_OFFSET	0x258 /**< Uncorrectable error first failing
+				        *  data Register, 735-704 */
+#define XBRAM_UE_FFD_23_OFFSET	0x25C /**< Uncorrectable error first failing
+				        *  data Register, 767-736 */
+#define XBRAM_UE_FFD_24_OFFSET	0x260 /**< Uncorrectable error first failing
+				        *  data Register, 799-768 */
+#define XBRAM_UE_FFD_25_OFFSET	0x264 /**< Uncorrectable error first failing
+				        *  data Register, 831-800 */
+#define XBRAM_UE_FFD_26_OFFSET	0x268 /**< Uncorrectable error first failing
+				        *  data Register, 863-832 */
+#define XBRAM_UE_FFD_27_OFFSET	0x26C /**< Uncorrectable error first failing
+				        *  data Register, 895-864 */
+#define XBRAM_UE_FFD_28_OFFSET	0x270 /**< Uncorrectable error first failing
+				        *  data Register, 927-896 */
+#define XBRAM_UE_FFD_29_OFFSET	0x274 /**< Uncorrectable error first failing
+				        *  data Register, 959-928 */
+#define XBRAM_UE_FFD_30_OFFSET	0x278 /**< Uncorrectable error first failing
+				        *  data Register, 991-960 */
+#define XBRAM_UE_FFD_31_OFFSET	0x27C /**< Uncorrectable error first failing
+				        *  data Register, 1023-992 */
+
+#define XBRAM_UE_FFE_0_OFFSET	0x280 /**< Uncorrectable error first failing
+				        *  ECC Register, 31-0 */
+#define XBRAM_UE_FFE_1_OFFSET	0x284 /**< Uncorrectable error first failing
+				        *  ECC Register, 63-32 */
+#define XBRAM_UE_FFE_2_OFFSET	0x288 /**< Uncorrectable error first failing
+				        *  ECC Register, 95-64 */
+#define XBRAM_UE_FFE_3_OFFSET	0x28C /**< Uncorrectable error first failing
+				        *  ECC Register, 127-96 */
+#define XBRAM_UE_FFE_4_OFFSET	0x290 /**< Uncorrectable error first failing
+				        *  ECC Register, 159-128 */
+#define XBRAM_UE_FFE_5_OFFSET	0x294 /**< Uncorrectable error first failing
+				        *  ECC Register, 191-160 */
+#define XBRAM_UE_FFE_6_OFFSET	0x298 /**< Uncorrectable error first failing
+				        *  ECC Register, 223-192 */
+#define XBRAM_UE_FFE_7_OFFSET	0x29C /**< Uncorrectable error first failing
+				        *  ECC Register, 255-224 */
+
+#define XBRAM_UE_FFA_0_OFFSET	0x2C0 /**< Uncorrectable error first failing
+				        *  address Register 31-0 */
+#define XBRAM_UE_FFA_1_OFFSET	0x2C4 /**< Uncorrectable error first failing
+				        *  address Register 63-32 */
+
+#define XBRAM_FI_D_0_OFFSET	0x300 /**< Fault injection Data Register,
+				        *  31-0 */
+#define XBRAM_FI_D_1_OFFSET	0x304 /**< Fault injection Data Register,
+				        *  63-32 */
+#define XBRAM_FI_D_2_OFFSET	0x308 /**< Fault injection Data Register,
+				        *  95-64 */
+#define XBRAM_FI_D_3_OFFSET	0x30C /**< Fault injection Data Register,
+				        *  127-96 */
+#define XBRAM_FI_D_4_OFFSET	0x310 /**< Fault injection Data Register,
+				        *  159-128 */
+#define XBRAM_FI_D_5_OFFSET	0x314 /**< Fault injection Data Register,
+				        *  191-160 */
+#define XBRAM_FI_D_6_OFFSET	0x318 /**< Fault injection Data Register,
+				        *  223-192 */
+#define XBRAM_FI_D_7_OFFSET	0x31C /**< Fault injection Data Register,
+				        *  255-224 */
+#define XBRAM_FI_D_8_OFFSET	0x320 /**< Fault injection Data Register,
+				        *  287-256 */
+#define XBRAM_FI_D_9_OFFSET	0x324 /**< Fault injection Data Register,
+				        *  319-288 */
+#define XBRAM_FI_D_10_OFFSET	0x328 /**< Fault injection Data Register,
+				        *  351-320 */
+#define XBRAM_FI_D_11_OFFSET	0x32C /**< Fault injection Data Register,
+				        *  383-352 */
+#define XBRAM_FI_D_12_OFFSET	0x330 /**< Fault injection Data Register,
+				        *  415-384 */
+#define XBRAM_FI_D_13_OFFSET	0x334 /**< Fault injection Data Register,
+				        *  447-416 */
+#define XBRAM_FI_D_14_OFFSET	0x338 /**< Fault injection Data Register,
+				        *  479-448 */
+#define XBRAM_FI_D_15_OFFSET	0x33C /**< Fault injection Data Register,
+				        *  511-480 */
+#define XBRAM_FI_D_16_OFFSET	0x340 /**< Fault injection Data Register,
+				        *  543-512 */
+#define XBRAM_FI_D_17_OFFSET	0x344 /**< Fault injection Data Register,
+				        *  575-544 */
+#define XBRAM_FI_D_18_OFFSET	0x348 /**< Fault injection Data Register,
+				        *  607-576 */
+#define XBRAM_FI_D_19_OFFSET	0x34C /**< Fault injection Data Register,
+				        *  639-608 */
+#define XBRAM_FI_D_20_OFFSET	0x350 /**< Fault injection Data Register,
+				        *  671-640 */
+#define XBRAM_FI_D_21_OFFSET	0x354 /**< Fault injection Data Register,
+				        *  703-672 */
+#define XBRAM_FI_D_22_OFFSET	0x358 /**< Fault injection Data Register,
+				        *  735-704 */
+#define XBRAM_FI_D_23_OFFSET	0x35C /**< Fault injection Data Register,
+				        *  767-736 */
+#define XBRAM_FI_D_24_OFFSET	0x360 /**< Fault injection Data Register,
+				        *  799-768 */
+#define XBRAM_FI_D_25_OFFSET	0x364 /**< Fault injection Data Register,
+				        *  831-800 */
+#define XBRAM_FI_D_26_OFFSET	0x368 /**< Fault injection Data Register,
+				        *  863-832 */
+#define XBRAM_FI_D_27_OFFSET	0x36C /**< Fault injection Data Register,
+				        *  895-864 */
+#define XBRAM_FI_D_28_OFFSET	0x370 /**< Fault injection Data Register,
+				        *  927-896 */
+#define XBRAM_FI_D_29_OFFSET	0x374 /**< Fault injection Data Register,
+				        *  959-928 */
+#define XBRAM_FI_D_30_OFFSET	0x378 /**< Fault injection Data Register,
+				        *  991-960 */
+#define XBRAM_FI_D_31_OFFSET	0x37C /**< Fault injection Data Register,
+				        *  1023-992 */
+
+#define XBRAM_FI_ECC_0_OFFSET	0x380 /**< Fault injection ECC Register,
+				        *  31-0 */
+#define XBRAM_FI_ECC_1_OFFSET	0x384 /**< Fault injection ECC Register,
+				        *  63-32 */
+#define XBRAM_FI_ECC_2_OFFSET	0x388 /**< Fault injection ECC Register,
+				        *  95-64 */
+#define XBRAM_FI_ECC_3_OFFSET	0x38C /**< Fault injection ECC Register,
+				        *  127-96 */
+#define XBRAM_FI_ECC_4_OFFSET	0x390 /**< Fault injection ECC Register,
+				        *  159-128 */
+#define XBRAM_FI_ECC_5_OFFSET	0x394 /**< Fault injection ECC Register,
+				        *  191-160 */
+#define XBRAM_FI_ECC_6_OFFSET	0x398 /**< Fault injection ECC Register,
+				        *  223-192 */
+#define XBRAM_FI_ECC_7_OFFSET	0x39C /**< Fault injection ECC Register,
+				        *  255-224 */
+
+
+/* @} */
+
+/** @name Interrupt Status and Enable Register bitmaps and masks
+ *
+ * Bit definitions for the ECC status register and ECC interrupt enable register.
+ * @{
+ */
+#define XBRAM_IR_CE_MASK	0x2 /**< Mask for the correctable error */
+#define XBRAM_IR_UE_MASK	0x1 /**< Mask for the uncorrectable error */
+#define XBRAM_IR_ALL_MASK	0x3 /**< Mask of all bits */
+/*@}*/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XBram_In32  Xil_In32
+#define XBram_Out32 Xil_Out32
+
+#define XBram_In16  Xil_In16
+#define XBram_Out16 Xil_Out16
+
+#define XBram_In8  Xil_In8
+#define XBram_Out8 Xil_Out8
+
+
+/****************************************************************************/
+/**
+*
+* Write a value to a BRAM register. A 32 bit write is performed.
+*
+* @param	BaseAddress is the base address of the BRAM device register.
+* @param	RegOffset is the register offset from the base to write to.
+* @param	Data is the data written to the register.
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XBram_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+****************************************************************************/
+#define XBram_WriteReg(BaseAddress, RegOffset, Data) \
+	XBram_Out32((BaseAddress) + (RegOffset), (u32)(Data))
+
+/****************************************************************************/
+/**
+*
+* Read a value from a BRAM register. A 32 bit read is performed.
+*
+* @param	BaseAddress is the base address of the BRAM device registers.
+* @param	RegOffset is the register offset from the base to read from.
+*
+* @return	Data read from the register.
+*
+* @note		C-style signature:
+*		u32 XBram_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+****************************************************************************/
+#define XBram_ReadReg(BaseAddress, RegOffset) \
+	XBram_In32((BaseAddress) + (RegOffset))
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/bram_v4_2/src/xbram_intr.c b/src/Xilinx/libsrc/bram_v4_2/src/xbram_intr.c
new file mode 100644
index 0000000..ecf48cf
--- /dev/null
+++ b/src/Xilinx/libsrc/bram_v4_2/src/xbram_intr.c
@@ -0,0 +1,238 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+* @file xbram_intr.c
+* @addtogroup bram_v4_2
+* @{
+*
+* Implements BRAM interrupt processing functions for the
+* XBram driver. See xbram.h for more information
+* about the driver.
+*
+* The functions in this file require the hardware device to be built with
+* interrupt capabilities. The functions will assert if called using hardware
+* that does not have interrupt capabilities.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sa   05/11/10 Initial release
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xbram.h"
+
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+
+/****************************************************************************/
+/**
+* Enable interrupts. This function will assert if the hardware device has not
+* been built with interrupt capabilities.
+*
+* @param	InstancePtr is the BRAM instance to operate on.
+* @param	Mask is the mask to enable. Bit positions of 1 are enabled.
+*		This mask is formed by OR'ing bits from XBRAM_IR*
+*		bits which are contained in xbram_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XBram_InterruptEnable(XBram *InstancePtr, u32 Mask)
+{
+	u32 Register;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Config.CtrlBaseAddress != 0);
+
+	/*
+	 * Read the interrupt enable register and only enable the specified
+	 * interrupts without disabling or enabling any others.
+	 */
+	Register = XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress,
+					XBRAM_ECC_EN_IRQ_OFFSET);
+	XBram_WriteReg(InstancePtr->Config.CtrlBaseAddress,
+					XBRAM_ECC_EN_IRQ_OFFSET,
+					Register | Mask);
+}
+
+
+/****************************************************************************/
+/**
+* Disable interrupts. This function allows each specific interrupt to be
+* disabled. This function will assert if the hardware device has not been
+* built with interrupt capabilities.
+*
+* @param	InstancePtr is the BRAM instance to operate on.
+* @param 	Mask is the mask to disable. Bits set to 1 are disabled. This
+*		mask is formed by OR'ing bits from XBRAM_IR* bits
+*		which are contained in xbram_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XBram_InterruptDisable(XBram *InstancePtr, u32 Mask)
+{
+	u32 Register;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Config.CtrlBaseAddress != 0);
+
+	/*
+	 * Read the interrupt enable register and only disable the specified
+	 * interrupts without enabling or disabling any others.
+	 */
+	Register = XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress,
+					XBRAM_ECC_EN_IRQ_OFFSET);
+	XBram_WriteReg(InstancePtr->Config.CtrlBaseAddress,
+				XBRAM_ECC_EN_IRQ_OFFSET,
+				Register & (~Mask));
+}
+
+/****************************************************************************/
+/**
+* Clear pending interrupts with the provided mask. This function should be
+* called after the software has serviced the interrupts that are pending.
+* This function will assert if the hardware device has not been built with
+* interrupt capabilities.
+*
+* @param 	InstancePtr is the BRAM instance to operate on.
+* @param 	Mask is the mask to clear pending interrupts for. Bit positions
+*		of 1 are cleared. This mask is formed by OR'ing bits from
+*		XBRAM_IR* bits which are contained in
+*		xbram_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XBram_InterruptClear(XBram *InstancePtr, u32 Mask)
+{
+	u32 Register;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->Config.CtrlBaseAddress != 0);
+
+	/*
+	 * Read the interrupt status register and only clear the interrupts
+	 * that are specified without affecting any others.  Since the register
+	 * is a toggle on write, make sure any bits to be written are already
+	 * set.
+	 */
+	Register = XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress,
+					XBRAM_ECC_STATUS_OFFSET);
+	XBram_WriteReg(InstancePtr->Config.CtrlBaseAddress,
+				XBRAM_ECC_STATUS_OFFSET,
+				Register & Mask);
+
+
+}
+
+
+/****************************************************************************/
+/**
+* Returns the interrupt enable mask. This function will assert if the
+* hardware device has not been built with interrupt capabilities.
+*
+* @param	InstancePtr is the BRAM instance to operate on.
+*
+* @return	A mask of bits made from XBRAM_IR* bits which
+*		are contained in xbram_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XBram_InterruptGetEnabled(XBram * InstancePtr)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(InstancePtr->Config.CtrlBaseAddress != 0);
+
+	return XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress,
+				XBRAM_ECC_EN_IRQ_OFFSET);
+}
+
+
+/****************************************************************************/
+/**
+* Returns the status of interrupt signals. Any bit in the mask set to 1
+* indicates that the channel associated with the bit has asserted an interrupt
+* condition. This function will assert if the hardware device has not been
+* built with interrupt capabilities.
+*
+* @param	InstancePtr is the BRAM instance to operate on.
+*
+* @return	A pointer to a mask of bits made from XBRAM_IR*
+*		bits which are contained in xbram_hw.h.
+*
+* @note
+*
+* The interrupt status indicates the status of the device irregardless if
+* the interrupts from the devices have been enabled or not through
+* XBram_InterruptEnable().
+*
+*****************************************************************************/
+u32 XBram_InterruptGetStatus(XBram * InstancePtr)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(InstancePtr->Config.CtrlBaseAddress != 0);
+
+	return XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress,
+				XBRAM_ECC_EN_IRQ_OFFSET);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/bram_v4_2/src/xbram_selftest.c b/src/Xilinx/libsrc/bram_v4_2/src/xbram_selftest.c
new file mode 100644
index 0000000..c1bb514
--- /dev/null
+++ b/src/Xilinx/libsrc/bram_v4_2/src/xbram_selftest.c
@@ -0,0 +1,559 @@
+/******************************************************************************
+*
+* Copyright (C) 2011 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xbram_selftest.c
+* @addtogroup bram_v4_2
+* @{
+*
+* The implementation of the XBram driver's self test function. This SelfTest
+* is only applicable if ECC is enabled.
+* If ECC is not enabled then this function will return XST_SUCCESS.
+* See xbram.h for more information about the driver.
+* Temp change
+*
+* @note
+*
+* None
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sa   11/24/10 First release
+* 3.01a sa   01/13/12  Changed Selftest API from
+*		       XBram_SelfTest(XBram *InstancePtr) to
+*		       XBram_SelfTest(XBram *InstancePtr, u8 IntMask) and
+*		       fixed a problem with interrupt generation for CR 639274
+*		       Modified Selftest example to return XST_SUCCESS when
+*		       ECC is not enabled and return XST_FAILURE when ECC is
+*		       enabled and Control Base Address is zero (CR 636581)
+*		       Modified Selftest to use correct CorrectableCounterBits
+*		       for CR 635655
+*		       Updated to check CorrectableFailingDataRegs in the case
+*		       of LMB BRAM.
+* 3.02a sa  04/16/12   Added test of byte and halfword read-modify-write
+* 3.03a bss 05/22/13   Added Xil_DCacheFlushRange in InjectErrors API to
+*		       flush the Cache after writing to BRAM (CR #719011)
+* 

+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xbram.h"
+#include "xil_cache.h"
+/************************** Constant Definitions ****************************/
+#define TOTAL_BITS	39
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+#define RD(reg)		XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress, \
+					XBRAM_ ## reg)
+#define WR(reg, data)	XBram_WriteReg(InstancePtr->Config.CtrlBaseAddress, \
+						XBRAM_ ## reg, data)
+
+#define CHECK(reg, data, result) if (result!=XST_SUCCESS || RD(reg)!=data) \
+						result = XST_FAILURE;
+
+/************************** Variable Definitions ****************************/
+static u32 PrngResult;
+
+/************************** Function Prototypes *****************************/
+static inline u32 PrngData(u32 *PrngResult);
+
+static inline u32 CalculateEcc(u32 Data);
+
+static void InjectErrors(XBram * InstancePtr, u32 Addr,
+			 int Index1, int Index2, int Width,
+			 u32 *ActualData, u32 *ActualEcc);
+
+
+/*****************************************************************************/
+/**
+* Generate a pseudo random number.
+*
+* @param	The PrngResult is the previous random number in the pseudo
+*		random sequence, also knwon as the seed. It is modified to
+*		the calculated pseudo random number by the function.
+*
+* @return 	The generated pseudo random number
+*
+* @note		None.
+*
+******************************************************************************/
+static inline u32 PrngData(u32 *PrngResult)
+{
+	*PrngResult = *PrngResult * 0x77D15E25 + 0x3617C161;
+	return *PrngResult;
+}
+
+
+/*****************************************************************************/
+/**
+* Calculate ECC from Data.
+*
+* @param	The Data Value
+*
+* @return 	The calculated ECC
+*
+* @note		None.
+*
+******************************************************************************/
+static inline u32 CalculateEcc(u32 Data)
+{
+	unsigned char c[7], d[32];
+	u32 Result = 0;
+	int Index;
+
+	for (Index = 0; Index < 32; Index++) {
+		d[31 - Index] = Data & 1;
+		Data = Data >> 1;
+	}
+
+	c[0] =  d[0]  ^ d[1]  ^ d[3]  ^ d[4]  ^ d[6]  ^ d[8]  ^ d[10] ^ d[11] ^
+		d[13] ^ d[15] ^ d[17] ^ d[19] ^ d[21] ^ d[23] ^ d[25] ^ d[26] ^
+		d[28] ^ d[30];
+
+	c[1] =  d[0]  ^ d[2]  ^ d[3]  ^ d[5]  ^ d[6]  ^ d[9]  ^ d[10] ^ d[12] ^
+		d[13] ^ d[16] ^ d[17] ^ d[20] ^ d[21] ^ d[24] ^ d[25] ^ d[27] ^
+		d[28] ^ d[31];
+
+	c[2] =  d[1]  ^ d[2]  ^ d[3]  ^ d[7]  ^ d[8]  ^ d[9]  ^ d[10] ^ d[14] ^
+		d[15] ^ d[16] ^ d[17] ^ d[22] ^ d[23] ^ d[24] ^ d[25] ^ d[29] ^
+		d[30] ^ d[31];
+
+	c[3] =  d[4]  ^ d[5]  ^ d[6]  ^ d[7]  ^ d[8]  ^ d[9]  ^ d[10] ^ d[18] ^
+		d[19] ^ d[20] ^ d[21] ^ d[22] ^ d[23] ^ d[24] ^ d[25];
+
+	c[4] =  d[11] ^ d[12] ^ d[13] ^ d[14] ^ d[15] ^ d[16] ^ d[17] ^ d[18] ^
+		d[19] ^ d[20] ^ d[21] ^ d[22] ^ d[23] ^ d[24] ^ d[25];
+
+	c[5] = d[26] ^ d[27] ^ d[28] ^ d[29] ^ d[30] ^ d[31];
+
+	c[6] =  d[0]  ^ d[1]  ^ d[2]  ^ d[3]  ^ d[4]  ^  d[5] ^  d[6] ^ d[7]  ^
+		d[8]  ^ d[9]  ^ d[10] ^ d[11] ^ d[12] ^ d[13] ^ d[14] ^ d[15] ^
+		d[16] ^ d[17] ^ d[18] ^ d[19] ^ d[20] ^ d[21] ^ d[22] ^ d[23] ^
+		d[24] ^ d[25] ^ d[26] ^ d[27] ^ d[28] ^ d[29] ^ d[30] ^ d[31] ^
+		c[5]  ^ c[4]  ^ c[3] ^  c[2]  ^ c[1]  ^ c[0];
+
+	for (Index = 0; Index < 7; Index++) {
+		Result = Result << 1;
+		Result |= c[Index] & 1;
+	}
+
+	return Result;
+}
+
+/*****************************************************************************/
+/**
+* Get the expected actual data read in case of uncorrectable errors.
+*
+* @param	The injected data value including errors (if any)
+* @param	The syndrome (calculated ecc ^ actual ecc read)
+*
+* @return 	The actual data value read
+*
+* @note		None.
+*
+******************************************************************************/
+static inline u32 UncorrectableData(u32 Data, u8 Syndrome)
+{
+	switch (Syndrome) {
+		case 0x03: return Data ^ 0x00000034;
+		case 0x05: return Data ^ 0x001a2000;
+		case 0x09: return Data ^ 0x0d000000;
+		case 0x0d: return Data ^ 0x00001a00;
+
+		case 0x11: return Data ^ 0x60000000;
+		case 0x13: return Data ^ 0x00000003;
+		case 0x15: return Data ^ 0x00018000;
+		case 0x19: return Data ^ 0x00c00000;
+		case 0x1d: return Data ^ 0x00000180;
+
+		case 0x21: return Data ^ 0x80000000;
+		case 0x23: return Data ^ 0x00000008;
+		case 0x25: return Data ^ 0x00040000;
+		case 0x29: return Data ^ 0x02000000;
+		case 0x2d: return Data ^ 0x00000400;
+
+		case 0x31: return Data ^ 0x10000000;
+		case 0x35: return Data ^ 0x00004000;
+		case 0x39: return Data ^ 0x00200000;
+		case 0x3d: return Data ^ 0x00000040;
+	}
+	return Data;
+}
+
+/*****************************************************************************/
+/**
+* Inject errors using the hardware fault injection functionality, and write
+* random data and read it back using the indicated location.
+*
+* @param	InstancePtr is a pointer to the XBram instance to
+*		be worked on.
+* @param	The Addr is the indicated memory location to use
+* @param	The Index1 is the bit location of the first injected error
+* @param	The Index2 is the bit location of the second injected error
+* @param	The Width is the data byte width
+* @param	The ActualData is filled in with expected data for checking
+* @param	The ActualEcc is filled in with expected ECC for checking
+*
+* @return 	None
+*
+* @note		None.
+*
+******************************************************************************/
+static void InjectErrors(XBram * InstancePtr, u32 Addr,
+			 int Index1, int Index2, int Width,
+			 u32 *ActualData, u32 *ActualEcc)
+{
+	u32 InjectedData = 0;
+	u32 InjectedEcc = 0;
+	u32 RandomData = PrngData(&PrngResult);
+
+	if (Index1 < 32) {
+		InjectedData = 1 << Index1;
+	} else {
+		InjectedEcc = 1 << (Index1 - 32);
+	}
+
+	if (Index2 < 32) {
+		InjectedData |= (1 << Index2);
+	} else {
+		InjectedEcc |= 1 << (Index2 - 32);
+	}
+
+	WR(FI_D_0_OFFSET, InjectedData);
+	WR(FI_ECC_0_OFFSET, InjectedEcc);
+
+	XBram_Out32(Addr, RandomData);
+	Xil_DCacheFlushRange(Addr, 4);
+	switch (Width) {
+		case 1: /* Byte - Write to do Read-Modify-Write */
+			XBram_Out8(Addr, PrngData(&PrngResult) & 0xFF);
+			break;
+		case 2: /* Halfword - Write to do Read-Modify-Write */
+			XBram_Out16(Addr, PrngData(&PrngResult) & 0xFFFF);
+			break;
+		case 4:	/* Word - Read */
+			(void) XBram_In32(Addr);
+			break;
+	}
+	*ActualData = InjectedData ^ RandomData;
+	*ActualEcc  = InjectedEcc ^ CalculateEcc(RandomData);
+}
+
+
+/*****************************************************************************/
+/**
+* Run a self-test on the driver/device. Unless fault injection is implemented
+* in hardware, this function only does a minimal test in which available
+* registers (if any) are written and read.
+*
+* With fault injection, all possible single-bit and double-bit errors are
+* injected, and checked to the extent possible, given the implemented hardware.
+*
+* @param	InstancePtr is a pointer to the XBram instance.
+* @param	IntMask is the interrupt mask to use. When testing
+*		with interrupts, this should be set to allow interrupt
+*		generation, otherwise it should be 0.
+*
+* @return
+*		- XST_SUCCESS if fault injection/detection is working properly OR
+*		  if ECC is Not Enabled in the HW.
+*		- XST_FAILURE if the injected fault is not correctly detected or
+*		  the Control Base Address is Zero when ECC is enabled.
+*		.
+*
+*		If the BRAM device is not present in the
+*		hardware a bus error could be generated. Other indicators of a
+*		bus error, such as registers in bridges or buses, may be
+*		necessary to determine if this function caused a bus error.
+*
+* @note		None.
+*
+******************************************************************************/
+int XBram_SelfTest(XBram *InstancePtr, u8 IntMask)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+
+
+	if (InstancePtr->Config.EccPresent == 0) {
+		return (XST_SUCCESS);
+	}
+
+	if (InstancePtr->Config.CtrlBaseAddress == 0) {
+		return (XST_SUCCESS);
+	}
+
+	/*
+	 * Only 32-bit data width is supported as of yet. 64-bit and 128-bit
+	 * widths will be supported in future.
+	 */
+	if (InstancePtr->Config.DataWidth != 32)
+		return (XST_SUCCESS);
+
+	/*
+	 * Read from the implemented readable registers in the hardware device.
+	 */
+	if (InstancePtr->Config.CorrectableFailingRegisters) {
+		(void) RD(CE_FFA_0_OFFSET);
+	}
+	if (InstancePtr->Config.CorrectableFailingDataRegs) {
+		(void) RD(CE_FFD_0_OFFSET);
+		(void) RD(CE_FFE_0_OFFSET);
+	}
+	if (InstancePtr->Config.UncorrectableFailingRegisters) {
+		(void) RD(UE_FFA_0_OFFSET);
+	}
+	if (InstancePtr->Config.UncorrectableFailingDataRegs) {
+		(void) RD(UE_FFD_0_OFFSET);
+		(void) RD(UE_FFE_0_OFFSET);
+	}
+
+	/*
+	 * Write and read the implemented read/write registers in the hardware
+	 * device.
+	 */
+	if (InstancePtr->Config.EccStatusInterruptPresent) {
+		WR(ECC_EN_IRQ_OFFSET, 0);
+		if (RD(ECC_EN_IRQ_OFFSET) != 0) {
+			return (XST_FAILURE);
+		}
+	}
+
+	if (InstancePtr->Config.CorrectableCounterBits > 0) {
+		u32 Value;
+
+		/* Calculate counter max value */
+		if (InstancePtr->Config.CorrectableCounterBits == 32) {
+		 	Value = 0xFFFFFFFF;
+		} else {
+		 	Value = (1 <<
+		 		InstancePtr->Config.CorrectableCounterBits) - 1;
+		 }
+
+		WR(CE_CNT_OFFSET, Value);
+		if (RD(CE_CNT_OFFSET) != Value) {
+			return (XST_FAILURE);
+		}
+
+		WR(CE_CNT_OFFSET, 0);
+		if (RD(CE_CNT_OFFSET) != 0) {
+			return (XST_FAILURE);
+		}
+	}
+
+	/*
+	 * If fault injection is implemented, inject all possible single-bit
+	 * and double-bit errors, and check all observable effects.
+	 */
+	if (InstancePtr->Config.FaultInjectionPresent &&
+	    InstancePtr->Config.WriteAccess != 0) {
+
+	    const u32 Addr[2] = {InstancePtr->Config.MemBaseAddress &
+					0xfffffffc,
+				 InstancePtr->Config.MemHighAddress &
+					0xfffffffc};
+	    u32 SavedWords[2];
+	    u32 ActualData;
+	    u32 ActualEcc;
+	    u32 CounterValue = 0;
+	    u32 CounterMax;
+	    int WordIndex = 0;
+	    int Result = XST_SUCCESS;
+	    int Index1;
+	    int Index2;
+	    int Width;
+
+	    PrngResult = 42; /* Random seed */
+
+	    /* Save two words in BRAM used for test */
+	    SavedWords[0] = XBram_In32(Addr[0]);
+	    SavedWords[1] = XBram_In32(Addr[1]);
+
+	    for (Width = 1; Width <= 4; Width <<= 1) {
+		/* Calculate counter max value */
+		if (InstancePtr->Config.CorrectableCounterBits == 32) {
+			CounterMax = 0xFFFFFFFF;
+		} else {
+			CounterMax =(1 <<
+				InstancePtr->Config.CorrectableCounterBits) - 1;
+		}
+
+		/* Inject and check all single bit errors */
+		for (Index1 = 0; Index1 < TOTAL_BITS; Index1++) {
+			/* Save counter value */
+			if (InstancePtr->Config.CorrectableCounterBits > 0) {
+				CounterValue = RD(CE_CNT_OFFSET);
+			}
+
+			/* Inject single bit error */
+			InjectErrors(InstancePtr, Addr[WordIndex], Index1,
+				     Index1, Width, &ActualData, &ActualEcc);
+
+			/* Check that CE is set */
+			if (InstancePtr->Config.EccStatusInterruptPresent) {
+				CHECK(ECC_STATUS_OFFSET,
+					XBRAM_IR_CE_MASK, Result);
+			}
+
+			/* Check that address, data, ECC are correct */
+			if (InstancePtr->Config.CorrectableFailingRegisters) {
+				CHECK(CE_FFA_0_OFFSET, Addr[WordIndex], Result);
+ 			}
+ 			/* Checks are only for LMB BRAM */
+ 			if (InstancePtr->Config.CorrectableFailingDataRegs) {
+  				CHECK(CE_FFD_0_OFFSET, ActualData, Result);
+  				CHECK(CE_FFE_0_OFFSET, ActualEcc, Result);
+  			}
+
+			/* Check that counter has incremented */
+			if (InstancePtr->Config.CorrectableCounterBits > 0 &&
+				CounterValue < CounterMax) {
+					CHECK(CE_CNT_OFFSET,
+					CounterValue + 1, Result);
+			}
+
+			/* Restore correct data in the used word */
+			XBram_Out32(Addr[WordIndex], SavedWords[WordIndex]);
+
+			/* Allow interrupts to occur */
+			/* Clear status register */
+			if (InstancePtr->Config.EccStatusInterruptPresent) {
+				WR(ECC_EN_IRQ_OFFSET, IntMask);
+				WR(ECC_STATUS_OFFSET, XBRAM_IR_ALL_MASK);
+				WR(ECC_EN_IRQ_OFFSET, 0);
+			}
+
+			/* Switch to the other word */
+			WordIndex = WordIndex ^ 1;
+
+			if (Result != XST_SUCCESS) break;
+
+		}
+
+		if (Result != XST_SUCCESS) {
+			return XST_FAILURE;
+		}
+
+		for (Index1 = 0; Index1 < TOTAL_BITS; Index1++) {
+			for (Index2 = 0; Index2 < TOTAL_BITS; Index2++) {
+			    if (Index1 != Index2) {
+				/* Inject double bit error */
+				InjectErrors(InstancePtr,
+					Addr[WordIndex],
+						Index1, Index2, Width,
+						&ActualData,
+						&ActualEcc);
+
+				/* Check that UE is set */
+				if (InstancePtr->Config.
+				    EccStatusInterruptPresent) {
+					CHECK(ECC_STATUS_OFFSET,
+					XBRAM_IR_UE_MASK,
+					Result);
+				}
+
+				/* Check that address, data, ECC are correct */
+				if (InstancePtr->Config.
+				    UncorrectableFailingRegisters) {
+					CHECK(UE_FFA_0_OFFSET, Addr[WordIndex],
+							Result);
+					CHECK(UE_FFD_0_OFFSET,
+						ActualData, Result);
+					CHECK(UE_FFE_0_OFFSET, ActualEcc,
+						Result);
+					}
+
+				/* Restore correct data in the used word */
+				XBram_Out32(Addr[WordIndex],
+						SavedWords[WordIndex]);
+
+				/* Allow interrupts to occur */
+				/* Clear status register */
+				if (InstancePtr->Config.
+				    EccStatusInterruptPresent) {
+					WR(ECC_EN_IRQ_OFFSET, IntMask);
+					WR(ECC_STATUS_OFFSET,
+						XBRAM_IR_ALL_MASK);
+					WR(ECC_EN_IRQ_OFFSET, 0);
+				}
+
+				/* Switch to the other word */
+				WordIndex = WordIndex ^ 1;
+			    }
+				if (Result != XST_SUCCESS) break;
+			}
+			if (Result != XST_SUCCESS) break;
+		}
+
+		/* Check saturation of correctable error counter */
+		if (InstancePtr->Config.CorrectableCounterBits > 0 &&
+			Result == XST_SUCCESS) {
+
+				WR(CE_CNT_OFFSET, CounterMax);
+
+				InjectErrors(InstancePtr, Addr[WordIndex], 0, 0,
+					4, &ActualData, &ActualEcc);
+
+				CHECK(CE_CNT_OFFSET, CounterMax, Result);
+		}
+
+		/* Restore the two words used for test */
+		XBram_Out32(Addr[0], SavedWords[0]);
+		XBram_Out32(Addr[1], SavedWords[1]);
+
+		/* Clear the Status Register. */
+		if (InstancePtr->Config.EccStatusInterruptPresent) {
+			WR(ECC_STATUS_OFFSET, XBRAM_IR_ALL_MASK);
+		}
+
+		/* Set Correctable Counter to zero */
+		if (InstancePtr->Config.CorrectableCounterBits > 0) {
+			WR(CE_CNT_OFFSET, 0);
+		}
+
+		if (Result != XST_SUCCESS) break;
+
+	    } /* Width loop */
+
+	    return (Result);
+	}
+
+	return (XST_SUCCESS);
+}
+
+/** @} */
diff --git a/src/Xilinx/libsrc/bram_v4_2/src/xbram_sinit.c b/src/Xilinx/libsrc/bram_v4_2/src/xbram_sinit.c
new file mode 100644
index 0000000..617a566
--- /dev/null
+++ b/src/Xilinx/libsrc/bram_v4_2/src/xbram_sinit.c
@@ -0,0 +1,105 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xbram_sinit.c
+* @addtogroup bram_v4_2
+* @{
+*
+* The implementation of the XBram driver's static initialzation
+* functionality.
+*
+* @note
+*
+* None
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 2.01a jvb  10/13/05 First release
+* 2.11a mta  03/21/07 Updated to new coding style
+* 4.2   ms   08/07/17 Fixed compilation warnings.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xstatus.h"
+#include "xparameters.h"
+#include "xbram.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+extern XBram_Config XBram_ConfigTable[];
+
+/************************** Function Prototypes *****************************/
+
+
+/*****************************************************************************/
+/**
+* Lookup the device configuration based on the unique device ID.  The table
+* ConfigTable contains the configuration info for each device in the system.
+*
+* @param	DeviceId is the device identifier to lookup.
+*
+* @return
+*		 - A pointer of data type XBram_Config which
+*		points to the device configuration if DeviceID is found.
+* 		- NULL if DeviceID is not found.
+*
+* @note		None.
+*
+******************************************************************************/
+XBram_Config *XBram_LookupConfig(u16 DeviceId)
+{
+	XBram_Config *CfgPtr = NULL;
+
+	u32 Index;
+
+	for (Index = 0U; Index < XPAR_XBRAM_NUM_INSTANCES; Index++) {
+		if (XBram_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XBram_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/canps_v3_2/src/Makefile b/src/Xilinx/libsrc/canps_v3_2/src/Makefile
new file mode 100644
index 0000000..5556570
--- /dev/null
+++ b/src/Xilinx/libsrc/canps_v3_2/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xcanps_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling canps"
+
+xcanps_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xcanps_includes
+
+xcanps_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/canps_v3_2/src/xcanps.c b/src/Xilinx/libsrc/canps_v3_2/src/xcanps.c
new file mode 100644
index 0000000..f852de4
--- /dev/null
+++ b/src/Xilinx/libsrc/canps_v3_2/src/xcanps.c
@@ -0,0 +1,1205 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcanps.c
+* @addtogroup canps_v3_2
+* @{
+*
+* Functions in this file are the minimum required functions for the XCanPs
+* driver. See xcanps.h for a detailed description of the driver.
+*
+* @note 	None.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00a xd/sv  01/12/10 First release
+* 1.01a bss    12/27/11 Added the APIs XCanPs_SetTxIntrWatermark and
+* 			XCanPs_GetTxIntrWatermark.
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xcanps.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+static void StubHandler(void);
+
+/*****************************************************************************/
+/*
+*
+* This function initializes a XCanPs instance/driver.
+*
+* The initialization entails:
+* - Initialize all members of the XCanPs structure.
+* - Reset the CAN device. The CAN device will enter Configuration Mode
+*   immediately after the reset is finished.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	ConfigPtr points to the XCanPs device configuration structure.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. If the address translation is not used then the
+*		physical address is passed.
+*		Unexpected errors may occur if the address mapping is changed
+*		after this function is invoked.
+*
+* @return	XST_SUCCESS always.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XCanPs_CfgInitialize(XCanPs *InstancePtr, XCanPs_Config *ConfigPtr,
+				u32 EffectiveAddr)
+{
+	s32 Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+
+	/*
+	 * Set some default values for instance data, don't indicate the device
+	 * is ready to use until everything has been initialized successfully.
+	 */
+	InstancePtr->IsReady = 0U;
+	InstancePtr->CanConfig.BaseAddr = EffectiveAddr;
+	InstancePtr->CanConfig.DeviceId = ConfigPtr->DeviceId;
+
+	/*
+	 * Set all handlers to stub values, let user configure this data later.
+	 */
+	InstancePtr->SendHandler = (XCanPs_SendRecvHandler) StubHandler;
+	InstancePtr->RecvHandler = (XCanPs_SendRecvHandler) StubHandler;
+	InstancePtr->ErrorHandler = (XCanPs_ErrorHandler) StubHandler;
+	InstancePtr->EventHandler = (XCanPs_EventHandler) StubHandler;
+
+	/*
+	 * Indicate the component is now ready to use.
+	 */
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+
+	/*
+	 * Reset the device to get it into its initial state.
+	 */
+	XCanPs_Reset(InstancePtr);
+
+	Status = XST_SUCCESS;
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function resets the CAN device. Calling this function resets the device
+* immediately, and any pending transmission or reception is terminated at once.
+* Both Object Layer and Transfer Layer are reset. This function does not reset
+* the Physical Layer. All registers are reset to the default values, and no
+* previous status will be restored. TX FIFO, RX FIFO and TX High Priority
+* Buffer are also reset.
+*
+* When a reset is required due to an internal error, the driver notifies the
+* upper layer software of this need through the error status code or interrupts.
+* The upper layer software is responsible for calling this Reset function and
+* then re-configuring the device.
+*
+* The CAN device will be in Configuration Mode immediately after this function
+* returns.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCanPs_Reset(XCanPs *InstancePtr)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_SRR_OFFSET, \
+			   XCANPS_SRR_SRST_MASK);
+}
+
+/****************************************************************************/
+/**
+*
+* This routine returns the current operation mode of the CAN device.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return
+* 		- XCANPS_MODE_CONFIG if the device is in Configuration Mode.
+* 		- XCANPS_MODE_SLEEP if the device is in Sleep Mode.
+* 		- XCANPS_MODE_NORMAL if the device is in Normal Mode.
+* 		- XCANPS_MODE_LOOPBACK if the device is in Loop Back Mode.
+* 		- XCANPS_MODE_SNOOP if the device is in Snoop Mode.
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 XCanPs_GetMode(XCanPs *InstancePtr)
+{
+	u32 StatusReg;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	StatusReg = XCanPs_GetStatus(InstancePtr);
+
+	if ((StatusReg & XCANPS_SR_CONFIG_MASK) != (u32)0) {
+		return (u8)XCANPS_MODE_CONFIG;
+
+	}
+	else if ((StatusReg & XCANPS_SR_SLEEP_MASK) != (u32)0) {
+		return (u8)XCANPS_MODE_SLEEP;
+
+	}
+	else if ((StatusReg & XCANPS_SR_NORMAL_MASK) != (u32)0) {
+		if ((StatusReg & XCANPS_SR_SNOOP_MASK) != (u32)0) {
+			return (u8)XCANPS_MODE_SNOOP;
+		} else {
+			return (u8)XCANPS_MODE_NORMAL;
+		}
+	}
+	else {
+		/*
+		 * If this line is reached, the device is in Loop Back Mode.
+		 */
+		return (u8)XCANPS_MODE_LOOPBACK;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function allows the CAN device to enter one of the following operation
+* modes:
+*	- Configuration Mode: Pass in parameter XCANPS_MODE_CONFIG
+*	- Sleep Mode: Pass in parameter XCANPS_MODE_SLEEP
+*	- Normal Mode: Pass in parameter XCANPS_MODE_NORMAL
+*	- Loop Back Mode: Pass in parameter XCANPS_MODE_LOOPBACK.
+*	- Snoop Mode: Pass in parameter XCANPS_MODE_SNOOP.
+*
+* Read the xcanps.h file and device specification for detailed description of
+* each operation mode.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	OperationMode specify which operation mode to enter. Valid value
+*		is any of XCANPS_MODE_* defined in xcanps.h. Multiple modes
+*		can not be entered at the same time.
+*
+* @return	None.
+*
+* @note
+*
+* This function does NOT ensure CAN device enters the specified operation mode
+* before it returns the control to the caller. The caller is responsible for
+* checking current operation mode using XCanPs_GetMode().
+*
+******************************************************************************/
+void XCanPs_EnterMode(XCanPs *InstancePtr, u8 OperationMode)
+{
+	u8 CurrentMode;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((OperationMode == (u8)XCANPS_MODE_CONFIG) ||
+			(OperationMode == (u8)XCANPS_MODE_SLEEP) ||
+			(OperationMode == (u8)XCANPS_MODE_NORMAL) ||
+			(OperationMode == (u8)XCANPS_MODE_LOOPBACK) ||
+			(OperationMode == (u8)XCANPS_MODE_SNOOP));
+
+	CurrentMode = XCanPs_GetMode(InstancePtr);
+
+	/*
+	 * If current mode is Normal Mode and the mode to enter is Sleep Mode,
+	 * or if current mode is Sleep Mode and the mode to enter is Normal
+	 * Mode, no transition through Configuration Mode is needed.
+	 */
+	if ((CurrentMode == (u8)XCANPS_MODE_NORMAL) &&
+		(OperationMode == (u8)XCANPS_MODE_SLEEP)) {
+		/*
+		 * Normal Mode ---> Sleep Mode
+		 */
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_MSR_OFFSET, XCANPS_MSR_SLEEP_MASK);
+		return;
+
+	} else if ((CurrentMode == (u8)XCANPS_MODE_SLEEP) &&
+		 (OperationMode == (u8)XCANPS_MODE_NORMAL)) {
+		/*
+		 * Sleep Mode ---> Normal Mode
+		 */
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_MSR_OFFSET, 0U);
+		return;
+	}
+	else {
+		/*This else was made for misra-c compliance*/
+		;
+	}
+
+	/*
+	 * If the mode transition is not any of the two cases above, CAN must
+	 * enter Configuration Mode before switching into the target operation
+	 * mode.
+	 */
+	XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_SRR_OFFSET, 0U);
+
+	/*
+	 * Check if the device has entered Configuration Mode, if not, return to
+	 * the caller.
+	 */
+	if (XCanPs_GetMode(InstancePtr) != (u8)XCANPS_MODE_CONFIG) {
+		return;
+	}
+
+	switch (OperationMode) {
+		case XCANPS_MODE_CONFIG:
+			/*
+			 * As CAN is in Configuration Mode already.
+			 * Nothing is needed to be done here.
+			 */
+			break;
+
+		case XCANPS_MODE_SLEEP:
+			XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_MSR_OFFSET, XCANPS_MSR_SLEEP_MASK);
+			XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_SRR_OFFSET, XCANPS_SRR_CEN_MASK);
+			break;
+
+		case XCANPS_MODE_NORMAL:
+			XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_MSR_OFFSET, 0U);
+			XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_SRR_OFFSET, XCANPS_SRR_CEN_MASK);
+			break;
+
+		case XCANPS_MODE_LOOPBACK:
+			XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_MSR_OFFSET, XCANPS_MSR_LBACK_MASK);
+			XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_SRR_OFFSET, XCANPS_SRR_CEN_MASK);
+			break;
+
+		case XCANPS_MODE_SNOOP:
+			XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_MSR_OFFSET, XCANPS_MSR_SNOOP_MASK);
+			XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_SRR_OFFSET, XCANPS_SRR_CEN_MASK);
+			break;
+
+		default:
+			/*This default was made for misra-c compliance*/
+			break;
+
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns Status value from Status Register (SR). Use the
+* XCANPS_SR_* constants defined in xcanps_hw.h to interpret the returned
+* value.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return	The 32-bit value read from Status Register.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 XCanPs_GetStatus(XCanPs *InstancePtr)
+{
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	return XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_SR_OFFSET);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function reads Receive and Transmit error counters.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	RxErrorCount is a pointer to data in which the Receive Error
+*		counter value is returned.
+* @param	TxErrorCount is a pointer to data in which the Transmit Error
+*		counter value is returned.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCanPs_GetBusErrorCounter(XCanPs *InstancePtr, u8 *RxErrorCount,
+				 u8 *TxErrorCount)
+{
+	u32 ErrorCount;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(RxErrorCount != NULL);
+	Xil_AssertVoid(TxErrorCount != NULL);
+	/*
+	 * Read Error Counter Register and parse it.
+	 */
+	ErrorCount = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_ECR_OFFSET);
+	*RxErrorCount = (u8)((ErrorCount & XCANPS_ECR_REC_MASK) >>
+				XCANPS_ECR_REC_SHIFT);
+	*TxErrorCount = (u8)(ErrorCount & XCANPS_ECR_TEC_MASK);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function reads Error Status value from Error Status Register (ESR). Use
+* the XCANPS_ESR_* constants defined in xcanps_hw.h to interpret the
+* returned value.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return	The 32-bit value read from Error Status Register.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 XCanPs_GetBusErrorStatus(XCanPs *InstancePtr)
+{
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	return XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_ESR_OFFSET);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function clears Error Status bit(s) previously set in Error
+* Status Register (ESR). Use the XCANPS_ESR_* constants defined in xcanps_hw.h
+* to create the value to pass in. If a bit was cleared in Error Status Register
+* before this function is called, it will not be modified.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @param	Mask is he 32-bit mask used to clear bits in Error Status
+*		Register. Multiple XCANPS_ESR_* values can be 'OR'ed to clear
+*		multiple bits.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCanPs_ClearBusErrorStatus(XCanPs *InstancePtr, u32 Mask)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+			XCANPS_ESR_OFFSET, Mask);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sends a CAN Frame. If the TX FIFO is not full then the given
+* frame is written into the the TX FIFO otherwise, it returns an error code
+* immediately.
+* This function does not wait for the given frame being sent to CAN bus.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	FramePtr is a pointer to a 32-bit aligned buffer containing the
+*		CAN frame to be sent.
+*
+* @return
+*		- XST_SUCCESS if TX FIFO was not full and the given frame was
+*		written into the FIFO.
+*		- XST_FIFO_NO_ROOM if there is no room in the TX FIFO for the
+*		given frame.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XCanPs_Send(XCanPs *InstancePtr, u32 *FramePtr)
+{
+	s32 Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(FramePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (XCanPs_IsTxFifoFull(InstancePtr) == TRUE) {
+		Status = XST_FIFO_NO_ROOM;
+	} else {
+
+		/*
+		 * Write IDR, DLC, Data Word 1 and Data Word 2 to the CAN device.
+		 */
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_TXFIFO_ID_OFFSET, FramePtr[0]);
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_TXFIFO_DLC_OFFSET, FramePtr[1]);
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_TXFIFO_DW1_OFFSET, Xil_EndianSwap32(FramePtr[2]));
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_TXFIFO_DW2_OFFSET, Xil_EndianSwap32(FramePtr[3]));
+
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function receives a CAN Frame. This function first checks if RX FIFO is
+* empty, if not, it then reads a frame from the RX FIFO into the given buffer.
+* This function returns error code immediately if there is no frame in the RX
+* FIFO.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	FramePtr is a pointer to a 32-bit aligned buffer where the CAN
+*		frame to be written.
+*
+* @return
+*		- XST_SUCCESS if RX FIFO was not empty and a frame was read from
+*		RX FIFO successfully and written into the given buffer.
+*		- XST_NO_DATA if there is no frame to be received from the FIFO.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XCanPs_Recv(XCanPs *InstancePtr, u32 *FramePtr)
+{
+	s32 Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(FramePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (XCanPs_IsRxEmpty(InstancePtr) == TRUE) {
+		Status = XST_NO_DATA;
+	} else {
+
+		/*
+		 * Read IDR, DLC, Data Word 1 and Data Word 2 from the CAN device.
+		 */
+		FramePtr[0] = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						XCANPS_RXFIFO_ID_OFFSET);
+		FramePtr[1] = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						XCANPS_RXFIFO_DLC_OFFSET);
+		FramePtr[2] = Xil_EndianSwap32(XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						XCANPS_RXFIFO_DW1_OFFSET));
+		FramePtr[3] = Xil_EndianSwap32(XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						XCANPS_RXFIFO_DW2_OFFSET));
+
+		/*
+		 * Clear RXNEMP bit in ISR. This allows future XCanPs_IsRxEmpty() call
+		 * returns correct RX FIFO occupancy/empty condition.
+		 */
+		XCanPs_IntrClear(InstancePtr, XCANPS_IXR_RXNEMP_MASK);
+
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine sends a CAN High Priority frame. This function first checks if
+* TX High Priority Buffer is empty. If yes, it then writes the given frame into
+* the Buffer. If not, this function returns immediately. This function does not
+* wait for the given frame being sent to CAN bus.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	FramePtr is a pointer to a 32-bit aligned buffer containing the
+*		CAN High Priority frame to be sent.
+*
+* @return
+*		- XST_SUCCESS if TX High Priority Buffer was not full and the
+*		given frame was written into the buffer.
+*		- XST_FIFO_NO_ROOM if there is no room in the TX High Priority
+*		Buffer for this frame.
+*
+* @note
+*
+* If the frame needs to be sent immediately and not delayed by processor's
+* interrupt handling, the caller should disable interrupt at processor
+* level before invoking this function.
+*
+******************************************************************************/
+s32 XCanPs_SendHighPriority(XCanPs *InstancePtr, u32 *FramePtr)
+{
+	s32 Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(FramePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (XCanPs_IsHighPriorityBufFull(InstancePtr) == TRUE) {
+		Status = XST_FIFO_NO_ROOM;
+	} else {
+
+		/*
+		 * Write IDR, DLC, Data Word 1 and Data Word 2 to the CAN device.
+		 */
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_TXHPB_ID_OFFSET, FramePtr[0]);
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_TXHPB_DLC_OFFSET, FramePtr[1]);
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_TXHPB_DW1_OFFSET, Xil_EndianSwap32(FramePtr[2]));
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_TXHPB_DW2_OFFSET, Xil_EndianSwap32(FramePtr[3]));
+
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine enables individual acceptance filters. Up to 4 filters could
+* be enabled.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	FilterIndexes specifies which filter(s) to enable. Use
+*		any XCANPS_AFR_UAF*_MASK to enable one filter, and "Or"
+*		multiple XCANPS_AFR_UAF*_MASK values if multiple filters need
+*		to be enabled. Any filter not specified in this parameter will
+*		keep its previous enable/disable setting.
+*
+* @return	None.
+*
+* @note		None.
+*
+*
+******************************************************************************/
+void XCanPs_AcceptFilterEnable(XCanPs *InstancePtr, u32 FilterIndexes)
+{
+	u32 EnabledFilters;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 *  Calculate the new value and write to AFR.
+	 */
+	EnabledFilters =  XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						XCANPS_AFR_OFFSET);
+	EnabledFilters |= FilterIndexes;
+	EnabledFilters &= (u32)XCANPS_AFR_UAF_ALL_MASK;
+	XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFR_OFFSET,
+			EnabledFilters);
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine disables individual acceptance filters. Up to 4 filters could
+* be disabled. If all acceptance filters are disabled then all the received
+* frames are stored in the RX FIFO.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	FilterIndexes specifies which filter(s) to disable. Use
+*		any XCANPS_AFR_UAF*_MASK to disable one filter, and "Or"
+*		multiple XCANPS_AFR_UAF*_MASK values if multiple filters need
+* 		to be disabled. Any filter not specified in this parameter will
+*		keep its previous enable/disable setting. If all acceptance
+*		filters are disabled then all received frames are stored in the
+*		RX FIFO.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCanPs_AcceptFilterDisable(XCanPs *InstancePtr, u32 FilterIndexes)
+{
+	u32 EnabledFilters;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 *  Calculate the new value and write to AFR.
+	 */
+	EnabledFilters = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_AFR_OFFSET);
+	EnabledFilters &= (u32)XCANPS_AFR_UAF_ALL_MASK & (~FilterIndexes);
+	XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFR_OFFSET,
+			   EnabledFilters);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns enabled acceptance filters. Use XCANPS_AFR_UAF*_MASK
+* defined in xcanps_hw.h to interpret the returned value. If no acceptance
+* filters are enabled then all received frames are stored in the RX FIFO.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return	The value stored in Acceptance Filter Register.
+*
+* @note		None.
+*
+*
+******************************************************************************/
+u32 XCanPs_AcceptFilterGetEnabled(XCanPs *InstancePtr)
+{
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	return XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_AFR_OFFSET);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets values to the Acceptance Filter Mask Register (AFMR) and
+* Acceptance Filter ID Register (AFIR) for the specified Acceptance Filter.
+* Use XCANPS_IDR_* defined in xcanps_hw.h to create the values to set the
+* filter. Read the xcanps.h file and device specification for details.
+*
+* This function should be called only after:
+*   - The given filter is disabled by calling XCanPs_AcceptFilterDisable()
+*   - And the CAN device is ready to accept writes to AFMR and AFIR, i.e.,
+*	 XCanPs_IsAcceptFilterBusy() returns FALSE.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	FilterIndex defines which Acceptance Filter Mask and ID Register
+*		to set. Use any single XCANPS_AFR_UAF*_MASK value.
+* @param	MaskValue is the value to write to the chosen Acceptance Filter
+*		Mask Register.
+* @param	IdValue is the value to write to the chosen Acceptance Filter
+*		ID Register.
+*
+* @return
+*		- XST_SUCCESS if the values were set successfully.
+*		- XST_FAILURE if the given filter was not disabled, or the CAN
+*		device was not ready to accept writes to AFMR and AFIR.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XCanPs_AcceptFilterSet(XCanPs *InstancePtr, u32 FilterIndex,
+			 u32 MaskValue, u32 IdValue)
+{
+	u32 EnabledFilters;
+	s32 Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((FilterIndex == XCANPS_AFR_UAF4_MASK) ||
+			(FilterIndex == XCANPS_AFR_UAF3_MASK) ||
+			(FilterIndex == XCANPS_AFR_UAF2_MASK) ||
+			(FilterIndex == XCANPS_AFR_UAF1_MASK));
+
+	/*
+	 * Return an error if the given filter is currently enabled.
+	 */
+	EnabledFilters = XCanPs_AcceptFilterGetEnabled(InstancePtr);
+	if ((EnabledFilters & FilterIndex) == FilterIndex) {
+		Status = XST_FAILURE;
+	} else {
+
+		/*
+		 * If the CAN device is not ready to accept writes to AFMR and AFIR,
+		 * return error code.
+		 */
+		if (XCanPs_IsAcceptFilterBusy(InstancePtr) == TRUE) {
+			Status = XST_FAILURE;
+		} else {
+
+			/*
+			 * Write to the AFMR and AFIR of the specified filter.
+			 */
+			switch (FilterIndex) {
+				case XCANPS_AFR_UAF1_MASK:	/* Acceptance Filter No. 1 */
+
+					XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+							XCANPS_AFMR1_OFFSET, MaskValue);
+					XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+							XCANPS_AFIR1_OFFSET, IdValue);
+					break;
+
+				case XCANPS_AFR_UAF2_MASK:	/* Acceptance Filter No. 2 */
+					XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+							XCANPS_AFMR2_OFFSET, MaskValue);
+					XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+							XCANPS_AFIR2_OFFSET, IdValue);
+					break;
+
+				case XCANPS_AFR_UAF3_MASK:	/* Acceptance Filter No. 3 */
+					XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+							XCANPS_AFMR3_OFFSET, MaskValue);
+					XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+							XCANPS_AFIR3_OFFSET, IdValue);
+					break;
+
+				case XCANPS_AFR_UAF4_MASK:	/* Acceptance Filter No. 4 */
+					XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+							XCANPS_AFMR4_OFFSET, MaskValue);
+					XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+							XCANPS_AFIR4_OFFSET, IdValue);
+					break;
+
+				default:
+					/*This default was made for misra-c compliance*/
+					break;
+			}
+
+			Status = XST_SUCCESS;
+		}
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function reads the values of the Acceptance Filter Mask and ID Register
+* for the specified Acceptance Filter. Use XCANPS_IDR_* defined in xcanps_hw.h
+* to interpret the values. Read the xcanps.h file and device specification for
+* details.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	FilterIndex defines which Acceptance Filter Mask Register to get
+*		Mask and ID from. Use any single XCANPS_FILTER_* value.
+* @param	MaskValue is a pointer to the data in which the Mask value read
+*		from the chosen Acceptance Filter Mask Register is returned.
+* @param	IdValue is a pointer to the data in which the ID value read
+*		from the chosen Acceptance Filter ID Register is returned.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCanPs_AcceptFilterGet(XCanPs *InstancePtr, u32 FilterIndex,
+			  u32 *MaskValue, u32 *IdValue)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((FilterIndex == XCANPS_AFR_UAF4_MASK) ||
+			 (FilterIndex == XCANPS_AFR_UAF3_MASK) ||
+			 (FilterIndex == XCANPS_AFR_UAF2_MASK) ||
+			 (FilterIndex == XCANPS_AFR_UAF1_MASK));
+	Xil_AssertVoid(MaskValue != NULL);
+	Xil_AssertVoid(IdValue != NULL);
+
+	/*
+	 * Read from the AFMR and AFIR of the specified filter.
+	 */
+	switch (FilterIndex) {
+		case XCANPS_AFR_UAF1_MASK:	/* Acceptance Filter No. 1 */
+			*MaskValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						  XCANPS_AFMR1_OFFSET);
+			*IdValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						  XCANPS_AFIR1_OFFSET);
+			break;
+
+		case XCANPS_AFR_UAF2_MASK:	/* Acceptance Filter No. 2 */
+			*MaskValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						  XCANPS_AFMR2_OFFSET);
+			*IdValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						  XCANPS_AFIR2_OFFSET);
+			break;
+
+		case XCANPS_AFR_UAF3_MASK:	/* Acceptance Filter No. 3 */
+			*MaskValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						  XCANPS_AFMR3_OFFSET);
+			*IdValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						  XCANPS_AFIR3_OFFSET);
+			break;
+
+		case XCANPS_AFR_UAF4_MASK:	/* Acceptance Filter No. 4 */
+			*MaskValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						  XCANPS_AFMR4_OFFSET);
+			*IdValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+						  XCANPS_AFIR4_OFFSET);
+			break;
+
+		default:
+			/*This default was made for misra-c compliance*/
+			break;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine sets Baud Rate Prescaler value. The system clock for the CAN
+* controller is divided by (Prescaler + 1) to generate the quantum clock
+* needed for sampling and synchronization. Read the device specification
+* for details.
+*
+* Baud Rate Prescaler can be set only if the CAN device is in Configuration
+* Mode. Call XCanPs_EnterMode() to enter Configuration Mode before using this
+* function.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	Prescaler is the value to set. Valid values are from 0 to 255.
+*
+* @return
+*		- XST_SUCCESS if the Baud Rate Prescaler value is set
+*		successfully.
+*		- XST_FAILURE if CAN device is not in Configuration Mode.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XCanPs_SetBaudRatePrescaler(XCanPs *InstancePtr, u8 Prescaler)
+{
+	s32 Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (XCanPs_GetMode(InstancePtr) != (u8)XCANPS_MODE_CONFIG) {
+		Status = XST_FAILURE;
+	} else {
+
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_BRPR_OFFSET,
+					(u32)Prescaler);
+
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine gets Baud Rate Prescaler value. The system clock for the CAN
+* controller is divided by (Prescaler + 1) to generate the quantum clock
+* needed for sampling and synchronization. Read the device specification for
+* details.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return	Current used Baud Rate Prescaler value. The value's range is
+*		from 0 to 255.
+*
+* @note		None.
+*
+******************************************************************************/
+u8 XCanPs_GetBaudRatePrescaler(XCanPs *InstancePtr)
+{
+	u32 ReadValue;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	ReadValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_BRPR_OFFSET);
+	return ((u8)ReadValue);
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine sets Bit time. Time segment 1, Time segment 2 and
+* Synchronization Jump Width are set in this function. Device specification
+* requires the values passed into this function be one less than the actual
+* values of these fields. Read the device specification for details.
+*
+* Bit time can be set only if the CAN device is in Configuration Mode.
+* Call XCanPs_EnterMode() to enter Configuration Mode before using this
+* function.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	SyncJumpWidth is the Synchronization Jump Width value to set.
+*		Valid values are from 0 to 3.
+* @param	TimeSegment2 is the Time Segment 2 value to set. Valid values
+*		are from 0 to 7.
+* @param	TimeSegment1 is the Time Segment 1 value to set. Valid values
+*		are from 0 to 15.
+*
+* @return
+*		- XST_SUCCESS if the Bit time is set successfully.
+*		- XST_FAILURE if CAN device is not in Configuration Mode.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XCanPs_SetBitTiming(XCanPs *InstancePtr, u8 SyncJumpWidth,
+			  u8 TimeSegment2, u8 TimeSegment1)
+{
+	u32 Value;
+	s32 Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(SyncJumpWidth <= (u8)3U);
+	Xil_AssertNonvoid(TimeSegment2 <= (u8)7U);
+	Xil_AssertNonvoid(TimeSegment1 <= (u8)15U );
+
+	if (XCanPs_GetMode(InstancePtr) != (u8)XCANPS_MODE_CONFIG) {
+		Status = XST_FAILURE;
+	} else {
+
+		Value = ((u32) TimeSegment1) & XCANPS_BTR_TS1_MASK;
+		Value |= (((u32) TimeSegment2) << XCANPS_BTR_TS2_SHIFT) &
+			XCANPS_BTR_TS2_MASK;
+		Value |= (((u32) SyncJumpWidth) << XCANPS_BTR_SJW_SHIFT) &
+			XCANPS_BTR_SJW_MASK;
+
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_BTR_OFFSET, Value);
+
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine gets Bit time. Time segment 1, Time segment 2 and
+* Synchronization Jump Width values are read in this function. According to
+* device specification, the actual value of each of these fields is one
+* more than the value read. Read the device specification for details.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	SyncJumpWidth will store the Synchronization Jump Width value
+*		after this function returns. Its value ranges from 0 to 3.
+* @param	TimeSegment2 will store the Time Segment 2 value after this
+*		function returns. Its value ranges from 0 to 7.
+* @param	TimeSegment1 will store the Time Segment 1 value after this
+*		function returns. Its value ranges from 0 to 15.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCanPs_GetBitTiming(XCanPs *InstancePtr, u8 *SyncJumpWidth,
+			   u8 *TimeSegment2, u8 *TimeSegment1)
+{
+	u32 Value;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(SyncJumpWidth != NULL);
+	Xil_AssertVoid(TimeSegment2 != NULL);
+	Xil_AssertVoid(TimeSegment1 != NULL);
+
+	Value = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_BTR_OFFSET);
+
+	*TimeSegment1 = (u8) (Value & XCANPS_BTR_TS1_MASK);
+	*TimeSegment2 =
+		(u8) ((Value & XCANPS_BTR_TS2_MASK) >> XCANPS_BTR_TS2_SHIFT);
+	*SyncJumpWidth =
+		(u8) ((Value & XCANPS_BTR_SJW_MASK) >> XCANPS_BTR_SJW_SHIFT);
+}
+
+
+/****************************************************************************/
+/**
+*
+* This routine sets the Rx Full threshold in the Watermark Interrupt Register.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	Threshold is the threshold to be set. The valid values are
+*		from 1 to 63.
+*
+* @return
+*		- XST_FAILURE - If the CAN device is not in Configuration Mode.
+*		- XST_SUCCESS - If the Rx Full threshold is set in Watermark
+*		Interrupt Register.
+*
+* @note		The threshold can only be set when the CAN device is in the
+*		configuration mode.
+*
+*****************************************************************************/
+s32 XCanPs_SetRxIntrWatermark(XCanPs *InstancePtr, u8 Threshold)
+{
+
+	u32 ThrReg;
+	s32 Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Threshold <= (u8)63);
+
+	if (XCanPs_GetMode(InstancePtr) != (u8)XCANPS_MODE_CONFIG) {
+		Status = XST_FAILURE;
+	} else {
+
+		ThrReg = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_WIR_OFFSET);
+
+		ThrReg &= XCANPS_WIR_EW_MASK;
+		ThrReg |= ((u32)Threshold & XCANPS_WIR_FW_MASK);
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_WIR_OFFSET, ThrReg);
+
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This routine gets the Rx Full threshold from the Watermark Interrupt Register.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return	The Rx FIFO full watermark threshold value. The valid values
+*		are 1 to 63.
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 XCanPs_GetRxIntrWatermark(XCanPs *InstancePtr)
+{
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+
+	return (u8) (XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+					XCANPS_WIR_OFFSET) &
+					XCANPS_WIR_FW_MASK);
+}
+
+
+/****************************************************************************/
+/**
+*
+* This routine sets the Tx Empty Threshold in the Watermark Interrupt Register.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	Threshold is the threshold to be set. The valid values are
+*		from 1 to 63.
+*
+* @return
+*		- XST_FAILURE - If the CAN device is not in Configuration Mode.
+*		- XST_SUCCESS - If the threshold is set in Watermark
+*		Interrupt Register.
+*
+* @note		The threshold can only be set when the CAN device is in the
+*		configuration mode.
+*
+*****************************************************************************/
+s32 XCanPs_SetTxIntrWatermark(XCanPs *InstancePtr, u8 Threshold)
+{
+	u32 ThrReg;
+	s32 Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Threshold <= (u8)63);
+
+	if (XCanPs_GetMode(InstancePtr) != (u8)XCANPS_MODE_CONFIG) {
+		Status = XST_FAILURE;
+	} else {
+
+		ThrReg = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_WIR_OFFSET);
+
+		ThrReg &= XCANPS_WIR_FW_MASK;
+		ThrReg |= (((u32)Threshold << XCANPS_WIR_EW_SHIFT)
+				& XCANPS_WIR_EW_MASK);
+		XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_WIR_OFFSET, ThrReg);
+
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This routine gets the Tx Empty threshold from Watermark Interrupt Register.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return	The Tx Empty FIFO threshold value. The valid values are 1 to 63.
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 XCanPs_GetTxIntrWatermark(XCanPs *InstancePtr)
+{
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+
+	return (u8) ((XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_WIR_OFFSET) & XCANPS_WIR_EW_MASK) >>
+					XCANPS_WIR_EW_SHIFT);
+}
+
+
+
+/******************************************************************************/
+/*
+ * This routine is a stub for the asynchronous callbacks. The stub is here in
+ * case the upper layer forgot to set the handler(s). On initialization, all
+ * handlers are set to this callback. It is considered an error for this handler
+ * to be invoked.
+ *
+ ******************************************************************************/
+static void StubHandler(void)
+{
+	Xil_AssertVoidAlways();
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/canps_v3_2/src/xcanps.h b/src/Xilinx/libsrc/canps_v3_2/src/xcanps.h
new file mode 100644
index 0000000..9feb45e
--- /dev/null
+++ b/src/Xilinx/libsrc/canps_v3_2/src/xcanps.h
@@ -0,0 +1,577 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcanps.h
+* @addtogroup canps_v3_2
+* @{
+* @details
+*
+* The Xilinx CAN driver component.  This component supports the Xilinx
+* CAN Controller.
+*
+* The CAN Controller supports the following features:
+*	- Confirms to the ISO 11898-1, CAN 2.0A and CAN 2.0B standards.
+*	- Supports both Standard (11 bit Identifier) and Extended (29 bit
+*	  Identifier) frames.
+*	- Supports Bit Rates up to 1 Mbps.
+*	- Transmit message object FIFO with a user configurable depth of
+*	  up to 64 message objects.
+*	- Transmit prioritization through one TX High Priority Buffer.
+*	- Receive message object FIFO with a user configurable depth of
+*	  up to 64 message objects.
+*	- Watermark interrupts for Rx FIFO with configurable Watermark.
+*	- Acceptance filtering with 4 acceptance filters.
+*	- Sleep mode with automatic wake up.
+*	- Loop Back mode for diagnostic applications.
+*	- Snoop mode for diagnostic applications.
+*	- Maskable Error and Status Interrupts.
+*	- Readable Error Counters.
+*	- External PHY chip required.
+*	- Receive Timestamp.
+*
+* The device driver supports all the features listed above, if applicable.
+*
+* Driver Description
+*
+* The device driver enables higher layer software (e.g., an application) to
+* communicate to the CAN. The driver handles transmission and reception of
+* CAN frames, as well as configuration of the controller. The driver is simply a
+* pass-through mechanism between a protocol stack and the CAN. A single device
+* driver can support multiple CANs.
+*
+* Since the driver is a simple pass-through mechanism between a protocol stack
+* and the CAN, no assembly or disassembly of CAN frames is done at the
+* driver-level. This assumes that the protocol stack passes a correctly
+* formatted CAN frame to the driver for transmission, and that the driver
+* does not validate the contents of an incoming frame
+*
+* Operation Modes
+*
+* The CAN controller supports the following modes of operation:
+*   - Configuration Mode: In this mode the CAN timing parameters and
+*	 Baud Rate Pre-scalar parameters can be changed. In this mode the CAN
+*	 controller loses synchronization with the CAN bus and drives a
+*	 constant recessive bit on the bus line. The Error Counter Register are
+*	 reset. The CAN controller does not receive or transmit any messages
+*	 even if there are pending transmit requests from the TX FIFO or the TX
+*	 High Priority Buffer. The Storage FIFOs and the CAN configuration
+*	 registers are still accessible.
+*   - Normal Mode:In Normal Mode the CAN controller participates in bus
+*	 communication, by transmitting and receiving messages.
+*   - Sleep Mode: In Sleep Mode the CAN Controller does not transmit any
+*	 messages. However, if any other node transmits a message, then the CAN
+*	 Controller receives the transmitted message and exits from Sleep Mode.
+*	 If there are new transmission requests from either the TX FIFO or the
+*	 TX High Priority Buffer when the CAN Controller is in Sleep Mode, these
+*	 requests are not serviced, and the CAN Controller continues to remain
+*	 in Sleep Mode. Interrupts are generated when the CAN controller enters
+*	Sleep mode or Wakes up from Sleep mode.
+*   - Loop Back Mode: In Loop Back mode, the CAN controller transmits a
+*	 recessive bit stream on to the CAN Bus. Any message that is transmitted
+*	 is looped back to the �Rx� line and acknowledged. The CAN controller
+*	 thus receives any message that it transmits. It does not participate in
+*	 normal bus communication and does not receive any messages that are
+*	 transmitted by other CAN nodes. This mode is used for diagnostic
+*	 purposes.
+*   - Snoop Mode: In Snoop mode, the CAN controller transmits a
+*	 recessive bit stream on to the CAN Bus and does not participate
+*	 in normal bus communication but receives messages that are transmitted
+*	 by other CAN nodes. This mode is used for diagnostic purposes.
+*
+*
+* Buffer Alignment
+*
+* It is important to note that frame buffers passed to the driver must be
+* 32-bit aligned.
+*
+* Receive Address Filtering
+*
+* The device can be set to accept frames whose Identifiers match any of the
+* 4 filters set in the Acceptance Filter Mask/ID registers.
+*
+* The incoming Identifier is masked with the bits in the Acceptance Filter Mask
+* Register. This value is compared with the result of masking the bits in the
+* Acceptance Filter ID Register with the Acceptance Filter Mask Register. If
+* both these values are equal, the message will be stored in the RX FIFO.
+*
+* Acceptance Filtering is performed by each of the defined acceptance filters.
+* If the incoming identifier passes through any acceptance filter then the
+* frame is stored in the RX FIFO.
+*
+* If the Accpetance Filters are not set up then all the received messages are
+* stroed in the RX FIFO.
+*
+* PHY Communication
+*
+* This driver does not provide any mechanism for directly programming PHY.
+*
+* Interrupts
+*
+* The driver has no dependencies on the interrupt controller. The driver
+* provides an interrupt handler. User of this driver needs to provide
+* callback functions. An interrupt handler example is available with
+* the driver.
+*
+* Threads
+*
+* This driver is not thread safe.  Any needs for threads or thread mutual
+* exclusion must be satisfied by the layer above this driver.
+*
+* Device Reset
+*
+* Bus Off interrupt that can occur in the device requires a device reset.
+* The user is responsible for resetting the device and re-configuring it
+* based on its needs (the driver does not save the current configuration).
+* When integrating into an RTOS, these reset and re-configure obligations are
+* taken care of by the OS adapter software if it exists for that RTOS.
+*
+* Device Configuration
+*
+* The device can be configured in various ways during the FPGA implementation
+* process. Configuration parameters are stored in the xcanps_g.c files.
+* A table is defined where each entry contains configuration information
+* for a CAN device.  This information includes such things as the base address
+* of the memory-mapped device.
+*
+* Asserts
+*
+* Asserts are used within all Xilinx drivers to enforce constraints on argument
+* values. Asserts can be turned off on a system-wide basis by defining, at
+* compile time, the NDEBUG identifier. By default, asserts are turned on and it
+* is recommended that users leave asserts on during development.
+*
+* Building the driver
+*
+* The XCanPs driver is composed of several source files. This allows the user
+* to build and link only those parts of the driver that are necessary.
+* 


+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00a xd/sv  01/12/10 First release
+* 1.01a bss    12/27/11 Added the APIs XCanPs_SetTxIntrWatermark and
+* 			XCanPs_GetTxIntrWatermark.
+*			Updated the Register/bit definitions
+*                       Changed XCANPS_RXFWIR_RXFLL_MASK to XCANPS_WIR_FW_MASK
+*                       Changed XCANPS_RXWIR_OFFSET to XCANPS_WIR_OFFSET
+*			Added XCANPS_IXR_TXFEMP_MASK for Tx Fifo Empty
+*			Changed XCANPS_IXR_RXFLL_MASK to
+*			XCANPS_IXR_RXFWMFLL_MASK
+* 			Changed
+*			XCANPS_TXBUF_ID_OFFSET to XCANPS_TXHPB_ID_OFFSET
+* 			XCANPS_TXBUF_DLC_OFFSET to XCANPS_TXHPB_DLC_OFFSET
+*			XCANPS_TXBUF_DW1_OFFSET to XCANPS_TXHPB_DW1_OFFSET
+*			XCANPS_TXBUF_DW2_OFFSET to XCANPS_TXHPB_DW2_OFFSET
+* 2.1 adk 		23/08/14 Fixed CR:798792 Peripheral test for CANPS IP in
+*			SDK claims a 40kbps baud rate but it's not.
+* 3.0 adk     09/12/14  Added support for Zynq Ultrascale Mp.Also code
+*			modified for MISRA-C:2012 compliance.
+* 3.1 adk     10/11/15  Fixed CR#911958 Add support for Tx Watermark example.
+*			Data mismatch while sending data less than 8 bytes.
+* 3.1 nsk     12/21/15  Updated XCanPs_IntrHandler in xcanps_intr.c to handle
+*			error interrupts correctly. CR#925615
+*     ms      03/17/17  Added readme.txt file in examples folder for doxygen
+*                       generation.
+* 

+*
+******************************************************************************/
+#ifndef XCANPS_H			/* prevent circular inclusions */
+#define XCANPS_H			/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xcanps_hw.h"
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name CAN operation modes
+ *  @{
+ */
+#define XCANPS_MODE_CONFIG	0x00000001U /**< Configuration mode */
+#define XCANPS_MODE_NORMAL	0x00000002U /**< Normal mode */
+#define XCANPS_MODE_LOOPBACK	0x00000004U /**< Loop Back mode */
+#define XCANPS_MODE_SLEEP	0x00000008U /**< Sleep mode */
+#define XCANPS_MODE_SNOOP	0x00000010U /**< Snoop mode */
+/* @} */
+
+/** @name Callback identifiers used as parameters to XCanPs_SetHandler()
+ *  @{
+ */
+#define XCANPS_HANDLER_SEND 1U /**< Handler type for frame sending interrupt */
+#define XCANPS_HANDLER_RECV 2U /**< Handler type for frame reception interrupt*/
+#define XCANPS_HANDLER_ERROR  3U /**< Handler type for error interrupt */
+#define XCANPS_HANDLER_EVENT  4U /**< Handler type for all other interrupts */
+/* @} */
+
+/**************************** Type Definitions *******************************/
+
+/**
+ * This typedef contains configuration information for a device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID of device */
+	u32 BaseAddr;		/**< Register base address */
+} XCanPs_Config;
+
+/******************************************************************************/
+/**
+ * Callback type for frame sending and reception interrupts.
+ *
+ * @param 	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the callback functions, and passed back to the
+ *		upper layer when the callback is invoked.
+*******************************************************************************/
+typedef void (*XCanPs_SendRecvHandler) (void *CallBackRef);
+
+/******************************************************************************/
+/**
+ * Callback type for error interrupt.
+ *
+ * @param	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the callback functions, and passed back to the
+ *		upper layer when the callback is invoked.
+ * @param	ErrorMask is a bit mask indicating the cause of the error. Its
+ *		value equals 'OR'ing one or more XCANPS_ESR_* values defined in
+ *		xcanps_hw.h
+*******************************************************************************/
+typedef void (*XCanPs_ErrorHandler) (void *CallBackRef, u32 ErrorMask);
+
+/******************************************************************************/
+/**
+ * Callback type for all kinds of interrupts except sending frame interrupt,
+ * receiving frame interrupt, and error interrupt.
+ *
+ * @param	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the callback functions, and passed back to the
+ *		upper layer when the callback is invoked.
+ * @param	Mask is a bit mask indicating the pending interrupts. Its value
+ *		equals 'OR'ing one or more XCANPS_IXR_* defined in xcanps_hw.h
+*******************************************************************************/
+typedef void (*XCanPs_EventHandler) (void *CallBackRef, u32 Mask);
+
+/**
+ * The XCanPs driver instance data. The user is required to allocate a
+ * variable of this type for every CAN device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XCanPs_Config CanConfig; 	/**< Device configuration */
+	u32 IsReady;			/**< Device is initialized and ready */
+
+	/**
+	 * Callback and callback reference for TXOK interrupt.
+	 */
+	XCanPs_SendRecvHandler SendHandler;
+	void *SendRef;
+
+	/**
+	 * Callback and callback reference for RXOK/RXNEMP/RXFLL interrupts.
+	 */
+	XCanPs_SendRecvHandler RecvHandler;
+	void *RecvRef;
+
+	/**
+	 * Callback and callback reference for ERROR interrupt.
+	 */
+	XCanPs_ErrorHandler ErrorHandler;
+	void *ErrorRef;
+
+	/**
+	 * Callback  and callback reference for RXOFLW/RXUFLW/TXBFLL/TXFLL/
+	 * Wakeup/Sleep/Bus off/ARBLST interrupts.
+	 */
+	XCanPs_EventHandler EventHandler;
+	void *EventRef;
+
+} XCanPs;
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* This macro checks if the transmission is complete.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return
+*		- TRUE if the transmission is done.
+*		- FALSE if the transmission is not done.
+*
+* @note		C-Style signature:
+*		int XCanPs_IsTxDone(XCanPs *InstancePtr)
+*
+*******************************************************************************/
+#define XCanPs_IsTxDone(InstancePtr) \
+	(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr),		\
+		XCANPS_ISR_OFFSET) & XCANPS_IXR_TXOK_MASK) != (u32)0) ? TRUE : FALSE)
+
+
+/****************************************************************************/
+/**
+*
+* This macro checks if the transmission FIFO is full.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return
+*		- TRUE if TX FIFO is full.
+*		- FALSE if the TX FIFO is NOT full.
+*
+* @note		C-Style signature:
+*		int XCanPs_IsTxFifoFull(XCanPs *InstancePtr)
+*
+*****************************************************************************/
+#define XCanPs_IsTxFifoFull(InstancePtr) \
+	(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), 	\
+		XCANPS_SR_OFFSET) & XCANPS_SR_TXFLL_MASK) != (u32)0) ? TRUE : FALSE)
+
+
+/****************************************************************************/
+/**
+*
+* This macro checks if the Transmission High Priority Buffer is full.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return
+*		- TRUE if the TX High Priority Buffer is full.
+*		- FALSE if the TX High Priority Buffer is NOT full.
+*
+* @note		C-Style signature:
+*		int XCanPs_IsHighPriorityBufFull(XCanPs *InstancePtr)
+*
+*****************************************************************************/
+#define XCanPs_IsHighPriorityBufFull(InstancePtr) \
+	(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), 	\
+		XCANPS_SR_OFFSET) & XCANPS_SR_TXBFLL_MASK) != (u32)0) ? TRUE : FALSE)
+
+
+/****************************************************************************/
+/**
+*
+* This macro checks if the receive FIFO is empty.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return
+*		- TRUE if RX FIFO is empty.
+*		- FALSE if the RX FIFO is NOT empty.
+*
+* @note		C-Style signature:
+*		int XCanPs_IsRxEmpty(XCanPs *InstancePtr)
+*
+*****************************************************************************/
+#define XCanPs_IsRxEmpty(InstancePtr) \
+	(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), 	\
+		XCANPS_ISR_OFFSET) & XCANPS_IXR_RXNEMP_MASK) != (u32)0) ? FALSE : TRUE)
+
+
+/****************************************************************************/
+/**
+*
+* This macro checks if the CAN device is ready for the driver to change
+* Acceptance Filter Identifier Registers (AFIR) and Acceptance Filter Mask
+* Registers (AFMR).
+*
+* AFIR and AFMR for a filter are changeable only after the filter is disabled
+* and this routine returns FALSE. The filter can be disabled using the
+* XCanPs_AcceptFilterDisable function.
+*
+* Use the XCanPs_Accept_* functions for configuring the acceptance filters.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return
+*		- TRUE if the device is busy and NOT ready to accept writes to
+*		AFIR and AFMR.
+*		- FALSE if the device is ready to accept writes to AFIR and
+*		AFMR.
+*
+* @note		C-Style signature:
+*		int XCanPs_IsAcceptFilterBusy(XCanPs *InstancePtr)
+*
+*****************************************************************************/
+#define XCanPs_IsAcceptFilterBusy(InstancePtr) 		\
+	(((XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr), 	\
+		XCANPS_SR_OFFSET) & XCANPS_SR_ACFBSY_MASK) != (u32)0) ? TRUE : FALSE)
+
+
+/****************************************************************************/
+/**
+*
+* This macro calculates CAN message identifier value given identifier field
+* values.
+*
+* @param	StandardId contains Standard Message ID value.
+* @param	SubRemoteTransReq contains Substitute Remote Transmission
+*		Request value.
+* @param	IdExtension contains Identifier Extension value.
+* @param	ExtendedId contains Extended Message ID value.
+* @param	RemoteTransReq contains Remote Transmission Request value.
+*
+* @return	Message Identifier value.
+*
+* @note		C-Style signature:
+*		u32 XCanPs_CreateIdValue(u32 StandardId,
+*					u32 SubRemoteTransReq,
+*					u32 IdExtension, u32 ExtendedId,
+*					u32 RemoteTransReq)
+*
+*		Read the CAN specification for meaning of each parameter.
+*
+*****************************************************************************/
+#define XCanPs_CreateIdValue(StandardId, SubRemoteTransReq, IdExtension, \
+		ExtendedId, RemoteTransReq) 				\
+ ((((StandardId) << XCANPS_IDR_ID1_SHIFT) & XCANPS_IDR_ID1_MASK) |	\
+ (((SubRemoteTransReq) << XCANPS_IDR_SRR_SHIFT) & XCANPS_IDR_SRR_MASK)|\
+ (((IdExtension) << XCANPS_IDR_IDE_SHIFT) & XCANPS_IDR_IDE_MASK) |	\
+ (((ExtendedId) << XCANPS_IDR_ID2_SHIFT) & XCANPS_IDR_ID2_MASK) |	\
+ ((RemoteTransReq) & XCANPS_IDR_RTR_MASK))
+
+
+/****************************************************************************/
+/**
+*
+* This macro calculates value for Data Length Code register given Data
+* Length Code value.
+*
+* @param	DataLengCode indicates Data Length Code value.
+*
+* @return	Value that can be assigned to Data Length Code register.
+*
+* @note		C-Style signature:
+*		u32 XCanPs_CreateDlcValue(u32 DataLengCode)
+*
+*		Read the CAN specification for meaning of Data Length Code.
+*
+*****************************************************************************/
+#define XCanPs_CreateDlcValue(DataLengCode) \
+	(((DataLengCode) << XCANPS_DLCR_DLC_SHIFT) & XCANPS_DLCR_DLC_MASK)
+
+
+/****************************************************************************/
+/**
+*
+* This macro clears the timestamp in the Timestamp Control Register.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XCanPs_ClearTimestamp(XCanPs *InstancePtr)
+*
+*****************************************************************************/
+#define XCanPs_ClearTimestamp(InstancePtr) 			\
+	XCanPs_WriteReg((InstancePtr)->CanConfig.BaseAddr, 		\
+				XCANPS_TCR_OFFSET, XCANPS_TCR_CTS_MASK)
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Functions in xcanps.c
+ */
+s32 XCanPs_CfgInitialize(XCanPs *InstancePtr, XCanPs_Config *ConfigPtr,
+				u32 EffectiveAddr);
+
+void XCanPs_Reset(XCanPs *InstancePtr);
+u8 XCanPs_GetMode(XCanPs *InstancePtr);
+void XCanPs_EnterMode(XCanPs *InstancePtr, u8 OperationMode);
+u32 XCanPs_GetStatus(XCanPs *InstancePtr);
+void XCanPs_GetBusErrorCounter(XCanPs *InstancePtr, u8 *RxErrorCount,
+				 u8 *TxErrorCount);
+u32 XCanPs_GetBusErrorStatus(XCanPs *InstancePtr);
+void XCanPs_ClearBusErrorStatus(XCanPs *InstancePtr, u32 Mask);
+s32 XCanPs_Send(XCanPs *InstancePtr, u32 *FramePtr);
+s32 XCanPs_Recv(XCanPs *InstancePtr, u32 *FramePtr);
+s32 XCanPs_SendHighPriority(XCanPs *InstancePtr, u32 *FramePtr);
+void XCanPs_AcceptFilterEnable(XCanPs *InstancePtr, u32 FilterIndexes);
+void XCanPs_AcceptFilterDisable(XCanPs *InstancePtr, u32 FilterIndexes);
+u32 XCanPs_AcceptFilterGetEnabled(XCanPs *InstancePtr);
+s32 XCanPs_AcceptFilterSet(XCanPs *InstancePtr, u32 FilterIndex,
+			 u32 MaskValue, u32 IdValue);
+void XCanPs_AcceptFilterGet(XCanPs *InstancePtr, u32 FilterIndex,
+			  u32 *MaskValue, u32 *IdValue);
+
+s32 XCanPs_SetBaudRatePrescaler(XCanPs *InstancePtr, u8 Prescaler);
+u8 XCanPs_GetBaudRatePrescaler(XCanPs *InstancePtr);
+s32 XCanPs_SetBitTiming(XCanPs *InstancePtr, u8 SyncJumpWidth,
+			  u8 TimeSegment2, u8 TimeSegment1);
+void XCanPs_GetBitTiming(XCanPs *InstancePtr, u8 *SyncJumpWidth,
+			   u8 *TimeSegment2, u8 *TimeSegment1);
+
+s32 XCanPs_SetRxIntrWatermark(XCanPs *InstancePtr, u8 Threshold);
+u8 XCanPs_GetRxIntrWatermark(XCanPs *InstancePtr);
+s32 XCanPs_SetTxIntrWatermark(XCanPs *InstancePtr, u8 Threshold);
+u8 XCanPs_GetTxIntrWatermark(XCanPs *InstancePtr);
+
+/*
+ * Diagnostic functions in xcanps_selftest.c
+ */
+s32 XCanPs_SelfTest(XCanPs *InstancePtr);
+
+/*
+ * Functions in xcanps_intr.c
+ */
+void XCanPs_IntrEnable(XCanPs *InstancePtr, u32 Mask);
+void XCanPs_IntrDisable(XCanPs *InstancePtr, u32 Mask);
+u32 XCanPs_IntrGetEnabled(XCanPs *InstancePtr);
+u32 XCanPs_IntrGetStatus(XCanPs *InstancePtr);
+void XCanPs_IntrClear(XCanPs *InstancePtr, u32 Mask);
+void XCanPs_IntrHandler(void *InstancePtr);
+s32 XCanPs_SetHandler(XCanPs *InstancePtr, u32 HandlerType,
+			void *CallBackFunc, void *CallBackRef);
+
+/*
+ * Functions in xcanps_sinit.c
+ */
+XCanPs_Config *XCanPs_LookupConfig(u16 DeviceId);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/canps_v3_2/src/xcanps_g.c b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_g.c
new file mode 100644
index 0000000..fc44f70
--- /dev/null
+++ b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_g.c
@@ -0,0 +1,55 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xcanps.h"
+
+/*
+* The configuration table for devices
+*/
+
+XCanPs_Config XCanPs_ConfigTable[XPAR_XCANPS_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_CAN_1_DEVICE_ID,
+		XPAR_PSU_CAN_1_BASEADDR
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/canps_v3_2/src/xcanps_hw.c b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_hw.c
new file mode 100644
index 0000000..7ca2f81
--- /dev/null
+++ b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_hw.c
@@ -0,0 +1,93 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcanps_hw.c
+* @addtogroup canps_v3_2
+* @{
+*
+* This file contains the implementation of the canps interface reset sequence
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.02a adk  08/08/13 First release
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xcanps_hw.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+*
+* This function resets the CAN device. Calling this function resets the device
+* immediately, and any pending transmission or reception is terminated at once.
+* Both Object Layer and Transfer Layer are reset. This function does not reset
+* the Physical Layer. All registers are reset to the default values, and no
+* previous status will be restored. TX FIFO, RX FIFO and TX High Priority
+* Buffer are also reset.
+*
+* The CAN device will be in Configuration Mode immediately after this function
+* returns.
+*
+* @param	BaseAddr is the baseaddress of the interface.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCanPs_ResetHw(u32 BaseAddr)
+{
+	XCanPs_WriteReg(BaseAddr, XCANPS_SRR_OFFSET, \
+			   XCANPS_SRR_SRST_MASK);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/canps_v3_2/src/xcanps_hw.h b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_hw.h
new file mode 100644
index 0000000..30ec68a
--- /dev/null
+++ b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_hw.h
@@ -0,0 +1,369 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcanps_hw.h
+* @addtogroup canps_v3_2
+* @{
+*
+* This header file contains the identifiers and basic driver functions (or
+* macros) that can be used to access the device. Other driver functions
+* are defined in xcanps.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00a xd/sv  01/12/10 First release
+* 1.01a sbs    12/27/11 Updated the Register/bit definitions
+*                       Changed XCANPS_RXFWIR_RXFLL_MASK to XCANPS_WIR_FW_MASK
+*                       Changed XCANPS_RXWIR_OFFSET to XCANPS_WIR_OFFSET
+*			Added XCANPS_IXR_TXFEMP_MASK for Tx Fifo Empty
+*			Changed XCANPS_IXR_RXFLL_MASK to
+*			XCANPS_IXR_RXFWMFLL_MASK
+* 			Changed
+*			XCANPS_TXBUF_ID_OFFSET to XCANPS_TXHPB_ID_OFFSET
+* 			XCANPS_TXBUF_DLC_OFFSET to XCANPS_TXHPB_DLC_OFFSET
+*			XCANPS_TXBUF_DW1_OFFSET  to XCANPS_TXHPB_DW1_OFFSET
+*			XCANPS_TXBUF_DW2_OFFSET  to XCANPS_TXHPB_DW2_OFFSET
+* 1.02a adk   08/08/13  Updated for inclding the function prototype
+* 3.00  kvn   02/13/15  Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+#ifndef XCANPS_HW_H		/* prevent circular inclusions */
+#define XCANPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register offsets for the CAN. Each register is 32 bits.
+ *  @{
+ */
+#define XCANPS_SRR_OFFSET	  	0x00000000U /**< Software Reset Register */
+#define XCANPS_MSR_OFFSET	  	0x00000004U /**< Mode Select Register */
+#define XCANPS_BRPR_OFFSET	  	0x00000008U /**< Baud Rate Prescaler */
+#define XCANPS_BTR_OFFSET	  	0x0000000CU /**< Bit Timing Register */
+#define XCANPS_ECR_OFFSET	  	0x00000010U /**< Error Counter Register */
+#define XCANPS_ESR_OFFSET	  	0x00000014U /**< Error Status Register */
+#define XCANPS_SR_OFFSET	  	0x00000018U /**< Status Register */
+
+#define XCANPS_ISR_OFFSET	  	0x0000001CU /**< Interrupt Status Register */
+#define XCANPS_IER_OFFSET	  	0x00000020U /**< Interrupt Enable Register */
+#define XCANPS_ICR_OFFSET	  	0x00000024U /**< Interrupt Clear Register */
+#define XCANPS_TCR_OFFSET	  	0x00000028U /**< Timestamp Control Register */
+#define XCANPS_WIR_OFFSET	  	0x0000002CU /**< Watermark Interrupt Reg */
+
+#define XCANPS_TXFIFO_ID_OFFSET  	0x00000030U /**< TX FIFO ID */
+#define XCANPS_TXFIFO_DLC_OFFSET 	0x00000034U /**< TX FIFO DLC */
+#define XCANPS_TXFIFO_DW1_OFFSET	0x00000038U /**< TX FIFO Data Word 1 */
+#define XCANPS_TXFIFO_DW2_OFFSET 	0x0000003CU /**< TX FIFO Data Word 2 */
+
+#define XCANPS_TXHPB_ID_OFFSET   	0x00000040U /**< TX High Priority Buffer ID */
+#define XCANPS_TXHPB_DLC_OFFSET  	0x00000044U /**< TX High Priority Buffer DLC */
+#define XCANPS_TXHPB_DW1_OFFSET  	0x00000048U /**< TX High Priority Buf Data 1 */
+#define XCANPS_TXHPB_DW2_OFFSET  	0x0000004CU /**< TX High Priority Buf Data Word 2 */
+
+#define XCANPS_RXFIFO_ID_OFFSET  	0x00000050U /**< RX FIFO ID */
+#define XCANPS_RXFIFO_DLC_OFFSET 	0x00000054U /**< RX FIFO DLC */
+#define XCANPS_RXFIFO_DW1_OFFSET 	0x00000058U /**< RX FIFO Data Word 1 */
+#define XCANPS_RXFIFO_DW2_OFFSET 	0x0000005CU /**< RX FIFO Data Word 2 */
+
+#define XCANPS_AFR_OFFSET	  	0x00000060U /**< Acceptance Filter Register */
+#define XCANPS_AFMR1_OFFSET	  	0x00000064U /**< Acceptance Filter Mask 1 */
+#define XCANPS_AFIR1_OFFSET	  	0x00000068U /**< Acceptance Filter ID  1 */
+#define XCANPS_AFMR2_OFFSET	  	0x0000006CU /**< Acceptance Filter Mask  2 */
+#define XCANPS_AFIR2_OFFSET	  	0x00000070U /**< Acceptance Filter ID 2 */
+#define XCANPS_AFMR3_OFFSET	  	0x00000074U /**< Acceptance Filter Mask 3 */
+#define XCANPS_AFIR3_OFFSET	  	0x00000078U /**< Acceptance Filter ID 3 */
+#define XCANPS_AFMR4_OFFSET	  	0x0000007CU /**< Acceptance Filter Mask  4 */
+#define XCANPS_AFIR4_OFFSET	  	0x00000080U /**< Acceptance Filter ID 4 */
+/* @} */
+
+/** @name Software Reset Register (SRR) Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_SRR_CEN_MASK		0x00000002U  /**< Can Enable */
+#define XCANPS_SRR_SRST_MASK	0x00000001U  /**< Reset */
+/* @} */
+
+/** @name Mode Select Register (MSR) Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_MSR_SNOOP_MASK	0x00000004U /**< Snoop Mode Select */
+#define XCANPS_MSR_LBACK_MASK	0x00000002U /**< Loop Back Mode Select */
+#define XCANPS_MSR_SLEEP_MASK	0x00000001U /**< Sleep Mode Select */
+/* @} */
+
+/** @name Baud Rate Prescaler register (BRPR) Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_BRPR_BRP_MASK	0x000000FFU /**< Baud Rate Prescaler */
+/* @} */
+
+/** @name Bit Timing Register (BTR) Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_BTR_SJW_MASK	0x00000180U /**< Synchronization Jump Width */
+#define XCANPS_BTR_SJW_SHIFT	7U
+#define XCANPS_BTR_TS2_MASK	0x00000070U /**< Time Segment 2 */
+#define XCANPS_BTR_TS2_SHIFT	4U
+#define XCANPS_BTR_TS1_MASK	0x0000000FU /**< Time Segment 1 */
+/* @} */
+
+/** @name Error Counter Register (ECR) Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_ECR_REC_MASK	0x0000FF00U /**< Receive Error Counter */
+#define XCANPS_ECR_REC_SHIFT		 8U
+#define XCANPS_ECR_TEC_MASK	0x000000FFU /**< Transmit Error Counter */
+/* @} */
+
+/** @name Error Status Register (ESR) Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_ESR_ACKER_MASK	0x00000010U /**< ACK Error */
+#define XCANPS_ESR_BERR_MASK	0x00000008U /**< Bit Error */
+#define XCANPS_ESR_STER_MASK	0x00000004U /**< Stuff Error */
+#define XCANPS_ESR_FMER_MASK	0x00000002U /**< Form Error */
+#define XCANPS_ESR_CRCER_MASK	0x00000001U /**< CRC Error */
+/* @} */
+
+/** @name Status Register (SR) Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_SR_SNOOP_MASK	0x00001000U /**< Snoop Mask */
+#define XCANPS_SR_ACFBSY_MASK	0x00000800U /**< Acceptance Filter busy */
+#define XCANPS_SR_TXFLL_MASK	0x00000400U /**< TX FIFO is full */
+#define XCANPS_SR_TXBFLL_MASK	0x00000200U /**< TX High Priority Buffer full */
+#define XCANPS_SR_ESTAT_MASK	0x00000180U /**< Error Status */
+#define XCANPS_SR_ESTAT_SHIFT			 7U
+#define XCANPS_SR_ERRWRN_MASK	0x00000040U /**< Error Warning */
+#define XCANPS_SR_BBSY_MASK		0x00000020U /**< Bus Busy */
+#define XCANPS_SR_BIDLE_MASK	0x00000010U /**< Bus Idle */
+#define XCANPS_SR_NORMAL_MASK	0x00000008U /**< Normal Mode */
+#define XCANPS_SR_SLEEP_MASK	0x00000004U /**< Sleep Mode */
+#define XCANPS_SR_LBACK_MASK	0x00000002U /**< Loop Back Mode */
+#define XCANPS_SR_CONFIG_MASK	0x00000001U /**< Configuration Mode */
+/* @} */
+
+/** @name Interrupt Status/Enable/Clear Register Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_IXR_TXFEMP_MASK   0x00004000U /**< Tx Fifo Empty Interrupt */
+#define XCANPS_IXR_TXFWMEMP_MASK 0x00002000U /**< Tx Fifo Watermark Empty */
+#define XCANPS_IXR_RXFWMFLL_MASK 0x00001000U /**< Rx FIFO Watermark Full */
+#define XCANPS_IXR_WKUP_MASK	 0x00000800U /**< Wake up Interrupt */
+#define XCANPS_IXR_SLP_MASK		0x00000400U /**< Sleep Interrupt */
+#define XCANPS_IXR_BSOFF_MASK	0x00000200U /**< Bus Off Interrupt */
+#define XCANPS_IXR_ERROR_MASK	0x00000100U /**< Error Interrupt */
+#define XCANPS_IXR_RXNEMP_MASK	0x00000080U /**< RX FIFO Not Empty Interrupt */
+#define XCANPS_IXR_RXOFLW_MASK	0x00000040U /**< RX FIFO Overflow Interrupt */
+#define XCANPS_IXR_RXUFLW_MASK	0x00000020U /**< RX FIFO Underflow Interrupt */
+#define XCANPS_IXR_RXOK_MASK	0x00000010U /**< New Message Received Intr */
+#define XCANPS_IXR_TXBFLL_MASK	0x00000008U /**< TX High Priority Buf Full */
+#define XCANPS_IXR_TXFLL_MASK	0x00000004U /**< TX FIFO Full Interrupt */
+#define XCANPS_IXR_TXOK_MASK	0x00000002U /**< TX Successful Interrupt */
+#define XCANPS_IXR_ARBLST_MASK	0x00000001U /**< Arbitration Lost Interrupt */
+#define XCANPS_IXR_ALL		((u32)XCANPS_IXR_RXFWMFLL_MASK | \
+				(u32)XCANPS_IXR_WKUP_MASK   | \
+				(u32)XCANPS_IXR_SLP_MASK	| \
+				(u32)XCANPS_IXR_BSOFF_MASK  | \
+				(u32)XCANPS_IXR_ERROR_MASK  | \
+				(u32)XCANPS_IXR_RXNEMP_MASK | \
+				(u32)XCANPS_IXR_RXOFLW_MASK | \
+				(u32)XCANPS_IXR_RXUFLW_MASK | \
+				(u32)XCANPS_IXR_RXOK_MASK   | \
+				(u32)XCANPS_IXR_TXBFLL_MASK | \
+				(u32)XCANPS_IXR_TXFLL_MASK  | \
+				(u32)XCANPS_IXR_TXOK_MASK   | \
+				(u32)XCANPS_IXR_ARBLST_MASK)
+/* @} */
+
+/** @name CAN Timestamp Control Register (TCR) Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_TCR_CTS_MASK	0x00000001U /**< Clear Timestamp counter mask */
+/* @} */
+
+/** @name CAN Watermark Register (WIR) Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_WIR_FW_MASK   	0x0000003FU /**< Rx Full Threshold mask */
+#define XCANPS_WIR_EW_MASK 	0x00003F00U /**< Tx Empty Threshold mask */
+#define XCANPS_WIR_EW_SHIFT 	0x00000008U /**< Tx Empty Threshold shift */
+
+/* @} */
+
+/** @name CAN Frame Identifier (TX High Priority Buffer/TX/RX/Acceptance Filter
+				Mask/Acceptance Filter ID)
+ *  @{
+ */
+#define XCANPS_IDR_ID1_MASK	0xFFE00000U /**< Standard Messg Identifier */
+#define XCANPS_IDR_ID1_SHIFT	21U
+#define XCANPS_IDR_SRR_MASK	0x00100000U /**< Substitute Remote TX Req */
+#define XCANPS_IDR_SRR_SHIFT	20U
+#define XCANPS_IDR_IDE_MASK	0x00080000U /**< Identifier Extension */
+#define XCANPS_IDR_IDE_SHIFT	19U
+#define XCANPS_IDR_ID2_MASK	0x0007FFFEU /**< Extended Message Ident */
+#define XCANPS_IDR_ID2_SHIFT	1U
+#define XCANPS_IDR_RTR_MASK	0x00000001U /**< Remote TX Request */
+/* @} */
+
+/** @name CAN Frame Data Length Code (TX High Priority Buffer/TX/RX)
+ *  @{
+ */
+#define XCANPS_DLCR_DLC_MASK	 0xF0000000U	/**< Data Length Code */
+#define XCANPS_DLCR_DLC_SHIFT	 28U
+#define XCANPS_DLCR_TIMESTAMP_MASK 0x0000FFFFU	/**< Timestamp Mask (Rx only) */
+
+/* @} */
+
+/** @name CAN Frame Data Word 1 (TX High Priority Buffer/TX/RX)
+ *  @{
+ */
+#define XCANPS_DW1R_DB0_MASK	0xFF000000U /**< Data Byte 0 */
+#define XCANPS_DW1R_DB0_SHIFT	24U
+#define XCANPS_DW1R_DB1_MASK	0x00FF0000U /**< Data Byte 1 */
+#define XCANPS_DW1R_DB1_SHIFT	16U
+#define XCANPS_DW1R_DB2_MASK	0x0000FF00U /**< Data Byte 2 */
+#define XCANPS_DW1R_DB2_SHIFT	8U
+#define XCANPS_DW1R_DB3_MASK	0x000000FFU /**< Data Byte 3 */
+/* @} */
+
+/** @name CAN Frame Data Word 2 (TX High Priority Buffer/TX/RX)
+ *  @{
+ */
+#define XCANPS_DW2R_DB4_MASK	0xFF000000U /**< Data Byte 4 */
+#define XCANPS_DW2R_DB4_SHIFT	24U
+#define XCANPS_DW2R_DB5_MASK	0x00FF0000U /**< Data Byte 5 */
+#define XCANPS_DW2R_DB5_SHIFT	16U
+#define XCANPS_DW2R_DB6_MASK	0x0000FF00U /**< Data Byte 6 */
+#define XCANPS_DW2R_DB6_SHIFT	8U
+#define XCANPS_DW2R_DB7_MASK	0x000000FFU /**< Data Byte 7 */
+/* @} */
+
+/** @name Acceptance Filter Register (AFR) Bit Definitions and Masks
+ *  @{
+ */
+#define XCANPS_AFR_UAF4_MASK	0x00000008U /**< Use Acceptance Filter No.4 */
+#define XCANPS_AFR_UAF3_MASK	0x00000004U /**< Use Acceptance Filter No.3 */
+#define XCANPS_AFR_UAF2_MASK	0x00000002U /**< Use Acceptance Filter No.2 */
+#define XCANPS_AFR_UAF1_MASK	0x00000001U /**< Use Acceptance Filter No.1 */
+#define XCANPS_AFR_UAF_ALL_MASK	((u32)XCANPS_AFR_UAF4_MASK | \
+					(u32)XCANPS_AFR_UAF3_MASK | \
+					(u32)XCANPS_AFR_UAF2_MASK | \
+					(u32)XCANPS_AFR_UAF1_MASK)
+/* @} */
+
+/** @name CAN frame length constants
+ *  @{
+ */
+#define XCANPS_MAX_FRAME_SIZE sizeof(u32)*16U /**< Maximum CAN frame length in bytes */
+/* @} */
+
+/* For backwards compatibilty */
+#define XCANPS_TXBUF_ID_OFFSET   XCANPS_TXHPB_ID_OFFSET
+#define XCANPS_TXBUF_DLC_OFFSET  XCANPS_TXHPB_DLC_OFFSET
+#define XCANPS_TXBUF_DW1_OFFSET  XCANPS_TXHPB_DW1_OFFSET
+#define XCANPS_TXBUF_DW2_OFFSET  XCANPS_TXHPB_DW2_OFFSET
+
+#define XCANPS_RXFWIR_RXFLL_MASK XCANPS_WIR_FW_MASK
+#define XCANPS_RXWIR_OFFSET 	 XCANPS_WIR_OFFSET
+#define XCANPS_IXR_RXFLL_MASK 	 XCANPS_IXR_RXFWMFLL_MASK
+
+
+
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* This macro reads the given register.
+*
+* @param	BaseAddr is the base address of the device.
+* @param	RegOffset is the register offset to be read.
+*
+* @return	The 32-bit value of the register
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XCanPs_ReadReg(BaseAddr, RegOffset) \
+		Xil_In32((BaseAddr) + (u32)(RegOffset))
+
+
+/****************************************************************************/
+/**
+*
+* This macro writes the given register.
+*
+* @param	BaseAddr is the base address of the device.
+* @param	RegOffset is the register offset to be written.
+* @param	Data is the 32-bit value to write to the register.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XCanPs_WriteReg(BaseAddr, RegOffset, Data) \
+		Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data))
+
+/************************** Function Prototypes ******************************/
+/*
+ * Perform reset operation to the CanPs interface
+ */
+void XCanPs_ResetHw(u32 BaseAddr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/canps_v3_2/src/xcanps_intr.c b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_intr.c
new file mode 100644
index 0000000..715b35e
--- /dev/null
+++ b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_intr.c
@@ -0,0 +1,421 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcanps_intr.c
+* @addtogroup canps_v3_2
+* @{
+*
+* This file contains functions related to CAN interrupt handling.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00a xd/sv  01/12/10 First release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1   nsk    12/21/15 Updated XCanPs_IntrHandler to handle error
+*			interrupts correctly. CR#925615
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xcanps.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+/****************************************************************************/
+/**
+*
+* This routine enables interrupt(s). Use the XCANPS_IXR_* constants defined in
+* xcanps_hw.h to create the bit-mask to enable interrupts.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	Mask is the mask to enable. Bit positions of 1 will be enabled.
+*		Bit positions of 0 will keep the previous setting. This mask is
+*		formed by OR'ing XCANPS_IXR_* bits defined in xcanps_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XCanPs_IntrEnable(XCanPs *InstancePtr, u32 Mask)
+{
+	u32 IntrValue;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Write to the IER to enable the specified interrupts.
+	 */
+	IntrValue = XCanPs_IntrGetEnabled(InstancePtr);
+	IntrValue |= Mask;
+	XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+			XCANPS_IER_OFFSET, IntrValue);
+}
+
+/****************************************************************************/
+/**
+*
+* This routine disables interrupt(s). Use the XCANPS_IXR_* constants defined in
+* xcanps_hw.h to create the bit-mask to disable interrupt(s).
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	Mask is the mask to disable. Bit positions of 1 will be
+*		disabled. Bit positions of 0 will keep the previous setting.
+*		This mask is formed by OR'ing XCANPS_IXR_* bits defined in
+*		xcanps_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XCanPs_IntrDisable(XCanPs *InstancePtr, u32 Mask)
+{
+	u32 IntrValue;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Write to the IER to disable the specified interrupts.
+	 */
+	IntrValue = XCanPs_IntrGetEnabled(InstancePtr);
+	IntrValue &= ~Mask;
+	XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr,
+			XCANPS_IER_OFFSET, IntrValue);
+}
+
+/****************************************************************************/
+/**
+*
+* This routine returns enabled interrupt(s). Use the XCANPS_IXR_* constants
+* defined in xcanps_hw.h to interpret the returned value.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return	Enabled interrupt(s) in a 32-bit format.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XCanPs_IntrGetEnabled(XCanPs *InstancePtr)
+{
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	return XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_IER_OFFSET);
+}
+
+
+/****************************************************************************/
+/**
+*
+* This routine returns interrupt status read from Interrupt Status Register.
+* Use the XCANPS_IXR_* constants defined in xcanps_hw.h to interpret the
+* returned value.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return	The value stored in Interrupt Status Register.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XCanPs_IntrGetStatus(XCanPs *InstancePtr)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	return XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
+				XCANPS_ISR_OFFSET);
+}
+
+/****************************************************************************/
+/**
+*
+* This function clears interrupt(s). Every bit set in Interrupt Status
+* Register indicates that a specific type of interrupt is occurring, and this
+* function clears one or more interrupts by writing a bit mask to Interrupt
+* Clear Register.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	Mask is the mask to clear. Bit positions of 1 will be cleared.
+*		Bit positions of 0 will not change the previous interrupt
+*		status. This mask is formed by OR'ing XCANPS_IXR_* bits defined
+* 		in xcanps_hw.h.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XCanPs_IntrClear(XCanPs *InstancePtr, u32 Mask)
+{
+	u32 IntrValue;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Clear the currently pending interrupts.
+	 */
+	IntrValue = XCanPs_IntrGetStatus(InstancePtr);
+	IntrValue &= Mask;
+	XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_ICR_OFFSET,
+				IntrValue);
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine is the interrupt handler for the CAN driver.
+*
+* This handler reads the interrupt status from the ISR, determines the source of
+* the interrupts, calls according callbacks, and finally clears the interrupts.
+*
+* Application beyond this driver is responsible for providing callbacks to
+* handle interrupts and installing the callbacks using XCanPs_SetHandler()
+* during initialization phase. An example delivered with this driver
+* demonstrates how this could be done.
+*
+* @param	InstancePtr is a pointer to the XCanPs instance that just
+*		interrupted.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCanPs_IntrHandler(void *InstancePtr)
+{
+	u32 PendingIntr;
+	u32 EventIntr;
+	u32 ErrorStatus;
+	XCanPs *CanPtr = (XCanPs *) ((void *)InstancePtr);
+
+	Xil_AssertVoid(CanPtr != NULL);
+	Xil_AssertVoid(CanPtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	PendingIntr = XCanPs_IntrGetStatus(CanPtr);
+	PendingIntr &= XCanPs_IntrGetEnabled(CanPtr);
+
+	/*
+	 * Clear all pending interrupts.
+	 * Rising Edge interrupt
+	 */
+	XCanPs_IntrClear(CanPtr, PendingIntr);
+
+	/*
+	 * An error interrupt is occurring.
+	 */
+	if (((PendingIntr & XCANPS_IXR_ERROR_MASK) != (u32)0) &&
+		(CanPtr->ErrorHandler != NULL)) {
+			ErrorStatus = XCanPs_GetBusErrorStatus(CanPtr);
+			CanPtr->ErrorHandler(CanPtr->ErrorRef,ErrorStatus);
+		/*
+		 * Clear Error Status Register.
+		 */
+		XCanPs_ClearBusErrorStatus(CanPtr,ErrorStatus);
+	}
+
+	/*
+	 * Check if any following event interrupt is pending:
+	 *	  - RX FIFO Overflow
+	 *	  - RX FIFO Underflow
+	 *	  - TX High Priority Buffer full
+	 *	  - TX FIFO Full
+	 *	  - Wake up from sleep mode
+	 *	  - Enter sleep mode
+	 *	  - Enter Bus off status
+	 *	  - Arbitration is lost
+	 *
+	 * If so, call event callback provided by upper level.
+	 */
+	EventIntr = PendingIntr & ((u32)XCANPS_IXR_RXOFLW_MASK |
+				(u32)XCANPS_IXR_RXUFLW_MASK |
+				(u32)XCANPS_IXR_TXBFLL_MASK |
+				(u32)XCANPS_IXR_TXFLL_MASK |
+				(u32)XCANPS_IXR_WKUP_MASK |
+				(u32)XCANPS_IXR_SLP_MASK |
+				(u32)XCANPS_IXR_BSOFF_MASK |
+				(u32)XCANPS_IXR_ARBLST_MASK);
+	if ((EventIntr != (u32)0) && (CanPtr->EventHandler != NULL)) {
+		CanPtr->EventHandler(CanPtr->EventRef, EventIntr);
+
+		if ((EventIntr & XCANPS_IXR_BSOFF_MASK) != (u32)0) {
+			/*
+			 * Event callback should reset whole device if "Enter
+			 * Bus Off Status" interrupt occurred. All pending
+			 * interrupts are cleared and no further checking and
+			 * handling of other interrupts is needed any more.
+			 */
+			return;
+		} else {
+			/*This else was made for misra-c compliance*/
+			;
+		}
+	}
+
+
+	if (((PendingIntr & (XCANPS_IXR_RXFWMFLL_MASK |
+			XCANPS_IXR_RXNEMP_MASK)) != (u32)0) &&
+		(CanPtr->RecvHandler != NULL)) {
+
+		/*
+		 * This case happens when
+		 * A number of frames depending on the Rx FIFO Watermark
+		 * threshold are received.
+		 * And  also when frame was received and is sitting in RX FIFO.
+		 *
+		 * XCANPS_IXR_RXOK_MASK is not used because the bit is set
+		 * just once even if there are multiple frames sitting
+		 * in the RX FIFO.
+		 *
+		 * XCANPS_IXR_RXNEMP_MASK is used because the bit can be
+		 * set again and again automatically as long as there is
+		 * at least one frame in RX FIFO.
+		 */
+		CanPtr->RecvHandler(CanPtr->RecvRef);
+	}
+
+	/*
+	 * A frame was transmitted successfully.
+	 */
+	if (((PendingIntr & (XCANPS_IXR_TXOK_MASK | XCANPS_IXR_TXFWMEMP_MASK)) != (u32)0) &&
+		(CanPtr->SendHandler != NULL)) {
+		CanPtr->SendHandler(CanPtr->SendRef);
+	}
+}
+
+
+/*****************************************************************************/
+/**
+*
+* This routine installs an asynchronous callback function for the given
+* HandlerType:
+*
+* 
+* HandlerType			Callback Function Type
+* -----------------------	------------------------
+* XCANPS_HANDLER_SEND		XCanPs_SendRecvHandler
+* XCANPS_HANDLER_RECV		XCanPs_SendRecvHandler
+* XCANPS_HANDLER_ERROR		XCanPs_ErrorHandler
+* XCANPS_HANDLER_EVENT		XCanPs_EventHandler
+*
+* HandlerType			Invoked by this driver when:
+* -------------------------------------------------------------------------
+* XCANPS_HANDLER_SEND		A frame transmitted by a call to
+*				XCanPs_Send() has been sent successfully.
+*
+* XCANPS_HANDLER_RECV		A frame(s) has been received and is sitting in
+*				the RX FIFO.
+*
+* XCANPS_HANDLER_ERROR		An error interrupt is occurring.
+*
+* XCANPS_HANDLER_EVENT		Any other kind of interrupt is occurring.
+* 

+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+* @param	HandlerType specifies which handler is to be attached.
+* @param	CallBackFunc is the address of the callback function.
+* @param	CallBackRef is a user data item that will be passed to the
+*		callback function when it is invoked.
+*
+* @return
+*		- XST_SUCCESS when handler is installed.
+*		- XST_INVALID_PARAM when HandlerType is invalid.
+*
+* @note
+* Invoking this function for a handler that already has been installed replaces
+* it with the new handler.
+*
+******************************************************************************/
+s32 XCanPs_SetHandler(XCanPs *InstancePtr, u32 HandlerType,
+			void *CallBackFunc, void *CallBackRef)
+{
+	s32 Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	switch (HandlerType) {
+		case XCANPS_HANDLER_SEND:
+			InstancePtr->SendHandler =
+				(XCanPs_SendRecvHandler) CallBackFunc;
+			InstancePtr->SendRef = CallBackRef;
+			Status = XST_SUCCESS;
+			break;
+
+		case XCANPS_HANDLER_RECV:
+			InstancePtr->RecvHandler =
+				(XCanPs_SendRecvHandler) CallBackFunc;
+			InstancePtr->RecvRef = CallBackRef;
+			Status = XST_SUCCESS;
+			break;
+
+		case XCANPS_HANDLER_ERROR:
+			InstancePtr->ErrorHandler =
+				(XCanPs_ErrorHandler) CallBackFunc;
+			InstancePtr->ErrorRef = CallBackRef;
+			Status = XST_SUCCESS;
+			break;
+
+		case XCANPS_HANDLER_EVENT:
+			InstancePtr->EventHandler =
+				(XCanPs_EventHandler) CallBackFunc;
+			InstancePtr->EventRef = CallBackRef;
+			Status = XST_SUCCESS;
+			break;
+
+		default:
+			Status = XST_INVALID_PARAM;
+			break;
+	}
+	return Status;
+}
+
+/** @} */
diff --git a/src/Xilinx/libsrc/canps_v3_2/src/xcanps_selftest.c b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_selftest.c
new file mode 100644
index 0000000..26c9fcb
--- /dev/null
+++ b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_selftest.c
@@ -0,0 +1,234 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcanps_selftest.c
+* @addtogroup canps_v3_2
+* @{
+*
+* This file contains a diagnostic self-test function for the XCanPs driver.
+*
+* Read xcanps.h file for more information.
+*
+* @note
+* The  Baud Rate Prescaler Register (BRPR) and Bit Timing Register(BTR)
+* are setup such that CAN baud rate equals 40Kbps, given the CAN clock
+* equal to 24MHz. These need to be changed based on the desired baudrate
+* and CAN clock frequency.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00a xd/sv  01/12/10 First release
+* 2.1 adk 		23/08/14 Fixed CR:798792 Peripheral test for CANPS IP in
+*						 SDK claims a 40kbps baud rate but it's not.
+* 3.00  kvn    02/13/15 Modified code for MISRA_C:2012 compliance.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xstatus.h"
+#include "xcanps.h"
+
+/************************** Constant Definitions ****************************/
+
+#define XCANPS_MAX_FRAME_SIZE_IN_WORDS ((XCANPS_MAX_FRAME_SIZE) / (sizeof(u32)))
+
+#define FRAME_DATA_LENGTH	8U /* Frame Data field length */
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/*
+ * Buffers to hold frames to send and receive. These are declared as global so
+ * that they are not on the stack.
+ */
+static u32 TxFrame[XCANPS_MAX_FRAME_SIZE_IN_WORDS];
+static u32 RxFrame[XCANPS_MAX_FRAME_SIZE_IN_WORDS];
+
+/************************** Function Prototypes *****************************/
+
+/*****************************************************************************/
+/**
+*
+* This function runs a self-test on the CAN driver/device. The test resets
+* the device, sets up the Loop Back mode, sends a standard frame, receives the
+* frame, verifies the contents, and resets the device again.
+*
+* Note that this is a destructive test in that resets of the device are
+* performed. Refer the device specification for the device status after
+* the reset operation.
+*
+*
+* @param	InstancePtr is a pointer to the XCanPs instance.
+*
+* @return
+*		- XST_SUCCESS if the self-test passed. i.e., the frame
+*		  received via the internal loop back has the same contents as
+*		  the frame sent.
+* 		- XST_FAILURE   Otherwise.
+*
+* @note
+*
+* If the CAN device does not work properly, this function may enter an
+* infinite loop and will never return to the caller.
+* 


+* If XST_FAILURE is returned, the device is not reset so that the caller could
+* have a chance to check reason(s) causing the failure.
+*
+******************************************************************************/
+s32 XCanPs_SelfTest(XCanPs *InstancePtr)
+{
+	u8 *FramePtr;
+	s32 Status;
+	u32 Index;
+	u8 GetModeResult;
+	u32 RxEmptyResult;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	XCanPs_Reset(InstancePtr);
+
+	/*
+	 * The device should enter Configuration Mode immediately after
+	 * reset above is finished. Now check the mode and return error code if
+	 * it is not Configuration Mode.
+	 */
+	if (XCanPs_GetMode(InstancePtr) != XCANPS_MODE_CONFIG) {
+		Status = XST_FAILURE;
+		return Status;
+	}
+
+	/*
+	 * Setup Baud Rate Prescaler Register (BRPR) and Bit Timing Register
+	 * (BTR) such that CAN baud rate equals 40Kbps, given the CAN clock
+	 * equal to 24MHz. For more information see the CAN 2.0A, CAN 2.0B,
+	 * ISO 11898-1 specifications.
+	 */
+	(void)XCanPs_SetBaudRatePrescaler(InstancePtr, (u8)29U);
+	(void)XCanPs_SetBitTiming(InstancePtr, (u8)3U, (u8)2U, (u8)15U);
+
+	/*
+	 * Enter the loop back mode.
+	 */
+	XCanPs_EnterMode(InstancePtr, XCANPS_MODE_LOOPBACK);
+	GetModeResult = XCanPs_GetMode(InstancePtr);
+	while (GetModeResult != ((u8)XCANPS_MODE_LOOPBACK)) {
+		GetModeResult = XCanPs_GetMode(InstancePtr);
+	}
+
+	/*
+	 * Create a frame to send with known values so we can verify them
+	 * on receive.
+	 */
+	TxFrame[0] = (u32)XCanPs_CreateIdValue((u32)2000U, (u32)0U, (u32)0U, (u32)0U, (u32)0U);
+	TxFrame[1] = (u32)XCanPs_CreateDlcValue((u32)8U);
+
+	FramePtr = (u8 *)((void *)(&TxFrame[2]));
+	for (Index = 0U; Index < 8U; Index++) {
+		if(*FramePtr != 0U) {
+			*FramePtr = (u8)Index;
+			FramePtr++;
+		}
+	}
+
+	/*
+	 * Send the frame.
+	 */
+	Status = XCanPs_Send(InstancePtr, TxFrame);
+	if (Status != (s32)XST_SUCCESS) {
+		Status = XST_FAILURE;
+		return Status;
+	}
+
+	/*
+	 * Wait until the frame arrives RX FIFO via internal loop back.
+	 */
+	RxEmptyResult = XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr),
+			XCANPS_ISR_OFFSET) & XCANPS_IXR_RXNEMP_MASK;
+
+	while (RxEmptyResult == (u32)0U) {
+		RxEmptyResult = XCanPs_ReadReg(((InstancePtr)->CanConfig.BaseAddr),
+				XCANPS_ISR_OFFSET) & XCANPS_IXR_RXNEMP_MASK;
+	}
+
+	/*
+	 * Receive the frame.
+	 */
+	Status = XCanPs_Recv(InstancePtr, RxFrame);
+	if (Status != (s32)XST_SUCCESS) {
+		Status = XST_FAILURE;
+		return Status;
+	}
+
+	/*
+	 * Verify Identifier and Data Length Code.
+	 */
+	if (RxFrame[0] !=
+		(u32)XCanPs_CreateIdValue((u32)2000U, (u32)0U, (u32)0U, (u32)0U, (u32)0U)) {
+		Status = XST_FAILURE;
+		return Status;
+	}
+
+	if ((RxFrame[1] & ~XCANPS_DLCR_TIMESTAMP_MASK) != TxFrame[1]) {
+		Status = XST_FAILURE;
+		return Status;
+	}
+
+
+	for (Index = 2U; Index < (XCANPS_MAX_FRAME_SIZE_IN_WORDS); Index++) {
+		if (RxFrame[Index] != TxFrame[Index]) {
+			Status = XST_FAILURE;
+			return Status;
+		}
+	}
+
+	/*
+	 * Reset device again before returning to the caller.
+	 */
+	XCanPs_Reset(InstancePtr);
+
+	Status = XST_SUCCESS;
+	return Status;
+}
+
+
+/** @} */
diff --git a/src/Xilinx/libsrc/canps_v3_2/src/xcanps_sinit.c b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_sinit.c
new file mode 100644
index 0000000..5321669
--- /dev/null
+++ b/src/Xilinx/libsrc/canps_v3_2/src/xcanps_sinit.c
@@ -0,0 +1,103 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcanps_sinit.c
+* @addtogroup canps_v3_2
+* @{
+*
+* This file contains the implementation of the XCanPs driver's static
+* initialization functionality.
+*
+* @note		None.
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00a xd/sv  01/12/10 First release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xcanps.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+extern XCanPs_Config XCanPs_ConfigTable[XPAR_XCANPS_NUM_INSTANCES];
+
+/*****************************************************************************/
+/**
+*
+* This function looks for the device configuration based on the unique device
+* ID. The table XCanPs_ConfigTable[] contains the configuration information for
+* each device in the system.
+*
+* @param	DeviceId is the unique device ID of the device being looked up.
+*
+* @return	A pointer to the configuration table entry corresponding to the
+*		given device ID, or NULL if no match is found.
+*
+* @note		None.
+*
+******************************************************************************/
+XCanPs_Config *XCanPs_LookupConfig(u16 DeviceId)
+{
+	XCanPs_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index = 0U; Index < (u32)XPAR_XCANPS_NUM_INSTANCES; Index++) {
+		if (XCanPs_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XCanPs_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XCanPs_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/coresightps_dcc_v1_4/src/Makefile b/src/Xilinx/libsrc/coresightps_dcc_v1_4/src/Makefile
new file mode 100644
index 0000000..007162d
--- /dev/null
+++ b/src/Xilinx/libsrc/coresightps_dcc_v1_4/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner coresightps_dcc_comp_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling coresightps_dcc"
+
+coresightps_dcc_comp_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: coresightps_dcc_includes
+
+coresightps_dcc_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/coresightps_dcc_v1_4/src/xcoresightpsdcc.c b/src/Xilinx/libsrc/coresightps_dcc_v1_4/src/xcoresightpsdcc.c
new file mode 100644
index 0000000..fca26ca
--- /dev/null
+++ b/src/Xilinx/libsrc/coresightps_dcc_v1_4/src/xcoresightpsdcc.c
@@ -0,0 +1,188 @@
+/******************************************************************************
+*
+* Copyright (C) 2015-2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcoresightpsdcc.c
+* @addtogroup coresightps_dcc_v1_4
+* @{
+*
+* Functions in this file are the minimum required functions for the
+* XCoreSightPs driver.
+*
+* @note 	None.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date		Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00  kvn    02/14/15 First release
+* 1.1   kvn    06/12/15 Add support for Zynq Ultrascale+ MP.
+*       kvn    08/18/15 Modified Makefile according to compiler changes.
+* 1.2   kvn    10/09/15 Add support for IAR Compiler.
+* 1.3   asa    07/01/16 Made changes to ensure that the file does not compile
+*                       for MB BSPs. Instead it throws up a warning. This
+*                       fixes the CR#953056.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#ifdef __MICROBLAZE__
+#warning "The driver is supported only for ARM architecture"
+#else
+
+#include 
+#include 
+
+#ifdef __ICCARM__
+#define INLINE
+#else
+#define INLINE __inline
+#endif
+
+/* DCC Status Bits */
+#define XCORESIGHTPS_DCC_STATUS_RX (1 << 30)
+#define XCORESIGHTPS_DCC_STATUS_TX (1 << 29)
+
+static INLINE u32 XCoresightPs_DccGetStatus(void);
+
+/****************************************************************************/
+/**
+*
+* This functions sends a single byte using the DCC. It is blocking in that it
+* waits for the transmitter to become non-full before it writes the byte to
+* the transmit register.
+*
+* @param	BaseAddress is a dummy parameter to match the function proto
+*		of functions for other stdio devices.
+* @param	Data is the byte of data to send
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCoresightPs_DccSendByte(u32 BaseAddress, u8 Data)
+{
+	(void) BaseAddress;
+	while (XCoresightPs_DccGetStatus() & XCORESIGHTPS_DCC_STATUS_TX)
+	dsb();
+#ifdef __aarch64__
+	asm volatile ("msr dbgdtrtx_el0, %0" : : "r" (Data));
+#elif defined (__GNUC__) || defined (__ICCARM__)
+	asm volatile("mcr p14, 0, %0, c0, c5, 0"
+			: : "r" (Data));
+#else
+	{
+		volatile register u32 Reg __asm("cp14:0:c0:c5:0");
+		Reg = Data;
+	}
+#endif
+	isb();
+
+}
+
+/****************************************************************************/
+/**
+*
+* This functions receives a single byte using the DCC. It is blocking in that
+* it waits for the receiver to become non-empty before it reads from the
+* receive register.
+*
+* @param	BaseAddress is a dummy parameter to match the function proto
+*		of functions for other stdio devices.
+*
+* @return	The byte of data received.
+*
+* @note		None.
+*
+******************************************************************************/
+u8 XCoresightPs_DccRecvByte(u32 BaseAddress)
+{
+	u8 Data = 0U;
+	(void) BaseAddress;
+
+	while (!(XCoresightPs_DccGetStatus() & XCORESIGHTPS_DCC_STATUS_RX))
+		dsb();
+
+#ifdef __aarch64__
+	asm volatile ("mrs %0, dbgdtrrx_el0" : "=r" (Data));
+#elif defined (__GNUC__) || defined (__ICCARM__)
+	asm volatile("mrc p14, 0, %0, c0, c5, 0"
+			: "=r" (Data));
+#else
+	{
+		volatile register u32 Reg __asm("cp14:0:c0:c5:0");
+		Data = Reg;
+	}
+#endif
+	isb();
+
+	return Data;
+}
+
+
+/****************************************************************************/
+/**INLINE
+*
+* This functions read the status register of the DCC.
+*
+* @param	BaseAddress is the base address of the device
+*
+* @return	The contents of the Status Register.
+*
+* @note		None.
+*
+******************************************************************************/
+static INLINE u32 XCoresightPs_DccGetStatus(void)
+{
+	u32 Status = 0U;
+
+#ifdef __aarch64__
+	asm volatile ("mrs %0, mdccsr_el0" : "=r" (Status));
+#elif defined (__GNUC__) || defined (__ICCARM__)
+	asm volatile("mrc p14, 0, %0, c0, c1, 0"
+			: "=r" (Status) : : "cc");
+#else
+	{
+		volatile register u32 Reg __asm("cp14:0:c0:c1:0");
+		Status = Reg;
+	}
+#endif
+	return Status;
+#endif
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/coresightps_dcc_v1_4/src/xcoresightpsdcc.h b/src/Xilinx/libsrc/coresightps_dcc_v1_4/src/xcoresightpsdcc.h
new file mode 100644
index 0000000..67959e3
--- /dev/null
+++ b/src/Xilinx/libsrc/coresightps_dcc_v1_4/src/xcoresightpsdcc.h
@@ -0,0 +1,74 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcoresightpsdcc.h
+* @addtogroup coresightps_dcc_v1_4
+* @{
+* @details
+*
+* CoreSight driver component.
+*
+* The coresight is a part of debug communication channel (DCC) group. Jtag UART
+* for ARM uses DCC. Each ARM core has its own DCC, so one need to select an
+* ARM target in XSDB console before running the jtag terminal command. Using the
+* coresight driver component, the output stream can be directed to a log file.
+*
+* @note 	None.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date		Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00  kvn    02/14/15 First release
+* 1.1   kvn    06/12/15 Add support for Zynq Ultrascale+ MP.
+*       kvn    08/18/15 Modified Makefile according to compiler changes.
+* 1.3   asa    07/01/16 Made changes to ensure that the file does not compile
+*                       for MB BSPs. Instead it throws up a warning. This
+*                       fixes the CR#953056.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#ifndef __MICROBLAZE__
+#include 
+
+void XCoresightPs_DccSendByte(u32 BaseAddress, u8 Data);
+
+u8 XCoresightPs_DccRecvByte(u32 BaseAddress);
+#endif
+/** @} */
diff --git a/src/Xilinx/libsrc/cpu_cortexr5_v1_4/src/Makefile b/src/Xilinx/libsrc/cpu_cortexr5_v1_4/src/Makefile
new file mode 100644
index 0000000..7478263
--- /dev/null
+++ b/src/Xilinx/libsrc/cpu_cortexr5_v1_4/src/Makefile
@@ -0,0 +1,25 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I${INCLUDEDIR}
+
+OUTS = *.o
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+LIBSOURCES=*.c
+INCLUDEFILES=*.h
+
+libs:
+	echo "Compiling cpu_cortexr5"
+
+.PHONY: include
+include:
+	${CP} $(INCLUDEFILES) $(INCLUDEDIR)
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/cpu_cortexr5_v1_4/src/xcpu_cortexr5.h b/src/Xilinx/libsrc/cpu_cortexr5_v1_4/src/xcpu_cortexr5.h
new file mode 100644
index 0000000..108dc7e
--- /dev/null
+++ b/src/Xilinx/libsrc/cpu_cortexr5_v1_4/src/xcpu_cortexr5.h
@@ -0,0 +1,48 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcpu_cortexr5.h
+* @addtogroup cpu_cortexr5_v1_4
+* @{
+* @details
+*
+* dummy file
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------------
+* 1.4   ms   04/18/17 Modified tcl file to add suffix U for XPAR_CPU_ID
+*                     parameter of cpu_cortexr5 in xparameters.h
+******************************************************************************/
+/** @} */
diff --git a/src/Xilinx/libsrc/csudma_v1_2/src/Makefile b/src/Xilinx/libsrc/csudma_v1_2/src/Makefile
new file mode 100644
index 0000000..778797b
--- /dev/null
+++ b/src/Xilinx/libsrc/csudma_v1_2/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner csudma_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling csudma"
+
+csudma_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: csudma_includes
+
+csudma_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma.c b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma.c
new file mode 100644
index 0000000..9aa4bee
--- /dev/null
+++ b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma.c
@@ -0,0 +1,847 @@
+/******************************************************************************
+*
+* Copyright (C) 2014-2018 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xcsudma.c
+* @addtogroup csudma_v1_2
+* @{
+*
+* This file contains the implementation of the interface functions for CSU_DMA
+* driver. Refer to the header file xcsudma.h for more detailed information.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ---------------------------------------------------
+* 1.0   vnsld   22/10/14 First release
+* 1.1   adk     10/05/16 Fixed CR#951040 race condition in the recv path when
+*                        source and destination points to the same buffer.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xcsudma.h"
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Function Definitions *****************************/
+
+/*****************************************************************************/
+/**
+*
+* This function initializes an CSU_DMA core. This function must be called
+* prior to using an CSU_DMA core. Initialization of an CSU_DMA includes setting
+* up the instance data and ensuring the hardware is in a quiescent state.
+*
+* @param	InstancePtr is a pointer to the XCsuDma instance.
+* @param	CfgPtr is a reference to a structure containing information
+*		about a specific XCsuDma instance.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. The caller is responsible for keeping the
+*		address mapping from EffectiveAddr to the device physical
+*		base address unchanged once this function is invoked.
+*		Unexpected errors may occur if the address mapping changes
+*		after this function is called. If address translation is not
+*		used, pass in the physical address instead.
+*
+* @return
+*		- XST_SUCCESS if initialization was successful.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XCsuDma_CfgInitialize(XCsuDma *InstancePtr, XCsuDma_Config *CfgPtr,
+			u32 EffectiveAddr)
+{
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(CfgPtr != NULL);
+	Xil_AssertNonvoid(EffectiveAddr != ((u32)0x0));
+
+	/* Setup the instance */
+	(void)memcpy((void *)&(InstancePtr->Config), (const void *)CfgPtr,
+						sizeof(XCsuDma_Config));
+	InstancePtr->Config.BaseAddress = EffectiveAddr;
+
+	XCsuDma_Reset();
+
+	InstancePtr->IsReady = (u32)(XIL_COMPONENT_IS_READY);
+
+	return (XST_SUCCESS);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the starting address and amount(size) of the data to be
+* transfered from/to the memory through the AXI interface.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+* @param	Addr is a 64 bit variable which holds the starting address of
+* 		data which needs to write into the memory(DST) (or read	from
+* 		the memory(SRC)).
+* @param	Size is a 32 bit variable which represents the number of 4 byte
+* 		words needs to be transfered from starting address.
+* @param	EnDataLast is to trigger an end of message. It will enable or
+* 		disable data_inp_last signal to stream interface when current
+* 		command is completed. It is applicable only to source channel
+* 		and neglected for destination channel.
+* 		-	1 - Asserts data_inp_last signal.
+* 		-	0 - data_inp_last will not be asserted.
+*
+* @return	None.
+*
+* @note		Data_inp_last signal is asserted simultaneously with the
+* 		data_inp_valid signal associated with the final 32-bit word
+*		transfer.
+*
+******************************************************************************/
+void XCsuDma_Transfer(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+					UINTPTR Addr, u32 Size, u8 EnDataLast)
+{
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(((Addr) & (u64)(XCSUDMA_ADDR_LSB_MASK)) == (u64)0x00);
+	Xil_AssertVoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+					(Channel == (XCSUDMA_DST_CHANNEL)));
+	Xil_AssertVoid(Size <= (u32)(XCSUDMA_SIZE_MAX));
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)(XIL_COMPONENT_IS_READY));
+
+	/* Flushing cache memory */
+	if (Channel == (XCSUDMA_SRC_CHANNEL)) {
+		Xil_DCacheFlushRange(Addr, Size << (u32)(XCSUDMA_SIZE_SHIFT));
+	}
+	/* Invalidating cache memory */
+	else {
+#if defined(__aarch64__)
+		Xil_DCacheInvalidateRange(Addr, Size <<
+					(u32)(XCSUDMA_SIZE_SHIFT));
+#else
+		Xil_DCacheFlushRange(Addr, Size << (u32)(XCSUDMA_SIZE_SHIFT));
+#endif
+	}
+
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+		((u32)(XCSUDMA_ADDR_OFFSET) +
+		((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+				((u32)(Addr) & (u32)(XCSUDMA_ADDR_MASK)));
+
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+		((u32)(XCSUDMA_ADDR_MSB_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+		(((u64)Addr >> (u32)(XCSUDMA_MSB_ADDR_SHIFT)) &
+					(u32)(XCSUDMA_MSB_ADDR_MASK)));
+
+	if (EnDataLast == (u8)(XCSUDMA_LAST_WORD_MASK)) {
+		XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_SIZE_OFFSET) +
+				((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+			((Size << (u32)(XCSUDMA_SIZE_SHIFT)) |
+					(u32)(XCSUDMA_LAST_WORD_MASK)));
+	}
+	else {
+		XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_SIZE_OFFSET) +
+				((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+				(Size << (u32)(XCSUDMA_SIZE_SHIFT)));
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the starting address and amount(size) of the data to be
+* transfered from/to the memory through the AXI interface.
+* This function is useful for pmu processor when it wishes to do
+* a 64-bit DMA transfer.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+* @param	AddrLow is a 32 bit variable which holds the starting lower address of
+* 		data which needs to write into the memory(DST) (or read	from
+* 		the memory(SRC)).
+* @param    AddrHigh is a 32 bit variable which holds the higher address of data
+* 			which needs to write into the memory(DST) (or read from
+* 			the memroy(SRC)).
+* @param	Size is a 32 bit variable which represents the number of 4 byte
+* 		words needs to be transfered from starting address.
+* @param	EnDataLast is to trigger an end of message. It will enable or
+* 		disable data_inp_last signal to stream interface when current
+* 		command is completed. It is applicable only to source channel
+* 		and neglected for destination channel.
+* 		-	1 - Asserts data_inp_last signal.
+* 		-	0 - data_inp_last will not be asserted.
+*
+* @return	None.
+*
+* @note		Data_inp_last signal is asserted simultaneously with the
+* 		data_inp_valid signal associated with the final 32-bit word
+*		transfer
+*		This API won't do flush/invalidation for the DMA buffer.
+*		It is recommened to call this API only through PMU processor.
+*
+******************************************************************************/
+void XCsuDma_64BitTransfer(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+			   u32 AddrLow, u32 AddrHigh, u32 Size, u8 EnDataLast)
+{
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+					(Channel == (XCSUDMA_DST_CHANNEL)));
+	Xil_AssertVoid(Size <= (u32)(XCSUDMA_SIZE_MAX));
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)(XIL_COMPONENT_IS_READY));
+
+
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+		((u32)(XCSUDMA_ADDR_OFFSET) +
+		((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+				(AddrLow & XCSUDMA_ADDR_MASK));
+
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+		    ((u32)(XCSUDMA_ADDR_MSB_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+		    (AddrHigh & XCSUDMA_MSB_ADDR_MASK));
+
+	if (EnDataLast == (u8)(XCSUDMA_LAST_WORD_MASK)) {
+		XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_SIZE_OFFSET) +
+				((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+			((Size << (u32)(XCSUDMA_SIZE_SHIFT)) |
+					(u32)(XCSUDMA_LAST_WORD_MASK)));
+	}
+	else {
+		XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_SIZE_OFFSET) +
+				((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+				(Size << (u32)(XCSUDMA_SIZE_SHIFT)));
+	}
+}
+
+/*****************************************************************************/
+/*****************************************************************************/
+/**
+*
+* This function returns the current address location of the memory, from where
+* it has to read the data(SRC) or the location where it has to write the data
+* (DST) based on the channel selection.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+*
+* @return	Address is a 64 bit variable which holds the current address.
+*		- From this location data has to be read(SRC)
+*		- At this location data has to be written(DST)
+*
+* @note		None.
+*
+******************************************************************************/
+u64 XCsuDma_GetAddr(XCsuDma *InstancePtr, XCsuDma_Channel Channel)
+{
+	u64 FullAddr;
+
+	/* Verify arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+					(Channel == (XCSUDMA_DST_CHANNEL)));
+
+	FullAddr = XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+				((u32)(XCSUDMA_ADDR_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))));
+
+	FullAddr |= (u64)((u64)XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_ADDR_MSB_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF)))) <<
+				(u64)(XCSUDMA_MSB_ADDR_SHIFT));
+
+	return FullAddr;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns the size of the data yet to be transfered from memory
+* to CSU_DMA or CSU_DMA to memory based on the channel selection.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+*
+* @return	Size is amount of data yet to be transfered.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 XCsuDma_GetSize(XCsuDma *InstancePtr, XCsuDma_Channel Channel)
+{
+	u32 Size;
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+					(Channel == (XCSUDMA_DST_CHANNEL)));
+
+	Size = XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+		((u32)(XCSUDMA_SIZE_OFFSET) +
+		((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF)))) >>
+					(u32)(XCSUDMA_SIZE_SHIFT);
+
+	return Size;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function pause the Channel data tranfer to/from memory or to/from stream
+* based on pause type.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+* @param	Type is type of the pause to be enabled.
+*		- XCSUDMA_PAUSE_MEMORY(0) - Pause memory
+*			- SRC Stops issuing of new read commands to memory.
+*			- DST Stops issuing of new write commands to memory.
+*		- XCSUDMA_PAUSE_STREAM(1) - Pause stream
+*			- SRC Stops transfer of data from FIFO to Stream.
+*			- DST Stops transfer of data from stream to FIFO.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCsuDma_Pause(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+						XCsuDma_PauseType Type)
+{
+	/* Verify arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((Type == (XCSUDMA_PAUSE_MEMORY)) ||
+				(Type == (XCSUDMA_PAUSE_STREAM)));
+	Xil_AssertVoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+					(Channel == (XCSUDMA_DST_CHANNEL)));
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)(XIL_COMPONENT_IS_READY));
+
+	/* Pause Memory Read/Write/Stream operations */
+	if (Type == (XCSUDMA_PAUSE_MEMORY)) {
+		XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_CTRL_OFFSET) +
+				((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+			(XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+				((u32)(XCSUDMA_CTRL_OFFSET) +
+				((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF)))) |
+					(u32)(XCSUDMA_CTRL_PAUSE_MEM_MASK)));
+	}
+	if (Type == (XCSUDMA_PAUSE_STREAM)) {
+		XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_CTRL_OFFSET) +
+				((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+			(XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+				((u32)(XCSUDMA_CTRL_OFFSET) +
+				(Channel * (u32)XCSUDMA_OFFSET_DIFF))) |
+				(u32)(XCSUDMA_CTRL_PAUSE_STRM_MASK)));
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This functions checks whether Channel's memory or stream is paused or not
+* based on the given pause type.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+* @param	Type is type of the pause which needs to be checked.
+*		- XCSUDMA_PAUSE_MEMORY(0) - Pause memory
+*			- SRC Stops issuing of new read commands to memory.
+*			- DST Stops issuing of new write commands to memory.
+*		- XCSUDMA_PAUSE_STREAM(1) - Pause stream
+*			- SRC Stops transfer of data from FIFO to Stream.
+*			- DST Stops transfer of data from stream to FIFO.
+*
+* @return	Returns the pause status.
+*		- TRUE if it is in paused state.
+*		- FALSE if it is not in pause state.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XCsuDma_IsPaused(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+		XCsuDma_PauseType Type)
+{
+
+	u32 Data;
+	s32 PauseState;
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+					(Channel == (XCSUDMA_DST_CHANNEL)));
+	Xil_AssertNonvoid((Type == (XCSUDMA_PAUSE_MEMORY)) ||
+					(Type == (XCSUDMA_PAUSE_STREAM)));
+
+	Data = XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_CTRL_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))));
+
+	/* To know Pause condition of Memory Read/Write/Stream operations */
+	if (Type == (XCSUDMA_PAUSE_MEMORY)) {
+		if ((Data & (u32)(XCSUDMA_CTRL_PAUSE_MEM_MASK)) ==
+								(u32)0x00) {
+			PauseState = (s32)(FALSE);
+		}
+		else {
+			PauseState = (s32)(TRUE);
+		}
+	}
+	else {
+		if ((Data & (u32)(XCSUDMA_CTRL_PAUSE_STRM_MASK)) ==
+								(u32)0x00) {
+				PauseState = (s32)(FALSE);
+		}
+		else {
+			PauseState = (s32)(TRUE);
+		}
+	}
+
+	return (s32)PauseState;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function resumes the channel if it is in paused state and continues
+* where it has left or no effect if it is not in paused state, based on the
+* type of pause.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+* @param	Type is type of the pause to be Resume if it is in pause
+*		state.
+*		- XCSUDMA_PAUSE_MEMORY(0) - Pause memory
+*			- SRC Stops issuing of new read commands to memory.
+*			- DST Stops issuing of new write commands to memory.
+*		- XCSUDMA_PAUSE_STREAM(1) - Pause stream
+*			- SRC Stops transfer of data from FIFO to Stream.
+*			- DST Stops transfer of data from stream to FIFO.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCsuDma_Resume(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+		XCsuDma_PauseType Type)
+{
+	u32 Data;
+	/* Verify arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((Type == (XCSUDMA_PAUSE_MEMORY)) ||
+			(Type == (XCSUDMA_PAUSE_STREAM)));
+	Xil_AssertVoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+					(Channel == (XCSUDMA_DST_CHANNEL)));
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)(XIL_COMPONENT_IS_READY));
+
+	Data = XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_CTRL_OFFSET) +
+		((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))));
+
+	if (Type == (XCSUDMA_PAUSE_MEMORY)) {
+		XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+		((u32)(XCSUDMA_CTRL_OFFSET) +
+		((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+		(Data &
+				(~(XCSUDMA_CTRL_PAUSE_MEM_MASK))));
+	}
+	if (Type == (XCSUDMA_PAUSE_STREAM)) {
+		XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+		((u32)(XCSUDMA_CTRL_OFFSET) +
+		(((u32)Channel) * (u32)(XCSUDMA_OFFSET_DIFF))),
+			( Data &
+			(~(XCSUDMA_CTRL_PAUSE_STRM_MASK))));
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns the sum of all the data read from AXI memory. It is
+* valid only one we use CSU_DMA source channel.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+*
+* @return	Returns the sum of all the data read from memory.
+*
+* @note		Before start of the transfer need to clear this register to get
+*		correct sum otherwise it adds to previous value which results
+*		to wrong output.
+*		Valid only for source channel
+*
+******************************************************************************/
+u32 XCsuDma_GetCheckSum(XCsuDma *InstancePtr)
+{
+	u32 ChkSum;
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady ==
+				(u32)(XIL_COMPONENT_IS_READY));
+
+	ChkSum = XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+						(u32)(XCSUDMA_CRC_OFFSET));
+
+	return ChkSum;
+
+}
+/*****************************************************************************/
+/**
+*
+* This function clears the check sum of the data read from AXI memory. It is
+* valid only for CSU_DMA source channel.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+*
+* @return	Returns the sum of all the data read from memory.
+*
+* @note		Before start of the transfer need to clear this register to get
+*		correct sum otherwise it adds to previous value which results
+*		to wrong output.
+*
+******************************************************************************/
+void XCsuDma_ClearCheckSum(XCsuDma *InstancePtr)
+{
+
+	/* Verify arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+		(u32)(XCSUDMA_CRC_OFFSET), (u32)(XCSUDMA_CRC_RESET_MASK));
+}
+
+/*****************************************************************************/
+/**
+* This function cofigures all the values of CSU_DMA's Channels with the values
+* of updated XCsuDma_Configure structure.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+* @param	ConfigurValues is a pointer to the structure XCsuDma_Configure
+*		whose values are used to configure CSU_DMA core.
+*		- SssFifoThesh   When the DST FIFO level >= this value,
+*		  the SSS interface signal, "data_out_fifo_level_hit" will be
+*		  asserted. This mechanism can be used by the SSS to flow
+*		  control data that is being looped back from the SRC DMA.
+*			- Range is (0x10 to 0x7A) threshold is 17 to 123
+*			entries.
+*			- It is valid only for DST CSU_DMA IP.
+*		- ApbErr          When accessed to invalid APB the resulting
+*		  pslerr will be
+*			- 0 - 1'b0
+*			- 1 - 1'b1
+*		- EndianType      Type of endianness
+*			- 0 doesn't change order
+*			- 1 will flip the order.
+*		- AxiBurstType....Type of the burst
+*			- 0 will issue INCR type burst
+*			- 1 will issue FIXED type burst
+*		- TimeoutValue    Time out value for timers
+*			- 0x000 to 0xFFE are valid inputs
+*			- 0xFFF clears both timers
+*		- FifoThresh......Programmed watermark value
+*			- Range is 0x00 to 0x80 (0 to 128 entries).
+*		- Acache         Sets the AXI CACHE bits on the AXI Write/Read
+*		channel.
+*			- Cacheable ARCACHE[1] for SRC Channel and AWCACHE[1]
+*			  for DST channel are always 1, we need to configure
+*			  remaining 3 signal support
+*			  (Bufferable, Read allocate and Write allocate).
+*			Valid inputs are:
+*			- 0x000 - Cacheable, but do not allocate
+*			- 0x001 - Cacheable and bufferable, but do not allocate
+*			- 0x010 - Cacheable write-through, allocate on reads
+*				  only
+*			- 0x011 - Cacheable write-back, allocate on reads only
+*			- 0x100 - Cacheable write-through, allocate on writes
+*				  only
+*			- 0x101 - Cacheable write-back, allocate on writes only
+*			- 0x110 - Cacheable write-through, allocate on both
+*				  reads and writes
+*			- 0x111 - Cacheable write-back, allocate on both reads
+*				  and writes
+*		- RouteBit        To select route
+*			- 0 : Command will be routed normally
+*			- 1 : Command will be routed to APU's cache controller
+*		- TimeoutEn       To enable or disable time out counters
+*			- 0 : The 2 Timeout counters are disabled
+*			- 1 : The 2 Timeout counters are enabled
+*		- TimeoutPre      Set the prescaler value for the timeout in
+*		clk (~2.5ns) cycles
+*			- Range is 0x000(Prescaler enables timer every cycles)
+*			  to 0xFFF(Prescaler enables timer every 4096 cycles)
+*		- MaxOutCmds      Controls the maximumum number of outstanding
+*		AXI read commands issued.
+*			- Range is 0x0(Up to 1 Outstanding Read command
+*			  allowed) to 0x8 (Up to 9 Outstanding Read
+*			  command allowed)
+*
+* @return	None.
+*
+* @note		To use timers timeout value Timeout enable field should be
+*		enabled.
+*
+******************************************************************************/
+void XCsuDma_SetConfig(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+					XCsuDma_Configure *ConfigurValues)
+{
+	u32 Data;
+
+	/* Verify arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)(XIL_COMPONENT_IS_READY));
+	Xil_AssertVoid(ConfigurValues != NULL);
+	Xil_AssertVoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+				(Channel == (XCSUDMA_DST_CHANNEL)));
+	Xil_AssertVoid(XCsuDma_IsBusy(InstancePtr, Channel) != (s32)(TRUE));
+
+	Data = (((ConfigurValues->EndianType <<
+			(u32)(XCSUDMA_CTRL_ENDIAN_SHIFT)) &
+			(u32)(XCSUDMA_CTRL_ENDIAN_MASK)) |
+		((ConfigurValues->ApbErr <<
+			(u32)(XCSUDMA_CTRL_APB_ERR_SHIFT)) &
+			(u32)(XCSUDMA_CTRL_APB_ERR_MASK)) |
+		((ConfigurValues->AxiBurstType <<
+			(u32)(XCSUDMA_CTRL_BURST_SHIFT)) &
+			(u32)(XCSUDMA_CTRL_BURST_MASK)) |
+		((ConfigurValues->TimeoutValue <<
+			(u32)(XCSUDMA_CTRL_TIMEOUT_SHIFT)) &
+			(u32)(XCSUDMA_CTRL_TIMEOUT_MASK)) |
+		((ConfigurValues->FifoThresh <<
+			(u32)(XCSUDMA_CTRL_FIFO_THRESH_SHIFT)) &
+			(u32)(XCSUDMA_CTRL_FIFO_THRESH_MASK)));
+	if(Channel == XCSUDMA_DST_CHANNEL) {
+		Data = Data | (u32)((ConfigurValues->SssFifoThesh <<
+				(u32)(XCSUDMA_CTRL_SSS_FIFOTHRESH_SHIFT)) &
+				(u32)(XCSUDMA_CTRL_SSS_FIFOTHRESH_MASK));
+	}
+
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_CTRL_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))), Data);
+
+	Data = (XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_CTRL2_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF)))) &
+				(u32)(XCSUDMA_CTRL2_RESERVED_MASK));
+	Data |= (((ConfigurValues->Acache <<
+			(u32)(XCSUDMA_CTRL2_ACACHE_SHIFT)) &
+			(u32)(XCSUDMA_CTRL2_ACACHE_MASK)) |
+		((ConfigurValues->RouteBit <<
+			(u32)(XCSUDMA_CTRL2_ROUTE_SHIFT)) &
+			(u32)(XCSUDMA_CTRL2_ROUTE_MASK)) |
+		((ConfigurValues->TimeoutEn <<
+			(u32)(XCSUDMA_CTRL2_TIMEOUT_EN_SHIFT)) &
+			(u32)(XCSUDMA_CTRL2_TIMEOUT_EN_MASK)) |
+		((ConfigurValues->TimeoutPre <<
+			(u32)(XCSUDMA_CTRL2_TIMEOUT_PRE_SHIFT)) &
+			(u32)(XCSUDMA_CTRL2_TIMEOUT_PRE_MASK)) |
+		((ConfigurValues->MaxOutCmds) &
+			(u32)(XCSUDMA_CTRL2_MAXCMDS_MASK)));
+
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+		((u32)(XCSUDMA_CTRL2_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))), Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function updates XCsuDma_Configure structure members with the cofigured
+* values of CSU_DMA's Channel.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+* @param	ConfigurValues is a pointer to the structure XCsuDma_Configure
+*		whose members are updated with configurations of CSU_DMA core.
+*		- SssFifoThesh   When the DST FIFO level >= this value,
+*		  the SSS interface signal, "data_out_fifo_level_hit" will be
+*		  asserted. This mechanism can be used by the SSS to flow
+*		  control data that is being looped back from the SRC DMA.
+*			- Range is (0x10 to 0x7A) threshold is 17 to 123
+*			entries.
+*			- It is valid only for DST CSU_DMA IP.
+*		- ApbErr          When accessed to invalid APB the resulting
+*		  pslerr will be
+*			- 0 - 1'b0
+*			- 1 - 1'b1
+*		- EndianType      Type of endianness
+*			- 0 doesn't change order
+*			- 1 will flip the order.
+*		- AxiBurstType....Type of the burst
+*			- 0 will issue INCR type burst
+*			- 1 will issue FIXED type burst
+*		- TimeoutValue    Time out value for timers
+*			- 0x000 to 0xFFE are valid inputs
+*			- 0xFFF clears both timers
+*		- FifoThresh......Programmed watermark value
+*			- Range is 0x00 to 0x80 (0 to 128 entries).
+*		- Acache         Sets the AXI CACHE bits on the AXI Write/Read
+*		channel.
+*			- Cacheable ARCACHE[1] for SRC Channel and AWCACHE[1]
+*			  for DST channel are always 1, we need to configure
+*			  remaining 3 signal support
+*			  (Bufferable, Read allocate and Write allocate).
+*			Valid inputs are:
+*			- 0x000 - Cacheable, but do not allocate
+*			- 0x001 - Cacheable and bufferable, but do not allocate
+*			- 0x010 - Cacheable write-through, allocate on reads
+*				  only
+*			- 0x011 - Cacheable write-back, allocate on reads only
+*			- 0x100 - Cacheable write-through, allocate on writes
+*				  only
+*			- 0x101 - Cacheable write-back, allocate on writes only
+*			- 0x110 - Cacheable write-through, allocate on both
+*				  reads and writes
+*			- 0x111 - Cacheable write-back, allocate on both reads
+*				  and writes
+*		- RouteBit        To select route
+*			- 0 : Command will be routed based normally
+*			- 1 : Command will be routed to APU's cache controller
+*		- TimeoutEn       To enable or disable time out counters
+*			- 0 : The 2 Timeout counters are disabled
+*			- 1 : The 2 Timeout counters are enabled
+*		- TimeoutPre      Set the prescaler value for the timeout in
+*		clk (~2.5ns) cycles
+*			- Range is 0x000(Prescaler enables timer every cycles)
+*			 to 0xFFF(Prescaler enables timer every 4096 cycles)
+*		- MaxOutCmds      Controls the maximumum number of outstanding
+*		AXI read commands issued.
+*			- Range is 0x0(Up to 1 Outstanding Read command
+*			allowed) to 0x8 (Up to 9 Outstanding Read command
+*			allowed)
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCsuDma_GetConfig(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+				XCsuDma_Configure *ConfigurValues)
+{
+	u32 Data;
+
+	/* Verify arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(ConfigurValues != NULL);
+	Xil_AssertVoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+				(Channel == (XCSUDMA_DST_CHANNEL)));
+
+	Data = XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+		((u32)(XCSUDMA_CTRL_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))));
+
+	if (Channel == (XCSUDMA_DST_CHANNEL)) {
+		ConfigurValues->SssFifoThesh =
+			(u8)((Data &
+				(u32)(XCSUDMA_CTRL_SSS_FIFOTHRESH_MASK)) >>
+				(u32)(XCSUDMA_CTRL_SSS_FIFOTHRESH_SHIFT));
+	}
+	ConfigurValues->ApbErr =
+		(u8)((Data & (u32)(XCSUDMA_CTRL_APB_ERR_MASK)) >>
+				(u32)(XCSUDMA_CTRL_APB_ERR_SHIFT));
+	ConfigurValues->EndianType =
+		(u8)((Data & (u32)(XCSUDMA_CTRL_ENDIAN_MASK)) >>
+				(u32)(XCSUDMA_CTRL_ENDIAN_SHIFT));
+	ConfigurValues->AxiBurstType =
+		(u8)((Data & (u32)(XCSUDMA_CTRL_BURST_MASK)) >>
+				(u32)(XCSUDMA_CTRL_BURST_SHIFT));
+	ConfigurValues->TimeoutValue =
+		((Data & (u32)(XCSUDMA_CTRL_TIMEOUT_MASK)) >>
+				(u32)(XCSUDMA_CTRL_TIMEOUT_SHIFT));
+	ConfigurValues->FifoThresh =
+		(u8)((Data & (u32)(XCSUDMA_CTRL_FIFO_THRESH_MASK)) >>
+				(u32)(XCSUDMA_CTRL_FIFO_THRESH_SHIFT));
+
+	Data = XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_CTRL2_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))));
+
+	ConfigurValues->Acache =
+			(u8)((Data & (u32)(XCSUDMA_CTRL2_ACACHE_MASK)) >>
+					(u32)(XCSUDMA_CTRL2_ACACHE_SHIFT));
+	ConfigurValues->RouteBit =
+			(u8)((Data & (u32)(XCSUDMA_CTRL2_ROUTE_MASK)) >>
+					(u32)(XCSUDMA_CTRL2_ROUTE_SHIFT));
+	ConfigurValues->TimeoutEn =
+			(u8)((Data & (u32)(XCSUDMA_CTRL2_TIMEOUT_EN_MASK)) >>
+				(u32)(XCSUDMA_CTRL2_TIMEOUT_EN_SHIFT));
+	ConfigurValues->TimeoutPre =
+			(u16)((Data & (u32)(XCSUDMA_CTRL2_TIMEOUT_PRE_MASK)) >>
+				(u32)(XCSUDMA_CTRL2_TIMEOUT_PRE_SHIFT));
+	ConfigurValues->MaxOutCmds =
+			(u8)((Data & (u32)(XCSUDMA_CTRL2_MAXCMDS_MASK)));
+
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma.h b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma.h
new file mode 100644
index 0000000..fc675a1
--- /dev/null
+++ b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma.h
@@ -0,0 +1,429 @@
+/******************************************************************************
+*
+* Copyright (C) 2014-2018 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* The CSU_DMA is present inside CSU (Configuration Security Unit) module which
+* is located within the Low-Power Subsystem (LPS) internal to the PS.
+* CSU_DMA allows the CSU to move data efficiently between the memory (32 bit
+* AXI interface) and the CSU stream peripherals (SHA, AES and PCAP) via Secure
+* Stream Switch (SSS).
+*
+* The CSU_DMA is a 2 channel simple DMA, allowing separate control of the SRC
+* (read) channel and DST (write) channel. The DMA is effectively able to
+* transfer data:
+*	- From PS-side to the SSS-side (SRC DMA only)
+*	- From SSS-side to the PS-side (DST DMA only)
+*	- Simultaneous PS-side to SSS_side and SSS-side to the PS-side
+*
+* Initialization & Configuration
+*
+* The device driver enables higher layer software (e.g., an application) to
+* communicate to the CSU_DMA core.
+*
+* XCsuDma_CfgInitialize() API is used to initialize the CSU_DMA core.
+* The user needs to first call the XCsuDma_LookupConfig() API which returns
+* the Configuration structure pointer which is passed as a parameter to the
+* XCsuDma_CfgInitialize() API.
+*
+*  Interrupts 
+* This driver will not support handling of interrupts user should write handler
+* to handle the interrupts.
+*
+*  Virtual Memory 
+*
+* This driver supports Virtual Memory. The RTOS is responsible for calculating
+* the correct device base address in Virtual Memory space.
+*
+*  Threads 
+*
+* This driver is not thread safe. Any needs for threads or thread mutual
+* exclusion must be satisfied by the layer above this driver.
+*
+*  Asserts 
+*
+* Asserts are used within all Xilinx drivers to enforce constraints on argument
+* values. Asserts can be turned off on a system-wide basis by defining, at
+* compile time, the NDEBUG identifier. By default, asserts are turned on and it
+* is recommended that users leave asserts on during development.
+*
+*  Building the driver 
+*
+* The XCsuDma driver is composed of several source files. This allows the user
+* to build and link only those parts of the driver that are necessary.
+*
+* @file xcsudma.h
+* @addtogroup csudma_v1_2
+* @{
+* @details
+*
+* This header file contains identifiers and register-level driver functions (or
+* macros), range macros, structure typedefs that can be used to access the
+* Xilinx CSU_DMA core instance.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- -----------------------------------------------------
+* 1.0   vnsld   22/10/14 First release
+* 1.1   adk     10/05/16 Fixed CR#951040 race condition in the recv path when
+*                        source and destination points to the same buffer.
+*       ms      03/17/17 Added readme.txt file in examples folder for doxygen
+*                        generation.
+*       ms      04/10/17 Modified filename tag in xcsudma_selftest_example.c to
+*                        include the file in doxygen examples.
+* 1.2   adk     11/22/17 Added peripheral test app support for CSUDMA driver.
+*	adk	09/03/18 Added new API XCsuDma_64BitTransfer() useful for 64-bit
+*			 dma transfers through PMU processor(CR#996201).
+* 

+*
+******************************************************************************/
+
+#ifndef XCSUDMA_H_
+#define XCSUDMA_H_	/**< Prevent circular inclusions
+			  *  by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xcsudma_hw.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xil_cache.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name CSU_DMA Channels
+ * @{
+ */
+typedef enum {
+	XCSUDMA_SRC_CHANNEL = 0U,	/**< Source Channel of CSU_DMA */
+	XCSUDMA_DST_CHANNEL		/**< Destination Channel of CSU_DMA */
+}XCsuDma_Channel;
+/*@}*/
+
+/** @name CSU_DMA pause types
+ * @{
+ */
+typedef enum {
+	XCSUDMA_PAUSE_MEMORY,		/**< Pauses memory data transfer
+					  *  to/from CSU_DMA */
+	XCSUDMA_PAUSE_STREAM,		/**< Pauses stream data transfer
+					  *  to/from CSU_DMA */
+}XCsuDma_PauseType;
+
+/*@}*/
+
+
+/** @name Ranges of Size
+ * @{
+ */
+#define XCSUDMA_SIZE_MAX 0x07FFFFFF	/**< Maximum allowed no of words */
+
+/*@}*/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+*
+* This function resets the CSU_DMA core.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*		C-style signature:
+*		void XCsuDma_Reset()
+*
+******************************************************************************/
+#define XCsuDma_Reset()  \
+	Xil_Out32(((u32)(XCSU_BASEADDRESS) + (u32)(XCSU_DMA_RESET_OFFSET)), \
+				(u32)(XCSUDMA_RESET_SET_MASK)); \
+	Xil_Out32(((u32)(XCSU_BASEADDRESS) + (u32)(XCSU_DMA_RESET_OFFSET)), \
+					(u32)(XCSUDMA_RESET_UNSET_MASK));
+
+/*****************************************************************************/
+/**
+* This function will be in busy while loop until the data transfer is
+* completed.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+*		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+*
+* @return	None.
+*
+* @note		This function should be called after XCsuDma_Transfer in polled
+*		mode  to wait until the data gets transfered completely.
+*		C-style signature:
+*		void XCsuDma_WaitForDone(XCsuDma *InstancePtr,
+*						XCsuDma_Channel Channel)
+*
+******************************************************************************/
+#define XCsuDma_WaitForDone(InstancePtr,Channel) \
+		while((XCsuDma_ReadReg(((InstancePtr)->Config.BaseAddress), \
+			((u32)(XCSUDMA_I_STS_OFFSET) + \
+			((u32)(Channel) * (u32)(XCSUDMA_OFFSET_DIFF)))) & \
+		(u32)(XCSUDMA_IXR_DONE_MASK)) != (XCSUDMA_IXR_DONE_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function returns the number of completed SRC/DST DMA transfers that
+* have not been acknowledged by software based on the channel selection.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+*
+* @return	Count is number of completed DMA transfers but not acknowledged
+*		(Range is 0 to 7).
+*		- 000 - All finished transfers have been acknowledged.
+*		- Count - Count number of finished transfers are still
+*		outstanding.
+*
+* @note		None.
+*		C-style signature:
+*		u8 XCsuDma_GetDoneCount(XCsuDma *InstancePtr,
+*						XCsuDma_Channel Channel)
+*
+******************************************************************************/
+#define XCsuDma_GetDoneCount(InstancePtr, Channel)  \
+		((XCsuDma_ReadReg(((InstancePtr)->Config.BaseAddress), \
+			((u32)(XCSUDMA_STS_OFFSET) + \
+			((u32)(Channel) * (u32)(XCSUDMA_OFFSET_DIFF)))) & \
+			(u32)(XCSUDMA_STS_DONE_CNT_MASK)) >> \
+				(u32)(XCSUDMA_STS_DONE_CNT_SHIFT))
+
+/*****************************************************************************/
+/**
+*
+* This function returns the current SRC/DST FIFO level in 32 bit words of the
+* selected channel
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+*
+* @return	FIFO level. (Range is 0 to 128)
+*		- 0 Indicates empty
+*		- Any number 1 to 128 indicates the number of entries in FIFO.
+*
+* @note		None.
+*		C-style signature:
+*		u8 XCsuDma_GetFIFOLevel(XCsuDma *InstancePtr,
+*					XCsuDma_Channel Channel)
+*
+******************************************************************************/
+#define XCsuDma_GetFIFOLevel(InstancePtr, Channel)  \
+		((XCsuDma_ReadReg(((InstancePtr)->Config.BaseAddress), \
+			((u32)(XCSUDMA_STS_OFFSET) + \
+			((u32)(Channel) * (u32)(XCSUDMA_OFFSET_DIFF)))) & \
+			(u32)(XCSUDMA_STS_FIFO_LEVEL_MASK)) >> \
+					(u32)(XCSUDMA_STS_FIFO_LEVEL_SHIFT))
+
+/*****************************************************************************/
+/**
+*
+* This function returns the current number of read(src)/write(dst) outstanding
+* commands based on the type of channel selected.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+*
+* @return	Count of outstanding commands. (Range is 0 to 9).
+*
+* @note		None.
+*		C-style signature:
+*		u8 XCsuDma_GetWROutstandCount(XCsuDma *InstancePtr,
+*						XCsuDma_Channel Channel)
+*
+******************************************************************************/
+#define XCsuDma_GetWROutstandCount(InstancePtr, Channel)  \
+		((XCsuDma_ReadReg(((InstancePtr)->Config.BaseAddress), \
+				((u32)(XCSUDMA_STS_OFFSET) + \
+			((u32)(Channel) * (u32)(XCSUDMA_OFFSET_DIFF)))) & \
+			(u32)(XCUSDMA_STS_OUTSTDG_MASK)) >> \
+				(u32)(XCUSDMA_STS_OUTSTDG_SHIFT))
+
+/*****************************************************************************/
+/**
+*
+* This function returns the status of Channel either it is busy or not.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+* 		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+*
+* @return	Returns the current status of the core.
+*		- TRUE represents core is currently busy.
+*		- FALSE represents core is not involved in any transfers.
+*
+* @note		None.
+*		C-style signature:
+*		s32 XCsuDma_IsBusy(XCsuDma *InstancePtr, XCsuDma_Channel Channel)
+*
+******************************************************************************/
+
+#define XCsuDma_IsBusy(InstancePtr, Channel) \
+		((XCsuDma_ReadReg(((InstancePtr)->Config.BaseAddress), \
+					((u32)(XCSUDMA_STS_OFFSET) + \
+			((u32)(Channel) * (u32)(XCSUDMA_OFFSET_DIFF)))) & \
+		(u32)(XCSUDMA_STS_BUSY_MASK)) == (XCSUDMA_STS_BUSY_MASK)) ? \
+				(TRUE) : (FALSE)
+
+
+/**************************** Type Definitions *******************************/
+
+/**
+* This typedef contains configuration information for a CSU_DMA core.
+* Each CSU_DMA core should have a configuration structure associated.
+*/
+typedef struct {
+	u16 DeviceId;		/**< DeviceId is the unique ID of the
+				  *  device */
+	u32 BaseAddress;	/**< BaseAddress is the physical base address
+				  *  of the device's registers */
+} XCsuDma_Config;
+
+
+/******************************************************************************/
+/**
+*
+* The XCsuDma driver instance data structure. A pointer to an instance data
+* structure is passed around by functions to refer to a specific driver
+* instance.
+*/
+typedef struct {
+	XCsuDma_Config Config;		/**< Hardware configuration */
+	u32 IsReady;			/**< Device and the driver instance
+					  *  are initialized */
+}XCsuDma;
+
+
+/******************************************************************************/
+/**
+* This typedef contains all the configuration feilds which needs to be set
+* before the start of the data transfer. All these feilds of CSU_DMA can be
+* configured by using XCsuDma_SetConfig API.
+*/
+typedef struct {
+	u8 SssFifoThesh;	/**< SSS FIFO threshold value */
+	u8 ApbErr;		/**< ABP invalid access error */
+	u8 EndianType;		/**< Type of endianess */
+	u8 AxiBurstType;	/**< Type of AXI bus */
+	u32 TimeoutValue;	/**< Time out value */
+	u8 FifoThresh;		/**< FIFO threshold value */
+	u8 Acache;		/**< AXI CACHE selection */
+	u8 RouteBit;		/**< Selection of Route */
+	u8 TimeoutEn;		/**< Enable of time out counters */
+	u16 TimeoutPre;		/**< Pre scaler value */
+	u8 MaxOutCmds;		/**< Maximum number of outstanding
+				  *  commands */
+}XCsuDma_Configure;
+
+/*****************************************************************************/
+
+
+/************************** Function Prototypes ******************************/
+
+XCsuDma_Config *XCsuDma_LookupConfig(u16 DeviceId);
+
+s32 XCsuDma_CfgInitialize(XCsuDma *InstancePtr, XCsuDma_Config *CfgPtr,
+			u32 EffectiveAddr);
+void XCsuDma_Transfer(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+					UINTPTR Addr, u32 Size, u8 EnDataLast);
+void XCsuDma_64BitTransfer(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+			   u32 AddrLow, u32 AddrHigh, u32 Size, u8 EnDataLast);
+void XCsuDma_LoopBackTransfer(XCsuDma *InstancePtr, u64 SrcAddr, u64 DstAddr,
+						u32 Size);
+u64 XCsuDma_GetAddr(XCsuDma *InstancePtr, XCsuDma_Channel Channel);
+u32 XCsuDma_GetSize(XCsuDma *InstancePtr, XCsuDma_Channel Channel);
+
+void XCsuDma_Pause(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+						XCsuDma_PauseType Type);
+s32 XCsuDma_IsPaused(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+						XCsuDma_PauseType Type);
+void XCsuDma_Resume(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+						XCsuDma_PauseType Type);
+
+u32 XCsuDma_GetCheckSum(XCsuDma *InstancePtr);
+void XCsuDma_ClearCheckSum(XCsuDma *InstancePtr);
+
+void XCsuDma_SetConfig(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+					XCsuDma_Configure *ConfigurValues);
+void XCsuDma_GetConfig(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+					XCsuDma_Configure *ConfigurValues);
+void XCsuDma_ClearDoneCount(XCsuDma *InstancePtr, XCsuDma_Channel Channel);
+
+void XCsuDma_SetSafetyCheck(XCsuDma *InstancePtr, u32 Value);
+u32 XCsuDma_GetSafetyCheck(XCsuDma *InstancePtr);
+
+/* Interrupt related APIs */
+u32 XCsuDma_IntrGetStatus(XCsuDma *InstancePtr, XCsuDma_Channel Channel);
+void XCsuDma_IntrClear(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+								u32 Mask);
+void XCsuDma_EnableIntr(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+								u32 Mask);
+void XCsuDma_DisableIntr(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+								u32 Mask);
+u32 XCsuDma_GetIntrMask(XCsuDma *InstancePtr, XCsuDma_Channel Channel);
+
+s32 XCsuDma_SelfTest(XCsuDma *InstancePtr);
+
+/******************************************************************************/
+
+#ifdef __cplusplus
+}
+
+#endif
+
+#endif /* End of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_g.c b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_g.c
new file mode 100644
index 0000000..1251cdc
--- /dev/null
+++ b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_g.c
@@ -0,0 +1,55 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xcsudma.h"
+
+/*
+* The configuration table for devices
+*/
+
+XCsuDma_Config XCsuDma_ConfigTable[XPAR_XCSUDMA_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_CSUDMA_DEVICE_ID,
+		XPAR_PSU_CSUDMA_BASEADDR
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_hw.h b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_hw.h
new file mode 100644
index 0000000..031c134
--- /dev/null
+++ b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_hw.h
@@ -0,0 +1,311 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcsudma_hw.h
+* @addtogroup csudma_v1_2
+* @{
+*
+* This header file contains identifiers and register-level driver functions (or
+* macros) that can be used to access the Xilinx CSU_DMA core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ------------------------------------------------------
+* 1.0   vnsld  22/10/14 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XCSUDMA_HW_H_
+#define XCSUDMA_HW_H_	/**< Prevent circular inclusions
+			  *  by using protection macros	*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Registers offsets
+ * @{
+ */
+#define XCSUDMA_ADDR_OFFSET	0x000	/**< Address Register Offset */
+#define XCSUDMA_SIZE_OFFSET	0x004	/**< Size Register Offset */
+#define XCSUDMA_STS_OFFSET	0x008	/**< Status Register Offset */
+#define XCSUDMA_CTRL_OFFSET	0x00C	/**< Control Register Offset */
+#define XCSUDMA_CRC_OFFSET	0x010	/**< CheckSum Register Offset */
+#define XCSUDMA_I_STS_OFFSET	0x014	/**< Interrupt Status Register
+					  *  Offset */
+#define XCSUDMA_I_EN_OFFSET	0x018	/**< Interrupt Enable Register
+					  *  Offset */
+#define XCSUDMA_I_DIS_OFFSET	0x01C	/**< Interrupt Disable Register
+					  *  Offset */
+#define XCSUDMA_I_MASK_OFFSET	0x020	/**< Interrupt Mask Register Offset */
+#define XCSUDMA_CTRL2_OFFSET	0x024	/**< Interrupt Control Register 2
+					  *  Offset */
+#define XCSUDMA_ADDR_MSB_OFFSET	0x028	/**< Address's MSB Register Offset */
+#define XCSUDMA_SAFETY_CHK_OFFSET 0xFF8	/**< Safety Check Field Offset */
+#define XCSUDMA_FUTURE_ECO_OFFSET 0xFFC	/**< Future potential ECO Offset */
+/*@}*/
+
+/** @name CSU Base address and CSU_DMA reset offset
+ * @{
+ */
+#define XCSU_BASEADDRESS	0xFFCA0000
+						/**< CSU Base Address */
+#define XCSU_DMA_RESET_OFFSET	0x0000000CU	/**< CSU_DMA Reset offset */
+/*@}*/
+
+/** @name CSU_DMA Reset register bit masks
+ * @{
+ */
+#define XCSUDMA_RESET_SET_MASK		0x00000001U	/**< Reset set mask */
+#define XCSUDMA_RESET_UNSET_MASK	0x00000000U	/**< Reset unset mask*/
+/*@}*/
+
+/** @name Offset difference for Source and destination
+ * @{
+ */
+#define XCSUDMA_OFFSET_DIFF	0x00000800U	/**< Offset difference for
+						  *  source and
+						  *  destination channels */
+/*@}*/
+
+/** @name Address register bit masks
+ * @{
+ */
+#define XCSUDMA_ADDR_MASK	0xFFFFFFFCU	/**< Address mask */
+#define XCSUDMA_ADDR_LSB_MASK	0x00000003U	/**< Address alignment check
+						  *  mask */
+/*@}*/
+
+/** @name Size register bit masks and shifts
+ * @{
+ */
+#define XCSUDMA_SIZE_MASK	0x1FFFFFFCU	/**< Mask for size */
+#define XCSUDMA_LAST_WORD_MASK	0x00000001U	/**< Last word check bit mask*/
+#define XCSUDMA_SIZE_SHIFT	2U		/**< Shift for size */
+/*@}*/
+
+/** @name Status register bit masks and shifts
+ * @{
+ */
+#define XCSUDMA_STS_DONE_CNT_MASK	0x0000E000U	/**< Count done mask */
+#define XCSUDMA_STS_FIFO_LEVEL_MASK	0x00001FE0U	/**< FIFO level mask */
+#define XCUSDMA_STS_OUTSTDG_MASK	0x0000001EU	/**< No.of outstanding
+							  *  read/write
+							  *  commands mask */
+#define XCSUDMA_STS_BUSY_MASK		0x00000001U	/**< Busy mask */
+#define XCSUDMA_STS_DONE_CNT_SHIFT	13U		/**< Shift for Count
+							  *  done */
+#define XCSUDMA_STS_FIFO_LEVEL_SHIFT	5U		/**< Shift for FIFO
+							  *  level */
+#define XCUSDMA_STS_OUTSTDG_SHIFT	1U		/**< Shift for No.of
+							  *  outstanding
+							  *  read/write
+							  *  commands */
+/*@}*/
+
+/** @name Control register bit masks and shifts
+ * @{
+ */
+#define XCSUDMA_CTRL_SSS_FIFOTHRESH_MASK 0xFE000000U	/**< SSS FIFO threshold
+							  *  value mask */
+#define XCSUDMA_CTRL_APB_ERR_MASK	0x01000000U	/**< APB register
+							  *  access error
+							  *  mask */
+#define XCSUDMA_CTRL_ENDIAN_MASK	0x00800000U	/**< Endianess mask */
+#define XCSUDMA_CTRL_BURST_MASK		0x00400000U	/**< AXI burst type
+							  *  mask */
+#define XCSUDMA_CTRL_TIMEOUT_MASK	0x003FFC00U	/**< Time out value
+							  *  mask */
+#define XCSUDMA_CTRL_FIFO_THRESH_MASK	0x000003FCU	/**< FIFO threshold
+							  *  mask */
+#define XCSUDMA_CTRL_PAUSE_MEM_MASK	0x00000001U	/**< Memory pause
+							  *  mask */
+#define XCSUDMA_CTRL_PAUSE_STRM_MASK	0x00000002U	/**< Stream pause
+							  *  mask */
+#define XCSUDMA_CTRL_SSS_FIFOTHRESH_SHIFT 25U		/**< SSS FIFO threshold
+							  *  shift */
+#define XCSUDMA_CTRL_APB_ERR_SHIFT	24U		/**< APB error shift */
+#define XCSUDMA_CTRL_ENDIAN_SHIFT	23U		/**< Endianess shift */
+#define XCSUDMA_CTRL_BURST_SHIFT	22U		/**< AXI burst type
+							  *  shift */
+#define XCSUDMA_CTRL_TIMEOUT_SHIFT	10U		/**< Time out value
+							  *  shift */
+#define XCSUDMA_CTRL_FIFO_THRESH_SHIFT	2U		/**< FIFO thresh
+							  *  shift */
+/*@}*/
+
+/** @name CheckSum register bit masks
+ * @{
+ */
+#define XCSUDMA_CRC_RESET_MASK		0x00000000U	/**< Mask to reset
+							  *  value of
+							  *  check sum */
+/*@}*/
+
+/** @name Interrupt Enable/Disable/Mask/Status registers bit masks
+ * @{
+ */
+#define XCSUDMA_IXR_FIFO_OVERFLOW_MASK	0x00000001U	/**< FIFO overflow
+							  *  mask, it is valid
+							  *  only to Destination
+							  *  Channel */
+#define XCSUDMA_IXR_INVALID_APB_MASK	0x00000040U	/**< Invalid APB access
+							  *  mask */
+#define XCSUDMA_IXR_FIFO_THRESHHIT_MASK	0x00000020U	/**< FIFO threshold hit
+							  *  indicator mask */
+#define XCSUDMA_IXR_TIMEOUT_MEM_MASK	0x00000010U	/**< Time out counter
+							  *  expired to access
+							  *  memory mask */
+#define XCSUDMA_IXR_TIMEOUT_STRM_MASK	0x00000008U	/**< Time out counter
+							  *  expired to access
+							  *  stream mask */
+#define XCSUDMA_IXR_AXI_WRERR_MASK	0x00000004U	/**< AXI Read/Write
+							  *  error mask */
+#define XCSUDMA_IXR_DONE_MASK		0x00000002U	/**< Done mask */
+#define XCSUDMA_IXR_MEM_DONE_MASK	0x00000001U	/**< Memory done
+							  *  mask, it is valid
+							  *  only for source
+							  *  channel*/
+#define XCSUDMA_IXR_SRC_MASK		0x0000007FU
+					/**< ((XCSUDMA_IXR_INVALID_APB_MASK)|
+					(XCSUDMA_IXR_FIFO_THRESHHIT_MASK) |
+					(XCSUDMA_IXR_TIMEOUT_MEM_MASK) |
+					(XCSUDMA_IXR_TIMEOUT_STRM_MASK) |
+					(XCSUDMA_IXR_AXI_WRERR_MASK) |
+					(XCSUDMA_IXR_DONE_MASK) |
+					(XCSUDMA_IXR_MEM_DONE_MASK)) */
+					/**< All interrupt mask
+					  *  for source */
+#define XCSUDMA_IXR_DST_MASK		0x000000FEU
+					/**< ((XCSUDMA_IXR_FIFO_OVERFLOW_MASK) |
+					(XCSUDMA_IXR_INVALID_APB_MASK) |
+					(XCSUDMA_IXR_FIFO_THRESHHIT_MASK) |
+					(XCSUDMA_IXR_TIMEOUT_MEM_MASK) |
+					(XCSUDMA_IXR_TIMEOUT_STRM_MASK) |
+					(XCSUDMA_IXR_AXI_WRERR_MASK) |
+					(XCSUDMA_IXR_DONE_MASK)) */
+					/**< All interrupt mask
+					  *  for destination */
+/*@}*/
+
+/** @name Control register 2 bit masks and shifts
+ * @{
+ */
+#define XCSUDMA_CTRL2_RESERVED_MASK	0x083F0000U	/**< Reserved bits
+							  *  mask */
+#define XCSUDMA_CTRL2_ACACHE_MASK	0X07000000U	/**< AXI CACHE mask */
+#define XCSUDMA_CTRL2_ROUTE_MASK	0x00800000U	/**< Route mask */
+#define XCSUDMA_CTRL2_TIMEOUT_EN_MASK	0x00400000U	/**< Time out counters
+							  *  enable mask */
+#define XCSUDMA_CTRL2_TIMEOUT_PRE_MASK	0x0000FFF0U	/**< Time out pre
+							  *  mask */
+#define XCSUDMA_CTRL2_MAXCMDS_MASK	0x0000000FU	/**< Maximum commands
+							  *  mask */
+#define XCSUDMA_CTRL2_RESET_MASK	0x0000FFF8U	/**< Reset mask */
+#define XCSUDMA_CTRL2_ACACHE_SHIFT	24U		/**< Shift for
+							  *  AXI R/W CACHE */
+#define XCSUDMA_CTRL2_ROUTE_SHIFT	23U		/**< Shift for route */
+#define XCSUDMA_CTRL2_TIMEOUT_EN_SHIFT	22U		/**< Shift for Timeout
+							  *  enable feild */
+#define XCSUDMA_CTRL2_TIMEOUT_PRE_SHIFT	4U		/**< Shift for Timeout
+							  *  pre feild */
+/*@}*/
+
+/** @name MSB Address register bit masks and shifts
+ * @{
+ */
+#define XCSUDMA_MSB_ADDR_MASK	0x0001FFFFU	/**< MSB bits of address
+						  *  mask */
+#define XCSUDMA_MSB_ADDR_SHIFT	32U		/**< Shift for MSB bits of
+						  *  address */
+/*@}*/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XCsuDma_In32		Xil_In32	/**< Input operation */
+#define XCsuDma_Out32		Xil_Out32	/**< Output operation */
+
+/*****************************************************************************/
+/**
+*
+* This macro reads the given register.
+*
+* @param	BaseAddress is the Xilinx base address of the CSU_DMA core.
+* @param	RegOffset is the register offset of the register.
+*
+* @return	The 32-bit value of the register.
+*
+* @note		C-style signature:
+*		u32 XCsuDma_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+******************************************************************************/
+#define XCsuDma_ReadReg(BaseAddress, RegOffset) \
+		XCsuDma_In32((BaseAddress) + (u32)(RegOffset))
+
+/*****************************************************************************/
+/**
+*
+* This macro writes the value into the given register.
+*
+* @param	BaseAddress is the Xilinx base address of the CSU_DMA core.
+* @param	RegOffset is the register offset of the register.
+* @param	Data is the 32-bit value to write to the register.
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XCsuDma_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+******************************************************************************/
+#define XCsuDma_WriteReg(BaseAddress, RegOffset, Data) \
+		XCsuDma_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data))
+
+
+#ifdef __cplusplus
+}
+
+#endif
+
+
+#endif /* End of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_intr.c b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_intr.c
new file mode 100644
index 0000000..b45d6cf
--- /dev/null
+++ b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_intr.c
@@ -0,0 +1,274 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xcsudma_intr.c
+* @addtogroup csudma_v1_2
+* @{
+*
+* This file contains interrupt related functions of Xilinx CSU_DMA core.
+* Please see xcsudma.h for more details of the driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ---------------------------------------------------
+* 1.0   vnsld  22/10/14  First release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xcsudma.h"
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Function Definitions *****************************/
+
+
+/*****************************************************************************/
+/**
+*
+* This function returns interrupt status read from Interrupt Status Register.
+* Use the XCSUDMA_IXR_*_MASK constants defined in xcsudma_hw.h to interpret the
+* returned value.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+*		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+*
+* @return	The pending interrupts of the CSU_DMA. Use th following masks
+*		to interpret the returned value.
+*		XCSUDMA_IXR_SRC_MASK   - For Source channel
+*		XCSUDMA_IXR_DST_MASK   - For Destination channel
+*
+* @note		None.
+*
+******************************************************************************/
+u32 XCsuDma_IntrGetStatus(XCsuDma *InstancePtr, XCsuDma_Channel Channel)
+{
+	u32 Data;
+
+	/* Verify arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+				(Channel == (XCSUDMA_DST_CHANNEL)));
+
+	Data = XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+				(u32)(XCSUDMA_I_STS_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF)));
+
+	return Data;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function clears interrupt(s). Every bit set in Interrupt Status
+* Register indicates that a specific type of interrupt is occurring, and this
+* function clears one or more interrupts by writing a bit mask to Interrupt
+* Clear Register.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+*		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+* @param	Mask is the mask to clear. Bit positions of 1 will be cleared.
+*		Bit positions of 0 will not change the previous interrupt
+*		status. This mask is formed by OR'ing XCSUDMA_IXR_* bits
+*		defined in xcsudma_hw.h.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCsuDma_IntrClear(XCsuDma *InstancePtr, XCsuDma_Channel Channel, u32 Mask)
+{
+
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+				(Channel == (XCSUDMA_DST_CHANNEL)));
+	if (Channel == (XCSUDMA_SRC_CHANNEL)) {
+		XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+			(u32)(XCSUDMA_I_STS_OFFSET),
+				(Mask & (u32)(XCSUDMA_IXR_SRC_MASK)));
+	}
+	else {
+		XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_I_STS_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))),
+				(Mask & (u32)(XCSUDMA_IXR_DST_MASK)));
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function enables the interrupt(s). Use the XCSUDMA_IXR_*_MASK constants
+* defined in xcsudma_hw.h to create the bit-mask to enable interrupts.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+*		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+* @param	Mask contains interrupts to be enabled.
+*		- Bit positions of 1 will be enabled.
+*		This mask is formed by OR'ing XCSUDMA_IXR_*_MASK bits defined
+*		in xcsudma_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCsuDma_EnableIntr(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+							u32 Mask)
+{
+	u32 Data;
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+				(Channel == (XCSUDMA_DST_CHANNEL)));
+
+	if (Channel == (XCSUDMA_SRC_CHANNEL)) {
+		Data = Mask & (u32)(XCSUDMA_IXR_SRC_MASK);
+	}
+	else {
+		Data = Mask & (u32)(XCSUDMA_IXR_DST_MASK);
+	}
+	/*
+	 * Write the mask to the IER Register
+	 */
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+		((u32)(XCSUDMA_I_EN_OFFSET) +
+		((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))), Data);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function disables the interrupt(s). Use the XCSUDMA_IXR_*_MASK constants
+* defined in xcsudma_hw.h to create the bit-mask to disable interrupts.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+*		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+* @param	Mask contains interrupts to be disabled.
+*		- Bit positions of 1 will be disabled.
+*		This mask is formed by OR'ing XCSUDMA_IXR_*_MASK bits defined
+*		in xcsudma_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XCsuDma_DisableIntr(XCsuDma *InstancePtr, XCsuDma_Channel Channel,
+								u32 Mask)
+{
+	u32 Data;
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+			(Channel == (XCSUDMA_DST_CHANNEL)));
+
+	if (Channel == XCSUDMA_SRC_CHANNEL) {
+		Data = (Mask) & (u32)(XCSUDMA_IXR_SRC_MASK);
+	}
+	else {
+		Data = (Mask) & (u32)(XCSUDMA_IXR_DST_MASK);
+	}
+
+	/*
+	 * Write the mask to the IDR Register
+	 */
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+		((u32)(XCSUDMA_I_DIS_OFFSET) +
+		((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF))), Data);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns the interrupt mask to know which interrupts are
+* enabled and which of them were disaled.
+*
+* @param	InstancePtr is a pointer to XCsuDma instance to be worked on.
+* @param	Channel represents the type of channel either it is Source or
+*		Destination.
+*		Source channel      - XCSUDMA_SRC_CHANNEL
+*		Destination Channel - XCSUDMA_DST_CHANNEL
+*
+* @return	The current interrupt mask. The mask indicates which interrupts
+*		are enabled/disabled.
+*		0 bit represents .....corresponding interrupt is enabled.
+*		1 bit represents .....Corresponding interrupt is disabled.
+*		To interpret returned mask use
+*		XCSUDMA_IXR_SRC_MASK........For source channel
+*		XCSUDMA_IXR_DST_MASK........For destination channel
+*
+* @note		None.
+*
+******************************************************************************/
+u32 XCsuDma_GetIntrMask(XCsuDma *InstancePtr, XCsuDma_Channel Channel)
+{
+
+	/* Verify arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Channel == (XCSUDMA_SRC_CHANNEL)) ||
+					(Channel == (XCSUDMA_DST_CHANNEL)));
+
+	/*
+	 * Read the Interrupt Mask register
+	 */
+	return (XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+			((u32)(XCSUDMA_I_MASK_OFFSET) +
+			((u32)Channel * (u32)(XCSUDMA_OFFSET_DIFF)))));
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_selftest.c b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_selftest.c
new file mode 100644
index 0000000..00f35e1
--- /dev/null
+++ b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_selftest.c
@@ -0,0 +1,125 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xcsudma_selftest.c
+* @addtogroup csudma_v1_2
+* @{
+*
+* This file contains a diagnostic self-test function for the CSU_DMA driver.
+* Refer to the header file xcsudma.h for more detailed information.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ---------------------------------------------------
+* 1.0   vnsld   22/10/14 First release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xcsudma.h"
+
+/************************** Constant Definitions ****************************/
+
+
+/**************************** Type Definitions ******************************/
+
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+
+/************************** Variable Definitions ****************************/
+
+
+/************************** Function Prototypes *****************************/
+
+
+/************************** Function Definitions *****************************/
+
+
+/*****************************************************************************/
+/**
+*
+* This function runs a self-test on the driver and hardware device. Performs
+* reset of both source and destination channels and checks if reset is working
+* properly or not.
+*
+* @param	InstancePtr is a pointer to the XCsuDma instance.
+*
+* @return
+*		- XST_SUCCESS if the self-test passed.
+* 		- XST_FAILURE otherwise.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XCsuDma_SelfTest(XCsuDma *InstancePtr)
+{
+	u32 Data;
+	s32 Status;
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	Data = XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+					(u32)(XCSUDMA_CTRL_OFFSET));
+
+	/* Changing Endianess of Source channel */
+
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+			(u32)(XCSUDMA_CTRL_OFFSET),
+			((Data) | (u32)(XCSUDMA_CTRL_ENDIAN_MASK)));
+
+	if ((XCsuDma_ReadReg(InstancePtr->Config.BaseAddress,
+		(u32)(XCSUDMA_CTRL_OFFSET)) &
+			(u32)(XCSUDMA_CTRL_ENDIAN_MASK)) ==
+				(XCSUDMA_CTRL_ENDIAN_MASK)) {
+		Status = (s32)(XST_SUCCESS);
+	}
+	else {
+		Status = (s32)(XST_FAILURE);
+	}
+
+	/* Changes made are being reverted back */
+	XCsuDma_WriteReg(InstancePtr->Config.BaseAddress,
+				(u32)(XCSUDMA_CTRL_OFFSET), Data);
+
+	return Status;
+
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_sinit.c b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_sinit.c
new file mode 100644
index 0000000..be962e2
--- /dev/null
+++ b/src/Xilinx/libsrc/csudma_v1_2/src/xcsudma_sinit.c
@@ -0,0 +1,107 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xcsudma_sinit.c
+* @addtogroup csudma_v1_2
+* @{
+*
+* This file contains static initialization methods for Xilinx CSU_DMA core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ---------------------------------------------------
+* 1.0   vnsld   22/10/14 First release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xcsudma.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/************************** Function Definitions *****************************/
+
+/*****************************************************************************/
+/**
+*
+* XCsuDma_LookupConfig returns a reference to an XCsuDma_Config structure
+* based on the unique device id, DeviceId. The return value will refer
+* to an entry in the device configuration table defined in the xcsudma_g.c
+* file.
+*
+* @param	DeviceId is the unique device ID of the device for the lookup
+*		operation.
+*
+* @return	CfgPtr is a reference to a config record in the configuration
+*		table (in xcsudma_g.c) corresponding to DeviceId, or
+*		NULL if no match is found.
+*
+* @note		None.
+******************************************************************************/
+XCsuDma_Config *XCsuDma_LookupConfig(u16 DeviceId)
+{
+	extern XCsuDma_Config XCsuDma_ConfigTable[XPAR_XCSUDMA_NUM_INSTANCES];
+	XCsuDma_Config *CfgPtr = NULL;
+	u32 Index;
+
+	/* Checks all the instances */
+	for (Index = (u32)0x0; Index < (u32)(XPAR_XCSUDMA_NUM_INSTANCES);
+								Index++) {
+		if (XCsuDma_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XCsuDma_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XCsuDma_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/ddrcpsu_v1_1/src/Makefile b/src/Xilinx/libsrc/ddrcpsu_v1_1/src/Makefile
new file mode 100644
index 0000000..198637a
--- /dev/null
+++ b/src/Xilinx/libsrc/ddrcpsu_v1_1/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xddrcpsu_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling ddrcpsu"
+
+xddrcpsu_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xddrcpsu_includes
+
+xddrcpsu_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/ddrcpsu_v1_1/src/xddrcpsu.h b/src/Xilinx/libsrc/ddrcpsu_v1_1/src/xddrcpsu.h
new file mode 100644
index 0000000..412f335
--- /dev/null
+++ b/src/Xilinx/libsrc/ddrcpsu_v1_1/src/xddrcpsu.h
@@ -0,0 +1,65 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xddcrpsu.h
+ * @addtogroup ddrcpsu_v1_1
+ * @{
+ * @details
+ *
+ * The Xilinx DdrcPsu driver. This driver supports the Xilinx ddrcpsu
+ * IP core.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0	ssc   04/28/16 First Release.
+ * 1.1  adk   04/08/16 Export DDR freq to xparameters.h file.
+ *
+ * 

+ *
+*******************************************************************************/
+
+#ifndef XDDRCPS_H_
+/* Prevent circular inclusions by using protection macros. */
+#define XDDRCPS_H_
+
+/******************************* Include Files ********************************/
+
+
+#endif /* XDDRCPS_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/dpdma_v1_0/src/Makefile b/src/Xilinx/libsrc/dpdma_v1_0/src/Makefile
new file mode 100644
index 0000000..f5944f9
--- /dev/null
+++ b/src/Xilinx/libsrc/dpdma_v1_0/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner dpdma_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling dpdma"
+
+dpdma_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: dpdma_includes
+
+dpdma_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma.c b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma.c
new file mode 100644
index 0000000..92eaad2
--- /dev/null
+++ b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma.c
@@ -0,0 +1,966 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+
+*******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * @file xdpdma.c
+ *
+ * This file contains the implementation of the interface functions of the
+ * XDpDma driver. Refer to xdpdma.h for detailed information.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver	Who   Date     Changes
+ * ---- ----- -------- ----------------------------------------------------
+ * 1.0  aad   04/12/16 Initial release.
+ *
+ *****************************************************************************/
+
+/***************************** Include Files **********************************/
+#include "xdpdma.h"
+#include "xavbuf.h"
+
+/************************** Constant Definitions ******************************/
+#define XDPDMA_CH_OFFSET		0x100
+#define XDPDMA_WAIT_TIMEOUT		10000
+
+#define XDPDMA_AUDIO_ALIGNMENT		128
+
+#define XDPDMA_VIDEO_CHANNEL0		0
+#define XDPDMA_VIDEO_CHANNEL1		1
+#define XDPDMA_VIDEO_CHANNEL2		2
+#define XDPDMA_GRAPHICS_CHANNEL		3
+#define XDPDMA_AUDIO_CHANNEL0		4
+#define XDPDMA_AUDIO_CHANNEL1		5
+
+#define XDPDMA_DESC_PREAMBLE		0xA5
+#define XDPDMA_DESC_IGNR_DONE		0x400
+#define XDPDMA_DESC_UPDATE		0x200
+#define XDPDMA_DESC_COMP_INTR		0x100
+#define XDPDMA_DESC_LAST_FRAME		0x200000
+#define XDPDMA_DESC_DONE_SHIFT		31
+#define XDPDMA_QOS_MIN			4
+#define XDPDMA_QOS_MAX			11
+
+/*************************************************************************/
+/**
+ *
+ * This function returns the number of outstanding transactions on a given
+ * channel.
+ *
+ * @param    InstancePtr is a pointer to the driver instance.
+ * @param    ChannelNum is the channel number on which the operation is
+ *	     being carried out.
+ *
+ * @return   Number of pending transactions.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+static int XDpDma_GetPendingTransaction(XDpDma *InstancePtr, u32 ChannelNum)
+{
+	u32 RegVal;
+	RegVal = XDpDma_ReadReg(InstancePtr->Config.BaseAddr,
+				XDPDMA_CH0_STATUS + 0x100 * ChannelNum);
+	return (RegVal & XDPDMA_CH_STATUS_OTRAN_CNT_MASK);
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function waits until the outstanding transactions are completed.
+ *
+ * @param    InstancePtr is a pointer to the driver instance.
+ * @param    ChannelNum is the channel number on which the operation is
+ *	     being carried out.
+ *
+ * @return   XST_SUCCESS when all the pending transactions are complete
+ *	     before timeout.
+ *	     XST_FAILURE if timeout occurs before pending transactions are
+ *	     completed.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+static int XDpDma_WaitPendingTransaction(XDpDma *InstancePtr, u8 ChannelNum)
+{
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ChannelNum <= XDPDMA_AUDIO_CHANNEL1);
+
+	u32 Timeout = 0;
+	u32 Count;
+	do {
+		Count = XDpDma_GetPendingTransaction(InstancePtr, ChannelNum);
+		Timeout++;
+	} while((Timeout != XDPDMA_WAIT_TIMEOUT) && Count);
+
+	if(Timeout ==  XDPDMA_WAIT_TIMEOUT) {
+		return XST_FAILURE;
+	}
+
+	return XST_SUCCESS;
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function controls the hardware channels of the DPDMA.
+ *
+ *
+ * @param    InstancePtr is a pointer to the driver instance.
+ * @param    ChannelNum is the physical channel number of the DPDMA.
+ * @param    ChannelState is an enum of type XDpDma_ChannelState.
+ *
+ * @return   XST_SUCCESS when the mentioned channel is enabled successfully.
+ *	     XST_FAILURE when the mentioned channel fails to be enabled.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+static int XDpDma_ConfigChannelState(XDpDma *InstancePtr, u8 ChannelNum,
+				     XDpDma_ChannelState Enable)
+{
+	u32 Mask = 0;
+	u32 RegVal = 0;
+	u32 Status = 0;
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ChannelNum <= XDPDMA_AUDIO_CHANNEL1);
+
+	Mask = XDPDMA_CH_CNTL_EN_MASK | XDPDMA_CH_CNTL_PAUSE_MASK;
+	switch(Enable) {
+		case XDPDMA_ENABLE:
+			RegVal = XDPDMA_CH_CNTL_EN_MASK;
+			break;
+		case XDPDMA_DISABLE:
+			XDpDma_ConfigChannelState(InstancePtr, ChannelNum,
+						  XDPDMA_PAUSE);
+			Status = XDpDma_WaitPendingTransaction(InstancePtr,
+							       ChannelNum);
+			if(Status == XST_FAILURE) {
+				return XST_FAILURE;
+			}
+
+			RegVal = XDPDMA_DISABLE;
+			Mask = XDPDMA_CH_CNTL_EN_MASK;
+			break;
+		case XDPDMA_IDLE:
+			Status = XDpDma_ConfigChannelState(InstancePtr,
+							   ChannelNum,
+							   XDPDMA_DISABLE);
+			if(Status == XST_FAILURE) {
+				return XST_FAILURE;
+			}
+
+			RegVal = 0;
+			break;
+		case XDPDMA_PAUSE:
+			RegVal = XDPDMA_PAUSE;
+			break;
+	}
+	XDpDma_ReadModifyWrite(InstancePtr->Config.BaseAddr,
+			       XDPDMA_CH0_CNTL + XDPDMA_CH_OFFSET * ChannelNum,
+			       RegVal, Mask);
+	return XST_SUCCESS;
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function updates the descriptor that is not currently active on a
+ * Video/Graphics channel.
+ *
+ * @param    InstancePtr is a pointer to the driver instance.
+ * @param    Channel is a pointer to the channel on which the operation is
+ *	     to be carried out.
+ *
+ * @return   Descriptor for next operation.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+static XDpDma_Descriptor *XDpDma_UpdateVideoDescriptor(XDpDma_Channel *Channel)
+{
+	if(Channel->Current == NULL) {
+		Channel->Current = &Channel->Descriptor0;
+	}
+	else if(Channel->Current == &Channel->Descriptor0) {
+		Channel->Current = &Channel->Descriptor1;
+	}
+	else if(Channel->Current == &Channel->Descriptor1) {
+		Channel->Current = &Channel->Descriptor0;
+	}
+	return Channel->Current;
+}
+
+/*************************************************************************/
+/**
+ * This function programs the address of the descriptor about to be active
+ *
+ * @param    InstancePtr is a pointer to the DPDMA instance.
+ * @param    Channel is an enum of the channel for which the descriptor
+ *	     address is to be set.
+ *
+ * @return   Descriptor for next operation.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+static void XDpDma_SetDescriptorAddress(XDpDma *InstancePtr, u8 ChannelNum)
+{
+	u32 AddrOffset;
+	u32 AddrEOffset;
+	Xil_AssertVoid(ChannelNum <= XDPDMA_AUDIO_CHANNEL1);
+	AddrOffset = XDPDMA_CH0_DSCR_STRT_ADDR +
+					(XDPDMA_CH_OFFSET * ChannelNum);
+	AddrEOffset = XDPDMA_CH0_DSCR_STRT_ADDRE +
+					(XDPDMA_CH_OFFSET * ChannelNum);
+
+	XDpDma_Descriptor *Descriptor = NULL;
+	switch(ChannelNum) {
+	case XDPDMA_VIDEO_CHANNEL0:
+		Descriptor = InstancePtr->Video.Channel[ChannelNum].Current;
+		break;
+	case XDPDMA_VIDEO_CHANNEL1:
+		Descriptor = InstancePtr->Video.Channel[ChannelNum].Current;
+		break;
+	case XDPDMA_VIDEO_CHANNEL2:
+		Descriptor = InstancePtr->Video.Channel[ChannelNum].Current;
+		break;
+	case XDPDMA_GRAPHICS_CHANNEL:
+		Descriptor = InstancePtr->Gfx.Channel.Current;
+		break;
+	case XDPDMA_AUDIO_CHANNEL0:
+		Descriptor = InstancePtr->Audio[0].Current;
+		break;
+	case XDPDMA_AUDIO_CHANNEL1:
+		Descriptor = InstancePtr->Audio[1].Current;
+		break;
+	}
+
+	XDpDma_WriteReg(InstancePtr->Config.BaseAddr, AddrEOffset,
+			(INTPTR) Descriptor >> 32);
+	XDpDma_WriteReg(InstancePtr->Config.BaseAddr, AddrOffset,
+			(INTPTR) Descriptor);
+}
+
+/*************************************************************************/
+/**
+ *
+ * This functions sets the Audio Descriptor for Data Transfer.
+ *
+ * @param    CurrDesc is a pointer to the descriptor to be initialized
+ * @param    DataSize is the payload size of the buffer to be transferred
+ * @param    BuffAddr is the payload address
+ *
+ * @return   None.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+static void XDpDma_SetupAudioDescriptor(XDpDma_Descriptor *CurrDesc,
+					u64 DataSize, u64 BuffAddr,
+					XDpDma_Descriptor *NextDesc)
+{
+	Xil_AssertVoid(CurrDesc != NULL);
+	Xil_AssertVoid(DataSize != 0);
+	Xil_AssertVoid(BuffAddr != 0);
+
+	if(NextDesc == NULL) {
+		CurrDesc->Control = XDPDMA_DESC_PREAMBLE |
+			XDPDMA_DESC_UPDATE | XDPDMA_DESC_IGNR_DONE |
+			XDPDMA_DESC_COMP_INTR;
+
+	}
+	else {
+		CurrDesc->Control = XDPDMA_DESC_PREAMBLE |
+			XDPDMA_DESC_UPDATE | XDPDMA_DESC_IGNR_DONE;
+	}
+	CurrDesc->DSCR_ID = 0;
+	CurrDesc->XFER_SIZE = DataSize;
+	CurrDesc->LINE_SIZE_STRIDE = 0;
+	CurrDesc->LSB_Timestamp = 0;
+	CurrDesc->MSB_Timestamp = 0;
+	CurrDesc->ADDR_EXT = ((BuffAddr >> XDPDMA_DESCRIPTOR_SRC_ADDR_WIDTH) <<
+			      XDPDMA_DESCRIPTOR_ADDR_EXT_SRC_ADDR_EXT_SHIFT) |
+			     ((INTPTR) NextDesc >>
+			      XDPDMA_DESCRIPTOR_NEXT_DESR_WIDTH);
+	CurrDesc->NEXT_DESR = (INTPTR) NextDesc;
+	CurrDesc->SRC_ADDR =  BuffAddr;
+}
+
+/*************************************************************************/
+/**
+ *
+ * This functions retrieves the configuration for this DPDMA driver and
+ * fills in the InstancePtr->Config structure.
+ *
+ * @param    InstancePtr is a pointer to the driver instance.
+ * @param    ConfigPtr is a pointer to the configuration structure that will
+ *           be used to copy the settings from.
+ *
+ * @return   None.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+void XDpDma_CfgInitialize(XDpDma *InstancePtr, XDpDma_Config *CfgPtr)
+{
+	InstancePtr->Config.DeviceId = CfgPtr->DeviceId;
+	InstancePtr->Config.BaseAddr = CfgPtr->BaseAddr;
+
+	InstancePtr->Video.Channel[XDPDMA_VIDEO_CHANNEL0].Current = NULL;
+	InstancePtr->Video.Channel[XDPDMA_VIDEO_CHANNEL1].Current = NULL;
+	InstancePtr->Video.Channel[XDPDMA_VIDEO_CHANNEL2].Current = NULL;
+	InstancePtr->Video.TriggerStatus = XDPDMA_TRIGGER_DONE;
+	InstancePtr->Video.VideoInfo = NULL;
+	InstancePtr->Video.FrameBuffer[XDPDMA_VIDEO_CHANNEL0] = NULL;
+	InstancePtr->Video.FrameBuffer[XDPDMA_VIDEO_CHANNEL1] = NULL;
+	InstancePtr->Video.FrameBuffer[XDPDMA_VIDEO_CHANNEL2] = NULL;
+
+	InstancePtr->Gfx.Channel.Current = NULL;
+	InstancePtr->Gfx.TriggerStatus = XDPDMA_TRIGGER_DONE;
+	InstancePtr->Gfx.VideoInfo = NULL;
+	InstancePtr->Gfx.FrameBuffer = NULL;
+}
+
+/*************************************************************************/
+/**
+ *
+ * This functions controls the states in which a channel should go into.
+ *
+ * @param    InstancePtr is a pointer to the driver instance.
+ * @param    ChannelType is an enum of XDpDma_ChannelType.
+ * @param    ChannelState is an enum of type XDpDma_ChannelState.
+ *
+ * @return   XST_SUCCESS when the mentioned channel is enabled successfully.
+ *	     XST_FAILURE when the mentioned channel fails to be enabled.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+int XDpDma_SetChannelState(XDpDma *InstancePtr, XDpDma_ChannelType Channel,
+					XDpDma_ChannelState ChannelState)
+{
+	u32 Index = 0;
+	u32 NumPlanes = 0;
+	u32 Status = 0;
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	switch(Channel) {
+	case VideoChan:
+		if(InstancePtr->Video.VideoInfo == NULL) {
+			return XST_FAILURE;
+		}
+		else {
+			NumPlanes = InstancePtr->Video.VideoInfo->Mode;
+			for(Index = 0; Index <= NumPlanes; Index++) {
+				Status = XDpDma_ConfigChannelState(InstancePtr,
+								Index,
+								ChannelState);
+				if(Status == XST_FAILURE) {
+					return XST_FAILURE;
+				}
+			}
+		}
+		break;
+	case GraphicsChan:
+		if(InstancePtr->Gfx.VideoInfo == NULL) {
+			return XST_FAILURE;
+		}
+		else {
+			return	XDpDma_ConfigChannelState(InstancePtr,
+					      XDPDMA_GRAPHICS_CHANNEL,
+					      ChannelState);
+		}
+		break;
+	case AudioChan0:
+		return	XDpDma_ConfigChannelState(InstancePtr,
+						  XDPDMA_AUDIO_CHANNEL0,
+						  ChannelState);
+		break;
+	case AudioChan1:
+		return XDpDma_ConfigChannelState(InstancePtr,
+						 XDPDMA_AUDIO_CHANNEL1,
+						 ChannelState);
+		break;
+	default:
+		return XST_FAILURE;
+		break;
+	}
+
+	return XST_SUCCESS;
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function allocates DPDMA Video Channels depending on the number of
+ * planes in the video
+ *
+ * @param	InstancePtr is a pointer to the driver instance.
+ * @params	Format is the video format to be used for the DPDMA transfer
+ *
+ * @return	XST_SUCCESS, When the format is valid Video Format.
+ *		XST_FAILURE, When the format is not valid Video Format
+ *
+ * @note	None.
+ *
+ * **************************************************************************/
+int XDpDma_SetVideoFormat(XDpDma *InstancePtr, XAVBuf_VideoFormat Format)
+{
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	InstancePtr->Video.VideoInfo = XAVBuf_GetNLiveVideoAttribute(Format);
+	if(InstancePtr->Video.VideoInfo == NULL) {
+		return XST_FAILURE;
+	}
+
+	return XST_SUCCESS;
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function allocates DPDMA Graphics Channels.
+ *
+ * @param	InstancePtr is a pointer to the driver instance.
+ * @params	Format is the video format to be used for the DPDMA transfer
+ *
+ * @return	XST_SUCCESS, When the format is a valid Graphics Format.
+ *		XST_FAILURE, When the format is not valid Graphics Format.
+ *
+ * @note	None.
+ *
+ * **************************************************************************/
+int XDpDma_SetGraphicsFormat(XDpDma *InstancePtr, XAVBuf_VideoFormat Format)
+{
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	InstancePtr->Gfx.VideoInfo = XAVBuf_GetNLGraphicsAttribute(Format);
+	if(InstancePtr->Gfx.VideoInfo == NULL) {
+		return XST_FAILURE;
+	}
+
+	return XST_SUCCESS;
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function starts the operation on the a given channel
+ *
+ * @param    InstancePtr is a pointer to the driver instance.
+ * @param    QOS is the Quality of Service value to be selected.
+ *
+ * @return   None.
+ *
+ * @note     .
+ *
+ * **************************************************************************/
+void XDpDma_SetQOS(XDpDma *InstancePtr, u8 QOS)
+{
+	u8 Index;
+	u32 RegVal = 0;
+
+	Xil_AssertVoid(QOS >= XDPDMA_QOS_MIN && QOS <= XDPDMA_QOS_MAX);
+
+	RegVal = ((QOS << XDPDMA_CH_CNTL_QOS_DATA_RD_SHIFT) |
+		   (QOS << XDPDMA_CH_CNTL_QOS_DSCR_RD_SHIFT) |
+		   (QOS << XDPDMA_CH_CNTL_QOS_DSCR_WR_SHIFT));
+
+	u32 Mask = XDPDMA_CH_CNTL_QOS_DATA_RD_MASK |
+		XDPDMA_CH_CNTL_QOS_DSCR_RD_MASK |
+		XDPDMA_CH_CNTL_QOS_DSCR_WR_MASK;
+
+	for(Index = 0; Index <= XDPDMA_AUDIO_CHANNEL1; Index++) {
+		XDpDma_ReadModifyWrite(InstancePtr->Config.BaseAddr,
+				XDPDMA_CH0_CNTL + (XDPDMA_CH_OFFSET * Index),
+			        RegVal, Mask);
+	}
+
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function Triggers DPDMA to start the transaction.
+ *
+ * @param	InstancePtr is a pointer to the XDpDma instance.
+ * @param	Channel is the XDpDma_ChannelType on which the transaction
+ *		is to be triggered.
+ *
+ * @return	XST_SUCCESS The channel has successfully been Triggered.
+ *		XST_FAILURE When the triggering Video and Graphics channel
+ *		without setting the Video Formats.
+ *
+ * @note	None.
+ *
+ * **************************************************************************/
+int XDpDma_Trigger(XDpDma *InstancePtr, XDpDma_ChannelType Channel)
+{
+	u32 Trigger = 0;
+	u8 Index = 0;
+	u8 NumPlanes = 0;
+	switch(Channel) {
+	case VideoChan:
+		if(InstancePtr->Video.VideoInfo == NULL) {
+			return XST_FAILURE;
+		}
+		else {
+			NumPlanes = InstancePtr->Video.VideoInfo->Mode;
+			for(Index = 0; Index <= NumPlanes; Index++) {
+				Trigger |= XDPDMA_GBL_TRG_CH0_MASK << Index;
+				InstancePtr->Video.TriggerStatus =
+					XDPDMA_TRIGGER_DONE;
+			}
+		}
+		break;
+	case GraphicsChan:
+		if(InstancePtr->Gfx.VideoInfo == NULL) {
+			return XST_FAILURE;
+		}
+		Trigger = XDPDMA_GBL_TRG_CH3_MASK;
+		InstancePtr->Gfx.TriggerStatus = XDPDMA_TRIGGER_DONE;
+		break;
+	case AudioChan0:
+		Trigger = XDPDMA_GBL_TRG_CH4_MASK;
+		InstancePtr->Audio[0].TriggerStatus = XDPDMA_TRIGGER_DONE;
+		break;
+	case AudioChan1:
+		Trigger = XDPDMA_GBL_TRG_CH5_MASK;
+		InstancePtr->Audio[1].TriggerStatus = XDPDMA_TRIGGER_DONE;
+		break;
+	}
+	XDpDma_WriteReg(InstancePtr->Config.BaseAddr, XDPDMA_GBL, Trigger);
+
+	return XST_SUCCESS;
+
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function Retriggers DPDMA to fetch data from new descriptor.
+ *
+ * @param	InstancePtr is a pointer to the XDpDma instance.
+ * @param	Channel is the XDpDma_ChannelType on which the transaction
+ *		is to be retriggered.
+ *
+ * @return	XST_SUCCESS The channel has successfully been Triggered.
+ *		XST_FAILURE When the triggering Video and Graphics channel
+ *		without setting the Video Formats.
+ *
+ * @note	None.
+ *
+ * **************************************************************************/
+int XDpDma_ReTrigger(XDpDma *InstancePtr, XDpDma_ChannelType Channel)
+{
+	u32 Trigger = 0;
+	u8 NumPlanes;
+	u8 Index;
+	switch(Channel) {
+	case VideoChan:
+		if(InstancePtr->Video.VideoInfo == NULL) {
+			return XST_FAILURE;
+		}
+		else {
+			NumPlanes = InstancePtr->Video.VideoInfo->Mode;
+			for(Index = 0; Index <= NumPlanes; Index++) {
+				Trigger |= XDPDMA_GBL_RTRG_CH0_MASK << Index;
+				InstancePtr->Video.TriggerStatus =
+					XDPDMA_RETRIGGER_DONE;
+			}
+		}
+		break;
+	case GraphicsChan:
+		if(InstancePtr->Gfx.VideoInfo == NULL) {
+			return XST_FAILURE;
+		}
+		Trigger = XDPDMA_GBL_RTRG_CH3_MASK;
+		InstancePtr->Gfx.TriggerStatus = XDPDMA_RETRIGGER_DONE;
+		break;
+	case AudioChan0:
+		Trigger = XDPDMA_GBL_RTRG_CH4_MASK;
+		InstancePtr->Audio[0].TriggerStatus = XDPDMA_RETRIGGER_DONE;
+		break;
+	case AudioChan1:
+		Trigger = XDPDMA_GBL_RTRG_CH5_MASK;
+		InstancePtr->Audio[1].TriggerStatus = XDPDMA_RETRIGGER_DONE;
+		break;
+	}
+	XDpDma_WriteReg(InstancePtr->Config.BaseAddr, XDPDMA_GBL, Trigger);
+
+	return XST_SUCCESS;
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function intializes Video Descriptor for Video and Graphics channel
+ *
+ * @param    Channel is a pointer to the current Descriptor of Video or
+ *	     Graphics Channel.
+ * @param    FrameBuffer is a pointer to the Frame Buffer structure
+ *
+ * @return   None.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+void XDpDma_InitVideoDescriptor(XDpDma_Descriptor *CurrDesc,
+				XDpDma_FrameBuffer *FrameBuffer)
+{
+	Xil_AssertVoid(CurrDesc != NULL);
+	Xil_AssertVoid(FrameBuffer != NULL);
+	Xil_AssertVoid((FrameBuffer->Stride) % XDPDMA_DESCRIPTOR_ALIGN == 0);
+	CurrDesc->Control = XDPDMA_DESC_PREAMBLE | XDPDMA_DESC_IGNR_DONE |
+			    XDPDMA_DESC_LAST_FRAME;
+	CurrDesc->DSCR_ID = 0;
+	CurrDesc->XFER_SIZE = FrameBuffer->Size;
+	CurrDesc->LINE_SIZE_STRIDE = ((FrameBuffer->Stride >> 4) <<
+				XDPDMA_DESCRIPTOR_LINE_SIZE_STRIDE_SHIFT) |
+				(FrameBuffer->LineSize);
+	CurrDesc->ADDR_EXT = (((FrameBuffer->Address >>
+				XDPDMA_DESCRIPTOR_SRC_ADDR_WIDTH) <<
+			       XDPDMA_DESCRIPTOR_ADDR_EXT_SRC_ADDR_EXT_SHIFT) |
+				((INTPTR) CurrDesc >>
+				 XDPDMA_DESCRIPTOR_NEXT_DESR_WIDTH));
+	CurrDesc->NEXT_DESR = (INTPTR) CurrDesc;
+	CurrDesc->SRC_ADDR = FrameBuffer->Address;
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function intializes Descriptors for transactions on Audio Channel
+ *
+ * @param    Channel is a pointer to the XDpDma_AudioChannel instance
+ *
+ * @param    AudioBuffer is a pointer to the Audio Buffer structure
+ *
+ * @return   None.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+void XDpDma_InitAudioDescriptor(XDpDma_AudioChannel *Channel,
+			       XDpDma_AudioBuffer *AudioBuffer)
+{
+	u32 Size;
+	u64 Address;
+	Xil_AssertVoid(Channel != NULL);
+	Xil_AssertVoid(AudioBuffer != NULL);
+	Xil_AssertVoid((AudioBuffer->Size) % XDPDMA_AUDIO_ALIGNMENT == 0);
+	Xil_AssertVoid((AudioBuffer->Address) % XDPDMA_AUDIO_ALIGNMENT == 0);
+
+	Size = AudioBuffer->Size / 4;
+	Address = AudioBuffer->Address;
+	if(Channel->Current == &Channel->Descriptor4) {
+		XDpDma_SetupAudioDescriptor(&Channel->Descriptor4, Size,
+					    Address,
+					    &Channel->Descriptor5);
+		XDpDma_SetupAudioDescriptor(&Channel->Descriptor5, Size,
+					    Address + Size,
+					    &Channel->Descriptor6);
+		XDpDma_SetupAudioDescriptor(&Channel->Descriptor6, Size,
+					    Address + (Size * 2),
+					    &Channel->Descriptor7);
+		XDpDma_SetupAudioDescriptor(&Channel->Descriptor7, Size,
+					    Address + (Size * 3), NULL);
+	}
+
+	else if(Channel->Current == &Channel->Descriptor0) {
+		XDpDma_SetupAudioDescriptor(&Channel->Descriptor0, Size,
+					    Address,
+					    &Channel->Descriptor1);
+		XDpDma_SetupAudioDescriptor(&Channel->Descriptor1, Size,
+					    Address + Size,
+					    &Channel->Descriptor2);
+		XDpDma_SetupAudioDescriptor(&Channel->Descriptor2, Size,
+					    Address + (Size * 2),
+					    &Channel->Descriptor3);
+		XDpDma_SetupAudioDescriptor(&Channel->Descriptor3, Size,
+					    Address + (Size * 3), NULL);
+
+	}
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function sets the next Frame Buffers to be displayed on the Video
+ * Channel.
+ *
+ * @param    InstancePtr is pointer to the instance of DPDMA.
+ * @param    Plane0 is a pointer to the Frame Buffer structure.
+ * @param    Plane1 is a pointer to the Frame Buffer structure.
+ * @param    Plane2 is a pointer to the Frame Buffer structure.
+ *
+ * @return   None.
+ *
+ * @note     For interleaved mode use Plane0.
+ *	     For semi-planar mode use Plane0 and Plane1.
+ *	     For planar mode use Plane0, Plane1 and Plane2
+ *
+ * **************************************************************************/
+void  XDpDma_DisplayVideoFrameBuffer(XDpDma *InstancePtr,
+				     XDpDma_FrameBuffer *Plane0,
+				     XDpDma_FrameBuffer *Plane1,
+				     XDpDma_FrameBuffer *Plane2)
+{
+	u8 NumPlanes;
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->Video.VideoInfo != NULL);
+
+	NumPlanes = InstancePtr->Video.VideoInfo->Mode;
+
+	switch(NumPlanes) {
+		case XDPDMA_VIDEO_CHANNEL2:
+			Xil_AssertVoid(Plane2 != NULL);
+			InstancePtr->Video.FrameBuffer[XDPDMA_VIDEO_CHANNEL2] =
+				Plane2;
+		case XDPDMA_VIDEO_CHANNEL1:
+			Xil_AssertVoid(Plane1 != NULL);
+			InstancePtr->Video.FrameBuffer[XDPDMA_VIDEO_CHANNEL1] =
+				Plane1;
+		case XDPDMA_VIDEO_CHANNEL0:
+			Xil_AssertVoid(Plane0 != NULL);
+			InstancePtr->Video.FrameBuffer[XDPDMA_VIDEO_CHANNEL0] =
+				Plane0;
+			break;
+	}
+
+	if(InstancePtr->Video.Channel[XDPDMA_VIDEO_CHANNEL0].Current == NULL) {
+		InstancePtr->Video.TriggerStatus = XDPDMA_TRIGGER_EN;
+	}
+	else {
+		InstancePtr->Video.TriggerStatus = XDPDMA_RETRIGGER_EN;
+	}
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function sets the next Frame Buffers to be displayed on the Graphics
+ * Channel.
+ *
+ * @param    InstancePtr is pointer to the instance of DPDMA.
+ * @param    Plane is a pointer to the Frame Buffer structure.
+ *
+ * @return   None.
+ *
+ * @note     None.
+ *
+ **************************************************************************/
+void XDpDma_DisplayGfxFrameBuffer(XDpDma *InstancePtr,
+				  XDpDma_FrameBuffer *Plane)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Plane != NULL);
+
+	InstancePtr->Gfx.FrameBuffer = Plane;
+
+	if(InstancePtr->Gfx.Channel.Current == NULL) {
+		InstancePtr->Gfx.TriggerStatus = XDPDMA_TRIGGER_EN;
+	}
+	else {
+		InstancePtr->Gfx.TriggerStatus = XDPDMA_RETRIGGER_EN;
+	}
+}
+/*************************************************************************/
+/**
+ *
+ * This function sets the next Audio Buffer to be played on Audio Channel 0
+ *
+ * @param    InstancePtr is pointer to the instance of DPDMA.
+ * @param    Buffer is a pointer to the attributes of the Audio information
+ *	     to be played.
+ * @param    ChannelNum selects between Audio Channel 0 and Audio Channel 1
+ *
+ * @return   XST_SUCCESS when the play audio request is successful.
+ *	     XST_FAILURE when the play audio request fails, user has to
+ *	     retry to play the audio.
+ *
+ * @note     The user has to schedule new audio buffer before half the audio
+ *	     information is consumed by DPDMA to have a seamless playback.
+ *
+ **************************************************************************/
+int XDpDma_PlayAudio(XDpDma *InstancePtr, XDpDma_AudioBuffer *Buffer,
+		      u8 ChannelNum)
+{
+	XDpDma_AudioChannel *Channel;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Buffer != NULL);
+	Xil_AssertNonvoid(Buffer->Size >= 512);
+	Xil_AssertNonvoid(Buffer->Size % 128 == 0);
+	Xil_AssertNonvoid(Buffer->Address % 128 == 0);
+
+	Channel = &InstancePtr->Audio[ChannelNum];
+	Channel->Buffer = Buffer;
+
+	if(Channel->Current == NULL) {
+		Channel->TriggerStatus = XDPDMA_TRIGGER_EN;
+		Channel->Current = &Channel->Descriptor0;
+		Channel->Used = 0;
+	}
+
+else if(Channel->Current == &Channel->Descriptor0) {
+		/* Check if descriptor chain can be updated */
+		if(Channel->Descriptor1.MSB_Timestamp >>
+		   XDPDMA_DESC_DONE_SHIFT) {
+			Channel->Current = NULL;
+			return XST_FAILURE;
+		}
+		else if(Channel->Descriptor7.MSB_Timestamp >>
+			XDPDMA_DESC_DONE_SHIFT || !(Channel->Used)) {
+			Channel->Descriptor3.Control = XDPDMA_DESC_PREAMBLE |
+				XDPDMA_DESC_UPDATE | XDPDMA_DESC_IGNR_DONE;
+			Channel->Descriptor3.NEXT_DESR =
+				(INTPTR) &Channel->Descriptor4;
+			Channel->Descriptor3.ADDR_EXT &=
+				~XDPDMA_DESCRIPTOR_ADDR_EXT_DSC_NXT_MASK;
+			Channel->Descriptor3.ADDR_EXT |=
+				(INTPTR) &Channel->Descriptor4 >> 32;
+			Channel->Current = &Channel->Descriptor4;
+			Channel->Used = 1;
+			XDpDma_InitAudioDescriptor(Channel, Buffer);
+		}
+		else {
+			return XST_FAILURE;
+		}
+	}
+
+	else if(Channel->Current == &Channel->Descriptor4)  {
+		/* Check if descriptor chain can be updated */
+		if(Channel->Descriptor5.MSB_Timestamp >>
+		   XDPDMA_DESC_DONE_SHIFT) {
+			Channel->Current = NULL;
+			return XST_FAILURE;
+		}
+		else if(Channel->Descriptor3.MSB_Timestamp >>
+			XDPDMA_DESC_DONE_SHIFT) {
+			Channel->Descriptor7.Control = XDPDMA_DESC_PREAMBLE |
+				XDPDMA_DESC_UPDATE | XDPDMA_DESC_IGNR_DONE;
+			Channel->Descriptor7.NEXT_DESR =
+				(INTPTR) &Channel->Descriptor0;
+			Channel->Descriptor7.ADDR_EXT &=
+				~XDPDMA_DESCRIPTOR_ADDR_EXT_DSC_NXT_MASK;
+			Channel->Descriptor7.ADDR_EXT |=
+				(INTPTR) &Channel->Descriptor0 >> 32;
+			Channel->Current = &Channel->Descriptor0;
+			XDpDma_InitAudioDescriptor(Channel, Buffer);
+		}
+		else {
+			return XST_FAILURE;
+		}
+	}
+
+	return XST_SUCCESS;
+
+}
+/*************************************************************************/
+/**
+ *
+ * This function sets the channel with the latest framebuffer and the
+ * available descriptor for transfer on the next Vsync.
+ *
+ * @param    InstancePtr is pointer to the instance of DPDMA.
+ * @param    Channel indicates which channels are being setup for transfer.
+ *
+ * @return   None.
+ *
+ * @note     None.
+ *
+ **************************************************************************/
+void XDpDma_SetupChannel(XDpDma *InstancePtr, XDpDma_ChannelType Channel)
+{
+	XDpDma_Channel *Chan;
+	XDpDma_AudioChannel *AudChan;
+	XDpDma_FrameBuffer *FB;
+	XDpDma_AudioBuffer *AudioBuffer;
+	u8 Index, NumPlanes;
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	switch(Channel) {
+		case VideoChan:
+			Xil_AssertVoid(InstancePtr->Video.VideoInfo != NULL);
+			Xil_AssertVoid(InstancePtr->Video.FrameBuffer != NULL);
+			NumPlanes = InstancePtr->Video.VideoInfo->Mode;
+			for(Index = 0; Index <= NumPlanes; Index++) {
+				Chan = &InstancePtr->Video.Channel[Index];
+				FB = InstancePtr->Video.FrameBuffer[Index];
+				XDpDma_UpdateVideoDescriptor(Chan);
+				XDpDma_InitVideoDescriptor(Chan->Current, FB);
+				XDpDma_SetDescriptorAddress(InstancePtr,
+							    Index);
+			}
+			break;
+
+		case GraphicsChan:
+			Xil_AssertVoid(InstancePtr->Gfx.VideoInfo != NULL);
+			Xil_AssertVoid(InstancePtr->Gfx.FrameBuffer != NULL);
+			Chan = &InstancePtr->Gfx.Channel;
+			FB = InstancePtr->Gfx.FrameBuffer;
+			XDpDma_UpdateVideoDescriptor(Chan);
+			XDpDma_InitVideoDescriptor(Chan->Current, FB);
+			XDpDma_SetDescriptorAddress(InstancePtr,
+						    XDPDMA_GRAPHICS_CHANNEL);
+			break;
+
+		case AudioChan0:
+			Xil_AssertVoid(InstancePtr->Audio[0].Buffer != NULL);
+			AudChan = &InstancePtr->Audio[0];
+			AudioBuffer = InstancePtr->Audio[0].Buffer;
+			XDpDma_InitAudioDescriptor(AudChan, AudioBuffer);
+			XDpDma_SetDescriptorAddress(InstancePtr,
+						    XDPDMA_AUDIO_CHANNEL0);
+			break;
+		case AudioChan1:
+			Xil_AssertVoid(InstancePtr->Audio[1].Buffer != NULL);
+			AudChan = &InstancePtr->Audio[1];
+			AudioBuffer = InstancePtr->Audio[1].Buffer;
+			XDpDma_InitAudioDescriptor(AudChan, AudioBuffer);
+			XDpDma_SetDescriptorAddress(InstancePtr,
+						    XDPDMA_AUDIO_CHANNEL1);
+			break;
+	}
+}
diff --git a/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma.h b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma.h
new file mode 100644
index 0000000..95315b0
--- /dev/null
+++ b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma.h
@@ -0,0 +1,283 @@
+/******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+ ******************************************************************************/
+
+/*****************************************************************************/
+/**
+ *
+ * @file xdpdma.h
+ *
+ * This file defines the functions implemented by the DPDMA driver present
+ * in the Zynq Ultrascale MP.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver	Who   Date     Changes
+ * ---- ----- -------- ----------------------------------------------------
+ * 1.0  aad   04/12/16 Initial release.
+ *
+ *****************************************************************************/
+
+
+#ifndef XDPDMA_H_
+/* Prevent circular inclusions by using protection macros. */
+#define XDPDMA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files **********************************/
+
+#include "xdpdma_hw.h"
+#include "xvidc.h"
+#include "xil_io.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xavbuf.h"
+/************************** Constant Definitions ******************************/
+
+/* Alignment for DPDMA Descriptor and Payload */
+#define XDPDMA_DESCRIPTOR_ALIGN 256
+/* DPDMA preamble field */
+#define XDPDMA_DESCRIPTOR_PREAMBLE 0xA5
+/**************************** Type Definitions ********************************/
+
+/**
+ *  This typedef describes the DPDMA descriptor structure and its internals
+ *  which will be used when fetching data from a nonlive path
+ */
+typedef struct {
+	u32 Control;			/**<	[7:0] Descriptor Preamble
+						[8] Enable completion Interrupt
+						[9] Enable descriptor update
+						[10] Ignore Done
+						[11] AXI burst type
+						[15:12] AXACHE
+						[17:16] AXPROT
+						[18] Descriptor mode
+						[19] Last Descriptor
+						[20] Enable CRC
+						[21] Last descriptor frame
+						[31:22] Reserved */
+	u32 DSCR_ID;			/**<	[15:0] Descriptor ID
+						[31:16] Reserved */
+	u32 XFER_SIZE;			/**<	Size of transfer in bytes */
+	u32 LINE_SIZE_STRIDE;		/**<	[17:0] Horizontal Resolution
+						[31:18] Stride */
+	u32 LSB_Timestamp;		/**<	LSB of the Timestamp */
+	u32 MSB_Timestamp;		/**<	MSB of the Timestamp */
+	u32 ADDR_EXT;			/**<	[15:0] Next descriptor
+						extenstion
+						[31:16] SRC address extemsion */
+	u32 NEXT_DESR;			/**<	Address of next descriptor */
+	u32 SRC_ADDR;			/**<	Source Address */
+	u32 ADDR_EXT_23;		/**<	[15:0] Address extension for SRC
+						Address2
+						[31:16] Address extension for
+						SRC Address 3 */
+	u32 ADDR_EXT_45;		/**<	[15:0] Address extension for SRC
+						Address4
+						[31:16] Address extension for
+						SRC Address 5 */
+	u32 SRC_ADDR2;			/**<	Source address of 2nd page */
+	u32 SRC_ADDR3;			/**<	Source address of 3rd page */
+	u32 SRC_ADDR4;			/**<	Source address of 4th page */
+	u32 SRC_ADDR5;			/**<	Source address of 5th page */
+	u32 CRC;			/**<	Reserved */
+
+} XDpDma_Descriptor __attribute__ ((aligned(XDPDMA_DESCRIPTOR_ALIGN)));
+
+/**
+ * This typedef contains configuration information for the DPDMA.
+ */
+typedef struct {
+	u16 DeviceId;			/**< Device ID */
+	u32 BaseAddr;			/**< Base Address */
+} XDpDma_Config;
+
+/**
+ * The following data structure enumerates the types of
+ * DPDMA channels
+ */
+typedef enum {
+	VideoChan,
+	GraphicsChan,
+	AudioChan0,
+	AudioChan1,
+} XDpDma_ChannelType;
+
+/**
+ * This typedef lists the channel status.
+ */
+typedef enum {
+	XDPDMA_DISABLE,
+	XDPDMA_ENABLE,
+	XDPDMA_IDLE,
+	XDPDMA_PAUSE
+} XDpDma_ChannelState;
+
+/**
+ * This typedef is the information needed to transfer video info.
+ */
+typedef struct {
+	u64 Address;
+	u32 Size;
+	u32 Stride;
+	u32 LineSize;
+} XDpDma_FrameBuffer;
+/**
+ * This typedef is the information needed to transfer audio info.
+ */
+typedef struct {
+	u64 Address;
+	u64 Size;
+} XDpDma_AudioBuffer;
+
+/**
+ * This typedef defines the Video/Graphics Channel attributes.
+ */
+typedef struct {
+	XDpDma_Descriptor Descriptor0;
+	XDpDma_Descriptor Descriptor1;
+	XDpDma_Descriptor *Current;
+} XDpDma_Channel;
+
+/**
+ * This typedef defines the Video Channel attributes.
+ */
+typedef struct {
+	XDpDma_Channel Channel[3];
+	u8 TriggerStatus;
+	u8 AVBufEn;
+	XAVBuf_VideoAttribute *VideoInfo;
+	XDpDma_FrameBuffer *FrameBuffer[3];
+} XDpDma_VideoChannel;
+
+/**
+ * This typedef defines the Graphics Channel attributes.
+ */
+typedef struct {
+	XDpDma_Channel Channel;
+	u8 TriggerStatus;
+	u8 AVBufEn;
+	XAVBuf_VideoAttribute *VideoInfo;
+	XDpDma_FrameBuffer *FrameBuffer;
+} XDpDma_GfxChannel;
+
+/**
+ * This typedef defines the Audio Channel attributes.
+ */
+typedef struct {
+	XDpDma_Descriptor Descriptor0, Descriptor1, Descriptor2;
+	XDpDma_Descriptor Descriptor3, Descriptor4, Descriptor5;
+	XDpDma_Descriptor Descriptor6, Descriptor7;
+	XDpDma_Descriptor *Current;
+	u8 TriggerStatus;
+	XDpDma_AudioBuffer *Buffer;
+	u8 Used;
+} XDpDma_AudioChannel;
+/*************************************************************************/
+/**
+ * This callback type represents the handler for a DPDMA VSync interrupt.
+ *
+ * @param	InstancePtr is a pointer to the XDpDma instance.
+ *
+ * @note	None.
+ *
+**************************************************************************/
+typedef void (*XDpDma_VSyncInterruptHandler)(void *InstancePtr);
+
+/*************************************************************************/
+/**
+ * This callback type represents the handler for a DPDMA Done interrupt.
+ *
+ * @param	InstancePtr is a pointer to the XDpDma instance.
+ *
+ * @note	None.
+ *
+**************************************************************************/
+typedef void (*XDpDma_DoneInterruptHandler)(void *InstancePtr);
+
+/**
+ * The XDpDma driver instance data representing the DPDMA operation.
+ */
+typedef struct {
+	XDpDma_Config Config;
+	XDpDma_VideoChannel Video;
+	XDpDma_GfxChannel Gfx;
+	XDpDma_AudioChannel Audio[2];
+	XVidC_VideoTiming *Timing;
+	u8 QOS;
+
+	XDpDma_VSyncInterruptHandler VSyncHandler;
+	void * VSyncInterruptHandler;
+
+	XDpDma_DoneInterruptHandler DoneHandler;
+	void * DoneInterruptHandler;
+
+} XDpDma;
+
+void XDpDma_CfgInitialize(XDpDma *InstancePtr, XDpDma_Config *CfgPtr);
+XDpDma_Config *XDpDma_LookupConfig(u16 DeviceId);
+int XDpDma_SetChannelState(XDpDma *InstancePtr, XDpDma_ChannelType Channel,
+					XDpDma_ChannelState ChannelState);
+void XDpDma_SetQOS(XDpDma *InstancePtr, u8 QOS);
+void XDpDma_SetupChannel(XDpDma *InstancePtr, XDpDma_ChannelType Channel);
+int XDpDma_SetVideoFormat(XDpDma *InstancePtr, XAVBuf_VideoFormat Format);
+int XDpDma_SetGraphicsFormat(XDpDma *InstancePtr, XAVBuf_VideoFormat Format);
+void XDpDma_SetVideoTiming(XDpDma *InstancePtr, XVidC_VideoTiming *Timing);
+int XDpDma_Trigger(XDpDma *InstancePtr, XDpDma_ChannelType Channel);
+int XDpDma_ReTrigger(XDpDma *InstancePtr, XDpDma_ChannelType Channel);
+void XDpDma_InterruptEnable(XDpDma *InstancePtr, u32 Mask);
+void XDpDma_InterruptHandler(XDpDma *InstancePtr);
+void XDpDma_VSyncHandler(XDpDma *InstancePtr);
+void XDpDma_DoneHandler(XDpDma *InstancePtr);
+void XDpDma_InitVideoDescriptor(XDpDma_Descriptor *CurrDesc,
+				XDpDma_FrameBuffer *FrameBuffer);
+void  XDpDma_DisplayVideoFrameBuffer(XDpDma *InstancePtr,
+				   XDpDma_FrameBuffer *Plane1,
+				   XDpDma_FrameBuffer *Plane2,
+				   XDpDma_FrameBuffer *Plane3);
+void XDpDma_DisplayGfxFrameBuffer(XDpDma *InstancePtr,
+				   XDpDma_FrameBuffer *Plane);
+void XDpDma_InitAudioDescriptor(XDpDma_AudioChannel *Channel,
+			       XDpDma_AudioBuffer *AudioBuffer);
+int XDpDma_PlayAudio(XDpDma *InstancePtr, XDpDma_AudioBuffer *Buffer,
+		      u8 ChannelNum);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XDPDMA_H_ */
diff --git a/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_g.c b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_g.c
new file mode 100644
index 0000000..a2f4298
--- /dev/null
+++ b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_g.c
@@ -0,0 +1,55 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xdpdma.h"
+
+/*
+* The configuration table for devices
+*/
+
+XDpDma_Config XDpDma_ConfigTable[XPAR_XDPDMA_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_DPDMA_DEVICE_ID,
+		XPAR_PSU_DPDMA_BASEADDR
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_hw.h b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_hw.h
new file mode 100644
index 0000000..14ebce2
--- /dev/null
+++ b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_hw.h
@@ -0,0 +1,1811 @@
+/******************************************************************************
+ *
+ * Copyright (C) 2010 - 2017 Xilinx, Inc. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+ ******************************************************************************/
+
+/*****************************************************************************/
+/**
+ *
+ * @file xdpdma_hw.h
+ *
+ * This header file contains identifiers and low-level driver functions (or
+ * macros) that can be used to access the device. High-level driver functions
+ * are defined in xdpdma.h
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver	Who   Date     Changes
+ * ---- ----- -------- ----------------------------------------------------
+ * 1.0  aad   04/12/16 Initial release.
+ *
+ *****************************************************************************/
+
+
+#ifndef XDPDMAHW_H_
+/* Prevent circular inclusions by using protection macros. */
+#define XDPDMAHW_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files **********************************/
+
+#include "xil_io.h"
+
+/************************** Constant Definitions ******************************/
+
+/******************************************************************************/
+/**
+ * Address mapping for the DPDMA.
+ */
+/******************************************************************************/
+/** @name DPDMA registers
+ *  @{
+ */
+
+#define XDPDMA_BASEADDR					0XFD4C0000
+
+/**
+ * Register: XDPDMA_ERR_CTRL
+ */
+#define XDPDMA_ERR_CTRL					0X0000
+
+#define XDPDMA_ERR_CTRL_APB_ERR_RES_SHIFT		0
+#define XDPDMA_ERR_CTRL_APB_ERR_RES_WIDTH		1
+#define XDPDMA_ERR_CTRL_APB_ERR_RES_MASK		0X1
+
+/**
+ * Register: XDPDMA_ISR
+ */
+#define XDPDMA_ISR					0X0004
+
+#define XDPDMA_ISR_VSYNC_INT_SHIFT			27
+#define XDPDMA_ISR_VSYNC_INT_WIDTH			1
+#define XDPDMA_ISR_VSYNC_INT_MASK			0X08000000
+
+#define XDPDMA_ISR_AXI_RD_4K_CROSS_SHIFT		26
+#define XDPDMA_ISR_AXI_RD_4K_CROSS_WIDTH		1
+#define XDPDMA_ISR_AXI_RD_4K_CROSS_MASK			0X04000000
+
+#define XDPDMA_ISR_WR_DATA_FIFO_FULL_SHIFT		25
+#define XDPDMA_ISR_WR_DATA_FIFO_FULL_WIDTH		1
+#define XDPDMA_ISR_WR_DATA_FIFO_FULL_MASK		0X02000000
+
+#define XDPDMA_ISR_WR_CMD_FIFO_FULL_SHIFT		24
+#define XDPDMA_ISR_WR_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_ISR_WR_CMD_FIFO_FULL_MASK		0X01000000
+
+#define XDPDMA_ISR_DSCR_ERR5_SHIFT			23
+#define XDPDMA_ISR_DSCR_ERR5_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR5_MASK			0X800000
+
+#define XDPDMA_ISR_DSCR_ERR4_SHIFT			22
+#define XDPDMA_ISR_DSCR_ERR4_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR4_MASK			0X400000
+
+#define XDPDMA_ISR_DSCR_ERR3_SHIFT			21
+#define XDPDMA_ISR_DSCR_ERR3_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR3_MASK			0X200000
+
+#define XDPDMA_ISR_DSCR_ERR2_SHIFT			20
+#define XDPDMA_ISR_DSCR_ERR2_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR2_MASK			0X100000
+
+#define XDPDMA_ISR_DSCR_ERR1_SHIFT			19
+#define XDPDMA_ISR_DSCR_ERR1_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR1_MASK			0X80000
+
+#define XDPDMA_ISR_DSCR_ERR0_SHIFT			18
+#define XDPDMA_ISR_DSCR_ERR0_WIDTH			1
+#define XDPDMA_ISR_DSCR_ERR0_MASK			0X40000
+
+#define XDPDMA_ISR_DATA_AXI_ERR5_SHIFT			17
+#define XDPDMA_ISR_DATA_AXI_ERR5_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR5_MASK			0X20000
+
+#define XDPDMA_ISR_DATA_AXI_ERR4_SHIFT			16
+#define XDPDMA_ISR_DATA_AXI_ERR4_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR4_MASK			0X10000
+
+#define XDPDMA_ISR_DATA_AXI_ERR3_SHIFT			15
+#define XDPDMA_ISR_DATA_AXI_ERR3_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR3_MASK			0X8000
+
+#define XDPDMA_ISR_DATA_AXI_ERR2_SHIFT			14
+#define XDPDMA_ISR_DATA_AXI_ERR2_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR2_MASK			0X4000
+
+#define XDPDMA_ISR_DATA_AXI_ERR1_SHIFT			13
+#define XDPDMA_ISR_DATA_AXI_ERR1_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR1_MASK			0X2000
+
+#define XDPDMA_ISR_DATA_AXI_ERR0_SHIFT			12
+#define XDPDMA_ISR_DATA_AXI_ERR0_WIDTH			1
+#define XDPDMA_ISR_DATA_AXI_ERR0_MASK			0X1000
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN5_SHIFT		11
+#define XDPDMA_ISR_NO_OSTAND_TRAN5_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN5_MASK			0X0800
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN4_SHIFT		10
+#define XDPDMA_ISR_NO_OSTAND_TRAN4_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN4_MASK			0X0400
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN3_SHIFT		9
+#define XDPDMA_ISR_NO_OSTAND_TRAN3_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN3_MASK			0X0200
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN2_SHIFT		8
+#define XDPDMA_ISR_NO_OSTAND_TRAN2_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN2_MASK			0X0100
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN1_SHIFT		7
+#define XDPDMA_ISR_NO_OSTAND_TRAN1_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN1_MASK			0X80
+
+#define XDPDMA_ISR_NO_OSTAND_TRAN0_SHIFT		6
+#define XDPDMA_ISR_NO_OSTAND_TRAN0_WIDTH		1
+#define XDPDMA_ISR_NO_OSTAND_TRAN0_MASK			0X40
+
+#define XDPDMA_ISR_DSCR_DONE5_SHIFT			5
+#define XDPDMA_ISR_DSCR_DONE5_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE5_MASK			0X20
+
+#define XDPDMA_ISR_DSCR_DONE4_SHIFT			4
+#define XDPDMA_ISR_DSCR_DONE4_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE4_MASK			0X10
+
+#define XDPDMA_ISR_DSCR_DONE3_SHIFT			3
+#define XDPDMA_ISR_DSCR_DONE3_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE3_MASK			0X8
+
+#define XDPDMA_ISR_DSCR_DONE2_SHIFT			2
+#define XDPDMA_ISR_DSCR_DONE2_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE2_MASK			0X4
+
+#define XDPDMA_ISR_DSCR_DONE1_SHIFT			1
+#define XDPDMA_ISR_DSCR_DONE1_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE1_MASK			0X2
+
+#define XDPDMA_ISR_DSCR_DONE0_SHIFT			0
+#define XDPDMA_ISR_DSCR_DONE0_WIDTH			1
+#define XDPDMA_ISR_DSCR_DONE0_MASK			0X1
+
+/**
+ * Register: XDPDMA_IMR
+ */
+#define XDPDMA_IMR					0X0008
+
+#define XDPDMA_IMR_VSYNC_INT_SHIFT			27
+#define XDPDMA_IMR_VSYNC_INT_WIDTH			1
+#define XDPDMA_IMR_VSYNC_INT_MASK			0X08000000
+
+#define XDPDMA_IMR_AXI_RD_4K_CROSS_SHIFT		26
+#define XDPDMA_IMR_AXI_RD_4K_CROSS_WIDTH		1
+#define XDPDMA_IMR_AXI_RD_4K_CROSS_MASK			0X04000000
+
+#define XDPDMA_IMR_WR_DATA_FIFO_FULL_SHIFT		25
+#define XDPDMA_IMR_WR_DATA_FIFO_FULL_WIDTH		1
+#define XDPDMA_IMR_WR_DATA_FIFO_FULL_MASK		0X02000000
+
+#define XDPDMA_IMR_WR_CMD_FIFO_FULL_SHIFT		24
+#define XDPDMA_IMR_WR_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_IMR_WR_CMD_FIFO_FULL_MASK		0X01000000
+
+#define XDPDMA_IMR_DSCR_ERR5_SHIFT			23
+#define XDPDMA_IMR_DSCR_ERR5_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR5_MASK			0X800000
+
+#define XDPDMA_IMR_DSCR_ERR4_SHIFT			22
+#define XDPDMA_IMR_DSCR_ERR4_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR4_MASK			0X400000
+
+#define XDPDMA_IMR_DSCR_ERR3_SHIFT			21
+#define XDPDMA_IMR_DSCR_ERR3_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR3_MASK			0X200000
+
+#define XDPDMA_IMR_DSCR_ERR2_SHIFT			20
+#define XDPDMA_IMR_DSCR_ERR2_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR2_MASK			0X100000
+
+#define XDPDMA_IMR_DSCR_ERR1_SHIFT			19
+#define XDPDMA_IMR_DSCR_ERR1_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR1_MASK			0X80000
+
+#define XDPDMA_IMR_DSCR_ERR0_SHIFT			18
+#define XDPDMA_IMR_DSCR_ERR0_WIDTH			1
+#define XDPDMA_IMR_DSCR_ERR0_MASK			0X40000
+
+#define XDPDMA_IMR_DATA_AXI_ERR5_SHIFT			17
+#define XDPDMA_IMR_DATA_AXI_ERR5_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR5_MASK			0X20000
+
+#define XDPDMA_IMR_DATA_AXI_ERR4_SHIFT			16
+#define XDPDMA_IMR_DATA_AXI_ERR4_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR4_MASK			0X10000
+
+#define XDPDMA_IMR_DATA_AXI_ERR3_SHIFT			15
+#define XDPDMA_IMR_DATA_AXI_ERR3_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR3_MASK			0X8000
+
+#define XDPDMA_IMR_DATA_AXI_ERR2_SHIFT			14
+#define XDPDMA_IMR_DATA_AXI_ERR2_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR2_MASK			0X4000
+
+#define XDPDMA_IMR_DATA_AXI_ERR1_SHIFT			13
+#define XDPDMA_IMR_DATA_AXI_ERR1_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR1_MASK			0X2000
+
+#define XDPDMA_IMR_DATA_AXI_ERR0_SHIFT			12
+#define XDPDMA_IMR_DATA_AXI_ERR0_WIDTH			1
+#define XDPDMA_IMR_DATA_AXI_ERR0_MASK			0X1000
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN5_SHIFT		11
+#define XDPDMA_IMR_NO_OSTAND_TRAN5_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN5_MASK			0X0800
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN4_SHIFT		10
+#define XDPDMA_IMR_NO_OSTAND_TRAN4_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN4_MASK			0X0400
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN3_SHIFT		9
+#define XDPDMA_IMR_NO_OSTAND_TRAN3_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN3_MASK			0X0200
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN2_SHIFT		8
+#define XDPDMA_IMR_NO_OSTAND_TRAN2_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN2_MASK			0X0100
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN1_SHIFT		7
+#define XDPDMA_IMR_NO_OSTAND_TRAN1_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN1_MASK			0X80
+
+#define XDPDMA_IMR_NO_OSTAND_TRAN0_SHIFT		6
+#define XDPDMA_IMR_NO_OSTAND_TRAN0_WIDTH		1
+#define XDPDMA_IMR_NO_OSTAND_TRAN0_MASK			0X40
+
+#define XDPDMA_IMR_DSCR_DONE5_SHIFT			5
+#define XDPDMA_IMR_DSCR_DONE5_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE5_MASK			0X20
+
+#define XDPDMA_IMR_DSCR_DONE4_SHIFT			4
+#define XDPDMA_IMR_DSCR_DONE4_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE4_MASK			0X10
+
+#define XDPDMA_IMR_DSCR_DONE3_SHIFT			3
+#define XDPDMA_IMR_DSCR_DONE3_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE3_MASK			0X8
+
+#define XDPDMA_IMR_DSCR_DONE2_SHIFT			2
+#define XDPDMA_IMR_DSCR_DONE2_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE2_MASK			0X4
+
+#define XDPDMA_IMR_DSCR_DONE1_SHIFT			1
+#define XDPDMA_IMR_DSCR_DONE1_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE1_MASK			0X2
+
+#define XDPDMA_IMR_DSCR_DONE0_SHIFT			0
+#define XDPDMA_IMR_DSCR_DONE0_WIDTH			1
+#define XDPDMA_IMR_DSCR_DONE0_MASK			0X1
+
+/**
+ * Register: XDPDMA_IEN
+ */
+#define XDPDMA_IEN					0X000C
+
+#define XDPDMA_IEN_VSYNC_INT_SHIFT			27
+#define XDPDMA_IEN_VSYNC_INT_WIDTH			1
+#define XDPDMA_IEN_VSYNC_INT_MASK			0X08000000
+
+#define XDPDMA_IEN_AXI_RD_4K_CROSS_SHIFT		26
+#define XDPDMA_IEN_AXI_RD_4K_CROSS_WIDTH		1
+#define XDPDMA_IEN_AXI_RD_4K_CROSS_MASK			0X04000000
+
+#define XDPDMA_IEN_WR_DATA_FIFO_FULL_SHIFT		25
+#define XDPDMA_IEN_WR_DATA_FIFO_FULL_WIDTH		1
+#define XDPDMA_IEN_WR_DATA_FIFO_FULL_MASK		0X02000000
+
+#define XDPDMA_IEN_WR_CMD_FIFO_FULL_SHIFT		24
+#define XDPDMA_IEN_WR_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_IEN_WR_CMD_FIFO_FULL_MASK		0X01000000
+
+#define XDPDMA_IEN_DSCR_ERR5_SHIFT			23
+#define XDPDMA_IEN_DSCR_ERR5_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR5_MASK			0X800000
+
+#define XDPDMA_IEN_DSCR_ERR4_SHIFT			22
+#define XDPDMA_IEN_DSCR_ERR4_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR4_MASK			0X400000
+
+#define XDPDMA_IEN_DSCR_ERR3_SHIFT			21
+#define XDPDMA_IEN_DSCR_ERR3_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR3_MASK			0X200000
+
+#define XDPDMA_IEN_DSCR_ERR2_SHIFT			20
+#define XDPDMA_IEN_DSCR_ERR2_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR2_MASK			0X100000
+
+#define XDPDMA_IEN_DSCR_ERR1_SHIFT			19
+#define XDPDMA_IEN_DSCR_ERR1_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR1_MASK			0X80000
+
+#define XDPDMA_IEN_DSCR_ERR0_SHIFT			18
+#define XDPDMA_IEN_DSCR_ERR0_WIDTH			1
+#define XDPDMA_IEN_DSCR_ERR0_MASK			0X40000
+
+#define XDPDMA_IEN_DATA_AXI_ERR5_SHIFT			17
+#define XDPDMA_IEN_DATA_AXI_ERR5_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR5_MASK			0X20000
+
+#define XDPDMA_IEN_DATA_AXI_ERR4_SHIFT			16
+#define XDPDMA_IEN_DATA_AXI_ERR4_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR4_MASK			0X10000
+
+#define XDPDMA_IEN_DATA_AXI_ERR3_SHIFT			15
+#define XDPDMA_IEN_DATA_AXI_ERR3_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR3_MASK			0X8000
+
+#define XDPDMA_IEN_DATA_AXI_ERR2_SHIFT			14
+#define XDPDMA_IEN_DATA_AXI_ERR2_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR2_MASK			0X4000
+
+#define XDPDMA_IEN_DATA_AXI_ERR1_SHIFT			13
+#define XDPDMA_IEN_DATA_AXI_ERR1_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR1_MASK			0X2000
+
+#define XDPDMA_IEN_DATA_AXI_ERR0_SHIFT			12
+#define XDPDMA_IEN_DATA_AXI_ERR0_WIDTH			1
+#define XDPDMA_IEN_DATA_AXI_ERR0_MASK			0X1000
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN5_SHIFT		11
+#define XDPDMA_IEN_NO_OSTAND_TRAN5_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN5_MASK			0X0800
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN4_SHIFT		10
+#define XDPDMA_IEN_NO_OSTAND_TRAN4_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN4_MASK			0X0400
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN3_SHIFT		9
+#define XDPDMA_IEN_NO_OSTAND_TRAN3_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN3_MASK			0X0200
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN2_SHIFT		8
+#define XDPDMA_IEN_NO_OSTAND_TRAN2_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN2_MASK			0X0100
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN1_SHIFT		7
+#define XDPDMA_IEN_NO_OSTAND_TRAN1_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN1_MASK			0X80
+
+#define XDPDMA_IEN_NO_OSTAND_TRAN0_SHIFT		6
+#define XDPDMA_IEN_NO_OSTAND_TRAN0_WIDTH		1
+#define XDPDMA_IEN_NO_OSTAND_TRAN0_MASK			0X40
+
+#define XDPDMA_IEN_DSCR_DONE5_SHIFT			5
+#define XDPDMA_IEN_DSCR_DONE5_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE5_MASK			0X20
+
+#define XDPDMA_IEN_DSCR_DONE4_SHIFT			4
+#define XDPDMA_IEN_DSCR_DONE4_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE4_MASK			0X10
+
+#define XDPDMA_IEN_DSCR_DONE3_SHIFT			3
+#define XDPDMA_IEN_DSCR_DONE3_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE3_MASK			0X8
+
+#define XDPDMA_IEN_DSCR_DONE2_SHIFT			2
+#define XDPDMA_IEN_DSCR_DONE2_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE2_MASK			0X4
+
+#define XDPDMA_IEN_DSCR_DONE1_SHIFT			1
+#define XDPDMA_IEN_DSCR_DONE1_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE1_MASK			0X2
+
+#define XDPDMA_IEN_DSCR_DONE0_SHIFT			0
+#define XDPDMA_IEN_DSCR_DONE0_WIDTH			1
+#define XDPDMA_IEN_DSCR_DONE0_MASK			0X1
+
+/**
+ * Register: XDPDMA_IDS
+ */
+#define XDPDMA_IDS					0X0010
+
+#define XDPDMA_IDS_VSYNC_INT_SHIFT			27
+#define XDPDMA_IDS_VSYNC_INT_WIDTH			1
+#define XDPDMA_IDS_VSYNC_INT_MASK			0X08000000
+
+#define XDPDMA_IDS_AXI_RD_4K_CROSS_SHIFT		26
+#define XDPDMA_IDS_AXI_RD_4K_CROSS_WIDTH		1
+#define XDPDMA_IDS_AXI_RD_4K_CROSS_MASK		0X04000000
+
+#define XDPDMA_IDS_WR_DATA_FIFO_FULL_SHIFT		25
+#define XDPDMA_IDS_WR_DATA_FIFO_FULL_WIDTH		1
+#define XDPDMA_IDS_WR_DATA_FIFO_FULL_MASK		0X02000000
+
+#define XDPDMA_IDS_WR_CMD_FIFO_FULL_SHIFT		24
+#define XDPDMA_IDS_WR_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_IDS_WR_CMD_FIFO_FULL_MASK		0X01000000
+
+#define XDPDMA_IDS_DSCR_ERR5_SHIFT			23
+#define XDPDMA_IDS_DSCR_ERR5_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR5_MASK			0X800000
+
+#define XDPDMA_IDS_DSCR_ERR4_SHIFT			22
+#define XDPDMA_IDS_DSCR_ERR4_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR4_MASK			0X400000
+
+#define XDPDMA_IDS_DSCR_ERR3_SHIFT			21
+#define XDPDMA_IDS_DSCR_ERR3_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR3_MASK			0X200000
+
+#define XDPDMA_IDS_DSCR_ERR2_SHIFT			20
+#define XDPDMA_IDS_DSCR_ERR2_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR2_MASK			0X100000
+
+#define XDPDMA_IDS_DSCR_ERR1_SHIFT			19
+#define XDPDMA_IDS_DSCR_ERR1_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR1_MASK			0X80000
+
+#define XDPDMA_IDS_DSCR_ERR0_SHIFT			18
+#define XDPDMA_IDS_DSCR_ERR0_WIDTH			1
+#define XDPDMA_IDS_DSCR_ERR0_MASK			0X40000
+
+#define XDPDMA_IDS_DATA_AXI_ERR5_SHIFT			17
+#define XDPDMA_IDS_DATA_AXI_ERR5_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR5_MASK			0X20000
+
+#define XDPDMA_IDS_DATA_AXI_ERR4_SHIFT			16
+#define XDPDMA_IDS_DATA_AXI_ERR4_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR4_MASK			0X10000
+
+#define XDPDMA_IDS_DATA_AXI_ERR3_SHIFT			15
+#define XDPDMA_IDS_DATA_AXI_ERR3_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR3_MASK			0X8000
+
+#define XDPDMA_IDS_DATA_AXI_ERR2_SHIFT			14
+#define XDPDMA_IDS_DATA_AXI_ERR2_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR2_MASK			0X4000
+
+#define XDPDMA_IDS_DATA_AXI_ERR1_SHIFT			13
+#define XDPDMA_IDS_DATA_AXI_ERR1_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR1_MASK			0X2000
+
+#define XDPDMA_IDS_DATA_AXI_ERR0_SHIFT			12
+#define XDPDMA_IDS_DATA_AXI_ERR0_WIDTH			1
+#define XDPDMA_IDS_DATA_AXI_ERR0_MASK			0X1000
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN5_SHIFT		11
+#define XDPDMA_IDS_NO_OSTAND_TRAN5_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN5_MASK			0X0800
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN4_SHIFT		10
+#define XDPDMA_IDS_NO_OSTAND_TRAN4_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN4_MASK			0X0400
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN3_SHIFT		9
+#define XDPDMA_IDS_NO_OSTAND_TRAN3_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN3_MASK			0X0200
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN2_SHIFT		8
+#define XDPDMA_IDS_NO_OSTAND_TRAN2_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN2_MASK			0X0100
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN1_SHIFT		7
+#define XDPDMA_IDS_NO_OSTAND_TRAN1_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN1_MASK			0X80
+
+#define XDPDMA_IDS_NO_OSTAND_TRAN0_SHIFT		6
+#define XDPDMA_IDS_NO_OSTAND_TRAN0_WIDTH		1
+#define XDPDMA_IDS_NO_OSTAND_TRAN0_MASK			0X40
+
+#define XDPDMA_IDS_DSCR_DONE5_SHIFT			5
+#define XDPDMA_IDS_DSCR_DONE5_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE5_MASK			0X20
+
+#define XDPDMA_IDS_DSCR_DONE4_SHIFT			4
+#define XDPDMA_IDS_DSCR_DONE4_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE4_MASK			0X10
+
+#define XDPDMA_IDS_DSCR_DONE3_SHIFT			3
+#define XDPDMA_IDS_DSCR_DONE3_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE3_MASK			0X8
+
+#define XDPDMA_IDS_DSCR_DONE2_SHIFT			2
+#define XDPDMA_IDS_DSCR_DONE2_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE2_MASK			0X4
+
+#define XDPDMA_IDS_DSCR_DONE1_SHIFT			1
+#define XDPDMA_IDS_DSCR_DONE1_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE1_MASK			0X2
+
+#define XDPDMA_IDS_DSCR_DONE0_SHIFT			0
+#define XDPDMA_IDS_DSCR_DONE0_WIDTH			1
+#define XDPDMA_IDS_DSCR_DONE0_MASK			0X1
+
+/**
+ * Register: XDPDMA_EISR
+ */
+#define XDPDMA_EISR					0X0014
+
+#define XDPDMA_EISR_RD_CMD_FIFO_FULL_SHIFT		31
+#define XDPDMA_EISR_RD_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_EISR_RD_CMD_FIFO_FULL_MASK		0X80000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR5_SHIFT		30
+#define XDPDMA_EISR_DSCR_DONE_ERR5_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR5_MASK			0X40000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR4_SHIFT		29
+#define XDPDMA_EISR_DSCR_DONE_ERR4_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR4_MASK			0X20000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR3_SHIFT		28
+#define XDPDMA_EISR_DSCR_DONE_ERR3_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR3_MASK			0X10000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR2_SHIFT		27
+#define XDPDMA_EISR_DSCR_DONE_ERR2_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR2_MASK			0X08000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR1_SHIFT		26
+#define XDPDMA_EISR_DSCR_DONE_ERR1_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR1_MASK			0X04000000
+
+#define XDPDMA_EISR_DSCR_DONE_ERR0_SHIFT		25
+#define XDPDMA_EISR_DSCR_DONE_ERR0_WIDTH		1
+#define XDPDMA_EISR_DSCR_DONE_ERR0_MASK			0X02000000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR5_SHIFT		24
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR5_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR5_MASK		0X01000000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR4_SHIFT		23
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR4_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR4_MASK		0X800000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR3_SHIFT		22
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR3_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR3_MASK		0X400000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR2_SHIFT		21
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR2_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR2_MASK		0X200000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR1_SHIFT		20
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR1_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR1_MASK		0X100000
+
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR0_SHIFT		19
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR0_WIDTH		1
+#define XDPDMA_EISR_DSCR_WR_AXI_ERR0_MASK		0X80000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR5_SHIFT			18
+#define XDPDMA_EISR_DSCR_CRC_ERR5_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR5_MASK			0X40000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR4_SHIFT			17
+#define XDPDMA_EISR_DSCR_CRC_ERR4_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR4_MASK			0X20000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR3_SHIFT			16
+#define XDPDMA_EISR_DSCR_CRC_ERR3_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR3_MASK			0X10000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR2_SHIFT			15
+#define XDPDMA_EISR_DSCR_CRC_ERR2_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR2_MASK			0X8000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR1_SHIFT			14
+#define XDPDMA_EISR_DSCR_CRC_ERR1_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR1_MASK			0X4000
+
+#define XDPDMA_EISR_DSCR_CRC_ERR0_SHIFT			13
+#define XDPDMA_EISR_DSCR_CRC_ERR0_WIDTH			1
+#define XDPDMA_EISR_DSCR_CRC_ERR0_MASK			0X2000
+
+#define XDPDMA_EISR_DSCR_PRE_ERR5_SHIFT			12
+#define XDPDMA_EISR_DSCR_PRE_ERR5_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR5_MASK			0X1000
+
+#define XDPDMA_EISR_DSCR_PRE_ERR4_SHIFT			11
+#define XDPDMA_EISR_DSCR_PRE_ERR4_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR4_MASK			0X0800
+
+#define XDPDMA_EISR_DSCR_PRE_ERR3_SHIFT			10
+#define XDPDMA_EISR_DSCR_PRE_ERR3_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR3_MASK			0X0400
+
+#define XDPDMA_EISR_DSCR_PRE_ERR2_SHIFT			9
+#define XDPDMA_EISR_DSCR_PRE_ERR2_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR2_MASK			0X0200
+
+#define XDPDMA_EISR_DSCR_PRE_ERR1_SHIFT			8
+#define XDPDMA_EISR_DSCR_PRE_ERR1_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR1_MASK			0X0100
+
+#define XDPDMA_EISR_DSCR_PRE_ERR0_SHIFT			7
+#define XDPDMA_EISR_DSCR_PRE_ERR0_WIDTH			1
+#define XDPDMA_EISR_DSCR_PRE_ERR0_MASK			0X80
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR5_SHIFT		6
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR5_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR5_MASK		0X40
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR4_SHIFT		5
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR4_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR4_MASK		0X20
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR3_SHIFT		4
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR3_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR3_MASK		0X10
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR2_SHIFT		3
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR2_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR2_MASK		0X8
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR1_SHIFT		2
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR1_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR1_MASK		0X4
+
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR0_SHIFT		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR0_WIDTH		1
+#define XDPDMA_EISR_DSCR_RD_AXI_ERR0_MASK		0X2
+
+#define XDPDMA_EISR_INV_APB_SHIFT			0
+#define XDPDMA_EISR_INV_APB_WIDTH			1
+#define XDPDMA_EISR_INV_APB_MASK			0X1
+
+/**
+ * Register: XDPDMA_EIMR
+ */
+#define XDPDMA_EIMR					0X0018
+
+#define XDPDMA_EIMR_RD_CMD_FIFO_FULL_SHIFT		31
+#define XDPDMA_EIMR_RD_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_EIMR_RD_CMD_FIFO_FULL_MASK		0X80000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR5_SHIFT		30
+#define XDPDMA_EIMR_DSCR_DONE_ERR5_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR5_MASK			0X40000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR4_SHIFT		29
+#define XDPDMA_EIMR_DSCR_DONE_ERR4_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR4_MASK			0X20000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR3_SHIFT		28
+#define XDPDMA_EIMR_DSCR_DONE_ERR3_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR3_MASK			0X10000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR2_SHIFT		27
+#define XDPDMA_EIMR_DSCR_DONE_ERR2_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR2_MASK			0X08000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR1_SHIFT		26
+#define XDPDMA_EIMR_DSCR_DONE_ERR1_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR1_MASK			0X04000000
+
+#define XDPDMA_EIMR_DSCR_DONE_ERR0_SHIFT		25
+#define XDPDMA_EIMR_DSCR_DONE_ERR0_WIDTH		1
+#define XDPDMA_EIMR_DSCR_DONE_ERR0_MASK			0X02000000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR5_SHIFT		24
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR5_MASK		0X01000000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR4_SHIFT		23
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR4_MASK		0X800000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR3_SHIFT		22
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR3_MASK		0X400000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR2_SHIFT		21
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR2_MASK		0X200000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR1_SHIFT		20
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR1_MASK		0X100000
+
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR0_SHIFT		19
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIMR_DSCR_WR_AXI_ERR0_MASK		0X80000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR5_SHIFT			18
+#define XDPDMA_EIMR_DSCR_CRC_ERR5_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR5_MASK			0X40000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR4_SHIFT			17
+#define XDPDMA_EIMR_DSCR_CRC_ERR4_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR4_MASK			0X20000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR3_SHIFT			16
+#define XDPDMA_EIMR_DSCR_CRC_ERR3_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR3_MASK			0X10000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR2_SHIFT			15
+#define XDPDMA_EIMR_DSCR_CRC_ERR2_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR2_MASK			0X8000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR1_SHIFT			14
+#define XDPDMA_EIMR_DSCR_CRC_ERR1_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR1_MASK			0X4000
+
+#define XDPDMA_EIMR_DSCR_CRC_ERR0_SHIFT			13
+#define XDPDMA_EIMR_DSCR_CRC_ERR0_WIDTH			1
+#define XDPDMA_EIMR_DSCR_CRC_ERR0_MASK			0X2000
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR5_SHIFT			12
+#define XDPDMA_EIMR_DSCR_PRE_ERR5_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR5_MASK			0X1000
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR4_SHIFT			11
+#define XDPDMA_EIMR_DSCR_PRE_ERR4_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR4_MASK			0X0800
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR3_SHIFT			10
+#define XDPDMA_EIMR_DSCR_PRE_ERR3_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR3_MASK			0X0400
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR2_SHIFT			9
+#define XDPDMA_EIMR_DSCR_PRE_ERR2_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR2_MASK			0X0200
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR1_SHIFT			8
+#define XDPDMA_EIMR_DSCR_PRE_ERR1_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR1_MASK			0X0100
+
+#define XDPDMA_EIMR_DSCR_PRE_ERR0_SHIFT			7
+#define XDPDMA_EIMR_DSCR_PRE_ERR0_WIDTH			1
+#define XDPDMA_EIMR_DSCR_PRE_ERR0_MASK			0X80
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR5_SHIFT		6
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR5_MASK		0X40
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR4_SHIFT		5
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR4_MASK		0X20
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR3_SHIFT		4
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR3_MASK		0X10
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR2_SHIFT		3
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR2_MASK		0X8
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR1_SHIFT		2
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR1_MASK		0X4
+
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR0_SHIFT		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIMR_DSCR_RD_AXI_ERR0_MASK		0X2
+
+#define XDPDMA_EIMR_INV_APB_SHIFT			0
+#define XDPDMA_EIMR_INV_APB_WIDTH			1
+#define XDPDMA_EIMR_INV_APB_MASK			0X1
+
+/**
+ * Register: XDPDMA_EIEN
+ */
+#define XDPDMA_EIEN					0X001C
+
+#define XDPDMA_EIEN_RD_CMD_FIFO_FULL_SHIFT		31
+#define XDPDMA_EIEN_RD_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_EIEN_RD_CMD_FIFO_FULL_MASK		0X80000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR5_SHIFT		30
+#define XDPDMA_EIEN_DSCR_DONE_ERR5_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR5_MASK			0X40000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR4_SHIFT		29
+#define XDPDMA_EIEN_DSCR_DONE_ERR4_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR4_MASK			0X20000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR3_SHIFT		28
+#define XDPDMA_EIEN_DSCR_DONE_ERR3_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR3_MASK			0X10000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR2_SHIFT		27
+#define XDPDMA_EIEN_DSCR_DONE_ERR2_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR2_MASK			0X08000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR1_SHIFT		26
+#define XDPDMA_EIEN_DSCR_DONE_ERR1_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR1_MASK			0X04000000
+
+#define XDPDMA_EIEN_DSCR_DONE_ERR0_SHIFT		25
+#define XDPDMA_EIEN_DSCR_DONE_ERR0_WIDTH		1
+#define XDPDMA_EIEN_DSCR_DONE_ERR0_MASK			0X02000000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR5_SHIFT		24
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR5_MASK		0X01000000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR4_SHIFT		23
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR4_MASK		0X800000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR3_SHIFT		22
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR3_MASK		0X400000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR2_SHIFT		21
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR2_MASK		0X200000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR1_SHIFT		20
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR1_MASK		0X100000
+
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR0_SHIFT		19
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIEN_DSCR_WR_AXI_ERR0_MASK		0X80000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR5_SHIFT			18
+#define XDPDMA_EIEN_DSCR_CRC_ERR5_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR5_MASK			0X40000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR4_SHIFT			17
+#define XDPDMA_EIEN_DSCR_CRC_ERR4_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR4_MASK			0X20000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR3_SHIFT			16
+#define XDPDMA_EIEN_DSCR_CRC_ERR3_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR3_MASK			0X10000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR2_SHIFT			15
+#define XDPDMA_EIEN_DSCR_CRC_ERR2_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR2_MASK			0X8000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR1_SHIFT			14
+#define XDPDMA_EIEN_DSCR_CRC_ERR1_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR1_MASK			0X4000
+
+#define XDPDMA_EIEN_DSCR_CRC_ERR0_SHIFT			13
+#define XDPDMA_EIEN_DSCR_CRC_ERR0_WIDTH			1
+#define XDPDMA_EIEN_DSCR_CRC_ERR0_MASK			0X2000
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR5_SHIFT			12
+#define XDPDMA_EIEN_DSCR_PRE_ERR5_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR5_MASK			0X1000
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR4_SHIFT			11
+#define XDPDMA_EIEN_DSCR_PRE_ERR4_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR4_MASK			0X0800
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR3_SHIFT			10
+#define XDPDMA_EIEN_DSCR_PRE_ERR3_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR3_MASK			0X0400
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR2_SHIFT			9
+#define XDPDMA_EIEN_DSCR_PRE_ERR2_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR2_MASK			0X0200
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR1_SHIFT			8
+#define XDPDMA_EIEN_DSCR_PRE_ERR1_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR1_MASK			0X0100
+
+#define XDPDMA_EIEN_DSCR_PRE_ERR0_SHIFT			7
+#define XDPDMA_EIEN_DSCR_PRE_ERR0_WIDTH			1
+#define XDPDMA_EIEN_DSCR_PRE_ERR0_MASK			0X80
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR5_SHIFT		6
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR5_MASK		0X40
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR4_SHIFT		5
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR4_MASK		0X20
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR3_SHIFT		4
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR3_MASK		0X10
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR2_SHIFT		3
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR2_MASK		0X8
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR1_SHIFT		2
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR1_MASK		0X4
+
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR0_SHIFT		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIEN_DSCR_RD_AXI_ERR0_MASK		0X2
+
+#define XDPDMA_EIEN_INV_APB_SHIFT			0
+#define XDPDMA_EIEN_INV_APB_WIDTH			1
+#define XDPDMA_EIEN_INV_APB_MASK			0X1
+
+/**
+ * Register: XDPDMA_EIDS
+ */
+#define XDPDMA_EIDS					0X0020
+
+#define XDPDMA_EIDS_RD_CMD_FIFO_FULL_SHIFT		31
+#define XDPDMA_EIDS_RD_CMD_FIFO_FULL_WIDTH		1
+#define XDPDMA_EIDS_RD_CMD_FIFO_FULL_MASK		0X80000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR5_SHIFT		30
+#define XDPDMA_EIDS_DSCR_DONE_ERR5_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR5_MASK			0X40000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR4_SHIFT		29
+#define XDPDMA_EIDS_DSCR_DONE_ERR4_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR4_MASK			0X20000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR3_SHIFT		28
+#define XDPDMA_EIDS_DSCR_DONE_ERR3_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR3_MASK			0X10000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR2_SHIFT		27
+#define XDPDMA_EIDS_DSCR_DONE_ERR2_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR2_MASK			0X08000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR1_SHIFT		26
+#define XDPDMA_EIDS_DSCR_DONE_ERR1_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR1_MASK			0X04000000
+
+#define XDPDMA_EIDS_DSCR_DONE_ERR0_SHIFT		25
+#define XDPDMA_EIDS_DSCR_DONE_ERR0_WIDTH		1
+#define XDPDMA_EIDS_DSCR_DONE_ERR0_MASK			0X02000000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR5_SHIFT		24
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR5_MASK		0X01000000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR4_SHIFT		23
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR4_MASK		0X800000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR3_SHIFT		22
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR3_MASK		0X400000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR2_SHIFT		21
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR2_MASK		0X200000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR1_SHIFT		20
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR1_MASK		0X100000
+
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR0_SHIFT		19
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIDS_DSCR_WR_AXI_ERR0_MASK		0X80000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR5_SHIFT			18
+#define XDPDMA_EIDS_DSCR_CRC_ERR5_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR5_MASK			0X40000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR4_SHIFT			17
+#define XDPDMA_EIDS_DSCR_CRC_ERR4_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR4_MASK			0X20000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR3_SHIFT			16
+#define XDPDMA_EIDS_DSCR_CRC_ERR3_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR3_MASK			0X10000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR2_SHIFT			15
+#define XDPDMA_EIDS_DSCR_CRC_ERR2_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR2_MASK			0X8000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR1_SHIFT			14
+#define XDPDMA_EIDS_DSCR_CRC_ERR1_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR1_MASK			0X4000
+
+#define XDPDMA_EIDS_DSCR_CRC_ERR0_SHIFT			13
+#define XDPDMA_EIDS_DSCR_CRC_ERR0_WIDTH			1
+#define XDPDMA_EIDS_DSCR_CRC_ERR0_MASK			0X2000
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR5_SHIFT			12
+#define XDPDMA_EIDS_DSCR_PRE_ERR5_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR5_MASK			0X1000
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR4_SHIFT			11
+#define XDPDMA_EIDS_DSCR_PRE_ERR4_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR4_MASK			0X0800
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR3_SHIFT			10
+#define XDPDMA_EIDS_DSCR_PRE_ERR3_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR3_MASK			0X0400
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR2_SHIFT			9
+#define XDPDMA_EIDS_DSCR_PRE_ERR2_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR2_MASK			0X0200
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR1_SHIFT			8
+#define XDPDMA_EIDS_DSCR_PRE_ERR1_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR1_MASK			0X0100
+
+#define XDPDMA_EIDS_DSCR_PRE_ERR0_SHIFT			7
+#define XDPDMA_EIDS_DSCR_PRE_ERR0_WIDTH			1
+#define XDPDMA_EIDS_DSCR_PRE_ERR0_MASK			0X80
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR5_SHIFT		6
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR5_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR5_MASK		0X40
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR4_SHIFT		5
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR4_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR4_MASK		0X20
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR3_SHIFT		4
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR3_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR3_MASK		0X10
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR2_SHIFT		3
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR2_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR2_MASK		0X8
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR1_SHIFT		2
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR1_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR1_MASK		0X4
+
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR0_SHIFT		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR0_WIDTH		1
+#define XDPDMA_EIDS_DSCR_RD_AXI_ERR0_MASK		0X2
+
+#define XDPDMA_EIDS_INV_APB_SHIFT			0
+#define XDPDMA_EIDS_INV_APB_WIDTH			1
+#define XDPDMA_EIDS_INV_APB_MASK			0X1
+
+/**
+ * Register: XDPDMA_CNTL
+ */
+#define XDPDMA_CNTL					0X0100
+
+/**
+ * Register: XDPDMA_GBL
+ */
+#define XDPDMA_GBL					0X0104
+
+#define XDPDMA_GBL_RTRG_CH5_SHIFT			11
+#define XDPDMA_GBL_RTRG_CH5_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH5_MASK			0X0800
+
+#define XDPDMA_GBL_RTRG_CH4_SHIFT			10
+#define XDPDMA_GBL_RTRG_CH4_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH4_MASK			0X0400
+
+#define XDPDMA_GBL_RTRG_CH3_SHIFT			9
+#define XDPDMA_GBL_RTRG_CH3_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH3_MASK			0X0200
+
+#define XDPDMA_GBL_RTRG_CH2_SHIFT			8
+#define XDPDMA_GBL_RTRG_CH2_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH2_MASK			0X0100
+
+#define XDPDMA_GBL_RTRG_CH1_SHIFT			7
+#define XDPDMA_GBL_RTRG_CH1_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH1_MASK			0X80
+
+#define XDPDMA_GBL_RTRG_CH0_SHIFT			6
+#define XDPDMA_GBL_RTRG_CH0_WIDTH			1
+#define XDPDMA_GBL_RTRG_CH0_MASK			0X40
+
+#define XDPDMA_GBL_TRG_CH5_SHIFT			5
+#define XDPDMA_GBL_TRG_CH5_WIDTH			1
+#define XDPDMA_GBL_TRG_CH5_MASK				0X20
+
+#define XDPDMA_GBL_TRG_CH4_SHIFT			4
+#define XDPDMA_GBL_TRG_CH4_WIDTH			1
+#define XDPDMA_GBL_TRG_CH4_MASK				0X10
+
+#define XDPDMA_GBL_TRG_CH3_SHIFT			3
+#define XDPDMA_GBL_TRG_CH3_WIDTH			1
+#define XDPDMA_GBL_TRG_CH3_MASK				0X8
+
+#define XDPDMA_GBL_TRG_CH2_SHIFT			2
+#define XDPDMA_GBL_TRG_CH2_WIDTH			1
+#define XDPDMA_GBL_TRG_CH2_MASK				0X4
+
+#define XDPDMA_GBL_TRG_CH1_SHIFT			1
+#define XDPDMA_GBL_TRG_CH1_WIDTH			1
+#define XDPDMA_GBL_TRG_CH1_MASK				0X2
+
+#define XDPDMA_GBL_TRG_CH0_SHIFT			0
+#define XDPDMA_GBL_TRG_CH0_WIDTH			1
+#define XDPDMA_GBL_TRG_CH0_MASK				0X1
+
+/**
+ * Register: XDPDMA_CH0_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH0_DSCR_STRT_ADDRE			0X0200
+
+/**
+ * Register: XDPDMA_CH0_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH0_DSCR_STRT_ADDR			0X0204
+
+/**
+ * Register: XDPDMA_CH0_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH0_DSCR_NEXT_ADDRE			0X0208
+
+/**
+ * Register: XDPDMA_CH0_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH0_DSCR_NEXT_ADDR			0X020C
+
+/**
+ * Register: XDPDMA_CH0_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH0_PYLD_CUR_ADDRE			0X0210
+
+/**
+ * Register: XDPDMA_CH0_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH0_PYLD_CUR_ADDR			0X0214
+
+/**
+ * Register: XDPDMA_CH0_CNTL
+ */
+#define XDPDMA_CH0_CNTL					0X0218
+
+#define XDPDMA_CNTL_QOS_VIDEO				0x11
+
+/**
+ * Register: XDPDMA_CH0_STATUS
+ */
+#define XDPDMA_CH0_STATUS				0X021C
+
+/**
+ * Register: XDPDMA_CH0_VDO
+ */
+#define XDPDMA_CH0_VDO					0X0220
+
+/**
+ * Register: XDPDMA_CH0_PYLD_SZ
+ */
+#define XDPDMA_CH0_PYLD_SZ				0X0224
+
+/**
+ * Register: XDPDMA_CH0_DSCR_ID
+ */
+#define XDPDMA_CH0_DSCR_ID				0X0228
+
+/**
+ * Register: XDPDMA_CH1_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH1_DSCR_STRT_ADDRE			0X0300
+
+/**
+ * Register: XDPDMA_CH1_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH1_DSCR_STRT_ADDR			0X0304
+
+/**
+ * Register: XDPDMA_CH1_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH1_DSCR_NEXT_ADDRE			0X0308
+
+/**
+ * Register: XDPDMA_CH1_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH1_DSCR_NEXT_ADDR			0X030C
+
+/**
+ * Register: XDPDMA_CH1_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH1_PYLD_CUR_ADDRE			0X0310
+
+/**
+ * Register: XDPDMA_CH1_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH1_PYLD_CUR_ADDR			0X0314
+
+/**
+ * Register: XDPDMA_CH1_CNTL
+ */
+#define XDPDMA_CH1_CNTL					0X0318
+/**
+ * Register: XDPDMA_CH1_STATUS
+ */
+#define XDPDMA_CH1_STATUS				0X031C
+
+/**
+ * Register: XDPDMA_CH1_VDO
+ */
+#define XDPDMA_CH1_VDO					0X0320
+
+/**
+ * Register: XDPDMA_CH1_PYLD_SZ
+ */
+#define XDPDMA_CH1_PYLD_SZ				0X0324
+
+/**
+ * Register: XDPDMA_CH1_DSCR_ID
+ */
+#define XDPDMA_CH1_DSCR_ID				0X0328
+
+/**
+ * Register: XDPDMA_CH2_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH2_DSCR_STRT_ADDRE			0X0400
+
+/**
+ * Register: XDPDMA_CH2_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH2_DSCR_STRT_ADDR			0X0404
+
+/**
+ * Register: XDPDMA_CH2_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH2_DSCR_NEXT_ADDRE			0X0408
+
+/**
+ * Register: XDPDMA_CH2_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH2_DSCR_NEXT_ADDR			0X040C
+
+/**
+ * Register: XDPDMA_CH2_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH2_PYLD_CUR_ADDRE			0X0410
+
+/**
+ * Register: XDPDMA_CH2_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH2_PYLD_CUR_ADDR			0X0414
+
+/**
+ * Register: XDPDMA_CH2_CNTL
+ */
+#define XDPDMA_CH2_CNTL					0X0418
+
+/**
+ * Register: XDPDMA_CH2_STATUS
+ */
+#define XDPDMA_CH2_STATUS				0X041C
+
+/**
+ * Register: XDPDMA_CH2_VDO
+ */
+#define XDPDMA_CH2_VDO					0X0420
+
+/**
+ * Register: XDPDMA_CH2_PYLD_SZ
+ */
+#define XDPDMA_CH2_PYLD_SZ				0X0424
+
+/**
+ * Register: XDPDMA_CH2_DSCR_ID
+ */
+#define XDPDMA_CH2_DSCR_ID				0X0428
+
+/**
+ * Register: XDPDMA_CH3_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH3_DSCR_STRT_ADDRE			0X0500
+
+/**
+ * Register: XDPDMA_CH3_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH3_DSCR_STRT_ADDR			0X0504
+
+/**
+ * Register: XDPDMA_CH3_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH3_DSCR_NEXT_ADDRE			0X0508
+
+/**
+ * Register: XDPDMA_CH3_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH3_DSCR_NEXT_ADDR			0X050C
+
+/**
+ * Register: XDPDMA_CH3_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH3_PYLD_CUR_ADDRE			0X0510
+
+/**
+ * Register: XDPDMA_CH3_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH3_PYLD_CUR_ADDR			0X0514
+
+/**
+ * Register: XDPDMA_CH3_CNTL
+ */
+#define XDPDMA_CH3_CNTL					0X0518
+/**
+ * Register: XDPDMA_CH3_STATUS
+ */
+#define XDPDMA_CH3_STATUS				0X051C
+
+/**
+ * Register: XDPDMA_CH3_VDO
+ */
+#define XDPDMA_CH3_VDO					0X0520
+
+/**
+ * Register: XDPDMA_CH3_PYLD_SZ
+ */
+#define XDPDMA_CH3_PYLD_SZ				0X0524
+
+/**
+ * Register: XDPDMA_CH3_DSCR_ID
+ */
+#define XDPDMA_CH3_DSCR_ID				0X0528
+
+/**
+ * Register: XDPDMA_CH4_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH4_DSCR_STRT_ADDRE			0X0600
+
+/**
+ * Register: XDPDMA_CH4_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH4_DSCR_STRT_ADDR			0X0604
+/**
+ * Register: XDPDMA_CH4_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH4_DSCR_NEXT_ADDRE			0X0608
+
+/**
+ * Register: XDPDMA_CH4_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH4_DSCR_NEXT_ADDR			0X060C
+
+/**
+ * Register: XDPDMA_CH4_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH4_PYLD_CUR_ADDRE			0X0610
+
+/**
+ * Register: XDPDMA_CH4_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH4_PYLD_CUR_ADDR			0X0614
+
+/**
+ * Register: XDPDMA_CH4_CNTL
+ */
+#define XDPDMA_CH4_CNTL					0X0618
+
+/**
+ * Register: XDPDMA_CH4_STATUS
+ */
+#define XDPDMA_CH4_STATUS				0X061C
+
+/**
+ * Register: XDPDMA_CH4_VDO
+ */
+#define XDPDMA_CH4_VDO					0X0620
+
+/**
+ * Register: XDPDMA_CH4_PYLD_SZ
+ */
+#define XDPDMA_CH4_PYLD_SZ				0X0624
+
+/**
+ * Register: XDPDMA_CH4_DSCR_ID
+ */
+#define XDPDMA_CH4_DSCR_ID				0X0628
+
+/**
+ * Register: XDPDMA_CH5_DSCR_STRT_ADDRE
+ */
+#define XDPDMA_CH5_DSCR_STRT_ADDRE			0X0700
+
+/**
+ * Register: XDPDMA_CH5_DSCR_STRT_ADDR
+ */
+#define XDPDMA_CH5_DSCR_STRT_ADDR			0X0704
+
+/**
+ * Register: XDPDMA_CH5_DSCR_NEXT_ADDRE
+ */
+#define XDPDMA_CH5_DSCR_NEXT_ADDRE			0X0708
+
+/**
+ * Register: XDPDMA_CH5_DSCR_NEXT_ADDR
+ */
+#define XDPDMA_CH5_DSCR_NEXT_ADDR			0X070C
+
+/**
+ * Register: XDPDMA_CH5_PYLD_CUR_ADDRE
+ */
+#define XDPDMA_CH5_PYLD_CUR_ADDRE			0X0710
+
+/**
+ * Register: XDPDMA_CH5_PYLD_CUR_ADDR
+ */
+#define XDPDMA_CH5_PYLD_CUR_ADDR			0X0714
+
+/**
+ * Register: XDPDMA_CH5_CNTL
+ */
+#define XDPDMA_CH5_CNTL					0X0718
+
+/**
+ * Register: XDPDMA_CH5_STATUS
+ */
+#define XDPDMA_CH5_STATUS				0X071C
+
+/**
+ * Register: XDPDMA_CH5_VDO
+ */
+#define XDPDMA_CH5_VDO					0X0720
+
+/**
+ * Register: XDPDMA_CH5_PYLD_SZ
+ */
+#define XDPDMA_CH5_PYLD_SZ				0X0724
+
+/**
+ * Register: XDPDMA_CH5_DSCR_ID
+ */
+#define XDPDMA_CH5_DSCR_ID				0X0728
+
+
+#define XDPDMA_CH_DSCR_STRT_ADDRE_MSB_SHIFT		0
+#define XDPDMA_CH_DSCR_STRT_ADDRE_MSB_WIDTH		16
+#define XDPDMA_CH_DSCR_STRT_ADDRE_MSB_MASK		0XFFFF
+
+
+#define XDPDMA_CH_DSCR_STRT_ADDR_LSB_SHIFT		0
+#define XDPDMA_CH_DSCR_STRT_ADDR_LSB_WIDTH		32
+#define XDPDMA_CH_DSCR_STRT_ADDR_LSB_MASK		0XFFFFFFFF
+
+
+#define XDPDMA_CH_DSCR_NEXT_ADDRE_MSB_SHIFT		0
+#define XDPDMA_CH_DSCR_NEXT_ADDRE_MSB_WIDTH		16
+#define XDPDMA_CH_DSCR_NEXT_ADDRE_MSB_MASK		0XFFFF
+
+
+#define XDPDMA_CH_DSCR_NEXT_ADDR_LSB_SHIFT		0
+#define XDPDMA_CH_DSCR_NEXT_ADDR_LSB_WIDTH		32
+#define XDPDMA_CH_DSCR_NEXT_ADDR_LSB_MASK		0XFFFFFFFF
+
+
+#define XDPDMA_CH_PYLD_CUR_ADDRE_MSB_SHIFT		0
+#define XDPDMA_CH_PYLD_CUR_ADDRE_MSB_WIDTH		16
+#define XDPDMA_CH_PYLD_CUR_ADDRE_MSB_MASK		0XFFFF
+
+#define XDPDMA_CH_PYLD_CUR_ADDR_LSB_SHIFT		0
+#define XDPDMA_CH_PYLD_CUR_ADDR_LSB_WIDTH		32
+#define XDPDMA_CH_PYLD_CUR_ADDR_LSB_MASK		0XFFFFFFFF
+
+#define XDPDMA_CH_CNTL_DSCR_AXCACHE_SHIFT		16
+#define XDPDMA_CH_CNTL_DSCR_AXCACHE_WIDTH		4
+#define XDPDMA_CH_CNTL_DSCR_AXCACHE_MASK		0XF0000
+
+#define XDPDMA_CH_CNTL_DSCR_AXPROT_SHIFT		14
+#define XDPDMA_CH_CNTL_DSCR_AXPROT_WIDTH		2
+#define XDPDMA_CH_CNTL_DSCR_AXPROT_MASK			0XC000
+
+#define XDPDMA_CH_CNTL_QOS_DATA_RD_SHIFT		10
+#define XDPDMA_CH_CNTL_QOS_DATA_RD_WIDTH		4
+#define XDPDMA_CH_CNTL_QOS_DATA_RD_MASK			0X3C00
+
+#define XDPDMA_CH_CNTL_QOS_DSCR_RD_SHIFT		6
+#define XDPDMA_CH_CNTL_QOS_DSCR_RD_WIDTH		4
+#define XDPDMA_CH_CNTL_QOS_DSCR_RD_MASK			0X03C0
+
+#define XDPDMA_CH_CNTL_QOS_DSCR_WR_SHIFT		2
+#define XDPDMA_CH_CNTL_QOS_DSCR_WR_WIDTH		4
+#define XDPDMA_CH_CNTL_QOS_DSCR_WR_MASK			0X3C
+
+#define XDPDMA_CH_CNTL_PAUSE_SHIFT			1
+#define XDPDMA_CH_CNTL_PAUSE_WIDTH			1
+#define XDPDMA_CH_CNTL_PAUSE_MASK			0X2
+
+#define XDPDMA_CH_CNTL_EN_SHIFT				0
+#define XDPDMA_CH_CNTL_EN_WIDTH				1
+#define XDPDMA_CH_CNTL_EN_MASK				0X1
+
+
+#define XDPDMA_CH_STATUS_OTRAN_CNT_SHIFT		21
+#define XDPDMA_CH_STATUS_OTRAN_CNT_WIDTH		4
+#define XDPDMA_CH_STATUS_OTRAN_CNT_MASK			0X01E00000
+
+#define XDPDMA_CH_STATUS_PREAMBLE_SHIFT			13
+#define XDPDMA_CH_STATUS_PREAMBLE_WIDTH			8
+#define XDPDMA_CH_STATUS_PREAMBLE_MASK			0X1FE000
+
+#define XDPDMA_CH_STATUS_EN_DSCR_INTR_SHIFT		12
+#define XDPDMA_CH_STATUS_EN_DSCR_INTR_WIDTH		1
+#define XDPDMA_CH_STATUS_EN_DSCR_INTR_MASK		0X1000
+
+#define XDPDMA_CH_STATUS_EN_DSCR_UP_SHIFT		11
+#define XDPDMA_CH_STATUS_EN_DSCR_UP_WIDTH		1
+#define XDPDMA_CH_STATUS_EN_DSCR_UP_MASK		0X0800
+
+#define XDPDMA_CH_STATUS_DSCR_DONE_SHIFT		10
+#define XDPDMA_CH_STATUS_DSCR_DONE_WIDTH		1
+#define XDPDMA_CH_STATUS_DSCR_DONE_MASK			0X0400
+
+#define XDPDMA_CH_STATUS_IGNR_DONE_SHIFT		9
+#define XDPDMA_CH_STATUS_IGNR_DONE_WIDTH		1
+#define XDPDMA_CH_STATUS_IGNR_DONE_MASK			0X0200
+
+#define XDPDMA_CH_STATUS_LDSCR_FRAME_SHIFT		8
+#define XDPDMA_CH_STATUS_LDSCR_FRAME_WIDTH		1
+#define XDPDMA_CH_STATUS_LDSCR_FRAME_MASK		0X0100
+
+#define XDPDMA_CH_STATUS_LAST_DSCR_SHIFT		7
+#define XDPDMA_CH_STATUS_LAST_DSCR_WIDTH		1
+#define XDPDMA_CH_STATUS_LAST_DSCR_MASK			0X80
+
+#define XDPDMA_CH_STATUS_EN_CRC_SHIFT			6
+#define XDPDMA_CH_STATUS_EN_CRC_WIDTH			1
+#define XDPDMA_CH_STATUS_EN_CRC_MASK			0X40
+
+#define XDPDMA_CH_STATUS_MODE_SHIFT			5
+#define XDPDMA_CH_STATUS_MODE_WIDTH			1
+#define XDPDMA_CH_STATUS_MODE_MASK			0X20
+
+#define XDPDMA_CH_STATUS_BURST_TYPE_SHIFT		4
+#define XDPDMA_CH_STATUS_BURST_TYPE_WIDTH		1
+#define XDPDMA_CH_STATUS_BURST_TYPE_MASK		0X10
+
+#define XDPDMA_CH_STATUS_BURST_LEN_SHIFT		0
+#define XDPDMA_CH_STATUS_BURST_LEN_WIDTH		4
+#define XDPDMA_CH_STATUS_BURST_LEN_MASK			0XF
+
+
+#define XDPDMA_CH_VDO_LINE_LENGTH_SHIFT			14
+#define XDPDMA_CH_VDO_LINE_LENGTH_WIDTH			18
+#define XDPDMA_CH_VDO_LINE_LENGTH_MASK			0XFFFFC000
+
+#define XDPDMA_CH_VDO_STRIDE_SHIFT			0
+#define XDPDMA_CH_VDO_STRIDE_WIDTH			14
+#define XDPDMA_CH_VDO_STRIDE_MASK			0X3FFF
+
+#define XDPDMA_CH_PYLD_SZ_BYTE_SHIFT			0
+#define XDPDMA_CH_PYLD_SZ_BYTE_WIDTH			32
+#define XDPDMA_CH_PYLD_SZ_BYTE_MASK			0XFFFFFFFF
+
+#define XDPDMA_CH_DSCR_ID_VAL_SHIFT			0
+#define XDPDMA_CH_DSCR_ID_VAL_WIDTH			16
+#define XDPDMA_CH_DSCR_ID_VAL_MASK			0XFFFF
+
+/**
+ * Register: XDPDMA_ECO
+ */
+#define XDPDMA_ECO					0X0FFC
+
+#define XDPDMA_ECO_VAL_SHIFT				0
+#define XDPDMA_ECO_VAL_WIDTH				32
+#define XDPDMA_ECO_VAL_MASK				0XFFFFFFFF
+
+/**
+ * DPDMA descriptor
+ */
+
+#define XDPDMA_DESCRIPTOR_CONTROL_PREAMBLE_SHIFT		0
+#define XDPDMA_DESCRIPTOR_CONTROL_PREAMBLE_WIDTH		8
+#define XDPDMA_DESCRIPTOR_CONTROL_PREAMBLE_MASK			0XFF
+
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_COMP_INTR_SHIFT		8
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_COMP_INTR_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_COMP_INTR_MASK		0X0100
+
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_DESC_UPDATE_SHIFT		9
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_DESC_UPDATE_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_EN_DESC_UPDATE_MASK		0X0200
+
+#define XDPDMA_DESCRIPTOR_CONTROL_IGNORE_DONE_SHIFT		10
+#define XDPDMA_DESCRIPTOR_CONTROL_IGNORE_DONE_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_IGNORE_DONE_MASK		0X0400
+
+#define XDPDMA_DESCRIPTOR_CONTROL_AXI_BURST_TYPE_SHIFT		11
+#define XDPDMA_DESCRIPTOR_CONTROL_AXI_BURST_TYPE_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_AXI_BURST_TYPE_MASK		0X0800
+
+#define XDPDMA_DESCRIPTOR_CONTROL_AXACACHE_SHIFT		12
+#define XDPDMA_DESCRIPTOR_CONTROL_AXACACHE_WIDTH		4
+#define XDPDMA_DESCRIPTOR_CONTROL_AXACACHE_MASK			0XF000
+
+#define XDPDMA_DESCRIPTOR_CONTROL_AXPROT_SHIFT			16
+#define XDPDMA_DESCRIPTOR_CONTROL_AXPROT_WIDTH			2
+#define XDPDMA_DESCRIPTOR_CONTROL_AXPROT_MASK			0X30000
+
+#define XDPDMA_DESCRIPTOR_CONTROL_MODE_SHIFT			18
+#define XDPDMA_DESCRIPTOR_CONTROL_MODE_WIDTH			1
+#define XDPDMA_DESCRIPTOR_CONTROL_MODE_MASK			0X40000
+
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_SHIFT		19
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_MASK		0X80000
+
+#define XDPDMA_DESCRIPTOR_CONTROL_ENABLE_CRC_SHIFT		20
+#define XDPDMA_DESCRIPTOR_CONTROL_ENABLE_CRC_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_ENABLE_CRC_MASK		0x00100000
+
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_FRAME_SHIFT		21
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_FRAME_WIDTH		1
+#define XDPDMA_DESCRIPTOR_CONTROL_LAST_DESC_FRAME_MASK		0X200000
+
+#define XDPDMA_DESCRIPTOR_DSCR_ID_SHIFT				0
+#define XDPDMA_DESCRIPTOR_DSCR_ID_WIDTH				16
+#define XDPDMA_DESCRIPTOR_DSCR_ID_MASK				0XFFFF
+
+#define XDPDMA_DESCRIPTOR_XFER_SIZE_SHIFT			0
+#define XDPDMA_DESCRIPTOR_XFER_SIZE_WIDTH			32
+#define XDPDMA_DESCRIPTOR_XFER_SIZE_MASK			0x0000FFFF
+
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_HZ_RES_SHIFT		0
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_HZ_RES_WIDTH		18
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_HZ_RES_MASK			0X3FFFF
+
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_STRIDE_SHIFT		18
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_STRIDE_WIDTH		14
+#define XDPDMA_DESCRIPTOR_LINE_SIZE_STRIDE_MASK			0XFFFC0000
+
+#define XDPDMA_DESCRIPTOR_TS_LSB_SHIFT				0
+#define XDPDMA_DESCRIPTOR_TS_LSB_WIDTH				32
+#define XDPDMA_DESCRIPTOR_TS_LSB_MASK				0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_TS_MSB_SHIFT				0
+#define XDPDMA_DESCRIPTOR_TS_MSB_WIDTH				32
+#define XDPDMA_DESCRIPTOR_TS_MSB_MASK				0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_TS_MSB_TS_SHIFT			0
+#define XDPDMA_DESCRIPTOR_TS_MSB_TS_WIDTH			9
+#define XDPDMA_DESCRIPTOR_TS_MSB_TS_MASK			0X01FF
+
+#define XDPDMA_DESCRIPTOR_TS_MSB_STATUS_SHIFT			31
+#define XDPDMA_DESCRIPTOR_TS_MSB_STATUS_WIDTH			1
+#define XDPDMA_DESCRIPTOR_TS_MSB_STATUS_MASK			0X80000000
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_DSC_NXT_SHIFT		0
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_DSC_NXT_WIDTH		16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_DSC_NXT_MASK			0XFFFF
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_SRC_ADDR_EXT_SHIFT		16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_SRC_ADDR_EXT_WIDTH		16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT_SRC_ADDR_EXT_MASK		0XFFFF0000
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_2_SHIFT			0
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_2_WIDTH			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_2_MASK			0XFFFF
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_3_SHIFT			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_3_WIDTH			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT23_3_MASK			0xFFFF0000
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_4_SHIFT			0
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_4_WIDTH			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_4_MASK			0XFFFF
+
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_5_SHIFT			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_5_WIDTH			16
+#define XDPDMA_DESCRIPTOR_ADDR_EXT45_5_MASK			0XFFFF0000
+
+#define XDPDMA_DESCRIPTOR_NEXT_DESR_SHIFT			0
+#define XDPDMA_DESCRIPTOR_NEXT_DESR_WIDTH			32
+#define XDPDMA_DESCRIPTOR_NEXT_DESR_MASK			0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_SRC_ADDR_SHIFT			0
+#define XDPDMA_DESCRIPTOR_SRC_ADDR_WIDTH			32
+#define XDPDMA_DESCRIPTOR_SRC_ADDR_MASK				0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_SRC_ADDR2_SHIFT			0
+#define XDPDMA_DESCRIPTOR_SRC_ADDR2_WIDTH			32
+#define XDPDMA_DESCRIPTOR_SRC_ADDR2_MASK			0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_SRC_ADDR3_SHIFT			0
+#define XDPDMA_DESCRIPTOR_SRC_ADDR3_WIDTH			32
+#define XDPDMA_DESCRIPTOR_SRC_ADDR3_MASK			0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_SRC_ADDR4_SHIFT			0
+#define XDPDMA_DESCRIPTOR_SRC_ADDR4_WIDTH			32
+#define XDPDMA_DESCRIPTOR_SRC_ADDR4_MASK			0XFFFFFFFF
+
+#define XDPDMA_DESCRIPTOR_SRC_ADDR5_SHIFT			0
+#define XDPDMA_DESCRIPTOR_SRC_ADDR5_WIDTH			32
+#define XDPDMA_DESCRIPTOR_SRC_ADDR5_MASK			0XFFFFFFFF
+
+#define XDPDMA_TRIGGER_EN					1
+#define XDPDMA_RETRIGGER_EN					2
+#define XDPDMA_TRIGGER_DONE					0
+#define XDPDMA_RETRIGGER_DONE					0
+/* @} */
+
+/******************* Macros (Inline Functions Definitions ********************/
+
+/** @name Register access macro definitions.
+  * @{
+  */
+#define XDpDma_In32 Xil_In32
+#define XDpDma_Out32 Xil_Out32
+/* @} */
+
+/******************************************************************************/
+/**
+ * This is a low-level function that reads from the specified register.
+ *
+ * @param	BaseAddress is the base address of the device.
+ * @param	RegOffset is the register offset to be read from.
+ *
+ * @return	The 32-bit value of the specified register.
+ *
+ * @note	C-style signature:
+ *		u32 XDpDma_ReadReg(u32 BaseAddress, u32 RegOffset
+ *
+*******************************************************************************/
+#define XDpDma_ReadReg(BaseAddress, RegOffset) \
+					XDpDma_In32((BaseAddress) + (RegOffset))
+
+/******************************************************************************/
+/**
+ * This is a low-level function that writes to the specified register.
+ *
+ * @param	BaseAddress is the base address of the device.
+ * @param	RegOffset is the register offset to write to.
+ * @param	Data is the 32-bit data to write to the specified register.
+ *
+ * @return	None.
+ *
+ * @note	C-style signature:
+ *		void XDpDma_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+ *
+*******************************************************************************/
+#define XDpDma_WriteReg(BaseAddress, RegOffset, Data) \
+				XDpDma_Out32((BaseAddress) + (RegOffset), (Data))
+
+
+/******************************************************************************/
+/**
+ * This is a low-level function that writes to the specified register.
+ *
+ * @param	BaseAddress is the base address of the device.
+ * @param	RegOffset is the register offset to write to.
+ * @param	Data is the 32-bit data to write to the specified register.
+ * @param	Mask is the 32-bit field to which data is to be written
+ *
+ * @return	None.
+ *
+ * @note	C-style signature:
+ *		void XDpDma_ReadModifyWrite(u32 BaseAddress,
+ *							u32 RegOffset, u32 Data)
+ *
+*******************************************************************************/
+#define XDpDma_ReadModifyWrite(BaseAddress, RegOffset, Data, Mask) \
+				XDpDma_WriteReg((BaseAddress), (RegOffset), \
+				((XDpDma_ReadReg(BaseAddress, RegOffset) &  \
+				 ~(Mask)) | Data))
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* _XDPDMAHW_H_ */
diff --git a/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_intr.c b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_intr.c
new file mode 100644
index 0000000..80b175d
--- /dev/null
+++ b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_intr.c
@@ -0,0 +1,166 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xdppsu_intr.c
+ *
+ * This file contains functions related to XDpPsu interrupt handling.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   aad  01/17/17 Initial release.
+ * 

+ *
+*******************************************************************************/
+
+/******************************* Include Files ********************************/
+#include "xdpdma.h"
+
+
+/*************************************************************************/
+/**
+ *
+ * This function enables the interrupts that are required.
+ *
+ * @param    InstancePtr is pointer to the instance of DPDMA
+ *
+ * @return   None.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+void XDpDma_InterruptEnable(XDpDma *InstancePtr, u32 Mask)
+{
+	XDpDma_WriteReg(InstancePtr->Config.BaseAddr, XDPDMA_IEN, Mask);
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function handles the interrupts generated by DPDMA
+ *
+ * @param    InstancePtr is pointer to the instance of the DPDMA
+ *
+ * @return   None.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+void XDpDma_InterruptHandler(XDpDma *InstancePtr)
+{
+	u32 RegVal;
+	RegVal = XDpDma_ReadReg(InstancePtr->Config.BaseAddr,
+				XDPDMA_ISR);
+	if(RegVal & XDPDMA_ISR_VSYNC_INT_MASK) {
+		XDpDma_VSyncHandler(InstancePtr);
+	}
+
+	if(RegVal & XDPDMA_ISR_DSCR_DONE4_MASK) {
+		XDpDma_SetChannelState(InstancePtr, AudioChan0, XDPDMA_DISABLE);
+		InstancePtr->Audio[0].Current = NULL;
+		XDpDma_WriteReg(InstancePtr->Config.BaseAddr, XDPDMA_ISR,
+				XDPDMA_ISR_DSCR_DONE4_MASK);
+	}
+
+	if(RegVal & XDPDMA_ISR_DSCR_DONE5_MASK) {
+		XDpDma_SetChannelState(InstancePtr, AudioChan1, XDPDMA_DISABLE);
+		InstancePtr->Audio[1].Current = NULL;
+		XDpDma_WriteReg(InstancePtr->Config.BaseAddr, XDPDMA_ISR,
+				XDPDMA_ISR_DSCR_DONE5_MASK);
+	}
+}
+
+/*************************************************************************/
+/**
+ *
+ * This function handles frame new frames on VSync
+ *
+ * @param    InstancePtr is pointer to the instance of the driver.
+ *
+ * @return   None.
+ *
+ * @note     None.
+ *
+ * **************************************************************************/
+void XDpDma_VSyncHandler(XDpDma *InstancePtr)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	/* Video Channel Trigger/Retrigger Handler */
+	if(InstancePtr->Video.TriggerStatus == XDPDMA_TRIGGER_EN) {
+		XDpDma_SetupChannel(InstancePtr, VideoChan);
+		XDpDma_SetChannelState(InstancePtr, VideoChan,
+				       XDPDMA_ENABLE);
+		XDpDma_Trigger(InstancePtr, VideoChan);
+	}
+	else if(InstancePtr->Video.TriggerStatus == XDPDMA_RETRIGGER_EN) {
+		XDpDma_SetupChannel(InstancePtr, VideoChan);
+		XDpDma_ReTrigger(InstancePtr, VideoChan);
+	}
+
+	/* Graphics Channel Trigger/Retrigger Handler */
+	if(InstancePtr->Gfx.TriggerStatus == XDPDMA_TRIGGER_EN) {
+		XDpDma_SetupChannel(InstancePtr, GraphicsChan);
+		XDpDma_SetChannelState(InstancePtr, GraphicsChan,
+				       XDPDMA_ENABLE);
+		XDpDma_Trigger(InstancePtr, GraphicsChan);
+	}
+	else if(InstancePtr->Gfx.TriggerStatus == XDPDMA_RETRIGGER_EN) {
+		XDpDma_SetupChannel(InstancePtr, GraphicsChan);
+		XDpDma_ReTrigger(InstancePtr, GraphicsChan);
+	}
+
+	/* Audio Channel 0 Trigger Handler */
+	if(InstancePtr->Audio[0].TriggerStatus == XDPDMA_TRIGGER_EN) {
+		XDpDma_SetupChannel(InstancePtr, AudioChan0);
+		XDpDma_SetChannelState(InstancePtr, AudioChan0,
+				       XDPDMA_ENABLE);
+		XDpDma_Trigger(InstancePtr, AudioChan0);
+	}
+
+	/* Audio Channel 1 Trigger Handler */
+	if(InstancePtr->Audio[1].TriggerStatus == XDPDMA_TRIGGER_EN) {
+		XDpDma_SetupChannel(InstancePtr, AudioChan1);
+		XDpDma_SetChannelState(InstancePtr, AudioChan1,
+				       XDPDMA_ENABLE);
+		XDpDma_Trigger(InstancePtr, AudioChan1);
+	}
+	/* Clear VSync Interrupt */
+	XDpDma_WriteReg(InstancePtr->Config.BaseAddr, XDPDMA_ISR,
+			XDPDMA_ISR_VSYNC_INT_MASK);
+}
diff --git a/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_sinit.c b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_sinit.c
new file mode 100644
index 0000000..8f06268
--- /dev/null
+++ b/src/Xilinx/libsrc/dpdma_v1_0/src/xdpdma_sinit.c
@@ -0,0 +1,96 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xdpdma_sinit.c
+ * @addtogroup dpdma_v1_0
+ * @{
+ *
+ * This file contains static initialization methods for the XDpDma driver.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   aad  01/20/15 Initial release.
+ * 

+ *
+*******************************************************************************/
+
+/******************************* Include Files ********************************/
+
+#include "xdpdma.h"
+#include "xparameters.h"
+
+/*************************** Variable Declarations ****************************/
+
+/**
+ * A table of configuration structures containing the configuration information
+ * for each DisplayPort TX core in the system.
+ */
+extern XDpDma_Config XDpDma_ConfigTable[XPAR_XDPDMA_NUM_INSTANCES];
+
+/**************************** Function Definitions ****************************/
+
+/******************************************************************************/
+/**
+ * This function looks for the device configuration based on the unique device
+ * ID. The table XDpDma_ConfigTable[] contains the configuration information for
+ * each device in the system.
+ *
+ * @param	DeviceId is the unique device ID of the device being looked up.
+ *
+ * @return	A pointer to the configuration table entry corresponding to the
+ *		given device ID, or NULL if no match is found.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+XDpDma_Config *XDpDma_LookupConfig(u16 DeviceId)
+{
+	XDpDma_Config *CfgPtr;
+	u32 Index;
+
+	for (Index = 0; Index < XPAR_XDPDMA_NUM_INSTANCES; Index++) {
+		if (XDpDma_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XDpDma_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/Makefile b/src/Xilinx/libsrc/emacps_v3_7/src/Makefile
new file mode 100644
index 0000000..7002e62
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xemacps_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling emacps"
+
+xemacps_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xemacps_includes
+
+xemacps_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/subdir.mk b/src/Xilinx/libsrc/emacps_v3_7/src/subdir.mk
new file mode 100644
index 0000000..fbf4dea
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/subdir.mk
@@ -0,0 +1,6 @@
+SRC += $(SRC_DIR)/Xilinx/libsrc/emacps_v3_7/src/xemacps.c
+SRC += $(SRC_DIR)/Xilinx/libsrc/emacps_v3_7/src/xemacps_control.c
+SRC += $(SRC_DIR)/Xilinx/libsrc/emacps_v3_7/src/xemacps_intr.c
+SRC += $(SRC_DIR)/Xilinx/libsrc/emacps_v3_7/src/xemacps_bdring.c
+SRC += $(SRC_DIR)/Xilinx/libsrc/emacps_v3_7/src/xemacps_hw.c
+#SRC += $(SRC_DIR)/Xilinx/libsrc/emacps_v3_7/src/xemacps_g.c
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps.c b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps.c
new file mode 100644
index 0000000..c013c49
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps.c
@@ -0,0 +1,492 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xemacps.c
+* @addtogroup emacps_v3_7
+* @{
+*
+* The XEmacPs driver. Functions in this file are the minimum required functions
+* for this driver. See xemacps.h for a detailed description of the driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a wsy  01/10/10 First release
+* 2.1  srt  07/15/14 Add support for Zynq Ultrascale Mp GEM specification and
+*		      64-bit changes.
+* 3.00 kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.0  hk   02/20/15 Added support for jumbo frames. Increase AHB burst.
+*                    Disable extended mode. Perform all 64 bit changes under
+*                    check for arch64.
+* 3.1  hk   08/10/15 Update upper 32 bit tx and rx queue ptr registers
+* 3.5  hk   08/14/17 Update cache coherency information of the interface in
+*                    its config structure.
+*
+* 

+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xemacps.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+void XEmacPs_StubHandler(void);	/* Default handler routine */
+
+/************************** Variable Definitions *****************************/
+
+
+/*****************************************************************************/
+/**
+* Initialize a specific XEmacPs instance/driver. The initialization entails:
+* - Initialize fields of the XEmacPs instance structure
+* - Reset hardware and apply default options
+* - Configure the DMA channels
+*
+* The PHY is setup independently from the device. Use the MII or whatever other
+* interface may be present for setup.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param CfgPtr is the device configuration structure containing required
+*        hardware build data.
+* @param EffectiveAddress is the base address of the device. If address
+*        translation is not utilized, this parameter can be passed in using
+*        CfgPtr->Config.BaseAddress to specify the physical base address.
+*
+* @return
+* - XST_SUCCESS if initialization was successful
+*
+******************************************************************************/
+LONG XEmacPs_CfgInitialize(XEmacPs *InstancePtr, XEmacPs_Config * CfgPtr,
+			   UINTPTR EffectiveAddress)
+{
+	/* Verify arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(CfgPtr != NULL);
+
+	/* Set device base address and ID */
+	InstancePtr->Config.DeviceId = CfgPtr->DeviceId;
+	InstancePtr->Config.BaseAddress = EffectiveAddress;
+	InstancePtr->Config.IsCacheCoherent = CfgPtr->IsCacheCoherent;
+
+	/* Set callbacks to an initial stub routine */
+	InstancePtr->SendHandler = ((XEmacPs_Handler)((void*)XEmacPs_StubHandler));
+	InstancePtr->RecvHandler = ((XEmacPs_Handler)(void*)XEmacPs_StubHandler);
+	InstancePtr->ErrorHandler = ((XEmacPs_ErrHandler)(void*)XEmacPs_StubHandler);
+
+	/* Reset the hardware and set default options */
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+	XEmacPs_Reset(InstancePtr);
+
+	return (LONG)(XST_SUCCESS);
+}
+
+
+/*****************************************************************************/
+/**
+* Start the Ethernet controller as follows:
+*   - Enable transmitter if XTE_TRANSMIT_ENABLE_OPTION is set
+*   - Enable receiver if XTE_RECEIVER_ENABLE_OPTION is set
+*   - Start the SG DMA send and receive channels and enable the device
+*     interrupt
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+*
+* @return N/A
+*
+* @note
+* Hardware is configured with scatter-gather DMA, the driver expects to start
+* the scatter-gather channels and expects that the user has previously set up
+* the buffer descriptor lists.
+*
+* This function makes use of internal resources that are shared between the
+* Start, Stop, and Set/ClearOptions functions. So if one task might be setting
+* device options while another is trying to start the device, the user is
+* required to provide protection of this shared data (typically using a
+* semaphore).
+*
+* This function must not be preempted by an interrupt that may service the
+* device.
+*
+******************************************************************************/
+void XEmacPs_Start(XEmacPs *InstancePtr)
+{
+	u32 Reg;
+
+	/* Assert bad arguments and conditions */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/* Start DMA */
+	/* When starting the DMA channels, both transmit and receive sides
+	 * need an initialized BD list.
+	 */
+	if (InstancePtr->Version == 2) {
+		Xil_AssertVoid(InstancePtr->RxBdRing.BaseBdAddr != 0);
+		Xil_AssertVoid(InstancePtr->TxBdRing.BaseBdAddr != 0);
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XEMACPS_RXQBASE_OFFSET,
+			   InstancePtr->RxBdRing.BaseBdAddr);
+
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XEMACPS_TXQBASE_OFFSET,
+			   InstancePtr->TxBdRing.BaseBdAddr);
+	}
+
+	/* clear any existed int status */
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress, XEMACPS_ISR_OFFSET,
+			   XEMACPS_IXR_ALL_MASK);
+
+	/* Enable transmitter if not already enabled */
+	if ((InstancePtr->Options & (u32)XEMACPS_TRANSMITTER_ENABLE_OPTION)!=0x00000000U) {
+		Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_NWCTRL_OFFSET);
+		if ((!(Reg & XEMACPS_NWCTRL_TXEN_MASK))==TRUE) {
+			XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+					   XEMACPS_NWCTRL_OFFSET,
+				   Reg | (u32)XEMACPS_NWCTRL_TXEN_MASK);
+		}
+	}
+
+	/* Enable receiver if not already enabled */
+	if ((InstancePtr->Options & XEMACPS_RECEIVER_ENABLE_OPTION) != 0x00000000U) {
+		Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_NWCTRL_OFFSET);
+		if ((!(Reg & XEMACPS_NWCTRL_RXEN_MASK))==TRUE) {
+			XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+					   XEMACPS_NWCTRL_OFFSET,
+				   Reg | (u32)XEMACPS_NWCTRL_RXEN_MASK);
+		}
+	}
+
+        /* Enable TX and RX interrupts */
+        XEmacPs_IntEnable(InstancePtr, (XEMACPS_IXR_TX_ERR_MASK |
+	XEMACPS_IXR_RX_ERR_MASK | (u32)XEMACPS_IXR_FRAMERX_MASK |
+	(u32)XEMACPS_IXR_TXCOMPL_MASK));
+
+	/* Enable TX Q1 Interrupts */
+	if (InstancePtr->Version > 2)
+		XEmacPs_IntQ1Enable(InstancePtr, XEMACPS_INTQ1_IXR_ALL_MASK);
+
+	/* Mark as started */
+	InstancePtr->IsStarted = XIL_COMPONENT_IS_STARTED;
+
+	return;
+}
+
+
+/*****************************************************************************/
+/**
+* Gracefully stop the Ethernet MAC as follows:
+*   - Disable all interrupts from this device
+*   - Stop DMA channels
+*   - Disable the tansmitter and receiver
+*
+* Device options currently in effect are not changed.
+*
+* This function will disable all interrupts. Default interrupts settings that
+* had been enabled will be restored when XEmacPs_Start() is called.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+*
+* @note
+* This function makes use of internal resources that are shared between the
+* Start, Stop, SetOptions, and ClearOptions functions. So if one task might be
+* setting device options while another is trying to start the device, the user
+* is required to provide protection of this shared data (typically using a
+* semaphore).
+*
+* Stopping the DMA channels causes this function to block until the DMA
+* operation is complete.
+*
+******************************************************************************/
+void XEmacPs_Stop(XEmacPs *InstancePtr)
+{
+	u32 Reg;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/* Disable all interrupts */
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress, XEMACPS_IDR_OFFSET,
+			   XEMACPS_IXR_ALL_MASK);
+
+	/* Disable the receiver & transmitter */
+	Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_NWCTRL_OFFSET);
+	Reg &= (u32)(~XEMACPS_NWCTRL_RXEN_MASK);
+	Reg &= (u32)(~XEMACPS_NWCTRL_TXEN_MASK);
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XEMACPS_NWCTRL_OFFSET, Reg);
+
+	/* Mark as stopped */
+	InstancePtr->IsStarted = 0U;
+}
+
+
+/*****************************************************************************/
+/**
+* Perform a graceful reset of the Ethernet MAC. Resets the DMA channels, the
+* transmitter, and the receiver.
+*
+* Steps to reset
+* - Stops transmit and receive channels
+* - Stops DMA
+* - Configure transmit and receive buffer size to default
+* - Clear transmit and receive status register and counters
+* - Clear all interrupt sources
+* - Clear phy (if there is any previously detected) address
+* - Clear MAC addresses (1-4) as well as Type IDs and hash value
+*
+* All options are placed in their default state. Any frames in the
+* descriptor lists will remain in the lists. The side effect of doing
+* this is that after a reset and following a restart of the device, frames
+* were in the list before the reset may be transmitted or received.
+*
+* The upper layer software is responsible for re-configuring (if necessary)
+* and restarting the MAC after the reset. Note also that driver statistics
+* are not cleared on reset. It is up to the upper layer software to clear the
+* statistics if needed.
+*
+* When a reset is required, the driver notifies the upper layer software of
+* this need through the ErrorHandler callback and specific status codes.
+* The upper layer software is responsible for calling this Reset function
+* and then re-configuring the device.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+*
+******************************************************************************/
+void XEmacPs_Reset(XEmacPs *InstancePtr)
+{
+	u32 Reg;
+	u8 i;
+	s8 EmacPs_zero_MAC[6] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/* Stop the device and reset hardware */
+	XEmacPs_Stop(InstancePtr);
+	InstancePtr->Options = XEMACPS_DEFAULT_OPTIONS;
+
+	InstancePtr->Version = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress, 0xFC);
+
+	InstancePtr->Version = (InstancePtr->Version >> 16) & 0xFFF;
+
+	InstancePtr->MaxMtuSize = XEMACPS_MTU;
+	InstancePtr->MaxFrameSize = XEMACPS_MTU + XEMACPS_HDR_SIZE +
+					XEMACPS_TRL_SIZE;
+	InstancePtr->MaxVlanFrameSize = InstancePtr->MaxFrameSize +
+					XEMACPS_HDR_VLAN_SIZE;
+	InstancePtr->RxBufMask = XEMACPS_RXBUF_LEN_MASK;
+
+	/* Setup hardware with default values */
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_NWCTRL_OFFSET,
+			(XEMACPS_NWCTRL_STATCLR_MASK |
+			XEMACPS_NWCTRL_MDEN_MASK) &
+			(u32)(~XEMACPS_NWCTRL_LOOPEN_MASK));
+
+	Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_NWCFG_OFFSET);
+	Reg &= XEMACPS_NWCFG_MDCCLKDIV_MASK;
+
+	Reg = Reg | (u32)XEMACPS_NWCFG_100_MASK |
+			(u32)XEMACPS_NWCFG_FDEN_MASK |
+			(u32)XEMACPS_NWCFG_UCASTHASHEN_MASK;
+
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_NWCFG_OFFSET, Reg);
+	if (InstancePtr->Version > 2) {
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress, XEMACPS_NWCFG_OFFSET,
+			(XEmacPs_ReadReg(InstancePtr->Config.BaseAddress, XEMACPS_NWCFG_OFFSET) |
+				XEMACPS_NWCFG_DWIDTH_64_MASK));
+	}
+
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_DMACR_OFFSET,
+			(((((u32)XEMACPS_RX_BUF_SIZE / (u32)XEMACPS_RX_BUF_UNIT) +
+				(((((u32)XEMACPS_RX_BUF_SIZE %
+				(u32)XEMACPS_RX_BUF_UNIT))!=(u32)0) ? 1U : 0U)) <<
+				(u32)(XEMACPS_DMACR_RXBUF_SHIFT)) &
+				(u32)(XEMACPS_DMACR_RXBUF_MASK)) |
+				(u32)XEMACPS_DMACR_RXSIZE_MASK |
+				(u32)XEMACPS_DMACR_TXSIZE_MASK);
+
+
+	/* Single bursts */
+	/* FIXME: Why Single bursts? */
+	if (InstancePtr->Version > 2) {
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress, XEMACPS_DMACR_OFFSET,
+			(XEmacPs_ReadReg(InstancePtr->Config.BaseAddress, XEMACPS_DMACR_OFFSET) |
+#ifdef __aarch64__
+			(u32)XEMACPS_DMACR_ADDR_WIDTH_64 |
+#endif
+			(u32)XEMACPS_DMACR_INCR16_AHB_BURST));
+	}
+
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XEMACPS_TXSR_OFFSET, 0x0U);
+
+	XEmacPs_SetQueuePtr(InstancePtr, 0, 0x00U, (u16)XEMACPS_SEND);
+	if (InstancePtr->Version > 2)
+		XEmacPs_SetQueuePtr(InstancePtr, 0, 0x01U, (u16)XEMACPS_SEND);
+	XEmacPs_SetQueuePtr(InstancePtr, 0, 0x00U, (u16)XEMACPS_RECV);
+
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XEMACPS_RXSR_OFFSET, 0x0U);
+
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress, XEMACPS_IDR_OFFSET,
+			   XEMACPS_IXR_ALL_MASK);
+
+	Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_ISR_OFFSET);
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress, XEMACPS_ISR_OFFSET,
+			   Reg);
+
+	XEmacPs_ClearHash(InstancePtr);
+
+	for (i = 1U; i < 5U; i++) {
+		(void)XEmacPs_SetMacAddress(InstancePtr, EmacPs_zero_MAC, i);
+		(void)XEmacPs_SetTypeIdCheck(InstancePtr, 0x00000000U, i);
+	}
+
+	/* clear all counters */
+	for (i = 0U; i < (u8)((XEMACPS_LAST_OFFSET - XEMACPS_OCTTXL_OFFSET) / 4U);
+	     i++) {
+		(void)XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+                                   XEMACPS_OCTTXL_OFFSET + (u32)(((u32)i) * ((u32)4)));
+	}
+
+	/* Disable the receiver */
+	Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_NWCTRL_OFFSET);
+	Reg &= (u32)(~XEMACPS_NWCTRL_RXEN_MASK);
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XEMACPS_NWCTRL_OFFSET, Reg);
+
+	/* Sync default options with hardware but leave receiver and
+         * transmitter disabled. They get enabled with XEmacPs_Start() if
+	 * XEMACPS_TRANSMITTER_ENABLE_OPTION and
+         * XEMACPS_RECEIVER_ENABLE_OPTION are set.
+	 */
+	(void)XEmacPs_SetOptions(InstancePtr, InstancePtr->Options &
+			    ~((u32)XEMACPS_TRANSMITTER_ENABLE_OPTION |
+			      (u32)XEMACPS_RECEIVER_ENABLE_OPTION));
+
+	(void)XEmacPs_ClearOptions(InstancePtr, ~InstancePtr->Options);
+}
+
+
+/******************************************************************************/
+/**
+ * This is a stub for the asynchronous callbacks. The stub is here in case the
+ * upper layer forgot to set the handler(s). On initialization, all handlers are
+ * set to this callback. It is considered an error for this handler to be
+ * invoked.
+ *
+ ******************************************************************************/
+void XEmacPs_StubHandler(void)
+{
+	Xil_AssertVoidAlways();
+}
+
+/*****************************************************************************/
+/**
+* This function sets the start address of the transmit/receive buffer queue.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @QPtr		Address of the Queue to be written
+* @QueueNum	Buffer Queue Index
+* @Direction	Transmit/Recive
+*
+* @note
+* The buffer queue addresses has to be set before starting the transfer, so
+* this function has to be called in prior to XEmacPs_Start()
+*
+******************************************************************************/
+void XEmacPs_SetQueuePtr(XEmacPs *InstancePtr, UINTPTR QPtr, u8 QueueNum,
+			 u16 Direction)
+{
+	/* Assert bad arguments and conditions */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+        /* If already started, then there is nothing to do */
+        if (InstancePtr->IsStarted == (u32)XIL_COMPONENT_IS_STARTED) {
+                return;
+        }
+
+	if (QueueNum == 0x00U) {
+		if (Direction == XEMACPS_SEND) {
+			XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_TXQBASE_OFFSET,
+				(QPtr & ULONG64_LO_MASK));
+		} else {
+			XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_RXQBASE_OFFSET,
+				(QPtr & ULONG64_LO_MASK));
+		}
+	}
+	 else {
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_TXQ1BASE_OFFSET,
+			(QPtr & ULONG64_LO_MASK));
+	}
+#ifdef __aarch64__
+	if (Direction == XEMACPS_SEND) {
+		/* Set the MSB of TX Queue start address */
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_MSBBUF_TXQBASE_OFFSET,
+				(u32)((QPtr & ULONG64_HI_MASK) >> 32U));
+	} else {
+		/* Set the MSB of RX Queue start address */
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_MSBBUF_RXQBASE_OFFSET,
+				(u32)((QPtr & ULONG64_HI_MASK) >> 32U));
+	}
+#endif
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps.h b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps.h
new file mode 100644
index 0000000..6d4b15b
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps.h
@@ -0,0 +1,809 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+ *
+ * @file xemacps.h
+* @addtogroup emacps_v3_7
+* @{
+* @details
+ *
+ * The Xilinx Embedded Processor Block Ethernet driver.
+ *
+ * For a full description of XEMACPS features, please see the hardware spec.
+ * This driver supports the following features:
+ *   - Memory mapped access to host interface registers
+ *   - Statistics counter registers for RMON/MIB
+ *   - API for interrupt driven frame transfers for hardware configured DMA
+ *   - Virtual memory support
+ *   - Unicast, broadcast, and multicast receive address filtering
+ *   - Full and half duplex operation
+ *   - Automatic PAD & FCS insertion and stripping
+ *   - Flow control
+ *   - Support up to four 48bit addresses
+ *   - Address checking for four specific 48bit addresses
+ *   - VLAN frame support
+ *   - Pause frame support
+ *   - Large frame support up to 1536 bytes
+ *   - Checksum offload
+ *
+ * Driver Description
+ *
+ * The device driver enables higher layer software (e.g., an application) to
+ * communicate to the XEmacPs. The driver handles transmission and reception
+ * of Ethernet frames, as well as configuration and control. No pre or post
+ * processing of frame data is performed. The driver does not validate the
+ * contents of an incoming frame in addition to what has already occurred in
+ * hardware.
+ * A single device driver can support multiple devices even when those devices
+ * have significantly different configurations.
+ *
+ * Initialization & Configuration
+ *
+ * The XEmacPs_Config structure is used by the driver to configure itself.
+ * This configuration structure is typically created by the tool-chain based
+ * on hardware build properties.
+ *
+ * The driver instance can be initialized in
+ *
+ *   - XEmacPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddress):  Uses a
+ *     configuration structure provided by the caller. If running in a system
+ *     with address translation, the provided virtual memory base address
+ *     replaces the physical address present in the configuration structure.
+ *
+ * The device supports DMA only as current development plan. No FIFO mode is
+ * supported. The driver expects to start the DMA channels and expects that
+ * the user has set up the buffer descriptor lists.
+ *
+ * Interrupts and Asynchronous Callbacks
+ *
+ * The driver has no dependencies on the interrupt controller. When an
+ * interrupt occurs, the handler will perform a small amount of
+ * housekeeping work, determine the source of the interrupt, and call the
+ * appropriate callback function. All callbacks are registered by the user
+ * level application.
+ *
+ * Virtual Memory
+ *
+ * All virtual to physical memory mappings must occur prior to accessing the
+ * driver API.
+ *
+ * For DMA transactions, user buffers supplied to the driver must be in terms
+ * of their physical address.
+ *
+ * DMA
+ *
+ * The DMA engine uses buffer descriptors (BDs) to describe Ethernet frames.
+ * These BDs are typically chained together into a list the hardware follows
+ * when transferring data in and out of the packet buffers. Each BD describes
+ * a memory region containing either a full or partial Ethernet packet.
+ *
+ * Interrupt coalescing is not suppoted from this built-in DMA engine.
+ *
+ * This API requires the user to understand how the DMA operates. The
+ * following paragraphs provide some explanation, but the user is encouraged
+ * to read documentation in xemacps_bdring.h as well as study example code
+ * that accompanies this driver.
+ *
+ * The API is designed to get BDs to and from the DMA engine in the most
+ * efficient means possible. The first step is to establish a  memory region
+ * to contain all BDs for a specific channel. This is done with
+ * XEmacPs_BdRingCreate(). This function sets up a BD ring that hardware will
+ * follow as BDs are processed. The ring will consist of a user defined number
+ * of BDs which will all be partially initialized. For example on the transmit
+ * channel, the driver will initialize all BDs' so that they are configured
+ * for transmit. The more fields that can be permanently setup at
+ * initialization, then the fewer accesses will be needed to each BD while
+ * the DMA engine is in operation resulting in better throughput and CPU
+ * utilization. The best case initialization would require the user to set
+ * only a frame buffer address and length prior to submitting the BD to the
+ * engine.
+ *
+ * BDs move through the engine with the help of functions
+ * XEmacPs_BdRingAlloc(), XEmacPs_BdRingToHw(), XEmacPs_BdRingFromHw(),
+ * and XEmacPs_BdRingFree().
+ * All these functions handle BDs that are in place. That is, there are no
+ * copies of BDs kept anywhere and any BD the user interacts with is an actual
+ * BD from the same ring hardware accesses.
+ *
+ * BDs in the ring go through a series of states as follows:
+ *   1. Idle. The driver controls BDs in this state.
+ *   2. The user has data to transfer. XEmacPs_BdRingAlloc() is called to
+ *      reserve BD(s). Once allocated, the user may setup the BD(s) with
+ *      frame buffer address, length, and other attributes. The user controls
+ *      BDs in this state.
+ *   3. The user submits BDs to the DMA engine with XEmacPs_BdRingToHw. BDs
+ *      in this state are either waiting to be processed by hardware, are in
+ *      process, or have been processed. The DMA engine controls BDs in this
+ *      state.
+ *   4. Processed BDs are retrieved with XEmacEpv_BdRingFromHw() by the
+ *      user. Once retrieved, the user can examine each BD for the outcome of
+ *      the DMA transfer. The user controls BDs in this state. After examining
+ *      the BDs the user calls XEmacPs_BdRingFree() which places the BDs back
+ *      into state 1.
+ *
+ * Each of the four BD accessor functions operate on a set of BDs. A set is
+ * defined as a segment of the BD ring consisting of one or more BDs. The user
+ * views the set as a pointer to the first BD along with the number of BDs for
+ * that set. The set can be navigated by using macros XEmacPs_BdNext(). The
+ * user must exercise extreme caution when changing BDs in a set as there is
+ * nothing to prevent doing a mBdNext past the end of the set and modifying a
+ * BD out of bounds.
+ *
+ * XEmacPs_BdRingAlloc() + XEmacPs_BdRingToHw(), as well as
+ * XEmacPs_BdRingFromHw() + XEmacPs_BdRingFree() are designed to be used in
+ * tandem. The same BD set retrieved with BdRingAlloc should be the same one
+ * provided to hardware with BdRingToHw. Same goes with BdRingFromHw and
+ * BdRIngFree.
+ *
+ * Alignment & Data Cache Restrictions
+ *
+ * Due to the design of the hardware, all RX buffers, BDs need to be 4-byte
+ * aligned. Please reference xemacps_bd.h for cache related macros.
+ *
+ * DMA Tx:
+ *
+ *   - If frame buffers exist in cached memory, then they must be flushed
+ *     prior to committing them to hardware.
+ *
+ * DMA Rx:
+ *
+ *   - If frame buffers exist in cached memory, then the cache must be
+ *     invalidated for the memory region containing the frame prior to data
+ *     access
+ *
+ * Both cache invalidate/flush are taken care of in driver code.
+ *
+ * Buffer Copying
+ *
+ * The driver is designed for a zero-copy buffer scheme. That is, the driver
+ * will not copy buffers. This avoids potential throughput bottlenecks within
+ * the driver. If byte copying is required, then the transfer will take longer
+ * to complete.
+ *
+ * Checksum Offloading
+ *
+ * The Embedded Processor Block Ethernet can be configured to perform IP, TCP
+ * and UDP checksum offloading in both receive and transmit directions.
+ *
+ * IP packets contain a 16-bit checksum field, which is the 16-bit 1s
+ * complement of the 1s complement sum of all 16-bit words in the header.
+ * TCP and UDP packets contain a 16-bit checksum field, which is the 16-bit
+ * 1s complement of the 1s complement sum of all 16-bit words in the header,
+ * the data and a conceptual pseudo header.
+ *
+ * To calculate these checksums in software requires each byte of the packet
+ * to be read. For TCP and UDP this can use a large amount of processing power.
+ * Offloading the checksum calculation to hardware can result in significant
+ * performance improvements.
+ *
+ * The transmit checksum offload is only available to use DMA in packet buffer
+ * mode. This is because the complete frame to be transmitted must be read
+ * into the packet buffer memory before the checksum can be calculated and
+ * written to the header at the beginning of the frame.
+ *
+ * For IP, TCP or UDP receive checksum offload to be useful, the operating
+ * system containing the protocol stack must be aware that this offload is
+ * available so that it can make use of the fact that the hardware has verified
+ * the checksum.
+ *
+ * When receive checksum offloading is enabled in the hardware, the IP header
+ * checksum is checked, where the packet meets the following criteria:
+ *
+ * 1. If present, the VLAN header must be four octets long and the CFI bit
+ *    must not be set.
+ * 2. Encapsulation must be RFC 894 Ethernet Type Encoding or RFC 1042 SNAP
+ *    encoding.
+ * 3. IP v4 packet.
+ * 4. IP header is of a valid length.
+ * 5. Good IP header checksum.
+ * 6. No IP fragmentation.
+ * 7. TCP or UDP packet.
+ *
+ * When an IP, TCP or UDP frame is received, the receive buffer descriptor
+ * gives an indication if the hardware was able to verify the checksums.
+ * There is also an indication if the frame had SNAP encapsulation. These
+ * indication bits will replace the type ID match indication bits when the
+ * receive checksum offload is enabled.
+ *
+ * If any of the checksums are verified incorrect by the hardware, the packet
+ * is discarded and the appropriate statistics counter incremented.
+ *
+ * PHY Interfaces
+ *
+ * RGMII 1.3 is the only interface supported.
+ *
+ * Asserts
+ *
+ * Asserts are used within all Xilinx drivers to enforce constraints on
+ * parameters. Asserts can be turned off on a system-wide basis by defining,
+ * at compile time, the NDEBUG identifier. By default, asserts are turned on
+ * and it is recommended that users leave asserts on during development. For
+ * deployment use -DNDEBUG compiler switch to remove assert code.
+ *
+ * @note
+ *
+ * Xilinx drivers are typically composed of two parts, one is the driver
+ * and the other is the adapter.  The driver is independent of OS and processor
+ * and is intended to be highly portable.  The adapter is OS-specific and
+ * facilitates communication between the driver and an OS.
+ * This driver is intended to be RTOS and processor independent. Any needs for
+ * dynamic memory management, threads or thread mutual exclusion, or cache
+ * control must be satisfied bythe layer above this driver.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -------------------------------------------------------
+ * 1.00a wsy  01/10/10 First release
+ * 1.00a asa  11/21/11 The function XEmacPs_BdRingFromHwTx in file
+ *		       xemacps_bdring.c is modified. Earlier it was checking for
+ *		       "BdLimit"(passed argument) number of BDs for finding out
+ *		       which BDs are successfully processed. Now one more check
+ *		       is added. It looks for BDs till the current BD pointer
+ *		       reaches HwTail. By doing this processing time is saved.
+ * 1.00a asa  01/24/12 The function XEmacPs_BdRingFromHwTx in file
+ *		       xemacps_bdring.c is modified. Now start of packet is
+ *		       searched for returning the number of BDs processed.
+ * 1.02a asa  11/05/12 Added a new API for deleting an entry from the HASH
+ *		       registers. Added a new API to set the bust length.
+ *		       Added some new hash-defines.
+ * 1.03a asa  01/23/12 Fix for CR #692702 which updates error handling for
+ *		       Rx errors. Under heavy Rx traffic, there will be a large
+ *		       number of errors related to receive buffer not available.
+ *		       Because of a HW bug (SI #692601), under such heavy errors,
+ *		       the Rx data path can become unresponsive. To reduce the
+ *		       probabilities for hitting this HW bug, the SW writes to
+ *		       bit 18 to flush a packet from Rx DPRAM immediately. The
+ *		       changes for it are done in the function
+ *		       XEmacPs_IntrHandler.
+ * 1.05a asa  09/23/13 Cache operations on BDs are not required and hence
+ *		       removed. It is expected that all BDs are allocated in
+ *		       from uncached area.
+ * 1.06a asa  11/02/13 Changed the value for XEMACPS_RXBUF_LEN_MASK from 0x3fff
+ *				to 0x1fff. This fixes the CR#744902.
+ *			  Made changes in example file xemacps_example.h to fix compilation
+ *			  issues with iarcc compiler.
+ * 2.0   adk  10/12/13 Updated as per the New Tcl API's
+ * 2.1   adk  11/08/14 Fixed the CR#811288. Changes are made in the driver tcl file.
+ * 2.1   bss  09/08/14 Modified driver tcl to fix CR#820349 to export phy
+ *		       address in xparameters.h when GMII to RGMII converter
+ *		       is present in hw.
+ * 2.1   srt  07/15/14 Add support for Zynq Ultrascale Mp GEM specification and 64-bit
+ *		       changes.
+ * 2.2   adk  29/10/14 Fixed CR#827686 when PCS/PMA core is configured with
+ *                    1000BASE-X mode export proper values to the xparameters.h
+ *                    file. Changes are made in the driver tcl file.
+ * 3.0   adk  08/1/15  Don't include gem in peripheral test when gem is
+ *                    configured with PCS/PMA Core. Changes are made in the
+ *		       test app tcl(CR:827686).
+ * 3.0   kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+ * 3.0   hk   03/18/15 Added support for jumbo frames. Increase AHB burst.
+ *                     Disable extended mode. Perform all 64 bit changes under
+ *                     check for arch64.
+ *                     Remove "used bit set" from TX error interrupt masks.
+ * 3.1   hk   07/27/15 Do not call error handler with '0' error code when
+ *                     there is no error. CR# 869403
+ *            08/10/15 Update upper 32 bit tx and rx queue ptr registers.
+ * 3.2   hk   02/22/16 Added SGMII support for Zynq Ultrascale+ MPSoC.
+ * 3.4   ms   01/23/17 Modified xil_printf statement in main function for all
+ *                     examples to ensure that "Successfully ran" and "Failed"
+ *                     strings are available in all examples. This is a fix
+ *                     for CR-965028.
+ *       ms   03/17/17 Modified text file in examples folder for doxygen
+ *                     generation.
+ *       ms   04/05/17 Added tabspace for return statements in functions of
+ *                     xemacps_ieee1588_example.c for proper documentation
+ *                     while generating doxygen.
+ * 3.5   hk   08/14/17 Update cache coherency information of the interface in
+ *                     its config structure.
+ * 3.6   rb   09/08/17 HwCnt variable (in XEmacPs_BdRing structure) is
+ *		       changed to volatile.
+ *		       Add API XEmacPs_BdRingPtrReset() to reset pointers
+ *
+ * 

+ *
+ ****************************************************************************/
+
+#ifndef XEMACPS_H		/* prevent circular inclusions */
+#define XEMACPS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xemacps_hw.h"
+#include "xemacps_bd.h"
+#include "xemacps_bdring.h"
+
+/************************** Constant Definitions ****************************/
+
+/*
+ * Device information
+ */
+#define XEMACPS_DEVICE_NAME     "xemacps"
+#define XEMACPS_DEVICE_DESC     "Xilinx PS 10/100/1000 MAC"
+
+
+/** @name Configuration options
+ *
+ * Device configuration options. See the XEmacPs_SetOptions(),
+ * XEmacPs_ClearOptions() and XEmacPs_GetOptions() for information on how to
+ * use options.
+ *
+ * The default state of the options are noted and are what the device and
+ * driver will be set to after calling XEmacPs_Reset() or
+ * XEmacPs_Initialize().
+ *
+ * @{
+ */
+
+#define XEMACPS_PROMISC_OPTION               0x00000001U
+/**< Accept all incoming packets.
+ *   This option defaults to disabled (cleared) */
+
+#define XEMACPS_FRAME1536_OPTION             0x00000002U
+/**< Frame larger than 1516 support for Tx & Rx.
+ *   This option defaults to disabled (cleared) */
+
+#define XEMACPS_VLAN_OPTION                  0x00000004U
+/**< VLAN Rx & Tx frame support.
+ *   This option defaults to disabled (cleared) */
+
+#define XEMACPS_FLOW_CONTROL_OPTION          0x00000010U
+/**< Enable recognition of flow control frames on Rx
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_FCS_STRIP_OPTION             0x00000020U
+/**< Strip FCS and PAD from incoming frames. Note: PAD from VLAN frames is not
+ *   stripped.
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_FCS_INSERT_OPTION            0x00000040U
+/**< Generate FCS field and add PAD automatically for outgoing frames.
+ *   This option defaults to disabled (cleared) */
+
+#define XEMACPS_LENTYPE_ERR_OPTION           0x00000080U
+/**< Enable Length/Type error checking for incoming frames. When this option is
+ *   set, the MAC will filter frames that have a mismatched type/length field
+ *   and if XEMACPS_REPORT_RXERR_OPTION is set, the user is notified when these
+ *   types of frames are encountered. When this option is cleared, the MAC will
+ *   allow these types of frames to be received.
+ *
+ *   This option defaults to disabled (cleared) */
+
+#define XEMACPS_TRANSMITTER_ENABLE_OPTION    0x00000100U
+/**< Enable the transmitter.
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_RECEIVER_ENABLE_OPTION       0x00000200U
+/**< Enable the receiver
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_BROADCAST_OPTION             0x00000400U
+/**< Allow reception of the broadcast address
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_MULTICAST_OPTION             0x00000800U
+/**< Allows reception of multicast addresses programmed into hash
+ *   This option defaults to disabled (clear) */
+
+#define XEMACPS_RX_CHKSUM_ENABLE_OPTION      0x00001000U
+/**< Enable the RX checksum offload
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_TX_CHKSUM_ENABLE_OPTION      0x00002000U
+/**< Enable the TX checksum offload
+ *   This option defaults to enabled (set) */
+
+#define XEMACPS_JUMBO_ENABLE_OPTION	0x00004000U
+#define XEMACPS_SGMII_ENABLE_OPTION	0x00008000U
+
+#define XEMACPS_DEFAULT_OPTIONS                     \
+    ((u32)XEMACPS_FLOW_CONTROL_OPTION |                  \
+     (u32)XEMACPS_FCS_INSERT_OPTION |                    \
+     (u32)XEMACPS_FCS_STRIP_OPTION |                     \
+     (u32)XEMACPS_BROADCAST_OPTION |                     \
+     (u32)XEMACPS_LENTYPE_ERR_OPTION |                   \
+     (u32)XEMACPS_TRANSMITTER_ENABLE_OPTION |            \
+     (u32)XEMACPS_RECEIVER_ENABLE_OPTION |               \
+     (u32)XEMACPS_RX_CHKSUM_ENABLE_OPTION |              \
+     (u32)XEMACPS_TX_CHKSUM_ENABLE_OPTION)
+
+/**< Default options set when device is initialized or reset */
+/*@}*/
+
+/** @name Callback identifiers
+ *
+ * These constants are used as parameters to XEmacPs_SetHandler()
+ * @{
+ */
+#define XEMACPS_HANDLER_DMASEND 1U
+#define XEMACPS_HANDLER_DMARECV 2U
+#define XEMACPS_HANDLER_ERROR   3U
+/*@}*/
+
+/* Constants to determine the configuration of the hardware device. They are
+ * used to allow the driver to verify it can operate with the hardware.
+ */
+#define XEMACPS_MDIO_DIV_DFT    MDC_DIV_32 /**< Default MDIO clock divisor */
+
+/* The next few constants help upper layers determine the size of memory
+ * pools used for Ethernet buffers and descriptor lists.
+ */
+#define XEMACPS_MAC_ADDR_SIZE   6U	/* size of Ethernet header */
+
+#define XEMACPS_MTU             1500U	/* max MTU size of Ethernet frame */
+#define XEMACPS_MTU_JUMBO       10240U	/* max MTU size of jumbo frame */
+#define XEMACPS_HDR_SIZE        14U	/* size of Ethernet header */
+#define XEMACPS_HDR_VLAN_SIZE   18U	/* size of Ethernet header with VLAN */
+#define XEMACPS_TRL_SIZE        4U	/* size of Ethernet trailer (FCS) */
+#define XEMACPS_MAX_FRAME_SIZE       (XEMACPS_MTU + XEMACPS_HDR_SIZE + \
+        XEMACPS_TRL_SIZE)
+#define XEMACPS_MAX_VLAN_FRAME_SIZE  (XEMACPS_MTU + XEMACPS_HDR_SIZE + \
+        XEMACPS_HDR_VLAN_SIZE + XEMACPS_TRL_SIZE)
+#define XEMACPS_MAX_VLAN_FRAME_SIZE_JUMBO  (XEMACPS_MTU_JUMBO + XEMACPS_HDR_SIZE + \
+        XEMACPS_HDR_VLAN_SIZE + XEMACPS_TRL_SIZE)
+
+/* DMACR Bust length hash defines */
+
+#define XEMACPS_SINGLE_BURST	0x00000001
+#define XEMACPS_4BYTE_BURST		0x00000004
+#define XEMACPS_8BYTE_BURST		0x00000008
+#define XEMACPS_16BYTE_BURST	0x00000010
+
+
+/**************************** Type Definitions ******************************/
+/** @name Typedefs for callback functions
+ *
+ * These callbacks are invoked in interrupt context.
+ * @{
+ */
+/**
+ * Callback invoked when frame(s) have been sent or received in interrupt
+ * driven DMA mode. To set the send callback, invoke XEmacPs_SetHandler().
+ *
+ * @param CallBackRef is user data assigned when the callback was set.
+ *
+ * @note
+ * See xemacps_hw.h for bitmasks definitions and the device hardware spec for
+ * further information on their meaning.
+ *
+ */
+typedef void (*XEmacPs_Handler) (void *CallBackRef);
+
+/**
+ * Callback when an asynchronous error occurs. To set this callback, invoke
+ * XEmacPs_SetHandler() with XEMACPS_HANDLER_ERROR in the HandlerType
+ * paramter.
+ *
+ * @param CallBackRef is user data assigned when the callback was set.
+ * @param Direction defines either receive or transmit error(s) has occurred.
+ * @param ErrorWord definition varies with Direction
+ *
+ */
+typedef void (*XEmacPs_ErrHandler) (void *CallBackRef, u8 Direction,
+				     u32 ErrorWord);
+
+/*@}*/
+
+/**
+ * This typedef contains configuration information for a device.
+ */
+typedef struct {
+	u16 DeviceId;	/**< Unique ID  of device */
+	UINTPTR BaseAddress;/**< Physical base address of IPIF registers */
+	u8 IsCacheCoherent; /**< Applicable only to A53 in EL1 mode;
+				* describes whether Cache Coherent or not */
+} XEmacPs_Config;
+
+
+/**
+ * The XEmacPs driver instance data. The user is required to allocate a
+ * structure of this type for every XEmacPs device in the system. A pointer
+ * to a structure of this type is then passed to the driver API functions.
+ */
+typedef struct XEmacPs_Instance {
+	XEmacPs_Config Config;	/* Hardware configuration */
+	u32 IsStarted;		/* Device is currently started */
+	u32 IsReady;		/* Device is initialized and ready */
+	u32 Options;		/* Current options word */
+
+	XEmacPs_BdRing TxBdRing;	/* Transmit BD ring */
+	XEmacPs_BdRing RxBdRing;	/* Receive BD ring */
+
+	XEmacPs_Handler SendHandler;
+	XEmacPs_Handler RecvHandler;
+	void *SendRef;
+	void *RecvRef;
+
+	XEmacPs_ErrHandler ErrorHandler;
+	void *ErrorRef;
+	u32 Version;
+	u32 RxBufMask;
+	u32 MaxMtuSize;
+	u32 MaxFrameSize;
+	u32 MaxVlanFrameSize;
+
+} XEmacPs;
+
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* Retrieve the Tx ring object. This object can be used in the various Ring
+* API functions.
+*
+* @param  InstancePtr is the DMA channel to operate on.
+*
+* @return TxBdRing attribute
+*
+* @note
+* C-style signature:
+*    XEmacPs_BdRing XEmacPs_GetTxRing(XEmacPs *InstancePtr)
+*
+*****************************************************************************/
+#define XEmacPs_GetTxRing(InstancePtr) ((InstancePtr)->TxBdRing)
+
+/****************************************************************************/
+/**
+* Retrieve the Rx ring object. This object can be used in the various Ring
+* API functions.
+*
+* @param  InstancePtr is the DMA channel to operate on.
+*
+* @return RxBdRing attribute
+*
+* @note
+* C-style signature:
+*    XEmacPs_BdRing XEmacPs_GetRxRing(XEmacPs *InstancePtr)
+*
+*****************************************************************************/
+#define XEmacPs_GetRxRing(InstancePtr) ((InstancePtr)->RxBdRing)
+
+/****************************************************************************/
+/**
+*
+* Enable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be enabled.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param Mask contains a bit mask of interrupts to enable. The mask can
+*        be formed using a set of bitwise or'd values.
+*
+* @note
+* The state of the transmitter and receiver are not modified by this function.
+* C-style signature
+*     void XEmacPs_IntEnable(XEmacPs *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XEmacPs_IntEnable(InstancePtr, Mask)                            \
+	XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
+		XEMACPS_IER_OFFSET,                                     \
+		((Mask) & XEMACPS_IXR_ALL_MASK));
+
+/****************************************************************************/
+/**
+*
+* Disable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be enabled.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param Mask contains a bit mask of interrupts to disable. The mask can
+*        be formed using a set of bitwise or'd values.
+*
+* @note
+* The state of the transmitter and receiver are not modified by this function.
+* C-style signature
+*     void XEmacPs_IntDisable(XEmacPs *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XEmacPs_IntDisable(InstancePtr, Mask)                           \
+	XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
+		XEMACPS_IDR_OFFSET,                                     \
+		((Mask) & XEMACPS_IXR_ALL_MASK));
+
+/****************************************************************************/
+/**
+*
+* Enable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be enabled.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param Mask contains a bit mask of interrupts to enable. The mask can
+*        be formed using a set of bitwise or'd values.
+*
+* @note
+* The state of the transmitter and receiver are not modified by this function.
+* C-style signature
+*     void XEmacPs_IntQ1Enable(XEmacPs *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XEmacPs_IntQ1Enable(InstancePtr, Mask)                            \
+	XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
+		XEMACPS_INTQ1_IER_OFFSET,                                \
+		((Mask) & XEMACPS_INTQ1_IXR_ALL_MASK));
+
+/****************************************************************************/
+/**
+*
+* Disable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be enabled.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param Mask contains a bit mask of interrupts to disable. The mask can
+*        be formed using a set of bitwise or'd values.
+*
+* @note
+* The state of the transmitter and receiver are not modified by this function.
+* C-style signature
+*     void XEmacPs_IntDisable(XEmacPs *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XEmacPs_IntQ1Disable(InstancePtr, Mask)                           \
+	XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
+		XEMACPS_INTQ1_IDR_OFFSET,                               \
+		((Mask) & XEMACPS_INTQ1_IXR_ALL_MASK));
+
+/****************************************************************************/
+/**
+*
+* This macro triggers trasmit circuit to send data currently in TX buffer(s).
+*
+* @param InstancePtr is a pointer to the XEmacPs instance to be worked on.
+*
+* @return
+*
+* @note
+*
+* Signature: void XEmacPs_Transmit(XEmacPs *InstancePtr)
+*
+*****************************************************************************/
+#define XEmacPs_Transmit(InstancePtr)                              \
+        XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,          \
+        XEMACPS_NWCTRL_OFFSET,                                     \
+        (XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,          \
+        XEMACPS_NWCTRL_OFFSET) | XEMACPS_NWCTRL_STARTTX_MASK))
+
+/****************************************************************************/
+/**
+*
+* This macro determines if the device is configured with checksum offloading
+* on the receive channel
+*
+* @param InstancePtr is a pointer to the XEmacPs instance to be worked on.
+*
+* @return
+*
+* Boolean TRUE if the device is configured with checksum offloading, or
+* FALSE otherwise.
+*
+* @note
+*
+* Signature: u32 XEmacPs_IsRxCsum(XEmacPs *InstancePtr)
+*
+*****************************************************************************/
+#define XEmacPs_IsRxCsum(InstancePtr)                                     \
+        ((XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,             \
+          XEMACPS_NWCFG_OFFSET) & XEMACPS_NWCFG_RXCHKSUMEN_MASK) != 0U     \
+          ? TRUE : FALSE)
+
+/****************************************************************************/
+/**
+*
+* This macro determines if the device is configured with checksum offloading
+* on the transmit channel
+*
+* @param InstancePtr is a pointer to the XEmacPs instance to be worked on.
+*
+* @return
+*
+* Boolean TRUE if the device is configured with checksum offloading, or
+* FALSE otherwise.
+*
+* @note
+*
+* Signature: u32 XEmacPs_IsTxCsum(XEmacPs *InstancePtr)
+*
+*****************************************************************************/
+#define XEmacPs_IsTxCsum(InstancePtr)                                     \
+        ((XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,              \
+          XEMACPS_DMACR_OFFSET) & XEMACPS_DMACR_TCPCKSUM_MASK) != 0U       \
+          ? TRUE : FALSE)
+
+/************************** Function Prototypes *****************************/
+
+/*
+ * Initialization functions in xemacps.c
+ */
+LONG XEmacPs_CfgInitialize(XEmacPs *InstancePtr, XEmacPs_Config *CfgPtr,
+			   UINTPTR EffectiveAddress);
+void XEmacPs_Start(XEmacPs *InstancePtr);
+void XEmacPs_Stop(XEmacPs *InstancePtr);
+void XEmacPs_Reset(XEmacPs *InstancePtr);
+void XEmacPs_SetQueuePtr(XEmacPs *InstancePtr, UINTPTR QPtr, u8 QueueNum,
+			 u16 Direction);
+
+/*
+ * Lookup configuration in xemacps_sinit.c
+ */
+XEmacPs_Config *XEmacPs_LookupConfig(u16 DeviceId);
+
+/*
+ * Interrupt-related functions in xemacps_intr.c
+ * DMA only and FIFO is not supported. This DMA does not support coalescing.
+ */
+LONG XEmacPs_SetHandler(XEmacPs *InstancePtr, u32 HandlerType,
+			void *FuncPointer, void *CallBackRef);
+void XEmacPs_IntrHandler(void *XEmacPsPtr);
+
+/*
+ * MAC configuration/control functions in XEmacPs_control.c
+ */
+LONG XEmacPs_SetOptions(XEmacPs *InstancePtr, u32 Options);
+LONG XEmacPs_ClearOptions(XEmacPs *InstancePtr, u32 Options);
+u32 XEmacPs_GetOptions(XEmacPs *InstancePtr);
+
+LONG XEmacPs_SetMacAddress(XEmacPs *InstancePtr, void *AddressPtr, u8 Index);
+LONG XEmacPs_DeleteHash(XEmacPs *InstancePtr, void *AddressPtr);
+void XEmacPs_GetMacAddress(XEmacPs *InstancePtr, void *AddressPtr, u8 Index);
+
+LONG XEmacPs_SetHash(XEmacPs *InstancePtr, void *AddressPtr);
+void XEmacPs_ClearHash(XEmacPs *InstancePtr);
+void XEmacPs_GetHash(XEmacPs *InstancePtr, void *AddressPtr);
+
+void XEmacPs_SetMdioDivisor(XEmacPs *InstancePtr,
+				XEmacPs_MdcDiv Divisor);
+void XEmacPs_SetOperatingSpeed(XEmacPs *InstancePtr, u16 Speed);
+u16 XEmacPs_GetOperatingSpeed(XEmacPs *InstancePtr);
+LONG XEmacPs_PhyRead(XEmacPs *InstancePtr, u32 PhyAddress,
+		     u32 RegisterNum, u16 *PhyDataPtr);
+LONG XEmacPs_PhyWrite(XEmacPs *InstancePtr, u32 PhyAddress,
+		      u32 RegisterNum, u16 PhyData);
+LONG XEmacPs_SetTypeIdCheck(XEmacPs *InstancePtr, u32 Id_Check, u8 Index);
+
+LONG XEmacPs_SendPausePacket(XEmacPs *InstancePtr);
+void XEmacPs_DMABLengthUpdate(XEmacPs *InstancePtr, s32 BLength);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_bd.h b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_bd.h
new file mode 100644
index 0000000..83f9a87
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_bd.h
@@ -0,0 +1,804 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * @file xemacps_bd.h
+* @addtogroup emacps_v3_7
+* @{
+ *
+ * This header provides operations to manage buffer descriptors in support
+ * of scatter-gather DMA.
+ *
+ * The API exported by this header defines abstracted macros that allow the
+ * user to read/write specific BD fields.
+ *
+ * Buffer Descriptors
+ *
+ * A buffer descriptor (BD) defines a DMA transaction. The macros defined by
+ * this header file allow access to most fields within a BD to tailor a DMA
+ * transaction according to user and hardware requirements.  See the hardware
+ * IP DMA spec for more information on BD fields and how they affect transfers.
+ *
+ * The XEmacPs_Bd structure defines a BD. The organization of this structure
+ * is driven mainly by the hardware for use in scatter-gather DMA transfers.
+ *
+ * Performance
+ *
+ * Limiting I/O to BDs can improve overall performance of the DMA channel.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -------------------------------------------------------
+ * 1.00a wsy  01/10/10 First release
+ * 2.1   srt  07/15/14 Add support for Zynq Ultrascale MP GEM specification
+ *                     and 64-bit changes.
+ * 3.0   kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+ * 3.0   hk   02/20/15 Added support for jumbo frames.
+ *                     Disable extended mode. Perform all 64 bit changes under
+ *                     check for arch64.
+ * 3.2   hk   11/18/15 Change BD typedef and number of words.
+ *
+ * 

+ *
+ * ***************************************************************************
+ */
+
+#ifndef XEMACPS_BD_H		/* prevent circular inclusions */
+#define XEMACPS_BD_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include 
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+#ifdef __aarch64__
+/* Minimum BD alignment */
+#define XEMACPS_DMABD_MINIMUM_ALIGNMENT  64U
+#define XEMACPS_BD_NUM_WORDS 4U
+#else
+/* Minimum BD alignment */
+#define XEMACPS_DMABD_MINIMUM_ALIGNMENT  4U
+#define XEMACPS_BD_NUM_WORDS 2U
+#endif
+
+/**
+ * The XEmacPs_Bd is the type for buffer descriptors (BDs).
+ */
+typedef u32 XEmacPs_Bd[XEMACPS_BD_NUM_WORDS];
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+ * Zero out BD fields
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @return Nothing
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdClear(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdClear(BdPtr)                                  \
+    memset((BdPtr), 0, sizeof(XEmacPs_Bd))
+
+/****************************************************************************/
+/**
+*
+* Read the given Buffer Descriptor word.
+*
+* @param    BaseAddress is the base address of the BD to read
+* @param    Offset is the word offset to be read
+*
+* @return   The 32-bit value of the field
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_BdRead(UINTPTR BaseAddress, UINTPTR Offset)
+*
+*****************************************************************************/
+#define XEmacPs_BdRead(BaseAddress, Offset)             \
+	(*(u32 *)((UINTPTR)((void*)(BaseAddress)) + (u32)(Offset)))
+
+/****************************************************************************/
+/**
+*
+* Write the given Buffer Descriptor word.
+*
+* @param    BaseAddress is the base address of the BD to write
+* @param    Offset is the word offset to be written
+* @param    Data is the 32-bit value to write to the field
+*
+* @return   None.
+*
+* @note
+* C-style signature:
+*    void XEmacPs_BdWrite(UINTPTR BaseAddress, UINTPTR Offset, UINTPTR Data)
+*
+*****************************************************************************/
+#define XEmacPs_BdWrite(BaseAddress, Offset, Data)              \
+    (*(u32 *)((UINTPTR)(void*)(BaseAddress) + (u32)(Offset)) = (u32)(Data))
+
+/*****************************************************************************/
+/**
+ * Set the BD's Address field (word 0).
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ * @param  Addr  is the value to write to BD's status field.
+ *
+ * @note :
+ *
+ * C-style signature:
+ *    void XEmacPs_BdSetAddressTx(XEmacPs_Bd* BdPtr, UINTPTR Addr)
+ *
+ *****************************************************************************/
+#ifdef __aarch64__
+#define XEmacPs_BdSetAddressTx(BdPtr, Addr)                        \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,		\
+			(u32)((Addr) & ULONG64_LO_MASK));		\
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_HI_OFFSET,		\
+	(u32)(((Addr) & ULONG64_HI_MASK) >> 32U));
+#else
+#define XEmacPs_BdSetAddressTx(BdPtr, Addr)                        \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET, (u32)(Addr))
+#endif
+
+/*****************************************************************************/
+/**
+ * Set the BD's Address field (word 0).
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ * @param  Addr  is the value to write to BD's status field.
+ *
+ * @note : Due to some bits are mixed within recevie BD's address field,
+ *         read-modify-write is performed.
+ *
+ * C-style signature:
+ *    void XEmacPs_BdSetAddressRx(XEmacPs_Bd* BdPtr, UINTPTR Addr)
+ *
+ *****************************************************************************/
+#ifdef __aarch64__
+#define XEmacPs_BdSetAddressRx(BdPtr, Addr)                        \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,              \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+	~XEMACPS_RXBUF_ADD_MASK) | ((u32)((Addr) & ULONG64_LO_MASK))));  \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_HI_OFFSET, 	\
+	(u32)(((Addr) & ULONG64_HI_MASK) >> 32U));
+#else
+#define XEmacPs_BdSetAddressRx(BdPtr, Addr)                        \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,              \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+    ~XEMACPS_RXBUF_ADD_MASK) | (UINTPTR)(Addr)))
+#endif
+
+/*****************************************************************************/
+/**
+ * Set the BD's Status field (word 1).
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ * @param  Data  is the value to write to BD's status field.
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetStatus(XEmacPs_Bd* BdPtr, UINTPTR Data)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetStatus(BdPtr, Data)                           \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,              \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) | (Data))
+
+
+/*****************************************************************************/
+/**
+ * Retrieve the BD's Packet DMA transfer status word (word 1).
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @return Status word
+ *
+ * @note
+ * C-style signature:
+ *    u32 XEmacPs_BdGetStatus(XEmacPs_Bd* BdPtr)
+ *
+ * Due to the BD bit layout differences in transmit and receive. User's
+ * caution is required.
+ *****************************************************************************/
+#define XEmacPs_BdGetStatus(BdPtr)                                 \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET)
+
+
+/*****************************************************************************/
+/**
+ * Get the address (bits 0..31) of the BD's buffer address (word 0)
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdGetBufAddr(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#ifdef __aarch64__
+#define XEmacPs_BdGetBufAddr(BdPtr)                               \
+    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) |		  \
+	(XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_HI_OFFSET)) << 32U)
+#else
+#define XEmacPs_BdGetBufAddr(BdPtr)                               \
+    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET))
+#endif
+
+/*****************************************************************************/
+/**
+ * Set transfer length in bytes for the given BD. The length must be set each
+ * time a BD is submitted to hardware.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ * @param  LenBytes is the number of bytes to transfer.
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetLength(XEmacPs_Bd* BdPtr, u32 LenBytes)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetLength(BdPtr, LenBytes)                       \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,              \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    ~XEMACPS_TXBUF_LEN_MASK) | (LenBytes)))
+
+
+
+/*****************************************************************************/
+/**
+ * Set transfer length in bytes for the given BD. The length must be set each
+ * time a BD is submitted to hardware.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ * @param  LenBytes is the number of bytes to transfer.
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetLength(XEmacPs_Bd* BdPtr, u32 LenBytes)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetLength(BdPtr, LenBytes)                       \
+    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,              \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    ~XEMACPS_TXBUF_LEN_MASK) | (LenBytes)))
+
+
+/*****************************************************************************/
+/**
+ * Retrieve the BD length field.
+ *
+ * For Tx channels, the returned value is the same as that written with
+ * XEmacPs_BdSetLength().
+ *
+ * For Rx channels, the returned value is the size of the received packet.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @return Length field processed by hardware or set by
+ *         XEmacPs_BdSetLength().
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdGetLength(XEmacPs_Bd* BdPtr)
+ *    XEAMCPS_RXBUF_LEN_MASK is same as XEMACPS_TXBUF_LEN_MASK.
+ *
+ *****************************************************************************/
+#define XEmacPs_BdGetLength(BdPtr)                                 \
+    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &            \
+    XEMACPS_RXBUF_LEN_MASK)
+
+/*****************************************************************************/
+/**
+ * Retrieve the RX frame size.
+ *
+ * The returned value is the size of the received packet.
+ * This API supports jumbo frame sizes if enabled.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @return Length field processed by hardware or set by
+ *         XEmacPs_BdSetLength().
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_GetRxFrameSize(XEmacPs* InstancePtr, XEmacPs_Bd* BdPtr)
+ *    RxBufMask is dependent on whether jumbo is enabled or not.
+ *
+ *****************************************************************************/
+#define XEmacPs_GetRxFrameSize(InstancePtr, BdPtr)                   \
+    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &            \
+    (InstancePtr)->RxBufMask)
+
+/*****************************************************************************/
+/**
+ * Test whether the given BD has been marked as the last BD of a packet.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @return TRUE if BD represents the "Last" BD of a packet, FALSE otherwise
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsLast(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsLast(BdPtr)                                    \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_EOF_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Tell the DMA engine that the given transmit BD marks the end of the current
+ * packet to be processed.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetLast(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetLast(BdPtr)                                   \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_LAST_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Tell the DMA engine that the current packet does not end with the given
+ * BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdClearLast(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdClearLast(BdPtr)                                 \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
+    ~XEMACPS_TXBUF_LAST_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Set this bit to mark the last descriptor in the receive buffer descriptor
+ * list.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetRxWrap(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+/*#define XEmacPs_BdSetRxWrap(BdPtr)                                 \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) |             \
+    XEMACPS_RXBUF_WRAP_MASK))
+*/
+
+/*****************************************************************************/
+/**
+ * Determine the wrap bit of the receive BD which indicates end of the
+ * BD list.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    u8 XEmacPs_BdIsRxWrap(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxWrap(BdPtr)                                  \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+    XEMACPS_RXBUF_WRAP_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Sets this bit to mark the last descriptor in the transmit buffer
+ * descriptor list.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetTxWrap(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+/*#define XEmacPs_BdSetTxWrap(BdPtr)                                 \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_WRAP_MASK))
+*/
+
+/*****************************************************************************/
+/**
+ * Determine the wrap bit of the transmit BD which indicates end of the
+ * BD list.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    u8 XEmacPs_BdGetTxWrap(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsTxWrap(BdPtr)                                  \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_WRAP_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/*
+ * Must clear this bit to enable the MAC to write data to the receive
+ * buffer. Hardware sets this bit once it has successfully written a frame to
+ * memory. Once set, software has to clear the bit before the buffer can be
+ * used again. This macro clear the new bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdClearRxNew(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdClearRxNew(BdPtr)                                \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &             \
+    ~XEMACPS_RXBUF_NEW_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Determine the new bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxNew(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxNew(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+    XEMACPS_RXBUF_NEW_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Software sets this bit to disable the buffer to be read by the hardware.
+ * Hardware sets this bit for the first buffer of a frame once it has been
+ * successfully transmitted. This macro sets this bit of transmit BD to avoid
+ * confusion.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetTxUsed(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetTxUsed(BdPtr)                                 \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_USED_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Software clears this bit to enable the buffer to be read by the hardware.
+ * Hardware sets this bit for the first buffer of a frame once it has been
+ * successfully transmitted. This macro clears this bit of transmit BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdClearTxUsed(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdClearTxUsed(BdPtr)                               \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
+    ~XEMACPS_TXBUF_USED_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Determine the used bit of the transmit BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsTxUsed(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsTxUsed(BdPtr)                                  \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_USED_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if a frame fails to be transmitted due to too many retries.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsTxRetry(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsTxRetry(BdPtr)                                 \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_RETRY_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if a frame fails to be transmitted due to data can not be
+ * feteched in time or buffers are exhausted.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsTxUrun(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsTxUrun(BdPtr)                                  \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_URUN_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if a frame fails to be transmitted due to buffer is exhausted
+ * mid-frame.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsTxExh(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsTxExh(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_EXH_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Sets this bit, no CRC will be appended to the current frame. This control
+ * bit must be set for the first buffer in a frame and will be ignored for
+ * the subsequent buffers of a frame.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * This bit must be clear when using the transmit checksum generation offload,
+ * otherwise checksum generation and substitution will not occur.
+ *
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdSetTxNoCRC(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdSetTxNoCRC(BdPtr)                                \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_NOCRC_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Clear this bit, CRC will be appended to the current frame. This control
+ * bit must be set for the first buffer in a frame and will be ignored for
+ * the subsequent buffers of a frame.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * This bit must be clear when using the transmit checksum generation offload,
+ * otherwise checksum generation and substitution will not occur.
+ *
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdClearTxNoCRC(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdClearTxNoCRC(BdPtr)                              \
+    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
+    ~XEMACPS_TXBUF_NOCRC_MASK))
+
+
+/*****************************************************************************/
+/**
+ * Determine the broadcast bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxBcast(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxBcast(BdPtr)                                 \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_BCAST_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine the multicast hash bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxMultiHash(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxMultiHash(BdPtr)                             \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_MULTIHASH_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine the unicast hash bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxUniHash(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxUniHash(BdPtr)                               \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_UNIHASH_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if the received frame is a VLAN Tagged frame.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxVlan(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxVlan(BdPtr)                                  \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_VLAN_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if the received frame has Type ID of 8100h and null VLAN
+ * identifier(Priority tag).
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxPri(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxPri(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_PRI_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine if the received frame's Concatenation Format Indicator (CFI) of
+ * the frames VLANTCI field was set.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdIsRxCFI(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxCFI(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_CFI_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine the End Of Frame (EOF) bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdGetRxEOF(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxEOF(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_EOF_MASK)!=0U ? TRUE : FALSE)
+
+
+/*****************************************************************************/
+/**
+ * Determine the Start Of Frame (SOF) bit of the receive BD.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    UINTPTR XEmacPs_BdGetRxSOF(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+#define XEmacPs_BdIsRxSOF(BdPtr)                                   \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_SOF_MASK)!=0U ? TRUE : FALSE)
+
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_bdring.c b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_bdring.c
new file mode 100644
index 0000000..3536873
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_bdring.c
@@ -0,0 +1,1102 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xemacps_bdring.c
+* @addtogroup emacps_v3_7
+* @{
+*
+* This file implements buffer descriptor ring related functions.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a wsy  01/10/10 First release
+* 1.00a asa  11/21/11 The function XEmacPs_BdRingFromHwTx is modified.
+*		      Earlier it used to search in "BdLimit" number of BDs to
+*		      know which BDs are processed. Now one more check is
+*		      added. It looks for BDs till the current BD pointer
+*		      reaches HwTail. By doing this processing time is saved.
+* 1.00a asa  01/24/12 The function XEmacPs_BdRingFromHwTx in file
+*		      xemacps_bdring.c is modified. Now start of packet is
+*		      searched for returning the number of BDs processed.
+* 1.05a asa  09/23/13 Cache operations on BDs are not required and hence
+*		      removed. It is expected that all BDs are allocated in
+*		      from uncached area. Fix for CR #663885.
+* 2.1   srt  07/15/14 Add support for Zynq Ultrascale Mp architecture.
+* 3.0   kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.6   rb   09/08/17 Add XEmacPs_BdRingPtrReset() API to reset BD ring
+* 		      pointers
+*
+* 

+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xil_cache.h"
+#include "xemacps_hw.h"
+#include "xemacps_bd.h"
+#include "xemacps_bdring.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************
+ * Compute the virtual address of a descriptor from its physical address
+ *
+ * @param BdPtr is the physical address of the BD
+ *
+ * @returns Virtual address of BdPtr
+ *
+ * @note Assume BdPtr is always a valid BD in the ring
+ ****************************************************************************/
+#define XEMACPS_PHYS_TO_VIRT(BdPtr) \
+    ((UINTPTR)(BdPtr) + (RingPtr->BaseBdAddr - RingPtr->PhysBaseAddr))
+
+/****************************************************************************
+ * Compute the physical address of a descriptor from its virtual address
+ *
+ * @param BdPtr is the physical address of the BD
+ *
+ * @returns Physical address of BdPtr
+ *
+ * @note Assume BdPtr is always a valid BD in the ring
+ ****************************************************************************/
+#define XEMACPS_VIRT_TO_PHYS(BdPtr) \
+    ((UINTPTR)(BdPtr) - (RingPtr->BaseBdAddr - RingPtr->PhysBaseAddr))
+
+/****************************************************************************
+ * Move the BdPtr argument ahead an arbitrary number of BDs wrapping around
+ * to the beginning of the ring if needed.
+ *
+ * We know if a wrapaound should occur if the new BdPtr is greater than
+ * the high address in the ring OR if the new BdPtr crosses over the
+ * 0xFFFFFFFF to 0 boundary. The latter test is a valid one since we do not
+ * allow a BD space to span this boundary.
+ *
+ * @param RingPtr is the ring BdPtr appears in
+ * @param BdPtr on input is the starting BD position and on output is the
+ *        final BD position
+ * @param NumBd is the number of BD spaces to increment
+ *
+ ****************************************************************************/
+#define XEMACPS_RING_SEEKAHEAD(RingPtr, BdPtr, NumBd)                  \
+    {                                                                   \
+        UINTPTR Addr = (UINTPTR)(void *)(BdPtr);                        \
+                                                                        \
+        Addr += ((RingPtr)->Separation * (NumBd));                        \
+        if ((Addr > (RingPtr)->HighBdAddr) || ((UINTPTR)(void *)(BdPtr) > Addr))  \
+        {                                                               \
+            Addr -= (RingPtr)->Length;                                  \
+        }                                                               \
+                                                                        \
+        (BdPtr) = (XEmacPs_Bd*)(void *)Addr;                                     \
+    }
+
+/****************************************************************************
+ * Move the BdPtr argument backwards an arbitrary number of BDs wrapping
+ * around to the end of the ring if needed.
+ *
+ * We know if a wrapaound should occur if the new BdPtr is less than
+ * the base address in the ring OR if the new BdPtr crosses over the
+ * 0xFFFFFFFF to 0 boundary. The latter test is a valid one since we do not
+ * allow a BD space to span this boundary.
+ *
+ * @param RingPtr is the ring BdPtr appears in
+ * @param BdPtr on input is the starting BD position and on output is the
+ *        final BD position
+ * @param NumBd is the number of BD spaces to increment
+ *
+ ****************************************************************************/
+#define XEMACPS_RING_SEEKBACK(RingPtr, BdPtr, NumBd)                   \
+    {                                                                   \
+        UINTPTR Addr = (UINTPTR)(void *)(BdPtr);                                  \
+                                                                        \
+        Addr -= ((RingPtr)->Separation * (NumBd));                        \
+        if ((Addr < (RingPtr)->BaseBdAddr) || ((UINTPTR)(void*)(BdPtr) < Addr))  \
+        {                                                               \
+            Addr += (RingPtr)->Length;                                  \
+        }                                                               \
+                                                                        \
+        (BdPtr) = (XEmacPs_Bd*)(void*)Addr;                                     \
+    }
+
+
+/************************** Function Prototypes ******************************/
+
+static void XEmacPs_BdSetRxWrap(UINTPTR BdPtr);
+static void XEmacPs_BdSetTxWrap(UINTPTR BdPtr);
+
+/************************** Variable Definitions *****************************/
+
+/*****************************************************************************/
+/**
+ * Using a memory segment allocated by the caller, create and setup the BD list
+ * for the given DMA channel.
+ *
+ * @param RingPtr is the instance to be worked on.
+ * @param PhysAddr is the physical base address of user memory region.
+ * @param VirtAddr is the virtual base address of the user memory region. If
+ *        address translation is not being utilized, then VirtAddr should be
+ *        equivalent to PhysAddr.
+ * @param Alignment governs the byte alignment of individual BDs. This function
+ *        will enforce a minimum alignment of 4 bytes with no maximum as long
+ *        as it is specified as a power of 2.
+ * @param BdCount is the number of BDs to setup in the user memory region. It
+ *        is assumed the region is large enough to contain the BDs.
+ *
+ * @return
+ *
+ * - XST_SUCCESS if initialization was successful
+ * - XST_NO_FEATURE if the provided instance is a non DMA type
+ *   channel.
+ * - XST_INVALID_PARAM under any of the following conditions:
+ *   1) PhysAddr and/or VirtAddr are not aligned to the given Alignment
+ *      parameter.
+ *   2) Alignment parameter does not meet minimum requirements or is not a
+ *      power of 2 value.
+ *   3) BdCount is 0.
+ * - XST_DMA_SG_LIST_ERROR if the memory segment containing the list spans
+ *   over address 0x00000000 in virtual address space.
+ *
+ * @note
+ * Make sure to pass in the right alignment value.
+ *****************************************************************************/
+LONG XEmacPs_BdRingCreate(XEmacPs_BdRing * RingPtr, UINTPTR PhysAddr,
+			  UINTPTR VirtAddr, u32 Alignment, u32 BdCount)
+{
+	u32 i;
+	UINTPTR BdVirtAddr;
+	UINTPTR BdPhyAddr;
+	UINTPTR VirtAddrLoc = VirtAddr;
+
+	/* In case there is a failure prior to creating list, make sure the
+	 * following attributes are 0 to prevent calls to other functions
+	 * from doing anything.
+	 */
+	RingPtr->AllCnt = 0U;
+	RingPtr->FreeCnt = 0U;
+	RingPtr->HwCnt = 0U;
+	RingPtr->PreCnt = 0U;
+	RingPtr->PostCnt = 0U;
+
+	/* Make sure Alignment parameter meets minimum requirements */
+	if (Alignment < (u32)XEMACPS_DMABD_MINIMUM_ALIGNMENT) {
+		return (LONG)(XST_INVALID_PARAM);
+	}
+
+	/* Make sure Alignment is a power of 2 */
+	if (((Alignment - 0x00000001U) & Alignment)!=0x00000000U) {
+		return (LONG)(XST_INVALID_PARAM);
+	}
+
+	/* Make sure PhysAddr and VirtAddr are on same Alignment */
+	if (((PhysAddr % Alignment)!=(u32)0) || ((VirtAddrLoc % Alignment)!=(u32)0)) {
+		return (LONG)(XST_INVALID_PARAM);
+	}
+
+	/* Is BdCount reasonable? */
+	if (BdCount == 0x00000000U) {
+		return (LONG)(XST_INVALID_PARAM);
+	}
+
+	/* Figure out how many bytes will be between the start of adjacent BDs */
+	RingPtr->Separation = ((u32)sizeof(XEmacPs_Bd));
+
+	/* Must make sure the ring doesn't span address 0x00000000. If it does,
+	 * then the next/prev BD traversal macros will fail.
+	 */
+	if (VirtAddrLoc > ((VirtAddrLoc + (RingPtr->Separation * BdCount)) - (u32)1)) {
+		return (LONG)(XST_DMA_SG_LIST_ERROR);
+	}
+
+	/* Initial ring setup:
+	 *  - Clear the entire space
+	 *  - Setup each BD's BDA field with the physical address of the next BD
+	 */
+	(void)memset((void *) VirtAddrLoc, 0, (RingPtr->Separation * BdCount));
+
+	BdVirtAddr = VirtAddrLoc;
+	BdPhyAddr = PhysAddr + RingPtr->Separation;
+	for (i = 1U; i < BdCount; i++) {
+		BdVirtAddr += RingPtr->Separation;
+		BdPhyAddr += RingPtr->Separation;
+	}
+
+	/* Setup and initialize pointers and counters */
+	RingPtr->RunState = (u32)(XST_DMA_SG_IS_STOPPED);
+	RingPtr->BaseBdAddr = VirtAddrLoc;
+	RingPtr->PhysBaseAddr = PhysAddr;
+	RingPtr->HighBdAddr = BdVirtAddr;
+	RingPtr->Length =
+		((RingPtr->HighBdAddr - RingPtr->BaseBdAddr) + RingPtr->Separation);
+	RingPtr->AllCnt = (u32)BdCount;
+	RingPtr->FreeCnt = (u32)BdCount;
+	RingPtr->FreeHead = (XEmacPs_Bd *)(void *)VirtAddrLoc;
+	RingPtr->PreHead = (XEmacPs_Bd *)VirtAddrLoc;
+	RingPtr->HwHead = (XEmacPs_Bd *)VirtAddrLoc;
+	RingPtr->HwTail = (XEmacPs_Bd *)VirtAddrLoc;
+	RingPtr->PostHead = (XEmacPs_Bd *)VirtAddrLoc;
+	RingPtr->BdaRestart = (XEmacPs_Bd *)(void *)PhysAddr;
+
+	return (LONG)(XST_SUCCESS);
+}
+
+
+/*****************************************************************************/
+/**
+ * Clone the given BD into every BD in the list.
+ * every field of the source BD is replicated in every BD of the list.
+ *
+ * This function can be called only when all BDs are in the free group such as
+ * they are immediately after initialization with XEmacPs_BdRingCreate().
+ * This prevents modification of BDs while they are in use by hardware or the
+ * user.
+ *
+ * @param RingPtr is the pointer of BD ring instance to be worked on.
+ * @param SrcBdPtr is the source BD template to be cloned into the list. This
+ *        BD will be modified.
+ * @param Direction is either XEMACPS_SEND or XEMACPS_RECV that indicates
+ *        which direction.
+ *
+ * @return
+ *   - XST_SUCCESS if the list was modified.
+ *   - XST_DMA_SG_NO_LIST if a list has not been created.
+ *   - XST_DMA_SG_LIST_ERROR if some of the BDs in this channel are under
+ *     hardware or user control.
+ *   - XST_DEVICE_IS_STARTED if the DMA channel has not been stopped.
+ *
+ *****************************************************************************/
+LONG XEmacPs_BdRingClone(XEmacPs_BdRing * RingPtr, XEmacPs_Bd * SrcBdPtr,
+			 u8 Direction)
+{
+	u32 i;
+	UINTPTR CurBd;
+
+	/* Can't do this function if there isn't a ring */
+	if (RingPtr->AllCnt == 0x00000000U) {
+		return (LONG)(XST_DMA_SG_NO_LIST);
+	}
+
+	/* Can't do this function with the channel running */
+	if (RingPtr->RunState == (u32)XST_DMA_SG_IS_STARTED) {
+		return (LONG)(XST_DEVICE_IS_STARTED);
+	}
+
+	/* Can't do this function with some of the BDs in use */
+	if (RingPtr->FreeCnt != RingPtr->AllCnt) {
+		return (LONG)(XST_DMA_SG_LIST_ERROR);
+	}
+
+	if ((Direction != (u8)XEMACPS_SEND) && (Direction != (u8)XEMACPS_RECV)) {
+		return (LONG)(XST_INVALID_PARAM);
+	}
+
+	/* Starting from the top of the ring, save BD.Next, overwrite the entire
+	 * BD with the template, then restore BD.Next
+	 */
+	CurBd = RingPtr->BaseBdAddr;
+	for (i = 0U; i < RingPtr->AllCnt; i++) {
+		memcpy((void *)CurBd, SrcBdPtr, sizeof(XEmacPs_Bd));
+	CurBd += RingPtr->Separation;
+	}
+
+	CurBd -= RingPtr->Separation;
+
+	if (Direction == XEMACPS_RECV) {
+		XEmacPs_BdSetRxWrap(CurBd);
+	}
+	else {
+		XEmacPs_BdSetTxWrap(CurBd);
+	}
+
+	return (LONG)(XST_SUCCESS);
+}
+
+
+/*****************************************************************************/
+/**
+ * Reserve locations in the BD list. The set of returned BDs may be modified
+ * in preparation for future DMA transaction(s). Once the BDs are ready to be
+ * submitted to hardware, the user must call XEmacPs_BdRingToHw() in the same
+ * order which they were allocated here. Example:
+ *
+ * 
+ *        NumBd = 2,
+ *        Status = XEmacPs_BdRingAlloc(MyRingPtr, NumBd, &MyBdSet),
+ *
+ *        if (Status != XST_SUCCESS)
+ *        {
+ *            *Not enough BDs available for the request*
+ *        }
+ *
+ *        CurBd = MyBdSet,
+ *        for (i=0; i
+ *
+ * A more advanced use of this function may allocate multiple sets of BDs.
+ * They must be allocated and given to hardware in the correct sequence:
+ * 
+ *        * Legal *
+ *        XEmacPs_BdRingAlloc(MyRingPtr, NumBd1, &MySet1),
+ *        XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1),
+ *
+ *        * Legal *
+ *        XEmacPs_BdRingAlloc(MyRingPtr, NumBd1, &MySet1),
+ *        XEmacPs_BdRingAlloc(MyRingPtr, NumBd2, &MySet2),
+ *        XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1),
+ *        XEmacPs_BdRingToHw(MyRingPtr, NumBd2, MySet2),
+ *
+ *        * Not legal *
+ *        XEmacPs_BdRingAlloc(MyRingPtr, NumBd1, &MySet1),
+ *        XEmacPs_BdRingAlloc(MyRingPtr, NumBd2, &MySet2),
+ *        XEmacPs_BdRingToHw(MyRingPtr, NumBd2, MySet2),
+ *        XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1),
+ * 

+ *
+ * Use the API defined in xemacps_bd.h to modify individual BDs. Traversal
+ * of the BD set can be done using XEmacPs_BdRingNext() and
+ * XEmacPs_BdRingPrev().
+ *
+ * @param RingPtr is a pointer to the BD ring instance to be worked on.
+ * @param NumBd is the number of BDs to allocate
+ * @param BdSetPtr is an output parameter, it points to the first BD available
+ *        for modification.
+ *
+ * @return
+ *   - XST_SUCCESS if the requested number of BDs was returned in the BdSetPtr
+ *     parameter.
+ *   - XST_FAILURE if there were not enough free BDs to satisfy the request.
+ *
+ * @note This function should not be preempted by another XEmacPs_Bd function
+ *       call that modifies the BD space. It is the caller's responsibility to
+ *       provide a mutual exclusion mechanism.
+ *
+ * @note Do not modify more BDs than the number requested with the NumBd
+ *       parameter. Doing so will lead to data corruption and system
+ *       instability.
+ *
+ *****************************************************************************/
+LONG XEmacPs_BdRingAlloc(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			 XEmacPs_Bd ** BdSetPtr)
+{
+	LONG Status;
+	/* Enough free BDs available for the request? */
+	if (RingPtr->FreeCnt < NumBd) {
+		Status = (LONG)(XST_FAILURE);
+	} else {
+	/* Set the return argument and move FreeHead forward */
+	*BdSetPtr = RingPtr->FreeHead;
+	XEMACPS_RING_SEEKAHEAD(RingPtr, RingPtr->FreeHead, NumBd);
+	RingPtr->FreeCnt -= NumBd;
+	RingPtr->PreCnt += NumBd;
+		Status = (LONG)(XST_SUCCESS);
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * Fully or partially undo an XEmacPs_BdRingAlloc() operation. Use this
+ * function if all the BDs allocated by XEmacPs_BdRingAlloc() could not be
+ * transferred to hardware with XEmacPs_BdRingToHw().
+ *
+ * This function helps out in situations when an unrelated error occurs after
+ * BDs have been allocated but before they have been given to hardware.
+ * An example of this type of error would be an OS running out of resources.
+ *
+ * This function is not the same as XEmacPs_BdRingFree(). The Free function
+ * returns BDs to the free list after they have been processed by hardware,
+ * while UnAlloc returns them before being processed by hardware.
+ *
+ * There are two scenarios where this function can be used. Full UnAlloc or
+ * Partial UnAlloc. A Full UnAlloc means all the BDs Alloc'd will be returned:
+ *
+ * 
+ *    Status = XEmacPs_BdRingAlloc(MyRingPtr, 10, &BdPtr),
+ *        ...
+ *    if (Error)
+ *    {
+ *        Status = XEmacPs_BdRingUnAlloc(MyRingPtr, 10, &BdPtr),
+ *    }
+ * 

+ *
+ * A partial UnAlloc means some of the BDs Alloc'd will be returned:
+ *
+ * 
+ *    Status = XEmacPs_BdRingAlloc(MyRingPtr, 10, &BdPtr),
+ *    BdsLeft = 10,
+ *    CurBdPtr = BdPtr,
+ *
+ *    while (BdsLeft)
+ *    {
+ *       if (Error)
+ *       {
+ *          Status = XEmacPs_BdRingUnAlloc(MyRingPtr, BdsLeft, CurBdPtr),
+ *       }
+ *
+ *       CurBdPtr = XEmacPs_BdRingNext(MyRingPtr, CurBdPtr),
+ *       BdsLeft--,
+ *    }
+ * 

+ *
+ * A partial UnAlloc must include the last BD in the list that was Alloc'd.
+ *
+ * @param RingPtr is a pointer to the instance to be worked on.
+ * @param NumBd is the number of BDs to allocate
+ * @param BdSetPtr is an output parameter, it points to the first BD available
+ *        for modification.
+ *
+ * @return
+ *   - XST_SUCCESS if the BDs were unallocated.
+ *   - XST_FAILURE if NumBd parameter was greater that the number of BDs in
+ *     the preprocessing state.
+ *
+ * @note This function should not be preempted by another XEmacPs_Bd function
+ *       call that modifies the BD space. It is the caller's responsibility to
+ *       provide a mutual exclusion mechanism.
+ *
+ *****************************************************************************/
+LONG XEmacPs_BdRingUnAlloc(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			   XEmacPs_Bd * BdSetPtr)
+{
+	LONG Status;
+	(void) BdSetPtr;
+	Xil_AssertNonvoid(RingPtr != NULL);
+	Xil_AssertNonvoid(BdSetPtr != NULL);
+
+	/* Enough BDs in the free state for the request? */
+	if (RingPtr->PreCnt < NumBd) {
+		Status = (LONG)(XST_FAILURE);
+	} else {
+	/* Set the return argument and move FreeHead backward */
+		XEMACPS_RING_SEEKBACK(RingPtr, (RingPtr->FreeHead), NumBd);
+	RingPtr->FreeCnt += NumBd;
+	RingPtr->PreCnt -= NumBd;
+		Status = (LONG)(XST_SUCCESS);
+	}
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+ * Enqueue a set of BDs to hardware that were previously allocated by
+ * XEmacPs_BdRingAlloc(). Once this function returns, the argument BD set goes
+ * under hardware control. Any changes made to these BDs after this point will
+ * corrupt the BD list leading to data corruption and system instability.
+ *
+ * The set will be rejected if the last BD of the set does not mark the end of
+ * a packet (see XEmacPs_BdSetLast()).
+ *
+ * @param RingPtr is a pointer to the instance to be worked on.
+ * @param NumBd is the number of BDs in the set.
+ * @param BdSetPtr is the first BD of the set to commit to hardware.
+ *
+ * @return
+ *   - XST_SUCCESS if the set of BDs was accepted and enqueued to hardware.
+ *   - XST_FAILURE if the set of BDs was rejected because the last BD of the set
+ *     did not have its "last" bit set.
+ *   - XST_DMA_SG_LIST_ERROR if this function was called out of sequence with
+ *     XEmacPs_BdRingAlloc().
+ *
+ * @note This function should not be preempted by another XEmacPs_Bd function
+ *       call that modifies the BD space. It is the caller's responsibility to
+ *       provide a mutual exclusion mechanism.
+ *
+ *****************************************************************************/
+LONG XEmacPs_BdRingToHw(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			XEmacPs_Bd * BdSetPtr)
+{
+	XEmacPs_Bd *CurBdPtr;
+	u32 i;
+	LONG Status;
+	/* if no bds to process, simply return. */
+	if (0U == NumBd){
+		Status = (LONG)(XST_SUCCESS);
+	} else {
+	/* Make sure we are in sync with XEmacPs_BdRingAlloc() */
+	if ((RingPtr->PreCnt < NumBd) || (RingPtr->PreHead != BdSetPtr)) {
+			Status = (LONG)(XST_DMA_SG_LIST_ERROR);
+		} else {
+	CurBdPtr = BdSetPtr;
+			for (i = 0U; i < NumBd; i++) {
+				CurBdPtr = (XEmacPs_Bd *)((void *)XEmacPs_BdRingNext(RingPtr, CurBdPtr));
+	}
+	/* Adjust ring pointers & counters */
+	XEMACPS_RING_SEEKAHEAD(RingPtr, RingPtr->PreHead, NumBd);
+	RingPtr->PreCnt -= NumBd;
+	RingPtr->HwTail = CurBdPtr;
+	RingPtr->HwCnt += NumBd;
+
+			Status = (LONG)(XST_SUCCESS);
+		}
+	}
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+ * Returns a set of BD(s) that have been processed by hardware. The returned
+ * BDs may be examined to determine the outcome of the DMA transaction(s).
+ * Once the BDs have been examined, the user must call XEmacPs_BdRingFree()
+ * in the same order which they were retrieved here. Example:
+ *
+ * 
+ *        NumBd = XEmacPs_BdRingFromHwTx(MyRingPtr, MaxBd, &MyBdSet),
+ *        if (NumBd == 0)
+ *        {
+ *           * hardware has nothing ready for us yet*
+ *        }
+ *
+ *        CurBd = MyBdSet,
+ *        for (i=0; i
+ *
+ * A more advanced use of this function may allocate multiple sets of BDs.
+ * They must be retrieved from hardware and freed in the correct sequence:
+ * 
+ *        * Legal *
+ *        XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd1, &MySet1),
+ *        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1),
+ *
+ *        * Legal *
+ *        XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd1, &MySet1),
+ *        XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd2, &MySet2),
+ *        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1),
+ *        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2),
+ *
+ *        * Not legal *
+ *        XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd1, &MySet1),
+ *        XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd2, &MySet2),
+ *        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2),
+ *        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1),
+ * 

+ *
+ * If hardware has only partially completed a packet spanning multiple BDs,
+ * then none of the BDs for that packet will be included in the results.
+ *
+ * @param RingPtr is a pointer to the instance to be worked on.
+ * @param BdLimit is the maximum number of BDs to return in the set.
+ * @param BdSetPtr is an output parameter, it points to the first BD available
+ *        for examination.
+ *
+ * @return
+ *   The number of BDs processed by hardware. A value of 0 indicates that no
+ *   data is available. No more than BdLimit BDs will be returned.
+ *
+ * @note Treat BDs returned by this function as read-only.
+ *
+ * @note This function should not be preempted by another XEmacPs_Bd function
+ *       call that modifies the BD space. It is the caller's responsibility to
+ *       provide a mutual exclusion mechanism.
+ *
+ *****************************************************************************/
+u32 XEmacPs_BdRingFromHwTx(XEmacPs_BdRing * RingPtr, u32 BdLimit,
+				 XEmacPs_Bd ** BdSetPtr)
+{
+	XEmacPs_Bd *CurBdPtr;
+	u32 BdStr = 0U;
+	u32 BdCount;
+	u32 BdPartialCount;
+	u32 Sop = 0U;
+	u32 Status;
+	u32 BdLimitLoc = BdLimit;
+	CurBdPtr = RingPtr->HwHead;
+	BdCount = 0U;
+	BdPartialCount = 0U;
+
+	/* If no BDs in work group, then there's nothing to search */
+	if (RingPtr->HwCnt == 0x00000000U) {
+		*BdSetPtr = NULL;
+		Status = 0U;
+	} else {
+
+		if (BdLimitLoc > RingPtr->HwCnt){
+			BdLimitLoc = RingPtr->HwCnt;
+	}
+	/* Starting at HwHead, keep moving forward in the list until:
+	 *  - A BD is encountered with its new/used bit set which means
+	 *    hardware has not completed processing of that BD.
+	 *  - RingPtr->HwTail is reached and RingPtr->HwCnt is reached.
+	 *  - The number of requested BDs has been processed
+	 */
+		while (BdCount < BdLimitLoc) {
+		/* Read the status */
+			if(CurBdPtr != NULL){
+		BdStr = XEmacPs_BdRead(CurBdPtr, XEMACPS_BD_STAT_OFFSET);
+			}
+
+			if ((Sop == 0x00000000U) && ((BdStr & XEMACPS_TXBUF_USED_MASK)!=0x00000000U)){
+				Sop = 1U;
+			}
+			if (Sop == 0x00000001U) {
+			BdCount++;
+			BdPartialCount++;
+		}
+
+		/* hardware has processed this BD so check the "last" bit.
+		 * If it is clear, then there are more BDs for the current
+		 * packet. Keep a count of these partial packet BDs.
+		 */
+			if ((Sop == 0x00000001U) && ((BdStr & XEMACPS_TXBUF_LAST_MASK)!=0x00000000U)) {
+				Sop = 0U;
+				BdPartialCount = 0U;
+		}
+
+		/* Move on to next BD in work group */
+		CurBdPtr = XEmacPs_BdRingNext(RingPtr, CurBdPtr);
+	}
+
+	/* Subtract off any partial packet BDs found */
+        BdCount -= BdPartialCount;
+
+	/* If BdCount is non-zero then BDs were found to return. Set return
+	 * parameters, update pointers and counters, return success
+	 */
+		if (BdCount > 0x00000000U) {
+		*BdSetPtr = RingPtr->HwHead;
+		RingPtr->HwCnt -= BdCount;
+		RingPtr->PostCnt += BdCount;
+		XEMACPS_RING_SEEKAHEAD(RingPtr, RingPtr->HwHead, BdCount);
+			Status = (BdCount);
+		} else {
+			*BdSetPtr = NULL;
+			Status = 0U;
+	}
+	}
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+ * Returns a set of BD(s) that have been processed by hardware. The returned
+ * BDs may be examined to determine the outcome of the DMA transaction(s).
+ * Once the BDs have been examined, the user must call XEmacPs_BdRingFree()
+ * in the same order which they were retrieved here. Example:
+ *
+ * 
+ *        NumBd = XEmacPs_BdRingFromHwRx(MyRingPtr, MaxBd, &MyBdSet),
+ *
+ *        if (NumBd == 0)
+ *        {
+ *           *hardware has nothing ready for us yet*
+ *        }
+ *
+ *        CurBd = MyBdSet,
+ *        for (i=0; i
+ *
+ * A more advanced use of this function may allocate multiple sets of BDs.
+ * They must be retrieved from hardware and freed in the correct sequence:
+ * 
+ *        * Legal *
+ *        XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd1, &MySet1),
+ *        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1),
+ *
+ *        * Legal *
+ *        XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd1, &MySet1),
+ *        XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd2, &MySet2),
+ *        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1),
+ *        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2),
+ *
+ *        * Not legal *
+ *        XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd1, &MySet1),
+ *        XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd2, &MySet2),
+ *        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2),
+ *        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1),
+ * 

+ *
+ * If hardware has only partially completed a packet spanning multiple BDs,
+ * then none of the BDs for that packet will be included in the results.
+ *
+ * @param RingPtr is a pointer to the instance to be worked on.
+ * @param BdLimit is the maximum number of BDs to return in the set.
+ * @param BdSetPtr is an output parameter, it points to the first BD available
+ *        for examination.
+ *
+ * @return
+ *   The number of BDs processed by hardware. A value of 0 indicates that no
+ *   data is available. No more than BdLimit BDs will be returned.
+ *
+ * @note Treat BDs returned by this function as read-only.
+ *
+ * @note This function should not be preempted by another XEmacPs_Bd function
+ *       call that modifies the BD space. It is the caller's responsibility to
+ *       provide a mutual exclusion mechanism.
+ *
+ *****************************************************************************/
+u32 XEmacPs_BdRingFromHwRx(XEmacPs_BdRing * RingPtr, u32 BdLimit,
+				 XEmacPs_Bd ** BdSetPtr)
+{
+	XEmacPs_Bd *CurBdPtr;
+	u32 BdStr = 0U;
+	u32 BdCount;
+	u32 BdPartialCount;
+	u32 Status;
+
+	CurBdPtr = RingPtr->HwHead;
+	BdCount = 0U;
+	BdPartialCount = 0U;
+
+	/* If no BDs in work group, then there's nothing to search */
+	if (RingPtr->HwCnt == 0x00000000U) {
+		*BdSetPtr = NULL;
+		Status = 0U;
+	} else {
+
+	/* Starting at HwHead, keep moving forward in the list until:
+	 *  - A BD is encountered with its new/used bit set which means
+	 *    hardware has completed processing of that BD.
+	 *  - RingPtr->HwTail is reached and RingPtr->HwCnt is reached.
+	 *  - The number of requested BDs has been processed
+	 */
+	while (BdCount < BdLimit) {
+
+		/* Read the status */
+			if(CurBdPtr!=NULL){
+		BdStr = XEmacPs_BdRead(CurBdPtr, XEMACPS_BD_STAT_OFFSET);
+			}
+			if ((!(XEmacPs_BdIsRxNew(CurBdPtr)))==TRUE) {
+			break;
+		}
+
+		BdCount++;
+
+		/* hardware has processed this BD so check the "last" bit. If
+                 * it is clear, then there are more BDs for the current packet.
+                 * Keep a count of these partial packet BDs.
+		 */
+			if ((BdStr & XEMACPS_RXBUF_EOF_MASK)!=0x00000000U) {
+				BdPartialCount = 0U;
+			} else {
+			BdPartialCount++;
+		}
+
+		/* Move on to next BD in work group */
+		CurBdPtr = XEmacPs_BdRingNext(RingPtr, CurBdPtr);
+	}
+
+	/* Subtract off any partial packet BDs found */
+	BdCount -= BdPartialCount;
+
+	/* If BdCount is non-zero then BDs were found to return. Set return
+	 * parameters, update pointers and counters, return success
+	 */
+		if (BdCount > 0x00000000U) {
+		*BdSetPtr = RingPtr->HwHead;
+		RingPtr->HwCnt -= BdCount;
+		RingPtr->PostCnt += BdCount;
+		XEMACPS_RING_SEEKAHEAD(RingPtr, RingPtr->HwHead, BdCount);
+			Status = (BdCount);
+	}
+	else {
+		*BdSetPtr = NULL;
+			Status = 0U;
+	}
+}
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+ * Frees a set of BDs that had been previously retrieved with
+ * XEmacPs_BdRingFromHw().
+ *
+ * @param RingPtr is a pointer to the instance to be worked on.
+ * @param NumBd is the number of BDs to free.
+ * @param BdSetPtr is the head of a list of BDs returned by
+ * XEmacPs_BdRingFromHw().
+ *
+ * @return
+ *   - XST_SUCCESS if the set of BDs was freed.
+ *   - XST_DMA_SG_LIST_ERROR if this function was called out of sequence with
+ *     XEmacPs_BdRingFromHw().
+ *
+ * @note This function should not be preempted by another XEmacPs_Bd function
+ *       call that modifies the BD space. It is the caller's responsibility to
+ *       provide a mutual exclusion mechanism.
+ *
+ *****************************************************************************/
+LONG XEmacPs_BdRingFree(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			XEmacPs_Bd * BdSetPtr)
+{
+	LONG Status;
+	/* if no bds to process, simply return. */
+	if (0x00000000U == NumBd){
+		Status = (LONG)(XST_SUCCESS);
+	} else {
+	/* Make sure we are in sync with XEmacPs_BdRingFromHw() */
+	if ((RingPtr->PostCnt < NumBd) || (RingPtr->PostHead != BdSetPtr)) {
+			Status = (LONG)(XST_DMA_SG_LIST_ERROR);
+		} else {
+	/* Update pointers and counters */
+	RingPtr->FreeCnt += NumBd;
+	RingPtr->PostCnt -= NumBd;
+	XEMACPS_RING_SEEKAHEAD(RingPtr, RingPtr->PostHead, NumBd);
+			Status = (LONG)(XST_SUCCESS);
+		}
+	}
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+ * Check the internal data structures of the BD ring for the provided channel.
+ * The following checks are made:
+ *
+ *   - Is the BD ring linked correctly in physical address space.
+ *   - Do the internal pointers point to BDs in the ring.
+ *   - Do the internal counters add up.
+ *
+ * The channel should be stopped prior to calling this function.
+ *
+ * @param RingPtr is a pointer to the instance to be worked on.
+ * @param Direction is either XEMACPS_SEND or XEMACPS_RECV that indicates
+ *        which direction.
+ *
+ * @return
+ *   - XST_SUCCESS if the set of BDs was freed.
+ *   - XST_DMA_SG_NO_LIST if the list has not been created.
+ *   - XST_IS_STARTED if the channel is not stopped.
+ *   - XST_DMA_SG_LIST_ERROR if a problem is found with the internal data
+ *     structures. If this value is returned, the channel should be reset to
+ *     avoid data corruption or system instability.
+ *
+ * @note This function should not be preempted by another XEmacPs_Bd function
+ *       call that modifies the BD space. It is the caller's responsibility to
+ *       provide a mutual exclusion mechanism.
+ *
+ *****************************************************************************/
+LONG XEmacPs_BdRingCheck(XEmacPs_BdRing * RingPtr, u8 Direction)
+{
+	UINTPTR AddrV, AddrP;
+	u32 i;
+
+	if ((Direction != (u8)XEMACPS_SEND) && (Direction != (u8)XEMACPS_RECV)) {
+		return (LONG)(XST_INVALID_PARAM);
+	}
+
+	/* Is the list created */
+	if (RingPtr->AllCnt == 0x00000000U) {
+		return (LONG)(XST_DMA_SG_NO_LIST);
+	}
+
+	/* Can't check if channel is running */
+	if (RingPtr->RunState == (u32)XST_DMA_SG_IS_STARTED) {
+		return (LONG)(XST_IS_STARTED);
+	}
+
+	/* RunState doesn't make sense */
+	if (RingPtr->RunState != (u32)XST_DMA_SG_IS_STOPPED) {
+		return (LONG)(XST_DMA_SG_LIST_ERROR);
+	}
+
+	/* Verify internal pointers point to correct memory space */
+	AddrV = (UINTPTR) RingPtr->FreeHead;
+	if ((AddrV < RingPtr->BaseBdAddr) || (AddrV > RingPtr->HighBdAddr)) {
+		return (LONG)(XST_DMA_SG_LIST_ERROR);
+	}
+
+	AddrV = (UINTPTR) RingPtr->PreHead;
+	if ((AddrV < RingPtr->BaseBdAddr) || (AddrV > RingPtr->HighBdAddr)) {
+		return (LONG)(XST_DMA_SG_LIST_ERROR);
+	}
+
+	AddrV = (UINTPTR) RingPtr->HwHead;
+	if ((AddrV < RingPtr->BaseBdAddr) || (AddrV > RingPtr->HighBdAddr)) {
+		return (LONG)(XST_DMA_SG_LIST_ERROR);
+	}
+
+	AddrV = (UINTPTR) RingPtr->HwTail;
+	if ((AddrV < RingPtr->BaseBdAddr) || (AddrV > RingPtr->HighBdAddr)) {
+		return (LONG)(XST_DMA_SG_LIST_ERROR);
+	}
+
+	AddrV = (UINTPTR) RingPtr->PostHead;
+	if ((AddrV < RingPtr->BaseBdAddr) || (AddrV > RingPtr->HighBdAddr)) {
+		return (LONG)(XST_DMA_SG_LIST_ERROR);
+	}
+
+	/* Verify internal counters add up */
+	if ((RingPtr->HwCnt + RingPtr->PreCnt + RingPtr->FreeCnt +
+	     RingPtr->PostCnt) != RingPtr->AllCnt) {
+		return (LONG)(XST_DMA_SG_LIST_ERROR);
+	}
+
+	/* Verify BDs are linked correctly */
+	AddrV = RingPtr->BaseBdAddr;
+	AddrP = RingPtr->PhysBaseAddr + RingPtr->Separation;
+
+	for (i = 1U; i < RingPtr->AllCnt; i++) {
+		/* Check BDA for this BD. It should point to next physical addr */
+		if (XEmacPs_BdRead(AddrV, XEMACPS_BD_ADDR_OFFSET) != AddrP) {
+			return (LONG)(XST_DMA_SG_LIST_ERROR);
+		}
+
+		/* Move on to next BD */
+		AddrV += RingPtr->Separation;
+		AddrP += RingPtr->Separation;
+	}
+
+	/* Last BD should have wrap bit set */
+	if (XEMACPS_SEND == Direction) {
+		if ((!XEmacPs_BdIsTxWrap(AddrV))==TRUE) {
+			return (LONG)(XST_DMA_SG_LIST_ERROR);
+		}
+	}
+	else {			/* XEMACPS_RECV */
+		if ((!XEmacPs_BdIsRxWrap(AddrV))==TRUE) {
+			return (LONG)(XST_DMA_SG_LIST_ERROR);
+		}
+	}
+
+	/* No problems found */
+	return (LONG)(XST_SUCCESS);
+}
+
+/*****************************************************************************/
+/**
+ * Set this bit to mark the last descriptor in the receive buffer descriptor
+ * list.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetRxWrap(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+static void XEmacPs_BdSetRxWrap(UINTPTR BdPtr)
+{
+    u32 DataValueRx;
+	u32 *TempPtr;
+
+	BdPtr += (u32)(XEMACPS_BD_ADDR_OFFSET);
+	TempPtr = (u32 *)BdPtr;
+	if(TempPtr != NULL) {
+		DataValueRx = *TempPtr;
+		DataValueRx |= XEMACPS_RXBUF_WRAP_MASK;
+		*TempPtr = DataValueRx;
+	}
+}
+
+/*****************************************************************************/
+/**
+ * Sets this bit to mark the last descriptor in the transmit buffer
+ * descriptor list.
+ *
+ * @param  BdPtr is the BD pointer to operate on
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdSetTxWrap(XEmacPs_Bd* BdPtr)
+ *
+ *****************************************************************************/
+static void XEmacPs_BdSetTxWrap(UINTPTR BdPtr)
+{
+    u32 DataValueTx;
+	u32 *TempPtr;
+
+	BdPtr += (u32)(XEMACPS_BD_STAT_OFFSET);
+	TempPtr = (u32 *)BdPtr;
+	if(TempPtr != NULL) {
+		DataValueTx = *TempPtr;
+		DataValueTx |= XEMACPS_TXBUF_WRAP_MASK;
+		*TempPtr = DataValueTx;
+	}
+}
+
+/*****************************************************************************/
+/**
+ * Reset BD ring head and tail pointers.
+ *
+ * @param RingPtr is the instance to be worked on.
+ * @param VirtAddr is the virtual base address of the user memory region.
+ *
+ * @note
+ * Should be called after XEmacPs_Stop()
+ *
+ * @note
+ * C-style signature:
+ *    void XEmacPs_BdRingPtrReset(XEmacPs_BdRing * RingPtr, void *virtaddrloc)
+ *
+ *****************************************************************************/
+void XEmacPs_BdRingPtrReset(XEmacPs_BdRing * RingPtr, void *virtaddrloc)
+{
+	RingPtr->FreeHead = virtaddrloc;
+	RingPtr->PreHead = virtaddrloc;
+	RingPtr->HwHead = virtaddrloc;
+	RingPtr->HwTail = virtaddrloc;
+	RingPtr->PostHead = virtaddrloc;
+}
+
+/** @} */
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_bdring.h b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_bdring.h
new file mode 100644
index 0000000..b89e898
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_bdring.h
@@ -0,0 +1,241 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xemacps_bdring.h
+* @addtogroup emacps_v3_7
+* @{
+*
+* The Xiline EmacPs Buffer Descriptor ring driver. This is part of EmacPs
+* DMA functionalities.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a wsy  01/10/10 First release
+* 2.1   srt  07/15/14 Add support for Zynq Ultrascale Mp architecture.
+* 3.0   kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.6   rb   09/08/17 HwCnt variable (in XEmacPs_BdRing structure) is
+*		      changed to volatile.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XEMACPS_BDRING_H	/* prevent curcular inclusions */
+#define XEMACPS_BDRING_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**************************** Type Definitions *******************************/
+
+/** This is an internal structure used to maintain the DMA list */
+typedef struct {
+	UINTPTR PhysBaseAddr;/**< Physical address of 1st BD in list */
+	UINTPTR BaseBdAddr;	 /**< Virtual address of 1st BD in list */
+	UINTPTR HighBdAddr;	 /**< Virtual address of last BD in the list */
+	u32 Length;	 /**< Total size of ring in bytes */
+	u32 RunState;	 /**< Flag to indicate DMA is started */
+	u32 Separation;	 /**< Number of bytes between the starting address
+                                  of adjacent BDs */
+	XEmacPs_Bd *FreeHead;
+			     /**< First BD in the free group */
+	XEmacPs_Bd *PreHead;/**< First BD in the pre-work group */
+	XEmacPs_Bd *HwHead; /**< First BD in the work group */
+	XEmacPs_Bd *HwTail; /**< Last BD in the work group */
+	XEmacPs_Bd *PostHead;
+			     /**< First BD in the post-work group */
+	XEmacPs_Bd *BdaRestart;
+			     /**< BDA to load when channel is started */
+
+	volatile u32 HwCnt;    /**< Number of BDs in work group */
+	u32 PreCnt;     /**< Number of BDs in pre-work group */
+	u32 FreeCnt;    /**< Number of allocatable BDs in the free group */
+	u32 PostCnt;    /**< Number of BDs in post-work group */
+	u32 AllCnt;     /**< Total Number of BDs for channel */
+} XEmacPs_BdRing;
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+* Use this macro at initialization time to determine how many BDs will fit
+* in a BD list within the given memory constraints.
+*
+* The results of this macro can be provided to XEmacPs_BdRingCreate().
+*
+* @param Alignment specifies what byte alignment the BDs must fall on and
+*        must be a power of 2 to get an accurate calculation (32, 64, 128,...)
+* @param Bytes is the number of bytes to be used to store BDs.
+*
+* @return Number of BDs that can fit in the given memory area
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_BdRingCntCalc(u32 Alignment, u32 Bytes)
+*
+******************************************************************************/
+#define XEmacPs_BdRingCntCalc(Alignment, Bytes)                    \
+    (u32)((Bytes) / (sizeof(XEmacPs_Bd)))
+
+/*****************************************************************************/
+/**
+* Use this macro at initialization time to determine how many bytes of memory
+* is required to contain a given number of BDs at a given alignment.
+*
+* @param Alignment specifies what byte alignment the BDs must fall on. This
+*        parameter must be a power of 2 to get an accurate calculation (32, 64,
+*        128,...)
+* @param NumBd is the number of BDs to calculate memory size requirements for
+*
+* @return The number of bytes of memory required to create a BD list with the
+*         given memory constraints.
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_BdRingMemCalc(u32 Alignment, u32 NumBd)
+*
+******************************************************************************/
+#define XEmacPs_BdRingMemCalc(Alignment, NumBd)                    \
+    (u32)(sizeof(XEmacPs_Bd) * (NumBd))
+
+/****************************************************************************/
+/**
+* Return the total number of BDs allocated by this channel with
+* XEmacPs_BdRingCreate().
+*
+* @param  RingPtr is the DMA channel to operate on.
+*
+* @return The total number of BDs allocated for this channel.
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_BdRingGetCnt(XEmacPs_BdRing* RingPtr)
+*
+*****************************************************************************/
+#define XEmacPs_BdRingGetCnt(RingPtr) ((RingPtr)->AllCnt)
+
+/****************************************************************************/
+/**
+* Return the number of BDs allocatable with XEmacPs_BdRingAlloc() for pre-
+* processing.
+*
+* @param  RingPtr is the DMA channel to operate on.
+*
+* @return The number of BDs currently allocatable.
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_BdRingGetFreeCnt(XEmacPs_BdRing* RingPtr)
+*
+*****************************************************************************/
+#define XEmacPs_BdRingGetFreeCnt(RingPtr)   ((RingPtr)->FreeCnt)
+
+/****************************************************************************/
+/**
+* Return the next BD from BdPtr in a list.
+*
+* @param  RingPtr is the DMA channel to operate on.
+* @param  BdPtr is the BD to operate on.
+*
+* @return The next BD in the list relative to the BdPtr parameter.
+*
+* @note
+* C-style signature:
+*    XEmacPs_Bd *XEmacPs_BdRingNext(XEmacPs_BdRing* RingPtr,
+*                                      XEmacPs_Bd *BdPtr)
+*
+*****************************************************************************/
+#define XEmacPs_BdRingNext(RingPtr, BdPtr)                           \
+    (((UINTPTR)((void *)(BdPtr)) >= (RingPtr)->HighBdAddr) ?                     \
+    (XEmacPs_Bd*)((void*)(RingPtr)->BaseBdAddr) :                              \
+    (XEmacPs_Bd*)((UINTPTR)((void *)(BdPtr)) + (RingPtr)->Separation))
+
+/****************************************************************************/
+/**
+* Return the previous BD from BdPtr in the list.
+*
+* @param  RingPtr is the DMA channel to operate on.
+* @param  BdPtr is the BD to operate on
+*
+* @return The previous BD in the list relative to the BdPtr parameter.
+*
+* @note
+* C-style signature:
+*    XEmacPs_Bd *XEmacPs_BdRingPrev(XEmacPs_BdRing* RingPtr,
+*                                      XEmacPs_Bd *BdPtr)
+*
+*****************************************************************************/
+#define XEmacPs_BdRingPrev(RingPtr, BdPtr)                           \
+    (((UINTPTR)(BdPtr) <= (RingPtr)->BaseBdAddr) ?                     \
+    (XEmacPs_Bd*)(RingPtr)->HighBdAddr :                              \
+    (XEmacPs_Bd*)((UINTPTR)(BdPtr) - (RingPtr)->Separation))
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Scatter gather DMA related functions in xemacps_bdring.c
+ */
+LONG XEmacPs_BdRingCreate(XEmacPs_BdRing * RingPtr, UINTPTR PhysAddr,
+			  UINTPTR VirtAddr, u32 Alignment, u32 BdCount);
+LONG XEmacPs_BdRingClone(XEmacPs_BdRing * RingPtr, XEmacPs_Bd * SrcBdPtr,
+			 u8 Direction);
+LONG XEmacPs_BdRingAlloc(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			 XEmacPs_Bd ** BdSetPtr);
+LONG XEmacPs_BdRingUnAlloc(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			   XEmacPs_Bd * BdSetPtr);
+LONG XEmacPs_BdRingToHw(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			XEmacPs_Bd * BdSetPtr);
+LONG XEmacPs_BdRingFree(XEmacPs_BdRing * RingPtr, u32 NumBd,
+			XEmacPs_Bd * BdSetPtr);
+u32 XEmacPs_BdRingFromHwTx(XEmacPs_BdRing * RingPtr, u32 BdLimit,
+				 XEmacPs_Bd ** BdSetPtr);
+u32 XEmacPs_BdRingFromHwRx(XEmacPs_BdRing * RingPtr, u32 BdLimit,
+				 XEmacPs_Bd ** BdSetPtr);
+LONG XEmacPs_BdRingCheck(XEmacPs_BdRing * RingPtr, u8 Direction);
+
+void XEmacPs_BdRingPtrReset(XEmacPs_BdRing * RingPtr, void *virtaddrloc);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* end of protection macros */
+/** @} */
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_control.c b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_control.c
new file mode 100644
index 0000000..8217a45
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_control.c
@@ -0,0 +1,1174 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * @file xemacps_control.c
+* @addtogroup emacps_v3_7
+* @{
+ *
+ * Functions in this file implement general purpose command and control related
+ * functionality. See xemacps.h for a detailed description of the driver.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -------------------------------------------------------
+ * 1.00a wsy  01/10/10 First release
+ * 1.02a asa  11/05/12 Added a new API for deleting an entry from the HASH
+ *					   register. Added a new API for setting the BURST length
+ *					   in DMACR register.
+ * 2.1   srt  07/15/14 Add support for Zynq Ultrascale Mp architecture.
+ * 3.0   kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+ * 3.0   hk   02/20/15 Added support for jumbo frames.
+ * 3.2   hk   02/22/16 Added SGMII support for Zynq Ultrascale+ MPSoC.
+ * 

+ *****************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xemacps.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/*****************************************************************************/
+/**
+ * Set the MAC address for this driver/device.  The address is a 48-bit value.
+ * The device must be stopped before calling this function.
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ * @param AddressPtr is a pointer to a 6-byte MAC address.
+ * @param Index is a index to which MAC (1-4) address.
+ *
+ * @return
+ * - XST_SUCCESS if the MAC address was set successfully
+ * - XST_DEVICE_IS_STARTED if the device has not yet been stopped
+ *
+ *****************************************************************************/
+LONG XEmacPs_SetMacAddress(XEmacPs *InstancePtr, void *AddressPtr, u8 Index)
+{
+	u32 MacAddr;
+	u8 *Aptr = (u8 *)(void *)AddressPtr;
+	u8 IndexLoc = Index;
+	LONG Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Aptr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((IndexLoc <= (u8)XEMACPS_MAX_MAC_ADDR) && (IndexLoc > 0x00U));
+
+	/* Be sure device has been stopped */
+	if (InstancePtr->IsStarted == (u32)XIL_COMPONENT_IS_STARTED) {
+		Status = (LONG)(XST_DEVICE_IS_STARTED);
+	}
+	else{
+	/* Index ranges 1 to 4, for offset calculation is 0 to 3. */
+		IndexLoc--;
+
+	/* Set the MAC bits [31:0] in BOT */
+		MacAddr = *(Aptr);
+		MacAddr |= ((u32)(*(Aptr+1)) << 8U);
+		MacAddr |= ((u32)(*(Aptr+2)) << 16U);
+		MacAddr |= ((u32)(*(Aptr+3)) << 24U);
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				((u32)XEMACPS_LADDR1L_OFFSET + ((u32)IndexLoc * (u32)8)), MacAddr);
+
+	/* There are reserved bits in TOP so don't affect them */
+	MacAddr = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					((u32)XEMACPS_LADDR1H_OFFSET + ((u32)IndexLoc * (u32)8)));
+
+		MacAddr &= (u32)(~XEMACPS_LADDR_MACH_MASK);
+
+	/* Set MAC bits [47:32] in TOP */
+		MacAddr |= (u32)(*(Aptr+4));
+		MacAddr |= (u32)(*(Aptr+5)) << 8U;
+
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				((u32)XEMACPS_LADDR1H_OFFSET + ((u32)IndexLoc * (u32)8)), MacAddr);
+
+		Status = (LONG)(XST_SUCCESS);
+	}
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+ * Get the MAC address for this driver/device.
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ * @param AddressPtr is an output parameter, and is a pointer to a buffer into
+ *        which the current MAC address will be copied.
+ * @param Index is a index to which MAC (1-4) address.
+ *
+ *****************************************************************************/
+void XEmacPs_GetMacAddress(XEmacPs *InstancePtr, void *AddressPtr, u8 Index)
+{
+	u32 MacAddr;
+	u8 *Aptr = (u8 *)(void *)AddressPtr;
+	u8 IndexLoc = Index;
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Aptr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((IndexLoc <= (u8)XEMACPS_MAX_MAC_ADDR) && (IndexLoc > 0x00U));
+
+	/* Index ranges 1 to 4, for offset calculation is 0 to 3. */
+	IndexLoc--;
+
+	MacAddr = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				    ((u32)XEMACPS_LADDR1L_OFFSET + ((u32)IndexLoc * (u32)8)));
+	*Aptr = (u8) MacAddr;
+	*(Aptr+1) = (u8) (MacAddr >> 8U);
+	*(Aptr+2) = (u8) (MacAddr >> 16U);
+	*(Aptr+3) = (u8) (MacAddr >> 24U);
+
+	/* Read MAC bits [47:32] in TOP */
+	MacAddr = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				    ((u32)XEMACPS_LADDR1H_OFFSET + ((u32)IndexLoc * (u32)8)));
+	*(Aptr+4) = (u8) MacAddr;
+	*(Aptr+5) = (u8) (MacAddr >> 8U);
+}
+
+
+/*****************************************************************************/
+/**
+ * Set 48-bit MAC addresses in hash table.
+ * The device must be stopped before calling this function.
+ *
+ * The hash address register is 64 bits long and takes up two locations in
+ * the memory map. The least significant bits are stored in hash register
+ * bottom and the most significant bits in hash register top.
+ *
+ * The unicast hash enable and the multicast hash enable bits in the network
+ * configuration register enable the reception of hash matched frames. The
+ * destination address is reduced to a 6 bit index into the 64 bit hash
+ * register using the following hash function. The hash function is an XOR
+ * of every sixth bit of the destination address.
+ *
+ * 
+ * hash_index[05] = da[05]^da[11]^da[17]^da[23]^da[29]^da[35]^da[41]^da[47]
+ * hash_index[04] = da[04]^da[10]^da[16]^da[22]^da[28]^da[34]^da[40]^da[46]
+ * hash_index[03] = da[03]^da[09]^da[15]^da[21]^da[27]^da[33]^da[39]^da[45]
+ * hash_index[02] = da[02]^da[08]^da[14]^da[20]^da[26]^da[32]^da[38]^da[44]
+ * hash_index[01] = da[01]^da[07]^da[13]^da[19]^da[25]^da[31]^da[37]^da[43]
+ * hash_index[00] = da[00]^da[06]^da[12]^da[18]^da[24]^da[30]^da[36]^da[42]
+ * 

+ *
+ * da[0] represents the least significant bit of the first byte received,
+ * that is, the multicast/unicast indicator, and da[47] represents the most
+ * significant bit of the last byte received.
+ *
+ * If the hash index points to a bit that is set in the hash register then
+ * the frame will be matched according to whether the frame is multicast
+ * or unicast.
+ *
+ * A multicast match will be signaled if the multicast hash enable bit is
+ * set, da[0] is logic 1 and the hash index points to a bit set in the hash
+ * register.
+ *
+ * A unicast match will be signaled if the unicast hash enable bit is set,
+ * da[0] is logic 0 and the hash index points to a bit set in the hash
+ * register.
+ *
+ * To receive all multicast frames, the hash register should be set with
+ * all ones and the multicast hash enable bit should be set in the network
+ * configuration register.
+ *
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ * @param AddressPtr is a pointer to a 6-byte MAC address.
+ *
+ * @return
+ * - XST_SUCCESS if the HASH MAC address was set successfully
+ * - XST_DEVICE_IS_STARTED if the device has not yet been stopped
+ * - XST_INVALID_PARAM if the HASH MAC address passed in does not meet
+ *   requirement after calculation
+ *
+ * @note
+ * Having Aptr be unsigned type prevents the following operations from sign
+ * extending.
+ *****************************************************************************/
+LONG XEmacPs_SetHash(XEmacPs *InstancePtr, void *AddressPtr)
+{
+	u32 HashAddr;
+	u8 *Aptr = (u8 *)(void *)AddressPtr;
+	u8 Temp1, Temp2, Temp3, Temp4, Temp5, Temp6, Temp7, Temp8;
+	u32 Result;
+	LONG Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(AddressPtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/* Be sure device has been stopped */
+	if (InstancePtr->IsStarted == (u32)XIL_COMPONENT_IS_STARTED) {
+		Status = (LONG)(XST_DEVICE_IS_STARTED);
+	} else {
+		Temp1 = (*(Aptr+0)) & 0x3FU;
+		Temp2 = ((*(Aptr+0) >> 6U) & 0x03U) | ((*(Aptr+1) & 0x0FU) << 2U);
+
+		Temp3 = ((*(Aptr+1) >> 4U) & 0x0FU) | ((*(Aptr+2) & 0x3U) << 4U);
+		Temp4 = ((*(Aptr+2) >> 2U) & 0x3FU);
+		Temp5 =   (*(Aptr+3)) & 0x3FU;
+		Temp6 = ((*(Aptr+3) >> 6U) & 0x03U) | ((*(Aptr+4) & 0x0FU) << 2U);
+		Temp7 = ((*(Aptr+4) >> 4U) & 0x0FU) | ((*(Aptr+5) & 0x03U) << 4U);
+		Temp8 = ((*(Aptr+5) >> 2U) & 0x3FU);
+
+		Result = (u32)((u32)Temp1 ^ (u32)Temp2 ^ (u32)Temp3 ^ (u32)Temp4 ^
+				(u32)Temp5 ^ (u32)Temp6 ^ (u32)Temp7 ^ (u32)Temp8);
+
+		if (Result >= (u32)XEMACPS_MAX_HASH_BITS) {
+			Status = (LONG)(XST_INVALID_PARAM);
+		} else {
+
+			if (Result < (u32)32) {
+		HashAddr = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_HASHL_OFFSET);
+				HashAddr |= (u32)(0x00000001U << Result);
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_HASHL_OFFSET, HashAddr);
+	} else {
+		HashAddr = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_HASHH_OFFSET);
+				HashAddr |= (u32)(0x00000001U << (u32)(Result - (u32)32));
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_HASHH_OFFSET, HashAddr);
+	}
+			Status = (LONG)(XST_SUCCESS);
+		}
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * Delete 48-bit MAC addresses in hash table.
+ * The device must be stopped before calling this function.
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ * @param AddressPtr is a pointer to a 6-byte MAC address.
+ *
+ * @return
+ * - XST_SUCCESS if the HASH MAC address was deleted successfully
+ * - XST_DEVICE_IS_STARTED if the device has not yet been stopped
+ * - XST_INVALID_PARAM if the HASH MAC address passed in does not meet
+ *   requirement after calculation
+ *
+ * @note
+ * Having Aptr be unsigned type prevents the following operations from sign
+ * extending.
+ *****************************************************************************/
+LONG XEmacPs_DeleteHash(XEmacPs *InstancePtr, void *AddressPtr)
+{
+	u32 HashAddr;
+	u8 *Aptr = (u8 *)(void *)AddressPtr;
+	u8 Temp1, Temp2, Temp3, Temp4, Temp5, Temp6, Temp7, Temp8;
+	u32 Result;
+	LONG Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Aptr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/* Be sure device has been stopped */
+	if (InstancePtr->IsStarted == (u32)XIL_COMPONENT_IS_STARTED) {
+		Status = (LONG)(XST_DEVICE_IS_STARTED);
+	} else {
+		Temp1 = (*(Aptr+0)) & 0x3FU;
+		Temp2 = ((*(Aptr+0) >> 6U) & 0x03U) | ((*(Aptr+1) & 0x0FU) << 2U);
+		Temp3 = ((*(Aptr+1) >> 4U) & 0x0FU) | ((*(Aptr+2) & 0x03U) << 4U);
+		Temp4 = ((*(Aptr+2) >> 2U) & 0x3FU);
+		Temp5 =   (*(Aptr+3)) & 0x3FU;
+		Temp6 = ((*(Aptr+3) >> 6U) & 0x03U) | ((*(Aptr+4) & 0x0FU) << 2U);
+		Temp7 = ((*(Aptr+4) >> 4U) & 0x0FU) | ((*(Aptr+5) & 0x03U) << 4U);
+		Temp8 = ((*(Aptr+5) >> 2U) & 0x3FU);
+
+		Result = (u32)((u32)Temp1 ^ (u32)Temp2 ^ (u32)Temp3 ^ (u32)Temp4 ^
+					(u32)Temp5 ^ (u32)Temp6 ^ (u32)Temp7 ^ (u32)Temp8);
+
+		if (Result >= (u32)(XEMACPS_MAX_HASH_BITS)) {
+			Status =  (LONG)(XST_INVALID_PARAM);
+		} else {
+			if (Result < (u32)32) {
+		HashAddr = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_HASHL_OFFSET);
+				HashAddr &= (u32)(~(0x00000001U << Result));
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_HASHL_OFFSET, HashAddr);
+	} else {
+		HashAddr = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_HASHH_OFFSET);
+				HashAddr &= (u32)(~(0x00000001U << (u32)(Result - (u32)32)));
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_HASHH_OFFSET, HashAddr);
+	}
+			Status = (LONG)(XST_SUCCESS);
+		}
+	}
+	return Status;
+}
+/*****************************************************************************/
+/**
+ * Clear the Hash registers for the mac address pointed by AddressPtr.
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ *
+ *****************************************************************************/
+void XEmacPs_ClearHash(XEmacPs *InstancePtr)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				    XEMACPS_HASHL_OFFSET, 0x0U);
+
+	/* write bits [63:32] in TOP */
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				    XEMACPS_HASHH_OFFSET, 0x0U);
+}
+
+
+/*****************************************************************************/
+/**
+ * Get the Hash address for this driver/device.
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ * @param AddressPtr is an output parameter, and is a pointer to a buffer into
+ *        which the current HASH MAC address will be copied.
+ *
+ *****************************************************************************/
+void XEmacPs_GetHash(XEmacPs *InstancePtr, void *AddressPtr)
+{
+	u32 *Aptr = (u32 *)(void *)AddressPtr;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(AddressPtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	*(Aptr+0) = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				    XEMACPS_HASHL_OFFSET);
+
+	/* Read Hash bits [63:32] in TOP */
+	*(Aptr+1) = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				    XEMACPS_HASHH_OFFSET);
+}
+
+
+/*****************************************************************************/
+/**
+ * Set the Type ID match for this driver/device.  The register is a 32-bit
+ * value. The device must be stopped before calling this function.
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ * @param Id_Check is type ID to be configured.
+ * @param Index is a index to which Type ID (1-4).
+ *
+ * @return
+ * - XST_SUCCESS if the MAC address was set successfully
+ * - XST_DEVICE_IS_STARTED if the device has not yet been stopped
+ *
+ *****************************************************************************/
+LONG XEmacPs_SetTypeIdCheck(XEmacPs *InstancePtr, u32 Id_Check, u8 Index)
+{
+	u8 IndexLoc = Index;
+	LONG Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((IndexLoc <= (u8)XEMACPS_MAX_TYPE_ID) && (IndexLoc > 0x00U));
+
+	/* Be sure device has been stopped */
+	if (InstancePtr->IsStarted == (u32)XIL_COMPONENT_IS_STARTED) {
+		Status = (LONG)(XST_DEVICE_IS_STARTED);
+	} else {
+
+	/* Index ranges 1 to 4, for offset calculation is 0 to 3. */
+		IndexLoc--;
+
+	/* Set the ID bits in MATCHx register */
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   ((u32)XEMACPS_MATCH1_OFFSET + ((u32)IndexLoc * (u32)4)), Id_Check);
+
+		Status = (LONG)(XST_SUCCESS);
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * Set options for the driver/device. The driver should be stopped with
+ * XEmacPs_Stop() before changing options.
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ * @param Options are the options to set. Multiple options can be set by OR'ing
+ *        XTE_*_OPTIONS constants together. Options not specified are not
+ *        affected.
+ *
+ * @return
+ * - XST_SUCCESS if the options were set successfully
+ * - XST_DEVICE_IS_STARTED if the device has not yet been stopped
+ *
+ * @note
+ * See xemacps.h for a description of the available options.
+ *
+ *****************************************************************************/
+LONG XEmacPs_SetOptions(XEmacPs *InstancePtr, u32 Options)
+{
+	u32 Reg;		/* Generic register contents */
+	u32 RegNetCfg;		/* Reflects original contents of NET_CONFIG */
+	u32 RegNewNetCfg;	/* Reflects new contents of NET_CONFIG */
+	LONG Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/* Be sure device has been stopped */
+	if (InstancePtr->IsStarted == (u32)XIL_COMPONENT_IS_STARTED) {
+		Status = (LONG)(XST_DEVICE_IS_STARTED);
+	} else {
+
+	/* Many of these options will change the NET_CONFIG registers.
+	 * To reduce the amount of IO to the device, group these options here
+	 * and change them all at once.
+	 */
+
+	/* Grab current register contents */
+	RegNetCfg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				      XEMACPS_NWCFG_OFFSET);
+	RegNewNetCfg = RegNetCfg;
+
+	/*
+	 * It is configured to max 1536.
+	 */
+		if ((Options & XEMACPS_FRAME1536_OPTION) != 0x00000000U) {
+		RegNewNetCfg |= (XEMACPS_NWCFG_1536RXEN_MASK);
+	}
+
+	/* Turn on VLAN packet only, only VLAN tagged will be accepted */
+		if ((Options & XEMACPS_VLAN_OPTION) != 0x00000000U) {
+		RegNewNetCfg |= XEMACPS_NWCFG_NVLANDISC_MASK;
+	}
+
+	/* Turn on FCS stripping on receive packets */
+		if ((Options & XEMACPS_FCS_STRIP_OPTION) != 0x00000000U) {
+		RegNewNetCfg |= XEMACPS_NWCFG_FCSREM_MASK;
+	}
+
+	/* Turn on length/type field checking on receive packets */
+		if ((Options & XEMACPS_LENTYPE_ERR_OPTION) != 0x00000000U) {
+			RegNewNetCfg |= XEMACPS_NWCFG_LENERRDSCRD_MASK;
+	}
+
+	/* Turn on flow control */
+		if ((Options & XEMACPS_FLOW_CONTROL_OPTION) != 0x00000000U) {
+		RegNewNetCfg |= XEMACPS_NWCFG_PAUSEEN_MASK;
+	}
+
+	/* Turn on promiscuous frame filtering (all frames are received) */
+		if ((Options & XEMACPS_PROMISC_OPTION) != 0x00000000U) {
+		RegNewNetCfg |= XEMACPS_NWCFG_COPYALLEN_MASK;
+	}
+
+	/* Allow broadcast address reception */
+		if ((Options & XEMACPS_BROADCAST_OPTION) != 0x00000000U) {
+			RegNewNetCfg &= (u32)(~XEMACPS_NWCFG_BCASTDI_MASK);
+	}
+
+	/* Allow multicast address filtering */
+		if ((Options & XEMACPS_MULTICAST_OPTION) != 0x00000000U) {
+		RegNewNetCfg |= XEMACPS_NWCFG_MCASTHASHEN_MASK;
+	}
+
+	/* enable RX checksum offload */
+		if ((Options & XEMACPS_RX_CHKSUM_ENABLE_OPTION) != 0x00000000U) {
+		RegNewNetCfg |= XEMACPS_NWCFG_RXCHKSUMEN_MASK;
+	}
+
+	/* Enable jumbo frames */
+	if (((Options & XEMACPS_JUMBO_ENABLE_OPTION) != 0x00000000U) &&
+		(InstancePtr->Version > 2)) {
+		RegNewNetCfg |= XEMACPS_NWCFG_JUMBO_MASK;
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_JUMBOMAXLEN_OFFSET, XEMACPS_RX_BUF_SIZE_JUMBO);
+		Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				      XEMACPS_DMACR_OFFSET);
+		Reg &= ~XEMACPS_DMACR_RXBUF_MASK;
+		Reg |= (((((u32)XEMACPS_RX_BUF_SIZE_JUMBO / (u32)XEMACPS_RX_BUF_UNIT) +
+			(((((u32)XEMACPS_RX_BUF_SIZE_JUMBO %
+			(u32)XEMACPS_RX_BUF_UNIT))!=(u32)0) ? 1U : 0U)) <<
+			(u32)(XEMACPS_DMACR_RXBUF_SHIFT)) &
+			(u32)(XEMACPS_DMACR_RXBUF_MASK));
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_DMACR_OFFSET, Reg);
+		InstancePtr->MaxMtuSize = XEMACPS_MTU_JUMBO;
+		InstancePtr->MaxFrameSize = XEMACPS_MTU_JUMBO +
+					XEMACPS_HDR_SIZE + XEMACPS_TRL_SIZE;
+		InstancePtr->MaxVlanFrameSize = InstancePtr->MaxFrameSize +
+					XEMACPS_HDR_VLAN_SIZE;
+		InstancePtr->RxBufMask = XEMACPS_RXBUF_LEN_JUMBO_MASK;
+	}
+
+	if (((Options & XEMACPS_SGMII_ENABLE_OPTION) != 0x00000000U) &&
+		(InstancePtr->Version > 2)) {
+		RegNewNetCfg |= (XEMACPS_NWCFG_SGMIIEN_MASK |
+						XEMACPS_NWCFG_PCSSEL_MASK);
+	}
+
+	/* Officially change the NET_CONFIG registers if it needs to be
+	 * modified.
+	 */
+	if (RegNetCfg != RegNewNetCfg) {
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_NWCFG_OFFSET, RegNewNetCfg);
+	}
+
+	/* Enable TX checksum offload */
+		if ((Options & XEMACPS_TX_CHKSUM_ENABLE_OPTION) != 0x00000000U) {
+		Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_DMACR_OFFSET);
+		Reg |= XEMACPS_DMACR_TCPCKSUM_MASK;
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+					 XEMACPS_DMACR_OFFSET, Reg);
+	}
+
+	/* Enable transmitter */
+		if ((Options & XEMACPS_TRANSMITTER_ENABLE_OPTION) != 0x00000000U) {
+		Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_NWCTRL_OFFSET);
+		Reg |= XEMACPS_NWCTRL_TXEN_MASK;
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_NWCTRL_OFFSET, Reg);
+	}
+
+	/* Enable receiver */
+		if ((Options & XEMACPS_RECEIVER_ENABLE_OPTION) != 0x00000000U) {
+		Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_NWCTRL_OFFSET);
+		Reg |= XEMACPS_NWCTRL_RXEN_MASK;
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_NWCTRL_OFFSET, Reg);
+	}
+
+	/* The remaining options not handled here are managed elsewhere in the
+	 * driver. No register modifications are needed at this time. Reflecting
+	 * the option in InstancePtr->Options is good enough for now.
+	 */
+
+	/* Set options word to its new value */
+	InstancePtr->Options |= Options;
+
+		Status = (LONG)(XST_SUCCESS);
+	}
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+ * Clear options for the driver/device
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ * @param Options are the options to clear. Multiple options can be cleared by
+ *        OR'ing XEMACPS_*_OPTIONS constants together. Options not specified
+ *        are not affected.
+ *
+ * @return
+ * - XST_SUCCESS if the options were set successfully
+ * - XST_DEVICE_IS_STARTED if the device has not yet been stopped
+ *
+ * @note
+ * See xemacps.h for a description of the available options.
+ *
+ *****************************************************************************/
+LONG XEmacPs_ClearOptions(XEmacPs *InstancePtr, u32 Options)
+{
+	u32 Reg;		/* Generic */
+	u32 RegNetCfg;		/* Reflects original contents of NET_CONFIG */
+	u32 RegNewNetCfg;	/* Reflects new contents of NET_CONFIG */
+	LONG Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/* Be sure device has been stopped */
+	if (InstancePtr->IsStarted == (u32)XIL_COMPONENT_IS_STARTED) {
+		Status = (LONG)(XST_DEVICE_IS_STARTED);
+	} else {
+
+	/* Many of these options will change the NET_CONFIG registers.
+	 * To reduce the amount of IO to the device, group these options here
+	 * and change them all at once.
+	 */
+
+	/* Grab current register contents */
+	RegNetCfg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				      XEMACPS_NWCFG_OFFSET);
+	RegNewNetCfg = RegNetCfg;
+
+	/* There is only RX configuration!?
+	 * It is configured in two different length, upto 1536 and 10240 bytes
+	 */
+		if ((Options & XEMACPS_FRAME1536_OPTION) != 0x00000000U) {
+			RegNewNetCfg &= (u32)(~XEMACPS_NWCFG_1536RXEN_MASK);
+	}
+
+	/* Turn off VLAN packet only */
+		if ((Options & XEMACPS_VLAN_OPTION) != 0x00000000U) {
+			RegNewNetCfg &= (u32)(~XEMACPS_NWCFG_NVLANDISC_MASK);
+	}
+
+	/* Turn off FCS stripping on receive packets */
+		if ((Options & XEMACPS_FCS_STRIP_OPTION) != 0x00000000U) {
+			RegNewNetCfg &= (u32)(~XEMACPS_NWCFG_FCSREM_MASK);
+	}
+
+	/* Turn off length/type field checking on receive packets */
+		if ((Options & XEMACPS_LENTYPE_ERR_OPTION) != 0x00000000U) {
+			RegNewNetCfg &= (u32)(~XEMACPS_NWCFG_LENERRDSCRD_MASK);
+	}
+
+	/* Turn off flow control */
+		if ((Options & XEMACPS_FLOW_CONTROL_OPTION) != 0x00000000U) {
+			RegNewNetCfg &= (u32)(~XEMACPS_NWCFG_PAUSEEN_MASK);
+	}
+
+	/* Turn off promiscuous frame filtering (all frames are received) */
+		if ((Options & XEMACPS_PROMISC_OPTION) != 0x00000000U) {
+			RegNewNetCfg &= (u32)(~XEMACPS_NWCFG_COPYALLEN_MASK);
+	}
+
+	/* Disallow broadcast address filtering => broadcast reception */
+		if ((Options & XEMACPS_BROADCAST_OPTION) != 0x00000000U) {
+		RegNewNetCfg |= XEMACPS_NWCFG_BCASTDI_MASK;
+	}
+
+	/* Disallow multicast address filtering */
+		if ((Options & XEMACPS_MULTICAST_OPTION) != 0x00000000U) {
+			RegNewNetCfg &= (u32)(~XEMACPS_NWCFG_MCASTHASHEN_MASK);
+	}
+
+	/* Disable RX checksum offload */
+		if ((Options & XEMACPS_RX_CHKSUM_ENABLE_OPTION) != 0x00000000U) {
+			RegNewNetCfg &= (u32)(~XEMACPS_NWCFG_RXCHKSUMEN_MASK);
+	}
+
+	/* Disable jumbo frames */
+	if (((Options & XEMACPS_JUMBO_ENABLE_OPTION) != 0x00000000U) &&
+		(InstancePtr->Version > 2)) {
+		RegNewNetCfg &= (u32)(~XEMACPS_NWCFG_JUMBO_MASK);
+		Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				      XEMACPS_DMACR_OFFSET);
+		Reg &= ~XEMACPS_DMACR_RXBUF_MASK;
+		Reg |= (((((u32)XEMACPS_RX_BUF_SIZE / (u32)XEMACPS_RX_BUF_UNIT) +
+			(((((u32)XEMACPS_RX_BUF_SIZE %
+			(u32)XEMACPS_RX_BUF_UNIT))!=(u32)0) ? 1U : 0U)) <<
+			(u32)(XEMACPS_DMACR_RXBUF_SHIFT)) &
+			(u32)(XEMACPS_DMACR_RXBUF_MASK));
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_DMACR_OFFSET, Reg);
+		InstancePtr->MaxMtuSize = XEMACPS_MTU;
+		InstancePtr->MaxFrameSize = XEMACPS_MTU +
+					XEMACPS_HDR_SIZE + XEMACPS_TRL_SIZE;
+		InstancePtr->MaxVlanFrameSize = InstancePtr->MaxFrameSize +
+					XEMACPS_HDR_VLAN_SIZE;
+		InstancePtr->RxBufMask = XEMACPS_RXBUF_LEN_MASK;
+	}
+
+	if (((Options & XEMACPS_SGMII_ENABLE_OPTION) != 0x00000000U) &&
+		(InstancePtr->Version > 2)) {
+		RegNewNetCfg &= (u32)(~(XEMACPS_NWCFG_SGMIIEN_MASK |
+						XEMACPS_NWCFG_PCSSEL_MASK));
+	}
+
+	/* Officially change the NET_CONFIG registers if it needs to be
+	 * modified.
+	 */
+	if (RegNetCfg != RegNewNetCfg) {
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_NWCFG_OFFSET, RegNewNetCfg);
+	}
+
+	/* Disable TX checksum offload */
+		if ((Options & XEMACPS_TX_CHKSUM_ENABLE_OPTION) != 0x00000000U) {
+		Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_DMACR_OFFSET);
+			Reg &= (u32)(~XEMACPS_DMACR_TCPCKSUM_MASK);
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+					 XEMACPS_DMACR_OFFSET, Reg);
+	}
+
+	/* Disable transmitter */
+		if ((Options & XEMACPS_TRANSMITTER_ENABLE_OPTION) != 0x00000000U) {
+		Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_NWCTRL_OFFSET);
+			Reg &= (u32)(~XEMACPS_NWCTRL_TXEN_MASK);
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_NWCTRL_OFFSET, Reg);
+	}
+
+	/* Disable receiver */
+		if ((Options & XEMACPS_RECEIVER_ENABLE_OPTION) != 0x00000000U) {
+		Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_NWCTRL_OFFSET);
+			Reg &= (u32)(~XEMACPS_NWCTRL_RXEN_MASK);
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_NWCTRL_OFFSET, Reg);
+	}
+
+	/* The remaining options not handled here are managed elsewhere in the
+	 * driver. No register modifications are needed at this time. Reflecting
+	 * option in InstancePtr->Options is good enough for now.
+	 */
+
+	/* Set options word to its new value */
+	InstancePtr->Options &= ~Options;
+
+		Status = (LONG)(XST_SUCCESS);
+	}
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+ * Get current option settings
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ *
+ * @return
+ * A bitmask of XTE_*_OPTION constants. Any bit set to 1 is to be interpreted
+ * as a set opion.
+ *
+ * @note
+ * See xemacps.h for a description of the available options.
+ *
+ *****************************************************************************/
+u32 XEmacPs_GetOptions(XEmacPs *InstancePtr)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	return (InstancePtr->Options);
+}
+
+
+/*****************************************************************************/
+/**
+ * Send a pause packet
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ *
+ * @return
+ * - XST_SUCCESS if pause frame transmission was initiated
+ * - XST_DEVICE_IS_STOPPED if the device has not been started.
+ *
+ *****************************************************************************/
+LONG XEmacPs_SendPausePacket(XEmacPs *InstancePtr)
+{
+	u32 Reg;
+	LONG Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/* Make sure device is ready for this operation */
+	if (InstancePtr->IsStarted != (u32)XIL_COMPONENT_IS_STARTED) {
+		Status = (LONG)(XST_DEVICE_IS_STOPPED);
+	} else {
+	/* Send flow control frame */
+	Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_NWCTRL_OFFSET);
+	Reg |= XEMACPS_NWCTRL_PAUSETX_MASK;
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XEMACPS_NWCTRL_OFFSET, Reg);
+		Status = (LONG)(XST_SUCCESS);
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * XEmacPs_GetOperatingSpeed gets the current operating link speed. This may
+ * be the value set by XEmacPs_SetOperatingSpeed() or a hardware default.
+ *
+ * @param InstancePtr references the TEMAC channel on which to operate.
+ *
+ * @return XEmacPs_GetOperatingSpeed returns the link speed in units of
+ *         megabits per second.
+ *
+ * @note
+ *
+ *****************************************************************************/
+u16 XEmacPs_GetOperatingSpeed(XEmacPs *InstancePtr)
+{
+	u32 Reg;
+	u16 Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_NWCFG_OFFSET);
+
+	if ((Reg & XEMACPS_NWCFG_1000_MASK) != 0x00000000U) {
+		Status = (u16)(1000);
+	} else {
+		if ((Reg & XEMACPS_NWCFG_100_MASK) != 0x00000000U) {
+			Status = (u16)(100);
+		} else {
+			Status = (u16)(10);
+		}
+	}
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+ * XEmacPs_SetOperatingSpeed sets the current operating link speed. For any
+ * traffic to be passed, this speed must match the current MII/GMII/SGMII/RGMII
+ * link speed.
+ *
+ * @param InstancePtr references the TEMAC channel on which to operate.
+ * @param Speed is the speed to set in units of Mbps. Valid values are 10, 100,
+ *        or 1000. XEmacPs_SetOperatingSpeed ignores invalid values.
+ *
+ * @note
+ *
+ *****************************************************************************/
+void XEmacPs_SetOperatingSpeed(XEmacPs *InstancePtr, u16 Speed)
+{
+        u32 Reg;
+	u16 Status;
+        Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+    Xil_AssertVoid((Speed == (u16)10) || (Speed == (u16)100) || (Speed == (u16)1000));
+
+        Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XEMACPS_NWCFG_OFFSET);
+	Reg &= (u32)(~(XEMACPS_NWCFG_1000_MASK | XEMACPS_NWCFG_100_MASK));
+
+	switch (Speed) {
+		case (u16)10:
+				Status = 0U;
+                break;
+
+        case (u16)100:
+			Status = 0U;
+                Reg |= XEMACPS_NWCFG_100_MASK;
+                break;
+
+        case (u16)1000:
+			Status = 0U;
+                Reg |= XEMACPS_NWCFG_1000_MASK;
+                break;
+
+        default:
+			Status = 1U;
+                break;
+    }
+	if(Status == (u16)1){
+                return;
+        }
+
+        /* Set register and return */
+        XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+                XEMACPS_NWCFG_OFFSET, Reg);
+}
+
+
+/*****************************************************************************/
+/**
+ * Set the MDIO clock divisor.
+ *
+ * Calculating the divisor:
+ *
+ * 
+ *              f[HOSTCLK]
+ *   f[MDC] = -----------------
+ *            (1 + Divisor) * 2
+ * 

+ *
+ * where f[HOSTCLK] is the bus clock frequency in MHz, and f[MDC] is the
+ * MDIO clock frequency in MHz to the PHY. Typically, f[MDC] should not
+ * exceed 2.5 MHz. Some PHYs can tolerate faster speeds which means faster
+ * access. Here is the table to show values to generate MDC,
+ *
+ * 
+ * 000 : divide pclk by   8 (pclk up to  20 MHz)
+ * 001 : divide pclk by  16 (pclk up to  40 MHz)
+ * 010 : divide pclk by  32 (pclk up to  80 MHz)
+ * 011 : divide pclk by  48 (pclk up to 120 MHz)
+ * 100 : divide pclk by  64 (pclk up to 160 MHz)
+ * 101 : divide pclk by  96 (pclk up to 240 MHz)
+ * 110 : divide pclk by 128 (pclk up to 320 MHz)
+ * 111 : divide pclk by 224 (pclk up to 540 MHz)
+ * 

+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ * @param Divisor is the divisor to set. Range is 0b000 to 0b111.
+ *
+ *****************************************************************************/
+void XEmacPs_SetMdioDivisor(XEmacPs *InstancePtr, XEmacPs_MdcDiv Divisor)
+{
+	u32 Reg;
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Divisor <= (XEmacPs_MdcDiv)0x7); /* only last three bits are valid */
+
+	Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_NWCFG_OFFSET);
+	/* clear these three bits, could be done with mask */
+	Reg &= (u32)(~XEMACPS_NWCFG_MDCCLKDIV_MASK);
+
+	Reg |= ((u32)Divisor << XEMACPS_NWCFG_MDC_SHIFT_MASK);
+
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XEMACPS_NWCFG_OFFSET, Reg);
+}
+
+
+/*****************************************************************************/
+/**
+* Read the current value of the PHY register indicated by the PhyAddress and
+* the RegisterNum parameters. The MAC provides the driver with the ability to
+* talk to a PHY that adheres to the Media Independent Interface (MII) as
+* defined in the IEEE 802.3 standard.
+*
+* Prior to PHY access with this function, the user should have setup the MDIO
+* clock with XEmacPs_SetMdioDivisor().
+*
+* @param InstancePtr is a pointer to the XEmacPs instance to be worked on.
+* @param PhyAddress is the address of the PHY to be read (supports multiple
+*        PHYs)
+* @param RegisterNum is the register number, 0-31, of the specific PHY register
+*        to read
+* @param PhyDataPtr is an output parameter, and points to a 16-bit buffer into
+*        which the current value of the register will be copied.
+*
+* @return
+*
+* - XST_SUCCESS if the PHY was read from successfully
+* - XST_EMAC_MII_BUSY if there is another PHY operation in progress
+*
+* @note
+*
+* This function is not thread-safe. The user must provide mutually exclusive
+* access to this function if there are to be multiple threads that can call it.
+*
+* There is the possibility that this function will not return if the hardware
+* is broken (i.e., it never sets the status bit indicating that the read is
+* done). If this is of concern to the user, the user should provide a mechanism
+* suitable to their needs for recovery.
+*
+* For the duration of this function, all host interface reads and writes are
+* blocked to the current XEmacPs instance.
+*
+******************************************************************************/
+LONG XEmacPs_PhyRead(XEmacPs *InstancePtr, u32 PhyAddress,
+		     u32 RegisterNum, u16 *PhyDataPtr)
+{
+	u32 Mgtcr;
+	volatile u32 Ipisr;
+	u32 IpReadTemp;
+	LONG Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	/* Make sure no other PHY operation is currently in progress */
+	if ((!(XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_NWSR_OFFSET) &
+	      XEMACPS_NWSR_MDIOIDLE_MASK))==TRUE) {
+		Status = (LONG)(XST_EMAC_MII_BUSY);
+	} else {
+
+	/* Construct Mgtcr mask for the operation */
+	Mgtcr = XEMACPS_PHYMNTNC_OP_MASK | XEMACPS_PHYMNTNC_OP_R_MASK |
+			(PhyAddress << XEMACPS_PHYMNTNC_PHAD_SHFT_MSK) |
+			(RegisterNum << XEMACPS_PHYMNTNC_PREG_SHFT_MSK);
+
+	/* Write Mgtcr and wait for completion */
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XEMACPS_PHYMNTNC_OFFSET, Mgtcr);
+
+	do {
+		Ipisr = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					  XEMACPS_NWSR_OFFSET);
+			IpReadTemp = Ipisr;
+		} while ((IpReadTemp & XEMACPS_NWSR_MDIOIDLE_MASK) == 0x00000000U);
+
+	/* Read data */
+		*PhyDataPtr = (u16)XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_PHYMNTNC_OFFSET);
+		Status = (LONG)(XST_SUCCESS);
+	}
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+* Write data to the specified PHY register. The Ethernet driver does not
+* require the device to be stopped before writing to the PHY.  Although it is
+* probably a good idea to stop the device, it is the responsibility of the
+* application to deem this necessary. The MAC provides the driver with the
+* ability to talk to a PHY that adheres to the Media Independent Interface
+* (MII) as defined in the IEEE 802.3 standard.
+*
+* Prior to PHY access with this function, the user should have setup the MDIO
+* clock with XEmacPs_SetMdioDivisor().
+*
+* @param InstancePtr is a pointer to the XEmacPs instance to be worked on.
+* @param PhyAddress is the address of the PHY to be written (supports multiple
+*        PHYs)
+* @param RegisterNum is the register number, 0-31, of the specific PHY register
+*        to write
+* @param PhyData is the 16-bit value that will be written to the register
+*
+* @return
+*
+* - XST_SUCCESS if the PHY was written to successfully. Since there is no error
+*   status from the MAC on a write, the user should read the PHY to verify the
+*   write was successful.
+* - XST_EMAC_MII_BUSY if there is another PHY operation in progress
+*
+* @note
+*
+* This function is not thread-safe. The user must provide mutually exclusive
+* access to this function if there are to be multiple threads that can call it.
+*
+* There is the possibility that this function will not return if the hardware
+* is broken (i.e., it never sets the status bit indicating that the write is
+* done). If this is of concern to the user, the user should provide a mechanism
+* suitable to their needs for recovery.
+*
+* For the duration of this function, all host interface reads and writes are
+* blocked to the current XEmacPs instance.
+*
+******************************************************************************/
+LONG XEmacPs_PhyWrite(XEmacPs *InstancePtr, u32 PhyAddress,
+		      u32 RegisterNum, u16 PhyData)
+{
+	u32 Mgtcr;
+	volatile u32 Ipisr;
+	u32 IpWriteTemp;
+	LONG Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	/* Make sure no other PHY operation is currently in progress */
+	if ((!(XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XEMACPS_NWSR_OFFSET) &
+	      XEMACPS_NWSR_MDIOIDLE_MASK))==TRUE) {
+		Status = (LONG)(XST_EMAC_MII_BUSY);
+	} else {
+	/* Construct Mgtcr mask for the operation */
+	Mgtcr = XEMACPS_PHYMNTNC_OP_MASK | XEMACPS_PHYMNTNC_OP_W_MASK |
+			(PhyAddress << XEMACPS_PHYMNTNC_PHAD_SHFT_MSK) |
+			(RegisterNum << XEMACPS_PHYMNTNC_PREG_SHFT_MSK) | (u32)PhyData;
+
+	/* Write Mgtcr and wait for completion */
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XEMACPS_PHYMNTNC_OFFSET, Mgtcr);
+
+	do {
+		Ipisr = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					  XEMACPS_NWSR_OFFSET);
+				IpWriteTemp = Ipisr;
+		} while ((IpWriteTemp & XEMACPS_NWSR_MDIOIDLE_MASK) == 0x00000000U);
+
+		Status = (LONG)(XST_SUCCESS);
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+* API to update the Burst length in the DMACR register.
+*
+* @param InstancePtr is a pointer to the XEmacPs instance to be worked on.
+* @param BLength is the length in bytes for the dma burst.
+*
+* @return None
+*
+******************************************************************************/
+void XEmacPs_DMABLengthUpdate(XEmacPs *InstancePtr, s32 BLength)
+{
+	u32 Reg;
+	u32 RegUpdateVal;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((BLength == XEMACPS_SINGLE_BURST) ||
+					(BLength == XEMACPS_4BYTE_BURST) ||
+					(BLength == XEMACPS_8BYTE_BURST) ||
+					(BLength == XEMACPS_16BYTE_BURST));
+
+	switch (BLength) {
+		case XEMACPS_SINGLE_BURST:
+			RegUpdateVal = XEMACPS_DMACR_SINGLE_AHB_BURST;
+			break;
+
+		case XEMACPS_4BYTE_BURST:
+			RegUpdateVal = XEMACPS_DMACR_INCR4_AHB_BURST;
+			break;
+
+		case XEMACPS_8BYTE_BURST:
+			RegUpdateVal = XEMACPS_DMACR_INCR8_AHB_BURST;
+			break;
+
+		case XEMACPS_16BYTE_BURST:
+			RegUpdateVal = XEMACPS_DMACR_INCR16_AHB_BURST;
+			break;
+
+		default:
+			RegUpdateVal = 0x00000000U;
+			break;
+	}
+	Reg = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+						XEMACPS_DMACR_OFFSET);
+
+	Reg &= (u32)(~XEMACPS_DMACR_BLENGTH_MASK);
+	Reg |= RegUpdateVal;
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress, XEMACPS_DMACR_OFFSET,
+																	Reg);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_g.c b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_g.c
new file mode 100644
index 0000000..c61eb89
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_g.c
@@ -0,0 +1,56 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xemacps.h"
+
+/*
+* The configuration table for devices
+*/
+
+XEmacPs_Config XEmacPs_ConfigTable[XPAR_XEMACPS_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_ETHERNET_3_DEVICE_ID,
+		XPAR_PSU_ETHERNET_3_BASEADDR,
+		XPAR_PSU_ETHERNET_3_IS_CACHE_COHERENT
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_hw.c b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_hw.c
new file mode 100644
index 0000000..00e79a5
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_hw.c
@@ -0,0 +1,123 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xemacps_hw.c
+* @addtogroup emacps_v3_7
+* @{
+*
+* This file contains the implementation of the ethernet interface reset sequence
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.05a kpc  28/06/13 First release
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xemacps_hw.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+* This function perform the reset sequence to the given emacps interface by
+* configuring the appropriate control bits in the emacps specifc registers.
+* the emacps reset squence involves the following steps
+*	Disable all the interuupts
+*	Clear the status registers
+*	Disable Rx and Tx engines
+*	Update the Tx and Rx descriptor queue registers with reset values
+*	Update the other relevant control registers with reset value
+*
+* @param   BaseAddress of the interface
+*
+* @return N/A
+*
+* @note
+* This function will not modify the slcr registers that are relavant for
+* emacps controller
+******************************************************************************/
+void XEmacPs_ResetHw(u32 BaseAddr)
+{
+	u32 RegVal;
+
+	/* Disable the interrupts  */
+	XEmacPs_WriteReg(BaseAddr,XEMACPS_IDR_OFFSET,0x0U);
+
+	/* Stop transmission,disable loopback and Stop tx and Rx engines */
+	RegVal = XEmacPs_ReadReg(BaseAddr,XEMACPS_NWCTRL_OFFSET);
+	RegVal &= ~((u32)XEMACPS_NWCTRL_TXEN_MASK|
+				(u32)XEMACPS_NWCTRL_RXEN_MASK|
+				(u32)XEMACPS_NWCTRL_HALTTX_MASK|
+				(u32)XEMACPS_NWCTRL_LOOPEN_MASK);
+	/* Clear the statistic registers, flush the packets in DPRAM*/
+	RegVal |= (XEMACPS_NWCTRL_STATCLR_MASK|
+				XEMACPS_NWCTRL_FLUSH_DPRAM_MASK);
+	XEmacPs_WriteReg(BaseAddr,XEMACPS_NWCTRL_OFFSET,RegVal);
+	/* Clear the interrupt status */
+	XEmacPs_WriteReg(BaseAddr,XEMACPS_ISR_OFFSET,XEMACPS_IXR_ALL_MASK);
+	/* Clear the tx status */
+	XEmacPs_WriteReg(BaseAddr,XEMACPS_TXSR_OFFSET,(XEMACPS_TXSR_ERROR_MASK|
+									(u32)XEMACPS_TXSR_TXCOMPL_MASK|
+									(u32)XEMACPS_TXSR_TXGO_MASK));
+	/* Clear the rx status */
+	XEmacPs_WriteReg(BaseAddr,XEMACPS_RXSR_OFFSET,
+								XEMACPS_RXSR_FRAMERX_MASK);
+	/* Clear the tx base address */
+	XEmacPs_WriteReg(BaseAddr,XEMACPS_TXQBASE_OFFSET,0x0U);
+	/* Clear the rx base address */
+	XEmacPs_WriteReg(BaseAddr,XEMACPS_RXQBASE_OFFSET,0x0U);
+	/* Update the network config register with reset value */
+	XEmacPs_WriteReg(BaseAddr,XEMACPS_NWCFG_OFFSET,XEMACPS_NWCFG_RESET_MASK);
+	/* Update the hash address registers with reset value */
+	XEmacPs_WriteReg(BaseAddr,XEMACPS_HASHL_OFFSET,0x0U);
+	XEmacPs_WriteReg(BaseAddr,XEMACPS_HASHH_OFFSET,0x0U);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_hw.h b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_hw.h
new file mode 100644
index 0000000..21d5290
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_hw.h
@@ -0,0 +1,661 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xemacps_hw.h
+* @addtogroup emacps_v3_7
+* @{
+*
+* This header file contains identifiers and low-level driver functions (or
+* macros) that can be used to access the PS Ethernet MAC (XEmacPs) device.
+* High-level driver functions are defined in xemacps.h.
+*
+* @note
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a wsy  01/10/10 First release.
+* 1.02a asa  11/05/12 Added hash defines for DMACR burst length configuration.
+* 1.05a kpc  28/06/13 Added XEmacPs_ResetHw function prototype
+* 1.06a asa  11/02/13 Changed the value for XEMACPS_RXBUF_LEN_MASK from 0x3fff
+*					  to 0x1fff. This fixes the CR#744902.
+* 2.1   srt  07/15/14 Add support for Zynq Ultrascale Mp GEM specification.
+* 3.0   kvn  12/16/14 Changed name of XEMACPS_NWCFG_LENGTHERRDSCRD_MASK to
+*					  XEMACPS_NWCFG_LENERRDSCRD_MASK as it exceeds 31 characters.
+* 3.0  kpc   1/23/15  Corrected the extended descriptor macro values.
+* 3.0  kvn   02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.0  hk   03/18/15 Added support for jumbo frames.
+*                    Remove "used bit set" from TX error interrupt masks.
+* 3.1  hk   08/10/15 Update upper 32 bit tx and rx queue ptr register offsets.
+* 3.2   hk   02/22/16 Added SGMII support for Zynq Ultrascale+ MPSoC.
+* 

+*
+******************************************************************************/
+
+#ifndef XEMACPS_HW_H		/* prevent circular inclusions */
+#define XEMACPS_HW_H		/* by using protection macros */
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+
+#define XEMACPS_MAX_MAC_ADDR     4U   /**< Maxmum number of mac address
+                                           supported */
+#define XEMACPS_MAX_TYPE_ID      4U   /**< Maxmum number of type id supported */
+
+#ifdef __aarch64__
+#define XEMACPS_BD_ALIGNMENT     64U   /**< Minimum buffer descriptor alignment
+                                           on the local bus */
+#else
+
+#define XEMACPS_BD_ALIGNMENT     4U   /**< Minimum buffer descriptor alignment
+                                           on the local bus */
+#endif
+#define XEMACPS_RX_BUF_ALIGNMENT 4U   /**< Minimum buffer alignment when using
+                                           options that impose alignment
+                                           restrictions on the buffer data on
+                                           the local bus */
+
+/** @name Direction identifiers
+ *
+ *  These are used by several functions and callbacks that need
+ *  to specify whether an operation specifies a send or receive channel.
+ * @{
+ */
+#define XEMACPS_SEND        1U	      /**< send direction */
+#define XEMACPS_RECV        2U	      /**< receive direction */
+/*@}*/
+
+/**  @name MDC clock division
+ *  currently supporting 8, 16, 32, 48, 64, 96, 128, 224.
+ * @{
+ */
+typedef enum { MDC_DIV_8 = 0U, MDC_DIV_16, MDC_DIV_32, MDC_DIV_48,
+	MDC_DIV_64, MDC_DIV_96, MDC_DIV_128, MDC_DIV_224
+} XEmacPs_MdcDiv;
+
+/*@}*/
+
+#define XEMACPS_RX_BUF_SIZE 1536U /**< Specify the receive buffer size in
+                                       bytes, 64, 128, ... 10240 */
+#define XEMACPS_RX_BUF_SIZE_JUMBO 10240U
+
+#define XEMACPS_RX_BUF_UNIT   64U /**< Number of receive buffer bytes as a
+                                       unit, this is HW setup */
+
+#define XEMACPS_MAX_RXBD     128U /**< Size of RX buffer descriptor queues */
+#define XEMACPS_MAX_TXBD     128U /**< Size of TX buffer descriptor queues */
+
+#define XEMACPS_MAX_HASH_BITS 64U /**< Maximum value for hash bits. 2**6 */
+
+/* Register offset definitions. Unless otherwise noted, register access is
+ * 32 bit. Names are self explained here.
+ */
+
+#define XEMACPS_NWCTRL_OFFSET        0x00000000U /**< Network Control reg */
+#define XEMACPS_NWCFG_OFFSET         0x00000004U /**< Network Config reg */
+#define XEMACPS_NWSR_OFFSET          0x00000008U /**< Network Status reg */
+
+#define XEMACPS_DMACR_OFFSET         0x00000010U /**< DMA Control reg */
+#define XEMACPS_TXSR_OFFSET          0x00000014U /**< TX Status reg */
+#define XEMACPS_RXQBASE_OFFSET       0x00000018U /**< RX Q Base address reg */
+#define XEMACPS_TXQBASE_OFFSET       0x0000001CU /**< TX Q Base address reg */
+#define XEMACPS_RXSR_OFFSET          0x00000020U /**< RX Status reg */
+
+#define XEMACPS_ISR_OFFSET           0x00000024U /**< Interrupt Status reg */
+#define XEMACPS_IER_OFFSET           0x00000028U /**< Interrupt Enable reg */
+#define XEMACPS_IDR_OFFSET           0x0000002CU /**< Interrupt Disable reg */
+#define XEMACPS_IMR_OFFSET           0x00000030U /**< Interrupt Mask reg */
+
+#define XEMACPS_PHYMNTNC_OFFSET      0x00000034U /**< Phy Maintaince reg */
+#define XEMACPS_RXPAUSE_OFFSET       0x00000038U /**< RX Pause Time reg */
+#define XEMACPS_TXPAUSE_OFFSET       0x0000003CU /**< TX Pause Time reg */
+
+#define XEMACPS_JUMBOMAXLEN_OFFSET   0x00000048U /**< Jumbo max length reg */
+
+#define XEMACPS_HASHL_OFFSET         0x00000080U /**< Hash Low address reg */
+#define XEMACPS_HASHH_OFFSET         0x00000084U /**< Hash High address reg */
+
+#define XEMACPS_LADDR1L_OFFSET       0x00000088U /**< Specific1 addr low reg */
+#define XEMACPS_LADDR1H_OFFSET       0x0000008CU /**< Specific1 addr high reg */
+#define XEMACPS_LADDR2L_OFFSET       0x00000090U /**< Specific2 addr low reg */
+#define XEMACPS_LADDR2H_OFFSET       0x00000094U /**< Specific2 addr high reg */
+#define XEMACPS_LADDR3L_OFFSET       0x00000098U /**< Specific3 addr low reg */
+#define XEMACPS_LADDR3H_OFFSET       0x0000009CU /**< Specific3 addr high reg */
+#define XEMACPS_LADDR4L_OFFSET       0x000000A0U /**< Specific4 addr low reg */
+#define XEMACPS_LADDR4H_OFFSET       0x000000A4U /**< Specific4 addr high reg */
+
+#define XEMACPS_MATCH1_OFFSET        0x000000A8U /**< Type ID1 Match reg */
+#define XEMACPS_MATCH2_OFFSET        0x000000ACU /**< Type ID2 Match reg */
+#define XEMACPS_MATCH3_OFFSET        0x000000B0U /**< Type ID3 Match reg */
+#define XEMACPS_MATCH4_OFFSET        0x000000B4U /**< Type ID4 Match reg */
+
+#define XEMACPS_STRETCH_OFFSET       0x000000BCU /**< IPG Stretch reg */
+
+#define XEMACPS_TSU_NSEC_CMP_OFFSET  0x000000DCU /**< Nanosecond compare register */
+#define XEMACPS_TSU_SEC_CMP_OFFSET  0x000000E0U /**< Nanosecond compare register */
+
+#define XEMACPS_OCTTXL_OFFSET        0x00000100U /**< Octects transmitted Low
+                                                      reg */
+#define XEMACPS_OCTTXH_OFFSET        0x00000104U /**< Octects transmitted High
+                                                      reg */
+
+#define XEMACPS_TXCNT_OFFSET         0x00000108U /**< Error-free Frmaes
+                                                      transmitted counter */
+#define XEMACPS_TXBCCNT_OFFSET       0x0000010CU /**< Error-free Broadcast
+                                                      Frames counter*/
+#define XEMACPS_TXMCCNT_OFFSET       0x00000110U /**< Error-free Multicast
+                                                      Frame counter */
+#define XEMACPS_TXPAUSECNT_OFFSET    0x00000114U /**< Pause Frames Transmitted
+                                                      Counter */
+#define XEMACPS_TX64CNT_OFFSET       0x00000118U /**< Error-free 64 byte Frames
+                                                      Transmitted counter */
+#define XEMACPS_TX65CNT_OFFSET       0x0000011CU /**< Error-free 65-127 byte
+                                                      Frames Transmitted
+                                                      counter */
+#define XEMACPS_TX128CNT_OFFSET      0x00000120U /**< Error-free 128-255 byte
+                                                      Frames Transmitted
+                                                      counter*/
+#define XEMACPS_TX256CNT_OFFSET      0x00000124U /**< Error-free 256-511 byte
+                                                      Frames transmitted
+                                                      counter */
+#define XEMACPS_TX512CNT_OFFSET      0x00000128U /**< Error-free 512-1023 byte
+                                                      Frames transmitted
+                                                      counter */
+#define XEMACPS_TX1024CNT_OFFSET     0x0000012CU /**< Error-free 1024-1518 byte
+                                                      Frames transmitted
+                                                      counter */
+#define XEMACPS_TX1519CNT_OFFSET     0x00000130U /**< Error-free larger than
+                                                      1519 byte Frames
+                                                      transmitted counter */
+#define XEMACPS_TXURUNCNT_OFFSET     0x00000134U /**< TX under run error
+                                                      counter */
+
+#define XEMACPS_SNGLCOLLCNT_OFFSET   0x00000138U /**< Single Collision Frame
+                                                      Counter */
+#define XEMACPS_MULTICOLLCNT_OFFSET  0x0000013CU /**< Multiple Collision Frame
+                                                      Counter */
+#define XEMACPS_EXCESSCOLLCNT_OFFSET 0x00000140U /**< Excessive Collision Frame
+                                                      Counter */
+#define XEMACPS_LATECOLLCNT_OFFSET   0x00000144U /**< Late Collision Frame
+                                                      Counter */
+#define XEMACPS_TXDEFERCNT_OFFSET    0x00000148U /**< Deferred Transmission
+                                                      Frame Counter */
+#define XEMACPS_TXCSENSECNT_OFFSET   0x0000014CU /**< Transmit Carrier Sense
+                                                      Error Counter */
+
+#define XEMACPS_OCTRXL_OFFSET        0x00000150U /**< Octects Received register
+                                                      Low */
+#define XEMACPS_OCTRXH_OFFSET        0x00000154U /**< Octects Received register
+                                                      High */
+
+#define XEMACPS_RXCNT_OFFSET         0x00000158U /**< Error-free Frames
+                                                      Received Counter */
+#define XEMACPS_RXBROADCNT_OFFSET    0x0000015CU /**< Error-free Broadcast
+                                                      Frames Received Counter */
+#define XEMACPS_RXMULTICNT_OFFSET    0x00000160U /**< Error-free Multicast
+                                                      Frames Received Counter */
+#define XEMACPS_RXPAUSECNT_OFFSET    0x00000164U /**< Pause Frames
+                                                      Received Counter */
+#define XEMACPS_RX64CNT_OFFSET       0x00000168U /**< Error-free 64 byte Frames
+                                                      Received Counter */
+#define XEMACPS_RX65CNT_OFFSET       0x0000016CU /**< Error-free 65-127 byte
+                                                      Frames Received Counter */
+#define XEMACPS_RX128CNT_OFFSET      0x00000170U /**< Error-free 128-255 byte
+                                                      Frames Received Counter */
+#define XEMACPS_RX256CNT_OFFSET      0x00000174U /**< Error-free 256-512 byte
+                                                      Frames Received Counter */
+#define XEMACPS_RX512CNT_OFFSET      0x00000178U /**< Error-free 512-1023 byte
+                                                      Frames Received Counter */
+#define XEMACPS_RX1024CNT_OFFSET     0x0000017CU /**< Error-free 1024-1518 byte
+                                                      Frames Received Counter */
+#define XEMACPS_RX1519CNT_OFFSET     0x00000180U /**< Error-free 1519-max byte
+                                                      Frames Received Counter */
+#define XEMACPS_RXUNDRCNT_OFFSET     0x00000184U /**< Undersize Frames Received
+                                                      Counter */
+#define XEMACPS_RXOVRCNT_OFFSET      0x00000188U /**< Oversize Frames Received
+                                                      Counter */
+#define XEMACPS_RXJABCNT_OFFSET      0x0000018CU /**< Jabbers Received
+                                                      Counter */
+#define XEMACPS_RXFCSCNT_OFFSET      0x00000190U /**< Frame Check Sequence
+                                                      Error Counter */
+#define XEMACPS_RXLENGTHCNT_OFFSET   0x00000194U /**< Length Field Error
+                                                      Counter */
+#define XEMACPS_RXSYMBCNT_OFFSET     0x00000198U /**< Symbol Error Counter */
+#define XEMACPS_RXALIGNCNT_OFFSET    0x0000019CU /**< Alignment Error Counter */
+#define XEMACPS_RXRESERRCNT_OFFSET   0x000001A0U /**< Receive Resource Error
+                                                      Counter */
+#define XEMACPS_RXORCNT_OFFSET       0x000001A4U /**< Receive Overrun Counter */
+#define XEMACPS_RXIPCCNT_OFFSET      0x000001A8U /**< IP header Checksum Error
+                                                      Counter */
+#define XEMACPS_RXTCPCCNT_OFFSET     0x000001ACU /**< TCP Checksum Error
+                                                      Counter */
+#define XEMACPS_RXUDPCCNT_OFFSET     0x000001B0U /**< UDP Checksum Error
+                                                      Counter */
+#define XEMACPS_LAST_OFFSET          0x000001B4U /**< Last statistic counter
+						      offset, for clearing */
+
+#define XEMACPS_1588_SEC_OFFSET      0x000001D0U /**< 1588 second counter */
+#define XEMACPS_1588_NANOSEC_OFFSET  0x000001D4U /**< 1588 nanosecond counter */
+#define XEMACPS_1588_ADJ_OFFSET      0x000001D8U /**< 1588 nanosecond
+						      adjustment counter */
+#define XEMACPS_1588_INC_OFFSET      0x000001DCU /**< 1588 nanosecond
+						      increment counter */
+#define XEMACPS_PTP_TXSEC_OFFSET     0x000001E0U /**< 1588 PTP transmit second
+						      counter */
+#define XEMACPS_PTP_TXNANOSEC_OFFSET 0x000001E4U /**< 1588 PTP transmit
+						      nanosecond counter */
+#define XEMACPS_PTP_RXSEC_OFFSET     0x000001E8U /**< 1588 PTP receive second
+						      counter */
+#define XEMACPS_PTP_RXNANOSEC_OFFSET 0x000001ECU /**< 1588 PTP receive
+						      nanosecond counter */
+#define XEMACPS_PTPP_TXSEC_OFFSET    0x000001F0U /**< 1588 PTP peer transmit
+						      second counter */
+#define XEMACPS_PTPP_TXNANOSEC_OFFSET 0x000001F4U /**< 1588 PTP peer transmit
+						      nanosecond counter */
+#define XEMACPS_PTPP_RXSEC_OFFSET    0x000001F8U /**< 1588 PTP peer receive
+						      second counter */
+#define XEMACPS_PTPP_RXNANOSEC_OFFSET 0x000001FCU /**< 1588 PTP peer receive
+						      nanosecond counter */
+
+#define XEMACPS_INTQ1_STS_OFFSET     0x00000400U /**< Interrupt Q1 Status
+							reg */
+#define XEMACPS_TXQ1BASE_OFFSET	     0x00000440U /**< TX Q1 Base address
+							reg */
+#define XEMACPS_RXQ1BASE_OFFSET	     0x00000480U /**< RX Q1 Base address
+							reg */
+#define XEMACPS_MSBBUF_TXQBASE_OFFSET  0x000004C8U /**< MSB Buffer TX Q Base
+							reg */
+#define XEMACPS_MSBBUF_RXQBASE_OFFSET  0x000004D4U /**< MSB Buffer RX Q Base
+							reg */
+#define XEMACPS_INTQ1_IER_OFFSET     0x00000600U /**< Interrupt Q1 Enable
+							reg */
+#define XEMACPS_INTQ1_IDR_OFFSET     0x00000620U /**< Interrupt Q1 Disable
+							reg */
+#define XEMACPS_INTQ1_IMR_OFFSET     0x00000640U /**< Interrupt Q1 Mask
+							reg */
+
+/* Define some bit positions for registers. */
+
+/** @name network control register bit definitions
+ * @{
+ */
+#define XEMACPS_NWCTRL_FLUSH_DPRAM_MASK	0x00040000U /**< Flush a packet from
+							Rx SRAM */
+#define XEMACPS_NWCTRL_ZEROPAUSETX_MASK 0x00000800U /**< Transmit zero quantum
+                                                         pause frame */
+#define XEMACPS_NWCTRL_PAUSETX_MASK     0x00000800U /**< Transmit pause frame */
+#define XEMACPS_NWCTRL_HALTTX_MASK      0x00000400U /**< Halt transmission
+                                                         after current frame */
+#define XEMACPS_NWCTRL_STARTTX_MASK     0x00000200U /**< Start tx (tx_go) */
+
+#define XEMACPS_NWCTRL_STATWEN_MASK     0x00000080U /**< Enable writing to
+                                                         stat counters */
+#define XEMACPS_NWCTRL_STATINC_MASK     0x00000040U /**< Increment statistic
+                                                         registers */
+#define XEMACPS_NWCTRL_STATCLR_MASK     0x00000020U /**< Clear statistic
+                                                         registers */
+#define XEMACPS_NWCTRL_MDEN_MASK        0x00000010U /**< Enable MDIO port */
+#define XEMACPS_NWCTRL_TXEN_MASK        0x00000008U /**< Enable transmit */
+#define XEMACPS_NWCTRL_RXEN_MASK        0x00000004U /**< Enable receive */
+#define XEMACPS_NWCTRL_LOOPEN_MASK      0x00000002U /**< local loopback */
+/*@}*/
+
+/** @name network configuration register bit definitions
+ * @{
+ */
+#define XEMACPS_NWCFG_BADPREAMBEN_MASK 0x20000000U /**< disable rejection of
+                                                        non-standard preamble */
+#define XEMACPS_NWCFG_IPDSTRETCH_MASK  0x10000000U /**< enable transmit IPG */
+#define XEMACPS_NWCFG_SGMIIEN_MASK     0x08000000U /**< SGMII Enable */
+#define XEMACPS_NWCFG_FCSIGNORE_MASK   0x04000000U /**< disable rejection of
+                                                        FCS error */
+#define XEMACPS_NWCFG_HDRXEN_MASK      0x02000000U /**< RX half duplex */
+#define XEMACPS_NWCFG_RXCHKSUMEN_MASK  0x01000000U /**< enable RX checksum
+                                                        offload */
+#define XEMACPS_NWCFG_PAUSECOPYDI_MASK 0x00800000U /**< Do not copy pause
+                                                        Frames to memory */
+#define XEMACPS_NWCFG_DWIDTH_64_MASK   0x00200000U /**< 64 bit Data bus width */
+#define XEMACPS_NWCFG_MDC_SHIFT_MASK   18U	   /**< shift bits for MDC */
+#define XEMACPS_NWCFG_MDCCLKDIV_MASK   0x001C0000U /**< MDC Mask PCLK divisor */
+#define XEMACPS_NWCFG_FCSREM_MASK      0x00020000U /**< Discard FCS from
+                                                        received frames */
+#define XEMACPS_NWCFG_LENERRDSCRD_MASK 0x00010000U
+/**< RX length error discard */
+#define XEMACPS_NWCFG_RXOFFS_MASK      0x0000C000U /**< RX buffer offset */
+#define XEMACPS_NWCFG_PAUSEEN_MASK     0x00002000U /**< Enable pause RX */
+#define XEMACPS_NWCFG_RETRYTESTEN_MASK 0x00001000U /**< Retry test */
+#define XEMACPS_NWCFG_XTADDMACHEN_MASK 0x00000200U
+/**< External address match enable */
+#define XEMACPS_NWCFG_PCSSEL_MASK      0x00000800U /**< PCS Select */
+#define XEMACPS_NWCFG_1000_MASK        0x00000400U /**< 1000 Mbps */
+#define XEMACPS_NWCFG_1536RXEN_MASK    0x00000100U /**< Enable 1536 byte
+                                                        frames reception */
+#define XEMACPS_NWCFG_UCASTHASHEN_MASK 0x00000080U /**< Receive unicast hash
+                                                        frames */
+#define XEMACPS_NWCFG_MCASTHASHEN_MASK 0x00000040U /**< Receive multicast hash
+                                                        frames */
+#define XEMACPS_NWCFG_BCASTDI_MASK     0x00000020U /**< Do not receive
+                                                        broadcast frames */
+#define XEMACPS_NWCFG_COPYALLEN_MASK   0x00000010U /**< Copy all frames */
+#define XEMACPS_NWCFG_JUMBO_MASK       0x00000008U /**< Jumbo frames */
+#define XEMACPS_NWCFG_NVLANDISC_MASK   0x00000004U /**< Receive only VLAN
+                                                        frames */
+#define XEMACPS_NWCFG_FDEN_MASK        0x00000002U/**< full duplex */
+#define XEMACPS_NWCFG_100_MASK         0x00000001U /**< 100 Mbps */
+#define XEMACPS_NWCFG_RESET_MASK       0x00080000U/**< reset value */
+/*@}*/
+
+/** @name network status register bit definitaions
+ * @{
+ */
+#define XEMACPS_NWSR_MDIOIDLE_MASK     0x00000004U /**< PHY management idle */
+#define XEMACPS_NWSR_MDIO_MASK         0x00000002U /**< Status of mdio_in */
+/*@}*/
+
+
+/** @name MAC address register word 1 mask
+ * @{
+ */
+#define XEMACPS_LADDR_MACH_MASK        0x0000FFFFU /**< Address bits[47:32]
+                                                      bit[31:0] are in BOTTOM */
+/*@}*/
+
+
+/** @name DMA control register bit definitions
+ * @{
+ */
+#define XEMACPS_DMACR_ADDR_WIDTH_64		0x40000000U /**< 64 bit address bus */
+#define XEMACPS_DMACR_TXEXTEND_MASK		0x20000000U /**< Tx Extended desc mode */
+#define XEMACPS_DMACR_RXEXTEND_MASK		0x10000000U /**< Rx Extended desc mode */
+#define XEMACPS_DMACR_RXBUF_MASK		0x00FF0000U /**< Mask bit for RX buffer
+													size */
+#define XEMACPS_DMACR_RXBUF_SHIFT 		16U	/**< Shift bit for RX buffer
+												size */
+#define XEMACPS_DMACR_TCPCKSUM_MASK		0x00000800U /**< enable/disable TX
+													    checksum offload */
+#define XEMACPS_DMACR_TXSIZE_MASK		0x00000400U /**< TX buffer memory size */
+#define XEMACPS_DMACR_RXSIZE_MASK		0x00000300U /**< RX buffer memory size */
+#define XEMACPS_DMACR_ENDIAN_MASK		0x00000080U /**< endian configuration */
+#define XEMACPS_DMACR_BLENGTH_MASK		0x0000001FU /**< buffer burst length */
+#define XEMACPS_DMACR_SINGLE_AHB_BURST	0x00000001U /**< single AHB bursts */
+#define XEMACPS_DMACR_INCR4_AHB_BURST	0x00000004U /**< 4 bytes AHB bursts */
+#define XEMACPS_DMACR_INCR8_AHB_BURST	0x00000008U /**< 8 bytes AHB bursts */
+#define XEMACPS_DMACR_INCR16_AHB_BURST	0x00000010U /**< 16 bytes AHB bursts */
+/*@}*/
+
+/** @name transmit status register bit definitions
+ * @{
+ */
+#define XEMACPS_TXSR_HRESPNOK_MASK    0x00000100U /**< Transmit hresp not OK */
+#define XEMACPS_TXSR_URUN_MASK        0x00000040U /**< Transmit underrun */
+#define XEMACPS_TXSR_TXCOMPL_MASK     0x00000020U /**< Transmit completed OK */
+#define XEMACPS_TXSR_BUFEXH_MASK      0x00000010U /**< Transmit buffs exhausted
+                                                       mid frame */
+#define XEMACPS_TXSR_TXGO_MASK        0x00000008U /**< Status of go flag */
+#define XEMACPS_TXSR_RXOVR_MASK       0x00000004U /**< Retry limit exceeded */
+#define XEMACPS_TXSR_FRAMERX_MASK     0x00000002U /**< Collision tx frame */
+#define XEMACPS_TXSR_USEDREAD_MASK    0x00000001U /**< TX buffer used bit set */
+
+#define XEMACPS_TXSR_ERROR_MASK      ((u32)XEMACPS_TXSR_HRESPNOK_MASK | \
+                                       (u32)XEMACPS_TXSR_URUN_MASK | \
+                                       (u32)XEMACPS_TXSR_BUFEXH_MASK | \
+                                       (u32)XEMACPS_TXSR_RXOVR_MASK | \
+                                       (u32)XEMACPS_TXSR_FRAMERX_MASK | \
+                                       (u32)XEMACPS_TXSR_USEDREAD_MASK)
+/*@}*/
+
+/**
+ * @name receive status register bit definitions
+ * @{
+ */
+#define XEMACPS_RXSR_HRESPNOK_MASK    0x00000008U /**< Receive hresp not OK */
+#define XEMACPS_RXSR_RXOVR_MASK       0x00000004U /**< Receive overrun */
+#define XEMACPS_RXSR_FRAMERX_MASK     0x00000002U /**< Frame received OK */
+#define XEMACPS_RXSR_BUFFNA_MASK      0x00000001U /**< RX buffer used bit set */
+
+#define XEMACPS_RXSR_ERROR_MASK      ((u32)XEMACPS_RXSR_HRESPNOK_MASK | \
+                                       (u32)XEMACPS_RXSR_RXOVR_MASK | \
+                                       (u32)XEMACPS_RXSR_BUFFNA_MASK)
+/*@}*/
+
+/**
+ * @name Interrupt Q1 status register bit definitions
+ * @{
+ */
+#define XEMACPS_INTQ1SR_TXCOMPL_MASK	0x00000080U /**< Transmit completed OK */
+#define XEMACPS_INTQ1SR_TXERR_MASK	0x00000040U /**< Transmit AMBA Error */
+
+#define XEMACPS_INTQ1_IXR_ALL_MASK	((u32)XEMACPS_INTQ1SR_TXCOMPL_MASK | \
+					 (u32)XEMACPS_INTQ1SR_TXERR_MASK)
+
+/*@}*/
+
+/**
+ * @name interrupts bit definitions
+ * Bits definitions are same in XEMACPS_ISR_OFFSET,
+ * XEMACPS_IER_OFFSET, XEMACPS_IDR_OFFSET, and XEMACPS_IMR_OFFSET
+ * @{
+ */
+#define XEMACPS_IXR_PTP_CMP_MASK	0x20000000U /**< PTP TSU Compare Match */
+#define XEMACPS_IXR_PTP_PPS_MASK	0x04000000U /**< PTP Pulse per second */
+#define XEMACPS_IXR_PTPPSTX_MASK    0x02000000U /**< PTP Psync transmitted */
+#define XEMACPS_IXR_PTPPDRTX_MASK   0x01000000U /**< PTP Pdelay_req
+						     transmitted */
+#define XEMACPS_IXR_PTPSTX_MASK     0x00800000U /**< PTP Sync transmitted */
+#define XEMACPS_IXR_PTPDRTX_MASK    0x00400000U /**< PTP Delay_req transmitted
+						*/
+#define XEMACPS_IXR_PTPPSRX_MASK    0x00200000U /**< PTP Psync received */
+#define XEMACPS_IXR_PTPPDRRX_MASK   0x00100000U /**< PTP Pdelay_req received */
+#define XEMACPS_IXR_PTPSRX_MASK     0x00080000U /**< PTP Sync received */
+#define XEMACPS_IXR_PTPDRRX_MASK    0x00040000U /**< PTP Delay_req received */
+#define XEMACPS_IXR_PAUSETX_MASK    0x00004000U	/**< Pause frame transmitted */
+#define XEMACPS_IXR_PAUSEZERO_MASK  0x00002000U	/**< Pause time has reached
+                                                     zero */
+#define XEMACPS_IXR_PAUSENZERO_MASK 0x00001000U	/**< Pause frame received */
+#define XEMACPS_IXR_HRESPNOK_MASK   0x00000800U	/**< hresp not ok */
+#define XEMACPS_IXR_RXOVR_MASK      0x00000400U	/**< Receive overrun occurred */
+#define XEMACPS_IXR_TXCOMPL_MASK    0x00000080U	/**< Frame transmitted ok */
+#define XEMACPS_IXR_TXEXH_MASK      0x00000040U	/**< Transmit err occurred or
+                                                     no buffers*/
+#define XEMACPS_IXR_RETRY_MASK      0x00000020U	/**< Retry limit exceeded */
+#define XEMACPS_IXR_URUN_MASK       0x00000010U	/**< Transmit underrun */
+#define XEMACPS_IXR_TXUSED_MASK     0x00000008U	/**< Tx buffer used bit read */
+#define XEMACPS_IXR_RXUSED_MASK     0x00000004U	/**< Rx buffer used bit read */
+#define XEMACPS_IXR_FRAMERX_MASK    0x00000002U	/**< Frame received ok */
+#define XEMACPS_IXR_MGMNT_MASK      0x00000001U	/**< PHY management complete */
+#define XEMACPS_IXR_ALL_MASK        0x00007FFFU	/**< Everything! */
+
+#define XEMACPS_IXR_TX_ERR_MASK    ((u32)XEMACPS_IXR_TXEXH_MASK |         \
+                                     (u32)XEMACPS_IXR_RETRY_MASK |         \
+                                     (u32)XEMACPS_IXR_URUN_MASK)
+
+
+#define XEMACPS_IXR_RX_ERR_MASK    ((u32)XEMACPS_IXR_HRESPNOK_MASK |      \
+                                     (u32)XEMACPS_IXR_RXUSED_MASK |        \
+                                     (u32)XEMACPS_IXR_RXOVR_MASK)
+
+/*@}*/
+
+/** @name PHY Maintenance bit definitions
+ * @{
+ */
+#define XEMACPS_PHYMNTNC_OP_MASK    0x40020000U	/**< operation mask bits */
+#define XEMACPS_PHYMNTNC_OP_R_MASK  0x20000000U	/**< read operation */
+#define XEMACPS_PHYMNTNC_OP_W_MASK  0x10000000U	/**< write operation */
+#define XEMACPS_PHYMNTNC_ADDR_MASK  0x0F800000U	/**< Address bits */
+#define XEMACPS_PHYMNTNC_REG_MASK   0x007C0000U	/**< register bits */
+#define XEMACPS_PHYMNTNC_DATA_MASK  0x00000FFFU	/**< data bits */
+#define XEMACPS_PHYMNTNC_PHAD_SHFT_MSK   23U	/**< Shift bits for PHYAD */
+#define XEMACPS_PHYMNTNC_PREG_SHFT_MSK   18U	/**< Shift bits for PHREG */
+/*@}*/
+
+/* Transmit buffer descriptor status words offset
+ * @{
+ */
+#define XEMACPS_BD_ADDR_OFFSET  0x00000000U /**< word 0/addr of BDs */
+#define XEMACPS_BD_STAT_OFFSET  0x00000004U /**< word 1/status of BDs */
+#define XEMACPS_BD_ADDR_HI_OFFSET  0x00000008U /**< word 2/addr of BDs */
+
+/*
+ * @}
+ */
+
+/* Transmit buffer descriptor status words bit positions.
+ * Transmit buffer descriptor consists of two 32-bit registers,
+ * the first - word0 contains a 32-bit address pointing to the location of
+ * the transmit data.
+ * The following register - word1, consists of various information to control
+ * the XEmacPs transmit process.  After transmit, this is updated with status
+ * information, whether the frame was transmitted OK or why it had failed.
+ * @{
+ */
+#define XEMACPS_TXBUF_USED_MASK  0x80000000U /**< Used bit. */
+#define XEMACPS_TXBUF_WRAP_MASK  0x40000000U /**< Wrap bit, last descriptor */
+#define XEMACPS_TXBUF_RETRY_MASK 0x20000000U /**< Retry limit exceeded */
+#define XEMACPS_TXBUF_URUN_MASK  0x10000000U /**< Transmit underrun occurred */
+#define XEMACPS_TXBUF_EXH_MASK   0x08000000U /**< Buffers exhausted */
+#define XEMACPS_TXBUF_TCP_MASK   0x04000000U /**< Late collision. */
+#define XEMACPS_TXBUF_NOCRC_MASK 0x00010000U /**< No CRC */
+#define XEMACPS_TXBUF_LAST_MASK  0x00008000U /**< Last buffer */
+#define XEMACPS_TXBUF_LEN_MASK   0x00003FFFU /**< Mask for length field */
+/*
+ * @}
+ */
+
+/* Receive buffer descriptor status words bit positions.
+ * Receive buffer descriptor consists of two 32-bit registers,
+ * the first - word0 contains a 32-bit word aligned address pointing to the
+ * address of the buffer. The lower two bits make up the wrap bit indicating
+ * the last descriptor and the ownership bit to indicate it has been used by
+ * the XEmacPs.
+ * The following register - word1, contains status information regarding why
+ * the frame was received (the filter match condition) as well as other
+ * useful info.
+ * @{
+ */
+#define XEMACPS_RXBUF_BCAST_MASK     0x80000000U /**< Broadcast frame */
+#define XEMACPS_RXBUF_MULTIHASH_MASK 0x40000000U /**< Multicast hashed frame */
+#define XEMACPS_RXBUF_UNIHASH_MASK   0x20000000U /**< Unicast hashed frame */
+#define XEMACPS_RXBUF_EXH_MASK       0x08000000U /**< buffer exhausted */
+#define XEMACPS_RXBUF_AMATCH_MASK    0x06000000U /**< Specific address
+                                                      matched */
+#define XEMACPS_RXBUF_IDFOUND_MASK   0x01000000U /**< Type ID matched */
+#define XEMACPS_RXBUF_IDMATCH_MASK   0x00C00000U /**< ID matched mask */
+#define XEMACPS_RXBUF_VLAN_MASK      0x00200000U /**< VLAN tagged */
+#define XEMACPS_RXBUF_PRI_MASK       0x00100000U /**< Priority tagged */
+#define XEMACPS_RXBUF_VPRI_MASK      0x000E0000U /**< Vlan priority */
+#define XEMACPS_RXBUF_CFI_MASK       0x00010000U /**< CFI frame */
+#define XEMACPS_RXBUF_EOF_MASK       0x00008000U /**< End of frame. */
+#define XEMACPS_RXBUF_SOF_MASK       0x00004000U /**< Start of frame. */
+#define XEMACPS_RXBUF_LEN_MASK       0x00001FFFU /**< Mask for length field */
+#define XEMACPS_RXBUF_LEN_JUMBO_MASK 0x00003FFFU /**< Mask for jumbo length */
+
+#define XEMACPS_RXBUF_WRAP_MASK      0x00000002U /**< Wrap bit, last BD */
+#define XEMACPS_RXBUF_NEW_MASK       0x00000001U /**< Used bit.. */
+#define XEMACPS_RXBUF_ADD_MASK       0xFFFFFFFCU /**< Mask for address */
+/*
+ * @}
+ */
+
+/*
+ * Define appropriate I/O access method to memory mapped I/O or other
+ * interface if necessary.
+ */
+
+#define XEmacPs_In32  Xil_In32
+#define XEmacPs_Out32 Xil_Out32
+
+
+/****************************************************************************/
+/**
+*
+* Read the given register.
+*
+* @param    BaseAddress is the base address of the device
+* @param    RegOffset is the register offset to be read
+*
+* @return   The 32-bit value of the register
+*
+* @note
+* C-style signature:
+*    u32 XEmacPs_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+*****************************************************************************/
+#define XEmacPs_ReadReg(BaseAddress, RegOffset) \
+    XEmacPs_In32((BaseAddress) + (u32)(RegOffset))
+
+
+/****************************************************************************/
+/**
+*
+* Write the given register.
+*
+* @param    BaseAddress is the base address of the device
+* @param    RegOffset is the register offset to be written
+* @param    Data is the 32-bit value to write to the register
+*
+* @return   None.
+*
+* @note
+* C-style signature:
+*    void XEmacPs_WriteReg(u32 BaseAddress, u32 RegOffset,
+*         u32 Data)
+*
+*****************************************************************************/
+#define XEmacPs_WriteReg(BaseAddress, RegOffset, Data) \
+    XEmacPs_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data))
+
+/************************** Function Prototypes *****************************/
+/*
+ * Perform reset operation to the emacps interface
+ */
+void XEmacPs_ResetHw(u32 BaseAddr);
+
+#ifdef __cplusplus
+  }
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_intr.c b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_intr.c
new file mode 100644
index 0000000..4aaf53f
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_intr.c
@@ -0,0 +1,301 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xemacps_intr.c
+* @addtogroup emacps_v3_7
+* @{
+*
+* Functions in this file implement general purpose interrupt processing related
+* functionality. See xemacps.h for a detailed description of the driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a wsy  01/10/10 First release
+* 1.03a asa  01/24/13 Fix for CR #692702 which updates error handling for
+*		      Rx errors. Under heavy Rx traffic, there will be a large
+*		      number of errors related to receive buffer not available.
+*		      Because of a HW bug (SI #692601), under such heavy errors,
+*		      the Rx data path can become unresponsive. To reduce the
+*		      probabilities for hitting this HW bug, the SW writes to
+*		      bit 18 to flush a packet from Rx DPRAM immediately. The
+*		      changes for it are done in the function
+*		      XEmacPs_IntrHandler.
+* 2.1   srt  07/15/14 Add support for Zynq Ultrascale Mp GEM specification
+*		       and 64-bit changes.
+* 3.0   kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1   hk   07/27/15 Do not call error handler with '0' error code when
+*                     there is no error. CR# 869403
+* 

+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xemacps.h"
+#if XPAR_EMACPS_TSU_ENABLE
+#include "netif/xemacps_ieee1588.h"
+#endif
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/*****************************************************************************/
+/**
+ * Install an asynchronious handler function for the given HandlerType:
+ *
+ * @param InstancePtr is a pointer to the instance to be worked on.
+ * @param HandlerType indicates what interrupt handler type is.
+ *        XEMACPS_HANDLER_DMASEND, XEMACPS_HANDLER_DMARECV and
+ *        XEMACPS_HANDLER_ERROR.
+ * @param FuncPointer is the pointer to the callback function
+ * @param CallBackRef is the upper layer callback reference passed back when
+ *        when the callback function is invoked.
+ *
+ * @return
+ *
+ * None.
+ *
+ * @note
+ * There is no assert on the CallBackRef since the driver doesn't know what
+ * it is.
+ *
+ *****************************************************************************/
+LONG XEmacPs_SetHandler(XEmacPs *InstancePtr, u32 HandlerType,
+			void *FuncPointer, void *CallBackRef)
+{
+	LONG Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(FuncPointer != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	switch (HandlerType) {
+	case XEMACPS_HANDLER_DMASEND:
+		Status = (LONG)(XST_SUCCESS);
+		InstancePtr->SendHandler = ((XEmacPs_Handler)(void *)FuncPointer);
+		InstancePtr->SendRef = CallBackRef;
+		break;
+	case XEMACPS_HANDLER_DMARECV:
+		Status = (LONG)(XST_SUCCESS);
+		InstancePtr->RecvHandler = ((XEmacPs_Handler)(void *)FuncPointer);
+		InstancePtr->RecvRef = CallBackRef;
+		break;
+	case XEMACPS_HANDLER_ERROR:
+		Status = (LONG)(XST_SUCCESS);
+		InstancePtr->ErrorHandler = ((XEmacPs_ErrHandler)(void *)FuncPointer);
+		InstancePtr->ErrorRef = CallBackRef;
+		break;
+	default:
+		Status = (LONG)(XST_INVALID_PARAM);
+		break;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+* Master interrupt handler for EMAC driver. This routine will query the
+* status of the device, bump statistics, and invoke user callbacks.
+*
+* This routine must be connected to an interrupt controller using OS/BSP
+* specific methods.
+*
+* @param XEmacPsPtr is a pointer to the XEMACPS instance that has caused the
+*        interrupt.
+*
+******************************************************************************/
+void XEmacPs_IntrHandler(void *XEmacPsPtr)
+{
+	u32 RegISR;
+	u32 RegSR;
+	u32 RegCtrl;
+	u32 RegQ1ISR = 0U;
+	XEmacPs *InstancePtr = (XEmacPs *) XEmacPsPtr;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/* This ISR will try to handle as many interrupts as it can in a single
+	 * call. However, in most of the places where the user's error handler
+         * is called, this ISR exits because it is expected that the user will
+         * reset the device in nearly all instances.
+	 */
+	RegISR = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_ISR_OFFSET);
+
+	/* Read Transmit Q1 ISR */
+
+	if (InstancePtr->Version > 2)
+		RegQ1ISR = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_INTQ1_STS_OFFSET);
+
+	/* Clear the interrupt status register */
+	XEmacPs_WriteReg(InstancePtr->Config.BaseAddress, XEMACPS_ISR_OFFSET,
+			   RegISR);
+
+#if XPAR_EMACPS_TSU_ENABLE
+	/* PTP TSU Compare Interrupt*/
+	if((RegISR & XEMACPS_IXR_PTP_CMP_MASK) != 0x00000000U) {
+		ILM_HW_Isr_Master();
+	}
+
+	/* Pulse per second IRQ */
+	if((RegISR & XEMACPS_IXR_PTP_PPS_MASK) != 0x00000000U) {
+		asm volatile("nop");
+	}
+
+	/* PTP Sync Frame Received */
+	if ((RegISR & XEMACPS_IXR_PTPSRX_MASK) != 0x00000000U) {
+		/* Clear RX status register RX complete indication but preserve
+		 * error bits if there is any */
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress, XEMACPS_RXSR_OFFSET,
+				((u32)XEMACPS_RXSR_FRAMERX_MASK | (u32)XEMACPS_RXSR_BUFFNA_MASK));
+		XEmacPs_GetRxTimestamp();
+	}
+
+	/* PTP Sync Frame Transmitted */
+	if ((RegISR & XEMACPS_IXR_PTPSTX_MASK) != 0x00000000U) {
+		/* Clear RX status register RX complete indication but preserve
+		 * error bits if there is any */
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress, XEMACPS_TXSR_OFFSET,
+				((u32)XEMACPS_TXSR_TXCOMPL_MASK | (u32)XEMACPS_TXSR_USEDREAD_MASK));
+		XEmacPs_GetTxTimestamp();
+	}
+#endif
+
+	/* Receive complete interrupt */
+	if ((RegISR & XEMACPS_IXR_FRAMERX_MASK) != 0x00000000U) {
+		/* Clear RX status register RX complete indication but preserve
+		 * error bits if there is any */
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_RXSR_OFFSET,
+				   ((u32)XEMACPS_RXSR_FRAMERX_MASK |
+				   (u32)XEMACPS_RXSR_BUFFNA_MASK));
+		InstancePtr->RecvHandler(InstancePtr->RecvRef);
+	}
+
+	/* Transmit Q1 complete interrupt */
+	if ((InstancePtr->Version > 2) &&
+			((RegQ1ISR & XEMACPS_INTQ1SR_TXCOMPL_MASK) != 0x00000000U)) {
+		/* Clear TX status register TX complete indication but preserve
+		 * error bits if there is any */
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_INTQ1_STS_OFFSET,
+				   XEMACPS_INTQ1SR_TXCOMPL_MASK);
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_TXSR_OFFSET,
+				   ((u32)XEMACPS_TXSR_TXCOMPL_MASK |
+				   (u32)XEMACPS_TXSR_USEDREAD_MASK));
+		InstancePtr->SendHandler(InstancePtr->SendRef);
+	}
+
+	/* Transmit complete interrupt */
+	if ((RegISR & XEMACPS_IXR_TXCOMPL_MASK) != 0x00000000U) {
+		/* Clear TX status register TX complete indication but preserve
+		 * error bits if there is any */
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_TXSR_OFFSET,
+				   ((u32)XEMACPS_TXSR_TXCOMPL_MASK |
+				   (u32)XEMACPS_TXSR_USEDREAD_MASK));
+		InstancePtr->SendHandler(InstancePtr->SendRef);
+	}
+
+	/* Receive error conditions interrupt */
+	if ((RegISR & XEMACPS_IXR_RX_ERR_MASK) != 0x00000000U) {
+		/* Clear RX status register */
+		RegSR = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					  XEMACPS_RXSR_OFFSET);
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_RXSR_OFFSET, RegSR);
+
+		/* Fix for CR # 692702. Write to bit 18 of net_ctrl
+		 * register to flush a packet out of Rx SRAM upon
+		 * an error for receive buffer not available. */
+		if ((RegISR & XEMACPS_IXR_RXUSED_MASK) != 0x00000000U) {
+			RegCtrl =
+			XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+						XEMACPS_NWCTRL_OFFSET);
+			RegCtrl |= (u32)XEMACPS_NWCTRL_FLUSH_DPRAM_MASK;
+			XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+					XEMACPS_NWCTRL_OFFSET, RegCtrl);
+		}
+
+		if(RegSR != 0) {
+			InstancePtr->ErrorHandler(InstancePtr->ErrorRef,
+						XEMACPS_RECV, RegSR);
+		}
+	}
+
+        /* When XEMACPS_IXR_TXCOMPL_MASK is flaged, XEMACPS_IXR_TXUSED_MASK
+         * will be asserted the same time.
+         * Have to distinguish this bit to handle the real error condition.
+         */
+	/* Transmit Q1 error conditions interrupt */
+        if ((InstancePtr->Version > 2) &&
+			((RegQ1ISR & XEMACPS_INTQ1SR_TXERR_MASK) != 0x00000000U) &&
+            ((RegQ1ISR & XEMACPS_INTQ1SR_TXCOMPL_MASK) != 0x00000000U)) {
+			/* Clear Interrupt Q1 status register */
+			XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_INTQ1_STS_OFFSET, RegQ1ISR);
+			InstancePtr->ErrorHandler(InstancePtr->ErrorRef, XEMACPS_SEND,
+					  RegQ1ISR);
+	   }
+
+	/* Transmit error conditions interrupt */
+        if (((RegISR & XEMACPS_IXR_TX_ERR_MASK) != 0x00000000U) &&
+            (!(RegISR & XEMACPS_IXR_TXCOMPL_MASK) != 0x00000000U)) {
+		/* Clear TX status register */
+		RegSR = XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,
+					  XEMACPS_TXSR_OFFSET);
+		XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XEMACPS_TXSR_OFFSET, RegSR);
+		InstancePtr->ErrorHandler(InstancePtr->ErrorRef, XEMACPS_SEND,
+					  RegSR);
+	}
+
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_sinit.c b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_sinit.c
new file mode 100644
index 0000000..e2d2078
--- /dev/null
+++ b/src/Xilinx/libsrc/emacps_v3_7/src/xemacps_sinit.c
@@ -0,0 +1,97 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xemacps_sinit.c
+* @addtogroup emacps_v3_7
+* @{
+*
+* This file contains lookup method by device ID when success, it returns
+* pointer to config table to be used to initialize the device.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a wsy  01/10/10 New
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xemacps.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+/*************************** Variable Definitions *****************************/
+extern XEmacPs_Config XEmacPs_ConfigTable[XPAR_XEMACPS_NUM_INSTANCES];
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+* Lookup the device configuration based on the unique device ID.  The table
+* contains the configuration info for each device in the system.
+*
+* @param DeviceId is the unique device ID of the device being looked up.
+*
+* @return
+* A pointer to the configuration table entry corresponding to the given
+* device ID, or NULL if no match is found.
+*
+******************************************************************************/
+XEmacPs_Config *XEmacPs_LookupConfig(u16 DeviceId)
+{
+	XEmacPs_Config *CfgPtr = NULL;
+	u32 i;
+
+	for (i = 0U; i < (u32)XPAR_XEMACPS_NUM_INSTANCES; i++) {
+		if (XEmacPs_ConfigTable[i].DeviceId == DeviceId) {
+			CfgPtr = &XEmacPs_ConfigTable[i];
+			break;
+		}
+	}
+
+	return (XEmacPs_Config *)(CfgPtr);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/gpio_v4_3/src/Makefile b/src/Xilinx/libsrc/gpio_v4_3/src/Makefile
new file mode 100644
index 0000000..a88927f
--- /dev/null
+++ b/src/Xilinx/libsrc/gpio_v4_3/src/Makefile
@@ -0,0 +1,28 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+INCLUDEFILES=xgpio_l.h xgpio.h
+
+LIBSOURCES=*.c
+OUTS = *.o 
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs:
+	echo "Compiling gpio"
+	$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES)
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} $(OUTS)
+	make clean
+
+include: 
+	 ${CP} ${INCLUDEFILES} ${INCLUDEDIR} 
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/gpio_v4_3/src/xgpio.c b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio.c
new file mode 100644
index 0000000..9b72100
--- /dev/null
+++ b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio.c
@@ -0,0 +1,255 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xgpio.c
+* @addtogroup gpio_v4_3
+* @{
+*
+* The implementation of the XGpio driver's basic functionality. See xgpio.h
+* for more information about the driver.
+*
+* @note
+*
+* None
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a rmm  02/04/02 First release
+* 2.00a jhl  12/16/02 Update for dual channel and interrupt support
+* 2.01a jvb  12/13/05 Changed Initialize() into CfgInitialize(), and made
+*                     CfgInitialize() take a pointer to a config structure
+*                     instead of a device id. Moved Initialize() into
+*                     xgpio_sinit.c, and had Initialize() call CfgInitialize()
+*                     after it retrieved the config structure using the device
+*                     id. Removed include of xparameters.h along with any
+*                     dependencies on xparameters.h and the _g.c config table.
+* 2.11a mta  03/21/07 Updated to new coding style, added GetDataDirection
+* 2.12a sv   11/21/07 Updated driver to support access through DCR bus
+* 3.00a sv   11/21/09 Updated to use HAL Processor APIs. Renamed the
+*		      macros to remove _m from the name.
+* 4.1   lks  11/18/15 Clean up of the comments in the code and
+*		      removed support for DCR bridge
+* 4.2   sk   08/16/16 Used UINTPTR instead of u32 for Baseaddress as part of
+*                     adding 64 bit support. CR# 867425.
+*                     Changed the prototype of XGpio_CfgInitialize API.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xgpio.h"
+#include "xstatus.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+
+/************************** Function Prototypes *****************************/
+
+
+/****************************************************************************/
+/**
+* Initialize the XGpio instance provided by the caller based on the
+* given configuration data.
+*
+* Nothing is done except to initialize the InstancePtr.
+*
+* @param	InstancePtr is a pointer to an XGpio instance. The memory the
+*		pointer references must be pre-allocated by the caller. Further
+*		calls to manipulate the driver through the XGpio API must be
+*		made with this pointer.
+* @param	Config is a reference to a structure containing information
+*		about a specific GPIO device. This function initializes an
+*		InstancePtr object for a specific device specified by the
+*		contents of Config. This function can initialize multiple
+*		instance objects with the use of multiple calls giving different
+*		Config information on each call.
+* @param 	EffectiveAddr is the device base address in the virtual memory
+*		address space. The caller is responsible for keeping the address
+*		mapping from EffectiveAddr to the device physical base address
+*		unchanged once this function is invoked. Unexpected errors may
+*		occur if the address mapping changes after this function is
+*		called. If address translation is not used, use
+*		Config->BaseAddress for this parameters, passing the physical
+*		address instead.
+*
+* @return
+* 		- XST_SUCCESS if the initialization is successfull.
+*
+* @note		None.
+*
+*****************************************************************************/
+int XGpio_CfgInitialize(XGpio * InstancePtr, XGpio_Config * Config,
+			UINTPTR EffectiveAddr)
+{
+	/* Assert arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	/* Set some default values. */
+	InstancePtr->BaseAddress = EffectiveAddr;
+
+	InstancePtr->InterruptPresent = Config->InterruptPresent;
+	InstancePtr->IsDual = Config->IsDual;
+
+	/*
+	 * Indicate the instance is now ready to use, initialized without error
+	 */
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+	return (XST_SUCCESS);
+}
+
+
+/****************************************************************************/
+/**
+* Set the input/output direction of all discrete signals for the specified
+* GPIO channel.
+*
+* @param	InstancePtr is a pointer to an XGpio instance to be worked on.
+* @param	Channel contains the channel of the GPIO (1 or 2) to operate on.
+* @param	DirectionMask is a bitmask specifying which discretes are input
+*		and which are output. Bits set to 0 are output and bits set to 1
+*		are input.
+*
+* @return	None.
+*
+* @note		The hardware must be built for dual channels if this function
+*		is used with any channel other than 1.  If it is not, this
+*		function will assert.
+*
+*****************************************************************************/
+void XGpio_SetDataDirection(XGpio *InstancePtr, unsigned Channel,
+			    u32 DirectionMask)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((Channel == 1) ||
+		     ((Channel == 2) && (InstancePtr->IsDual == TRUE)));
+
+	XGpio_WriteReg(InstancePtr->BaseAddress,
+			((Channel - 1) * XGPIO_CHAN_OFFSET) + XGPIO_TRI_OFFSET,
+			DirectionMask);
+}
+
+/****************************************************************************/
+/**
+* Get the input/output direction of all discrete signals for the specified
+* GPIO channel.
+*
+* @param	InstancePtr is a pointer to an XGpio instance to be worked on.
+* @param	Channel contains the channel of the GPIO (1 or 2) to operate on.
+*
+* @return	Bitmask specifying which discretes are input and
+*		which are output. Bits set to 0 are output and bits set to 1 are
+*		input.
+*
+* @note
+*
+* The hardware must be built for dual channels if this function is used
+* with any channel other than 1.  If it is not, this function will assert.
+*
+*****************************************************************************/
+u32 XGpio_GetDataDirection(XGpio *InstancePtr, unsigned Channel)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((Channel == 1)  ||
+		((Channel == 2) &&
+		(InstancePtr->IsDual == TRUE)));
+
+	return XGpio_ReadReg(InstancePtr->BaseAddress,
+		((Channel - 1) * XGPIO_CHAN_OFFSET) + XGPIO_TRI_OFFSET);
+}
+
+/****************************************************************************/
+/**
+* Read state of discretes for the specified GPIO channnel.
+*
+* @param	InstancePtr is a pointer to an XGpio instance to be worked on.
+* @param	Channel contains the channel of the GPIO (1 or 2) to operate on.
+*
+* @return	Current copy of the discretes register.
+*
+* @note		The hardware must be built for dual channels if this function
+*		is used with any channel other than 1.  If it is not, this
+*		function will assert.
+*
+*****************************************************************************/
+u32 XGpio_DiscreteRead(XGpio * InstancePtr, unsigned Channel)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((Channel == 1) ||
+			((Channel == 2) && (InstancePtr->IsDual == TRUE)));
+
+	return XGpio_ReadReg(InstancePtr->BaseAddress,
+			      ((Channel - 1) * XGPIO_CHAN_OFFSET) +
+			      XGPIO_DATA_OFFSET);
+}
+
+/****************************************************************************/
+/**
+* Write to discretes register for the specified GPIO channel.
+*
+* @param	InstancePtr is a pointer to an XGpio instance to be worked on.
+* @param	Channel contains the channel of the GPIO (1 or 2) to operate on.
+* @param	Data is the value to be written to the discretes register.
+*
+* @return	None.
+*
+* @note		The hardware must be built for dual channels if this function
+*		is  used with any channel other than 1.  If it is not, this
+*		function will assert. See also XGpio_DiscreteSet() and
+*		XGpio_DiscreteClear().
+*
+*****************************************************************************/
+void XGpio_DiscreteWrite(XGpio * InstancePtr, unsigned Channel, u32 Data)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((Channel == 1) ||
+		     ((Channel == 2) && (InstancePtr->IsDual == TRUE)));
+
+	XGpio_WriteReg(InstancePtr->BaseAddress,
+			((Channel - 1) * XGPIO_CHAN_OFFSET) + XGPIO_DATA_OFFSET,
+			Data);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/gpio_v4_3/src/xgpio.h b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio.h
new file mode 100644
index 0000000..582d94a
--- /dev/null
+++ b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio.h
@@ -0,0 +1,214 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xgpio.h
+* @addtogroup gpio_v4_3
+* @{
+* @details
+*
+* This file contains the software API definition of the Xilinx General Purpose
+* I/O (XGpio) device driver.
+*
+* The Xilinx GPIO controller is a soft IP core designed for Xilinx FPGAs and
+* contains the following general features:
+*   - Support for up to 32 I/O discretes for each channel (64 bits total).
+*   - Each of the discretes can be configured for input or output.
+*   - Configurable support for dual channels and interrupt generation.
+*
+* The driver provides interrupt management functions. Implementation of
+* interrupt handlers is left to the user. Refer to the provided interrupt
+* example in the examples directory for details.
+*
+* This driver is intended to be RTOS and processor independent. Any needs for
+* dynamic memory management, threads or thread mutual exclusion, virtual
+* memory, or cache control must be satisfied by the layer above this driver.
+*
+* Initialization & Configuration
+*
+* The XGpio_Config structure is used by the driver to configure itself. This
+* configuration structure is typically created by the tool-chain based on HW
+* build properties.
+*
+* To support multiple runtime loading and initialization strategies employed
+* by various operating systems, the driver instance can be initialized in one
+* of the following ways:
+*
+*   - XGpio_Initialize(InstancePtr, DeviceId) - The driver looks up its own
+*     configuration structure created by the tool-chain based on an ID provided
+*     by the tool-chain.
+*
+*   - XGpio_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
+*     configuration structure provided by the caller. If running in a system
+*     with address translation, the provided virtual memory base address
+*     replaces the physical address present in the configuration structure.
+*
+* @note
+*
+* This API utilizes 32 bit I/O to the GPIO registers. With less than 32 bits,
+* the unused bits from registers are read as zero and written as don't cares.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a rmm  03/13/02 First release
+* 2.00a jhl  11/26/03 Added support for dual channels and interrupts
+* 2.01a jvb  12/14/05 I separated dependency on the static config table and
+*                     xparameters.h from the driver initialization by moving
+*                     _Initialize and _LookupConfig to _sinit.c. I also added
+*                     the new _CfgInitialize routine.
+* 2.11a mta  03/21/07 Updated to new coding style, added GetDataDirection
+* 2.12a sv   11/21/07 Updated driver to support access through DCR bus
+* 2.12a sv   06/05/08 Updated driver to fix the XGpio_InterruptDisable function
+*		      to properly update the Interrupt Enable register
+* 2.13a sdm  08/22/08 Removed support for static interrupt handlers from the MDD
+*		      file
+* 3.00a sv   11/21/09 Updated to use HAL Processor APIs.
+*		      Renamed the macros XGpio_mWriteReg to XGpio_WriteReg and
+*		      XGpio_mReadReg to XGpio_ReadReg. Removed the macros
+*		      XGpio_mSetDataDirection, XGpio_mGetDataReg and
+*		      XGpio_mSetDataReg. Users should use XGpio_WriteReg and
+*		      XGpio_ReadReg to achieve the same functionality.
+* 3.01a bss  04/18/13 Updated driver tcl to generate Canonical params in
+*		      xparameters.h. CR#698589
+* 4.0   adk  19/12/13 Updated as per the New Tcl API's
+* 4.1   lks  11/18/15 Updated to use cannonical xparameters in examples and
+*		      clean up of the comments, removed support for DCR bridge
+*		      and removed xgpio_intr_example for CR 900381
+* 4.2   sk   08/16/16 Used UINTPTR instead of u32 for Baseaddress as part of
+*                     adding 64 bit support. CR# 867425.
+*                     Changed the prototype of XGpio_CfgInitialize API.
+* 4.3   sk   09/29/16 Modified the example to make it work when LED_bits are
+*                     configured as an output. CR# 958644
+*       ms   01/23/17 Added xil_printf statement in main function for all
+*                     examples to ensure that "Successfully ran" and "Failed"
+*                     strings are available in all examples. This is a fix
+*                     for CR-965028.
+*       ms   03/17/17 Added readme.txt file in examples folder for doxygen
+*                     generation.
+*
+* 

+*****************************************************************************/
+
+#ifndef XGPIO_H			/* prevent circular inclusions */
+#define XGPIO_H			/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xgpio_l.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;		/* Unique ID  of device */
+	UINTPTR BaseAddress;	/* Device base address */
+	int InterruptPresent;	/* Are interrupts supported in h/w */
+	int IsDual;		/* Are 2 channels supported in h/w */
+} XGpio_Config;
+
+/**
+ * The XGpio driver instance data. The user is required to allocate a
+ * variable of this type for every GPIO device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	UINTPTR BaseAddress;	/* Device base address */
+	u32 IsReady;		/* Device is initialized and ready */
+	int InterruptPresent;	/* Are interrupts supported in h/w */
+	int IsDual;		/* Are 2 channels supported in h/w */
+} XGpio;
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+
+/************************** Function Prototypes *****************************/
+
+/*
+ * Initialization functions in xgpio_sinit.c
+ */
+int XGpio_Initialize(XGpio *InstancePtr, u16 DeviceId);
+XGpio_Config *XGpio_LookupConfig(u16 DeviceId);
+
+/*
+ * API Basic functions implemented in xgpio.c
+ */
+int XGpio_CfgInitialize(XGpio *InstancePtr, XGpio_Config * Config,
+			UINTPTR EffectiveAddr);
+void XGpio_SetDataDirection(XGpio *InstancePtr, unsigned Channel,
+			    u32 DirectionMask);
+u32 XGpio_GetDataDirection(XGpio *InstancePtr, unsigned Channel);
+u32 XGpio_DiscreteRead(XGpio *InstancePtr, unsigned Channel);
+void XGpio_DiscreteWrite(XGpio *InstancePtr, unsigned Channel, u32 Mask);
+
+
+/*
+ * API Functions implemented in xgpio_extra.c
+ */
+void XGpio_DiscreteSet(XGpio *InstancePtr, unsigned Channel, u32 Mask);
+void XGpio_DiscreteClear(XGpio *InstancePtr, unsigned Channel, u32 Mask);
+
+/*
+ * API Functions implemented in xgpio_selftest.c
+ */
+int XGpio_SelfTest(XGpio *InstancePtr);
+
+/*
+ * API Functions implemented in xgpio_intr.c
+ */
+void XGpio_InterruptGlobalEnable(XGpio *InstancePtr);
+void XGpio_InterruptGlobalDisable(XGpio *InstancePtr);
+void XGpio_InterruptEnable(XGpio *InstancePtr, u32 Mask);
+void XGpio_InterruptDisable(XGpio *InstancePtr, u32 Mask);
+void XGpio_InterruptClear(XGpio *InstancePtr, u32 Mask);
+u32 XGpio_InterruptGetEnabled(XGpio *InstancePtr);
+u32 XGpio_InterruptGetStatus(XGpio *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_extra.c b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_extra.c
new file mode 100644
index 0000000..5ce0b58
--- /dev/null
+++ b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_extra.c
@@ -0,0 +1,164 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xgpio_extra.c
+* @addtogroup gpio_v4_3
+* @{
+*
+* The implementation of the XGpio driver's advanced discrete functions.
+* See xgpio.h for more information about the driver.
+*
+* @note
+*
+* These APIs can only be used if the GPIO_IO ports in the IP are used for
+* connecting to the external output ports.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a rmm  02/04/02 First release
+* 2.00a jhl  12/16/02 Update for dual channel and interrupt support
+* 2.11a mta  03/21/07 Updated to new coding style
+* 3.00a sv   11/21/09 Updated to use HAL Processor APIs. Renamed the macros
+*		      XGpio_mWriteReg to XGpio_WriteReg, and XGpio_mReadReg
+*		      to XGpio_ReadReg.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xgpio.h"
+#include "xgpio_i.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+
+/****************************************************************************/
+/**
+* Set output discrete(s) to logic 1 for the specified GPIO channel.
+*
+* @param	InstancePtr is a pointer to an XGpio instance to be worked on.
+* @param	Channel contains the channel of the GPIO (1 or 2) to operate on.
+* @param	Mask is the set of bits that will be set to 1 in the discrete
+*		data register. All other bits in the data register are
+*		unaffected.
+*
+* @return	None.
+*
+* @note
+*
+* The hardware must be built for dual channels if this function is used
+* with any channel other than 1.  If it is not, this function will assert.
+*
+* This API can only be used if the GPIO_IO ports in the IP are used for
+* connecting to the external output ports.
+*
+*****************************************************************************/
+void XGpio_DiscreteSet(XGpio * InstancePtr, unsigned Channel, u32 Mask)
+{
+	u32 Current;
+	unsigned DataOffset;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((Channel == 1) ||
+		     ((Channel == 2) && (InstancePtr->IsDual == TRUE)));
+
+	/* Calculate the offset to the data register of the GPIO  */
+	DataOffset = ((Channel - 1) * XGPIO_CHAN_OFFSET) + XGPIO_DATA_OFFSET;
+
+	/*
+	 * Read the contents of the data register, merge in Mask and write
+	 * back results
+	 */
+	Current = XGpio_ReadReg(InstancePtr->BaseAddress, DataOffset);
+	Current |= Mask;
+	XGpio_WriteReg(InstancePtr->BaseAddress, DataOffset, Current);
+}
+
+
+/****************************************************************************/
+/**
+* Set output discrete(s) to logic 0 for the specified GPIO channel.
+*
+* @param	InstancePtr is a pointer to an XGpio instance to be worked on.
+* @param	Channel contains the channel of the GPIO (1 or 2) to operate on.
+* @param	Mask is the set of bits that will be set to 0 in the discrete
+*		data register. All other bits in the data register are
+*		unaffected.
+*
+* @return	None.
+*
+* @note
+*
+* The hardware must be built for dual channels if this function is used
+* with any channel other than 1.  If it is not, this function will assert.
+*
+* This API can only be used if the GPIO_IO ports in the IP are used for
+* connecting to the external output ports.
+*
+*****************************************************************************/
+void XGpio_DiscreteClear(XGpio * InstancePtr, unsigned Channel, u32 Mask)
+{
+	u32 Current;
+	unsigned DataOffset;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((Channel == 1) ||
+		     ((Channel == 2) && (InstancePtr->IsDual == TRUE)));
+
+	/* Calculate the offset to the data register of the GPIO  */
+	DataOffset = ((Channel - 1) * XGPIO_CHAN_OFFSET) + XGPIO_DATA_OFFSET;
+
+	/*
+	 * Read the contents of the data register, merge in Mask and write
+	 * back results
+	 */
+	Current = XGpio_ReadReg(InstancePtr->BaseAddress, DataOffset);
+	Current &= ~Mask;
+	XGpio_WriteReg(InstancePtr->BaseAddress, DataOffset, Current);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_g.c b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_g.c
new file mode 100644
index 0000000..64eefaf
--- /dev/null
+++ b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_g.c
@@ -0,0 +1,57 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xgpio.h"
+
+/*
+* The configuration table for devices
+*/
+
+XGpio_Config XGpio_ConfigTable[XPAR_XGPIO_NUM_INSTANCES] =
+{
+	{
+		XPAR_AXI_GPIO_0_DEVICE_ID,
+		XPAR_AXI_GPIO_0_BASEADDR,
+		XPAR_AXI_GPIO_0_INTERRUPT_PRESENT,
+		XPAR_AXI_GPIO_0_IS_DUAL
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_i.h b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_i.h
new file mode 100644
index 0000000..0e64915
--- /dev/null
+++ b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_i.h
@@ -0,0 +1,87 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************/
+/**
+* @file xgpio_i.h
+* @addtogroup gpio_v4_3
+* @{
+*
+* This header file contains internal identifiers, which are those shared
+* between the files of the driver. It is intended for internal use only.
+*
+* NOTES:
+*
+* None.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a rmm  03/13/02 First release
+* 2.11a mta  03/21/07 Updated to new coding style
+* 

+******************************************************************************/
+
+#ifndef XGPIO_I_H		/* prevent circular inclusions */
+#define XGPIO_I_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xgpio.h"
+
+/************************** Constant Definitions ****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions ****************************/
+
+extern XGpio_Config XGpio_ConfigTable[];
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_intr.c b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_intr.c
new file mode 100644
index 0000000..887932a
--- /dev/null
+++ b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_intr.c
@@ -0,0 +1,294 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xgpio_intr.c
+* @addtogroup gpio_v4_3
+* @{
+*
+* Implements GPIO interrupt processing functions for the XGpio driver.
+* See xgpio.h for more information about the driver.
+*
+* The functions in this file require the hardware device to be built with
+* interrupt capabilities. The functions will assert if called using hardware
+* that does not have interrupt capabilities.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 2.00a jhl  11/26/03 Initial release
+* 2.11a mta  03/21/07 Updated to new coding style
+* 2.12a sv   06/05/08 Updated driver to fix the XGpio_InterruptDisable function
+*		      to properly update the Interrupt Enable register
+* 3.00a sv   11/21/09 Updated to use HAL Processor APIs. Renamed the macros
+*		      XGpio_mWriteReg to XGpio_WriteReg, and XGpio_mReadReg
+*		      to XGpio_ReadReg.
+
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xgpio.h"
+
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+
+/****************************************************************************/
+/**
+* Enable the interrupt output signal. Interrupts enabled through
+* XGpio_InterruptEnable() will not be passed through until the global enable
+* bit is set by this function. This function is designed to allow all
+* interrupts (both channels) to be enabled easily for exiting a critical
+* section. This function will assert if the hardware device has not been
+* built with interrupt capabilities.
+*
+* @param	InstancePtr is the GPIO instance to operate on.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpio_InterruptGlobalEnable(XGpio *InstancePtr)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->InterruptPresent == TRUE);
+
+	XGpio_WriteReg(InstancePtr->BaseAddress, XGPIO_GIE_OFFSET,
+			XGPIO_GIE_GINTR_ENABLE_MASK);
+}
+
+
+/****************************************************************************/
+/**
+* Disable the interrupt output signal. Interrupts enabled through
+* XGpio_InterruptEnable() will no longer be passed through until the global
+* enable bit is set by XGpio_InterruptGlobalEnable(). This function is
+* designed to allow all interrupts (both channels) to be disabled easily for
+* entering a critical section. This function will assert if the hardware
+* device has not been built with interrupt capabilities.
+*
+* @param	InstancePtr is the GPIO instance to operate on.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpio_InterruptGlobalDisable(XGpio *InstancePtr)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->InterruptPresent == TRUE);
+
+
+	XGpio_WriteReg(InstancePtr->BaseAddress, XGPIO_GIE_OFFSET, 0x0);
+
+}
+
+
+/****************************************************************************/
+/**
+* Enable interrupts. The global interrupt must also be enabled by calling
+* XGpio_InterruptGlobalEnable() for interrupts to occur. This function will
+* assert if the hardware device has not been built with interrupt capabilities.
+*
+* @param	InstancePtr is the GPIO instance to operate on.
+* @param	Mask is the mask to enable. Bit positions of 1 are enabled.
+*		This mask is formed by OR'ing bits from XGPIO_IR* bits which
+*		are contained in xgpio_l.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpio_InterruptEnable(XGpio *InstancePtr, u32 Mask)
+{
+	u32 Register;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->InterruptPresent == TRUE);
+
+	/*
+	 * Read the interrupt enable register and only enable the specified
+	 * interrupts without disabling or enabling any others.
+	 */
+
+	Register = XGpio_ReadReg(InstancePtr->BaseAddress, XGPIO_IER_OFFSET);
+	XGpio_WriteReg(InstancePtr->BaseAddress, XGPIO_IER_OFFSET,
+			Register | Mask);
+
+}
+
+
+/****************************************************************************/
+/**
+* Disable interrupts. This function allows specific interrupts for each
+* channel to be disabled. This function will assert if the hardware device
+* has not been built with interrupt capabilities.
+*
+* @param	InstancePtr is the GPIO instance to operate on.
+* @param 	Mask is the mask to disable. Bits set to 1 are disabled. This
+*		mask is formed by OR'ing bits from XGPIO_IR* bits which are
+*		contained in xgpio_l.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpio_InterruptDisable(XGpio *InstancePtr, u32 Mask)
+{
+	u32 Register;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->InterruptPresent == TRUE);
+
+	/*
+	 * Read the interrupt enable register and only disable the specified
+	 * interrupts without enabling or disabling any others.
+	 */
+	Register = XGpio_ReadReg(InstancePtr->BaseAddress, XGPIO_IER_OFFSET);
+	XGpio_WriteReg(InstancePtr->BaseAddress, XGPIO_IER_OFFSET,
+			Register & (~Mask));
+
+}
+
+/****************************************************************************/
+/**
+* Clear pending interrupts with the provided mask. This function should be
+* called after the software has serviced the interrupts that are pending.
+* This function will assert if the hardware device has not been built with
+* interrupt capabilities.
+*
+* @param 	InstancePtr is the GPIO instance to operate on.
+* @param 	Mask is the mask to clear pending interrupts for. Bit positions
+*		of 1 are cleared. This mask is formed by OR'ing bits from
+*		XGPIO_IR* bits which are contained in xgpio_l.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpio_InterruptClear(XGpio * InstancePtr, u32 Mask)
+{
+	u32 Register;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(InstancePtr->InterruptPresent == TRUE);
+
+	/*
+	 * Read the interrupt status register and only clear the interrupts
+	 * that are specified without affecting any others.  Since the register
+	 * is a toggle on write, make sure any bits to be written are already
+	 * set.
+	 */
+	Register = XGpio_ReadReg(InstancePtr->BaseAddress, XGPIO_ISR_OFFSET);
+	XGpio_WriteReg(InstancePtr->BaseAddress, XGPIO_ISR_OFFSET,
+			Register & Mask);
+
+
+}
+
+
+/****************************************************************************/
+/**
+* Returns the interrupt enable mask. This function will assert if the
+* hardware device has not been built with interrupt capabilities.
+*
+* @param	InstancePtr is the GPIO instance to operate on.
+*
+* @return	A mask of bits made from XGPIO_IR* bits which are contained in
+*		xgpio_l.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XGpio_InterruptGetEnabled(XGpio * InstancePtr)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(InstancePtr->InterruptPresent == TRUE);
+
+	return XGpio_ReadReg(InstancePtr->BaseAddress, XGPIO_IER_OFFSET);
+}
+
+
+/****************************************************************************/
+/**
+* Returns the status of interrupt signals. Any bit in the mask set to 1
+* indicates that the channel associated with the bit has asserted an interrupt
+* condition. This function will assert if the hardware device has not been
+* built with interrupt capabilities.
+*
+* @param	InstancePtr is the GPIO instance to operate on.
+*
+* @return	A pointer to a mask of bits made from XGPIO_IR* bits which are
+*		 contained in xgpio_l.h.
+*
+* @note
+*
+* The interrupt status indicates the status of the device irregardless if
+* the interrupts from the devices have been enabled or not through
+* XGpio_InterruptEnable().
+*
+*****************************************************************************/
+u32 XGpio_InterruptGetStatus(XGpio * InstancePtr)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(InstancePtr->InterruptPresent == TRUE);
+
+
+	return XGpio_ReadReg(InstancePtr->BaseAddress, XGPIO_ISR_OFFSET);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_l.h b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_l.h
new file mode 100644
index 0000000..153fdfd
--- /dev/null
+++ b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_l.h
@@ -0,0 +1,193 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpio_l.h
+* @addtogroup gpio_v4_3
+* @{
+*
+* This header file contains identifiers and driver functions (or
+* macros) that can be used to access the device.  The user should refer to the
+* hardware device specification for more details of the device operation.
+*
+* The macros that are available in this file use a multiply to calculate the
+* addresses of registers. The user can control whether that multiply is done
+* at run time or at compile time. A constant passed as the channel parameter
+* will cause the multiply to be done at compile time. A variable passed as the
+* channel parameter will cause it to occur at run time.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a jhl  04/24/02 First release of low level driver
+* 2.00a jhl  11/26/03 Added support for dual channels and interrupts. This
+*                     change required the functions to be changed such that
+*                     the interface is not compatible with previous versions.
+*                     See the examples in the example directory for macros
+*                     to help compile an application that was designed for
+*                     previous versions of the driver. The interrupt registers
+*                     are accessible using the ReadReg and WriteReg macros and
+*                     a channel parameter was added to the other macros.
+* 2.11a mta  03/21/07 Updated to new coding style
+* 2.12a sv   11/21/07 Updated driver to support access through DCR bus.
+* 3.00a sv   11/21/09 Renamed the macros XGpio_mWriteReg to XGpio_WriteReg
+*		      XGpio_mReadReg to XGpio_ReadReg.
+*		      Removed the macros XGpio_mSetDataDirection,
+*		      XGpio_mGetDataReg and XGpio_mSetDataReg. Users
+*		      should use XGpio_WriteReg/XGpio_ReadReg to achieve the
+*		      same functionality.
+* 4.1  lks   11/18/15 Removed support for DCR bridge
+* 

+*
+******************************************************************************/
+
+#ifndef XGPIO_L_H		/* prevent circular inclusions */
+#define XGPIO_L_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+
+/************************** Constant Definitions *****************************/
+
+/** @name Registers
+ *
+ * Register offsets for this device.
+ * @{
+ */
+#define XGPIO_DATA_OFFSET	0x0   /**< Data register for 1st channel */
+#define XGPIO_TRI_OFFSET	0x4   /**< I/O direction reg for 1st channel */
+#define XGPIO_DATA2_OFFSET	0x8   /**< Data register for 2nd channel */
+#define XGPIO_TRI2_OFFSET	0xC   /**< I/O direction reg for 2nd channel */
+
+#define XGPIO_GIE_OFFSET	0x11C /**< Glogal interrupt enable register */
+#define XGPIO_ISR_OFFSET	0x120 /**< Interrupt status register */
+#define XGPIO_IER_OFFSET	0x128 /**< Interrupt enable register */
+
+/* @} */
+
+/* The following constant describes the offset of each channels data and
+ * tristate register from the base address.
+ */
+#define XGPIO_CHAN_OFFSET  8
+
+/** @name Interrupt Status and Enable Register bitmaps and masks
+ *
+ * Bit definitions for the interrupt status register and interrupt enable
+ * registers.
+ * @{
+ */
+#define XGPIO_IR_MASK		0x3 /**< Mask of all bits */
+#define XGPIO_IR_CH1_MASK	0x1 /**< Mask for the 1st channel */
+#define XGPIO_IR_CH2_MASK	0x2 /**< Mask for the 2nd channel */
+/*@}*/
+
+
+/** @name Global Interrupt Enable Register bitmaps and masks
+ *
+ * Bit definitions for the Global Interrupt  Enable register
+ * @{
+ */
+#define XGPIO_GIE_GINTR_ENABLE_MASK	0x80000000
+/*@}*/
+
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XGpio_In32  Xil_In32
+#define XGpio_Out32 Xil_Out32
+
+
+/****************************************************************************/
+/**
+*
+* Write a value to a GPIO register. A 32 bit write is performed. If the
+* GPIO core is implemented in a smaller width, only the least significant data
+* is written.
+*
+* @param	BaseAddress is the base address of the GPIO device.
+* @param	RegOffset is the register offset from the base to write to.
+* @param	Data is the data written to the register.
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XGpio_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+****************************************************************************/
+#define XGpio_WriteReg(BaseAddress, RegOffset, Data) \
+	XGpio_Out32((BaseAddress) + (RegOffset), (u32)(Data))
+
+/****************************************************************************/
+/**
+*
+* Read a value from a GPIO register. A 32 bit read is performed. If the
+* GPIO core is implemented in a smaller width, only the least
+* significant data is read from the register. The most significant data
+* will be read as 0.
+*
+* @param	BaseAddress is the base address of the GPIO device.
+* @param	RegOffset is the register offset from the base to read from.
+*
+* @return	Data read from the register.
+*
+* @note		C-style signature:
+*		u32 XGpio_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+****************************************************************************/
+#define XGpio_ReadReg(BaseAddress, RegOffset) \
+	XGpio_In32((BaseAddress) + (RegOffset))
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_selftest.c b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_selftest.c
new file mode 100644
index 0000000..8b1d75f
--- /dev/null
+++ b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_selftest.c
@@ -0,0 +1,110 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xgpio_selftest.c
+* @addtogroup gpio_v4_3
+* @{
+*
+* The implementation of the XGpio driver's self test function.
+* See xgpio.h for more information about the driver.
+*
+* @note
+*
+* None
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a rmm  02/04/02 First release
+* 2.00a jhl  01/13/04 Addition of dual channels and interrupts.
+* 2.11a mta  03/21/07 Updated to new coding style
+* 3.00a sv   11/21/09 Updated to use HAL Processor APIs.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xgpio.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+
+/******************************************************************************/
+/**
+* Run a self-test on the driver/device. This function does a minimal test
+* in which the data register is read. It only does a read without any kind
+* of test because the hardware has been parameterized such that it may be only
+* an input such that the state of the inputs won't be known.
+*
+* All other hardware features of the device are not guaranteed to be in the
+* hardware since they are parameterizable.
+*
+*
+* @param	InstancePtr is a pointer to the XGpio instance to be worked on.
+*		This parameter must have been previously initialized with
+*		XGpio_Initialize().
+*
+* @return 	XST_SUCCESS always. If the GPIO device was not present in the
+*		hardware a bus error could be generated. Other indicators of a
+*		bus error, such as registers in bridges or buses, may be
+*		necessary to determine if this function caused a bus error.
+*
+* @note		None.
+*
+******************************************************************************/
+int XGpio_SelfTest(XGpio * InstancePtr)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read from the data register of channel 1 which is always guaranteed
+	 * to be in the hardware device. Since the data may be configured as
+	 * all inputs, there is not way to guarantee the value read so don't
+	 * test it.
+	 */
+	(void) XGpio_DiscreteRead(InstancePtr, 1);
+
+	return (XST_SUCCESS);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_sinit.c b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_sinit.c
new file mode 100644
index 0000000..4d825b3
--- /dev/null
+++ b/src/Xilinx/libsrc/gpio_v4_3/src/xgpio_sinit.c
@@ -0,0 +1,159 @@
+/******************************************************************************
+*
+* Copyright (C) 2003 - 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xgpio_sinit.c
+* @addtogroup gpio_v4_3
+* @{
+*
+* The implementation of the XGpio driver's static initialzation
+* functionality.
+*
+* @note
+*
+* None
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 2.01a jvb  10/13/05 First release
+* 2.11a mta  03/21/07 Updated to new coding style
+* 4.0   sha  07/15/15 Defined macro XPAR_XGPIO_NUM_INSTANCES if not
+*		      defined in xparameters.h
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xstatus.h"
+#include "xparameters.h"
+#include "xgpio_i.h"
+
+/************************** Constant Definitions ****************************/
+
+#ifndef XPAR_XGPIO_NUM_INSTANCES
+#define XPAR_XGPIO_NUM_INSTANCES		0
+#endif
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+
+/************************** Function Prototypes *****************************/
+
+
+/******************************************************************************/
+/**
+* Lookup the device configuration based on the unique device ID.  The table
+* ConfigTable contains the configuration info for each device in the system.
+*
+* @param	DeviceId is the device identifier to lookup.
+*
+* @return
+*		 - A pointer of data type XGpio_Config which points to the
+*		device configuration if DeviceID is found.
+* 		- NULL if DeviceID is not found.
+*
+* @note		None.
+*
+******************************************************************************/
+XGpio_Config *XGpio_LookupConfig(u16 DeviceId)
+{
+	XGpio_Config *CfgPtr = NULL;
+
+	int Index;
+
+	for (Index = 0; Index < XPAR_XGPIO_NUM_INSTANCES; Index++) {
+		if (XGpio_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XGpio_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return CfgPtr;
+}
+
+
+/****************************************************************************/
+/**
+* Initialize the XGpio instance provided by the caller based on the
+* given DeviceID.
+*
+* Nothing is done except to initialize the InstancePtr.
+*
+* @param	InstancePtr is a pointer to an XGpio instance. The memory the
+*		pointer references must be pre-allocated by the caller. Further
+*		calls to manipulate the instance/driver through the XGpio API
+*		must be made with this pointer.
+* @param	DeviceId is the unique id of the device controlled by this XGpio
+*		instance. Passing in a device id associates the generic XGpio
+*		instance to a specific device, as chosen by the caller or
+*		application developer.
+*
+* @return
+*		- XST_SUCCESS if the initialization was successfull.
+* 		- XST_DEVICE_NOT_FOUND  if the device configuration data was not
+*		found for a device with the supplied device ID.
+*
+* @note		None.
+*
+*****************************************************************************/
+int XGpio_Initialize(XGpio * InstancePtr, u16 DeviceId)
+{
+	XGpio_Config *ConfigPtr;
+
+	/*
+	 * Assert arguments
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	/*
+	 * Lookup configuration data in the device configuration table.
+	 * Use this configuration info down below when initializing this
+	 * driver.
+	 */
+	ConfigPtr = XGpio_LookupConfig(DeviceId);
+	if (ConfigPtr == (XGpio_Config *) NULL) {
+		InstancePtr->IsReady = 0;
+		return (XST_DEVICE_NOT_FOUND);
+	}
+
+	return XGpio_CfgInitialize(InstancePtr, ConfigPtr,
+				   ConfigPtr->BaseAddress);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/gpiops_v3_3/src/Makefile b/src/Xilinx/libsrc/gpiops_v3_3/src/Makefile
new file mode 100644
index 0000000..8601ce4
--- /dev/null
+++ b/src/Xilinx/libsrc/gpiops_v3_3/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xgpiops_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling gpiops"
+
+xgpiops_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xgpiops_includes
+
+xgpiops_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops.c b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops.c
new file mode 100644
index 0000000..7b6fe2e
--- /dev/null
+++ b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops.c
@@ -0,0 +1,628 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpiops.c
+* @addtogroup gpiops_v3_3
+* @{
+*
+* The XGpioPs driver. Functions in this file are the minimum required functions
+* for this driver. See xgpiops.h for a detailed description of the driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sv   01/15/10 First Release
+* 1.01a sv   04/15/12 Removed the APIs XGpioPs_SetMode, XGpioPs_SetModePin
+*                     XGpioPs_GetMode, XGpioPs_GetModePin as they are not
+*		      relevant to Zynq device. The interrupts are disabled
+*		      for output pins on all banks during initialization.
+* 2.1   hk   04/29/14 Use Input data register DATA_RO for read. CR# 771667.
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn  04/13/15 Add support for Zynq Ultrascale+ MP. CR# 856980.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xgpiops.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+
+/************************** Function Prototypes ******************************/
+
+extern void StubHandler(void *CallBackRef, u32 Bank, u32 Status);
+
+/*****************************************************************************/
+/*
+*
+* This function initializes a XGpioPs instance/driver.
+* All members of the XGpioPs instance structure are initialized and
+* StubHandlers are assigned to the Bank Status Handlers.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	ConfigPtr points to the XGpioPs device configuration structure.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. If the address translation is not used then the
+*		physical address should be passed.
+*		Unexpected errors may occur if the address mapping is changed
+*		after this function is invoked.
+*
+* @return	XST_SUCCESS always.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XGpioPs_CfgInitialize(XGpioPs *InstancePtr, XGpioPs_Config *ConfigPtr,
+				u32 EffectiveAddr)
+{
+	s32 Status = XST_SUCCESS;
+	u8 i;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+	Xil_AssertNonvoid(EffectiveAddr != (u32)0);
+	/*
+	 * Set some default values for instance data, don't indicate the device
+	 * is ready to use until everything has been initialized successfully.
+	 */
+	InstancePtr->IsReady = 0U;
+	InstancePtr->GpioConfig.BaseAddr = EffectiveAddr;
+	InstancePtr->GpioConfig.DeviceId = ConfigPtr->DeviceId;
+	InstancePtr->Handler = StubHandler;
+	InstancePtr->Platform = XGetPlatform_Info();
+
+	/* Initialize the Bank data based on platform */
+	if (InstancePtr->Platform == XPLAT_ZYNQ_ULTRA_MP) {
+		/*
+		 *	Max pins in the ZynqMP GPIO device
+		 *	0 - 25,  Bank 0
+		 *	26 - 51, Bank 1
+		 *	52 - 77, Bank 2
+		 *	78 - 109, Bank 3
+		 *	110 - 141, Bank 4
+		 *	142 - 173, Bank 5
+		 */
+		InstancePtr->MaxPinNum = (u32)174;
+		InstancePtr->MaxBanks = (u8)6;
+	} else {
+		/*
+		 *	Max pins in the GPIO device
+		 *	0 - 31,  Bank 0
+		 *	32 - 53, Bank 1
+		 *	54 - 85, Bank 2
+		 *	86 - 117, Bank 3
+		 */
+		InstancePtr->MaxPinNum = (u32)118;
+		InstancePtr->MaxBanks = (u8)4;
+	}
+
+	/*
+	 * By default, interrupts are not masked in GPIO. Disable
+	 * interrupts for all pins in all the 4 banks.
+	 */
+	for (i=0;iMaxBanks;i++) {
+		XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+					  ((u32)(i) * XGPIOPS_REG_MASK_OFFSET) +
+					  XGPIOPS_INTDIS_OFFSET, 0xFFFFFFFFU);
+	}
+
+	/* Indicate the component is now ready to use. */
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* Read the Data register of the specified GPIO bank.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+*
+* @return	Current value of the Data register.
+*
+* @note		This function is used for reading the state of all the GPIO pins
+*		of specified bank.
+*
+*****************************************************************************/
+u32 XGpioPs_Read(XGpioPs *InstancePtr, u8 Bank)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Bank < InstancePtr->MaxBanks);
+
+	return XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				 ((u32)(Bank) * XGPIOPS_DATA_BANK_OFFSET) +
+				 XGPIOPS_DATA_RO_OFFSET);
+}
+
+/****************************************************************************/
+/**
+*
+* Read Data from the specified pin.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number for which the data has to be read.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+*		See xgpiops.h for the mapping of the pin numbers in the banks.
+*
+* @return	Current value of the Pin (0 or 1).
+*
+* @note		This function is used for reading the state of the specified
+*		GPIO pin.
+*
+*****************************************************************************/
+u32 XGpioPs_ReadPin(XGpioPs *InstancePtr, u32 Pin)
+{
+	u8 Bank;
+	u8 PinNumber;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Pin < InstancePtr->MaxPinNum);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	return (XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				 ((u32)(Bank) * XGPIOPS_DATA_BANK_OFFSET) +
+				 XGPIOPS_DATA_RO_OFFSET) >> (u32)PinNumber) & (u32)1;
+
+}
+
+/****************************************************************************/
+/**
+*
+* Write to the Data register of the specified GPIO bank.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+* @param	Data is the value to be written to the Data register.
+*
+* @return	None.
+*
+* @note		This function is used for writing to all the GPIO pins of
+*		the bank. The previous state of the pins is not maintained.
+*
+*****************************************************************************/
+void XGpioPs_Write(XGpioPs *InstancePtr, u8 Bank, u32 Data)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Bank < InstancePtr->MaxBanks);
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_DATA_BANK_OFFSET) +
+			  XGPIOPS_DATA_OFFSET, Data);
+}
+
+/****************************************************************************/
+/**
+*
+* Write data to the specified pin.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number to which the Data is to be written.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+* @param	Data is the data to be written to the specified pin (0 or 1).
+*
+* @return	None.
+*
+* @note		This function does a masked write to the specified pin of
+*		the specified GPIO bank. The previous state of other pins
+*		is maintained.
+*
+*****************************************************************************/
+void XGpioPs_WritePin(XGpioPs *InstancePtr, u32 Pin, u32 Data)
+{
+	u32 RegOffset;
+	u32 Value;
+	u8 Bank;
+	u8 PinNumber;
+	u32 DataVar = Data;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Pin < InstancePtr->MaxPinNum);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	if (PinNumber > 15U) {
+		/* There are only 16 data bits in bit maskable register. */
+		PinNumber -= (u8)16;
+		RegOffset = XGPIOPS_DATA_MSW_OFFSET;
+	} else {
+		RegOffset = XGPIOPS_DATA_LSW_OFFSET;
+	}
+
+	/*
+	 * Get the 32 bit value to be written to the Mask/Data register where
+	 * the upper 16 bits is the mask and lower 16 bits is the data.
+	 */
+	DataVar &= (u32)0x01;
+	Value = ~((u32)1 << (PinNumber + 16U)) & ((DataVar << PinNumber) | 0xFFFF0000U);
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_DATA_MASK_OFFSET) +
+			  RegOffset, Value);
+}
+
+
+
+/****************************************************************************/
+/**
+*
+* Set the Direction of the pins of the specified GPIO Bank.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+* @param	Direction is the 32 bit mask of the Pin direction to be set for
+*		all the pins in the Bank. Bits with 0 are set to Input mode,
+*		bits with 1 are	set to Output Mode.
+*
+* @return	None.
+*
+* @note		This function is used for setting the direction of all the pins
+*		in the specified bank. The previous state of the pins is
+*		not maintained.
+*
+*****************************************************************************/
+void XGpioPs_SetDirection(XGpioPs *InstancePtr, u8 Bank, u32 Direction)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Bank < InstancePtr->MaxBanks);
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_DIRM_OFFSET, Direction);
+}
+
+/****************************************************************************/
+/**
+*
+* Set the Direction of the specified pin.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number to which the Data is to be written.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+* @param	Direction is the direction to be set for the specified pin.
+*		Valid values are 0 for Input Direction, 1 for Output Direction.
+*
+* @return	None.
+*
+*****************************************************************************/
+void XGpioPs_SetDirectionPin(XGpioPs *InstancePtr, u32 Pin, u32 Direction)
+{
+	u8 Bank;
+	u8 PinNumber;
+	u32 DirModeReg;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Pin < InstancePtr->MaxPinNum);
+	Xil_AssertVoid(Direction <= (u32)1);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	DirModeReg = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				      ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				      XGPIOPS_DIRM_OFFSET);
+
+	if (Direction!=(u32)0) { /*  Output Direction */
+		DirModeReg |= ((u32)1 << (u32)PinNumber);
+	} else { /* Input Direction */
+		DirModeReg &= ~ ((u32)1 << (u32)PinNumber);
+	}
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			 ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			 XGPIOPS_DIRM_OFFSET, DirModeReg);
+}
+
+/****************************************************************************/
+/**
+*
+* Get the Direction of the pins of the specified GPIO Bank.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+*
+* return	Returns a 32 bit mask of the Direction register. Bits with 0 are
+*		in Input mode, bits with 1 are in Output Mode.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XGpioPs_GetDirection(XGpioPs *InstancePtr, u8 Bank)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Bank < InstancePtr->MaxBanks);
+
+	return XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				XGPIOPS_DIRM_OFFSET);
+}
+
+/****************************************************************************/
+/**
+*
+* Get the Direction of the specified pin.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number for which the Direction is to be
+*		retrieved.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+*
+* @return	Direction of the specified pin.
+*		- 0 for Input Direction
+*		- 1 for Output Direction
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XGpioPs_GetDirectionPin(XGpioPs *InstancePtr, u32 Pin)
+{
+	u8 Bank;
+	u8 PinNumber;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Pin < InstancePtr->MaxPinNum);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	return (XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				 ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				 XGPIOPS_DIRM_OFFSET) >> (u32)PinNumber) & (u32)1;
+}
+
+/****************************************************************************/
+/**
+*
+* Set the Output Enable of the pins of the specified GPIO Bank.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+* @param	OpEnable is the 32 bit mask of the Output Enables to be set for
+*		all the pins in the Bank. The Output Enable of bits with 0 are
+*		disabled, the Output Enable of bits with 1 are enabled.
+*
+* @return	None.
+*
+* @note		This function is used for setting the Output Enables of all the
+*		pins in the specified bank. The previous state of the Output
+*		Enables is not maintained.
+*
+*****************************************************************************/
+void XGpioPs_SetOutputEnable(XGpioPs *InstancePtr, u8 Bank, u32 OpEnable)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Bank < InstancePtr->MaxBanks);
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_OUTEN_OFFSET, OpEnable);
+}
+
+/****************************************************************************/
+/**
+*
+* Set the Output Enable of the specified pin.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number to which the Data is to be written.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+* @param	OpEnable specifies whether the Output Enable for the specified
+*		pin should be enabled.
+*		Valid values are 0 for Disabling Output Enable,
+*		1 for Enabling Output Enable.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpioPs_SetOutputEnablePin(XGpioPs *InstancePtr, u32 Pin, u32 OpEnable)
+{
+	u8 Bank;
+	u8 PinNumber;
+	u32 OpEnableReg;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Pin < InstancePtr->MaxPinNum);
+	Xil_AssertVoid(OpEnable <= (u32)1);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	OpEnableReg = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				       ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				       XGPIOPS_OUTEN_OFFSET);
+
+	if (OpEnable != (u32)0) { /*  Enable Output Enable */
+		OpEnableReg |= ((u32)1 << (u32)PinNumber);
+	} else { /* Disable Output Enable */
+		OpEnableReg &= ~ ((u32)1 << (u32)PinNumber);
+	}
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_OUTEN_OFFSET, OpEnableReg);
+}
+/****************************************************************************/
+/**
+*
+* Get the Output Enable status of the pins of the specified GPIO Bank.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+*
+* return	Returns a a 32 bit mask of the Output Enable register.
+*		Bits with 0 are in Disabled state, bits with 1 are in
+*		Enabled State.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XGpioPs_GetOutputEnable(XGpioPs *InstancePtr, u8 Bank)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Bank < InstancePtr->MaxBanks);
+
+	return XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				XGPIOPS_OUTEN_OFFSET);
+}
+
+/****************************************************************************/
+/**
+*
+* Get the Output Enable status of the specified pin.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number for which the Output Enable status is to
+*		be retrieved.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+*
+* @return	Output Enable of the specified pin.
+*		- 0 if Output Enable is disabled for this pin
+*		- 1 if Output Enable is enabled for this pin
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XGpioPs_GetOutputEnablePin(XGpioPs *InstancePtr, u32 Pin)
+{
+	u8 Bank;
+	u8 PinNumber;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Pin < InstancePtr->MaxPinNum);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	return (XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				 ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				 XGPIOPS_OUTEN_OFFSET) >> (u32)PinNumber) & (u32)1;
+}
+
+/****************************************************************************/
+/*
+*
+* Get the Bank number and the Pin number in the Bank, for the given PinNumber
+* in the GPIO device.
+*
+* @param	PinNumber is the Pin number in the GPIO device.
+* @param	BankNumber returns the Bank in which this GPIO pin is present.
+*		Valid values are 0 to XGPIOPS_MAX_BANKS - 1.
+* @param	PinNumberInBank returns the Pin Number within the Bank.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpioPs_GetBankPin(u8 PinNumber, u8 *BankNumber, u8 *PinNumberInBank)
+{
+	u32 XGpioPsPinTable[6] = {0};
+	u32 Platform = XGetPlatform_Info();
+
+	if (Platform == XPLAT_ZYNQ_ULTRA_MP) {
+		/*
+		 * This structure defines the mapping of the pin numbers to the banks when
+		 * the driver APIs are used for working on the individual pins.
+		 */
+
+		XGpioPsPinTable[0] = (u32)25; /* 0 - 25, Bank 0 */
+		XGpioPsPinTable[1] = (u32)51; /* 26 - 51, Bank 1 */
+		XGpioPsPinTable[2] = (u32)77; /* 52 - 77, Bank 2 */
+		XGpioPsPinTable[3] = (u32)109; /* 78 - 109, Bank 3 */
+		XGpioPsPinTable[4] = (u32)141; /* 110 - 141, Bank 4 */
+		XGpioPsPinTable[5] = (u32)173; /* 142 - 173 Bank 5 */
+
+		*BankNumber = 0U;
+		while (*BankNumber < 6U) {
+			if (PinNumber <= XGpioPsPinTable[*BankNumber]) {
+				break;
+			}
+			(*BankNumber)++;
+		}
+	} else {
+		XGpioPsPinTable[0] = (u32)31; /* 0 - 31, Bank 0 */
+		XGpioPsPinTable[1] = (u32)53; /* 32 - 53, Bank 1 */
+		XGpioPsPinTable[2] = (u32)85; /* 54 - 85, Bank 2 */
+		XGpioPsPinTable[3] = (u32)117; /* 86 - 117 Bank 3 */
+
+		*BankNumber = 0U;
+		while (*BankNumber < 4U) {
+			if (PinNumber <= XGpioPsPinTable[*BankNumber]) {
+				break;
+			}
+			(*BankNumber)++;
+		}
+	}
+	if (*BankNumber == (u8)0) {
+		*PinNumberInBank = PinNumber;
+	} else {
+		*PinNumberInBank = (u8)((u32)PinNumber %
+					(XGpioPsPinTable[*BankNumber - (u8)1] + (u32)1));
+	}
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops.h b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops.h
new file mode 100644
index 0000000..fda562d
--- /dev/null
+++ b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops.h
@@ -0,0 +1,277 @@
+
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpiops.h
+* @addtogroup gpiops_v3_3
+* @{
+* @details
+*
+* The Xilinx PS GPIO driver. This driver supports the Xilinx PS GPIO
+* Controller.
+*
+* The GPIO Controller supports the following features:
+*	- 4 banks
+*	- Masked writes (There are no masked reads)
+*	- Bypass mode
+*	- Configurable Interrupts (Level/Edge)
+*
+* This driver is intended to be RTOS and processor independent. Any needs for
+* dynamic memory management, threads or thread mutual exclusion, virtual
+* memory, or cache control must be satisfied by the layer above this driver.
+
+* This driver supports all the features listed above, if applicable.
+*
+* Driver Description
+*
+* The device driver enables higher layer software (e.g., an application) to
+* communicate to the GPIO.
+*
+* Interrupts
+*
+* The driver provides interrupt management functions and an interrupt handler.
+* Users of this driver need to provide callback functions. An interrupt handler
+* example is available with the driver.
+*
+* Threads
+*
+* This driver is not thread safe. Any needs for threads or thread mutual
+* exclusion must be satisfied by the layer above this driver.
+*
+* Asserts
+*
+* Asserts are used within all Xilinx drivers to enforce constraints on argument
+* values. Asserts can be turned off on a system-wide basis by defining, at
+* compile time, the NDEBUG identifier. By default, asserts are turned on and it
+* is recommended that users leave asserts on during development.
+*
+* Building the driver
+*
+* The XGpioPs driver is composed of several source files. This allows the user
+* to build and link only those parts of the driver that are necessary.
+* 


+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sv   01/15/10 First Release
+* 1.01a sv   04/15/12 Removed the APIs XGpioPs_SetMode, XGpioPs_SetModePin
+*                     XGpioPs_GetMode, XGpioPs_GetModePin as they are not
+*		      relevant to Zynq device.The interrupts are disabled
+*		      for output pins on all banks during initialization.
+* 1.02a hk   08/22/13 Added low level reset API
+* 2.1   hk   04/29/14 Use Input data register DATA_RO for read. CR# 771667.
+* 2.2	sk	 10/13/14 Used Pin number in Bank instead of pin number
+* 					  passed to APIs. CR# 822636
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn  04/13/15 Add support for Zynq Ultrascale+ MP. CR# 856980.
+*       ms   03/17/17 Added readme.txt file in examples folder for doxygen
+*                     generation.
+*       ms   04/05/17 Added tabspace for return statements in functions of
+*                     gpiops examples for proper documentation while
+*                     generating doxygen.
+* 3.3   ms   04/17/17 Added notes about gpio input and output pin description
+*                     for zcu102 and zc702 boards in polled and interrupt
+*                     example, configured Interrupt pin to input pin for
+*                     proper functioning of interrupt example.
+* 

+*
+******************************************************************************/
+#ifndef XGPIOPS_H		/* prevent circular inclusions */
+#define XGPIOPS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xgpiops_hw.h"
+#include "xplatform_info.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Interrupt types
+ *  @{
+ * The following constants define the interrupt types that can be set for each
+ * GPIO pin.
+ */
+#define XGPIOPS_IRQ_TYPE_EDGE_RISING	0x00U  /**< Interrupt on Rising edge */
+#define XGPIOPS_IRQ_TYPE_EDGE_FALLING	0x01U  /**< Interrupt Falling edge */
+#define XGPIOPS_IRQ_TYPE_EDGE_BOTH	0x02U  /**< Interrupt on both edges */
+#define XGPIOPS_IRQ_TYPE_LEVEL_HIGH	0x03U  /**< Interrupt on high level */
+#define XGPIOPS_IRQ_TYPE_LEVEL_LOW	0x04U  /**< Interrupt on low level */
+/*@}*/
+
+#define XGPIOPS_BANK_MAX_PINS		(u32)32 /**< Max pins in a GPIO bank */
+#define XGPIOPS_BANK0			0x00U  /**< GPIO Bank 0 */
+#define XGPIOPS_BANK1			0x01U  /**< GPIO Bank 1 */
+#define XGPIOPS_BANK2			0x02U  /**< GPIO Bank 2 */
+#define XGPIOPS_BANK3			0x03U  /**< GPIO Bank 3 */
+
+#ifdef XPAR_PSU_GPIO_0_BASEADDR
+#define XGPIOPS_BANK4			0x04U  /**< GPIO Bank 4 */
+#define XGPIOPS_BANK5			0x05U  /**< GPIO Bank 5 */
+#endif
+
+#define XGPIOPS_MAX_BANKS_ZYNQMP		0x06U  /**< Max banks in a
+										*	Zynq Ultrascale+ MP GPIO device
+										*/
+#define XGPIOPS_MAX_BANKS		0x04U  /**< Max banks in a Zynq GPIO device */
+
+#define XGPIOPS_DEVICE_MAX_PIN_NUM_ZYNQMP	(u32)174 /**< Max pins in the
+						  *	Zynq Ultrascale+ MP GPIO device
+					      * 0 - 25,  Bank 0
+					      * 26 - 51, Bank 1
+					      *	52 - 77, Bank 2
+					      *	78 - 109, Bank 3
+					      *	110 - 141, Bank 4
+					      *	142 - 173, Bank 5
+					      */
+#define XGPIOPS_DEVICE_MAX_PIN_NUM	(u32)118 /**< Max pins in the Zynq GPIO device
+					      * 0 - 31,  Bank 0
+					      * 32 - 53, Bank 1
+					      *	54 - 85, Bank 2
+					      *	86 - 117, Bank 3
+					      */
+
+/**************************** Type Definitions *******************************/
+
+/****************************************************************************/
+/**
+ * This handler data type allows the user to define a callback function to
+ * handle the interrupts for the GPIO device. The application using this
+ * driver is expected to define a handler of this type, to support interrupt
+ * driven mode. The handler executes in an interrupt context such that minimal
+ * processing should be performed.
+ *
+ * @param	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the callback functions for a GPIO bank. It is
+ *		passed back to the upper layer when the callback is invoked. Its
+ *		type is not important to the driver component, so it is a void
+ *		pointer.
+ * @param	Bank is the bank for which the interrupt status has changed.
+ * @param	Status is the Interrupt status of the GPIO bank.
+ *
+ *****************************************************************************/
+typedef void (*XGpioPs_Handler) (void *CallBackRef, u32 Bank, u32 Status);
+
+/**
+ * This typedef contains configuration information for a device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID of device */
+	u32 BaseAddr;		/**< Register base address */
+} XGpioPs_Config;
+
+/**
+ * The XGpioPs driver instance data. The user is required to allocate a
+ * variable of this type for the GPIO device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XGpioPs_Config GpioConfig;	/**< Device configuration */
+	u32 IsReady;			/**< Device is initialized and ready */
+	XGpioPs_Handler Handler;	/**< Status handlers for all banks */
+	void *CallBackRef; 		/**< Callback ref for bank handlers */
+	u32 Platform;			/**< Platform data */
+	u32 MaxPinNum;			/**< Max pins in the GPIO device */
+	u8 MaxBanks;			/**< Max banks in a GPIO device */
+} XGpioPs;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/* Functions in xgpiops.c */
+s32 XGpioPs_CfgInitialize(XGpioPs *InstancePtr, XGpioPs_Config *ConfigPtr,
+			   u32 EffectiveAddr);
+
+/* Bank APIs in xgpiops.c */
+u32 XGpioPs_Read(XGpioPs *InstancePtr, u8 Bank);
+void XGpioPs_Write(XGpioPs *InstancePtr, u8 Bank, u32 Data);
+void XGpioPs_SetDirection(XGpioPs *InstancePtr, u8 Bank, u32 Direction);
+u32 XGpioPs_GetDirection(XGpioPs *InstancePtr, u8 Bank);
+void XGpioPs_SetOutputEnable(XGpioPs *InstancePtr, u8 Bank, u32 OpEnable);
+u32 XGpioPs_GetOutputEnable(XGpioPs *InstancePtr, u8 Bank);
+void XGpioPs_GetBankPin(u8 PinNumber,	u8 *BankNumber, u8 *PinNumberInBank);
+
+/* Pin APIs in xgpiops.c */
+u32 XGpioPs_ReadPin(XGpioPs *InstancePtr, u32 Pin);
+void XGpioPs_WritePin(XGpioPs *InstancePtr, u32 Pin, u32 Data);
+void XGpioPs_SetDirectionPin(XGpioPs *InstancePtr, u32 Pin, u32 Direction);
+u32 XGpioPs_GetDirectionPin(XGpioPs *InstancePtr, u32 Pin);
+void XGpioPs_SetOutputEnablePin(XGpioPs *InstancePtr, u32 Pin, u32 OpEnable);
+u32 XGpioPs_GetOutputEnablePin(XGpioPs *InstancePtr, u32 Pin);
+
+/* Diagnostic functions in xgpiops_selftest.c */
+s32 XGpioPs_SelfTest(XGpioPs *InstancePtr);
+
+/* Functions in xgpiops_intr.c */
+/* Bank APIs in xgpiops_intr.c */
+void XGpioPs_IntrEnable(XGpioPs *InstancePtr, u8 Bank, u32 Mask);
+void XGpioPs_IntrDisable(XGpioPs *InstancePtr, u8 Bank, u32 Mask);
+u32 XGpioPs_IntrGetEnabled(XGpioPs *InstancePtr, u8 Bank);
+u32 XGpioPs_IntrGetStatus(XGpioPs *InstancePtr, u8 Bank);
+void XGpioPs_IntrClear(XGpioPs *InstancePtr, u8 Bank, u32 Mask);
+void XGpioPs_SetIntrType(XGpioPs *InstancePtr, u8 Bank, u32 IntrType,
+			  u32 IntrPolarity, u32 IntrOnAny);
+void XGpioPs_GetIntrType(XGpioPs *InstancePtr, u8 Bank, u32 *IntrType,
+			  u32 *IntrPolarity, u32 *IntrOnAny);
+void XGpioPs_SetCallbackHandler(XGpioPs *InstancePtr, void *CallBackRef,
+			     XGpioPs_Handler FuncPointer);
+void XGpioPs_IntrHandler(XGpioPs *InstancePtr);
+
+/* Pin APIs in xgpiops_intr.c */
+void XGpioPs_SetIntrTypePin(XGpioPs *InstancePtr, u32 Pin, u8 IrqType);
+u8 XGpioPs_GetIntrTypePin(XGpioPs *InstancePtr, u32 Pin);
+
+void XGpioPs_IntrEnablePin(XGpioPs *InstancePtr, u32 Pin);
+void XGpioPs_IntrDisablePin(XGpioPs *InstancePtr, u32 Pin);
+u32 XGpioPs_IntrGetEnabledPin(XGpioPs *InstancePtr, u32 Pin);
+u32 XGpioPs_IntrGetStatusPin(XGpioPs *InstancePtr, u32 Pin);
+void XGpioPs_IntrClearPin(XGpioPs *InstancePtr, u32 Pin);
+
+/* Functions in xgpiops_sinit.c */
+XGpioPs_Config *XGpioPs_LookupConfig(u16 DeviceId);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_hw.c b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_hw.c
new file mode 100644
index 0000000..8961c42
--- /dev/null
+++ b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_hw.c
@@ -0,0 +1,169 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpiops_hw.c
+* @addtogroup gpiops_v3_3
+* @{
+*
+* This file contains low level GPIO functions.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.02a hk   08/22/13 First Release
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn  04/13/15 Add support for Zynq Ultrascale+ MP. CR# 856980.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xgpiops_hw.h"
+#include "xgpiops.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+
+/*****************************************************************************/
+/*
+*
+* This function resets the GPIO module by writing reset values to
+* all registers
+*
+* @param	Base address of GPIO module
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void XGpioPs_ResetHw(u32 BaseAddress)
+{
+	u32 BankCount;
+	u32 Platform,MaxBanks;
+
+	Platform = XGetPlatform_Info();
+	if (Platform == XPLAT_ZYNQ_ULTRA_MP) {
+		MaxBanks = (u32)6;
+	} else {
+		MaxBanks = (u32)4;
+	}
+	/* Write reset values to all mask data registers */
+	for(BankCount = 2U; BankCount < (u32)MaxBanks; BankCount++) {
+
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_DATA_MASK_OFFSET) +
+				 XGPIOPS_DATA_LSW_OFFSET), 0x0U);
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_DATA_MASK_OFFSET) +
+				 XGPIOPS_DATA_MSW_OFFSET), 0x0U);
+	}
+	/* Write reset values to all output data registers */
+	for(BankCount = 2U; BankCount < (u32)MaxBanks; BankCount++) {
+
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_DATA_BANK_OFFSET) +
+				 XGPIOPS_DATA_OFFSET), 0x0U);
+	}
+
+	/* Reset all registers of all GPIO banks */
+	for(BankCount = 0U; BankCount < (u32)MaxBanks; BankCount++) {
+
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_REG_MASK_OFFSET) +
+				 XGPIOPS_DIRM_OFFSET), 0x0U);
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_REG_MASK_OFFSET) +
+				 XGPIOPS_OUTEN_OFFSET), 0x0U);
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_REG_MASK_OFFSET) +
+				 XGPIOPS_INTMASK_OFFSET), 0x0U);
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_REG_MASK_OFFSET) +
+				 XGPIOPS_INTEN_OFFSET), 0x0U);
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_REG_MASK_OFFSET) +
+				 XGPIOPS_INTDIS_OFFSET), 0x0U);
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_REG_MASK_OFFSET) +
+				 XGPIOPS_INTSTS_OFFSET), 0x0U);
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_REG_MASK_OFFSET) +
+				 XGPIOPS_INTPOL_OFFSET), 0x0U);
+		XGpioPs_WriteReg(BaseAddress,
+				((BankCount * XGPIOPS_REG_MASK_OFFSET) +
+				 XGPIOPS_INTANY_OFFSET), 0x0U);
+	}
+
+	/* Bank 0 Int type */
+	XGpioPs_WriteReg(BaseAddress, XGPIOPS_INTTYPE_OFFSET,
+			XGPIOPS_INTTYPE_BANK0_RESET);
+	/* Bank 1 Int type */
+	XGpioPs_WriteReg(BaseAddress,
+			((u32)XGPIOPS_REG_MASK_OFFSET + (u32)XGPIOPS_INTTYPE_OFFSET),
+			XGPIOPS_INTTYPE_BANK1_RESET);
+	/* Bank 2 Int type */
+	XGpioPs_WriteReg(BaseAddress,
+			(((u32)2 * XGPIOPS_REG_MASK_OFFSET) + XGPIOPS_INTTYPE_OFFSET),
+			XGPIOPS_INTTYPE_BANK2_RESET);
+	/* Bank 3 Int type */
+	XGpioPs_WriteReg(BaseAddress,
+			(((u32)3 * XGPIOPS_REG_MASK_OFFSET) + XGPIOPS_INTTYPE_OFFSET),
+			XGPIOPS_INTTYPE_BANK3_RESET);
+
+	if (Platform == XPLAT_ZYNQ_ULTRA_MP) {
+		/* Bank 4 Int type */
+		XGpioPs_WriteReg(BaseAddress,
+				(((u32)4 * XGPIOPS_REG_MASK_OFFSET) + XGPIOPS_INTTYPE_OFFSET),
+				XGPIOPS_INTTYPE_BANK4_RESET);
+		/* Bank 5 Int type */
+		XGpioPs_WriteReg(BaseAddress,
+				(((u32)5 * XGPIOPS_REG_MASK_OFFSET) + XGPIOPS_INTTYPE_OFFSET),
+				XGPIOPS_INTTYPE_BANK5_RESET);
+	}
+
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_hw.h b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_hw.h
new file mode 100644
index 0000000..ff01906
--- /dev/null
+++ b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_hw.h
@@ -0,0 +1,164 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpiops_hw.h
+* @addtogroup gpiops_v3_3
+* @{
+*
+* This header file contains the identifiers and basic driver functions (or
+* macros) that can be used to access the device. Other driver functions
+* are defined in xgpiops.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------
+* 1.00a sv   01/15/10 First Release
+* 1.02a hk   08/22/13 Added low level reset API function prototype and
+*                     related constant definitions
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn  04/13/15 Corrected reset values of banks.
+* 

+*
+******************************************************************************/
+#ifndef XGPIOPS_HW_H		/* prevent circular inclusions */
+#define XGPIOPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register offsets for the GPIO. Each register is 32 bits.
+ *  @{
+ */
+#define XGPIOPS_DATA_LSW_OFFSET  0x00000000U  /* Mask and Data Register LSW, WO */
+#define XGPIOPS_DATA_MSW_OFFSET  0x00000004U  /* Mask and Data Register MSW, WO */
+#define XGPIOPS_DATA_OFFSET	 0x00000040U  /* Data Register, RW */
+#define XGPIOPS_DATA_RO_OFFSET	 0x00000060U  /* Data Register - Input, RO */
+#define XGPIOPS_DIRM_OFFSET	 0x00000204U  /* Direction Mode Register, RW */
+#define XGPIOPS_OUTEN_OFFSET	 0x00000208U  /* Output Enable Register, RW */
+#define XGPIOPS_INTMASK_OFFSET	 0x0000020CU  /* Interrupt Mask Register, RO */
+#define XGPIOPS_INTEN_OFFSET	 0x00000210U  /* Interrupt Enable Register, WO */
+#define XGPIOPS_INTDIS_OFFSET	 0x00000214U  /* Interrupt Disable Register, WO*/
+#define XGPIOPS_INTSTS_OFFSET	 0x00000218U  /* Interrupt Status Register, RO */
+#define XGPIOPS_INTTYPE_OFFSET	 0x0000021CU  /* Interrupt Type Register, RW */
+#define XGPIOPS_INTPOL_OFFSET	 0x00000220U  /* Interrupt Polarity Register, RW */
+#define XGPIOPS_INTANY_OFFSET	 0x00000224U  /* Interrupt On Any Register, RW */
+/* @} */
+
+/** @name Register offsets for each Bank.
+ *  @{
+ */
+#define XGPIOPS_DATA_MASK_OFFSET 0x00000008U  /* Data/Mask Registers offset */
+#define XGPIOPS_DATA_BANK_OFFSET 0x00000004U  /* Data Registers offset */
+#define XGPIOPS_REG_MASK_OFFSET  0x00000040U  /* Registers offset */
+/* @} */
+
+/* For backwards compatibility */
+#define XGPIOPS_BYPM_MASK_OFFSET	(u32)0x40
+
+/** @name Interrupt type reset values for each bank
+ *  @{
+ */
+#ifdef XPAR_PSU_GPIO_0_BASEADDR
+#define XGPIOPS_INTTYPE_BANK0_RESET  0x03FFFFFFU  /* Resets specific to Zynq Ultrascale+ MP */
+#define XGPIOPS_INTTYPE_BANK1_RESET  0x03FFFFFFU
+#define XGPIOPS_INTTYPE_BANK2_RESET  0x03FFFFFFU
+#else
+#define XGPIOPS_INTTYPE_BANK0_RESET  0xFFFFFFFFU  /* Resets specific to Zynq */
+#define XGPIOPS_INTTYPE_BANK1_RESET  0x003FFFFFU
+#define XGPIOPS_INTTYPE_BANK2_RESET  0xFFFFFFFFU
+#endif
+
+#define XGPIOPS_INTTYPE_BANK3_RESET  0xFFFFFFFFU  /* Reset common to both platforms */
+#define XGPIOPS_INTTYPE_BANK4_RESET  0xFFFFFFFFU  /* Resets specific to Zynq Ultrascale+ MP */
+#define XGPIOPS_INTTYPE_BANK5_RESET  0xFFFFFFFFU
+/* @} */
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* This macro reads the given register.
+*
+* @param	BaseAddr is the base address of the device.
+* @param	RegOffset is the register offset to be read.
+*
+* @return	The 32-bit value of the register
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XGpioPs_ReadReg(BaseAddr, RegOffset)		\
+		Xil_In32((BaseAddr) + (u32)(RegOffset))
+
+/****************************************************************************/
+/**
+*
+* This macro writes to the given register.
+*
+* @param	BaseAddr is the base address of the device.
+* @param	RegOffset is the offset of the register to be written.
+* @param	Data is the 32-bit value to write to the register.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XGpioPs_WriteReg(BaseAddr, RegOffset, Data)	\
+		Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data))
+
+/************************** Function Prototypes ******************************/
+
+void XGpioPs_ResetHw(u32 BaseAddress);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XGPIOPS_HW_H */
+/** @} */
diff --git a/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_intr.c b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_intr.c
new file mode 100644
index 0000000..a8b0a56
--- /dev/null
+++ b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_intr.c
@@ -0,0 +1,731 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpiops_intr.c
+* @addtogroup gpiops_v3_3
+* @{
+*
+* This file contains functions related to GPIO interrupt handling.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sv   01/18/10 First Release
+* 2.2	sk	 10/13/14 Used Pin number in Bank instead of pin number
+* 					  passed to API's. CR# 822636
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn  04/13/15 Add support for Zynq Ultrascale+ MP. CR# 856980.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xgpiops.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void StubHandler(void *CallBackRef, u32 Bank, u32 Status);
+
+/****************************************************************************/
+/**
+*
+* This function enables the interrupts for the specified pins in the specified
+* bank.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+* @param	Mask is the bit mask of the pins for which interrupts are to
+*		be enabled. Bit positions of 1 will be enabled. Bit positions
+*		of 0 will keep the previous setting.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpioPs_IntrEnable(XGpioPs *InstancePtr, u8 Bank, u32 Mask)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Bank < InstancePtr->MaxBanks);
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTEN_OFFSET, Mask);
+}
+
+/****************************************************************************/
+/**
+*
+* This function enables the interrupt for the specified pin.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number for which the interrupt is to be enabled.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpioPs_IntrEnablePin(XGpioPs *InstancePtr, u32 Pin)
+{
+	u8 Bank;
+	u8 PinNumber;
+	u32 IntrReg = 0U;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Pin < InstancePtr->MaxPinNum);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	IntrReg = ((u32)1 << (u32)PinNumber);
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTEN_OFFSET, IntrReg);
+}
+
+/****************************************************************************/
+/**
+*
+* This function disables the interrupts for the specified pins in the specified
+* bank.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+* @param	Mask is the bit mask of the pins for which interrupts are
+*		to be disabled. Bit positions of 1 will be disabled. Bit
+*		positions of 0 will keep the previous setting.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpioPs_IntrDisable(XGpioPs *InstancePtr, u8 Bank, u32 Mask)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Bank < InstancePtr->MaxBanks);
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTDIS_OFFSET, Mask);
+}
+
+/****************************************************************************/
+/**
+*
+* This function disables the interrupts for the specified pin.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number for which the interrupt is to be disabled.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpioPs_IntrDisablePin(XGpioPs *InstancePtr, u32 Pin)
+{
+	u8 Bank;
+	u8 PinNumber;
+	u32 IntrReg = 0U;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Pin < InstancePtr->MaxPinNum);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	IntrReg =  ((u32)1 << (u32)PinNumber);
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTDIS_OFFSET, IntrReg);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the interrupt enable status for a bank.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+*
+* @return	Enabled interrupt(s) in a 32-bit format. Bit positions with 1
+*		indicate that the interrupt for that pin is enabled, bit
+*		positions with 0 indicate that the interrupt for that pin is
+*		disabled.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XGpioPs_IntrGetEnabled(XGpioPs *InstancePtr, u8 Bank)
+{
+	u32 IntrMask;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Bank < InstancePtr->MaxBanks);
+
+	IntrMask = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				    ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				    XGPIOPS_INTMASK_OFFSET);
+	return (~IntrMask);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns whether interrupts are enabled for the specified pin.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number for which the interrupt enable status
+*		is to be known.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+*
+* @return
+*		- TRUE if the interrupt is enabled.
+*		- FALSE if the interrupt is disabled.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XGpioPs_IntrGetEnabledPin(XGpioPs *InstancePtr, u32 Pin)
+{
+	u8 Bank;
+	u8 PinNumber;
+	u32 IntrReg;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Pin < InstancePtr->MaxPinNum);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	IntrReg  = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				    ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				    XGPIOPS_INTMASK_OFFSET);
+
+	return (((IntrReg & ((u32)1 << PinNumber)) != (u32)0)? FALSE : TRUE);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns interrupt status read from Interrupt Status Register.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+*
+* @return	The value read from Interrupt Status Register.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XGpioPs_IntrGetStatus(XGpioPs *InstancePtr, u8 Bank)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Bank < InstancePtr->MaxBanks);
+
+	return XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				XGPIOPS_INTSTS_OFFSET);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns interrupt enable status of the specified pin.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number for which the interrupt enable status
+*		is to be known.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+*
+* @return
+*		- TRUE if the interrupt has occurred.
+*		- FALSE if the interrupt has not occurred.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XGpioPs_IntrGetStatusPin(XGpioPs *InstancePtr, u32 Pin)
+{
+	u8 Bank;
+	u8 PinNumber;
+	u32 IntrReg;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Pin < InstancePtr->MaxPinNum);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	IntrReg = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				   ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				   XGPIOPS_INTSTS_OFFSET);
+
+	return (((IntrReg & ((u32)1 << PinNumber)) != (u32)0)? TRUE : FALSE);
+}
+
+/****************************************************************************/
+/**
+*
+* This function clears pending interrupt(s) with the provided mask. This
+* function should be called after the software has serviced the interrupts
+* that are pending.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+* @param	Mask is the mask of the interrupts to be cleared. Bit positions
+*		of 1 will be cleared. Bit positions of 0 will not change the
+*		previous interrupt status.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpioPs_IntrClear(XGpioPs *InstancePtr, u8 Bank, u32 Mask)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Bank < InstancePtr->MaxBanks);
+
+	/* Clear the currently pending interrupts. */
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTSTS_OFFSET, Mask);
+}
+
+/****************************************************************************/
+/**
+*
+* This function clears the specified pending interrupt. This function should be
+* called after the software has serviced the interrupts that are pending.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	Pin is the pin number for which the interrupt status is to be
+*		cleared. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpioPs_IntrClearPin(XGpioPs *InstancePtr, u32 Pin)
+{
+	u8 Bank;
+	u8 PinNumber;
+	u32 IntrReg;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Pin < InstancePtr->MaxPinNum);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	/* Clear the specified pending interrupts. */
+	IntrReg = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				   ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				   XGPIOPS_INTSTS_OFFSET);
+
+	IntrReg &= ((u32)1 << PinNumber);
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTSTS_OFFSET, IntrReg);
+}
+
+/****************************************************************************/
+/**
+*
+* This function is used for setting the Interrupt Type, Interrupt Polarity and
+* Interrupt On Any for the specified GPIO Bank pins.
+*
+* @param	InstancePtr is a pointer to an XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+* @param	IntrType is the 32 bit mask of the interrupt type.
+*		0 means Level Sensitive and 1 means Edge Sensitive.
+* @param	IntrPolarity is the 32 bit mask of the interrupt polarity.
+*		0 means Active Low or Falling Edge and 1 means Active High or
+*		Rising Edge.
+* @param	IntrOnAny is the 32 bit mask of the interrupt trigger for
+*		edge triggered interrupts. 0 means trigger on single edge using
+*		the configured interrupt polarity and 1 means  trigger on both
+*		edges.
+*
+* @return	None.
+*
+* @note		This function is used for setting the interrupt related
+*		properties of all the pins in the specified bank. The previous
+*		state of the pins is not maintained.
+*		To change the Interrupt properties of a single GPIO pin, use the
+*		function XGpioPs_SetPinIntrType().
+*
+*****************************************************************************/
+void XGpioPs_SetIntrType(XGpioPs *InstancePtr, u8 Bank, u32 IntrType,
+			  u32 IntrPolarity, u32 IntrOnAny)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Bank < InstancePtr->MaxBanks);
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTTYPE_OFFSET, IntrType);
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTPOL_OFFSET, IntrPolarity);
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTANY_OFFSET, IntrOnAny);
+}
+
+/****************************************************************************/
+/**
+*
+* This function is used for getting the Interrupt Type, Interrupt Polarity and
+* Interrupt On Any for the specified GPIO Bank pins.
+*
+* @param	InstancePtr is a pointer to an XGpioPs instance.
+* @param	Bank is the bank number of the GPIO to operate on.
+*		Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
+* @param	IntrType returns the 32 bit mask of the interrupt type.
+*		0 means Level Sensitive and 1 means Edge Sensitive.
+* @param	IntrPolarity returns the 32 bit mask of the interrupt
+*		polarity. 0 means Active Low or Falling Edge and 1 means
+*		Active High or Rising Edge.
+* @param	IntrOnAny returns the 32 bit mask of the interrupt trigger for
+*		edge triggered interrupts. 0 means trigger on single edge using
+*		the configured interrupt polarity and 1 means trigger on both
+*		edges.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpioPs_GetIntrType(XGpioPs *InstancePtr, u8 Bank, u32 *IntrType,
+			  u32 *IntrPolarity, u32 *IntrOnAny)
+
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Bank < InstancePtr->MaxBanks);
+
+	*IntrType = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				     ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				     XGPIOPS_INTTYPE_OFFSET);
+
+	*IntrPolarity = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+					 ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+					 XGPIOPS_INTPOL_OFFSET);
+
+	*IntrOnAny = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				      ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				      XGPIOPS_INTANY_OFFSET);
+}
+
+/****************************************************************************/
+/**
+*
+* This function is used for setting the IRQ Type of a single GPIO pin.
+*
+* @param	InstancePtr is a pointer to an XGpioPs instance.
+* @param	Pin is the pin number whose IRQ type is to be set.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+* @param	IrqType is the IRQ type for GPIO Pin. Use XGPIOPS_IRQ_TYPE_*
+*		defined in xgpiops.h to specify the IRQ type.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XGpioPs_SetIntrTypePin(XGpioPs *InstancePtr, u32 Pin, u8 IrqType)
+{
+	u32 IntrTypeReg;
+	u32 IntrPolReg;
+	u32 IntrOnAnyReg;
+	u8 Bank;
+	u8 PinNumber;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Pin < InstancePtr->MaxPinNum);
+	Xil_AssertVoid(IrqType <= XGPIOPS_IRQ_TYPE_LEVEL_LOW);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	IntrTypeReg = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				       ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				       XGPIOPS_INTTYPE_OFFSET);
+
+	IntrPolReg = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				      ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				      XGPIOPS_INTPOL_OFFSET);
+
+	IntrOnAnyReg = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+					((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+					XGPIOPS_INTANY_OFFSET);
+
+	switch (IrqType) {
+		case XGPIOPS_IRQ_TYPE_EDGE_RISING:
+			IntrTypeReg |= ((u32)1 << (u32)PinNumber);
+			IntrPolReg |= ((u32)1 << (u32)PinNumber);
+			IntrOnAnyReg &= ~((u32)1 << (u32)PinNumber);
+			break;
+		case XGPIOPS_IRQ_TYPE_EDGE_FALLING:
+			IntrTypeReg |= ((u32)1 << (u32)PinNumber);
+			IntrPolReg &= ~((u32)1 << (u32)PinNumber);
+			IntrOnAnyReg &= ~((u32)1 << (u32)PinNumber);
+			break;
+		case XGPIOPS_IRQ_TYPE_EDGE_BOTH:
+			IntrTypeReg |= ((u32)1 << (u32)PinNumber);
+			IntrOnAnyReg |= ((u32)1 << (u32)PinNumber);
+			break;
+		case XGPIOPS_IRQ_TYPE_LEVEL_HIGH:
+			IntrTypeReg &= ~((u32)1 << (u32)PinNumber);
+			IntrPolReg |= ((u32)1 << (u32)PinNumber);
+			break;
+		case XGPIOPS_IRQ_TYPE_LEVEL_LOW:
+			IntrTypeReg &= ~((u32)1 << (u32)PinNumber);
+			IntrPolReg &= ~((u32)1 << (u32)PinNumber);
+			break;
+		default:
+			/**< Default statement is added for MISRA C compliance. */
+			break;
+	}
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTTYPE_OFFSET, IntrTypeReg);
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTPOL_OFFSET, IntrPolReg);
+
+	XGpioPs_WriteReg(InstancePtr->GpioConfig.BaseAddr,
+			  ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+			  XGPIOPS_INTANY_OFFSET, IntrOnAnyReg);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the IRQ Type of a given GPIO pin.
+*
+* @param	InstancePtr is a pointer to an XGpioPs instance.
+* @param	Pin is the pin number whose IRQ type is to be obtained.
+*		Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
+*
+* @return	None.
+*
+* @note		Use XGPIOPS_IRQ_TYPE_* defined in xgpiops.h for the IRQ type
+*		returned by this function.
+*
+*****************************************************************************/
+u8 XGpioPs_GetIntrTypePin(XGpioPs *InstancePtr, u32 Pin)
+{
+	u32 IntrType;
+	u32 IntrPol;
+	u32 IntrOnAny;
+	u8 Bank;
+	u8 PinNumber;
+	u8 IrqType;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Pin < InstancePtr->MaxPinNum);
+
+	/* Get the Bank number and Pin number within the bank. */
+	XGpioPs_GetBankPin((u8)Pin, &Bank, &PinNumber);
+
+	IntrType = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				    ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				    XGPIOPS_INTTYPE_OFFSET) & ((u32)1 << PinNumber);
+
+	if (IntrType == ((u32)1 << PinNumber)) {
+
+		IntrOnAny = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				     ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				     XGPIOPS_INTANY_OFFSET) & ((u32)1 << PinNumber);
+
+		IntrPol = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				   ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				   XGPIOPS_INTPOL_OFFSET) & ((u32)1 << PinNumber);
+
+
+		if (IntrOnAny == ((u32)1 << PinNumber)) {
+			IrqType = XGPIOPS_IRQ_TYPE_EDGE_BOTH;
+		} else if (IntrPol == ((u32)1 << PinNumber)) {
+			IrqType = XGPIOPS_IRQ_TYPE_EDGE_RISING;
+		} else {
+			IrqType = XGPIOPS_IRQ_TYPE_EDGE_FALLING;
+		}
+	} else {
+
+		IntrPol = XGpioPs_ReadReg(InstancePtr->GpioConfig.BaseAddr,
+				   ((u32)(Bank) * XGPIOPS_REG_MASK_OFFSET) +
+				   XGPIOPS_INTPOL_OFFSET) & ((u32)1 << PinNumber);
+
+		if (IntrPol == ((u32)1 << PinNumber)) {
+			IrqType = XGPIOPS_IRQ_TYPE_LEVEL_HIGH;
+		} else {
+			IrqType = XGPIOPS_IRQ_TYPE_LEVEL_LOW;
+		}
+	}
+
+	return IrqType;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the status callback function. The callback function is
+* called by the  XGpioPs_IntrHandler when an interrupt occurs.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+* @param	CallBackRef is the upper layer callback reference passed back
+*		when the callback function is invoked.
+* @param	FuncPtr is the pointer to the callback function.
+*
+*
+* @return	None.
+*
+* @note		The handler is called within interrupt context, so it should do
+*		its work quickly and queue potentially time-consuming work to a
+*		task-level thread.
+*
+******************************************************************************/
+void XGpioPs_SetCallbackHandler(XGpioPs *InstancePtr, void *CallBackRef,
+				 XGpioPs_Handler FuncPointer)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(FuncPointer != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	InstancePtr->Handler = FuncPointer;
+	InstancePtr->CallBackRef = CallBackRef;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function is the interrupt handler for GPIO interrupts.It checks the
+* interrupt status registers of all the banks to determine the actual bank in
+* which an interrupt has been triggered. It then calls the upper layer callback
+* handler set by the function XGpioPs_SetBankHandler(). The callback is called
+* when an interrupt
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+*
+* @return	None.
+*
+* @note		This function does not save and restore the processor context
+*		such that the user must provide this processing.
+*
+******************************************************************************/
+void XGpioPs_IntrHandler(XGpioPs *InstancePtr)
+{
+	u8 Bank;
+	u32 IntrStatus;
+	u32 IntrEnabled;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	for (Bank = 0U; Bank < InstancePtr->MaxBanks; Bank++) {
+		IntrStatus = XGpioPs_IntrGetStatus(InstancePtr, Bank);
+		if (IntrStatus != (u32)0) {
+			IntrEnabled = XGpioPs_IntrGetEnabled(InstancePtr,
+							      Bank);
+			XGpioPs_IntrClear((XGpioPs *)InstancePtr, Bank,
+							(IntrStatus & IntrEnabled));
+			InstancePtr->Handler(InstancePtr->
+					     CallBackRef, Bank,
+					     (IntrStatus & IntrEnabled));
+		}
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This is a stub for the status callback. The stub is here in case the upper
+* layers do not set the handler.
+*
+* @param	CallBackRef is a pointer to the upper layer callback reference
+* @param	Bank is the GPIO Bank in which an interrupt occurred.
+* @param	Status is the Interrupt status of the GPIO bank.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void StubHandler(void *CallBackRef, u32 Bank, u32 Status)
+{
+	(void) CallBackRef;
+	(void) Bank;
+	(void) Status;
+
+	Xil_AssertVoidAlways();
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_selftest.c b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_selftest.c
new file mode 100644
index 0000000..378524c
--- /dev/null
+++ b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_selftest.c
@@ -0,0 +1,133 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpiops_selftest.c
+* @addtogroup gpiops_v3_3
+* @{
+*
+* This file contains a diagnostic self-test function for the XGpioPs driver.
+*
+* Read xgpiops.h file for more information.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sv   01/18/10 First Release
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xstatus.h"
+#include "xgpiops.h"
+
+/************************** Constant Definitions ****************************/
+
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+/*****************************************************************************/
+/**
+*
+* This function runs a self-test on the GPIO driver/device. This function
+* does a register read/write test on some of the Interrupt Registers.
+*
+* @param	InstancePtr is a pointer to the XGpioPs instance.
+*
+* @return
+*		- XST_SUCCESS if the self-test passed.
+* 		- XST_FAILURE otherwise.
+*
+*
+******************************************************************************/
+s32 XGpioPs_SelfTest(XGpioPs *InstancePtr)
+{
+	s32 Status = XST_SUCCESS;
+	u32 IntrEnabled;
+	u32 CurrentIntrType = 0U;
+	u32 CurrentIntrPolarity = 0U;
+	u32 CurrentIntrOnAny = 0U;
+	u32 IntrType = 0U;
+	u32 IntrPolarity = 0U;
+	u32 IntrOnAny = 0U;
+	u32 IntrTestValue = 0x22U;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Disable the Interrupts for Bank 0 . */
+	IntrEnabled = XGpioPs_IntrGetEnabled(InstancePtr, XGPIOPS_BANK0);
+	XGpioPs_IntrDisable(InstancePtr, XGPIOPS_BANK0, IntrEnabled);
+
+	/*
+	 * Get the Current Interrupt properties for Bank 0.
+	 * Set them to a known value, read it back and compare.
+	 */
+	XGpioPs_GetIntrType(InstancePtr, XGPIOPS_BANK0, &CurrentIntrType,
+			     &CurrentIntrPolarity, &CurrentIntrOnAny);
+
+	XGpioPs_SetIntrType(InstancePtr, XGPIOPS_BANK0, IntrTestValue,
+			     IntrTestValue, IntrTestValue);
+
+	XGpioPs_GetIntrType(InstancePtr, XGPIOPS_BANK0, &IntrType,
+			     &IntrPolarity, &IntrOnAny);
+
+	if ((IntrType != IntrTestValue) && (IntrPolarity != IntrTestValue) &&
+	    (IntrOnAny != IntrTestValue)) {
+
+		Status = XST_FAILURE;
+	}
+
+	/*
+	 * Restore the contents of all the interrupt registers modified in this
+	 * test.
+	 */
+	XGpioPs_SetIntrType(InstancePtr, XGPIOPS_BANK0, CurrentIntrType,
+			     CurrentIntrPolarity, CurrentIntrOnAny);
+
+	XGpioPs_IntrEnable(InstancePtr, XGPIOPS_BANK0, IntrEnabled);
+
+	return Status;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_sinit.c b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_sinit.c
new file mode 100644
index 0000000..4cc0c39
--- /dev/null
+++ b/src/Xilinx/libsrc/gpiops_v3_3/src/xgpiops_sinit.c
@@ -0,0 +1,101 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xgpiops_sinit.c
+* @addtogroup gpiops_v3_3
+* @{
+*
+* This file contains the implementation of the XGpioPs driver's static
+* initialization functionality.
+*
+* @note		None.
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sv   01/15/10 First Release
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xgpiops.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+extern XGpioPs_Config XGpioPs_ConfigTable[XPAR_XGPIOPS_NUM_INSTANCES];
+
+/*****************************************************************************/
+/**
+*
+* This function looks for the device configuration based on the unique device
+* ID. The table XGpioPs_ConfigTable[] contains the configuration information
+* for each device in the system.
+*
+* @param	DeviceId is the unique device ID of the device being looked up.
+*
+* @return	A pointer to the configuration table entry corresponding to the
+*		given device ID, or NULL if no match is found.
+*
+* @note		None.
+*
+******************************************************************************/
+XGpioPs_Config *XGpioPs_LookupConfig(u16 DeviceId)
+{
+	XGpioPs_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index = 0U; Index < (u32)XPAR_XGPIOPS_NUM_INSTANCES; Index++) {
+		if (XGpioPs_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XGpioPs_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XGpioPs_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/Makefile b/src/Xilinx/libsrc/iicps_v3_6/src/Makefile
new file mode 100644
index 0000000..8c16c35
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xiicps_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling iicps"
+
+xiicps_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xiicps_includes
+
+xiicps_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/xiicps.c b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps.c
new file mode 100644
index 0000000..4f2b592
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps.c
@@ -0,0 +1,333 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps.c
+* @addtogroup iicps_v3_5
+* @{
+*
+* Contains implementation of required functions for the XIicPs driver.
+* See xiicps.h for detailed description of the device and driver.
+*
+* 
 MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- --------------------------------------------
+* 1.00a drg/jz  01/30/10 First release
+* 1.00a sdm     09/21/11 Updated the InstancePtr->Options in the
+*			 XIicPs_CfgInitialize by calling XIicPs_GetOptions.
+* 2.1   hk      04/25/14 Explicitly reset CR and clear FIFO in Abort function
+*                        and state the same in the comments. CR# 784254.
+*                        Fix for CR# 761060 - provision for repeated start.
+* 2.3	sk		10/07/14 Repeated start feature removed.
+* 3.0	sk		11/03/14 Modified TimeOut Register value to 0xFF
+* 						 in XIicPs_Reset.
+*				12/06/14 Implemented Repeated start feature.
+*				01/31/15 Modified the code according to MISRAC 2012 Compliant.
+* 3.3   kvn		05/05/16 Modified latest code for MISRA-C:2012 Compliance.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xiicps.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+static void StubHandler(void *CallBackRef, u32 StatusEvent);
+
+/************************** Variable Definitions *****************************/
+
+
+/*****************************************************************************/
+/**
+*
+* Initializes a specific XIicPs instance such that the driver is ready to use.
+*
+* The state of the device after initialization is:
+*   - Device is disabled
+*   - Slave mode
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	ConfigPtr is a reference to a structure containing information
+*		about a specific IIC device. This function initializes an
+*		InstancePtr object for a specific device specified by the
+*		contents of Config.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. The caller is responsible for keeping the address
+*		mapping from EffectiveAddr to the device physical base address
+*		unchanged once this function is invoked. Unexpected errors may
+*		occur if the address mapping changes after this function is
+*		called. If address translation is not used, use
+*		ConfigPtr->BaseAddress for this parameter, passing the physical
+*		address instead.
+*
+* @return	The return value is XST_SUCCESS if successful.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XIicPs_CfgInitialize(XIicPs *InstancePtr, XIicPs_Config *ConfigPtr,
+				  u32 EffectiveAddr)
+{
+	/*
+	 * Assert validates the input arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+
+	/*
+	 * Set some default values.
+	 */
+	InstancePtr->Config.DeviceId = ConfigPtr->DeviceId;
+	InstancePtr->Config.BaseAddress = EffectiveAddr;
+	InstancePtr->Config.InputClockHz = ConfigPtr->InputClockHz;
+	InstancePtr->StatusHandler = StubHandler;
+	InstancePtr->CallBackRef = NULL;
+
+	InstancePtr->IsReady = (u32)XIL_COMPONENT_IS_READY;
+
+	/*
+	 * Reset the IIC device to get it into its initial state. It is expected
+	 * that device configuration will take place after this initialization
+	 * is done, but before the device is started.
+	 */
+	XIicPs_Reset(InstancePtr);
+
+	/*
+	 * Keep a copy of what options this instance has.
+	 */
+	InstancePtr->Options = XIicPs_GetOptions(InstancePtr);
+
+	/* Initialize repeated start flag to 0 */
+	InstancePtr->IsRepeatedStart = 0;
+
+	return (s32)XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* Check whether the I2C bus is busy
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return
+* 		- TRUE if the bus is busy.
+*		- FALSE if the bus is not busy.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XIicPs_BusIsBusy(XIicPs *InstancePtr)
+{
+	u32 StatusReg;
+	s32	Status;
+
+	StatusReg = XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+					   XIICPS_SR_OFFSET);
+	if ((StatusReg & XIICPS_SR_BA_MASK) != 0x0U) {
+		Status = (s32)TRUE;
+	}else {
+		Status = (s32)FALSE;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This is a stub for the status callback. The stub is here in case the upper
+* layers forget to set the handler.
+*
+* @param	CallBackRef is a pointer to the upper layer callback reference.
+* @param	StatusEvent is the event that just occurred.
+* @param	ByteCount is the number of bytes transferred up until the event
+*		occurred.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void StubHandler(void *CallBackRef, u32 StatusEvent)
+{
+	(void) ((void *)CallBackRef);
+	(void) StatusEvent;
+	Xil_AssertVoidAlways();
+}
+
+
+/*****************************************************************************/
+/**
+*
+* Aborts a transfer in progress by resetting the FIFOs. The byte counts are
+* cleared.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XIicPs_Abort(XIicPs *InstancePtr)
+{
+	u32 IntrMaskReg;
+	u32 IntrStatusReg;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Enter a critical section, so disable the interrupts while we clear
+	 * the FIFO and the status register.
+	 */
+	IntrMaskReg = XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+					   XIICPS_IMR_OFFSET);
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress,
+			  XIICPS_IDR_OFFSET, XIICPS_IXR_ALL_INTR_MASK);
+
+	/*
+	 * Reset the settings in config register and clear the FIFOs.
+	 */
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress, XIICPS_CR_OFFSET,
+			  (u32)XIICPS_CR_RESET_VALUE | (u32)XIICPS_CR_CLR_FIFO_MASK);
+
+	/*
+	 * Read, then write the interrupt status to make sure there are no
+	 * pending interrupts.
+	 */
+	IntrStatusReg = XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+					 XIICPS_ISR_OFFSET);
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress,
+			  XIICPS_ISR_OFFSET, IntrStatusReg);
+
+	/*
+	 * Restore the interrupt state.
+	 */
+	IntrMaskReg = (u32)XIICPS_IXR_ALL_INTR_MASK & (~IntrMaskReg);
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress,
+			  XIICPS_IER_OFFSET, IntrMaskReg);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* Resets the IIC device. Reset must only be called after the driver has been
+* initialized. The configuration of the device after reset is the same as its
+* configuration after initialization.  Any data transfer that is in progress is
+* aborted.
+*
+* The upper layer software is responsible for re-configuring (if necessary)
+* and reenabling interrupts for the IIC device after the reset.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XIicPs_Reset(XIicPs *InstancePtr)
+{
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Abort any transfer that is in progress.
+	 */
+	XIicPs_Abort(InstancePtr);
+
+	/*
+	 * Reset any values so the software state matches the hardware device.
+	 */
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress, XIICPS_CR_OFFSET,
+			  XIICPS_CR_RESET_VALUE);
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress,
+			  XIICPS_TIME_OUT_OFFSET, XIICPS_TO_RESET_VALUE);
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress, XIICPS_IDR_OFFSET,
+			  XIICPS_IXR_ALL_INTR_MASK);
+
+}
+/*****************************************************************************/
+/**
+* Put more data into the transmit FIFO, number of bytes is ether expected
+* number of bytes for this transfer or available space in FIFO, which ever
+* is less.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return	Number of bytes left for this instance.
+*
+* @note		This is function is shared by master and slave.
+*
+******************************************************************************/
+s32 TransmitFifoFill(XIicPs *InstancePtr)
+{
+	u8 AvailBytes;
+	s32 LoopCnt;
+	s32 NumBytesToSend;
+
+	/*
+	 * Determine number of bytes to write to FIFO.
+	 */
+	AvailBytes = (u8)XIICPS_FIFO_DEPTH -
+		(u8)XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+					   XIICPS_TRANS_SIZE_OFFSET);
+
+	if (InstancePtr->SendByteCount > (s32)AvailBytes) {
+		NumBytesToSend = (s32)AvailBytes;
+	} else {
+		NumBytesToSend = InstancePtr->SendByteCount;
+	}
+
+	/*
+	 * Fill FIFO with amount determined above.
+	 */
+	for (LoopCnt = 0; LoopCnt < NumBytesToSend; LoopCnt++) {
+		XIicPs_SendByte(InstancePtr);
+	}
+
+	return InstancePtr->SendByteCount;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/xiicps.h b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps.h
new file mode 100644
index 0000000..cc837a1
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps.h
@@ -0,0 +1,423 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps.h
+* @addtogroup iicps_v3_5
+* @{
+* @details
+*
+* This is an implementation of IIC driver in the PS block. The device can
+* be either a master or a slave on the IIC bus. This implementation supports
+* both interrupt mode transfer and polled mode transfer. Only 7-bit address
+* is used in the driver, although the hardware also supports 10-bit address.
+*
+* IIC is a 2-wire serial interface.  The master controls the clock, so it can
+* regulate when it wants to send or receive data. The slave is under control of
+* the master, it must respond quickly since it has no control of the clock and
+* must send/receive data as fast or as slow as the master does.
+*
+* The higher level software must implement a higher layer protocol to inform
+* the slave what to send to the master.
+*
+* Initialization & Configuration
+*
+* The XIicPs_Config structure is used by the driver to configure itself. This
+* configuration structure is typically created by the tool-chain based on HW
+* build properties.
+*
+* To support multiple runtime loading and initialization strategies employed by
+* various operating systems, the driver instance can be initialized in the
+* following way:
+*
+*    - XIicPs_LookupConfig(DeviceId) - Use the device identifier to find
+*      the static configuration structure defined in xiicps_g.c. This is
+*      setup by the tools. For some operating systems the config structure
+*      will be initialized by the software and this call is not needed.
+*
+*   - XIicPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
+*     configuration structure provided by the caller. If running in a
+*     system with address translation, the provided virtual memory base
+*     address replaces the physical address in the configuration
+*     structure.
+*
+* Multiple Masters
+*
+* More than one master can exist, bus arbitration is defined in the IIC
+* standard. Lost of arbitration causes arbitration loss interrupt on the device.
+*
+* Multiple Slaves
+*
+* Multiple slaves are supported by selecting them with unique addresses. It is
+* up to the system designer to be sure all devices on the IIC bus have
+* unique addresses.
+*
+* Addressing
+*
+* The IIC hardware can use 7 or 10 bit addresses.  The driver provides the
+* ability to control which address size is sent in messages as a master to a
+* slave device.
+*
+* FIFO Size 
+* The hardware FIFO is 32 bytes deep. The user must know the limitations of
+* other IIC devices on the bus. Some are only able to receive a limited number
+* of bytes in a single transfer.
+*
+* Data Rates
+*
+* The data rate is set by values in the control register. The formula for
+* determining the correct register values is:
+* Fscl = Fpclk/(22 x (divisor_a+1) x (divisor_b+1))
+*
+* When the device is configured as a slave, the slck setting controls the
+* sample rate and so must be set to be at least as fast as the fastest scl
+* expected to be seen in the system.
+*
+* Polled Mode Operation
+*
+* This driver supports polled mode transfers.
+*
+* Interrupts
+*
+* The user must connect the interrupt handler of the driver,
+* XIicPs_InterruptHandler to an interrupt system such that it will be called
+* when an interrupt occurs. This function does not save and restore the
+* processor context such that the user must provide this processing.
+*
+* The driver handles the following interrupts:
+* - Transfer complete
+* - More Data
+* - Transfer not Acknowledged
+* - Transfer Time out
+* - Monitored slave ready - master mode only
+* - Receive Overflow
+* - Transmit FIFO overflow
+* - Receive FIFO underflow
+* - Arbitration lost
+*
+* Bus Busy
+*
+* Bus busy is checked before the setup of a master mode device, to avoid
+* unnecessary arbitration loss interrupt.
+*
+* RTOS Independence
+*
+* This driver is intended to be RTOS and processor independent.  It works with
+* physical addresses only.  Any needs for dynamic memory management, threads or
+* thread mutual exclusion, virtual memory, or cache control must be satisfied by
+* the layer above this driver.
+*
+*Repeated Start
+*
+* The I2C controller does not indicate completion of a receive transfer if HOLD
+* bit is set. Due to this errata, repeated start cannot be used if a receive
+* transfer is followed by any other transfer.
+*
+* 
 MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- -----------------------------------------------
+* 1.00a drg/jz  01/30/08 First release
+* 1.00a sdm     09/21/11 Fixed an issue in the XIicPs_SetOptions and
+*			 XIicPs_ClearOptions where the InstancePtr->Options
+*			 was not updated correctly.
+* 			 Updated the InstancePtr->Options in the
+*			 XIicPs_CfgInitialize by calling XIicPs_GetOptions.
+*			 Updated the XIicPs_SetupMaster to not check for
+*			 Bus Busy condition when the Hold Bit is set.
+*			 Removed some unused variables.
+* 1.01a sg      03/30/12 Fixed an issue in XIicPs_MasterSendPolled where a
+*			 check for transfer completion is added, which indicates
+*			 the completion of current transfer.
+* 1.02a sg	08/29/12 Updated the logic to arrive at the best divisors
+*			 to achieve I2C clock with minimum error for
+*			 CR #674195
+* 1.03a hk  05/04/13 Initialized BestDivA and BestDivB to 0.
+*			 This is fix for CR#704398 to remove warning.
+* 2.0   hk  03/07/14 Added check for error status in the while loop that
+*                    checks for completion.
+*                    (XIicPs_MasterSendPolled function). CR# 762244, 764875.
+*                    Limited frequency set when 100KHz or 400KHz is
+*                    selected. This is a hardware limitation. CR#779290.
+* 2.1   hk  04/24/14 Fix for CR# 789821 to handle >14 byte transfers.
+*                    Explicitly reset CR and clear FIFO in Abort function
+*                    and state the same in the comments. CR# 784254.
+*                    Fix for CR# 761060 - provision for repeated start.
+* 2.2   hk  08/23/14 Slave monitor mode changes - clear FIFO, enable
+*                    read mode and clear transfer size register.
+*                    Disable NACK to avoid interrupts on each retry.
+* 2.3	sk	10/07/14 Repeated start feature deleted.
+* 3.0	sk	11/03/14 Modified TimeOut Register value to 0xFF
+* 					 in XIicPs_Reset.
+* 			12/06/14 Implemented Repeated start feature.
+*			01/31/15 Modified the code according to MISRAC 2012 Compliant.
+*			02/18/15 Implemented larger data transfer using repeated start
+*					  in Zynq UltraScale MP.
+* 3.3   kvn 05/05/16 Modified latest code for MISRA-C:2012 Compliance.
+*       ms  03/17/17 Added readme.txt file in examples folder for doxygen
+*                    generation.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XIICPS_H       /* prevent circular inclusions */
+#define XIICPS_H       /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xiicps_hw.h"
+#include "xplatform_info.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Configuration options
+ *
+ * The following options may be specified or retrieved for the device and
+ * enable/disable additional features of the IIC.  Each of the options
+ * are bit fields, so more than one may be specified.
+ *
+ * @{
+ */
+#define XIICPS_7_BIT_ADDR_OPTION	0x01U  /**< 7-bit address mode */
+#define XIICPS_10_BIT_ADDR_OPTION	0x02U  /**< 10-bit address mode */
+#define XIICPS_SLAVE_MON_OPTION		0x04U  /**< Slave monitor mode */
+#define XIICPS_REP_START_OPTION		0x08U  /**< Repeated Start */
+/*@}*/
+
+/** @name Callback events
+ *
+ * These constants specify the handler events that are passed to an application
+ * event handler from the driver.  These constants are bit masks such that
+ * more than one event can be passed to the handler.
+ *
+ * @{
+ */
+#define XIICPS_EVENT_COMPLETE_SEND	0x0001U  /**< Transmit Complete Event*/
+#define XIICPS_EVENT_COMPLETE_RECV	0x0002U  /**< Receive Complete Event*/
+#define XIICPS_EVENT_TIME_OUT		0x0004U  /**< Transfer timed out */
+#define XIICPS_EVENT_ERROR			0x0008U  /**< Receive error */
+#define XIICPS_EVENT_ARB_LOST		0x0010U  /**< Arbitration lost */
+#define XIICPS_EVENT_NACK			0x0020U  /**< NACK Received */
+#define XIICPS_EVENT_SLAVE_RDY		0x0040U  /**< Slave ready */
+#define XIICPS_EVENT_RX_OVR			0x0080U  /**< RX overflow */
+#define XIICPS_EVENT_TX_OVR			0x0100U  /**< TX overflow */
+#define XIICPS_EVENT_RX_UNF			0x0200U  /**< RX underflow */
+/*@}*/
+
+/** @name Role constants
+ *
+ * These constants are used to pass into the device setup routines to
+ * set up the device according to transfer direction.
+ */
+#define SENDING_ROLE		1  /**< Transfer direction is sending */
+#define RECVING_ROLE		0  /**< Transfer direction is receiving */
+
+/* Maximum transfer size */
+#define XIICPS_MAX_TRANSFER_SIZE	(u32)(255U - 3U)
+
+/**************************** Type Definitions *******************************/
+
+/**
+* The handler data type allows the user to define a callback function to
+* respond to interrupt events in the system. This function is executed
+* in interrupt context, so amount of processing should be minimized.
+*
+* @param	CallBackRef is the callback reference passed in by the upper
+*		layer when setting the callback functions, and passed back to
+*		the upper layer when the callback is invoked. Its type is
+*		not important to the driver, so it is a void pointer.
+* @param	StatusEvent indicates one or more status events that occurred.
+*/
+typedef void (*XIicPs_IntrHandler) (void *CallBackRef, u32 StatusEvent);
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;     /**< Unique ID  of device */
+	u32 BaseAddress;  /**< Base address of the device */
+	u32 InputClockHz; /**< Input clock frequency */
+} XIicPs_Config;
+
+/**
+ * The XIicPs driver instance data. The user is required to allocate a
+ * variable of this type for each IIC device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XIicPs_Config Config;	/* Configuration structure */
+	u32 IsReady;		/* Device is initialized and ready */
+	u32 Options;		/* Options set in the device */
+
+	u8 *SendBufferPtr;	/* Pointer to send buffer */
+	u8 *RecvBufferPtr;	/* Pointer to recv buffer */
+	s32 SendByteCount;	/* Number of bytes still expected to send */
+	s32 RecvByteCount;	/* Number of bytes still expected to receive */
+	s32 CurrByteCount;	/* No. of bytes expected in current transfer */
+
+	s32 UpdateTxSize;	/* If tx size register has to be updated */
+	s32 IsSend;		/* Whether master is sending or receiving */
+	s32 IsRepeatedStart;	/* Indicates if user set repeated start */
+
+	XIicPs_IntrHandler StatusHandler;  /* Event handler function */
+	void *CallBackRef;	/* Callback reference for event handler */
+} XIicPs;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+/****************************************************************************/
+/*
+*
+* Place one byte into the transmit FIFO.
+*
+* @param	InstancePtr is the instance of IIC
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XIicPs_SendByte(XIicPs *InstancePtr)
+*
+*****************************************************************************/
+#define XIicPs_SendByte(InstancePtr)					\
+{									\
+	u8 Data;							\
+	Data = *((InstancePtr)->SendBufferPtr);				\
+	 XIicPs_Out32((InstancePtr)->Config.BaseAddress			\
+			 + (u32)(XIICPS_DATA_OFFSET), 			\
+					(u32)(Data));			\
+	(InstancePtr)->SendBufferPtr += 1;				\
+	(InstancePtr)->SendByteCount -= 1;\
+}
+
+/****************************************************************************/
+/*
+*
+* Receive one byte from FIFO.
+*
+* @param	InstancePtr is the instance of IIC
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		u8 XIicPs_RecvByte(XIicPs *InstancePtr)
+*
+*****************************************************************************/
+#define XIicPs_RecvByte(InstancePtr)					\
+{									\
+	u8 *Data, Value;						\
+	Value = (u8)(XIicPs_In32((InstancePtr)->Config.BaseAddress	\
+		  + (u32)XIICPS_DATA_OFFSET));  			\
+	Data = &Value;							\
+	*(InstancePtr)->RecvBufferPtr = *Data;				\
+	(InstancePtr)->RecvBufferPtr += 1;				\
+	 (InstancePtr)->RecvByteCount --; 				\
+}
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Function for configuration lookup, in xiicps_sinit.c
+ */
+XIicPs_Config *XIicPs_LookupConfig(u16 DeviceId);
+
+/*
+ * Functions for general setup, in xiicps.c
+ */
+s32 XIicPs_CfgInitialize(XIicPs *InstancePtr, XIicPs_Config * ConfigPtr,
+				  u32 EffectiveAddr);
+
+void XIicPs_Abort(XIicPs *InstancePtr);
+void XIicPs_Reset(XIicPs *InstancePtr);
+
+s32 XIicPs_BusIsBusy(XIicPs *InstancePtr);
+s32 TransmitFifoFill(XIicPs *InstancePtr);
+
+/*
+ * Functions for interrupts, in xiicps_intr.c
+ */
+void XIicPs_SetStatusHandler(XIicPs *InstancePtr, void *CallBackRef,
+				  XIicPs_IntrHandler FunctionPtr);
+
+/*
+ * Functions for device as master, in xiicps_master.c
+ */
+void XIicPs_MasterSend(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
+		u16 SlaveAddr);
+void XIicPs_MasterRecv(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
+		u16 SlaveAddr);
+s32 XIicPs_MasterSendPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
+		u16 SlaveAddr);
+s32 XIicPs_MasterRecvPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
+		u16 SlaveAddr);
+void XIicPs_EnableSlaveMonitor(XIicPs *InstancePtr, u16 SlaveAddr);
+void XIicPs_DisableSlaveMonitor(XIicPs *InstancePtr);
+void XIicPs_MasterInterruptHandler(XIicPs *InstancePtr);
+
+/*
+ * Functions for device as slave, in xiicps_slave.c
+ */
+void XIicPs_SetupSlave(XIicPs *InstancePtr, u16 SlaveAddr);
+void XIicPs_SlaveSend(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
+void XIicPs_SlaveRecv(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
+s32 XIicPs_SlaveSendPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
+s32 XIicPs_SlaveRecvPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
+void XIicPs_SlaveInterruptHandler(XIicPs *InstancePtr);
+
+/*
+ * Functions for selftest, in xiicps_selftest.c
+ */
+s32 XIicPs_SelfTest(XIicPs *InstancePtr);
+
+/*
+ * Functions for setting and getting data rate, in xiicps_options.c
+ */
+s32 XIicPs_SetOptions(XIicPs *InstancePtr, u32 Options);
+s32 XIicPs_ClearOptions(XIicPs *InstancePtr, u32 Options);
+u32 XIicPs_GetOptions(XIicPs *InstancePtr);
+
+s32 XIicPs_SetSClk(XIicPs *InstancePtr, u32 FsclHz);
+u32 XIicPs_GetSClk(XIicPs *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_hw.c b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_hw.c
new file mode 100644
index 0000000..2d85e14
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_hw.c
@@ -0,0 +1,111 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps_hw.c
+* @addtogroup iicps_v3_5
+* @{
+*
+* Contains implementation of required functions for providing the reset sequence
+* to the i2c interface
+*
+* 
 MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- --------------------------------------------
+* 1.04a kpc     11/07/13 First release
+* 3.0	sk		11/03/14 Modified TimeOut Register value to 0xFF
+*				01/31/15 Modified the code according to MISRAC 2012 Compliant.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xiicps_hw.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+/*****************************************************************************/
+/**
+* This function perform the reset sequence to the given I2c interface by
+* configuring the appropriate control bits in the I2c specifc registers
+* the i2cps reset squence involves the following steps
+*	Disable all the interuupts
+*	Clear the status
+*	Clear FIFO's and disable hold bit
+*	Clear the line status
+*	Update relevant config registers with reset values
+*
+* @param   BaseAddress of the interface
+*
+* @return N/A
+*
+* @note
+* This function will not modify the slcr registers that are relavant for
+* I2c controller
+******************************************************************************/
+void XIicPs_ResetHw(u32 BaseAddress)
+{
+	u32 RegVal;
+
+	/* Disable all the interrupts */
+	XIicPs_WriteReg(BaseAddress, XIICPS_IDR_OFFSET, XIICPS_IXR_ALL_INTR_MASK);
+	/* Clear the interrupt status */
+	RegVal = XIicPs_ReadReg(BaseAddress,XIICPS_ISR_OFFSET);
+	XIicPs_WriteReg(BaseAddress, XIICPS_ISR_OFFSET, RegVal);
+	/* Clear the hold bit,master enable bit and ack bit */
+	RegVal = XIicPs_ReadReg(BaseAddress,XIICPS_CR_OFFSET);
+	RegVal &= ~(XIICPS_CR_HOLD_MASK|XIICPS_CR_MS_MASK|XIICPS_CR_ACKEN_MASK);
+	/* Clear the fifos */
+	RegVal |= XIICPS_CR_CLR_FIFO_MASK;
+	XIicPs_WriteReg(BaseAddress, XIICPS_CR_OFFSET, RegVal);
+	/* Clear the timeout register */
+	XIicPs_WriteReg(BaseAddress, XIICPS_TIME_OUT_OFFSET, XIICPS_TO_RESET_VALUE);
+	/* Clear the transfer size register */
+	XIicPs_WriteReg(BaseAddress, XIICPS_TRANS_SIZE_OFFSET, 0x0U);
+	/* Clear the status register */
+	RegVal = XIicPs_ReadReg(BaseAddress,XIICPS_SR_OFFSET);
+	XIicPs_WriteReg(BaseAddress, XIICPS_SR_OFFSET, RegVal);
+	/* Update the configuraqtion register with reset value */
+	XIicPs_WriteReg(BaseAddress, XIICPS_CR_OFFSET, 0x0U);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_hw.h b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_hw.h
new file mode 100644
index 0000000..d1eee82
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_hw.h
@@ -0,0 +1,383 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps_hw.h
+* @addtogroup iicps_v3_5
+* @{
+*
+* This header file contains the hardware definition for an IIC device.
+* It includes register definitions and interface functions to read/write
+* the registers.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who 	Date     Changes
+* ----- ------  -------- -----------------------------------------------
+* 1.00a drg/jz  01/30/10 First release
+* 1.04a kpc		11/07/13 Added function prototype.
+* 3.0	sk		11/03/14 Modified the TimeOut Register value to 0xFF
+*				01/31/15 Modified the code according to MISRAC 2012 Compliant.
+* 

+*
+******************************************************************************/
+#ifndef XIICPS_HW_H		/* prevent circular inclusions */
+#define XIICPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register Map
+ *
+ * Register offsets for the IIC.
+ * @{
+ */
+#define XIICPS_CR_OFFSET			0x00U  /**< 32-bit Control */
+#define XIICPS_SR_OFFSET			0x04U  /**< Status */
+#define XIICPS_ADDR_OFFSET			0x08U  /**< IIC Address */
+#define XIICPS_DATA_OFFSET			0x0CU  /**< IIC FIFO Data */
+#define XIICPS_ISR_OFFSET			0x10U  /**< Interrupt Status */
+#define XIICPS_TRANS_SIZE_OFFSET	0x14U  /**< Transfer Size */
+#define XIICPS_SLV_PAUSE_OFFSET		0x18U  /**< Slave monitor pause */
+#define XIICPS_TIME_OUT_OFFSET		0x1CU  /**< Time Out */
+#define XIICPS_IMR_OFFSET			0x20U  /**< Interrupt Enabled Mask */
+#define XIICPS_IER_OFFSET			0x24U  /**< Interrupt Enable */
+#define XIICPS_IDR_OFFSET			0x28U  /**< Interrupt Disable */
+/* @} */
+
+/** @name Control Register
+ *
+ * This register contains various control bits that
+ * affects the operation of the IIC controller. Read/Write.
+ * @{
+ */
+
+#define XIICPS_CR_DIV_A_MASK	0x0000C000U /**< Clock Divisor A */
+#define XIICPS_CR_DIV_A_SHIFT			14U /**< Clock Divisor A shift */
+#define XIICPS_DIV_A_MAX				 4U /**< Maximum value of Divisor A */
+#define XIICPS_CR_DIV_B_MASK	0x00003F00U /**< Clock Divisor B */
+#define XIICPS_CR_DIV_B_SHIFT			 8U /**< Clock Divisor B shift */
+#define XIICPS_CR_CLR_FIFO_MASK	0x00000040U /**< Clear FIFO, auto clears*/
+#define XIICPS_CR_SLVMON_MASK	0x00000020U /**< Slave monitor mode */
+#define XIICPS_CR_HOLD_MASK		0x00000010U /**<  Hold bus 1=Hold scl,
+												0=terminate transfer */
+#define XIICPS_CR_ACKEN_MASK	0x00000008U /**< Enable TX of ACK when
+												Master receiver*/
+#define XIICPS_CR_NEA_MASK		0x00000004U /**< Addressing Mode 1=7 bit,
+												0=10 bit */
+#define XIICPS_CR_MS_MASK		0x00000002U /**< Master mode bit 1=Master,
+												0=Slave */
+#define XIICPS_CR_RD_WR_MASK	0x00000001U /**< Read or Write Master
+												transfer  0=Transmitter,
+												1=Receiver*/
+#define XIICPS_CR_RESET_VALUE			 0U /**< Reset value of the Control
+												register */
+/* @} */
+
+/** @name IIC Status Register
+ *
+ * This register is used to indicate status of the IIC controller. Read only
+ * @{
+ */
+#define XIICPS_SR_BA_MASK		0x00000100U  /**< Bus Active Mask */
+#define XIICPS_SR_RXOVF_MASK	0x00000080U  /**< Receiver Overflow Mask */
+#define XIICPS_SR_TXDV_MASK		0x00000040U  /**< Transmit Data Valid Mask */
+#define XIICPS_SR_RXDV_MASK		0x00000020U  /**< Receiver Data Valid Mask */
+#define XIICPS_SR_RXRW_MASK		0x00000008U  /**< Receive read/write Mask */
+/* @} */
+
+/** @name IIC Address Register
+ *
+ * Normal addressing mode uses add[6:0]. Extended addressing mode uses add[9:0].
+ * A write access to this register always initiates a transfer if the IIC is in
+ * master mode. Read/Write
+ * @{
+ */
+#define XIICPS_ADDR_MASK	0x000003FF  /**< IIC Address Mask */
+/* @} */
+
+/** @name IIC Data Register
+ *
+ * When written to, the data register sets data to transmit. When read from, the
+ * data register reads the last received byte of data. Read/Write
+ * @{
+ */
+#define XIICPS_DATA_MASK	0x000000FF  /**< IIC Data Mask */
+/* @} */
+
+/** @name IIC Interrupt Registers
+ *
+ * IIC Interrupt Status Register
+ *
+ * This register holds the interrupt status flags for the IIC controller. Some
+ * of the flags are level triggered
+ * - i.e. are set as long as the interrupt condition exists.  Other flags are
+ *   edge triggered, which means they are set one the interrupt condition occurs
+ *   then remain set until they are cleared by software.
+ *   The interrupts are cleared by writing a one to the interrupt bit position
+ *   in the Interrupt Status Register. Read/Write.
+ *
+ * IIC Interrupt Enable Register
+ *
+ * This register is used to enable interrupt sources for the IIC controller.
+ * Writing a '1' to a bit in this register clears the corresponding bit in the
+ * IIC Interrupt Mask register.  Write only.
+ *
+ * IIC Interrupt Disable Register 
+ *
+ * This register is used to disable interrupt sources for the IIC controller.
+ * Writing a '1' to a bit in this register sets the corresponding bit in the
+ * IIC Interrupt Mask register. Write only.
+ *
+ * IIC Interrupt Mask Register
+ *
+ * This register shows the enabled/disabled status of each IIC controller
+ * interrupt source. A bit set to 1 will ignore the corresponding interrupt in
+ * the status register. A bit set to 0 means the interrupt is enabled.
+ * All mask bits are set and all interrupts are disabled after reset. Read only.
+ *
+ * All four registers have the same bit definitions. They are only defined once
+ * for each of the Interrupt Enable Register, Interrupt Disable Register,
+ * Interrupt Mask Register, and Interrupt Status Register
+ * @{
+ */
+
+#define XIICPS_IXR_ARB_LOST_MASK  0x00000200U	 /**< Arbitration Lost Interrupt
+													mask */
+#define XIICPS_IXR_RX_UNF_MASK    0x00000080U	 /**< FIFO Recieve Underflow
+													Interrupt mask */
+#define XIICPS_IXR_TX_OVR_MASK    0x00000040U	 /**< Transmit Overflow
+													Interrupt mask */
+#define XIICPS_IXR_RX_OVR_MASK    0x00000020U	 /**< Receive Overflow Interrupt
+													mask */
+#define XIICPS_IXR_SLV_RDY_MASK   0x00000010U	 /**< Monitored Slave Ready
+													Interrupt mask */
+#define XIICPS_IXR_TO_MASK        0x00000008U	 /**< Transfer Time Out
+													Interrupt mask */
+#define XIICPS_IXR_NACK_MASK      0x00000004U	 /**< NACK Interrupt mask */
+#define XIICPS_IXR_DATA_MASK      0x00000002U	 /**< Data Interrupt mask */
+#define XIICPS_IXR_COMP_MASK      0x00000001U	 /**< Transfer Complete
+													Interrupt mask */
+#define XIICPS_IXR_DEFAULT_MASK   0x000002FFU	 /**< Default ISR Mask */
+#define XIICPS_IXR_ALL_INTR_MASK  0x000002FFU	 /**< All ISR Mask */
+/* @} */
+
+
+/** @name IIC Transfer Size Register
+*
+* The register's meaning varies according to the operating mode as follows:
+*   - Master transmitter mode: number of data bytes still not transmitted minus
+*     one
+*   - Master receiver mode: number of data bytes that are still expected to be
+*     received
+*   - Slave transmitter mode: number of bytes remaining in the FIFO after the
+*     master terminates the transfer
+*   - Slave receiver mode: number of valid data bytes in the FIFO
+*
+* This register is cleared if CLR_FIFO bit in the control register is set.
+* Read/Write
+* @{
+*/
+#define XIICPS_TRANS_SIZE_MASK  0x0000003F /**< IIC Transfer Size Mask */
+#define XIICPS_FIFO_DEPTH          16	  /**< Number of bytes in the FIFO */
+#define XIICPS_DATA_INTR_DEPTH     14    /**< Number of bytes at DATA intr */
+/* @} */
+
+
+/** @name IIC Slave Monitor Pause Register
+*
+* This register is associated with the slave monitor mode of the I2C interface.
+* It is meaningful only when the module is in master mode and bit SLVMON in the
+* control register is set.
+*
+* This register defines the pause interval between consecutive attempts to
+* address the slave once a write to an I2C address register is done by the
+* host. It represents the number of sclk cycles minus one between two attempts.
+*
+* The reset value of the register is 0, which results in the master repeatedly
+* trying to access the slave immediately after unsuccessful attempt.
+* Read/Write
+* @{
+*/
+#define XIICPS_SLV_PAUSE_MASK    0x0000000F  /**< Slave monitor pause mask */
+/* @} */
+
+
+/** @name IIC Time Out Register
+*
+* The value of time out register represents the time out interval in number of
+* sclk cycles minus one.
+*
+* When the accessed slave holds the sclk line low for longer than the time out
+* period, thus prohibiting the I2C interface in master mode to complete the
+* current transfer, an interrupt is generated and TO interrupt flag is set.
+*
+* The reset value of the register is 0x1f.
+* Read/Write
+* @{
+ */
+#define XIICPS_TIME_OUT_MASK    0x000000FFU    /**< IIC Time Out mask */
+#define XIICPS_TO_RESET_VALUE   0x000000FFU    /**< IIC Time Out reset value */
+/* @} */
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XIicPs_In32 Xil_In32
+#define XIicPs_Out32 Xil_Out32
+
+/****************************************************************************/
+/**
+* Read an IIC register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to select the specific register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XIicPs_ReadReg(u32 BaseAddress. int RegOffset)
+*
+******************************************************************************/
+#define XIicPs_ReadReg(BaseAddress, RegOffset) \
+	XIicPs_In32((BaseAddress) + (u32)(RegOffset))
+
+/***************************************************************************/
+/**
+* Write an IIC register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to select the specific register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note	C-Style signature:
+*	void XIicPs_WriteReg(u32 BaseAddress, int RegOffset, u32 RegisterValue)
+*
+******************************************************************************/
+#define XIicPs_WriteReg(BaseAddress, RegOffset, RegisterValue) \
+	XIicPs_Out32((BaseAddress) + (u32)(RegOffset), (u32)(RegisterValue))
+
+/***************************************************************************/
+/**
+* Read the interrupt enable register.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	Current bit mask that represents currently enabled interrupts.
+*
+* @note		C-Style signature:
+*		u32 XIicPs_ReadIER(u32 BaseAddress)
+*
+******************************************************************************/
+#define XIicPs_ReadIER(BaseAddress) \
+	XIicPs_ReadReg((BaseAddress),  XIICPS_IER_OFFSET)
+
+/***************************************************************************/
+/**
+* Write to the interrupt enable register.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @param	IntrMask is the interrupts to be enabled.
+*
+* @return	None.
+*
+* @note	C-Style signature:
+*	void XIicPs_EnabledInterrupts(u32 BaseAddress, u32 IntrMask)
+*
+******************************************************************************/
+#define XIicPs_EnableInterrupts(BaseAddress, IntrMask) \
+	XIicPs_WriteReg((BaseAddress), XIICPS_IER_OFFSET, (IntrMask))
+
+/***************************************************************************/
+/**
+* Disable all interrupts.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XIicPs_DisableAllInterrupts(u32 BaseAddress)
+*
+******************************************************************************/
+#define XIicPs_DisableAllInterrupts(BaseAddress) \
+	XIicPs_WriteReg((BaseAddress), XIICPS_IDR_OFFSET, \
+		XIICPS_IXR_ALL_INTR_MASK)
+
+/***************************************************************************/
+/**
+* Disable selected interrupts.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @param	IntrMask is the interrupts to be disabled.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XIicPs_DisableInterrupts(u32 BaseAddress, u32 IntrMask)
+*
+******************************************************************************/
+#define XIicPs_DisableInterrupts(BaseAddress, IntrMask) \
+	XIicPs_WriteReg((BaseAddress), XIICPS_IDR_OFFSET, \
+		(IntrMask))
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+/*
+ * Perform reset operation to the I2c interface
+ */
+void XIicPs_ResetHw(u32 BaseAddress);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_intr.c b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_intr.c
new file mode 100644
index 0000000..7f38591
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_intr.c
@@ -0,0 +1,101 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps_intr.c
+* @addtogroup iicps_v3_5
+* @{
+*
+* Contains functions of the XIicPs driver for interrupt-driven transfers.
+* See xiicps.h for a detailed description of the device and driver.
+*
+* 
 MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- -----------------------------------------------
+* 1.00a drg/jz  01/30/10 First release
+* 3.00	sk		01/31/15 Modified the code according to MISRAC 2012 Compliant.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xiicps.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************* Variable Definitions *****************************/
+
+/*****************************************************************************/
+/**
+*
+* This function sets the status callback function, the status handler, which the
+* driver calls when it encounters conditions that should be reported to the
+* higher layer software. The handler executes in an interrupt context, so
+* the amount of processing should be minimized
+*
+* Refer to the xiicps.h file for a list of the Callback events. The events are
+* defined to start with XIICPS_EVENT_*.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	CallBackRef is the upper layer callback reference passed back
+*		when the callback function is invoked.
+* @param	FunctionPtr is the pointer to the callback function.
+*
+* @return	None.
+*
+* @note
+*
+* The handler is called within interrupt context, so it should finish its
+* work quickly.
+*
+******************************************************************************/
+void XIicPs_SetStatusHandler(XIicPs *InstancePtr, void *CallBackRef,
+				  XIicPs_IntrHandler FunctionPtr)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(FunctionPtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	InstancePtr->StatusHandler = FunctionPtr;
+	InstancePtr->CallBackRef = CallBackRef;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_master.c b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_master.c
new file mode 100644
index 0000000..faa8528
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_master.c
@@ -0,0 +1,999 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps_master.c
+* @addtogroup iicps_v3_5
+* @{
+*
+* Handles master mode transfers.
+*
+* 
 MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---  -------- ---------------------------------------------
+* 1.00a jz   01/30/10 First release
+* 1.00a sdm  09/21/11 Updated the XIicPs_SetupMaster to not check for
+*		      Bus Busy condition when the Hold Bit is set.
+* 1.01a sg   03/30/12 Fixed an issue in XIicPs_MasterSendPolled where a
+*		      check for transfer completion is added, which indicates
+*			 the completion of current transfer.
+* 2.0   hk   03/07/14 Added check for error status in the while loop that
+*                     checks for completion. CR# 762244, 764875.
+* 2.1   hk   04/24/14 Fix for CR# 789821 to handle >14 byte transfers.
+*                     Fix for CR# 761060 - provision for repeated start.
+* 2.2   hk   08/23/14 Slave monitor mode changes - clear FIFO, enable
+*                     read mode and clear transfer size register.
+*                     Disable NACK to avoid interrupts on each retry.
+* 2.3	sk	 10/06/14 Fill transmit fifo before address register when sending.
+* 					  Replaced XIICPS_DATA_INTR_DEPTH with XIICPS_FIFO_DEPTH.
+* 					  Repeated start feature removed.
+* 3.0	sk	 12/06/14 Implemented Repeated start feature.
+*			 01/31/15 Modified the code according to MISRAC 2012 Compliant.
+*			 02/18/15 Implemented larger data transfer using repeated start
+*					  in Zynq UltraScale MP.
+* 3.3   kvn 05/05/16 Modified latest code for MISRA-C:2012 Compliance.
+* 3.6   ask 09/03/18 In XIicPs_MasterRecvPolled, set transfer size register
+* 		     before slave address. Fix for CR996440.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xiicps.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+s32 TransmitFifoFill(XIicPs *InstancePtr);
+
+static s32 XIicPs_SetupMaster(XIicPs *InstancePtr, s32 Role);
+static void MasterSendData(XIicPs *InstancePtr);
+
+/************************* Variable Definitions *****************************/
+
+/*****************************************************************************/
+/**
+* This function initiates an interrupt-driven send in master mode.
+*
+* It tries to send the first FIFO-full of data, then lets the interrupt
+* handler to handle the rest of the data if there is any.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	MsgPtr is the pointer to the send buffer.
+* @param	ByteCount is the number of bytes to be sent.
+* @param	SlaveAddr is the address of the slave we are sending to.
+*
+* @return	None.
+*
+* @note		This send routine is for interrupt-driven transfer only.
+*
+ ****************************************************************************/
+void XIicPs_MasterSend(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
+		 u16 SlaveAddr)
+{
+	u32 BaseAddr;
+	u32 Platform = XGetPlatform_Info();
+
+	/*
+	 * Assert validates the input arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(MsgPtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(XIICPS_ADDR_MASK >= SlaveAddr);
+
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+	InstancePtr->SendBufferPtr = MsgPtr;
+	InstancePtr->SendByteCount = ByteCount;
+	InstancePtr->RecvBufferPtr = NULL;
+	InstancePtr->IsSend = 1;
+
+	/*
+	 * Set repeated start if sending more than FIFO of data.
+	 */
+	if (((InstancePtr->IsRepeatedStart) != 0)||
+		((ByteCount > XIICPS_FIFO_DEPTH) != 0U)) {
+		XIicPs_WriteReg(BaseAddr, (u32)XIICPS_CR_OFFSET,
+			XIicPs_ReadReg(BaseAddr, (u32)XIICPS_CR_OFFSET) |
+				(u32)XIICPS_CR_HOLD_MASK);
+	}
+
+	/*
+	 * Setup as a master sending role.
+	 */
+	(void)XIicPs_SetupMaster(InstancePtr, SENDING_ROLE);
+
+	(void)TransmitFifoFill(InstancePtr);
+
+	XIicPs_EnableInterrupts(BaseAddr,
+		(u32)XIICPS_IXR_NACK_MASK | (u32)XIICPS_IXR_COMP_MASK |
+		(u32)XIICPS_IXR_ARB_LOST_MASK);
+	/*
+	 * Do the address transfer to notify the slave.
+	 */
+	XIicPs_WriteReg(BaseAddr, XIICPS_ADDR_OFFSET, (u32)SlaveAddr);
+
+	/* Clear the Hold bit in ZYNQ if receive byte count is less than
+	 * the FIFO depth to get the completion interrupt properly.
+	 */
+	if ((ByteCount < XIICPS_FIFO_DEPTH) && (Platform == (u32)XPLAT_ZYNQ))
+	{
+		XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+				XIicPs_ReadReg(BaseAddr, (u32)XIICPS_CR_OFFSET) &
+				(u32)(~XIICPS_CR_HOLD_MASK));
+	}
+
+}
+
+/*****************************************************************************/
+/**
+* This function initiates an interrupt-driven receive in master mode.
+*
+* It sets the transfer size register so the slave can send data to us.
+* The rest of the work is managed by interrupt handler.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	MsgPtr is the pointer to the receive buffer.
+* @param	ByteCount is the number of bytes to be received.
+* @param	SlaveAddr is the address of the slave we are receiving from.
+*
+* @return	None.
+*
+* @note		This receive routine is for interrupt-driven transfer only.
+*
+****************************************************************************/
+void XIicPs_MasterRecv(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
+		 u16 SlaveAddr)
+{
+	u32 BaseAddr;
+
+	/*
+	 * Assert validates the input arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(MsgPtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(XIICPS_ADDR_MASK >= SlaveAddr);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+	InstancePtr->RecvBufferPtr = MsgPtr;
+	InstancePtr->RecvByteCount = ByteCount;
+	InstancePtr->SendBufferPtr = NULL;
+	InstancePtr->IsSend = 0;
+
+	if ((ByteCount > XIICPS_FIFO_DEPTH) ||
+		((InstancePtr->IsRepeatedStart) !=0))
+	{
+		XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+				XIicPs_ReadReg(BaseAddr, (u32)XIICPS_CR_OFFSET) |
+						(u32)XIICPS_CR_HOLD_MASK);
+	}
+
+	/*
+	 * Initialize for a master receiving role.
+	 */
+	(void)XIicPs_SetupMaster(InstancePtr, RECVING_ROLE);
+	/*
+	 * Setup the transfer size register so the slave knows how much
+	 * to send to us.
+	 */
+	if (ByteCount > (s32)XIICPS_MAX_TRANSFER_SIZE) {
+		XIicPs_WriteReg(BaseAddr, XIICPS_TRANS_SIZE_OFFSET,
+				XIICPS_MAX_TRANSFER_SIZE);
+		InstancePtr->CurrByteCount = (s32)XIICPS_MAX_TRANSFER_SIZE;
+		InstancePtr->UpdateTxSize = 1;
+	}else {
+		InstancePtr->CurrByteCount = ByteCount;
+		XIicPs_WriteReg(BaseAddr, (u32)(XIICPS_TRANS_SIZE_OFFSET),
+			 (u32)ByteCount);
+		InstancePtr->UpdateTxSize = 0;
+	}
+
+	XIicPs_EnableInterrupts(BaseAddr,
+		(u32)XIICPS_IXR_NACK_MASK | (u32)XIICPS_IXR_DATA_MASK |
+		(u32)XIICPS_IXR_RX_OVR_MASK | (u32)XIICPS_IXR_COMP_MASK |
+		(u32)XIICPS_IXR_ARB_LOST_MASK);
+	/*
+	 * Do the address transfer to signal the slave.
+	 */
+	XIicPs_WriteReg(BaseAddr, XIICPS_ADDR_OFFSET, (u32)SlaveAddr);
+
+}
+
+/*****************************************************************************/
+/**
+* This function initiates a polled mode send in master mode.
+*
+* It sends data to the FIFO and waits for the slave to pick them up.
+* If slave fails to remove data from FIFO, the send fails with
+* time out.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	MsgPtr is the pointer to the send buffer.
+* @param	ByteCount is the number of bytes to be sent.
+* @param	SlaveAddr is the address of the slave we are sending to.
+*
+* @return
+*		- XST_SUCCESS if everything went well.
+*		- XST_FAILURE if timed out.
+*
+* @note		This send routine is for polled mode transfer only.
+*
+****************************************************************************/
+s32 XIicPs_MasterSendPolled(XIicPs *InstancePtr, u8 *MsgPtr,
+		 s32 ByteCount, u16 SlaveAddr)
+{
+	u32 IntrStatusReg;
+	u32 StatusReg;
+	u32 BaseAddr;
+	u32 Intrs;
+	_Bool Value;
+
+	/*
+	 * Assert validates the input arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(MsgPtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((u16)XIICPS_ADDR_MASK >= SlaveAddr);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+	InstancePtr->SendBufferPtr = MsgPtr;
+	InstancePtr->SendByteCount = ByteCount;
+
+	if (((InstancePtr->IsRepeatedStart) != 0) ||
+		((ByteCount > XIICPS_FIFO_DEPTH) != 0U)) {
+		XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+				XIicPs_ReadReg(BaseAddr, (u32)XIICPS_CR_OFFSET) |
+						(u32)XIICPS_CR_HOLD_MASK);
+	}
+
+	(void)XIicPs_SetupMaster(InstancePtr, SENDING_ROLE);
+
+	/*
+	 * Intrs keeps all the error-related interrupts.
+	 */
+	Intrs = (u32)XIICPS_IXR_ARB_LOST_MASK | (u32)XIICPS_IXR_TX_OVR_MASK |
+		(u32)XIICPS_IXR_NACK_MASK;
+
+	/*
+	 * Clear the interrupt status register before use it to monitor.
+	 */
+	IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+	XIicPs_WriteReg(BaseAddr, XIICPS_ISR_OFFSET, IntrStatusReg);
+
+	/*
+	 * Transmit first FIFO full of data.
+	 */
+	(void)TransmitFifoFill(InstancePtr);
+
+	XIicPs_WriteReg(BaseAddr, XIICPS_ADDR_OFFSET, (u32)SlaveAddr);
+
+	IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+
+	/*
+	 * Continue sending as long as there is more data and
+	 * there are no errors.
+	 */
+	Value = ((InstancePtr->SendByteCount > (s32)0) &&
+		((IntrStatusReg & Intrs) == (u32)0U));
+	while (Value != FALSE) {
+		StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+
+		/*
+		 * Wait until transmit FIFO is empty.
+		 */
+		if ((StatusReg & XIICPS_SR_TXDV_MASK) != 0U) {
+			IntrStatusReg = XIicPs_ReadReg(BaseAddr,
+					XIICPS_ISR_OFFSET);
+			Value = ((InstancePtr->SendByteCount > (s32)0) &&
+				((IntrStatusReg & Intrs) == (u32)0U));
+			continue;
+		}
+
+		/*
+		 * Send more data out through transmit FIFO.
+		 */
+		(void)TransmitFifoFill(InstancePtr);
+		Value = ((InstancePtr->SendByteCount > (s32)0) &&
+			((IntrStatusReg & Intrs) == (u32)0U));
+	}
+
+	/*
+	 * Check for completion of transfer.
+	 */
+	while ((IntrStatusReg & XIICPS_IXR_COMP_MASK) != XIICPS_IXR_COMP_MASK){
+
+		IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+		/*
+		 * If there is an error, tell the caller.
+		 */
+		if ((IntrStatusReg & Intrs) != 0U) {
+			return (s32)XST_FAILURE;
+		}
+	}
+
+	if ((!(InstancePtr->IsRepeatedStart)) != 0) {
+		XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+				XIicPs_ReadReg(BaseAddr,XIICPS_CR_OFFSET) &
+						(~XIICPS_CR_HOLD_MASK));
+	}
+
+	return (s32)XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* This function initiates a polled mode receive in master mode.
+*
+* It repeatedly sets the transfer size register so the slave can
+* send data to us. It polls the data register for data to come in.
+* If slave fails to send us data, it fails with time out.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	MsgPtr is the pointer to the receive buffer.
+* @param	ByteCount is the number of bytes to be received.
+* @param	SlaveAddr is the address of the slave we are receiving from.
+*
+* @return
+*		- XST_SUCCESS if everything went well.
+*		- XST_FAILURE if timed out.
+*
+* @note		This receive routine is for polled mode transfer only.
+*
+****************************************************************************/
+s32 XIicPs_MasterRecvPolled(XIicPs *InstancePtr, u8 *MsgPtr,
+				s32 ByteCount, u16 SlaveAddr)
+{
+	u32 IntrStatusReg;
+	u32 Intrs;
+	u32 StatusReg;
+	u32 BaseAddr;
+	s32 Result;
+	s32 IsHold;
+	s32 UpdateTxSize = 0;
+	s32 ByteCountVar = ByteCount;
+	u32 Platform;
+
+	/*
+	 * Assert validates the input arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(MsgPtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(XIICPS_ADDR_MASK >= SlaveAddr);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+	InstancePtr->RecvBufferPtr = MsgPtr;
+	InstancePtr->RecvByteCount = ByteCountVar;
+
+	Platform = XGetPlatform_Info();
+
+	if((ByteCountVar > XIICPS_FIFO_DEPTH) ||
+		((InstancePtr->IsRepeatedStart) !=0))
+	{
+		XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+				XIicPs_ReadReg(BaseAddr, (u32)XIICPS_CR_OFFSET) |
+						(u32)XIICPS_CR_HOLD_MASK);
+		IsHold = 1;
+	} else {
+		IsHold = 0;
+	}
+
+	(void)XIicPs_SetupMaster(InstancePtr, RECVING_ROLE);
+
+	/*
+	 * Clear the interrupt status register before use it to monitor.
+	 */
+	IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+	XIicPs_WriteReg(BaseAddr, XIICPS_ISR_OFFSET, IntrStatusReg);
+
+
+	/*
+	 * Set up the transfer size register so the slave knows how much
+	 * to send to us.
+	 */
+	if (ByteCountVar > (s32)XIICPS_MAX_TRANSFER_SIZE) {
+		XIicPs_WriteReg(BaseAddr, XIICPS_TRANS_SIZE_OFFSET,
+				XIICPS_MAX_TRANSFER_SIZE);
+		ByteCountVar = (s32)XIICPS_MAX_TRANSFER_SIZE;
+		UpdateTxSize = 1;
+	}else {
+		XIicPs_WriteReg(BaseAddr, XIICPS_TRANS_SIZE_OFFSET,
+			 ByteCountVar);
+	}
+
+
+	XIicPs_WriteReg(BaseAddr, XIICPS_ADDR_OFFSET, SlaveAddr);
+
+	/*
+	 * Intrs keeps all the error-related interrupts.
+	 */
+	Intrs = (u32)XIICPS_IXR_ARB_LOST_MASK | (u32)XIICPS_IXR_RX_OVR_MASK |
+			(u32)XIICPS_IXR_RX_UNF_MASK | (u32)XIICPS_IXR_NACK_MASK;
+	/*
+	 * Poll the interrupt status register to find the errors.
+	 */
+	IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+	while ((InstancePtr->RecvByteCount > 0) &&
+			((IntrStatusReg & Intrs) == 0U)) {
+		StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+
+	    while ((StatusReg & XIICPS_SR_RXDV_MASK) != 0U) {
+		    if (((InstancePtr->RecvByteCount <
+			    XIICPS_DATA_INTR_DEPTH) != 0U) && (IsHold != 0) &&
+			    ((!InstancePtr->IsRepeatedStart) != 0) &&
+			    (UpdateTxSize == 0)) {
+				IsHold = 0;
+				XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+						XIicPs_ReadReg(BaseAddr,
+						XIICPS_CR_OFFSET) &
+						(~XIICPS_CR_HOLD_MASK));
+			}
+			XIicPs_RecvByte(InstancePtr);
+		    ByteCountVar --;
+
+			if (Platform == (u32)XPLAT_ZYNQ) {
+			    if ((UpdateTxSize != 0) &&
+				    (ByteCountVar == (XIICPS_FIFO_DEPTH + 1))) {
+				    break;
+				}
+			}
+
+			StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+		}
+		if (Platform == (u32)XPLAT_ZYNQ) {
+			if ((UpdateTxSize != 0) &&
+				(ByteCountVar == (XIICPS_FIFO_DEPTH + 1))) {
+			    /*  wait while fifo is full */
+			    while (XIicPs_ReadReg(BaseAddr,
+				    XIICPS_TRANS_SIZE_OFFSET) !=
+				    (u32)(ByteCountVar - XIICPS_FIFO_DEPTH)) { ;
+				}
+
+				if ((InstancePtr->RecvByteCount - XIICPS_FIFO_DEPTH) >
+					(s32)XIICPS_MAX_TRANSFER_SIZE) {
+
+					XIicPs_WriteReg(BaseAddr,
+						XIICPS_TRANS_SIZE_OFFSET,
+						XIICPS_MAX_TRANSFER_SIZE);
+				    ByteCountVar = (s32)XIICPS_MAX_TRANSFER_SIZE +
+							XIICPS_FIFO_DEPTH;
+				} else {
+					XIicPs_WriteReg(BaseAddr,
+						XIICPS_TRANS_SIZE_OFFSET,
+						InstancePtr->RecvByteCount -
+						XIICPS_FIFO_DEPTH);
+					UpdateTxSize = 0;
+				    ByteCountVar = InstancePtr->RecvByteCount;
+				}
+			}
+		} else {
+		    if ((InstancePtr->RecvByteCount > 0) && (ByteCountVar == 0)) {
+				/*
+				 * Clear the interrupt status register before use it to
+				 * monitor.
+				 */
+				IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+				XIicPs_WriteReg(BaseAddr, XIICPS_ISR_OFFSET, IntrStatusReg);
+
+				XIicPs_WriteReg(BaseAddr, XIICPS_ADDR_OFFSET, SlaveAddr);
+
+				if ((InstancePtr->RecvByteCount) >
+					(s32)XIICPS_MAX_TRANSFER_SIZE) {
+
+					XIicPs_WriteReg(BaseAddr,
+						XIICPS_TRANS_SIZE_OFFSET,
+						XIICPS_MAX_TRANSFER_SIZE);
+				    ByteCountVar = (s32)XIICPS_MAX_TRANSFER_SIZE;
+				} else {
+					XIicPs_WriteReg(BaseAddr,
+						XIICPS_TRANS_SIZE_OFFSET,
+						InstancePtr->RecvByteCount);
+					UpdateTxSize = 0;
+				    ByteCountVar = InstancePtr->RecvByteCount;
+				}
+			}
+		}
+
+		IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+	}
+
+	if ((!(InstancePtr->IsRepeatedStart)) != 0) {
+		XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+				XIicPs_ReadReg(BaseAddr,XIICPS_CR_OFFSET) &
+						(~XIICPS_CR_HOLD_MASK));
+	}
+	if ((IntrStatusReg & Intrs) != 0x0U) {
+		Result = (s32)XST_FAILURE;
+	}
+	else {
+		Result =  (s32)XST_SUCCESS;
+	}
+
+	return Result;
+}
+
+/*****************************************************************************/
+/**
+* This function enables the slave monitor mode.
+*
+* It enables slave monitor in the control register and enables
+* slave ready interrupt. It then does an address transfer to slave.
+* Interrupt handler will signal the caller if slave responds to
+* the address transfer.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	SlaveAddr is the address of the slave we want to contact.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XIicPs_EnableSlaveMonitor(XIicPs *InstancePtr, u16 SlaveAddr)
+{
+	u32 BaseAddr;
+	u32 ConfigReg;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+
+	/* Clear transfer size register */
+	XIicPs_WriteReg(BaseAddr, (u32)XIICPS_TRANS_SIZE_OFFSET, 0x0U);
+
+	/*
+	 * Enable slave monitor mode in control register.
+	 */
+	ConfigReg = XIicPs_ReadReg(BaseAddr, (u32)XIICPS_CR_OFFSET);
+	ConfigReg |= (u32)XIICPS_CR_MS_MASK | (u32)XIICPS_CR_NEA_MASK |
+			(u32)XIICPS_CR_CLR_FIFO_MASK | (u32)XIICPS_CR_SLVMON_MASK;
+	ConfigReg &= (u32)(~XIICPS_CR_RD_WR_MASK);
+
+	XIicPs_WriteReg(BaseAddr, (u32)XIICPS_CR_OFFSET, ConfigReg);
+
+	/*
+	 * Set up interrupt flag for slave monitor interrupt.
+	 * Dont enable NACK.
+	 */
+	XIicPs_EnableInterrupts(BaseAddr, (u32)XIICPS_IXR_SLV_RDY_MASK);
+
+	/*
+	 * Initialize the slave monitor register.
+	 */
+	XIicPs_WriteReg(BaseAddr, (u32)XIICPS_SLV_PAUSE_OFFSET, 0xFU);
+
+	/*
+	 * Set the slave address to start the slave address transmission.
+	 */
+	XIicPs_WriteReg(BaseAddr, (u32)XIICPS_ADDR_OFFSET, (u32)SlaveAddr);
+
+	return;
+}
+
+/*****************************************************************************/
+/**
+* This function disables slave monitor mode.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XIicPs_DisableSlaveMonitor(XIicPs *InstancePtr)
+{
+	u32 BaseAddr;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+
+	/*
+	 * Clear slave monitor control bit.
+	 */
+	XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+		XIicPs_ReadReg(BaseAddr, XIICPS_CR_OFFSET)
+			& (~XIICPS_CR_SLVMON_MASK));
+
+	/*
+	 * wait for slv monitor control bit to be clear
+	 */
+	while (XIicPs_ReadReg(BaseAddr, XIICPS_CR_OFFSET)
+				& XIICPS_CR_SLVMON_MASK);
+	/*
+	 * Clear interrupt flag for slave monitor interrupt.
+	 */
+	XIicPs_DisableInterrupts(BaseAddr, XIICPS_IXR_SLV_RDY_MASK);
+
+	return;
+}
+
+/*****************************************************************************/
+/**
+* The interrupt handler for the master mode. It does the protocol handling for
+* the interrupt-driven transfers.
+*
+* Completion events and errors are signaled to upper layer for proper handling.
+*
+* 
+* The interrupts that are handled are:
+* - DATA
+*	This case is handled only for master receive data.
+*	The master has to request for more data (if there is more data to
+*	receive) and read the data from the FIFO .
+*
+* - COMP
+*	If the Master is transmitting data and there is more data to be
+*	sent then the data is written to the FIFO. If there is no more data to
+*	be transmitted then a completion event is signalled to the upper layer
+*	by calling the callback handler.
+*
+*	If the Master is receiving data then the data is read from the FIFO and
+*	the Master has to request for more data (if there is more data to
+*	receive). If all the data has been received then a completion event
+*	is signalled to the upper layer by calling the callback handler.
+*	It is an error if the amount of received data is more than expected.
+*
+* - NAK and SLAVE_RDY
+*	This is signalled to the upper layer by calling the callback handler.
+*
+* - All Other interrupts
+*	These interrupts are marked as error. This is signalled to the upper
+*	layer by calling the callback handler.
+*
+* 

+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return	None.
+*
+* @note 	None.
+*
+****************************************************************************/
+void XIicPs_MasterInterruptHandler(XIicPs *InstancePtr)
+{
+	u32 IntrStatusReg;
+	u32 StatusEvent = 0U;
+	u32 BaseAddr;
+	u16 SlaveAddr;
+	s32 ByteCnt;
+	s32 IsHold;
+	u32 Platform;
+
+	/*
+	 * Assert validates the input arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+
+	Platform = XGetPlatform_Info();
+
+	/*
+	 * Read the Interrupt status register.
+	 */
+	IntrStatusReg = XIicPs_ReadReg(BaseAddr,
+					 (u32)XIICPS_ISR_OFFSET);
+
+	/*
+	 * Write the status back to clear the interrupts so no events are
+	 * missed while processing this interrupt.
+	 */
+	XIicPs_WriteReg(BaseAddr, (u32)XIICPS_ISR_OFFSET, IntrStatusReg);
+
+	/*
+	 * Use the Mask register AND with the Interrupt Status register so
+	 * disabled interrupts are not processed.
+	 */
+	IntrStatusReg &= ~(XIicPs_ReadReg(BaseAddr, (u32)XIICPS_IMR_OFFSET));
+
+	ByteCnt = InstancePtr->CurrByteCount;
+
+	IsHold = 0;
+	if ((XIicPs_ReadReg(BaseAddr, (u32)XIICPS_CR_OFFSET) & (u32)XIICPS_CR_HOLD_MASK) != 0U) {
+		IsHold = 1;
+	}
+
+	/*
+	 * Send
+	 */
+	if (((InstancePtr->IsSend) != 0) &&
+		((u32)0U != (IntrStatusReg & (u32)XIICPS_IXR_COMP_MASK))) {
+		if (InstancePtr->SendByteCount > 0) {
+			MasterSendData(InstancePtr);
+		} else {
+			StatusEvent |= XIICPS_EVENT_COMPLETE_SEND;
+		}
+	}
+
+
+	/*
+	 * Receive
+	 */
+	if (((!(InstancePtr->IsSend))!= 0) &&
+		((0 != (IntrStatusReg & (u32)XIICPS_IXR_DATA_MASK)) ||
+		(0 != (IntrStatusReg & (u32)XIICPS_IXR_COMP_MASK)))){
+
+		while ((XIicPs_ReadReg(BaseAddr, (u32)XIICPS_SR_OFFSET) &
+				XIICPS_SR_RXDV_MASK) != 0U) {
+			if (((InstancePtr->RecvByteCount <
+				XIICPS_DATA_INTR_DEPTH)!= 0U)  && (IsHold != 0)  &&
+				((!InstancePtr->IsRepeatedStart)!= 0) &&
+				(InstancePtr->UpdateTxSize == 0)) {
+				IsHold = 0;
+				XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+						XIicPs_ReadReg(BaseAddr,
+						XIICPS_CR_OFFSET) &
+						(~XIICPS_CR_HOLD_MASK));
+			}
+			XIicPs_RecvByte(InstancePtr);
+			ByteCnt--;
+
+			if (Platform == (u32)XPLAT_ZYNQ) {
+			    if ((InstancePtr->UpdateTxSize != 0) &&
+				    (ByteCnt == (XIICPS_FIFO_DEPTH + 1))) {
+				    break;
+				}
+			}
+		}
+
+		if (Platform == (u32)XPLAT_ZYNQ) {
+			if ((InstancePtr->UpdateTxSize != 0) &&
+				(ByteCnt == (XIICPS_FIFO_DEPTH + 1))) {
+				/* wait while fifo is full */
+				while (XIicPs_ReadReg(BaseAddr,
+					XIICPS_TRANS_SIZE_OFFSET) !=
+					(u32)(ByteCnt - XIICPS_FIFO_DEPTH)) {
+				}
+
+				if ((InstancePtr->RecvByteCount - XIICPS_FIFO_DEPTH) >
+					(s32)XIICPS_MAX_TRANSFER_SIZE) {
+
+					XIicPs_WriteReg(BaseAddr,
+						XIICPS_TRANS_SIZE_OFFSET,
+						XIICPS_MAX_TRANSFER_SIZE);
+					ByteCnt = (s32)XIICPS_MAX_TRANSFER_SIZE +
+							XIICPS_FIFO_DEPTH;
+				} else {
+					XIicPs_WriteReg(BaseAddr,
+						XIICPS_TRANS_SIZE_OFFSET,
+						InstancePtr->RecvByteCount -
+						XIICPS_FIFO_DEPTH);
+					InstancePtr->UpdateTxSize = 0;
+					ByteCnt = InstancePtr->RecvByteCount;
+				}
+			}
+		} else {
+			if ((InstancePtr->RecvByteCount > 0) && (ByteCnt == 0)) {
+				/*
+				 * Clear the interrupt status register before use it to
+				 * monitor.
+				 */
+				IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+				XIicPs_WriteReg(BaseAddr, XIICPS_ISR_OFFSET, IntrStatusReg);
+
+				SlaveAddr = (u16)XIicPs_ReadReg(BaseAddr, (u32)XIICPS_ADDR_OFFSET);
+				XIicPs_WriteReg(BaseAddr, XIICPS_ADDR_OFFSET, SlaveAddr);
+
+				if ((InstancePtr->RecvByteCount) >
+					(s32)XIICPS_MAX_TRANSFER_SIZE) {
+
+					XIicPs_WriteReg(BaseAddr,
+						XIICPS_TRANS_SIZE_OFFSET,
+						XIICPS_MAX_TRANSFER_SIZE);
+					ByteCnt = (s32)XIICPS_MAX_TRANSFER_SIZE;
+				} else {
+					XIicPs_WriteReg(BaseAddr,
+						XIICPS_TRANS_SIZE_OFFSET,
+						InstancePtr->RecvByteCount);
+					InstancePtr->UpdateTxSize = 0;
+					ByteCnt = InstancePtr->RecvByteCount;
+				}
+				XIicPs_EnableInterrupts(BaseAddr,
+					(u32)XIICPS_IXR_NACK_MASK | (u32)XIICPS_IXR_DATA_MASK |
+					(u32)XIICPS_IXR_RX_OVR_MASK | (u32)XIICPS_IXR_COMP_MASK |
+					(u32)XIICPS_IXR_ARB_LOST_MASK);
+			}
+		}
+		InstancePtr->CurrByteCount = ByteCnt;
+	}
+
+	if (((!(InstancePtr->IsSend)) != 0) &&
+		(0U != (IntrStatusReg & XIICPS_IXR_COMP_MASK))) {
+		/*
+		 * If all done, tell the application.
+		 */
+		if (InstancePtr->RecvByteCount == 0){
+			if ((!(InstancePtr->IsRepeatedStart)) != 0) {
+				XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+						XIicPs_ReadReg(BaseAddr,
+						XIICPS_CR_OFFSET) &
+						(~XIICPS_CR_HOLD_MASK));
+			}
+			StatusEvent |= XIICPS_EVENT_COMPLETE_RECV;
+		}
+	}
+
+
+	/*
+	 * Slave ready interrupt, it is only meaningful for master mode.
+	 */
+	if (0U != (IntrStatusReg & XIICPS_IXR_SLV_RDY_MASK)) {
+		StatusEvent |= XIICPS_EVENT_SLAVE_RDY;
+	}
+
+	if (0U != (IntrStatusReg & XIICPS_IXR_NACK_MASK)) {
+		if ((!(InstancePtr->IsRepeatedStart)) != 0 ) {
+			XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+					XIicPs_ReadReg(BaseAddr,
+					XIICPS_CR_OFFSET) &
+					(~XIICPS_CR_HOLD_MASK));
+		}
+		StatusEvent |= XIICPS_EVENT_NACK;
+	}
+
+	/*
+	 * Arbitration lost interrupt
+	 */
+	if (0U != (IntrStatusReg & XIICPS_IXR_ARB_LOST_MASK)) {
+		StatusEvent |= XIICPS_EVENT_ARB_LOST;
+	}
+
+	/*
+	 * All other interrupts are treated as error.
+	 */
+	if (0U != (IntrStatusReg & (XIICPS_IXR_NACK_MASK |
+			XIICPS_IXR_RX_UNF_MASK | XIICPS_IXR_TX_OVR_MASK |
+			XIICPS_IXR_RX_OVR_MASK))) {
+		if ((!(InstancePtr->IsRepeatedStart)) != 0) {
+			XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+					XIicPs_ReadReg(BaseAddr,
+					XIICPS_CR_OFFSET) &
+					(~XIICPS_CR_HOLD_MASK));
+		}
+		StatusEvent |= XIICPS_EVENT_ERROR;
+	}
+
+	/*
+	 * Signal application if there are any events.
+	 */
+	if (StatusEvent != 0U) {
+		InstancePtr->StatusHandler(InstancePtr->CallBackRef,
+					   StatusEvent);
+	}
+
+}
+
+/*****************************************************************************/
+/*
+* This function prepares a device to transfers as a master.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @param	Role specifies whether the device is sending or receiving.
+*
+* @return
+*		- XST_SUCCESS if everything went well.
+*		- XST_FAILURE if bus is busy.
+*
+* @note		Interrupts are always disabled, device which needs to use
+*		interrupts needs to setup interrupts after this call.
+*
+****************************************************************************/
+static s32 XIicPs_SetupMaster(XIicPs *InstancePtr, s32 Role)
+{
+	u32 ControlReg;
+	u32 BaseAddr;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+	ControlReg = XIicPs_ReadReg(BaseAddr, XIICPS_CR_OFFSET);
+
+
+	/*
+	 * Only check if bus is busy when repeated start option is not set.
+	 */
+	if ((ControlReg & XIICPS_CR_HOLD_MASK) == 0U) {
+		if (XIicPs_BusIsBusy(InstancePtr) == (s32)1) {
+			return (s32)XST_FAILURE;
+		}
+	}
+
+	/*
+	 * Set up master, AckEn, nea and also clear fifo.
+	 */
+	ControlReg |= (u32)XIICPS_CR_ACKEN_MASK | (u32)XIICPS_CR_CLR_FIFO_MASK |
+			(u32)XIICPS_CR_NEA_MASK | (u32)XIICPS_CR_MS_MASK;
+
+	if (Role == RECVING_ROLE) {
+		ControlReg |= (u32)XIICPS_CR_RD_WR_MASK;
+	}else {
+		ControlReg &= (u32)(~XIICPS_CR_RD_WR_MASK);
+	}
+
+	XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET, ControlReg);
+
+	XIicPs_DisableAllInterrupts(BaseAddr);
+
+	return (s32)XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/*
+* This function handles continuation of sending data. It is invoked
+* from interrupt handler.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+static void MasterSendData(XIicPs *InstancePtr)
+{
+	(void)TransmitFifoFill(InstancePtr);
+
+	/*
+	 * Clear hold bit if done, so stop can be sent out.
+	 */
+	if (InstancePtr->SendByteCount == 0) {
+
+		/*
+		 * If user has enabled repeated start as an option,
+		 * do not disable it.
+		 */
+		if ((!(InstancePtr->IsRepeatedStart)) != 0) {
+
+			XIicPs_WriteReg(InstancePtr->Config.BaseAddress,
+			(u32)XIICPS_CR_OFFSET,
+			XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+			(u32)XIICPS_CR_OFFSET) & (u32)(~ XIICPS_CR_HOLD_MASK));
+		}
+	}
+
+	return;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_options.c b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_options.c
new file mode 100644
index 0000000..c9237db
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_options.c
@@ -0,0 +1,497 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps_options.c
+* @addtogroup iicps_v3_5
+* @{
+*
+* Contains functions for the configuration of the XIccPs driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- -----------------------------------------------
+* 1.00a drg/jz  01/30/10 First release
+* 1.02a sg	08/29/12 Updated the logic to arrive at the best divisors
+*			 to achieve I2C clock with minimum error.
+*			 This is a fix for CR #674195
+* 1.03a hk  05/04/13 Initialized BestDivA and BestDivB to 0.
+*			 This is fix for CR#704398 to remove warning.
+* 2.0   hk  03/07/14 Limited frequency set when 100KHz or 400KHz is
+*                    selected. This is a hardware limitation. CR#779290.
+* 2.1   hk  04/24/14 Fix for CR# 761060 - provision for repeated start.
+* 2.3	sk	10/07/14 Repeated start feature removed.
+* 3.0	sk	12/06/14 Implemented Repeated start feature.
+*			01/31/15 Modified the code according to MISRAC 2012 Compliant.
+* 3.3   kvn 05/05/16 Modified latest code for MISRA-C:2012 Compliance.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xiicps.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+/*
+ * Create the table of options which are processed to get/set the device
+ * options. These options are table driven to allow easy maintenance and
+ * expansion of the options.
+ */
+typedef struct {
+		u32 Option;
+		u32 Mask;
+} OptionsMap;
+
+static OptionsMap OptionsTable[] = {
+		{XIICPS_7_BIT_ADDR_OPTION, XIICPS_CR_NEA_MASK},
+		{XIICPS_10_BIT_ADDR_OPTION, XIICPS_CR_NEA_MASK},
+		{XIICPS_SLAVE_MON_OPTION, XIICPS_CR_SLVMON_MASK},
+		{XIICPS_REP_START_OPTION, XIICPS_CR_HOLD_MASK},
+};
+
+#define XIICPS_NUM_OPTIONS      (sizeof(OptionsTable) / sizeof(OptionsMap))
+
+/*****************************************************************************/
+/**
+*
+* This function sets the options for the IIC device driver. The options control
+* how the device behaves relative to the IIC bus. The device must be idle
+* rather than busy transferring data before setting these device options.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	Options contains the specified options to be set. This is a bit
+*		mask where a 1 means to turn the option on. One or more bit
+*		values may be contained in the mask. See the bit definitions
+*		named XIICPS_*_OPTION in xiicps.h.
+*
+* @return
+*		- XST_SUCCESS if options are successfully set.
+*		- XST_DEVICE_IS_STARTED if the device is currently transferring
+*		data. The transfer must complete or be aborted before setting
+*		options.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XIicPs_SetOptions(XIicPs *InstancePtr, u32 Options)
+{
+	u32 ControlReg;
+	u32 Index;
+	u32 OptionsVar = Options;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	ControlReg = XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+				      XIICPS_CR_OFFSET);
+
+	/*
+	 * If repeated start option is requested, set the flag.
+	 * The hold bit in CR will be written by driver when the next transfer
+	 * is initiated.
+	 */
+	if ((OptionsVar & (u32)XIICPS_REP_START_OPTION) != (u32)0 ) {
+		InstancePtr->IsRepeatedStart = 1;
+		OptionsVar = OptionsVar & (~XIICPS_REP_START_OPTION);
+	}
+
+	/*
+	 * Loop through the options table, turning the option on.
+	 */
+	for (Index = 0U; Index < XIICPS_NUM_OPTIONS; Index++) {
+		if ((OptionsVar & OptionsTable[Index].Option) != (u32)0x0U) {
+			/*
+			 * 10-bit option is specially treated, because it is
+			 * using the 7-bit option, so turning it on means
+			 * turning 7-bit option off.
+			 */
+			if ((OptionsTable[Index].Option &
+				XIICPS_10_BIT_ADDR_OPTION) != (u32)0x0U) {
+				/* Turn 7-bit off */
+				ControlReg &= ~OptionsTable[Index].Mask;
+			} else {
+				/* Turn 7-bit on */
+				ControlReg |= OptionsTable[Index].Mask;
+			}
+		}
+	}
+
+	/*
+	 * Now write to the control register. Leave it to the upper layers
+	 * to restart the device.
+	 */
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress, XIICPS_CR_OFFSET,
+			  ControlReg);
+
+	/*
+	 * Keep a copy of what options this instance has.
+	 */
+	InstancePtr->Options = XIicPs_GetOptions(InstancePtr);
+
+	return (s32)XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function clears the options for the IIC device driver. The options
+* control how the device behaves relative to the IIC bus. The device must be
+* idle rather than busy transferring data before setting these device options.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	Options contains the specified options to be cleared. This is a
+*		bit mask where a 1 means to turn the option off. One or more bit
+*		values may be contained in the mask. See the bit definitions
+*		named XIICPS_*_OPTION in xiicps.h.
+*
+* @return
+*		- XST_SUCCESS if options are successfully set.
+*		- XST_DEVICE_IS_STARTED if the device is currently transferring
+*		data. The transfer must complete or be aborted before setting
+*		options.
+*
+* @note		None
+*
+******************************************************************************/
+s32 XIicPs_ClearOptions(XIicPs *InstancePtr, u32 Options)
+{
+	u32 ControlReg;
+	u32 Index;
+	u32 OptionsVar = Options;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	ControlReg = XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XIICPS_CR_OFFSET);
+
+	/*
+	 * If repeated start option is cleared, set the flag.
+	 * The hold bit in CR will be cleared by driver when the
+	 * following transfer ends.
+	 */
+	if ((OptionsVar & XIICPS_REP_START_OPTION) != (u32)0x0U ) {
+		InstancePtr->IsRepeatedStart = 0;
+		OptionsVar = OptionsVar & (~XIICPS_REP_START_OPTION);
+	}
+
+	/*
+	 * Loop through the options table and clear the specified options.
+	 */
+	for (Index = 0U; Index < XIICPS_NUM_OPTIONS; Index++) {
+		if ((OptionsVar & OptionsTable[Index].Option) != (u32)0x0U) {
+
+			/*
+			 * 10-bit option is specially treated, because it is
+			 * using the 7-bit option, so clearing it means turning
+			 * 7-bit option on.
+			 */
+			if ((OptionsTable[Index].Option &
+				XIICPS_10_BIT_ADDR_OPTION) != (u32)0x0U) {
+
+				/* Turn 7-bit on */
+				ControlReg |= OptionsTable[Index].Mask;
+			} else {
+
+				/* Turn 7-bit off */
+				ControlReg &= ~OptionsTable[Index].Mask;
+			}
+		}
+	}
+
+
+	/*
+	 * Now write the control register. Leave it to the upper layers
+	 * to restart the device.
+	 */
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress, XIICPS_CR_OFFSET,
+			  ControlReg);
+
+	/*
+	 * Keep a copy of what options this instance has.
+	 */
+	InstancePtr->Options = XIicPs_GetOptions(InstancePtr);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function gets the options for the IIC device. The options control how
+* the device behaves relative to the IIC bus.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return	32 bit mask of the options, where a 1 means the option is on,
+*		and a 0 means to the option is off. One or more bit values may
+*		be contained in the mask. See the bit definitions named
+* 		XIICPS_*_OPTION in the file xiicps.h.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 XIicPs_GetOptions(XIicPs *InstancePtr)
+{
+	u32 OptionsFlag = 0U;
+	u32 ControlReg;
+	u32 Index;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read control register to find which options are currently set.
+	 */
+	ControlReg = XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+				      XIICPS_CR_OFFSET);
+
+	/*
+	 * Loop through the options table to determine which options are set.
+	 */
+	for (Index = 0U; Index < XIICPS_NUM_OPTIONS; Index++) {
+		if ((ControlReg & OptionsTable[Index].Mask) != (u32)0x0U) {
+			OptionsFlag |= OptionsTable[Index].Option;
+		}
+		if ((ControlReg & XIICPS_CR_NEA_MASK) == (u32)0x0U) {
+			OptionsFlag |= XIICPS_10_BIT_ADDR_OPTION;
+		}
+	}
+
+	if (InstancePtr->IsRepeatedStart != 0 ) {
+		OptionsFlag |= XIICPS_REP_START_OPTION;
+	}
+	return OptionsFlag;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the serial clock rate for the IIC device. The device
+* must be idle rather than busy transferring data before setting these device
+* options.
+*
+* The data rate is set by values in the control register. The formula for
+* determining the correct register values is:
+* Fscl = Fpclk/(22 x (divisor_a+1) x (divisor_b+1))
+* See the hardware data sheet for a full explanation of setting the serial
+* clock rate.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	FsclHz is the clock frequency in Hz. The two most common clock
+*		rates are 100KHz and 400KHz.
+*
+* @return
+*		- XST_SUCCESS if options are successfully set.
+*		- XST_DEVICE_IS_STARTED if the device is currently transferring
+*		data. The transfer must complete or be aborted before setting
+*		options.
+*		- XST_FAILURE if the Fscl frequency can not be set.
+*
+* @note		The clock can not be faster than the input clock divide by 22.
+*
+******************************************************************************/
+s32 XIicPs_SetSClk(XIicPs *InstancePtr, u32 FsclHz)
+{
+	u32 Div_a;
+	u32 Div_b;
+	u32 ActualFscl;
+	u32 Temp;
+	u32 TempLimit;
+	u32 LastError;
+	u32 BestError;
+	u32 CurrentError;
+	u32 ControlReg;
+	u32 CalcDivA;
+	u32 CalcDivB;
+	u32 BestDivA;
+	u32 BestDivB;
+	u32 FsclHzVar = FsclHz;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(FsclHzVar > 0U);
+
+	if (0U != XIicPs_In32((InstancePtr->Config.BaseAddress) +
+					XIICPS_TRANS_SIZE_OFFSET)) {
+		return (s32)XST_DEVICE_IS_STARTED;
+	}
+
+	/*
+	 * Assume Div_a is 0 and calculate (divisor_a+1) x (divisor_b+1).
+	 */
+	Temp = (InstancePtr->Config.InputClockHz) / ((u32)22U * FsclHzVar);
+
+	/*
+	 * If the answer is negative or 0, the Fscl input is out of range.
+	 */
+	if ((u32)(0U) == Temp) {
+		return (s32)XST_FAILURE;
+	}
+
+	/*
+	 * If frequency 400KHz is selected, 384.6KHz should be set.
+	 * If frequency 100KHz is selected, 90KHz should be set.
+	 * This is due to a hardware limitation.
+	 */
+	if(FsclHzVar > (u32)384600U) {
+		FsclHzVar = (u32)384600U;
+	}
+
+	if((FsclHzVar <= (u32)100000U) && (FsclHzVar > (u32)90000U)) {
+		FsclHzVar = (u32)90000U;
+	}
+
+	/*
+	 * TempLimit helps in iterating over the consecutive value of Temp to
+	 * find the closest clock rate achievable with divisors.
+	 * Iterate over the next value only if fractional part is involved.
+	 */
+	TempLimit = (((InstancePtr->Config.InputClockHz) %
+			((u32)22 * FsclHzVar)) != 	(u32)0x0U) ?
+						Temp + (u32)1U : Temp;
+	BestError = FsclHzVar;
+
+	BestDivA = 0U;
+	BestDivB = 0U;
+	for ( ; Temp <= TempLimit ; Temp++)
+	{
+		LastError = FsclHzVar;
+		CalcDivA = 0U;
+		CalcDivB = 0U;
+
+		for (Div_b = 0U; Div_b < 64U; Div_b++) {
+
+			Div_a = Temp / (Div_b + 1U);
+
+			if (Div_a != 0U){
+				Div_a = Div_a - (u32)1U;
+			}
+			if (Div_a > 3U){
+				continue;
+			}
+			ActualFscl = (InstancePtr->Config.InputClockHz) /
+						(22U * (Div_a + 1U) * (Div_b + 1U));
+
+			if (ActualFscl > FsclHzVar){
+				CurrentError = (ActualFscl - FsclHzVar);}
+			else{
+				CurrentError = (FsclHzVar - ActualFscl);}
+
+			if (LastError > CurrentError) {
+				CalcDivA = Div_a;
+				CalcDivB = Div_b;
+				LastError = CurrentError;
+			}
+		}
+
+		/*
+		 * Used to capture the best divisors.
+		 */
+		if (LastError < BestError) {
+			BestError = LastError;
+			BestDivA = CalcDivA;
+			BestDivB = CalcDivB;
+		}
+	}
+
+
+	/*
+	 * Read the control register and mask the Divisors.
+	 */
+	ControlReg = XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+					  (u32)XIICPS_CR_OFFSET);
+	ControlReg &= ~((u32)XIICPS_CR_DIV_A_MASK | (u32)XIICPS_CR_DIV_B_MASK);
+	ControlReg |= (BestDivA << XIICPS_CR_DIV_A_SHIFT) |
+		(BestDivB << XIICPS_CR_DIV_B_SHIFT);
+
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress, (u32)XIICPS_CR_OFFSET,
+			  ControlReg);
+
+	return (s32)XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function gets the serial clock rate for the IIC device. The device
+* must be idle rather than busy transferring data before setting these device
+* options.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return	The value of the IIC clock to the nearest Hz based on the
+*		control register settings. The actual value may not be exact to
+*		to integer math rounding errors.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 XIicPs_GetSClk(XIicPs *InstancePtr)
+{
+	u32 ControlReg;
+	u32 ActualFscl;
+	u32 Div_a;
+	u32 Div_b;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	ControlReg = XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+					  XIICPS_CR_OFFSET);
+
+	Div_a = (ControlReg & XIICPS_CR_DIV_A_MASK) >> XIICPS_CR_DIV_A_SHIFT;
+	Div_b = (ControlReg & XIICPS_CR_DIV_B_MASK) >> XIICPS_CR_DIV_B_SHIFT;
+
+	ActualFscl = (InstancePtr->Config.InputClockHz) /
+		(22U * (Div_a + 1U) * (Div_b + 1U));
+
+	return ActualFscl;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_selftest.c b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_selftest.c
new file mode 100644
index 0000000..31e02b5
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_selftest.c
@@ -0,0 +1,132 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps_selftest.c
+* @addtogroup iicps_v3_5
+* @{
+*
+* This component contains the implementation of selftest functions for the
+* XIicPs driver component.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------
+* 1.00a drg/jz 01/30/10 First release
+* 1.00a sdm    09/22/11 Removed unused code
+* 3.0	sk	   11/03/14 Removed TimeOut Register value check
+*			   01/31/15	Modified the code according to MISRAC 2012 Compliant.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xiicps.h"
+
+/************************** Constant Definitions *****************************/
+
+#define REG_TEST_VALUE    0x00000005U
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/*****************************************************************************/
+/**
+*
+* Runs a self-test on the driver/device. The self-test is destructive in that
+* a reset of the device is performed in order to check the reset values of
+* the registers and to get the device into a known state.
+*
+* Upon successful return from the self-test, the device is reset.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_REGISTER_ERROR indicates a register did not read or write
+*		correctly
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XIicPs_SelfTest(XIicPs *InstancePtr)
+{
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	/*
+	 * All the IIC registers should be in their default state right now.
+	 */
+	if ((XIICPS_CR_RESET_VALUE !=
+		 XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+				  XIICPS_CR_OFFSET)) ||
+		(XIICPS_IXR_ALL_INTR_MASK !=
+		 XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+				  XIICPS_IMR_OFFSET))) {
+		return (s32)XST_FAILURE;
+	}
+
+	XIicPs_Reset(InstancePtr);
+
+	/*
+	 * Write, Read then write a register
+	 */
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress,
+			  XIICPS_SLV_PAUSE_OFFSET, REG_TEST_VALUE);
+
+	if (REG_TEST_VALUE != XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
+						   XIICPS_SLV_PAUSE_OFFSET)) {
+		return (s32)XST_FAILURE;
+	}
+
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress,
+			  XIICPS_SLV_PAUSE_OFFSET, 0U);
+
+	XIicPs_Reset(InstancePtr);
+
+	return (s32)XST_SUCCESS;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_sinit.c b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_sinit.c
new file mode 100644
index 0000000..d8fbc4c
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_sinit.c
@@ -0,0 +1,102 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xiicps_sinit.c
+* @addtogroup iicps_v3_5
+* @{
+*
+* The implementation of the XIicPs component's static initialization
+* functionality.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- --------------------------------------------
+* 1.00a drg/jz 01/30/10 First release
+* 3.00	sk	   01/31/15	Modified the code according to MISRAC 2012 Compliant.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xparameters.h"
+#include "xiicps.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+extern XIicPs_Config XIicPs_ConfigTable[XPAR_XIICPS_NUM_INSTANCES];
+
+/*****************************************************************************/
+/**
+*
+* Looks up the device configuration based on the unique device ID. A table
+* contains the configuration info for each device in the system.
+*
+* @param	DeviceId contains the ID of the device to look up the
+*		configuration for.
+*
+* @return	A pointer to the configuration found or NULL if the specified
+*		device ID was not found. See xiicps.h for the definition of
+*		XIicPs_Config.
+*
+* @note		None.
+*
+******************************************************************************/
+XIicPs_Config *XIicPs_LookupConfig(u16 DeviceId)
+{
+	XIicPs_Config *CfgPtr = NULL;
+	s32 Index;
+
+	for (Index = 0; Index < XPAR_XIICPS_NUM_INSTANCES; Index++) {
+		if (XIicPs_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XIicPs_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XIicPs_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_slave.c b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_slave.c
new file mode 100644
index 0000000..adc40a4
--- /dev/null
+++ b/src/Xilinx/libsrc/iicps_v3_6/src/xiicps_slave.c
@@ -0,0 +1,595 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xiicps_slave.c
+* @addtogroup iicps_v3_5
+* @{
+*
+* Handles slave transfers
+*
+* 
 MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --  -------- ---------------------------------------------
+* 1.00a jz  01/30/10 First release
+* 1.04a kpc 08/30/13 Avoid buffer overwrite in SlaveRecvData function
+* 3.00	sk	01/31/15 Modified the code according to MISRAC 2012 Compliant.
+* 3.3   kvn 05/05/16 Modified latest code for MISRA-C:2012 Compliance.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xiicps.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+extern s32 TransmitFifoFill(XIicPs *InstancePtr);
+
+static s32 SlaveRecvData(XIicPs *InstancePtr);
+
+/************************* Variable Definitions *****************************/
+
+/*****************************************************************************/
+/**
+* This function sets up the device to be a slave.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	SlaveAddr is the address of the slave we are receiving from.
+*
+* @return	None.
+*
+* @note
+*	Interrupt is always enabled no matter the tranfer is interrupt-
+*	driven or polled mode. Whether device will be interrupted or not
+*	depends on whether the device is connected to an interrupt
+*	controller and interrupt for the device is enabled.
+*
+****************************************************************************/
+void XIicPs_SetupSlave(XIicPs *InstancePtr, u16 SlaveAddr)
+{
+	u32 ControlReg;
+	u32 BaseAddr;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(XIICPS_ADDR_MASK >= SlaveAddr);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+
+	ControlReg = XIicPs_In32(BaseAddr + XIICPS_CR_OFFSET);
+
+	/*
+	 * Set up master, AckEn, nea and also clear fifo.
+	 */
+	ControlReg |= (u32)XIICPS_CR_ACKEN_MASK | (u32)XIICPS_CR_CLR_FIFO_MASK;
+	ControlReg |= (u32)XIICPS_CR_NEA_MASK;
+	ControlReg &= (u32)(~XIICPS_CR_MS_MASK);
+
+	XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET,
+			  ControlReg);
+
+	XIicPs_DisableAllInterrupts(BaseAddr);
+
+	XIicPs_WriteReg(InstancePtr->Config.BaseAddress,
+			  XIICPS_ADDR_OFFSET, (u32)SlaveAddr);
+
+	return;
+}
+
+/*****************************************************************************/
+/**
+* This function setup a slave interrupt-driven send. It set the repeated
+* start for the device is the tranfer size is larger than FIFO depth.
+* Data processing for the send is initiated by the interrupt handler.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	MsgPtr is the pointer to the send buffer.
+* @param	ByteCount is the number of bytes to be sent.
+*
+* @return	None.
+*
+* @note		This send routine is for interrupt-driven transfer only.
+*
+****************************************************************************/
+void XIicPs_SlaveSend(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount)
+{
+	u32 BaseAddr;
+
+	/*
+	 * Assert validates the input arguments
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(MsgPtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+	InstancePtr->SendBufferPtr = MsgPtr;
+	InstancePtr->SendByteCount = ByteCount;
+	InstancePtr->RecvBufferPtr = NULL;
+
+	XIicPs_EnableInterrupts(BaseAddr,
+			(u32)XIICPS_IXR_DATA_MASK | (u32)XIICPS_IXR_COMP_MASK |
+			(u32)XIICPS_IXR_TO_MASK | (u32)XIICPS_IXR_NACK_MASK |
+			(u32)XIICPS_IXR_TX_OVR_MASK);
+}
+
+/*****************************************************************************/
+/**
+* This function setup a slave interrupt-driven receive.
+* Data processing for the receive is handled by the interrupt handler.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	MsgPtr is the pointer to the receive buffer.
+* @param	ByteCount is the number of bytes to be received.
+*
+* @return	None.
+*
+* @note		This routine is for interrupt-driven transfer only.
+*
+****************************************************************************/
+void XIicPs_SlaveRecv(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount)
+{
+	/*
+	 * Assert validates the input arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(MsgPtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+
+	InstancePtr->RecvBufferPtr = MsgPtr;
+	InstancePtr->RecvByteCount = ByteCount;
+	InstancePtr->SendBufferPtr = NULL;
+
+	XIicPs_EnableInterrupts(InstancePtr->Config.BaseAddress,
+		(u32)XIICPS_IXR_DATA_MASK | (u32)XIICPS_IXR_COMP_MASK |
+		(u32)XIICPS_IXR_NACK_MASK | (u32)XIICPS_IXR_TO_MASK |
+		(u32)XIICPS_IXR_RX_OVR_MASK | (u32)XIICPS_IXR_RX_UNF_MASK);
+
+}
+
+/*****************************************************************************/
+/**
+* This function sends  a buffer in polled mode as a slave.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	MsgPtr is the pointer to the send buffer.
+* @param	ByteCount is the number of bytes to be sent.
+*
+* @return
+*		- XST_SUCCESS if everything went well.
+*		- XST_FAILURE if master sends us data or master terminates the
+*		transfer before all data has sent out.
+*
+* @note		This send routine is for polled mode transfer only.
+*
+****************************************************************************/
+s32 XIicPs_SlaveSendPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount)
+{
+	u32 IntrStatusReg;
+	u32 StatusReg;
+	u32 BaseAddr;
+	s32 Tmp;
+	s32 BytesToSend;
+	s32 Error = 0;
+	s32 Status = (s32)XST_SUCCESS;
+	_Bool Value;
+	_Bool Result;
+
+	/*
+	 * Assert validates the input arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(MsgPtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+	InstancePtr->SendBufferPtr = MsgPtr;
+	InstancePtr->SendByteCount = ByteCount;
+
+	/*
+	 * Use RXRW bit in status register to wait master to start a read.
+	 */
+	StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+	Result = (((u32)(StatusReg & XIICPS_SR_RXRW_MASK) == (u32)0x0U) &&
+			(Error == 0));
+	while (Result != FALSE) {
+
+		/*
+		 * If master tries to send us data, it is an error.
+		 */
+		if ((StatusReg & XIICPS_SR_RXDV_MASK) != 0x0U) {
+			Error = 1;
+		}
+
+		StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+		Result = (((u32)(StatusReg & XIICPS_SR_RXRW_MASK) == (u32)0x0U) &&
+				(Error == 0));
+	}
+
+	if (Error != 0) {
+		Status = (s32)XST_FAILURE;
+	} else {
+
+		/*
+		 * Clear the interrupt status register.
+		 */
+		IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+		XIicPs_WriteReg(BaseAddr, XIICPS_ISR_OFFSET, IntrStatusReg);
+
+		/*
+		 * Send data as long as there is more data to send and
+		 * there are no errors.
+		 */
+		Value = (InstancePtr->SendByteCount > (s32)0) &&
+						((Error == 0));
+		while (Value != FALSE) {
+
+			/*
+			 * Find out how many can be sent.
+			 */
+			BytesToSend = InstancePtr->SendByteCount;
+			if (BytesToSend > (s32)(XIICPS_FIFO_DEPTH)) {
+				BytesToSend = (s32)(XIICPS_FIFO_DEPTH);
+			}
+
+			for(Tmp = 0; Tmp < BytesToSend; Tmp ++) {
+				XIicPs_SendByte(InstancePtr);
+			}
+
+			StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+
+			/*
+			 * Wait for master to read the data out of fifo.
+			 */
+			while (((StatusReg & XIICPS_SR_TXDV_MASK) != (u32)0x00U) &&
+							(Error == 0)) {
+
+				/*
+				 * If master terminates the transfer before all data is
+				 * sent, it is an error.
+				 */
+				IntrStatusReg = XIicPs_ReadReg(BaseAddr,
+				XIICPS_ISR_OFFSET);
+				if ((IntrStatusReg & XIICPS_IXR_NACK_MASK) != 0x0U) {
+					Error = 1;
+				}
+
+				/* Clear ISR.
+				 */
+				XIicPs_WriteReg(BaseAddr, XIICPS_ISR_OFFSET,
+							IntrStatusReg);
+
+				StatusReg = XIicPs_ReadReg(BaseAddr,
+						XIICPS_SR_OFFSET);
+			}
+			Value = ((InstancePtr->SendByteCount > (s32)0) &&
+							(Error == 0));
+		}
+	}
+	if (Error != 0) {
+		Status = (s32)XST_FAILURE;
+	}
+
+	return Status;
+}
+/*****************************************************************************/
+/**
+* This function receives a buffer in polled mode as a slave.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+* @param	MsgPtr is the pointer to the receive buffer.
+* @param	ByteCount is the number of bytes to be received.
+*
+* @return
+*		- XST_SUCCESS if everything went well.
+*		- XST_FAILURE if timed out.
+*
+* @note		This receive routine is for polled mode transfer only.
+*
+****************************************************************************/
+s32 XIicPs_SlaveRecvPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount)
+{
+	u32 IntrStatusReg;
+	u32 StatusReg;
+	u32 BaseAddr;
+	s32 Count;
+
+	/*
+	 * Assert validates the input arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(MsgPtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+	InstancePtr->RecvBufferPtr = MsgPtr;
+	InstancePtr->RecvByteCount = ByteCount;
+
+	StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+
+	/*
+	 * Clear the interrupt status register.
+	 */
+	IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+	XIicPs_WriteReg(BaseAddr, XIICPS_ISR_OFFSET, IntrStatusReg);
+
+	/*
+	 * Clear the status register.
+	 */
+	StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+	XIicPs_WriteReg(BaseAddr, XIICPS_SR_OFFSET, StatusReg);
+
+	StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+	Count = InstancePtr->RecvByteCount;
+	while (Count > (s32)0) {
+
+		/* Wait for master to put data */
+		while ((StatusReg & XIICPS_SR_RXDV_MASK) == 0U) {
+		    StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+
+			/*
+			 * If master terminates the transfer before we get all
+			 * the data or the master tries to read from us,
+			 * it is an error.
+			 */
+			IntrStatusReg = XIicPs_ReadReg(BaseAddr,
+						XIICPS_ISR_OFFSET);
+			if (((IntrStatusReg & (XIICPS_IXR_DATA_MASK |
+					XIICPS_IXR_COMP_MASK))!=0x0U) &&
+				((StatusReg & XIICPS_SR_RXDV_MASK) == 0U) &&
+				((InstancePtr->RecvByteCount > 0) != 0x0U)) {
+
+				return (s32)XST_FAILURE;
+			}
+
+			/*
+			 * Clear the interrupt status register.
+			 */
+			XIicPs_WriteReg(BaseAddr, XIICPS_ISR_OFFSET,
+			IntrStatusReg);
+		}
+
+		/*
+		 * Read all data from FIFO.
+		 */
+		while (((StatusReg & XIICPS_SR_RXDV_MASK)!=0x0U) &&
+			 ((InstancePtr->RecvByteCount > 0) != 0x0U)){
+
+			XIicPs_RecvByte(InstancePtr);
+
+			StatusReg = XIicPs_ReadReg(BaseAddr,
+				XIICPS_SR_OFFSET);
+		}
+		Count = InstancePtr->RecvByteCount;
+	}
+
+	return (s32)XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* The interrupt handler for slave mode. It does the protocol handling for
+* the interrupt-driven transfers.
+*
+* Completion events and errors are signaled to upper layer for proper
+* handling.
+*
+* 
+*
+* The interrupts that are handled are:
+* - DATA
+*	If the instance is sending, it means that the master wants to read more
+*	data from us. Send more data, and check whether we are done with this
+*	send.
+*
+*	If the instance is receiving, it means that the master has writen
+* 	more data to us. Receive more data, and check whether we are done with
+*	with this receive.
+*
+* - COMP
+*	This marks that stop sequence has been sent from the master, transfer
+*	is about to terminate. However, for receiving, the master may have
+*	written us some data, so receive that first.
+*
+*	It is an error if the amount of transfered data is less than expected.
+*
+* - NAK
+*	This marks that master does not want our data. It is for send only.
+*
+* - Other interrupts
+*	These interrupts are marked as error.
+*
+* 

+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return	None.
+*
+* @note 	None.
+*
+****************************************************************************/
+void XIicPs_SlaveInterruptHandler(XIicPs *InstancePtr)
+{
+	u32 IntrStatusReg;
+	u32 IsSend = 0U;
+	u32 StatusEvent = 0U;
+	s32 LeftOver;
+	u32 BaseAddr;
+
+	/*
+	 * Assert validates the input arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == (u32)XIL_COMPONENT_IS_READY);
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+
+	/*
+	 * Read the Interrupt status register.
+	 */
+	IntrStatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_ISR_OFFSET);
+
+	/*
+	 * Write the status back to clear the interrupts so no events are missed
+	 * while processing this interrupt.
+	 */
+	XIicPs_WriteReg(BaseAddr, XIICPS_ISR_OFFSET, IntrStatusReg);
+
+	/*
+	 * Use the Mask register AND with the Interrupt Status register so
+	 * disabled interrupts are not processed.
+	 */
+	IntrStatusReg &= ~(XIicPs_ReadReg(BaseAddr, XIICPS_IMR_OFFSET));
+
+	/*
+	 * Determine whether the device is sending.
+	 */
+	if (InstancePtr->RecvBufferPtr == NULL) {
+		IsSend = 1U;
+	}
+
+	/* Data interrupt
+	 *
+	 * This means master wants to do more data transfers.
+	 * Also check for completion of transfer, signal upper layer if done.
+	 */
+	if ((u32)0U != (IntrStatusReg & XIICPS_IXR_DATA_MASK)) {
+		if (IsSend != 0x0U) {
+			LeftOver = TransmitFifoFill(InstancePtr);
+				/*
+				 * We may finish send here
+				 */
+				if (LeftOver == 0) {
+					StatusEvent |=
+						XIICPS_EVENT_COMPLETE_SEND;
+				}
+		} else {
+			LeftOver = SlaveRecvData(InstancePtr);
+
+			/* We may finish the receive here */
+			if (LeftOver == 0) {
+				StatusEvent |= XIICPS_EVENT_COMPLETE_RECV;
+			}
+		}
+	}
+
+	/*
+	 * Complete interrupt.
+	 *
+	 * In slave mode, it means the master has done with this transfer, so
+	 * we signal the application using completion event.
+	 */
+	if (0U != (IntrStatusReg & XIICPS_IXR_COMP_MASK)) {
+		if (IsSend != 0x0U) {
+			if (InstancePtr->SendByteCount > 0) {
+				StatusEvent |= XIICPS_EVENT_ERROR;
+			}else {
+				StatusEvent |= XIICPS_EVENT_COMPLETE_SEND;
+			}
+		} else {
+			LeftOver = SlaveRecvData(InstancePtr);
+			if (LeftOver > 0) {
+				StatusEvent |= XIICPS_EVENT_ERROR;
+			} else {
+				StatusEvent |= XIICPS_EVENT_COMPLETE_RECV;
+			}
+		}
+	}
+
+	/*
+	 * Nack interrupt, pass this information to application.
+	 */
+	if (0U != (IntrStatusReg & XIICPS_IXR_NACK_MASK)) {
+		StatusEvent |= XIICPS_EVENT_NACK;
+	}
+
+	/*
+	 * All other interrupts are treated as error.
+	 */
+	if (0U != (IntrStatusReg & (XIICPS_IXR_TO_MASK |
+				XIICPS_IXR_RX_UNF_MASK |
+				XIICPS_IXR_TX_OVR_MASK |
+				XIICPS_IXR_RX_OVR_MASK))){
+
+		StatusEvent |= XIICPS_EVENT_ERROR;
+	}
+
+	/*
+	 * Signal application if there are any events.
+	 */
+	if ((u32)0U != StatusEvent) {
+		InstancePtr->StatusHandler(InstancePtr->CallBackRef,
+					   StatusEvent);
+	}
+}
+
+/*****************************************************************************/
+/*
+*
+* This function handles continuation of receiving data. It is invoked
+* from interrupt handler.
+*
+* @param	InstancePtr is a pointer to the XIicPs instance.
+*
+* @return	Number of bytes still expected by the instance.
+*
+* @note		None.
+*
+****************************************************************************/
+static s32 SlaveRecvData(XIicPs *InstancePtr)
+{
+	u32 StatusReg;
+	u32 BaseAddr;
+
+	BaseAddr = InstancePtr->Config.BaseAddress;
+
+	StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+
+	while (((StatusReg & XIICPS_SR_RXDV_MASK)!=0x0U) &&
+			((InstancePtr->RecvByteCount > 0) != 0x0U)) {
+		XIicPs_RecvByte(InstancePtr);
+		StatusReg = XIicPs_ReadReg(BaseAddr, XIICPS_SR_OFFSET);
+	}
+
+	return InstancePtr->RecvByteCount;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/ipipsu_v2_3/src/Makefile b/src/Xilinx/libsrc/ipipsu_v2_3/src/Makefile
new file mode 100644
index 0000000..3e1fc71
--- /dev/null
+++ b/src/Xilinx/libsrc/ipipsu_v2_3/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xipipsu_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling ipipsu"
+
+xipipsu_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xipipsu_includes
+
+xipipsu_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/ipipsu_v2_3/src/subdir.mk b/src/Xilinx/libsrc/ipipsu_v2_3/src/subdir.mk
new file mode 100644
index 0000000..a767dde
--- /dev/null
+++ b/src/Xilinx/libsrc/ipipsu_v2_3/src/subdir.mk
@@ -0,0 +1,3 @@
+SRC += $(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu.c
+SRC += $(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_g.c
+SRC += $(SRC_DIR)/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_sinit.c
diff --git a/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu.c b/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu.c
new file mode 100644
index 0000000..06d9ced
--- /dev/null
+++ b/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu.c
@@ -0,0 +1,392 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xipipsu.c
+* @addtogroup ipipsu_v2_3
+* @{
+*
+* This file contains the implementation of the interface functions for XIpiPsu
+* driver. Refer to the header file xipipsu.h for more detailed information.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver	Who	Date	Changes
+* ----- ------ -------- ----------------------------------------------
+* 1.00	mjr	03/15/15	First Release
+* 2.0	mjr	01/22/16	Fixed response buffer address
+*                               calculation. CR# 932582.
+* 2.1	kvn	05/05/16	Modified code for MISRA-C:2012 Compliance
+* 2.2	kvn	02/17/17	Add support for updating ConfigTable at run time
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xipipsu.h"
+#include "xipipsu_hw.h"
+
+/************************** Variable Definitions *****************************/
+extern XIpiPsu_Config XIpiPsu_ConfigTable[XPAR_XIPIPSU_NUM_INSTANCES];
+
+/****************************************************************************/
+/**
+ * Initialize the Instance pointer based on a given Config Pointer
+ *
+ * @param	InstancePtr is a pointer to the instance to be worked on
+ * @param	CfgPtr is the device configuration structure containing required
+ *		  	hardware build data
+ * @param	EffectiveAddress is the base address of the device. If address
+ *        	translation is not utilized, this parameter can be passed in using
+ *        	CfgPtr->Config.BaseAddress to specify the physical base address.
+ * @return	XST_SUCCESS if initialization was successful
+ * 			XST_FAILURE in case of failure
+ *
+ */
+
+XStatus XIpiPsu_CfgInitialize(XIpiPsu *InstancePtr, XIpiPsu_Config * CfgPtr,
+		UINTPTR EffectiveAddress)
+{
+	u32 Index;
+	/* Verify arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(CfgPtr != NULL);
+	/* Set device base address and ID */
+	InstancePtr->Config.DeviceId = CfgPtr->DeviceId;
+	InstancePtr->Config.BaseAddress = EffectiveAddress;
+	InstancePtr->Config.BitMask = CfgPtr->BitMask;
+	InstancePtr->Config.IntId = CfgPtr->IntId;
+
+	InstancePtr->Config.TargetCount = CfgPtr->TargetCount;
+
+	for (Index = 0U; Index < CfgPtr->TargetCount; Index++) {
+		InstancePtr->Config.TargetList[Index].Mask =
+				CfgPtr->TargetList[Index].Mask;
+		InstancePtr->Config.TargetList[Index].BufferIndex =
+				CfgPtr->TargetList[Index].BufferIndex;
+	}
+
+	/* Mark the component as Ready */
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+	return (XST_SUCCESS);
+}
+
+/**
+ * @brief	Reset the given IPI register set.
+ *        	This function can be called to disable the IPIs from all
+ *        	the sources and clear any pending IPIs in status register
+ *
+ * @param 	InstancePtr is the pointer to current IPI instance
+ *
+ */
+
+void XIpiPsu_Reset(XIpiPsu *InstancePtr)
+{
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/**************Disable***************/
+
+	XIpiPsu_WriteReg(InstancePtr->Config.BaseAddress, XIPIPSU_IDR_OFFSET,
+			XIPIPSU_ALL_MASK);
+
+	/**************Clear***************/
+	XIpiPsu_WriteReg(InstancePtr->Config.BaseAddress, XIPIPSU_ISR_OFFSET,
+			XIPIPSU_ALL_MASK);
+
+}
+
+/**
+ * @brief	Trigger an IPI to a Destination CPU
+ *
+ * @param	InstancePtr is the pointer to current IPI instance
+ * @param	DestCpuMask is the Mask of the CPU to which IPI is to be triggered
+ *
+ *
+ * @return	XST_SUCCESS if successful
+ * 			XST_FAILURE if an error occurred
+ */
+
+XStatus XIpiPsu_TriggerIpi(XIpiPsu *InstancePtr, u32 DestCpuMask)
+{
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Trigger an IPI to the Target */
+	XIpiPsu_WriteReg(InstancePtr->Config.BaseAddress, XIPIPSU_TRIG_OFFSET,
+			DestCpuMask);
+	return XST_SUCCESS;
+
+}
+
+/**
+ * @brief Poll for an acknowledgement using Observation Register
+ *
+ * @param	InstancePtr is the pointer to current IPI instance
+ * @param	DestCpuMask is the Mask of the destination CPU from which ACK is expected
+ * @param	TimeOutCount is the Count after which the routines returns failure
+ *
+ * @return	XST_SUCCESS if successful
+ * 			XST_FAILURE if a timeout occurred
+ */
+
+XStatus XIpiPsu_PollForAck(XIpiPsu *InstancePtr, u32 DestCpuMask,
+		u32 TimeOutCount)
+{
+	u32 Flag, PollCount;
+	XStatus Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	PollCount = 0U;
+	/* Poll the OBS register until the corresponding DestCpu bit is cleared */
+	do {
+		Flag = (XIpiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+				XIPIPSU_OBS_OFFSET)) & (DestCpuMask);
+		PollCount++;
+		/* Check if the IPI was Acknowledged by the Target or we Timed Out*/
+	} while ((0x00000000U != Flag) && (PollCount < TimeOutCount));
+
+	if (PollCount >= TimeOutCount) {
+		Status = XST_FAILURE;
+	} else {
+		Status = XST_SUCCESS;
+	}
+
+	return Status;
+}
+
+/**
+ * @brief	Get the Buffer Index for a CPU specified by Mask
+ *
+ * @param	InstancePtr is the pointer to current IPI instance
+ * @param	CpuMask is the Mask of the CPU form which Index is required
+ *
+ * @return	Buffer Index value if CPU Mask is valid
+ * 			XIPIPSU_MAX_BUFF_INDEX+1 if not valid
+ *
+ * @note	Static function used only by XIpiPsu_GetBufferAddress
+ *
+ */
+static u32 XIpiPsu_GetBufferIndex(XIpiPsu *InstancePtr, u32 CpuMask)
+{
+	u32 BufferIndex;
+	u32 Index;
+	/* Init Index with an invalid value */
+	BufferIndex = XIPIPSU_MAX_BUFF_INDEX + 1U;
+
+	/*Search for CPU in the List */
+	for (Index = 0U; Index < InstancePtr->Config.TargetCount; Index++) {
+		/*If we find the CPU , then set the Index and break the loop*/
+		if (InstancePtr->Config.TargetList[Index].Mask == CpuMask) {
+			BufferIndex = InstancePtr->Config.TargetList[Index].BufferIndex;
+			break;
+		}
+	}
+
+	/* Return the Index */
+	return BufferIndex;
+}
+
+/**
+ * @brief	Get the Buffer Address for a given pair of CPUs
+ *
+ * @param	InstancePtr is the pointer to current IPI instance
+ * @param	SrcCpuMask is the Mask for Source CPU
+ * @param	DestCpuMask is the Mask for Destination CPU
+ * @param	BufferType is either XIPIPSU_BUF_TYPE_MSG or XIPIPSU_BUF_TYPE_RESP
+ *
+ * @return	Valid Buffer Address if no error
+ * 			NULL if an error occurred in calculating Address
+ *
+ */
+
+static u32* XIpiPsu_GetBufferAddress(XIpiPsu *InstancePtr, u32 SrcCpuMask,
+		u32 DestCpuMask, u32 BufferType)
+{
+#ifdef __aarch64__
+	u64 BufferAddr;
+#else
+	u32 BufferAddr;
+#endif
+
+	u32 SrcIndex;
+	u32 DestIndex;
+	/* Get the buffer indices */
+	SrcIndex = XIpiPsu_GetBufferIndex(InstancePtr, SrcCpuMask);
+	DestIndex = XIpiPsu_GetBufferIndex(InstancePtr, DestCpuMask);
+
+	/* If we got an invalid buffer index, then return NULL pointer, else valid address */
+	if ((SrcIndex > XIPIPSU_MAX_BUFF_INDEX)
+			|| (DestIndex > XIPIPSU_MAX_BUFF_INDEX)) {
+		BufferAddr = 0U;
+	} else {
+
+		if (XIPIPSU_BUF_TYPE_MSG == BufferType) {
+			BufferAddr = XIPIPSU_MSG_RAM_BASE
+					+ (SrcIndex * XIPIPSU_BUFFER_OFFSET_GROUP)
+					+ (DestIndex * XIPIPSU_BUFFER_OFFSET_TARGET);
+		} else if (XIPIPSU_BUF_TYPE_RESP == BufferType) {
+			BufferAddr = XIPIPSU_MSG_RAM_BASE
+					+ (DestIndex * XIPIPSU_BUFFER_OFFSET_GROUP)
+					+ (SrcIndex * XIPIPSU_BUFFER_OFFSET_TARGET)
+					+ (XIPIPSU_BUFFER_OFFSET_RESPONSE);
+		} else {
+			BufferAddr = 0U;
+		}
+
+	}
+
+	return (u32 *) BufferAddr;
+}
+
+/**
+ * @brief	Read an Incoming Message from a Source
+ *
+ * @param 	InstancePtr is the pointer to current IPI instance
+ * @param 	SrcCpuMask is the Device Mask for the CPU which has sent the message
+ * @param 	MsgPtr is the pointer to Buffer to which the read message needs to be stored
+ * @param 	MsgLength is the length of the buffer/message
+ * @param 	BufferType is the type of buffer (XIPIPSU_BUF_TYPE_MSG or XIPIPSU_BUF_TYPE_RESP)
+ *
+ * @return	XST_SUCCESS if successful
+ * 			XST_FAILURE if an error occurred
+ */
+
+XStatus XIpiPsu_ReadMessage(XIpiPsu *InstancePtr, u32 SrcCpuMask, u32 *MsgPtr,
+		u32 MsgLength, u8 BufferType)
+{
+	u32 *BufferPtr;
+	u32 Index;
+	XStatus Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(MsgPtr != NULL);
+	Xil_AssertNonvoid(MsgLength <= XIPIPSU_MAX_MSG_LEN);
+
+	BufferPtr = XIpiPsu_GetBufferAddress(InstancePtr, SrcCpuMask,
+			InstancePtr->Config.BitMask, BufferType);
+	if (BufferPtr != NULL) {
+		/* Copy the IPI Buffer contents into Users's Buffer*/
+		for (Index = 0U; Index < MsgLength; Index++) {
+			MsgPtr[Index] = BufferPtr[Index];
+		}
+		Status = XST_SUCCESS;
+	} else {
+		Status = XST_FAILURE;
+	}
+
+	return Status;
+}
+
+
+/**
+ * @brief	Send a Message to Destination
+ *
+ * @param	InstancePtr is the pointer to current IPI instance
+ * @param	DestCpuMask is the Device Mask for the destination CPU
+ * @param	MsgPtr is the pointer to Buffer which contains the message to be sent
+ * @param	MsgLength is the length of the buffer/message
+ * @param	BufferType is the type of buffer (XIPIPSU_BUF_TYPE_MSG or XIPIPSU_BUF_TYPE_RESP)
+ *
+ * @return	XST_SUCCESS if successful
+ * 			XST_FAILURE if an error occurred
+ */
+
+XStatus XIpiPsu_WriteMessage(XIpiPsu *InstancePtr, u32 DestCpuMask, u32 *MsgPtr,
+		u32 MsgLength, u8 BufferType)
+{
+	u32 *BufferPtr;
+	u32 Index;
+	XStatus Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(MsgPtr != NULL);
+	Xil_AssertNonvoid(MsgLength <= XIPIPSU_MAX_MSG_LEN);
+
+	BufferPtr = XIpiPsu_GetBufferAddress(InstancePtr,
+			InstancePtr->Config.BitMask, DestCpuMask, BufferType);
+	if (BufferPtr != NULL) {
+		/* Copy the Message to IPI Buffer */
+		for (Index = 0U; Index < MsgLength; Index++) {
+			BufferPtr[Index] = MsgPtr[Index];
+		}
+		Status = XST_SUCCESS;
+	} else {
+		Status = XST_FAILURE;
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* Set up the device configuration based on the unique device ID. A table
+* contains the configuration info for each device in the system.
+*
+* @param	DeviceId contains the ID of the device to set up the
+*			configuration for.
+*
+* @return	A pointer to the device configuration for the specified
+*			device ID. See xipipsu.h for the definition of
+*			XIpiPsu_Config.
+*
+* @note		This is for safety use case where in this function has to
+* 			be called before CfgInitialize. So that driver will be
+* 			initialized with the provided configuration. For non-safe
+* 			use cases, this is not needed.
+*
+******************************************************************************/
+void XIpiPsu_SetConfigTable(u32 DeviceId, XIpiPsu_Config *ConfigTblPtr)
+{
+	u32 Index;
+
+	Xil_AssertVoid(ConfigTblPtr != NULL);
+
+	for (Index = 0U; Index < XPAR_XIPIPSU_NUM_INSTANCES; Index++) {
+		if (XIpiPsu_ConfigTable[Index].DeviceId == DeviceId) {
+			XIpiPsu_ConfigTable[Index].BaseAddress = ConfigTblPtr->BaseAddress;
+			XIpiPsu_ConfigTable[Index].BitMask = ConfigTblPtr->BitMask;
+			XIpiPsu_ConfigTable[Index].BufferIndex = ConfigTblPtr->BufferIndex;
+			XIpiPsu_ConfigTable[Index].IntId = ConfigTblPtr->IntId;
+		}
+	}
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu.h b/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu.h
new file mode 100644
index 0000000..83701f4
--- /dev/null
+++ b/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu.h
@@ -0,0 +1,298 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+ * @file xipipsu.h
+* @addtogroup ipipsu_v2_3
+* @{
+* @details
+ *
+ * This is the header file for implementation of IPIPSU driver.
+ * Inter Processor Interrupt (IPI) is used for communication between
+ * different processors on ZynqMP SoC. Each IPI register set has Trigger, Status
+ * and Observation registers for communication between processors. Each IPI path
+ * has a 32 byte buffer associated with it and these buffers are located in the
+ * XPPU RAM. This driver supports the following operations:
+ *
+ * - Trigger IPIs to CPUs on the SoC
+ * - Write and Read Message buffers
+ * - Read the status of Observation Register to get status of Triggered IPI
+ * - Enable/Disable IPIs from selected Masters
+ * - Read the Status register to get the source of an incoming IPI
+ *
+ * Initialization
+ * The config data for the driver is loaded and is based on the HW build. The
+ * XIpiPsu_Config data structure contains all the data related to the
+ * IPI driver instance and also teh available Target CPUs.
+ *
+ * Sending an IPI
+ * The following steps can be followed to send an IPI:
+ * - Write the Message into Message Buffer using XIpiPsu_WriteMessage()
+ * - Trigger IPI using XIpiPsu_TriggerIpi()
+ * - Wait for Ack using XIpiPsu_PollForAck()
+ * - Read response using XIpiPsu_ReadMessage()
+ *
+ * @note	XIpiPsu_GetObsStatus() before sending an IPI to ensure that the
+ * previous IPI was serviced by the target
+ *
+ * Receiving an IPI
+ * To receive an IPI, the following sequence can be followed:
+ * - Register an interrupt handler for the IPIs interrupt ID
+ * - Enable the required sources using XIpiPsu_InterruptEnable()
+ * - In the interrupt handler, Check for source using XIpiPsu_GetInterruptStatus
+ * - Read the message form source using XIpiPsu_ReadMessage()
+ * - Write the response using XIpiPsu_WriteMessage()
+ * - Ack the IPI using XIpiPsu_ClearInterruptStatus()
+ *
+ * @note	XIpiPsu_Reset can be used at startup to clear the status and
+ * disable all sources
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver  Who Date     Changes
+ * ---- --- -------- --------------------------------------------------
+ * 2.2  ms  01/23/17 Modified xil_printf statement in main function for all
+ *                    examples to ensure that "Successfully ran" and "Failed"
+ *                    strings are available in all examples. This is a fix
+ *                    for CR-965028.
+ *  	kvn 02/17/17  Add support for updating ConfigTable at run time
+ *      ms  03/17/17  Added readme.txt file in examples folder for doxygen
+ *                    generation.
+ * 2.3  ms  04/11/17  Modified tcl file to add suffix U for all macro
+ *                    definitions of ipipsu in xparameters.h
+ * 

+ *
+ *****************************************************************************/
+/*****************************************************************************/
+#ifndef XIPIPSU_H_
+#define XIPIPSU_H_
+
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "xstatus.h"
+#include "xipipsu_hw.h"
+
+/************************** Constant Definitions *****************************/
+#define XIPIPSU_BUF_TYPE_MSG	(0x00000001U)
+#define XIPIPSU_BUF_TYPE_RESP	(0x00000002U)
+#define XIPIPSU_MAX_MSG_LEN		XIPIPSU_MSG_BUF_SIZE
+/**************************** Type Definitions *******************************/
+/**
+ * Data structure used to refer IPI Targets
+ */
+typedef struct {
+	u32 Mask; /**< Bit Mask for the target */
+	u32 BufferIndex; /**< Buffer Index used for calculating buffer address */
+} XIpiPsu_Target;
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u32 DeviceId; /**< Unique ID  of device */
+	u32 BaseAddress; /**< Base address of the device */
+	u32 BitMask; /**< BitMask to be used to identify this CPU */
+	u32 BufferIndex; /**< Index of the IPI Message Buffer */
+	u32 IntId; /**< Interrupt ID on GIC **/
+	u32 TargetCount; /**< Number of available IPI Targets */
+	XIpiPsu_Target TargetList[XIPIPSU_MAX_TARGETS] ; /** < List of IPI Targets */
+} XIpiPsu_Config;
+
+/**
+ * The XIpiPsu driver instance data. The user is required to allocate a
+ * variable of this type for each IPI device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XIpiPsu_Config Config; /**< Configuration structure */
+	u32 IsReady; /**< Device is initialized and ready */
+	u32 Options; /**< Options set in the device */
+} XIpiPsu;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+/**
+*
+* Read the register specified by the base address and offset
+*
+* @param	BaseAddress is the base address of the IPI instance
+* @param	RegOffset is the offset of the register relative to base
+*
+* @return	Value of the specified register
+* @note
+* C-style signature
+*	u32 XIpiPsu_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+*****************************************************************************/
+
+#define XIpiPsu_ReadReg(BaseAddress, RegOffset) \
+		Xil_In32((BaseAddress) + (RegOffset))
+
+/****************************************************************************/
+/**
+*
+* Write a value into a register specified by base address and offset
+*
+* @param BaseAddress is the base address of the IPI instance
+* @param RegOffset is the offset of the register relative to base
+* @param Data is a 32-bit value that is to be written into the specified register
+*
+* @note
+* C-style signature
+*	void XIpiPsu_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+*****************************************************************************/
+
+#define XIpiPsu_WriteReg(BaseAddress, RegOffset, Data) \
+		Xil_Out32(((BaseAddress) + (RegOffset)), (Data))
+
+/****************************************************************************/
+/**
+*
+* Enable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be enabled.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Mask contains a bit mask of interrupts to enable. The mask can
+*			be formed using a set of bitwise or'd values of individual CPU masks
+*
+* @note
+* C-style signature
+*	void XIpiPsu_InterruptEnable(XIpiPsu *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XIpiPsu_InterruptEnable(InstancePtr, Mask) \
+	XIpiPsu_WriteReg((InstancePtr)->Config.BaseAddress, \
+		XIPIPSU_IER_OFFSET, \
+		((Mask) & XIPIPSU_ALL_MASK));
+
+/****************************************************************************/
+/**
+*
+* Disable interrupts specified in Mask. The corresponding interrupt for
+* each bit set to 1 in Mask, will be disabled.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Mask contains a bit mask of interrupts to disable. The mask can
+*			be formed using a set of bitwise or'd values of individual CPU masks
+*
+* @note
+* C-style signature
+*	void XIpiPsu_InterruptDisable(XIpiPsu *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+#define XIpiPsu_InterruptDisable(InstancePtr, Mask)  \
+	XIpiPsu_WriteReg((InstancePtr)->Config.BaseAddress, \
+		XIPIPSU_IDR_OFFSET, \
+		((Mask) & XIPIPSU_ALL_MASK));
+/****************************************************************************/
+/**
+*
+* Get the STATUS REGISTER of the current IPI instance.
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @return Returns the Interrupt Status register(ISR) contents
+* @note User needs to parse this 32-bit value to check the source CPU
+* C-style signature
+*	u32 XIpiPsu_GetInterruptStatus(XIpiPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XIpiPsu_GetInterruptStatus(InstancePtr)  \
+	XIpiPsu_ReadReg((InstancePtr)->Config.BaseAddress, \
+		XIPIPSU_ISR_OFFSET)
+/****************************************************************************/
+/**
+*
+* Clear the STATUS REGISTER of the current IPI instance.
+* The corresponding interrupt status for
+* each bit set to 1 in Mask, will be cleared
+*
+* @param InstancePtr is a pointer to the instance to be worked on.
+* @param Mask corresponding to the source CPU*
+*
+* @note This function should be used after handling the IPI.
+* Clearing the status will automatically clear the corresponding bit in
+* OBSERVATION register of Source CPU
+* C-style signature
+*	void XIpiPsu_ClearInterruptStatus(XIpiPsu *InstancePtr, u32 Mask)
+*
+*****************************************************************************/
+
+#define XIpiPsu_ClearInterruptStatus(InstancePtr, Mask)  \
+	XIpiPsu_WriteReg((InstancePtr)->Config.BaseAddress, \
+		XIPIPSU_ISR_OFFSET, \
+		((Mask) & XIPIPSU_ALL_MASK));
+/****************************************************************************/
+/**
+*
+* Get the OBSERVATION REGISTER of the current IPI instance.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @return	Returns the Observation register(OBS) contents
+* @note		User needs to parse this 32-bit value to check the status of
+*			individual CPUs
+* C-style signature
+*	u32 XIpiPsu_GetObsStatus(XIpiPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XIpiPsu_GetObsStatus(InstancePtr)  \
+	XIpiPsu_ReadReg((InstancePtr)->Config.BaseAddress, \
+		XIPIPSU_OBS_OFFSET)
+/****************************************************************************/
+/************************** Function Prototypes *****************************/
+
+/* Static lookup function implemented in xipipsu_sinit.c */
+
+XIpiPsu_Config *XIpiPsu_LookupConfig(u32 DeviceId);
+
+/* Interface Functions implemented in xipipsu.c */
+
+XStatus XIpiPsu_CfgInitialize(XIpiPsu *InstancePtr, XIpiPsu_Config * CfgPtr,
+		UINTPTR EffectiveAddress);
+
+void XIpiPsu_Reset(XIpiPsu *InstancePtr);
+
+XStatus XIpiPsu_TriggerIpi(XIpiPsu *InstancePtr, u32 DestCpuMask);
+
+XStatus XIpiPsu_PollForAck(XIpiPsu *InstancePtr, u32 DestCpuMask,
+		u32 TimeOutCount);
+
+XStatus XIpiPsu_ReadMessage(XIpiPsu *InstancePtr, u32 SrcCpuMask, u32 *MsgPtr,
+		u32 MsgLength, u8 BufferType);
+
+XStatus XIpiPsu_WriteMessage(XIpiPsu *InstancePtr, u32 DestCpuMask, u32 *MsgPtr,
+		u32 MsgLength, u8 BufferType);
+void XIpiPsu_SetConfigTable(u32 DeviceId, XIpiPsu_Config *ConfigTblPtr);
+
+#endif /* XIPIPSU_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_g.c b/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_g.c
new file mode 100644
index 0000000..13e7bc4
--- /dev/null
+++ b/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_g.c
@@ -0,0 +1,89 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xipipsu.h"
+
+/*
+* The configuration table for devices
+*/
+
+XIpiPsu_Config XIpiPsu_ConfigTable[XPAR_XIPIPSU_NUM_INSTANCES] =
+{
+
+	{
+		XPAR_PSU_IPI_1_DEVICE_ID,
+		XPAR_PSU_IPI_1_BASE_ADDRESS,
+		XPAR_PSU_IPI_1_BIT_MASK,
+		XPAR_PSU_IPI_1_BUFFER_INDEX,
+		XPAR_PSU_IPI_1_INT_ID,
+		XPAR_XIPIPSU_NUM_TARGETS,
+		{
+
+			{
+				XPAR_PSU_IPI_0_BIT_MASK,
+				XPAR_PSU_IPI_0_BUFFER_INDEX
+			},
+			{
+				XPAR_PSU_IPI_1_BIT_MASK,
+				XPAR_PSU_IPI_1_BUFFER_INDEX
+			},
+			{
+				XPAR_PSU_IPI_2_BIT_MASK,
+				XPAR_PSU_IPI_2_BUFFER_INDEX
+			},
+			{
+				XPAR_PSU_IPI_3_BIT_MASK,
+				XPAR_PSU_IPI_3_BUFFER_INDEX
+			},
+			{
+				XPAR_PSU_IPI_4_BIT_MASK,
+				XPAR_PSU_IPI_4_BUFFER_INDEX
+			},
+			{
+				XPAR_PSU_IPI_5_BIT_MASK,
+				XPAR_PSU_IPI_5_BUFFER_INDEX
+			},
+			{
+				XPAR_PSU_IPI_6_BIT_MASK,
+				XPAR_PSU_IPI_6_BUFFER_INDEX
+			}
+		}
+	}
+};
diff --git a/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_hw.h b/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_hw.h
new file mode 100644
index 0000000..5a32021
--- /dev/null
+++ b/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_hw.h
@@ -0,0 +1,80 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/**
+*
+* @file xipipsu_hw.h
+* @addtogroup ipipsu_v2_3
+* @{
+*
+* This file contains macro definitions for low level HW related params
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------.
+* 1.0   mjr  03/15/15 First release
+* 2.1   kvn  05/05/16 Modified code for MISRA-C:2012 Compliance
+*
+* 

+*
+******************************************************************************/
+#ifndef XIPIPSU_HW_H_	/* prevent circular inclusions */
+#define XIPIPSU_HW_H_	/* by using protection macros */
+
+/************************** Constant Definitions *****************************/
+/* Message RAM related params */
+#define XIPIPSU_MSG_RAM_BASE 0xFF990000U
+#define XIPIPSU_MSG_BUF_SIZE 8U	/* Size in Words */
+#define XIPIPSU_MAX_BUFF_INDEX	7U
+
+/* EIGHT pairs of TWO buffers(msg+resp) of THIRTY TWO bytes each */
+#define XIPIPSU_BUFFER_OFFSET_GROUP	(8U * 2U * 32U)
+#define XIPIPSU_BUFFER_OFFSET_TARGET (32U * 2U)
+#define XIPIPSU_BUFFER_OFFSET_RESPONSE		(32U)
+
+/* Number of IPI slots enabled on the device */
+#define XIPIPSU_MAX_TARGETS	XPAR_XIPIPSU_NUM_TARGETS
+
+/* Register Offsets for each member  of IPI Register Set */
+#define XIPIPSU_TRIG_OFFSET 0x00U
+#define XIPIPSU_OBS_OFFSET 0x04U
+#define XIPIPSU_ISR_OFFSET 0x10U
+#define XIPIPSU_IMR_OFFSET 0x14U
+#define XIPIPSU_IER_OFFSET 0x18U
+#define XIPIPSU_IDR_OFFSET 0x1CU
+
+/* MASK of all valid IPI bits in above registers */
+#define XIPIPSU_ALL_MASK	0x0F0F0301U
+
+#endif /* XIPIPSU_HW_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_sinit.c b/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_sinit.c
new file mode 100644
index 0000000..6f52a63
--- /dev/null
+++ b/src/Xilinx/libsrc/ipipsu_v2_3/src/xipipsu_sinit.c
@@ -0,0 +1,91 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/**
+*
+* @file xipipsu_sinit.c
+* @addtogroup ipipsu_v2_3
+* @{
+*
+* The implementation of the XIpiPsu component's static initialization
+* functionality.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------
+* 1.0   mjr  03/15/15 First release
+* 2.1   kvn  05/05/16 Modified code for MISRA-C:2012 Compliance
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xparameters.h"
+#include "xipipsu.h"
+
+/************************** Variable Definitions *****************************/
+extern XIpiPsu_Config XIpiPsu_ConfigTable[];
+
+/*****************************************************************************/
+
+/**
+*
+* Looks up the device configuration based on the unique device ID. A table
+* contains the configuration info for each device in the system.
+*
+* @param	DeviceId contains the ID of the device to look up the
+*			configuration for.
+*
+* @return	A pointer to the configuration found or NULL if the specified
+*			device ID was not found. See xipipsu.h for the definition of
+*			XIpiPsu_Config.
+*
+* @note		None.
+*
+******************************************************************************/
+XIpiPsu_Config *XIpiPsu_LookupConfig(u32 DeviceId)
+{
+	XIpiPsu_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index = 0U; Index < XPAR_XIPIPSU_NUM_INSTANCES; Index++) {
+		if (XIpiPsu_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XIpiPsu_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/qspipsu_v1_7/src/Makefile b/src/Xilinx/libsrc/qspipsu_v1_7/src/Makefile
new file mode 100644
index 0000000..88a66dd
--- /dev/null
+++ b/src/Xilinx/libsrc/qspipsu_v1_7/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xqspipsu_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling qspipsu"
+
+xqspipsu_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xqspipsu_includes
+
+xqspipsu_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu.c b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu.c
new file mode 100644
index 0000000..60eee53
--- /dev/null
+++ b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu.c
@@ -0,0 +1,1554 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xqspipsu.c
+* @addtogroup qspipsu_v1_7
+* @{
+*
+* This file implements the functions required to use the QSPIPSU hardware to
+* perform a transfer. These are accessible to the user via xqspipsu.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------
+* 1.0   hk  08/21/14 First release
+*       sk  03/13/15 Added IO mode support.
+*       hk  03/18/15 Switch to I/O mode before clearing RX FIFO.
+*                    Clear and disbale DMA interrupts/status in abort.
+*                    Use DMA DONE bit instead of BUSY as recommended.
+*       sk  04/24/15 Modified the code according to MISRAC-2012.
+*       sk  06/17/15 Removed NULL checks for Rx/Tx buffers. As
+*                    writing/reading from 0x0 location is permitted.
+* 1.1   sk  04/12/16 Added debug message prints.
+* 1.2	nsk 07/01/16 Changed XQspiPsu_Select to support GQSPI and LQSPI
+*		     selection.
+*       rk  07/15/16 Added support for TapDelays at different frequencies.
+*	nsk 08/05/16 Added example support PollData and PollTimeout
+* 1.3	nsk 09/16/16 Update PollData and PollTimeout support for dual
+*	             parallel configurations, modified XQspiPsu_PollData()
+*	             and XQspiPsu_Create_PollConfigData()
+* 1,5	nsk 08/14/17 Added CCI support
+* 1.7	tjs	01/16/18 Removed the check for DMA MSB to be written. (CR#992560)
+* 1.7	tjs 01/17/18 Added a support to toggle WP pin of the flash.
+* 1.7	tjs	03/14/18 Added support in EL1 NS mode (CR#974882)
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xqspipsu.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+static void StubStatusHandler(void *CallBackRef, u32 StatusEvent,
+			u32 ByteCount);
+static inline u32 XQspiPsu_SelectSpiMode(u8 SpiMode);
+static inline void XQspiPsu_TXRXSetup(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg,
+			u32 *GenFifoEntry);
+static inline void XQspiPsu_FillTxFifo(XQspiPsu *InstancePtr,
+			XQspiPsu_Msg *Msg, s32 Size);
+static inline void XQspiPsu_SetupRxDma(XQspiPsu *InstancePtr,
+			XQspiPsu_Msg *Msg);
+static inline void XQspiPsu_GenFifoEntryCSAssert(XQspiPsu *InstancePtr);
+static inline void XQspiPsu_GenFifoEntryData(XQspiPsu *InstancePtr,
+			XQspiPsu_Msg *Msg, s32 Index);
+static inline void XQspiPsu_GenFifoEntryCSDeAssert(XQspiPsu *InstancePtr);
+static inline void XQspiPsu_ReadRxFifo(XQspiPsu *InstancePtr,
+			XQspiPsu_Msg *Msg, s32 Size);
+static inline void XQspiPsu_PollData(XQspiPsu *QspiPsuPtr,
+		XQspiPsu_Msg *FlashMsg);
+static inline u32 XQspiPsu_Create_PollConfigData(XQspiPsu *QspiPsuPtr,
+		XQspiPsu_Msg *FlashMsg);
+
+/************************** Variable Definitions *****************************/
+
+/*****************************************************************************/
+/**
+*
+* Initializes a specific XQspiPsu instance such that the driver is ready to use.
+*
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	ConfigPtr is a reference to a structure containing information
+*		about a specific QSPIPSU device. This function initializes an
+*		InstancePtr object for a specific device specified by the
+*		contents of Config.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. The caller is responsible for keeping the address
+*		mapping from EffectiveAddr to the device physical base address
+*		unchanged once this function is invoked. Unexpected errors may
+*		occur if the address mapping changes after this function is
+*		called. If address translation is not used, use
+*		ConfigPtr->Config.BaseAddress for this device.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_DEVICE_IS_STARTED if the device is already started.
+*		It must be stopped to re-initialize.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XQspiPsu_CfgInitialize(XQspiPsu *InstancePtr, XQspiPsu_Config *ConfigPtr,
+				u32 EffectiveAddr)
+{
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+	s32 Status;
+
+	/*
+	 * If the device is busy, disallow the initialize and return a status
+	 * indicating it is already started. This allows the user to stop the
+	 * device and re-initialize, but prevents a user from inadvertently
+	 * initializing. This assumes the busy flag is cleared at startup.
+	 */
+	if (InstancePtr->IsBusy == TRUE) {
+		Status = (s32)XST_DEVICE_IS_STARTED;
+	} else {
+
+		/* Set some default values. */
+		InstancePtr->IsBusy = FALSE;
+
+		InstancePtr->Config.BaseAddress = EffectiveAddr + XQSPIPSU_OFFSET;
+		InstancePtr->Config.ConnectionMode = ConfigPtr->ConnectionMode;
+		InstancePtr->StatusHandler = StubStatusHandler;
+		InstancePtr->Config.BusWidth = ConfigPtr->BusWidth;
+		InstancePtr->Config.InputClockHz = ConfigPtr->InputClockHz;
+		InstancePtr->Config.IsCacheCoherent = ConfigPtr->IsCacheCoherent;
+		/* Other instance variable initializations */
+		InstancePtr->SendBufferPtr = NULL;
+		InstancePtr->RecvBufferPtr = NULL;
+		InstancePtr->GenFifoBufferPtr = NULL;
+		InstancePtr->TxBytes = 0;
+		InstancePtr->RxBytes = 0;
+		InstancePtr->GenFifoEntries = 0;
+		InstancePtr->ReadMode = XQSPIPSU_READMODE_DMA;
+		InstancePtr->GenFifoCS = XQSPIPSU_GENFIFO_CS_LOWER;
+		InstancePtr->GenFifoBus = XQSPIPSU_GENFIFO_BUS_LOWER;
+		InstancePtr->IsUnaligned = 0;
+		InstancePtr->IsManualstart = TRUE;
+
+		/* Select QSPIPSU */
+		XQspiPsu_Select(InstancePtr, XQSPIPSU_SEL_GQSPI_MASK);
+
+		/*
+		 * Reset the QSPIPSU device to get it into its initial state. It is
+		 * expected that device configuration will take place after this
+		 * initialization is done, but before the device is started.
+		 */
+		XQspiPsu_Reset(InstancePtr);
+
+		InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+
+		Status = XST_SUCCESS;
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* Resets the QSPIPSU device. Reset must only be called after the driver has
+* been initialized. Any data transfer that is in progress is aborted.
+*
+* The upper layer software is responsible for re-configuring (if necessary)
+* and restarting the QSPIPSU device after the reset.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XQspiPsu_Reset(XQspiPsu *InstancePtr)
+{
+	u32 ConfigReg;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	/* Abort any transfer that is in progress */
+	XQspiPsu_Abort(InstancePtr);
+
+	/* Default value to config register */
+	ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_CFG_OFFSET);
+
+	/* DMA mode */
+	ConfigReg &= ~XQSPIPSU_CFG_MODE_EN_MASK;
+	ConfigReg |= XQSPIPSU_CFG_MODE_EN_DMA_MASK;
+	/* Manual start */
+	ConfigReg |= XQSPIPSU_CFG_GEN_FIFO_START_MODE_MASK;
+	/* Little endain by default */
+	ConfigReg &= ~XQSPIPSU_CFG_ENDIAN_MASK;
+	/* Disable poll timeout */
+	ConfigReg &= ~XQSPIPSU_CFG_EN_POLL_TO_MASK;
+	/* Set hold bit */
+	ConfigReg |= XQSPIPSU_CFG_WP_HOLD_MASK;
+	/* Clear prescalar by default */
+	ConfigReg &= (u32)(~XQSPIPSU_CFG_BAUD_RATE_DIV_MASK);
+	/* CPOL CPHA 00 */
+	ConfigReg &= (u32)(~XQSPIPSU_CFG_CLK_PHA_MASK);
+	ConfigReg &= (u32)(~XQSPIPSU_CFG_CLK_POL_MASK);
+
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+		XQSPIPSU_CFG_OFFSET, ConfigReg);
+
+	/* Set by default to allow for high frequencies */
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+		XQSPIPSU_LPBK_DLY_ADJ_OFFSET,
+		XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_LPBK_DLY_ADJ_OFFSET) |
+			XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_MASK);
+
+	/* Reset thresholds */
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+		XQSPIPSU_TX_THRESHOLD_OFFSET,
+		XQSPIPSU_TX_FIFO_THRESHOLD_RESET_VAL);
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+		XQSPIPSU_RX_THRESHOLD_OFFSET,
+		XQSPIPSU_RX_FIFO_THRESHOLD_RESET_VAL);
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+		XQSPIPSU_GF_THRESHOLD_OFFSET,
+		XQSPIPSU_GEN_FIFO_THRESHOLD_RESET_VAL);
+
+	/* DMA init */
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET,
+			XQSPIPSU_QSPIDMA_DST_CTRL_RESET_VAL);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* Aborts a transfer in progress by
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+*
+* @return	None.
+*
+* @note
+*
+******************************************************************************/
+void XQspiPsu_Abort(XQspiPsu *InstancePtr)
+{
+
+	u32 IntrStatus, ConfigReg;
+
+	IntrStatus = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+					XQSPIPSU_ISR_OFFSET);
+
+	/* Clear and disable interrupts */
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+		XQSPIPSU_ISR_OFFSET, IntrStatus | XQSPIPSU_ISR_WR_TO_CLR_MASK);
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET,
+		XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+				XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET));
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_QSPIDMA_DST_STS_OFFSET,
+			XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+				XQSPIPSU_QSPIDMA_DST_STS_OFFSET) |
+				XQSPIPSU_QSPIDMA_DST_STS_WTC);
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+		XQSPIPSU_IDR_OFFSET, XQSPIPSU_IDR_ALL_MASK);
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET,
+			XQSPIPSU_QSPIDMA_DST_INTR_ALL_MASK);
+
+	/* Clear FIFO */
+	if((XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_ISR_OFFSET) & XQSPIPSU_ISR_RXEMPTY_MASK) != FALSE) {
+		XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_FIFO_CTRL_OFFSET,
+			XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_MASK |
+			XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_MASK);
+	}
+
+	/*
+	 * Switch to IO mode to Clear RX FIFO. This is becuase of DMA behaviour
+	 * where it waits on RX empty and goes busy assuming there is data
+	 * to be transfered even if there is no request.
+	 */
+	if ((IntrStatus & XQSPIPSU_ISR_RXEMPTY_MASK) != 0U) {
+		ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+					XQSPIPSU_CFG_OFFSET);
+		ConfigReg &= ~XQSPIPSU_CFG_MODE_EN_MASK;
+		XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+				XQSPIPSU_CFG_OFFSET, ConfigReg);
+
+		XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+				XQSPIPSU_FIFO_CTRL_OFFSET,
+				XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_MASK);
+
+		if (InstancePtr->ReadMode == XQSPIPSU_READMODE_DMA) {
+			ConfigReg |= XQSPIPSU_CFG_MODE_EN_DMA_MASK;
+			XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+					XQSPIPSU_CFG_OFFSET, ConfigReg);
+		}
+	}
+
+	/* Disable QSPIPSU */
+	XQspiPsu_Disable(InstancePtr);
+
+	InstancePtr->TxBytes = 0;
+	InstancePtr->RxBytes = 0;
+	InstancePtr->GenFifoEntries = 0;
+	InstancePtr->IsBusy = FALSE;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function performs a transfer on the bus in polled mode. The messages
+* passed are all transferred on the bus between one CS assert and de-assert.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Msg is a pointer to the structure containing transfer data.
+* @param	NumMsg is the number of messages to be transferred.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if transfer fails.
+*		- XST_DEVICE_BUSY if a transfer is already in progress.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XQspiPsu_PolledTransfer(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg,
+				u32 NumMsg)
+{
+
+	s32 Index;
+	u32 QspiPsuStatusReg;
+	u32 BaseAddress;
+	s32 RxThr;
+	u32 IOPending = (u32)FALSE;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	for (Index = 0; Index < (s32)NumMsg; Index++) {
+		Xil_AssertNonvoid(Msg[Index].ByteCount > 0U);
+	}
+
+	/* Check whether there is another transfer in progress. Not thread-safe */
+	if (InstancePtr->IsBusy == TRUE) {
+		return (s32)XST_DEVICE_BUSY;
+	}
+
+	/* Check for ByteCount upper limit - 2^28 for DMA */
+	for (Index = 0; Index < (s32)NumMsg; Index++) {
+		if ((Msg[Index].ByteCount > XQSPIPSU_DMA_BYTES_MAX) &&
+				((Msg[Index].Flags & XQSPIPSU_MSG_FLAG_RX) != FALSE)) {
+			return (s32)XST_FAILURE;
+		}
+	}
+
+	/*
+	 * Set the busy flag, which will be cleared when the transfer is
+	 * entirely done.
+	 */
+	InstancePtr->IsBusy = TRUE;
+
+	BaseAddress = InstancePtr->Config.BaseAddress;
+
+	/* Enable */
+	XQspiPsu_Enable(InstancePtr);
+
+	/* Select slave */
+	XQspiPsu_GenFifoEntryCSAssert(InstancePtr);
+
+	/* list */
+	Index = 0;
+	while (Index < (s32)NumMsg) {
+		XQspiPsu_GenFifoEntryData(InstancePtr, Msg, Index);
+
+		if (InstancePtr->IsManualstart == TRUE) {
+#ifdef DEBUG
+	xil_printf("\nManual Start\r\n");
+#endif
+			XQspiPsu_WriteReg(BaseAddress, XQSPIPSU_CFG_OFFSET,
+				XQspiPsu_ReadReg(BaseAddress,
+					XQSPIPSU_CFG_OFFSET) |
+					XQSPIPSU_CFG_START_GEN_FIFO_MASK);
+		}
+
+		/* Use thresholds here */
+		/* If there is more data to be transmitted */
+		do {
+			QspiPsuStatusReg = XQspiPsu_ReadReg(BaseAddress,
+						XQSPIPSU_ISR_OFFSET);
+
+			/* Transmit more data if left */
+			if (((QspiPsuStatusReg & XQSPIPSU_ISR_TXNOT_FULL_MASK) != FALSE) &&
+				((Msg[Index].Flags & XQSPIPSU_MSG_FLAG_TX) != FALSE) &&
+				(InstancePtr->TxBytes > 0)) {
+				XQspiPsu_FillTxFifo(InstancePtr, &Msg[Index],
+						XQSPIPSU_TXD_DEPTH);
+			}
+
+			/* Check if DMA RX is complete and update RxBytes */
+			if ((InstancePtr->ReadMode == XQSPIPSU_READMODE_DMA) &&
+				((Msg[Index].Flags & XQSPIPSU_MSG_FLAG_RX) != FALSE)) {
+				u32 DmaIntrSts;
+				DmaIntrSts = XQspiPsu_ReadReg(BaseAddress,
+								XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET);
+				if ((DmaIntrSts & XQSPIPSU_QSPIDMA_DST_I_STS_DONE_MASK) != FALSE) {
+					XQspiPsu_WriteReg(BaseAddress,
+						XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET,
+						DmaIntrSts);
+					/* Read remaining bytes using IO mode */
+					if((InstancePtr->RxBytes % 4) != 0 ) {
+						XQspiPsu_WriteReg(BaseAddress,
+							XQSPIPSU_CFG_OFFSET,
+							(XQspiPsu_ReadReg(BaseAddress,
+							XQSPIPSU_CFG_OFFSET) &
+							~XQSPIPSU_CFG_MODE_EN_MASK));
+						InstancePtr->ReadMode = XQSPIPSU_READMODE_IO;
+						Msg[Index].ByteCount =
+							(InstancePtr->RxBytes % 4);
+						Msg[Index].RxBfrPtr += (InstancePtr->RxBytes -
+								(InstancePtr->RxBytes % 4));
+						InstancePtr->IsUnaligned = 1;
+						IOPending = (u32)TRUE;
+						break;
+					}
+					InstancePtr->RxBytes = 0;
+				}
+			} else {
+				if ((Msg[Index].Flags & XQSPIPSU_MSG_FLAG_RX) != FALSE) {
+					/* Check if PIO RX is complete and update RxBytes */
+					RxThr = (s32)XQspiPsu_ReadReg(BaseAddress,
+							XQSPIPSU_RX_THRESHOLD_OFFSET);
+					if ((QspiPsuStatusReg & XQSPIPSU_ISR_RXNEMPTY_MASK)
+									!= 0U) {
+						XQspiPsu_ReadRxFifo(InstancePtr,
+								&Msg[Index], RxThr*4);
+
+					} else {
+						if ((QspiPsuStatusReg &
+							XQSPIPSU_ISR_GENFIFOEMPTY_MASK) != 0U) {
+								XQspiPsu_ReadRxFifo(InstancePtr,
+									&Msg[Index], InstancePtr->RxBytes);
+						}
+					}
+				}
+			}
+		} while (((QspiPsuStatusReg & XQSPIPSU_ISR_GENFIFOEMPTY_MASK) == FALSE) ||
+			(InstancePtr->TxBytes != 0) ||
+			((QspiPsuStatusReg & XQSPIPSU_ISR_TXEMPTY_MASK) == FALSE) ||
+			(InstancePtr->RxBytes != 0));
+
+		if((InstancePtr->IsUnaligned != 0) && (IOPending == (u32)FALSE)) {
+			InstancePtr->IsUnaligned = 0;
+			XQspiPsu_WriteReg(BaseAddress,
+				XQSPIPSU_CFG_OFFSET, (XQspiPsu_ReadReg(
+				BaseAddress,
+				XQSPIPSU_CFG_OFFSET) |
+				XQSPIPSU_CFG_MODE_EN_DMA_MASK));
+			InstancePtr->ReadMode = XQSPIPSU_READMODE_DMA;
+		}
+
+		if (IOPending == (u32)TRUE) {
+			IOPending = (u32)FALSE;
+		} else {
+			Index++;
+		}
+	}
+
+	/* De-select slave */
+	XQspiPsu_GenFifoEntryCSDeAssert(InstancePtr);
+
+	if (InstancePtr->IsManualstart == TRUE) {
+#ifdef DEBUG
+	xil_printf("\nManual Start\r\n");
+#endif
+		XQspiPsu_WriteReg(BaseAddress, XQSPIPSU_CFG_OFFSET,
+			XQspiPsu_ReadReg(BaseAddress, XQSPIPSU_CFG_OFFSET) |
+				XQSPIPSU_CFG_START_GEN_FIFO_MASK);
+	}
+
+	QspiPsuStatusReg = XQspiPsu_ReadReg(BaseAddress, XQSPIPSU_ISR_OFFSET);
+	while ((QspiPsuStatusReg & XQSPIPSU_ISR_GENFIFOEMPTY_MASK) == FALSE) {
+		QspiPsuStatusReg = XQspiPsu_ReadReg(BaseAddress,
+						XQSPIPSU_ISR_OFFSET);
+	}
+
+	/* Clear the busy flag. */
+	InstancePtr->IsBusy = FALSE;
+
+	/* Disable the device. */
+	XQspiPsu_Disable(InstancePtr);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function initiates a transfer on the bus and enables interrupts.
+* The transfer is completed by the interrupt handler. The messages passed are
+* all transferred on the bus between one CS assert and de-assert.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Msg is a pointer to the structure containing transfer data.
+* @param	NumMsg is the number of messages to be transferred.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if transfer fails.
+*		- XST_DEVICE_BUSY if a transfer is already in progress.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XQspiPsu_InterruptTransfer(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg,
+				u32 NumMsg)
+{
+
+	s32 Index;
+	u32 BaseAddress;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	for (Index = 0; Index < (s32)NumMsg; Index++) {
+		Xil_AssertNonvoid(Msg[Index].ByteCount > 0U);
+	}
+
+	/* Check whether there is another transfer in progress. Not thread-safe */
+	if (InstancePtr->IsBusy == TRUE) {
+		return (s32)XST_DEVICE_BUSY;
+	}
+
+	if (Msg[0].Flags & XQSPIPSU_MSG_FLAG_POLL) {
+		InstancePtr->IsBusy = TRUE;
+		XQspiPsu_PollData(InstancePtr, Msg);
+	} else {
+		/* Check for ByteCount upper limit - 2^28 for DMA */
+		for (Index = 0; Index < (s32)NumMsg; Index++) {
+			if ((Msg[Index].ByteCount > XQSPIPSU_DMA_BYTES_MAX) &&
+					((Msg[Index].Flags & XQSPIPSU_MSG_FLAG_RX) != FALSE)) {
+			return (s32)XST_FAILURE;
+		}
+	}
+
+	/*
+	 * Set the busy flag, which will be cleared when the transfer is
+	 * entirely done.
+	 */
+	InstancePtr->IsBusy = TRUE;
+
+	BaseAddress = InstancePtr->Config.BaseAddress;
+
+	InstancePtr->Msg = Msg;
+	InstancePtr->NumMsg = (s32)NumMsg;
+	InstancePtr->MsgCnt = 0;
+
+	/* Enable */
+	XQspiPsu_Enable(InstancePtr);
+
+	/* Select slave */
+	XQspiPsu_GenFifoEntryCSAssert(InstancePtr);
+
+	/* This might not work if not manual start */
+	/* Put first message in FIFO along with the above slave select */
+	XQspiPsu_GenFifoEntryData(InstancePtr, Msg, 0);
+
+	if (InstancePtr->IsManualstart == TRUE) {
+#ifdef DEBUG
+	xil_printf("\nManual Start\r\n");
+#endif
+		XQspiPsu_WriteReg(BaseAddress, XQSPIPSU_CFG_OFFSET,
+			XQspiPsu_ReadReg(BaseAddress, XQSPIPSU_CFG_OFFSET) |
+				XQSPIPSU_CFG_START_GEN_FIFO_MASK);
+	}
+
+	/* Enable interrupts */
+	XQspiPsu_WriteReg(BaseAddress, XQSPIPSU_IER_OFFSET,
+		(u32)XQSPIPSU_IER_TXNOT_FULL_MASK | (u32)XQSPIPSU_IER_TXEMPTY_MASK |
+		(u32)XQSPIPSU_IER_RXNEMPTY_MASK | (u32)XQSPIPSU_IER_GENFIFOEMPTY_MASK |
+		(u32)XQSPIPSU_IER_RXEMPTY_MASK);
+
+	if (InstancePtr->ReadMode == XQSPIPSU_READMODE_DMA) {
+		XQspiPsu_WriteReg(BaseAddress, XQSPIPSU_QSPIDMA_DST_I_EN_OFFSET,
+				XQSPIPSU_QSPIDMA_DST_I_EN_DONE_MASK);
+	}
+	}
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* Handles interrupt based transfers by acting on GENFIFO and DMA interurpts.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if transfer fails.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XQspiPsu_InterruptHandler(XQspiPsu *InstancePtr)
+{
+	u32 QspiPsuStatusReg, DmaIntrStatusReg = 0;
+	u32 BaseAddress;
+	XQspiPsu_Msg *Msg;
+	s32 NumMsg;
+	s32 MsgCnt;
+	u8 DeltaMsgCnt = 0;
+	s32 RxThr;
+	u32 TxRxFlag;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	BaseAddress = InstancePtr->Config.BaseAddress;
+	Msg = InstancePtr->Msg;
+	NumMsg = InstancePtr->NumMsg;
+	MsgCnt = InstancePtr->MsgCnt;
+	TxRxFlag = Msg[MsgCnt].Flags;
+
+	/* QSPIPSU Intr cleared on read */
+	QspiPsuStatusReg = XQspiPsu_ReadReg(BaseAddress, XQSPIPSU_ISR_OFFSET);
+	if (InstancePtr->ReadMode == XQSPIPSU_READMODE_DMA) {
+		/* DMA Intr write to clear */
+		DmaIntrStatusReg = XQspiPsu_ReadReg(BaseAddress,
+					XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET);
+
+		XQspiPsu_WriteReg(BaseAddress,
+			XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET, DmaIntrStatusReg);
+	}
+	if (((DmaIntrStatusReg & XQSPIPSU_QSPIDMA_DST_INTR_ERR_MASK) != FALSE)) {
+		/* Call status handler to indicate error */
+		InstancePtr->StatusHandler(InstancePtr->StatusRef,
+					XST_SPI_COMMAND_ERROR, 0);
+	}
+
+	/* Fill more data to be txed if required */
+	if ((MsgCnt < NumMsg) && ((TxRxFlag & XQSPIPSU_MSG_FLAG_TX) != FALSE) &&
+		((QspiPsuStatusReg & XQSPIPSU_ISR_TXNOT_FULL_MASK) != FALSE) &&
+		(InstancePtr->TxBytes > 0)) {
+		XQspiPsu_FillTxFifo(InstancePtr, &Msg[MsgCnt],
+				XQSPIPSU_TXD_DEPTH);
+	}
+
+	/*
+	 * Check if the entry is ONLY TX and increase MsgCnt.
+	 * This is to allow TX and RX together in one entry - corner case.
+	 */
+	if ((MsgCnt < NumMsg) && ((TxRxFlag & XQSPIPSU_MSG_FLAG_TX) != FALSE) &&
+		((QspiPsuStatusReg & XQSPIPSU_ISR_TXEMPTY_MASK) != FALSE) &&
+		((QspiPsuStatusReg & XQSPIPSU_ISR_GENFIFOEMPTY_MASK) != FALSE) &&
+		(InstancePtr->TxBytes == 0) &&
+		((TxRxFlag & XQSPIPSU_MSG_FLAG_RX) == FALSE)) {
+		MsgCnt += 1;
+		DeltaMsgCnt = 1U;
+	}
+
+	if ((InstancePtr->ReadMode == XQSPIPSU_READMODE_DMA) &&
+		(MsgCnt < NumMsg) && ((TxRxFlag & XQSPIPSU_MSG_FLAG_RX) != FALSE)) {
+		if ((DmaIntrStatusReg & XQSPIPSU_QSPIDMA_DST_I_STS_DONE_MASK) != FALSE) {
+				/* Read remaining bytes using IO mode */
+			if((InstancePtr->RxBytes % 4) != 0 ) {
+				XQspiPsu_WriteReg(BaseAddress,
+					XQSPIPSU_CFG_OFFSET, (XQspiPsu_ReadReg(
+					BaseAddress, XQSPIPSU_CFG_OFFSET) &
+					~XQSPIPSU_CFG_MODE_EN_MASK));
+				InstancePtr->ReadMode = XQSPIPSU_READMODE_IO;
+				Msg[MsgCnt].ByteCount = (InstancePtr->RxBytes % 4);
+				Msg[MsgCnt].RxBfrPtr += (InstancePtr->RxBytes -
+						(InstancePtr->RxBytes % 4));
+				InstancePtr->IsUnaligned = 1;
+				XQspiPsu_GenFifoEntryData(InstancePtr, Msg,
+						MsgCnt);
+				if(InstancePtr->IsManualstart == TRUE) {
+#ifdef DEBUG
+	xil_printf("\nManual Start\r\n");
+#endif
+					XQspiPsu_WriteReg(BaseAddress,
+						XQSPIPSU_CFG_OFFSET,
+						XQspiPsu_ReadReg(BaseAddress,
+						XQSPIPSU_CFG_OFFSET) |
+						XQSPIPSU_CFG_START_GEN_FIFO_MASK);
+				}
+			}
+			else {
+				InstancePtr->RxBytes = 0;
+				MsgCnt += 1;
+				DeltaMsgCnt = 1U;
+			}
+		}
+	} else {
+		if ((MsgCnt < NumMsg) && ((TxRxFlag & XQSPIPSU_MSG_FLAG_RX) != FALSE)) {
+			if (InstancePtr->RxBytes != 0) {
+				if ((QspiPsuStatusReg & XQSPIPSU_ISR_RXNEMPTY_MASK)
+								!= FALSE) {
+					RxThr = (s32)XQspiPsu_ReadReg(BaseAddress,
+								XQSPIPSU_RX_THRESHOLD_OFFSET);
+					XQspiPsu_ReadRxFifo(InstancePtr, &Msg[MsgCnt],
+						RxThr*4);
+				} else {
+					if (((QspiPsuStatusReg & XQSPIPSU_ISR_GENFIFOEMPTY_MASK) != FALSE) &&
+						((QspiPsuStatusReg & XQSPIPSU_ISR_RXEMPTY_MASK) == FALSE)) {
+						XQspiPsu_ReadRxFifo(InstancePtr, &Msg[MsgCnt],
+							InstancePtr->RxBytes);
+					}
+				}
+				if (InstancePtr->RxBytes == 0) {
+					MsgCnt += 1;
+					DeltaMsgCnt = 1U;
+				}
+			}
+		}
+	}
+
+	/*
+	 * Dummy byte transfer
+	 * MsgCnt < NumMsg check is to ensure is it a valid dummy cycle message
+	 * If one of the above conditions increased MsgCnt, then
+	 * the new message is yet to be placed in the FIFO; hence !DeltaMsgCnt.
+	 */
+	if ((MsgCnt < NumMsg) && (DeltaMsgCnt == FALSE) &&
+		((TxRxFlag & XQSPIPSU_MSG_FLAG_RX) == FALSE) &&
+		((TxRxFlag & XQSPIPSU_MSG_FLAG_TX) == FALSE) &&
+		((TxRxFlag & XQSPIPSU_MSG_FLAG_POLL) == FALSE) &&
+		((QspiPsuStatusReg & XQSPIPSU_ISR_GENFIFOEMPTY_MASK) != FALSE)) {
+		MsgCnt += 1;
+		DeltaMsgCnt = 1U;
+	}
+	InstancePtr->MsgCnt = MsgCnt;
+
+	/*
+	 * DeltaMsgCnt is to handle conditions where genfifo empty can be set
+	 * while tx is still not empty or rx dma is not yet done.
+	 * MsgCnt > NumMsg indicates CS de-assert entry was also executed.
+	 */
+	if (((QspiPsuStatusReg & XQSPIPSU_ISR_GENFIFOEMPTY_MASK) != FALSE) &&
+		((DeltaMsgCnt != FALSE) || (MsgCnt > NumMsg))) {
+		if (MsgCnt < NumMsg) {
+			if(InstancePtr->IsUnaligned != 0) {
+				InstancePtr->IsUnaligned = 0;
+				XQspiPsu_WriteReg(InstancePtr->Config.
+					BaseAddress, XQSPIPSU_CFG_OFFSET,
+					(XQspiPsu_ReadReg(InstancePtr->Config.
+					BaseAddress, XQSPIPSU_CFG_OFFSET) |
+					XQSPIPSU_CFG_MODE_EN_DMA_MASK));
+				InstancePtr->ReadMode = XQSPIPSU_READMODE_DMA;
+			}
+			/* This might not work if not manual start */
+			XQspiPsu_GenFifoEntryData(InstancePtr, Msg, MsgCnt);
+
+			if (InstancePtr->IsManualstart == TRUE) {
+#ifdef DEBUG
+	xil_printf("\nManual Start\r\n");
+#endif
+				XQspiPsu_WriteReg(BaseAddress,
+					XQSPIPSU_CFG_OFFSET,
+					XQspiPsu_ReadReg(BaseAddress,
+						XQSPIPSU_CFG_OFFSET) |
+						XQSPIPSU_CFG_START_GEN_FIFO_MASK);
+			}
+		} else if (MsgCnt == NumMsg) {
+			/* This is just to keep track of the de-assert entry */
+			MsgCnt += 1;
+			InstancePtr->MsgCnt = MsgCnt;
+
+			/* De-select slave */
+			XQspiPsu_GenFifoEntryCSDeAssert(InstancePtr);
+
+			if (InstancePtr->IsManualstart == TRUE) {
+#ifdef DEBUG
+	xil_printf("\nManual Start\r\n");
+#endif
+				XQspiPsu_WriteReg(BaseAddress,
+					XQSPIPSU_CFG_OFFSET,
+					XQspiPsu_ReadReg(BaseAddress,
+						XQSPIPSU_CFG_OFFSET) |
+						XQSPIPSU_CFG_START_GEN_FIFO_MASK);
+			}
+		} else {
+			/* Disable interrupts */
+			XQspiPsu_WriteReg(BaseAddress, XQSPIPSU_IDR_OFFSET,
+					(u32)XQSPIPSU_IER_TXNOT_FULL_MASK |
+					(u32)XQSPIPSU_IER_TXEMPTY_MASK |
+					(u32)XQSPIPSU_IER_RXNEMPTY_MASK |
+					(u32)XQSPIPSU_IER_GENFIFOEMPTY_MASK |
+					(u32)XQSPIPSU_IER_RXEMPTY_MASK);
+			if (InstancePtr->ReadMode == XQSPIPSU_READMODE_DMA) {
+				XQspiPsu_WriteReg(BaseAddress,
+					XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET,
+					XQSPIPSU_QSPIDMA_DST_I_EN_DONE_MASK);
+			}
+
+			/* Clear the busy flag. */
+			InstancePtr->IsBusy = FALSE;
+
+			/* Disable the device. */
+			XQspiPsu_Disable(InstancePtr);
+
+			/* Call status handler to indicate completion */
+			InstancePtr->StatusHandler(InstancePtr->StatusRef,
+						XST_SPI_TRANSFER_DONE, 0);
+		}
+	}
+	if ((TxRxFlag & XQSPIPSU_MSG_FLAG_POLL) != FALSE){
+		 if (QspiPsuStatusReg & XQSPIPSU_ISR_RXNEMPTY_MASK){
+			 /*
+			  * Read data from RXFIFO, since when data from the flash device
+			  * (status data) matched with configured value in poll_cfg, then
+			  * controller writes the matched data into RXFIFO.
+			  */
+			XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress, XQSPIPSU_RXD_OFFSET);
+
+			XQspiPsu_WriteReg(BaseAddress, XQSPIPSU_IDR_OFFSET,
+					(u32)XQSPIPSU_IER_TXNOT_FULL_MASK |
+					(u32)XQSPIPSU_IER_TXEMPTY_MASK |
+					(u32)XQSPIPSU_IER_RXNEMPTY_MASK |
+					(u32)XQSPIPSU_IER_GENFIFOEMPTY_MASK |
+					(u32)XQSPIPSU_IER_RXEMPTY_MASK |
+					(u32)XQSPIPSU_IER_POLL_TIME_EXPIRE_MASK);
+			InstancePtr->StatusHandler(InstancePtr->StatusRef, XST_SPI_POLL_DONE, 0);
+
+			InstancePtr->IsBusy = FALSE;
+			/* Disable the device. */
+			XQspiPsu_Disable(InstancePtr);
+
+		 }
+		 if (QspiPsuStatusReg & XQSPIPSU_ISR_POLL_TIME_EXPIRE_MASK){
+			InstancePtr->StatusHandler(InstancePtr->StatusRef,
+					XST_FLASH_TIMEOUT_ERROR, 0);
+		 }
+	}
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* Sets the status callback function, the status handler, which the driver
+* calls when it encounters conditions that should be reported to upper
+* layer software. The handler executes in an interrupt context, so it must
+* minimize the amount of processing performed. One of the following status
+* events is passed to the status handler.
+*
+* 
+*
+* XST_SPI_TRANSFER_DONE		The requested data transfer is done
+*
+* XST_SPI_TRANSMIT_UNDERRUN	As a slave device, the master clocked data
+*				but there were none available in the transmit
+*				register/FIFO. This typically means the slave
+*				application did not issue a transfer request
+*				fast enough, or the processor/driver could not
+*				fill the transmit register/FIFO fast enough.
+*
+* XST_SPI_RECEIVE_OVERRUN	The QSPIPSU device lost data. Data was received
+*				but the receive data register/FIFO was full.
+*
+* 

+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	CallBackRef is the upper layer callback reference passed back
+*		when the callback function is invoked.
+* @param	FuncPointer is the pointer to the callback function.
+*
+* @return	None.
+*
+* @note
+*
+* The handler is called within interrupt context, so it should do its work
+* quickly and queue potentially time-consuming work to a task-level thread.
+*
+******************************************************************************/
+void XQspiPsu_SetStatusHandler(XQspiPsu *InstancePtr, void *CallBackRef,
+				XQspiPsu_StatusHandler FuncPointer)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(FuncPointer != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	InstancePtr->StatusHandler = FuncPointer;
+	InstancePtr->StatusRef = CallBackRef;
+}
+
+/*****************************************************************************/
+/**
+*
+* This is a stub for the status callback. The stub is here in case the upper
+* layers forget to set the handler.
+*
+* @param	CallBackRef is a pointer to the upper layer callback reference
+* @param	StatusEvent is the event that just occurred.
+* @param	ByteCount is the number of bytes transferred up until the event
+*		occurred.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void StubStatusHandler(void *CallBackRef, u32 StatusEvent,
+				u32 ByteCount)
+{
+	(void) CallBackRef;
+	(void) StatusEvent;
+	(void) ByteCount;
+
+	Xil_AssertVoidAlways();
+}
+
+/*****************************************************************************/
+/**
+*
+* Selects SPI mode - x1 or x2 or x4.
+*
+* @param	SpiMode - spi or dual or quad.
+* @return	Mask to set desired SPI mode in GENFIFO entry.
+*
+* @note		None.
+*
+******************************************************************************/
+static inline u32 XQspiPsu_SelectSpiMode(u8 SpiMode)
+{
+	u32 Mask;
+
+#ifdef DEBUG
+	xil_printf("\nXQspiPsu_SelectSpiMode\r\n");
+#endif
+
+	switch (SpiMode) {
+		case XQSPIPSU_SELECT_MODE_DUALSPI:
+			Mask = XQSPIPSU_GENFIFO_MODE_DUALSPI;
+			break;
+		case XQSPIPSU_SELECT_MODE_QUADSPI:
+			Mask = XQSPIPSU_GENFIFO_MODE_QUADSPI;
+			break;
+		case XQSPIPSU_SELECT_MODE_SPI:
+			Mask = XQSPIPSU_GENFIFO_MODE_SPI;
+			break;
+		default:
+			Mask = XQSPIPSU_GENFIFO_MODE_SPI;
+			break;
+	}
+#ifdef DEBUG
+	xil_printf("\nSPIMode is %08x\r\n", SpiMode);
+#endif
+
+	return Mask;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function checks the TX/RX buffers in the message and setups up the
+* GENFIFO entries, TX FIFO or RX DMA as required.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Msg is a pointer to the structure containing transfer data.
+* @param	GenFifoEntry is pointer to the variable in which GENFIFO mask
+*		is returned to calling function
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static inline void XQspiPsu_TXRXSetup(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg,
+					u32 *GenFifoEntry)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	/* Transmit */
+	if (((Msg->Flags & XQSPIPSU_MSG_FLAG_TX) != FALSE) &&
+			((Msg->Flags & XQSPIPSU_MSG_FLAG_RX) == FALSE)) {
+		/* Setup data to be TXed */
+		*GenFifoEntry |= XQSPIPSU_GENFIFO_DATA_XFER;
+		*GenFifoEntry |= XQSPIPSU_GENFIFO_TX;
+		InstancePtr->TxBytes = (s32)Msg->ByteCount;
+		InstancePtr->SendBufferPtr = Msg->TxBfrPtr;
+		InstancePtr->RecvBufferPtr = NULL;
+		XQspiPsu_FillTxFifo(InstancePtr, Msg, XQSPIPSU_TXD_DEPTH);
+		/* Discard RX data */
+		*GenFifoEntry &= ~XQSPIPSU_GENFIFO_RX;
+		InstancePtr->RxBytes = 0;
+	}
+
+	/* Receive */
+	if (((Msg->Flags & XQSPIPSU_MSG_FLAG_RX) != FALSE) &&
+			((Msg->Flags & XQSPIPSU_MSG_FLAG_TX) == FALSE)) {
+		/* TX auto fill */
+		*GenFifoEntry &= ~XQSPIPSU_GENFIFO_TX;
+		InstancePtr->TxBytes = 0;
+		/* Setup RX */
+		*GenFifoEntry |= XQSPIPSU_GENFIFO_DATA_XFER;
+		*GenFifoEntry |= XQSPIPSU_GENFIFO_RX;
+		InstancePtr->RxBytes = (s32)Msg->ByteCount;
+		InstancePtr->SendBufferPtr = NULL;
+		InstancePtr->RecvBufferPtr = Msg->RxBfrPtr;
+		if (InstancePtr->ReadMode == XQSPIPSU_READMODE_DMA) {
+			XQspiPsu_SetupRxDma(InstancePtr, Msg);
+		}
+	}
+
+	/* If only dummy is requested as a separate entry */
+	if (((Msg->Flags & XQSPIPSU_MSG_FLAG_TX) == FALSE) &&
+			(Msg->Flags & XQSPIPSU_MSG_FLAG_RX) == FALSE) {
+		*GenFifoEntry |= XQSPIPSU_GENFIFO_DATA_XFER;
+		*GenFifoEntry &= ~(XQSPIPSU_GENFIFO_TX | XQSPIPSU_GENFIFO_RX);
+		InstancePtr->TxBytes = 0;
+		InstancePtr->RxBytes = 0;
+		InstancePtr->SendBufferPtr = NULL;
+		InstancePtr->RecvBufferPtr = NULL;
+	}
+
+	/* Dummy and cmd sent by upper layer to received data */
+	if (((Msg->Flags & XQSPIPSU_MSG_FLAG_TX) != FALSE) &&
+			((Msg->Flags & XQSPIPSU_MSG_FLAG_RX) != FALSE)) {
+		*GenFifoEntry |= XQSPIPSU_GENFIFO_DATA_XFER;
+		*GenFifoEntry |= (XQSPIPSU_GENFIFO_TX | XQSPIPSU_GENFIFO_RX);
+		InstancePtr->TxBytes = (s32)Msg->ByteCount;
+		InstancePtr->RxBytes = (s32)Msg->ByteCount;
+		InstancePtr->SendBufferPtr = Msg->TxBfrPtr;
+		InstancePtr->RecvBufferPtr = Msg->RxBfrPtr;
+		XQspiPsu_FillTxFifo(InstancePtr, Msg, XQSPIPSU_TXD_DEPTH);
+		/* Add check for DMA or PIO here */
+		if (InstancePtr->ReadMode == XQSPIPSU_READMODE_DMA) {
+			XQspiPsu_SetupRxDma(InstancePtr, Msg);
+		}
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* Fills the TX FIFO as long as there is room in the FIFO or the bytes required
+* to be transmitted.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Msg is a pointer to the structure containing transfer data.
+* @param	Size is the number of bytes to be transmitted.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static inline void XQspiPsu_FillTxFifo(XQspiPsu *InstancePtr,
+					XQspiPsu_Msg *Msg, s32 Size)
+{
+	s32 Count = 0;
+	u32 Data;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+#ifdef DEBUG
+	xil_printf("\nXQspiPsu_FillTxFifo\r\n");
+#endif
+
+	while ((InstancePtr->TxBytes > 0) && (Count < Size)) {
+		if (InstancePtr->TxBytes >= 4) {
+			(void)memcpy(&Data, Msg->TxBfrPtr, 4);
+			Msg->TxBfrPtr += 4;
+			InstancePtr->TxBytes -= 4;
+			Count += 4;
+		} else {
+			(void)memcpy(&Data, Msg->TxBfrPtr, InstancePtr->TxBytes);
+			Msg->TxBfrPtr += InstancePtr->TxBytes;
+			Count += InstancePtr->TxBytes;
+			InstancePtr->TxBytes = 0;
+		}
+		XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+				XQSPIPSU_TXD_OFFSET, Data);
+#ifdef DEBUG
+	xil_printf("\nData is %08x\r\n", Data);
+#endif
+
+	}
+	if (InstancePtr->TxBytes < 0) {
+		InstancePtr->TxBytes = 0;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets up the RX DMA operation.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Msg is a pointer to the structure containing transfer data.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static inline void XQspiPsu_SetupRxDma(XQspiPsu *InstancePtr,
+					XQspiPsu_Msg *Msg)
+{
+	s32 Remainder;
+	s32 DmaRxBytes;
+	u64 AddrTemp;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	AddrTemp = (u64)((INTPTR)(Msg->RxBfrPtr) &
+				XQSPIPSU_QSPIDMA_DST_ADDR_MASK);
+	/* Check for RXBfrPtr to be word aligned */
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET,
+			(u32)AddrTemp);
+
+#ifdef __aarch64__
+	AddrTemp = (u64)((INTPTR)(Msg->RxBfrPtr) >> 32);
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_QSPIDMA_DST_ADDR_MSB_OFFSET,
+			(u32)AddrTemp &
+			XQSPIPSU_QSPIDMA_DST_ADDR_MSB_MASK);
+#endif
+
+	Remainder = InstancePtr->RxBytes % 4;
+	DmaRxBytes = InstancePtr->RxBytes;
+	if (Remainder != 0) {
+		/* This is done to make Dma bytes aligned */
+		DmaRxBytes = InstancePtr->RxBytes - Remainder;
+		Msg->ByteCount = (u32)DmaRxBytes;
+	}
+	if (InstancePtr->Config.IsCacheCoherent == 0) {
+		Xil_DCacheInvalidateRange((INTPTR)InstancePtr->RecvBufferPtr,
+			Msg->ByteCount);
+	}
+
+	/* Write no. of words to DMA DST SIZE */
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_QSPIDMA_DST_SIZE_OFFSET, (u32)DmaRxBytes);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function writes the GENFIFO entry to assert CS.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static inline void XQspiPsu_GenFifoEntryCSAssert(XQspiPsu *InstancePtr)
+{
+	u32 GenFifoEntry;
+
+#ifdef DEBUG
+	xil_printf("\nXQspiPsu_GenFifoEntryCSAssert\r\n");
+#endif
+
+	GenFifoEntry = 0x0U;
+	GenFifoEntry &= ~((u32)XQSPIPSU_GENFIFO_DATA_XFER | (u32)XQSPIPSU_GENFIFO_EXP);
+	GenFifoEntry &= (u32)(~XQSPIPSU_GENFIFO_MODE_MASK);
+	GenFifoEntry |= XQSPIPSU_GENFIFO_MODE_SPI;
+	GenFifoEntry |= InstancePtr->GenFifoCS;
+	GenFifoEntry &= (u32)(~XQSPIPSU_GENFIFO_BUS_MASK);
+	GenFifoEntry |= InstancePtr->GenFifoBus;
+	GenFifoEntry &= ~(XQSPIPSU_GENFIFO_TX | XQSPIPSU_GENFIFO_RX |
+			XQSPIPSU_GENFIFO_STRIPE | XQSPIPSU_GENFIFO_POLL);
+	GenFifoEntry |= XQSPIPSU_GENFIFO_CS_SETUP;
+#ifdef DEBUG
+	xil_printf("\nFifoEntry=%08x\r\n",GenFifoEntry);
+#endif
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+		XQSPIPSU_GEN_FIFO_OFFSET, GenFifoEntry);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function writes the GENFIFO entries to transmit the messages requested.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Msg is a pointer to the structure containing transfer data.
+* @param	Index of the current message to be handled.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if transfer fails.
+*		- XST_DEVICE_BUSY if a transfer is already in progress.
+*
+* @note		None.
+*
+******************************************************************************/
+static inline void XQspiPsu_GenFifoEntryData(XQspiPsu *InstancePtr,
+						XQspiPsu_Msg *Msg, s32 Index)
+{
+	u32 GenFifoEntry;
+	u32 BaseAddress;
+	u32 TempCount;
+	u32 ImmData;
+
+#ifdef DEBUG
+	xil_printf("\nXQspiPsu_GenFifoEntryData\r\n");
+#endif
+
+	BaseAddress = InstancePtr->Config.BaseAddress;
+
+	GenFifoEntry = 0x0U;
+	/* Bus width */
+	GenFifoEntry &= (u32)(~XQSPIPSU_GENFIFO_MODE_MASK);
+	GenFifoEntry |= XQspiPsu_SelectSpiMode((u8)Msg[Index].BusWidth);
+
+	GenFifoEntry |= InstancePtr->GenFifoCS;
+	GenFifoEntry &= (u32)(~XQSPIPSU_GENFIFO_BUS_MASK);
+	GenFifoEntry |= InstancePtr->GenFifoBus;
+
+	/* Data */
+	if (((Msg[Index].Flags) & XQSPIPSU_MSG_FLAG_STRIPE) != FALSE) {
+		GenFifoEntry |= XQSPIPSU_GENFIFO_STRIPE;
+	} else {
+		GenFifoEntry &= ~XQSPIPSU_GENFIFO_STRIPE;
+	}
+
+	/* If Byte Count is less than 8 bytes do the transfer in IO mode */
+	if ((Msg[Index].ByteCount < 8U) &&
+		(InstancePtr->ReadMode == XQSPIPSU_READMODE_DMA)) {
+			InstancePtr->ReadMode = XQSPIPSU_READMODE_IO;
+			XQspiPsu_WriteReg(BaseAddress, XQSPIPSU_CFG_OFFSET,
+				(XQspiPsu_ReadReg(BaseAddress, XQSPIPSU_CFG_OFFSET) &
+						~XQSPIPSU_CFG_MODE_EN_MASK));
+			InstancePtr->IsUnaligned = 1;
+	}
+
+	XQspiPsu_TXRXSetup(InstancePtr, &Msg[Index], &GenFifoEntry);
+
+	if (Msg[Index].ByteCount < XQSPIPSU_GENFIFO_IMM_DATA_MASK) {
+		GenFifoEntry &= (u32)(~XQSPIPSU_GENFIFO_IMM_DATA_MASK);
+		GenFifoEntry |= Msg[Index].ByteCount;
+#ifdef DEBUG
+	xil_printf("\nFifoEntry=%08x\r\n",GenFifoEntry);
+#endif
+		XQspiPsu_WriteReg(BaseAddress, XQSPIPSU_GEN_FIFO_OFFSET,
+				GenFifoEntry);
+	} else {
+		TempCount = Msg[Index].ByteCount;
+		u32 Exponent = 8;	/* 2^8 = 256 */
+
+		ImmData = TempCount & 0xFFU;
+		/* Exponent entries */
+		GenFifoEntry |= XQSPIPSU_GENFIFO_EXP;
+		while (TempCount != 0U) {
+			if ((TempCount & XQSPIPSU_GENFIFO_EXP_START) != FALSE) {
+				GenFifoEntry &= (u32)(~XQSPIPSU_GENFIFO_IMM_DATA_MASK);
+				GenFifoEntry |= Exponent;
+#ifdef DEBUG
+	xil_printf("\nFifoEntry=%08x\r\n",GenFifoEntry);
+#endif
+				XQspiPsu_WriteReg(BaseAddress,
+					XQSPIPSU_GEN_FIFO_OFFSET,
+					GenFifoEntry);
+			}
+			TempCount = TempCount >> 1;
+			Exponent++;
+		}
+
+		/* Immediate entry */
+		GenFifoEntry &= (u32)(~XQSPIPSU_GENFIFO_EXP);
+		if ((ImmData & 0xFFU) != FALSE) {
+			GenFifoEntry &= (u32)(~XQSPIPSU_GENFIFO_IMM_DATA_MASK);
+			GenFifoEntry |= ImmData & 0xFFU;
+#ifdef DEBUG
+	xil_printf("\nFifoEntry=%08x\r\n",GenFifoEntry);
+#endif
+			XQspiPsu_WriteReg(BaseAddress,
+				XQSPIPSU_GEN_FIFO_OFFSET, GenFifoEntry);
+		}
+	}
+
+	/* One dummy GenFifo entry in case of IO mode */
+	if ((InstancePtr->ReadMode == XQSPIPSU_READMODE_IO) &&
+			((Msg[Index].Flags & XQSPIPSU_MSG_FLAG_RX) != FALSE)) {
+		GenFifoEntry = 0x0U;
+#ifdef DEBUG
+	xil_printf("\nDummy FifoEntry=%08x\r\n",GenFifoEntry);
+#endif
+		XQspiPsu_WriteReg(BaseAddress,
+				XQSPIPSU_GEN_FIFO_OFFSET, GenFifoEntry);
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function writes the GENFIFO entry to de-assert CS.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static inline void XQspiPsu_GenFifoEntryCSDeAssert(XQspiPsu *InstancePtr)
+{
+	u32 GenFifoEntry;
+
+#ifdef DEBUG
+	xil_printf("\nXQspiPsu_GenFifoEntryCSDeAssert\r\n");
+#endif
+
+	GenFifoEntry = 0x0U;
+	GenFifoEntry &= ~((u32)XQSPIPSU_GENFIFO_DATA_XFER | (u32)XQSPIPSU_GENFIFO_EXP);
+	GenFifoEntry &= (u32)(~XQSPIPSU_GENFIFO_MODE_MASK);
+	GenFifoEntry |= XQSPIPSU_GENFIFO_MODE_SPI;
+	GenFifoEntry &= (u32)(~XQSPIPSU_GENFIFO_BUS_MASK);
+	GenFifoEntry |= InstancePtr->GenFifoBus;
+	GenFifoEntry &= ~(XQSPIPSU_GENFIFO_TX | XQSPIPSU_GENFIFO_RX |
+			XQSPIPSU_GENFIFO_STRIPE | XQSPIPSU_GENFIFO_POLL);
+	GenFifoEntry |= XQSPIPSU_GENFIFO_CS_HOLD;
+#ifdef DEBUG
+	xil_printf("\nFifoEntry=%08x\r\n",GenFifoEntry);
+#endif
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+		XQSPIPSU_GEN_FIFO_OFFSET, GenFifoEntry);
+}
+
+/*****************************************************************************/
+/**
+*
+* Read the specified number of bytes from RX FIFO
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Msg is a pointer to the structure containing transfer data.
+* @param	Size is the number of bytes to be read.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static inline void XQspiPsu_ReadRxFifo(XQspiPsu *InstancePtr,
+					XQspiPsu_Msg *Msg, s32 Size)
+{
+	s32 Count = 0;
+	u32 Data;
+
+#ifdef DEBUG
+	xil_printf("\nXQspiPsu_ReadRxFifo\r\n");
+#endif
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Msg != NULL);
+
+	while ((InstancePtr->RxBytes != 0) && (Count < Size)) {
+		Data = XQspiPsu_ReadReg(InstancePtr->
+				Config.BaseAddress, XQSPIPSU_RXD_OFFSET);
+#ifdef DEBUG
+	xil_printf("\nData is %08x\r\n", Data);
+#endif
+		if (InstancePtr->RxBytes >= 4) {
+			(void)memcpy(Msg->RxBfrPtr, &Data, 4);
+			InstancePtr->RxBytes -= 4;
+			Msg->RxBfrPtr += 4;
+			Count += 4;
+		} else {
+			/* Read unaligned bytes (< 4 bytes) */
+			(void)memcpy(Msg->RxBfrPtr, &Data, InstancePtr->RxBytes);
+			Msg->RxBfrPtr += InstancePtr->RxBytes;
+			Count += InstancePtr->RxBytes;
+			InstancePtr->RxBytes = 0;
+		}
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* This function enables the polling functionality of controller
+*
+* @param	QspiPsuPtr is a pointer to the XQspiPsu instance.
+*
+* @param	Statuscommand is the status command which send by controller.
+*
+* @param	FlashMsg is a pointer to the structure containing transfer data
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void XQspiPsu_PollData(XQspiPsu *QspiPsuPtr, XQspiPsu_Msg *FlashMsg)
+{
+
+	u32 GenFifoEntry ;
+	u32 Value;
+
+	Xil_AssertVoid(QspiPsuPtr != NULL);
+	Xil_AssertVoid(FlashMsg != NULL );
+
+	Value = XQspiPsu_Create_PollConfigData(QspiPsuPtr, FlashMsg);
+	XQspiPsu_WriteReg(QspiPsuPtr->Config.BaseAddress,
+			XQSPIPSU_POLL_CFG_OFFSET, Value);
+	XQspiPsu_WriteReg(QspiPsuPtr->Config.BaseAddress,
+			XQSPIPSU_P_TO_OFFSET, FlashMsg->PollTimeout);
+
+	XQspiPsu_Enable(QspiPsuPtr);
+
+	GenFifoEntry = (u32)0;
+	GenFifoEntry |= (u32)XQSPIPSU_GENFIFO_TX;
+	GenFifoEntry |= QspiPsuPtr->GenFifoBus;
+	GenFifoEntry |= QspiPsuPtr->GenFifoCS;
+	GenFifoEntry |= (u32)XQSPIPSU_GENFIFO_MODE_SPI;
+	GenFifoEntry |= (u32)FlashMsg->PollStatusCmd;
+
+	XQspiPsu_WriteReg(QspiPsuPtr->Config.BaseAddress,
+		XQSPIPSU_GEN_FIFO_OFFSET, GenFifoEntry);
+	XQspiPsu_WriteReg(QspiPsuPtr->Config.BaseAddress, XQSPIPSU_CFG_OFFSET,
+				(XQSPIPSU_CFG_START_GEN_FIFO_MASK
+				| XQSPIPSU_CFG_GEN_FIFO_START_MODE_MASK));
+
+	GenFifoEntry = (u32)0;
+	GenFifoEntry = (u32)XQSPIPSU_GENFIFO_POLL;
+	GenFifoEntry |= (u32)XQSPIPSU_GENFIFO_RX;
+	GenFifoEntry |= QspiPsuPtr->GenFifoBus;
+	GenFifoEntry |= QspiPsuPtr->GenFifoCS;
+	GenFifoEntry |= (u32)XQSPIPSU_GENFIFO_MODE_SPI;
+	if (((FlashMsg->Flags) & XQSPIPSU_MSG_FLAG_STRIPE) != FALSE)
+		GenFifoEntry |= XQSPIPSU_GENFIFO_STRIPE;
+	else
+		GenFifoEntry &= ~XQSPIPSU_GENFIFO_STRIPE;
+
+	XQspiPsu_WriteReg(QspiPsuPtr->Config.BaseAddress,
+		XQSPIPSU_GEN_FIFO_OFFSET, GenFifoEntry);
+
+	QspiPsuPtr->Msg = FlashMsg;
+	QspiPsuPtr->NumMsg = (s32)1;
+	QspiPsuPtr->MsgCnt = 0;
+
+	Value = XQspiPsu_ReadReg(QspiPsuPtr->Config.BaseAddress,
+			XQSPIPSU_CFG_OFFSET);
+	Value |= (XQSPIPSU_CFG_START_GEN_FIFO_MASK |
+			XQSPIPSU_CFG_GEN_FIFO_START_MODE_MASK |
+			XQSPIPSU_CFG_EN_POLL_TO_MASK);
+	XQspiPsu_WriteReg(QspiPsuPtr->Config.BaseAddress, XQSPIPSU_CFG_OFFSET,
+			Value);
+
+	/* Enable interrupts */
+	Value = ((u32)XQSPIPSU_IER_TXNOT_FULL_MASK |
+		(u32)XQSPIPSU_IER_TXEMPTY_MASK |
+		(u32)XQSPIPSU_IER_RXNEMPTY_MASK |
+		(u32)XQSPIPSU_IER_GENFIFOEMPTY_MASK |
+		(u32)XQSPIPSU_IER_RXEMPTY_MASK |
+		(u32)XQSPIPSU_IER_POLL_TIME_EXPIRE_MASK);
+	XQspiPsu_WriteReg(QspiPsuPtr->Config.BaseAddress, XQSPIPSU_IER_OFFSET,
+			Value);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function creates Poll config register data to write
+*
+* @param	BusMask is mask to enable/disable upper/lower data bus masks.
+*
+* @param	DataBusMask is Data bus mask value during poll operation.
+*
+* @param	Data is the poll data value to write into config regsiter.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static inline u32 XQspiPsu_Create_PollConfigData(XQspiPsu *QspiPsuPtr,
+		XQspiPsu_Msg *FlashMsg)
+{
+	u32 ConfigData = 0;
+
+	if (QspiPsuPtr->GenFifoBus & XQSPIPSU_GENFIFO_BUS_UPPER)
+		ConfigData = XQSPIPSU_SELECT_FLASH_BUS_LOWER <<
+			           XQSPIPSU_POLL_CFG_EN_MASK_UPPER_SHIFT;
+	if (QspiPsuPtr->GenFifoBus & XQSPIPSU_GENFIFO_BUS_LOWER)
+		ConfigData |= XQSPIPSU_SELECT_FLASH_BUS_LOWER <<
+			           XQSPIPSU_POLL_CFG_EN_MASK_LOWER_SHIFT;
+	ConfigData |= ((FlashMsg->PollBusMask << XQSPIPSU_POLL_CFG_MASK_EN_SHIFT)
+			& XQSPIPSU_POLL_CFG_MASK_EN_MASK);
+	ConfigData |= ((FlashMsg->PollData << XQSPIPSU_POLL_CFG_DATA_VALUE_SHIFT)
+		          & XQSPIPSU_POLL_CFG_DATA_VALUE_MASK);
+	return ConfigData;
+}
+
+/*****************************************************************************/
+/**
+* @brief
+* This API enables/ disables Write Protect pin on the flash parts.
+*
+* @param	QspiPtr is a pointer to the QSPIPSU driver component to use.
+*
+* @return	None
+*
+* @note	By default WP pin as per the QSPI controller is driven High
+* 		which means no write protection. Calling this function once
+* 		will enable the protection.
+*
+******************************************************************************/
+void XQspiPsu_WriteProtectToggle(XQspiPsu *QspiPsuPtr, u32 Toggle)
+{
+	/* For Single and Stacked flash configuration with x1 or x2 mode*/
+	if (QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_SINGLE) {
+		/* Enable */
+		XQspiPsu_Enable(QspiPsuPtr);
+
+		/* Select slave */
+		XQspiPsu_GenFifoEntryCSAssert(QspiPsuPtr);
+
+		XQspiPsu_WriteReg(QspiPsuPtr->Config.BaseAddress, XQSPIPSU_GPIO_OFFSET,
+				Toggle);
+
+	} else if (QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL ||
+			QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_STACKED) {
+		xil_printf("Dual Parallel/Stacked configuration is not supported by this API\r\n");
+	}
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu.h b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu.h
new file mode 100644
index 0000000..b73b722
--- /dev/null
+++ b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu.h
@@ -0,0 +1,335 @@
+/******************************************************************************
+*
+* Copyright (C) 2018 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xqspipsu.h
+* @addtogroup qspipsu_v1_7
+* @{
+* @details
+*
+* This is the header file for the implementation of QSPIPSU driver.
+* Generic QSPI interface allows for communication to any QSPI slave device.
+* GQSPI contains a GENFIFO into which the bus transfers required are to be
+* pushed with appropriate configuration. The controller provides TX and RX
+* FIFO's and a DMA to be used for RX transfers. The controller executes each
+* GENFIFO entry noting the configuration and places data on the bus as required
+*
+* The different options in GENFIFO are as follows:
+* IMM_DATA : Can be one byte of data to be transmitted, number of clocks or
+*            number of bytes in transfer.
+* DATA_XFER : Indicates that data/clocks need to be transmitted or received.
+* EXPONENT : e when 2^e bytes are involved in transfer.
+* SPI_MODE : SPI/Dual SPI/Quad SPI
+* CS : Lower or Upper CS or Both
+* Bus : Lower or Upper Bus or Both
+* TX : When selected, controller transmits data in IMM or fetches number of
+*      bytes mentioned form TX FIFO. If not selected, dummies are pumped.
+* RX : When selected, controller receives and fills the RX FIFO/allows RX DMA
+*      of requested number of bytes. If not selected, RX data is discarded.
+* Stripe : Byte stripe over lower and upper bus or not.
+* Poll : Polls response to match for to a set value (used along with POLL_CFG
+*        registers) and then proceeds to next GENFIFO entry.
+*        This feature is not currently used in the driver.
+*
+* GENFIFO has manual and auto start options.
+* All DMA requests need a 4-byte aligned destination address buffer and
+* size of transfer should also be a multiple of 4.
+* This driver supports DMA RX and IO RX.
+*
+* Initialization:
+* This driver uses the GQSPI controller with RX DMA. It supports both
+* interrupt and polled transfers. Manual start of GENFIFO is used.
+* XQspiPsu_CfgInitialize() initializes the instance variables.
+* Additional setting can be done using SetOptions/ClearOptions functions
+* and SelectSlave function.
+*
+* Transfer:
+* Polled or Interrupt transfers can be done. The transfer function needs the
+* message(s) to be transmitted in the form of an array of type XQspiPsu_Msg.
+* This is supposed to contain the byte count and any TX/RX buffers as required.
+* Flags can be used indicate further information such as whether the message
+* should be striped. The transfer functions form and write GENFIFO entries,
+* check the status of the transfer and report back to the application
+* when done.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------.
+* 1.0   hk  08/21/14 First release
+*       sk  03/13/15 Added IO mode support.
+*       hk  03/18/15 Switch to I/O mode before clearing RX FIFO.
+*                    Clear and disbale DMA interrupts/status in abort.
+*                    Use DMA DONE bit instead of BUSY as recommended.
+*       sk  04/24/15 Modified the code according to MISRAC-2012.
+*       sk  06/17/15 Removed NULL checks for Rx/Tx buffers. As
+*                    writing/reading from 0x0 location is permitted.
+* 1.1   sk  04/12/16 Added debug message prints.
+* 1.2	nsk 07/01/16 Added LQSPI support
+*		     Modified XQspiPsu_Select() macro in xqspipsu.h
+*		     Added XQspiPsu_GetLqspiConfigReg() in xqspipsu.h
+*		     Added required macros in xqspipsu_hw.h
+*		     Modified XQspiPsu_SetOptions() to support
+*		     LQSPI options and updated OptionsTable in
+*		     xqspipsu_options.c
+*       rk  07/15/16 Added support for TapDelays at different frequencies.
+*	nsk 08/05/16 Added example support PollData and PollTimeout
+*		     Added  XQSPIPSU_MSG_FLAG_POLL macro in xqspipsu.h
+*		     Added XQspiPsu_Create_PollConfigData and
+*		     XQspiPsu_PollData() functions in xqspipsu.c
+* 1.3	nsk 09/16/16 Update PollData and Polltimeout support for dual parallel
+*	             configuration. Updated XQspiPsu_PollData() and
+*	             XQspiPsu_Create_PollConfigData() functions in xqspipsu.c
+*                    and also modified the polldata example
+*       ms  03/17/17 Added readme.txt file in examples folder for doxygen
+*                    generation.
+*       ms  04/05/17 Modified Comment lines in functions of qspipsu
+*                    examples to recognize it as documentation block
+*                    and modified filename tag to include them in
+*                    doxygen examples.
+* 1.4	tjs 05/26/17 Added support for accessing upper DDR (0x800000000)
+*		     while booting images from QSPI
+* 1.5	tjs	08/08/17 Added index.html file for importing examples from system.mss
+* 1.5	nsk 08/14/17 Added CCI support
+* 1.5	tjs 09/14/17 Modified the checks for 4 byte addressing and commands.
+* 1.6	tjs 10/16/17 Flow for accessing flash is made similar to u-boot and linux
+* 					 For CR-984966
+* 1.6   tjs 11/02/17 Resolved the compilation errors for ICCARM. CR-988625
+* 1.7   tjs 11/16/17 Removed the unsupported 4 Byte write and sector erase
+*                    commands.
+* 1.7	tjs	12/01/17 Added support for MT25QL02G Flash from Micron. CR-990642
+* 1.7	tjs 12/19/17 Added support for S25FL064L from Spansion. CR-990724
+* 1.7	tjs 01/11/18 Added support for MX66L1G45G flash from Macronix CR-992367
+* 1.7	tjs	01/16/18 Removed the check for DMA MSB to be written. (CR#992560)
+* 1.7	tjs	01/17/18 Added support to toggle the WP pin of flash. (PR#2448)
+*                    Added XQspiPsu_SetWP() in xqspipsu_options.c
+*                    Added XQspiPsu_WriteProtectToggle() in xqspipsu.c and
+*                    also added write protect example.
+* 1.7	tjs	03/14/18 Added support in EL1 NS mode (CR#974882)
+* 1.7	tjs 26/03/18 In dual parallel mode enable both CS when issuing Write
+*		     		 enable command. CR-998478
+* 

+*
+******************************************************************************/
+#ifndef XQSPIPSU_H_		/* prevent circular inclusions */
+#define XQSPIPSU_H_		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xqspipsu_hw.h"
+#include "xil_cache.h"
+
+/**************************** Type Definitions *******************************/
+/**
+ * The handler data type allows the user to define a callback function to
+ * handle the asynchronous processing for the QSPIPSU device.  The application
+ * using this driver is expected to define a handler of this type to support
+ * interrupt driven mode.  The handler executes in an interrupt context, so
+ * only minimal processing should be performed.
+ *
+ * @param	CallBackRef is the callback reference passed in by the upper
+ *		layer when setting the callback functions, and passed back to
+ *		the upper layer when the callback is invoked. Its type is
+ *		not important to the driver, so it is a void pointer.
+ * @param 	StatusEvent holds one or more status events that have occurred.
+ *		See the XQspiPsu_SetStatusHandler() for details on the status
+ *		events that can be passed in the callback.
+ * @param	ByteCount indicates how many bytes of data were successfully
+ *		transferred.  This may be less than the number of bytes
+ *		requested if the status event indicates an error.
+ */
+typedef void (*XQspiPsu_StatusHandler) (void *CallBackRef, u32 StatusEvent,
+					u32 ByteCount);
+
+/**
+ * This typedef contains configuration information for a flash message.
+ */
+typedef struct {
+	u8 *TxBfrPtr;
+	u8 *RxBfrPtr;
+	u32 ByteCount;
+	u32 BusWidth;
+	u32 Flags;
+	u8 PollData;
+	u32 PollTimeout;
+	u8 PollStatusCmd;
+	u8 PollBusMask;
+} XQspiPsu_Msg;
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID  of device */
+	u32 BaseAddress;	/**< Base address of the device */
+	u32 InputClockHz;	/**< Input clock frequency */
+	u8  ConnectionMode; /**< Single, Stacked and Parallel mode */
+	u8  BusWidth; 	/**< Bus width available on board */
+	u8 IsCacheCoherent; /**< Describes whether Cache Coherent or not */
+} XQspiPsu_Config;
+
+/**
+ * The XQspiPsu driver instance data. The user is required to allocate a
+ * variable of this type for every QSPIPSU device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XQspiPsu_Config Config;	 /**< Configuration structure */
+	u32 IsReady;		 /**< Device is initialized and ready */
+
+	u8 *SendBufferPtr;	 /**< Buffer to send (state) */
+	u8 *RecvBufferPtr;	 /**< Buffer to receive (state) */
+	u8 *GenFifoBufferPtr;	 /**< Gen FIFO entries */
+	s32 TxBytes;	 /**< Number of bytes to transfer (state) */
+	s32 RxBytes;	 /**< Number of bytes left to transfer(state) */
+	s32 GenFifoEntries;	 /**< Number of Gen FIFO entries remaining */
+	u32 IsBusy;		 /**< A transfer is in progress (state) */
+	u32 ReadMode;		 /**< DMA or IO mode */
+	u32 GenFifoCS;
+	u32 GenFifoBus;
+	s32 NumMsg;
+	s32 MsgCnt;
+	s32 IsUnaligned;
+	u8 IsManualstart;
+	XQspiPsu_Msg *Msg;
+	XQspiPsu_StatusHandler StatusHandler;
+	void *StatusRef;  	 /**< Callback reference for status handler */
+} XQspiPsu;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XQSPIPSU_READMODE_DMA	0x0U
+#define XQSPIPSU_READMODE_IO	0x1U
+
+#define XQSPIPSU_SELECT_FLASH_CS_LOWER	0x1U
+#define XQSPIPSU_SELECT_FLASH_CS_UPPER	0x2U
+#define XQSPIPSU_SELECT_FLASH_CS_BOTH	0x3U
+
+#define XQSPIPSU_SELECT_FLASH_BUS_LOWER	0x1U
+#define XQSPIPSU_SELECT_FLASH_BUS_UPPER	0x2U
+#define XQSPIPSU_SELECT_FLASH_BUS_BOTH	0x3U
+
+#define XQSPIPSU_SELECT_MODE_SPI	0x1U
+#define XQSPIPSU_SELECT_MODE_DUALSPI	0x2U
+#define XQSPIPSU_SELECT_MODE_QUADSPI	0x4U
+
+#define XQSPIPSU_GENFIFO_CS_SETUP	0x05U
+#define XQSPIPSU_GENFIFO_CS_HOLD	0x04U
+
+#define XQSPIPSU_CLK_ACTIVE_LOW_OPTION	0x2U
+#define XQSPIPSU_CLK_PHASE_1_OPTION	0x4U
+#define XQSPIPSU_MANUAL_START_OPTION	0x8U
+#define XQSPIPSU_LQSPI_MODE_OPTION	0x20U
+
+#define XQSPIPSU_GENFIFO_EXP_START	0x100U
+
+#define XQSPIPSU_DMA_BYTES_MAX		0x10000000U
+
+#define XQSPIPSU_CLK_PRESCALE_2		0x00U
+#define XQSPIPSU_CLK_PRESCALE_4		0x01U
+#define XQSPIPSU_CLK_PRESCALE_8		0x02U
+#define XQSPIPSU_CLK_PRESCALE_16		0x03U
+#define XQSPIPSU_CLK_PRESCALE_32		0x04U
+#define XQSPIPSU_CLK_PRESCALE_64		0x05U
+#define XQSPIPSU_CLK_PRESCALE_128	0x06U
+#define XQSPIPSU_CLK_PRESCALE_256	0x07U
+#define XQSPIPSU_CR_PRESC_MAXIMUM	7U
+
+#define XQSPIPSU_CONNECTION_MODE_SINGLE		0U
+#define XQSPIPSU_CONNECTION_MODE_STACKED	1U
+#define XQSPIPSU_CONNECTION_MODE_PARALLEL	2U
+
+/*QSPI Frequencies*/
+#define XQSPIPSU_FREQ_40MHZ 40000000
+#define XQSPIPSU_FREQ_100MHZ 100000000
+#define XQSPIPSU_FREQ_150MHZ 150000000
+
+/* Add more flags as required */
+#define XQSPIPSU_MSG_FLAG_STRIPE	0x1U
+#define XQSPIPSU_MSG_FLAG_RX		0x2U
+#define XQSPIPSU_MSG_FLAG_TX		0x4U
+#define XQSPIPSU_MSG_FLAG_POLL		0x8U
+
+/* GQSPI configuration to toggle WP of flash*/
+#define XQSPIPSU_SET_WP					1
+
+#define XQspiPsu_Select(InstancePtr, Mask)	XQspiPsu_Out32(((InstancePtr)->Config.BaseAddress) + XQSPIPSU_SEL_OFFSET, Mask)
+
+#define XQspiPsu_Enable(InstancePtr)	XQspiPsu_Out32(((InstancePtr)->Config.BaseAddress) + XQSPIPSU_EN_OFFSET, XQSPIPSU_EN_MASK)
+
+#define XQspiPsu_Disable(InstancePtr)	XQspiPsu_Out32(((InstancePtr)->Config.BaseAddress) + XQSPIPSU_EN_OFFSET, 0x0U)
+
+#define XQspiPsu_GetLqspiConfigReg(InstancePtr)   XQspiPsu_In32((XQSPIPS_BASEADDR) + XQSPIPSU_LQSPI_CR_OFFSET)
+
+
+/************************** Function Prototypes ******************************/
+
+/* Initialization and reset */
+XQspiPsu_Config *XQspiPsu_LookupConfig(u16 DeviceId);
+s32 XQspiPsu_CfgInitialize(XQspiPsu *InstancePtr, XQspiPsu_Config *ConfigPtr,
+				u32 EffectiveAddr);
+void XQspiPsu_Reset(XQspiPsu *InstancePtr);
+void XQspiPsu_Abort(XQspiPsu *InstancePtr);
+
+/* Transfer functions and handlers */
+s32 XQspiPsu_PolledTransfer(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg,
+				u32 NumMsg);
+s32 XQspiPsu_InterruptTransfer(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg,
+				u32 NumMsg);
+s32 XQspiPsu_InterruptHandler(XQspiPsu *InstancePtr);
+void XQspiPsu_SetStatusHandler(XQspiPsu *InstancePtr, void *CallBackRef,
+				XQspiPsu_StatusHandler FuncPointer);
+
+/* Configuration functions */
+s32 XQspiPsu_SetClkPrescaler(XQspiPsu *InstancePtr, u8 Prescaler);
+void XQspiPsu_SelectFlash(XQspiPsu *InstancePtr, u8 FlashCS, u8 FlashBus);
+s32 XQspiPsu_SetOptions(XQspiPsu *InstancePtr, u32 Options);
+s32 XQspiPsu_ClearOptions(XQspiPsu *InstancePtr, u32 Options);
+u32 XQspiPsu_GetOptions(XQspiPsu *InstancePtr);
+s32 XQspiPsu_SetReadMode(XQspiPsu *InstancePtr, u32 Mode);
+void XQspiPsu_SetWP(XQspiPsu *InstancePtr, u8 Value);
+void XQspiPsu_WriteProtectToggle(XQspiPsu *InstancePtr, u32 Toggle);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* XQSPIPSU_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_g.c b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_g.c
new file mode 100644
index 0000000..e14d780
--- /dev/null
+++ b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_g.c
@@ -0,0 +1,59 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xqspipsu.h"
+
+/*
+* The configuration table for devices
+*/
+
+XQspiPsu_Config XQspiPsu_ConfigTable[XPAR_XQSPIPSU_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_QSPI_0_DEVICE_ID,
+		XPAR_PSU_QSPI_0_BASEADDR,
+		XPAR_PSU_QSPI_0_QSPI_CLK_FREQ_HZ,
+		XPAR_PSU_QSPI_0_QSPI_MODE,
+		XPAR_PSU_QSPI_0_QSPI_BUS_WIDTH,
+		XPAR_PSU_QSPI_0_IS_CACHE_COHERENT
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_hw.h b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_hw.h
new file mode 100644
index 0000000..a7e8563
--- /dev/null
+++ b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_hw.h
@@ -0,0 +1,881 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xqspipsu_hw.h
+* @addtogroup qspipsu_v1_7
+* @{
+*
+* This file contains low level access funcitons using the base address
+* directly without an instance.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------.
+* 1.0   hk  08/21/14 First release
+*       hk  03/18/15 Add DMA status register masks required.
+*       sk  04/24/15 Modified the code according to MISRAC-2012.
+* 1.2	nsk 07/01/16 Added LQSPI supported Masks
+*       rk  07/15/16 Added support for TapDelays at different frequencies.
+* 1.7	tjs	03/14/18 Added support in EL1 NS mode.
+*
+* 

+*
+******************************************************************************/
+#ifndef _XQSPIPSU_HW_H_		/* prevent circular inclusions */
+#define _XQSPIPSU_HW_H_		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**
+ * QSPI Base Address
+ */
+#define XQSPIPS_BASEADDR      0XFF0F0000U
+
+/**
+ * GQSPI Base Address
+ */
+#define XQSPIPSU_BASEADDR     0xFF0F0100U
+#define XQSPIPSU_OFFSET     0x100U
+
+/**
+ * Register: XQSPIPS_EN_REG
+ */
+#define XQSPIPS_EN_REG    ( ( XQSPIPS_BASEADDR ) + 0X00000014U )
+
+#define XQSPIPS_EN_SHIFT   0
+#define XQSPIPS_EN_WIDTH   1
+#define XQSPIPS_EN_MASK    0X00000001U
+
+/**
+ * Register: XQSPIPSU_CFG
+ */
+#define XQSPIPSU_CFG_OFFSET    0X00000000U
+#define XQSPIPSU_LQSPI_CR_OFFSET    0X000000A0U
+
+#define XQSPIPSU_CFG_MODE_EN_SHIFT   30
+#define XQSPIPSU_CFG_MODE_EN_WIDTH   2
+#define XQSPIPSU_CFG_MODE_EN_MASK    0XC0000000U
+#define XQSPIPSU_CFG_MODE_EN_DMA_MASK	0X80000000U
+
+#define XQSPIPSU_CFG_GEN_FIFO_START_MODE_SHIFT   29
+#define XQSPIPSU_CFG_GEN_FIFO_START_MODE_WIDTH   1
+#define XQSPIPSU_CFG_GEN_FIFO_START_MODE_MASK    0X20000000U
+
+#define XQSPIPSU_CFG_START_GEN_FIFO_SHIFT   28
+#define XQSPIPSU_CFG_START_GEN_FIFO_WIDTH   1
+#define XQSPIPSU_CFG_START_GEN_FIFO_MASK    0X10000000U
+
+#define XQSPIPSU_CFG_ENDIAN_SHIFT   26
+#define XQSPIPSU_CFG_ENDIAN_WIDTH   1
+#define XQSPIPSU_CFG_ENDIAN_MASK    0X04000000U
+
+#define XQSPIPSU_CFG_EN_POLL_TO_SHIFT   20
+#define XQSPIPSU_CFG_EN_POLL_TO_WIDTH   1
+#define XQSPIPSU_CFG_EN_POLL_TO_MASK    0X00100000U
+
+#define XQSPIPSU_CFG_WP_HOLD_SHIFT   19
+#define XQSPIPSU_CFG_WP_HOLD_WIDTH   1
+#define XQSPIPSU_CFG_WP_HOLD_MASK    0X00080000U
+
+#define XQSPIPSU_CFG_BAUD_RATE_DIV_SHIFT   3
+#define XQSPIPSU_CFG_BAUD_RATE_DIV_WIDTH   3
+#define XQSPIPSU_CFG_BAUD_RATE_DIV_MASK    0X00000038U
+
+#define XQSPIPSU_CFG_CLK_PHA_SHIFT   2
+#define XQSPIPSU_CFG_CLK_PHA_WIDTH   1
+#define XQSPIPSU_CFG_CLK_PHA_MASK    0X00000004U
+
+#define XQSPIPSU_CFG_CLK_POL_SHIFT   1
+#define XQSPIPSU_CFG_CLK_POL_WIDTH   1
+#define XQSPIPSU_CFG_CLK_POL_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_CFG
+ */
+#define XQSPIPSU_LQSPI_CR_OFFSET	0X000000A0U
+#define XQSPIPSU_LQSPI_CR_LINEAR_MASK     0x80000000 /**< LQSPI mode enable */
+#define XQSPIPSU_LQSPI_CR_TWO_MEM_MASK    0x40000000 /**< Both memories or one */
+#define XQSPIPSU_LQSPI_CR_SEP_BUS_MASK    0x20000000 /**< Seperate memory bus */
+#define XQSPIPSU_LQSPI_CR_U_PAGE_MASK     0x10000000 /**< Upper memory page */
+#define XQSPIPSU_LQSPI_CR_ADDR_32BIT_MASK     0x01000000 /**< Upper memory page */
+#define XQSPIPSU_LQSPI_CR_MODE_EN_MASK    0x02000000 /**< Enable mode bits */
+#define XQSPIPSU_LQSPI_CR_MODE_ON_MASK    0x01000000 /**< Mode on */
+#define XQSPIPSU_LQSPI_CR_MODE_BITS_MASK  0x00FF0000 /**< Mode value for dual I/O
+                                                         or quad I/O */
+#define XQSPIPS_LQSPI_CR_INST_MASK       0x000000FF /**< Read instr code */
+#define XQSPIPS_LQSPI_CR_RST_STATE       0x80000003 /**< Default LQSPI CR value */
+#define XQSPIPS_LQSPI_CR_4_BYTE_STATE       0x88000013 /**< Default 4 Byte LQSPI CR value */
+#define XQSPIPS_LQSPI_CFG_RST_STATE       0x800238C1 /**< Default LQSPI CFG value */
+/**
+ * Register: XQSPIPSU_ISR
+ */
+#define XQSPIPSU_ISR_OFFSET	0X00000004U
+
+#define XQSPIPSU_ISR_RXEMPTY_SHIFT   11
+#define XQSPIPSU_ISR_RXEMPTY_WIDTH   1
+#define XQSPIPSU_ISR_RXEMPTY_MASK    0X00000800U
+
+#define XQSPIPSU_ISR_GENFIFOFULL_SHIFT   10
+#define XQSPIPSU_ISR_GENFIFOFULL_WIDTH   1
+#define XQSPIPSU_ISR_GENFIFOFULL_MASK    0X00000400U
+
+#define XQSPIPSU_ISR_GENFIFONOT_FULL_SHIFT   9
+#define XQSPIPSU_ISR_GENFIFONOT_FULL_WIDTH   1
+#define XQSPIPSU_ISR_GENFIFONOT_FULL_MASK    0X00000200U
+
+#define XQSPIPSU_ISR_TXEMPTY_SHIFT   8
+#define XQSPIPSU_ISR_TXEMPTY_WIDTH   1
+#define XQSPIPSU_ISR_TXEMPTY_MASK    0X00000100U
+
+#define XQSPIPSU_ISR_GENFIFOEMPTY_SHIFT   7
+#define XQSPIPSU_ISR_GENFIFOEMPTY_WIDTH   1
+#define XQSPIPSU_ISR_GENFIFOEMPTY_MASK    0X00000080U
+
+#define XQSPIPSU_ISR_RXFULL_SHIFT   5
+#define XQSPIPSU_ISR_RXFULL_WIDTH   1
+#define XQSPIPSU_ISR_RXFULL_MASK    0X00000020U
+
+#define XQSPIPSU_ISR_RXNEMPTY_SHIFT   4
+#define XQSPIPSU_ISR_RXNEMPTY_WIDTH   1
+#define XQSPIPSU_ISR_RXNEMPTY_MASK    0X00000010U
+
+#define XQSPIPSU_ISR_TXFULL_SHIFT   3
+#define XQSPIPSU_ISR_TXFULL_WIDTH   1
+#define XQSPIPSU_ISR_TXFULL_MASK    0X00000008U
+
+#define XQSPIPSU_ISR_TXNOT_FULL_SHIFT   2
+#define XQSPIPSU_ISR_TXNOT_FULL_WIDTH   1
+#define XQSPIPSU_ISR_TXNOT_FULL_MASK    0X00000004U
+
+#define XQSPIPSU_ISR_POLL_TIME_EXPIRE_SHIFT   1
+#define XQSPIPSU_ISR_POLL_TIME_EXPIRE_WIDTH   1
+#define XQSPIPSU_ISR_POLL_TIME_EXPIRE_MASK    0X00000002U
+
+#define XQSPIPSU_ISR_WR_TO_CLR_MASK 0X00000002U
+
+/**
+ * Register: XQSPIPSU_IER
+ */
+#define XQSPIPSU_IER_OFFSET    0X00000008U
+
+#define XQSPIPSU_IER_RXEMPTY_SHIFT   11
+#define XQSPIPSU_IER_RXEMPTY_WIDTH   1
+#define XQSPIPSU_IER_RXEMPTY_MASK    0X00000800U
+
+#define XQSPIPSU_IER_GENFIFOFULL_SHIFT   10
+#define XQSPIPSU_IER_GENFIFOFULL_WIDTH   1
+#define XQSPIPSU_IER_GENFIFOFULL_MASK    0X00000400U
+
+#define XQSPIPSU_IER_GENFIFONOT_FULL_SHIFT   9
+#define XQSPIPSU_IER_GENFIFONOT_FULL_WIDTH   1
+#define XQSPIPSU_IER_GENFIFONOT_FULL_MASK    0X00000200U
+
+#define XQSPIPSU_IER_TXEMPTY_SHIFT   8
+#define XQSPIPSU_IER_TXEMPTY_WIDTH   1
+#define XQSPIPSU_IER_TXEMPTY_MASK    0X00000100U
+
+#define XQSPIPSU_IER_GENFIFOEMPTY_SHIFT   7
+#define XQSPIPSU_IER_GENFIFOEMPTY_WIDTH   1
+#define XQSPIPSU_IER_GENFIFOEMPTY_MASK    0X00000080U
+
+#define XQSPIPSU_IER_RXFULL_SHIFT   5
+#define XQSPIPSU_IER_RXFULL_WIDTH   1
+#define XQSPIPSU_IER_RXFULL_MASK    0X00000020U
+
+#define XQSPIPSU_IER_RXNEMPTY_SHIFT   4
+#define XQSPIPSU_IER_RXNEMPTY_WIDTH   1
+#define XQSPIPSU_IER_RXNEMPTY_MASK    0X00000010U
+
+#define XQSPIPSU_IER_TXFULL_SHIFT   3
+#define XQSPIPSU_IER_TXFULL_WIDTH   1
+#define XQSPIPSU_IER_TXFULL_MASK    0X00000008U
+
+#define XQSPIPSU_IER_TXNOT_FULL_SHIFT   2
+#define XQSPIPSU_IER_TXNOT_FULL_WIDTH   1
+#define XQSPIPSU_IER_TXNOT_FULL_MASK    0X00000004U
+
+#define XQSPIPSU_IER_POLL_TIME_EXPIRE_SHIFT   1
+#define XQSPIPSU_IER_POLL_TIME_EXPIRE_WIDTH   1
+#define XQSPIPSU_IER_POLL_TIME_EXPIRE_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_IDR
+ */
+#define XQSPIPSU_IDR_OFFSET    0X0000000CU
+
+#define XQSPIPSU_IDR_RXEMPTY_SHIFT   11
+#define XQSPIPSU_IDR_RXEMPTY_WIDTH   1
+#define XQSPIPSU_IDR_RXEMPTY_MASK    0X00000800U
+
+#define XQSPIPSU_IDR_GENFIFOFULL_SHIFT   10
+#define XQSPIPSU_IDR_GENFIFOFULL_WIDTH   1
+#define XQSPIPSU_IDR_GENFIFOFULL_MASK    0X00000400U
+
+#define XQSPIPSU_IDR_GENFIFONOT_FULL_SHIFT   9
+#define XQSPIPSU_IDR_GENFIFONOT_FULL_WIDTH   1
+#define XQSPIPSU_IDR_GENFIFONOT_FULL_MASK    0X00000200U
+
+#define XQSPIPSU_IDR_TXEMPTY_SHIFT   8
+#define XQSPIPSU_IDR_TXEMPTY_WIDTH   1
+#define XQSPIPSU_IDR_TXEMPTY_MASK    0X00000100U
+
+#define XQSPIPSU_IDR_GENFIFOEMPTY_SHIFT   7
+#define XQSPIPSU_IDR_GENFIFOEMPTY_WIDTH   1
+#define XQSPIPSU_IDR_GENFIFOEMPTY_MASK    0X00000080U
+
+#define XQSPIPSU_IDR_RXFULL_SHIFT   5
+#define XQSPIPSU_IDR_RXFULL_WIDTH   1
+#define XQSPIPSU_IDR_RXFULL_MASK    0X00000020U
+
+#define XQSPIPSU_IDR_RXNEMPTY_SHIFT   4
+#define XQSPIPSU_IDR_RXNEMPTY_WIDTH   1
+#define XQSPIPSU_IDR_RXNEMPTY_MASK    0X00000010U
+
+#define XQSPIPSU_IDR_TXFULL_SHIFT   3
+#define XQSPIPSU_IDR_TXFULL_WIDTH   1
+#define XQSPIPSU_IDR_TXFULL_MASK    0X00000008U
+
+#define XQSPIPSU_IDR_TXNOT_FULL_SHIFT   2
+#define XQSPIPSU_IDR_TXNOT_FULL_WIDTH   1
+#define XQSPIPSU_IDR_TXNOT_FULL_MASK    0X00000004U
+
+#define XQSPIPSU_IDR_POLL_TIME_EXPIRE_SHIFT   1
+#define XQSPIPSU_IDR_POLL_TIME_EXPIRE_WIDTH   1
+#define XQSPIPSU_IDR_POLL_TIME_EXPIRE_MASK    0X00000002U
+
+#define XQSPIPSU_IDR_ALL_MASK    0X0FBEU
+
+/**
+ * Register: XQSPIPSU_IMR
+ */
+#define XQSPIPSU_IMR_OFFSET    0X00000010U
+
+#define XQSPIPSU_IMR_RXEMPTY_SHIFT   11
+#define XQSPIPSU_IMR_RXEMPTY_WIDTH   1
+#define XQSPIPSU_IMR_RXEMPTY_MASK    0X00000800U
+
+#define XQSPIPSU_IMR_GENFIFOFULL_SHIFT   10
+#define XQSPIPSU_IMR_GENFIFOFULL_WIDTH   1
+#define XQSPIPSU_IMR_GENFIFOFULL_MASK    0X00000400U
+
+#define XQSPIPSU_IMR_GENFIFONOT_FULL_SHIFT   9
+#define XQSPIPSU_IMR_GENFIFONOT_FULL_WIDTH   1
+#define XQSPIPSU_IMR_GENFIFONOT_FULL_MASK    0X00000200U
+
+#define XQSPIPSU_IMR_TXEMPTY_SHIFT   8
+#define XQSPIPSU_IMR_TXEMPTY_WIDTH   1
+#define XQSPIPSU_IMR_TXEMPTY_MASK    0X00000100U
+
+#define XQSPIPSU_IMR_GENFIFOEMPTY_SHIFT   7
+#define XQSPIPSU_IMR_GENFIFOEMPTY_WIDTH   1
+#define XQSPIPSU_IMR_GENFIFOEMPTY_MASK    0X00000080U
+
+#define XQSPIPSU_IMR_RXFULL_SHIFT   5
+#define XQSPIPSU_IMR_RXFULL_WIDTH   1
+#define XQSPIPSU_IMR_RXFULL_MASK    0X00000020U
+
+#define XQSPIPSU_IMR_RXNEMPTY_SHIFT   4
+#define XQSPIPSU_IMR_RXNEMPTY_WIDTH   1
+#define XQSPIPSU_IMR_RXNEMPTY_MASK    0X00000010U
+
+#define XQSPIPSU_IMR_TXFULL_SHIFT   3
+#define XQSPIPSU_IMR_TXFULL_WIDTH   1
+#define XQSPIPSU_IMR_TXFULL_MASK    0X00000008U
+
+#define XQSPIPSU_IMR_TXNOT_FULL_SHIFT   2
+#define XQSPIPSU_IMR_TXNOT_FULL_WIDTH   1
+#define XQSPIPSU_IMR_TXNOT_FULL_MASK    0X00000004U
+
+#define XQSPIPSU_IMR_POLL_TIME_EXPIRE_SHIFT   1
+#define XQSPIPSU_IMR_POLL_TIME_EXPIRE_WIDTH   1
+#define XQSPIPSU_IMR_POLL_TIME_EXPIRE_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_EN_REG
+ */
+#define XQSPIPSU_EN_OFFSET    0X00000014U
+
+#define XQSPIPSU_EN_SHIFT   0
+#define XQSPIPSU_EN_WIDTH   1
+#define XQSPIPSU_EN_MASK    0X00000001U
+
+/**
+ * Register: XQSPIPSU_TXD
+ */
+#define XQSPIPSU_TXD_OFFSET    0X0000001CU
+
+#define XQSPIPSU_TXD_SHIFT   0
+#define XQSPIPSU_TXD_WIDTH   32
+#define XQSPIPSU_TXD_MASK    0XFFFFFFFFU
+
+#define XQSPIPSU_TXD_DEPTH    64
+
+/**
+ * Register: XQSPIPSU_RXD
+ */
+#define XQSPIPSU_RXD_OFFSET    0X00000020U
+
+#define XQSPIPSU_RXD_SHIFT   0
+#define XQSPIPSU_RXD_WIDTH   32
+#define XQSPIPSU_RXD_MASK    0XFFFFFFFFU
+
+/**
+ * Register: XQSPIPSU_TX_THRESHOLD
+ */
+#define XQSPIPSU_TX_THRESHOLD_OFFSET    0X00000028U
+
+#define XQSPIPSU_TX_FIFO_THRESHOLD_SHIFT   0
+#define XQSPIPSU_TX_FIFO_THRESHOLD_WIDTH   6
+#define XQSPIPSU_TX_FIFO_THRESHOLD_MASK    0X0000003FU
+#define XQSPIPSU_TX_FIFO_THRESHOLD_RESET_VAL    0X01U
+
+/**
+ * Register: XQSPIPSU_RX_THRESHOLD
+ */
+#define XQSPIPSU_RX_THRESHOLD_OFFSET    0X0000002CU
+
+#define XQSPIPSU_RX_FIFO_THRESHOLD_SHIFT   0
+#define XQSPIPSU_RX_FIFO_THRESHOLD_WIDTH   6
+#define XQSPIPSU_RX_FIFO_THRESHOLD_MASK    0X0000003FU
+#define XQSPIPSU_RX_FIFO_THRESHOLD_RESET_VAL    0X01U
+
+#define XQSPIPSU_RXFIFO_THRESHOLD_OPT 32U
+
+/**
+ * Register: XQSPIPSU_GPIO
+ */
+#define XQSPIPSU_GPIO_OFFSET    0X00000030U
+
+#define XQSPIPSU_GPIO_WP_N_SHIFT   0
+#define XQSPIPSU_GPIO_WP_N_WIDTH   1
+#define XQSPIPSU_GPIO_WP_N_MASK    0X00000001U
+
+/**
+ * Register: XQSPIPSU_LPBK_DLY_ADJ
+ */
+#define XQSPIPSU_LPBK_DLY_ADJ_OFFSET    0X00000038U
+
+#define XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_SHIFT   5
+#define XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_WIDTH   1
+#define XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_MASK    0X00000020U
+
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY1_SHIFT   3
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY1_WIDTH   2
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY1_MASK    0X00000018U
+
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY0_SHIFT   0
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY0_WIDTH   3
+#define XQSPIPSU_LPBK_DLY_ADJ_DLY0_MASK    0X00000007U
+
+/**
+ * Register: XQSPIPSU_GEN_FIFO
+ */
+#define XQSPIPSU_GEN_FIFO_OFFSET    0X00000040U
+
+#define XQSPIPSU_GEN_FIFO_DATA_SHIFT   0
+#define XQSPIPSU_GEN_FIFO_DATA_WIDTH   20
+#define XQSPIPSU_GEN_FIFO_DATA_MASK    0X000FFFFFU
+
+/**
+ * Register: XQSPIPSU_SEL
+ */
+#define XQSPIPSU_SEL_OFFSET    0X00000044U
+
+#define XQSPIPSU_SEL_SHIFT   0
+#define XQSPIPSU_SEL_WIDTH   1
+#define XQSPIPSU_SEL_LQSPI_MASK    0X0U
+#define XQSPIPSU_SEL_GQSPI_MASK    0X00000001U
+
+/**
+ * Register: XQSPIPSU_FIFO_CTRL
+ */
+#define XQSPIPSU_FIFO_CTRL_OFFSET    0X0000004CU
+
+#define XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_SHIFT   2
+#define XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_WIDTH   1
+#define XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_MASK    0X00000004U
+
+#define XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_SHIFT   1
+#define XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_WIDTH   1
+#define XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_MASK    0X00000002U
+
+#define XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_SHIFT   0
+#define XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_WIDTH   1
+#define XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_MASK    0X00000001U
+
+/**
+ * Register: XQSPIPSU_GF_THRESHOLD
+ */
+#define XQSPIPSU_GF_THRESHOLD_OFFSET    0X00000050U
+
+#define XQSPIPSU_GEN_FIFO_THRESHOLD_SHIFT   0
+#define XQSPIPSU_GEN_FIFO_THRESHOLD_WIDTH   5
+#define XQSPIPSU_GEN_FIFO_THRESHOLD_MASK    0X0000001F
+#define XQSPIPSU_GEN_FIFO_THRESHOLD_RESET_VAL    0X10U
+
+/**
+ * Register: XQSPIPSU_POLL_CFG
+ */
+#define XQSPIPSU_POLL_CFG_OFFSET    0X00000054U
+
+#define XQSPIPSU_POLL_CFG_EN_MASK_UPPER_SHIFT   31
+#define XQSPIPSU_POLL_CFG_EN_MASK_UPPER_WIDTH   1
+#define XQSPIPSU_POLL_CFG_EN_MASK_UPPER_MASK    0X80000000U
+
+#define XQSPIPSU_POLL_CFG_EN_MASK_LOWER_SHIFT   30
+#define XQSPIPSU_POLL_CFG_EN_MASK_LOWER_WIDTH   1
+#define XQSPIPSU_POLL_CFG_EN_MASK_LOWER_MASK    0X40000000U
+
+#define XQSPIPSU_POLL_CFG_MASK_EN_SHIFT   8
+#define XQSPIPSU_POLL_CFG_MASK_EN_WIDTH   8
+#define XQSPIPSU_POLL_CFG_MASK_EN_MASK    0X0000FF00U
+
+#define XQSPIPSU_POLL_CFG_DATA_VALUE_SHIFT   0
+#define XQSPIPSU_POLL_CFG_DATA_VALUE_WIDTH   8
+#define XQSPIPSU_POLL_CFG_DATA_VALUE_MASK    0X000000FFU
+
+/**
+ * Register: XQSPIPSU_P_TIMEOUT
+ */
+#define XQSPIPSU_P_TO_OFFSET    0X00000058U
+
+#define XQSPIPSU_P_TO_VALUE_SHIFT   0
+#define XQSPIPSU_P_TO_VALUE_WIDTH   32
+#define XQSPIPSU_P_TO_VALUE_MASK    0XFFFFFFFFU
+
+/**
+ * Register: XQSPIPSU_XFER_STS
+ */
+#define XQSPIPSU_XFER_STS_OFFSET	0X0000005CU
+
+#define XQSPIPSU_XFER_STS_PEND_BYTES_SHIFT   0
+#define XQSPIPSU_XFER_STS_PEND_BYTES_WIDTH   32
+#define XQSPIPSU_XFER_STS_PEND_BYTES_MASK    0XFFFFFFFFU
+
+/**
+ * Register: XQSPIPSU_GF_SNAPSHOT
+ */
+#define XQSPIPSU_GF_SNAPSHOT_OFFSET    0X00000060U
+
+#define XQSPIPSU_GF_SNAPSHOT_SHIFT   0
+#define XQSPIPSU_GF_SNAPSHOT_WIDTH   20
+#define XQSPIPSU_GF_SNAPSHOT_MASK    0X000FFFFFU
+
+/**
+ * Register: XQSPIPSU_RX_COPY
+ */
+#define XQSPIPSU_RX_COPY_OFFSET    0X00000064U
+
+#define XQSPIPSU_RX_COPY_UPPER_SHIFT   8
+#define XQSPIPSU_RX_COPY_UPPER_WIDTH   8
+#define XQSPIPSU_RX_COPY_UPPER_MASK    0X0000FF00U
+
+#define XQSPIPSU_RX_COPY_LOWER_SHIFT   0
+#define XQSPIPSU_RX_COPY_LOWER_WIDTH   8
+#define XQSPIPSU_RX_COPY_LOWER_MASK    0X000000FFU
+
+/**
+ * Register: XQSPIPSU_MOD_ID
+ */
+#define XQSPIPSU_MOD_ID_OFFSET    0X000000FCU
+
+#define XQSPIPSU_MOD_ID_SHIFT   0
+#define XQSPIPSU_MOD_ID_WIDTH   32
+#define XQSPIPSU_MOD_ID_MASK    0XFFFFFFFFU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_ADDR
+ */
+#define XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET    0X00000700U
+
+#define XQSPIPSU_QSPIDMA_DST_ADDR_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_ADDR_WIDTH   30
+#define XQSPIPSU_QSPIDMA_DST_ADDR_MASK    0XFFFFFFFCU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_SIZE
+ */
+#define XQSPIPSU_QSPIDMA_DST_SIZE_OFFSET    0X00000704U
+
+#define XQSPIPSU_QSPIDMA_DST_SIZE_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_SIZE_WIDTH   27
+#define XQSPIPSU_QSPIDMA_DST_SIZE_MASK    0X1FFFFFFCU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_STS
+ */
+#define XQSPIPSU_QSPIDMA_DST_STS_OFFSET    0X00000708U
+
+#define XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_SHIFT   13
+#define XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_WIDTH   3
+#define XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_MASK    0X0000E000U
+
+#define XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_SHIFT   5
+#define XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_WIDTH   8
+#define XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_MASK    0X00001FE0U
+
+#define XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_WIDTH   4
+#define XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_MASK    0X0000001EU
+
+#define XQSPIPSU_QSPIDMA_DST_STS_BUSY_SHIFT   0
+#define XQSPIPSU_QSPIDMA_DST_STS_BUSY_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_STS_BUSY_MASK    0X00000001U
+
+#define XQSPIPSU_QSPIDMA_DST_STS_WTC	0xE000U
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_CTRL
+ */
+#define XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET    0X0000070CU
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_SHIFT   25
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_WIDTH   7
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_MASK    0XFE000000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_SHIFT   24
+#define XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_MASK    0X01000000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_SHIFT   23
+#define XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_MASK    0X00800000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_SHIFT   22
+#define XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_MASK    0X00400000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_SHIFT   10
+#define XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_WIDTH   12
+#define XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_MASK    0X003FFC00U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_WIDTH   8
+#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_MASK    0X000003FCU
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_MASK    0X00000002U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_SHIFT   0
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_MASK    0X00000001U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL_RESET_VAL	0x403FFA00U
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_I_STS
+ */
+#define XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET    0X00000714U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_SHIFT   7
+#define XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_MASK    0X00000080U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_SHIFT   6
+#define XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_MASK    0X00000040U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_SHIFT   5
+#define XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_MASK    0X00000020U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_SHIFT   4
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_MASK    0X00000010U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_SHIFT   3
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_MASK    0X00000008U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_MASK    0X00000004U
+
+#define XQSPIPSU_QSPIDMA_DST_I_STS_DONE_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_DONE_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_STS_DONE_MASK    0X00000002U
+
+#define XQSPIPSU_QSPIDMA_DST_INTR_ERR_MASK    0X000000FCU
+#define XQSPIPSU_QSPIDMA_DST_INTR_ALL_MASK    0X000000FEU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_I_EN
+ */
+#define XQSPIPSU_QSPIDMA_DST_I_EN_OFFSET    0X00000718U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_SHIFT   7
+#define XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_MASK    0X00000080U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_SHIFT   6
+#define XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_MASK    0X00000040U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_SHIFT   5
+#define XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_MASK    0X00000020U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_SHIFT   4
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_MASK    0X00000010U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_SHIFT   3
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_MASK    0X00000008U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_MASK    0X00000004U
+
+#define XQSPIPSU_QSPIDMA_DST_I_EN_DONE_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_DONE_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_EN_DONE_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_I_DIS
+ */
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET    0X0000071CU
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_SHIFT   7
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_MASK    0X00000080U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_SHIFT   6
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_MASK    0X00000040U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_SHIFT   5
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_MASK    0X00000020U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_SHIFT   4
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_MASK    0X00000010U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_SHIFT   3
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_MASK    0X00000008U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_MASK    0X00000004U
+
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_IMR
+ */
+#define XQSPIPSU_QSPIDMA_DST_IMR_OFFSET    0X00000720U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_SHIFT   7
+#define XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_MASK    0X00000080U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_SHIFT   6
+#define XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_MASK    0X00000040U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_SHIFT   5
+#define XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_MASK    0X00000020U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_SHIFT   4
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_MASK    0X00000010U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_SHIFT   3
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_MASK    0X00000008U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_SHIFT   2
+#define XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_MASK    0X00000004U
+
+#define XQSPIPSU_QSPIDMA_DST_IMR_DONE_SHIFT   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_DONE_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_IMR_DONE_MASK    0X00000002U
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_CTRL2
+ */
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_OFFSET    0X00000724U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_SHIFT   27
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_MASK    0X08000000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_SHIFT   24
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_WIDTH   3
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_MASK    0X07000000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_SHIFT   22
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_WIDTH   1
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_MASK    0X00400000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_SHIFT   19
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_WIDTH   3
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_MASK    0X00380000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_SHIFT   16
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_WIDTH   3
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_MASK    0X00070000U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_SHIFT   4
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_WIDTH   12
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_MASK    0X0000FFF0U
+
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_SHIFT   0
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_WIDTH   4
+#define XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_MASK    0X0000000FU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_DST_ADDR_MSB
+ */
+#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_OFFSET    0X00000728U
+
+#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_SHIFT   0
+#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_WIDTH   12
+#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_MASK    0X00000FFFU
+
+/**
+ * Register: XQSPIPSU_QSPIDMA_FUTURE_ECO
+ */
+#define XQSPIPSU_QSPIDMA_FUTURE_ECO_OFFSET    0X00000EFCU
+
+#define XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_SHIFT   0
+#define XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_WIDTH   32
+#define XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_MASK    0XFFFFFFFFU
+
+/*
+ * Generic FIFO masks
+ */
+#define XQSPIPSU_GENFIFO_IMM_DATA_MASK	0xFFU
+#define XQSPIPSU_GENFIFO_DATA_XFER	0x100U
+#define XQSPIPSU_GENFIFO_EXP		0x200U
+#define XQSPIPSU_GENFIFO_MODE_SPI	0x400U
+#define XQSPIPSU_GENFIFO_MODE_DUALSPI	0x800U
+#define XQSPIPSU_GENFIFO_MODE_QUADSPI	0xC00U
+#define XQSPIPSU_GENFIFO_MODE_MASK	0xC00U	/* And with ~MASK first */
+#define XQSPIPSU_GENFIFO_CS_LOWER	0x1000U
+#define XQSPIPSU_GENFIFO_CS_UPPER	0x2000U
+#define XQSPIPSU_GENFIFO_BUS_LOWER	0x4000U
+#define XQSPIPSU_GENFIFO_BUS_UPPER	0x8000U
+#define XQSPIPSU_GENFIFO_BUS_BOTH	0xC000U	/* inverse is no bus */
+#define XQSPIPSU_GENFIFO_BUS_MASK	0xC000U	/* And with ~MASK first */
+#define XQSPIPSU_GENFIFO_TX		0x10000U	/* inverse is zero pump */
+#define XQSPIPSU_GENFIFO_RX		0x20000U	/* inverse is RX discard */
+#define XQSPIPSU_GENFIFO_STRIPE		0x40000U
+#define XQSPIPSU_GENFIFO_POLL		0x80000U
+
+/*QSPI Data delay register*/
+#define XQSPIPSU_DATA_DLY_ADJ_OFFSET    0X000000F8U
+
+#define XQSPIPSU_DATA_DLY_ADJ_USE_DATA_DLY_SHIFT   31
+#define XQSPIPSU_DATA_DLY_ADJ_USE_DATA_DLY_WIDTH   1
+#define XQSPIPSU_DATA_DLY_ADJ_USE_DATA_DLY_MASK    0X80000000U
+
+#define XQSPIPSU_DATA_DLY_ADJ_DLY_SHIFT   28
+#define XQSPIPSU_DATA_DLY_ADJ_DLY_WIDTH   3
+#define XQSPIPSU_DATA_DLY_ADJ_DLY_MASK    0X70000000U
+
+/* Tapdelay Bypass register*/
+#define IOU_TAPDLY_BYPASS_OFFSET 0X00000390
+#define IOU_TAPDLY_BYPASS_LQSPI_RX_SHIFT 0X02
+#define IOU_TAPDLY_BYPASS_LQSPI_RX_WIDTH 0X01
+#define IOU_TAPDLY_BYPASS_LQSPI_RX_MASK 0x00000004
+#define IOU_TAPDLY_RESET_STATE 0x7
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XQspiPsu_In32 Xil_In32
+#define XQspiPsu_Out32 Xil_Out32
+
+/****************************************************************************/
+/**
+* Read a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to the target register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XQspiPsu_ReadReg(u32 BaseAddress. s32 RegOffset)
+*
+******************************************************************************/
+#define XQspiPsu_ReadReg(BaseAddress, RegOffset) XQspiPsu_In32((BaseAddress) + (RegOffset))
+
+/***************************************************************************/
+/**
+* Write to a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to target register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XQspiPsu_WriteReg(u32 BaseAddress, s32 RegOffset,
+*		u32 RegisterValue)
+*
+******************************************************************************/
+#define XQspiPsu_WriteReg(BaseAddress, RegOffset, RegisterValue) XQspiPsu_Out32((BaseAddress) + (RegOffset), (RegisterValue))
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* _XQSPIPSU_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_options.c b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_options.c
new file mode 100644
index 0000000..e943e52
--- /dev/null
+++ b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_options.c
@@ -0,0 +1,666 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xqspipsu_options.c
+* @addtogroup qspipsu_v1_7
+* @{
+*
+* This file implements funcitons to configure the QSPIPSU component,
+* specifically some optional settings, clock and flash related information.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------
+* 1.0   hk  08/21/14 First release
+*       sk  03/13/15 Added IO mode support.
+*       sk  04/24/15 Modified the code according to MISRAC-2012.
+* 1.1   sk  04/12/16 Added debug message prints.
+* 1.2	nsk 07/01/16 Modified XQspiPsu_SetOptions() to support
+*		     LQSPI options and updated OptionsTable
+*       rk  07/15/16 Added support for TapDelays at different frequencies.
+* 1.7	tjs 01/17/18 Added support to toggle the WP pin of flash. (PR#2448)
+* 1.7	tjs	03/14/18 Added support in EL1 NS mode. (CR#974882)
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xqspipsu.h"
+#if defined (__aarch64__)
+#include "xil_smc.h"
+#endif
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#if defined (ARMR5) || (__aarch64__)
+#define TAPDLY_BYPASS_VALVE_40MHZ 0x01
+#define TAPDLY_BYPASS_VALVE_100MHZ 0x01
+#define USE_DLY_LPBK  0x01
+#define USE_DATA_DLY_ADJ 0x01
+#define DATA_DLY_ADJ_DLY 0X02
+#define LPBK_DLY_ADJ_DLY0 0X02
+#endif
+
+/************************** Function Prototypes ******************************/
+
+#if defined (ARMR5) || (__aarch64__)
+s32 XQspi_Set_TapDelay(XQspiPsu * InstancePtr,u32 TapdelayBypass,
+						u32 LPBKDelay,u32 Datadelay);
+static s32 XQspipsu_Calculate_Tapdelay(XQspiPsu *InstancePtr, u8 Prescaler);
+#endif
+
+/************************** Variable Definitions *****************************/
+
+/*
+ * Create the table of options which are processed to get/set the device
+ * options. These options are table driven to allow easy maintenance and
+ * expansion of the options.
+ */
+typedef struct {
+	u32 Option;
+	u32 Mask;
+} OptionsMap;
+
+static OptionsMap OptionsTable[] = {
+	{XQSPIPSU_CLK_ACTIVE_LOW_OPTION, XQSPIPSU_CFG_CLK_POL_MASK},
+	{XQSPIPSU_CLK_PHASE_1_OPTION, XQSPIPSU_CFG_CLK_PHA_MASK},
+	{XQSPIPSU_MANUAL_START_OPTION, XQSPIPSU_CFG_GEN_FIFO_START_MODE_MASK},
+	{XQSPIPSU_LQSPI_MODE_OPTION, XQSPIPSU_CFG_WP_HOLD_MASK},
+};
+
+#define XQSPIPSU_NUM_OPTIONS	(sizeof(OptionsTable) / sizeof(OptionsMap))
+
+/*****************************************************************************/
+/**
+*
+* This function sets the options for the QSPIPSU device driver.The options
+* control how the device behaves relative to the QSPIPSU bus. The device must be
+* idle rather than busy transferring data before setting these device options.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Options contains the specified options to be set. This is a bit
+*		mask where a 1 indicates the option should be turned ON and
+*		a 0 indicates no action. One or more bit values may be
+*		contained in the mask. See the bit definitions named
+*		XQSPIPSU_*_OPTIONS in the file xqspipsu.h.
+*
+* @return
+*		- XST_SUCCESS if options are successfully set.
+*		- XST_DEVICE_BUSY if the device is currently transferring data.
+*		The transfer must complete or be aborted before setting options.
+*
+* @note
+* This function is not thread-safe.
+*
+******************************************************************************/
+s32 XQspiPsu_SetOptions(XQspiPsu *InstancePtr, u32 Options)
+{
+	u32 ConfigReg;
+	u32 Index;
+	u32 QspiPsuOptions;
+	s32 Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Do not allow to modify the Control Register while a transfer is in
+	 * progress. Not thread-safe.
+	 */
+	if (InstancePtr->IsBusy == TRUE) {
+		Status = (s32)XST_DEVICE_BUSY;
+	} else {
+
+		ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+					      XQSPIPSU_CFG_OFFSET);
+		QspiPsuOptions = Options & XQSPIPSU_LQSPI_MODE_OPTION;
+		Options &= ~XQSPIPSU_LQSPI_MODE_OPTION;
+		/*
+		 * Loop through the options table, turning the option on
+		 * depending on whether the bit is set in the incoming options flag.
+		 */
+		for (Index = 0U; Index < XQSPIPSU_NUM_OPTIONS; Index++) {
+			if ((Options & OptionsTable[Index].Option) != FALSE) {
+				/* Turn it on */
+				ConfigReg |= OptionsTable[Index].Mask;
+			} else {
+                /* Turn it off */
+                ConfigReg &= ~(OptionsTable[Index].Mask);
+        }
+
+		}
+		/*
+		 * Now write the control register. Leave it to the upper layers
+		 * to restart the device.
+		 */
+		XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress, XQSPIPSU_CFG_OFFSET,
+				 ConfigReg);
+
+		if ((Options & XQSPIPSU_MANUAL_START_OPTION) != FALSE) {
+			InstancePtr->IsManualstart = TRUE;
+		}
+		/*
+		 * Check for the LQSPI configuration options.
+		 */
+		ConfigReg = XQspiPsu_ReadReg(XQSPIPS_BASEADDR,XQSPIPSU_LQSPI_CR_OFFSET);
+
+			if (QspiPsuOptions & XQSPIPSU_LQSPI_MODE_OPTION) {
+			XQspiPsu_WriteReg(XQSPIPS_BASEADDR,XQSPIPSU_LQSPI_CR_OFFSET,XQSPIPS_LQSPI_CR_4_BYTE_STATE);
+			XQspiPsu_WriteReg(XQSPIPS_BASEADDR,XQSPIPSU_CFG_OFFSET,XQSPIPS_LQSPI_CFG_RST_STATE);
+			/* Enable the QSPI controller */
+			XQspiPsu_WriteReg(XQSPIPS_BASEADDR,XQSPIPSU_EN_OFFSET,XQSPIPSU_EN_MASK);
+		}
+		 else {
+			ConfigReg &= ~(XQSPIPSU_LQSPI_CR_LINEAR_MASK);
+			XQspiPsu_WriteReg(XQSPIPS_BASEADDR,XQSPIPSU_LQSPI_CR_OFFSET, ConfigReg);
+		}
+
+		Status = XST_SUCCESS;
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function resets the options for the QSPIPSU device driver.The options
+* control how the device behaves relative to the QSPIPSU bus. The device must be
+* idle rather than busy transferring data before setting these device options.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Options contains the specified options to be set. This is a bit
+*		mask where a 1 indicates the option should be turned OFF and
+*		a 0 indicates no action. One or more bit values may be
+*		contained in the mask. See the bit definitions named
+*		XQSPIPSU_*_OPTIONS in the file xqspipsu.h.
+*
+* @return
+*		- XST_SUCCESS if options are successfully set.
+*		- XST_DEVICE_BUSY if the device is currently transferring data.
+*		The transfer must complete or be aborted before setting options.
+*
+* @note
+* This function is not thread-safe.
+*
+******************************************************************************/
+s32 XQspiPsu_ClearOptions(XQspiPsu *InstancePtr, u32 Options)
+{
+	u32 ConfigReg;
+	u32 Index;
+	s32 Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Do not allow to modify the Control Register while a transfer is in
+	 * progress. Not thread-safe.
+	 */
+	if (InstancePtr->IsBusy == TRUE) {
+		Status = (s32)XST_DEVICE_BUSY;
+	} else {
+
+		ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+					      XQSPIPSU_CFG_OFFSET);
+
+		/*
+		 * Loop through the options table, turning the option on
+		 * depending on whether the bit is set in the incoming options flag.
+		 */
+		for (Index = 0U; Index < XQSPIPSU_NUM_OPTIONS; Index++) {
+			if ((Options & OptionsTable[Index].Option) != FALSE) {
+				/* Turn it off */
+				ConfigReg &= ~OptionsTable[Index].Mask;
+			}
+		}
+
+		/*
+		 * Now write the control register. Leave it to the upper layers
+		 * to restart the device.
+		 */
+		XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress, XQSPIPSU_CFG_OFFSET,
+				 ConfigReg);
+
+		if ((Options & XQSPIPSU_MANUAL_START_OPTION) != FALSE) {
+			InstancePtr->IsManualstart = FALSE;
+		}
+
+		Status = XST_SUCCESS;
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function gets the options for the QSPIPSU device. The options control how
+* the device behaves relative to the QSPIPSU bus.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+*
+* @return
+*
+* Options contains the specified options currently set. This is a bit value
+* where a 1 means the option is on, and a 0 means the option is off.
+* See the bit definitions named XQSPIPSU_*_OPTIONS in file xqspipsu.h.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 XQspiPsu_GetOptions(XQspiPsu *InstancePtr)
+{
+	u32 OptionsFlag = 0;
+	u32 ConfigReg;
+	u32 Index;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Get the current options from QSPIPSU configuration register.
+	 */
+	ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+				      XQSPIPSU_CFG_OFFSET);
+
+	/* Loop through the options table to grab options */
+	for (Index = 0U; Index < XQSPIPSU_NUM_OPTIONS; Index++) {
+		if ((ConfigReg & OptionsTable[Index].Mask) != FALSE) {
+			OptionsFlag |= OptionsTable[Index].Option;
+		}
+	}
+
+	return OptionsFlag;
+}
+
+#if defined (ARMR5) || (__aarch64__)
+/*****************************************************************************/
+/**
+*
+* This function sets the Tapdelay values for the QSPIPSU device driver.The device
+* must be idle rather than busy transferring data before setting Tapdelay.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	TapdelayBypss contains the IOU_TAPDLY_BYPASS register value.
+* @param	LPBKDelay contains the GQSPI_LPBK_DLY_ADJ register value.
+* @param	Datadelay contains the QSPI_DATA_DLY_ADJ register value.
+*
+* @return
+*		- XST_SUCCESS if options are successfully set.
+*		- XST_DEVICE_BUSY if the device is currently transferring data.
+*		The transfer must complete or be aborted before setting TapDelay.
+*
+* @note
+* This function is not thread-safe.
+*
+******************************************************************************/
+s32 XQspi_Set_TapDelay(XQspiPsu * InstancePtr,u32 TapdelayBypass,
+						u32 LPBKDelay,u32 Datadelay)
+{
+	s32 Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Do not allow to modify the Control Register while a transfer is in
+	 * progress. Not thread-safe.
+	 */
+	if (InstancePtr->IsBusy == TRUE) {
+		Status = XST_DEVICE_BUSY;
+	} else {
+#if EL1_NONSECURE && defined (__aarch64__)
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+				IOU_TAPDLY_BYPASS_OFFSET) |
+				((u64)(0x4) << 32),
+				(u64)TapdelayBypass, 0, 0, 0, 0, 0);
+#else
+		XQspiPsu_WriteReg(XPS_SYS_CTRL_BASEADDR,IOU_TAPDLY_BYPASS_OFFSET,
+				TapdelayBypass);
+#endif
+		XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+				XQSPIPSU_LPBK_DLY_ADJ_OFFSET,LPBKDelay);
+		XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+				XQSPIPSU_DATA_DLY_ADJ_OFFSET,Datadelay);
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* Configures the clock according to the prescaler passed.
+*
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Prescaler - clock prescaler.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_DEVICE_BUSY if the device is currently transferring data.
+*		The transfer must complete or be aborted before setting Tapdelay.
+*
+* @note		None.
+*
+******************************************************************************/
+static s32 XQspipsu_Calculate_Tapdelay(XQspiPsu *InstancePtr, u8 Prescaler)
+{
+	u32 FreqDiv, Divider, Tapdelay, LBkModeReg, delayReg;
+	s32 Status;
+
+	Divider = (1 << (Prescaler+1));
+
+	FreqDiv = (InstancePtr->Config.InputClockHz)/Divider;
+#if EL1_NONSECURE && defined (__aarch64__)
+	Tapdelay = IOU_TAPDLY_RESET_STATE;
+#else
+	Tapdelay = XQspiPsu_ReadReg(XPS_SYS_CTRL_BASEADDR,
+			IOU_TAPDLY_BYPASS_OFFSET);
+#endif
+
+	Tapdelay = Tapdelay & (~IOU_TAPDLY_BYPASS_LQSPI_RX_MASK);
+
+	LBkModeReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_LPBK_DLY_ADJ_OFFSET);
+
+	LBkModeReg = (LBkModeReg &
+			(~(XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_MASK))) &
+			(LBkModeReg & (~(XQSPIPSU_LPBK_DLY_ADJ_DLY1_MASK))) &
+			(LBkModeReg & (~(XQSPIPSU_LPBK_DLY_ADJ_DLY0_MASK)));
+
+	delayReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_DATA_DLY_ADJ_OFFSET);
+
+	delayReg = (delayReg &
+			(~(XQSPIPSU_DATA_DLY_ADJ_USE_DATA_DLY_MASK))) &
+			(delayReg & (~( XQSPIPSU_DATA_DLY_ADJ_DLY_MASK)));
+
+	if(FreqDiv < XQSPIPSU_FREQ_40MHZ){
+		Tapdelay = Tapdelay |
+				(TAPDLY_BYPASS_VALVE_40MHZ << IOU_TAPDLY_BYPASS_LQSPI_RX_SHIFT);
+	} else if (FreqDiv <= XQSPIPSU_FREQ_100MHZ) {
+		Tapdelay = Tapdelay | (TAPDLY_BYPASS_VALVE_100MHZ << IOU_TAPDLY_BYPASS_LQSPI_RX_SHIFT);
+		LBkModeReg = LBkModeReg |
+				(USE_DLY_LPBK <<  XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_SHIFT);
+		delayReg = delayReg |
+				(USE_DATA_DLY_ADJ  << XQSPIPSU_DATA_DLY_ADJ_USE_DATA_DLY_SHIFT) |
+				(DATA_DLY_ADJ_DLY  << XQSPIPSU_DATA_DLY_ADJ_DLY_SHIFT);
+	} else if (FreqDiv <= XQSPIPSU_FREQ_150MHZ) {
+		LBkModeReg = LBkModeReg |
+				(USE_DLY_LPBK  <<  XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_SHIFT ) |
+				(LPBK_DLY_ADJ_DLY0  << XQSPIPSU_LPBK_DLY_ADJ_DLY0_SHIFT);
+	}
+	Status = XQspi_Set_TapDelay(InstancePtr, Tapdelay, LBkModeReg, delayReg);
+
+	return Status;
+}
+#endif
+
+/*****************************************************************************/
+/**
+*
+* Configures the clock according to the prescaler passed.
+*
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Prescaler - clock prescaler to be set.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_DEVICE_IS_STARTED if the device is already started.
+*		- XST_DEVICE_BUSY if the device is currently transferring data.
+*		It must be stopped to re-initialize.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XQspiPsu_SetClkPrescaler(XQspiPsu *InstancePtr, u8 Prescaler)
+{
+	u32 ConfigReg;
+	s32 Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Prescaler <= XQSPIPSU_CR_PRESC_MAXIMUM);
+
+	/*
+	 * Do not allow the slave select to change while a transfer is in
+	 * progress. Not thread-safe.
+	 */
+	if (InstancePtr->IsBusy == TRUE) {
+		Status = (s32)XST_DEVICE_BUSY;
+	} else {
+
+		/*
+		 * Read the configuration register, mask out the relevant bits, and set
+		 * them with the shifted value passed into the function. Write the
+		 * results back to the configuration register.
+		 */
+		ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+					      XQSPIPSU_CFG_OFFSET);
+
+		ConfigReg &= (u32)(~XQSPIPSU_CFG_BAUD_RATE_DIV_MASK);
+		ConfigReg |= (u32) ((u32)Prescaler & (u32)XQSPIPSU_CR_PRESC_MAXIMUM) <<
+				    XQSPIPSU_CFG_BAUD_RATE_DIV_SHIFT;
+
+		XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
+				  XQSPIPSU_CFG_OFFSET, ConfigReg);
+
+#if defined (ARMR5) || (__aarch64__)
+		Status = XQspipsu_Calculate_Tapdelay(InstancePtr,Prescaler);
+#else
+		Status = XST_SUCCESS;
+#endif
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This funciton should be used to tell the QSPIPSU driver the HW flash
+* configuration being used. This API should be called atleast once in the
+* application. If desired, it can be called multiple times when switching
+* between communicating to different flahs devices/using different configs.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	FlashCS - Flash Chip Select.
+* @param	FlashBus - Flash Bus (Upper, Lower or Both).
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_DEVICE_IS_STARTED if the device is already started.
+*		It must be stopped to re-initialize.
+*
+* @note		If this funciton is not called atleast once in the application,
+*		the driver assumes there is a single flash connected to the
+*		lower bus and CS line.
+*
+******************************************************************************/
+void XQspiPsu_SelectFlash(XQspiPsu *InstancePtr, u8 FlashCS, u8 FlashBus)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+
+#ifdef DEBUG
+	xil_printf("\nXQspiPsu_SelectFlash\r\n");
+#endif
+
+	/*
+	 * Bus and CS lines selected here will be updated in the instance and
+	 * used for subsequent GENFIFO entries during transfer.
+	 */
+
+	/* Choose slave select line */
+	switch (FlashCS) {
+		case XQSPIPSU_SELECT_FLASH_CS_BOTH:
+			InstancePtr->GenFifoCS = (u32)XQSPIPSU_GENFIFO_CS_LOWER |
+						(u32)XQSPIPSU_GENFIFO_CS_UPPER;
+			break;
+		case XQSPIPSU_SELECT_FLASH_CS_UPPER:
+			InstancePtr->GenFifoCS = XQSPIPSU_GENFIFO_CS_UPPER;
+			break;
+		case XQSPIPSU_SELECT_FLASH_CS_LOWER:
+			InstancePtr->GenFifoCS = XQSPIPSU_GENFIFO_CS_LOWER;
+			break;
+		default:
+			InstancePtr->GenFifoCS = XQSPIPSU_GENFIFO_CS_LOWER;
+			break;
+	}
+
+	/* Choose bus */
+	switch (FlashBus) {
+		case XQSPIPSU_SELECT_FLASH_BUS_BOTH:
+			InstancePtr->GenFifoBus = (u32)XQSPIPSU_GENFIFO_BUS_LOWER |
+						(u32)XQSPIPSU_GENFIFO_BUS_UPPER;
+			break;
+		case XQSPIPSU_SELECT_FLASH_BUS_UPPER:
+			InstancePtr->GenFifoBus = XQSPIPSU_GENFIFO_BUS_UPPER;
+			break;
+		case XQSPIPSU_SELECT_FLASH_BUS_LOWER:
+			InstancePtr->GenFifoBus = XQSPIPSU_GENFIFO_BUS_LOWER;
+			break;
+		default:
+			InstancePtr->GenFifoBus = XQSPIPSU_GENFIFO_BUS_LOWER;
+			break;
+	}
+#ifdef DEBUG
+	xil_printf("\nGenFifoCS is %08x and GenFifoBus is %08x\r\n",
+				InstancePtr->GenFifoCS, InstancePtr->GenFifoBus);
+#endif
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the Read mode for the QSPIPSU device driver.The device
+* must be idle rather than busy transferring data before setting Read mode
+* options.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Mode contains the specified Mode to be set. See the
+* 		bit definitions named XQSPIPSU_READMODE_* in the file xqspipsu.h.
+*
+* @return
+*		- XST_SUCCESS if options are successfully set.
+*		- XST_DEVICE_BUSY if the device is currently transferring data.
+*		The transfer must complete or be aborted before setting Mode.
+*
+* @note
+* This function is not thread-safe.
+*
+******************************************************************************/
+s32 XQspiPsu_SetReadMode(XQspiPsu *InstancePtr, u32 Mode)
+{
+	u32 ConfigReg;
+	s32 Status;
+
+#ifdef DEBUG
+	xil_printf("\nXQspiPsu_SetReadMode\r\n");
+#endif
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Do not allow to modify the Control Register while a transfer is in
+	 * progress. Not thread-safe.
+	 */
+	if (InstancePtr->IsBusy == TRUE) {
+		Status = (s32)XST_DEVICE_BUSY;
+	} else {
+
+		InstancePtr->ReadMode = Mode;
+
+		ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+					      XQSPIPSU_CFG_OFFSET);
+
+		if (Mode == XQSPIPSU_READMODE_DMA) {
+			ConfigReg &= ~XQSPIPSU_CFG_MODE_EN_MASK;
+			ConfigReg |= XQSPIPSU_CFG_MODE_EN_DMA_MASK;
+		} else {
+			ConfigReg &= ~XQSPIPSU_CFG_MODE_EN_MASK;
+		}
+
+		XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress, XQSPIPSU_CFG_OFFSET,
+				 ConfigReg);
+
+		Status = XST_SUCCESS;
+	}
+#ifdef DEBUG
+	xil_printf("\nRead Mode is %08x\r\n", InstancePtr->ReadMode);
+#endif
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the Write Protect and Hold options for the QSPIPSU device
+* driver.The device must be idle rather than busy transferring data before
+* setting Write Protect and Hold options.
+*
+* @param	InstancePtr is a pointer to the XQspiPsu instance.
+* @param	Value of the WP_HOLD bit in configuration register
+*
+* @return	None
+*
+* @note
+* This function is not thread-safe. This function can only be used with single
+* flash configuration and x1/x2 data mode. This function cannot be used with
+* x4 data mode and dual parallel and stacked flash configuration.
+*
+******************************************************************************/
+void XQspiPsu_SetWP(XQspiPsu *InstancePtr, u8 Value)
+{
+	u32 ConfigReg;
+
+	ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
+			XQSPIPSU_CFG_OFFSET);
+	ConfigReg |= Value << XQSPIPSU_CFG_WP_HOLD_SHIFT;
+	XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress, XQSPIPSU_CFG_OFFSET,
+					 ConfigReg);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_sinit.c b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_sinit.c
new file mode 100644
index 0000000..3869167
--- /dev/null
+++ b/src/Xilinx/libsrc/qspipsu_v1_7/src/xqspipsu_sinit.c
@@ -0,0 +1,100 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xqspipsu_sinit.c
+* @addtogroup qspipsu_v1_7
+* @{
+*
+* The implementation of the XQspiPsu component's static initialization
+* functionality.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------
+* 1.0   hk  08/21/14 First release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xqspipsu.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+extern XQspiPsu_Config XQspiPsu_ConfigTable[XPAR_XQSPIPSU_NUM_INSTANCES];
+
+/*****************************************************************************/
+/**
+*
+* Looks up the device configuration based on the unique device ID. A table
+* contains the configuration info for each device in the system.
+*
+* @param	DeviceId contains the ID of the device to look up the
+*		configuration for.
+*
+* @return
+*
+* A pointer to the configuration found or NULL if the specified device ID was
+* not found. See xqspipsu.h for the definition of XQspiPsu_Config.
+*
+* @note		None.
+*
+******************************************************************************/
+XQspiPsu_Config *XQspiPsu_LookupConfig(u16 DeviceId)
+{
+	XQspiPsu_Config *CfgPtr = NULL;
+	s32 Index;
+
+	for (Index = 0; Index < XPAR_XQSPIPSU_NUM_INSTANCES; Index++) {
+		if (XQspiPsu_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XQspiPsu_ConfigTable[Index];
+			break;
+		}
+	}
+	return (XQspiPsu_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/resetps_v1_0/src/Makefile b/src/Xilinx/libsrc/resetps_v1_0/src/Makefile
new file mode 100644
index 0000000..67ab3d8
--- /dev/null
+++ b/src/Xilinx/libsrc/resetps_v1_0/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner resetps_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling resetps"
+
+resetps_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: resetps_includes
+
+resetps_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/resetps_v1_0/src/xresetps.c b/src/Xilinx/libsrc/resetps_v1_0/src/xresetps.c
new file mode 100644
index 0000000..626ec54
--- /dev/null
+++ b/src/Xilinx/libsrc/resetps_v1_0/src/xresetps.c
@@ -0,0 +1,1030 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xresetps.c
+* @addtogroup xresetps_v1_0
+* @{
+*
+* Contains the implementation of interface functions of the XResetPs driver.
+* See xresetps.h for a description of the driver.
+*
+* 
+* MODIFICATION HISTORY:
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------
+* 1.00  cjp    09/05/17 First release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xresetps.h"
+#include "xresetps_hw.h"
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+#define XRESETPS_RSTID_BASE             (1000)
+#define XRESETPS_REGADDR_INVALID        (0xFFFFFFFFU)
+#define XRESETPS_BM_INVALID             (0xFFFFFFFFU)
+
+/**************************** Type Definitions *******************************/
+typedef struct {
+	const u32                 SlcrregAddr;
+	const u32                 SlcrregBitmask;
+	const u32                 PwrStateBitmask;
+	const XResetPs_PulseTypes PulseType;
+	const u8                  SupportedActions;
+} XResetPs_Lookup;
+
+/************************** Variable Definitions *****************************/
+#if !EL1_NONSECURE
+const static XResetPs_Lookup ResetMap[] = {
+	/*
+	 *	{Control Register, Control Bitmask,
+	 *	 Power State Bitask, Pulse Type,
+	 *	 Supported Actions},
+	 */
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  PCIE_CFG_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  PCIE_BRIDGE_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  PCIE_CTRL_RESET_MASK,
+	PCIE_CTRL_PSCHK_MASK,           XRESETPS_PT_DLY_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  DP_RESET_MASK,
+	DP_PSCHK_MASK,                  XRESETPS_PT_DLY_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  SWDT_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  AFI_FM5_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  AFI_FM4_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  AFI_FM3_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  AFI_FM2_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  AFI_FM1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  AFI_FM0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  GDMA_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  GPU_PP1_RESET_MASK,
+	GPU_PP1_PSCHK_MASK,             XRESETPS_PT_DLY_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  GPU_PP0_RESET_MASK,
+	GPU_PP0_PSCHK_MASK,             XRESETPS_PT_DLY_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  GPU_RESET_MASK,
+	GPU_PSCHK_MASK,                 XRESETPS_PT_DLY_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  GT_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_TOP,  SATA_RESET_MASK,
+	SATA_PSCHK_MASK,                XRESETPS_PT_DLY_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_APU,  ACPU3_PWRON_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_APU,  ACPU2_PWRON_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_APU,  ACPU1_PWRON_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_APU,  ACPU0_PWRON_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_APU,  APU_L2_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_APU,  ACPU3_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_APU,  ACPU2_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_APU,  ACPU1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_FPD_APU,  ACPU0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_DDR_SS,   DDR_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_RST_DDR_SS,   DDR_APM_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RESET_CTRL,   SOFT_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU0, GEM0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU0, GEM1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU0, GEM2_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU0, GEM3_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, QSPI_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, UART0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, UART1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, SPI0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, SPI1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, SDIO0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, SDIO1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, CAN0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, CAN1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, I2C0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, I2C1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, TTC0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, TTC1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, TTC2_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, TTC3_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, SWDT_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, NAND_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, ADMA_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, GPIO_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, IOU_CC_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_IOU2, TIMESTAMP_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  RPU_R50_RESET_MASK,
+	R50_PSCHK_MASK,                 XRESETPS_PT_DLY_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  RPU_R51_RESET_MASK,
+	R51_PSCHK_MASK,                 XRESETPS_PT_DLY_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  RPU_AMBA_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  OCM_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  RPU_PGE_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  USB0_CORERESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  USB1_CORERESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  USB0_HIBERRESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  USB1_HIBERRESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  USB0_APB_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  USB1_APB_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  IPI_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  APM_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  RTC_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  SYSMON_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  AFI_FM6_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  LPD_SWDT_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_TOP,  FPD_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_DBG,  RPU_DBG1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_DBG,  RPU_DBG0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_DBG,  DBG_LPD_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RST_LPD_DBG,  DBG_FPD_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_APLL_CTRL,    APLL_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_DPLL_CTRL,    DPLL_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRF_APB_VPLL_CTRL,    VPLL_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_IOPLL_CTRL,   IOPLL_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_CRL_APB_RPLL_CTRL,    RPLL_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_SUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL0_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL1_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL2_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL3_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL4_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL5_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL6_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL7_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL8_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL9_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL10_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL11_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL12_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL13_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL14_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL15_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL16_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL17_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL18_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL19_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL20_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL21_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL22_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL23_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL24_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL25_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL26_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL27_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL28_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL29_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL30_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_IOM_GPO3_CTRL,    GPO3_PL31_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_GLB_RST_CTRL,     RPU_LS_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_NOSUP)},
+	{XRESETPS_PMU_GLB_RST_CTRL,     PS_ONLY_RESET_MASK,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_NO_DLY_NO_PSCHK,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_SUP, XRESETPS_SUP, XRESETPS_NOSUP)},
+	/* All fields invalidated for PL since not supported */
+	{XRESETPS_REGADDR_INVALID,      XRESETPS_BM_INVALID,
+	XRESETPS_BM_INVALID,            XRESETPS_PT_INVALID,
+	XRESETPS_SUPPORTED_ACT(XRESETPS_NOSUP, XRESETPS_NOSUP, XRESETPS_NOSUP)},
+};
+#endif
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* Initialize a specific reset controller instance/driver. This function
+* must be called before other functions of the driver are called.
+*
+* @param	InstancePtr is a pointer to the XResetPs instance.
+* @param	ConfigPtr is the config structure.
+* @param	EffectiveAddress is the base address for the device. It could be
+*		a virtual address if address translation is supported in the
+*		system, otherwise it is the physical address.
+*
+* @return
+*		- XST_SUCCESS if initialization was successful.
+*
+* @note		None.
+*
+******************************************************************************/
+XStatus XResetPs_CfgInitialize(XResetPs *InstancePtr,
+			       XResetPs_Config *ConfigPtr, u32 EffectiveAddress)
+{
+	/* Arguments validation */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+
+	/* Copying instance */
+	InstancePtr->Config.DeviceId = ConfigPtr->DeviceId;
+	InstancePtr->Config.BaseAddress = EffectiveAddress;
+
+	return XST_SUCCESS;
+}
+
+#if !EL1_NONSECURE
+/****************************************************************************/
+/**
+*
+* Pulse Reset RPU.
+*
+* @param	None.
+*
+* @return
+*		- XST_SUCCESS if successful else error code.
+*
+* @note		The pulse reset sequence is referred from ug1085(v1.3)
+*		chapter-38. Few changes to the sequence are adpoted from PMUFW.
+*
+******************************************************************************/
+static XStatus XResetPs_PulseResetRpuLs(void)
+{
+	u32 TimeOut;
+	u32 RegValue;
+
+	/* Block Cortex-R5 master interface */
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL);
+	RegValue &= (~RPU_MASTER_ISO_MASK);
+	RegValue |= RPU_MASTER_ISO_MASK;
+	XResetPs_WriteReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL, RegValue);
+
+	/* Wait for acknowledgment from AIB until timeout */
+	TimeOut = XRESETPS_AIB_PSPL_DELAY;
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_ACK_CTRL);
+	while ((TimeOut > 0U) &&
+		((RegValue & RPU_MASTER_ISO_MASK) != RPU_MASTER_ISO_MASK)) {
+		RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_ACK_CTRL);
+		TimeOut--;
+	}
+
+	if (TimeOut == 0U) {
+		/*
+		 * @NOTE:
+		 * AIB ack Timed Out.
+		 * As per ug1085(v1.3), nothing is to be done on timeout, hence
+		 * continuing with reset sequence.
+		 */
+	}
+
+	/* Block Cortex-R5 slave interface */
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL);
+	RegValue &= (~RPU_SLAVE_ISO_MASK);
+	RegValue |= RPU_SLAVE_ISO_MASK;
+	XResetPs_WriteReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL, RegValue);
+
+	/* Wait for acknowledgment from AIB until timeout */
+	TimeOut = XRESETPS_AIB_PSPL_DELAY;
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_ACK_CTRL);
+	while ((TimeOut > 0U) &&
+		((RegValue & RPU_SLAVE_ISO_MASK) != RPU_SLAVE_ISO_MASK)) {
+		RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_ACK_CTRL);
+		TimeOut--;
+	}
+
+	if (TimeOut == 0U) {
+		/*
+		 * @NOTE:
+		 * AIB ack Timed Out.
+		 * As per ug1085(v1.3), nothing is to be done on timeout, hence
+		 * continuing with reset sequence.
+		 */
+	}
+
+	/* Unblock Cortex-R5 master interface */
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL);
+	RegValue &= (~RPU_MASTER_ISO_MASK);
+	XResetPs_WriteReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL, RegValue);
+
+	/* Initiate Cortex-R5 LockStep reset */
+	RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_RST_CTRL);
+	RegValue |= RPU_LS_RESET_MASK;
+	XResetPs_WriteReg(XRESETPS_PMU_GLB_RST_CTRL, RegValue);
+
+	/* Wait */
+	TimeOut = XRESETPS_RST_PROP_DELAY;
+	while (TimeOut > 0U) {
+		TimeOut--;
+	}
+
+	/* Release Cortex-R5 from Reset */
+	RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_RST_CTRL);
+	RegValue &= (~RPU_LS_RESET_MASK);
+	XResetPs_WriteReg(XRESETPS_PMU_GLB_RST_CTRL, RegValue);
+
+	/* Wait */
+	TimeOut = XRESETPS_RST_PROP_DELAY;
+	while (TimeOut > 0U) {
+		TimeOut--;
+	}
+
+	/* Unblock Cortex-R5 slave interface */
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL);
+	RegValue &= (~RPU_SLAVE_ISO_MASK);
+	XResetPs_WriteReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL, RegValue);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+*
+* Pulse Reset PS only.
+*
+* @param	None.
+*
+* @return
+*		- XST_SUCCESS if successful else error code.
+*
+* @note		The pulse reset sequence is referred from ug1085(v1.3)
+*		chapter-38. Few changes to the sequence are adpoted from PMUFW.
+*
+******************************************************************************/
+static XStatus XResetPs_PulseResetPsOnly(void)
+{
+
+	u32 RegValue;
+	u32 TimeOut;
+	u8  ReconfirmAckCnt;
+
+	/* TODO: Set PMU Error to indicate to PL */
+
+	/* Block FPD to PL and LPD to PL interfaces with AIB (in PS) */
+	XResetPs_WriteReg(XRESETPS_PMU_GLB_AIB_CTRL, AIB_ISO_CTRL_MASK);
+
+	/*
+	 * @NOTE: Updated referring PMUFW
+	 * There is a possibility of glitch in AIB ack signal to PMU, hence ack
+	 * needs reconfirmation.
+	 */
+	/* Wait for AIB ack or Timeout */
+	ReconfirmAckCnt = XRESETPS_AIB_PSPL_RECONFIRM_CNT;
+	do {
+		TimeOut = XRESETPS_AIB_PSPL_DELAY;
+		RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_AIB_STATUS);
+		while ((TimeOut > 0U) &&
+		    ((RegValue & AIB_ISO_STATUS_MASK) != AIB_ISO_STATUS_MASK)) {
+			RegValue =
+				  XResetPs_ReadReg(XRESETPS_PMU_GLB_AIB_STATUS);
+			TimeOut--;
+		}
+
+		if (TimeOut == 0U) {
+			/*
+			 * @NOTE:
+			 * AIB ack Timed Out.
+			 * As per ug1085(v1.3), nothing is to be done on
+			 * timeout, hence continuing with reset sequence.
+			 */
+			ReconfirmAckCnt = 0U;
+		} else {
+			ReconfirmAckCnt--;
+		}
+	}
+	while (ReconfirmAckCnt > 0U);
+
+	/*
+	 * @NOTE: Updated referring PMUFW.
+	 * Check if we are running Silicon version 1.0. If so,
+	 * bypass the RPLL before initiating the reset. This is
+	 * due to a bug in 1.0 Silicon wherein the PS hangs on a
+	 * reset if the RPLL is in use.
+	 */
+	RegValue = XResetPs_ReadReg(XRESETPS_CSU_VERSION_REG);
+	if (XRESETPS_PLATFORM_PS_VER1 == (RegValue & PS_VERSION_MASK)) {
+		RegValue = XResetPs_ReadReg(XRESETPS_CRL_APB_RPLL_CTRL);
+		RegValue |= RPLL_BYPASS_MASK;
+		XResetPs_WriteReg(XRESETPS_CRL_APB_RPLL_CTRL, RegValue);
+	}
+
+	/* Block the propagation of the PROG signal to the PL */
+	RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_PS_CTRL);
+	RegValue &= (~PROG_ENABLE_MASK);
+	XResetPs_WriteReg(XRESETPS_PMU_GLB_PS_CTRL, RegValue);
+
+	RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_PS_CTRL);
+	RegValue |= PROG_GATE_MASK;
+	XResetPs_WriteReg(XRESETPS_PMU_GLB_PS_CTRL, RegValue);
+
+	/* Initiate PS-only reset */
+	RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_RST_CTRL);
+	RegValue |= PS_ONLY_RESET_MASK;
+	XResetPs_WriteReg(XRESETPS_PMU_GLB_RST_CTRL, RegValue);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+*
+* Pulse Reset FPD.
+*
+* @param	None.
+*
+* @return
+*		- XST_SUCCESS if successful else error code.
+*
+* @note		The pulse reset sequence is referred from ug1085(v1.3)
+*		chapter-38. Few changes to the sequence are adpoted from PMUFW.
+*
+******************************************************************************/
+static XStatus XResetPs_PulseResetFpd(void)
+{
+	u32 TimeOut;
+	u32 RegValue;
+
+	/* Enable FPD to LPD isolations */
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL);
+	RegValue &= (~FPD_TO_LPD_ISO_MASK);
+	RegValue |= FPD_TO_LPD_ISO_MASK;
+	XResetPs_WriteReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL, RegValue);
+
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SLCR_APBISO_REQ_CTRL);
+	RegValue |= GPU_ISO_MASK;
+	XResetPs_WriteReg(XRESETPS_LPD_SLCR_APBISO_REQ_CTRL, RegValue);
+
+	/* Enable LPD to FPD isolations */
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL);
+	RegValue &= (~LPD_TO_FPD_ISO_MASK);
+	RegValue |= LPD_TO_FPD_ISO_MASK;
+	XResetPs_WriteReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL, RegValue);
+
+	/*
+	 * Here we need to check for AIB ack, since nothing is done incase
+	 * ack is not received, we are just waiting for specified timeout
+	 * and continuing
+	 */
+	TimeOut = XRESETPS_AIB_ISO_DELAY;
+	while (TimeOut > 0U) {
+		TimeOut--;
+	}
+
+	/* Initiate FPD reset */
+	RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_RST_CTRL);
+	RegValue |= FPD_APU_RESET_MASK;
+	XResetPs_WriteReg(XRESETPS_PMU_GLB_RST_CTRL, RegValue);
+
+	/* Wait till reset propagates */
+	TimeOut = XRESETPS_RST_PROP_DELAY;
+	while (TimeOut > 0U) {
+		TimeOut--;
+	}
+
+	/* Disable FPD to LPD isolations */
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL);
+	RegValue &= (~FPD_TO_LPD_ISO_MASK);
+	XResetPs_WriteReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL, RegValue);
+
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SLCR_APBISO_REQ_CTRL);
+	RegValue &= (~GPU_ISO_MASK);
+	XResetPs_WriteReg(XRESETPS_LPD_SLCR_APBISO_REQ_CTRL, RegValue);
+
+	/* Release from Reset and wait till it propagates */
+	RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_RST_CTRL);
+	RegValue &= (~FPD_APU_RESET_MASK);
+	XResetPs_WriteReg(XRESETPS_PMU_GLB_RST_CTRL, RegValue);
+
+	/* Wait till reset propagates */
+	TimeOut = XRESETPS_RST_PROP_DELAY;
+	while (TimeOut > 0U) {
+		TimeOut--;
+	}
+
+	/* Disable LPD to FPD isolations */
+	RegValue = XResetPs_ReadReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL);
+	RegValue &= (~LPD_TO_FPD_ISO_MASK);
+	XResetPs_WriteReg(XRESETPS_LPD_SCR_AXIISO_REQ_CTRL, RegValue);
+
+	return XST_SUCCESS;
+}
+#endif
+
+/****************************************************************************/
+/**
+*
+* Assert reset for specific peripheral based on reset ID.
+*
+* @param	InstancePtr is a pointer to the XResetPs instance.
+* @param	ResetID is the ID of the peripheral.
+*
+* @return
+*		- XST_SUCCESS if reset assertion was successful.
+*		- Error Code otherwise.
+*
+* @note		None.
+*
+******************************************************************************/
+XStatus XResetPs_ResetAssert(XResetPs *InstancePtr,
+						   const XResetPs_RstId ResetID)
+{
+	/* Arguments validation */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	if ((ResetID > XRESETPS_RSTID_END) ||
+		(ResetID < XRESETPS_RSTID_START)) {
+		return XST_INVALID_PARAM;
+	}
+
+#if EL1_NONSECURE
+	/* Assert reset via PMUFW */
+	u64 SmcArgs;
+	XSmc_OutVar out;
+
+	SmcArgs =  (u64)XRESETPS_RSTACT_ASSERT << 32;
+	SmcArgs |= ((u64)(ResetID + XRESETPS_RSTID_BASE));
+
+	out = Xil_Smc(PM_ASSERT_SMC_FID, SmcArgs, 0, 0, 0, 0, 0, 0);
+
+	return ((u32)out.Arg0);
+#else
+	u32 RegAddr;
+	u32 RegBitmask;
+	u32 RegValue;
+
+	/* Ignoring Nodes that doesnot support assert */
+	if (!XRESETPS_CHK_ASSERT_SUPPORT(ResetMap[ResetID].SupportedActions)) {
+			return XST_NO_FEATURE;
+	}
+
+	RegAddr = ResetMap[ResetID].SlcrregAddr;
+	RegBitmask = ResetMap[ResetID].SlcrregBitmask;
+
+	/* Enable bit to assert reset */
+	RegValue = XResetPs_ReadReg(RegAddr);
+	RegValue |= RegBitmask;
+	XResetPs_WriteReg(RegAddr, RegValue);
+
+	return XST_SUCCESS;
+#endif
+}
+
+/****************************************************************************/
+/**
+*
+* Deassert reset for specific peripheral based on reset ID.
+*
+* @param	InstancePtr is a pointer to the XResetPs instance.
+* @param	ResetID is the ID of the peripheral.
+*
+* @return
+*		- XST_SUCCESS if reset deassertion was successful.
+*		- Error Code otherwise.
+*
+* @note		None.
+*
+******************************************************************************/
+XStatus XResetPs_ResetDeassert(XResetPs *InstancePtr,
+						   const XResetPs_RstId ResetID)
+{
+	/* Arguments validation */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	if ((ResetID > XRESETPS_RSTID_END) ||
+		(ResetID < XRESETPS_RSTID_START)) {
+		return XST_INVALID_PARAM;
+	}
+
+#if EL1_NONSECURE
+	/* Deassert reset via PMUFW */
+	u64 SmcArgs;
+	XSmc_OutVar out;
+
+	SmcArgs =  (u64)XRESETPS_RSTACT_RELEASE << 32;
+	SmcArgs |= ((u64)(ResetID + XRESETPS_RSTID_BASE));
+
+	out = Xil_Smc(PM_ASSERT_SMC_FID, SmcArgs, 0, 0, 0, 0, 0, 0);
+
+	return ((u32)out.Arg0);
+#else
+	u32 RegAddr;
+	u32 RegBitmask;
+	u32 RegValue;
+
+	/* Ignoring Nodes that does not support deassert */
+	if (!XRESETPS_CHK_ASSERT_SUPPORT(ResetMap[ResetID].SupportedActions)) {
+			return XST_NO_FEATURE;
+	}
+
+	RegAddr = ResetMap[ResetID].SlcrregAddr;
+	RegBitmask = ResetMap[ResetID].SlcrregBitmask;
+
+	/* Disable bit to deassert reset */
+	RegValue = XResetPs_ReadReg(RegAddr);
+	RegValue &= (~RegBitmask);
+	XResetPs_WriteReg(RegAddr, RegValue);
+
+	return XST_SUCCESS;
+#endif
+}
+
+/****************************************************************************/
+/**
+*
+* Pulse reset for specific peripheral based on reset ID.
+*
+* @param	InstancePtr is a pointer to the XResetPs instance.
+* @param	ResetID is the ID of the peripheral.
+*
+* @return
+*		- XST_SUCCESS if pulse reset was successful.
+*		- Error Code otherwise.
+*
+* @note		None.
+*
+******************************************************************************/
+XStatus XResetPs_ResetPulse(XResetPs *InstancePtr, const XResetPs_RstId ResetID)
+{
+	/* Arguments validation */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	if ((ResetID > XRESETPS_RSTID_END) ||
+		(ResetID < XRESETPS_RSTID_START)) {
+		return XST_INVALID_PARAM;
+	}
+
+#if EL1_NONSECURE
+	/* Pulse reset via PMUFW */
+	u64 SmcArgs;
+	XSmc_OutVar out;
+
+	SmcArgs =  (u64)XRESETPS_RSTACT_PULSE << 32;
+	SmcArgs |= ((u64)(ResetID + XRESETPS_RSTID_BASE));
+
+	out = Xil_Smc(PM_ASSERT_SMC_FID, SmcArgs, 0, 0, 0, 0, 0, 0);
+
+	return ((u32)out.Arg0);
+#else
+	u32 RegAddr;
+	u32 RegBitmask;
+	u32 RegValue;
+	u32 TimeOut;
+
+	/* Ignoring Nodes that donot support pulse reset */
+	if (!XRESETPS_CHK_PULSE_SUPPORT(ResetMap[ResetID].SupportedActions)) {
+			return XST_NO_FEATURE;
+	}
+
+	/* Handling specific pulse resets */
+	switch (ResetID) {
+		case XRESETPS_RSTID_FPD:
+			return XResetPs_PulseResetFpd();
+		case XRESETPS_RSTID_RPU_LS:
+			return XResetPs_PulseResetRpuLs();
+		case XRESETPS_RSTID_PS_ONLY:
+			return XResetPs_PulseResetPsOnly();
+		default:
+			break;
+	}
+
+	RegAddr = ResetMap[ResetID].SlcrregAddr;
+	RegBitmask = ResetMap[ResetID].SlcrregBitmask;
+
+	/* Power state mask validation */
+	if ((ResetMap[ResetID].PulseType == XRESETPS_PT_DLY_PSCHK) &&
+		(ResetMap[ResetID].PwrStateBitmask != XRESETPS_BM_INVALID)) {
+		RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_PWR_STATUS);
+		if (ResetMap[ResetID].PwrStateBitmask !=
+			(RegValue && ResetMap[ResetID].PwrStateBitmask )) {
+			return XST_REGISTER_ERROR;
+		}
+	}
+
+	/* Enable bit to assert reset */
+	RegValue = XResetPs_ReadReg(RegAddr);
+	RegValue |= RegBitmask;
+	XResetPs_WriteReg(RegAddr, RegValue);
+
+	/* Wait for assert propogation */
+	if (ResetMap[ResetID].PulseType != XRESETPS_PT_NO_DLY_NO_PSCHK) {
+		TimeOut = XRESETPS_PULSE_PROP_DELAY;
+		while (TimeOut > 0U) {
+			TimeOut--;
+		}
+	}
+
+	/* Disable bit to deassert reset */
+	RegValue = XResetPs_ReadReg(RegAddr);
+	RegValue &= (~RegBitmask);
+	XResetPs_WriteReg(RegAddr, RegValue);
+
+	/* Wait for release propogation */
+	if (ResetMap[ResetID].PulseType != XRESETPS_PT_NO_DLY_NO_PSCHK) {
+		TimeOut = XRESETPS_PULSE_PROP_DELAY;
+		while (TimeOut > 0U) {
+			TimeOut--;
+		}
+	}
+
+	return XST_SUCCESS;
+#endif
+}
+
+/****************************************************************************/
+/**
+*
+* Get reset status for specific peripheral based on reset ID.
+*
+* @param	InstancePtr is a pointer to the XResetPs instance.
+* @param	ResetID is the ID of the peripheral.
+* @param	Status is the status of reset for ResetID.
+*		1 if asserted and 0 if released
+*
+* @return
+*		- XST_SUCCESS if status fetched successful.
+*		- Error Code otherwise.
+*
+* @note		None.
+*
+******************************************************************************/
+XStatus XResetPs_ResetStatus(XResetPs *InstancePtr,
+		       const XResetPs_RstId ResetID, XResetPs_RstStatus *Status)
+{
+	/* Arguments validation */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Status != NULL);
+	if ((ResetID > XRESETPS_RSTID_END) ||
+		(ResetID < XRESETPS_RSTID_START)) {
+		return XST_INVALID_PARAM;
+	}
+
+#if EL1_NONSECURE
+	/* Get reset status via PMUFW */
+	XSmc_OutVar out;
+
+	out = Xil_Smc(PM_GETSTATUS_SMC_FID,
+		      ((u64)(ResetID + XRESETPS_RSTID_BASE)), 0, 0, 0, 0, 0, 0);
+	*Status = ((u32)(out.Arg0 >> 32));
+
+	return ((u32)out.Arg0);
+#else
+	u32 RegAddr;
+	u32 RegBitmask;
+	u32 RegValue;
+
+	/* Ignoring Nodes that donot support reset status */
+	if (!XRESETPS_CHK_STATUS_SUPPORT(ResetMap[ResetID].SupportedActions)) {
+			return XST_NO_FEATURE;
+	}
+
+	/*
+	 * @NOTE:
+	 * This will always move to else part as GPO3 are ignored because
+	 * XRESETPS_PMU_LCL_READ_CTRL is not accessible.
+	 */
+	/* GPO3PL have status address different from control address */
+	if ((ResetID >= XRESETPS_RSTID_GPO3PL0) &&
+			(ResetID <= XRESETPS_RSTID_GPO3PL31)) {
+		RegAddr = XRESETPS_PMU_LCL_READ_CTRL;
+	} else {
+		RegAddr = ResetMap[ResetID].SlcrregAddr;
+	}
+
+	RegBitmask = ResetMap[ResetID].SlcrregBitmask;
+
+	RegValue = XResetPs_ReadReg(RegAddr);
+	if ((RegValue & RegBitmask) == RegBitmask) {
+		*Status = XRESETPS_RESETASSERTED;
+	} else {
+		*Status = XRESETPS_RESETRELEASED;
+	}
+
+	return XST_SUCCESS;
+#endif
+}
+
+/** @} */
diff --git a/src/Xilinx/libsrc/resetps_v1_0/src/xresetps.h b/src/Xilinx/libsrc/resetps_v1_0/src/xresetps.h
new file mode 100644
index 0000000..f6a632b
--- /dev/null
+++ b/src/Xilinx/libsrc/resetps_v1_0/src/xresetps.h
@@ -0,0 +1,382 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xresetps.h
+* @addtogroup xresetps_v1_0
+* @{
+* @details
+*
+* The Xilinx Reset Controller driver supports the following features:
+*   - Assert reset for specific peripheral.
+*   - Deassert reset for specific peripheral.
+*   - Pulse reset for specific peripheral.
+*   - Get reset status for specific peripheral.
+*
+* This driver is intended to be RTOS and processor independent. It works with
+* physical addresses only.  Any needs for dynamic memory management, threads
+* or thread mutual exclusion, virtual memory, or cache control must be
+* satisfied by the layer above this driver.
+*
+* 
+* MODIFICATION HISTORY:
+* Ver   Who    Date     Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00  cjp    09/05/17 First release
+* 

+*
+******************************************************************************/
+#ifndef XRESETPS_H		/* prevent circular inclusions */
+#define XRESETPS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xresetps_hw.h"
+
+#if defined (__aarch64__)
+#include "xil_smc.h"
+#endif
+
+/************************** Constant Definitions *****************************/
+/*
+ * Constants for supported/Not supported reset actions
+ */
+#define XRESETPS_SUP                   1
+#define XRESETPS_NOSUP                 0
+
+/**************************** Type Definitions *******************************/
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;                    /**< Unique ID of device */
+	u32 BaseAddress;                 /**< Base address of the device */
+} XResetPs_Config;
+
+/**
+ * The XResetPs driver instance data. The user is required to allocate a
+ * variable of this type for every reset controller device in the system.
+ * A pointer to a variable of this type is then passed to the driver API
+ * functions.
+ */
+typedef struct {
+	XResetPs_Config Config;          /**< Hardware Configuration */
+} XResetPs;
+
+/**
+ * This typedef defines type of pulse reset to be executed for peripherals.
+ * 3 type of pulse reset are possible:
+ * 	1. Pulse with no delay and no power state validation
+ * 	2. Pulse with delay but no power state validation
+ * 	3. Pulse with delay and power state validation
+ */
+typedef enum {
+	XRESETPS_PT_NO_DLY_NO_PSCHK,     /**< No delay, no power state check */
+	XRESETPS_PT_DLY_NO_PSCHK,        /**< Delay, no power state check */
+	XRESETPS_PT_DLY_PSCHK,           /**< Delay, power state check */
+	XRESETPS_PT_INVALID,             /**< Invalid pulse type */
+} XResetPs_PulseTypes;
+
+/**
+ * This typedef defines reset actions on the peripherals.
+ */
+typedef enum {
+	XRESETPS_RSTACT_RELEASE,
+	XRESETPS_RSTACT_ASSERT,
+	XRESETPS_RSTACT_PULSE,
+} XresetPs_ResetAction;
+
+/**
+ * This typedef defines resetIDs of peripherals maps to PMUFW resetIDs. This
+ * resetIDs are not offseted by 1000 and are relative.
+ */
+typedef enum {
+	XRESETPS_RSTID_START,
+	XRESETPS_RSTID_PCIE_CFG = XRESETPS_RSTID_START,
+	XRESETPS_RSTID_PCIE_BRIDGE,
+	XRESETPS_RSTID_PCIE_CTRL,
+	XRESETPS_RSTID_DP,
+	XRESETPS_RSTID_SWDT_CRF,
+	XRESETPS_RSTID_AFI_FM5,
+	XRESETPS_RSTID_AFI_FM4,
+	XRESETPS_RSTID_AFI_FM3,
+	XRESETPS_RSTID_AFI_FM2,
+	XRESETPS_RSTID_AFI_FM1,
+	XRESETPS_RSTID_AFI_FM0,
+	XRESETPS_RSTID_GDMA,
+	XRESETPS_RSTID_GPU_PP1,
+	XRESETPS_RSTID_GPU_PP0,
+	XRESETPS_RSTID_GPU,
+	XRESETPS_RSTID_GT,
+	XRESETPS_RSTID_SATA,
+	XRESETPS_RSTID_ACPU3_PWRON,
+	XRESETPS_RSTID_ACPU2_PWRON,
+	XRESETPS_RSTID_ACPU1_PWRON,
+	XRESETPS_RSTID_ACPU0_PWRON,
+	XRESETPS_RSTID_APU_L2,
+	XRESETPS_RSTID_ACPU3,
+	XRESETPS_RSTID_ACPU2,
+	XRESETPS_RSTID_ACPU1,
+	XRESETPS_RSTID_ACPU0,
+	XRESETPS_RSTID_DDR,
+	XRESETPS_RSTID_APM_FPD,
+	XRESETPS_RSTID_SOFT,
+	XRESETPS_RSTID_GEM0,
+	XRESETPS_RSTID_GEM1,
+	XRESETPS_RSTID_GEM2,
+	XRESETPS_RSTID_GEM3,
+	XRESETPS_RSTID_QSPI,
+	XRESETPS_RSTID_UART0,
+	XRESETPS_RSTID_UART1,
+	XRESETPS_RSTID_SPI0,
+	XRESETPS_RSTID_SPI1,
+	XRESETPS_RSTID_SDIO0,
+	XRESETPS_RSTID_SDIO1,
+	XRESETPS_RSTID_CAN0,
+	XRESETPS_RSTID_CAN1,
+	XRESETPS_RSTID_I2C0,
+	XRESETPS_RSTID_I2C1,
+	XRESETPS_RSTID_TTC0,
+	XRESETPS_RSTID_TTC1,
+	XRESETPS_RSTID_TTC2,
+	XRESETPS_RSTID_TTC3,
+	XRESETPS_RSTID_SWDT_CRL,
+	XRESETPS_RSTID_NAND,
+	XRESETPS_RSTID_ADMA,
+	XRESETPS_RSTID_GPIO,
+	XRESETPS_RSTID_IOU_CC,
+	XRESETPS_RSTID_TIMESTAMP,
+	XRESETPS_RSTID_RPU_R50,
+	XRESETPS_RSTID_RPU_R51,
+	XRESETPS_RSTID_RPU_AMBA,
+	XRESETPS_RSTID_OCM,
+	XRESETPS_RSTID_RPU_PGE,
+	XRESETPS_RSTID_USB0_CORERESET,
+	XRESETPS_RSTID_USB1_CORERESET,
+	XRESETPS_RSTID_USB0_HIBERRESET,
+	XRESETPS_RSTID_USB1_HIBERRESET,
+	XRESETPS_RSTID_USB0_APB,
+	XRESETPS_RSTID_USB1_APB,
+	XRESETPS_RSTID_IPI,
+	XRESETPS_RSTID_APM_LPD,
+	XRESETPS_RSTID_RTC,
+	XRESETPS_RSTID_SYSMON,
+	XRESETPS_RSTID_AFI_FM6,
+	XRESETPS_RSTID_LPD_SWDT,
+	XRESETPS_RSTID_FPD,
+	XRESETPS_RSTID_RPU_DBG1,
+	XRESETPS_RSTID_RPU_DBG0,
+	XRESETPS_RSTID_DBG_LPD,
+	XRESETPS_RSTID_DBG_FPD,
+	XRESETPS_RSTID_APLL,
+	XRESETPS_RSTID_DPLL,
+	XRESETPS_RSTID_VPLL,
+	XRESETPS_RSTID_IOPLL,
+	XRESETPS_RSTID_RPLL,
+	XRESETPS_RSTID_GPO3PL0,
+	XRESETPS_RSTID_GPO3PL1,
+	XRESETPS_RSTID_GPO3PL2,
+	XRESETPS_RSTID_GPO3PL3,
+	XRESETPS_RSTID_GPO3PL4,
+	XRESETPS_RSTID_GPO3PL5,
+	XRESETPS_RSTID_GPO3PL6,
+	XRESETPS_RSTID_GPO3PL7,
+	XRESETPS_RSTID_GPO3PL8,
+	XRESETPS_RSTID_GPO3PL9,
+	XRESETPS_RSTID_GPO3PL10,
+	XRESETPS_RSTID_GPO3PL11,
+	XRESETPS_RSTID_GPO3PL12,
+	XRESETPS_RSTID_GPO3PL13,
+	XRESETPS_RSTID_GPO3PL14,
+	XRESETPS_RSTID_GPO3PL15,
+	XRESETPS_RSTID_GPO3PL16,
+	XRESETPS_RSTID_GPO3PL17,
+	XRESETPS_RSTID_GPO3PL18,
+	XRESETPS_RSTID_GPO3PL19,
+	XRESETPS_RSTID_GPO3PL20,
+	XRESETPS_RSTID_GPO3PL21,
+	XRESETPS_RSTID_GPO3PL22,
+	XRESETPS_RSTID_GPO3PL23,
+	XRESETPS_RSTID_GPO3PL24,
+	XRESETPS_RSTID_GPO3PL25,
+	XRESETPS_RSTID_GPO3PL26,
+	XRESETPS_RSTID_GPO3PL27,
+	XRESETPS_RSTID_GPO3PL28,
+	XRESETPS_RSTID_GPO3PL29,
+	XRESETPS_RSTID_GPO3PL30,
+	XRESETPS_RSTID_GPO3PL31,
+	XRESETPS_RSTID_RPU_LS,
+	XRESETPS_RSTID_PS_ONLY,
+	XRESETPS_RSTID_PL,
+	XRESETPS_RSTID_END = XRESETPS_RSTID_PL,
+} XResetPs_RstId;
+
+/**
+ * This typedef defines possible values for  reset status of peripherals.
+ */
+typedef enum {
+	XRESETPS_RESETRELEASED,
+	XRESETPS_RESETASSERTED
+} XResetPs_RstStatus;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+/****************************************************************************/
+/**
+*
+* Set supported reset action.
+*
+* @param        StatusSupport indicates if reset status check is supported
+* @param        PulseSupport indicates if pulse reset action is supported
+* @param        AssertSupport indicates if reset assert/deassert is supported
+*
+* @return	Supported reset actions
+*
+* @note         Here bit fields are used decide supported actions as defined
+* 		below:
+* 		BIT 1 - Assert/Deassert
+* 		BIT 2 - Pulse
+* 		BIT 3 - Reset status
+* 		Bit set indicates corresponding action is supported and
+* 		vice versa.
+******************************************************************************/
+#define XRESETPS_SUPPORTED_ACT(ResetSupport, PulseSupport, AssertSupport) \
+		     ((ResetSupport << 2) | (PulseSupport << 1) | AssertSupport)
+
+/****************************************************************************/
+/**
+*
+* Check if assert/dessert reset is supported.
+*
+* @param        Actions is supported reset actions
+*
+* @return       1 - Supported
+* 		0 - Not Supported
+*
+* @note         None.
+*
+******************************************************************************/
+#define XRESETPS_CHK_ASSERT_SUPPORT(Actions) ((Actions & 0x1))
+
+/****************************************************************************/
+/**
+*
+* Check if pulse reset is supported.
+*
+* @param        Actions is supported reset actions
+*
+* @return       1 - Supported
+* 		0 - Not Supported
+*
+* @note         None.
+*
+******************************************************************************/
+#define XRESETPS_CHK_PULSE_SUPPORT(Actions)  ((Actions & 0x2) >> 1)
+
+/****************************************************************************/
+/**
+*
+* Check if Status check is supported.
+*
+* @param        Actions is supported reset actions
+*
+* @return       1 - Supported
+* 		0 - Not Supported
+*
+* @note         None.
+*
+******************************************************************************/
+#define XRESETPS_CHK_STATUS_SUPPORT(Actions) ((Actions & 0x4) >> 2)
+
+/****************************************************************************/
+/**
+*
+* Read the given register.
+*
+* @param        RegAddress is the address of the register to read
+*
+* @return       The 32-bit value of the register
+*
+* @note         None.
+*
+******************************************************************************/
+#define XResetPs_ReadReg(RegAddress) \
+				Xil_In32((u32)RegAddress)
+
+/****************************************************************************/
+/**
+*
+* Write the given register.
+*
+* @param        RegAddress is the address of the register to write
+* @param        Data is the 32-bit value to write to the register
+*
+* @return       None.
+*
+* @note         None.
+*
+******************************************************************************/
+#define XResetPs_WriteReg(RegAddress, Data) \
+				Xil_Out32((u32)RegAddress, (u32)Data)
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Lookup configuration in xresetps_sinit.c.
+ */
+XResetPs_Config *XResetPs_LookupConfig(u16 DeviceId);
+
+/*
+ * Interface functions in xresetps.c
+ */
+XStatus XResetPs_CfgInitialize(XResetPs *InstancePtr,
+			      XResetPs_Config *ConfigPtr, u32 EffectiveAddress);
+XStatus XResetPs_ResetAssert(XResetPs *InstancePtr,
+						  const XResetPs_RstId ResetID);
+XStatus XResetPs_ResetDeassert(XResetPs *InstancePtr,
+						  const XResetPs_RstId ResetID);
+XStatus XResetPs_ResetPulse(XResetPs *InstancePtr,
+						  const XResetPs_RstId ResetID);
+XStatus XResetPs_ResetStatus(XResetPs *InstancePtr,
+		      const XResetPs_RstId ResetID, XResetPs_RstStatus *Status);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/resetps_v1_0/src/xresetps_g.c b/src/Xilinx/libsrc/resetps_v1_0/src/xresetps_g.c
new file mode 100644
index 0000000..f6302c9
--- /dev/null
+++ b/src/Xilinx/libsrc/resetps_v1_0/src/xresetps_g.c
@@ -0,0 +1,53 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xresetps.h"
+
+/*
+* The configuration table for devices
+*/
+
+XResetPs_Config XResetPs_ConfigTable[XPAR_XRESETPS_NUM_INSTANCES] =
+{
+	{
+		XPAR_XRESETPS_DEVICE_ID,
+		XPAR_XRESETPS_BASEADDR,
+	}
+};
diff --git a/src/Xilinx/libsrc/resetps_v1_0/src/xresetps_hw.h b/src/Xilinx/libsrc/resetps_v1_0/src/xresetps_hw.h
new file mode 100644
index 0000000..a97162d
--- /dev/null
+++ b/src/Xilinx/libsrc/resetps_v1_0/src/xresetps_hw.h
@@ -0,0 +1,327 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xresetps_hw.h
+* @addtogroup xresetps_v1_0
+* @{
+*
+* This file contains the hardware interface to the System Reset controller.
+*
+* 
+* MODIFICATION HISTORY:
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------
+* 1.00  cjp    09/05/17 First release
+* 

+*
+******************************************************************************/
+#ifndef XRESETPS_HW_H		/* prevent circular inclusions */
+#define XRESETPS_HW_H		/* by using protection macros */
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+/* Register address defines */
+/* CRF_APB defines */
+#define XRESETPS_CRF_APB_BASE         (0XFD1A0000U)
+/* RST_FPD_TOP Address and mask definations */
+#define XRESETPS_CRF_APB_RST_FPD_TOP \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X00000100U))
+#define PCIE_CFG_RESET_MASK       ((u32)0X00080000U)
+#define PCIE_BRIDGE_RESET_MASK    ((u32)0X00040000U)
+#define PCIE_CTRL_RESET_MASK      ((u32)0X00020000U)
+#define DP_RESET_MASK             ((u32)0X00010000U)
+#define SWDT_RESET_MASK           ((u32)0X00008000U)
+#define AFI_FM5_RESET_MASK        ((u32)0X00001000U)
+#define AFI_FM4_RESET_MASK        ((u32)0X00000800U)
+#define AFI_FM3_RESET_MASK        ((u32)0X00000400U)
+#define AFI_FM2_RESET_MASK        ((u32)0X00000200U)
+#define AFI_FM1_RESET_MASK        ((u32)0X00000100U)
+#define AFI_FM0_RESET_MASK        ((u32)0X00000080U)
+#define GDMA_RESET_MASK           ((u32)0X00000040U)
+#define GPU_PP1_RESET_MASK        ((u32)0X00000020U)
+#define GPU_PP0_RESET_MASK        ((u32)0X00000010U)
+#define GPU_RESET_MASK            ((u32)0X00000008U)
+#define GT_RESET_MASK             ((u32)0X00000004U)
+#define SATA_RESET_MASK           ((u32)0X00000002U)
+/* RST_FPD_APU Address and mask definations */
+#define XRESETPS_CRF_APB_RST_FPD_APU \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X00000104U))
+#define ACPU3_PWRON_RESET_MASK    ((u32)0X00002000U)
+#define ACPU2_PWRON_RESET_MASK    ((u32)0X00001000U)
+#define ACPU1_PWRON_RESET_MASK    ((u32)0X00000800U)
+#define ACPU0_PWRON_RESET_MASK    ((u32)0X00000400U)
+#define APU_L2_RESET_MASK         ((u32)0X00000100U)
+#define ACPU3_RESET_MASK          ((u32)0X00000008U)
+#define ACPU2_RESET_MASK          ((u32)0X00000004U)
+#define ACPU1_RESET_MASK          ((u32)0X00000002U)
+#define ACPU0_RESET_MASK          ((u32)0X00000001U)
+/* RST_DDR_SS Address and mask definations */
+#define XRESETPS_CRF_APB_RST_DDR_SS \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X00000108U))
+#define DDR_RESET_MASK            ((u32)0X00000008U)
+#define DDR_APM_RESET_MASK        ((u32)0X00000004U)
+/* APLL_CTRL Address and mask definations */
+#define XRESETPS_CRF_APB_APLL_CTRL \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X00000020U))
+#define APLL_RESET_MASK           ((u32)0X00000001U)
+/* DPLL_CTRL Address and mask definations */
+#define XRESETPS_CRF_APB_DPLL_CTRL \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X0000002CU))
+#define DPLL_RESET_MASK           ((u32)0X00000001U)
+/* VPLL_CTRL Address and mask definations */
+#define XRESETPS_CRF_APB_VPLL_CTRL \
+				  ((XRESETPS_CRF_APB_BASE) + ((u32)0X00000038U))
+#define VPLL_RESET_MASK           ((u32)0X00000001U)
+
+/* CRL_APB defines */
+#define XRESETPS_CRL_APB_BASE     (0XFF5E0000U)
+/* RESET_CTRL Address and mask definations */
+#define XRESETPS_CRL_APB_RESET_CTRL \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000218U))
+#define SOFT_RESET_MASK           ((u32)0X00000010U)
+/* RST_LPD_IOU0 Address and mask definations */
+#define XRESETPS_CRL_APB_RST_LPD_IOU0 \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000230U))
+#define GEM0_RESET_MASK           ((u32)0X00000001U)
+#define GEM1_RESET_MASK           ((u32)0X00000002U)
+#define GEM2_RESET_MASK           ((u32)0X00000004U)
+#define GEM3_RESET_MASK           ((u32)0X00000008U)
+/* RST_LPD_IOU2 Address and mask definations */
+#define XRESETPS_CRL_APB_RST_LPD_IOU2 \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000238U))
+#define QSPI_RESET_MASK           ((u32)0X00000001U)
+#define UART0_RESET_MASK          ((u32)0X00000002U)
+#define UART1_RESET_MASK          ((u32)0X00000004U)
+#define SPI0_RESET_MASK           ((u32)0X00000008U)
+#define SPI1_RESET_MASK           ((u32)0X00000010U)
+#define SDIO0_RESET_MASK          ((u32)0X00000020U)
+#define SDIO1_RESET_MASK          ((u32)0X00000040U)
+#define CAN0_RESET_MASK           ((u32)0X00000080U)
+#define CAN1_RESET_MASK           ((u32)0X00000100U)
+#define I2C0_RESET_MASK           ((u32)0X00000200U)
+#define I2C1_RESET_MASK           ((u32)0X00000400U)
+#define TTC0_RESET_MASK           ((u32)0X00000800U)
+#define TTC1_RESET_MASK           ((u32)0X00001000U)
+#define TTC2_RESET_MASK           ((u32)0X00002000U)
+#define TTC3_RESET_MASK           ((u32)0X00004000U)
+#define SWDT_RESET_MASK           ((u32)0X00008000U)
+#define NAND_RESET_MASK           ((u32)0X00010000U)
+#define ADMA_RESET_MASK           ((u32)0X00020000U)
+#define GPIO_RESET_MASK           ((u32)0X00040000U)
+#define IOU_CC_RESET_MASK         ((u32)0X00080000U)
+#define TIMESTAMP_RESET_MASK      ((u32)0X00100000U)
+/* RST_LPD_TOP Address and mask definations */
+#define XRESETPS_CRL_APB_RST_LPD_TOP \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X0000023CU))
+#define RPU_R50_RESET_MASK        ((u32)0X00000001U)
+#define RPU_R51_RESET_MASK        ((u32)0X00000002U)
+#define RPU_AMBA_RESET_MASK       ((u32)0X00000004U)
+#define OCM_RESET_MASK            ((u32)0X00000008U)
+#define RPU_PGE_RESET_MASK        ((u32)0X00000010U)
+#define USB0_CORERESET_MASK       ((u32)0X00000040U)
+#define USB1_CORERESET_MASK       ((u32)0X00000080U)
+#define USB0_HIBERRESET_MASK      ((u32)0X00000100U)
+#define USB1_HIBERRESET_MASK      ((u32)0X00000200U)
+#define USB0_APB_RESET_MASK       ((u32)0X00000400U)
+#define USB1_APB_RESET_MASK       ((u32)0X00000800U)
+#define IPI_RESET_MASK            ((u32)0X00004000U)
+#define APM_RESET_MASK            ((u32)0X00008000U)
+#define RTC_RESET_MASK            ((u32)0X00010000U)
+#define SYSMON_RESET_MASK         ((u32)0X00020000U)
+#define AFI_FM6_RESET_MASK        ((u32)0X00080000U)
+#define LPD_SWDT_RESET_MASK       ((u32)0X00100000U)
+#define FPD_RESET_MASK            ((u32)0X00800000U)
+/* RST_LPD_DBG Address and mask definations */
+#define XRESETPS_CRL_APB_RST_LPD_DBG \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000240U))
+#define RPU_DBG1_RESET_MASK       ((u32)0X00000020U)
+#define RPU_DBG0_RESET_MASK       ((u32)0X00000010U)
+#define DBG_LPD_RESET_MASK        ((u32)0X00000002U)
+#define DBG_FPD_RESET_MASK        ((u32)0X00000001U)
+/* IOPLL_CTRL Address and mask definations */
+#define XRESETPS_CRL_APB_IOPLL_CTRL \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000020U))
+#define IOPLL_RESET_MASK          ((u32)0X00000001U)
+/* RPLL_CTRL Address and mask definations */
+#define XRESETPS_CRL_APB_RPLL_CTRL \
+				  ((XRESETPS_CRL_APB_BASE) + ((u32)0X00000030U))
+#define RPLL_RESET_MASK           ((u32)0X00000001U)
+#define RPLL_BYPASS_MASK          ((u32)0X00000008U)
+
+/* PMU_IOM defines */
+#define XRESETPS_PMU_IOM_BASE     (0XFFD40000U)
+/* PMU_IOM_GPO3 Address and mask definations */
+#define XRESETPS_PMU_IOM_GPO3_CTRL \
+				  ((XRESETPS_PMU_IOM_BASE) + ((u32)0X0000001CU))
+#define GPO3_PL0_RESET_MASK       ((u32)0X00000001U)
+#define GPO3_PL1_RESET_MASK       ((u32)0X00000002U)
+#define GPO3_PL2_RESET_MASK       ((u32)0X00000004U)
+#define GPO3_PL3_RESET_MASK       ((u32)0X00000008U)
+#define GPO3_PL4_RESET_MASK       ((u32)0X00000010U)
+#define GPO3_PL5_RESET_MASK       ((u32)0X00000020U)
+#define GPO3_PL6_RESET_MASK       ((u32)0X00000040U)
+#define GPO3_PL7_RESET_MASK       ((u32)0X00000080U)
+#define GPO3_PL8_RESET_MASK       ((u32)0X00000100U)
+#define GPO3_PL9_RESET_MASK       ((u32)0X00000200U)
+#define GPO3_PL10_RESET_MASK      ((u32)0X00000400U)
+#define GPO3_PL11_RESET_MASK      ((u32)0X00000800U)
+#define GPO3_PL12_RESET_MASK      ((u32)0X00001000U)
+#define GPO3_PL13_RESET_MASK      ((u32)0X00002000U)
+#define GPO3_PL14_RESET_MASK      ((u32)0X00004000U)
+#define GPO3_PL15_RESET_MASK      ((u32)0X00008000U)
+#define GPO3_PL16_RESET_MASK      ((u32)0X00010000U)
+#define GPO3_PL17_RESET_MASK      ((u32)0X00020000U)
+#define GPO3_PL18_RESET_MASK      ((u32)0X00040000U)
+#define GPO3_PL19_RESET_MASK      ((u32)0X00080000U)
+#define GPO3_PL20_RESET_MASK      ((u32)0X00100000U)
+#define GPO3_PL21_RESET_MASK      ((u32)0X00200000U)
+#define GPO3_PL22_RESET_MASK      ((u32)0X00400000U)
+#define GPO3_PL23_RESET_MASK      ((u32)0X00800000U)
+#define GPO3_PL24_RESET_MASK      ((u32)0X01000000U)
+#define GPO3_PL25_RESET_MASK      ((u32)0X02000000U)
+#define GPO3_PL26_RESET_MASK      ((u32)0X04000000U)
+#define GPO3_PL27_RESET_MASK      ((u32)0X08000000U)
+#define GPO3_PL28_RESET_MASK      ((u32)0X10000000U)
+#define GPO3_PL29_RESET_MASK      ((u32)0X20000000U)
+#define GPO3_PL30_RESET_MASK      ((u32)0X40000000U)
+#define GPO3_PL31_RESET_MASK      ((u32)0X80000000U)
+
+/* PMU_LCL defines */
+#define XRESETPS_PMU_LCL_BASE     (0XFFD60000U)
+/* GPO Read control address */
+#define XRESETPS_PMU_LCL_READ_CTRL \
+				  ((XRESETPS_PMU_LCL_BASE) + ((u32)0X0000021CU))
+
+/* PMU_GLB defines */
+#define XRESETPS_PMU_GLB_BASE     (0XFFD80000U)
+/* PMU_GLB_RST Address and mask definations */
+#define XRESETPS_PMU_GLB_RST_CTRL ((XRESETPS_PMU_GLB_BASE) + ((u32)0X00000608U))
+#define RPU_LS_RESET_MASK         ((u32)0X00000100U)
+#define FPD_APU_RESET_MASK        ((u32)0X00000200U)
+#define PS_ONLY_RESET_MASK        ((u32)0X00000400U)
+/* PMU_GLB_PS Address and mask definations */
+#define XRESETPS_PMU_GLB_PS_CTRL  ((XRESETPS_PMU_GLB_BASE) + ((u32)0X00000004U))
+#define PROG_ENABLE_MASK          ((u32)0X00000002U)
+#define PROG_GATE_MASK            ((u32)0X00000001U)
+/* PMU_GLB_AIB Address and mask definations */
+#define XRESETPS_PMU_GLB_AIB_CTRL ((XRESETPS_PMU_GLB_BASE) + ((u32)0X00000600U))
+#define LPD_AFI_FM_ISO_MASK       ((u32)0X00000001U)
+#define LPD_AFI_FS_ISO_MASK       ((u32)0X00000002U)
+#define FPD_AFI_FM_ISO_MASK       ((u32)0X00000004U)
+#define FPD_AFI_FS_ISO_MASK       ((u32)0X00000008U)
+#define AIB_ISO_CTRL_MASK         (LPD_AFI_FM_ISO_MASK | LPD_AFI_FS_ISO_MASK | \
+				      FPD_AFI_FM_ISO_MASK | FPD_AFI_FS_ISO_MASK)
+/* PMU_GLB_AIB status Address and mask definations */
+#define XRESETPS_PMU_GLB_AIB_STATUS \
+				  ((XRESETPS_PMU_GLB_BASE) + ((u32)0X00000604U))
+#define AIB_ISO_STATUS_MASK       (AIB_ISO_CTRL_MASK)
+/* PMU_GLB_PWR status Address and mask definations */
+#define XRESETPS_PMU_GLB_PWR_STATUS \
+				  ((XRESETPS_PMU_GLB_BASE) + ((u32)0X00000100U))
+#define FPD_PSCHK_MASK            ((u32)0x00400000U)
+#define PCIE_CTRL_PSCHK_MASK      (FPD_PSCHK_MASK)
+#define DP_PSCHK_MASK             (FPD_PSCHK_MASK)
+#define SATA_PSCHK_MASK           (FPD_PSCHK_MASK)
+#define R50_PSCHK_MASK            ((u32)0x00000400U)
+#define R51_PSCHK_MASK            ((u32)0x00000800U)
+#define GPU_PP0_PSCHK_MASK        (((u32)0x00000010U) | (FPD_PSCHK_MASK))
+#define GPU_PP1_PSCHK_MASK        (((u32)0x00000020U) | (FPD_PSCHK_MASK))
+#define GPU_PSCHK_MASK            ((GPU_PP0_PSCHK_MASK) | \
+					(GPU_PP1_PSCHK_MASK) | (FPD_PSCHK_MASK))
+
+/* LPD_SLCR defines */
+#define XRESETPS_LPD_SCR_BASE     (0XFF410000U)
+/* LPD_SCR_AXIISO_REQ and LPD_SCR_AXIISO_ACK Address and mask definations */
+#define XRESETPS_LPD_SCR_AXIISO_REQ_CTRL \
+				  ((XRESETPS_LPD_SCR_BASE) + ((u32)0X00003030U))
+#define XRESETPS_LPD_SCR_AXIISO_ACK_CTRL \
+				  ((XRESETPS_LPD_SCR_BASE) + ((u32)0X00003040U))
+#define RPU0_MASTER_ISO_MASK      ((u32)0X00010000U)
+#define RPU1_MASTER_ISO_MASK      ((u32)0X00020000U)
+#define RPU_MASTER_ISO_MASK	  (RPU0_MASTER_ISO_MASK | RPU1_MASTER_ISO_MASK)
+#define RPU0_SLAVE_ISO_MASK       ((u32)0X00040000U)
+#define RPU1_SLAVE_ISO_MASK       ((u32)0X00080000U)
+#define RPU_SLAVE_ISO_MASK	  (RPU0_SLAVE_ISO_MASK | RPU1_SLAVE_ISO_MASK)
+#define FPD_OCM_ISO_MASK          ((u32)0X00000008U)
+#define FPD_LPDIBS_ISO_MASK       ((u32)0X00000004U)
+#define AFIFS1_ISO_MASK           ((u32)0X00000002U)
+#define AFIFS0_ISO_MASK           ((u32)0X00000001U)
+#define FPD_TO_LPD_ISO_MASK       (FPD_LPDIBS_ISO_MASK | FPD_OCM_ISO_MASK | \
+					      AFIFS0_ISO_MASK | AFIFS1_ISO_MASK)
+#define LPD_DDR_ISO_MASK          ((u32)0X08000000U)
+#define FPD_MAIN_ISO_MASK         ((u32)0X01000000U)
+#define LPD_TO_FPD_ISO_MASK       (LPD_DDR_ISO_MASK | FPD_MAIN_ISO_MASK)
+/* LPD_SLCR_APBISO_REQ Address and mask definations */
+#define XRESETPS_LPD_SLCR_APBISO_REQ_CTRL \
+				  ((XRESETPS_LPD_SCR_BASE) + ((u32)0X00003048U))
+#define GPU_ISO_MASK              ((u32)0X00000001U)
+
+/* CSU defines */
+#define XRESETPS_CSU_BASE         (0xFFCA0000U)
+#define XRESETPS_CSU_VERSION_REG  ((XRESETPS_CSU_BASE) + ((u32)0x00000044U))
+#define XRESETPS_PLATFORM_PS_VER1 ((u32)0x00000000U)
+#define PS_VERSION_MASK           ((u32)0x0000000FU)
+
+/* Timeout delay defines */
+#define XRESETPS_RST_PROP_DELAY   (0xFU)
+#define XRESETPS_AIB_ISO_DELAY	  (0xFU)
+#define XRESETPS_AIB_PSPL_DELAY	  (0xFU)
+#define XRESETPS_PULSE_PROP_DELAY (0xFU)
+
+/* AIB ack reconfirmation count */
+#define XRESETPS_AIB_PSPL_RECONFIRM_CNT \
+				  (0x2U)
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/resetps_v1_0/src/xresetps_sinit.c b/src/Xilinx/libsrc/resetps_v1_0/src/xresetps_sinit.c
new file mode 100644
index 0000000..eebdc9d
--- /dev/null
+++ b/src/Xilinx/libsrc/resetps_v1_0/src/xresetps_sinit.c
@@ -0,0 +1,94 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xresetps_sinit.c
+* @addtogroup xresetps_v1_0
+* @{
+*
+* This file contains method for static initialization (compile-time) of the
+* driver.
+*
+* 
+* MODIFICATION HISTORY:
+* Ver   Who    Date     Changes
+* ----- ------ -------- ----------------------------------------------
+* 1.00  cjp    09/05/17 First release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xresetps.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*************************** Variable Definitions ****************************/
+extern XResetPs_Config XResetPs_ConfigTable[XPAR_XRESETPS_NUM_INSTANCES];
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+* Lookup the device configuration based on the unique device ID. The table
+* contains the configuration info for each device in the system.
+*
+* @param	DeviceId is the unique device ID of the device being looked up.
+*
+* @return	A pointer to the configuration table entry corresponding to the
+*		given device ID, or NULL if no match is found.
+*
+* @note		None.
+*
+******************************************************************************/
+XResetPs_Config *XResetPs_LookupConfig(u16 DeviceId)
+{
+	XResetPs_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index = 0U; Index < (u32)XPAR_XRESETPS_NUM_INSTANCES; Index++) {
+		if (XResetPs_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XResetPs_ConfigTable[Index];
+			break;
+		}
+	}
+	return (XResetPs_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/rtcpsu_v1_5/src/Makefile b/src/Xilinx/libsrc/rtcpsu_v1_5/src/Makefile
new file mode 100644
index 0000000..dc8cbdf
--- /dev/null
+++ b/src/Xilinx/libsrc/rtcpsu_v1_5/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xrtcpsu_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling rtcpsu"
+
+xrtcpsu_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xrtcpsu_includes
+
+xrtcpsu_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu.c b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu.c
new file mode 100644
index 0000000..c09d1e7
--- /dev/null
+++ b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu.c
@@ -0,0 +1,526 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xrtcpsu.c
+* @addtogroup rtcpsu_v1_5
+* @{
+*
+* Functions in this file are the minimum required functions for the XRtcPsu
+* driver. See xrtcpsu.h for a detailed description of the driver.
+*
+* @note 	None.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00  kvn    04/21/15 First release
+* 1.1   kvn    09/25/15 Modify control register to enable battery
+*                       switching when vcc_psaux is not available.
+* 1.2          02/15/16 Corrected Calibration mask and Fractional
+*                       mask in CalculateCalibration API.
+* 1.3   vak    04/25/16 Corrected the RTC read and write time logic(cr#948833).
+* 1.5   ms     08/27/17 Fixed compilation warnings.
+*       ms     08/29/17 Updated code as per source code style.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xrtcpsu.h"
+#include "xrtcpsu_hw.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+static const u32 DaysInMonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
+
+/************************** Function Prototypes ******************************/
+
+static void XRtcPsu_StubHandler(void *CallBackRef, u32 Event);
+
+/*****************************************************************************/
+/*
+*
+* This function initializes a XRtcPsu instance/driver.
+*
+* The initialization entails:
+* - Initialize all members of the XRtcPsu structure.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+* @param	ConfigPtr points to the XRtcPsu device configuration structure.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. If the address translation is not used then the
+*		physical address is passed.
+*		Unexpected errors may occur if the address mapping is changed
+*		after this function is invoked.
+*
+* @return	XST_SUCCESS always.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XRtcPsu_CfgInitialize(XRtcPsu *InstancePtr, XRtcPsu_Config *ConfigPtr,
+				u32 EffectiveAddr)
+{
+	s32 Status;
+	u32 ControlRegister;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+
+	/*
+	 * Set some default values for instance data, don't indicate the device
+	 * is ready to use until everything has been initialized successfully.
+	 */
+	InstancePtr->IsReady = 0U;
+	InstancePtr->RtcConfig.BaseAddr = EffectiveAddr;
+	InstancePtr->RtcConfig.DeviceId = ConfigPtr->DeviceId;
+
+	if(InstancePtr->OscillatorFreq == 0U) {
+		InstancePtr->CalibrationValue = XRTC_CALIBRATION_VALUE;
+		InstancePtr->OscillatorFreq = XRTC_TYPICAL_OSC_FREQ;
+	}
+
+	/* Set all handlers to stub values, let user configure this data later. */
+	InstancePtr->Handler = XRtcPsu_StubHandler;
+
+	InstancePtr->IsPeriodicAlarm = 0U;
+
+	/* Set the calibration value in calibration register. */
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_CALIB_WR_OFFSET,
+				InstancePtr->CalibrationValue);
+
+	/* Set the Oscillator crystal and Battery switch enable in control register. */
+	ControlRegister = XRtcPsu_ReadReg(InstancePtr->RtcConfig.BaseAddr + XRTC_CTL_OFFSET);
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_CTL_OFFSET,
+			(ControlRegister | (u32)XRTCPSU_CRYSTAL_OSC_EN | (u32)XRTC_CTL_BATTERY_EN_MASK));
+
+	/* Clear the Interrupt Status and Disable the interrupts. */
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_INT_STS_OFFSET,
+			((u32)XRTC_INT_STS_ALRM_MASK | (u32)XRTC_INT_STS_SECS_MASK));
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_INT_DIS_OFFSET,
+			((u32)XRTC_INT_DIS_ALRM_MASK | (u32)XRTC_INT_DIS_SECS_MASK));
+
+	/* Indicate the component is now ready to use. */
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+
+	/* Clear TimeUpdated and CurrTimeUpdated */
+	InstancePtr->TimeUpdated = 0;
+	InstancePtr->CurrTimeUpdated = 0;
+
+	Status = XST_SUCCESS;
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This function is a stub handler that is the default handler such that if the
+* application has not set the handler when interrupts are enabled, this
+* function will be called.
+*
+* @param	CallBackRef is unused by this function.
+* @param	Event is unused by this function.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void XRtcPsu_StubHandler(void *CallBackRef, u32 Event)
+{
+	(void) CallBackRef;
+	(void) Event;
+	/* Assert occurs always since this is a stub and should never be called */
+	Xil_AssertVoidAlways();
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the RTC time by writing into rtc write register.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+* @param	Time that should be updated into RTC write register.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XRtcPsu_SetTime(XRtcPsu *InstancePtr,u32 Time)
+{
+	/* Set the calibration value in calibration register, so that
+	 * next Second is triggered exactly at 1 sec period
+	 */
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_CALIB_WR_OFFSET,
+							InstancePtr->CalibrationValue);
+	/* clear the RTC secs interrupt from status register */
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_INT_STS_OFFSET,
+								XRTC_INT_STS_SECS_MASK);
+	InstancePtr->CurrTimeUpdated = 0;
+	/* Update the flag before setting the time */
+	InstancePtr->TimeUpdated = 1;
+	/* Since RTC takes 1 sec to update the time into current time register, write
+	 * load time + 1sec into the set time register.
+	 */
+	XRtcPsu_WriteSetTime(InstancePtr, Time + 1);
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the current RTC time.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	RTC Current time.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XRtcPsu_GetCurrentTime(XRtcPsu *InstancePtr)
+{
+	u32 Status;
+	u32 IntMask;
+	u32 CurrTime;
+
+	IntMask = XRtcPsu_ReadReg(InstancePtr->RtcConfig.BaseAddr + XRTC_INT_MSK_OFFSET);
+
+	if((IntMask & XRTC_INT_STS_SECS_MASK) != (u32)0) {
+		/* We come here if interrupts are disabled */
+		Status = XRtcPsu_ReadReg(InstancePtr->RtcConfig.BaseAddr + XRTC_INT_STS_OFFSET);
+		if((InstancePtr->TimeUpdated == (u32)1) &&
+			(Status & XRTC_INT_STS_SECS_MASK) == (u32)0) {
+			/* Give the previous written time */
+			CurrTime = XRtcPsu_GetLastSetTime(InstancePtr) - 1;
+		} else {
+			/* Clear TimeUpdated */
+			if((InstancePtr->TimeUpdated == (u32)1) &&
+				((Status & XRTC_INT_STS_SECS_MASK) == (u32)1)) {
+				InstancePtr->TimeUpdated = (u32)0;
+			}
+
+			/* RTC time got updated */
+			CurrTime = XRtcPsu_ReadCurrentTime(InstancePtr);
+		}
+	} else {
+		/* We come here if interrupts are enabled */
+		if((InstancePtr->TimeUpdated == (u32)1) &&
+			(InstancePtr->CurrTimeUpdated == (u32)0)) {
+			/* Give the previous written time -1 sec */
+			CurrTime = XRtcPsu_GetLastSetTime(InstancePtr) - 1;
+		} else {
+			/* Clear TimeUpdated */
+			if(InstancePtr->TimeUpdated == (u32)1)
+				InstancePtr->TimeUpdated = (u32)0;
+			/* RTC time got updated */
+			CurrTime = XRtcPsu_ReadCurrentTime(InstancePtr);
+		}
+	}
+	return CurrTime;
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the alarm value of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance
+* @param	Alarm is the desired alarm time for RTC.
+* @param	Periodic says whether the alarm need to set at periodic
+* 			Intervals or a one-time alarm.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XRtcPsu_SetAlarm(XRtcPsu *InstancePtr, u32 Alarm, u32 Periodic)
+{
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Alarm != 0U);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((Alarm - XRtcPsu_GetCurrentTime(InstancePtr)) > (u32)0);
+
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr+XRTC_ALRM_OFFSET, Alarm);
+	if(Periodic != 0U) {
+		InstancePtr->IsPeriodicAlarm = 1U;
+		InstancePtr->PeriodicAlarmTime =
+				Alarm - XRtcPsu_GetCurrentTime(InstancePtr);
+	}
+}
+
+
+/****************************************************************************/
+/**
+*
+* This function translates time in seconds to a YEAR:MON:DAY HR:MIN:SEC
+* format and saves it in the DT structure variable. It also reports the weekday.
+*
+* @param	Seconds is the time value that has to be shown in DateTime
+* 		format.
+* @param	dt is the DateTime format variable that stores the translated
+* 		time.
+*
+* @return	None.
+*
+* @note		This API supports this century i.e., 2000 - 2099 years only.
+*
+*****************************************************************************/
+void XRtcPsu_SecToDateTime(u32 Seconds, XRtcPsu_DT *dt)
+{
+	u32 CurrentTime;
+	u32 TempDays;
+	u32 DaysPerMonth;
+	u32 Leap = 0U;
+
+	CurrentTime = Seconds;
+	dt->Sec = CurrentTime % 60U;
+	CurrentTime /= 60U;
+	dt->Min = CurrentTime % 60U;
+	CurrentTime /= 60U;
+	dt->Hour = CurrentTime % 24U;
+	TempDays = CurrentTime / 24U;
+
+	if (TempDays == 0U) {
+		TempDays = 1U;
+	}
+	dt->WeekDay = TempDays % 7U;
+
+	for (dt->Year = 0U; dt->Year <= 99U; ++(dt->Year)) {
+		if ((dt->Year % 4U) == 0U ) {
+			Leap = 1U;
+		}
+		else {
+			Leap = 0U;
+		}
+		if (TempDays < (365U + Leap)) {
+			break;
+		}
+		TempDays -= (365U + Leap);
+	}
+
+	for (dt->Month = 1U; dt->Month >= 1U; ++(dt->Month)) {
+		DaysPerMonth = DaysInMonth[dt->Month - 1];
+		if ((Leap == 1U) && (dt->Month == 2U)) {
+			DaysPerMonth++;
+		}
+		if (TempDays < DaysPerMonth) {
+			break;
+		}
+		TempDays -= DaysPerMonth;
+	}
+
+	dt->Day = TempDays;
+	dt->Year += 2000U;
+}
+
+/****************************************************************************/
+/**
+*
+* This function translates time in YEAR:MON:DAY HR:MIN:SEC format to
+* seconds.
+*
+* @param	dt is a pointer to a DatetTime format structure variable
+* 			of time that has to be shown in seconds.
+*
+* @return	Seconds value of provided in dt time.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XRtcPsu_DateTimeToSec(XRtcPsu_DT *dt)
+{
+	u32 i;
+	u32 Days;
+	u32 Seconds;
+	Xil_AssertNonvoid(dt != NULL);
+
+	if (dt->Year >= 2000U) {
+		dt->Year -= 2000U;
+	}
+
+	for (i = 1U; i < dt->Month; i++) {
+		dt->Day += (u32)DaysInMonth[i-1];
+	}
+
+	if ((dt->Month > 2U) && ((dt->Year % 4U) == 0U)) {
+		dt->Day++;
+	}
+	Days = dt->Day + (365U * dt->Year) + ((dt->Year + 3U) / 4U);
+	Seconds = (((((Days * 24U) + dt->Hour) * 60U) + dt->Min) * 60U) + dt->Sec;
+	return Seconds;
+}
+
+/****************************************************************************/
+/**
+*
+* This function calculates the calibration value depending on the actual
+* realworld time and also helps in deriving new calibration value if
+* the user wishes to change his oscillator frequency.TimeReal is generally the
+* internet time with EPOCH time as reference i.e.,1/1/1970 1st second.
+* But this RTC driver assumes start time from 1/1/2000 1st second. Hence,if
+* the user maps the internet time InternetTimeInSecs, then he has to use
+* 	XRtcPsu_SecToDateTime(InternetTimeInSecs,&InternetTime),
+* 	TimeReal = XRtcPsu_DateTimeToSec(InternetTime)
+* 	consecutively to arrive at TimeReal value.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+* @param	TimeReal is the actual realworld time generally an
+* 		network time / Internet time in seconds.
+*
+* @param	CrystalOscFreq is the Oscillator new frequency. Say, If the user
+* 		is going with the typical 32768Hz, then he inputs the same
+* 		frequency value.
+*
+* @return	None.
+*
+* @note		After Calculating the calibration register, user / application has to
+* 			call again CfgInitialize API to bring the new calibration into effect.
+*
+*****************************************************************************/
+void XRtcPsu_CalculateCalibration(XRtcPsu *InstancePtr,u32 TimeReal,
+		u32 CrystalOscFreq)
+{
+	u32 ReadTime;
+	u32 SetTime;
+	u32 Cprev;
+	u32 Fprev;
+	u32 Cnew;
+	u32 Fnew;
+	u32 Calibration;
+	float Xf;
+	Xil_AssertVoid(TimeReal != 0U);
+	Xil_AssertVoid(CrystalOscFreq != 0U);
+
+	ReadTime = XRtcPsu_GetCurrentTime(InstancePtr);
+	SetTime = XRtcPsu_GetLastSetTime(InstancePtr);
+	Calibration = XRtcPsu_GetCalibration(InstancePtr);
+	/*
+	 * When board gets reseted, Calibration value is zero
+	 * and Last setTime will be marked as 1st  second. This implies
+	 * CurrentTime to be in few seconds say something in tens. TimeReal will
+	 * be huge, say something in thousands. So to prevent such reset case, Cnew
+	 * and Fnew will not be calculated.
+	 */
+	if((Calibration == 0U) || (CrystalOscFreq != InstancePtr->OscillatorFreq)) {
+		Cnew = CrystalOscFreq - (u32)1;
+		Fnew = 0U;
+	} else {
+		Cprev = Calibration & XRTC_CALIB_RD_MAX_TCK_MASK;
+		Fprev = Calibration & XRTC_CALIB_RD_FRACTN_DATA_MASK;
+
+		Xf = ((ReadTime - SetTime) * ((Cprev+1U) + ((Fprev+1U)/16U))) / (TimeReal - SetTime);
+		Cnew = (u32)(Xf) - (u32)1;
+		Fnew = XRtcPsu_RoundOff((Xf - Cnew) * 16U) - (u32)1;
+	}
+
+	Calibration = (Fnew << XRTC_CALIB_RD_FRACTN_DATA_SHIFT) + Cnew;
+	Calibration |= XRTC_CALIB_RD_FRACTN_EN_MASK;
+
+	InstancePtr->CalibrationValue = Calibration;
+	InstancePtr->OscillatorFreq = CrystalOscFreq;
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the seconds event status by reading
+* interrupt status register.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	Returns 1 if a new second event is generated.Else 0..
+*
+* @note		This API is used in polled mode operation of RTC.
+* 			This also clears interrupt status seconds bit.
+*
+*****************************************************************************/
+u32 XRtcPsu_IsSecondsEventGenerated(XRtcPsu *InstancePtr)
+{
+	u32 Status;
+
+	/* Loop the interrupt status register for Seconds Event */
+	if ((XRtcPsu_ReadReg(InstancePtr->RtcConfig.BaseAddr +
+			XRTC_INT_STS_OFFSET) & (XRTC_INT_STS_SECS_MASK)) == 0U) {
+		Status = 0U;
+	} else {
+		/* Clear the interrupt status register */
+		XRtcPsu_WriteReg((InstancePtr)->RtcConfig.BaseAddr +
+				XRTC_INT_STS_OFFSET, XRTC_INT_STS_SECS_MASK);
+		Status = 1U;
+	}
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the alarm event status by reading
+* interrupt status register.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	Returns 1 if the alarm event is generated.Else 0.
+*
+* @note		This API is used in polled mode operation of RTC.
+* 			This also clears interrupt status alarm bit.
+*
+*****************************************************************************/
+u32 XRtcPsu_IsAlarmEventGenerated(XRtcPsu *InstancePtr)
+{
+	u32 Status;
+
+	/* Loop the interrupt status register for Alarm Event */
+	if ((XRtcPsu_ReadReg(InstancePtr->RtcConfig.BaseAddr +
+			XRTC_INT_STS_OFFSET) & (XRTC_INT_STS_ALRM_MASK)) == 0U) {
+		Status = 0U;
+	} else {
+		/* Clear the interrupt status register */
+		XRtcPsu_WriteReg((InstancePtr)->RtcConfig.BaseAddr +
+				XRTC_INT_STS_OFFSET, XRTC_INT_STS_ALRM_MASK);
+		Status = 1U;
+	}
+	return Status;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu.h b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu.h
new file mode 100644
index 0000000..8320470
--- /dev/null
+++ b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu.h
@@ -0,0 +1,400 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xrtcpsu.h
+* @addtogroup rtcpsu_v1_5
+* @{
+* @details
+*
+* The Xilinx RTC driver component.  This component supports the Xilinx
+* RTC Controller. RTC Core and RTC controller are the two main important sub-
+* components for this RTC module. RTC core can run even in the battery powered
+* domain when the power from auxiliary source is down. Because of this, RTC core
+* latches the calibration,programmed time. This core interfaces with the crystal
+* oscillator and maintains current time in seconds.Calibration circuitry
+* calculates a second with maximum 1 PPM inaccuracy using a crystal oscillator
+* with arbitrary static inaccuracy. Core also responsible to maintain control
+* value used by the oscillator and power switching circuitry.
+*
+* RTC controller includes an APB interface responsible for register access with
+* in controller and core. It contains alarm generation logic including the alarm
+* register to hold alarm time in seconds.Interrupt management using Interrupt
+* status, Interrupt mask, Interrupt enable, Interrupt disable registers are
+* included to manage alarm and seconds interrupts. Address Slave error interrupts
+* are not being handled by this driver component.
+*
+* This driver supports the following features:
+* - Setting the RTC time.
+* - Setting the Alarm value that can be one-time alarm or a periodic alarm.
+* - Modifying the calibration value.
+*
+* Initialization & Configuration
+*
+* The XRtcPsu_Config structure is used by the driver to configure itself.
+* Fields inside this structure are properties of XRtcPsu based on its hardware
+* build.
+*
+* To support multiple runtime loading and initialization strategies employed
+* by various operating systems, the driver instance can be initialized in the
+* following way:
+*
+*   - XRtcPsu_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
+*	 configuration structure provided by the caller. If running in a system
+*	 with address translation, the parameter EffectiveAddr should be the
+* 	  virtual address.
+*
+* Interrupts
+*
+* The driver defaults to no interrupts at initialization such that interrupts
+* must be enabled if desired. An interrupt is generated for one of the
+* following conditions.
+*
+* - Alarm is generated.
+* - A new second is generated.
+*
+* The application can control which interrupts are enabled using the
+* XRtcPsu_SetInterruptMask() function.
+*
+* In order to use interrupts, it is necessary for the user to connect the
+* driver interrupt handler, XRtcPsu_InterruptHandler(), to the interrupt
+* system of the application. A separate handler should be provided by the
+* application to communicate with the interrupt system, and conduct
+* application specific interrupt handling. An application registers its own
+* handler through the XRtcPsu_SetHandler() function.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00  kvn    04/21/15 First release
+* 1.1   kvn    09/25/15 Modify control register to enable battery
+*                       switching when vcc_psaux is not available.
+* 1.3   vak    04/25/16 Corrected the RTC read and write time logic(cr#948833).
+* 1.4 	MNK    01/27/17 Corrected calibration and frequency macros based on
+* 			rtc input oscillator frequency ( 32.768Khz).
+*       ms     03/17/17 Added readme.txt file in examples folder for doxygen
+*                       generation.
+*       ms     04/10/17 Modified filename tag in examples to include them in
+*                       doxygen examples.
+* 1.5   ms     08/27/17 Fixed compilation warnings in xrtcpsu.c file.
+*       ms     08/29/17 Updated the code as per source code style.
+* 

+*
+******************************************************************************/
+
+
+#ifndef XRTC_H_			/* prevent circular inclusions */
+#define XRTC_H_			/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xrtcpsu_hw.h"
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Callback events
+ *
+ * These constants specify the handler events that an application can handle
+ * using its specific handler function. Note that these constants are not bit
+ * mask, so only one event can be passed to an application at a time.
+ *
+ * @{
+ */
+#define XRTCPSU_EVENT_ALARM_GEN		1U /**< Alarm generated event */
+#define XRTCPSU_EVENT_SECS_GEN		2U /**< A new second generated event */
+/*@}*/
+
+#define XRTCPSU_CRYSTAL_OSC_EN		(u32)1 << XRTC_CTL_OSC_SHIFT
+/**< Separate Mask for Crystal oscillator bit Enable */
+
+/**************************** Type Definitions *******************************/
+
+/******************************************************************************/
+/**
+ * This data type defines a handler that an application defines to communicate
+ * with interrupt system to retrieve state information about an application.
+ *
+ * @param	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the handler, and is passed back to the upper layer
+ *		when the handler is called. It is used to find the device driver
+ *		instance.
+ * @param	Event contains one of the event constants indicating events that
+ *		have occurred.
+ * @param	EventData contains the number of bytes sent or received at the
+ *		time of the call for send and receive events and contains the
+ *		modem status for modem events.
+ *
+ ******************************************************************************/
+typedef void (*XRtcPsu_Handler) (void *CallBackRef, u32 Event);
+
+/**
+ * This typedef contains configuration information for a device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID of device */
+	u32 BaseAddr;		/**< Register base address */
+} XRtcPsu_Config;
+
+/**
+ * The XRtcPsu driver instance data. The user is required to allocate a
+ * variable of this type for the RTC device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XRtcPsu_Config RtcConfig; 	/**< Device configuration */
+	u32 IsReady;				/**< Device is initialized and ready */
+	u32 PeriodicAlarmTime;
+	u8 IsPeriodicAlarm;
+	u32 OscillatorFreq;
+	u32 CalibrationValue;
+	XRtcPsu_Handler Handler;
+	void *CallBackRef;			/**< Callback reference for event handler */
+	u32 TimeUpdated;
+	u32 CurrTimeUpdated;
+} XRtcPsu;
+
+/**
+ * This typedef contains DateTime format structure.
+ */
+typedef struct {
+	u32 Year;
+	u32 Month;
+	u32 Day;
+	u32 Hour;
+	u32 Min;
+	u32 Sec;
+	u32 WeekDay;
+} XRtcPsu_DT;
+
+
+/************************* Variable Definitions ******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XRTC_CALIBRATION_VALUE 0x8000U
+#define XRTC_TYPICAL_OSC_FREQ 32768U
+
+/****************************************************************************/
+/**
+*
+* This macro updates the current time of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+* @param	Time is the desired time for RTC in seconds.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+* 		void XRtcPsu_SetTime(XRtcPsu *InstancePtr, u32 Time)
+*
+*****************************************************************************/
+#define XRtcPsu_WriteSetTime(InstancePtr,Time) \
+	XRtcPsu_WriteReg(((InstancePtr)->RtcConfig.BaseAddr + \
+				XRTC_SET_TIME_WR_OFFSET),(Time))
+
+/****************************************************************************/
+/**
+*
+* This macro returns the last set time of RTC device. Whenever a reset
+* happens, the last set time will be zeroth day first sec.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	The last set time in seconds.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_GetLastSetTime(XRtcPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XRtcPsu_GetLastSetTime(InstancePtr) \
+	XRtcPsu_ReadReg((InstancePtr)->RtcConfig.BaseAddr + XRTC_SET_TIME_RD_OFFSET)
+
+/****************************************************************************/
+/**
+*
+* This macro returns the calibration value of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	Calibration value for RTC.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_GetCalibration(XRtcPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XRtcPsu_GetCalibration(InstancePtr) \
+	XRtcPsu_ReadReg((InstancePtr)->RtcConfig.BaseAddr+XRTC_CALIB_RD_OFFSET)
+
+/****************************************************************************/
+/**
+*
+* This macro returns the current time of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	Current Time. This current time will be in seconds.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_ReadCurrentTime(XRtcPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XRtcPsu_ReadCurrentTime(InstancePtr) \
+	XRtcPsu_ReadReg((InstancePtr)->RtcConfig.BaseAddr+XRTC_CUR_TIME_OFFSET)
+
+/****************************************************************************/
+/**
+*
+* This macro sets the control register value of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+* @param	Value is the desired control register value for RTC.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+* 		void XRtcPsu_SetControlRegister(XRtcPsu *InstancePtr, u32 Value)
+*
+*****************************************************************************/
+#define XRtcPsu_SetControlRegister(InstancePtr, Value) \
+	XRtcPsu_WriteReg((InstancePtr)->RtcConfig.BaseAddr + \
+			XRTC_CTL_OFFSET,(Value))
+
+/****************************************************************************/
+/**
+*
+* This macro returns the safety check register value of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	Safety check register value.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_GetSafetyCheck(XRtcPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XRtcPsu_GetSafetyCheck(InstancePtr)	\
+	XRtcPsu_ReadReg((InstancePtr)->RtcConfig.BaseAddr+XRTC_SFTY_CHK_OFFSET)
+
+/****************************************************************************/
+/**
+*
+* This macro sets the safety check register value of RTC device.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+* @param	Value is a safety check value to be written in register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+* 		void XRtcPsu_SetSafetyCheck(XRtcPsu *InstancePtr, u32 Value)
+*
+*****************************************************************************/
+#define XRtcPsu_SetSafetyCheck(InstancePtr, Value)	\
+	XRtcPsu_WriteReg((InstancePtr)->RtcConfig.BaseAddr + \
+			XRTC_SFTY_CHK_OFFSET,(Value))
+
+/****************************************************************************/
+/**
+*
+* This macro resets the alarm register
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_ResetAlarm(XRtcPsu *InstancePtr)
+*
+*****************************************************************************/
+#define XRtcPsu_ResetAlarm(InstancePtr) \
+		XRtcPsu_WriteReg((InstancePtr)->RtcConfig.BaseAddr + \
+				XRTC_ALRM_OFFSET,XRTC_ALRM_RSTVAL)
+
+/****************************************************************************/
+/**
+*
+* This macro rounds off the given number
+*
+* @param	Number is the one that needs to be rounded off..
+*
+* @return	The rounded off value of the input number.
+*
+* @note		C-Style signature:
+* 		u32 XRtcPsu_RoundOff(float Number)
+*
+*****************************************************************************/
+#define XRtcPsu_RoundOff(Number) \
+	(u32)(((Number) < (u32)0) ? ((Number) - (u32)0.5) : ((Number) + (u32)0.5))
+
+/************************** Function Prototypes ******************************/
+
+/* Functions in xrtcpsu.c */
+s32 XRtcPsu_CfgInitialize(XRtcPsu *InstancePtr, XRtcPsu_Config *ConfigPtr,
+				u32 EffectiveAddr);
+
+void XRtcPsu_SetAlarm(XRtcPsu *InstancePtr, u32 Alarm, u32 Periodic);
+void XRtcPsu_SecToDateTime(u32 Seconds, XRtcPsu_DT *dt);
+u32 XRtcPsu_DateTimeToSec(XRtcPsu_DT *dt);
+void XRtcPsu_CalculateCalibration(XRtcPsu *InstancePtr,u32 TimeReal,
+		u32 CrystalOscFreq);
+u32 XRtcPsu_IsSecondsEventGenerated(XRtcPsu *InstancePtr);
+u32 XRtcPsu_IsAlarmEventGenerated(XRtcPsu *InstancePtr);
+u32 XRtcPsu_GetCurrentTime(XRtcPsu *InstancePtr);
+void XRtcPsu_SetTime(XRtcPsu *InstancePtr,u32 Time);
+
+/* interrupt functions in xrtcpsu_intr.c */
+void XRtcPsu_SetInterruptMask(XRtcPsu *InstancePtr, u32 Mask);
+void XRtcPsu_ClearInterruptMask(XRtcPsu *InstancePtr, u32 Mask);
+void XRtcPsu_InterruptHandler(XRtcPsu *InstancePtr);
+void XRtcPsu_SetHandler(XRtcPsu *InstancePtr, XRtcPsu_Handler FuncPtr,
+			 void *CallBackRef);
+
+/* Functions in xrtcpsu_selftest.c */
+s32 XRtcPsu_SelfTest(XRtcPsu *InstancePtr);
+
+/* Functions in xrtcpsu_sinit.c */
+XRtcPsu_Config *XRtcPsu_LookupConfig(u16 DeviceId);
+
+
+#endif /* XRTC_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_g.c b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_g.c
new file mode 100644
index 0000000..81a9a47
--- /dev/null
+++ b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_g.c
@@ -0,0 +1,55 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xrtcpsu.h"
+
+/*
+* The configuration table for devices
+*/
+
+XRtcPsu_Config XRtcPsu_ConfigTable[XPAR_XRTCPSU_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_RTC_DEVICE_ID,
+		XPAR_PSU_RTC_BASEADDR
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_hw.h b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_hw.h
new file mode 100644
index 0000000..b535359
--- /dev/null
+++ b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_hw.h
@@ -0,0 +1,362 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xrtcpsu_hw.h
+* @addtogroup rtcpsu_v1_5
+* @{
+*
+* This header file contains the identifiers and basic driver functions (or
+* macros) that can be used to access the device. Other driver functions
+* are defined in xrtcpsu.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00a kvn	  04/21/15 First release
+* 1.1   kvn   09/25/15 Modify control register to enable battery
+*                      switching when vcc_psaux is not available.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XRTC_HW_H_		/* prevent circular inclusions */
+#define XRTC_HW_H_		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/**
+ * Xrtc Base Address
+ */
+#define XRTC_BASEADDR      0xFFA60000U
+
+/**
+ * Register: XrtcSetTimeWr
+ */
+#define XRTC_SET_TIME_WR_OFFSET    0x00000000U
+#define XRTC_SET_TIME_WR_RSTVAL   0x00000000U
+
+#define XRTC_SET_TIME_WR_VAL_SHIFT   0U
+#define XRTC_SET_TIME_WR_VAL_WIDTH   32U
+#define XRTC_SET_TIME_WR_VAL_MASK    0xffffffffU
+#define XRTC_SET_TIME_WR_VAL_DEFVAL  0x0U
+
+/**
+ * Register: XrtcSetTimeRd
+ */
+#define XRTC_SET_TIME_RD_OFFSET    0x00000004U
+#define XRTC_SET_TIME_RD_RSTVAL   0x00000000U
+
+#define XRTC_SET_TIME_RD_VAL_SHIFT   0U
+#define XRTC_SET_TIME_RD_VAL_WIDTH   32U
+#define XRTC_SET_TIME_RD_VAL_MASK    0xffffffffU
+#define XRTC_SET_TIME_RD_VAL_DEFVAL  0x0U
+
+/**
+ * Register: XrtcCalibWr
+ */
+#define XRTC_CALIB_WR_OFFSET    0x00000008U
+#define XRTC_CALIB_WR_RSTVAL   0x00000000U
+
+#define XRTC_CALIB_WR_FRACTN_EN_SHIFT   20U
+#define XRTC_CALIB_WR_FRACTN_EN_WIDTH   1U
+#define XRTC_CALIB_WR_FRACTN_EN_MASK    0x00100000U
+#define XRTC_CALIB_WR_FRACTN_EN_DEFVAL  0x0U
+
+#define XRTC_CALIB_WR_FRACTN_DATA_SHIFT   16U
+#define XRTC_CALIB_WR_FRACTN_DATA_WIDTH   4U
+#define XRTC_CALIB_WR_FRACTN_DATA_MASK    0x000f0000U
+#define XRTC_CALIB_WR_FRACTN_DATA_DEFVAL  0x0U
+
+#define XRTC_CALIB_WR_MAX_TCK_SHIFT   0U
+#define XRTC_CALIB_WR_MAX_TCK_WIDTH   16U
+#define XRTC_CALIB_WR_MAX_TCK_MASK    0x0000ffffU
+#define XRTC_CALIB_WR_MAX_TCK_DEFVAL  0x0U
+
+/**
+ * Register: XrtcCalibRd
+ */
+#define XRTC_CALIB_RD_OFFSET    0x0000000CU
+#define XRTC_CALIB_RD_RSTVAL   0x00000000U
+
+#define XRTC_CALIB_RD_FRACTN_EN_SHIFT   20U
+#define XRTC_CALIB_RD_FRACTN_EN_WIDTH   1U
+#define XRTC_CALIB_RD_FRACTN_EN_MASK    0x00100000U
+#define XRTC_CALIB_RD_FRACTN_EN_DEFVAL  0x0U
+
+#define XRTC_CALIB_RD_FRACTN_DATA_SHIFT   16U
+#define XRTC_CALIB_RD_FRACTN_DATA_WIDTH   4U
+#define XRTC_CALIB_RD_FRACTN_DATA_MASK    0x000f0000U
+#define XRTC_CALIB_RD_FRACTN_DATA_DEFVAL  0x0U
+
+#define XRTC_CALIB_RD_MAX_TCK_SHIFT   0U
+#define XRTC_CALIB_RD_MAX_TCK_WIDTH   16U
+#define XRTC_CALIB_RD_MAX_TCK_MASK    0x0000ffffU
+#define XRTC_CALIB_RD_MAX_TCK_DEFVAL  0x0U
+
+/**
+ * Register: XrtcCurTime
+ */
+#define XRTC_CUR_TIME_OFFSET    0x00000010U
+#define XRTC_CUR_TIME_RSTVAL   0x00000000U
+
+#define XRTC_CUR_TIME_VAL_SHIFT   0U
+#define XRTC_CUR_TIME_VAL_WIDTH   32U
+#define XRTC_CUR_TIME_VAL_MASK    0xffffffffU
+#define XRTC_CUR_TIME_VAL_DEFVAL  0x0U
+
+/**
+ * Register: XrtcCurTck
+ */
+#define XRTC_CUR_TCK_OFFSET    0x00000014U
+#define XRTC_CUR_TCK_RSTVAL   0x00000000U
+
+#define XRTC_CUR_TCK_VAL_SHIFT   0U
+#define XRTC_CUR_TCK_VAL_WIDTH   16U
+#define XRTC_CUR_TCK_VAL_MASK    0x0000ffffU
+#define XRTC_CUR_TCK_VAL_DEFVAL  0x0U
+
+/**
+ * Register: XrtcAlrm
+ */
+#define XRTC_ALRM_OFFSET    0x00000018U
+#define XRTC_ALRM_RSTVAL   0x00000000U
+
+#define XRTC_ALRM_VAL_SHIFT   0U
+#define XRTC_ALRM_VAL_WIDTH   32U
+#define XRTC_ALRM_VAL_MASK    0xffffffffU
+#define XRTC_ALRM_VAL_DEFVAL  0x0U
+
+/**
+ * Register: XrtcIntSts
+ */
+#define XRTC_INT_STS_OFFSET    0x00000020U
+#define XRTC_INT_STS_RSTVAL   0x00000000U
+
+#define XRTC_INT_STS_ALRM_SHIFT   1U
+#define XRTC_INT_STS_ALRM_WIDTH   1U
+#define XRTC_INT_STS_ALRM_MASK    0x00000002U
+#define XRTC_INT_STS_ALRM_DEFVAL  0x0U
+
+#define XRTC_INT_STS_SECS_SHIFT   0U
+#define XRTC_INT_STS_SECS_WIDTH   1U
+#define XRTC_INT_STS_SECS_MASK    0x00000001U
+#define XRTC_INT_STS_SECS_DEFVAL  0x0U
+
+/**
+ * Register: XrtcIntMsk
+ */
+#define XRTC_INT_MSK_OFFSET    0x00000024U
+#define XRTC_INT_MSK_RSTVAL   0x00000003U
+
+#define XRTC_INT_MSK_ALRM_SHIFT   1U
+#define XRTC_INT_MSK_ALRM_WIDTH   1U
+#define XRTC_INT_MSK_ALRM_MASK    0x00000002U
+#define XRTC_INT_MSK_ALRM_DEFVAL  0x1U
+
+#define XRTC_INT_MSK_SECS_SHIFT   0U
+#define XRTC_INT_MSK_SECS_WIDTH   1U
+#define XRTC_INT_MSK_SECS_MASK    0x00000001U
+#define XRTC_INT_MSK_SECS_DEFVAL  0x1U
+
+/**
+ * Register: XrtcIntEn
+ */
+#define XRTC_INT_EN_OFFSET    0x00000028U
+#define XRTC_INT_EN_RSTVAL   0x00000000U
+
+#define XRTC_INT_EN_ALRM_SHIFT   1U
+#define XRTC_INT_EN_ALRM_WIDTH   1U
+#define XRTC_INT_EN_ALRM_MASK    0x00000002U
+#define XRTC_INT_EN_ALRM_DEFVAL  0x0U
+
+#define XRTC_INT_EN_SECS_SHIFT   0U
+#define XRTC_INT_EN_SECS_WIDTH   1U
+#define XRTC_INT_EN_SECS_MASK    0x00000001U
+#define XRTC_INT_EN_SECS_DEFVAL  0x0U
+
+/**
+ * Register: XrtcIntDis
+ */
+#define XRTC_INT_DIS_OFFSET    0x0000002CU
+#define XRTC_INT_DIS_RSTVAL   0x00000000U
+
+#define XRTC_INT_DIS_ALRM_SHIFT   1U
+#define XRTC_INT_DIS_ALRM_WIDTH   1U
+#define XRTC_INT_DIS_ALRM_MASK    0x00000002U
+#define XRTC_INT_DIS_ALRM_DEFVAL  0x0U
+
+#define XRTC_INT_DIS_SECS_SHIFT   0U
+#define XRTC_INT_DIS_SECS_WIDTH   1U
+#define XRTC_INT_DIS_SECS_MASK    0x00000001U
+#define XRTC_INT_DIS_SECS_DEFVAL  0x0U
+
+/**
+ * Register: XrtcAddErr
+ */
+#define XRTC_ADD_ERR_OFFSET    0x00000030U
+#define XRTC_ADD_ERR_RSTVAL   0x00000000U
+
+#define XRTC_ADD_ERR_STS_SHIFT   0U
+#define XRTC_ADD_ERR_STS_WIDTH   1U
+#define XRTC_ADD_ERR_STS_MASK    0x00000001U
+#define XRTC_ADD_ERR_STS_DEFVAL  0x0U
+
+/**
+ * Register: XrtcAddErrIntMsk
+ */
+#define XRTC_ADD_ERR_INT_MSK_OFFSET    0x00000034U
+#define XRTC_ADD_ERR_INT_MSK_RSTVAL   0x00000001U
+
+#define XRTC_ADD_ERR_INT_MSK_SHIFT   0U
+#define XRTC_ADD_ERR_INT_MSK_WIDTH   1U
+#define XRTC_ADD_ERR_INT_MSK_MASK    0x00000001U
+#define XRTC_ADD_ERR_INT_MSK_DEFVAL  0x1U
+
+/**
+ * Register: XrtcAddErrIntEn
+ */
+#define XRTC_ADD_ERR_INT_EN_OFFSET    0x00000038U
+#define XRTC_ADD_ERR_INT_EN_RSTVAL   0x00000000U
+
+#define XRTC_ADD_ERR_INT_EN_MSK_SHIFT   0U
+#define XRTC_ADD_ERR_INT_EN_MSK_WIDTH   1U
+#define XRTC_ADD_ERR_INT_EN_MSK_MASK    0x00000001U
+#define XRTC_ADD_ERR_INT_EN_MSK_DEFVAL  0x0U
+
+/**
+ * Register: XrtcAddErrIntDis
+ */
+#define XRTC_ADD_ERR_INT_DIS_OFFSET    0x0000003CU
+#define XRTC_ADD_ERR_INT_DIS_RSTVAL   0x00000000U
+
+#define XRTC_ADD_ERR_INT_DIS_MSK_SHIFT   0U
+#define XRTC_ADD_ERR_INT_DIS_MSK_WIDTH   1U
+#define XRTC_ADD_ERR_INT_DIS_MSK_MASK    0x00000001U
+#define XRTC_ADD_ERR_INT_DIS_MSK_DEFVAL  0x0U
+
+/**
+ * Register: XrtcCtl
+ */
+#define XRTC_CTL_OFFSET    0x00000040U
+#define XRTC_CTL_RSTVAL   0x01000000U
+
+#define XRTC_CTL_BATTERY_EN_SHIFT   31U
+#define XRTC_CTL_BATTERY_EN_WIDTH   1U
+#define XRTC_CTL_BATTERY_EN_MASK    0x80000000U
+#define XRTC_CTL_BATTERY_EN_DEFVAL  0x0U
+
+#define XRTC_CTL_OSC_SHIFT   24U
+#define XRTC_CTL_OSC_WIDTH   4U
+#define XRTC_CTL_OSC_MASK    0x0f000000U
+#define XRTC_CTL_OSC_DEFVAL  0x1U
+
+#define XRTC_CTL_SLVERR_EN_SHIFT   0U
+#define XRTC_CTL_SLVERR_EN_WIDTH   1U
+#define XRTC_CTL_SLVERR_EN_MASK    0x00000001U
+#define XRTC_CTL_SLVERR_EN_DEFVAL  0x0U
+
+/**
+ * Register: XrtcSftyChk
+ */
+#define XRTC_SFTY_CHK_OFFSET    0x00000050U
+#define XRTC_SFTY_CHK_RSTVAL   0x00000000U
+
+#define XRTC_SFTY_CHK_REG_SHIFT   0U
+#define XRTC_SFTY_CHK_REG_WIDTH   32U
+#define XRTC_SFTY_CHK_REG_MASK    0xffffffffU
+#define XRTC_SFTY_CHK_REG_DEFVAL  0x0U
+
+/**
+ * Register: XrtcEco
+ */
+#define XRTC_ECO_OFFSET    0x00000060U
+#define XRTC_ECO_RSTVAL   0x00000000U
+
+#define XRTC_ECO_REG_SHIFT   0U
+#define XRTC_ECO_REG_WIDTH   32U
+#define XRTC_ECO_REG_MASK    0xffffffffU
+#define XRTC_ECO_REG_DEFVAL  0x0U
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* This macro reads the given register.
+*
+* @param	RegisterAddr is the register address in the address
+* 			space of the RTC device.
+*
+* @return	The 32-bit value of the register
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XRtcPsu_ReadReg(RegisterAddr) Xil_In32(RegisterAddr)
+
+/****************************************************************************/
+/**
+*
+* This macro writes the given register.
+*
+* @param	RegisterAddr is the register address in the address
+* 			space of the RTC device.
+* @param	Data is the 32-bit value to write to the register.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XRtcPsu_WriteReg(RegisterAddr, Data) Xil_Out32(RegisterAddr, (u32)(Data))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XRTC_HW_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_intr.c b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_intr.c
new file mode 100644
index 0000000..1f5f831
--- /dev/null
+++ b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_intr.c
@@ -0,0 +1,242 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xrtcpsu_intr.c
+* @addtogroup rtcpsu_v1_5
+* @{
+*
+* This file contains functions related to RTC interrupt handling.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00  kvn    04/21/15 First release
+* 1.3   vak    04/25/16 Changed the XRtcPsu_InterruptHandler() for updating RTC
+*                       read and write time logic(cr#948833).
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xrtcpsu.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions ****************************/
+
+/****************************************************************************/
+/**
+*
+* This function sets the interrupt mask.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance
+* @param	Mask contains the interrupts to be enabled.
+*		A '1' enables an interupt, and a '0' disables.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XRtcPsu_SetInterruptMask(XRtcPsu *InstancePtr, u32 Mask)
+{
+	/*
+	 * Clear the Status register to be sure of no pending interrupts.
+	 * Writing mask values to interrupt bits as it is a WTC register.
+	 */
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_INT_STS_OFFSET,
+			((u32)XRTC_INT_STS_ALRM_MASK | (u32)XRTC_INT_STS_SECS_MASK));
+
+	/*
+	 * XRTC_INT_MSK_RSTVAL contains the valid interrupts
+	 * for the RTC device. The AND operation on Mask makes sure one
+	 * of the valid bits are only set.
+	 */
+
+	/* Write the mask to the IER Register */
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr+XRTC_INT_EN_OFFSET,
+					(Mask & (u32)XRTC_INT_MSK_RSTVAL));
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function clears the interrupt mask.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance
+* @param	Mask contains the interrupts to be disabled.
+*		A '1' enables an interrupt, and a '0' disables.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XRtcPsu_ClearInterruptMask(XRtcPsu *InstancePtr, u32 Mask)
+{
+	/*
+	 * XRTC_INT_MSK_RSTVAL contains the valid interrupts
+	 * for the RTC device. The AND operation on mask makes sure one
+	 * of the valid bits are only cleared.
+	 */
+
+	/* Write the Mask to the IDR register */
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr+XRTC_INT_DIS_OFFSET,
+					(Mask & (u32)XRTC_INT_MSK_RSTVAL));
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the handler that will be called when an event (interrupt)
+* occurs that needs application's attention.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance
+* @param	FuncPtr is the pointer to the callback function.
+* @param	CallBackRef is the upper layer callback reference passed back
+*		when the callback function is invoked.
+*
+* @return	None.
+*
+* @note
+*
+* There is no assert on the CallBackRef since the driver doesn't know what it
+* is (nor should it)
+*
+*****************************************************************************/
+void XRtcPsu_SetHandler(XRtcPsu *InstancePtr, XRtcPsu_Handler FuncPtr,
+		 void *CallBackRef)
+{
+	/*
+	 * Asserts validate the input arguments
+	 * CallBackRef not checked, no way to know what is valid
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(FuncPtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	InstancePtr->Handler = FuncPtr;
+	InstancePtr->CallBackRef = CallBackRef;
+}
+
+/****************************************************************************/
+/**
+*
+* This function is the interrupt handler for the driver.
+* It must be connected to an interrupt system by the application such that it
+* can be called when an interrupt occurs.
+*
+* @param	InstancePtr contains a pointer to the driver instance
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XRtcPsu_InterruptHandler(XRtcPsu *InstancePtr)
+{
+	u32 IsrStatus;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read the interrupt ID register to determine which
+	 * interrupt is active.
+	 */
+	IsrStatus = ~(XRtcPsu_ReadReg(InstancePtr->RtcConfig.BaseAddr +
+			XRTC_INT_MSK_OFFSET));
+
+	IsrStatus &= XRtcPsu_ReadReg(InstancePtr->RtcConfig.BaseAddr +
+			XRTC_INT_STS_OFFSET);
+
+	/*
+	 * Clear the interrupt status to allow future
+	 * interrupts before this generated interrupt is serviced.
+	 */
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr +
+			XRTC_INT_STS_OFFSET, IsrStatus);
+
+	/* Handle the generated interrupts appropriately. */
+
+	/* Alarm interrupt */
+	if((IsrStatus & XRTC_INT_STS_ALRM_MASK) != (u32)0) {
+
+		if(InstancePtr->IsPeriodicAlarm != 0U) {
+			XRtcPsu_SetAlarm(InstancePtr,
+					(XRtcPsu_GetCurrentTime(InstancePtr)+InstancePtr->PeriodicAlarmTime),1U);
+		}
+
+		/*
+		 * Call the application handler to indicate that there is an
+		 * alarm interrupt. If the application cares about this alarm,
+		 * it will act accordingly through its own handler.
+		 */
+		InstancePtr->Handler(InstancePtr->CallBackRef,
+					XRTCPSU_EVENT_ALARM_GEN);
+	}
+
+	/* Seconds interrupt */
+	if((IsrStatus & XRTC_INT_STS_SECS_MASK) != (u32)0) {
+		/* Set the CurrTimeUpdated flag to 1 */
+		InstancePtr->CurrTimeUpdated = 1;
+
+		if(InstancePtr->TimeUpdated == (u32)1) {
+			/* Clear the TimeUpdated */
+			InstancePtr->TimeUpdated = (u32)0;
+		}
+
+		/*
+		 * Call the application handler to indicate that there is an
+		 * seconds interrupt. If the application cares about this seconds
+		 * interrupt, it will act accordingly through its own handler.
+		 */
+		InstancePtr->Handler(InstancePtr->CallBackRef,
+					XRTCPSU_EVENT_SECS_GEN);
+	}
+
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_selftest.c b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_selftest.c
new file mode 100644
index 0000000..2678d81
--- /dev/null
+++ b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_selftest.c
@@ -0,0 +1,112 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xrtcpsu_selftest.c
+* @addtogroup rtcpsu_v1_5
+* @{
+*
+* This file contains the self-test functions for the XRtcPsu driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00  kvn    04/21/15 First release.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xrtcpsu.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/****************************************************************************/
+/**
+*
+* This function runs a self-test on the driver and hardware device. This self
+* test writes reset value into safety check register and read backs the same.
+* If mismatch offers, returns the failure.
+*
+* @param	InstancePtr is a pointer to the XRtcPsu instance
+*
+* @return
+*		 - XST_SUCCESS if the test was successful
+*
+* @note
+*
+* This function can hang if the hardware is not functioning properly.
+*
+******************************************************************************/
+s32 XRtcPsu_SelfTest(XRtcPsu *InstancePtr)
+{
+	s32 Status = XST_SUCCESS;
+	u32 SafetyCheck;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Write the reset value in safety check register and
+	 * try reading back. If mismatch happens, return failure.
+	 */
+	XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_SFTY_CHK_OFFSET,
+			XRTC_SFTY_CHK_RSTVAL);
+	SafetyCheck = XRtcPsu_ReadReg(InstancePtr->RtcConfig.BaseAddr +
+			XRTC_SFTY_CHK_OFFSET);
+
+	if (SafetyCheck != XRTC_SFTY_CHK_RSTVAL) {
+		Status = XST_FAILURE;
+	}
+
+	return Status;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_sinit.c b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_sinit.c
new file mode 100644
index 0000000..32ea4e5
--- /dev/null
+++ b/src/Xilinx/libsrc/rtcpsu_v1_5/src/xrtcpsu_sinit.c
@@ -0,0 +1,102 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xrtcpsu_sinit.c
+* @addtogroup rtcpsu_v1_5
+* @{
+*
+* This file contains the implementation of the XRtcPsu driver's static
+* initialization functionality.
+*
+* @note		None.
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00  kvn    04/21/15 First release.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xrtcpsu.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+extern XRtcPsu_Config XRtcPsu_ConfigTable[];
+
+/*****************************************************************************/
+/**
+*
+* This function looks for the device configuration based on the unique device
+* ID. The table XRtcPsu_ConfigTable[] contains the configuration information for
+* each device in the system.
+*
+* @param	DeviceId is the unique device ID of the device being looked up.
+*
+* @return	A pointer to the configuration table entry corresponding to the
+*		given device ID, or NULL if no match is found.
+*
+* @note		None.
+*
+******************************************************************************/
+XRtcPsu_Config *XRtcPsu_LookupConfig(u16 DeviceId)
+{
+	XRtcPsu_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index = 0U; Index < (u32)XPAR_XRTCPSU_NUM_INSTANCES; Index++) {
+		if (XRtcPsu_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XRtcPsu_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XRtcPsu_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/scugic_v3_9/src/Makefile b/src/Xilinx/libsrc/scugic_v3_9/src/Makefile
new file mode 100644
index 0000000..04867a4
--- /dev/null
+++ b/src/Xilinx/libsrc/scugic_v3_9/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner scugic_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling scugic"
+
+scugic_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: scugic_includes
+
+scugic_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/scugic_v3_9/src/xscugic.c b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic.c
new file mode 100644
index 0000000..f6afc0e
--- /dev/null
+++ b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic.c
@@ -0,0 +1,1020 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2018 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xscugic.c
+* @addtogroup scugic_v3_8
+* @{
+*
+* Contains required functions for the XScuGic driver for the Interrupt
+* Controller. See xscugic.h for a detailed description of the driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- --------------------------------------------------------
+* 1.00a drg  01/19/10 First release
+* 1.01a sdm  11/09/11 Changes are made in function XScuGic_CfgInitialize. Since
+*		      		  "Config" entry is now made as pointer in the XScuGic
+*		      		  structure, necessary changes are made.
+*		      		  The HandlerTable can now be populated through the low
+*		      		  level routine XScuGic_RegisterHandler added in this
+*		      		  release. Hence necessary checks are added not to
+*		      		  overwrite the HandlerTable entriesin function
+*		      		  XScuGic_CfgInitialize.
+* 1.03a srt  02/27/13 Added APIs
+*					  - XScuGic_SetPriTrigTypeByDistAddr()
+*					  - XScuGic_GetPriTrigTypeByDistAddr()
+* 		    		  Removed Offset calculation macros, defined in _hw.h
+*		      		  (CR 702687)
+*			  		  Added support to direct interrupts to the appropriate CPU. Earlier
+*			  		  interrupts were directed to CPU1 (hard coded). Now depending
+*			  		  upon the CPU selected by the user (xparameters.h), interrupts
+*			  		  will be directed to the relevant CPU. This fixes CR 699688.
+*
+* 1.04a hk   05/04/13 Assigned EffectiveAddr to CpuBaseAddress in
+*			  		  XScuGic_CfgInitialize. Fix for CR#704400 to remove warnings.
+*			  		  Moved functions XScuGic_SetPriTrigTypeByDistAddr and
+*             		  XScuGic_GetPriTrigTypeByDistAddr to xscugic_hw.c.
+*			  		  This is fix for CR#705621.
+* 1.06a asa  16/11/13 Fix for CR#749178. Assignment for EffectiveAddr
+*			  		  in function XScuGic_CfgInitialize is removed as it was
+*		      		  a bug.
+* 3.00  kvn  02/13/14 Modified code for MISRA-C:2012 compliance.
+* 3.01	pkp	 06/19/15 Added XScuGic_InterruptMaptoCpu API for an interrupt
+*			  		  target CPU mapping
+* 3.02	pkp	 11/09/15 Modified DistributorInit function for AMP case to add
+*					  the current cpu to interrupt processor targets registers
+* 3.2   asa  02/29/16 Modified DistributorInit function for Zynq AMP case. The
+*			  		  distributor is left uninitialized for Zynq AMP. It is assumed
+*             		  that the distributor will be initialized by Linux master. However
+*             		  for CortexR5 case, the earlier code is left unchanged where the
+*             		  the interrupt processor target registers in the distributor is
+*             		  initialized with the corresponding CPU ID on which the application
+*             		  built over the scugic driver runs.
+*             		  These changes fix CR#937243.
+* 3.3	pkp  05/12/16 Modified XScuGic_InterruptMaptoCpu to write proper value
+*					  to interrupt target register to fix CR#951848
+*
+* 3.4   asa  04/07/16 Created a new static function DoDistributorInit to simplify
+*                     the flow and avoid code duplication. Changes are made for
+*                     USE_AMP use case for R5. In a scenario (in R5 split mode) when
+*                     one R5 is operating with A53 in open amp config and other
+*                     R5 running baremetal app, the existing code
+*                     had the potential to stop the whole AMP solution to work (if
+*                     for some reason the R5 running the baremetal app tasked to
+*                     initialize the Distributor hangs or crashes before initializing).
+*                     Changes are made so that the R5 under AMP first checks if
+*                     the distributor is enabled or not and if not, it does the
+*                     standard Distributor initialization.
+*                     This fixes the CR#952962.
+* 3.4   mus  09/08/16 Added assert to avoid invalid access of GIC from CPUID 1
+*                     for single core zynq-7000s
+* 3.5   mus  10/05/16 Modified DistributorInit function to avoid re-initialization of
+*                     distributor,If it is already initialized by other CPU.
+* 3.5	pkp	 10/17/16 Modified XScuGic_InterruptMaptoCpu to correct the CPU Id value
+*					  and properly mask interrupt target processor value to modify
+*					  interrupt target processor register for a given interrupt ID
+*					  and cpu ID
+* 3.6	pkp	 20/01/17 Added new API XScuGic_Stop to Disable distributor and
+*					  interrupts in case they are being used only by current cpu.
+*					  It also removes current cpu from interrupt target registers
+*					  for all interrupts.
+*       kvn  02/17/17 Add support for changing GIC CPU master at run time.
+*       kvn  02/28/17 Make the CpuId as static variable and Added new
+*                     XScugiC_GetCpuId to access CpuId.
+* 3.9   mus  02/21/18 Added new API's XScuGic_UnmapAllInterruptsFromCpu and
+*                     XScuGic_InterruptUnmapFromCpu, These API's can be used
+*                     by applications to unmap specific/all interrupts from
+*                     target CPU. It fixes CR#992490.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xscugic.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+static u32 CpuId = XPAR_CPU_ID; /**< CPU Core identifier */
+
+/************************** Function Prototypes ******************************/
+
+static void StubHandler(void *CallBackRef);
+
+/*****************************************************************************/
+/**
+*
+* DoDistributorInit initializes the distributor of the GIC. The
+* initialization entails:
+*
+* - Write the trigger mode, priority and target CPU
+* - All interrupt sources are disabled
+* - Enable the distributor
+*
+* @param	InstancePtr is a pointer to the XScuGic instance.
+* @param	CpuID is the Cpu ID to be initialized.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static void DoDistributorInit(XScuGic *InstancePtr, u32 CpuID)
+{
+	u32 Int_Id;
+	u32 LocalCpuID = CpuID;
+
+	XScuGic_DistWriteReg(InstancePtr, XSCUGIC_DIST_EN_OFFSET, 0U);
+
+	/*
+	 * Set the security domains in the int_security registers for
+	 * non-secure interrupts
+	 * All are secure, so leave at the default. Set to 1 for non-secure
+	 * interrupts.
+	 */
+
+	/*
+	 * For the Shared Peripheral Interrupts INT_ID[MAX..32], set:
+	 */
+
+	/*
+	 * 1. The trigger mode in the int_config register
+	 * Only write to the SPI interrupts, so start at 32
+	 */
+	for (Int_Id = 32U; Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS; Int_Id=Int_Id+16U) {
+		/*
+		 * Each INT_ID uses two bits, or 16 INT_ID per register
+		 * Set them all to be level sensitive, active HIGH.
+		 */
+		XScuGic_DistWriteReg(InstancePtr,
+					XSCUGIC_INT_CFG_OFFSET_CALC(Int_Id),
+					0U);
+	}
+
+
+#define DEFAULT_PRIORITY    0xa0a0a0a0U
+	for (Int_Id = 0U; Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS; Int_Id=Int_Id+4U) {
+		/*
+		 * 2. The priority using int the priority_level register
+		 * The priority_level and spi_target registers use one byte per
+		 * INT_ID.
+		 * Write a default value that can be changed elsewhere.
+		 */
+		XScuGic_DistWriteReg(InstancePtr,
+					XSCUGIC_PRIORITY_OFFSET_CALC(Int_Id),
+					DEFAULT_PRIORITY);
+	}
+
+	for (Int_Id = 32U; Int_IdBaseAddress for this parameters, passing the physical
+*		address instead.
+*
+* @return
+*		- XST_SUCCESS if initialization was successful
+*
+* @note		None.
+*
+******************************************************************************/
+s32  XScuGic_CfgInitialize(XScuGic *InstancePtr,
+				XScuGic_Config *ConfigPtr,
+				u32 EffectiveAddr)
+{
+	u32 Int_Id;
+	u32 Cpu_Id = CpuId + (u32)1;
+	(void) EffectiveAddr;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+	/*
+     * Detect Zynq-7000 base silicon configuration,Dual or Single CPU.
+     * If it is single CPU cnfiguration then invoke assert for CPU ID=1
+	 */
+#ifdef ARMA9
+	if ( XPAR_CPU_ID == 0x01 )
+	{
+		Xil_AssertNonvoid((Xil_In32(XPS_EFUSE_BASEADDR + EFUSE_STATUS_OFFSET)
+		 & EFUSE_STATUS_CPU_MASK ) == 0);
+	}
+#endif
+
+	if(InstancePtr->IsReady != XIL_COMPONENT_IS_READY) {
+
+		InstancePtr->IsReady = 0U;
+		InstancePtr->Config = ConfigPtr;
+
+
+		for (Int_Id = 0U; Int_IdConfig->HandlerTable[Int_Id].Handler == NULL)) {
+				InstancePtr->Config->HandlerTable[Int_Id].Handler =
+									StubHandler;
+			}
+			InstancePtr->Config->HandlerTable[Int_Id].CallBackRef =
+								InstancePtr;
+		}
+		XScuGic_Stop(InstancePtr);
+		DistributorInit(InstancePtr, Cpu_Id);
+		CPUInitialize(InstancePtr);
+
+		InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+	}
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* Makes the connection between the Int_Id of the interrupt source and the
+* associated handler that is to run when the interrupt is recognized. The
+* argument provided in this call as the Callbackref is used as the argument
+* for the handler when it is called.
+*
+* @param	InstancePtr is a pointer to the XScuGic instance.
+* @param	Int_Id contains the ID of the interrupt source and should be
+*		in the range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
+* @param	Handler to the handler for that interrupt.
+* @param	CallBackRef is the callback reference, usually the instance
+*		pointer of the connecting driver.
+*
+* @return
+*
+*		- XST_SUCCESS if the handler was connected correctly.
+*
+* @note
+*
+* WARNING: The handler provided as an argument will overwrite any handler
+* that was previously connected.
+*
+****************************************************************************/
+s32  XScuGic_Connect(XScuGic *InstancePtr, u32 Int_Id,
+                      Xil_InterruptHandler Handler, void *CallBackRef)
+{
+	/*
+	 * Assert the arguments
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS);
+	Xil_AssertNonvoid(Handler != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * The Int_Id is used as an index into the table to select the proper
+	 * handler
+	 */
+	InstancePtr->Config->HandlerTable[Int_Id].Handler = Handler;
+	InstancePtr->Config->HandlerTable[Int_Id].CallBackRef = CallBackRef;
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* Updates the interrupt table with the Null Handler and NULL arguments at the
+* location pointed at by the Int_Id. This effectively disconnects that interrupt
+* source from any handler. The interrupt is disabled also.
+*
+* @param	InstancePtr is a pointer to the XScuGic instance to be worked on.
+* @param	Int_Id contains the ID of the interrupt source and should
+*		be in the range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XScuGic_Disconnect(XScuGic *InstancePtr, u32 Int_Id)
+{
+	u32 Mask;
+
+	/*
+	 * Assert the arguments
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * The Int_Id is used to create the appropriate mask for the
+	 * desired bit position. Int_Id currently limited to 0 - 31
+	 */
+	Mask = 0x00000001U << (Int_Id % 32U);
+
+	/*
+	 * Disable the interrupt such that it won't occur while disconnecting
+	 * the handler, only disable the specified interrupt id without modifying
+	 * the other interrupt ids
+	 */
+	XScuGic_DistWriteReg(InstancePtr, (u32)XSCUGIC_DISABLE_OFFSET +
+						((Int_Id / 32U) * 4U), Mask);
+
+	/*
+	 * Disconnect the handler and connect a stub, the callback reference
+	 * must be set to this instance to allow unhandled interrupts to be
+	 * tracked
+	 */
+	InstancePtr->Config->HandlerTable[Int_Id].Handler = StubHandler;
+	InstancePtr->Config->HandlerTable[Int_Id].CallBackRef = InstancePtr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Enables the interrupt source provided as the argument Int_Id. Any pending
+* interrupt condition for the specified Int_Id will occur after this function is
+* called.
+*
+* @param	InstancePtr is a pointer to the XScuGic instance.
+* @param	Int_Id contains the ID of the interrupt source and should be
+*		in the range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XScuGic_Enable(XScuGic *InstancePtr, u32 Int_Id)
+{
+	u32 Mask;
+
+	/*
+	 * Assert the arguments
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * The Int_Id is used to create the appropriate mask for the
+	 * desired bit position. Int_Id currently limited to 0 - 31
+	 */
+	Mask = 0x00000001U << (Int_Id % 32U);
+
+	/*
+	 * Enable the selected interrupt source by setting the
+	 * corresponding bit in the Enable Set register.
+	 */
+	XScuGic_DistWriteReg(InstancePtr, (u32)XSCUGIC_ENABLE_SET_OFFSET +
+						((Int_Id / 32U) * 4U), Mask);
+}
+
+/*****************************************************************************/
+/**
+*
+* Disables the interrupt source provided as the argument Int_Id such that the
+* interrupt controller will not cause interrupts for the specified Int_Id. The
+* interrupt controller will continue to hold an interrupt condition for the
+* Int_Id, but will not cause an interrupt.
+*
+* @param	InstancePtr is a pointer to the XScuGic instance.
+* @param	Int_Id contains the ID of the interrupt source and should be
+*		in the range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XScuGic_Disable(XScuGic *InstancePtr, u32 Int_Id)
+{
+	u32 Mask;
+
+	/*
+	 * Assert the arguments
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * The Int_Id is used to create the appropriate mask for the
+	 * desired bit position. Int_Id currently limited to 0 - 31
+	 */
+	Mask = 0x00000001U << (Int_Id % 32U);
+
+	/*
+	 * Disable the selected interrupt source by setting the
+	 * corresponding bit in the IDR.
+	 */
+	XScuGic_DistWriteReg(InstancePtr, (u32)XSCUGIC_DISABLE_OFFSET +
+						((Int_Id / 32U) * 4U), Mask);
+}
+
+/*****************************************************************************/
+/**
+*
+* Allows software to simulate an interrupt in the interrupt controller.  This
+* function will only be successful when the interrupt controller has been
+* started in simulation mode.  A simulated interrupt allows the interrupt
+* controller to be tested without any device to drive an interrupt input
+* signal into it.
+*
+* @param	InstancePtr is a pointer to the XScuGic instance.
+* @param	Int_Id is the software interrupt ID to simulate an interrupt.
+* @param	Cpu_Id is the list of CPUs to send the interrupt.
+*
+* @return
+*
+* XST_SUCCESS if successful, or XST_FAILURE if the interrupt could not be
+* simulated
+*
+* @note		None.
+*
+******************************************************************************/
+s32  XScuGic_SoftwareIntr(XScuGic *InstancePtr, u32 Int_Id, u32 Cpu_Id)
+{
+	u32 Mask;
+
+	/*
+	 * Assert the arguments
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(Int_Id <= 15U) ;
+	Xil_AssertNonvoid(Cpu_Id <= 255U) ;
+
+
+	/*
+	 * The Int_Id is used to create the appropriate mask for the
+	 * desired interrupt. Int_Id currently limited to 0 - 15
+	 * Use the target list for the Cpu ID.
+	 */
+	Mask = ((Cpu_Id << 16U) | Int_Id) &
+		(XSCUGIC_SFI_TRIG_CPU_MASK | XSCUGIC_SFI_TRIG_INTID_MASK);
+
+	/*
+	 * Write to the Software interrupt trigger register. Use the appropriate
+	 * CPU Int_Id.
+	 */
+	XScuGic_DistWriteReg(InstancePtr, XSCUGIC_SFI_TRIG_OFFSET, Mask);
+
+	/* Indicate the interrupt was successfully simulated */
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* A stub for the asynchronous callback. The stub is here in case the upper
+* layers forget to set the handler.
+*
+* @param	CallBackRef is a pointer to the upper layer callback reference
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void StubHandler(void *CallBackRef) {
+	/*
+	 * verify that the inputs are valid
+	 */
+	Xil_AssertVoid(CallBackRef != NULL);
+
+	/*
+	 * Indicate another unhandled interrupt for stats
+	 */
+	((XScuGic *)((void *)CallBackRef))->UnhandledInterrupts++;
+}
+
+/****************************************************************************/
+/**
+* Sets the interrupt priority and trigger type for the specificd IRQ source.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Int_Id is the IRQ source number to modify
+* @param	Priority is the new priority for the IRQ source. 0 is highest
+* 			priority, 0xF8 (248) is lowest. There are 32 priority levels
+*			supported with a step of 8. Hence the supported priorities are
+*			0, 8, 16, 32, 40 ..., 248.
+* @param	Trigger is the new trigger type for the IRQ source.
+* Each bit pair describes the configuration for an INT_ID.
+* SFI    Read Only    b10 always
+* PPI    Read Only    depending on how the PPIs are configured.
+*                    b01    Active HIGH level sensitive
+*                    b11 Rising edge sensitive
+* SPI                LSB is read only.
+*                    b01    Active HIGH level sensitive
+*                    b11 Rising edge sensitive/
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XScuGic_SetPriorityTriggerType(XScuGic *InstancePtr, u32 Int_Id,
+					u8 Priority, u8 Trigger)
+{
+	u32 RegValue;
+	u8 LocalPriority;
+	LocalPriority = Priority;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS);
+	Xil_AssertVoid(Trigger <= (u8)XSCUGIC_INT_CFG_MASK);
+	Xil_AssertVoid(LocalPriority <= (u8)XSCUGIC_MAX_INTR_PRIO_VAL);
+
+	/*
+	 * Determine the register to write to using the Int_Id.
+	 */
+	RegValue = XScuGic_DistReadReg(InstancePtr,
+			XSCUGIC_PRIORITY_OFFSET_CALC(Int_Id));
+
+	/*
+	 * The priority bits are Bits 7 to 3 in GIC Priority Register. This
+	 * means the number of priority levels supported are 32 and they are
+	 * in steps of 8. The priorities can be 0, 8, 16, 32, 48, ... etc.
+	 * The lower order 3 bits are masked before putting it in the register.
+	 */
+	LocalPriority = LocalPriority & (u8)XSCUGIC_INTR_PRIO_MASK;
+	/*
+	 * Shift and Mask the correct bits for the priority and trigger in the
+	 * register
+	 */
+	RegValue &= ~(XSCUGIC_PRIORITY_MASK << ((Int_Id%4U)*8U));
+	RegValue |= (u32)LocalPriority << ((Int_Id%4U)*8U);
+
+	/*
+	 * Write the value back to the register.
+	 */
+	XScuGic_DistWriteReg(InstancePtr, XSCUGIC_PRIORITY_OFFSET_CALC(Int_Id),
+				RegValue);
+
+	/*
+	 * Determine the register to write to using the Int_Id.
+	 */
+	RegValue = XScuGic_DistReadReg(InstancePtr,
+			XSCUGIC_INT_CFG_OFFSET_CALC (Int_Id));
+
+	/*
+	 * Shift and Mask the correct bits for the priority and trigger in the
+	 * register
+	 */
+	RegValue &= ~(XSCUGIC_INT_CFG_MASK << ((Int_Id%16U)*2U));
+	RegValue |= (u32)Trigger << ((Int_Id%16U)*2U);
+
+	/*
+	 * Write the value back to the register.
+	 */
+	XScuGic_DistWriteReg(InstancePtr, XSCUGIC_INT_CFG_OFFSET_CALC(Int_Id),
+				RegValue);
+
+}
+
+/****************************************************************************/
+/**
+* Gets the interrupt priority and trigger type for the specificd IRQ source.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Int_Id is the IRQ source number to modify
+* @param	Priority is a pointer to the value of the priority of the IRQ
+*		source. This is a return value.
+* @param	Trigger is pointer to the value of the trigger of the IRQ
+*		source. This is a return value.
+*
+* @return	None.
+*
+* @note		None
+*
+*****************************************************************************/
+void XScuGic_GetPriorityTriggerType(XScuGic *InstancePtr, u32 Int_Id,
+					u8 *Priority, u8 *Trigger)
+{
+	u32 RegValue;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS);
+	Xil_AssertVoid(Priority != NULL);
+	Xil_AssertVoid(Trigger != NULL);
+
+	/*
+	 * Determine the register to read to using the Int_Id.
+	 */
+	RegValue = XScuGic_DistReadReg(InstancePtr,
+	    XSCUGIC_PRIORITY_OFFSET_CALC(Int_Id));
+
+	/*
+	 * Shift and Mask the correct bits for the priority and trigger in the
+	 * register
+	 */
+	RegValue = RegValue >> ((Int_Id%4U)*8U);
+	*Priority = (u8)(RegValue & XSCUGIC_PRIORITY_MASK);
+
+	/*
+	 * Determine the register to read to using the Int_Id.
+	 */
+	RegValue = XScuGic_DistReadReg(InstancePtr,
+	XSCUGIC_INT_CFG_OFFSET_CALC (Int_Id));
+
+	/*
+	 * Shift and Mask the correct bits for the priority and trigger in the
+	 * register
+	 */
+	RegValue = RegValue >> ((Int_Id%16U)*2U);
+
+	*Trigger = (u8)(RegValue & XSCUGIC_INT_CFG_MASK);
+}
+/****************************************************************************/
+/**
+* Sets the target CPU for the interrupt of a peripheral
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Cpu_Id is a CPU number for which the interrupt has to be targeted
+* @param	Int_Id is the IRQ source number to modify
+*
+* @return	None.
+*
+* @note		None
+*
+*****************************************************************************/
+void XScuGic_InterruptMaptoCpu(XScuGic *InstancePtr, u8 Cpu_Id, u32 Int_Id)
+{
+	u32 RegValue, Offset;
+	RegValue = XScuGic_DistReadReg(InstancePtr,
+			XSCUGIC_SPI_TARGET_OFFSET_CALC(Int_Id));
+
+	Offset = (Int_Id & 0x3U);
+	Cpu_Id = (0x1U << Cpu_Id);
+
+	RegValue = (RegValue & (~(0xFFU << (Offset*8U))) );
+	RegValue |= ((Cpu_Id) << (Offset*8U));
+
+	XScuGic_DistWriteReg(InstancePtr,
+						 XSCUGIC_SPI_TARGET_OFFSET_CALC(Int_Id),
+						 RegValue);
+}
+/****************************************************************************/
+/**
+* Unmaps specific SPI interrupt from the target CPU
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Cpu_Id is a CPU number from which the interrupt has to be
+*			unmapped
+* @param	Int_Id is the IRQ source number to modify
+*
+* @return	None.
+*
+* @note		None
+*
+*****************************************************************************/
+void XScuGic_InterruptUnmapFromCpu(XScuGic *InstancePtr, u8 Cpu_Id, u32 Int_Id)
+{
+	u32 RegValue;
+	u8 BitPos;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	RegValue = XScuGic_DistReadReg(InstancePtr,
+				XSCUGIC_SPI_TARGET_OFFSET_CALC(Int_Id));
+
+	/*
+	 * Identify bit position corresponding to  Int_Id and Cpu_Id,
+	 * in interrupt target register and clear it
+	 */
+	BitPos = ((Int_Id % 4U) * 8U) + Cpu_Id;
+	RegValue &= (~ ( 1U << BitPos ));
+	XScuGic_DistWriteReg(InstancePtr,
+				XSCUGIC_SPI_TARGET_OFFSET_CALC(Int_Id),
+				RegValue);
+}
+/****************************************************************************/
+/**
+* Unmaps all SPI interrupts from the target CPU
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Cpu_Id is a CPU number from which the interrupts has to be
+*			unmapped
+*
+* @return	None.
+*
+* @note		None
+*
+*****************************************************************************/
+void XScuGic_UnmapAllInterruptsFromCpu(XScuGic *InstancePtr, u8 Cpu_Id)
+{
+	u32 Int_Id;
+	u32 Target_Cpu;
+	u32 LocalCpuID = (1U << Cpu_Id);
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	LocalCpuID |= LocalCpuID << 8U;
+	LocalCpuID |= LocalCpuID << 16U;
+
+	for (Int_Id = 32U; Int_IdInterrupt Vector Tables
+*
+* The device ID of the interrupt controller device is used by the driver as a
+* direct index into the configuration data table. The user should populate the
+* vector table with handlers and callbacks at run-time using the
+* XScuGic_Connect() and XScuGic_Disconnect() functions.
+*
+* Each vector table entry corresponds to a device that can generate an
+* interrupt. Each entry contains an interrupt handler function and an
+* argument to be passed to the handler when an interrupt occurs.  The
+* user must use XScuGic_Connect() when the interrupt handler takes an
+* argument other than the base address.
+*
+* Nested Interrupts Processing
+*
+* Nested interrupts are not supported by this driver.
+*
+* NOTE:
+* The generic interrupt controller is not a part of the snoop control unit
+* as indicated by the prefix "scu" in the name of the driver.
+* It is an independent module in APU.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------------
+* 1.00a drg  01/19/00 First release
+* 1.01a sdm  11/09/11 The XScuGic and XScuGic_Config structures have changed.
+*		      The HandlerTable (of type XScuGic_VectorTableEntry) is
+*		      moved to XScuGic_Config structure from XScuGic structure.
+*
+*		      The "Config" entry in XScuGic structure is made as
+*		      pointer for better efficiency.
+*
+*		      A new file named as xscugic_hw.c is now added. It is
+*		      to implement low level driver routines without using
+*		      any xscugic instance pointer. They are useful when the
+*		      user wants to use xscugic through device id or
+*		      base address. The driver routines provided are explained
+*		      below.
+*		      XScuGic_DeviceInitialize that takes device id as
+*		      argument and initializes the device (without calling
+*		      XScuGic_CfgInitialize).
+*		      XScuGic_DeviceInterruptHandler that takes device id
+*		      as argument and calls appropriate handlers from the
+*		      HandlerTable.
+*		      XScuGic_RegisterHandler that registers a new handler
+*		      by taking xscugic hardware base address as argument.
+*		      LookupConfigByBaseAddress is used to return the
+*		      corresponding config structure from XScuGic_ConfigTable
+*		      based on the scugic base address passed.
+* 1.02a sdm  12/20/11 Removed AckBeforeService from the XScuGic_Config
+*		      structure.
+* 1.03a srt  02/27/13 Moved Offset calculation macros from *.c and *_hw.c to
+*		      *_hw.h
+*		      Added APIs
+*			- XScuGic_SetPriTrigTypeByDistAddr()
+*			- XScuGic_GetPriTrigTypeByDistAddr()
+*		      (CR 702687)
+*			Added support to direct interrupts to the appropriate CPU. Earlier
+*			  interrupts were directed to CPU1 (hard coded). Now depending
+*			  upon the CPU selected by the user (xparameters.h), interrupts
+*			  will be directed to the relevant CPU. This fixes CR 699688.
+* 1.04a hk   05/04/13 Assigned EffectiveAddr to CpuBaseAddress in
+*			  XScuGic_CfgInitialize. Fix for CR#704400 to remove warnings.
+*			  Moved functions XScuGic_SetPriTrigTypeByDistAddr and
+*             XScuGic_GetPriTrigTypeByDistAddr to xscugic_hw.c.
+*			  This is fix for CR#705621.
+* 1.05a hk   06/26/13 Modified tcl to export external interrupts correctly to
+*                     xparameters.h. Fix for CR's 690505, 708928 & 719359.
+* 2.0   adk  12/10/13 Updated as per the New Tcl API's
+* 2.1   adk  25/04/14 Fixed the CR:789373 changes are made in the driver tcl file.
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.2   asa  02/29/16 Modified DistributorInit function for Zynq AMP case. The
+*			  distributor is left uninitialized for Zynq AMP. It is assumed
+*             that the distributor will be initialized by Linux master. However
+*             for CortexR5 case, the earlier code is left unchanged where the
+*             the interrupt processor target registers in the distributor is
+*             initialized with the corresponding CPU ID on which the application
+*             built over the scugic driver runs.
+*             These changes fix CR#937243.
+*
+* 3.4   asa  04/07/16 Created a new static function DoDistributorInit to simplify
+*            the flow and avoid code duplication. Changes are made for
+*            USE_AMP use case for R5. In a scenario (in R5 split mode) when
+*            one R5 is operating with A53 in open amp config and other
+*            R5 running baremetal app, the existing code
+*            had the potential to stop the whole AMP solution to work (if
+*            for some reason the R5 running the baremetal app tasked to
+*            initialize the Distributor hangs or crashes before initializing).
+*            Changes are made so that the R5 under AMP first checks if
+*            the distributor is enabled or not and if not, it does the
+*            standard Distributor initialization.
+*            This fixes the CR#952962.
+* 3.6   ms   01/23/17 Modified xil_printf statement in main function for all
+*                     examples to ensure that "Successfully ran" and "Failed"
+*                     strings are available in all examples. This is a fix
+*                     for CR-965028.
+*       kvn  02/17/17 Add support for changing GIC CPU master at run time.
+*       kvn  02/28/17 Make the CpuId as static variable and Added new
+*                     XScugiC_GetCpuId to access CpuId.
+*       ms   03/17/17 Added readme.txt file in examples folder for doxygen
+*                     generation.
+* 3.7   ms   04/11/17 Modified tcl file to add suffix U for all macro
+*                     definitions of scugic in xparameters.h
+* 3.8   mus  07/05/17 Updated scugic.tcl to add support for intrrupts connected
+*                     through util_reduced_vector IP(OR gate)
+*       mus  07/05/17 Updated xdefine_zynq_canonical_xpars proc to initialize
+*                     the HandlerTable in XScuGic_ConfigTable to 0, it removes
+*                     the compilation warning in xscugic_g.c. Fix for CR#978736.
+*       mus  07/25/17 Updated xdefine_gic_params proc to export correct canonical
+*                     definitions for pl to ps interrupts.Fix for CR#980534
+* 3.9   mus  02/21/18 Added new API's XScuGic_UnmapAllInterruptsFromCpu and
+*                     XScuGic_InterruptUnmapFromCpu, These API's can be used
+*                     by applications to unmap specific/all interrupts from
+*                     target CPU.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XSCUGIC_H /* prevent circular inclusions */
+#define XSCUGIC_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xil_io.h"
+#include "xscugic_hw.h"
+#include "xil_exception.h"
+
+/************************** Constant Definitions *****************************/
+
+#define EFUSE_STATUS_OFFSET   0x10
+#define EFUSE_STATUS_CPU_MASK 0x80
+
+#if !defined (ARMR5) && !defined (__aarch64__) && !defined (ARMA53_32)
+#define ARMA9
+#endif
+/**************************** Type Definitions *******************************/
+
+/* The following data type defines each entry in an interrupt vector table.
+ * The callback reference is the base address of the interrupting device
+ * for the low level driver and an instance pointer for the high level driver.
+ */
+typedef struct
+{
+	Xil_InterruptHandler Handler;
+	void *CallBackRef;
+} XScuGic_VectorTableEntry;
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct
+{
+	u16 DeviceId;		/**< Unique ID  of device */
+	u32 CpuBaseAddress;	/**< CPU Interface Register base address */
+	u32 DistBaseAddress;	/**< Distributor Register base address */
+	XScuGic_VectorTableEntry HandlerTable[XSCUGIC_MAX_NUM_INTR_INPUTS];/**<
+				 Vector table of interrupt handlers */
+} XScuGic_Config;
+
+/**
+ * The XScuGic driver instance data. The user is required to allocate a
+ * variable of this type for every intc device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct
+{
+	XScuGic_Config *Config;  /**< Configuration table entry */
+	u32 IsReady;		 /**< Device is initialized and ready */
+	u32 UnhandledInterrupts; /**< Intc Statistics */
+} XScuGic;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* Write the given CPU Interface register
+*
+* @param    InstancePtr is a pointer to the instance to be worked on.
+* @param    RegOffset is the register offset to be written
+* @param    Data is the 32-bit value to write to the register
+*
+* @return   None.
+*
+* @note
+* C-style signature:
+*    void XScuGic_CPUWriteReg(XScuGic *InstancePtr, u32 RegOffset, u32 Data)
+*
+*****************************************************************************/
+#define XScuGic_CPUWriteReg(InstancePtr, RegOffset, Data) \
+(XScuGic_WriteReg(((InstancePtr)->Config->CpuBaseAddress), (RegOffset), \
+					((u32)(Data))))
+
+/****************************************************************************/
+/**
+*
+* Read the given CPU Interface register
+*
+* @param    InstancePtr is a pointer to the instance to be worked on.
+* @param    RegOffset is the register offset to be read
+*
+* @return   The 32-bit value of the register
+*
+* @note
+* C-style signature:
+*    u32 XScuGic_CPUReadReg(XScuGic *InstancePtr, u32 RegOffset)
+*
+*****************************************************************************/
+#define XScuGic_CPUReadReg(InstancePtr, RegOffset) \
+	(XScuGic_ReadReg(((InstancePtr)->Config->CpuBaseAddress), (RegOffset)))
+
+/****************************************************************************/
+/**
+*
+* Write the given Distributor Interface register
+*
+* @param    InstancePtr is a pointer to the instance to be worked on.
+* @param    RegOffset is the register offset to be written
+* @param    Data is the 32-bit value to write to the register
+*
+* @return   None.
+*
+* @note
+* C-style signature:
+*    void XScuGic_DistWriteReg(XScuGic *InstancePtr, u32 RegOffset, u32 Data)
+*
+*****************************************************************************/
+#define XScuGic_DistWriteReg(InstancePtr, RegOffset, Data) \
+(XScuGic_WriteReg(((InstancePtr)->Config->DistBaseAddress), (RegOffset), \
+					((u32)(Data))))
+
+/****************************************************************************/
+/**
+*
+* Read the given Distributor Interface register
+*
+* @param    InstancePtr is a pointer to the instance to be worked on.
+* @param    RegOffset is the register offset to be read
+*
+* @return   The 32-bit value of the register
+*
+* @note
+* C-style signature:
+*    u32 XScuGic_DistReadReg(XScuGic *InstancePtr, u32 RegOffset)
+*
+*****************************************************************************/
+#define XScuGic_DistReadReg(InstancePtr, RegOffset) \
+(XScuGic_ReadReg(((InstancePtr)->Config->DistBaseAddress), (RegOffset)))
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Required functions in xscugic.c
+ */
+
+s32  XScuGic_Connect(XScuGic *InstancePtr, u32 Int_Id,
+			Xil_InterruptHandler Handler, void *CallBackRef);
+void XScuGic_Disconnect(XScuGic *InstancePtr, u32 Int_Id);
+
+void XScuGic_Enable(XScuGic *InstancePtr, u32 Int_Id);
+void XScuGic_Disable(XScuGic *InstancePtr, u32 Int_Id);
+
+s32  XScuGic_CfgInitialize(XScuGic *InstancePtr, XScuGic_Config *ConfigPtr,
+							u32 EffectiveAddr);
+
+s32  XScuGic_SoftwareIntr(XScuGic *InstancePtr, u32 Int_Id, u32 Cpu_Id);
+
+void XScuGic_GetPriorityTriggerType(XScuGic *InstancePtr, u32 Int_Id,
+					u8 *Priority, u8 *Trigger);
+void XScuGic_SetPriorityTriggerType(XScuGic *InstancePtr, u32 Int_Id,
+					u8 Priority, u8 Trigger);
+void XScuGic_InterruptMaptoCpu(XScuGic *InstancePtr, u8 Cpu_Id, u32 Int_Id);
+void XScuGic_InterruptUnmapFromCpu(XScuGic *InstancePtr, u8 Cpu_Id, u32 Int_Id);
+void XScuGic_UnmapAllInterruptsFromCpu(XScuGic *InstancePtr, u8 Cpu_Id);
+void XScuGic_Stop(XScuGic *InstancePtr);
+void XScuGic_SetCpuID(u32 CpuCoreId);
+u32 XScuGic_GetCpuID(void);
+/*
+ * Initialization functions in xscugic_sinit.c
+ */
+XScuGic_Config *XScuGic_LookupConfig(u16 DeviceId);
+
+/*
+ * Interrupt functions in xscugic_intr.c
+ */
+void XScuGic_InterruptHandler(XScuGic *InstancePtr);
+
+/*
+ * Self-test functions in xscugic_selftest.c
+ */
+s32  XScuGic_SelfTest(XScuGic *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif            /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_g.c b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_g.c
new file mode 100644
index 0000000..1145f44
--- /dev/null
+++ b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_g.c
@@ -0,0 +1,57 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xscugic.h"
+
+/*
+* The configuration table for devices
+*/
+
+XScuGic_Config XScuGic_ConfigTable[XPAR_XSCUGIC_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_RCPU_GIC_DEVICE_ID,
+		XPAR_PSU_RCPU_GIC_BASEADDR,
+		XPAR_PSU_RCPU_GIC_DIST_BASEADDR,
+		{{0}}		/**< Initialize the HandlerTable to 0 */
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_hw.c b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_hw.c
new file mode 100644
index 0000000..6604e3a
--- /dev/null
+++ b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_hw.c
@@ -0,0 +1,649 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xscugic_hw.c
+* @addtogroup scugic_v3_8
+* @{
+*
+* This file contains low-level driver functions that can be used to access the
+* device.  The user should refer to the hardware device specification for more
+* details of the device operation.
+* These routines are used when the user does not want to create an instance of
+* XScuGic structure but still wants to use the ScuGic device. Hence the
+* routines provided here take device id or scugic base address as arguments.
+* Separate static versions of DistInit and CPUInit are provided to implement
+* the low level driver routines.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.01a sdm  07/18/11 First release
+* 1.03a srt  02/27/13 Moved Offset calculation macros from *_hw.c (CR
+*		      702687).
+*					  Added support to direct interrupts to the appropriate CPU.
+*			  Earlier interrupts were directed to CPU1 (hard coded). Now
+*			  depending upon the CPU selected by the user (xparameters.h),
+*			  interrupts will be directed to the relevant CPU.
+*			  This fixes CR 699688.
+* 1.04a hk   05/04/13 Fix for CR#705621. Moved functions
+*			  XScuGic_SetPriTrigTypeByDistAddr and
+*             XScuGic_GetPriTrigTypeByDistAddr here from xscugic.c
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.6   kvn  02/17/17 Add support for changing GIC CPU master at run time.
+*       kvn  02/28/17 Make the CpuId as static variable and Added new
+*                     XScugiC_GetCpuId to access CpuId.
+* 3.9   mus  02/21/18 Added new API's XScuGic_InterruptUnmapFromCpuByDistAddr
+*					  and XScuGic_UnmapAllInterruptsFromCpuByDistAddr, These
+*					  API's can be used by applications to unmap specific/all
+*					  interrupts from target CPU. It fixes CR#992490.
+*
+* 

+*
+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xscugic.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+static void DistInit(XScuGic_Config *Config, u32 CpuID);
+static void CPUInit(XScuGic_Config *Config);
+static XScuGic_Config *LookupConfigByBaseAddress(u32 CpuBaseAddress);
+
+/************************** Variable Definitions *****************************/
+
+extern XScuGic_Config XScuGic_ConfigTable[XPAR_XSCUGIC_NUM_INSTANCES];
+extern u32 CpuId;
+
+/*****************************************************************************/
+/**
+*
+* DistInit initializes the distributor of the GIC. The
+* initialization entails:
+*
+* - Write the trigger mode, priority and target CPU
+* - All interrupt sources are disabled
+* - Enable the distributor
+*
+* @param	InstancePtr is a pointer to the XScuGic instance.
+* @param	CpuID is the Cpu ID to be initialized.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static void DistInit(XScuGic_Config *Config, u32 CpuID)
+{
+	u32 Int_Id;
+	u32 LocalCpuID = CpuID;
+
+#if USE_AMP==1
+	#warning "Building GIC for AMP"
+
+	/*
+	 * The distrubutor should not be initialized by FreeRTOS in the case of
+	 * AMP -- it is assumed that Linux is the master of this device in that
+	 * case.
+	 */
+	return;
+#endif
+
+	XScuGic_WriteReg(Config->DistBaseAddress, XSCUGIC_DIST_EN_OFFSET, 0U);
+
+	/*
+	 * Set the security domains in the int_security registers for non-secure
+	 * interrupts. All are secure, so leave at the default. Set to 1 for
+	 * non-secure interrupts.
+	 */
+
+
+	/*
+	 * For the Shared Peripheral Interrupts INT_ID[MAX..32], set:
+	 */
+
+	/*
+	 * 1. The trigger mode in the int_config register
+	 * Only write to the SPI interrupts, so start at 32
+	 */
+	for (Int_Id = 32U; Int_IdDistBaseAddress,
+			XSCUGIC_INT_CFG_OFFSET_CALC(Int_Id), 0U);
+	}
+
+
+#define DEFAULT_PRIORITY	0xa0a0a0a0U
+	for (Int_Id = 0U; Int_IdDistBaseAddress,
+				XSCUGIC_PRIORITY_OFFSET_CALC(Int_Id),
+				DEFAULT_PRIORITY);
+	}
+
+	for (Int_Id = 32U; Int_IdDistBaseAddress,
+				XSCUGIC_SPI_TARGET_OFFSET_CALC(Int_Id), LocalCpuID);
+	}
+
+	for (Int_Id = 0U; Int_IdDistBaseAddress,
+		XSCUGIC_EN_DIS_OFFSET_CALC(XSCUGIC_DISABLE_OFFSET,
+		Int_Id),
+		0xFFFFFFFFU);
+
+	}
+
+	XScuGic_WriteReg(Config->DistBaseAddress, XSCUGIC_DIST_EN_OFFSET,
+						XSCUGIC_EN_INT_MASK);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* CPUInit initializes the CPU Interface of the GIC. The initialization entails:
+*
+* - Set the priority of the CPU.
+* - Enable the CPU interface
+*
+* @param	ConfigPtr is a pointer to a config table for the particular
+*		device this driver is associated with.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static void CPUInit(XScuGic_Config *Config)
+{
+	/*
+	 * Program the priority mask of the CPU using the Priority mask
+	 * register
+	 */
+	XScuGic_WriteReg(Config->CpuBaseAddress, XSCUGIC_CPU_PRIOR_OFFSET,
+									0xF0U);
+
+	/*
+	 * If the CPU operates in both security domains, set parameters in the
+	 * control_s register.
+	 * 1. Set FIQen=1 to use FIQ for secure interrupts,
+	 * 2. Program the AckCtl bit
+	 * 3. Program the SBPR bit to select the binary pointer behavior
+	 * 4. Set EnableS = 1 to enable secure interrupts
+	 * 5. Set EnbleNS = 1 to enable non secure interrupts
+	 */
+
+	/*
+	 * If the CPU operates only in the secure domain, setup the
+	 * control_s register.
+	 * 1. Set FIQen=1,
+	 * 2. Set EnableS=1, to enable the CPU interface to signal secure .
+	 * interrupts Only enable the IRQ output unless secure interrupts
+	 * are needed.
+	 */
+	XScuGic_WriteReg(Config->CpuBaseAddress, XSCUGIC_CONTROL_OFFSET, 0x07U);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* CfgInitialize a specific interrupt controller instance/driver. The
+* initialization entails:
+*
+* - Initialize fields of the XScuGic structure
+* - Initial vector table with stub function calls
+* - All interrupt sources are disabled
+*
+* @param InstancePtr is a pointer to the XScuGic instance to be worked on.
+* @param ConfigPtr is a pointer to a config table for the particular device
+*        this driver is associated with.
+* @param EffectiveAddr is the device base address in the virtual memory address
+*        space. The caller is responsible for keeping the address mapping
+*        from EffectiveAddr to the device physical base address unchanged
+*        once this function is invoked. Unexpected errors may occur if the
+*        address mapping changes after this function is called. If address
+*        translation is not used, use Config->BaseAddress for this parameters,
+*        passing the physical address instead.
+*
+* @return
+*
+* - XST_SUCCESS if initialization was successful
+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+s32 XScuGic_DeviceInitialize(u32 DeviceId)
+{
+	XScuGic_Config *Config;
+	u32 Cpu_Id = XScuGic_GetCpuID() + (u32)1;
+
+	Config = &XScuGic_ConfigTable[(u32 )DeviceId];
+
+	DistInit(Config, Cpu_Id);
+
+	CPUInit(Config);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* This function is the primary interrupt handler for the driver.  It must be
+* connected to the interrupt source such that it is called when an interrupt of
+* the interrupt controller is active. It will resolve which interrupts are
+* active and enabled and call the appropriate interrupt handler. It uses
+* the Interrupt Type information to determine when to acknowledge the
+* interrupt.Highest priority interrupts are serviced first.
+*
+* This function assumes that an interrupt vector table has been previously
+* initialized.  It does not verify that entries in the table are valid before
+* calling an interrupt handler.
+*
+* @param	DeviceId is the unique identifier for the ScuGic device.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XScuGic_DeviceInterruptHandler(void *DeviceId)
+{
+
+	u32 InterruptID;
+	u32 IntIDFull;
+	XScuGic_VectorTableEntry *TablePtr;
+	XScuGic_Config *CfgPtr;
+
+	CfgPtr = &XScuGic_ConfigTable[(INTPTR )DeviceId];
+
+	/*
+	 * Read the int_ack register to identify the highest priority
+	 * interrupt ID and make sure it is valid. Reading Int_Ack will
+	 * clear the interrupt in the GIC.
+	 */
+	IntIDFull = XScuGic_ReadReg(CfgPtr->CpuBaseAddress, XSCUGIC_INT_ACK_OFFSET);
+	InterruptID = IntIDFull & XSCUGIC_ACK_INTID_MASK;
+	if(XSCUGIC_MAX_NUM_INTR_INPUTS < InterruptID){
+		goto IntrExit;
+	}
+
+	/*
+	 * If the interrupt is shared, do some locking here if there are
+	 * multiple processors.
+	 */
+	/*
+	 * If pre-eption is required:
+	 * Re-enable pre-emption by setting the CPSR I bit for non-secure ,
+	 * interrupts or the F bit for secure interrupts
+	 */
+
+	/*
+	 * If we need to change security domains, issue a SMC instruction here.
+	 */
+
+	/*
+	 * Execute the ISR. Jump into the Interrupt service routine based on
+	 * the IRQSource. A software trigger is cleared by the ACK.
+	 */
+	TablePtr = &(CfgPtr->HandlerTable[InterruptID]);
+	if(TablePtr != NULL) {
+		TablePtr->Handler(TablePtr->CallBackRef);
+	}
+
+IntrExit:
+	/*
+	 * Write to the EOI register, we are all done here.
+	 * Let this function return, the boot code will restore the stack.
+	 */
+	XScuGic_WriteReg(CfgPtr->CpuBaseAddress, XSCUGIC_EOI_OFFSET, IntIDFull);
+
+	/*
+	 * Return from the interrupt. Change security domains could happen
+	 * here.
+	 */
+}
+
+/*****************************************************************************/
+/**
+*
+* Register a handler function for a specific interrupt ID.  The vector table
+* of the interrupt controller is updated, overwriting any previous handler.
+* The handler function will be called when an interrupt occurs for the given
+* interrupt ID.
+*
+* @param	BaseAddress is the CPU Interface Register base address of the
+*		interrupt controller whose vector table will be modified.
+* @param	InterruptId is the interrupt ID to be associated with the input
+*		handler.
+* @param	Handler is the function pointer that will be added to
+*		the vector table for the given interrupt ID.
+* @param	CallBackRef is the argument that will be passed to the new
+*		handler function when it is called. This is user-specific.
+*
+* @return	None.
+*
+* @note
+*
+* Note that this function has no effect if the input base address is invalid.
+*
+******************************************************************************/
+void XScuGic_RegisterHandler(u32 BaseAddress, s32 InterruptID,
+			     Xil_InterruptHandler IntrHandler, void *CallBackRef)
+{
+	XScuGic_Config *CfgPtr;
+	CfgPtr = LookupConfigByBaseAddress(BaseAddress);
+
+	if(CfgPtr != NULL) {
+		if( IntrHandler != NULL) {
+			CfgPtr->HandlerTable[InterruptID].Handler = IntrHandler;
+		}
+		if( CallBackRef != NULL) {
+			CfgPtr->HandlerTable[InterruptID].CallBackRef = CallBackRef;
+		}
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* Looks up the device configuration based on the CPU interface base address of
+* the device. A table contains the configuration info for each device in the
+* system.
+*
+* @param	CpuBaseAddress is the CPU Interface Register base address.
+*
+* @return 	A pointer to the configuration structure for the specified
+*		device, or NULL if the device was not found.
+*
+* @note		None.
+*
+******************************************************************************/
+static XScuGic_Config *LookupConfigByBaseAddress(u32 CpuBaseAddress)
+{
+	XScuGic_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index = 0U; Index < XPAR_SCUGIC_NUM_INSTANCES; Index++) {
+		if (XScuGic_ConfigTable[Index].CpuBaseAddress ==
+				CpuBaseAddress) {
+			CfgPtr = &XScuGic_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XScuGic_Config *)CfgPtr;
+}
+
+/****************************************************************************/
+/**
+* Sets the interrupt priority and trigger type for the specificd IRQ source.
+*
+* @param	BaseAddr is the device base address
+* @param	Int_Id is the IRQ source number to modify
+* @param	Priority is the new priority for the IRQ source. 0 is highest
+* 			priority, 0xF8 (248) is lowest. There are 32 priority levels
+*			supported with a step of 8. Hence the supported priorities are
+*			0, 8, 16, 32, 40 ..., 248.
+* @param	Trigger is the new trigger type for the IRQ source.
+* Each bit pair describes the configuration for an INT_ID.
+* SFI    Read Only    b10 always
+* PPI    Read Only    depending on how the PPIs are configured.
+*                    b01    Active HIGH level sensitive
+*                    b11 Rising edge sensitive
+* SPI                LSB is read only.
+*                    b01    Active HIGH level sensitive
+*                    b11 Rising edge sensitive/
+*
+* @return	None.
+*
+* @note		This API has the similar functionality of XScuGic_SetPriority
+*	        TriggerType() and should be used when there is no InstancePtr.
+*
+*****************************************************************************/
+void XScuGic_SetPriTrigTypeByDistAddr(u32 DistBaseAddress, u32 Int_Id,
+					u8 Priority, u8 Trigger)
+{
+	u32 RegValue;
+	u8 LocalPriority = Priority;
+
+	Xil_AssertVoid(Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS);
+	Xil_AssertVoid(Trigger <= XSCUGIC_INT_CFG_MASK);
+	Xil_AssertVoid(LocalPriority <= XSCUGIC_MAX_INTR_PRIO_VAL);
+
+	/*
+	 * Determine the register to write to using the Int_Id.
+	 */
+	RegValue = XScuGic_ReadReg(DistBaseAddress,
+			XSCUGIC_PRIORITY_OFFSET_CALC(Int_Id));
+
+	/*
+	 * The priority bits are Bits 7 to 3 in GIC Priority Register. This
+	 * means the number of priority levels supported are 32 and they are
+	 * in steps of 8. The priorities can be 0, 8, 16, 32, 48, ... etc.
+	 * The lower order 3 bits are masked before putting it in the register.
+	 */
+	LocalPriority = LocalPriority & XSCUGIC_INTR_PRIO_MASK;
+	/*
+	 * Shift and Mask the correct bits for the priority and trigger in the
+	 * register
+	 */
+	RegValue &= ~(XSCUGIC_PRIORITY_MASK << ((Int_Id%4U)*8U));
+	RegValue |= (u32)LocalPriority << ((Int_Id%4U)*8U);
+
+	/*
+	 * Write the value back to the register.
+	 */
+	XScuGic_WriteReg(DistBaseAddress, XSCUGIC_PRIORITY_OFFSET_CALC(Int_Id),
+					RegValue);
+	/*
+	 * Determine the register to write to using the Int_Id.
+	 */
+	RegValue = XScuGic_ReadReg(DistBaseAddress,
+			XSCUGIC_INT_CFG_OFFSET_CALC (Int_Id));
+
+	/*
+	 * Shift and Mask the correct bits for the priority and trigger in the
+	 * register
+	 */
+	RegValue &= ~(XSCUGIC_INT_CFG_MASK << ((Int_Id%16U)*2U));
+	RegValue |= (u32)Trigger << ((Int_Id%16U)*2U);
+
+	/*
+	 * Write the value back to the register.
+	 */
+	XScuGic_WriteReg(DistBaseAddress, XSCUGIC_INT_CFG_OFFSET_CALC(Int_Id),
+				RegValue);
+}
+
+/****************************************************************************/
+/**
+* Gets the interrupt priority and trigger type for the specificd IRQ source.
+*
+* @param	BaseAddr is the device base address
+* @param	Int_Id is the IRQ source number to modify
+* @param	Priority is a pointer to the value of the priority of the IRQ
+*		source. This is a return value.
+* @param	Trigger is pointer to the value of the trigger of the IRQ
+*		source. This is a return value.
+*
+* @return	None.
+*
+* @note		This API has the similar functionality of XScuGic_GetPriority
+*	        TriggerType() and should be used when there is no InstancePtr.
+*
+*****************************************************************************/
+void XScuGic_GetPriTrigTypeByDistAddr(u32 DistBaseAddress, u32 Int_Id,
+					u8 *Priority, u8 *Trigger)
+{
+	u32 RegValue;
+
+	Xil_AssertVoid(Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS);
+	Xil_AssertVoid(Priority != NULL);
+	Xil_AssertVoid(Trigger != NULL);
+
+	/*
+	 * Determine the register to read to using the Int_Id.
+	 */
+	RegValue = XScuGic_ReadReg(DistBaseAddress,
+	    XSCUGIC_PRIORITY_OFFSET_CALC(Int_Id));
+
+	/*
+	 * Shift and Mask the correct bits for the priority and trigger in the
+	 * register
+	 */
+	RegValue = RegValue >> ((Int_Id%4U)*8U);
+	*Priority = (u8)(RegValue & XSCUGIC_PRIORITY_MASK);
+
+	/*
+	 * Determine the register to read to using the Int_Id.
+	 */
+	RegValue = XScuGic_ReadReg(DistBaseAddress,
+	    XSCUGIC_INT_CFG_OFFSET_CALC (Int_Id));
+
+	/*
+	 * Shift and Mask the correct bits for the priority and trigger in the
+	 * register
+	 */
+	RegValue = RegValue >> ((Int_Id%16U)*2U);
+
+	*Trigger = (u8)(RegValue & XSCUGIC_INT_CFG_MASK);
+}
+
+/****************************************************************************/
+/**
+* Unmaps specific SPI interrupt from the target CPU
+*
+* @param	DistBaseAddress is the device base address
+* @param	Cpu_Id is a CPU number from which the interrupt has to be
+*			unmapped
+* @param	Int_Id is the IRQ source number to modify
+*
+* @return	None.
+*
+* @note		None
+*
+*****************************************************************************/
+void XScuGic_InterruptUnmapFromCpuByDistAddr(u32 DistBaseAddress,
+											 u8 Cpu_Id, u32 Int_Id)
+{
+	u32 RegValue;
+	u8 BitPos;
+
+	Xil_AssertVoid(Int_Id < XSCUGIC_MAX_NUM_INTR_INPUTS);
+
+	RegValue = XScuGic_ReadReg(DistBaseAddress,
+				XSCUGIC_SPI_TARGET_OFFSET_CALC(Int_Id));
+
+	/*
+	 * Identify bit position corresponding to  Int_Id and Cpu_Id,
+	 * in interrupt target register and clear it
+	 */
+	BitPos = ((Int_Id % 4U) * 8U) + Cpu_Id;
+	RegValue &= (~ ( 1U << BitPos ));
+	XScuGic_WriteReg(DistBaseAddress,
+			XSCUGIC_SPI_TARGET_OFFSET_CALC(Int_Id), RegValue);
+}
+
+/****************************************************************************/
+/**
+* Unmaps all SPI interrupts from the target CPU
+*
+* @param	DistBaseAddress is the device base address
+* @param	Cpu_Id is a CPU number from which the interrupts has to be
+*			unmapped
+*
+* @return	None.
+*
+* @note		None
+*
+*****************************************************************************/
+void XScuGic_UnmapAllInterruptsFromCpuByDistAddr(u32 DistBaseAddress,
+												 u8 Cpu_Id)
+{
+	u32 Int_Id;
+	u32 Target_Cpu;
+	u32 LocalCpuID = (1U << Cpu_Id);
+
+	LocalCpuID |= LocalCpuID << 8U;
+	LocalCpuID |= LocalCpuID << 16U;
+
+	for (Int_Id = 32U; Int_Id
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------------
+* 1.00a drg  01/19/10 First release
+* 1.01a sdm  11/09/11 "xil_exception.h" added as include.
+*		      Macros XScuGic_EnableIntr and XScuGic_DisableIntr are
+*		      added to enable or disable interrupts based on
+*		      Distributor Register base address. Normally users use
+*		      XScuGic instance and call XScuGic_Enable or
+*		      XScuGic_Disable to enable/disable interrupts. These
+*		      new macros are provided when user does not want to
+*		      use an instance pointer but still wants to enable or
+*		      disable interrupts.
+*		      Function prototypes for functions (present in newly
+*		      added file xscugic_hw.c) are added.
+* 1.03a srt  02/27/13 Moved Offset calculation macros from *_hw.c (CR
+*		      702687).
+* 1.04a hk   05/04/13 Fix for CR#705621. Moved function prototypes
+*		      XScuGic_SetPriTrigTypeByDistAddr and
+*         	      XScuGic_GetPriTrigTypeByDistAddr here from xscugic.h
+* 3.0	pkp  12/09/14 changed XSCUGIC_MAX_NUM_INTR_INPUTS for
+*		      Zynq Ultrascale Mp
+* 3.0   kvn  02/13/14 Modified code for MISRA-C:2012 compliance.
+* 3.2	pkp  11/09/15 Corrected the interrupt processsor target mask value
+*					  for CPU interface 2 i.e. XSCUGIC_SPI_CPU2_MASK
+* 3.9   mus  02/21/18 Added new API's XScuGic_InterruptUnmapFromCpuByDistAddr
+*					  and XScuGic_UnmapAllInterruptsFromCpuByDistAddr, These
+*					  API's can be used by applications to unmap specific/all
+*					  interrupts from target CPU. It fixes CR#992490.
+* 

+*
+******************************************************************************/
+
+#ifndef XSCUGIC_HW_H /* prevent circular inclusions */
+#define XSCUGIC_HW_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xil_exception.h"
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * The maximum number of interrupts supported by the hardware.
+ */
+#ifdef __ARM_NEON__
+#define XSCUGIC_MAX_NUM_INTR_INPUTS    	95U /* Maximum number of interrupt defined by Zynq */
+#else
+#define XSCUGIC_MAX_NUM_INTR_INPUTS    	195U /* Maximum number of interrupt defined by Zynq Ultrascale Mp */
+#endif
+
+/*
+ * The maximum priority value that can be used in the GIC.
+ */
+#define XSCUGIC_MAX_INTR_PRIO_VAL    	248U
+#define XSCUGIC_INTR_PRIO_MASK			0x000000F8U
+
+/** @name Distributor Interface Register Map
+ *
+ * Define the offsets from the base address for all Distributor registers of
+ * the interrupt controller, some registers may be reserved in the hardware
+ * device.
+ * @{
+ */
+#define XSCUGIC_DIST_EN_OFFSET		0x00000000U /**< Distributor Enable
+							Register */
+#define XSCUGIC_IC_TYPE_OFFSET		0x00000004U /**< Interrupt Controller
+							Type Register */
+#define XSCUGIC_DIST_IDENT_OFFSET	0x00000008U /**< Implementor ID
+							Register */
+#define XSCUGIC_SECURITY_OFFSET		0x00000080U /**< Interrupt Security
+							Register */
+#define XSCUGIC_ENABLE_SET_OFFSET	0x00000100U /**< Enable Set
+							Register */
+#define XSCUGIC_DISABLE_OFFSET		0x00000180U /**< Enable Clear Register */
+#define XSCUGIC_PENDING_SET_OFFSET	0x00000200U /**< Pending Set
+							Register */
+#define XSCUGIC_PENDING_CLR_OFFSET	0x00000280U /**< Pending Clear
+							Register */
+#define XSCUGIC_ACTIVE_OFFSET		0x00000300U /**< Active Status Register */
+#define XSCUGIC_PRIORITY_OFFSET		0x00000400U /**< Priority Level Register */
+#define XSCUGIC_SPI_TARGET_OFFSET	0x00000800U /**< SPI Target
+							Register 0x800-0x8FB */
+#define XSCUGIC_INT_CFG_OFFSET		0x00000C00U /**< Interrupt Configuration
+							Register 0xC00-0xCFC */
+#define XSCUGIC_PPI_STAT_OFFSET		0x00000D00U /**< PPI Status Register */
+#define XSCUGIC_SPI_STAT_OFFSET		0x00000D04U /**< SPI Status Register
+							0xd04-0xd7C */
+#define XSCUGIC_AHB_CONFIG_OFFSET	0x00000D80U /**< AHB Configuration
+							Register */
+#define XSCUGIC_SFI_TRIG_OFFSET		0x00000F00U /**< Software Triggered
+							Interrupt Register */
+#define XSCUGIC_PERPHID_OFFSET		0x00000FD0U /**< Peripheral ID Reg */
+#define XSCUGIC_PCELLID_OFFSET		0x00000FF0U /**< Pcell ID Register */
+/* @} */
+
+/** @name  Distributor Enable Register
+ * Controls if the distributor response to external interrupt inputs.
+ * @{
+ */
+#define XSCUGIC_EN_INT_MASK		0x00000001U /**< Interrupt In Enable */
+/* @} */
+
+/** @name  Interrupt Controller Type Register
+ * @{
+ */
+#define XSCUGIC_LSPI_MASK	0x0000F800U /**< Number of Lockable
+						Shared Peripheral
+						Interrupts*/
+#define XSCUGIC_DOMAIN_MASK	0x00000400U /**< Number os Security domains*/
+#define XSCUGIC_CPU_NUM_MASK	0x000000E0U /**< Number of CPU Interfaces */
+#define XSCUGIC_NUM_INT_MASK	0x0000001FU /**< Number of Interrupt IDs */
+/* @} */
+
+/** @name  Implementor ID Register
+ * Implementor and revision information.
+ * @{
+ */
+#define XSCUGIC_REV_MASK	0x00FFF000U /**< Revision Number */
+#define XSCUGIC_IMPL_MASK	0x00000FFFU /**< Implementor */
+/* @} */
+
+/** @name  Interrupt Security Registers
+ * Each bit controls the security level of an interrupt, either secure or non
+ * secure. These registers can only be accessed using secure read and write.
+ * There are registers for each of the CPU interfaces at offset 0x080.  A
+ * register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x084.
+ * @{
+ */
+#define XSCUGIC_INT_NS_MASK	0x00000001U /**< Each bit corresponds to an
+						INT_ID */
+/* @} */
+
+/** @name  Enable Set Register
+ * Each bit controls the enabling of an interrupt, a 0 is disabled, a 1 is
+ * enabled. Writing a 0 has no effect. Use the ENABLE_CLR register to set a
+ * bit to 0.
+ * There are registers for each of the CPU interfaces at offset 0x100. With up
+ * to 8 registers aliased to the same address. A register set for the SPI
+ * interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x104.
+ * @{
+ */
+#define XSCUGIC_INT_EN_MASK	0x00000001U /**< Each bit corresponds to an
+						INT_ID */
+/* @} */
+
+/** @name  Enable Clear Register
+ * Each bit controls the disabling of an interrupt, a 0 is disabled, a 1 is
+ * enabled. Writing a 0 has no effect. Writing a 1 disables an interrupt and
+ * sets the corresponding bit to 0.
+ * There are registers for each of the CPU interfaces at offset 0x180. With up
+ * to 8 registers aliased to the same address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x184.
+ * @{
+ */
+#define XSCUGIC_INT_CLR_MASK	0x00000001U /**< Each bit corresponds to an
+						INT_ID */
+/* @} */
+
+/** @name  Pending Set Register
+ * Each bit controls the Pending or Active and Pending state of an interrupt, a
+ * 0 is not pending, a 1 is pending. Writing a 0 has no effect. Writing a 1 sets
+ * an interrupt to the pending state.
+ * There are registers for each of the CPU interfaces at offset 0x200. With up
+ * to 8 registers aliased to the same address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x204.
+ * @{
+ */
+#define XSCUGIC_PEND_SET_MASK	0x00000001U /**< Each bit corresponds to an
+						INT_ID */
+/* @} */
+
+/** @name  Pending Clear Register
+ * Each bit can clear the Pending or Active and Pending state of an interrupt, a
+ * 0 is not pending, a 1 is pending. Writing a 0 has no effect. Writing a 1
+ * clears the pending state of an interrupt.
+ * There are registers for each of the CPU interfaces at offset 0x280. With up
+ * to 8 registers aliased to the same address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x284.
+ * @{
+ */
+#define XSCUGIC_PEND_CLR_MASK	0x00000001U /**< Each bit corresponds to an
+						INT_ID */
+/* @} */
+
+/** @name  Active Status Register
+ * Each bit provides the Active status of an interrupt, a
+ * 0 is not Active, a 1 is Active. This is a read only register.
+ * There are registers for each of the CPU interfaces at offset 0x300. With up
+ * to 8 registers aliased to each address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 32 of these registers staring at location 0x380.
+ * @{
+ */
+#define XSCUGIC_ACTIVE_MASK	0x00000001U /**< Each bit corresponds to an
+					      INT_ID */
+/* @} */
+
+/** @name  Priority Level Register
+ * Each byte in a Priority Level Register sets the priority level of an
+ * interrupt. Reading the register provides the priority level of an interrupt.
+ * There are registers for each of the CPU interfaces at offset 0x400 through
+ * 0x41C. With up to 8 registers aliased to each address.
+ * 0 is highest priority, 0xFF is lowest.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 255 of these registers staring at location 0x420.
+ * @{
+ */
+#define XSCUGIC_PRIORITY_MASK	0x000000FFU /**< Each Byte corresponds to an
+						INT_ID */
+#define XSCUGIC_PRIORITY_MAX	0x000000FFU /**< Highest value of a priority
+						actually the lowest priority*/
+/* @} */
+
+/** @name  SPI Target Register 0x800-0x8FB
+ * Each byte references a separate SPI and programs which of the up to 8 CPU
+ * interfaces are sent a Pending interrupt.
+ * There are registers for each of the CPU interfaces at offset 0x800 through
+ * 0x81C. With up to 8 registers aliased to each address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 255 of these registers staring at location 0x820.
+ *
+ * This driver does not support multiple CPU interfaces. These are included
+ * for complete documentation.
+ * @{
+ */
+#define XSCUGIC_SPI_CPU7_MASK	0x00000080U /**< CPU 7 Mask*/
+#define XSCUGIC_SPI_CPU6_MASK	0x00000040U /**< CPU 6 Mask*/
+#define XSCUGIC_SPI_CPU5_MASK	0x00000020U /**< CPU 5 Mask*/
+#define XSCUGIC_SPI_CPU4_MASK	0x00000010U /**< CPU 4 Mask*/
+#define XSCUGIC_SPI_CPU3_MASK	0x00000008U /**< CPU 3 Mask*/
+#define XSCUGIC_SPI_CPU2_MASK	0x00000004U /**< CPU 2 Mask*/
+#define XSCUGIC_SPI_CPU1_MASK	0x00000002U /**< CPU 1 Mask*/
+#define XSCUGIC_SPI_CPU0_MASK	0x00000001U /**< CPU 0 Mask*/
+/* @} */
+
+/** @name  Interrupt Configuration Register 0xC00-0xCFC
+ * The interrupt configuration registers program an SFI to be active HIGH level
+ * sensitive or rising edge sensitive.
+ * Each bit pair describes the configuration for an INT_ID.
+ * SFI    Read Only    b10 always
+ * PPI    Read Only    depending on how the PPIs are configured.
+ *                    b01    Active HIGH level sensitive
+ *                    b11 Rising edge sensitive
+ * SPI                LSB is read only.
+ *                    b01    Active HIGH level sensitive
+ *                    b11 Rising edge sensitive/
+ * There are registers for each of the CPU interfaces at offset 0xC00 through
+ * 0xC04. With up to 8 registers aliased to each address.
+ * A register set for the SPI interrupts is available to all CPU interfaces.
+ * There are up to 255 of these registers staring at location 0xC08.
+ * @{
+ */
+#define XSCUGIC_INT_CFG_MASK    0x00000003U    /**< */
+/* @} */
+
+/** @name  PPI Status Register
+ * Enables an external AMBA master to access the status of the PPI inputs.
+ * A CPU can only read the status of its local PPI signals and cannot read the
+ * status for other CPUs.
+ * This register is aliased for each CPU interface.
+ * @{
+ */
+#define XSCUGIC_PPI_C15_MASK	0x00008000U    /**< PPI Status */
+#define XSCUGIC_PPI_C14_MASK	0x00004000U    /**< PPI Status */
+#define XSCUGIC_PPI_C13_MASK	0x00002000U    /**< PPI Status */
+#define XSCUGIC_PPI_C12_MASK	0x00001000U    /**< PPI Status */
+#define XSCUGIC_PPI_C11_MASK	0x00000800U    /**< PPI Status */
+#define XSCUGIC_PPI_C10_MASK	0x00000400U    /**< PPI Status */
+#define XSCUGIC_PPI_C09_MASK	0x00000200U    /**< PPI Status */
+#define XSCUGIC_PPI_C08_MASK	0x00000100U    /**< PPI Status */
+#define XSCUGIC_PPI_C07_MASK	0x00000080U    /**< PPI Status */
+#define XSCUGIC_PPI_C06_MASK	0x00000040U    /**< PPI Status */
+#define XSCUGIC_PPI_C05_MASK	0x00000020U    /**< PPI Status */
+#define XSCUGIC_PPI_C04_MASK	0x00000010U    /**< PPI Status */
+#define XSCUGIC_PPI_C03_MASK	0x00000008U    /**< PPI Status */
+#define XSCUGIC_PPI_C02_MASK	0x00000004U    /**< PPI Status */
+#define XSCUGIC_PPI_C01_MASK	0x00000002U    /**< PPI Status */
+#define XSCUGIC_PPI_C00_MASK	0x00000001U    /**< PPI Status */
+/* @} */
+
+/** @name  SPI Status Register 0xd04-0xd7C
+ * Enables an external AMBA master to access the status of the SPI inputs.
+ * There are up to 63 registers if the maximum number of SPI inputs are
+ * configured.
+ * @{
+ */
+#define XSCUGIC_SPI_N_MASK    0x00000001U    /**< Each bit corresponds to an SPI
+					     input */
+/* @} */
+
+/** @name  AHB Configuration Register
+ * Provides the status of the CFGBIGEND input signal and allows the endianess
+ * of the GIC to be set.
+ * @{
+ */
+#define XSCUGIC_AHB_END_MASK       0x00000004U    /**< 0-GIC uses little Endian,
+                                                  1-GIC uses Big Endian */
+#define XSCUGIC_AHB_ENDOVR_MASK    0x00000002U    /**< 0-Uses CFGBIGEND control,
+                                                  1-use the AHB_END bit */
+#define XSCUGIC_AHB_TIE_OFF_MASK   0x00000001U    /**< State of CFGBIGEND */
+
+/* @} */
+
+/** @name  Software Triggered Interrupt Register
+ * Controls issueing of software interrupts.
+ * @{
+ */
+#define XSCUGIC_SFI_SELFTRIG_MASK	0x02010000U
+#define XSCUGIC_SFI_TRIG_TRGFILT_MASK    0x03000000U    /**< Target List filter
+                                                            b00-Use the target List
+                                                            b01-All CPUs except requester
+                                                            b10-To Requester
+                                                            b11-reserved */
+#define XSCUGIC_SFI_TRIG_CPU_MASK	0x00FF0000U    /**< CPU Target list */
+#define XSCUGIC_SFI_TRIG_SATT_MASK	0x00008000U    /**< 0= Use a secure interrupt */
+#define XSCUGIC_SFI_TRIG_INTID_MASK	0x0000000FU    /**< Set to the INTID
+                                                        signaled to the CPU*/
+/* @} */
+
+/** @name CPU Interface Register Map
+ *
+ * Define the offsets from the base address for all CPU registers of the
+ * interrupt controller, some registers may be reserved in the hardware device.
+ * @{
+ */
+#define XSCUGIC_CONTROL_OFFSET		0x00000000U /**< CPU Interface Control
+							Register */
+#define XSCUGIC_CPU_PRIOR_OFFSET	0x00000004U /**< Priority Mask Reg */
+#define XSCUGIC_BIN_PT_OFFSET		0x00000008U /**< Binary Point Register */
+#define XSCUGIC_INT_ACK_OFFSET		0x0000000CU /**< Interrupt ACK Reg */
+#define XSCUGIC_EOI_OFFSET		0x00000010U /**< End of Interrupt Reg */
+#define XSCUGIC_RUN_PRIOR_OFFSET	0x00000014U /**< Running Priority Reg */
+#define XSCUGIC_HI_PEND_OFFSET		0x00000018U /**< Highest Pending Interrupt
+							Register */
+#define XSCUGIC_ALIAS_BIN_PT_OFFSET	0x0000001CU /**< Aliased non-Secure
+						        Binary Point Register */
+
+/**<  0x00000020 to 0x00000FBC are reserved and should not be read or written
+ * to. */
+/* @} */
+
+
+/** @name Control Register
+ * CPU Interface Control register definitions
+ * All bits are defined here although some are not available in the non-secure
+ * mode.
+ * @{
+ */
+#define XSCUGIC_CNTR_SBPR_MASK	0x00000010U    /**< Secure Binary Pointer,
+                                                 0=separate registers,
+                                                 1=both use bin_pt_s */
+#define XSCUGIC_CNTR_FIQEN_MASK	0x00000008U    /**< Use nFIQ_C for secure
+                                                  interrupts,
+                                                  0= use IRQ for both,
+                                                  1=Use FIQ for secure, IRQ for non*/
+#define XSCUGIC_CNTR_ACKCTL_MASK	0x00000004U    /**< Ack control for secure or non secure */
+#define XSCUGIC_CNTR_EN_NS_MASK		0x00000002U    /**< Non Secure enable */
+#define XSCUGIC_CNTR_EN_S_MASK		0x00000001U    /**< Secure enable, 0=Disabled, 1=Enabled */
+/* @} */
+
+/** @name Priority Mask Register
+ * Priority Mask register definitions
+ * The CPU interface does not send interrupt if the level of the interrupt is
+ * lower than the level of the register.
+ * @{
+ */
+/*#define XSCUGIC_PRIORITY_MASK		0x000000FFU*/   /**< All interrupts */
+/* @} */
+
+/** @name Binary Point Register
+ * Binary Point register definitions
+ * @{
+ */
+
+#define XSCUGIC_BIN_PT_MASK	0x00000007U  /**< Binary point mask value
+						Value  Secure  Non-secure
+						b000    0xFE    0xFF
+						b001    0xFC    0xFE
+						b010    0xF8    0xFC
+						b011    0xF0    0xF8
+						b100    0xE0    0xF0
+						b101    0xC0    0xE0
+						b110    0x80    0xC0
+						b111    0x00    0x80
+						*/
+/*@}*/
+
+/** @name Interrupt Acknowledge Register
+ * Interrupt Acknowledge register definitions
+ * Identifies the current Pending interrupt, and the CPU ID for software
+ * interrupts.
+ */
+#define XSCUGIC_ACK_INTID_MASK		0x000003FFU /**< Interrupt ID */
+#define XSCUGIC_CPUID_MASK		0x00000C00U /**< CPU ID */
+/* @} */
+
+/** @name End of Interrupt Register
+ * End of Interrupt register definitions
+ * Allows the CPU to signal the GIC when it completes an interrupt service
+ * routine.
+ */
+#define XSCUGIC_EOI_INTID_MASK		0x000003FFU /**< Interrupt ID */
+
+/* @} */
+
+/** @name Running Priority Register
+ * Running Priority register definitions
+ * Identifies the interrupt priority level of the highest priority active
+ * interrupt.
+ */
+#define XSCUGIC_RUN_PRIORITY_MASK	0x000000FFU    /**< Interrupt Priority */
+/* @} */
+
+/*
+ * Highest Pending Interrupt register definitions
+ * Identifies the interrupt priority of the highest priority pending interupt
+ */
+#define XSCUGIC_PEND_INTID_MASK		0x000003FFU /**< Pending Interrupt ID */
+/*#define XSCUGIC_CPUID_MASK		0x00000C00U */	 /**< CPU ID */
+/* @} */
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* Read the Interrupt Configuration Register offset for an interrupt id.
+*
+* @param	InterruptID is the interrupt number.
+*
+* @return	The 32-bit value of the offset
+*
+* @note
+*
+*****************************************************************************/
+#define XSCUGIC_INT_CFG_OFFSET_CALC(InterruptID) \
+	((u32)XSCUGIC_INT_CFG_OFFSET + (((InterruptID)/16U) * 4U))
+
+/****************************************************************************/
+/**
+*
+* Read the Interrupt Priority Register offset for an interrupt id.
+*
+* @param	InterruptID is the interrupt number.
+*
+* @return	The 32-bit value of the offset
+*
+* @note
+*
+*****************************************************************************/
+#define XSCUGIC_PRIORITY_OFFSET_CALC(InterruptID) \
+	((u32)XSCUGIC_PRIORITY_OFFSET + (((InterruptID)/4U) * 4U))
+
+/****************************************************************************/
+/**
+*
+* Read the SPI Target Register offset for an interrupt id.
+*
+* @param	InterruptID is the interrupt number.
+*
+* @return	The 32-bit value of the offset
+*
+* @note
+*
+*****************************************************************************/
+#define XSCUGIC_SPI_TARGET_OFFSET_CALC(InterruptID) \
+	((u32)XSCUGIC_SPI_TARGET_OFFSET + (((InterruptID)/4U) * 4U))
+
+/****************************************************************************/
+/**
+*
+* Read the Interrupt Clear-Enable Register offset for an interrupt ID
+*
+* @param	Register is the register offset for the clear/enable bank.
+* @param	InterruptID is the interrupt number.
+*
+* @return	The 32-bit value of the offset
+*
+* @note
+*
+*****************************************************************************/
+#define XSCUGIC_EN_DIS_OFFSET_CALC(Register, InterruptID) \
+		((Register) + (((InterruptID)/32U) * 4U))
+
+/****************************************************************************/
+/**
+*
+* Read the given Intc register.
+*
+* @param	BaseAddress is the base address of the device.
+* @param	RegOffset is the register offset to be read
+*
+* @return	The 32-bit value of the register
+*
+* @note
+* C-style signature:
+*    u32 XScuGic_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+*****************************************************************************/
+#define XScuGic_ReadReg(BaseAddress, RegOffset) \
+	(Xil_In32((BaseAddress) + (RegOffset)))
+
+
+/****************************************************************************/
+/**
+*
+* Write the given Intc register.
+*
+* @param	BaseAddress is the base address of the device.
+* @param	RegOffset is the register offset to be written
+* @param	Data is the 32-bit value to write to the register
+*
+* @return	None.
+*
+* @note
+* C-style signature:
+*    void XScuGic_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+*****************************************************************************/
+#define XScuGic_WriteReg(BaseAddress, RegOffset, Data) \
+	(Xil_Out32(((BaseAddress) + (RegOffset)), ((u32)(Data))))
+
+
+/****************************************************************************/
+/**
+*
+* Enable specific interrupt(s) in the interrupt controller.
+*
+* @param	DistBaseAddress is the Distributor Register base address of the
+*		device
+* @param	Int_Id is the ID of the interrupt source and should be in the
+*		range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XScuGic_EnableIntr(u32 DistBaseAddress, u32 Int_Id)
+*
+*****************************************************************************/
+#define XScuGic_EnableIntr(DistBaseAddress, Int_Id) \
+	XScuGic_WriteReg((DistBaseAddress), \
+			 XSCUGIC_ENABLE_SET_OFFSET + (((Int_Id) / 32U) * 4U), \
+			 (0x00000001U << ((Int_Id) % 32U)))
+
+/****************************************************************************/
+/**
+*
+* Disable specific interrupt(s) in the interrupt controller.
+*
+* @param	DistBaseAddress is the Distributor Register base address of the
+*		device
+* @param	Int_Id is the ID of the interrupt source and should be in the
+*		range of 0 to XSCUGIC_MAX_NUM_INTR_INPUTS - 1
+*
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XScuGic_DisableIntr(u32 DistBaseAddress, u32 Int_Id)
+*
+*****************************************************************************/
+#define XScuGic_DisableIntr(DistBaseAddress, Int_Id) \
+	XScuGic_WriteReg((DistBaseAddress), \
+			 XSCUGIC_DISABLE_OFFSET + (((Int_Id) / 32U) * 4U), \
+			 (0x00000001U << ((Int_Id) % 32U)))
+
+
+/************************** Function Prototypes ******************************/
+
+void XScuGic_DeviceInterruptHandler(void *DeviceId);
+s32  XScuGic_DeviceInitialize(u32 DeviceId);
+void XScuGic_RegisterHandler(u32 BaseAddress, s32 InterruptID,
+			     Xil_InterruptHandler Handler, void *CallBackRef);
+void XScuGic_SetPriTrigTypeByDistAddr(u32 DistBaseAddress, u32 Int_Id,
+                                        u8 Priority, u8 Trigger);
+void XScuGic_GetPriTrigTypeByDistAddr(u32 DistBaseAddress, u32 Int_Id,
+					u8 *Priority, u8 *Trigger);
+void XScuGic_InterruptUnmapFromCpuByDistAddr(u32 DistBaseAddress,
+											u8 Cpu_Id, u32 Int_Id);
+void XScuGic_UnmapAllInterruptsFromCpuByDistAddr(u32 DistBaseAddress,
+												u8 Cpu_Id);
+/************************** Variable Definitions *****************************/
+#ifdef __cplusplus
+}
+#endif
+
+#endif            /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_intr.c b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_intr.c
new file mode 100644
index 0000000..d82a60b
--- /dev/null
+++ b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_intr.c
@@ -0,0 +1,173 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xscugic_intr.c
+* @addtogroup scugic_v3_8
+* @{
+*
+* This file contains the interrupt processing for the driver for the Xilinx
+* Interrupt Controller.  The interrupt processing is partitioned separately such
+* that users are not required to use the provided interrupt processing.  This
+* file requires other files of the driver to be linked in also.
+*
+* The interrupt handler, XScuGic_InterruptHandler, uses an input argument which
+* is an instance pointer to an interrupt controller driver such that multiple
+* interrupt controllers can be supported.  This handler requires the calling
+* function to pass it the appropriate argument, so another level of indirection
+* may be required.
+*
+* The interrupt processing may be used by connecting the interrupt handler to
+* the interrupt system.  The handler does not save and restore the processor
+* context but only handles the processing of the Interrupt Controller. The user
+* is encouraged to supply their own interrupt handler when performance tuning is
+* deemed necessary.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------------
+* 1.00a drg  01/19/10 First release
+* 1.01a sdm  11/09/11 XScuGic_InterruptHandler has changed correspondingly
+*		      since the HandlerTable has now moved to XScuGic_Config.
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+*
+* 

+*
+* @internal
+*
+* This driver assumes that the context of the processor has been saved prior to
+* the calling of the Interrupt Controller interrupt handler and then restored
+* after the handler returns. This requires either the running RTOS to save the
+* state of the machine or that a wrapper be used as the destination of the
+* interrupt vector to save the state of the processor and restore the state
+* after the interrupt handler returns.
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xscugic.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+/*****************************************************************************/
+/**
+* This function is the primary interrupt handler for the driver.  It must be
+* connected to the interrupt source such that it is called when an interrupt of
+* the interrupt controller is active. It will resolve which interrupts are
+* active and enabled and call the appropriate interrupt handler. It uses
+* the Interrupt Type information to determine when to acknowledge the interrupt.
+* Highest priority interrupts are serviced first.
+*
+* This function assumes that an interrupt vector table has been previously
+* initialized.  It does not verify that entries in the table are valid before
+* calling an interrupt handler.
+*
+*
+* @param	InstancePtr is a pointer to the XScuGic instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XScuGic_InterruptHandler(XScuGic *InstancePtr)
+{
+
+	u32 InterruptID;
+	    u32 IntIDFull;
+	    XScuGic_VectorTableEntry *TablePtr;
+
+	    /* Assert that the pointer to the instance is valid
+	     */
+	    Xil_AssertVoid(InstancePtr != NULL);
+
+	    /*
+	     * Read the int_ack register to identify the highest priority interrupt ID
+	     * and make sure it is valid. Reading Int_Ack will clear the interrupt
+	     * in the GIC.
+	     */
+	    IntIDFull = XScuGic_CPUReadReg(InstancePtr, XSCUGIC_INT_ACK_OFFSET);
+	    InterruptID = IntIDFull & XSCUGIC_ACK_INTID_MASK;
+
+	    if(XSCUGIC_MAX_NUM_INTR_INPUTS < InterruptID){
+		goto IntrExit;
+	    }
+
+	    /*
+	     * If the interrupt is shared, do some locking here if there are multiple
+	     * processors.
+	     */
+	    /*
+	     * If pre-eption is required:
+	     * Re-enable pre-emption by setting the CPSR I bit for non-secure ,
+	     * interrupts or the F bit for secure interrupts
+	     */
+
+	    /*
+	     * If we need to change security domains, issue a SMC instruction here.
+	     */
+
+	    /*
+	     * Execute the ISR. Jump into the Interrupt service routine based on the
+	     * IRQSource. A software trigger is cleared by the ACK.
+	     */
+	    TablePtr = &(InstancePtr->Config->HandlerTable[InterruptID]);
+		if(TablePtr != NULL) {
+	        TablePtr->Handler(TablePtr->CallBackRef);
+		}
+
+	IntrExit:
+	    /*
+	     * Write to the EOI register, we are all done here.
+	     * Let this function return, the boot code will restore the stack.
+	     */
+	    XScuGic_CPUWriteReg(InstancePtr, XSCUGIC_EOI_OFFSET, IntIDFull);
+
+	    /*
+	     * Return from the interrupt. Change security domains could happen here.
+     */
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_selftest.c b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_selftest.c
new file mode 100644
index 0000000..7b1028f
--- /dev/null
+++ b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_selftest.c
@@ -0,0 +1,115 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xscugic_selftest.c
+* @addtogroup scugic_v3_8
+* @{
+*
+* Contains diagnostic self-test functions for the XScuGic driver.
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a drg  01/19/10 First release
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xscugic.h"
+
+/************************** Constant Definitions *****************************/
+
+#define	XSCUGIC_PCELL_ID	0xB105F00DU
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+/*****************************************************************************/
+/**
+*
+* Run a self-test on the driver/device. This test reads the ID registers and
+* compares them.
+*
+* @param	InstancePtr is a pointer to the XScuGic instance.
+*
+* @return
+*
+* 		- XST_SUCCESS if self-test is successful.
+* 		- XST_FAILURE if the self-test is not successful.
+*
+* @note		None.
+*
+******************************************************************************/
+s32  XScuGic_SelfTest(XScuGic *InstancePtr)
+{
+	u32 RegValue1 = 0U;
+	u32 Index;
+	s32 Status;
+
+	/*
+	 * Assert the arguments
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read the ID registers.
+	 */
+	for(Index=0U; Index<=3U; Index++) {
+		RegValue1 |= XScuGic_DistReadReg(InstancePtr,
+			((u32)XSCUGIC_PCELLID_OFFSET + (Index * 4U))) << (Index * 8U);
+	}
+
+	if(XSCUGIC_PCELL_ID != RegValue1){
+		Status = XST_FAILURE;
+	} else {
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_sinit.c b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_sinit.c
new file mode 100644
index 0000000..842f318
--- /dev/null
+++ b/src/Xilinx/libsrc/scugic_v3_9/src/xscugic_sinit.c
@@ -0,0 +1,103 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xscugic_sinit.c
+* @addtogroup scugic_v3_8
+* @{
+*
+* Contains static init functions for the XScuGic driver for the Interrupt
+* Controller. See xscugic.h for a detailed description of the driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- --------------------------------------------------------
+* 1.00a drg  01/19/10 First release
+* 3.00  kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xparameters.h"
+#include "xscugic.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+extern XScuGic_Config XScuGic_ConfigTable[XPAR_SCUGIC_NUM_INSTANCES];
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+*
+* Looks up the device configuration based on the unique device ID. A table
+* contains the configuration info for each device in the system.
+*
+* @param	DeviceId is the unique identifier for a device.
+*
+* @return	A pointer to the XScuGic configuration structure for the
+*		specified device, or NULL if the device was not found.
+*
+* @note		None.
+*
+******************************************************************************/
+XScuGic_Config *XScuGic_LookupConfig(u16 DeviceId)
+{
+	XScuGic_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index=0U; Index < (u32)XPAR_SCUGIC_NUM_INSTANCES; Index++) {
+		if (XScuGic_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XScuGic_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XScuGic_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/sdps_v3_4/src/Makefile b/src/Xilinx/libsrc/sdps_v3_4/src/Makefile
new file mode 100644
index 0000000..f57081a
--- /dev/null
+++ b/src/Xilinx/libsrc/sdps_v3_4/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xsdps_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling sdps"
+
+xsdps_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xsdps_includes
+
+xsdps_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/sdps_v3_4/src/xsdps.c b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps.c
new file mode 100644
index 0000000..65f1b22
--- /dev/null
+++ b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps.c
@@ -0,0 +1,1761 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsdps.c
+* @addtogroup sdps_v3_4
+* @{
+*
+* Contains the interface functions of the XSdPs driver.
+* See xsdps.h for a detailed description of the device and driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ---    -------- -----------------------------------------------
+* 1.00a hk/sg  10/17/13 Initial release
+* 2.0   hk     12/13/13 Added check for arm to use sleep.h and its API's
+* 2.1   hk     04/18/14 Add sleep for microblaze designs. CR# 781117.
+* 2.2   hk     07/28/14 Make changes to enable use of data cache.
+* 2.3   sk     09/23/14 Send command for relative card address
+*                       when re-initialization is done.CR# 819614.
+*						Use XSdPs_Change_ClkFreq API whenever changing
+*						clock.CR# 816586.
+* 2.4	sk	   12/04/14 Added support for micro SD without
+* 						WP/CD. CR# 810655.
+*						Checked for DAT Inhibit mask instead of CMD
+* 						Inhibit mask in Cmd Transfer API.
+*						Added Support for SD Card v1.0
+* 2.5 	sg	   07/09/15 Added SD 3.0 features
+*       kvn    07/15/15 Modified the code according to MISRAC-2012.
+* 2.6   sk     10/12/15 Added support for SD card v1.0 CR# 840601.
+* 2.7   sk     11/24/15 Considered the slot type befoe checking CD/WP pins.
+*       sk     12/10/15 Added support for MMC cards.
+*       sk     02/16/16 Corrected the Tuning logic.
+*       sk     03/01/16 Removed Bus Width check for eMMC. CR# 938311.
+* 2.8   sk     05/03/16 Standard Speed for SD to 19MHz in ZynqMPSoC. CR#951024
+* 3.0   sk     06/09/16 Added support for mkfs to calculate sector count.
+*       sk     07/16/16 Added support for UHS modes.
+*       sk     07/07/16 Used usleep API for both arm and microblaze.
+*       sk     07/16/16 Added Tap delays accordingly to different SD/eMMC
+*                       operating modes.
+* 3.1   mi     09/07/16 Removed compilation warnings with extra compiler flags.
+*       sk     10/13/16 Reduced the delay during power cycle to 1ms as per spec
+*       sk     10/19/16 Used emmc_hwreset pin to reset eMMC.
+*       sk     11/07/16 Enable Rst_n bit in ext_csd reg if not enabled.
+* 3.2   sk     11/30/16 Modified the voltage switching sequence as per spec.
+*       sk     02/01/17 Added HSD and DDR mode support for eMMC.
+*       vns    02/09/17 Added ARMA53_32 support for ZynqMP CR#968397
+*       sk     03/20/17 Add support for EL1 non-secure mode.
+* 3.3   mn     05/17/17 Add support for 64bit DMA addressing
+*       mn     07/17/17 Add support for running SD at 200MHz
+*       mn     07/26/17 Fixed compilation warnings
+*       mn     08/07/17 Modify driver to support 64-bit DMA in arm64 only
+*       mn     08/17/17 Added CCI support for A53 and disabled data cache
+*                       operations when it is enabled.
+*       mn     08/22/17 Updated for Word Access System support
+*       mn     09/06/17 Resolved compilation errors with IAR toolchain
+*       mn     09/26/17 Added UHS_MODE_ENABLE macro to enable UHS mode
+* 3.4   mn     10/17/17 Use different commands for single and multi block
+*                       transfers
+*       mn     03/02/18 Move UHS macro check to SD card initialization routine
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xsdps.h"
+#include "sleep.h"
+
+/************************** Constant Definitions *****************************/
+#define XSDPS_CMD8_VOL_PATTERN	0x1AAU
+#define XSDPS_RESPOCR_READY	0x80000000U
+#define XSDPS_ACMD41_HCS	0x40000000U
+#define XSDPS_ACMD41_3V3	0x00300000U
+#define XSDPS_CMD1_HIGH_VOL	0x00FF8000U
+#define XSDPS_CMD1_DUAL_VOL	0x00FF8010U
+#define HIGH_SPEED_SUPPORT	0x2U
+#define UHS_SDR50_SUPPORT	0x4U
+#define WIDTH_4_BIT_SUPPORT	0x4U
+#define SD_CLK_25_MHZ		25000000U
+#define SD_CLK_19_MHZ		19000000U
+#define SD_CLK_26_MHZ		26000000U
+#define EXT_CSD_DEVICE_TYPE_BYTE	196U
+#define EXT_CSD_SEC_COUNT_BYTE1		212U
+#define EXT_CSD_SEC_COUNT_BYTE2		213U
+#define EXT_CSD_SEC_COUNT_BYTE3		214U
+#define EXT_CSD_SEC_COUNT_BYTE4		215U
+#define EXT_CSD_DEVICE_TYPE_HIGH_SPEED			0x2U
+#define EXT_CSD_DEVICE_TYPE_DDR_1V8_HIGH_SPEED	0x4U
+#define EXT_CSD_DEVICE_TYPE_DDR_1V2_HIGH_SPEED	0x8U
+#define EXT_CSD_DEVICE_TYPE_SDR_1V8_HS200		0x10U
+#define EXT_CSD_DEVICE_TYPE_SDR_1V2_HS200		0x20U
+#define CSD_SPEC_VER_3		0x3U
+#define SCR_SPEC_VER_3		0x80U
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+u32 XSdPs_FrameCmd(XSdPs *InstancePtr, u32 Cmd);
+s32 XSdPs_CmdTransfer(XSdPs *InstancePtr, u32 Cmd, u32 Arg, u32 BlkCnt);
+void XSdPs_SetupADMA2DescTbl(XSdPs *InstancePtr, u32 BlkCnt, const u8 *Buff);
+extern s32 XSdPs_Uhs_ModeInit(XSdPs *InstancePtr, u8 Mode);
+static s32 XSdPs_IdentifyCard(XSdPs *InstancePtr);
+static s32 XSdPs_Switch_Voltage(XSdPs *InstancePtr);
+
+u16 TransferMode;
+/*****************************************************************************/
+/**
+*
+* Initializes a specific XSdPs instance such that the driver is ready to use.
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+* @param	ConfigPtr is a reference to a structure containing information
+*		about a specific SD device. This function initializes an
+*		InstancePtr object for a specific device specified by the
+*		contents of Config.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. The caller is responsible for keeping the address
+*		mapping from EffectiveAddr to the device physical base address
+*		unchanged once this function is invoked. Unexpected errors may
+*		occur if the address mapping changes after this function is
+*		called. If address translation is not used, use
+*		ConfigPtr->Config.BaseAddress for this device.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_DEVICE_IS_STARTED if the device is already started.
+*		It must be stopped to re-initialize.
+*
+* @note		This function initializes the host controller.
+*		Initial clock of 400KHz is set.
+*		Voltage of 3.3V is selected as that is supported by host.
+*		Interrupts status is enabled and signal disabled by default.
+*		Default data direction is card to host and
+*		32 bit ADMA2 is selected. Defualt Block size is 512 bytes.
+*
+******************************************************************************/
+s32 XSdPs_CfgInitialize(XSdPs *InstancePtr, XSdPs_Config *ConfigPtr,
+				u32 EffectiveAddr)
+{
+	s32 Status;
+	u8 PowerLevel;
+	u8 ReadReg;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+
+	/* Set some default values. */
+	InstancePtr->Config.DeviceId = ConfigPtr->DeviceId;
+	InstancePtr->Config.BaseAddress = EffectiveAddr;
+	InstancePtr->Config.InputClockHz = ConfigPtr->InputClockHz;
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+	InstancePtr->Config.CardDetect =  ConfigPtr->CardDetect;
+	InstancePtr->Config.WriteProtect =  ConfigPtr->WriteProtect;
+	InstancePtr->Config.BusWidth = ConfigPtr->BusWidth;
+	InstancePtr->Config.BankNumber = ConfigPtr->BankNumber;
+	InstancePtr->Config.HasEMIO = ConfigPtr->HasEMIO;
+	InstancePtr->Config.IsCacheCoherent = ConfigPtr->IsCacheCoherent;
+	InstancePtr->SectorCount = 0;
+	InstancePtr->Mode = XSDPS_DEFAULT_SPEED_MODE;
+	InstancePtr->Config_TapDelay = NULL;
+
+	/* Disable bus power and issue emmc hw reset */
+	if ((XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_HOST_CTRL_VER_OFFSET) & XSDPS_HC_SPEC_VER_MASK) ==
+			XSDPS_HC_SPEC_V3)
+		XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+				XSDPS_POWER_CTRL_OFFSET, XSDPS_PC_EMMC_HW_RST_MASK);
+	else
+		XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+				XSDPS_POWER_CTRL_OFFSET, 0x0);
+
+	/* Delay to poweroff card */
+    (void)usleep(1000U);
+
+	/* "Software reset for all" is initiated */
+	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress, XSDPS_SW_RST_OFFSET,
+			XSDPS_SWRST_ALL_MASK);
+
+	/* Proceed with initialization only after reset is complete */
+	ReadReg = XSdPs_ReadReg8(InstancePtr->Config.BaseAddress,
+				XSDPS_SW_RST_OFFSET);
+	while ((ReadReg & XSDPS_SWRST_ALL_MASK) != 0U) {
+		ReadReg = XSdPs_ReadReg8(InstancePtr->Config.BaseAddress,
+				XSDPS_SW_RST_OFFSET);
+	}
+	/* Host Controller version is read. */
+	 InstancePtr->HC_Version =
+			(u8)(XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_HOST_CTRL_VER_OFFSET) & XSDPS_HC_SPEC_VER_MASK);
+
+	/*
+	 * Read capabilities register and update it in Instance pointer.
+	 * It is sufficient to read this once on power on.
+	 */
+	InstancePtr->Host_Caps = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+						XSDPS_CAPS_OFFSET);
+
+	/* Select voltage and enable bus power. */
+	if (InstancePtr->HC_Version == XSDPS_HC_SPEC_V3)
+		XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+				XSDPS_POWER_CTRL_OFFSET,
+				(XSDPS_PC_BUS_VSEL_3V3_MASK | XSDPS_PC_BUS_PWR_MASK) &
+				~XSDPS_PC_EMMC_HW_RST_MASK);
+	else
+		XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+				XSDPS_POWER_CTRL_OFFSET,
+				XSDPS_PC_BUS_VSEL_3V3_MASK | XSDPS_PC_BUS_PWR_MASK);
+
+	/* Delay before issuing the command after emmc reset */
+	if (InstancePtr->HC_Version == XSDPS_HC_SPEC_V3)
+		if ((InstancePtr->Host_Caps & XSDPS_CAPS_SLOT_TYPE_MASK) ==
+				XSDPS_CAPS_EMB_SLOT)
+			usleep(200);
+
+	/* Change the clock frequency to 400 KHz */
+	Status = XSdPs_Change_ClkFreq(InstancePtr, XSDPS_CLK_400_KHZ);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH ;
+	}
+
+    if ((InstancePtr->Host_Caps & XSDPS_CAP_VOLT_3V3_MASK) != 0U) {
+		PowerLevel = XSDPS_PC_BUS_VSEL_3V3_MASK;
+	} else if ((InstancePtr->Host_Caps & XSDPS_CAP_VOLT_3V0_MASK) != 0U) {
+		PowerLevel = XSDPS_PC_BUS_VSEL_3V0_MASK;
+	} else if ((InstancePtr->Host_Caps & XSDPS_CAP_VOLT_1V8_MASK) != 0U) {
+		PowerLevel = XSDPS_PC_BUS_VSEL_1V8_MASK;
+	} else {
+		PowerLevel = 0U;
+	}
+
+	/* Select voltage based on capability and enable bus power. */
+	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+			XSDPS_POWER_CTRL_OFFSET,
+			PowerLevel | XSDPS_PC_BUS_PWR_MASK);
+
+#ifdef __aarch64__
+	/* Enable ADMA2 in 64bit mode. */
+	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+			XSDPS_HOST_CTRL1_OFFSET,
+			XSDPS_HC_DMA_ADMA2_64_MASK);
+#else
+	/* Enable ADMA2 in 32bit mode. */
+	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+			XSDPS_HOST_CTRL1_OFFSET,
+			XSDPS_HC_DMA_ADMA2_32_MASK);
+#endif
+
+	/* Enable all interrupt status except card interrupt initially */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_EN_OFFSET,
+			XSDPS_NORM_INTR_ALL_MASK & (~XSDPS_INTR_CARD_MASK));
+
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_ERR_INTR_STS_EN_OFFSET,
+			XSDPS_ERROR_INTR_ALL_MASK);
+
+	/* Disable all interrupt signals by default. */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_SIG_EN_OFFSET, 0x0U);
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_ERR_INTR_SIG_EN_OFFSET, 0x0U);
+
+	/*
+	 * Transfer mode register - default value
+	 * DMA enabled, block count enabled, data direction card to host(read)
+	 */
+	TransferMode = XSDPS_TM_DMA_EN_MASK | XSDPS_TM_BLK_CNT_EN_MASK |
+			XSDPS_TM_DAT_DIR_SEL_MASK;
+
+	/* Set block size to 512 by default */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_BLK_SIZE_OFFSET, XSDPS_BLK_SIZE_512_MASK);
+
+	Status = XST_SUCCESS;
+
+RETURN_PATH:
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+* SD initialization is done in this function
+*
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+*
+* @return
+* 		- XST_SUCCESS if initialization was successful
+* 		- XST_FAILURE if failure - could be because
+* 			a) SD is already initialized
+* 			b) There is no card inserted
+* 			c) One of the steps (commands) in the
+			   initialization cycle failed
+*
+* @note		This function initializes the SD card by following its
+*		initialization and identification state diagram.
+*		CMD0 is sent to reset card.
+*		CMD8 and ACDM41 are sent to identify voltage and
+*		high capacity support
+*		CMD2 and CMD3 are sent to obtain Card ID and
+*		Relative card address respectively.
+*		CMD9 is sent to read the card specific data.
+*
+******************************************************************************/
+s32 XSdPs_SdCardInitialize(XSdPs *InstancePtr)
+{
+	u32 PresentStateReg;
+	s32 Status;
+	u32 RespOCR;
+	u32 CSD[4];
+	u32 Arg;
+	u8 ReadReg;
+	u32 BlkLen, DeviceSize, Mult;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+#ifndef UHS_MODE_ENABLE
+	InstancePtr->Config.BusWidth = XSDPS_WIDTH_4;
+#endif
+
+	if ((InstancePtr->HC_Version != XSDPS_HC_SPEC_V3) ||
+				((InstancePtr->Host_Caps & XSDPS_CAPS_SLOT_TYPE_MASK)
+				!= XSDPS_CAPS_EMB_SLOT)) {
+		if(InstancePtr->Config.CardDetect != 0U) {
+			/*
+			 * Check the present state register to make sure
+			 * card is inserted and detected by host controller
+			 */
+			PresentStateReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XSDPS_PRES_STATE_OFFSET);
+			if ((PresentStateReg & XSDPS_PSR_CARD_INSRT_MASK) == 0U)	{
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		}
+	}
+
+	/* CMD0 no response expected */
+	Status = XSdPs_CmdTransfer(InstancePtr, (u32)CMD0, 0U, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/*
+	 * CMD8; response expected
+	 * 0x1AA - Supply Voltage 2.7 - 3.6V and AA is pattern
+	 */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD8,
+			XSDPS_CMD8_VOL_PATTERN, 0U);
+	if ((Status != XST_SUCCESS) && (Status != XSDPS_CT_ERROR)) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	if (Status == XSDPS_CT_ERROR) {
+		 /* "Software reset for all" is initiated */
+		XSdPs_WriteReg8(InstancePtr->Config.BaseAddress, XSDPS_SW_RST_OFFSET,
+				XSDPS_SWRST_CMD_LINE_MASK);
+
+		/* Proceed with initialization only after reset is complete */
+		ReadReg = XSdPs_ReadReg8(InstancePtr->Config.BaseAddress,
+						XSDPS_SW_RST_OFFSET);
+		while ((ReadReg & XSDPS_SWRST_CMD_LINE_MASK) != 0U) {
+			ReadReg = XSdPs_ReadReg8(InstancePtr->Config.BaseAddress,
+						XSDPS_SW_RST_OFFSET);
+		}
+	}
+
+	RespOCR = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+						XSDPS_RESP0_OFFSET);
+	if (RespOCR != XSDPS_CMD8_VOL_PATTERN) {
+		InstancePtr->Card_Version = XSDPS_SD_VER_1_0;
+	}
+	else {
+		InstancePtr->Card_Version = XSDPS_SD_VER_2_0;
+	}
+
+	RespOCR = 0U;
+	/* Send ACMD41 while card is still busy with power up */
+	while ((RespOCR & XSDPS_RESPOCR_READY) == 0U) {
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD55, 0U, 0U);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		Arg = XSDPS_ACMD41_HCS | XSDPS_ACMD41_3V3 | (0x1FFU << 15U);
+		/*
+		 * There is no support to switch to 1.8V and use UHS mode on
+		 * 1.0 silicon
+		 */
+		if ((InstancePtr->HC_Version == XSDPS_HC_SPEC_V3) &&
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32) || (PSU_PMU)
+			(XGetPSVersion_Info() > XPS_VERSION_1) &&
+#endif
+			(InstancePtr->Config.BusWidth == XSDPS_WIDTH_8)) {
+			Arg |= XSDPS_OCR_S18;
+		}
+
+		/* 0x40300000 - Host High Capacity support & 3.3V window */
+		Status = XSdPs_CmdTransfer(InstancePtr, ACMD41,
+				Arg, 0U);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		/* Response with card capacity */
+		RespOCR = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XSDPS_RESP0_OFFSET);
+
+	}
+
+	/* Update HCS support flag based on card capacity response */
+	if ((RespOCR & XSDPS_ACMD41_HCS) != 0U) {
+		InstancePtr->HCS = 1U;
+	}
+
+	if ((RespOCR & XSDPS_OCR_S18) != 0U) {
+		InstancePtr->Switch1v8 = 1U;
+		Status = XSdPs_Switch_Voltage(InstancePtr);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	}
+
+	/* CMD2 for Card ID */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD2, 0U, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	InstancePtr->CardID[0] =
+			XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+	InstancePtr->CardID[1] =
+			XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP1_OFFSET);
+	InstancePtr->CardID[2] =
+			XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP2_OFFSET);
+	InstancePtr->CardID[3] =
+			XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP3_OFFSET);
+	do {
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD3, 0U, 0U);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		/*
+		 * Relative card address is stored as the upper 16 bits
+		 * This is to avoid shifting when sending commands
+		 */
+		InstancePtr->RelCardAddr =
+				XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XSDPS_RESP0_OFFSET) & 0xFFFF0000U;
+	} while (InstancePtr->RelCardAddr == 0U);
+
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD9, (InstancePtr->RelCardAddr), 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/*
+	 * Card specific data is read.
+	 * Currently not used for any operation.
+	 */
+	CSD[0] = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+	CSD[1] = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP1_OFFSET);
+	CSD[2] = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP2_OFFSET);
+	CSD[3] = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP3_OFFSET);
+
+	if (((CSD[3] & CSD_STRUCT_MASK) >> 22U) == 0U) {
+		BlkLen = 1 << ((CSD[2] & READ_BLK_LEN_MASK) >> 8U);
+		Mult = 1 << (((CSD[1] & C_SIZE_MULT_MASK) >> 7U) + 2U);
+		DeviceSize = (CSD[1] & C_SIZE_LOWER_MASK) >> 22U;
+		DeviceSize |= (CSD[2] & C_SIZE_UPPER_MASK) << 10U;
+		DeviceSize = (DeviceSize + 1U) * Mult;
+		DeviceSize =  DeviceSize * BlkLen;
+		InstancePtr->SectorCount = (DeviceSize/XSDPS_BLK_SIZE_512_MASK);
+	} else if (((CSD[3] & CSD_STRUCT_MASK) >> 22U) == 1U) {
+		InstancePtr->SectorCount = (((CSD[1] & CSD_V2_C_SIZE_MASK) >> 8U) +
+										1U) * 1024U;
+	}
+
+	Status = XST_SUCCESS;
+
+RETURN_PATH:
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* Initialize Card with Identification mode sequence
+*
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+*
+* @return
+* 		- XST_SUCCESS if initialization was successful
+* 		- XST_FAILURE if failure - could be because
+* 			a) SD is already initialized
+* 			b) There is no card inserted
+* 			c) One of the steps (commands) in the
+*			   initialization cycle failed
+*
+*
+******************************************************************************/
+s32 XSdPs_CardInitialize(XSdPs *InstancePtr)
+{
+#ifdef __ICCARM__
+#pragma data_alignment = 32
+	static u8 ExtCsd[512];
+	u8 SCR[8] = { 0U };
+#pragma data_alignment = 4
+#else
+	static u8 ExtCsd[512] __attribute__ ((aligned(32)));
+	u8 SCR[8] __attribute__ ((aligned(32))) = { 0U };
+#endif
+	u8 ReadBuff[64] = { 0U };
+	s32 Status;
+	u32 Arg;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Default settings */
+	InstancePtr->BusWidth = XSDPS_1_BIT_WIDTH;
+	InstancePtr->CardType = XSDPS_CARD_SD;
+	InstancePtr->Switch1v8 = 0U;
+	InstancePtr->BusSpeed = XSDPS_CLK_400_KHZ;
+
+	if ((InstancePtr->HC_Version == XSDPS_HC_SPEC_V3) &&
+			((InstancePtr->Host_Caps & XSDPS_CAPS_SLOT_TYPE_MASK)
+			== XSDPS_CAPS_EMB_SLOT)) {
+		InstancePtr->CardType = XSDPS_CHIP_EMMC;
+	} else {
+		Status = XSdPs_IdentifyCard(InstancePtr);
+		if (Status == XST_FAILURE) {
+			goto RETURN_PATH;
+		}
+	}
+
+	if ((InstancePtr->CardType != XSDPS_CARD_SD) &&
+		(InstancePtr->CardType != XSDPS_CARD_MMC) &&
+		(InstancePtr->CardType != XSDPS_CHIP_EMMC)) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	if (InstancePtr->CardType == XSDPS_CARD_SD) {
+		Status = XSdPs_SdCardInitialize(InstancePtr);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		/* Change clock to default clock 25MHz */
+		/*
+		 * SD default speed mode timing should be closed at 19 MHz.
+		 * The reason for this is SD requires a voltage level shifter.
+		 * This limitation applies to ZynqMPSoC.
+		 */
+		if (InstancePtr->HC_Version == XSDPS_HC_SPEC_V3)
+			InstancePtr->BusSpeed = SD_CLK_19_MHZ;
+		else
+			InstancePtr->BusSpeed = SD_CLK_25_MHZ;
+		Status = XSdPs_Change_ClkFreq(InstancePtr, InstancePtr->BusSpeed);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+	} else if ((InstancePtr->CardType == XSDPS_CARD_MMC)
+			|| (InstancePtr->CardType == XSDPS_CHIP_EMMC)) {
+		Status = XSdPs_MmcCardInitialize(InstancePtr);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+		/* Change clock to default clock 26MHz */
+		InstancePtr->BusSpeed = SD_CLK_26_MHZ;
+		Status = XSdPs_Change_ClkFreq(InstancePtr, InstancePtr->BusSpeed);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} else {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	Status = XSdPs_Select_Card(InstancePtr);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	if (InstancePtr->CardType == XSDPS_CARD_SD) {
+		/* Pull-up disconnected during data transfer */
+		Status = XSdPs_Pullup(InstancePtr);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		Status = XSdPs_Get_BusWidth(InstancePtr, SCR);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		if ((SCR[1] & WIDTH_4_BIT_SUPPORT) != 0U) {
+			Status = XSdPs_Change_BusWidth(InstancePtr);
+			if (Status != XST_SUCCESS) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		}
+
+		/* Get speed supported by device */
+		Status = XSdPs_Get_BusSpeed(InstancePtr, ReadBuff);
+		if (Status != XST_SUCCESS) {
+			goto RETURN_PATH;
+		}
+
+		if (((SCR[2] & SCR_SPEC_VER_3) != 0U) &&
+			(ReadBuff[13] >= UHS_SDR50_SUPPORT) &&
+			(InstancePtr->Config.BusWidth == XSDPS_WIDTH_8) &&
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32) || (PSU_PMU)
+			(XGetPSVersion_Info() > XPS_VERSION_1) &&
+#endif
+			(InstancePtr->Switch1v8 == 0U)) {
+			u16 CtrlReg, ClockReg;
+
+			/* Stop the clock */
+			CtrlReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_CLK_CTRL_OFFSET);
+			CtrlReg &= ~(XSDPS_CC_SD_CLK_EN_MASK | XSDPS_CC_INT_CLK_EN_MASK);
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress, XSDPS_CLK_CTRL_OFFSET,
+					CtrlReg);
+
+			/* Enabling 1.8V in controller */
+			CtrlReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_HOST_CTRL2_OFFSET);
+			CtrlReg |= XSDPS_HC2_1V8_EN_MASK;
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress, XSDPS_HOST_CTRL2_OFFSET,
+					CtrlReg);
+
+			/* Wait minimum 5mSec */
+			(void)usleep(5000U);
+
+			/* Check for 1.8V signal enable bit is cleared by Host */
+			CtrlReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_HOST_CTRL2_OFFSET);
+			if ((CtrlReg & XSDPS_HC2_1V8_EN_MASK) == 0U) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+
+			/* Wait for internal clock to stabilize */
+			ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_CLK_CTRL_OFFSET);
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_CLK_CTRL_OFFSET,
+						ClockReg | XSDPS_CC_INT_CLK_EN_MASK);
+			ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+								XSDPS_CLK_CTRL_OFFSET);
+			while((ClockReg & XSDPS_CC_INT_CLK_STABLE_MASK) == 0U) {
+				ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+							XSDPS_CLK_CTRL_OFFSET);
+			}
+
+			/* Enable SD clock */
+			ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_CLK_CTRL_OFFSET);
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_CLK_CTRL_OFFSET,
+					ClockReg | XSDPS_CC_SD_CLK_EN_MASK);
+
+			/* Wait for 1mSec */
+			(void)usleep(1000U);
+
+			InstancePtr->Switch1v8 = 1U;
+		}
+
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+		if (InstancePtr->Switch1v8 != 0U) {
+
+			/* Identify the UHS mode supported by card */
+			XSdPs_Identify_UhsMode(InstancePtr, ReadBuff);
+
+			/* Set UHS-I SDR104 mode */
+			Status = XSdPs_Uhs_ModeInit(InstancePtr, InstancePtr->Mode);
+			if (Status != XST_SUCCESS) {
+				goto RETURN_PATH;
+			}
+
+		} else {
+#endif
+			/*
+			 * card supports CMD6 when SD_SPEC field in SCR register
+			 * indicates that the Physical Layer Specification Version
+			 * is 1.10 or later. So for SD v1.0 cmd6 is not supported.
+			 */
+			if (SCR[0] != 0U) {
+				/* Check for high speed support */
+				if (((ReadBuff[13] & HIGH_SPEED_SUPPORT) != 0U) &&
+						(InstancePtr->BusWidth >= XSDPS_4_BIT_WIDTH)) {
+					InstancePtr->Mode = XSDPS_HIGH_SPEED_MODE;
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+					InstancePtr->Config_TapDelay = XSdPs_hsd_sdr25_tapdelay;
+#endif
+					Status = XSdPs_Change_BusSpeed(InstancePtr);
+					if (Status != XST_SUCCESS) {
+						Status = XST_FAILURE;
+						goto RETURN_PATH;
+					}
+				}
+			}
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+		}
+#endif
+
+	} else if (((InstancePtr->CardType == XSDPS_CARD_MMC) &&
+				(InstancePtr->Card_Version > CSD_SPEC_VER_3)) &&
+				(InstancePtr->HC_Version == XSDPS_HC_SPEC_V2)) {
+
+		Status = XSdPs_Change_BusWidth(InstancePtr);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		Status = XSdPs_Get_Mmc_ExtCsd(InstancePtr, ExtCsd);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		InstancePtr->SectorCount = ((u32)ExtCsd[EXT_CSD_SEC_COUNT_BYTE4]) << 24;
+		InstancePtr->SectorCount |= (u32)ExtCsd[EXT_CSD_SEC_COUNT_BYTE3] << 16;
+		InstancePtr->SectorCount |= (u32)ExtCsd[EXT_CSD_SEC_COUNT_BYTE2] << 8;
+		InstancePtr->SectorCount |= (u32)ExtCsd[EXT_CSD_SEC_COUNT_BYTE1];
+
+		if (((ExtCsd[EXT_CSD_DEVICE_TYPE_BYTE] &
+				EXT_CSD_DEVICE_TYPE_HIGH_SPEED) != 0U) &&
+				(InstancePtr->BusWidth >= XSDPS_4_BIT_WIDTH)) {
+			InstancePtr->Mode = XSDPS_HIGH_SPEED_MODE;
+			Status = XSdPs_Change_BusSpeed(InstancePtr);
+			if (Status != XST_SUCCESS) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+
+			Status = XSdPs_Get_Mmc_ExtCsd(InstancePtr, ExtCsd);
+			if (Status != XST_SUCCESS) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+
+			if (ExtCsd[EXT_CSD_HS_TIMING_BYTE] != EXT_CSD_HS_TIMING_HIGH) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		}
+	} else if (InstancePtr->CardType == XSDPS_CHIP_EMMC){
+		/* Change bus width to 8-bit */
+		Status = XSdPs_Change_BusWidth(InstancePtr);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		/* Get Extended CSD */
+		Status = XSdPs_Get_Mmc_ExtCsd(InstancePtr, ExtCsd);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		InstancePtr->SectorCount = ((u32)ExtCsd[EXT_CSD_SEC_COUNT_BYTE4]) << 24;
+		InstancePtr->SectorCount |= (u32)ExtCsd[EXT_CSD_SEC_COUNT_BYTE3] << 16;
+		InstancePtr->SectorCount |= (u32)ExtCsd[EXT_CSD_SEC_COUNT_BYTE2] << 8;
+		InstancePtr->SectorCount |= (u32)ExtCsd[EXT_CSD_SEC_COUNT_BYTE1];
+
+		/* Check for card supported speed */
+		if (((ExtCsd[EXT_CSD_DEVICE_TYPE_BYTE] &
+				(EXT_CSD_DEVICE_TYPE_SDR_1V8_HS200 |
+				EXT_CSD_DEVICE_TYPE_SDR_1V2_HS200)) != 0U) &&
+				(InstancePtr->BusWidth >= XSDPS_4_BIT_WIDTH)) {
+			InstancePtr->Mode = XSDPS_HS200_MODE;
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+			InstancePtr->Config_TapDelay = XSdPs_sdr104_hs200_tapdelay;
+#endif
+		} else if (((ExtCsd[EXT_CSD_DEVICE_TYPE_BYTE] &
+				(EXT_CSD_DEVICE_TYPE_DDR_1V8_HIGH_SPEED |
+				EXT_CSD_DEVICE_TYPE_DDR_1V2_HIGH_SPEED)) != 0U) &&
+				(InstancePtr->BusWidth >= XSDPS_4_BIT_WIDTH)) {
+			InstancePtr->Mode = XSDPS_DDR52_MODE;
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+			InstancePtr->Config_TapDelay = XSdPs_ddr50_tapdelay;
+#endif
+		} else if (((ExtCsd[EXT_CSD_DEVICE_TYPE_BYTE] &
+				EXT_CSD_DEVICE_TYPE_HIGH_SPEED) != 0U) &&
+				(InstancePtr->BusWidth >= XSDPS_4_BIT_WIDTH)) {
+			InstancePtr->Mode = XSDPS_HIGH_SPEED_MODE;
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+			InstancePtr->Config_TapDelay = XSdPs_hsd_sdr25_tapdelay;
+#endif
+		} else
+			InstancePtr->Mode = XSDPS_DEFAULT_SPEED_MODE;
+
+		if (InstancePtr->Mode != XSDPS_DEFAULT_SPEED_MODE) {
+			Status = XSdPs_Change_BusSpeed(InstancePtr);
+			if (Status != XST_SUCCESS) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+
+			Status = XSdPs_Get_Mmc_ExtCsd(InstancePtr, ExtCsd);
+			if (Status != XST_SUCCESS) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+
+			if (InstancePtr->Mode == XSDPS_HS200_MODE) {
+				if (ExtCsd[EXT_CSD_HS_TIMING_BYTE] != EXT_CSD_HS_TIMING_HS200) {
+					Status = XST_FAILURE;
+					goto RETURN_PATH;
+				}
+			}
+
+			if ((InstancePtr->Mode == XSDPS_HIGH_SPEED_MODE) ||
+					InstancePtr->Mode == XSDPS_DDR52_MODE) {
+				if (ExtCsd[EXT_CSD_HS_TIMING_BYTE] != EXT_CSD_HS_TIMING_HIGH) {
+					Status = XST_FAILURE;
+					goto RETURN_PATH;
+				}
+
+				if (InstancePtr->Mode == XSDPS_DDR52_MODE) {
+					Status = XSdPs_Change_BusWidth(InstancePtr);
+					if (Status != XST_SUCCESS) {
+						Status = XST_FAILURE;
+						goto RETURN_PATH;
+					}
+				}
+			}
+		}
+
+		/* Enable Rst_n_Fun bit if it is disabled */
+		if(ExtCsd[EXT_CSD_RST_N_FUN_BYTE] == EXT_CSD_RST_N_FUN_TEMP_DIS) {
+			Arg = XSDPS_MMC_RST_FUN_EN_ARG;
+			Status = XSdPs_Set_Mmc_ExtCsd(InstancePtr, Arg);
+			if (Status != XST_SUCCESS) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		}
+	}
+	if ((InstancePtr->Mode != XSDPS_DDR52_MODE) ||
+			(InstancePtr->CardType == XSDPS_CARD_SD)) {
+		Status = XSdPs_SetBlkSize(InstancePtr, XSDPS_BLK_SIZE_512_MASK);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	}
+
+RETURN_PATH:
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* Identify type of card using CMD0 + CMD1 sequence
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+******************************************************************************/
+static s32 XSdPs_IdentifyCard(XSdPs *InstancePtr)
+{
+	s32 Status;
+	u8 ReadReg;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* 74 CLK delay after card is powered up, before the first command. */
+	usleep(XSDPS_INIT_DELAY);
+
+	/* CMD0 no response expected */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD0, 0U, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/* Host High Capacity support & High voltage window */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD1,
+			XSDPS_ACMD41_HCS | XSDPS_CMD1_HIGH_VOL, 0U);
+	if (Status != XST_SUCCESS) {
+		InstancePtr->CardType = XSDPS_CARD_SD;
+	} else {
+		InstancePtr->CardType = XSDPS_CARD_MMC;
+	}
+
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_OFFSET, XSDPS_NORM_INTR_ALL_MASK);
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_ERR_INTR_STS_OFFSET, XSDPS_ERROR_INTR_ALL_MASK);
+
+	/* "Software reset for all" is initiated */
+	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress, XSDPS_SW_RST_OFFSET,
+			XSDPS_SWRST_CMD_LINE_MASK);
+
+	/* Proceed with initialization only after reset is complete */
+	ReadReg = XSdPs_ReadReg8(InstancePtr->Config.BaseAddress,
+					XSDPS_SW_RST_OFFSET);
+	while ((ReadReg & XSDPS_SWRST_CMD_LINE_MASK) != 0U) {
+		ReadReg = XSdPs_ReadReg8(InstancePtr->Config.BaseAddress,
+					XSDPS_SW_RST_OFFSET);
+	}
+
+	Status = XST_SUCCESS;
+
+RETURN_PATH:
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* Switches the SD card voltage from 3v3 to 1v8
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+******************************************************************************/
+static s32 XSdPs_Switch_Voltage(XSdPs *InstancePtr)
+{
+	s32 Status;
+	u16 CtrlReg;
+	u32 ReadReg, ClockReg;
+
+	/* Send switch voltage command */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD11, 0U, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+	}
+
+	/* Wait for CMD and DATA line to go low */
+	ReadReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XSDPS_PRES_STATE_OFFSET);
+	while ((ReadReg & (XSDPS_PSR_CMD_SG_LVL_MASK |
+					XSDPS_PSR_DAT30_SG_LVL_MASK)) != 0U) {
+		ReadReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XSDPS_PRES_STATE_OFFSET);
+	}
+
+	/* Stop the clock */
+	CtrlReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET);
+	CtrlReg &= ~(XSDPS_CC_SD_CLK_EN_MASK | XSDPS_CC_INT_CLK_EN_MASK);
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress, XSDPS_CLK_CTRL_OFFSET,
+			CtrlReg);
+
+	/* Enabling 1.8V in controller */
+	CtrlReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_HOST_CTRL2_OFFSET);
+	CtrlReg |= XSDPS_HC2_1V8_EN_MASK;
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress, XSDPS_HOST_CTRL2_OFFSET,
+			CtrlReg);
+
+	/* Wait minimum 5mSec */
+	(void)usleep(5000U);
+
+	/* Check for 1.8V signal enable bit is cleared by Host */
+	CtrlReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_HOST_CTRL2_OFFSET);
+	if ((CtrlReg & XSDPS_HC2_1V8_EN_MASK) == 0U) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/* Wait for internal clock to stabilize */
+	ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_CLK_CTRL_OFFSET);
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_CLK_CTRL_OFFSET,
+				ClockReg | XSDPS_CC_INT_CLK_EN_MASK);
+	ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_CLK_CTRL_OFFSET);
+	while((ClockReg & XSDPS_CC_INT_CLK_STABLE_MASK) == 0U) {
+		ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_CLK_CTRL_OFFSET);
+	}
+
+	/* Enable SD clock */
+	ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET);
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET,
+			ClockReg | XSDPS_CC_SD_CLK_EN_MASK);
+
+	/* Wait for 1mSec */
+	(void)usleep(1000U);
+
+	/* Wait for CMD and DATA line to go high */
+	ReadReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XSDPS_PRES_STATE_OFFSET);
+	while ((ReadReg & (XSDPS_PSR_CMD_SG_LVL_MASK | XSDPS_PSR_DAT30_SG_LVL_MASK))
+			!= (XSDPS_PSR_CMD_SG_LVL_MASK | XSDPS_PSR_DAT30_SG_LVL_MASK)) {
+		ReadReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XSDPS_PRES_STATE_OFFSET);
+	}
+
+RETURN_PATH:
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+
+* This function does SD command generation.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Cmd is the command to be sent.
+* @param	Arg is the argument to be sent along with the command.
+* 		This could be address or any other information
+* @param	BlkCnt - Block count passed by the user.
+*
+* @return
+* 		- XST_SUCCESS if initialization was successful
+* 		- XST_FAILURE if failure - could be because another transfer
+* 			is in progress or command or data inhibit is set
+*
+******************************************************************************/
+s32 XSdPs_CmdTransfer(XSdPs *InstancePtr, u32 Cmd, u32 Arg, u32 BlkCnt)
+{
+	u32 PresentStateReg;
+	u32 CommandReg;
+	u32 StatusReg;
+	s32 Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Check the command inhibit to make sure no other
+	 * command transfer is in progress
+	 */
+	PresentStateReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_PRES_STATE_OFFSET);
+	if ((PresentStateReg & XSDPS_PSR_INHIBIT_CMD_MASK) != 0U) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/* Write block count register */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_BLK_CNT_OFFSET, (u16)BlkCnt);
+
+	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+			XSDPS_TIMEOUT_CTRL_OFFSET, 0xEU);
+
+	/* Write argument register */
+	XSdPs_WriteReg(InstancePtr->Config.BaseAddress,
+			XSDPS_ARGMT_OFFSET, Arg);
+
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_OFFSET, XSDPS_NORM_INTR_ALL_MASK);
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_ERR_INTR_STS_OFFSET, XSDPS_ERROR_INTR_ALL_MASK);
+	/* Command register is set to trigger transfer of command */
+	CommandReg = XSdPs_FrameCmd(InstancePtr, Cmd);
+
+	/*
+	 * Mask to avoid writing to reserved bits 31-30
+	 * This is necessary because 0x80000000 is used  by this software to
+	 * distinguish between ACMD and CMD of same number
+	 */
+	CommandReg = CommandReg & 0x3FFFU;
+
+	/*
+	 * Check for data inhibit in case of command using DAT lines.
+	 * For Tuning Commands DAT lines check can be ignored.
+	 */
+	if ((Cmd != CMD21) && (Cmd != CMD19)) {
+		PresentStateReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XSDPS_PRES_STATE_OFFSET);
+		if (((PresentStateReg & (XSDPS_PSR_INHIBIT_DAT_MASK |
+									XSDPS_PSR_INHIBIT_DAT_MASK)) != 0U) &&
+				((CommandReg & XSDPS_DAT_PRESENT_SEL_MASK) != 0U)) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	}
+
+	XSdPs_WriteReg(InstancePtr->Config.BaseAddress, XSDPS_XFER_MODE_OFFSET,
+			(CommandReg << 16) | TransferMode);
+
+	/* Polling for response for now */
+	do {
+		StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_NORM_INTR_STS_OFFSET);
+		if ((Cmd == CMD21) || (Cmd == CMD19)) {
+			if ((XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_NORM_INTR_STS_OFFSET) & XSDPS_INTR_BRR_MASK) != 0U){
+				XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_BRR_MASK);
+				break;
+			}
+		}
+
+		if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+			Status = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+									XSDPS_ERR_INTR_STS_OFFSET);
+			if ((Status & ~XSDPS_INTR_ERR_CT_MASK) == 0) {
+				Status = XSDPS_CT_ERROR;
+			}
+			 /* Write to clear error bits */
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_ERR_INTR_STS_OFFSET,
+					XSDPS_ERROR_INTR_ALL_MASK);
+			goto RETURN_PATH;
+		}
+	} while((StatusReg & XSDPS_INTR_CC_MASK) == 0U);
+	/* Write to clear bit */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_OFFSET,
+			XSDPS_INTR_CC_MASK);
+
+	Status = XST_SUCCESS;
+
+RETURN_PATH:
+		return Status;
+
+}
+
+/*****************************************************************************/
+/**
+* This function frames the Command register for a particular command.
+* Note that this generates only the command register value i.e.
+* the upper 16 bits of the transfer mode and command register.
+* This value is already shifted to be upper 16 bits and can be directly
+* OR'ed with transfer mode register value.
+*
+* @param	Command to be sent.
+*
+* @return	Command register value complete with response type and
+* 		data, CRC and index related flags.
+*
+******************************************************************************/
+u32 XSdPs_FrameCmd(XSdPs *InstancePtr, u32 Cmd)
+{
+		u32 RetVal;
+
+		RetVal = Cmd;
+
+		switch(Cmd) {
+		case CMD0:
+			RetVal |= RESP_NONE;
+		break;
+		case CMD1:
+			RetVal |= RESP_R3;
+		break;
+		case CMD2:
+			RetVal |= RESP_R2;
+		break;
+		case CMD3:
+			RetVal |= RESP_R6;
+		break;
+		case CMD4:
+			RetVal |= RESP_NONE;
+			break;
+		case CMD5:
+			RetVal |= RESP_R1B;
+		break;
+		case CMD6:
+			if (InstancePtr->CardType == XSDPS_CARD_SD) {
+				RetVal |= RESP_R1 | (u32)XSDPS_DAT_PRESENT_SEL_MASK;
+			} else {
+				RetVal |= RESP_R1B;
+			}
+			break;
+		case ACMD6:
+			RetVal |= RESP_R1;
+		break;
+		case CMD7:
+			RetVal |= RESP_R1;
+		break;
+		case CMD8:
+			if (InstancePtr->CardType == XSDPS_CARD_SD) {
+				RetVal |= RESP_R1;
+			} else {
+				RetVal |= RESP_R1 | (u32)XSDPS_DAT_PRESENT_SEL_MASK;
+			}
+			break;
+		case CMD9:
+			RetVal |= RESP_R2;
+		break;
+		case CMD11:
+		case CMD10:
+		case CMD12:
+		case ACMD13:
+		case CMD16:
+			RetVal |= RESP_R1;
+		break;
+		case CMD17:
+		case CMD18:
+		case CMD19:
+		case CMD21:
+			RetVal |= RESP_R1 | (u32)XSDPS_DAT_PRESENT_SEL_MASK;
+		break;
+		case CMD23:
+		case ACMD23:
+		case CMD24:
+		case CMD25:
+			RetVal |= RESP_R1 | (u32)XSDPS_DAT_PRESENT_SEL_MASK;
+		case ACMD41:
+			RetVal |= RESP_R3;
+		break;
+		case ACMD42:
+			RetVal |= RESP_R1;
+		break;
+		case ACMD51:
+			RetVal |= RESP_R1 | (u32)XSDPS_DAT_PRESENT_SEL_MASK;
+		break;
+		case CMD52:
+		case CMD55:
+			RetVal |= RESP_R1;
+		break;
+		case CMD58:
+		break;
+		default :
+			RetVal |= Cmd;
+		break;
+		}
+
+		return RetVal;
+}
+
+/*****************************************************************************/
+/**
+* This function performs SD read in polled mode.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Arg is the address passed by the user that is to be sent as
+* 		argument along with the command.
+* @param	BlkCnt - Block count passed by the user.
+* @param	Buff - Pointer to the data buffer for a DMA transfer.
+*
+* @return
+* 		- XST_SUCCESS if initialization was successful
+* 		- XST_FAILURE if failure - could be because another transfer
+* 		is in progress or command or data inhibit is set
+*
+******************************************************************************/
+s32 XSdPs_ReadPolled(XSdPs *InstancePtr, u32 Arg, u32 BlkCnt, u8 *Buff)
+{
+	s32 Status;
+	u32 PresentStateReg;
+	u32 StatusReg;
+
+	if ((InstancePtr->HC_Version != XSDPS_HC_SPEC_V3) ||
+				((InstancePtr->Host_Caps & XSDPS_CAPS_SLOT_TYPE_MASK)
+				!= XSDPS_CAPS_EMB_SLOT)) {
+		if(InstancePtr->Config.CardDetect != 0U) {
+			/* Check status to ensure card is initialized */
+			PresentStateReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XSDPS_PRES_STATE_OFFSET);
+			if ((PresentStateReg & XSDPS_PSR_CARD_INSRT_MASK) == 0x0U) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		}
+	}
+
+	/* Set block size to 512 if not already set */
+	if( XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_BLK_SIZE_OFFSET) != XSDPS_BLK_SIZE_512_MASK ) {
+		Status = XSdPs_SetBlkSize(InstancePtr,
+			XSDPS_BLK_SIZE_512_MASK);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	}
+
+	XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, Buff);
+	if (InstancePtr->Config.IsCacheCoherent == 0) {
+		Xil_DCacheInvalidateRange((INTPTR)Buff,
+			BlkCnt * XSDPS_BLK_SIZE_512_MASK);
+	}
+
+	if (BlkCnt == 1U) {
+		TransferMode = XSDPS_TM_BLK_CNT_EN_MASK |
+			XSDPS_TM_DAT_DIR_SEL_MASK | XSDPS_TM_DMA_EN_MASK;
+
+		/* Send single block read command */
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD17, Arg, BlkCnt);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} else {
+		TransferMode = XSDPS_TM_AUTO_CMD12_EN_MASK |
+			XSDPS_TM_BLK_CNT_EN_MASK | XSDPS_TM_DAT_DIR_SEL_MASK |
+			XSDPS_TM_DMA_EN_MASK | XSDPS_TM_MUL_SIN_BLK_SEL_MASK;
+
+		/* Send multiple blocks read command */
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD18, Arg, BlkCnt);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	}
+
+	/* Check for transfer complete */
+	do {
+		StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_NORM_INTR_STS_OFFSET);
+		if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+			/* Write to clear error bits */
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_ERR_INTR_STS_OFFSET,
+					XSDPS_ERROR_INTR_ALL_MASK);
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} while((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+	/* Write to clear bit */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+	Status = (s32)XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+
+	Status = XST_SUCCESS;
+
+RETURN_PATH:
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+* This function performs SD write in polled mode.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	Arg is the address passed by the user that is to be sent as
+* 		argument along with the command.
+* @param	BlkCnt - Block count passed by the user.
+* @param	Buff - Pointer to the data buffer for a DMA transfer.
+*
+* @return
+* 		- XST_SUCCESS if initialization was successful
+* 		- XST_FAILURE if failure - could be because another transfer
+* 		is in progress or command or data inhibit is set
+*
+******************************************************************************/
+s32 XSdPs_WritePolled(XSdPs *InstancePtr, u32 Arg, u32 BlkCnt, const u8 *Buff)
+{
+	s32 Status;
+	u32 PresentStateReg;
+	u32 StatusReg;
+
+	if ((InstancePtr->HC_Version != XSDPS_HC_SPEC_V3) ||
+				((InstancePtr->Host_Caps & XSDPS_CAPS_SLOT_TYPE_MASK)
+				!= XSDPS_CAPS_EMB_SLOT)) {
+		if(InstancePtr->Config.CardDetect != 0U) {
+			/* Check status to ensure card is initialized */
+			PresentStateReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XSDPS_PRES_STATE_OFFSET);
+			if ((PresentStateReg & XSDPS_PSR_CARD_INSRT_MASK) == 0x0U) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		}
+	}
+
+	/* Set block size to 512 if not already set */
+	if( XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_BLK_SIZE_OFFSET) != XSDPS_BLK_SIZE_512_MASK ) {
+		Status = XSdPs_SetBlkSize(InstancePtr,
+			XSDPS_BLK_SIZE_512_MASK);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+	}
+
+	XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, Buff);
+	if (InstancePtr->Config.IsCacheCoherent == 0) {
+		Xil_DCacheFlushRange((INTPTR)Buff,
+			BlkCnt * XSDPS_BLK_SIZE_512_MASK);
+	}
+
+	if (BlkCnt == 1U) {
+		TransferMode = XSDPS_TM_BLK_CNT_EN_MASK | XSDPS_TM_DMA_EN_MASK;
+
+		/* Send single block write command */
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD24, Arg, BlkCnt);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} else {
+		TransferMode = XSDPS_TM_AUTO_CMD12_EN_MASK |
+			XSDPS_TM_BLK_CNT_EN_MASK |
+			XSDPS_TM_MUL_SIN_BLK_SEL_MASK | XSDPS_TM_DMA_EN_MASK;
+
+		/* Send multiple blocks write command */
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD25, Arg, BlkCnt);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	}
+
+	/*
+	 * Check for transfer complete
+	 * Polling for response for now
+	 */
+	do {
+		StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_NORM_INTR_STS_OFFSET);
+		if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+			/* Write to clear error bits */
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_ERR_INTR_STS_OFFSET,
+					XSDPS_ERROR_INTR_ALL_MASK);
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} while((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+	/* Write to clear bit */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH:
+		return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* Selects card and sets default block size
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if fail.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XSdPs_Select_Card (XSdPs *InstancePtr)
+{
+	s32 Status = 0;
+
+	/* Send CMD7 - Select card */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD7,
+			InstancePtr->RelCardAddr, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+RETURN_PATH:
+		return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* API to setup ADMA2 descriptor table
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+* @param	BlkCnt - block count.
+* @param	Buff pointer to data buffer.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void XSdPs_SetupADMA2DescTbl(XSdPs *InstancePtr, u32 BlkCnt, const u8 *Buff)
+{
+	u32 TotalDescLines = 0U;
+	u32 DescNum = 0U;
+	u32 BlkSize = 0U;
+
+	/* Setup ADMA2 - Write descriptor table and point ADMA SAR to it */
+	BlkSize = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_BLK_SIZE_OFFSET);
+	BlkSize = BlkSize & XSDPS_BLK_SIZE_MASK;
+
+	if((BlkCnt*BlkSize) < XSDPS_DESC_MAX_LENGTH) {
+
+		TotalDescLines = 1U;
+
+	}else {
+
+		TotalDescLines = ((BlkCnt*BlkSize) / XSDPS_DESC_MAX_LENGTH);
+		if (((BlkCnt * BlkSize) % XSDPS_DESC_MAX_LENGTH) != 0U) {
+			TotalDescLines += 1U;
+		}
+
+	}
+
+	for (DescNum = 0U; DescNum < (TotalDescLines-1); DescNum++) {
+#ifdef __aarch64__
+		InstancePtr->Adma2_DescrTbl[DescNum].Address =
+				(u64)((UINTPTR)Buff + (DescNum*XSDPS_DESC_MAX_LENGTH));
+#else
+		InstancePtr->Adma2_DescrTbl[DescNum].Address =
+				(u32)((UINTPTR)Buff + (DescNum*XSDPS_DESC_MAX_LENGTH));
+#endif
+		InstancePtr->Adma2_DescrTbl[DescNum].Attribute =
+				XSDPS_DESC_TRAN | XSDPS_DESC_VALID;
+		/* This will write '0' to length field which indicates 65536 */
+		InstancePtr->Adma2_DescrTbl[DescNum].Length =
+				(u16)XSDPS_DESC_MAX_LENGTH;
+	}
+
+#ifdef __aarch64__
+	InstancePtr->Adma2_DescrTbl[TotalDescLines-1].Address =
+			(u64)((UINTPTR)Buff + (DescNum*XSDPS_DESC_MAX_LENGTH));
+#else
+	InstancePtr->Adma2_DescrTbl[TotalDescLines-1].Address =
+			(u32)((UINTPTR)Buff + (DescNum*XSDPS_DESC_MAX_LENGTH));
+#endif
+
+	InstancePtr->Adma2_DescrTbl[TotalDescLines-1].Attribute =
+			XSDPS_DESC_TRAN | XSDPS_DESC_END | XSDPS_DESC_VALID;
+
+	InstancePtr->Adma2_DescrTbl[TotalDescLines-1].Length =
+			(u16)((BlkCnt*BlkSize) - (DescNum*XSDPS_DESC_MAX_LENGTH));
+
+#ifdef __aarch64__
+	XSdPs_WriteReg(InstancePtr->Config.BaseAddress, XSDPS_ADMA_SAR_EXT_OFFSET,
+			(u32)(((u64)&(InstancePtr->Adma2_DescrTbl[0]))>>32));
+#endif
+
+	XSdPs_WriteReg(InstancePtr->Config.BaseAddress, XSDPS_ADMA_SAR_OFFSET,
+			(u32)(UINTPTR)&(InstancePtr->Adma2_DescrTbl[0]));
+
+	if (InstancePtr->Config.IsCacheCoherent == 0) {
+		Xil_DCacheFlushRange((INTPTR)&(InstancePtr->Adma2_DescrTbl[0]),
+			sizeof(XSdPs_Adma2Descriptor) * 32U);
+	}
+}
+
+/*****************************************************************************/
+/**
+* Mmc initialization is done in this function
+*
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+*
+* @return
+* 		- XST_SUCCESS if initialization was successful
+* 		- XST_FAILURE if failure - could be because
+* 			a) MMC is already initialized
+* 			b) There is no card inserted
+* 			c) One of the steps (commands) in the initialization
+*			   cycle failed
+* @note 	This function initializes the SD card by following its
+*		initialization and identification state diagram.
+*		CMD0 is sent to reset card.
+*		CMD1 sent to identify voltage and high capacity support
+*		CMD2 and CMD3 are sent to obtain Card ID and
+*		Relative card address respectively.
+*		CMD9 is sent to read the card specific data.
+*
+******************************************************************************/
+s32 XSdPs_MmcCardInitialize(XSdPs *InstancePtr)
+{
+	u32 PresentStateReg;
+	s32 Status;
+	u32 RespOCR;
+	u32 CSD[4];
+	u32 BlkLen, DeviceSize, Mult;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if ((InstancePtr->HC_Version != XSDPS_HC_SPEC_V3) ||
+				((InstancePtr->Host_Caps & XSDPS_CAPS_SLOT_TYPE_MASK)
+				!= XSDPS_CAPS_EMB_SLOT)) {
+		if(InstancePtr->Config.CardDetect != 0U) {
+			/*
+			 * Check the present state register to make sure
+			 * card is inserted and detected by host controller
+			 */
+			PresentStateReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XSDPS_PRES_STATE_OFFSET);
+			if ((PresentStateReg & XSDPS_PSR_CARD_INSRT_MASK) == 0U)	{
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		}
+	}
+
+	/* CMD0 no response expected */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD0, 0U, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	RespOCR = 0U;
+	/* Send CMD1 while card is still busy with power up */
+	while ((RespOCR & XSDPS_RESPOCR_READY) == 0U) {
+
+		/* Host High Capacity support & High volage window */
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD1,
+				XSDPS_ACMD41_HCS | XSDPS_CMD1_HIGH_VOL, 0U);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		/* Response with card capacity */
+		RespOCR = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XSDPS_RESP0_OFFSET);
+
+	}
+
+	/* Update HCS support flag based on card capacity response */
+	if ((RespOCR & XSDPS_ACMD41_HCS) != 0U) {
+		InstancePtr->HCS = 1U;
+	}
+
+	/* CMD2 for Card ID */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD2, 0U, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	InstancePtr->CardID[0] =
+			XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+	InstancePtr->CardID[1] =
+			XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP1_OFFSET);
+	InstancePtr->CardID[2] =
+			XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP2_OFFSET);
+	InstancePtr->CardID[3] =
+			XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP3_OFFSET);
+
+	/* Set relative card address */
+	InstancePtr->RelCardAddr = 0x12340000U;
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD3, (InstancePtr->RelCardAddr), 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD9, (InstancePtr->RelCardAddr), 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/*
+	 * Card specific data is read.
+	 * Currently not used for any operation.
+	 */
+	CSD[0] = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+	CSD[1] = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP1_OFFSET);
+	CSD[2] = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP2_OFFSET);
+	CSD[3] = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP3_OFFSET);
+
+	InstancePtr->Card_Version =  (CSD[3] & CSD_SPEC_VER_MASK) >>18U;
+
+	/* Calculating the memory capacity */
+	BlkLen = 1 << ((CSD[2] & READ_BLK_LEN_MASK) >> 8U);
+	Mult = 1 << (((CSD[1] & C_SIZE_MULT_MASK) >> 7U) + 2U);
+	DeviceSize = (CSD[1] & C_SIZE_LOWER_MASK) >> 22U;
+	DeviceSize |= (CSD[2] & C_SIZE_UPPER_MASK) << 10U;
+	DeviceSize = (DeviceSize + 1U) * Mult;
+	DeviceSize =  DeviceSize * BlkLen;
+
+	InstancePtr->SectorCount = (DeviceSize/XSDPS_BLK_SIZE_512_MASK);
+
+	Status = XST_SUCCESS;
+
+RETURN_PATH:
+	return Status;
+
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/sdps_v3_4/src/xsdps.h b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps.h
new file mode 100644
index 0000000..3f9ffd2
--- /dev/null
+++ b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps.h
@@ -0,0 +1,280 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsdps.h
+* @addtogroup sdps_v3_4
+* @{
+* @details
+*
+* This file contains the implementation of XSdPs driver.
+* This driver is used initialize read from and write to the SD card.
+* Features such as switching bus width to 4-bit and switching to high speed,
+* changing clock frequency, block size etc. are supported.
+* SD 2.0 uses 1/4 bus width and speeds of 25/50KHz. Initialization, however
+* is done using 1-bit bus width and 400KHz clock frequency.
+* SD commands are classified as broadcast and addressed. Commands can be
+* those with response only (using only command line) or
+* response + data (using command and data lines).
+* Only one command can be sent at a time. During a data transfer however,
+* when dsta lines are in use, certain commands (which use only the command
+* line) can be sent, most often to obtain status.
+* This driver does not support multi card slots at present.
+*
+* Intialization:
+* This includes initialization on the host controller side to select
+* clock frequency, bus power and default transfer related parameters.
+* The default voltage is 3.3V.
+* On the SD card side, the initialization and identification state diagram is
+* implemented. This resets the card, gives it a unique address/ID and
+* identifies key card related specifications.
+*
+* Data transfer:
+* The SD card is put in tranfer state to read from or write to it.
+* The default block size is 512 bytes and if supported,
+* default bus width is 4-bit and bus speed is High speed.
+* The read and write functions are implemented in polled mode using ADMA2.
+*
+* At any point, when key parameters such as block size or
+* clock/speed or bus width are modified, this driver takes care of
+* maintaining the same selection on host and card.
+* All error bits in host controller are monitored by the driver and in the
+* event one of them is set, driver will clear the interrupt status and
+* communicate failure to the upper layer.
+*
+* File system use:
+* This driver can be used with xilffs library to read and write files to SD.
+* (Please refer to procedure in diskio.c). The file system read/write example
+* in polled mode can used for reference.
+*
+* There is no example for using SD driver without file system at present.
+* However, the driver can be used without the file system. The glue layer
+* in filesytem can be used as reference for the same. The block count
+* passed to the read/write function in one call is limited by the ADMA2
+* descriptor table and hence care will have to be taken to call read/write
+* API's in a loop for large file sizes.
+*
+* Interrupt mode is not supported because it offers no improvement when used
+* with file system.
+*
+* eMMC support:
+* SD driver supports SD and eMMC based on the "enable MMC" parameter in SDK.
+* The features of eMMC supported by the driver will depend on those supported
+* by the host controller. The current driver supports read/write on eMMC card
+* using 4-bit and high speed mode currently.
+*
+* Features not supported include - card write protect, password setting,
+* lock/unlock, interrupts, SDMA mode, programmed I/O mode and
+* 64-bit addressed ADMA2, erase/pre-erase commands.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ---    -------- -----------------------------------------------
+* 1.00a hk/sg  10/17/13 Initial release
+* 2.0   hk      03/07/14 Version number revised.
+* 2.1   hk     04/18/14 Increase sleep for eMMC switch command.
+*                       Add sleep for microblaze designs. CR# 781117.
+* 2.2   hk     07/28/14 Make changes to enable use of data cache.
+* 2.3   sk     09/23/14 Send command for relative card address
+*                       when re-initialization is done.CR# 819614.
+*						Use XSdPs_Change_ClkFreq API whenever changing
+*						clock.CR# 816586.
+* 2.4	sk	   12/04/14 Added support for micro SD without
+* 						WP/CD. CR# 810655.
+*						Checked for DAT Inhibit mask instead of CMD
+* 						Inhibit mask in Cmd Transfer API.
+*						Added Support for SD Card v1.0
+* 2.5 	sg		07/09/15 Added SD 3.0 features
+*       kvn     07/15/15 Modified the code according to MISRAC-2012.
+* 2.6   sk     10/12/15 Added support for SD card v1.0 CR# 840601.
+* 2.7   sk     11/24/15 Considered the slot type befoe checking CD/WP pins.
+*       sk     12/10/15 Added support for MMC cards.
+*              01/08/16 Added workaround for issue in auto tuning mode
+*                       of SDR50, SDR104 and HS200.
+*       sk     02/16/16 Corrected the Tuning logic.
+*       sk     03/01/16 Removed Bus Width check for eMMC. CR# 938311.
+* 2.8   sk     04/20/16 Added new workaround for auto tuning.
+*              05/03/16 Standard Speed for SD to 19MHz in ZynqMPSoC. CR#951024
+* 3.0   sk     06/09/16 Added support for mkfs to calculate sector count.
+*       sk     07/16/16 Added support for UHS modes.
+*       sk     07/07/16 Used usleep API for both arm and microblaze.
+*       sk     07/16/16 Added Tap delays accordingly to different SD/eMMC
+*                       operating modes.
+*       sk     08/13/16 Removed sleep.h from xsdps.h as a temporary fix for
+*                       CR#956899.
+* 3.1   mi     09/07/16 Removed compilation warnings with extra compiler flags.
+*       sk     10/13/16 Reduced the delay during power cycle to 1ms as per spec
+*       sk     10/19/16 Used emmc_hwreset pin to reset eMMC.
+*       sk     11/07/16 Enable Rst_n bit in ext_csd reg if not enabled.
+*       sk     11/16/16 Issue DLL reset at 31 iteration to load new zero value.
+* 3.2   sk     11/30/16 Modified the voltage switching sequence as per spec.
+*       sk     02/01/17 Added HSD and DDR mode support for eMMC.
+*       sk     02/01/17 Consider bus width parameter from design for switching
+*       vns    02/09/17 Added ARMA53_32 support for ZynqMP CR#968397
+*       sk     03/20/17 Add support for EL1 non-secure mode.
+* 3.3   mn     05/17/17 Add support for 64bit DMA addressing
+* 	mn     08/07/17 Modify driver to support 64-bit DMA in arm64 only
+*       mn     08/17/17 Enabled CCI support for A53 by adding cache coherency
+*                       information.
+*       mn     09/06/17 Resolved compilation errors with IAR toolchain
+*
+* 

+*
+******************************************************************************/
+
+
+#ifndef SDPS_H_
+#define SDPS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "xil_printf.h"
+#include "xil_cache.h"
+#include "xstatus.h"
+#include "xsdps_hw.h"
+#include "xplatform_info.h"
+#include 
+
+/************************** Constant Definitions *****************************/
+
+#define XSDPS_CT_ERROR	0x2U	/**< Command timeout flag */
+#define MAX_TUNING_COUNT	40U		/**< Maximum Tuning count */
+
+/**************************** Type Definitions *******************************/
+
+typedef void (*XSdPs_ConfigTap) (u32 Bank, u32 DeviceId, u32 CardType);
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;			/**< Unique ID  of device */
+	u32 BaseAddress;		/**< Base address of the device */
+	u32 InputClockHz;		/**< Input clock frequency */
+	u32 CardDetect;			/**< Card Detect */
+	u32 WriteProtect;			/**< Write Protect */
+	u32 BusWidth;			/**< Bus Width */
+	u32 BankNumber;			/**< MIO Bank selection for SD */
+	u32 HasEMIO;			/**< If SD is connected to EMIO */
+	u8 IsCacheCoherent; 		/**< If SD is Cache Coherent or not */
+} XSdPs_Config;
+
+/* ADMA2 descriptor table */
+typedef struct {
+	u16 Attribute;		/**< Attributes of descriptor */
+	u16 Length;		/**< Length of current dma transfer */
+#ifdef __aarch64__
+	u64 Address;		/**< Address of current dma transfer */
+#else
+	u32 Address;		/**< Address of current dma transfer */
+#endif
+#ifdef __ICCARM__
+#pragma data_alignment = 32
+} XSdPs_Adma2Descriptor;
+#pragma data_alignment = 4
+#else
+}  __attribute__((__packed__))XSdPs_Adma2Descriptor;
+#endif
+
+/**
+ * The XSdPs driver instance data. The user is required to allocate a
+ * variable of this type for every SD device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XSdPs_Config Config;	/**< Configuration structure */
+	u32 IsReady;		/**< Device is initialized and ready */
+	u32 Host_Caps;		/**< Capabilities of host controller */
+	u32 Host_CapsExt;	/**< Extended Capabilities */
+	u32 HCS;		/**< High capacity support in card */
+	u8  CardType;		/**< Type of card - SD/MMC/eMMC */
+	u8  Card_Version;	/**< Card version */
+	u8  HC_Version;		/**< Host controller version */
+	u8  BusWidth;		/**< Current operating bus width */
+	u32 BusSpeed;		/**< Current operating bus speed */
+	u8  Switch1v8;		/**< 1.8V Switch support */
+	u32 CardID[4];		/**< Card ID Register */
+	u32 RelCardAddr;	/**< Relative Card Address */
+	u32 CardSpecData[4];	/**< Card Specific Data Register */
+	u32 SectorCount;		/**< Sector Count */
+	u32 SdCardConfig;	/**< Sd Card Configuration Register */
+	u32 Mode;			/**< Bus Speed Mode */
+	XSdPs_ConfigTap Config_TapDelay;	/**< Configuring the tap delays */
+	/**< ADMA Descriptors */
+#ifdef __ICCARM__
+#pragma data_alignment = 32
+	XSdPs_Adma2Descriptor Adma2_DescrTbl[32];
+#pragma data_alignment = 4
+#else
+	XSdPs_Adma2Descriptor Adma2_DescrTbl[32] __attribute__ ((aligned(32)));
+#endif
+} XSdPs;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+XSdPs_Config *XSdPs_LookupConfig(u16 DeviceId);
+s32 XSdPs_CfgInitialize(XSdPs *InstancePtr, XSdPs_Config *ConfigPtr,
+				u32 EffectiveAddr);
+s32 XSdPs_SdCardInitialize(XSdPs *InstancePtr);
+s32 XSdPs_ReadPolled(XSdPs *InstancePtr, u32 Arg, u32 BlkCnt, u8 *Buff);
+s32 XSdPs_WritePolled(XSdPs *InstancePtr, u32 Arg, u32 BlkCnt, const u8 *Buff);
+s32 XSdPs_SetBlkSize(XSdPs *InstancePtr, u16 BlkSize);
+s32 XSdPs_Select_Card (XSdPs *InstancePtr);
+s32 XSdPs_Change_ClkFreq(XSdPs *InstancePtr, u32 SelFreq);
+s32 XSdPs_Change_BusWidth(XSdPs *InstancePtr);
+s32 XSdPs_Change_BusSpeed(XSdPs *InstancePtr);
+s32 XSdPs_Get_BusWidth(XSdPs *InstancePtr, u8 *SCR);
+s32 XSdPs_Get_BusSpeed(XSdPs *InstancePtr, u8 *ReadBuff);
+s32 XSdPs_Pullup(XSdPs *InstancePtr);
+s32 XSdPs_MmcCardInitialize(XSdPs *InstancePtr);
+s32 XSdPs_CardInitialize(XSdPs *InstancePtr);
+s32 XSdPs_Get_Mmc_ExtCsd(XSdPs *InstancePtr, u8 *ReadBuff);
+s32 XSdPs_Set_Mmc_ExtCsd(XSdPs *InstancePtr, u32 Arg);
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+void XSdPs_Identify_UhsMode(XSdPs *InstancePtr, u8 *ReadBuff);
+void XSdPs_ddr50_tapdelay(u32 Bank, u32 DeviceId, u32 CardType);
+void XSdPs_hsd_sdr25_tapdelay(u32 Bank, u32 DeviceId, u32 CardType);
+void XSdPs_sdr104_hs200_tapdelay(u32 Bank, u32 DeviceId, u32 CardType);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SD_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_g.c b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_g.c
new file mode 100644
index 0000000..af2aff6
--- /dev/null
+++ b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_g.c
@@ -0,0 +1,62 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xsdps.h"
+
+/*
+* The configuration table for devices
+*/
+
+XSdPs_Config XSdPs_ConfigTable[XPAR_XSDPS_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_SD_1_DEVICE_ID,
+		XPAR_PSU_SD_1_BASEADDR,
+		XPAR_PSU_SD_1_SDIO_CLK_FREQ_HZ,
+		XPAR_PSU_SD_1_HAS_CD,
+		XPAR_PSU_SD_1_HAS_WP,
+		XPAR_PSU_SD_1_BUS_WIDTH,
+		XPAR_PSU_SD_1_MIO_BANK,
+		XPAR_PSU_SD_1_HAS_EMIO,
+		XPAR_PSU_SD_1_IS_CACHE_COHERENT
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_hw.h b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_hw.h
new file mode 100644
index 0000000..8d190ef
--- /dev/null
+++ b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_hw.h
@@ -0,0 +1,1301 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsdps_hw.h
+* @addtogroup sdps_v3_4
+* @{
+*
+* This header file contains the identifiers and basic HW access driver
+* functions (or  macros) that can be used to access the device. Other driver
+* functions are defined in xsdps.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ---    -------- -----------------------------------------------
+* 1.00a hk/sg  10/17/13 Initial release
+* 2.5 	sg	   07/09/15 Added SD 3.0 features
+*       kvn    07/15/15 Modified the code according to MISRAC-2012.
+* 2.7   sk     12/10/15 Added support for MMC cards.
+*       sk     03/02/16 Configured the Tap Delay values for eMMC HS200 mode.
+* 2.8   sk     04/20/16 Added new workaround for auto tuning.
+* 3.0   sk     06/09/16 Added support for mkfs to calculate sector count.
+*       sk     07/16/16 Added support for UHS modes.
+*       sk     07/16/16 Added Tap delays accordingly to different SD/eMMC
+*                       operating modes.
+* 3.1   sk     11/07/16 Enable Rst_n bit in ext_csd reg if not enabled.
+* 3.2   sk     03/20/17 Add support for EL1 non-secure mode.
+* 3.3   mn     08/22/17 Updated for Word Access System support
+*       mn     09/06/17 Added support for ARMCC toolchain
+* 3.4   mn     01/22/18 Separated out SDR104 and HS200 clock defines
+*
+* 

+*
+******************************************************************************/
+
+#ifndef SD_HW_H_
+#define SD_HW_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register Map
+ *
+ * Register offsets from the base address of an SD device.
+ * @{
+ */
+
+#define XSDPS_SDMA_SYS_ADDR_OFFSET	0x00U	/**< SDMA System Address
+							Register */
+#define XSDPS_SDMA_SYS_ADDR_LO_OFFSET	XSDPS_SDMA_SYS_ADDR_OFFSET
+						/**< SDMA System Address
+							Low Register */
+#define XSDPS_ARGMT2_LO_OFFSET		0x00U	/**< Argument2 Low Register */
+#define XSDPS_SDMA_SYS_ADDR_HI_OFFSET	0x02U	/**< SDMA System Address
+							High Register */
+#define XSDPS_ARGMT2_HI_OFFSET		0x02U	/**< Argument2 High Register */
+
+#define XSDPS_BLK_SIZE_OFFSET		0x04U	/**< Block Size Register */
+#define XSDPS_BLK_CNT_OFFSET		0x06U	/**< Block Count Register */
+#define XSDPS_ARGMT_OFFSET		0x08U	/**< Argument Register */
+#define XSDPS_ARGMT1_LO_OFFSET		XSDPS_ARGMT_OFFSET
+						/**< Argument1 Register */
+#define XSDPS_ARGMT1_HI_OFFSET		0x0AU	/**< Argument1 Register */
+
+#define XSDPS_XFER_MODE_OFFSET		0x0CU	/**< Transfer Mode Register */
+#define XSDPS_CMD_OFFSET		0x0EU	/**< Command Register */
+#define XSDPS_RESP0_OFFSET		0x10U	/**< Response0 Register */
+#define XSDPS_RESP1_OFFSET		0x14U	/**< Response1 Register */
+#define XSDPS_RESP2_OFFSET		0x18U	/**< Response2 Register */
+#define XSDPS_RESP3_OFFSET		0x1CU	/**< Response3 Register */
+#define XSDPS_BUF_DAT_PORT_OFFSET	0x20U	/**< Buffer Data Port */
+#define XSDPS_PRES_STATE_OFFSET		0x24U	/**< Present State */
+#define XSDPS_HOST_CTRL1_OFFSET		0x28U	/**< Host Control 1 */
+#define XSDPS_POWER_CTRL_OFFSET		0x29U	/**< Power Control */
+#define XSDPS_BLK_GAP_CTRL_OFFSET	0x2AU	/**< Block Gap Control */
+#define XSDPS_WAKE_UP_CTRL_OFFSET	0x2BU	/**< Wake Up Control */
+#define XSDPS_CLK_CTRL_OFFSET		0x2CU	/**< Clock Control */
+#define XSDPS_TIMEOUT_CTRL_OFFSET	0x2EU	/**< Timeout Control */
+#define XSDPS_SW_RST_OFFSET		0x2FU	/**< Software Reset */
+#define XSDPS_NORM_INTR_STS_OFFSET 	0x30U	/**< Normal Interrupt
+							Status Register */
+#define XSDPS_ERR_INTR_STS_OFFSET 	0x32U	/**< Error Interrupt
+							Status Register */
+#define XSDPS_NORM_INTR_STS_EN_OFFSET	0x34U	/**< Normal Interrupt
+						Status Enable Register */
+#define XSDPS_ERR_INTR_STS_EN_OFFSET	0x36U	/**< Error Interrupt
+						Status Enable Register */
+#define XSDPS_NORM_INTR_SIG_EN_OFFSET	0x38U	/**< Normal Interrupt
+						Signal Enable Register */
+#define XSDPS_ERR_INTR_SIG_EN_OFFSET	0x3AU	/**< Error Interrupt
+						Signal Enable Register */
+
+#define XSDPS_AUTO_CMD12_ERR_STS_OFFSET	0x3CU	/**< Auto CMD12 Error Status
+							Register */
+#define XSDPS_HOST_CTRL2_OFFSET		0x3EU	/**< Host Control2 Register */
+#define XSDPS_CAPS_OFFSET 		0x40U	/**< Capabilities Register */
+#define XSDPS_CAPS_EXT_OFFSET 		0x44U	/**< Capabilities Extended */
+#define XSDPS_MAX_CURR_CAPS_OFFSET	0x48U	/**< Maximum Current
+						Capabilities Register */
+#define XSDPS_MAX_CURR_CAPS_EXT_OFFSET	0x4CU	/**< Maximum Current
+						Capabilities Ext Register */
+#define XSDPS_FE_ERR_INT_STS_OFFSET	0x52U	/**< Force Event for
+						Error Interrupt Status */
+#define XSDPS_FE_AUTO_CMD12_EIS_OFFSET	0x50U	/**< Auto CM12 Error Interrupt
+							Status Register */
+#define XSDPS_ADMA_ERR_STS_OFFSET	0x54U	/**< ADMA Error Status
+							Register */
+#define XSDPS_ADMA_SAR_OFFSET		0x58U	/**< ADMA System Address
+							Register */
+#define XSDPS_ADMA_SAR_EXT_OFFSET	0x5CU	/**< ADMA System Address
+							Extended Register */
+#define XSDPS_PRE_VAL_1_OFFSET		0x60U	/**< Preset Value Register */
+#define XSDPS_PRE_VAL_2_OFFSET		0x64U	/**< Preset Value Register */
+#define XSDPS_PRE_VAL_3_OFFSET		0x68U	/**< Preset Value Register */
+#define XSDPS_PRE_VAL_4_OFFSET		0x6CU	/**< Preset Value Register */
+#define XSDPS_BOOT_TOUT_CTRL_OFFSET	0x70U	/**< Boot timeout control
+							register */
+
+#define XSDPS_SHARED_BUS_CTRL_OFFSET	0xE0U	/**< Shared Bus Control
+							Register */
+#define XSDPS_SLOT_INTR_STS_OFFSET	0xFCU	/**< Slot Interrupt Status
+							Register */
+#define XSDPS_HOST_CTRL_VER_OFFSET	0xFEU	/**< Host Controller Version
+							Register */
+
+/* @} */
+
+/** @name Control Register - Host control, Power control,
+ * 			Block Gap control and Wakeup control
+ *
+ * This register contains bits for various configuration options of
+ * the SD host controller. Read/Write apart from the reserved bits.
+ * @{
+ */
+
+#define XSDPS_HC_LED_MASK		0x00000001U /**< LED Control */
+#define XSDPS_HC_WIDTH_MASK		0x00000002U /**< Bus width */
+#define XSDPS_HC_BUS_WIDTH_4		0x00000002U
+#define XSDPS_HC_SPEED_MASK		0x00000004U /**< High Speed */
+#define XSDPS_HC_DMA_MASK		0x00000018U /**< DMA Mode Select */
+#define XSDPS_HC_DMA_SDMA_MASK		0x00000000U /**< SDMA Mode */
+#define XSDPS_HC_DMA_ADMA1_MASK		0x00000008U /**< ADMA1 Mode */
+#define XSDPS_HC_DMA_ADMA2_32_MASK	0x00000010U /**< ADMA2 Mode - 32 bit */
+#define XSDPS_HC_DMA_ADMA2_64_MASK	0x00000018U /**< ADMA2 Mode - 64 bit */
+#define XSDPS_HC_EXT_BUS_WIDTH		0x00000020U /**< Bus width - 8 bit */
+#define XSDPS_HC_CARD_DET_TL_MASK	0x00000040U /**< Card Detect Tst Lvl */
+#define XSDPS_HC_CARD_DET_SD_MASK	0x00000080U /**< Card Detect Sig Det */
+
+#define XSDPS_PC_BUS_PWR_MASK		0x00000001U /**< Bus Power Control */
+#define XSDPS_PC_BUS_VSEL_MASK		0x0000000EU /**< Bus Voltage Select */
+#define XSDPS_PC_BUS_VSEL_3V3_MASK	0x0000000EU /**< Bus Voltage 3.3V */
+#define XSDPS_PC_BUS_VSEL_3V0_MASK	0x0000000CU /**< Bus Voltage 3.0V */
+#define XSDPS_PC_BUS_VSEL_1V8_MASK	0x0000000AU /**< Bus Voltage 1.8V */
+#define XSDPS_PC_EMMC_HW_RST_MASK	0x00000010U /**< HW reset for eMMC */
+
+#define XSDPS_BGC_STP_REQ_MASK		0x00000001U /**< Block Gap Stop Req */
+#define XSDPS_BGC_CNT_REQ_MASK		0x00000002U /**< Block Gap Cont Req */
+#define XSDPS_BGC_RWC_MASK		0x00000004U /**< Block Gap Rd Wait */
+#define XSDPS_BGC_INTR_MASK		0x00000008U /**< Block Gap Intr */
+#define XSDPS_BGC_SPI_MODE_MASK		0x00000010U /**< Block Gap SPI Mode */
+#define XSDPS_BGC_BOOT_EN_MASK		0x00000020U /**< Block Gap Boot Enb */
+#define XSDPS_BGC_ALT_BOOT_EN_MASK	0x00000040U /**< Block Gap Alt BootEn */
+#define XSDPS_BGC_BOOT_ACK_MASK		0x00000080U /**< Block Gap Boot Ack */
+
+#define XSDPS_WC_WUP_ON_INTR_MASK	0x00000001U /**< Wakeup Card Intr */
+#define XSDPS_WC_WUP_ON_INSRT_MASK	0x00000002U /**< Wakeup Card Insert */
+#define XSDPS_WC_WUP_ON_REM_MASK	0x00000004U /**< Wakeup Card Removal */
+
+/* @} */
+
+/** @name Control Register - Clock control, Timeout control & Software reset
+ *
+ * This register contains bits for configuration options of clock, timeout and
+ * software reset.
+ * Read/Write except for Inter_Clock_Stable bit (read only) and reserved bits.
+ * @{
+ */
+
+#define XSDPS_CC_INT_CLK_EN_MASK		0x00000001U
+#define XSDPS_CC_INT_CLK_STABLE_MASK	0x00000002U
+#define XSDPS_CC_SD_CLK_EN_MASK			0x00000004U
+#define XSDPS_CC_SD_CLK_GEN_SEL_MASK		0x00000020U
+#define XSDPS_CC_SDCLK_FREQ_SEL_EXT_MASK	0x000000C0U
+#define XSDPS_CC_SDCLK_FREQ_SEL_MASK		0x0000FF00U
+#define XSDPS_CC_SDCLK_FREQ_D256_MASK		0x00008000U
+#define XSDPS_CC_SDCLK_FREQ_D128_MASK		0x00004000U
+#define XSDPS_CC_SDCLK_FREQ_D64_MASK		0x00002000U
+#define XSDPS_CC_SDCLK_FREQ_D32_MASK		0x00001000U
+#define XSDPS_CC_SDCLK_FREQ_D16_MASK		0x00000800U
+#define XSDPS_CC_SDCLK_FREQ_D8_MASK		0x00000400U
+#define XSDPS_CC_SDCLK_FREQ_D4_MASK		0x00000200U
+#define XSDPS_CC_SDCLK_FREQ_D2_MASK		0x00000100U
+#define XSDPS_CC_SDCLK_FREQ_BASE_MASK	0x00000000U
+#define XSDPS_CC_MAX_DIV_CNT			256U
+#define XSDPS_CC_EXT_MAX_DIV_CNT		2046U
+#define XSDPS_CC_EXT_DIV_SHIFT			6U
+
+#define XSDPS_TC_CNTR_VAL_MASK			0x0000000FU
+
+#define XSDPS_SWRST_ALL_MASK			0x00000001U
+#define XSDPS_SWRST_CMD_LINE_MASK		0x00000002U
+#define XSDPS_SWRST_DAT_LINE_MASK		0x00000004U
+
+#define XSDPS_CC_MAX_NUM_OF_DIV		9U
+#define XSDPS_CC_DIV_SHIFT		8U
+
+/* @} */
+
+/** @name SD Interrupt Registers
+ *
+ *  Normal and Error Interrupt Status Register 
+ * This register shows the normal and error interrupt status.
+ * Status enable register affects reads of this register.
+ * If Signal enable register is set and the corresponding status bit is set,
+ * interrupt is generated.
+ * Write to clear except
+ * Error_interrupt and Card_Interrupt bits - Read only
+ *
+ *  Normal and Error Interrupt Status Enable Register 
+ * Setting this register bits enables Interrupt status.
+ * Read/Write except Fixed_to_0 bit (Read only)
+ *
+ *  Normal and Error Interrupt Signal Enable Register 
+ * This register is used to select which interrupt status is
+ * indicated to the Host System as the interrupt.
+ * Read/Write except Fixed_to_0 bit (Read only)
+ *
+ * All three registers have same bit definitions
+ * @{
+ */
+
+#define XSDPS_INTR_CC_MASK		0x00000001U /**< Command Complete */
+#define XSDPS_INTR_TC_MASK		0x00000002U /**< Transfer Complete */
+#define XSDPS_INTR_BGE_MASK		0x00000004U /**< Block Gap Event */
+#define XSDPS_INTR_DMA_MASK		0x00000008U /**< DMA Interrupt */
+#define XSDPS_INTR_BWR_MASK		0x00000010U /**< Buffer Write Ready */
+#define XSDPS_INTR_BRR_MASK		0x00000020U /**< Buffer Read Ready */
+#define XSDPS_INTR_CARD_INSRT_MASK	0x00000040U /**< Card Insert */
+#define XSDPS_INTR_CARD_REM_MASK	0x00000080U /**< Card Remove */
+#define XSDPS_INTR_CARD_MASK		0x00000100U /**< Card Interrupt */
+#define XSDPS_INTR_INT_A_MASK		0x00000200U /**< INT A Interrupt */
+#define XSDPS_INTR_INT_B_MASK		0x00000400U /**< INT B Interrupt */
+#define XSDPS_INTR_INT_C_MASK		0x00000800U /**< INT C Interrupt */
+#define XSDPS_INTR_RE_TUNING_MASK	0x00001000U /**< Re-Tuning Interrupt */
+#define XSDPS_INTR_BOOT_ACK_RECV_MASK	0x00002000U /**< Boot Ack Recv
+							Interrupt */
+#define XSDPS_INTR_BOOT_TERM_MASK	0x00004000U /**< Boot Terminate
+							Interrupt */
+#define XSDPS_INTR_ERR_MASK		0x00008000U /**< Error Interrupt */
+#define XSDPS_NORM_INTR_ALL_MASK	0x0000FFFFU
+
+#define XSDPS_INTR_ERR_CT_MASK		0x00000001U /**< Command Timeout
+							Error */
+#define XSDPS_INTR_ERR_CCRC_MASK	0x00000002U /**< Command CRC Error */
+#define XSDPS_INTR_ERR_CEB_MASK		0x00000004U /**< Command End Bit
+							Error */
+#define XSDPS_INTR_ERR_CI_MASK		0x00000008U /**< Command Index Error */
+#define XSDPS_INTR_ERR_DT_MASK		0x00000010U /**< Data Timeout Error */
+#define XSDPS_INTR_ERR_DCRC_MASK	0x00000020U /**< Data CRC Error */
+#define XSDPS_INTR_ERR_DEB_MASK		0x00000040U /**< Data End Bit Error */
+#define XSDPS_INTR_ERR_CUR_LMT_MASK	0x00000080U /**< Current Limit Error */
+#define XSDPS_INTR_ERR_AUTO_CMD12_MASK	0x00000100U /**< Auto CMD12 Error */
+#define XSDPS_INTR_ERR_ADMA_MASK	0x00000200U /**< ADMA Error */
+#define XSDPS_INTR_ERR_TR_MASK		0x00001000U /**< Tuning Error */
+#define XSDPS_INTR_VEND_SPF_ERR_MASK	0x0000E000U /**< Vendor Specific
+							Error */
+#define XSDPS_ERROR_INTR_ALL_MASK	0x0000F3FFU /**< Mask for error bits */
+/* @} */
+
+/** @name Block Size and Block Count Register
+ *
+ * This register contains the block count for current transfer,
+ * block size and SDMA buffer size.
+ * Read/Write except for reserved bits.
+ * @{
+ */
+
+#define XSDPS_BLK_SIZE_MASK		0x00000FFFU /**< Transfer Block Size */
+#define XSDPS_SDMA_BUFF_SIZE_MASK	0x00007000U /**< Host SDMA Buffer Size */
+#define XSDPS_BLK_SIZE_1024		0x400U
+#define XSDPS_BLK_SIZE_2048		0x800U
+#define XSDPS_BLK_CNT_MASK		0x0000FFFFU /**< Block Count for
+								Current Transfer */
+
+/* @} */
+
+/** @name Transfer Mode and Command Register
+ *
+ * The Transfer Mode register is used to control the data transfers and
+ * Command register is used for command generation
+ * Read/Write except for reserved bits.
+ * @{
+ */
+
+#define XSDPS_TM_DMA_EN_MASK		0x00000001U /**< DMA Enable */
+#define XSDPS_TM_BLK_CNT_EN_MASK	0x00000002U /**< Block Count Enable */
+#define XSDPS_TM_AUTO_CMD12_EN_MASK	0x00000004U /**< Auto CMD12 Enable */
+#define XSDPS_TM_DAT_DIR_SEL_MASK	0x00000010U /**< Data Transfer
+							Direction Select */
+#define XSDPS_TM_MUL_SIN_BLK_SEL_MASK	0x00000020U /**< Multi/Single
+							Block Select */
+
+#define XSDPS_CMD_RESP_SEL_MASK		0x00000003U /**< Response Type
+							Select */
+#define XSDPS_CMD_RESP_NONE_MASK	0x00000000U /**< No Response */
+#define XSDPS_CMD_RESP_L136_MASK	0x00000001U /**< Response length 138 */
+#define XSDPS_CMD_RESP_L48_MASK		0x00000002U /**< Response length 48 */
+#define XSDPS_CMD_RESP_L48_BSY_CHK_MASK	0x00000003U /**< Response length 48 &
+							check busy after
+							response */
+#define XSDPS_CMD_CRC_CHK_EN_MASK	0x00000008U /**< Command CRC Check
+							Enable */
+#define XSDPS_CMD_INX_CHK_EN_MASK	0x00000010U /**< Command Index Check
+							Enable */
+#define XSDPS_DAT_PRESENT_SEL_MASK	0x00000020U /**< Data Present Select */
+#define XSDPS_CMD_TYPE_MASK		0x000000C0U /**< Command Type */
+#define XSDPS_CMD_TYPE_NORM_MASK	0x00000000U /**< CMD Type - Normal */
+#define XSDPS_CMD_TYPE_SUSPEND_MASK	0x00000040U /**< CMD Type - Suspend */
+#define XSDPS_CMD_TYPE_RESUME_MASK	0x00000080U /**< CMD Type - Resume */
+#define XSDPS_CMD_TYPE_ABORT_MASK	0x000000C0U /**< CMD Type - Abort */
+#define XSDPS_CMD_MASK			0x00003F00U /**< Command Index Mask -
+							Set to CMD0-63,
+							AMCD0-63 */
+
+/* @} */
+
+/** @name Auto CMD Error Status Register
+ *
+ * This register is read only register which contains
+ * information about the error status of Auto CMD 12 and 23.
+ * Read Only
+ * @{
+ */
+#define XSDPS_AUTO_CMD12_NT_EX_MASK	0x0001U /**< Auto CMD12 Not
+							executed */
+#define XSDPS_AUTO_CMD_TOUT_MASK	0x0002U /**< Auto CMD Timeout
+							Error */
+#define XSDPS_AUTO_CMD_CRC_MASK		0x0004U /**< Auto CMD CRC Error */
+#define XSDPS_AUTO_CMD_EB_MASK		0x0008U /**< Auto CMD End Bit
+							Error */
+#define XSDPS_AUTO_CMD_IND_MASK		0x0010U /**< Auto CMD Index Error */
+#define XSDPS_AUTO_CMD_CNI_ERR_MASK	0x0080U /**< Command not issued by
+							Auto CMD12 Error */
+/* @} */
+
+/** @name Host Control2 Register
+ *
+ * This register contains extended configuration bits.
+ * Read Write
+ * @{
+ */
+#define XSDPS_HC2_UHS_MODE_MASK		0x0007U /**< UHS Mode select bits */
+#define XSDPS_HC2_UHS_MODE_SDR12_MASK	0x0000U /**< SDR12 UHS Mode */
+#define XSDPS_HC2_UHS_MODE_SDR25_MASK	0x0001U /**< SDR25 UHS Mode */
+#define XSDPS_HC2_UHS_MODE_SDR50_MASK	0x0002U /**< SDR50 UHS Mode */
+#define XSDPS_HC2_UHS_MODE_SDR104_MASK	0x0003U /**< SDR104 UHS Mode */
+#define XSDPS_HC2_UHS_MODE_DDR50_MASK	0x0004U /**< DDR50 UHS Mode */
+#define XSDPS_HC2_1V8_EN_MASK		0x0008U /**< 1.8V Signal Enable */
+#define XSDPS_HC2_DRV_STR_SEL_MASK	0x0030U /**< Driver Strength
+							Selection */
+#define XSDPS_HC2_DRV_STR_B_MASK	0x0000U /**< Driver Strength B */
+#define XSDPS_HC2_DRV_STR_A_MASK	0x0010U /**< Driver Strength A */
+#define XSDPS_HC2_DRV_STR_C_MASK	0x0020U /**< Driver Strength C */
+#define XSDPS_HC2_DRV_STR_D_MASK	0x0030U /**< Driver Strength D */
+#define XSDPS_HC2_EXEC_TNG_MASK		0x0040U /**< Execute Tuning */
+#define XSDPS_HC2_SAMP_CLK_SEL_MASK	0x0080U /**< Sampling Clock
+							Selection */
+#define XSDPS_HC2_ASYNC_INTR_EN_MASK	0x4000U /**< Asynchronous Interrupt
+							Enable */
+#define XSDPS_HC2_PRE_VAL_EN_MASK	0x8000U /**< Preset Value Enable */
+
+/* @} */
+
+/** @name Capabilities Register
+ *
+ * Capabilities register is a read only register which contains
+ * information about the host controller.
+ * Sufficient if read once after power on.
+ * Read Only
+ * @{
+ */
+#define XSDPS_CAP_TOUT_CLK_FREQ_MASK	0x0000003FU /**< Timeout clock freq
+							select */
+#define XSDPS_CAP_TOUT_CLK_UNIT_MASK	0x00000080U /**< Timeout clock unit -
+							MHz/KHz */
+#define XSDPS_CAP_MAX_BLK_LEN_MASK	0x00030000U /**< Max block length */
+#define XSDPS_CAP_MAX_BLK_LEN_512B_MASK	0x00000000U /**< Max block 512 bytes */
+#define XSDPS_CAP_MAX_BL_LN_1024_MASK	0x00010000U /**< Max block 1024 bytes */
+#define XSDPS_CAP_MAX_BL_LN_2048_MASK	0x00020000U /**< Max block 2048 bytes */
+#define XSDPS_CAP_MAX_BL_LN_4096_MASK	0x00030000U /**< Max block 4096 bytes */
+
+#define XSDPS_CAP_EXT_MEDIA_BUS_MASK	0x00040000U /**< Extended media bus */
+#define XSDPS_CAP_ADMA2_MASK		0x00080000U /**< ADMA2 support */
+#define XSDPS_CAP_HIGH_SPEED_MASK	0x00200000U /**< High speed support */
+#define XSDPS_CAP_SDMA_MASK		0x00400000U /**< SDMA support */
+#define XSDPS_CAP_SUSP_RESUME_MASK	0x00800000U /**< Suspend/Resume
+							support */
+#define XSDPS_CAP_VOLT_3V3_MASK		0x01000000U /**< 3.3V support */
+#define XSDPS_CAP_VOLT_3V0_MASK		0x02000000U /**< 3.0V support */
+#define XSDPS_CAP_VOLT_1V8_MASK		0x04000000U /**< 1.8V support */
+
+#define XSDPS_CAP_SYS_BUS_64_MASK	0x10000000U /**< 64 bit system bus
+							support */
+/* Spec 2.0 */
+#define XSDPS_CAP_INTR_MODE_MASK	0x08000000U /**< Interrupt mode
+							support */
+#define XSDPS_CAP_SPI_MODE_MASK		0x20000000U /**< SPI mode */
+#define XSDPS_CAP_SPI_BLOCK_MODE_MASK	0x40000000U /**< SPI block mode */
+
+
+/* Spec 3.0 */
+#define XSDPS_CAPS_ASYNC_INTR_MASK	0x20000000U /**< Async Interrupt
+							support */
+#define XSDPS_CAPS_SLOT_TYPE_MASK	0xC0000000U /**< Slot Type */
+#define XSDPS_CAPS_REM_CARD			0x00000000U /**< Removable Slot */
+#define XSDPS_CAPS_EMB_SLOT			0x40000000U /**< Embedded Slot */
+#define XSDPS_CAPS_SHR_BUS			0x80000000U /**< Shared Bus Slot */
+
+#define XSDPS_ECAPS_SDR50_MASK		0x00000001U /**< SDR50 Mode support */
+#define XSDPS_ECAPS_SDR104_MASK		0x00000002U /**< SDR104 Mode support */
+#define XSDPS_ECAPS_DDR50_MASK		0x00000004U /**< DDR50 Mode support */
+#define XSDPS_ECAPS_DRV_TYPE_A_MASK	0x00000010U /**< DriverType A support */
+#define XSDPS_ECAPS_DRV_TYPE_C_MASK	0x00000020U /**< DriverType C support */
+#define XSDPS_ECAPS_DRV_TYPE_D_MASK	0x00000040U /**< DriverType D support */
+#define XSDPS_ECAPS_TMR_CNT_MASK	0x00000F00U /**< Timer Count for
+							Re-tuning */
+#define XSDPS_ECAPS_USE_TNG_SDR50_MASK	0x00002000U /**< SDR50 Mode needs
+							tuning */
+#define XSDPS_ECAPS_RE_TNG_MODES_MASK	0x0000C000U /**< Re-tuning modes
+							support */
+#define XSDPS_ECAPS_RE_TNG_MODE1_MASK	0x00000000U /**< Re-tuning mode 1 */
+#define XSDPS_ECAPS_RE_TNG_MODE2_MASK	0x00004000U /**< Re-tuning mode 2 */
+#define XSDPS_ECAPS_RE_TNG_MODE3_MASK	0x00008000U /**< Re-tuning mode 3 */
+#define XSDPS_ECAPS_CLK_MULT_MASK	0x00FF0000U /**< Clock Multiplier value
+							for Programmable clock
+							mode */
+#define XSDPS_ECAPS_SPI_MODE_MASK	0x01000000U /**< SPI mode */
+#define XSDPS_ECAPS_SPI_BLK_MODE_MASK	0x02000000U /**< SPI block mode */
+
+/* @} */
+
+/** @name Present State Register
+ *
+ * Gives the current status of the host controller
+ * Read Only
+ * @{
+ */
+
+#define XSDPS_PSR_INHIBIT_CMD_MASK	0x00000001U /**< Command inhibit - CMD */
+#define XSDPS_PSR_INHIBIT_DAT_MASK	0x00000002U /**< Command Inhibit - DAT */
+#define XSDPS_PSR_DAT_ACTIVE_MASK	0x00000004U /**< DAT line active */
+#define XSDPS_PSR_RE_TUNING_REQ_MASK	0x00000008U /**< Re-tuning request */
+#define XSDPS_PSR_WR_ACTIVE_MASK	0x00000100U /**< Write transfer active */
+#define XSDPS_PSR_RD_ACTIVE_MASK	0x00000200U /**< Read transfer active */
+#define XSDPS_PSR_BUFF_WR_EN_MASK	0x00000400U /**< Buffer write enable */
+#define XSDPS_PSR_BUFF_RD_EN_MASK	0x00000800U /**< Buffer read enable */
+#define XSDPS_PSR_CARD_INSRT_MASK	0x00010000U /**< Card inserted */
+#define XSDPS_PSR_CARD_STABLE_MASK	0x00020000U /**< Card state stable */
+#define XSDPS_PSR_CARD_DPL_MASK		0x00040000U /**< Card detect pin level */
+#define XSDPS_PSR_WPS_PL_MASK		0x00080000U /**< Write protect switch
+								pin level */
+#define XSDPS_PSR_DAT30_SG_LVL_MASK	0x00F00000U /**< Data 3:0 signal lvl */
+#define XSDPS_PSR_CMD_SG_LVL_MASK	0x01000000U /**< Cmd Line signal lvl */
+#define XSDPS_PSR_DAT74_SG_LVL_MASK	0x1E000000U /**< Data 7:4 signal lvl */
+
+/* @} */
+
+/** @name Maximum Current Capablities Register
+ *
+ * This register is read only register which contains
+ * information about current capabilities at each voltage levels.
+ * Read Only
+ * @{
+ */
+#define XSDPS_MAX_CUR_CAPS_1V8_MASK	0x00000F00U /**< Maximum Current
+							Capability at 1.8V */
+#define XSDPS_MAX_CUR_CAPS_3V0_MASK	0x000000F0U /**< Maximum Current
+							Capability at 3.0V */
+#define XSDPS_MAX_CUR_CAPS_3V3_MASK	0x0000000FU /**< Maximum Current
+							Capability at 3.3V */
+/* @} */
+
+
+/** @name Force Event for Auto CMD Error Status Register
+ *
+ * This register is write only register which contains
+ * control bits to generate events for Auto CMD error status.
+ * Write Only
+ * @{
+ */
+#define XSDPS_FE_AUTO_CMD12_NT_EX_MASK	0x0001U /**< Auto CMD12 Not
+							executed */
+#define XSDPS_FE_AUTO_CMD_TOUT_MASK	0x0002U /**< Auto CMD Timeout
+							Error */
+#define XSDPS_FE_AUTO_CMD_CRC_MASK	0x0004U /**< Auto CMD CRC Error */
+#define XSDPS_FE_AUTO_CMD_EB_MASK	0x0008U /**< Auto CMD End Bit
+							Error */
+#define XSDPS_FE_AUTO_CMD_IND_MASK	0x0010U /**< Auto CMD Index Error */
+#define XSDPS_FE_AUTO_CMD_CNI_ERR_MASK	0x0080U /**< Command not issued by
+							Auto CMD12 Error */
+/* @} */
+
+
+
+/** @name Force Event for Error Interrupt Status Register
+ *
+ * This register is write only register which contains
+ * control bits to generate events of error interrupt status register.
+ * Write Only
+ * @{
+ */
+#define XSDPS_FE_INTR_ERR_CT_MASK	0x0001U /**< Command Timeout
+							Error */
+#define XSDPS_FE_INTR_ERR_CCRC_MASK	0x0002U /**< Command CRC Error */
+#define XSDPS_FE_INTR_ERR_CEB_MASK	0x0004U /**< Command End Bit
+							Error */
+#define XSDPS_FE_INTR_ERR_CI_MASK	0x0008U /**< Command Index Error */
+#define XSDPS_FE_INTR_ERR_DT_MASK	0x0010U /**< Data Timeout Error */
+#define XSDPS_FE_INTR_ERR_DCRC_MASK	0x0020U /**< Data CRC Error */
+#define XSDPS_FE_INTR_ERR_DEB_MASK	0x0040U /**< Data End Bit Error */
+#define XSDPS_FE_INTR_ERR_CUR_LMT_MASK	0x0080U /**< Current Limit Error */
+#define XSDPS_FE_INTR_ERR_AUTO_CMD_MASK	0x0100U /**< Auto CMD Error */
+#define XSDPS_FE_INTR_ERR_ADMA_MASK	0x0200U /**< ADMA Error */
+#define XSDPS_FE_INTR_ERR_TR_MASK	0x1000U /**< Target Reponse */
+#define XSDPS_FE_INTR_VEND_SPF_ERR_MASK	0xE000U /**< Vendor Specific
+							Error */
+
+/* @} */
+
+/** @name ADMA Error Status Register
+ *
+ * This register is read only register which contains
+ * status information about ADMA errors.
+ * Read Only
+ * @{
+ */
+#define XSDPS_ADMA_ERR_MM_LEN_MASK	0x04U /**< ADMA Length Mismatch
+							Error */
+#define XSDPS_ADMA_ERR_STATE_MASK	0x03U /**< ADMA Error State */
+#define XSDPS_ADMA_ERR_STATE_STOP_MASK	0x00U /**< ADMA Error State
+							STOP */
+#define XSDPS_ADMA_ERR_STATE_FDS_MASK	0x01U /**< ADMA Error State
+							FDS */
+#define XSDPS_ADMA_ERR_STATE_TFR_MASK	0x03U /**< ADMA Error State
+							TFR */
+/* @} */
+
+/** @name Preset Values Register
+ *
+ * This register is read only register which contains
+ * preset values for each of speed modes.
+ * Read Only
+ * @{
+ */
+#define XSDPS_PRE_VAL_SDCLK_FSEL_MASK	0x03FFU /**< SDCLK Frequency
+							Select Value */
+#define XSDPS_PRE_VAL_CLK_GEN_SEL_MASK	0x0400U /**< Clock Generator
+							Mode Select */
+#define XSDPS_PRE_VAL_DRV_STR_SEL_MASK	0xC000U /**< Driver Strength
+							Select Value */
+
+/* @} */
+
+/** @name Slot Interrupt Status Register
+ *
+ * This register is read only register which contains
+ * interrupt slot signal for each slot.
+ * Read Only
+ * @{
+ */
+#define XSDPS_SLOT_INTR_STS_INT_MASK	0x0007U /**< Interrupt Signal
+							mask */
+
+/* @} */
+
+/** @name Host Controller Version Register
+ *
+ * This register is read only register which contains
+ * Host Controller and Vendor Specific version.
+ * Read Only
+ * @{
+ */
+#define XSDPS_HC_VENDOR_VER		0xFF00U /**< Vendor
+							Specification
+							version mask */
+#define XSDPS_HC_SPEC_VER_MASK		0x00FFU /**< Host
+							Specification
+							version mask */
+#define XSDPS_HC_SPEC_V3		0x0002U
+#define XSDPS_HC_SPEC_V2		0x0001U
+#define XSDPS_HC_SPEC_V1		0x0000U
+
+/** @name Block size mask for 512 bytes
+ *
+ * Block size mask for 512 bytes - This is the default block size.
+ * @{
+ */
+
+#define XSDPS_BLK_SIZE_512_MASK	0x200U
+
+/* @} */
+
+/** @name Commands
+ *
+ * Constant definitions for commands and response related to SD
+ * @{
+ */
+
+#define XSDPS_APP_CMD_PREFIX	 0x8000U
+#define CMD0	 0x0000U
+#define CMD1	 0x0100U
+#define CMD2	 0x0200U
+#define CMD3	 0x0300U
+#define CMD4	 0x0400U
+#define CMD5	 0x0500U
+#define CMD6	 0x0600U
+#define ACMD6	(XSDPS_APP_CMD_PREFIX + 0x0600U)
+#define CMD7	 0x0700U
+#define CMD8	 0x0800U
+#define CMD9	 0x0900U
+#define CMD10	 0x0A00U
+#define CMD11	 0x0B00U
+#define CMD12	 0x0C00U
+#define ACMD13	 (XSDPS_APP_CMD_PREFIX + 0x0D00U)
+#define CMD16	 0x1000U
+#define CMD17	 0x1100U
+#define CMD18	 0x1200U
+#define CMD19	 0x1300U
+#define CMD21	 0x1500U
+#define CMD23	 0x1700U
+#define ACMD23	 (XSDPS_APP_CMD_PREFIX + 0x1700U)
+#define CMD24	 0x1800U
+#define CMD25	 0x1900U
+#define CMD41	 0x2900U
+#define ACMD41	 (XSDPS_APP_CMD_PREFIX + 0x2900U)
+#define ACMD42	 (XSDPS_APP_CMD_PREFIX + 0x2A00U)
+#define ACMD51	 (XSDPS_APP_CMD_PREFIX + 0x3300U)
+#define CMD52	 0x3400U
+#define CMD55	 0x3700U
+#define CMD58	 0x3A00U
+
+#define RESP_NONE	(u32)XSDPS_CMD_RESP_NONE_MASK
+#define RESP_R1		(u32)XSDPS_CMD_RESP_L48_MASK | (u32)XSDPS_CMD_CRC_CHK_EN_MASK | \
+			(u32)XSDPS_CMD_INX_CHK_EN_MASK
+
+#define RESP_R1B	(u32)XSDPS_CMD_RESP_L48_BSY_CHK_MASK | \
+			(u32)XSDPS_CMD_CRC_CHK_EN_MASK | (u32)XSDPS_CMD_INX_CHK_EN_MASK
+
+#define RESP_R2		(u32)XSDPS_CMD_RESP_L136_MASK | (u32)XSDPS_CMD_CRC_CHK_EN_MASK
+#define RESP_R3		(u32)XSDPS_CMD_RESP_L48_MASK
+
+#define RESP_R6		(u32)XSDPS_CMD_RESP_L48_BSY_CHK_MASK | \
+			(u32)XSDPS_CMD_CRC_CHK_EN_MASK | (u32)XSDPS_CMD_INX_CHK_EN_MASK
+
+/* @} */
+
+/* Card Interface Conditions Definitions */
+#define XSDPS_CIC_CHK_PATTERN	0xAAU
+#define XSDPS_CIC_VOLT_MASK	(0xFU<<8)
+#define XSDPS_CIC_VOLT_2V7_3V6	(1U<<8)
+#define XSDPS_CIC_VOLT_LOW	(1U<<9)
+
+/* Operation Conditions Register Definitions */
+#define XSDPS_OCR_PWRUP_STS	(1U<<31)
+#define XSDPS_OCR_CC_STS	(1U<<30)
+#define XSDPS_OCR_S18		(1U<<24)
+#define XSDPS_OCR_3V5_3V6	(1U<<23)
+#define XSDPS_OCR_3V4_3V5	(1U<<22)
+#define XSDPS_OCR_3V3_3V4	(1U<<21)
+#define XSDPS_OCR_3V2_3V3	(1U<<20)
+#define XSDPS_OCR_3V1_3V2	(1U<<19)
+#define XSDPS_OCR_3V0_3V1	(1U<<18)
+#define XSDPS_OCR_2V9_3V0	(1U<<17)
+#define XSDPS_OCR_2V8_2V9	(1U<<16)
+#define XSDPS_OCR_2V7_2V8	(1U<<15)
+#define XSDPS_OCR_1V7_1V95	(1U<<7)
+#define XSDPS_OCR_HIGH_VOL	0x00FF8000U
+#define XSDPS_OCR_LOW_VOL	0x00000080U
+
+/* SD Card Configuration Register Definitions */
+#define XSDPS_SCR_REG_LEN		8U
+#define XSDPS_SCR_STRUCT_MASK		(0xFU<<28)
+#define XSDPS_SCR_SPEC_MASK		(0xFU<<24)
+#define XSDPS_SCR_SPEC_1V0		0U
+#define XSDPS_SCR_SPEC_1V1		(1U<<24)
+#define XSDPS_SCR_SPEC_2V0_3V0		(2U<<24)
+#define XSDPS_SCR_MEM_VAL_AF_ERASE	(1U<<23)
+#define XSDPS_SCR_SEC_SUPP_MASK		(7U<<20)
+#define XSDPS_SCR_SEC_SUPP_NONE		0U
+#define XSDPS_SCR_SEC_SUPP_1V1		(2U<<20)
+#define XSDPS_SCR_SEC_SUPP_2V0		(3U<<20)
+#define XSDPS_SCR_SEC_SUPP_3V0		(4U<<20)
+#define XSDPS_SCR_BUS_WIDTH_MASK	(0xFU<<16)
+#define XSDPS_SCR_BUS_WIDTH_1		(1U<<16)
+#define XSDPS_SCR_BUS_WIDTH_4		(4U<<16)
+#define XSDPS_SCR_SPEC3_MASK		(1U<<12)
+#define XSDPS_SCR_SPEC3_2V0		0U
+#define XSDPS_SCR_SPEC3_3V0		(1U<<12)
+#define XSDPS_SCR_CMD_SUPP_MASK		0x3U
+#define XSDPS_SCR_CMD23_SUPP		(1U<<1)
+#define XSDPS_SCR_CMD20_SUPP		(1U<<0)
+
+/* Card Status Register Definitions */
+#define XSDPS_CD_STS_OUT_OF_RANGE	(1U<<31)
+#define XSDPS_CD_STS_ADDR_ERR		(1U<<30)
+#define XSDPS_CD_STS_BLK_LEN_ERR	(1U<<29)
+#define XSDPS_CD_STS_ER_SEQ_ERR		(1U<<28)
+#define XSDPS_CD_STS_ER_PRM_ERR		(1U<<27)
+#define XSDPS_CD_STS_WP_VIO		(1U<<26)
+#define XSDPS_CD_STS_IS_LOCKED		(1U<<25)
+#define XSDPS_CD_STS_LOCK_UNLOCK_FAIL	(1U<<24)
+#define XSDPS_CD_STS_CMD_CRC_ERR	(1U<<23)
+#define XSDPS_CD_STS_ILGL_CMD		(1U<<22)
+#define XSDPS_CD_STS_CARD_ECC_FAIL	(1U<<21)
+#define XSDPS_CD_STS_CC_ERR		(1U<<20)
+#define XSDPS_CD_STS_ERR		(1U<<19)
+#define XSDPS_CD_STS_CSD_OVRWR		(1U<<16)
+#define XSDPS_CD_STS_WP_ER_SKIP		(1U<<15)
+#define XSDPS_CD_STS_CARD_ECC_DIS	(1U<<14)
+#define XSDPS_CD_STS_ER_RST		(1U<<13)
+#define XSDPS_CD_STS_CUR_STATE		(0xFU<<9)
+#define XSDPS_CD_STS_RDY_FOR_DATA	(1U<<8)
+#define XSDPS_CD_STS_APP_CMD		(1U<<5)
+#define XSDPS_CD_STS_AKE_SEQ_ERR	(1U<<2)
+
+/* Switch Function Definitions CMD6 */
+#define XSDPS_SWITCH_SD_RESP_LEN	64U
+
+#define XSDPS_SWITCH_FUNC_SWITCH	(1U<<31)
+#define XSDPS_SWITCH_FUNC_CHECK		0U
+
+#define XSDPS_MODE_FUNC_GRP1		1U
+#define XSDPS_MODE_FUNC_GRP2		2U
+#define XSDPS_MODE_FUNC_GRP3		3U
+#define XSDPS_MODE_FUNC_GRP4		4U
+#define XSDPS_MODE_FUNC_GRP5		5U
+#define XSDPS_MODE_FUNC_GRP6		6U
+
+#define XSDPS_FUNC_GRP_DEF_VAL		0xFU
+#define XSDPS_FUNC_ALL_GRP_DEF_VAL	0xFFFFFFU
+
+#define XSDPS_ACC_MODE_DEF_SDR12	0U
+#define XSDPS_ACC_MODE_HS_SDR25		1U
+#define XSDPS_ACC_MODE_SDR50		2U
+#define XSDPS_ACC_MODE_SDR104		3U
+#define XSDPS_ACC_MODE_DDR50		4U
+
+#define XSDPS_CMD_SYS_ARG_SHIFT		4U
+#define XSDPS_CMD_SYS_DEF		0U
+#define XSDPS_CMD_SYS_eC		1U
+#define XSDPS_CMD_SYS_OTP		3U
+#define XSDPS_CMD_SYS_ASSD		4U
+#define XSDPS_CMD_SYS_VEND		5U
+
+#define XSDPS_DRV_TYPE_ARG_SHIFT	8U
+#define XSDPS_DRV_TYPE_B		0U
+#define XSDPS_DRV_TYPE_A		1U
+#define XSDPS_DRV_TYPE_C		2U
+#define XSDPS_DRV_TYPE_D		3U
+
+#define XSDPS_CUR_LIM_ARG_SHIFT		12U
+#define XSDPS_CUR_LIM_200		0U
+#define XSDPS_CUR_LIM_400		1U
+#define XSDPS_CUR_LIM_600		2U
+#define XSDPS_CUR_LIM_800		3U
+
+#define CSD_SPEC_VER_MASK		0x3C0000U
+#define READ_BLK_LEN_MASK		0x00000F00U
+#define C_SIZE_MULT_MASK		0x00000380U
+#define C_SIZE_LOWER_MASK		0xFFC00000U
+#define C_SIZE_UPPER_MASK		0x00000003U
+#define CSD_STRUCT_MASK			0x00C00000U
+#define CSD_V2_C_SIZE_MASK		0x3FFFFF00U
+
+/* EXT_CSD field definitions */
+#define XSDPS_EXT_CSD_SIZE		512U
+
+#define EXT_CSD_WR_REL_PARAM_EN		(1U<<2)
+
+#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS    (0x40U)
+#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS   (0x10U)
+#define EXT_CSD_BOOT_WP_B_PERM_WP_EN    (0x04U)
+#define EXT_CSD_BOOT_WP_B_PWR_WP_EN     (0x01U)
+
+#define EXT_CSD_PART_CONFIG_ACC_MASK    (0x7U)
+#define EXT_CSD_PART_CONFIG_ACC_BOOT0   (0x1U)
+#define EXT_CSD_PART_CONFIG_ACC_RPMB    (0x3U)
+#define EXT_CSD_PART_CONFIG_ACC_GP0     (0x4U)
+
+#define EXT_CSD_PART_SUPPORT_PART_EN    (0x1U)
+
+#define EXT_CSD_CMD_SET_NORMAL          (1U<<0)
+#define EXT_CSD_CMD_SET_SECURE          (1U<<1)
+#define EXT_CSD_CMD_SET_CPSECURE        (1U<<2)
+
+#define EXT_CSD_CARD_TYPE_26    	(1U<<0)  /* Card can run at 26MHz */
+#define EXT_CSD_CARD_TYPE_52    	(1U<<1)  /* Card can run at 52MHz */
+#define EXT_CSD_CARD_TYPE_MASK  	0x3FU    /* Mask out reserved bits */
+#define EXT_CSD_CARD_TYPE_DDR_1_8V	(1U<<2)   /* Card can run at 52MHz */
+                                             /* DDR mode @1.8V or 3V I/O */
+#define EXT_CSD_CARD_TYPE_DDR_1_2V	(1U<<3)   /* Card can run at 52MHz */
+                                             /* DDR mode @1.2V I/O */
+#define EXT_CSD_CARD_TYPE_DDR_52	(EXT_CSD_CARD_TYPE_DDR_1_8V  \
+                                        | EXT_CSD_CARD_TYPE_DDR_1_2V)
+#define EXT_CSD_CARD_TYPE_SDR_1_8V      (1U<<4)  /* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_SDR_1_2V      (1U<<5)  /* Card can run at 200MHz */
+                                                /* SDR mode @1.2V I/O */
+#define EXT_CSD_BUS_WIDTH_BYTE			183U
+#define EXT_CSD_BUS_WIDTH_1_BIT			0U	/* Card is in 1 bit mode */
+#define EXT_CSD_BUS_WIDTH_4_BIT			1U	/* Card is in 4 bit mode */
+#define EXT_CSD_BUS_WIDTH_8_BIT			2U	/* Card is in 8 bit mode */
+#define EXT_CSD_BUS_WIDTH_DDR_4_BIT		5U	/* Card is in 4 bit DDR mode */
+#define EXT_CSD_BUS_WIDTH_DDR_8_BIT		6U	/* Card is in 8 bit DDR mode */
+
+#define EXT_CSD_HS_TIMING_BYTE		185U
+#define EXT_CSD_HS_TIMING_DEF		0U
+#define EXT_CSD_HS_TIMING_HIGH		1U	/* Card is in high speed mode */
+#define EXT_CSD_HS_TIMING_HS200		2U	/* Card is in HS200 mode */
+
+#define EXT_CSD_RST_N_FUN_BYTE		162U
+#define EXT_CSD_RST_N_FUN_TEMP_DIS	0U	/* RST_n signal is temporarily disabled */
+#define EXT_CSD_RST_N_FUN_PERM_EN	1U	/* RST_n signal is permanently enabled */
+#define EXT_CSD_RST_N_FUN_PERM_DIS	2U	/* RST_n signal is permanently disabled */
+
+#define XSDPS_EXT_CSD_CMD_SET		0U
+#define XSDPS_EXT_CSD_SET_BITS		1U
+#define XSDPS_EXT_CSD_CLR_BITS		2U
+#define XSDPS_EXT_CSD_WRITE_BYTE	3U
+
+#define XSDPS_MMC_DEF_SPEED_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					| ((u32)EXT_CSD_HS_TIMING_BYTE << 16) \
+					| ((u32)EXT_CSD_HS_TIMING_DEF << 8))
+
+#define XSDPS_MMC_HIGH_SPEED_ARG	(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_HS_TIMING_BYTE << 16) \
+					 | ((u32)EXT_CSD_HS_TIMING_HIGH << 8))
+
+#define XSDPS_MMC_HS200_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_HS_TIMING_BYTE << 16) \
+					 | ((u32)EXT_CSD_HS_TIMING_HS200 << 8))
+
+#define XSDPS_MMC_1_BIT_BUS_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_BYTE << 16) \
+					 | ((u32)EXT_CSD_BUS_WITH_1_BIT << 8))
+
+#define XSDPS_MMC_4_BIT_BUS_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_BYTE << 16) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_4_BIT << 8))
+
+#define XSDPS_MMC_8_BIT_BUS_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_BYTE << 16) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_8_BIT << 8))
+
+#define XSDPS_MMC_DDR_4_BIT_BUS_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_BYTE << 16) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_DDR_4_BIT << 8))
+
+#define XSDPS_MMC_DDR_8_BIT_BUS_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_BYTE << 16) \
+					 | ((u32)EXT_CSD_BUS_WIDTH_DDR_8_BIT << 8))
+
+#define XSDPS_MMC_RST_FUN_EN_ARG		(((u32)XSDPS_EXT_CSD_WRITE_BYTE << 24) \
+					 | ((u32)EXT_CSD_RST_N_FUN_BYTE << 16) \
+					 | ((u32)EXT_CSD_RST_N_FUN_PERM_EN << 8))
+
+#define XSDPS_MMC_DELAY_FOR_SWITCH	1000U
+
+/* @} */
+
+/* @400KHz, in usec */
+#define XSDPS_74CLK_DELAY	2960U
+#define XSDPS_100CLK_DELAY	4000U
+#define XSDPS_INIT_DELAY	10000U
+
+#define XSDPS_DEF_VOLT_LVL	XSDPS_PC_BUS_VSEL_3V0_MASK
+#define XSDPS_CARD_DEF_ADDR	0x1234U
+
+#define XSDPS_CARD_SD		1U
+#define XSDPS_CARD_MMC		2U
+#define XSDPS_CARD_SDIO		3U
+#define XSDPS_CARD_SDCOMBO	4U
+#define XSDPS_CHIP_EMMC		5U
+
+
+/** @name ADMA2 Descriptor related definitions
+ *
+ * ADMA2 Descriptor related definitions
+ * @{
+ */
+
+#define XSDPS_DESC_MAX_LENGTH 65536U
+
+#define XSDPS_DESC_VALID     	(0x1U << 0)
+#define XSDPS_DESC_END       	(0x1U << 1)
+#define XSDPS_DESC_INT       	(0x1U << 2)
+#define XSDPS_DESC_TRAN  	(0x2U << 4)
+
+/* @} */
+
+/* For changing clock frequencies */
+#define XSDPS_CLK_400_KHZ		400000U		/**< 400 KHZ */
+#define XSDPS_CLK_50_MHZ		50000000U	/**< 50 MHZ */
+#define XSDPS_CLK_52_MHZ		52000000U	/**< 52 MHZ */
+#define XSDPS_SD_VER_1_0		0x1U		/**< SD ver 1 */
+#define XSDPS_SD_VER_2_0		0x2U		/**< SD ver 2 */
+#define XSDPS_SCR_BLKCNT	1U
+#define XSDPS_SCR_BLKSIZE	8U
+#define XSDPS_1_BIT_WIDTH	0x1U
+#define XSDPS_4_BIT_WIDTH	0x2U
+#define XSDPS_8_BIT_WIDTH	0x3U
+#define XSDPS_UHS_SPEED_MODE_SDR12	0x0U
+#define XSDPS_UHS_SPEED_MODE_SDR25	0x1U
+#define XSDPS_UHS_SPEED_MODE_SDR50	0x2U
+#define XSDPS_UHS_SPEED_MODE_SDR104	0x3U
+#define XSDPS_UHS_SPEED_MODE_DDR50	0x4U
+#define XSDPS_HIGH_SPEED_MODE		0x5U
+#define XSDPS_DEFAULT_SPEED_MODE	0x6U
+#define XSDPS_HS200_MODE			0x7U
+#define XSDPS_DDR52_MODE			0x4U
+#define XSDPS_SWITCH_CMD_BLKCNT		1U
+#define XSDPS_SWITCH_CMD_BLKSIZE	64U
+#define XSDPS_SWITCH_CMD_HS_GET		0x00FFFFF0U
+#define XSDPS_SWITCH_CMD_HS_SET		0x80FFFFF1U
+#define XSDPS_SWITCH_CMD_SDR12_SET		0x80FFFFF0U
+#define XSDPS_SWITCH_CMD_SDR25_SET		0x80FFFFF1U
+#define XSDPS_SWITCH_CMD_SDR50_SET		0x80FFFFF2U
+#define XSDPS_SWITCH_CMD_SDR104_SET		0x80FFFFF3U
+#define XSDPS_SWITCH_CMD_DDR50_SET		0x80FFFFF4U
+#define XSDPS_EXT_CSD_CMD_BLKCNT	1U
+#define XSDPS_EXT_CSD_CMD_BLKSIZE	512U
+#define XSDPS_TUNING_CMD_BLKCNT		1U
+#define XSDPS_TUNING_CMD_BLKSIZE	64U
+
+#define XSDPS_HIGH_SPEED_MAX_CLK	50000000U
+#define XSDPS_UHS_SDR104_MAX_CLK	208000000U
+#define XSDPS_UHS_SDR50_MAX_CLK		100000000U
+#define XSDPS_UHS_DDR50_MAX_CLK		50000000U
+#define XSDPS_UHS_SDR25_MAX_CLK		50000000U
+#define XSDPS_UHS_SDR12_MAX_CLK		25000000U
+
+#define SD_DRIVER_TYPE_B	0x01U
+#define SD_DRIVER_TYPE_A	0x02U
+#define SD_DRIVER_TYPE_C	0x04U
+#define SD_DRIVER_TYPE_D	0x08U
+#define SD_SET_CURRENT_LIMIT_200	0U
+#define SD_SET_CURRENT_LIMIT_400	1U
+#define SD_SET_CURRENT_LIMIT_600	2U
+#define SD_SET_CURRENT_LIMIT_800	3U
+
+#define SD_MAX_CURRENT_200	(1U << SD_SET_CURRENT_LIMIT_200)
+#define SD_MAX_CURRENT_400	(1U << SD_SET_CURRENT_LIMIT_400)
+#define SD_MAX_CURRENT_600	(1U << SD_SET_CURRENT_LIMIT_600)
+#define SD_MAX_CURRENT_800	(1U << SD_SET_CURRENT_LIMIT_800)
+
+#define XSDPS_SD_SDR12_MAX_CLK	25000000U
+#define XSDPS_SD_SDR25_MAX_CLK	50000000U
+#define XSDPS_SD_SDR50_MAX_CLK	100000000U
+#define XSDPS_SD_DDR50_MAX_CLK	50000000U
+#define XSDPS_SD_SDR104_MAX_CLK	208000000U
+/*
+ * XSDPS_SD_INPUT_MAX_CLK is set to 175000000 in order to keep it smaller
+ * than the clock value coming from the core. This value is kept to safely
+ * switch to SDR104 mode if the SD card supports it.
+ */
+#define XSDPS_SD_INPUT_MAX_CLK	175000000U
+
+#define XSDPS_MMC_HS200_MAX_CLK	200000000U
+#define XSDPS_MMC_HSD_MAX_CLK	52000000U
+#define XSDPS_MMC_DDR_MAX_CLK	52000000U
+
+#define XSDPS_CARD_STATE_IDLE		0U
+#define XSDPS_CARD_STATE_RDY		1U
+#define XSDPS_CARD_STATE_IDEN		2U
+#define XSDPS_CARD_STATE_STBY		3U
+#define XSDPS_CARD_STATE_TRAN		4U
+#define XSDPS_CARD_STATE_DATA		5U
+#define XSDPS_CARD_STATE_RCV		6U
+#define XSDPS_CARD_STATE_PROG		7U
+#define XSDPS_CARD_STATE_DIS		8U
+#define XSDPS_CARD_STATE_BTST		9U
+#define XSDPS_CARD_STATE_SLP		10U
+
+#define XSDPS_SLOT_REM			0U
+#define XSDPS_SLOT_EMB			1U
+
+#define XSDPS_WIDTH_8		8U
+#define XSDPS_WIDTH_4		4U
+
+
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+#define SD0_ITAPDLY_SEL_MASK		0x000000FFU
+#define SD0_OTAPDLY_SEL_MASK		0x0000003FU
+#define SD1_ITAPDLY_SEL_MASK		0x00FF0000U
+#define SD1_OTAPDLY_SEL_MASK		0x003F0000U
+#define SD_DLL_CTRL 				0x00000358U
+#define SD_ITAPDLY					0x00000314U
+#define SD_OTAPDLY					0x00000318U
+#define SD0_DLL_RST					0x00000004U
+#define SD1_DLL_RST					0x00040000U
+#define SD0_ITAPCHGWIN				0x00000200U
+#define SD0_ITAPDLYENA				0x00000100U
+#define SD0_OTAPDLYENA				0x00000040U
+#define SD1_ITAPCHGWIN				0x02000000U
+#define SD1_ITAPDLYENA				0x01000000U
+#define SD1_OTAPDLYENA				0x00400000U
+
+#define SD0_OTAPDLYSEL_HS200_B0		0x00000003U
+#define SD0_OTAPDLYSEL_HS200_B2		0x00000002U
+#define SD0_ITAPDLYSEL_SD50			0x00000014U
+#define SD0_OTAPDLYSEL_SD50			0x00000003U
+#define SD0_ITAPDLYSEL_SD_DDR50		0x0000003DU
+#define SD0_ITAPDLYSEL_EMMC_DDR50	0x00000012U
+#define SD0_OTAPDLYSEL_SD_DDR50		0x00000004U
+#define SD0_OTAPDLYSEL_EMMC_DDR50	0x00000006U
+#define SD0_ITAPDLYSEL_HSD			0x00000015U
+#define SD0_OTAPDLYSEL_SD_HSD		0x00000005U
+#define SD0_OTAPDLYSEL_EMMC_HSD		0x00000006U
+
+#define SD1_OTAPDLYSEL_HS200_B0		0x00030000U
+#define SD1_OTAPDLYSEL_HS200_B2		0x00020000U
+#define SD1_ITAPDLYSEL_SD50			0x00140000U
+#define SD1_OTAPDLYSEL_SD50			0x00030000U
+#define SD1_ITAPDLYSEL_SD_DDR50		0x003D0000U
+#define SD1_ITAPDLYSEL_EMMC_DDR50	0x00120000U
+#define SD1_OTAPDLYSEL_SD_DDR50		0x00040000U
+#define SD1_OTAPDLYSEL_EMMC_DDR50	0x00060000U
+#define SD1_ITAPDLYSEL_HSD			0x00150000U
+#define SD1_OTAPDLYSEL_SD_HSD		0x00050000U
+#define SD1_OTAPDLYSEL_EMMC_HSD		0x00060000U
+
+#endif
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+#define XSdPs_In64 Xil_In64
+#define XSdPs_Out64 Xil_Out64
+
+#define XSdPs_In32 Xil_In32
+#define XSdPs_Out32 Xil_Out32
+
+#define XSdPs_In16 Xil_In16
+#define XSdPs_Out16 Xil_Out16
+
+#define XSdPs_In8 Xil_In8
+#define XSdPs_Out8 Xil_Out8
+
+/****************************************************************************/
+/**
+* Read a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to the target register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XSdPs_ReadReg(XSdPs *InstancePtr. s32 RegOffset)
+*
+******************************************************************************/
+#define XSdPs_ReadReg64(InstancePtr, RegOffset) \
+	XSdPs_In64((InstancePtr->Config.BaseAddress) + RegOffset)
+
+/***************************************************************************/
+/**
+* Write to a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to target register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XSdPs_WriteReg(XSdPs *InstancePtr, s32 RegOffset,
+*		u64 RegisterValue)
+*
+******************************************************************************/
+#define XSdPs_WriteReg64(InstancePtr, RegOffset, RegisterValue) \
+	XSdPs_Out64((InstancePtr->Config.BaseAddress) + (RegOffset), \
+		(RegisterValue))
+
+/****************************************************************************/
+/**
+* Read a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to the target register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XSdPs_ReadReg(u32 BaseAddress. int RegOffset)
+*
+******************************************************************************/
+#define XSdPs_ReadReg(BaseAddress, RegOffset) \
+	XSdPs_In32((BaseAddress) + (RegOffset))
+
+/***************************************************************************/
+/**
+* Write to a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to target register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XSdPs_WriteReg(u32 BaseAddress, int RegOffset,
+*		u32 RegisterValue)
+*
+******************************************************************************/
+#define XSdPs_WriteReg(BaseAddress, RegOffset, RegisterValue) \
+	XSdPs_Out32((BaseAddress) + (RegOffset), (RegisterValue))
+
+/****************************************************************************/
+/**
+* Read a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to the target register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u16 XSdPs_ReadReg(u32 BaseAddress. int RegOffset)
+*
+******************************************************************************/
+static INLINE u16 XSdPs_ReadReg16(u32 BaseAddress, u8 RegOffset)
+{
+#if defined (__MICROBLAZE__)
+	u32 Reg;
+	BaseAddress += RegOffset & 0xFC;
+	Reg = XSdPs_In32(BaseAddress);
+	Reg >>= ((RegOffset & 0x3)*8);
+	return (u16)Reg;
+#else
+	return XSdPs_In16((BaseAddress) + (RegOffset));
+#endif
+}
+
+/***************************************************************************/
+/**
+* Write to a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to target register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XSdPs_WriteReg(u32 BaseAddress, int RegOffset,
+*		u16 RegisterValue)
+*
+******************************************************************************/
+
+static INLINE void XSdPs_WriteReg16(u32 BaseAddress, u8 RegOffset, u16 RegisterValue)
+{
+#if defined (__MICROBLAZE__)
+	u32 Reg;
+	BaseAddress += RegOffset & 0xFC;
+	Reg = XSdPs_In32(BaseAddress);
+	Reg &= ~(0xFFFF<<((RegOffset & 0x3)*8));
+	Reg |= RegisterValue <<((RegOffset & 0x3)*8);
+	XSdPs_Out32(BaseAddress, Reg);
+#else
+	XSdPs_Out16((BaseAddress) + (RegOffset), (RegisterValue));
+#endif
+}
+
+/****************************************************************************/
+/**
+* Read a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to the target register.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u8 XSdPs_ReadReg(u32 BaseAddress. int RegOffset)
+*
+******************************************************************************/
+static INLINE u8 XSdPs_ReadReg8(u32 BaseAddress, u8 RegOffset)
+{
+#if defined (__MICROBLAZE__)
+	u32 Reg;
+	BaseAddress += RegOffset & 0xFC;
+	Reg = XSdPs_In32(BaseAddress);
+	Reg >>= ((RegOffset & 0x3)*8);
+	return (u8)Reg;
+#else
+	return XSdPs_In8((BaseAddress) + (RegOffset));
+#endif
+}
+/***************************************************************************/
+/**
+* Write to a register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the 1st register of the
+*		device to target register.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XSdPs_WriteReg(u32 BaseAddress, int RegOffset,
+*		u8 RegisterValue)
+*
+******************************************************************************/
+static INLINE void XSdPs_WriteReg8(u32 BaseAddress, u8 RegOffset, u8 RegisterValue)
+{
+#if defined (__MICROBLAZE__)
+	u32 Reg;
+	BaseAddress += RegOffset & 0xFC;
+	Reg = XSdPs_In32(BaseAddress);
+	Reg &= ~(0xFF<<((RegOffset & 0x3)*8));
+	Reg |= RegisterValue <<((RegOffset & 0x3)*8);
+	XSdPs_Out32(BaseAddress, Reg);
+#else
+	XSdPs_Out8((BaseAddress) + (RegOffset), (RegisterValue));
+#endif
+}
+/***************************************************************************/
+/**
+* Macro to get present status register
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XSdPs_WriteReg(u32 BaseAddress, int RegOffset,
+*		u8 RegisterValue)
+*
+******************************************************************************/
+#define XSdPs_GetPresentStatusReg(BaseAddress) \
+		XSdPs_In32((BaseAddress) + (XSDPS_PRES_STATE_OFFSET))
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SD_HW_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_options.c b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_options.c
new file mode 100644
index 0000000..bcd7c68
--- /dev/null
+++ b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_options.c
@@ -0,0 +1,1760 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsdps_options.c
+* @addtogroup sdps_v3_4
+* @{
+*
+* Contains API's for changing the various options in host and card.
+* See xsdps.h for a detailed description of the device and driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ---    -------- -----------------------------------------------
+* 1.00a hk/sg  10/17/13 Initial release
+* 2.1   hk     04/18/14 Increase sleep for eMMC switch command.
+*                       Add sleep for microblaze designs. CR# 781117.
+* 2.3   sk     09/23/14 Use XSdPs_Change_ClkFreq API whenever changing
+*						clock.CR# 816586.
+* 2.5 	sg	   07/09/15 Added SD 3.0 features
+*       kvn    07/15/15 Modified the code according to MISRAC-2012.
+* 2.7   sk     01/08/16 Added workaround for issue in auto tuning mode
+*                       of SDR50, SDR104 and HS200.
+*       sk     02/16/16 Corrected the Tuning logic.
+*       sk     03/02/16 Configured the Tap Delay values for eMMC HS200 mode.
+* 2.8   sk     04/20/16 Added new workaround for auto tuning.
+* 3.0   sk     07/07/16 Used usleep API for both arm and microblaze.
+*       sk     07/16/16 Added support for UHS modes.
+*       sk     07/16/16 Added Tap delays accordingly to different SD/eMMC
+*                       operating modes.
+* 3.1   mi     09/07/16 Removed compilation warnings with extra compiler flags.
+*       sk     11/07/16 Enable Rst_n bit in ext_csd reg if not enabled.
+*       sk     11/16/16 Issue DLL reset at 31 iteration to load new zero value.
+* 3.2   sk     02/01/17 Added HSD and DDR mode support for eMMC.
+*       sk     02/01/17 Consider bus width parameter from design for switching
+*       vns    02/09/17 Added ARMA53_32 support for ZynqMP CR#968397
+*       vns    03/13/17 Fixed MISRAC mandatory violation
+*       sk     03/20/17 Add support for EL1 non-secure mode.
+* 3.3   mn     07/25/17 Removed SD0_OTAPDLYENA and SD1_OTAPDLYENA bits
+*       mn     08/07/17	Properly set OTAPDLY value by clearing previous bit
+* 			settings
+*       mn     08/17/17 Added CCI support for A53 and disabled data cache
+*                       operations when it is enabled.
+*       mn     08/22/17 Updated for Word Access System support
+* 3.4   mn     01/22/18 Separated out SDR104 and HS200 clock defines
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xsdps.h"
+#include "sleep.h"
+#if defined (__aarch64__)
+#include "xil_smc.h"
+#endif
+/************************** Constant Definitions *****************************/
+#define UHS_SDR12_SUPPORT	0x1U
+#define UHS_SDR25_SUPPORT	0x2U
+#define UHS_SDR50_SUPPORT	0x4U
+#define UHS_SDR104_SUPPORT	0x8U
+#define UHS_DDR50_SUPPORT	0x10U
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+s32 XSdPs_CmdTransfer(XSdPs *InstancePtr, u32 Cmd, u32 Arg, u32 BlkCnt);
+void XSdPs_SetupADMA2DescTbl(XSdPs *InstancePtr, u32 BlkCnt, const u8 *Buff);
+static s32 XSdPs_Execute_Tuning(XSdPs *InstancePtr);
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+s32 XSdPs_Uhs_ModeInit(XSdPs *InstancePtr, u8 Mode);
+static void XSdPs_sdr50_tapdelay(u32 Bank, u32 DeviceId, u32 CardType);
+void XSdPs_SetTapDelay(XSdPs *InstancePtr);
+static void XSdPs_DllReset(XSdPs *InstancePtr);
+#endif
+
+extern u16 TransferMode;
+/*****************************************************************************/
+/**
+* Update Block size for read/write operations.
+*
+* @param	InstancePtr is a pointer to the instance to be worked on.
+* @param	BlkSize - Block size passed by the user.
+*
+* @return	None
+*
+******************************************************************************/
+s32 XSdPs_SetBlkSize(XSdPs *InstancePtr, u16 BlkSize)
+{
+	s32 Status;
+	u32 PresentStateReg;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	PresentStateReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_PRES_STATE_OFFSET);
+
+	if ((PresentStateReg & ((u32)XSDPS_PSR_INHIBIT_CMD_MASK |
+			(u32)XSDPS_PSR_INHIBIT_DAT_MASK |
+			(u32)XSDPS_PSR_WR_ACTIVE_MASK | (u32)XSDPS_PSR_RD_ACTIVE_MASK)) != 0U) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+
+	/* Send block write command */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD16, BlkSize, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	Status = (s32)XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+
+	/* Set block size to the value passed */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress, XSDPS_BLK_SIZE_OFFSET,
+			 BlkSize & XSDPS_BLK_SIZE_MASK);
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH:
+		return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* API to get bus width support by card.
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+* @param	SCR - buffer to store SCR register returned by card.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if fail.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XSdPs_Get_BusWidth(XSdPs *InstancePtr, u8 *SCR)
+{
+	s32 Status;
+	u32 StatusReg;
+	u16 BlkCnt;
+	u16 BlkSize;
+	s32 LoopCnt;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	for (LoopCnt = 0; LoopCnt < 8; LoopCnt++) {
+		SCR[LoopCnt] = 0U;
+	}
+
+	/* Send block write command */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD55,
+			InstancePtr->RelCardAddr, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	BlkCnt = XSDPS_SCR_BLKCNT;
+	BlkSize = XSDPS_SCR_BLKSIZE;
+
+	/* Set block size to the value passed */
+	BlkSize &= XSDPS_BLK_SIZE_MASK;
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_BLK_SIZE_OFFSET, BlkSize);
+
+	XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, SCR);
+
+	TransferMode = 	XSDPS_TM_DAT_DIR_SEL_MASK | XSDPS_TM_DMA_EN_MASK;
+
+	if (InstancePtr->Config.IsCacheCoherent == 0) {
+		Xil_DCacheInvalidateRange((INTPTR)SCR, 8);
+	}
+
+	Status = XSdPs_CmdTransfer(InstancePtr, ACMD51, 0U, BlkCnt);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/*
+	 * Check for transfer complete
+	 * Polling for response for now
+	 */
+	do {
+		StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_NORM_INTR_STS_OFFSET);
+		if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+			/* Write to clear error bits */
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_ERR_INTR_STS_OFFSET,
+					XSDPS_ERROR_INTR_ALL_MASK);
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} while ((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+	/* Write to clear bit */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+
+	Status = (s32)XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH:
+		return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* API to set bus width to 4-bit in card and host
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if fail.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XSdPs_Change_BusWidth(XSdPs *InstancePtr)
+{
+	s32 Status;
+	u32 StatusReg;
+	u32 Arg;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+
+	/*
+	 * check for bus width for 3.0 controller and return if
+	 * bus width is <4
+	 */
+	if ((InstancePtr->HC_Version == XSDPS_HC_SPEC_V3) &&
+			(InstancePtr->Config.BusWidth < XSDPS_WIDTH_4)) {
+		Status = XST_SUCCESS;
+		goto RETURN_PATH;
+	}
+
+	if (InstancePtr->CardType == XSDPS_CARD_SD) {
+
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD55, InstancePtr->RelCardAddr,
+				0U);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		InstancePtr->BusWidth = XSDPS_4_BIT_WIDTH;
+
+		Arg = ((u32)InstancePtr->BusWidth);
+
+		Status = XSdPs_CmdTransfer(InstancePtr, ACMD6, Arg, 0U);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} else {
+
+		if ((InstancePtr->HC_Version == XSDPS_HC_SPEC_V3)
+				&& (InstancePtr->CardType == XSDPS_CHIP_EMMC) &&
+				(InstancePtr->Config.BusWidth == XSDPS_WIDTH_8)) {
+			/* in case of eMMC data width 8-bit */
+			InstancePtr->BusWidth = XSDPS_8_BIT_WIDTH;
+		} else {
+			InstancePtr->BusWidth = XSDPS_4_BIT_WIDTH;
+		}
+
+		if (InstancePtr->BusWidth == XSDPS_8_BIT_WIDTH) {
+			if (InstancePtr->Mode == XSDPS_DDR52_MODE)
+				Arg = XSDPS_MMC_DDR_8_BIT_BUS_ARG;
+			else
+				Arg = XSDPS_MMC_8_BIT_BUS_ARG;
+		} else {
+			if (InstancePtr->Mode == XSDPS_DDR52_MODE)
+				Arg = XSDPS_MMC_DDR_4_BIT_BUS_ARG;
+			else
+				Arg = XSDPS_MMC_4_BIT_BUS_ARG;
+		}
+
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD6, Arg, 0U);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		/* Check for transfer complete */
+		do {
+			StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_NORM_INTR_STS_OFFSET);
+			if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+				/* Write to clear error bits */
+				XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_ERR_INTR_STS_OFFSET,
+						XSDPS_ERROR_INTR_ALL_MASK);
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		} while((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+		/* Write to clear bit */
+		XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+	}
+
+	usleep(XSDPS_MMC_DELAY_FOR_SWITCH);
+
+	StatusReg = XSdPs_ReadReg8(InstancePtr->Config.BaseAddress,
+					XSDPS_HOST_CTRL1_OFFSET);
+
+	/* Width setting in controller */
+	if (InstancePtr->BusWidth == XSDPS_8_BIT_WIDTH) {
+		StatusReg |= XSDPS_HC_EXT_BUS_WIDTH;
+	} else {
+		StatusReg |= XSDPS_HC_WIDTH_MASK;
+	}
+
+	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+			XSDPS_HOST_CTRL1_OFFSET,
+			(u8)StatusReg);
+
+	if (InstancePtr->Mode == XSDPS_DDR52_MODE) {
+		StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_HOST_CTRL2_OFFSET);
+		StatusReg &= (u16)(~XSDPS_HC2_UHS_MODE_MASK);
+		StatusReg |= InstancePtr->Mode;
+		XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_HOST_CTRL2_OFFSET, StatusReg);
+	}
+
+	Status = (s32)XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH:
+		return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* API to get bus speed supported by card.
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+* @param	ReadBuff - buffer to store function group support data
+*		returned by card.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if fail.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XSdPs_Get_BusSpeed(XSdPs *InstancePtr, u8 *ReadBuff)
+{
+	s32 Status;
+	u32 StatusReg;
+	u32 Arg;
+	u16 BlkCnt;
+	u16 BlkSize;
+	s32 LoopCnt;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	for (LoopCnt = 0; LoopCnt < 64; LoopCnt++) {
+		ReadBuff[LoopCnt] = 0U;
+	}
+
+	BlkCnt = XSDPS_SWITCH_CMD_BLKCNT;
+	BlkSize = XSDPS_SWITCH_CMD_BLKSIZE;
+	BlkSize &= XSDPS_BLK_SIZE_MASK;
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_BLK_SIZE_OFFSET, BlkSize);
+
+	XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, ReadBuff);
+
+	TransferMode = 	XSDPS_TM_DAT_DIR_SEL_MASK | XSDPS_TM_DMA_EN_MASK;
+
+	Arg = XSDPS_SWITCH_CMD_HS_GET;
+
+	if (InstancePtr->Config.IsCacheCoherent == 0) {
+		Xil_DCacheInvalidateRange((INTPTR)ReadBuff, 64);
+	}
+
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD6, Arg, 1U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/*
+	 * Check for transfer complete
+	 * Polling for response for now
+	 */
+	do {
+		StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_NORM_INTR_STS_OFFSET);
+		if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+			/* Write to clear error bits */
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_ERR_INTR_STS_OFFSET,
+					XSDPS_ERROR_INTR_ALL_MASK);
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} while ((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+	/* Write to clear bit */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+
+	Status = (s32)XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH:
+		return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* API to set high speed in card and host. Changes clock in host accordingly.
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if fail.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XSdPs_Change_BusSpeed(XSdPs *InstancePtr)
+{
+	s32 Status;
+	u32 StatusReg;
+	u32 Arg;
+	u16 BlkCnt;
+	u16 BlkSize;
+	u8 ReadBuff[64] = {0U};
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	if (InstancePtr->CardType == XSDPS_CARD_SD) {
+
+		BlkCnt = XSDPS_SWITCH_CMD_BLKCNT;
+		BlkSize = XSDPS_SWITCH_CMD_BLKSIZE;
+		BlkSize &= XSDPS_BLK_SIZE_MASK;
+		XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_BLK_SIZE_OFFSET, BlkSize);
+
+		XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, ReadBuff);
+
+		if (InstancePtr->Config.IsCacheCoherent == 0) {
+			Xil_DCacheFlushRange((INTPTR)ReadBuff, 64);
+		}
+
+		TransferMode = 	XSDPS_TM_DAT_DIR_SEL_MASK | XSDPS_TM_DMA_EN_MASK;
+
+		Arg = XSDPS_SWITCH_CMD_HS_SET;
+
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD6, Arg, 1U);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		/*
+		 * Check for transfer complete
+		 * Polling for response for now
+		 */
+		do {
+			StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_NORM_INTR_STS_OFFSET);
+			if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+				/* Write to clear error bits */
+				XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_ERR_INTR_STS_OFFSET,
+						XSDPS_ERROR_INTR_ALL_MASK);
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		} while ((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+		/* Write to clear bit */
+		XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+
+		/* Change the clock frequency to 50 MHz */
+		InstancePtr->BusSpeed = XSDPS_CLK_50_MHZ;
+		Status = XSdPs_Change_ClkFreq(InstancePtr, InstancePtr->BusSpeed);
+		if (Status != XST_SUCCESS) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+		}
+
+	} else if (InstancePtr->CardType == XSDPS_CARD_MMC) {
+		Arg = XSDPS_MMC_HIGH_SPEED_ARG;
+
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD6, Arg, 0U);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		/*
+		 * Check for transfer complete
+		 */
+		do {
+			StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_NORM_INTR_STS_OFFSET);
+			if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+				/*
+				 * Write to clear error bits
+				 */
+				XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_ERR_INTR_STS_OFFSET,
+						XSDPS_ERROR_INTR_ALL_MASK);
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		} while ((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+		/*
+		 * Write to clear bit
+		 */
+		XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+
+		/* Change the clock frequency to 52 MHz */
+		InstancePtr->BusSpeed = XSDPS_CLK_52_MHZ;
+		Status = XSdPs_Change_ClkFreq(InstancePtr, XSDPS_CLK_52_MHZ);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} else {
+		if (InstancePtr->Mode == XSDPS_HS200_MODE) {
+			Arg = XSDPS_MMC_HS200_ARG;
+			InstancePtr->BusSpeed = XSDPS_MMC_HS200_MAX_CLK;
+		} else if (InstancePtr->Mode == XSDPS_DDR52_MODE) {
+			Arg = XSDPS_MMC_HIGH_SPEED_ARG;
+			InstancePtr->BusSpeed = XSDPS_MMC_DDR_MAX_CLK;
+		} else {
+			Arg = XSDPS_MMC_HIGH_SPEED_ARG;
+			InstancePtr->BusSpeed = XSDPS_MMC_HSD_MAX_CLK;
+		}
+
+		Status = XSdPs_CmdTransfer(InstancePtr, CMD6, Arg, 0U);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		/*
+		 * Check for transfer complete
+		 */
+		do {
+			StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_NORM_INTR_STS_OFFSET);
+			if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+				/*
+				 * Write to clear error bits
+				 */
+				XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+						XSDPS_ERR_INTR_STS_OFFSET,
+						XSDPS_ERROR_INTR_ALL_MASK);
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		} while ((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+		/*
+		 * Write to clear bit
+		 */
+		XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+
+		Status = XSdPs_Change_ClkFreq(InstancePtr, InstancePtr->BusSpeed);
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		if (InstancePtr->Mode == XSDPS_HS200_MODE) {
+			Status = XSdPs_Execute_Tuning(InstancePtr);
+			if (Status != XST_SUCCESS) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+			}
+		}
+	}
+
+	usleep(XSDPS_MMC_DELAY_FOR_SWITCH);
+
+	StatusReg = (s32)XSdPs_ReadReg8(InstancePtr->Config.BaseAddress,
+					XSDPS_HOST_CTRL1_OFFSET);
+	StatusReg |= XSDPS_HC_SPEED_MASK;
+	XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
+			XSDPS_HOST_CTRL1_OFFSET, (u8)StatusReg);
+
+	Status = (s32)XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH:
+		return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* API to change clock freq to given value.
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+* @param	SelFreq - Clock frequency in Hz.
+*
+* @return	None
+*
+* @note		This API will change clock frequency to the value less than
+*		or equal to the given value using the permissible dividors.
+*
+******************************************************************************/
+s32 XSdPs_Change_ClkFreq(XSdPs *InstancePtr, u32 SelFreq)
+{
+	u16 ClockReg;
+	u16 DivCnt;
+	u16 Divisor = 0U;
+	u16 ExtDivisor;
+	s32 Status;
+	u16 ReadReg;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Disable clock */
+	ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET);
+	ClockReg &= ~(XSDPS_CC_SD_CLK_EN_MASK | XSDPS_CC_INT_CLK_EN_MASK);
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET, ClockReg);
+
+	if (InstancePtr->HC_Version == XSDPS_HC_SPEC_V3) {
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+	if ((InstancePtr->Mode != XSDPS_DEFAULT_SPEED_MODE) &&
+			(InstancePtr->Mode != XSDPS_UHS_SPEED_MODE_SDR12))
+		/* Program the Tap delays */
+		XSdPs_SetTapDelay(InstancePtr);
+#endif
+		/* Calculate divisor */
+		for (DivCnt = 0x1U; DivCnt <= XSDPS_CC_EXT_MAX_DIV_CNT;DivCnt++) {
+			if (((InstancePtr->Config.InputClockHz) / DivCnt) <= SelFreq) {
+				Divisor = DivCnt >> 1;
+				break;
+			}
+		}
+
+		if (DivCnt > XSDPS_CC_EXT_MAX_DIV_CNT) {
+			/* No valid divisor found for given frequency */
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} else {
+		/* Calculate divisor */
+		DivCnt = 0x1U;
+		while (DivCnt <= XSDPS_CC_MAX_DIV_CNT) {
+			if (((InstancePtr->Config.InputClockHz) / DivCnt) <= SelFreq) {
+				Divisor = DivCnt / 2U;
+				break;
+			}
+			DivCnt = DivCnt << 1U;
+		}
+
+		if (DivCnt > XSDPS_CC_MAX_DIV_CNT) {
+			/* No valid divisor found for given frequency */
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	}
+
+	/* Set clock divisor */
+	if (InstancePtr->HC_Version == XSDPS_HC_SPEC_V3) {
+		ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_CLK_CTRL_OFFSET);
+		ClockReg &= ~(XSDPS_CC_SDCLK_FREQ_SEL_MASK |
+		XSDPS_CC_SDCLK_FREQ_SEL_EXT_MASK);
+
+		ExtDivisor = Divisor >> 8;
+		ExtDivisor <<= XSDPS_CC_EXT_DIV_SHIFT;
+		ExtDivisor &= XSDPS_CC_SDCLK_FREQ_SEL_EXT_MASK;
+
+		Divisor <<= XSDPS_CC_DIV_SHIFT;
+		Divisor &= XSDPS_CC_SDCLK_FREQ_SEL_MASK;
+		ClockReg |= Divisor | ExtDivisor | (u16)XSDPS_CC_INT_CLK_EN_MASK;
+		XSdPs_WriteReg16(InstancePtr->Config.BaseAddress, XSDPS_CLK_CTRL_OFFSET,
+				ClockReg);
+	} else {
+		ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_CLK_CTRL_OFFSET);
+		ClockReg &= (~XSDPS_CC_SDCLK_FREQ_SEL_MASK);
+
+		Divisor <<= XSDPS_CC_DIV_SHIFT;
+		Divisor &= XSDPS_CC_SDCLK_FREQ_SEL_MASK;
+		ClockReg |= Divisor | (u16)XSDPS_CC_INT_CLK_EN_MASK;
+		XSdPs_WriteReg16(InstancePtr->Config.BaseAddress, XSDPS_CLK_CTRL_OFFSET,
+				ClockReg);
+	}
+
+	/* Wait for internal clock to stabilize */
+	ReadReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_CLK_CTRL_OFFSET);
+	while((ReadReg & XSDPS_CC_INT_CLK_STABLE_MASK) == 0U) {
+		ReadReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_CLK_CTRL_OFFSET);;
+	}
+
+	/* Enable SD clock */
+	ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET);
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET,
+			ClockReg | XSDPS_CC_SD_CLK_EN_MASK);
+
+	Status = XST_SUCCESS;
+
+RETURN_PATH:
+		return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* API to send pullup command to card before using DAT line 3(using 4-bit bus)
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if fail.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XSdPs_Pullup(XSdPs *InstancePtr)
+{
+	s32 Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD55,
+			InstancePtr->RelCardAddr, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	Status = XSdPs_CmdTransfer(InstancePtr, ACMD42, 0U, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH:
+		return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* API to get EXT_CSD register of eMMC.
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+* @param	ReadBuff - buffer to store EXT_CSD
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if fail.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XSdPs_Get_Mmc_ExtCsd(XSdPs *InstancePtr, u8 *ReadBuff)
+{
+	s32 Status;
+	u32 StatusReg;
+	u32 Arg = 0U;
+	u16 BlkCnt;
+	u16 BlkSize;
+	s32 LoopCnt;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	for (LoopCnt = 0; LoopCnt < 512; LoopCnt++) {
+		ReadBuff[LoopCnt] = 0U;
+	}
+
+	BlkCnt = XSDPS_EXT_CSD_CMD_BLKCNT;
+	BlkSize = XSDPS_EXT_CSD_CMD_BLKSIZE;
+	BlkSize &= XSDPS_BLK_SIZE_MASK;
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_BLK_SIZE_OFFSET, BlkSize);
+
+	XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, ReadBuff);
+
+	if (InstancePtr->Config.IsCacheCoherent == 0) {
+		Xil_DCacheInvalidateRange((INTPTR)ReadBuff, 512U);
+	}
+
+	TransferMode = 	XSDPS_TM_DAT_DIR_SEL_MASK | XSDPS_TM_DMA_EN_MASK;
+
+	/* Send SEND_EXT_CSD command */
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD8, Arg, 1U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/*
+	 * Check for transfer complete
+	 * Polling for response for now
+	 */
+	do {
+		StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_NORM_INTR_STS_OFFSET);
+		if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+			/* Write to clear error bits */
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_ERR_INTR_STS_OFFSET,
+					XSDPS_ERROR_INTR_ALL_MASK);
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} while ((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+	/* Write to clear bit */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+
+	Status = (s32)XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH:
+		return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* API to write EXT_CSD register of eMMC.
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+* @param	Arg is the argument to be sent along with the command
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if fail.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XSdPs_Set_Mmc_ExtCsd(XSdPs *InstancePtr, u32 Arg)
+{
+	s32 Status;
+	u32 StatusReg;
+
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD6, Arg, 0U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/*
+	 * Check for transfer complete
+	 */
+	do {
+		StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_NORM_INTR_STS_OFFSET);
+		if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+			/*
+			 * Write to clear error bits
+			 */
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_ERR_INTR_STS_OFFSET,
+					XSDPS_ERROR_INTR_ALL_MASK);
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} while ((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+	/* Write to clear bit */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+
+	Status = (s32)XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
+			XSDPS_RESP0_OFFSET);
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH:
+		return Status;
+
+}
+
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+/*****************************************************************************/
+/**
+*
+* API to Identify the supported UHS mode. This API will assign the
+* corresponding tap delay API to the Config_TapDelay pointer based on the
+* supported bus speed.
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+* @param	ReadBuff contains the response for CMD6
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XSdPs_Identify_UhsMode(XSdPs *InstancePtr, u8 *ReadBuff)
+{
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	if (((ReadBuff[13] & UHS_SDR104_SUPPORT) != 0U) &&
+		(InstancePtr->Config.InputClockHz >= XSDPS_SD_INPUT_MAX_CLK)) {
+		InstancePtr->Mode = XSDPS_UHS_SPEED_MODE_SDR104;
+		InstancePtr->Config_TapDelay = XSdPs_sdr104_hs200_tapdelay;
+	}
+	else if (((ReadBuff[13] & UHS_SDR50_SUPPORT) != 0U) &&
+		(InstancePtr->Config.InputClockHz >= XSDPS_SD_SDR50_MAX_CLK)) {
+		InstancePtr->Mode = XSDPS_UHS_SPEED_MODE_SDR50;
+		InstancePtr->Config_TapDelay = XSdPs_sdr50_tapdelay;
+	}
+	else if (((ReadBuff[13] & UHS_DDR50_SUPPORT) != 0U) &&
+		(InstancePtr->Config.InputClockHz >= XSDPS_SD_DDR50_MAX_CLK)) {
+		InstancePtr->Mode = XSDPS_UHS_SPEED_MODE_DDR50;
+		InstancePtr->Config_TapDelay = XSdPs_ddr50_tapdelay;
+	}
+	else if (((ReadBuff[13] & UHS_SDR25_SUPPORT) != 0U) &&
+		(InstancePtr->Config.InputClockHz >= XSDPS_SD_SDR25_MAX_CLK)) {
+		InstancePtr->Mode = XSDPS_UHS_SPEED_MODE_SDR25;
+		InstancePtr->Config_TapDelay = XSdPs_hsd_sdr25_tapdelay;
+	}
+	else
+		InstancePtr->Mode = XSDPS_UHS_SPEED_MODE_SDR12;
+}
+
+/*****************************************************************************/
+/**
+*
+* API to UHS-I mode initialization
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+* @param	Mode UHS-I mode
+*
+* @return
+*		- XST_SUCCESS if successful.
+*		- XST_FAILURE if fail.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XSdPs_Uhs_ModeInit(XSdPs *InstancePtr, u8 Mode)
+{
+	s32 Status;
+	u16 StatusReg;
+	u16 CtrlReg;
+	u32 Arg;
+	u16 BlkCnt;
+	u16 BlkSize;
+	u8 ReadBuff[64] = {0U};
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Drive strength */
+
+	/* Bus speed mode selection */
+	BlkCnt = XSDPS_SWITCH_CMD_BLKCNT;
+	BlkSize = XSDPS_SWITCH_CMD_BLKSIZE;
+	BlkSize &= XSDPS_BLK_SIZE_MASK;
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress, XSDPS_BLK_SIZE_OFFSET,
+			BlkSize);
+
+	XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, ReadBuff);
+
+	if (InstancePtr->Config.IsCacheCoherent == 0) {
+		Xil_DCacheFlushRange((INTPTR)ReadBuff, 64);
+	}
+
+	TransferMode = 	XSDPS_TM_DAT_DIR_SEL_MASK | XSDPS_TM_DMA_EN_MASK;
+
+	switch (Mode) {
+	case 0U:
+		Arg = XSDPS_SWITCH_CMD_SDR12_SET;
+		InstancePtr->BusSpeed = XSDPS_SD_SDR12_MAX_CLK;
+		break;
+	case 1U:
+		Arg = XSDPS_SWITCH_CMD_SDR25_SET;
+		InstancePtr->BusSpeed = XSDPS_SD_SDR25_MAX_CLK;
+		break;
+	case 2U:
+		Arg = XSDPS_SWITCH_CMD_SDR50_SET;
+		InstancePtr->BusSpeed = XSDPS_SD_SDR50_MAX_CLK;
+		break;
+	case 3U:
+		Arg = XSDPS_SWITCH_CMD_SDR104_SET;
+		InstancePtr->BusSpeed = XSDPS_SD_SDR104_MAX_CLK;
+		break;
+	case 4U:
+		Arg = XSDPS_SWITCH_CMD_DDR50_SET;
+		InstancePtr->BusSpeed = XSDPS_SD_DDR50_MAX_CLK;
+		break;
+	default:
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+		break;
+	}
+
+	Status = XSdPs_CmdTransfer(InstancePtr, CMD6, Arg, 1U);
+	if (Status != XST_SUCCESS) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/*
+	 * Check for transfer complete
+	 * Polling for response for now
+	 */
+	do {
+		StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_NORM_INTR_STS_OFFSET);
+		if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
+			/* Write to clear error bits */
+			XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_ERR_INTR_STS_OFFSET, XSDPS_ERROR_INTR_ALL_MASK);
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+	} while ((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
+
+	/* Write to clear bit */
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
+
+
+	/* Current limit */
+
+	/* Set UHS mode in controller */
+	CtrlReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_HOST_CTRL2_OFFSET);
+	CtrlReg &= (u16)(~XSDPS_HC2_UHS_MODE_MASK);
+	CtrlReg |= Mode;
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_HOST_CTRL2_OFFSET, CtrlReg);
+
+	/* Change the clock frequency */
+	Status = XSdPs_Change_ClkFreq(InstancePtr, InstancePtr->BusSpeed);
+	if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+	}
+
+	if((Mode == XSDPS_UHS_SPEED_MODE_SDR104) ||
+			(Mode == XSDPS_UHS_SPEED_MODE_SDR50)) {
+		/* Send tuning pattern */
+		Status = XSdPs_Execute_Tuning(InstancePtr);
+		if (Status != XST_SUCCESS) {
+				Status = XST_FAILURE;
+				goto RETURN_PATH;
+		}
+	}
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH:
+		return Status;
+}
+#endif
+
+static s32 XSdPs_Execute_Tuning(XSdPs *InstancePtr)
+{
+	s32 Status;
+	u16 BlkSize;
+	u16 CtrlReg;
+	u8 TuningCount;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	BlkSize = XSDPS_TUNING_CMD_BLKSIZE;
+	if(InstancePtr->BusWidth == XSDPS_8_BIT_WIDTH)
+	{
+		BlkSize = BlkSize*2U;
+	}
+	BlkSize &= XSDPS_BLK_SIZE_MASK;
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress, XSDPS_BLK_SIZE_OFFSET,
+			BlkSize);
+
+	TransferMode = 	XSDPS_TM_DAT_DIR_SEL_MASK;
+
+	CtrlReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_HOST_CTRL2_OFFSET);
+	CtrlReg |= XSDPS_HC2_EXEC_TNG_MASK;
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_HOST_CTRL2_OFFSET, CtrlReg);
+
+	/*
+	 * workaround which can work for 1.0/2.0 silicon for auto tuning.
+	 * This can be revisited for 3.0 silicon if necessary.
+	 */
+	/* Wait for ~60 clock cycles to reset the tap values */
+	(void)usleep(1U);
+
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+	/* Issue DLL Reset to load new SDHC tuned tap values */
+	XSdPs_DllReset(InstancePtr);
+#endif
+
+	for (TuningCount = 0U; TuningCount < MAX_TUNING_COUNT; TuningCount++) {
+
+		if (InstancePtr->CardType == XSDPS_CARD_SD) {
+			Status = XSdPs_CmdTransfer(InstancePtr, CMD19, 0U, 1U);
+		} else {
+			Status = XSdPs_CmdTransfer(InstancePtr, CMD21, 0U, 1U);
+		}
+
+		if (Status != XST_SUCCESS) {
+			Status = XST_FAILURE;
+			goto RETURN_PATH;
+		}
+
+		if ((XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_HOST_CTRL2_OFFSET) & XSDPS_HC2_EXEC_TNG_MASK) == 0U) {
+			break;
+		}
+
+		if (TuningCount == 31) {
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+			/* Issue DLL Reset to load new SDHC tuned tap values */
+			XSdPs_DllReset(InstancePtr);
+#endif
+		}
+	}
+
+	if ((XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_HOST_CTRL2_OFFSET) & XSDPS_HC2_SAMP_CLK_SEL_MASK) == 0U) {
+		Status = XST_FAILURE;
+		goto RETURN_PATH;
+	}
+
+	/* Wait for ~12 clock cycles to synchronize the new tap values */
+	(void)usleep(1U);
+
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+	/* Issue DLL Reset to load new SDHC tuned tap values */
+	XSdPs_DllReset(InstancePtr);
+#endif
+
+	Status = XST_SUCCESS;
+
+	RETURN_PATH: return Status;
+
+}
+
+#if defined (ARMR5) || defined (__aarch64__) || defined (ARMA53_32)
+/*****************************************************************************/
+/**
+*
+* API to set Tap Delay for SDR104 and HS200 modes
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void XSdPs_sdr104_hs200_tapdelay(u32 Bank, u32 DeviceId, u32 CardType)
+{
+	u32 TapDelay;
+	(void) CardType;
+
+#ifdef XPAR_PSU_SD_0_DEVICE_ID
+	if (DeviceId == 0U) {
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)TapDelay;
+		if (Bank == 2)
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD0_OTAPDLY_SEL_MASK << 32),
+					(u64)SD0_OTAPDLYSEL_HS200_B2, 0, 0, 0, 0, 0);
+		else
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD0_OTAPDLY_SEL_MASK << 32),
+					(u64)SD0_OTAPDLYSEL_HS200_B0, 0, 0, 0, 0, 0);
+#else
+		/* Program the OTAPDLY */
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY);
+		TapDelay &= ~SD0_OTAPDLY_SEL_MASK;
+		if (Bank == 2)
+			TapDelay |= SD0_OTAPDLYSEL_HS200_B2;
+		else
+			TapDelay |= SD0_OTAPDLYSEL_HS200_B0;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY, TapDelay);
+#endif
+	} else {
+#endif
+		(void) DeviceId;
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)TapDelay;
+		if (Bank == 2)
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD1_OTAPDLY_SEL_MASK << 32),
+					(u64)SD1_OTAPDLYSEL_HS200_B2, 0, 0, 0, 0, 0);
+		else
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD1_OTAPDLY_SEL_MASK << 32),
+					(u64)SD1_OTAPDLYSEL_HS200_B0, 0, 0, 0, 0, 0);
+#else
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY);
+		TapDelay &= ~SD1_OTAPDLY_SEL_MASK;
+		if (Bank == 2)
+			TapDelay |= SD1_OTAPDLYSEL_HS200_B2;
+		else
+			TapDelay |= SD1_OTAPDLYSEL_HS200_B0;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY, TapDelay);
+#endif
+#ifdef XPAR_PSU_SD_0_DEVICE_ID
+	}
+#endif
+}
+
+/*****************************************************************************/
+/**
+*
+* API to set Tap Delay for SDR50 mode
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void XSdPs_sdr50_tapdelay(u32 Bank, u32 DeviceId, u32 CardType)
+{
+	u32 TapDelay;
+	(void) Bank;
+	(void) CardType;
+
+#ifdef XPAR_PSU_SD_0_DEVICE_ID
+	if (DeviceId == 0U) {
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)TapDelay;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_OTAPDLY) |
+				((u64)SD0_OTAPDLY_SEL_MASK << 32), (u64)SD0_OTAPDLYSEL_SD50,
+				0, 0, 0, 0, 0);
+#else
+		/* Program the OTAPDLY */
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY);
+		TapDelay &= ~SD0_OTAPDLY_SEL_MASK;
+		TapDelay |= SD0_OTAPDLYSEL_SD50;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY, TapDelay);
+#endif
+	} else {
+#endif
+		(void) DeviceId;
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)TapDelay;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_OTAPDLY) |
+				((u64)SD1_OTAPDLY_SEL_MASK << 32), (u64)SD1_OTAPDLYSEL_SD50,
+				0, 0, 0, 0, 0);
+#else
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY);
+		TapDelay &= ~SD1_OTAPDLY_SEL_MASK;
+		TapDelay |= SD1_OTAPDLYSEL_SD50;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY, TapDelay);
+#endif
+#ifdef XPAR_PSU_SD_0_DEVICE_ID
+	}
+#endif
+}
+
+/*****************************************************************************/
+/**
+*
+* API to set Tap Delay for DDR50 mode
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void XSdPs_ddr50_tapdelay(u32 Bank, u32 DeviceId, u32 CardType)
+{
+	u32 TapDelay;
+	(void) Bank;
+
+#ifdef XPAR_PSU_SD_0_DEVICE_ID
+	if (DeviceId == 0U) {
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)TapDelay;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD0_ITAPCHGWIN << 32), (u64)SD0_ITAPCHGWIN,
+				0, 0, 0, 0, 0);
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD0_ITAPDLYENA << 32), (u64)SD0_ITAPDLYENA,
+				0, 0, 0, 0, 0);
+		if (CardType== XSDPS_CARD_SD)
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_ITAPDLY) | ((u64)SD0_ITAPDLY_SEL_MASK << 32),
+					(u64)SD0_ITAPDLYSEL_SD_DDR50, 0, 0, 0, 0, 0);
+		else
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_ITAPDLY) | ((u64)SD0_ITAPDLY_SEL_MASK << 32),
+					(u64)SD0_ITAPDLYSEL_EMMC_DDR50, 0, 0, 0, 0, 0);
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD0_ITAPCHGWIN << 32), (u64)0x0, 0, 0, 0, 0, 0);
+		if (CardType == XSDPS_CARD_SD)
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD0_OTAPDLY_SEL_MASK << 32),
+					(u64)SD0_OTAPDLYSEL_SD_DDR50, 0, 0, 0, 0, 0);
+		else
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD0_OTAPDLY_SEL_MASK << 32),
+					(u64)SD0_OTAPDLYSEL_EMMC_DDR50, 0, 0, 0, 0, 0);
+#else
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY);
+		TapDelay |= SD0_ITAPCHGWIN;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		/* Program the ITAPDLY */
+		TapDelay |= SD0_ITAPDLYENA;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		if (CardType== XSDPS_CARD_SD)
+			TapDelay |= SD0_ITAPDLYSEL_SD_DDR50;
+		else
+			TapDelay |= SD0_ITAPDLYSEL_EMMC_DDR50;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		TapDelay &= ~SD0_ITAPCHGWIN;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		/* Program the OTAPDLY */
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY);
+		TapDelay &= ~SD0_OTAPDLY_SEL_MASK;
+		if (CardType == XSDPS_CARD_SD)
+			TapDelay |= SD0_OTAPDLYSEL_SD_DDR50;
+		else
+			TapDelay |= SD0_OTAPDLYSEL_EMMC_DDR50;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY, TapDelay);
+#endif
+	} else {
+#endif
+		(void) DeviceId;
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)TapDelay;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD1_ITAPCHGWIN << 32), (u64)SD1_ITAPCHGWIN,
+				0, 0, 0, 0, 0);
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD1_ITAPDLYENA << 32), (u64)SD1_ITAPDLYENA,
+				0, 0, 0, 0, 0);
+		if (CardType== XSDPS_CARD_SD)
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_ITAPDLY) | ((u64)SD1_ITAPDLY_SEL_MASK << 32),
+					(u64)SD1_ITAPDLYSEL_SD_DDR50, 0, 0, 0, 0, 0);
+		else
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_ITAPDLY) | ((u64)SD1_ITAPDLY_SEL_MASK << 32),
+					(u64)SD1_ITAPDLYSEL_EMMC_DDR50, 0, 0, 0, 0, 0);
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+				SD_ITAPDLY) | ((u64)SD1_ITAPCHGWIN << 32),
+				(u64)0x0, 0, 0, 0, 0, 0);
+		if (CardType == XSDPS_CARD_SD)
+			Xil_Smc(MMIO_WRITE_SMC_FID,(u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD1_OTAPDLY_SEL_MASK << 32),
+					(u64)SD1_OTAPDLYSEL_SD_DDR50, 0, 0, 0, 0, 0);
+		else
+			Xil_Smc(MMIO_WRITE_SMC_FID,(u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD1_OTAPDLY_SEL_MASK << 32),
+					(u64)SD1_OTAPDLYSEL_EMMC_DDR50, 0, 0, 0, 0, 0);
+#else
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY);
+		TapDelay |= SD1_ITAPCHGWIN;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		/* Program the ITAPDLY */
+		TapDelay |= SD1_ITAPDLYENA;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		if (CardType == XSDPS_CARD_SD)
+			TapDelay |= SD1_ITAPDLYSEL_SD_DDR50;
+		else
+			TapDelay |= SD1_ITAPDLYSEL_EMMC_DDR50;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		TapDelay &= ~SD1_ITAPCHGWIN;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		/* Program the OTAPDLY */
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY);
+		TapDelay &= ~SD1_OTAPDLY_SEL_MASK;
+		if (CardType == XSDPS_CARD_SD)
+			TapDelay |= SD1_OTAPDLYSEL_SD_DDR50;
+		else
+			TapDelay |= SD1_OTAPDLYSEL_EMMC_DDR50;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY, TapDelay);
+#endif
+#ifdef XPAR_PSU_SD_0_DEVICE_ID
+	}
+#endif
+}
+
+/*****************************************************************************/
+/**
+*
+* API to set Tap Delay for HSD and SDR25 mode
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void XSdPs_hsd_sdr25_tapdelay(u32 Bank, u32 DeviceId, u32 CardType)
+{
+	u32 TapDelay;
+	(void) Bank;
+
+#ifdef XPAR_PSU_SD_0_DEVICE_ID
+	if (DeviceId == 0U) {
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)TapDelay;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD0_ITAPCHGWIN << 32), (u64)SD0_ITAPCHGWIN,
+				0, 0, 0, 0, 0);
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD0_ITAPDLYENA << 32), (u64)SD0_ITAPDLYENA,
+				0, 0, 0, 0, 0);
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD0_ITAPDLY_SEL_MASK << 32), (u64)SD0_ITAPDLYSEL_HSD,
+				0, 0, 0, 0, 0);
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD0_ITAPCHGWIN << 32), (u64)0x0, 0, 0, 0, 0, 0);
+		if (CardType == XSDPS_CARD_SD)
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD0_OTAPDLY_SEL_MASK << 32),
+					(u64)SD0_OTAPDLYSEL_SD_HSD, 0, 0, 0, 0, 0);
+		else
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD0_OTAPDLY_SEL_MASK << 32),
+					(u64)SD0_OTAPDLYSEL_EMMC_HSD, 0, 0, 0, 0, 0);
+#else
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY);
+		TapDelay |= SD0_ITAPCHGWIN;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		/* Program the ITAPDLY */
+		TapDelay |= SD0_ITAPDLYENA;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		TapDelay |= SD0_ITAPDLYSEL_HSD;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		TapDelay &= ~SD0_ITAPCHGWIN;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		/* Program the OTAPDLY */
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY);
+		TapDelay &= ~SD0_OTAPDLY_SEL_MASK;
+		if (CardType == XSDPS_CARD_SD)
+			TapDelay |= SD0_OTAPDLYSEL_SD_HSD;
+		else
+			TapDelay |= SD0_OTAPDLYSEL_EMMC_HSD;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY, TapDelay);
+#endif
+	} else {
+#endif
+		(void) DeviceId;
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)TapDelay;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD1_ITAPCHGWIN << 32), (u64)SD1_ITAPCHGWIN,
+				0, 0, 0, 0, 0);
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD1_ITAPDLYENA << 32), (u64)SD1_ITAPDLYENA,
+				0, 0, 0, 0, 0);
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD1_ITAPDLY_SEL_MASK << 32), (u64)SD1_ITAPDLYSEL_HSD,
+				0, 0, 0, 0, 0);
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR + SD_ITAPDLY) |
+				((u64)SD1_ITAPCHGWIN << 32), (u64)0x0, 0, 0, 0, 0, 0);
+		if (CardType == XSDPS_CARD_SD)
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD1_OTAPDLY_SEL_MASK << 32),
+					(u64)SD1_OTAPDLYSEL_SD_HSD, 0, 0, 0, 0, 0);
+		else
+			Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+					SD_OTAPDLY) | ((u64)SD1_OTAPDLY_SEL_MASK << 32),
+					(u64)SD1_OTAPDLYSEL_EMMC_HSD, 0, 0, 0, 0, 0);
+#else
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY);
+		TapDelay |= SD1_ITAPCHGWIN;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		/* Program the ITAPDLY */
+		TapDelay |= SD1_ITAPDLYENA;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		TapDelay |= SD1_ITAPDLYSEL_HSD;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		TapDelay &= ~SD1_ITAPCHGWIN;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_ITAPDLY, TapDelay);
+		/* Program the OTAPDLY */
+		TapDelay = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY);
+		TapDelay &= ~SD1_OTAPDLY_SEL_MASK;
+		if (CardType == XSDPS_CARD_SD)
+			TapDelay |= SD1_OTAPDLYSEL_SD_HSD;
+		else
+			TapDelay |= SD1_OTAPDLYSEL_EMMC_HSD;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_OTAPDLY, TapDelay);
+#endif
+#ifdef XPAR_PSU_SD_0_DEVICE_ID
+	}
+#endif
+}
+
+/*****************************************************************************/
+/**
+*
+* API to set Tap Delay w.r.t speed modes
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void XSdPs_SetTapDelay(XSdPs *InstancePtr)
+{
+	u32 DllCtrl, BankNum, DeviceId, CardType;
+
+	BankNum = InstancePtr->Config.BankNumber;
+	DeviceId = InstancePtr->Config.DeviceId ;
+	CardType = InstancePtr->CardType ;
+#ifdef XPAR_PSU_SD_0_DEVICE_ID
+	if (DeviceId == 0U) {
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)DllCtrl;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+				SD_DLL_CTRL) | ((u64)SD0_DLL_RST << 32),
+				(u64)SD0_DLL_RST, 0, 0, 0, 0, 0);
+#else
+		DllCtrl = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL);
+		DllCtrl |= SD0_DLL_RST;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL, DllCtrl);
+#endif
+		InstancePtr->Config_TapDelay(BankNum, DeviceId, CardType);
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)DllCtrl;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+				SD_DLL_CTRL) | ((u64)SD0_DLL_RST << 32),
+				(u64)0x0, 0, 0, 0, 0, 0);
+#else
+		DllCtrl &= ~SD0_DLL_RST;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL, DllCtrl);
+#endif
+	} else {
+#endif
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)DllCtrl;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+				SD_DLL_CTRL) | ((u64)SD1_DLL_RST << 32),
+				(u64)SD1_DLL_RST, 0, 0, 0, 0, 0);
+#else
+		DllCtrl = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL);
+		DllCtrl |= SD1_DLL_RST;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL, DllCtrl);
+#endif
+		InstancePtr->Config_TapDelay(BankNum, DeviceId, CardType);
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)DllCtrl;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+				SD_DLL_CTRL) | ((u64)SD1_DLL_RST << 32),
+				(u64)0x0, 0, 0, 0, 0, 0);
+#else
+		DllCtrl &= ~SD1_DLL_RST;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL, DllCtrl);
+#endif
+#ifdef XPAR_PSU_SD_0_DEVICE_ID
+	}
+#endif
+}
+
+/*****************************************************************************/
+/**
+*
+* API to reset the DLL
+*
+*
+* @param	InstancePtr is a pointer to the XSdPs instance.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+static void XSdPs_DllReset(XSdPs *InstancePtr)
+{
+	u32 ClockReg, DllCtrl;
+
+	/* Disable clock */
+	ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET);
+	ClockReg &= ~XSDPS_CC_SD_CLK_EN_MASK;
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET, ClockReg);
+
+	/* Issue DLL Reset to load zero tap values */
+	DllCtrl = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL);
+	if (InstancePtr->Config.DeviceId == 0U) {
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)DllCtrl;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+				SD_DLL_CTRL) | ((u64)SD0_DLL_RST << 32),
+				(u64)SD0_DLL_RST, 0, 0, 0, 0, 0);
+#else
+		DllCtrl |= SD0_DLL_RST;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL, DllCtrl);
+#endif
+	} else {
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)DllCtrl;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+				SD_DLL_CTRL) | ((u64)SD1_DLL_RST << 32),
+				(u64)SD1_DLL_RST, 0, 0, 0, 0, 0);
+#else
+		DllCtrl |= SD1_DLL_RST;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL, DllCtrl);
+#endif
+	}
+
+	/* Wait for 2 micro seconds */
+	(void)usleep(2U);
+
+	/* Release the DLL out of reset */
+	DllCtrl = XSdPs_ReadReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL);
+	if (InstancePtr->Config.DeviceId == 0U) {
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)DllCtrl;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+				SD_DLL_CTRL) | ((u64)SD0_DLL_RST << 32),
+				(u64)0x0, 0, 0, 0, 0, 0);
+#else
+		DllCtrl &= ~SD0_DLL_RST;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL, DllCtrl);
+#endif
+	} else {
+#if EL1_NONSECURE && defined (__aarch64__)
+		(void)DllCtrl;
+		Xil_Smc(MMIO_WRITE_SMC_FID, (u64)(XPS_SYS_CTRL_BASEADDR +
+				SD_DLL_CTRL) | ((u64)SD1_DLL_RST << 32),
+				(u64)0x0, 0, 0, 0, 0, 0);
+#else
+		DllCtrl &= ~SD1_DLL_RST;
+		XSdPs_WriteReg(XPS_SYS_CTRL_BASEADDR, SD_DLL_CTRL, DllCtrl);
+#endif
+	}
+
+	/* Wait for internal clock to stabilize */
+	ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+				XSDPS_CLK_CTRL_OFFSET);
+	while((ClockReg & XSDPS_CC_INT_CLK_STABLE_MASK) == 0U) {
+		ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+					XSDPS_CLK_CTRL_OFFSET);
+	}
+
+	/* Enable SD clock */
+	ClockReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET);
+	XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
+			XSDPS_CLK_CTRL_OFFSET,
+			ClockReg | XSDPS_CC_SD_CLK_EN_MASK);
+}
+#endif
+/** @} */
diff --git a/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_sinit.c b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_sinit.c
new file mode 100644
index 0000000..b49a006
--- /dev/null
+++ b/src/Xilinx/libsrc/sdps_v3_4/src/xsdps_sinit.c
@@ -0,0 +1,99 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsdps_sinit.c
+* @addtogroup sdps_v3_4
+* @{
+*
+* The implementation of the XSdPs component's static initialization
+* functionality.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ---    -------- -----------------------------------------------
+* 1.00a hk/sg  10/17/13 Initial release
+*       kvn    07/15/15 Modified the code according to MISRAC-2012.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xstatus.h"
+#include "xsdps.h"
+#include "xparameters.h"
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+extern XSdPs_Config XSdPs_ConfigTable[];
+
+/*****************************************************************************/
+/**
+*
+* Looks up the device configuration based on the unique device ID. A table
+* contains the configuration info for each device in the system.
+*
+* @param	DeviceId contains the ID of the device to look up the
+*		configuration for.
+*
+* @return
+*
+* A pointer to the configuration found or NULL if the specified device ID was
+* not found. See xsdps.h for the definition of XSdPs_Config.
+*
+* @note		None.
+*
+******************************************************************************/
+XSdPs_Config *XSdPs_LookupConfig(u16 DeviceId)
+{
+	XSdPs_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index = 0U; Index < (u32)XPAR_XSDPS_NUM_INSTANCES; Index++) {
+		if (XSdPs_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XSdPs_ConfigTable[Index];
+			break;
+		}
+	}
+	return (XSdPs_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/Makefile b/src/Xilinx/libsrc/standalone_v6_6/src/Makefile
new file mode 100644
index 0000000..325e105
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/Makefile
@@ -0,0 +1,77 @@
+###############################################################################
+#
+# Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Use of the Software is limited solely to applications:
+# (a) running on a Xilinx device, or
+# (b) that interact with a Xilinx device through a bus or interconnect.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+# XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Except as contained in this notice, the name of the Xilinx shall not be used
+# in advertising or otherwise to promote the sale, use or other dealings in
+# this Software without prior written authorization from Xilinx.
+#
+###############################################################################
+
+include config.make
+CC=$(COMPILER)
+AR=$(ARCHIVER)
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(subst -pg, -DPROFILING, $(COMPILER_FLAGS))
+ECC_FLAGS = $(subst -pg, -DPROFILING, $(EXTRA_COMPILER_FLAGS))
+
+ifeq ($(notdir $(CC)), armr5-none-eabi-gcc)
+ECC_FLAGS	+= -nostartfiles
+endif
+ECC_FLAGS_NO_FLTO1 = $(subst -flto,,$(ECC_FLAGS))
+ECC_FLAGS_NO_FLTO = $(subst -ffat-lto-objects,,$(ECC_FLAGS_NO_FLTO1))
+
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+ASSEMBLY_OBJECTS  = $(addsuffix .o, $(basename $(wildcard *.S)))
+INCLUDEFILES=*.h
+INCLUDEFILES+=includes_ps/*.h
+
+libs: $(LIBS)
+
+standalone_libs: $(LIBSOURCES)
+	echo "Compiling standalone R5"
+	$(CC) $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) $(filter-out _exit.c, $^)
+	$(CC) $(CC_FLAGS) $(ECC_FLAGS_NO_FLTO) $(INCLUDES) _exit.c
+	$(AR) -r ${RELEASEDIR}/${LIB} ${OUTS}
+
+.PHONY: include
+include: standalone_includes
+
+standalone_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
+	rm -rf ${ASSEMBLY_OBJECTS}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/_exit.c b/src/Xilinx/libsrc/standalone_v6_6/src/_exit.c
new file mode 100644
index 0000000..cf59888
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/_exit.c
@@ -0,0 +1,44 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/* _exit - Simple implementation. Does not return.
+*/
+__attribute__((weak)) void _exit (sint32 status)
+{
+  (void)status;
+  while (1) {
+	;
+  }
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/_open.c b/src/Xilinx/libsrc/standalone_v6_6/src/_open.c
new file mode 100644
index 0000000..a108b77
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/_open.c
@@ -0,0 +1,54 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#ifndef UNDEFINE_FILE_OPS
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode);
+}
+#endif
+
+/*
+ * _open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode)
+{
+  (void)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/_sbrk.c b/src/Xilinx/libsrc/standalone_v6_6/src/_sbrk.c
new file mode 100644
index 0000000..967bdfc
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/_sbrk.c
@@ -0,0 +1,65 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) caddr_t _sbrk ( s32 incr );
+}
+#endif
+
+__attribute__((weak)) caddr_t _sbrk ( s32 incr )
+{
+  static u8 *heap = NULL;
+  u8 *prev_heap;
+  static u8 *HeapEndPtr = (u8 *)&_heap_end;
+  caddr_t Status;
+
+  if (heap == NULL) {
+    heap = (u8 *)&_heap_start;
+  }
+  prev_heap = heap;
+
+  	if (((heap + incr) <= HeapEndPtr) && (prev_heap != NULL)) {
+  heap += incr;
+	  Status = (caddr_t) ((void *)prev_heap);
+  	} else {
+	  Status = (caddr_t) -1;
+  }
+
+  return Status;
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/abort.c b/src/Xilinx/libsrc/standalone_v6_6/src/abort.c
new file mode 100644
index 0000000..e8988c0
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/abort.c
@@ -0,0 +1,42 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+
+/*
+ * abort -- go out via exit...
+ */
+__attribute__((weak)) void abort(void)
+{
+  _exit(1);
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/asm_vectors.S b/src/Xilinx/libsrc/standalone_v6_6/src/asm_vectors.S
new file mode 100644
index 0000000..efdf629
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/asm_vectors.S
@@ -0,0 +1,148 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file asm_vectors.s
+*
+* This file contains the initial vector table for the Cortex R5 processor
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00  pkp	02/10/14 Initial version
+* 6.0   mus     27/07/16 Added UndefinedException handler
+* 6.3	pkp	02/13/17 Added support for hard float
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+.org 0
+.text
+
+.globl _boot
+.globl _vector_table
+
+.globl FIQInterrupt
+.globl IRQInterrupt
+.globl SWInterrupt
+.globl DataAbortInterrupt
+.globl PrefetchAbortInterrupt
+
+.globl IRQHandler
+.globl prof_pc
+
+.section .vectors, "a"
+_vector_table:
+	ldr	pc,=_boot
+	ldr	pc,=Undefined
+	ldr	pc,=SVCHandler
+	ldr	pc,=PrefetchAbortHandler
+	ldr	pc,=DataAbortHandler
+	NOP	/* Placeholder for address exception vector*/
+	ldr	pc,=IRQHandler
+	ldr	pc,=FIQHandler
+
+.text
+IRQHandler:					/* IRQ vector handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code*/
+#ifndef __SOFTFP__
+
+	vpush {d0-d7}				/* Store floating point registers */
+	vmrs r1, FPSCR
+	push {r1}
+	vmrs r1, FPEXC
+	push {r1}
+#endif
+	bl	IRQInterrupt			/* IRQ vector */
+#ifndef __SOFTFP__
+
+	pop 	{r1}				/* Restore floating point registers */
+	vmsr    FPEXC, r1
+	pop 	{r1}
+	vmsr    FPSCR, r1
+	vpop    {d0-d7}
+#endif
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	subs	pc, lr, #4			/* adjust return */
+FIQHandler:					/* FIQ vector handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+FIQLoop:
+	bl	FIQInterrupt			/* FIQ vector */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	subs	pc, lr, #4			/* adjust return */
+
+Undefined:					/* Undefined handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	ldr     r0, =UndefinedExceptionAddr
+	sub     r1, lr, #4
+	str     r1, [r0]            		/* Store address of instruction causing undefined exception */
+
+	bl	UndefinedException		/* UndefinedException: call C function here */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	movs	pc, lr
+
+SVCHandler:					/* SWI handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	tst	r0, #0x20			/* check the T bit */
+	ldrneh	r0, [lr,#-2]			/* Thumb mode */
+	bicne	r0, r0, #0xff00			/* Thumb mode */
+	ldreq	r0, [lr,#-4]			/* ARM mode */
+	biceq	r0, r0, #0xff000000		/* ARM mode */
+	bl	SWInterrupt			/* SWInterrupt: call C function here */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	movs	pc, lr				/* adjust return */
+
+DataAbortHandler:				/* Data Abort handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	ldr     r0, =DataAbortAddr
+	sub     r1, lr, #8
+	str     r1, [r0]            		/* Stores instruction causing data abort */
+	bl	DataAbortInterrupt		/*DataAbortInterrupt :call C function here */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	subs	pc, lr, #8			/* adjust return */
+
+PrefetchAbortHandler:				/* Prefetch Abort handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	ldr     r0, =PrefetchAbortAddr
+	sub     r1, lr, #4
+	str     r1, [r0]            		/* Stores instruction causing prefetch abort */
+	bl	PrefetchAbortInterrupt		/* PrefetchAbortInterrupt: call C function here */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	subs	pc, lr, #4			/* adjust return */
+
+
+.end
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/boot.S b/src/Xilinx/libsrc/standalone_v6_6/src/boot.S
new file mode 100644
index 0000000..d9d2f1e
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/boot.S
@@ -0,0 +1,333 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file boot.S
+*
+* @addtogroup r5_boot_code Cortex R5 Processor Boot Code
+* @{
+* 
 boot.S 

+* The boot code performs minimum configuration which is required for an
+* application to run starting from processor's reset state. Below is a
+* sequence illustrating what all configuration is performed before control
+* reaches to main function.
+*
+* 1. Program vector table base for exception handling
+* 2. Program stack pointer for various modes (IRQ, FIQ, supervisor, undefine,
+*    abort, system)
+* 3. Disable instruction cache, data cache and MPU
+* 4. Invalidate instruction and data cache
+* 5. Configure MPU with short descriptor translation table format and program
+*    base address of translation table
+* 6. Enable data cache, instruction cache and MPU
+* 7. Enable Floating point unit
+* 8. Transfer control to _start which clears BSS sections and jumping to main
+*    application
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 5.04	pkp  09/11/15 Disabled ACTLR.DBWR bit to avoid potential R5 deadlock
+*		      for errata 780125
+* 5.04 pkp   02/04/16 Enabled the fault log for lock-step mode
+* 5.04 pkp   02/25/16 Initialized the banked registers for various modes,
+*		      initialized floating point registers and enabled the
+*		      cache ECC check before enabling the fault log for
+*		      lock step mode
+* 5.04 pkp   03/24/16 Reset the dbg_lpd_reset before enabling the fault log
+*		      to avoid intervention for lock-step mode
+* 5.05 pkp   04/11/16 Enable the comparators for non-JTAG boot mode for
+*		      lock-step to avoid putting debug logic to reset
+* 6.02 pkp   02/13/17 Added support for hard float
+* 6.6  mus   02/23/17 Enable/Disable the debug logic in non-JTAG boot mode(when
+*		      processor is in lockstep configuration), based
+*		      on the mld parameter "lockstep_mode_debug".
+* 

+*
+******************************************************************************/
+
+#include "xparameters.h"
+
+
+.global _prestart
+.global _boot
+.global __stack
+.global __irq_stack
+.global __supervisor_stack
+.global __abort_stack
+.global __fiq_stack
+.global __undef_stack
+.global _vector_table
+
+
+/* Stack Pointer locations for boot code */
+.set Undef_stack,	__undef_stack
+.set FIQ_stack,		__fiq_stack
+.set Abort_stack,	__abort_stack
+.set SPV_stack,		__supervisor_stack
+.set IRQ_stack,		__irq_stack
+.set SYS_stack,		__stack
+
+.set vector_base,	_vector_table
+
+.set RPU_GLBL_CNTL,	0xFF9A0000
+.set RPU_ERR_INJ,	0xFF9A0020
+.set RST_LPD_DBG,	0xFF5E0240
+.set BOOT_MODE_USER,	0xFF5E0200
+.set fault_log_enable,	0x101
+
+.section .boot,"axS"
+
+
+/* this initializes the various processor modes */
+
+_prestart:
+_boot:
+
+OKToRun:
+
+/* Initialize processor registers to 0 */
+	mov	r0,#0
+	mov	r1,#0
+	mov	r2,#0
+	mov	r3,#0
+	mov	r4,#0
+	mov	r5,#0
+	mov	r6,#0
+	mov	r7,#0
+	mov	r8,#0
+	mov	r9,#0
+	mov	r10,#0
+	mov	r11,#0
+	mov	r12,#0
+
+/* Initialize stack pointer and banked registers for various mode */
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the irq stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x12			/* IRQ mode */
+	msr	cpsr, r2
+	ldr	r13,=IRQ_stack			/* IRQ stack pointer */
+	mov 	r14,#0
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the supervisor stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x13			/* supervisor mode */
+	msr	cpsr, r2
+	ldr	r13,=SPV_stack			/* Supervisor stack pointer */
+	mov 	r14,#0
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the Abort  stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x17			/* Abort mode */
+	msr	cpsr, r2
+	ldr	r13,=Abort_stack		/* Abort stack pointer */
+	mov 	r14,#0
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the FIQ stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x11			/* FIQ mode */
+	msr	cpsr, r2
+	mov 	r8, #0
+	mov 	r9, #0
+	mov 	r10, #0
+	mov 	r11, #0
+	mov 	r12, #0
+	ldr	r13,=FIQ_stack			/* FIQ stack pointer */
+	mov 	r14,#0
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the Undefine stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x1b			/* Undefine mode */
+	msr	cpsr, r2
+	ldr	r13,=Undef_stack		/* Undefine stack pointer */
+	mov 	r14,#0
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the system stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x1F			/* SYS mode */
+	msr	cpsr, r2
+	ldr	r13,=SYS_stack			/* SYS stack pointer */
+	mov 	r14,#0
+
+/*
+ * Enable access to VFP by enabling access to Coprocessors 10 and 11.
+ * Enables Full Access i.e. in both privileged and non privileged modes
+ */
+	mrc     p15, 0, r0, c1, c0, 2      	/* Read Coprocessor Access Control Register (CPACR) */
+        orr     r0, r0, #(0xF << 20)       	/* Enable access to CP 10 & 11 */
+        mcr     p15, 0, r0, c1, c0, 2      	/* Write Coprocessor Access Control Register (CPACR) */
+        isb
+
+/* enable fpu access  */
+	vmrs	r3, FPEXC
+	orr	r1, r3, #(1<<30)
+	vmsr	FPEXC, r1
+
+/* clear the floating point register*/
+	mov	r1,#0
+	vmov	d0,r1,r1
+	vmov	d1,r1,r1
+	vmov	d2,r1,r1
+	vmov	d3,r1,r1
+	vmov	d4,r1,r1
+	vmov	d5,r1,r1
+	vmov	d6,r1,r1
+	vmov	d7,r1,r1
+	vmov	d8,r1,r1
+	vmov	d9,r1,r1
+	vmov	d10,r1,r1
+	vmov	d11,r1,r1
+	vmov	d12,r1,r1
+	vmov	d13,r1,r1
+	vmov	d14,r1,r1
+	vmov	d15,r1,r1
+
+#ifdef __SOFTFP__
+/* Disable the FPU if SOFTFP is defined*/
+	vmsr	FPEXC,r3
+#endif
+
+/* Disable MPU and caches */
+        mrc     p15, 0, r0, c1, c0, 0       	/* Read CP15 Control Register*/
+        bic     r0, r0, #0x05               	/* Disable MPU (M bit) and data cache (C bit) */
+        bic     r0, r0, #0x1000             	/* Disable instruction cache (I bit) */
+        dsb                                 	/* Ensure all previous loads/stores have completed */
+        mcr     p15, 0, r0, c1, c0, 0       	/* Write CP15 Control Register */
+        isb                                 	/* Ensure subsequent insts execute wrt new MPU settings */
+
+/* Disable Branch prediction, TCM ECC checks */
+        mrc     p15, 0, r0, c1, c0, 1       	/* Read ACTLR */
+        orr     r0, r0, #(0x1 << 17)        	/* Enable RSDIS bit 17 to disable the return stack */
+        orr     r0, r0, #(0x1 << 16)        	/* Clear BP bit 15 and set BP bit 16:*/
+        bic     r0, r0, #(0x1 << 15)        	/* Branch always not taken and history table updates disabled*/
+        orr     r0, r0, #(0x1 << 27)		/* Enable B1TCM ECC check */
+        orr     r0, r0, #(0x1 << 26)		/* Enable B0TCM ECC check */
+        orr     r0, r0, #(0x1 << 25)		/* Enable ATCM ECC check */
+	bic	r0, r0, #(0x1 << 5)		/* Generate abort on parity errors, with [5:3]=b 000*/
+	bic 	r0, r0, #(0x1 << 4)
+	bic	r0, r0, #(0x1 << 3)
+        mcr     p15, 0, r0, c1, c0, 1       	/* Write ACTLR*/
+	dsb				    	/* Complete all outstanding explicit memory operations*/
+
+/* Invalidate caches */
+	mov	r0,#0				/* r0 = 0  */
+	dsb
+	mcr	p15, 0, r0, c7, c5, 0		/* invalidate icache */
+	mcr 	p15, 0, r0, c15, c5, 0      	/* Invalidate entire data cache*/
+	isb
+#if LOCKSTEP_MODE_DEBUG == 0
+/* enable fault log for lock step */
+	ldr	r0,=RPU_GLBL_CNTL
+	ldr	r1, [r0]
+	ands	r1, r1, #0x8
+/* branch to initialization if split mode*/
+	bne 	init
+/* check for boot mode if in lock step, branch to init if JTAG boot mode*/
+	ldr	r0,=BOOT_MODE_USER
+	ldr 	r1, [r0]
+	ands	r1, r1, #0xF
+	beq 	init
+/* reset the debug logic */
+	ldr	r0,=RST_LPD_DBG
+	ldr	r1, [r0]
+	orr	r1, r1, #(0x1 << 1)
+	orr	r1, r1, #(0x1 << 4)
+	orr	r1, r1, #(0x1 << 5)
+	str	r1, [r0]
+/* enable fault log */
+	ldr	r0,=RPU_ERR_INJ
+	ldr	r1,=fault_log_enable
+	ldr	r2, [r0]
+	orr	r2, r2, r1
+	str	r2, [r0]
+	nop
+	nop
+#endif
+
+init:
+	bl 	Init_MPU		/* Initialize MPU */
+
+/* Enable Branch prediction */
+	mrc     p15, 0, r0, c1, c0, 1       /* Read ACTLR*/
+        bic     r0, r0, #(0x1 << 17)        /* Clear RSDIS bit 17 to enable return stack*/
+        bic     r0, r0, #(0x1 << 16)        /* Clear BP bit 15 and BP bit 16:*/
+        bic     r0, r0, #(0x1 << 15)        /* Normal operation, BP is taken from the global history table.*/
+        orr	r0, r0, #(0x1 << 14)	    /* Disable DBWR for errata 780125 */
+	mcr     p15, 0, r0, c1, c0, 1       /* Write ACTLR*/
+
+/* Enable icahce and dcache */
+	mrc 	p15,0,r1,c1,c0,0
+	ldr	r0, =0x1005
+	orr 	r1,r1,r0
+	dsb
+	mcr	p15,0,r1,c1,c0,0		/* Enable cache  */
+	isb					/* isb	flush prefetch buffer */
+
+/* Warning message to be removed after 2016.1 */
+/* USEAMP was introduced in 2015.4 with ZynqMP and caused confusion with USE_AMP */
+#ifdef USEAMP
+#warning "-DUSEAMP=1 is deprecated, use -DVEC_TABLE_IN_OCM instead to set vector table in OCM"
+#endif
+
+/* Set vector table in TCM/LOVEC */
+#ifndef VEC_TABLE_IN_OCM
+	mrc	p15, 0, r0, c1, c0, 0
+	mvn	r1, #0x2000
+	and	r0, r0, r1
+	mcr	p15, 0, r0, c1, c0, 0
+#endif
+
+/* enable asynchronous abort exception */
+	mrs	r0, cpsr
+	bic	r0, r0, #0x100
+	msr	cpsr_xsf, r0
+
+        b 	_startup                       /* jump to C startup code */
+
+
+.Ldone:	b	.Ldone				/* Paranoia: we should never get here */
+
+
+.end
+/**
+* @} End of "addtogroup r5_boot_code".
+*/
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/bspconfig.h b/src/Xilinx/libsrc/standalone_v6_6/src/bspconfig.h
new file mode 100644
index 0000000..b977241
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/bspconfig.h
@@ -0,0 +1,45 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Configurations for Standalone BSP
+*
+*******************************************************************/
+
+#ifndef BSPCONFIG_H /* prevent circular inclusions */
+#define BSPCONFIG_H /* by using protection macros */
+
+#define MICROBLAZE_PVR_NONE
+
+#endif /*end of __BSPCONFIG_H_*/
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/changelog.txt b/src/Xilinx/libsrc/standalone_v6_6/src/changelog.txt
new file mode 100644
index 0000000..6414440
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/changelog.txt
@@ -0,0 +1,539 @@
+/*****************************************************************************
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- ---------------------------------------------------
+  * 3.02a sdm  05/30/11 Added Xuint64 typedef and XUINT64_MSW/XUINT64_LSW macros
+ * 3.02a sdm  06/27/11 Added INST_SYNC and DATA_SYNC macros for all the CPUs
+ * 3.02a sdm  07/07/11 Updated ppc440 boot.S to set guarded bit for all but
+ *                     cacheable regions
+ *                     Update ppc440/xil_cache.c to use CACHEABLE_REGION_MASK
+ *                     generated by the cpu driver, for enabling caches
+ * 3.02a sdm  07/08/11 Updated microblaze cache flush APIs based on write-back/
+ *                     write-thru caches
+ * 3.03a sdm  08/20/11 Updated the tag/data RAM latency values for L2CC
+ *		       Updated the MMU table to mark OCM in high address space
+ *		       as inner cacheable and reserved space as Invalid
+ * 3.03a sdm  08/20/11 Changes to support FreeRTOS
+ *		       Updated the MMU table to mark upper half of the DDR as
+ *		       non-cacheable
+ *		       Setup supervisor and abort mode stacks
+ *		       Do not initialize/enable L2CC in case of AMP
+ *		       Initialize UART1 for 9600bps in case of AMP
+ * 3.03a sdm  08/27/11 Setup abort and supervisor mode stacks and don't init SMC
+ *		       in case of AMP
+ * 3.03a sdm  09/14/11 Added code for performance monitor and L2CC event
+ *		       counters
+ * 3.03a sdm  11/08/11 Updated microblaze xil_cache.h file to include
+ *		       xparameters.h file for CR630532 -  Xil_DCacheFlush()/
+ *		       Xil_DCacheFlushRange() functions in standalone BSP v3_02a
+ *		       for MicroBlaze will invalidate data in the cache instead
+ *		       of flushing it for writeback caches
+ * 3.04a sdm  11/21/11 Updated to initialize stdio device for 115200bps, for PS7
+ * 3.04a sdm  01/02/12 Updated to clear cp15 regs with unknown reset values
+ *		       Remove redundant dsb/dmb instructions in cache maintenance
+ *		       APIs
+ *		       Remove redundant dsb in mcr instruction
+ * 3.04a sdm  01/13/12 Updated MMU table to mark DDR memory as Shareable
+ * 3.05a sdm  02/02/12 Removed some of the defines as they are being generated through
+ *                     driver tcl in xparameters.h. Update the gcc/translationtable.s
+ *                     for the QSPI complete address range - DT644567
+ *                     Removed profile directory for armcc compiler and changed
+ *                     profiling setting to false in standalone_v2_1_0.tcl file
+ *                     Deleting boot.S file after preprocessing for armcc compiler
+ * 3.05a asa  03/11/12 Updated the function Xil_EnableMMU in file xil_mmu.c to
+ *		       invalidate the caches before enabling back the MMU and
+ *		       D cache.
+ * 3.05a asa  04/15/12 Updated the function Xil_SetTlbAttributes in file
+ *		       xil_mmu.c. Now we invalidate UTLB, Branch predictor
+ *		       array, flush the D-cache before changing the attributes
+ *		       in translation table. The user need not call Xil_DisableMMU
+ *		       before calling Xil_SetTlbAttributes.
+ * 3.06a asa/ 06/17/12 Removed the UART initialization for Zynq. For PEEP, the UART
+ *	 sgd	       initialization is present. Changes for this were done in
+ *		       uart.c and xil-crt0.s.
+ *		       Made changes in xil_io.c to use volatile pointers.
+ *		       Made changes in xil_mmu.c to correct the function
+ *		       Xil_SetTlbAttributes.
+ *		       Changes are made xil-crt0.s to initialize the static
+ *		       C++ constructors.
+ *		       Changes are made in boot.s, to fix the TTBR settings,
+ *		       correct the L2 Cache Auxiliary register settings, L2 cache
+ *		       latency settings.
+ * 3.07a asa/ 07/16/12 Made changes in cortexa9/xtime_l.c, xtime_l.h, sleep.c
+ *	 sgd	       usleep.c to use global timer intstead of CP15.
+ *		       Made changes in cortexa9/gcc/translation_table.s to map
+ *		       the peripheral devices as shareable device memory.
+ *		       Made changes in cortexa9/gcc/xil-crt0.s to initialize
+ *		       the global timer.
+ *		       Made changes in cortexa9/armcc/boot.S to initialize
+ *		       the global timer.
+ *		       Made changes in cortexa9/armcc/translation_table.s to
+ *		       map the peripheral devices as shareable device memory.
+ *		       Made changes in cortexa9/gcc/boot.S to optimize the
+ *		       L2 cache settings. Changes the section properties for
+ *		       ".mmu_tbl" and ".boot" sections in cortexa9/gcc/boot.S
+ *			and cortexa9/gcc/translation_table.S.
+ *		       Made changes in cortexa9/xil_cache.c to change the
+ *		       cache invalidation order.
+ * 3.07a asa  08/17/12 Made changes across files for Cortexa9 to remove
+ *		       compilation/linking issues for C++ compiler.
+ *		       Made changes in mb_interface.h to remove compilation/
+ *		       linking issues for C++ compiler.
+ *		       Added macros for swapb and swaph microblaze instructions
+ *		       mb_interface.h
+ *		       Remove barrier usage (SYNCHRONIZE_IO) from xil_io.c
+ *		       for CortexA9.
+ * 3.07a asa  08/30/12 Updated for CR 675636 to provide the L2 Base Address
+ * 3.07a asa  08/31/12 Added xil_printf.h include
+ * 3.07a sgd  09/18/12 Corrected the L2 cache enable settings
+ *				Corrected L2 cache sequence disable sequence
+ * 3.07a sgd  10/19/12 SMC NOR and SRAM initialization with compiler option
+ * 3.09a asa  01/25/13 Updated to push and pop neon registers into stack for
+ *		       irq/fiq handling.
+ *		       Relocated COUNTS_PER_SECOND from sleep.c to xtime_l.h. This
+ *		       fixes the CR #692094.
+ * 3.09a sgd  02/14/13 Fix for CRs 697094 (SI#687034) and 675552.
+ * 3.10a srt  04/18/13 Implemented ARM Erratas.
+ *		       Cortex A9 Errata - 742230, 743622, 775420, 794073
+ *		       L2Cache PL310 Errata - 588369, 727915, 759370
+ *		       Please refer to file 'xil_errata.h' for errata
+ *		       description.
+ * 3.10a asa  05/04/13 Added support for L2 cache in MicroBlaze BSP. The older
+ *		       cache APIs were corresponding to only Layer 1 cache
+ *		       memories. New APIs were now added and the existing cache
+ *		       related APIs were changed to provide a uniform interface
+ *		       to flush/invalidate/enable/disable the complete cache
+ *		       system which includes both L1 and L2 caches. The changes
+ *		       for these were done in:
+ *		       src/microblaze/xil_cache.c and src/microblaze/xil_cache.h
+ *		       files.
+ *		       Four new files were added for supporting L2 cache. They are:
+ *		       microblaze_flush_cache_ext.S-> Flushes L2 cache
+ *		       microblaze_flush_cache_ext_range.S -> Flushes a range of
+ *		       memory in L2 cache.
+ *		       microblaze_invalidate_cache_ext.S-> Invalidates L2 cache
+ *		       microblaze_invalidate_cache_ext_range -> Invalidates a
+ *		       range of memory in L2 cache.
+ *		       These changes are done to implement PR #697214.
+ * 3.10a  asa 05/13/13 Modified cache disable APIs at src/cortexa9/xil_cache.c to
+ *		       fix the CR #706464. L2 cache disabling happens independent
+ *		       of L1 data cache disable operation. Changes are done in the
+ *		       same file in cache handling APIs to do a L2 cache sync
+ *		       (poll reg7_?cache_?sync). This fixes CR #700542.
+ * 3.10a asa  05/20/13 Added API/Macros for enabling and disabling nested
+ *		       interrupts for ARM. These are done to fix the CR#699680.
+ * 3.10a srt  05/20/13 Made changes in cache maintenance APIs to do a proper cach
+ *		       sync operation. This fixes the CR# 716781.
+ * 3.11a asa  09/07/13 Updated armcc specific BSP files to have proper support
+ *		       for armcc toolchain.
+ *		       Modified asm_vectors.S (gcc) and asm_vectors.s (armcc) to
+ *		       fix issues related to NEON context saving. The assembly
+ *		       routines for IRQ and FIQ handling are modified.
+ *		       Deprecated the older BSP (3.10a).
+ * 3.11a asa  09/22/13 Fix for CR#732704. Cache APIs are modified to avoid
+ *		       various potential issues. Made changes in the function
+ *		       Xil_SetAttributes in file xil_mmu.c.
+ * 3.11a asa  09/23/13 Added files xil_misc_psreset_api.c and xil_misc_psreset_api.h
+ *		       in src\cortexa9 and src\microblaze folders.
+ * 3.11a asa  09/28/13 Modified the cache APIs (src\cortexa9) to fix handling of
+ *		       L2 cache sync operation and to fix issues around complete
+ *		       L2 cache flush/invalidation by ways.
+ * 3.12a asa  10/22/13 Modified the files xpseudo_asm_rvct.c and xpseudo_asm_rvct.h
+ *		       to fix linking issues with armcc/DS-5. Modified the armcc
+ *		       makefile to fix issues.
+ * 3.12a asa  11/15/13 Fix for CR#754800. It fixes issues around profiling for MB.
+ * 4.0   hk   12/13/13 Added check for STDOUT_BASEADDRESS where outbyte is used.
+ * 4.0 	 pkp  22/01/14 Modified return addresses for interrupt handlers (DataAbortHandler
+ *		       and SWIHandler) in asm_vector.S (src\cortexa9\gcc\ and
+ *		       src\cortexa9\armcc\) to fix CR#767251
+ * 4.0	 pkp  24/01/14 Modified cache APIs (Xil_DCacheInvalidateRange and
+ *		       Xil_L1DCacheInvalidate) in xil_cache.c (src\cortexa9) to fix the bugs.
+ *		       Few cache lines were missed to invalidate when unaligned address
+ *		       invalidation was accommodated in Xil_DCacheInvalidateRange.
+ *		       In Xil_L1DCacheInvalidate, while invalidating all L1D cache
+ *		       stack memory (which contains return address) was invalidated. So
+ *		       stack memory is flushed first and then L1D cache is invalidated.
+ *		       This is done to fix CR #763829
+ * 4.0 adk   22/02/2014 Fixed the CR:775379 removed unnecessay _t(unit32_t etc) from
+ *			mblaze_nt_types.h file and replace uint32_t with u32 in the
+ *			profile_hist.c to fix the above CR.
+ * 4.1 bss   04/14/14  Updated driver tcl to remove _interrupt_handler.o from libgloss.a
+ * 		       instead of libxil.a and added prototypes for
+ *		       microblaze_invalidate_cache_ext and microblaze_flush_cache_ext in
+ *		       mb_interface.h
+ * 4.1 hk    04/18/14  Add sleep function.
+ * 4.1 asa   04/21/14  Fix for CR#764881. Added support for msrset and msrclr. Renamed
+ *		       some of the *.s files inMB BSP source to *.S.
+ * 4.1 asa   04/28/14  Fix for CR#772280. Made changes in file cortexa9/gcc/read.c.
+ * 4.1 bss   04/29/14  Modified driver tcl to use libxil.a if libgloss.a does not exist
+ *			CR#794205
+ * 4.1 asa   05/09/14  Fix for CR#798230. Made changes in cortexa9/xil_cache.c and
+ *		       common/xil_testcache.c
+ *	               Fix for CR#764881.
+ * 4.1 srt   06/27/14  Remove '#undef DEBUG' from src/common/xdebug.h, which allows to
+ *                     output the DEBUG logs when -DDEBUG flag is enabled in BSP.
+ * 4.2 pkp   06/27/14  Added support for IAR compiler in src/cortexa9/iccarm.
+ *		       Also added explanatory notes in cortexa9/xil_cache.c for CR#785243.
+ * 4.2 pkp   06/19/14  Asynchronous abort has been enabled into cortexa9/gcc/boot.s and
+ *		       cortexa9/armcc/boot.s. Added default exception handlers for data
+ *		       abort and prefetch abort using handlers called
+ *		       DataAbortHandler and PrefetchAbortHandler respectively in
+ *		       cortexa9/xil_exception.c to fix CR#802862.
+ * 4.2 pkp   06/30/14  MakeFile for cortexa9/armcc has been changed to fixes the
+ *		       issue of improper linking of translation_table.s
+ * 4.2 pkp   07/04/14  added weak attribute for the function in BSP which are also present
+ *		       in tool chain to avoid conflicts into some special cases
+ * 4.2 pkp   07/21/14  Corrected reset value of event counter in function
+ *		       Xpm_ResetEventCounters in src/cortexa9/xpm_counter.c to fix CR#796275
+ * 4.2 pkp   07/21/14  Included xil_types.h file in xil_mmu.h which had contained a function
+ * 		       containing type def u32 defined in xil_types.g to resolve issue of
+ *		       CR#805869
+ * 4.2 pkp   08/04/14  Removed unimplemented nanosleep routine from cortexa9/usleep.c as
+ *		       it is not possible to generate timer in nanosecond due to limited
+ *		       cpu frequency
+ * 4.2 pkp   08/04/14  Removed PEEP board related code which contained initialization of
+ *		       uart, smc nor and sram from cortexa9/gcc/xil-crt0.s and armcc/boot.s
+ *		       and iccarm/boot.s. Also uart.c and smc.c have been removed. Also
+ *		       removed function definition of XSmc_NorInit and XSmc_NorInit from
+ *		       cortexa9/smc.h
+ * 4.2 bss   08/11/14  Added microblaze_flush_cache_ext_range and microblaze_invalidate_
+ *		       cache_ext_range declarations in mb_interface.h CR#783821.
+ *		       Modified profile_mcount_mb.S to fix CR#808412.
+ * 4.2 pkp   08/21/14  modified makefile of iccarm for proper linking of objectfiles in
+ *		       cortexa9/iccarm to fix CR#816701
+ * 4.2 pkp   09/02/14  modified translation table entries in cortexa9/gcc/translation_table.s,
+ *		       armcc/translation_table.s and iccarm/translation_table.s
+ *		       to properly defined reserved entries according to address map for
+ *		       fixing CR#820146
+ * 4.2 pkp   09/11/14  modified translation table entries in cortexa9/iccarm/translation_table.s
+ *		       and  cortexa9/armcc/translation_table.s to resolve compilation
+ *		       error for solving CR#822897
+ * 5.0 kvn   12/9/14   Support for Zync Ultrascale Mp.Also modified code for
+ *                     MISRA-C:2012 compliance.
+ * 5.0 pkp   12/15/14  Added APIs to get information about the platforms running the code by
+ *		       adding src/common/xplatform_info.*s
+ * 5.0 pkp   16/12/14  Modified boot code to enable scu after MMU is enabled and
+ *		       removed incorrect initialization of TLB lockdown register to fix
+ *		       CR#830580 in cortexa9/gcc/boot.S & cpu_init.S, armcc/boot.S
+ *		       and iccarm/boot.s
+ * 5.0 pkp   25/02/15  Modified floating point flag to vfpv3 from vfpv3_d16 in BSP MakeFile
+ *		       for iccarm and armcc compiler of cortexA9
+ * 5.1 pkp   05/13/15  Changed the initialization order in cortexa9/gcc/boot.S, iccarm/boot.s
+ *		       and armcc/boot.s so to first invalidate caches and TLB, enable MMU and
+ *		       caches, then enable SMP bit in ACTLR. L2Cache invalidation and enabling
+ *		       of L2Cache is done later.
+ * 5.1 pkp   12/05/15  Modified cortexa9/xil_cache.c to modify Xil_DCacheInvalidateRange and
+ *		       Xil_DCacheFlushRange to remove unnecessary dsb which is unnecessarily
+ *		       taking long time to fix CR#853097. L2CacheSync is added into
+ *		       Xil_L2CacheInvalidateRange API. Xil_L1DCacheInvalidate and
+ *		       Xil_L2CacheInvalidate APIs are modified to flush the complete stack
+ *		       instead of just System Stack
+ * 5.1 pkp   14/05/15  Modified cortexa9/gcc/Makefile to keep a correct check of a compiler
+ *		       to update ECC_FLAGS and also take the compiler and archiver as specified
+ *		       in settings instead of hardcoding it.
+ * 5.2 pkp   06/08/15  Modified cortexa9/gcc/translation_table.S to put a check for
+ *		       XPAR_PS7_DDR_0_S_AXI_BASEADDR to confirm if DDR is present or not and
+ *		       accordingly generate the	translation table
+ * 5.2 pkp   23/07/15  Modified cortexa9/gcc/Makefile to keep a correct check of a compiler
+ *		       to update ECC_FLAGS to fix a bug introduced during new version creation
+ *		       of BSP.
+ * 5.3 pkp   10/07/15  Modified cortexa9/xil_cache.c file to change cache API so that L2 Cache
+ *		       functionalities are avoided for the OpenAMP slave application(when
+ *		       USE_AMP flag is defined for BSP) as master CPU would be utilizing L2
+ *		       cache for its operation. Also file operations such as read, write,
+ *		       close, open are also avoided for OpenAMP support(when USE_AMP flag is
+ *		       defined for BSP) because XilOpenAMP library contains own file operation.
+ *		       The xil-crt0.S file is modified for not initializing global timer for
+ *		       OpenAMP application as it might be already in use by master CPU
+ * 5.3 pkp   10/09/15  Modified cortexa9/iccarm/xpseudo_asm_iccarm.h file to change function
+ *		       definition for dsb, isb and dmb to fix the compilation error when used
+ *     kvn   16/10/15  Encapsulated assembly code into macros for R5 xil_cache file.
+ * 5.4 pkp   09/11/15  Modified cortexr5/gcc/boot.S to disable ACTLR.DBWR bit to avoid potential
+ *		       R5 deadlock for errata 780125
+ * 5.4 pkp   09/11/15  Modified cortexa53/32bit/gcc/boot.S to enable I-Cache and D-Cache for a53
+ *		       32 bit BSP in the initialization
+ * 5.4 pkp   09/11/15  Modified cortexa9/xil_misc_psreset_api.c file to change the description
+ *		       for XOcm_Remap function
+ * 5.4 pkp   16/11/15  Modified microblaze/xil_misc_psreset_api.c file to change the description
+ *		       for XOcm_Remap function
+ *     kvn   21/11/15  Added volatile keyword for ADDR varibles in Xil_Out API
+ *     kvn   21/11/15  Changed ADDR variable type from u32 to UINTPTR. This is
+ *                     required for MISRA-C:2012 Compliance.
+ * 5.4 pkp   23/11/15  Added attribute definitions for Xil_SetTlbAttributes API of Cortex-A9
+ *		       in cortexa9/xil_mmu.h
+ * 5.4 pkp   23/11/15  Added default undefined exception handler for Cortex-A9
+ * 5.4 pkp   11/12/15  Modified common/xplatform_info.h to add #defines for silicon for
+ *		       checking the current executing platform
+ * 5.4 pkp   18/12/15  Modified cortexa53/32bit/gcc/xil-crt0.S and 64bit/gcc/xil-crt0.S
+ *		       to initialize global constructor for C++ applications
+ * 5.4 pkp   18/12/15  Modified cortexr5/gcc/xil-crt0.S to initialize global constructor for
+ *		       C++ applications
+ * 5.4 pkp   18/12/15  Modified cortexa53/32bit/gcc/translation_table.S and 64bit/gcc/
+ *		       translation_table.S to update the translation table according to proper
+ *		       address map
+ * 5.4 pkp   18/12/15  Modified cortexar5/mpu.c to initialize the MPU according to proper
+ *		       address map
+ * 5.4	pkp  05/01/16  Modified cortexa53/64bit/boot.S to set the reset vector register RVBAR
+ *		       equivalent to vector table base address
+ * 5.4 pkp   08/01/16  Modified cortexa9/gcc/Makefile to update the extra compiler flag
+ *		       as per the toolchain update
+ * 5.4 pkp   12/01/16  Changed common/xplatform_info.* to add platform information support
+ *		       for Cortex-A53 32bit mode
+ * 5.4 pkp   28/01/16  Modified cortexa53/32bit/sleep.c and usleep.c & cortexa53/64bit/sleep.c
+ *		       and usleep.c to correct routines to avoid hardcoding the timer frequency,
+ *		       instead take it from xparameters.h to properly configure the timestamp
+ *		       clock frequency
+ * 5.4 asa   29/01/16  Modified microblaze/mb_interface.h to add macros that support the
+ *		       new instructions for MB address extension feature
+ * 5.4 kvn   30/01/16  Modified xparameters_ps.h file to add interrupt ID number for
+ *		       system monitor.
+ * 5.4 pkp   04/02/16  Modified cortexr5/gcc/boot.S to enable fault log for lock-step mode
+ * 5.4 pkp   19/02/16  Modified cortexr5/xtime_l.c to add an API XTime_StartTimer and updated
+ *		       cortexr5/xil-crt0.S to configure the TTC3 timer when present. Modified
+ *		       cortexr5/sleep.c, cortexr5/usleep.c to use TTC3 when present otherwise
+ *		       use set of assembly instructions to provide required delay to fix
+ *		       CR#913249.
+ * 5.4 asa   25/02/16  Made changes in xil-crt0.S for R5, A53 64 and 32 bit BSPs, to replace
+ *		       _exit with exit. We should not be directly calling _exit and should
+ *		       always use the library exit. This fixes the CR#937036.
+ * 5.4 pkp   25/02/16  Made change to cortexr5/gcc/boot.S to initialize the floating point
+ *		       registers, banked registers for various modes and enabled
+ *		       the cache ECC check before enabling the fault log for lock step mode
+ *		       Also modified the cortexr5/gcc/Makefile to support floating point
+ *		       registers initialization in boot code.
+ * 5.4 pkp   03/01/16  Updated the exit function in cortexr5/gcc/_exit.c to enable the debug
+ *		       logic in case of lock-step mode when fault log is enabled to fix
+ *		       CR#938281
+ * 5.4 pkp   03/02/16  Modified cortexa9/iccarm/xpseudo_asm_iccarm.h file to include
+ *		       header file instrinsics.h which contains assembly instructions
+ *		       definitions which can be used by C
+ * 5.4 asa   03/02/16  Added print.c in MB BSP. Made other cosmetic changes to have uniform
+ *                     proto for all print.c across the BSPs. This patch fixes CR#938738.
+ * 5.4 pkp   03/09/16  Modified cortexr5/sleep.c and usleep.c to avoid disabling the
+ *		       interrupts when sleep/usleep is being executed using assembly
+ *		       instructions to fix CR#913249.
+ * 5.4 pkp   03/11/16  Modified cortexr5/xtime_l.c to avoid enabling overflow interrupt,
+ *		       instead modified cortexr5/sleep.c and usleep.c to poll the counter
+ *		       value and compare it with previous value to detect the overflow
+ *		       to fix CR#940209.
+ * 5.4 pkp   03/24/16  Modified cortexr5/boot.S to reset the dbg_lpd_reset before enabling
+ *		       the fault log to avoid intervention for lock-step mode and cortexr5/
+ *		       _exit.c to enable the dbg_lpd_reset once the fault log is disabled
+ *		       to fix CR#947335
+ * 5.5 pkp   04/11/16  Modified cortexr5/boot.S to enable comparators for non-JTAG bootmode
+ *		       in lock-step to avoid resetting the debug logic which restricts the
+ *		       access for debugger and removed enabling back of debug modules in
+ *		       cortexr5/_exit.c
+ * 5.5 pkp   04/13/16  Modified cortexa9/gcc/read.c to return correct number of bytes when
+ *		       read buffer is filled and removed the redundant NULL checking for
+ *		       buffer to simplify the code
+ * 5.5 pkp   04/13/16  Modified cortexa53/64bit/gcc/read.c and cortexa53/32bit/gcc/read.c
+ *		       to return correct number of bytes when read buffer is filled and
+ *		       removed the redundant NULL checking for buffer to simplify the code
+ * 5.5 pkp   04/13/16  Modified cortexr5/gcc/read.c to return correct number of bytes when
+ *		       read buffer is filled and removed the redundant NULL checking for
+ *		       buffer to simplify the code
+ * 5.5 pkp   04/13/16  Modified cortexa53/64bit/xpseudo_asm_gcc.h to add volatile to asm
+ *		       instruction macros to disable certain optimizations which may move
+ *		       code out of loops if optimizers believe that the code will always
+ *		       return the same result or discard asm statements if optimizers
+ *		       determine there is no need for the output variables
+ * 5.5 pkp   04/13/16  Modified cortexa53/64bit/xtime_l.c to add XTime_StartTimer which
+ *		       starts the timer if it is disabled and modified XTime_GetTime to
+ *		       enable the timer if it is not enabled. Also modified cortexa53/64bit/
+ *		       sleep.c and cortexa53/64bit/usleep.c to enable the timer if it is
+ *		       disabled and read the counter value directly from register instead
+ *		       of using XTime_GetTime for optimization
+ * 5.5 pkp   04/13/16  Modified cortexa53/32bit/xtime_l.c to add XTime_StartTimer which
+ *		       starts the timer if it is disabled and modified XTime_GetTime to
+ *		       enable the timer if it is not enabled. Also modified cortexa53/32bit/
+ *		       sleep.c and cortexa53/32bit/usleep.c to enable the timer if it is
+ *		       disabled and read the counter value directly from register instead
+ *		       of using XTime_GetTime for optimization
+ * 5.5 pkp   04/13/16  Modified cortexa53/32bit/xil_cache.c and cortexa53/64bit/xil_cache.c
+ *		       to update the Xil_DCacheInvalidate, Xil_DCacheInvalidateLine and
+ * 		       Xil_DCacheInvalidateRange functions description for proper
+ *		       explaination to fix CR#949801
+ * 5.5 asa   04/20/16  Added missing macros for hibernate and suspend in Microblaze BSP
+ *                     file mb_interface.h. This fixes the CR#949503.
+ * 5.5 asa   04/29/16  Fix for CR#951080. Updated cache APIs for HW designs where cache
+ *                     memory is not included for MicroBlaze.
+ * 5.5 pkp   05/06/16  Modified the cortexa9/xil_exception.h to update the macros
+ *		       Xil_EnableNestedInterrupts and Xil_DisableNestedInterrupts for fixing
+ *		       the issue of lr being corrupted to resolve CR#950468
+ * 5.5 pkp   05/06/16  Modified the cortexr5/xil_exception.h to update the macros
+ *		       Xil_EnableNestedInterrupts and Xil_DisableNestedInterrupts for fixing
+ *		       the issue of lr being corrupted to resolve CR#950468
+ * 6.0 kvn   05/31/16  Make Xil_AsserWait a global variable
+ * 6.0 pkp   06/27/16  Updated cortexr5/mpu.c to move the code related to Init_MPU to .boot
+ *		       section since it is part of boot process to fix CR#949555
+ *     hk    07/12/16  Correct masks for IOU SLCR GEM registers
+ * 6.0 pkp   07/25/16  Program the counter frequency in boot code for CortexA53
+ * 6.0 asa   08/03/16  Updated sleep_common function in microblaze_sleep.c to improve the
+ *                     the accuracy of MB sleep functionality. This fixes the CR#954191.
+ * 6.0 mus   08/03/16  Restructured the BSP to avoid code duplication across all BSPs.
+ *                     Source code directories specific to ARM processor's are moved to src/arm
+ *                     directory(i.e. src/cortexa53,src/cortexa9 and src/cortexr5 moved to src/arm/cortexa53,
+ *                     src/arm/cortexa9 and src/arm/cortexr5 respectively).Files xil_printf.c,xil_printf.h,
+ *                     print.c,xil_io.c and xil_io.h are consolidated across all BSPs into common file each and
+ *                     consolidated files are kept at src/common directory.Files putnum.c,vectors.c,vectors.h,
+ *                     xil_exception.c and xil_exception.h are consolidated across all ARM BSPs
+ *                     into common file each and consolidated files are kept at src/arm/common directory.
+ *                     GCC source files related to file  operations are consolidated and kept
+ *                     at src/arm/common/gcc directory.
+ *                     All io interfacing functions (i.e. All variants of xil_out, xil_in )
+ *                     are made as static inline and implementation is kept in consolidated common/xil_io.h,
+ *                     xil_io.h must be included as a header file to access io interfacing functions.
+ *                     Added undefined exception handler for A53 32 bit and R5 processor
+ * 6.0 mus   08/11/16  Updated xtime_l.c in R5 BSP to remove implementation of XTime_SetTime API, since
+ *                     TTC counter value register is read only.
+ * 6.0 asa   08/15/16  Modified the signatures for functions sleep and usleep. This fixes
+ *                     the CR#956899.
+ * 6.0 mus   08/18/16  Defined ARMA53_32 flag in cortexa53/32bit/xparameters_ps.h and ARMR5 flag
+ *                     in cortexr5/xparameters_ps.h
+ * 6.0 mus   08/18/16  Added support for the the Zynq 7000s devices
+ * 6.0 mus   08/18/16  Removed unused variables from xil_printf.c and xplatform_info.c
+ * 6.0 mus   08/19/16  Modified xil_io.h to remove __LITTLE_ENDIAN__ flag check for all ARM processors
+ * 6.1 mus   11/03/16  Added APIs handle_stdin_parameter and handle_stdout_parameter in standalone tcl.
+ *                     ::hsi::utils::handle_stdin and ::hsi::utils::handle_stdout are taken as a base for
+ *                     these APIs and modifications are done on top of it to handle stdout/stdin
+ *                     parameters for design which doesnt have UART.It fixes CR#953681
+ * 6.1 nsk   11/07/16  Added two new files xil_mem.c and xil_mem.h for xil_memcpy
+ * 6.2 pkp   12/14/16  Updated cortexa53/64bit/translation_table.S for upper ps DDR. The 0x800000000 -
+ *		       0xFFFFFFFFF range is marked normal memory for the DDR size defined in hdf
+ *		       and rest of the memory in that 32GB region is marked as reserved to avoid
+ *		       any speculative access
+ * 6.2 pkp   12/23/16  Added support for floating point operation to Cortex-A53 64bit mode. It modified
+ *		       asm_vectors.S to implement lazy floating point context saving i.e. floating point
+ *		       access is enabled if there is any floating point operation, it is disabled by
+ *		       default. Also FPU is initally disabled for IRQ and none of the floating point
+ *		       registers are saved during normal context saving. If IRQ handler does not require
+ *		       floating point operation, the floating point registers are untouched and no need
+ *		       for saving/restoring. If IRQ handler uses any floating point operation, then floating
+ *		       point registers are saved and FPU is enabled for IRQ handler. Then floating point
+ *		       registers are restored back after servicing IRQ during normal context restoring.
+ * 6.2 mus   01/01/17  Updated makefiles of R5 and a53 64 bit/32 bit processors to fix error in clean
+ *                     target.It fixes the CR#966900
+ * 6.2 pkp   01/22/17  Added support for EL1 non-secure execution and Hypervisor Baremetal for Cortex-A53
+ *		       64bit Mode. If Hypervisor_guest is selected as true in BSP settings, BSP will be built
+ *		       for EL1 Non-secure, else BSP will be built for EL3. By default hypervisor_guest is
+ *		       as false i.e. default bsp is EL3.
+ * 6.2 pkp   01/24/17  Updated cortexa53/64bit/boot.S to clear FPUStatus variable to make sure that it
+ *		       contains initial status of FPU i.e. disabled. In case of a warm restart execution
+ *		       when bss sections are not cleared, it may contain previously updated value which
+ *		       does not hold true once processor resumes. This fixes CR#966826.
+ * 6.2 asa   01/31/17  The existing Xil_DCacheDisable API first flushes the
+ *		       D caches and then disables it. The problem with that is,
+ *		       potentially there will be a small window after the cache
+ *		       flush operation and before the we disable D caches where
+ *		       we might have valid data in cache lines. In such a
+ *		       scenario disabling the D cache can lead to unknown behavior.
+ *		       The ideal solution to this is to use assembly code for
+ *		       the complete API and avoid any memory accesses. But with
+ *		       that we will end up having a huge amount on assembly code
+ *		       which is not maintainable. Changes are done to use a mix
+ *		       of assembly and C code. All local variables are put in
+ *		       registers. Also function calls are avoided in the API to
+ *		       avoid using stack memory.
+ * 6.2 mus   02/13/17 A53 CPU cache system can pre-fetch catch lines.So there are
+ *                    scenarios when an invalidated cache line can get pre fetched to cache.
+ *                    If that happens, the coherency between cache and memory is lost
+ *                    resulting in lost data. To avoid this kind of issue either
+ *                    user has to use dsb() or disable pre-fetching for L1 cache
+ *                    or else reduce maximum number of outstanding data prefetches allowed.
+ *                    Using dsb() while comparing data costing more performance compared to
+ *                    disabling pre-fetching/reducing maximum number of outstanding data
+ *                    prefetches for L1 Cache.The new api Xil_ConfigureL1Prefetch is added
+ *                    to disable pre-fetching/configure maximum number of outstanding data
+ *                    prefetches allowed in L1 cache system.This fixes CR#967864.
+ * 6.2 pkp   02/16/17 Added xil_smc.c file to provide a C wrapper for smc calling which can be
+ *		      used by cortex-A53 64bit EL1 Non-secure application.
+ * 6.2 kvn   03/03/17 Added support thumb mode
+ * 6.2 mus   03/13/17 Fixed MISRA C mandatory standard violations in ARM cortexr5 and cortexa53 BSP.
+ *                    It fixes CR#970543
+ * 6.2 asa   03/16/17 Fix for CR#970859. For Mcroblaze BSP, when we enable intrusive
+ *                    profiling we see a crash. That is because the the tcl uses invalid
+ *                    HSI command. This change fixes it.
+ * 6.2 mus   03/22/17 Updated standalone tcl to generate xparameter XPAR_FPD_IS_CACHE_COHERENT, if
+ *                    any FPD peripheral is configured to use CCI.It fixes CR#972638
+ * 6.3 mus   03/20/17 Updated cortex-r5 BSP, to add hard floating point support.
+ * 6.3 mus   04/17/17 Updated Cortex-a53 32 bit BSP boot code to fix bug in
+ *                    the HW coherency enablement. It fixes the CR#973287
+ * 6.3 mus   04/20/17 Updated Cortex-A53 64 bit BSP boot code, to remove redundant write to the
+ *                    L2CTLR_EL1 register. It fixes the CR#974698
+ * 6.4 mus   06/08/17 Updated arm/common/xil_exception.c to fix warnings in C level exception handlers
+ *                    of ARM 32 bit processor's.
+ * 6.4 mus   06/14/17 Updated cortexa53/64bit/gcc/asm_vectors.S to fix bug in  IRQInterruptHandler code
+ *                    snippet, which checks for the FPEN bit of CPACR_EL1 register.
+ * 6.4 ms    05/23/17 Added PSU_PMU macro in xplatform_info.c, xparameters.h to support
+ *                    XGetPSVersion_Info function for PMUFW.
+ *     ms    06/13/17 Added PSU_PMU macro in xplatform_info.c to support XGetPlatform_Info
+ *                    function for PMUFW.
+ * 6.4 mus   07/05/17 Updated Xil_In32BE function in xil_io.h to fix bug.It fixes CR#979740.
+ * 6.4 mus   07/25/17 Updated a53 32 bit boot code and vectors to support hard floating point
+ *                    operations.Now,VFP is being enabled in FPEXC register, through boot code
+ *                    and FPU registers are being saved/restored when irq/fiq vector is invoked.
+ * 6.4 adk   08/01/17 Updated standalone tcl to generate xparameter XPAR_PL_IS_CACHE_COHERENT,
+ * 		      if h/w design configured with HPC port.
+ * 6.4 mus   08/10/17 Updated a53 64 bit translation table to mark  memory as a outer shareable for
+ *                    EL1 NS execution. This change has been done to support CCI enabled IP's.
+ * 6.4 mus   08/11/17 Updated a53 64 bit boot code to implement ARM erratum 855873.This fixes
+ *                    CR#982209.
+ * 6.4 asa   08/16/17 Made several changes in the R5 MPU handling logic. Added new APIs to
+ *                    make RPU MPU handling user-friendly. This also fixes the CR-981028.
+ * 6.4 mus   08/17/17 Updated XGet_Zynq_UltraMp_Platform_info and XGetPSVersion_Info APIs to read
+ *                    version register through SMC call, over EL1 NS mode. This change has been done to
+ *                    support these APIs over EL1 NS mode.
+ * 6.5 mus   10/20/17 Updated standalone.tcl to fix bug in mb_can_handle_exceptions_in_delay_slots proc,
+ *                    it fixes CR#987464.
+ * 6.6 mus   12/07/17 Updated cortexa9/xil_errata.h and cortexa9/xil_cache.c to remove Errata 753970.
+ *                    It fixes CR#989132.
+ *     srm   10/18/17 Updated all the sleep routines in a9,a53,R5,microblaze. Now the sleep routines
+ *		      will use the timer specified by the user to provide delay. A9 and A53 can use
+ *                    Global timer or TTC. R5 can use TTC or the machine cycles. Microblaze can use
+ *                    machine cycles or Axi timer. Updated standalone.tcl and standalone.mld files
+ *		      to support the sleep configuration Added new API's for the Axi timer in
+ *		      microblaze and TTC in ARM. Added two new files, xil_sleeptimer.c and
+ *		      xil_sleeptimer.h in ARM for the common sleep routines and 1 new file,
+ *		      xil_sleepcommon.c in Standalone-common for sleep/usleep API's.
+ * 6.6 hk    12/15/17 Export platform macros to bspconfig.h based on the processor.
+ * 6.6 asa   1/16/18  Ensure C stack information for A9 are flushed out from L1 D cache
+ *                    or L2 cache only when the respective caches are enabled. This fixes CR-922023.
+ * 6.6 mus   01/19/18 Updated asm_vectors.S and boot.S in Cortexa53 64 bit BSP, to add isb
+ *                    after writing to cpacr_el1/cptr_el3 registers. It would ensure
+ *                    disabling/enabling of floating-point unit, before any subsequent
+ *                    instruction.
+ * 6.6 mus   01/30/18 Updated hypervisor enabled Cortexa53 64 bit BSP, to add xen PV console
+ *                    support. Now, xil_printf would use PV console instead of UART in case of
+ *                    hypervisor enabled BSP.
+ * 6.6 mus   02/02/18 Updated get_connected_if proc in standalone tcl to detect the HPC port 
+ *                    configured with smart interconnect.It fixes CR#990318.
+ * 6.6 srm   02/10/18 Updated csu_wdt interrupt to the correct value. Fixes CR#992229
+ * 6.6 asa   02/12/18 Fix for heap handling for ARM platforms. CR#993932.
+ * 6.6 mus   02/19/18 Updated standalone.tcl to fix bug in handle_profile_opbtimer proc,
+ *                    CR#995014.
+ * 6.6 mus   02/23/18 Presently Cortex R5 BSP boot code is disabling the debug logic in
+*		      non-JTAG boot mode, when processor is in lockstep configuration.
+*		      This behavior is restricting application debugging in non-JTAG boot
+*		      mode.  To get rid of this restriction, added new mld parameter 
+*		      "lockstep_mode_debug", to enable/disable debug logic from BSP 
+*		      settings. Now, debug logic can be enabled through BSP settings, 
+*		      by modifying value of parameter "lockstep_mode_debug" as "true".
+*		      It fixes CR#993896.
+ * 6.6.mus   02/27/18  Updated Xil_DCacheInvalidateRange and
+*		       Xil_ICacheInvalidateRange APIs in Cortexa53 64 bit BSP, to fix  bug
+*		       in handling upper DDR addresses.It fixes CR#995581.
+* 6.6 mus    03/12/18  Updated makefile of Cortexa53 32bit BSP to add includes_ps directory
+*		       in the list of include paths. This change allows applications/BSP
+*		       files to include .h files in include_ps directory.
+* 6.6 mus    03/16/18  By default CPUACTLR_EL1 is accessible only from EL3, it
+*		       results into abort if accessed from EL1 non secure privilege
+*		       level. Updated Xil_ConfigureL1Prefetch function in Cortexa53 64 bit BSP
+*		       to avoid CPUACTLR_EL1 access from privile levels other than EL3.
+* 6.6 mus    03/16/18  Updated hypervisor enabled BSP to use PV console, based on the
+*		       XEN_USE_PV_CONSOLE flag. By deafault hypervisor enabled BSP would
+*		       use UART console, PV console can be enabled by appending
+		       "-DXEN_USE_PV_CONSOLE" to the BSP extra compiler flags.
+ *
+ *****************************************************************************************/
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/close.c b/src/Xilinx/libsrc/standalone_v6_6/src/close.c
new file mode 100644
index 0000000..dbbe0d4
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/close.c
@@ -0,0 +1,49 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#ifndef UNDEFINE_FILE_OPS
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _close(s32 fd);
+}
+#endif
+
+/*
+ * close -- We don't need to do anything, but pretend we did.
+ */
+
+__attribute__((weak)) s32 _close(s32 fd)
+{
+  (void)fd;
+  return (0);
+}
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/config.make b/src/Xilinx/libsrc/standalone_v6_6/src/config.make
new file mode 100644
index 0000000..fdd79a5
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/config.make
@@ -0,0 +1,2 @@
+LIBSOURCES = *.c *.S
+LIBS = standalone_libs
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/cpu_init.S b/src/Xilinx/libsrc/standalone_v6_6/src/cpu_init.S
new file mode 100644
index 0000000..40bbc2c
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/cpu_init.S
@@ -0,0 +1,79 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file cpu_init.s
+*
+* This file contains CPU specific initialization. Invoked from main CRT
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00  pkp	02/10/14 Initial version
+*
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+	.text
+	.global __cpu_init
+	.align 2
+__cpu_init:
+
+/* Clear cp15 regs with unknown reset values */
+	mov	r0, #0x0
+	mcr	p15, 0, r0, c5, c0, 0	/* DFSR */
+	mcr	p15, 0, r0, c5, c0, 1	/* IFSR */
+	mcr	p15, 0, r0, c6, c0, 0	/* DFAR */
+	mcr	p15, 0, r0, c6, c0, 2	/* IFAR */
+	mcr	p15, 0, r0, c9, c13, 2	/* PMXEVCNTR */
+	mcr	p15, 0, r0, c13, c0, 2	/* TPIDRURW */
+	mcr	p15, 0, r0, c13, c0, 3	/* TPIDRURO */
+
+
+/* Reset and start Cycle Counter */
+	mov	r2, #0x80000000		/* clear overflow */
+	mcr	p15, 0, r2, c9, c12, 3
+	mov	r2, #0xd		/* D, C, E */
+	mcr	p15, 0, r2, c9, c12, 0
+	mov	r2, #0x80000000		/* enable cycle counter */
+	mcr	p15, 0, r2, c9, c12, 1
+
+	bx	lr
+
+.end
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/errno.c b/src/Xilinx/libsrc/standalone_v6_6/src/errno.c
new file mode 100644
index 0000000..df0218e
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/errno.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* The errno variable is stored in the reentrancy structure.  This
+   function returns its address for use by the macro errno defined in
+   errno.h.  */
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 * __errno (void);
+}
+#endif
+
+__attribute__((weak)) sint32 *
+__errno (void)
+{
+  return &_REENT->_errno;
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/fcntl.c b/src/Xilinx/libsrc/standalone_v6_6/src/fcntl.c
new file mode 100644
index 0000000..e58221a
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/fcntl.c
@@ -0,0 +1,46 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/*
+ * fcntl -- Manipulate a file descriptor.
+ *          We don't have a filesystem, so we do nothing.
+ */
+__attribute__((weak)) sint32 fcntl (sint32 fd, sint32 cmd, long arg)
+{
+  (void)fd;
+  (void)cmd;
+  (void)arg;
+  return 0;
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/fstat.c b/src/Xilinx/libsrc/standalone_v6_6/src/fstat.c
new file mode 100644
index 0000000..c5a31f3
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/fstat.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf);
+}
+#endif
+/*
+ * fstat -- Since we have no file system, we just return an error.
+ */
+__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf)
+{
+  (void)fd;
+  buf->st_mode = S_IFCHR; /* Always pretend to be a tty */
+
+  return (0);
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/getpid.c b/src/Xilinx/libsrc/standalone_v6_6/src/getpid.c
new file mode 100644
index 0000000..d02df5c
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/getpid.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "xil_types.h"
+/*
+ * getpid -- only one process, so just return 1.
+ */
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _getpid(void);
+}
+#endif
+
+__attribute__((weak)) s32 getpid(void)
+{
+  return 1;
+}
+
+__attribute__((weak)) s32 _getpid(void)
+{
+  return 1;
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/inbyte.c b/src/Xilinx/libsrc/standalone_v6_6/src/inbyte.c
new file mode 100644
index 0000000..0036459
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/inbyte.c
@@ -0,0 +1,14 @@
+#include "xparameters.h"
+#include "xuartps_hw.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+char inbyte(void);
+#ifdef __cplusplus
+}
+#endif 
+
+char inbyte(void) {
+	 return XUartPs_RecvByte(STDIN_BASEADDRESS);
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu0_cfg.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu0_cfg.h
new file mode 100644
index 0000000..9029bea
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu0_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU0_CFG_H__
+#define __XDDR_XMPU0_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu0Cfg Base Address
+ */
+#define XDDR_XMPU0_CFG_BASEADDR      0xFD000000UL
+
+/**
+ * Register: XddrXmpu0CfgCtrl
+ */
+#define XDDR_XMPU0_CFG_CTRL    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU0_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu0CfgErrSts1
+ */
+#define XDDR_XMPU0_CFG_ERR_STS1    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU0_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgErrSts2
+ */
+#define XDDR_XMPU0_CFG_ERR_STS2    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU0_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgPoison
+ */
+#define XDDR_XMPU0_CFG_POISON    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU0_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU0_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU0_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU0_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgIsr
+ */
+#define XDDR_XMPU0_CFG_ISR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU0_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgImr
+ */
+#define XDDR_XMPU0_CFG_IMR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU0_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu0CfgIen
+ */
+#define XDDR_XMPU0_CFG_IEN    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU0_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgIds
+ */
+#define XDDR_XMPU0_CFG_IDS    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU0_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgLock
+ */
+#define XDDR_XMPU0_CFG_LOCK    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU0_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00Strt
+ */
+#define XDDR_XMPU0_CFG_R00_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU0_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00End
+ */
+#define XDDR_XMPU0_CFG_R00_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU0_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00Mstr
+ */
+#define XDDR_XMPU0_CFG_R00_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU0_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00
+ */
+#define XDDR_XMPU0_CFG_R00    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU0_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01Strt
+ */
+#define XDDR_XMPU0_CFG_R01_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU0_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01End
+ */
+#define XDDR_XMPU0_CFG_R01_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU0_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01Mstr
+ */
+#define XDDR_XMPU0_CFG_R01_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU0_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01
+ */
+#define XDDR_XMPU0_CFG_R01    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU0_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02Strt
+ */
+#define XDDR_XMPU0_CFG_R02_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU0_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02End
+ */
+#define XDDR_XMPU0_CFG_R02_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU0_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02Mstr
+ */
+#define XDDR_XMPU0_CFG_R02_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU0_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02
+ */
+#define XDDR_XMPU0_CFG_R02    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU0_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03Strt
+ */
+#define XDDR_XMPU0_CFG_R03_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU0_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03End
+ */
+#define XDDR_XMPU0_CFG_R03_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU0_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03Mstr
+ */
+#define XDDR_XMPU0_CFG_R03_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU0_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03
+ */
+#define XDDR_XMPU0_CFG_R03    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU0_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04Strt
+ */
+#define XDDR_XMPU0_CFG_R04_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU0_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04End
+ */
+#define XDDR_XMPU0_CFG_R04_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU0_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04Mstr
+ */
+#define XDDR_XMPU0_CFG_R04_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU0_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04
+ */
+#define XDDR_XMPU0_CFG_R04    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU0_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05Strt
+ */
+#define XDDR_XMPU0_CFG_R05_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU0_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05End
+ */
+#define XDDR_XMPU0_CFG_R05_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU0_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05Mstr
+ */
+#define XDDR_XMPU0_CFG_R05_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU0_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05
+ */
+#define XDDR_XMPU0_CFG_R05    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU0_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06Strt
+ */
+#define XDDR_XMPU0_CFG_R06_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU0_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06End
+ */
+#define XDDR_XMPU0_CFG_R06_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU0_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06Mstr
+ */
+#define XDDR_XMPU0_CFG_R06_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU0_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06
+ */
+#define XDDR_XMPU0_CFG_R06    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU0_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07Strt
+ */
+#define XDDR_XMPU0_CFG_R07_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU0_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07End
+ */
+#define XDDR_XMPU0_CFG_R07_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU0_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07Mstr
+ */
+#define XDDR_XMPU0_CFG_R07_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU0_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07
+ */
+#define XDDR_XMPU0_CFG_R07    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU0_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08Strt
+ */
+#define XDDR_XMPU0_CFG_R08_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU0_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08End
+ */
+#define XDDR_XMPU0_CFG_R08_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU0_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08Mstr
+ */
+#define XDDR_XMPU0_CFG_R08_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU0_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08
+ */
+#define XDDR_XMPU0_CFG_R08    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU0_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09Strt
+ */
+#define XDDR_XMPU0_CFG_R09_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU0_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09End
+ */
+#define XDDR_XMPU0_CFG_R09_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU0_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09Mstr
+ */
+#define XDDR_XMPU0_CFG_R09_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU0_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09
+ */
+#define XDDR_XMPU0_CFG_R09    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU0_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10Strt
+ */
+#define XDDR_XMPU0_CFG_R10_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU0_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10End
+ */
+#define XDDR_XMPU0_CFG_R10_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU0_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10Mstr
+ */
+#define XDDR_XMPU0_CFG_R10_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU0_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10
+ */
+#define XDDR_XMPU0_CFG_R10    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU0_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11Strt
+ */
+#define XDDR_XMPU0_CFG_R11_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU0_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11End
+ */
+#define XDDR_XMPU0_CFG_R11_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU0_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11Mstr
+ */
+#define XDDR_XMPU0_CFG_R11_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU0_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11
+ */
+#define XDDR_XMPU0_CFG_R11    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU0_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12Strt
+ */
+#define XDDR_XMPU0_CFG_R12_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU0_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12End
+ */
+#define XDDR_XMPU0_CFG_R12_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU0_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12Mstr
+ */
+#define XDDR_XMPU0_CFG_R12_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU0_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12
+ */
+#define XDDR_XMPU0_CFG_R12    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU0_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13Strt
+ */
+#define XDDR_XMPU0_CFG_R13_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU0_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13End
+ */
+#define XDDR_XMPU0_CFG_R13_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU0_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13Mstr
+ */
+#define XDDR_XMPU0_CFG_R13_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU0_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13
+ */
+#define XDDR_XMPU0_CFG_R13    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU0_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14Strt
+ */
+#define XDDR_XMPU0_CFG_R14_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU0_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14End
+ */
+#define XDDR_XMPU0_CFG_R14_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU0_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14Mstr
+ */
+#define XDDR_XMPU0_CFG_R14_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU0_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14
+ */
+#define XDDR_XMPU0_CFG_R14    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU0_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15Strt
+ */
+#define XDDR_XMPU0_CFG_R15_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU0_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15End
+ */
+#define XDDR_XMPU0_CFG_R15_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU0_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15Mstr
+ */
+#define XDDR_XMPU0_CFG_R15_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU0_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15
+ */
+#define XDDR_XMPU0_CFG_R15    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU0_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU0_CFG_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu1_cfg.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu1_cfg.h
new file mode 100644
index 0000000..e2fa6d4
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu1_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU1_CFG_H__
+#define __XDDR_XMPU1_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu1Cfg Base Address
+ */
+#define XDDR_XMPU1_CFG_BASEADDR      0xFD010000UL
+
+/**
+ * Register: XddrXmpu1CfgCtrl
+ */
+#define XDDR_XMPU1_CFG_CTRL    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU1_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu1CfgErrSts1
+ */
+#define XDDR_XMPU1_CFG_ERR_STS1    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU1_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgErrSts2
+ */
+#define XDDR_XMPU1_CFG_ERR_STS2    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU1_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgPoison
+ */
+#define XDDR_XMPU1_CFG_POISON    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU1_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU1_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU1_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU1_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgIsr
+ */
+#define XDDR_XMPU1_CFG_ISR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU1_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgImr
+ */
+#define XDDR_XMPU1_CFG_IMR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU1_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu1CfgIen
+ */
+#define XDDR_XMPU1_CFG_IEN    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU1_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgIds
+ */
+#define XDDR_XMPU1_CFG_IDS    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU1_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgLock
+ */
+#define XDDR_XMPU1_CFG_LOCK    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU1_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00Strt
+ */
+#define XDDR_XMPU1_CFG_R00_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU1_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00End
+ */
+#define XDDR_XMPU1_CFG_R00_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU1_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00Mstr
+ */
+#define XDDR_XMPU1_CFG_R00_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU1_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00
+ */
+#define XDDR_XMPU1_CFG_R00    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU1_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01Strt
+ */
+#define XDDR_XMPU1_CFG_R01_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU1_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01End
+ */
+#define XDDR_XMPU1_CFG_R01_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU1_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01Mstr
+ */
+#define XDDR_XMPU1_CFG_R01_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU1_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01
+ */
+#define XDDR_XMPU1_CFG_R01    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU1_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02Strt
+ */
+#define XDDR_XMPU1_CFG_R02_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU1_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02End
+ */
+#define XDDR_XMPU1_CFG_R02_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU1_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02Mstr
+ */
+#define XDDR_XMPU1_CFG_R02_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU1_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02
+ */
+#define XDDR_XMPU1_CFG_R02    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU1_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03Strt
+ */
+#define XDDR_XMPU1_CFG_R03_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU1_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03End
+ */
+#define XDDR_XMPU1_CFG_R03_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU1_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03Mstr
+ */
+#define XDDR_XMPU1_CFG_R03_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU1_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03
+ */
+#define XDDR_XMPU1_CFG_R03    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU1_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04Strt
+ */
+#define XDDR_XMPU1_CFG_R04_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU1_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04End
+ */
+#define XDDR_XMPU1_CFG_R04_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU1_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04Mstr
+ */
+#define XDDR_XMPU1_CFG_R04_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU1_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04
+ */
+#define XDDR_XMPU1_CFG_R04    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU1_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05Strt
+ */
+#define XDDR_XMPU1_CFG_R05_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU1_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05End
+ */
+#define XDDR_XMPU1_CFG_R05_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU1_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05Mstr
+ */
+#define XDDR_XMPU1_CFG_R05_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU1_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05
+ */
+#define XDDR_XMPU1_CFG_R05    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU1_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06Strt
+ */
+#define XDDR_XMPU1_CFG_R06_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU1_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06End
+ */
+#define XDDR_XMPU1_CFG_R06_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU1_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06Mstr
+ */
+#define XDDR_XMPU1_CFG_R06_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU1_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06
+ */
+#define XDDR_XMPU1_CFG_R06    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU1_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07Strt
+ */
+#define XDDR_XMPU1_CFG_R07_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU1_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07End
+ */
+#define XDDR_XMPU1_CFG_R07_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU1_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07Mstr
+ */
+#define XDDR_XMPU1_CFG_R07_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU1_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07
+ */
+#define XDDR_XMPU1_CFG_R07    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU1_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08Strt
+ */
+#define XDDR_XMPU1_CFG_R08_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU1_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08End
+ */
+#define XDDR_XMPU1_CFG_R08_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU1_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08Mstr
+ */
+#define XDDR_XMPU1_CFG_R08_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU1_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08
+ */
+#define XDDR_XMPU1_CFG_R08    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU1_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09Strt
+ */
+#define XDDR_XMPU1_CFG_R09_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU1_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09End
+ */
+#define XDDR_XMPU1_CFG_R09_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU1_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09Mstr
+ */
+#define XDDR_XMPU1_CFG_R09_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU1_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09
+ */
+#define XDDR_XMPU1_CFG_R09    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU1_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10Strt
+ */
+#define XDDR_XMPU1_CFG_R10_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU1_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10End
+ */
+#define XDDR_XMPU1_CFG_R10_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU1_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10Mstr
+ */
+#define XDDR_XMPU1_CFG_R10_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU1_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10
+ */
+#define XDDR_XMPU1_CFG_R10    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU1_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11Strt
+ */
+#define XDDR_XMPU1_CFG_R11_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU1_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11End
+ */
+#define XDDR_XMPU1_CFG_R11_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU1_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11Mstr
+ */
+#define XDDR_XMPU1_CFG_R11_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU1_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11
+ */
+#define XDDR_XMPU1_CFG_R11    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU1_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12Strt
+ */
+#define XDDR_XMPU1_CFG_R12_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU1_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12End
+ */
+#define XDDR_XMPU1_CFG_R12_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU1_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12Mstr
+ */
+#define XDDR_XMPU1_CFG_R12_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU1_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12
+ */
+#define XDDR_XMPU1_CFG_R12    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU1_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13Strt
+ */
+#define XDDR_XMPU1_CFG_R13_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU1_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13End
+ */
+#define XDDR_XMPU1_CFG_R13_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU1_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13Mstr
+ */
+#define XDDR_XMPU1_CFG_R13_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU1_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13
+ */
+#define XDDR_XMPU1_CFG_R13    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU1_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14Strt
+ */
+#define XDDR_XMPU1_CFG_R14_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU1_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14End
+ */
+#define XDDR_XMPU1_CFG_R14_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU1_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14Mstr
+ */
+#define XDDR_XMPU1_CFG_R14_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU1_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14
+ */
+#define XDDR_XMPU1_CFG_R14    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU1_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15Strt
+ */
+#define XDDR_XMPU1_CFG_R15_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU1_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15End
+ */
+#define XDDR_XMPU1_CFG_R15_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU1_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15Mstr
+ */
+#define XDDR_XMPU1_CFG_R15_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU1_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15
+ */
+#define XDDR_XMPU1_CFG_R15    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU1_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU1_CFG_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu2_cfg.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu2_cfg.h
new file mode 100644
index 0000000..55ea2a7
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu2_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU2_CFG_H__
+#define __XDDR_XMPU2_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu2Cfg Base Address
+ */
+#define XDDR_XMPU2_CFG_BASEADDR      0xFD020000UL
+
+/**
+ * Register: XddrXmpu2CfgCtrl
+ */
+#define XDDR_XMPU2_CFG_CTRL    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU2_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu2CfgErrSts1
+ */
+#define XDDR_XMPU2_CFG_ERR_STS1    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU2_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgErrSts2
+ */
+#define XDDR_XMPU2_CFG_ERR_STS2    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU2_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgPoison
+ */
+#define XDDR_XMPU2_CFG_POISON    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU2_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU2_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU2_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU2_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgIsr
+ */
+#define XDDR_XMPU2_CFG_ISR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU2_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgImr
+ */
+#define XDDR_XMPU2_CFG_IMR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU2_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu2CfgIen
+ */
+#define XDDR_XMPU2_CFG_IEN    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU2_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgIds
+ */
+#define XDDR_XMPU2_CFG_IDS    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU2_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgLock
+ */
+#define XDDR_XMPU2_CFG_LOCK    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU2_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00Strt
+ */
+#define XDDR_XMPU2_CFG_R00_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU2_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00End
+ */
+#define XDDR_XMPU2_CFG_R00_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU2_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00Mstr
+ */
+#define XDDR_XMPU2_CFG_R00_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU2_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00
+ */
+#define XDDR_XMPU2_CFG_R00    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU2_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01Strt
+ */
+#define XDDR_XMPU2_CFG_R01_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU2_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01End
+ */
+#define XDDR_XMPU2_CFG_R01_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU2_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01Mstr
+ */
+#define XDDR_XMPU2_CFG_R01_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU2_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01
+ */
+#define XDDR_XMPU2_CFG_R01    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU2_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02Strt
+ */
+#define XDDR_XMPU2_CFG_R02_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU2_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02End
+ */
+#define XDDR_XMPU2_CFG_R02_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU2_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02Mstr
+ */
+#define XDDR_XMPU2_CFG_R02_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU2_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02
+ */
+#define XDDR_XMPU2_CFG_R02    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU2_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03Strt
+ */
+#define XDDR_XMPU2_CFG_R03_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU2_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03End
+ */
+#define XDDR_XMPU2_CFG_R03_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU2_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03Mstr
+ */
+#define XDDR_XMPU2_CFG_R03_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU2_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03
+ */
+#define XDDR_XMPU2_CFG_R03    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU2_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04Strt
+ */
+#define XDDR_XMPU2_CFG_R04_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU2_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04End
+ */
+#define XDDR_XMPU2_CFG_R04_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU2_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04Mstr
+ */
+#define XDDR_XMPU2_CFG_R04_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU2_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04
+ */
+#define XDDR_XMPU2_CFG_R04    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU2_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05Strt
+ */
+#define XDDR_XMPU2_CFG_R05_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU2_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05End
+ */
+#define XDDR_XMPU2_CFG_R05_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU2_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05Mstr
+ */
+#define XDDR_XMPU2_CFG_R05_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU2_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05
+ */
+#define XDDR_XMPU2_CFG_R05    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU2_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06Strt
+ */
+#define XDDR_XMPU2_CFG_R06_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU2_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06End
+ */
+#define XDDR_XMPU2_CFG_R06_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU2_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06Mstr
+ */
+#define XDDR_XMPU2_CFG_R06_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU2_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06
+ */
+#define XDDR_XMPU2_CFG_R06    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU2_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07Strt
+ */
+#define XDDR_XMPU2_CFG_R07_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU2_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07End
+ */
+#define XDDR_XMPU2_CFG_R07_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU2_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07Mstr
+ */
+#define XDDR_XMPU2_CFG_R07_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU2_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07
+ */
+#define XDDR_XMPU2_CFG_R07    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU2_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08Strt
+ */
+#define XDDR_XMPU2_CFG_R08_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU2_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08End
+ */
+#define XDDR_XMPU2_CFG_R08_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU2_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08Mstr
+ */
+#define XDDR_XMPU2_CFG_R08_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU2_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08
+ */
+#define XDDR_XMPU2_CFG_R08    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU2_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09Strt
+ */
+#define XDDR_XMPU2_CFG_R09_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU2_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09End
+ */
+#define XDDR_XMPU2_CFG_R09_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU2_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09Mstr
+ */
+#define XDDR_XMPU2_CFG_R09_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU2_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09
+ */
+#define XDDR_XMPU2_CFG_R09    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU2_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10Strt
+ */
+#define XDDR_XMPU2_CFG_R10_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU2_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10End
+ */
+#define XDDR_XMPU2_CFG_R10_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU2_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10Mstr
+ */
+#define XDDR_XMPU2_CFG_R10_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU2_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10
+ */
+#define XDDR_XMPU2_CFG_R10    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU2_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11Strt
+ */
+#define XDDR_XMPU2_CFG_R11_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU2_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11End
+ */
+#define XDDR_XMPU2_CFG_R11_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU2_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11Mstr
+ */
+#define XDDR_XMPU2_CFG_R11_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU2_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11
+ */
+#define XDDR_XMPU2_CFG_R11    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU2_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12Strt
+ */
+#define XDDR_XMPU2_CFG_R12_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU2_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12End
+ */
+#define XDDR_XMPU2_CFG_R12_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU2_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12Mstr
+ */
+#define XDDR_XMPU2_CFG_R12_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU2_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12
+ */
+#define XDDR_XMPU2_CFG_R12    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU2_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13Strt
+ */
+#define XDDR_XMPU2_CFG_R13_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU2_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13End
+ */
+#define XDDR_XMPU2_CFG_R13_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU2_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13Mstr
+ */
+#define XDDR_XMPU2_CFG_R13_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU2_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13
+ */
+#define XDDR_XMPU2_CFG_R13    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU2_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14Strt
+ */
+#define XDDR_XMPU2_CFG_R14_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU2_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14End
+ */
+#define XDDR_XMPU2_CFG_R14_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU2_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14Mstr
+ */
+#define XDDR_XMPU2_CFG_R14_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU2_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14
+ */
+#define XDDR_XMPU2_CFG_R14    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU2_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15Strt
+ */
+#define XDDR_XMPU2_CFG_R15_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU2_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15End
+ */
+#define XDDR_XMPU2_CFG_R15_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU2_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15Mstr
+ */
+#define XDDR_XMPU2_CFG_R15_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU2_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15
+ */
+#define XDDR_XMPU2_CFG_R15    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU2_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU2_CFG_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu3_cfg.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu3_cfg.h
new file mode 100644
index 0000000..4163149
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu3_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU3_CFG_H__
+#define __XDDR_XMPU3_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu3Cfg Base Address
+ */
+#define XDDR_XMPU3_CFG_BASEADDR      0xFD030000UL
+
+/**
+ * Register: XddrXmpu3CfgCtrl
+ */
+#define XDDR_XMPU3_CFG_CTRL    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU3_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu3CfgErrSts1
+ */
+#define XDDR_XMPU3_CFG_ERR_STS1    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU3_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgErrSts2
+ */
+#define XDDR_XMPU3_CFG_ERR_STS2    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU3_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgPoison
+ */
+#define XDDR_XMPU3_CFG_POISON    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU3_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU3_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU3_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU3_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgIsr
+ */
+#define XDDR_XMPU3_CFG_ISR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU3_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgImr
+ */
+#define XDDR_XMPU3_CFG_IMR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU3_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu3CfgIen
+ */
+#define XDDR_XMPU3_CFG_IEN    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU3_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgIds
+ */
+#define XDDR_XMPU3_CFG_IDS    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU3_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgLock
+ */
+#define XDDR_XMPU3_CFG_LOCK    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU3_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00Strt
+ */
+#define XDDR_XMPU3_CFG_R00_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU3_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00End
+ */
+#define XDDR_XMPU3_CFG_R00_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU3_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00Mstr
+ */
+#define XDDR_XMPU3_CFG_R00_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU3_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00
+ */
+#define XDDR_XMPU3_CFG_R00    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU3_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01Strt
+ */
+#define XDDR_XMPU3_CFG_R01_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU3_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01End
+ */
+#define XDDR_XMPU3_CFG_R01_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU3_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01Mstr
+ */
+#define XDDR_XMPU3_CFG_R01_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU3_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01
+ */
+#define XDDR_XMPU3_CFG_R01    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU3_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02Strt
+ */
+#define XDDR_XMPU3_CFG_R02_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU3_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02End
+ */
+#define XDDR_XMPU3_CFG_R02_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU3_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02Mstr
+ */
+#define XDDR_XMPU3_CFG_R02_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU3_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02
+ */
+#define XDDR_XMPU3_CFG_R02    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU3_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03Strt
+ */
+#define XDDR_XMPU3_CFG_R03_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU3_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03End
+ */
+#define XDDR_XMPU3_CFG_R03_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU3_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03Mstr
+ */
+#define XDDR_XMPU3_CFG_R03_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU3_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03
+ */
+#define XDDR_XMPU3_CFG_R03    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU3_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04Strt
+ */
+#define XDDR_XMPU3_CFG_R04_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU3_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04End
+ */
+#define XDDR_XMPU3_CFG_R04_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU3_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04Mstr
+ */
+#define XDDR_XMPU3_CFG_R04_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU3_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04
+ */
+#define XDDR_XMPU3_CFG_R04    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU3_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05Strt
+ */
+#define XDDR_XMPU3_CFG_R05_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU3_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05End
+ */
+#define XDDR_XMPU3_CFG_R05_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU3_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05Mstr
+ */
+#define XDDR_XMPU3_CFG_R05_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU3_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05
+ */
+#define XDDR_XMPU3_CFG_R05    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU3_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06Strt
+ */
+#define XDDR_XMPU3_CFG_R06_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU3_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06End
+ */
+#define XDDR_XMPU3_CFG_R06_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU3_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06Mstr
+ */
+#define XDDR_XMPU3_CFG_R06_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU3_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06
+ */
+#define XDDR_XMPU3_CFG_R06    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU3_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07Strt
+ */
+#define XDDR_XMPU3_CFG_R07_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU3_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07End
+ */
+#define XDDR_XMPU3_CFG_R07_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU3_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07Mstr
+ */
+#define XDDR_XMPU3_CFG_R07_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU3_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07
+ */
+#define XDDR_XMPU3_CFG_R07    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU3_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08Strt
+ */
+#define XDDR_XMPU3_CFG_R08_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU3_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08End
+ */
+#define XDDR_XMPU3_CFG_R08_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU3_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08Mstr
+ */
+#define XDDR_XMPU3_CFG_R08_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU3_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08
+ */
+#define XDDR_XMPU3_CFG_R08    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU3_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09Strt
+ */
+#define XDDR_XMPU3_CFG_R09_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU3_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09End
+ */
+#define XDDR_XMPU3_CFG_R09_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU3_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09Mstr
+ */
+#define XDDR_XMPU3_CFG_R09_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU3_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09
+ */
+#define XDDR_XMPU3_CFG_R09    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU3_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10Strt
+ */
+#define XDDR_XMPU3_CFG_R10_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU3_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10End
+ */
+#define XDDR_XMPU3_CFG_R10_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU3_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10Mstr
+ */
+#define XDDR_XMPU3_CFG_R10_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU3_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10
+ */
+#define XDDR_XMPU3_CFG_R10    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU3_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11Strt
+ */
+#define XDDR_XMPU3_CFG_R11_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU3_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11End
+ */
+#define XDDR_XMPU3_CFG_R11_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU3_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11Mstr
+ */
+#define XDDR_XMPU3_CFG_R11_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU3_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11
+ */
+#define XDDR_XMPU3_CFG_R11    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU3_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12Strt
+ */
+#define XDDR_XMPU3_CFG_R12_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU3_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12End
+ */
+#define XDDR_XMPU3_CFG_R12_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU3_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12Mstr
+ */
+#define XDDR_XMPU3_CFG_R12_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU3_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12
+ */
+#define XDDR_XMPU3_CFG_R12    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU3_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13Strt
+ */
+#define XDDR_XMPU3_CFG_R13_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU3_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13End
+ */
+#define XDDR_XMPU3_CFG_R13_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU3_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13Mstr
+ */
+#define XDDR_XMPU3_CFG_R13_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU3_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13
+ */
+#define XDDR_XMPU3_CFG_R13    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU3_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14Strt
+ */
+#define XDDR_XMPU3_CFG_R14_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU3_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14End
+ */
+#define XDDR_XMPU3_CFG_R14_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU3_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14Mstr
+ */
+#define XDDR_XMPU3_CFG_R14_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU3_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14
+ */
+#define XDDR_XMPU3_CFG_R14    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU3_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15Strt
+ */
+#define XDDR_XMPU3_CFG_R15_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU3_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15End
+ */
+#define XDDR_XMPU3_CFG_R15_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU3_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15Mstr
+ */
+#define XDDR_XMPU3_CFG_R15_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU3_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15
+ */
+#define XDDR_XMPU3_CFG_R15    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU3_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU3_CFG_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu4_cfg.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu4_cfg.h
new file mode 100644
index 0000000..2df8144
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu4_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU4_CFG_H__
+#define __XDDR_XMPU4_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu4Cfg Base Address
+ */
+#define XDDR_XMPU4_CFG_BASEADDR      0xFD040000UL
+
+/**
+ * Register: XddrXmpu4CfgCtrl
+ */
+#define XDDR_XMPU4_CFG_CTRL    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU4_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu4CfgErrSts1
+ */
+#define XDDR_XMPU4_CFG_ERR_STS1    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU4_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgErrSts2
+ */
+#define XDDR_XMPU4_CFG_ERR_STS2    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU4_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgPoison
+ */
+#define XDDR_XMPU4_CFG_POISON    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU4_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU4_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU4_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU4_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgIsr
+ */
+#define XDDR_XMPU4_CFG_ISR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU4_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgImr
+ */
+#define XDDR_XMPU4_CFG_IMR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU4_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu4CfgIen
+ */
+#define XDDR_XMPU4_CFG_IEN    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU4_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgIds
+ */
+#define XDDR_XMPU4_CFG_IDS    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU4_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgLock
+ */
+#define XDDR_XMPU4_CFG_LOCK    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU4_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00Strt
+ */
+#define XDDR_XMPU4_CFG_R00_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU4_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00End
+ */
+#define XDDR_XMPU4_CFG_R00_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU4_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00Mstr
+ */
+#define XDDR_XMPU4_CFG_R00_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU4_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00
+ */
+#define XDDR_XMPU4_CFG_R00    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU4_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01Strt
+ */
+#define XDDR_XMPU4_CFG_R01_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU4_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01End
+ */
+#define XDDR_XMPU4_CFG_R01_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU4_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01Mstr
+ */
+#define XDDR_XMPU4_CFG_R01_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU4_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01
+ */
+#define XDDR_XMPU4_CFG_R01    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU4_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02Strt
+ */
+#define XDDR_XMPU4_CFG_R02_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU4_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02End
+ */
+#define XDDR_XMPU4_CFG_R02_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU4_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02Mstr
+ */
+#define XDDR_XMPU4_CFG_R02_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU4_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02
+ */
+#define XDDR_XMPU4_CFG_R02    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU4_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03Strt
+ */
+#define XDDR_XMPU4_CFG_R03_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU4_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03End
+ */
+#define XDDR_XMPU4_CFG_R03_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU4_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03Mstr
+ */
+#define XDDR_XMPU4_CFG_R03_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU4_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03
+ */
+#define XDDR_XMPU4_CFG_R03    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU4_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04Strt
+ */
+#define XDDR_XMPU4_CFG_R04_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU4_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04End
+ */
+#define XDDR_XMPU4_CFG_R04_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU4_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04Mstr
+ */
+#define XDDR_XMPU4_CFG_R04_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU4_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04
+ */
+#define XDDR_XMPU4_CFG_R04    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU4_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05Strt
+ */
+#define XDDR_XMPU4_CFG_R05_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU4_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05End
+ */
+#define XDDR_XMPU4_CFG_R05_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU4_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05Mstr
+ */
+#define XDDR_XMPU4_CFG_R05_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU4_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05
+ */
+#define XDDR_XMPU4_CFG_R05    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU4_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06Strt
+ */
+#define XDDR_XMPU4_CFG_R06_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU4_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06End
+ */
+#define XDDR_XMPU4_CFG_R06_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU4_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06Mstr
+ */
+#define XDDR_XMPU4_CFG_R06_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU4_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06
+ */
+#define XDDR_XMPU4_CFG_R06    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU4_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07Strt
+ */
+#define XDDR_XMPU4_CFG_R07_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU4_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07End
+ */
+#define XDDR_XMPU4_CFG_R07_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU4_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07Mstr
+ */
+#define XDDR_XMPU4_CFG_R07_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU4_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07
+ */
+#define XDDR_XMPU4_CFG_R07    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU4_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08Strt
+ */
+#define XDDR_XMPU4_CFG_R08_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU4_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08End
+ */
+#define XDDR_XMPU4_CFG_R08_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU4_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08Mstr
+ */
+#define XDDR_XMPU4_CFG_R08_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU4_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08
+ */
+#define XDDR_XMPU4_CFG_R08    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU4_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09Strt
+ */
+#define XDDR_XMPU4_CFG_R09_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU4_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09End
+ */
+#define XDDR_XMPU4_CFG_R09_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU4_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09Mstr
+ */
+#define XDDR_XMPU4_CFG_R09_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU4_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09
+ */
+#define XDDR_XMPU4_CFG_R09    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU4_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10Strt
+ */
+#define XDDR_XMPU4_CFG_R10_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU4_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10End
+ */
+#define XDDR_XMPU4_CFG_R10_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU4_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10Mstr
+ */
+#define XDDR_XMPU4_CFG_R10_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU4_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10
+ */
+#define XDDR_XMPU4_CFG_R10    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU4_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11Strt
+ */
+#define XDDR_XMPU4_CFG_R11_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU4_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11End
+ */
+#define XDDR_XMPU4_CFG_R11_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU4_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11Mstr
+ */
+#define XDDR_XMPU4_CFG_R11_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU4_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11
+ */
+#define XDDR_XMPU4_CFG_R11    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU4_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12Strt
+ */
+#define XDDR_XMPU4_CFG_R12_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU4_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12End
+ */
+#define XDDR_XMPU4_CFG_R12_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU4_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12Mstr
+ */
+#define XDDR_XMPU4_CFG_R12_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU4_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12
+ */
+#define XDDR_XMPU4_CFG_R12    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU4_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13Strt
+ */
+#define XDDR_XMPU4_CFG_R13_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU4_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13End
+ */
+#define XDDR_XMPU4_CFG_R13_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU4_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13Mstr
+ */
+#define XDDR_XMPU4_CFG_R13_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU4_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13
+ */
+#define XDDR_XMPU4_CFG_R13    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU4_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14Strt
+ */
+#define XDDR_XMPU4_CFG_R14_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU4_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14End
+ */
+#define XDDR_XMPU4_CFG_R14_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU4_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14Mstr
+ */
+#define XDDR_XMPU4_CFG_R14_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU4_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14
+ */
+#define XDDR_XMPU4_CFG_R14    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU4_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15Strt
+ */
+#define XDDR_XMPU4_CFG_R15_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU4_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15End
+ */
+#define XDDR_XMPU4_CFG_R15_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU4_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15Mstr
+ */
+#define XDDR_XMPU4_CFG_R15_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU4_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15
+ */
+#define XDDR_XMPU4_CFG_R15    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU4_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU4_CFG_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu5_cfg.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu5_cfg.h
new file mode 100644
index 0000000..6081171
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xddr_xmpu5_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU5_CFG_H__
+#define __XDDR_XMPU5_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu5Cfg Base Address
+ */
+#define XDDR_XMPU5_CFG_BASEADDR      0xFD050000UL
+
+/**
+ * Register: XddrXmpu5CfgCtrl
+ */
+#define XDDR_XMPU5_CFG_CTRL    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU5_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu5CfgErrSts1
+ */
+#define XDDR_XMPU5_CFG_ERR_STS1    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU5_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgErrSts2
+ */
+#define XDDR_XMPU5_CFG_ERR_STS2    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU5_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgPoison
+ */
+#define XDDR_XMPU5_CFG_POISON    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU5_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU5_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU5_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU5_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgIsr
+ */
+#define XDDR_XMPU5_CFG_ISR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU5_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgImr
+ */
+#define XDDR_XMPU5_CFG_IMR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU5_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu5CfgIen
+ */
+#define XDDR_XMPU5_CFG_IEN    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU5_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgIds
+ */
+#define XDDR_XMPU5_CFG_IDS    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU5_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgLock
+ */
+#define XDDR_XMPU5_CFG_LOCK    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU5_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00Strt
+ */
+#define XDDR_XMPU5_CFG_R00_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU5_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00End
+ */
+#define XDDR_XMPU5_CFG_R00_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU5_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00Mstr
+ */
+#define XDDR_XMPU5_CFG_R00_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU5_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00
+ */
+#define XDDR_XMPU5_CFG_R00    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU5_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01Strt
+ */
+#define XDDR_XMPU5_CFG_R01_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU5_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01End
+ */
+#define XDDR_XMPU5_CFG_R01_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU5_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01Mstr
+ */
+#define XDDR_XMPU5_CFG_R01_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU5_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01
+ */
+#define XDDR_XMPU5_CFG_R01    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU5_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02Strt
+ */
+#define XDDR_XMPU5_CFG_R02_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU5_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02End
+ */
+#define XDDR_XMPU5_CFG_R02_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU5_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02Mstr
+ */
+#define XDDR_XMPU5_CFG_R02_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU5_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02
+ */
+#define XDDR_XMPU5_CFG_R02    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU5_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03Strt
+ */
+#define XDDR_XMPU5_CFG_R03_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU5_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03End
+ */
+#define XDDR_XMPU5_CFG_R03_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU5_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03Mstr
+ */
+#define XDDR_XMPU5_CFG_R03_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU5_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03
+ */
+#define XDDR_XMPU5_CFG_R03    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU5_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04Strt
+ */
+#define XDDR_XMPU5_CFG_R04_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU5_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04End
+ */
+#define XDDR_XMPU5_CFG_R04_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU5_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04Mstr
+ */
+#define XDDR_XMPU5_CFG_R04_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU5_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04
+ */
+#define XDDR_XMPU5_CFG_R04    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU5_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05Strt
+ */
+#define XDDR_XMPU5_CFG_R05_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU5_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05End
+ */
+#define XDDR_XMPU5_CFG_R05_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU5_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05Mstr
+ */
+#define XDDR_XMPU5_CFG_R05_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU5_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05
+ */
+#define XDDR_XMPU5_CFG_R05    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU5_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06Strt
+ */
+#define XDDR_XMPU5_CFG_R06_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU5_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06End
+ */
+#define XDDR_XMPU5_CFG_R06_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU5_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06Mstr
+ */
+#define XDDR_XMPU5_CFG_R06_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU5_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06
+ */
+#define XDDR_XMPU5_CFG_R06    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU5_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07Strt
+ */
+#define XDDR_XMPU5_CFG_R07_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU5_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07End
+ */
+#define XDDR_XMPU5_CFG_R07_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU5_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07Mstr
+ */
+#define XDDR_XMPU5_CFG_R07_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU5_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07
+ */
+#define XDDR_XMPU5_CFG_R07    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU5_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08Strt
+ */
+#define XDDR_XMPU5_CFG_R08_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU5_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08End
+ */
+#define XDDR_XMPU5_CFG_R08_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU5_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08Mstr
+ */
+#define XDDR_XMPU5_CFG_R08_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU5_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08
+ */
+#define XDDR_XMPU5_CFG_R08    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU5_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09Strt
+ */
+#define XDDR_XMPU5_CFG_R09_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU5_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09End
+ */
+#define XDDR_XMPU5_CFG_R09_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU5_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09Mstr
+ */
+#define XDDR_XMPU5_CFG_R09_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU5_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09
+ */
+#define XDDR_XMPU5_CFG_R09    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU5_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10Strt
+ */
+#define XDDR_XMPU5_CFG_R10_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU5_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10End
+ */
+#define XDDR_XMPU5_CFG_R10_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU5_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10Mstr
+ */
+#define XDDR_XMPU5_CFG_R10_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU5_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10
+ */
+#define XDDR_XMPU5_CFG_R10    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU5_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11Strt
+ */
+#define XDDR_XMPU5_CFG_R11_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU5_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11End
+ */
+#define XDDR_XMPU5_CFG_R11_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU5_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11Mstr
+ */
+#define XDDR_XMPU5_CFG_R11_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU5_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11
+ */
+#define XDDR_XMPU5_CFG_R11    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU5_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12Strt
+ */
+#define XDDR_XMPU5_CFG_R12_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU5_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12End
+ */
+#define XDDR_XMPU5_CFG_R12_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU5_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12Mstr
+ */
+#define XDDR_XMPU5_CFG_R12_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU5_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12
+ */
+#define XDDR_XMPU5_CFG_R12    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU5_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13Strt
+ */
+#define XDDR_XMPU5_CFG_R13_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU5_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13End
+ */
+#define XDDR_XMPU5_CFG_R13_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU5_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13Mstr
+ */
+#define XDDR_XMPU5_CFG_R13_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU5_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13
+ */
+#define XDDR_XMPU5_CFG_R13    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU5_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14Strt
+ */
+#define XDDR_XMPU5_CFG_R14_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU5_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14End
+ */
+#define XDDR_XMPU5_CFG_R14_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU5_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14Mstr
+ */
+#define XDDR_XMPU5_CFG_R14_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU5_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14
+ */
+#define XDDR_XMPU5_CFG_R14    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU5_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15Strt
+ */
+#define XDDR_XMPU5_CFG_R15_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU5_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15End
+ */
+#define XDDR_XMPU5_CFG_R15_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU5_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15Mstr
+ */
+#define XDDR_XMPU5_CFG_R15_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU5_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15
+ */
+#define XDDR_XMPU5_CFG_R15    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU5_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU5_CFG_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_slcr.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_slcr.h
new file mode 100644
index 0000000..b565b95
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_slcr.h
@@ -0,0 +1,382 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_SLCR_H__
+#define __XFPD_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdSlcr Base Address
+ */
+#define XFPD_SLCR_BASEADDR      0xFD610000UL
+
+/**
+ * Register: XfpdSlcrWprot0
+ */
+#define XFPD_SLCR_WPROT0    ( ( XFPD_SLCR_BASEADDR ) + 0x00000000UL )
+#define XFPD_SLCR_WPROT0_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_WPROT0_ACT_SHIFT   0UL
+#define XFPD_SLCR_WPROT0_ACT_WIDTH   1UL
+#define XFPD_SLCR_WPROT0_ACT_MASK    0x00000001UL
+#define XFPD_SLCR_WPROT0_ACT_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrCtrl
+ */
+#define XFPD_SLCR_CTRL    ( ( XFPD_SLCR_BASEADDR ) + 0x00000004UL )
+#define XFPD_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIsr
+ */
+#define XFPD_SLCR_ISR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000008UL )
+#define XFPD_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrImr
+ */
+#define XFPD_SLCR_IMR    ( ( XFPD_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XFPD_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrIer
+ */
+#define XFPD_SLCR_IER    ( ( XFPD_SLCR_BASEADDR ) + 0x00000010UL )
+#define XFPD_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIdr
+ */
+#define XFPD_SLCR_IDR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000014UL )
+#define XFPD_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrItr
+ */
+#define XFPD_SLCR_ITR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000018UL )
+#define XFPD_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrWdtClkSel
+ */
+#define XFPD_SLCR_WDT_CLK_SEL    ( ( XFPD_SLCR_BASEADDR ) + 0x00000100UL )
+#define XFPD_SLCR_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_WDT_CLK_SEL_SHIFT   0UL
+#define XFPD_SLCR_WDT_CLK_SEL_WIDTH   1UL
+#define XFPD_SLCR_WDT_CLK_SEL_MASK    0x00000001UL
+#define XFPD_SLCR_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIntFpd
+ */
+#define XFPD_SLCR_INT_FPD    ( ( XFPD_SLCR_BASEADDR ) + 0x00000200UL )
+#define XFPD_SLCR_INT_FPD_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_INT_FPD_GFM_SEL_SHIFT   0UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_WIDTH   1UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_MASK    0x00000001UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrGpu
+ */
+#define XFPD_SLCR_GPU    ( ( XFPD_SLCR_BASEADDR ) + 0x0000100CUL )
+#define XFPD_SLCR_GPU_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_GPU_ARCACHE_SHIFT   7UL
+#define XFPD_SLCR_GPU_ARCACHE_WIDTH   4UL
+#define XFPD_SLCR_GPU_ARCACHE_MASK    0x00000780UL
+#define XFPD_SLCR_GPU_ARCACHE_DEFVAL  0x0UL
+
+#define XFPD_SLCR_GPU_AWCACHE_SHIFT   3UL
+#define XFPD_SLCR_GPU_AWCACHE_WIDTH   4UL
+#define XFPD_SLCR_GPU_AWCACHE_MASK    0x00000078UL
+#define XFPD_SLCR_GPU_AWCACHE_DEFVAL  0x0UL
+
+#define XFPD_SLCR_GPU_PP1_IDLE_SHIFT   2UL
+#define XFPD_SLCR_GPU_PP1_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_PP1_IDLE_MASK    0x00000004UL
+#define XFPD_SLCR_GPU_PP1_IDLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GPU_PP0_IDLE_SHIFT   1UL
+#define XFPD_SLCR_GPU_PP0_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_PP0_IDLE_MASK    0x00000002UL
+#define XFPD_SLCR_GPU_PP0_IDLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GPU_IDLE_SHIFT   0UL
+#define XFPD_SLCR_GPU_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_IDLE_MASK    0x00000001UL
+#define XFPD_SLCR_GPU_IDLE_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrGdmaCfg
+ */
+#define XFPD_SLCR_GDMA_CFG    ( ( XFPD_SLCR_BASEADDR ) + 0x00003000UL )
+#define XFPD_SLCR_GDMA_CFG_RSTVAL   0x00000048UL
+
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_SHIFT   5UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_WIDTH   2UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_MASK    0x00000060UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_DEFVAL  0x2UL
+
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_SHIFT   0UL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_WIDTH   5UL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_MASK    0x0000001fUL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_DEFVAL  0x8UL
+
+/**
+ * Register: XfpdSlcrGdma
+ */
+#define XFPD_SLCR_GDMA    ( ( XFPD_SLCR_BASEADDR ) + 0x00003010UL )
+#define XFPD_SLCR_GDMA_RSTVAL   0x00003b3bUL
+
+#define XFPD_SLCR_GDMA_RAM1_EMAB_SHIFT   12UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_MASK    0x00007000UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM1_EMASA_SHIFT   11UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_WIDTH   1UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_MASK    0x00000800UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GDMA_RAM1_EMAA_SHIFT   8UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_MASK    0x00000700UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMAB_SHIFT   4UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_MASK    0x00000070UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMASA_SHIFT   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_WIDTH   1UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_MASK    0x00000008UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMAA_SHIFT   0UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_MASK    0x00000007UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_DEFVAL  0x3UL
+
+/**
+ * Register: XfpdSlcrAfiFs
+ */
+#define XFPD_SLCR_AFI_FS    ( ( XFPD_SLCR_BASEADDR ) + 0x00005000UL )
+#define XFPD_SLCR_AFI_FS_RSTVAL   0x00000a00UL
+
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_SHIFT   10UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_WIDTH   2UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_MASK    0x00000c00UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_DEFVAL  0x2UL
+
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_SHIFT   8UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_WIDTH   2UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_MASK    0x00000300UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_DEFVAL  0x2UL
+
+/**
+ * Register: XfpdSlcrErrAtbIsr
+ */
+#define XFPD_SLCR_ERR_ATB_ISR    ( ( XFPD_SLCR_BASEADDR ) + 0x00006000UL )
+#define XFPD_SLCR_ERR_ATB_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrErrAtbImr
+ */
+#define XFPD_SLCR_ERR_ATB_IMR    ( ( XFPD_SLCR_BASEADDR ) + 0x00006004UL )
+#define XFPD_SLCR_ERR_ATB_IMR_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrErrAtbIer
+ */
+#define XFPD_SLCR_ERR_ATB_IER    ( ( XFPD_SLCR_BASEADDR ) + 0x00006008UL )
+#define XFPD_SLCR_ERR_ATB_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrErrAtbIdr
+ */
+#define XFPD_SLCR_ERR_ATB_IDR    ( ( XFPD_SLCR_BASEADDR ) + 0x0000600CUL )
+#define XFPD_SLCR_ERR_ATB_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrAtbCmdstore
+ */
+#define XFPD_SLCR_ATB_CMDSTORE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006010UL )
+#define XFPD_SLCR_ATB_CMDSTORE_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrAtbRespEn
+ */
+#define XFPD_SLCR_ATB_RESP_EN    ( ( XFPD_SLCR_BASEADDR ) + 0x00006014UL )
+#define XFPD_SLCR_ATB_RESP_EN_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrAtbResptype
+ */
+#define XFPD_SLCR_ATB_RESPTYPE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006018UL )
+#define XFPD_SLCR_ATB_RESPTYPE_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrAtbPrescale
+ */
+#define XFPD_SLCR_ATB_PRESCALE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006020UL )
+#define XFPD_SLCR_ATB_PRESCALE_RSTVAL   0x0000ffffUL
+
+#define XFPD_SLCR_ATB_PRESCALE_EN_SHIFT   16UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_WIDTH   1UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_MASK    0x00010000UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_PRESCALE_VAL_SHIFT   0UL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_WIDTH   16UL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_MASK    0x0000ffffUL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_DEFVAL  0xffffUL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_SLCR_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_slcr_secure.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_slcr_secure.h
new file mode 100644
index 0000000..6541a4f
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_slcr_secure.h
@@ -0,0 +1,277 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_SLCR_SECURE_H__
+#define __XFPD_SLCR_SECURE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdSlcrSecure Base Address
+ */
+#define XFPD_SLCR_SECURE_BASEADDR      0xFD690000UL
+
+/**
+ * Register: XfpdSlcrSecCtrl
+ */
+#define XFPD_SLCR_SEC_CTRL    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000004UL )
+#define XFPD_SLCR_SEC_CTRL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_SHIFT   0UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_WIDTH   1UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecIsr
+ */
+#define XFPD_SLCR_SEC_ISR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000008UL )
+#define XFPD_SLCR_SEC_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecImr
+ */
+#define XFPD_SLCR_SEC_IMR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x0000000CUL )
+#define XFPD_SLCR_SEC_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecIer
+ */
+#define XFPD_SLCR_SEC_IER    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000010UL )
+#define XFPD_SLCR_SEC_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecIdr
+ */
+#define XFPD_SLCR_SEC_IDR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000014UL )
+#define XFPD_SLCR_SEC_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecItr
+ */
+#define XFPD_SLCR_SEC_ITR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000018UL )
+#define XFPD_SLCR_SEC_ITR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecSata
+ */
+#define XFPD_SLCR_SEC_SATA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000020UL )
+#define XFPD_SLCR_SEC_SATA_RSTVAL   0x0000000eUL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_SHIFT   3UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_MASK    0x00000008UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_SHIFT   2UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_MASK    0x00000004UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_SHIFT   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_MASK    0x00000002UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_EN_SHIFT   0UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecPcie
+ */
+#define XFPD_SLCR_SEC_PCIE    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000030UL )
+#define XFPD_SLCR_SEC_PCIE_RSTVAL   0x01ffffffUL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_SHIFT   24UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_MASK    0x01000000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_SHIFT   23UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_MASK    0x00800000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_SHIFT   22UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_MASK    0x00400000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_SHIFT   21UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_MASK    0x00200000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_SHIFT   20UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_MASK    0x00100000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_SHIFT   19UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_MASK    0x00080000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_SHIFT   18UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_MASK    0x00040000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_SHIFT   17UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_MASK    0x00020000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_SHIFT   16UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_MASK    0x00010000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_SHIFT   15UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_MASK    0x00008000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_SHIFT   14UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_MASK    0x00004000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_SHIFT   13UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_MASK    0x00002000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_SHIFT   12UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_MASK    0x00001000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_SHIFT   11UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_MASK    0x00000800UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_SHIFT   10UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_MASK    0x00000400UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_SHIFT   9UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_MASK    0x00000200UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_SHIFT   8UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_MASK    0x00000100UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_SHIFT   7UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_MASK    0x00000080UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_SHIFT   6UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_MASK    0x00000040UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_SHIFT   5UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_MASK    0x00000020UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_SHIFT   4UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_MASK    0x00000010UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_SHIFT   3UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_MASK    0x00000008UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_SHIFT   2UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_MASK    0x00000004UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_SHIFT   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_MASK    0x00000002UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_SHIFT   0UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecDpdma
+ */
+#define XFPD_SLCR_SEC_DPDMA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000040UL )
+#define XFPD_SLCR_SEC_DPDMA_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_SEC_DPDMA_TZ_SHIFT   0UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_WIDTH   1UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecGdma
+ */
+#define XFPD_SLCR_SEC_GDMA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000050UL )
+#define XFPD_SLCR_SEC_GDMA_RSTVAL   0x000000ffUL
+
+#define XFPD_SLCR_SEC_GDMA_TZ_SHIFT   0UL
+#define XFPD_SLCR_SEC_GDMA_TZ_WIDTH   8UL
+#define XFPD_SLCR_SEC_GDMA_TZ_MASK    0x000000ffUL
+#define XFPD_SLCR_SEC_GDMA_TZ_DEFVAL  0xffUL
+
+/**
+ * Register: XfpdSlcrSecGic
+ */
+#define XFPD_SLCR_SEC_GIC    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000060UL )
+#define XFPD_SLCR_SEC_GIC_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_SHIFT   0UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_WIDTH   1UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_SLCR_SECURE_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_xmpu_cfg.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_xmpu_cfg.h
new file mode 100644
index 0000000..75aef19
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_xmpu_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_XMPU_CFG_H__
+#define __XFPD_XMPU_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdXmpuCfg Base Address
+ */
+#define XFPD_XMPU_CFG_BASEADDR      0xFD5D0000UL
+
+/**
+ * Register: XfpdXmpuCfgCtrl
+ */
+#define XFPD_XMPU_CFG_CTRL    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000000UL )
+#define XFPD_XMPU_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuCfgErrSts1
+ */
+#define XFPD_XMPU_CFG_ERR_STS1    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000004UL )
+#define XFPD_XMPU_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgErrSts2
+ */
+#define XFPD_XMPU_CFG_ERR_STS2    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000008UL )
+#define XFPD_XMPU_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgPoison
+ */
+#define XFPD_XMPU_CFG_POISON    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000000CUL )
+#define XFPD_XMPU_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_POISON_BASE_SHIFT   0UL
+#define XFPD_XMPU_CFG_POISON_BASE_WIDTH   20UL
+#define XFPD_XMPU_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XFPD_XMPU_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgIsr
+ */
+#define XFPD_XMPU_CFG_ISR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000010UL )
+#define XFPD_XMPU_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgImr
+ */
+#define XFPD_XMPU_CFG_IMR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000014UL )
+#define XFPD_XMPU_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuCfgIen
+ */
+#define XFPD_XMPU_CFG_IEN    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000018UL )
+#define XFPD_XMPU_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgIds
+ */
+#define XFPD_XMPU_CFG_IDS    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000001CUL )
+#define XFPD_XMPU_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgLock
+ */
+#define XFPD_XMPU_CFG_LOCK    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000020UL )
+#define XFPD_XMPU_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00Strt
+ */
+#define XFPD_XMPU_CFG_R00_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000100UL )
+#define XFPD_XMPU_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00End
+ */
+#define XFPD_XMPU_CFG_R00_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000104UL )
+#define XFPD_XMPU_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00Mstr
+ */
+#define XFPD_XMPU_CFG_R00_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000108UL )
+#define XFPD_XMPU_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00
+ */
+#define XFPD_XMPU_CFG_R00    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000010CUL )
+#define XFPD_XMPU_CFG_R00_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R00_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R00_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R00_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R00_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01Strt
+ */
+#define XFPD_XMPU_CFG_R01_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000110UL )
+#define XFPD_XMPU_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01End
+ */
+#define XFPD_XMPU_CFG_R01_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000114UL )
+#define XFPD_XMPU_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01Mstr
+ */
+#define XFPD_XMPU_CFG_R01_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000118UL )
+#define XFPD_XMPU_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01
+ */
+#define XFPD_XMPU_CFG_R01    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000011CUL )
+#define XFPD_XMPU_CFG_R01_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R01_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R01_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R01_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R01_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02Strt
+ */
+#define XFPD_XMPU_CFG_R02_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000120UL )
+#define XFPD_XMPU_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02End
+ */
+#define XFPD_XMPU_CFG_R02_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000124UL )
+#define XFPD_XMPU_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02Mstr
+ */
+#define XFPD_XMPU_CFG_R02_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000128UL )
+#define XFPD_XMPU_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02
+ */
+#define XFPD_XMPU_CFG_R02    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000012CUL )
+#define XFPD_XMPU_CFG_R02_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R02_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R02_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R02_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R02_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03Strt
+ */
+#define XFPD_XMPU_CFG_R03_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000130UL )
+#define XFPD_XMPU_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03End
+ */
+#define XFPD_XMPU_CFG_R03_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000134UL )
+#define XFPD_XMPU_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03Mstr
+ */
+#define XFPD_XMPU_CFG_R03_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000138UL )
+#define XFPD_XMPU_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03
+ */
+#define XFPD_XMPU_CFG_R03    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000013CUL )
+#define XFPD_XMPU_CFG_R03_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R03_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R03_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R03_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R03_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04Strt
+ */
+#define XFPD_XMPU_CFG_R04_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000140UL )
+#define XFPD_XMPU_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04End
+ */
+#define XFPD_XMPU_CFG_R04_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000144UL )
+#define XFPD_XMPU_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04Mstr
+ */
+#define XFPD_XMPU_CFG_R04_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000148UL )
+#define XFPD_XMPU_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04
+ */
+#define XFPD_XMPU_CFG_R04    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000014CUL )
+#define XFPD_XMPU_CFG_R04_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R04_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R04_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R04_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R04_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05Strt
+ */
+#define XFPD_XMPU_CFG_R05_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000150UL )
+#define XFPD_XMPU_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05End
+ */
+#define XFPD_XMPU_CFG_R05_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000154UL )
+#define XFPD_XMPU_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05Mstr
+ */
+#define XFPD_XMPU_CFG_R05_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000158UL )
+#define XFPD_XMPU_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05
+ */
+#define XFPD_XMPU_CFG_R05    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000015CUL )
+#define XFPD_XMPU_CFG_R05_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R05_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R05_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R05_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R05_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06Strt
+ */
+#define XFPD_XMPU_CFG_R06_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000160UL )
+#define XFPD_XMPU_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06End
+ */
+#define XFPD_XMPU_CFG_R06_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000164UL )
+#define XFPD_XMPU_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06Mstr
+ */
+#define XFPD_XMPU_CFG_R06_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000168UL )
+#define XFPD_XMPU_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06
+ */
+#define XFPD_XMPU_CFG_R06    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000016CUL )
+#define XFPD_XMPU_CFG_R06_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R06_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R06_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R06_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R06_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07Strt
+ */
+#define XFPD_XMPU_CFG_R07_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000170UL )
+#define XFPD_XMPU_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07End
+ */
+#define XFPD_XMPU_CFG_R07_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000174UL )
+#define XFPD_XMPU_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07Mstr
+ */
+#define XFPD_XMPU_CFG_R07_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000178UL )
+#define XFPD_XMPU_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07
+ */
+#define XFPD_XMPU_CFG_R07    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000017CUL )
+#define XFPD_XMPU_CFG_R07_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R07_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R07_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R07_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R07_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08Strt
+ */
+#define XFPD_XMPU_CFG_R08_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000180UL )
+#define XFPD_XMPU_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08End
+ */
+#define XFPD_XMPU_CFG_R08_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000184UL )
+#define XFPD_XMPU_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08Mstr
+ */
+#define XFPD_XMPU_CFG_R08_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000188UL )
+#define XFPD_XMPU_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08
+ */
+#define XFPD_XMPU_CFG_R08    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000018CUL )
+#define XFPD_XMPU_CFG_R08_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R08_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R08_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R08_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R08_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09Strt
+ */
+#define XFPD_XMPU_CFG_R09_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000190UL )
+#define XFPD_XMPU_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09End
+ */
+#define XFPD_XMPU_CFG_R09_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000194UL )
+#define XFPD_XMPU_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09Mstr
+ */
+#define XFPD_XMPU_CFG_R09_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000198UL )
+#define XFPD_XMPU_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09
+ */
+#define XFPD_XMPU_CFG_R09    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000019CUL )
+#define XFPD_XMPU_CFG_R09_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R09_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R09_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R09_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R09_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10Strt
+ */
+#define XFPD_XMPU_CFG_R10_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A0UL )
+#define XFPD_XMPU_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10End
+ */
+#define XFPD_XMPU_CFG_R10_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A4UL )
+#define XFPD_XMPU_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10Mstr
+ */
+#define XFPD_XMPU_CFG_R10_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A8UL )
+#define XFPD_XMPU_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10
+ */
+#define XFPD_XMPU_CFG_R10    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001ACUL )
+#define XFPD_XMPU_CFG_R10_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R10_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R10_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R10_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R10_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11Strt
+ */
+#define XFPD_XMPU_CFG_R11_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B0UL )
+#define XFPD_XMPU_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11End
+ */
+#define XFPD_XMPU_CFG_R11_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B4UL )
+#define XFPD_XMPU_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11Mstr
+ */
+#define XFPD_XMPU_CFG_R11_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B8UL )
+#define XFPD_XMPU_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11
+ */
+#define XFPD_XMPU_CFG_R11    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001BCUL )
+#define XFPD_XMPU_CFG_R11_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R11_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R11_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R11_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R11_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12Strt
+ */
+#define XFPD_XMPU_CFG_R12_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C0UL )
+#define XFPD_XMPU_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12End
+ */
+#define XFPD_XMPU_CFG_R12_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C4UL )
+#define XFPD_XMPU_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12Mstr
+ */
+#define XFPD_XMPU_CFG_R12_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C8UL )
+#define XFPD_XMPU_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12
+ */
+#define XFPD_XMPU_CFG_R12    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001CCUL )
+#define XFPD_XMPU_CFG_R12_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R12_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R12_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R12_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R12_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13Strt
+ */
+#define XFPD_XMPU_CFG_R13_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D0UL )
+#define XFPD_XMPU_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13End
+ */
+#define XFPD_XMPU_CFG_R13_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D4UL )
+#define XFPD_XMPU_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13Mstr
+ */
+#define XFPD_XMPU_CFG_R13_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D8UL )
+#define XFPD_XMPU_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13
+ */
+#define XFPD_XMPU_CFG_R13    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001DCUL )
+#define XFPD_XMPU_CFG_R13_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R13_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R13_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R13_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R13_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14Strt
+ */
+#define XFPD_XMPU_CFG_R14_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E0UL )
+#define XFPD_XMPU_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14End
+ */
+#define XFPD_XMPU_CFG_R14_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E4UL )
+#define XFPD_XMPU_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14Mstr
+ */
+#define XFPD_XMPU_CFG_R14_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E8UL )
+#define XFPD_XMPU_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14
+ */
+#define XFPD_XMPU_CFG_R14    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001ECUL )
+#define XFPD_XMPU_CFG_R14_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R14_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R14_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R14_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R14_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15Strt
+ */
+#define XFPD_XMPU_CFG_R15_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F0UL )
+#define XFPD_XMPU_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15End
+ */
+#define XFPD_XMPU_CFG_R15_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F4UL )
+#define XFPD_XMPU_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15Mstr
+ */
+#define XFPD_XMPU_CFG_R15_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F8UL )
+#define XFPD_XMPU_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15
+ */
+#define XFPD_XMPU_CFG_R15    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001FCUL )
+#define XFPD_XMPU_CFG_R15_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R15_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R15_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R15_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R15_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_XMPU_CFG_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_xmpu_sink.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_xmpu_sink.h
new file mode 100644
index 0000000..39172f1
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xfpd_xmpu_sink.h
@@ -0,0 +1,81 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_XMPU_SINK_H__
+#define __XFPD_XMPU_SINK_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdXmpuSink Base Address
+ */
+#define XFPD_XMPU_SINK_BASEADDR      0xFD4F0000UL
+
+/**
+ * Register: XfpdXmpuSinkErrSts
+ */
+#define XFPD_XMPU_SINK_ERR_STS    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF00UL )
+#define XFPD_XMPU_SINK_ERR_STS_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_SHIFT   31UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_WIDTH   1UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_MASK    0x80000000UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_DEFVAL  0x0UL
+
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_SHIFT   0UL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_WIDTH   12UL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_MASK    0x00000fffUL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkIsr
+ */
+#define XFPD_XMPU_SINK_ISR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF10UL )
+#define XFPD_XMPU_SINK_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkImr
+ */
+#define XFPD_XMPU_SINK_IMR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF14UL )
+#define XFPD_XMPU_SINK_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuSinkIer
+ */
+#define XFPD_XMPU_SINK_IER    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF18UL )
+#define XFPD_XMPU_SINK_IER_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_IERADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkIdr
+ */
+#define XFPD_XMPU_SINK_IDR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF1CUL )
+#define XFPD_XMPU_SINK_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_XMPU_SINK_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xiou_secure_slcr.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xiou_secure_slcr.h
new file mode 100644
index 0000000..cb4ad49
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xiou_secure_slcr.h
@@ -0,0 +1,174 @@
+/* ### HEADER ### */
+
+#ifndef __XIOU_SECURE_SLCR_H__
+#define __XIOU_SECURE_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XiouSecureSlcr Base Address
+ */
+#define XIOU_SECURE_SLCR_BASEADDR      0xFF240000UL
+
+/**
+ * Register: XiouSecSlcrAxiWprtcn
+ */
+#define XIOU_SEC_SLCR_AXI_WPRTCN    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000000UL )
+#define XIOU_SEC_SLCR_AXI_WPRTCN_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_SHIFT   25UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_MASK    0x0e000000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_SHIFT   22UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_MASK    0x01c00000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_SHIFT   19UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_MASK    0x00380000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_SHIFT   16UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_MASK    0x00070000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   9UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000e00UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   6UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x000001c0UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000038UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   0UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000007UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrAxiRprtcn
+ */
+#define XIOU_SEC_SLCR_AXI_RPRTCN    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000004UL )
+#define XIOU_SEC_SLCR_AXI_RPRTCN_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_SHIFT   22UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_MASK    0x01c00000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_SHIFT   19UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_MASK    0x00380000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_SHIFT   16UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_MASK    0x00070000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   9UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000e00UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   6UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x000001c0UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000038UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   0UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000007UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrCtrl
+ */
+#define XIOU_SEC_SLCR_CTRL    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000040UL )
+#define XIOU_SEC_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrIsr
+ */
+#define XIOU_SEC_SLCR_ISR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000044UL )
+#define XIOU_SEC_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrImr
+ */
+#define XIOU_SEC_SLCR_IMR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000048UL )
+#define XIOU_SEC_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSecSlcrIer
+ */
+#define XIOU_SEC_SLCR_IER    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XIOU_SEC_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrIdr
+ */
+#define XIOU_SEC_SLCR_IDR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000050UL )
+#define XIOU_SEC_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrItr
+ */
+#define XIOU_SEC_SLCR_ITR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000054UL )
+#define XIOU_SEC_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XIOU_SECURE_SLCR_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xiou_slcr.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xiou_slcr.h
new file mode 100644
index 0000000..c53954c
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xiou_slcr.h
@@ -0,0 +1,4029 @@
+/* ### HEADER ### */
+
+#ifndef __XIOU_SLCR_H__
+#define __XIOU_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XiouSlcr Base Address
+ */
+#define XIOU_SLCR_BASEADDR      0xFF180000UL
+
+/**
+ * Register: XiouSlcrMioPin0
+ */
+#define XIOU_SLCR_MIO_PIN_0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000000UL )
+#define XIOU_SLCR_MIO_PIN_0_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin1
+ */
+#define XIOU_SLCR_MIO_PIN_1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000004UL )
+#define XIOU_SLCR_MIO_PIN_1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin2
+ */
+#define XIOU_SLCR_MIO_PIN_2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000008UL )
+#define XIOU_SLCR_MIO_PIN_2_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin3
+ */
+#define XIOU_SLCR_MIO_PIN_3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XIOU_SLCR_MIO_PIN_3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin4
+ */
+#define XIOU_SLCR_MIO_PIN_4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000010UL )
+#define XIOU_SLCR_MIO_PIN_4_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin5
+ */
+#define XIOU_SLCR_MIO_PIN_5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000014UL )
+#define XIOU_SLCR_MIO_PIN_5_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin6
+ */
+#define XIOU_SLCR_MIO_PIN_6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000018UL )
+#define XIOU_SLCR_MIO_PIN_6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin7
+ */
+#define XIOU_SLCR_MIO_PIN_7    ( ( XIOU_SLCR_BASEADDR ) + 0x0000001CUL )
+#define XIOU_SLCR_MIO_PIN_7_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin8
+ */
+#define XIOU_SLCR_MIO_PIN_8    ( ( XIOU_SLCR_BASEADDR ) + 0x00000020UL )
+#define XIOU_SLCR_MIO_PIN_8_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin9
+ */
+#define XIOU_SLCR_MIO_PIN_9    ( ( XIOU_SLCR_BASEADDR ) + 0x00000024UL )
+#define XIOU_SLCR_MIO_PIN_9_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin10
+ */
+#define XIOU_SLCR_MIO_PIN_10    ( ( XIOU_SLCR_BASEADDR ) + 0x00000028UL )
+#define XIOU_SLCR_MIO_PIN_10_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin11
+ */
+#define XIOU_SLCR_MIO_PIN_11    ( ( XIOU_SLCR_BASEADDR ) + 0x0000002CUL )
+#define XIOU_SLCR_MIO_PIN_11_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin12
+ */
+#define XIOU_SLCR_MIO_PIN_12    ( ( XIOU_SLCR_BASEADDR ) + 0x00000030UL )
+#define XIOU_SLCR_MIO_PIN_12_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin13
+ */
+#define XIOU_SLCR_MIO_PIN_13    ( ( XIOU_SLCR_BASEADDR ) + 0x00000034UL )
+#define XIOU_SLCR_MIO_PIN_13_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin14
+ */
+#define XIOU_SLCR_MIO_PIN_14    ( ( XIOU_SLCR_BASEADDR ) + 0x00000038UL )
+#define XIOU_SLCR_MIO_PIN_14_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin15
+ */
+#define XIOU_SLCR_MIO_PIN_15    ( ( XIOU_SLCR_BASEADDR ) + 0x0000003CUL )
+#define XIOU_SLCR_MIO_PIN_15_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin16
+ */
+#define XIOU_SLCR_MIO_PIN_16    ( ( XIOU_SLCR_BASEADDR ) + 0x00000040UL )
+#define XIOU_SLCR_MIO_PIN_16_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin17
+ */
+#define XIOU_SLCR_MIO_PIN_17    ( ( XIOU_SLCR_BASEADDR ) + 0x00000044UL )
+#define XIOU_SLCR_MIO_PIN_17_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin18
+ */
+#define XIOU_SLCR_MIO_PIN_18    ( ( XIOU_SLCR_BASEADDR ) + 0x00000048UL )
+#define XIOU_SLCR_MIO_PIN_18_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin19
+ */
+#define XIOU_SLCR_MIO_PIN_19    ( ( XIOU_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XIOU_SLCR_MIO_PIN_19_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin20
+ */
+#define XIOU_SLCR_MIO_PIN_20    ( ( XIOU_SLCR_BASEADDR ) + 0x00000050UL )
+#define XIOU_SLCR_MIO_PIN_20_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin21
+ */
+#define XIOU_SLCR_MIO_PIN_21    ( ( XIOU_SLCR_BASEADDR ) + 0x00000054UL )
+#define XIOU_SLCR_MIO_PIN_21_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin22
+ */
+#define XIOU_SLCR_MIO_PIN_22    ( ( XIOU_SLCR_BASEADDR ) + 0x00000058UL )
+#define XIOU_SLCR_MIO_PIN_22_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin23
+ */
+#define XIOU_SLCR_MIO_PIN_23    ( ( XIOU_SLCR_BASEADDR ) + 0x0000005CUL )
+#define XIOU_SLCR_MIO_PIN_23_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin24
+ */
+#define XIOU_SLCR_MIO_PIN_24    ( ( XIOU_SLCR_BASEADDR ) + 0x00000060UL )
+#define XIOU_SLCR_MIO_PIN_24_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin25
+ */
+#define XIOU_SLCR_MIO_PIN_25    ( ( XIOU_SLCR_BASEADDR ) + 0x00000064UL )
+#define XIOU_SLCR_MIO_PIN_25_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin26
+ */
+#define XIOU_SLCR_MIO_PIN_26    ( ( XIOU_SLCR_BASEADDR ) + 0x00000068UL )
+#define XIOU_SLCR_MIO_PIN_26_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin27
+ */
+#define XIOU_SLCR_MIO_PIN_27    ( ( XIOU_SLCR_BASEADDR ) + 0x0000006CUL )
+#define XIOU_SLCR_MIO_PIN_27_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin28
+ */
+#define XIOU_SLCR_MIO_PIN_28    ( ( XIOU_SLCR_BASEADDR ) + 0x00000070UL )
+#define XIOU_SLCR_MIO_PIN_28_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin29
+ */
+#define XIOU_SLCR_MIO_PIN_29    ( ( XIOU_SLCR_BASEADDR ) + 0x00000074UL )
+#define XIOU_SLCR_MIO_PIN_29_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin30
+ */
+#define XIOU_SLCR_MIO_PIN_30    ( ( XIOU_SLCR_BASEADDR ) + 0x00000078UL )
+#define XIOU_SLCR_MIO_PIN_30_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin31
+ */
+#define XIOU_SLCR_MIO_PIN_31    ( ( XIOU_SLCR_BASEADDR ) + 0x0000007CUL )
+#define XIOU_SLCR_MIO_PIN_31_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin32
+ */
+#define XIOU_SLCR_MIO_PIN_32    ( ( XIOU_SLCR_BASEADDR ) + 0x00000080UL )
+#define XIOU_SLCR_MIO_PIN_32_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin33
+ */
+#define XIOU_SLCR_MIO_PIN_33    ( ( XIOU_SLCR_BASEADDR ) + 0x00000084UL )
+#define XIOU_SLCR_MIO_PIN_33_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin34
+ */
+#define XIOU_SLCR_MIO_PIN_34    ( ( XIOU_SLCR_BASEADDR ) + 0x00000088UL )
+#define XIOU_SLCR_MIO_PIN_34_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin35
+ */
+#define XIOU_SLCR_MIO_PIN_35    ( ( XIOU_SLCR_BASEADDR ) + 0x0000008CUL )
+#define XIOU_SLCR_MIO_PIN_35_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin36
+ */
+#define XIOU_SLCR_MIO_PIN_36    ( ( XIOU_SLCR_BASEADDR ) + 0x00000090UL )
+#define XIOU_SLCR_MIO_PIN_36_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin37
+ */
+#define XIOU_SLCR_MIO_PIN_37    ( ( XIOU_SLCR_BASEADDR ) + 0x00000094UL )
+#define XIOU_SLCR_MIO_PIN_37_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin38
+ */
+#define XIOU_SLCR_MIO_PIN_38    ( ( XIOU_SLCR_BASEADDR ) + 0x00000098UL )
+#define XIOU_SLCR_MIO_PIN_38_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin39
+ */
+#define XIOU_SLCR_MIO_PIN_39    ( ( XIOU_SLCR_BASEADDR ) + 0x0000009CUL )
+#define XIOU_SLCR_MIO_PIN_39_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin40
+ */
+#define XIOU_SLCR_MIO_PIN_40    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A0UL )
+#define XIOU_SLCR_MIO_PIN_40_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin41
+ */
+#define XIOU_SLCR_MIO_PIN_41    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A4UL )
+#define XIOU_SLCR_MIO_PIN_41_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin42
+ */
+#define XIOU_SLCR_MIO_PIN_42    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A8UL )
+#define XIOU_SLCR_MIO_PIN_42_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin43
+ */
+#define XIOU_SLCR_MIO_PIN_43    ( ( XIOU_SLCR_BASEADDR ) + 0x000000ACUL )
+#define XIOU_SLCR_MIO_PIN_43_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin44
+ */
+#define XIOU_SLCR_MIO_PIN_44    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B0UL )
+#define XIOU_SLCR_MIO_PIN_44_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin45
+ */
+#define XIOU_SLCR_MIO_PIN_45    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B4UL )
+#define XIOU_SLCR_MIO_PIN_45_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin46
+ */
+#define XIOU_SLCR_MIO_PIN_46    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B8UL )
+#define XIOU_SLCR_MIO_PIN_46_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin47
+ */
+#define XIOU_SLCR_MIO_PIN_47    ( ( XIOU_SLCR_BASEADDR ) + 0x000000BCUL )
+#define XIOU_SLCR_MIO_PIN_47_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin48
+ */
+#define XIOU_SLCR_MIO_PIN_48    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C0UL )
+#define XIOU_SLCR_MIO_PIN_48_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin49
+ */
+#define XIOU_SLCR_MIO_PIN_49    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C4UL )
+#define XIOU_SLCR_MIO_PIN_49_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin50
+ */
+#define XIOU_SLCR_MIO_PIN_50    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C8UL )
+#define XIOU_SLCR_MIO_PIN_50_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin51
+ */
+#define XIOU_SLCR_MIO_PIN_51    ( ( XIOU_SLCR_BASEADDR ) + 0x000000CCUL )
+#define XIOU_SLCR_MIO_PIN_51_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin52
+ */
+#define XIOU_SLCR_MIO_PIN_52    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D0UL )
+#define XIOU_SLCR_MIO_PIN_52_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin53
+ */
+#define XIOU_SLCR_MIO_PIN_53    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D4UL )
+#define XIOU_SLCR_MIO_PIN_53_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin54
+ */
+#define XIOU_SLCR_MIO_PIN_54    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D8UL )
+#define XIOU_SLCR_MIO_PIN_54_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin55
+ */
+#define XIOU_SLCR_MIO_PIN_55    ( ( XIOU_SLCR_BASEADDR ) + 0x000000DCUL )
+#define XIOU_SLCR_MIO_PIN_55_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin56
+ */
+#define XIOU_SLCR_MIO_PIN_56    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E0UL )
+#define XIOU_SLCR_MIO_PIN_56_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin57
+ */
+#define XIOU_SLCR_MIO_PIN_57    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E4UL )
+#define XIOU_SLCR_MIO_PIN_57_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin58
+ */
+#define XIOU_SLCR_MIO_PIN_58    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E8UL )
+#define XIOU_SLCR_MIO_PIN_58_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin59
+ */
+#define XIOU_SLCR_MIO_PIN_59    ( ( XIOU_SLCR_BASEADDR ) + 0x000000ECUL )
+#define XIOU_SLCR_MIO_PIN_59_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin60
+ */
+#define XIOU_SLCR_MIO_PIN_60    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F0UL )
+#define XIOU_SLCR_MIO_PIN_60_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin61
+ */
+#define XIOU_SLCR_MIO_PIN_61    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F4UL )
+#define XIOU_SLCR_MIO_PIN_61_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin62
+ */
+#define XIOU_SLCR_MIO_PIN_62    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F8UL )
+#define XIOU_SLCR_MIO_PIN_62_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin63
+ */
+#define XIOU_SLCR_MIO_PIN_63    ( ( XIOU_SLCR_BASEADDR ) + 0x000000FCUL )
+#define XIOU_SLCR_MIO_PIN_63_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin64
+ */
+#define XIOU_SLCR_MIO_PIN_64    ( ( XIOU_SLCR_BASEADDR ) + 0x00000100UL )
+#define XIOU_SLCR_MIO_PIN_64_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin65
+ */
+#define XIOU_SLCR_MIO_PIN_65    ( ( XIOU_SLCR_BASEADDR ) + 0x00000104UL )
+#define XIOU_SLCR_MIO_PIN_65_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin66
+ */
+#define XIOU_SLCR_MIO_PIN_66    ( ( XIOU_SLCR_BASEADDR ) + 0x00000108UL )
+#define XIOU_SLCR_MIO_PIN_66_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin67
+ */
+#define XIOU_SLCR_MIO_PIN_67    ( ( XIOU_SLCR_BASEADDR ) + 0x0000010CUL )
+#define XIOU_SLCR_MIO_PIN_67_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin68
+ */
+#define XIOU_SLCR_MIO_PIN_68    ( ( XIOU_SLCR_BASEADDR ) + 0x00000110UL )
+#define XIOU_SLCR_MIO_PIN_68_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin69
+ */
+#define XIOU_SLCR_MIO_PIN_69    ( ( XIOU_SLCR_BASEADDR ) + 0x00000114UL )
+#define XIOU_SLCR_MIO_PIN_69_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin70
+ */
+#define XIOU_SLCR_MIO_PIN_70    ( ( XIOU_SLCR_BASEADDR ) + 0x00000118UL )
+#define XIOU_SLCR_MIO_PIN_70_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin71
+ */
+#define XIOU_SLCR_MIO_PIN_71    ( ( XIOU_SLCR_BASEADDR ) + 0x0000011CUL )
+#define XIOU_SLCR_MIO_PIN_71_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin72
+ */
+#define XIOU_SLCR_MIO_PIN_72    ( ( XIOU_SLCR_BASEADDR ) + 0x00000120UL )
+#define XIOU_SLCR_MIO_PIN_72_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin73
+ */
+#define XIOU_SLCR_MIO_PIN_73    ( ( XIOU_SLCR_BASEADDR ) + 0x00000124UL )
+#define XIOU_SLCR_MIO_PIN_73_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin74
+ */
+#define XIOU_SLCR_MIO_PIN_74    ( ( XIOU_SLCR_BASEADDR ) + 0x00000128UL )
+#define XIOU_SLCR_MIO_PIN_74_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin75
+ */
+#define XIOU_SLCR_MIO_PIN_75    ( ( XIOU_SLCR_BASEADDR ) + 0x0000012CUL )
+#define XIOU_SLCR_MIO_PIN_75_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin76
+ */
+#define XIOU_SLCR_MIO_PIN_76    ( ( XIOU_SLCR_BASEADDR ) + 0x00000130UL )
+#define XIOU_SLCR_MIO_PIN_76_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin77
+ */
+#define XIOU_SLCR_MIO_PIN_77    ( ( XIOU_SLCR_BASEADDR ) + 0x00000134UL )
+#define XIOU_SLCR_MIO_PIN_77_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl0
+ */
+#define XIOU_SLCR_BANK0_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000138UL )
+#define XIOU_SLCR_BANK0_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl1
+ */
+#define XIOU_SLCR_BANK0_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000013CUL )
+#define XIOU_SLCR_BANK0_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl3
+ */
+#define XIOU_SLCR_BANK0_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000140UL )
+#define XIOU_SLCR_BANK0_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl4
+ */
+#define XIOU_SLCR_BANK0_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000144UL )
+#define XIOU_SLCR_BANK0_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl5
+ */
+#define XIOU_SLCR_BANK0_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000148UL )
+#define XIOU_SLCR_BANK0_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl6
+ */
+#define XIOU_SLCR_BANK0_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x0000014CUL )
+#define XIOU_SLCR_BANK0_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Sts
+ */
+#define XIOU_SLCR_BANK0_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000150UL )
+#define XIOU_SLCR_BANK0_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl0
+ */
+#define XIOU_SLCR_BANK1_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000154UL )
+#define XIOU_SLCR_BANK1_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl1
+ */
+#define XIOU_SLCR_BANK1_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000158UL )
+#define XIOU_SLCR_BANK1_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl3
+ */
+#define XIOU_SLCR_BANK1_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000015CUL )
+#define XIOU_SLCR_BANK1_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl4
+ */
+#define XIOU_SLCR_BANK1_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000160UL )
+#define XIOU_SLCR_BANK1_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl5
+ */
+#define XIOU_SLCR_BANK1_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000164UL )
+#define XIOU_SLCR_BANK1_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl6
+ */
+#define XIOU_SLCR_BANK1_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000168UL )
+#define XIOU_SLCR_BANK1_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Sts
+ */
+#define XIOU_SLCR_BANK1_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x0000016CUL )
+#define XIOU_SLCR_BANK1_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl0
+ */
+#define XIOU_SLCR_BANK2_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000170UL )
+#define XIOU_SLCR_BANK2_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl1
+ */
+#define XIOU_SLCR_BANK2_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000174UL )
+#define XIOU_SLCR_BANK2_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl3
+ */
+#define XIOU_SLCR_BANK2_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000178UL )
+#define XIOU_SLCR_BANK2_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl4
+ */
+#define XIOU_SLCR_BANK2_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x0000017CUL )
+#define XIOU_SLCR_BANK2_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl5
+ */
+#define XIOU_SLCR_BANK2_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000180UL )
+#define XIOU_SLCR_BANK2_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl6
+ */
+#define XIOU_SLCR_BANK2_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000184UL )
+#define XIOU_SLCR_BANK2_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Sts
+ */
+#define XIOU_SLCR_BANK2_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000188UL )
+#define XIOU_SLCR_BANK2_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioLpbck
+ */
+#define XIOU_SLCR_MIO_LPBCK    ( ( XIOU_SLCR_BASEADDR ) + 0x00000200UL )
+#define XIOU_SLCR_MIO_LPBCK_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_SHIFT   3UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_SHIFT   2UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_SHIFT   1UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_SHIFT   0UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioMstTri0
+ */
+#define XIOU_SLCR_MIO_MST_TRI0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000204UL )
+#define XIOU_SLCR_MIO_MST_TRI0_RSTVAL   0xffffffffUL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_SHIFT   31UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_MASK    0x80000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_SHIFT   30UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_MASK    0x40000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_SHIFT   29UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_MASK    0x20000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_SHIFT   28UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_MASK    0x10000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_SHIFT   27UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_MASK    0x08000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_SHIFT   26UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_MASK    0x04000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_SHIFT   25UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_MASK    0x02000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_SHIFT   24UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_MASK    0x01000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_SHIFT   23UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_MASK    0x00800000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_SHIFT   22UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_MASK    0x00400000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_SHIFT   21UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_MASK    0x00200000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_SHIFT   20UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_MASK    0x00100000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_SHIFT   19UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_MASK    0x00080000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_SHIFT   18UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_MASK    0x00040000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_SHIFT   17UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_MASK    0x00020000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_SHIFT   16UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_MASK    0x00010000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_SHIFT   15UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_MASK    0x00008000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_SHIFT   14UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_MASK    0x00004000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrMioMstTri1
+ */
+#define XIOU_SLCR_MIO_MST_TRI1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000208UL )
+#define XIOU_SLCR_MIO_MST_TRI1_RSTVAL   0xffffffffUL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_SHIFT   31UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_MASK    0x80000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_SHIFT   30UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_MASK    0x40000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_SHIFT   29UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_MASK    0x20000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_SHIFT   28UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_MASK    0x10000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_SHIFT   27UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_MASK    0x08000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_SHIFT   26UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_MASK    0x04000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_SHIFT   25UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_MASK    0x02000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_SHIFT   24UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_MASK    0x01000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_SHIFT   23UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_MASK    0x00800000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_SHIFT   22UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_MASK    0x00400000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_SHIFT   21UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_MASK    0x00200000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_SHIFT   20UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_MASK    0x00100000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_SHIFT   19UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_MASK    0x00080000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_SHIFT   18UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_MASK    0x00040000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_SHIFT   17UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_MASK    0x00020000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_SHIFT   16UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_MASK    0x00010000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_SHIFT   15UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_MASK    0x00008000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_SHIFT   14UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_MASK    0x00004000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrMioMstTri2
+ */
+#define XIOU_SLCR_MIO_MST_TRI2    ( ( XIOU_SLCR_BASEADDR ) + 0x0000020CUL )
+#define XIOU_SLCR_MIO_MST_TRI2_RSTVAL   0x00003fffUL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrWdtClkSel
+ */
+#define XIOU_SLCR_WDT_CLK_SEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000300UL )
+#define XIOU_SLCR_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_WDT_CLK_SEL_SHIFT   0UL
+#define XIOU_SLCR_WDT_CLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_WDT_CLK_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrCanMioCtrl
+ */
+#define XIOU_SLCR_CAN_MIO_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000304UL )
+#define XIOU_SLCR_CAN_MIO_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_SHIFT   23UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_MASK    0x00800000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_SHIFT   22UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_MASK    0x00400000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_SHIFT   15UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_WIDTH   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_MASK    0x003f8000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_SHIFT   8UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_MASK    0x00000100UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_SHIFT   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_MASK    0x00000080UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_SHIFT   0UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_WIDTH   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_MASK    0x0000007fUL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrGemClkCtrl
+ */
+#define XIOU_SLCR_GEM_CLK_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000308UL )
+#define XIOU_SLCR_GEM_CLK_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_SHIFT   22UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_MASK    0x00400000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_SHIFT   20UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_WIDTH   2UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_MASK    0x00300000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   18UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00040000UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   17UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00020000UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   16UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00010000UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   15UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00008000UL
+#define XIOU_SLCR_GEM3_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   13UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00002000UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   12UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00001000UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   11UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000800UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   10UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000400UL
+#define XIOU_SLCR_GEM2_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   8UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00000100UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   7UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00000080UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   6UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000040UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   5UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000020UL
+#define XIOU_SLCR_GEM1_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   3UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00000008UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   2UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00000004UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   1UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   0UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_GEM0_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdioClkCtrl
+ */
+#define XIOU_SLCR_SDIO_CLK_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x0000030CUL )
+#define XIOU_SLCR_SDIO_CLK_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_SHIFT   18UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_MASK    0x00040000UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_SHIFT   17UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_MASK    0x00020000UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_SHIFT   2UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_SHIFT   0UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_WIDTH   2UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_MASK    0x00000003UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrCtrlRegSd
+ */
+#define XIOU_SLCR_CTRL_REG_SD    ( ( XIOU_SLCR_BASEADDR ) + 0x00000310UL )
+#define XIOU_SLCR_CTRL_REG_SD_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CTRL_REG_SD1_XSDPS_EMMC_SEL_SHIFT      15UL
+#define XIOU_SLCR_CTRL_REG_SD1_XSDPS_EMMC_SEL_WIDTH   1UL
+#define XIOU_SLCR_CTRL_REG_SD1_XSDPS_EMMC_SEL_MASK    0x00008000UL
+#define XIOU_SLCR_CTRL_REG_SD1_XSDPS_EMMC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CTRL_REG_SD0_XSDPS_EMMC_SEL_SHIFT      0UL
+#define XIOU_SLCR_CTRL_REG_SD0_XSDPS_EMMC_SEL_WIDTH   1UL
+#define XIOU_SLCR_CTRL_REG_SD0_XSDPS_EMMC_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_CTRL_REG_SD0_XSDPS_EMMC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdItapdly
+ */
+#define XIOU_SLCR_SD_ITAPDLY    ( ( XIOU_SLCR_BASEADDR ) + 0x00000314UL )
+#define XIOU_SLCR_SD_ITAPDLY_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPCHGWIN_SHIFT      25UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPCHGWIN_WIDTH   1UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPCHGWIN_MASK    0x02000000UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPCHGWIN_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYENA_SHIFT   24UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYENA_MASK    0x01000000UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYSEL_SHIFT   16UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYSEL_WIDTH   8UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYSEL_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD1_ITAPDLY_XSDPS_ITAPDLYSEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPCHGWIN_SHIFT   9UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPCHGWIN_WIDTH   1UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPCHGWIN_MASK    0x00000200UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPCHGWIN_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYENA_SHIFT   8UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYENA_MASK    0x00000100UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYSEL_SHIFT   0UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYSEL_WIDTH   8UL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYSEL_MASK    0x000000ffUL
+#define XIOU_SLCR_SD0_ITAPDLY_XSDPS_ITAPDLYSEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdOtapdlysel
+ */
+#define XIOU_SLCR_SD_OTAPDLYSEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000318UL )
+#define XIOU_SLCR_SD_OTAPDLYSEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_OTAPDLYENA_SHIFT   22UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_OTAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_OTAPDLYENA_MASK    0x00400000UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_OTAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_WIDTH   6UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_MASK    0x003f0000UL
+#define XIOU_SLCR_SD1_OTAPDLYSEL_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_OTAPDLYENA_SHIFT      6UL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_OTAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_OTAPDLYENA_MASK    0x00000040UL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_OTAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_WIDTH   6UL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_MASK    0x0000003fUL
+#define XIOU_SLCR_SD0_OTAPDLYSEL_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg1
+ */
+#define XIOU_SLCR_SD_CFG_REG1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000031CUL )
+#define XIOU_SLCR_SD_CFG_REG1_RSTVAL   0x32403240UL
+
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_BASECLK_SHIFT   23UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_BASECLK_WIDTH   8UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_BASECLK_MASK    0x7f800000UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_BASECLK_DEFVAL  0x64UL
+
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_TUNIGCOUNT_SHIFT   17UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_TUNIGCOUNT_WIDTH   6UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_TUNIGCOUNT_MASK    0x007e0000UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_TUNIGCOUNT_DEFVAL  0x20UL
+
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_ASYNCWKPENA_SHIFT   16UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_ASYNCWKPENA_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_ASYNCWKPENA_MASK    0x00010000UL
+#define XIOU_SLCR_SD1_CFG_REG1_XSDPS_ASYNCWKPENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_BASECLK_SHIFT   7UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_BASECLK_WIDTH   8UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_BASECLK_MASK    0x00007f80UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_BASECLK_DEFVAL  0x64UL
+
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_TUNIGCOUNT_SHIFT   1UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_TUNIGCOUNT_WIDTH   6UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_TUNIGCOUNT_MASK    0x0000007eUL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_TUNIGCOUNT_DEFVAL  0x20UL
+
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_ASYNCWKPENA_SHIFT   0UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_ASYNCWKPENA_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_ASYNCWKPENA_MASK    0x00000001UL
+#define XIOU_SLCR_SD0_CFG_REG1_XSDPS_ASYNCWKPENA_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg2
+ */
+#define XIOU_SLCR_SD_CFG_REG2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000320UL )
+#define XIOU_SLCR_SD_CFG_REG2_RSTVAL   0x0ffc0ffcUL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SLOTTYPE_SHIFT   28UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SLOTTYPE_WIDTH   2UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SLOTTYPE_MASK    0x30000000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SLOTTYPE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ASYCINTR_SHIFT   27UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ASYCINTR_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ASYCINTR_MASK    0x08000000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ASYCINTR_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_64BIT_SHIFT   26UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_64BIT_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_64BIT_MASK    0x04000000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_64BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_1P8V_SHIFT   25UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_1P8V_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_1P8V_MASK    0x02000000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_1P8V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P0V_SHIFT   24UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P0V_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P0V_MASK    0x01000000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P0V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P3V_SHIFT   23UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P3V_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P3V_MASK    0x00800000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_3P3V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SUSPRES_SHIFT   22UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SUSPRES_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SUSPRES_MASK    0x00400000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SUSPRES_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SDMA_SHIFT   21UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SDMA_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SDMA_MASK    0x00200000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_SDMA_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_HIGHSPEED_SHIFT   20UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_HIGHSPEED_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_HIGHSPEED_MASK    0x00100000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_HIGHSPEED_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ADMA2_SHIFT   19UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ADMA2_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ADMA2_MASK    0x00080000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_ADMA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_8BIT_SHIFT   18UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_8BIT_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_8BIT_MASK    0x00040000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_8BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_MAXBLK_SHIFT   16UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_MAXBLK_WIDTH   2UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_MAXBLK_MASK    0x00030000UL
+#define XIOU_SLCR_SD1_CFG_REG2_XSDPS_MAXBLK_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SLOTTYPE_SHIFT   12UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SLOTTYPE_WIDTH   2UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SLOTTYPE_MASK    0x00003000UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SLOTTYPE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ASYCINTR_SHIFT   11UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ASYCINTR_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ASYCINTR_MASK    0x00000800UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ASYCINTR_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_64BIT_SHIFT   10UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_64BIT_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_64BIT_MASK    0x00000400UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_64BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_1P8V_SHIFT   9UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_1P8V_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_1P8V_MASK    0x00000200UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_1P8V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P0V_SHIFT   8UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P0V_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P0V_MASK    0x00000100UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P0V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P3V_SHIFT   7UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P3V_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P3V_MASK    0x00000080UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_3P3V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SUSPRES_SHIFT   6UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SUSPRES_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SUSPRES_MASK    0x00000040UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SUSPRES_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SDMA_SHIFT   5UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SDMA_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SDMA_MASK    0x00000020UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_SDMA_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_HIGHSPEED_SHIFT   4UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_HIGHSPEED_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_HIGHSPEED_MASK    0x00000010UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_HIGHSPEED_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ADMA2_SHIFT   3UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ADMA2_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ADMA2_MASK    0x00000008UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_ADMA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_8BIT_SHIFT   2UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_8BIT_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_8BIT_MASK    0x00000004UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_8BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_MAXBLK_SHIFT   0UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_MAXBLK_WIDTH   2UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_MAXBLK_MASK    0x00000003UL
+#define XIOU_SLCR_SD0_CFG_REG2_XSDPS_MAXBLK_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg3
+ */
+#define XIOU_SLCR_SD_CFG_REG3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000324UL )
+#define XIOU_SLCR_SD_CFG_REG3_RSTVAL   0x06070607UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_TUNINGSDR50_SHIFT   26UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_TUNINGSDR50_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_TUNINGSDR50_MASK    0x04000000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_TUNINGSDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_RETUNETMR_SHIFT   22UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_RETUNETMR_WIDTH   4UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_RETUNETMR_MASK    0x03c00000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_RETUNETMR_DEFVAL  0x8UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDRIVER_SHIFT   21UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDRIVER_MASK    0x00200000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_CDRIVER_SHIFT   20UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_CDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_CDRIVER_MASK    0x00100000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_CDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_ADRIVER_SHIFT   19UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_ADRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_ADRIVER_MASK    0x00080000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_ADRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDR50_SHIFT   18UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDR50_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDR50_MASK    0x00040000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_DDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR104_SHIFT   17UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR104_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR104_MASK    0x00020000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR104_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR50_SHIFT   16UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR50_WIDTH   1UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR50_MASK    0x00010000UL
+#define XIOU_SLCR_SD1_CFG_REG3_XSDPS_SDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_TUNINGSDR50_SHIFT   10UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_TUNINGSDR50_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_TUNINGSDR50_MASK    0x00000400UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_TUNINGSDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_RETUNETMR_SHIFT   6UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_RETUNETMR_WIDTH   4UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_RETUNETMR_MASK    0x000003c0UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_RETUNETMR_DEFVAL  0x8UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDRIVER_SHIFT   5UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDRIVER_MASK    0x00000020UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_CDRIVER_SHIFT   4UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_CDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_CDRIVER_MASK    0x00000010UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_CDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_ADRIVER_SHIFT   3UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_ADRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_ADRIVER_MASK    0x00000008UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_ADRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDR50_SHIFT   2UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDR50_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDR50_MASK    0x00000004UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_DDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR104_SHIFT   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR104_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR104_MASK    0x00000002UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR104_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR50_SHIFT   0UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR50_WIDTH   1UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR50_MASK    0x00000001UL
+#define XIOU_SLCR_SD0_CFG_REG3_XSDPS_SDR50_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrSdInitpreset
+ */
+#define XIOU_SLCR_SD_INITPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000328UL )
+#define XIOU_SLCR_SD_INITPRESET_RSTVAL   0x01000100UL
+
+#define XIOU_SLCR_SD1_INITPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_INITPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_INITPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_INITPRESET_XSDPS_DEFVAL  0x100UL
+
+#define XIOU_SLCR_SD0_INITPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_INITPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_INITPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_INITPRESET_XSDPS_DEFVAL  0x100UL
+
+/**
+ * Register: XiouSlcrSdDsppreset
+ */
+#define XIOU_SLCR_SD_DSPPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x0000032CUL )
+#define XIOU_SLCR_SD_DSPPRESET_RSTVAL   0x00040004UL
+
+#define XIOU_SLCR_SD1_DSPPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_DSPPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_DSPPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_DSPPRESET_XSDPS_DEFVAL  0x4UL
+
+#define XIOU_SLCR_SD0_DSPPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_DSPPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_DSPPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_DSPPRESET_XSDPS_DEFVAL  0x4UL
+
+/**
+ * Register: XiouSlcrSdHspdpreset
+ */
+#define XIOU_SLCR_SD_HSPDPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000330UL )
+#define XIOU_SLCR_SD_HSPDPRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD1_HSPDPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_HSPDPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_HSPDPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_HSPDPRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD0_HSPDPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_HSPDPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_HSPDPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_HSPDPRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdSdr12preset
+ */
+#define XIOU_SLCR_SD_SDR12PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000334UL )
+#define XIOU_SLCR_SD_SDR12PRESET_RSTVAL   0x00040004UL
+
+#define XIOU_SLCR_SD1_SDR12PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_SDR12PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_SDR12PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_SDR12PRESET_XSDPS_DEFVAL  0x4UL
+
+#define XIOU_SLCR_SD0_SDR12PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_SDR12PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_SDR12PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_SDR12PRESET_XSDPS_DEFVAL  0x4UL
+
+/**
+ * Register: XiouSlcrSdSdr25preset
+ */
+#define XIOU_SLCR_SD_SDR25PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000338UL )
+#define XIOU_SLCR_SD_SDR25PRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD1_SDR25PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_SDR25PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_SDR25PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_SDR25PRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD0_SDR25PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_SDR25PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_SDR25PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_SDR25PRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdSdr50prset
+ */
+#define XIOU_SLCR_SD_SDR50PRSET    ( ( XIOU_SLCR_BASEADDR ) + 0x0000033CUL )
+#define XIOU_SLCR_SD_SDR50PRSET_RSTVAL   0x00010001UL
+
+#define XIOU_SLCR_SD1_SDR50PRSET_XSDPS_SDR50PRESET_SHIFT   16UL
+#define XIOU_SLCR_SD1_SDR50PRSET_XSDPS_SDR50PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD1_SDR50PRSET_XSDPS_SDR50PRESET_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_SDR50PRSET_XSDPS_SDR50PRESET_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD0_SDR50PRSET_XSDPS_SDR50PRESET_SHIFT   0UL
+#define XIOU_SLCR_SD0_SDR50PRSET_XSDPS_SDR50PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD0_SDR50PRSET_XSDPS_SDR50PRESET_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_SDR50PRSET_XSDPS_SDR50PRESET_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrSdSdr104prst
+ */
+#define XIOU_SLCR_SD_SDR104PRST    ( ( XIOU_SLCR_BASEADDR ) + 0x00000340UL )
+#define XIOU_SLCR_SD_SDR104PRST_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_SDR104PRST_XSDPS_SDR104PRESET_SHIFT   16UL
+#define XIOU_SLCR_SD1_SDR104PRST_XSDPS_SDR104PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD1_SDR104PRST_XSDPS_SDR104PRESET_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_SDR104PRST_XSDPS_SDR104PRESET_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_SDR104PRST_XSDPS_SDR104PRESET_SHIFT   0UL
+#define XIOU_SLCR_SD0_SDR104PRST_XSDPS_SDR104PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD0_SDR104PRST_XSDPS_SDR104PRESET_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_SDR104PRST_XSDPS_SDR104PRESET_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdDdr50preset
+ */
+#define XIOU_SLCR_SD_DDR50PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000344UL )
+#define XIOU_SLCR_SD_DDR50PRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD1_DDR50PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_DDR50PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD1_DDR50PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD1_DDR50PRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD0_DDR50PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_DDR50PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD0_DDR50PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD0_DDR50PRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdMaxcur1p8
+ */
+#define XIOU_SLCR_SD_MAXCUR1P8    ( ( XIOU_SLCR_BASEADDR ) + 0x0000034CUL )
+#define XIOU_SLCR_SD_MAXCUR1P8_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_MAXCUR1P8_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_MAXCUR1P8_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD1_MAXCUR1P8_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD1_MAXCUR1P8_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_MAXCUR1P8_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_MAXCUR1P8_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD0_MAXCUR1P8_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD0_MAXCUR1P8_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdMaxcur3p0
+ */
+#define XIOU_SLCR_SD_MAXCUR3P0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000350UL )
+#define XIOU_SLCR_SD_MAXCUR3P0_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_MAXCUR3P0_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_MAXCUR3P0_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD1_MAXCUR3P0_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD1_MAXCUR3P0_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_MAXCUR3P0_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_MAXCUR3P0_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD0_MAXCUR3P0_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD0_MAXCUR3P0_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdMaxcur3p3
+ */
+#define XIOU_SLCR_SD_MAXCUR3P3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000354UL )
+#define XIOU_SLCR_SD_MAXCUR3P3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_MAXCUR3P3_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_MAXCUR3P3_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD1_MAXCUR3P3_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD1_MAXCUR3P3_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_MAXCUR3P3_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_MAXCUR3P3_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD0_MAXCUR3P3_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD0_MAXCUR3P3_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdDllCtrl
+ */
+#define XIOU_SLCR_SD_DLL_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000358UL )
+#define XIOU_SLCR_SD_DLL_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_RST_SHIFT   18UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_RST_WIDTH   1UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_RST_MASK    0x00040000UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_RST_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_TESTMODE_SHIFT   17UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_TESTMODE_WIDTH   1UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_TESTMODE_MASK    0x00020000UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_TESTMODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_LOCK_SHIFT   16UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_LOCK_WIDTH   1UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_LOCK_MASK    0x00010000UL
+#define XIOU_SLCR_SD1_DLL_CTRL_XSDPS_LOCK_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_RST_SHIFT   2UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_RST_WIDTH   1UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_RST_MASK    0x00000004UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_RST_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_TESTMODE_SHIFT   1UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_TESTMODE_WIDTH   1UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_TESTMODE_MASK    0x00000002UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_TESTMODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_LOCK_SHIFT   0UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_LOCK_WIDTH   1UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_LOCK_MASK    0x00000001UL
+#define XIOU_SLCR_SD0_DLL_CTRL_XSDPS_LOCK_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCdnCtrl
+ */
+#define XIOU_SLCR_SD_CDN_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x0000035CUL )
+#define XIOU_SLCR_SD_CDN_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD1_CDN_CTRL_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD1_CDN_CTRL_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_SD1_CDN_CTRL_XSDPS_MASK    0x00010000UL
+#define XIOU_SLCR_SD1_CDN_CTRL_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD0_CDN_CTRL_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD0_CDN_CTRL_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_SD0_CDN_CTRL_XSDPS_MASK    0x00000001UL
+#define XIOU_SLCR_SD0_CDN_CTRL_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrGemCtrl
+ */
+#define XIOU_SLCR_GEM_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000360UL )
+#define XIOU_SLCR_GEM_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_GEM3_CTRL_XEMACPS_SGMII_SD_SHIFT   6UL
+#define XIOU_SLCR_GEM3_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM3_CTRL_XEMACPS_SGMII_SD_MASK    0x000000c0UL
+#define XIOU_SLCR_GEM3_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM2_CTRL_XEMACPS_SGMII_SD_SHIFT   4UL
+#define XIOU_SLCR_GEM2_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM2_CTRL_XEMACPS_SGMII_SD_MASK    0x00000030UL
+#define XIOU_SLCR_GEM2_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM1_CTRL_XEMACPS_SGMII_SD_SHIFT   2UL
+#define XIOU_SLCR_GEM1_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM1_CTRL_XEMACPS_SGMII_SD_MASK    0x0000000cUL
+#define XIOU_SLCR_GEM1_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM0_CTRL_XEMACPS_SGMII_SD_SHIFT   0UL
+#define XIOU_SLCR_GEM0_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM0_CTRL_XEMACPS_SGMII_SD_MASK    0x00000003UL
+#define XIOU_SLCR_GEM0_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrTtcApbClk
+ */
+#define XIOU_SLCR_TTC_APB_CLK    ( ( XIOU_SLCR_BASEADDR ) + 0x00000380UL )
+#define XIOU_SLCR_TTC_APB_CLK_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_SHIFT   6UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_MASK    0x000000c0UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_SHIFT   4UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_MASK    0x00000030UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_SHIFT   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_MASK    0x0000000cUL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_SHIFT   0UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_MASK    0x00000003UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrTapdlyBypass
+ */
+#define XIOU_SLCR_TAPDLY_BYPASS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000390UL )
+#define XIOU_SLCR_TAPDLY_BYPASS_RSTVAL   0x00000007UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_SHIFT   2UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_MASK    0x00000004UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_DEFVAL  0x1UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_SHIFT   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_MASK    0x00000002UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_SHIFT   0UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_MASK    0x00000001UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrCoherentCtrl
+ */
+#define XIOU_SLCR_COHERENT_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000400UL )
+#define XIOU_SLCR_COHERENT_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_SHIFT   28UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_MASK    0xf0000000UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_SHIFT   24UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_MASK    0x0f000000UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS1_AXI_COH_SHIFT   20UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS1_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS1_AXI_COH_MASK    0x00f00000UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS1_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS0_AXI_COH_SHIFT   16UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS0_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS0_AXI_COH_MASK    0x000f0000UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS0_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_GEM3_AXI_COH_SHIFT   12UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM3_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM3_AXI_COH_MASK    0x0000f000UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM3_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_GEM2_AXI_COH_SHIFT   8UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM2_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM2_AXI_COH_MASK    0x00000f00UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM2_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_GEM1_AXI_COH_SHIFT   4UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM1_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM1_AXI_COH_MASK    0x000000f0UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM1_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_GEM0_AXI_COH_SHIFT   0UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM0_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_GEM0_AXI_COH_MASK    0x0000000fUL
+#define XIOU_SLCR_COHERENT_CTRL_GEM0_AXI_COH_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrVideoPssClkSel
+ */
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000404UL )
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_SHIFT   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_WIDTH   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_MASK    0x00000002UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_DEFVAL  0x0UL
+
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_SHIFT   0UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrInterconnectRoute
+ */
+#define XIOU_SLCR_INTERCONNECT_ROUTE    ( ( XIOU_SLCR_BASEADDR ) + 0x00000408UL )
+#define XIOU_SLCR_INTERCONNECT_ROUTE_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_SHIFT   7UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_MASK    0x00000080UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_SHIFT   6UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_MASK    0x00000040UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS1_SHIFT   5UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS1_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS1_MASK    0x00000020UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS0_SHIFT   4UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS0_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS0_MASK    0x00000010UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS0_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM3_SHIFT   3UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM3_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM3_MASK    0x00000008UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM3_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM2_SHIFT   2UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM2_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM2_MASK    0x00000004UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM2_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM1_SHIFT   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM1_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM1_MASK    0x00000002UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM0_SHIFT   0UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM0_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM0_MASK    0x00000001UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_GEM0_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrRamGem0
+ */
+#define XIOU_SLCR_RAM_GEM0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000500UL )
+#define XIOU_SLCR_RAM_GEM0_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_GEM0_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_GEM0_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM0_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_GEM0_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM0_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_GEM0_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM0_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_GEM0_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM0_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_GEM0_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM0_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_GEM0_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM0_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_GEM0_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM0_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_GEM0_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM0_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_GEM0_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM0_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_GEM0_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM0_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_GEM0_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM0_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_GEM0_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamgem1
+ */
+#define XIOU_SLCR_RAM_GEM1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000504UL )
+#define XIOU_SLCR_RAM_GEM1_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_GEM1_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_GEM1_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM1_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_GEM1_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM1_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_GEM1_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM1_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_GEM1_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM1_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_GEM1_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM1_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_GEM1_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM1_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_GEM1_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM1_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_GEM1_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM1_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_GEM1_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM1_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_GEM1_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM1_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_GEM1_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM1_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_GEM1_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamGem2
+ */
+#define XIOU_SLCR_RAM_GEM2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000508UL )
+#define XIOU_SLCR_RAM_GEM2_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_GEM2_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_GEM2_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM2_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_GEM2_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM2_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_GEM2_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM2_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_GEM2_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM2_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_GEM2_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM2_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_GEM2_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM2_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_GEM2_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM2_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_GEM2_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM2_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_GEM2_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM2_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_GEM2_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM2_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_GEM2_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM2_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_GEM2_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamGem3
+ */
+#define XIOU_SLCR_RAM_GEM3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000050CUL )
+#define XIOU_SLCR_RAM_GEM3_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_GEM3_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_GEM3_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM3_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_GEM3_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM3_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_GEM3_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM3_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_GEM3_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM3_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_GEM3_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM3_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_GEM3_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM3_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_GEM3_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_GEM3_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_GEM3_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_GEM3_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_GEM3_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM3_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_GEM3_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_GEM3_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_GEM3_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_GEM3_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_GEM3_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXsdps0
+ */
+#define XIOU_SLCR_RAM_XSDPS0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000510UL )
+#define XIOU_SLCR_RAM_XSDPS0_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XSDPS0_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XSDPS0_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XSDPS0_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XSDPS0_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XSDPS0_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XSDPS0_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XSDPS0_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXsdps1
+ */
+#define XIOU_SLCR_RAM_XSDPS1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000514UL )
+#define XIOU_SLCR_RAM_XSDPS1_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XSDPS1_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XSDPS1_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XSDPS1_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XSDPS1_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XSDPS1_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XSDPS1_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XSDPS1_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamCan0
+ */
+#define XIOU_SLCR_RAM_CAN0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000518UL )
+#define XIOU_SLCR_RAM_CAN0_RSTVAL   0x005b5b5bUL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA2_SHIFT   22UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_MASK    0x00400000UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB2_SHIFT   19UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_MASK    0x00380000UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA2_SHIFT   16UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_MASK    0x00070000UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamCan1
+ */
+#define XIOU_SLCR_RAM_CAN1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000051CUL )
+#define XIOU_SLCR_RAM_CAN1_RSTVAL   0x005b5b5bUL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA2_SHIFT   22UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_MASK    0x00400000UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB2_SHIFT   19UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_MASK    0x00380000UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA2_SHIFT   16UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_MASK    0x00070000UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamLqspi
+ */
+#define XIOU_SLCR_RAM_LQSPI    ( ( XIOU_SLCR_BASEADDR ) + 0x00000520UL )
+#define XIOU_SLCR_RAM_LQSPI_RSTVAL   0x00002ddbUL
+
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_SHIFT   13UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_MASK    0x00002000UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_SHIFT   10UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_MASK    0x00001c00UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_SHIFT   7UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_MASK    0x00000380UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXnandps8
+ */
+#define XIOU_SLCR_RAM_XNANDPS8    ( ( XIOU_SLCR_BASEADDR ) + 0x00000524UL )
+#define XIOU_SLCR_RAM_XNANDPS8_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrCtrl
+ */
+#define XIOU_SLCR_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000600UL )
+#define XIOU_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrIsr
+ */
+#define XIOU_SLCR_ISR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000700UL )
+#define XIOU_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrImr
+ */
+#define XIOU_SLCR_IMR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000704UL )
+#define XIOU_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrIer
+ */
+#define XIOU_SLCR_IER    ( ( XIOU_SLCR_BASEADDR ) + 0x00000708UL )
+#define XIOU_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrIdr
+ */
+#define XIOU_SLCR_IDR    ( ( XIOU_SLCR_BASEADDR ) + 0x0000070CUL )
+#define XIOU_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrItr
+ */
+#define XIOU_SLCR_ITR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000710UL )
+#define XIOU_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XIOU_SLCR_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_slcr.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_slcr.h
new file mode 100644
index 0000000..cc05672
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_slcr.h
@@ -0,0 +1,5667 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_SLCR_H__
+#define __XLPD_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdSlcr Base Address
+ */
+#define XLPD_SLCR_BASEADDR      0xFF410000UL
+
+/**
+ * Register: XlpdSlcrWprot0
+ */
+#define XLPD_SLCR_WPROT0    ( ( XLPD_SLCR_BASEADDR ) + 0x00000000UL )
+#define XLPD_SLCR_WPROT0_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_WPROT0_ACT_SHIFT   0UL
+#define XLPD_SLCR_WPROT0_ACT_WIDTH   1UL
+#define XLPD_SLCR_WPROT0_ACT_MASK    0x00000001UL
+#define XLPD_SLCR_WPROT0_ACT_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrCtrl
+ */
+#define XLPD_SLCR_CTRL    ( ( XLPD_SLCR_BASEADDR ) + 0x00000004UL )
+#define XLPD_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsr
+ */
+#define XLPD_SLCR_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000008UL )
+#define XLPD_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrImr
+ */
+#define XLPD_SLCR_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XLPD_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIer
+ */
+#define XLPD_SLCR_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00000010UL )
+#define XLPD_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIdr
+ */
+#define XLPD_SLCR_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000014UL )
+#define XLPD_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrItr
+ */
+#define XLPD_SLCR_ITR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000018UL )
+#define XLPD_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk0
+ */
+#define XLPD_SLCR_SAFETY_CHK0    ( ( XLPD_SLCR_BASEADDR ) + 0x00000040UL )
+#define XLPD_SLCR_SAFETY_CHK0_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK0_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk1
+ */
+#define XLPD_SLCR_SAFETY_CHK1    ( ( XLPD_SLCR_BASEADDR ) + 0x00000044UL )
+#define XLPD_SLCR_SAFETY_CHK1_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK1_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk2
+ */
+#define XLPD_SLCR_SAFETY_CHK2    ( ( XLPD_SLCR_BASEADDR ) + 0x00000048UL )
+#define XLPD_SLCR_SAFETY_CHK2_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK2_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk3
+ */
+#define XLPD_SLCR_SAFETY_CHK3    ( ( XLPD_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XLPD_SLCR_SAFETY_CHK3_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK3_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrXcsupmuWdtClkSel
+ */
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL    ( ( XLPD_SLCR_BASEADDR ) + 0x00000050UL )
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_SHIFT   0UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_WIDTH   1UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_MASK    0x00000001UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAdmaCfg
+ */
+#define XLPD_SLCR_ADMA_CFG    ( ( XLPD_SLCR_BASEADDR ) + 0x0000200CUL )
+#define XLPD_SLCR_ADMA_CFG_RSTVAL   0x00000028UL
+
+#define XLPD_SLCR_ADMA_CFG_BUSWID_SHIFT   5UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_WIDTH   2UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_MASK    0x00000060UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_SHIFT   0UL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_WIDTH   5UL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_MASK    0x0000001fUL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_DEFVAL  0x8UL
+
+/**
+ * Register: XlpdSlcrAdmaRam
+ */
+#define XLPD_SLCR_ADMA_RAM    ( ( XLPD_SLCR_BASEADDR ) + 0x00002010UL )
+#define XLPD_SLCR_ADMA_RAM_RSTVAL   0x00003b3bUL
+
+#define XLPD_SLCR_ADMA_RAM1_EMAB_SHIFT   12UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_MASK    0x00007000UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM1_EMASA_SHIFT   11UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_WIDTH   1UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_MASK    0x00000800UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_RAM1_EMAA_SHIFT   8UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_MASK    0x00000700UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMAB_SHIFT   4UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_MASK    0x00000070UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMASA_SHIFT   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_WIDTH   1UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_MASK    0x00000008UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMAA_SHIFT   0UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_MASK    0x00000007UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIsr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003000UL )
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiImr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003008UL )
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RSTVAL   0x1dcf000fUL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIer
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00003010UL )
+#define XLPD_SLCR_ERR_AIBAXI_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIdr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003018UL )
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIsr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003020UL )
+#define XLPD_SLCR_ERR_AIBAPB_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbImr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003024UL )
+#define XLPD_SLCR_ERR_AIBAPB_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIer
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00003028UL )
+#define XLPD_SLCR_ERR_AIBAPB_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIdr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000302CUL )
+#define XLPD_SLCR_ERR_AIBAPB_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiReq
+ */
+#define XLPD_SLCR_ISO_AIBAXI_REQ    ( ( XLPD_SLCR_BASEADDR ) + 0x00003030UL )
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiType
+ */
+#define XLPD_SLCR_ISO_AIBAXI_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x00003038UL )
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RSTVAL   0x19cf000fUL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiAck
+ */
+#define XLPD_SLCR_ISO_AIBAXI_ACK    ( ( XLPD_SLCR_BASEADDR ) + 0x00003040UL )
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbReq
+ */
+#define XLPD_SLCR_ISO_AIBAPB_REQ    ( ( XLPD_SLCR_BASEADDR ) + 0x00003048UL )
+#define XLPD_SLCR_ISO_AIBAPB_REQ_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbType
+ */
+#define XLPD_SLCR_ISO_AIBAPB_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x0000304CUL )
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbAck
+ */
+#define XLPD_SLCR_ISO_AIBAPB_ACK    ( ( XLPD_SLCR_BASEADDR ) + 0x00003050UL )
+#define XLPD_SLCR_ISO_AIBAPB_ACK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbIsr
+ */
+#define XLPD_SLCR_ERR_ATB_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00006000UL )
+#define XLPD_SLCR_ERR_ATB_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbImr
+ */
+#define XLPD_SLCR_ERR_ATB_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00006004UL )
+#define XLPD_SLCR_ERR_ATB_IMR_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAtbIer
+ */
+#define XLPD_SLCR_ERR_ATB_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00006008UL )
+#define XLPD_SLCR_ERR_ATB_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbIdr
+ */
+#define XLPD_SLCR_ERR_ATB_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000600CUL )
+#define XLPD_SLCR_ERR_ATB_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAtbCmdStoreEn
+ */
+#define XLPD_SLCR_ATB_CMD_STORE_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00006010UL )
+#define XLPD_SLCR_ATB_CMD_STORE_EN_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrAtbRespEn
+ */
+#define XLPD_SLCR_ATB_RESP_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00006014UL )
+#define XLPD_SLCR_ATB_RESP_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAtbRespType
+ */
+#define XLPD_SLCR_ATB_RESP_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x00006018UL )
+#define XLPD_SLCR_ATB_RESP_TYPE_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrAtbPrescale
+ */
+#define XLPD_SLCR_ATB_PRESCALE    ( ( XLPD_SLCR_BASEADDR ) + 0x00006020UL )
+#define XLPD_SLCR_ATB_PRESCALE_RSTVAL   0x0000ffffUL
+
+#define XLPD_SLCR_ATB_PRESCALE_EN_SHIFT   16UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_WIDTH   1UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_MASK    0x00010000UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ATB_PRESCALE_VAL_SHIFT   0UL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_WIDTH   16UL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_MASK    0x0000ffffUL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_DEFVAL  0xffffUL
+
+/**
+ * Register: XlpdSlcrMutex0
+ */
+#define XLPD_SLCR_MUTEX0    ( ( XLPD_SLCR_BASEADDR ) + 0x00007000UL )
+#define XLPD_SLCR_MUTEX0_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX0_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX0_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX0_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX0_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex1
+ */
+#define XLPD_SLCR_MUTEX1    ( ( XLPD_SLCR_BASEADDR ) + 0x00007004UL )
+#define XLPD_SLCR_MUTEX1_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX1_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX1_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX1_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX1_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex2
+ */
+#define XLPD_SLCR_MUTEX2    ( ( XLPD_SLCR_BASEADDR ) + 0x00007008UL )
+#define XLPD_SLCR_MUTEX2_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX2_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX2_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX2_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX2_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex3
+ */
+#define XLPD_SLCR_MUTEX3    ( ( XLPD_SLCR_BASEADDR ) + 0x0000700CUL )
+#define XLPD_SLCR_MUTEX3_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX3_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX3_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX3_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX3_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqSts
+ */
+#define XLPD_SLCR_GICP0_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008000UL )
+#define XLPD_SLCR_GICP0_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqMsk
+ */
+#define XLPD_SLCR_GICP0_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008004UL )
+#define XLPD_SLCR_GICP0_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqEn
+ */
+#define XLPD_SLCR_GICP0_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008008UL )
+#define XLPD_SLCR_GICP0_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqDis
+ */
+#define XLPD_SLCR_GICP0_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000800CUL )
+#define XLPD_SLCR_GICP0_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqTrig
+ */
+#define XLPD_SLCR_GICP0_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008010UL )
+#define XLPD_SLCR_GICP0_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqSts
+ */
+#define XLPD_SLCR_GICP1_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008014UL )
+#define XLPD_SLCR_GICP1_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqMsk
+ */
+#define XLPD_SLCR_GICP1_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008018UL )
+#define XLPD_SLCR_GICP1_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqEn
+ */
+#define XLPD_SLCR_GICP1_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x0000801CUL )
+#define XLPD_SLCR_GICP1_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqDis
+ */
+#define XLPD_SLCR_GICP1_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008020UL )
+#define XLPD_SLCR_GICP1_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqTrig
+ */
+#define XLPD_SLCR_GICP1_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008024UL )
+#define XLPD_SLCR_GICP1_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqSts
+ */
+#define XLPD_SLCR_GICP2_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008028UL )
+#define XLPD_SLCR_GICP2_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqMsk
+ */
+#define XLPD_SLCR_GICP2_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x0000802CUL )
+#define XLPD_SLCR_GICP2_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqEn
+ */
+#define XLPD_SLCR_GICP2_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008030UL )
+#define XLPD_SLCR_GICP2_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqDis
+ */
+#define XLPD_SLCR_GICP2_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008034UL )
+#define XLPD_SLCR_GICP2_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqTrig
+ */
+#define XLPD_SLCR_GICP2_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008038UL )
+#define XLPD_SLCR_GICP2_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqSts
+ */
+#define XLPD_SLCR_GICP3_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000803CUL )
+#define XLPD_SLCR_GICP3_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqMsk
+ */
+#define XLPD_SLCR_GICP3_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008040UL )
+#define XLPD_SLCR_GICP3_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqEn
+ */
+#define XLPD_SLCR_GICP3_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008044UL )
+#define XLPD_SLCR_GICP3_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqDis
+ */
+#define XLPD_SLCR_GICP3_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008048UL )
+#define XLPD_SLCR_GICP3_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqTrig
+ */
+#define XLPD_SLCR_GICP3_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x0000804CUL )
+#define XLPD_SLCR_GICP3_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqSts
+ */
+#define XLPD_SLCR_GICP4_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008050UL )
+#define XLPD_SLCR_GICP4_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqMsk
+ */
+#define XLPD_SLCR_GICP4_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008054UL )
+#define XLPD_SLCR_GICP4_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqEn
+ */
+#define XLPD_SLCR_GICP4_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008058UL )
+#define XLPD_SLCR_GICP4_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqDis
+ */
+#define XLPD_SLCR_GICP4_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000805CUL )
+#define XLPD_SLCR_GICP4_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqTrig
+ */
+#define XLPD_SLCR_GICP4_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008060UL )
+#define XLPD_SLCR_GICP4_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqSts
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A0UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqMsk
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A4UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_RSTVAL   0x000000ffUL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqEn
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A8UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqDis
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x000080ACUL )
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqTrig
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x000080B0UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAfiFs
+ */
+#define XLPD_SLCR_AFI_FS    ( ( XLPD_SLCR_BASEADDR ) + 0x00009000UL )
+#define XLPD_SLCR_AFI_FS_RSTVAL   0x00000200UL
+
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_SHIFT   8UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_WIDTH   2UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_MASK    0x00000300UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_DEFVAL  0x2UL
+
+/**
+ * Register: XlpdSlcrCci
+ */
+#define XLPD_SLCR_CCI    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A000UL )
+#define XLPD_SLCR_CCI_RSTVAL   0x03801c07UL
+
+#define XLPD_SLCR_CCI_SPR_SHIFT   28UL
+#define XLPD_SLCR_CCI_SPR_WIDTH   4UL
+#define XLPD_SLCR_CCI_SPR_MASK    0xf0000000UL
+#define XLPD_SLCR_CCI_SPR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS4_SHIFT   27UL
+#define XLPD_SLCR_CCI_QVNVNETS4_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS4_MASK    0x08000000UL
+#define XLPD_SLCR_CCI_QVNVNETS4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS3_SHIFT   26UL
+#define XLPD_SLCR_CCI_QVNVNETS3_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS3_MASK    0x04000000UL
+#define XLPD_SLCR_CCI_QVNVNETS3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS2_SHIFT   25UL
+#define XLPD_SLCR_CCI_QVNVNETS2_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS2_MASK    0x02000000UL
+#define XLPD_SLCR_CCI_QVNVNETS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QVNVNETS1_SHIFT   24UL
+#define XLPD_SLCR_CCI_QVNVNETS1_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS1_MASK    0x01000000UL
+#define XLPD_SLCR_CCI_QVNVNETS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QVNVNETS0_SHIFT   23UL
+#define XLPD_SLCR_CCI_QVNVNETS0_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS0_MASK    0x00800000UL
+#define XLPD_SLCR_CCI_QVNVNETS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QOS_OVRRD_SHIFT   18UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_WIDTH   5UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_MASK    0x007c0000UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVN_EN_M2_SHIFT   17UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_MASK    0x00020000UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVN_EN_M1_SHIFT   16UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_MASK    0x00010000UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_STRPG_GRAN_SHIFT   13UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_WIDTH   3UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_MASK    0x0000e000UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN4_SHIFT   12UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_MASK    0x00001000UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN3_SHIFT   11UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_MASK    0x00000800UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN0_SHIFT   10UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_MASK    0x00000400UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ECOREVNUM_SHIFT   6UL
+#define XLPD_SLCR_CCI_ECOREVNUM_WIDTH   4UL
+#define XLPD_SLCR_CCI_ECOREVNUM_MASK    0x000003c0UL
+#define XLPD_SLCR_CCI_ECOREVNUM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA2_SHIFT   5UL
+#define XLPD_SLCR_CCI_ASA2_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA2_MASK    0x00000020UL
+#define XLPD_SLCR_CCI_ASA2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA1_SHIFT   4UL
+#define XLPD_SLCR_CCI_ASA1_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA1_MASK    0x00000010UL
+#define XLPD_SLCR_CCI_ASA1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA0_SHIFT   3UL
+#define XLPD_SLCR_CCI_ASA0_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA0_MASK    0x00000008UL
+#define XLPD_SLCR_CCI_ASA0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_OWO2_SHIFT   2UL
+#define XLPD_SLCR_CCI_OWO2_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO2_MASK    0x00000004UL
+#define XLPD_SLCR_CCI_OWO2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_OWO1_SHIFT   1UL
+#define XLPD_SLCR_CCI_OWO1_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO1_MASK    0x00000002UL
+#define XLPD_SLCR_CCI_OWO1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_OWO0_SHIFT   0UL
+#define XLPD_SLCR_CCI_OWO0_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO0_MASK    0x00000001UL
+#define XLPD_SLCR_CCI_OWO0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrCciAddrmap
+ */
+#define XLPD_SLCR_CCI_ADDRMAP    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A004UL )
+#define XLPD_SLCR_CCI_ADDRMAP_RSTVAL   0x00c000ffUL
+
+#define XLPD_SLCR_CCI_ADDRMAP_15_SHIFT   30UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_MASK    0xc0000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_14_SHIFT   28UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_MASK    0x30000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_13_SHIFT   26UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_MASK    0x0c000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_12_SHIFT   24UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_MASK    0x03000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_11_SHIFT   22UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_MASK    0x00c00000UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_10_SHIFT   20UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_MASK    0x00300000UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_9_SHIFT   18UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_MASK    0x000c0000UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_8_SHIFT   16UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_MASK    0x00030000UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_7_SHIFT   14UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_MASK    0x0000c000UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_6_SHIFT   12UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_MASK    0x00003000UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_5_SHIFT   10UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_MASK    0x00000c00UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_4_SHIFT   8UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_MASK    0x00000300UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_3_SHIFT   6UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_MASK    0x000000c0UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_2_SHIFT   4UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_MASK    0x00000030UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_1_SHIFT   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_1_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_1_MASK    0x0000000cUL
+#define XLPD_SLCR_CCI_ADDRMAP_1_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_0_SHIFT   0UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_MASK    0x00000003UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrCciQvnprealloc
+ */
+#define XLPD_SLCR_CCI_QVNPREALLOC    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A008UL )
+#define XLPD_SLCR_CCI_QVNPREALLOC_RSTVAL   0x00330330UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_SHIFT   20UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_MASK    0x00f00000UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_SHIFT   16UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_MASK    0x000f0000UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_SHIFT   8UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_MASK    0x00000f00UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_SHIFT   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_MASK    0x000000f0UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrSmmu
+ */
+#define XLPD_SLCR_SMMU    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A020UL )
+#define XLPD_SLCR_SMMU_RSTVAL   0x0000003fUL
+
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_SHIFT   7UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_WIDTH   1UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_MASK    0x00000080UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SMMU_CTTW_SHIFT   6UL
+#define XLPD_SLCR_SMMU_CTTW_WIDTH   1UL
+#define XLPD_SLCR_SMMU_CTTW_MASK    0x00000040UL
+#define XLPD_SLCR_SMMU_CTTW_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_SHIFT   5UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_MASK    0x00000020UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_SHIFT   4UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_MASK    0x00000010UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_SHIFT   3UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_MASK    0x00000008UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_SHIFT   2UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_MASK    0x00000004UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_SHIFT   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_MASK    0x00000002UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_SHIFT   0UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_MASK    0x00000001UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrApu
+ */
+#define XLPD_SLCR_APU    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A040UL )
+#define XLPD_SLCR_APU_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_APU_BRDC_BARRIER_SHIFT   3UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_MASK    0x00000008UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_CMNT_SHIFT   2UL
+#define XLPD_SLCR_APU_BRDC_CMNT_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_CMNT_MASK    0x00000004UL
+#define XLPD_SLCR_APU_BRDC_CMNT_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_INNER_SHIFT   1UL
+#define XLPD_SLCR_APU_BRDC_INNER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_INNER_MASK    0x00000002UL
+#define XLPD_SLCR_APU_BRDC_INNER_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_OUTER_SHIFT   0UL
+#define XLPD_SLCR_APU_BRDC_OUTER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_OUTER_MASK    0x00000001UL
+#define XLPD_SLCR_APU_BRDC_OUTER_DEFVAL  0x1UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_SLCR_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_slcr_secure.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_slcr_secure.h
new file mode 100644
index 0000000..aff3bf2
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_slcr_secure.h
@@ -0,0 +1,141 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_SLCR_SECURE_H__
+#define __XLPD_SLCR_SECURE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdSlcrSecure Base Address
+ */
+#define XLPD_SLCR_SECURE_BASEADDR      0xFF4B0000UL
+
+/**
+ * Register: XlpdSlcrSecCtrl
+ */
+#define XLPD_SLCR_SEC_CTRL    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000004UL )
+#define XLPD_SLCR_SEC_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_SHIFT   0UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_WIDTH   1UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecIsr
+ */
+#define XLPD_SLCR_SEC_ISR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000008UL )
+#define XLPD_SLCR_SEC_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecImr
+ */
+#define XLPD_SLCR_SEC_IMR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x0000000CUL )
+#define XLPD_SLCR_SEC_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrSecIer
+ */
+#define XLPD_SLCR_SEC_IER    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000010UL )
+#define XLPD_SLCR_SEC_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecIdr
+ */
+#define XLPD_SLCR_SEC_IDR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000014UL )
+#define XLPD_SLCR_SEC_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecItr
+ */
+#define XLPD_SLCR_SEC_ITR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000018UL )
+#define XLPD_SLCR_SEC_ITR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecRpu
+ */
+#define XLPD_SLCR_SEC_RPU    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000020UL )
+#define XLPD_SLCR_SEC_RPU_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_SHIFT   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_WIDTH   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_MASK    0x00000002UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_SHIFT   0UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_WIDTH   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecAdma
+ */
+#define XLPD_SLCR_SEC_ADMA    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000024UL )
+#define XLPD_SLCR_SEC_ADMA_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ADMA_TZ_SHIFT   0UL
+#define XLPD_SLCR_SEC_ADMA_TZ_WIDTH   8UL
+#define XLPD_SLCR_SEC_ADMA_TZ_MASK    0x000000ffUL
+#define XLPD_SLCR_SEC_ADMA_TZ_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecSafetyChk
+ */
+#define XLPD_SLCR_SEC_SAFETY_CHK    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000030UL )
+#define XLPD_SLCR_SEC_SAFETY_CHK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_SHIFT   0UL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_WIDTH   32UL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecUsb
+ */
+#define XLPD_SLCR_SEC_USB    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000034UL )
+#define XLPD_SLCR_SEC_USB_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_SHIFT   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_WIDTH   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_MASK    0x00000002UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_SHIFT   0UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_WIDTH   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_DEFVAL  0x1UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_SLCR_SECURE_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_xppu.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_xppu.h
new file mode 100644
index 0000000..a5145ea
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_xppu.h
@@ -0,0 +1,858 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_XPPU_H__
+#define __XLPD_XPPU_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdXppu Base Address
+ */
+#define XLPD_XPPU_BASEADDR      0xFF980000UL
+
+/**
+ * Register: XlpdXppuCtrl
+ */
+#define XLPD_XPPU_CTRL    ( ( XLPD_XPPU_BASEADDR ) + 0x00000000UL )
+#define XLPD_XPPU_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_SHIFT   2UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_MASK    0x00000004UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_DEFVAL  0x0UL
+
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_SHIFT   1UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_MASK    0x00000002UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_DEFVAL  0x0UL
+
+#define XLPD_XPPU_CTRL_EN_SHIFT   0UL
+#define XLPD_XPPU_CTRL_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_EN_MASK    0x00000001UL
+#define XLPD_XPPU_CTRL_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuErrSts1
+ */
+#define XLPD_XPPU_ERR_STS1    ( ( XLPD_XPPU_BASEADDR ) + 0x00000004UL )
+#define XLPD_XPPU_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuErrSts2
+ */
+#define XLPD_XPPU_ERR_STS2    ( ( XLPD_XPPU_BASEADDR ) + 0x00000008UL )
+#define XLPD_XPPU_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuPoison
+ */
+#define XLPD_XPPU_POISON    ( ( XLPD_XPPU_BASEADDR ) + 0x0000000CUL )
+#define XLPD_XPPU_POISON_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_POISON_BASE_SHIFT   0UL
+#define XLPD_XPPU_POISON_BASE_WIDTH   20UL
+#define XLPD_XPPU_POISON_BASE_MASK    0x000fffffUL
+#define XLPD_XPPU_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuIsr
+ */
+#define XLPD_XPPU_ISR    ( ( XLPD_XPPU_BASEADDR ) + 0x00000010UL )
+#define XLPD_XPPU_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ISR_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_ISR_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_ISR_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_ISR_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_ISR_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_ISR_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_ISR_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_ISR_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_ISR_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_ISR_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_ISR_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_ISR_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_ISR_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_ISR_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_ISR_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuImr
+ */
+#define XLPD_XPPU_IMR    ( ( XLPD_XPPU_BASEADDR ) + 0x00000014UL )
+#define XLPD_XPPU_IMR_RSTVAL   0x000000efUL
+
+#define XLPD_XPPU_IMR_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IMR_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IMR_APER_PARITY_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IMR_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IMR_APER_TZ_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IMR_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IMR_APER_PERM_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IMR_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IMR_MID_PARITY_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IMR_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IMR_MID_RO_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IMR_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IMR_MID_MISS_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IMR_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IMR_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuIen
+ */
+#define XLPD_XPPU_IEN    ( ( XLPD_XPPU_BASEADDR ) + 0x00000018UL )
+#define XLPD_XPPU_IEN_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_IEN_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IEN_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IEN_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IEN_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IEN_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IEN_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IEN_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IEN_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IEN_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IEN_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IEN_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IEN_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IEN_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IEN_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IEN_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuIds
+ */
+#define XLPD_XPPU_IDS    ( ( XLPD_XPPU_BASEADDR ) + 0x0000001CUL )
+#define XLPD_XPPU_IDS_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_IDS_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IDS_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IDS_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IDS_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IDS_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IDS_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IDS_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IDS_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IDS_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IDS_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IDS_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IDS_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IDS_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IDS_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IDS_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMMstrIds
+ */
+#define XLPD_XPPU_M_MSTR_IDS    ( ( XLPD_XPPU_BASEADDR ) + 0x0000003CUL )
+#define XLPD_XPPU_M_MSTR_IDS_RSTVAL   0x00000014UL
+
+#define XLPD_XPPU_M_MSTR_IDS_NO_SHIFT   0UL
+#define XLPD_XPPU_M_MSTR_IDS_NO_WIDTH   32UL
+#define XLPD_XPPU_M_MSTR_IDS_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_MSTR_IDS_NO_DEFVAL  0x14UL
+
+/**
+ * Register: XlpdXppuMAperture32b
+ */
+#define XLPD_XPPU_M_APERTURE_32B    ( ( XLPD_XPPU_BASEADDR ) + 0x00000040UL )
+#define XLPD_XPPU_M_APERTURE_32B_RSTVAL   0x00000080UL
+
+#define XLPD_XPPU_M_APERTURE_32B_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_32B_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_32B_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_32B_NO_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMAperture64kb
+ */
+#define XLPD_XPPU_M_APERTURE_64KB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000044UL )
+#define XLPD_XPPU_M_APERTURE_64KB_RSTVAL   0x00000100UL
+
+#define XLPD_XPPU_M_APERTURE_64KB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_DEFVAL  0x100UL
+
+/**
+ * Register: XlpdXppuMAperture1mb
+ */
+#define XLPD_XPPU_M_APERTURE_1MB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000048UL )
+#define XLPD_XPPU_M_APERTURE_1MB_RSTVAL   0x00000010UL
+
+#define XLPD_XPPU_M_APERTURE_1MB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_DEFVAL  0x10UL
+
+/**
+ * Register: XlpdXppuMAperture512mb
+ */
+#define XLPD_XPPU_M_APERTURE_512MB    ( ( XLPD_XPPU_BASEADDR ) + 0x0000004CUL )
+#define XLPD_XPPU_M_APERTURE_512MB_RSTVAL   0x00000001UL
+
+#define XLPD_XPPU_M_APERTURE_512MB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuBase32b
+ */
+#define XLPD_XPPU_BASE_32B    ( ( XLPD_XPPU_BASEADDR ) + 0x00000050UL )
+#define XLPD_XPPU_BASE_32B_RSTVAL   0xff990000UL
+
+#define XLPD_XPPU_BASE_32B_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_32B_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_32B_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_32B_ADDR_DEFVAL  0xff990000UL
+
+/**
+ * Register: XlpdXppuBase64kb
+ */
+#define XLPD_XPPU_BASE_64KB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000054UL )
+#define XLPD_XPPU_BASE_64KB_RSTVAL   0xff000000UL
+
+#define XLPD_XPPU_BASE_64KB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_64KB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_64KB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_64KB_ADDR_DEFVAL  0xff000000UL
+
+/**
+ * Register: XlpdXppuBase1mb
+ */
+#define XLPD_XPPU_BASE_1MB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000058UL )
+#define XLPD_XPPU_BASE_1MB_RSTVAL   0xfe000000UL
+
+#define XLPD_XPPU_BASE_1MB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_1MB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_1MB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_1MB_ADDR_DEFVAL  0xfe000000UL
+
+/**
+ * Register: XlpdXppuBase512mb
+ */
+#define XLPD_XPPU_BASE_512MB    ( ( XLPD_XPPU_BASEADDR ) + 0x0000005CUL )
+#define XLPD_XPPU_BASE_512MB_RSTVAL   0xc0000000UL
+
+#define XLPD_XPPU_BASE_512MB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_512MB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_512MB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_512MB_ADDR_DEFVAL  0xc0000000UL
+
+/**
+ * Register: XlpdXppuMstrId00
+ */
+#define XLPD_XPPU_MSTR_ID00    ( ( XLPD_XPPU_BASEADDR ) + 0x00000100UL )
+#define XLPD_XPPU_MSTR_ID00_RSTVAL   0x83ff0040UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_DEFVAL  0x3ffUL
+
+#define XLPD_XPPU_MSTR_ID00_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID00_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID00_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID00_MID_DEFVAL  0x40UL
+
+/**
+ * Register: XlpdXppuMstrId01
+ */
+#define XLPD_XPPU_MSTR_ID01    ( ( XLPD_XPPU_BASEADDR ) + 0x00000104UL )
+#define XLPD_XPPU_MSTR_ID01_RSTVAL   0x03f00000UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_DEFVAL  0x3f0UL
+
+#define XLPD_XPPU_MSTR_ID01_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID01_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID01_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID01_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId02
+ */
+#define XLPD_XPPU_MSTR_ID02    ( ( XLPD_XPPU_BASEADDR ) + 0x00000108UL )
+#define XLPD_XPPU_MSTR_ID02_RSTVAL   0x83f00010UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_DEFVAL  0x3f0UL
+
+#define XLPD_XPPU_MSTR_ID02_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID02_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID02_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID02_MID_DEFVAL  0x10UL
+
+/**
+ * Register: XlpdXppuMstrId03
+ */
+#define XLPD_XPPU_MSTR_ID03    ( ( XLPD_XPPU_BASEADDR ) + 0x0000010CUL )
+#define XLPD_XPPU_MSTR_ID03_RSTVAL   0x83c00080UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_DEFVAL  0x3c0UL
+
+#define XLPD_XPPU_MSTR_ID03_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID03_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID03_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID03_MID_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMstrId04
+ */
+#define XLPD_XPPU_MSTR_ID04    ( ( XLPD_XPPU_BASEADDR ) + 0x00000110UL )
+#define XLPD_XPPU_MSTR_ID04_RSTVAL   0x83c30080UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID04_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID04_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID04_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID04_MID_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMstrId05
+ */
+#define XLPD_XPPU_MSTR_ID05    ( ( XLPD_XPPU_BASEADDR ) + 0x00000114UL )
+#define XLPD_XPPU_MSTR_ID05_RSTVAL   0x03c30081UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID05_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID05_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID05_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID05_MID_DEFVAL  0x81UL
+
+/**
+ * Register: XlpdXppuMstrId06
+ */
+#define XLPD_XPPU_MSTR_ID06    ( ( XLPD_XPPU_BASEADDR ) + 0x00000118UL )
+#define XLPD_XPPU_MSTR_ID06_RSTVAL   0x03c30082UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID06_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID06_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID06_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID06_MID_DEFVAL  0x82UL
+
+/**
+ * Register: XlpdXppuMstrId07
+ */
+#define XLPD_XPPU_MSTR_ID07    ( ( XLPD_XPPU_BASEADDR ) + 0x0000011CUL )
+#define XLPD_XPPU_MSTR_ID07_RSTVAL   0x83c30083UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID07_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID07_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID07_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID07_MID_DEFVAL  0x83UL
+
+/**
+ * Register: XlpdXppuMstrId08
+ */
+#define XLPD_XPPU_MSTR_ID08    ( ( XLPD_XPPU_BASEADDR ) + 0x00000120UL )
+#define XLPD_XPPU_MSTR_ID08_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID08_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID08_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID08_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId09
+ */
+#define XLPD_XPPU_MSTR_ID09    ( ( XLPD_XPPU_BASEADDR ) + 0x00000124UL )
+#define XLPD_XPPU_MSTR_ID09_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID09_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID09_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID09_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId10
+ */
+#define XLPD_XPPU_MSTR_ID10    ( ( XLPD_XPPU_BASEADDR ) + 0x00000128UL )
+#define XLPD_XPPU_MSTR_ID10_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID10_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID10_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID10_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId11
+ */
+#define XLPD_XPPU_MSTR_ID11    ( ( XLPD_XPPU_BASEADDR ) + 0x0000012CUL )
+#define XLPD_XPPU_MSTR_ID11_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID11_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID11_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID11_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId12
+ */
+#define XLPD_XPPU_MSTR_ID12    ( ( XLPD_XPPU_BASEADDR ) + 0x00000130UL )
+#define XLPD_XPPU_MSTR_ID12_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID12_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID12_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID12_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId13
+ */
+#define XLPD_XPPU_MSTR_ID13    ( ( XLPD_XPPU_BASEADDR ) + 0x00000134UL )
+#define XLPD_XPPU_MSTR_ID13_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID13_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID13_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID13_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId14
+ */
+#define XLPD_XPPU_MSTR_ID14    ( ( XLPD_XPPU_BASEADDR ) + 0x00000138UL )
+#define XLPD_XPPU_MSTR_ID14_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID14_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID14_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID14_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId15
+ */
+#define XLPD_XPPU_MSTR_ID15    ( ( XLPD_XPPU_BASEADDR ) + 0x0000013CUL )
+#define XLPD_XPPU_MSTR_ID15_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID15_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID15_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID15_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId16
+ */
+#define XLPD_XPPU_MSTR_ID16    ( ( XLPD_XPPU_BASEADDR ) + 0x00000140UL )
+#define XLPD_XPPU_MSTR_ID16_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID16_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID16_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID16_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId17
+ */
+#define XLPD_XPPU_MSTR_ID17    ( ( XLPD_XPPU_BASEADDR ) + 0x00000144UL )
+#define XLPD_XPPU_MSTR_ID17_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID17_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID17_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID17_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId18
+ */
+#define XLPD_XPPU_MSTR_ID18    ( ( XLPD_XPPU_BASEADDR ) + 0x00000148UL )
+#define XLPD_XPPU_MSTR_ID18_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID18_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID18_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID18_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId19
+ */
+#define XLPD_XPPU_MSTR_ID19    ( ( XLPD_XPPU_BASEADDR ) + 0x0000014CUL )
+#define XLPD_XPPU_MSTR_ID19_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID19_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID19_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID19_MID_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_XPPU_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_xppu_sink.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_xppu_sink.h
new file mode 100644
index 0000000..95f7e20
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xlpd_xppu_sink.h
@@ -0,0 +1,81 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_XPPU_SINK_H__
+#define __XLPD_XPPU_SINK_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdXppuSink Base Address
+ */
+#define XLPD_XPPU_SINK_BASEADDR      0xFF9C0000UL
+
+/**
+ * Register: XlpdXppuSinkErrSts
+ */
+#define XLPD_XPPU_SINK_ERR_STS    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF00UL )
+#define XLPD_XPPU_SINK_ERR_STS_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_SHIFT   31UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_WIDTH   1UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_MASK    0x80000000UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_SHIFT   0UL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_WIDTH   12UL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_MASK    0x00000fffUL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkIsr
+ */
+#define XLPD_XPPU_SINK_ISR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF10UL )
+#define XLPD_XPPU_SINK_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkImr
+ */
+#define XLPD_XPPU_SINK_IMR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF14UL )
+#define XLPD_XPPU_SINK_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuSinkIer
+ */
+#define XLPD_XPPU_SINK_IER    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF18UL )
+#define XLPD_XPPU_SINK_IER_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_IERADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkIdr
+ */
+#define XLPD_XPPU_SINK_IDR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF1CUL )
+#define XLPD_XPPU_SINK_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_XPPU_SINK_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xocm_xmpu_cfg.h b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xocm_xmpu_cfg.h
new file mode 100644
index 0000000..5e3631f
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/includes_ps/xocm_xmpu_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XOCM_XMPU_CFG_H__
+#define __XOCM_XMPU_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XocmXmpuCfg Base Address
+ */
+#define XOCM_XMPU_CFG_BASEADDR      0xFFA70000UL
+
+/**
+ * Register: XocmXmpuCfgCtrl
+ */
+#define XOCM_XMPU_CFG_CTRL    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000000UL )
+#define XOCM_XMPU_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XocmXmpuCfgErrSts1
+ */
+#define XOCM_XMPU_CFG_ERR_STS1    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000004UL )
+#define XOCM_XMPU_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgErrSts2
+ */
+#define XOCM_XMPU_CFG_ERR_STS2    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000008UL )
+#define XOCM_XMPU_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgPoison
+ */
+#define XOCM_XMPU_CFG_POISON    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000000CUL )
+#define XOCM_XMPU_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_POISON_BASE_SHIFT   0UL
+#define XOCM_XMPU_CFG_POISON_BASE_WIDTH   20UL
+#define XOCM_XMPU_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XOCM_XMPU_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgIsr
+ */
+#define XOCM_XMPU_CFG_ISR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000010UL )
+#define XOCM_XMPU_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgImr
+ */
+#define XOCM_XMPU_CFG_IMR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000014UL )
+#define XOCM_XMPU_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XocmXmpuCfgIen
+ */
+#define XOCM_XMPU_CFG_IEN    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000018UL )
+#define XOCM_XMPU_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgIds
+ */
+#define XOCM_XMPU_CFG_IDS    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000001CUL )
+#define XOCM_XMPU_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgLock
+ */
+#define XOCM_XMPU_CFG_LOCK    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000020UL )
+#define XOCM_XMPU_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00Strt
+ */
+#define XOCM_XMPU_CFG_R00_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000100UL )
+#define XOCM_XMPU_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00End
+ */
+#define XOCM_XMPU_CFG_R00_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000104UL )
+#define XOCM_XMPU_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00Mstr
+ */
+#define XOCM_XMPU_CFG_R00_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000108UL )
+#define XOCM_XMPU_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00
+ */
+#define XOCM_XMPU_CFG_R00    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000010CUL )
+#define XOCM_XMPU_CFG_R00_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R00_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R00_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R00_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R00_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01Strt
+ */
+#define XOCM_XMPU_CFG_R01_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000110UL )
+#define XOCM_XMPU_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01End
+ */
+#define XOCM_XMPU_CFG_R01_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000114UL )
+#define XOCM_XMPU_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01Mstr
+ */
+#define XOCM_XMPU_CFG_R01_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000118UL )
+#define XOCM_XMPU_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01
+ */
+#define XOCM_XMPU_CFG_R01    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000011CUL )
+#define XOCM_XMPU_CFG_R01_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R01_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R01_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R01_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R01_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02Strt
+ */
+#define XOCM_XMPU_CFG_R02_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000120UL )
+#define XOCM_XMPU_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02End
+ */
+#define XOCM_XMPU_CFG_R02_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000124UL )
+#define XOCM_XMPU_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02Mstr
+ */
+#define XOCM_XMPU_CFG_R02_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000128UL )
+#define XOCM_XMPU_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02
+ */
+#define XOCM_XMPU_CFG_R02    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000012CUL )
+#define XOCM_XMPU_CFG_R02_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R02_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R02_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R02_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R02_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03Strt
+ */
+#define XOCM_XMPU_CFG_R03_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000130UL )
+#define XOCM_XMPU_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03End
+ */
+#define XOCM_XMPU_CFG_R03_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000134UL )
+#define XOCM_XMPU_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03Mstr
+ */
+#define XOCM_XMPU_CFG_R03_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000138UL )
+#define XOCM_XMPU_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03
+ */
+#define XOCM_XMPU_CFG_R03    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000013CUL )
+#define XOCM_XMPU_CFG_R03_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R03_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R03_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R03_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R03_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04Strt
+ */
+#define XOCM_XMPU_CFG_R04_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000140UL )
+#define XOCM_XMPU_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04End
+ */
+#define XOCM_XMPU_CFG_R04_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000144UL )
+#define XOCM_XMPU_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04Mstr
+ */
+#define XOCM_XMPU_CFG_R04_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000148UL )
+#define XOCM_XMPU_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04
+ */
+#define XOCM_XMPU_CFG_R04    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000014CUL )
+#define XOCM_XMPU_CFG_R04_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R04_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R04_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R04_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R04_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05Strt
+ */
+#define XOCM_XMPU_CFG_R05_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000150UL )
+#define XOCM_XMPU_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05End
+ */
+#define XOCM_XMPU_CFG_R05_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000154UL )
+#define XOCM_XMPU_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05Mstr
+ */
+#define XOCM_XMPU_CFG_R05_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000158UL )
+#define XOCM_XMPU_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05
+ */
+#define XOCM_XMPU_CFG_R05    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000015CUL )
+#define XOCM_XMPU_CFG_R05_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R05_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R05_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R05_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R05_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06Strt
+ */
+#define XOCM_XMPU_CFG_R06_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000160UL )
+#define XOCM_XMPU_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06End
+ */
+#define XOCM_XMPU_CFG_R06_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000164UL )
+#define XOCM_XMPU_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06Mstr
+ */
+#define XOCM_XMPU_CFG_R06_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000168UL )
+#define XOCM_XMPU_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06
+ */
+#define XOCM_XMPU_CFG_R06    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000016CUL )
+#define XOCM_XMPU_CFG_R06_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R06_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R06_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R06_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R06_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07Strt
+ */
+#define XOCM_XMPU_CFG_R07_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000170UL )
+#define XOCM_XMPU_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07End
+ */
+#define XOCM_XMPU_CFG_R07_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000174UL )
+#define XOCM_XMPU_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07Mstr
+ */
+#define XOCM_XMPU_CFG_R07_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000178UL )
+#define XOCM_XMPU_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07
+ */
+#define XOCM_XMPU_CFG_R07    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000017CUL )
+#define XOCM_XMPU_CFG_R07_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R07_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R07_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R07_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R07_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08Strt
+ */
+#define XOCM_XMPU_CFG_R08_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000180UL )
+#define XOCM_XMPU_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08End
+ */
+#define XOCM_XMPU_CFG_R08_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000184UL )
+#define XOCM_XMPU_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08Mstr
+ */
+#define XOCM_XMPU_CFG_R08_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000188UL )
+#define XOCM_XMPU_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08
+ */
+#define XOCM_XMPU_CFG_R08    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000018CUL )
+#define XOCM_XMPU_CFG_R08_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R08_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R08_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R08_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R08_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09Strt
+ */
+#define XOCM_XMPU_CFG_R09_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000190UL )
+#define XOCM_XMPU_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09End
+ */
+#define XOCM_XMPU_CFG_R09_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000194UL )
+#define XOCM_XMPU_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09Mstr
+ */
+#define XOCM_XMPU_CFG_R09_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000198UL )
+#define XOCM_XMPU_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09
+ */
+#define XOCM_XMPU_CFG_R09    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000019CUL )
+#define XOCM_XMPU_CFG_R09_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R09_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R09_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R09_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R09_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10Strt
+ */
+#define XOCM_XMPU_CFG_R10_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A0UL )
+#define XOCM_XMPU_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10End
+ */
+#define XOCM_XMPU_CFG_R10_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A4UL )
+#define XOCM_XMPU_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10Mstr
+ */
+#define XOCM_XMPU_CFG_R10_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A8UL )
+#define XOCM_XMPU_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10
+ */
+#define XOCM_XMPU_CFG_R10    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001ACUL )
+#define XOCM_XMPU_CFG_R10_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R10_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R10_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R10_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R10_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11Strt
+ */
+#define XOCM_XMPU_CFG_R11_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B0UL )
+#define XOCM_XMPU_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11End
+ */
+#define XOCM_XMPU_CFG_R11_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B4UL )
+#define XOCM_XMPU_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11Mstr
+ */
+#define XOCM_XMPU_CFG_R11_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B8UL )
+#define XOCM_XMPU_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11
+ */
+#define XOCM_XMPU_CFG_R11    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001BCUL )
+#define XOCM_XMPU_CFG_R11_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R11_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R11_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R11_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R11_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12Strt
+ */
+#define XOCM_XMPU_CFG_R12_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C0UL )
+#define XOCM_XMPU_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12End
+ */
+#define XOCM_XMPU_CFG_R12_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C4UL )
+#define XOCM_XMPU_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12Mstr
+ */
+#define XOCM_XMPU_CFG_R12_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C8UL )
+#define XOCM_XMPU_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12
+ */
+#define XOCM_XMPU_CFG_R12    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001CCUL )
+#define XOCM_XMPU_CFG_R12_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R12_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R12_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R12_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R12_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13Strt
+ */
+#define XOCM_XMPU_CFG_R13_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D0UL )
+#define XOCM_XMPU_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13End
+ */
+#define XOCM_XMPU_CFG_R13_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D4UL )
+#define XOCM_XMPU_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13Mstr
+ */
+#define XOCM_XMPU_CFG_R13_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D8UL )
+#define XOCM_XMPU_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13
+ */
+#define XOCM_XMPU_CFG_R13    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001DCUL )
+#define XOCM_XMPU_CFG_R13_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R13_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R13_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R13_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R13_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14Strt
+ */
+#define XOCM_XMPU_CFG_R14_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E0UL )
+#define XOCM_XMPU_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14End
+ */
+#define XOCM_XMPU_CFG_R14_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E4UL )
+#define XOCM_XMPU_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14Mstr
+ */
+#define XOCM_XMPU_CFG_R14_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E8UL )
+#define XOCM_XMPU_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14
+ */
+#define XOCM_XMPU_CFG_R14    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001ECUL )
+#define XOCM_XMPU_CFG_R14_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R14_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R14_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R14_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R14_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15Strt
+ */
+#define XOCM_XMPU_CFG_R15_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F0UL )
+#define XOCM_XMPU_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15End
+ */
+#define XOCM_XMPU_CFG_R15_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F4UL )
+#define XOCM_XMPU_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15Mstr
+ */
+#define XOCM_XMPU_CFG_R15_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F8UL )
+#define XOCM_XMPU_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15
+ */
+#define XOCM_XMPU_CFG_R15    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001FCUL )
+#define XOCM_XMPU_CFG_R15_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R15_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R15_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R15_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R15_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XOCM_XMPU_CFG_H__ */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/isatty.c b/src/Xilinx/libsrc/standalone_v6_6/src/isatty.c
new file mode 100644
index 0000000..f142515
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/isatty.c
@@ -0,0 +1,56 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 _isatty(sint32 fd);
+}
+#endif
+
+/*
+ * isatty -- returns 1 if connected to a terminal device,
+ *           returns 0 if not. Since we're hooked up to a
+ *           serial port, we'll say yes _AND return a 1.
+ */
+__attribute__((weak)) sint32 isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
+
+__attribute__((weak)) sint32 _isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/kill.c b/src/Xilinx/libsrc/standalone_v6_6/src/kill.c
new file mode 100644
index 0000000..fc2f89d
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/kill.c
@@ -0,0 +1,60 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) int _kill(pid_t pid, int sig);
+}
+#endif
+
+/*
+ * kill -- go out via exit...
+ */
+
+__attribute__((weak)) int kill(pid_t pid, int sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
+
+__attribute__((weak)) int _kill(pid_t pid, int sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/lseek.c b/src/Xilinx/libsrc/standalone_v6_6/src/lseek.c
new file mode 100644
index 0000000..106c45c
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/lseek.c
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence);
+}
+#endif
+/*
+ * lseek --  Since a serial port is non-seekable, we return an error.
+ */
+__attribute__((weak)) off_t lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
+
+__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/mpu.c b/src/Xilinx/libsrc/standalone_v6_6/src/mpu.c
new file mode 100644
index 0000000..6d7054e
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/mpu.c
@@ -0,0 +1,300 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file mpu.c
+*
+* This file contains initial configuration of the MPU.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 5.04	pkp  12/18/15 Updated MPU initialization as per the proper address map
+* 6.00  pkp  06/27/16 moving the Init_MPU code to .boot section since it is a
+*                     part of processor boot process
+* 6.2   mus  01/27/17 Updated to support IAR compiler
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xreg_cortexr5.h"
+#include "xil_mpu.h"
+#include "xpseudo_asm.h"
+#include "xparameters.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+static const struct {
+	u64 size;
+	unsigned int encoding;
+}region_size[] = {
+	{ 0x20, REGION_32B },
+	{ 0x40, REGION_64B },
+	{ 0x80, REGION_128B },
+	{ 0x100, REGION_256B },
+	{ 0x200, REGION_512B },
+	{ 0x400, REGION_1K },
+	{ 0x800, REGION_2K },
+	{ 0x1000, REGION_4K },
+	{ 0x2000, REGION_8K },
+	{ 0x4000, REGION_16K },
+	{ 0x8000, REGION_32K },
+	{ 0x10000, REGION_64K },
+	{ 0x20000, REGION_128K },
+	{ 0x40000, REGION_256K },
+	{ 0x80000, REGION_512K },
+	{ 0x100000, REGION_1M },
+	{ 0x200000, REGION_2M },
+	{ 0x400000, REGION_4M },
+	{ 0x800000, REGION_8M },
+	{ 0x1000000, REGION_16M },
+	{ 0x2000000, REGION_32M },
+	{ 0x4000000, REGION_64M },
+	{ 0x8000000, REGION_128M },
+	{ 0x10000000, REGION_256M },
+	{ 0x20000000, REGION_512M },
+	{ 0x40000000, REGION_1G },
+	{ 0x80000000, REGION_2G },
+	{ 0x100000000, REGION_4G },
+};
+
+/************************** Function Prototypes ******************************/
+#if defined (__GNUC__)
+void Init_MPU(void) __attribute__((__section__(".boot")));
+static void Xil_SetAttribute(u32 addr, u32 reg_size,s32 reg_num, u32 attrib) __attribute__((__section__(".boot")));
+static void Xil_DisableMPURegions(void) __attribute__((__section__(".boot")));
+#elif defined (__ICCARM__)
+#pragma default_function_attributes = @ ".boot"
+void Init_MPU(void);
+static void Xil_SetAttribute(u32 addr, u32 reg_size,s32 reg_num, u32 attrib);
+static void Xil_DisableMPURegions(void);
+#endif
+/*****************************************************************************
+*
+* Initialize MPU for a given address map and Enabled the background Region in
+* MPU with default memory attributes for rest of address range for Cortex R5
+* processor.
+*
+* @param	None.
+*
+* @return	None.
+*
+*
+******************************************************************************/
+
+void Init_MPU(void)
+{
+	u32 Addr;
+	u32 RegSize = 0U;
+	u32 Attrib;
+	u32 RegNum = 0, i;
+	u64 size;
+
+	Xil_DisableMPURegions();
+
+	Addr = 0x00000000U;
+#ifdef	XPAR_PSU_R5_DDR_0_S_AXI_BASEADDR
+	/* If the DDR is present, configure region as per DDR size */
+	size = (XPAR_PSU_R5_DDR_0_S_AXI_HIGHADDR - XPAR_PSU_R5_DDR_0_S_AXI_BASEADDR) + 1;
+	if (size < 0x80000000) {
+		/* Lookup the size.  */
+		for (i = 0; i < sizeof region_size / sizeof region_size[0]; i++) {
+			if (size <= region_size[i].size) {
+				RegSize = region_size[i].encoding;
+				break;
+			}
+		}
+	} else {
+		/* if the DDR size is > 2GB, truncate it to 2GB */
+		RegSize = REGION_2G;
+	}
+#else
+	/* For DDRless system, configure region for TCM */
+	RegSize = REGION_256K;
+#endif
+	Attrib = NORM_NSHARED_WB_WA | PRIV_RW_USER_RW;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	/*
+	 * 1G of strongly ordered memory from 0x80000000 to 0xBFFFFFFF for PL.
+	 * 512 MB - LPD-PL interface
+	 * 256 MB - FPD-PL (HPM0) interface
+	 * 256 MB - FPD-PL (HPM1) interface
+	 */
+	Addr = 0x80000000;
+	RegSize = REGION_1G;
+	Attrib = STRONG_ORDERD_SHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	/* 512M of device memory from 0xC0000000 to 0xDFFFFFFF for QSPI */
+	Addr = 0xC0000000U;
+	RegSize = REGION_512M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	/* 256M of device memory from 0xE0000000 to 0xEFFFFFFF for PCIe Low */
+	Addr = 0xE0000000U;
+	RegSize = REGION_256M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	/* 16M of device memory from 0xF8000000 to 0xF8FFFFFF for STM_CORESIGHT */
+	Addr = 0xF8000000U;
+	RegSize = REGION_16M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	/* 1M of device memory from 0xF9000000 to 0xF90FFFFF for RPU_A53_GIC */
+	Addr = 0xF9000000U;
+	RegSize = REGION_1M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	/* 16M of device memory from 0xFD000000 to 0xFDFFFFFF for FPS slaves */
+	Addr = 0xFD000000U;
+	RegSize = REGION_16M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	/* 16M of device memory from 0xFE000000 to 0xFEFFFFFF for Upper LPS slaves */
+	Addr = 0xFE000000U;
+	RegSize = REGION_16M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	/*
+	 * 16M of device memory from 0xFF000000 to 0xFFFFFFFF for Lower LPS slaves,
+	 * CSU, PMU, TCM, OCM
+	 */
+	Addr = 0xFF000000U;
+	RegSize = REGION_16M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	/* 256K of OCM RAM from 0xFFFC0000 to 0xFFFFFFFF marked as normal memory */
+	Addr = 0xFFFC0000U;
+	RegSize = REGION_256K;
+	Attrib = NORM_NSHARED_WB_WA| PRIV_RW_USER_RW  ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+
+	/* A total of 10 MPU regions are allocated with another 6 being free for users */
+
+}
+
+/*****************************************************************************
+*
+* Set the memory attributes for a section of memory with starting address addr
+* of the region size defined by reg_size having attributes attrib of region number
+* reg_num
+*
+* @param	addr is the address for which attributes are to be set.
+* @param	attrib specifies the attributes for that memory region.
+* @param	reg_size specifies the size for that memory region.
+* @param	reg_num specifies the number for that memory region.
+* @return	None.
+*
+*
+******************************************************************************/
+static void Xil_SetAttribute(u32 addr, u32 reg_size,s32 reg_num, u32 attrib)
+{
+	u32 Local_reg_size = reg_size;
+
+	Local_reg_size = Local_reg_size<<1U;
+	Local_reg_size |= REGION_EN;
+	dsb();
+	mtcp(XREG_CP15_MPU_MEMORY_REG_NUMBER,reg_num);
+	isb();
+	mtcp(XREG_CP15_MPU_REG_BASEADDR,addr); 		/* Set base address of a region */
+	mtcp(XREG_CP15_MPU_REG_ACCESS_CTRL,attrib); 	/* Set the control attribute */
+	mtcp(XREG_CP15_MPU_REG_SIZE_EN,Local_reg_size);	/* set the region size and enable it*/
+	dsb();
+	isb();						/* synchronize context on this processor */
+}
+
+
+/*****************************************************************************
+*
+* Disable all the MPU regions if any of them is enabled
+*
+* @param	None.
+*
+* @return	None.
+*
+*
+******************************************************************************/
+static void Xil_DisableMPURegions(void)
+{
+	u32 Temp = 0U;
+	u32 Index = 0U;
+	for (Index = 0; Index <= 15; Index++) {
+		mtcp(XREG_CP15_MPU_MEMORY_REG_NUMBER,Index);
+#if defined (__GNUC__)
+		Temp = mfcp(XREG_CP15_MPU_REG_SIZE_EN);
+#elif defined (__ICCARM__)
+		mfcp(XREG_CP15_MPU_REG_SIZE_EN,Temp);
+#endif
+		Temp &= (~REGION_EN);
+		dsb();
+		mtcp(XREG_CP15_MPU_REG_SIZE_EN,Temp);
+		dsb();
+		isb();
+	}
+
+}
+
+#if defined (__ICCARM__)
+#pragma default_function_attributes =
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/open.c b/src/Xilinx/libsrc/standalone_v6_6/src/open.c
new file mode 100644
index 0000000..85e9ce4
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/open.c
@@ -0,0 +1,53 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#ifndef UNDEFINE_FILE_OPS
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 open(char8 *buf, s32 flags, s32 mode);
+}
+#endif
+/*
+ * open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 open(char8 *buf, s32 flags, s32 mode)
+{
+  (void)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/outbyte.c b/src/Xilinx/libsrc/standalone_v6_6/src/outbyte.c
new file mode 100644
index 0000000..8b56036
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/outbyte.c
@@ -0,0 +1,15 @@
+#include "xparameters.h"
+#include "xuartps_hw.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+void outbyte(char c); 
+
+#ifdef __cplusplus
+}
+#endif 
+
+void outbyte(char c) {
+	 XUartPs_SendByte(STDOUT_BASEADDRESS, c);
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/print.c b/src/Xilinx/libsrc/standalone_v6_6/src/print.c
new file mode 100644
index 0000000..da7e768
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/print.c
@@ -0,0 +1,36 @@
+/* print.c -- print a string on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ */
+
+/*
+ * print -- do a raw print of a string
+ */
+#include "xil_printf.h"
+
+void print(const char8 *ptr)
+{
+#if HYP_GUEST && EL1_NONSECURE && XEN_USE_PV_CONSOLE
+	XPVXenConsole_Write(ptr);
+#else
+#ifdef STDOUT_BASEADDRESS
+  while (*ptr != (char8)0) {
+    outbyte (*ptr);
+	ptr++;
+  }
+#else
+(void)ptr;
+#endif
+#endif
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/putnum.c b/src/Xilinx/libsrc/standalone_v6_6/src/putnum.c
new file mode 100644
index 0000000..aaf9ede
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/putnum.c
@@ -0,0 +1,59 @@
+/* putnum.c -- put a hex number on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+/*
+ * putnum -- print a 32 bit number in hex
+ */
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Function Prototypes ******************************/
+extern void print (const char8 *ptr);
+void putnum(u32 num);
+
+void putnum(u32 num)
+{
+  char8  buf[9];
+  s32  cnt;
+  s32 i;
+  char8  *ptr;
+  u32  digit;
+  for(i = 0; i<9; i++) {
+	buf[i] = '0';
+  }
+
+  ptr = buf;
+  for (cnt = 7 ; cnt >= 0 ; cnt--) {
+    digit = (num >> (cnt * 4U)) & 0x0000000fU;
+
+    if ((digit <= 9U) && (ptr != NULL)) {
+		digit += (u32)'0';
+		*ptr = ((char8) digit);
+		ptr += 1;
+	} else if (ptr != NULL) {
+		digit += ((u32)'a' - (u32)10);
+		*ptr = ((char8)digit);
+		ptr += 1;
+	} else {
+		/*Made for MisraC Compliance*/;
+	}
+  }
+
+  if(ptr != NULL) {
+	  *ptr = (char8) 0;
+  }
+  print (buf);
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/read.c b/src/Xilinx/libsrc/standalone_v6_6/src/read.c
new file mode 100644
index 0000000..7f7b7d2
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/read.c
@@ -0,0 +1,104 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* read.c -- read bytes from a input device.
+ */
+#ifndef UNDEFINE_FILE_OPS
+#include "xil_printf.h"
+#include "xparameters.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _read (s32 fd, char8* buf, s32 nbytes);
+}
+#endif
+
+/*
+ * read  -- read bytes from the serial port. Ignore fd, since
+ *          we only have stdin.
+ */
+__attribute__((weak)) s32
+read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  s32 numbytes = 0;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  if(LocalBuf != NULL) {
+	for (i = 0; i < nbytes; i++) {
+		numbytes++;
+		*(LocalBuf + i) = inbyte();
+		if ((*(LocalBuf + i) == '\n' )|| (*(LocalBuf + i) == '\r')) {
+			break;
+		}
+	}
+  }
+
+  return numbytes;
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) s32
+_read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  s32 numbytes = 0;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  if(LocalBuf != NULL) {
+	for (i = 0; i < nbytes; i++) {
+		numbytes++;
+		*(LocalBuf + i) = inbyte();
+		if ((*(LocalBuf + i) == '\n' )|| (*(LocalBuf + i) == '\r')) {
+			break;
+		}
+	}
+  }
+
+  return numbytes;
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/sbrk.c b/src/Xilinx/libsrc/standalone_v6_6/src/sbrk.c
new file mode 100644
index 0000000..87a753d
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/sbrk.c
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) char8 *sbrk (s32 nbytes);
+}
+#endif
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+extern char8 HeapBase[];
+extern char8 HeapLimit[];
+
+
+
+__attribute__((weak)) char8 *sbrk (s32 nbytes)
+{
+  char8 *base;
+  static char8 *heap_ptr = HeapBase;
+
+  base = heap_ptr;
+	if((heap_ptr != NULL) && (heap_ptr + nbytes <= (char8 *)&HeapLimit + 1)) {
+	heap_ptr += nbytes;
+    return base;
+  }	else {
+    errno = ENOMEM;
+    return ((char8 *)-1);
+  }
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/sleep.c b/src/Xilinx/libsrc/standalone_v6_6/src/sleep.c
new file mode 100644
index 0000000..d5e56c5
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/sleep.c
@@ -0,0 +1,120 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************
+*
+* @file sleep.c
+*
+* This function supports user configurable sleep implementation.
+* This provides delay in seconds by using the Timer specified by
+* the user in the ARM Cortex R5 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 02/20/14 First release
+* 5.04  pkp		 02/19/16 sleep routine is modified to use TTC3 if present
+*						  else it will use set of assembly instructions to
+*						  provide the required delay
+* 5.04	pkp		 03/09/16 Assembly routine for sleep is modified to avoid
+*						  disabling the interrupt
+* 5.04	pkp		 03/11/16 Compare the counter value to previously read value
+*						  to detect the overflow for TTC3
+* 6.0   asa      08/15/16 Updated the sleep signature. Fix for CR#956899.
+* 6.6	srm      10/18/17 Updated sleep routines to support user configurable
+*			  implementation. Now sleep routines will use TTC
+*                         instance specified by user.
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+
+#if defined (SLEEP_TIMER_BASEADDR)
+#include "xil_sleeptimer.h"
+#endif
+
+/*****************************************************************************/
+/*
+*
+* This API is used to provide delays in seconds.
+*
+* @param	seconds requested
+*
+* @return	0 always
+*
+* @note		By default, sleep is implemented using TTC3. Although user is
+*               given an option to select other instances of TTC. When the user
+*               selects other instances of TTC, sleep is implemented by that
+*		specific TTC instance. If the user didn't select any other instance
+*	        of TTC specifically and when TTC3 is absent, sleep is implemented
+*      	        using assembly instructions which is tested with instruction and
+*		data caches enabled and it gives proper delay. It may give more
+*		delay than exepcted when caches are disabled. If interrupt comes
+*		when sleep using assembly instruction is being executed, the delay
+*		may be greater than what is expected since once the interrupt is
+*		served count resumes from where it was interrupted unlike the case
+*		of TTC3 where counter keeps running while interrupt is being served.
+*
+****************************************************************************/
+
+unsigned sleep_R5(unsigned int seconds)
+{
+#if defined (SLEEP_TIMER_BASEADDR)
+	Xil_SleepTTCCommon(seconds, COUNTS_PER_SECOND);
+#else
+#if defined (__GNUC__)
+	__asm__ __volatile__ (
+#elif defined (__ICCARM__)
+	__asm volatile (
+#endif
+		"push {r0,r1,r3} \n"
+		"mov r0, %[sec] \n"
+		"mov r1, %[iter] \n"
+		"1: \n"
+		"mov r3, r1\n"
+		"2: \n"
+		"subs r3, r3, #0x1 \n"
+		"bne 2b \n"
+		"subs r0, r0, #0x1 \n"
+		"bne 1b \n"
+		"pop {r0,r1,r3} \n"
+		::[iter] "r" (ITERS_PER_SEC), [sec] "r" (seconds)
+		);
+#endif
+
+return 0;
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/sleep.h b/src/Xilinx/libsrc/standalone_v6_6/src/sleep.h
new file mode 100644
index 0000000..f53b2d8
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/sleep.h
@@ -0,0 +1,119 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+* @file sleep.h
+*
+*  This header file contains ARM Cortex A53,A9,R5,Microblaze specific sleep
+*  related APIs.
+*
+* 
+* MODIFICATION HISTORY :
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 6.6   srm  11/02/17 Added processor specific sleep rountines
+*								 function prototypes.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef SLEEP_H
+#define SLEEP_H
+
+#include "xil_types.h"
+#include "xil_io.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*****************************************************************************/
+/**
+*
+* This macro polls an address periodically until a condition is met or till the
+* timeout occurs.
+* The minimum timeout for calling this macro is 100us. If the timeout is less
+* than 100us, it still waits for 100us. Also the unit for the timeout is 100us.
+* If the timeout is not a multiple of 100us, it waits for a timeout of
+* the next usec value which is a multiple of 100us.
+*
+* @param            IO_func - accessor function to read the register contents.
+*                   Depends on the register width.
+* @param            ADDR - Address to be polled
+* @param            VALUE - variable to read the value
+* @param            COND - Condition to checked (usually involves VALUE)
+* @param            TIMEOUT_US - timeout in micro seconds
+*
+* @return           0 - when the condition is met
+*                   -1 - when the condition is not met till the timeout period
+*
+* @note             none
+*
+*****************************************************************************/
+#define Xil_poll_timeout(IO_func, ADDR, VALUE, COND, TIMEOUT_US) \
+ ( {	  \
+	u64 timeout = TIMEOUT_US/100;    \
+	if(TIMEOUT_US%100!=0)	\
+		timeout++;   \
+	for(;;) { \
+		VALUE = IO_func(ADDR); \
+		if(COND) \
+			break; \
+		else {    \
+			usleep(100);  \
+			timeout--; \
+			if(timeout==0) \
+			break;  \
+		}  \
+	}    \
+	(timeout>0) ? 0 : -1;  \
+ }  )
+
+void usleep(unsigned long useconds);
+void sleep(unsigned int seconds);
+int usleep_R5(unsigned long useconds);
+unsigned sleep_R5(unsigned int seconds);
+int usleep_MB(unsigned long useconds);
+unsigned sleep_MB(unsigned int seconds);
+int usleep_A53(unsigned long useconds);
+unsigned sleep_A53(unsigned int seconds);
+int usleep_A9(unsigned long useconds);
+unsigned sleep_A9(unsigned int seconds);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/uart.c b/src/Xilinx/libsrc/standalone_v6_6/src/uart.c
new file mode 100644
index 0000000..bff3ed2
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/uart.c
@@ -0,0 +1,160 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file uart.c
+*
+* This file contains APIs for configuring the UART.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#include "xil_types.h"
+#include "xparameters.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/* Register offsets */
+#define UART_CR_OFFSET		0x00000000U
+#define UART_MR_OFFSET		0x00000004U
+#define UART_BAUDGEN_OFFSET	0x00000018U
+#define UART_BAUDDIV_OFFSET	0x00000034U
+
+#define MAX_BAUD_ERROR_RATE	0x00000003U	/* max % error allowed */
+#define UART_BAUDRATE	115200U
+#define CSU_VERSION_REG     0xFFCA0044U
+
+void Init_Uart(void);
+
+void Init_Uart(void)
+{
+#ifdef STDOUT_BASEADDRESS
+	u8 IterBAUDDIV;		/* Iterator for available baud divisor values */
+	u32 BRGR_Value;		/* Calculated value for baud rate generator */
+	u32 CalcBaudRate;	/* Calculated baud rate */
+	u32 BaudError;		/* Diff between calculated and requested baud rate */
+	u32 Best_BRGR = 0U;	/* Best value for baud rate generator */
+	u8 Best_BAUDDIV = 0U;	/* Best value for baud divisor */
+	u32 Best_Error = 0xFFFFFFFFU;
+	u32 PercentError;
+	u32 InputClk;
+   u32 BaudRate = UART_BAUDRATE;
+
+#if (STDOUT_BASEADDRESS == XPAR_XUARTPS_0_BASEADDR)
+	InputClk = XPAR_XUARTPS_0_UART_CLK_FREQ_HZ;
+#elif (STDOUT_BASEADDRESS == XPAR_XUARTPS_1_BASEADDR)
+	InputClk = XPAR_XUARTPS_1_UART_CLK_FREQ_HZ;
+#else
+	/* STDIO is not set or axi_uart is being used for STDIO */
+	return;
+#endif
+InputClk = 25000000U;
+	/*
+	 * Determine the Baud divider. It can be 4to 254.
+	 * Loop through all possible combinations
+	 */
+	for (IterBAUDDIV = 4U; IterBAUDDIV < 255U; IterBAUDDIV++) {
+
+		/*
+		 * Calculate the value for BRGR register
+		 */
+		BRGR_Value = InputClk / (BaudRate * ((u32)IterBAUDDIV + 0x00000001U));
+
+		/*
+		 * Calculate the baud rate from the BRGR value
+		 */
+		CalcBaudRate = InputClk/ (BRGR_Value * ((u32)IterBAUDDIV + 0x00000001U));
+
+		/*
+		 * Avoid unsigned integer underflow
+		 */
+		if (BaudRate > CalcBaudRate) {
+			BaudError = BaudRate - CalcBaudRate;
+		} else {
+			BaudError = CalcBaudRate - BaudRate;
+		}
+
+		/*
+		 * Find the calculated baud rate closest to requested baud rate.
+		 */
+		if (Best_Error > BaudError) {
+
+			Best_BRGR = BRGR_Value;
+			Best_BAUDDIV = IterBAUDDIV;
+			Best_Error = BaudError;
+
+		}
+	}
+
+	/*
+	 * Make sure the best error is not too large.
+	 */
+	PercentError = (Best_Error * 100U) / BaudRate;
+	if (MAX_BAUD_ERROR_RATE < PercentError) {
+		return;
+	}
+
+	/* set CD and BDIV */
+	Xil_Out32(STDOUT_BASEADDRESS + UART_BAUDGEN_OFFSET, Best_BRGR);
+	Xil_Out32(STDOUT_BASEADDRESS + UART_BAUDDIV_OFFSET, (u32)Best_BAUDDIV);
+
+    /*
+     * Veloce specific code
+     */
+    if((Xil_In32(CSU_VERSION_REG) & 0x0000F000U) == 0x00002000U ) {
+	Xil_Out32(STDOUT_BASEADDRESS + UART_BAUDGEN_OFFSET, 0x00000002U);
+	    Xil_Out32(STDOUT_BASEADDRESS + UART_BAUDDIV_OFFSET, 0x00000004U);
+    }
+
+	/*
+	 * 8 data, 1 stop, 0 parity bits
+	 * sel_clk=uart_clk=APB clock
+	 */
+	Xil_Out32(STDOUT_BASEADDRESS + UART_MR_OFFSET, 0x00000020U);
+
+	/* enable Tx/Rx and reset Tx/Rx data path */
+	Xil_Out32((STDOUT_BASEADDRESS + UART_CR_OFFSET), 0x00000017U);
+
+	return;
+#endif
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/unlink.c b/src/Xilinx/libsrc/standalone_v6_6/src/unlink.c
new file mode 100644
index 0000000..d0cc680
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/unlink.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 unlink(char8 *path);
+}
+#endif
+/*
+ * unlink -- since we have no file system,
+ *           we just return an error.
+ */
+__attribute__((weak)) sint32 unlink(char8 *path)
+{
+  (void) path;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/usleep.c b/src/Xilinx/libsrc/standalone_v6_6/src/usleep.c
new file mode 100644
index 0000000..a245f4f
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/usleep.c
@@ -0,0 +1,125 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file usleep.c
+*
+* This function supports user configurable sleep implementation.
+* This provides a microsecond delay using the timer specified by the user in
+* the ARM Cortex R5 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 02/20/14 First release
+* 5.04  pkp		 02/19/16 usleep routine is modified to use TTC3 if present
+*						  else it will use set of assembly instructions to
+*						  provide the required delay
+* 5.04	pkp		 03/09/16 Assembly routine for usleep is modified to avoid
+*						  disabling the interrupt
+* 5.04	pkp		 03/11/16 Compare the counter value to previously read value
+*						  to detect the overflow for TTC3
+* 6.0   asa      08/15/16 Updated the usleep signature. Fix for CR#956899.
+* 6.6	srm      10/18/17 Updated sleep routines to support user configurable
+*			  implementation. Now sleep routines will use TTC
+*                         instance specified by user.
+*
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+#include "xreg_cortexr5.h"
+
+#if defined (SLEEP_TIMER_BASEADDR)
+#include "xil_sleeptimer.h"
+#endif
+
+/*****************************************************************************/
+/**
+*
+* This API gives a delay in microseconds
+*
+* @param	useconds requested
+*
+* @return	0 always
+*
+* @note		By default, usleep is implemented using TTC3. Although user is
+*               given an option to select other instances of TTC. When the user
+*               selects other instances of TTC, usleep is implemented by that
+*		specific TTC instance. If the user didn't select any other instance
+*		of TTC specifically and when TTC3 is absent, usleep is implemented
+*      	        using assembly instructions which is tested with instruction and
+*		data caches enabled and it gives proper delay. It may give more
+*		delay than exepcted when caches are disabled. If interrupt comes
+*		when usleep using assembly instruction is being executed, the delay
+*		may be greater than what is expected since once the interrupt is
+*		served count resumes from where it was interrupted unlike the case
+*		of TTC3 where counter keeps running while interrupt is being served.
+*
+****************************************************************************/
+
+int usleep_R5(unsigned long useconds)
+{
+#if defined (SLEEP_TIMER_BASEADDR)
+	Xil_SleepTTCCommon(useconds, COUNTS_PER_USECOND);
+#else
+#if defined (__GNUC__)
+	__asm__ __volatile__ (
+#elif defined (__ICCARM__)
+	__asm volatile (
+#endif
+		"push {r0,r1,r3} \n"
+		"mov r0, %[usec] \n"
+		"mov r1, %[iter] \n"
+		"1: \n"
+		"mov r3, r1 \n"
+		"2: \n"
+		"subs r3, r3, #0x1\n"
+		"bne 2b \n"
+		"subs r0, r0, #0x1 \n"
+		"bne 1b \n"
+		"pop {r0,r1,r3} \n"
+		::[iter] "r" (ITERS_PER_USEC), [usec] "r" (useconds)
+		);
+#endif
+
+return 0;
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/vectors.c b/src/Xilinx/libsrc/standalone_v6_6/src/vectors.c
new file mode 100644
index 0000000..0a36163
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/vectors.c
@@ -0,0 +1,231 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.c
+*
+* This file contains the C level vectors for the ARM Cortex A9 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a ecm  10/20/09 Initial version, moved over from bsp area
+* 6.0   mus  27/07/16 Consolidated vectors for a53,a9 and r5 processor
+*                     and added UndefinedException for a53 32 bit and r5
+*                     processor
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xil_exception.h"
+#include "vectors.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+extern XExc_VectorTableEntry XExc_VectorTable[];
+
+/************************** Function Prototypes ******************************/
+
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the FIQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void FIQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_FIQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_FIQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the IRQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void IRQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_IRQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_IRQ_INT].Data);
+}
+
+#if !defined (__aarch64__)
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the Undefined exception called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void UndefinedException(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_UNDEFINED_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_UNDEFINED_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the SW Interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void SWInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_SWI_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_SWI_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the DataAbort Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void DataAbortInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_DATA_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_DATA_ABORT_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the PrefetchAbort Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void PrefetchAbortInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_PREFETCH_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_PREFETCH_ABORT_INT].Data);
+}
+#else
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the Synchronous Interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void SynchronousInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_SYNC_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_SYNC_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the SError Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void SErrorInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_SERROR_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_SERROR_ABORT_INT].Data);
+}
+
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/vectors.h b/src/Xilinx/libsrc/standalone_v6_6/src/vectors.h
new file mode 100644
index 0000000..bb599b5
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/vectors.h
@@ -0,0 +1,88 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.h
+*
+* This file contains the C level vector prototypes for the ARM Cortex A9 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a ecm  10/20/10 Initial version, moved over from bsp area
+* 6.0   mus  07/27/16 Consolidated vectors for a9,a53 and r5 processors
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef _VECTORS_H_
+#define _VECTORS_H_
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void FIQInterrupt(void);
+void IRQInterrupt(void);
+#if !defined (__aarch64__)
+void SWInterrupt(void);
+void DataAbortInterrupt(void);
+void PrefetchAbortInterrupt(void);
+void UndefinedException(void);
+#else
+void SynchronousInterrupt(void);
+void SErrorInterrupt(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/write.c b/src/Xilinx/libsrc/standalone_v6_6/src/write.c
new file mode 100644
index 0000000..9389f61
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/write.c
@@ -0,0 +1,121 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2018 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* write.c -- write bytes to an output device.
+ */
+#ifndef UNDEFINE_FILE_OPS
+#include "xil_printf.h"
+#include "xparameters.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 _write (sint32 fd, char8* buf, sint32 nbytes);
+}
+#endif
+
+/*
+ * write -- write bytes to the serial port. Ignore fd, since
+ *          stdout and stderr are the same. Since we have no filesystem,
+ *          open will only return an error.
+ */
+__attribute__((weak)) sint32
+write (sint32 fd, char8* buf, sint32 nbytes)
+
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) sint32
+_write (sint32 fd, char8* buf, sint32 nbytes)
+{
+#if HYP_GUEST && EL1_NONSECURE && XEN_USE_PV_CONSOLE
+	sint32 length;
+
+	(void)fd;
+	(void)nbytes;
+	length = XPVXenConsole_Write(buf);
+	return length;
+#else
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+#endif
+}
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xbasic_types.h b/src/Xilinx/libsrc/standalone_v6_6/src/xbasic_types.h
new file mode 100644
index 0000000..787212c
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xbasic_types.h
@@ -0,0 +1,119 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xbasic_types.h
+*
+*
+* @note  Dummy File for backwards compatibility
+*
+
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a adk   1/31/14  Added in bsp common folder for backward compatibility
+* 

+*
+******************************************************************************/
+
+#ifndef XBASIC_TYPES_H	/* prevent circular inclusions */
+#define XBASIC_TYPES_H	/* by using protection macros */
+
+/** @name Legacy types
+ * Deprecated legacy types.
+ * @{
+ */
+typedef unsigned char	Xuint8;		/**< unsigned 8-bit */
+typedef char		Xint8;		/**< signed 8-bit */
+typedef unsigned short	Xuint16;	/**< unsigned 16-bit */
+typedef short		Xint16;		/**< signed 16-bit */
+typedef unsigned long	Xuint32;	/**< unsigned 32-bit */
+typedef long		Xint32;		/**< signed 32-bit */
+typedef float		Xfloat32;	/**< 32-bit floating point */
+typedef double		Xfloat64;	/**< 64-bit double precision FP */
+typedef unsigned long	Xboolean;	/**< boolean (XTRUE or XFALSE) */
+
+#if !defined __XUINT64__
+typedef struct
+{
+	Xuint32 Upper;
+	Xuint32 Lower;
+} Xuint64;
+#endif
+
+/** @name New types
+ * New simple types.
+ * @{
+ */
+#ifndef __KERNEL__
+#ifndef XIL_TYPES_H
+typedef Xuint32         u32;
+typedef Xuint16         u16;
+typedef Xuint8          u8;
+#endif
+#else
+#include 
+#endif
+
+#ifndef TRUE
+#  define TRUE		1U
+#endif
+
+#ifndef FALSE
+#  define FALSE		0U
+#endif
+
+#ifndef NULL
+#define NULL		0U
+#endif
+
+/*
+ * Xilinx NULL, TRUE and FALSE legacy support. Deprecated.
+ * Please use NULL, TRUE and FALSE
+ */
+#define XNULL		NULL
+#define XTRUE		TRUE
+#define XFALSE		FALSE
+
+/*
+ * This file is deprecated and users
+ * should use xil_types.h and xil_assert.h\n\r
+ */
+#warning  The xbasics_type.h file is deprecated and users should use xil_types.h and xil_assert.
+#warning  Please refer the Standalone BSP UG647 for further details
+
+
+#endif	/* end of protection macro */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xdebug.h b/src/Xilinx/libsrc/standalone_v6_6/src/xdebug.h
new file mode 100644
index 0000000..650946b
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xdebug.h
@@ -0,0 +1,32 @@
+#ifndef XDEBUG  /* prevent circular inclusions */
+#define XDEBUG  /* by using protection macros */
+
+#if defined(DEBUG) && !defined(NDEBUG)
+
+#ifndef XDEBUG_WARNING
+#define XDEBUG_WARNING
+#warning DEBUG is enabled
+#endif
+
+int printf(const char *format, ...);
+
+#define XDBG_DEBUG_ERROR             0x00000001U    /* error  condition messages */
+#define XDBG_DEBUG_GENERAL           0x00000002U    /* general debug  messages */
+#define XDBG_DEBUG_ALL               0xFFFFFFFFU    /* all debugging data */
+
+#define xdbg_current_types (XDBG_DEBUG_GENERAL)
+
+#define xdbg_stmnt(x)  x
+
+#define xdbg_printf(type, ...) (((type) & xdbg_current_types) ? printf (__VA_ARGS__) : 0)
+
+
+#else /* defined(DEBUG) && !defined(NDEBUG) */
+
+#define xdbg_stmnt(x)
+
+#define xdbg_printf(...)
+
+#endif /* defined(DEBUG) && !defined(NDEBUG) */
+
+#endif /* XDEBUG */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xenv.h b/src/Xilinx/libsrc/standalone_v6_6/src/xenv.h
new file mode 100644
index 0000000..3d97beb
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xenv.h
@@ -0,0 +1,187 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xenv.h
+*
+* Defines common services that are typically found in a host operating.
+* environment. This include file simply includes an OS specific file based
+* on the compile-time constant BUILD_ENV_*, where * is the name of the target
+* environment.
+*
+* All services are defined as macros.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00b ch   10/24/02 Added XENV_LINUX
+* 1.00a rmm  04/17/02 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XENV_H /* prevent circular inclusions */
+#define XENV_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Select which target environment we are operating under
+ */
+
+/* VxWorks target environment */
+#if defined XENV_VXWORKS
+#include "xenv_vxworks.h"
+
+/* Linux target environment */
+#elif defined XENV_LINUX
+#include "xenv_linux.h"
+
+/* Unit test environment */
+#elif defined XENV_UNITTEST
+#include "ut_xenv.h"
+
+/* Integration test environment */
+#elif defined XENV_INTTEST
+#include "int_xenv.h"
+
+/* Standalone environment selected */
+#else
+#include "xenv_standalone.h"
+#endif
+
+
+/*
+ * The following comments specify the types and macro wrappers that are
+ * expected to be defined by the target specific header files
+ */
+
+/**************************** Type Definitions *******************************/
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP
+ *
+ * A structure that contains a time stamp used by other time stamp macros
+ * defined below. This structure is processor dependent.
+ */
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_MEM_COPY(void *DestPtr, void *SrcPtr, unsigned Bytes)
+ *
+ * Copies a non-overlapping block of memory.
+ *
+ * @param   DestPtr is the destination address to copy data to.
+ * @param   SrcPtr is the source address to copy data from.
+ * @param   Bytes is the number of bytes to copy.
+ *
+ * @return  None
+ */
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_MEM_FILL(void *DestPtr, char Data, unsigned Bytes)
+ *
+ * Fills an area of memory with constant data.
+ *
+ * @param   DestPtr is the destination address to set.
+ * @param   Data contains the value to set.
+ * @param   Bytes is the number of bytes to set.
+ *
+ * @return  None
+ */
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP_GET(XTIME_STAMP *StampPtr)
+ *
+ * Samples the processor's or external timer's time base counter.
+ *
+ * @param   StampPtr is the storage for the retrieved time stamp.
+ *
+ * @return  None
+ */
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP_DELTA_US(XTIME_STAMP *Stamp1Ptr, XTIME_STAMP* Stamp2Ptr)
+ *
+ * Computes the delta between the two time stamps.
+ *
+ * @param   Stamp1Ptr - First sampled time stamp.
+ * @param   Stamp1Ptr - Sedond sampled time stamp.
+ *
+ * @return  An unsigned int value with units of microseconds.
+ */
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP_DELTA_MS(XTIME_STAMP *Stamp1Ptr, XTIME_STAMP* Stamp2Ptr)
+ *
+ * Computes the delta between the two time stamps.
+ *
+ * @param   Stamp1Ptr - First sampled time stamp.
+ * @param   Stamp1Ptr - Sedond sampled time stamp.
+ *
+ * @return  An unsigned int value with units of milliseconds.
+ */
+
+/*****************************************************************************//**
+ *
+ * XENV_USLEEP(unsigned delay)
+ *
+ * Delay the specified number of microseconds.
+ *
+ * @param   delay is the number of microseconds to delay.
+ *
+ * @return  None
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif            /* end of protection macro */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xenv_standalone.h b/src/Xilinx/libsrc/standalone_v6_6/src/xenv_standalone.h
new file mode 100644
index 0000000..f186018
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xenv_standalone.h
@@ -0,0 +1,368 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xenv_standalone.h
+*
+* Defines common services specified by xenv.h.
+*
+* @note
+* 	This file is not intended to be included directly by driver code.
+* 	Instead, the generic xenv.h file is intended to be included by driver
+* 	code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a wgr  02/28/07 Added cache handling macros.
+* 1.00a wgr  02/27/07 Simplified code. Deprecated old-style macro names.
+* 1.00a rmm  01/24/06 Implemented XENV_USLEEP. Assume implementation is being
+*                     used under Xilinx standalone BSP.
+* 1.00a xd   11/03/04 Improved support for doxygen.
+* 1.00a rmm  03/21/02 First release
+* 1.00a wgr  03/22/07 Converted to new coding style.
+* 1.00a rpm  06/29/07 Added udelay macro for standalone
+* 1.00a xd   07/19/07 Included xparameters.h as XPAR_ constants are referred
+*                     to in MICROBLAZE section
+* 1.00a ecm  09/19/08 updated for v7.20 of Microblaze, new functionality
+*
+* 

+*
+*
+******************************************************************************/
+
+#ifndef XENV_STANDALONE_H
+#define XENV_STANDALONE_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+/******************************************************************************
+ *
+ * Get the processor dependent includes
+ *
+ ******************************************************************************/
+
+#include 
+
+#if defined __MICROBLAZE__
+#  include "mb_interface.h"
+#  include "xparameters.h"   /* XPAR constants used below in MB section */
+
+#elif defined __PPC__
+#  include "sleep.h"
+#  include "xcache_l.h"      /* also include xcache_l.h for caching macros */
+#endif
+
+/******************************************************************************
+ *
+ * MEMCPY / MEMSET related macros.
+ *
+ * The following are straight forward implementations of memset and memcpy.
+ *
+ * NOTE: memcpy may not work if source and target memory area are overlapping.
+ *
+ ******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * Copies a non-overlapping block of memory.
+ *
+ * @param	DestPtr
+ *		Destination address to copy data to.
+ *
+ * @param	SrcPtr
+ * 		Source address to copy data from.
+ *
+ * @param	Bytes
+ * 		Number of bytes to copy.
+ *
+ * @return	None.
+ *
+ * @note
+ * 		The use of XENV_MEM_COPY is deprecated. Use memcpy() instead.
+ *
+ * @note
+ * 		This implemention MAY BREAK work if source and target memory
+ * 		area are overlapping.
+ *
+ *****************************************************************************/
+
+#define XENV_MEM_COPY(DestPtr, SrcPtr, Bytes) \
+	memcpy((void *) DestPtr, (const void *) SrcPtr, (size_t) Bytes)
+
+
+
+/*****************************************************************************/
+/**
+ *
+ * Fills an area of memory with constant data.
+ *
+ * @param	DestPtr
+ *		Destination address to copy data to.
+ *
+ * @param	Data
+ * 		Value to set.
+ *
+ * @param	Bytes
+ * 		Number of bytes to copy.
+ *
+ * @return	None.
+ *
+ * @note
+ * 		The use of XENV_MEM_FILL is deprecated. Use memset() instead.
+ *
+ *****************************************************************************/
+
+#define XENV_MEM_FILL(DestPtr, Data, Bytes) \
+	memset((void *) DestPtr, (s32) Data, (size_t) Bytes)
+
+
+
+/******************************************************************************
+ *
+ * TIME related macros
+ *
+ ******************************************************************************/
+
+/**
+ * A structure that contains a time stamp used by other time stamp macros
+ * defined below. This structure is processor dependent.
+ */
+typedef s32 XENV_TIME_STAMP;
+
+/*****************************************************************************/
+/**
+ *
+ * Time is derived from the 64 bit PPC timebase register
+ *
+ * @param   StampPtr is the storage for the retrieved time stamp.
+ *
+ * @return  None.
+ *
+ * @note
+ *
+ * Signature: void XENV_TIME_STAMP_GET(XTIME_STAMP *StampPtr)
+ * 


+ * This macro must be implemented by the user.
+ *
+ *****************************************************************************/
+#define XENV_TIME_STAMP_GET(StampPtr)
+
+/*****************************************************************************/
+/**
+ *
+ * This macro is not yet implemented and always returns 0.
+ *
+ * @param   Stamp1Ptr is the first sampled time stamp.
+ * @param   Stamp2Ptr is the second sampled time stamp.
+ *
+ * @return  0
+ *
+ * @note
+ *
+ * This macro must be implemented by the user.
+ *
+ *****************************************************************************/
+#define XENV_TIME_STAMP_DELTA_US(Stamp1Ptr, Stamp2Ptr)     (0)
+
+/*****************************************************************************/
+/**
+ *
+ * This macro is not yet implemented and always returns 0.
+ *
+ * @param   Stamp1Ptr is the first sampled time stamp.
+ * @param   Stamp2Ptr is the second sampled time stamp.
+ *
+ * @return  0
+ *
+ * @note
+ *
+ * This macro must be implemented by the user.
+ *
+ *****************************************************************************/
+#define XENV_TIME_STAMP_DELTA_MS(Stamp1Ptr, Stamp2Ptr)     (0)
+
+/*****************************************************************************/
+/**
+ * XENV_USLEEP(unsigned delay)
+ *
+ * Delay the specified number of microseconds. Not implemented without OS
+ * support.
+ *
+ * @param	delay
+ * 		Number of microseconds to delay.
+ *
+ * @return	None.
+ *
+ *****************************************************************************/
+
+#ifdef __PPC__
+#define XENV_USLEEP(delay)	usleep(delay)
+#define udelay(delay)	usleep(delay)
+#else
+#define XENV_USLEEP(delay)
+#define udelay(delay)
+#endif
+
+
+/******************************************************************************
+ *
+ * CACHE handling macros / mappings
+ *
+ ******************************************************************************/
+/******************************************************************************
+ *
+ * Processor independent macros
+ *
+ ******************************************************************************/
+
+#define XCACHE_ENABLE_CACHE()	\
+		{ XCACHE_ENABLE_DCACHE(); XCACHE_ENABLE_ICACHE(); }
+
+#define XCACHE_DISABLE_CACHE()	\
+		{ XCACHE_DISABLE_DCACHE(); XCACHE_DISABLE_ICACHE(); }
+
+
+/******************************************************************************
+ *
+ * MicroBlaze case
+ *
+ * NOTE: Currently the following macros will only work on systems that contain
+ * only ONE MicroBlaze processor. Also, the macros will only be enabled if the
+ * system is built using a xparameters.h file.
+ *
+ ******************************************************************************/
+
+#if defined __MICROBLAZE__
+
+/* Check if MicroBlaze data cache was built into the core.
+ */
+#if (XPAR_MICROBLAZE_USE_DCACHE == 1)
+#  define XCACHE_ENABLE_DCACHE()		microblaze_enable_dcache()
+#  define XCACHE_DISABLE_DCACHE()		microblaze_disable_dcache()
+#  define XCACHE_INVALIDATE_DCACHE()  	microblaze_invalidate_dcache()
+
+#  define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
+			microblaze_invalidate_dcache_range((s32)(Addr), (s32)(Len))
+
+#if (XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK == 1)
+#  define XCACHE_FLUSH_DCACHE()  		microblaze_flush_dcache()
+#  define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
+			microblaze_flush_dcache_range((s32)(Addr), (s32)(Len))
+#else
+#  define XCACHE_FLUSH_DCACHE()  		microblaze_invalidate_dcache()
+#  define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
+			microblaze_invalidate_dcache_range((s32)(Addr), (s32)(Len))
+#endif	/*XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK*/
+
+#else
+#  define XCACHE_ENABLE_DCACHE()
+#  define XCACHE_DISABLE_DCACHE()
+#  define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len)
+#  define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len)
+#endif	/*XPAR_MICROBLAZE_USE_DCACHE*/
+
+
+/* Check if MicroBlaze instruction cache was built into the core.
+ */
+#if (XPAR_MICROBLAZE_USE_ICACHE == 1)
+#  define XCACHE_ENABLE_ICACHE()		microblaze_enable_icache()
+#  define XCACHE_DISABLE_ICACHE()		microblaze_disable_icache()
+
+#  define XCACHE_INVALIDATE_ICACHE()  	microblaze_invalidate_icache()
+
+#  define XCACHE_INVALIDATE_ICACHE_RANGE(Addr, Len) \
+			microblaze_invalidate_icache_range((s32)(Addr), (s32)(Len))
+
+#else
+#  define XCACHE_ENABLE_ICACHE()
+#  define XCACHE_DISABLE_ICACHE()
+#endif	/*XPAR_MICROBLAZE_USE_ICACHE*/
+
+
+/******************************************************************************
+ *
+ * PowerPC case
+ *
+ *   Note that the XCACHE_ENABLE_xxx functions are hardcoded to enable a
+ *   specific memory region (0x80000001). Each bit (0-30) in the regions
+ *   bitmask stands for 128MB of memory. Bit 31 stands for the upper 2GB
+ *   range.
+ *
+ *   regions    --> cached address range
+ *   ------------|--------------------------------------------------
+ *   0x80000000  | [0, 0x7FFFFFF]
+ *   0x00000001  | [0xF8000000, 0xFFFFFFFF]
+ *   0x80000001  | [0, 0x7FFFFFF],[0xF8000000, 0xFFFFFFFF]
+ *
+ ******************************************************************************/
+
+#elif defined __PPC__
+
+#define XCACHE_ENABLE_DCACHE()		XCache_EnableDCache(0x80000001)
+#define XCACHE_DISABLE_DCACHE()		XCache_DisableDCache()
+#define XCACHE_ENABLE_ICACHE()		XCache_EnableICache(0x80000001)
+#define XCACHE_DISABLE_ICACHE()		XCache_DisableICache()
+
+#define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
+		XCache_InvalidateDCacheRange((u32)(Addr), (u32)(Len))
+
+#define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
+		XCache_FlushDCacheRange((u32)(Addr), (u32)(Len))
+
+#define XCACHE_INVALIDATE_ICACHE()	XCache_InvalidateICache()
+
+
+/******************************************************************************
+ *
+ * Unknown processor / architecture
+ *
+ ******************************************************************************/
+
+#else
+/* #error "Unknown processor / architecture. Must be MicroBlaze or PowerPC." */
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* #ifndef XENV_STANDALONE_H */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil-crt0.S b/src/Xilinx/libsrc/standalone_v6_6/src/xil-crt0.S
new file mode 100644
index 0000000..5c4fe74
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil-crt0.S
@@ -0,0 +1,155 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil-crt0.S
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  02/10/14 First release
+* 5.04  pkp  12/18/15 Initialized global constructor for C++ applications
+* 5.04  pkp  02/19/16 Added timer configuration using XTime_StartTimer API when
+*		      TTC3 is present
+* 6.4   asa  08/16/17 Added call to Xil_InitializeExistingMPURegConfig to
+*                     initialize the MPU configuration table with the MPU
+*                     configurations already set in Init_Mpu function.
+* 6.6   srm  10/18/17 Updated the timer configuration with XTime_StartTTCTimer.
+*                     Now the timer instance as specified by the user will be
+*		      started.
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+#include "xparameters.h"
+	.file	"xil-crt0.S"
+	.section ".got2","aw"
+	.align	2
+
+	.text
+.Lsbss_start:
+	.long	__sbss_start
+
+.Lsbss_end:
+	.long	__sbss_end
+
+.Lbss_start:
+	.long	__bss_start__
+
+.Lbss_end:
+	.long	__bss_end__
+
+.Lstack:
+	.long	__stack
+
+.set RPU_0_PWRCTL,	0xFF9A0108
+.set RPU_1_PWRCTL,	0xFF9A0208
+.set MPIDR_AFF0,	0xFF
+.set PWRCTL_MASK,	0x1
+
+	.globl	_startup
+
+_startup:
+	bl      __cpu_init		/* Initialize the CPU first (BSP provides this) */
+	mrc	p15, 0, r0,  c0,  c0, 5	/* Read MPIDR register */
+	ands	r0, r0, #MPIDR_AFF0	/* Get affinity level 0 */
+	bne	core1
+	ldr	r10, =RPU_0_PWRCTL	/* Load PWRCTRL address for core 0 */
+	b	test_boot_status
+
+core1:
+	ldr	r10, =RPU_1_PWRCTL	/* Load PWRCTRL address for core 1 */
+
+test_boot_status:
+	ldr	r11, [r10]		/* Read PWRCTRL register */
+	ands	r11, r11, #PWRCTL_MASK	/* Extract and test core's PWRCTRL */
+
+	/* if warm reset, skip the clearing of BSS and SBSS */
+	bne	.Lenclbss
+
+	mov	r0, #0
+
+	/* clear sbss */
+	ldr 	r1,.Lsbss_start		/* calculate beginning of the SBSS */
+	ldr	r2,.Lsbss_end		/* calculate end of the SBSS */
+
+.Lloop_sbss:
+	cmp	r1,r2
+	bge	.Lenclsbss		/* If no SBSS, no clearing required */
+	str	r0, [r1], #4
+	b	.Lloop_sbss
+
+.Lenclsbss:
+	/* clear bss */
+	ldr	r1,.Lbss_start		/* calculate beginning of the BSS */
+	ldr	r2,.Lbss_end		/* calculate end of the BSS */
+
+.Lloop_bss:
+	cmp	r1,r2
+	bge	.Lenclbss		/* If no BSS, no clearing required */
+	str	r0, [r1], #4
+	b	.Lloop_bss
+
+.Lenclbss:
+
+	/* set stack pointer */
+	ldr	r13,.Lstack		/* stack address */
+
+	/* configure the timer if TTC is present */
+#ifdef SLEEP_TIMER_BASEADDR
+    bl XTime_StartTTCTimer
+#endif
+	bl 	Xil_InitializeExistingMPURegConfig	/* Initialize MPU config */
+	/* run global constructors */
+	bl __libc_init_array
+
+	/* make sure argc and argv are valid */
+	mov	r0, #0
+	mov	r1, #0
+
+	bl	main			/* Jump to main C code */
+
+	/* Cleanup global constructors */
+	bl __libc_fini_array
+
+	bl	exit
+
+.Lexit:	/* should never get here */
+	b .Lexit
+
+.Lstart:
+	.size	_startup,.Lstart-_startup
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_assert.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_assert.c
new file mode 100644
index 0000000..59b3c1c
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_assert.c
@@ -0,0 +1,147 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_assert.c
+*
+* This file contains basic assert related functions for Xilinx software IP.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/14/09 Initial release
+* 6.0   kvn  05/31/16 Make Xil_AsserWait a global variable
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+/**
+ * This variable allows testing to be done easier with asserts. An assert
+ * sets this variable such that a driver can evaluate this variable
+ * to determine if an assert occurred.
+ */
+u32 Xil_AssertStatus;
+
+/**
+ * This variable allows the assert functionality to be changed for testing
+ * such that it does not wait infinitely. Use the debugger to disable the
+ * waiting during testing of asserts.
+ */
+s32 Xil_AssertWait = 1;
+
+/* The callback function to be invoked when an assert is taken */
+static Xil_AssertCallback Xil_AssertCallbackRoutine = NULL;
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+*
+* @brief    Implement assert. Currently, it calls a user-defined callback
+*           function if one has been set.  Then, it potentially enters an
+*           infinite loop depending on the value of the Xil_AssertWait
+*           variable.
+*
+* @param    file: filename of the source
+* @param    line: linenumber within File
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+void Xil_Assert(const char8 *File, s32 Line)
+{
+	/* if the callback has been set then invoke it */
+	if (Xil_AssertCallbackRoutine != 0) {
+		(*Xil_AssertCallbackRoutine)(File, Line);
+	}
+
+	/* if specified, wait indefinitely such that the assert will show up
+	 * in testing
+	 */
+	while (Xil_AssertWait != 0) {
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Set up a callback function to be invoked when an assert occurs.
+*           If a callback is already installed, then it will be replaced.
+*
+* @param    routine: callback to be invoked when an assert is taken
+*
+* @return   None.
+*
+* @note     This function has no effect if NDEBUG is set
+*
+******************************************************************************/
+void Xil_AssertSetCallback(Xil_AssertCallback Routine)
+{
+	Xil_AssertCallbackRoutine = Routine;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Null handler function. This follows the XInterruptHandler
+*           signature for interrupt handlers. It can be used to assign a null
+*           handler (a stub) to an interrupt controller vector table.
+*
+* @param    NullParameter: arbitrary void pointer and not used.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+void XNullHandler(void *NullParameter)
+{
+	(void) NullParameter;
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_assert.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_assert.h
new file mode 100644
index 0000000..add4124
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_assert.h
@@ -0,0 +1,195 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_assert.h
+*
+* @addtogroup common_assert_apis Assert APIs and Macros
+*
+* The xil_assert.h file contains assert related functions and macros.
+* Assert APIs/Macros specifies that a application program satisfies certain
+* conditions at particular points in its execution. These function can be
+* used by application programs to ensure that, application code is satisfying
+* certain conditions.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/14/09 First release
+* 6.0   kvn  05/31/16 Make Xil_AsserWait a global variable
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_ASSERT_H	/* prevent circular inclusions */
+#define XIL_ASSERT_H	/* by using protection macros */
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/***************************** Include Files *********************************/
+
+
+/************************** Constant Definitions *****************************/
+
+#define XIL_ASSERT_NONE     0U
+#define XIL_ASSERT_OCCURRED 1U
+#define XNULL NULL
+
+extern u32 Xil_AssertStatus;
+extern s32 Xil_AssertWait;
+extern void Xil_Assert(const char8 *File, s32 Line);
+void XNullHandler(void *NullParameter);
+
+/**
+ * This data type defines a callback to be invoked when an
+ * assert occurs. The callback is invoked only when asserts are enabled
+ */
+typedef void (*Xil_AssertCallback) (const char8 *File, s32 Line);
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#ifndef NDEBUG
+
+/*****************************************************************************/
+/**
+* @brief    This assert macro is to be used for void functions. This in
+*           conjunction with the Xil_AssertWait boolean can be used to
+*           accomodate tests so that asserts which fail allow execution to
+*           continue.
+*
+* @param    Expression: expression to be evaluated. If it evaluates to
+*           false, the assert occurs.
+*
+* @return   Returns void unless the Xil_AssertWait variable is true, in which
+*           case no return is made and an infinite loop is entered.
+*
+******************************************************************************/
+#define Xil_AssertVoid(Expression)                \
+{                                                  \
+    if (Expression) {                              \
+        Xil_AssertStatus = XIL_ASSERT_NONE;       \
+    } else {                                       \
+        Xil_Assert(__FILE__, __LINE__);            \
+        Xil_AssertStatus = XIL_ASSERT_OCCURRED;   \
+        return;                                    \
+    }                                              \
+}
+
+/*****************************************************************************/
+/**
+* @brief    This assert macro is to be used for functions that do return a
+*           value. This in conjunction with the Xil_AssertWait boolean can be
+*           used to accomodate tests so that asserts which fail allow execution
+*           to continue.
+*
+* @param    Expression: expression to be evaluated. If it evaluates to false,
+*           the assert occurs.
+*
+* @return   Returns 0 unless the Xil_AssertWait variable is true, in which
+* 	        case no return is made and an infinite loop is entered.
+*
+******************************************************************************/
+#define Xil_AssertNonvoid(Expression)             \
+{                                                  \
+    if (Expression) {                              \
+        Xil_AssertStatus = XIL_ASSERT_NONE;       \
+    } else {                                       \
+        Xil_Assert(__FILE__, __LINE__);            \
+        Xil_AssertStatus = XIL_ASSERT_OCCURRED;   \
+        return 0;                                  \
+    }                                              \
+}
+
+/*****************************************************************************/
+/**
+* @brief     Always assert. This assert macro is to be used for void functions.
+*            Use for instances where an assert should always occur.
+*
+* @return    Returns void unless the Xil_AssertWait variable is true, in which
+*	         case no return is made and an infinite loop is entered.
+*
+******************************************************************************/
+#define Xil_AssertVoidAlways()                   \
+{                                                  \
+   Xil_Assert(__FILE__, __LINE__);                 \
+   Xil_AssertStatus = XIL_ASSERT_OCCURRED;        \
+   return;                                         \
+}
+
+/*****************************************************************************/
+/**
+* @brief   Always assert. This assert macro is to be used for functions that
+*          do return a value. Use for instances where an assert should always
+*          occur.
+*
+* @return Returns void unless the Xil_AssertWait variable is true, in which
+*	      case no return is made and an infinite loop is entered.
+*
+******************************************************************************/
+#define Xil_AssertNonvoidAlways()                \
+{                                                  \
+   Xil_Assert(__FILE__, __LINE__);                 \
+   Xil_AssertStatus = XIL_ASSERT_OCCURRED;        \
+   return 0;                                       \
+}
+
+
+#else
+
+#define Xil_AssertVoid(Expression)
+#define Xil_AssertVoidAlways()
+#define Xil_AssertNonvoid(Expression)
+#define Xil_AssertNonvoidAlways()
+
+#endif
+
+/************************** Function Prototypes ******************************/
+
+void Xil_AssertSetCallback(Xil_AssertCallback Routine);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
+/**
+* @} End of "addtogroup common_assert_apis".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_cache.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_cache.c
new file mode 100644
index 0000000..3cd51ab
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_cache.c
@@ -0,0 +1,584 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.c
+*
+* Contains required functions for the ARM cache functionality.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 6.2   mus  01/27/17 Updated to support IAR compiler
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xil_io.h"
+#include "xpseudo_asm.h"
+#include "xparameters.h"
+#include "xreg_cortexr5.h"
+#include "xil_exception.h"
+
+
+/************************** Variable Definitions *****************************/
+
+#define IRQ_FIQ_MASK 0xC0	/* Mask IRQ and FIQ interrupts in cpsr */
+
+#if defined (__GNUC__)
+extern s32  _stack_end;
+extern s32  __undef_stack;
+#endif
+/****************************************************************************/
+/************************** Function Prototypes ******************************/
+
+/****************************************************************************/
+/**
+* @brief    Enable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheEnable(void)
+{
+	register u32 CtrlReg;
+
+	/* enable caches only if they are disabled */
+#if defined (__GNUC__)
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	 mfcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+#endif
+	if ((CtrlReg & XREG_CP15_CONTROL_C_BIT)==0x00000000U) {
+		/* invalidate the Data cache */
+		Xil_DCacheInvalidate();
+
+		/* enable the Data cache */
+		CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+
+		mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	}
+}
+
+/****************************************************************************/
+/**
+* @brief    Disable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheDisable(void)
+{
+	register u32 CtrlReg;
+
+	/* clean and invalidate the Data cache */
+	Xil_DCacheFlush();
+
+	/* disable the Data cache */
+#if defined (__GNUC__)
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	 mfcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+#endif
+
+	CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+
+	mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+}
+
+/****************************************************************************/
+/**
+* @brief    Invalidate the entire Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidate(void)
+{
+	u32 currmask;
+	u32 stack_start,stack_end,stack_size;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+#if defined (__GNUC__)
+	stack_end = (u32 )&_stack_end;
+	stack_start = (u32 )&__undef_stack;
+	stack_size = stack_start-stack_end;
+
+	/* Flush stack memory to save return address */
+	Xil_DCacheFlushRange(stack_end, stack_size);
+#endif
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+
+	/*invalidate all D cache*/
+	mtcp(XREG_CP15_INVAL_DC_ALL, 0);
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************/
+/**
+* @brief    Invalidate a Data cache line. If the byte specified by the
+*           address (adr) is cached by the data cache, the cacheline
+*           containing that byte is invalidated.If the cacheline is modified
+* 	        (dirty), the modified contents are lost and are NOT written
+*           to system memory before the line is invalidated.
+*
+*
+* @param	adr: 32bit address of the data to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateLine(INTPTR adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+	mtcp(XREG_CP15_INVAL_DC_LINE_MVA_POC, (adr & (~0x1F)));
+
+		/* Wait for invalidate to complete */
+	dsb();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************/
+/**
+* @brief    Invalidate the Data cache for the given address range.
+*           If the bytes specified by the address (adr) are cached by the
+*           Data cache,the cacheline containing that byte is invalidated.
+*           If the cacheline is modified (dirty), the modified contents are
+*           lost and are NOT written to system memory before the line is
+*           invalidated.
+*
+* @param	adr: 32bit start address of the range to be invalidated.
+* @param	len: Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateRange(INTPTR adr, u32 len)
+{
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 tempadr = adr;
+	u32 tempend;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0U) {
+		end = tempadr + len;
+		tempend = end;
+		/* Select L1 Data cache in CSSR */
+		mtcp(XREG_CP15_CACHE_SIZE_SEL, 0U);
+
+		if ((tempadr & (cacheline-1U)) != 0U) {
+			tempadr &= (~(cacheline - 1U));
+
+			Xil_DCacheFlushLine(tempadr);
+		}
+		if ((tempend & (cacheline-1U)) != 0U) {
+			tempend &= (~(cacheline - 1U));
+
+			Xil_DCacheFlushLine(tempend);
+		}
+
+		while (tempadr < tempend) {
+
+		/* Invalidate Data cache line */
+		asm_inval_dc_line_mva_poc(tempadr);
+
+		tempadr += cacheline;
+		}
+	}
+
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************/
+/**
+* @brief    Flush the entire Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+****************************************************************************/
+void Xil_DCacheFlush(void)
+{
+	register u32 CsidReg, C7Reg;
+	u32 CacheSize, LineSize, NumWays;
+	u32 Way, WayIndex, Set, SetIndex, NumSet;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+
+#if defined (__GNUC__)
+	CsidReg = mfcp(XREG_CP15_CACHE_SIZE_ID);
+#elif defined (__ICCARM__)
+	 mfcp(XREG_CP15_CACHE_SIZE_ID,CsidReg);
+#endif
+	/* Determine Cache Size */
+
+	CacheSize = (CsidReg >> 13U) & 0x000001FFU;
+	CacheSize += 0x00000001U;
+	CacheSize *= (u32)128;    /* to get number of bytes */
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x000003ffU) >> 3U;
+	NumWays += 0x00000001U;
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	NumSet = CacheSize/NumWays;
+	NumSet /= (0x00000001U << LineSize);
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex = 0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex = 0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set;
+			/* Flush by Set/Way */
+			asm_clean_inval_dc_line_sw(C7Reg);
+
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += 0x40000000U;
+	}
+
+	/* Wait for flush to complete */
+	dsb();
+	mtcpsr(currmask);
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************/
+/**
+* @brief   Flush a Data cache line. If the byte specified by the address (adr)
+*          is cached by the Data cache, the cacheline containing that byte is
+*          invalidated.	If the cacheline is modified (dirty), the entire
+*          contents of the cacheline are written to system memory before the
+*          line is invalidated.
+*
+* @param   adr: 32bit address of the data to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheFlushLine(INTPTR adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+
+	mtcp(XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC, (adr & (~0x1F)));
+
+		/* Wait for flush to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************/
+/**
+* @brief    Flush the Data cache for the given address range.
+*           If the bytes specified by the address (adr) are cached by the
+*           Data cache, the cacheline containing those bytes is invalidated.If
+*           the cacheline is modified (dirty), the written to system memory
+*           before the lines are invalidated.
+*
+* @param	adr: 32bit start address of the range to be flushed.
+* @param	len: Length of the range to be flushed in bytes
+*
+* @return	None.
+*
+****************************************************************************/
+void Xil_DCacheFlushRange(INTPTR adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0x00000000U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr &= ~(cacheline - 1U);
+
+		while (LocalAddr < end) {
+			/* Flush Data cache line */
+			asm_clean_inval_dc_line_mva_poc(LocalAddr);
+
+			LocalAddr += cacheline;
+		}
+	}
+	dsb();
+	mtcpsr(currmask);
+}
+/****************************************************************************/
+/**
+* @brief    Store a Data cache line. If the byte specified by the address
+*           (adr) is cached by the Data cache and the cacheline is modified
+*           (dirty), the entire contents of the cacheline are written to
+*           system memory.After the store completes, the cacheline is marked
+*           as unmodified (not dirty).
+*
+* @param	adr: 32bit address of the data to be stored
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheStoreLine(INTPTR adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+	mtcp(XREG_CP15_CLEAN_DC_LINE_MVA_POC, (adr & (~0x1F)));
+
+	/* Wait for store to complete */
+	dsb();
+	isb();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************/
+/**
+* @brief    Enable the instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+****************************************************************************/
+void Xil_ICacheEnable(void)
+{
+	register u32 CtrlReg;
+
+	/* enable caches only if they are disabled */
+#if defined (__GNUC__)
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+#endif
+	if ((CtrlReg & XREG_CP15_CONTROL_I_BIT)==0x00000000U) {
+		/* invalidate the instruction cache */
+		mtcp(XREG_CP15_INVAL_IC_POU, 0);
+
+		/* enable the instruction cache */
+		CtrlReg |= (XREG_CP15_CONTROL_I_BIT);
+
+		mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	}
+}
+
+/****************************************************************************/
+/**
+* @brief    Disable the instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+****************************************************************************/
+void Xil_ICacheDisable(void)
+{
+	register u32 CtrlReg;
+
+	dsb();
+
+	/* invalidate the instruction cache */
+	mtcp(XREG_CP15_INVAL_IC_POU, 0);
+
+		/* disable the instruction cache */
+#if defined (__GNUC__)
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+#endif
+
+	CtrlReg &= ~(XREG_CP15_CONTROL_I_BIT);
+
+	mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+}
+
+/****************************************************************************/
+/**
+* @brief    Invalidate the entire instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+****************************************************************************/
+void Xil_ICacheInvalidate(void)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 1);
+
+	/* invalidate the instruction cache */
+	mtcp(XREG_CP15_INVAL_IC_POU, 0);
+
+	/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************/
+/**
+* @brief    Invalidate an instruction cache line.If the instruction specified
+*           by the address is cached by the instruction cache, the
+*           cacheline containing that instruction is invalidated.
+*
+* @param	adr: 32bit address of the instruction to be invalidated.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_ICacheInvalidateLine(INTPTR adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 1);
+	mtcp(XREG_CP15_INVAL_IC_LINE_MVA_POU, (adr & (~0x1F)));
+
+		/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************/
+/**
+* @brief    Invalidate the instruction cache for the given address range.
+*           If the bytes specified by the address (adr) are cached by the
+*           Data cache, the cacheline containing that byte is invalidated.
+*           If the cachelineis modified (dirty), the modified contents are
+*           lost  and are NOT written to system memory before the line is
+*           invalidated.
+*
+* @param	adr: 32bit start address of the range to be invalidated.
+* @param	len: Length of the range to be invalidated in bytes.
+*
+* @return	None.
+*
+****************************************************************************/
+void Xil_ICacheInvalidateRange(INTPTR adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	if (len != 0x00000000U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr = LocalAddr & ~(cacheline - 1U);
+
+		/* Select cache L0 I-cache in CSSR */
+		mtcp(XREG_CP15_CACHE_SIZE_SEL, 1U);
+
+		while (LocalAddr < end) {
+
+			/* Invalidate L1 I-cache line */
+			asm_inval_ic_line_mva_pou(LocalAddr);
+
+			LocalAddr += cacheline;
+		}
+	}
+
+	/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_cache.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_cache.h
new file mode 100644
index 0000000..ad1d10a
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_cache.h
@@ -0,0 +1,113 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.h
+*
+* @addtogroup r5_cache_apis Cortex R5 Processor Cache Functions
+*
+* Cache functions provide access to cache related operations such as flush
+*  and invalidate for instruction and data caches. It gives option to perform
+* the cache operations on a single cacheline, a range of memory and an entire
+* cache.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 6.2   mus  01/27/17 Updated to support IAR compiler
+* 

+*
+******************************************************************************/
+#ifndef XIL_CACHE_H
+#define XIL_CACHE_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined (__GNUC__)
+#define asm_inval_dc_line_mva_poc(param) __asm__ __volatile__("mcr " \
+		XREG_CP15_INVAL_DC_LINE_MVA_POC :: "r" (param))
+
+#define asm_clean_inval_dc_line_sw(param) __asm__ __volatile__("mcr " \
+		XREG_CP15_CLEAN_INVAL_DC_LINE_SW :: "r" (param))
+
+#define asm_clean_inval_dc_line_mva_poc(param) __asm__ __volatile__("mcr " \
+		XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC :: "r" (param))
+
+#define asm_inval_ic_line_mva_pou(param) __asm__ __volatile__("mcr " \
+		XREG_CP15_INVAL_IC_LINE_MVA_POU :: "r" (param))
+#elif defined (__ICCARM__)
+#define asm_inval_dc_line_mva_poc(param) __asm volatile("mcr " \
+		XREG_CP15_INVAL_DC_LINE_MVA_POC :: "r" (param))
+
+#define asm_clean_inval_dc_line_sw(param) __asm volatile("mcr " \
+		XREG_CP15_CLEAN_INVAL_DC_LINE_SW :: "r" (param))
+
+#define asm_clean_inval_dc_line_mva_poc(param) __asm volatile("mcr " \
+		XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC :: "r" (param))
+
+#define asm_inval_ic_line_mva_pou(param) __asm volatile("mcr " \
+		XREG_CP15_INVAL_IC_LINE_MVA_POU :: "r" (param))
+#endif
+
+void Xil_DCacheEnable(void);
+void Xil_DCacheDisable(void);
+void Xil_DCacheInvalidate(void);
+void Xil_DCacheInvalidateRange(INTPTR adr, u32 len);
+void Xil_DCacheFlush(void);
+void Xil_DCacheFlushRange(INTPTR adr, u32 len);
+void Xil_DCacheInvalidateLine(INTPTR adr);
+void Xil_DCacheFlushLine(INTPTR adr);
+void Xil_DCacheStoreLine(INTPTR adr);
+
+void Xil_ICacheEnable(void);
+void Xil_ICacheDisable(void);
+void Xil_ICacheInvalidate(void);
+void Xil_ICacheInvalidateRange(INTPTR adr, u32 len);
+void Xil_ICacheInvalidateLine(INTPTR adr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/**
+* @} End of "addtogroup r5_cache_apis".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_cache_vxworks.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_cache_vxworks.h
new file mode 100644
index 0000000..6e8cfa7
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_cache_vxworks.h
@@ -0,0 +1,93 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache_vxworks.h
+*
+* Contains the cache related functions for VxWorks that is wrapped by
+* xil_cache.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  12/11/09 Initial release
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+#ifndef XIL_CACHE_VXWORKS_H
+#define XIL_CACHE_VXWORKS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "vxWorks.h"
+#include "vxLib.h"
+#include "sysLibExtra.h"
+#include "cacheLib.h"
+
+#if (CPU_FAMILY==PPC)
+
+#define Xil_DCacheEnable()		cacheEnable(DATA_CACHE)
+
+#define Xil_DCacheDisable()		cacheDisable(DATA_CACHE)
+
+#define Xil_DCacheInvalidateRange(Addr, Len) \
+		cacheInvalidate(DATA_CACHE, (void *)(Addr), (Len))
+
+#define Xil_DCacheFlushRange(Addr, Len) \
+		cacheFlush(DATA_CACHE, (void *)(Addr), (Len))
+
+#define Xil_ICacheEnable()		cacheEnable(INSTRUCTION_CACHE)
+
+#define Xil_ICacheDisable()		cacheDisable(INSTRUCTION_CACHE)
+
+#define Xil_ICacheInvalidateRange(Addr, Len) \
+		cacheInvalidate(INSTRUCTION_CACHE, (void *)(Addr), (Len))
+
+
+#else
+#error "Unknown processor / architecture. Must be PPC for VxWorks."
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_exception.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_exception.c
new file mode 100644
index 0000000..4a2f2cf
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_exception.c
@@ -0,0 +1,334 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xil_exception.c
+*
+* This file contains low-level driver functions for the Cortex A53,A9,R5 exception
+* Handler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp  	 28/05/15 First release
+* 6.0   mus      27/07/16 Consolidated exceptions for a53,a9 and r5
+*                         processors and added Xil_UndefinedExceptionHandler
+*                         for a53 32 bit and r5 as well.
+* 6.4   mus      08/06/17 Updated debug prints to replace %x with the %lx, to
+*                         fix the warnings.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+#include "xpseudo_asm.h"
+#include "xdebug.h"
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Function Prototypes *****************************/
+static void Xil_ExceptionNullHandler(void *Data);
+/************************** Variable Definitions *****************************/
+/*
+ * Exception vector table to store handlers for each exception vector.
+ */
+#if defined (__aarch64__)
+XExc_VectorTableEntry XExc_VectorTable[XIL_EXCEPTION_ID_LAST + 1] =
+{
+        {Xil_ExceptionNullHandler, NULL},
+        {Xil_SyncAbortHandler, NULL},
+        {Xil_ExceptionNullHandler, NULL},
+        {Xil_ExceptionNullHandler, NULL},
+        {Xil_SErrorAbortHandler, NULL},
+
+};
+#else
+XExc_VectorTableEntry XExc_VectorTable[XIL_EXCEPTION_ID_LAST + 1] =
+{
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_UndefinedExceptionHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_PrefetchAbortHandler, NULL},
+	{Xil_DataAbortHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+};
+#endif
+#if !defined (__aarch64__)
+u32 DataAbortAddr;       /* Address of instruction causing data abort */
+u32 PrefetchAbortAddr;   /* Address of instruction causing prefetch abort */
+u32 UndefinedExceptionAddr;   /* Address of instruction causing Undefined
+							     exception */
+#endif
+
+/*****************************************************************************/
+
+/****************************************************************************/
+/**
+*
+* This function is a stub Handler that is the default Handler that gets called
+* if the application has not setup a Handler for a specific  exception. The
+* function interface has to match the interface specified for a Handler even
+* though none of the arguments are used.
+*
+* @param	Data is unused by this function.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void Xil_ExceptionNullHandler(void *Data)
+{
+	(void) Data;
+DieLoop: goto DieLoop;
+}
+
+/****************************************************************************/
+/**
+* @brief	The function is a common API used to initialize exception handlers
+*			across all supported arm processors. For ARM Cortex-A53, Cortex-R5,
+*			and Cortex-A9, the exception handlers are being initialized
+*			statically and this function does not do anything.
+* 			However, it is still present to take care of backward compatibility
+*			issues (in earlier versions of BSPs, this API was being used to
+*			initialize exception handlers).
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xil_ExceptionInit(void)
+{
+	return;
+}
+
+/*****************************************************************************/
+/**
+* @brief	Register a handler for a specific exception. This handler is being
+*			called when the processor encounters the specified exception.
+*
+* @param	exception_id contains the ID of the exception source and should
+*			be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+*			See xil_exception.h for further information.
+* @param	Handler to the Handler for that exception.
+* @param	Data is a reference to Data that will be passed to the
+*			Handler when it gets called.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRegisterHandler(u32 Exception_id,
+				    Xil_ExceptionHandler Handler,
+				    void *Data)
+{
+	XExc_VectorTable[Exception_id].Handler = Handler;
+	XExc_VectorTable[Exception_id].Data = Data;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief	Removes the Handler for a specific exception Id. The stub Handler
+*			is then registered for this exception Id.
+*
+* @param	exception_id contains the ID of the exception source and should
+*			be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+*			See xil_exception.h for further information.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRemoveHandler(u32 Exception_id)
+{
+	Xil_ExceptionRegisterHandler(Exception_id,
+				       Xil_ExceptionNullHandler,
+				       NULL);
+}
+
+#if defined (__aarch64__)
+/*****************************************************************************/
+/**
+*
+* Default Synchronous abort handler which prints a debug message on console if
+* Debug flag is enabled
+*
+* @param        None
+*
+* @return       None.
+*
+* @note         None.
+*
+****************************************************************************/
+
+void Xil_SyncAbortHandler(void *CallBackRef){
+	(void) CallBackRef;
+	xdbg_printf(XDBG_DEBUG_ERROR, "Synchronous abort \n");
+	while(1) {
+		;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* Default SError abort handler which prints a debug message on console if
+* Debug flag is enabled
+*
+* @param        None
+*
+* @return       None.
+*
+* @note         None.
+*
+****************************************************************************/
+void Xil_SErrorAbortHandler(void *CallBackRef){
+	(void) CallBackRef;
+	xdbg_printf(XDBG_DEBUG_ERROR, "Synchronous abort \n");
+	while(1) {
+		;
+	}
+}
+#else
+/*****************************************************************************/
+/*
+*
+* Default Data abort handler which prints data fault status register through
+* which information about data fault can be acquired
+*
+* @param	None
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+
+void Xil_DataAbortHandler(void *CallBackRef){
+	(void) CallBackRef;
+#ifdef DEBUG
+	u32 FaultStatus;
+
+        xdbg_printf(XDBG_DEBUG_ERROR, "Data abort \n");
+        #ifdef __GNUC__
+	FaultStatus = mfcp(XREG_CP15_DATA_FAULT_STATUS);
+	    #elif defined (__ICCARM__)
+	        mfcp(XREG_CP15_DATA_FAULT_STATUS,FaultStatus);
+	    #else
+	        { volatile register u32 Reg __asm(XREG_CP15_DATA_FAULT_STATUS);
+	        FaultStatus = Reg; }
+	    #endif
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Data abort with Data Fault Status Register  %lx\n",FaultStatus);
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Address of Instruction causing Data abort %lx\n",DataAbortAddr);
+#endif
+	while(1) {
+		;
+	}
+}
+
+/*****************************************************************************/
+/*
+*
+* Default Prefetch abort handler which prints prefetch fault status register through
+* which information about instruction prefetch fault can be acquired
+*
+* @param	None
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_PrefetchAbortHandler(void *CallBackRef){
+	(void) CallBackRef;
+#ifdef DEBUG
+	u32 FaultStatus;
+
+    xdbg_printf(XDBG_DEBUG_ERROR, "Prefetch abort \n");
+        #ifdef __GNUC__
+	FaultStatus = mfcp(XREG_CP15_INST_FAULT_STATUS);
+	    #elif defined (__ICCARM__)
+			mfcp(XREG_CP15_INST_FAULT_STATUS,FaultStatus);
+	    #else
+			{ volatile register u32 Reg __asm(XREG_CP15_INST_FAULT_STATUS);
+			FaultStatus = Reg; }
+		#endif
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Prefetch abort with Instruction Fault Status Register  %lx\n",FaultStatus);
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Address of Instruction causing Prefetch abort %lx\n",PrefetchAbortAddr);
+#endif
+	while(1) {
+		;
+	}
+}
+/*****************************************************************************/
+/*
+*
+* Default undefined exception handler which prints address of the undefined
+* instruction if debug prints are enabled
+*
+* @param	None
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_UndefinedExceptionHandler(void *CallBackRef){
+	(void) CallBackRef;
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Address of the undefined instruction %lx\n",UndefinedExceptionAddr);
+	while(1) {
+		;
+	}
+}
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_exception.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_exception.h
new file mode 100644
index 0000000..ad48222
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_exception.h
@@ -0,0 +1,256 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_exception.h
+*
+* This header file contains ARM Cortex A53,A9,R5 specific exception related APIs.
+* For exception related functions that can be used across all Xilinx supported
+* processors, please use xil_exception.h.
+*
+* @addtogroup arm_exception_apis ARM Processor Exception Handling
+* @{
+* ARM processors specific exception related APIs for cortex A53,A9 and R5 can
+* utilized for enabling/disabling IRQ, registering/removing handler for
+* exceptions or initializing exception vector table with null handler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp  	 28/05/15 First release
+* 6.0   mus      27/07/16 Consolidated file for a53,a9 and r5 processors
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_EXCEPTION_H /* prevent circular inclusions */
+#define XIL_EXCEPTION_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions ****************************/
+
+#define XIL_EXCEPTION_FIQ	XREG_CPSR_FIQ_ENABLE
+#define XIL_EXCEPTION_IRQ	XREG_CPSR_IRQ_ENABLE
+#define XIL_EXCEPTION_ALL	(XREG_CPSR_FIQ_ENABLE | XREG_CPSR_IRQ_ENABLE)
+
+#define XIL_EXCEPTION_ID_FIRST			0U
+#if defined (__aarch64__)
+#define XIL_EXCEPTION_ID_SYNC_INT		1U
+#define XIL_EXCEPTION_ID_IRQ_INT		2U
+#define XIL_EXCEPTION_ID_FIQ_INT		3U
+#define XIL_EXCEPTION_ID_SERROR_ABORT_INT		4U
+#define XIL_EXCEPTION_ID_LAST			5U
+#else
+#define XIL_EXCEPTION_ID_RESET			0U
+#define XIL_EXCEPTION_ID_UNDEFINED_INT		1U
+#define XIL_EXCEPTION_ID_SWI_INT		2U
+#define XIL_EXCEPTION_ID_PREFETCH_ABORT_INT	3U
+#define XIL_EXCEPTION_ID_DATA_ABORT_INT		4U
+#define XIL_EXCEPTION_ID_IRQ_INT		5U
+#define XIL_EXCEPTION_ID_FIQ_INT		6U
+#define XIL_EXCEPTION_ID_LAST			6U
+#endif
+
+/*
+ * XIL_EXCEPTION_ID_INT is defined for all Xilinx processors.
+ */
+#define XIL_EXCEPTION_ID_INT	XIL_EXCEPTION_ID_IRQ_INT
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef is the exception handler function.
+ */
+typedef void (*Xil_ExceptionHandler)(void *data);
+typedef void (*Xil_InterruptHandler)(void *data);
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* @brief	Enable Exceptions.
+*
+* @param	Mask: Value for enabling the exceptions.
+*
+* @return	None.
+*
+* @note		If bit is 0, exception is enabled.
+*			C-Style signature: void Xil_ExceptionEnableMask(Mask)
+*
+******************************************************************************/
+#if defined (__GNUC__) || defined (__ICCARM__)
+#define Xil_ExceptionEnableMask(Mask)	\
+		mtcpsr(mfcpsr() & ~ ((Mask) & XIL_EXCEPTION_ALL))
+#else
+#define Xil_ExceptionEnableMask(Mask)	\
+		{								\
+		  register u32 Reg __asm("cpsr"); \
+		  mtcpsr((Reg) & (~((Mask) & XIL_EXCEPTION_ALL))); \
+		}
+#endif
+/****************************************************************************/
+/**
+* @brief	Enable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionEnable() \
+		Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ)
+
+/****************************************************************************/
+/**
+* @brief	Disable Exceptions.
+*
+* @param	Mask: Value for disabling the exceptions.
+*
+* @return	None.
+*
+* @note		If bit is 1, exception is disabled.
+*			C-Style signature: Xil_ExceptionDisableMask(Mask)
+*
+******************************************************************************/
+#if defined (__GNUC__) || defined (__ICCARM__)
+#define Xil_ExceptionDisableMask(Mask)	\
+		mtcpsr(mfcpsr() | ((Mask) & XIL_EXCEPTION_ALL))
+#else
+#define Xil_ExceptionDisableMask(Mask)	\
+		{									\
+		  register u32 Reg __asm("cpsr"); \
+		  mtcpsr((Reg) | ((Mask) & XIL_EXCEPTION_ALL)); \
+		}
+#endif
+/****************************************************************************/
+/**
+* Disable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionDisable() \
+		Xil_ExceptionDisableMask(XIL_EXCEPTION_IRQ)
+
+#if !defined (__aarch64__) && !defined (ARMA53_32)
+/****************************************************************************/
+/**
+* @brief	Enable nested interrupts by clearing the I and F bits in CPSR. This
+* 			API is defined for cortex-a9 and cortex-r5.
+*
+* @return   None.
+*
+* @note     This macro is supposed to be used from interrupt handlers. In the
+*			interrupt handler the interrupts are disabled by default (I and F
+*			are 1). To allow nesting of interrupts, this macro should be
+*			used. It clears the I and F bits by changing the ARM mode to
+*			system mode. Once these bits are cleared and provided the
+*			preemption of interrupt conditions are met in the GIC, nesting of
+*			interrupts will start happening.
+*			Caution: This macro must be used with caution. Before calling this
+*			macro, the user must ensure that the source of the current IRQ
+*			is appropriately cleared. Otherwise, as soon as we clear the I and
+*			F bits, there can be an infinite loop of interrupts with an
+*			eventual crash (all the stack space getting consumed).
+******************************************************************************/
+#define Xil_EnableNestedInterrupts() \
+		__asm__ __volatile__ ("stmfd   sp!, {lr}"); \
+		__asm__ __volatile__ ("mrs     lr, spsr");  \
+		__asm__ __volatile__ ("stmfd   sp!, {lr}"); \
+		__asm__ __volatile__ ("msr     cpsr_c, #0x1F"); \
+		__asm__ __volatile__ ("stmfd   sp!, {lr}");
+
+/****************************************************************************/
+/**
+* @brief	Disable the nested interrupts by setting the I and F bits. This API
+*			is defined for cortex-a9 and cortex-r5.
+*
+* @return   None.
+*
+* @note     This macro is meant to be called in the interrupt service routines.
+*			This macro cannot be used independently. It can only be used when
+*			nesting of interrupts have been enabled by using the macro
+*			Xil_EnableNestedInterrupts(). In a typical flow, the user first
+*			calls the Xil_EnableNestedInterrupts in the ISR at the appropriate
+*			point. The user then must call this macro before exiting the interrupt
+*			service routine. This macro puts the ARM back in IRQ/FIQ mode and
+*			hence sets back the I and F bits.
+******************************************************************************/
+#define Xil_DisableNestedInterrupts() \
+		__asm__ __volatile__ ("ldmfd   sp!, {lr}");   \
+		__asm__ __volatile__ ("msr     cpsr_c, #0x92"); \
+		__asm__ __volatile__ ("ldmfd   sp!, {lr}"); \
+		__asm__ __volatile__ ("msr     spsr_cxsf, lr"); \
+		__asm__ __volatile__ ("ldmfd   sp!, {lr}"); \
+
+#endif
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+extern void Xil_ExceptionRegisterHandler(u32 Exception_id,
+					 Xil_ExceptionHandler Handler,
+					 void *Data);
+
+extern void Xil_ExceptionRemoveHandler(u32 Exception_id);
+
+extern void Xil_ExceptionInit(void);
+#if defined (__aarch64__)
+void Xil_SyncAbortHandler(void *CallBackRef);
+void Xil_SErrorAbortHandler(void *CallBackRef);
+#else
+extern void Xil_DataAbortHandler(void *CallBackRef);
+extern void Xil_PrefetchAbortHandler(void *CallBackRef);
+extern void Xil_UndefinedExceptionHandler(void *CallBackRef);
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_EXCEPTION_H */
+/**
+* @} End of "addtogroup arm_exception_apis".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_hal.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_hal.h
new file mode 100644
index 0000000..d4434d0
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_hal.h
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_hal.h
+*
+* Contains all the HAL header files.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/28/09 Initial release
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+#ifndef XIL_HAL_H
+#define XIL_HAL_H
+
+#include "xil_cache.h"
+#include "xil_io.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+#include "xil_types.h"
+
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_io.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_io.c
new file mode 100644
index 0000000..90bfc81
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_io.c
@@ -0,0 +1,102 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.c
+*
+* Contains I/O functions for memory-mapped or non-memory-mapped I/O
+* architectures.
+*
+* @note
+*
+* This file contains architecture-dependent code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/*****************************************************************************/
+/**
+*
+* @brief    Perform a 16-bit endian converion.
+*
+* @param	Data: 16 bit value to be converted
+*
+* @return	16 bit Data with converted endianess
+*
+******************************************************************************/
+u16 Xil_EndianSwap16(u16 Data)
+{
+	return (u16) (((Data & 0xFF00U) >> 8U) | ((Data & 0x00FFU) << 8U));
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Perform a 32-bit endian converion.
+*
+* @param	Data: 32 bit value to be converted
+*
+* @return	32 bit data with converted endianess
+*
+******************************************************************************/
+u32 Xil_EndianSwap32(u32 Data)
+{
+	u16 LoWord;
+	u16 HiWord;
+
+	/* get each of the half words from the 32 bit word */
+
+	LoWord = (u16) (Data & 0x0000FFFFU);
+	HiWord = (u16) ((Data & 0xFFFF0000U) >> 16U);
+
+	/* byte swap each of the 16 bit half words */
+
+	LoWord = (((LoWord & 0xFF00U) >> 8U) | ((LoWord & 0x00FFU) << 8U));
+	HiWord = (((HiWord & 0xFF00U) >> 8U) | ((HiWord & 0x00FFU) << 8U));
+
+	/* swap the half words before returning the value */
+
+	return ((((u32)LoWord) << (u32)16U) | (u32)HiWord);
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_io.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_io.h
new file mode 100644
index 0000000..9c5aa43
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_io.h
@@ -0,0 +1,345 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.h
+*
+* @addtogroup common_io_interfacing_apis Register IO interfacing APIs
+*
+* The xil_io.h file contains the interface for the general I/O component, which
+* encapsulates the Input/Output functions for the processors that do not
+* require any special I/O handling.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 6.00  mus      08/19/16 Remove checking of __LITTLE_ENDIAN__ flag for
+*                         ARM processors
+* 

+******************************************************************************/
+
+#ifndef XIL_IO_H           /* prevent circular inclusions */
+#define XIL_IO_H           /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_printf.h"
+
+#if defined (__MICROBLAZE__)
+#include "mb_interface.h"
+#else
+#include "xpseudo_asm.h"
+#endif
+
+/************************** Function Prototypes ******************************/
+u16 Xil_EndianSwap16(u16 Data);
+u32 Xil_EndianSwap32(u32 Data);
+#ifdef ENABLE_SAFETY
+extern u32 XStl_RegUpdate(u32 RegAddr, u32 RegVal);
+#endif
+
+/***************** Macros (Inline Functions) Definitions *********************/
+#if defined __GNUC__
+#if defined (__MICROBLAZE__)
+#  define INST_SYNC		mbar(0)
+#  define DATA_SYNC		mbar(1)
+# else
+#  define SYNCHRONIZE_IO	dmb()
+#  define INST_SYNC		isb()
+#  define DATA_SYNC		dsb()
+# endif
+#else
+# define SYNCHRONIZE_IO
+# define INST_SYNC
+# define DATA_SYNC
+# define INST_SYNC
+# define DATA_SYNC
+#endif
+
+#if defined (__GNUC__) || defined (__ICCARM__) || defined (__MICROBLAZE__)
+#define INLINE inline
+#else
+#define INLINE __inline
+#endif
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an input operation for a memory location by reading
+*           from the specified address and returning the 8 bit Value read from
+*            that address.
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 8 bit Value read from the specified input address.
+
+*
+******************************************************************************/
+static INLINE u8 Xil_In8(UINTPTR Addr)
+{
+	return *(volatile u8 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an input operation for a memory location by reading from
+*           the specified address and returning the 16 bit Value read from that
+*           address.
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 16 bit Value read from the specified input address.
+*
+******************************************************************************/
+static INLINE u16 Xil_In16(UINTPTR Addr)
+{
+	return *(volatile u16 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an input operation for a memory location by
+*           reading from the specified address and returning the 32 bit Value
+*           read  from that address.
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 32 bit Value read from the specified input address.
+*
+******************************************************************************/
+static INLINE u32 Xil_In32(UINTPTR Addr)
+{
+	return *(volatile u32 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief     Performs an input operation for a memory location by reading the
+*            64 bit Value read  from that address.
+*
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 64 bit Value read from the specified input address.
+*
+******************************************************************************/
+static INLINE u64 Xil_In64(UINTPTR Addr)
+{
+	return *(volatile u64 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for an memory location by
+*           writing the 8 bit Value to the the specified address.
+*
+* @param	Addr: contains the address to perform the output operation
+* @param	Value: contains the 8 bit Value to be written at the specified
+*           address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out8(UINTPTR Addr, u8 Value)
+{
+	volatile u8 *LocalAddr = (volatile u8 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for a memory location by writing the
+*            16 bit Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+* @param	Value contains the Value to be written at the specified address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out16(UINTPTR Addr, u16 Value)
+{
+	volatile u16 *LocalAddr = (volatile u16 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for a memory location by writing the
+*           32 bit Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+* @param	Value contains the 32 bit Value to be written at the specified
+*           address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out32(UINTPTR Addr, u32 Value)
+{
+#ifndef ENABLE_SAFETY
+	volatile u32 *LocalAddr = (volatile u32 *)Addr;
+	*LocalAddr = Value;
+#else
+	XStl_RegUpdate(Addr, Value);
+#endif
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for a memory location by writing the
+*           64 bit Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+* @param	Value contains 64 bit Value to be written at the specified address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out64(UINTPTR Addr, u64 Value)
+{
+	volatile u64 *LocalAddr = (volatile u64 *)Addr;
+	*LocalAddr = Value;
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+# define Xil_In16LE	Xil_In16
+# define Xil_In32LE	Xil_In32
+# define Xil_Out16LE	Xil_Out16
+# define Xil_Out32LE	Xil_Out32
+# define Xil_Htons	Xil_EndianSwap16
+# define Xil_Htonl	Xil_EndianSwap32
+# define Xil_Ntohs	Xil_EndianSwap16
+# define Xil_Ntohl	Xil_EndianSwap32
+# else
+# define Xil_In16BE	Xil_In16
+# define Xil_In32BE	Xil_In32
+# define Xil_Out16BE	Xil_Out16
+# define Xil_Out32BE	Xil_Out32
+# define Xil_Htons(Data) (Data)
+# define Xil_Htonl(Data) (Data)
+# define Xil_Ntohs(Data) (Data)
+# define Xil_Ntohl(Data) (Data)
+#endif
+#else
+# define Xil_In16LE	Xil_In16
+# define Xil_In32LE	Xil_In32
+# define Xil_Out16LE	Xil_Out16
+# define Xil_Out32LE	Xil_Out32
+# define Xil_Htons	Xil_EndianSwap16
+# define Xil_Htonl	Xil_EndianSwap32
+# define Xil_Ntohs	Xil_EndianSwap16
+# define Xil_Ntohl	Xil_EndianSwap32
+#endif
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE u16 Xil_In16BE(UINTPTR Addr)
+#else
+static INLINE u16 Xil_In16LE(UINTPTR Addr)
+#endif
+#else
+static INLINE u16 Xil_In16BE(UINTPTR Addr)
+#endif
+{
+	u16 value = Xil_In16(Addr);
+	return Xil_EndianSwap16(value);
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE u32 Xil_In32BE(UINTPTR Addr)
+#else
+static INLINE u32 Xil_In32LE(UINTPTR Addr)
+#endif
+#else
+static INLINE u32 Xil_In32BE(UINTPTR Addr)
+#endif
+{
+	u32 value = Xil_In32(Addr);
+	return Xil_EndianSwap32(value);
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE void Xil_Out16BE(UINTPTR Addr, u16 Value)
+#else
+static INLINE void Xil_Out16LE(UINTPTR Addr, u16 Value)
+#endif
+#else
+static INLINE void Xil_Out16BE(UINTPTR Addr, u16 Value)
+#endif
+{
+	Value = Xil_EndianSwap16(Value);
+	Xil_Out16(Addr, Value);
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE void Xil_Out32BE(UINTPTR Addr, u32 Value)
+#else
+static INLINE void Xil_Out32LE(UINTPTR Addr, u32 Value)
+#endif
+#else
+static INLINE void Xil_Out32BE(UINTPTR Addr, u32 Value)
+#endif
+{
+	Value = Xil_EndianSwap32(Value);
+	Xil_Out32(Addr, Value);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_io_interfacing_apis".
+*/
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_macroback.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_macroback.h
new file mode 100644
index 0000000..ebafde8
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_macroback.h
@@ -0,0 +1,1052 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*********************************************************************/
+/**
+ * @file xil_macroback.h
+ *
+ * This header file is meant to bring back the removed _m macros.
+ * This header file must be included last.
+ * The following macros are not defined here due to the driver change:
+ *   XGpio_mSetDataDirection
+ *   XGpio_mGetDataReg
+ *   XGpio_mSetDataReg
+ *   XIIC_RESET
+ *   XIIC_CLEAR_STATS
+ *   XSpi_mReset
+ *   XSysAce_mSetCfgAddr
+ *   XSysAce_mIsCfgDone
+ *   XTft_mSetPixel
+ *   XTft_mGetPixel
+ *   XWdtTb_mEnableWdt
+ *   XWdtTb_mDisbleWdt
+ *   XWdtTb_mRestartWdt
+ *   XWdtTb_mGetTimebaseReg
+ *   XWdtTb_mHasReset
+ *
+ * Please refer the corresonding driver document for replacement.
+ *
+ *********************************************************************/
+
+#ifndef XIL_MACROBACK_H
+#define XIL_MACROBACK_H
+
+/*********************************************************************/
+/**
+ * Macros for Driver XCan
+ *
+ *********************************************************************/
+#ifndef XCan_mReadReg
+#define XCan_mReadReg XCan_ReadReg
+#endif
+
+#ifndef XCan_mWriteReg
+#define XCan_mWriteReg XCan_WriteReg
+#endif
+
+#ifndef XCan_mIsTxDone
+#define XCan_mIsTxDone XCan_IsTxDone
+#endif
+
+#ifndef XCan_mIsTxFifoFull
+#define XCan_mIsTxFifoFull XCan_IsTxFifoFull
+#endif
+
+#ifndef XCan_mIsHighPriorityBufFull
+#define XCan_mIsHighPriorityBufFull XCan_IsHighPriorityBufFull
+#endif
+
+#ifndef XCan_mIsRxEmpty
+#define XCan_mIsRxEmpty XCan_IsRxEmpty
+#endif
+
+#ifndef XCan_mIsAcceptFilterBusy
+#define XCan_mIsAcceptFilterBusy XCan_IsAcceptFilterBusy
+#endif
+
+#ifndef XCan_mCreateIdValue
+#define XCan_mCreateIdValue XCan_CreateIdValue
+#endif
+
+#ifndef XCan_mCreateDlcValue
+#define XCan_mCreateDlcValue XCan_CreateDlcValue
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XDmaCentral
+ *
+ *********************************************************************/
+#ifndef XDmaCentral_mWriteReg
+#define XDmaCentral_mWriteReg XDmaCentral_WriteReg
+#endif
+
+#ifndef XDmaCentral_mReadReg
+#define XDmaCentral_mReadReg XDmaCentral_ReadReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XDsAdc
+ *
+ *********************************************************************/
+#ifndef XDsAdc_mWriteReg
+#define XDsAdc_mWriteReg XDsAdc_WriteReg
+#endif
+
+#ifndef XDsAdc_mReadReg
+#define XDsAdc_mReadReg XDsAdc_ReadReg
+#endif
+
+#ifndef XDsAdc_mIsEmpty
+#define XDsAdc_mIsEmpty XDsAdc_IsEmpty
+#endif
+
+#ifndef XDsAdc_mSetFstmReg
+#define XDsAdc_mSetFstmReg XDsAdc_SetFstmReg
+#endif
+
+#ifndef XDsAdc_mGetFstmReg
+#define XDsAdc_mGetFstmReg XDsAdc_GetFstmReg
+#endif
+
+#ifndef XDsAdc_mEnableConversion
+#define XDsAdc_mEnableConversion XDsAdc_EnableConversion
+#endif
+
+#ifndef XDsAdc_mDisableConversion
+#define XDsAdc_mDisableConversion XDsAdc_DisableConversion
+#endif
+
+#ifndef XDsAdc_mGetFifoOccyReg
+#define XDsAdc_mGetFifoOccyReg XDsAdc_GetFifoOccyReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XDsDac
+ *
+ *********************************************************************/
+#ifndef XDsDac_mWriteReg
+#define XDsDac_mWriteReg XDsDac_WriteReg
+#endif
+
+#ifndef XDsDac_mReadReg
+#define XDsDac_mReadReg XDsDac_ReadReg
+#endif
+
+#ifndef XDsDac_mIsEmpty
+#define XDsDac_mIsEmpty XDsDac_IsEmpty
+#endif
+
+#ifndef XDsDac_mFifoIsFull
+#define XDsDac_mFifoIsFull XDsDac_FifoIsFull
+#endif
+
+#ifndef XDsDac_mGetVacancy
+#define XDsDac_mGetVacancy XDsDac_GetVacancy
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XEmacLite
+ *
+ *********************************************************************/
+#ifndef XEmacLite_mReadReg
+#define XEmacLite_mReadReg XEmacLite_ReadReg
+#endif
+
+#ifndef XEmacLite_mWriteReg
+#define XEmacLite_mWriteReg XEmacLite_WriteReg
+#endif
+
+#ifndef XEmacLite_mGetTxStatus
+#define XEmacLite_mGetTxStatus XEmacLite_GetTxStatus
+#endif
+
+#ifndef XEmacLite_mSetTxStatus
+#define XEmacLite_mSetTxStatus XEmacLite_SetTxStatus
+#endif
+
+#ifndef XEmacLite_mGetRxStatus
+#define XEmacLite_mGetRxStatus XEmacLite_GetRxStatus
+#endif
+
+#ifndef XEmacLite_mSetRxStatus
+#define XEmacLite_mSetRxStatus XEmacLite_SetRxStatus
+#endif
+
+#ifndef XEmacLite_mIsTxDone
+#define XEmacLite_mIsTxDone XEmacLite_IsTxDone
+#endif
+
+#ifndef XEmacLite_mIsRxEmpty
+#define XEmacLite_mIsRxEmpty XEmacLite_IsRxEmpty
+#endif
+
+#ifndef XEmacLite_mNextTransmitAddr
+#define XEmacLite_mNextTransmitAddr XEmacLite_NextTransmitAddr
+#endif
+
+#ifndef XEmacLite_mNextReceiveAddr
+#define XEmacLite_mNextReceiveAddr XEmacLite_NextReceiveAddr
+#endif
+
+#ifndef XEmacLite_mIsMdioConfigured
+#define XEmacLite_mIsMdioConfigured XEmacLite_IsMdioConfigured
+#endif
+
+#ifndef XEmacLite_mIsLoopbackConfigured
+#define XEmacLite_mIsLoopbackConfigured XEmacLite_IsLoopbackConfigured
+#endif
+
+#ifndef XEmacLite_mGetReceiveDataLength
+#define XEmacLite_mGetReceiveDataLength XEmacLite_GetReceiveDataLength
+#endif
+
+#ifndef XEmacLite_mGetTxActive
+#define XEmacLite_mGetTxActive XEmacLite_GetTxActive
+#endif
+
+#ifndef XEmacLite_mSetTxActive
+#define XEmacLite_mSetTxActive XEmacLite_SetTxActive
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XGpio
+ *
+ *********************************************************************/
+#ifndef XGpio_mWriteReg
+#define XGpio_mWriteReg XGpio_WriteReg
+#endif
+
+#ifndef XGpio_mReadReg
+#define XGpio_mReadReg XGpio_ReadReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XHwIcap
+ *
+ *********************************************************************/
+#ifndef XHwIcap_mFifoWrite
+#define XHwIcap_mFifoWrite XHwIcap_FifoWrite
+#endif
+
+#ifndef XHwIcap_mFifoRead
+#define XHwIcap_mFifoRead XHwIcap_FifoRead
+#endif
+
+#ifndef XHwIcap_mSetSizeReg
+#define XHwIcap_mSetSizeReg XHwIcap_SetSizeReg
+#endif
+
+#ifndef XHwIcap_mGetControlReg
+#define XHwIcap_mGetControlReg XHwIcap_GetControlReg
+#endif
+
+#ifndef XHwIcap_mStartConfig
+#define XHwIcap_mStartConfig XHwIcap_StartConfig
+#endif
+
+#ifndef XHwIcap_mStartReadBack
+#define XHwIcap_mStartReadBack XHwIcap_StartReadBack
+#endif
+
+#ifndef XHwIcap_mGetStatusReg
+#define XHwIcap_mGetStatusReg XHwIcap_GetStatusReg
+#endif
+
+#ifndef XHwIcap_mIsTransferDone
+#define XHwIcap_mIsTransferDone XHwIcap_IsTransferDone
+#endif
+
+#ifndef XHwIcap_mIsDeviceBusy
+#define XHwIcap_mIsDeviceBusy XHwIcap_IsDeviceBusy
+#endif
+
+#ifndef XHwIcap_mIntrGlobalEnable
+#define XHwIcap_mIntrGlobalEnable XHwIcap_IntrGlobalEnable
+#endif
+
+#ifndef XHwIcap_mIntrGlobalDisable
+#define XHwIcap_mIntrGlobalDisable XHwIcap_IntrGlobalDisable
+#endif
+
+#ifndef XHwIcap_mIntrGetStatus
+#define XHwIcap_mIntrGetStatus XHwIcap_IntrGetStatus
+#endif
+
+#ifndef XHwIcap_mIntrDisable
+#define XHwIcap_mIntrDisable XHwIcap_IntrDisable
+#endif
+
+#ifndef XHwIcap_mIntrEnable
+#define XHwIcap_mIntrEnable XHwIcap_IntrEnable
+#endif
+
+#ifndef XHwIcap_mIntrGetEnabled
+#define XHwIcap_mIntrGetEnabled XHwIcap_IntrGetEnabled
+#endif
+
+#ifndef XHwIcap_mIntrClear
+#define XHwIcap_mIntrClear XHwIcap_IntrClear
+#endif
+
+#ifndef XHwIcap_mGetWrFifoVacancy
+#define XHwIcap_mGetWrFifoVacancy XHwIcap_GetWrFifoVacancy
+#endif
+
+#ifndef XHwIcap_mGetRdFifoOccupancy
+#define XHwIcap_mGetRdFifoOccupancy XHwIcap_GetRdFifoOccupancy
+#endif
+
+#ifndef XHwIcap_mSliceX2Col
+#define XHwIcap_mSliceX2Col XHwIcap_SliceX2Col
+#endif
+
+#ifndef XHwIcap_mSliceY2Row
+#define XHwIcap_mSliceY2Row XHwIcap_SliceY2Row
+#endif
+
+#ifndef XHwIcap_mSliceXY2Slice
+#define XHwIcap_mSliceXY2Slice XHwIcap_SliceXY2Slice
+#endif
+
+#ifndef XHwIcap_mReadReg
+#define XHwIcap_mReadReg XHwIcap_ReadReg
+#endif
+
+#ifndef XHwIcap_mWriteReg
+#define XHwIcap_mWriteReg XHwIcap_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XIic
+ *
+ *********************************************************************/
+#ifndef XIic_mReadReg
+#define XIic_mReadReg XIic_ReadReg
+#endif
+
+#ifndef XIic_mWriteReg
+#define XIic_mWriteReg XIic_WriteReg
+#endif
+
+#ifndef XIic_mEnterCriticalRegion
+#define XIic_mEnterCriticalRegion XIic_IntrGlobalDisable
+#endif
+
+#ifndef XIic_mExitCriticalRegion
+#define XIic_mExitCriticalRegion XIic_IntrGlobalEnable
+#endif
+
+#ifndef XIIC_GINTR_DISABLE
+#define XIIC_GINTR_DISABLE XIic_IntrGlobalDisable
+#endif
+
+#ifndef XIIC_GINTR_ENABLE
+#define XIIC_GINTR_ENABLE XIic_IntrGlobalEnable
+#endif
+
+#ifndef XIIC_IS_GINTR_ENABLED
+#define XIIC_IS_GINTR_ENABLED XIic_IsIntrGlobalEnabled
+#endif
+
+#ifndef XIIC_WRITE_IISR
+#define XIIC_WRITE_IISR XIic_WriteIisr
+#endif
+
+#ifndef XIIC_READ_IISR
+#define XIIC_READ_IISR XIic_ReadIisr
+#endif
+
+#ifndef XIIC_WRITE_IIER
+#define XIIC_WRITE_IIER XIic_WriteIier
+#endif
+
+#ifndef XIic_mClearIisr
+#define XIic_mClearIisr XIic_ClearIisr
+#endif
+
+#ifndef XIic_mSend7BitAddress
+#define XIic_mSend7BitAddress XIic_Send7BitAddress
+#endif
+
+#ifndef XIic_mDynSend7BitAddress
+#define XIic_mDynSend7BitAddress XIic_DynSend7BitAddress
+#endif
+
+#ifndef XIic_mDynSendStartStopAddress
+#define XIic_mDynSendStartStopAddress XIic_DynSendStartStopAddress
+#endif
+
+#ifndef XIic_mDynSendStop
+#define XIic_mDynSendStop XIic_DynSendStop
+#endif
+
+#ifndef XIic_mSend10BitAddrByte1
+#define XIic_mSend10BitAddrByte1 XIic_Send10BitAddrByte1
+#endif
+
+#ifndef XIic_mSend10BitAddrByte2
+#define XIic_mSend10BitAddrByte2 XIic_Send10BitAddrByte2
+#endif
+
+#ifndef XIic_mSend7BitAddr
+#define XIic_mSend7BitAddr XIic_Send7BitAddr
+#endif
+
+#ifndef XIic_mDisableIntr
+#define XIic_mDisableIntr XIic_DisableIntr
+#endif
+
+#ifndef XIic_mEnableIntr
+#define XIic_mEnableIntr XIic_EnableIntr
+#endif
+
+#ifndef XIic_mClearIntr
+#define XIic_mClearIntr XIic_ClearIntr
+#endif
+
+#ifndef XIic_mClearEnableIntr
+#define XIic_mClearEnableIntr XIic_ClearEnableIntr
+#endif
+
+#ifndef XIic_mFlushRxFifo
+#define XIic_mFlushRxFifo XIic_FlushRxFifo
+#endif
+
+#ifndef XIic_mFlushTxFifo
+#define XIic_mFlushTxFifo XIic_FlushTxFifo
+#endif
+
+#ifndef XIic_mReadRecvByte
+#define XIic_mReadRecvByte XIic_ReadRecvByte
+#endif
+
+#ifndef XIic_mWriteSendByte
+#define XIic_mWriteSendByte XIic_WriteSendByte
+#endif
+
+#ifndef XIic_mSetControlRegister
+#define XIic_mSetControlRegister XIic_SetControlRegister
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XIntc
+ *
+ *********************************************************************/
+#ifndef XIntc_mMasterEnable
+#define XIntc_mMasterEnable XIntc_MasterEnable
+#endif
+
+#ifndef XIntc_mMasterDisable
+#define XIntc_mMasterDisable XIntc_MasterDisable
+#endif
+
+#ifndef XIntc_mEnableIntr
+#define XIntc_mEnableIntr XIntc_EnableIntr
+#endif
+
+#ifndef XIntc_mDisableIntr
+#define XIntc_mDisableIntr XIntc_DisableIntr
+#endif
+
+#ifndef XIntc_mAckIntr
+#define XIntc_mAckIntr XIntc_AckIntr
+#endif
+
+#ifndef XIntc_mGetIntrStatus
+#define XIntc_mGetIntrStatus XIntc_GetIntrStatus
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XLlDma
+ *
+ *********************************************************************/
+#ifndef XLlDma_mBdRead
+#define XLlDma_mBdRead XLlDma_BdRead
+#endif
+
+#ifndef XLlDma_mBdWrite
+#define XLlDma_mBdWrite XLlDma_BdWrite
+#endif
+
+#ifndef XLlDma_mWriteReg
+#define XLlDma_mWriteReg XLlDma_WriteReg
+#endif
+
+#ifndef XLlDma_mReadReg
+#define XLlDma_mReadReg XLlDma_ReadReg
+#endif
+
+#ifndef XLlDma_mBdClear
+#define XLlDma_mBdClear XLlDma_BdClear
+#endif
+
+#ifndef XLlDma_mBdSetStsCtrl
+#define XLlDma_mBdSetStsCtrl XLlDma_BdSetStsCtrl
+#endif
+
+#ifndef XLlDma_mBdGetStsCtrl
+#define XLlDma_mBdGetStsCtrl XLlDma_BdGetStsCtrl
+#endif
+
+#ifndef XLlDma_mBdSetLength
+#define XLlDma_mBdSetLength XLlDma_BdSetLength
+#endif
+
+#ifndef XLlDma_mBdGetLength
+#define XLlDma_mBdGetLength XLlDma_BdGetLength
+#endif
+
+#ifndef XLlDma_mBdSetId
+#define XLlDma_mBdSetId XLlDma_BdSetId
+#endif
+
+#ifndef XLlDma_mBdGetId
+#define XLlDma_mBdGetId XLlDma_BdGetId
+#endif
+
+#ifndef XLlDma_mBdSetBufAddr
+#define XLlDma_mBdSetBufAddr XLlDma_BdSetBufAddr
+#endif
+
+#ifndef XLlDma_mBdGetBufAddr
+#define XLlDma_mBdGetBufAddr XLlDma_BdGetBufAddr
+#endif
+
+#ifndef XLlDma_mBdGetLength
+#define XLlDma_mBdGetLength XLlDma_BdGetLength
+#endif
+
+#ifndef XLlDma_mGetTxRing
+#define XLlDma_mGetTxRing XLlDma_GetTxRing
+#endif
+
+#ifndef XLlDma_mGetRxRing
+#define XLlDma_mGetRxRing XLlDma_GetRxRing
+#endif
+
+#ifndef XLlDma_mGetCr
+#define XLlDma_mGetCr XLlDma_GetCr
+#endif
+
+#ifndef XLlDma_mSetCr
+#define XLlDma_mSetCr XLlDma_SetCr
+#endif
+
+#ifndef XLlDma_mBdRingCntCalc
+#define XLlDma_mBdRingCntCalc XLlDma_BdRingCntCalc
+#endif
+
+#ifndef XLlDma_mBdRingMemCalc
+#define XLlDma_mBdRingMemCalc XLlDma_BdRingMemCalc
+#endif
+
+#ifndef XLlDma_mBdRingGetCnt
+#define XLlDma_mBdRingGetCnt XLlDma_BdRingGetCnt
+#endif
+
+#ifndef XLlDma_mBdRingGetFreeCnt
+#define XLlDma_mBdRingGetFreeCnt XLlDma_BdRingGetFreeCnt
+#endif
+
+#ifndef XLlDma_mBdRingSnapShotCurrBd
+#define XLlDma_mBdRingSnapShotCurrBd XLlDma_BdRingSnapShotCurrBd
+#endif
+
+#ifndef XLlDma_mBdRingNext
+#define XLlDma_mBdRingNext XLlDma_BdRingNext
+#endif
+
+#ifndef XLlDma_mBdRingPrev
+#define XLlDma_mBdRingPrev XLlDma_BdRingPrev
+#endif
+
+#ifndef XLlDma_mBdRingGetSr
+#define XLlDma_mBdRingGetSr XLlDma_BdRingGetSr
+#endif
+
+#ifndef XLlDma_mBdRingSetSr
+#define XLlDma_mBdRingSetSr XLlDma_BdRingSetSr
+#endif
+
+#ifndef XLlDma_mBdRingGetCr
+#define XLlDma_mBdRingGetCr XLlDma_BdRingGetCr
+#endif
+
+#ifndef XLlDma_mBdRingSetCr
+#define XLlDma_mBdRingSetCr XLlDma_BdRingSetCr
+#endif
+
+#ifndef XLlDma_mBdRingBusy
+#define XLlDma_mBdRingBusy XLlDma_BdRingBusy
+#endif
+
+#ifndef XLlDma_mBdRingIntEnable
+#define XLlDma_mBdRingIntEnable XLlDma_BdRingIntEnable
+#endif
+
+#ifndef XLlDma_mBdRingIntDisable
+#define XLlDma_mBdRingIntDisable XLlDma_BdRingIntDisable
+#endif
+
+#ifndef XLlDma_mBdRingIntGetEnabled
+#define XLlDma_mBdRingIntGetEnabled XLlDma_BdRingIntGetEnabled
+#endif
+
+#ifndef XLlDma_mBdRingGetIrq
+#define XLlDma_mBdRingGetIrq XLlDma_BdRingGetIrq
+#endif
+
+#ifndef XLlDma_mBdRingAckIrq
+#define XLlDma_mBdRingAckIrq XLlDma_BdRingAckIrq
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XMbox
+ *
+ *********************************************************************/
+#ifndef XMbox_mWriteReg
+#define XMbox_mWriteReg XMbox_WriteReg
+#endif
+
+#ifndef XMbox_mReadReg
+#define XMbox_mReadReg XMbox_ReadReg
+#endif
+
+#ifndef XMbox_mWriteMBox
+#define XMbox_mWriteMBox XMbox_WriteMBox
+#endif
+
+#ifndef XMbox_mReadMBox
+#define XMbox_mReadMBox XMbox_ReadMBox
+#endif
+
+#ifndef XMbox_mFSLReadMBox
+#define XMbox_mFSLReadMBox XMbox_FSLReadMBox
+#endif
+
+#ifndef XMbox_mFSLWriteMBox
+#define XMbox_mFSLWriteMBox XMbox_FSLWriteMBox
+#endif
+
+#ifndef XMbox_mFSLIsEmpty
+#define XMbox_mFSLIsEmpty XMbox_FSLIsEmpty
+#endif
+
+#ifndef XMbox_mFSLIsFull
+#define XMbox_mFSLIsFull XMbox_FSLIsFull
+#endif
+
+#ifndef XMbox_mIsEmpty
+#define XMbox_mIsEmpty XMbox_IsEmptyHw
+#endif
+
+#ifndef XMbox_mIsFull
+#define XMbox_mIsFull XMbox_IsFullHw
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XMpmc
+ *
+ *********************************************************************/
+#ifndef XMpmc_mReadReg
+#define XMpmc_mReadReg XMpmc_ReadReg
+#endif
+
+#ifndef XMpmc_mWriteReg
+#define XMpmc_mWriteReg XMpmc_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XMutex
+ *
+ *********************************************************************/
+#ifndef XMutex_mWriteReg
+#define XMutex_mWriteReg XMutex_WriteReg
+#endif
+
+#ifndef XMutex_mReadReg
+#define XMutex_mReadReg XMutex_ReadReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XPcie
+ *
+ *********************************************************************/
+#ifndef XPcie_mReadReg
+#define XPcie_mReadReg XPcie_ReadReg
+#endif
+
+#ifndef XPcie_mWriteReg
+#define XPcie_mWriteReg XPcie_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XSpi
+ *
+ *********************************************************************/
+#ifndef XSpi_mIntrGlobalEnable
+#define XSpi_mIntrGlobalEnable XSpi_IntrGlobalEnable
+#endif
+
+#ifndef XSpi_mIntrGlobalDisable
+#define XSpi_mIntrGlobalDisable XSpi_IntrGlobalDisable
+#endif
+
+#ifndef XSpi_mIsIntrGlobalEnabled
+#define XSpi_mIsIntrGlobalEnabled XSpi_IsIntrGlobalEnabled
+#endif
+
+#ifndef XSpi_mIntrGetStatus
+#define XSpi_mIntrGetStatus XSpi_IntrGetStatus
+#endif
+
+#ifndef XSpi_mIntrClear
+#define XSpi_mIntrClear XSpi_IntrClear
+#endif
+
+#ifndef XSpi_mIntrEnable
+#define XSpi_mIntrEnable XSpi_IntrEnable
+#endif
+
+#ifndef XSpi_mIntrDisable
+#define XSpi_mIntrDisable XSpi_IntrDisable
+#endif
+
+#ifndef XSpi_mIntrGetEnabled
+#define XSpi_mIntrGetEnabled XSpi_IntrGetEnabled
+#endif
+
+#ifndef XSpi_mSetControlReg
+#define XSpi_mSetControlReg XSpi_SetControlReg
+#endif
+
+#ifndef XSpi_mGetControlReg
+#define XSpi_mGetControlReg XSpi_GetControlReg
+#endif
+
+#ifndef XSpi_mGetStatusReg
+#define XSpi_mGetStatusReg XSpi_GetStatusReg
+#endif
+
+#ifndef XSpi_mSetSlaveSelectReg
+#define XSpi_mSetSlaveSelectReg XSpi_SetSlaveSelectReg
+#endif
+
+#ifndef XSpi_mGetSlaveSelectReg
+#define XSpi_mGetSlaveSelectReg XSpi_GetSlaveSelectReg
+#endif
+
+#ifndef XSpi_mEnable
+#define XSpi_mEnable XSpi_Enable
+#endif
+
+#ifndef XSpi_mDisable
+#define XSpi_mDisable XSpi_Disable
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XSysAce
+ *
+ *********************************************************************/
+#ifndef XSysAce_mGetControlReg
+#define XSysAce_mGetControlReg XSysAce_GetControlReg
+#endif
+
+#ifndef XSysAce_mSetControlReg
+#define XSysAce_mSetControlReg XSysAce_SetControlReg
+#endif
+
+#ifndef XSysAce_mOrControlReg
+#define XSysAce_mOrControlReg XSysAce_OrControlReg
+#endif
+
+#ifndef XSysAce_mAndControlReg
+#define XSysAce_mAndControlReg XSysAce_AndControlReg
+#endif
+
+#ifndef XSysAce_mGetErrorReg
+#define XSysAce_mGetErrorReg XSysAce_GetErrorReg
+#endif
+
+#ifndef XSysAce_mGetStatusReg
+#define XSysAce_mGetStatusReg XSysAce_GetStatusReg
+#endif
+
+#ifndef XSysAce_mWaitForLock
+#define XSysAce_mWaitForLock XSysAce_WaitForLock
+#endif
+
+#ifndef XSysAce_mEnableIntr
+#define XSysAce_mEnableIntr XSysAce_EnableIntr
+#endif
+
+#ifndef XSysAce_mDisableIntr
+#define XSysAce_mDisableIntr XSysAce_DisableIntr
+#endif
+
+#ifndef XSysAce_mIsReadyForCmd
+#define XSysAce_mIsReadyForCmd XSysAce_IsReadyForCmd
+#endif
+
+#ifndef XSysAce_mIsMpuLocked
+#define XSysAce_mIsMpuLocked XSysAce_IsMpuLocked
+#endif
+
+#ifndef XSysAce_mIsIntrEnabled
+#define XSysAce_mIsIntrEnabled XSysAce_IsIntrEnabled
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XSysMon
+ *
+ *********************************************************************/
+#ifndef XSysMon_mIsEventSamplingModeSet
+#define XSysMon_mIsEventSamplingModeSet XSysMon_IsEventSamplingModeSet
+#endif
+
+#ifndef XSysMon_mIsDrpBusy
+#define XSysMon_mIsDrpBusy XSysMon_IsDrpBusy
+#endif
+
+#ifndef XSysMon_mIsDrpLocked
+#define XSysMon_mIsDrpLocked XSysMon_IsDrpLocked
+#endif
+
+#ifndef XSysMon_mRawToTemperature
+#define XSysMon_mRawToTemperature XSysMon_RawToTemperature
+#endif
+
+#ifndef XSysMon_mRawToVoltage
+#define XSysMon_mRawToVoltage XSysMon_RawToVoltage
+#endif
+
+#ifndef XSysMon_mTemperatureToRaw
+#define XSysMon_mTemperatureToRaw XSysMon_TemperatureToRaw
+#endif
+
+#ifndef XSysMon_mVoltageToRaw
+#define XSysMon_mVoltageToRaw XSysMon_VoltageToRaw
+#endif
+
+#ifndef XSysMon_mReadReg
+#define XSysMon_mReadReg XSysMon_ReadReg
+#endif
+
+#ifndef XSysMon_mWriteReg
+#define XSysMon_mWriteReg XSysMon_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XTmrCtr
+ *
+ *********************************************************************/
+#ifndef XTimerCtr_mReadReg
+#define XTimerCtr_mReadReg XTimerCtr_ReadReg
+#endif
+
+#ifndef XTmrCtr_mWriteReg
+#define XTmrCtr_mWriteReg XTmrCtr_WriteReg
+#endif
+
+#ifndef XTmrCtr_mSetControlStatusReg
+#define XTmrCtr_mSetControlStatusReg XTmrCtr_SetControlStatusReg
+#endif
+
+#ifndef XTmrCtr_mGetControlStatusReg
+#define XTmrCtr_mGetControlStatusReg XTmrCtr_GetControlStatusReg
+#endif
+
+#ifndef XTmrCtr_mGetTimerCounterReg
+#define XTmrCtr_mGetTimerCounterReg XTmrCtr_GetTimerCounterReg
+#endif
+
+#ifndef XTmrCtr_mSetLoadReg
+#define XTmrCtr_mSetLoadReg XTmrCtr_SetLoadReg
+#endif
+
+#ifndef XTmrCtr_mGetLoadReg
+#define XTmrCtr_mGetLoadReg XTmrCtr_GetLoadReg
+#endif
+
+#ifndef XTmrCtr_mEnable
+#define XTmrCtr_mEnable XTmrCtr_Enable
+#endif
+
+#ifndef XTmrCtr_mDisable
+#define XTmrCtr_mDisable XTmrCtr_Disable
+#endif
+
+#ifndef XTmrCtr_mEnableIntr
+#define XTmrCtr_mEnableIntr XTmrCtr_EnableIntr
+#endif
+
+#ifndef XTmrCtr_mDisableIntr
+#define XTmrCtr_mDisableIntr XTmrCtr_DisableIntr
+#endif
+
+#ifndef XTmrCtr_mLoadTimerCounterReg
+#define XTmrCtr_mLoadTimerCounterReg XTmrCtr_LoadTimerCounterReg
+#endif
+
+#ifndef XTmrCtr_mHasEventOccurred
+#define XTmrCtr_mHasEventOccurred XTmrCtr_HasEventOccurred
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XUartLite
+ *
+ *********************************************************************/
+#ifndef XUartLite_mUpdateStats
+#define XUartLite_mUpdateStats XUartLite_UpdateStats
+#endif
+
+#ifndef XUartLite_mWriteReg
+#define XUartLite_mWriteReg XUartLite_WriteReg
+#endif
+
+#ifndef XUartLite_mReadReg
+#define XUartLite_mReadReg XUartLite_ReadReg
+#endif
+
+#ifndef XUartLite_mClearStats
+#define XUartLite_mClearStats XUartLite_ClearStats
+#endif
+
+#ifndef XUartLite_mSetControlReg
+#define XUartLite_mSetControlReg XUartLite_SetControlReg
+#endif
+
+#ifndef XUartLite_mGetStatusReg
+#define XUartLite_mGetStatusReg XUartLite_GetStatusReg
+#endif
+
+#ifndef XUartLite_mIsReceiveEmpty
+#define XUartLite_mIsReceiveEmpty XUartLite_IsReceiveEmpty
+#endif
+
+#ifndef XUartLite_mIsTransmitFull
+#define XUartLite_mIsTransmitFull XUartLite_IsTransmitFull
+#endif
+
+#ifndef XUartLite_mIsIntrEnabled
+#define XUartLite_mIsIntrEnabled XUartLite_IsIntrEnabled
+#endif
+
+#ifndef XUartLite_mEnableIntr
+#define XUartLite_mEnableIntr XUartLite_EnableIntr
+#endif
+
+#ifndef XUartLite_mDisableIntr
+#define XUartLite_mDisableIntr XUartLite_DisableIntr
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XUartNs550
+ *
+ *********************************************************************/
+#ifndef XUartNs550_mUpdateStats
+#define XUartNs550_mUpdateStats XUartNs550_UpdateStats
+#endif
+
+#ifndef XUartNs550_mReadReg
+#define XUartNs550_mReadReg XUartNs550_ReadReg
+#endif
+
+#ifndef XUartNs550_mWriteReg
+#define XUartNs550_mWriteReg XUartNs550_WriteReg
+#endif
+
+#ifndef XUartNs550_mClearStats
+#define XUartNs550_mClearStats XUartNs550_ClearStats
+#endif
+
+#ifndef XUartNs550_mGetLineStatusReg
+#define XUartNs550_mGetLineStatusReg XUartNs550_GetLineStatusReg
+#endif
+
+#ifndef XUartNs550_mGetLineControlReg
+#define XUartNs550_mGetLineControlReg XUartNs550_GetLineControlReg
+#endif
+
+#ifndef XUartNs550_mSetLineControlReg
+#define XUartNs550_mSetLineControlReg XUartNs550_SetLineControlReg
+#endif
+
+#ifndef XUartNs550_mEnableIntr
+#define XUartNs550_mEnableIntr XUartNs550_EnableIntr
+#endif
+
+#ifndef XUartNs550_mDisableIntr
+#define XUartNs550_mDisableIntr XUartNs550_DisableIntr
+#endif
+
+#ifndef XUartNs550_mIsReceiveData
+#define XUartNs550_mIsReceiveData XUartNs550_IsReceiveData
+#endif
+
+#ifndef XUartNs550_mIsTransmitEmpty
+#define XUartNs550_mIsTransmitEmpty XUartNs550_IsTransmitEmpty
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XUsb
+ *
+ *********************************************************************/
+#ifndef XUsb_mReadReg
+#define XUsb_mReadReg XUsb_ReadReg
+#endif
+
+#ifndef XUsb_mWriteReg
+#define XUsb_mWriteReg XUsb_WriteReg
+#endif
+
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_mem.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_mem.c
new file mode 100644
index 0000000..0929a68
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_mem.c
@@ -0,0 +1,83 @@
+/******************************************************************************/
+/**
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+* @file xil_mem.c
+*
+* This file contains xil mem copy function to use in case of word aligned
+* data copies.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 6.1   nsk      11/07/16 First release.
+*
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+
+/***************** Inline Functions Definitions ********************/
+/*****************************************************************************/
+/**
+* @brief       This  function copies memory from once location to other.
+*
+* @param       dst: pointer pointing to destination memory
+*
+* @param       src: pointer pointing to source memory
+*
+* @param       cnt: 32 bit length of bytes to be copied
+*
+*****************************************************************************/
+void Xil_MemCpy(void* dst, const void* src, u32 cnt)
+{
+	char *d = (char*)(void *)dst;
+	const char *s = src;
+
+	while (cnt >= sizeof (int)) {
+		*(int*)d = *(int*)s;
+		d += sizeof (int);
+		s += sizeof (int);
+		cnt -= sizeof (int);
+	}
+	while ((cnt) > 0U){
+		*d = *s;
+		d += 1U;
+		s += 1U;
+		cnt -= 1U;
+	}
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_mem.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_mem.h
new file mode 100644
index 0000000..a2d5e66
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_mem.h
@@ -0,0 +1,59 @@
+/******************************************************************************/
+/**
+* Copyright (C) 2015 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+* @file xil_mem.h
+*
+* @addtogroup common_mem_operation_api Customized APIs for Memory Operations
+*
+* The xil_mem.h file contains prototype for functions related
+* to memory operations. These APIs are applicable for all processors supported
+* by Xilinx.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 6.1   nsk      11/07/16 First release.
+*
+* 

+*
+*****************************************************************************/
+
+/************************** Function Prototypes *****************************/
+
+void Xil_MemCpy(void* dst, const void* src, u32 cnt);
+/**
+* @} End of "addtogroup common_mem_operation_api".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_mmu.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_mmu.h
new file mode 100644
index 0000000..28a7c78
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_mmu.h
@@ -0,0 +1,80 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.h
+* This file only includes xil_mpu.h which contains Xil_SetTlbAttributes API
+* defined for MPU in R5. R5 does not have mmu and for usage of similiar API
+* the file has been created.
+*
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.0	pkp  2/12/15 Initial version
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef XIL_MMU_H
+#define XIL_MMU_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/***************************** Include Files *********************************/
+
+#include "xil_mpu.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_MMU_H */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_mpu.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_mpu.c
new file mode 100644
index 0000000..7dd048f
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_mpu.c
@@ -0,0 +1,579 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mpu.c
+*
+* This file provides APIs for enabling/disabling MPU and setting the memory
+* attributes for sections, in the MPU translation table.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 6.2   mus  01/27/17 Updated to support IAR compiler
+* 6.4   asa  08/16/17 Added many APIs for MPU access to make MPU usage
+* 					  user-friendly. The APIs added are: Xil_UpdateMPUConfig,
+* 					  Xil_GetMPUConfig, Xil_GetNumOfFreeRegions,
+* 					  Xil_GetNextMPURegion, Xil_DisableMPURegionByRegNum,
+* 					  Xil_GetMPUFreeRegMask, Xil_SetMPURegionByRegNum, and
+* 					  Xil_InitializeExistingMPURegConfig.
+* 					  Added a new array of structure of type XMpuConfig to
+* 					  represent the MPU configuration table.
+* 

+*
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+#include "xil_mpu.h"
+#include "xdebug.h"
+#include "xstatus.h"
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+static const struct {
+	u64 size;
+	unsigned int encoding;
+}region_size[] = {
+	{ 0x20, REGION_32B },
+	{ 0x40, REGION_64B },
+	{ 0x80, REGION_128B },
+	{ 0x100, REGION_256B },
+	{ 0x200, REGION_512B },
+	{ 0x400, REGION_1K },
+	{ 0x800, REGION_2K },
+	{ 0x1000, REGION_4K },
+	{ 0x2000, REGION_8K },
+	{ 0x4000, REGION_16K },
+	{ 0x8000, REGION_32K },
+	{ 0x10000, REGION_64K },
+	{ 0x20000, REGION_128K },
+	{ 0x40000, REGION_256K },
+	{ 0x80000, REGION_512K },
+	{ 0x100000, REGION_1M },
+	{ 0x200000, REGION_2M },
+	{ 0x400000, REGION_4M },
+	{ 0x800000, REGION_8M },
+	{ 0x1000000, REGION_16M },
+	{ 0x2000000, REGION_32M },
+	{ 0x4000000, REGION_64M },
+	{ 0x8000000, REGION_128M },
+	{ 0x10000000, REGION_256M },
+	{ 0x20000000, REGION_512M },
+	{ 0x40000000, REGION_1G },
+	{ 0x80000000, REGION_2G },
+	{ 0x100000000, REGION_4G },
+};
+
+XMpu_Config Mpu_Config;
+
+/************************** Function Prototypes ******************************/
+void Xil_InitializeExistingMPURegConfig(void);
+/*****************************************************************************/
+/**
+* @brief    This function sets the memory attributes for a section covering
+*           1MB, of memory in the translation table.
+*
+* @param	Addr: 32-bit address for which memory attributes need to be set.
+* @param	attrib: Attribute for the given memory region.
+* @return	None.
+*
+*
+******************************************************************************/
+void Xil_SetTlbAttributes(INTPTR addr, u32 attrib)
+{
+	INTPTR Localaddr = addr;
+	Localaddr &= (~(0xFFFFFU));
+	/* Setting the MPU region with given attribute with 1MB size */
+	Xil_SetMPURegion(Localaddr, 0x100000, attrib);
+}
+
+/*****************************************************************************/
+/**
+* @brief    Set the memory attributes for a section of memory in the
+*           translation table.
+*
+* @param	Addr: 32-bit address for which memory attributes need to be set..
+* @param	size: size is the size of the region.
+* @param	attrib: Attribute for the given memory region.
+* @return	None.
+*
+*
+******************************************************************************/
+u32 Xil_SetMPURegion(INTPTR addr, u64 size, u32 attrib)
+{
+	u32 Regionsize = 0;
+	INTPTR Localaddr = addr;
+	u32 NextAvailableMemRegion;
+	unsigned int i;
+
+	NextAvailableMemRegion = Xil_GetNextMPURegion();
+	if (NextAvailableMemRegion == 0xFF) {
+		xdbg_printf(DEBUG, "No regions available\r\n");
+		return XST_FAILURE;
+	}
+
+	Xil_DCacheFlush();
+	Xil_ICacheInvalidate();
+
+	mtcp(XREG_CP15_MPU_MEMORY_REG_NUMBER,NextAvailableMemRegion);
+	isb();
+
+	/* Lookup the size.  */
+	for (i = 0; i < sizeof region_size / sizeof region_size[0]; i++) {
+		if (size <= region_size[i].size) {
+			Regionsize = region_size[i].encoding;
+			break;
+		}
+	}
+
+	Localaddr &= ~(region_size[i].size - 1);
+
+	Regionsize <<= 1;
+	Regionsize |= REGION_EN;
+	dsb();
+	mtcp(XREG_CP15_MPU_REG_BASEADDR, Localaddr);	/* Set base address of a region */
+	mtcp(XREG_CP15_MPU_REG_ACCESS_CTRL, attrib);	/* Set the control attribute */
+	mtcp(XREG_CP15_MPU_REG_SIZE_EN, Regionsize);	/* set the region size and enable it*/
+	dsb();
+	isb();
+	Xil_UpdateMPUConfig(NextAvailableMemRegion, Localaddr, Regionsize, attrib);
+	return XST_SUCCESS;
+}
+/*****************************************************************************/
+/**
+* @brief    Enable MPU for Cortex R5 processor. This function invalidates I
+*           cache and flush the D Caches, and then enables the MPU.
+*
+*
+* @param	None.
+* @return	None.
+*
+******************************************************************************/
+void Xil_EnableMPU(void)
+{
+	u32 CtrlReg, Reg;
+	s32 DCacheStatus=0, ICacheStatus=0;
+	/* enable caches only if they are disabled */
+#if defined (__GNUC__)
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+#endif
+	if ((CtrlReg & XREG_CP15_CONTROL_C_BIT) != 0x00000000U) {
+		DCacheStatus=1;
+	}
+	if ((CtrlReg & XREG_CP15_CONTROL_I_BIT) != 0x00000000U) {
+		ICacheStatus=1;
+	}
+
+	if(DCacheStatus != 0) {
+		Xil_DCacheDisable();
+	}
+	if(ICacheStatus != 0){
+		Xil_ICacheDisable();
+	}
+#if defined (__GNUC__)
+	Reg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	 mfcp(XREG_CP15_SYS_CONTROL,Reg);
+#endif
+	Reg |= 0x00000001U;
+	dsb();
+	mtcp(XREG_CP15_SYS_CONTROL, Reg);
+	isb();
+	/* enable caches only if they are disabled in routine*/
+	if(DCacheStatus != 0) {
+		Xil_DCacheEnable();
+	}
+	if(ICacheStatus != 0) {
+		Xil_ICacheEnable();
+	}
+}
+
+/*****************************************************************************/
+/**
+* @brief    Disable MPU for Cortex R5 processors. This function invalidates I
+*           cache and flush the D Caches, and then disabes the MPU.
+*
+* @param	None.
+*
+* @return	None.
+*
+******************************************************************************/
+void Xil_DisableMPU(void)
+{
+	u32 CtrlReg, Reg;
+	s32 DCacheStatus=0, ICacheStatus=0;
+	/* enable caches only if they are disabled */
+
+#if defined (__GNUC__)
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+#endif
+	if ((CtrlReg & XREG_CP15_CONTROL_C_BIT) != 0x00000000U) {
+		DCacheStatus=1;
+	}
+	if ((CtrlReg & XREG_CP15_CONTROL_I_BIT) != 0x00000000U) {
+		ICacheStatus=1;
+	}
+
+	if(DCacheStatus != 0) {
+		Xil_DCacheDisable();
+	}
+	if(ICacheStatus != 0){
+		Xil_ICacheDisable();
+	}
+
+	mtcp(XREG_CP15_INVAL_BRANCH_ARRAY, 0);
+#if defined (__GNUC__)
+	Reg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL,Reg);
+#endif
+	Reg &= ~(0x00000001U);
+	dsb();
+	mtcp(XREG_CP15_SYS_CONTROL, Reg);
+	isb();
+	/* enable caches only if they are disabled in routine*/
+	if(DCacheStatus != 0) {
+		Xil_DCacheEnable();
+	}
+	if(ICacheStatus != 0) {
+		Xil_ICacheEnable();
+	}
+}
+
+/*****************************************************************************/
+/**
+* @brief    Update the MPU configuration for the requested region number in
+* 			the global MPU configuration table.
+*
+* @param	reg_num: The requested region number to be updated information for.
+* @param	address: 32 bit address for start of the region.
+* @param	size: Requested size of the region.
+* @param	attrib: Attribute for the corresponding region.
+* @return	XST_FAILURE: When the requested region number if 16 or more.
+* 			XST_SUCCESS: When the MPU configuration table is updated.
+*
+*
+******************************************************************************/
+u32 Xil_UpdateMPUConfig(u32 reg_num, INTPTR address, u32 size, u32 attrib)
+{
+	u32 ReturnVal = XST_SUCCESS;
+	u32 Tempsize = size;
+	u32 Index;
+
+	if (reg_num >=  MAX_POSSIBLE_MPU_REGS) {
+		xdbg_printf(DEBUG, "Invalid region number\r\n");
+		ReturnVal = XST_FAILURE;
+		goto exit;
+	}
+
+	if (size & REGION_EN) {
+		Mpu_Config[reg_num].RegionStatus = MPU_REG_ENABLED;
+		Mpu_Config[reg_num].BaseAddress = address;
+		Tempsize &= (~REGION_EN);
+		Tempsize >>= 1;
+		/* Lookup the size.  */
+		for (Index = 0; Index <
+				sizeof region_size / sizeof region_size[0]; Index++) {
+			if (Tempsize <= region_size[Index].encoding) {
+				Mpu_Config[reg_num].Size = region_size[Index].size;
+				break;
+			}
+		}
+		Mpu_Config[reg_num].Attribute = attrib;
+	} else {
+		Mpu_Config[reg_num].RegionStatus = 0U;
+		Mpu_Config[reg_num].BaseAddress = 0U;
+		Mpu_Config[reg_num].Size = 0U;
+		Mpu_Config[reg_num].Attribute = 0U;
+	}
+
+exit:
+	return ReturnVal;
+}
+
+/*****************************************************************************/
+/**
+* @brief    The MPU configuration table is passed to the caller.
+*
+* @param	mpuconfig: This is of type XMpu_Config which is an array of
+* 			16 entries of type structure representing the MPU config table
+* @return	none
+*
+*
+******************************************************************************/
+void Xil_GetMPUConfig (XMpu_Config mpuconfig) {
+	u32 Index = 0U;
+
+	while (Index < MAX_POSSIBLE_MPU_REGS) {
+		mpuconfig[Index].RegionStatus = Mpu_Config[Index].RegionStatus;
+		mpuconfig[Index].BaseAddress = Mpu_Config[Index].BaseAddress;
+		mpuconfig[Index].Attribute = Mpu_Config[Index].Attribute;
+		mpuconfig[Index].Size = Mpu_Config[Index].Size;
+		Index++;
+	}
+}
+
+/*****************************************************************************/
+/**
+* @brief    Returns the total number of free MPU regions available.
+*
+* @param	none
+* @return	Number of free regions available to users
+*
+*
+******************************************************************************/
+u32 Xil_GetNumOfFreeRegions (void) {
+	u32 Index = 0U;
+	int NumofFreeRegs = 0U;
+
+	while (Index < MAX_POSSIBLE_MPU_REGS) {
+		if (MPU_REG_DISABLED == Mpu_Config[Index].RegionStatus) {
+			NumofFreeRegs++;
+		}
+		Index++;
+	}
+	return NumofFreeRegs;
+}
+
+/*****************************************************************************/
+/**
+* @brief    Returns the total number of free MPU regions available in the form
+*           of a mask. A bit of 1 in the returned 16 bit value represents the
+*           corresponding region number to be available.
+*           For example, if this function returns 0xC0000, this would mean, the
+*           regions 14 and 15 are available to users.
+*
+* @param	none
+* @return	The free region mask as a 16 bit value
+*
+*
+******************************************************************************/
+u16 Xil_GetMPUFreeRegMask (void) {
+	u32 Index = 0U;
+	u16 FreeRegMask = 0U;
+
+	while (Index < MAX_POSSIBLE_MPU_REGS) {
+		if (MPU_REG_DISABLED == Mpu_Config[Index].RegionStatus) {
+			FreeRegMask |= (1U << Index);
+		}
+		Index++;
+	}
+	return FreeRegMask;
+}
+
+/*****************************************************************************/
+/**
+* @brief    Disables the corresponding region number as passed by the user.
+*
+* @param	reg_num: The region number to be disabled
+* @return	XST_SUCCESS: If the region could be disabled successfully
+* 			XST_FAILURE: If the requested region number is 16 or more.
+*
+*
+******************************************************************************/
+u32 Xil_DisableMPURegionByRegNum (u32 reg_num) {
+	u32 Temp = 0U;
+	u32 ReturnVal = XST_FAILURE;
+
+	if (reg_num >= 16U) {
+		xdbg_printf(DEBUG, "Invalid region number\r\n");
+		goto exit1;
+	}
+	Xil_DCacheFlush();
+	Xil_ICacheInvalidate();
+
+	mtcp(XREG_CP15_MPU_MEMORY_REG_NUMBER,reg_num);
+#if defined (__GNUC__)
+	Temp = mfcp(XREG_CP15_MPU_REG_SIZE_EN);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_MPU_REG_SIZE_EN,Temp);
+#endif
+	Temp &= (~REGION_EN);
+	dsb();
+	mtcp(XREG_CP15_MPU_REG_SIZE_EN,Temp);
+	dsb();
+	isb();
+	Xil_UpdateMPUConfig(reg_num, 0U, 0U, 0U);
+	ReturnVal = XST_SUCCESS;
+
+exit1:
+	return ReturnVal;
+}
+
+/*****************************************************************************/
+/**
+* @brief    Enables the corresponding region number as passed by the user.
+*
+* @param	reg_num: The region number to be enabled
+* @param	address: 32 bit address for start of the region.
+* @param	size: Requested size of the region.
+* @param	attrib: Attribute for the corresponding region.
+* @return	XST_SUCCESS: If the region could be created successfully
+* 			XST_FAILURE: If the requested region number is 16 or more.
+*
+*
+******************************************************************************/
+u32 Xil_SetMPURegionByRegNum (u32 reg_num, INTPTR addr, u64 size, u32 attrib)
+{
+	u32 ReturnVal = XST_SUCCESS;
+	INTPTR Localaddr = addr;
+	u32 Regionsize = 0;
+	u32 Index;
+
+	if (reg_num >= 16U) {
+		xdbg_printf(DEBUG, "Invalid region number\r\n");
+		ReturnVal = XST_FAILURE;
+		goto exit2;
+	}
+
+	if (Mpu_Config[reg_num].RegionStatus == MPU_REG_ENABLED) {
+		xdbg_printf(DEBUG, "Region already enabled\r\n");
+		ReturnVal = XST_FAILURE;
+		goto exit2;
+	}
+
+	Xil_DCacheFlush();
+	Xil_ICacheInvalidate();
+	mtcp(XREG_CP15_MPU_MEMORY_REG_NUMBER,reg_num);
+	isb();
+
+	/* Lookup the size.  */
+	for (Index = 0; Index <
+			sizeof region_size / sizeof region_size[0]; Index++) {
+		if (size <= region_size[Index].size) {
+			Regionsize = region_size[Index].encoding;
+			break;
+		}
+	}
+
+	Localaddr &= ~(region_size[Index].size - 1);
+	Regionsize <<= 1;
+	Regionsize |= REGION_EN;
+	dsb();
+	mtcp(XREG_CP15_MPU_REG_BASEADDR, Localaddr);
+	mtcp(XREG_CP15_MPU_REG_ACCESS_CTRL, attrib);
+	mtcp(XREG_CP15_MPU_REG_SIZE_EN, Regionsize);
+	dsb();
+	isb();
+	Xil_UpdateMPUConfig(reg_num, Localaddr, Regionsize, attrib);
+exit2:
+	return ReturnVal;
+
+}
+
+/*****************************************************************************/
+/**
+* @brief    Initializes the MPU configuration table that are setup in the
+* 			R5 boot code in the Init_Mpu function called before C main.
+*
+* @param	none
+* @return	none
+*
+*
+******************************************************************************/
+void Xil_InitializeExistingMPURegConfig(void)
+{
+	u32 Index = 0U;
+	u32 Index1 = 0U;
+	u32 MPURegSize;
+	INTPTR MPURegBA;
+	u32 MPURegAttrib;
+	u32 Tempsize;
+
+	while (Index < MAX_POSSIBLE_MPU_REGS) {
+		mtcp(XREG_CP15_MPU_MEMORY_REG_NUMBER,Index);
+#if defined (__GNUC__)
+		MPURegSize = mfcp(XREG_CP15_MPU_REG_SIZE_EN);
+		MPURegBA = mfcp(XREG_CP15_MPU_REG_BASEADDR);
+		MPURegAttrib = mfcp(XREG_CP15_MPU_REG_ACCESS_CTRL);
+#elif defined (__ICCARM__)
+		mfcp(XREG_CP15_MPU_REG_SIZE_EN,MPURegSize);
+		mfcp(XREG_CP15_MPU_REG_BASEADDR, MPURegBA);
+		mfcp(XREG_CP15_MPU_REG_ACCESS_CTRL, MPURegAttrib);
+#endif
+		if (MPURegSize & REGION_EN) {
+			Mpu_Config[Index].RegionStatus = MPU_REG_ENABLED;
+			Mpu_Config[Index].BaseAddress = MPURegBA;
+			Mpu_Config[Index].Attribute = MPURegAttrib;
+			Tempsize = MPURegSize & (~REGION_EN);
+			Tempsize >>= 1;
+			for (Index1 = 0; Index1 <
+				(sizeof (region_size) / sizeof (region_size[0])); Index1++) {
+				if (Tempsize <= region_size[Index1].encoding) {
+					Mpu_Config[Index].Size = region_size[Index1].size;
+					break;
+				}
+			}
+		}
+		Index++;
+	}
+}
+
+/*****************************************************************************/
+/**
+* @brief    Returns the next available free MPU region
+*
+* @param	none
+* @return	The free MPU region available
+*
+*
+******************************************************************************/
+u32 Xil_GetNextMPURegion(void)
+{
+	u32 Index = 0U;
+	u32 NextAvailableReg = 0xFF;
+	while (Index < MAX_POSSIBLE_MPU_REGS) {
+		if (Mpu_Config[Index].RegionStatus != MPU_REG_ENABLED) {
+			NextAvailableReg = Index;
+			break;
+		}
+		Index++;
+	}
+	return NextAvailableReg;
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_mpu.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_mpu.h
new file mode 100644
index 0000000..95ffc66
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_mpu.h
@@ -0,0 +1,134 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.h
+*
+* @addtogroup r5_mpu_apis Cortex R5 Processor MPU specific APIs
+*
+* MPU functions provides access to MPU operations such as enable MPU, disable
+* MPU and set attribute for section of memory.
+* Boot code invokes Init_MPU function to configure the MPU. A total of 10 MPU
+* regions are allocated with another 6 being free for users. Overview of the
+* memory attributes for different MPU regions is as given below,
+*
+*|                       | Memory Range            | Attributes of MPURegion     |
+*|-----------------------|-------------------------|-----------------------------|
+*| DDR                   | 0x00000000 - 0x7FFFFFFF | Normal write-back Cacheable |
+*| PL                    | 0x80000000 - 0xBFFFFFFF | Strongly Ordered            |
+*| QSPI                  | 0xC0000000 - 0xDFFFFFFF | Device Memory               |
+*| PCIe                  | 0xE0000000 - 0xEFFFFFFF | Device Memory               |
+*| STM_CORESIGHT         | 0xF8000000 - 0xF8FFFFFF | Device Memory               |
+*| RPU_R5_GIC            | 0xF9000000 - 0xF90FFFFF | Device memory               |
+*| FPS                   | 0xFD000000 - 0xFDFFFFFF | Device Memory               |
+*| LPS                   | 0xFE000000 - 0xFFFFFFFF | Device Memory               |
+*| OCM                   | 0xFFFC0000 - 0xFFFFFFFF | Normal write-back Cacheable |
+*
+*
+* @note
+* For a system where DDR is less than 2GB, region after DDR and before PL is
+* marked as undefined in translation table. Memory range 0xFE000000-0xFEFFFFFF is
+* allocated for upper LPS slaves, where as memory region 0xFF000000-0xFFFFFFFF is
+* allocated for lower LPS slaves.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 6.4   asa  08/16/17 Added many APIs for MPU access to make MPU usage
+* 					  user-friendly. The APIs added are: Xil_UpdateMPUConfig,
+* 					  Xil_GetMPUConfig, Xil_GetNumOfFreeRegions,
+* 					  Xil_GetNextMPURegion, Xil_DisableMPURegionByRegNum,
+* 					  Xil_GetMPUFreeRegMask, Xil_SetMPURegionByRegNum, and
+* 					  Xil_InitializeExistingMPURegConfig.
+* 					  Added a new array of structure of type XMpuConfig to
+* 					  represent the MPU configuration table.
+* 

+*
+
+*
+*
+******************************************************************************/
+
+#ifndef XIL_MPU_H
+#define XIL_MPU_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+#include "xil_types.h"
+/***************************** Include Files *********************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+#define MPU_REG_DISABLED		0U
+#define MPU_REG_ENABLED			1U
+#define MAX_POSSIBLE_MPU_REGS	16U
+/**************************** Type Definitions *******************************/
+struct XMpuConfig{
+	u32 RegionStatus; /* Enabled or disabled */
+	INTPTR BaseAddress;/* MPU region base address */
+	u64 Size; /* MPU region size address */
+	u32 Attribute; /* MPU region size attribute */
+};
+
+typedef struct XMpuConfig XMpu_Config[MAX_POSSIBLE_MPU_REGS];
+
+extern XMpu_Config Mpu_Config;
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void Xil_SetTlbAttributes(INTPTR Addr, u32 attrib);
+void Xil_EnableMPU(void);
+void Xil_DisableMPU(void);
+u32 Xil_SetMPURegion(INTPTR addr, u64 size, u32 attrib);
+u32 Xil_UpdateMPUConfig(u32 reg_num, INTPTR address, u32 size, u32 attrib);
+void Xil_GetMPUConfig (XMpu_Config mpuconfig);
+u32 Xil_GetNumOfFreeRegions (void);
+u32 Xil_GetNextMPURegion(void);
+u32 Xil_DisableMPURegionByRegNum (u32 reg_num);
+u16 Xil_GetMPUFreeRegMask (void);
+u32 Xil_SetMPURegionByRegNum (u32 reg_num, INTPTR addr, u64 size, u32 attrib);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_MPU_H */
+/**
+* @} End of "addtogroup r5_mpu_apis".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_printf.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_printf.c
new file mode 100644
index 0000000..dc0897f
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_printf.c
@@ -0,0 +1,443 @@
+/*---------------------------------------------------*/
+/* Modified from :                                   */
+/* Public Domain version of printf                   */
+/* Rud Merriam, Compsult, Inc. Houston, Tx.          */
+/* For Embedded Systems Programming, 1991            */
+/*                                                   */
+/*---------------------------------------------------*/
+#include "xil_printf.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include 
+#include 
+#include 
+
+static void padding( const s32 l_flag,const struct params_s *par);
+static void outs(const charptr lp, struct params_s *par);
+static s32 getnum( charptr* linep);
+
+typedef struct params_s {
+    s32 len;
+    s32 num1;
+    s32 num2;
+    char8 pad_character;
+    s32 do_padding;
+    s32 left_flag;
+    s32 unsigned_flag;
+} params_t;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine puts pad characters into the output  */
+/* buffer.                                           */
+/*                                                   */
+static void padding( const s32 l_flag, const struct params_s *par)
+{
+    s32 i;
+
+    if ((par->do_padding != 0) && (l_flag != 0) && (par->len < par->num1)) {
+		i=(par->len);
+        for (; i<(par->num1); i++) {
+#ifdef STDOUT_BASEADDRESS
+            outbyte( par->pad_character);
+#endif
+		}
+    }
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a string to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+static void outs(const charptr lp, struct params_s *par)
+{
+    charptr LocalPtr;
+	LocalPtr = lp;
+    /* pad on left if needed                         */
+	if(LocalPtr != NULL) {
+		par->len = (s32)strlen( LocalPtr);
+	}
+    padding( !(par->left_flag), par);
+
+    /* Move string to the buffer                     */
+    while (((*LocalPtr) != (char8)0) && ((par->num2) != 0)) {
+		(par->num2)--;
+#ifdef STDOUT_BASEADDRESS
+        outbyte(*LocalPtr);
+#endif
+		LocalPtr += 1;
+}
+
+    /* Pad on right if needed                        */
+    /* CR 439175 - elided next stmt. Seemed bogus.   */
+    /* par->len = strlen( lp)                      */
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a number to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+
+static void outnum( const s32 n, const s32 base, struct params_s *par)
+{
+    s32 negative;
+	s32 i;
+    char8 outbuf[32];
+    const char8 digits[] = "0123456789ABCDEF";
+    u32 num;
+    for(i = 0; i<32; i++) {
+	outbuf[i] = '0';
+    }
+
+    /* Check if number is negative                   */
+    if ((par->unsigned_flag == 0) && (base == 10) && (n < 0L)) {
+        negative = 1;
+		num =(-(n));
+    }
+    else{
+        num = n;
+        negative = 0;
+    }
+
+    /* Build number (backwards) in outbuf            */
+    i = 0;
+    do {
+		outbuf[i] = digits[(num % base)];
+		i++;
+		num /= base;
+    } while (num > 0);
+
+    if (negative != 0) {
+		outbuf[i] = '-';
+		i++;
+	}
+
+    outbuf[i] = 0;
+    i--;
+
+    /* Move the converted number to the buffer and   */
+    /* add in the padding where needed.              */
+    par->len = (s32)strlen(outbuf);
+    padding( !(par->left_flag), par);
+    while (&outbuf[i] >= outbuf) {
+#ifdef STDOUT_BASEADDRESS
+	outbyte( outbuf[i] );
+#endif
+		i--;
+}
+    padding( par->left_flag, par);
+}
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a 64-bit number to the output  */
+/* buffer as directed by the padding and positioning */
+/* flags. 											 */
+/*                                                   */
+#if defined (__aarch64__)
+static void outnum1( const s64 n, const s32 base, params_t *par)
+{
+    s32 negative;
+	s32 i;
+    char8 outbuf[64];
+    const char8 digits[] = "0123456789ABCDEF";
+    u64 num;
+    for(i = 0; i<64; i++) {
+	outbuf[i] = '0';
+    }
+
+    /* Check if number is negative                   */
+    if ((par->unsigned_flag == 0) && (base == 10) && (n < 0L)) {
+        negative = 1;
+		num =(-(n));
+    }
+    else{
+        num = (n);
+        negative = 0;
+    }
+
+    /* Build number (backwards) in outbuf            */
+    i = 0;
+    do {
+		outbuf[i] = digits[(num % base)];
+		i++;
+		num /= base;
+    } while (num > 0);
+
+    if (negative != 0) {
+		outbuf[i] = '-';
+		i++;
+	}
+
+    outbuf[i] = 0;
+    i--;
+
+    /* Move the converted number to the buffer and   */
+    /* add in the padding where needed.              */
+    par->len = (s32)strlen(outbuf);
+    padding( !(par->left_flag), par);
+    while (&outbuf[i] >= outbuf) {
+	outbyte( outbuf[i] );
+		i--;
+}
+    padding( par->left_flag, par);
+}
+#endif
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine gets a number from the format        */
+/* string.                                           */
+/*                                                   */
+static s32 getnum( charptr* linep)
+{
+    s32 n;
+    s32 ResultIsDigit = 0;
+    charptr cptr;
+    n = 0;
+    cptr = *linep;
+	if(cptr != NULL){
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    while (ResultIsDigit != 0) {
+		if(cptr != NULL){
+			n = ((n*10) + (((s32)*cptr) - (s32)'0'));
+			cptr += 1;
+			if(cptr != NULL){
+				ResultIsDigit = isdigit(((s32)*cptr));
+			}
+		}
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    *linep = ((charptr )(cptr));
+    return(n);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine operates just like a printf/sprintf  */
+/* routine. It outputs a set of data under the       */
+/* control of a formatting string. Not all of the    */
+/* standard C format control are supported. The ones */
+/* provided are primarily those needed for embedded  */
+/* systems work. Primarily the floating point        */
+/* routines are omitted. Other formats could be      */
+/* added easily by following the examples shown for  */
+/* the supported formats.                            */
+/*                                                   */
+
+/* void esp_printf( const func_ptr f_ptr,
+   const charptr ctrl1, ...) */
+#if HYP_GUEST && EL1_NONSECURE && XEN_USE_PV_CONSOLE
+void xil_printf( const char8 *ctrl1, ...){
+	XPVXenConsole_Printf(ctrl1);
+}
+#else
+void xil_printf( const char8 *ctrl1, ...)
+{
+	s32 Check;
+#if defined (__aarch64__)
+    s32 long_flag;
+#endif
+    s32 dot_flag;
+
+    params_t par;
+
+    char8 ch;
+    va_list argp;
+    char8 *ctrl = (char8 *)ctrl1;
+
+    va_start( argp, ctrl1);
+
+    while ((ctrl != NULL) && (*ctrl != (char8)0)) {
+
+        /* move format string chars to buffer until a  */
+        /* format control is found.                    */
+        if (*ctrl != '%') {
+#ifdef STDOUT_BASEADDRESS
+            outbyte(*ctrl);
+#endif
+			ctrl += 1;
+            continue;
+        }
+
+        /* initialize all the flags for this format.   */
+        dot_flag = 0;
+#if defined (__aarch64__)
+		long_flag = 0;
+#endif
+        par.unsigned_flag = 0;
+		par.left_flag = 0;
+		par.do_padding = 0;
+        par.pad_character = ' ';
+        par.num2=32767;
+		par.num1=0;
+		par.len=0;
+
+ try_next:
+		if(ctrl != NULL) {
+			ctrl += 1;
+		}
+		if(ctrl != NULL) {
+			ch = *ctrl;
+		}
+		else {
+			ch = *ctrl;
+		}
+
+        if (isdigit((s32)ch) != 0) {
+            if (dot_flag != 0) {
+                par.num2 = getnum(&ctrl);
+			}
+            else {
+                if (ch == '0') {
+                    par.pad_character = '0';
+				}
+				if(ctrl != NULL) {
+			par.num1 = getnum(&ctrl);
+				}
+                par.do_padding = 1;
+            }
+            if(ctrl != NULL) {
+			ctrl -= 1;
+			}
+            goto try_next;
+        }
+
+        switch (tolower((s32)ch)) {
+            case '%':
+#ifdef STDOUT_BASEADDRESS
+                outbyte( '%');
+#endif
+                Check = 1;
+                break;
+
+            case '-':
+                par.left_flag = 1;
+                Check = 0;
+                break;
+
+            case '.':
+                dot_flag = 1;
+                Check = 0;
+                break;
+
+            case 'l':
+            #if defined (__aarch64__)
+                long_flag = 1;
+            #endif
+                Check = 0;
+                break;
+
+            case 'u':
+                par.unsigned_flag = 1;
+                /* fall through */
+            case 'i':
+            case 'd':
+                #if defined (__aarch64__)
+                if (long_flag != 0){
+			        outnum1((s64)va_arg(argp, s64), 10L, &par);
+                }
+                else {
+                    outnum( va_arg(argp, s32), 10L, &par);
+                }
+                #else
+                    outnum( va_arg(argp, s32), 10L, &par);
+                #endif
+				Check = 1;
+                break;
+            case 'p':
+                #if defined (__aarch64__)
+                par.unsigned_flag = 1;
+			    outnum1((s64)va_arg(argp, s64), 16L, &par);
+			    Check = 1;
+                break;
+                #endif
+            case 'X':
+            case 'x':
+                par.unsigned_flag = 1;
+                #if defined (__aarch64__)
+                if (long_flag != 0) {
+				    outnum1((s64)va_arg(argp, s64), 16L, &par);
+				}
+				else {
+				    outnum((s32)va_arg(argp, s32), 16L, &par);
+                }
+                #else
+                outnum((s32)va_arg(argp, s32), 16L, &par);
+                #endif
+                Check = 1;
+                break;
+
+            case 's':
+                outs( va_arg( argp, char *), &par);
+                Check = 1;
+                break;
+
+            case 'c':
+#ifdef STDOUT_BASEADDRESS
+                outbyte( va_arg( argp, s32));
+#endif
+                Check = 1;
+                break;
+
+            case '\\':
+                switch (*ctrl) {
+                    case 'a':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x07));
+#endif
+                        break;
+                    case 'h':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x08));
+#endif
+                        break;
+                    case 'r':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x0D));
+#endif
+                        break;
+                    case 'n':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x0D));
+                        outbyte( ((char8)0x0A));
+#endif
+                        break;
+                    default:
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( *ctrl);
+#endif
+                        break;
+                }
+                ctrl += 1;
+                Check = 0;
+                break;
+
+            default:
+		Check = 1;
+		break;
+        }
+        if(Check == 1) {
+			if(ctrl != NULL) {
+				ctrl += 1;
+			}
+                continue;
+        }
+        goto try_next;
+    }
+    va_end( argp);
+}
+#endif
+/*---------------------------------------------------*/
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_printf.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_printf.h
new file mode 100644
index 0000000..016ae3b
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_printf.h
@@ -0,0 +1,48 @@
+ #ifndef XIL_PRINTF_H
+ #define XIL_PRINTF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include 
+#include 
+#include 
+#include "xil_types.h"
+#include "xparameters.h"
+#include "bspconfig.h"
+#if HYP_GUEST && EL1_NONSECURE && XEN_USE_PV_CONSOLE
+#include "xen_console.h"
+#endif
+
+/*----------------------------------------------------*/
+/* Use the following parameter passing structure to   */
+/* make xil_printf re-entrant.                        */
+/*----------------------------------------------------*/
+
+struct params_s;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+typedef char8* charptr;
+typedef s32 (*func_ptr)(int c);
+
+/*                                                   */
+
+void xil_printf( const char8 *ctrl1, ...);
+void print( const char8 *ptr);
+extern void outbyte (char8 c);
+extern char8 inbyte(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_sleepcommon.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_sleepcommon.c
new file mode 100644
index 0000000..972a310
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_sleepcommon.c
@@ -0,0 +1,106 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+*@file xil_sleepcommon.c
+*
+* This file contains the sleep API's
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 6.6 	srm  	 11/02/17 First release
+* 

+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "sleep.h"
+
+/****************************  Constant Definitions  *************************/
+
+
+/*****************************************************************************/
+/**
+*
+* This API gives delay in sec
+*
+* @param            seconds - delay time in seconds
+*
+* @return           none
+*
+* @note             none
+*
+*****************************************************************************/
+ void sleep(unsigned int seconds)
+ {
+#if defined (ARMR5)
+	sleep_R5(seconds);
+#elif defined (__aarch64__) || defined (ARMA53_32)
+	sleep_A53(seconds);
+#elif defined (__MICROBLAZE__)
+	sleep_MB(seconds);
+#else
+	sleep_A9(seconds);
+#endif
+
+ }
+
+/****************************************************************************/
+/**
+*
+* This API gives delay in usec
+*
+* @param            useconds - delay time in useconds
+*
+* @return           none
+*
+* @note             none
+*
+*****************************************************************************/
+ void usleep(unsigned long useconds)
+ {
+#if defined (ARMR5)
+	usleep_R5(useconds);
+#elif defined (__aarch64__) || defined (ARMA53_32)
+	usleep_A53(useconds);
+#elif defined (__MICROBLAZE__)
+	usleep_MB(useconds);
+#else
+	usleep_A9(useconds);
+#endif
+
+ }
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_sleeptimer.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_sleeptimer.c
new file mode 100644
index 0000000..4772606
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_sleeptimer.c
@@ -0,0 +1,161 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xil_sleeptimer.c
+*
+* This file provides the common helper routines for the sleep API's
+*
+* 
+* MODIFICATION HISTORY :
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 6.6	srm  10/18/17 First Release.
+*
+* 

+*****************************************************************************/
+
+/****************************  Include Files  ********************************/
+
+#include "xil_io.h"
+#include "xil_sleeptimer.h"
+#include "xtime_l.h"
+
+/****************************  Constant Definitions  *************************/
+
+
+/* Function definitions are applicable only when TTC3 is present*/
+#if defined (SLEEP_TIMER_BASEADDR)
+/****************************************************************************/
+/**
+*
+* This is a helper function used by sleep/usleep APIs to
+* have delay in sec/usec
+*
+* @param            delay - delay time in seconds/micro seconds
+*
+* @param            frequency - Number of counts per second/micro second
+*
+* @return           none
+*
+* @note             none
+*
+*****************************************************************************/
+void Xil_SleepTTCCommon(u32 delay, u64 frequency)
+{
+	INTPTR tEnd = 0U;
+	INTPTR tCur = 0U;
+	XCntrVal TimeHighVal = 0U;
+	XCntrVal TimeLowVal1 = 0U;
+	XCntrVal TimeLowVal2 = 0U;
+
+	TimeLowVal1 = XSleep_ReadCounterVal(SLEEP_TIMER_BASEADDR +
+			XSLEEP_TIMER_TTC_COUNT_VALUE_OFFSET);
+	tEnd = (INTPTR)TimeLowVal1 + ((INTPTR)(delay) * frequency);
+	do
+	{
+		TimeLowVal2 = XSleep_ReadCounterVal(SLEEP_TIMER_BASEADDR +
+				                  XSLEEP_TIMER_TTC_COUNT_VALUE_OFFSET);
+		if (TimeLowVal2 < TimeLowVal1) {
+			TimeHighVal++;
+		}
+		TimeLowVal1 = TimeLowVal2;
+		tCur = (((INTPTR) TimeHighVal) << XSLEEP_TIMER_REG_SHIFT) |
+								(INTPTR)TimeLowVal2;
+	}while (tCur < tEnd);
+}
+
+
+/*****************************************************************************/
+/**
+*
+* This API starts the Triple Timer Counter
+*
+* @param            none
+*
+* @return           none
+*
+* @note             none
+*
+*****************************************************************************/
+void XTime_StartTTCTimer()
+{
+	u32 TimerPrescalar;
+	u32 TimerCntrl;
+
+#if (defined (__aarch64__) && EL3==1) || defined (ARMR5) || defined (ARMA53_32)
+	u32 LpdRst;
+
+	LpdRst = XSleep_ReadCounterVal(RST_LPD_IOU2);
+
+	/* check if the timer is reset */
+	if (((LpdRst & (RST_LPD_IOU2_TTC_BASE_RESET_MASK <<
+					       XSLEEP_TTC_INSTANCE)) != 0 )) {
+		LpdRst = LpdRst & (~(RST_LPD_IOU2_TTC_BASE_RESET_MASK <<
+							XSLEEP_TTC_INSTANCE));
+		Xil_Out32(RST_LPD_IOU2, LpdRst);
+	} else {
+#endif
+		TimerCntrl = XSleep_ReadCounterVal(SLEEP_TIMER_BASEADDR +
+					XSLEEP_TIMER_TTC_CNT_CNTRL_OFFSET);
+		/* check if Timer is disabled */
+		if ((TimerCntrl & XSLEEP_TIMER_TTC_CNT_CNTRL_DIS_MASK) == 0) {
+		    TimerPrescalar = XSleep_ReadCounterVal(SLEEP_TIMER_BASEADDR +
+					       XSLEEP_TIMER_TTC_CLK_CNTRL_OFFSET);
+		/* check if Timer is configured with proper functionalty for sleep */
+		   if ((TimerPrescalar & XSLEEP_TIMER_TTC_CLK_CNTRL_PS_EN_MASK) == 0)
+						return;
+		}
+#if (defined (__aarch64__) && EL3==1) || defined (ARMR5) || defined (ARMA53_32)
+	}
+#endif
+	/* Disable the timer to configure */
+	TimerCntrl = XSleep_ReadCounterVal(SLEEP_TIMER_BASEADDR +
+					XSLEEP_TIMER_TTC_CNT_CNTRL_OFFSET);
+	TimerCntrl = TimerCntrl | XSLEEP_TIMER_TTC_CNT_CNTRL_DIS_MASK;
+	Xil_Out32(SLEEP_TIMER_BASEADDR + XSLEEP_TIMER_TTC_CNT_CNTRL_OFFSET,
+			                 TimerCntrl);
+	/* Disable the prescalar */
+	TimerPrescalar = XSleep_ReadCounterVal(SLEEP_TIMER_BASEADDR +
+			XSLEEP_TIMER_TTC_CLK_CNTRL_OFFSET);
+	TimerPrescalar = TimerPrescalar & (~XSLEEP_TIMER_TTC_CLK_CNTRL_PS_EN_MASK);
+	Xil_Out32(SLEEP_TIMER_BASEADDR + XSLEEP_TIMER_TTC_CLK_CNTRL_OFFSET,
+								TimerPrescalar);
+	/* Enable the Timer */
+	TimerCntrl = TimerCntrl & (~XSLEEP_TIMER_TTC_CNT_CNTRL_DIS_MASK);
+	Xil_Out32(SLEEP_TIMER_BASEADDR + XSLEEP_TIMER_TTC_CNT_CNTRL_OFFSET,
+								TimerCntrl);
+}
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_sleeptimer.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_sleeptimer.h
new file mode 100644
index 0000000..4bfac0a
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_sleeptimer.h
@@ -0,0 +1,116 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_sleeptimer.h
+*
+* This header file contains ARM Cortex A53,A9,R5 specific sleep related APIs.
+* For sleep related functions that can be used across all Xilinx supported
+* processors, please use xil_sleeptimer.h.
+*
+*
+* 
+* MODIFICATION HISTORY :
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 6.6	srm  10/18/17 First Release.
+*
+* 

+*****************************************************************************/
+
+#ifndef XIL_SLEEPTIMER_H		/* prevent circular inclusions */
+#define XIL_SLEEPTIMER_H		/* by using protection macros */
+/****************************  Include Files  ********************************/
+
+#include "xil_io.h"
+#include "xparameters.h"
+#include "bspconfig.h"
+
+/************************** Constant Definitions *****************************/
+
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32)
+#define XSLEEP_TIMER_REG_SHIFT  32U
+#define XSleep_ReadCounterVal   Xil_In32
+#define XCntrVal 			    u32
+#else
+#define XSLEEP_TIMER_REG_SHIFT  16U
+#define XSleep_ReadCounterVal   Xil_In16
+#define XCntrVal 			    u16
+#endif
+
+#if defined(ARMR5) || (defined (__aarch64__) && EL3==1) || defined (ARMA53_32)
+#define RST_LPD_IOU2 					    0xFF5E0238U
+#define RST_LPD_IOU2_TTC_BASE_RESET_MASK 	0x00000800U
+#endif
+
+#if defined (SLEEP_TIMER_BASEADDR)
+/** @name Register Map
+*
+* Register offsets from the base address of the TTC device
+*
+* @{
+*/
+ #define XSLEEP_TIMER_TTC_CLK_CNTRL_OFFSET		0x00000000U
+					     /**< Clock Control Register */
+ #define XSLEEP_TIMER_TTC_CNT_CNTRL_OFFSET		0x0000000CU
+	                                     /**< Counter Control Register*/
+ #define XSLEEP_TIMER_TTC_COUNT_VALUE_OFFSET	0x00000018U
+					     /**< Current Counter Value */
+/* @} */
+/** @name Clock Control Register
+* Clock Control Register definitions of TTC
+* @{
+*/
+ #define XSLEEP_TIMER_TTC_CLK_CNTRL_PS_EN_MASK		0x00000001U
+						   /**< Prescale enable */
+/* @} */
+/** @name Counter Control Register
+* Counter Control Register definitions of TTC
+* @{
+*/
+#define XSLEEP_TIMER_TTC_CNT_CNTRL_DIS_MASK		0x00000001U
+						/**< Disable the counter */
+#define XSLEEP_TIMER_TTC_CNT_CNTRL_RST_MASK		0x00000010U
+						  /**< Reset counter */
+/* @} */
+
+/**************************** Type Definitions *******************************/
+
+/************************** Function Prototypes ******************************/
+
+void Xil_SleepTTCCommon(u32 delay, u64 frequency);
+void XTime_StartTTCTimer();
+
+#endif
+#endif /* XIL_SLEEPTIMER_H */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_testcache.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testcache.c
new file mode 100644
index 0000000..157ad08
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testcache.c
@@ -0,0 +1,371 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testcache.c
+*
+* Contains utility functions to test cache.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/28/09 Initial release
+* 4.1   asa  05/09/14 Ensured that the address uses for cache test is aligned
+*				      cache line.
+* 

+*
+* @note
+* This file contain functions that all operate on HAL.
+*
+******************************************************************************/
+#ifdef __ARM__
+#include "xil_cache.h"
+#include "xil_testcache.h"
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+#ifdef __aarch64__
+#include "xreg_cortexa53.h"
+#else
+#include "xreg_cortexr5.h"
+#endif
+
+#include "xil_types.h"
+
+extern void xil_printf(const char8 *ctrl1, ...);
+
+#define DATA_LENGTH 128
+
+#ifdef __aarch64__
+static INTPTR Data[DATA_LENGTH] __attribute__ ((aligned(64)));
+#else
+static INTPTR Data[DATA_LENGTH] __attribute__ ((aligned(32)));
+#endif
+
+
+/*****************************************************************************/
+/**
+*
+* @brief    Perform DCache range related API test such as Xil_DCacheFlushRange
+*           and Xil_DCacheInvalidateRange. This test function writes a constant
+*           value to the Data array, flushes the range, writes a new value, then
+*           invalidates the corresponding range.
+* @param	None
+*
+* @return
+*      - -1 is returned for a failure
+*      - 0 is returned for a pass
+*
+*****************************************************************************/
+s32 Xil_TestDCacheRange(void)
+{
+	s32 Index;
+	s32 Status = 0;
+	u32 CtrlReg;
+	INTPTR Value;
+
+	xil_printf("-- Cache Range Test --\n\r");
+
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0xA0A00505;
+
+	xil_printf("    initialize Data done:\r\n");
+
+	Xil_DCacheFlushRange((INTPTR)Data, DATA_LENGTH * sizeof(INTPTR));
+
+	xil_printf("    flush range done\r\n");
+
+	dsb();
+	#ifdef __aarch64__
+			CtrlReg = mfcp(SCTLR_EL3);
+			CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+			mtcp(SCTLR_EL3,CtrlReg);
+	#else
+			CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+			CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+			mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+
+	Status = 0;
+
+	for (Index = 0; Index < DATA_LENGTH; Index++) {
+		Value = Data[Index];
+		if (Value != 0xA0A00505) {
+			Status = -1;
+			xil_printf("Data[%d] = %x\r\n", Index, Value);
+			break;
+		}
+	}
+
+	if (!Status) {
+		xil_printf("	Flush worked\r\n");
+	}
+	else {
+		xil_printf("Error: flush dcache range not working\r\n");
+	}
+	dsb();
+	#ifdef __aarch64__
+			CtrlReg = mfcp(SCTLR_EL3);
+			CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
+			mtcp(SCTLR_EL3,CtrlReg);
+		#else
+			CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+			CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+			mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+		#endif
+	dsb();
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0xA0A0C505;
+
+
+
+	Xil_DCacheFlushRange((INTPTR)Data, DATA_LENGTH * sizeof(INTPTR));
+
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = Index + 3;
+
+	Xil_DCacheInvalidateRange((INTPTR)Data, DATA_LENGTH * sizeof(INTPTR));
+
+	xil_printf("    invalidate dcache range done\r\n");
+	dsb();
+	#ifdef __aarch64__
+			CtrlReg = mfcp(SCTLR_EL3);
+			CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+			mtcp(SCTLR_EL3,CtrlReg);
+	#else
+			CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+			CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+			mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0xA0A0A05;
+	dsb();
+	#ifdef __aarch64__
+			CtrlReg = mfcp(SCTLR_EL3);
+			CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
+			mtcp(SCTLR_EL3,CtrlReg);
+	#else
+			CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+			CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+			mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+
+	Status = 0;
+
+	for (Index = 0; Index < DATA_LENGTH; Index++) {
+		Value = Data[Index];
+		if (Value != 0xA0A0A05) {
+			Status = -1;
+			xil_printf("Data[%d] = %x\r\n", Index, Value);
+			break;
+		}
+	}
+
+
+	if (!Status) {
+		xil_printf("    Invalidate worked\r\n");
+	}
+	else {
+		xil_printf("Error: Invalidate dcache range not working\r\n");
+	}
+	xil_printf("-- Cache Range Test Complete --\r\n");
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+* @brief    Perform DCache all related API test such as Xil_DCacheFlush and
+*           Xil_DCacheInvalidate. This test function writes a constant value
+*           to the Data array, flushes the DCache, writes a new value,
+*           then invalidates the DCache.
+*
+* @return
+*          - 0 is returned for a pass
+*          - -1 is returned for a failure
+*****************************************************************************/
+s32 Xil_TestDCacheAll(void)
+{
+	s32 Index;
+	s32 Status;
+	INTPTR Value;
+	u32 CtrlReg;
+
+	xil_printf("-- Cache All Test --\n\r");
+
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0x50500A0A;
+	xil_printf("    initialize Data done:\r\n");
+
+	Xil_DCacheFlush();
+	xil_printf("    flush all done\r\n");
+	dsb();
+	#ifdef __aarch64__
+		CtrlReg = mfcp(SCTLR_EL3);
+		CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+		mtcp(SCTLR_EL3,CtrlReg);
+	#else
+		CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+		CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+		mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+	Status = 0;
+
+	for (Index = 0; Index < DATA_LENGTH; Index++) {
+		Value = Data[Index];
+
+		if (Value != 0x50500A0A) {
+			Status = -1;
+			xil_printf("Data[%d] = %x\r\n", Index, Value);
+			break;
+		}
+	}
+
+	if (!Status) {
+		xil_printf("    Flush all worked\r\n");
+	}
+	else {
+		xil_printf("Error: Flush dcache all not working\r\n");
+	}
+	dsb();
+	#ifdef __aarch64__
+		CtrlReg = mfcp(SCTLR_EL3);
+		CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
+		mtcp(SCTLR_EL3,CtrlReg);
+	#else
+		CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+			CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+			mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0x505FFA0A;
+
+	Xil_DCacheFlush();
+
+
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = Index + 3;
+
+	Xil_DCacheInvalidate();
+
+	xil_printf("    invalidate all done\r\n");
+	dsb();
+	#ifdef __aarch64__
+		CtrlReg = mfcp(SCTLR_EL3);
+		CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+		mtcp(SCTLR_EL3,CtrlReg);
+	#else
+		CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+		CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+		mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0x50CFA0A;
+	dsb();
+	#ifdef __aarch64__
+		CtrlReg = mfcp(SCTLR_EL3);
+		CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
+		mtcp(SCTLR_EL3,CtrlReg);
+	#else
+		CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+		CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+		mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+	Status = 0;
+
+	for (Index = 0; Index < DATA_LENGTH; Index++) {
+		Value = Data[Index];
+		if (Value != 0x50CFA0A) {
+			Status = -1;
+			xil_printf("Data[%d] = %x\r\n", Index, Value);
+			break;
+		}
+	}
+
+	if (!Status) {
+		xil_printf("    Invalidate all worked\r\n");
+	}
+	else {
+			xil_printf("Error: Invalidate dcache all not working\r\n");
+	}
+
+	xil_printf("-- DCache all Test Complete --\n\r");
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+* @brief   Perform Xil_ICacheInvalidateRange() on a few function pointers.
+*
+* @return
+*     - 0 is returned for a pass
+* @note
+*     The function will hang if it fails.
+*****************************************************************************/
+s32 Xil_TestICacheRange(void)
+{
+
+	Xil_ICacheInvalidateRange((INTPTR)Xil_TestICacheRange, 1024);
+	Xil_ICacheInvalidateRange((INTPTR)Xil_TestDCacheRange, 1024);
+	Xil_ICacheInvalidateRange((INTPTR)Xil_TestDCacheAll, 1024);
+
+	xil_printf("-- Invalidate icache range done --\r\n");
+
+	return 0;
+}
+
+/*****************************************************************************/
+/**
+* @brief     Perform Xil_ICacheInvalidate() on a few function pointers.
+*
+* @return
+*           - 0 is returned for a pass
+* @note
+* The function will hang if it fails.
+*****************************************************************************/
+s32 Xil_TestICacheAll(void)
+{
+	Xil_ICacheInvalidate();
+	xil_printf("-- Invalidate icache all done --\r\n");
+	return 0;
+}
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_testcache.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testcache.h
new file mode 100644
index 0000000..c35e9a4
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testcache.h
@@ -0,0 +1,71 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testcache.h
+*
+* @addtogroup common_test_utils
+* 
Cache test 

+* The xil_testcache.h file contains utility functions to test cache.
+*
+* @{
+* 
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a hbm  07/29/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TESTCACHE_H	/* prevent circular inclusions */
+#define XIL_TESTCACHE_H	/* by using protection macros */
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern s32 Xil_TestDCacheRange(void);
+extern s32 Xil_TestDCacheAll(void);
+extern s32 Xil_TestICacheRange(void);
+extern s32 Xil_TestICacheAll(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_test_utils".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_testio.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testio.c
new file mode 100644
index 0000000..e6a3680
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testio.c
@@ -0,0 +1,299 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testio.c
+*
+* Contains the memory test utility functions.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a hbm  08/25/09 First release
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xil_testio.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions ****************************/
+/************************** Function Prototypes *****************************/
+
+
+
+/**
+ *
+ * Endian swap a 16-bit word.
+ * @param	Data is the 16-bit word to be swapped.
+ * @return	The endian swapped value.
+ *
+ */
+static u16 Swap16(u16 Data)
+{
+	return ((Data >> 8U) & 0x00FFU) | ((Data << 8U) & 0xFF00U);
+}
+
+/**
+ *
+ * Endian swap a 32-bit word.
+ * @param	Data is the 32-bit word to be swapped.
+ * @return	The endian swapped value.
+ *
+ */
+static u32 Swap32(u32 Data)
+{
+	u16 Lo16;
+	u16 Hi16;
+
+	u16 Swap16Lo;
+	u16 Swap16Hi;
+
+	Hi16 = (u16)((Data >> 16U) & 0x0000FFFFU);
+	Lo16 = (u16)(Data & 0x0000FFFFU);
+
+	Swap16Lo = Swap16(Lo16);
+	Swap16Hi = Swap16(Hi16);
+
+	return (((u32)(Swap16Lo)) << 16U) | ((u32)Swap16Hi);
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Perform a destructive 8-bit wide register IO test where the
+*           register is accessed using Xil_Out8 and Xil_In8, and comparing
+*           the written values by reading them back.
+*
+* @param	Addr: a pointer to the region of memory to be tested.
+* @param	Length: Length of the block.
+* @param	Value: constant used for writting the memory.
+*
+* @return
+*           - -1 is returned for a failure
+*           - 0 is returned for a pass
+*
+*****************************************************************************/
+
+s32 Xil_TestIO8(u8 *Addr, s32 Length, u8 Value)
+{
+	u8 ValueIn;
+	s32 Index;
+	s32 Status = 0;
+
+	for (Index = 0; Index < Length; Index++) {
+		Xil_Out8((INTPTR)Addr, Value);
+
+		ValueIn = Xil_In8((INTPTR)Addr);
+
+		if ((Value != ValueIn) && (Status == 0)) {
+			Status = -1;
+			break;
+		}
+	}
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief   Perform a destructive 16-bit wide register IO test. Each location
+*          is tested by sequentially writing a 16-bit wide register, reading
+*          the register, and comparing value. This function tests three kinds
+*          of register IO functions, normal register IO, little-endian register
+*          IO, and big-endian register IO. When testing little/big-endian IO,
+*          the function performs the following sequence, Xil_Out16LE/Xil_Out16BE,
+*          Xil_In16, Compare In-Out values, Xil_Out16, Xil_In16LE/Xil_In16BE,
+*          Compare In-Out values. Whether to swap the read-in value before
+*          comparing is controlled by the 5th argument.
+*
+* @param	Addr: a pointer to the region of memory to be tested.
+* @param	Length: Length of the block.
+* @param	Value: constant used for writting the memory.
+* @param	Kind: Type of test. Acceptable values are:
+*		    XIL_TESTIO_DEFAULT, XIL_TESTIO_LE, XIL_TESTIO_BE.
+* @param	Swap: indicates whether to byte swap the read-in value.
+*
+* @return
+* - -1 is returned for a failure
+* - 0 is returned for a pass
+*
+*****************************************************************************/
+
+s32 Xil_TestIO16(u16 *Addr, s32 Length, u16 Value, s32 Kind, s32 Swap)
+{
+	u16 *TempAddr16;
+	u16 ValueIn = 0U;
+	s32 Index;
+	TempAddr16 = Addr;
+	Xil_AssertNonvoid(TempAddr16 != NULL);
+
+	for (Index = 0; Index < Length; Index++) {
+		switch (Kind) {
+		case XIL_TESTIO_LE:
+			Xil_Out16LE((INTPTR)TempAddr16, Value);
+			break;
+		case XIL_TESTIO_BE:
+			Xil_Out16BE((INTPTR)TempAddr16, Value);
+			break;
+		default:
+			Xil_Out16((INTPTR)TempAddr16, Value);
+			break;
+		}
+
+		ValueIn = Xil_In16((INTPTR)TempAddr16);
+
+		if ((Kind != 0) && (Swap != 0)) {
+			ValueIn = Swap16(ValueIn);
+		}
+
+		if (Value != ValueIn) {
+			return -1;
+		}
+
+		/* second round */
+		Xil_Out16((INTPTR)TempAddr16, Value);
+
+		switch (Kind) {
+		case XIL_TESTIO_LE:
+			ValueIn = Xil_In16LE((INTPTR)TempAddr16);
+			break;
+		case XIL_TESTIO_BE:
+			ValueIn = Xil_In16BE((INTPTR)TempAddr16);
+			break;
+		default:
+			ValueIn = Xil_In16((INTPTR)TempAddr16);
+			break;
+		}
+
+
+		if ((Kind != 0) && (Swap != 0)) {
+			ValueIn = Swap16(ValueIn);
+		}
+
+		if (Value != ValueIn) {
+			return -1;
+		}
+		TempAddr16 += sizeof(u16);
+	}
+	return 0;
+}
+
+
+/*****************************************************************************/
+/**
+*
+* @brief    Perform a destructive 32-bit wide register IO test. Each location
+*           is tested by sequentially writing a 32-bit wide regsiter, reading
+*           the register, and comparing value. This function tests three kinds
+*           of register IO functions, normal register IO, little-endian register IO,
+*           and big-endian register IO. When testing little/big-endian IO,
+*           the function perform the following sequence, Xil_Out32LE/
+*           Xil_Out32BE, Xil_In32, Compare, Xil_Out32, Xil_In32LE/Xil_In32BE, Compare.
+*           Whether to swap the read-in value *before comparing is controlled
+*           by the 5th argument.
+* @param	Addr: a pointer to the region of memory to be tested.
+* @param	Length: Length of the block.
+* @param	Value: constant used for writting the memory.
+* @param	Kind: type of test. Acceptable values are:
+*		    XIL_TESTIO_DEFAULT, XIL_TESTIO_LE, XIL_TESTIO_BE.
+* @param	Swap: indicates whether to byte swap the read-in value.
+*
+* @return
+*           - -1 is returned for a failure
+*           - 0 is returned for a pass
+*
+*****************************************************************************/
+s32 Xil_TestIO32(u32 *Addr, s32 Length, u32 Value, s32 Kind, s32 Swap)
+{
+	u32 *TempAddr;
+	u32 ValueIn = 0U;
+	s32 Index;
+	TempAddr = Addr;
+	Xil_AssertNonvoid(TempAddr != NULL);
+
+	for (Index = 0; Index < Length; Index++) {
+		switch (Kind) {
+		case XIL_TESTIO_LE:
+			Xil_Out32LE((INTPTR)TempAddr, Value);
+			break;
+		case XIL_TESTIO_BE:
+			Xil_Out32BE((INTPTR)TempAddr, Value);
+			break;
+		default:
+			Xil_Out32((INTPTR)TempAddr, Value);
+			break;
+		}
+
+		ValueIn = Xil_In32((INTPTR)TempAddr);
+
+		if ((Kind != 0) && (Swap != 0)) {
+			ValueIn = Swap32(ValueIn);
+		}
+
+		if (Value != ValueIn) {
+			return -1;
+		}
+
+		/* second round */
+		Xil_Out32((INTPTR)TempAddr, Value);
+
+
+		switch (Kind) {
+		case XIL_TESTIO_LE:
+			ValueIn = Xil_In32LE((INTPTR)TempAddr);
+			break;
+		case XIL_TESTIO_BE:
+			ValueIn = Xil_In32BE((INTPTR)TempAddr);
+			break;
+		default:
+			ValueIn = Xil_In32((INTPTR)TempAddr);
+			break;
+		}
+
+		if ((Kind != 0) && (Swap != 0)) {
+			ValueIn = Swap32(ValueIn);
+		}
+
+		if (Value != ValueIn) {
+			return -1;
+		}
+		TempAddr += sizeof(u32);
+	}
+	return 0;
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_testio.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testio.h
new file mode 100644
index 0000000..ad68ead
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testio.h
@@ -0,0 +1,94 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testio.h
+*
+* @addtogroup common_test_utils Test Utilities
+* 
I/O test 

+* The xil_testio.h file contains utility functions to test endian related memory
+* IO functions.
+*
+* A subset of the memory tests can be selected or all of the tests can be run
+* in order. If there is an error detected by a subtest, the test stops and the
+* failure code is returned. Further tests are not run even if all of the tests
+* are selected.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00 hbm  08/05/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TESTIO_H	/* prevent circular inclusions */
+#define XIL_TESTIO_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+
+#define XIL_TESTIO_DEFAULT 	0
+#define XIL_TESTIO_LE		1
+#define XIL_TESTIO_BE		2
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+extern s32 Xil_TestIO8(u8 *Addr, s32 Length, u8 Value);
+extern s32 Xil_TestIO16(u16 *Addr, s32 Length, u16 Value, s32 Kind, s32 Swap);
+extern s32 Xil_TestIO32(u32 *Addr, s32 Length, u32 Value, s32 Kind, s32 Swap);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_test_utils".
+*/
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_testmem.c b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testmem.c
new file mode 100644
index 0000000..87426d1
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testmem.c
@@ -0,0 +1,868 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testmem.c
+*
+* Contains the memory test utility functions.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a hbm  08/25/09 First release
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xil_testmem.h"
+#include "xil_io.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions ****************************/
+/************************** Function Prototypes *****************************/
+
+static u32 RotateLeft(u32 Input, u8 Width);
+
+/* define ROTATE_RIGHT to give access to this functionality */
+/* #define ROTATE_RIGHT */
+#ifdef ROTATE_RIGHT
+static u32 RotateRight(u32 Input, u8 Width);
+#endif /* ROTATE_RIGHT */
+
+
+/*****************************************************************************/
+/**
+*
+* @brief    Perform a destructive 32-bit wide memory test.
+*
+* @param    Addr: pointer to the region of memory to be tested.
+* @param    Words: length of the block.
+* @param    Pattern: constant used for the constant pattern test, if 0,
+*           0xDEADBEEF is used.
+* @param    Subtest: test type selected. See xil_testmem.h for possible
+*	        values.
+*
+* @return
+*           - 0 is returned for a pass
+*           - 1 is returned for a failure
+*
+* @note
+* Used for spaces where the address range of the region is smaller than
+* the data width. If the memory range is greater than 2 ** Width,
+* the patterns used in XIL_TESTMEM_WALKONES and XIL_TESTMEM_WALKZEROS will
+* repeat on a boundry of a power of two making it more difficult to detect
+* addressing errors. The XIL_TESTMEM_INCREMENT and XIL_TESTMEM_INVERSEADDR
+* tests suffer the same problem. Ideally, if large blocks of memory are to be
+* tested, break them up into smaller regions of memory to allow the test
+* patterns used not to repeat over the region tested.
+*
+*****************************************************************************/
+s32 Xil_TestMem32(u32 *Addr, u32 Words, u32 Pattern, u8 Subtest)
+{
+	u32 I;
+	u32 j;
+	u32 Val;
+	u32 FirtVal;
+	u32 WordMem32;
+	s32 Status = 0;
+
+	Xil_AssertNonvoid(Words != (u32)0);
+	Xil_AssertNonvoid(Subtest <= (u8)XIL_TESTMEM_MAXTEST);
+	Xil_AssertNonvoid(Addr != NULL);
+
+	/*
+	 * variable initialization
+	 */
+	Val = XIL_TESTMEM_INIT_VALUE;
+	FirtVal = XIL_TESTMEM_INIT_VALUE;
+
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INCREMENT)) {
+		/*
+		 * Fill the memory with incrementing
+		 * values starting from 'FirtVal'
+		 */
+		for (I = 0U; I < Words; I++) {
+			*(Addr+I) = Val;
+			Val++;
+		}
+
+		/*
+		 * Restore the reference 'Val' to the
+		 * initial value
+		 */
+		Val = FirtVal;
+
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the incrementing reference
+		 * Val
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			WordMem32 = *(Addr+I);
+
+			if (WordMem32 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+
+			Val++;
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKONES)) {
+		/*
+		 * set up to cycle through all possible initial
+		 * test Patterns for walking ones test
+		 */
+
+		for (j = 0U; j < (u32)32; j++) {
+			/*
+			 * Generate an initial value for walking ones test
+			 * to test for bad data bits
+			 */
+
+			Val = (1U << j);
+
+			/*
+			 * START walking ones test
+			 * Write a one to each data bit indifferent locations
+			 */
+
+			for (I = 0U; I < (u32)32; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = (u32) RotateLeft(Val, 32U);
+			}
+
+			/*
+			 * Restore the reference 'val' to the
+			 * initial value
+			 */
+			Val = 1U << j;
+
+			/* Read the values from each location that was
+			 * written */
+			for (I = 0U; I < (u32)32; I++) {
+				/* read memory location */
+
+				WordMem32 = *(Addr+I);
+
+				if (WordMem32 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+
+				Val = (u32)RotateLeft(Val, 32U);
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKZEROS)) {
+		/*
+		 * set up to cycle through all possible
+		 * initial test Patterns for walking zeros test
+		 */
+
+		for (j = 0U; j < (u32)32; j++) {
+
+			/*
+			 * Generate an initial value for walking ones test
+			 * to test for bad data bits
+			 */
+
+			Val = ~(1U << j);
+
+			/*
+			 * START walking zeros test
+			 * Write a one to each data bit indifferent locations
+			 */
+
+			for (I = 0U; I < (u32)32; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = ~((u32)RotateLeft(~Val, 32U));
+			}
+
+			/*
+			 * Restore the reference 'Val' to the
+			 * initial value
+			 */
+
+			Val = ~(1U << j);
+
+			/* Read the values from each location that was
+			 * written */
+			for (I = 0U; I < (u32)32; I++) {
+				/* read memory location */
+				WordMem32 = *(Addr+I);
+				if (WordMem32 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+				Val = ~((u32)RotateLeft(~Val, 32U));
+			}
+
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INVERSEADDR)) {
+		/* Fill the memory with inverse of address */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			Val = (u32) (~((INTPTR) (&Addr[I])));
+			*(Addr+I) = Val;
+		}
+
+		/*
+		 * Check every word within the words
+		 * of tested memory
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* Read the location */
+			WordMem32 = *(Addr+I);
+			Val = (u32) (~((INTPTR) (&Addr[I])));
+
+			if ((WordMem32 ^ Val) != 0x00000000U) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_FIXEDPATTERN)) {
+		/*
+		 * Generate an initial value for
+		 * memory testing
+		 */
+
+		if (Pattern == (u32)0) {
+			Val = 0xDEADBEEFU;
+		}
+		else {
+			Val = Pattern;
+		}
+
+		/*
+		 * Fill the memory with fixed Pattern
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			*(Addr+I) = Val;
+		}
+
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the fixed Pattern
+		 */
+
+		for (I = 0U; I < Words; I++) {
+
+			/* read memory location */
+
+			WordMem32 = *(Addr+I);
+			if (WordMem32 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+End_Label:
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Perform a destructive 16-bit wide memory test.
+*
+* @param    Addr: pointer to the region of memory to be tested.
+* @param    Words: length of the block.
+* @param    Pattern: constant used for the constant Pattern test, if 0,
+*           0xDEADBEEF is used.
+* @param    Subtest: type of test selected. See xil_testmem.h for possible
+*	        values.
+*
+* @return
+*
+*           - -1 is returned for a failure
+*           - 0 is returned for a pass
+*
+* @note
+* Used for spaces where the address range of the region is smaller than
+* the data width. If the memory range is greater than 2 ** Width,
+* the patterns used in XIL_TESTMEM_WALKONES and XIL_TESTMEM_WALKZEROS will
+* repeat on a boundry of a power of two making it more difficult to detect
+* addressing errors. The XIL_TESTMEM_INCREMENT and XIL_TESTMEM_INVERSEADDR
+* tests suffer the same problem. Ideally, if large blocks of memory are to be
+* tested, break them up into smaller regions of memory to allow the test
+* patterns used not to repeat over the region tested.
+*
+*****************************************************************************/
+s32 Xil_TestMem16(u16 *Addr, u32 Words, u16 Pattern, u8 Subtest)
+{
+	u32 I;
+	u32 j;
+	u16 Val;
+	u16 FirtVal;
+	u16 WordMem16;
+	s32 Status = 0;
+
+	Xil_AssertNonvoid(Words != (u32)0);
+	Xil_AssertNonvoid(Subtest <= XIL_TESTMEM_MAXTEST);
+	Xil_AssertNonvoid(Addr != NULL);
+
+	/*
+	 * variable initialization
+	 */
+	Val = XIL_TESTMEM_INIT_VALUE;
+	FirtVal = XIL_TESTMEM_INIT_VALUE;
+
+	/*
+	 * selectthe proper Subtest(s)
+	 */
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INCREMENT)) {
+		/*
+		 * Fill the memory with incrementing
+		 * values starting from 'FirtVal'
+		 */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			*(Addr+I) = Val;
+			Val++;
+		}
+		/*
+		 * Restore the reference 'Val' to the
+		 * initial value
+		 */
+		Val = FirtVal;
+
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the incrementing reference val
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem16 = *(Addr+I);
+			if (WordMem16 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+			Val++;
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKONES)) {
+		/*
+		 * set up to cycle through all possible initial test
+		 * Patterns for walking ones test
+		 */
+
+		for (j = 0U; j < (u32)16; j++) {
+			/*
+			 * Generate an initial value for walking ones test
+			 * to test for bad data bits
+			 */
+
+			Val = (u16)((u32)1 << j);
+			/*
+			 * START walking ones test
+			 * Write a one to each data bit indifferent locations
+			 */
+
+			for (I = 0U; I < (u32)16; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = (u16)RotateLeft(Val, 16U);
+			}
+			/*
+			 * Restore the reference 'Val' to the
+			 * initial value
+			 */
+			Val = (u16)((u32)1 << j);
+			/* Read the values from each location that was written */
+			for (I = 0U; I < (u32)16; I++) {
+				/* read memory location */
+				WordMem16 = *(Addr+I);
+				if (WordMem16 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+				Val = (u16)RotateLeft(Val, 16U);
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKZEROS)) {
+		/*
+		 * set up to cycle through all possible initial
+		 * test Patterns for walking zeros test
+		 */
+
+		for (j = 0U; j < (u32)16; j++) {
+			/*
+			 * Generate an initial value for walking ones
+			 * test to test for bad
+			 * data bits
+			 */
+
+			Val = ~(1U << j);
+			/*
+			 * START walking zeros test
+			 * Write a one to each data bit indifferent locations
+			 */
+
+			for (I = 0U; I < (u32)16; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = ~((u16)RotateLeft(~Val, 16U));
+			}
+			/*
+			 * Restore the reference 'Val' to the
+			 * initial value
+			 */
+			Val = ~(1U << j);
+			/* Read the values from each location that was written */
+			for (I = 0U; I < (u32)16; I++) {
+				/* read memory location */
+				WordMem16 = *(Addr+I);
+				if (WordMem16 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+				Val = ~((u16)RotateLeft(~Val, 16U));
+			}
+
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INVERSEADDR)) {
+		/* Fill the memory with inverse of address */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			Val = (u16) (~((INTPTR)(&Addr[I])));
+			*(Addr+I) = Val;
+		}
+		/*
+		 * Check every word within the words
+		 * of tested memory
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem16 = *(Addr+I);
+			Val = (u16) (~((INTPTR) (&Addr[I])));
+			if ((WordMem16 ^ Val) != 0x0000U) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_FIXEDPATTERN)) {
+		/*
+		 * Generate an initial value for
+		 * memory testing
+		 */
+		if (Pattern == (u16)0) {
+			Val = 0xDEADU;
+		}
+		else {
+			Val = Pattern;
+		}
+
+		/*
+		 * Fill the memory with fixed pattern
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			*(Addr+I) = Val;
+		}
+
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the fixed pattern
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem16 = *(Addr+I);
+			if (WordMem16 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+End_Label:
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+*
+* @brief    Perform a destructive 8-bit wide memory test.
+*
+* @param    Addr: pointer to the region of memory to be tested.
+* @param    Words: length of the block.
+* @param    Pattern: constant used for the constant pattern test, if 0,
+*           0xDEADBEEF is used.
+* @param    Subtest: type of test selected. See xil_testmem.h for possible
+*	        values.
+*
+* @return
+*           - -1 is returned for a failure
+*           - 0 is returned for a pass
+*
+* @note
+* Used for spaces where the address range of the region is smaller than
+* the data width. If the memory range is greater than 2 ** Width,
+* the patterns used in XIL_TESTMEM_WALKONES and XIL_TESTMEM_WALKZEROS will
+* repeat on a boundry of a power of two making it more difficult to detect
+* addressing errors. The XIL_TESTMEM_INCREMENT and XIL_TESTMEM_INVERSEADDR
+* tests suffer the same problem. Ideally, if large blocks of memory are to be
+* tested, break them up into smaller regions of memory to allow the test
+* patterns used not to repeat over the region tested.
+*
+*****************************************************************************/
+s32 Xil_TestMem8(u8 *Addr, u32 Words, u8 Pattern, u8 Subtest)
+{
+	u32 I;
+	u32 j;
+	u8 Val;
+	u8 FirtVal;
+	u8 WordMem8;
+	s32 Status = 0;
+
+	Xil_AssertNonvoid(Words != (u32)0);
+	Xil_AssertNonvoid(Subtest <= XIL_TESTMEM_MAXTEST);
+	Xil_AssertNonvoid(Addr != NULL);
+
+	/*
+	 * variable initialization
+	 */
+	Val = XIL_TESTMEM_INIT_VALUE;
+	FirtVal = XIL_TESTMEM_INIT_VALUE;
+
+	/*
+	 * select the proper Subtest(s)
+	 */
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INCREMENT)) {
+		/*
+		 * Fill the memory with incrementing
+		 * values starting from 'FirtVal'
+		 */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			*(Addr+I) = Val;
+			Val++;
+		}
+		/*
+		 * Restore the reference 'Val' to the
+		 * initial value
+		 */
+		Val = FirtVal;
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the incrementing reference
+		 * Val
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem8 = *(Addr+I);
+			if (WordMem8 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+			Val++;
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKONES)) {
+		/*
+		 * set up to cycle through all possible initial
+		 * test Patterns for walking ones test
+		 */
+
+		for (j = 0U; j < (u32)8; j++) {
+			/*
+			 * Generate an initial value for walking ones test
+			 * to test for bad data bits
+			 */
+			Val = (u8)((u32)1 << j);
+			/*
+			 * START walking ones test
+			 * Write a one to each data bit indifferent locations
+			 */
+			for (I = 0U; I < (u32)8; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = (u8)RotateLeft(Val, 8U);
+			}
+			/*
+			 * Restore the reference 'Val' to the
+			 * initial value
+			 */
+			Val = (u8)((u32)1 << j);
+			/* Read the values from each location that was written */
+			for (I = 0U; I < (u32)8; I++) {
+				/* read memory location */
+				WordMem8 = *(Addr+I);
+				if (WordMem8 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+				Val = (u8)RotateLeft(Val, 8U);
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKZEROS)) {
+		/*
+		 * set up to cycle through all possible initial test
+		 * Patterns for walking zeros test
+		 */
+
+		for (j = 0U; j < (u32)8; j++) {
+			/*
+			 * Generate an initial value for walking ones test to test
+			 * for bad data bits
+			 */
+			Val = ~(1U << j);
+			/*
+			 * START walking zeros test
+			 * Write a one to each data bit indifferent locations
+			 */
+			for (I = 0U; I < (u32)8; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = ~((u8)RotateLeft(~Val, 8U));
+			}
+			/*
+			 * Restore the reference 'Val' to the
+			 * initial value
+			 */
+			Val = ~(1U << j);
+			/* Read the values from each location that was written */
+			for (I = 0U; I < (u32)8; I++) {
+				/* read memory location */
+				WordMem8 = *(Addr+I);
+				if (WordMem8 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+
+				Val = ~((u8)RotateLeft(~Val, 8U));
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INVERSEADDR)) {
+		/* Fill the memory with inverse of address */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			Val = (u8) (~((INTPTR) (&Addr[I])));
+			*(Addr+I) = Val;
+		}
+
+		/*
+		 * Check every word within the words
+		 * of tested memory
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem8 = *(Addr+I);
+			Val = (u8) (~((INTPTR) (&Addr[I])));
+			if ((WordMem8 ^ Val) != 0x00U) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_FIXEDPATTERN)) {
+		/*
+		 * Generate an initial value for
+		 * memory testing
+		 */
+
+		if (Pattern == (u8)0) {
+			Val = 0xA5U;
+		}
+		else {
+			Val = Pattern;
+		}
+		/*
+		 * Fill the memory with fixed Pattern
+		 */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			*(Addr+I) = Val;
+		}
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the fixed Pattern
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem8 = *(Addr+I);
+			if (WordMem8 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+End_Label:
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+*
+* @brief   Rotates the provided value to the left one bit position
+*
+* @param    Input is value to be rotated to the left
+* @param    Width is the number of bits in the input data
+*
+* @return
+*           The resulting unsigned long value of the rotate left
+*
+*
+*****************************************************************************/
+static u32 RotateLeft(u32 Input, u8 Width)
+{
+	u32 Msb;
+	u32 ReturnVal;
+	u32 WidthMask;
+	u32 MsbMask;
+	u32 LocalInput = Input;
+
+	/*
+	 * set up the WidthMask and the MsbMask
+	 */
+
+	MsbMask = 1U << (Width - 1U);
+
+	WidthMask = (MsbMask << (u32)1) - (u32)1;
+
+	/*
+	 * set the Width of the Input to the correct width
+	 */
+
+	LocalInput = LocalInput & WidthMask;
+
+	Msb = LocalInput & MsbMask;
+
+	ReturnVal = LocalInput << 1U;
+
+	if (Msb != 0x00000000U) {
+		ReturnVal = ReturnVal | (u32)0x00000001;
+	}
+
+	ReturnVal = ReturnVal & WidthMask;
+
+	return ReturnVal;
+
+}
+
+#ifdef ROTATE_RIGHT
+/*****************************************************************************/
+/**
+*
+* @brief    Rotates the provided value to the right one bit position
+*
+* @param    Input: value to be rotated to the right
+* @param    Width: number of bits in the input data
+*
+* @return
+*           The resulting u32 value of the rotate right
+*
+*****************************************************************************/
+static u32 RotateRight(u32 Input, u8 Width)
+{
+	u32 Lsb;
+	u32 ReturnVal;
+	u32 WidthMask;
+	u32 MsbMask;
+	u32 LocalInput = Input;
+	/*
+	 * set up the WidthMask and the MsbMask
+	 */
+
+	MsbMask = 1U << (Width - 1U);
+
+	WidthMask = (MsbMask << 1U) - 1U;
+
+	/*
+	 * set the width of the input to the correct width
+	 */
+
+	LocalInput = LocalInput & WidthMask;
+
+	ReturnVal = LocalInput >> 1U;
+
+	Lsb = LocalInput & 0x00000001U;
+
+	if (Lsb != 0x00000000U) {
+		ReturnVal = ReturnVal | MsbMask;
+	}
+
+	ReturnVal = ReturnVal & WidthMask;
+
+	return ReturnVal;
+
+}
+#endif /* ROTATE_RIGHT */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_testmem.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testmem.h
new file mode 100644
index 0000000..c204728
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_testmem.h
@@ -0,0 +1,158 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testmem.h
+* @addtogroup common_test_utils
+*
+* 
Memory test

+*
+* The xil_testmem.h file contains utility functions to test memory.
+* A subset of the memory tests can be selected or all of the tests can be run
+* in order. If there is an error detected by a subtest, the test stops and the
+* failure code is returned. Further tests are not run even if all of the tests
+* are selected.
+* Following list describes the supported memory tests:
+*
+*  - XIL_TESTMEM_ALLMEMTESTS: This test runs all of the subtests.
+*
+*  - XIL_TESTMEM_INCREMENT: This test
+* starts at 'XIL_TESTMEM_INIT_VALUE' and uses the incrementing value as the
+* test value for memory.
+*
+*  - XIL_TESTMEM_WALKONES: Also known as the Walking ones test. This test
+* uses a walking '1' as the test value for memory.
+* @code
+*          location 1 = 0x00000001
+*          location 2 = 0x00000002
+*          ...
+* @endcode
+*
+*  - XIL_TESTMEM_WALKZEROS: Also known as the Walking zero's test.
+* This test uses the inverse value of the walking ones test
+* as the test value for memory.
+* @code
+*       location 1 = 0xFFFFFFFE
+*       location 2 = 0xFFFFFFFD
+*       ...
+*@endcode
+*
+*  - XIL_TESTMEM_INVERSEADDR: Also known as the inverse address test.
+* This test uses the inverse of the address of the location under test
+* as the test value for memory.
+*
+*  - XIL_TESTMEM_FIXEDPATTERN: Also known as the fixed pattern test.
+* This test uses the provided patters as the test value for memory.
+* If zero is provided as the pattern the test uses '0xDEADBEEF".
+*
+* @warning
+* The tests are DESTRUCTIVE. Run before any initialized memory spaces
+* have been set up.
+* The address provided to the memory tests is not checked for
+* validity except for the NULL case. It is possible to provide a code-space
+* pointer for this test to start with and ultimately destroy executable code
+* causing random failures.
+*
+* @note
+* Used for spaces where the address range of the region is smaller than
+* the data width. If the memory range is greater than 2 ** width,
+* the patterns used in XIL_TESTMEM_WALKONES and XIL_TESTMEM_WALKZEROS will
+* repeat on a boundry of a power of two making it more difficult to detect
+* addressing errors. The XIL_TESTMEM_INCREMENT and XIL_TESTMEM_INVERSEADDR
+* tests suffer the same problem. Ideally, if large blocks of memory are to be
+* tested, break them up into smaller regions of memory to allow the test
+* patterns used not to repeat over the region tested.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a hbm  08/25/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TESTMEM_H	/* prevent circular inclusions */
+#define XIL_TESTMEM_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+/* xutil_memtest defines */
+
+#define XIL_TESTMEM_INIT_VALUE	1U
+
+/** @name Memory subtests
+ * @{
+ */
+/**
+ * See the detailed description of the subtests in the file description.
+ */
+#define XIL_TESTMEM_ALLMEMTESTS     0x00U
+#define XIL_TESTMEM_INCREMENT       0x01U
+#define XIL_TESTMEM_WALKONES        0x02U
+#define XIL_TESTMEM_WALKZEROS       0x03U
+#define XIL_TESTMEM_INVERSEADDR     0x04U
+#define XIL_TESTMEM_FIXEDPATTERN    0x05U
+#define XIL_TESTMEM_MAXTEST         XIL_TESTMEM_FIXEDPATTERN
+/* @} */
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+/* xutil_testmem prototypes */
+
+extern s32 Xil_TestMem32(u32 *Addr, u32 Words, u32 Pattern, u8 Subtest);
+extern s32 Xil_TestMem16(u16 *Addr, u32 Words, u16 Pattern, u8 Subtest);
+extern s32 Xil_TestMem8(u8 *Addr, u32 Words, u8 Pattern, u8 Subtest);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_test_utils".
+*/
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xil_types.h b/src/Xilinx/libsrc/standalone_v6_6/src/xil_types.h
new file mode 100644
index 0000000..8143aff
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xil_types.h
@@ -0,0 +1,209 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_types.h
+*
+* @addtogroup common_types Basic Data types for Xilinx® Software IP
+*
+* The xil_types.h file contains basic types for Xilinx software IP. These data types
+* are applicable for all processors supported by Xilinx.
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/14/09 First release
+* 3.03a sdm  05/30/11 Added Xuint64 typedef and XUINT64_MSW/XUINT64_LSW macros
+* 5.00 	pkp  05/29/14 Made changes for 64 bit architecture
+*	srt  07/14/14 Use standard definitions from stdint.h and stddef.h
+*		      Define LONG and ULONG datatypes and mask values
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TYPES_H	/* prevent circular inclusions */
+#define XIL_TYPES_H	/* by using protection macros */
+
+#include 
+#include 
+
+/************************** Constant Definitions *****************************/
+
+#ifndef TRUE
+#  define TRUE		1U
+#endif
+
+#ifndef FALSE
+#  define FALSE		0U
+#endif
+
+#ifndef NULL
+#define NULL		0U
+#endif
+
+#define XIL_COMPONENT_IS_READY     0x11111111U  /**< In device drivers, This macro will be
+                                                 assigend to "IsReady" member of driver
+												 instance to indicate that driver
+												 instance is initialized and ready to use. */
+#define XIL_COMPONENT_IS_STARTED   0x22222222U  /**< In device drivers, This macro will be assigend to
+                                                 "IsStarted" member of driver instance
+												 to indicate that driver instance is
+												 started and it can be enabled. */
+
+/* @name New types
+ * New simple types.
+ * @{
+ */
+#ifndef __KERNEL__
+#ifndef XBASIC_TYPES_H
+/*
+ * guarded against xbasic_types.h.
+ */
+typedef uint8_t u8;
+typedef uint16_t u16;
+typedef uint32_t u32;
+/** @}*/
+#define __XUINT64__
+typedef struct
+{
+	u32 Upper;
+	u32 Lower;
+} Xuint64;
+
+
+/*****************************************************************************/
+/**
+* @brief    Return the most significant half of the 64 bit data type.
+*
+* @param    x is the 64 bit word.
+*
+* @return   The upper 32 bits of the 64 bit word.
+*
+******************************************************************************/
+#define XUINT64_MSW(x) ((x).Upper)
+
+/*****************************************************************************/
+/**
+* @brief    Return the least significant half of the 64 bit data type.
+*
+* @param    x is the 64 bit word.
+*
+* @return   The lower 32 bits of the 64 bit word.
+*
+******************************************************************************/
+#define XUINT64_LSW(x) ((x).Lower)
+
+#endif /* XBASIC_TYPES_H */
+
+/*
+ * xbasic_types.h does not typedef s* or u64
+ */
+/** @{ */
+typedef char char8;
+typedef int8_t s8;
+typedef int16_t s16;
+typedef int32_t s32;
+typedef int64_t s64;
+typedef uint64_t u64;
+typedef int sint32;
+
+typedef intptr_t INTPTR;
+typedef uintptr_t UINTPTR;
+typedef ptrdiff_t PTRDIFF;
+/** @}*/
+#if !defined(LONG) || !defined(ULONG)
+typedef long LONG;
+typedef unsigned long ULONG;
+#endif
+
+#define ULONG64_HI_MASK	0xFFFFFFFF00000000U
+#define ULONG64_LO_MASK	~ULONG64_HI_MASK
+
+#else
+#include 
+#endif
+
+/** @{ */
+/**
+ * This data type defines an interrupt handler for a device.
+ * The argument points to the instance of the component
+ */
+typedef void (*XInterruptHandler) (void *InstancePtr);
+
+/**
+ * This data type defines an exception handler for a processor.
+ * The argument points to the instance of the component
+ */
+typedef void (*XExceptionHandler) (void *InstancePtr);
+
+/**
+ * @brief  Returns 32-63 bits of a number.
+ * @param  n : Number being accessed.
+ * @return Bits 32-63 of number.
+ *
+ * @note    A basic shift-right of a 64- or 32-bit quantity.
+ *          Use this to suppress the "right shift count >= width of type"
+ *          warning when that quantity is 32-bits.
+ */
+#define UPPER_32_BITS(n) ((u32)(((n) >> 16) >> 16))
+
+/**
+ * @brief  Returns 0-31 bits of a number
+ * @param  n : Number being accessed.
+ * @return Bits 0-31 of number
+ */
+#define LOWER_32_BITS(n) ((u32)(n))
+
+
+
+
+/************************** Constant Definitions *****************************/
+
+#ifndef TRUE
+#define TRUE		1U
+#endif
+
+#ifndef FALSE
+#define FALSE		0U
+#endif
+
+#ifndef NULL
+#define NULL		0U
+#endif
+
+#endif	/* end of protection macro */
+/**
+* @} End of "addtogroup common_types".
+*/
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xparameters_ps.h b/src/Xilinx/libsrc/standalone_v6_6/src/xparameters_ps.h
new file mode 100644
index 0000000..260c4d5
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xparameters_ps.h
@@ -0,0 +1,346 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xparameters_ps.h
+*
+* @addtogroup r5_peripheral_definitions Cortex R5 peripheral definitions
+*
+* The xparameters_ps.h file contains the canonical definitions and constant
+* declarations for peripherals within hardblock, attached to the ARM Cortex R5
+* core. These definitions can be used by drivers or applications to access the
+* peripherals.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00  pkp  	02/29/14 Initial version
+* 6.0   mus     08/18/16 Defined ARMR5 flag
+* 

+*
+******************************************************************************/
+
+#ifndef XPARAMETERS_PS_H_
+#define XPARAMETERS_PS_H_
+
+#ifndef ARMR5
+#define ARMR5 ARMR5
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock
+ */
+
+/* Canonical definitions for DDR MEMORY */
+#define XPAR_DDR_MEM_BASEADDR		0x00000000U
+#define XPAR_DDR_MEM_HIGHADDR		0x3FFFFFFFU
+
+/* Canonical definitions for Interrupts  */
+#define XPAR_XUARTPS_0_INTR		XPS_UART0_INT_ID
+#define XPAR_XUARTPS_1_INTR		XPS_UART1_INT_ID
+#define XPAR_XIICPS_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_XIICPS_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_XSPIPS_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_XSPIPS_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_XCANPS_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_XCANPS_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_XGPIOPS_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_XEMACPS_0_INTR		XPS_GEM0_INT_ID
+#define XPAR_XEMACPS_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_XEMACPS_1_INTR		XPS_GEM1_INT_ID
+#define XPAR_XEMACPS_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_XEMACPS_2_INTR		XPS_GEM2_INT_ID
+#define XPAR_XEMACPS_2_WAKE_INTR	XPS_GEM2_WAKE_INT_ID
+#define XPAR_XEMACPS_3_INTR		XPS_GEM3_INT_ID
+#define XPAR_XEMACPS_3_WAKE_INTR	XPS_GEM3_WAKE_INT_ID
+#define XPAR_XSDIOPS_0_INTR		XPS_SDIO0_INT_ID
+#define XPAR_XQSPIPS_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_XSDIOPS_1_INTR		XPS_SDIO1_INT_ID
+#define XPAR_XWDTPS_0_INTR		XPS_CSU_WDT_INT_ID
+#define XPAR_XWDTPS_1_INTR		XPS_LPD_SWDT_INT_ID
+#define XPAR_XWDTPS_2_INTR		XPS_FPD_SWDT_INT_ID
+#define XPAR_XDCFG_0_INTR		XPS_DVC_INT_ID
+#define XPAR_XTTCPS_0_INTR		XPS_TTC0_0_INT_ID
+#define XPAR_XTTCPS_1_INTR		XPS_TTC0_1_INT_ID
+#define XPAR_XTTCPS_2_INTR		XPS_TTC0_2_INT_ID
+#define XPAR_XTTCPS_3_INTR		XPS_TTC1_0_INT_ID
+#define XPAR_XTTCPS_4_INTR		XPS_TTC1_1_INT_ID
+#define XPAR_XTTCPS_5_INTR		XPS_TTC1_2_INT_ID
+#define XPAR_XTTCPS_6_INTR		XPS_TTC2_0_INT_ID
+#define XPAR_XTTCPS_7_INTR		XPS_TTC2_1_INT_ID
+#define XPAR_XTTCPS_8_INTR		XPS_TTC2_2_INT_ID
+#define XPAR_XTTCPS_9_INTR		XPS_TTC3_0_INT_ID
+#define XPAR_XTTCPS_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_XTTCPS_11_INTR		XPS_TTC3_2_INT_ID
+#define XPAR_XNANDPS8_0_INTR        	XPS_NAND_INT_ID
+#define XPAR_XADMAPS_0_INTR 		XPS_ADMA_CH0_INT_ID
+#define XPAR_XADMAPS_1_INTR 		XPS_ADMA_CH1_INT_ID
+#define XPAR_XADMAPS_2_INTR		XPS_ADMA_CH2_INT_ID
+#define XPAR_XADMAPS_3_INTR 		XPS_ADMA_CH3_INT_ID
+#define XPAR_XADMAPS_4_INTR		XPS_ADMA_CH4_INT_ID
+#define XPAR_XADMAPS_5_INTR 		XPS_ADMA_CH5_INT_ID
+#define XPAR_XADMAPS_6_INTR 		XPS_ADMA_CH6_INT_ID
+#define XPAR_XADMAPS_7_INTR 		XPS_ADMA_CH7_INT_ID
+#define XPAR_XCSUDMA_INTR 		XPS_CSU_DMA_INT_ID
+#define XPAR_PSU_ADMA_0_INTR 		XPS_ADMA_CH0_INT_ID
+#define XPAR_PSU_ADMA_1_INTR 		XPS_ADMA_CH1_INT_ID
+#define XPAR_PSU_ADMA_2_INTR		XPS_ADMA_CH2_INT_ID
+#define XPAR_PSU_ADMA_3_INTR 		XPS_ADMA_CH3_INT_ID
+#define XPAR_PSU_ADMA_4_INTR		XPS_ADMA_CH4_INT_ID
+#define XPAR_PSU_ADMA_5_INTR 		XPS_ADMA_CH5_INT_ID
+#define XPAR_PSU_ADMA_6_INTR 		XPS_ADMA_CH6_INT_ID
+#define XPAR_PSU_ADMA_7_INTR 		XPS_ADMA_CH7_INT_ID
+#define XPAR_PSU_CSUDMA_INTR 		XPS_CSU_DMA_INT_ID
+#define XPAR_XMPU_LPD_INTR 		XPS_XMPU_LPD_INT_ID
+#define XPAR_XZDMAPS_0_INTR		XPS_ZDMA_CH0_INT_ID
+#define XPAR_XZDMAPS_1_INTR		XPS_ZDMA_CH1_INT_ID
+#define XPAR_XZDMAPS_2_INTR 		XPS_ZDMA_CH2_INT_ID
+#define XPAR_XZDMAPS_3_INTR 		XPS_ZDMA_CH3_INT_ID
+#define XPAR_XZDMAPS_4_INTR		XPS_ZDMA_CH4_INT_ID
+#define XPAR_XZDMAPS_5_INTR 		XPS_ZDMA_CH5_INT_ID
+#define XPAR_XZDMAPS_6_INTR 		XPS_ZDMA_CH6_INT_ID
+#define XPAR_XZDMAPS_7_INTR 		XPS_ZDMA_CH7_INT_ID
+#define XPAR_PSU_GDMA_0_INTR		XPS_ZDMA_CH0_INT_ID
+#define XPAR_PSU_GDMA_1_INTR		XPS_ZDMA_CH1_INT_ID
+#define XPAR_PSU_GDMA_2_INTR 		XPS_ZDMA_CH2_INT_ID
+#define XPAR_PSU_GDMA_3_INTR 		XPS_ZDMA_CH3_INT_ID
+#define XPAR_PSU_GDMA_4_INTR		XPS_ZDMA_CH4_INT_ID
+#define XPAR_PSU_GDMA_5_INTR 		XPS_ZDMA_CH5_INT_ID
+#define XPAR_PSU_GDMA_6_INTR 		XPS_ZDMA_CH6_INT_ID
+#define XPAR_PSU_GDMA_7_INTR 		XPS_ZDMA_CH7_INT_ID
+#define XPAR_XMPU_FPD_INTR 		XPS_XMPU_FPD_INT_ID
+#define XPAR_XCCI_FPD_INTR 		XPS_FPD_CCI_INT_ID
+#define XPAR_XSMMU_FPD_INTR 		XPS_FPD_SMMU_INT_ID
+#define XPAR_XUSBPS_0_INTR		XPS_USB3_0_ENDPT_INT_ID
+#define XPAR_XUSBPS_1_INTR		XPS_USB3_1_ENDPT_INT_ID
+#define	XPAR_XRTCPSU_ALARM_INTR 	XPS_RTC_ALARM_INT_ID
+#define	XPAR_XRTCPSU_SECONDS_INTR	XPS_RTC_SEC_INT_ID
+#define XPAR_XAPMPS_0_INTR		XPS_APM0_INT_ID
+#define XPAR_XAPMPS_1_INTR		XPS_APM1_INT_ID
+#define XPAR_XAPMPS_2_INTR		XPS_APM2_INT_ID
+#define XPAR_XAPMPS_5_INTR		XPS_APM5_INT_ID
+#define XPAR_XSYSMONPSU_INTR		XPS_AMS_INT_ID
+
+/* Canonical definitions for SCU GIC */
+#define XPAR_SCUGIC_NUM_INSTANCES	1U
+#define XPAR_SCUGIC_SINGLE_DEVICE_ID	0U
+#define XPAR_SCUGIC_CPU_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00001000U)
+#define XPAR_SCUGIC_DIST_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00002000U)
+#define XPAR_SCUGIC_ACK_BEFORE		0U
+
+#define XPAR_CPU_CORTEXR5_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ
+
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock. These have been put for bacwards compatibilty
+ */
+
+#define XPS_SYS_CTRL_BASEADDR	0xFF180000U
+#define XPS_SCU_PERIPH_BASE		0xF9000000U
+
+
+/* Shared Peripheral Interrupts (SPI) */
+#define XPS_FPGA0_INT_ID		121U
+#define XPS_FPGA1_INT_ID		122U
+#define XPS_FPGA2_INT_ID		123U
+#define XPS_FPGA3_INT_ID		124U
+#define XPS_FPGA4_INT_ID		125U
+#define XPS_FPGA5_INT_ID		126U
+#define XPS_FPGA6_INT_ID		127U
+#define XPS_FPGA7_INT_ID		128U
+#define XPS_FPGA8_INT_ID		136U
+#define XPS_FPGA9_INT_ID		137U
+#define XPS_FPGA10_INT_ID		138U
+#define XPS_FPGA11_INT_ID		139U
+#define XPS_FPGA12_INT_ID		140U
+#define XPS_FPGA13_INT_ID		141U
+#define XPS_FPGA14_INT_ID		142U
+#define XPS_FPGA15_INT_ID		143U
+
+/* Updated Interrupt-IDs */
+#define XPS_OCMINTR_INT_ID		(10U + 32U)
+#define XPS_NAND_INT_ID        		(14U + 32U)
+#define XPS_QSPI_INT_ID			(15U + 32U)
+#define XPS_GPIO_INT_ID			(16U + 32U)
+#define XPS_I2C0_INT_ID			(17U + 32U)
+#define XPS_I2C1_INT_ID			(18U + 32U)
+#define XPS_SPI0_INT_ID			(19U + 32U)
+#define XPS_SPI1_INT_ID			(20U + 32U)
+#define XPS_UART0_INT_ID		(21U + 32U)
+#define XPS_UART1_INT_ID		(22U + 32U)
+#define XPS_CAN0_INT_ID			(23U + 32U)
+#define XPS_CAN1_INT_ID			(24U + 32U)
+#define	XPS_RTC_ALARM_INT_ID 	(26U + 32U)
+#define	XPS_RTC_SEC_INT_ID	 	(27U + 32U)
+#define XPS_LPD_SWDT_INT_ID		(52U + 32U)
+#define XPS_CSU_WDT_INT_ID	    (53U + 32U)
+#define XPS_FPD_SWDT_INT_ID		(113U + 32U)
+#define XPS_TTC0_0_INT_ID		(36U + 32U)
+#define XPS_TTC0_1_INT_ID		(37U + 32U)
+#define XPS_TTC0_2_INT_ID 		(38U + 32U)
+#define XPS_TTC1_0_INT_ID		(39U + 32U)
+#define XPS_TTC1_1_INT_ID		(40U + 32U)
+#define XPS_TTC1_2_INT_ID		(41U + 32U)
+#define XPS_TTC2_0_INT_ID		(42U + 32U)
+#define XPS_TTC2_1_INT_ID		(43U + 32U)
+#define XPS_TTC2_2_INT_ID		(44U + 32U)
+#define XPS_TTC3_0_INT_ID		(45U + 32U)
+#define XPS_TTC3_1_INT_ID		(46U + 32U)
+#define XPS_TTC3_2_INT_ID		(47U + 32U)
+#define XPS_SDIO0_INT_ID		(48U + 32U)
+#define XPS_SDIO1_INT_ID		(49U + 32U)
+#define XPS_AMS_INT_ID			(56U + 32U)
+#define XPS_GEM0_INT_ID			(57U + 32U)
+#define XPS_GEM0_WAKE_INT_ID		(58U + 32U)
+#define XPS_GEM1_INT_ID			(59U + 32U)
+#define XPS_GEM1_WAKE_INT_ID		(60U + 32U)
+#define XPS_GEM2_INT_ID			(61U + 32U)
+#define XPS_GEM2_WAKE_INT_ID		(62U + 32U)
+#define XPS_GEM3_INT_ID			(63U + 32U)
+#define XPS_GEM3_WAKE_INT_ID		(64U + 32U)
+#define XPS_USB3_0_ENDPT_INT_ID		(65U + 32U)
+#define XPS_USB3_1_ENDPT_INT_ID		(70U + 32U)
+#define XPS_ADMA_CH0_INT_ID		(77U + 32U)
+#define XPS_ADMA_CH1_INT_ID		(78U + 32U)
+#define XPS_ADMA_CH2_INT_ID		(79U + 32U)
+#define XPS_ADMA_CH3_INT_ID		(80U + 32U)
+#define XPS_ADMA_CH4_INT_ID		(81U + 32U)
+#define XPS_ADMA_CH5_INT_ID		(82U + 32U)
+#define XPS_ADMA_CH6_INT_ID		(83U + 32U)
+#define XPS_ADMA_CH7_INT_ID		(84U + 32U)
+#define XPS_CSU_DMA_INT_ID		(86U + 32U)
+#define XPS_XMPU_LPD_INT_ID		(88U + 32U)
+#define XPS_ZDMA_CH0_INT_ID		(124U + 32U)
+#define XPS_ZDMA_CH1_INT_ID		(125U + 32U)
+#define XPS_ZDMA_CH2_INT_ID		(126U + 32U)
+#define XPS_ZDMA_CH3_INT_ID		(127U + 32U)
+#define XPS_ZDMA_CH4_INT_ID		(128U + 32U)
+#define XPS_ZDMA_CH5_INT_ID		(129U + 32U)
+#define XPS_ZDMA_CH6_INT_ID		(130U + 32U)
+#define XPS_ZDMA_CH7_INT_ID		(131U + 32U)
+#define XPS_XMPU_FPD_INT_ID		(134U + 32U)
+#define XPS_FPD_CCI_INT_ID		(154U + 32U)
+#define XPS_FPD_SMMU_INT_ID		(155U + 32U)
+#define XPS_APM0_INT_ID		(123U + 32U)
+#define XPS_APM1_INT_ID		(25U + 32U)
+#define XPS_APM2_INT_ID		(25U + 32U)
+#define XPS_APM5_INT_ID		(123U + 32U)
+
+/* REDEFINES for TEST APP */
+#define XPAR_PSU_UART_0_INTR        XPS_UART0_INT_ID
+#define XPAR_PSU_UART_1_INTR        XPS_UART1_INT_ID
+#define XPAR_PSU_USB_0_INTR     XPS_USB0_INT_ID
+#define XPAR_PSU_USB_1_INTR     XPS_USB1_INT_ID
+#define XPAR_PSU_I2C_0_INTR     XPS_I2C0_INT_ID
+#define XPAR_PSU_I2C_1_INTR     XPS_I2C1_INT_ID
+#define XPAR_PSU_SPI_0_INTR     XPS_SPI0_INT_ID
+#define XPAR_PSU_SPI_1_INTR     XPS_SPI1_INT_ID
+#define XPAR_PSU_CAN_0_INTR     XPS_CAN0_INT_ID
+#define XPAR_PSU_CAN_1_INTR     XPS_CAN1_INT_ID
+#define XPAR_PSU_GPIO_0_INTR        XPS_GPIO_INT_ID
+#define XPAR_PSU_ETHERNET_0_INTR    XPS_GEM0_INT_ID
+#define XPAR_PSU_ETHERNET_0_WAKE_INTR   XPS_GEM0_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_1_INTR    XPS_GEM1_INT_ID
+#define XPAR_PSU_ETHERNET_1_WAKE_INTR   XPS_GEM1_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_2_INTR    XPS_GEM2_INT_ID
+#define XPAR_PSU_ETHERNET_2_WAKE_INTR   XPS_GEM2_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_3_INTR    XPS_GEM3_INT_ID
+#define XPAR_PSU_ETHERNET_3_WAKE_INTR   XPS_GEM3_WAKE_INT_ID
+#define XPAR_PSU_QSPI_0_INTR        XPS_QSPI_INT_ID
+#define XPAR_PSU_WDT_0_INTR    		XPS_LPD_SWDT_INT_ID
+#define XPAR_PSU_WDT_1_INTR     	XPS_FPD_SWDT_INT_ID
+#define XPAR_PSU_XADC_0_INTR        XPS_SYSMON_INT_ID
+#define XPAR_PSU_TTC_0_INTR         XPS_TTC0_0_INT_ID
+#define XPAR_PSU_TTC_1_INTR         XPS_TTC0_1_INT_ID
+#define XPAR_PSU_TTC_2_INTR         XPS_TTC0_2_INT_ID
+#define XPAR_PSU_TTC_3_INTR         XPS_TTC1_0_INT_ID
+#define XPAR_PSU_TTC_4_INTR         XPS_TTC1_1_INT_ID
+#define XPAR_PSU_TTC_5_INTR         XPS_TTC1_2_INT_ID
+#define XPAR_PSU_TTC_6_INTR			XPS_TTC2_0_INT_ID
+#define XPAR_PSU_TTC_7_INTR			XPS_TTC2_1_INT_ID
+#define XPAR_PSU_TTC_8_INTR			XPS_TTC2_2_INT_ID
+#define XPAR_PSU_TTC_9_INTR			XPS_TTC3_0_INT_ID
+#define XPAR_PSU_TTC_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_PSU_TTC_11_INTR		XPS_TTC3_2_INT_ID
+#define XPAR_PSU_AMS_INTR			XPS_AMS_INT_ID
+
+#define XPAR_XADCPS_NUM_INSTANCES 1U
+#define XPAR_XADCPS_0_DEVICE_ID   0U
+#define XPAR_XADCPS_0_BASEADDR	  (0xF8007000U)
+#define XPAR_XADCPS_INT_ID		XPS_SYSMON_INT_ID
+
+/* For backwards compatibilty */
+#define XPAR_XUARTPS_0_CLOCK_HZ		XPAR_XUARTPS_0_UART_CLK_FREQ_HZ
+#define XPAR_XUARTPS_1_CLOCK_HZ		XPAR_XUARTPS_1_UART_CLK_FREQ_HZ
+#define XPAR_XTTCPS_0_CLOCK_HZ		XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_1_CLOCK_HZ		XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_2_CLOCK_HZ		XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_3_CLOCK_HZ		XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_4_CLOCK_HZ		XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_5_CLOCK_HZ		XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ
+#define XPAR_XIICPS_0_CLOCK_HZ		XPAR_XIICPS_0_I2C_CLK_FREQ_HZ
+#define XPAR_XIICPS_1_CLOCK_HZ		XPAR_XIICPS_1_I2C_CLK_FREQ_HZ
+
+#define XPAR_XQSPIPS_0_CLOCK_HZ		XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ
+
+#ifdef XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXR5_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ
+#endif
+
+#ifdef XPAR_CPU_CORTEXR5_1_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXR5_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXR5_1_CPU_CLK_FREQ_HZ
+#endif
+
+#define XPAR_SCUWDT_DEVICE_ID		0U
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
+/**
+* @} End of "addtogroup r5_peripheral_definitions".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xplatform_info.c b/src/Xilinx/libsrc/standalone_v6_6/src/xplatform_info.c
new file mode 100644
index 0000000..2c08e5f
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xplatform_info.c
@@ -0,0 +1,161 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xplatform_info.c
+*
+* This file contains information about hardware for which the code is built
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 5.00  pkp  12/15/14 Initial release
+* 5.04  pkp  01/12/16 Added platform information support for Cortex-A53 32bit
+*					  mode
+* 6.00  mus  17/08/16 Removed unused variable from XGetPlatform_Info
+* 6.4   ms   05/23/17 Added PSU_PMU macro to support XGetPSVersion_Info
+*                     function for PMUFW.
+*       ms   06/13/17 Added PSU_PMU macro to provide support of
+*                     XGetPlatform_Info function for PMUFW.
+*       mus  08/17/17 Add EL1 NS mode support for
+*                     XGet_Zynq_UltraMp_Platform_info and XGetPSVersion_Info
+*                     APIs.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_io.h"
+#include "xplatform_info.h"
+#if defined (__aarch64__)
+#include "bspconfig.h"
+#include "xil_smc.h"
+#endif
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+*
+* @brief    This API is used to provide information about platform
+*
+* @param    None.
+*
+* @return   The information about platform defined in xplatform_info.h
+*
+******************************************************************************/
+u32 XGetPlatform_Info()
+{
+
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32) || (PSU_PMU)
+	return XPLAT_ZYNQ_ULTRA_MP;
+#elif (__microblaze__)
+	return XPLAT_MICROBLAZE;
+#else
+	return XPLAT_ZYNQ;
+#endif
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    This API is used to provide information about zynq ultrascale MP platform
+*
+* @param    None.
+*
+* @return   The information about zynq ultrascale MP platform defined in
+*			xplatform_info.h
+*
+******************************************************************************/
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32)
+u32 XGet_Zynq_UltraMp_Platform_info()
+{
+#if EL1_NONSECURE
+	XSmc_OutVar reg;
+    /*
+	 * This SMC call will return,
+     *  idcode - upper 32 bits of reg.Arg0
+     *  version - lower 32 bits of reg.Arg1
+	 */
+	reg = Xil_Smc(GET_CHIPID_SMC_FID,0,0, 0, 0, 0, 0, 0);
+	return (u32)((reg.Arg1 >> XPLAT_INFO_SHIFT) & XPLAT_INFO_MASK);
+#else
+	u32 reg;
+	reg = ((Xil_In32(XPAR_CSU_BASEADDR + XPAR_CSU_VER_OFFSET) >> 12U )& XPLAT_INFO_MASK);
+	return reg;
+#endif
+}
+#endif
+
+/*****************************************************************************/
+/**
+*
+* @brief    This API is used to provide information about PS Silicon version
+*
+* @param    None.
+*
+* @return   The information about PS Silicon version.
+*
+******************************************************************************/
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32) || (PSU_PMU)
+u32 XGetPSVersion_Info()
+{
+#if EL1_NONSECURE
+        /*
+         * This SMC call will return,
+         *  idcode - upper 32 bits of reg.Arg0
+         *  version - lower 32 bits of reg.Arg1
+         */
+        XSmc_OutVar reg;
+        reg = Xil_Smc(GET_CHIPID_SMC_FID,0,0, 0, 0, 0, 0, 0);
+        return (u32)(reg.Arg1 &  XPS_VERSION_INFO_MASK);
+#else
+	u32 reg;
+	reg = (Xil_In32(XPAR_CSU_BASEADDR + XPAR_CSU_VER_OFFSET)
+			& XPS_VERSION_INFO_MASK);
+	return reg;
+#endif
+}
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xplatform_info.h b/src/Xilinx/libsrc/standalone_v6_6/src/xplatform_info.h
new file mode 100644
index 0000000..0582222
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xplatform_info.h
@@ -0,0 +1,109 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xplatform_info.h
+*
+* @addtogroup common_platform_info APIs to Get Platform Information
+*
+* The xplatform_info.h file contains definitions for various available Xilinx®
+* platforms. Also, it contains prototype of APIs, which can be used to get the
+* platform information.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date    Changes
+* ----- ---- --------- -------------------------------------------------------
+* 6.4    ms   05/23/17 Added PSU_PMU macro to support XGetPSVersion_Info
+*                      function for PMUFW.
+* 

+*
+******************************************************************************/
+
+#ifndef XPLATFORM_INFO_H		/* prevent circular inclusions */
+#define XPLATFORM_INFO_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+#define XPAR_CSU_BASEADDR 0xFFCA0000U
+#define	XPAR_CSU_VER_OFFSET 0x00000044U
+
+#define XPLAT_ZYNQ_ULTRA_MP_SILICON 0x0
+#define XPLAT_ZYNQ_ULTRA_MP 0x1
+#define XPLAT_ZYNQ_ULTRA_MPVEL 0x2
+#define XPLAT_ZYNQ_ULTRA_MPQEMU 0x3
+#define XPLAT_ZYNQ 0x4
+#define XPLAT_MICROBLAZE 0x5
+
+#define XPS_VERSION_1 0x0
+#define XPS_VERSION_2 0x1
+
+#define XPLAT_INFO_MASK (0xF)
+#define XPLAT_INFO_SHIFT (0xC)
+#define XPS_VERSION_INFO_MASK (0xF)
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+u32 XGetPlatform_Info();
+
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32) || (PSU_PMU)
+u32 XGetPSVersion_Info();
+#endif
+
+#if defined (ARMR5) || (__aarch64__) || (ARMA53_32)
+u32 XGet_Zynq_UltraMp_Platform_info();
+#endif
+/************************** Function Prototypes ******************************/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_platform_info".
+*/
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xpm_counter.c b/src/Xilinx/libsrc/standalone_v6_6/src/xpm_counter.c
new file mode 100644
index 0000000..e5b231e
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xpm_counter.c
@@ -0,0 +1,289 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpm_counter.c
+*
+* This file contains APIs for configuring and controlling the Cortex-R5
+* Performance Monitor Events. For more information about the event counters,
+* see xpm_counter.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 6.2   mus  01/27/17 Updated to support IAR compiler
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xpm_counter.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+typedef const u32 PmcrEventCfg32[XPM_CTRCOUNT];
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions *****************************/
+
+
+
+/************************** Function Prototypes ******************************/
+
+void Xpm_DisableEventCounters(void);
+void Xpm_EnableEventCounters (void);
+void Xpm_ResetEventCounters (void);
+
+/******************************************************************************/
+
+/****************************************************************************/
+/**
+*
+* @brief    This function disables the Cortex R5 event counters.
+*
+* @param	None.
+*
+* @return	None.
+*
+*****************************************************************************/
+void Xpm_DisableEventCounters(void)
+{
+	/* Disable the event counters */
+	mtcp(XREG_CP15_COUNT_ENABLE_CLR, 0x3f);
+}
+
+/****************************************************************************/
+/**
+*
+* @brief    This function enables the Cortex R5 event counters.
+*
+* @param	None.
+*
+* @return	None.
+*
+*****************************************************************************/
+void Xpm_EnableEventCounters(void)
+{
+	/* Enable the event counters */
+	mtcp(XREG_CP15_COUNT_ENABLE_SET, 0x3f);
+}
+
+/****************************************************************************/
+/**
+*
+* @brief    This function resets the Cortex R5 event counters.
+*
+* @param	None.
+*
+* @return	None.
+*
+*****************************************************************************/
+void Xpm_ResetEventCounters(void)
+{
+	u32 Reg;
+
+#ifdef __GNUC__
+	Reg = mfcp(XREG_CP15_PERF_MONITOR_CTRL);
+#elif defined (__ICCARM__)
+    mfcp(XREG_CP15_PERF_MONITOR_CTRL, Reg);
+#else
+	{ register u32 C15Reg __asm(XREG_CP15_PERF_MONITOR_CTRL);
+	  Reg = C15Reg; }
+#endif
+	Reg |= (1U << 2U); /* reset event counters */
+	mtcp(XREG_CP15_PERF_MONITOR_CTRL, Reg);
+}
+
+/****************************************************************************/
+/**
+*
+* @brief    This function configures the Cortex R5 event counters controller,
+*           with the event codes, in a configuration selected by the user and
+*           enables the counters.
+*
+* @param	PmcrCfg: Configuration value based on which the event counters
+*		    are configured.XPM_CNTRCFG* values defined in xpm_counter.h can
+*		    be utilized for setting configuration
+*
+* @return	None.
+*
+*****************************************************************************/
+void Xpm_SetEvents(s32 PmcrCfg)
+{
+	u32 Counter;
+	static PmcrEventCfg32 PmcrEvents[] = {
+		{
+			XPM_EVENT_SOFTINCR,
+			XPM_EVENT_INSRFETCH_CACHEREFILL,
+			XPM_EVENT_INSTRFECT_TLBREFILL,
+			XPM_EVENT_DATA_CACHEREFILL,
+			XPM_EVENT_DATA_CACHEACCESS,
+			XPM_EVENT_DATA_TLBREFILL
+		},
+		{
+			XPM_EVENT_DATA_READS,
+			XPM_EVENT_DATA_WRITE,
+			XPM_EVENT_EXCEPTION,
+			XPM_EVENT_EXCEPRETURN,
+			XPM_EVENT_CHANGECONTEXT,
+			XPM_EVENT_SW_CHANGEPC
+		},
+		{
+			XPM_EVENT_IMMEDBRANCH,
+			XPM_EVENT_UNALIGNEDACCESS,
+			XPM_EVENT_BRANCHMISS,
+			XPM_EVENT_CLOCKCYCLES,
+			XPM_EVENT_BRANCHPREDICT,
+			XPM_EVENT_JAVABYTECODE
+		},
+		{
+			XPM_EVENT_SWJAVABYTECODE,
+			XPM_EVENT_JAVABACKBRANCH,
+			XPM_EVENT_COHERLINEMISS,
+			XPM_EVENT_COHERLINEHIT,
+			XPM_EVENT_INSTRSTALL,
+			XPM_EVENT_DATASTALL
+		},
+		{
+			XPM_EVENT_MAINTLBSTALL,
+			XPM_EVENT_STREXPASS,
+			XPM_EVENT_STREXFAIL,
+			XPM_EVENT_DATAEVICT,
+			XPM_EVENT_NODISPATCH,
+			XPM_EVENT_ISSUEEMPTY
+		},
+		{
+			XPM_EVENT_INSTRRENAME,
+			XPM_EVENT_PREDICTFUNCRET,
+			XPM_EVENT_MAINEXEC,
+			XPM_EVENT_SECEXEC,
+			XPM_EVENT_LDRSTR,
+			XPM_EVENT_FLOATRENAME
+		},
+		{
+			XPM_EVENT_NEONRENAME,
+			XPM_EVENT_PLDSTALL,
+			XPM_EVENT_WRITESTALL,
+			XPM_EVENT_INSTRTLBSTALL,
+			XPM_EVENT_DATATLBSTALL,
+			XPM_EVENT_INSTR_uTLBSTALL
+		},
+		{
+			XPM_EVENT_DATA_uTLBSTALL,
+			XPM_EVENT_DMB_STALL,
+			XPM_EVENT_INT_CLKEN,
+			XPM_EVENT_DE_CLKEN,
+			XPM_EVENT_INSTRISB,
+			XPM_EVENT_INSTRDSB
+		},
+		{
+			XPM_EVENT_INSTRDMB,
+			XPM_EVENT_EXTINT,
+			XPM_EVENT_PLE_LRC,
+			XPM_EVENT_PLE_LRS,
+			XPM_EVENT_PLE_FLUSH,
+			XPM_EVENT_PLE_CMPL
+		},
+		{
+			XPM_EVENT_PLE_OVFL,
+			XPM_EVENT_PLE_PROG,
+			XPM_EVENT_PLE_LRC,
+			XPM_EVENT_PLE_LRS,
+			XPM_EVENT_PLE_FLUSH,
+			XPM_EVENT_PLE_CMPL
+		},
+		{
+			XPM_EVENT_DATASTALL,
+			XPM_EVENT_INSRFETCH_CACHEREFILL,
+			XPM_EVENT_INSTRFECT_TLBREFILL,
+			XPM_EVENT_DATA_CACHEREFILL,
+			XPM_EVENT_DATA_CACHEACCESS,
+			XPM_EVENT_DATA_TLBREFILL
+		},
+	};
+	const u32 *ptr = PmcrEvents[PmcrCfg];
+
+	Xpm_DisableEventCounters();
+
+	for(Counter = 0U; Counter < XPM_CTRCOUNT; Counter++) {
+
+		/* Selecet event counter */
+		mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
+
+		/* Set the event */
+		mtcp(XREG_CP15_EVENT_TYPE_SEL, ptr[Counter]);
+	}
+
+	Xpm_ResetEventCounters();
+	Xpm_EnableEventCounters();
+}
+
+/****************************************************************************/
+/**
+*
+* @brief    This function disables the event counters and returns the counter
+*           values.
+*
+* @param	PmCtrValue: Pointer to an array of type u32 PmCtrValue[6].
+*		    It is an output parameter which is used to return the PM
+*		    counter values.
+*
+* @return	None.
+*
+*****************************************************************************/
+void Xpm_GetEventCounters(u32 *PmCtrValue)
+{
+	u32 Counter;
+
+	Xpm_DisableEventCounters();
+
+	for(Counter = 0U; Counter < XPM_CTRCOUNT; Counter++) {
+
+		mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
+#ifdef __GNUC__
+		PmCtrValue[Counter] = mfcp(XREG_CP15_PERF_MONITOR_COUNT);
+#elif defined (__ICCARM__)
+        mfcp(XREG_CP15_PERF_MONITOR_COUNT, PmCtrValue[Counter]);
+#else
+		{ register u32 Cp15Reg __asm(XREG_CP15_PERF_MONITOR_COUNT);
+		  PmCtrValue[Counter] = Cp15Reg; }
+#endif
+	}
+}
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xpm_counter.h b/src/Xilinx/libsrc/standalone_v6_6/src/xpm_counter.h
new file mode 100644
index 0000000..b24f4ae
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xpm_counter.h
@@ -0,0 +1,573 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpm_counter.h
+*
+* @addtogroup r5_event_counter_apis Cortex R5 Event Counters Functions
+*
+* Cortex R5 event counter functions can be utilized to configure and control
+* the Cortex-R5 performance monitor events.
+* Cortex-R5 Performance Monitor has 6 event counters which can be used to
+* count a variety of events described in Coretx-R5 TRM. The xpm_counter.h file
+* defines configurations XPM_CNTRCFGx which can be used to program the event
+* counters to count a set of events.
+*
+* @note
+* It doesn't handle the Cortex-R5 cycle counter, as the cycle counter is
+* being used for time keeping.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 

+*
+******************************************************************************/
+
+#ifndef XPMCOUNTER_H /* prevent circular inclusions */
+#define XPMCOUNTER_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include 
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/* Number of performance counters */
+#define XPM_CTRCOUNT 6U
+
+/* The following constants define the Cortex-R5 Performance Monitor Events */
+
+/*
+ * Software increment. The register is incremented only on writes to the
+ * Software Increment Register
+ */
+#define XPM_EVENT_SOFTINCR 0x00U
+
+/*
+ * Instruction fetch that causes a refill at (at least) the lowest level(s) of
+ * instruction or unified cache. Includes the speculative linefills in the
+ * count
+ */
+#define XPM_EVENT_INSRFETCH_CACHEREFILL 0x01U
+
+/*
+ * Instruction fetch that causes a TLB refill at (at least) the lowest level of
+ * TLB. Includes the speculative requests in the count
+ */
+#define XPM_EVENT_INSTRFECT_TLBREFILL 0x02U
+
+/*
+ * Data read or write operation that causes a refill at (at least) the lowest
+ * level(s)of data or unified cache. Counts the number of allocations performed
+ * in the Data Cache due to a read or a write
+ */
+#define XPM_EVENT_DATA_CACHEREFILL 0x03U
+
+/*
+ * Data read or write operation that causes a cache access at (at least) the
+ * lowest level(s) of data or unified cache. This includes speculative reads
+ */
+#define XPM_EVENT_DATA_CACHEACCESS 0x04U
+
+/*
+ * Data read or write operation that causes a TLB refill at (at least) the
+ * lowest level of TLB. This does not include micro TLB misses due to PLD, PLI,
+ * CP15 Cache operation by MVA and CP15 VA to PA operations
+ */
+#define XPM_EVENT_DATA_TLBREFILL 0x05U
+
+/*
+ * Data read architecturally executed. Counts the number of data read
+ * instructions accepted by the Load Store Unit. This includes counting the
+ * speculative and aborted LDR/LDM, as well as the reads due to the SWP
+ * instructions
+ */
+#define XPM_EVENT_DATA_READS 0x06U
+
+/*
+ * Data write architecturally executed. Counts the number of data write
+ * instructions accepted by the Load Store Unit. This includes counting the
+ * speculative and aborted STR/STM, as well as the writes due to the SWP
+ * instructions
+ */
+#define XPM_EVENT_DATA_WRITE 0x07U
+
+/* Exception taken. Counts the number of exceptions architecturally taken.*/
+#define XPM_EVENT_EXCEPTION 0x09U
+
+/* Exception return architecturally executed.*/
+#define XPM_EVENT_EXCEPRETURN 0x0AU
+
+/*
+ * Change to ContextID retired. Counts the number of instructions
+ * architecturally executed writing into the ContextID Register
+ */
+#define XPM_EVENT_CHANGECONTEXT 0x0BU
+
+/*
+ * Software change of PC, except by an exception, architecturally executed.
+ * Count the number of PC changes architecturally executed, excluding the PC
+ * changes due to taken exceptions
+ */
+#define XPM_EVENT_SW_CHANGEPC 0x0CU
+
+/*
+ * Immediate branch architecturally executed (taken or not taken). This includes
+ * the branches which are flushed due to a previous load/store which aborts
+ * late
+ */
+#define XPM_EVENT_IMMEDBRANCH 0x0DU
+
+/*
+ * Unaligned access architecturally executed. Counts the number of aborted
+ * unaligned accessed architecturally executed, and the number of not-aborted
+ * unaligned accesses, including the speculative ones
+ */
+#define XPM_EVENT_UNALIGNEDACCESS 0x0FU
+
+/*
+ * Branch mispredicted/not predicted. Counts the number of mispredicted or
+ * not-predicted branches executed. This includes the branches which are flushed
+ * due to a previous load/store which aborts late
+ */
+#define XPM_EVENT_BRANCHMISS 0x10U
+
+/*
+ * Counts clock cycles when the Cortex-R5 processor is not in WFE/WFI. This
+ * event is not exported on the PMUEVENT bus
+ */
+#define XPM_EVENT_CLOCKCYCLES 0x11U
+
+/*
+ * Branches or other change in program flow that could have been predicted by
+ * the branch prediction resources of the processor. This includes the branches
+ * which are flushed due to a previous load/store which aborts late
+ */
+#define XPM_EVENT_BRANCHPREDICT 0x12U
+
+/*
+ * Java bytecode execute. Counts the number of Java bytecodes being decoded,
+ * including speculative ones
+ */
+#define XPM_EVENT_JAVABYTECODE 0x40U
+
+/*
+ * Software Java bytecode executed. Counts the number of software java bytecodes
+ * being decoded, including speculative ones
+ */
+#define XPM_EVENT_SWJAVABYTECODE 0x41U
+
+/*
+ * Jazelle backward branches executed. Counts the number of Jazelle taken
+ * branches being executed. This includes the branches which are flushed due
+ * to a previous load/store which aborts late
+ */
+#define XPM_EVENT_JAVABACKBRANCH 0x42U
+
+/*
+ * Coherent linefill miss Counts the number of coherent linefill requests
+ * performed by the Cortex-R5 processor which also miss in all the other
+ * Cortex-R5 processors, meaning that the request is sent to the external
+ * memory
+ */
+#define XPM_EVENT_COHERLINEMISS 0x50U
+
+/*
+ * Coherent linefill hit. Counts the number of coherent linefill requests
+ * performed by the Cortex-R5 processor which hit in another Cortex-R5
+ * processor, meaning that the linefill data is fetched directly from the
+ * relevant Cortex-R5 cache
+ */
+#define XPM_EVENT_COHERLINEHIT 0x51U
+
+/*
+ * Instruction cache dependent stall cycles. Counts the number of cycles where
+ * the processor is ready to accept new instructions, but does not receive any
+ * due to the instruction side not being able to provide any and the
+ * instruction cache is currently performing at least one linefill
+ */
+#define XPM_EVENT_INSTRSTALL 0x60U
+
+/*
+ * Data cache dependent stall cycles. Counts the number of cycles where the core
+ * has some instructions that it cannot issue to any pipeline, and the Load
+ * Store unit has at least one pending linefill request, and no pending
+ */
+#define XPM_EVENT_DATASTALL 0x61U
+
+/*
+ * Main TLB miss stall cycles. Counts the number of cycles where the processor
+ * is stalled waiting for the completion of translation table walks from the
+ * main TLB. The processor stalls can be due to the instruction side not being
+ * able to provide the instructions, or to the data side not being able to
+ * provide the necessary data, due to them waiting for the main TLB translation
+ * table walk to complete
+ */
+#define XPM_EVENT_MAINTLBSTALL 0x62U
+
+/*
+ * Counts the number of STREX instructions architecturally executed and
+ * passed
+ */
+#define XPM_EVENT_STREXPASS 0x63U
+
+/*
+ * Counts the number of STREX instructions architecturally executed and
+ * failed
+ */
+#define XPM_EVENT_STREXFAIL 0x64U
+
+/*
+ * Data eviction. Counts the number of eviction requests due to a linefill in
+ * the data cache
+ */
+#define XPM_EVENT_DATAEVICT 0x65U
+
+/*
+ * Counts the number of cycles where the issue stage does not dispatch any
+ * instruction because it is empty or cannot dispatch any instructions
+ */
+#define XPM_EVENT_NODISPATCH 0x66U
+
+/*
+ * Counts the number of cycles where the issue stage is empty
+ */
+#define XPM_EVENT_ISSUEEMPTY 0x67U
+
+/*
+ * Counts the number of instructions going through the Register Renaming stage.
+ * This number is an approximate number of the total number of instructions
+ * speculatively executed, and even more approximate of the total number of
+ * instructions architecturally executed. The approximation depends mainly on
+ * the branch misprediction rate.
+ * The renaming stage can handle two instructions in the same cycle so the event
+ * is two bits long:
+ *    - b00 no instructions renamed
+ *    - b01 one instruction renamed
+ *    - b10 two instructions renamed
+ */
+#define XPM_EVENT_INSTRRENAME 0x68U
+
+/*
+ * Counts the number of procedure returns whose condition codes do not fail,
+ * excluding all returns from exception. This count includes procedure returns
+ * which are flushed due to a previous load/store which aborts late.
+ * Only the following instructions are reported:
+ * - BX R14
+ * - MOV PC LR
+ * - POP {..,pc}
+ * - LDR pc,[sp],#offset
+ * The following instructions are not reported:
+ * - LDMIA R9!,{..,PC} (ThumbEE state only)
+ * - LDR PC,[R9],#offset (ThumbEE state only)
+ * - BX R0 (Rm != R14)
+ * - MOV PC,R0 (Rm != R14)
+ * - LDM SP,{...,PC} (writeback not specified)
+ * - LDR PC,[SP,#offset] (wrong addressing mode)
+ */
+#define XPM_EVENT_PREDICTFUNCRET 0x6EU
+
+/*
+ * Counts the number of instructions being executed in the main execution
+ * pipeline of the processor, the multiply pipeline and arithmetic logic unit
+ * pipeline. The counted instructions are still speculative
+ */
+#define XPM_EVENT_MAINEXEC 0x70U
+
+/*
+ * Counts the number of instructions being executed in the processor second
+ * execution pipeline (ALU). The counted instructions are still speculative
+ */
+#define XPM_EVENT_SECEXEC 0x71U
+
+/*
+ * Counts the number of instructions being executed in the Load/Store unit. The
+ * counted instructions are still speculative
+ */
+#define XPM_EVENT_LDRSTR 0x72U
+
+/*
+ * Counts the number of Floating-point instructions going through the Register
+ * Rename stage. Instructions are still speculative in this stage.
+ *Two floating-point instructions can be renamed in the same cycle so the event
+ * is two bitslong:
+ *0b00 no floating-point instruction renamed
+ *0b01 one floating-point instruction renamed
+ *0b10 two floating-point instructions renamed
+ */
+#define XPM_EVENT_FLOATRENAME 0x73U
+
+/*
+ * Counts the number of Neon instructions going through the Register Rename
+ * stage.Instructions are still speculative in this stage.
+ * Two NEON instructions can be renamed in the same cycle so the event is two
+ * bits long:
+ *0b00 no NEON instruction renamed
+ *0b01 one NEON instruction renamed
+ *0b10 two NEON instructions renamed
+ */
+#define XPM_EVENT_NEONRENAME 0x74U
+
+/*
+ * Counts the number of cycles where the processor is stalled because PLD slots
+ * are all full
+ */
+#define XPM_EVENT_PLDSTALL 0x80U
+
+/*
+ * Counts the number of cycles when the processor is stalled and the data side
+ * is stalled too because it is full and executing writes to the external
+ * memory
+ */
+#define XPM_EVENT_WRITESTALL 0x81U
+
+/*
+ * Counts the number of stall cycles due to main TLB misses on requests issued
+ * by the instruction side
+ */
+#define XPM_EVENT_INSTRTLBSTALL 0x82U
+
+/*
+ * Counts the number of stall cycles due to main TLB misses on requests issued
+ * by the data side
+ */
+#define XPM_EVENT_DATATLBSTALL 0x83U
+
+/*
+ * Counts the number of stall cycles due to micro TLB misses on the instruction
+ * side. This event does not include main TLB miss stall cycles that are already
+ * counted in the corresponding main TLB event
+ */
+#define XPM_EVENT_INSTR_uTLBSTALL 0x84U
+
+/*
+ * Counts the number of stall cycles due to micro TLB misses on the data side.
+ * This event does not include main TLB miss stall cycles that are already
+ * counted in the corresponding main TLB event
+ */
+#define XPM_EVENT_DATA_uTLBSTALL 0x85U
+
+/*
+ * Counts the number of stall cycles because of the execution of a DMB memory
+ * barrier. This includes all DMB instructions being executed, even
+ * speculatively
+ */
+#define XPM_EVENT_DMB_STALL 0x86U
+
+/*
+ * Counts the number of cycles during which the integer core clock is enabled
+ */
+#define XPM_EVENT_INT_CLKEN 0x8AU
+
+/*
+ * Counts the number of cycles during which the Data Engine clock is enabled
+ */
+#define XPM_EVENT_DE_CLKEN 0x8BU
+
+/*
+ * Counts the number of ISB instructions architecturally executed
+ */
+#define XPM_EVENT_INSTRISB 0x90U
+
+/*
+ * Counts the number of DSB instructions architecturally executed
+ */
+#define XPM_EVENT_INSTRDSB 0x91U
+
+/*
+ * Counts the number of DMB instructions speculatively executed
+ */
+#define XPM_EVENT_INSTRDMB 0x92U
+
+/*
+ * Counts the number of external interrupts executed by the processor
+ */
+#define XPM_EVENT_EXTINT 0x93U
+
+/*
+ * PLE cache line request completed
+ */
+#define XPM_EVENT_PLE_LRC 0xA0U
+
+/*
+ * PLE cache line request skipped
+ */
+#define XPM_EVENT_PLE_LRS 0xA1U
+
+/*
+ * PLE FIFO flush
+ */
+#define XPM_EVENT_PLE_FLUSH 0xA2U
+
+/*
+ * PLE request complete
+ */
+#define XPM_EVENT_PLE_CMPL 0xA3U
+
+/*
+ * PLE FIFO overflow
+ */
+#define XPM_EVENT_PLE_OVFL 0xA4U
+
+/*
+ * PLE request programmed
+ */
+#define XPM_EVENT_PLE_PROG 0xA5U
+
+/*
+ * The following constants define the configurations for Cortex-R5 Performance
+ * Monitor Events. Each configuration configures the event counters for a set
+ * of events.
+ * -----------------------------------------------
+ * Config		PmCtr0... PmCtr5
+ * -----------------------------------------------
+ * XPM_CNTRCFG1		{ XPM_EVENT_SOFTINCR,
+ *			  XPM_EVENT_INSRFETCH_CACHEREFILL,
+ *			  XPM_EVENT_INSTRFECT_TLBREFILL,
+ *			  XPM_EVENT_DATA_CACHEREFILL,
+ *			  XPM_EVENT_DATA_CACHEACCESS,
+ *			  XPM_EVENT_DATA_TLBREFILL }
+ *
+ * XPM_CNTRCFG2		{ XPM_EVENT_DATA_READS,
+ *			  XPM_EVENT_DATA_WRITE,
+ *			  XPM_EVENT_EXCEPTION,
+ *			  XPM_EVENT_EXCEPRETURN,
+ *			  XPM_EVENT_CHANGECONTEXT,
+ *			  XPM_EVENT_SW_CHANGEPC }
+ *
+ * XPM_CNTRCFG3		{ XPM_EVENT_IMMEDBRANCH,
+ *			  XPM_EVENT_UNALIGNEDACCESS,
+ *			  XPM_EVENT_BRANCHMISS,
+ *			  XPM_EVENT_CLOCKCYCLES,
+ *			  XPM_EVENT_BRANCHPREDICT,
+ *			  XPM_EVENT_JAVABYTECODE }
+ *
+ * XPM_CNTRCFG4		{ XPM_EVENT_SWJAVABYTECODE,
+ *			  XPM_EVENT_JAVABACKBRANCH,
+ *			  XPM_EVENT_COHERLINEMISS,
+ *			  XPM_EVENT_COHERLINEHIT,
+ *			  XPM_EVENT_INSTRSTALL,
+ *			  XPM_EVENT_DATASTALL }
+ *
+ * XPM_CNTRCFG5		{ XPM_EVENT_MAINTLBSTALL,
+ *			  XPM_EVENT_STREXPASS,
+ *			  XPM_EVENT_STREXFAIL,
+ *			  XPM_EVENT_DATAEVICT,
+ *			  XPM_EVENT_NODISPATCH,
+ *			  XPM_EVENT_ISSUEEMPTY }
+ *
+ * XPM_CNTRCFG6		{ XPM_EVENT_INSTRRENAME,
+ *			  XPM_EVENT_PREDICTFUNCRET,
+ *			  XPM_EVENT_MAINEXEC,
+ *			  XPM_EVENT_SECEXEC,
+ *			  XPM_EVENT_LDRSTR,
+ *			  XPM_EVENT_FLOATRENAME }
+ *
+ * XPM_CNTRCFG7		{ XPM_EVENT_NEONRENAME,
+ *			  XPM_EVENT_PLDSTALL,
+ *			  XPM_EVENT_WRITESTALL,
+ *			  XPM_EVENT_INSTRTLBSTALL,
+ *			  XPM_EVENT_DATATLBSTALL,
+ *			  XPM_EVENT_INSTR_uTLBSTALL }
+ *
+ * XPM_CNTRCFG8		{ XPM_EVENT_DATA_uTLBSTALL,
+ *			  XPM_EVENT_DMB_STALL,
+ *			  XPM_EVENT_INT_CLKEN,
+ *			  XPM_EVENT_DE_CLKEN,
+ *			  XPM_EVENT_INSTRISB,
+ *			  XPM_EVENT_INSTRDSB }
+ *
+ * XPM_CNTRCFG9		{ XPM_EVENT_INSTRDMB,
+ *			  XPM_EVENT_EXTINT,
+ *			  XPM_EVENT_PLE_LRC,
+ *			  XPM_EVENT_PLE_LRS,
+ *			  XPM_EVENT_PLE_FLUSH,
+ *			  XPM_EVENT_PLE_CMPL }
+ *
+ * XPM_CNTRCFG10	{ XPM_EVENT_PLE_OVFL,
+ *			  XPM_EVENT_PLE_PROG,
+ *			  XPM_EVENT_PLE_LRC,
+ *			  XPM_EVENT_PLE_LRS,
+ *			  XPM_EVENT_PLE_FLUSH,
+ *			  XPM_EVENT_PLE_CMPL }
+ *
+ * XPM_CNTRCFG11	{ XPM_EVENT_DATASTALL,
+ *			  XPM_EVENT_INSRFETCH_CACHEREFILL,
+ *			  XPM_EVENT_INSTRFECT_TLBREFILL,
+ *			  XPM_EVENT_DATA_CACHEREFILL,
+ *			  XPM_EVENT_DATA_CACHEACCESS,
+ *			  XPM_EVENT_DATA_TLBREFILL }
+ */
+#define XPM_CNTRCFG1	0
+#define XPM_CNTRCFG2	1
+#define XPM_CNTRCFG3	2
+#define XPM_CNTRCFG4	3
+#define XPM_CNTRCFG5	4
+#define XPM_CNTRCFG6	5
+#define XPM_CNTRCFG7	6
+#define XPM_CNTRCFG8	7
+#define XPM_CNTRCFG9	8
+#define XPM_CNTRCFG10	9
+#define XPM_CNTRCFG11	10
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+/* Interface fuctions to access perfromance counters from abstraction layer */
+void Xpm_SetEvents(s32 PmcrCfg);
+void Xpm_GetEventCounters(u32 *PmCtrValue);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/**
+* @} End of "addtogroup r5_event_counter_apis".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xpseudo_asm.h b/src/Xilinx/libsrc/standalone_v6_6/src/xpseudo_asm.h
new file mode 100644
index 0000000..4d587af
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xpseudo_asm.h
@@ -0,0 +1,74 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm.h
+*
+* @addtogroup r5_specific Cortex R5 Processor Specific Include Files
+*
+* The xpseudo_asm.h includes xreg_cortexr5.h and xpseudo_asm_gcc.h.
+*
+* The xreg_cortexr5.h file contains definitions for inline assembler code.
+* It provides inline definitions for Cortex R5 GPRs, SPRs,co-processor
+* registers and Debug register
+*
+* The xpseudo_asm_gcc.h contains the definitions for the most often used
+* inline assembler instructions, available as macros. These can be very
+* useful for tasks such as setting or getting special purpose registers,
+* synchronization,or cache manipulation. These inline assembler instructions
+* can be used from drivers and user applications written in C.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 6.2   mus  01/27/17 Updated to support IAR compiler
+* 

+*
+******************************************************************************/
+#ifndef XPSEUDO_ASM_H /* prevent circular inclusions */
+#define XPSEUDO_ASM_H /* by using protection macros */
+
+#include "xreg_cortexr5.h"
+#if defined (__GNUC__)
+#include "xpseudo_asm_gcc.h"
+#elif defined (__ICCARM__)
+#include "xpseudo_asm_iccarm.h"
+#endif
+#endif /* XPSEUDO_ASM_H */
+/**
+* @} End of "addtogroup r5_specific".
+*/
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xpseudo_asm_gcc.h b/src/Xilinx/libsrc/standalone_v6_6/src/xpseudo_asm_gcc.h
new file mode 100644
index 0000000..1b67263
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xpseudo_asm_gcc.h
@@ -0,0 +1,249 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_gcc.h
+*
+* This header file contains macros for using inline assembler code. It is
+* written specifically for the GNU compiler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp		 05/21/14 First release
+* 6.0   mus      07/27/16 Consolidated file for a53,a9 and r5 processors
+* 

+*
+******************************************************************************/
+
+#ifndef XPSEUDO_ASM_GCC_H  /* prevent circular inclusions */
+#define XPSEUDO_ASM_GCC_H  /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/* necessary for pre-processor */
+#define stringify(s)	tostring(s)
+#define tostring(s)	#s
+
+#if defined (__aarch64__)
+/* pseudo assembler instructions */
+#define mfcpsr()	({u32 rval = 0U; \
+			   asm volatile("mrs %0,  DAIF" : "=r" (rval));\
+			  rval;\
+			 })
+
+#define mtcpsr(v) __asm__ __volatile__ ("msr DAIF, %0" : : "r" (v))
+
+#define cpsiei()	//__asm__ __volatile__("cpsie	i\n")
+#define cpsidi()	//__asm__ __volatile__("cpsid	i\n")
+
+#define cpsief()	//__asm__ __volatile__("cpsie	f\n")
+#define cpsidf()	//__asm__ __volatile__("cpsid	f\n")
+
+
+
+#define mtgpr(rn, v)	/*__asm__ __volatile__(\
+			  "mov r" stringify(rn) ", %0 \n"\
+			  : : "r" (v)\
+			)*/
+
+#define mfgpr(rn)	/*({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mov %0,r" stringify(rn) "\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })*/
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+#define isb() __asm__ __volatile__ ("isb sy")
+
+/* Data Synchronization Barrier */
+#define dsb() __asm__ __volatile__("dsb sy")
+
+/* Data Memory Barrier */
+#define dmb() __asm__ __volatile__("dmb sy")
+
+
+/* Memory Operations */
+#define ldr(adr)	({u64 rval; \
+			  __asm__ __volatile__(\
+			    "ldr	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#else
+
+/* pseudo assembler instructions */
+#define mfcpsr()	({u32 rval = 0U; \
+			  __asm__ __volatile__(\
+			    "mrs	%0, cpsr\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+#define mtcpsr(v)	__asm__ __volatile__(\
+			  "msr	cpsr,%0\n"\
+			  : : "r" (v)\
+			)
+
+#define cpsiei()	__asm__ __volatile__("cpsie	i\n")
+#define cpsidi()	__asm__ __volatile__("cpsid	i\n")
+
+#define cpsief()	__asm__ __volatile__("cpsie	f\n")
+#define cpsidf()	__asm__ __volatile__("cpsid	f\n")
+
+
+
+#define mtgpr(rn, v)	__asm__ __volatile__(\
+			  "mov r" stringify(rn) ", %0 \n"\
+			  : : "r" (v)\
+			)
+
+#define mfgpr(rn)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mov %0,r" stringify(rn) "\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+#define isb() __asm__ __volatile__ ("isb" : : : "memory")
+
+/* Data Synchronization Barrier */
+#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
+
+/* Data Memory Barrier */
+#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
+
+
+/* Memory Operations */
+#define ldr(adr)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "ldr	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#endif
+
+#define ldrb(adr)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "ldrb	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define str(adr, val)	__asm__ __volatile__(\
+			  "str	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+#define strb(adr, val)	__asm__ __volatile__(\
+			  "strb	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+/* Count leading zeroes (clz) */
+#define clz(arg)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "clz	%0,%1"\
+			    : "=r" (rval) : "r" (arg)\
+			  );\
+			  rval;\
+			 })
+
+#if defined (__aarch64__)
+#define mtcpdc(reg,val)	__asm__ __volatile__("dc " #reg ",%0"  : : "r" (val))
+#define mtcpic(reg,val)	__asm__ __volatile__("ic " #reg ",%0"  : : "r" (val))
+
+#define mtcpicall(reg)	__asm__ __volatile__("ic " #reg)
+#define mtcptlbi(reg)	__asm__ __volatile__("tlbi " #reg)
+#define mtcpat(reg,val)	__asm__ __volatile__("at " #reg ",%0"  : : "r" (val))
+/* CP15 operations */
+#define mfcp(reg)	({u64 rval = 0U;\
+			__asm__ __volatile__("mrs	%0, " #reg : "=r" (rval));\
+			rval;\
+			})
+
+#define mtcp(reg,val)	__asm__ __volatile__("msr " #reg ",%0"  : : "r" (val))
+
+#else
+/* CP15 operations */
+#define mtcp(rn, v)	__asm__ __volatile__(\
+			 "mcr " rn "\n"\
+			 : : "r" (v)\
+			);
+
+#define mfcp(rn)	({u32 rval = 0U; \
+			 __asm__ __volatile__(\
+			   "mrc " rn "\n"\
+			   : "=r" (rval)\
+			 );\
+			 rval;\
+			 })
+#endif
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XPSEUDO_ASM_GCC_H */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xreg_cortexr5.h b/src/Xilinx/libsrc/standalone_v6_6/src/xreg_cortexr5.h
new file mode 100644
index 0000000..9d28c0a
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xreg_cortexr5.h
@@ -0,0 +1,445 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xreg_cortexr5.h
+*
+* This header file contains definitions for using inline assembler code. It is
+* written specifically for the GNU, IAR, ARMCC compiler.
+*
+* All of the ARM Cortex R5 GPRs, SPRs, and Debug Registers are defined along
+* with the positions of the bits within the registers.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 

+*
+******************************************************************************/
+#ifndef XREG_CORTEXR5_H	/* prevent circular inclusions */
+#define XREG_CORTEXR5_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* GPRs */
+#define XREG_GPR0				r0
+#define XREG_GPR1				r1
+#define XREG_GPR2				r2
+#define XREG_GPR3				r3
+#define XREG_GPR4				r4
+#define XREG_GPR5				r5
+#define XREG_GPR6				r6
+#define XREG_GPR7				r7
+#define XREG_GPR8				r8
+#define XREG_GPR9				r9
+#define XREG_GPR10				r10
+#define XREG_GPR11				r11
+#define XREG_GPR12				r12
+#define XREG_GPR13				r13
+#define XREG_GPR14				r14
+#define XREG_GPR15				r15
+#define XREG_CPSR				cpsr
+
+/* Coprocessor number defines */
+#define XREG_CP0				0
+#define XREG_CP1				1
+#define XREG_CP2				2
+#define XREG_CP3				3
+#define XREG_CP4				4
+#define XREG_CP5				5
+#define XREG_CP6				6
+#define XREG_CP7				7
+#define XREG_CP8				8
+#define XREG_CP9				9
+#define XREG_CP10				10
+#define XREG_CP11				11
+#define XREG_CP12				12
+#define XREG_CP13				13
+#define XREG_CP14				14
+#define XREG_CP15				15
+
+/* Coprocessor control register defines */
+#define XREG_CR0				cr0
+#define XREG_CR1				cr1
+#define XREG_CR2				cr2
+#define XREG_CR3				cr3
+#define XREG_CR4				cr4
+#define XREG_CR5				cr5
+#define XREG_CR6				cr6
+#define XREG_CR7				cr7
+#define XREG_CR8				cr8
+#define XREG_CR9				cr9
+#define XREG_CR10				cr10
+#define XREG_CR11				cr11
+#define XREG_CR12				cr12
+#define XREG_CR13				cr13
+#define XREG_CR14				cr14
+#define XREG_CR15				cr15
+
+/* Current Processor Status Register (CPSR) Bits */
+#define XREG_CPSR_THUMB_MODE			0x20U
+#define XREG_CPSR_MODE_BITS			0x1FU
+#define XREG_CPSR_SYSTEM_MODE			0x1FU
+#define XREG_CPSR_UNDEFINED_MODE		0x1BU
+#define XREG_CPSR_DATA_ABORT_MODE		0x17U
+#define XREG_CPSR_SVC_MODE			0x13U
+#define XREG_CPSR_IRQ_MODE			0x12U
+#define XREG_CPSR_FIQ_MODE			0x11U
+#define XREG_CPSR_USER_MODE			0x10U
+
+#define XREG_CPSR_IRQ_ENABLE			0x80U
+#define XREG_CPSR_FIQ_ENABLE			0x40U
+
+#define XREG_CPSR_N_BIT				0x80000000U
+#define XREG_CPSR_Z_BIT				0x40000000U
+#define XREG_CPSR_C_BIT				0x20000000U
+#define XREG_CPSR_V_BIT				0x10000000U
+
+/*MPU region definitions*/
+#define REGION_32B     0x00000004U
+#define REGION_64B     0x00000005U
+#define REGION_128B    0x00000006U
+#define REGION_256B    0x00000007U
+#define REGION_512B    0x00000008U
+#define REGION_1K      0x00000009U
+#define REGION_2K      0x0000000AU
+#define REGION_4K      0x0000000BU
+#define REGION_8K      0x0000000CU
+#define REGION_16K     0x0000000DU
+#define REGION_32K     0x0000000EU
+#define REGION_64K     0x0000000FU
+#define REGION_128K    0x00000010U
+#define REGION_256K    0x00000011U
+#define REGION_512K    0x00000012U
+#define REGION_1M      0x00000013U
+#define REGION_2M      0x00000014U
+#define REGION_4M      0x00000015U
+#define REGION_8M      0x00000016U
+#define REGION_16M     0x00000017U
+#define REGION_32M     0x00000018U
+#define REGION_64M     0x00000019U
+#define REGION_128M    0x0000001AU
+#define REGION_256M    0x0000001BU
+#define REGION_512M    0x0000001CU
+#define REGION_1G      0x0000001DU
+#define REGION_2G      0x0000001EU
+#define REGION_4G      0x0000001FU
+
+#define REGION_EN  0x00000001U
+
+
+
+#define SHAREABLE				0x00000004U 	/*shareable */
+#define STRONG_ORDERD_SHARED	0x00000000U	/*strongly ordered, always shareable*/
+
+#define DEVICE_SHARED			0x00000001U	/*device, shareable*/
+#define DEVICE_NONSHARED		0x00000010U	/*device, non shareable*/
+
+#define NORM_NSHARED_WT_NWA		0x00000002U 	/*Outer and Inner write-through, no write-allocate non-shareable*/
+#define NORM_SHARED_WT_NWA		0x00000006U 	/*Outer and Inner write-through, no write-allocate shareable*/
+
+#define NORM_NSHARED_WB_NWA 	0x00000003U 	/*Outer and Inner write-back, no write-allocate non shareable*/
+#define NORM_SHARED_WB_NWA 		0x00000007U 	/*Outer and Inner write-back, no write-allocate shareable*/
+
+#define NORM_NSHARED_NCACHE 	0x00000008U 	/*Outer and Inner Non cacheable  non shareable*/
+#define NORM_SHARED_NCACHE 		0x0000000CU 	/*Outer and Inner Non cacheable shareable*/
+
+#define NORM_NSHARED_WB_WA 		0x0000000BU 	/*Outer and Inner write-back non shared*/
+#define NORM_SHARED_WB_WA 		0x0000000FU 	/*Outer and Inner write-back shared*/
+
+/* inner and outer cache policies can be combined for different combinations */
+
+#define NORM_IN_POLICY_NCACHE	0x00000020U	/*inner non cacheable*/
+#define NORM_IN_POLICY_WB_WA	0x00000021U	/*inner write back write allocate*/
+#define NORM_IN_POLICY_WT_NWA	0x00000022U	/*inner write through no write allocate*/
+#define NORM_IN_POLICY_WB_NWA	0x00000023U	/*inner write back no write allocate*/
+
+#define NORM_OUT_POLICY_NCACHE	0x00000020U	/*outer non cacheable*/
+#define NORM_OUT_POLICY_WB_WA	0x00000028U	/*outer write back write allocate*/
+#define NORM_OUT_POLICY_WT_NWA	0x00000030U	/*outer write through no write allocate*/
+#define NORM_OUT_POLICY_WB_NWA	0x00000038U	/*outer write back no write allocate*/
+
+#define NO_ACCESS				(0x00000000U<<8U)	/*No access*/
+#define PRIV_RW_USER_NA			(0x00000001U<<8U) /*Privileged access only*/
+#define PRIV_RW_USER_RO			(0x00000002U<<8U) /*Writes in User mode generate permission faults*/
+#define	PRIV_RW_USER_RW			(0x00000003U<<8U)	/*Full Access*/
+#define PRIV_RO_USER_NA			(0x00000005U<<8U) /*Privileged eead only*/
+#define PRIV_RO_USER_RO			(0x00000006U<<8U) /*Privileged/User read-only*/
+
+#define EXECUTE_NEVER  			(0x00000001U<<12U)  /* Bit 12*/
+
+
+/* CP15 defines */
+
+/* C0 Register defines */
+#define XREG_CP15_MAIN_ID			"p15, 0, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_TYPE			"p15, 0, %0,  c0,  c0, 1"
+#define XREG_CP15_TCM_TYPE			"p15, 0, %0,  c0,  c0, 2"
+#define XREG_CP15_TLB_TYPE			"p15, 0, %0,  c0,  c0, 3"
+#define XREG_CP15_MPU_TYPE			"p15, 0, %0,  c0,  c0, 4"
+#define XREG_CP15_MULTI_PROC_AFFINITY		"p15, 0, %0,  c0,  c0, 5"
+
+#define XREG_CP15_PROC_FEATURE_0		"p15, 0, %0,  c0,  c1, 0"
+#define XREG_CP15_PROC_FEATURE_1		"p15, 0, %0,  c0,  c1, 1"
+#define XREG_CP15_DEBUG_FEATURE_0		"p15, 0, %0,  c0,  c1, 2"
+#define XREG_CP15_MEMORY_FEATURE_0		"p15, 0, %0,  c0,  c1, 4"
+#define XREG_CP15_MEMORY_FEATURE_1		"p15, 0, %0,  c0,  c1, 5"
+#define XREG_CP15_MEMORY_FEATURE_2		"p15, 0, %0,  c0,  c1, 6"
+#define XREG_CP15_MEMORY_FEATURE_3		"p15, 0, %0,  c0,  c1, 7"
+
+#define XREG_CP15_INST_FEATURE_0		"p15, 0, %0,  c0,  c2, 0"
+#define XREG_CP15_INST_FEATURE_1		"p15, 0, %0,  c0,  c2, 1"
+#define XREG_CP15_INST_FEATURE_2		"p15, 0, %0,  c0,  c2, 2"
+#define XREG_CP15_INST_FEATURE_3		"p15, 0, %0,  c0,  c2, 3"
+#define XREG_CP15_INST_FEATURE_4		"p15, 0, %0,  c0,  c2, 4"
+#define XREG_CP15_INST_FEATURE_5		"p15, 0, %0,  c0,  c2, 5"
+
+#define XREG_CP15_CACHE_SIZE_ID			"p15, 1, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_LEVEL_ID		"p15, 1, %0,  c0,  c0, 1"
+#define XREG_CP15_AUXILARY_ID			"p15, 1, %0,  c0,  c0, 7"
+
+#define XREG_CP15_CACHE_SIZE_SEL		"p15, 2, %0,  c0,  c0, 0"
+
+/* C1 Register Defines */
+#define XREG_CP15_SYS_CONTROL			"p15, 0, %0,  c1,  c0, 0"
+#define XREG_CP15_AUX_CONTROL			"p15, 0, %0,  c1,  c0, 1"
+#define XREG_CP15_CP_ACCESS_CONTROL		"p15, 0, %0,  c1,  c0, 2"
+
+
+/* XREG_CP15_CONTROL bit defines */
+#define XREG_CP15_CONTROL_TE_BIT		0x40000000U
+#define XREG_CP15_CONTROL_AFE_BIT		0x20000000U
+#define XREG_CP15_CONTROL_TRE_BIT		0x10000000U
+#define XREG_CP15_CONTROL_NMFI_BIT		0x08000000U
+#define XREG_CP15_CONTROL_EE_BIT		0x02000000U
+#define XREG_CP15_CONTROL_HA_BIT		0x00020000U
+#define XREG_CP15_CONTROL_RR_BIT		0x00004000U
+#define XREG_CP15_CONTROL_V_BIT			0x00002000U
+#define XREG_CP15_CONTROL_I_BIT			0x00001000U
+#define XREG_CP15_CONTROL_Z_BIT			0x00000800U
+#define XREG_CP15_CONTROL_SW_BIT		0x00000400U
+#define XREG_CP15_CONTROL_B_BIT			0x00000080U
+#define XREG_CP15_CONTROL_C_BIT			0x00000004U
+#define XREG_CP15_CONTROL_A_BIT			0x00000002U
+#define XREG_CP15_CONTROL_M_BIT			0x00000001U
+/* C2 Register Defines */
+/* Not Used */
+
+/* C3 Register Defines */
+/* Not Used */
+
+/* C4 Register Defines */
+/* Not Used */
+
+/* C5 Register Defines */
+#define XREG_CP15_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 0"
+#define XREG_CP15_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 1"
+
+#define XREG_CP15_AUX_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 0"
+#define XREG_CP15_AUX_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 1"
+
+/* C6 Register Defines */
+#define XREG_CP15_DATA_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 0"
+#define XREG_CP15_INST_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 2"
+
+#define XREG_CP15_MPU_REG_BASEADDR			"p15, 0, %0,  c6,  c1, 0"
+#define XREG_CP15_MPU_REG_SIZE_EN			"p15, 0, %0,  c6,  c1, 2"
+#define XREG_CP15_MPU_REG_ACCESS_CTRL		"p15, 0, %0,  c6,  c1, 4"
+
+#define XREG_CP15_MPU_MEMORY_REG_NUMBER			"p15, 0, %0,  c6,  c2, 0"
+
+/* C7 Register Defines */
+#define XREG_CP15_NOP				"p15, 0, %0,  c7,  c0, 4"
+
+#define XREG_CP15_INVAL_IC_POU			"p15, 0, %0,  c7,  c5, 0"
+#define XREG_CP15_INVAL_IC_LINE_MVA_POU		"p15, 0, %0,  c7,  c5, 1"
+
+/* The CP15 register access below has been deprecated in favor of the new
+ * isb instruction in Cortex R5.
+ */
+#define XREG_CP15_INST_SYNC_BARRIER		"p15, 0, %0,  c7,  c5, 4"
+#define XREG_CP15_INVAL_BRANCH_ARRAY		"p15, 0, %0,  c7,  c5, 6"
+#define XREG_CP15_INVAL_BRANCH_ARRAY_LINE		"p15, 0, %0,  c7,  c5, 7"
+
+#define XREG_CP15_INVAL_DC_LINE_MVA_POC		"p15, 0, %0,  c7,  c6, 1"
+#define XREG_CP15_INVAL_DC_LINE_SW		"p15, 0, %0,  c7,  c6, 2"
+
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POC		"p15, 0, %0,  c7, c10, 1"
+#define XREG_CP15_CLEAN_DC_LINE_SW		"p15, 0, %0,  c7, c10, 2"
+
+#define XREG_CP15_INVAL_DC_ALL		"p15, 0, %0,  c15, c5, 0"
+/* The next two CP15 register accesses below have been deprecated in favor
+ * of the new dsb and dmb instructions in Cortex R5.
+ */
+#define XREG_CP15_DATA_SYNC_BARRIER		"p15, 0, %0,  c7, c10, 4"
+#define XREG_CP15_DATA_MEMORY_BARRIER		"p15, 0, %0,  c7, c10, 5"
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POU		"p15, 0, %0,  c7, c11, 1"
+
+#define XREG_CP15_NOP2				"p15, 0, %0,  c7, c13, 1"
+
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC	"p15, 0, %0,  c7, c14, 1"
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_SW	"p15, 0, %0,  c7, c14, 2"
+
+/* C8 Register Defines */
+/* Not Used */
+
+
+/* C9 Register Defines */
+
+#define XREG_CP15_ATCM_REG_SIZE_ADDR		"p15, 0, %0,  c9, c1, 1"
+#define XREG_CP15_BTCM_REG_SIZE_ADDR		"p15, 0, %0,  c9, c1, 0"
+#define XREG_CP15_TCM_SELECTION				"p15, 0, %0,  c9, c2, 0"
+
+#define XREG_CP15_PERF_MONITOR_CTRL		"p15, 0, %0,  c9, c12, 0"
+#define XREG_CP15_COUNT_ENABLE_SET		"p15, 0, %0,  c9, c12, 1"
+#define XREG_CP15_COUNT_ENABLE_CLR		"p15, 0, %0,  c9, c12, 2"
+#define XREG_CP15_V_FLAG_STATUS			"p15, 0, %0,  c9, c12, 3"
+#define XREG_CP15_SW_INC			"p15, 0, %0,  c9, c12, 4"
+#define XREG_CP15_EVENT_CNTR_SEL		"p15, 0, %0,  c9, c12, 5"
+
+#define XREG_CP15_PERF_CYCLE_COUNTER		"p15, 0, %0,  c9, c13, 0"
+#define XREG_CP15_EVENT_TYPE_SEL		"p15, 0, %0,  c9, c13, 1"
+#define XREG_CP15_PERF_MONITOR_COUNT		"p15, 0, %0,  c9, c13, 2"
+
+#define XREG_CP15_USER_ENABLE			"p15, 0, %0,  c9, c14, 0"
+#define XREG_CP15_INTR_ENABLE_SET		"p15, 0, %0,  c9, c14, 1"
+#define XREG_CP15_INTR_ENABLE_CLR		"p15, 0, %0,  c9, c14, 2"
+
+/* C10 Register Defines */
+/* Not used */
+
+/* C11 Register Defines */
+/* Not used */
+
+/* C12 Register Defines */
+/* Not used */
+
+/* C13 Register Defines */
+#define XREG_CP15_CONTEXT_ID			"p15, 0, %0, c13,  c0, 1"
+#define USER_RW_THREAD_PID			"p15, 0, %0, c13,  c0, 2"
+#define USER_RO_THREAD_PID			"p15, 0, %0, c13,  c0, 3"
+#define USER_PRIV_THREAD_PID			"p15, 0, %0, c13,  c0, 4"
+
+/* C14 Register Defines */
+/* not used */
+
+/* C15 Register Defines */
+#define XREG_CP15_SEC_AUX_CTRL			"p15, 0, %0, c15,  c0, 0"
+
+
+
+
+/* MPE register definitions */
+#define XREG_FPSID				c0
+#define XREG_FPSCR				c1
+#define XREG_MVFR1				c6
+#define XREG_MVFR0				c7
+#define XREG_FPEXC				c8
+#define XREG_FPINST				c9
+#define XREG_FPINST2			c10
+
+/* FPSID bits */
+#define XREG_FPSID_IMPLEMENTER_BIT	(24U)
+#define XREG_FPSID_IMPLEMENTER_MASK	(0x000000FFU << FPSID_IMPLEMENTER_BIT)
+#define XREG_FPSID_SOFTWARE		(0X00000001U << 23U)
+#define XREG_FPSID_ARCH_BIT		(16U)
+#define XREG_FPSID_ARCH_MASK		(0x0000000FU  << FPSID_ARCH_BIT)
+#define XREG_FPSID_PART_BIT		(8U)
+#define XREG_FPSID_PART_MASK		(0x000000FFU << FPSID_PART_BIT)
+#define XREG_FPSID_VARIANT_BIT		(4U)
+#define XREG_FPSID_VARIANT_MASK		(0x0000000FU  << FPSID_VARIANT_BIT)
+#define XREG_FPSID_REV_BIT		(0U)
+#define XREG_FPSID_REV_MASK		(0x0000000FU  << FPSID_REV_BIT)
+
+/* FPSCR bits */
+#define XREG_FPSCR_N_BIT		(0X00000001U << 31U)
+#define XREG_FPSCR_Z_BIT		(0X00000001U << 30U)
+#define XREG_FPSCR_C_BIT		(0X00000001U << 29U)
+#define XREG_FPSCR_V_BIT		(0X00000001U << 28U)
+#define XREG_FPSCR_QC			(0X00000001U << 27U)
+#define XREG_FPSCR_AHP			(0X00000001U << 26U)
+#define XREG_FPSCR_DEFAULT_NAN		(0X00000001U << 25U)
+#define XREG_FPSCR_FLUSHTOZERO		(0X00000001U << 24U)
+#define XREG_FPSCR_ROUND_NEAREST	(0X00000000U << 22U)
+#define XREG_FPSCR_ROUND_PLUSINF	(0X00000001U << 22U)
+#define XREG_FPSCR_ROUND_MINUSINF	(0X00000002U << 22U)
+#define XREG_FPSCR_ROUND_TOZERO		(0X00000003U << 22U)
+#define XREG_FPSCR_RMODE_BIT		(22U)
+#define XREG_FPSCR_RMODE_MASK		(0X00000003U << FPSCR_RMODE_BIT)
+#define XREG_FPSCR_STRIDE_BIT		(20U)
+#define XREG_FPSCR_STRIDE_MASK		(0X00000003U << FPSCR_STRIDE_BIT)
+#define XREG_FPSCR_LENGTH_BIT		(16U)
+#define XREG_FPSCR_LENGTH_MASK		(0X00000007U << FPSCR_LENGTH_BIT)
+#define XREG_FPSCR_IDC			(0X00000001U << 7U)
+#define XREG_FPSCR_IXC			(0X00000001U << 4U)
+#define XREG_FPSCR_UFC			(0X00000001U << 3U)
+#define XREG_FPSCR_OFC			(0X00000001U << 2U)
+#define XREG_FPSCR_DZC			(0X00000001U << 1U)
+#define XREG_FPSCR_IOC			(0X00000001U << 0U)
+
+/* MVFR0 bits */
+#define XREG_MVFR0_RMODE_BIT		(28U)
+#define XREG_MVFR0_RMODE_MASK		(0x0000000FU << XREG_MVFR0_RMODE_BIT)
+#define XREG_MVFR0_SHORT_VEC_BIT	(24U)
+#define XREG_MVFR0_SHORT_VEC_MASK	(0x0000000FU << XREG_MVFR0_SHORT_VEC_BIT)
+#define XREG_MVFR0_SQRT_BIT		(20U)
+#define XREG_MVFR0_SQRT_MASK		(0x0000000FU << XREG_MVFR0_SQRT_BIT)
+#define XREG_MVFR0_DIVIDE_BIT		(16U)
+#define XREG_MVFR0_DIVIDE_MASK		(0x0000000FU << XREG_MVFR0_DIVIDE_BIT)
+#define XREG_MVFR0_EXEC_TRAP_BIT	(12U)
+#define XREG_MVFR0_EXEC_TRAP_MASK	(0x0000000FU << XREG_MVFR0_EXEC_TRAP_BIT)
+#define XREG_MVFR0_DP_BIT		(8U)
+#define XREG_MVFR0_DP_MASK		(0x0000000FU << XREG_MVFR0_DP_BIT)
+#define XREG_MVFR0_SP_BIT		(4U)
+#define XREG_MVFR0_SP_MASK		(0x0000000FU << XREG_MVFR0_SP_BIT)
+#define XREG_MVFR0_A_SIMD_BIT		(0U)
+#define XREG_MVFR0_A_SIMD_MASK		(0x0000000FU << MVFR0_A_SIMD_BIT)
+
+/* FPEXC bits */
+#define XREG_FPEXC_EX			(0X00000001U << 31U)
+#define XREG_FPEXC_EN			(0X00000001U << 30U)
+#define XREG_FPEXC_DEX			(0X00000001U << 29U)
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XREG_CORTEXR5_H */
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xstatus.h b/src/Xilinx/libsrc/standalone_v6_6/src/xstatus.h
new file mode 100644
index 0000000..9937475
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xstatus.h
@@ -0,0 +1,535 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xstatus.h
+*
+* @addtogroup common_status_codes Xilinx® software status codes
+*
+* The xstatus.h file contains the Xilinx® software status codes.These codes are
+* used throughout the Xilinx device drivers.
+*
+* @{
+******************************************************************************/
+
+#ifndef XSTATUS_H		/* prevent circular inclusions */
+#define XSTATUS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/*********************** Common statuses 0 - 500 *****************************/
+/**
+@name Common Status Codes for All Device Drivers
+@{
+*/
+#define XST_SUCCESS                     0L
+#define XST_FAILURE                     1L
+#define XST_DEVICE_NOT_FOUND            2L
+#define XST_DEVICE_BLOCK_NOT_FOUND      3L
+#define XST_INVALID_VERSION             4L
+#define XST_DEVICE_IS_STARTED           5L
+#define XST_DEVICE_IS_STOPPED           6L
+#define XST_FIFO_ERROR                  7L	/*!< An error occurred during an
+						   operation with a FIFO such as
+						   an underrun or overrun, this
+						   error requires the device to
+						   be reset */
+#define XST_RESET_ERROR                 8L	/*!< An error occurred which requires
+						   the device to be reset */
+#define XST_DMA_ERROR                   9L	/*!< A DMA error occurred, this error
+						   typically requires the device
+						   using the DMA to be reset */
+#define XST_NOT_POLLED                  10L	/*!< The device is not configured for
+						   polled mode operation */
+#define XST_FIFO_NO_ROOM                11L	/*!< A FIFO did not have room to put
+						   the specified data into */
+#define XST_BUFFER_TOO_SMALL            12L	/*!< The buffer is not large enough
+						   to hold the expected data */
+#define XST_NO_DATA                     13L	/*!< There was no data available */
+#define XST_REGISTER_ERROR              14L	/*!< A register did not contain the
+						   expected value */
+#define XST_INVALID_PARAM               15L	/*!< An invalid parameter was passed
+						   into the function */
+#define XST_NOT_SGDMA                   16L	/*!< The device is not configured for
+						   scatter-gather DMA operation */
+#define XST_LOOPBACK_ERROR              17L	/*!< A loopback test failed */
+#define XST_NO_CALLBACK                 18L	/*!< A callback has not yet been
+						   registered */
+#define XST_NO_FEATURE                  19L	/*!< Device is not configured with
+						   the requested feature */
+#define XST_NOT_INTERRUPT               20L	/*!< Device is not configured for
+						   interrupt mode operation */
+#define XST_DEVICE_BUSY                 21L	/*!< Device is busy */
+#define XST_ERROR_COUNT_MAX             22L	/*!< The error counters of a device
+						   have maxed out */
+#define XST_IS_STARTED                  23L	/*!< Used when part of device is
+						   already started i.e.
+						   sub channel */
+#define XST_IS_STOPPED                  24L	/*!< Used when part of device is
+						   already stopped i.e.
+						   sub channel */
+#define XST_DATA_LOST                   26L	/*!< Driver defined error */
+#define XST_RECV_ERROR                  27L	/*!< Generic receive error */
+#define XST_SEND_ERROR                  28L	/*!< Generic transmit error */
+#define XST_NOT_ENABLED                 29L	/*!< A requested service is not
+						   available because it has not
+						   been enabled */
+/** @} */
+/***************** Utility Component statuses 401 - 500  *********************/
+/**
+@name Utility Component Status Codes 401 - 500
+@{
+*/
+#define XST_MEMTEST_FAILED              401L	/*!< Memory test failed */
+
+/** @} */
+/***************** Common Components statuses 501 - 1000 *********************/
+/**
+@name Packet Fifo Status Codes 501 - 510
+@{
+*/
+/********************* Packet Fifo statuses 501 - 510 ************************/
+
+#define XST_PFIFO_LACK_OF_DATA          501L	/*!< Not enough data in FIFO   */
+#define XST_PFIFO_NO_ROOM               502L	/*!< Not enough room in FIFO   */
+#define XST_PFIFO_BAD_REG_VALUE         503L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_PFIFO_ERROR                 504L	/*!< Generic packet FIFO error */
+#define XST_PFIFO_DEADLOCK              505L	/*!< Packet FIFO is reporting
+						 * empty and full simultaneously
+						 */
+/** @} */
+/**
+@name DMA Status Codes 511 - 530
+@{
+*/
+/************************** DMA statuses 511 - 530 ***************************/
+
+#define XST_DMA_TRANSFER_ERROR          511L	/*!< Self test, DMA transfer
+						   failed */
+#define XST_DMA_RESET_REGISTER_ERROR    512L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_DMA_SG_LIST_EMPTY           513L	/*!< Scatter gather list contains
+						   no buffer descriptors ready
+						   to be processed */
+#define XST_DMA_SG_IS_STARTED           514L	/*!< Scatter gather not stopped */
+#define XST_DMA_SG_IS_STOPPED           515L	/*!< Scatter gather not running */
+#define XST_DMA_SG_LIST_FULL            517L	/*!< All the buffer desciptors of
+						   the scatter gather list are
+						   being used */
+#define XST_DMA_SG_BD_LOCKED            518L	/*!< The scatter gather buffer
+						   descriptor which is to be
+						   copied over in the scatter
+						   list is locked */
+#define XST_DMA_SG_NOTHING_TO_COMMIT    519L	/*!< No buffer descriptors have been
+						   put into the scatter gather
+						   list to be commited */
+#define XST_DMA_SG_COUNT_EXCEEDED       521L	/*!< The packet count threshold
+						   specified was larger than the
+						   total # of buffer descriptors
+						   in the scatter gather list */
+#define XST_DMA_SG_LIST_EXISTS          522L	/*!< The scatter gather list has
+						   already been created */
+#define XST_DMA_SG_NO_LIST              523L	/*!< No scatter gather list has
+						   been created */
+#define XST_DMA_SG_BD_NOT_COMMITTED     524L	/*!< The buffer descriptor which was
+						   being started was not committed
+						   to the list */
+#define XST_DMA_SG_NO_DATA              525L	/*!< The buffer descriptor to start
+						   has already been used by the
+						   hardware so it can't be reused
+						 */
+#define XST_DMA_SG_LIST_ERROR           526L	/*!< General purpose list access
+						   error */
+#define XST_DMA_BD_ERROR                527L	/*!< General buffer descriptor
+						   error */
+/** @} */
+/**
+@name IPIF Status Codes Codes 531 - 550
+@{
+*/
+/************************** IPIF statuses 531 - 550 ***************************/
+
+#define XST_IPIF_REG_WIDTH_ERROR        531L	/*!< An invalid register width
+						   was passed into the function */
+#define XST_IPIF_RESET_REGISTER_ERROR   532L	/*!< The value of a register at
+						   reset was not valid */
+#define XST_IPIF_DEVICE_STATUS_ERROR    533L	/*!< A write to the device interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_DEVICE_ACK_ERROR       534L	/*!< The device interrupt status
+						   register did not reset when
+						   acked */
+#define XST_IPIF_DEVICE_ENABLE_ERROR    535L	/*!< The device interrupt enable
+						   register was not updated when
+						   other registers changed */
+#define XST_IPIF_IP_STATUS_ERROR        536L	/*!< A write to the IP interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_IP_ACK_ERROR           537L	/*!< The IP interrupt status register
+						   did not reset when acked */
+#define XST_IPIF_IP_ENABLE_ERROR        538L	/*!< IP interrupt enable register was
+						   not updated correctly when other
+						   registers changed */
+#define XST_IPIF_DEVICE_PENDING_ERROR   539L	/*!< The device interrupt pending
+						   register did not indicate the
+						   expected value */
+#define XST_IPIF_DEVICE_ID_ERROR        540L	/*!< The device interrupt ID register
+						   did not indicate the expected
+						   value */
+#define XST_IPIF_ERROR                  541L	/*!< Generic ipif error */
+/** @} */
+
+/****************** Device specific statuses 1001 - 4095 *********************/
+/**
+@name Ethernet Status Codes 1001 - 1050
+@{
+*/
+/********************* Ethernet statuses 1001 - 1050 *************************/
+
+#define XST_EMAC_MEMORY_SIZE_ERROR  1001L	/*!< Memory space is not big enough
+						 * to hold the minimum number of
+						 * buffers or descriptors */
+#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L	/*!< Memory allocation failed */
+#define XST_EMAC_MII_READ_ERROR     1003L	/*!< MII read error */
+#define XST_EMAC_MII_BUSY           1004L	/*!< An MII operation is in progress */
+#define XST_EMAC_OUT_OF_BUFFERS     1005L	/*!< Driver is out of buffers */
+#define XST_EMAC_PARSE_ERROR        1006L	/*!< Invalid driver init string */
+#define XST_EMAC_COLLISION_ERROR    1007L	/*!< Excess deferral or late
+						 * collision on polled send */
+/** @} */
+/**
+@name UART Status Codes 1051 - 1075
+@{
+*/
+/*********************** UART statuses 1051 - 1075 ***************************/
+#define XST_UART
+
+#define XST_UART_INIT_ERROR         1051L
+#define XST_UART_START_ERROR        1052L
+#define XST_UART_CONFIG_ERROR       1053L
+#define XST_UART_TEST_FAIL          1054L
+#define XST_UART_BAUD_ERROR         1055L
+#define XST_UART_BAUD_RANGE         1056L
+
+/** @} */
+/**
+@name IIC Status Codes 1076 - 1100
+@{
+*/
+/************************ IIC statuses 1076 - 1100 ***************************/
+
+#define XST_IIC_SELFTEST_FAILED         1076	/*!< self test failed            */
+#define XST_IIC_BUS_BUSY                1077	/*!< bus found busy              */
+#define XST_IIC_GENERAL_CALL_ADDRESS    1078	/*!< mastersend attempted with   */
+					     /* general call address        */
+#define XST_IIC_STAND_REG_RESET_ERROR   1079	/*!< A non parameterizable reg   */
+					     /* value after reset not valid */
+#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080	/*!< Tx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081	/*!< Rx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_TBA_REG_RESET_ERROR     1082	/*!< 10 bit addr incl in design  */
+					     /* value after reset not valid */
+#define XST_IIC_CR_READBACK_ERROR       1083	/*!< Read of the control register */
+					     /* didn't return value written */
+#define XST_IIC_DTR_READBACK_ERROR      1084	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_DRR_READBACK_ERROR      1085	/*!< Read of the data Receive reg */
+					     /* didn't return value written */
+#define XST_IIC_ADR_READBACK_ERROR      1086	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_TBA_READBACK_ERROR      1087	/*!< Read of the 10 bit addr reg */
+					     /* didn't return written value */
+#define XST_IIC_NOT_SLAVE               1088	/*!< The device isn't a slave    */
+/** @} */
+/**
+@name ATMC Status Codes 1101 - 1125
+@{
+*/
+/*********************** ATMC statuses 1101 - 1125 ***************************/
+
+#define XST_ATMC_ERROR_COUNT_MAX    1101L	/*!< the error counters in the ATM
+						   controller hit the max value
+						   which requires the statistics
+						   to be cleared */
+/** @} */
+/**
+@name Flash Status Codes 1126 - 1150
+@{
+*/
+/*********************** Flash statuses 1126 - 1150 **************************/
+
+#define XST_FLASH_BUSY                1126L	/*!< Flash is erasing or programming
+						 */
+#define XST_FLASH_READY               1127L	/*!< Flash is ready for commands */
+#define XST_FLASH_ERROR               1128L	/*!< Flash had detected an internal
+						   error. Use XFlash_DeviceControl
+						   to retrieve device specific codes
+						 */
+#define XST_FLASH_ERASE_SUSPENDED     1129L	/*!< Flash is in suspended erase state
+						 */
+#define XST_FLASH_WRITE_SUSPENDED     1130L	/*!< Flash is in suspended write state
+						 */
+#define XST_FLASH_PART_NOT_SUPPORTED  1131L	/*!< Flash type not supported by
+						   driver */
+#define XST_FLASH_NOT_SUPPORTED       1132L	/*!< Operation not supported */
+#define XST_FLASH_TOO_MANY_REGIONS    1133L	/*!< Too many erase regions */
+#define XST_FLASH_TIMEOUT_ERROR       1134L	/*!< Programming or erase operation
+						   aborted due to a timeout */
+#define XST_FLASH_ADDRESS_ERROR       1135L	/*!< Accessed flash outside its
+						   addressible range */
+#define XST_FLASH_ALIGNMENT_ERROR     1136L	/*!< Write alignment error */
+#define XST_FLASH_BLOCKING_CALL_ERROR 1137L	/*!< Couldn't return immediately from
+						   write/erase function with
+						   XFL_NON_BLOCKING_WRITE/ERASE
+						   option cleared */
+#define XST_FLASH_CFI_QUERY_ERROR     1138L	/*!< Failed to query the device */
+/** @} */
+/**
+@name SPI Status Codes 1151 - 1175
+@{
+*/
+/*********************** SPI statuses 1151 - 1175 ****************************/
+
+#define XST_SPI_MODE_FAULT          1151	/*!< master was selected as slave */
+#define XST_SPI_TRANSFER_DONE       1152	/*!< data transfer is complete */
+#define XST_SPI_TRANSMIT_UNDERRUN   1153	/*!< slave underruns transmit register */
+#define XST_SPI_RECEIVE_OVERRUN     1154	/*!< device overruns receive register */
+#define XST_SPI_NO_SLAVE            1155	/*!< no slave has been selected yet */
+#define XST_SPI_TOO_MANY_SLAVES     1156	/*!< more than one slave is being
+						 * selected */
+#define XST_SPI_NOT_MASTER          1157	/*!< operation is valid only as master */
+#define XST_SPI_SLAVE_ONLY          1158	/*!< device is configured as slave-only
+						 */
+#define XST_SPI_SLAVE_MODE_FAULT    1159	/*!< slave was selected while disabled */
+#define XST_SPI_SLAVE_MODE          1160	/*!< device has been addressed as slave */
+#define XST_SPI_RECEIVE_NOT_EMPTY   1161	/*!< device received data in slave mode */
+
+#define XST_SPI_COMMAND_ERROR       1162	/*!< unrecognised command - qspi only */
+#define XST_SPI_POLL_DONE           1163        /*!< controller completed polling the
+						   device for status */
+/** @} */
+/**
+@name OPB Arbiter Status Codes 1176 - 1200
+@{
+*/
+/********************** OPB Arbiter statuses 1176 - 1200 *********************/
+
+#define XST_OPBARB_INVALID_PRIORITY  1176	/*!< the priority registers have either
+						 * one master assigned to two or more
+						 * priorities, or one master not
+						 * assigned to any priority
+						 */
+#define XST_OPBARB_NOT_SUSPENDED     1177	/*!< an attempt was made to modify the
+						 * priority levels without first
+						 * suspending the use of priority
+						 * levels
+						 */
+#define XST_OPBARB_PARK_NOT_ENABLED  1178	/*!< bus parking by id was enabled but
+						 * bus parking was not enabled
+						 */
+#define XST_OPBARB_NOT_FIXED_PRIORITY 1179	/*!< the arbiter must be in fixed
+						 * priority mode to allow the
+						 * priorities to be changed
+						 */
+/** @} */
+/**
+@name INTC Status Codes 1201 - 1225
+@{
+*/
+/************************ Intc statuses 1201 - 1225 **************************/
+
+#define XST_INTC_FAIL_SELFTEST      1201	/*!< self test failed */
+#define XST_INTC_CONNECT_ERROR      1202	/*!< interrupt already in use */
+/** @} */
+/**
+@name TmrCtr Status Codes 1226 - 1250
+@{
+*/
+/********************** TmrCtr statuses 1226 - 1250 **************************/
+
+#define XST_TMRCTR_TIMER_FAILED     1226	/*!< self test failed */
+/** @} */
+/**
+@name WdtTb Status Codes 1251 - 1275
+@{
+*/
+/********************** WdtTb statuses 1251 - 1275 ***************************/
+
+#define XST_WDTTB_TIMER_FAILED      1251L
+/** @} */
+/**
+@name PlbArb status Codes 1276 - 1300
+@{
+*/
+/********************** PlbArb statuses 1276 - 1300 **************************/
+
+#define XST_PLBARB_FAIL_SELFTEST    1276L
+/** @} */
+/**
+@name Plb2Opb Status Codes 1301 - 1325
+@{
+*/
+/********************** Plb2Opb statuses 1301 - 1325 *************************/
+
+#define XST_PLB2OPB_FAIL_SELFTEST   1301L
+/** @} */
+/**
+@name Opb2Plb Status 1326 - 1350
+@{
+*/
+/********************** Opb2Plb statuses 1326 - 1350 *************************/
+
+#define XST_OPB2PLB_FAIL_SELFTEST   1326L
+/** @} */
+/**
+@name SysAce Status Codes 1351 - 1360
+@{
+*/
+/********************** SysAce statuses 1351 - 1360 **************************/
+
+#define XST_SYSACE_NO_LOCK          1351L	/*!< No MPU lock has been granted */
+/** @} */
+/**
+@name PCI Bridge Status Codes 1361 - 1375
+@{
+*/
+/********************** PCI Bridge statuses 1361 - 1375 **********************/
+
+#define XST_PCI_INVALID_ADDRESS     1361L
+/** @} */
+/**
+@name FlexRay Constants 1400 - 1409
+@{
+*/
+/********************** FlexRay constants 1400 - 1409 *************************/
+
+#define XST_FR_TX_ERROR			1400
+#define XST_FR_TX_BUSY			1401
+#define XST_FR_BUF_LOCKED		1402
+#define XST_FR_NO_BUF			1403
+/** @} */
+/**
+@name USB constants 1410 - 1420
+@{
+*/
+/****************** USB constants 1410 - 1420  *******************************/
+
+#define XST_USB_ALREADY_CONFIGURED	1410
+#define XST_USB_BUF_ALIGN_ERROR		1411
+#define XST_USB_NO_DESC_AVAILABLE	1412
+#define XST_USB_BUF_TOO_BIG		1413
+#define XST_USB_NO_BUF			1414
+/** @} */
+/**
+@name HWICAP constants 1421 - 1429
+@{
+*/
+/****************** HWICAP constants 1421 - 1429  *****************************/
+
+#define XST_HWICAP_WRITE_DONE		1421
+
+/** @} */
+/**
+@name AXI VDMA constants 1430 - 1440
+@{
+*/
+/****************** AXI VDMA constants 1430 - 1440  *****************************/
+
+#define XST_VDMA_MISMATCH_ERROR		1430
+/** @} */
+/**
+@name NAND Flash Status Codes 1441 - 1459
+@{
+*/
+/*********************** NAND Flash statuses 1441 - 1459  *********************/
+
+#define XST_NAND_BUSY			1441L	/*!< Flash is erasing or
+						 * programming
+						 */
+#define XST_NAND_READY			1442L	/*!< Flash is ready for commands
+						 */
+#define XST_NAND_ERROR			1443L	/*!< Flash had detected an
+						 * internal error.
+						 */
+#define XST_NAND_PART_NOT_SUPPORTED	1444L	/*!< Flash type not supported by
+						 * driver
+						 */
+#define XST_NAND_OPT_NOT_SUPPORTED	1445L	/*!< Operation not supported
+						 */
+#define XST_NAND_TIMEOUT_ERROR		1446L	/*!< Programming or erase
+						 * operation aborted due to a
+						 * timeout
+						 */
+#define XST_NAND_ADDRESS_ERROR		1447L	/*!< Accessed flash outside its
+						 * addressible range
+						 */
+#define XST_NAND_ALIGNMENT_ERROR	1448L	/*!< Write alignment error
+						 */
+#define XST_NAND_PARAM_PAGE_ERROR	1449L	/*!< Failed to read parameter
+						 * page of the device
+						 */
+#define XST_NAND_CACHE_ERROR		1450L	/*!< Flash page buffer error
+						 */
+
+#define XST_NAND_WRITE_PROTECTED	1451L	/*!< Flash is write protected
+						 */
+/** @} */
+
+/**************************** Type Definitions *******************************/
+
+typedef s32 XStatus;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_status_codes".
+*/
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xtime_l.c b/src/Xilinx/libsrc/standalone_v6_6/src/xtime_l.c
new file mode 100644
index 0000000..2eeb412
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xtime_l.c
@@ -0,0 +1,128 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.c
+*
+* This file contains low level functions to get/set time from the Global Timer
+* register in the ARM Cortex R5 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.00 	pkp    08/29/14 First release
+* 5.04  pkp	   02/19/16 XTime_StartTimer API is added to configure TTC3 timer
+*						when present. XTime_GetTime is modified to give 64bit
+*						output using timer overflow when TTC3 present.
+*						XTime_SetTime is modified to configure TTC3 counter
+*						value when present.
+* 5.04	pkp	   03/11/16 XTime_StartTimer is modified to avoid enabling the
+*						overflow interrupt and XTime_GetTime & XTime_SetTime
+*						are modified to read and write TTC counter value
+*						respectively
+* 5.04	pkp
+* 6.0   mus    08/11/16  Removed implementation of XTime_SetTime API, since
+*                        TTC counter value register is read only.
+* 6.6   srm    10/18/17 Removed XTime_StartTimer API and made XTime_GetTime,
+*                       XTime_SetTime applicable for all the instances of TTC
+*
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xtime_l.h"
+#include "xpseudo_asm.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xdebug.h"
+
+#if defined SLEEP_TIMER_BASEADDR
+#include "xil_sleeptimer.h"
+#endif
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+/* Function definitions are applicable only when TTC is present*/
+#ifdef SLEEP_TIMER_BASEADDR
+
+/****************************************************************************/
+/**
+* @brief    TTC Timer runs continuously and the time can not be set as
+*			desired. This API doesn't contain anything. It is defined to have
+*			uniformity across platforms.
+*
+* @param	Xtime_Global: 32 bit value to be written to the timer counter
+*           register.
+*
+* @return	None.
+*
+* @note		In multiprocessor environment reference time will reset/lost for
+*		    all processors, when this function called by any one processor.
+*
+****************************************************************************/
+void XTime_SetTime(XTime Xtime_Global)
+{
+	(void) Xtime_Global;
+/*Timer cannot be set to desired value, so the API is left unimplemented*/
+    xdbg_printf(XDBG_DEBUG_GENERAL,
+                "XTime_SetTime:Timer cannot be set to desired value,so API is not implemented\n");
+}
+
+/****************************************************************************/
+/**
+* @brief    Get the time from the timer counter register.
+*
+* @param	Xtime_Global: Pointer to the 32 bit location to be updated with
+*           the time current value of timer counter register.
+*
+* @return	None.
+*
+****************************************************************************/
+void XTime_GetTime(XTime *Xtime_Global)
+{
+	*Xtime_Global = Xil_In32(SLEEP_TIMER_BASEADDR +
+				      XSLEEP_TIMER_TTC_COUNT_VALUE_OFFSET);
+}
+#endif
diff --git a/src/Xilinx/libsrc/standalone_v6_6/src/xtime_l.h b/src/Xilinx/libsrc/standalone_v6_6/src/xtime_l.h
new file mode 100644
index 0000000..4974664
--- /dev/null
+++ b/src/Xilinx/libsrc/standalone_v6_6/src/xtime_l.h
@@ -0,0 +1,102 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.h
+*
+* @addtogroup r5_time_apis Cortex R5 Time Functions
+* The xtime_l.h provides access to 32-bit TTC timer counter. These functions
+* can be used by applications to track the time.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.00 	pkp	   05/29/14 First release
+* 5.04  pkp	   02/19/16 Added timer configuration register offset definitions
+* 5.04	pkp	   03/11/16 Removed definitions for overflow interrupt register
+*						and mask
+* 6.6   srm    10/22/17 Added a warning message for the user configurable sleep
+*                       implementation when default timer is selected by the user
+* 

+*
+******************************************************************************/
+
+#ifndef XTIME_H /* prevent circular inclusions */
+#define XTIME_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xparameters.h"
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Constant Definitions *****************************/
+
+#ifdef SLEEP_TIMER_BASEADDR
+
+#define COUNTS_PER_SECOND				SLEEP_TIMER_FREQUENCY
+#define COUNTS_PER_USECOND 				COUNTS_PER_SECOND/1000000
+
+#else
+#define ITERS_PER_SEC  (XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ / 4)
+#define ITERS_PER_USEC  (XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ / 4000000)
+#define IRQ_FIQ_MASK 	0xC0	/* Mask IRQ and FIQ interrupts in cpsr */
+#endif
+
+#if defined (XSLEEP_TIMER_IS_DEFAULT_TIMER)
+#pragma message ("For the sleep routines, TTC3 is used if present else the assembly instructions are called")
+#endif
+
+/**************************** Type Definitions *******************************/
+
+/* The following definitions are applicable only when TTC3 is present*/
+#ifdef SLEEP_TIMER_BASEADDR
+typedef u32 XTime;
+
+void XTime_SetTime(XTime Xtime_Global);
+void XTime_GetTime(XTime *Xtime_Global);
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XTIME_H */
+/**
+* @} End of "@addtogroup r5_time_apis".
+*/
diff --git a/src/Xilinx/libsrc/sysmonpsu_v2_3/src/Makefile b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/Makefile
new file mode 100644
index 0000000..b832910
--- /dev/null
+++ b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xsysmonpsu_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling sysmonpsu"
+
+xsysmonpsu_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xsysmonpsu_includes
+
+xsysmonpsu_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu.c b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu.c
new file mode 100644
index 0000000..4c2545c
--- /dev/null
+++ b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu.c
@@ -0,0 +1,1882 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsysmonpsu.c
+*
+* Functions in this file are the minimum required functions for the XSysMonPsu
+* driver. See xsysmonpsu.h for a detailed description of the driver.
+*
+* @note 	None.
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	    Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.0   kvn    12/15/15 First release.
+*              02/15/16 Corrected Assert function call in
+*                       XSysMonPsu_GetMonitorStatus API.
+*              03/03/16 Added Temperature remote channel for Setsingle
+*                       channel API. Also corrected external mux channel
+*                       numbers.
+* 1.1   kvn    05/05/16 Modified code for MISRA-C:2012 Compliance.
+* 2.0   vns    08/14/16 Fixed CR #956780, added support for enabling/disabling
+*                       SEQ_CH2 and SEQ_AVG2 registers, modified function
+*                       prototypes of XSysMonPsu_GetSeqAvgEnables,
+*                       XSysMonPsu_SetSeqAvgEnables, XSysMonPsu_SetSeqChEnables,
+*                       XSysMonPsu_GetSeqChEnables,
+*                       XSysMonPsu_SetSeqInputMode, XSysMonPsu_GetSeqInputMode,
+*                       XSysMonPsu_SetSeqAcqTime
+*                       and XSysMonPsu_GetSeqAcqTime to provide support for
+*                       set/get 64 bit value.
+* 2.1   sk     03/03/16 Check for PL reset before doing PL Sysmon reset.
+* 2.3   mn     12/13/17 Correct the AMS block channel numbers
+*       mn     03/08/18 Update Clock Divisor to the proper value
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xsysmonpsu.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Function Prototypes *****************************/
+
+static void XSysMonPsu_StubHandler(void *CallBackRef);
+
+/************************** Variable Definitions ****************************/
+
+/*****************************************************************************/
+/**
+*
+* This function initializes XSysMonPsu device/instance. This function
+* must be called prior to using the System Monitor device.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	ConfigPtr points to the XSysMonPsu device configuration structure.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. If the address translation is not used then the
+*		physical address is passed.
+*		Unexpected errors may occur if the address mapping is changed
+*		after this function is invoked.
+*
+* @return
+*		- XST_SUCCESS if successful.
+*
+* @note		The user needs to first call the XSysMonPsu_LookupConfig() API
+*		which returns the Configuration structure pointer which is
+*		passed as a parameter to the XSysMonPsu_CfgInitialize() API.
+*
+******************************************************************************/
+s32 XSysMonPsu_CfgInitialize(XSysMonPsu *InstancePtr, XSysMonPsu_Config *ConfigPtr,
+			  u32 EffectiveAddr)
+{
+	u32 PsSysmonControlStatus;
+	u32 PlSysmonControlStatus;
+	u32 IntrStatus;
+
+	/* Assert the input arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+
+	/* Set the values read from the device config and the base address. */
+	InstancePtr->Config.DeviceId = ConfigPtr->DeviceId;
+	InstancePtr->Config.BaseAddress = EffectiveAddr;
+	InstancePtr->Config.InputClockMHz = ConfigPtr->InputClockMHz;
+
+	/* Set all handlers to stub values, let user configure this data later. */
+	InstancePtr->Handler = XSysMonPsu_StubHandler;
+
+	XSysMonPsu_UpdateAdcClkDivisor(InstancePtr, XSYSMON_PS);
+	XSysMonPsu_UpdateAdcClkDivisor(InstancePtr, XSYSMON_PL);
+
+	/* Reset the device such that it is in a known state. */
+	XSysMonPsu_Reset(InstancePtr);
+
+	PsSysmonControlStatus = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+			XSYSMONPSU_PS_SYSMON_CSTS_OFFSET);
+
+	/* Check if the PS Sysmon is in Idle / ready state or not */
+	while(PsSysmonControlStatus != XSYSMONPSU_PS_SYSMON_READY) {
+		PsSysmonControlStatus = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+					XSYSMONPSU_PS_SYSMON_CSTS_OFFSET);
+	}
+
+	PlSysmonControlStatus = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+			XSYSMONPSU_PL_SYSMON_CSTS_OFFSET);
+
+	/* Check if the PL Sysmon is accessible to PS Sysmon or not */
+	while((PlSysmonControlStatus & XSYSMONPSU_PL_SYSMON_CSTS_ACESBLE_MASK)
+				!= XSYSMONPSU_PL_SYSMON_CSTS_ACESBLE_MASK) {
+		PlSysmonControlStatus = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+					XSYSMONPSU_PL_SYSMON_CSTS_OFFSET);
+	}
+
+	/* Indicate the instance is now ready to use, initialized without error */
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+
+	/* Clear any bits set in the Interrupt Status Register. */
+	IntrStatus = XSysMonPsu_IntrGetStatus(InstancePtr);
+	XSysMonPsu_IntrClear(InstancePtr, IntrStatus);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+*
+* This function is a stub handler that is the default handler such that if the
+* application has not set the handler when interrupts are enabled, this
+* function will be called.
+*
+* @param	CallBackRef is unused by this function.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void XSysMonPsu_StubHandler(void *CallBackRef)
+{
+	(void) CallBackRef;
+
+	/* Assert occurs always since this is a stub and should never be called */
+	Xil_AssertVoidAlways();
+}
+
+/*****************************************************************************/
+/**
+*
+* This function resets the SystemMonitor
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+*
+* @return	None.
+*
+* @note		Upon reset, all Maximum and Minimum status registers will be
+*		reset to their default values. Currently running and any averaging
+*		will restart. Refer to the device data sheet for the device status and
+*		register values after the reset.
+*
+******************************************************************************/
+void XSysMonPsu_Reset(XSysMonPsu *InstancePtr)
+{
+	u8 IsPlReset;
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	/* RESET the PS SYSMON */
+	XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress + XPS_BA_OFFSET +
+			XSYSMONPSU_VP_VN_OFFSET, XSYSMONPSU_VP_VN_MASK);
+
+	/* Check for PL is under reset or not */
+	IsPlReset = (XSysmonPsu_ReadReg(CSU_BASEADDR + PCAP_STATUS_OFFSET) &
+						PL_CFG_RESET_MASK) >> PL_CFG_RESET_SHIFT;
+	if (IsPlReset != 0U) {
+		/* RESET the PL SYSMON */
+		XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress + XPL_BA_OFFSET +
+				XSYSMONPSU_VP_VN_OFFSET, XSYSMONPSU_VP_VN_MASK);
+	}
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function reads the contents of the Status Register.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	A 32-bit value representing the contents of the Status Register.
+*		Use the XSYSMONPSU_MON_STS_* constants defined in xsysmonpsu_hw.h to
+*		interpret the returned value.
+*
+* @note		None.
+*****************************************************************************/
+u32 XSysMonPsu_GetStatus(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u32 Status;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Read the Sysmon Status Register and return the value. */
+	Status = XSysmonPsu_ReadReg(EffectiveBaseAddress + XSYSMONPSU_MON_STS_OFFSET);
+
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This function starts the ADC conversion in the Single Channel event driven
+* sampling mode. The EOC bit in Status Register will be set once the conversion
+* is finished. Refer to the device specification for more details.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+*
+* @return	None.
+*
+* @note		The default state of the CONVST bit is a logic 0. The conversion
+*		is started when the CONVST bit is set to 1 from 0.
+*		This bit is self-clearing so that the next conversion
+*		can be started by setting this bit.
+*
+*****************************************************************************/
+void XSysMonPsu_StartAdcConversion(XSysMonPsu *InstancePtr)
+{
+	u32 ControlStatus;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Start the conversion by setting the CONVST bit to 1 only if auto-convst
+	 * bit is not enabled. This convst bit is self-clearing.
+	 */
+	ControlStatus = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+			XSYSMONPSU_PS_SYSMON_CSTS_OFFSET);
+
+	if ((ControlStatus & XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_MASK )
+			!= XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_MASK) {
+		XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress +
+					XSYSMONPSU_PS_SYSMON_CSTS_OFFSET,
+					(ControlStatus | (u32)XSYSMONPSU_PS_SYSMON_CSTS_CONVST_MASK));
+	}
+}
+
+/****************************************************************************/
+/**
+*
+* Get the ADC converted data for the specified channel.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	Channel is the channel number. Use the XSM_CH_* defined in
+*		the file xsysmonpsu.h. The valid channels for PS / PL SysMon are 0 - 6,
+*		8 - 10 and 13 - 37. For AMS, 38 - 53 channels are valid.
+* @param	Block is the value that tells whether it is for PS Sysmon block
+*       or PL Sysmon block or the AMS controller register region.
+*
+* @return	A 16-bit value representing the ADC converted data for the
+*		specified channel. The System Monitor device guarantees
+* 		a 10 bit resolution for the ADC converted data and data is the
+*		10 MSB bits of the 16 data read from the device.
+*
+* @note		Please make sure that the proper channel number is passed.
+*
+*****************************************************************************/
+u16 XSysMonPsu_GetAdcData(XSysMonPsu *InstancePtr, u8 Channel, u32 Block)
+{
+	u16 AdcData;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((Channel <= XSM_CH_SUPPLY3) ||
+			  ((Channel >= XSM_CH_SUPPLY_CALIB) &&
+			  (Channel <= XSM_CH_GAINERR_CALIB)) ||
+			  ((Channel >= XSM_CH_SUPPLY4) &&
+			  (Channel <= XSM_CH_RESERVE1)));
+	Xil_AssertNonvoid((Block == XSYSMON_PS)||(Block == XSYSMON_PL)
+						||(Block == XSYSMON_AMS));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					Block);
+
+	/*
+	 * Read the selected ADC converted data for the specified channel
+	 * and return the value.
+	 */
+	if (Channel <= XSM_CH_AUX_MAX) {
+		AdcData = (u16) (XSysmonPsu_ReadReg(EffectiveBaseAddress + ((u32)Channel << 2U)));
+	} else if ((Channel >= XSM_CH_SUPPLY7) && (Channel <= XSM_CH_TEMP_REMTE)){
+		AdcData = (u16) (XSysmonPsu_ReadReg(EffectiveBaseAddress + XSM_ADC_CH_OFFSET +
+				(((u32)Channel - XSM_CH_SUPPLY7) << 2U)));
+	} else {
+		AdcData = (u16) (XSysmonPsu_ReadReg(EffectiveBaseAddress + XSM_AMS_CH_OFFSET +
+				(((u32)Channel - XSM_CH_VCC_PSLL0) << 2U)));
+	}
+
+	return AdcData;
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the calibration coefficient data for the specified
+* parameter.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	CoeffType specifies the calibration coefficient
+*		to be read. Use XSM_CALIB_* constants defined in xsysmonpsu.h to
+*		specify the calibration coefficient to be read.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	A 16-bit value representing the calibration coefficient.
+*		The System Monitor device guarantees a 10 bit resolution for
+*		the ADC converted data and data is the 10 MSB bits of the 16
+*		data read from the device.
+*
+* @note		None.
+*
+*****************************************************************************/
+u16 XSysMonPsu_GetCalibCoefficient(XSysMonPsu *InstancePtr, u8 CoeffType,
+		u32 SysmonBlk)
+{
+	u16 CalibData;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(CoeffType <= XSM_CALIB_GAIN_ERROR_COEFF);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Read the selected calibration coefficient. */
+	CalibData = (u16) XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_CAL_SUP_OFF_OFFSET + ((u32)CoeffType << 2U));
+
+	return CalibData;
+}
+
+/****************************************************************************/
+/**
+*
+* This function reads the Minimum/Maximum measurement for one of the
+* XSM_MIN_* or XSM_MAX_* constants defined in xsysmonpsu.h
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	MeasurementType specifies the parameter for which the
+*		Minimum/Maximum measurement has to be read.
+*		Use XSM_MAX_* and XSM_MIN_* constants defined in xsysmonpsu.h to
+*		specify the data to be read.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	A 16-bit value representing the maximum/minimum measurement for
+*		specified parameter.
+*		The System Monitor device guarantees a 10 bit resolution for
+*		the ADC converted data and data is the 10 MSB bits of  16 bit
+*		data read from the device.
+*
+*****************************************************************************/
+u16 XSysMonPsu_GetMinMaxMeasurement(XSysMonPsu *InstancePtr, u8 MeasurementType,
+		u32 SysmonBlk)
+{
+	u16 MinMaxData;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((MeasurementType <= XSM_MAX_SUPPLY6) ||
+			((MeasurementType >= XSM_MIN_SUPPLY4) &&
+			(MeasurementType <= XSM_MIN_SUPPLY6)) ||
+			((MeasurementType >= XSM_MAX_SUPPLY7) &&
+			(MeasurementType <= XSM_MAX_TEMP_REMOTE)) ||
+			((MeasurementType >= XSM_MIN_SUPPLY7) &&
+			(MeasurementType <= XSM_MIN_TEMP_REMOTE)));
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Read and return the specified Minimum/Maximum measurement. */
+	MinMaxData = (u16) (XSysmonPsu_ReadReg(EffectiveBaseAddress +
+							XSM_MIN_MAX_CH_OFFSET + ((u32)MeasurementType << 2U)));
+
+	return MinMaxData;
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the number of samples of averaging that is to be done for
+* all the channels in both the single channel mode and sequence mode of
+* operations.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	Average is the number of samples of averaging programmed to the
+*		Configuration Register 0. Use the XSM_AVG_* definitions defined
+*		in xsysmonpsu.h file :
+*		- XSM_AVG_0_SAMPLES for no averaging
+*		- XSM_AVG_16_SAMPLES for 16 samples of averaging
+*		- XSM_AVG_64_SAMPLES for 64 samples of averaging
+*		- XSM_AVG_256_SAMPLES for 256 samples of averaging
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XSysMonPsu_SetAvg(XSysMonPsu *InstancePtr, u8 Average, u32 SysmonBlk)
+{
+	u32 RegValue;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(Average <= XSM_AVG_256_SAMPLES);
+	Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Write the averaging value into the Configuration Register 0. */
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG0_OFFSET)
+						& (u32)(~XSYSMONPSU_CFG_REG0_AVRGNG_MASK);
+	RegValue |= (((u32) Average << XSYSMONPSU_CFG_REG0_AVRGNG_SHIFT));
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG0_OFFSET,
+			 RegValue);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the number of samples of averaging configured for all
+* the channels in the Configuration Register 0.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	The averaging read from the Configuration Register 0 is
+*		returned. Use the XSM_AVG_* bit definitions defined in xsysmonpsu.h
+*		file to interpret the returned value :
+*		- XSM_AVG_0_SAMPLES means no averaging
+*		- XSM_AVG_16_SAMPLES means 16 samples of averaging
+*		- XSM_AVG_64_SAMPLES means 64 samples of averaging
+*		- XSM_AVG_256_SAMPLES means 256 samples of averaging
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 XSysMonPsu_GetAvg(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u32 Average;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Read the averaging value from the Configuration Register 0. */
+	Average = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+				XSYSMONPSU_CFG_REG0_OFFSET) & XSYSMONPSU_CFG_REG0_AVRGNG_MASK;
+
+	return (u8)(Average >> XSYSMONPSU_CFG_REG0_AVRGNG_SHIFT);
+}
+
+/****************************************************************************/
+/**
+*
+* The function sets the given parameters in the Configuration Register 0 in
+* the single channel mode.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	Channel is the channel number for conversion. The valid
+*		channels are 0 - 6, 8 - 10, 13 - 37.
+* @param	IncreaseAcqCycles is a boolean parameter which specifies whether
+*		the Acquisition time for the external channels has to be
+*		increased to 10 ADCCLK cycles (specify TRUE) or remain at the
+*		default 4 ADCCLK cycles (specify FALSE). This parameter is
+*		only valid for the external channels.
+* @param	IsEventMode is a boolean parameter that specifies continuous
+*		sampling (specify FALSE) or event driven sampling mode (specify
+*		TRUE) for the given channel.
+* @param	IsDifferentialMode is a boolean parameter which specifies
+*		unipolar(specify FALSE) or differential mode (specify TRUE) for
+*		the analog inputs. The 	input mode is only valid for the
+*		external channels.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return
+*		- XST_SUCCESS if the given values were written successfully to
+*		the Configuration Register 0.
+*		- XST_FAILURE if the channel sequencer is enabled or the input
+*		parameters are not valid for the selected channel.
+*
+* @note
+*		- The number of samples for the averaging for all the channels
+*		is set by using the function XSysMonPsu_SetAvg.
+*		- The calibration of the device is done by doing a ADC
+*		conversion on the calibration channel(channel 8). The input
+*		parameters IncreaseAcqCycles, IsDifferentialMode and
+*		IsEventMode are not valid for this channel.
+*
+*****************************************************************************/
+s32 XSysMonPsu_SetSingleChParams(XSysMonPsu *InstancePtr, u8 Channel,
+				u32 IncreaseAcqCycles, u32 IsEventMode,
+				u32 IsDifferentialMode, u32 SysmonBlk)
+{
+	u32 RegValue;
+	u32 EffectiveBaseAddress;
+	s32 Status;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((Channel <= XSM_CH_SUPPLY3) ||
+			  ((Channel >= XSM_CH_SUPPLY_CALIB) &&
+			  (Channel <= XSM_CH_GAINERR_CALIB)) ||
+			  ((Channel >= XSM_CH_SUPPLY4) &&
+			  (Channel <= XSM_CH_TEMP_REMTE)) ||
+			  ((Channel >= XSM_CH_VCC_PSLL0) &&
+			  (Channel <= XSM_CH_RESERVE1)));
+	Xil_AssertNonvoid((IncreaseAcqCycles == TRUE) ||
+			  (IncreaseAcqCycles == FALSE));
+	Xil_AssertNonvoid((IsEventMode == TRUE) || (IsEventMode == FALSE));
+	Xil_AssertNonvoid((IsDifferentialMode == TRUE) ||
+			  (IsDifferentialMode == FALSE));
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Check if the device is in single channel mode else return failure */
+	if ((XSysMonPsu_GetSequencerMode(InstancePtr, SysmonBlk)
+				!= XSM_SEQ_MODE_SINGCHAN)) {
+		Status = (s32)XST_FAILURE;
+		goto End;
+	}
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Read the Configuration Register 0 and extract out Averaging value. */
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_CFG_REG0_OFFSET) & XSYSMONPSU_CFG_REG0_AVRGNG_MASK;
+
+	/*
+	 * Select the number of acquisition cycles. The acquisition cycles is
+	 * only valid for the external channels.
+	 */
+	if (IncreaseAcqCycles == TRUE) {
+		if (((Channel >= XSM_CH_AUX_MIN) && (Channel <= XSM_CH_AUX_MAX))
+		    || (Channel == XSM_CH_VPVN)) {
+			RegValue |= XSYSMONPSU_CFG_REG0_ACQ_MASK;
+		} else {
+			Status = (s32)XST_FAILURE;
+			goto End;
+		}
+	}
+
+	/*
+	 * Select the input mode. The input mode is only valid for the
+	 * external channels.
+	 */
+	if (IsDifferentialMode == TRUE) {
+
+		if (((Channel >= XSM_CH_AUX_MIN) && (Channel <= XSM_CH_AUX_MAX))
+		    || (Channel == XSM_CH_VPVN)) {
+			RegValue |= XSYSMONPSU_CFG_REG0_BU_MASK;
+		} else {
+			Status = (s32)XST_FAILURE;
+			goto End;
+		}
+	}
+
+	/* Select the ADC mode. */
+	if (IsEventMode == TRUE) {
+		RegValue |= XSYSMONPSU_CFG_REG0_EC_MASK;
+	}
+
+	/* Write the given values into the Configuration Register 0. */
+	RegValue |= ((u32)Channel & XSYSMONPSU_CFG_REG0_MUX_CH_MASK);
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG0_OFFSET,
+			 RegValue);
+
+	Status = (s32)XST_SUCCESS;
+
+End:
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This function enables the alarm outputs for the specified alarms in the
+* Configuration Registers 1:
+*
+*		- OT for Over Temperature (XSYSMONPSU_CFR_REG1_ALRM_OT_MASK)
+*		- ALM0 for On board Temperature (XSYSMONPSU_CFR_REG1_ALRM_TEMP_MASK)
+*		- ALM1 for SUPPLY1 (XSYSMONPSU_CFR_REG1_ALRM_SUPPLY1_MASK)
+*		- ALM2 for SUPPLY2 (XSYSMONPSU_CFR_REG1_ALRM_SUPPLY2_MASK)
+* 		- ALM3 for SUPPLY3 (XSYSMONPSU_CFR_REG1_ALRM_SUPPLY3_MASK)
+* 		- ALM4 for SUPPLY4 (XSYSMONPSU_CFR_REG1_ALRM__SUPPLY4_MASK)
+*		- ALM5 for SUPPLY5 (XSYSMONPSU_CFR_REG1_ALRM_SUPPLY5_MASK)
+* 		- ALM6 for SUPPLY6 (XSYSMONPSU_CFR_REG1_ALRM_SUPPLY6_MASK)
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	AlmEnableMask is the bit-mask of the alarm outputs to be enabled
+*		in the Configuration Registers 1 and 3.
+*		Bit positions of 1 will be enabled. Bit positions of 0 will be
+*		disabled. This mask is formed by OR'ing XSYSMONPSU_CFR_REG1_ALRM_*_MASK
+*		masks defined in xsysmonpsu.h, but XSM_CFR_ALM_SUPPLY8_MASK to
+*		XSM_CFR_ALM_SUPPLY13_MASK are applicable only for PS.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	None.
+*
+* @note		The implementation of the alarm enables in the Configuration
+*		register 1 is such that the alarms for bit positions of 0 will
+*		be enabled and alarms for bit positions of 1 will be disabled.
+*		The alarm outputs specified by the AlmEnableMask are negated
+*		before writing to the Configuration Register 1 because it
+*		was Disable register bits.
+*		Upper 16 bits of AlmEnableMask are applicable only for PS.
+*
+*****************************************************************************/
+void XSysMonPsu_SetAlarmEnables(XSysMonPsu *InstancePtr, u32 AlmEnableMask,
+		u32 SysmonBlk)
+{
+	u32 RegValue;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(AlmEnableMask <=
+			(XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK |
+			(XSYSMONPSU_CFG_REG3_ALRM_ALL_MASK << XSM_CFG_ALARM_SHIFT)));
+	Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_CFG_REG1_OFFSET);
+	RegValue &= (u32)(~XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK);
+	RegValue |= (~AlmEnableMask & (u32)XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK);
+
+	/*
+	 * Enable/disables the alarm enables for the specified alarm bits in the
+	 * Configuration Register 1.
+	 */
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG1_OFFSET,
+			 RegValue);
+	/* Upper 16 bits of AlmEnableMask are valid only for PS */
+	if (SysmonBlk == XSYSMON_PS) {
+		RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_CFG_REG3_OFFSET);
+		RegValue &= (u32)(~XSYSMONPSU_CFG_REG3_ALRM_ALL_MASK);
+		RegValue |= (~(AlmEnableMask >> XSM_CFG_ALARM_SHIFT) &
+				(u32)XSYSMONPSU_CFG_REG3_ALRM_ALL_MASK);
+		XSysmonPsu_WriteReg(EffectiveBaseAddress +
+			XSYSMONPSU_CFG_REG3_OFFSET, RegValue);
+	}
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the status of the alarm output enables in the
+* Configuration Register 1.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	This is the bit-mask of the enabled alarm outputs in the
+*		Configuration Register 1. Use the masks XSYSMONPSU_CFG_REG1_ALRM_*_MASK
+*		masks defined in xsysmonpsu.h to interpret the returned value.
+*
+*		Bit positions of 1 indicate that the alarm output is enabled.
+*		Bit positions of 0 indicate that the alarm output is disabled.
+*
+*
+* @note		The implementation of the alarm enables in the Configuration
+*		register 1 is such that alarms for the bit positions of 1 will
+*		be disabled and alarms for bit positions of 0 will be enabled.
+*		The enabled alarm outputs returned by this function is the
+*		negated value of the the data read from the Configuration
+*		Register 1. Upper 16 bits of return value are valid only if the
+*		channel selected is PS.
+*
+*****************************************************************************/
+u32 XSysMonPsu_GetAlarmEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u32 RegValue;
+	u32 EffectiveBaseAddress;
+	u32 ReadReg;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Read the status of alarm output enables from the Configuration
+	 * Register 1.
+	 */
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_CFG_REG1_OFFSET) & XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK;
+	RegValue = (~RegValue & XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK);
+
+	if (SysmonBlk == XSYSMON_PS) {
+		ReadReg = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_CFG_REG3_OFFSET) & XSYSMONPSU_CFG_REG3_ALRM_ALL_MASK;
+		ReadReg = (~ReadReg & XSYSMONPSU_CFG_REG3_ALRM_ALL_MASK);
+		RegValue |= ReadReg << XSM_CFG_ALARM_SHIFT;
+	}
+
+	return RegValue;
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the specified Channel Sequencer Mode in the Configuration
+* Register 1 :
+*		- Default safe mode (XSM_SEQ_MODE_SAFE)
+*		- One pass through sequence (XSM_SEQ_MODE_ONEPASS)
+*		- Continuous channel sequencing (XSM_SEQ_MODE_CONTINPASS)
+*		- Single Channel/Sequencer off (XSM_SEQ_MODE_SINGCHAN)
+*		- Olympus sampling mode (XSM_SEQ_MODE_OYLMPUS)
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SequencerMode is the sequencer mode to be set.
+*		Use XSM_SEQ_MODE_* bits defined in xsysmonpsu.h.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	None.
+*
+* @note		Only one of the modes can be enabled at a time.
+*
+*****************************************************************************/
+void XSysMonPsu_SetSequencerMode(XSysMonPsu *InstancePtr, u8 SequencerMode,
+		u32 SysmonBlk)
+{
+	u32 RegValue;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((SequencerMode <= XSM_SEQ_MODE_SINGCHAN) ||
+			(SequencerMode == XSM_SEQ_MODE_OYLMPUS));
+	Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Set the specified sequencer mode in the Configuration Register 1. */
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_CFG_REG1_OFFSET);
+	RegValue &= (u32)(~ XSYSMONPSU_CFG_REG1_SEQ_MDE_MASK);
+	RegValue |= (((u32)SequencerMode  << XSYSMONPSU_CFG_REG1_SEQ_MDE_SHIFT) &
+					XSYSMONPSU_CFG_REG1_SEQ_MDE_MASK);
+	XSysmonPsu_WriteReg(EffectiveBaseAddress +
+					XSYSMONPSU_CFG_REG1_OFFSET, RegValue);
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the channel sequencer mode from the Configuration
+* Register 1.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	The channel sequencer mode :
+*		- XSM_SEQ_MODE_SAFE : Default safe mode
+*		- XSM_SEQ_MODE_ONEPASS : One pass through sequence
+*		- XSM_SEQ_MODE_CONTINPASS : Continuous channel sequencing
+*		- XSM_SEQ_MODE_SINGCHAN : Single channel/Sequencer off
+*		- XSM_SEQ_MODE_OLYMPUS : Olympus sampling mode
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 XSysMonPsu_GetSequencerMode(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u8 SequencerMode;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Read the channel sequencer mode from the Configuration Register 1. */
+	SequencerMode =  ((u8) ((XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_CFG_REG1_OFFSET) & XSYSMONPSU_CFG_REG1_SEQ_MDE_MASK) >>
+			XSYSMONPSU_CFG_REG1_SEQ_MDE_SHIFT));
+
+	return SequencerMode;
+}
+
+/****************************************************************************/
+/**
+*
+* The function enables the Event mode or Continuous mode in the sequencer mode.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	IsEventMode is a boolean parameter that specifies continuous
+*		sampling (specify FALSE) or event driven sampling mode (specify
+*		TRUE) for the channel.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XSysMonPsu_SetSequencerEvent(XSysMonPsu *InstancePtr, u32 IsEventMode,
+		u32 SysmonBlk)
+{
+	u32 RegValue;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((IsEventMode == TRUE) || (IsEventMode == FALSE));
+	Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Read the Configuration Register 0. */
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_CFG_REG0_OFFSET);
+
+	/* Set the ADC mode. */
+	if (IsEventMode == TRUE) {
+		RegValue |= XSYSMONPSU_CFG_REG0_EC_MASK;
+	} else {
+		RegValue &= (u32)(~XSYSMONPSU_CFG_REG0_EC_MASK);
+	}
+
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG0_OFFSET,
+			 RegValue);
+}
+
+/****************************************************************************/
+/**
+*
+* The function returns the mode of the sequencer.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	Returns the Sequencer mode. XSYSMONPSU_EVENT_MODE for Event mode
+* 		and XSYSMONPSU_CONTINUOUS_MODE for continuous mode.
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XSysMonPsu_GetSequencerEvent(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	s32 Mode;
+	u32 RegValue;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Read the Configuration Register 0. */
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_CFG_REG0_OFFSET);
+
+	RegValue &= XSYSMONPSU_CFG_REG0_EC_MASK;
+
+	if (RegValue == XSYSMONPSU_CFG_REG0_EC_MASK) {
+		Mode = XSYSMONPSU_EVENT_MODE;
+	} else {
+		Mode = XSYSMONPSU_CONTINUOUS_MODE;
+	}
+
+	return Mode;
+}
+
+/****************************************************************************/
+/**
+*
+* The function enables the external mux and connects a channel to the mux.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	Channel is the channel number used to connect to the external
+*		Mux. The valid channels are 0 to 5 and 16 to 31.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return
+*		- XST_SUCCESS if the given values were written successfully to
+*		the Configuration Register 0.
+*		- XST_FAILURE if the channel sequencer is enabled or the input
+*		parameters are not valid for the selected channel.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XSysMonPsu_SetExtenalMux(XSysMonPsu *InstancePtr, u8 Channel, u32 SysmonBlk)
+{
+	u32 RegValue;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((Channel <= XSM_CH_VREFN) ||
+			  ((Channel >= XSM_CH_AUX_MIN) &&
+			  (Channel <= XSM_CH_AUX_MAX)));
+	Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Read the Configuration Register 0 and the clear the channel selection
+	 * bits.
+	 */
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_CFG_REG0_OFFSET);
+	RegValue &= ~(XSYSMONPSU_CFG_REG0_MUX_CH_MASK);
+
+	/* Enable the External Mux and select the channel. */
+	RegValue |= (XSYSMONPSU_CFG_REG0_XTRNL_MUX_MASK | (u32)Channel);
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG0_OFFSET,
+			 RegValue);
+}
+
+/****************************************************************************/
+/**
+*
+* The function returns the external mux channel.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	Returns the channel number used to connect to the external
+*		Mux. The valid channels are 0 to 6, 8 to 16, and 31 to 36..
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XSysMonPsu_GetExtenalMux(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u32 RegValue;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Read the Configuration Register 0 and derive the channel selection
+	 * bits.
+	 */
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_CFG_REG0_OFFSET);
+	RegValue &= XSYSMONPSU_CFG_REG0_MUX_CH_MASK;
+
+	return RegValue;
+}
+
+/****************************************************************************/
+/**
+*
+* The function sets the frequency of the ADCCLK by configuring the DCLK to
+* ADCCLK ratio in the Configuration Register #2.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	Divisor is clock divisor used to derive ADCCLK from DCLK.
+*		Valid values of the divisor are
+*		PS:
+*		 - 0 means divide by 8.
+*		 - 1,2 means divide by 2.
+*		 - 3 to 255 means divide by that value.
+*       PL:
+*		 - 0,1,2 means divide by 2.
+*		 - 3 to 255 means divide by that value.
+*		Refer to the device specification for more details.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	None.
+*
+* @note		- The ADCCLK is an internal clock used by the ADC and is
+*		synchronized to the DCLK clock. The ADCCLK is equal to DCLK
+*		divided by the user selection in the Configuration Register 2.
+*		- There is no Assert on the minimum value of the Divisor.
+*
+*****************************************************************************/
+void XSysMonPsu_SetAdcClkDivisor(XSysMonPsu *InstancePtr, u8 Divisor,
+            u32 SysmonBlk)
+{
+	u32 RegValue;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Read the Configuration Register 2 and the clear the clock divisor
+	 * bits.
+	 */
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_CFG_REG2_OFFSET);
+	RegValue &= ~(XSYSMONPSU_CFG_REG2_CLK_DVDR_MASK);
+
+	/* Write the divisor value into the Configuration Register 2. */
+	RegValue |= ((u32)Divisor << XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT) &
+					XSYSMONPSU_CFG_REG2_CLK_DVDR_MASK;
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG2_OFFSET,
+			 RegValue);
+
+}
+
+/****************************************************************************/
+/**
+*
+* The function gets the ADCCLK divisor from the Configuration Register 2.
+*
+* @param	InstancePtr is a pointer to the XSysMon instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	The divisor read from the Configuration Register 2.
+*
+* @note		The ADCCLK is an internal clock used by the ADC and is
+*		synchronized to the DCLK clock. The ADCCLK is equal to DCLK
+*		divided by the user selection in the Configuration Register 2.
+*
+*****************************************************************************/
+u8 XSysMonPsu_GetAdcClkDivisor(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u16 Divisor;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Read the divisor value from the Configuration Register 2. */
+	Divisor = (u16) XSysmonPsu_ReadReg(EffectiveBaseAddress +
+							XSYSMONPSU_CFG_REG2_OFFSET);
+
+	return (u8) (Divisor >> XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT);
+}
+
+u8 XSysMonPsu_UpdateAdcClkDivisor(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u16 Divisor;
+	u32 EffectiveBaseAddress;
+	u32 RegValue;
+	u32 InputFreq = InstancePtr->Config.InputClockMHz;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Read the divisor value from the Configuration Register 2. */
+	Divisor = (u16) XSysmonPsu_ReadReg(EffectiveBaseAddress +
+							XSYSMONPSU_CFG_REG2_OFFSET);
+	Divisor = Divisor >> XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT;
+
+	while (1) {
+		if (!Divisor) {
+			if ((SysmonBlk == XSYSMON_PS) &&
+			(InputFreq/8 >= 1) && (InputFreq/8 <= 26)) {
+				break;
+			} else if ((SysmonBlk == XSYSMON_PL) &&
+			(InputFreq/2 >= 1) && (InputFreq/2 <= 26)) {
+				break;
+			}
+		} else if ((InputFreq/Divisor >= 1) &&
+				(InputFreq/Divisor <= 26)) {
+			break;
+		} else {
+			Divisor += 1;
+		}
+	}
+
+	/*
+	 * Read the Configuration Register 2 and the clear the clock divisor
+	 * bits.
+	 */
+	RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_CFG_REG2_OFFSET);
+	RegValue &= ~(XSYSMONPSU_CFG_REG2_CLK_DVDR_MASK);
+
+	/* Write the divisor value into the Configuration Register 2. */
+	RegValue |= ((u32)Divisor << XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT) &
+					XSYSMONPSU_CFG_REG2_CLK_DVDR_MASK;
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG2_OFFSET,
+			 RegValue);
+
+	return (u8)Divisor;
+}
+/****************************************************************************/
+/**
+*
+* This function enables the specified channels in the ADC Channel Selection
+* Sequencer Registers. The sequencer must be in the Safe Mode before writing
+* to these registers.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	ChEnableMask is the bit mask of all the channels to be enabled.
+*		Use XSYSMONPSU_SEQ_CH* defined in xsysmon_hw.h to specify the Channel
+*		numbers. Bit masks of 1 will be enabled and bit mask of 0 will
+*		be disabled.
+*		The ChEnableMask is a 64 bit mask that is written to the three
+*		16 bit ADC Channel Selection Sequencer Registers.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return
+*		- XST_SUCCESS if the given values were written successfully to
+*		the ADC Channel Selection Sequencer Registers.
+*		- XST_FAILURE if the channel sequencer is enabled.
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XSysMonPsu_SetSeqChEnables(XSysMonPsu *InstancePtr, u64 ChEnableMask,
+		u32 SysmonBlk)
+{
+	s32 Status;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/*
+	 * The sequencer must be in the Default Safe Mode before writing
+	 * to these registers. Return XST_FAILURE if the channel sequencer
+	 * is enabled.
+	 */
+	if ((XSysMonPsu_GetSequencerMode(InstancePtr,SysmonBlk) != XSM_SEQ_MODE_SAFE)) {
+		Status = (s32)XST_FAILURE;
+		goto End;
+	}
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Enable the specified channels in the ADC Channel Selection Sequencer
+	 * Registers.
+	 */
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_SEQ_CH0_OFFSET,
+			 (ChEnableMask & XSYSMONPSU_SEQ_CH0_VALID_MASK));
+
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_SEQ_CH1_OFFSET,
+			 (ChEnableMask >> XSM_SEQ_CH_SHIFT) &
+			 XSYSMONPSU_SEQ_CH1_VALID_MASK);
+
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_SEQ_CH2_OFFSET,
+				 (ChEnableMask >> XSM_SEQ_CH2_SHIFT) &
+			 XSYSMONPSU_SEQ_CH2_VALID_MASK);
+
+	Status = (s32)XST_SUCCESS;
+
+End:
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the channel enable bits status from the ADC Channel
+* Selection Sequencer Registers.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	Gets the channel enable bits. Use XSYSMONPSU_SEQ_CH* defined in
+*		xsysmonpsu_hw.h to interpret the Channel numbers. Bit masks of 1
+*		are the channels that are enabled and bit mask of 0 are
+*		the channels that are disabled.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+u64 XSysMonPsu_GetSeqChEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u64 RegVal;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Read the channel enable bits for all the channels from the ADC
+	 * Channel Selection Register.
+	 */
+	RegVal = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_CH0_OFFSET) & XSYSMONPSU_SEQ_CH0_VALID_MASK;
+	RegVal |= (XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_CH1_OFFSET) & XSYSMONPSU_SEQ_CH1_VALID_MASK) <<
+					XSM_SEQ_CH_SHIFT;
+	RegVal |= (u64)(XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_CH2_OFFSET) &
+			XSYSMONPSU_SEQ_CH2_VALID_MASK) << XSM_SEQ_CH2_SHIFT;
+
+	return RegVal;
+}
+
+/****************************************************************************/
+/**
+*
+* This function enables the averaging for the specified channels in the ADC
+* Channel Averaging Enable Sequencer Registers. The sequencer must be in
+* the Safe Mode before writing to these registers.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	AvgEnableChMask is the bit mask of all the channels for which
+*		averaging is to be enabled. Use XSYSMONPSU_SEQ_AVERAGE* defined in
+*		xsysmonpsu_hw.h to specify the Channel numbers. Averaging will be
+*		enabled for bit masks of 1 and disabled for bit mask of 0.
+*		The AvgEnableChMask is a 64 bit mask that is written to the
+*		three 16 bit ADC Channel Averaging Enable Sequencer Registers.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return
+*		- XST_SUCCESS if the given values were written successfully to
+*		the ADC Channel Averaging Enables Sequencer Registers.
+*		- XST_FAILURE if the channel sequencer is enabled.
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XSysMonPsu_SetSeqAvgEnables(XSysMonPsu *InstancePtr, u64 AvgEnableChMask,
+		u32 SysmonBlk)
+{
+	s32 Status;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/*
+	 * The sequencer must be disabled for writing any of these registers.
+	 * Return XST_FAILURE if the channel sequencer is enabled.
+	 */
+	if ((XSysMonPsu_GetSequencerMode(InstancePtr,SysmonBlk)
+	                                     != XSM_SEQ_MODE_SAFE)) {
+		Status = (s32)XST_FAILURE;
+	} else {
+		/* Calculate the effective baseaddress based on the Sysmon instance. */
+		EffectiveBaseAddress =
+				XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+						SysmonBlk);
+		/*
+		 * Enable/disable the averaging for the specified channels in the
+		 * ADC Channel Averaging Enables Sequencer Registers.
+		 */
+		XSysmonPsu_WriteReg(EffectiveBaseAddress +
+				XSYSMONPSU_SEQ_AVERAGE0_OFFSET,
+				(AvgEnableChMask & XSYSMONPSU_SEQ_AVERAGE0_MASK));
+
+		XSysmonPsu_WriteReg(EffectiveBaseAddress +
+				XSYSMONPSU_SEQ_AVERAGE1_OFFSET,
+				 (AvgEnableChMask >> XSM_SEQ_CH_SHIFT) &
+				 XSYSMONPSU_SEQ_AVERAGE1_MASK);
+
+		XSysmonPsu_WriteReg(EffectiveBaseAddress +
+				XSYSMONPSU_SEQ_AVERAGE2_OFFSET,
+				 (AvgEnableChMask >> XSM_SEQ_CH2_SHIFT) &
+				 XSYSMONPSU_SEQ_AVERAGE2_MASK);
+
+		Status = (s32)XST_SUCCESS;
+	}
+
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the channels for which the averaging has been enabled
+* in the ADC Channel Averaging Enables Sequencer Registers.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @returns 	The status of averaging (enabled/disabled) for all the channels.
+*		Use XSYSMONPSU_SEQ_AVERAGE* defined in xsysmonpsu_hw.h to interpret the
+*		Channel numbers. Bit masks of 1 are the channels for which
+*		averaging is enabled and bit mask of 0 are the channels for
+*		averaging is disabled.
+*
+* @note		None.
+*
+*****************************************************************************/
+u64 XSysMonPsu_GetSeqAvgEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u64 RegVal;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Read the averaging enable status for all the channels from the
+	 * ADC Channel Averaging Enables Sequencer Registers.
+	 */
+	RegVal = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_AVERAGE0_OFFSET) & XSYSMONPSU_SEQ_AVERAGE0_MASK;
+	RegVal |= (XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_AVERAGE1_OFFSET) & XSYSMONPSU_SEQ_AVERAGE1_MASK) <<
+			XSM_SEQ_CH_SHIFT;
+	RegVal |= (u64)(XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_AVERAGE2_OFFSET) &
+			XSYSMONPSU_SEQ_AVERAGE2_MASK) << XSM_SEQ_CH2_SHIFT;
+
+	return RegVal;
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the Analog input mode for the specified channels in the
+* ADC Channel Analog-Input Mode Sequencer Registers. The sequencer must be in
+* the Safe Mode before writing to these registers.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	InputModeChMask is the bit mask of all the channels for which
+*		the input mode is differential mode. Use XSYSMONPSU_SEQ_INPUT_MDE*
+*		defined in xsysmonpsu_hw.h to specify the channel numbers. Differential
+*		or  Bipolar input mode will be set for bit masks of 1 and unipolar input
+*		mode for bit masks of 0.
+*		The InputModeChMask is a 64 bit mask that is written to the three
+*		16 bit ADC Channel Analog-Input Mode Sequencer Registers.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return
+*		- XST_SUCCESS if the given values were written successfully to
+*		the ADC Channel Analog-Input Mode Sequencer Registers.
+*		- XST_FAILURE if the channel sequencer is enabled.
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XSysMonPsu_SetSeqInputMode(XSysMonPsu *InstancePtr, u64 InputModeChMask,
+		u32 SysmonBlk)
+{
+	s32 Status;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/*
+	 * The sequencer must be in the Safe Mode before writing to
+	 * these registers. Return XST_FAILURE if the channel sequencer
+	 * is enabled.
+	 */
+	if ((XSysMonPsu_GetSequencerMode(InstancePtr,SysmonBlk)
+	                                      != XSM_SEQ_MODE_SAFE)) {
+		Status = (s32)XST_FAILURE;
+		goto End;
+	}
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Set the input mode for the specified channels in the ADC Channel
+	 * Analog-Input Mode Sequencer Registers.
+	 */
+	XSysmonPsu_WriteReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET,
+			 (InputModeChMask & XSYSMONPSU_SEQ_INPUT_MDE0_MASK));
+
+	XSysmonPsu_WriteReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET,
+			 (InputModeChMask >> XSM_SEQ_CH_SHIFT) &
+			 XSYSMONPSU_SEQ_INPUT_MDE1_MASK);
+
+	XSysmonPsu_WriteReg(EffectiveBaseAddress +
+		XSYSMONPSU_SEQ_INPUT_MDE2_OFFSET,
+		 (InputModeChMask >> XSM_SEQ_CH2_SHIFT) &
+		 XSYSMONPSU_SEQ_INPUT_MDE2_MASK);
+
+	Status = (s32)XST_SUCCESS;
+
+End:
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the Analog input mode for all the channels from
+* the ADC Channel Analog-Input Mode Sequencer Registers.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @returns 	The input mode for all the channels.
+*		Use XSYSMONPSU_SEQ_INPUT_MDE* defined in xsysmonpsu_hw.h to interpret the
+*		Channel numbers. Bit masks of 1 are the channels for which
+*		input mode is differential/Bipolar and bit mask of 0 are the channels
+*		for which input mode is unipolar.
+*
+* @note		None.
+*
+*****************************************************************************/
+u64 XSysMonPsu_GetSeqInputMode(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u64 InputMode;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 *  Get the input mode for all the channels from the ADC Channel
+	 * Analog-Input Mode Sequencer Registers.
+	 */
+	InputMode = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET) & XSYSMONPSU_SEQ_INPUT_MDE0_MASK;
+	InputMode |= (XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET) & XSYSMONPSU_SEQ_INPUT_MDE1_MASK) <<
+				XSM_SEQ_CH_SHIFT;
+	InputMode |= (u64)(XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_INPUT_MDE2_OFFSET) &
+			XSYSMONPSU_SEQ_INPUT_MDE2_MASK) << XSM_SEQ_CH2_SHIFT;
+
+	return InputMode;
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the number of Acquisition cycles in the ADC Channel
+* Acquisition Time Sequencer Registers. The sequencer must be in the Safe Mode
+* before writing to these registers.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	AcqCyclesChMask is the bit mask of all the channels for which
+*		the number of acquisition cycles is to be extended.
+*		Use XSYSMONPSU_SEQ_ACQ* defined in xsysmonpsu_hw.h to specify the Channel
+*		numbers. Acquisition cycles will be extended to 10 ADCCLK cycles
+*		for bit masks of 1 and will be the default 4 ADCCLK cycles for
+*		bit masks of 0.
+*		The AcqCyclesChMask is a 64 bit mask that is written to the three
+*		16 bit ADC Channel Acquisition Time Sequencer Registers.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return
+*		- XST_SUCCESS if the given values were written successfully to
+*		the Channel Sequencer Registers.
+*		- XST_FAILURE if the channel sequencer is enabled.
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XSysMonPsu_SetSeqAcqTime(XSysMonPsu *InstancePtr, u64 AcqCyclesChMask,
+		u32 SysmonBlk)
+{
+	s32 Status;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/*
+	 * The sequencer must be in the Safe Mode before writing
+	 * to these registers. Return XST_FAILURE if the channel
+	 * sequencer is enabled.
+	 */
+	if ((XSysMonPsu_GetSequencerMode(InstancePtr,SysmonBlk)
+	                                     != XSM_SEQ_MODE_SAFE)) {
+		Status = (s32)XST_FAILURE;
+		goto End;
+	}
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Set the Acquisition time for the specified channels in the
+	 * ADC Channel Acquisition Time Sequencer Registers.
+	 */
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_SEQ_ACQ0_OFFSET,
+			 (AcqCyclesChMask & XSYSMONPSU_SEQ_ACQ0_MASK));
+
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_SEQ_ACQ1_OFFSET,
+			 (AcqCyclesChMask >> XSM_SEQ_CH_SHIFT) & XSYSMONPSU_SEQ_ACQ1_MASK);
+
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_SEQ_ACQ2_OFFSET,
+			(AcqCyclesChMask >> XSM_SEQ_CH2_SHIFT) &
+					XSYSMONPSU_SEQ_ACQ2_MASK);
+
+	Status = (s32)XST_SUCCESS;
+
+End:
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the status of acquisition time from the ADC Channel Acquisition
+* Time Sequencer Registers.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @returns 	The acquisition time for all the channels.
+*		Use XSYSMONPSU_SEQ_ACQ* defined in xsysmonpsu_hw.h to interpret the
+*		Channel numbers. Bit masks of 1 are the channels for which
+*		acquisition cycles are extended and bit mask of 0 are the
+*		channels for which acquisition cycles are not extended.
+*
+* @note		None.
+*
+*****************************************************************************/
+u64 XSysMonPsu_GetSeqAcqTime(XSysMonPsu *InstancePtr, u32 SysmonBlk)
+{
+	u64 RegValAcq;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Get the Acquisition cycles for the specified channels from the ADC
+	 * Channel Acquisition Time Sequencer Registers.
+	 */
+	RegValAcq = XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_SEQ_ACQ0_OFFSET) & XSYSMONPSU_SEQ_ACQ0_MASK;
+	RegValAcq |= (XSysmonPsu_ReadReg(EffectiveBaseAddress +
+					XSYSMONPSU_SEQ_ACQ1_OFFSET) & XSYSMONPSU_SEQ_ACQ1_MASK) <<
+					XSM_SEQ_CH_SHIFT;
+	RegValAcq |= (u64)(XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_SEQ_ACQ2_OFFSET) &
+			XSYSMONPSU_SEQ_ACQ2_MASK) << XSM_SEQ_CH2_SHIFT;
+
+	return RegValAcq;
+}
+
+/****************************************************************************/
+/**
+*
+* This functions sets the contents of the given Alarm Threshold Register.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	AlarmThrReg is the index of an Alarm Threshold Register to
+*		be set. Use XSM_ATR_* constants defined in xsysmonpsu.h to
+*		specify the index.
+* @param	Value is the 16-bit threshold value to write into the register.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XSysMonPsu_SetAlarmThreshold(XSysMonPsu *InstancePtr, u8 AlarmThrReg,
+		u16 Value, u32 SysmonBlk)
+{
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((AlarmThrReg <= XSM_ATR_TEMP_RMTE_UPPER) ||
+			((AlarmThrReg >= XSM_ATR_SUP7_LOWER) &&
+			(AlarmThrReg <= XSM_ATR_TEMP_RMTE_LOWER)));
+	Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/* Write the value into the specified Alarm Threshold Register. */
+	XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_ALRM_TEMP_UPR_OFFSET +
+			((u32)AlarmThrReg << 2U), Value);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the contents of the specified Alarm Threshold Register.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	AlarmThrReg is the index of an Alarm Threshold Register
+*		to be read. Use XSM_ATR_* constants defined in xsysmonpsu.h
+*		to specify the index.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
+*       block or PL Sysmon block register region.
+*
+* @return	A 16-bit value representing the contents of the selected Alarm
+*		Threshold Register.
+*
+* @note		None.
+*
+*****************************************************************************/
+u16 XSysMonPsu_GetAlarmThreshold(XSysMonPsu *InstancePtr, u8 AlarmThrReg,
+		u32 SysmonBlk)
+{
+	u16 AlarmThreshold;
+	u32 EffectiveBaseAddress;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((AlarmThrReg <= XSM_ATR_TEMP_RMTE_UPPER) ||
+			((AlarmThrReg >= XSM_ATR_SUP7_LOWER) &&
+			(AlarmThrReg <= XSM_ATR_TEMP_RMTE_LOWER)));
+	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
+
+	/* Calculate the effective baseaddress based on the Sysmon instance. */
+	EffectiveBaseAddress =
+			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
+					SysmonBlk);
+
+	/*
+	 * Read the specified Alarm Threshold Register and return
+	 * the value.
+	 */
+	AlarmThreshold = (u16) XSysmonPsu_ReadReg(EffectiveBaseAddress +
+			XSYSMONPSU_ALRM_TEMP_UPR_OFFSET + ((u32)AlarmThrReg << 2));
+
+	return AlarmThreshold;
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the conversion to be automatic for PS SysMon.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+*
+* @return	None
+*
+* @note		In the auto-trigger mode, sample rate is of 1 Million samples.
+*
+*****************************************************************************/
+void XSysMonPsu_SetPSAutoConversion(XSysMonPsu *InstancePtr)
+{
+	u32 PSSysMonStatusReg;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Set the automatic conversion triggering in PS control register. */
+	PSSysMonStatusReg = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+			XSYSMONPSU_PS_SYSMON_CSTS_OFFSET);
+	PSSysMonStatusReg |= XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_MASK;
+	XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress +
+			XSYSMONPSU_PS_SYSMON_CSTS_OFFSET, PSSysMonStatusReg);
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the AMS monitor status.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+*
+* @return	Returns the monitor status. See XSYSMONPSU_MON_STS_*_MASK
+* 		definations present in xsysmonpsu_hw.h for knowing the status.
+*
+* @note		None
+* .
+*****************************************************************************/
+u32 XSysMonPsu_GetMonitorStatus(XSysMonPsu *InstancePtr)
+{
+	u32 AMSMonStatusReg;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read the AMS monitor status. This gives tells about JTAG Locked / ADC
+	 * busy / ADC Current Channel number and its ADC output.
+	 */
+	AMSMonStatusReg = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+			XSYSMONPSU_MON_STS_OFFSET);
+
+	return AMSMonStatusReg;
+}
+
+/** @} */
diff --git a/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu.h b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu.h
new file mode 100644
index 0000000..8fcaa19
--- /dev/null
+++ b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu.h
@@ -0,0 +1,677 @@
+/******************************************************************************
+*
+* Copyright (C) 2016-2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xsysmonpsu.h
+*
+* The XSysMon driver supports the Xilinx System Monitor device.
+*
+* The System Monitor device has the following features:
+*	- PL Sysmon instance has 10-bit, 200-KSPS (kilo samples per second)
+*		Analog-to-Digital Converter (ADC)
+*	- PS Sysmon instance has 10-bit, 1000-KSPS ADC.
+*	- Monitoring of on-chip supply voltages and temperature
+*	- 1 dedicated differential analog-input pair and
+*	  16 auxiliary differential analog-input pairs
+*	- Automatic alarms based on user defined limits for the on-chip
+*	  supply voltages and temperature
+*	- Automatic Channel Sequencer, programmable averaging, programmable
+*	  acquisition time for the external inputs, unipolar or differential
+*	  input selection for the external inputs
+*	- Inbuilt Calibration
+*	- Optional interrupt request generation
+*	- External Mux
+*
+*
+* The user should refer to the hardware device specification for detailed
+* information about the device.
+*
+* This header file contains the prototypes of driver functions that can
+* be used to access the System Monitor device.
+*
+*
+*  System Monitor Channel Sequencer Modes 
+*
+* The  System Monitor Channel Sequencer supports the following operating modes:
+*
+*   -  Default : This is the default mode after power up.
+*		In this mode of operation the System Monitor operates in
+*		a sequence mode, monitoring the on chip sensors:
+*		Temperature, VCCINT, and VCCAUX.
+*   -  One pass through sequence : In this mode the System Monitor
+*		converts the channels enabled in the Sequencer Channel Enable
+*		registers for a single pass and then stops.
+*   -  Continuous cycling of sequence : In this mode the System Monitor
+*		converts the channels enabled in the Sequencer Channel Enable
+*		registers continuously.
+*   -  Single channel mode: In this mode the System Monitor Channel
+*		Sequencer is disabled and the System Monitor operates in a
+*		Single Channel Mode.
+*		The System Monitor can operate either in a Continuous or Event
+*		driven sampling mode in the single channel mode.
+*
+*
+*  Initialization and Configuration 
+*
+* The device driver enables higher layer software (e.g., an application) to
+* communicate to the System Monitor device.
+*
+* XSysMonPsu_CfgInitialize() API is used to initialize the System Monitor
+* device. The user needs to first call the XSysMonPsu_LookupConfig() API which
+* returns the Configuration structure pointer which is passed as a parameter to
+* the XSysMonPsu_CfgInitialize() API.
+*
+*
+* Interrupts
+*
+* The System Monitor device supports interrupt driven mode and the default
+* operation mode is polling mode.
+*
+* This driver does not provide a Interrupt Service Routine (ISR) for the device.
+* It is the responsibility of the application to provide one if needed. Refer to
+* the interrupt example provided with this driver for details on using the
+* device in interrupt mode.
+*
+*
+*  Virtual Memory 
+*
+* This driver supports Virtual Memory. The RTOS is responsible for calculating
+* the correct device base address in Virtual Memory space.
+*
+*
+*  Threads 
+*
+* This driver is not thread safe. Any needs for threads or thread mutual
+* exclusion must be satisfied by the layer above this driver.
+*
+*
+*  Asserts 
+*
+* Asserts are used within all Xilinx drivers to enforce constraints on argument
+* values. Asserts can be turned off on a system-wide basis by defining, at
+* compile time, the NDEBUG identifier. By default, asserts are turned on and it
+* is recommended that users leave asserts on during development.
+*
+*
+*  Building the driver 
+*
+* The XSysMonPsu driver is composed of several source files. This allows the user
+* to build and link only those parts of the driver that are necessary.
+*
+*
+*  Limitations of the driver 
+*
+* System Monitor device can be accessed through the JTAG port and the AXI
+* interface. The driver implementation does not support the simultaneous access
+* of the device by both these interfaces. The user has to take care of this
+* situation in the user application code.
+*
+*
+*
+* 


+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.00  kvn    12/15/15 First release
+*              02/15/16 Corrected Assert function call in
+*                       XSysMonPsu_GetMonitorStatus API.
+*              03/03/16 Added Temperature remote channel for Setsingle
+*                       channel API. Also corrected external mux channel
+*                       numbers.
+* 1.1   kvn    05/05/16 Modified code for MISRA-C:2012 Compliance.
+* 2.0   vns    08/14/16 Fixed CR #956780, added support for enabling/disabling
+*                       SEQ_CH2 and SEQ_AVG2 registers, modified function
+*                       prototypes of XSysMonPsu_GetSeqAvgEnables,
+*                       XSysMonPsu_SetSeqAvgEnables, XSysMonPsu_SetSeqChEnables,
+*                       XSysMonPsu_GetSeqChEnables,
+*                       XSysMonPsu_SetSeqInputMode, XSysMonPsu_GetSeqInputMode,
+*                       XSysMonPsu_SetSeqAcqTime
+*                       and XSysMonPsu_GetSeqAcqTime to provide support for
+*                       set/get 64 bit value.
+*                       Added constants XSM_CFR_ALM_SUPPLY*(8-31)_MASKs to
+*                       provide support for enabling extra PS alarams.
+* 2.1   sk     03/03/16 Check for PL reset before doing PL Sysmon reset.
+*       ms     03/17/17 Added readme.txt file in examples folder for doxygen
+*                       generation.
+*       ms     04/05/17 Modified Comment lines in functions of sysmonpsu
+*                       examples to recognize it as documentation block
+*                       for doxygen generation.
+* 2.2   sk     04/14/17 Corrected temperature conversion formulas.
+* 2.3   mn     12/11/17 Added missing closing bracket error when C++ is used
+*       mn     12/12/17 Added Conversion Support for voltages having Range of
+*                       1 Volt
+*       mn     12/13/17 Correct the AMS block channel numbers
+*       ms     12/15/17 Added peripheral test support.
+*       ms     01/04/18 Provided conditional checks for interrupt example
+*                       in sysmonpsu_header.h
+*       mn     03/08/18 Update Clock Divisor to the proper value
+*
+* 

+*
+******************************************************************************/
+
+
+#ifndef XSYSMONPSU_H_			/* prevent circular inclusions */
+#define XSYSMONPSU_H_			/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xsysmonpsu_hw.h"
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+/**
+ * @name Indexes for the different channels.
+ * @{
+ */
+#define XSM_CH_TEMP 		0x0U  /**< On Chip Temperature */
+#define XSM_CH_SUPPLY1		0x1U  /**< SUPPLY1 VCC_PSINTLP */
+#define XSM_CH_SUPPLY2		0x2U  /**< SUPPLY2 VCC_PSINTFP */
+#define XSM_CH_VPVN 		0x3U  /**< VP/VN Dedicated analog inputs */
+#define XSM_CH_VREFP		0x4U  /**< VREFP */
+#define XSM_CH_VREFN		0x5U  /**< VREFN */
+#define XSM_CH_SUPPLY3		0x6U  /**< SUPPLY3 VCC_PSAUX */
+#define XSM_CH_SUPPLY_CALIB	0x08U /**< Supply Calib Data Reg */
+#define XSM_CH_ADC_CALIB	0x09U /**< ADC Offset Channel Reg */
+#define XSM_CH_GAINERR_CALIB 	0x0AU /**< Gain Error Channel Reg  */
+#define XSM_CH_SUPPLY4		0x0DU /**< SUPPLY4 VCC_PSDDR_504 */
+#define XSM_CH_SUPPLY5		0x0EU /**< SUPPLY5 VCC_PSIO3_503 */
+#define XSM_CH_SUPPLY6		0x0FU /**< SUPPLY6 VCC_PSIO0_500 */
+#define XSM_CH_AUX_MIN		16U   /**< Channel number for 1st Aux Channel */
+#define XSM_CH_AUX_MAX		31U   /**< Channel number for Last Aux channel */
+#define XSM_CH_SUPPLY7      32U   /**< SUPPLY7 VCC_PSIO1_501 */
+#define XSM_CH_SUPPLY8      33U   /**< SUPPLY8 VCC_PSIO2_502 */
+#define XSM_CH_SUPPLY9      34U   /**< SUPPLY9 PS_MGTRAVCC */
+#define XSM_CH_SUPPLY10     35U   /**< SUPPLY10 PS_MGTRAVTT */
+#define XSM_CH_VCCAMS       36U   /**< VCCAMS */
+#define XSM_CH_TEMP_REMTE   37U   /**< Temperature Remote */
+#define XSM_CH_VCC_PSLL0    48U   /**< VCC_PSLL0 */
+#define XSM_CH_VCC_PSLL3    51U   /**< VCC_PSLL3 */
+#define XSM_CH_VCCINT       54U   /**< VCCINT */
+#define XSM_CH_VCCBRAM      55U   /**< VCCBRAM */
+#define XSM_CH_VCCAUX       56U   /**< VCCAUX */
+#define XSM_CH_VCC_PSDDRPLL 57U   /**< VCC_PSDDRPLL */
+#define XSM_CH_DDRPHY_VREF  58U   /**< DDRPHY_VREF */
+#define XSM_CH_RESERVE1     63U   /**< PSGT_AT0 */
+
+/*@}*/
+
+/**
+ * @name Indexes for reading the Calibration Coefficient Data.
+ * @{
+ */
+#define XSM_CALIB_SUPPLY_OFFSET_COEFF 0U /**< Supply Offset Calib Coefficient */
+#define XSM_CALIB_ADC_OFFSET_COEFF    1U /**< ADC Offset Calib Coefficient */
+#define XSM_CALIB_GAIN_ERROR_COEFF    2U /**< Gain Error Calib Coefficient*/
+
+/*@}*/
+
+/**
+ * @name Indexes for reading the Minimum/Maximum Measurement Data.
+ * @{
+ */
+#define XSM_MAX_TEMP		0U    /**< Maximum Temperature Data */
+#define XSM_MAX_SUPPLY1		1U    /**< Maximum SUPPLY1 Data */
+#define XSM_MAX_SUPPLY2		2U    /**< Maximum SUPPLY2 Data */
+#define XSM_MAX_SUPPLY3		3U    /**< Maximum SUPPLY3 Data */
+#define XSM_MIN_TEMP		4U    /**< Minimum Temperature Data */
+#define XSM_MIN_SUPPLY1		5U    /**< Minimum SUPPLY1 Data */
+#define XSM_MIN_SUPPLY2     6U    /**< Minimum SUPPLY2 Data */
+#define XSM_MIN_SUPPLY3     7U    /**< Minimum SUPPLY3 Data */
+#define XSM_MAX_SUPPLY4		8U    /**< Maximum SUPPLY4 Data */
+#define XSM_MAX_SUPPLY5		9U    /**< Maximum SUPPLY5 Data */
+#define XSM_MAX_SUPPLY6		0xAU  /**< Maximum SUPPLY6 Data */
+#define XSM_MIN_SUPPLY4     0xCU  /**< Minimum SUPPLY4 Data */
+#define XSM_MIN_SUPPLY5     0xDU  /**< Minimum SUPPLY5 Data */
+#define XSM_MIN_SUPPLY6     0xEU  /**< Minimum SUPPLY6 Data */
+#define XSM_MAX_SUPPLY7		0x80U  /**< Maximum SUPPLY7 Data */
+#define XSM_MAX_SUPPLY8		0x81U  /**< Maximum SUPPLY8 Data */
+#define XSM_MAX_SUPPLY9		0x82U  /**< Maximum SUPPLY9 Data */
+#define XSM_MAX_SUPPLY10	0x83U  /**< Maximum SUPPLY10 Data */
+#define XSM_MAX_VCCAMS  	0x84U  /**< Maximum VCCAMS Data */
+#define XSM_MAX_TEMP_REMOTE  	0x85U  /**< Maximum Remote Temperature Data */
+#define XSM_MIN_SUPPLY7     0x88U  /**< Minimum SUPPLY7 Data */
+#define XSM_MIN_SUPPLY8     0x89U  /**< Minimum SUPPLY8 Data */
+#define XSM_MIN_SUPPLY9     0x8AU  /**< Minimum SUPPLY9 Data */
+#define XSM_MIN_SUPPLY10    0x8BU  /**< Minimum SUPPLY10 Data */
+#define XSM_MIN_VCCAMS      0x8CU  /**< Minimum VCCAMS Data */
+#define XSM_MIN_TEMP_REMOTE     0x8DU  /**< Minimum Remote Temperature Data */
+
+/*@}*/
+
+/**
+ * @name Averaging to be done for the channels.
+ * @{
+ */
+#define XSM_AVG_0_SAMPLES	0U /**< No Averaging */
+#define XSM_AVG_16_SAMPLES	1U /**< Average 16 samples */
+#define XSM_AVG_64_SAMPLES	2U /**< Average 64 samples */
+#define XSM_AVG_256_SAMPLES	3U /**< Average 256 samples */
+
+/*@}*/
+
+/**
+ * @name Channel Sequencer Modes of operation.
+ * @{
+ */
+#define XSM_SEQ_MODE_SAFE	 0U /**< Default Safe Mode */
+#define XSM_SEQ_MODE_ONEPASS	 1U /**< Onepass through Sequencer */
+#define XSM_SEQ_MODE_CONTINPASS	 2U /**< Continuous Cycling Seqquencer */
+#define XSM_SEQ_MODE_SINGCHAN	 3U /**< Single channel - No Sequencing */
+#define XSM_SEQ_MODE_OYLMPUS	 6U /**< Olympus mode */
+
+/*@}*/
+
+/**
+ * @name Clock Divisor values range.
+ * @{
+ */
+#define XSM_CLK_DIV_MIN	 0U /**< Minimum Clock Divisor value */
+#define XSM_CLK_DIV_MAX	 255U /**< Maximum Clock Divisor value */
+
+/*@}*/
+
+/**
+ * @name Alarm Threshold(Limit) Register (ATR) indexes.
+ * @{
+ */
+#define XSM_ATR_TEMP_UPPER	 0U   /**< High user Temperature limit */
+#define XSM_ATR_SUP1_UPPER	 1U   /**< Supply1 high voltage limit */
+#define XSM_ATR_SUP2_UPPER	 2U   /**< Supply2 high voltage limit */
+#define XSM_ATR_OT_UPPER	 3U   /**< Upper Over Temperature limit */
+#define XSM_ATR_TEMP_LOWER	 4U   /**< Low user Temperature */
+#define XSM_ATR_SUP1_LOWER	 5U   /**< Suuply1 low voltage limit */
+#define XSM_ATR_SUP2_LOWER	 6U   /**< Supply2 low voltage limit */
+#define XSM_ATR_OT_LOWER	 7U   /**< Lower Over Temperature limit */
+#define XSM_ATR_SUP3_UPPER	 8U   /**< Supply3 high voltage limit */
+#define XSM_ATR_SUP4_UPPER 	 9U   /**< Supply4 high voltage limit */
+#define XSM_ATR_SUP5_UPPER 	 0xAU /**< Supply5 high voltage limit */
+#define XSM_ATR_SUP6_UPPER 	 0xBU /**< Supply6 high voltage limit */
+#define XSM_ATR_SUP3_LOWER	 0xCU /**< Supply3 low voltage limit */
+#define XSM_ATR_SUP4_LOWER 	 0xDU /**< Supply4 low voltage limit */
+#define XSM_ATR_SUP5_LOWER 	 0xEU /**< Supply5 low voltage limit */
+#define XSM_ATR_SUP6_LOWER 	 0xFU /**< Supply6 low voltage limit */
+#define XSM_ATR_SUP7_UPPER	 0x10U /**< Supply7 high voltage limit */
+#define XSM_ATR_SUP8_UPPER	 0x11U /**< Supply8 high voltage limit */
+#define XSM_ATR_SUP9_UPPER	 0x12U /**< Supply9 high voltage limit */
+#define XSM_ATR_SUP10_UPPER	 0x13U /**< Supply10 high voltage limit */
+#define XSM_ATR_VCCAMS_UPPER	 0x14U /**< VCCAMS high voltage limit */
+#define XSM_ATR_TEMP_RMTE_UPPER	 0x15U /**< High remote Temperature limit */
+#define XSM_ATR_SUP7_LOWER	 0x18U /**< Supply7 low voltage limit */
+#define XSM_ATR_SUP8_LOWER	 0x19U /**< Supply8 low voltage limit */
+#define XSM_ATR_SUP9_LOWER	 0x1AU /**< Supply9 low voltage limit */
+#define XSM_ATR_SUP10_LOWER	 0x1BU /**< Supply10 low voltage limit */
+#define XSM_ATR_VCCAMS_LOWER	 0x1CU /**< VCCAMS low voltage limit */
+#define XSM_ATR_TEMP_RMTE_LOWER	 0x1DU /**< Low remote Temperature limit */
+
+/*@}*/
+
+/**
+ * @name Alarm masks for channels in Configuration registers 1
+ * @{
+ */
+#define XSM_CFR_ALM_SUPPLY13_MASK	0x200000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY12_MASK	0x100000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY11_MASK	0x080000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY10_MASK	0x040000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY9_MASK	0x020000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY8_MASK	0x010000 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY6_MASK	0x0800 /**< Alarm 6 - SUPPLY6 */
+#define XSM_CFR_ALM_SUPPLY5_MASK	0x0400 /**< Alarm 5 - SUPPLY5 */
+#define XSM_CFR_ALM_SUPPLY4_MASK	0x0200 /**< Alarm 4 - SUPPLY4 */
+#define XSM_CFR_ALM_SUPPLY3_MASK 	0x0100 /**< Alarm 3 - SUPPLY3 */
+#define XSM_CFR_ALM_SUPPLY2_MASK	0x0008 /**< Alarm 2 - SUPPLY2 */
+#define XSM_CFR_ALM_SUPPLY1_MASK	0x0004 /**< Alarm 1 - SUPPLY1 */
+#define XSM_CFR_ALM_TEMP_MASK		0x0002 /**< Alarm 0 - Temperature */
+#define XSM_CFR_ALM_OT_MASK		0x0001 /**< Over Temperature Alarm */
+
+/*@}*/
+
+/**************************** Type Definitions *******************************/
+
+/******************************************************************************/
+/**
+ * This data type defines a handler that an application defines to communicate
+ * with interrupt system to retrieve state information about an application.
+ *
+ * @param	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the handler, and is passed back to the upper layer
+ *		when the handler is called. It is used to find the device driver
+ *		instance.
+ *
+ ******************************************************************************/
+typedef void (*XSysMonPsu_Handler) (void *CallBackRef);
+
+/**
+ * This typedef contains configuration information for a device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID of device */
+	u32 BaseAddress;	/**< Register base address */
+	u16 InputClockMHz;	/**< Input clock frequency */
+} XSysMonPsu_Config;
+
+/**
+ * The XSysmonPsu driver instance data. The user is required to allocate a
+ * variable of this type for the SYSMON device in the system. A pointer
+ * to a variable of this type is then passed to the driver API functions.
+ */
+typedef struct {
+	XSysMonPsu_Config Config; 	/**< Device configuration */
+	u32 IsReady;				/**< Device is initialized and ready */
+	XSysMonPsu_Handler Handler;
+	void *CallBackRef;			/**< Callback reference for event handler */
+} XSysMonPsu;
+
+/* BaseAddress Offsets */
+#define XSYSMON_PS 1U
+#define XSYSMON_PL 2U
+#define XSYSMON_AMS 3U
+#define XPS_BA_OFFSET   0x00000800U
+#define XPL_BA_OFFSET   0x00000C00U
+#define XSM_ADC_CH_OFFSET 0x00000200U
+#define XSM_AMS_CH_OFFSET 0x00000060U
+#define XSM_MIN_MAX_CH_OFFSET 0x00000080U
+
+/************************* Variable Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* This macro converts System Monitor Raw Data to Temperature(centigrades)
+* for On-Chip Sensors.
+*
+* @param	AdcData is the SysMon Raw ADC Data.
+*
+* @return 	The Temperature in centigrades.
+*
+* @note		C-Style signature:
+*		float XSysMon_RawToTemperature_OnChip(u32 AdcData)
+*
+*****************************************************************************/
+#define XSysMonPsu_RawToTemperature_OnChip(AdcData)				\
+	((((float)(AdcData)/65536.0f)/0.00196342531f ) - 280.2309f)
+
+/****************************************************************************/
+/**
+*
+* This macro converts System Monitor Raw Data to Temperature(centigrades)
+* for external reference.
+*
+* @param	AdcData is the SysMon Raw ADC Data.
+*
+* @return 	The Temperature in centigrades.
+*
+* @note		C-Style signature:
+*		float XSysMon_RawToTemperature_ExternalRef(u32 AdcData)
+*
+*****************************************************************************/
+#define XSysMonPsu_RawToTemperature_ExternalRef(AdcData)			\
+	((((float)(AdcData)/65536.0f)/0.00197008621f ) - 279.4266f)
+
+/****************************************************************************/
+/**
+*
+* This macro converts System Monitor Raw Data to Voltage(volts) for VpVn
+* supply.
+*
+* @param	AdcData is the System Monitor ADC Raw Data.
+*
+* @return 	The Voltage in volts.
+*
+* @note		C-Style signature:
+*		float XSysMon_VpVnRawToVoltage(u32 AdcData)
+*
+*****************************************************************************/
+#define XSysMonPsu_VpVnRawToVoltage(AdcData) 					\
+	((((float)(AdcData))* (1.0f))/65536.0f)
+
+/****************************************************************************/
+/**
+*
+* This macro converts System Monitor Raw Data to Voltage(volts) other than
+* VCCO_PSIO supply.
+*
+* @param	AdcData is the System Monitor ADC Raw Data.
+*
+* @return 	The Voltage in volts.
+*
+* @note		C-Style signature:
+*		float XSysMon_RawToVoltage(u32 AdcData)
+*
+*****************************************************************************/
+#define XSysMonPsu_RawToVoltage(AdcData) 					\
+	((((float)(AdcData))* (3.0f))/65536.0f)
+
+/****************************************************************************/
+/**
+*
+* This macro converts System Monitor Raw Data to Voltage(volts) for
+* VCCO_PSIO supply.
+*
+* @param	AdcData is the System Monitor ADC Raw Data.
+*
+* @return 	The Voltage in volts.
+*
+* @note		C-Style signature:
+*		float XSysMon_RawToVoltage(u32 AdcData)
+*
+*****************************************************************************/
+#define XSysMonPsu_VccopsioRawToVoltage(AdcData) 					\
+	((((float)(AdcData))* (6.0f))/65536.0f)
+
+/****************************************************************************/
+/**
+*
+* This macro converts Temperature in centigrades to System Monitor Raw Data
+* for On-Chip Sensors.
+*
+* @param	Temperature is the Temperature in centigrades to be
+*		converted to System Monitor ADC Raw Data.
+*
+* @return 	The System Monitor ADC Raw Data.
+*
+* @note		C-Style signature:
+*		int XSysMon_TemperatureToRaw_OnChip(float Temperature)
+*
+*****************************************************************************/
+#define XSysMonPsu_TemperatureToRaw_OnChip(Temperature)				\
+	((s32)(((Temperature) + 280.2309f)*65536.0f*0.00196342531f))
+
+/****************************************************************************/
+/**
+*
+* This macro converts Temperature in centigrades to System Monitor Raw Data
+* for external reference.
+*
+* @param	Temperature is the Temperature in centigrades to be
+*		converted to System Monitor ADC Raw Data.
+*
+* @return 	The System Monitor ADC Raw Data.
+*
+* @note		C-Style signature:
+*		int XSysMon_TemperatureToRaw_ExternalRef(float Temperature)
+*
+*****************************************************************************/
+#define XSysMonPsu_TemperatureToRaw_ExternalRef(Temperature)		\
+	((s32)(((Temperature) + 279.4266f)*65536.0f*0.00197008621f))
+
+/****************************************************************************/
+/**
+*
+* This macro converts Voltage in Volts to System Monitor Raw Data other than
+* VCCO_PSIO supply
+*
+* @param	Voltage is the Voltage in volts to be converted to
+*		System Monitor/ADC Raw Data.
+*
+* @return 	The System Monitor ADC Raw Data.
+*
+* @note		C-Style signature:
+*		int XSysMon_VoltageToRaw(float Voltage)
+*
+*****************************************************************************/
+#define XSysMonPsu_VoltageToRaw(Voltage)			 		\
+	((s32)((Voltage)*65536.0f/3.0f))
+
+/****************************************************************************/
+/**
+*
+* This macro converts Voltage in Volts to System Monitor Raw Data for
+* VCCO_PSIO supply
+*
+* @param	Voltage is the Voltage in volts to be converted to
+*		System Monitor/ADC Raw Data.
+*
+* @return 	The System Monitor ADC Raw Data.
+*
+* @note		C-Style signature:
+*		int XSysMon_VoltageToRaw(float Voltage)
+*
+*****************************************************************************/
+#define XSysMonPsu_VccopsioVoltageToRaw(Voltage)			 		\
+	((s32)((Voltage)*65536.0f/6.0f))
+
+/****************************************************************************/
+/**
+*
+* This static inline macro calculates the effective baseaddress based on the
+* Sysmon instance. For PS Sysmon, use additional offset XPS_BA_OFFSET and For
+* PL Sysmon, use additional offset XPL_BA_OFFSET.
+*
+* @param	BaseAddress is the starting address of the SysMon block in
+* 		register database.
+* @param	SysmonBlk is the value that tells whether it is for PS Sysmon block
+*       or PL Sysmon block or the AMS controller register region.
+*
+* @return 	Returns the effective baseaddress of the sysmon instance.
+*
+*****************************************************************************/
+static inline u32 XSysMonPsu_GetEffBaseAddress(u32 BaseAddress, u32 SysmonBlk)
+	{
+		u32 EffBaseAddr;
+
+		if (SysmonBlk == XSYSMON_PS) {
+			EffBaseAddr = BaseAddress + XPS_BA_OFFSET;
+		} else if(SysmonBlk == XSYSMON_PL) {
+			EffBaseAddr = BaseAddress + XPL_BA_OFFSET;
+		} else {
+			EffBaseAddr = BaseAddress;
+		}
+
+		return EffBaseAddr;
+	}
+
+/************************** Function Prototypes ******************************/
+
+/* Functions in xsysmonpsu.c */
+s32 XSysMonPsu_CfgInitialize(XSysMonPsu *InstancePtr, XSysMonPsu_Config *ConfigPtr,
+			  u32 EffectiveAddr);
+void XSysMonPsu_Reset(XSysMonPsu *InstancePtr);
+void XSysMonPsu_Reset_FromLPD(XSysMonPsu *InstancePtr);
+u32 XSysMonPsu_GetStatus(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_StartAdcConversion(XSysMonPsu *InstancePtr);
+u16 XSysMonPsu_GetAdcData(XSysMonPsu *InstancePtr, u8 Channel, u32 Block);
+u16 XSysMonPsu_GetCalibCoefficient(XSysMonPsu *InstancePtr, u8 CoeffType, u32 SysmonBlk);
+u16 XSysMonPsu_GetMinMaxMeasurement(XSysMonPsu *InstancePtr, u8 MeasurementType,
+		u32 SysmonBlk);
+void XSysMonPsu_SetAvg(XSysMonPsu *InstancePtr, u8 Average, u32 SysmonBlk);
+u8 XSysMonPsu_GetAvg(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+s32 XSysMonPsu_SetSingleChParams(XSysMonPsu *InstancePtr, u8 Channel,
+				u32 IncreaseAcqCycles, u32 IsEventMode,
+				u32 IsDifferentialMode, u32 SysmonBlk);
+void XSysMonPsu_SetAlarmEnables(XSysMonPsu *InstancePtr, u32 AlmEnableMask,
+		u32 SysmonBlk);
+u32 XSysMonPsu_GetAlarmEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_SetSequencerMode(XSysMonPsu *InstancePtr, u8 SequencerMode,
+		u32 SysmonBlk);
+u8 XSysMonPsu_GetSequencerMode(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_SetSequencerEvent(XSysMonPsu *InstancePtr, u32 IsEventMode,
+		u32 SysmonBlk);
+s32 XSysMonPsu_GetSequencerEvent(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_SetExtenalMux(XSysMonPsu *InstancePtr, u8 Channel, u32 SysmonBlk);
+u32 XSysMonPsu_GetExtenalMux(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_SetAdcClkDivisor(XSysMonPsu *InstancePtr, u8 Divisor, u32 SysmonBlk);
+u8 XSysMonPsu_GetAdcClkDivisor(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+u8 XSysMonPsu_UpdateAdcClkDivisor(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+s32 XSysMonPsu_SetSeqChEnables(XSysMonPsu *InstancePtr, u64 ChEnableMask,
+		u32 SysmonBlk);
+u64 XSysMonPsu_GetSeqAvgEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+u64 XSysMonPsu_GetSeqChEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+s32 XSysMonPsu_SetSeqAvgEnables(XSysMonPsu *InstancePtr, u64 AvgEnableChMask,
+		u32 SysmonBlk);
+s32 XSysMonPsu_SetSeqInputMode(XSysMonPsu *InstancePtr, u64 InputModeChMask,
+		u32 SysmonBlk);
+u64 XSysMonPsu_GetSeqInputMode(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+s32 XSysMonPsu_SetSeqAcqTime(XSysMonPsu *InstancePtr, u64 AcqCyclesChMask,
+		u32 SysmonBlk);
+u64 XSysMonPsu_GetSeqAcqTime(XSysMonPsu *InstancePtr, u32 SysmonBlk);
+void XSysMonPsu_SetAlarmThreshold(XSysMonPsu *InstancePtr, u8 AlarmThrReg,
+		u16 Value, u32 SysmonBlk);
+u16 XSysMonPsu_GetAlarmThreshold(XSysMonPsu *InstancePtr, u8 AlarmThrReg,
+		u32 SysmonBlk);
+void XSysMonPsu_SetPSAutoConversion(XSysMonPsu *InstancePtr);
+u32 XSysMonPsu_GetMonitorStatus(XSysMonPsu *InstancePtr);
+
+/* interrupt functions in xsysmonpsu_intr.c */
+void XSysMonPsu_IntrEnable(XSysMonPsu *InstancePtr, u64 Mask);
+void XSysMonPsu_IntrDisable(XSysMonPsu *InstancePtr, u64 Mask);
+u64 XSysMonPsu_IntrGetEnabled(XSysMonPsu *InstancePtr);
+u64 XSysMonPsu_IntrGetStatus(XSysMonPsu *InstancePtr);
+void XSysMonPsu_IntrClear(XSysMonPsu *InstancePtr, u64 Mask);
+
+/* Functions in xsysmonpsu_selftest.c */
+s32 XSysMonPsu_SelfTest(XSysMonPsu *InstancePtr);
+
+/* Functions in xsysmonpsu_sinit.c */
+XSysMonPsu_Config *XSysMonPsu_LookupConfig(u16 DeviceId);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XSYSMONPSU_H_ */
diff --git a/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_g.c b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_g.c
new file mode 100644
index 0000000..1ab6471
--- /dev/null
+++ b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_g.c
@@ -0,0 +1,56 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xsysmonpsu.h"
+
+/*
+* The configuration table for devices
+*/
+
+XSysMonPsu_Config XSysMonPsu_ConfigTable[XPAR_XSYSMONPSU_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_AMS_DEVICE_ID,
+		XPAR_PSU_AMS_BASEADDR,
+		XPAR_PSU_AMS_REF_FREQMHZ
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_hw.h b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_hw.h
new file mode 100644
index 0000000..2008277
--- /dev/null
+++ b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_hw.h
@@ -0,0 +1,2327 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsysmonpsu_hw.h
+*
+* This header file contains the identifiers and basic driver functions (or
+* macros) that can be used to access the device. Other driver functions
+* are defined in xsysmonpsu.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.0   kvn	  12/15/15 First release
+* 2.0   vns    08/14/16  Added CFG_REG3, SEQ_INPUT_MODE2, SEQ_ACQ2,
+*                        SEQ_CH2 and SEQ_AVG2 offsets and bit masks
+* 2.1   sk     03/03/16 Check for PL reset before doing PL Sysmon reset.
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XSYSMONPSU_HW_H__
+#define XSYSMONPSU_HW_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xparameters.h"
+
+/**
+ * XSysmonPsu Base Address
+ */
+#define XSYSMONPSU_BASEADDR      0xFFA50000U
+
+/**
+ * Register: XSysmonPsuMisc
+ */
+#define XSYSMONPSU_MISC_OFFSET   0x00000000U
+#define XSYSMONPSU_MISC_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MISC_SLVERR_EN_DRP_SHIFT   1U
+#define XSYSMONPSU_MISC_SLVERR_EN_DRP_WIDTH   1U
+#define XSYSMONPSU_MISC_SLVERR_EN_DRP_MASK    0x00000002U
+
+#define XSYSMONPSU_MISC_SLVERR_EN_SHIFT   0U
+#define XSYSMONPSU_MISC_SLVERR_EN_WIDTH   1U
+#define XSYSMONPSU_MISC_SLVERR_EN_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuIsr0
+ */
+#define XSYSMONPSU_ISR_0_OFFSET   0x00000010U
+#define XSYSMONPSU_ISR_0_MASK	  0xffffffffU
+#define XSYSMONPSU_ISR_0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_15_SHIFT   31U
+#define XSYSMONPSU_ISR_0_PL_ALM_15_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_15_MASK    0x80000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_14_SHIFT   30U
+#define XSYSMONPSU_ISR_0_PL_ALM_14_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_14_MASK    0x40000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_13_SHIFT   29U
+#define XSYSMONPSU_ISR_0_PL_ALM_13_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_13_MASK    0x20000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_12_SHIFT   28U
+#define XSYSMONPSU_ISR_0_PL_ALM_12_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_12_MASK    0x10000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_11_SHIFT   27U
+#define XSYSMONPSU_ISR_0_PL_ALM_11_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_11_MASK    0x08000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_10_SHIFT   26U
+#define XSYSMONPSU_ISR_0_PL_ALM_10_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_10_MASK    0x04000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_9_SHIFT   25U
+#define XSYSMONPSU_ISR_0_PL_ALM_9_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_9_MASK    0x02000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_8_SHIFT   24U
+#define XSYSMONPSU_ISR_0_PL_ALM_8_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_8_MASK    0x01000000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_7_SHIFT   23U
+#define XSYSMONPSU_ISR_0_PL_ALM_7_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_7_MASK    0x00800000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_6_SHIFT   22U
+#define XSYSMONPSU_ISR_0_PL_ALM_6_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_6_MASK    0x00400000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_5_SHIFT   21U
+#define XSYSMONPSU_ISR_0_PL_ALM_5_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_5_MASK    0x00200000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_4_SHIFT   20U
+#define XSYSMONPSU_ISR_0_PL_ALM_4_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_4_MASK    0x00100000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_3_SHIFT   19U
+#define XSYSMONPSU_ISR_0_PL_ALM_3_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_3_MASK    0x00080000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_2_SHIFT   18U
+#define XSYSMONPSU_ISR_0_PL_ALM_2_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_2_MASK    0x00040000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_1_SHIFT   17U
+#define XSYSMONPSU_ISR_0_PL_ALM_1_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_1_MASK    0x00020000U
+
+#define XSYSMONPSU_ISR_0_PL_ALM_0_SHIFT   16U
+#define XSYSMONPSU_ISR_0_PL_ALM_0_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PL_ALM_0_MASK    0x00010000U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_15_SHIFT   15U
+#define XSYSMONPSU_ISR_0_PS_ALM_15_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_15_MASK    0x00008000U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_14_SHIFT   14U
+#define XSYSMONPSU_ISR_0_PS_ALM_14_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_14_MASK    0x00004000U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_13_SHIFT   13U
+#define XSYSMONPSU_ISR_0_PS_ALM_13_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_13_MASK    0x00002000U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_12_SHIFT   12U
+#define XSYSMONPSU_ISR_0_PS_ALM_12_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_12_MASK    0x00001000U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_11_SHIFT   11U
+#define XSYSMONPSU_ISR_0_PS_ALM_11_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_11_MASK    0x00000800U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_10_SHIFT   10U
+#define XSYSMONPSU_ISR_0_PS_ALM_10_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_10_MASK    0x00000400U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_9_SHIFT   9U
+#define XSYSMONPSU_ISR_0_PS_ALM_9_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_9_MASK    0x00000200U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_8_SHIFT   8U
+#define XSYSMONPSU_ISR_0_PS_ALM_8_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_8_MASK    0x00000100U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_7_SHIFT   7U
+#define XSYSMONPSU_ISR_0_PS_ALM_7_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_7_MASK    0x00000080U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_6_SHIFT   6U
+#define XSYSMONPSU_ISR_0_PS_ALM_6_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_6_MASK    0x00000040U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_5_SHIFT   5U
+#define XSYSMONPSU_ISR_0_PS_ALM_5_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_5_MASK    0x00000020U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_4_SHIFT   4U
+#define XSYSMONPSU_ISR_0_PS_ALM_4_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_4_MASK    0x00000010U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_3_SHIFT   3U
+#define XSYSMONPSU_ISR_0_PS_ALM_3_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_3_MASK    0x00000008U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_2_SHIFT   2U
+#define XSYSMONPSU_ISR_0_PS_ALM_2_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_2_MASK    0x00000004U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_1_SHIFT   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_1_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_1_MASK    0x00000002U
+
+#define XSYSMONPSU_ISR_0_PS_ALM_0_SHIFT   0U
+#define XSYSMONPSU_ISR_0_PS_ALM_0_WIDTH   1U
+#define XSYSMONPSU_ISR_0_PS_ALM_0_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuIsr1
+ */
+#define XSYSMONPSU_ISR_1_OFFSET   0x00000014U
+#define XSYSMONPSU_ISR_1_MASK	  0xe000001fU
+#define XSYSMONPSU_ISR_1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_SHIFT   31U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_WIDTH   1U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_MASK    0x80000000U
+
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PL_SYSMON_SHIFT   30U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PL_SYSMON_WIDTH   1U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PL_SYSMON_MASK    0x40000000U
+
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PS_SYSMON_SHIFT   29U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PS_SYSMON_WIDTH   1U
+#define XSYSMONPSU_ISR_1_ADD_DECD_ERR_PS_SYSMON_MASK    0x20000000U
+
+#define XSYSMONPSU_ISR_1_EOS_SHIFT   4U
+#define XSYSMONPSU_ISR_1_EOS_WIDTH   1U
+#define XSYSMONPSU_ISR_1_EOS_MASK    0x00000010U
+
+#define XSYSMONPSU_ISR_1_EOC_SHIFT   3U
+#define XSYSMONPSU_ISR_1_EOC_WIDTH   1U
+#define XSYSMONPSU_ISR_1_EOC_MASK    0x00000008U
+
+#define XSYSMONPSU_ISR_1_PL_OT_SHIFT   2U
+#define XSYSMONPSU_ISR_1_PL_OT_WIDTH   1U
+#define XSYSMONPSU_ISR_1_PL_OT_MASK    0x00000004U
+
+#define XSYSMONPSU_ISR_1_PS_LPD_OT_SHIFT   1U
+#define XSYSMONPSU_ISR_1_PS_LPD_OT_WIDTH   1U
+#define XSYSMONPSU_ISR_1_PS_LPD_OT_MASK    0x00000002U
+
+#define XSYSMONPSU_ISR_1_PS_FPD_OT_SHIFT   0U
+#define XSYSMONPSU_ISR_1_PS_FPD_OT_WIDTH   1U
+#define XSYSMONPSU_ISR_1_PS_FPD_OT_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuImr0
+ */
+#define XSYSMONPSU_IMR_0_OFFSET   0x00000018U
+#define XSYSMONPSU_IMR_0_RSTVAL   0xffffffffU
+
+#define XSYSMONPSU_IMR_0_PL_ALM_15_SHIFT   31U
+#define XSYSMONPSU_IMR_0_PL_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_15_MASK    0x80000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_14_SHIFT   30U
+#define XSYSMONPSU_IMR_0_PL_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_14_MASK    0x40000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_13_SHIFT   29U
+#define XSYSMONPSU_IMR_0_PL_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_13_MASK    0x20000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_12_SHIFT   28U
+#define XSYSMONPSU_IMR_0_PL_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_12_MASK    0x10000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_11_SHIFT   27U
+#define XSYSMONPSU_IMR_0_PL_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_11_MASK    0x08000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_10_SHIFT   26U
+#define XSYSMONPSU_IMR_0_PL_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_10_MASK    0x04000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_9_SHIFT   25U
+#define XSYSMONPSU_IMR_0_PL_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_9_MASK    0x02000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_8_SHIFT   24U
+#define XSYSMONPSU_IMR_0_PL_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_8_MASK    0x01000000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_7_SHIFT   23U
+#define XSYSMONPSU_IMR_0_PL_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_7_MASK    0x00800000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_6_SHIFT   22U
+#define XSYSMONPSU_IMR_0_PL_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_6_MASK    0x00400000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_5_SHIFT   21U
+#define XSYSMONPSU_IMR_0_PL_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_5_MASK    0x00200000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_4_SHIFT   20U
+#define XSYSMONPSU_IMR_0_PL_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_4_MASK    0x00100000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_3_SHIFT   19U
+#define XSYSMONPSU_IMR_0_PL_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_3_MASK    0x00080000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_2_SHIFT   18U
+#define XSYSMONPSU_IMR_0_PL_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_2_MASK    0x00040000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_1_SHIFT   17U
+#define XSYSMONPSU_IMR_0_PL_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_1_MASK    0x00020000U
+
+#define XSYSMONPSU_IMR_0_PL_ALM_0_SHIFT   16U
+#define XSYSMONPSU_IMR_0_PL_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PL_ALM_0_MASK    0x00010000U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_15_SHIFT   15U
+#define XSYSMONPSU_IMR_0_PS_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_15_MASK    0x00008000U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_14_SHIFT   14U
+#define XSYSMONPSU_IMR_0_PS_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_14_MASK    0x00004000U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_13_SHIFT   13U
+#define XSYSMONPSU_IMR_0_PS_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_13_MASK    0x00002000U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_12_SHIFT   12U
+#define XSYSMONPSU_IMR_0_PS_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_12_MASK    0x00001000U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_11_SHIFT   11U
+#define XSYSMONPSU_IMR_0_PS_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_11_MASK    0x00000800U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_10_SHIFT   10U
+#define XSYSMONPSU_IMR_0_PS_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_10_MASK    0x00000400U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_9_SHIFT   9U
+#define XSYSMONPSU_IMR_0_PS_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_9_MASK    0x00000200U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_8_SHIFT   8U
+#define XSYSMONPSU_IMR_0_PS_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_8_MASK    0x00000100U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_7_SHIFT   7U
+#define XSYSMONPSU_IMR_0_PS_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_7_MASK    0x00000080U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_6_SHIFT   6U
+#define XSYSMONPSU_IMR_0_PS_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_6_MASK    0x00000040U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_5_SHIFT   5U
+#define XSYSMONPSU_IMR_0_PS_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_5_MASK    0x00000020U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_4_SHIFT   4U
+#define XSYSMONPSU_IMR_0_PS_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_4_MASK    0x00000010U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_3_SHIFT   3U
+#define XSYSMONPSU_IMR_0_PS_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_3_MASK    0x00000008U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_2_SHIFT   2U
+#define XSYSMONPSU_IMR_0_PS_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_2_MASK    0x00000004U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_1_SHIFT   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_1_MASK    0x00000002U
+
+#define XSYSMONPSU_IMR_0_PS_ALM_0_SHIFT   0U
+#define XSYSMONPSU_IMR_0_PS_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IMR_0_PS_ALM_0_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuImr1
+ */
+#define XSYSMONPSU_IMR_1_OFFSET   0x0000001CU
+#define XSYSMONPSU_IMR_1_RSTVAL   0xe000001fU
+
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_SHIFT   31U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_WIDTH   1U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_MASK    0x80000000U
+
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PL_SYSMON_SHIFT   30U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PL_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PL_SYSMON_MASK    0x40000000U
+
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PS_SYSMON_SHIFT   29U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PS_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IMR_1_ADD_DECD_ERR_PS_SYSMON_MASK    0x20000000U
+
+#define XSYSMONPSU_IMR_1_EOS_SHIFT   4U
+#define XSYSMONPSU_IMR_1_EOS_WIDTH   1U
+#define XSYSMONPSU_IMR_1_EOS_MASK    0x00000010U
+
+#define XSYSMONPSU_IMR_1_EOC_SHIFT   3U
+#define XSYSMONPSU_IMR_1_EOC_WIDTH   1U
+#define XSYSMONPSU_IMR_1_EOC_MASK    0x00000008U
+
+#define XSYSMONPSU_IMR_1_PL_OT_SHIFT   2U
+#define XSYSMONPSU_IMR_1_PL_OT_WIDTH   1U
+#define XSYSMONPSU_IMR_1_PL_OT_MASK    0x00000004U
+
+#define XSYSMONPSU_IMR_1_PS_LPD_OT_SHIFT   1U
+#define XSYSMONPSU_IMR_1_PS_LPD_OT_WIDTH   1U
+#define XSYSMONPSU_IMR_1_PS_LPD_OT_MASK    0x00000002U
+
+#define XSYSMONPSU_IMR_1_PS_FPD_OT_SHIFT   0U
+#define XSYSMONPSU_IMR_1_PS_FPD_OT_WIDTH   1U
+#define XSYSMONPSU_IMR_1_PS_FPD_OT_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuIer0
+ */
+#define XSYSMONPSU_IER_0_OFFSET   0x00000020U
+#define XSYSMONPSU_IXR_0_MASK     0xFFFFFFFFU
+#define XSYSMONPSU_IER_0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_15_SHIFT   31U
+#define XSYSMONPSU_IER_0_PL_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_15_MASK    0x80000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_14_SHIFT   30U
+#define XSYSMONPSU_IER_0_PL_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_14_MASK    0x40000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_13_SHIFT   29U
+#define XSYSMONPSU_IER_0_PL_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_13_MASK    0x20000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_12_SHIFT   28U
+#define XSYSMONPSU_IER_0_PL_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_12_MASK    0x10000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_11_SHIFT   27U
+#define XSYSMONPSU_IER_0_PL_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_11_MASK    0x08000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_10_SHIFT   26U
+#define XSYSMONPSU_IER_0_PL_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_10_MASK    0x04000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_9_SHIFT   25U
+#define XSYSMONPSU_IER_0_PL_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_9_MASK    0x02000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_8_SHIFT   24U
+#define XSYSMONPSU_IER_0_PL_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_8_MASK    0x01000000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_7_SHIFT   23U
+#define XSYSMONPSU_IER_0_PL_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_7_MASK    0x00800000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_6_SHIFT   22U
+#define XSYSMONPSU_IER_0_PL_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_6_MASK    0x00400000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_5_SHIFT   21U
+#define XSYSMONPSU_IER_0_PL_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_5_MASK    0x00200000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_4_SHIFT   20U
+#define XSYSMONPSU_IER_0_PL_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_4_MASK    0x00100000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_3_SHIFT   19U
+#define XSYSMONPSU_IER_0_PL_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_3_MASK    0x00080000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_2_SHIFT   18U
+#define XSYSMONPSU_IER_0_PL_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_2_MASK    0x00040000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_1_SHIFT   17U
+#define XSYSMONPSU_IER_0_PL_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_1_MASK    0x00020000U
+
+#define XSYSMONPSU_IER_0_PL_ALM_0_SHIFT   16U
+#define XSYSMONPSU_IER_0_PL_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IER_0_PL_ALM_0_MASK    0x00010000U
+
+#define XSYSMONPSU_IER_0_PS_ALM_15_SHIFT   15U
+#define XSYSMONPSU_IER_0_PS_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_15_MASK    0x00008000U
+
+#define XSYSMONPSU_IER_0_PS_ALM_14_SHIFT   14U
+#define XSYSMONPSU_IER_0_PS_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_14_MASK    0x00004000U
+
+#define XSYSMONPSU_IER_0_PS_ALM_13_SHIFT   13U
+#define XSYSMONPSU_IER_0_PS_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_13_MASK    0x00002000U
+
+#define XSYSMONPSU_IER_0_PS_ALM_12_SHIFT   12U
+#define XSYSMONPSU_IER_0_PS_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_12_MASK    0x00001000U
+
+#define XSYSMONPSU_IER_0_PS_ALM_11_SHIFT   11U
+#define XSYSMONPSU_IER_0_PS_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_11_MASK    0x00000800U
+
+#define XSYSMONPSU_IER_0_PS_ALM_10_SHIFT   10U
+#define XSYSMONPSU_IER_0_PS_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_10_MASK    0x00000400U
+
+#define XSYSMONPSU_IER_0_PS_ALM_9_SHIFT   9U
+#define XSYSMONPSU_IER_0_PS_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_9_MASK    0x00000200U
+
+#define XSYSMONPSU_IER_0_PS_ALM_8_SHIFT   8U
+#define XSYSMONPSU_IER_0_PS_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_8_MASK    0x00000100U
+
+#define XSYSMONPSU_IER_0_PS_ALM_7_SHIFT   7U
+#define XSYSMONPSU_IER_0_PS_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_7_MASK    0x00000080U
+
+#define XSYSMONPSU_IER_0_PS_ALM_6_SHIFT   6U
+#define XSYSMONPSU_IER_0_PS_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_6_MASK    0x00000040U
+
+#define XSYSMONPSU_IER_0_PS_ALM_5_SHIFT   5U
+#define XSYSMONPSU_IER_0_PS_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_5_MASK    0x00000020U
+
+#define XSYSMONPSU_IER_0_PS_ALM_4_SHIFT   4U
+#define XSYSMONPSU_IER_0_PS_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_4_MASK    0x00000010U
+
+#define XSYSMONPSU_IER_0_PS_ALM_3_SHIFT   3U
+#define XSYSMONPSU_IER_0_PS_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_3_MASK    0x00000008U
+
+#define XSYSMONPSU_IER_0_PS_ALM_2_SHIFT   2U
+#define XSYSMONPSU_IER_0_PS_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_2_MASK    0x00000004U
+
+#define XSYSMONPSU_IER_0_PS_ALM_1_SHIFT   1U
+#define XSYSMONPSU_IER_0_PS_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_1_MASK    0x00000002U
+
+#define XSYSMONPSU_IER_0_PS_ALM_0_SHIFT   0U
+#define XSYSMONPSU_IER_0_PS_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IER_0_PS_ALM_0_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuIer1
+ */
+#define XSYSMONPSU_IER_1_OFFSET   0x00000024U
+#define XSYSMONPSU_IXR_1_MASK     0xE000001FU
+#define XSYSMONPSU_IER_1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_SHIFT   31U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_WIDTH   1U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_MASK    0x80000000U
+
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PL_SYSMON_SHIFT   30U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PL_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PL_SYSMON_MASK    0x40000000U
+
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PS_SYSMON_SHIFT   29U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PS_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IER_1_ADD_DECD_ERR_PS_SYSMON_MASK    0x20000000U
+
+#define XSYSMONPSU_IER_1_EOS_SHIFT   4U
+#define XSYSMONPSU_IER_1_EOS_WIDTH   1U
+#define XSYSMONPSU_IER_1_EOS_MASK    0x00000010U
+
+#define XSYSMONPSU_IER_1_EOC_SHIFT   3U
+#define XSYSMONPSU_IER_1_EOC_WIDTH   1U
+#define XSYSMONPSU_IER_1_EOC_MASK    0x00000008U
+
+#define XSYSMONPSU_IER_1_PL_OT_SHIFT   2U
+#define XSYSMONPSU_IER_1_PL_OT_WIDTH   1U
+#define XSYSMONPSU_IER_1_PL_OT_MASK    0x00000004U
+
+#define XSYSMONPSU_IER_1_PS_LPD_OT_SHIFT   1U
+#define XSYSMONPSU_IER_1_PS_LPD_OT_WIDTH   1U
+#define XSYSMONPSU_IER_1_PS_LPD_OT_MASK    0x00000002U
+
+#define XSYSMONPSU_IER_1_PS_FPD_OT_SHIFT   0U
+#define XSYSMONPSU_IER_1_PS_FPD_OT_WIDTH   1U
+#define XSYSMONPSU_IER_1_PS_FPD_OT_MASK    0x00000001U
+
+#define XSYSMONPSU_IXR_1_SHIFT  32U
+
+/**
+ * Register: XSysmonPsuIdr0
+ */
+#define XSYSMONPSU_IDR_0_OFFSET   0x00000028U
+#define XSYSMONPSU_IDR_0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_15_SHIFT   31U
+#define XSYSMONPSU_IDR_0_PL_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_15_MASK    0x80000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_14_SHIFT   30U
+#define XSYSMONPSU_IDR_0_PL_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_14_MASK    0x40000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_13_SHIFT   29U
+#define XSYSMONPSU_IDR_0_PL_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_13_MASK    0x20000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_12_SHIFT   28U
+#define XSYSMONPSU_IDR_0_PL_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_12_MASK    0x10000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_11_SHIFT   27U
+#define XSYSMONPSU_IDR_0_PL_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_11_MASK    0x08000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_10_SHIFT   26U
+#define XSYSMONPSU_IDR_0_PL_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_10_MASK    0x04000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_9_SHIFT   25U
+#define XSYSMONPSU_IDR_0_PL_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_9_MASK    0x02000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_8_SHIFT   24U
+#define XSYSMONPSU_IDR_0_PL_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_8_MASK    0x01000000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_7_SHIFT   23U
+#define XSYSMONPSU_IDR_0_PL_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_7_MASK    0x00800000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_6_SHIFT   22U
+#define XSYSMONPSU_IDR_0_PL_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_6_MASK    0x00400000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_5_SHIFT   21U
+#define XSYSMONPSU_IDR_0_PL_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_5_MASK    0x00200000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_4_SHIFT   20U
+#define XSYSMONPSU_IDR_0_PL_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_4_MASK    0x00100000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_3_SHIFT   19U
+#define XSYSMONPSU_IDR_0_PL_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_3_MASK    0x00080000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_2_SHIFT   18U
+#define XSYSMONPSU_IDR_0_PL_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_2_MASK    0x00040000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_1_SHIFT   17U
+#define XSYSMONPSU_IDR_0_PL_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_1_MASK    0x00020000U
+
+#define XSYSMONPSU_IDR_0_PL_ALM_0_SHIFT   16U
+#define XSYSMONPSU_IDR_0_PL_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PL_ALM_0_MASK    0x00010000U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_15_SHIFT   15U
+#define XSYSMONPSU_IDR_0_PS_ALM_15_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_15_MASK    0x00008000U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_14_SHIFT   14U
+#define XSYSMONPSU_IDR_0_PS_ALM_14_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_14_MASK    0x00004000U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_13_SHIFT   13U
+#define XSYSMONPSU_IDR_0_PS_ALM_13_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_13_MASK    0x00002000U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_12_SHIFT   12U
+#define XSYSMONPSU_IDR_0_PS_ALM_12_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_12_MASK    0x00001000U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_11_SHIFT   11U
+#define XSYSMONPSU_IDR_0_PS_ALM_11_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_11_MASK    0x00000800U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_10_SHIFT   10U
+#define XSYSMONPSU_IDR_0_PS_ALM_10_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_10_MASK    0x00000400U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_9_SHIFT   9U
+#define XSYSMONPSU_IDR_0_PS_ALM_9_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_9_MASK    0x00000200U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_8_SHIFT   8U
+#define XSYSMONPSU_IDR_0_PS_ALM_8_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_8_MASK    0x00000100U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_7_SHIFT   7U
+#define XSYSMONPSU_IDR_0_PS_ALM_7_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_7_MASK    0x00000080U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_6_SHIFT   6U
+#define XSYSMONPSU_IDR_0_PS_ALM_6_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_6_MASK    0x00000040U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_5_SHIFT   5U
+#define XSYSMONPSU_IDR_0_PS_ALM_5_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_5_MASK    0x00000020U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_4_SHIFT   4U
+#define XSYSMONPSU_IDR_0_PS_ALM_4_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_4_MASK    0x00000010U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_3_SHIFT   3U
+#define XSYSMONPSU_IDR_0_PS_ALM_3_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_3_MASK    0x00000008U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_2_SHIFT   2U
+#define XSYSMONPSU_IDR_0_PS_ALM_2_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_2_MASK    0x00000004U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_1_SHIFT   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_1_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_1_MASK    0x00000002U
+
+#define XSYSMONPSU_IDR_0_PS_ALM_0_SHIFT   0U
+#define XSYSMONPSU_IDR_0_PS_ALM_0_WIDTH   1U
+#define XSYSMONPSU_IDR_0_PS_ALM_0_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuIdr1
+ */
+#define XSYSMONPSU_IDR_1_OFFSET   0x0000002CU
+#define XSYSMONPSU_IDR_1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_SHIFT   31U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_WIDTH   1U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_MASK    0x80000000U
+
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PL_SYSMON_SHIFT   30U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PL_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PL_SYSMON_MASK    0x40000000U
+
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PS_SYSMON_SHIFT   29U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PS_SYSMON_WIDTH   1U
+#define XSYSMONPSU_IDR_1_ADD_DECD_ERR_PS_SYSMON_MASK    0x20000000U
+
+#define XSYSMONPSU_IDR_1_EOS_SHIFT   4U
+#define XSYSMONPSU_IDR_1_EOS_WIDTH   1U
+#define XSYSMONPSU_IDR_1_EOS_MASK    0x00000010U
+
+#define XSYSMONPSU_IDR_1_EOC_SHIFT   3U
+#define XSYSMONPSU_IDR_1_EOC_WIDTH   1U
+#define XSYSMONPSU_IDR_1_EOC_MASK    0x00000008U
+
+#define XSYSMONPSU_IDR_1_PL_OT_SHIFT   2U
+#define XSYSMONPSU_IDR_1_PL_OT_WIDTH   1U
+#define XSYSMONPSU_IDR_1_PL_OT_MASK    0x00000004U
+
+#define XSYSMONPSU_IDR_1_PS_LPD_OT_SHIFT   1U
+#define XSYSMONPSU_IDR_1_PS_LPD_OT_WIDTH   1U
+#define XSYSMONPSU_IDR_1_PS_LPD_OT_MASK    0x00000002U
+
+#define XSYSMONPSU_IDR_1_PS_FPD_OT_SHIFT   0U
+#define XSYSMONPSU_IDR_1_PS_FPD_OT_WIDTH   1U
+#define XSYSMONPSU_IDR_1_PS_FPD_OT_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuPsSysmonSts
+ */
+#define XSYSMONPSU_PS_SYSMON_CSTS_OFFSET   0x00000040U
+#define XSYSMONPSU_PS_SYSMON_CSTS_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_STE_SHIFT   24U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_STE_WIDTH   4U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_STE_MASK    0x0f000000U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_DNE_SHIFT   16U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_DNE_WIDTH   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_DNE_MASK    0x00010000U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_SHIFT   3U
+#define XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_WIDTH   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_MASK    0x00000008U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_CONVST_SHIFT   2U
+#define XSYSMONPSU_PS_SYSMON_CSTS_CONVST_WIDTH   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_CONVST_MASK    0x00000004U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_RST_USR_SHIFT   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_RST_USR_WIDTH   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_RST_USR_MASK    0x00000002U
+
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_TRIG_SHIFT   0U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_TRIG_WIDTH   1U
+#define XSYSMONPSU_PS_SYSMON_CSTS_STRTUP_TRIG_MASK    0x00000001U
+
+#define XSYSMONPSU_PS_SYSMON_READY 0x08010000U
+
+/**
+ * Register: XSysmonPsuPlSysmonSts
+ */
+#define XSYSMONPSU_PL_SYSMON_CSTS_OFFSET   0x00000044U
+#define XSYSMONPSU_PL_SYSMON_CSTS_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_PL_SYSMON_CSTS_ACESBLE_SHIFT   0U
+#define XSYSMONPSU_PL_SYSMON_CSTS_ACESBLE_WIDTH   1U
+#define XSYSMONPSU_PL_SYSMON_CSTS_ACESBLE_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuMonSts
+ */
+#define XSYSMONPSU_MON_STS_OFFSET   0x00000050U
+#define XSYSMONPSU_MON_STS_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MON_STS_JTAG_LCKD_SHIFT   23U
+#define XSYSMONPSU_MON_STS_JTAG_LCKD_WIDTH   1U
+#define XSYSMONPSU_MON_STS_JTAG_LCKD_MASK    0x00800000U
+
+#define XSYSMONPSU_MON_STS_BSY_SHIFT   22U
+#define XSYSMONPSU_MON_STS_BSY_WIDTH   1U
+#define XSYSMONPSU_MON_STS_BSY_MASK    0x00400000U
+
+#define XSYSMONPSU_MON_STS_CH_SHIFT   16U
+#define XSYSMONPSU_MON_STS_CH_WIDTH   6U
+#define XSYSMONPSU_MON_STS_CH_MASK    0x003f0000U
+
+#define XSYSMONPSU_MON_STS_DATA_SHIFT   0U
+#define XSYSMONPSU_MON_STS_DATA_WIDTH   16U
+#define XSYSMONPSU_MON_STS_DATA_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPspll0
+ */
+#define XSYSMONPSU_VCC_PSPLL0_OFFSET   0x00000060U
+#define XSYSMONPSU_VCC_PSPLL0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSPLL0_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSPLL0_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSPLL0_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPspll1
+ */
+#define XSYSMONPSU_VCC_PSPLL1_OFFSET   0x00000064U
+#define XSYSMONPSU_VCC_PSPLL1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSPLL1_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSPLL1_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSPLL1_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPspll2
+ */
+#define XSYSMONPSU_VCC_PSPLL2_OFFSET   0x00000068U
+#define XSYSMONPSU_VCC_PSPLL2_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSPLL2_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSPLL2_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSPLL2_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPspll3
+ */
+#define XSYSMONPSU_VCC_PSPLL3_OFFSET   0x0000006CU
+#define XSYSMONPSU_VCC_PSPLL3_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSPLL3_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSPLL3_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSPLL3_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPspll4
+ */
+#define XSYSMONPSU_VCC_PSPLL4_OFFSET   0x00000070U
+#define XSYSMONPSU_VCC_PSPLL4_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSPLL4_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSPLL4_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSPLL4_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPsbatt
+ */
+#define XSYSMONPSU_VCC_PSBATT_OFFSET   0x00000074U
+#define XSYSMONPSU_VCC_PSBATT_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSBATT_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSBATT_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSBATT_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccint
+ */
+#define XSYSMONPSU_VCCINT_OFFSET   0x00000078U
+#define XSYSMONPSU_VCCINT_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCCINT_VAL_SHIFT   0U
+#define XSYSMONPSU_VCCINT_VAL_WIDTH   16U
+#define XSYSMONPSU_VCCINT_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccbram
+ */
+#define XSYSMONPSU_VCCBRAM_OFFSET   0x0000007CU
+#define XSYSMONPSU_VCCBRAM_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCCBRAM_VAL_SHIFT   0U
+#define XSYSMONPSU_VCCBRAM_VAL_WIDTH   16U
+#define XSYSMONPSU_VCCBRAM_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccaux
+ */
+#define XSYSMONPSU_VCCAUX_OFFSET   0x00000080U
+#define XSYSMONPSU_VCCAUX_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCCAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VCCAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VCCAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccPsddrpll
+ */
+#define XSYSMONPSU_VCC_PSDDRPLL_OFFSET   0x00000084U
+#define XSYSMONPSU_VCC_PSDDRPLL_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCC_PSDDRPLL_VAL_SHIFT   0U
+#define XSYSMONPSU_VCC_PSDDRPLL_VAL_WIDTH   16U
+#define XSYSMONPSU_VCC_PSDDRPLL_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuDdrphyVref
+ */
+#define XSYSMONPSU_DDRPHY_VREF_OFFSET   0x00000088U
+#define XSYSMONPSU_DDRPHY_VREF_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_DDRPHY_VREF_VAL_SHIFT   0U
+#define XSYSMONPSU_DDRPHY_VREF_VAL_WIDTH   16U
+#define XSYSMONPSU_DDRPHY_VREF_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuDdrphyAto
+ */
+#define XSYSMONPSU_DDRPHY_ATO_OFFSET   0x0000008CU
+#define XSYSMONPSU_DDRPHY_ATO_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_DDRPHY_ATO_VAL_SHIFT   0U
+#define XSYSMONPSU_DDRPHY_ATO_VAL_WIDTH   16U
+#define XSYSMONPSU_DDRPHY_ATO_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuPsgtAt0
+ */
+#define XSYSMONPSU_PSGT_AT0_OFFSET   0x00000090U
+#define XSYSMONPSU_PSGT_AT0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_PSGT_AT0_VAL_SHIFT   0U
+#define XSYSMONPSU_PSGT_AT0_VAL_WIDTH   16U
+#define XSYSMONPSU_PSGT_AT0_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuPsgtAt1
+ */
+#define XSYSMONPSU_PSGT_AT1_OFFSET   0x00000094U
+#define XSYSMONPSU_PSGT_AT1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_PSGT_AT1_VAL_SHIFT   0U
+#define XSYSMONPSU_PSGT_AT1_VAL_WIDTH   16U
+#define XSYSMONPSU_PSGT_AT1_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuReserve0
+ */
+#define XSYSMONPSU_RESERVE0_OFFSET   0x00000098U
+#define XSYSMONPSU_RESERVE0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_RESERVE0_VAL_SHIFT   0U
+#define XSYSMONPSU_RESERVE0_VAL_WIDTH   16U
+#define XSYSMONPSU_RESERVE0_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuReserve1
+ */
+#define XSYSMONPSU_RESERVE1_OFFSET   0x0000009CU
+#define XSYSMONPSU_RESERVE1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_RESERVE1_VAL_SHIFT   0U
+#define XSYSMONPSU_RESERVE1_VAL_WIDTH   16U
+#define XSYSMONPSU_RESERVE1_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuTemp
+ */
+#define XSYSMONPSU_TEMP_OFFSET   0x00000000U
+#define XSYSMONPSU_TEMP_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_TEMP_SHIFT   0U
+#define XSYSMONPSU_TEMP_WIDTH   16U
+#define XSYSMONPSU_TEMP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup1
+ */
+#define XSYSMONPSU_SUP1_OFFSET   0x00000004U
+#define XSYSMONPSU_SUP1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP1_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP1_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP1_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup2
+ */
+#define XSYSMONPSU_SUP2_OFFSET   0x00000008U
+#define XSYSMONPSU_SUP2_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP2_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP2_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP2_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVpVn
+ */
+#define XSYSMONPSU_VP_VN_OFFSET   0x0000000CU
+#define XSYSMONPSU_VP_VN_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VP_VN_SHIFT   0U
+#define XSYSMONPSU_VP_VN_WIDTH   16U
+#define XSYSMONPSU_VP_VN_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVrefp
+ */
+#define XSYSMONPSU_VREFP_OFFSET   0x00000010U
+#define XSYSMONPSU_VREFP_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VREFP_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_VREFP_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_VREFP_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVrefn
+ */
+#define XSYSMONPSU_VREFN_OFFSET   0x00000014U
+#define XSYSMONPSU_VREFN_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VREFN_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_VREFN_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_VREFN_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup3
+ */
+#define XSYSMONPSU_SUP3_OFFSET   0x00000018U
+#define XSYSMONPSU_SUP3_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP3_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP3_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP3_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuCalSupOff
+ */
+#define XSYSMONPSU_CAL_SUP_OFF_OFFSET   0x00000020U
+#define XSYSMONPSU_CAL_SUP_OFF_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CAL_SUP_OFF_VAL_SHIFT   0U
+#define XSYSMONPSU_CAL_SUP_OFF_VAL_WIDTH   16U
+#define XSYSMONPSU_CAL_SUP_OFF_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuCalAdcBiplrOff
+ */
+#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_OFFSET   0x00000024U
+#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_VAL_SHIFT   0U
+#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_VAL_WIDTH   16U
+#define XSYSMONPSU_CAL_ADC_BIPLR_OFF_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuCalGainErr
+ */
+#define XSYSMONPSU_CAL_GAIN_ERR_OFFSET   0x00000028U
+#define XSYSMONPSU_CAL_GAIN_ERR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CAL_GAIN_ERR_VAL_SHIFT   0U
+#define XSYSMONPSU_CAL_GAIN_ERR_VAL_WIDTH   16U
+#define XSYSMONPSU_CAL_GAIN_ERR_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup4
+ */
+#define XSYSMONPSU_SUP4_OFFSET   0x00000034U
+#define XSYSMONPSU_SUP4_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP4_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP4_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP4_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup5
+ */
+#define XSYSMONPSU_SUP5_OFFSET   0x00000038U
+#define XSYSMONPSU_SUP5_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP5_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP5_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP5_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup6
+ */
+#define XSYSMONPSU_SUP6_OFFSET   0x0000003CU
+#define XSYSMONPSU_SUP6_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP6_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP6_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP6_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux00
+ */
+#define XSYSMONPSU_VAUX00_OFFSET   0x00000040U
+#define XSYSMONPSU_VAUX00_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX00_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX00_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX00_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux01
+ */
+#define XSYSMONPSU_VAUX01_OFFSET   0x00000044U
+#define XSYSMONPSU_VAUX01_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX01_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX01_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX01_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux02
+ */
+#define XSYSMONPSU_VAUX02_OFFSET   0x00000048U
+#define XSYSMONPSU_VAUX02_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX02_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX02_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX02_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux03
+ */
+#define XSYSMONPSU_VAUX03_OFFSET   0x0000004CU
+#define XSYSMONPSU_VAUX03_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX03_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX03_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX03_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux04
+ */
+#define XSYSMONPSU_VAUX04_OFFSET   0x00000050U
+#define XSYSMONPSU_VAUX04_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX04_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX04_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX04_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux05
+ */
+#define XSYSMONPSU_VAUX05_OFFSET   0x00000054U
+#define XSYSMONPSU_VAUX05_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX05_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX05_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX05_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux06
+ */
+#define XSYSMONPSU_VAUX06_OFFSET   0x00000058U
+#define XSYSMONPSU_VAUX06_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX06_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX06_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX06_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux07
+ */
+#define XSYSMONPSU_VAUX07_OFFSET   0x0000005CU
+#define XSYSMONPSU_VAUX07_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX07_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX07_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX07_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux08
+ */
+#define XSYSMONPSU_VAUX08_OFFSET   0x00000060U
+#define XSYSMONPSU_VAUX08_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX08_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX08_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX08_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux09
+ */
+#define XSYSMONPSU_VAUX09_OFFSET   0x00000064U
+#define XSYSMONPSU_VAUX09_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX09_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX09_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX09_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0a
+ */
+#define XSYSMONPSU_VAUX0A_OFFSET   0x00000068U
+#define XSYSMONPSU_VAUX0A_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0A_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0A_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0A_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0b
+ */
+#define XSYSMONPSU_VAUX0B_OFFSET   0x0000006CU
+#define XSYSMONPSU_VAUX0B_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0B_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0B_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0B_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0c
+ */
+#define XSYSMONPSU_VAUX0C_OFFSET   0x00000070U
+#define XSYSMONPSU_VAUX0C_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0C_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0C_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0C_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0d
+ */
+#define XSYSMONPSU_VAUX0D_OFFSET   0x00000074U
+#define XSYSMONPSU_VAUX0D_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0D_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0D_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0D_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0e
+ */
+#define XSYSMONPSU_VAUX0E_OFFSET   0x00000078U
+#define XSYSMONPSU_VAUX0E_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0E_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0E_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0E_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVaux0f
+ */
+#define XSYSMONPSU_VAUX0F_OFFSET   0x0000007CU
+#define XSYSMONPSU_VAUX0F_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VAUX0F_VAUX_VAL_SHIFT   0U
+#define XSYSMONPSU_VAUX0F_VAUX_VAL_WIDTH   16U
+#define XSYSMONPSU_VAUX0F_VAUX_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxTemp
+ */
+#define XSYSMONPSU_MAX_TEMP_OFFSET   0x00000080U
+#define XSYSMONPSU_MAX_TEMP_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_TEMP_SHIFT   0U
+#define XSYSMONPSU_MAX_TEMP_WIDTH   16U
+#define XSYSMONPSU_MAX_TEMP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup1
+ */
+#define XSYSMONPSU_MAX_SUP1_OFFSET   0x00000084U
+#define XSYSMONPSU_MAX_SUP1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP1_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP1_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP1_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup2
+ */
+#define XSYSMONPSU_MAX_SUP2_OFFSET   0x00000088U
+#define XSYSMONPSU_MAX_SUP2_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP2_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP2_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP2_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup3
+ */
+#define XSYSMONPSU_MAX_SUP3_OFFSET   0x0000008CU
+#define XSYSMONPSU_MAX_SUP3_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP3_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP3_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP3_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinTemp
+ */
+#define XSYSMONPSU_MIN_TEMP_OFFSET   0x00000090U
+#define XSYSMONPSU_MIN_TEMP_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_TEMP_SHIFT   0U
+#define XSYSMONPSU_MIN_TEMP_WIDTH   16U
+#define XSYSMONPSU_MIN_TEMP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup1
+ */
+#define XSYSMONPSU_MIN_SUP1_OFFSET   0x00000094U
+#define XSYSMONPSU_MIN_SUP1_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP1_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP1_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP1_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup2
+ */
+#define XSYSMONPSU_MIN_SUP2_OFFSET   0x00000098U
+#define XSYSMONPSU_MIN_SUP2_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP2_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP2_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP2_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup3
+ */
+#define XSYSMONPSU_MIN_SUP3_OFFSET   0x0000009CU
+#define XSYSMONPSU_MIN_SUP3_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP3_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP3_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP3_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup4
+ */
+#define XSYSMONPSU_MAX_SUP4_OFFSET   0x000000A0U
+#define XSYSMONPSU_MAX_SUP4_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP4_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP4_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP4_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup5
+ */
+#define XSYSMONPSU_MAX_SUP5_OFFSET   0x000000A4U
+#define XSYSMONPSU_MAX_SUP5_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP5_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP5_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP5_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup6
+ */
+#define XSYSMONPSU_MAX_SUP6_OFFSET   0x000000A8U
+#define XSYSMONPSU_MAX_SUP6_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP6_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP6_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP6_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup4
+ */
+#define XSYSMONPSU_MIN_SUP4_OFFSET   0x000000B0U
+#define XSYSMONPSU_MIN_SUP4_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP4_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP4_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP4_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup5
+ */
+#define XSYSMONPSU_MIN_SUP5_OFFSET   0x000000B4U
+#define XSYSMONPSU_MIN_SUP5_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP5_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP5_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP5_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup6
+ */
+#define XSYSMONPSU_MIN_SUP6_OFFSET   0x000000B8U
+#define XSYSMONPSU_MIN_SUP6_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP6_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP6_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP6_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuStsFlag
+ */
+#define XSYSMONPSU_STS_FLAG_OFFSET   0x000000FCU
+#define XSYSMONPSU_STS_FLAG_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_STS_FLAG_CLK_OSC_USED_SHIFT   15U
+#define XSYSMONPSU_STS_FLAG_CLK_OSC_USED_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_CLK_OSC_USED_MASK    0x00008000U
+
+#define XSYSMONPSU_STS_FLAG_BLK_IN_RST_SHIFT   14U
+#define XSYSMONPSU_STS_FLAG_BLK_IN_RST_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_BLK_IN_RST_MASK    0x00004000U
+
+#define XSYSMONPSU_STS_FLAG_JTAG_DISD_SHIFT   11U
+#define XSYSMONPSU_STS_FLAG_JTAG_DISD_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_JTAG_DISD_MASK    0x00000800U
+
+#define XSYSMONPSU_STS_FLAG_JTAG_RD_ONLY_SHIFT   10U
+#define XSYSMONPSU_STS_FLAG_JTAG_RD_ONLY_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_JTAG_RD_ONLY_MASK    0x00000400U
+
+#define XSYSMONPSU_STS_FLAG_INTRNL_REF_SHIFT   9U
+#define XSYSMONPSU_STS_FLAG_INTRNL_REF_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_INTRNL_REF_MASK    0x00000200U
+
+#define XSYSMONPSU_STS_FLAG_DISD_SHIFT   8U
+#define XSYSMONPSU_STS_FLAG_DISD_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_DISD_MASK    0x00000100U
+
+#define XSYSMONPSU_STS_FLAG_ALM_6_3_SHIFT   4U
+#define XSYSMONPSU_STS_FLAG_ALM_6_3_WIDTH   4U
+#define XSYSMONPSU_STS_FLAG_ALM_6_3_MASK    0x000000f0U
+
+#define XSYSMONPSU_STS_FLAG_OT_SHIFT   3U
+#define XSYSMONPSU_STS_FLAG_OT_WIDTH   1U
+#define XSYSMONPSU_STS_FLAG_OT_MASK    0x00000008U
+
+#define XSYSMONPSU_STS_FLAG_ALM_2_0_SHIFT   0U
+#define XSYSMONPSU_STS_FLAG_ALM_2_0_WIDTH   3U
+#define XSYSMONPSU_STS_FLAG_ALM_2_0_MASK    0x00000007U
+
+/**
+ * Register: XSysmonPsuCfgReg0
+ */
+#define XSYSMONPSU_CFG_REG0_OFFSET   0x00000100U
+#define XSYSMONPSU_CFG_REG0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CFG_REG0_AVRGNG_SHIFT   12U
+#define XSYSMONPSU_CFG_REG0_AVRGNG_WIDTH   2U
+#define XSYSMONPSU_CFG_REG0_AVRGNG_MASK    0x00003000U
+
+#define XSYSMONPSU_CFG_REG0_XTRNL_MUX_SHIFT   11U
+#define XSYSMONPSU_CFG_REG0_XTRNL_MUX_WIDTH   1U
+#define XSYSMONPSU_CFG_REG0_XTRNL_MUX_MASK    0x00000800U
+
+#define XSYSMONPSU_CFG_REG0_BU_SHIFT   10U
+#define XSYSMONPSU_CFG_REG0_BU_WIDTH   1U
+#define XSYSMONPSU_CFG_REG0_BU_MASK    0x00000400U
+
+#define XSYSMONPSU_CFG_REG0_EC_SHIFT   9U
+#define XSYSMONPSU_CFG_REG0_EC_WIDTH   1U
+#define XSYSMONPSU_CFG_REG0_EC_MASK    0x00000200U
+
+#define XSYSMONPSU_EVENT_MODE	1
+#define XSYSMONPSU_CONTINUOUS_MODE 2
+
+#define XSYSMONPSU_CFG_REG0_ACQ_SHIFT   8U
+#define XSYSMONPSU_CFG_REG0_ACQ_WIDTH   1U
+#define XSYSMONPSU_CFG_REG0_ACQ_MASK    0x00000100U
+
+#define XSYSMONPSU_CFG_REG0_MUX_CH_SHIFT   0U
+#define XSYSMONPSU_CFG_REG0_MUX_CH_WIDTH   6U
+#define XSYSMONPSU_CFG_REG0_MUX_CH_MASK    0x0000003fU
+
+/**
+ * Register: XSysmonPsuCfgReg1
+ */
+#define XSYSMONPSU_CFG_REG1_OFFSET   0x00000104U
+#define XSYSMONPSU_CFG_REG1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CFG_REG1_SEQ_MDE_SHIFT   12U
+#define XSYSMONPSU_CFG_REG1_SEQ_MDE_WIDTH   4U
+#define XSYSMONPSU_CFG_REG1_SEQ_MDE_MASK    0x0000f000U
+
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS6TO3_SHIFT   8U
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS6TO3_WIDTH   4U
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS6TO3_MASK    0x00000f00U
+
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS2TO0_SHIFT   1U
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS2TO0_WIDTH   3U
+#define XSYSMONPSU_CFG_REG1_ALRM_DIS2TO0_MASK    0x0000000eU
+
+#define XSYSMONPSU_CFG_REG1_OVR_TEMP_DIS_SHIFT   0U
+#define XSYSMONPSU_CFG_REG1_OVR_TEMP_DIS_WIDTH   1U
+#define XSYSMONPSU_CFG_REG1_OVR_TEMP_DIS_MASK    0x00000001U
+
+#define XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK 0x00000f0fU
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP6_MASK		0x0800U
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP5_MASK		0x0400U
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP4_MASK		0x0200U
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP3_MASK		0x0100U
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP2_MASK		0x0008U
+#define XSYSMONPSU_CFR_REG1_ALRM_SUP1_MASK		0x0004U
+#define XSYSMONPSU_CFR_REG1_ALRM_TEMP_MASK		0x0002U
+#define XSYSMONPSU_CFR_REG1_ALRM_OT_MASK		0x0001U
+
+/**
+ * Register: XSysmonPsuCfgReg2
+ */
+#define XSYSMONPSU_CFG_REG2_OFFSET   0x00000108U
+#define XSYSMONPSU_CFG_REG2_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT   8U
+#define XSYSMONPSU_CFG_REG2_CLK_DVDR_WIDTH   8U
+#define XSYSMONPSU_CFG_REG2_CLK_DVDR_MASK    0x0000ff00U
+
+#define XSYSMONPSU_CLK_DVDR_MIN_VAL			0U
+#define XSYSMONPSU_CLK_DVDR_MAX_VAL			255U
+
+#define XSYSMONPSU_CFG_REG2_PWR_DOWN_SHIFT   4U
+#define XSYSMONPSU_CFG_REG2_PWR_DOWN_WIDTH   4U
+#define XSYSMONPSU_CFG_REG2_PWR_DOWN_MASK    0x000000f0U
+
+#define XSYSMONPSU_CFG_REG2_TST_CH_EN_SHIFT   2U
+#define XSYSMONPSU_CFG_REG2_TST_CH_EN_WIDTH   1U
+#define XSYSMONPSU_CFG_REG2_TST_CH_EN_MASK    0x00000004U
+
+#define XSYSMONPSU_CFG_REG2_TST_MDE_SHIFT   0U
+#define XSYSMONPSU_CFG_REG2_TST_MDE_WIDTH   2U
+#define XSYSMONPSU_CFG_REG2_TST_MDE_MASK    0x00000003U
+
+/* Register: XSysmonPsuCfgReg3 */
+#define XSYSMONPSU_CFG_REG3_OFFSET		0x0000010CU
+#define XSYSMONPSU_CFG_REG3_ALRM_ALL_MASK	0x0000003FU
+
+#define XSM_CFG_ALARM_SHIFT			16U
+
+/* Register: XSysmonPsuSeqCh2 */
+#define XSYSMONPSU_SEQ_CH2_OFFSET   0x00000118U
+
+#define XSYSMONPSU_SEQ_CH2_TEMP_RMT_SHIFT	5U
+#define XSYSMONPSU_SEQ_CH2_TEMP_RMT_MASK	0x00000020U
+
+#define XSYSMONPSU_SEQ_CH2_VCCAMS_SHIFT		4U
+#define XSYSMONPSU_SEQ_CH2_VCCAMS_MASK		0x00000010U
+
+#define XSYSMONPSU_SEQ_CH2_SUP10_SHIFT		3U
+#define XSYSMONPSU_SEQ_CH2_SUP10_MASK		0x00000008U
+
+#define XSYSMONPSU_SEQ_CH2_SUP9_SHIFT		2U
+#define XSYSMONPSU_SEQ_CH2_SUP9_MASK		0x00000004U
+
+#define XSYSMONPSU_SEQ_CH2_SUP8_SHIFT		1U
+#define XSYSMONPSU_SEQ_CH2_SUP8_MASK		0x00000002U
+
+#define XSYSMONPSU_SEQ_CH2_SUP7_SHIFT		0U
+#define XSYSMONPSU_SEQ_CH2_SUP7_MASK		0x00000001U
+
+#define XSYSMONPSU_SEQ_CH2_VALID_MASK     	0x0000003FU
+
+/* Register: XSysmonPsuSeqAverage0 */
+#define XSYSMONPSU_SEQ_AVERAGE2_OFFSET  0x0000011CU
+#define XSYSMONPSU_SEQ_AVERAGE1_RSTVAL  0x00000000U
+#define XSYSMONPSU_SEQ_AVERAGE2_MASK	0x0000003FU
+
+/**
+ * Register: XSysmonPsuSeqCh0
+ */
+#define XSYSMONPSU_SEQ_CH0_OFFSET   0x00000120U
+#define XSYSMONPSU_SEQ_CH0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_CH0_CUR_MON_SHIFT   15U
+#define XSYSMONPSU_SEQ_CH0_CUR_MON_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_CUR_MON_MASK    0x00008000U
+
+#define XSYSMONPSU_SEQ_CH0_SUP3_SHIFT   14U
+#define XSYSMONPSU_SEQ_CH0_SUP3_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP3_MASK    0x00004000U
+
+#define XSYSMONPSU_SEQ_CH0_VREFN_SHIFT   13U
+#define XSYSMONPSU_SEQ_CH0_VREFN_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_VREFN_MASK    0x00002000U
+
+#define XSYSMONPSU_SEQ_CH0_VREFP_SHIFT   12U
+#define XSYSMONPSU_SEQ_CH0_VREFP_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_VREFP_MASK    0x00001000U
+
+#define XSYSMONPSU_SEQ_CH0_VP_VN_SHIFT   11U
+#define XSYSMONPSU_SEQ_CH0_VP_VN_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_VP_VN_MASK    0x00000800U
+
+#define XSYSMONPSU_SEQ_CH0_SUP2_SHIFT   10U
+#define XSYSMONPSU_SEQ_CH0_SUP2_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP2_MASK    0x00000400U
+
+#define XSYSMONPSU_SEQ_CH0_SUP1_SHIFT   9U
+#define XSYSMONPSU_SEQ_CH0_SUP1_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP1_MASK    0x00000200U
+
+#define XSYSMONPSU_SEQ_CH0_TEMP_SHIFT   8U
+#define XSYSMONPSU_SEQ_CH0_TEMP_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_TEMP_MASK    0x00000100U
+
+#define XSYSMONPSU_SEQ_CH0_SUP6_SHIFT   7U
+#define XSYSMONPSU_SEQ_CH0_SUP6_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP6_MASK    0x00000080U
+
+#define XSYSMONPSU_SEQ_CH0_SUP5_SHIFT   6U
+#define XSYSMONPSU_SEQ_CH0_SUP5_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP5_MASK    0x00000040U
+
+#define XSYSMONPSU_SEQ_CH0_SUP4_SHIFT   5U
+#define XSYSMONPSU_SEQ_CH0_SUP4_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_SUP4_MASK    0x00000020U
+
+#define XSYSMONPSU_SEQ_CH0_TST_CH_SHIFT   3U
+#define XSYSMONPSU_SEQ_CH0_TST_CH_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_TST_CH_MASK    0x00000008U
+
+#define XSYSMONPSU_SEQ_CH0_CALIBRTN_SHIFT   0U
+#define XSYSMONPSU_SEQ_CH0_CALIBRTN_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH0_CALIBRTN_MASK    0x00000001U
+
+#define XSYSMONPSU_SEQ_CH0_VALID_MASK     0x0000FFE9U
+
+/**
+ * Register: XSysmonPsuSeqCh1
+ */
+#define XSYSMONPSU_SEQ_CH1_OFFSET         0x00000124U
+#define XSYSMONPSU_SEQ_CH1_VALID_MASK     0x0000FFFFU
+#define XSYSMONPSU_SEQ_CH1_RSTVAL         0x00000000U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0F_SHIFT   15U
+#define XSYSMONPSU_SEQ_CH1_VAUX0F_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0F_MASK    0x00008000U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0E_SHIFT   14U
+#define XSYSMONPSU_SEQ_CH1_VAUX0E_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0E_MASK    0x00004000U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0D_SHIFT   13U
+#define XSYSMONPSU_SEQ_CH1_VAUX0D_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0D_MASK    0x00002000U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0C_SHIFT   12U
+#define XSYSMONPSU_SEQ_CH1_VAUX0C_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0C_MASK    0x00001000U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0B_SHIFT   11U
+#define XSYSMONPSU_SEQ_CH1_VAUX0B_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0B_MASK    0x00000800U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX0A_SHIFT   10U
+#define XSYSMONPSU_SEQ_CH1_VAUX0A_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX0A_MASK    0x00000400U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX09_SHIFT   9U
+#define XSYSMONPSU_SEQ_CH1_VAUX09_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX09_MASK    0x00000200U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX08_SHIFT   8U
+#define XSYSMONPSU_SEQ_CH1_VAUX08_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX08_MASK    0x00000100U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX07_SHIFT   7U
+#define XSYSMONPSU_SEQ_CH1_VAUX07_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX07_MASK    0x00000080U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX06_SHIFT   6U
+#define XSYSMONPSU_SEQ_CH1_VAUX06_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX06_MASK    0x00000040U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX05_SHIFT   5U
+#define XSYSMONPSU_SEQ_CH1_VAUX05_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX05_MASK    0x00000020U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX04_SHIFT   4U
+#define XSYSMONPSU_SEQ_CH1_VAUX04_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX04_MASK    0x00000010U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX03_SHIFT   3U
+#define XSYSMONPSU_SEQ_CH1_VAUX03_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX03_MASK    0x00000008U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX02_SHIFT   2U
+#define XSYSMONPSU_SEQ_CH1_VAUX02_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX02_MASK    0x00000004U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX01_SHIFT   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX01_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX01_MASK    0x00000002U
+
+#define XSYSMONPSU_SEQ_CH1_VAUX00_SHIFT   0U
+#define XSYSMONPSU_SEQ_CH1_VAUX00_WIDTH   1U
+#define XSYSMONPSU_SEQ_CH1_VAUX00_MASK    0x00000001U
+
+#define XSM_SEQ_CH_SHIFT                  16U
+#define XSM_SEQ_CH2_SHIFT                 32U
+
+/**
+ * Register: XSysmonPsuSeqAverage0
+ */
+#define XSYSMONPSU_SEQ_AVERAGE0_OFFSET   0x00000128U
+#define XSYSMONPSU_SEQ_AVERAGE0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_AVERAGE0_SHIFT   0U
+#define XSYSMONPSU_SEQ_AVERAGE0_WIDTH   16U
+#define XSYSMONPSU_SEQ_AVERAGE0_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSeqAverage1
+ */
+#define XSYSMONPSU_SEQ_AVERAGE1_OFFSET   0x0000012CU
+#define XSYSMONPSU_SEQ_AVERAGE1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_AVERAGE1_SHIFT   0U
+#define XSYSMONPSU_SEQ_AVERAGE1_WIDTH   16U
+#define XSYSMONPSU_SEQ_AVERAGE1_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSeqInputMde0
+ */
+#define XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET   0x00000130U
+#define XSYSMONPSU_SEQ_INPUT_MDE0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_INPUT_MDE0_SHIFT   0U
+#define XSYSMONPSU_SEQ_INPUT_MDE0_WIDTH   16U
+#define XSYSMONPSU_SEQ_INPUT_MDE0_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSeqInputMde1
+ */
+#define XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET   0x00000134U
+#define XSYSMONPSU_SEQ_INPUT_MDE1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_INPUT_MDE1_SHIFT   0U
+#define XSYSMONPSU_SEQ_INPUT_MDE1_WIDTH   16U
+#define XSYSMONPSU_SEQ_INPUT_MDE1_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSeqAcq0
+ */
+#define XSYSMONPSU_SEQ_ACQ0_OFFSET   0x00000138U
+#define XSYSMONPSU_SEQ_ACQ0_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_ACQ0_SHIFT   0U
+#define XSYSMONPSU_SEQ_ACQ0_WIDTH   16U
+#define XSYSMONPSU_SEQ_ACQ0_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSeqAcq1
+ */
+#define XSYSMONPSU_SEQ_ACQ1_OFFSET   0x0000013CU
+#define XSYSMONPSU_SEQ_ACQ1_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SEQ_ACQ1_SHIFT   0U
+#define XSYSMONPSU_SEQ_ACQ1_WIDTH   16U
+#define XSYSMONPSU_SEQ_ACQ1_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmTempUpr
+ */
+#define XSYSMONPSU_ALRM_TEMP_UPR_OFFSET   0x00000140U
+#define XSYSMONPSU_ALRM_TEMP_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_TEMP_UPR_SHIFT   0U
+#define XSYSMONPSU_ALRM_TEMP_UPR_WIDTH   16U
+#define XSYSMONPSU_ALRM_TEMP_UPR_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup1Upr
+ */
+#define XSYSMONPSU_ALRM_SUP1_UPR_OFFSET   0x00000144U
+#define XSYSMONPSU_ALRM_SUP1_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP1_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP1_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP1_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup2Upr
+ */
+#define XSYSMONPSU_ALRM_SUP2_UPR_OFFSET   0x00000148U
+#define XSYSMONPSU_ALRM_SUP2_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP2_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP2_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP2_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmOtUpr
+ */
+#define XSYSMONPSU_ALRM_OT_UPR_OFFSET   0x0000014CU
+#define XSYSMONPSU_ALRM_OT_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_OT_UPR_TEMP_SHIFT   0U
+#define XSYSMONPSU_ALRM_OT_UPR_TEMP_WIDTH   16U
+#define XSYSMONPSU_ALRM_OT_UPR_TEMP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmTempLwr
+ */
+#define XSYSMONPSU_ALRM_TEMP_LWR_OFFSET   0x00000150U
+#define XSYSMONPSU_ALRM_TEMP_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_TEMP_LWR_SHIFT   1U
+#define XSYSMONPSU_ALRM_TEMP_LWR_WIDTH   15U
+#define XSYSMONPSU_ALRM_TEMP_LWR_MASK    0x0000fffeU
+
+#define XSYSMONPSU_ALRM_TEMP_LWR_TSHLD_MDE_SHIFT   0U
+#define XSYSMONPSU_ALRM_TEMP_LWR_TSHLD_MDE_WIDTH   1U
+#define XSYSMONPSU_ALRM_TEMP_LWR_TSHLD_MDE_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuAlrmSup1Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP1_LWR_OFFSET   0x00000154U
+#define XSYSMONPSU_ALRM_SUP1_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP1_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP1_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP1_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup2Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP2_LWR_OFFSET   0x00000158U
+#define XSYSMONPSU_ALRM_SUP2_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP2_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP2_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP2_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmOtLwr
+ */
+#define XSYSMONPSU_ALRM_OT_LWR_OFFSET   0x0000015CU
+#define XSYSMONPSU_ALRM_OT_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_OT_LWR_TEMP_SHIFT   1U
+#define XSYSMONPSU_ALRM_OT_LWR_TEMP_WIDTH   15U
+#define XSYSMONPSU_ALRM_OT_LWR_TEMP_MASK    0x0000fffeU
+
+#define XSYSMONPSU_ALRM_OT_LWR_TSHLD_MDE_SHIFT   0U
+#define XSYSMONPSU_ALRM_OT_LWR_TSHLD_MDE_WIDTH   1U
+#define XSYSMONPSU_ALRM_OT_LWR_TSHLD_MDE_MASK    0x00000001U
+
+/**
+ * Register: XSysmonPsuAlrmSup3Upr
+ */
+#define XSYSMONPSU_ALRM_SUP3_UPR_OFFSET   0x00000160U
+#define XSYSMONPSU_ALRM_SUP3_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP3_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP3_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP3_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup4Upr
+ */
+#define XSYSMONPSU_ALRM_SUP4_UPR_OFFSET   0x00000164U
+#define XSYSMONPSU_ALRM_SUP4_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP4_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP4_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP4_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup5Upr
+ */
+#define XSYSMONPSU_ALRM_SUP5_UPR_OFFSET   0x00000168U
+#define XSYSMONPSU_ALRM_SUP5_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP5_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP5_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP5_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup6Upr
+ */
+#define XSYSMONPSU_ALRM_SUP6_UPR_OFFSET   0x0000016CU
+#define XSYSMONPSU_ALRM_SUP6_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP6_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP6_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP6_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup3Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP3_LWR_OFFSET   0x00000170U
+#define XSYSMONPSU_ALRM_SUP3_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP3_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP3_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP3_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup4Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP4_LWR_OFFSET   0x00000174U
+#define XSYSMONPSU_ALRM_SUP4_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP4_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP4_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP4_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup5Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP5_LWR_OFFSET   0x00000178U
+#define XSYSMONPSU_ALRM_SUP5_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP5_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP5_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP5_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup6Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP6_LWR_OFFSET   0x0000017CU
+#define XSYSMONPSU_ALRM_SUP6_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP6_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP6_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP6_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup7Upr
+ */
+#define XSYSMONPSU_ALRM_SUP7_UPR_OFFSET   0x00000180U
+#define XSYSMONPSU_ALRM_SUP7_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP7_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP7_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP7_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup8Upr
+ */
+#define XSYSMONPSU_ALRM_SUP8_UPR_OFFSET   0x00000184U
+#define XSYSMONPSU_ALRM_SUP8_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP8_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP8_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP8_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup9Upr
+ */
+#define XSYSMONPSU_ALRM_SUP9_UPR_OFFSET   0x00000188U
+#define XSYSMONPSU_ALRM_SUP9_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP9_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP9_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP9_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup10Upr
+ */
+#define XSYSMONPSU_ALRM_SUP10_UPR_OFFSET   0x0000018CU
+#define XSYSMONPSU_ALRM_SUP10_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP10_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP10_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP10_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmVccamsUpr
+ */
+#define XSYSMONPSU_ALRM_VCCAMS_UPR_OFFSET   0x00000190U
+#define XSYSMONPSU_ALRM_VCCAMS_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_VCCAMS_UPR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_VCCAMS_UPR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_VCCAMS_UPR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmTremoteUpr
+ */
+#define XSYSMONPSU_ALRM_TREMOTE_UPR_OFFSET   0x00000194U
+#define XSYSMONPSU_ALRM_TREMOTE_UPR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_TREMOTE_UPR_TEMP_SHIFT   0U
+#define XSYSMONPSU_ALRM_TREMOTE_UPR_TEMP_WIDTH   16U
+#define XSYSMONPSU_ALRM_TREMOTE_UPR_TEMP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup7Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP7_LWR_OFFSET   0x000001A0U
+#define XSYSMONPSU_ALRM_SUP7_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP7_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP7_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP7_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup8Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP8_LWR_OFFSET   0x000001A4U
+#define XSYSMONPSU_ALRM_SUP8_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP8_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP8_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP8_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup9Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP9_LWR_OFFSET   0x000001A8U
+#define XSYSMONPSU_ALRM_SUP9_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP9_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP9_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP9_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmSup10Lwr
+ */
+#define XSYSMONPSU_ALRM_SUP10_LWR_OFFSET   0x000001ACU
+#define XSYSMONPSU_ALRM_SUP10_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_SUP10_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_SUP10_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_SUP10_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmVccamsLwr
+ */
+#define XSYSMONPSU_ALRM_VCCAMS_LWR_OFFSET   0x000001B0U
+#define XSYSMONPSU_ALRM_VCCAMS_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_VCCAMS_LWR_SUP_SHIFT   0U
+#define XSYSMONPSU_ALRM_VCCAMS_LWR_SUP_WIDTH   16U
+#define XSYSMONPSU_ALRM_VCCAMS_LWR_SUP_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuAlrmTremoteLwr
+ */
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_OFFSET   0x000001B4U
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TEMP_SHIFT   1U
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TEMP_WIDTH   15U
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TEMP_MASK    0x0000fffeU
+
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TSHLD_MDE_SHIFT   0U
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TSHLD_MDE_WIDTH   1U
+#define XSYSMONPSU_ALRM_TREMOTE_LWR_TSHLD_MDE_MASK    0x00000001U
+
+/* Register: XSysmonPsuSeqInputMde2 */
+#define XSYSMONPSU_SEQ_INPUT_MDE2_OFFSET	0x000001E0U
+#define XSYSMONPSU_SEQ_INPUT_MDE2_RSTVAL	0x00000000U
+
+#define XSYSMONPSU_SEQ_INPUT_MDE2_SHIFT		0U
+#define XSYSMONPSU_SEQ_INPUT_MDE2_MASK		0x0000003FU
+
+/**
+ * Register: XSysmonPsuSeqAcq2
+ */
+#define XSYSMONPSU_SEQ_ACQ2_OFFSET		0x000001E4U
+#define XSYSMONPSU_SEQ_ACQ2_RSTVAL		0x00000000U
+
+#define XSYSMONPSU_SEQ_ACQ2_SHIFT		0U
+#define XSYSMONPSU_SEQ_ACQ2_MASK		0x0000003FU
+
+/**
+ * Register: XSysmonPsuSup7
+ */
+#define XSYSMONPSU_SUP7_OFFSET   0x00000200U
+#define XSYSMONPSU_SUP7_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP7_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP7_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP7_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup8
+ */
+#define XSYSMONPSU_SUP8_OFFSET   0x00000204U
+#define XSYSMONPSU_SUP8_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP8_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP8_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP8_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup9
+ */
+#define XSYSMONPSU_SUP9_OFFSET   0x00000208U
+#define XSYSMONPSU_SUP9_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP9_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP9_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP9_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuSup10
+ */
+#define XSYSMONPSU_SUP10_OFFSET   0x0000020CU
+#define XSYSMONPSU_SUP10_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_SUP10_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_SUP10_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_SUP10_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuVccams
+ */
+#define XSYSMONPSU_VCCAMS_OFFSET   0x00000210U
+#define XSYSMONPSU_VCCAMS_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_VCCAMS_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_VCCAMS_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_VCCAMS_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuTempRemte
+ */
+#define XSYSMONPSU_TEMP_REMTE_OFFSET   0x00000214U
+#define XSYSMONPSU_TEMP_REMTE_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_TEMP_REMTE_SHIFT   0U
+#define XSYSMONPSU_TEMP_REMTE_WIDTH   16U
+#define XSYSMONPSU_TEMP_REMTE_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup7
+ */
+#define XSYSMONPSU_MAX_SUP7_OFFSET   0x00000280U
+#define XSYSMONPSU_MAX_SUP7_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP7_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP7_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP7_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup8
+ */
+#define XSYSMONPSU_MAX_SUP8_OFFSET   0x00000284U
+#define XSYSMONPSU_MAX_SUP8_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP8_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP8_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP8_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup9
+ */
+#define XSYSMONPSU_MAX_SUP9_OFFSET   0x00000288U
+#define XSYSMONPSU_MAX_SUP9_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP9_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP9_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP9_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxSup10
+ */
+#define XSYSMONPSU_MAX_SUP10_OFFSET   0x0000028CU
+#define XSYSMONPSU_MAX_SUP10_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_SUP10_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_SUP10_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_SUP10_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxVccams
+ */
+#define XSYSMONPSU_MAX_VCCAMS_OFFSET   0x00000290U
+#define XSYSMONPSU_MAX_VCCAMS_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_VCCAMS_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MAX_VCCAMS_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MAX_VCCAMS_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMaxTempRemte
+ */
+#define XSYSMONPSU_MAX_TEMP_REMTE_OFFSET   0x00000294U
+#define XSYSMONPSU_MAX_TEMP_REMTE_RSTVAL   0x00000000U
+
+#define XSYSMONPSU_MAX_TEMP_REMTE_SHIFT   0U
+#define XSYSMONPSU_MAX_TEMP_REMTE_WIDTH   16U
+#define XSYSMONPSU_MAX_TEMP_REMTE_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup7
+ */
+#define XSYSMONPSU_MIN_SUP7_OFFSET   0x000002A0U
+#define XSYSMONPSU_MIN_SUP7_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP7_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP7_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP7_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup8
+ */
+#define XSYSMONPSU_MIN_SUP8_OFFSET   0x000002A4U
+#define XSYSMONPSU_MIN_SUP8_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP8_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP8_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP8_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup9
+ */
+#define XSYSMONPSU_MIN_SUP9_OFFSET   0x000002A8U
+#define XSYSMONPSU_MIN_SUP9_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP9_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP9_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP9_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinSup10
+ */
+#define XSYSMONPSU_MIN_SUP10_OFFSET   0x000002ACU
+#define XSYSMONPSU_MIN_SUP10_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_SUP10_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_SUP10_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_SUP10_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinVccams
+ */
+#define XSYSMONPSU_MIN_VCCAMS_OFFSET   0x000002B0U
+#define XSYSMONPSU_MIN_VCCAMS_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_VCCAMS_SUP_VAL_SHIFT   0U
+#define XSYSMONPSU_MIN_VCCAMS_SUP_VAL_WIDTH   16U
+#define XSYSMONPSU_MIN_VCCAMS_SUP_VAL_MASK    0x0000ffffU
+
+/**
+ * Register: XSysmonPsuMinTempRemte
+ */
+#define XSYSMONPSU_MIN_TEMP_REMTE_OFFSET   0x000002B4U
+#define XSYSMONPSU_MIN_TEMP_REMTE_RSTVAL   0x0000ffffU
+
+#define XSYSMONPSU_MIN_TEMP_REMTE_SHIFT   0U
+#define XSYSMONPSU_MIN_TEMP_REMTE_WIDTH   16U
+#define XSYSMONPSU_MIN_TEMP_REMTE_MASK    0x0000ffffU
+
+#define CSU_BASEADDR			0xFFCA0000U
+#define PCAP_STATUS_OFFSET		0x00003010U
+#define PL_CFG_RESET_MASK		0x00000040U
+#define PL_CFG_RESET_SHIFT		6U
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* This macro reads the given register.
+*
+* @param	RegisterAddr is the register address in the address
+* 			space of the SYSMONPSU device.
+*
+* @return	The 32-bit value of the register
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XSysmonPsu_ReadReg(RegisterAddr) Xil_In32(RegisterAddr)
+
+/****************************************************************************/
+/**
+*
+* This macro writes the given register.
+*
+* @param	RegisterAddr is the register address in the address
+* 			space of the SYSMONPSU device.
+* @param	Data is the 32-bit value to write to the register.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+#define XSysmonPsu_WriteReg(RegisterAddr, Data) Xil_Out32(RegisterAddr, (u32)(Data))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XSYSMONPSU_HW_H__ */
diff --git a/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_intr.c b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_intr.c
new file mode 100644
index 0000000..12d9219
--- /dev/null
+++ b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_intr.c
@@ -0,0 +1,250 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsysmonpsu_intr.c
+*
+* This file contains functions related to SYSMONPSU interrupt handling.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.0   kvn    12/15/15 First release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xsysmonpsu.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions ****************************/
+
+/****************************************************************************/
+/**
+*
+* This function enables the specified interrupts in the device.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	Mask is the 64 bit-mask of the interrupts to be enabled.
+*		Bit positions of 1 will be enabled. Bit positions of 0 will
+*		keep the previous setting. This mask is formed by OR'ing
+*		XSYSMONPSU_IER_0_* and XSYSMONPSU_IER_1_* bits defined in
+*		xsysmonpsu_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XSysMonPsu_IntrEnable(XSysMonPsu *InstancePtr, u64 Mask)
+{
+	u32 RegValue;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Enable the specified interrupts in the AMS Interrupt Enable Register. */
+	RegValue = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+					XSYSMONPSU_IER_0_OFFSET);
+	RegValue |= (u32)(Mask & (u64)XSYSMONPSU_IXR_0_MASK);
+	XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress + XSYSMONPSU_IER_0_OFFSET,
+			  RegValue);
+
+	RegValue = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+					XSYSMONPSU_IER_1_OFFSET);
+	RegValue |= (u32)((Mask >> XSYSMONPSU_IXR_1_SHIFT) & XSYSMONPSU_IXR_1_MASK);
+	XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress + XSYSMONPSU_IER_1_OFFSET,
+			  RegValue);
+}
+
+/****************************************************************************/
+/**
+*
+* This function disables the specified interrupts in the device.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	Mask is the 64 bit-mask of the interrupts to be disabled.
+*		Bit positions of 1 will be disabled. Bit positions of 0 will
+*		keep the previous setting. This mask is formed by OR'ing
+*		XSYSMONPSU_IDR_0_* and XSYSMONPSU_IDR_1_* bits defined in
+*		xsysmonpsu_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XSysMonPsu_IntrDisable(XSysMonPsu *InstancePtr, u64 Mask)
+{
+	u32 RegValue;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Disable the specified interrupts in the AMS Interrupt Disable Register. */
+	RegValue = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+					XSYSMONPSU_IDR_0_OFFSET);
+	RegValue |= (u32)(Mask & (u64)XSYSMONPSU_IXR_0_MASK);
+	XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress + XSYSMONPSU_IDR_0_OFFSET,
+			  RegValue);
+
+	RegValue = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+					XSYSMONPSU_IDR_1_OFFSET);
+	RegValue |= (u32)((Mask >> XSYSMONPSU_IXR_1_SHIFT) & XSYSMONPSU_IXR_1_MASK);
+	XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress + XSYSMONPSU_IDR_1_OFFSET,
+			  RegValue);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the enabled interrupts read from the Interrupt Enable
+* Register (IER). Use the XSYSMONPSU_IER_0_* and XSYSMONPSU_IER_1_* constants
+* defined in xsysmonpsu_hw.h to interpret the returned value.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+*
+* @return	A 64-bit value representing the contents of the Interrupt Mask
+* 			Registers (IMR1 IMR0).
+*
+* @note		None.
+*
+*****************************************************************************/
+u64 XSysMonPsu_IntrGetEnabled(XSysMonPsu *InstancePtr)
+{
+	u64 MaskedInterrupts;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Return the value read from the AMS Interrupt Mask Register. */
+	MaskedInterrupts = (u64)XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+                         XSYSMONPSU_IMR_0_OFFSET) & (u64)XSYSMONPSU_IXR_0_MASK;
+	MaskedInterrupts |= ((u64)XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+                         XSYSMONPSU_IMR_1_OFFSET) & (u64)XSYSMONPSU_IXR_1_MASK)
+                          << XSYSMONPSU_IXR_1_SHIFT;
+
+	return (~MaskedInterrupts);
+}
+
+/****************************************************************************/
+/**
+*
+* This function returns the interrupt status read from Interrupt Status
+* Register(ISR). Use the XSYSMONPSU_ISR_0_* and XSYSMONPSU_ISR_1_ constants
+* defined in xsysmonpsu_hw.h to interpret the returned value.
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+*
+* @return	A 64-bit value representing the contents of the Interrupt Status
+* 			Registers (ISR1 ISR0).
+*
+* @note		None.
+*
+*****************************************************************************/
+u64 XSysMonPsu_IntrGetStatus(XSysMonPsu *InstancePtr)
+{
+	u64 IntrStatusRegister;
+
+	/* Assert the arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Return the value read from the AMS ISR. */
+	IntrStatusRegister = (u64)XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+                           XSYSMONPSU_ISR_0_OFFSET) & (u64)XSYSMONPSU_IXR_0_MASK;
+	IntrStatusRegister |= ((u64)XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+                           XSYSMONPSU_ISR_1_OFFSET) & (u64)XSYSMONPSU_IXR_1_MASK)
+                           << XSYSMONPSU_IXR_1_SHIFT;
+
+	return IntrStatusRegister;
+}
+
+/****************************************************************************/
+/**
+*
+* This function clears the specified interrupts in the Interrupt Status
+* Register (ISR).
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+* @param	Mask is the 64 bit-mask of the interrupts to be cleared.
+*		Bit positions of 1 will be cleared. Bit positions of 0 will not
+* 		change the previous interrupt status. This mask is formed by
+* 		OR'ing the XSYSMONPSU_ISR_0_* and XSYSMONPSU_ISR_1_* bits
+* 		which are defined in xsysmonpsu_hw.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XSysMonPsu_IntrClear(XSysMonPsu *InstancePtr, u64 Mask)
+{
+	u32 RegValue;
+
+	/* Assert the arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Clear the specified interrupts in the Interrupt Status register. */
+	RegValue = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+					XSYSMONPSU_ISR_0_OFFSET);
+	RegValue &= (u32)(Mask & (u64)XSYSMONPSU_IXR_0_MASK);
+	XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress + XSYSMONPSU_ISR_0_OFFSET,
+			  RegValue);
+
+	RegValue = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
+					XSYSMONPSU_ISR_1_OFFSET);
+	RegValue &= (u32)((Mask >> XSYSMONPSU_IXR_1_SHIFT) & XSYSMONPSU_IXR_1_MASK);
+	XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress + XSYSMONPSU_ISR_1_OFFSET,
+			  RegValue);
+}
+
+
+/** @} */
diff --git a/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_selftest.c b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_selftest.c
new file mode 100644
index 0000000..9b68b88
--- /dev/null
+++ b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_selftest.c
@@ -0,0 +1,132 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsysmon_selftest.c
+*
+* This file contains a diagnostic self test function for the XSysMon driver.
+* The self test function does a simple read/write test of the Alarm Threshold
+* Register.
+*
+* See xsysmonpsu.h for more information.
+*
+* @note	None.
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.0   kvn   12/15/15  First release
+*
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xsysmonpsu.h"
+
+/************************** Constant Definitions ****************************/
+
+/*
+ * The following constant defines the test value to be written
+ * to the Alarm Threshold Register
+ */
+#define XSM_ATR_TEST_VALUE 		0x55U
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+/*****************************************************************************/
+/**
+*
+* Run a self-test on the driver/device. The test
+*	- Resets the device,
+*	- Writes a value into the Alarm Threshold register and reads it back
+*	for comparison.
+*	- Resets the device again.
+*
+*
+* @param	InstancePtr is a pointer to the XSysMonPsu instance.
+*
+* @return
+*		- XST_SUCCESS if the value read from the Alarm Threshold
+*		register is the same as the value written.
+*		- XST_FAILURE Otherwise
+*
+* @note		This is a destructive test in that resets of the device are
+*		performed. Refer to the device specification for the
+*		device status after the reset operation.
+*
+******************************************************************************/
+s32 XSysMonPsu_SelfTest(XSysMonPsu *InstancePtr)
+{
+	s32 Status;
+	u32 RegValue;
+
+	/* Assert the argument */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Reset the device to get it back to its default state */
+	XSysMonPsu_Reset(InstancePtr);
+
+	/*
+	 * Write a value into the Alarm Threshold registers, read it back, and
+	 * do the comparison
+	 */
+	XSysMonPsu_SetAlarmThreshold(InstancePtr, XSM_ATR_SUP1_UPPER,
+				  XSM_ATR_TEST_VALUE, XSYSMON_PS);
+	RegValue = (u32)XSysMonPsu_GetAlarmThreshold(InstancePtr,
+					XSM_ATR_SUP1_UPPER, XSYSMON_PS);
+
+	if (RegValue == XSM_ATR_TEST_VALUE) {
+		Status = XST_SUCCESS;
+	} else {
+		Status = XST_FAILURE;
+	}
+
+	/* Reset the device again to its default state. */
+	XSysMonPsu_Reset(InstancePtr);
+
+	/* Return the test result. */
+	return Status;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_sinit.c b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_sinit.c
new file mode 100644
index 0000000..32e17ab
--- /dev/null
+++ b/src/Xilinx/libsrc/sysmonpsu_v2_3/src/xsysmonpsu_sinit.c
@@ -0,0 +1,99 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsysmonpsu_sinit.c
+*
+* This file contains the implementation of the XSysMonPsu driver's static
+* initialization functionality.
+*
+* @note		None.
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	    Changes
+* ----- -----  -------- -----------------------------------------------
+* 1.0   kvn    12/15/15 First release.
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xsysmonpsu.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+extern XSysMonPsu_Config XSysMonPsu_ConfigTable[];
+
+/*****************************************************************************/
+/**
+*
+* This function looks for the device configuration based on the unique device
+* ID. The table XSysmonPsu_ConfigTable[] contains the configuration information
+* for each device in the system.
+*
+* @param	DeviceId is the unique device ID of the device being looked up.
+*
+* @return	A pointer to the configuration table entry corresponding to the
+*		given device ID, or NULL if no match is found.
+*
+* @note		None.
+*
+******************************************************************************/
+XSysMonPsu_Config *XSysMonPsu_LookupConfig(u16 DeviceId)
+{
+	XSysMonPsu_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index = 0U; Index < (u32)XPAR_XSYSMONPSU_NUM_INSTANCES; Index++) {
+		if (XSysMonPsu_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XSysMonPsu_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return CfgPtr;
+}
diff --git a/src/Xilinx/libsrc/ttcps_v3_5/src/Makefile b/src/Xilinx/libsrc/ttcps_v3_5/src/Makefile
new file mode 100644
index 0000000..35c277d
--- /dev/null
+++ b/src/Xilinx/libsrc/ttcps_v3_5/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner ttcps_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling ttcps"
+
+ttcps_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: ttcps_includes
+
+ttcps_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/ttcps_v3_5/src/subdir.mk b/src/Xilinx/libsrc/ttcps_v3_5/src/subdir.mk
new file mode 100644
index 0000000..969e7b9
--- /dev/null
+++ b/src/Xilinx/libsrc/ttcps_v3_5/src/subdir.mk
@@ -0,0 +1,5 @@
+SRC += $(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_g.c
+SRC += $(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_options.c
+SRC += $(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_selftest.c
+SRC += $(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps_sinit.c
+SRC += $(SRC_DIR)/Xilinx/libsrc/ttcps_v3_5/src/xttcps.c
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps.c b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps.c
new file mode 100644
index 0000000..b2382f1
--- /dev/null
+++ b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps.c
@@ -0,0 +1,446 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xttcps.c
+* @addtogroup ttcps_v3_5
+* @{
+*
+* This file contains the implementation of the XTtcPs driver. This driver
+* controls the operation of one timer counter in the Triple Timer Counter (TTC)
+* module in the Ps block. Refer to xttcps.h for more detailed description
+* of the driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -------------------------------------------------
+* 1.00a drg/jz 01/21/10 First release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.01	pkp	   01/30/16 Modified XTtcPs_CfgInitialize to add XTtcps_Stop
+*						to stop the timer before configuring
+* 3.2   mus    10/28/16 Modified XTtcPs_CalcIntervalFromFreq to calculate
+*                       32 bit interval count for zynq ultrascale+mpsoc
+* 3.5   srm    10/06/17 Updated XTtcPs_GetMatchValue and XTtcPs_SetMatchValue
+*                       APIs to use correct match register width for zynq
+*                       (i.e. 16 bit) and zynq ultrascale+mpsoc (i.e. 32 bit).
+*                       It fixes CR# 986617
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xttcps.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+
+/*****************************************************************************/
+/**
+*
+* Initializes a specific XTtcPs instance such that the driver is ready to use.
+* This function initializes a single timer counter in the triple timer counter
+* function block.
+*
+* The state of the device after initialization is:
+*  - Overflow Mode
+*  - Internal (pclk) selected
+*  - Counter disabled
+*  - All Interrupts disabled
+*  - Output waveforms disabled
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	ConfigPtr is a reference to a structure containing information
+*		about a specific TTC device.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. The caller is responsible for keeping the address
+*		mapping from EffectiveAddr to the device physical base address
+*		unchanged once this function is invoked. Unexpected errors may
+*		occur if the address mapping changes after this function is
+*		called. If address translation is not used, then use
+*		ConfigPtr->BaseAddress for this parameter, passing the physical
+*		address instead.
+*
+* @return
+*
+* 		- XST_SUCCESS if the initialization is successful.
+*		- XST_DEVICE_IS_STARTED if the device is started. It must be
+*		  stopped to re-initialize.
+*
+* @note		Device has to be stopped first to call this function to
+*		initialize it.
+*
+******************************************************************************/
+s32 XTtcPs_CfgInitialize(XTtcPs *InstancePtr, XTtcPs_Config *ConfigPtr,
+			      u32 EffectiveAddr)
+{
+	s32 Status;
+	u32 IsStartResult;
+	/*
+	 * Assert to validate input arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+
+	/*
+	 * Set some default values
+	 */
+	InstancePtr->Config.DeviceId = ConfigPtr->DeviceId;
+	InstancePtr->Config.BaseAddress = EffectiveAddr;
+	InstancePtr->Config.InputClockHz = ConfigPtr->InputClockHz;
+
+	IsStartResult = XTtcPs_IsStarted(InstancePtr);
+	/*
+	 * If the timer counter has already started, return an error
+	 * Device should be stopped first.
+	 */
+	if(IsStartResult == (u32)TRUE) {
+		Status = XST_DEVICE_IS_STARTED;
+	} else {
+
+		/*
+		 * stop the timer before configuring
+		 */
+		XTtcPs_Stop(InstancePtr);
+		/*
+		 * Reset the count control register to it's default value.
+		 */
+		XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XTTCPS_CNT_CNTRL_OFFSET,
+				  XTTCPS_CNT_CNTRL_RESET_VALUE);
+
+		/*
+		 * Reset the rest of the registers to the default values.
+		 */
+		XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XTTCPS_CLK_CNTRL_OFFSET, 0x00U);
+		XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XTTCPS_INTERVAL_VAL_OFFSET, 0x00U);
+		XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XTTCPS_MATCH_1_OFFSET, 0x00U);
+		XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XTTCPS_MATCH_2_OFFSET, 0x00U);
+		XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XTTCPS_MATCH_2_OFFSET, 0x00U);
+		XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XTTCPS_IER_OFFSET, 0x00U);
+		XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XTTCPS_ISR_OFFSET, XTTCPS_IXR_ALL_MASK);
+
+		InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+
+		/*
+		 * Reset the counter value
+		 */
+		XTtcPs_ResetCounterValue(InstancePtr);
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function is used to set the match registers. There are three match
+* registers.
+*
+* The match 0 register is special. If the waveform output mode is enabled, the
+* waveform will change polarity when the count matches the value in the match 0
+* register. The polarity of the waveform output can also be set using the
+* XTtcPs_SetOptions() function.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	MatchIndex is the index to the match register to be set.
+*		Valid values are 0, 1, or 2.
+* @param	Value is the 16-bit value to be set in the match register.
+*
+* @return	None
+*
+* @note		None
+*
+****************************************************************************/
+void XTtcPs_SetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex, XMatchRegValue Value)
+{
+	/*
+	 * Assert to validate input arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(MatchIndex < (u8)XTTCPS_NUM_MATCH_REG);
+
+	/*
+	 * Write the value to the correct match register with MatchIndex
+	 */
+	XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+			  XTtcPs_Match_N_Offset(MatchIndex), Value);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function is used to get the value of the match registers. There are
+* three match registers.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	MatchIndex is the index to the match register to be set.
+*		Valid values are 0, 1, or 2.
+*
+* @return	The match register value
+*
+* @note		None
+*
+****************************************************************************/
+XMatchRegValue XTtcPs_GetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex)
+{
+	u32 MatchReg;
+
+	/*
+	 * Assert to validate input arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(MatchIndex < XTTCPS_NUM_MATCH_REG);
+
+	MatchReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
+			    XTtcPs_Match_N_Offset(MatchIndex));
+
+	return (XMatchRegValue) MatchReg;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the prescaler enable bit and if needed sets the prescaler
+* bits in the control register.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	PrescalerValue is a number from 0-16 that sets the prescaler
+*		to use.
+*		If the parameter is 0 - 15, use a prescaler on the clock of
+*		2^(PrescalerValue+1), or 2-65536.
+*		If the parameter is XTTCPS_CLK_CNTRL_PS_DISABLE, do not use a
+*		prescaler.
+*
+* @return	None
+*
+* @note		None
+*
+****************************************************************************/
+void XTtcPs_SetPrescaler(XTtcPs *InstancePtr, u8 PrescalerValue)
+{
+	u32 ClockReg;
+
+	/*
+	 * Assert to validate input arguments.
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(PrescalerValue <= XTTCPS_CLK_CNTRL_PS_DISABLE);
+
+	/*
+	 * Read the clock control register
+	 */
+	ClockReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
+			   XTTCPS_CLK_CNTRL_OFFSET);
+
+	/*
+	 * Clear all of the prescaler control bits in the register
+	 */
+	ClockReg &=
+		~(XTTCPS_CLK_CNTRL_PS_VAL_MASK | XTTCPS_CLK_CNTRL_PS_EN_MASK);
+
+	if (PrescalerValue < XTTCPS_CLK_CNTRL_PS_DISABLE) {
+		/*
+		 * Set the prescaler value and enable prescaler
+		 */
+		ClockReg |= (u32)(((u32)PrescalerValue << (u32)XTTCPS_CLK_CNTRL_PS_VAL_SHIFT) &
+			(u32)XTTCPS_CLK_CNTRL_PS_VAL_MASK);
+		ClockReg |= (u32)XTTCPS_CLK_CNTRL_PS_EN_MASK;
+	}
+
+	/*
+	 * Write the register with the new values.
+	 */
+	XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+			  XTTCPS_CLK_CNTRL_OFFSET, ClockReg);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function gets the input clock prescaler
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* 
+* @return	The value(n) from which the prescalar value is calculated
+*		as 2^(n+1). Some example values are given below :
+*
+* 	Value		Prescaler
+* 	0		2
+* 	1		4
+* 	N		2^(n+1)
+* 	15		65536
+* 	16		1
+* 

+*
+* @note		None.
+*
+****************************************************************************/
+u8 XTtcPs_GetPrescaler(XTtcPs *InstancePtr)
+{
+	u8 Status;
+	u32 ClockReg;
+
+	/*
+	 * Assert to validate input arguments.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read the clock control register
+	 */
+	ClockReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
+				    XTTCPS_CLK_CNTRL_OFFSET);
+
+	if (0 == (ClockReg & XTTCPS_CLK_CNTRL_PS_EN_MASK)) {
+		/*
+		 * Prescaler is disabled. Return the correct flag value
+		 */
+		Status = (u8)XTTCPS_CLK_CNTRL_PS_DISABLE;
+	}
+	else {
+
+		Status = (u8)((ClockReg & (u32)XTTCPS_CLK_CNTRL_PS_VAL_MASK) >>
+			(u32)XTTCPS_CLK_CNTRL_PS_VAL_SHIFT);
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function calculates the interval value as well as the prescaler value
+* for a given frequency.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	Freq is the requested output frequency for the device.
+* @param	Interval is the interval value for the given frequency,
+*		it is the output value for this function.
+* @param	Prescaler is the prescaler value for the given frequency,
+*		it is the output value for this function.
+*
+* @return	None.
+*
+* @note
+*  Upon successful calculation for the given frequency, Interval and Prescaler
+*  carry the settings for the timer counter; Upon unsuccessful calculation,
+*  Interval and Prescaler are set to 0xFF(FF) for their maximum values to
+*  signal the caller of failure. Therefore, caller needs to check the return
+*  interval or prescaler values for whether the function has succeeded.
+*
+****************************************************************************/
+void XTtcPs_CalcIntervalFromFreq(XTtcPs *InstancePtr, u32 Freq,
+        XInterval *Interval, u8 *Prescaler)
+{
+	u8 TmpPrescaler;
+	u32 TempValue;
+	u32 InputClock;
+
+	InputClock = InstancePtr->Config.InputClockHz;
+	/*
+	 * Find the smallest prescaler that will work for a given frequency. The
+	 * smaller the prescaler, the larger the count and the more accurate the
+	 *  PWM setting.
+	 */
+	TempValue = InputClock/ Freq;
+
+	if (TempValue < 4U) {
+		/*
+		 * The frequency is too high, it is too close to the input
+		 * clock value. Use maximum values to signal caller.
+		 */
+		*Interval = XTTCPS_MAX_INTERVAL_COUNT;
+		*Prescaler = 0xFFU;
+		return;
+	}
+
+	/*
+	 * First, do we need a prescaler or not?
+	 */
+	if (((u32)65536U) > TempValue) {
+		/*
+		 * We do not need a prescaler, so set the values appropriately
+		 */
+		*Interval = (XInterval)TempValue;
+		*Prescaler = XTTCPS_CLK_CNTRL_PS_DISABLE;
+		return;
+	}
+
+
+	for (TmpPrescaler = 0U; TmpPrescaler < XTTCPS_CLK_CNTRL_PS_DISABLE;
+	     TmpPrescaler++) {
+		TempValue =	InputClock/ (Freq * (1U << (TmpPrescaler + 1U)));
+
+		/*
+		 * The first value less than 2^16 is the best bet
+		 */
+		if (((u32)65536U) > TempValue) {
+			/*
+			 * Set the values appropriately
+			 */
+			*Interval = (XInterval)TempValue;
+			*Prescaler = TmpPrescaler;
+			return;
+		}
+	}
+
+	/* Can not find interval values that work for the given frequency.
+	 * Return maximum values to signal caller.
+	 */
+	*Interval = XTTCPS_MAX_INTERVAL_COUNT;
+	*Prescaler = 0XFFU;
+	return;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps.h b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps.h
new file mode 100644
index 0000000..b7b4e19
--- /dev/null
+++ b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps.h
@@ -0,0 +1,467 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xttcps.h
+* @addtogroup ttcps_v3_5
+* @{
+* @details
+*
+* This is the driver for one 16-bit timer counter in the Triple Timer Counter
+* (TTC) module in the Ps block.
+*
+* The TTC module provides three independent timer/counter modules that can each
+* be clocked using either the system clock (pclk) or an externally driven
+* clock (ext_clk). In addition, each counter can independently prescale its
+* selected clock input (divided by 2 to 65536). Counters can be set to
+* decrement or increment.
+*
+* Each of the counters can be programmed to generate interrupt pulses:
+*	. At a regular, predefined period, that is on a timed interval
+*	. When the counter registers overflow
+* 	. When the count matches any one of the three 'match' registers
+*
+* Therefore, up to six different events can trigger a timer interrupt: three
+* match interrupts, an overflow interrupt, an interval interrupt and an event
+* timer interrupt. Note that the overflow interrupt and the interval interrupt
+* are mutually exclusive.
+*
+* Initialization & Configuration
+*
+* An XTtcPs_Config structure is used to configure a driver instance.
+* Information in the XTtcPs_Config structure is the hardware properties
+* about the device.
+*
+* A driver instance is initialized through
+* XTtcPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr). Where CfgPtr
+* is a pointer to the XTtcPs_Config structure, it can be looked up statically
+* through XTtcPs_LookupConfig(DeviceID), or passed in by the caller. The
+* EffectiveAddr can be the static base address of the device or virtual
+* mapped address if address translation is supported.
+*
+* Interrupts
+*
+* Interrupt handler is not provided by the driver, as handling of interrupt
+* is application specific.
+*
+* @note
+* The default setting for a timer/counter is:
+*  - Overflow Mode
+*  - Internal clock (pclk) selected
+*  - Counter disabled
+*  - All Interrupts disabled
+*  - Output waveforms disabled
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -----------------------------------------------------
+* 1.00a drg/jz 01/20/10 First release..
+* 2.0   adk    12/10/13 Updated as per the New Tcl API's
+* 3.0	pkp    12/09/14 Added support for Zynq Ultrascale Mp.Also code
+*			modified for MISRA-C:2012 compliance.
+* 3.2   mus    10/28/16 Modified XTtcPs_GetCounterValue and XTtcPs_SetInterval
+*                       macros to return 32 bit values for zynq ultrascale+mpsoc
+*       ms   01/23/17 Modified xil_printf statement in main function for all
+*                     examples to ensure that "Successfully ran" and "Failed"
+*                     strings are available in all examples. This is a fix
+*                     for CR-965028.
+*       ms   03/17/17 Added readme.txt file in examples folder for doxygen
+*                     generation.
+* 3.4   ms   04/18/17 Modified tcl file to add suffix U for all macros
+*                     definitions of ttcps in xparameters.h
+* 3.5   srm  10/06/17 Added new typedef XMatchRegValue for match register width
+*
+* 

+*
+******************************************************************************/
+
+#ifndef XTTCPS_H		/* prevent circular inclusions */
+#define XTTCPS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xttcps_hw.h"
+#include "xstatus.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/*
+ * Maximum Value for interval counter
+ */
+ #if defined(ARMA9)
+ #define XTTCPS_MAX_INTERVAL_COUNT 0xFFFFU
+ #else
+ #define XTTCPS_MAX_INTERVAL_COUNT 0xFFFFFFFFU
+ #endif
+
+/** @name Configuration options
+ *
+ * Options for the device. Each of the options is bit field, so more than one
+ * options can be specified.
+ *
+ * @{
+ */
+#define XTTCPS_OPTION_EXTERNAL_CLK	0x00000001U 	/**< External clock source */
+#define XTTCPS_OPTION_CLK_EDGE_NEG	0x00000002U	/**< Clock on trailing edge for
+						     external clock*/
+#define XTTCPS_OPTION_INTERVAL_MODE	0x00000004U	/**< Interval mode */
+#define XTTCPS_OPTION_DECREMENT		0x00000008U	/**< Decrement the counter */
+#define XTTCPS_OPTION_MATCH_MODE	0x00000010U	/**< Match mode */
+#define XTTCPS_OPTION_WAVE_DISABLE	0x00000020U 	/**< No waveform output */
+#define XTTCPS_OPTION_WAVE_POLARITY	0x00000040U	/**< Waveform polarity */
+/*@}*/
+/**************************** Type Definitions *******************************/
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;	  /**< Unique ID for device */
+	u32 BaseAddress;  /**< Base address for device */
+	u32 InputClockHz; /**< Input clock frequency */
+} XTtcPs_Config;
+
+/**
+ * The XTtcPs driver instance data. The user is required to allocate a
+ * variable of this type for each PS timer/counter device in the system. A
+ * pointer to a variable of this type is then passed to various driver API
+ * functions.
+ */
+typedef struct {
+	XTtcPs_Config Config;	/**< Configuration structure */
+	u32 IsReady;		/**< Device is initialized and ready */
+} XTtcPs;
+
+/**
+ * This typedef contains interval count and Match register value
+ */
+#if defined(ARMA9)
+typedef u16 XInterval;
+typedef u16 XMatchRegValue;
+#else
+typedef u32 XInterval;
+typedef u32 XMatchRegValue;
+#endif
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*
+ * Internal helper macros
+ */
+#define InstReadReg(InstancePtr, RegOffset) \
+    (Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)(RegOffset)))
+
+#define InstWriteReg(InstancePtr, RegOffset, Data) \
+    (Xil_Out32(((InstancePtr)->Config.BaseAddress) + (u32)(RegOffset), (u32)(Data)))
+
+/*****************************************************************************/
+/**
+*
+* This function starts the counter/timer without resetting the counter value.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	None
+*
+* @note		C-style signature:
+*		void XTtcPs_Start(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#define XTtcPs_Start(InstancePtr)	\
+		InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET,	\
+		(InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) &	\
+		 ~XTTCPS_CNT_CNTRL_DIS_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function stops the counter/timer. This macro may be called at any time
+* to stop the counter. The counter holds the last value until it is reset,
+* restarted or enabled.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	None
+*
+* @note		C-style signature:
+*		void XTtcPs_Stop(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#define XTtcPs_Stop(InstancePtr)		\
+		InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET,	\
+		(InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) |	\
+		 XTTCPS_CNT_CNTRL_DIS_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function checks whether the timer counter has already started.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance
+*
+* @return	Non-zero if the device has started, '0' otherwise.
+*
+* @note		C-style signature:
+*		int XTtcPs_IsStarted(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#define XTtcPs_IsStarted(InstancePtr) \
+     ((InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) & \
+       XTTCPS_CNT_CNTRL_DIS_MASK) == 0U)
+
+/*****************************************************************************/
+/**
+*
+* This function returns the current 16-bit counter value. It may be called at
+* any time.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	zynq:16 bit counter value.
+*           zynq ultrascale+mpsoc:32 bit counter value.
+*
+* @note		C-style signature:
+*		zynq: u16 XTtcPs_GetCounterValue(XTtcPs *InstancePtr)
+*       zynq ultrascale+mpsoc: u32 XTtcPs_GetCounterValue(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#if defined(ARMA9)
+/*
+ * ttc supports 16 bit counter for zynq
+ */
+#define XTtcPs_GetCounterValue(InstancePtr) \
+		(u16)InstReadReg((InstancePtr), XTTCPS_COUNT_VALUE_OFFSET)
+#else
+/*
+ * ttc supports 32 bit counter for zynq ultrascale+mpsoc
+ */
+#define XTtcPs_GetCounterValue(InstancePtr) \
+               InstReadReg((InstancePtr), XTTCPS_COUNT_VALUE_OFFSET)
+#endif
+
+/*****************************************************************************/
+/**
+*
+* This function sets the interval value to be used in interval mode.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	Value is the 16-bit value to be set in the interval register.
+*
+* @return	None
+*
+* @note		C-style signature:
+*		void XTtcPs_SetInterval(XTtcPs *InstancePtr, XInterval Value)
+*
+****************************************************************************/
+#define XTtcPs_SetInterval(InstancePtr, Value)	\
+		InstWriteReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET, (Value))
+
+/*****************************************************************************/
+/**
+*
+* This function gets the interval value from the interval register.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	zynq:16 bit interval value.
+*           zynq ultrascale+mpsoc:32 bit interval value.
+*
+* @note		C-style signature:
+*		zynq: u16 XTtcPs_GetInterval(XTtcPs *InstancePtr)
+*       zynq ultrascale+mpsoc: u32 XTtcPs_GetInterval(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#if defined(ARMA9)
+/*
+ * ttc supports 16 bit interval counter for zynq
+ */
+#define XTtcPs_GetInterval(InstancePtr) \
+		(u16)InstReadReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET)
+#else
+/*
+ * ttc supports 32 bit interval counter for zynq ultrascale+mpsoc
+ */
+#define XTtcPs_GetInterval(InstancePtr) \
+		InstReadReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET)
+#endif
+/*****************************************************************************/
+/**
+*
+* This macro resets the count register. It may be called at any time. The
+* counter is reset to either 0 or 0xFFFF, or the interval value, depending on
+* the increment/decrement mode. The state of the counter, as started or
+* stopped, is not affected by calling reset.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	None
+*
+* @note		C-style signature:
+*		void XTtcPs_ResetCounterValue(XTtcPs *InstancePtr)
+*
+****************************************************************************/
+#define XTtcPs_ResetCounterValue(InstancePtr) \
+		InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET,	\
+		(InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) | \
+		 (u32)XTTCPS_CNT_CNTRL_RST_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function enables the interrupts.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	InterruptMask defines which interrupt should be enabled.
+*		Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
+*		This is a bit mask, all set bits will be enabled, cleared bits
+*		will not be disabled.
+*
+* @return	None.
+*
+* @note
+* C-style signature:
+*	void XTtcPs_EnableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
+*
+******************************************************************************/
+#define XTtcPs_EnableInterrupts(InstancePtr, InterruptMask)		\
+		InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET,		\
+		(InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) |	\
+		 (InterruptMask)))
+
+/*****************************************************************************/
+/**
+*
+* This function disables the interrupts.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	InterruptMask defines which interrupt should be disabled.
+*		Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
+*		This is a bit mask, all set bits will be disabled, cleared bits
+*		will not be disabled.
+*
+* @return	None.
+*
+* @note
+* C-style signature:
+*	void XTtcPs_DisableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
+*
+******************************************************************************/
+#define XTtcPs_DisableInterrupts(InstancePtr, InterruptMask) \
+		InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET,	\
+		(InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) &	\
+		 ~(InterruptMask)))
+
+/*****************************************************************************/
+/**
+*
+* This function reads the interrupt status.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		u32 XTtcPs_GetInterruptStatus(XTtcPs *InstancePtr)
+*
+******************************************************************************/
+#define XTtcPs_GetInterruptStatus(InstancePtr)	 \
+		InstReadReg((InstancePtr), XTTCPS_ISR_OFFSET)
+
+/*****************************************************************************/
+/**
+*
+* This function clears the interrupt status.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	InterruptMask defines which interrupt should be cleared.
+*		Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
+*		This is a bit mask, all set bits will be cleared, cleared bits
+*		will not be cleared.
+*
+* @return	None.
+*
+* @note
+* C-style signature:
+*	void XTtcPs_ClearInterruptStatus(XTtcPs *InstancePtr, u32 InterruptMask)
+*
+******************************************************************************/
+#define XTtcPs_ClearInterruptStatus(InstancePtr, InterruptMask) \
+		InstWriteReg((InstancePtr), XTTCPS_ISR_OFFSET, \
+		 (InterruptMask))
+
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Initialization functions in xttcps_sinit.c
+ */
+XTtcPs_Config *XTtcPs_LookupConfig(u16 DeviceId);
+
+/*
+ * Required functions, in xttcps.c
+ */
+s32 XTtcPs_CfgInitialize(XTtcPs *InstancePtr,
+         XTtcPs_Config * ConfigPtr, u32 EffectiveAddr);
+
+void XTtcPs_SetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex, XMatchRegValue Value);
+XMatchRegValue XTtcPs_GetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex);
+
+void XTtcPs_SetPrescaler(XTtcPs *InstancePtr, u8 PrescalerValue);
+u8 XTtcPs_GetPrescaler(XTtcPs *InstancePtr);
+
+void XTtcPs_CalcIntervalFromFreq(XTtcPs *InstancePtr, u32 Freq,
+        XInterval *Interval, u8 *Prescaler);
+
+/*
+ * Functions for options, in file xttcps_options.c
+ */
+s32 XTtcPs_SetOptions(XTtcPs *InstancePtr, u32 Options);
+u32 XTtcPs_GetOptions(XTtcPs *InstancePtr);
+
+/*
+ * Function for self-test, in file xttcps_selftest.c
+ */
+s32 XTtcPs_SelfTest(XTtcPs *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_hw.h b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_hw.h
new file mode 100644
index 0000000..b1fa545
--- /dev/null
+++ b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_hw.h
@@ -0,0 +1,233 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xttcps_hw.h
+* @addtogroup ttcps_v3_5
+* @{
+*
+* This file defines the hardware interface to one of the three timer counters
+* in the Ps block.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -------------------------------------------------
+* 1.00a drg/jz 01/21/10 First release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.5   srm    10/06/17 Updated XTTCPS_COUNT_VALUE_MASK,
+*                       XTTCPS_INTERVAL_VAL_MASK, XTTCPS_MATCH_MASK macros to
+*                       mask 16 bit values for zynq and 32 bit values for
+*                       zynq ultrascale+mpsoc "
+* 

+*
+******************************************************************************/
+
+#ifndef XTTCPS_HW_H		/* prevent circular inclusions */
+#define XTTCPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+/*
+ * Flag for a9 processor
+ */
+ #if !defined (ARMR5) && !defined (__aarch64__) && !defined (ARMA53_32)
+ #define ARMA9
+ #endif
+
+/** @name Register Map
+ *
+ * Register offsets from the base address of the device.
+ *
+ * @{
+ */
+#define XTTCPS_CLK_CNTRL_OFFSET		0x00000000U  /**< Clock Control Register */
+#define XTTCPS_CNT_CNTRL_OFFSET		0x0000000CU  /**< Counter Control Register*/
+#define XTTCPS_COUNT_VALUE_OFFSET	0x00000018U  /**< Current Counter Value */
+#define XTTCPS_INTERVAL_VAL_OFFSET	0x00000024U  /**< Interval Count Value */
+#define XTTCPS_MATCH_0_OFFSET		0x00000030U  /**< Match 1 value */
+#define XTTCPS_MATCH_1_OFFSET		0x0000003CU  /**< Match 2 value */
+#define XTTCPS_MATCH_2_OFFSET		0x00000048U  /**< Match 3 value */
+#define XTTCPS_ISR_OFFSET			0x00000054U  /**< Interrupt Status Register */
+#define XTTCPS_IER_OFFSET			0x00000060U  /**< Interrupt Enable Register */
+/* @} */
+
+/** @name Clock Control Register
+ * Clock Control Register definitions
+ * @{
+ */
+#define XTTCPS_CLK_CNTRL_PS_EN_MASK		0x00000001U  /**< Prescale enable */
+#define XTTCPS_CLK_CNTRL_PS_VAL_MASK	0x0000001EU  /**< Prescale value */
+#define XTTCPS_CLK_CNTRL_PS_VAL_SHIFT			 1U  /**< Prescale shift */
+#define XTTCPS_CLK_CNTRL_PS_DISABLE				16U  /**< Prescale disable */
+#define XTTCPS_CLK_CNTRL_SRC_MASK		0x00000020U  /**< Clock source */
+#define XTTCPS_CLK_CNTRL_EXT_EDGE_MASK	0x00000040U  /**< External Clock edge */
+/* @} */
+
+/** @name Counter Control Register
+ * Counter Control Register definitions
+ * @{
+ */
+#define XTTCPS_CNT_CNTRL_DIS_MASK		0x00000001U /**< Disable the counter */
+#define XTTCPS_CNT_CNTRL_INT_MASK		0x00000002U /**< Interval mode */
+#define XTTCPS_CNT_CNTRL_DECR_MASK		0x00000004U /**< Decrement mode */
+#define XTTCPS_CNT_CNTRL_MATCH_MASK		0x00000008U /**< Match mode */
+#define XTTCPS_CNT_CNTRL_RST_MASK		0x00000010U /**< Reset counter */
+#define XTTCPS_CNT_CNTRL_EN_WAVE_MASK	0x00000020U /**< Enable waveform */
+#define XTTCPS_CNT_CNTRL_POL_WAVE_MASK	0x00000040U /**< Waveform polarity */
+#define XTTCPS_CNT_CNTRL_RESET_VALUE	0x00000021U /**< Reset value */
+/* @} */
+
+/** @name Current Counter Value Register
+ * Current Counter Value Register definitions
+ * @{
+ */
+#if defined(ARMA9)
+#define XTTCPS_COUNT_VALUE_MASK		0x0000FFFFU /**< 16-bit counter value */
+#else
+#define XTTCPS_COUNT_VALUE_MASK		0xFFFFFFFFU /**< 32-bit counter value */
+#endif
+/* @} */
+
+/** @name Interval Value Register
+ * Interval Value Register is the maximum value the counter will count up or
+ * down to.
+ * @{
+ */
+#if defined(ARMA9)
+#define XTTCPS_INTERVAL_VAL_MASK	0x0000FFFFU /**< 16-bit Interval value*/
+#else
+#define XTTCPS_INTERVAL_VAL_MASK	0xFFFFFFFFU /**< 32-bit Interval value*/
+#endif
+/* @} */
+
+/** @name Match Registers
+ * Definitions for Match registers, each timer counter has three match
+ * registers.
+ * @{
+ */
+#if defined(ARMA9)
+#define XTTCPS_MATCH_MASK		0x0000FFFFU /**< 16-bit Match value */
+#else
+#define XTTCPS_MATCH_MASK		0xFFFFFFFFU /**< 32-bit Match value */
+#endif
+#define XTTCPS_NUM_MATCH_REG			 3U /**< Num of Match reg */
+/* @} */
+
+/** @name Interrupt Registers
+ * Following register bit mask is for all interrupt registers.
+ *
+ * @{
+ */
+#define XTTCPS_IXR_INTERVAL_MASK	0x00000001U  /**< Interval Interrupt */
+#define XTTCPS_IXR_MATCH_0_MASK		0x00000002U  /**< Match 1 Interrupt */
+#define XTTCPS_IXR_MATCH_1_MASK		0x00000004U  /**< Match 2 Interrupt */
+#define XTTCPS_IXR_MATCH_2_MASK		0x00000008U  /**< Match 3 Interrupt */
+#define XTTCPS_IXR_CNT_OVR_MASK		0x00000010U  /**< Counter Overflow */
+#define XTTCPS_IXR_ALL_MASK			0x0000001FU  /**< All valid Interrupts */
+/* @} */
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* Read the given Timer Counter register.
+*
+* @param	BaseAddress is the base address of the timer counter device.
+* @param	RegOffset is the register offset to be read
+*
+* @return	The 32-bit value of the register
+*
+* @note		C-style signature:
+*		u32 XTtcPs_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+*****************************************************************************/
+#define XTtcPs_ReadReg(BaseAddress, RegOffset) \
+    (Xil_In32((BaseAddress) + (u32)(RegOffset)))
+
+/****************************************************************************/
+/**
+*
+* Write the given Timer Counter register.
+*
+* @param	BaseAddress is the base address of the timer counter device.
+* @param	RegOffset is the register offset to be written
+* @param	Data is the 32-bit value to write to the register
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XTtcPs_WriteReg(XTtcPs BaseAddress, u32 RegOffset,
+*		u32 Data)
+*
+*****************************************************************************/
+#define XTtcPs_WriteReg(BaseAddress, RegOffset, Data) \
+    (Xil_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data)))
+
+/****************************************************************************/
+/**
+*
+* Calculate a match register offset using the Match Register index.
+*
+* @param	MatchIndex is the 0-2 value of the match register
+*
+* @return	MATCH_N_OFFSET.
+*
+* @note		C-style signature:
+*		u32 XTtcPs_Match_N_Offset(u8 MatchIndex)
+*
+*****************************************************************************/
+#define XTtcPs_Match_N_Offset(MatchIndex) \
+		((u32)XTTCPS_MATCH_0_OFFSET + ((u32)(12U) * (u32)(MatchIndex)))
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+#ifdef __cplusplus
+}
+#endif
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_options.c b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_options.c
new file mode 100644
index 0000000..01dd9ef
--- /dev/null
+++ b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_options.c
@@ -0,0 +1,243 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xttcps_options.c
+* @addtogroup ttcps_v3_5
+* @{
+*
+* This file contains functions to get or set option features for the device.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------
+* 1.00a drg/jz 01/21/10 First release
+* 1.01a nm     03/05/2012 Removed break statement after return to remove
+*                         compilation warnings.
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xttcps.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+/*
+ * Create the table of options which are processed to get/set the device
+ * options. These options are table driven to allow easy maintenance and
+ * expansion of the options.
+ */
+typedef struct {
+	u32 Option;
+	u32 Mask;
+	u32 Register;
+} OptionsMap;
+
+static OptionsMap TmrCtrOptionsTable[] = {
+	{XTTCPS_OPTION_EXTERNAL_CLK, XTTCPS_CLK_CNTRL_SRC_MASK,
+	 XTTCPS_CLK_CNTRL_OFFSET},
+	{XTTCPS_OPTION_CLK_EDGE_NEG, XTTCPS_CLK_CNTRL_EXT_EDGE_MASK,
+	 XTTCPS_CLK_CNTRL_OFFSET},
+	{XTTCPS_OPTION_INTERVAL_MODE, XTTCPS_CNT_CNTRL_INT_MASK,
+	 XTTCPS_CNT_CNTRL_OFFSET},
+	{XTTCPS_OPTION_DECREMENT, XTTCPS_CNT_CNTRL_DECR_MASK,
+	 XTTCPS_CNT_CNTRL_OFFSET},
+	{XTTCPS_OPTION_MATCH_MODE, XTTCPS_CNT_CNTRL_MATCH_MASK,
+	 XTTCPS_CNT_CNTRL_OFFSET},
+	{XTTCPS_OPTION_WAVE_DISABLE, XTTCPS_CNT_CNTRL_EN_WAVE_MASK,
+	 XTTCPS_CNT_CNTRL_OFFSET},
+	{XTTCPS_OPTION_WAVE_POLARITY, XTTCPS_CNT_CNTRL_POL_WAVE_MASK,
+	 XTTCPS_CNT_CNTRL_OFFSET},
+};
+
+#define XTTCPS_NUM_TMRCTR_OPTIONS (sizeof(TmrCtrOptionsTable) / \
+				sizeof(OptionsMap))
+
+/*****************************************************************************/
+/**
+*
+* This function sets the options for the TTC device.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+* @param	Options contains the specified options to be set. This is a bit
+*		mask where a 1 means to turn the option on, and a 0 means to
+*		turn the option off. One or more bit values may be contained
+*		in the mask. See the bit definitions named XTTCPS_*_OPTION in
+*		the file xttcps.h.
+*
+* @return
+*		- XST_SUCCESS if options are successfully set.
+*		- XST_FAILURE if any of the options are unknown.
+*
+* @note		None
+*
+******************************************************************************/
+s32 XTtcPs_SetOptions(XTtcPs *InstancePtr, u32 Options)
+{
+	u32 CountReg;
+	u32 ClockReg;
+	u32 Index;
+	s32 Status = XST_SUCCESS;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	ClockReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
+				    XTTCPS_CLK_CNTRL_OFFSET);
+	CountReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
+				    XTTCPS_CNT_CNTRL_OFFSET);
+
+	/*
+	 * Loop through the options table, turning the option on or off
+	 * depending on whether the bit is set in the incoming options flag.
+	 */
+	for (Index = 0U; Index < XTTCPS_NUM_TMRCTR_OPTIONS; Index++) {
+		if(Status != (s32)XST_FAILURE) {
+			if ((Options & TmrCtrOptionsTable[Index].Option) != (u32)0) {
+
+			switch (TmrCtrOptionsTable[Index].Register) {
+
+			case XTTCPS_CLK_CNTRL_OFFSET:
+				/* Add option */
+				ClockReg |= TmrCtrOptionsTable[Index].Mask;
+				break;
+
+			case XTTCPS_CNT_CNTRL_OFFSET:
+				/* Add option */
+				CountReg |= TmrCtrOptionsTable[Index].Mask;
+				break;
+
+			default:
+				Status = XST_FAILURE;
+				break;
+			}
+		}
+		else {
+			switch (TmrCtrOptionsTable[Index].Register) {
+
+			case XTTCPS_CLK_CNTRL_OFFSET:
+				/* Remove option*/
+				ClockReg &= ~TmrCtrOptionsTable[Index].Mask;
+				break;
+
+			case XTTCPS_CNT_CNTRL_OFFSET:
+				/* Remove option*/
+				CountReg &= ~TmrCtrOptionsTable[Index].Mask;
+				break;
+
+			default:
+				Status = XST_FAILURE;
+				break;
+				}
+			}
+		}
+	}
+
+	/*
+	 * Now write the registers. Leave it to the upper layers to restart the
+	 * device.
+	 */
+	if (Status != (s32)XST_FAILURE ) {
+		XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XTTCPS_CLK_CNTRL_OFFSET, ClockReg);
+		XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XTTCPS_CNT_CNTRL_OFFSET, CountReg);
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function gets the settings for the options for the TTC device.
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return
+*
+* The return u32 contains the specified options that are set. This is a bit
+* mask where a '1' means the option is on, and a'0' means the option is off.
+* One or more bit values may be contained in the mask. See the bit definitions
+* named XTTCPS_*_OPTION in the file xttcps.h.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 XTtcPs_GetOptions(XTtcPs *InstancePtr)
+{
+	u32 OptionsFlag = 0U;
+	u32 Register;
+	u32 Index;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+
+	/*
+	 * Loop through the options table to determine which options are set
+	 */
+	for (Index = 0U; Index < XTTCPS_NUM_TMRCTR_OPTIONS; Index++) {
+		/*
+		 * Get the control register to determine which options are
+		 * currently set.
+		 */
+		Register = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
+					      TmrCtrOptionsTable[Index].
+					      Register);
+
+		if ((Register & TmrCtrOptionsTable[Index].Mask) != (u32)0) {
+			OptionsFlag |= TmrCtrOptionsTable[Index].Option;
+		}
+	}
+
+	return OptionsFlag;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_selftest.c b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_selftest.c
new file mode 100644
index 0000000..b1dd7d0
--- /dev/null
+++ b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_selftest.c
@@ -0,0 +1,109 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xttcps_selftest.c
+* @addtogroup ttcps_v3_5
+* @{
+*
+* This file contains the implementation of self test function for the
+* XTtcPs driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------
+* 1.00a drg/jz 01/21/10 First release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xttcps.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/*****************************************************************************/
+/**
+*
+* Runs a self-test on the driver/device.
+*
+*
+* @param	InstancePtr is a pointer to the XTtcPs instance.
+*
+* @return
+*
+*	- XST_SUCCESS if successful
+*	- XST_FAILURE indicates a register did not read or write correctly
+*
+* @note		This test fails if it is not called right after initialization.
+*
+******************************************************************************/
+s32 XTtcPs_SelfTest(XTtcPs *InstancePtr)
+{
+	s32 Status;
+	u32 TempReg;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * All the TTC registers should be in their default state right now.
+	 */
+	TempReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
+				   XTTCPS_CNT_CNTRL_OFFSET);
+	if (XTTCPS_CNT_CNTRL_RESET_VALUE != (u32)TempReg) {
+		Status = XST_FAILURE;
+	}
+	else {
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_sinit.c b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_sinit.c
new file mode 100644
index 0000000..4684c8a
--- /dev/null
+++ b/src/Xilinx/libsrc/ttcps_v3_5/src/xttcps_sinit.c
@@ -0,0 +1,98 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xttcps_sinit.c
+* @addtogroup ttcps_v3_5
+* @{
+*
+* The implementation of the XTtcPs driver's static initialization functionality.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------
+* 1.00a drg/jz 01/21/10 First release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xttcps.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+extern XTtcPs_Config XTtcPs_ConfigTable[XPAR_XTTCPS_NUM_INSTANCES];
+
+/*****************************************************************************/
+/**
+*
+* Looks up the device configuration based on the unique device ID. A table
+* contains the configuration info for each device in the system.
+*
+* @param	DeviceId contains the unique ID of the device
+*
+* @return
+*
+* A pointer to the configuration found or NULL if the specified device ID was
+* not found. See xttcps.h for the definition of XTtcPs_Config.
+*
+* @note		None.
+*
+******************************************************************************/
+XTtcPs_Config *XTtcPs_LookupConfig(u16 DeviceId)
+{
+	XTtcPs_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index = 0U; Index < (u32)XPAR_XTTCPS_NUM_INSTANCES; Index++) {
+		if (XTtcPs_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XTtcPs_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XTtcPs_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/uartps_v3_6/src/Makefile b/src/Xilinx/libsrc/uartps_v3_6/src/Makefile
new file mode 100644
index 0000000..88b1e62
--- /dev/null
+++ b/src/Xilinx/libsrc/uartps_v3_6/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xuartps_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling uartps"
+
+xuartps_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xuartps_includes
+
+xuartps_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/uartps_v3_6/src/xuartps.c b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps.c
new file mode 100644
index 0000000..c33ec54
--- /dev/null
+++ b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps.c
@@ -0,0 +1,645 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xuartps.c
+* @addtogroup uartps_v3_5
+* @{
+*
+* This file contains the implementation of the interface functions for XUartPs
+* driver. Refer to the header file xuartps.h for more detailed information.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	 Changes
+* ----- ------ -------- ----------------------------------------------
+* 1.00	drg/jz 01/13/10 First Release
+* 2.2   hk     06/23/14 SW reset of RX and TX should be done when changing
+*                       baud rate. CR# 804281.
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn    04/10/15 Modified code for latest RTL changes.
+* 3.5	NK     09/26/17 Fix the RX Buffer Overflow issue.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xstatus.h"
+#include "xuartps.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions ****************************/
+
+/* The following constant defines the amount of error that is allowed for
+ * a specified baud rate. This error is the difference between the actual
+ * baud rate that will be generated using the specified clock and the
+ * desired baud rate.
+ */
+#define XUARTPS_MAX_BAUD_ERROR_RATE		 3U	/* max % error allowed */
+
+/**************************** Type Definitions ******************************/
+
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+
+/************************** Function Prototypes *****************************/
+
+static void XUartPs_StubHandler(void *CallBackRef, u32 Event,
+				 u32 ByteCount);
+
+u32  XUartPs_SendBuffer(XUartPs *InstancePtr);
+
+u32  XUartPs_ReceiveBuffer(XUartPs *InstancePtr);
+
+/************************** Variable Definitions ****************************/
+
+/****************************************************************************/
+/**
+*
+* Initializes a specific XUartPs instance such that it is ready to be used.
+* The data format of the device is setup for 8 data bits, 1 stop bit, and no
+* parity by default. The baud rate is set to a default value specified by
+* Config->DefaultBaudRate if set, otherwise it is set to 19.2K baud. The
+* receive FIFO threshold is set for 8 bytes. The default operating mode of the
+* driver is polled mode.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	Config is a reference to a structure containing information
+*		about a specific XUartPs driver.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. The caller is responsible for keeping the address
+*		mapping from EffectiveAddr to the device physical base address
+*		unchanged once this function is invoked. Unexpected errors may
+*		occur if the address mapping changes after this function is
+*		called. If address translation is not used, pass in the physical
+*		address instead.
+*
+* @return
+*
+*		- XST_SUCCESS if initialization was successful
+*		- XST_UART_BAUD_ERROR if the baud rate is not possible because
+*		  the inputclock frequency is not divisible with an acceptable
+*		  amount of error
+*
+* @note
+*
+* The default configuration for the UART after initialization is:
+*
+* - 19,200 bps or XPAR_DFT_BAUDRATE if defined
+* - 8 data bits
+* - 1 stop bit
+* - no parity
+* - FIFO's are enabled with a receive threshold of 8 bytes
+* - The RX timeout is enabled with a timeout of 1 (4 char times)
+*
+*   All interrupts are disabled.
+*
+*****************************************************************************/
+s32 XUartPs_CfgInitialize(XUartPs *InstancePtr,
+				   XUartPs_Config * Config, u32 EffectiveAddr)
+{
+	s32 Status;
+	u32 ModeRegister;
+	u32 BaudRate;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Config != NULL);
+
+	/* Setup the driver instance using passed in parameters */
+	InstancePtr->Config.BaseAddress = EffectiveAddr;
+	InstancePtr->Config.InputClockHz = Config->InputClockHz;
+	InstancePtr->Config.ModemPinsConnected = Config->ModemPinsConnected;
+
+	/* Initialize other instance data to default values */
+	InstancePtr->Handler = XUartPs_StubHandler;
+
+	InstancePtr->SendBuffer.NextBytePtr = NULL;
+	InstancePtr->SendBuffer.RemainingBytes = 0U;
+	InstancePtr->SendBuffer.RequestedBytes = 0U;
+
+	InstancePtr->ReceiveBuffer.NextBytePtr = NULL;
+	InstancePtr->ReceiveBuffer.RemainingBytes = 0U;
+	InstancePtr->ReceiveBuffer.RequestedBytes = 0U;
+
+	/* Initialize the platform data */
+	InstancePtr->Platform = XGetPlatform_Info();
+
+	InstancePtr->is_rxbs_error = 0U;
+
+	/* Flag that the driver instance is ready to use */
+	InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+
+	/*
+	 * Set the default baud rate here, can be changed prior to
+	 * starting the device
+	 */
+	BaudRate = (u32)XUARTPS_DFT_BAUDRATE;
+	Status = XUartPs_SetBaudRate(InstancePtr, BaudRate);
+	if (Status != (s32)XST_SUCCESS) {
+		InstancePtr->IsReady = 0U;
+	} else {
+
+		/*
+		 * Set up the default data format: 8 bit data, 1 stop bit, no
+		 * parity
+		 */
+		ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+					  XUARTPS_MR_OFFSET);
+
+		/* Mask off what's already there */
+		ModeRegister &= (~((u32)XUARTPS_MR_CHARLEN_MASK |
+						 (u32)XUARTPS_MR_STOPMODE_MASK |
+						 (u32)XUARTPS_MR_PARITY_MASK));
+
+		/* Set the register value to the desired data format */
+		ModeRegister |=	((u32)XUARTPS_MR_CHARLEN_8_BIT |
+						 (u32)XUARTPS_MR_STOPMODE_1_BIT |
+						 (u32)XUARTPS_MR_PARITY_NONE);
+
+		/* Write the mode register out */
+		XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET,
+				   ModeRegister);
+
+		/* Set the RX FIFO trigger at 8 data bytes. */
+		XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XUARTPS_RXWM_OFFSET, 0x08U);
+
+		/* Set the RX timeout to 1, which will be 4 character time */
+		XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XUARTPS_RXTOUT_OFFSET, 0x01U);
+
+		/* Disable all interrupts, polled mode is the default */
+		XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET,
+				   XUARTPS_IXR_MASK);
+
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* This functions sends the specified buffer using the device in either
+* polled or interrupt driven mode. This function is non-blocking, if the device
+* is busy sending data, it will return and indicate zero bytes were sent.
+* Otherwise, it fills the TX FIFO as much as it can, and return the number of
+* bytes sent.
+*
+* In a polled mode, this function will only send as much data as TX FIFO can
+* buffer. The application may need to call it repeatedly to send the entire
+* buffer.
+*
+* In interrupt mode, this function will start sending the specified buffer,
+* then the interrupt handler will continue sending data until the entire
+* buffer has been sent. A callback function, as specified by the application,
+* will be called to indicate the completion of sending.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	BufferPtr is pointer to a buffer of data to be sent.
+* @param  	NumBytes contains the number of bytes to be sent. A value of
+*		zero will stop a previous send operation that is in progress
+*		in interrupt mode. Any data that was already put into the
+*		transmit FIFO will be sent.
+*
+* @return	The number of bytes actually sent.
+*
+* @note
+*
+* The number of bytes is not asserted so that this function may be called with
+* a value of zero to stop an operation that is already in progress.
+* 


+*
+*****************************************************************************/
+u32 XUartPs_Send(XUartPs *InstancePtr, u8 *BufferPtr,
+			   u32 NumBytes)
+{
+	u32 BytesSent;
+
+	/* Asserts validate the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(BufferPtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Disable the UART transmit interrupts to allow this call to stop a
+	 * previous operation that may be interrupt driven.
+	 */
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET,
+					  (XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_TXFULL));
+
+	/* Setup the buffer parameters */
+	InstancePtr->SendBuffer.RequestedBytes = NumBytes;
+	InstancePtr->SendBuffer.RemainingBytes = NumBytes;
+	InstancePtr->SendBuffer.NextBytePtr = BufferPtr;
+
+	/*
+	 * Transmit interrupts will be enabled in XUartPs_SendBuffer(), after
+	 * filling the TX FIFO.
+	 */
+	BytesSent = XUartPs_SendBuffer(InstancePtr);
+
+	return BytesSent;
+}
+
+/****************************************************************************/
+/**
+*
+* This function attempts to receive a specified number of bytes of data
+* from the device and store it into the specified buffer. This function works
+* for both polled or interrupt driven modes. It is non-blocking.
+*
+* In a polled mode, this function will only receive the data already in the
+* RX FIFO. The application may need to call it repeatedly to receive the
+* entire buffer. Polled mode is the default mode of operation for the device.
+*
+* In interrupt mode, this function will start the receiving, if not the entire
+* buffer has been received, the interrupt handler will continue receiving data
+* until the entire buffer has been received. A callback function, as specified
+* by the application, will be called to indicate the completion of the
+* receiving or error conditions.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+* @param	BufferPtr is pointer to buffer for data to be received into
+* @param	NumBytes is the number of bytes to be received. A value of zero
+*		will stop a previous receive operation that is in progress in
+*		interrupt mode.
+*
+* @return	The number of bytes received.
+*
+* @note
+*
+* The number of bytes is not asserted so that this function may be called
+* with a value of zero to stop an operation that is already in progress.
+*
+*****************************************************************************/
+u32 XUartPs_Recv(XUartPs *InstancePtr,
+			  u8 *BufferPtr, u32 NumBytes)
+{
+	u32 ReceivedCount;
+	u32 ImrRegister;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(BufferPtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Disable all the interrupts.
+	 * This stops a previous operation that may be interrupt driven
+	 */
+	ImrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				  XUARTPS_IMR_OFFSET);
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET,
+		XUARTPS_IXR_MASK);
+
+	/* Setup the buffer parameters */
+	InstancePtr->ReceiveBuffer.RequestedBytes = NumBytes;
+	InstancePtr->ReceiveBuffer.RemainingBytes = NumBytes;
+	InstancePtr->ReceiveBuffer.NextBytePtr = BufferPtr;
+
+	/* Receive the data from the device */
+	ReceivedCount = XUartPs_ReceiveBuffer(InstancePtr);
+
+	/* Restore the interrupt state */
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IER_OFFSET,
+		ImrRegister);
+
+	return ReceivedCount;
+}
+
+/****************************************************************************/
+/*
+*
+* This function sends a buffer that has been previously specified by setting
+* up the instance variables of the instance. This function is an internal
+* function for the XUartPs driver such that it may be called from a shell
+* function that sets up the buffer or from an interrupt handler.
+*
+* This function sends the specified buffer in either polled or interrupt
+* driven modes. This function is non-blocking.
+*
+* In a polled mode, this function only sends as much data as the TX FIFO
+* can buffer. The application may need to call it repeatedly to send the
+* entire buffer.
+*
+* In interrupt mode, this function starts the sending of the buffer, if not
+* the entire buffer has been sent, then the interrupt handler continues the
+* sending until the entire buffer has been sent. A callback function, as
+* specified by the application, will be called to indicate the completion of
+* sending.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+*
+* @return	The number of bytes actually sent
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XUartPs_SendBuffer(XUartPs *InstancePtr)
+{
+	u32 SentCount = 0U;
+	u32 ImrRegister;
+
+	/*
+	 * If the TX FIFO is full, send nothing.
+	 * Otherwise put bytes into the TX FIFO unil it is full, or all of the
+	 * data has been put into the FIFO.
+	 */
+	while ((!XUartPs_IsTransmitFull(InstancePtr->Config.BaseAddress)) &&
+		   (InstancePtr->SendBuffer.RemainingBytes > SentCount)) {
+
+		/* Fill the FIFO from the buffer */
+		XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   XUARTPS_FIFO_OFFSET,
+				   ((u32)InstancePtr->SendBuffer.
+				   NextBytePtr[SentCount]));
+
+		/* Increment the send count. */
+		SentCount++;
+	}
+
+	/* Update the buffer to reflect the bytes that were sent from it */
+	InstancePtr->SendBuffer.NextBytePtr += SentCount;
+	InstancePtr->SendBuffer.RemainingBytes -= SentCount;
+
+	/*
+	 * If interrupts are enabled as indicated by the receive interrupt, then
+	 * enable the TX FIFO empty interrupt, so further action can be taken
+	 * for this sending.
+	 */
+	ImrRegister =
+		XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				  XUARTPS_IMR_OFFSET);
+	if (((ImrRegister & XUARTPS_IXR_RXFULL) != (u32)0) ||
+		((ImrRegister & XUARTPS_IXR_RXEMPTY) != (u32)0)||
+		((ImrRegister & XUARTPS_IXR_RXOVR) != (u32)0)) {
+
+		XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+					   XUARTPS_IER_OFFSET,
+					   ImrRegister | (u32)XUARTPS_IXR_TXEMPTY);
+	}
+
+	return SentCount;
+}
+
+/****************************************************************************/
+/*
+*
+* This function receives a buffer that has been previously specified by setting
+* up the instance variables of the instance. This function is an internal
+* function, and it may be called from a shell function that sets up the buffer
+* or from an interrupt handler.
+*
+* This function attempts to receive a specified number of bytes from the
+* device and store it into the specified buffer. This function works for
+* either polled or interrupt driven modes. It is non-blocking.
+*
+* In polled mode, this function only receives as much data as in the RX FIFO.
+* The application may need to call it repeatedly to receive the entire buffer.
+* Polled mode is the default mode for the driver.
+*
+* In interrupt mode, this function starts the receiving, if not the entire
+* buffer has been received, the interrupt handler will continue until the
+* entire buffer has been received. A callback function, as specified by the
+* application, will be called to indicate the completion of the receiving or
+* error conditions.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+*
+* @return	The number of bytes received.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XUartPs_ReceiveBuffer(XUartPs *InstancePtr)
+{
+	u32 CsrRegister;
+	u32 ReceivedCount = 0U;
+	u32 ByteStatusValue, EventData;
+	u32 Event;
+
+	/*
+	 * Read the Channel Status Register to determine if there is any data in
+	 * the RX FIFO
+	 */
+	CsrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				XUARTPS_SR_OFFSET);
+
+	/*
+	 * Loop until there is no more data in RX FIFO or the specified
+	 * number of bytes has been received
+	 */
+	while((ReceivedCount < InstancePtr->ReceiveBuffer.RemainingBytes)&&
+		(((CsrRegister & XUARTPS_SR_RXEMPTY) == (u32)0))){
+
+		if (InstancePtr->is_rxbs_error) {
+			ByteStatusValue = XUartPs_ReadReg(
+						InstancePtr->Config.BaseAddress,
+						XUARTPS_RXBS_OFFSET);
+			if((ByteStatusValue & XUARTPS_RXBS_MASK)!= (u32)0) {
+				EventData = ByteStatusValue;
+				Event = XUARTPS_EVENT_PARE_FRAME_BRKE;
+				/*
+				 * Call the application handler to indicate that there is a receive
+				 * error or a break interrupt, if the application cares about the
+				 * error it call a function to get the last errors.
+				 */
+				InstancePtr->Handler(InstancePtr->CallBackRef,
+							Event, EventData);
+			}
+		}
+
+		InstancePtr->ReceiveBuffer.NextBytePtr[ReceivedCount] =
+			XUartPs_ReadReg(InstancePtr->Config.
+				  BaseAddress,
+				  XUARTPS_FIFO_OFFSET);
+
+		ReceivedCount++;
+
+		CsrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+								XUARTPS_SR_OFFSET);
+	}
+	InstancePtr->is_rxbs_error = 0;
+	/*
+	 * Update the receive buffer to reflect the number of bytes just
+	 * received
+	 */
+	if(InstancePtr->ReceiveBuffer.NextBytePtr != NULL){
+		InstancePtr->ReceiveBuffer.NextBytePtr += ReceivedCount;
+	}
+	InstancePtr->ReceiveBuffer.RemainingBytes -= ReceivedCount;
+
+	return ReceivedCount;
+}
+
+/*****************************************************************************/
+/**
+*
+* Sets the baud rate for the device. Checks the input value for
+* validity and also verifies that the requested rate can be configured to
+* within the maximum error range specified by XUARTPS_MAX_BAUD_ERROR_RATE.
+* If the provided rate is not possible, the current setting is unchanged.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+* @param	BaudRate to be set
+*
+* @return
+*		- XST_SUCCESS if everything configured as expected
+*		- XST_UART_BAUD_ERROR if the requested rate is not available
+*		  because there was too much error
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate)
+{
+	u32 IterBAUDDIV;	/* Iterator for available baud divisor values */
+	u32 BRGR_Value;		/* Calculated value for baud rate generator */
+	u32 CalcBaudRate;	/* Calculated baud rate */
+	u32 BaudError;		/* Diff between calculated and requested baud rate */
+	u32 Best_BRGR = 0U;	/* Best value for baud rate generator */
+	u8 Best_BAUDDIV = 0U;	/* Best value for baud divisor */
+	u32 Best_Error = 0xFFFFFFFFU;
+	u32 PercentError;
+	u32 ModeReg;
+	u32 InputClk;
+
+	/* Asserts validate the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid(BaudRate <= (u32)XUARTPS_MAX_RATE);
+	Xil_AssertNonvoid(BaudRate >= (u32)XUARTPS_MIN_RATE);
+
+	/*
+	 * Make sure the baud rate is not impossilby large.
+	 * Fastest possible baud rate is Input Clock / 2.
+	 */
+	if ((BaudRate * 2) > InstancePtr->Config.InputClockHz) {
+		return XST_UART_BAUD_ERROR;
+	}
+	/* Check whether the input clock is divided by 8 */
+	ModeReg = XUartPs_ReadReg( InstancePtr->Config.BaseAddress,
+				 XUARTPS_MR_OFFSET);
+
+	InputClk = InstancePtr->Config.InputClockHz;
+	if(ModeReg & XUARTPS_MR_CLKSEL) {
+		InputClk = InstancePtr->Config.InputClockHz / 8;
+	}
+
+	/*
+	 * Determine the Baud divider. It can be 4to 254.
+	 * Loop through all possible combinations
+	 */
+	for (IterBAUDDIV = 4; IterBAUDDIV < 255; IterBAUDDIV++) {
+
+		/* Calculate the value for BRGR register */
+		BRGR_Value = InputClk / (BaudRate * (IterBAUDDIV + 1));
+
+		/* Calculate the baud rate from the BRGR value */
+		CalcBaudRate = InputClk/ (BRGR_Value * (IterBAUDDIV + 1));
+
+		/* Avoid unsigned integer underflow */
+		if (BaudRate > CalcBaudRate) {
+			BaudError = BaudRate - CalcBaudRate;
+		}
+		else {
+			BaudError = CalcBaudRate - BaudRate;
+		}
+
+		/* Find the calculated baud rate closest to requested baud rate. */
+		if (Best_Error > BaudError) {
+
+			Best_BRGR = BRGR_Value;
+			Best_BAUDDIV = IterBAUDDIV;
+			Best_Error = BaudError;
+		}
+	}
+
+	/* Make sure the best error is not too large. */
+	PercentError = (Best_Error * 100) / BaudRate;
+	if (XUARTPS_MAX_BAUD_ERROR_RATE < PercentError) {
+		return XST_UART_BAUD_ERROR;
+	}
+
+	/* Disable TX and RX to avoid glitches when setting the baud rate. */
+	XUartPs_DisableUart(InstancePtr);
+
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XUARTPS_BAUDGEN_OFFSET, Best_BRGR);
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XUARTPS_BAUDDIV_OFFSET, Best_BAUDDIV);
+
+	/* RX and TX SW reset */
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_CR_OFFSET,
+				XUARTPS_CR_TXRST | XUARTPS_CR_RXRST);
+
+	/* Enable device */
+	XUartPs_EnableUart(InstancePtr);
+
+	InstancePtr->BaudRate = BaudRate;
+
+	return XST_SUCCESS;
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function is a stub handler that is the default handler such that if the
+* application has not set the handler when interrupts are enabled, this
+* function will be called.
+*
+* @param	CallBackRef is unused by this function.
+* @param	Event is unused by this function.
+* @param	ByteCount is unused by this function.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void XUartPs_StubHandler(void *CallBackRef, u32 Event,
+				 u32 ByteCount)
+{
+	(void) CallBackRef;
+	(void) Event;
+	(void) ByteCount;
+	/* Assert occurs always since this is a stub and should never be called */
+	Xil_AssertVoidAlways();
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/uartps_v3_6/src/xuartps.h b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps.h
new file mode 100644
index 0000000..33758c2
--- /dev/null
+++ b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps.h
@@ -0,0 +1,520 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xuartps.h
+* @addtogroup uartps_v3_5
+* @{
+* @details
+*
+* This driver supports the following features:
+*
+* - Dynamic data format (baud rate, data bits, stop bits, parity)
+* - Polled mode
+* - Interrupt driven mode
+* - Transmit and receive FIFOs (32 byte FIFO depth)
+* - Access to the external modem control lines
+*
+* Initialization & Configuration
+*
+* The XUartPs_Config structure is used by the driver to configure itself.
+* Fields inside this structure are properties of XUartPs based on its hardware
+* build.
+*
+* To support multiple runtime loading and initialization strategies employed
+* by various operating systems, the driver instance can be initialized in the
+* following way:
+*
+*   - XUartPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
+*	 configuration structure provided by the caller. If running in a system
+*	 with address translation, the parameter EffectiveAddr should be the
+* 	  virtual address.
+*
+* Baud Rate
+*
+* The UART has an internal baud rate generator, which furnishes the baud rate
+* clock for both the receiver and the transmitter. Ther input clock frequency
+* can be either the master clock or the master clock divided by 8, configured
+* through the mode register.
+*
+* Accompanied with the baud rate divider register, the baud rate is determined
+* by:
+* 
+*	baud_rate = input_clock / (bgen * (bdiv + 1)
+* 

+* where bgen is the value of the baud rate generator, and bdiv is the value of
+* baud rate divider.
+*
+* Interrupts
+*
+* The FIFOs are not flushed when the driver is initialized, but a function is
+* provided to allow the user to reset the FIFOs if desired.
+*
+* The driver defaults to no interrupts at initialization such that interrupts
+* must be enabled if desired. An interrupt is generated for one of the
+* following conditions.
+*
+* - A change in the modem signals
+* - Data in the receive FIFO for a configuable time without receiver activity
+* - A parity error
+* - A framing error
+* - An overrun error
+* - Transmit FIFO is full
+* - Transmit FIFO is empty
+* - Receive FIFO is full
+* - Receive FIFO is empty
+* - Data in the receive FIFO equal to the receive threshold
+*
+* The application can control which interrupts are enabled using the
+* XUartPs_SetInterruptMask() function.
+*
+* In order to use interrupts, it is necessary for the user to connect the
+* driver interrupt handler, XUartPs_InterruptHandler(), to the interrupt
+* system of the application. A separate handler should be provided by the
+* application to communicate with the interrupt system, and conduct
+* application specific interrupt handling. An application registers its own
+* handler through the XUartPs_SetHandler() function.
+*
+* Data Transfer
+*
+* The functions, XUartPs_Send() and XUartPs_Recv(), are provided in the
+* driver to allow data to be sent and received. They can be used in either
+* polled or interrupt mode.
+*
+* @note
+*
+* The default configuration for the UART after initialization is:
+*
+* - 9,600 bps or XPAR_DFT_BAUDRATE if defined
+* - 8 data bits
+* - 1 stop bit
+* - no parity
+* - FIFO's are enabled with a receive threshold of 8 bytes
+* - The RX timeout is enabled with a timeout of 1 (4 char times)
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- ------ -------- ----------------------------------------------
+* 1.00a	drg/jz 01/12/10 First Release
+* 1.00a sdm    09/27/11 Fixed compiler warnings and also a bug
+*		        in XUartPs_SetFlowDelay where the value was not
+*			being written to the register.
+* 1.01a sdm    12/20/11 Removed the InputClockHz parameter from the XUartPs
+*			instance structure and the driver is updated to use
+*			InputClockHz parameter from the XUartPs_Config config
+*			structure.
+*			Added a parameter to XUartPs_Config structure which
+*			specifies whether the user has selected Modem pins
+*			to be connected to MIO or FMIO.
+*			Added the tcl file to generate the xparameters.h
+* 1.02a sg     05/16/12	Changed XUARTPS_RXWM_MASK to 0x3F for CR 652540 fix.
+* 1.03a sg     07/16/12 Updated XUARTPS_FORMAT_7_BITS and XUARTPS_FORMAT_6_BITS
+*			with the correct values for CR 666724
+* 			Added defines for XUARTPS_IXR_TOVR,  XUARTPS_IXR_TNFUL
+*			and XUARTPS_IXR_TTRIG.
+*			Modified the name of these defines
+*			XUARTPS_MEDEMSR_DCDX to XUARTPS_MODEMSR_DDCD
+*			XUARTPS_MEDEMSR_RIX to XUARTPS_MODEMSR_TERI
+*			XUARTPS_MEDEMSR_DSRX to XUARTPS_MODEMSR_DDSR
+*			XUARTPS_MEDEMSR_CTSX to XUARTPS_MODEMSR_DCTS
+* 1.05a hk     08/22/13 Added API for uart reset and related
+*			constant definitions.
+* 2.0   hk      03/07/14 Version number revised.
+* 2.1   hk     04/16/14 Change XUARTPS_MAX_RATE to 921600. CR# 780625.
+* 2.2   hk     06/23/14 SW reset of RX and TX should be done when changing
+*                       baud rate. CR# 804281.
+* 3.0   vm     12/09/14 Modified source code according to misrac guideline.
+*			Support for Zynq Ultrascale Mp added.
+* 3.1	kvn    04/10/15 Modified code for latest RTL changes. Also added
+*						platform variable in driver instance structure.
+* 3.1   adk   14/03/16  Include interrupt examples in the peripheral test when
+*			uart is connected to a valid interrupt controller CR#946803.
+* 3.2   rk     07/20/16 Modified the logic for transmission break bit set
+* 3.4   ms     01/23/17 Added xil_printf statement in main function for all
+*                       examples to ensure that "Successfully ran" and "Failed"
+*                       strings are available in all examples. This is a fix
+*                       for CR-965028.
+*       ms     03/17/17 Added readme.txt file in examples folder for doxygen
+*                       generation.
+* 3.6   ms     02/16/18 Updates the flow control mode offset value in modem
+*                       control register.
+*
+* 

+*
+*****************************************************************************/
+
+#ifndef XUARTPS_H		/* prevent circular inclusions */
+#define XUARTPS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xuartps_hw.h"
+#include "xplatform_info.h"
+
+/************************** Constant Definitions ****************************/
+
+/*
+ * The following constants indicate the max and min baud rates and these
+ * numbers are based only on the testing that has been done. The hardware
+ * is capable of other baud rates.
+ */
+#define XUARTPS_MAX_RATE	 921600U
+#define XUARTPS_MIN_RATE	 110U
+
+#define XUARTPS_DFT_BAUDRATE  115200U   /* Default baud rate */
+
+/** @name Configuration options
+ * @{
+ */
+/**
+ * These constants specify the options that may be set or retrieved
+ * with the driver, each is a unique bit mask such that multiple options
+ * may be specified.  These constants indicate the available options
+ * in active state.
+ *
+ */
+
+#define XUARTPS_OPTION_SET_BREAK	0x0080U /**< Starts break transmission */
+#define XUARTPS_OPTION_STOP_BREAK	0x0040U /**< Stops break transmission */
+#define XUARTPS_OPTION_RESET_TMOUT	0x0020U /**< Reset the receive timeout */
+#define XUARTPS_OPTION_RESET_TX		0x0010U /**< Reset the transmitter */
+#define XUARTPS_OPTION_RESET_RX		0x0008U /**< Reset the receiver */
+#define XUARTPS_OPTION_ASSERT_RTS	0x0004U /**< Assert the RTS bit */
+#define XUARTPS_OPTION_ASSERT_DTR	0x0002U /**< Assert the DTR bit */
+#define XUARTPS_OPTION_SET_FCM		0x0001U /**< Turn on flow control mode */
+/*@}*/
+
+
+/** @name Channel Operational Mode
+ *
+ * The UART can operate in one of four modes: Normal, Local Loopback, Remote
+ * Loopback, or automatic echo.
+ *
+ * @{
+ */
+
+#define XUARTPS_OPER_MODE_NORMAL		(u8)0x00U	/**< Normal Mode */
+#define XUARTPS_OPER_MODE_AUTO_ECHO		(u8)0x01U	/**< Auto Echo Mode */
+#define XUARTPS_OPER_MODE_LOCAL_LOOP	(u8)0x02U	/**< Local Loopback Mode */
+#define XUARTPS_OPER_MODE_REMOTE_LOOP	(u8)0x03U	/**< Remote Loopback Mode */
+
+/* @} */
+
+/** @name Data format values
+ *
+ * These constants specify the data format that the driver supports.
+ * The data format includes the number of data bits, the number of stop
+ * bits and parity.
+ *
+ * @{
+ */
+#define XUARTPS_FORMAT_8_BITS		0U /**< 8 data bits */
+#define XUARTPS_FORMAT_7_BITS		2U /**< 7 data bits */
+#define XUARTPS_FORMAT_6_BITS		3U /**< 6 data bits */
+
+#define XUARTPS_FORMAT_NO_PARITY	4U /**< No parity */
+#define XUARTPS_FORMAT_MARK_PARITY	3U /**< Mark parity */
+#define XUARTPS_FORMAT_SPACE_PARITY	2U /**< parity */
+#define XUARTPS_FORMAT_ODD_PARITY	1U /**< Odd parity */
+#define XUARTPS_FORMAT_EVEN_PARITY	0U /**< Even parity */
+
+#define XUARTPS_FORMAT_2_STOP_BIT	2U /**< 2 stop bits */
+#define XUARTPS_FORMAT_1_5_STOP_BIT	1U /**< 1.5 stop bits */
+#define XUARTPS_FORMAT_1_STOP_BIT	0U /**< 1 stop bit */
+/*@}*/
+
+/** @name Callback events
+ *
+ * These constants specify the handler events that an application can handle
+ * using its specific handler function. Note that these constants are not bit
+ * mask, so only one event can be passed to an application at a time.
+ *
+ * @{
+ */
+#define XUARTPS_EVENT_RECV_DATA			1U /**< Data receiving done */
+#define XUARTPS_EVENT_RECV_TOUT			2U /**< A receive timeout occurred */
+#define XUARTPS_EVENT_SENT_DATA			3U /**< Data transmission done */
+#define XUARTPS_EVENT_RECV_ERROR		4U /**< A receive error detected */
+#define XUARTPS_EVENT_MODEM				5U /**< Modem status changed */
+#define XUARTPS_EVENT_PARE_FRAME_BRKE	6U /**< A receive parity, frame, break
+											 *	error detected */
+#define XUARTPS_EVENT_RECV_ORERR		7U /**< A receive overrun error detected */
+/*@}*/
+
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;	 /**< Unique ID  of device */
+	u32 BaseAddress; /**< Base address of device (IPIF) */
+	u32 InputClockHz;/**< Input clock frequency */
+	s32 ModemPinsConnected; /** Specifies whether modem pins are connected
+				 *  to MIO or FMIO */
+} XUartPs_Config;
+
+/* Keep track of state information about a data buffer in the interrupt mode. */
+typedef struct {
+	u8 *NextBytePtr;
+	u32 RequestedBytes;
+	u32 RemainingBytes;
+} XUartPsBuffer;
+
+/**
+ * Keep track of data format setting of a device.
+ */
+typedef struct {
+	u32 BaudRate;	/**< In bps, ie 1200 */
+	u32 DataBits;	/**< Number of data bits */
+	u32 Parity;		/**< Parity */
+	u8 StopBits;	/**< Number of stop bits */
+} XUartPsFormat;
+
+/******************************************************************************/
+/**
+ * This data type defines a handler that an application defines to communicate
+ * with interrupt system to retrieve state information about an application.
+ *
+ * @param	CallBackRef is a callback reference passed in by the upper layer
+ *		when setting the handler, and is passed back to the upper layer
+ *		when the handler is called. It is used to find the device driver
+ *		instance.
+ * @param	Event contains one of the event constants indicating events that
+ *		have occurred.
+ * @param	EventData contains the number of bytes sent or received at the
+ *		time of the call for send and receive events and contains the
+ *		modem status for modem events.
+ *
+ ******************************************************************************/
+typedef void (*XUartPs_Handler) (void *CallBackRef, u32 Event,
+				  u32 EventData);
+
+/**
+ * The XUartPs driver instance data structure. A pointer to an instance data
+ * structure is passed around by functions to refer to a specific driver
+ * instance.
+ */
+typedef struct {
+	XUartPs_Config Config;	/* Configuration data structure */
+	u32 InputClockHz;	/* Input clock frequency */
+	u32 IsReady;		/* Device is initialized and ready */
+	u32 BaudRate;		/* Current baud rate */
+
+	XUartPsBuffer SendBuffer;
+	XUartPsBuffer ReceiveBuffer;
+
+	XUartPs_Handler Handler;
+	void *CallBackRef;	/* Callback reference for event handler */
+	u32 Platform;
+	u8 is_rxbs_error;
+} XUartPs;
+
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* Get the UART Channel Status Register.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u16 XUartPs_GetChannelStatus(XUartPs *InstancePtr)
+*
+******************************************************************************/
+#define XUartPs_GetChannelStatus(InstancePtr)   \
+	Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_SR_OFFSET)
+
+/****************************************************************************/
+/**
+* Get the UART Mode Control Register.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XUartPs_GetControl(XUartPs *InstancePtr)
+*
+******************************************************************************/
+#define XUartPs_GetModeControl(InstancePtr)  \
+	Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_CR_OFFSET)
+
+/****************************************************************************/
+/**
+* Set the UART Mode Control Register.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*	void XUartPs_SetModeControl(XUartPs *InstancePtr, u16 RegisterValue)
+*
+******************************************************************************/
+#define XUartPs_SetModeControl(InstancePtr, RegisterValue) \
+   Xil_Out32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_CR_OFFSET, \
+			(u32)(RegisterValue))
+
+/****************************************************************************/
+/**
+* Enable the transmitter and receiver of the UART.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XUartPs_EnableUart(XUartPs *InstancePtr)
+*
+******************************************************************************/
+#define XUartPs_EnableUart(InstancePtr) \
+   Xil_Out32(((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET), \
+	  ((Xil_In32((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET) & \
+	  (u32)(~XUARTPS_CR_EN_DIS_MASK)) | ((u32)XUARTPS_CR_RX_EN | (u32)XUARTPS_CR_TX_EN)))
+
+/****************************************************************************/
+/**
+* Disable the transmitter and receiver of the UART.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XUartPs_DisableUart(XUartPs *InstancePtr)
+*
+******************************************************************************/
+#define XUartPs_DisableUart(InstancePtr) \
+   Xil_Out32(((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET), \
+	  (((Xil_In32((InstancePtr)->Config.BaseAddress + (u32)XUARTPS_CR_OFFSET)) & \
+	  (u32)(~XUARTPS_CR_EN_DIS_MASK)) | ((u32)XUARTPS_CR_RX_DIS | (u32)XUARTPS_CR_TX_DIS)))
+
+/****************************************************************************/
+/**
+* Determine if the transmitter FIFO is empty.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return
+*		- TRUE if a byte can be sent
+*		- FALSE if the Transmitter Fifo is not empty
+*
+* @note		C-Style signature:
+*		u32 XUartPs_IsTransmitEmpty(XUartPs InstancePtr)
+*
+******************************************************************************/
+#define XUartPs_IsTransmitEmpty(InstancePtr)				\
+	((Xil_In32(((InstancePtr)->Config.BaseAddress) + (u32)XUARTPS_SR_OFFSET) & \
+	 (u32)XUARTPS_SR_TXEMPTY) == (u32)XUARTPS_SR_TXEMPTY)
+
+
+/************************** Function Prototypes *****************************/
+
+/* Static lookup function implemented in xuartps_sinit.c */
+XUartPs_Config *XUartPs_LookupConfig(u16 DeviceId);
+
+/* Interface functions implemented in xuartps.c */
+s32 XUartPs_CfgInitialize(XUartPs *InstancePtr,
+				  XUartPs_Config * Config, u32 EffectiveAddr);
+
+u32 XUartPs_Send(XUartPs *InstancePtr,u8 *BufferPtr,
+			   u32 NumBytes);
+
+u32 XUartPs_Recv(XUartPs *InstancePtr,u8 *BufferPtr,
+			   u32 NumBytes);
+
+s32 XUartPs_SetBaudRate(XUartPs *InstancePtr, u32 BaudRate);
+
+/* Options functions in xuartps_options.c */
+void XUartPs_SetOptions(XUartPs *InstancePtr, u16 Options);
+
+u16 XUartPs_GetOptions(XUartPs *InstancePtr);
+
+void XUartPs_SetFifoThreshold(XUartPs *InstancePtr, u8 TriggerLevel);
+
+u8 XUartPs_GetFifoThreshold(XUartPs *InstancePtr);
+
+u16 XUartPs_GetModemStatus(XUartPs *InstancePtr);
+
+u32 XUartPs_IsSending(XUartPs *InstancePtr);
+
+u8 XUartPs_GetOperMode(XUartPs *InstancePtr);
+
+void XUartPs_SetOperMode(XUartPs *InstancePtr, u8 OperationMode);
+
+u8 XUartPs_GetFlowDelay(XUartPs *InstancePtr);
+
+void XUartPs_SetFlowDelay(XUartPs *InstancePtr, u8 FlowDelayValue);
+
+u8 XUartPs_GetRecvTimeout(XUartPs *InstancePtr);
+
+void XUartPs_SetRecvTimeout(XUartPs *InstancePtr, u8 RecvTimeout);
+
+s32 XUartPs_SetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr);
+
+void XUartPs_GetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr);
+
+/* interrupt functions in xuartps_intr.c */
+u32 XUartPs_GetInterruptMask(XUartPs *InstancePtr);
+
+void XUartPs_SetInterruptMask(XUartPs *InstancePtr, u32 Mask);
+
+void XUartPs_InterruptHandler(XUartPs *InstancePtr);
+
+void XUartPs_SetHandler(XUartPs *InstancePtr, XUartPs_Handler FuncPtr,
+			 void *CallBackRef);
+
+/* self-test functions in xuartps_selftest.c */
+s32 XUartPs_SelfTest(XUartPs *InstancePtr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_g.c b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_g.c
new file mode 100644
index 0000000..71cb22d
--- /dev/null
+++ b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_g.c
@@ -0,0 +1,63 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xuartps.h"
+
+/*
+* The configuration table for devices
+*/
+
+XUartPs_Config XUartPs_ConfigTable[XPAR_XUARTPS_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_UART_0_DEVICE_ID,
+		XPAR_PSU_UART_0_BASEADDR,
+		XPAR_PSU_UART_0_UART_CLK_FREQ_HZ,
+		XPAR_PSU_UART_0_HAS_MODEM
+	},
+	{
+		XPAR_PSU_UART_1_DEVICE_ID,
+		XPAR_PSU_UART_1_BASEADDR,
+		XPAR_PSU_UART_1_UART_CLK_FREQ_HZ,
+		XPAR_PSU_UART_1_HAS_MODEM
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_hw.c b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_hw.c
new file mode 100644
index 0000000..724c3cb
--- /dev/null
+++ b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_hw.c
@@ -0,0 +1,180 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xuartps_hw.c
+* @addtogroup uartps_v3_5
+* @{
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- ------ -------- ----------------------------------------------
+* 1.00	drg/jz 01/12/10 First Release
+* 1.05a hk     08/22/13 Added reset function
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xuartps_hw.h"
+
+/************************** Constant Definitions ****************************/
+
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+/****************************************************************************/
+/**
+*
+* This function sends one byte using the device. This function operates in
+* polled mode and blocks until the data has been put into the TX FIFO register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	Data contains the byte to be sent.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUartPs_SendByte(u32 BaseAddress, u8 Data)
+{
+	/* Wait until there is space in TX FIFO */
+	while (XUartPs_IsTransmitFull(BaseAddress)) {
+		;
+	}
+
+	/* Write the byte into the TX FIFO */
+	XUartPs_WriteReg(BaseAddress, XUARTPS_FIFO_OFFSET, (u32)Data);
+}
+
+/****************************************************************************/
+/**
+*
+* This function receives a byte from the device. It operates in polled mode
+* and blocks until a byte has received.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	The data byte received.
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 XUartPs_RecvByte(u32 BaseAddress)
+{
+	u32 RecievedByte;
+	/* Wait until there is data */
+	while (!XUartPs_IsReceiveData(BaseAddress)) {
+		;
+	}
+	RecievedByte = XUartPs_ReadReg(BaseAddress, XUARTPS_FIFO_OFFSET);
+	/* Return the byte received */
+	return (u8)RecievedByte;
+}
+
+/****************************************************************************/
+/**
+*
+* This function resets UART
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	None
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUartPs_ResetHw(u32 BaseAddress)
+{
+
+	/* Disable interrupts */
+	XUartPs_WriteReg(BaseAddress, XUARTPS_IDR_OFFSET, XUARTPS_IXR_MASK);
+
+	/* Disable receive and transmit */
+	XUartPs_WriteReg(BaseAddress, XUARTPS_CR_OFFSET,
+				((u32)XUARTPS_CR_RX_DIS | (u32)XUARTPS_CR_TX_DIS));
+
+	/*
+	 * Software reset of receive and transmit
+	 * This clears the FIFO.
+	 */
+	XUartPs_WriteReg(BaseAddress, XUARTPS_CR_OFFSET,
+				((u32)XUARTPS_CR_TXRST | (u32)XUARTPS_CR_RXRST));
+
+	/* Clear status flags - SW reset wont clear sticky flags. */
+	XUartPs_WriteReg(BaseAddress, XUARTPS_ISR_OFFSET, XUARTPS_IXR_MASK);
+
+	/*
+	 * Mode register reset value : All zeroes
+	 * Normal mode, even parity, 1 stop bit
+	 */
+	XUartPs_WriteReg(BaseAddress, XUARTPS_MR_OFFSET,
+				XUARTPS_MR_CHMODE_NORM);
+
+	/* Rx and TX trigger register reset values */
+	XUartPs_WriteReg(BaseAddress, XUARTPS_RXWM_OFFSET,
+				XUARTPS_RXWM_RESET_VAL);
+	XUartPs_WriteReg(BaseAddress, XUARTPS_TXWM_OFFSET,
+				XUARTPS_TXWM_RESET_VAL);
+
+	/* Rx timeout disabled by default */
+	XUartPs_WriteReg(BaseAddress, XUARTPS_RXTOUT_OFFSET,
+				XUARTPS_RXTOUT_DISABLE);
+
+	/* Baud rate generator and dividor reset values */
+	XUartPs_WriteReg(BaseAddress, XUARTPS_BAUDGEN_OFFSET,
+				XUARTPS_BAUDGEN_RESET_VAL);
+	XUartPs_WriteReg(BaseAddress, XUARTPS_BAUDDIV_OFFSET,
+				XUARTPS_BAUDDIV_RESET_VAL);
+
+	/*
+	 * Control register reset value -
+	 * RX and TX are disable by default
+	 */
+	XUartPs_WriteReg(BaseAddress, XUARTPS_CR_OFFSET,
+				((u32)XUARTPS_CR_RX_DIS | (u32)XUARTPS_CR_TX_DIS |
+						(u32)XUARTPS_CR_STOPBRK));
+
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_hw.h b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_hw.h
new file mode 100644
index 0000000..9a2bc43
--- /dev/null
+++ b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_hw.h
@@ -0,0 +1,451 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xuartps_hw.h
+* @addtogroup uartps_v3_5
+* @{
+*
+* This header file contains the hardware interface of an XUartPs device.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- ------ -------- ----------------------------------------------
+* 1.00	drg/jz 01/12/10 First Release
+* 1.03a sg     09/04/12 Added defines for XUARTPS_IXR_TOVR,  XUARTPS_IXR_TNFUL
+*			and XUARTPS_IXR_TTRIG.
+*			Modified the names of these defines
+*			XUARTPS_MEDEMSR_DCDX to XUARTPS_MODEMSR_DDCD
+*			XUARTPS_MEDEMSR_RIX to XUARTPS_MODEMSR_TERI
+*			XUARTPS_MEDEMSR_DSRX to XUARTPS_MODEMSR_DDSR
+*			XUARTPS_MEDEMSR_CTSX to XUARTPS_MODEMSR_DCTS
+* 1.05a hk     08/22/13 Added prototype for uart reset and related
+*			constant definitions.
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn    04/10/15 Modified code for latest RTL changes.
+* 3.6   ms     02/16/18 Updates flow control mode offset value in
+*			modem control register.
+*
+* 

+*
+******************************************************************************/
+#ifndef XUARTPS_HW_H		/* prevent circular inclusions */
+#define XUARTPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register Map
+ *
+ * Register offsets for the UART.
+ * @{
+ */
+#define XUARTPS_CR_OFFSET		0x0000U  /**< Control Register [8:0] */
+#define XUARTPS_MR_OFFSET		0x0004U  /**< Mode Register [9:0] */
+#define XUARTPS_IER_OFFSET		0x0008U  /**< Interrupt Enable [12:0] */
+#define XUARTPS_IDR_OFFSET		0x000CU  /**< Interrupt Disable [12:0] */
+#define XUARTPS_IMR_OFFSET		0x0010U  /**< Interrupt Mask [12:0] */
+#define XUARTPS_ISR_OFFSET		0x0014U  /**< Interrupt Status [12:0]*/
+#define XUARTPS_BAUDGEN_OFFSET	0x0018U  /**< Baud Rate Generator [15:0] */
+#define XUARTPS_RXTOUT_OFFSET	0x001CU  /**< RX Timeout [7:0] */
+#define XUARTPS_RXWM_OFFSET		0x0020U  /**< RX FIFO Trigger Level [5:0] */
+#define XUARTPS_MODEMCR_OFFSET	0x0024U  /**< Modem Control [5:0] */
+#define XUARTPS_MODEMSR_OFFSET	0x0028U  /**< Modem Status [8:0] */
+#define XUARTPS_SR_OFFSET		0x002CU  /**< Channel Status [14:0] */
+#define XUARTPS_FIFO_OFFSET		0x0030U  /**< FIFO [7:0] */
+#define XUARTPS_BAUDDIV_OFFSET	0x0034U  /**< Baud Rate Divider [7:0] */
+#define XUARTPS_FLOWDEL_OFFSET	0x0038U  /**< Flow Delay [5:0] */
+#define XUARTPS_TXWM_OFFSET		0x0044U  /**< TX FIFO Trigger Level [5:0] */
+#define XUARTPS_RXBS_OFFSET		0x0048U  /**< RX FIFO Byte Status [11:0] */
+/* @} */
+
+/** @name Control Register
+ *
+ * The Control register (CR) controls the major functions of the device.
+ *
+ * Control Register Bit Definition
+ */
+
+#define XUARTPS_CR_STOPBRK	0x00000100U  /**< Stop transmission of break */
+#define XUARTPS_CR_STARTBRK	0x00000080U  /**< Set break */
+#define XUARTPS_CR_TORST	0x00000040U  /**< RX timeout counter restart */
+#define XUARTPS_CR_TX_DIS	0x00000020U  /**< TX disabled. */
+#define XUARTPS_CR_TX_EN	0x00000010U  /**< TX enabled */
+#define XUARTPS_CR_RX_DIS	0x00000008U  /**< RX disabled. */
+#define XUARTPS_CR_RX_EN	0x00000004U  /**< RX enabled */
+#define XUARTPS_CR_EN_DIS_MASK	0x0000003CU  /**< Enable/disable Mask */
+#define XUARTPS_CR_TXRST	0x00000002U  /**< TX logic reset */
+#define XUARTPS_CR_RXRST	0x00000001U  /**< RX logic reset */
+/* @}*/
+
+
+/** @name Mode Register
+ *
+ * The mode register (MR) defines the mode of transfer as well as the data
+ * format. If this register is modified during transmission or reception,
+ * data validity cannot be guaranteed.
+ *
+ * Mode Register Bit Definition
+ * @{
+ */
+#define XUARTPS_MR_CCLK				0x00000400U /**< Input clock selection */
+#define XUARTPS_MR_CHMODE_R_LOOP	0x00000300U /**< Remote loopback mode */
+#define XUARTPS_MR_CHMODE_L_LOOP	0x00000200U /**< Local loopback mode */
+#define XUARTPS_MR_CHMODE_ECHO		0x00000100U /**< Auto echo mode */
+#define XUARTPS_MR_CHMODE_NORM		0x00000000U /**< Normal mode */
+#define XUARTPS_MR_CHMODE_SHIFT				8U  /**< Mode shift */
+#define XUARTPS_MR_CHMODE_MASK		0x00000300U /**< Mode mask */
+#define XUARTPS_MR_STOPMODE_2_BIT	0x00000080U /**< 2 stop bits */
+#define XUARTPS_MR_STOPMODE_1_5_BIT	0x00000040U /**< 1.5 stop bits */
+#define XUARTPS_MR_STOPMODE_1_BIT	0x00000000U /**< 1 stop bit */
+#define XUARTPS_MR_STOPMODE_SHIFT			6U  /**< Stop bits shift */
+#define XUARTPS_MR_STOPMODE_MASK	0x000000A0U /**< Stop bits mask */
+#define XUARTPS_MR_PARITY_NONE		0x00000020U /**< No parity mode */
+#define XUARTPS_MR_PARITY_MARK		0x00000018U /**< Mark parity mode */
+#define XUARTPS_MR_PARITY_SPACE		0x00000010U /**< Space parity mode */
+#define XUARTPS_MR_PARITY_ODD		0x00000008U /**< Odd parity mode */
+#define XUARTPS_MR_PARITY_EVEN		0x00000000U /**< Even parity mode */
+#define XUARTPS_MR_PARITY_SHIFT				3U  /**< Parity setting shift */
+#define XUARTPS_MR_PARITY_MASK		0x00000038U /**< Parity mask */
+#define XUARTPS_MR_CHARLEN_6_BIT	0x00000006U /**< 6 bits data */
+#define XUARTPS_MR_CHARLEN_7_BIT	0x00000004U /**< 7 bits data */
+#define XUARTPS_MR_CHARLEN_8_BIT	0x00000000U /**< 8 bits data */
+#define XUARTPS_MR_CHARLEN_SHIFT			1U  /**< Data Length shift */
+#define XUARTPS_MR_CHARLEN_MASK		0x00000006U /**< Data length mask */
+#define XUARTPS_MR_CLKSEL			0x00000001U /**< Input clock selection */
+/* @} */
+
+
+/** @name Interrupt Registers
+ *
+ * Interrupt control logic uses the interrupt enable register (IER) and the
+ * interrupt disable register (IDR) to set the value of the bits in the
+ * interrupt mask register (IMR). The IMR determines whether to pass an
+ * interrupt to the interrupt status register (ISR).
+ * Writing a 1 to IER Enbables an interrupt, writing a 1 to IDR disables an
+ * interrupt. IMR and ISR are read only, and IER and IDR are write only.
+ * Reading either IER or IDR returns 0x00.
+ *
+ * All four registers have the same bit definitions.
+ *
+ * @{
+ */
+#define XUARTPS_IXR_RBRK	0x00002000U /**< Rx FIFO break detect interrupt */
+#define XUARTPS_IXR_TOVR	0x00001000U /**< Tx FIFO Overflow interrupt */
+#define XUARTPS_IXR_TNFUL	0x00000800U /**< Tx FIFO Nearly Full interrupt */
+#define XUARTPS_IXR_TTRIG	0x00000400U /**< Tx Trig interrupt */
+#define XUARTPS_IXR_DMS		0x00000200U /**< Modem status change interrupt */
+#define XUARTPS_IXR_TOUT	0x00000100U /**< Timeout error interrupt */
+#define XUARTPS_IXR_PARITY 	0x00000080U /**< Parity error interrupt */
+#define XUARTPS_IXR_FRAMING	0x00000040U /**< Framing error interrupt */
+#define XUARTPS_IXR_OVER	0x00000020U /**< Overrun error interrupt */
+#define XUARTPS_IXR_TXFULL 	0x00000010U /**< TX FIFO full interrupt. */
+#define XUARTPS_IXR_TXEMPTY	0x00000008U /**< TX FIFO empty interrupt. */
+#define XUARTPS_IXR_RXFULL 	0x00000004U /**< RX FIFO full interrupt. */
+#define XUARTPS_IXR_RXEMPTY	0x00000002U /**< RX FIFO empty interrupt. */
+#define XUARTPS_IXR_RXOVR  	0x00000001U /**< RX FIFO trigger interrupt. */
+#define XUARTPS_IXR_MASK	0x00003FFFU /**< Valid bit mask */
+/* @} */
+
+
+/** @name Baud Rate Generator Register
+ *
+ * The baud rate generator control register (BRGR) is a 16 bit register that
+ * controls the receiver bit sample clock and baud rate.
+ * Valid values are 1 - 65535.
+ *
+ * Bit Sample Rate = CCLK / BRGR, where the CCLK is selected by the MR_CCLK bit
+ * in the MR register.
+ * @{
+ */
+#define XUARTPS_BAUDGEN_DISABLE		0x00000000U /**< Disable clock */
+#define XUARTPS_BAUDGEN_MASK		0x0000FFFFU /**< Valid bits mask */
+#define XUARTPS_BAUDGEN_RESET_VAL	0x0000028BU /**< Reset value */
+
+/** @name Baud Divisor Rate register
+ *
+ * The baud rate divider register (BDIV) controls how much the bit sample
+ * rate is divided by. It sets the baud rate.
+ * Valid values are 0x04 to 0xFF. Writing a value less than 4 will be ignored.
+ *
+ * Baud rate = CCLK / ((BAUDDIV + 1) x BRGR), where the CCLK is selected by
+ * the MR_CCLK bit in the MR register.
+ * @{
+ */
+#define XUARTPS_BAUDDIV_MASK        0x000000FFU	/**< 8 bit baud divider mask */
+#define XUARTPS_BAUDDIV_RESET_VAL   0x0000000FU	/**< Reset value */
+/* @} */
+
+
+/** @name Receiver Timeout Register
+ *
+ * Use the receiver timeout register (RTR) to detect an idle condition on
+ * the receiver data line.
+ *
+ * @{
+ */
+#define XUARTPS_RXTOUT_DISABLE		0x00000000U  /**< Disable time out */
+#define XUARTPS_RXTOUT_MASK			0x000000FFU  /**< Valid bits mask */
+
+/** @name Receiver FIFO Trigger Level Register
+ *
+ * Use the Receiver FIFO Trigger Level Register (RTRIG) to set the value at
+ * which the RX FIFO triggers an interrupt event.
+ * @{
+ */
+
+#define XUARTPS_RXWM_DISABLE	0x00000000U  /**< Disable RX trigger interrupt */
+#define XUARTPS_RXWM_MASK		0x0000003FU  /**< Valid bits mask */
+#define XUARTPS_RXWM_RESET_VAL	0x00000020U  /**< Reset value */
+/* @} */
+
+/** @name Transmit FIFO Trigger Level Register
+ *
+ * Use the Transmit FIFO Trigger Level Register (TTRIG) to set the value at
+ * which the TX FIFO triggers an interrupt event.
+ * @{
+ */
+
+#define XUARTPS_TXWM_MASK		0x0000003FU  /**< Valid bits mask */
+#define XUARTPS_TXWM_RESET_VAL	0x00000020U  /**< Reset value */
+/* @} */
+
+/** @name Modem Control Register
+ *
+ * This register (MODEMCR) controls the interface with the modem or data set,
+ * or a peripheral device emulating a modem.
+ *
+ * @{
+ */
+#define XUARTPS_MODEMCR_FCM	0x00000020U  /**< Flow control mode */
+#define XUARTPS_MODEMCR_RTS	0x00000002U  /**< Request to send */
+#define XUARTPS_MODEMCR_DTR	0x00000001U  /**< Data terminal ready */
+/* @} */
+
+/** @name Modem Status Register
+ *
+ * This register (MODEMSR) indicates the current state of the control lines
+ * from a modem, or another peripheral device, to the CPU. In addition, four
+ * bits of the modem status register provide change information. These bits
+ * are set to a logic 1 whenever a control input from the modem changes state.
+ *
+ * Note: Whenever the DCTS, DDSR, TERI, or DDCD bit is set to logic 1, a modem
+ * status interrupt is generated and this is reflected in the modem status
+ * register.
+ *
+ * @{
+ */
+#define XUARTPS_MODEMSR_FCMS	0x00000100U  /**< Flow control mode (FCMS) */
+#define XUARTPS_MODEMSR_DCD		0x00000080U  /**< Complement of DCD input */
+#define XUARTPS_MODEMSR_RI		0x00000040U  /**< Complement of RI input */
+#define XUARTPS_MODEMSR_DSR		0x00000020U  /**< Complement of DSR input */
+#define XUARTPS_MODEMSR_CTS		0x00000010U  /**< Complement of CTS input */
+#define XUARTPS_MODEMSR_DDCD	0x00000008U  /**< Delta DCD indicator */
+#define XUARTPS_MODEMSR_TERI  0x00000004U  /**< Trailing Edge Ring Indicator */
+#define XUARTPS_MODEMSR_DDSR	0x00000002U  /**< Change of DSR */
+#define XUARTPS_MODEMSR_DCTS	0x00000001U  /**< Change of CTS */
+/* @} */
+
+/** @name Channel Status Register
+ *
+ * The channel status register (CSR) is provided to enable the control logic
+ * to monitor the status of bits in the channel interrupt status register,
+ * even if these are masked out by the interrupt mask register.
+ *
+ * @{
+ */
+#define XUARTPS_SR_TNFUL	0x00004000U /**< TX FIFO Nearly Full Status */
+#define XUARTPS_SR_TTRIG	0x00002000U /**< TX FIFO Trigger Status */
+#define XUARTPS_SR_FLOWDEL	0x00001000U /**< RX FIFO fill over flow delay */
+#define XUARTPS_SR_TACTIVE	0x00000800U /**< TX active */
+#define XUARTPS_SR_RACTIVE	0x00000400U /**< RX active */
+#define XUARTPS_SR_TXFULL	0x00000010U /**< TX FIFO full */
+#define XUARTPS_SR_TXEMPTY	0x00000008U /**< TX FIFO empty */
+#define XUARTPS_SR_RXFULL	0x00000004U /**< RX FIFO full */
+#define XUARTPS_SR_RXEMPTY	0x00000002U /**< RX FIFO empty */
+#define XUARTPS_SR_RXOVR	0x00000001U /**< RX FIFO fill over trigger */
+/* @} */
+
+/** @name Flow Delay Register
+ *
+ * Operation of the flow delay register (FLOWDEL) is very similar to the
+ * receive FIFO trigger register. An internal trigger signal activates when the
+ * FIFO is filled to the level set by this register. This trigger will not
+ * cause an interrupt, although it can be read through the channel status
+ * register. In hardware flow control mode, RTS is deactivated when the trigger
+ * becomes active. RTS only resets when the FIFO level is four less than the
+ * level of the flow delay trigger and the flow delay trigger is not activated.
+ * A value less than 4 disables the flow delay.
+ * @{
+ */
+#define XUARTPS_FLOWDEL_MASK	XUARTPS_RXWM_MASK	/**< Valid bit mask */
+/* @} */
+
+/** @name Receiver FIFO Byte Status Register
+ *
+ * The Receiver FIFO Status register is used to have a continuous
+ * monitoring of the raw unmasked byte status information. The register
+ * contains frame, parity and break status information for the top
+ * four bytes in the RX FIFO.
+ *
+ * Receiver FIFO Byte Status Register Bit Definition
+ * @{
+ */
+#define XUARTPS_RXBS_BYTE3_BRKE		0x00000800U /**< Byte3 Break Error */
+#define XUARTPS_RXBS_BYTE3_FRME		0x00000400U /**< Byte3 Frame Error */
+#define XUARTPS_RXBS_BYTE3_PARE		0x00000200U /**< Byte3 Parity Error */
+#define XUARTPS_RXBS_BYTE2_BRKE		0x00000100U /**< Byte2 Break Error */
+#define XUARTPS_RXBS_BYTE2_FRME		0x00000080U /**< Byte2 Frame Error */
+#define XUARTPS_RXBS_BYTE2_PARE		0x00000040U /**< Byte2 Parity Error */
+#define XUARTPS_RXBS_BYTE1_BRKE		0x00000020U /**< Byte1 Break Error */
+#define XUARTPS_RXBS_BYTE1_FRME		0x00000010U /**< Byte1 Frame Error */
+#define XUARTPS_RXBS_BYTE1_PARE		0x00000008U /**< Byte1 Parity Error */
+#define XUARTPS_RXBS_BYTE0_BRKE		0x00000004U /**< Byte0 Break Error */
+#define XUARTPS_RXBS_BYTE0_FRME		0x00000002U /**< Byte0 Frame Error */
+#define XUARTPS_RXBS_BYTE0_PARE		0x00000001U /**< Byte0 Parity Error */
+#define XUARTPS_RXBS_MASK		0x00000007U /**< 3 bit RX byte status mask */
+/* @} */
+
+
+/*
+ * Defines for backwards compatabilty, will be removed
+ * in the next version of the driver
+ */
+#define XUARTPS_MEDEMSR_DCDX  XUARTPS_MODEMSR_DDCD
+#define XUARTPS_MEDEMSR_RIX   XUARTPS_MODEMSR_TERI
+#define XUARTPS_MEDEMSR_DSRX  XUARTPS_MODEMSR_DDSR
+#define	XUARTPS_MEDEMSR_CTSX  XUARTPS_MODEMSR_DCTS
+
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+* Read a UART register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the base address of the
+*		device.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XUartPs_ReadReg(u32 BaseAddress, int RegOffset)
+*
+******************************************************************************/
+#define XUartPs_ReadReg(BaseAddress, RegOffset) \
+	Xil_In32((BaseAddress) + (u32)(RegOffset))
+
+/***************************************************************************/
+/**
+* Write a UART register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the base address of the
+*		device.
+* @param	RegisterValue is the value to be written to the register.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*		void XUartPs_WriteReg(u32 BaseAddress, int RegOffset,
+*						   u16 RegisterValue)
+*
+******************************************************************************/
+#define XUartPs_WriteReg(BaseAddress, RegOffset, RegisterValue) \
+	Xil_Out32((BaseAddress) + (u32)(RegOffset), (u32)(RegisterValue))
+
+/****************************************************************************/
+/**
+* Determine if there is receive data in the receiver and/or FIFO.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	TRUE if there is receive data, FALSE otherwise.
+*
+* @note		C-Style signature:
+*		u32 XUartPs_IsReceiveData(u32 BaseAddress)
+*
+******************************************************************************/
+#define XUartPs_IsReceiveData(BaseAddress)			 \
+	!((Xil_In32((BaseAddress) + XUARTPS_SR_OFFSET) & 	\
+	(u32)XUARTPS_SR_RXEMPTY) == (u32)XUARTPS_SR_RXEMPTY)
+
+/****************************************************************************/
+/**
+* Determine if a byte of data can be sent with the transmitter.
+*
+* @param	BaseAddress contains the base address of the device.
+*
+* @return	TRUE if the TX FIFO is full, FALSE if a byte can be put in the
+*		FIFO.
+*
+* @note		C-Style signature:
+*		u32 XUartPs_IsTransmitFull(u32 BaseAddress)
+*
+******************************************************************************/
+#define XUartPs_IsTransmitFull(BaseAddress)			 \
+	((Xil_In32((BaseAddress) + XUARTPS_SR_OFFSET) & 	\
+	 (u32)XUARTPS_SR_TXFULL) == (u32)XUARTPS_SR_TXFULL)
+
+/************************** Function Prototypes ******************************/
+
+void XUartPs_SendByte(u32 BaseAddress, u8 Data);
+
+u8 XUartPs_RecvByte(u32 BaseAddress);
+
+void XUartPs_ResetHw(u32 BaseAddress);
+
+/************************** Variable Definitions *****************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_intr.c b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_intr.c
new file mode 100644
index 0000000..dff02fd
--- /dev/null
+++ b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_intr.c
@@ -0,0 +1,450 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xuartps_intr.c
+* @addtogroup uartps_v3_5
+* @{
+*
+* This file contains the functions for interrupt handling
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00  drg/jz 01/13/10 First Release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1	kvn    04/10/15 Modified code for latest RTL changes.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xuartps.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Function Prototypes *****************************/
+
+static void ReceiveDataHandler(XUartPs *InstancePtr);
+static void SendDataHandler(XUartPs *InstancePtr, u32 IsrStatus);
+static void ReceiveErrorHandler(XUartPs *InstancePtr, u32 IsrStatus);
+static void ReceiveTimeoutHandler(XUartPs *InstancePtr);
+static void ModemHandler(XUartPs *InstancePtr);
+
+
+/* Internal function prototypes implemented in xuartps.c */
+extern u32 XUartPs_ReceiveBuffer(XUartPs *InstancePtr);
+extern u32 XUartPs_SendBuffer(XUartPs *InstancePtr);
+
+/************************** Variable Definitions ****************************/
+
+typedef void (*Handler)(XUartPs *InstancePtr);
+
+/****************************************************************************/
+/**
+*
+* This function gets the interrupt mask
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return
+*		The current interrupt mask. The mask indicates which interupts
+*		are enabled.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XUartPs_GetInterruptMask(XUartPs *InstancePtr)
+{
+	/* Assert validates the input argument */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	/* Read the Interrupt Mask register */
+	return (XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+			 XUARTPS_IMR_OFFSET));
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the interrupt mask.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+* @param	Mask contains the interrupts to be enabled or disabled.
+*		A '1' enables an interupt, and a '0' disables.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUartPs_SetInterruptMask(XUartPs *InstancePtr, u32 Mask)
+{
+	u32 TempMask = Mask;
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	TempMask &= (u32)XUARTPS_IXR_MASK;
+
+	/* Write the mask to the IER Register */
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+		 XUARTPS_IER_OFFSET, TempMask);
+
+	/* Write the inverse of the Mask to the IDR register */
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+		 XUARTPS_IDR_OFFSET, (~TempMask));
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the handler that will be called when an event (interrupt)
+* occurs that needs application's attention.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+* @param	FuncPtr is the pointer to the callback function.
+* @param	CallBackRef is the upper layer callback reference passed back
+*		when the callback function is invoked.
+*
+* @return	None.
+*
+* @note
+*
+* There is no assert on the CallBackRef since the driver doesn't know what it
+* is (nor should it)
+*
+*****************************************************************************/
+void XUartPs_SetHandler(XUartPs *InstancePtr, XUartPs_Handler FuncPtr,
+		 void *CallBackRef)
+{
+	/*
+	 * Asserts validate the input arguments
+	 * CallBackRef not checked, no way to know what is valid
+	 */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(FuncPtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	InstancePtr->Handler = FuncPtr;
+	InstancePtr->CallBackRef = CallBackRef;
+}
+
+/****************************************************************************/
+/**
+*
+* This function is the interrupt handler for the driver.
+* It must be connected to an interrupt system by the application such that it
+* can be called when an interrupt occurs.
+*
+* @param	InstancePtr contains a pointer to the driver instance
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XUartPs_InterruptHandler(XUartPs *InstancePtr)
+{
+	u32 IsrStatus;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read the interrupt ID register to determine which
+	 * interrupt is active
+	 */
+	IsrStatus = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				   XUARTPS_IMR_OFFSET);
+
+	IsrStatus &= XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				   XUARTPS_ISR_OFFSET);
+
+	/* Dispatch an appropriate handler. */
+	if((IsrStatus & ((u32)XUARTPS_IXR_RXOVR | (u32)XUARTPS_IXR_RXEMPTY |
+			(u32)XUARTPS_IXR_RXFULL)) != (u32)0) {
+		/* Received data interrupt */
+		ReceiveDataHandler(InstancePtr);
+	}
+
+	if((IsrStatus & ((u32)XUARTPS_IXR_TXEMPTY | (u32)XUARTPS_IXR_TXFULL))
+									 != (u32)0) {
+		/* Transmit data interrupt */
+		SendDataHandler(InstancePtr, IsrStatus);
+	}
+
+	/* XUARTPS_IXR_RBRK is applicable only for Zynq Ultrascale+ MP */
+	if ((IsrStatus & ((u32)XUARTPS_IXR_OVER | (u32)XUARTPS_IXR_FRAMING |
+			(u32)XUARTPS_IXR_PARITY | (u32)XUARTPS_IXR_RBRK)) != (u32)0) {
+		/* Received Error Status interrupt */
+		ReceiveErrorHandler(InstancePtr, IsrStatus);
+	}
+
+	if((IsrStatus & ((u32)XUARTPS_IXR_TOUT)) != (u32)0) {
+		/* Received Timeout interrupt */
+		ReceiveTimeoutHandler(InstancePtr);
+	}
+
+	if((IsrStatus & ((u32)XUARTPS_IXR_DMS)) != (u32)0) {
+		/* Modem status interrupt */
+		ModemHandler(InstancePtr);
+	}
+
+	/* Clear the interrupt status. */
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_ISR_OFFSET,
+		IsrStatus);
+
+}
+
+/****************************************************************************/
+/*
+*
+* This function handles interrupts for receive errors which include
+* overrun errors, framing errors, parity errors, and the break interrupt.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void ReceiveErrorHandler(XUartPs *InstancePtr, u32 IsrStatus)
+{
+	u32 EventData;
+	u32 Event;
+
+	InstancePtr->is_rxbs_error = 0;
+
+	if ((InstancePtr->Platform == XPLAT_ZYNQ_ULTRA_MP) &&
+		(IsrStatus & ((u32)XUARTPS_IXR_PARITY | (u32)XUARTPS_IXR_RBRK
+					| (u32)XUARTPS_IXR_FRAMING))) {
+		InstancePtr->is_rxbs_error = 1;
+	}
+	/*
+	 * If there are bytes still to be received in the specified buffer
+	 * go ahead and receive them. Removing bytes from the RX FIFO will
+	 * clear the interrupt.
+	 */
+
+	(void)XUartPs_ReceiveBuffer(InstancePtr);
+
+	if (!(InstancePtr->is_rxbs_error)) {
+		Event = XUARTPS_EVENT_RECV_ERROR;
+		EventData = InstancePtr->ReceiveBuffer.RequestedBytes -
+			InstancePtr->ReceiveBuffer.RemainingBytes;
+
+		/*
+		 * Call the application handler to indicate that there is a receive
+		 * error or a break interrupt, if the application cares about the
+		 * error it call a function to get the last errors.
+		 */
+		InstancePtr->Handler(InstancePtr->CallBackRef,
+					Event,
+					EventData);
+	}
+}
+
+/****************************************************************************/
+/**
+*
+* This function handles the receive timeout interrupt. This interrupt occurs
+* whenever a number of bytes have been present in the RX FIFO and the receive
+* data line has been idle for at lease 4 or more character times, (the timeout
+* is set using XUartPs_SetrecvTimeout() function).
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void ReceiveTimeoutHandler(XUartPs *InstancePtr)
+{
+	u32 Event;
+
+	/*
+	 * If there are bytes still to be received in the specified buffer
+	 * go ahead and receive them. Removing bytes from the RX FIFO will
+	 * clear the interrupt.
+	 */
+	if (InstancePtr->ReceiveBuffer.RemainingBytes != (u32)0) {
+		(void)XUartPs_ReceiveBuffer(InstancePtr);
+	}
+
+	/*
+	 * If there are no more bytes to receive then indicate that this is
+	 * not a receive timeout but the end of the buffer reached, a timeout
+	 * normally occurs if # of bytes is not divisible by FIFO threshold,
+	 * don't rely on previous test of remaining bytes since receive
+	 * function updates it
+	 */
+	if (InstancePtr->ReceiveBuffer.RemainingBytes != (u32)0) {
+		Event = XUARTPS_EVENT_RECV_TOUT;
+	} else {
+		Event = XUARTPS_EVENT_RECV_DATA;
+	}
+
+	/*
+	 * Call the application handler to indicate that there is a receive
+	 * timeout or data event
+	 */
+	InstancePtr->Handler(InstancePtr->CallBackRef, Event,
+				 InstancePtr->ReceiveBuffer.RequestedBytes -
+				 InstancePtr->ReceiveBuffer.RemainingBytes);
+
+}
+/****************************************************************************/
+/**
+*
+* This function handles the interrupt when data is in RX FIFO.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void ReceiveDataHandler(XUartPs *InstancePtr)
+{
+	/*
+	 * If there are bytes still to be received in the specified buffer
+	 * go ahead and receive them. Removing bytes from the RX FIFO will
+	 * clear the interrupt.
+	 */
+	 if (InstancePtr->ReceiveBuffer.RemainingBytes != (u32)0) {
+		(void)XUartPs_ReceiveBuffer(InstancePtr);
+	}
+
+	 /* If the last byte of a message was received then call the application
+	 * handler, this code should not use an else from the previous check of
+	 * the number of bytes to receive because the call to receive the buffer
+	 * updates the bytes ramained
+	 */
+	if (InstancePtr->ReceiveBuffer.RemainingBytes == (u32)0) {
+		InstancePtr->Handler(InstancePtr->CallBackRef,
+				XUARTPS_EVENT_RECV_DATA,
+				(InstancePtr->ReceiveBuffer.RequestedBytes -
+				InstancePtr->ReceiveBuffer.RemainingBytes));
+	}
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function handles the interrupt when data has been sent, the transmit
+* FIFO is empty (transmitter holding register).
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+* @param	IsrStatus is the register value for channel status register
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void SendDataHandler(XUartPs *InstancePtr, u32 IsrStatus)
+{
+
+	/*
+	 * If there are not bytes to be sent from the specified buffer then disable
+	 * the transmit interrupt so it will stop interrupting as it interrupts
+	 * any time the FIFO is empty
+	 */
+	if (InstancePtr->SendBuffer.RemainingBytes == (u32)0) {
+		XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+				XUARTPS_IDR_OFFSET,
+				((u32)XUARTPS_IXR_TXEMPTY | (u32)XUARTPS_IXR_TXFULL));
+
+		/* Call the application handler to indicate the sending is done */
+		InstancePtr->Handler(InstancePtr->CallBackRef,
+					XUARTPS_EVENT_SENT_DATA,
+					InstancePtr->SendBuffer.RequestedBytes -
+					InstancePtr->SendBuffer.RemainingBytes);
+	}
+
+	/* If TX FIFO is empty, send more. */
+	else if((IsrStatus & ((u32)XUARTPS_IXR_TXEMPTY)) != (u32)0) {
+		(void)XUartPs_SendBuffer(InstancePtr);
+	}
+	else {
+		/* Else with dummy entry for MISRA-C Compliance.*/
+		;
+	}
+}
+
+/****************************************************************************/
+/**
+*
+* This function handles modem interrupts.  It does not do any processing
+* except to call the application handler to indicate a modem event.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void ModemHandler(XUartPs *InstancePtr)
+{
+	u32 MsrRegister;
+
+	/*
+	 * Read the modem status register so that the interrupt is acknowledged
+	 * and it can be passed to the callback handler with the event
+	 */
+	MsrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+			  XUARTPS_MODEMSR_OFFSET);
+
+	/*
+	 * Call the application handler to indicate the modem status changed,
+	 * passing the modem status and the event data in the call
+	 */
+	InstancePtr->Handler(InstancePtr->CallBackRef,
+				  XUARTPS_EVENT_MODEM,
+				  MsrRegister);
+
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_options.c b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_options.c
new file mode 100644
index 0000000..5d8d301
--- /dev/null
+++ b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_options.c
@@ -0,0 +1,764 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xuartps_options.c
+* @addtogroup uartps_v3_5
+* @{
+*
+* The implementation of the options functions for the XUartPs driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00  drg/jz 01/13/10 First Release
+* 1.00  sdm    09/27/11 Fixed a bug in XUartPs_SetFlowDelay where the input
+*			value was not being written to the register.
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.2   rk     07/20/16 Modified the logic for transmission break bit set
+*
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xuartps.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+/*
+ * The following data type is a map from an option to the offset in the
+ * register to which it belongs as well as its bit mask in that register.
+ */
+typedef struct {
+	u16 Option;
+	u16 RegisterOffset;
+	u32 Mask;
+} Mapping;
+
+/*
+ * Create the table which contains options which are to be processed to get/set
+ * the options. These options are table driven to allow easy maintenance and
+ * expansion of the options.
+ */
+
+static Mapping OptionsTable[] = {
+	{XUARTPS_OPTION_SET_BREAK, XUARTPS_CR_OFFSET, XUARTPS_CR_STARTBRK},
+	{XUARTPS_OPTION_STOP_BREAK, XUARTPS_CR_OFFSET, XUARTPS_CR_STOPBRK},
+	{XUARTPS_OPTION_RESET_TMOUT, XUARTPS_CR_OFFSET, XUARTPS_CR_TORST},
+	{XUARTPS_OPTION_RESET_TX, XUARTPS_CR_OFFSET, XUARTPS_CR_TXRST},
+	{XUARTPS_OPTION_RESET_RX, XUARTPS_CR_OFFSET, XUARTPS_CR_RXRST},
+	{XUARTPS_OPTION_ASSERT_RTS, XUARTPS_MODEMCR_OFFSET,
+	 XUARTPS_MODEMCR_RTS},
+	{XUARTPS_OPTION_ASSERT_DTR, XUARTPS_MODEMCR_OFFSET,
+	 XUARTPS_MODEMCR_DTR},
+	{XUARTPS_OPTION_SET_FCM, XUARTPS_MODEMCR_OFFSET, XUARTPS_MODEMCR_FCM}
+};
+
+/* Create a constant for the number of entries in the table */
+
+#define XUARTPS_NUM_OPTIONS	  (sizeof(OptionsTable) / sizeof(Mapping))
+
+/************************** Function Prototypes *****************************/
+
+/****************************************************************************/
+/**
+*
+* Gets the options for the specified driver instance. The options are
+* implemented as bit masks such that multiple options may be enabled or
+* disabled simulataneously.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return
+*
+* The current options for the UART. The optionss are bit masks that are
+* contained in the file xuartps.h and named XUARTPS_OPTION_*.
+*
+* @note		None.
+*
+*****************************************************************************/
+u16 XUartPs_GetOptions(XUartPs *InstancePtr)
+{
+	u16 Options = 0U;
+	u32 Register;
+	u32 Index;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Loop thru the options table to map the physical options in the
+	 * registers of the UART to the logical options to be returned
+	 */
+	for (Index = 0U; Index < XUARTPS_NUM_OPTIONS; Index++) {
+		Register = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+						 OptionsTable[Index].
+						 RegisterOffset);
+
+		/*
+		 * If the bit in the register which correlates to the option
+		 * is set, then set the corresponding bit in the options,
+		 * ignoring any bits which are zero since the options variable
+		 * is initialized to zero
+		 */
+		if ((Register & OptionsTable[Index].Mask) != (u32)0) {
+			Options |= OptionsTable[Index].Option;
+		}
+	}
+
+	return Options;
+}
+
+/****************************************************************************/
+/**
+*
+* Sets the options for the specified driver instance. The options are
+* implemented as bit masks such that multiple options may be enabled or
+* disabled simultaneously.
+*
+* The GetOptions function may be called to retrieve the currently enabled
+* options. The result is ORed in the desired new settings to be enabled and
+* ANDed with the inverse to clear the settings to be disabled. The resulting
+* value is then used as the options for the SetOption function call.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	Options contains the options to be set which are bit masks
+*		contained in the file xuartps.h and named XUARTPS_OPTION_*.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUartPs_SetOptions(XUartPs *InstancePtr, u16 Options)
+{
+	u32 Index;
+	u32 Register;
+
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Loop thru the options table to map the logical options to the
+	 * physical options in the registers of the UART.
+	 */
+	for (Index = 0U; Index < XUARTPS_NUM_OPTIONS; Index++) {
+
+		/*
+		 * Read the register which contains option so that the register
+		 * can be changed without destoying any other bits of the
+		 * register.
+		 */
+		Register = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+						 OptionsTable[Index].
+						 RegisterOffset);
+
+		/*
+		 * If the option is set in the input, then set the corresponding
+		 * bit in the specified register, otherwise clear the bit in
+		 * the register.
+		 */
+		if ((Options & OptionsTable[Index].Option) != (u16)0) {
+			if(OptionsTable[Index].Option == XUARTPS_OPTION_SET_BREAK)
+				Register &= ~XUARTPS_CR_STOPBRK;
+			Register |= OptionsTable[Index].Mask;
+		}
+		else {
+			Register &= ~OptionsTable[Index].Mask;
+		}
+
+		/* Write the new value to the register to set the option */
+		XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+				   OptionsTable[Index].RegisterOffset,
+				   Register);
+	}
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the receive FIFO trigger level. The receive trigger
+* level indicates the number of bytes in the receive FIFO that cause a receive
+* data event (interrupt) to be generated.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	The current receive FIFO trigger level. This is a value
+*		from 0-31.
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 XUartPs_GetFifoThreshold(XUartPs *InstancePtr)
+{
+	u8 RtrigRegister;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read the value of the FIFO control register so that the threshold
+	 * can be retrieved, this read takes special register processing
+	 */
+	RtrigRegister = (u8) XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+						   XUARTPS_RXWM_OFFSET);
+
+	/* Return only the trigger level from the register value */
+
+	RtrigRegister &= (u8)XUARTPS_RXWM_MASK;
+	return RtrigRegister;
+}
+
+/****************************************************************************/
+/**
+*
+* This functions sets the receive FIFO trigger level. The receive trigger
+* level specifies the number of bytes in the receive FIFO that cause a receive
+* data event (interrupt) to be generated.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	TriggerLevel contains the trigger level to set.
+*
+* @return	None
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUartPs_SetFifoThreshold(XUartPs *InstancePtr, u8 TriggerLevel)
+{
+	u32 RtrigRegister;
+
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(TriggerLevel <= (u8)XUARTPS_RXWM_MASK);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	RtrigRegister = ((u32)TriggerLevel) & (u32)XUARTPS_RXWM_MASK;
+
+	/*
+	 * Write the new value for the FIFO control register to it such that the
+	 * threshold is changed
+	 */
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XUARTPS_RXWM_OFFSET, RtrigRegister);
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the modem status from the specified UART. The modem
+* status indicates any changes of the modem signals. This function allows
+* the modem status to be read in a polled mode. The modem status is updated
+* whenever it is read such that reading it twice may not yield the same
+* results.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return
+*
+* The modem status which are bit masks that are contained in the file
+* xuartps.h and named XUARTPS_MODEM_*.
+*
+* @note
+*
+* The bit masks used for the modem status are the exact bits of the modem
+* status register with no abstraction.
+*
+*****************************************************************************/
+u16 XUartPs_GetModemStatus(XUartPs *InstancePtr)
+{
+	u32 ModemStatusRegister;
+	u16 TmpRegister;
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Read the modem status register to return
+	 */
+	ModemStatusRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+						XUARTPS_MODEMSR_OFFSET);
+	TmpRegister = (u16)ModemStatusRegister;
+	return TmpRegister;
+}
+
+/****************************************************************************/
+/**
+*
+* This function determines if the specified UART is sending data.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return
+*		- TRUE if the UART is sending data
+*		- FALSE if UART is not sending data
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XUartPs_IsSending(XUartPs *InstancePtr)
+{
+	u32 ChanStatRegister;
+	u32 ChanTmpSRegister;
+	u32 ActiveResult;
+	u32 EmptyResult;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read the channel status register to determine if the transmitter is
+	 * active
+	 */
+	ChanStatRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+						 XUARTPS_SR_OFFSET);
+
+	/*
+	 * If the transmitter is active, or the TX FIFO is not empty, then indicate
+	 * that the UART is still sending some data
+	 */
+	ActiveResult = ChanStatRegister & ((u32)XUARTPS_SR_TACTIVE);
+	EmptyResult = ChanStatRegister & ((u32)XUARTPS_SR_TXEMPTY);
+	ChanTmpSRegister = (((u32)XUARTPS_SR_TACTIVE) == ActiveResult) ||
+		(((u32)XUARTPS_SR_TXEMPTY) != EmptyResult);
+
+	return ChanTmpSRegister;
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the operational mode of the UART. The UART can operate
+* in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic
+* echo.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return
+*
+* The operational mode is specified by constants defined in xuartps.h. The
+* constants are named XUARTPS_OPER_MODE_*
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 XUartPs_GetOperMode(XUartPs *InstancePtr)
+{
+	u32 ModeRegister;
+	u8 OperMode;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Read the Mode register. */
+	ModeRegister =
+		XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				  XUARTPS_MR_OFFSET);
+
+	ModeRegister &= (u32)XUARTPS_MR_CHMODE_MASK;
+	/* Return the constant */
+	switch (ModeRegister) {
+	case XUARTPS_MR_CHMODE_NORM:
+		OperMode = XUARTPS_OPER_MODE_NORMAL;
+		break;
+	case XUARTPS_MR_CHMODE_ECHO:
+		OperMode = XUARTPS_OPER_MODE_AUTO_ECHO;
+		break;
+	case XUARTPS_MR_CHMODE_L_LOOP:
+		OperMode = XUARTPS_OPER_MODE_LOCAL_LOOP;
+		break;
+	case XUARTPS_MR_CHMODE_R_LOOP:
+		OperMode = XUARTPS_OPER_MODE_REMOTE_LOOP;
+		break;
+	default:
+		OperMode = (u8) ((ModeRegister & (u32)XUARTPS_MR_CHMODE_MASK) >>
+			XUARTPS_MR_CHMODE_SHIFT);
+		break;
+	}
+
+	return OperMode;
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the operational mode of the UART. The UART can operate
+* in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic
+* echo.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	OperationMode is the mode of the UART.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUartPs_SetOperMode(XUartPs *InstancePtr, u8 OperationMode)
+{
+	u32 ModeRegister;
+
+	/* Assert validates the input arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid(OperationMode <= XUARTPS_OPER_MODE_REMOTE_LOOP);
+
+	/* Read the Mode register. */
+	ModeRegister =
+		XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				  XUARTPS_MR_OFFSET);
+
+	/* Set the correct value by masking the bits, then ORing the const. */
+	ModeRegister &= (u32)(~XUARTPS_MR_CHMODE_MASK);
+
+	switch (OperationMode) {
+		case XUARTPS_OPER_MODE_NORMAL:
+			ModeRegister |= (u32)XUARTPS_MR_CHMODE_NORM;
+			break;
+		case XUARTPS_OPER_MODE_AUTO_ECHO:
+			ModeRegister |= (u32)XUARTPS_MR_CHMODE_ECHO;
+			break;
+		case XUARTPS_OPER_MODE_LOCAL_LOOP:
+			ModeRegister |= (u32)XUARTPS_MR_CHMODE_L_LOOP;
+			break;
+		case XUARTPS_OPER_MODE_REMOTE_LOOP:
+			ModeRegister |= (u32)XUARTPS_MR_CHMODE_R_LOOP;
+			break;
+		default:
+			/* Default case made for MISRA-C Compliance. */
+			break;
+	}
+
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET,
+			   ModeRegister);
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the Flow Delay.
+* 0 - 3: Flow delay inactive
+* 4 - 32: If Flow Control mode is enabled, UART_rtsN is deactivated when the
+* receive FIFO fills to this level.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return
+*
+* The Flow Delay is specified by constants defined in xuartps_hw.h. The
+* constants are named XUARTPS_FLOWDEL*
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 XUartPs_GetFlowDelay(XUartPs *InstancePtr)
+{
+	u32 FdelTmpRegister;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Read the Mode register. */
+	FdelTmpRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+					 XUARTPS_FLOWDEL_OFFSET);
+
+	/* Return the contents of the flow delay register */
+	FdelTmpRegister = (u8)(FdelTmpRegister & (u32)XUARTPS_FLOWDEL_MASK);
+	return  FdelTmpRegister;
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the Flow Delay.
+* 0 - 3: Flow delay inactive
+* 4 - 63: If Flow Control mode is enabled, UART_rtsN is deactivated when the
+* receive FIFO fills to this level.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	FlowDelayValue is the Setting for the flow delay.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUartPs_SetFlowDelay(XUartPs *InstancePtr, u8 FlowDelayValue)
+{
+	u32 FdelRegister;
+
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(FlowDelayValue > (u8)XUARTPS_FLOWDEL_MASK);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Set the correct value by shifting the input constant, then masking
+	 * the bits
+	 */
+	FdelRegister = ((u32)FlowDelayValue) & (u32)XUARTPS_FLOWDEL_MASK;
+
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XUARTPS_FLOWDEL_OFFSET, FdelRegister);
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function gets the Receive Timeout of the UART.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+*
+* @return	The current setting for receive time out.
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 XUartPs_GetRecvTimeout(XUartPs *InstancePtr)
+{
+	u32 RtoRegister;
+	u8 RtoRTmpRegister;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Read the Receive Timeout register. */
+	RtoRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+					XUARTPS_RXTOUT_OFFSET);
+
+	/* Return the contents of the mode register shifted appropriately */
+	RtoRTmpRegister = (u8)(RtoRegister & (u32)XUARTPS_RXTOUT_MASK);
+	return RtoRTmpRegister;
+}
+
+/****************************************************************************/
+/**
+*
+* This function sets the Receive Timeout of the UART.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	RecvTimeout setting allows the UART to detect an idle connection
+*		on the reciever data line.
+*		Timeout duration = RecvTimeout x 4 x Bit Period. 0 disables the
+*		timeout function.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUartPs_SetRecvTimeout(XUartPs *InstancePtr, u8 RecvTimeout)
+{
+	u32 RtoRegister;
+
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Set the correct value by masking the bits */
+	RtoRegister = ((u32)RecvTimeout & (u32)XUARTPS_RXTOUT_MASK);
+
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress,
+			   XUARTPS_RXTOUT_OFFSET, RtoRegister);
+
+	/* Configure CR to restart the receiver timeout counter */
+	RtoRegister =
+		XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				  XUARTPS_CR_OFFSET);
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_CR_OFFSET,
+			   (RtoRegister | XUARTPS_CR_TORST));
+
+}
+/****************************************************************************/
+/**
+*
+* Sets the data format for the device. The data format includes the
+* baud rate, number of data bits, number of stop bits, and parity. It is the
+* caller's responsibility to ensure that the UART is not sending or receiving
+* data when this function is called.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	FormatPtr is a pointer to a format structure containing the data
+*		format to be set.
+*
+* @return
+*		- XST_SUCCESS if the data format was successfully set.
+*		- XST_UART_BAUD_ERROR indicates the baud rate could not be
+*		set because of the amount of error with the baud rate and
+*		the input clock frequency.
+*		- XST_INVALID_PARAM if one of the parameters was not valid.
+*
+* @note
+*
+* The data types in the format type, data bits and parity, are 32 bit fields
+* to prevent a compiler warning.
+* The asserts in this function will cause a warning if these fields are
+* bytes.
+* 


+*
+*****************************************************************************/
+s32 XUartPs_SetDataFormat(XUartPs *InstancePtr,
+			XUartPsFormat * FormatPtr)
+{
+	s32 Status;
+	u32 ModeRegister;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(FormatPtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Verify the inputs specified are valid */
+	if ((FormatPtr->DataBits > ((u32)XUARTPS_FORMAT_6_BITS)) ||
+		(FormatPtr->StopBits > ((u8)XUARTPS_FORMAT_2_STOP_BIT)) ||
+		(FormatPtr->Parity > ((u32)XUARTPS_FORMAT_NO_PARITY))) {
+		Status = XST_INVALID_PARAM;
+	} else {
+
+		/*
+		 * Try to set the baud rate and if it's not successful then don't
+		 * continue altering the data format, this is done first to avoid the
+		 * format from being altered when an error occurs
+		 */
+		Status = XUartPs_SetBaudRate(InstancePtr, FormatPtr->BaudRate);
+		if (Status != (s32)XST_SUCCESS) {
+			;
+		} else {
+
+			ModeRegister =
+				XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+						  XUARTPS_MR_OFFSET);
+
+			/*
+			 * Set the length of data (8,7,6) by first clearing out the bits
+			 * that control it in the register, then set the length in the register
+			 */
+			ModeRegister &= (u32)(~XUARTPS_MR_CHARLEN_MASK);
+			ModeRegister |= (FormatPtr->DataBits << XUARTPS_MR_CHARLEN_SHIFT);
+
+			/*
+			 * Set the number of stop bits in the mode register by first clearing
+			 * out the bits that control it in the register, then set the number
+			 * of stop bits in the register.
+			 */
+			ModeRegister &= (u32)(~XUARTPS_MR_STOPMODE_MASK);
+			ModeRegister |= (((u32)FormatPtr->StopBits) << XUARTPS_MR_STOPMODE_SHIFT);
+
+			/*
+			 * Set the parity by first clearing out the bits that control it in the
+			 * register, then set the bits in the register, the default is no parity
+			 * after clearing the register bits
+			 */
+			ModeRegister &= (u32)(~XUARTPS_MR_PARITY_MASK);
+			ModeRegister |= (FormatPtr->Parity << XUARTPS_MR_PARITY_SHIFT);
+
+			/* Update the mode register */
+			XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET,
+					   ModeRegister);
+
+			Status = XST_SUCCESS;
+		}
+	}
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* Gets the data format for the specified UART. The data format includes the
+* baud rate, number of data bits, number of stop bits, and parity.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance.
+* @param	FormatPtr is a pointer to a format structure that will contain
+*		the data format after this call completes.
+*
+* @return	None.
+*
+* @note		None.
+*
+*
+*****************************************************************************/
+void XUartPs_GetDataFormat(XUartPs *InstancePtr, XUartPsFormat * FormatPtr)
+{
+	u32 ModeRegister;
+
+
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(FormatPtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Get the baud rate from the instance, this is not retrieved from the
+	 * hardware because it is only kept as a divisor such that it is more
+	 * difficult to get back to the baud rate
+	 */
+	FormatPtr->BaudRate = InstancePtr->BaudRate;
+
+	ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				  XUARTPS_MR_OFFSET);
+
+	/* Get the length of data (8,7,6,5) */
+	FormatPtr->DataBits =
+		((ModeRegister & (u32)XUARTPS_MR_CHARLEN_MASK) >>
+		XUARTPS_MR_CHARLEN_SHIFT);
+
+	/* Get the number of stop bits */
+	FormatPtr->StopBits =
+		(u8)((ModeRegister & (u32)XUARTPS_MR_STOPMODE_MASK) >>
+		XUARTPS_MR_STOPMODE_SHIFT);
+
+	/* Determine what parity is */
+	FormatPtr->Parity =
+		(u32)((ModeRegister & (u32)XUARTPS_MR_PARITY_MASK) >>
+		XUARTPS_MR_PARITY_SHIFT);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_selftest.c b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_selftest.c
new file mode 100644
index 0000000..de58201
--- /dev/null
+++ b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_selftest.c
@@ -0,0 +1,166 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xuartps_selftest.c
+* @addtogroup uartps_v3_5
+* @{
+*
+* This file contains the self-test functions for the XUartPs driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00	drg/jz 01/13/10 First Release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xstatus.h"
+#include "xuartps.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XUARTPS_TOTAL_BYTES (u8)32
+
+/************************** Variable Definitions *****************************/
+
+static u8 TestString[XUARTPS_TOTAL_BYTES]="abcdefghABCDEFGH012345677654321";
+static u8 ReturnString[XUARTPS_TOTAL_BYTES];
+
+/************************** Function Prototypes ******************************/
+
+
+/****************************************************************************/
+/**
+*
+* This function runs a self-test on the driver and hardware device. This self
+* test performs a local loopback and verifies data can be sent and received.
+*
+* The time for this test is proportional to the baud rate that has been set
+* prior to calling this function.
+*
+* The mode and control registers are restored before return.
+*
+* @param	InstancePtr is a pointer to the XUartPs instance
+*
+* @return
+*		 - XST_SUCCESS if the test was successful
+*		- XST_UART_TEST_FAIL if the test failed looping back the data
+*
+* @note
+*
+* This function can hang if the hardware is not functioning properly.
+*
+******************************************************************************/
+s32 XUartPs_SelfTest(XUartPs *InstancePtr)
+{
+	s32 Status = XST_SUCCESS;
+	u32 IntrRegister;
+	u32 ModeRegister;
+	u8 Index;
+	u32 ReceiveDataResult;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/* Disable all interrupts in the interrupt disable register */
+	IntrRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				   XUARTPS_IMR_OFFSET);
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IDR_OFFSET,
+		XUARTPS_IXR_MASK);
+
+	/* Setup for local loopback */
+	ModeRegister = XUartPs_ReadReg(InstancePtr->Config.BaseAddress,
+				   XUARTPS_MR_OFFSET);
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET,
+			   ((ModeRegister & (u32)(~XUARTPS_MR_CHMODE_MASK)) |
+				(u32)XUARTPS_MR_CHMODE_L_LOOP));
+
+	/* Send a number of bytes and receive them, one at a time. */
+	for (Index = 0U; Index < XUARTPS_TOTAL_BYTES; Index++) {
+		/*
+		 * Send out the byte and if it was not sent then the failure
+		 * will be caught in the comparison at the end
+		 */
+		(void)XUartPs_Send(InstancePtr, &TestString[Index], 1U);
+
+		/*
+		 * Wait until the byte is received. This can hang if the HW
+		 * is broken. Watch for the FIFO empty flag to be false.
+		 */
+		ReceiveDataResult = Xil_In32((InstancePtr->Config.BaseAddress) + XUARTPS_SR_OFFSET) &
+				XUARTPS_SR_RXEMPTY;
+		while (ReceiveDataResult == XUARTPS_SR_RXEMPTY ) {
+			ReceiveDataResult = Xil_In32((InstancePtr->Config.BaseAddress) + XUARTPS_SR_OFFSET) &
+					XUARTPS_SR_RXEMPTY;
+		}
+
+		/* Receive the byte */
+		(void)XUartPs_Recv(InstancePtr, &ReturnString[Index], 1U);
+	}
+
+	/*
+	 * Compare the bytes received to the bytes sent to verify the exact data
+	 * was received
+	 */
+	for (Index = 0U; Index < XUARTPS_TOTAL_BYTES; Index++) {
+		if (TestString[Index] != ReturnString[Index]) {
+			Status = XST_UART_TEST_FAIL;
+		}
+	}
+
+	/*
+	 * Restore the registers which were altered to put into polling and
+	 * loopback modes so that this test is not destructive
+	 */
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_IER_OFFSET,
+			   IntrRegister);
+	XUartPs_WriteReg(InstancePtr->Config.BaseAddress, XUARTPS_MR_OFFSET,
+			   ModeRegister);
+
+	return Status;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_sinit.c b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_sinit.c
new file mode 100644
index 0000000..22e2f7a
--- /dev/null
+++ b/src/Xilinx/libsrc/uartps_v3_6/src/xuartps_sinit.c
@@ -0,0 +1,99 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xuartps_sinit.c
+* @addtogroup uartps_v3_5
+* @{
+*
+* The implementation of the XUartPs driver's static initialzation
+* functionality.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date	Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00  drg/jz 01/13/10 First Release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xstatus.h"
+#include "xparameters.h"
+#include "xuartps.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+extern XUartPs_Config XUartPs_ConfigTable[XPAR_XUARTPS_NUM_INSTANCES];
+
+/************************** Function Prototypes *****************************/
+
+/****************************************************************************/
+/**
+*
+* Looks up the device configuration based on the unique device ID. The table
+* contains the configuration info for each device in the system.
+*
+* @param	DeviceId contains the ID of the device
+*
+* @return	A pointer to the configuration structure or NULL if the
+*		specified device is not in the system.
+*
+* @note		None.
+*
+******************************************************************************/
+XUartPs_Config *XUartPs_LookupConfig(u16 DeviceId)
+{
+	XUartPs_Config *CfgPtr = NULL;
+
+	u32 Index;
+
+	for (Index = 0U; Index < (u32)XPAR_XUARTPS_NUM_INSTANCES; Index++) {
+		if (XUartPs_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XUartPs_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XUartPs_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/Makefile b/src/Xilinx/libsrc/usbpsu_v1_4/src/Makefile
new file mode 100644
index 0000000..d306488
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xusbps_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling usbpsu"
+
+xusbps_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: xusbps_includes
+
+xusbps_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusb_wrapper.c b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusb_wrapper.c
new file mode 100644
index 0000000..57f859d
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusb_wrapper.c
@@ -0,0 +1,329 @@
+/******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+ ******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * @file xusb_wrapper.c
+ *
+ * This file contains implementation of USBPSU Driver wrappers.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  	Date     Changes
+ * ----- ---- 	-------- -------------------------------------------------------
+ * 1.0   BK 	12/01/18 First release
+ *	 MYK	12/01/18 Added hibernation support for device mode
+ *	 vak	13/03/18 Moved the setup interrupt system calls from driver to
+ *			 example.
+ *
+ * 

+ *
+ *****************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xusb_wrapper.h"
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+Usb_Config* LookupConfig(u16 DeviceId)
+{
+	return XUsbPsu_LookupConfig(DeviceId);
+}
+
+void CacheInit(void)
+{
+
+}
+
+s32 CfgInitialize(struct Usb_DevData *InstancePtr,
+			Usb_Config *ConfigPtr, u32 BaseAddress)
+{
+	PrivateData.AppData = InstancePtr;
+	InstancePtr->PrivateData = (void *)&PrivateData;
+
+	return XUsbPsu_CfgInitialize((struct XUsbPsu *)InstancePtr->PrivateData,
+			ConfigPtr, BaseAddress);
+}
+
+void Set_Ch9Handler(
+		void *InstancePtr,
+		void (*func)(struct Usb_DevData *, SetupPacket *))
+{
+	XUsbPsu_set_ch9handler((struct XUsbPsu *)InstancePtr, func);
+}
+
+void Set_RstHandler(void *InstancePtr, void (*func)(struct Usb_DevData *))
+{
+	XUsbPsu_set_rsthandler((struct XUsbPsu *)InstancePtr, func);
+}
+
+void Set_Disconnect(void *InstancePtr, void (*func)(struct Usb_DevData *))
+{
+	XUsbPsu_set_disconnect((struct XUsbPsu *)InstancePtr, func);
+}
+
+void EpConfigure(void *UsbInstance, u8 EndpointNo, u8 dir, u32 Type)
+{
+	(void)UsbInstance;
+	(void)EndpointNo;
+	(void)dir;
+	(void)Type;
+}
+
+s32 ConfigureDevice(void *UsbInstance, u8 *MemPtr, u32 memSize)
+{
+	(void)UsbInstance;
+	(void)MemPtr;
+	(void)memSize;
+	return XST_SUCCESS;
+}
+
+void SetEpHandler(void *InstancePtr, u8 Epnum,
+			u8 Dir, void (*Handler)(void *, u32, u32))
+{
+	XUsbPsu_SetEpHandler((struct XUsbPsu *)InstancePtr, Epnum, Dir, Handler);
+}
+
+s32 Usb_Start(void *InstancePtr)
+{
+	return XUsbPsu_Start((struct XUsbPsu *)InstancePtr);
+}
+
+void *Get_DrvData(void *InstancePtr)
+{
+	return XUsbPsu_get_drvdata((struct XUsbPsu *)InstancePtr);
+}
+
+void Set_DrvData(void *InstancePtr, void *data)
+{
+	XUsbPsu_set_drvdata((struct XUsbPsu *)InstancePtr, data);
+}
+
+s32 IsEpStalled(void *InstancePtr, u8 Epnum, u8 Dir)
+{
+	return XUsbPsu_IsEpStalled((struct XUsbPsu *)InstancePtr, Epnum, Dir);
+}
+
+void EpClearStall(void *InstancePtr, u8 Epnum, u8 Dir)
+{
+	XUsbPsu_EpClearStall((struct XUsbPsu *)InstancePtr, Epnum, Dir);
+}
+
+s32 EpBufferSend(void *InstancePtr, u8 UsbEp,
+			u8 *BufferPtr, u32 BufferLen)
+{
+	if (UsbEp == 0 && BufferLen == 0)
+		return XST_SUCCESS;
+	else
+		return XUsbPsu_EpBufferSend((struct XUsbPsu *)InstancePtr,
+						UsbEp, BufferPtr, BufferLen);
+
+}
+
+s32 EpBufferRecv(void *InstancePtr, u8 UsbEp,
+				u8 *BufferPtr, u32 Length)
+{
+	return XUsbPsu_EpBufferRecv((struct XUsbPsu *)InstancePtr, UsbEp,
+			BufferPtr, Length);
+}
+
+void EpSetStall(void *InstancePtr, u8 Epnum, u8 Dir)
+{
+	XUsbPsu_EpSetStall((struct XUsbPsu *)InstancePtr, Epnum, Dir);
+}
+
+void SetBits(void *InstancePtr, u32 TestSel)
+{
+	(void)InstancePtr;
+	(void)TestSel;
+}
+
+s32 SetDeviceAddress(void *InstancePtr, u16 Addr)
+{
+	return XUsbPsu_SetDeviceAddress((struct XUsbPsu *)InstancePtr, Addr);
+}
+
+s32 SetU1SleepTimeout(void *InstancePtr, u8 Sleep)
+{
+	return XUsbPsu_SetU1SleepTimeout((struct XUsbPsu *)InstancePtr, Sleep);
+}
+
+s32 SetU2SleepTimeout(void *InstancePtr, u8 Sleep)
+{
+	return XUsbPsu_SetU2SleepTimeout((struct XUsbPsu *)InstancePtr, Sleep);
+}
+
+s32 AcceptU1U2Sleep(void *InstancePtr)
+{
+	return XUsbPsu_AcceptU1U2Sleep((struct XUsbPsu *)InstancePtr);
+
+}
+
+s32 U1SleepEnable(void *InstancePtr)
+{
+	return XUsbPsu_U1SleepEnable((struct XUsbPsu *)InstancePtr);
+}
+
+s32 U2SleepEnable(void *InstancePtr)
+{
+	return XUsbPsu_U2SleepEnable((struct XUsbPsu *)InstancePtr);
+}
+
+s32 U1SleepDisable(void *InstancePtr)
+{
+	return XUsbPsu_U1SleepDisable((struct XUsbPsu *)InstancePtr);
+}
+
+s32 U2SleepDisable(void *InstancePtr)
+{
+	return XUsbPsu_U2SleepDisable((struct XUsbPsu *)InstancePtr);
+}
+
+s32 EpEnable(void *InstancePtr, u8 UsbEpNum, u8 Dir, u16 Maxsize, u8 Type)
+{
+	return XUsbPsu_EpEnable((struct XUsbPsu *)InstancePtr, UsbEpNum, Dir,
+			Maxsize, Type, FALSE);
+}
+
+s32 EpDisable(void *InstancePtr, u8 UsbEpNum, u8 Dir)
+{
+	return XUsbPsu_EpDisable((struct XUsbPsu *)InstancePtr, UsbEpNum, Dir);
+}
+
+void Usb_SetSpeed(void *InstancePtr, u32 Speed)
+{
+	XUsbPsu_SetSpeed((struct XUsbPsu *)InstancePtr, Speed);
+}
+
+/****************************************************************************/
+/**
+* Sets speed of the Core for connecting to Host
+*
+* @param	InstancePtr is a pointer to the Usb_DevData instance.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 IsSuperSpeed(struct Usb_DevData *InstancePtr)
+{
+	if (InstancePtr->Speed != XUSBPSU_SPEED_SUPER) {
+		return XST_FAILURE;
+	}
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Set the Config state
+*
+* @param	InstancePtr is a private member of Usb_DevData instance.
+* @param	Flag is the config value.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void SetConfigDone(void *InstancePtr, u8 Flag)
+{
+	((struct XUsbPsu *)InstancePtr)->IsConfigDone = Flag;
+}
+
+/****************************************************************************/
+/**
+* Get the Config state
+*
+* @param	InstancePtr is a private member of Usb_DevData instance.
+*
+* @return	Current configuration value
+*
+* @note		None.
+*
+*****************************************************************************/
+u8 GetConfigDone(void *InstancePtr)
+{
+	return (((struct XUsbPsu *)InstancePtr)->IsConfigDone);
+}
+
+void Ep0StallRestart(void *InstancePtr)
+{
+	XUsbPsu_Ep0StallRestart((struct XUsbPsu *)InstancePtr);
+}
+
+/******************************************************************************/
+/**
+ * This function sets Endpoint Interval.
+ *
+ * @param	InstancePtr is a private member of Usb_DevData instance.
+ * @param	UsbEpnum is Endpoint Number.
+ * @param	Dir is Endpoint Direction(In/Out).
+ * @param	Interval is the data transfer service interval
+ *
+ * @return 	None.
+ *
+ * @note	None.
+ *
+ ******************************************************************************/
+void SetEpInterval(void *InstancePtr, u8 UsbEpNum, u8 Dir, u32 Interval)
+{
+	u32 PhyEpNum;
+	struct XUsbPsu_Ep *Ept;
+
+	PhyEpNum = PhysicalEp(UsbEpNum, Dir);
+	Ept = &((struct XUsbPsu *)InstancePtr)->eps[PhyEpNum];
+	Ept->Interval = Interval;
+}
+
+void StopTransfer(void *InstancePtr, u8 EpNum, u8 Dir)
+{
+	XUsbPsu_StopTransfer((struct XUsbPsu *)InstancePtr, EpNum, Dir, TRUE);
+}
+
+s32 StreamOn(void *InstancePtr, u8 EpNum, u8 Dir, u8 *BufferPtr)
+{
+	(void)InstancePtr;
+	(void)EpNum;
+	(void)Dir;
+	(void)BufferPtr;
+	/* Streaming will start on TxferNotReady Event */
+	return XST_SUCCESS;
+}
+
+void StreamOff(void *InstancePtr, u8 EpNum, u8 Dir)
+{
+	StopTransfer((struct XUsbPsu *)InstancePtr, EpNum, Dir);
+}
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusb_wrapper.h b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusb_wrapper.h
new file mode 100644
index 0000000..d21072b
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusb_wrapper.h
@@ -0,0 +1,190 @@
+/******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+ ******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * @file xusb_wrapper.h
+ *
+ * This file contains declarations for USBPSU Driver wrappers.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  	Date     Changes
+ * ----- ---- 	-------- -------------------------------------------------------
+ *  1.0  BK	12/01/18 First release
+ *	 MYK	12/01/18 Added hibernation support for device mode
+ *	 vak	22/01/18 Added Microblaze support for usbpsu driver
+ *	 vak	13/03/18 Moved the setup interrupt system calls from driver to
+ *			 example.
+ *
+ * 

+ *
+ *****************************************************************************/
+
+#ifndef XUSB_WRAPPER_H  /* Prevent circular inclusions */
+#define XUSB_WRAPPER_H  /* by using protection macros  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+#include "xusbpsu.h"
+
+/************************** Constant Definitions ****************************/
+#define USB_DEVICE_ID		XPAR_XUSBPSU_0_DEVICE_ID
+
+#define USB_EP_DIR_IN		XUSBPSU_EP_DIR_IN
+#define USB_EP_DIR_OUT		XUSBPSU_EP_DIR_OUT
+
+#define USB_DIR_OUT				0U		/* to device */
+#define USB_DIR_IN				0x80U	/* to host */
+
+/**
+ * @name Endpoint Address
+ * @{
+ */
+#define USB_EP1_IN		0x81
+#define USB_EP1_OUT		0x01
+#define USB_EP2_IN		0x82
+#define USB_EP2_OUT		0x02
+/* @} */
+
+/**
+ * @name Endpoint Type
+ * @{
+ */
+#define USB_EP_TYPE_CONTROL			XUSBPSU_ENDPOINT_XFER_CONTROL
+#define USB_EP_TYPE_ISOCHRONOUS		XUSBPSU_ENDPOINT_XFER_ISOC
+#define USB_EP_TYPE_BULK			XUSBPSU_ENDPOINT_XFER_BULK
+#define USB_EP_TYPE_INTERRUPT		XUSBPSU_ENDPOINT_XFER_INT
+/* @} */
+
+#define USB_ENDPOINT_NUMBER_MASK        0x0f    /* in bEndpointAddress */
+#define USB_ENDPOINT_DIR_MASK           0x80
+
+/*
+ * Device States
+ */
+#define		USB_STATE_ATTACHED		XUSBPSU_STATE_ATTACHED
+#define		USB_STATE_POWERED		XUSBPSU_STATE_POWERED
+#define		USB_STATE_DEFAULT		XUSBPSU_STATE_DEFAULT
+#define		USB_STATE_ADDRESS		XUSBPSU_STATE_ADDRESS
+#define		USB_STATE_CONFIGURED	XUSBPSU_STATE_CONFIGURED
+#define		USB_STATE_SUSPENDED		XUSBPSU_STATE_SUSPENDED
+
+#define XUSBPSU_REQ_REPLY_LEN	    1024	/**< Max size of reply buffer. */
+#define USB_REQ_REPLY_LEN			XUSBPSU_REQ_REPLY_LEN
+
+/*
+ * Device Speeds
+ */
+#define	USB_SPEED_UNKNOWN		XUSBPSU_SPEED_UNKNOWN
+#define	USB_SPEED_LOW			XUSBPSU_SPEED_LOW
+#define	USB_SPEED_FULL			XUSBPSU_SPEED_FULL
+#define	USB_SPEED_HIGH			XUSBPSU_SPEED_HIGH
+#define	USB_SPEED_SUPER			XUSBPSU_SPEED_SUPER
+
+/* Device Configuration Speed */
+#define	USB_DCFG_SPEED_MASK		XUSBPSU_DCFG_SPEED_MASK
+#define	USB_DCFG_SUPERSPEED		XUSBPSU_DCFG_SUPERSPEED
+#define	USB_DCFG_HIGHSPEED		XUSBPSU_DCFG_HIGHSPEED
+#define	USB_DCFG_FULLSPEED2		XUSBPSU_DCFG_FULLSPEED2
+#define	USB_DCFG_LOWSPEED		XUSBPSU_DCFG_LOWSPEED
+#define	USB_DCFG_FULLSPEED1		XUSBPSU_DCFG_FULLSPEED1
+
+#define	USB_TEST_J				XUSBPSU_TEST_J
+#define	USB_TEST_K				XUSBPSU_TEST_K
+#define	USB_TEST_SE0_NAK		XUSBPSU_TEST_SE0_NAK
+#define	USB_TEST_PACKET			XUSBPSU_TEST_PACKET
+#define	USB_TEST_FORCE_ENABLE	XUSBPSU_TEST_FORCE_ENABLE
+
+/* TODO: If we enable this macro, reconnection is failed with 2017.3 */
+#define USB_LPM_MODE			XUSBPSU_LPM_MODE
+
+/*
+ * return Physical EP number as dwc3 mapping
+ */
+#define PhysicalEp(epnum, direction)	(((epnum) << 1 ) | (direction))
+
+/**************************** Type Definitions ******************************/
+
+/************************** Variable Definitions *****************************/
+struct XUsbPsu PrivateData;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+Usb_Config* LookupConfig(u16 DeviceId);
+void CacheInit(void);
+s32 CfgInitialize(struct Usb_DevData *InstancePtr,
+			Usb_Config *ConfigPtr, u32 BaseAddress);
+void Set_Ch9Handler(void *InstancePtr,
+				void (*func)(struct Usb_DevData *, SetupPacket *));
+void Set_RstHandler(void *InstancePtr, void (*func)(struct Usb_DevData *));
+void Set_Disconnect(void *InstancePtr, void (*func)(struct Usb_DevData *));
+void EpConfigure(void *UsbInstance, u8 EndpointNo, u8 dir, u32 Type);
+s32 ConfigureDevice(void *UsbInstance, u8 *MemPtr, u32 memSize);
+void SetEpHandler(void *InstancePtr, u8 Epnum,
+			u8 Dir, void (*Handler)(void *, u32, u32));
+s32 Usb_Start(void *InstancePtr);
+void *Get_DrvData(void *InstancePtr);
+void Set_DrvData(void *InstancePtr, void *data);
+s32 IsEpStalled(void *InstancePtr, u8 Epnum, u8 Dir);
+void EpClearStall(void *InstancePtr, u8 Epnum, u8 Dir);
+s32 EpBufferSend(void *InstancePtr, u8 UsbEp,
+			u8 *BufferPtr, u32 BufferLen);
+s32 EpBufferRecv(void *InstancePtr, u8 UsbEp,
+				u8 *BufferPtr, u32 Length);
+void EpSetStall(void *InstancePtr, u8 Epnum, u8 Dir);
+void SetBits(void *InstancePtr, u32 TestSel);
+s32 SetDeviceAddress(void *InstancePtr, u16 Addr);
+s32 SetU1SleepTimeout(void *InstancePtr, u8 Sleep);
+s32 SetU2SleepTimeout(void *InstancePtr, u8 Sleep);
+s32 AcceptU1U2Sleep(void *InstancePtr);
+s32 U1SleepEnable(void *InstancePtr);
+s32 U2SleepEnable(void *InstancePtr);
+s32 U1SleepDisable(void *InstancePtr);
+s32 U2SleepDisable(void *InstancePtr);
+s32 EpEnable(void *InstancePtr, u8 UsbEpNum, u8 Dir, u16 Maxsize, u8 Type);
+s32 EpDisable(void *InstancePtr, u8 UsbEpNum, u8 Dir);
+void Usb_SetSpeed(void *InstancePtr, u32 Speed);
+s32 IsSuperSpeed(struct Usb_DevData *InstancePtr);
+void SetConfigDone(void *InstancePtr, u8 Flag);
+u8 GetConfigDone(void *InstancePtr);
+void Ep0StallRestart(void *InstancePtr);
+void SetEpInterval(void *InstancePtr, u8 UsbEpNum, u8 Dir, u32 Interval);
+void StopTransfer(void *InstancePtr, u8 EpNum, u8 Dir);
+s32 StreamOn(void *InstancePtr, u8 EpNum, u8 Dir, u8 *BufferPtr);
+void StreamOff(void *InstancePtr, u8 EpNum, u8 Dir);
+
+#endif  /* End of protection macro. */
+/** @} */
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu.c b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu.c
new file mode 100644
index 0000000..245fba2
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu.c
@@ -0,0 +1,898 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xusbpsu.c
+* @addtogroup usbpsu_v1_3
+* @{
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.0   sg    06/16/16 First release
+* 1.1   sg    10/24/16 Added new function XUsbPsu_IsSuperSpeed
+* 1.4	bk    12/01/18 Modify USBPSU driver code to fit USB common example code
+*		       for all USB IPs.
+*	myk   12/01/18 Added hibernation support for device mode
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xusb_wrapper.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+/*****************************************************************************/
+/**
+* Waits until a bit in a register is cleared or timeout occurs
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked on.
+* @param	Offset is register offset.
+* @param	BitMask is bit mask of required bit to be checked.
+* @param	Timeout is the time to wait specified in micro seconds.
+*
+* @return
+*			- XST_SUCCESS when bit is cleared.
+*			- XST_FAILURE when timed out.
+*
+******************************************************************************/
+s32 XUsbPsu_Wait_Clear_Timeout(struct XUsbPsu *InstancePtr, u32 Offset,
+								u32 BitMask, u32 Timeout)
+{
+	u32 RegVal;
+	u32 LocalTimeout = Timeout;
+
+	do {
+		RegVal = XUsbPsu_ReadReg(InstancePtr, Offset);
+		if ((RegVal & BitMask) == 0U) {
+			break;
+		}
+		LocalTimeout--;
+		if (LocalTimeout == 0U) {
+			return XST_FAILURE;
+		}
+		XUsbSleep(1U);
+	} while (1);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* Waits until a bit in a register is set or timeout occurs
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked on.
+* @param	Offset is register offset.
+* @param	BitMask is bit mask of required bit to be checked.
+* @param	Timeout is the time to wait specified in micro seconds.
+*
+* @return
+*			- XST_SUCCESS when bit is set.
+*			- XST_FAILURE when timed out.
+*
+******************************************************************************/
+s32 XUsbPsu_Wait_Set_Timeout(struct XUsbPsu *InstancePtr, u32 Offset,
+								u32 BitMask, u32 Timeout)
+{
+	u32 RegVal;
+	u32 LocalTimeout = Timeout;
+
+	do {
+		RegVal = XUsbPsu_ReadReg(InstancePtr, Offset);
+		if ((RegVal & BitMask) != 0U) {
+			break;
+		}
+		LocalTimeout--;
+		if (LocalTimeout == 0U) {
+			return XST_FAILURE;
+		}
+		XUsbSleep(1U);
+	} while (1);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* Sets mode of Core to USB Device/Host/OTG.
+*
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked on.
+* @param	Mode is mode to set
+*			- XUSBPSU_GCTL_PRTCAP_OTG
+*			- XUSBPSU_GCTL_PRTCAP_HOST
+*			- XUSBPSU_GCTL_PRTCAP_DEVICE
+*
+* @return	None
+*
+******************************************************************************/
+void XUsbPsu_SetMode(struct XUsbPsu *InstancePtr, u32 Mode)
+{
+	u32 RegVal;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid((Mode <= XUSBPSU_GCTL_PRTCAP_OTG) &&
+					(Mode >= XUSBPSU_GCTL_PRTCAP_HOST));
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GCTL);
+	RegVal &= ~(XUSBPSU_GCTL_PRTCAPDIR(XUSBPSU_GCTL_PRTCAP_OTG));
+	RegVal |= XUSBPSU_GCTL_PRTCAPDIR(Mode);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GCTL, RegVal);
+}
+
+/*****************************************************************************/
+/**
+* Issues core PHY reset.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked on.
+*
+* @return	None
+*
+******************************************************************************/
+void XUsbPsu_PhyReset(struct XUsbPsu *InstancePtr)
+{
+	u32		RegVal;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	/* Before Resetting PHY, put Core in Reset */
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GCTL);
+	RegVal |= XUSBPSU_GCTL_CORESOFTRESET;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GCTL, RegVal);
+
+	/* Assert USB3 PHY reset */
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GUSB3PIPECTL(0));
+	RegVal |= XUSBPSU_GUSB3PIPECTL_PHYSOFTRST;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GUSB3PIPECTL(0), RegVal);
+
+	/* Assert USB2 PHY reset */
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GUSB2PHYCFG(0));
+	RegVal |= XUSBPSU_GUSB2PHYCFG_PHYSOFTRST;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GUSB2PHYCFG(0), RegVal);
+
+	XUsbSleep(XUSBPSU_PHY_TIMEOUT);
+
+	/* Clear USB3 PHY reset */
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GUSB3PIPECTL(0));
+	RegVal &= ~XUSBPSU_GUSB3PIPECTL_PHYSOFTRST;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GUSB3PIPECTL(0), RegVal);
+
+	/* Clear USB2 PHY reset */
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GUSB2PHYCFG(0));
+	RegVal &= ~XUSBPSU_GUSB2PHYCFG_PHYSOFTRST;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GUSB2PHYCFG(0), RegVal);
+
+	XUsbSleep(XUSBPSU_PHY_TIMEOUT);
+
+	/* Take Core out of reset state after PHYS are stable*/
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GCTL);
+	RegVal &= ~XUSBPSU_GCTL_CORESOFTRESET;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GCTL, RegVal);
+}
+
+/*****************************************************************************/
+/**
+* Sets up Event buffers so that events are written by Core.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked on.
+*
+* @return	None
+*
+******************************************************************************/
+void XUsbPsu_EventBuffersSetup(struct XUsbPsu *InstancePtr)
+{
+	struct XUsbPsu_EvtBuffer *Evt;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	Evt = &InstancePtr->Evt;
+	Evt->BuffAddr = (void *)InstancePtr->EventBuffer;
+	Evt->Offset = 0;
+
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTADRLO(0),
+			(UINTPTR)InstancePtr->EventBuffer);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTADRHI(0),
+			((UINTPTR)(InstancePtr->EventBuffer) >> 16U) >> 16U);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTSIZ(0),
+			XUSBPSU_GEVNTSIZ_SIZE(sizeof(InstancePtr->EventBuffer)));
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTCOUNT(0), 0);
+}
+
+/*****************************************************************************/
+/**
+* Resets Event buffer Registers to zero so that events are not written by Core.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked on.
+*
+* @return	None
+*
+******************************************************************************/
+void XUsbPsu_EventBuffersReset(struct XUsbPsu *InstancePtr)
+{
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTADRLO(0U), 0U);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTADRHI(0U), 0U);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTSIZ(0U),
+			(u32)XUSBPSU_GEVNTSIZ_INTMASK | XUSBPSU_GEVNTSIZ_SIZE(0U));
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTCOUNT(0U), 0U);
+}
+
+/*****************************************************************************/
+/**
+* Reads data from Hardware Params Registers of Core.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked on.
+* @param	RegIndex is Register number to read
+*			- XUSBPSU_GHWPARAMS0
+*			- XUSBPSU_GHWPARAMS1
+*			- XUSBPSU_GHWPARAMS2
+*			- XUSBPSU_GHWPARAMS3
+*			- XUSBPSU_GHWPARAMS4
+*			- XUSBPSU_GHWPARAMS5
+*			- XUSBPSU_GHWPARAMS6
+*			- XUSBPSU_GHWPARAMS7
+*
+* @return	One of the GHWPARAMS RegValister contents.
+*
+******************************************************************************/
+u32 XUsbPsu_ReadHwParams(struct XUsbPsu *InstancePtr, u8 RegIndex)
+{
+	u32 RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(RegIndex <= (u8)XUSBPSU_GHWPARAMS7);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, ((u32)XUSBPSU_GHWPARAMS0_OFFSET +
+							((u32)RegIndex * (u32)4)));
+	return RegVal;
+}
+
+/*****************************************************************************/
+/**
+* Initializes Core.
+*
+* @param  InstancePtr is a pointer to the XUsbPsu instance to be worked on.
+*
+* @return
+*	 	- XST_SUCCESS if initialization was successful
+*		- XST_FAILURE if initialization was not successful
+*
+******************************************************************************/
+s32 XUsbPsu_CoreInit(struct XUsbPsu *InstancePtr)
+{
+	u32		RegVal;
+	u32		Hwparams1;
+
+	/* issue device SoftReset too */
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, XUSBPSU_DCTL_CSFTRST);
+
+	if (XUsbPsu_Wait_Clear_Timeout(InstancePtr, XUSBPSU_DCTL,
+			XUSBPSU_DCTL_CSFTRST, 500U) == XST_FAILURE) {
+		/* timed out return failure */
+		return XST_FAILURE;
+	}
+
+	XUsbPsu_PhyReset(InstancePtr);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GCTL);
+	RegVal &= ~XUSBPSU_GCTL_SCALEDOWN_MASK;
+	RegVal &= ~XUSBPSU_GCTL_DISSCRAMBLE;
+	RegVal |= XUSBPSU_GCTL_U2EXIT_LFPS;
+
+	Hwparams1 = XUsbPsu_ReadHwParams(InstancePtr, 1U);
+
+	switch (XUSBPSU_GHWPARAMS1_EN_PWROPT(Hwparams1)) {
+		case XUSBPSU_GHWPARAMS1_EN_PWROPT_CLK:
+			RegVal &= ~XUSBPSU_GCTL_DSBLCLKGTNG;
+			break;
+
+		case XUSBPSU_GHWPARAMS1_EN_PWROPT_HIB:
+			/* enable hibernation here */
+#ifdef XUSBPSU_HIBERNATION_ENABLE
+			RegVal |= XUSBPSU_GCTL_GBLHIBERNATIONEN;
+			InstancePtr->HasHibernation = 1;
+#endif
+			break;
+
+		default:
+			/* Made for Misra-C Compliance. */
+			break;
+	}
+
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GCTL, RegVal);
+
+#ifdef XUSBPSU_HIBERNATION_ENABLE
+	if (InstancePtr->HasHibernation)
+		XUsbPsu_InitHibernation(InstancePtr);
+#endif
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* Enables an interrupt in Event Enable RegValister.
+*
+* @param  InstancePtr is a pointer to the XUsbPsu instance to be worked on
+* @param  Mask is the OR of any Interrupt Enable Masks:
+*		- XUSBPSU_DEVTEN_VNDRDEVTSTRCVEDEN
+*		- XUSBPSU_DEVTEN_EVNTOVERFLOWEN
+*		- XUSBPSU_DEVTEN_CMDCMPLTEN
+*		- XUSBPSU_DEVTEN_ERRTICERREN
+*		- XUSBPSU_DEVTEN_SOFEN
+*		- XUSBPSU_DEVTEN_EOPFEN
+*		- XUSBPSU_DEVTEN_HIBERNATIONREQEVTEN
+*		- XUSBPSU_DEVTEN_WKUPEVTEN
+*		- XUSBPSU_DEVTEN_ULSTCNGEN
+*		- XUSBPSU_DEVTEN_CONNECTDONEEN
+*		- XUSBPSU_DEVTEN_USBRSTEN
+*		- XUSBPSU_DEVTEN_DISCONNEVTEN
+*
+* @return  None
+*
+******************************************************************************/
+void XUsbPsu_EnableIntr(struct XUsbPsu *InstancePtr, u32 Mask)
+{
+    u32	RegVal;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+    RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DEVTEN);
+    RegVal |= Mask;
+
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DEVTEN, RegVal);
+}
+
+/*****************************************************************************/
+/**
+* Disables an interrupt in Event Enable RegValister.
+*
+* @param  InstancePtr is a pointer to the XUsbPsu instance to be worked on.
+* @param  Mask is the OR of Interrupt Enable Masks
+*		- XUSBPSU_DEVTEN_VNDRDEVTSTRCVEDEN
+*		- XUSBPSU_DEVTEN_EVNTOVERFLOWEN
+*		- XUSBPSU_DEVTEN_CMDCMPLTEN
+*		- XUSBPSU_DEVTEN_ERRTICERREN
+*		- XUSBPSU_DEVTEN_SOFEN
+*		- XUSBPSU_DEVTEN_EOPFEN
+*		- XUSBPSU_DEVTEN_HIBERNATIONREQEVTEN
+*		- XUSBPSU_DEVTEN_WKUPEVTEN
+*		- XUSBPSU_DEVTEN_ULSTCNGEN
+*		- XUSBPSU_DEVTEN_CONNECTDONEEN
+*		- XUSBPSU_DEVTEN_USBRSTEN
+*		- XUSBPSU_DEVTEN_DISCONNEVTEN
+*
+* @return  None
+*
+******************************************************************************/
+void XUsbPsu_DisableIntr(struct XUsbPsu *InstancePtr, u32 Mask)
+{
+	u32 RegVal;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DEVTEN);
+	RegVal &= ~Mask;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DEVTEN, RegVal);
+}
+
+/****************************************************************************/
+/**
+*
+* This function does the following:
+*	- initializes a specific XUsbPsu instance.
+*	- sets up Event Buffer for Core to write events.
+*	- Core Reset and PHY Reset.
+*	- Sets core in Device Mode.
+*	- Sets default speed as HIGH_SPEED.
+*	- Sets Device Address to 0.
+*	- Enables interrupts.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	ConfigPtr points to the XUsbPsu device configuration structure.
+* @param	BaseAddress is the device base address in the virtual memory
+*			address space. If the address translation is not used then the
+*			physical address is passed.
+*			Unexpected errors may occur if the address mapping is changed
+*			after this function is invoked.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_CfgInitialize(struct XUsbPsu *InstancePtr,
+			XUsbPsu_Config *ConfigPtr, u32 BaseAddress)
+{
+	s32 Status;
+	u32 RegVal;
+
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr   != NULL);
+	Xil_AssertNonvoid(BaseAddress != 0U)
+
+	InstancePtr->ConfigPtr = ConfigPtr;
+
+	Status = XUsbPsu_CoreInit(InstancePtr);
+	if (Status != XST_SUCCESS) {
+#ifdef XUSBPSU_DEBUG
+		xil_printf("Core initialization failed\r\n");
+#endif
+		return XST_FAILURE;
+	}
+
+	RegVal = XUsbPsu_ReadHwParams(InstancePtr, 3U);
+	InstancePtr->NumInEps = (u8)XUSBPSU_NUM_IN_EPS(RegVal);
+	InstancePtr->NumOutEps = (u8)(XUSBPSU_NUM_EPS(RegVal) -
+			InstancePtr->NumInEps);
+
+	/* Map USB and Physical Endpoints */
+	XUsbPsu_InitializeEps(InstancePtr);
+
+	XUsbPsu_EventBuffersSetup(InstancePtr);
+
+	XUsbPsu_SetMode(InstancePtr, XUSBPSU_GCTL_PRTCAP_DEVICE);
+
+	/*
+	 * Setting to max speed to support SS and HS
+	 */
+	XUsbPsu_SetSpeed(InstancePtr, XUSBPSU_DCFG_SUPERSPEED);
+
+	(void)XUsbPsu_SetDeviceAddress(InstancePtr, 0U);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+*
+* Starts the controller so that Host can detect this device.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_Start(struct XUsbPsu *InstancePtr)
+{
+	u32			RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+
+	RegVal |= XUSBPSU_DCTL_RUN_STOP;
+
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	if (XUsbPsu_Wait_Clear_Timeout(InstancePtr, XUSBPSU_DSTS,
+			XUSBPSU_DSTS_DEVCTRLHLT, 500U) == XST_FAILURE) {
+		return XST_FAILURE;
+	}
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+*
+* Stops the controller so that Device disconnects from Host.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_Stop(struct XUsbPsu *InstancePtr)
+{
+	u32	RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal &= ~XUSBPSU_DCTL_RUN_STOP;
+
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	if (XUsbPsu_Wait_Set_Timeout(InstancePtr, XUSBPSU_DSTS,
+			XUSBPSU_DSTS_DEVCTRLHLT, 500U) == XST_FAILURE) {
+		return XST_FAILURE;
+	}
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+ * Enables USB2 Test Modes
+ *
+ * @param	InstancePtr is a pointer to the XUsbPsu instance.
+ * @param	Mode is Test mode to set.
+ *
+ * @return	XST_SUCCESS else XST_FAILURE
+ *
+ * @note	None.
+ *
+ ****************************************************************************/
+s32 XUsbPsu_SetTestMode(struct XUsbPsu *InstancePtr, u32 Mode)
+{
+	u32	RegVal;
+	s32 Status = XST_SUCCESS;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Mode >= XUSBPSU_TEST_J)
+			&& (Mode <= XUSBPSU_TEST_FORCE_ENABLE));
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal &= ~XUSBPSU_DCTL_TSTCTRL_MASK;
+
+	switch (Mode) {
+		case XUSBPSU_TEST_J:
+		case XUSBPSU_TEST_K:
+		case XUSBPSU_TEST_SE0_NAK:
+		case XUSBPSU_TEST_PACKET:
+		case XUSBPSU_TEST_FORCE_ENABLE:
+			RegVal |= (u32)Mode << 1;
+			break;
+
+		default:
+			Status = (s32)XST_FAILURE;
+			break;
+	}
+
+	if (Status != (s32)XST_FAILURE) {
+		XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+		Status = XST_SUCCESS;
+	}
+
+	return Status;
+}
+
+/****************************************************************************/
+/**
+ * Gets current State of USB Link
+ *
+ * @param	InstancePtr is a pointer to the XUsbPsu instance.
+ *
+ * @return	Link State
+ *
+ * @note	None.
+ *
+ ****************************************************************************/
+XusbPsuLinkState XUsbPsu_GetLinkState(struct XUsbPsu *InstancePtr)
+{
+	u32		RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DSTS);
+
+	return XUSBPSU_DSTS_USBLNKST(RegVal);
+}
+
+/****************************************************************************/
+/**
+ * Sets USB Link to a particular State
+ *
+ * @param	InstancePtr is a pointer to the XUsbPsu instance.
+ * @param	State is State of Link to set.
+ *
+ * @return	XST_SUCCESS else XST_FAILURE
+ *
+ * @note	None.
+ *
+ ****************************************************************************/
+s32 XUsbPsu_SetLinkState(struct XUsbPsu *InstancePtr,
+		XusbPsuLinkStateChange State)
+{
+	u32		RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	 /* Wait until device controller is ready. */
+	if (XUsbPsu_Wait_Clear_Timeout(InstancePtr, XUSBPSU_DSTS,
+			XUSBPSU_DSTS_DCNRD, 500U) == XST_FAILURE) {
+		return XST_FAILURE;
+	}
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal &= ~XUSBPSU_DCTL_ULSTCHNGREQ_MASK;
+
+	RegVal |= XUSBPSU_DCTL_ULSTCHNGREQ(State);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Sets speed of the Core for connecting to Host
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Speed is required speed
+*				- XUSBPSU_DCFG_HIGHSPEED
+*				- XUSBPSU_DCFG_FULLSPEED2
+*				- XUSBPSU_DCFG_LOWSPEED
+*				- XUSBPSU_DCFG_FULLSPEED1
+*
+* @return	None
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_SetSpeed(struct XUsbPsu *InstancePtr, u32 Speed)
+{
+	u32	RegVal;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Speed <= (u32)XUSBPSU_DCFG_SUPERSPEED);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCFG);
+	RegVal &= ~(XUSBPSU_DCFG_SPEED_MASK);
+	RegVal |= Speed;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCFG, RegVal);
+}
+
+/****************************************************************************/
+/**
+* Sets Device Address of the Core
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Addr is address to set.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note	None.
+*
+*****************************************************************************/
+s32 XUsbPsu_SetDeviceAddress(struct XUsbPsu *InstancePtr, u16 Addr)
+{
+	u32 RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Addr <= 127U);
+
+	if (InstancePtr->AppData->State == XUSBPSU_STATE_CONFIGURED) {
+		return XST_FAILURE;
+	}
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCFG);
+	RegVal &= ~(XUSBPSU_DCFG_DEVADDR_MASK);
+	RegVal |= XUSBPSU_DCFG_DEVADDR(Addr);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCFG, RegVal);
+
+	if (Addr) {
+		InstancePtr->AppData->State = XUSBPSU_STATE_ADDRESS;
+	}
+	else {
+		InstancePtr->AppData->State = XUSBPSU_STATE_DEFAULT;
+	}
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Set U1 sleep timeout
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Sleep is time in microseconds
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note	None.
+*
+*****************************************************************************/
+s32 XUsbPsu_SetU1SleepTimeout(struct XUsbPsu *InstancePtr, u8 Sleep)
+{
+	u32 RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_PORTMSC_30);
+	RegVal &= ~XUSBPSU_PORTMSC_30_U1_TIMEOUT_MASK;
+	RegVal |= (Sleep << XUSBPSU_PORTMSC_30_U1_TIMEOUT_SHIFT);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_PORTMSC_30, RegVal);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Set U2 sleep timeout
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Sleep is time in microseconds
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note	None.
+*
+*****************************************************************************/
+s32 XUsbPsu_SetU2SleepTimeout(struct XUsbPsu *InstancePtr, u8 Sleep)
+{
+	u32 RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_PORTMSC_30);
+	RegVal &= ~XUSBPSU_PORTMSC_30_U2_TIMEOUT_MASK;
+	RegVal |= (Sleep << XUSBPSU_PORTMSC_30_U2_TIMEOUT_SHIFT);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_PORTMSC_30, RegVal);
+
+	return XST_SUCCESS;
+}
+/****************************************************************************/
+/**
+* Enable Accept U1 and U2 sleep enable
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note	None.
+*
+*****************************************************************************/
+s32 XUsbPsu_AcceptU1U2Sleep(struct XUsbPsu *InstancePtr)
+{
+	u32 RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal |= XUSBPSU_DCTL_ACCEPTU2ENA | XUSBPSU_DCTL_ACCEPTU1ENA;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Enable U1 enable sleep
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note	None.
+*
+*****************************************************************************/
+s32 XUsbPsu_U1SleepEnable(struct XUsbPsu *InstancePtr)
+{
+	u32 RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal |= XUSBPSU_DCTL_INITU1ENA;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Enable U2 enable sleep
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note	None.
+*
+*****************************************************************************/
+s32 XUsbPsu_U2SleepEnable(struct XUsbPsu *InstancePtr)
+{
+	u32 RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal |= XUSBPSU_DCTL_INITU2ENA;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Enable U1 disable sleep
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note	None.
+*
+*****************************************************************************/
+s32 XUsbPsu_U1SleepDisable(struct XUsbPsu *InstancePtr)
+{
+	u32 RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal &= ~XUSBPSU_DCTL_INITU1ENA;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Enable U2 disable sleep
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note	None.
+*
+*****************************************************************************/
+s32 XUsbPsu_U2SleepDisable(struct XUsbPsu *InstancePtr)
+{
+	u32 RegVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal &= ~XUSBPSU_DCTL_INITU2ENA;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	return XST_SUCCESS;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu.h b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu.h
new file mode 100644
index 0000000..2d1498a
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu.h
@@ -0,0 +1,753 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xusbpsu.h
+* @addtogroup usbpsu_v1_3
+* @{
+* @details
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.0   sg    06/06/16 First release
+* 1.1   sg    10/24/16 Update for backward compatability
+*                      Added XUsbPsu_IsSuperSpeed function in xusbpsu.c
+* 1.2   mn    01/20/17 removed unnecessary declaration of
+*                      XUsbPsu_SetConfiguration in xusbpsu.h
+* 1.2   mn    01/30/17 Corrected InstancePtr->UnalignedTx with
+*                      Ept->UnalignedTx in xusbpsu_controltransfers.c
+* 1.2   mus   02/10/17 Updated data structures to fix compilation errors for IAR
+*                      compiler
+*       ms    03/17/17 Added readme.txt file in examples folder for doxygen
+*                      generation.
+*       ms    04/10/17 Modified filename tag to include the file in doxygen
+*                      examples.
+* 1.4	bk    12/01/18 Modify USBPSU driver code to fit USB common example code
+*		       for all USB IPs.
+*	myk   12/01/18 Added hibernation support for device mode
+*	vak   22/01/18 Added changes for supporting microblaze platform
+*	vak   13/03/18 Moved the setup interrupt system calls from driver to
+*		       example.
+*
+* 

+*
+*****************************************************************************/
+#ifndef XUSBPSU_H  /* Prevent circular inclusions */
+#define XUSBPSU_H  /* by using protection macros  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+/* Enable XUSBPSU_HIBERNATION_ENABLE to enable hibernation */
+//#define XUSBPSU_HIBERNATION_ENABLE		1
+
+#include "xparameters.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xusbpsu_hw.h"
+#include "xil_io.h"
+
+/*
+ * The header sleep.h and API usleep() can only be used with an arm design.
+ * MB_Sleep() is used for microblaze design.
+ */
+#if defined (__arm__) || defined (__aarch64__) || (__ICCARM__)
+#include "sleep.h"
+#endif
+
+#ifdef __MICROBLAZE__
+#include "microblaze_sleep.h"
+#endif
+#include "xil_cache.h"
+
+/************************** Constant Definitions ****************************/
+
+#define NO_OF_TRB_PER_EP		2
+
+#ifdef PLATFORM_ZYNQMP
+#define ALIGNMENT_CACHELINE		__attribute__ ((aligned(64)))
+#else
+#define ALIGNMENT_CACHELINE		__attribute__ ((aligned(32)))
+#endif
+
+#define	XUSBPSU_PHY_TIMEOUT		5000U /* in micro seconds */
+
+#define XUSBPSU_EP_DIR_IN				1U
+#define XUSBPSU_EP_DIR_OUT				0U
+
+#define XUSBPSU_ENDPOINT_XFERTYPE_MASK      0x03    /* in bmAttributes */
+#define XUSBPSU_ENDPOINT_XFER_CONTROL       0U
+#define XUSBPSU_ENDPOINT_XFER_ISOC          1U
+#define XUSBPSU_ENDPOINT_XFER_BULK          2U
+#define XUSBPSU_ENDPOINT_XFER_INT           3U
+#define XUSBPSU_ENDPOINT_MAX_ADJUSTABLE     0x80
+
+#define	XUSBPSU_TEST_J							1U
+#define	XUSBPSU_TEST_K							2U
+#define	XUSBPSU_TEST_SE0_NAK					3U
+#define	XUSBPSU_TEST_PACKET						4U
+#define	XUSBPSU_TEST_FORCE_ENABLE				5U
+
+#define XUSBPSU_NUM_TRBS				8
+
+#define XUSBPSU_EVENT_PENDING		(0x00000001U << 0)
+
+#define XUSBPSU_EP_ENABLED			(0x00000001U << 0)
+#define XUSBPSU_EP_STALL			(0x00000001U << 1)
+#define XUSBPSU_EP_WEDGE			(0x00000001U << 2)
+#define XUSBPSU_EP_BUSY				((u32)0x00000001U << 4)
+#define XUSBPSU_EP_PENDING_REQUEST	(0x00000001U << 5)
+#define XUSBPSU_EP_MISSED_ISOC		(0x00000001U << 6)
+
+#define	XUSBPSU_GHWPARAMS0				0U
+#define	XUSBPSU_GHWPARAMS1				1U
+#define	XUSBPSU_GHWPARAMS2				2U
+#define	XUSBPSU_GHWPARAMS3				3U
+#define	XUSBPSU_GHWPARAMS4				4U
+#define	XUSBPSU_GHWPARAMS5				5U
+#define	XUSBPSU_GHWPARAMS6				6U
+#define	XUSBPSU_GHWPARAMS7				7U
+
+/* HWPARAMS0 */
+#define XUSBPSU_MODE(n)					((n) & 0x7)
+#define XUSBPSU_MDWIDTH(n)				(((n) & 0xff00) >> 8)
+
+/* HWPARAMS1 */
+#define XUSBPSU_NUM_INT(n)				(((n) & (0x3f << 15)) >> 15)
+
+/* HWPARAMS3 */
+#define XUSBPSU_NUM_IN_EPS_MASK		((u32)0x0000001fU << (u32)18)
+#define XUSBPSU_NUM_EPS_MASK		((u32)0x0000003fU << (u32)12)
+#define XUSBPSU_NUM_EPS(p)			(((u32)(p) &		\
+									(XUSBPSU_NUM_EPS_MASK)) >> (u32)12)
+#define XUSBPSU_NUM_IN_EPS(p)		(((u32)(p) &		\
+									(XUSBPSU_NUM_IN_EPS_MASK)) >> (u32)18)
+
+/* HWPARAMS7 */
+#define XUSBPSU_RAM1_DEPTH(n)			((n) & 0xffff)
+
+#define XUSBPSU_DEPEVT_XFERCOMPLETE		0x01U
+#define XUSBPSU_DEPEVT_XFERINPROGRESS	0x02U
+#define XUSBPSU_DEPEVT_XFERNOTREADY		0x03U
+#define XUSBPSU_DEPEVT_STREAMEVT		0x06U
+#define XUSBPSU_DEPEVT_EPCMDCMPLT		0x07U
+
+/* Within XferNotReady */
+#define DEPEVT_STATUS_TRANSFER_ACTIVE	(1 << 3)
+
+/* Within XferComplete */
+#define DEPEVT_STATUS_BUSERR			(1 << 0)
+#define DEPEVT_STATUS_SHORT				(1 << 1)
+#define DEPEVT_STATUS_IOC				(1 << 2)
+#define DEPEVT_STATUS_LST				(1 << 3)
+
+/* Stream event only */
+#define DEPEVT_STREAMEVT_FOUND		1U
+#define DEPEVT_STREAMEVT_NOTFOUND	2U
+
+/* Control-only Status */
+#define DEPEVT_STATUS_CONTROL_DATA				1U
+#define DEPEVT_STATUS_CONTROL_STATUS			2U
+#define DEPEVT_STATUS_CONTROL_DATA_INVALTRB		9
+#define DEPEVT_STATUS_CONTROL_STATUS_INVALTRB	0xA
+
+#define XUSBPSU_ENDPOINTS_NUM			12U
+
+#define XUSBPSU_EVENT_SIZE				4U       /* bytes */
+#define XUSBPSU_EVENT_MAX_NUM			64U      /* 2 events/endpoint */
+#define XUSBPSU_EVENT_BUFFERS_SIZE		(XUSBPSU_EVENT_SIZE * \
+										XUSBPSU_EVENT_MAX_NUM)
+
+#define XUSBPSU_EVENT_TYPE_MASK                 0x000000feU
+
+#define XUSBPSU_EVENT_TYPE_DEV                  0U
+#define XUSBPSU_EVENT_TYPE_CARKIT               3U
+#define XUSBPSU_EVENT_TYPE_I2C                  4U
+
+#define XUSBPSU_DEVICE_EVENT_DISCONNECT         0U
+#define XUSBPSU_DEVICE_EVENT_RESET              1U
+#define XUSBPSU_DEVICE_EVENT_CONNECT_DONE       2U
+#define XUSBPSU_DEVICE_EVENT_LINK_STATUS_CHANGE 3U
+#define XUSBPSU_DEVICE_EVENT_WAKEUP             4U
+#define XUSBPSU_DEVICE_EVENT_HIBER_REQ          5U
+#define XUSBPSU_DEVICE_EVENT_EOPF               6U
+#define XUSBPSU_DEVICE_EVENT_SOF                7U
+#define XUSBPSU_DEVICE_EVENT_ERRATIC_ERROR      9U
+#define XUSBPSU_DEVICE_EVENT_CMD_CMPL           10U
+#define XUSBPSU_DEVICE_EVENT_OVERFLOW           11U
+
+#define XUSBPSU_GEVNTCOUNT_MASK                 0x0000fffcU
+
+/*
+ * Control Endpoint state
+ */
+#define	XUSBPSU_EP0_SETUP_PHASE				1U	/**< Setup Phase */
+#define	XUSBPSU_EP0_DATA_PHASE				2U	/**< Data Phase */
+#define	XUSBPSU_EP0_STATUS_PHASE			3U	/**< Status Pahse */
+
+/*
+ * Link State
+ */
+#define		XUSBPSU_LINK_STATE_MASK			0x0FU
+
+typedef enum {
+	XUSBPSU_LINK_STATE_U0 = 0x00U, /**< in HS - ON */
+	XUSBPSU_LINK_STATE_U1 =	0x01U,
+	XUSBPSU_LINK_STATE_U2 =	0x02U, /**< in HS - SLEEP */
+	XUSBPSU_LINK_STATE_U3 =	0x03U, /**< in HS - SUSPEND */
+	XUSBPSU_LINK_STATE_SS_DIS =	0x04U,
+	XUSBPSU_LINK_STATE_RX_DET =	0x05U,
+	XUSBPSU_LINK_STATE_SS_INACT = 0x06U,
+	XUSBPSU_LINK_STATE_POLL	=	0x07U,
+	XUSBPSU_LINK_STATE_RECOV =	0x08U,
+	XUSBPSU_LINK_STATE_HRESET =	0x09U,
+	XUSBPSU_LINK_STATE_CMPLY =	0x0AU,
+	XUSBPSU_LINK_STATE_LPBK	=	0x0BU,
+	XUSBPSU_LINK_STATE_RESET = 	0x0EU,
+	XUSBPSU_LINK_STATE_RESUME =	0x0FU,
+}XusbPsuLinkState;
+
+typedef enum {
+	XUSBPSU_LINK_STATE_CHANGE_U0 = 0x00U, /**< in HS - ON */
+	XUSBPSU_LINK_STATE_CHANGE_SS_DIS =	0x04U,
+	XUSBPSU_LINK_STATE_CHANGE_RX_DET =	0x05U,
+	XUSBPSU_LINK_STATE_CHANGE_SS_INACT = 0x06U,
+	XUSBPSU_LINK_STATE_CHANGE_RECOV =	0x08U,
+	XUSBPSU_LINK_STATE_CHANGE_CMPLY =	0x0AU,
+}XusbPsuLinkStateChange;
+
+/*
+ * Device States
+ */
+#define		XUSBPSU_STATE_ATTACHED			0U
+#define		XUSBPSU_STATE_POWERED			1U
+#define		XUSBPSU_STATE_DEFAULT			2U
+#define		XUSBPSU_STATE_ADDRESS			3U
+#define		XUSBPSU_STATE_CONFIGURED		4U
+#define		XUSBPSU_STATE_SUSPENDED			5U
+
+/*
+ * Device Speeds
+ */
+#define		XUSBPSU_SPEED_UNKNOWN			0U
+#define		XUSBPSU_SPEED_LOW				1U
+#define		XUSBPSU_SPEED_FULL				2U
+#define		XUSBPSU_SPEED_HIGH				3U
+#define		XUSBPSU_SPEED_SUPER				4U
+
+
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * Software Event buffer representation
+ */
+struct XUsbPsu_EvtBuffer {
+	void	*BuffAddr;
+	u32		Offset;
+	u32		Count;
+	u32		Flags;
+};
+
+/**
+ * Transfer Request Block - Hardware format
+ */
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+struct XUsbPsu_Trb {
+	u32		BufferPtrLow;
+	u32		BufferPtrHigh;
+	u32		Size;
+	u32		Ctrl;
+#if defined (__ICCARM__)
+};
+#pragma pack(pop)
+#else
+} __attribute__((packed));
+#endif
+
+/*
+ * Endpoint Parameters
+ */
+struct XUsbPsu_EpParams {
+	u32	Param2;		/**< Parameter 2 */
+	u32	Param1;		/**< Parameter 1 */
+	u32	Param0;		/**< Parameter 0 */
+};
+
+/**
+ * USB Standard Control Request
+ */
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+typedef struct {
+        u8  bRequestType;
+        u8  bRequest;
+        u16 wValue;
+        u16 wIndex;
+        u16 wLength;
+#if defined (__ICCARM__)
+}SetupPacket;
+#pragma pack(pop)
+#else
+} __attribute__ ((packed)) SetupPacket;
+#endif
+
+/**
+ * Endpoint representation
+ */
+struct XUsbPsu_Ep {
+	void (*Handler)(void *, u32, u32);
+						/** < User handler called
+						 *   when data is sent for IN Ep
+						 *   and received for OUT Ep
+						 */
+#if defined (__ICCARM__)
+    #pragma data_alignment = 64
+	struct XUsbPsu_Trb	EpTrb[NO_OF_TRB_PER_EP + 1]; /**< One extra Trb is for Link Trb */
+	#pragma data_alignment = 4
+#else
+	struct XUsbPsu_Trb	EpTrb[NO_OF_TRB_PER_EP + 1] ALIGNMENT_CACHELINE;/**< TRB used by endpoint */
+#endif
+	u32	EpStatus;		/**< Flags to represent Endpoint status */
+	u32	EpSavedState;	/**< Endpoint status saved at the time of hibernation */
+	u32	RequestedBytes;	/**< RequestedBytes for transfer */
+	u32	BytesTxed;		/**< Actual Bytes transferred */
+	u32	Interval;		/**< Data transfer service interval */
+	u32	TrbEnqueue;
+	u32	TrbDequeue;
+	u16	MaxSize;		/**< Size of endpoint */
+	u16	CurUf;			/**< current microframe */
+	u8	*BufferPtr;		/**< Buffer location */
+	u8	ResourceIndex;	/**< Resource Index assigned to
+						 *  Endpoint by core
+						 */
+	u8	PhyEpNum;		/**< Physical Endpoint Number in core */
+	u8	UsbEpNum;		/**< USB Endpoint Number */
+	u8	Type;			/**< Type of Endpoint -
+						 *	 Control/BULK/INTERRUPT/ISOC
+						 */
+	u8	Direction;		/**< Direction - EP_DIR_OUT/EP_DIR_IN */
+	u8	UnalignedTx;
+};
+
+/**
+ * This typedef contains configuration information for the USB
+ * device.
+ */
+typedef struct {
+        u16 DeviceId;		/**< Unique ID of controller */
+        u32 BaseAddress;	/**< Core register base address */
+		u8 IsCacheCoherent;	/**< Describes whether Cache Coherent or not */
+} XUsbPsu_Config;
+
+typedef XUsbPsu_Config Usb_Config;
+
+struct Usb_DevData {
+	u8 Speed;
+	u8 State;
+
+	void *PrivateData;
+};
+
+/**
+ * USB Device Controller representation
+ */
+struct XUsbPsu {
+#if defined (__ICCARM__)
+    #pragma data_alignment = 64
+	SetupPacket SetupData;
+	struct XUsbPsu_Trb Ep0_Trb;
+	#pragma data_alignment = 4
+#else
+	SetupPacket SetupData ALIGNMENT_CACHELINE;
+					/**< Setup Packet buffer */
+	struct XUsbPsu_Trb Ep0_Trb ALIGNMENT_CACHELINE;
+#endif
+					/**< TRB for control transfers */
+	XUsbPsu_Config *ConfigPtr;	/**< Configuration info pointer */
+	struct XUsbPsu_Ep eps[XUSBPSU_ENDPOINTS_NUM]; /**< Endpoints */
+	struct XUsbPsu_EvtBuffer Evt;
+	struct XUsbPsu_EpParams EpParams;
+	u32 BaseAddress;	/**< Core register base address */
+	u32 DevDescSize;
+	u32 ConfigDescSize;
+	struct Usb_DevData *AppData;
+	void (*Chapter9)(struct Usb_DevData *, SetupPacket *);
+	void (*ResetIntrHandler)(struct Usb_DevData *);
+	void (*DisconnectIntrHandler)(struct Usb_DevData *);
+	void *DevDesc;
+	void *ConfigDesc;
+#if defined(__ICCARM__)
+    #pragma data_alignment = XUSBPSU_EVENT_BUFFERS_SIZE
+	u8 EventBuffer[XUSBPSU_EVENT_BUFFERS_SIZE];
+	#pragma data_alignment = 4
+#else
+	u8 EventBuffer[XUSBPSU_EVENT_BUFFERS_SIZE]
+						__attribute__((aligned(XUSBPSU_EVENT_BUFFERS_SIZE)));
+#endif
+	u8 NumOutEps;
+	u8 NumInEps;
+	u8 ControlDir;
+	u8 IsInTestMode;
+	u8 TestMode;
+	u8 Ep0State;
+	u8 LinkState;
+	u8 UnalignedTx;
+	u8 IsConfigDone;
+	u8 IsThreeStage;
+	u8 IsHibernated;                /**< Hibernated state */
+	u8 HasHibernation;              /**< Has hibernation support */
+	void *data_ptr;		/* pointer for storing applications data */
+};
+
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+struct XUsbPsu_Event_Type {
+	u32	Is_DevEvt:1;
+	u32	Type:7;
+	u32	Reserved8_31:24;
+#if defined (__ICCARM__)
+};
+#pragma pack(pop)
+#else
+} __attribute__((packed));
+#endif
+/**
+ * struct XUsbPsu_event_depvt - Device Endpoint Events
+ * @Is_EpEvt: indicates this is an endpoint event
+ * @endpoint_number: number of the endpoint
+ * @endpoint_event: The event we have:
+ *	0x00	- Reserved
+ *	0x01	- XferComplete
+ *	0x02	- XferInProgress
+ *	0x03	- XferNotReady
+ *	0x04	- RxTxFifoEvt (IN->Underrun, OUT->Overrun)
+ *	0x05	- Reserved
+ *	0x06	- StreamEvt
+ *	0x07	- EPCmdCmplt
+ * @Reserved11_10: Reserved, don't use.
+ * @Status: Indicates the status of the event. Refer to databook for
+ *	more information.
+ * @Parameters: Parameters of the current event. Refer to databook for
+ *	more information.
+ */
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+struct XUsbPsu_Event_Epevt {
+	u32	Is_EpEvt:1;
+	u32	Epnumber:5;
+	u32	Endpoint_Event:4;
+	u32	Reserved11_10:2;
+	u32	Status:4;
+	u32	Parameters:16;
+#if defined (__ICCARM__)
+};
+#pragma pack(pop)
+#else
+} __attribute__((packed));
+#endif
+/**
+ * struct XUsbPsu_event_devt - Device Events
+ * @Is_DevEvt: indicates this is a non-endpoint event
+ * @Device_Event: indicates it's a device event. Should read as 0x00
+ * @Type: indicates the type of device event.
+ *	0	- DisconnEvt
+ *	1	- USBRst
+ *	2	- ConnectDone
+ *	3	- ULStChng
+ *	4	- WkUpEvt
+ *	5	- Reserved
+ *	6	- EOPF
+ *	7	- SOF
+ *	8	- Reserved
+ *	9	- ErrticErr
+ *	10	- CmdCmplt
+ *	11	- EvntOverflow
+ *	12	- VndrDevTstRcved
+ * @Reserved15_12: Reserved, not used
+ * @Event_Info: Information about this event
+ * @Reserved31_25: Reserved, not used
+ */
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+struct XUsbPsu_Event_Devt {
+	u32	Is_DevEvt:1;
+	u32	Device_Event:7;
+	u32	Type:4;
+	u32	Reserved15_12:4;
+	u32	Event_Info:9;
+	u32	Reserved31_25:7;
+#if defined (__ICCARM__)
+};
+#pragma pack(pop)
+#else
+} __attribute__((packed));
+#endif
+/**
+ * struct XUsbPsu_event_gevt - Other Core Events
+ * @one_bit: indicates this is a non-endpoint event (not used)
+ * @device_event: indicates it's (0x03) Carkit or (0x04) I2C event.
+ * @phy_port_number: self-explanatory
+ * @reserved31_12: Reserved, not used.
+ */
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+struct XUsbPsu_Event_Gevt {
+	u32	Is_GlobalEvt:1;
+	u32	Device_Event:7;
+	u32	Phy_Port_Number:4;
+	u32	Reserved31_12:20;
+#if defined (__ICCARM__)
+};
+#pragma pack(pop)
+#else
+} __attribute__((packed));
+#endif
+/**
+ * union XUsbPsu_event - representation of Event Buffer contents
+ * @raw: raw 32-bit event
+ * @type: the type of the event
+ * @depevt: Device Endpoint Event
+ * @devt: Device Event
+ * @gevt: Global Event
+ */
+union XUsbPsu_Event {
+	u32				Raw;
+	struct XUsbPsu_Event_Type	Type;
+	struct XUsbPsu_Event_Epevt	Epevt;
+	struct XUsbPsu_Event_Devt	Devt;
+	struct XUsbPsu_Event_Gevt	Gevt;
+};
+
+/***************** Macros (Inline Functions) Definitions *********************/
+#if defined (__ICCARM__)
+#define IS_ALIGNED(x, a)	(((x) & ((u32)(a) - 1)) == 0U)
+#else
+#define IS_ALIGNED(x, a)	(((x) & ((typeof(x))(a) - 1)) == 0U)
+#endif
+
+#if defined (__ICCARM__)
+#define roundup(x, y) (((((x) + (u32)(y - 1)) / (u32)y) * (u32)y))
+
+#else
+#define roundup(x, y) (                                 \
+        (((x) + (u32)((const typeof(y))y - 1)) / \
+			(u32)((const typeof(y))y)) * \
+				(u32)((const typeof(y))y)               \
+)
+#endif
+#define DECLARE_DEV_DESC(Instance, desc)			\
+	(Instance).DevDesc = &(desc); 					\
+	(Instance).DevDescSize = sizeof((desc))
+
+#define DECLARE_CONFIG_DESC(Instance, desc) 		\
+	(Instance).ConfigDesc = &(desc); 				\
+	(Instance).ConfigDescSize = sizeof((desc))
+
+static inline void *XUsbPsu_get_drvdata(struct XUsbPsu *InstancePtr) {
+	return InstancePtr->data_ptr;
+}
+
+static inline void XUsbPsu_set_drvdata(struct XUsbPsu *InstancePtr, void *data) {
+	InstancePtr->data_ptr = data;
+}
+
+static inline void XUsbPsu_set_ch9handler(
+		struct XUsbPsu *InstancePtr,
+		void (*func)(struct Usb_DevData *, SetupPacket *)) {
+	InstancePtr->Chapter9 = func;
+}
+
+static inline void XUsbPsu_set_rsthandler(
+		struct XUsbPsu *InstancePtr,
+		void (*func)(struct Usb_DevData *)) {
+	InstancePtr->ResetIntrHandler = func;
+}
+
+static inline void XUsbPsu_set_disconnect(
+		struct XUsbPsu *InstancePtr,
+		void (*func)(struct Usb_DevData *)) {
+	InstancePtr->DisconnectIntrHandler = func;
+}
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Functions in xusbpsu.c
+ */
+s32 XUsbPsu_Wait_Clear_Timeout(struct XUsbPsu *InstancePtr, u32 Offset,
+								u32 BitMask, u32 Timeout);
+s32 XUsbPsu_Wait_Set_Timeout(struct XUsbPsu *InstancePtr, u32 Offset,
+								u32 BitMask, u32 Timeout);
+void XUsbPsu_SetMode(struct XUsbPsu *InstancePtr, u32 Mode);
+void XUsbPsu_PhyReset(struct XUsbPsu *InstancePtr);
+void XUsbPsu_EventBuffersSetup(struct XUsbPsu *InstancePtr);
+void XUsbPsu_EventBuffersReset(struct XUsbPsu *InstancePtr);
+void XUsbPsu_CoreNumEps(struct XUsbPsu *InstancePtr);
+void XUsbPsu_cache_hwparams(struct XUsbPsu *InstancePtr);
+u32 XUsbPsu_ReadHwParams(struct XUsbPsu *InstancePtr, u8 RegIndex);
+s32 XUsbPsu_CoreInit(struct XUsbPsu *InstancePtr);
+void XUsbPsu_EnableIntr(struct XUsbPsu *InstancePtr, u32 Mask);
+void XUsbPsu_DisableIntr(struct XUsbPsu *InstancePtr, u32 Mask);
+s32 XUsbPsu_CfgInitialize(struct XUsbPsu *InstancePtr,
+			XUsbPsu_Config *ConfigPtr, u32 BaseAddress);
+s32 XUsbPsu_Start(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_Stop(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_SetTestMode(struct XUsbPsu *InstancePtr, u32 Mode);
+XusbPsuLinkState XUsbPsu_GetLinkState(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_SetLinkState(struct XUsbPsu *InstancePtr,
+		XusbPsuLinkStateChange State);
+s32 XUsbPsu_SendGenericCmd(struct XUsbPsu *InstancePtr,
+					s32 Cmd, u32 Param);
+void XUsbPsu_SetSpeed(struct XUsbPsu *InstancePtr, u32 Speed);
+s32 XUsbPsu_SetDeviceAddress(struct XUsbPsu *InstancePtr, u16 Addr);
+s32 XUsbPsu_SetU1SleepTimeout(struct XUsbPsu *InstancePtr, u8 Sleep);
+s32 XUsbPsu_SetU2SleepTimeout(struct XUsbPsu *InstancePtr, u8 Sleep);
+s32 XUsbPsu_AcceptU1U2Sleep(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_U1SleepEnable(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_U2SleepEnable(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_U1SleepDisable(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_U2SleepDisable(struct XUsbPsu *InstancePtr);
+
+/*
+ * Functions in xusbpsu_endpoint.c
+ */
+struct XUsbPsu_EpParams *XUsbPsu_GetEpParams(struct XUsbPsu *InstancePtr);
+u32 XUsbPsu_EpGetTransferIndex(struct XUsbPsu *InstancePtr, u8 UsbEpNum,
+				u8 Dir);
+s32 XUsbPsu_SendEpCmd(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
+			u32 Cmd, struct XUsbPsu_EpParams *Params);
+s32 XUsbPsu_StartEpConfig(struct XUsbPsu *InstancePtr, u32 UsbEpNum,
+				u8 Dir);
+s32 XUsbPsu_SetEpConfig(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
+				u16 Size, u8 Type, u8 Restore);
+s32 XUsbPsu_SetXferResource(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir);
+s32 XUsbPsu_EpEnable(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
+				u16 Maxsize, u8 Type, u8 Restore);
+s32 XUsbPsu_EpDisable(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir);
+s32 XUsbPsu_EnableControlEp(struct XUsbPsu *InstancePtr, u16 Size);
+void XUsbPsu_InitializeEps(struct XUsbPsu *InstancePtr);
+void XUsbPsu_StopTransfer(struct XUsbPsu *InstancePtr, u8 UsbEpNum,
+				u8 Dir, u8 Force);
+void XUsbPsu_SaveEndpointState(struct XUsbPsu *InstancePtr,
+				struct XUsbPsu_Ep *Ept);
+void XUsbPsu_ClearStalls(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_EpBufferSend(struct XUsbPsu *InstancePtr, u8 UsbEp,
+				u8 *BufferPtr, u32 BufferLen);
+s32 XUsbPsu_EpBufferRecv(struct XUsbPsu *InstancePtr, u8 UsbEp,
+				u8 *BufferPtr, u32 Length);
+void XUsbPsu_EpSetStall(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir);
+void XUsbPsu_EpClearStall(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir);
+void XUsbPsu_SetEpHandler(struct XUsbPsu *InstancePtr, u8 Epnum,
+			u8 Dir, void (*Handler)(void *, u32, u32));
+s32 XUsbPsu_IsEpStalled(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir);
+void XUsbPsu_EpXferComplete(struct XUsbPsu *InstancePtr,
+							const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_EpXferNotReady(struct XUsbPsu *InstancePtr,
+							const struct XUsbPsu_Event_Epevt *Event);
+
+/*
+ * Functions in xusbpsu_controltransfers.c
+ */
+s32 XUsbPsu_RecvSetup(struct XUsbPsu *InstancePtr);
+void XUsbPsu_Ep0StallRestart(struct XUsbPsu *InstancePtr);
+void XUsbPsu_Ep0DataDone(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_Ep0StatusDone(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_Ep0XferComplete(struct XUsbPsu *InstancePtr,
+			const struct XUsbPsu_Event_Epevt *Event);
+s32 XUsbPsu_Ep0StartStatus(struct XUsbPsu *InstancePtr,
+				const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_Ep0_EndControlData(struct XUsbPsu *InstancePtr,
+					struct XUsbPsu_Ep *Ept);
+void XUsbPsu_Ep0XferNotReady(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_Ep0Intr(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event);
+s32 XUsbPsu_Ep0Send(struct XUsbPsu *InstancePtr, u8 *BufferPtr,
+			u32 BufferLen);
+s32 XUsbPsu_Ep0Recv(struct XUsbPsu *InstancePtr, u8 *BufferPtr, u32 Length);
+void XUsbSleep(u32 USeconds);
+
+/*
+ * Functions in xusbpsu_intr.c
+ */
+void XUsbPsu_EpInterrupt(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event);
+void XUsbPsu_DisconnectIntr(struct XUsbPsu *InstancePtr);
+void XUsbPsu_ResetIntr(struct XUsbPsu *InstancePtr);
+void XUsbPsu_ConnDoneIntr(struct XUsbPsu *InstancePtr);
+void XUsbPsu_LinkStsChangeIntr(struct XUsbPsu *InstancePtr,
+				u32 EvtInfo);
+void XUsbPsu_DevInterrupt(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Devt *Event);
+void XUsbPsu_EventHandler(struct XUsbPsu *InstancePtr,
+                const union XUsbPsu_Event *Event);
+void XUsbPsu_EventBufferHandler(struct XUsbPsu *InstancePtr);
+void XUsbPsu_IntrHandler(void *XUsbPsuInstancePtr);
+
+#ifdef XUSBPSU_HIBERNATION_ENABLE
+void XUsbPsu_InitHibernation(struct XUsbPsu *InstancePtr);
+void Xusbpsu_HibernationIntr(struct XUsbPsu *InstancePtr);
+void XUsbPsu_WakeUpIntrHandler(void *XUsbPsuInstancePtr);
+void XUsbPsu_WakeupIntr(struct XUsbPsu *InstancePtr);
+s32 XUsbPsu_SetupScratchpad(struct XUsbPsu *InstancePtr);
+#endif
+
+/*
+ * Functions in xusbpsu_sinit.c
+ */
+XUsbPsu_Config *XUsbPsu_LookupConfig(u16 DeviceId);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* End of protection macro. */
+/** @} */
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_controltransfers.c b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_controltransfers.c
new file mode 100644
index 0000000..19be417
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_controltransfers.c
@@ -0,0 +1,694 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xusbpsu_controltransfers.c
+* @addtogroup usbpsu_v1_0
+* @{
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.0   sg  06/06/16 First release
+* 1.3	vak 04/03/17 Added CCI support for USB
+* 1.4	bk  12/01/18 Modify USBPSU driver code to fit USB common example code
+*		     for all USB IPs.
+*
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xusbpsu_endpoint.h"
+#include "sleep.h"
+#include "xusb_wrapper.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+/****************************************************************************/
+/**
+* Initiates DMA on Control Endpoint 0 to receive Setup packet.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	XST_SUCCESS else XST_FAILURE.
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_RecvSetup(struct XUsbPsu *InstancePtr)
+{
+	struct XUsbPsu_EpParams *Params;
+	struct XUsbPsu_Trb	*TrbPtr;
+	struct XUsbPsu_Ep	*Ept;
+	s32	Ret;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertNonvoid(Params != NULL);
+
+	/* Setup packet always on EP0 */
+	Ept = &InstancePtr->eps[0];
+	if ((Ept->EpStatus & XUSBPSU_EP_BUSY) != 0U) {
+		return (s32)XST_FAILURE;
+	}
+
+	TrbPtr = &InstancePtr->Ep0_Trb;
+
+	TrbPtr->BufferPtrLow = (UINTPTR)&InstancePtr->SetupData;
+	TrbPtr->BufferPtrHigh = ((UINTPTR)&InstancePtr->SetupData >> 16) >> 16;
+	TrbPtr->Size = 8U;
+	TrbPtr->Ctrl = XUSBPSU_TRBCTL_CONTROL_SETUP;
+
+	TrbPtr->Ctrl |= (XUSBPSU_TRB_CTRL_HWO
+			| XUSBPSU_TRB_CTRL_LST
+			| XUSBPSU_TRB_CTRL_IOC
+			| XUSBPSU_TRB_CTRL_ISP_IMI);
+
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+		Xil_DCacheFlushRange((INTPTR)TrbPtr, sizeof(struct XUsbPsu_Trb));
+		Xil_DCacheFlushRange((UINTPTR)&InstancePtr->SetupData, sizeof(SetupPacket));
+	}
+
+	Params->Param0 = 0U;
+	Params->Param1 = (UINTPTR)TrbPtr;
+
+	InstancePtr->Ep0State = XUSBPSU_EP0_SETUP_PHASE;
+
+	Ret = XUsbPsu_SendEpCmd(InstancePtr, 0U, XUSBPSU_EP_DIR_OUT,
+				XUSBPSU_DEPCMD_STARTTRANSFER, Params);
+	if (Ret != XST_SUCCESS) {
+		return (s32)XST_FAILURE;
+	}
+
+	Ept->EpStatus |= XUSBPSU_EP_BUSY;
+	Ept->ResourceIndex = (u8)XUsbPsu_EpGetTransferIndex(InstancePtr,
+						Ept->UsbEpNum, Ept->Direction);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Stalls Control Endpoint and restarts to receive Setup packet.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	None
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_Ep0StallRestart(struct XUsbPsu *InstancePtr)
+{
+	struct XUsbPsu_Ep		*Ept;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	/* reinitialize physical ep1 */
+	Ept = &InstancePtr->eps[1];
+	Ept->EpStatus = XUSBPSU_EP_ENABLED;
+
+	/* stall is always issued on EP0 */
+	XUsbPsu_EpSetStall(InstancePtr, 0U, XUSBPSU_EP_DIR_OUT);
+
+	Ept = &InstancePtr->eps[0];
+	Ept->EpStatus = XUSBPSU_EP_ENABLED;
+	InstancePtr->Ep0State = XUSBPSU_EP0_SETUP_PHASE;
+	(void)XUsbPsu_RecvSetup(InstancePtr);
+}
+
+/****************************************************************************/
+/**
+* Checks the Data Phase and calls user Endpoint handler.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is a pointer to the Endpoint event occured in core.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_Ep0DataDone(struct XUsbPsu *InstancePtr,
+						 const struct XUsbPsu_Event_Epevt *Event)
+{
+	struct XUsbPsu_Ep	*Ept;
+	struct XUsbPsu_Trb	*TrbPtr;
+	u32	Status;
+	u32	Length;
+	u32	Epnum;
+	u8	Dir;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Event != NULL);
+
+	Epnum = Event->Epnumber;
+	Dir = (u8)(!!Epnum);
+	Ept = &InstancePtr->eps[Epnum];
+	TrbPtr = &InstancePtr->Ep0_Trb;
+
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0)
+		Xil_DCacheInvalidateRange((INTPTR)TrbPtr, sizeof(struct XUsbPsu_Trb));
+
+	Status = XUSBPSU_TRB_SIZE_TRBSTS(TrbPtr->Size);
+	if (Status == XUSBPSU_TRBSTS_SETUP_PENDING) {
+		return;
+	}
+
+	Length = TrbPtr->Size & XUSBPSU_TRB_SIZE_MASK;
+
+	if (Length == 0U) {
+		Ept->BytesTxed = Ept->RequestedBytes;
+	} else {
+		if (Dir == XUSBPSU_EP_DIR_IN) {
+			Ept->BytesTxed = Ept->RequestedBytes - Length;
+		} else {
+			if ((Dir == XUSBPSU_EP_DIR_OUT) && (Ept->UnalignedTx == 1U)) {
+					Ept->BytesTxed = Ept->RequestedBytes;
+					Ept->UnalignedTx = 0U;
+			}
+		}
+	}
+
+	if (Dir == XUSBPSU_EP_DIR_OUT) {
+		/* Invalidate Cache */
+		if (InstancePtr->ConfigPtr->IsCacheCoherent == 0)
+			Xil_DCacheInvalidateRange((INTPTR)Ept->BufferPtr, Ept->BytesTxed);
+	}
+
+	if (Ept->Handler != NULL) {
+		Ept->Handler(InstancePtr->AppData, Ept->RequestedBytes, Ept->BytesTxed);
+	}
+}
+
+/****************************************************************************/
+/**
+* Checks the Status Phase and starts next Control transfer.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is a pointer to the Endpoint event occured in core.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_Ep0StatusDone(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event)
+{
+	struct XUsbPsu_Trb	*TrbPtr;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Event != NULL);
+
+	TrbPtr = &InstancePtr->Ep0_Trb;
+
+	if (InstancePtr->IsInTestMode != 0U) {
+		s32 Ret;
+
+		Ret = XUsbPsu_SetTestMode(InstancePtr,
+					InstancePtr->TestMode);
+		if (Ret < 0) {
+			XUsbPsu_Ep0StallRestart(InstancePtr);
+			return;
+		}
+	}
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0)
+		Xil_DCacheInvalidateRange((INTPTR)TrbPtr, sizeof(struct XUsbPsu_Trb));
+
+	(void)XUsbPsu_RecvSetup(InstancePtr);
+}
+
+/****************************************************************************/
+/**
+* Handles Transfer complete event of Control Endpoints EP0 OUT and EP0 IN.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is a pointer to the Endpoint event occured in core.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_Ep0XferComplete(struct XUsbPsu *InstancePtr,
+							 const struct XUsbPsu_Event_Epevt *Event)
+{
+	struct XUsbPsu_Ep *Ept;
+	SetupPacket *Ctrl;
+	u16 Length;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Event != NULL);
+
+	Ept = &InstancePtr->eps[Event->Epnumber];
+	Ctrl = &InstancePtr->SetupData;
+
+	Ept->EpStatus &= ~XUSBPSU_EP_BUSY;
+	Ept->ResourceIndex = 0U;
+
+	switch (InstancePtr->Ep0State) {
+	case XUSBPSU_EP0_SETUP_PHASE:
+		if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+			Xil_DCacheInvalidateRange((INTPTR)&InstancePtr->SetupData,
+					sizeof(InstancePtr->SetupData));
+		}
+		Length = Ctrl->wLength;
+		if (Length == 0U) {
+			InstancePtr->IsThreeStage = 0U;
+			InstancePtr->ControlDir = XUSBPSU_EP_DIR_OUT;
+		} else {
+			InstancePtr->IsThreeStage = 1U;
+			InstancePtr->ControlDir = !!(Ctrl->bRequestType &
+							USB_DIR_IN);
+		}
+
+		Xil_AssertVoid(InstancePtr->Chapter9 != NULL);
+
+		InstancePtr->Chapter9(InstancePtr->AppData,
+									&InstancePtr->SetupData);
+		break;
+
+	case XUSBPSU_EP0_DATA_PHASE:
+		XUsbPsu_Ep0DataDone(InstancePtr, Event);
+		break;
+
+	case XUSBPSU_EP0_STATUS_PHASE:
+		XUsbPsu_Ep0StatusDone(InstancePtr, Event);
+		break;
+
+	default:
+		/* Default case is a required MISRA-C guideline. */
+		break;
+	}
+}
+
+/****************************************************************************/
+/**
+* Starts Status Phase of Control Transfer
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is a pointer to the Endpoint event occured in core.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_Ep0StartStatus(struct XUsbPsu *InstancePtr,
+				const struct XUsbPsu_Event_Epevt *Event)
+{
+	struct XUsbPsu_Ep  *Ept;
+	struct XUsbPsu_EpParams *Params;
+	struct XUsbPsu_Trb *TrbPtr;
+	u32 Type;
+	s32 Ret;
+	u8 Dir;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Event != NULL);
+
+	Ept = &InstancePtr->eps[Event->Epnumber];
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertNonvoid(Params != NULL);
+	if ((Ept->EpStatus & XUSBPSU_EP_BUSY) != 0U) {
+		return (s32)XST_FAILURE;
+	}
+
+	Type = (InstancePtr->IsThreeStage != 0U) ? XUSBPSU_TRBCTL_CONTROL_STATUS3
+					: XUSBPSU_TRBCTL_CONTROL_STATUS2;
+	TrbPtr = &InstancePtr->Ep0_Trb;
+	/* we use same TrbPtr for setup packet */
+	TrbPtr->BufferPtrLow = (UINTPTR)&InstancePtr->SetupData;
+	TrbPtr->BufferPtrHigh = ((UINTPTR)&InstancePtr->SetupData >> 16) >> 16;
+	TrbPtr->Size = 0U;
+	TrbPtr->Ctrl = Type;
+
+	TrbPtr->Ctrl |= (XUSBPSU_TRB_CTRL_HWO
+			| XUSBPSU_TRB_CTRL_LST
+			| XUSBPSU_TRB_CTRL_IOC
+			| XUSBPSU_TRB_CTRL_ISP_IMI);
+
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+		Xil_DCacheFlushRange((INTPTR)TrbPtr, sizeof(struct XUsbPsu_Trb));
+	}
+
+	Params->Param0 = 0U;
+	Params->Param1 = (UINTPTR)TrbPtr;
+
+	InstancePtr->Ep0State = XUSBPSU_EP0_STATUS_PHASE;
+
+	/*
+	 * Control OUT transfer - Status stage happens on EP0 IN - EP1
+	 * Control IN transfer - Status stage happens on EP0 OUT - EP0
+	 */
+	Dir = !InstancePtr->ControlDir;
+
+	Ret = XUsbPsu_SendEpCmd(InstancePtr, 0U, Dir,
+							XUSBPSU_DEPCMD_STARTTRANSFER, Params);
+	if (Ret != XST_SUCCESS) {
+		return (s32)XST_FAILURE;
+	}
+
+	Ept->EpStatus |= XUSBPSU_EP_BUSY;
+	Ept->ResourceIndex = (u8)XUsbPsu_EpGetTransferIndex(InstancePtr,
+							Ept->UsbEpNum, Ept->Direction);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Ends Data Phase - used incase of error.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Dep is a pointer to the Endpoint structure.
+*
+* @return	None
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_Ep0_EndControlData(struct XUsbPsu *InstancePtr,
+								struct XUsbPsu_Ep *Ept)
+{
+	struct XUsbPsu_EpParams *Params;
+	u32	Cmd;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Ept != NULL);
+
+	if (Ept->ResourceIndex == 0U) {
+		return;
+	}
+
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertVoid(Params != NULL);
+
+	Cmd = XUSBPSU_DEPCMD_ENDTRANSFER;
+	Cmd |= XUSBPSU_DEPCMD_PARAM(Ept->ResourceIndex);
+	(void)XUsbPsu_SendEpCmd(InstancePtr, Ept->UsbEpNum, Ept->Direction,
+						Cmd, Params);
+	Ept->ResourceIndex = 0U;
+	XUsbSleep(200U);
+}
+
+/****************************************************************************/
+/**
+* Handles Transfer Not Ready event of Control Endpoints EP0 OUT and EP0 IN.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is a pointer to the Endpoint event occured in core.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_Ep0XferNotReady(struct XUsbPsu *InstancePtr,
+							 const struct XUsbPsu_Event_Epevt *Event)
+{
+	struct XUsbPsu_Ep *Ept;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Event != NULL);
+
+	Ept = &InstancePtr->eps[Event->Epnumber];
+
+	switch (Event->Status) {
+	case DEPEVT_STATUS_CONTROL_DATA:
+		/*
+		 * We already have a DATA transfer in the controller's cache,
+		 * if we receive a XferNotReady(DATA) we will ignore it, unless
+		 * it's for the wrong direction.
+		 *
+		 * In that case, we must issue END_TRANSFER command to the Data
+		 * Phase we already have started and issue SetStall on the
+		 * control endpoint.
+		 */
+		if (Event->Epnumber != InstancePtr->ControlDir) {
+			XUsbPsu_Ep0_EndControlData(InstancePtr, Ept);
+			XUsbPsu_Ep0StallRestart(InstancePtr);
+		}
+		break;
+
+	case DEPEVT_STATUS_CONTROL_STATUS:
+		(void)XUsbPsu_Ep0StartStatus(InstancePtr, Event);
+		break;
+
+	default:
+		/* Default case is a required MIRSA-C guideline. */
+		break;
+	}
+}
+
+/****************************************************************************/
+/**
+* Handles Interrupts of Control Endpoints EP0 OUT and EP0 IN.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is a pointer to the Endpoint event occured in core.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_Ep0Intr(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event)
+{
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Event != NULL);
+
+	switch (Event->Endpoint_Event) {
+	case XUSBPSU_DEPEVT_XFERCOMPLETE:
+		XUsbPsu_Ep0XferComplete(InstancePtr, Event);
+		break;
+
+	case XUSBPSU_DEPEVT_XFERNOTREADY:
+		XUsbPsu_Ep0XferNotReady(InstancePtr, Event);
+		break;
+
+	case XUSBPSU_DEPEVT_XFERINPROGRESS:
+	case XUSBPSU_DEPEVT_STREAMEVT:
+	case XUSBPSU_DEPEVT_EPCMDCMPLT:
+		break;
+
+	default:
+		/* Default case is a required MIRSA-C guideline. */
+		break;
+	}
+}
+
+/****************************************************************************/
+/**
+* Initiates DMA to send data on Control Endpoint EP0 IN to Host.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	BufferPtr is pointer to data.
+* @param	BufferLen is Length of data buffer.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_Ep0Send(struct XUsbPsu *InstancePtr, u8 *BufferPtr, u32 BufferLen)
+{
+	/* Control IN - EP1 */
+	struct XUsbPsu_EpParams *Params;
+	struct XUsbPsu_Ep 	*Ept;
+	struct XUsbPsu_Trb	*TrbPtr;
+	s32 Ret;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(BufferPtr != NULL);
+
+	Ept = &InstancePtr->eps[1];
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertNonvoid(Params != NULL);
+
+	if ((Ept->EpStatus & XUSBPSU_EP_BUSY) != 0U) {
+		return (s32)XST_FAILURE;
+	}
+
+	Ept->RequestedBytes = BufferLen;
+	Ept->BytesTxed = 0U;
+	Ept->BufferPtr = BufferPtr;
+
+	TrbPtr = &InstancePtr->Ep0_Trb;
+
+	TrbPtr->BufferPtrLow  = (UINTPTR)BufferPtr;
+	TrbPtr->BufferPtrHigh  = ((UINTPTR)BufferPtr >> 16) >> 16;
+	TrbPtr->Size = BufferLen;
+	TrbPtr->Ctrl = XUSBPSU_TRBCTL_CONTROL_DATA;
+
+	TrbPtr->Ctrl |= (XUSBPSU_TRB_CTRL_HWO
+			| XUSBPSU_TRB_CTRL_LST
+			| XUSBPSU_TRB_CTRL_IOC
+			| XUSBPSU_TRB_CTRL_ISP_IMI);
+
+	Params->Param0 = 0U;
+	Params->Param1 = (UINTPTR)TrbPtr;
+
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+		Xil_DCacheFlushRange((INTPTR)TrbPtr, sizeof(struct XUsbPsu_Trb));
+		Xil_DCacheFlushRange((INTPTR)BufferPtr, BufferLen);
+	}
+
+	InstancePtr->Ep0State = XUSBPSU_EP0_DATA_PHASE;
+
+	Ret = XUsbPsu_SendEpCmd(InstancePtr, 0U, XUSBPSU_EP_DIR_IN,
+							XUSBPSU_DEPCMD_STARTTRANSFER, Params);
+	if (Ret != XST_SUCCESS) {
+		return (s32)XST_FAILURE;
+	}
+
+	Ept->EpStatus |= XUSBPSU_EP_BUSY;
+	Ept->ResourceIndex = (u8)XUsbPsu_EpGetTransferIndex(InstancePtr,
+						Ept->UsbEpNum, Ept->Direction);
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Initiates DMA to receive data on Control Endpoint EP0 OUT from Host.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	BufferPtr is pointer to data.
+* @param	Length is Length of data to be received.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_Ep0Recv(struct XUsbPsu *InstancePtr, u8 *BufferPtr, u32 Length)
+{
+	struct XUsbPsu_EpParams *Params;
+	struct XUsbPsu_Ep 	*Ept;
+	struct XUsbPsu_Trb	*TrbPtr;
+	u32 Size;
+	s32 Ret;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(BufferPtr != NULL);
+
+	Ept = &InstancePtr->eps[0];
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertNonvoid(Params != NULL);
+
+	if ((Ept->EpStatus & XUSBPSU_EP_BUSY) != 0U) {
+		return (s32)XST_FAILURE;
+	}
+
+	Ept->RequestedBytes = Length;
+	Size = Length;
+	Ept->BytesTxed = 0U;
+	Ept->BufferPtr = BufferPtr;
+
+	/*
+	 * 8.2.5 - An OUT transfer size (Total TRB buffer allocation)
+	 * must be a multiple of MaxPacketSize even if software is expecting a
+	 * fixed non-multiple of MaxPacketSize transfer from the Host.
+	 */
+	if (!IS_ALIGNED(Length, Ept->MaxSize)) {
+		Size = (u32)roundup(Length, Ept->MaxSize);
+		Ept->UnalignedTx = 1U;
+	}
+
+	TrbPtr = &InstancePtr->Ep0_Trb;
+
+	TrbPtr->BufferPtrLow = (UINTPTR)BufferPtr;
+	TrbPtr->BufferPtrHigh = ((UINTPTR)BufferPtr >> 16) >> 16;
+	TrbPtr->Size = Size;
+	TrbPtr->Ctrl = XUSBPSU_TRBCTL_CONTROL_DATA;
+
+	TrbPtr->Ctrl |= (XUSBPSU_TRB_CTRL_HWO
+			| XUSBPSU_TRB_CTRL_LST
+			| XUSBPSU_TRB_CTRL_IOC
+			| XUSBPSU_TRB_CTRL_ISP_IMI);
+
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+		Xil_DCacheFlushRange((INTPTR)TrbPtr, sizeof(struct XUsbPsu_Trb));
+		Xil_DCacheInvalidateRange((INTPTR)BufferPtr, Length);
+	}
+
+	Params->Param0 = 0U;
+	Params->Param1 = (UINTPTR)TrbPtr;
+
+	InstancePtr->Ep0State = XUSBPSU_EP0_DATA_PHASE;
+
+	Ret = XUsbPsu_SendEpCmd(InstancePtr, 0U, XUSBPSU_EP_DIR_OUT,
+				XUSBPSU_DEPCMD_STARTTRANSFER, Params);
+	if (Ret != XST_SUCCESS) {
+		return (s32)XST_FAILURE;
+	}
+
+	Ept->EpStatus |= XUSBPSU_EP_BUSY;
+	Ept->ResourceIndex = (u8)XUsbPsu_EpGetTransferIndex(InstancePtr,
+							Ept->UsbEpNum, Ept->Direction);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+*
+* API for Sleep routine.
+*
+* @param	USeconds is time in MicroSeconds.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XUsbSleep(u32 USeconds) {
+	(void)usleep(USeconds);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_endpoint.c b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_endpoint.c
new file mode 100644
index 0000000..42e4108
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_endpoint.c
@@ -0,0 +1,1177 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*****************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xusbpsu_endpoint.c
+* @addtogroup usbpsu_v1_3
+* @{
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.0   sg  06/06/16 First release
+* 1.3   vak 04/03/17 Added CCI support for USB
+* 1.4	bk  12/01/18 Modify USBPSU driver code to fit USB common example code
+*		       for all USB IPs
+*	myk 12/01/18 Added hibernation support for device mode
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xusbpsu_endpoint.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+/****************************************************************************/
+/**
+* Returns zeroed parameters to be used by Endpoint commands
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	Zeroed Params structure pointer.
+*
+* @note		None.
+*
+*****************************************************************************/
+struct XUsbPsu_EpParams *XUsbPsu_GetEpParams(struct XUsbPsu *InstancePtr)
+{
+	if (InstancePtr == NULL) {
+		return NULL;
+	}
+
+	InstancePtr->EpParams.Param0 = 0x00U;
+	InstancePtr->EpParams.Param1 = 0x00U;
+	InstancePtr->EpParams.Param2 = 0x00U;
+
+	return &InstancePtr->EpParams;
+}
+
+/****************************************************************************/
+/**
+* Returns Transfer Index assigned by Core for an Endpoint transfer.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	UsbEpNum is USB endpoint number.
+* @param	Dir is direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT
+*
+* @return	Transfer Resource Index.
+*
+* @note		None.
+*
+*****************************************************************************/
+u32 XUsbPsu_EpGetTransferIndex(struct XUsbPsu *InstancePtr, u8 UsbEpNum,
+								u8 Dir)
+{
+	u8 PhyEpNum;
+	u32 ResourceIndex;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(UsbEpNum <= (u8)16U);
+	Xil_AssertNonvoid((Dir == XUSBPSU_EP_DIR_IN) ||
+						(Dir == XUSBPSU_EP_DIR_OUT));
+
+	PhyEpNum = (u8)PhysicalEp(UsbEpNum, Dir);
+	ResourceIndex = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DEPCMD(PhyEpNum));
+
+	return (u32)XUSBPSU_DEPCMD_GET_RSC_IDX(ResourceIndex);
+}
+
+/****************************************************************************/
+/**
+* Sends Endpoint command to Endpoint.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	UsbEpNum is USB endpoint number.
+* @param	Dir is direction of endpoint
+*			- XUSBPSU_EP_DIR_IN/ XUSBPSU_EP_DIR_OUT.
+* @param	Cmd is Endpoint command.
+* @param	Params is Endpoint command parameters.
+*
+* @return	XST_SUCCESS else XST_FAILURE.
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_SendEpCmd(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
+					  u32 Cmd, struct XUsbPsu_EpParams *Params)
+{
+	u32	PhyEpNum;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(UsbEpNum <= (u8)16U);
+	Xil_AssertNonvoid((Dir == XUSBPSU_EP_DIR_IN) ||
+					  (Dir == XUSBPSU_EP_DIR_OUT));
+
+	PhyEpNum = PhysicalEp(UsbEpNum, Dir);
+
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DEPCMDPAR0(PhyEpNum),
+					 Params->Param0);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DEPCMDPAR1(PhyEpNum),
+					 Params->Param1);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DEPCMDPAR2(PhyEpNum),
+					 Params->Param2);
+
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DEPCMD(PhyEpNum),
+			Cmd | XUSBPSU_DEPCMD_CMDACT);
+
+	if (XUsbPsu_Wait_Clear_Timeout(InstancePtr, XUSBPSU_DEPCMD(PhyEpNum),
+			XUSBPSU_DEPCMD_CMDACT, 500U) == (s32)XST_FAILURE) {
+		return XST_FAILURE;
+	}
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Sends Start New Configuration command to Endpoint.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	UsbEpNum is USB endpoint number.
+* @param	Dir is direction of endpoint
+*			- XUSBPSU_EP_DIR_IN/ XUSBPSU_EP_DIR_OUT.
+*
+* @return	XST_SUCCESS else XST_FAILURE.
+*
+* @note
+* 			As per data book this command should be issued by software
+*			under these conditions:
+*				1. After power-on-reset with XferRscIdx=0 before starting
+*				   to configure Physical Endpoints 0 and 1.
+*				2. With XferRscIdx=2 before starting to configure
+*				   Physical Endpoints > 1
+*				3. This command should always be issued to
+*				   Endpoint 0 (DEPCMD0).
+*
+*****************************************************************************/
+s32 XUsbPsu_StartEpConfig(struct XUsbPsu *InstancePtr, u32 UsbEpNum, u8 Dir)
+{
+	struct XUsbPsu_EpParams *Params;
+	u32	Cmd;
+	u8 PhyEpNum;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(UsbEpNum <= (u32)16U);
+	Xil_AssertNonvoid((Dir == XUSBPSU_EP_DIR_IN) ||
+					  (Dir == XUSBPSU_EP_DIR_OUT));
+
+	PhyEpNum = (u8)PhysicalEp(UsbEpNum, (u32)Dir);
+	Params =  XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertNonvoid(Params != NULL);
+
+	if (PhyEpNum != 1U) {
+		Cmd = XUSBPSU_DEPCMD_DEPSTARTCFG;
+		/* XferRscIdx == 0 for EP0 and 2 for the remaining */
+		if (PhyEpNum > 1U) {
+			if (InstancePtr->IsConfigDone != 0U) {
+				return XST_SUCCESS;
+			}
+			InstancePtr->IsConfigDone = 1U;
+			Cmd |= XUSBPSU_DEPCMD_PARAM(2);
+		}
+
+		return XUsbPsu_SendEpCmd(InstancePtr, 0U, XUSBPSU_EP_DIR_OUT,
+								 Cmd, Params);
+	}
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Sends Set Endpoint Configuration command to Endpoint.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	UsbEpNum is USB endpoint number.
+* @param	Dir is direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
+* @param	Size is size of Endpoint size.
+* @param	Type is Endpoint type Control/Bulk/Interrupt/Isoc.
+* @param	Restore should be true if saved state should be restored;
+*			typically this would be false
+*
+* @return	XST_SUCCESS else XST_FAILURE.
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_SetEpConfig(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
+						u16 Size, u8 Type, u8 Restore)
+{
+	struct XUsbPsu_Ep *Ept;
+	struct XUsbPsu_EpParams *Params;
+	u8 PhyEpNum;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(UsbEpNum <= (u8)16U);
+	Xil_AssertNonvoid((Dir == XUSBPSU_EP_DIR_IN) ||
+						(Dir == XUSBPSU_EP_DIR_OUT));
+	Xil_AssertNonvoid((Size >= 64U) && (Size <= 1024U));
+
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertNonvoid(Params != NULL);
+
+	PhyEpNum = PhysicalEp(UsbEpNum , Dir);
+	Ept = &InstancePtr->eps[PhyEpNum];
+
+	Params->Param0 = XUSBPSU_DEPCFG_EP_TYPE(Type)
+		| XUSBPSU_DEPCFG_MAX_PACKET_SIZE(Size);
+
+	/*
+	 * Set burst size to 1 as recommended
+	 */
+	if (InstancePtr->AppData->Speed == XUSBPSU_SPEED_SUPER) {
+		Params->Param0 |= XUSBPSU_DEPCFG_BURST_SIZE(1);
+	}
+
+	Params->Param1 = XUSBPSU_DEPCFG_XFER_COMPLETE_EN
+		| XUSBPSU_DEPCFG_XFER_NOT_READY_EN;
+
+	if (Restore) {
+		Params->Param0 |= XUSBPSU_DEPCFG_ACTION_RESTORE;
+		Params->Param2 = Ept->EpSavedState;
+	}
+
+	/*
+	 * We are doing 1:1 mapping for endpoints, meaning
+	 * Physical Endpoints 2 maps to Logical Endpoint 2 and
+	 * so on. We consider the direction bit as part of the physical
+	 * endpoint number. So USB endpoint 0x81 is 0x03.
+	 */
+	Params->Param1 |= XUSBPSU_DEPCFG_EP_NUMBER(PhyEpNum);
+
+	if (Dir != XUSBPSU_EP_DIR_OUT) {
+		 Params->Param0 |= XUSBPSU_DEPCFG_FIFO_NUMBER((u32)PhyEpNum >> 1);
+	}
+
+	if (Ept->Type == XUSBPSU_ENDPOINT_XFER_ISOC) {
+		Params->Param1 |= XUSBPSU_DEPCFG_BINTERVAL_M1(Ept->Interval - 1);
+		Params->Param1 |= XUSBPSU_DEPCFG_XFER_IN_PROGRESS_EN;
+	}
+
+	return XUsbPsu_SendEpCmd(InstancePtr, UsbEpNum, Dir,
+							 XUSBPSU_DEPCMD_SETEPCONFIG, Params);
+}
+
+/****************************************************************************/
+/**
+* Sends Set Transfer Resource command to Endpoint.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	UsbEpNum is USB endpoint number.
+* @param	Dir is direction of endpoint - XUSBPSU_EP_DIR_IN/
+*											XUSBPSU_EP_DIR_OUT.
+*
+* @return	XST_SUCCESS else XST_FAILURE.
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_SetXferResource(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir)
+{
+	struct XUsbPsu_EpParams *Params;
+
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(UsbEpNum <= (u8)16U);
+	Xil_AssertNonvoid((Dir == XUSBPSU_EP_DIR_IN) ||
+						(Dir == XUSBPSU_EP_DIR_OUT));
+
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertNonvoid(Params != NULL);
+
+	Params->Param0 = XUSBPSU_DEPXFERCFG_NUM_XFER_RES(1);
+
+	return XUsbPsu_SendEpCmd(InstancePtr, UsbEpNum, Dir,
+							 XUSBPSU_DEPCMD_SETTRANSFRESOURCE, Params);
+}
+
+/****************************************************************************/
+/**
+* Enables Endpoint for sending/receiving data.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	UsbEpNum is USB endpoint number.
+* @param	Dir is direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
+* @param	Maxsize is size of Endpoint size.
+* @param	Type is Endpoint type Control/Bulk/Interrupt/Isoc.
+* @param	Restore should be true if saved state should be restored;
+*			typically this would be false
+*
+* @return	XST_SUCCESS else XST_FAILURE.
+*
+* @note		None.
+*
+****************************************************************************/
+s32 XUsbPsu_EpEnable(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir,
+			u16 Maxsize, u8 Type, u8 Restore)
+{
+	struct XUsbPsu_Ep *Ept;
+	struct XUsbPsu_Trb *TrbStHw, *TrbLink;
+	u32 RegVal;
+	s32 Ret = (s32)XST_FAILURE;
+	u32 PhyEpNum;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(UsbEpNum <= (u8)16U);
+	Xil_AssertNonvoid((Dir == XUSBPSU_EP_DIR_IN) ||
+					  (Dir == XUSBPSU_EP_DIR_OUT));
+	Xil_AssertNonvoid((Maxsize >= 64U) && (Maxsize <= 1024U));
+
+	PhyEpNum = PhysicalEp(UsbEpNum , Dir);
+	Ept = &InstancePtr->eps[PhyEpNum];
+
+	Ept->UsbEpNum	= UsbEpNum;
+	Ept->Direction	= Dir;
+	Ept->Type	= Type;
+	Ept->MaxSize	= Maxsize;
+	Ept->PhyEpNum	= (u8)PhyEpNum;
+	Ept->CurUf	= 0;
+	if (!InstancePtr->IsHibernated) {
+		Ept->TrbEnqueue	= 0;
+		Ept->TrbDequeue	= 0;
+	}
+
+	if (((Ept->EpStatus & XUSBPSU_EP_ENABLED) == 0U)
+			|| (InstancePtr->IsHibernated)) {
+		Ret = XUsbPsu_StartEpConfig(InstancePtr, UsbEpNum, Dir);
+		if (Ret != 0) {
+			return Ret;
+		}
+	}
+
+	Ret = XUsbPsu_SetEpConfig(InstancePtr, UsbEpNum, Dir, Maxsize,
+					Type, Restore);
+	if (Ret != 0) {
+		return Ret;
+	}
+
+	if (((Ept->EpStatus & XUSBPSU_EP_ENABLED) == 0U)
+			|| (InstancePtr->IsHibernated)) {
+		Ret = XUsbPsu_SetXferResource(InstancePtr, UsbEpNum, Dir);
+		if (Ret != 0) {
+			return Ret;
+		}
+
+		Ept->EpStatus |= XUSBPSU_EP_ENABLED;
+
+		RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DALEPENA);
+		RegVal |= XUSBPSU_DALEPENA_EP(Ept->PhyEpNum);
+		XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DALEPENA, RegVal);
+
+		/* Following code is only applicable for ISO XFER */
+		TrbStHw = &Ept->EpTrb[0];
+
+		/* Link TRB. The HWO bit is never reset */
+		TrbLink = &Ept->EpTrb[NO_OF_TRB_PER_EP];
+		memset(TrbLink, 0x00, sizeof(struct XUsbPsu_Trb));
+
+		TrbLink->BufferPtrLow = (UINTPTR)TrbStHw;
+		TrbLink->BufferPtrHigh = ((UINTPTR)TrbStHw >> 16) >> 16;
+		TrbLink->Ctrl |= XUSBPSU_TRBCTL_LINK_TRB;
+		TrbLink->Ctrl |= XUSBPSU_TRB_CTRL_HWO;
+	}
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Disables Endpoint.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	UsbEpNum is USB endpoint number.
+* @param	Dir is direction of endpoint
+*			- XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
+*
+* @return	XST_SUCCESS else XST_FAILURE.
+*
+* @note		None.
+*
+****************************************************************************/
+s32 XUsbPsu_EpDisable(struct XUsbPsu *InstancePtr, u8 UsbEpNum, u8 Dir)
+{
+	u32	RegVal;
+	u8	PhyEpNum;
+	struct XUsbPsu_Ep *Ept;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(UsbEpNum <= (u8)16U);
+	Xil_AssertNonvoid((Dir == XUSBPSU_EP_DIR_IN) ||
+						(Dir == XUSBPSU_EP_DIR_OUT));
+
+	PhyEpNum = PhysicalEp(UsbEpNum , Dir);
+	Ept = &InstancePtr->eps[PhyEpNum];
+
+	/* make sure HW endpoint isn't stalled */
+	if (Ept->EpStatus & XUSBPSU_EP_STALL)
+		XUsbPsu_EpClearStall(InstancePtr, Ept->UsbEpNum, Ept->Direction);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DALEPENA);
+	RegVal &= ~XUSBPSU_DALEPENA_EP(PhyEpNum);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DALEPENA, RegVal);
+
+	Ept->Type = 0U;
+	Ept->EpStatus = 0U;
+	Ept->MaxSize = 0U;
+	Ept->TrbEnqueue	= 0U;
+	Ept->TrbDequeue	= 0U;
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Enables USB Control Endpoint i.e., EP0OUT and EP0IN of Core.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Size is control endpoint size.
+*
+* @return	XST_SUCCESS else XST_FAILURE.
+*
+* @note		None.
+*
+****************************************************************************/
+s32 XUsbPsu_EnableControlEp(struct XUsbPsu *InstancePtr, u16 Size)
+{
+	s32 RetVal;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((Size >= 64U) && (Size <= 512U));
+
+	RetVal = XUsbPsu_EpEnable(InstancePtr, 0U, XUSBPSU_EP_DIR_OUT, Size,
+				XUSBPSU_ENDPOINT_XFER_CONTROL, FALSE);
+	if (RetVal != 0) {
+		return XST_FAILURE;
+	}
+
+	RetVal = XUsbPsu_EpEnable(InstancePtr, 0U, XUSBPSU_EP_DIR_IN, Size,
+				XUSBPSU_ENDPOINT_XFER_CONTROL, FALSE);
+	if (RetVal != 0) {
+		return XST_FAILURE;
+	}
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Initializes Endpoints. All OUT endpoints are even numbered and all IN
+* endpoints are odd numbered. EP0 is for Control OUT and EP1 is for
+* Control IN.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XUsbPsu_InitializeEps(struct XUsbPsu *InstancePtr)
+{
+	u8  i;
+	u8 Epnum;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	for (i = 0U; i < InstancePtr->NumOutEps; i++) {
+		Epnum = (i << 1U) | XUSBPSU_EP_DIR_OUT;
+		InstancePtr->eps[Epnum].PhyEpNum = Epnum;
+		InstancePtr->eps[Epnum].Direction = XUSBPSU_EP_DIR_OUT;
+		InstancePtr->eps[Epnum].ResourceIndex = 0;
+	}
+	for (i = 0U; i < InstancePtr->NumInEps; i++) {
+		Epnum = (i << 1U) | XUSBPSU_EP_DIR_IN;
+		InstancePtr->eps[Epnum].PhyEpNum = Epnum;
+		InstancePtr->eps[Epnum].Direction = XUSBPSU_EP_DIR_IN;
+		InstancePtr->eps[Epnum].ResourceIndex = 0;
+	}
+}
+
+/****************************************************************************/
+/**
+* Stops transfer on Endpoint.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	UsbEpNum is USB endpoint number.
+* @param	Dir is direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
+* @Force	Force flag to stop/pause transfer.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XUsbPsu_StopTransfer(struct XUsbPsu *InstancePtr, u8 UsbEpNum,
+			u8 Dir, u8 Force)
+{
+	struct XUsbPsu_Ep *Ept;
+	struct XUsbPsu_EpParams *Params;
+	u8 PhyEpNum;
+	u32 Cmd;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(UsbEpNum <= (u8)16U);
+	Xil_AssertVoid((Dir == XUSBPSU_EP_DIR_IN) || (Dir == XUSBPSU_EP_DIR_OUT));
+
+	PhyEpNum = PhysicalEp(UsbEpNum, Dir);
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertVoid(Params != NULL);
+
+	Ept = &InstancePtr->eps[PhyEpNum];
+
+	if (Ept->ResourceIndex == 0U) {
+		return;
+	}
+
+	/*
+	 * - Issue EndTransfer WITH CMDIOC bit set
+	 * - Wait 100us
+	 */
+	Cmd = XUSBPSU_DEPCMD_ENDTRANSFER;
+	Cmd |= Force ? XUSBPSU_DEPCMD_HIPRI_FORCERM : 0;
+	Cmd |= XUSBPSU_DEPCMD_CMDIOC;
+	Cmd |= XUSBPSU_DEPCMD_PARAM(Ept->ResourceIndex);
+	(void)XUsbPsu_SendEpCmd(InstancePtr, Ept->UsbEpNum, Ept->Direction,
+							Cmd, Params);
+	if (Force)
+		Ept->ResourceIndex = 0U;
+	Ept->EpStatus &= ~XUSBPSU_EP_BUSY;
+	XUsbSleep(100U);
+}
+
+/****************************************************************************/
+/**
+* Query endpoint state and save it in EpSavedState
+*
+* @param 	InstancePtr is a pointer to the XUsbPsu instance.
+* @param 	Ept is a pointer to the XUsbPsu pointer structure.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XUsbPsu_SaveEndpointState(struct XUsbPsu *InstancePtr, struct XUsbPsu_Ep *Ept)
+{
+       struct XUsbPsu_EpParams *Params = XUsbPsu_GetEpParams(InstancePtr);
+       XUsbPsu_SendEpCmd(InstancePtr, Ept->UsbEpNum, Ept->Direction,
+                       XUSBPSU_DEPCMD_GETEPSTATE, Params);
+       Ept->EpSavedState = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DEPCMDPAR2(Ept->PhyEpNum));
+}
+
+/****************************************************************************/
+/**
+* Clears Stall on all endpoints.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XUsbPsu_ClearStalls(struct XUsbPsu *InstancePtr)
+{
+	struct XUsbPsu_EpParams *Params;
+	u32 Epnum;
+	struct XUsbPsu_Ep *Ept;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertVoid(Params != NULL);
+
+	for (Epnum = 1U; Epnum < XUSBPSU_ENDPOINTS_NUM; Epnum++) {
+
+		Ept = &InstancePtr->eps[Epnum];
+		if (Ept == NULL) {
+			continue;
+		}
+
+		if ((Ept->EpStatus & XUSBPSU_EP_STALL) == 0U) {
+			continue;
+		}
+
+		Ept->EpStatus &= ~XUSBPSU_EP_STALL;
+
+		(void)XUsbPsu_SendEpCmd(InstancePtr, Ept->UsbEpNum,
+						  Ept->Direction, XUSBPSU_DEPCMD_CLEARSTALL,
+						  Params);
+	}
+}
+
+/****************************************************************************/
+/**
+* Initiates DMA to send data on endpoint to Host.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	UsbEp is USB endpoint number.
+* @param	BufferPtr is pointer to data.
+* @param	BufferLen is length of data buffer.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_EpBufferSend(struct XUsbPsu *InstancePtr, u8 UsbEp,
+						 u8 *BufferPtr, u32 BufferLen)
+{
+	u8	PhyEpNum;
+	u32	cmd;
+	s32	RetVal;
+	struct XUsbPsu_Trb	*TrbPtr;
+	struct XUsbPsu_Ep *Ept;
+	struct XUsbPsu_EpParams *Params;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(UsbEp <= (u8)16U);
+	Xil_AssertNonvoid(BufferPtr != NULL);
+
+	PhyEpNum = PhysicalEp(UsbEp, XUSBPSU_EP_DIR_IN);
+	if (PhyEpNum == 1U) {
+		RetVal = XUsbPsu_Ep0Send(InstancePtr, BufferPtr, BufferLen);
+		return RetVal;
+	}
+
+	Ept = &InstancePtr->eps[PhyEpNum];
+
+	if (Ept->Direction != XUSBPSU_EP_DIR_IN) {
+		return XST_FAILURE;
+	}
+
+	Ept->RequestedBytes = BufferLen;
+	Ept->BytesTxed = 0U;
+	Ept->BufferPtr = BufferPtr;
+
+	TrbPtr = &Ept->EpTrb[Ept->TrbEnqueue];
+	Xil_AssertNonvoid(TrbPtr != NULL);
+
+	Ept->TrbEnqueue++;
+	if (Ept->TrbEnqueue == NO_OF_TRB_PER_EP)
+		Ept->TrbEnqueue = 0;
+	TrbPtr->BufferPtrLow  = (UINTPTR)BufferPtr;
+	TrbPtr->BufferPtrHigh  = ((UINTPTR)BufferPtr >> 16) >> 16;
+	TrbPtr->Size = BufferLen & XUSBPSU_TRB_SIZE_MASK;
+
+	switch (Ept->Type) {
+	case XUSBPSU_ENDPOINT_XFER_ISOC:
+		/*
+		 *  According to DWC3 datasheet, XUSBPSU_TRBCTL_ISOCHRONOUS and
+		 *  XUSBPSU_TRBCTL_CHN fields are only set when request has
+		 *  scattered list so these fields are not set over here.
+		 */
+		TrbPtr->Ctrl = (XUSBPSU_TRBCTL_ISOCHRONOUS_FIRST
+				| XUSBPSU_TRB_CTRL_CSP);
+
+		break;
+	case XUSBPSU_ENDPOINT_XFER_INT:
+	case XUSBPSU_ENDPOINT_XFER_BULK:
+		TrbPtr->Ctrl = (XUSBPSU_TRBCTL_NORMAL
+				| XUSBPSU_TRB_CTRL_LST);
+
+		break;
+	}
+
+	TrbPtr->Ctrl |= (XUSBPSU_TRB_CTRL_HWO
+			| XUSBPSU_TRB_CTRL_IOC
+			| XUSBPSU_TRB_CTRL_ISP_IMI);
+
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+		Xil_DCacheFlushRange((INTPTR)TrbPtr, sizeof(struct XUsbPsu_Trb));
+		Xil_DCacheFlushRange((INTPTR)BufferPtr, BufferLen);
+	}
+
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertNonvoid(Params != NULL);
+	Params->Param0 = 0U;
+	Params->Param1 = (UINTPTR)TrbPtr;
+
+	if (Ept->EpStatus & XUSBPSU_EP_BUSY) {
+		cmd = XUSBPSU_DEPCMD_UPDATETRANSFER;
+		cmd |= XUSBPSU_DEPCMD_PARAM(Ept->ResourceIndex);
+	} else {
+		if (Ept->Type == XUSBPSU_ENDPOINT_XFER_ISOC) {
+			BufferPtr += BufferLen;
+			struct XUsbPsu_Trb	*TrbTempNext;
+			TrbTempNext = &Ept->EpTrb[Ept->TrbEnqueue];
+			Xil_AssertNonvoid(TrbTempNext != NULL);
+
+			Ept->TrbEnqueue++;
+			if (Ept->TrbEnqueue == NO_OF_TRB_PER_EP)
+				Ept->TrbEnqueue = 0;
+			TrbTempNext->BufferPtrLow  = (UINTPTR)BufferPtr;
+			TrbTempNext->BufferPtrHigh  = ((UINTPTR)BufferPtr >> 16) >> 16;
+			TrbTempNext->Size = BufferLen & XUSBPSU_TRB_SIZE_MASK;
+
+			TrbTempNext->Ctrl = (XUSBPSU_TRBCTL_ISOCHRONOUS_FIRST
+					| XUSBPSU_TRB_CTRL_CSP
+					| XUSBPSU_TRB_CTRL_HWO
+					| XUSBPSU_TRB_CTRL_IOC
+					| XUSBPSU_TRB_CTRL_ISP_IMI);
+
+			if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+				Xil_DCacheFlushRange((INTPTR)TrbTempNext,
+										sizeof(struct XUsbPsu_Trb));
+				Xil_DCacheFlushRange((INTPTR)BufferPtr, BufferLen);
+			}
+
+		}
+
+		cmd = XUSBPSU_DEPCMD_STARTTRANSFER;
+		cmd |= XUSBPSU_DEPCMD_PARAM(Ept->CurUf);
+	}
+
+	RetVal = XUsbPsu_SendEpCmd(InstancePtr, UsbEp, Ept->Direction,
+								cmd, Params);
+	if (RetVal != XST_SUCCESS) {
+		return XST_FAILURE;
+	}
+
+	if (!(Ept->EpStatus & XUSBPSU_EP_BUSY)) {
+		Ept->ResourceIndex = (u8)XUsbPsu_EpGetTransferIndex(InstancePtr,
+				Ept->UsbEpNum,
+				Ept->Direction);
+
+		Ept->EpStatus |= XUSBPSU_EP_BUSY;
+	}
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Initiates DMA to receive data on Endpoint from Host.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	UsbEp is USB endpoint number.
+* @param	BufferPtr is pointer to data.
+* @param	Length is length of data to be received.
+*
+* @return	XST_SUCCESS else XST_FAILURE
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_EpBufferRecv(struct XUsbPsu *InstancePtr, u8 UsbEp,
+						 u8 *BufferPtr, u32 Length)
+{
+	u8	PhyEpNum;
+	u32	cmd;
+	u32	Size;
+	s32	RetVal;
+	struct XUsbPsu_Trb	*TrbPtr;
+	struct XUsbPsu_Ep *Ept;
+	struct XUsbPsu_EpParams *Params;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(UsbEp <= (u8)16U);
+	Xil_AssertNonvoid(BufferPtr != NULL);
+
+	PhyEpNum = PhysicalEp(UsbEp, XUSBPSU_EP_DIR_OUT);
+	if (PhyEpNum == 0U) {
+		RetVal = XUsbPsu_Ep0Recv(InstancePtr, BufferPtr, Length);
+		return RetVal;
+	}
+
+	Ept = &InstancePtr->eps[PhyEpNum];
+
+	if (Ept->Direction != XUSBPSU_EP_DIR_OUT) {
+		return XST_FAILURE;
+	}
+
+	Ept->RequestedBytes = Length;
+	Size = Length;
+	Ept->BytesTxed = 0U;
+	Ept->BufferPtr = BufferPtr;
+
+	/*
+	 * 8.2.5 - An OUT transfer size (Total TRB buffer allocation)
+	 * must be a multiple of MaxPacketSize even if software is expecting a
+	 * fixed non-multiple of MaxPacketSize transfer from the Host.
+	 */
+	if (!IS_ALIGNED(Length, Ept->MaxSize)) {
+		Size = (u32)roundup(Length, Ept->MaxSize);
+		Ept->UnalignedTx = 1U;
+	}
+
+	TrbPtr = &Ept->EpTrb[Ept->TrbEnqueue];
+	Xil_AssertNonvoid(TrbPtr != NULL);
+
+	Ept->TrbEnqueue++;
+	if (Ept->TrbEnqueue == NO_OF_TRB_PER_EP)
+		Ept->TrbEnqueue = 0;
+
+	TrbPtr->BufferPtrLow  = (UINTPTR)BufferPtr;
+	TrbPtr->BufferPtrHigh = ((UINTPTR)BufferPtr >> 16) >> 16;
+	TrbPtr->Size = Size;
+
+	switch (Ept->Type) {
+	case XUSBPSU_ENDPOINT_XFER_ISOC:
+		/*
+		 *  According to Linux driver, XUSBPSU_TRBCTL_ISOCHRONOUS and
+		 *  XUSBPSU_TRBCTL_CHN fields are only set when request has
+		 *  scattered list so these fields are not set over here.
+		 */
+		TrbPtr->Ctrl = (XUSBPSU_TRBCTL_ISOCHRONOUS_FIRST
+				| XUSBPSU_TRB_CTRL_CSP);
+
+		break;
+	case XUSBPSU_ENDPOINT_XFER_INT:
+	case XUSBPSU_ENDPOINT_XFER_BULK:
+		TrbPtr->Ctrl = (XUSBPSU_TRBCTL_NORMAL
+				| XUSBPSU_TRB_CTRL_LST);
+
+		break;
+	}
+
+	TrbPtr->Ctrl |= (XUSBPSU_TRB_CTRL_HWO
+			| XUSBPSU_TRB_CTRL_IOC
+			| XUSBPSU_TRB_CTRL_ISP_IMI);
+
+
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+		Xil_DCacheFlushRange((INTPTR)TrbPtr, sizeof(struct XUsbPsu_Trb));
+		Xil_DCacheInvalidateRange((INTPTR)BufferPtr, Length);
+	}
+
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertNonvoid(Params != NULL);
+	Params->Param0 = 0U;
+	Params->Param1 = (UINTPTR)TrbPtr;
+
+	if (Ept->EpStatus & XUSBPSU_EP_BUSY) {
+		cmd = XUSBPSU_DEPCMD_UPDATETRANSFER;
+		cmd |= XUSBPSU_DEPCMD_PARAM(Ept->ResourceIndex);
+	} else {
+		if (Ept->Type == XUSBPSU_ENDPOINT_XFER_ISOC) {
+			BufferPtr += Length;
+			struct XUsbPsu_Trb	*TrbTempNext;
+			TrbTempNext = &Ept->EpTrb[Ept->TrbEnqueue];
+			Xil_AssertNonvoid(TrbTempNext != NULL);
+
+			Ept->TrbEnqueue++;
+			if (Ept->TrbEnqueue == NO_OF_TRB_PER_EP)
+				Ept->TrbEnqueue = 0;
+			TrbTempNext->BufferPtrLow  = (UINTPTR)BufferPtr;
+			TrbTempNext->BufferPtrHigh  = ((UINTPTR)BufferPtr >> 16) >> 16;
+			TrbTempNext->Size = Length & XUSBPSU_TRB_SIZE_MASK;
+
+			TrbTempNext->Ctrl = (XUSBPSU_TRBCTL_ISOCHRONOUS_FIRST
+					| XUSBPSU_TRB_CTRL_CSP
+					| XUSBPSU_TRB_CTRL_HWO
+					| XUSBPSU_TRB_CTRL_IOC
+					| XUSBPSU_TRB_CTRL_ISP_IMI);
+
+			if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+				Xil_DCacheFlushRange((INTPTR)TrbTempNext,
+										sizeof(struct XUsbPsu_Trb));
+				Xil_DCacheFlushRange((INTPTR)BufferPtr, Length);
+			}
+
+		}
+
+		cmd = XUSBPSU_DEPCMD_STARTTRANSFER;
+		cmd |= XUSBPSU_DEPCMD_PARAM(Ept->CurUf);
+	}
+
+	RetVal = XUsbPsu_SendEpCmd(InstancePtr, UsbEp, Ept->Direction,
+								cmd, Params);
+	if (RetVal != XST_SUCCESS) {
+		return XST_FAILURE;
+	}
+
+	if (!(Ept->EpStatus & XUSBPSU_EP_BUSY)) {
+		Ept->ResourceIndex = (u8)XUsbPsu_EpGetTransferIndex(InstancePtr,
+				Ept->UsbEpNum,
+				Ept->Direction);
+
+		Ept->EpStatus |= XUSBPSU_EP_BUSY;
+	}
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+* Stalls an Endpoint.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Epnum is USB endpoint number.
+* @param	Dir	is direction.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_EpSetStall(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir)
+{
+	u8	PhyEpNum;
+	struct XUsbPsu_Ep *Ept = NULL;
+	struct XUsbPsu_EpParams *Params;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Epnum <= (u8)16U);
+	Xil_AssertVoid((Dir == XUSBPSU_EP_DIR_IN) || (Dir == XUSBPSU_EP_DIR_OUT));
+
+	PhyEpNum = PhysicalEp(Epnum, Dir);
+	Ept = &InstancePtr->eps[PhyEpNum];
+
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertVoid(Params != NULL);
+
+	(void)XUsbPsu_SendEpCmd(InstancePtr, Ept->UsbEpNum, Ept->Direction,
+							XUSBPSU_DEPCMD_SETSTALL, Params);
+
+	Ept->EpStatus |= XUSBPSU_EP_STALL;
+}
+
+/****************************************************************************/
+/**
+* Clears Stall on an Endpoint.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	EpNum is USB endpoint number.
+* @param	Dir	is direction.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_EpClearStall(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir)
+{
+	u8	PhyEpNum;
+	struct XUsbPsu_Ep *Ept = NULL;
+	struct XUsbPsu_EpParams *Params;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Epnum <= (u8)16U);
+	Xil_AssertVoid((Dir == XUSBPSU_EP_DIR_IN) || (Dir == XUSBPSU_EP_DIR_OUT));
+
+	PhyEpNum = PhysicalEp(Epnum, Dir);
+	Ept = &InstancePtr->eps[PhyEpNum];
+
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertVoid(Params != NULL);
+
+	(void)XUsbPsu_SendEpCmd(InstancePtr, Ept->UsbEpNum, Ept->Direction,
+							XUSBPSU_DEPCMD_CLEARSTALL, Params);
+
+	Ept->EpStatus &= ~XUSBPSU_EP_STALL;
+}
+
+/****************************************************************************/
+/**
+* Sets an user handler to be called after data is sent/received by an Endpoint
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	EpNum is USB endpoint number.
+* @param	Dir is direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
+* @param	Handler is user handler to be called.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_SetEpHandler(struct XUsbPsu *InstancePtr, u8 Epnum,
+			u8 Dir, void (*Handler)(void *, u32, u32))
+{
+	u8 PhyEpNum;
+	struct XUsbPsu_Ep *Ept;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Epnum <= (u8)16U);
+	Xil_AssertVoid((Dir == XUSBPSU_EP_DIR_IN) || (Dir == XUSBPSU_EP_DIR_OUT));
+
+	PhyEpNum = PhysicalEp(Epnum, Dir);
+	Ept = &InstancePtr->eps[PhyEpNum];
+	Ept->Handler = Handler;
+}
+
+/****************************************************************************/
+/**
+* Returns status of endpoint - Stalled or not
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	EpNum is USB endpoint number.
+* @param	Dir is direction of endpoint - XUSBPSU_EP_DIR_IN/XUSBPSU_EP_DIR_OUT.
+*
+* @return
+*			1 - if stalled
+*			0 - if not stalled
+*
+* @note		None.
+*
+*****************************************************************************/
+s32 XUsbPsu_IsEpStalled(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir)
+{
+	u8 PhyEpNum;
+	struct XUsbPsu_Ep *Ept;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Epnum <= (u8)16U);
+	Xil_AssertNonvoid((Dir == XUSBPSU_EP_DIR_IN) || (Dir == XUSBPSU_EP_DIR_OUT));
+
+	PhyEpNum = PhysicalEp(Epnum, Dir);
+	Ept = &InstancePtr->eps[PhyEpNum];
+
+	return (s32)(!!(Ept->EpStatus & XUSBPSU_EP_STALL));
+}
+
+/****************************************************************************/
+/**
+* Checks the Data Phase and calls user Endpoint handler.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is a pointer to the Endpoint event occured in core.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_EpXferComplete(struct XUsbPsu *InstancePtr,
+							const struct XUsbPsu_Event_Epevt *Event)
+{
+	struct XUsbPsu_Ep	*Ept;
+	struct XUsbPsu_Trb	*TrbPtr;
+	u32	Length;
+	u32	Epnum;
+	u8	Dir;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Event != NULL);
+
+	Epnum = Event->Epnumber;
+	Ept = &InstancePtr->eps[Epnum];
+	Dir = Ept->Direction;
+	TrbPtr = &Ept->EpTrb[Ept->TrbDequeue];
+	Xil_AssertVoid(TrbPtr != NULL);
+
+	Ept->TrbDequeue++;
+	if (Ept->TrbDequeue == NO_OF_TRB_PER_EP)
+		Ept->TrbDequeue = 0;
+
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0)
+		Xil_DCacheInvalidateRange((INTPTR)TrbPtr, sizeof(struct XUsbPsu_Trb));
+
+	if (Event->Endpoint_Event == XUSBPSU_DEPEVT_XFERCOMPLETE) {
+		Ept->EpStatus &= ~(XUSBPSU_EP_BUSY);
+		Ept->ResourceIndex = 0;
+	}
+
+	Length = TrbPtr->Size & XUSBPSU_TRB_SIZE_MASK;
+
+	if (Length == 0U) {
+		Ept->BytesTxed = Ept->RequestedBytes;
+	} else {
+		if (Dir == XUSBPSU_EP_DIR_IN) {
+			Ept->BytesTxed = Ept->RequestedBytes - Length;
+		} else if (Dir == XUSBPSU_EP_DIR_OUT) {
+			if (Ept->UnalignedTx == 1U) {
+				Ept->BytesTxed = (u32)roundup(Ept->RequestedBytes,
+												Ept->MaxSize);
+				Ept->BytesTxed -= Length;
+				Ept->UnalignedTx = 0U;
+			} else {
+				/*
+				 * Get the actual number of bytes transmitted
+				 * by host
+				 */
+				Ept->BytesTxed = Ept->RequestedBytes - Length;
+			}
+		}
+	}
+
+	if (Dir == XUSBPSU_EP_DIR_OUT) {
+		/* Invalidate Cache */
+		if (InstancePtr->ConfigPtr->IsCacheCoherent == 0)
+			Xil_DCacheInvalidateRange((INTPTR)Ept->BufferPtr, Ept->BytesTxed);
+	}
+
+	if (Ept->Handler != NULL) {
+		Ept->Handler(InstancePtr->AppData, Ept->RequestedBytes, Ept->BytesTxed);
+	}
+}
+
+/****************************************************************************/
+/**
+* For Isochronous transfer, get the microframe time and calls respective Endpoint
+* handler.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is a pointer to the Endpoint event occurred in core.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_EpXferNotReady(struct XUsbPsu *InstancePtr,
+							const struct XUsbPsu_Event_Epevt *Event)
+{
+	struct XUsbPsu_Ep	*Ept;
+	u32	Epnum;
+	u32 CurUf, Mask;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Event != NULL);
+
+	Epnum = Event->Epnumber;
+	Ept = &InstancePtr->eps[Epnum];
+
+	if (Ept->Type == XUSBPSU_ENDPOINT_XFER_ISOC) {
+		Mask = ~(1 << (Ept->Interval - 1));
+		CurUf = Event->Parameters & Mask;
+		Ept->CurUf = CurUf + (Ept->Interval * 4);
+		if (Ept->Handler != NULL) {
+			Ept->Handler(InstancePtr->AppData, 0, 0);
+		}
+	}
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_endpoint.h b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_endpoint.h
new file mode 100644
index 0000000..b80da48
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_endpoint.h
@@ -0,0 +1,187 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * @file xusbps_endpoint.h
+* @addtogroup usbpsu_v1_3
+* @{
+ *
+ * This is an internal file containing the definitions for endpoints. It is
+ * included by the xusbps_endpoint.c which is implementing the endpoint
+ * functions and by xusbps_intr.c.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- --------------------------------------------------------
+ * 1.0   sg  06/06/16  First release
+ * 1.4 	 bk  12/01/18  Modify USBPSU driver code to fit USB common example code
+ *		       for all USB IPs.
+ *
+ * 

+ *
+ ******************************************************************************/
+#ifndef XUSBPSU_ENDPOINT_H
+#define XUSBPSU_ENDPOINT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xusb_wrapper.h"
+#include "xil_types.h"
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/* Device Generic Command Register */
+#define XUSBPSU_DGCMD_SET_LMP                   0x00000001U
+#define XUSBPSU_DGCMD_SET_PERIODIC_PAR          0x00000002U
+#define XUSBPSU_DGCMD_XMIT_FUNCTION             0x00000003U
+
+/* These apply for core versions 1.94a and later */
+#define XUSBPSU_DGCMD_SET_SCRATCHPAD_ADDR_LO    0x00000004U
+#define XUSBPSU_DGCMD_SET_SCRATCHPAD_ADDR_HI    0x00000005U
+
+#define XUSBPSU_DGCMD_SELECTED_FIFO_FLUSH       0x00000009U
+#define XUSBPSU_DGCMD_ALL_FIFO_FLUSH            0x0000000aU
+#define XUSBPSU_DGCMD_SET_ENDPOINT_NRDY         0x0000000cU
+#define XUSBPSU_DGCMD_RUN_SOC_BUS_LOOPBACK      0x00000010U
+
+#define XUSBPSU_DGCMD_STATUS(n)                 (((u32)(n) >> 15) & 1)
+#define XUSBPSU_DGCMD_CMDACT                    (0x00000001U << 10)
+#define XUSBPSU_DGCMD_CMDIOC                    (0x00000001U << 8)
+
+/* Device Generic Command Parameter Register */
+#define XUSBPSU_DGCMDPAR_FORCE_LINKPM_ACCEPT    (0x00000001U << 0)
+#define XUSBPSU_DGCMDPAR_FIFO_NUM(n)            ((u32)(n) << 0)
+#define XUSBPSU_DGCMDPAR_RX_FIFO                (0x00000000U << 5)
+#define XUSBPSU_DGCMDPAR_TX_FIFO                (0x00000001U << 5)
+#define XUSBPSU_DGCMDPAR_LOOPBACK_DIS           (0x00000000U << 0)
+#define XUSBPSU_DGCMDPAR_LOOPBACK_ENA           (0x00000001U << 0)
+
+/* Device Endpoint Command Register */
+#define XUSBPSU_DEPCMD_PARAM_SHIFT              16U
+#define XUSBPSU_DEPCMD_PARAM(x)         ((u32)(x) << XUSBPSU_DEPCMD_PARAM_SHIFT)
+#define XUSBPSU_DEPCMD_GET_RSC_IDX(x)  (((u32)(x) >> XUSBPSU_DEPCMD_PARAM_SHIFT) & \
+                                        (u32)0x0000007fU)
+#define XUSBPSU_DEPCMD_STATUS(x)                (((u32)(x) >> 12) & (u32)0xF)
+#define XUSBPSU_DEPCMD_HIPRI_FORCERM            (0x00000001U << 11)
+#define XUSBPSU_DEPCMD_CMDACT                   (0x00000001U << 10)
+#define XUSBPSU_DEPCMD_CMDIOC                   (0x00000001U << 8)
+
+#define XUSBPSU_DEPCMD_DEPSTARTCFG              0x00000009U
+#define XUSBPSU_DEPCMD_ENDTRANSFER              0x00000008U
+#define XUSBPSU_DEPCMD_UPDATETRANSFER           0x00000007U
+#define XUSBPSU_DEPCMD_STARTTRANSFER            0x00000006U
+#define XUSBPSU_DEPCMD_CLEARSTALL               0x00000005U
+#define XUSBPSU_DEPCMD_SETSTALL                 0x00000004U
+#define XUSBPSU_DEPCMD_GETEPSTATE               0x00000003U
+#define XUSBPSU_DEPCMD_SETTRANSFRESOURCE        0x00000002U
+#define XUSBPSU_DEPCMD_SETEPCONFIG              0x00000001U
+
+/* The EP number goes 0..31 so ep0 is always out and ep1 is always in */
+#define XUSBPSU_DALEPENA_EP(n)                  (0x00000001U << (n))
+
+#define XUSBPSU_DEPCFG_INT_NUM(n)               ((u32)(n) << 0)
+#define XUSBPSU_DEPCFG_XFER_COMPLETE_EN         (0x00000001U << 8)
+#define XUSBPSU_DEPCFG_XFER_IN_PROGRESS_EN      (0x00000001U << 9)
+#define XUSBPSU_DEPCFG_XFER_NOT_READY_EN        (0x00000001U << 10)
+#define XUSBPSU_DEPCFG_FIFO_ERROR_EN            (0x00000001U << 11)
+#define XUSBPSU_DEPCFG_STREAM_EVENT_EN          (0x00000001U << 13)
+#define XUSBPSU_DEPCFG_BINTERVAL_M1(n)          ((u32)(n) << 16)
+#define XUSBPSU_DEPCFG_STREAM_CAPABLE           (0x00000001U << 24)
+#define XUSBPSU_DEPCFG_EP_NUMBER(n)             ((u32)(n) << 25)
+#define XUSBPSU_DEPCFG_BULK_BASED               (0x00000001U << 30)
+#define XUSBPSU_DEPCFG_FIFO_BASED               (0x00000001U << 31)
+
+/* DEPCFG parameter 0 */
+#define XUSBPSU_DEPCFG_EP_TYPE(n)               ((u32)(n) << 1)
+#define XUSBPSU_DEPCFG_MAX_PACKET_SIZE(n)       ((u32)(n) << 3)
+#define XUSBPSU_DEPCFG_FIFO_NUMBER(n)           ((u32)(n) << 17)
+#define XUSBPSU_DEPCFG_BURST_SIZE(n)            ((u32)(n) << 22)
+#define XUSBPSU_DEPCFG_DATA_SEQ_NUM(n)          ((u32)(n) << 26)
+/* This applies for core versions earlier than 1.94a */
+#define XUSBPSU_DEPCFG_IGN_SEQ_NUM              (0x00000001U << 31)
+/* These apply for core versions 1.94a and later */
+#define XUSBPSU_DEPCFG_ACTION_INIT              (0x00000000U << 30)
+#define XUSBPSU_DEPCFG_ACTION_RESTORE           (0x00000001U << 30)
+#define XUSBPSU_DEPCFG_ACTION_MODIFY            (0x00000002U << 30)
+
+/* DEPXFERCFG parameter 0 */
+#define XUSBPSU_DEPXFERCFG_NUM_XFER_RES(n) ((u32)(n) & (u32)0xffff)
+
+#define XUSBPSU_DEPCMD_TYPE_BULK                2U
+#define XUSBPSU_DEPCMD_TYPE_INTR                3U
+
+/* TRB Length, PCM and Status */
+#define XUSBPSU_TRB_SIZE_MASK           (0x00ffffffU)
+#define XUSBPSU_TRB_SIZE_LENGTH(n)      ((u32)(n) & XUSBPSU_TRB_SIZE_MASK)
+#define XUSBPSU_TRB_SIZE_PCM1(n)        (((u32)(n) & (u32)0x03) << 24)
+#define XUSBPSU_TRB_SIZE_TRBSTS(n)      (((u32)(n) & ((u32)0x0f << 28)) >> 28)
+
+#define XUSBPSU_TRBSTS_OK               0U
+#define XUSBPSU_TRBSTS_MISSED_ISOC      1U
+#define XUSBPSU_TRBSTS_SETUP_PENDING    2U
+#define XUSBPSU_TRB_STS_XFER_IN_PROG    4U
+
+/* TRB Control */
+#define XUSBPSU_TRB_CTRL_HWO            ((u32)0x00000001U << 0)
+#define XUSBPSU_TRB_CTRL_LST            ((u32)0x00000001U << 1)
+#define XUSBPSU_TRB_CTRL_CHN            ((u32)0x00000001U << 2)
+#define XUSBPSU_TRB_CTRL_CSP            ((u32)0x00000001U << 3)
+#define XUSBPSU_TRB_CTRL_TRBCTL(n)      (((u32)(n) & (u32)0x3f) << 4)
+#define XUSBPSU_TRB_CTRL_ISP_IMI        (0x00000001U << 10)
+#define XUSBPSU_TRB_CTRL_IOC            (0x00000001U << 11)
+#define XUSBPSU_TRB_CTRL_SID_SOFN(n)    (((u32)(n) & (u32)0xffff) << 14)
+
+#define XUSBPSU_TRBCTL_NORMAL                   XUSBPSU_TRB_CTRL_TRBCTL(1)
+#define XUSBPSU_TRBCTL_CONTROL_SETUP            XUSBPSU_TRB_CTRL_TRBCTL(2)
+#define XUSBPSU_TRBCTL_CONTROL_STATUS2          XUSBPSU_TRB_CTRL_TRBCTL(3)
+#define XUSBPSU_TRBCTL_CONTROL_STATUS3          XUSBPSU_TRB_CTRL_TRBCTL(4)
+#define XUSBPSU_TRBCTL_CONTROL_DATA             XUSBPSU_TRB_CTRL_TRBCTL(5)
+#define XUSBPSU_TRBCTL_ISOCHRONOUS_FIRST        XUSBPSU_TRB_CTRL_TRBCTL(6)
+#define XUSBPSU_TRBCTL_ISOCHRONOUS              XUSBPSU_TRB_CTRL_TRBCTL(7)
+#define XUSBPSU_TRBCTL_LINK_TRB                 XUSBPSU_TRB_CTRL_TRBCTL(8)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XUSBPSU_ENDPOINT_H */
+/** @} */
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_g.c b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_g.c
new file mode 100644
index 0000000..f19093f
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_g.c
@@ -0,0 +1,56 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xusbpsu.h"
+
+/*
+* The configuration table for devices
+*/
+
+XUsbPsu_Config XUsbPsu_ConfigTable[XPAR_XUSBPSU_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_USB_XHCI_0_DEVICE_ID,
+		XPAR_PSU_USB_XHCI_0_BASEADDR,
+		XPAR_PSU_USB_XHCI_0_IS_CACHE_COHERENT
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_hibernation.c b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_hibernation.c
new file mode 100644
index 0000000..20f53c9
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_hibernation.c
@@ -0,0 +1,688 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xusbpsu_hibernation.c
+*
+* This patch adds hibernation support to usbpsu driver when dwc3 is operating
+* as a gadget
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.0   Mayank 12/01/18 First release
+*
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xusbpsu.h"
+#include "xusbpsu_hw.h"
+#include "xusbpsu_endpoint.h"
+
+/************************** Constant Definitions *****************************/
+
+#define NUM_OF_NONSTICKY_REGS    		27
+
+#define XUSBPSU_HIBER_SCRATCHBUF_SIZE           4096U
+
+#define XUSBPSU_NON_STICKY_SAVE_RETRIES		500U
+#define XUSBPSU_PWR_STATE_RETRIES		1500U
+#define XUSBPSU_CTRL_RDY_RETRIES		5000U
+#define XUSBPSU_TIMEOUT				1000U
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+static u8 ScratchBuf[XUSBPSU_HIBER_SCRATCHBUF_SIZE];
+
+/* Registers saved during hibernation and restored at wakeup */
+static u32 save_reg_addr[] = {
+        XUSBPSU_DCTL,
+        XUSBPSU_DCFG,
+        XUSBPSU_DEVTEN,
+        XUSBPSU_GSBUSCFG0,
+        XUSBPSU_GSBUSCFG1,
+        XUSBPSU_GCTL,
+        XUSBPSU_GTXTHRCFG,
+        XUSBPSU_GRXTHRCFG,
+        XUSBPSU_GTXFIFOSIZ(0),
+        XUSBPSU_GTXFIFOSIZ(1),
+        XUSBPSU_GTXFIFOSIZ(2),
+        XUSBPSU_GTXFIFOSIZ(3),
+        XUSBPSU_GTXFIFOSIZ(4),
+        XUSBPSU_GTXFIFOSIZ(5),
+        XUSBPSU_GTXFIFOSIZ(6),
+        XUSBPSU_GTXFIFOSIZ(7),
+        XUSBPSU_GTXFIFOSIZ(8),
+        XUSBPSU_GTXFIFOSIZ(9),
+        XUSBPSU_GTXFIFOSIZ(10),
+        XUSBPSU_GTXFIFOSIZ(11),
+        XUSBPSU_GTXFIFOSIZ(12),
+        XUSBPSU_GTXFIFOSIZ(13),
+        XUSBPSU_GTXFIFOSIZ(14),
+        XUSBPSU_GTXFIFOSIZ(15),
+        XUSBPSU_GRXFIFOSIZ(0),
+        XUSBPSU_GUSB3PIPECTL(0),
+        XUSBPSU_GUSB2PHYCFG(0),
+};
+static u32 saved_regs[NUM_OF_NONSTICKY_REGS];
+
+/*****************************************************************************/
+/**
+* Save non sticky registers
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked
+* 		on.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void save_regs(struct XUsbPsu *InstancePtr)
+{
+	u32 i;
+
+	for (i = 0; i < NUM_OF_NONSTICKY_REGS; i++)
+		saved_regs[i] = XUsbPsu_ReadReg(InstancePtr, save_reg_addr[i]);
+}
+
+/*****************************************************************************/
+/**
+* Restore non sticky registers
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked
+* 		on.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void restore_regs(struct XUsbPsu *InstancePtr)
+{
+	u32 i;
+
+	for (i = 0; i < NUM_OF_NONSTICKY_REGS; i++)
+		XUsbPsu_WriteReg(InstancePtr, save_reg_addr[i], saved_regs[i]);
+}
+
+/*****************************************************************************/
+/**
+* Send generic command for gadget
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked
+* 		on.
+* @param	cmd is command to be sent
+* @param	param is parameter for the command, to be written in DGCMDPAR
+* 		register
+*
+* @return
+*		- XST_SUCCESS on success
+*		- XST_FAILURE on timeout
+*		- XST_REGISTER_ERROR on status error
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XUsbPsu_SendGadgetGenericCmd(struct XUsbPsu *InstancePtr, u32 cmd,
+			u32 param)
+{
+	u32		RegVal, retry = 500;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DGCMDPAR, param);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DGCMD, cmd | XUSBPSU_DGCMD_CMDACT);
+
+	do {
+		RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DGCMD);
+		if (!(RegVal & XUSBPSU_DGCMD_CMDACT)) {
+			if (XUSBPSU_DGCMD_STATUS(RegVal))
+				return XST_REGISTER_ERROR;
+			return 0;
+		}
+	} while (--retry);
+
+	return XST_FAILURE;
+}
+
+/*****************************************************************************/
+/**
+* Sets scratchpad buffers
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked
+* 		on.
+*
+* @return	XST_SUCCESS on success or else error code
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XUsbPsu_SetupScratchpad(struct XUsbPsu *InstancePtr)
+{
+	s32 Ret;
+	Ret = XUsbPsu_SendGadgetGenericCmd(InstancePtr,
+		XUSBPSU_DGCMD_SET_SCRATCHPAD_ADDR_LO, (UINTPTR)ScratchBuf & 0xffffffff);
+	if (Ret) {
+		xil_printf("Failed to set scratchpad low addr: %d\n", Ret);
+		return Ret;
+	}
+
+	Ret = XUsbPsu_SendGadgetGenericCmd(InstancePtr,
+		XUSBPSU_DGCMD_SET_SCRATCHPAD_ADDR_HI, ((UINTPTR)ScratchBuf >> 16) >> 16);
+	if (Ret) {
+		xil_printf("Failed to set scratchpad high addr: %d\n", Ret);
+		return Ret;
+	}
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* Initialize to handle hibernation event when it comes
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked
+* 		on.
+*
+* @return	none
+*
+* @note		None.
+*
+******************************************************************************/
+void XUsbPsu_InitHibernation(struct XUsbPsu *InstancePtr)
+{
+	u32		RegVal;
+
+	InstancePtr->IsHibernated = 0;
+
+	memset(ScratchBuf, 0, sizeof(ScratchBuf));
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0)
+		Xil_DCacheFlushRange((INTPTR)ScratchBuf, XUSBPSU_HIBER_SCRATCHBUF_SIZE);
+
+	XUsbPsu_SetupScratchpad(InstancePtr);
+
+	/* enable PHY suspend */
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GUSB2PHYCFG(0));
+	RegVal |= XUSBPSU_GUSB2PHYCFG_SUSPHY;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GUSB2PHYCFG(0), RegVal);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GUSB3PIPECTL(0));
+	RegVal |= XUSBPSU_GUSB3PIPECTL_SUSPHY;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GUSB3PIPECTL(0), RegVal);
+}
+
+/*****************************************************************************/
+/**
+* Handle hibernation event
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked
+* 		on.
+*
+* @return	none
+*
+* @note		None.
+*
+******************************************************************************/
+void Xusbpsu_HibernationIntr(struct XUsbPsu *InstancePtr)
+{
+	u8 EpNum;
+	u32 RegVal;
+	s32 retries;
+	XusbPsuLinkState LinkState;
+
+	/* sanity check */
+	switch(XUsbPsu_GetLinkState(InstancePtr)) {
+	case XUSBPSU_LINK_STATE_SS_DIS:
+	case XUSBPSU_LINK_STATE_U3:
+		break;
+	default:
+		/* fake hiber interrupt */
+		xil_printf("got fake interrupt\r\n");
+		return;
+	};
+
+	if (InstancePtr->Ep0State == XUSBPSU_EP0_SETUP_PHASE) {
+		XUsbPsu_StopTransfer(InstancePtr, 0, XUSBPSU_EP_DIR_OUT, TRUE);
+		XUsbPsu_RecvSetup(InstancePtr);
+	}
+
+	/* stop active transfers for all endpoints including control
+	 * endpoints force rm bit should be 0 when we do this */
+	for (EpNum = 0; EpNum < XUSBPSU_ENDPOINTS_NUM; EpNum++) {
+		struct XUsbPsu_Ep *Ept;
+
+		Ept = &InstancePtr->eps[EpNum];
+		if (!Ept)
+			continue;
+
+		if (!(Ept->EpStatus & XUSBPSU_EP_ENABLED))
+			continue;
+
+		/* save srsource index for later use */
+		XUsbPsu_StopTransfer(InstancePtr, Ept->UsbEpNum,
+				Ept->Direction, FALSE);
+
+		XUsbPsu_SaveEndpointState(InstancePtr, Ept);
+	}
+
+	/*
+	 * ack events, don't process them; h/w decrements the count by the value
+	 * written
+	 */
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GEVNTCOUNT(0));
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTCOUNT(0), RegVal);
+	InstancePtr->Evt.Count = 0;
+	InstancePtr->Evt.Flags &= ~XUSBPSU_EVENT_PENDING;
+
+	if (XUsbPsu_Stop(InstancePtr)) {
+		xil_printf("Failed to stop USB core\r\n");
+		return;
+	}
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+
+	/* Check the link state and if it is disconnected, set
+	 * KEEP_CONNECT to 0
+	 */
+	LinkState = XUsbPsu_GetLinkState(InstancePtr);
+	if (LinkState == XUSBPSU_LINK_STATE_SS_DIS) {
+		RegVal &= ~XUSBPSU_DCTL_KEEP_CONNECT;
+		XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+		/* update LinkState to be used while wakeup */
+		InstancePtr->LinkState = XUSBPSU_LINK_STATE_SS_DIS;
+	}
+
+	save_regs(InstancePtr);
+
+	/* ask core to save state */
+	RegVal |= XUSBPSU_DCTL_CSS;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	/* wait till core saves */
+	if (XUsbPsu_Wait_Clear_Timeout(InstancePtr, XUSBPSU_DSTS,
+			XUSBPSU_DSTS_SSS, XUSBPSU_NON_STICKY_SAVE_RETRIES) == XST_FAILURE) {
+		xil_printf("Failed to save core state\r\n");
+		return;
+	}
+
+	/* Enable PME to wakeup from hibernation */
+	XUsbPsu_WriteVendorReg(XIL_PME_ENABLE, XIL_PME_ENABLE_SIG_GEN);
+
+	/* change power state to D3 */
+	XUsbPsu_WriteVendorReg(XIL_REQ_PWR_STATE, XIL_REQ_PWR_STATE_D3);
+
+	/* wait till current state is changed to D3 */
+        retries = XUSBPSU_PWR_STATE_RETRIES;
+        do {
+		RegVal = XUsbPsu_ReadVendorReg(XIL_CUR_PWR_STATE);
+                if ((RegVal & XIL_CUR_PWR_STATE_BITMASK) == XIL_CUR_PWR_STATE_D3)
+                        break;
+
+                XUsbSleep(XUSBPSU_TIMEOUT);
+        } while (--retries);
+
+	if (retries < 0) {
+		xil_printf("Failed to change power state to D3\r\n");
+		return;
+	}
+	XUsbSleep(XUSBPSU_TIMEOUT);
+
+	RegVal = XUsbPsu_ReadLpdReg(RST_LPD_TOP);
+	if (InstancePtr->ConfigPtr->DeviceId == XPAR_XUSBPSU_0_DEVICE_ID)
+		XUsbPsu_WriteLpdReg(RST_LPD_TOP, RegVal | USB0_CORE_RST);
+
+	InstancePtr->IsHibernated = 1;
+	xil_printf("Hibernated!\r\n");
+}
+
+/*****************************************************************************/
+/**
+* Restarts transfer for active endpoint
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked
+* 		on.
+* @param	EpNum is an endpoint number.
+*
+* @return	XST_SUCCESS on success or else XST_FAILURE.
+*
+* @note		None.
+*
+******************************************************************************/
+static s32 XUsbPsu_RestartEp(struct XUsbPsu *InstancePtr, u8 EpNum)
+{
+	struct XUsbPsu_EpParams *Params;
+	struct XUsbPsu_Trb	*TrbPtr;
+	struct XUsbPsu_Ep	*Ept;
+	u32	Cmd;
+	s32	Ret;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	Params = XUsbPsu_GetEpParams(InstancePtr);
+	Xil_AssertNonvoid(Params != NULL);
+
+	Ept = &InstancePtr->eps[EpNum];
+
+	/* check if we need to restart transfer */
+	if (!Ept->ResourceIndex && Ept->PhyEpNum)
+		return XST_SUCCESS;
+
+	if (Ept->UsbEpNum) {
+		TrbPtr = &Ept->EpTrb[Ept->TrbDequeue];
+	} else {
+		TrbPtr = &InstancePtr->Ep0_Trb;
+	}
+
+	Xil_AssertNonvoid(TrbPtr != NULL);
+
+	TrbPtr->Ctrl |= XUSBPSU_TRB_CTRL_HWO;
+
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+		Xil_DCacheFlushRange((INTPTR)TrbPtr, sizeof(struct XUsbPsu_Trb));
+		Xil_DCacheInvalidateRange((INTPTR)Ept->BufferPtr, Ept->RequestedBytes);
+	}
+
+	Params->Param0 = 0U;
+	Params->Param1 = (UINTPTR)TrbPtr;
+
+	Cmd = XUSBPSU_DEPCMD_STARTTRANSFER;
+
+	Ret = XUsbPsu_SendEpCmd(InstancePtr, Ept->UsbEpNum, Ept->Direction,
+			Cmd, Params);
+	if (Ret)
+		return XST_FAILURE;
+
+	Ept->EpStatus |= XUSBPSU_EP_BUSY;
+	Ept->ResourceIndex = (u8)XUsbPsu_EpGetTransferIndex(InstancePtr,
+			Ept->UsbEpNum, Ept->Direction);
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* Restarts EP0 endpoint
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked
+* 		on.
+*
+* @return	XST_SUCCESS on success or else XST_FAILURE.
+*
+* @note		None.
+*
+******************************************************************************/
+static s32 XUsbPsu_RestoreEp0(struct XUsbPsu *InstancePtr)
+{
+        struct XUsbPsu_Ep *Ept;
+        s32 Ret;
+        u8 EpNum;
+
+        for (EpNum = 0; EpNum < 2; EpNum++) {
+		Ept = &InstancePtr->eps[EpNum];
+
+		if (!Ept)
+			continue;
+
+		if (!(Ept->EpStatus & XUSBPSU_EP_ENABLED))
+			continue;
+
+		Ret = XUsbPsu_EpEnable(InstancePtr, Ept->UsbEpNum,
+				Ept->Direction, Ept->MaxSize, Ept->Type, TRUE);
+		if (Ret) {
+			xil_printf("Failed to enable EP %d on wakeup: %d\r\n",
+					EpNum, Ret);
+			return XST_FAILURE;
+		}
+
+		if (Ept->EpStatus & XUSBPSU_EP_STALL) {
+			XUsbPsu_Ep0StallRestart(InstancePtr);
+		} else {
+			Ret = XUsbPsu_RestartEp(InstancePtr, Ept->PhyEpNum);
+			if (Ret) {
+				xil_printf("Failed to restart EP %d on wakeup: %d\r\n",
+						EpNum, Ret);
+				return XST_FAILURE;
+			}
+		}
+        }
+
+        return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* Restarts non EP0 endpoints
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked
+* 		on.
+*
+* @return	XST_SUCCESS on success or else XST_FAILURE.
+*
+* @note		None.
+*
+******************************************************************************/
+static s32 XUsbPsu_RestoreEps(struct XUsbPsu *InstancePtr)
+{
+        struct XUsbPsu_Ep *Ept;
+	s32 Ret;
+	u8 EpNum;
+
+	for (EpNum = 2; EpNum < XUSBPSU_ENDPOINTS_NUM; EpNum++) {
+		Ept = &InstancePtr->eps[EpNum];
+
+		if (!Ept)
+			continue;
+
+		if (!(Ept->EpStatus & XUSBPSU_EP_ENABLED))
+			continue;
+
+		Ret = XUsbPsu_EpEnable(InstancePtr, Ept->UsbEpNum,
+				Ept->Direction, Ept->MaxSize, Ept->Type, TRUE);
+		if (Ret) {
+			xil_printf("Failed to enable EP %d on wakeup: %d\r\n",
+					EpNum, Ret);
+			return XST_FAILURE;
+		}
+	}
+
+	for (EpNum = 2; EpNum < XUSBPSU_ENDPOINTS_NUM; EpNum++) {
+		Ept = &InstancePtr->eps[EpNum];
+
+		if (!Ept)
+			continue;
+
+		if (!(Ept->EpStatus & XUSBPSU_EP_ENABLED))
+			continue;
+
+		if (Ept->EpStatus & XUSBPSU_EP_STALL) {
+			XUsbPsu_EpSetStall(InstancePtr, Ept->UsbEpNum, Ept->Direction);
+		} else {
+			Ret = XUsbPsu_RestartEp(InstancePtr, Ept->PhyEpNum);
+			if (Ret) {
+				xil_printf("Failed to restart EP %d on wakeup: %d\r\n",
+						EpNum, Ret);
+				return XST_FAILURE;
+			}
+		}
+        }
+
+        return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+* Handle wakeup event
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance to be worked
+* 		on.
+*
+* @return	none
+*
+* @note		None.
+*
+******************************************************************************/
+void XUsbPsu_WakeupIntr(struct XUsbPsu *InstancePtr)
+{
+	u32 RegVal, link_state;
+	s32 retries;
+	char enter_hiber;
+
+	RegVal = XUsbPsu_ReadLpdReg(RST_LPD_TOP);
+	if (InstancePtr->ConfigPtr->DeviceId == XPAR_XUSBPSU_0_DEVICE_ID)
+		XUsbPsu_WriteLpdReg(RST_LPD_TOP, RegVal & ~USB0_CORE_RST);
+
+	/* change power state to D0 */
+	XUsbPsu_WriteVendorReg(XIL_REQ_PWR_STATE, XIL_REQ_PWR_STATE_D0);
+
+	/* wait till current state is changed to D0 */
+        retries = XUSBPSU_PWR_STATE_RETRIES;
+        do {
+		RegVal = XUsbPsu_ReadVendorReg(XIL_CUR_PWR_STATE);
+                if ((RegVal & XIL_CUR_PWR_STATE_BITMASK) == XIL_CUR_PWR_STATE_D0)
+                        break;
+
+                XUsbSleep(XUSBPSU_TIMEOUT);
+        } while (--retries);
+
+	if (retries < 0) {
+		xil_printf("Failed to change power state to D0\r\n");
+		return;
+	}
+
+	/* ask core to restore non-sticky registers */
+	XUsbPsu_SetupScratchpad(InstancePtr);
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal |= XUSBPSU_DCTL_CRS;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	/* wait till non-sticky registers are restored */
+	if (XUsbPsu_Wait_Clear_Timeout(InstancePtr, XUSBPSU_DSTS,
+			XUSBPSU_DSTS_RSS, XUSBPSU_NON_STICKY_SAVE_RETRIES) == XST_FAILURE) {
+		xil_printf("Failed to restore USB core\r\n");
+		return;
+	}
+
+	restore_regs(InstancePtr);
+
+	/* setup event buffers */
+	XUsbPsu_EventBuffersSetup(InstancePtr);
+
+	/* nothing to do when in OTG host mode */
+	if (XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GSTS) & XUSBPSU_GSTS_CUR_MODE)
+		return;
+
+	if (XUsbPsu_RestoreEp0(InstancePtr)) {
+		xil_printf("Failed to restore EP0\r\n");
+		return;
+	}
+
+	/* start controller */
+	if (XUsbPsu_Start(InstancePtr)) {
+		xil_printf("Failed to start core on wakeup\r\n");
+		return;
+	}
+
+	/* Wait until device controller is ready */
+	if (XUsbPsu_Wait_Clear_Timeout(InstancePtr, XUSBPSU_DSTS,
+			XUSBPSU_DSTS_DCNRD, XUSBPSU_CTRL_RDY_RETRIES) == XST_FAILURE) {
+		xil_printf("Failed to ready device controller\r\n");
+		return;
+	}
+
+	/*
+	 * there can be suprious wakeup events , so wait for some time and check
+	 * the link state
+	 */
+	XUsbSleep(XUSBPSU_TIMEOUT * 10);
+
+	link_state = XUsbPsu_GetLinkState(InstancePtr);
+
+	switch(link_state) {
+	case XUSBPSU_LINK_STATE_RESET:
+		RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DSTS);
+		RegVal &= ~XUSBPSU_DCFG_DEVADDR_MASK;
+		XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DSTS, RegVal);
+
+		if (XUsbPsu_SetLinkState(InstancePtr, XUSBPSU_LINK_STATE_RECOV)) {
+			xil_printf("Failed to put link in Recovery\r\n");
+			return;
+		}
+		break;
+	case XUSBPSU_LINK_STATE_SS_DIS:
+		RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+		RegVal &= ~XUSBPSU_DCTL_KEEP_CONNECT;
+		XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+		/* fall Through */
+	case XUSBPSU_LINK_STATE_U3:
+		/* enter hibernation again */
+		enter_hiber = 1;
+		break;
+	default:
+		if (XUsbPsu_SetLinkState(InstancePtr, XUSBPSU_LINK_STATE_RECOV)) {
+			xil_printf("Failed to put link in Recovery\r\n");
+			return;
+		}
+		break;
+	};
+
+	if (XUsbPsu_RestoreEps(InstancePtr)) {
+		xil_printf("Failed to restore EPs\r\n");
+		return;
+	}
+
+	InstancePtr->IsHibernated = 0;
+
+	if (enter_hiber)  {
+		Xusbpsu_HibernationIntr(InstancePtr);
+		return;
+	}
+
+	xil_printf("We are back from hibernation!\r\n");
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_hw.h b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_hw.h
new file mode 100644
index 0000000..344f919
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_hw.h
@@ -0,0 +1,455 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xusbpsu_hw.h
+* @addtogroup usbpsu_v1_3
+* @{
+*
+* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- -----  -------- -----------------------------------------------------
+* 1.0   sg    06/06/16 First release
+* 1.4   myk   12/01/18 Added support of hibernation
+*
+* 

+*
+*****************************************************************************/
+
+#ifndef XUSBPSU_HW_H	/* Prevent circular inclusions */
+#define XUSBPSU_HW_H	/* by using protection macros  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files ********************************/
+
+/************************** Constant Definitions ****************************/
+
+/**@name Register offsets
+ *
+ * The following constants provide access to each of the registers of the
+ * USBPSU device.
+ * @{
+ */
+
+/**/
+#define XUSBPSU_PORTSC_30						0x430
+#define XUSBPSU_PORTMSC_30						0x434
+
+/* XUSBPSU registers memory space boundries */
+#define XUSBPSU_GLOBALS_REGS_START              0xc100
+#define XUSBPSU_GLOBALS_REGS_END                0xc6ff
+#define XUSBPSU_DEVICE_REGS_START               0xc700
+#define XUSBPSU_DEVICE_REGS_END                 0xcbff
+#define XUSBPSU_OTG_REGS_START                  0xcc00
+#define XUSBPSU_OTG_REGS_END                    0xccff
+
+/* Global Registers */
+#define XUSBPSU_GSBUSCFG0                       0xc100
+#define XUSBPSU_GSBUSCFG1                       0xc104
+#define XUSBPSU_GTXTHRCFG                       0xc108
+#define XUSBPSU_GRXTHRCFG                       0xc10c
+#define XUSBPSU_GCTL                            0xc110
+#define XUSBPSU_GEVTEN                          0xc114
+#define XUSBPSU_GSTS                            0xc118
+#define XUSBPSU_GSNPSID                         0xc120
+#define XUSBPSU_GGPIO                           0xc124
+#define XUSBPSU_GUID                            0xc128
+#define XUSBPSU_GUCTL                           0xc12c
+#define XUSBPSU_GBUSERRADDR0                    0xc130
+#define XUSBPSU_GBUSERRADDR1                    0xc134
+#define XUSBPSU_GPRTBIMAP0                      0xc138
+#define XUSBPSU_GPRTBIMAP1                      0xc13c
+#define XUSBPSU_GHWPARAMS0_OFFSET               0xc140U
+#define XUSBPSU_GHWPARAMS1_OFFSET               0xc144U
+#define XUSBPSU_GHWPARAMS2_OFFSET               0xc148U
+#define XUSBPSU_GHWPARAMS3_OFFSET               0xc14cU
+#define XUSBPSU_GHWPARAMS4_OFFSET               0xc150U
+#define XUSBPSU_GHWPARAMS5_OFFSET               0xc154U
+#define XUSBPSU_GHWPARAMS6_OFFSET               0xc158U
+#define XUSBPSU_GHWPARAMS7_OFFSET               0xc15cU
+#define XUSBPSU_GDBGFIFOSPACE                   0xc160
+#define XUSBPSU_GDBGLTSSM                       0xc164
+#define XUSBPSU_GPRTBIMAP_HS0                   0xc180
+#define XUSBPSU_GPRTBIMAP_HS1                   0xc184
+#define XUSBPSU_GPRTBIMAP_FS0                   0xc188
+#define XUSBPSU_GPRTBIMAP_FS1                   0xc18c
+
+#define XUSBPSU_GUSB2PHYCFG(n)                  ((u32)0xc200 + ((u32)(n) * (u32)0x04))
+#define XUSBPSU_GUSB2I2CCTL(n)                  ((u32)0xc240 + ((u32)(n) * (u32)0x04))
+
+#define XUSBPSU_GUSB2PHYACC(n)                  ((u32)0xc280 + ((u32)(n) * (u32)0x04))
+
+#define XUSBPSU_GUSB3PIPECTL(n)                 ((u32)0xc2c0 + ((u32)(n) * (u32)0x04))
+
+#define XUSBPSU_GTXFIFOSIZ(n)                   ((u32)0xc300 + ((u32)(n) * (u32)0x04))
+#define XUSBPSU_GRXFIFOSIZ(n)                   ((u32)0xc380 + ((u32)(n) * (u32)0x04))
+
+#define XUSBPSU_GEVNTADRLO(n)                   ((u32)0xc400 + ((u32)(n) * (u32)0x10))
+#define XUSBPSU_GEVNTADRHI(n)                   ((u32)0xc404 + ((u32)(n) * (u32)0x10))
+#define XUSBPSU_GEVNTSIZ(n)                     ((u32)0xc408 + ((u32)(n) * (u32)0x10))
+#define XUSBPSU_GEVNTCOUNT(n)                   ((u32)0xc40c + ((u32)(n) * (u32)0x10))
+
+#define XUSBPSU_GHWPARAMS8                      0x0000c600U
+
+/* Device Registers */
+#define XUSBPSU_DCFG                            0x0000c700U
+#define XUSBPSU_DCTL                            0x0000c704U
+#define XUSBPSU_DEVTEN                          0x0000c708U
+#define XUSBPSU_DSTS                            0x0000c70cU
+#define XUSBPSU_DGCMDPAR                        0x0000c710U
+#define XUSBPSU_DGCMD                           0x0000c714U
+#define XUSBPSU_DALEPENA                        0x0000c720U
+#define XUSBPSU_DEPCMDPAR2(n)                   ((u32)0xc800 + ((u32)n * (u32)0x10))
+#define XUSBPSU_DEPCMDPAR1(n)                   ((u32)0xc804 + ((u32)n * (u32)0x10))
+#define XUSBPSU_DEPCMDPAR0(n)                   ((u32)0xc808 + ((u32)n * (u32)0x10))
+#define XUSBPSU_DEPCMD(n)                       ((u32)0xc80c + ((u32)n * (u32)0x10))
+
+/* OTG Registers */
+#define XUSBPSU_OCFG                            0x0000cc00U
+#define XUSBPSU_OCTL                            0x0000cc04U
+#define XUSBPSU_OEVT                            0xcc08U
+#define XUSBPSU_OEVTEN                          0xcc0CU
+#define XUSBPSU_OSTS                            0xcc10U
+
+/* Bit fields */
+
+/* Global Configuration Register */
+#define XUSBPSU_GCTL_PWRDNSCALE(n)              ((n) << 19)
+#define XUSBPSU_GCTL_U2RSTECN                   (1 << 16)
+#define XUSBPSU_GCTL_RAMCLKSEL(x)       (((x) & XUSBPSU_GCTL_CLK_MASK) << 6)
+#define XUSBPSU_GCTL_CLK_BUS                    (0U)
+#define XUSBPSU_GCTL_CLK_PIPE                   (1U)
+#define XUSBPSU_GCTL_CLK_PIPEHALF               (2U)
+#define XUSBPSU_GCTL_CLK_MASK                   (3U)
+
+#define XUSBPSU_GCTL_PRTCAP(n)                  (((n) & (3 << 12)) >> 12)
+#define XUSBPSU_GCTL_PRTCAPDIR(n)               ((n) << 12)
+#define XUSBPSU_GCTL_PRTCAP_HOST                1U
+#define XUSBPSU_GCTL_PRTCAP_DEVICE              2U
+#define XUSBPSU_GCTL_PRTCAP_OTG                 3U
+
+#define XUSBPSU_GCTL_CORESOFTRESET              (0x00000001U << 11)
+#define XUSBPSU_GCTL_SOFITPSYNC                 (0x00000001U << 10)
+#define XUSBPSU_GCTL_SCALEDOWN(n)               ((u32)(n) << 4)
+#define XUSBPSU_GCTL_SCALEDOWN_MASK             XUSBPSU_GCTL_SCALEDOWN(3)
+#define XUSBPSU_GCTL_DISSCRAMBLE                (0x00000001U << 3)
+#define XUSBPSU_GCTL_U2EXIT_LFPS                (0x00000001U << 2)
+#define XUSBPSU_GCTL_GBLHIBERNATIONEN           (0x00000001U << 1)
+#define XUSBPSU_GCTL_DSBLCLKGTNG                (0x00000001U << 0)
+
+/* Global Status Register Device Interrupt Mask */
+#define XUSBPSU_GSTS_DEVICE_IP_MASK 			0x00000040
+#define XUSBPSU_GSTS_CUR_MODE			(0x00000001U << 0)
+
+/* Global USB2 PHY Configuration Register */
+#define XUSBPSU_GUSB2PHYCFG_PHYSOFTRST          (0x00000001U << 31)
+#define XUSBPSU_GUSB2PHYCFG_SUSPHY              (0x00000001U << 6)
+
+/* Global USB3 PIPE Control Register */
+#define XUSBPSU_GUSB3PIPECTL_PHYSOFTRST         (0x00000001U << 31)
+#define XUSBPSU_GUSB3PIPECTL_SUSPHY             (0x00000001U << 17)
+
+/* Global TX Fifo Size Register */
+#define XUSBPSU_GTXFIFOSIZ_TXFDEF(n)            ((u32)(n) & (u32)0xffffU)
+#define XUSBPSU_GTXFIFOSIZ_TXFSTADDR(n)         ((u32)(n) & 0xffff0000U)
+
+/* Global Event Size Registers */
+#define XUSBPSU_GEVNTSIZ_INTMASK                ((u32)0x00000001U << 31U)
+#define XUSBPSU_GEVNTSIZ_SIZE(n)                ((u32)(n) & (u32)0xffffU)
+
+/* Global HWPARAMS1 Register */
+#define XUSBPSU_GHWPARAMS1_EN_PWROPT(n)         (((u32)(n) & ((u32)3 << 24)) >> 24)
+#define XUSBPSU_GHWPARAMS1_EN_PWROPT_NO         0U
+#define XUSBPSU_GHWPARAMS1_EN_PWROPT_CLK        1U
+#define XUSBPSU_GHWPARAMS1_EN_PWROPT_HIB        2U
+#define XUSBPSU_GHWPARAMS1_PWROPT(n)            ((u32)(n) << 24)
+#define XUSBPSU_GHWPARAMS1_PWROPT_MASK          XUSBPSU_GHWPARAMS1_PWROPT(3)
+
+/* Global HWPARAMS4 Register */
+#define XUSBPSU_GHWPARAMS4_HIBER_SCRATCHBUFS(n) (((u32)(n) & ((u32)0x0f << 13)) >> 13)
+#define XUSBPSU_MAX_HIBER_SCRATCHBUFS           15U
+
+/* Device Configuration Register */
+#define XUSBPSU_DCFG_DEVADDR(addr)              ((u32)(addr) << 3)
+#define XUSBPSU_DCFG_DEVADDR_MASK               XUSBPSU_DCFG_DEVADDR(0x7f)
+
+#define XUSBPSU_DCFG_SPEED_MASK					7U
+#define XUSBPSU_DCFG_SUPERSPEED					4U
+#define XUSBPSU_DCFG_HIGHSPEED					0U
+#define XUSBPSU_DCFG_FULLSPEED2					1U
+#define XUSBPSU_DCFG_LOWSPEED					2U
+#define XUSBPSU_DCFG_FULLSPEED1					3U
+
+#define XUSBPSU_DCFG_LPM_CAP                    (0x00000001U << 22U)
+
+/* Device Control Register */
+#define XUSBPSU_DCTL_RUN_STOP                   (0x00000001U << 31U)
+#define XUSBPSU_DCTL_CSFTRST                    ((u32)0x00000001U << 30U)
+#define XUSBPSU_DCTL_LSFTRST                    (0x00000001U << 29U)
+
+#define XUSBPSU_DCTL_HIRD_THRES_MASK            (0x0000001fU << 24U)
+#define XUSBPSU_DCTL_HIRD_THRES(n)              ((u32)(n) << 24)
+
+#define XUSBPSU_DCTL_APPL1RES                   (0x00000001U << 23)
+
+/* These apply for core versions 1.87a and earlier */
+#define XUSBPSU_DCTL_TRGTULST_MASK              (0x0000000fU << 17)
+#define XUSBPSU_DCTL_TRGTULST(n)                ((u32)(n) << 17)
+#define XUSBPSU_DCTL_TRGTULST_U2                (XUSBPSU_DCTL_TRGTULST(2))
+#define XUSBPSU_DCTL_TRGTULST_U3                (XUSBPSU_DCTL_TRGTULST(3))
+#define XUSBPSU_DCTL_TRGTULST_SS_DIS            (XUSBPSU_DCTL_TRGTULST(4))
+#define XUSBPSU_DCTL_TRGTULST_RX_DET            (XUSBPSU_DCTL_TRGTULST(5))
+#define XUSBPSU_DCTL_TRGTULST_SS_INACT          (XUSBPSU_DCTL_TRGTULST(6))
+
+/* These apply for core versions 1.94a and later */
+#define XUSBPSU_DCTL_KEEP_CONNECT               (0x00000001U << 19)
+#define XUSBPSU_DCTL_L1_HIBER_EN                (0x00000001U << 18)
+#define XUSBPSU_DCTL_CRS                        (0x00000001U << 17)
+#define XUSBPSU_DCTL_CSS                        (0x00000001U << 16)
+
+#define XUSBPSU_DCTL_INITU2ENA                  (0x00000001U << 12)
+#define XUSBPSU_DCTL_ACCEPTU2ENA                (0x00000001U << 11)
+#define XUSBPSU_DCTL_INITU1ENA                  (0x00000001U << 10)
+#define XUSBPSU_DCTL_ACCEPTU1ENA                (0x00000001U << 9)
+#define XUSBPSU_DCTL_TSTCTRL_MASK               (0x0000000fU << 1)
+
+#define XUSBPSU_DCTL_ULSTCHNGREQ_MASK           (0x0000000fU << 5)
+#define XUSBPSU_DCTL_ULSTCHNGREQ(n) (((u32)(n) << 5) & XUSBPSU_DCTL_ULSTCHNGREQ_MASK)
+
+#define XUSBPSU_DCTL_ULSTCHNG_NO_ACTION         (XUSBPSU_DCTL_ULSTCHNGREQ(0))
+#define XUSBPSU_DCTL_ULSTCHNG_SS_DISABLED       (XUSBPSU_DCTL_ULSTCHNGREQ(4))
+#define XUSBPSU_DCTL_ULSTCHNG_RX_DETECT         (XUSBPSU_DCTL_ULSTCHNGREQ(5))
+#define XUSBPSU_DCTL_ULSTCHNG_SS_INACTIVE       (XUSBPSU_DCTL_ULSTCHNGREQ(6))
+#define XUSBPSU_DCTL_ULSTCHNG_RECOVERY          (XUSBPSU_DCTL_ULSTCHNGREQ(8))
+#define XUSBPSU_DCTL_ULSTCHNG_COMPLIANCE        (XUSBPSU_DCTL_ULSTCHNGREQ(10))
+#define XUSBPSU_DCTL_ULSTCHNG_LOOPBACK          (XUSBPSU_DCTL_ULSTCHNGREQ(11))
+
+/* Device Event Enable Register */
+#define XUSBPSU_DEVTEN_VNDRDEVTSTRCVEDEN        ((u32)0x00000001 << 12)
+#define XUSBPSU_DEVTEN_EVNTOVERFLOWEN           ((u32)0x00000001 << 11)
+#define XUSBPSU_DEVTEN_CMDCMPLTEN               ((u32)0x00000001 << 10)
+#define XUSBPSU_DEVTEN_ERRTICERREN              ((u32)0x00000001 << 9)
+#define XUSBPSU_DEVTEN_SOFEN                    ((u32)0x00000001 << 7)
+#define XUSBPSU_DEVTEN_EOPFEN                   ((u32)0x00000001 << 6)
+#define XUSBPSU_DEVTEN_HIBERNATIONREQEVTEN      ((u32)0x00000001 << 5)
+#define XUSBPSU_DEVTEN_WKUPEVTEN                ((u32)0x00000001 << 4)
+#define XUSBPSU_DEVTEN_ULSTCNGEN                ((u32)0x00000001 << 3)
+#define XUSBPSU_DEVTEN_CONNECTDONEEN            ((u32)0x00000001 << 2)
+#define XUSBPSU_DEVTEN_USBRSTEN                 ((u32)0x00000001 << 1)
+#define XUSBPSU_DEVTEN_DISCONNEVTEN             ((u32)0x00000001 << 0)
+
+/* Device Status Register */
+#define XUSBPSU_DSTS_DCNRD                      (0x00000001U << 29)
+
+/* This applies for core versions 1.87a and earlier */
+#define XUSBPSU_DSTS_PWRUPREQ                   (0x00000001U << 24)
+
+/* These apply for core versions 1.94a and later */
+#define XUSBPSU_DSTS_RSS                        (0x00000001U << 25)
+#define XUSBPSU_DSTS_SSS                        (0x00000001U << 24)
+
+#define XUSBPSU_DSTS_COREIDLE                   (0x00000001U << 23)
+#define XUSBPSU_DSTS_DEVCTRLHLT                 (0x00000001U << 22)
+
+#define XUSBPSU_DSTS_USBLNKST_MASK              (0x0000000fU << 18)
+#define XUSBPSU_DSTS_USBLNKST(n) (((u32)(n) & XUSBPSU_DSTS_USBLNKST_MASK) >> 18)
+
+#define XUSBPSU_DSTS_RXFIFOEMPTY                (0x00000001U << 17)
+
+#define XUSBPSU_DSTS_SOFFN_MASK                 (0x00003fffU << 3)
+#define XUSBPSU_DSTS_SOFFN(n)           (((u32)(n) & XUSBPSU_DSTS_SOFFN_MASK) >> 3)
+
+#define XUSBPSU_DSTS_CONNECTSPD                 (0x00000007U << 0)
+
+#define XUSBPSU_DSTS_SUPERSPEED                 (4U << 0)
+#define XUSBPSU_DSTS_HIGHSPEED                  (0U << 0)
+#define XUSBPSU_DSTS_FULLSPEED2                 (1U << 0)
+#define XUSBPSU_DSTS_LOWSPEED                   (2U << 0)
+#define XUSBPSU_DSTS_FULLSPEED1                 (3U << 0)
+
+/*Portpmsc 3.0 bit field*/
+#define XUSBPSU_PORTMSC_30_FLA_MASK				(1U << 16)
+#define XUSBPSU_PORTMSC_30_U2_TIMEOUT_MASK		(0xffU << 8)
+#define XUSBPSU_PORTMSC_30_U2_TIMEOUT_SHIFT		(8U)
+#define XUSBPSU_PORTMSC_30_U1_TIMEOUT_MASK		(0xffU << 0)
+#define XUSBPSU_PORTMSC_30_U1_TIMEOUT_SHIFT		(0U)
+
+/* Register for LPD block */
+#define RST_LPD_TOP				0x23C
+#define USB0_CORE_RST				(1 << 6)
+#define USB1_CORE_RST				(1 << 7)
+
+/* Vendor registers for Xilinx */
+#define XIL_CUR_PWR_STATE			0x00
+#define XIL_PME_ENABLE				0x34
+#define XIL_REQ_PWR_STATE			0x3c
+#define XIL_PWR_CONFIG_USB3			0x48
+
+#define XIL_REQ_PWR_STATE_D0			0
+#define XIL_REQ_PWR_STATE_D3			3
+#define XIL_PME_ENABLE_SIG_GEN			1
+#define XIL_CUR_PWR_STATE_D0			0
+#define XIL_CUR_PWR_STATE_D3			3
+#define XIL_CUR_PWR_STATE_BITMASK		0x03
+
+#define VENDOR_BASE_ADDRESS			0xFF9D0000
+#define LPD_BASE_ADDRESS			0xFF5E0000
+
+ /*@}*/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+*
+* Read a register of the USBPS8 device. This macro provides register
+* access to all registers using the register offsets defined above.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Offset is the offset of the register to read.
+*
+* @return	The contents of the register.
+*
+* @note		C-style Signature:
+*		u32 XUsbPsu_ReadReg(struct XUsbPsu *InstancePtr, u32 Offset);
+*
+******************************************************************************/
+#define XUsbPsu_ReadReg(InstancePtr, Offset) \
+	Xil_In32((InstancePtr)->ConfigPtr->BaseAddress + (u32)(Offset))
+
+/*****************************************************************************/
+/**
+*
+* Write a register of the USBPS8 device. This macro provides
+* register access to all registers using the register offsets defined above.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	RegOffset is the offset of the register to write.
+* @param	Data is the value to write to the register.
+*
+* @return	None.
+*
+* @note 	C-style Signature:
+*		void XUsbPsu_WriteReg(struct XUsbPsu *InstancePtr,
+*								u32 Offset,u32 Data)
+*
+******************************************************************************/
+#define XUsbPsu_WriteReg(InstancePtr, Offset, Data) \
+	Xil_Out32((InstancePtr)->ConfigPtr->BaseAddress + (u32)(Offset), (u32)(Data))
+
+/*****************************************************************************/
+/**
+*
+* Read a vendor register of the USBPS8 device.
+*
+* @param       Offset is the offset of the register to read.
+*
+* @return      The contents of the register.
+*
+* @note                C-style Signature:
+*              u32 XUsbPsu_ReadVendorReg(struct XUsbPsu *InstancePtr, u32 Offset);
+*
+******************************************************************************/
+#define XUsbPsu_ReadVendorReg(Offset) \
+       Xil_In32(VENDOR_BASE_ADDRESS + (u32)(Offset))
+
+/*****************************************************************************/
+/**
+*
+* Write a Vendor register of the USBPS8 device.
+*
+* @param       RegOffset is the offset of the register to write.
+* @param       Data is the value to write to the register.
+*
+* @return      None.
+*
+* @note        C-style Signature:
+*              void XUsbPsu_WriteVendorReg(struct XUsbPsu *InstancePtr,
+*                                                              u32 Offset,u32 Data)
+*
+******************************************************************************/
+#define XUsbPsu_WriteVendorReg(Offset, Data) \
+       Xil_Out32(VENDOR_BASE_ADDRESS + (u32)(Offset), (u32)(Data))
+
+/*****************************************************************************/
+/**
+*
+* Read a LPD register of the USBPS8 device.
+*
+* @param       InstancePtr is a pointer to the XUsbPsu instance.
+* @param       Offset is the offset of the register to read.
+*
+* @return      The contents of the register.
+*
+* @note                C-style Signature:
+*              u32 XUsbPsu_ReadLpdReg(struct XUsbPsu *InstancePtr, u32 Offset);
+*
+******************************************************************************/
+#define XUsbPsu_ReadLpdReg(Offset) \
+       Xil_In32(LPD_BASE_ADDRESS + (u32)(Offset))
+
+/*****************************************************************************/
+/**
+*
+* Write a LPD register of the USBPS8 device.
+*
+* @param       InstancePtr is a pointer to the XUsbPsu instance.
+* @param       RegOffset is the offset of the register to write.
+* @param       Data is the value to write to the register.
+*
+* @return      None.
+*
+* @note        C-style Signature:
+*              void XUsbPsu_WriteLpdReg(struct XUsbPsu *InstancePtr,
+*                                                              u32 Offset,u32 Data)
+*
+******************************************************************************/
+#define XUsbPsu_WriteLpdReg(Offset, Data) \
+       Xil_Out32(LPD_BASE_ADDRESS + (u32)(Offset), (u32)(Data))
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* End of protection macro. */
+/** @} */
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_intr.c b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_intr.c
new file mode 100644
index 0000000..6124783
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_intr.c
@@ -0,0 +1,580 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xusbpsu_intr.c
+* @addtogroup usbpsu_v1_3
+* @{
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.0   sg  06/06/16 First release
+* 1.3   vak 04/03/17 Added CCI support for USB
+* 1.4	bk  12/01/18 Modify USBPSU driver code to fit USB common example code
+*		       for all USB IPs
+*	myk 12/01/18 Added hibernation support
+*	vak 22/01/18 Added changes for supporting microblaze platform
+*	vak 13/03/18 Moved the setup interrupt system calls from driver to
+*		     example.
+*
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xusb_wrapper.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+/****************************************************************************/
+/**
+* Endpoint interrupt handler.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is endpoint Event occured in the core.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_EpInterrupt(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Epevt *Event)
+{
+	struct XUsbPsu_Ep *Ept;
+	u32 Epnum;
+
+	Epnum = Event->Epnumber;
+	Ept = &InstancePtr->eps[Epnum];
+
+	if ((Ept->EpStatus & XUSBPSU_EP_ENABLED) == (u32)0U) {
+		return;
+	}
+
+	if ((Epnum == (u32)0) || (Epnum == (u32)1)) {
+		XUsbPsu_Ep0Intr(InstancePtr, Event);
+		return;
+	}
+
+	/* Handle other end point events */
+	switch (Event->Endpoint_Event) {
+		case XUSBPSU_DEPEVT_XFERCOMPLETE:
+		case XUSBPSU_DEPEVT_XFERINPROGRESS:
+			XUsbPsu_EpXferComplete(InstancePtr, Event);
+			break;
+
+		case XUSBPSU_DEPEVT_XFERNOTREADY:
+			XUsbPsu_EpXferNotReady(InstancePtr, Event);
+			break;
+
+		default:
+			/* Made for Misra-C Compliance. */
+			break;
+	}
+}
+
+/****************************************************************************/
+/**
+* Disconnect Interrupt handler.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_DisconnectIntr(struct XUsbPsu *InstancePtr)
+{
+	u32 RegVal;
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal &= ~XUSBPSU_DCTL_INITU1ENA;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	RegVal &= ~XUSBPSU_DCTL_INITU2ENA;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+
+	InstancePtr->IsConfigDone = 0U;
+	InstancePtr->AppData->Speed = XUSBPSU_SPEED_UNKNOWN;
+
+#ifdef XUSBPSU_HIBERNATION_ENABLE
+	/* In USB 2.0, to avoid hibernation interrupt at the time of connection
+	 * clear KEEP_CONNECT bit.
+	 */
+	if (InstancePtr->HasHibernation) {
+		RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+		if (RegVal & XUSBPSU_DCTL_KEEP_CONNECT) {
+			RegVal &= ~XUSBPSU_DCTL_KEEP_CONNECT;
+			XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+		}
+	}
+#endif
+
+	/* Call the handler if necessary */
+	if (InstancePtr->DisconnectIntrHandler != NULL) {
+		InstancePtr->DisconnectIntrHandler(InstancePtr->AppData);
+	}
+}
+
+/****************************************************************************/
+/**
+* Stops any active transfer.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void XUsbPsu_stop_active_transfers(struct XUsbPsu *InstancePtr)
+{
+	u32 Epnum;
+
+	for (Epnum = 2; Epnum < XUSBPSU_ENDPOINTS_NUM; Epnum++) {
+		struct XUsbPsu_Ep *Ept;
+
+		Ept = &InstancePtr->eps[Epnum];
+		if (!Ept)
+			continue;
+
+		if (!(Ept->EpStatus & XUSBPSU_EP_ENABLED))
+			continue;
+
+		XUsbPsu_StopTransfer(InstancePtr, Ept->UsbEpNum,
+				Ept->Direction, TRUE);
+	}
+}
+
+/****************************************************************************/
+/**
+* Clears stall on all stalled Eps.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void XUsbPsu_clear_stall_all_ep(struct XUsbPsu *InstancePtr)
+{
+	u32 Epnum;
+
+	for (Epnum = 1; Epnum < XUSBPSU_ENDPOINTS_NUM; Epnum++) {
+		struct XUsbPsu_Ep *Ept;
+
+		Ept = &InstancePtr->eps[Epnum];
+		if (!Ept)
+			continue;
+
+		if (!(Ept->EpStatus & XUSBPSU_EP_ENABLED))
+			continue;
+
+		if (!(Ept->EpStatus & XUSBPSU_EP_STALL))
+			continue;
+
+		XUsbPsu_EpClearStall(InstancePtr, Ept->UsbEpNum, Ept->Direction);
+	}
+}
+
+/****************************************************************************/
+/**
+* Reset Interrupt handler.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_ResetIntr(struct XUsbPsu *InstancePtr)
+{
+	u32	RegVal;
+	u32	Index;
+
+	InstancePtr->AppData->State = XUSBPSU_STATE_DEFAULT;
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+	RegVal &= ~XUSBPSU_DCTL_TSTCTRL_MASK;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+	InstancePtr->TestMode = 0U;
+
+	XUsbPsu_stop_active_transfers(InstancePtr);
+	XUsbPsu_clear_stall_all_ep(InstancePtr);
+
+	for (Index = 0U; Index < (InstancePtr->NumInEps + InstancePtr->NumOutEps);
+			Index++)
+	{
+		InstancePtr->eps[Index].EpStatus = 0U;
+	}
+
+	InstancePtr->IsConfigDone = 0U;
+
+	/* Reset device address to zero */
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCFG);
+	RegVal &= ~(XUSBPSU_DCFG_DEVADDR_MASK);
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCFG, RegVal);
+
+	/* Call the handler if necessary */
+	if (InstancePtr->ResetIntrHandler != NULL) {
+		InstancePtr->ResetIntrHandler(InstancePtr->AppData);
+	}
+}
+
+/****************************************************************************/
+/**
+* Connection Done Interrupt handler.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_ConnDoneIntr(struct XUsbPsu *InstancePtr)
+{
+	u32			RegVal;
+	u16			Size;
+	u8			Speed;
+
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DSTS);
+	Speed = (u8)(RegVal & XUSBPSU_DSTS_CONNECTSPD);
+	InstancePtr->AppData->Speed = Speed;
+
+	switch (Speed) {
+	case XUSBPSU_DCFG_SUPERSPEED:
+#ifdef XUSBPSU_DEBUG
+		xil_printf("Super Speed\r\n");
+#endif
+		Size = 512U;
+		InstancePtr->AppData->Speed = XUSBPSU_SPEED_SUPER;
+		break;
+
+	case XUSBPSU_DCFG_HIGHSPEED:
+#ifdef XUSBPSU_DEBUG
+		xil_printf("High Speed\r\n");
+#endif
+		Size = 64U;
+		InstancePtr->AppData->Speed = XUSBPSU_SPEED_HIGH;
+		break;
+
+	case XUSBPSU_DCFG_FULLSPEED2:
+	case XUSBPSU_DCFG_FULLSPEED1:
+#ifdef XUSBPSU_DEBUG
+		xil_printf("Full Speed\r\n");
+#endif
+		Size = 64U;
+		InstancePtr->AppData->Speed = XUSBPSU_SPEED_FULL;
+		break;
+
+	case XUSBPSU_DCFG_LOWSPEED:
+#ifdef XUSBPSU_DEBUG
+		xil_printf("Low Speed\r\n");
+#endif
+		Size = 64U;
+		InstancePtr->AppData->Speed = XUSBPSU_SPEED_LOW;
+		break;
+	default :
+		Size = 64U;
+		break;
+	}
+
+	if (InstancePtr->AppData->Speed == XUSBPSU_SPEED_SUPER) {
+		RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+		RegVal &= ~XUSBPSU_DCTL_HIRD_THRES_MASK;
+		XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+	}
+
+	(void)XUsbPsu_EnableControlEp(InstancePtr, Size);
+	(void)XUsbPsu_RecvSetup(InstancePtr);
+
+#ifdef XUSBPSU_HIBERNATION_ENABLE
+	/* In USB 2.0, to avoid hibernation interrupt at the time of connection
+	 * clear KEEP_CONNECT bit.
+	 */
+	if (InstancePtr->HasHibernation) {
+		RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_DCTL);
+		if (!(RegVal & XUSBPSU_DCTL_KEEP_CONNECT)) {
+			RegVal |= XUSBPSU_DCTL_KEEP_CONNECT;
+			XUsbPsu_WriteReg(InstancePtr, XUSBPSU_DCTL, RegVal);
+		}
+	}
+#endif
+}
+
+/****************************************************************************/
+/**
+* Link Status Change Interrupt handler.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	EvtInfo is Event information.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_LinkStsChangeIntr(struct XUsbPsu *InstancePtr, u32 EvtInfo)
+{
+	u32	State = EvtInfo & (u32)XUSBPSU_LINK_STATE_MASK;
+	InstancePtr->LinkState = (u8)State;
+}
+
+/****************************************************************************/
+/**
+* Interrupt handler for device specific events.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is the Device Event occured in core.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_DevInterrupt(struct XUsbPsu *InstancePtr,
+		const struct XUsbPsu_Event_Devt *Event)
+{
+
+	switch (Event->Type) {
+		case XUSBPSU_DEVICE_EVENT_DISCONNECT:
+			XUsbPsu_DisconnectIntr(InstancePtr);
+			break;
+
+		case XUSBPSU_DEVICE_EVENT_RESET:
+			XUsbPsu_ResetIntr(InstancePtr);
+			break;
+
+		case XUSBPSU_DEVICE_EVENT_CONNECT_DONE:
+			XUsbPsu_ConnDoneIntr(InstancePtr);
+			break;
+
+		case XUSBPSU_DEVICE_EVENT_WAKEUP:
+			break;
+
+		case XUSBPSU_DEVICE_EVENT_HIBER_REQ:
+#ifdef XUSBPSU_HIBERNATION_ENABLE
+			if (InstancePtr->HasHibernation)
+				Xusbpsu_HibernationIntr(InstancePtr);
+#endif
+			break;
+
+		case XUSBPSU_DEVICE_EVENT_LINK_STATUS_CHANGE:
+			XUsbPsu_LinkStsChangeIntr(InstancePtr,
+					Event->Event_Info);
+			break;
+
+		case XUSBPSU_DEVICE_EVENT_EOPF:
+			break;
+
+		case XUSBPSU_DEVICE_EVENT_SOF:
+			break;
+
+		case XUSBPSU_DEVICE_EVENT_ERRATIC_ERROR:
+			break;
+
+		case XUSBPSU_DEVICE_EVENT_CMD_CMPL:
+			break;
+
+		case XUSBPSU_DEVICE_EVENT_OVERFLOW:
+			break;
+
+		default:
+			/* Made for Misra-C Compliance. */
+			break;
+	}
+}
+
+/****************************************************************************/
+/**
+* Processes an Event entry in Event Buffer.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @param	Event is the Event entry.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_EventHandler(struct XUsbPsu *InstancePtr,
+			const union XUsbPsu_Event *Event)
+{
+
+	if (Event->Type.Is_DevEvt == 0U) {
+		/* End point Specific Event */
+		XUsbPsu_EpInterrupt(InstancePtr, &Event->Epevt);
+		return;
+	}
+
+	switch (Event->Type.Type) {
+	case XUSBPSU_EVENT_TYPE_DEV:
+		/* Device Specific Event */
+		XUsbPsu_DevInterrupt(InstancePtr, &Event->Devt);
+		break;
+	/* Carkit and I2C events not supported now */
+	default:
+		/* Made for Misra-C Compliance. */
+		break;
+	}
+}
+
+/****************************************************************************/
+/**
+* Processes events in an Event Buffer.
+*
+* @param	InstancePtr is a pointer to the XUsbPsu instance.
+* @bus		Event buffer number.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_EventBufferHandler(struct XUsbPsu *InstancePtr)
+{
+	struct XUsbPsu_EvtBuffer *Evt;
+	union XUsbPsu_Event Event = {0};
+	u32 RegVal;
+
+	Evt = &InstancePtr->Evt;
+
+	if (InstancePtr->ConfigPtr->IsCacheCoherent == 0) {
+		Xil_DCacheInvalidateRange((INTPTR)Evt->BuffAddr,
+                              (u32)XUSBPSU_EVENT_BUFFERS_SIZE);
+	}
+
+	while (Evt->Count > 0) {
+		Event.Raw = *(UINTPTR *)((UINTPTR)Evt->BuffAddr + Evt->Offset);
+
+		/*
+		 * Process the event received
+		 */
+		XUsbPsu_EventHandler(InstancePtr, &Event);
+
+		/* don't process anymore events if core is hibernated */
+		if (InstancePtr->IsHibernated)
+			return;
+
+		Evt->Offset = (Evt->Offset + 4U) % XUSBPSU_EVENT_BUFFERS_SIZE;
+		Evt->Count -= 4;
+		XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTCOUNT(0), 4U);
+	}
+
+	Evt->Count = 0;
+	Evt->Flags &= ~XUSBPSU_EVENT_PENDING;
+
+	/* Unmask event interrupt */
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GEVNTSIZ(0));
+	RegVal &= ~XUSBPSU_GEVNTSIZ_INTMASK;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTSIZ(0), RegVal);
+}
+
+/****************************************************************************/
+/**
+* Main Interrupt Handler.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_IntrHandler(void *XUsbPsuInstancePtr)
+{
+	struct XUsbPsu	*InstancePtr;
+	struct XUsbPsu_EvtBuffer *Evt;
+	u32 Count;
+	u32 RegVal;
+
+	InstancePtr = XUsbPsuInstancePtr;
+
+	Evt = &InstancePtr->Evt;
+
+	Count = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GEVNTCOUNT(0));
+	Count &= XUSBPSU_GEVNTCOUNT_MASK;
+	/*
+	 * As per data book software should only process Events if Event count
+	 * is greater than zero.
+	 */
+	if (Count == 0U) {
+		return;
+	}
+
+	Evt->Count = Count;
+	Evt->Flags |= XUSBPSU_EVENT_PENDING;
+
+	/* Mask event interrupt */
+	RegVal = XUsbPsu_ReadReg(InstancePtr, XUSBPSU_GEVNTSIZ(0));
+	RegVal |= XUSBPSU_GEVNTSIZ_INTMASK;
+	XUsbPsu_WriteReg(InstancePtr, XUSBPSU_GEVNTSIZ(0), RegVal);
+
+	/* Processes events in an Event Buffer */
+	XUsbPsu_EventBufferHandler(InstancePtr);
+}
+
+#ifdef XUSBPSU_HIBERNATION_ENABLE
+/****************************************************************************/
+/**
+* Wakeup Interrupt Handler.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XUsbPsu_WakeUpIntrHandler(void *XUsbPsuInstancePtr)
+{
+	struct XUsbPsu  *InstancePtr = (struct XUsbPsu *)XUsbPsuInstancePtr;
+
+	XUsbPsu_WakeupIntr(InstancePtr);
+}
+#endif
+
+/** @} */
diff --git a/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_sinit.c b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_sinit.c
new file mode 100644
index 0000000..bee46bc
--- /dev/null
+++ b/src/Xilinx/libsrc/usbpsu_v1_4/src/xusbpsu_sinit.c
@@ -0,0 +1,99 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xusbpsu_sinit.h
+* @addtogroup usbpsu_v1_3
+* @{
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.0   sg   06/06/16 First release
+*
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xparameters.h"
+#include "xusbpsu.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+extern XUsbPsu_Config XUsbPsu_ConfigTable[];
+
+
+/*****************************************************************************/
+/**
+* Lookup the device configuration based on the unique device ID.  The table
+* contains the configuration info for each device in the system.
+*
+* @param DeviceId is the unique device ID of the device being looked up.
+*
+* @return
+* A pointer to the configuration table entry corresponding to the given
+* device ID, or NULL if no match is found.
+*
+******************************************************************************/
+XUsbPsu_Config *XUsbPsu_LookupConfig(u16 DeviceId)
+{
+	XUsbPsu_Config *CfgPtr = NULL;
+	u32 i;
+
+	for (i = 0U; i < (u32)XPAR_XUSBPSU_NUM_INSTANCES; i++) {
+			if (XUsbPsu_ConfigTable[i].DeviceId == DeviceId) {
+			CfgPtr = &XUsbPsu_ConfigTable[i];
+			break;
+		}
+	}
+
+	return (XUsbPsu_Config *)(CfgPtr);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/video_common_v4_3/src/Makefile b/src/Xilinx/libsrc/video_common_v4_3/src/Makefile
new file mode 100644
index 0000000..9cb03a4
--- /dev/null
+++ b/src/Xilinx/libsrc/video_common_v4_3/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=-ffunction-sections -fdata-sections
+EXTRA_COMPILER_FLAGS=-Wall -Wextra
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner video_common_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling video_common"
+
+video_common_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: video_common_includes
+
+video_common_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/video_common_v4_3/src/xvidc.c b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc.c
new file mode 100644
index 0000000..ba4f789
--- /dev/null
+++ b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc.c
@@ -0,0 +1,1204 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xvidc.c
+ * @addtogroup video_common_v4_3
+ * @{
+ *
+ * Contains common utility functions that are typically used by video-related
+ * drivers and applications.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   rc,  01/10/15 Initial release.
+ *       als
+ * 2.2   als  02/01/16 Functions with pointer arguments that don't modify
+ *                     contents now const.
+ *                     Added ability to insert a custom video timing table.
+ *       yh            Added 3D support.
+ * 3.0   aad  05/13/16 Added API to search for RB video modes.
+ * 3.1   rco  07/26/16 Added extern definition for timing table array
+ *                     Added video-in-memory color formats
+ *                     Updated XVidC_RegisterCustomTimingModes API signature
+ * 4.1   rco  11/23/16 Added new memory formats
+ *                     Added new API to get video mode id that matches exactly
+ *                     with provided timing information
+ *                     Fix c++ warnings
+ * 4.2	 jsr  07/22/17 Added new framerates and color formats to support SDI
+ *                     Reordered YCBCR422 colorforamt and removed other formats
+ *                     that are not needed for SDI which were added earlier.
+ *       vyc  10/04/17 Added new streaming alpha formats and new memory formats
+ * 4.3   eb   26/01/18 Added API XVidC_GetVideoModeIdExtensive
+ *       jsr  02/22/18 Added XVIDC_CSF_YCBCR_420 color space format
+ *       vyc  04/04/18 Added BGR8 memory format
+ * 

+ *
+*******************************************************************************/
+
+/******************************* Include Files ********************************/
+
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xvidc.h"
+
+/*************************** Variable Declarations ****************************/
+extern const XVidC_VideoTimingMode XVidC_VideoTimingModes[XVIDC_VM_NUM_SUPPORTED];
+
+const XVidC_VideoTimingMode *XVidC_CustomTimingModes = NULL;
+int XVidC_NumCustomModes = 0;
+
+/**************************** Function Prototypes *****************************/
+
+static const XVidC_VideoTimingMode *XVidC_GetCustomVideoModeData(
+		XVidC_VideoMode VmId);
+static u8 XVidC_IsVtmRb(const char *VideoModeStr, u8 RbN);
+
+/*************************** Function Definitions *****************************/
+
+/******************************************************************************/
+/**
+ * This function registers a user-defined custom video mode timing table with
+ * video_common. Functions which search the available video modes, or take VmId
+ * as an input, will operate on or check the custom video mode timing table in
+ * addition to the pre-defined video mode timing table (XVidC_VideoTimingModes).
+ *
+ * @param	CustomTable is a pointer to the user-defined custom vide mode
+ *		timing table to register.
+ * @param	NumElems is the number of video modes supported by CustomTable.
+ *
+ * @return
+ *		- XST_SUCCESS if the custom table was successfully registered.
+ *		- XST_FAILURE if an existing custom table is already present.
+ *
+ * @note	IDs in the custom table may not conflict with IDs reserved by
+ *		the XVidC_VideoMode enum.
+ *
+*******************************************************************************/
+u32 XVidC_RegisterCustomTimingModes(const XVidC_VideoTimingMode *CustomTable,
+		                            u16 NumElems)
+{
+	u16 Index;
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(CustomTable != NULL);
+	for (Index = 0; Index < NumElems; Index++) {
+		Xil_AssertNonvoid((CustomTable[Index].VmId > XVIDC_VM_CUSTOM));
+		/* The IDs of each video mode in the custom table must not
+		 * conflict with IDs reserved by video_common. */
+	}
+
+	/* Fail if a custom table is currently already registered. */
+	if (XVidC_CustomTimingModes) {
+		return XST_FAILURE;
+	}
+
+	XVidC_CustomTimingModes = CustomTable;
+	XVidC_NumCustomModes    = NumElems;
+
+	return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function unregisters the user-defined custom video mode timing table
+ * previously registered by XVidC_RegisterCustomTimingModes().
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+void XVidC_UnregisterCustomTimingModes(void)
+{
+	XVidC_CustomTimingModes = NULL;
+	XVidC_NumCustomModes    = 0;
+}
+
+/******************************************************************************/
+/**
+ * This function calculates pixel clock based on the inputs.
+ *
+ * @param	HTotal specifies horizontal total.
+ * @param	VTotal specifies vertical total.
+ * @param	FrameRate specifies rate at which frames are generated.
+ *
+ * @return	Pixel clock in Hz.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+u32 XVidC_GetPixelClockHzByHVFr(u32 HTotal, u32 VTotal, u8 FrameRate)
+{
+	return (HTotal * VTotal * FrameRate);
+}
+
+/******************************************************************************/
+/**
+ * This function calculates pixel clock from video mode.
+ *
+ * @param	VmId specifies the resolution id.
+ *
+ * @return	Pixel clock in Hz.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+u32 XVidC_GetPixelClockHzByVmId(XVidC_VideoMode VmId)
+{
+	u32 ClkHz;
+	const XVidC_VideoTimingMode *VmPtr;
+
+	VmPtr = XVidC_GetVideoModeData(VmId);
+	if (!VmPtr) {
+		return 0;
+	}
+
+	if (XVidC_IsInterlaced(VmId)) {
+		/* For interlaced mode, use both frame 0 and frame 1 vertical
+		 * totals. */
+		ClkHz = VmPtr->Timing.F0PVTotal + VmPtr->Timing.F1VTotal;
+
+		/* Multiply the number of pixels by the frame rate of each
+		 * individual frame (half of the total frame rate). */
+		ClkHz *= VmPtr->FrameRate / 2;
+	}
+	else {
+		/* For progressive mode, use only frame 0 vertical total. */
+		ClkHz = VmPtr->Timing.F0PVTotal;
+
+		/* Multiply the number of pixels by the frame rate. */
+		ClkHz *= VmPtr->FrameRate;
+	}
+
+	/* Multiply the vertical total by the horizontal total for number of
+	 * pixels. */
+	ClkHz *= VmPtr->Timing.HTotal;
+
+	return ClkHz;
+}
+
+/******************************************************************************/
+/**
+ * This function checks if the input video mode is interlaced/progressive based
+ * on its ID from the video timings table.
+ *
+ * @param	VmId specifies the resolution ID from the video timings table.
+ *
+ * @return	Video format.
+ *		- XVIDC_VF_PROGRESSIVE
+ *		- XVIDC_VF_INTERLACED
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+XVidC_VideoFormat XVidC_GetVideoFormat(XVidC_VideoMode VmId)
+{
+	const XVidC_VideoTimingMode *VmPtr;
+
+	VmPtr = XVidC_GetVideoModeData(VmId);
+	if (!VmPtr) {
+		return XVIDC_VF_UNKNOWN;
+	}
+
+	if (VmPtr->Timing.F1VTotal == 0) {
+		return (XVIDC_VF_PROGRESSIVE);
+	}
+
+	return (XVIDC_VF_INTERLACED);
+}
+
+/******************************************************************************/
+/**
+ * This function checks if the input video mode is interlaced based on its ID
+ * from the video timings table.
+ *
+ * @param	VmId specifies the resolution ID from the video timings table.
+ *
+ * @return
+ *		- 1 if the video timing with the supplied table ID is
+ *		  interlaced.
+ *		- 0 if the video timing is progressive.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+u8 XVidC_IsInterlaced(XVidC_VideoMode VmId)
+{
+	if (XVidC_GetVideoFormat(VmId) == XVIDC_VF_INTERLACED) {
+		return 1;
+	}
+
+	return 0;
+}
+
+/******************************************************************************/
+/**
+ * This function returns the Video Mode ID that matches the detected input
+ * timing, frame rate and I/P flag
+ *
+ * @param	Timing is the pointer to timing parameters to match
+ * @param	FrameRate specifies refresh rate in HZ
+ * @param	IsInterlaced is flag.
+ *		      - 0 = Progressive
+ *			  - 1 = Interlaced.
+ *
+ * @return	Id of a supported video mode.
+ *
+ * @note	This is an extension of XVidC_GetVideoModeId API to include
+ *          blanking information in match process. No attempt is made to
+ *          search for reduced blanking entries, if any.
+ *
+*******************************************************************************/
+XVidC_VideoMode XVidC_GetVideoModeIdWBlanking(const XVidC_VideoTiming *Timing,
+		                                      u32 FrameRate, u8 IsInterlaced)
+{
+  XVidC_VideoMode VmId;
+  XVidC_VideoTiming const *StdTiming = NULL;
+
+  /* First search for ID with matching Width & Height */
+  VmId = XVidC_GetVideoModeId(Timing->HActive, Timing->VActive, FrameRate,
+		                      IsInterlaced);
+
+  if(VmId == XVIDC_VM_NOT_SUPPORTED) {
+	return(VmId);
+  } else {
+
+	/* Get standard timing info from default timing table */
+	StdTiming = XVidC_GetTimingInfo(VmId);
+
+	/* Match against detected timing parameters */
+	if((Timing->HActive        == StdTiming->HActive) &&
+	   (Timing->VActive        == StdTiming->VActive) &&
+	   (Timing->HTotal         == StdTiming->HTotal) &&
+	   (Timing->F0PVTotal      == StdTiming->F0PVTotal) &&
+	   (Timing->HFrontPorch    == StdTiming->HFrontPorch) &&
+	   (Timing->HSyncWidth     == StdTiming->HSyncWidth) &&
+	   (Timing->HBackPorch     == StdTiming->HBackPorch) &&
+	   (Timing->F0PVFrontPorch == StdTiming->F0PVFrontPorch) &&
+	   (Timing->F0PVSyncWidth  == StdTiming->F0PVSyncWidth) &&
+	   (Timing->F0PVBackPorch  == StdTiming->F0PVBackPorch)) {
+       return(VmId);
+	 } else {
+	   return(XVIDC_VM_NOT_SUPPORTED);
+	 }
+  }
+}
+
+/******************************************************************************/
+/**
+ * This function returns the Video Mode ID that matches the detected input
+ * width, height, frame rate and I/P flag
+ *
+ * @param	Width specifies the number pixels per scanline.
+ * @param	Height specifies the number of scanline's.
+ * @param	FrameRate specifies refresh rate in HZ
+ * @param	IsInterlaced is flag.
+ *		- 0 = Progressive
+ *		- 1 = Interlaced.
+ *
+ * @return	Id of a supported video mode.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+XVidC_VideoMode XVidC_GetVideoModeId(u32 Width, u32 Height, u32 FrameRate,
+					u8 IsInterlaced)
+{
+	u32 Low;
+	u32 High;
+	u32 Mid;
+	u32 HActive;
+	u32 VActive;
+	u32 Rate;
+	u32 ResFound = (FALSE);
+	XVidC_VideoMode Mode;
+	u16 Index;
+
+	/* First, attempt a linear search on the custom video timing table. */
+	if(XVidC_CustomTimingModes) {
+	  for (Index = 0; Index < XVidC_NumCustomModes; Index++) {
+		HActive = XVidC_CustomTimingModes[Index].Timing.HActive;
+		VActive = XVidC_CustomTimingModes[Index].Timing.VActive;
+		Rate = XVidC_CustomTimingModes[Index].FrameRate;
+		if ((Width  == HActive) &&
+			(Height == VActive) &&
+			(FrameRate == Rate)) {
+			   return XVidC_CustomTimingModes[Index].VmId;
+		}
+	  }
+	}
+
+	if (IsInterlaced) {
+		Low = (XVIDC_VM_INTL_START);
+		High = (XVIDC_VM_INTL_END);
+	}
+	else {
+		Low = (XVIDC_VM_PROG_START);
+		High = (XVIDC_VM_PROG_END);
+	}
+
+	HActive = VActive = Rate = 0;
+
+	/* Binary search finds item in sorted array.
+	 * And returns index (zero based) of item
+	 * If item is not found returns flag remains
+	 * FALSE. Search key is "width or HActive"
+	 */
+	while (Low <= High) {
+		Mid = (Low + High) / 2;
+		HActive = XVidC_VideoTimingModes[Mid].Timing.HActive;
+		if (Width == HActive) {
+			ResFound = (TRUE);
+			break;
+		}
+		else if (Width < HActive) {
+			if (Mid == 0) {
+				break;
+			}
+			else {
+				High = Mid - 1;
+			}
+		}
+		else {
+			Low = Mid + 1;
+		}
+	}
+
+	 /* HActive matched at middle */
+	if (ResFound) {
+		/* Rewind to start index of mode with matching width */
+		while ((Mid > 0) &&
+			(XVidC_VideoTimingModes[Mid - 1].Timing.HActive ==
+								Width)) {
+			--Mid;
+		}
+
+		ResFound = (FALSE);
+		VActive = XVidC_VideoTimingModes[Mid].Timing.VActive;
+		Rate = XVidC_VideoTimingModes[Mid].FrameRate;
+
+		/* Now do a linear search for matching VActive and Frame
+		 * Rate
+		 */
+		while (HActive == Width) {
+			/* check current entry */
+			if ((VActive == Height) && (Rate == FrameRate)) {
+				ResFound = (TRUE);
+				break;
+			}
+			/* Check next entry */
+			else {
+				Mid = Mid + 1;
+				HActive =
+				XVidC_VideoTimingModes[Mid].Timing.HActive;
+				VActive =
+				XVidC_VideoTimingModes[Mid].Timing.VActive;
+				Rate = XVidC_VideoTimingModes[Mid].FrameRate;
+			}
+		}
+		Mode =
+		(ResFound) ? (XVidC_VideoMode)Mid : (XVIDC_VM_NOT_SUPPORTED);
+	}
+	else {
+		Mode = (XVIDC_VM_NOT_SUPPORTED);
+	}
+
+	return (Mode);
+}
+
+/******************************************************************************/
+/**
+ * This function returns the Video Mode ID that matches the detected input
+ * timing, frame rate and I/P flag
+ *
+ * @param	Timing is the pointer to timing parameters to match
+ * @param	FrameRate specifies refresh rate in HZ
+ * @param	IsInterlaced is flag.
+ *		      - 0 = Progressive
+ *			  - 1 = Interlaced.
+ * @param	IsExtensive is flag.
+ *		      - 0 = Basic matching of timing parameters
+ *			  - 1 = Extensive matching of timing parameters
+ *
+ * @return	Id of a supported video mode.
+ *
+ * @note	This function attempts to search for reduced blanking entries, if
+ *          any.
+ *
+*******************************************************************************/
+XVidC_VideoMode XVidC_GetVideoModeIdExtensive(XVidC_VideoTiming *Timing,
+											  u32 FrameRate,
+											  u8 IsInterlaced,
+											  u8 IsExtensive)
+{
+	u32 Low;
+	u32 High;
+	u32 Mid;
+	u32 HActive;
+	u32 VActive;
+	u32 Rate;
+	u32 ResFound = (FALSE);
+	XVidC_VideoMode Mode;
+	u16 Index;
+
+	/* First, attempt a linear search on the custom video timing table. */
+	if(XVidC_CustomTimingModes) {
+	  for (Index = 0; Index < XVidC_NumCustomModes; Index++) {
+		HActive = XVidC_CustomTimingModes[Index].Timing.HActive;
+		VActive = XVidC_CustomTimingModes[Index].Timing.VActive;
+		Rate = XVidC_CustomTimingModes[Index].FrameRate;
+		if ((HActive == Timing->HActive) && (VActive == Timing->VActive) &&
+				(Rate == FrameRate) && (IsExtensive == 0 || (
+			XVidC_CustomTimingModes[Index].Timing.HTotal == Timing->HTotal &&
+			XVidC_CustomTimingModes[Index].Timing.F0PVTotal ==
+					Timing->F0PVTotal &&
+			XVidC_CustomTimingModes[Index].Timing.HFrontPorch ==
+					Timing->HFrontPorch &&
+			XVidC_CustomTimingModes[Index].Timing.F0PVFrontPorch ==
+					Timing->F0PVFrontPorch &&
+			XVidC_CustomTimingModes[Index].Timing.HSyncWidth ==
+					Timing->HSyncWidth &&
+			XVidC_CustomTimingModes[Index].Timing.F0PVSyncWidth ==
+					Timing->F0PVSyncWidth &&
+			XVidC_CustomTimingModes[Index].Timing.VSyncPolarity ==
+					Timing->VSyncPolarity))) {
+				if (!IsInterlaced || IsExtensive == 0 || (
+						XVidC_CustomTimingModes[Index].Timing.F1VTotal ==
+						Timing->F1VTotal &&
+						XVidC_CustomTimingModes[Index].Timing.F1VFrontPorch ==
+								Timing->F1VFrontPorch &&
+						XVidC_CustomTimingModes[Index].Timing.F1VSyncWidth ==
+								Timing->F1VSyncWidth)) {
+					return XVidC_CustomTimingModes[Index].VmId;
+				}
+		}
+	  }
+	}
+
+	if (IsInterlaced) {
+		Low = (XVIDC_VM_INTL_START);
+		High = (XVIDC_VM_INTL_END);
+	}
+	else {
+		Low = (XVIDC_VM_PROG_START);
+		High = (XVIDC_VM_PROG_END);
+	}
+
+	HActive = VActive = Rate = 0;
+
+	/* Binary search finds item in sorted array.
+	 * And returns index (zero based) of item
+	 * If item is not found returns flag remains
+	 * FALSE. Search key is "Timing->HActive or HActive"
+	 */
+	while (Low <= High) {
+		Mid = (Low + High) / 2;
+		HActive = XVidC_VideoTimingModes[Mid].Timing.HActive;
+		if (Timing->HActive == HActive) {
+			ResFound = (TRUE);
+			break;
+		}
+		else if (Timing->HActive < HActive) {
+			if (Mid == 0) {
+				break;
+			}
+			else {
+				High = Mid - 1;
+			}
+		}
+		else {
+			Low = Mid + 1;
+		}
+	}
+
+	 /* HActive matched at middle */
+	if (ResFound) {
+		/* Rewind to start index of mode with matching Timing->HActive */
+		while ((Mid > 0) &&
+			(XVidC_VideoTimingModes[Mid - 1].Timing.HActive ==
+								Timing->HActive)) {
+			--Mid;
+		}
+
+		ResFound = (FALSE);
+		VActive = XVidC_VideoTimingModes[Mid].Timing.VActive;
+		Rate = XVidC_VideoTimingModes[Mid].FrameRate;
+
+		/* Now do a linear search for matching VActive and Frame
+		 * Rate
+		 */
+		while (HActive == Timing->HActive) {
+			/* check current entry */
+			if ((VActive == Timing->VActive) && (Rate == FrameRate) &&
+					(IsExtensive == 0 ||
+					(XVidC_VideoTimingModes[Mid].Timing.HTotal ==
+							Timing->HTotal &&
+					XVidC_VideoTimingModes[Mid].Timing.F0PVTotal ==
+							Timing->F0PVTotal &&
+					XVidC_VideoTimingModes[Mid].Timing.HFrontPorch ==
+							Timing->HFrontPorch &&
+					XVidC_VideoTimingModes[Mid].Timing.F0PVFrontPorch ==
+							Timing->F0PVFrontPorch &&
+					XVidC_VideoTimingModes[Mid].Timing.HSyncWidth ==
+							Timing->HSyncWidth &&
+					XVidC_VideoTimingModes[Mid].Timing.F0PVSyncWidth ==
+							Timing->F0PVSyncWidth &&
+					XVidC_VideoTimingModes[Mid].Timing.VSyncPolarity ==
+							Timing->VSyncPolarity))) {
+				if (!IsInterlaced || IsExtensive == 0 || (
+						XVidC_VideoTimingModes[Mid].Timing.F1VTotal ==
+								Timing->F1VTotal &&
+						XVidC_VideoTimingModes[Mid].Timing.F1VFrontPorch ==
+								Timing->F1VFrontPorch &&
+						XVidC_VideoTimingModes[Mid].Timing.F1VSyncWidth ==
+								Timing->F1VSyncWidth)) {
+					ResFound = (TRUE);
+					break;
+				}
+			}
+			/* Check next entry */
+			else {
+				Mid = Mid + 1;
+				HActive =
+				XVidC_VideoTimingModes[Mid].Timing.HActive;
+				VActive =
+				XVidC_VideoTimingModes[Mid].Timing.VActive;
+				Rate = XVidC_VideoTimingModes[Mid].FrameRate;
+			}
+		}
+		Mode =
+		(ResFound) ? (XVidC_VideoMode)Mid : (XVIDC_VM_NOT_SUPPORTED);
+	}
+	else {
+		Mode = (XVIDC_VM_NOT_SUPPORTED);
+	}
+
+	return (Mode);
+}
+
+/******************************************************************************/
+/**
+ * This function returns the video mode ID that matches the detected input
+ * width, height, frame rate, interlaced or progressive, and reduced blanking.
+ *
+ * @param	Width specifies the number pixels per scanline.
+ * @param	Height specifies the number of scanline's.
+ * @param	FrameRate specifies refresh rate in HZ
+ * @param	IsInterlaced specifies interlaced or progressive mode:
+ *		- 0 = Progressive
+ *		- 1 = Interlaced.
+ * @param	RbN specifies the type of reduced blanking:
+ *		- 0 = No reduced blanking
+ *		- 1 = RB
+ *		- 2 = RB2
+ *
+ * @return	ID of a supported video mode.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+XVidC_VideoMode XVidC_GetVideoModeIdRb(u32 Width, u32 Height,
+		u32 FrameRate, u8 IsInterlaced, u8 RbN)
+{
+	XVidC_VideoMode VmId;
+	const XVidC_VideoTimingMode *VtmPtr;
+	u8 Found = 0;
+
+	VmId = XVidC_GetVideoModeId(Width, Height, FrameRate,
+				IsInterlaced);
+
+	VtmPtr = XVidC_GetVideoModeData(VmId);
+	if (!VtmPtr) {
+		return XVIDC_VM_NOT_SUPPORTED;
+	}
+
+	while (!Found) {
+		VtmPtr = XVidC_GetVideoModeData(VmId);
+		if ((Height != VtmPtr->Timing.VActive) ||
+		    (Width != VtmPtr->Timing.HActive) ||
+		    (FrameRate != VtmPtr->FrameRate) ||
+		    (IsInterlaced && !XVidC_IsInterlaced(VmId))) {
+			VmId = XVIDC_VM_NOT_SUPPORTED;
+			break;
+		}
+		Found = XVidC_IsVtmRb(XVidC_GetVideoModeStr(VmId), RbN);
+		if (Found) {
+			break;
+		}
+		VmId = (XVidC_VideoMode)((int)VmId + 1);
+	}
+
+	return VmId;
+}
+
+/******************************************************************************/
+/**
+ * This function returns the pointer to video mode data at index provided.
+ *
+ * @param	VmId specifies the resolution id.
+ *
+ * @return	Pointer to XVidC_VideoTimingMode structure based on the given
+ *		video mode.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+const XVidC_VideoTimingMode *XVidC_GetVideoModeData(XVidC_VideoMode VmId)
+{
+	if (VmId < XVIDC_VM_NUM_SUPPORTED) {
+		return &XVidC_VideoTimingModes[VmId];
+	}
+
+	return XVidC_GetCustomVideoModeData(VmId);
+}
+
+/******************************************************************************/
+/**
+ *
+ * This function returns the resolution name for index specified.
+ *
+ * @param	VmId specifies the resolution id.
+ *
+ * @return	Pointer to a resolution name string.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+const char *XVidC_GetVideoModeStr(XVidC_VideoMode VmId)
+{
+	const XVidC_VideoTimingMode *VmPtr;
+
+	if (VmId == XVIDC_VM_CUSTOM) {
+		return ("Custom video mode");
+	}
+
+	VmPtr = XVidC_GetVideoModeData(VmId);
+	if (!VmPtr) {
+		return ("Video mode not supported");
+	}
+
+	return VmPtr->Name;
+}
+
+/******************************************************************************/
+/**
+ * This function returns the frame rate name for index specified.
+ *
+ * @param	VmId specifies the resolution id.
+ *
+ * @return	Pointer to a frame rate name string.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+const char *XVidC_GetFrameRateStr(XVidC_VideoMode VmId)
+{
+	const XVidC_VideoTimingMode *VmPtr;
+
+	VmPtr = XVidC_GetVideoModeData(VmId);
+	if (!VmPtr) {
+		return ("Video mode not supported");
+	}
+
+	switch (VmPtr->FrameRate) {
+		case (XVIDC_FR_24HZ):   return ("24Hz");
+		case (XVIDC_FR_25HZ):   return ("25Hz");
+		case (XVIDC_FR_30HZ):   return ("30Hz");
+		case (XVIDC_FR_48HZ):   return ("48Hz");
+		case (XVIDC_FR_50HZ):   return ("50Hz");
+		case (XVIDC_FR_56HZ):   return ("56Hz");
+		case (XVIDC_FR_60HZ):   return ("60Hz");
+		case (XVIDC_FR_65HZ):   return ("65Hz");
+		case (XVIDC_FR_67HZ):   return ("67Hz");
+		case (XVIDC_FR_70HZ):   return ("70Hz");
+		case (XVIDC_FR_72HZ):   return ("72Hz");
+		case (XVIDC_FR_75HZ):   return ("75Hz");
+		case (XVIDC_FR_85HZ):   return ("85Hz");
+		case (XVIDC_FR_87HZ):   return ("87Hz");
+		case (XVIDC_FR_88HZ):   return ("88Hz");
+		case (XVIDC_FR_96HZ):   return ("96Hz");
+		case (XVIDC_FR_100HZ):  return ("100Hz");
+		case (XVIDC_FR_120HZ):  return ("120Hz");
+
+		default:
+		     return ("Frame rate not supported");
+	}
+}
+
+/******************************************************************************/
+/**
+ * This function returns a string representation of the enumerated type,
+ * XVidC_3DFormat.
+ *
+ * @param	Format specifies the value to convert.
+ *
+ * @return	Pointer to the converted string.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+const char *XVidC_Get3DFormatStr(XVidC_3DFormat Format)
+{
+	switch (Format) {
+		case XVIDC_3D_FRAME_PACKING:
+			return ("Frame Packing");
+
+		case XVIDC_3D_FIELD_ALTERNATIVE:
+			return ("Field Alternative");
+
+		case XVIDC_3D_LINE_ALTERNATIVE:
+			return ("Line Alternative");
+
+		case XVIDC_3D_SIDE_BY_SIDE_FULL:
+			return ("Side-by-Side(full)");
+
+		case XVIDC_3D_TOP_AND_BOTTOM_HALF:
+			return ("Top-and-Bottom(half)");
+
+		case XVIDC_3D_SIDE_BY_SIDE_HALF:
+			return ("Side-by-Side(half)");
+
+		default:
+			return ("Unknown");
+	}
+}
+
+/******************************************************************************/
+/**
+ * This function returns the color format name for index specified.
+ *
+ * @param	ColorFormatId specifies the index of color format space.
+ *
+ * @return	Pointer to a color space name string.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+const char *XVidC_GetColorFormatStr(XVidC_ColorFormat ColorFormatId)
+{
+	switch (ColorFormatId) {
+		case XVIDC_CSF_RGB:            return ("RGB");
+		case XVIDC_CSF_YCRCB_444:      return ("YUV_444");
+		case XVIDC_CSF_YCRCB_422:      return ("YUV_422");
+		case XVIDC_CSF_YCRCB_420:      return ("YUV_420");
+		case XVIDC_CSF_YONLY:          return ("Y_ONLY");
+		case XVIDC_CSF_RGBA:           return ("RGBA");
+		case XVIDC_CSF_YCRCBA_444:     return ("YUVA_444");
+		case XVIDC_CSF_MEM_RGBX8:      return ("RGBX8");
+		case XVIDC_CSF_MEM_YUVX8:      return ("YUVX8");
+		case XVIDC_CSF_MEM_YUYV8:      return ("YUYV8");
+		case XVIDC_CSF_MEM_RGBA8:      return ("RGBA8");
+		case XVIDC_CSF_MEM_YUVA8:      return ("YUVA8");
+		case XVIDC_CSF_MEM_RGBX10:     return ("RGBX10");
+		case XVIDC_CSF_MEM_YUVX10:     return ("YUVX10");
+		case XVIDC_CSF_MEM_RGB565:     return ("RGB565");
+		case XVIDC_CSF_MEM_Y_UV8:      return ("Y_UV8");
+		case XVIDC_CSF_MEM_Y_UV8_420:  return ("Y_UV8_420");
+		case XVIDC_CSF_MEM_RGB8:       return ("RGB8");
+		case XVIDC_CSF_MEM_YUV8:       return ("YUV8");
+		case XVIDC_CSF_MEM_Y_UV10:     return ("Y_UV10");
+		case XVIDC_CSF_MEM_Y_UV10_420: return ("Y_UV10_420");
+		case XVIDC_CSF_MEM_Y8:         return ("Y8");
+		case XVIDC_CSF_MEM_Y10:        return ("Y10");
+		case XVIDC_CSF_MEM_BGRA8:      return ("BGRA8");
+		case XVIDC_CSF_MEM_BGRX8:      return ("BGRX8");
+		case XVIDC_CSF_MEM_UYVY8:      return ("UYVY8");
+		case XVIDC_CSF_MEM_BGR8:       return ("BGR8");
+		case XVIDC_CSF_YCBCR_422:      return ("YCBCR_422");
+		case XVIDC_CSF_YCBCR_420:      return ("YCBCR_420");
+		default:
+					       return ("Color space format not supported");
+	}
+}
+
+/******************************************************************************/
+/**
+ * This function returns the frame rate for index specified.
+ *
+ * @param	VmId specifies the resolution id.
+ *
+ * @return	Frame rate in Hz.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+XVidC_FrameRate XVidC_GetFrameRate(XVidC_VideoMode VmId)
+{
+	const XVidC_VideoTimingMode *VmPtr;
+
+	VmPtr = XVidC_GetVideoModeData(VmId);
+	if (!VmPtr) {
+		return XVIDC_FR_NUM_SUPPORTED;
+	}
+
+	return VmPtr->FrameRate;
+}
+
+/******************************************************************************/
+/**
+ * This function returns the timing parameters for specified resolution.
+ *
+ * @param	VmId specifies the resolution id.
+ *
+ * @return	Pointer to a XVidC_VideoTiming structure.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+const XVidC_VideoTiming *XVidC_GetTimingInfo(XVidC_VideoMode VmId)
+{
+	const XVidC_VideoTimingMode *VmPtr;
+
+	VmPtr = XVidC_GetVideoModeData(VmId);
+	if (!VmPtr) {
+		return NULL;
+	}
+
+	return &VmPtr->Timing;
+}
+
+/******************************************************************************/
+/**
+ * This function sets the VideoStream structure for the specified video format.
+ *
+ * @param	VidStrmPtr is a pointer to the XVidC_VideoStream structure to be
+ *		set.
+ * @param	VmId specifies the resolution ID.
+ * @param	ColorFormat specifies the color format type.
+ * @param	Bpc specifies the color depth/bits per color component.
+ * @param	Ppc specifies the pixels per clock.
+ *
+ * @return
+ *		- XST_SUCCESS if the timing for the supplied ID was found.
+ *		- XST_FAILURE, otherwise.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+u32 XVidC_SetVideoStream(XVidC_VideoStream *VidStrmPtr, XVidC_VideoMode VmId,
+			 XVidC_ColorFormat ColorFormat, XVidC_ColorDepth Bpc,
+			 XVidC_PixelsPerClock Ppc)
+{
+	const XVidC_VideoTiming *TimingPtr;
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(VidStrmPtr != NULL);
+	Xil_AssertNonvoid(ColorFormat < XVIDC_CSF_NUM_SUPPORTED);
+	Xil_AssertNonvoid((Bpc == XVIDC_BPC_6)  ||
+			  (Bpc == XVIDC_BPC_8)  ||
+			  (Bpc == XVIDC_BPC_10) ||
+			  (Bpc == XVIDC_BPC_12) ||
+			  (Bpc == XVIDC_BPC_14) ||
+			  (Bpc == XVIDC_BPC_16) ||
+			  (Bpc == XVIDC_BPC_UNKNOWN));
+	Xil_AssertNonvoid((Ppc == XVIDC_PPC_1) ||
+			  (Ppc == XVIDC_PPC_2) ||
+			  (Ppc == XVIDC_PPC_4));
+
+	/* Get the timing from the video timing table. */
+	TimingPtr = XVidC_GetTimingInfo(VmId);
+	if (!TimingPtr) {
+		return XST_FAILURE;
+	}
+	VidStrmPtr->VmId		= VmId;
+	VidStrmPtr->Timing		= *TimingPtr;
+	VidStrmPtr->FrameRate		= XVidC_GetFrameRate(VmId);
+	VidStrmPtr->IsInterlaced	= XVidC_IsInterlaced(VmId);
+	VidStrmPtr->ColorFormatId	= ColorFormat;
+	VidStrmPtr->ColorDepth		= Bpc;
+	VidStrmPtr->PixPerClk		= Ppc;
+
+	/* Set stream to 2D. */
+	VidStrmPtr->Is3D			= FALSE;
+	VidStrmPtr->Info_3D.Format		= XVIDC_3D_UNKNOWN;
+	VidStrmPtr->Info_3D.Sampling.Method	= XVIDC_3D_SAMPLING_UNKNOWN;
+	VidStrmPtr->Info_3D.Sampling.Position	= XVIDC_3D_SAMPPOS_UNKNOWN;
+
+	return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function sets the VideoStream structure for the specified 3D video
+ * format.
+ *
+ * @param	VidStrmPtr is a pointer to the XVidC_VideoStream structure to be
+ *		set.
+ * @param	VmId specifies the resolution ID.
+ * @param	ColorFormat specifies the color format type.
+ * @param	Bpc specifies the color depth/bits per color component.
+ * @param	Ppc specifies the pixels per clock.
+ * @param	Info3DPtr is a pointer to a XVidC_3DInfo structure.
+ *
+ * @return
+ *		- XST_SUCCESS if the timing for the supplied ID was found.
+ *		- XST_FAILURE, otherwise.
+ *
+ * @return
+ *		- XST_SUCCESS
+ *		- XST_FAILURE
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+u32 XVidC_Set3DVideoStream(XVidC_VideoStream *VidStrmPtr, XVidC_VideoMode VmId,
+			   XVidC_ColorFormat ColorFormat, XVidC_ColorDepth Bpc,
+			   XVidC_PixelsPerClock Ppc, XVidC_3DInfo *Info3DPtr)
+{
+	u32 Status;
+	u16 Vblank0;
+	u16 Vblank1;
+
+	/* Verify arguments */
+	Xil_AssertNonvoid(Info3DPtr != NULL);
+
+	/* Initialize with info for 2D frame. */
+	Status = XVidC_SetVideoStream(VidStrmPtr, VmId, ColorFormat, Bpc, Ppc);
+	if (Status != XST_SUCCESS) {
+		return XST_FAILURE;
+	}
+
+	/* Set stream to 3D. */
+	VidStrmPtr->Is3D	= TRUE;
+	VidStrmPtr->Info_3D	= *Info3DPtr;
+
+	/* Only 3D format supported is frame packing. */
+	if (Info3DPtr->Format != XVIDC_3D_FRAME_PACKING) {
+		return XST_FAILURE;
+	}
+
+	/* Update the timing based on the 3D format. */
+
+	/* An interlaced format is converted to a progressive frame: */
+	/*	3D VActive = (2D VActive * 4) + (2D VBlank field0) +
+						(2D Vblank field1 * 2) */
+	if (VidStrmPtr->IsInterlaced) {
+		Vblank0 = VidStrmPtr->Timing.F0PVTotal -
+						VidStrmPtr->Timing.VActive;
+		Vblank1 = VidStrmPtr->Timing.F1VTotal -
+						VidStrmPtr->Timing.VActive;
+		VidStrmPtr->Timing.VActive = (VidStrmPtr->Timing.VActive * 4) +
+						Vblank0 + (Vblank1 * 2);
+
+		/* Set VTotal */
+		VidStrmPtr->Timing.F0PVTotal *= 2;
+		VidStrmPtr->Timing.F0PVTotal += VidStrmPtr->Timing.F1VTotal * 2;
+
+		/* Clear field 1 values. */
+		VidStrmPtr->Timing.F1VFrontPorch = 0;
+		VidStrmPtr->Timing.F1VSyncWidth  = 0;
+		VidStrmPtr->Timing.F1VBackPorch  = 0;
+		VidStrmPtr->Timing.F1VTotal      = 0;
+
+		/* Set format to progressive */
+		VidStrmPtr->IsInterlaced = FALSE;
+	}
+	/* Progressive */
+	else {
+		/* 3D Vactive = (2D VActive * 2) + (2D VBlank) */
+		Vblank0 = VidStrmPtr->Timing.F0PVTotal -
+						VidStrmPtr->Timing.VActive;
+		VidStrmPtr->Timing.VActive = (VidStrmPtr->Timing.VActive * 2) +
+						Vblank0;
+
+		/* Set VTotal. */
+		VidStrmPtr->Timing.F0PVTotal = VidStrmPtr->Timing.F0PVTotal * 2;
+	}
+
+	return XST_SUCCESS;
+}
+
+/******************************************************************************/
+/**
+ * This function prints the stream information on STDIO/UART console.
+ *
+ * @param	Stream is a pointer to video stream.
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+void XVidC_ReportStreamInfo(const XVidC_VideoStream *Stream)
+{
+	if (!XVidC_GetVideoModeData(Stream->VmId) &&
+			(Stream->VmId != XVIDC_VM_CUSTOM)) {
+		xil_printf("\tThe stream ID (%d) is not supported.\r\n",
+				Stream->VmId);
+		return;
+	}
+
+	xil_printf("\tColor Format:     %s\r\n",
+			XVidC_GetColorFormatStr(Stream->ColorFormatId));
+	xil_printf("\tColor Depth:      %d\r\n", Stream->ColorDepth);
+	xil_printf("\tPixels Per Clock: %d\r\n", Stream->PixPerClk);
+	xil_printf("\tMode:             %s\r\n",
+			Stream->IsInterlaced ? "Interlaced" : "Progressive");
+
+	if (Stream->Is3D) {
+		xil_printf("\t3D Format:        %s\r\n",
+		XVidC_Get3DFormatStr(Stream->Info_3D.Format));
+	}
+
+	if (Stream->VmId == XVIDC_VM_CUSTOM) {
+		xil_printf("\tFrame Rate:       %dHz\r\n",
+				Stream->FrameRate);
+		xil_printf("\tResolution:       %dx%d [Custom Mode]\r\n",
+				Stream->Timing.HActive, Stream->Timing.VActive);
+		xil_printf("\tPixel Clock:      %d\r\n",
+				XVidC_GetPixelClockHzByHVFr(
+					Stream->Timing.HTotal,
+					Stream->Timing.F0PVTotal,
+					Stream->FrameRate));
+	}
+	else {
+		xil_printf("\tFrame Rate:       %s\r\n",
+				XVidC_GetFrameRateStr(Stream->VmId));
+		xil_printf("\tResolution:       %s\r\n",
+				XVidC_GetVideoModeStr(Stream->VmId));
+		xil_printf("\tPixel Clock:      %d\r\n",
+				XVidC_GetPixelClockHzByVmId(Stream->VmId));
+	}
+}
+
+/******************************************************************************/
+/**
+ * This function prints timing information on STDIO/Uart console.
+ *
+ * @param	Timing is a pointer to Video Timing structure of the stream.
+ * @param	IsInterlaced is a TRUE/FALSE flag that denotes the timing
+ *		parameter is for interlaced/progressive stream.
+ *
+ * @return	None.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+void XVidC_ReportTiming(const XVidC_VideoTiming *Timing, u8 IsInterlaced)
+{
+	xil_printf("\r\n\tHSYNC Timing: hav=%04d, hfp=%02d, hsw=%02d(hsp=%d), "
+			"hbp=%03d, htot=%04d \n\r", Timing->HActive,
+			Timing->HFrontPorch, Timing->HSyncWidth,
+			Timing->HSyncPolarity,
+			Timing->HBackPorch, Timing->HTotal);
+
+	/* Interlaced */
+	if (IsInterlaced) {
+		xil_printf("\tVSYNC Timing (Field 0): vav=%04d, vfp=%02d, "
+			"vsw=%02d(vsp=%d), vbp=%03d, vtot=%04d\n\r",
+			Timing->VActive, Timing->F0PVFrontPorch,
+			Timing->F0PVSyncWidth, Timing->VSyncPolarity,
+			Timing->F0PVBackPorch, Timing->F0PVTotal);
+	xil_printf("\tVSYNC Timing (Field 1): vav=%04d, vfp=%02d, "
+			"vsw=%02d(vsp=%d), vbp=%03d, vtot=%04d\n\r",
+			Timing->VActive, Timing->F1VFrontPorch,
+			Timing->F1VSyncWidth, Timing->VSyncPolarity,
+			Timing->F1VBackPorch, Timing->F1VTotal);
+	}
+	/* Progressive */
+	else {
+		xil_printf("\tVSYNC Timing: vav=%04d, vfp=%02d, "
+			"vsw=%02d(vsp=%d), vbp=%03d, vtot=%04d\n\r",
+			Timing->VActive, Timing->F0PVFrontPorch,
+			Timing->F0PVSyncWidth, Timing->VSyncPolarity,
+			Timing->F0PVBackPorch, Timing->F0PVTotal);
+	}
+}
+
+/******************************************************************************/
+/**
+ * This function returns the pointer to video mode data at the provided index
+ * of the custom video mode table.
+ *
+ * @param	VmId specifies the resolution ID.
+ *
+ * @return	Pointer to XVidC_VideoTimingMode structure based on the given
+ *		video mode.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static const XVidC_VideoTimingMode *XVidC_GetCustomVideoModeData(
+		XVidC_VideoMode VmId)
+{
+	u16 Index;
+
+	for (Index = 0; Index < XVidC_NumCustomModes; Index++) {
+		if (VmId == (XVidC_CustomTimingModes[Index].VmId)) {
+			return &(XVidC_CustomTimingModes[Index]);
+		}
+	}
+
+	/* ID not found within the custom video mode table. */
+	return NULL;
+}
+
+/******************************************************************************/
+/**
+ * This function returns whether or not the video timing mode is a reduced
+ * blanking mode or not.
+ *
+ * @param	VideoModeStr specifies the resolution name string.
+ * @param	RbN specifies the type of reduced blanking:
+ *		- 0 = No Reduced Blanking
+ *		- 1 = RB
+ *		- 2 = RB2
+ *
+ * @return	If the reduced blanking type is compatible with the video mode:
+ *		- 0 = Not supported
+ *		- 1 = Video mode supports the RB type
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static u8 XVidC_IsVtmRb(const char *VideoModeStr, u8 RbN)
+{
+	while ((*VideoModeStr !='\0') && (*VideoModeStr != 'R')) {
+		VideoModeStr++;
+	}
+
+	if (*(VideoModeStr + 2) == ')') {
+		return RbN == 1;
+	}
+	if (*(VideoModeStr + 2) == '2') {
+		return RbN == 2;
+	}
+	return 0;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/video_common_v4_3/src/xvidc.h b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc.h
new file mode 100644
index 0000000..bcd3d0b
--- /dev/null
+++ b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc.h
@@ -0,0 +1,621 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xvidc.h
+ * @addtogroup video_common_v4_3
+ * @{
+ * @details
+ *
+ * Contains common structures, definitions, macros, and utility functions that
+ * are typically used by video-related drivers and applications.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   rc,  01/10/15 Initial release.
+ *       als
+ * 2.0   als  08/14/15 Added new video timings.
+ * 2.2   als  02/01/16 Functions with pointer arguments that don't modify
+ *                     contents now const.
+ *                     Added ability to insert a custom video timing table:
+ *                         XVidC_RegisterCustomTimingModes
+ *                         XVidC_UnregisterCustomTimingMode
+ *       yh            Added 3D support.
+ * 3.0   aad  05/13/16 Added API to search for RB video modes.
+ *       als  05/16/16 Added Y-only to color format enum.
+ * 3.1   rco  07/26/17 Moved timing table extern definition to xvidc.c
+ *                     Added video-in-memory color formats
+ *                     Updated XVidC_RegisterCustomTimingModes API signature
+ * 4.1   rco  11/23/17 Added new memory formats
+ *                     Added xil_printf include statement
+ *                     Added new API XVidC_GetVideoModeIdWBlanking
+ *                     Fix C++ warnings
+ * 4.2   jsr  07/22/17 Added new video modes, framerates, color formats for SDI
+ *                     New member AspectRatio is added to video stream structure
+ *                     Reordered XVidC_VideoMode enum variables and corrected the
+ *                     memory format enums
+ *       aad  07/10/17 Add XVIDC_VM_3840x2160_60_P_RB video format
+ *       vyc  10/04/17 Added new streaming alpha formats and new memory formats
+ *       aad  09/05/17 Add XVIDC_VM_1366x768_60_P_RB resolution
+ * 4.3   eb   26/01/18 Added API XVidC_GetVideoModeIdExtensive
+ *       jsr  02/22/18 Added XVIDC_CSF_YCBCR_420 color space format
+ *       vyc  04/04/18 Added BGR8 memory format
+ * 

+ *
+*******************************************************************************/
+
+#ifndef XVIDC_H_  /* Prevent circular inclusions by using protection macros. */
+#define XVIDC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************* Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_printf.h"
+
+/************************** Constant Definitions ******************************/
+
+/**
+ * This typedef enumerates the list of available standard display monitor
+ * timings as specified in the xvidc_timings_table.c file. The naming format is:
+ *
+ * XVIDC_VM___(_RB)
+ *
+ * Where RB stands for reduced blanking.
+ */
+typedef enum {
+	/* Interlaced modes. */
+	XVIDC_VM_720x480_60_I = 0,
+	XVIDC_VM_720x576_50_I,
+	XVIDC_VM_1440x480_60_I,
+	XVIDC_VM_1440x576_50_I,
+	XVIDC_VM_1920x1080_48_I,
+	XVIDC_VM_1920x1080_50_I,
+	XVIDC_VM_1920x1080_60_I,
+	XVIDC_VM_1920x1080_96_I,
+	XVIDC_VM_1920x1080_100_I,
+	XVIDC_VM_1920x1080_120_I,
+	XVIDC_VM_2048x1080_48_I,
+	XVIDC_VM_2048x1080_50_I,
+	XVIDC_VM_2048x1080_60_I,
+	XVIDC_VM_2048x1080_96_I,
+	XVIDC_VM_2048x1080_100_I,
+	XVIDC_VM_2048x1080_120_I,
+
+
+	/* Progressive modes. */
+	XVIDC_VM_640x350_85_P,
+	XVIDC_VM_640x480_60_P,
+	XVIDC_VM_640x480_72_P,
+	XVIDC_VM_640x480_75_P,
+	XVIDC_VM_640x480_85_P,
+	XVIDC_VM_720x400_85_P,
+	XVIDC_VM_720x480_60_P,
+	XVIDC_VM_720x576_50_P,
+	XVIDC_VM_800x600_56_P,
+	XVIDC_VM_800x600_60_P,
+	XVIDC_VM_800x600_72_P,
+	XVIDC_VM_800x600_75_P,
+	XVIDC_VM_800x600_85_P,
+	XVIDC_VM_800x600_120_P_RB,
+	XVIDC_VM_848x480_60_P,
+	XVIDC_VM_1024x768_60_P,
+	XVIDC_VM_1024x768_70_P,
+	XVIDC_VM_1024x768_75_P,
+	XVIDC_VM_1024x768_85_P,
+	XVIDC_VM_1024x768_120_P_RB,
+	XVIDC_VM_1152x864_75_P,
+	XVIDC_VM_1280x720_24_P,
+	XVIDC_VM_1280x720_25_P,
+	XVIDC_VM_1280x720_30_P,
+	XVIDC_VM_1280x720_50_P,
+	XVIDC_VM_1280x720_60_P,
+	XVIDC_VM_1280x768_60_P,
+	XVIDC_VM_1280x768_60_P_RB,
+	XVIDC_VM_1280x768_75_P,
+	XVIDC_VM_1280x768_85_P,
+	XVIDC_VM_1280x768_120_P_RB,
+	XVIDC_VM_1280x800_60_P,
+	XVIDC_VM_1280x800_60_P_RB,
+	XVIDC_VM_1280x800_75_P,
+	XVIDC_VM_1280x800_85_P,
+	XVIDC_VM_1280x800_120_P_RB,
+	XVIDC_VM_1280x960_60_P,
+	XVIDC_VM_1280x960_85_P,
+	XVIDC_VM_1280x960_120_P_RB,
+	XVIDC_VM_1280x1024_60_P,
+	XVIDC_VM_1280x1024_75_P,
+	XVIDC_VM_1280x1024_85_P,
+	XVIDC_VM_1280x1024_120_P_RB,
+	XVIDC_VM_1360x768_60_P,
+	XVIDC_VM_1360x768_120_P_RB,
+	XVIDC_VM_1366x768_60_P,
+	XVIDC_VM_1366x768_60_P_RB,
+	XVIDC_VM_1400x1050_60_P,
+	XVIDC_VM_1400x1050_60_P_RB,
+	XVIDC_VM_1400x1050_75_P,
+	XVIDC_VM_1400x1050_85_P,
+	XVIDC_VM_1400x1050_120_P_RB,
+	XVIDC_VM_1440x240_60_P,
+	XVIDC_VM_1440x900_60_P,
+	XVIDC_VM_1440x900_60_P_RB,
+	XVIDC_VM_1440x900_75_P,
+	XVIDC_VM_1440x900_85_P,
+	XVIDC_VM_1440x900_120_P_RB,
+	XVIDC_VM_1600x1200_60_P,
+	XVIDC_VM_1600x1200_65_P,
+	XVIDC_VM_1600x1200_70_P,
+	XVIDC_VM_1600x1200_75_P,
+	XVIDC_VM_1600x1200_85_P,
+	XVIDC_VM_1600x1200_120_P_RB,
+	XVIDC_VM_1680x720_50_P,
+	XVIDC_VM_1680x720_60_P,
+	XVIDC_VM_1680x720_100_P,
+	XVIDC_VM_1680x720_120_P,
+	XVIDC_VM_1680x1050_50_P,
+	XVIDC_VM_1680x1050_60_P,
+	XVIDC_VM_1680x1050_60_P_RB,
+	XVIDC_VM_1680x1050_75_P,
+	XVIDC_VM_1680x1050_85_P,
+	XVIDC_VM_1680x1050_120_P_RB,
+	XVIDC_VM_1792x1344_60_P,
+	XVIDC_VM_1792x1344_75_P,
+	XVIDC_VM_1792x1344_120_P_RB,
+	XVIDC_VM_1856x1392_60_P,
+	XVIDC_VM_1856x1392_75_P,
+	XVIDC_VM_1856x1392_120_P_RB,
+	XVIDC_VM_1920x1080_24_P,
+	XVIDC_VM_1920x1080_25_P,
+	XVIDC_VM_1920x1080_30_P,
+	XVIDC_VM_1920x1080_48_P,
+	XVIDC_VM_1920x1080_50_P,
+	XVIDC_VM_1920x1080_60_P,
+	XVIDC_VM_1920x1080_100_P,
+	XVIDC_VM_1920x1080_120_P,
+	XVIDC_VM_1920x1200_60_P,
+	XVIDC_VM_1920x1200_60_P_RB,
+	XVIDC_VM_1920x1200_75_P,
+	XVIDC_VM_1920x1200_85_P,
+	XVIDC_VM_1920x1200_120_P_RB,
+	XVIDC_VM_1920x1440_60_P,
+	XVIDC_VM_1920x1440_75_P,
+	XVIDC_VM_1920x1440_120_P_RB,
+	XVIDC_VM_1920x2160_60_P,
+	XVIDC_VM_2048x1080_24_P,
+	XVIDC_VM_2048x1080_25_P,
+	XVIDC_VM_2048x1080_30_P,
+	XVIDC_VM_2048x1080_48_P,
+	XVIDC_VM_2048x1080_50_P,
+	XVIDC_VM_2048x1080_60_P,
+	XVIDC_VM_2048x1080_100_P,
+	XVIDC_VM_2048x1080_120_P,
+	XVIDC_VM_2560x1080_50_P,
+	XVIDC_VM_2560x1080_60_P,
+	XVIDC_VM_2560x1080_100_P,
+	XVIDC_VM_2560x1080_120_P,
+	XVIDC_VM_2560x1600_60_P,
+	XVIDC_VM_2560x1600_60_P_RB,
+	XVIDC_VM_2560x1600_75_P,
+	XVIDC_VM_2560x1600_85_P,
+	XVIDC_VM_2560x1600_120_P_RB,
+	XVIDC_VM_3840x2160_24_P,
+	XVIDC_VM_3840x2160_25_P,
+	XVIDC_VM_3840x2160_30_P,
+	XVIDC_VM_3840x2160_48_P,
+	XVIDC_VM_3840x2160_50_P,
+	XVIDC_VM_3840x2160_60_P,
+	XVIDC_VM_3840x2160_60_P_RB,
+	XVIDC_VM_4096x2160_24_P,
+	XVIDC_VM_4096x2160_25_P,
+	XVIDC_VM_4096x2160_30_P,
+	XVIDC_VM_4096x2160_48_P,
+	XVIDC_VM_4096x2160_50_P,
+	XVIDC_VM_4096x2160_60_P,
+	XVIDC_VM_4096x2160_60_P_RB,
+
+	XVIDC_VM_NUM_SUPPORTED,
+	XVIDC_VM_USE_EDID_PREFERRED,
+	XVIDC_VM_NO_INPUT,
+	XVIDC_VM_NOT_SUPPORTED,
+	XVIDC_VM_CUSTOM,
+
+	/* Marks beginning/end of interlaced/progressive modes in the table. */
+	XVIDC_VM_INTL_START = XVIDC_VM_720x480_60_I,
+	XVIDC_VM_PROG_START = XVIDC_VM_640x350_85_P,
+	XVIDC_VM_INTL_END = (XVIDC_VM_PROG_START - 1),
+	XVIDC_VM_PROG_END = (XVIDC_VM_NUM_SUPPORTED - 1),
+
+	/* Common naming. */
+	XVIDC_VM_480_60_I = XVIDC_VM_720x480_60_I,
+	XVIDC_VM_576_50_I = XVIDC_VM_720x576_50_I,
+	XVIDC_VM_1080_50_I = XVIDC_VM_1920x1080_50_I,
+	XVIDC_VM_1080_60_I = XVIDC_VM_1920x1080_60_I,
+	XVIDC_VM_VGA_60_P = XVIDC_VM_640x480_60_P,
+	XVIDC_VM_480_60_P = XVIDC_VM_720x480_60_P,
+	XVIDC_VM_SVGA_60_P = XVIDC_VM_800x600_60_P,
+	XVIDC_VM_XGA_60_P = XVIDC_VM_1024x768_60_P,
+	XVIDC_VM_720_50_P = XVIDC_VM_1280x720_50_P,
+	XVIDC_VM_720_60_P = XVIDC_VM_1280x720_60_P,
+	XVIDC_VM_WXGA_60_P = XVIDC_VM_1366x768_60_P,
+	XVIDC_VM_UXGA_60_P = XVIDC_VM_1600x1200_60_P,
+	XVIDC_VM_WSXGA_60_P = XVIDC_VM_1680x1050_60_P,
+	XVIDC_VM_1080_24_P = XVIDC_VM_1920x1080_24_P,
+	XVIDC_VM_1080_25_P = XVIDC_VM_1920x1080_25_P,
+	XVIDC_VM_1080_30_P = XVIDC_VM_1920x1080_30_P,
+	XVIDC_VM_1080_50_P = XVIDC_VM_1920x1080_50_P,
+	XVIDC_VM_1080_60_P = XVIDC_VM_1920x1080_60_P,
+	XVIDC_VM_WUXGA_60_P = XVIDC_VM_1920x1200_60_P,
+	XVIDC_VM_UHD2_60_P = XVIDC_VM_1920x2160_60_P,
+	XVIDC_VM_UHD_24_P = XVIDC_VM_3840x2160_24_P,
+	XVIDC_VM_UHD_25_P = XVIDC_VM_3840x2160_25_P,
+	XVIDC_VM_UHD_30_P = XVIDC_VM_3840x2160_30_P,
+	XVIDC_VM_UHD_60_P = XVIDC_VM_3840x2160_60_P,
+	XVIDC_VM_4K2K_60_P = XVIDC_VM_4096x2160_60_P,
+	XVIDC_VM_4K2K_60_P_RB = XVIDC_VM_4096x2160_60_P_RB,
+} XVidC_VideoMode;
+
+/**
+ * Progressive/interlaced video format.
+ */
+typedef enum {
+	XVIDC_VF_PROGRESSIVE = 0,
+	XVIDC_VF_INTERLACED,
+	XVIDC_VF_UNKNOWN
+} XVidC_VideoFormat;
+
+/**
+ * Frame rate.
+ */
+typedef enum {
+	XVIDC_FR_24HZ = 24,
+	XVIDC_FR_25HZ = 25,
+	XVIDC_FR_30HZ = 30,
+	XVIDC_FR_48HZ = 48,
+	XVIDC_FR_50HZ = 50,
+	XVIDC_FR_56HZ = 56,
+	XVIDC_FR_60HZ = 60,
+	XVIDC_FR_65HZ = 65,
+	XVIDC_FR_67HZ = 67,
+	XVIDC_FR_70HZ = 70,
+	XVIDC_FR_72HZ = 72,
+	XVIDC_FR_75HZ = 75,
+	XVIDC_FR_85HZ = 85,
+	XVIDC_FR_87HZ = 87,
+	XVIDC_FR_88HZ = 88,
+	XVIDC_FR_96HZ = 96,
+	XVIDC_FR_100HZ = 100,
+	XVIDC_FR_120HZ = 120,
+	XVIDC_FR_NUM_SUPPORTED = 18,
+	XVIDC_FR_UNKNOWN
+} XVidC_FrameRate;
+
+/**
+ * Color depth - bits per color component.
+ */
+typedef enum {
+	XVIDC_BPC_6 = 6,
+	XVIDC_BPC_8 = 8,
+	XVIDC_BPC_10 = 10,
+	XVIDC_BPC_12 = 12,
+	XVIDC_BPC_14 = 14,
+	XVIDC_BPC_16 = 16,
+	XVIDC_BPC_NUM_SUPPORTED = 6,
+	XVIDC_BPC_UNKNOWN
+} XVidC_ColorDepth;
+
+/**
+ * Pixels per clock.
+ */
+typedef enum {
+	XVIDC_PPC_1 = 1,
+	XVIDC_PPC_2 = 2,
+	XVIDC_PPC_4 = 4,
+	XVIDC_PPC_8 = 8,
+	XVIDC_PPC_NUM_SUPPORTED = 4,
+} XVidC_PixelsPerClock;
+
+/**
+ * Color space format.
+ */
+typedef enum {
+	/* Streaming video formats */
+	XVIDC_CSF_RGB = 0,
+	XVIDC_CSF_YCRCB_444,
+	XVIDC_CSF_YCRCB_422,
+	XVIDC_CSF_YCRCB_420,
+	XVIDC_CSF_YONLY,
+	XVIDC_CSF_RGBA,
+	XVIDC_CSF_YCRCBA_444,
+
+	/* 6 empty slots reserved for video formats for future
+	 * extension
+	 */
+
+	/* Video in memory formats */
+	XVIDC_CSF_MEM_RGBX8 = 10,   // [31:0] x:B:G:R 8:8:8:8
+	XVIDC_CSF_MEM_YUVX8,        // [31:0] x:V:U:Y 8:8:8:8
+	XVIDC_CSF_MEM_YUYV8,        // [31:0] V:Y:U:Y 8:8:8:8
+	XVIDC_CSF_MEM_RGBA8,        // [31:0] A:B:G:R 8:8:8:8
+	XVIDC_CSF_MEM_YUVA8,        // [31:0] A:V:U:Y 8:8:8:8
+	XVIDC_CSF_MEM_RGBX10,       // [31:0] x:B:G:R 2:10:10:10
+	XVIDC_CSF_MEM_YUVX10,       // [31:0] x:V:U:Y 2:10:10:10
+	XVIDC_CSF_MEM_RGB565,       // [15:0] B:G:R 5:6:5
+	XVIDC_CSF_MEM_Y_UV8,        // [15:0] Y:Y 8:8, [15:0] V:U 8:8
+	XVIDC_CSF_MEM_Y_UV8_420,    // [15:0] Y:Y 8:8, [15:0] V:U 8:8
+	XVIDC_CSF_MEM_RGB8,         // [23:0] B:G:R 8:8:8
+	XVIDC_CSF_MEM_YUV8,         // [24:0] V:U:Y 8:8:8
+	XVIDC_CSF_MEM_Y_UV10,       // [31:0] x:Y:Y:Y 2:10:10:10 [31:0] x:U:V:U 2:10:10:10
+	XVIDC_CSF_MEM_Y_UV10_420,   // [31:0] x:Y:Y:Y 2:10:10:10 [31:0] x:U:V:U 2:10:10:10
+	XVIDC_CSF_MEM_Y8,           // [31:0] Y:Y:Y:Y 8:8:8:8
+	XVIDC_CSF_MEM_Y10,          // [31:0] x:Y:Y:Y 2:10:10:10
+	XVIDC_CSF_MEM_BGRA8,        // [31:0] A:R:G:B 8:8:8:8
+	XVIDC_CSF_MEM_BGRX8,        // [31:0] X:R:G:B 8:8:8:8
+	XVIDC_CSF_MEM_UYVY8,        // [31:0] Y:V:Y:U 8:8:8:8
+	XVIDC_CSF_MEM_BGR8,         // [23:0] R:G:B 8:8:8
+	XVIDC_CSF_MEM_END,          // End of memory formats
+
+	/* Streaming formats with components re-ordered */
+	XVIDC_CSF_YCBCR_422 = 64,
+	XVIDC_CSF_YCBCR_420,
+
+
+	XVIDC_CSF_NUM_SUPPORTED,    // includes the reserved slots
+	XVIDC_CSF_UNKNOWN,
+	XVIDC_CSF_STRM_START = XVIDC_CSF_RGB,
+	XVIDC_CSF_STRM_END   = XVIDC_CSF_YONLY,
+	XVIDC_CSF_MEM_START  = XVIDC_CSF_MEM_RGBX8,
+	XVIDC_CSF_NUM_STRM   = (XVIDC_CSF_STRM_END - XVIDC_CSF_STRM_START + 1),
+	XVIDC_CSF_NUM_MEM    = (XVIDC_CSF_MEM_END - XVIDC_CSF_MEM_START)
+} XVidC_ColorFormat;
+
+
+/**
+ * Image Aspect Ratio.
+ */
+typedef enum {
+	XVIDC_AR_4_3 = 0,
+	XVIDC_AR_16_9 = 1
+} XVidC_AspectRatio;
+
+/**
+ * Color space conversion standard.
+ */
+typedef enum {
+	XVIDC_BT_2020 = 0,
+	XVIDC_BT_709,
+	XVIDC_BT_601,
+	XVIDC_BT_NUM_SUPPORTED,
+	XVIDC_BT_UNKNOWN
+} XVidC_ColorStd;
+
+/**
+ * Color conversion output range.
+ */
+typedef enum {
+	XVIDC_CR_16_235 = 0,
+	XVIDC_CR_16_240,
+	XVIDC_CR_0_255,
+	XVIDC_CR_NUM_SUPPORTED,
+	XVIDC_CR_UNKNOWN_RANGE
+} XVidC_ColorRange;
+
+/**
+ * 3D formats.
+ */
+typedef enum {
+	XVIDC_3D_FRAME_PACKING = 0,	/**< Frame packing.         */
+	XVIDC_3D_FIELD_ALTERNATIVE,	/**< Field alternative.     */
+	XVIDC_3D_LINE_ALTERNATIVE,	/**< Line alternative.      */
+	XVIDC_3D_SIDE_BY_SIDE_FULL,	/**< Side-by-side (full).   */
+	XVIDC_3D_TOP_AND_BOTTOM_HALF,	/**< Top-and-bottom (half). */
+	XVIDC_3D_SIDE_BY_SIDE_HALF,	/**< Side-by-side (half).   */
+	XVIDC_3D_UNKNOWN
+} XVidC_3DFormat;
+
+/**
+ * 3D Sub-sampling methods.
+ */
+typedef enum {
+	XVIDC_3D_SAMPLING_HORIZONTAL = 0, /**< Horizontal sub-sampling. */
+	XVIDC_3D_SAMPLING_QUINCUNX,	  /**< Quincunx matrix.         */
+	XVIDC_3D_SAMPLING_UNKNOWN
+} XVidC_3DSamplingMethod;
+
+/**
+ * 3D Sub-sampling positions.
+ */
+typedef enum {
+	XVIDC_3D_SAMPPOS_OLOR = 0,	/**< Odd/Left,  Odd/Right.  */
+	XVIDC_3D_SAMPPOS_OLER,		/**< Odd/Left,  Even/Right. */
+	XVIDC_3D_SAMPPOS_ELOR,		/**< Even/Left, Odd/Right.  */
+	XVIDC_3D_SAMPPOS_ELER,		/**< Even/Left, Even/Right. */
+	XVIDC_3D_SAMPPOS_UNKNOWN
+} XVidC_3DSamplingPosition;
+
+/****************************** Type Definitions ******************************/
+
+/**
+ * Video timing structure.
+ */
+typedef struct {
+	u16 HActive;
+	u16 HFrontPorch;
+	u16 HSyncWidth;
+	u16 HBackPorch;
+	u16 HTotal;
+	u8 HSyncPolarity;
+	u16 VActive;
+	u16 F0PVFrontPorch;
+	u16 F0PVSyncWidth;
+	u16 F0PVBackPorch;
+	u16 F0PVTotal;
+	u16 F1VFrontPorch;
+	u16 F1VSyncWidth;
+	u16 F1VBackPorch;
+	u16 F1VTotal;
+	u8 VSyncPolarity;
+} XVidC_VideoTiming;
+
+/**
+ * 3D Sampling info structure.
+ */
+typedef struct {
+	XVidC_3DSamplingMethod   Method;
+	XVidC_3DSamplingPosition Position;
+} XVidC_3DSamplingInfo;
+
+/**
+ * 3D info structure.
+ */
+typedef struct {
+	XVidC_3DFormat		  Format;
+	XVidC_3DSamplingInfo  Sampling;
+} XVidC_3DInfo;
+
+/**
+ * Video stream structure.
+ */
+typedef struct {
+	XVidC_ColorFormat	  ColorFormatId;
+	XVidC_ColorDepth	  ColorDepth;
+	XVidC_PixelsPerClock  PixPerClk;
+	XVidC_FrameRate		  FrameRate;
+	XVidC_AspectRatio	  AspectRatio;
+	u8			          IsInterlaced;
+	u8			          Is3D;
+	XVidC_3DInfo		  Info_3D;
+	XVidC_VideoMode		  VmId;
+	XVidC_VideoTiming	  Timing;
+} XVidC_VideoStream;
+
+/**
+ * Video window structure.
+ */
+typedef struct {
+	u32 StartX;
+	u32 StartY;
+	u32 Width;
+	u32 Height;
+} XVidC_VideoWindow;
+
+/**
+ * Video timing mode from the video timing table.
+ */
+typedef struct {
+	XVidC_VideoMode		VmId;
+	const char		    Name[21];
+	XVidC_FrameRate		FrameRate;
+	XVidC_VideoTiming	Timing;
+} XVidC_VideoTimingMode;
+
+/**
+ * Callback type which represents a custom timer wait handler. This is only
+ * used for Microblaze since it doesn't have a native sleep function. To avoid
+ * dependency on a hardware timer, the default wait functionality is implemented
+ * using loop iterations; this isn't too accurate. Therefore a custom timer
+ * handler is used, the user may implement their own wait implementation.
+ *
+ * @param	TimerPtr is a pointer to the timer instance.
+ * @param	Delay is the duration (msec/usec) to be passed to the timer
+ *		function.
+ *
+*******************************************************************************/
+typedef void (*XVidC_DelayHandler)(void *TimerPtr, u32 Delay);
+
+/**************************** Function Prototypes *****************************/
+
+u32 XVidC_RegisterCustomTimingModes(const XVidC_VideoTimingMode *CustomTable,
+		                            u16 NumElems);
+void XVidC_UnregisterCustomTimingModes(void);
+u32 XVidC_GetPixelClockHzByHVFr(u32 HTotal, u32 VTotal, u8 FrameRate);
+u32 XVidC_GetPixelClockHzByVmId(XVidC_VideoMode VmId);
+XVidC_VideoFormat XVidC_GetVideoFormat(XVidC_VideoMode VmId);
+u8 XVidC_IsInterlaced(XVidC_VideoMode VmId);
+const XVidC_VideoTimingMode* XVidC_GetVideoModeData(XVidC_VideoMode VmId);
+const char *XVidC_GetVideoModeStr(XVidC_VideoMode VmId);
+const char *XVidC_GetFrameRateStr(XVidC_VideoMode VmId);
+const char *XVidC_GetColorFormatStr(XVidC_ColorFormat ColorFormatId);
+XVidC_FrameRate XVidC_GetFrameRate(XVidC_VideoMode VmId);
+const XVidC_VideoTiming* XVidC_GetTimingInfo(XVidC_VideoMode VmId);
+void XVidC_ReportStreamInfo(const XVidC_VideoStream *Stream);
+void XVidC_ReportTiming(const XVidC_VideoTiming *Timing, u8 IsInterlaced);
+const char *XVidC_Get3DFormatStr(XVidC_3DFormat Format);
+u32 XVidC_SetVideoStream(XVidC_VideoStream *VidStrmPtr, XVidC_VideoMode VmId,
+			             XVidC_ColorFormat ColorFormat, XVidC_ColorDepth Bpc,
+			             XVidC_PixelsPerClock Ppc);
+u32 XVidC_Set3DVideoStream(XVidC_VideoStream *VidStrmPtr, XVidC_VideoMode VmId,
+			               XVidC_ColorFormat ColorFormat, XVidC_ColorDepth Bpc,
+			               XVidC_PixelsPerClock Ppc, XVidC_3DInfo *Info3DPtr);
+XVidC_VideoMode XVidC_GetVideoModeId(u32 Width, u32 Height, u32 FrameRate,
+		                             u8 IsInterlaced);
+XVidC_VideoMode XVidC_GetVideoModeIdExtensive(XVidC_VideoTiming *Timing,
+											  u32 FrameRate,
+											  u8 IsInterlaced,
+											  u8 IsExtensive);
+XVidC_VideoMode XVidC_GetVideoModeIdRb(u32 Width, u32 Height, u32 FrameRate,
+		                               u8 IsInterlaced, u8 RbN);
+XVidC_VideoMode XVidC_GetVideoModeIdWBlanking(const XVidC_VideoTiming *Timing,
+		                                      u32 FrameRate, u8 IsInterlaced);
+
+/******************* Macros (Inline Functions) Definitions ********************/
+
+/*****************************************************************************/
+/**
+ * This macro check if video stream is 3D or 2D.
+ *
+ * @param	VidStreamPtr is a pointer to the XVidC_VideoStream structure.
+ *
+ * @return	3D(1)/2D(0)
+ *
+ * @note	C-style signature:
+ *		u8 XDp_IsStream3D(XVidC_VideoStream *VidStreamPtr)
+ *
+ *****************************************************************************/
+#define XVidC_IsStream3D(VidStreamPtr)       ((VidStreamPtr)->Is3D)
+
+/*************************** Variable Declarations ****************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XVIDC_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_cea861.h b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_cea861.h
new file mode 100644
index 0000000..9e50b9d
--- /dev/null
+++ b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_cea861.h
@@ -0,0 +1,399 @@
+/* vim: set et fde fdm=syntax ft=c.doxygen ts=4 sts=4 sw=4 : */
+/*
+ * Copyright © 2010-2011 Saleem Abdulrasool .
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef xvidc_cea861_h
+#define xvidc_cea861_h
+
+#define XVIDC_EDID_VERBOSITY                    0
+
+#define ARRAY_SIZE(arr)                         (sizeof(arr) / sizeof(arr[0]))
+
+#define XVIDC_CEA861_NO_DTDS_PRESENT            (0x04)
+
+#define HDMI_VSDB_EXTENSION_FLAGS_OFFSET        (0x06)
+#define HDMI_VSDB_MAX_TMDS_OFFSET               (0x07)
+#define HDMI_VSDB_LATENCY_FIELDS_OFFSET         (0x08)
+
+static const u8 HDMI_OUI[]                 = { 0x00, 0x0C, 0x03 };
+static const u8 HDMI_OUI_HF[]              = { 0xC4, 0x5D, 0xD8 };
+
+enum xvidc_cea861_data_block_type {
+    XVIDC_CEA861_DATA_BLOCK_TYPE_RESERVED0,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_AUDIO,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_VIDEO,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_VENDOR_SPECIFIC,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_SPEAKER_ALLOCATION,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_VESA_DTC,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_RESERVED6,
+    XVIDC_CEA861_DATA_BLOCK_TYPE_EXTENDED,
+};
+
+enum xvidc_cea861_extended_tag_type_data_block {
+    XVIDC_CEA861_EXT_TAG_TYPE_VIDEO_CAPABILITY,
+    XVIDC_CEA861_EXT_TAG_TYPE_VENDOR_SPECIFIC,
+    XVIDC_CEA861_EXT_TAG_TYPE_VESA_DISPLAY_DEVICE,
+    XVIDC_CEA861_EXT_TAG_TYPE_VESA_VIDEO_TIMING_BLOCK_EXT,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED_FOR_HDMI_VIDEO_DATA_BLOCK,
+    XVIDC_CEA861_EXT_TAG_TYPE_COLORIMETRY,
+    XVIDC_CEA861_EXT_TAG_TYPE_HDR_STATIC_METADATA,
+    XVIDC_CEA861_EXT_TAG_TYPE_HDR_DYNAMIC_METADATA,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED2,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED3,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED4,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED5,
+    XVIDC_CEA861_EXT_TAG_TYPE_RESERVED6,
+    XVIDC_CEA861_EXT_TAG_TYPE_VIDEO_FRMT_PREFERENCE,
+    XVIDC_CEA861_EXT_TAG_TYPE_YCBCR420_VIDEO,
+    XVIDC_CEA861_EXT_TAG_TYPE_YCBCR420_CAPABILITY_MAP,
+    XVIDC_CEA861_EXT_TAG_TYPE_CEA_MISC_AUDIO_FIELDS,
+    XVIDC_CEA861_EXT_TAG_TYPE_VENDOR_SPECIFC_AUDIO,
+    XVIDC_CEA861_EXT_TAG_TYPE_HDMI_AUDIO,
+    XVIDC_CEA861_EXT_TAG_TYPE_ROOM_CONFIGURATION,
+    XVIDC_CEA861_EXT_TAG_TYPE_SPEAKER_LOCATION,
+    XVIDC_CEA861_EXT_TAG_TYPE_INFOFRAME = 32,
+/* Can be extend to 255, refer table 46 cea data block tag codes cea-861-f */
+};
+
+enum xvidc_cea861_audio_format {
+    XVIDC_CEA861_AUDIO_FORMAT_RESERVED,
+    XVIDC_CEA861_AUDIO_FORMAT_LPCM,
+    XVIDC_CEA861_AUDIO_FORMAT_AC_3,
+    XVIDC_CEA861_AUDIO_FORMAT_MPEG_1,
+    XVIDC_CEA861_AUDIO_FORMAT_MP3,
+    XVIDC_CEA861_AUDIO_FORMAT_MPEG2,
+    XVIDC_CEA861_AUDIO_FORMAT_AAC_LC,
+    XVIDC_CEA861_AUDIO_FORMAT_DTS,
+    XVIDC_CEA861_AUDIO_FORMAT_ATRAC,
+    XVIDC_CEA861_AUDIO_FORMAT_DSD,
+    XVIDC_CEA861_AUDIO_FORMAT_E_AC_3,
+    XVIDC_CEA861_AUDIO_FORMAT_DTS_HD,
+    XVIDC_CEA861_AUDIO_FORMAT_MLP,
+    XVIDC_CEA861_AUDIO_FORMAT_DST,
+    XVIDC_CEA861_AUDIO_FORMAT_WMA_PRO,
+    XVIDC_CEA861_AUDIO_FORMAT_EXTENDED,
+};
+
+struct __attribute__ (( packed )) xvidc_cea861_timing_block {
+    /* CEA Extension Header */
+    u8  tag;
+    u8  revision;
+    u8  dtd_offset;
+
+    /* Global Declarations */
+    unsigned native_dtds           : 4;
+    unsigned yuv_422_supported     : 1;
+    unsigned yuv_444_supported     : 1;
+    unsigned basic_audio_supported : 1;
+    unsigned underscan_supported   : 1;
+
+    u8  data[123];
+
+    u8  checksum;
+};
+
+struct __attribute__ (( packed )) xvidc_cea861_data_block_header {
+    unsigned length : 5;
+    unsigned tag    : 3;
+};
+
+struct __attribute__ (( packed )) xvidc_cea861_short_video_descriptor {
+    unsigned video_identification_code : 7;
+    unsigned native                    : 1;
+};
+#if XVIDC_EDID_VERBOSITY > 1
+struct __attribute__ (( packed )) xvidc_cea861_video_data_block {
+    struct xvidc_cea861_data_block_header      header;
+    struct xvidc_cea861_short_video_descriptor svd[];
+};
+#endif
+struct __attribute__ (( packed )) xvidc_cea861_short_audio_descriptor {
+    unsigned channels              : 3; /* = value + 1 */
+    unsigned audio_format          : 4;
+    unsigned                       : 1;
+
+    unsigned sample_rate_32_kHz    : 1;
+    unsigned sample_rate_44_1_kHz  : 1;
+    unsigned sample_rate_48_kHz    : 1;
+    unsigned sample_rate_88_2_kHz  : 1;
+    unsigned sample_rate_96_kHz    : 1;
+    unsigned sample_rate_176_4_kHz : 1;
+    unsigned sample_rate_192_kHz   : 1;
+    unsigned                       : 1;
+
+    union {
+        struct __attribute__ (( packed )) {
+            unsigned bitrate_16_bit : 1;
+            unsigned bitrate_20_bit : 1;
+            unsigned bitrate_24_bit : 1;
+            unsigned                : 5;
+        } lpcm;
+
+        u8 maximum_bit_rate;       /* formats 2-8; = value * 8 kHz */
+
+        u8 format_dependent;       /* formats 9-13; */
+
+        struct __attribute__ (( packed )) {
+            unsigned profile : 3;
+            unsigned         : 5;
+        } wma_pro;
+
+        struct __attribute__ (( packed )) {
+            unsigned      : 3;
+            unsigned code : 5;
+        } extension;
+    } flags;
+};
+#if XVIDC_EDID_VERBOSITY > 1
+struct __attribute__ (( packed )) xvidc_cea861_audio_data_block {
+    struct xvidc_cea861_data_block_header      header;
+    struct xvidc_cea861_short_audio_descriptor sad[];
+};
+#endif
+#if XVIDC_EDID_VERBOSITY > 1
+struct __attribute__ (( packed )) xvidc_cea861_speaker_allocation {
+    unsigned front_left_right        : 1;
+    unsigned front_lfe               : 1;   /* low frequency effects */
+    unsigned front_center            : 1;
+    unsigned rear_left_right         : 1;
+    unsigned rear_center             : 1;
+    unsigned front_left_right_center : 1;
+    unsigned rear_left_right_center  : 1;
+    unsigned front_left_right_wide   : 1;
+
+    unsigned front_left_right_high   : 1;
+    unsigned top_center              : 1;
+    unsigned front_center_high       : 1;
+    unsigned                         : 5;
+
+    unsigned                         : 8;
+};
+#endif
+#if XVIDC_EDID_VERBOSITY > 1
+struct __attribute__ (( packed )) xvidc_cea861_speaker_allocation_data_block {
+    struct xvidc_cea861_data_block_header  header;
+    struct xvidc_cea861_speaker_allocation payload;
+};
+#endif
+struct __attribute__ (( packed )) xvidc_cea861_vendor_specific_data_block {
+    struct xvidc_cea861_data_block_header  header;
+    u8                               ieee_registration[3];
+    u8                               data[30];
+};
+
+struct __attribute__ (( packed )) xvidc_cea861_extended_data_block {
+    struct xvidc_cea861_data_block_header  header;
+    u8                               xvidc_cea861_extended_tag_codes;
+    u8                               data[30];
+};
+
+#if XVIDC_EDID_VERBOSITY > 1
+static const struct xvidc_cea861_timing {
+    const u16 hactive;
+    const u16 vactive;
+    const enum {
+        INTERLACED,
+        PROGRESSIVE,
+    } mode;
+    const u16 htotal;
+    const u16 hblank;
+    const u16 vtotal;
+    const double   vblank;
+    const double   hfreq;
+    const double   vfreq;
+    const double   pixclk;
+} xvidc_cea861_timings[] = {
+    [  1]  = {  640, 480, PROGRESSIVE,  800,  160,  525, 45.0,  31.469,  59.940,  25.175 },
+    [  2]  = {  720, 480, PROGRESSIVE,  858,  138,  525, 45.0,  31.469,  59.940,  27.000 },
+    [  3]  = {  720, 480, PROGRESSIVE,  858,  138,  525, 45.0,  31.469,  59.940,  27.000 },
+    [  4]  = { 1280, 720, PROGRESSIVE, 1650,  370,  750, 30.0,  45.000,  60.000,  74.250 },
+    [  5]  = { 1920,1080,  INTERLACED, 2200,  280, 1125, 22.5,  33.750,  60.000,  72.250 },
+    [  6]  = { 1440, 480,  INTERLACED, 1716,  276,  525, 22.5,  15.734,  59.940,  27.000 },
+    [  7]  = { 1440, 480,  INTERLACED, 1716,  276,  525, 22.5,  15.734,  59.940,  27.000 },
+    [  8]  = { 1440, 240, PROGRESSIVE, 1716,  276,  262, 22.0,  15.734,  60.054,  27.000 },
+    [  9]  = { 1440, 240, PROGRESSIVE, 1716,  276,  262, 22.0,  15.734,  59.826,  27.000 },
+    [ 10] = { 2880,  480,  INTERLACED, 3432,  552,  525, 22.5,  15.734,  59.940,  54.000 },
+    [ 11] = { 2880,  480,  INTERLACED, 3432,  552,  525, 22.5,  15.734,  59.940,  54.000 },
+    [ 12] = { 2880,  240, PROGRESSIVE, 3432,  552,  262, 22.0,  15.734,  60.054,  54.000 },
+    [ 13] = { 2880,  240, PROGRESSIVE, 3432,  552,  262, 22.0,  15.734,  59.826,  54.000 },
+    [ 14] = { 1440,  480, PROGRESSIVE, 1716,  276,  525, 45.0,  31.469,  59.940,  54.000 },
+    [ 15] = { 1440,  480, PROGRESSIVE, 1716,  276,  525, 45.0,  31.469,  59.940,  54.000 },
+    [ 16] = { 1920, 1080, PROGRESSIVE, 2200,  280, 1125, 45.0,  67.500,  60.000, 148.500 },
+    [ 17] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0,  31.250,  50.000,  27.000 },
+    [ 18] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0,  31.250,  50.000,  27.000 },
+    [ 19] = { 1280,  720, PROGRESSIVE, 1980,  700,  750, 30.0,  37.500,  50.000,  74.250 },
+    [ 20] = { 1920, 1080,  INTERLACED, 2640,  720, 1125, 22.5,  28.125,  50.000,  74.250 },
+    [ 21] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  15.625,  50.000,  27.000 },
+    [ 22] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  15.625,  50.000,  27.000 },
+    [ 23] = { 1440,  288, PROGRESSIVE, 1728,  288,  312, 24.0,  15.625,  50.080,  27.000 },
+    [ 24] = { 1440,  288, PROGRESSIVE, 1728,  288,  313, 25.0,  15.625,  49.920,  27.000 },
+    [ 25] = { 2880,  576,  INTERLACED, 3456,  576,  625, 24.5,  15.625,  50.000,  54.000 },
+    [ 26] = { 2880,  576,  INTERLACED, 3456,  576,  625, 24.5,  15.625,  50.000,  54.000 },
+    [ 27] = { 2880,  288, PROGRESSIVE, 3456,  576,  312, 24.0,  15.625,  50.080,  54.000 },
+    [ 28] = { 2880,  288, PROGRESSIVE, 3456,  576,  313, 25.0,  15.625,  49.920,  54.000 },
+    [ 29] = { 1440,  576, PROGRESSIVE, 1728,  288,  625, 49.0,  31.250,  50.000,  54.000 },
+    [ 30] = { 1440,  576, PROGRESSIVE, 1728,  288,  625, 49.0,  31.250,  50.000,  54.000 },
+    [ 31] = { 1920, 1080, PROGRESSIVE, 2640,  720, 1125, 45.0,  56.250,  50.000, 148.500 },
+    [ 32] = { 1920, 1080, PROGRESSIVE, 2750,  830, 1125, 45.0,  27.000,  24.000,  74.250 },
+    [ 33] = { 1920, 1080, PROGRESSIVE, 2640,  720, 1125, 45.0,  28.125,  25.000,  74.250 },
+    [ 34] = { 1920, 1080, PROGRESSIVE, 2200,  280, 1125, 45.0,  33.750,  30.000,  74.250 },
+    [ 35] = { 2880,  480, PROGRESSIVE, 3432,  552,  525, 45.0,  31.469,  59.940, 108.500 },
+    [ 36] = { 2880,  480, PROGRESSIVE, 3432,  552,  525, 45.0,  31.469,  59.940, 108.500 },
+    [ 37] = { 2880,  576, PROGRESSIVE, 3456,  576,  625, 49.0,  31.250,  50.000, 108.000 },
+    [ 38] = { 2880,  576, PROGRESSIVE, 3456,  576,  625, 49.0,  31.250,  50.000, 108.000 },
+    [ 39] = { 1920, 1080,  INTERLACED, 2304,  384, 1250, 85.0,  31.250,  50.000,  72.000 },
+    [ 40] = { 1920, 1080,  INTERLACED, 2640,  720, 1125, 22.5,  56.250, 100.000, 148.500 },
+    [ 41] = { 1280,  720, PROGRESSIVE, 1980,  700,  750, 30.0,  75.000, 100.000, 148.500 },
+    [ 42] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0,  62.500, 100.000,  54.000 },
+    [ 43] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0,  62.500, 100.000,  54.000 },
+    [ 44] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  31.250, 100.000,  54.000 },
+    [ 45] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  31.250, 100.000,  54.000 },
+    [ 46] = { 1920, 1080,  INTERLACED, 2200,  280, 1125, 22.5,  67.500, 120.000, 148.500 },
+    [ 47] = { 1280,  720, PROGRESSIVE, 1650,  370,  750, 30.0,  90.000, 120.000, 148.500 },
+    [ 48] = {  720,  480, PROGRESSIVE,  858,  138,  525, 45.0,  62.937, 119.880,  54.000 },
+    [ 49] = {  720,  480, PROGRESSIVE,  858,  138,  525, 45.0,  62.937, 119.880,  54.000 },
+    [ 50] = { 1440,  480,  INTERLACED, 1716,  276,  525, 22.5,  31.469, 119.880,  54.000 },
+    [ 51] = { 1440,  480,  INTERLACED, 1716,  276,  525, 22.5,  31.469, 119.880,  54.000 },
+    [ 52] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0, 125.000, 200.000, 108.000 },
+    [ 53] = {  720,  576, PROGRESSIVE,  864,  144,  625, 49.0, 125.000, 200.000, 108.000 },
+    [ 54] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  62.500, 200.000, 108.000 },
+    [ 55] = { 1440,  576,  INTERLACED, 1728,  288,  625, 24.5,  62.500, 200.000, 108.000 },
+    [ 56] = {  720,  480, PROGRESSIVE,  858,  138,  525, 45.0, 125.874, 239.760, 108.000 },
+    [ 57] = {  720,  480, PROGRESSIVE,  858,  138,  525, 45.0, 125.874, 239.760, 108.000 },
+    [ 58] = { 1440,  480,  INTERLACED, 1716,  276,  525, 22.5,  62.937, 239.760, 108.000 },
+    [ 59] = { 1440,  480,  INTERLACED, 1716,  276,  525, 22.5,  62.937, 239.760, 108.000 },
+    [60 ] = {1280,  720 , PROGRESSIVE, 3300, 2020, 750 , 30  , 18     , 24.0003, 59.4    },
+    [61 ] = {1280,  720 , PROGRESSIVE, 3960, 2680, 750 , 30  , 18.75  , 25     , 74.25   },
+    [62 ] = {1280,  720 , PROGRESSIVE, 3300, 2020, 750 , 30  , 22.5   , 30.0003, 74.25   },
+    [63 ] = {1920,  1080, PROGRESSIVE, 2200, 280 , 1125, 45  , 135    , 120.003, 297     },
+    [64 ] = {1920,  1080, PROGRESSIVE, 2640, 720 , 1125, 45  , 112.5  , 100    , 297     },
+    [65 ] = {1280,  720 , PROGRESSIVE, 3300, 2020, 750 , 30  , 18     , 24.0003, 59.4    },
+    [66 ] = {1280,  720 , PROGRESSIVE, 3960, 2680, 750 , 30  , 18.75  , 25     , 74.25   },
+    [67 ] = {1280,  720 , PROGRESSIVE, 3300, 2020, 750 , 30  , 22.5   , 30.0003, 74.25   },
+    [68 ] = {1280,  720 , PROGRESSIVE, 1980, 700 , 750 , 30  , 37.5   , 50     , 74.25   },
+    [69 ] = {1280,  720 , PROGRESSIVE, 1650, 370 , 750 , 30  , 45     , 60.0003, 74.25   },
+    [70 ] = {1280,  720 , PROGRESSIVE, 1980, 700 , 750 , 30  , 75     , 100    , 148.5   },
+    [71 ] = {1280,  720 , PROGRESSIVE, 1650, 370 , 750 , 30  , 90     , 120.003, 148.5   },
+    [72 ] = {1920,  1080, PROGRESSIVE, 2750, 830 , 1125, 45  , 27     , 24.0003, 74.25   },
+    [73 ] = {1920,  1080, PROGRESSIVE, 2640, 720 , 1125, 45  , 28.125 , 25     , 74.25   },
+    [74 ] = {1920,  1080, PROGRESSIVE, 2200, 280 , 1125, 45  , 33.75  , 30.0003, 74.25   },
+    [75 ] = {1920,  1080, PROGRESSIVE, 2640, 720 , 1125, 45  , 56.25  , 50     , 148.5   },
+    [76 ] = {1920,  1080, PROGRESSIVE, 2200, 280 , 1125, 45  , 67.5   , 60.0003, 148.5   },
+    [77 ] = {1920,  1080, PROGRESSIVE, 2640, 720 , 1125, 45  , 112.5  , 100    , 297     },
+    [78 ] = {1920,  1080, PROGRESSIVE, 2200, 280 , 1125, 45  , 135    , 120.003, 297     },
+    [79 ] = {1680,  720 , PROGRESSIVE, 3300, 1620, 750 , 30  , 18     , 24.0003, 59.4    },
+    [80 ] = {1680,  720 , PROGRESSIVE, 3168, 1488, 750 , 30  , 18.75  , 25     , 59.4    },
+    [81 ] = {1680,  720 , PROGRESSIVE, 2640, 960 , 750 , 30  , 22.5   , 30.0003, 59.4    },
+    [82 ] = {1680,  720 , PROGRESSIVE, 2200, 520 , 750 , 30  , 37.5   , 50     , 82.5    },
+    [83 ] = {1680,  720 , PROGRESSIVE, 2200, 520 , 750 , 30  , 45     , 60.0003, 99      },
+    [84 ] = {1680,  720 , PROGRESSIVE, 2000, 320 , 825 , 105 , 82.5   , 100    , 165     },
+    [85 ] = {1680,  720 , PROGRESSIVE, 2000, 320 , 825 , 105 , 99     , 120.003, 198     },
+    [86 ] = {2560,  1080, PROGRESSIVE, 3750, 1190, 1100, 20  , 26.4   , 24.0003, 99      },
+    [87 ] = {2560,  1080, PROGRESSIVE, 3200, 640 , 1125, 45  , 28.125 , 25     , 90      },
+    [88 ] = {2560,  1080, PROGRESSIVE, 3520, 960 , 1125, 45  , 33.75  , 30.0003, 118.8   },
+    [89 ] = {2560,  1080, PROGRESSIVE, 3300, 740 , 1125, 45  , 56.25  , 50     , 185.625 },
+    [90 ] = {2560,  1080, PROGRESSIVE, 3000, 440 , 1100, 20  , 66     , 60.0003, 198     },
+    [91 ] = {2560,  1080, PROGRESSIVE, 2970, 410 , 1250, 170 , 125    , 100    , 371.25  },
+    [92 ] = {2560,  1080, PROGRESSIVE, 3300, 740 , 1250, 170 , 150    , 120.003, 495     },
+    [93 ] = {3840,  2160, PROGRESSIVE, 5500, 1660, 2250, 90  , 54     , 24.0003, 297     },
+    [94 ] = {3840,  2160, PROGRESSIVE, 5280, 1440, 2250, 90  , 56.25  , 25     , 297     },
+    [95 ] = {3840,  2160, PROGRESSIVE, 4400, 560 , 2250, 90  , 67.5   , 30.0003, 297     },
+    [96 ] = {3840,  2160, PROGRESSIVE, 5280, 1440, 2250, 90  , 112.5  , 50     , 594     },
+    [97 ] = {3840,  2160, PROGRESSIVE, 4400, 560 , 2250, 90  , 135    , 60.0003, 594     },
+    [98 ] = {4096,  2160, PROGRESSIVE, 5500, 1404, 2250, 90  , 54     , 24.0003, 297     },
+    [99 ] = {4096,  2160, PROGRESSIVE, 5280, 1184, 2250, 90  , 56.25  , 25     , 297     },
+    [100] = {4096,  2160, PROGRESSIVE, 4400, 304 , 2250, 90  , 67.5   , 30.0003, 297     },
+    [101] = {4096,  2160, PROGRESSIVE, 5280, 1184, 2250, 90  , 112.5  , 50     , 594     },
+    [102] = {4096,  2160, PROGRESSIVE, 4400, 304 , 2250, 90  , 135    , 60.0003, 594     },
+    [103] = {3840,  2160, PROGRESSIVE, 5500, 1660, 2250, 90  , 54     , 24.0003, 297     },
+    [104] = {3840,  2160, PROGRESSIVE, 5280, 1440, 2250, 90  , 56.25  , 25     , 297     },
+    [105] = {3840,  2160, PROGRESSIVE, 4400, 560 , 2250, 90  , 67.5   , 30.0003, 297     },
+    [106] = {3840,  2160, PROGRESSIVE, 5280, 1440, 2250, 90  , 112.5  , 50     , 594     },
+    [107] = {3840,  2160, PROGRESSIVE, 4400, 560 , 2250, 90  , 135    , 60.0003, 594     },
+};
+#endif
+
+struct __attribute__ (( packed )) xvidc_cea861_hdmi_vendor_specific_data_block {
+    struct xvidc_cea861_data_block_header header;
+
+    u8  ieee_registration_id[3];           /* LSB */
+
+    unsigned port_configuration_b      : 4;
+    unsigned port_configuration_a      : 4;
+    unsigned port_configuration_d      : 4;
+    unsigned port_configuration_c      : 4;
+
+    /* extension fields */
+    unsigned dvi_dual_link             : 1;
+    unsigned                           : 2;
+    unsigned yuv_444_supported         : 1;
+    unsigned colour_depth_30_bit       : 1;
+    unsigned colour_depth_36_bit       : 1;
+    unsigned colour_depth_48_bit       : 1;
+    unsigned audio_info_frame          : 1;
+
+    u8  max_tmds_clock;                    /* = value * 5 */
+
+    unsigned                           : 6;
+    unsigned interlaced_latency_fields : 1;
+    unsigned latency_fields            : 1;
+
+    u8  video_latency;                     /* = (value - 1) * 2 */
+    u8  audio_latency;                     /* = (value - 1) * 2 */
+    u8  interlaced_video_latency;
+    u8  interlaced_audio_latency;
+
+    u8  reserved[];
+};
+
+struct __attribute__ (( packed )) xvidc_cea861_hdmi_hf_vendor_specific_data_block {
+    struct xvidc_cea861_data_block_header header;
+
+    u8  ieee_registration_id[3];           /* LSB */
+
+    u8  version;
+    u8  max_tmds_char_rate;
+
+    unsigned osd_disparity_3d          : 1;
+    unsigned dual_view_3d              : 1;
+    unsigned independent_view_3d       : 1;
+    unsigned lte_340mcsc_scramble      : 1;
+
+    unsigned                           : 2;
+
+    unsigned rr_capable                : 1;
+    unsigned scdc_present              : 1;
+    unsigned dc_30bit_yuv420           : 1;
+    unsigned dc_36bit_yuv420           : 1;
+    unsigned dc_48bit_yuv420           : 1;
+
+    u8  reserved[];
+};
+
+#endif
diff --git a/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid.c b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid.c
new file mode 100644
index 0000000..585f7b8
--- /dev/null
+++ b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid.c
@@ -0,0 +1,707 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xvidc_edid.c
+ * @addtogroup video_common_v4_2
+ * @{
+ *
+ * Contains function definitions related to the Extended Display Identification
+ * Data (EDID) structure which is present in all monitors. All content in this
+ * file is agnostic of communication interface protocol.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   als  11/09/14 Initial release.
+ * 2.2   als  02/01/16 Functions with pointer arguments that don't modify
+ *                     contents now const.
+ * 4.0   aad  10/26/16 Added API for colormetry which returns fixed point
+ *		       in Q0.10 format instead of float.
+ * 

+ *
+*******************************************************************************/
+
+/******************************* Include Files ********************************/
+
+#include "xvidc_edid.h"
+
+/**************************** Function Prototypes *****************************/
+
+static u32 XVidC_EdidIsVideoTimingSupportedPreferredTiming(const u8 *EdidRaw,
+		const XVidC_VideoTimingMode *VtMode);
+static u32 XVidC_EdidIsVideoTimingSupportedEstablishedTimings(const u8 *EdidRaw,
+		const XVidC_VideoTimingMode *VtMode);
+static u32 XVidC_EdidIsVideoTimingSupportedStandardTimings(const u8 *EdidRaw,
+		const XVidC_VideoTimingMode *VtMode);
+static int XVidC_CalculatePower(u8 Base, u8 Power);
+static int XVidC_CalculateBinaryFraction_QFormat(u16 Val, u8 DecPtIndex);
+
+/**************************** Function Definitions ****************************/
+
+/******************************************************************************/
+/**
+ * Get the manufacturer name as specified in the vendor and product ID field of
+ * the supplied base Extended Display Identification Data (EDID).
+ *
+ * @param	EdidRaw is the supplied base EDID to retrieve the manufacturer
+ *		name from.
+ * @param	ManName is the string that will be modified to hold the
+ *		retrieved manufacturer name.
+ *
+ * @return	None.
+ *
+ * @note	The ManName argument is modified with the manufacturer name.
+ *
+*******************************************************************************/
+void XVidC_EdidGetManName(const u8 *EdidRaw, char ManName[4])
+{
+	ManName[0] = 0x40 + ((EdidRaw[XVIDC_EDID_VPI_ID_MAN_NAME0] &
+				XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR0_MASK) >>
+				XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR0_SHIFT);
+	ManName[1] = 0x40 + (((EdidRaw[XVIDC_EDID_VPI_ID_MAN_NAME0] &
+				XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR1_MASK) <<
+				XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR1_POS) |
+				(EdidRaw[XVIDC_EDID_VPI_ID_MAN_NAME1] >>
+				XVIDC_EDID_VPI_ID_MAN_NAME1_CHAR1_SHIFT));
+	ManName[2] = 0x40 + (EdidRaw[XVIDC_EDID_VPI_ID_MAN_NAME1] &
+				XVIDC_EDID_VPI_ID_MAN_NAME1_CHAR2_MASK);
+	ManName[3] = '\0';
+}
+
+/******************************************************************************/
+/**
+ * Get the color bit depth (bits per primary color) as specified in the basic
+ * display parameters and features, video input definition field of the supplied
+ * base Extended Display Identification Data (EDID).
+ *
+ * @param	EdidRaw is the supplied base EDID to retrieve color depth
+ *		information from.
+ *
+ * @return	The number of bits per primary color as specified by the
+ *		supplied base EDID.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+XVidC_ColorDepth XVidC_EdidGetColorDepth(const u8 *EdidRaw)
+{
+	XVidC_ColorDepth Bpc;
+
+	switch (((EdidRaw[XVIDC_EDID_BDISP_VID] &
+			XVIDC_EDID_BDISP_VID_DIG_BPC_MASK) >>
+					XVIDC_EDID_BDISP_VID_DIG_BPC_SHIFT)) {
+		case XVIDC_EDID_BDISP_VID_DIG_BPC_6:
+			Bpc = XVIDC_BPC_6;
+			break;
+
+		case XVIDC_EDID_BDISP_VID_DIG_BPC_8:
+			Bpc = XVIDC_BPC_8;
+			break;
+
+		case XVIDC_EDID_BDISP_VID_DIG_BPC_10:
+			Bpc = XVIDC_BPC_10;
+			break;
+
+		case XVIDC_EDID_BDISP_VID_DIG_BPC_12:
+			Bpc = XVIDC_BPC_12;
+			break;
+
+		case XVIDC_EDID_BDISP_VID_DIG_BPC_14:
+			Bpc = XVIDC_BPC_14;
+			break;
+
+		case XVIDC_EDID_BDISP_VID_DIG_BPC_16:
+			Bpc = XVIDC_BPC_16;
+			break;
+
+		default:
+			Bpc = XVIDC_BPC_UNKNOWN;
+			break;
+	}
+
+	return Bpc;
+}
+
+/******************************************************************************/
+/**
+ * Calculates the x chromaticity coordinate for red by converting a 10 bit
+ * binary fraction representation from the supplied base Extended Display
+ * Identification Data (EDID) to a integer in Q0.10 Format. To convert back
+ * to float divide the fixed point value by 2^10.
+ *
+ * @param	EdidRaw is the supplied base EDID to retrieve chromaticity
+ *		information from.
+ *
+ * @return	The x chromatacity coordinate for red.
+ *
+ * @note	All values will be accurate to +/-0.0005.
+ *
+*******************************************************************************/
+int XVidC_EdidGetCcRedX(const u8 *EdidRaw)
+{
+	return XVidC_CalculateBinaryFraction_QFormat(
+		(EdidRaw[XVIDC_EDID_CC_REDX_HIGH] <<
+		XVIDC_EDID_CC_HIGH_SHIFT) | (EdidRaw[XVIDC_EDID_CC_RG_LOW] >>
+		XVIDC_EDID_CC_RBX_LOW_SHIFT), 10);
+}
+
+/******************************************************************************/
+/**
+ * Calculates the y chromaticity coordinate for red by converting a 10 bit
+ * binary fraction representation from the supplied base Extended Display
+ * Identification Data (EDID) to a integer in Q0.10 Format. To convert back
+ * to float divide the fixed point value by 2^10.
+ *
+ * @param	EdidRaw is the supplied base EDID to retrieve chromaticity
+ *		information from.
+ *
+ * @return	The y chromatacity coordinate for red.
+ *
+ * @note	All values will be accurate to +/-0.0005.
+ *
+*******************************************************************************/
+int XVidC_EdidGetCcRedY(const u8 *EdidRaw)
+{
+	return XVidC_CalculateBinaryFraction_QFormat(
+		(EdidRaw[XVIDC_EDID_CC_REDY_HIGH] <<
+		XVIDC_EDID_CC_HIGH_SHIFT) | ((EdidRaw[XVIDC_EDID_CC_RG_LOW] &
+		XVIDC_EDID_CC_RBY_LOW_MASK) >>
+		XVIDC_EDID_CC_RBY_LOW_SHIFT), 10);
+}
+
+/******************************************************************************/
+/**
+ * Calculates the x chromaticity coordinate for green by converting a 10 bit
+ * binary fraction representation from the supplied base Extended Display
+ * Identification Data (EDID) to a integer in Q0.10 Format. To convert back
+ * to float divide the fixed point value by 2^10.
+ *
+ * @param	EdidRaw is the supplied base EDID to retrieve chromaticity
+ *		information from.
+ *
+ * @return	The x chromatacity coordinate for green.
+ *
+ * @note	All values will be accurate to +/-0.0005.
+ *
+*******************************************************************************/
+int XVidC_EdidGetCcGreenX(const u8 *EdidRaw)
+{
+	return XVidC_CalculateBinaryFraction_QFormat(
+		(EdidRaw[XVIDC_EDID_CC_GREENX_HIGH] <<
+		XVIDC_EDID_CC_HIGH_SHIFT) | ((EdidRaw[XVIDC_EDID_CC_RG_LOW] &
+		XVIDC_EDID_CC_GWX_LOW_MASK) >>
+		XVIDC_EDID_CC_GWX_LOW_SHIFT), 10);
+}
+
+/******************************************************************************/
+/**
+ * Calculates the y chromaticity coordinate for green by converting a 10 bit
+ * binary fraction representation from the supplied base Extended Display
+ * Identification Data (EDID) to a integer in Q0.10 Format. To convert back
+ * to float divide the fixed point value by 2^10.
+ *
+ * @param	EdidRaw is the supplied base EDID to retrieve chromaticity
+ *		information from.
+ *
+ * @return	The y chromatacity coordinate for green.
+ *
+ * @note	All values will be accurate to +/-0.0005.
+ *
+*******************************************************************************/
+int XVidC_EdidGetCcGreenY(const u8 *EdidRaw)
+{
+	return XVidC_CalculateBinaryFraction_QFormat(
+		(EdidRaw[XVIDC_EDID_CC_GREENY_HIGH] <<
+		XVIDC_EDID_CC_HIGH_SHIFT) | (EdidRaw[XVIDC_EDID_CC_RG_LOW] &
+		XVIDC_EDID_CC_GWY_LOW_MASK), 10);
+}
+
+/******************************************************************************/
+/**
+ * Calculates the x chromaticity coordinate for blue by converting a 10 bit
+ * binary fraction representation from the supplied base Extended Display
+ * Identification Data (EDID) to a integer in Q0.10 Format. To convert back
+ * to float divide the fixed point value by 2^10.
+ *
+ * @param	EdidRaw is the supplied base EDID to retrieve chromaticity
+ *		information from.
+ *
+ * @return	The x chromatacity coordinate for blue.
+ *
+ * @note	All values will be accurate to +/-0.0005.
+ *
+*******************************************************************************/
+int XVidC_EdidGetCcBlueX(const u8 *EdidRaw)
+{
+	return XVidC_CalculateBinaryFraction_QFormat(
+		(EdidRaw[XVIDC_EDID_CC_BLUEX_HIGH] <<
+		XVIDC_EDID_CC_HIGH_SHIFT) | (EdidRaw[XVIDC_EDID_CC_BW_LOW] >>
+		XVIDC_EDID_CC_RBX_LOW_SHIFT), 10);
+}
+
+/******************************************************************************/
+/**
+ * Calculates the y chromaticity coordinate for blue by converting a 10 bit
+ * binary fraction representation from the supplied base Extended Display
+ * Identification Data (EDID) to a integer in Q0.10 Format. To convert back
+ * to float divide the fixed point value by 2^10.
+ *
+ * @param	EdidRaw is the supplied base EDID to retrieve chromaticity
+ *		information from.
+ *
+ * @return	The y chromatacity coordinate for blue.
+ *
+ * @note	All values will be accurate to +/-0.0005.
+ *
+*******************************************************************************/
+int XVidC_EdidGetCcBlueY(const u8 *EdidRaw)
+{
+	return XVidC_CalculateBinaryFraction_QFormat(
+		(EdidRaw[XVIDC_EDID_CC_BLUEY_HIGH] <<
+		XVIDC_EDID_CC_HIGH_SHIFT) | ((EdidRaw[XVIDC_EDID_CC_BW_LOW] &
+		XVIDC_EDID_CC_RBY_LOW_MASK) >>
+		XVIDC_EDID_CC_RBY_LOW_SHIFT), 10);
+}
+
+/******************************************************************************/
+/**
+ * Calculates the x chromaticity coordinate for white by converting a 10 bit
+ * binary fraction representation from the supplied base Extended Display
+ * Identification Data (EDID) to a integer in Q0.10 Format. To convert back
+ * to float divide the fixed point value by 2^10.
+ *
+ * @param	EdidRaw is the supplied base EDID to retrieve chromaticity
+ *		information from.
+ *
+ * @return	The x chromatacity coordinate for white.
+ *
+ * @note	All values will be accurate to +/-0.0005.
+ *
+*******************************************************************************/
+int XVidC_EdidGetCcWhiteX(const u8 *EdidRaw)
+{
+	return XVidC_CalculateBinaryFraction_QFormat(
+		(EdidRaw[XVIDC_EDID_CC_WHITEX_HIGH] <<
+		XVIDC_EDID_CC_HIGH_SHIFT) | ((EdidRaw[XVIDC_EDID_CC_BW_LOW] &
+		XVIDC_EDID_CC_GWX_LOW_MASK) >> XVIDC_EDID_CC_GWX_LOW_SHIFT), 10);
+}
+
+/******************************************************************************/
+/**
+ * Calculates the y chromaticity coordinate for white by converting a 10 bit
+ * binary fraction representation from the supplied base Extended Display
+ * Identification Data (EDID) to an integer in Q0.10 Format. To convert back
+ * to float divide the fixed point value by 2^10.
+ *
+ * @param	EdidRaw is the supplied base EDID to retrieve chromaticity
+ *		information from.
+ *
+ * @return	The y chromatacity coordinate for white.
+ *
+ * @note	All values will be accurate to +/-0.0005.
+ *
+*******************************************************************************/
+int XVidC_EdidGetCcWhiteY(const u8 *EdidRaw)
+{
+	return XVidC_CalculateBinaryFraction_QFormat(
+		(EdidRaw[XVIDC_EDID_CC_WHITEY_HIGH] <<
+		XVIDC_EDID_CC_HIGH_SHIFT) | (EdidRaw[XVIDC_EDID_CC_BW_LOW] &
+		XVIDC_EDID_CC_GWY_LOW_MASK), 10);
+}
+
+/******************************************************************************/
+/**
+ * Retrieves the active vertical resolution from the standard timings field of
+ * the supplied base Extended Display Identification Data (EDID).
+ *
+ * @param	EdidRaw is the supplied base EDID to check the timing against.
+ * @param	StdTimingsNum specifies which one of the standard timings to
+ *		retrieve from the standard timings field.
+ *
+ * @return	The vertical active resolution of the specified standard timing
+ *		from the supplied base EDID.
+ *
+ * @note	StdTimingsNum is an index 1-8.
+ *
+*******************************************************************************/
+u16 XVidC_EdidGetStdTimingsV(const u8 *EdidRaw, u8 StdTimingsNum)
+{
+	u16 V;
+
+	switch (XVidC_EdidGetStdTimingsAr(EdidRaw, StdTimingsNum)) {
+		case XVIDC_EDID_STD_TIMINGS_AR_16_10:
+			V = (10 * XVidC_EdidGetStdTimingsH(EdidRaw,
+							StdTimingsNum)) / 16;
+			break;
+
+		case XVIDC_EDID_STD_TIMINGS_AR_4_3:
+			V = (3 * XVidC_EdidGetStdTimingsH(EdidRaw,
+							StdTimingsNum)) / 4;
+			break;
+
+		case XVIDC_EDID_STD_TIMINGS_AR_5_4:
+			V = (4 * XVidC_EdidGetStdTimingsH(EdidRaw,
+							StdTimingsNum)) / 5;
+			break;
+
+		case XVIDC_EDID_STD_TIMINGS_AR_16_9:
+			V = (9 * XVidC_EdidGetStdTimingsH(EdidRaw,
+							StdTimingsNum)) / 16;
+			break;
+		default:
+			V = 0;
+			break;
+	}
+
+	return V;
+}
+
+/******************************************************************************/
+/**
+ * Checks whether or not a specified video timing mode is supported as specified
+ * in the supplied base Extended Display Identification Data (EDID). The
+ * preferred timing, established timings (I, II, II), and the standard timings
+ * fields are checked for support.
+ *
+ * @param	EdidRaw is the supplied base EDID to check the timing against.
+ * @param	VtMode is the video timing mode to check for support.
+ *
+ * @return
+ *		- XST_SUCCESS if the video timing mode is supported as specified
+ *		  in the supplied base EDID.
+ *		- XST_FAILURE otherwise.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+u32 XVidC_EdidIsVideoTimingSupported(const u8 *EdidRaw,
+		const XVidC_VideoTimingMode *VtMode)
+{
+	u32 Status;
+
+	/* Check if the video mode is the preferred timing. */
+	Status = XVidC_EdidIsVideoTimingSupportedPreferredTiming(EdidRaw,
+									VtMode);
+	if (Status == XST_SUCCESS) {
+		return Status;
+	}
+
+	/* Check established timings I, II, and III. */
+	Status = XVidC_EdidIsVideoTimingSupportedEstablishedTimings(EdidRaw,
+									VtMode);
+	if (Status == XST_SUCCESS) {
+		return Status;
+	}
+
+	/* Check in standard timings support. */
+	Status = XVidC_EdidIsVideoTimingSupportedStandardTimings(EdidRaw,
+									VtMode);
+
+	return Status;
+}
+
+/******************************************************************************/
+/**
+ * Checks whether or not a specified video timing mode is the preferred timing
+ * of the supplied base Extended Display Identification Data (EDID).
+ *
+ * @param	EdidRaw is the supplied base EDID to check the timing against.
+ * @param	VtMode is the video timing mode to check for support.
+ *
+ * @return
+ *		- XST_SUCCESS if the video timing mode is the preferred timing
+ *		  as specified in the base EDID.
+ *		- XST_FAILURE otherwise.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static u32 XVidC_EdidIsVideoTimingSupportedPreferredTiming(const u8 *EdidRaw,
+		const XVidC_VideoTimingMode *VtMode)
+{
+	const u8 *Ptm;
+
+	Ptm = &EdidRaw[XVIDC_EDID_PTM];
+
+	u32 HActive = (((Ptm[XVIDC_EDID_DTD_PTM_HRES_HBLANK_U4] &
+			XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XRES_MASK) >>
+			XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XRES_SHIFT) << 8) |
+			Ptm[XVIDC_EDID_DTD_PTM_HRES_LSB];
+
+	u32 VActive = (((Ptm[XVIDC_EDID_DTD_PTM_VRES_VBLANK_U4] &
+			XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XRES_MASK) >>
+			XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XRES_SHIFT) << 8) |
+			Ptm[XVIDC_EDID_DTD_PTM_VRES_LSB];
+
+	if (VtMode->Timing.F1VTotal != XVidC_EdidIsDtdPtmInterlaced(EdidRaw)) {
+		return (XST_FAILURE);
+	}
+	else if ((VtMode->Timing.HActive == HActive) &&
+			(VtMode->Timing.VActive == VActive)) {
+		return (XST_SUCCESS);
+	}
+
+	return XST_FAILURE;
+}
+
+/******************************************************************************/
+/**
+ * Checks whether or not a specified video timing mode is supported in the
+ * established timings field of the supplied base Extended Display
+ * Identification Data (EDID).
+ *
+ * @param	EdidRaw is the supplied base EDID to check the timing against.
+ * @param	VtMode is the video timing mode to check for support.
+ *
+ * @return
+ *		- XST_SUCCESS if the video timing mode is supported in the
+ *		  base EDID's established timings field.
+ *		- XST_FAILURE otherwise.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static u32 XVidC_EdidIsVideoTimingSupportedEstablishedTimings(const u8 *EdidRaw,
+		const XVidC_VideoTimingMode *VtMode)
+{
+	u32 Status = XST_FAILURE;
+
+	/* Check established timings I, II, and III. */
+	if ((VtMode->Timing.HActive == 800) &&
+			(VtMode->Timing.VActive == 640) &&
+			(VtMode->FrameRate == XVIDC_FR_56HZ) &&
+			XVidC_EdidSuppEstTimings800x600_56(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 640) &&
+			(VtMode->Timing.VActive == 480) &&
+			(VtMode->FrameRate == XVIDC_FR_60HZ) &&
+			XVidC_EdidSuppEstTimings640x480_60(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 800) &&
+			(VtMode->Timing.VActive == 600) &&
+			(VtMode->FrameRate == XVIDC_FR_60HZ) &&
+			XVidC_EdidSuppEstTimings800x600_60(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 1024) &&
+			(VtMode->Timing.VActive == 768) &&
+			(VtMode->FrameRate == XVIDC_FR_60HZ) &&
+			XVidC_EdidSuppEstTimings1024x768_60(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 640) &&
+			(VtMode->Timing.VActive == 480) &&
+			(VtMode->FrameRate == XVIDC_FR_67HZ) &&
+			XVidC_EdidSuppEstTimings640x480_67(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 720) &&
+			(VtMode->Timing.VActive == 400) &&
+			(VtMode->FrameRate == XVIDC_FR_70HZ) &&
+			XVidC_EdidSuppEstTimings720x400_70(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 1024) &&
+			(VtMode->Timing.VActive == 768) &&
+			(VtMode->FrameRate == XVIDC_FR_70HZ) &&
+			XVidC_EdidSuppEstTimings1024x768_70(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 640) &&
+			(VtMode->Timing.VActive == 480) &&
+			(VtMode->FrameRate == XVIDC_FR_72HZ) &&
+			XVidC_EdidSuppEstTimings640x480_72(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 800) &&
+			(VtMode->Timing.VActive == 600) &&
+			(VtMode->FrameRate == XVIDC_FR_72HZ) &&
+			XVidC_EdidSuppEstTimings800x600_72(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 640) &&
+			(VtMode->Timing.VActive == 480) &&
+			(VtMode->FrameRate == XVIDC_FR_75HZ) &&
+			XVidC_EdidSuppEstTimings640x480_75(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 800) &&
+			(VtMode->Timing.VActive == 600) &&
+			(VtMode->FrameRate == XVIDC_FR_75HZ) &&
+			XVidC_EdidSuppEstTimings800x600_75(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 832) &&
+			(VtMode->Timing.VActive == 624) &&
+			(VtMode->FrameRate == XVIDC_FR_75HZ) &&
+			XVidC_EdidSuppEstTimings832x624_75(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 1024) &&
+			(VtMode->Timing.VActive == 768) &&
+			(VtMode->FrameRate == XVIDC_FR_75HZ) &&
+			XVidC_EdidSuppEstTimings1024x768_75(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 1152) &&
+			(VtMode->Timing.VActive == 870) &&
+			(VtMode->FrameRate == XVIDC_FR_75HZ) &&
+			XVidC_EdidSuppEstTimings1152x870_75(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 1280) &&
+			(VtMode->Timing.VActive == 1024) &&
+			(VtMode->FrameRate == XVIDC_FR_75HZ) &&
+			XVidC_EdidSuppEstTimings1280x1024_75(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 1024) &&
+			(VtMode->Timing.VActive == 768) &&
+			(VtMode->FrameRate == XVIDC_FR_87HZ) &&
+			XVidC_EdidSuppEstTimings1024x768_87(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+	else if ((VtMode->Timing.HActive == 720) &&
+			(VtMode->Timing.VActive == 400) &&
+			(VtMode->FrameRate == XVIDC_FR_88HZ) &&
+			XVidC_EdidSuppEstTimings720x400_88(EdidRaw)) {
+		Status = XST_SUCCESS;
+	}
+
+	return Status;
+}
+
+/******************************************************************************/
+/**
+ * Checks whether or not a specified video timing mode is supported in the
+ * standard timings field of the supplied base Extended Display Identification
+ * Data (EDID).
+ *
+ * @param	EdidRaw is the supplied base EDID to check the timing against.
+ * @param	VtMode is the video timing mode to check for support.
+ *
+ * @return
+ *		- XST_SUCCESS if the video timing mode is supported in the
+ *		  base EDID's standard timings fields.
+ *		- XST_FAILURE otherwise.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static u32 XVidC_EdidIsVideoTimingSupportedStandardTimings(const u8 *EdidRaw,
+		const XVidC_VideoTimingMode *VtMode)
+{
+	u8 Index;
+
+	for (Index = 0; Index < 8; Index++) {
+		if ((VtMode->Timing.HActive ==
+			XVidC_EdidGetStdTimingsH(EdidRaw, Index + 1)) &&
+			(VtMode->Timing.VActive ==
+				XVidC_EdidGetStdTimingsV(EdidRaw, Index + 1)) &&
+			(VtMode->FrameRate == (u8)XVidC_EdidGetStdTimingsFrr(
+							EdidRaw, Index + 1))) {
+			return XST_SUCCESS;
+		}
+	}
+
+	return XST_FAILURE;
+}
+
+/******************************************************************************/
+/**
+ * Perform a power operation.
+ *
+ * @param	Base is b in the power operation, b^n.
+ * @param	Power is n in the power operation, b^n.
+ *
+ * @return	Base^Power (Base to the power of Power).
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static int XVidC_CalculatePower(u8 Base, u8 Power)
+{
+	u8 Index;
+	u32 Res = 1;
+
+	for (Index = 0; Index < Power; Index++) {
+		Res *= Base;
+	}
+
+	return Res;
+}
+
+
+/******************************************************************************/
+/**
+ * Convert a fractional binary number into a fixed point  Q0.DecPtIndex number
+ * Binary digits to the right of the decimal point represent 2^-1 to
+ * 2^-(DecPtIndex+1). Binary digits to the left of the decimal point represent
+ * 2^0, 2^1, etc. For a given Q format, using an unsigned integer container with
+ * n fractional bits:
+ * its range is [0, 2^-n]
+ * its resolution is 2^n
+ *
+ * @param	Val is the binary representation of the fraction.
+ * @param	DecPtIndex is the index of the decimal point in the binary
+ *		number. The decimal point is between the binary digits at Val's
+ *		indices (DecPtIndex -1) and (DecPtIndex). DecPtIndex will
+ *		determine the Q format resolution.
+ *
+ * @return	Fixed point representation of the fractional part of the binary
+ *              number in Q format.
+ *
+ * @note	None.
+ *
+*******************************************************************************/
+static int XVidC_CalculateBinaryFraction_QFormat(u16 Val, u8 DecPtIndex)
+{
+	int Index;
+	u32 Res;
+
+	for (Index = DecPtIndex - 1, Res = 0; Index >= 0; Index--) {
+		if (((Val >> Index) & 0x1) == 1) {
+			Res += XVidC_CalculatePower(2 , Index);
+		}
+	}
+
+	return Res;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid.h b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid.h
new file mode 100644
index 0000000..347b4f3
--- /dev/null
+++ b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid.h
@@ -0,0 +1,484 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xvidc_edid.h
+ * @addtogroup video_common_v4_2
+ * @{
+ *
+ * Contains macros, definitions, and function declarations related to the
+ * Extended Display Identification Data (EDID) structure which is present in all
+ * monitors. All content in this file is agnostic of communication interface
+ * protocol.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   als  11/09/14 Initial release.
+ * 2.2   als  02/01/16 Functions with pointer arguments that don't modify
+ *                     contents now const.
+ * 4.0   aad  10/26/16 Functions which return fixed point values instead of
+ *		       float
+ * 

+ *
+*******************************************************************************/
+
+#ifndef XVIDC_EDID_H_
+/* Prevent circular inclusions by using protection macros. */
+#define XVIDC_EDID_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/******************************* Include Files ********************************/
+
+#include "xstatus.h"
+#include "xvidc.h"
+
+/************************** Constant Definitions ******************************/
+
+/** @name Address mapping for the base EDID block.
+ * @{
+ */
+#define XVIDC_EDID_HEADER				0x00
+/* Vendor and product identification. */
+#define XVIDC_EDID_VPI_ID_MAN_NAME0			0x08
+#define XVIDC_EDID_VPI_ID_MAN_NAME1			0x09
+#define XVIDC_EDID_VPI_ID_PROD_CODE_LSB			0x0A
+#define XVIDC_EDID_VPI_ID_PROD_CODE_MSB			0x0B
+#define XVIDC_EDID_VPI_ID_SN0				0x0C
+#define XVIDC_EDID_VPI_ID_SN1				0x0D
+#define XVIDC_EDID_VPI_ID_SN2				0x0E
+#define XVIDC_EDID_VPI_ID_SN3				0x0F
+#define XVIDC_EDID_VPI_WEEK_MAN				0x10
+#define XVIDC_EDID_VPI_YEAR				0x11
+/* EDID structure version and revision. */
+#define XVIDC_EDID_STRUCT_VER				0x12
+#define XVIDC_EDID_STRUCT_REV				0x13
+/* Basic display parameters and features. */
+#define XVIDC_EDID_BDISP_VID				0x14
+#define XVIDC_EDID_BDISP_H_SSAR				0x15
+#define XVIDC_EDID_BDISP_V_SSAR				0x16
+#define XVIDC_EDID_BDISP_GAMMA				0x17
+#define XVIDC_EDID_BDISP_FEATURE			0x18
+/* Color characteristics (display x,y chromaticity coordinates). */
+#define XVIDC_EDID_CC_RG_LOW				0x19
+#define XVIDC_EDID_CC_BW_LOW				0x1A
+#define XVIDC_EDID_CC_REDX_HIGH				0x1B
+#define XVIDC_EDID_CC_REDY_HIGH				0x1C
+#define XVIDC_EDID_CC_GREENX_HIGH			0x1D
+#define XVIDC_EDID_CC_GREENY_HIGH			0x1E
+#define XVIDC_EDID_CC_BLUEX_HIGH			0x1F
+#define XVIDC_EDID_CC_BLUEY_HIGH			0x20
+#define XVIDC_EDID_CC_WHITEX_HIGH			0x21
+#define XVIDC_EDID_CC_WHITEY_HIGH			0x22
+/* Established timings. */
+#define XVIDC_EDID_EST_TIMINGS_I			0x23
+#define XVIDC_EDID_EST_TIMINGS_II			0x24
+#define XVIDC_EDID_EST_TIMINGS_MAN			0x25
+/* Standard timings. */
+#define XVIDC_EDID_STD_TIMINGS_H(N)			(0x26 + 2 * (N - 1))
+#define XVIDC_EDID_STD_TIMINGS_AR_FRR(N)		(0x27 + 2 * (N - 1))
+/* 18 byte descriptors. */
+#define XVIDC_EDID_18BYTE_DESCRIPTOR(N)			(0x36 + 18 * (N - 1))
+#define XVIDC_EDID_PTM			(XVIDC_EDID_18BYTE_DESCRIPTOR(1))
+/* - Detailed timing descriptor (DTD) / Preferred timing mode (PTM). */
+#define XVIDC_EDID_DTD_PTM_PIXEL_CLK_KHZ_LSB		0x00
+#define XVIDC_EDID_DTD_PTM_PIXEL_CLK_KHZ_MSB		0x01
+#define XVIDC_EDID_DTD_PTM_HRES_LSB			0x02
+#define XVIDC_EDID_DTD_PTM_HBLANK_LSB			0x03
+#define XVIDC_EDID_DTD_PTM_HRES_HBLANK_U4		0x04
+#define XVIDC_EDID_DTD_PTM_VRES_LSB			0x05
+#define XVIDC_EDID_DTD_PTM_VBLANK_LSB			0x06
+#define XVIDC_EDID_DTD_PTM_VRES_VBLANK_U4		0x07
+#define XVIDC_EDID_DTD_PTM_HFPORCH_LSB			0x08
+#define XVIDC_EDID_DTD_PTM_HSPW_LSB			0x09
+#define XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4		0x0A
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2		0x0B
+#define XVIDC_EDID_DTD_PTM_HIMGSIZE_MM_LSB		0x0C
+#define XVIDC_EDID_DTD_PTM_VIMGSIZE_MM_LSB		0x0D
+#define XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4		0x0E
+#define XVIDC_EDID_DTD_PTM_HBORDER			0x0F
+#define XVIDC_EDID_DTD_PTM_VBORDER			0x10
+#define XVIDC_EDID_DTD_PTM_SIGNAL			0x11
+
+/* Extension block count. */
+#define XVIDC_EDID_EXT_BLK_COUNT			0x7E
+/* Checksum. */
+#define XVIDC_EDID_CHECKSUM				0x7F
+/* @} */
+
+/******************************************************************************/
+
+/** @name Extended Display Identification Data: Masks, shifts, and values.
+ * @{
+ */
+#define XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR0_SHIFT		2
+#define XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR0_MASK		(0x1F << 2)
+#define XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR1_MASK		0x03
+#define XVIDC_EDID_VPI_ID_MAN_NAME0_CHAR1_POS		3
+#define XVIDC_EDID_VPI_ID_MAN_NAME1_CHAR1_SHIFT		5
+#define XVIDC_EDID_VPI_ID_MAN_NAME1_CHAR2_MASK		0x1F
+
+/* Basic display parameters and features: Video input definition. */
+#define XVIDC_EDID_BDISP_VID_VSI_SHIFT			7
+#define XVIDC_EDID_BDISP_VID_VSI_MASK			(0x01 << 7)
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_SHIFT		5
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_MASK		(0x03 << 5)
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_0700_0300_1000	0x0
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_0714_0286_1000	0x1
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_1000_0400_1400	0x2
+#define XVIDC_EDID_BDISP_VID_ANA_SLS_0700_0000_0700	0x3
+#define XVIDC_EDID_BDISP_VID_ANA_VID_SETUP_MASK		(0x01 << 4)
+#define XVIDC_EDID_BDISP_VID_ANA_SEP_SYNC_HV_MASK	(0x01 << 3)
+#define XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_H_MASK	(0x01 << 2)
+#define XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_G_MASK	(0x01 << 1)
+#define XVIDC_EDID_BDISP_VID_ANA_SERR_V_SYNC_MASK	(0x01)
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_SHIFT		4
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_MASK		(0x7 << 4)
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_UNDEF		0x0
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_6			0x1
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_8			0x2
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_10			0x3
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_12			0x4
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_14			0x5
+#define XVIDC_EDID_BDISP_VID_DIG_BPC_16			0x6
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_MASK		0xF
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_UNDEF		0x0
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_DVI		0x1
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_HDMIA		0x2
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_HDMIB		0x3
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_MDDI		0x4
+#define XVIDC_EDID_BDISP_VID_DIG_VIS_DP			0x5
+
+/* Basic display parameters and features: Feature support. */
+#define XVIDC_EDID_BDISP_FEATURE_PM_STANDBY_MASK	(0x1 << 7)
+#define XVIDC_EDID_BDISP_FEATURE_PM_SUSPEND_MASK	(0x1 << 6)
+#define XVIDC_EDID_BDISP_FEATURE_PM_OFF_VLP_MASK	(0x1 << 5)
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_SHIFT	3
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_MASK	(0x3 << 3)
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_MCG	0x0
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_RGB	0x1
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_NRGB	0x2
+#define XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_UNDEF	0x3
+#define XVIDC_EDID_BDISP_FEATURE_DIG_COLORENC_YCRCB444_MASK	(0x1 << 3)
+#define XVIDC_EDID_BDISP_FEATURE_DIG_COLORENC_YCRCB422_MASK	(0x1 << 4)
+#define XVIDC_EDID_BDISP_FEATURE_SRGB_DEF_MASK		(0x1 << 2)
+#define XVIDC_EDID_BDISP_FEATURE_PTM_INC_MASK		(0x1 << 1)
+#define XVIDC_EDID_BDISP_FEATURE_CONTFREQ_MASK		(0x1)
+
+/* Color characteristics (display x,y chromaticity coordinates). */
+#define XVIDC_EDID_CC_HIGH_SHIFT			2
+#define XVIDC_EDID_CC_RBX_LOW_SHIFT			6
+#define XVIDC_EDID_CC_RBY_LOW_SHIFT			4
+#define XVIDC_EDID_CC_RBY_LOW_MASK			(0x3 << 4)
+#define XVIDC_EDID_CC_GWX_LOW_SHIFT			2
+#define XVIDC_EDID_CC_GWX_LOW_MASK			(0x3 << 2)
+#define XVIDC_EDID_CC_GWY_LOW_MASK			(0x3)
+#define XVIDC_EDID_CC_GREENY_HIGH			0x1E
+#define XVIDC_EDID_CC_BLUEX_HIGH			0x1F
+#define XVIDC_EDID_CC_BLUEY_HIGH			0x20
+#define XVIDC_EDID_CC_WHITEX_HIGH			0x21
+#define XVIDC_EDID_CC_WHITEY_HIGH			0x22
+
+/* Established timings. */
+#define XVIDC_EDID_EST_TIMINGS_I_720x400_70_MASK	(0x1 << 7)
+#define XVIDC_EDID_EST_TIMINGS_I_720x400_88_MASK	(0x1 << 6)
+#define XVIDC_EDID_EST_TIMINGS_I_640x480_60_MASK	(0x1 << 5)
+#define XVIDC_EDID_EST_TIMINGS_I_640x480_67_MASK	(0x1 << 4)
+#define XVIDC_EDID_EST_TIMINGS_I_640x480_72_MASK	(0x1 << 3)
+#define XVIDC_EDID_EST_TIMINGS_I_640x480_75_MASK	(0x1 << 2)
+#define XVIDC_EDID_EST_TIMINGS_I_800x600_56_MASK	(0x1 << 1)
+#define XVIDC_EDID_EST_TIMINGS_I_800x600_60_MASK	(0x1)
+#define XVIDC_EDID_EST_TIMINGS_II_800x600_72_MASK	(0x1 << 7)
+#define XVIDC_EDID_EST_TIMINGS_II_800x600_75_MASK	(0x1 << 6)
+#define XVIDC_EDID_EST_TIMINGS_II_832x624_75_MASK	(0x1 << 5)
+#define XVIDC_EDID_EST_TIMINGS_II_1024x768_87_MASK	(0x1 << 4)
+#define XVIDC_EDID_EST_TIMINGS_II_1024x768_60_MASK	(0x1 << 3)
+#define XVIDC_EDID_EST_TIMINGS_II_1024x768_70_MASK	(0x1 << 2)
+#define XVIDC_EDID_EST_TIMINGS_II_1024x768_75_MASK	(0x1 << 1)
+#define XVIDC_EDID_EST_TIMINGS_II_1280x1024_75_MASK	(0x1)
+#define XVIDC_EDID_EST_TIMINGS_MAN_1152x870_75_MASK	(0x1 << 7)
+#define XVIDC_EDID_EST_TIMINGS_MAN_MASK			(0x7F)
+
+/* Standard timings. */
+#define XVIDC_EDID_STD_TIMINGS_AR_SHIFT			6
+#define XVIDC_EDID_STD_TIMINGS_AR_16_10			0x0
+#define XVIDC_EDID_STD_TIMINGS_AR_4_3			0x1
+#define XVIDC_EDID_STD_TIMINGS_AR_5_4			0x2
+#define XVIDC_EDID_STD_TIMINGS_AR_16_9			0x3
+#define XVIDC_EDID_STD_TIMINGS_FRR_MASK			(0x3F)
+
+/* Detailed timing descriptor (DTD) / Preferred timing mode (PTM). */
+#define XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XBLANK_MASK		0x0F
+#define XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XRES_MASK		0xF0
+#define XVIDC_EDID_DTD_PTM_XRES_XBLANK_U4_XRES_SHIFT		4
+#define XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4_VSPW_MASK		0x0F
+#define XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4_VFPORCH_MASK		0xF0
+#define XVIDC_EDID_DTD_PTM_VFPORCH_VSPW_L4_VFPORCH_SHIFT	4
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HFPORCH_MASK		0xC0
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HSPW_MASK		0x30
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_VFPORCH_MASK		0x0C
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_VSPW_MASK		0x03
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HFPORCH_SHIFT	6
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_HSPW_SHIFT		4
+#define XVIDC_EDID_DTD_PTM_XFPORCH_XSPW_U2_VFPORCH_SHIFT	2
+#define XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4_VIMGSIZE_MM_MASK	0x0F
+#define XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4_HIMGSIZE_MM_MASK	0xF0
+#define XVIDC_EDID_DTD_PTM_XIMGSIZE_MM_U4_HIMGSIZE_MM_SHIFT	4
+#define XVIDC_EDID_DTD_PTM_SIGNAL_INTERLACED_MASK		0x80
+#define XVIDC_EDID_DTD_PTM_SIGNAL_INTERLACED_SHIFT		7
+#define XVIDC_EDID_DTD_PTM_SIGNAL_HPOLARITY_MASK		0x02
+#define XVIDC_EDID_DTD_PTM_SIGNAL_VPOLARITY_MASK		0x04
+#define XVIDC_EDID_DTD_PTM_SIGNAL_HPOLARITY_SHIFT		1
+#define XVIDC_EDID_DTD_PTM_SIGNAL_VPOLARITY_SHIFT		2
+/* @} */
+
+/******************* Macros (Inline Functions) Definitions ********************/
+
+#define XVidC_EdidIsHeaderValid(E) \
+	!memcmp(E, "\x00\xFF\xFF\xFF\xFF\xFF\xFF\x00", 8)
+
+/* Vendor and product identification: ID manufacturer name. */
+/* void XVidC_EdidGetManName(const u8 *EdidRaw, char ManName[4]); */
+
+/* Vendor and product identification: ID product code. */
+#define XVidC_EdidGetIdProdCode(E) \
+	((u16)((E[XVIDC_EDID_VPI_ID_PROD_CODE_MSB] << 8) | \
+	E[XVIDC_EDID_VPI_ID_PROD_CODE_LSB]))
+
+/* Vendor and product identification: ID serial number. */
+#define XVidC_EdidGetIdSn(E) \
+	((u32)((E[XVIDC_EDID_VPI_ID_SN3] << 24) | \
+	(E[XVIDC_EDID_VPI_ID_SN2] << 16) | (E[XVIDC_EDID_VPI_ID_SN1] << 8) | \
+	E[XVIDC_EDID_VPI_ID_SN0]))
+
+/* Vendor and product identification: Week and year of manufacture or model
+ * year. */
+#define XVidC_EdidGetManWeek(E)		(E[XVIDC_EDID_VPI_WEEK_MAN])
+#define XVidC_EdidGetModManYear(E)	(E[XVIDC_EDID_VPI_YEAR] + 1990)
+#define XVidC_EdidIsYearModel(E)	(XVidC_EdidGetManWeek(E) == 0xFF)
+#define XVidC_EdidIsYearMan(E)		(XVidC_EdidGetManWeek(E) != 0xFF)
+
+/* EDID structure version and revision. */
+#define XVidC_EdidGetStructVer(E)	(E[XVIDC_EDID_STRUCT_VER])
+#define XVidC_EdidGetStructRev(E)	(E[XVIDC_EDID_STRUCT_REV])
+
+/* Basic display parameters and features: Video input definition. */
+#define XVidC_EdidIsDigitalSig(E) \
+	((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_VSI_MASK) != 0)
+#define XVidC_EdidIsAnalogSig(E) \
+	((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_VSI_MASK) == 0)
+#define XVidC_EdidGetAnalogSigLvlStd(E) \
+	((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_ANA_SLS_MASK) >> \
+	XVIDC_EDID_BDISP_VID_ANA_SLS_SHIFT)
+#define XVidC_EdidGetAnalogSigVidSetup(E) \
+	((E[XVIDC_EDID_BDISP_VID] & \
+	XVIDC_EDID_BDISP_VID_ANA_VID_SETUP_MASK) != 0)
+#define XVidC_EdidSuppAnalogSigSepSyncHv(E) \
+	((E[XVIDC_EDID_BDISP_VID] & \
+	XVIDC_EDID_BDISP_VID_ANA_SEP_SYNC_HV_MASK) != 0)
+#define XVidC_EdidSuppAnalogSigCompSyncH(E) \
+	((E[XVIDC_EDID_BDISP_VID] & \
+	XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_H_MASK) != 0)
+#define XVidC_EdidSuppAnalogSigCompSyncG(E) \
+	((E[XVIDC_EDID_BDISP_VID] & \
+	XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_G_MASK) != 0)
+#define XVidC_EdidSuppAnalogSigSerrVsync(E) \
+	((E[XVIDC_EDID_BDISP_VID] & \
+	XVIDC_EDID_BDISP_VID_ANA_SERR_V_SYNC_MASK) != 0)
+/* XVidC_ColorDepth XVidC_EdidGetColorDepth(const u8 *EdidRaw); */
+#define XVidC_EdidGetDigitalSigIfaceStd(E) \
+	(E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_DIG_VIS_MASK)
+
+/* Basic display parameters and features: Horizontal and vertical screen size or
+ * aspect ratio. */
+#define XVidC_EdidIsSsArDefined(E) \
+	((E[XVIDC_EDID_BDISP_H_SSAR] | E[XVIDC_EDID_BDISP_V_SSAR]) != 0)
+#define XVidC_EdidGetSsArH(E)	E[XVIDC_EDID_BDISP_H_SSAR]
+#define XVidC_EdidGetSsArV(E)	E[XVIDC_EDID_BDISP_V_SSAR]
+#define XVidC_EdidIsSsArSs(E) \
+	((XVidC_EdidGetSsArH(E) != 0) && (XVidC_EdidGetSsArV(E) != 0))
+#define XVidC_EdidIsSsArArL(E) \
+	((XVidC_EdidGetSsArH(E) != 0) && (XVidC_EdidGetSsArV(E) == 0))
+#define XVidC_EdidIsSsArArP(E) \
+	((XVidC_EdidGetSsArH(E) == 0) && (XVidC_EdidGetSsArV(E) != 0))
+#define XVidC_EdidGetSsArArL(E) \
+	((float)((XVidC_EdidGetSsArH(E) + 99.0) / 100.0))
+#define XVidC_EdidGetSsArArP(E) \
+	((float)(100.0 / (XVidC_EdidGetSsArV(E) + 99.0)))
+
+/* Basic display parameters and features: Gamma. */
+#define XVidC_EdidIsGammaInExt(E)	(E[XVIDC_EDID_BDISP_GAMMA] == 0xFF)
+#define XVidC_EdidGetGamma(E) \
+	((float)((E[XVIDC_EDID_BDISP_GAMMA] + 100.0) / 100.0))
+
+/* Basic display parameters and features: Feature support. */
+#define XVidC_EdidSuppFeaturePmStandby(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_PM_STANDBY_MASK) != 0)
+#define XVidC_EdidSuppFeaturePmSuspend(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_PM_SUSPEND_MASK) != 0)
+#define XVidC_EdidSuppFeaturePmOffVlp(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_PM_OFF_VLP_MASK) != 0)
+#define XVidC_EdidGetFeatureAnaColorType(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_MASK) >> \
+	XVIDC_EDID_BDISP_FEATURE_ANA_COLORTYPE_SHIFT)
+#define XVidC_EdidSuppFeatureDigColorEncYCrCb444(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_DIG_COLORENC_YCRCB444_MASK) != 0)
+#define XVidC_EdidSuppFeatureDigColorEncYCrCb422(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_DIG_COLORENC_YCRCB422_MASK) != 0)
+#define XVidC_EdidIsFeatureSrgbDef(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_SRGB_DEF_MASK) != 0)
+#define XVidC_EdidIsFeaturePtmInc(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_PTM_INC_MASK) != 0)
+#define XVidC_EdidIsFeatureContFreq(E) \
+	((E[XVIDC_EDID_BDISP_FEATURE] & \
+	XVIDC_EDID_BDISP_FEATURE_CONTFREQ_MASK) != 0)
+
+/* Established timings. */
+#define XVidC_EdidSuppEstTimings720x400_70(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_720x400_70_MASK) != 0)
+#define XVidC_EdidSuppEstTimings720x400_88(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_720x400_88_MASK) != 0)
+#define XVidC_EdidSuppEstTimings640x480_60(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_640x480_60_MASK) != 0)
+#define XVidC_EdidSuppEstTimings640x480_67(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_640x480_67_MASK) != 0)
+#define XVidC_EdidSuppEstTimings640x480_72(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_640x480_72_MASK) != 0)
+#define XVidC_EdidSuppEstTimings640x480_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_640x480_75_MASK) != 0)
+#define XVidC_EdidSuppEstTimings800x600_56(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_800x600_56_MASK) != 0)
+#define XVidC_EdidSuppEstTimings800x600_60(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_I] & \
+	XVIDC_EDID_EST_TIMINGS_I_800x600_60_MASK) != 0)
+#define XVidC_EdidSuppEstTimings800x600_72(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_800x600_72_MASK) != 0)
+#define XVidC_EdidSuppEstTimings800x600_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_800x600_75_MASK) != 0)
+#define XVidC_EdidSuppEstTimings832x624_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_832x624_75_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1024x768_87(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_1024x768_87_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1024x768_60(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_1024x768_60_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1024x768_70(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_1024x768_70_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1024x768_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_1024x768_75_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1280x1024_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_II] & \
+	XVIDC_EDID_EST_TIMINGS_II_1280x1024_75_MASK) != 0)
+#define XVidC_EdidSuppEstTimings1152x870_75(E) \
+	((E[XVIDC_EDID_EST_TIMINGS_MAN] & \
+	XVIDC_EDID_EST_TIMINGS_MAN_1152x870_75_MASK) != 0)
+#define XVidC_EdidGetTimingsMan(E) \
+	(E[XVIDC_EDID_EST_TIMINGS_MAN] & XVIDC_EDID_EST_TIMINGS_MAN_MASK)
+
+/* Standard timings. */
+#define XVidC_EdidGetStdTimingsH(E, N) \
+	((E[XVIDC_EDID_STD_TIMINGS_H(N)] + 31) * 8)
+#define XVidC_EdidGetStdTimingsAr(E, N) \
+	(E[XVIDC_EDID_STD_TIMINGS_AR_FRR(N)] >> XVIDC_EDID_STD_TIMINGS_AR_SHIFT)
+#define XVidC_EdidGetStdTimingsFrr(E, N) \
+	((E[XVIDC_EDID_STD_TIMINGS_AR_FRR(N)] & \
+	XVIDC_EDID_STD_TIMINGS_FRR_MASK) + 60)
+/* u16 XVidC_EdidGetStdTimingsV(const u8 *EdidRaw, u8 StdTimingsNum); */
+#define XVidC_EdidIsDtdPtmInterlaced(E) \
+	((E[XVIDC_EDID_PTM + XVIDC_EDID_DTD_PTM_SIGNAL] & \
+	XVIDC_EDID_DTD_PTM_SIGNAL_INTERLACED_MASK) >> \
+	XVIDC_EDID_DTD_PTM_SIGNAL_INTERLACED_SHIFT)
+
+/* Extension block count. */
+#define XVidC_EdidGetExtBlkCount(E)	(E[XVIDC_EDID_EXT_BLK_COUNT])
+
+/* Checksum. */
+#define XVidC_EdidGetChecksum(E)	(E[XVIDC_EDID_CHECKSUM])
+
+/**************************** Function Prototypes *****************************/
+
+/* Vendor and product identification: ID manufacturer name. */
+void XVidC_EdidGetManName(const u8 *EdidRaw, char ManName[4]);
+
+/* Basic display parameters and features: Video input definition. */
+XVidC_ColorDepth XVidC_EdidGetColorDepth(const u8 *EdidRaw);
+
+/* Color characteristics (display x,y chromaticity coordinates). */
+int XVidC_EdidGetCcRedX(const u8 *EdidRaw);
+int XVidC_EdidGetCcRedY(const u8 *EdidRaw);
+int XVidC_EdidGetCcGreenX(const u8 *EdidRaw);
+int XVidC_EdidGetCcGreenY(const u8 *EdidRaw);
+int XVidC_EdidGetCcBlueX(const u8 *EdidRaw);
+int XVidC_EdidGetCcBlueY(const u8 *EdidRaw);
+int XVidC_EdidGetCcWhiteX(const u8 *EdidRaw);
+int XVidC_EdidGetCcWhiteY(const u8 *EdidRaw);
+
+/* Standard timings. */
+u16 XVidC_EdidGetStdTimingsV(const u8 *EdidRaw, u8 StdTimingsNum);
+
+/* Utility functions. */
+u32 XVidC_EdidIsVideoTimingSupported(const u8 *EdidRaw,
+		const XVidC_VideoTimingMode *VtMode);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* XVIDC_EDID_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid_ext.c b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid_ext.c
new file mode 100644
index 0000000..c8ce9f1
--- /dev/null
+++ b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid_ext.c
@@ -0,0 +1,174 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 - 2018 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xhdmi_edid.h
+*
+* Software Initalization & Configuration
+*
+* Interrupts 
+*
+*  Virtual Memory 
+*
+* This driver supports Virtual Memory. The RTOS is responsible for calculating
+* the correct device base address in Virtual Memory space.
+*
+*  Threads 
+*
+* This driver is not thread safe. Any needs for threads or thread mutual
+* exclusion must be satisfied by the layer above this driver.
+*
+*  Asserts 
+*
+* Asserts are used within all Xilinx drivers to enforce constraints on argument
+* values. Asserts can be turned off on a system-wide basis by defining at
+* compile time, the NDEBUG identifier. By default, asserts are turned on and it
+* is recommended that users leave asserts on during development.
+*
+*  Building the driver 
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date       Changes
+* ----- ---- ---------- --------------------------------------------------
+* 1.0   mmo  24-01-2017 EDID Parser capability
+* 

+*
+******************************************************************************/
+#include "stdio.h"
+#include "string.h"
+#include "stdlib.h"
+#include "stdbool.h"
+#include "xil_types.h"
+#include "xstatus.h"
+#include "xil_exception.h"
+#include "xvidc_edid_ext.h"
+
+static XV_VidC_PicAspectRatio xv_vidc_getPicAspectRatio(u16 hres, u16 vres);
+
+static XV_VidC_PicAspectRatio xv_vidc_getPicAspectRatio(u16 hres, u16 vres) {
+    XV_VidC_PicAspectRatio ar;
+#define HAS_RATIO_OF(x, y)  (hres == (vres*(x)/(y))&&!((vres*(x))%(y)))
+    if (HAS_RATIO_OF(16, 10)) {
+        ar.width = 16;
+        ar.height = 10;
+        return ar;
+    }
+    if (HAS_RATIO_OF(4, 3)) {
+        ar.width = 4;
+        ar.height = 3;
+        return ar;
+    }
+    if (HAS_RATIO_OF(5, 4)) {
+        ar.width = 5;
+        ar.height = 4;
+        return ar;
+    }
+    if (HAS_RATIO_OF(16, 9)) {
+        ar.width = 16;
+        ar.height = 9;
+        return ar;
+#undef HAS_RATIO
+    } else {
+        ar.width = 0;
+        ar.height = 0;
+        return ar;
+    }
+}
+
+
+void XV_VidC_EdidCtrlParamInit (XV_VidC_EdidCntrlParam *EdidCtrlParam) {
+	
+	/* Verify arguments. */
+	Xil_AssertVoid(EdidCtrlParam != NULL);
+
+	(void)memset((void *)EdidCtrlParam,  0,
+			sizeof(XV_VidC_EdidCntrlParam));
+			
+	EdidCtrlParam->IsHdmi                = XVIDC_ISDVI;
+    EdidCtrlParam->IsYCbCr444Supp        = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->IsYCbCr420Supp        = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->IsYCbCr422Supp        = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->IsYCbCr444DeepColSupp = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->Is30bppSupp           = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->Is36bppSupp           = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->Is48bppSupp           = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->IsYCbCr420dc30bppSupp = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->IsYCbCr420dc36bppSupp = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->IsYCbCr420dc48bppSupp = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->IsSCDCReadRequestReady= XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->IsSCDCPresent         = XVIDC_NOT_SUPPORTED;
+    EdidCtrlParam->MaxFrameRateSupp      = 0;
+    EdidCtrlParam->MaxTmdsMhz            = 0;
+}
+
+XV_VidC_TimingParam
+XV_VidC_timing
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    XV_VidC_TimingParam timing;
+
+    timing.hres   = xvidc_edid_detailed_timing_horizontal_active(dtb);
+    timing.vres   = xvidc_edid_detailed_timing_vertical_active(dtb);
+    timing.htotal = timing.hres +
+                        xvidc_edid_detailed_timing_horizontal_blanking(dtb);
+    timing.vtotal = timing.vres +
+                          xvidc_edid_detailed_timing_vertical_blanking(dtb);
+    timing.hfp    = xvidc_edid_detailed_timing_horizontal_sync_offset(dtb);
+    timing.vfp    = xvidc_edid_detailed_timing_vertical_sync_offset(dtb);
+    timing.hsync_width  =
+                xvidc_edid_detailed_timing_horizontal_sync_pulse_width(dtb);
+    timing.vsync_width  =
+                  xvidc_edid_detailed_timing_vertical_sync_pulse_width(dtb);
+    timing.pixclk       = xvidc_edid_detailed_timing_pixel_clock(dtb);
+    timing.vfreq        = (timing.pixclk / (timing.vtotal * timing.htotal));
+    timing.vidfrmt      = (XVidC_VideoFormat) dtb->interlaced;
+    timing.aspect_ratio =
+                         xv_vidc_getPicAspectRatio (timing.hres, timing.vres);
+    timing.hsync_polarity = dtb->signal_pulse_polarity;
+    timing.vsync_polarity = dtb->signal_serration_polarity;
+
+    return timing;
+}
+
+#if XVIDC_EDID_VERBOSITY > 1
+XV_VidC_DoubleRep Double2Int (double in_val) {
+	XV_VidC_DoubleRep DR;
+
+	DR.Integer = in_val;
+	DR.Decimal = (in_val - DR.Integer) * 10000;
+
+	return (DR);
+}
+#endif
diff --git a/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid_ext.h b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid_ext.h
new file mode 100644
index 0000000..d685723
--- /dev/null
+++ b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_edid_ext.h
@@ -0,0 +1,626 @@
+/* vim: set et fde fdm=syntax ft=c.doxygen ts=4 sts=4 sw=4 : */
+/*
+ * Copyright © 2010-2011 Saleem Abdulrasool .
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef xvidc_edid_h
+#define xvidc_edid_h
+
+#include "stdbool.h"
+#include "xvidc.h"
+#include "xil_assert.h"
+#include "xvidc_cea861.h"
+
+#define XVIDC_EDID_BLOCK_SIZE                         (0x80)
+#define XVIDC_EDID_MAX_EXTENSIONS                     (0xFE)
+
+
+static const u8 XVIDC_EDID_EXT_HEADER[] =
+                            { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
+static const u8 XVIDC_EDID_STANDARD_TIMING_DESCRIPTOR_INVALID[] =
+                                                                { 0x01, 0x01 };
+
+enum xvidc_edid_extension_type {
+    XVIDC_EDID_EXTENSION_TIMING           = 0x01, /* Timing Extension */
+    XVIDC_EDID_EXTENSION_CEA              = 0x02, /* Additional Timing Block
+                                             Data (CEA EDID Timing Extension)*/
+    XVIDC_EDID_EXTENSION_VTB              = 0x10, /* Video Timing Block
+                                                          Extension (VTB-EXT)*/
+    XVIDC_EDID_EXTENSION_XVIDC_EDID_2_0= 0x20, /* EDID 2.0 Extension  */
+    XVIDC_EDID_EXTENSION_DI               = 0x40, /* Display Information
+                                                          Extension (DI-EXT) */
+    XVIDC_EDID_EXTENSION_LS               = 0x50, /* Localised String
+                                                          Extension (LS-EXT) */
+    XVIDC_EDID_EXTENSION_MI               = 0x60, /* Microdisplay Interface
+                                                          Extension (MI-EXT) */
+    XVIDC_EDID_EXTENSION_DTCDB_1          = 0xA7, /* Display Transfer
+                                          Characteristics Data Block (DTCDB) */
+    XVIDC_EDID_EXTENSION_DTCDB_2          = 0xAF,
+    XVIDC_EDID_EXTENSION_DTCDB_3          = 0xBF,
+    XVIDC_EDID_EXTENSION_BLOCK_MAP        = 0xF0, /* Block Map*/
+    XVIDC_EDID_EXTENSION_DDDB             = 0xFF, /* Display Device Data
+                                                                 Block (DDDB)*/
+};
+
+enum xvidc_edid_display_type {
+    XVIDC_EDID_DISPLAY_TYPE_MONOCHROME,
+    XVIDC_EDID_DISPLAY_TYPE_RGB,
+    XVIDC_EDID_DISPLAY_TYPE_NON_RGB,
+    XVIDC_EDID_DISPLAY_TYPE_UNDEFINED,
+};
+
+enum xvidc_edid_aspect_ratio {
+    XVIDC_EDID_ASPECT_RATIO_16_10,
+    XVIDC_EDID_ASPECT_RATIO_4_3,
+    XVIDC_EDID_ASPECT_RATIO_5_4,
+    XVIDC_EDID_ASPECT_RATIO_16_9,
+};
+
+enum xvidc_edid_signal_sync {
+    XVIDC_EDID_SIGNAL_SYNC_ANALOG_COMPOSITE,
+    XVIDC_EDID_SIGNAL_SYNC_BIPOLAR_ANALOG_COMPOSITE,
+    XVIDC_EDID_SIGNAL_SYNC_DIGITAL_COMPOSITE,
+    XVIDC_EDID_SIGNAL_SYNC_DIGITAL_SEPARATE,
+};
+
+enum xvidc_edid_stereo_mode {
+    XVIDC_EDID_STEREO_MODE_NONE,
+    XVIDC_EDID_STEREO_MODE_RESERVED,
+    XVIDC_EDID_STEREO_MODE_FIELD_SEQUENTIAL_RIGHT,
+    XVIDC_EDID_STEREO_MODE_2_WAY_INTERLEAVED_RIGHT,
+    XVIDC_EDID_STEREO_MODE_FIELD_SEQUENTIAL_LEFT,
+    XVIDC_EDID_STEREO_MODE_2_WAY_INTERLEAVED_LEFT,
+    XVIDC_EDID_STEREO_MODE_4_WAY_INTERLEAVED,
+    XVIDC_EDID_STEREO_MODE_SIDE_BY_SIDE_INTERLEAVED,
+};
+
+enum xvidc_edid_monitor_descriptor_type {
+    XVIDC_EDID_MONTIOR_DESCRIPTOR_MANUFACTURER_DEFINED        = 0x0F,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_STANDARD_TIMING_IDENTIFIERS = 0xFA,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_COLOR_POINT                 = 0xFB,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_MONITOR_NAME                = 0xFC,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_MONITOR_RANGE_LIMITS        = 0xFD,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_ASCII_STRING                = 0xFE,
+    XVIDC_EDID_MONITOR_DESCRIPTOR_MONITOR_SERIAL_NUMBER       = 0xFF,
+};
+
+enum xvidc_edid_secondary_timing_support {
+    XVIDC_EDID_SECONDARY_TIMING_NOT_SUPPORTED,
+    XVIDC_EDID_SECONDARY_TIMING_GFT           = 0x02,
+};
+
+
+struct __attribute__ (( packed )) xvidc_edid_detailed_timing_descriptor {
+    u16 pixel_clock;                               /* = value * 10000 */
+
+    u8  horizontal_active_lo;
+    u8  horizontal_blanking_lo;
+
+    unsigned horizontal_blanking_hi         : 4;
+    unsigned horizontal_active_hi           : 4;
+
+    u8  vertical_active_lo;
+    u8  vertical_blanking_lo;
+
+    unsigned vertical_blanking_hi           : 4;
+    unsigned vertical_active_hi             : 4;
+
+    u8  horizontal_sync_offset_lo;
+    u8  horizontal_sync_pulse_width_lo;
+
+    unsigned vertical_sync_pulse_width_lo   : 4;
+    unsigned vertical_sync_offset_lo        : 4;
+
+    unsigned vertical_sync_pulse_width_hi   : 2;
+    unsigned vertical_sync_offset_hi        : 2;
+    unsigned horizontal_sync_pulse_width_hi : 2;
+    unsigned horizontal_sync_offset_hi      : 2;
+
+    u8  horizontal_image_size_lo;
+    u8  vertical_image_size_lo;
+
+    unsigned vertical_image_size_hi         : 4;
+    unsigned horizontal_image_size_hi       : 4;
+
+    u8  horizontal_border;
+    u8  vertical_border;
+
+    unsigned stereo_mode_lo                 : 1;
+    unsigned signal_pulse_polarity          : 1; /* pulse on sync,
+                                               composite/horizontal polarity */
+    unsigned signal_serration_polarity      : 1; /* serrate on sync, vertical
+                                                                    polarity */
+    unsigned signal_sync                    : 2;
+    unsigned stereo_mode_hi                 : 2;
+    unsigned interlaced                     : 1;
+};
+
+static inline u32
+xvidc_edid_detailed_timing_pixel_clock
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return dtb->pixel_clock * 10000;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_horizontal_blanking
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->horizontal_blanking_hi << 8) | dtb->horizontal_blanking_lo;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_horizontal_active
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->horizontal_active_hi << 8) | dtb->horizontal_active_lo;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_vertical_blanking
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->vertical_blanking_hi << 8) | dtb->vertical_blanking_lo;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_vertical_active
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->vertical_active_hi << 8) | dtb->vertical_active_lo;
+}
+
+static inline u8
+xvidc_edid_detailed_timing_vertical_sync_offset
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->vertical_sync_offset_hi << 4) | dtb->vertical_sync_offset_lo;
+}
+
+static inline u8
+xvidc_edid_detailed_timing_vertical_sync_pulse_width
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->vertical_sync_pulse_width_hi << 4) |
+                                             dtb->vertical_sync_pulse_width_lo;
+}
+
+static inline u8
+xvidc_edid_detailed_timing_horizontal_sync_offset
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->horizontal_sync_offset_hi << 4) |
+                                                dtb->horizontal_sync_offset_lo;
+}
+
+static inline u8
+xvidc_edid_detailed_timing_horizontal_sync_pulse_width
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->horizontal_sync_pulse_width_hi << 4) |
+                                           dtb->horizontal_sync_pulse_width_lo;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_horizontal_image_size
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return
+          (dtb->horizontal_image_size_hi << 8) | dtb->horizontal_image_size_lo;
+}
+
+static inline u16
+xvidc_edid_detailed_timing_vertical_image_size
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->vertical_image_size_hi << 8) | dtb->vertical_image_size_lo;
+}
+
+static inline u8
+xvidc_edid_detailed_timing_stereo_mode
+            (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
+{
+    return (dtb->stereo_mode_hi << 2 | dtb->stereo_mode_lo);
+}
+
+
+struct __attribute__ (( packed )) xvidc_edid_monitor_descriptor {
+    u16 flag0;
+    u8  flag1;
+    u8  tag;
+    u8  flag2;
+    u8  data[13];
+};
+
+typedef char xvidc_edid_monitor_descriptor_string
+            [sizeof(((struct xvidc_edid_monitor_descriptor *)0)->data) + 1];
+
+
+struct __attribute__ (( packed )) xvidc_edid_monitor_range_limits {
+    u8  minimum_vertical_rate;             /* Hz */
+    u8  maximum_vertical_rate;             /* Hz */
+    u8  minimum_horizontal_rate;           /* kHz */
+    u8  maximum_horizontal_rate;           /* kHz */
+    u8  maximum_supported_pixel_clock;     /* = (value * 10) Mhz
+                                                   (round to 10 MHz) */
+
+    /* secondary timing formula */
+    u8  secondary_timing_support;
+    u8  reserved;
+    u8  secondary_curve_start_frequency;   /* horizontal frequency / 2 kHz */
+    u8  c;                                 /* = (value >> 1) */
+    u16 m;
+    u8  k;
+    u8  j;                                 /* = (value >> 1) */
+};
+
+
+struct __attribute__ (( packed )) xvidc_edid_standard_timing_descriptor {
+    u8  horizontal_active_pixels;         /* = (value + 31) * 8 */
+
+    unsigned refresh_rate       : 6;           /* = value + 60 */
+    unsigned image_aspect_ratio : 2;
+};
+
+inline u32
+xvidc_edid_standard_timing_horizontal_active
+(const struct xvidc_edid_standard_timing_descriptor * const desc) {
+    return ((desc->horizontal_active_pixels + 31) << 3);
+}
+
+inline u32
+xvidc_edid_standard_timing_vertical_active
+(const struct xvidc_edid_standard_timing_descriptor * const desc) {
+    const u32 hres = xvidc_edid_standard_timing_horizontal_active(desc);
+
+    switch (desc->image_aspect_ratio) {
+    case XVIDC_EDID_ASPECT_RATIO_16_10:
+        return ((hres * 10) >> 4);
+    case XVIDC_EDID_ASPECT_RATIO_4_3:
+        return ((hres * 3) >> 2);
+    case XVIDC_EDID_ASPECT_RATIO_5_4:
+        return ((hres << 2) / 5);
+    case XVIDC_EDID_ASPECT_RATIO_16_9:
+        return ((hres * 9) >> 4);
+    }
+
+    return hres;
+}
+
+inline u32
+xvidc_edid_standard_timing_refresh_rate
+(const struct xvidc_edid_standard_timing_descriptor * const desc) {
+    return (desc->refresh_rate + 60);
+}
+
+
+struct __attribute__ (( packed )) edid {
+    /* header information */
+    u8  header[8];
+
+    /* vendor/product identification */
+    u16 manufacturer;
+    union {
+        u16 product_u16;
+        u8  product[2];
+    };
+    union {
+        u32 serial_number_u32;
+        u8  serial_number[4];
+    };
+    u8  manufacture_week;
+    u8  manufacture_year;                  /* = value + 1990 */
+
+    /* EDID version */
+    u8  version;
+    u8  revision;
+
+    /* basic display parameters and features */
+    union {
+        struct __attribute__ (( packed )) {
+            unsigned dfp_1x                 : 1;    /* VESA DFP 1.x */
+            unsigned                        : 6;
+            unsigned digital                : 1;
+        } digital;
+        struct __attribute__ (( packed )) {
+            unsigned vsync_serration        : 1;
+            unsigned green_video_sync       : 1;
+            unsigned composite_sync         : 1;
+            unsigned separate_sync          : 1;
+            unsigned blank_to_black_setup   : 1;
+            unsigned signal_level_standard  : 2;
+            unsigned digital                : 1;
+        } analog;
+    } video_input_definition;
+
+    u8  maximum_horizontal_image_size;     /* cm */
+    u8  maximum_vertical_image_size;       /* cm */
+
+    u8  display_transfer_characteristics;  /* gamma = (value + 100) / 100 */
+
+    struct __attribute__ (( packed )) {
+        unsigned default_gtf                    : 1; /* generalised timing
+                                                     formula */
+        unsigned preferred_timing_mode          : 1;
+        unsigned standard_default_color_space   : 1;
+        unsigned display_type                   : 2;
+        unsigned active_off                     : 1;
+        unsigned suspend                        : 1;
+        unsigned standby                        : 1;
+    } feature_support;
+
+    /* color characteristics block */
+    unsigned green_y_low    : 2;
+    unsigned green_x_low    : 2;
+    unsigned red_y_low      : 2;
+    unsigned red_x_low      : 2;
+
+    unsigned white_y_low    : 2;
+    unsigned white_x_low    : 2;
+    unsigned blue_y_low     : 2;
+    unsigned blue_x_low     : 2;
+
+    u8  red_x;
+    u8  red_y;
+    u8  green_x;
+    u8  green_y;
+    u8  blue_x;
+    u8  blue_y;
+    u8  white_x;
+    u8  white_y;
+
+    /* established timings */
+    struct __attribute__ (( packed )) {
+        unsigned timing_800x600_60   : 1;
+        unsigned timing_800x600_56   : 1;
+        unsigned timing_640x480_75   : 1;
+        unsigned timing_640x480_72   : 1;
+        unsigned timing_640x480_67   : 1;
+        unsigned timing_640x480_60   : 1;
+        unsigned timing_720x400_88   : 1;
+        unsigned timing_720x400_70   : 1;
+
+        unsigned timing_1280x1024_75 : 1;
+        unsigned timing_1024x768_75  : 1;
+        unsigned timing_1024x768_70  : 1;
+        unsigned timing_1024x768_60  : 1;
+        unsigned timing_1024x768_87  : 1;
+        unsigned timing_832x624_75   : 1;
+        unsigned timing_800x600_75   : 1;
+        unsigned timing_800x600_72   : 1;
+    } established_timings;
+
+    struct __attribute__ (( packed )) {
+        unsigned reserved            : 7;
+        unsigned timing_1152x870_75  : 1;
+    } manufacturer_timings;
+
+    /* standard timing id */
+    struct  xvidc_edid_standard_timing_descriptor standard_timing_id[8];
+
+    /* detailed timing */
+    union {
+        struct xvidc_edid_monitor_descriptor         monitor;
+        struct xvidc_edid_detailed_timing_descriptor timing;
+    } detailed_timings[4];
+
+    u8  extensions;
+    u8  checksum;
+};
+
+static inline void
+xvidc_edid_manufacturer(const struct edid * const edid, char manufacturer[4])
+{
+    manufacturer[0] = '@' + ((edid->manufacturer & 0x007c) >> 2);
+    manufacturer[1] = '@' + ((((edid->manufacturer & 0x0003) >> 00) << 3) | (((edid->manufacturer & 0xe000) >> 13) << 0));
+    manufacturer[2] = '@' + ((edid->manufacturer & 0x1f00) >> 8);
+    manufacturer[3] = '\0';
+}
+
+static inline double
+xvidc_edid_gamma(const struct edid * const edid)
+{
+    return (edid->display_transfer_characteristics + 100) / 100.0;
+}
+
+static inline bool
+xvidc_edid_detailed_timing_is_monitor_descriptor(const struct edid * const edid,
+                                           const u8 timing)
+{
+    const struct xvidc_edid_monitor_descriptor * const mon =
+        &edid->detailed_timings[timing].monitor;
+
+    Xil_AssertNonvoid(timing < ARRAY_SIZE(edid->detailed_timings));
+
+    return mon->flag0 == 0x0000 && mon->flag1 == 0x00 && mon->flag2 == 0x00;
+}
+
+
+struct __attribute__ (( packed )) xvidc_edid_color_characteristics_data {
+    struct {
+        u16 x;
+        u16 y;
+    } red, green, blue, white;
+};
+
+static inline struct xvidc_edid_color_characteristics_data
+xvidc_edid_color_characteristics(const struct edid * const edid)
+{
+    const struct xvidc_edid_color_characteristics_data characteristics = {
+        .red = {
+            .x = (edid->red_x << 2) | edid->red_x_low,
+            .y = (edid->red_y << 2) | edid->red_y_low,
+        },
+        .green = {
+            .x = (edid->green_x << 2) | edid->green_x_low,
+            .y = (edid->green_y << 2) | edid->green_y_low,
+        },
+        .blue = {
+            .x = (edid->blue_x << 2) | edid->blue_x_low,
+            .y = (edid->blue_y << 2) | edid->blue_y_low,
+        },
+        .white = {
+            .x = (edid->white_x << 2) | edid->white_x_low,
+            .y = (edid->white_y << 2) | edid->white_y_low,
+        },
+    };
+
+    return characteristics;
+}
+
+
+struct __attribute__ (( packed )) xvidc_edid_block_map {
+    u8 tag;
+    u8 extension_tag[126];
+    u8 checksum;
+};
+
+
+struct __attribute__ (( packed )) xvidc_edid_extension {
+    u8 tag;
+    u8 revision;
+    u8 extension_data[125];
+    u8 checksum;
+};
+
+
+static inline bool
+xvidc_edid_verify_checksum(const u8 * const block)
+{
+    u8 checksum = 0;
+    int i;
+
+    for (i = 0; i < XVIDC_EDID_BLOCK_SIZE; i++)
+        checksum += block[i];
+
+    return (checksum == 0);
+}
+
+static inline double
+xvidc_edid_decode_fixed_point(u16 value)
+{
+    double result = 0.0;
+
+    Xil_AssertNonvoid((~value & 0xfc00) == 0xfc00);
+                                                 /* edid fraction is 10 bits */
+
+    for (u8 i = 0; value && (i < 10); i++, value >>= 1)
+        result = result + ((value & 0x1) * (1.0 / (1 << (10 - i))));
+
+    return result;
+}
+
+typedef enum {
+    XVIDC_VERBOSE_DISABLE,
+    XVIDC_VERBOSE_ENABLE
+} XV_VidC_Verbose;
+
+typedef enum {
+    XVIDC_ISDVI,
+    XVIDC_ISHDMI
+} XV_VidC_IsHdmi;
+
+typedef enum {
+    XVIDC_NOT_SUPPORTED,
+    XVIDC_SUPPORTED
+} XV_VidC_Supp;
+#if XVIDC_EDID_VERBOSITY > 1
+typedef struct {
+	u32 Integer;
+	u32 Decimal;
+} XV_VidC_DoubleRep;
+#endif
+
+typedef struct {
+    u8 width;
+    u8 height;
+} XV_VidC_PicAspectRatio;
+
+typedef struct {
+    u16 hres;
+    u16 vres;
+    u16 htotal;
+    u16 vtotal;
+    XVidC_VideoFormat vidfrmt;
+    u32 pixclk;
+    u16 hsync_width;
+    u16 vsync_width;
+    u16 hfp;
+    u16 vfp;
+    u8 vfreq;
+    XV_VidC_PicAspectRatio aspect_ratio;
+    unsigned hsync_polarity : 1;
+    unsigned vsync_polarity : 1;
+} XV_VidC_TimingParam;
+
+typedef struct {
+	/*Checks whether Sink able to support HDMI*/
+	XV_VidC_IsHdmi IsHdmi;
+	/*Color Space Support*/
+    XV_VidC_Supp   IsYCbCr444Supp;
+    XV_VidC_Supp   IsYCbCr420Supp;
+    XV_VidC_Supp   IsYCbCr422Supp;
+	/*YCbCr444/YCbCr422/RGB444 Deep Color Support*/
+    XV_VidC_Supp   IsYCbCr444DeepColSupp;
+    XV_VidC_Supp   Is30bppSupp;
+    XV_VidC_Supp   Is36bppSupp;
+    XV_VidC_Supp   Is48bppSupp;
+	/*YCbCr420 Deep Color Support*/
+    XV_VidC_Supp   IsYCbCr420dc30bppSupp;
+    XV_VidC_Supp   IsYCbCr420dc36bppSupp;
+    XV_VidC_Supp   IsYCbCr420dc48bppSupp;
+	/*SCDC and SCDC ReadRequest Support*/
+    XV_VidC_Supp   IsSCDCReadRequestReady;
+    XV_VidC_Supp   IsSCDCPresent;
+	/*Sink Capability Support*/
+    u8             MaxFrameRateSupp;
+    u16            MaxTmdsMhz;
+	/*CEA 861 Supported VIC Support*/
+    u8             SuppCeaVIC[32];
+	/*VESA Sink Preffered Timing Support*/
+    XV_VidC_TimingParam PreferedTiming[4];
+} XV_VidC_EdidCntrlParam;
+
+
+XV_VidC_TimingParam
+XV_VidC_timing
+           (const struct xvidc_edid_detailed_timing_descriptor * const dtb);
+#if XVIDC_EDID_VERBOSITY > 1
+XV_VidC_DoubleRep Double2Int (double in_val);
+#endif
+void XV_VidC_EdidCtrlParamInit (XV_VidC_EdidCntrlParam *EdidCtrlParam);
+
+void
+XV_VidC_parse_edid(const u8 * const data,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_parse_edid.c b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_parse_edid.c
new file mode 100644
index 0000000..6b0edb6
--- /dev/null
+++ b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_parse_edid.c
@@ -0,0 +1,1332 @@
+/* vim: set et fde fdm=syntax ft=c.doxygen ts=4 sts=4 sw=4 : */
+/*
+ * Copyright © 2011 Saleem Abdulrasool .
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "string.h"
+#include "stdlib.h"
+#include "stddef.h"
+
+#include "xil_types.h"
+#include "xstatus.h"
+#include "xil_exception.h"
+
+#include "xvidc_edid_ext.h"
+
+#if XVIDC_EDID_VERBOSITY > 1
+#include "math.h"
+
+#define CM_2_MM(cm)                             ((cm) * 10)
+#define CM_2_IN(cm)                             ((cm) * 0.3937)
+#endif
+#if XVIDC_EDID_VERBOSITY > 0
+#define HZ_2_MHZ(hz)                            ((hz) / 1000000)
+#endif
+#if XVIDC_EDID_VERBOSITY > 1
+static void
+xvidc_disp_cea861_audio_data(
+                  const struct xvidc_cea861_audio_data_block * const adb,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn);
+
+static void
+xvidc_disp_cea861_speaker_allocation_data(
+          const struct xvidc_cea861_speaker_allocation_data_block * const sadb,
+             XV_VidC_EdidCntrlParam *EdidCtrlParam,
+             XV_VidC_Verbose VerboseEn);
+
+static void
+xvidc_disp_cea861_video_data(
+                  const struct xvidc_cea861_video_data_block * const vdb,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn);
+#endif
+
+static void
+xvidc_disp_cea861_extended_data(
+                  const struct xvidc_cea861_extended_data_block * const edb,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn);
+
+static void
+xvidc_disp_cea861_vendor_data(
+                  const struct xvidc_cea861_vendor_specific_data_block * vsdb,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn);
+
+static void
+xvidc_disp_cea861(const struct xvidc_edid_extension * const ext,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn);
+
+static void
+xvidc_disp_edid1(const struct edid * const edid,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn);
+
+/*****************************************************************************/
+/**
+*
+* This function parse EDID on General Data & VESA Data
+*
+* @param    data is a pointer to the EDID array.
+* @param    EdidCtrlParam is a pointer the EDID Control parameter
+* @param    VerboseEn is a pointer to the XV_HdmiTxSs core instance.
+*
+* @return None
+*
+* @note   API Define below here are CEA861 routines
+*
+******************************************************************************/
+static void
+xvidc_disp_edid1(const struct edid * const edid,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn)
+{
+    const struct xvidc_edid_monitor_range_limits *monitor_range_limits = NULL;
+    xvidc_edid_monitor_descriptor_string monitor_serial_number = {0};
+    xvidc_edid_monitor_descriptor_string monitor_model_name = {0};
+    bool has_ascii_string = false;
+    char manufacturer[4] = {0};
+#if XVIDC_EDID_VERBOSITY > 1	
+    XV_VidC_DoubleRep min_doubleval;
+    XV_VidC_DoubleRep max_doubleval;
+#endif	
+
+    u8 i;
+#if XVIDC_EDID_VERBOSITY > 0
+    //add by mmo
+    XV_VidC_TimingParam timing_params;
+#endif
+
+#if XVIDC_EDID_VERBOSITY > 1
+    struct xvidc_edid_color_characteristics_data characteristics;
+    const u8 vlen = edid->maximum_vertical_image_size;
+    const u8 hlen = edid->maximum_horizontal_image_size;
+
+
+    static const char * const display_type[] = {
+        [XVIDC_EDID_DISPLAY_TYPE_MONOCHROME] = "Monochrome or greyscale",
+        [XVIDC_EDID_DISPLAY_TYPE_RGB]        = "sRGB colour",
+        [XVIDC_EDID_DISPLAY_TYPE_NON_RGB]    = "Non-sRGB colour",
+        [XVIDC_EDID_DISPLAY_TYPE_UNDEFINED]  = "Undefined",
+    };
+#endif
+    xvidc_edid_manufacturer(edid, manufacturer);
+
+    for (i = 0; i < ARRAY_SIZE(edid->detailed_timings); i++) {
+        const struct xvidc_edid_monitor_descriptor * const mon =
+            &edid->detailed_timings[i].monitor;
+
+        if (!xvidc_edid_detailed_timing_is_monitor_descriptor(edid, i))
+            continue;
+
+        switch (mon->tag) {
+        case XVIDC_EDID_MONTIOR_DESCRIPTOR_MANUFACTURER_DEFINED:
+            /* This is arbitrary data, just silently ignore it. */
+            break;
+        case XVIDC_EDID_MONITOR_DESCRIPTOR_ASCII_STRING:
+            has_ascii_string = true;
+            break;
+        case XVIDC_EDID_MONITOR_DESCRIPTOR_MONITOR_NAME:
+            strncpy(monitor_model_name, (char *) mon->data,
+                    sizeof(monitor_model_name) - 1);
+            break;
+        case XVIDC_EDID_MONITOR_DESCRIPTOR_MONITOR_RANGE_LIMITS:
+            monitor_range_limits =
+                         (struct xvidc_edid_monitor_range_limits *) &mon->data;
+            break;
+        case XVIDC_EDID_MONITOR_DESCRIPTOR_MONITOR_SERIAL_NUMBER:
+            strncpy(monitor_serial_number, (char *) mon->data,
+                    sizeof(monitor_serial_number) - 1);
+            break;
+        default:
+            if (VerboseEn) {
+                xil_printf("unknown monitor descriptor type 0x%02x\n",
+                        mon->tag);
+            }
+            break;
+        }
+    }
+
+#if XVIDC_EDID_VERBOSITY > 0
+    if (VerboseEn) {
+        xil_printf("Sink Information\r\n");
+
+        xil_printf("  Model name............... %s\r\n",
+               *monitor_model_name ? monitor_model_name : "n/a");
+#if XVIDC_EDID_VERBOSITY > 1
+        xil_printf("  Manufacturer............. %s\r\n",
+               manufacturer);
+
+        xil_printf("  Product code............. %u\r\n",
+               (u16) edid->product_u16);
+
+        if (*(u32 *) edid->serial_number_u32)
+            xil_printf("  Module serial number..... %u\r\n",
+                   (u32) edid->serial_number_u32);
+#endif
+#if defined(DISPLAY_UNKNOWN)
+            xil_printf("  Plug and Play ID......... %s\r\n", NULL);
+#endif
+#if XVIDC_EDID_VERBOSITY > 1
+        xil_printf("  Serial number............ %s\r\n",
+               *monitor_serial_number ? monitor_serial_number : "n/a");
+
+        xil_printf("  Manufacture date......... %u",
+                                                edid->manufacture_year + 1990);
+        if (edid->manufacture_week <= 52)
+            xil_printf(", ISO week %u", edid->manufacture_week);
+        xil_printf("\r\n");
+#endif
+        xil_printf("  EDID revision............ %u.%u\r\n",
+               edid->version, edid->revision);
+#if XVIDC_EDID_VERBOSITY > 1			   
+        xil_printf("  Input signal type........ %s\r\n",
+          edid->video_input_definition.digital.digital ? "Digital" : "Analog");
+
+        if (edid->video_input_definition.digital.digital) {
+            xil_printf("  VESA DFP 1.x supported... %s\r\n",
+                   edid->video_input_definition.digital.dfp_1x ? "Yes" : "No");
+        } else {
+            /* Missing Piece: To print analog flags */
+        }
+#endif		
+#if defined(DISPLAY_UNKNOWN)
+        xil_printf("  Color bit depth.......... %s\r\n", NULL);
+#endif
+#if XVIDC_EDID_VERBOSITY > 1
+        xil_printf("  Display type............. %s\r\n",
+               display_type[edid->feature_support.display_type]);
+
+        xil_printf("  Screen size.............. %u mm x %u mm (%.1f in)\r\n",
+               CM_2_MM(hlen), CM_2_MM(vlen),
+               CM_2_IN(sqrt(hlen * hlen + vlen * vlen)));
+
+        xil_printf("  Power management......... %s%s%s%s\r\n",
+               edid->feature_support.active_off ? "Active off, " : "",
+               edid->feature_support.suspend ? "Suspend, " : "",
+               edid->feature_support.standby ? "Standby, " : "",
+
+               (edid->feature_support.active_off ||
+                edid->feature_support.suspend    ||
+                edid->feature_support.standby) ? "\b\b  " : "n/a");
+#endif
+        xil_printf("  Extension blocks......... %u\r\n",
+               edid->extensions);
+
+#if defined(DISPLAY_UNKNOWN)
+        xil_printf("  DDC/CI................... %s\r\n", NULL);
+#endif
+
+        xil_printf("\r\n");
+	}
+#endif
+        if (has_ascii_string) {
+			if (VerboseEn) {
+#if XVIDC_EDID_VERBOSITY > 1			
+				xil_printf("General purpose ASCII string\r\n");
+#endif
+			}
+			
+            for (i = 0; i < ARRAY_SIZE(edid->detailed_timings); i++) {
+                if (!xvidc_edid_detailed_timing_is_monitor_descriptor(edid, i))
+                    continue;
+            }
+			
+			if (VerboseEn) {			
+#if XVIDC_EDID_VERBOSITY > 1			
+				xil_printf("\r\n");
+#endif
+			}
+        }
+#if XVIDC_EDID_VERBOSITY > 0	
+    if (VerboseEn) {
+        xil_printf("Color characteristics\r\n");
+
+        xil_printf("  Default color space...... %ssRGB\r\n",
+               edid->feature_support.standard_default_color_space ? "":"Non-");
+#if XVIDC_EDID_VERBOSITY > 1
+        min_doubleval =
+                Double2Int(xvidc_edid_gamma(edid));
+        xil_printf("  Display gamma............ %d.%03d\r\n",
+        		min_doubleval.Integer, min_doubleval.Decimal);
+
+        characteristics = xvidc_edid_color_characteristics(edid);
+
+        min_doubleval =
+			Double2Int(xvidc_edid_decode_fixed_point(characteristics.red.x));
+        max_doubleval =
+			Double2Int(xvidc_edid_decode_fixed_point(characteristics.red.y));
+
+        xil_printf("  Red chromaticity......... Rx %d.%03d - Ry %d.%03d\r\n",
+        	min_doubleval.Integer, min_doubleval.Decimal,
+			max_doubleval.Integer, max_doubleval.Decimal);
+
+        min_doubleval =
+        	Double2Int(xvidc_edid_decode_fixed_point(characteristics.green.x));
+        max_doubleval =
+        	Double2Int(xvidc_edid_decode_fixed_point(characteristics.green.y));
+
+        xil_printf("  Green chromaticity....... Gx %d.%03d - Gy %d.%03d\r\n",
+        	min_doubleval.Integer, min_doubleval.Decimal,
+			max_doubleval.Integer, max_doubleval.Decimal);
+
+        min_doubleval =
+        	Double2Int(xvidc_edid_decode_fixed_point(characteristics.blue.x));
+        max_doubleval =
+        	Double2Int(xvidc_edid_decode_fixed_point(characteristics.blue.y));
+
+        xil_printf("  Blue chromaticity........ Bx %d.%03d - By %d.%03d\r\n",
+        	min_doubleval.Integer, min_doubleval.Decimal,
+			max_doubleval.Integer, max_doubleval.Decimal);
+
+        min_doubleval =
+        	Double2Int(xvidc_edid_decode_fixed_point(characteristics.white.x));
+        max_doubleval =
+        	Double2Int(xvidc_edid_decode_fixed_point(characteristics.white.y));
+
+        xil_printf("  White point (default).... Wx %d.%03d - Wy %d.%03d\r\n",
+        	min_doubleval.Integer, min_doubleval.Decimal,
+			max_doubleval.Integer, max_doubleval.Decimal);
+#endif
+#if defined(DISPLAY_UNKNOWN)
+        xil_printf("  Additional descriptors... %s\r\n", NULL);
+#endif
+        xil_printf("\r\n");
+
+        xil_printf("VESA Timing characteristics\r\n");
+    }
+#endif
+    if (monitor_range_limits) {
+#if XVIDC_EDID_VERBOSITY > 0
+        if (VerboseEn) {
+            xil_printf("  Horizontal scan range.... %u - %u kHz\r\n",
+                   monitor_range_limits->minimum_horizontal_rate,
+                   monitor_range_limits->maximum_horizontal_rate);
+
+            xil_printf("  Vertical scan range...... %u - %u Hz\r\n",
+                   monitor_range_limits->minimum_vertical_rate,
+                   monitor_range_limits->maximum_vertical_rate);
+
+            xil_printf("  Video bandwidth.......... %u MHz\r\n",
+                   monitor_range_limits->maximum_supported_pixel_clock * 10);
+        }
+#endif
+        EdidCtrlParam->MaxFrameRateSupp =
+                                   monitor_range_limits->maximum_vertical_rate;
+        EdidCtrlParam->MaxTmdsMhz =
+                    (monitor_range_limits->maximum_supported_pixel_clock * 10);
+    }
+
+#if XVIDC_EDID_VERBOSITY > 0
+    if (VerboseEn) {
+#if defined(DISPLAY_UNKNOWN)
+        xil_printf("  CVT standard............. %s\r\n", NULL);
+#endif
+#if XVIDC_EDID_VERBOSITY > 1
+        xil_printf("  GTF standard............. %sSupported\r\n",
+               edid->feature_support.default_gtf ? "" : "Not ");
+#endif
+#if defined(DISPLAY_UNKNOWN)
+        xil_printf("  Additional descriptors... %s\r\n", NULL);
+#endif
+#if XVIDC_EDID_VERBOSITY > 0
+        xil_printf("  Preferred timing......... %s\r\n",
+               edid->feature_support.preferred_timing_mode ? "Yes" : "No");
+#endif			   
+        for (i = 0; i < ARRAY_SIZE(edid->detailed_timings); i++) {
+            if (xvidc_edid_detailed_timing_is_monitor_descriptor(edid, i))
+                continue;
+
+            timing_params = XV_VidC_timing(&edid->detailed_timings[i].timing);
+            EdidCtrlParam->PreferedTiming[i] =
+            		XV_VidC_timing(&edid->detailed_timings[i].timing);
+#if XVIDC_EDID_VERBOSITY > 0					
+			if (edid->feature_support.preferred_timing_mode) {
+				xil_printf("  Native/preferred timing.. %ux%u%c at %uHz"
+											" (%u:%u)\r\n",
+											timing_params.hres,
+											timing_params.vres,
+											timing_params.vidfrmt ? 'i' : 'p',
+											timing_params.vfreq,
+											timing_params.aspect_ratio.width,
+											timing_params.aspect_ratio.height);
+				xil_printf("    Modeline............... \"%ux%u\" %u %u %u %u"
+								" %u %u %u %u %u %chsync %cvsync\r\n",
+							   timing_params.hres,
+							   timing_params.vres,
+							   HZ_2_MHZ (timing_params.pixclk),
+							   (timing_params.hres),
+							   (timing_params.hres + timing_params.hfp),
+							   (timing_params.hres + timing_params.hfp +
+													timing_params.hsync_width),
+							   (timing_params.htotal),
+							   (timing_params.vres),
+							   (timing_params.vres + timing_params.vfp),
+							   (timing_params.vres + timing_params.vfp +
+													timing_params.vsync_width),
+							   (timing_params.vtotal),
+							   timing_params.hsync_polarity ? '+' : '-',
+							   timing_params.vsync_polarity ? '+' : '-');
+			} else {			
+				xil_printf("  Native/preferred timing.. n/a\r\n");
+			}
+#endif			
+        }
+#if XVIDC_EDID_VERBOSITY > 0		
+        xil_printf("\r\n");
+#endif
+#if XVIDC_EDID_VERBOSITY > 1
+        xil_printf("Established Timings supported\r\n");
+        if (edid->established_timings.timing_720x400_70)
+            xil_printf("   720 x  400p @ 70Hz - IBM VGA\r\n");
+        if (edid->established_timings.timing_720x400_88)
+            xil_printf("   720 x  400p @ 88Hz - IBM XGA2\r\n");
+        if (edid->established_timings.timing_640x480_60)
+            xil_printf("   640 x  480p @ 60Hz - IBM VGA\r\n");
+        if (edid->established_timings.timing_640x480_67)
+            xil_printf("   640 x  480p @ 67Hz - Apple Mac II\r\n");
+        if (edid->established_timings.timing_640x480_72)
+            xil_printf("   640 x  480p @ 72Hz - VESA\r\n");
+        if (edid->established_timings.timing_640x480_75)
+            xil_printf("   640 x  480p @ 75Hz - VESA\r\n");
+        if (edid->established_timings.timing_800x600_56)
+            xil_printf("   800 x  600p @ 56Hz - VESA\r\n");
+        if (edid->established_timings.timing_800x600_60)
+            xil_printf("   800 x  600p @ 60Hz - VESA\r\n");
+
+        if (edid->established_timings.timing_800x600_72)
+            xil_printf("   800 x  600p @ 72Hz - VESA\r\n");
+        if (edid->established_timings.timing_800x600_75)
+            xil_printf("   800 x  600p @ 75Hz - VESA\r\n");
+        if (edid->established_timings.timing_832x624_75)
+            xil_printf("   832 x  624p @ 75Hz - Apple Mac II\r\n");
+        if (edid->established_timings.timing_1024x768_87)
+            xil_printf("  1024 x  768i @ 87Hz - VESA\r\n");
+        if (edid->established_timings.timing_1024x768_60)
+            xil_printf("  1024 x  768p @ 60Hz - VESA\r\n");
+        if (edid->established_timings.timing_1024x768_70)
+            xil_printf("  1024 x  768p @ 70Hz - VESA\r\n");
+        if (edid->established_timings.timing_1024x768_75)
+            xil_printf("  1024 x  768p @ 75Hz - VESA\r\n");
+        if (edid->established_timings.timing_1280x1024_75)
+            xil_printf("  1280 x 1024p @ 75Hz - VESA\r\n");
+#endif
+    }
+#endif
+
+#if XVIDC_EDID_VERBOSITY > 1
+    if (VerboseEn) {
+    	xil_printf("Standard Timings supported\r\n");
+		for (i = 0; i < ARRAY_SIZE(edid->standard_timing_id); i++) {
+			const struct xvidc_edid_standard_timing_descriptor * const desc =
+				&edid->standard_timing_id[i];
+
+			if (!memcmp(desc, XVIDC_EDID_STANDARD_TIMING_DESCRIPTOR_INVALID,
+																sizeof(*desc)))
+			{
+				continue;
+			} else {
+				if (((desc->horizontal_active_pixels + 31)* 8) >= 1000) {
+				xil_printf("  %u x",(desc->horizontal_active_pixels + 31)* 8);
+				} else {
+				xil_printf("   %u x",(desc->horizontal_active_pixels + 31)* 8);
+				}
+				switch (desc->image_aspect_ratio) {
+					case 0: //Aspect Ratio = 16:10
+						xil_printf(" %up ",
+					(((desc->horizontal_active_pixels + 31)* 8) * 10) / 16);
+						break;
+					case 1: //Aspect Ratio = 4:3
+						xil_printf(" %up ",
+					(((desc->horizontal_active_pixels + 31)* 8) * 3) / 4);
+						break;
+					case 2: //Aspect Ratio = 5:4
+						xil_printf(" %up ",
+					(((desc->horizontal_active_pixels + 31)* 8) * 4) / 5);
+						break;
+					case 3: //Aspect Ratio = 16:9
+						xil_printf(" %up ",
+					(((desc->horizontal_active_pixels + 31)* 8) * 9) / 16);
+						break;
+					default: //Aspect Ratio = 16:10
+						xil_printf(" %up ",
+					(((desc->horizontal_active_pixels + 31)* 8) * 10) / 16);
+						break;
+				}
+				xil_printf("@ %uHz\r\n",(desc->refresh_rate + 60));
+			}
+		}
+    }
+#endif
+#if XVIDC_EDID_VERBOSITY > 0
+    if (VerboseEn) {
+        xil_printf("\r\n");
+    }
+#endif
+}
+
+
+
+/*****************************************************************************/
+/**
+*
+* This function parse EDID on CEA 861 Audio Data
+*
+* @param    data is a pointer to the EDID array.
+* @param    EdidCtrlParam is a pointer the EDID Control parameter
+* @param    VerboseEn is a pointer to the XV_HdmiTxSs core instance.
+*
+* @return None
+*
+* @note   API Define below here are CEA861 routines
+*
+******************************************************************************/
+#if XVIDC_EDID_VERBOSITY > 1
+static void
+xvidc_disp_cea861_audio_data(
+                  const struct xvidc_cea861_audio_data_block * const adb,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn) {
+    /* For Future Usage */
+    EdidCtrlParam = EdidCtrlParam;
+
+    const u8 descriptors = adb->header.length / sizeof(*adb->sad);
+#if XVIDC_EDID_VERBOSITY > 0
+    if (VerboseEn) {
+        xil_printf("CE audio data (formats supported)\r\n");
+    }
+#endif
+    for (u8 i = 0; i < descriptors; i++) {
+        const struct xvidc_cea861_short_audio_descriptor * const sad =
+            (struct xvidc_cea861_short_audio_descriptor *) &adb->sad[i];
+
+        switch (sad->audio_format) {
+            case XVIDC_CEA861_AUDIO_FORMAT_LPCM:
+#if XVIDC_EDID_VERBOSITY > 0
+                if (VerboseEn) {
+                    xil_printf("  LPCM    %u-channel, %s%s%s\b%s",
+                           sad->channels + 1,
+                           sad->flags.lpcm.bitrate_16_bit ? "16/" : "",
+                           sad->flags.lpcm.bitrate_20_bit ? "20/" : "",
+                           sad->flags.lpcm.bitrate_24_bit ? "24/" : "",
+
+                           ((sad->flags.lpcm.bitrate_16_bit +
+                             sad->flags.lpcm.bitrate_20_bit +
+                             sad->flags.lpcm.bitrate_24_bit) > 1) ?
+                                                      " bit depths" : "-bit");
+                }
+#endif
+                break;
+            case XVIDC_CEA861_AUDIO_FORMAT_AC_3:
+#if XVIDC_EDID_VERBOSITY > 0
+                if (VerboseEn) {
+                    xil_printf("  AC-3    %u-channel, %4uk max. bit rate",
+                           sad->channels + 1,
+                           (sad->flags.maximum_bit_rate << 3));
+                }
+#endif
+                break;
+            default:
+#if XVIDC_EDID_VERBOSITY > 0
+                if (VerboseEn) {
+                    xil_printf("Unknown audio format 0x%02x\r\n",
+                            sad->audio_format);
+                }
+#endif
+                continue;
+        }
+#if XVIDC_EDID_VERBOSITY > 0
+        if (VerboseEn) {
+            xil_printf(" at %s%s%s%s%s%s%s\b kHz\r\n",
+                   sad->sample_rate_32_kHz ? "32/" : "",
+                   sad->sample_rate_44_1_kHz ? "44.1/" : "",
+                   sad->sample_rate_48_kHz ? "48/" : "",
+                   sad->sample_rate_88_2_kHz ? "88.2/" : "",
+                   sad->sample_rate_96_kHz ? "96/" : "",
+                   sad->sample_rate_176_4_kHz ? "176.4/" : "",
+                   sad->sample_rate_192_kHz ? "192/" : "");
+        }
+#endif
+    }
+#if XVIDC_EDID_VERBOSITY > 0
+    if (VerboseEn) {
+        xil_printf("\r\n");
+    }
+#endif
+}
+#endif
+
+/*****************************************************************************/
+/**
+*
+* This function parse EDID on CEA 861 Extended Data
+*
+* @param    data is a pointer to the EDID array.
+* @param    EdidCtrlParam is a pointer the EDID Control parameter
+* @param    VerboseEn is a pointer to the XV_HdmiTxSs core instance.
+*
+* @return None
+*
+* @note   None.
+*
+******************************************************************************/
+static void
+xvidc_disp_cea861_extended_data(
+                  const struct xvidc_cea861_extended_data_block * const edb,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn) {
+					  
+	/* During Verbosity 0, VerboseEn won't be used */
+	/* To avoid compilation warnings */
+	VerboseEn = VerboseEn;	
+
+#if XVIDC_EDID_VERBOSITY > 0
+    if (VerboseEn) {
+        xil_printf("CEA Extended Tags\r\n");
+    }
+#endif
+    switch(edb->xvidc_cea861_extended_tag_codes) {
+#if XVIDC_EDID_VERBOSITY > 1
+        case XVIDC_CEA861_EXT_TAG_TYPE_VIDEO_CAPABILITY:
+            if (VerboseEn) {
+                xil_printf("  Video capability data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_VENDOR_SPECIFIC:
+            if (VerboseEn) {
+                xil_printf("  Vendor-specific video data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_VESA_DISPLAY_DEVICE:
+            if (VerboseEn) {
+                xil_printf("  VESA video display device data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_VESA_VIDEO_TIMING_BLOCK_EXT:
+            if (VerboseEn) {
+                xil_printf("VESA video timing block extension\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_RESERVED_FOR_HDMI_VIDEO_DATA_BLOCK:
+            if (VerboseEn) {
+                xil_printf("Reserved for HDMI video data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_COLORIMETRY:
+            if (VerboseEn) {
+                xil_printf("  Colorimetry data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_HDR_STATIC_METADATA:
+            if (VerboseEn) {
+                xil_printf("HDR static metadata data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_HDR_DYNAMIC_METADATA:
+            if (VerboseEn) {
+                xil_printf("  HDR dynamic metadata data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_VIDEO_FRMT_PREFERENCE:
+            if (VerboseEn) {
+                xil_printf("  Video format preference data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_CEA_MISC_AUDIO_FIELDS:
+            if (VerboseEn) {
+                xil_printf("Reserved for CEA miscellaneous audio fields\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_VENDOR_SPECIFC_AUDIO:
+            if (VerboseEn) {
+                xil_printf("  Vendor-specific audio data block\r\n\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_HDMI_AUDIO:
+            if (VerboseEn) {
+                xil_printf("  HDMI audio data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_ROOM_CONFIGURATION:
+            if (VerboseEn) {
+                xil_printf("  Room configuration data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_SPEAKER_LOCATION:
+            if (VerboseEn) {
+                xil_printf("  Speaker location data block\r\n");
+            }
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_INFOFRAME:
+            if (VerboseEn) {
+                xil_printf("  Video capability data block\r\n");
+            }
+        break;
+#endif
+        case XVIDC_CEA861_EXT_TAG_TYPE_YCBCR420_VIDEO:
+#if XVIDC_EDID_VERBOSITY > 1
+            if (VerboseEn) {
+                xil_printf("  YCbCr 4:2:0 video data block\r\n");
+                xil_printf("    YCbCr 4:2:0.............. Supported\r\n");
+            }
+#endif
+            EdidCtrlParam->IsYCbCr420Supp = XVIDC_SUPPORTED;
+
+#if XVIDC_EDID_VERBOSITY > 1
+            if (VerboseEn) {
+                xil_printf("  CE video identifiers (VICs) - "
+                                              " timing/formats supported\r\n");
+            }
+            for (u8 i = 0; i < edb->header.length - 1; i++) {
+               u8 vic;
+               u8 native=0;
+               if ((edb->data[i] & 0x7F) == 0) {
+                   continue;
+               } else if  (((edb->data[i]) >= 1) && ((edb->data[i]) <= 64)){
+                   vic    = (edb->data[i]) & 0x7F;
+               } else if  (((edb->data[i]) >= 65) && ((edb->data[i]) <= 127)){
+                   vic    = (edb->data[i]);
+               } else if  (((edb->data[i]) >= 129) && ((edb->data[i]) <= 192)){
+                   vic    = (edb->data[i]) & 0x7F;
+                   native = 1;
+               } else if  (((edb->data[i]) >= 193) && ((edb->data[i]) <= 253)){
+                   vic    = (edb->data[i]);
+               } else {
+                   continue;
+               }
+
+               const struct xvidc_cea861_timing * const timing =
+                   &xvidc_cea861_timings[vic];
+
+               if (VerboseEn) {
+                   xil_printf("   %s CEA Mode %02u: %4u x %4u%c @ %dHz\r\n",
+                   native ? "*" : " ",
+                   vic,
+                   timing->hactive, timing->vactive,
+                   (timing->mode == INTERLACED) ? 'i' : 'p',
+                   (u32)(timing->vfreq));
+               }
+            }
+            if (VerboseEn) {
+                xil_printf("\r\n");
+            }
+#endif
+        break;
+
+        case XVIDC_CEA861_EXT_TAG_TYPE_YCBCR420_CAPABILITY_MAP:
+#if XVIDC_EDID_VERBOSITY > 1
+            if (VerboseEn) {
+                xil_printf("  YCbCr 4:2:0 capability map data block\r\n");
+                xil_printf("    YCbCr 4:2:0.............. Supported\r\n");
+            }
+#endif
+            EdidCtrlParam->IsYCbCr420Supp = XVIDC_SUPPORTED;
+#if XVIDC_EDID_VERBOSITY > 1
+            for (u8 i = 0; i < edb->header.length - 1; i++) {
+                u8 v = edb->data[i];
+
+                for (u8 j = 0; j < 8; j++) {
+                    if (v & (1 << j)) {
+                        if (VerboseEn) {
+                            const struct xvidc_cea861_timing * const timing =
+                 &xvidc_cea861_timings[EdidCtrlParam->SuppCeaVIC[(i * 8) + j]];
+                            xil_printf("      CEA Mode %02u: %4u x %4u%c"
+                                              "@ %dHz\r\n",
+                                      EdidCtrlParam->SuppCeaVIC[(i * 8) + j],
+                                      timing->hactive, timing->vactive,
+                                      (timing->mode == INTERLACED) ? 'i' : 'p',
+                                      (u32)(timing->vfreq));
+                        }
+                    }
+                }
+            }
+#endif
+#if XVIDC_EDID_VERBOSITY > 0
+            if (VerboseEn) {
+                xil_printf("\r\n");
+            }
+#endif
+        break;
+
+        default :
+#if XVIDC_EDID_VERBOSITY > 0
+            if (VerboseEn) {
+#if XVIDC_EDID_VERBOSITY > 1				
+                xil_printf("  Not Supported: Ext Tag: %03x\r\n",
+                                         edb->xvidc_cea861_extended_tag_codes);
+#endif										 
+                xil_printf("\r\n");
+            }
+#endif
+        break;
+    }
+}
+#if XVIDC_EDID_VERBOSITY > 1
+static void
+xvidc_disp_cea861_video_data(
+                  const struct xvidc_cea861_video_data_block * const vdb,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn) {
+    /* For Future Usage */
+    EdidCtrlParam = EdidCtrlParam;
+
+    if (VerboseEn) {
+       xil_printf("CE video identifiers (VICs) - timing/formats"
+                                                             " supported\r\n");
+    }
+
+    for (u8 i = 0; i < vdb->header.length; i++) {
+
+        const struct xvidc_cea861_timing * const timing =
+            &xvidc_cea861_timings[vdb->svd[i].video_identification_code];
+
+        EdidCtrlParam->SuppCeaVIC[i] = vdb->svd[i].video_identification_code;
+        if (VerboseEn) {
+            xil_printf(" %s CEA Mode %02u: %4u x %4u%c @ %dHz\r\n",
+                   vdb->svd[i].native ? "*" : " ",
+                   vdb->svd[i].video_identification_code,
+                   timing->hactive, timing->vactive,
+                   (timing->mode == INTERLACED) ? 'i' : 'p',
+                   (u32)(timing->vfreq));
+        }
+    }
+    if (VerboseEn) {
+        xil_printf("\r\n");
+    }
+}
+#endif
+
+/*****************************************************************************/
+/**
+*
+* This function parse EDID on CEA 861 Vendor Specific Data
+*
+* @param    data is a pointer to the EDID array.
+* @param    EdidCtrlParam is a pointer the EDID Control parameter
+* @param    VerboseEn is a pointer to the XV_HdmiTxSs core instance.
+*
+* @return None
+*
+* @note   None.
+*
+******************************************************************************/
+static void
+xvidc_disp_cea861_vendor_data(
+                  const struct xvidc_cea861_vendor_specific_data_block * vsdb,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn) {
+					  
+	/* During Verbosity 0, VerboseEn won't be used */
+	/* To avoid compilation warnings */
+	VerboseEn = VerboseEn;						  
+					  
+    const u8 oui[] = { vsdb->ieee_registration[2],
+                            vsdb->ieee_registration[1],
+                            vsdb->ieee_registration[0] };
+#if XVIDC_EDID_VERBOSITY > 0
+    if (VerboseEn) {
+        xil_printf("CEA vendor specific data (VSDB)\r\n");
+        xil_printf("  IEEE registration number. 0x");
+        for (u8 i = 0; i < ARRAY_SIZE(oui); i++)
+            xil_printf("%02X", oui[i]);
+        xil_printf("\r\n");
+    }
+#endif
+    if (!memcmp(oui, HDMI_OUI, sizeof(oui))) {
+       const struct xvidc_cea861_hdmi_vendor_specific_data_block * const hdmi =
+            (struct xvidc_cea861_hdmi_vendor_specific_data_block *) vsdb;
+#if XVIDC_EDID_VERBOSITY > 0
+        if (VerboseEn) {
+            xil_printf("  CEC physical address..... %u.%u.%u.%u\r\n",
+                   hdmi->port_configuration_a,
+                   hdmi->port_configuration_b,
+                   hdmi->port_configuration_c,
+                   hdmi->port_configuration_d);
+        }
+#endif
+
+        if (hdmi->header.length >= HDMI_VSDB_EXTENSION_FLAGS_OFFSET) {
+#if XVIDC_EDID_VERBOSITY > 0
+            if (VerboseEn) {
+#if XVIDC_EDID_VERBOSITY > 1			
+                xil_printf("  Supports AI (ACP, ISRC).. %s\r\n",
+                       hdmi->audio_info_frame ? "Yes" : "No");
+#endif					   
+                xil_printf("  Supports 48bpp........... %s\r\n",
+                       hdmi->colour_depth_48_bit ? "Yes" : "No");
+                xil_printf("  Supports 36bpp........... %s\r\n",
+                       hdmi->colour_depth_36_bit ? "Yes" : "No");
+                xil_printf("  Supports 30bpp........... %s\r\n",
+                       hdmi->colour_depth_30_bit ? "Yes" : "No");
+                xil_printf("  Supp. YUV444 Deep Color.. %s\r\n",
+                       hdmi->yuv_444_supported ? "Yes" : "No");
+#if XVIDC_EDID_VERBOSITY > 1					   
+                xil_printf("  Supports dual-link DVI... %s\r\n",
+                       hdmi->dvi_dual_link ? "Yes" : "No");
+#endif					   
+            }
+#endif
+            EdidCtrlParam->Is30bppSupp = hdmi->colour_depth_30_bit;
+            EdidCtrlParam->Is36bppSupp = hdmi->colour_depth_36_bit;
+            EdidCtrlParam->Is48bppSupp = hdmi->colour_depth_48_bit;
+            EdidCtrlParam->IsYCbCr444DeepColSupp = hdmi->yuv_444_supported;
+        }
+
+        if (hdmi->header.length >= HDMI_VSDB_MAX_TMDS_OFFSET) {
+                if (hdmi->max_tmds_clock) {
+#if XVIDC_EDID_VERBOSITY > 0
+                    if (VerboseEn) {
+                        xil_printf("  Maximum TMDS clock....... %uMHz\r\n",
+                               hdmi->max_tmds_clock * 5);
+                    }
+#endif
+                    EdidCtrlParam->MaxTmdsMhz = (hdmi->max_tmds_clock * 5);
+                } else {
+#if XVIDC_EDID_VERBOSITY > 0
+                    if (VerboseEn) {
+                        xil_printf("  Maximum TMDS clock....... n/a\r\n");
+                    }
+#endif
+                }
+        }
+
+        if (hdmi->header.length >= HDMI_VSDB_LATENCY_FIELDS_OFFSET) {
+            if (hdmi->latency_fields) {
+#if XVIDC_EDID_VERBOSITY > 0
+                if (VerboseEn) {
+                    xil_printf("  Video latency %s........ %ums\r\n",
+                           hdmi->interlaced_latency_fields ? "(p)" : "...",
+                           (hdmi->video_latency - 1) << 1);
+                    xil_printf("  Audio latency %s........ %ums\r\n",
+                           hdmi->interlaced_latency_fields ? "(p)" : "...",
+                           (hdmi->audio_latency - 1) << 1);
+                }
+#endif
+            }
+
+            if (hdmi->interlaced_latency_fields) {
+#if XVIDC_EDID_VERBOSITY > 0
+                if (VerboseEn) {
+                    xil_printf("  Video latency (i)........ %ums\r\n",
+                           hdmi->interlaced_video_latency);
+                    xil_printf("  Audio latency (i)........ %ums\r\n",
+                           hdmi->interlaced_audio_latency);
+                }
+#endif
+            }
+        }
+    }   else if (!memcmp(oui, HDMI_OUI_HF, sizeof(oui))) {
+    const struct xvidc_cea861_hdmi_hf_vendor_specific_data_block * const hdmi =
+            (struct xvidc_cea861_hdmi_hf_vendor_specific_data_block *) vsdb;
+
+#if XVIDC_EDID_VERBOSITY > 0
+            if (VerboseEn) {
+                xil_printf("  Version.................. %d\r\n",hdmi->version);
+            }
+#endif
+
+            if (hdmi->max_tmds_char_rate) {
+#if XVIDC_EDID_VERBOSITY > 0
+                if (VerboseEn) {
+                    xil_printf("  Maximum TMDS clock....... %uMHz\r\n",
+                           hdmi->max_tmds_char_rate * 5);
+                }
+#endif
+                    EdidCtrlParam->MaxTmdsMhz = (hdmi->max_tmds_char_rate * 5);
+                } else {
+#if XVIDC_EDID_VERBOSITY > 0
+                    if (VerboseEn) {
+                        xil_printf("  Max. Supp. TMDS clock (<=340MHz)\r\n");
+                    }
+#endif
+                }
+
+            if (hdmi->header.length >= HDMI_VSDB_EXTENSION_FLAGS_OFFSET) {
+#if XVIDC_EDID_VERBOSITY > 0
+                if (VerboseEn) {
+#if XVIDC_EDID_VERBOSITY > 1					
+                    xil_printf("  RRC Capable Support...... %s\r\n",
+                            hdmi->rr_capable ? "Yes" : "No");
+                    xil_printf("  SCDC Present............. %s\r\n",
+                            hdmi->scdc_present ? "Yes" : "No");
+                    xil_printf("  HDMI1.4 Scramble Support. %s\r\n",
+                            hdmi->lte_340mcsc_scramble ? "Yes" : "No");
+#endif							
+                    xil_printf("  YUV 420 Deep.C. Support..\r\n");
+                    xil_printf("    Supports 48bpp......... %s\r\n",
+                           hdmi->dc_48bit_yuv420 ? "Yes" : "No");
+                    xil_printf("    Supports 36bpp......... %s\r\n",
+                           hdmi->dc_36bit_yuv420 ? "Yes" : "No");
+                    xil_printf("    Supports 30bpp......... %s\r\n",
+                           hdmi->dc_30bit_yuv420 ? "Yes" : "No");
+                }
+#endif
+                EdidCtrlParam->IsYCbCr420dc30bppSupp = hdmi->dc_30bit_yuv420;
+                EdidCtrlParam->IsYCbCr420dc36bppSupp = hdmi->dc_36bit_yuv420;
+                EdidCtrlParam->IsYCbCr420dc48bppSupp = hdmi->dc_48bit_yuv420;
+                EdidCtrlParam->IsSCDCReadRequestReady = hdmi->rr_capable;
+                EdidCtrlParam->IsSCDCPresent = hdmi->scdc_present;
+            }
+    }
+#if XVIDC_EDID_VERBOSITY > 0
+    if (VerboseEn) {
+        xil_printf("\r\n");
+    }
+#endif
+}
+
+#if XVIDC_EDID_VERBOSITY > 1
+/*****************************************************************************/
+/**
+*
+* This function parse EDID on CEA 861 Speaker Allocation
+*
+* @param    data is a pointer to the EDID array.
+* @param    EdidCtrlParam is a pointer the EDID Control parameter
+* @param    VerboseEn is a pointer to the XV_HdmiTxSs core instance.
+*
+* @return None
+*
+* @note   None.
+*
+******************************************************************************/
+static void
+xvidc_disp_cea861_speaker_allocation_data(
+          const struct xvidc_cea861_speaker_allocation_data_block * const sadb,
+             XV_VidC_EdidCntrlParam *EdidCtrlParam,
+             XV_VidC_Verbose VerboseEn) {
+    /* For Future Usage */
+    EdidCtrlParam = EdidCtrlParam;
+
+    const struct xvidc_cea861_speaker_allocation * const sa = &sadb->payload;
+    const u8 * const channel_configuration = (u8 *) sa;
+
+    if (VerboseEn) {
+        xil_printf("CEA speaker allocation data\r\n");
+        xil_printf("  Channel configuration.... %u.%u\r\n",
+               (__builtin_popcountll(channel_configuration[0] & 0xe9) << 1) +
+               (__builtin_popcountll(channel_configuration[0] & 0x14) << 0) +
+               (__builtin_popcountll(channel_configuration[1] & 0x01) << 1) +
+               (__builtin_popcountll(channel_configuration[1] & 0x06) << 0),
+               (channel_configuration[0] & 0x02));
+        xil_printf("  Front left/right......... %s\r\n",
+               sa->front_left_right ? "Yes" : "No");
+        xil_printf("  Front LFE................ %s\r\n",
+               sa->front_lfe ? "Yes" : "No");
+        xil_printf("  Front center............. %s\r\n",
+               sa->front_center ? "Yes" : "No");
+        xil_printf("  Rear left/right.......... %s\r\n",
+               sa->rear_left_right ? "Yes" : "No");
+        xil_printf("  Rear center.............. %s\r\n",
+               sa->rear_center ? "Yes" : "No");
+        xil_printf("  Front left/right center.. %s\r\n",
+               sa->front_left_right_center ? "Yes" : "No");
+        xil_printf("  Rear left/right center... %s\r\n",
+               sa->rear_left_right_center ? "Yes" : "No");
+        xil_printf("  Front left/right wide.... %s\r\n",
+               sa->front_left_right_wide ? "Yes" : "No");
+        xil_printf("  Front left/right high.... %s\r\n",
+               sa->front_left_right_high ? "Yes" : "No");
+        xil_printf("  Top center............... %s\r\n",
+               sa->top_center ? "Yes" : "No");
+        xil_printf("  Front center high........ %s\r\n",
+               sa->front_center_high ? "Yes" : "No");
+
+        xil_printf("\r\n");
+    }
+
+}
+#endif
+
+/*****************************************************************************/
+/**
+*
+* This function Parse and Display the CEA-861
+*
+* @param    data is a pointer to the EDID array.
+* @param    EdidCtrlParam is a pointer the EDID Control parameter
+* @param    VerboseEn is a pointer to the XV_HdmiTxSs core instance.
+*
+* @return None
+*
+* @note   None.
+*
+******************************************************************************/
+static void
+xvidc_disp_cea861(const struct xvidc_edid_extension * const ext,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn) {
+
+    const struct xvidc_cea861_timing_block * const ctb =
+        (struct xvidc_cea861_timing_block *) ext;
+    const u8 offset = offsetof(struct xvidc_cea861_timing_block, data);
+    u8 index = 0;
+
+#if XVIDC_EDID_VERBOSITY > 1
+    const struct xvidc_edid_detailed_timing_descriptor *dtd = NULL;
+    u8 i;
+
+    XV_VidC_TimingParam timing_params;
+#endif
+
+#if XVIDC_EDID_VERBOSITY > 0
+    if (VerboseEn) {
+
+        xil_printf("CEA-861 Information\r\n");
+        xil_printf("  Revision number.......... %u\r\n",
+               ctb->revision);
+    }
+#endif
+
+    if (ctb->revision >= 2) {
+#if XVIDC_EDID_VERBOSITY > 0
+        if (VerboseEn) {
+#if XVIDC_EDID_VERBOSITY > 1
+            xil_printf("  IT underscan............. %supported\r\n",
+                   ctb->underscan_supported ? "S" : "Not s");
+#endif
+            xil_printf("  Basic audio.............. %supported\r\n",
+                   ctb->basic_audio_supported ? "S" : "Not s");
+            xil_printf("  YCbCr 4:4:4.............. %supported\r\n",
+                   ctb->yuv_444_supported ? "S" : "Not s");
+            xil_printf("  YCbCr 4:2:2.............. %supported\r\n",
+                   ctb->yuv_422_supported ? "S" : "Not s");
+#if XVIDC_EDID_VERBOSITY > 1
+            xil_printf("  Native formats........... %u\r\n",
+                   ctb->native_dtds);
+#endif
+        }
+#endif
+        EdidCtrlParam->IsYCbCr444Supp = ctb->yuv_444_supported;
+        EdidCtrlParam->IsYCbCr422Supp = ctb->yuv_422_supported;
+    }
+
+#if XVIDC_EDID_VERBOSITY > 1
+    dtd = (struct xvidc_edid_detailed_timing_descriptor *)
+                                            ((u8 *) ctb + ctb->dtd_offset);
+    for (i = 0; dtd->pixel_clock; i++, dtd++) {
+
+        timing_params = XV_VidC_timing(dtd);
+        if (VerboseEn) {
+            xil_printf("  Detailed timing #%u....... %ux%u%c at %uHz "
+                                                                "(%u:%u)\r\n",
+                                        i + 1,
+                                        timing_params.hres,
+                                        timing_params.vres,
+                                        timing_params.vidfrmt ? 'i' : 'p',
+                                        timing_params.vfreq,
+                                        timing_params.aspect_ratio.width,
+                                        timing_params.aspect_ratio.height);
+
+            xil_printf(
+            "    Modeline............... \"%ux%u\" %u %u %u %u %u %u %u %u %u"
+                                                        " %chsync %cvsync\r\n",
+                                   timing_params.hres,
+                                   timing_params.vres,
+                                   HZ_2_MHZ (timing_params.pixclk),
+                                   (timing_params.hres),
+                                   (timing_params.hres + timing_params.hfp),
+                                   (timing_params.hres + timing_params.hfp +
+                                                    timing_params.hsync_width),
+                                   (timing_params.htotal),
+                                   (timing_params.vres),
+                                   (timing_params.vres + timing_params.vfp),
+                                   (timing_params.vres + timing_params.vfp +
+                                                    timing_params.vsync_width),
+                                   (timing_params.vtotal),
+                                   timing_params.hsync_polarity ? '+' : '-',
+                                   timing_params.vsync_polarity ? '+' : '-');
+        }
+    }
+#endif
+#if XVIDC_EDID_VERBOSITY > 0
+        if (VerboseEn) {
+            xil_printf("\r\n");
+        }
+#endif
+
+    if (ctb->revision >= 3) {
+        do {
+            const struct xvidc_cea861_data_block_header * const header =
+                (struct xvidc_cea861_data_block_header *) &ctb->data[index];
+
+            switch (header->tag) {
+
+            case XVIDC_CEA861_DATA_BLOCK_TYPE_AUDIO:
+                {
+#if XVIDC_EDID_VERBOSITY > 1
+                    const struct xvidc_cea861_audio_data_block * const db =
+                        (struct xvidc_cea861_audio_data_block *) header;
+
+                    xvidc_disp_cea861_audio_data(db,EdidCtrlParam,VerboseEn);
+#endif
+                }
+                break;
+
+            case XVIDC_CEA861_DATA_BLOCK_TYPE_VIDEO:
+                {
+#if XVIDC_EDID_VERBOSITY > 1
+                    const struct xvidc_cea861_video_data_block * const db =
+                        (struct xvidc_cea861_video_data_block *) header;
+
+                    xvidc_disp_cea861_video_data(db,EdidCtrlParam,VerboseEn);
+#endif
+                }
+                break;
+
+            case XVIDC_CEA861_DATA_BLOCK_TYPE_VENDOR_SPECIFIC:
+                {
+                    const struct
+                    xvidc_cea861_vendor_specific_data_block * const db =
+                     (struct xvidc_cea861_vendor_specific_data_block *) header;
+
+                    xvidc_disp_cea861_vendor_data(db,EdidCtrlParam,VerboseEn);
+                }
+                break;
+
+            case XVIDC_CEA861_DATA_BLOCK_TYPE_SPEAKER_ALLOCATION:
+                {
+#if XVIDC_EDID_VERBOSITY > 1
+                    const struct
+                    xvidc_cea861_speaker_allocation_data_block * const db =
+                  (struct xvidc_cea861_speaker_allocation_data_block *) header;
+
+                    xvidc_disp_cea861_speaker_allocation_data(db,
+                                                      EdidCtrlParam,VerboseEn);
+#endif
+                }
+                break;
+
+            case XVIDC_CEA861_DATA_BLOCK_TYPE_EXTENDED:
+                {
+                    const struct xvidc_cea861_extended_data_block * const db =
+                        (struct xvidc_cea861_extended_data_block *) header;
+
+                   xvidc_disp_cea861_extended_data(db,EdidCtrlParam,VerboseEn);
+                }
+                break;
+
+            default:
+#if XVIDC_EDID_VERBOSITY > 1
+                if (VerboseEn) {
+                    xil_printf("Unknown CEA-861 data block type 0x%02x\r\n",
+                            header->tag);
+                }
+#endif
+                break;
+            }
+
+            index = index + header->length + sizeof(*header);
+        } while (index < ctb->dtd_offset - offset);
+    }
+#if XVIDC_EDID_VERBOSITY > 0
+    if (VerboseEn) {
+        xil_printf("\r\n");
+    }
+#endif
+}
+
+
+/*****************************************************************************/
+/**
+*
+* This structure parse parse EDID routines
+*
+*
+* @note   None.
+*
+******************************************************************************/
+static const struct xvidc_edid_extension_handler {
+    void (* const inf_disp)(const struct xvidc_edid_extension * const,
+           XV_VidC_EdidCntrlParam *EdidCtrlParam, XV_VidC_Verbose VerboseEn);
+} xvidc_edid_extension_handlers[] = {
+    [XVIDC_EDID_EXTENSION_CEA] = { xvidc_disp_cea861 },
+};
+
+
+/*****************************************************************************/
+/**
+*
+* This function parse and print the EDID of the Sink
+*
+* @param    data is a pointer to the EDID array.
+* @param    EdidCtrlParam is a pointer the EDID Control parameter
+* @param    VerboseEn is a pointer to the XV_HdmiTxSs core instance.
+*
+* @return None
+*
+* @note   None.
+*
+******************************************************************************/
+void
+XV_VidC_parse_edid(const u8 * const data,
+                  XV_VidC_EdidCntrlParam *EdidCtrlParam,
+                  XV_VidC_Verbose VerboseEn) {
+    const struct edid * const edid = (struct edid *) data;
+    const struct xvidc_edid_extension * const extensions =
+        (struct xvidc_edid_extension *) (data + sizeof(*edid));
+
+    XV_VidC_EdidCtrlParamInit(EdidCtrlParam);
+
+    xvidc_disp_edid1(edid,EdidCtrlParam,VerboseEn);
+
+    for (u8 i = 0; i < edid->extensions; i++) {
+        const struct xvidc_edid_extension * const extension = &extensions[i];
+        const struct xvidc_edid_extension_handler * const handler =
+            &xvidc_edid_extension_handlers[extension->tag];
+
+        if (!handler) {
+#if XVIDC_EDID_VERBOSITY > 0
+            if (VerboseEn) {
+                xil_printf("WARNING: block %u contains unknown extension "
+                                         " (%#04x)\r\n", i, extensions[i].tag);
+            }
+#endif
+            continue;
+        }
+
+        if (handler->inf_disp) {
+            (*handler->inf_disp)(extension,EdidCtrlParam,VerboseEn);
+        }
+    }
+}
diff --git a/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_timings_table.c b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_timings_table.c
new file mode 100644
index 0000000..ee1cb4f
--- /dev/null
+++ b/src/Xilinx/libsrc/video_common_v4_3/src/xvidc_timings_table.c
@@ -0,0 +1,534 @@
+/*******************************************************************************
+ *
+ * Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * Use of the Software is limited solely to applications:
+ * (a) running on a Xilinx device, or
+ * (b) that interact with a Xilinx device through a bus or interconnect.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the Xilinx shall not be used
+ * in advertising or otherwise to promote the sale, use or other dealings in
+ * this Software without prior written authorization from Xilinx.
+ *
+*******************************************************************************/
+/******************************************************************************/
+/**
+ *
+ * @file xvidc_timings_table.c
+ * @addtogroup video_common_v4_2
+ * @{
+ *
+ * Contains video timings for various standard resolutions.
+ *
+ * @note	None.
+ *
+ * 
+ * MODIFICATION HISTORY:
+ *
+ * Ver   Who  Date     Changes
+ * ----- ---- -------- -----------------------------------------------
+ * 1.0   als, 01/10/15 Initial release.
+ *       rc
+ * 2.0   als  08/14/15 Added new video timings.
+ * 2.1   als  11/04/15 Fixed video timings for some resolutions.
+ *       rco  02/09/17 Fix c++ compilation warnings
+ * 4.2   jsr  07/08/17 Added new video timings for SDI supported resolutions
+ *       aad  07/10/17 Add XVIDC_VM_3840x2160_60_P_RB video format
+ *       aad  09/05/17 Fixed timings for 1366x768_60_P
+ *       aad  09/05/17 Added 1366x768_60_P_RB
+ * 

+ *
+*******************************************************************************/
+
+/******************************* Include Files ********************************/
+
+#include "xvidc.h"
+
+/**************************** Variable Definitions ****************************/
+
+/**
+ * This table contains the main stream attributes for various standard
+ * resolutions. Each entry is of the format:
+ * 1) ID: XVIDC_VM_x__(_RB = Reduced Blanking)
+ * 2) Resolution naming: "x@"
+ * 3) Frame rate: XVIDC_FR_
+ * 4) Video timing structure:
+ *    1) Horizontal active resolution (pixels)
+ *    2) Horizontal front porch (pixels)
+ *    3) Horizontal sync width (pixels)
+ *    4) Horizontal back porch (pixels)
+ *    5) Horizontal total (pixels)
+ *    6) Horizontal sync polarity (0=negative|1=positive)
+ *    7) Vertical active resolution (lines)
+ *    8) Frame 0: Vertical front porch (lines)
+ *    9) Frame 0: Vertical sync width (lines)
+ *    10) Frame 0: Vertical back porch (lines)
+ *    11) Frame 0: Vertical total (lines)
+ *    12) Frame 1: Vertical front porch (lines)
+ *    13) Frame 1: Vertical sync width (lines)
+ *    14) Frame 1: Vertical back porch (lines)
+ *    15) Frame 1: Vertical total (lines)
+ *    16) Vertical sync polarity (0=negative|1=positive)
+ */
+#ifdef __cplusplus
+extern "C"
+#endif
+const XVidC_VideoTimingMode XVidC_VideoTimingModes[XVIDC_VM_NUM_SUPPORTED] =
+{
+	/* Interlaced modes. */
+	{ XVIDC_VM_720x480_60_I, "720x480@60Hz (I)", XVIDC_FR_60HZ,
+		{720, 19, 62, 57, 858, 0,
+		240, 4, 3, 15, 262, 5, 3, 15, 263, 0} },
+	{ XVIDC_VM_720x576_50_I, "720x576@50Hz (I)", XVIDC_FR_50HZ,
+		{720, 12, 63, 69, 864, 0,
+		288, 2, 3, 19, 312, 3, 3, 19, 313, 0} },
+	{ XVIDC_VM_1440x480_60_I, "1440x480@60Hz (I)", XVIDC_FR_60HZ,
+		{1440, 38, 124, 114, 1716, 0,
+		240, 4, 3, 15, 262, 5, 3, 15, 263, 0} },
+	{ XVIDC_VM_1440x576_50_I, "1440x576@50Hz (I)", XVIDC_FR_50HZ,
+		{1440, 24, 126, 138, 1728, 0,
+		288, 2, 3, 19, 312, 3, 3, 19, 313, 0} },
+	{ XVIDC_VM_1920x1080_48_I, "1920x1080@48Hz (I)", XVIDC_FR_48HZ,
+		{1920, 371, 88, 371, 2750, 1,
+		540, 2, 5, 15, 562, 3, 5, 15, 563, 1} },
+	{ XVIDC_VM_1920x1080_50_I, "1920x1080@50Hz (I)", XVIDC_FR_50HZ,
+		{1920, 528, 44, 148, 2640, 1,
+		540, 2, 5, 15, 562, 3, 5, 15, 563, 1} },
+	{ XVIDC_VM_1920x1080_60_I, "1920x1080@60Hz (I)", XVIDC_FR_60HZ,
+		{1920, 88, 44, 148, 2200, 1,
+		540, 2, 5, 15, 562, 3, 5, 15, 563, 1} },
+	{ XVIDC_VM_1920x1080_96_I, "1920x1080@96Hz (I)", XVIDC_FR_96HZ,
+		{1920, 371, 88, 371, 2750, 1,
+		1080, 4, 10, 30, 1124, 6, 10, 30, 1126, 1} },
+	{ XVIDC_VM_1920x1080_100_I, "1920x1080@100Hz (I)", XVIDC_FR_100HZ,
+		{1920, 528, 44, 148, 2640, 1,
+		1080, 4, 10, 30, 1124, 6, 10, 30, 1126, 1} },
+	{ XVIDC_VM_1920x1080_120_I, "1920x1080@120Hz (I)", XVIDC_FR_120HZ,
+		{1920, 88, 44, 148, 2200, 1,
+		1080, 4, 10, 30, 1124, 6, 10, 30, 1126, 1} },
+	{ XVIDC_VM_2048x1080_48_I, "2048x1080@48Hz (I)", XVIDC_FR_48HZ,
+		{2048, 329, 44, 329, 2750, 1,
+		540, 2, 5, 15, 562, 3, 5, 15, 563, 1} },
+	{ XVIDC_VM_2048x1080_50_I, "2048x1080@50Hz (I)", XVIDC_FR_50HZ,
+		{2048, 274, 44, 274, 2640, 1,
+		540, 2, 5, 15, 562, 3, 5, 15, 563, 1} },
+	{ XVIDC_VM_2048x1080_60_I, "2048x1080@60Hz (I)", XVIDC_FR_60HZ,
+		{2048, 66, 20, 66, 2200, 1,
+		540, 2, 5, 15, 562, 3, 5, 15, 563, 1} },
+	{ XVIDC_VM_2048x1080_96_I, "2048x1080@96Hz (I)", XVIDC_FR_96HZ,
+		{2048, 329, 44, 329, 2750, 1,
+		1080, 4, 10, 30, 1124, 6, 10, 30, 1126, 1} },
+	{ XVIDC_VM_2048x1080_100_I, "2048x1080@100Hz (I)", XVIDC_FR_100HZ,
+		{2048, 274, 44, 274, 2640, 1,
+		1080, 4, 10, 30, 1124, 6, 10, 30, 1126, 1} },
+	{ XVIDC_VM_2048x1080_120_I, "2048x1080@120Hz (I)", XVIDC_FR_120HZ,
+		{2048, 66, 20, 66, 2200, 1,
+		1080, 4, 10, 30, 1124, 6, 10, 30, 1126, 1} },
+
+
+	/* Progressive modes. */
+	{ XVIDC_VM_640x350_85_P, "640x350@85Hz", XVIDC_FR_85HZ,
+		{640, 32, 64, 96, 832, 1,
+		350, 32, 3, 60, 445, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_640x480_60_P, "640x480@60Hz", XVIDC_FR_60HZ,
+		{640, 8+8, 96, 40+8, 800, 0,
+		480, 2+8, 2, 25+8, 525, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_640x480_72_P, "640x480@72Hz", XVIDC_FR_72HZ,
+		{640, 8+16, 40, 120+8, 832, 0,
+		480, 8+1, 3, 20+8, 520, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_640x480_75_P, "640x480@75Hz", XVIDC_FR_75HZ,
+		{640, 16, 64, 120, 840, 0,
+		480, 1, 3, 16, 500, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_640x480_85_P, "640x480@85Hz", XVIDC_FR_85HZ,
+		{640, 56, 56, 80, 832, 0,
+		480, 1, 3, 25, 509, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_720x400_85_P, "720x400@85Hz", XVIDC_FR_85HZ,
+		{720, 36, 72, 108, 936, 0,
+		400, 1, 3, 42, 446, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_720x480_60_P, "720x480@60Hz", XVIDC_FR_60HZ,
+		{720, 16, 62, 60, 858, 0,
+		480, 9, 6, 30, 525, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_720x576_50_P, "720x576@50Hz", XVIDC_FR_50HZ,
+		{720, 12, 64, 68, 864, 0,
+		576, 5, 5, 39, 625, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_800x600_56_P, "800x600@56Hz", XVIDC_FR_56HZ,
+		{800, 24, 72, 128, 1024, 1,
+		600, 1, 2, 22, 625, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_800x600_60_P, "800x600@60Hz", XVIDC_FR_60HZ,
+		{800, 40, 128, 88, 1056, 1,
+		600, 1, 4, 23, 628, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_800x600_72_P, "800x600@72Hz", XVIDC_FR_72HZ,
+		{800, 56, 120, 64, 1040, 1,
+		600, 37, 6, 23, 666, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_800x600_75_P, "800x600@75Hz", XVIDC_FR_75HZ,
+		{800, 16, 80, 160, 1056, 1,
+		600, 1, 3, 21, 625, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_800x600_85_P, "800x600@85Hz", XVIDC_FR_85HZ,
+		{800, 32, 64, 152, 1048, 1,
+		600, 1, 3, 27, 631, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_800x600_120_P_RB, "800x600@120Hz (RB)", XVIDC_FR_120HZ,
+		{800, 48, 32, 80, 960, 1,
+		600, 3, 4, 29, 636, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_848x480_60_P, "848x480@60Hz", XVIDC_FR_60HZ,
+		{848, 16, 112, 112, 1088, 1,
+		480, 6, 8, 23, 517, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1024x768_60_P, "1024x768@60Hz", XVIDC_FR_60HZ,
+		{1024, 24, 136, 160, 1344, 0,
+		768, 3, 6, 29, 806, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1024x768_70_P, "1024x768@70Hz", XVIDC_FR_70HZ,
+		{1024, 24, 136, 144, 1328, 0,
+		768, 3, 6, 29, 806, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1024x768_75_P, "1024x768@75Hz", XVIDC_FR_75HZ,
+		{1024, 16, 96, 176, 1312, 1,
+		768, 1, 3, 28, 800, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1024x768_85_P, "1024x768@85Hz", XVIDC_FR_85HZ,
+		{1024, 48, 96, 208, 1376, 1,
+		768, 1, 3, 36, 808, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1024x768_120_P_RB, "1024x768@120Hz (RB)", XVIDC_FR_120HZ,
+		{1024, 48, 32, 80, 1184, 1,
+		768, 3, 4, 38, 813, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1152x864_75_P, "1152x864@75Hz", XVIDC_FR_75HZ,
+		{1152, 64, 128, 256, 1600, 1,
+		864, 1, 3, 32, 900, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x720_24_P, "1280x720@24Hz", XVIDC_FR_24HZ,
+		{1280, 970, 905, 970, 4125, 1,
+		720, 5, 5, 20, 750, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x720_25_P, "1280x720@25Hz", XVIDC_FR_25HZ,
+		{1280, 970, 740, 970, 3960, 1,
+		720, 5, 5, 20, 750, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x720_30_P, "1280x720@30Hz", XVIDC_FR_30HZ,
+		{1280, 970, 80, 970, 3300, 1,
+		720, 5, 5, 20, 750, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x720_50_P, "1280x720@50Hz", XVIDC_FR_50HZ,
+		{1280, 440, 40, 220, 1980, 1,
+		720, 5, 5, 20, 750, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x720_60_P, "1280x720@60Hz", XVIDC_FR_60HZ,
+		{1280, 110, 40, 220, 1650, 1,
+		720, 5, 5, 20, 750, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x768_60_P, "1280x768@60Hz", XVIDC_FR_60HZ,
+		{1280, 64, 128, 192, 1664, 0,
+		768, 3, 7, 20, 798, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x768_60_P_RB, "1280x768@60Hz (RB)", XVIDC_FR_60HZ,
+		{1280, 48, 32, 80, 1440, 1,
+		768, 3, 7, 12, 790, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1280x768_75_P, "1280x768@75Hz", XVIDC_FR_75HZ,
+		{1280, 80, 128, 208, 1696, 0,
+		768, 3, 7, 27, 805, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x768_85_P, "1280x768@85Hz", XVIDC_FR_85HZ,
+		{1280, 80, 136, 216, 1712, 0,
+		768, 3, 7, 31, 809, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x768_120_P_RB, "1280x768@120Hz (RB)", XVIDC_FR_120HZ,
+		{1280, 48, 32, 80, 1440, 1,
+		768, 3, 7, 35, 813, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1280x800_60_P, "1280x800@60Hz", XVIDC_FR_60HZ,
+		{1280, 72, 128, 200, 1680, 0,
+		800, 3, 6, 22, 831, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x800_60_P_RB, "1280x800@60Hz (RB)", XVIDC_FR_60HZ,
+		{1280, 48, 32, 80, 1440, 1,
+		800, 3, 6, 14, 823, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1280x800_75_P, "1280x800@75Hz", XVIDC_FR_75HZ,
+		{1280, 80, 128, 208, 1696, 0,
+		800, 3, 6, 29, 838, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x800_85_P, "1280x800@85Hz", XVIDC_FR_85HZ,
+		{1280, 80, 136, 216, 1712, 0,
+		800, 3, 6, 34, 843, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x800_120_P_RB, "1280x800@120Hz (RB)", XVIDC_FR_120HZ,
+		{1280, 48, 32, 80, 1440, 1,
+		800, 3, 6, 38, 847, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1280x960_60_P, "1280x960@60Hz", XVIDC_FR_60HZ,
+		{1280, 96, 112, 312, 1800, 1,
+		960, 1, 3, 36, 1000, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x960_85_P, "1280x960@85Hz", XVIDC_FR_85HZ,
+		{1280, 64, 160, 224, 1728, 1,
+		960, 1, 3, 47, 1011, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x960_120_P_RB, "1280x960@120Hz (RB)", XVIDC_FR_120HZ,
+		{1280, 48, 32, 80, 1440, 1,
+		960, 3, 4, 50, 1017, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1280x1024_60_P, "1280x1024@60Hz", XVIDC_FR_60HZ,
+		{1280, 48, 112, 248, 1688, 1,
+		1024, 1, 3, 38, 1066, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x1024_75_P, "1280x1024@75Hz", XVIDC_FR_75HZ,
+		{1280, 16, 144, 248, 1688, 1,
+		1024, 1, 3, 38, 1066, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x1024_85_P, "1280x1024@85Hz", XVIDC_FR_85HZ,
+		{1280, 64, 160, 224, 1728, 1,
+		1024, 1, 3, 44, 1072, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1280x1024_120_P_RB, "1280x1024@120Hz (RB)", XVIDC_FR_120HZ,
+		{1280, 48, 32, 80, 1440, 1,
+		1024, 3, 7, 50, 1084, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1360x768_60_P, "1360x768@60Hz", XVIDC_FR_60HZ,
+		{1360, 64, 112, 256, 1792, 1,
+		768, 3, 6, 18, 795, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1360x768_120_P_RB, "1360x768@120Hz (RB)", XVIDC_FR_120HZ,
+		{1360, 48, 32, 80, 1520, 1,
+		768, 3, 5, 37, 813, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1366x768_60_P, "1366x768@60Hz", XVIDC_FR_60HZ,
+		{1366, 70, 143, 213, 1792, 1,
+		768, 3, 3, 24, 798, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1366x768_60_P_RB, "1366x768@60Hz (RB)", XVIDC_FR_60HZ,
+		{1366, 14, 56, 64, 1500, 1,
+		768, 1, 3, 28, 800, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1400x1050_60_P, "1400x1050@60Hz", XVIDC_FR_60HZ,
+		{1400, 88, 144, 232, 1864, 0,
+		1050, 3, 4, 32, 1089, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1400x1050_60_P_RB, "1400x1050@60Hz (RB)", XVIDC_FR_60HZ,
+		{1400, 48, 32, 80, 1560, 1,
+		1050, 3, 4, 23, 1080, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1400x1050_75_P, "1400x1050@75Hz", XVIDC_FR_75HZ,
+		{1400, 104, 144, 248, 1896, 0,
+		1050, 3, 4, 42, 1099, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1400x1050_85_P, "1400x1050@85Hz", XVIDC_FR_85HZ,
+		{1400, 104, 152, 256, 1912, 0,
+		1050, 3, 4, 48, 1105, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1400x1050_120_P_RB, "1400x1050@120Hz (RB)", XVIDC_FR_120HZ,
+		{1400, 48, 32, 80, 1560, 1,
+		1050, 3, 4, 55, 1112, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1440x240_60_P, "1440x240@60Hz", XVIDC_FR_60HZ,
+		{1440, 38, 124, 114, 1716, 0,
+		240, 14, 3, 4, 262, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1440x900_60_P, "1440x900@60Hz", XVIDC_FR_60HZ,
+		{1440, 80, 152, 232, 1904, 0,
+		900, 3, 6, 25, 934, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1440x900_60_P_RB, "1440x900@60Hz (RB)", XVIDC_FR_60HZ,
+		{1440, 48, 32, 80, 1600, 1,
+		900, 3, 6, 17, 926, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1440x900_75_P, "1440x900@75Hz", XVIDC_FR_75HZ,
+		{1440, 96, 152, 248, 1936, 0,
+		900, 3, 6, 33, 942, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1440x900_85_P, "1440x900@85Hz", XVIDC_FR_85HZ,
+		{1440, 104, 152, 256, 1952, 0,
+		900, 3, 6, 39, 948, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1440x900_120_P_RB, "1440x900@120Hz (RB)", XVIDC_FR_120HZ,
+		{1440, 48, 32, 80, 1600, 1,
+		900, 3, 6, 44, 953, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1600x1200_60_P, "1600x1200@60Hz", XVIDC_FR_60HZ,
+		{1600, 64, 192, 304, 2160, 1,
+		1200, 1, 3, 46, 1250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1600x1200_65_P, "1600x1200@65Hz", XVIDC_FR_65HZ,
+		{1600, 64, 192, 304, 2160, 1,
+		1200, 1, 3, 46, 1250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1600x1200_70_P, "1600x1200@70Hz", XVIDC_FR_70HZ,
+		{1600, 64, 192, 304, 2160, 1,
+		1200, 1, 3, 46, 1250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1600x1200_75_P, "1600x1200@75Hz", XVIDC_FR_75HZ,
+		{1600, 64, 192, 304, 2160, 1,
+		1200, 1, 3, 46, 1250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1600x1200_85_P, "1600x1200@85Hz", XVIDC_FR_85HZ,
+		{1600, 64, 192, 304, 2160, 1,
+		1200, 1, 3, 46, 1250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1600x1200_120_P_RB, "1600x1200@120Hz (RB)", XVIDC_FR_120HZ,
+		{1600, 48, 32, 80, 1760, 1,
+		1200, 3, 4, 64, 1271, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1680x720_50_P, "1680x720@50Hz", XVIDC_FR_50HZ,
+		{1680, 260, 40, 220, 2200, 1,
+		720, 5, 5, 20, 750, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1680x720_60_P, "1680x720@60Hz", XVIDC_FR_60HZ,
+		{1680, 260, 40, 220, 2200, 1,
+		720, 5, 5, 20, 750, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1680x720_100_P, "1680x720@100Hz", XVIDC_FR_100HZ,
+		{1680, 60, 40, 220, 2000, 1,
+		720, 5, 5, 95, 825, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1680x720_120_P, "1680x720@120Hz", XVIDC_FR_120HZ,
+		{1680, 60, 40, 220, 2000, 1,
+		720, 5, 5, 95, 825, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1680x1050_50_P, "1680x1050@50Hz", XVIDC_FR_50HZ,
+		{1680, 88, 176, 264, 2208, 0,
+		1050, 3, 6, 24, 1083, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1680x1050_60_P, "1680x1050@60Hz", XVIDC_FR_60HZ,
+		{1680, 104, 176, 280, 2240, 0,
+		1050, 3, 6, 30, 1089, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1680x1050_60_P_RB, "1680x1050@60Hz (RB)", XVIDC_FR_60HZ,
+		{1680, 48, 32, 80, 1840, 1,
+		1050, 3, 6, 21, 1080, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1680x1050_75_P, "1680x1050@75Hz", XVIDC_FR_75HZ,
+		{1680, 120, 176, 296, 2272, 0,
+		1050, 3, 6, 40, 1099, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1680x1050_85_P, "1680x1050@85Hz", XVIDC_FR_85HZ,
+		{1680, 128, 176, 304, 2288, 0,
+		1050, 3, 6, 46, 1105, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1680x1050_120_P_RB, "1680x1050@120Hz (RB)", XVIDC_FR_120HZ,
+		{1680, 48, 32, 80, 1840, 1,
+		1050, 3, 6, 53, 1112, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1792x1344_60_P, "1792x1344@60Hz", XVIDC_FR_60HZ,
+		{1792, 128, 200, 328, 2448, 0,
+		1344, 1, 3, 46, 1394, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1792x1344_75_P, "1792x1344@75Hz", XVIDC_FR_75HZ,
+		{1792, 96, 216, 352, 2456, 0,
+		1344, 1, 3, 69, 1417, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1792x1344_120_P_RB, "1792x1344@120Hz (RB)", XVIDC_FR_120HZ,
+		{1792, 48, 32, 80, 1952, 1,
+		1344, 3, 4, 72, 1423, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1856x1392_60_P, "1856x1392@60Hz", XVIDC_FR_60HZ,
+		{1856, 96, 224, 352, 2528, 0,
+		1392, 1, 3, 43, 1439, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1856x1392_75_P, "1856x1392@75Hz", XVIDC_FR_75HZ,
+		{1856, 128, 224, 352, 2560, 0,
+		1392, 1, 3, 104, 1500, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1856x1392_120_P_RB, "1856x1392@120Hz (RB)", XVIDC_FR_120HZ,
+		{1856, 48, 32, 80, 2016, 1,
+		1392, 3, 4, 75, 1474, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1920x1080_24_P, "1920x1080@24Hz", XVIDC_FR_24HZ,
+		{1920, 638, 44, 148, 2750, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1080_25_P, "1920x1080@25Hz", XVIDC_FR_25HZ,
+		{1920, 528, 44, 148, 2640, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1080_30_P, "1920x1080@30Hz", XVIDC_FR_30HZ,
+		{1920, 88, 44, 148, 2200, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1080_48_P, "1920x1080@48Hz", XVIDC_FR_48HZ,
+		{1920, 638, 44, 148, 2750, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1080_50_P, "1920x1080@50Hz", XVIDC_FR_50HZ,
+		{1920, 528, 44, 148, 2640, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1080_60_P, "1920x1080@60Hz", XVIDC_FR_60HZ,
+		{1920, 88, 44, 148, 2200, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1080_100_P, "1920x1080@100Hz", XVIDC_FR_100HZ,
+		{1920, 528, 44, 148, 2640, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1080_120_P, "1920x1080@120Hz", XVIDC_FR_120HZ,
+		{1920, 88, 44, 148, 2200, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1200_60_P, "1920x1200@60Hz", XVIDC_FR_60HZ,
+		{1920, 136, 200, 336, 2592, 0,
+		1200, 3, 6, 36, 1245, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1200_60_P_RB, "1920x1200@60Hz (RB)", XVIDC_FR_60HZ,
+		{1920, 48, 32, 80, 2080, 1,
+		1200, 3, 6, 26, 1235, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1920x1200_75_P, "1920x1200@75Hz", XVIDC_FR_75HZ,
+		{1920, 136, 208, 344, 2608, 0,
+		1200, 3, 6, 46, 1255, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1200_85_P, "1920x1200@85Hz", XVIDC_FR_85HZ,
+		{1920, 144, 208, 352, 2624, 0,
+		1200, 3, 6, 53, 1262, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1200_120_P_RB, "1920x1200@120Hz (RB)", XVIDC_FR_120HZ,
+		{1920, 48, 32, 80, 2080, 1,
+		1200, 3, 6, 62, 1271, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1920x1440_60_P, "1920x1440@60Hz", XVIDC_FR_60HZ,
+		{1920, 128, 208, 344, 2600, 0,
+		1440, 1, 3, 56, 1500, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1440_75_P, "1920x1440@75Hz", XVIDC_FR_75HZ,
+		{1920, 144, 224, 352, 2640, 0,
+		1440, 1, 3, 56, 1500, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_1920x1440_120_P_RB, "1920x1440@120Hz (RB)", XVIDC_FR_120HZ,
+		{1920, 48, 32, 80, 2080, 1,
+		1440, 3, 4, 78, 1525, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_1920x2160_60_P, "1920x2160@60Hz", XVIDC_FR_60HZ,
+		{1920, 88, 44, 148, 2200, 1,
+		2160, 20, 10, 60, 2250, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_2048x1080_24_P, "2048x1080@24Hz", XVIDC_FR_24HZ,
+		{2048, 510, 44, 148, 2750, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2048x1080_25_P, "2048x1080@25Hz", XVIDC_FR_25HZ,
+		{2048, 400, 44, 148, 2640, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2048x1080_30_P, "2048x1080@30Hz", XVIDC_FR_30HZ,
+		{2048, 66, 20, 66, 2200, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2048x1080_48_P, "2048x1080@48Hz", XVIDC_FR_48HZ,
+		{2048, 510, 44, 148, 2750, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2048x1080_50_P, "2048x1080@50Hz", XVIDC_FR_50HZ,
+		{2048, 400, 44, 148, 2640, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2048x1080_60_P, "2048x1080@60Hz", XVIDC_FR_60HZ,
+		{2048, 88, 44, 20, 2200, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2048x1080_100_P, "2048x1080@100Hz", XVIDC_FR_100HZ,
+		{2048, 528, 44, 148, 2640, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2048x1080_120_P, "2048x1080@120Hz", XVIDC_FR_120HZ,
+		{2048, 88, 44, 148, 2200, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2560x1080_50_P, "2560x1080@50Hz", XVIDC_FR_50HZ,
+		{2560, 548, 44, 148, 3300, 1,
+		1080, 4, 5, 36, 1125, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2560x1080_60_P, "2560x1080@60Hz", XVIDC_FR_60HZ,
+		{2560, 248, 44, 148, 3000, 1,
+		1080, 4, 5, 11, 1100, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2560x1080_100_P, "2560x1080@100Hz", XVIDC_FR_100HZ,
+		{2560, 218, 44, 148, 2970, 1,
+		1080, 4, 5, 161, 1250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2560x1080_120_P, "2560x1080@120Hz", XVIDC_FR_120HZ,
+		{2560, 548, 44, 148, 3300, 1,
+		1080, 4, 5, 161, 1250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2560x1600_60_P, "2560x1600@60Hz", XVIDC_FR_60HZ,
+		{2560, 192, 280, 472, 3504, 0,
+		1600, 3, 6, 49, 1658, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2560x1600_60_P_RB, "2560x1600@60Hz (RB)", XVIDC_FR_60HZ,
+		{2560, 48, 32, 80, 2720, 1,
+		1600, 3, 6, 37, 1646, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_2560x1600_75_P, "2560x1600@75Hz", XVIDC_FR_75HZ,
+		{2560, 208, 280, 488, 3536, 0,
+		1600, 3, 6, 63, 1672, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2560x1600_85_P, "2560x1600@85Hz", XVIDC_FR_85HZ,
+		{2560, 208, 280, 488, 3536, 0,
+		1600, 3, 6, 73, 1682, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_2560x1600_120_P_RB, "2560x1600@120Hz (RB)", XVIDC_FR_120HZ,
+		{2560, 48, 32, 80, 2720, 1,
+		1600, 3, 6, 85, 1694, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_3840x2160_24_P, "3840x2160@24Hz", XVIDC_FR_24HZ,
+		{3840, 1276, 88, 296, 5500, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_3840x2160_25_P, "3840x2160@25Hz", XVIDC_FR_25HZ,
+		{3840, 1056, 88, 296, 5280, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_3840x2160_30_P, "3840x2160@30Hz", XVIDC_FR_30HZ,
+		{3840, 176, 88, 296, 4400, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_3840x2160_48_P, "3840x2160@48Hz", XVIDC_FR_48HZ,
+		{3840, 1276, 88, 296, 5500, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_3840x2160_50_P, "3840x2160@50Hz", XVIDC_FR_50HZ,
+		{3840, 1056, 88, 296, 5280, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_3840x2160_60_P, "3840x2160@60Hz", XVIDC_FR_60HZ,
+		{3840, 176, 88, 296, 4400, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_3840x2160_60_P_RB, "3840x2160@60Hz (RB)", XVIDC_FR_60HZ,
+		{3840, 48, 32, 80, 4000, 1,
+		2160, 3, 5, 54, 2222, 0, 0, 0, 0, 0} },
+	{ XVIDC_VM_4096x2160_24_P, "4096x2160@24Hz", XVIDC_FR_24HZ,
+		{4096, 1020, 88, 296, 5500, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_4096x2160_25_P, "4096x2160@25Hz", XVIDC_FR_25HZ,
+		{4096, 968, 88, 128, 5280, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_4096x2160_30_P, "4096x2160@30Hz", XVIDC_FR_30HZ,
+		{4096, 88, 88, 128, 4400, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_4096x2160_48_P, "4096x2160@48Hz", XVIDC_FR_48HZ,
+		{4096, 1020, 88, 296, 5500, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_4096x2160_50_P, "4096x2160@50Hz", XVIDC_FR_50HZ,
+		{4096, 968, 88, 128, 5280, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_4096x2160_60_P, "4096x2160@60Hz", XVIDC_FR_60HZ,
+		{4096, 88, 88, 128, 4400, 1,
+		2160, 8, 10, 72, 2250, 0, 0, 0, 0, 1} },
+	{ XVIDC_VM_4096x2160_60_P_RB, "4096x2160@60Hz (RB)", XVIDC_FR_60HZ,
+		{4096, 8, 32, 40, 4176, 1,
+		2160, 48, 8, 6, 2222, 0, 0, 0, 0, 0} },
+};
+
+/** @} */
diff --git a/src/Xilinx/libsrc/wdtps_v3_0/src/Makefile b/src/Xilinx/libsrc/wdtps_v3_0/src/Makefile
new file mode 100644
index 0000000..8efa572
--- /dev/null
+++ b/src/Xilinx/libsrc/wdtps_v3_0/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner wdtps_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling wdtps"
+
+wdtps_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: wdtps_includes
+
+wdtps_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps.c b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps.c
new file mode 100644
index 0000000..fc5db32
--- /dev/null
+++ b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps.c
@@ -0,0 +1,486 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xwdtps.c
+* @addtogroup wdtps_v3_0
+* @{
+*
+* Contains the implementation of interface functions of the XWdtPs driver.
+* See xwdtps.h for a description of the driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------
+* 1.00a ecm/jz 01/15/10 First release
+* 1.02a  sg    07/15/12 Removed code/APIs related to  External Signal
+*			Length functionality for CR 658287
+*			Removed APIs XWdtPs_SetExternalSignalLength,
+*			XWdtPs_GetExternalSignalLength
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xwdtps.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/****************************************************************************/
+/**
+*
+* Initialize a specific watchdog timer instance/driver. This function
+* must be called before other functions of the driver are called.
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+* @param	ConfigPtr is the config structure.
+* @param	EffectiveAddress is the base address for the device. It could be
+*		a virtual address if address translation is supported in the
+*		system, otherwise it is the physical address.
+*
+* @return
+*		- XST_SUCCESS if initialization was successful.
+*		- XST_DEVICE_IS_STARTED if the device has already been started.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XWdtPs_CfgInitialize(XWdtPs *InstancePtr,
+			XWdtPs_Config *ConfigPtr, u32 EffectiveAddress)
+{
+	s32 Status;
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(ConfigPtr != NULL);
+
+	/*
+	 * If the device is started, disallow the initialize and return a
+	 * status indicating it is started. This allows the user to stop the
+	 * device and reinitialize, but prevents a user from inadvertently
+	 * initializing.
+	 */
+	if (InstancePtr->IsStarted == XIL_COMPONENT_IS_STARTED) {
+		Status = XST_DEVICE_IS_STARTED;
+	} else {
+
+		/*
+		 * Copy configuration into instance.
+		 */
+		InstancePtr->Config.DeviceId = ConfigPtr->DeviceId;
+
+		/*
+		 * Save the base address pointer such that the registers of the block
+		 * can be accessed and indicate it has not been started yet.
+		 */
+		InstancePtr->Config.BaseAddress = EffectiveAddress;
+		InstancePtr->IsStarted = 0U;
+
+		/*
+		 * Indicate the instance is ready to use, successfully initialized.
+		 */
+		InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
+
+		Status = XST_SUCCESS;
+	}
+	return Status;
+}
+
+/****************************************************************************/
+/**
+*
+* Start the watchdog timer of the device.
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XWdtPs_Start(XWdtPs *InstancePtr)
+{
+	u32 Register;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read the contents of the ZMR register.
+	 */
+	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,
+				 XWDTPS_ZMR_OFFSET);
+
+	/*
+	 * Enable the Timer field in the register and Set the access key so the
+	 * write takes place.
+	 */
+	Register |= XWDTPS_ZMR_WDEN_MASK;
+	Register |= XWDTPS_ZMR_ZKEY_VAL;
+
+	/*
+	 * Update the ZMR with the new value.
+	 */
+	XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_ZMR_OFFSET,
+			  Register);
+
+	/*
+	 * Indicate that the device is started.
+	 */
+	InstancePtr->IsStarted = XIL_COMPONENT_IS_STARTED;
+
+}
+
+/****************************************************************************/
+/**
+*
+* Disable the watchdog timer.
+*
+* It is the caller's responsibility to disconnect the interrupt handler
+* of the watchdog timer from the interrupt source, typically an interrupt
+* controller, and disable the interrupt in the interrupt controller.
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XWdtPs_Stop(XWdtPs *InstancePtr)
+{
+	u32 Register;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read the contents of the ZMR register.
+	 */
+	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,
+				 XWDTPS_ZMR_OFFSET);
+
+	/*
+	 * Disable the Timer field in the register and
+	 * Set the access key for the write to be done the register.
+	 */
+	Register &= (u32)(~XWDTPS_ZMR_WDEN_MASK);
+	Register |= XWDTPS_ZMR_ZKEY_VAL;
+
+	/*
+	 * Update the ZMR with the new value.
+	 */
+	XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_ZMR_OFFSET,
+			  Register);
+
+	InstancePtr->IsStarted = 0U;
+}
+
+
+/****************************************************************************/
+/**
+*
+* Enables the indicated signal/output.
+* Performs a read/modify/write cycle to update the value correctly.
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+* @param	Signal is the desired signal/output.
+*		Valid Signal Values are XWDTPS_RESET_SIGNAL and
+*		XWDTPS_IRQ_SIGNAL.
+*		Only one of them can be specified at a time.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XWdtPs_EnableOutput(XWdtPs *InstancePtr, u8 Signal)
+{
+	u32 Register;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((Signal == XWDTPS_RESET_SIGNAL) ||
+			(Signal == XWDTPS_IRQ_SIGNAL));
+
+	/*
+	 * Read the contents of the ZMR register.
+	 */
+	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,
+				 XWDTPS_ZMR_OFFSET);
+
+	if (Signal == XWDTPS_RESET_SIGNAL) {
+		/*
+		 * Enable the field in the register.
+		 */
+		Register |= XWDTPS_ZMR_RSTEN_MASK;
+
+	} else if (Signal == XWDTPS_IRQ_SIGNAL) {
+		/*
+		 * Enable the field in the register.
+		 */
+		Register |= XWDTPS_ZMR_IRQEN_MASK;
+
+	} else {
+		/* Else was made for misra-c compliance */
+		;
+	}
+
+	/*
+	 * Set the access key so the write takes.
+	 */
+	Register |= XWDTPS_ZMR_ZKEY_VAL;
+
+	/*
+	 * Update the ZMR with the new value.
+	 */
+	XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_ZMR_OFFSET,
+			  Register);
+}
+
+/****************************************************************************/
+/**
+*
+* Disables the indicated signal/output.
+* Performs a read/modify/write cycle to update the value correctly.
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+* @param	Signal is the desired signal/output.
+*		Valid Signal Values are XWDTPS_RESET_SIGNAL and
+*		XWDTPS_IRQ_SIGNAL
+*		Only one of them can be specified at a time.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XWdtPs_DisableOutput(XWdtPs *InstancePtr, u8 Signal)
+{
+	u32 Register;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((Signal == XWDTPS_RESET_SIGNAL) ||
+			(Signal == XWDTPS_IRQ_SIGNAL));
+
+	/*
+	 * Read the contents of the ZMR register.
+	 */
+	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,
+				 XWDTPS_ZMR_OFFSET);
+
+	if (Signal == XWDTPS_RESET_SIGNAL) {
+		/*
+		 * Disable the field in the register.
+		 */
+		Register &= (u32)(~XWDTPS_ZMR_RSTEN_MASK);
+
+	} else if (Signal == XWDTPS_IRQ_SIGNAL) {
+		/*
+		 * Disable the field in the register.
+		 */
+		Register &= (u32)(~XWDTPS_ZMR_IRQEN_MASK);
+
+	} else {
+		/* Else was made for misra-c compliance */
+		;
+	}
+
+	/*
+	 * Set the access key so the write takes place.
+	 */
+	Register |= XWDTPS_ZMR_ZKEY_VAL;
+
+	/*
+	 * Update the ZMR with the new value.
+	 */
+	XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_ZMR_OFFSET,
+			  Register);
+}
+
+/****************************************************************************/
+/**
+*
+* Returns the current control setting for the indicated signal/output.
+* The register referenced is the Counter Control Register (XWDTPS_CCR_OFFSET)
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+* @param	Control is the desired signal/output.
+*		Valid Control Values are XWDTPS_CLK_PRESCALE and
+*		XWDTPS_COUNTER_RESET. Only one of them can be specified at a
+*		time.
+*
+* @return	The contents of the requested control field in the Counter
+*		Control Register (XWDTPS_CCR_OFFSET).
+*		If the Control is XWDTPS_CLK_PRESCALE then use the
+*		defintions XWDTEPB_CCR_PSCALE_XXXX.
+*		If the Control is XWDTPS_COUNTER_RESET then the values are
+*		0x0 to 0xFFF. This is the Counter Restart value in the CCR
+*		register.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 XWdtPs_GetControlValue(XWdtPs *InstancePtr, u8 Control)
+{
+	u32 Register;
+	u32 ReturnValue = 0U;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertNonvoid((Control == XWDTPS_CLK_PRESCALE) ||
+			(Control == XWDTPS_COUNTER_RESET));
+
+	/*
+	 * Read the contents of the CCR register.
+	 */
+	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,
+			 XWDTPS_CCR_OFFSET);
+
+	if (Control == XWDTPS_CLK_PRESCALE) {
+		/*
+		 * Mask off the field in the register.
+		 */
+		ReturnValue = Register & XWDTPS_CCR_CLKSEL_MASK;
+
+	} else if (Control == XWDTPS_COUNTER_RESET) {
+		/*
+		 * Mask off the field in the register.
+		 */
+		Register &= XWDTPS_CCR_CRV_MASK;
+
+		/*
+		 * Shift over to the right most positions.
+		 */
+		ReturnValue = Register >> XWDTPS_CCR_CRV_SHIFT;
+	} else {
+		/* Else was made for misra-c compliance */
+		;
+	}
+
+	return ReturnValue;
+}
+
+/****************************************************************************/
+/**
+*
+* Updates the current control setting for the indicated signal/output with
+* the provided value.
+*
+* Performs a read/modify/write cycle to update the value correctly.
+* The register referenced is the Counter Control Register (XWDTPS_CCR_OFFSET)
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+* @param	Control is the desired signal/output.
+*		Valid Control Values are XWDTPS_CLK_PRESCALE and
+*		XWDTPS_COUNTER_RESET. Only one of them can be specified at a
+*		time.
+* @param	Value is the desired control value.
+*		If the Control is XWDTPS_CLK_PRESCALE then use the
+*		defintions XWDTEPB_CCR_PSCALE_XXXX.
+*		If the Control is XWDTPS_COUNTER_RESET then the valid values
+*		are 0x0 to 0xFFF, this sets the counter restart value of the CCR
+*		register.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XWdtPs_SetControlValue(XWdtPs *InstancePtr, u8 Control, u32 Value)
+{
+	u32 Register;
+	u32 LocalValue = Value;
+
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+	Xil_AssertVoid((Control == XWDTPS_CLK_PRESCALE) ||
+			(Control == XWDTPS_COUNTER_RESET));
+
+	/*
+	 * Read the contents of the CCR register.
+	 */
+	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,
+				 XWDTPS_CCR_OFFSET);
+
+	if (Control == XWDTPS_CLK_PRESCALE) {
+		/*
+		 * Zero the field in the register.
+		 */
+		Register &= (u32)(~XWDTPS_CCR_CLKSEL_MASK);
+
+	} else if (Control == XWDTPS_COUNTER_RESET) {
+		/*
+		 * Zero the field in the register.
+		 */
+		Register &= (u32)(~XWDTPS_CCR_CRV_MASK);
+
+		/*
+		 * Shift Value over to the proper positions.
+		 */
+		LocalValue = LocalValue << XWDTPS_CCR_CRV_SHIFT;
+	} else{
+		/* This was made for misrac compliance. */
+		;
+	}
+
+	Register |= LocalValue;
+
+	/*
+	 * Set the access key so the write takes.
+	 */
+	Register |= XWDTPS_CCR_CKEY_VAL;
+
+	/*
+	 * Update the CCR with the new value.
+	 */
+	XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_CCR_OFFSET,
+			  Register);
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps.h b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps.h
new file mode 100644
index 0000000..58e5596
--- /dev/null
+++ b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps.h
@@ -0,0 +1,225 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xwdtps.h
+* @addtogroup wdtps_v3_0
+* @{
+* @details
+*
+* The Xilinx watchdog timer driver supports the Xilinx watchdog timer hardware.
+*
+* The Xilinx watchdog timer (WDT) driver supports the following features:
+*   - Both Interrupt driven and Polled mode
+*   - enabling and disabling the watchdog timer
+*   - restarting the watchdog.
+*   - initializing the most significant digit of the counter restart value.
+*   - multiple individually enabling/disabling outputs
+*
+* It is the responsibility of the application to provide an interrupt handler
+* for the watchdog timer and connect it to the interrupt system if interrupt
+* driven mode is desired.
+*
+* If interrupt is enabled, the watchdog timer device generates an interrupt
+* when the counter reaches zero.
+*
+* If the hardware interrupt signal is not connected/enabled, polled mode is the
+* only option (using IsWdtExpired) for the watchdog.
+*
+* The outputs from the WDT are individually enabled/disabled using
+* _EnableOutput()/_DisableOutput(). The clock divisor ratio and initial restart
+* value of the count is configurable using _SetControlValues().
+*
+* The reset condition of the hardware has the maximum initial count in the
+* Counter Reset Value (CRV) and the WDT is disabled with the reset enable
+* enabled and the reset length set to 32 clocks. i.e.
+* 
+*     register ZMR = 0x1C2
+*     register CCR = 0x3FC
+* 

+*
+* This driver is intended to be RTOS and processor independent. It works with
+* physical addresses only.  Any needs for dynamic memory management, threads
+* or thread mutual exclusion, virtual memory, or cache control must be
+* satisfied by the layer above this driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00a ecm/jz 01/15/10 First release
+* 1.01a asa    02/15/12 Added tcl file to generate xparameters
+* 1.02a  sg    07/15/12 Removed code/APIs related to  External Signal
+*						Length functionality for CR 658287
+*						Removed APIs XWdtPs_SetExternalSignalLength,
+*						XWdtPs_GetExternalSignalLength
+*						Modified the Self Test to use the Reset Length mask
+*						for CR 658287
+* 3.0	pkp	   12/09/14 Added support for Zynq Ultrascale Mp.Also
+*			modified code for MISRA-C:2012 compliance.
+*       ms     03/17/17 Added readme.txt file in examples folder for doxygen
+*                       generation.
+* 

+*
+******************************************************************************/
+#ifndef XWDTPS_H		/* prevent circular inclusions */
+#define XWDTPS_H		/* by using protection macros */
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xwdtps_hw.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * Choices for output selections for the device, used in
+ * XWdtPs_EnableOutput()/XWdtPs_DisableOutput() functions
+ */
+#define XWDTPS_RESET_SIGNAL	0x01U   /**< Reset signal request */
+#define XWDTPS_IRQ_SIGNAL	0x02U   /**< IRQ signal request */
+
+/*
+ * Control value setting flags, used in
+ * XWdtPs_SetControlValues()/XWdtPs_GetControlValues() functions
+ */
+#define XWDTPS_CLK_PRESCALE		0x01U   /**< Clock Prescale request */
+#define XWDTPS_COUNTER_RESET	0x02U   /**< Counter Reset request */
+
+/**************************** Type Definitions *******************************/
+
+/**
+ * This typedef contains configuration information for the device.
+ */
+typedef struct {
+	u16 DeviceId;		/**< Unique ID of device */
+	u32 BaseAddress;	/**< Base address of the device */
+} XWdtPs_Config;
+
+
+/**
+ * The XWdtPs driver instance data. The user is required to allocate a
+ * variable of this type for every watchdog/timer device in the system.
+ * A pointer to a variable of this type is then passed to the driver API
+ * functions.
+ */
+typedef struct {
+	XWdtPs_Config Config;   /**< Hardware Configuration */
+	u32 IsReady;		/**< Device is initialized and ready */
+	u32 IsStarted;		/**< Device watchdog timer is running */
+} XWdtPs;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+/****************************************************************************/
+/**
+*
+* Check if the watchdog timer has expired. This function is used for polled
+* mode and it is also used to check if the last reset was caused by the
+* watchdog timer.
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+*
+* @return
+*		- TRUE if the watchdog has expired.
+*		- FALSE if the watchdog has not expired.
+*
+* @note		C-style signature:
+*		int XWdtPs_IsWdtExpired(XWdtPs *InstancePtr)
+*
+******************************************************************************/
+#define XWdtPs_IsWdtExpired(InstancePtr)				  \
+((XWdtPs_ReadReg((InstancePtr)->Config.BaseAddress, XWDTPS_SR_OFFSET) & \
+   XWDTPS_SR_WDZ_MASK) == XWDTPS_SR_WDZ_MASK)
+
+
+/****************************************************************************/
+/**
+*
+* Restart the watchdog timer. An application needs to call this function
+* periodically to keep the timer from asserting the enabled output.
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XWdtPs_RestartWdt(XWdtPs *InstancePtr)
+*
+******************************************************************************/
+#define XWdtPs_RestartWdt(InstancePtr)					\
+	XWdtPs_WriteReg((InstancePtr)->Config.BaseAddress,		\
+		XWDTPS_RESTART_OFFSET, XWDTPS_RESTART_KEY_VAL)
+
+/************************** Function Prototypes ******************************/
+
+/*
+ * Lookup configuration in xwdtps_sinit.c.
+ */
+XWdtPs_Config *XWdtPs_LookupConfig(u16 DeviceId);
+
+/*
+ * Interface functions in xwdtps.c
+ */
+s32 XWdtPs_CfgInitialize(XWdtPs *InstancePtr,
+			XWdtPs_Config *ConfigPtr, u32 EffectiveAddress);
+
+void XWdtPs_Start(XWdtPs *InstancePtr);
+
+void XWdtPs_Stop(XWdtPs *InstancePtr);
+
+void XWdtPs_EnableOutput(XWdtPs *InstancePtr, u8 Signal);
+
+void XWdtPs_DisableOutput(XWdtPs *InstancePtr, u8 Signal);
+
+u32 XWdtPs_GetControlValue(XWdtPs *InstancePtr, u8 Control);
+
+void XWdtPs_SetControlValue(XWdtPs *InstancePtr, u8 Control, u32 Value);
+
+/*
+ * Self-test function in xwdttb_selftest.c.
+ */
+s32 XWdtPs_SelfTest(XWdtPs *InstancePtr);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/** @} */
diff --git a/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_g.c b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_g.c
new file mode 100644
index 0000000..62d3e6c
--- /dev/null
+++ b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_g.c
@@ -0,0 +1,63 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xwdtps.h"
+
+/*
+* The configuration table for devices
+*/
+
+XWdtPs_Config XWdtPs_ConfigTable[XPAR_XWDTPS_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_CSU_WDT_DEVICE_ID,
+		XPAR_PSU_CSU_WDT_BASEADDR
+	},
+	{
+		XPAR_PSU_WDT_0_DEVICE_ID,
+		XPAR_PSU_WDT_0_BASEADDR
+	},
+	{
+		XPAR_PSU_WDT_1_DEVICE_ID,
+		XPAR_PSU_WDT_1_BASEADDR
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_hw.h b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_hw.h
new file mode 100644
index 0000000..4b5a3df
--- /dev/null
+++ b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_hw.h
@@ -0,0 +1,193 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xwdtps_hw.h
+* @addtogroup wdtps_v3_0
+* @{
+*
+* This file contains the hardware interface to the System Watch Dog Timer (WDT).
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------
+* 1.00a ecm/jz 01/15/10 First release
+* 1.02a  sg    07/15/12 Removed defines related to  External Signal
+*			Length functionality for CR 658287
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+#ifndef XWDTPS_HW_H		/* prevent circular inclusions */
+#define XWDTPS_HW_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Register Map
+ * Offsets of registers from the start of the device
+ * @{
+ */
+
+#define XWDTPS_ZMR_OFFSET	0x00000000U /**< Zero Mode Register */
+#define XWDTPS_CCR_OFFSET	0x00000004U /**< Counter Control Register */
+#define XWDTPS_RESTART_OFFSET	0x00000008U /**< Restart Register */
+#define XWDTPS_SR_OFFSET	0x0000000CU /**< Status Register */
+/* @} */
+
+
+/** @name Zero Mode Register
+ * This register controls how the time out is indicated and also contains
+ * the access code (0xABC) to allow writes to the register
+ * @{
+ */
+#define XWDTPS_ZMR_WDEN_MASK	0x00000001U /**< enable the WDT */
+#define XWDTPS_ZMR_RSTEN_MASK	0x00000002U /**< enable the reset output */
+#define XWDTPS_ZMR_IRQEN_MASK	0x00000004U /**< enable the IRQ output */
+
+#define XWDTPS_ZMR_RSTLN_MASK	0x00000070U /**< set length of reset pulse */
+#define XWDTPS_ZMR_RSTLN_SHIFT	4U	   /**< shift for reset pulse */
+
+#define XWDTPS_ZMR_IRQLN_MASK	0x00000180U /**< set length of interrupt pulse */
+#define XWDTPS_ZMR_IRQLN_SHIFT	7U	   /**< shift for interrupt pulse */
+
+#define XWDTPS_ZMR_ZKEY_MASK	0x00FFF000U /**< mask for writing access key */
+#define XWDTPS_ZMR_ZKEY_VAL		0x00ABC000U /**< access key, 0xABC << 12 */
+
+/* @} */
+
+/** @name  Counter Control register
+ * This register controls how fast the timer runs and the reset value
+ * and also contains the access code (0x248) to allow writes to the
+ * register
+ * @{
+ */
+
+#define XWDTPS_CCR_CLKSEL_MASK	0x00000003U /**< counter clock prescale */
+
+#define XWDTPS_CCR_CRV_MASK	0x00003FFCU /**< counter reset value */
+#define XWDTPS_CCR_CRV_SHIFT	2U	   /**< shift for writing value */
+
+#define XWDTPS_CCR_CKEY_MASK	0x03FFC000U /**< mask for writing access key */
+#define XWDTPS_CCR_CKEY_VAL	0x00920000U /**< access key, 0x248 << 14 */
+
+/* Bit patterns for Clock prescale divider values */
+
+#define XWDTPS_CCR_PSCALE_0008  0x00000000U /**< divide clock by 8 */
+#define XWDTPS_CCR_PSCALE_0064  0x00000001U /**< divide clock by 64 */
+#define XWDTPS_CCR_PSCALE_0512  0x00000002U /**< divide clock by 512 */
+#define XWDTPS_CCR_PSCALE_4096  0x00000003U /**< divide clock by 4096 */
+
+/* @} */
+
+/** @name  Restart register
+ * This register resets the timer preventing a timeout. Value is specific
+ * 0x1999
+ * @{
+ */
+
+#define XWDTPS_RESTART_KEY_VAL	0x00001999U /**< valid key */
+
+/*@}*/
+
+/** @name Status register
+ * This register indicates timer reached zero count.
+ * @{
+ */
+#define XWDTPS_SR_WDZ_MASK	0x00000001U /**< time out occurred */
+
+/*@}*/
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/****************************************************************************/
+/**
+*
+* Read the given register.
+*
+* @param	BaseAddress is the base address of the device
+* @param	RegOffset is the register offset to be read
+*
+* @return	The 32-bit value of the register
+*
+* @note		C-style signature:
+*		u32 XWdtPs_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+*****************************************************************************/
+#define XWdtPs_ReadReg(BaseAddress, RegOffset) \
+	Xil_In32((BaseAddress) + (u32)(RegOffset))
+
+/****************************************************************************/
+/**
+*
+* Write the given register.
+*
+* @param	BaseAddress is the base address of the device
+* @param	RegOffset is the register offset to be written
+* @param	Data is the 32-bit value to write to the register
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XWdtPs_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+*****************************************************************************/
+#define XWdtPs_WriteReg(BaseAddress, RegOffset, Data) \
+	Xil_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data))
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/** @} */
diff --git a/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_selftest.c b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_selftest.c
new file mode 100644
index 0000000..bcd5f35
--- /dev/null
+++ b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_selftest.c
@@ -0,0 +1,173 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xwdtps_selftest.c
+* @addtogroup wdtps_v3_0
+* @{
+*
+* Contains diagnostic self-test functions for the XWdtPs driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- --------------------------------------------
+* 1.00a ecm/jz 01/15/10 First release
+* 1.02a sg     08/01/12 Modified it use the Reset Length mask for the self
+*		        test for CR 658287
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xwdtps.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/****************************************************************************/
+/**
+*
+* Run a self-test on the timebase. This test verifies that the register access
+* locking functions. This is tested by trying to alter a register without
+* setting the key value and verifying that the register contents did not
+* change.
+*
+* @param	InstancePtr is a pointer to the XWdtPs instance.
+*
+* @return
+*		- XST_SUCCESS if self-test was successful.
+*		- XST_FAILURE if self-test was not successful.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XWdtPs_SelfTest(XWdtPs *InstancePtr)
+{
+	u32 ZmrOrig;
+	u32 ZmrValue1;
+	u32 ZmrValue2;
+	s32 Status;
+
+	/*
+	 * Assert to ensure the inputs are valid and the instance has been
+	 * initialized.
+	 */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
+
+	/*
+	 * Read the ZMR register at start the test.
+	 */
+	ZmrOrig = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,
+				 XWDTPS_ZMR_OFFSET);
+
+	/*
+	 * EX-OR in the length of the interrupt pulse,
+	 * do not set the key value.
+	 */
+	ZmrValue1 = ZmrOrig ^ (u32)XWDTPS_ZMR_RSTLN_MASK;
+
+
+	/*
+	 * Try to write to register w/o key value then read back.
+	 */
+	XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_ZMR_OFFSET,
+			  ZmrValue1);
+
+	ZmrValue2 =	XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,
+				 XWDTPS_ZMR_OFFSET);
+
+	if (ZmrValue1 == ZmrValue2) {
+		/*
+		 * If the values match, the hw failed the test,
+		 * return orig register value.
+		 */
+		XWdtPs_WriteReg(InstancePtr->Config.BaseAddress,
+				  XWDTPS_ZMR_OFFSET,
+				  (ZmrOrig | (u32)XWDTPS_ZMR_ZKEY_VAL));
+		Status = XST_FAILURE;
+	} else {
+
+
+		/*
+		 * Try to write to register with key value then read back.
+		 */
+		XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_ZMR_OFFSET,
+				  (ZmrValue1 | XWDTPS_ZMR_ZKEY_VAL));
+
+		ZmrValue2 =	XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,
+					 XWDTPS_ZMR_OFFSET);
+
+		if (ZmrValue1 != ZmrValue2) {
+			/*
+			 * If the values do not match, the hw failed the test,
+			 * return orig register value.
+			 */
+			XWdtPs_WriteReg(InstancePtr->Config.BaseAddress,
+					  XWDTPS_ZMR_OFFSET,
+					  ZmrOrig | XWDTPS_ZMR_ZKEY_VAL);
+			Status = XST_FAILURE;
+
+		} else {
+
+			/*
+			 * The hardware locking feature is functional, return the original value
+			 * and return success.
+			 */
+			XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_ZMR_OFFSET,
+					  ZmrOrig | XWDTPS_ZMR_ZKEY_VAL);
+
+			Status = XST_SUCCESS;
+		}
+	}
+	return Status;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_sinit.c b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_sinit.c
new file mode 100644
index 0000000..f468c99
--- /dev/null
+++ b/src/Xilinx/libsrc/wdtps_v3_0/src/xwdtps_sinit.c
@@ -0,0 +1,96 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xwdtps_sinit.c
+* @addtogroup wdtps_v3_0
+* @{
+*
+* This file contains method for static initialization (compile-time) of the
+* driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ----------------------------------------------
+* 1.00a ecm/jz 01/15/10 First release
+* 3.00  kvn    02/13/15 Modified code for MISRA-C:2012 compliance.
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xwdtps.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*************************** Variable Definitions ****************************/
+extern XWdtPs_Config XWdtPs_ConfigTable[XPAR_XWDTPS_NUM_INSTANCES];
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+* Lookup the device configuration based on the unique device ID. The table
+* contains the configuration info for each device in the system.
+*
+* @param	DeviceId is the unique device ID of the device being looked up.
+*
+* @return	A pointer to the configuration table entry corresponding to the
+*		given device ID, or NULL if no match is found.
+*
+* @note		None.
+*
+******************************************************************************/
+XWdtPs_Config *XWdtPs_LookupConfig(u16 DeviceId)
+{
+	XWdtPs_Config *CfgPtr = NULL;
+	u32 Index;
+
+	for (Index = 0U; Index < (u32)XPAR_XWDTPS_NUM_INSTANCES; Index++) {
+		if (XWdtPs_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XWdtPs_ConfigTable[Index];
+			break;
+		}
+	}
+	return (XWdtPs_Config *)CfgPtr;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/xilffs_v3_8/src/Makefile b/src/Xilinx/libsrc/xilffs_v3_8/src/Makefile
new file mode 100644
index 0000000..745fdb7
--- /dev/null
+++ b/src/Xilinx/libsrc/xilffs_v3_8/src/Makefile
@@ -0,0 +1,83 @@
+###############################################################################
+#
+# Copyright (C) 2013 - 2015 Xilinx, Inc.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Use of the Software is limited solely to applications:
+# (a) running on a Xilinx device, or
+# (b) that interact with a Xilinx device through a bus or interconnect.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+# XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Except as contained in this notice, the name of the Xilinx shall not be used
+# in advertising or otherwise to promote the sale, use or other dealings in
+# this Software without prior written authorization from Xilinx.
+#
+###############################################################################
+
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS =
+LIB=libxilffs.a
+
+ifeq ($(notdir $(COMPILER)) , iccarm)
+	EXTRA_ARCHIVE_FLAGS=--create
+else
+ifeq ($(notdir $(COMPILER)) , armcc)
+	EXTRA_ARCHIVE_FLAGS=--create
+else
+	EXTRA_ARCHIVE_FLAGS=rc
+endif
+endif
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+FATFS_DIR = .
+OUTS = *.o
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+FATFS_SRCS := $(wildcard *.c)
+FATFS_OBJS = $(addprefix $(FATFS_DIR)/, $(FATFS_SRCS:%.c=%.o))
+
+INCLUDEFILES=$(FATFS_DIR)/include/ff.h \
+			$(FATFS_DIR)/include/ffconf.h \
+			$(FATFS_DIR)/include/diskio.h \
+			$(FATFS_DIR)/include/integer.h
+
+libs: libxilffs.a
+
+libxilffs.a: print_msg_fatfs $(FATFS_OBJS)
+	$(ARCHIVER) $(EXTRA_ARCHIVE_FLAGS) ${RELEASEDIR}/${LIB} ${FATFS_OBJS}
+
+print_msg_fatfs:
+	@echo "Compiling XilFFs Library"
+
+.PHONY: include
+include: libxilffs_includes
+
+libxilffs_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf $(FATFS_DIR)/${OBJECTS}
+	rm -rf ${RELEASEDIR}/${LIB}
+
+$(FATFS_DIR)/%.o: $(FATFS_DIR)/%.c $(INCLUDEFILES)
+	$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) -c $< -o $@
diff --git a/src/Xilinx/libsrc/xilffs_v3_8/src/cc932.c b/src/Xilinx/libsrc/xilffs_v3_8/src/cc932.c
new file mode 100644
index 0000000..91a0534
--- /dev/null
+++ b/src/Xilinx/libsrc/xilffs_v3_8/src/cc932.c
@@ -0,0 +1,3801 @@
+/*------------------------------------------------------------------------*/
+/* Unicode - OEM code bidirectional converter  (C)ChaN, 2009              */
+/*                                                                        */
+/* CP932 (Japanese Shift-JIS)                                             */
+/*------------------------------------------------------------------------*/
+#include "xparameters.h"
+
+#ifdef FILE_SYSTEM_USE_LFN
+#include "ff.h"
+
+#define _TINY_TABLE	0
+
+#if !_USE_LFN || _CODE_PAGE != 932
+#error This file is not needed in current configuration. Remove from the project.
+#endif
+
+
+static
+const WCHAR uni2sjis[] = {
+/*  Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, */
+	0x00A7, 0x8198, 0x00A8, 0x814E, 0x00B0, 0x818B, 0x00B1, 0x817D,
+	0x00B4, 0x814C, 0x00B6, 0x81F7, 0x00D7, 0x817E, 0x00F7, 0x8180,
+	0x0391, 0x839F, 0x0392, 0x83A0, 0x0393, 0x83A1, 0x0394, 0x83A2,
+	0x0395, 0x83A3, 0x0396, 0x83A4, 0x0397, 0x83A5, 0x0398, 0x83A6,
+	0x0399, 0x83A7, 0x039A, 0x83A8, 0x039B, 0x83A9, 0x039C, 0x83AA,
+	0x039D, 0x83AB, 0x039E, 0x83AC, 0x039F, 0x83AD, 0x03A0, 0x83AE,
+	0x03A1, 0x83AF, 0x03A3, 0x83B0, 0x03A4, 0x83B1, 0x03A5, 0x83B2,
+	0x03A6, 0x83B3, 0x03A7, 0x83B4, 0x03A8, 0x83B5, 0x03A9, 0x83B6,
+	0x03B1, 0x83BF, 0x03B2, 0x83C0, 0x03B3, 0x83C1, 0x03B4, 0x83C2,
+	0x03B5, 0x83C3, 0x03B6, 0x83C4, 0x03B7, 0x83C5, 0x03B8, 0x83C6,
+	0x03B9, 0x83C7, 0x03BA, 0x83C8, 0x03BB, 0x83C9, 0x03BC, 0x83CA,
+	0x03BD, 0x83CB, 0x03BE, 0x83CC, 0x03BF, 0x83CD, 0x03C0, 0x83CE,
+	0x03C1, 0x83CF, 0x03C3, 0x83D0, 0x03C4, 0x83D1, 0x03C5, 0x83D2,
+	0x03C6, 0x83D3, 0x03C7, 0x83D4, 0x03C8, 0x83D5, 0x03C9, 0x83D6,
+	0x0401, 0x8446, 0x0410, 0x8440, 0x0411, 0x8441, 0x0412, 0x8442,
+	0x0413, 0x8443, 0x0414, 0x8444, 0x0415, 0x8445, 0x0416, 0x8447,
+	0x0417, 0x8448, 0x0418, 0x8449, 0x0419, 0x844A, 0x041A, 0x844B,
+	0x041B, 0x844C, 0x041C, 0x844D, 0x041D, 0x844E, 0x041E, 0x844F,
+	0x041F, 0x8450, 0x0420, 0x8451, 0x0421, 0x8452, 0x0422, 0x8453,
+	0x0423, 0x8454, 0x0424, 0x8455, 0x0425, 0x8456, 0x0426, 0x8457,
+	0x0427, 0x8458, 0x0428, 0x8459, 0x0429, 0x845A, 0x042A, 0x845B,
+	0x042B, 0x845C, 0x042C, 0x845D, 0x042D, 0x845E, 0x042E, 0x845F,
+	0x042F, 0x8460, 0x0430, 0x8470, 0x0431, 0x8471, 0x0432, 0x8472,
+	0x0433, 0x8473, 0x0434, 0x8474, 0x0435, 0x8475, 0x0436, 0x8477,
+	0x0437, 0x8478, 0x0438, 0x8479, 0x0439, 0x847A, 0x043A, 0x847B,
+	0x043B, 0x847C, 0x043C, 0x847D, 0x043D, 0x847E, 0x043E, 0x8480,
+	0x043F, 0x8481, 0x0440, 0x8482, 0x0441, 0x8483, 0x0442, 0x8484,
+	0x0443, 0x8485, 0x0444, 0x8486, 0x0445, 0x8487, 0x0446, 0x8488,
+	0x0447, 0x8489, 0x0448, 0x848A, 0x0449, 0x848B, 0x044A, 0x848C,
+	0x044B, 0x848D, 0x044C, 0x848E, 0x044D, 0x848F, 0x044E, 0x8490,
+	0x044F, 0x8491, 0x0451, 0x8476, 0x2010, 0x815D, 0x2015, 0x815C,
+	0x2018, 0x8165, 0x2019, 0x8166, 0x201C, 0x8167, 0x201D, 0x8168,
+	0x2020, 0x81F5, 0x2021, 0x81F6, 0x2025, 0x8164, 0x2026, 0x8163,
+	0x2030, 0x81F1, 0x2032, 0x818C, 0x2033, 0x818D, 0x203B, 0x81A6,
+	0x2103, 0x818E, 0x2116, 0x8782, 0x2121, 0x8784, 0x212B, 0x81F0,
+	0x2160, 0x8754, 0x2161, 0x8755, 0x2162, 0x8756, 0x2163, 0x8757,
+	0x2164, 0x8758, 0x2165, 0x8759, 0x2166, 0x875A, 0x2167, 0x875B,
+	0x2168, 0x875C, 0x2169, 0x875D, 0x2170, 0xFA40, 0x2171, 0xFA41,
+	0x2172, 0xFA42, 0x2173, 0xFA43, 0x2174, 0xFA44, 0x2175, 0xFA45,
+	0x2176, 0xFA46, 0x2177, 0xFA47, 0x2178, 0xFA48, 0x2179, 0xFA49,
+	0x2190, 0x81A9, 0x2191, 0x81AA, 0x2192, 0x81A8, 0x2193, 0x81AB,
+	0x21D2, 0x81CB, 0x21D4, 0x81CC, 0x2200, 0x81CD, 0x2202, 0x81DD,
+	0x2203, 0x81CE, 0x2207, 0x81DE, 0x2208, 0x81B8, 0x220B, 0x81B9,
+	0x2211, 0x8794, 0x221A, 0x81E3, 0x221D, 0x81E5, 0x221E, 0x8187,
+	0x221F, 0x8798, 0x2220, 0x81DA, 0x2225, 0x8161, 0x2227, 0x81C8,
+	0x2228, 0x81C9, 0x2229, 0x81BF, 0x222A, 0x81BE, 0x222B, 0x81E7,
+	0x222C, 0x81E8, 0x222E, 0x8793, 0x2234, 0x8188, 0x2235, 0x81E6,
+	0x223D, 0x81E4, 0x2252, 0x81E0, 0x2260, 0x8182, 0x2261, 0x81DF,
+	0x2266, 0x8185, 0x2267, 0x8186, 0x226A, 0x81E1, 0x226B, 0x81E2,
+	0x2282, 0x81BC, 0x2283, 0x81BD, 0x2286, 0x81BA, 0x2287, 0x81BB,
+	0x22A5, 0x81DB, 0x22BF, 0x8799, 0x2312, 0x81DC, 0x2460, 0x8740,
+	0x2461, 0x8741, 0x2462, 0x8742, 0x2463, 0x8743, 0x2464, 0x8744,
+	0x2465, 0x8745, 0x2466, 0x8746, 0x2467, 0x8747, 0x2468, 0x8748,
+	0x2469, 0x8749, 0x246A, 0x874A, 0x246B, 0x874B, 0x246C, 0x874C,
+	0x246D, 0x874D, 0x246E, 0x874E, 0x246F, 0x874F, 0x2470, 0x8750,
+	0x2471, 0x8751, 0x2472, 0x8752, 0x2473, 0x8753, 0x2500, 0x849F,
+	0x2501, 0x84AA, 0x2502, 0x84A0, 0x2503, 0x84AB, 0x250C, 0x84A1,
+	0x250F, 0x84AC, 0x2510, 0x84A2, 0x2513, 0x84AD, 0x2514, 0x84A4,
+	0x2517, 0x84AF, 0x2518, 0x84A3, 0x251B, 0x84AE, 0x251C, 0x84A5,
+	0x251D, 0x84BA, 0x2520, 0x84B5, 0x2523, 0x84B0, 0x2524, 0x84A7,
+	0x2525, 0x84BC, 0x2528, 0x84B7, 0x252B, 0x84B2, 0x252C, 0x84A6,
+	0x252F, 0x84B6, 0x2530, 0x84BB, 0x2533, 0x84B1, 0x2534, 0x84A8,
+	0x2537, 0x84B8, 0x2538, 0x84BD, 0x253B, 0x84B3, 0x253C, 0x84A9,
+	0x253F, 0x84B9, 0x2542, 0x84BE, 0x254B, 0x84B4, 0x25A0, 0x81A1,
+	0x25A1, 0x81A0, 0x25B2, 0x81A3, 0x25B3, 0x81A2, 0x25BC, 0x81A5,
+	0x25BD, 0x81A4, 0x25C6, 0x819F, 0x25C7, 0x819E, 0x25CB, 0x819B,
+	0x25CE, 0x819D, 0x25CF, 0x819C, 0x25EF, 0x81FC, 0x2605, 0x819A,
+	0x2606, 0x8199, 0x2640, 0x818A, 0x2642, 0x8189, 0x266A, 0x81F4,
+	0x266D, 0x81F3, 0x266F, 0x81F2, 0x3000, 0x8140, 0x3001, 0x8141,
+	0x3002, 0x8142, 0x3003, 0x8156, 0x3005, 0x8158, 0x3006, 0x8159,
+	0x3007, 0x815A, 0x3008, 0x8171, 0x3009, 0x8172, 0x300A, 0x8173,
+	0x300B, 0x8174, 0x300C, 0x8175, 0x300D, 0x8176, 0x300E, 0x8177,
+	0x300F, 0x8178, 0x3010, 0x8179, 0x3011, 0x817A, 0x3012, 0x81A7,
+	0x3013, 0x81AC, 0x3014, 0x816B, 0x3015, 0x816C, 0x301D, 0x8780,
+	0x301F, 0x8781, 0x3041, 0x829F, 0x3042, 0x82A0, 0x3043, 0x82A1,
+	0x3044, 0x82A2, 0x3045, 0x82A3, 0x3046, 0x82A4, 0x3047, 0x82A5,
+	0x3048, 0x82A6, 0x3049, 0x82A7, 0x304A, 0x82A8, 0x304B, 0x82A9,
+	0x304C, 0x82AA, 0x304D, 0x82AB, 0x304E, 0x82AC, 0x304F, 0x82AD,
+	0x3050, 0x82AE, 0x3051, 0x82AF, 0x3052, 0x82B0, 0x3053, 0x82B1,
+	0x3054, 0x82B2, 0x3055, 0x82B3, 0x3056, 0x82B4, 0x3057, 0x82B5,
+	0x3058, 0x82B6, 0x3059, 0x82B7, 0x305A, 0x82B8, 0x305B, 0x82B9,
+	0x305C, 0x82BA, 0x305D, 0x82BB, 0x305E, 0x82BC, 0x305F, 0x82BD,
+	0x3060, 0x82BE, 0x3061, 0x82BF, 0x3062, 0x82C0, 0x3063, 0x82C1,
+	0x3064, 0x82C2, 0x3065, 0x82C3, 0x3066, 0x82C4, 0x3067, 0x82C5,
+	0x3068, 0x82C6, 0x3069, 0x82C7, 0x306A, 0x82C8, 0x306B, 0x82C9,
+	0x306C, 0x82CA, 0x306D, 0x82CB, 0x306E, 0x82CC, 0x306F, 0x82CD,
+	0x3070, 0x82CE, 0x3071, 0x82CF, 0x3072, 0x82D0, 0x3073, 0x82D1,
+	0x3074, 0x82D2, 0x3075, 0x82D3, 0x3076, 0x82D4, 0x3077, 0x82D5,
+	0x3078, 0x82D6, 0x3079, 0x82D7, 0x307A, 0x82D8, 0x307B, 0x82D9,
+	0x307C, 0x82DA, 0x307D, 0x82DB, 0x307E, 0x82DC, 0x307F, 0x82DD,
+	0x3080, 0x82DE, 0x3081, 0x82DF, 0x3082, 0x82E0, 0x3083, 0x82E1,
+	0x3084, 0x82E2, 0x3085, 0x82E3, 0x3086, 0x82E4, 0x3087, 0x82E5,
+	0x3088, 0x82E6, 0x3089, 0x82E7, 0x308A, 0x82E8, 0x308B, 0x82E9,
+	0x308C, 0x82EA, 0x308D, 0x82EB, 0x308E, 0x82EC, 0x308F, 0x82ED,
+	0x3090, 0x82EE, 0x3091, 0x82EF, 0x3092, 0x82F0, 0x3093, 0x82F1,
+	0x309B, 0x814A, 0x309C, 0x814B, 0x309D, 0x8154,
+	0x309E, 0x8155, 0x30A1, 0x8340, 0x30A2, 0x8341, 0x30A3, 0x8342,
+	0x30A4, 0x8343, 0x30A5, 0x8344, 0x30A6, 0x8345, 0x30A7, 0x8346,
+	0x30A8, 0x8347, 0x30A9, 0x8348, 0x30AA, 0x8349, 0x30AB, 0x834A,
+	0x30AC, 0x834B, 0x30AD, 0x834C, 0x30AE, 0x834D, 0x30AF, 0x834E,
+	0x30B0, 0x834F, 0x30B1, 0x8350, 0x30B2, 0x8351, 0x30B3, 0x8352,
+	0x30B4, 0x8353, 0x30B5, 0x8354, 0x30B6, 0x8355, 0x30B7, 0x8356,
+	0x30B8, 0x8357, 0x30B9, 0x8358, 0x30BA, 0x8359, 0x30BB, 0x835A,
+	0x30BC, 0x835B, 0x30BD, 0x835C, 0x30BE, 0x835D, 0x30BF, 0x835E,
+	0x30C0, 0x835F, 0x30C1, 0x8360, 0x30C2, 0x8361, 0x30C3, 0x8362,
+	0x30C4, 0x8363, 0x30C5, 0x8364, 0x30C6, 0x8365, 0x30C7, 0x8366,
+	0x30C8, 0x8367, 0x30C9, 0x8368, 0x30CA, 0x8369, 0x30CB, 0x836A,
+	0x30CC, 0x836B, 0x30CD, 0x836C, 0x30CE, 0x836D, 0x30CF, 0x836E,
+	0x30D0, 0x836F, 0x30D1, 0x8370, 0x30D2, 0x8371, 0x30D3, 0x8372,
+	0x30D4, 0x8373, 0x30D5, 0x8374, 0x30D6, 0x8375, 0x30D7, 0x8376,
+	0x30D8, 0x8377, 0x30D9, 0x8378, 0x30DA, 0x8379, 0x30DB, 0x837A,
+	0x30DC, 0x837B, 0x30DD, 0x837C, 0x30DE, 0x837D, 0x30DF, 0x837E,
+	0x30E0, 0x8380, 0x30E1, 0x8381, 0x30E2, 0x8382, 0x30E3, 0x8383,
+	0x30E4, 0x8384, 0x30E5, 0x8385, 0x30E6, 0x8386, 0x30E7, 0x8387,
+	0x30E8, 0x8388, 0x30E9, 0x8389, 0x30EA, 0x838A, 0x30EB, 0x838B,
+	0x30EC, 0x838C, 0x30ED, 0x838D, 0x30EE, 0x838E, 0x30EF, 0x838F,
+	0x30F0, 0x8390, 0x30F1, 0x8391, 0x30F2, 0x8392, 0x30F3, 0x8393,
+	0x30F4, 0x8394, 0x30F5, 0x8395, 0x30F6, 0x8396, 0x30FB, 0x8145,
+	0x30FC, 0x815B, 0x30FD, 0x8152, 0x30FE, 0x8153, 0x3231, 0x878A,
+	0x3232, 0x878B, 0x3239, 0x878C, 0x32A4, 0x8785, 0x32A5, 0x8786,
+	0x32A6, 0x8787, 0x32A7, 0x8788, 0x32A8, 0x8789, 0x3303, 0x8765,
+	0x330D, 0x8769, 0x3314, 0x8760, 0x3318, 0x8763, 0x3322, 0x8761,
+	0x3323, 0x876B, 0x3326, 0x876A, 0x3327, 0x8764, 0x332B, 0x876C,
+	0x3336, 0x8766, 0x333B, 0x876E, 0x3349, 0x875F, 0x334A, 0x876D,
+	0x334D, 0x8762, 0x3351, 0x8767, 0x3357, 0x8768, 0x337B, 0x877E,
+	0x337C, 0x878F, 0x337D, 0x878E, 0x337E, 0x878D, 0x338E, 0x8772,
+	0x338F, 0x8773, 0x339C, 0x876F, 0x339D, 0x8770, 0x339E, 0x8771,
+	0x33A1, 0x8775, 0x33C4, 0x8774, 0x33CD, 0x8783, 0x4E00, 0x88EA,
+	0x4E01, 0x929A, 0x4E03, 0x8EB5, 0x4E07, 0x969C, 0x4E08, 0x8FE4,
+	0x4E09, 0x8E4F, 0x4E0A, 0x8FE3, 0x4E0B, 0x89BA, 0x4E0D, 0x9573,
+	0x4E0E, 0x975E, 0x4E10, 0x98A0, 0x4E11, 0x894E, 0x4E14, 0x8A8E,
+	0x4E15, 0x98A1, 0x4E16, 0x90A2, 0x4E17, 0x99C0, 0x4E18, 0x8B75,
+	0x4E19, 0x95B8, 0x4E1E, 0x8FE5, 0x4E21, 0x97BC, 0x4E26, 0x95C0,
+	0x4E28, 0xFA68, 0x4E2A, 0x98A2, 0x4E2D, 0x9286, 0x4E31, 0x98A3,
+	0x4E32, 0x8BF8, 0x4E36, 0x98A4, 0x4E38, 0x8ADB, 0x4E39, 0x924F,
+	0x4E3B, 0x8EE5, 0x4E3C, 0x98A5, 0x4E3F, 0x98A6, 0x4E42, 0x98A7,
+	0x4E43, 0x9454, 0x4E45, 0x8B76, 0x4E4B, 0x9456, 0x4E4D, 0x93E1,
+	0x4E4E, 0x8CC1, 0x4E4F, 0x9652, 0x4E55, 0xE568, 0x4E56, 0x98A8,
+	0x4E57, 0x8FE6, 0x4E58, 0x98A9, 0x4E59, 0x89B3, 0x4E5D, 0x8BE3,
+	0x4E5E, 0x8CEE, 0x4E5F, 0x96E7, 0x4E62, 0x9BA4, 0x4E71, 0x9790,
+	0x4E73, 0x93FB, 0x4E7E, 0x8AA3, 0x4E80, 0x8B54, 0x4E82, 0x98AA,
+	0x4E85, 0x98AB, 0x4E86, 0x97B9, 0x4E88, 0x975C, 0x4E89, 0x9188,
+	0x4E8A, 0x98AD, 0x4E8B, 0x8E96, 0x4E8C, 0x93F1, 0x4E8E, 0x98B0,
+	0x4E91, 0x895D, 0x4E92, 0x8CDD, 0x4E94, 0x8CDC, 0x4E95, 0x88E4,
+	0x4E98, 0x986A, 0x4E99, 0x9869, 0x4E9B, 0x8DB1, 0x4E9C, 0x889F,
+	0x4E9E, 0x98B1, 0x4E9F, 0x98B2, 0x4EA0, 0x98B3, 0x4EA1, 0x9653,
+	0x4EA2, 0x98B4, 0x4EA4, 0x8CF0, 0x4EA5, 0x88E5, 0x4EA6, 0x9692,
+	0x4EA8, 0x8B9C, 0x4EAB, 0x8B9D, 0x4EAC, 0x8B9E, 0x4EAD, 0x92E0,
+	0x4EAE, 0x97BA, 0x4EB0, 0x98B5, 0x4EB3, 0x98B6, 0x4EB6, 0x98B7,
+	0x4EBA, 0x906C, 0x4EC0, 0x8F59, 0x4EC1, 0x906D, 0x4EC2, 0x98BC,
+	0x4EC4, 0x98BA, 0x4EC6, 0x98BB, 0x4EC7, 0x8B77, 0x4ECA, 0x8DA1,
+	0x4ECB, 0x89EE, 0x4ECD, 0x98B9, 0x4ECE, 0x98B8, 0x4ECF, 0x95A7,
+	0x4ED4, 0x8E65, 0x4ED5, 0x8E64, 0x4ED6, 0x91BC, 0x4ED7, 0x98BD,
+	0x4ED8, 0x9574, 0x4ED9, 0x90E5, 0x4EDD, 0x8157, 0x4EDE, 0x98BE,
+	0x4EDF, 0x98C0, 0x4EE1, 0xFA69, 0x4EE3, 0x91E3, 0x4EE4, 0x97DF,
+	0x4EE5, 0x88C8, 0x4EED, 0x98BF, 0x4EEE, 0x89BC, 0x4EF0, 0x8BC2,
+	0x4EF2, 0x9287, 0x4EF6, 0x8C8F, 0x4EF7, 0x98C1, 0x4EFB, 0x9443,
+	0x4EFC, 0xFA6A, 0x4F00, 0xFA6B, 0x4F01, 0x8AE9, 0x4F03, 0xFA6C,
+	0x4F09, 0x98C2, 0x4F0A, 0x88C9, 0x4F0D, 0x8CDE, 0x4F0E, 0x8AEA,
+	0x4F0F, 0x959A, 0x4F10, 0x94B0, 0x4F11, 0x8B78, 0x4F1A, 0x89EF,
+	0x4F1C, 0x98E5, 0x4F1D, 0x9360, 0x4F2F, 0x948C, 0x4F30, 0x98C4,
+	0x4F34, 0x94BA, 0x4F36, 0x97E0, 0x4F38, 0x904C, 0x4F39, 0xFA6D,
+	0x4F3A, 0x8E66, 0x4F3C, 0x8E97, 0x4F3D, 0x89BE, 0x4F43, 0x92CF,
+	0x4F46, 0x9241, 0x4F47, 0x98C8, 0x4F4D, 0x88CA, 0x4F4E, 0x92E1,
+	0x4F4F, 0x8F5A, 0x4F50, 0x8DB2, 0x4F51, 0x9743, 0x4F53, 0x91CC,
+	0x4F55, 0x89BD, 0x4F56, 0xFA6E, 0x4F57, 0x98C7, 0x4F59, 0x975D,
+	0x4F5A, 0x98C3, 0x4F5B, 0x98C5, 0x4F5C, 0x8DEC, 0x4F5D, 0x98C6,
+	0x4F5E, 0x9B43, 0x4F69, 0x98CE, 0x4F6F, 0x98D1, 0x4F70, 0x98CF,
+	0x4F73, 0x89C0, 0x4F75, 0x95B9, 0x4F76, 0x98C9, 0x4F7B, 0x98CD,
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+	0x5634, 0x9A7B, 0x5636, 0x9A7C, 0x5638, 0x9A7E, 0x5642, 0x895C,
+	0x564C, 0x9158, 0x564E, 0x9A78, 0x5650, 0x9A79, 0x565B, 0x8A9A,
+	0x5664, 0x9A81, 0x5668, 0x8AED, 0x566A, 0x9A84, 0x566B, 0x9A80,
+	0x566C, 0x9A83, 0x5674, 0x95AC, 0x5678, 0x93D3, 0x567A, 0x94B6,
+	0x5680, 0x9A86, 0x5686, 0x9A85, 0x5687, 0x8A64, 0x568A, 0x9A87,
+	0x568F, 0x9A8A, 0x5694, 0x9A89, 0x56A0, 0x9A88, 0x56A2, 0x9458,
+	0x56A5, 0x9A8B, 0x56AE, 0x9A8C, 0x56B4, 0x9A8E, 0x56B6, 0x9A8D,
+	0x56BC, 0x9A90, 0x56C0, 0x9A93, 0x56C1, 0x9A91, 0x56C2, 0x9A8F,
+	0x56C3, 0x9A92, 0x56C8, 0x9A94, 0x56CE, 0x9A95, 0x56D1, 0x9A96,
+	0x56D3, 0x9A97, 0x56D7, 0x9A98, 0x56D8, 0x9964, 0x56DA, 0x8EFA,
+	0x56DB, 0x8E6C, 0x56DE, 0x89F1, 0x56E0, 0x88F6, 0x56E3, 0x9263,
+	0x56EE, 0x9A99, 0x56F0, 0x8DA2, 0x56F2, 0x88CD, 0x56F3, 0x907D,
+	0x56F9, 0x9A9A, 0x56FA, 0x8CC5, 0x56FD, 0x8D91, 0x56FF, 0x9A9C,
+	0x5700, 0x9A9B, 0x5703, 0x95DE, 0x5704, 0x9A9D, 0x5708, 0x9A9F,
+	0x5709, 0x9A9E, 0x570B, 0x9AA0, 0x570D, 0x9AA1, 0x570F, 0x8C97,
+	0x5712, 0x8980, 0x5713, 0x9AA2, 0x5716, 0x9AA4, 0x5718, 0x9AA3,
+	0x571C, 0x9AA6, 0x571F, 0x9379, 0x5726, 0x9AA7, 0x5727, 0x88B3,
+	0x5728, 0x8DDD, 0x572D, 0x8C5C, 0x5730, 0x926E, 0x5737, 0x9AA8,
+	0x5738, 0x9AA9, 0x573B, 0x9AAB, 0x5740, 0x9AAC, 0x5742, 0x8DE2,
+	0x5747, 0x8BCF, 0x574A, 0x9656, 0x574E, 0x9AAA, 0x574F, 0x9AAD,
+	0x5750, 0x8DBF, 0x5751, 0x8D42, 0x5759, 0xFA96, 0x5761, 0x9AB1,
+	0x5764, 0x8DA3, 0x5765, 0xFA97, 0x5766, 0x9252, 0x5769, 0x9AAE,
+	0x576A, 0x92D8, 0x577F, 0x9AB2, 0x5782, 0x9082, 0x5788, 0x9AB0,
+	0x5789, 0x9AB3, 0x578B, 0x8C5E, 0x5793, 0x9AB4, 0x57A0, 0x9AB5,
+	0x57A2, 0x8D43, 0x57A3, 0x8A5F, 0x57A4, 0x9AB7, 0x57AA, 0x9AB8,
+	0x57AC, 0xFA98, 0x57B0, 0x9AB9, 0x57B3, 0x9AB6, 0x57C0, 0x9AAF,
+	0x57C3, 0x9ABA, 0x57C6, 0x9ABB, 0x57C7, 0xFA9A, 0x57C8, 0xFA99,
+	0x57CB, 0x9684, 0x57CE, 0x8FE9, 0x57D2, 0x9ABD, 0x57D3, 0x9ABE,
+	0x57D4, 0x9ABC, 0x57D6, 0x9AC0, 0x57DC, 0x9457, 0x57DF, 0x88E6,
+	0x57E0, 0x9575, 0x57E3, 0x9AC1, 0x57F4, 0x8FFB, 0x57F7, 0x8EB7,
+	0x57F9, 0x947C, 0x57FA, 0x8AEE, 0x57FC, 0x8DE9, 0x5800, 0x9678,
+	0x5802, 0x93B0, 0x5805, 0x8C98, 0x5806, 0x91CD, 0x580A, 0x9ABF,
+	0x580B, 0x9AC2, 0x5815, 0x91C2, 0x5819, 0x9AC3, 0x581D, 0x9AC4,
+	0x5821, 0x9AC6, 0x5824, 0x92E7, 0x582A, 0x8AAC, 0x582F, 0xEA9F,
+	0x5830, 0x8981, 0x5831, 0x95F1, 0x5834, 0x8FEA, 0x5835, 0x9367,
+	0x583A, 0x8DE4, 0x583D, 0x9ACC, 0x5840, 0x95BB, 0x5841, 0x97DB,
+	0x584A, 0x89F2, 0x584B, 0x9AC8, 0x5851, 0x9159, 0x5852, 0x9ACB,
+	0x5854, 0x9383, 0x5857, 0x9368, 0x5858, 0x9384, 0x5859, 0x94B7,
+	0x585A, 0x92CB, 0x585E, 0x8DC7, 0x5862, 0x9AC7, 0x5869, 0x8996,
+	0x586B, 0x9355, 0x5870, 0x9AC9, 0x5872, 0x9AC5, 0x5875, 0x906F,
+	0x5879, 0x9ACD, 0x587E, 0x8F6D, 0x5883, 0x8BAB, 0x5885, 0x9ACE,
+	0x5893, 0x95E6, 0x5897, 0x919D, 0x589C, 0x92C4, 0x589E, 0xFA9D,
+	0x589F, 0x9AD0, 0x58A8, 0x966E, 0x58AB, 0x9AD1, 0x58AE, 0x9AD6,
+	0x58B2, 0xFA9E, 0x58B3, 0x95AD, 0x58B8, 0x9AD5, 0x58B9, 0x9ACF,
+	0x58BA, 0x9AD2, 0x58BB, 0x9AD4, 0x58BE, 0x8DA4, 0x58C1, 0x95C7,
+	0x58C5, 0x9AD7, 0x58C7, 0x9264, 0x58CA, 0x89F3, 0x58CC, 0x8FEB,
+	0x58D1, 0x9AD9, 0x58D3, 0x9AD8, 0x58D5, 0x8D88, 0x58D7, 0x9ADA,
+	0x58D8, 0x9ADC, 0x58D9, 0x9ADB, 0x58DC, 0x9ADE, 0x58DE, 0x9AD3,
+	0x58DF, 0x9AE0, 0x58E4, 0x9ADF, 0x58E5, 0x9ADD, 0x58EB, 0x8E6D,
+	0x58EC, 0x9070, 0x58EE, 0x9173, 0x58EF, 0x9AE1, 0x58F0, 0x90BA,
+	0x58F1, 0x88EB, 0x58F2, 0x9484, 0x58F7, 0x92D9, 0x58F9, 0x9AE3,
+	0x58FA, 0x9AE2, 0x58FB, 0x9AE4, 0x58FC, 0x9AE5, 0x58FD, 0x9AE6,
+	0x5902, 0x9AE7, 0x5909, 0x95CF, 0x590A, 0x9AE8, 0x590B, 0xFA9F,
+	0x590F, 0x89C4, 0x5910, 0x9AE9, 0x5915, 0x975B, 0x5916, 0x8A4F,
+	0x5918, 0x99C7, 0x5919, 0x8F67, 0x591A, 0x91BD, 0x591B, 0x9AEA,
+	0x591C, 0x96E9, 0x5922, 0x96B2, 0x5925, 0x9AEC, 0x5927, 0x91E5,
+	0x5929, 0x9356, 0x592A, 0x91BE, 0x592B, 0x9576, 0x592C, 0x9AED,
+	0x592D, 0x9AEE, 0x592E, 0x899B, 0x5931, 0x8EB8, 0x5932, 0x9AEF,
+	0x5937, 0x88CE, 0x5938, 0x9AF0, 0x593E, 0x9AF1, 0x5944, 0x8982,
+	0x5947, 0x8AEF, 0x5948, 0x93DE, 0x5949, 0x95F2, 0x594E, 0x9AF5,
+	0x594F, 0x9174, 0x5950, 0x9AF4, 0x5951, 0x8C5F, 0x5953, 0xFAA0,
+	0x5954, 0x967A, 0x5955, 0x9AF3, 0x5957, 0x9385, 0x5958, 0x9AF7,
+	0x595A, 0x9AF6, 0x595B, 0xFAA1, 0x595D, 0xFAA2, 0x5960, 0x9AF9,
+	0x5962, 0x9AF8, 0x5963, 0xFAA3, 0x5965, 0x899C, 0x5967, 0x9AFA,
+	0x5968, 0x8FA7, 0x5969, 0x9AFC, 0x596A, 0x9244, 0x596C, 0x9AFB,
+	0x596E, 0x95B1, 0x5973, 0x8F97, 0x5974, 0x937A, 0x5978, 0x9B40,
+	0x597D, 0x8D44, 0x5981, 0x9B41, 0x5982, 0x9440, 0x5983, 0x94DC,
+	0x5984, 0x96CF, 0x598A, 0x9444, 0x598D, 0x9B4A, 0x5993, 0x8B57,
+	0x5996, 0x9764, 0x5999, 0x96AD, 0x599B, 0x9BAA, 0x599D, 0x9B42,
+	0x59A3, 0x9B45, 0x59A4, 0xFAA4, 0x59A5, 0x91C3, 0x59A8, 0x9657,
+	0x59AC, 0x9369, 0x59B2, 0x9B46, 0x59B9, 0x9685, 0x59BA, 0xFAA5,
+	0x59BB, 0x8DC8, 0x59BE, 0x8FA8, 0x59C6, 0x9B47, 0x59C9, 0x8E6F,
+	0x59CB, 0x8E6E, 0x59D0, 0x88B7, 0x59D1, 0x8CC6, 0x59D3, 0x90A9,
+	0x59D4, 0x88CF, 0x59D9, 0x9B4B, 0x59DA, 0x9B4C, 0x59DC, 0x9B49,
+	0x59E5, 0x8957, 0x59E6, 0x8AAD, 0x59E8, 0x9B48, 0x59EA, 0x96C3,
+	0x59EB, 0x9550, 0x59F6, 0x88A6, 0x59FB, 0x88F7, 0x59FF, 0x8E70,
+	0x5A01, 0x88D0, 0x5A03, 0x88A1, 0x5A09, 0x9B51, 0x5A11, 0x9B4F,
+	0x5A18, 0x96BA, 0x5A1A, 0x9B52, 0x5A1C, 0x9B50, 0x5A1F, 0x9B4E,
+	0x5A20, 0x9050, 0x5A25, 0x9B4D, 0x5A29, 0x95D8, 0x5A2F, 0x8CE2,
+	0x5A35, 0x9B56, 0x5A36, 0x9B57, 0x5A3C, 0x8FA9, 0x5A40, 0x9B53,
+	0x5A41, 0x984B, 0x5A46, 0x946B, 0x5A49, 0x9B55, 0x5A5A, 0x8DA5,
+	0x5A62, 0x9B58, 0x5A66, 0x9577, 0x5A6A, 0x9B59, 0x5A6C, 0x9B54,
+	0x5A7F, 0x96B9, 0x5A92, 0x947D, 0x5A9A, 0x9B5A, 0x5A9B, 0x9551,
+	0x5ABC, 0x9B5B, 0x5ABD, 0x9B5F, 0x5ABE, 0x9B5C, 0x5AC1, 0x89C5,
+	0x5AC2, 0x9B5E, 0x5AC9, 0x8EB9, 0x5ACB, 0x9B5D, 0x5ACC, 0x8C99,
+	0x5AD0, 0x9B6B, 0x5AD6, 0x9B64, 0x5AD7, 0x9B61, 0x5AE1, 0x9284,
+	0x5AE3, 0x9B60, 0x5AE6, 0x9B62, 0x5AE9, 0x9B63, 0x5AFA, 0x9B65,
+	0x5AFB, 0x9B66, 0x5B09, 0x8AF0, 0x5B0B, 0x9B68, 0x5B0C, 0x9B67,
+	0x5B16, 0x9B69, 0x5B22, 0x8FEC, 0x5B2A, 0x9B6C, 0x5B2C, 0x92DA,
+	0x5B30, 0x8964, 0x5B32, 0x9B6A, 0x5B36, 0x9B6D, 0x5B3E, 0x9B6E,
+	0x5B40, 0x9B71, 0x5B43, 0x9B6F, 0x5B45, 0x9B70, 0x5B50, 0x8E71,
+	0x5B51, 0x9B72, 0x5B54, 0x8D45, 0x5B55, 0x9B73, 0x5B56, 0xFAA6,
+	0x5B57, 0x8E9A, 0x5B58, 0x91B6, 0x5B5A, 0x9B74, 0x5B5B, 0x9B75,
+	0x5B5C, 0x8E79, 0x5B5D, 0x8D46, 0x5B5F, 0x96D0, 0x5B63, 0x8B47,
+	0x5B64, 0x8CC7, 0x5B65, 0x9B76, 0x5B66, 0x8A77, 0x5B69, 0x9B77,
+	0x5B6B, 0x91B7, 0x5B70, 0x9B78, 0x5B71, 0x9BA1, 0x5B73, 0x9B79,
+	0x5B75, 0x9B7A, 0x5B78, 0x9B7B, 0x5B7A, 0x9B7D, 0x5B80, 0x9B7E,
+	0x5B83, 0x9B80, 0x5B85, 0x91EE, 0x5B87, 0x8946, 0x5B88, 0x8EE7,
+	0x5B89, 0x88C0, 0x5B8B, 0x9176, 0x5B8C, 0x8AAE, 0x5B8D, 0x8EB3,
+	0x5B8F, 0x8D47, 0x5B95, 0x9386, 0x5B97, 0x8F40, 0x5B98, 0x8AAF,
+	0x5B99, 0x9288, 0x5B9A, 0x92E8, 0x5B9B, 0x88B6, 0x5B9C, 0x8B58,
+	0x5B9D, 0x95F3, 0x5B9F, 0x8EC0, 0x5BA2, 0x8B71, 0x5BA3, 0x90E9,
+	0x5BA4, 0x8EBA, 0x5BA5, 0x9747, 0x5BA6, 0x9B81, 0x5BAE, 0x8B7B,
+	0x5BB0, 0x8DC9, 0x5BB3, 0x8A51, 0x5BB4, 0x8983, 0x5BB5, 0x8FAA,
+	0x5BB6, 0x89C6, 0x5BB8, 0x9B82, 0x5BB9, 0x9765, 0x5BBF, 0x8F68,
+	0x5BC0, 0xFAA7, 0x5BC2, 0x8EE2, 0x5BC3, 0x9B83, 0x5BC4, 0x8AF1,
+	0x5BC5, 0x93D0, 0x5BC6, 0x96A7, 0x5BC7, 0x9B84, 0x5BC9, 0x9B85,
+	0x5BCC, 0x9578, 0x5BD0, 0x9B87, 0x5BD2, 0x8AA6, 0x5BD3, 0x8BF5,
+	0x5BD4, 0x9B86, 0x5BD8, 0xFAA9, 0x5BDB, 0x8AB0, 0x5BDD, 0x9051,
+	0x5BDE, 0x9B8B, 0x5BDF, 0x8E40, 0x5BE1, 0x89C7, 0x5BE2, 0x9B8A,
+	0x5BE4, 0x9B88, 0x5BE5, 0x9B8C, 0x5BE6, 0x9B89, 0x5BE7, 0x944A,
+	0x5BE8, 0x9ECB, 0x5BE9, 0x9052, 0x5BEB, 0x9B8D, 0x5BEC, 0xFAAA,
+	0x5BEE, 0x97BE, 0x5BF0, 0x9B8E, 0x5BF3, 0x9B90, 0x5BF5, 0x929E,
+	0x5BF6, 0x9B8F, 0x5BF8, 0x90A1, 0x5BFA, 0x8E9B, 0x5BFE, 0x91CE,
+	0x5BFF, 0x8EF5, 0x5C01, 0x9595, 0x5C02, 0x90EA, 0x5C04, 0x8ECB,
+	0x5C05, 0x9B91, 0x5C06, 0x8FAB, 0x5C07, 0x9B92, 0x5C08, 0x9B93,
+	0x5C09, 0x88D1, 0x5C0A, 0x91B8, 0x5C0B, 0x9071, 0x5C0D, 0x9B94,
+	0x5C0E, 0x93B1, 0x5C0F, 0x8FAC, 0x5C11, 0x8FAD, 0x5C13, 0x9B95,
+	0x5C16, 0x90EB, 0x5C1A, 0x8FAE, 0x5C1E, 0xFAAB, 0x5C20, 0x9B96,
+	0x5C22, 0x9B97, 0x5C24, 0x96DE, 0x5C28, 0x9B98, 0x5C2D, 0x8BC4,
+	0x5C31, 0x8F41, 0x5C38, 0x9B99, 0x5C39, 0x9B9A, 0x5C3A, 0x8EDA,
+	0x5C3B, 0x904B, 0x5C3C, 0x93F2, 0x5C3D, 0x9073, 0x5C3E, 0x94F6,
+	0x5C3F, 0x9441, 0x5C40, 0x8BC7, 0x5C41, 0x9B9B, 0x5C45, 0x8B8F,
+	0x5C46, 0x9B9C, 0x5C48, 0x8BFC, 0x5C4A, 0x93CD, 0x5C4B, 0x89AE,
+	0x5C4D, 0x8E72, 0x5C4E, 0x9B9D, 0x5C4F, 0x9BA0, 0x5C50, 0x9B9F,
+	0x5C51, 0x8BFB, 0x5C53, 0x9B9E, 0x5C55, 0x9357, 0x5C5E, 0x91AE,
+	0x5C60, 0x936A, 0x5C61, 0x8EC6, 0x5C64, 0x9177, 0x5C65, 0x979A,
+	0x5C6C, 0x9BA2, 0x5C6E, 0x9BA3, 0x5C6F, 0x93D4, 0x5C71, 0x8E52,
+	0x5C76, 0x9BA5, 0x5C79, 0x9BA6, 0x5C8C, 0x9BA7, 0x5C90, 0x8AF2,
+	0x5C91, 0x9BA8, 0x5C94, 0x9BA9, 0x5CA1, 0x89AA, 0x5CA6, 0xFAAC,
+	0x5CA8, 0x915A, 0x5CA9, 0x8AE2, 0x5CAB, 0x9BAB, 0x5CAC, 0x96A6,
+	0x5CB1, 0x91D0, 0x5CB3, 0x8A78, 0x5CB6, 0x9BAD, 0x5CB7, 0x9BAF,
+	0x5CB8, 0x8ADD, 0x5CBA, 0xFAAD, 0x5CBB, 0x9BAC, 0x5CBC, 0x9BAE,
+	0x5CBE, 0x9BB1, 0x5CC5, 0x9BB0, 0x5CC7, 0x9BB2, 0x5CD9, 0x9BB3,
+	0x5CE0, 0x93BB, 0x5CE1, 0x8BAC, 0x5CE8, 0x89E3, 0x5CE9, 0x9BB4,
+	0x5CEA, 0x9BB9, 0x5CED, 0x9BB7, 0x5CEF, 0x95F5, 0x5CF0, 0x95F4,
+	0x5CF5, 0xFAAE, 0x5CF6, 0x9387, 0x5CFA, 0x9BB6, 0x5CFB, 0x8F73,
+	0x5CFD, 0x9BB5, 0x5D07, 0x9092, 0x5D0B, 0x9BBA, 0x5D0E, 0x8DE8,
+	0x5D11, 0x9BC0, 0x5D14, 0x9BC1, 0x5D15, 0x9BBB, 0x5D16, 0x8A52,
+	0x5D17, 0x9BBC, 0x5D18, 0x9BC5, 0x5D19, 0x9BC4, 0x5D1A, 0x9BC3,
+	0x5D1B, 0x9BBF, 0x5D1F, 0x9BBE, 0x5D22, 0x9BC2, 0x5D27, 0xFAAF,
+	0x5D29, 0x95F6, 0x5D42, 0xFAB2, 0x5D4B, 0x9BC9, 0x5D4C, 0x9BC6,
+	0x5D4E, 0x9BC8, 0x5D50, 0x9792, 0x5D52, 0x9BC7, 0x5D53, 0xFAB0,
+	0x5D5C, 0x9BBD, 0x5D69, 0x9093, 0x5D6C, 0x9BCA, 0x5D6D, 0xFAB3,
+	0x5D6F, 0x8DB5, 0x5D73, 0x9BCB, 0x5D76, 0x9BCC, 0x5D82, 0x9BCF,
+	0x5D84, 0x9BCE, 0x5D87, 0x9BCD, 0x5D8B, 0x9388, 0x5D8C, 0x9BB8,
+	0x5D90, 0x9BD5, 0x5D9D, 0x9BD1, 0x5DA2, 0x9BD0, 0x5DAC, 0x9BD2,
+	0x5DAE, 0x9BD3, 0x5DB7, 0x9BD6, 0x5DB8, 0xFAB4, 0x5DB9, 0xFAB5,
+	0x5DBA, 0x97E4, 0x5DBC, 0x9BD7, 0x5DBD, 0x9BD4, 0x5DC9, 0x9BD8,
+	0x5DCC, 0x8ADE, 0x5DCD, 0x9BD9, 0x5DD0, 0xFAB6, 0x5DD2, 0x9BDB,
+	0x5DD3, 0x9BDA, 0x5DD6, 0x9BDC, 0x5DDB, 0x9BDD, 0x5DDD, 0x90EC,
+	0x5DDE, 0x8F42, 0x5DE1, 0x8F84, 0x5DE3, 0x9183, 0x5DE5, 0x8D48,
+	0x5DE6, 0x8DB6, 0x5DE7, 0x8D49, 0x5DE8, 0x8B90, 0x5DEB, 0x9BDE,
+	0x5DEE, 0x8DB7, 0x5DF1, 0x8CC8, 0x5DF2, 0x9BDF, 0x5DF3, 0x96A4,
+	0x5DF4, 0x9462, 0x5DF5, 0x9BE0, 0x5DF7, 0x8D4A, 0x5DFB, 0x8AAA,
+	0x5DFD, 0x9246, 0x5DFE, 0x8BD0, 0x5E02, 0x8E73, 0x5E03, 0x957A,
+	0x5E06, 0x94BF, 0x5E0B, 0x9BE1, 0x5E0C, 0x8AF3, 0x5E11, 0x9BE4,
+	0x5E16, 0x929F, 0x5E19, 0x9BE3, 0x5E1A, 0x9BE2, 0x5E1B, 0x9BE5,
+	0x5E1D, 0x92E9, 0x5E25, 0x9083, 0x5E2B, 0x8E74, 0x5E2D, 0x90C8,
+	0x5E2F, 0x91D1, 0x5E30, 0x8B41, 0x5E33, 0x92A0, 0x5E36, 0x9BE6,
+	0x5E37, 0x9BE7, 0x5E38, 0x8FED, 0x5E3D, 0x9658, 0x5E40, 0x9BEA,
+	0x5E43, 0x9BE9, 0x5E44, 0x9BE8, 0x5E45, 0x959D, 0x5E47, 0x9BF1,
+	0x5E4C, 0x9679, 0x5E4E, 0x9BEB, 0x5E54, 0x9BED, 0x5E55, 0x968B,
+	0x5E57, 0x9BEC, 0x5E5F, 0x9BEE, 0x5E61, 0x94A6, 0x5E62, 0x9BEF,
+	0x5E63, 0x95BC, 0x5E64, 0x9BF0, 0x5E72, 0x8AB1, 0x5E73, 0x95BD,
+	0x5E74, 0x944E, 0x5E75, 0x9BF2, 0x5E76, 0x9BF3, 0x5E78, 0x8D4B,
+	0x5E79, 0x8AB2, 0x5E7A, 0x9BF4, 0x5E7B, 0x8CB6, 0x5E7C, 0x9763,
+	0x5E7D, 0x9748, 0x5E7E, 0x8AF4, 0x5E7F, 0x9BF6, 0x5E81, 0x92A1,
+	0x5E83, 0x8D4C, 0x5E84, 0x8FAF, 0x5E87, 0x94DD, 0x5E8A, 0x8FB0,
+	0x5E8F, 0x8F98, 0x5E95, 0x92EA, 0x5E96, 0x95F7, 0x5E97, 0x9358,
+	0x5E9A, 0x8D4D, 0x5E9C, 0x957B, 0x5EA0, 0x9BF7, 0x5EA6, 0x9378,
+	0x5EA7, 0x8DC0, 0x5EAB, 0x8CC9, 0x5EAD, 0x92EB, 0x5EB5, 0x88C1,
+	0x5EB6, 0x8F8E, 0x5EB7, 0x8D4E, 0x5EB8, 0x9766, 0x5EC1, 0x9BF8,
+	0x5EC2, 0x9BF9, 0x5EC3, 0x9470, 0x5EC8, 0x9BFA, 0x5EC9, 0x97F5,
+	0x5ECA, 0x984C, 0x5ECF, 0x9BFC, 0x5ED0, 0x9BFB, 0x5ED3, 0x8A66,
+	0x5ED6, 0x9C40, 0x5EDA, 0x9C43, 0x5EDB, 0x9C44, 0x5EDD, 0x9C42,
+	0x5EDF, 0x955F, 0x5EE0, 0x8FB1, 0x5EE1, 0x9C46, 0x5EE2, 0x9C45,
+	0x5EE3, 0x9C41, 0x5EE8, 0x9C47, 0x5EE9, 0x9C48, 0x5EEC, 0x9C49,
+	0x5EF0, 0x9C4C, 0x5EF1, 0x9C4A, 0x5EF3, 0x9C4B, 0x5EF4, 0x9C4D,
+	0x5EF6, 0x8984, 0x5EF7, 0x92EC, 0x5EF8, 0x9C4E, 0x5EFA, 0x8C9A,
+	0x5EFB, 0x89F4, 0x5EFC, 0x9455, 0x5EFE, 0x9C4F, 0x5EFF, 0x93F9,
+	0x5F01, 0x95D9, 0x5F03, 0x9C50, 0x5F04, 0x984D, 0x5F09, 0x9C51,
+	0x5F0A, 0x95BE, 0x5F0B, 0x9C54, 0x5F0C, 0x989F, 0x5F0D, 0x98AF,
+	0x5F0F, 0x8EAE, 0x5F10, 0x93F3, 0x5F11, 0x9C55, 0x5F13, 0x8B7C,
+	0x5F14, 0x92A2, 0x5F15, 0x88F8, 0x5F16, 0x9C56, 0x5F17, 0x95A4,
+	0x5F18, 0x8D4F, 0x5F1B, 0x926F, 0x5F1F, 0x92ED, 0x5F21, 0xFAB7,
+	0x5F25, 0x96ED, 0x5F26, 0x8CB7, 0x5F27, 0x8CCA, 0x5F29, 0x9C57,
+	0x5F2D, 0x9C58, 0x5F2F, 0x9C5E, 0x5F31, 0x8EE3, 0x5F34, 0xFAB8,
+	0x5F35, 0x92A3, 0x5F37, 0x8BAD, 0x5F38, 0x9C59, 0x5F3C, 0x954A,
+	0x5F3E, 0x9265, 0x5F41, 0x9C5A, 0x5F45, 0xFA67, 0x5F48, 0x9C5B,
+	0x5F4A, 0x8BAE, 0x5F4C, 0x9C5C, 0x5F4E, 0x9C5D, 0x5F51, 0x9C5F,
+	0x5F53, 0x9396, 0x5F56, 0x9C60, 0x5F57, 0x9C61, 0x5F59, 0x9C62,
+	0x5F5C, 0x9C53, 0x5F5D, 0x9C52, 0x5F61, 0x9C63, 0x5F62, 0x8C60,
+	0x5F66, 0x9546, 0x5F67, 0xFAB9, 0x5F69, 0x8DCA, 0x5F6A, 0x9556,
+	0x5F6B, 0x92A4, 0x5F6C, 0x956A, 0x5F6D, 0x9C64, 0x5F70, 0x8FB2,
+	0x5F71, 0x8965, 0x5F73, 0x9C65, 0x5F77, 0x9C66, 0x5F79, 0x96F0,
+	0x5F7C, 0x94DE, 0x5F7F, 0x9C69, 0x5F80, 0x899D, 0x5F81, 0x90AA,
+	0x5F82, 0x9C68, 0x5F83, 0x9C67, 0x5F84, 0x8C61, 0x5F85, 0x91D2,
+	0x5F87, 0x9C6D, 0x5F88, 0x9C6B, 0x5F8A, 0x9C6A, 0x5F8B, 0x97A5,
+	0x5F8C, 0x8CE3, 0x5F90, 0x8F99, 0x5F91, 0x9C6C, 0x5F92, 0x936B,
+	0x5F93, 0x8F5D, 0x5F97, 0x93BE, 0x5F98, 0x9C70, 0x5F99, 0x9C6F,
+	0x5F9E, 0x9C6E, 0x5FA0, 0x9C71, 0x5FA1, 0x8CE4, 0x5FA8, 0x9C72,
+	0x5FA9, 0x959C, 0x5FAA, 0x8F7A, 0x5FAD, 0x9C73, 0x5FAE, 0x94F7,
+	0x5FB3, 0x93BF, 0x5FB4, 0x92A5, 0x5FB7, 0xFABA, 0x5FB9, 0x934F,
+	0x5FBC, 0x9C74, 0x5FBD, 0x8B4A, 0x5FC3, 0x9053, 0x5FC5, 0x954B,
+	0x5FCC, 0x8AF5, 0x5FCD, 0x9445, 0x5FD6, 0x9C75, 0x5FD7, 0x8E75,
+	0x5FD8, 0x9659, 0x5FD9, 0x965A, 0x5FDC, 0x899E, 0x5FDD, 0x9C7A,
+	0x5FDE, 0xFABB, 0x5FE0, 0x9289, 0x5FE4, 0x9C77, 0x5FEB, 0x89F5,
+	0x5FF0, 0x9CAB, 0x5FF1, 0x9C79, 0x5FF5, 0x944F, 0x5FF8, 0x9C78,
+	0x5FFB, 0x9C76, 0x5FFD, 0x8D9A, 0x5FFF, 0x9C7C, 0x600E, 0x9C83,
+	0x600F, 0x9C89, 0x6010, 0x9C81, 0x6012, 0x937B, 0x6015, 0x9C86,
+	0x6016, 0x957C, 0x6019, 0x9C80, 0x601B, 0x9C85, 0x601C, 0x97E5,
+	0x601D, 0x8E76, 0x6020, 0x91D3, 0x6021, 0x9C7D, 0x6025, 0x8B7D,
+	0x6026, 0x9C88, 0x6027, 0x90AB, 0x6028, 0x8985, 0x6029, 0x9C82,
+	0x602A, 0x89F6, 0x602B, 0x9C87, 0x602F, 0x8BAF, 0x6031, 0x9C84,
+	0x603A, 0x9C8A, 0x6041, 0x9C8C, 0x6042, 0x9C96, 0x6043, 0x9C94,
+	0x6046, 0x9C91, 0x604A, 0x9C90, 0x604B, 0x97F6, 0x604D, 0x9C92,
+	0x6050, 0x8BB0, 0x6052, 0x8D50, 0x6055, 0x8F9A, 0x6059, 0x9C99,
+	0x605A, 0x9C8B, 0x605D, 0xFABC, 0x605F, 0x9C8F, 0x6060, 0x9C7E,
+	0x6062, 0x89F8, 0x6063, 0x9C93, 0x6064, 0x9C95, 0x6065, 0x9270,
+	0x6068, 0x8DA6, 0x6069, 0x89B6, 0x606A, 0x9C8D, 0x606B, 0x9C98,
+	0x606C, 0x9C97, 0x606D, 0x8BB1, 0x606F, 0x91A7, 0x6070, 0x8A86,
+	0x6075, 0x8C62, 0x6077, 0x9C8E, 0x6081, 0x9C9A, 0x6083, 0x9C9D,
+	0x6084, 0x9C9F, 0x6085, 0xFABD, 0x6089, 0x8EBB, 0x608A, 0xFABE,
+	0x608B, 0x9CA5, 0x608C, 0x92EE, 0x608D, 0x9C9B, 0x6092, 0x9CA3,
+	0x6094, 0x89F7, 0x6096, 0x9CA1, 0x6097, 0x9CA2, 0x609A, 0x9C9E,
+	0x609B, 0x9CA0, 0x609F, 0x8CE5, 0x60A0, 0x9749, 0x60A3, 0x8AB3,
+	0x60A6, 0x8978, 0x60A7, 0x9CA4, 0x60A9, 0x9459, 0x60AA, 0x88AB,
+	0x60B2, 0x94DF, 0x60B3, 0x9C7B, 0x60B4, 0x9CAA, 0x60B5, 0x9CAE,
+	0x60B6, 0x96E3, 0x60B8, 0x9CA7, 0x60BC, 0x9389, 0x60BD, 0x9CAC,
+	0x60C5, 0x8FEE, 0x60C6, 0x9CAD, 0x60C7, 0x93D5, 0x60D1, 0x9866,
+	0x60D3, 0x9CA9, 0x60D5, 0xFAC0, 0x60D8, 0x9CAF, 0x60DA, 0x8D9B,
+	0x60DC, 0x90C9, 0x60DE, 0xFABF, 0x60DF, 0x88D2, 0x60E0, 0x9CA8,
+	0x60E1, 0x9CA6, 0x60E3, 0x9179, 0x60E7, 0x9C9C, 0x60E8, 0x8E53,
+	0x60F0, 0x91C4, 0x60F1, 0x9CBB, 0x60F2, 0xFAC2, 0x60F3, 0x917A,
+	0x60F4, 0x9CB6, 0x60F6, 0x9CB3, 0x60F7, 0x9CB4, 0x60F9, 0x8EE4,
+	0x60FA, 0x9CB7, 0x60FB, 0x9CBA, 0x6100, 0x9CB5, 0x6101, 0x8F44,
+	0x6103, 0x9CB8, 0x6106, 0x9CB2, 0x6108, 0x96FA, 0x6109, 0x96F9,
+	0x610D, 0x9CBC, 0x610E, 0x9CBD, 0x610F, 0x88D3, 0x6111, 0xFAC3,
+	0x6115, 0x9CB1, 0x611A, 0x8BF0, 0x611B, 0x88A4, 0x611F, 0x8AB4,
+	0x6120, 0xFAC1, 0x6121, 0x9CB9, 0x6127, 0x9CC1, 0x6128, 0x9CC0,
+	0x612C, 0x9CC5, 0x6130, 0xFAC5, 0x6134, 0x9CC6, 0x6137, 0xFAC4,
+	0x613C, 0x9CC4, 0x613D, 0x9CC7, 0x613E, 0x9CBF, 0x613F, 0x9CC3,
+	0x6142, 0x9CC8, 0x6144, 0x9CC9, 0x6147, 0x9CBE, 0x6148, 0x8E9C,
+	0x614A, 0x9CC2, 0x614B, 0x91D4, 0x614C, 0x8D51, 0x614D, 0x9CB0,
+	0x614E, 0x9054, 0x6153, 0x9CD6, 0x6155, 0x95E7, 0x6158, 0x9CCC,
+	0x6159, 0x9CCD, 0x615A, 0x9CCE, 0x615D, 0x9CD5, 0x615F, 0x9CD4,
+	0x6162, 0x969D, 0x6163, 0x8AB5, 0x6165, 0x9CD2, 0x6167, 0x8C64,
+	0x6168, 0x8A53, 0x616B, 0x9CCF, 0x616E, 0x97B6, 0x616F, 0x9CD1,
+	0x6170, 0x88D4, 0x6171, 0x9CD3, 0x6173, 0x9CCA, 0x6174, 0x9CD0,
+	0x6175, 0x9CD7, 0x6176, 0x8C63, 0x6177, 0x9CCB, 0x617E, 0x977C,
+	0x6182, 0x974A, 0x6187, 0x9CDA, 0x618A, 0x9CDE, 0x618E, 0x919E,
+	0x6190, 0x97F7, 0x6191, 0x9CDF, 0x6194, 0x9CDC, 0x6196, 0x9CD9,
+	0x6198, 0xFAC6, 0x6199, 0x9CD8, 0x619A, 0x9CDD, 0x61A4, 0x95AE,
+	0x61A7, 0x93B2, 0x61A9, 0x8C65, 0x61AB, 0x9CE0, 0x61AC, 0x9CDB,
+	0x61AE, 0x9CE1, 0x61B2, 0x8C9B, 0x61B6, 0x89AF, 0x61BA, 0x9CE9,
+	0x61BE, 0x8AB6, 0x61C3, 0x9CE7, 0x61C6, 0x9CE8, 0x61C7, 0x8DA7,
+	0x61C8, 0x9CE6, 0x61C9, 0x9CE4, 0x61CA, 0x9CE3, 0x61CB, 0x9CEA,
+	0x61CC, 0x9CE2, 0x61CD, 0x9CEC, 0x61D0, 0x89F9, 0x61E3, 0x9CEE,
+	0x61E6, 0x9CED, 0x61F2, 0x92A6, 0x61F4, 0x9CF1, 0x61F6, 0x9CEF,
+	0x61F7, 0x9CE5, 0x61F8, 0x8C9C, 0x61FA, 0x9CF0, 0x61FC, 0x9CF4,
+	0x61FD, 0x9CF3, 0x61FE, 0x9CF5, 0x61FF, 0x9CF2, 0x6200, 0x9CF6,
+	0x6208, 0x9CF7, 0x6209, 0x9CF8, 0x620A, 0x95E8, 0x620C, 0x9CFA,
+	0x620D, 0x9CF9, 0x620E, 0x8F5E, 0x6210, 0x90AC, 0x6211, 0x89E4,
+	0x6212, 0x89FA, 0x6213, 0xFAC7, 0x6214, 0x9CFB, 0x6216, 0x88BD,
+	0x621A, 0x90CA, 0x621B, 0x9CFC, 0x621D, 0xE6C1, 0x621E, 0x9D40,
+	0x621F, 0x8C81, 0x6221, 0x9D41, 0x6226, 0x90ED, 0x622A, 0x9D42,
+	0x622E, 0x9D43, 0x622F, 0x8B59, 0x6230, 0x9D44, 0x6232, 0x9D45,
+	0x6233, 0x9D46, 0x6234, 0x91D5, 0x6238, 0x8CCB, 0x623B, 0x96DF,
+	0x623F, 0x965B, 0x6240, 0x8F8A, 0x6241, 0x9D47, 0x6247, 0x90EE,
+	0x6248, 0xE7BB, 0x6249, 0x94E0, 0x624B, 0x8EE8, 0x624D, 0x8DCB,
+	0x624E, 0x9D48, 0x6253, 0x91C5, 0x6255, 0x95A5, 0x6258, 0x91EF,
+	0x625B, 0x9D4B, 0x625E, 0x9D49, 0x6260, 0x9D4C, 0x6263, 0x9D4A,
+	0x6268, 0x9D4D, 0x626E, 0x95AF, 0x6271, 0x88B5, 0x6276, 0x957D,
+	0x6279, 0x94E1, 0x627C, 0x9D4E, 0x627E, 0x9D51, 0x627F, 0x8FB3,
+	0x6280, 0x8B5A, 0x6282, 0x9D4F, 0x6283, 0x9D56, 0x6284, 0x8FB4,
+	0x6289, 0x9D50, 0x628A, 0x9463, 0x6291, 0x977D, 0x6292, 0x9D52,
+	0x6293, 0x9D53, 0x6294, 0x9D57, 0x6295, 0x938A, 0x6296, 0x9D54,
+	0x6297, 0x8D52, 0x6298, 0x90DC, 0x629B, 0x9D65, 0x629C, 0x94B2,
+	0x629E, 0x91F0, 0x62A6, 0xFAC8, 0x62AB, 0x94E2, 0x62AC, 0x9DAB,
+	0x62B1, 0x95F8, 0x62B5, 0x92EF, 0x62B9, 0x9695, 0x62BB, 0x9D5A,
+	0x62BC, 0x899F, 0x62BD, 0x928A, 0x62C2, 0x9D63, 0x62C5, 0x9253,
+	0x62C6, 0x9D5D, 0x62C7, 0x9D64, 0x62C8, 0x9D5F, 0x62C9, 0x9D66,
+	0x62CA, 0x9D62, 0x62CC, 0x9D61, 0x62CD, 0x948F, 0x62CF, 0x9D5B,
+	0x62D0, 0x89FB, 0x62D1, 0x9D59, 0x62D2, 0x8B91, 0x62D3, 0x91F1,
+	0x62D4, 0x9D55, 0x62D7, 0x9D58, 0x62D8, 0x8D53, 0x62D9, 0x90D9,
+	0x62DB, 0x8FB5, 0x62DC, 0x9D60, 0x62DD, 0x9471, 0x62E0, 0x8B92,
+	0x62E1, 0x8A67, 0x62EC, 0x8A87, 0x62ED, 0x9040, 0x62EE, 0x9D68,
+	0x62EF, 0x9D6D, 0x62F1, 0x9D69, 0x62F3, 0x8C9D, 0x62F5, 0x9D6E,
+	0x62F6, 0x8E41, 0x62F7, 0x8D89, 0x62FE, 0x8F45, 0x62FF, 0x9D5C,
+	0x6301, 0x8E9D, 0x6302, 0x9D6B, 0x6307, 0x8E77, 0x6308, 0x9D6C,
+	0x6309, 0x88C2, 0x630C, 0x9D67, 0x6311, 0x92A7, 0x6319, 0x8B93,
+	0x631F, 0x8BB2, 0x6327, 0x9D6A, 0x6328, 0x88A5, 0x632B, 0x8DC1,
+	0x632F, 0x9055, 0x633A, 0x92F0, 0x633D, 0x94D2, 0x633E, 0x9D70,
+	0x633F, 0x917D, 0x6349, 0x91A8, 0x634C, 0x8E4A, 0x634D, 0x9D71,
+	0x634F, 0x9D73, 0x6350, 0x9D6F, 0x6355, 0x95DF, 0x6357, 0x92BB,
+	0x635C, 0x917B, 0x6367, 0x95F9, 0x6368, 0x8ECC, 0x6369, 0x9D80,
+	0x636B, 0x9D7E, 0x636E, 0x9098, 0x6372, 0x8C9E, 0x6376, 0x9D78,
+	0x6377, 0x8FB7, 0x637A, 0x93E6, 0x637B, 0x9450, 0x6380, 0x9D76,
+	0x6383, 0x917C, 0x6388, 0x8EF6, 0x6389, 0x9D7B, 0x638C, 0x8FB6,
+	0x638E, 0x9D75, 0x638F, 0x9D7A, 0x6392, 0x9472, 0x6396, 0x9D74,
+	0x6398, 0x8C40, 0x639B, 0x8A7C, 0x639F, 0x9D7C, 0x63A0, 0x97A9,
+	0x63A1, 0x8DCC, 0x63A2, 0x9254, 0x63A3, 0x9D79, 0x63A5, 0x90DA,
+	0x63A7, 0x8D54, 0x63A8, 0x9084, 0x63A9, 0x8986, 0x63AA, 0x915B,
+	0x63AB, 0x9D77, 0x63AC, 0x8B64, 0x63B2, 0x8C66, 0x63B4, 0x92CD,
+	0x63B5, 0x9D7D, 0x63BB, 0x917E, 0x63BE, 0x9D81, 0x63C0, 0x9D83,
+	0x63C3, 0x91B5, 0x63C4, 0x9D89, 0x63C6, 0x9D84, 0x63C9, 0x9D86,
+	0x63CF, 0x9560, 0x63D0, 0x92F1, 0x63D2, 0x9D87, 0x63D6, 0x974B,
+	0x63DA, 0x9767, 0x63DB, 0x8AB7, 0x63E1, 0x88AC, 0x63E3, 0x9D85,
+	0x63E9, 0x9D82, 0x63EE, 0x8AF6, 0x63F4, 0x8987, 0x63F5, 0xFAC9,
+	0x63F6, 0x9D88, 0x63FA, 0x9768, 0x6406, 0x9D8C, 0x640D, 0x91B9,
+	0x640F, 0x9D93, 0x6413, 0x9D8D, 0x6416, 0x9D8A, 0x6417, 0x9D91,
+	0x641C, 0x9D72, 0x6426, 0x9D8E, 0x6428, 0x9D92, 0x642C, 0x94C0,
+	0x642D, 0x938B, 0x6434, 0x9D8B, 0x6436, 0x9D8F, 0x643A, 0x8C67,
+	0x643E, 0x8DEF, 0x6442, 0x90DB, 0x644E, 0x9D97, 0x6458, 0x9345,
+	0x6460, 0xFACA, 0x6467, 0x9D94, 0x6469, 0x9680, 0x646F, 0x9D95,
+	0x6476, 0x9D96, 0x6478, 0x96CC, 0x647A, 0x90A0, 0x6483, 0x8C82,
+	0x6488, 0x9D9D, 0x6492, 0x8E54, 0x6493, 0x9D9A, 0x6495, 0x9D99,
+	0x649A, 0x9451, 0x649D, 0xFACB, 0x649E, 0x93B3, 0x64A4, 0x9350,
+	0x64A5, 0x9D9B, 0x64A9, 0x9D9C, 0x64AB, 0x958F, 0x64AD, 0x9464,
+	0x64AE, 0x8E42, 0x64B0, 0x90EF, 0x64B2, 0x966F, 0x64B9, 0x8A68,
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+	0x7435, 0x94FA, 0x7436, 0x9469, 0x743A, 0xE0E9, 0x743F, 0xE0EB,
+	0x7441, 0xE0EE, 0x7455, 0xE0EA, 0x7459, 0xE0ED, 0x745A, 0x8CE8,
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+	0x7473, 0x8DBA, 0x7476, 0xE0F4, 0x747E, 0xE0F5, 0x7483, 0x979E,
+	0x7489, 0xFB6C, 0x748B, 0xE0F6, 0x749E, 0xE0F7, 0x749F, 0xFB6D,
+	0x74A2, 0xE0E3, 0x74A7, 0xE0F8, 0x74B0, 0x8AC2, 0x74BD, 0x8EA3,
+	0x74CA, 0xE0F9, 0x74CF, 0xE0FA, 0x74D4, 0xE0FB, 0x74DC, 0x895A,
+	0x74E0, 0xE140, 0x74E2, 0x955A, 0x74E3, 0xE141, 0x74E6, 0x8AA2,
+	0x74E7, 0xE142, 0x74E9, 0xE143, 0x74EE, 0xE144, 0x74F0, 0xE146,
+	0x74F1, 0xE147, 0x74F2, 0xE145, 0x74F6, 0x9572, 0x74F7, 0xE149,
+	0x74F8, 0xE148, 0x7501, 0xFB6E, 0x7503, 0xE14B, 0x7504, 0xE14A,
+	0x7505, 0xE14C, 0x750C, 0xE14D, 0x750D, 0xE14F, 0x750E, 0xE14E,
+	0x7511, 0x8D99, 0x7513, 0xE151, 0x7515, 0xE150, 0x7518, 0x8AC3,
+	0x751A, 0x9072, 0x751C, 0x935B, 0x751E, 0xE152, 0x751F, 0x90B6,
+	0x7523, 0x8E59, 0x7525, 0x8999, 0x7526, 0xE153, 0x7528, 0x9770,
+	0x752B, 0x95E1, 0x752C, 0xE154, 0x752F, 0xFAA8, 0x7530, 0x9363,
+	0x7531, 0x9752, 0x7532, 0x8D62, 0x7533, 0x905C, 0x7537, 0x926A,
+	0x7538, 0x99B2, 0x753A, 0x92AC, 0x753B, 0x89E6, 0x753C, 0xE155,
+	0x7544, 0xE156, 0x7546, 0xE15B, 0x7549, 0xE159, 0x754A, 0xE158,
+	0x754B, 0x9DC0, 0x754C, 0x8A45, 0x754D, 0xE157, 0x754F, 0x88D8,
+	0x7551, 0x94A8, 0x7554, 0x94C8, 0x7559, 0x97AF, 0x755A, 0xE15C,
+	0x755B, 0xE15A, 0x755C, 0x927B, 0x755D, 0x90A4, 0x7560, 0x94A9,
+	0x7562, 0x954C, 0x7564, 0xE15E, 0x7565, 0x97AA, 0x7566, 0x8C6C,
+	0x7567, 0xE15F, 0x7569, 0xE15D, 0x756A, 0x94D4, 0x756B, 0xE160,
+	0x756D, 0xE161, 0x756F, 0xFB6F, 0x7570, 0x88D9, 0x7573, 0x8FF4,
+	0x7574, 0xE166, 0x7576, 0xE163, 0x7577, 0x93EB, 0x7578, 0xE162,
+	0x757F, 0x8B45, 0x7582, 0xE169, 0x7586, 0xE164, 0x7587, 0xE165,
+	0x7589, 0xE168, 0x758A, 0xE167, 0x758B, 0x9544, 0x758E, 0x9161,
+	0x758F, 0x9160, 0x7591, 0x8B5E, 0x7594, 0xE16A, 0x759A, 0xE16B,
+	0x759D, 0xE16C, 0x75A3, 0xE16E, 0x75A5, 0xE16D, 0x75AB, 0x8975,
+	0x75B1, 0xE176, 0x75B2, 0x94E6, 0x75B3, 0xE170, 0x75B5, 0xE172,
+	0x75B8, 0xE174, 0x75B9, 0x905D, 0x75BC, 0xE175, 0x75BD, 0xE173,
+	0x75BE, 0x8EBE, 0x75C2, 0xE16F, 0x75C3, 0xE171, 0x75C5, 0x9561,
+	0x75C7, 0x8FC7, 0x75CA, 0xE178, 0x75CD, 0xE177, 0x75D2, 0xE179,
+	0x75D4, 0x8EA4, 0x75D5, 0x8DAD, 0x75D8, 0x9397, 0x75D9, 0xE17A,
+	0x75DB, 0x92C9, 0x75DE, 0xE17C, 0x75E2, 0x979F, 0x75E3, 0xE17B,
+	0x75E9, 0x9189, 0x75F0, 0xE182, 0x75F2, 0xE184, 0x75F3, 0xE185,
+	0x75F4, 0x9273, 0x75FA, 0xE183, 0x75FC, 0xE180, 0x75FE, 0xE17D,
+	0x75FF, 0xE17E, 0x7601, 0xE181, 0x7609, 0xE188, 0x760B, 0xE186,
+	0x760D, 0xE187, 0x761F, 0xE189, 0x7620, 0xE18B, 0x7621, 0xE18C,
+	0x7622, 0xE18D, 0x7624, 0xE18E, 0x7627, 0xE18A, 0x7630, 0xE190,
+	0x7634, 0xE18F, 0x763B, 0xE191, 0x7642, 0x97C3, 0x7646, 0xE194,
+	0x7647, 0xE192, 0x7648, 0xE193, 0x764C, 0x8AE0, 0x7652, 0x96FC,
+	0x7656, 0x95C8, 0x7658, 0xE196, 0x765C, 0xE195, 0x7661, 0xE197,
+	0x7662, 0xE198, 0x7667, 0xE19C, 0x7668, 0xE199, 0x7669, 0xE19A,
+	0x766A, 0xE19B, 0x766C, 0xE19D, 0x7670, 0xE19E, 0x7672, 0xE19F,
+	0x7676, 0xE1A0, 0x7678, 0xE1A1, 0x767A, 0x94AD, 0x767B, 0x936F,
+	0x767C, 0xE1A2, 0x767D, 0x9492, 0x767E, 0x9553, 0x7680, 0xE1A3,
+	0x7682, 0xFB70, 0x7683, 0xE1A4, 0x7684, 0x9349, 0x7686, 0x8A46,
+	0x7687, 0x8D63, 0x7688, 0xE1A5, 0x768B, 0xE1A6, 0x768E, 0xE1A7,
+	0x7690, 0x8E48, 0x7693, 0xE1A9, 0x7696, 0xE1A8, 0x7699, 0xE1AA,
+	0x769A, 0xE1AB, 0x769B, 0xFB73, 0x769C, 0xFB71, 0x769E, 0xFB72,
+	0x76A6, 0xFB74, 0x76AE, 0x94E7, 0x76B0, 0xE1AC, 0x76B4, 0xE1AD,
+	0x76B7, 0xEA89, 0x76B8, 0xE1AE, 0x76B9, 0xE1AF, 0x76BA, 0xE1B0,
+	0x76BF, 0x8E4D, 0x76C2, 0xE1B1, 0x76C3, 0x9475, 0x76C6, 0x967E,
+	0x76C8, 0x896D, 0x76CA, 0x8976, 0x76CD, 0xE1B2, 0x76D2, 0xE1B4,
+	0x76D6, 0xE1B3, 0x76D7, 0x9390, 0x76DB, 0x90B7, 0x76DC, 0x9F58,
+	0x76DE, 0xE1B5, 0x76DF, 0x96BF, 0x76E1, 0xE1B6, 0x76E3, 0x8AC4,
+	0x76E4, 0x94D5, 0x76E5, 0xE1B7, 0x76E7, 0xE1B8, 0x76EA, 0xE1B9,
+	0x76EE, 0x96DA, 0x76F2, 0x96D3, 0x76F4, 0x92BC, 0x76F8, 0x918A,
+	0x76FB, 0xE1BB, 0x76FE, 0x8F82, 0x7701, 0x8FC8, 0x7704, 0xE1BE,
+	0x7707, 0xE1BD, 0x7708, 0xE1BC, 0x7709, 0x94FB, 0x770B, 0x8AC5,
+	0x770C, 0x8CA7, 0x771B, 0xE1C4, 0x771E, 0xE1C1, 0x771F, 0x905E,
+	0x7720, 0x96B0, 0x7724, 0xE1C0, 0x7725, 0xE1C2, 0x7726, 0xE1C3,
+	0x7729, 0xE1BF, 0x7737, 0xE1C5, 0x7738, 0xE1C6, 0x773A, 0x92AD,
+	0x773C, 0x8AE1, 0x7740, 0x9285, 0x7746, 0xFB76, 0x7747, 0xE1C7,
+	0x775A, 0xE1C8, 0x775B, 0xE1CB, 0x7761, 0x9087, 0x7763, 0x93C2,
+	0x7765, 0xE1CC, 0x7766, 0x9672, 0x7768, 0xE1C9, 0x776B, 0xE1CA,
+	0x7779, 0xE1CF, 0x777E, 0xE1CE, 0x777F, 0xE1CD, 0x778B, 0xE1D1,
+	0x778E, 0xE1D0, 0x7791, 0xE1D2, 0x779E, 0xE1D4, 0x77A0, 0xE1D3,
+	0x77A5, 0x95CB, 0x77AC, 0x8F75, 0x77AD, 0x97C4, 0x77B0, 0xE1D5,
+	0x77B3, 0x93B5, 0x77B6, 0xE1D6, 0x77B9, 0xE1D7, 0x77BB, 0xE1DB,
+	0x77BC, 0xE1D9, 0x77BD, 0xE1DA, 0x77BF, 0xE1D8, 0x77C7, 0xE1DC,
+	0x77CD, 0xE1DD, 0x77D7, 0xE1DE, 0x77DA, 0xE1DF, 0x77DB, 0x96B5,
+	0x77DC, 0xE1E0, 0x77E2, 0x96EE, 0x77E3, 0xE1E1, 0x77E5, 0x926D,
+	0x77E7, 0x948A, 0x77E9, 0x8BE9, 0x77ED, 0x925A, 0x77EE, 0xE1E2,
+	0x77EF, 0x8BB8, 0x77F3, 0x90CE, 0x77FC, 0xE1E3, 0x7802, 0x8DBB,
+	0x780C, 0xE1E4, 0x7812, 0xE1E5, 0x7814, 0x8CA4, 0x7815, 0x8DD3,
+	0x7820, 0xE1E7, 0x7821, 0xFB78, 0x7825, 0x9375, 0x7826, 0x8DD4,
+	0x7827, 0x8B6D, 0x7832, 0x9643, 0x7834, 0x946A, 0x783A, 0x9376,
+	0x783F, 0x8D7B, 0x7845, 0xE1E9, 0x784E, 0xFB79, 0x785D, 0x8FC9,
+	0x7864, 0xFB7A, 0x786B, 0x97B0, 0x786C, 0x8D64, 0x786F, 0x8CA5,
+	0x7872, 0x94A1, 0x7874, 0xE1EB, 0x787A, 0xFB7B, 0x787C, 0xE1ED,
+	0x7881, 0x8CE9, 0x7886, 0xE1EC, 0x7887, 0x92F4, 0x788C, 0xE1EF,
+	0x788D, 0x8A56, 0x788E, 0xE1EA, 0x7891, 0x94E8, 0x7893, 0x894F,
+	0x7895, 0x8DEA, 0x7897, 0x9871, 0x789A, 0xE1EE, 0x78A3, 0xE1F0,
+	0x78A7, 0x95C9, 0x78A9, 0x90D7, 0x78AA, 0xE1F2, 0x78AF, 0xE1F3,
+	0x78B5, 0xE1F1, 0x78BA, 0x8A6D, 0x78BC, 0xE1F9, 0x78BE, 0xE1F8,
+	0x78C1, 0x8EA5, 0x78C5, 0xE1FA, 0x78C6, 0xE1F5, 0x78CA, 0xE1FB,
+	0x78CB, 0xE1F6, 0x78D0, 0x94D6, 0x78D1, 0xE1F4, 0x78D4, 0xE1F7,
+	0x78DA, 0xE241, 0x78E7, 0xE240, 0x78E8, 0x9681, 0x78EC, 0xE1FC,
+	0x78EF, 0x88E9, 0x78F4, 0xE243, 0x78FD, 0xE242, 0x7901, 0x8FCA,
+	0x7907, 0xE244, 0x790E, 0x9162, 0x7911, 0xE246, 0x7912, 0xE245,
+	0x7919, 0xE247, 0x7926, 0xE1E6, 0x792A, 0xE1E8, 0x792B, 0xE249,
+	0x792C, 0xE248, 0x7930, 0xFB7C, 0x793A, 0x8EA6, 0x793C, 0x97E7,
+	0x793E, 0x8ED0, 0x7940, 0xE24A, 0x7941, 0x8C56, 0x7947, 0x8B5F,
+	0x7948, 0x8B46, 0x7949, 0x8E83, 0x7950, 0x9753, 0x7953, 0xE250,
+	0x7955, 0xE24F, 0x7956, 0x9163, 0x7957, 0xE24C, 0x795A, 0xE24E,
+	0x795D, 0x8F6A, 0x795E, 0x905F, 0x795F, 0xE24D, 0x7960, 0xE24B,
+	0x7962, 0x9449, 0x7965, 0x8FCB, 0x7968, 0x955B, 0x796D, 0x8DD5,
+	0x7977, 0x9398, 0x797A, 0xE251, 0x797F, 0xE252, 0x7980, 0xE268,
+	0x7981, 0x8BD6, 0x7984, 0x985C, 0x7985, 0x9154, 0x798A, 0xE253,
+	0x798D, 0x89D0, 0x798E, 0x92F5, 0x798F, 0x959F, 0x7994, 0xFB81,
+	0x799B, 0xFB83, 0x799D, 0xE254, 0x79A6, 0x8B9A, 0x79A7, 0xE255,
+	0x79AA, 0xE257, 0x79AE, 0xE258, 0x79B0, 0x9448, 0x79B3, 0xE259,
+	0x79B9, 0xE25A, 0x79BA, 0xE25B, 0x79BD, 0x8BD7, 0x79BE, 0x89D1,
+	0x79BF, 0x93C3, 0x79C0, 0x8F47, 0x79C1, 0x8E84, 0x79C9, 0xE25C,
+	0x79CB, 0x8F48, 0x79D1, 0x89C8, 0x79D2, 0x9562, 0x79D5, 0xE25D,
+	0x79D8, 0x94E9, 0x79DF, 0x9164, 0x79E1, 0xE260, 0x79E3, 0xE261,
+	0x79E4, 0x9489, 0x79E6, 0x9060, 0x79E7, 0xE25E, 0x79E9, 0x9281,
+	0x79EC, 0xE25F, 0x79F0, 0x8FCC, 0x79FB, 0x88DA, 0x7A00, 0x8B48,
+	0x7A08, 0xE262, 0x7A0B, 0x92F6, 0x7A0D, 0xE263, 0x7A0E, 0x90C5,
+	0x7A14, 0x96AB, 0x7A17, 0x9542, 0x7A18, 0xE264, 0x7A19, 0xE265,
+	0x7A1A, 0x9274, 0x7A1C, 0x97C5, 0x7A1F, 0xE267, 0x7A20, 0xE266,
+	0x7A2E, 0x8EED, 0x7A31, 0xE269, 0x7A32, 0x88EE, 0x7A37, 0xE26C,
+	0x7A3B, 0xE26A, 0x7A3C, 0x89D2, 0x7A3D, 0x8C6D, 0x7A3E, 0xE26B,
+	0x7A3F, 0x8D65, 0x7A40, 0x8D92, 0x7A42, 0x95E4, 0x7A43, 0xE26D,
+	0x7A46, 0x9673, 0x7A49, 0xE26F, 0x7A4D, 0x90CF, 0x7A4E, 0x896E,
+	0x7A4F, 0x89B8, 0x7A50, 0x88AA, 0x7A57, 0xE26E, 0x7A61, 0xE270,
+	0x7A62, 0xE271, 0x7A63, 0x8FF5, 0x7A69, 0xE272, 0x7A6B, 0x8A6E,
+	0x7A70, 0xE274, 0x7A74, 0x8C8A, 0x7A76, 0x8B86, 0x7A79, 0xE275,
+	0x7A7A, 0x8BF3, 0x7A7D, 0xE276, 0x7A7F, 0x90FA, 0x7A81, 0x93CB,
+	0x7A83, 0x90DE, 0x7A84, 0x8DF3, 0x7A88, 0xE277, 0x7A92, 0x9282,
+	0x7A93, 0x918B, 0x7A95, 0xE279, 0x7A96, 0xE27B, 0x7A97, 0xE278,
+	0x7A98, 0xE27A, 0x7A9F, 0x8C41, 0x7AA9, 0xE27C, 0x7AAA, 0x8C45,
+	0x7AAE, 0x8B87, 0x7AAF, 0x9771, 0x7AB0, 0xE27E, 0x7AB6, 0xE280,
+	0x7ABA, 0x894D, 0x7ABF, 0xE283, 0x7AC3, 0x8A96, 0x7AC4, 0xE282,
+	0x7AC5, 0xE281, 0x7AC7, 0xE285, 0x7AC8, 0xE27D, 0x7ACA, 0xE286,
+	0x7ACB, 0x97A7, 0x7ACD, 0xE287, 0x7ACF, 0xE288, 0x7AD1, 0xFB84,
+	0x7AD2, 0x9AF2, 0x7AD3, 0xE28A, 0x7AD5, 0xE289, 0x7AD9, 0xE28B,
+	0x7ADA, 0xE28C, 0x7ADC, 0x97B3, 0x7ADD, 0xE28D, 0x7ADF, 0xE8ED,
+	0x7AE0, 0x8FCD, 0x7AE1, 0xE28E, 0x7AE2, 0xE28F, 0x7AE3, 0x8F76,
+	0x7AE5, 0x93B6, 0x7AE6, 0xE290, 0x7AE7, 0xFB85, 0x7AEA, 0x9247,
+	0x7AEB, 0xFB87, 0x7AED, 0xE291, 0x7AEF, 0x925B, 0x7AF0, 0xE292,
+	0x7AF6, 0x8BA3, 0x7AF8, 0x995E, 0x7AF9, 0x927C, 0x7AFA, 0x8EB1,
+	0x7AFF, 0x8AC6, 0x7B02, 0xE293, 0x7B04, 0xE2A0, 0x7B06, 0xE296,
+	0x7B08, 0x8B88, 0x7B0A, 0xE295, 0x7B0B, 0xE2A2, 0x7B0F, 0xE294,
+	0x7B11, 0x8FCE, 0x7B18, 0xE298, 0x7B19, 0xE299, 0x7B1B, 0x934A,
+	0x7B1E, 0xE29A, 0x7B20, 0x8A7D, 0x7B25, 0x9079, 0x7B26, 0x9584,
+	0x7B28, 0xE29C, 0x7B2C, 0x91E6, 0x7B33, 0xE297, 0x7B35, 0xE29B,
+	0x7B36, 0xE29D, 0x7B39, 0x8DF9, 0x7B45, 0xE2A4, 0x7B46, 0x954D,
+	0x7B48, 0x94A4, 0x7B49, 0x9399, 0x7B4B, 0x8BD8, 0x7B4C, 0xE2A3,
+	0x7B4D, 0xE2A1, 0x7B4F, 0x94B3, 0x7B50, 0xE29E, 0x7B51, 0x927D,
+	0x7B52, 0x939B, 0x7B54, 0x939A, 0x7B56, 0x8DF4, 0x7B5D, 0xE2B6,
+	0x7B65, 0xE2A6, 0x7B67, 0xE2A8, 0x7B6C, 0xE2AB, 0x7B6E, 0xE2AC,
+	0x7B70, 0xE2A9, 0x7B71, 0xE2AA, 0x7B74, 0xE2A7, 0x7B75, 0xE2A5,
+	0x7B7A, 0xE29F, 0x7B86, 0x95CD, 0x7B87, 0x89D3, 0x7B8B, 0xE2B3,
+	0x7B8D, 0xE2B0, 0x7B8F, 0xE2B5, 0x7B92, 0xE2B4, 0x7B94, 0x9493,
+	0x7B95, 0x96A5, 0x7B97, 0x8E5A, 0x7B98, 0xE2AE, 0x7B99, 0xE2B7,
+	0x7B9A, 0xE2B2, 0x7B9C, 0xE2B1, 0x7B9D, 0xE2AD, 0x7B9E, 0xFB88,
+	0x7B9F, 0xE2AF, 0x7BA1, 0x8AC7, 0x7BAA, 0x925C, 0x7BAD, 0x90FB,
+	0x7BB1, 0x94A0, 0x7BB4, 0xE2BC, 0x7BB8, 0x94A2, 0x7BC0, 0x90DF,
+	0x7BC1, 0xE2B9, 0x7BC4, 0x94CD, 0x7BC6, 0xE2BD, 0x7BC7, 0x95D1,
+	0x7BC9, 0x927A, 0x7BCB, 0xE2B8, 0x7BCC, 0xE2BA, 0x7BCF, 0xE2BB,
+	0x7BDD, 0xE2BE, 0x7BE0, 0x8EC2, 0x7BE4, 0x93C4, 0x7BE5, 0xE2C3,
+	0x7BE6, 0xE2C2, 0x7BE9, 0xE2BF, 0x7BED, 0x9855, 0x7BF3, 0xE2C8,
+	0x7BF6, 0xE2CC, 0x7BF7, 0xE2C9, 0x7C00, 0xE2C5, 0x7C07, 0xE2C6,
+	0x7C0D, 0xE2CB, 0x7C11, 0xE2C0, 0x7C12, 0x99D3, 0x7C13, 0xE2C7,
+	0x7C14, 0xE2C1, 0x7C17, 0xE2CA, 0x7C1F, 0xE2D0, 0x7C21, 0x8AC8,
+	0x7C23, 0xE2CD, 0x7C27, 0xE2CE, 0x7C2A, 0xE2CF, 0x7C2B, 0xE2D2,
+	0x7C37, 0xE2D1, 0x7C38, 0x94F4, 0x7C3D, 0xE2D3, 0x7C3E, 0x97FA,
+	0x7C3F, 0x95EB, 0x7C40, 0xE2D8, 0x7C43, 0xE2D5, 0x7C4C, 0xE2D4,
+	0x7C4D, 0x90D0, 0x7C4F, 0xE2D7, 0x7C50, 0xE2D9, 0x7C54, 0xE2D6,
+	0x7C56, 0xE2DD, 0x7C58, 0xE2DA, 0x7C5F, 0xE2DB, 0x7C60, 0xE2C4,
+	0x7C64, 0xE2DC, 0x7C65, 0xE2DE, 0x7C6C, 0xE2DF, 0x7C73, 0x95C4,
+	0x7C75, 0xE2E0, 0x7C7E, 0x96E0, 0x7C81, 0x8BCC, 0x7C82, 0x8C48,
+	0x7C83, 0xE2E1, 0x7C89, 0x95B2, 0x7C8B, 0x9088, 0x7C8D, 0x96AE,
+	0x7C90, 0xE2E2, 0x7C92, 0x97B1, 0x7C95, 0x9494, 0x7C97, 0x9165,
+	0x7C98, 0x9453, 0x7C9B, 0x8F6C, 0x7C9F, 0x88BE, 0x7CA1, 0xE2E7,
+	0x7CA2, 0xE2E5, 0x7CA4, 0xE2E3, 0x7CA5, 0x8A9F, 0x7CA7, 0x8FCF,
+	0x7CA8, 0xE2E8, 0x7CAB, 0xE2E6, 0x7CAD, 0xE2E4, 0x7CAE, 0xE2EC,
+	0x7CB1, 0xE2EB, 0x7CB2, 0xE2EA, 0x7CB3, 0xE2E9, 0x7CB9, 0xE2ED,
+	0x7CBD, 0xE2EE, 0x7CBE, 0x90B8, 0x7CC0, 0xE2EF, 0x7CC2, 0xE2F1,
+	0x7CC5, 0xE2F0, 0x7CCA, 0x8CD0, 0x7CCE, 0x9157, 0x7CD2, 0xE2F3,
+	0x7CD6, 0x939C, 0x7CD8, 0xE2F2, 0x7CDC, 0xE2F4, 0x7CDE, 0x95B3,
+	0x7CDF, 0x918C, 0x7CE0, 0x8D66, 0x7CE2, 0xE2F5, 0x7CE7, 0x97C6,
+	0x7CEF, 0xE2F7, 0x7CF2, 0xE2F8, 0x7CF4, 0xE2F9, 0x7CF6, 0xE2FA,
+	0x7CF8, 0x8E85, 0x7CFA, 0xE2FB, 0x7CFB, 0x8C6E, 0x7CFE, 0x8B8A,
+	0x7D00, 0x8B49, 0x7D02, 0xE340, 0x7D04, 0x96F1, 0x7D05, 0x8D67,
+	0x7D06, 0xE2FC, 0x7D0A, 0xE343, 0x7D0B, 0x96E4, 0x7D0D, 0x945B,
+	0x7D10, 0x9552, 0x7D14, 0x8F83, 0x7D15, 0xE342, 0x7D17, 0x8ED1,
+	0x7D18, 0x8D68, 0x7D19, 0x8E86, 0x7D1A, 0x8B89, 0x7D1B, 0x95B4,
+	0x7D1C, 0xE341, 0x7D20, 0x9166, 0x7D21, 0x9661, 0x7D22, 0x8DF5,
+	0x7D2B, 0x8E87, 0x7D2C, 0x92DB, 0x7D2E, 0xE346, 0x7D2F, 0x97DD,
+	0x7D30, 0x8DD7, 0x7D32, 0xE347, 0x7D33, 0x9061, 0x7D35, 0xE349,
+	0x7D39, 0x8FD0, 0x7D3A, 0x8DAE, 0x7D3F, 0xE348, 0x7D42, 0x8F49,
+	0x7D43, 0x8CBC, 0x7D44, 0x9167, 0x7D45, 0xE344, 0x7D46, 0xE34A,
+	0x7D48, 0xFB8A, 0x7D4B, 0xE345, 0x7D4C, 0x8C6F, 0x7D4E, 0xE34D,
+	0x7D4F, 0xE351, 0x7D50, 0x8C8B, 0x7D56, 0xE34C, 0x7D5B, 0xE355,
+	0x7D5C, 0xFB8B, 0x7D5E, 0x8D69, 0x7D61, 0x978D, 0x7D62, 0x88BA,
+	0x7D63, 0xE352, 0x7D66, 0x8B8B, 0x7D68, 0xE34F, 0x7D6E, 0xE350,
+	0x7D71, 0x939D, 0x7D72, 0xE34E, 0x7D73, 0xE34B, 0x7D75, 0x8A47,
+	0x7D76, 0x90E2, 0x7D79, 0x8CA6, 0x7D7D, 0xE357, 0x7D89, 0xE354,
+	0x7D8F, 0xE356, 0x7D93, 0xE353, 0x7D99, 0x8C70, 0x7D9A, 0x91B1,
+	0x7D9B, 0xE358, 0x7D9C, 0x918E, 0x7D9F, 0xE365, 0x7DA0, 0xFB8D,
+	0x7DA2, 0xE361, 0x7DA3, 0xE35B, 0x7DAB, 0xE35F, 0x7DAC, 0x8EF8,
+	0x7DAD, 0x88DB, 0x7DAE, 0xE35A, 0x7DAF, 0xE362, 0x7DB0, 0xE366,
+	0x7DB1, 0x8D6A, 0x7DB2, 0x96D4, 0x7DB4, 0x92D4, 0x7DB5, 0xE35C,
+	0x7DB7, 0xFB8C, 0x7DB8, 0xE364, 0x7DBA, 0xE359, 0x7DBB, 0x925D,
+	0x7DBD, 0xE35E, 0x7DBE, 0x88BB, 0x7DBF, 0x96C8, 0x7DC7, 0xE35D,
+	0x7DCA, 0x8BD9, 0x7DCB, 0x94EA, 0x7DCF, 0x918D, 0x7DD1, 0x97CE,
+	0x7DD2, 0x8F8F, 0x7DD5, 0xE38E, 0x7DD6, 0xFB8E, 0x7DD8, 0xE367,
+	0x7DDA, 0x90FC, 0x7DDC, 0xE363, 0x7DDD, 0xE368, 0x7DDE, 0xE36A,
+	0x7DE0, 0x92F7, 0x7DE1, 0xE36D, 0x7DE4, 0xE369, 0x7DE8, 0x95D2,
+	0x7DE9, 0x8AC9, 0x7DEC, 0x96C9, 0x7DEF, 0x88DC, 0x7DF2, 0xE36C,
+	0x7DF4, 0x97FB, 0x7DFB, 0xE36B, 0x7E01, 0x898F, 0x7E04, 0x93EA,
+	0x7E05, 0xE36E, 0x7E09, 0xE375, 0x7E0A, 0xE36F, 0x7E0B, 0xE376,
+	0x7E12, 0xE372, 0x7E1B, 0x949B, 0x7E1E, 0x8EC8, 0x7E1F, 0xE374,
+	0x7E21, 0xE371, 0x7E22, 0xE377, 0x7E23, 0xE370, 0x7E26, 0x8F63,
+	0x7E2B, 0x9644, 0x7E2E, 0x8F6B, 0x7E31, 0xE373, 0x7E32, 0xE380,
+	0x7E35, 0xE37B, 0x7E37, 0xE37E, 0x7E39, 0xE37C, 0x7E3A, 0xE381,
+	0x7E3B, 0xE37A, 0x7E3D, 0xE360, 0x7E3E, 0x90D1, 0x7E41, 0x94C9,
+	0x7E43, 0xE37D, 0x7E46, 0xE378, 0x7E4A, 0x9140, 0x7E4B, 0x8C71,
+	0x7E4D, 0x8F4A, 0x7E52, 0xFB8F, 0x7E54, 0x9044, 0x7E55, 0x9155,
+	0x7E56, 0xE384, 0x7E59, 0xE386, 0x7E5A, 0xE387, 0x7E5D, 0xE383,
+	0x7E5E, 0xE385, 0x7E66, 0xE379, 0x7E67, 0xE382, 0x7E69, 0xE38A,
+	0x7E6A, 0xE389, 0x7E6D, 0x969A, 0x7E70, 0x8C4A, 0x7E79, 0xE388,
+	0x7E7B, 0xE38C, 0x7E7C, 0xE38B, 0x7E7D, 0xE38F, 0x7E7F, 0xE391,
+	0x7E82, 0x8E5B, 0x7E83, 0xE38D, 0x7E88, 0xE392, 0x7E89, 0xE393,
+	0x7E8A, 0xFA5C, 0x7E8C, 0xE394, 0x7E8E, 0xE39A, 0x7E8F, 0x935A,
+	0x7E90, 0xE396, 0x7E92, 0xE395, 0x7E93, 0xE397, 0x7E94, 0xE398,
+	0x7E96, 0xE399, 0x7E9B, 0xE39B, 0x7E9C, 0xE39C, 0x7F36, 0x8ACA,
+	0x7F38, 0xE39D, 0x7F3A, 0xE39E, 0x7F45, 0xE39F, 0x7F47, 0xFB90,
+	0x7F4C, 0xE3A0, 0x7F4D, 0xE3A1, 0x7F4E, 0xE3A2, 0x7F50, 0xE3A3,
+	0x7F51, 0xE3A4, 0x7F54, 0xE3A6, 0x7F55, 0xE3A5, 0x7F58, 0xE3A7,
+	0x7F5F, 0xE3A8, 0x7F60, 0xE3A9, 0x7F67, 0xE3AC, 0x7F68, 0xE3AA,
+	0x7F69, 0xE3AB, 0x7F6A, 0x8DDF, 0x7F6B, 0x8C72, 0x7F6E, 0x9275,
+	0x7F70, 0x94B1, 0x7F72, 0x8F90, 0x7F75, 0x946C, 0x7F77, 0x94EB,
+	0x7F78, 0xE3AD, 0x7F79, 0x9CEB, 0x7F82, 0xE3AE, 0x7F83, 0xE3B0,
+	0x7F85, 0x9785, 0x7F86, 0xE3AF, 0x7F87, 0xE3B2, 0x7F88, 0xE3B1,
+	0x7F8A, 0x9772, 0x7F8C, 0xE3B3, 0x7F8E, 0x94FC, 0x7F94, 0xE3B4,
+	0x7F9A, 0xE3B7, 0x7F9D, 0xE3B6, 0x7F9E, 0xE3B5, 0x7FA1, 0xFB91,
+	0x7FA3, 0xE3B8, 0x7FA4, 0x8C51, 0x7FA8, 0x9141, 0x7FA9, 0x8B60,
+	0x7FAE, 0xE3BC, 0x7FAF, 0xE3B9, 0x7FB2, 0xE3BA, 0x7FB6, 0xE3BD,
+	0x7FB8, 0xE3BE, 0x7FB9, 0xE3BB, 0x7FBD, 0x8948, 0x7FC1, 0x89A5,
+	0x7FC5, 0xE3C0, 0x7FC6, 0xE3C1, 0x7FCA, 0xE3C2, 0x7FCC, 0x9782,
+	0x7FD2, 0x8F4B, 0x7FD4, 0xE3C4, 0x7FD5, 0xE3C3, 0x7FE0, 0x9089,
+	0x7FE1, 0xE3C5, 0x7FE6, 0xE3C6, 0x7FE9, 0xE3C7, 0x7FEB, 0x8AE3,
+	0x7FF0, 0x8ACB, 0x7FF3, 0xE3C8, 0x7FF9, 0xE3C9, 0x7FFB, 0x967C,
+	0x7FFC, 0x9783, 0x8000, 0x9773, 0x8001, 0x9856, 0x8003, 0x8D6C,
+	0x8004, 0xE3CC, 0x8005, 0x8ED2, 0x8006, 0xE3CB, 0x800B, 0xE3CD,
+	0x800C, 0x8EA7, 0x8010, 0x91CF, 0x8012, 0xE3CE, 0x8015, 0x8D6B,
+	0x8017, 0x96D5, 0x8018, 0xE3CF, 0x8019, 0xE3D0, 0x801C, 0xE3D1,
+	0x8021, 0xE3D2, 0x8028, 0xE3D3, 0x8033, 0x8EA8, 0x8036, 0x96EB,
+	0x803B, 0xE3D5, 0x803D, 0x925E, 0x803F, 0xE3D4, 0x8046, 0xE3D7,
+	0x804A, 0xE3D6, 0x8052, 0xE3D8, 0x8056, 0x90B9, 0x8058, 0xE3D9,
+	0x805A, 0xE3DA, 0x805E, 0x95B7, 0x805F, 0xE3DB, 0x8061, 0x918F,
+	0x8062, 0xE3DC, 0x8068, 0xE3DD, 0x806F, 0x97FC, 0x8070, 0xE3E0,
+	0x8072, 0xE3DF, 0x8073, 0xE3DE, 0x8074, 0x92AE, 0x8076, 0xE3E1,
+	0x8077, 0x9045, 0x8079, 0xE3E2, 0x807D, 0xE3E3, 0x807E, 0x9857,
+	0x807F, 0xE3E4, 0x8084, 0xE3E5, 0x8085, 0xE3E7, 0x8086, 0xE3E6,
+	0x8087, 0x94A3, 0x8089, 0x93F7, 0x808B, 0x985D, 0x808C, 0x94A7,
+	0x8093, 0xE3E9, 0x8096, 0x8FD1, 0x8098, 0x9549, 0x809A, 0xE3EA,
+	0x809B, 0xE3E8, 0x809D, 0x8ACC, 0x80A1, 0x8CD2, 0x80A2, 0x8E88,
+	0x80A5, 0x94EC, 0x80A9, 0x8CA8, 0x80AA, 0x9662, 0x80AC, 0xE3ED,
+	0x80AD, 0xE3EB, 0x80AF, 0x8D6D, 0x80B1, 0x8D6E, 0x80B2, 0x88E7,
+	0x80B4, 0x8DE6, 0x80BA, 0x9478, 0x80C3, 0x88DD, 0x80C4, 0xE3F2,
+	0x80C6, 0x925F, 0x80CC, 0x9477, 0x80CE, 0x91D9, 0x80D6, 0xE3F4,
+	0x80D9, 0xE3F0, 0x80DA, 0xE3F3, 0x80DB, 0xE3EE, 0x80DD, 0xE3F1,
+	0x80DE, 0x9645, 0x80E1, 0x8CD3, 0x80E4, 0x88FB, 0x80E5, 0xE3EF,
+	0x80EF, 0xE3F6, 0x80F1, 0xE3F7, 0x80F4, 0x93B7, 0x80F8, 0x8BB9,
+	0x80FC, 0xE445, 0x80FD, 0x945C, 0x8102, 0x8E89, 0x8105, 0x8BBA,
+	0x8106, 0x90C6, 0x8107, 0x9865, 0x8108, 0x96AC, 0x8109, 0xE3F5,
+	0x810A, 0x90D2, 0x811A, 0x8B72, 0x811B, 0xE3F8, 0x8123, 0xE3FA,
+	0x8129, 0xE3F9, 0x812F, 0xE3FB, 0x8131, 0x9245, 0x8133, 0x945D,
+	0x8139, 0x92AF, 0x813E, 0xE442, 0x8146, 0xE441, 0x814B, 0xE3FC,
+	0x814E, 0x9074, 0x8150, 0x9585, 0x8151, 0xE444, 0x8153, 0xE443,
+	0x8154, 0x8D6F, 0x8155, 0x9872, 0x815F, 0xE454, 0x8165, 0xE448,
+	0x8166, 0xE449, 0x816B, 0x8EEE, 0x816E, 0xE447, 0x8170, 0x8D98,
+	0x8171, 0xE446, 0x8174, 0xE44A, 0x8178, 0x92B0, 0x8179, 0x95A0,
+	0x817A, 0x9142, 0x817F, 0x91DA, 0x8180, 0xE44E, 0x8182, 0xE44F,
+	0x8183, 0xE44B, 0x8188, 0xE44C, 0x818A, 0xE44D, 0x818F, 0x8D70,
+	0x8193, 0xE455, 0x8195, 0xE451, 0x819A, 0x9586, 0x819C, 0x968C,
+	0x819D, 0x9547, 0x81A0, 0xE450, 0x81A3, 0xE453, 0x81A4, 0xE452,
+	0x81A8, 0x9663, 0x81A9, 0xE456, 0x81B0, 0xE457, 0x81B3, 0x9156,
+	0x81B5, 0xE458, 0x81B8, 0xE45A, 0x81BA, 0xE45E, 0x81BD, 0xE45B,
+	0x81BE, 0xE459, 0x81BF, 0x945E, 0x81C0, 0xE45C, 0x81C2, 0xE45D,
+	0x81C6, 0x89B0, 0x81C8, 0xE464, 0x81C9, 0xE45F, 0x81CD, 0xE460,
+	0x81D1, 0xE461, 0x81D3, 0x919F, 0x81D8, 0xE463, 0x81D9, 0xE462,
+	0x81DA, 0xE465, 0x81DF, 0xE466, 0x81E0, 0xE467, 0x81E3, 0x9062,
+	0x81E5, 0x89E7, 0x81E7, 0xE468, 0x81E8, 0x97D5, 0x81EA, 0x8EA9,
+	0x81ED, 0x8F4C, 0x81F3, 0x8E8A, 0x81F4, 0x9276, 0x81FA, 0xE469,
+	0x81FB, 0xE46A, 0x81FC, 0x8950, 0x81FE, 0xE46B, 0x8201, 0xE46C,
+	0x8202, 0xE46D, 0x8205, 0xE46E, 0x8207, 0xE46F, 0x8208, 0x8BBB,
+	0x8209, 0x9DA8, 0x820A, 0xE470, 0x820C, 0x90E3, 0x820D, 0xE471,
+	0x820E, 0x8EC9, 0x8210, 0xE472, 0x8212, 0x98AE, 0x8216, 0xE473,
+	0x8217, 0x95DC, 0x8218, 0x8ADA, 0x821B, 0x9143, 0x821C, 0x8F77,
+	0x821E, 0x9591, 0x821F, 0x8F4D, 0x8229, 0xE474, 0x822A, 0x8D71,
+	0x822B, 0xE475, 0x822C, 0x94CA, 0x822E, 0xE484, 0x8233, 0xE477,
+	0x8235, 0x91C7, 0x8236, 0x9495, 0x8237, 0x8CBD, 0x8238, 0xE476,
+	0x8239, 0x9144, 0x8240, 0xE478, 0x8247, 0x92F8, 0x8258, 0xE47A,
+	0x8259, 0xE479, 0x825A, 0xE47C, 0x825D, 0xE47B, 0x825F, 0xE47D,
+	0x8262, 0xE480, 0x8264, 0xE47E, 0x8266, 0x8ACD, 0x8268, 0xE481,
+	0x826A, 0xE482, 0x826B, 0xE483, 0x826E, 0x8DAF, 0x826F, 0x97C7,
+	0x8271, 0xE485, 0x8272, 0x9046, 0x8276, 0x8990, 0x8277, 0xE486,
+	0x8278, 0xE487, 0x827E, 0xE488, 0x828B, 0x88F0, 0x828D, 0xE489,
+	0x8292, 0xE48A, 0x8299, 0x9587, 0x829D, 0x8EC5, 0x829F, 0xE48C,
+	0x82A5, 0x8A48, 0x82A6, 0x88B0, 0x82AB, 0xE48B, 0x82AC, 0xE48E,
+	0x82AD, 0x946D, 0x82AF, 0x9063, 0x82B1, 0x89D4, 0x82B3, 0x9646,
+	0x82B8, 0x8C7C, 0x82B9, 0x8BDA, 0x82BB, 0xE48D, 0x82BD, 0x89E8,
+	0x82C5, 0x8AA1, 0x82D1, 0x8991, 0x82D2, 0xE492, 0x82D3, 0x97E8,
+	0x82D4, 0x91DB, 0x82D7, 0x9563, 0x82D9, 0xE49E, 0x82DB, 0x89D5,
+	0x82DC, 0xE49C, 0x82DE, 0xE49A, 0x82DF, 0xE491, 0x82E1, 0xE48F,
+	0x82E3, 0xE490, 0x82E5, 0x8EE1, 0x82E6, 0x8BEA, 0x82E7, 0x9297,
+	0x82EB, 0x93CF, 0x82F1, 0x8970, 0x82F3, 0xE494, 0x82F4, 0xE493,
+	0x82F9, 0xE499, 0x82FA, 0xE495, 0x82FB, 0xE498, 0x8301, 0xFB93,
+	0x8302, 0x96CE, 0x8303, 0xE497, 0x8304, 0x89D6, 0x8305, 0x8A9D,
+	0x8306, 0xE49B, 0x8309, 0xE49D, 0x830E, 0x8C73, 0x8316, 0xE4A1,
+	0x8317, 0xE4AA, 0x8318, 0xE4AB, 0x831C, 0x88A9, 0x8323, 0xE4B2,
+	0x8328, 0x88EF, 0x832B, 0xE4A9, 0x832F, 0xE4A8, 0x8331, 0xE4A3,
+	0x8332, 0xE4A2, 0x8334, 0xE4A0, 0x8335, 0xE49F, 0x8336, 0x9283,
+	0x8338, 0x91F9, 0x8339, 0xE4A5, 0x8340, 0xE4A4, 0x8345, 0xE4A7,
+	0x8349, 0x9190, 0x834A, 0x8C74, 0x834F, 0x8960, 0x8350, 0xE4A6,
+	0x8352, 0x8D72, 0x8358, 0x9191, 0x8362, 0xFB94, 0x8373, 0xE4B8,
+	0x8375, 0xE4B9, 0x8377, 0x89D7, 0x837B, 0x89AC, 0x837C, 0xE4B6,
+	0x837F, 0xFB95, 0x8385, 0xE4AC, 0x8387, 0xE4B4, 0x8389, 0xE4BB,
+	0x838A, 0xE4B5, 0x838E, 0xE4B3, 0x8393, 0xE496, 0x8396, 0xE4B1,
+	0x839A, 0xE4AD, 0x839E, 0x8ACE, 0x839F, 0xE4AF, 0x83A0, 0xE4BA,
+	0x83A2, 0xE4B0, 0x83A8, 0xE4BC, 0x83AA, 0xE4AE, 0x83AB, 0x949C,
+	0x83B1, 0x9789, 0x83B5, 0xE4B7, 0x83BD, 0xE4CD, 0x83C1, 0xE4C5,
+	0x83C5, 0x909B, 0x83C7, 0xFB96, 0x83CA, 0x8B65, 0x83CC, 0x8BDB,
+	0x83CE, 0xE4C0, 0x83D3, 0x89D9, 0x83D6, 0x8FD2, 0x83D8, 0xE4C3,
+	0x83DC, 0x8DD8, 0x83DF, 0x9370, 0x83E0, 0xE4C8, 0x83E9, 0x95EC,
+	0x83EB, 0xE4BF, 0x83EF, 0x89D8, 0x83F0, 0x8CD4, 0x83F1, 0x9548,
+	0x83F2, 0xE4C9, 0x83F4, 0xE4BD, 0x83F6, 0xFB97, 0x83F7, 0xE4C6,
+	0x83FB, 0xE4D0, 0x83FD, 0xE4C1, 0x8403, 0xE4C2, 0x8404, 0x93B8,
+	0x8407, 0xE4C7, 0x840B, 0xE4C4, 0x840C, 0x9647, 0x840D, 0xE4CA,
+	0x840E, 0x88DE, 0x8413, 0xE4BE, 0x8420, 0xE4CC, 0x8422, 0xE4CB,
+	0x8429, 0x948B, 0x842A, 0xE4D2, 0x842C, 0xE4DD, 0x8431, 0x8A9E,
+	0x8435, 0xE4E0, 0x8438, 0xE4CE, 0x843C, 0xE4D3, 0x843D, 0x978E,
+	0x8446, 0xE4DC, 0x8448, 0xFB98, 0x8449, 0x9774, 0x844E, 0x97A8,
+	0x8457, 0x9298, 0x845B, 0x8A8B, 0x8461, 0x9592, 0x8462, 0xE4E2,
+	0x8463, 0x939F, 0x8466, 0x88AF, 0x8469, 0xE4DB, 0x846B, 0xE4D7,
+	0x846C, 0x9192, 0x846D, 0xE4D1, 0x846E, 0xE4D9, 0x846F, 0xE4DE,
+	0x8471, 0x944B, 0x8475, 0x88A8, 0x8477, 0xE4D6, 0x8479, 0xE4DF,
+	0x847A, 0x9598, 0x8482, 0xE4DA, 0x8484, 0xE4D5, 0x848B, 0x8FD3,
+	0x8490, 0x8F4E, 0x8494, 0x8EAA, 0x8499, 0x96D6, 0x849C, 0x9566,
+	0x849F, 0xE4E5, 0x84A1, 0xE4EE, 0x84AD, 0xE4D8, 0x84B2, 0x8A97,
+	0x84B4, 0xFB99, 0x84B8, 0x8FF6, 0x84B9, 0xE4E3, 0x84BB, 0xE4E8,
+	0x84BC, 0x9193, 0x84BF, 0xE4E4, 0x84C1, 0xE4EB, 0x84C4, 0x927E,
+	0x84C6, 0xE4EC, 0x84C9, 0x9775, 0x84CA, 0xE4E1, 0x84CB, 0x8A57,
+	0x84CD, 0xE4E7, 0x84D0, 0xE4EA, 0x84D1, 0x96AA, 0x84D6, 0xE4ED,
+	0x84D9, 0xE4E6, 0x84DA, 0xE4E9, 0x84DC, 0xFA60, 0x84EC, 0x9648,
+	0x84EE, 0x9840, 0x84F4, 0xE4F1, 0x84FC, 0xE4F8, 0x84FF, 0xE4F0,
+	0x8500, 0x8EC1, 0x8506, 0xE4CF, 0x8511, 0x95CC, 0x8513, 0x96A0,
+	0x8514, 0xE4F7, 0x8515, 0xE4F6, 0x8517, 0xE4F2, 0x8518, 0xE4F3,
+	0x851A, 0x8955, 0x851F, 0xE4F5, 0x8521, 0xE4EF, 0x8526, 0x92D3,
+	0x852C, 0xE4F4, 0x852D, 0x88FC, 0x8535, 0x91A0, 0x853D, 0x95C1,
+	0x8540, 0xE4F9, 0x8541, 0xE540, 0x8543, 0x94D7, 0x8548, 0xE4FC,
+	0x8549, 0x8FD4, 0x854A, 0x8EC7, 0x854B, 0xE542, 0x854E, 0x8BBC,
+	0x8553, 0xFB9A, 0x8555, 0xE543, 0x8557, 0x9599, 0x8558, 0xE4FB,
+	0x8559, 0xFB9B, 0x855A, 0xE4D4, 0x8563, 0xE4FA, 0x8568, 0x986E,
+	0x8569, 0x93A0, 0x856A, 0x9593, 0x856B, 0xFB9C, 0x856D, 0xE54A,
+	0x8577, 0xE550, 0x857E, 0xE551, 0x8580, 0xE544, 0x8584, 0x9496,
+	0x8587, 0xE54E, 0x8588, 0xE546, 0x858A, 0xE548, 0x8590, 0xE552,
+	0x8591, 0xE547, 0x8594, 0xE54B, 0x8597, 0x8992, 0x8599, 0x93E3,
+	0x859B, 0xE54C, 0x859C, 0xE54F, 0x85A4, 0xE545, 0x85A6, 0x9145,
+	0x85A8, 0xE549, 0x85A9, 0x8E46, 0x85AA, 0x9064, 0x85AB, 0x8C4F,
+	0x85AC, 0x96F2, 0x85AE, 0x96F7, 0x85AF, 0x8F92, 0x85B0, 0xFB9E,
+	0x85B9, 0xE556, 0x85BA, 0xE554, 0x85C1, 0x986D, 0x85C9, 0xE553,
+	0x85CD, 0x9795, 0x85CF, 0xE555, 0x85D0, 0xE557, 0x85D5, 0xE558,
+	0x85DC, 0xE55B, 0x85DD, 0xE559, 0x85E4, 0x93A1, 0x85E5, 0xE55A,
+	0x85E9, 0x94CB, 0x85EA, 0xE54D, 0x85F7, 0x8F93, 0x85F9, 0xE55C,
+	0x85FA, 0xE561, 0x85FB, 0x9194, 0x85FE, 0xE560, 0x8602, 0xE541,
+	0x8606, 0xE562, 0x8607, 0x9168, 0x860A, 0xE55D, 0x860B, 0xE55F,
+	0x8613, 0xE55E, 0x8616, 0x9F50, 0x8617, 0x9F41, 0x861A, 0xE564,
+	0x8622, 0xE563, 0x862D, 0x9796, 0x862F, 0xE1BA, 0x8630, 0xE565,
+	0x863F, 0xE566, 0x864D, 0xE567, 0x864E, 0x8CD5, 0x8650, 0x8B73,
+	0x8654, 0xE569, 0x8655, 0x997C, 0x865A, 0x8B95, 0x865C, 0x97B8,
+	0x865E, 0x8BF1, 0x865F, 0xE56A, 0x8667, 0xE56B, 0x866B, 0x928E,
+	0x8671, 0xE56C, 0x8679, 0x93F8, 0x867B, 0x88B8, 0x868A, 0x89E1,
+	0x868B, 0xE571, 0x868C, 0xE572, 0x8693, 0xE56D, 0x8695, 0x8E5C,
+	0x86A3, 0xE56E, 0x86A4, 0x9461, 0x86A9, 0xE56F, 0x86AA, 0xE570,
+	0x86AB, 0xE57A, 0x86AF, 0xE574, 0x86B0, 0xE577, 0x86B6, 0xE573,
+	0x86C4, 0xE575, 0x86C6, 0xE576, 0x86C7, 0x8ED6, 0x86C9, 0xE578,
+	0x86CB, 0x9260, 0x86CD, 0x8C75, 0x86CE, 0x8A61, 0x86D4, 0xE57B,
+	0x86D9, 0x8A5E, 0x86DB, 0xE581, 0x86DE, 0xE57C, 0x86DF, 0xE580,
+	0x86E4, 0x94B8, 0x86E9, 0xE57D, 0x86EC, 0xE57E, 0x86ED, 0x9567,
+	0x86EE, 0x94D8, 0x86EF, 0xE582, 0x86F8, 0x91FB, 0x86F9, 0xE58C,
+	0x86FB, 0xE588, 0x86FE, 0x89E9, 0x8700, 0xE586, 0x8702, 0x9649,
+	0x8703, 0xE587, 0x8706, 0xE584, 0x8708, 0xE585, 0x8709, 0xE58A,
+	0x870A, 0xE58D, 0x870D, 0xE58B, 0x8711, 0xE589, 0x8712, 0xE583,
+	0x8718, 0x9277, 0x871A, 0xE594, 0x871C, 0x96A8, 0x8725, 0xE592,
+	0x8729, 0xE593, 0x8734, 0xE58E, 0x8737, 0xE590, 0x873B, 0xE591,
+	0x873F, 0xE58F, 0x8749, 0x90E4, 0x874B, 0x9858, 0x874C, 0xE598,
+	0x874E, 0xE599, 0x8753, 0xE59F, 0x8755, 0x9049, 0x8757, 0xE59B,
+	0x8759, 0xE59E, 0x875F, 0xE596, 0x8760, 0xE595, 0x8763, 0xE5A0,
+	0x8766, 0x89DA, 0x8768, 0xE59C, 0x876A, 0xE5A1, 0x876E, 0xE59D,
+	0x8774, 0xE59A, 0x8776, 0x92B1, 0x8778, 0xE597, 0x877F, 0x9488,
+	0x8782, 0xE5A5, 0x878D, 0x975A, 0x879F, 0xE5A4, 0x87A2, 0xE5A3,
+	0x87AB, 0xE5AC, 0x87AF, 0xE5A6, 0x87B3, 0xE5AE, 0x87BA, 0x9786,
+	0x87BB, 0xE5B1, 0x87BD, 0xE5A8, 0x87C0, 0xE5A9, 0x87C4, 0xE5AD,
+	0x87C6, 0xE5B0, 0x87C7, 0xE5AF, 0x87CB, 0xE5A7, 0x87D0, 0xE5AA,
+	0x87D2, 0xE5BB, 0x87E0, 0xE5B4, 0x87EF, 0xE5B2, 0x87F2, 0xE5B3,
+	0x87F6, 0xE5B8, 0x87F7, 0xE5B9, 0x87F9, 0x8A49, 0x87FB, 0x8B61,
+	0x87FE, 0xE5B7, 0x8805, 0xE5A2, 0x8807, 0xFBA1, 0x880D, 0xE5B6,
+	0x880E, 0xE5BA, 0x880F, 0xE5B5, 0x8811, 0xE5BC, 0x8815, 0xE5BE,
+	0x8816, 0xE5BD, 0x8821, 0xE5C0, 0x8822, 0xE5BF, 0x8823, 0xE579,
+	0x8827, 0xE5C4, 0x8831, 0xE5C1, 0x8836, 0xE5C2, 0x8839, 0xE5C3,
+	0x883B, 0xE5C5, 0x8840, 0x8C8C, 0x8842, 0xE5C7, 0x8844, 0xE5C6,
+	0x8846, 0x8F4F, 0x884C, 0x8D73, 0x884D, 0x9FA5, 0x8852, 0xE5C8,
+	0x8853, 0x8F70, 0x8857, 0x8A58, 0x8859, 0xE5C9, 0x885B, 0x8971,
+	0x885D, 0x8FD5, 0x885E, 0xE5CA, 0x8861, 0x8D74, 0x8862, 0xE5CB,
+	0x8863, 0x88DF, 0x8868, 0x955C, 0x886B, 0xE5CC, 0x8870, 0x908A,
+	0x8872, 0xE5D3, 0x8875, 0xE5D0, 0x8877, 0x928F, 0x887D, 0xE5D1,
+	0x887E, 0xE5CE, 0x887F, 0x8BDC, 0x8881, 0xE5CD, 0x8882, 0xE5D4,
+	0x8888, 0x8C55, 0x888B, 0x91DC, 0x888D, 0xE5DA, 0x8892, 0xE5D6,
+	0x8896, 0x91B3, 0x8897, 0xE5D5, 0x8899, 0xE5D8, 0x889E, 0xE5CF,
+	0x88A2, 0xE5D9, 0x88A4, 0xE5DB, 0x88AB, 0x94ED, 0x88AE, 0xE5D7,
+	0x88B0, 0xE5DC, 0x88B1, 0xE5DE, 0x88B4, 0x8CD1, 0x88B5, 0xE5D2,
+	0x88B7, 0x88BF, 0x88BF, 0xE5DD, 0x88C1, 0x8DD9, 0x88C2, 0x97F4,
+	0x88C3, 0xE5DF, 0x88C4, 0xE5E0, 0x88C5, 0x9195, 0x88CF, 0x97A0,
+	0x88D4, 0xE5E1, 0x88D5, 0x9754, 0x88D8, 0xE5E2, 0x88D9, 0xE5E3,
+	0x88DC, 0x95E2, 0x88DD, 0xE5E4, 0x88DF, 0x8DBE, 0x88E1, 0x97A1,
+	0x88E8, 0xE5E9, 0x88F2, 0xE5EA, 0x88F3, 0x8FD6, 0x88F4, 0xE5E8,
+	0x88F5, 0xFBA2, 0x88F8, 0x9787, 0x88F9, 0xE5E5, 0x88FC, 0xE5E7,
+	0x88FD, 0x90BB, 0x88FE, 0x909E, 0x8902, 0xE5E6, 0x8904, 0xE5EB,
+	0x8907, 0x95A1, 0x890A, 0xE5ED, 0x890C, 0xE5EC, 0x8910, 0x8A8C,
+	0x8912, 0x964A, 0x8913, 0xE5EE, 0x891C, 0xFA5D, 0x891D, 0xE5FA,
+	0x891E, 0xE5F0, 0x8925, 0xE5F1, 0x892A, 0xE5F2, 0x892B, 0xE5F3,
+	0x8936, 0xE5F7, 0x8938, 0xE5F8, 0x893B, 0xE5F6, 0x8941, 0xE5F4,
+	0x8943, 0xE5EF, 0x8944, 0xE5F5, 0x894C, 0xE5F9, 0x894D, 0xE8B5,
+	0x8956, 0x89A6, 0x895E, 0xE5FC, 0x895F, 0x8BDD, 0x8960, 0xE5FB,
+	0x8964, 0xE641, 0x8966, 0xE640, 0x896A, 0xE643, 0x896D, 0xE642,
+	0x896F, 0xE644, 0x8972, 0x8F50, 0x8974, 0xE645, 0x8977, 0xE646,
+	0x897E, 0xE647, 0x897F, 0x90BC, 0x8981, 0x9776, 0x8983, 0xE648,
+	0x8986, 0x95A2, 0x8987, 0x9465, 0x8988, 0xE649, 0x898A, 0xE64A,
+	0x898B, 0x8CA9, 0x898F, 0x8B4B, 0x8993, 0xE64B, 0x8996, 0x8E8B,
+	0x8997, 0x9460, 0x8998, 0xE64C, 0x899A, 0x8A6F, 0x89A1, 0xE64D,
+	0x89A6, 0xE64F, 0x89A7, 0x9797, 0x89A9, 0xE64E, 0x89AA, 0x9065,
+	0x89AC, 0xE650, 0x89AF, 0xE651, 0x89B2, 0xE652, 0x89B3, 0x8ACF,
+	0x89BA, 0xE653, 0x89BD, 0xE654, 0x89BF, 0xE655, 0x89C0, 0xE656,
+	0x89D2, 0x8A70, 0x89DA, 0xE657, 0x89DC, 0xE658, 0x89DD, 0xE659,
+	0x89E3, 0x89F0, 0x89E6, 0x9047, 0x89E7, 0xE65A, 0x89F4, 0xE65B,
+	0x89F8, 0xE65C, 0x8A00, 0x8CBE, 0x8A02, 0x92F9, 0x8A03, 0xE65D,
+	0x8A08, 0x8C76, 0x8A0A, 0x9075, 0x8A0C, 0xE660, 0x8A0E, 0x93A2,
+	0x8A10, 0xE65F, 0x8A12, 0xFBA3, 0x8A13, 0x8C50, 0x8A16, 0xE65E,
+	0x8A17, 0x91F5, 0x8A18, 0x8B4C, 0x8A1B, 0xE661, 0x8A1D, 0xE662,
+	0x8A1F, 0x8FD7, 0x8A23, 0x8C8D, 0x8A25, 0xE663, 0x8A2A, 0x964B,
+	0x8A2D, 0x90DD, 0x8A31, 0x8B96, 0x8A33, 0x96F3, 0x8A34, 0x9169,
+	0x8A36, 0xE664, 0x8A37, 0xFBA4, 0x8A3A, 0x9066, 0x8A3B, 0x9290,
+	0x8A3C, 0x8FD8, 0x8A41, 0xE665, 0x8A46, 0xE668, 0x8A48, 0xE669,
+	0x8A50, 0x8DBC, 0x8A51, 0x91C0, 0x8A52, 0xE667, 0x8A54, 0x8FD9,
+	0x8A55, 0x955D, 0x8A5B, 0xE666, 0x8A5E, 0x8E8C, 0x8A60, 0x8972,
+	0x8A62, 0xE66D, 0x8A63, 0x8C77, 0x8A66, 0x8E8E, 0x8A69, 0x8E8D,
+	0x8A6B, 0x986C, 0x8A6C, 0xE66C, 0x8A6D, 0xE66B, 0x8A6E, 0x9146,
+	0x8A70, 0x8B6C, 0x8A71, 0x9862, 0x8A72, 0x8A59, 0x8A73, 0x8FDA,
+	0x8A79, 0xFBA5, 0x8A7C, 0xE66A, 0x8A82, 0xE66F, 0x8A84, 0xE670,
+	0x8A85, 0xE66E, 0x8A87, 0x8CD6, 0x8A89, 0x975F, 0x8A8C, 0x8E8F,
+	0x8A8D, 0x9446, 0x8A91, 0xE673, 0x8A93, 0x90BE, 0x8A95, 0x9261,
+	0x8A98, 0x9755, 0x8A9A, 0xE676, 0x8A9E, 0x8CEA, 0x8AA0, 0x90BD,
+	0x8AA1, 0xE672, 0x8AA3, 0xE677, 0x8AA4, 0x8CEB, 0x8AA5, 0xE674,
+	0x8AA6, 0xE675, 0x8AA7, 0xFBA6, 0x8AA8, 0xE671, 0x8AAC, 0x90E0,
+	0x8AAD, 0x93C7, 0x8AB0, 0x924E, 0x8AB2, 0x89DB, 0x8AB9, 0x94EE,
+	0x8ABC, 0x8B62, 0x8ABE, 0xFBA7, 0x8ABF, 0x92B2, 0x8AC2, 0xE67A,
+	0x8AC4, 0xE678, 0x8AC7, 0x926B, 0x8ACB, 0x90BF, 0x8ACC, 0x8AD0,
+	0x8ACD, 0xE679, 0x8ACF, 0x907A, 0x8AD2, 0x97C8, 0x8AD6, 0x985F,
+	0x8ADA, 0xE67B, 0x8ADB, 0xE687, 0x8ADC, 0x92B3, 0x8ADE, 0xE686,
+	0x8ADF, 0xFBA8, 0x8AE0, 0xE683, 0x8AE1, 0xE68B, 0x8AE2, 0xE684,
+	0x8AE4, 0xE680, 0x8AE6, 0x92FA, 0x8AE7, 0xE67E, 0x8AEB, 0xE67C,
+	0x8AED, 0x9740, 0x8AEE, 0x8E90, 0x8AF1, 0xE681, 0x8AF3, 0xE67D,
+	0x8AF6, 0xFBAA, 0x8AF7, 0xE685, 0x8AF8, 0x8F94, 0x8AFA, 0x8CBF,
+	0x8AFE, 0x91F8, 0x8B00, 0x9664, 0x8B01, 0x8979, 0x8B02, 0x88E0,
+	0x8B04, 0x93A3, 0x8B07, 0xE689, 0x8B0C, 0xE688, 0x8B0E, 0x93E4,
+	0x8B10, 0xE68D, 0x8B14, 0xE682, 0x8B16, 0xE68C, 0x8B17, 0xE68E,
+	0x8B19, 0x8CAA, 0x8B1A, 0xE68A, 0x8B1B, 0x8D75, 0x8B1D, 0x8ED3,
+	0x8B20, 0xE68F, 0x8B21, 0x9777, 0x8B26, 0xE692, 0x8B28, 0xE695,
+	0x8B2B, 0xE693, 0x8B2C, 0x9554, 0x8B33, 0xE690, 0x8B39, 0x8BDE,
+	0x8B3E, 0xE694, 0x8B41, 0xE696, 0x8B49, 0xE69A, 0x8B4C, 0xE697,
+	0x8B4E, 0xE699, 0x8B4F, 0xE698, 0x8B53, 0xFBAB, 0x8B56, 0xE69B,
+	0x8B58, 0x8EAF, 0x8B5A, 0xE69D, 0x8B5B, 0xE69C, 0x8B5C, 0x9588,
+	0x8B5F, 0xE69F, 0x8B66, 0x8C78, 0x8B6B, 0xE69E, 0x8B6C, 0xE6A0,
+	0x8B6F, 0xE6A1, 0x8B70, 0x8B63, 0x8B71, 0xE3BF, 0x8B72, 0x8FF7,
+	0x8B74, 0xE6A2, 0x8B77, 0x8CEC, 0x8B7D, 0xE6A3, 0x8B7F, 0xFBAC,
+	0x8B80, 0xE6A4, 0x8B83, 0x8E5D, 0x8B8A, 0x9DCC, 0x8B8C, 0xE6A5,
+	0x8B8E, 0xE6A6, 0x8B90, 0x8F51, 0x8B92, 0xE6A7, 0x8B93, 0xE6A8,
+	0x8B96, 0xE6A9, 0x8B99, 0xE6AA, 0x8B9A, 0xE6AB, 0x8C37, 0x924A,
+	0x8C3A, 0xE6AC, 0x8C3F, 0xE6AE, 0x8C41, 0xE6AD, 0x8C46, 0x93A4,
+	0x8C48, 0xE6AF, 0x8C4A, 0x964C, 0x8C4C, 0xE6B0, 0x8C4E, 0xE6B1,
+	0x8C50, 0xE6B2, 0x8C55, 0xE6B3, 0x8C5A, 0x93D8, 0x8C61, 0x8FDB,
+	0x8C62, 0xE6B4, 0x8C6A, 0x8D8B, 0x8C6B, 0x98AC, 0x8C6C, 0xE6B5,
+	0x8C78, 0xE6B6, 0x8C79, 0x955E, 0x8C7A, 0xE6B7, 0x8C7C, 0xE6BF,
+	0x8C82, 0xE6B8, 0x8C85, 0xE6BA, 0x8C89, 0xE6B9, 0x8C8A, 0xE6BB,
+	0x8C8C, 0x9665, 0x8C8D, 0xE6BC, 0x8C8E, 0xE6BD, 0x8C94, 0xE6BE,
+	0x8C98, 0xE6C0, 0x8C9D, 0x8A4C, 0x8C9E, 0x92E5, 0x8CA0, 0x9589,
+	0x8CA1, 0x8DE0, 0x8CA2, 0x8D76, 0x8CA7, 0x956E, 0x8CA8, 0x89DD,
+	0x8CA9, 0x94CC, 0x8CAA, 0xE6C3, 0x8CAB, 0x8AD1, 0x8CAC, 0x90D3,
+	0x8CAD, 0xE6C2, 0x8CAE, 0xE6C7, 0x8CAF, 0x9299, 0x8CB0, 0x96E1,
+	0x8CB2, 0xE6C5, 0x8CB3, 0xE6C6, 0x8CB4, 0x8B4D, 0x8CB6, 0xE6C8,
+	0x8CB7, 0x9483, 0x8CB8, 0x91DD, 0x8CBB, 0x94EF, 0x8CBC, 0x935C,
+	0x8CBD, 0xE6C4, 0x8CBF, 0x9666, 0x8CC0, 0x89EA, 0x8CC1, 0xE6CA,
+	0x8CC2, 0x9847, 0x8CC3, 0x92C0, 0x8CC4, 0x9864, 0x8CC7, 0x8E91,
+	0x8CC8, 0xE6C9, 0x8CCA, 0x91AF, 0x8CCD, 0xE6DA, 0x8CCE, 0x9147,
+	0x8CD1, 0x93F6, 0x8CD3, 0x956F, 0x8CDA, 0xE6CD, 0x8CDB, 0x8E5E,
+	0x8CDC, 0x8E92, 0x8CDE, 0x8FDC, 0x8CE0, 0x9485, 0x8CE2, 0x8CAB,
+	0x8CE3, 0xE6CC, 0x8CE4, 0xE6CB, 0x8CE6, 0x958A, 0x8CEA, 0x8EBF,
+	0x8CED, 0x9371, 0x8CF0, 0xFBAD, 0x8CF4, 0xFBAE, 0x8CFA, 0xE6CF,
+	0x8CFB, 0xE6D0, 0x8CFC, 0x8D77, 0x8CFD, 0xE6CE, 0x8D04, 0xE6D1,
+	0x8D05, 0xE6D2, 0x8D07, 0xE6D4, 0x8D08, 0x91A1, 0x8D0A, 0xE6D3,
+	0x8D0B, 0x8AE4, 0x8D0D, 0xE6D6, 0x8D0F, 0xE6D5, 0x8D10, 0xE6D7,
+	0x8D12, 0xFBAF, 0x8D13, 0xE6D9, 0x8D14, 0xE6DB, 0x8D16, 0xE6DC,
+	0x8D64, 0x90D4, 0x8D66, 0x8ECD, 0x8D67, 0xE6DD, 0x8D6B, 0x8A71,
+	0x8D6D, 0xE6DE, 0x8D70, 0x9196, 0x8D71, 0xE6DF, 0x8D73, 0xE6E0,
+	0x8D74, 0x958B, 0x8D76, 0xFBB0, 0x8D77, 0x8B4E, 0x8D81, 0xE6E1,
+	0x8D85, 0x92B4, 0x8D8A, 0x897A, 0x8D99, 0xE6E2, 0x8DA3, 0x8EEF,
+	0x8DA8, 0x9096, 0x8DB3, 0x91AB, 0x8DBA, 0xE6E5, 0x8DBE, 0xE6E4,
+	0x8DC2, 0xE6E3, 0x8DCB, 0xE6EB, 0x8DCC, 0xE6E9, 0x8DCF, 0xE6E6,
+	0x8DD6, 0xE6E8, 0x8DDA, 0xE6E7, 0x8DDB, 0xE6EA, 0x8DDD, 0x8B97,
+	0x8DDF, 0xE6EE, 0x8DE1, 0x90D5, 0x8DE3, 0xE6EF, 0x8DE8, 0x8CD7,
+	0x8DEA, 0xE6EC, 0x8DEB, 0xE6ED, 0x8DEF, 0x9848, 0x8DF3, 0x92B5,
+	0x8DF5, 0x9148, 0x8DFC, 0xE6F0, 0x8DFF, 0xE6F3, 0x8E08, 0xE6F1,
+	0x8E09, 0xE6F2, 0x8E0A, 0x9778, 0x8E0F, 0x93A5, 0x8E10, 0xE6F6,
+	0x8E1D, 0xE6F4, 0x8E1E, 0xE6F5, 0x8E1F, 0xE6F7, 0x8E2A, 0xE748,
+	0x8E30, 0xE6FA, 0x8E34, 0xE6FB, 0x8E35, 0xE6F9, 0x8E42, 0xE6F8,
+	0x8E44, 0x92FB, 0x8E47, 0xE740, 0x8E48, 0xE744, 0x8E49, 0xE741,
+	0x8E4A, 0xE6FC, 0x8E4C, 0xE742, 0x8E50, 0xE743, 0x8E55, 0xE74A,
+	0x8E59, 0xE745, 0x8E5F, 0x90D6, 0x8E60, 0xE747, 0x8E63, 0xE749,
+	0x8E64, 0xE746, 0x8E72, 0xE74C, 0x8E74, 0x8F52, 0x8E76, 0xE74B,
+	0x8E7C, 0xE74D, 0x8E81, 0xE74E, 0x8E84, 0xE751, 0x8E85, 0xE750,
+	0x8E87, 0xE74F, 0x8E8A, 0xE753, 0x8E8B, 0xE752, 0x8E8D, 0x96F4,
+	0x8E91, 0xE755, 0x8E93, 0xE754, 0x8E94, 0xE756, 0x8E99, 0xE757,
+	0x8EA1, 0xE759, 0x8EAA, 0xE758, 0x8EAB, 0x9067, 0x8EAC, 0xE75A,
+	0x8EAF, 0x8BEB, 0x8EB0, 0xE75B, 0x8EB1, 0xE75D, 0x8EBE, 0xE75E,
+	0x8EC5, 0xE75F, 0x8EC6, 0xE75C, 0x8EC8, 0xE760, 0x8ECA, 0x8ED4,
+	0x8ECB, 0xE761, 0x8ECC, 0x8B4F, 0x8ECD, 0x8C52, 0x8ECF, 0xFBB2,
+	0x8ED2, 0x8CAC, 0x8EDB, 0xE762, 0x8EDF, 0x93EE, 0x8EE2, 0x935D,
+	0x8EE3, 0xE763, 0x8EEB, 0xE766, 0x8EF8, 0x8EB2, 0x8EFB, 0xE765,
+	0x8EFC, 0xE764, 0x8EFD, 0x8C79, 0x8EFE, 0xE767, 0x8F03, 0x8A72,
+	0x8F05, 0xE769, 0x8F09, 0x8DDA, 0x8F0A, 0xE768, 0x8F0C, 0xE771,
+	0x8F12, 0xE76B, 0x8F13, 0xE76D, 0x8F14, 0x95E3, 0x8F15, 0xE76A,
+	0x8F19, 0xE76C, 0x8F1B, 0xE770, 0x8F1C, 0xE76E, 0x8F1D, 0x8B50,
+	0x8F1F, 0xE76F, 0x8F26, 0xE772, 0x8F29, 0x9479, 0x8F2A, 0x97D6,
+	0x8F2F, 0x8F53, 0x8F33, 0xE773, 0x8F38, 0x9741, 0x8F39, 0xE775,
+	0x8F3B, 0xE774, 0x8F3E, 0xE778, 0x8F3F, 0x9760, 0x8F42, 0xE777,
+	0x8F44, 0x8A8D, 0x8F45, 0xE776, 0x8F46, 0xE77B, 0x8F49, 0xE77A,
+	0x8F4C, 0xE779, 0x8F4D, 0x9351, 0x8F4E, 0xE77C, 0x8F57, 0xE77D,
+	0x8F5C, 0xE77E, 0x8F5F, 0x8D8C, 0x8F61, 0x8C44, 0x8F62, 0xE780,
+	0x8F63, 0xE781, 0x8F64, 0xE782, 0x8F9B, 0x9068, 0x8F9C, 0xE783,
+	0x8F9E, 0x8EAB, 0x8F9F, 0xE784, 0x8FA3, 0xE785, 0x8FA7, 0x999F,
+	0x8FA8, 0x999E, 0x8FAD, 0xE786, 0x8FAE, 0xE390, 0x8FAF, 0xE787,
+	0x8FB0, 0x9243, 0x8FB1, 0x904A, 0x8FB2, 0x945F, 0x8FB7, 0xE788,
+	0x8FBA, 0x95D3, 0x8FBB, 0x92D2, 0x8FBC, 0x8D9E, 0x8FBF, 0x9248,
+	0x8FC2, 0x8949, 0x8FC4, 0x9698, 0x8FC5, 0x9076, 0x8FCE, 0x8C7D,
+	0x8FD1, 0x8BDF, 0x8FD4, 0x95D4, 0x8FDA, 0xE789, 0x8FE2, 0xE78B,
+	0x8FE5, 0xE78A, 0x8FE6, 0x89DE, 0x8FE9, 0x93F4, 0x8FEA, 0xE78C,
+	0x8FEB, 0x9497, 0x8FED, 0x9352, 0x8FEF, 0xE78D, 0x8FF0, 0x8F71,
+	0x8FF4, 0xE78F, 0x8FF7, 0x96C0, 0x8FF8, 0xE79E, 0x8FF9, 0xE791,
+	0x8FFA, 0xE792, 0x8FFD, 0x92C7, 0x9000, 0x91DE, 0x9001, 0x9197,
+	0x9003, 0x93A6, 0x9005, 0xE790, 0x9006, 0x8B74, 0x900B, 0xE799,
+	0x900D, 0xE796, 0x900E, 0xE7A3, 0x900F, 0x93A7, 0x9010, 0x9280,
+	0x9011, 0xE793, 0x9013, 0x92FC, 0x9014, 0x9372, 0x9015, 0xE794,
+	0x9016, 0xE798, 0x9017, 0x9080, 0x9019, 0x9487, 0x901A, 0x92CA,
+	0x901D, 0x90C0, 0x901E, 0xE797, 0x901F, 0x91AC, 0x9020, 0x91A2,
+	0x9021, 0xE795, 0x9022, 0x88A7, 0x9023, 0x9841, 0x9027, 0xE79A,
+	0x902E, 0x91DF, 0x9031, 0x8F54, 0x9032, 0x9069, 0x9035, 0xE79C,
+	0x9036, 0xE79B, 0x9038, 0x88ED, 0x9039, 0xE79D, 0x903C, 0x954E,
+	0x903E, 0xE7A5, 0x9041, 0x93D9, 0x9042, 0x908B, 0x9045, 0x9278,
+	0x9047, 0x8BF6, 0x9049, 0xE7A4, 0x904A, 0x9756, 0x904B, 0x895E,
+	0x904D, 0x95D5, 0x904E, 0x89DF, 0x904F, 0xE79F, 0x9050, 0xE7A0,
+	0x9051, 0xE7A1, 0x9052, 0xE7A2, 0x9053, 0x93B9, 0x9054, 0x9242,
+	0x9055, 0x88E1, 0x9056, 0xE7A6, 0x9058, 0xE7A7, 0x9059, 0xEAA1,
+	0x905C, 0x91BB, 0x905E, 0xE7A8, 0x9060, 0x8993, 0x9061, 0x916B,
+	0x9063, 0x8CAD, 0x9065, 0x9779, 0x9067, 0xFBB5, 0x9068, 0xE7A9,
+	0x9069, 0x934B, 0x906D, 0x9198, 0x906E, 0x8ED5, 0x906F, 0xE7AA,
+	0x9072, 0xE7AD, 0x9075, 0x8F85, 0x9076, 0xE7AB, 0x9077, 0x914A,
+	0x9078, 0x9149, 0x907A, 0x88E2, 0x907C, 0x97C9, 0x907D, 0xE7AF,
+	0x907F, 0x94F0, 0x9080, 0xE7B1, 0x9081, 0xE7B0, 0x9082, 0xE7AE,
+	0x9083, 0xE284, 0x9084, 0x8AD2, 0x9087, 0xE78E, 0x9089, 0xE7B3,
+	0x908A, 0xE7B2, 0x908F, 0xE7B4, 0x9091, 0x9757, 0x90A3, 0x93DF,
+	0x90A6, 0x964D, 0x90A8, 0xE7B5, 0x90AA, 0x8ED7, 0x90AF, 0xE7B6,
+	0x90B1, 0xE7B7, 0x90B5, 0xE7B8, 0x90B8, 0x9340, 0x90C1, 0x88E8,
+	0x90CA, 0x8D78, 0x90CE, 0x9859, 0x90DB, 0xE7BC, 0x90DE, 0xFBB6,
+	0x90E1, 0x8C53, 0x90E2, 0xE7B9, 0x90E4, 0xE7BA, 0x90E8, 0x9594,
+	0x90ED, 0x8A73, 0x90F5, 0x9758, 0x90F7, 0x8BBD, 0x90FD, 0x9373,
+	0x9102, 0xE7BD, 0x9112, 0xE7BE, 0x9115, 0xFBB8, 0x9119, 0xE7BF,
+	0x9127, 0xFBB9, 0x912D, 0x9341, 0x9130, 0xE7C1, 0x9132, 0xE7C0,
+	0x9149, 0x93D1, 0x914A, 0xE7C2, 0x914B, 0x8F55, 0x914C, 0x8EDE,
+	0x914D, 0x947A, 0x914E, 0x9291, 0x9152, 0x8EF0, 0x9154, 0x908C,
+	0x9156, 0xE7C3, 0x9158, 0xE7C4, 0x9162, 0x907C, 0x9163, 0xE7C5,
+	0x9165, 0xE7C6, 0x9169, 0xE7C7, 0x916A, 0x978F, 0x916C, 0x8F56,
+	0x9172, 0xE7C9, 0x9173, 0xE7C8, 0x9175, 0x8D79, 0x9177, 0x8D93,
+	0x9178, 0x8E5F, 0x9182, 0xE7CC, 0x9187, 0x8F86, 0x9189, 0xE7CB,
+	0x918B, 0xE7CA, 0x918D, 0x91E7, 0x9190, 0x8CED, 0x9192, 0x90C1,
+	0x9197, 0x94AE, 0x919C, 0x8F58, 0x91A2, 0xE7CD, 0x91A4, 0x8FDD,
+	0x91AA, 0xE7D0, 0x91AB, 0xE7CE, 0x91AF, 0xE7CF, 0x91B4, 0xE7D2,
+	0x91B5, 0xE7D1, 0x91B8, 0x8FF8, 0x91BA, 0xE7D3, 0x91C0, 0xE7D4,
+	0x91C1, 0xE7D5, 0x91C6, 0x94CE, 0x91C7, 0x8DD1, 0x91C8, 0x8EDF,
+	0x91C9, 0xE7D6, 0x91CB, 0xE7D7, 0x91CC, 0x97A2, 0x91CD, 0x8F64,
+	0x91CE, 0x96EC, 0x91CF, 0x97CA, 0x91D0, 0xE7D8, 0x91D1, 0x8BE0,
+	0x91D6, 0xE7D9, 0x91D7, 0xFBBB, 0x91D8, 0x9342, 0x91DA, 0xFBBA,
+	0x91DB, 0xE7DC, 0x91DC, 0x8A98, 0x91DD, 0x906A, 0x91DE, 0xFBBC,
+	0x91DF, 0xE7DA, 0x91E1, 0xE7DB, 0x91E3, 0x92DE, 0x91E4, 0xFBBF,
+	0x91E5, 0xFBC0, 0x91E6, 0x9674, 0x91E7, 0x8BFA, 0x91ED, 0xFBBD,
+	0x91EE, 0xFBBE, 0x91F5, 0xE7DE, 0x91F6, 0xE7DF, 0x91FC, 0xE7DD,
+	0x91FF, 0xE7E1, 0x9206, 0xFBC1, 0x920A, 0xFBC3, 0x920D, 0x93DD,
+	0x920E, 0x8A62, 0x9210, 0xFBC2, 0x9211, 0xE7E5, 0x9214, 0xE7E2,
+	0x9215, 0xE7E4, 0x921E, 0xE7E0, 0x9229, 0xE86E, 0x922C, 0xE7E3,
+	0x9234, 0x97E9, 0x9237, 0x8CD8, 0x9239, 0xFBCA, 0x923A, 0xFBC4,
+	0x923C, 0xFBC6, 0x923F, 0xE7ED, 0x9240, 0xFBC5, 0x9244, 0x9353,
+	0x9245, 0xE7E8, 0x9248, 0xE7EB, 0x9249, 0xE7E9, 0x924B, 0xE7EE,
+	0x924E, 0xFBC7, 0x9250, 0xE7EF, 0x9251, 0xFBC9, 0x9257, 0xE7E7,
+	0x9259, 0xFBC8, 0x925A, 0xE7F4, 0x925B, 0x8994, 0x925E, 0xE7E6,
+	0x9262, 0x94AB, 0x9264, 0xE7EA, 0x9266, 0x8FDE, 0x9267, 0xFBCB,
+	0x9271, 0x8D7A, 0x9277, 0xFBCD, 0x9278, 0xFBCE, 0x927E, 0x9667,
+	0x9280, 0x8BE2, 0x9283, 0x8F65, 0x9285, 0x93BA, 0x9288, 0xFA5F,
+	0x9291, 0x914C, 0x9293, 0xE7F2, 0x9295, 0xE7EC, 0x9296, 0xE7F1,
+	0x9298, 0x96C1, 0x929A, 0x92B6, 0x929B, 0xE7F3, 0x929C, 0xE7F0,
+	0x92A7, 0xFBCC, 0x92AD, 0x914B, 0x92B7, 0xE7F7, 0x92B9, 0xE7F6,
+	0x92CF, 0xE7F5, 0x92D0, 0xFBD2, 0x92D2, 0x964E, 0x92D3, 0xFBD6,
+	0x92D5, 0xFBD4, 0x92D7, 0xFBD0, 0x92D9, 0xFBD1, 0x92E0, 0xFBD5,
+	0x92E4, 0x8F9B, 0x92E7, 0xFBCF, 0x92E9, 0xE7F8, 0x92EA, 0x95DD,
+	0x92ED, 0x8973, 0x92F2, 0x9565, 0x92F3, 0x9292, 0x92F8, 0x8B98,
+	0x92F9, 0xFA65, 0x92FA, 0xE7FA, 0x92FB, 0xFBD9, 0x92FC, 0x8D7C,
+	0x92FF, 0xFBDC, 0x9302, 0xFBDE, 0x9306, 0x8E4B, 0x930F, 0xE7F9,
+	0x9310, 0x908D, 0x9318, 0x908E, 0x9319, 0xE840, 0x931A, 0xE842,
+	0x931D, 0xFBDD, 0x931E, 0xFBDB, 0x9320, 0x8FF9, 0x9321, 0xFBD8,
+	0x9322, 0xE841, 0x9323, 0xE843, 0x9325, 0xFBD7, 0x9326, 0x8BD1,
+	0x9328, 0x9564, 0x932B, 0x8EE0, 0x932C, 0x9842, 0x932E, 0xE7FC,
+	0x932F, 0x8DF6, 0x9332, 0x985E, 0x9335, 0xE845, 0x933A, 0xE844,
+	0x933B, 0xE846, 0x9344, 0xE7FB, 0x9348, 0xFA5E, 0x934B, 0x93E7,
+	0x934D, 0x9374, 0x9354, 0x92D5, 0x9356, 0xE84B, 0x9357, 0xFBE0,
+	0x935B, 0x9262, 0x935C, 0xE847, 0x9360, 0xE848, 0x936C, 0x8C4C,
+	0x936E, 0xE84A, 0x9370, 0xFBDF, 0x9375, 0x8CAE, 0x937C, 0xE849,
+	0x937E, 0x8FDF, 0x938C, 0x8A99, 0x9394, 0xE84F, 0x9396, 0x8DBD,
+	0x9397, 0x9199, 0x939A, 0x92C8, 0x93A4, 0xFBE1, 0x93A7, 0x8A5A,
+	0x93AC, 0xE84D, 0x93AD, 0xE84E, 0x93AE, 0x92C1, 0x93B0, 0xE84C,
+	0x93B9, 0xE850, 0x93C3, 0xE856, 0x93C6, 0xFBE2, 0x93C8, 0xE859,
+	0x93D0, 0xE858, 0x93D1, 0x934C, 0x93D6, 0xE851, 0x93D7, 0xE852,
+	0x93D8, 0xE855, 0x93DD, 0xE857, 0x93DE, 0xFBE3, 0x93E1, 0x8BBE,
+	0x93E4, 0xE85A, 0x93E5, 0xE854, 0x93E8, 0xE853, 0x93F8, 0xFBE4,
+	0x9403, 0xE85E, 0x9407, 0xE85F, 0x9410, 0xE860, 0x9413, 0xE85D,
+	0x9414, 0xE85C, 0x9418, 0x8FE0, 0x9419, 0x93A8, 0x941A, 0xE85B,
+	0x9421, 0xE864, 0x942B, 0xE862, 0x9431, 0xFBE5, 0x9435, 0xE863,
+	0x9436, 0xE861, 0x9438, 0x91F6, 0x943A, 0xE865, 0x9441, 0xE866,
+	0x9444, 0xE868, 0x9445, 0xFBE6, 0x9448, 0xFBE7, 0x9451, 0x8AD3,
+	0x9452, 0xE867, 0x9453, 0x96F8, 0x945A, 0xE873, 0x945B, 0xE869,
+	0x945E, 0xE86C, 0x9460, 0xE86A, 0x9462, 0xE86B, 0x946A, 0xE86D,
+	0x9470, 0xE86F, 0x9475, 0xE870, 0x9477, 0xE871, 0x947C, 0xE874,
+	0x947D, 0xE872, 0x947E, 0xE875, 0x947F, 0xE877, 0x9481, 0xE876,
+	0x9577, 0x92B7, 0x9580, 0x96E5, 0x9582, 0xE878, 0x9583, 0x914D,
+	0x9587, 0xE879, 0x9589, 0x95C2, 0x958A, 0xE87A, 0x958B, 0x8A4A,
+	0x958F, 0x895B, 0x9591, 0x8AD5, 0x9592, 0xFBE8, 0x9593, 0x8AD4,
+	0x9594, 0xE87B, 0x9596, 0xE87C, 0x9598, 0xE87D, 0x9599, 0xE87E,
+	0x95A0, 0xE880, 0x95A2, 0x8AD6, 0x95A3, 0x8A74, 0x95A4, 0x8D7D,
+	0x95A5, 0x94B4, 0x95A7, 0xE882, 0x95A8, 0xE881, 0x95AD, 0xE883,
+	0x95B2, 0x897B, 0x95B9, 0xE886, 0x95BB, 0xE885, 0x95BC, 0xE884,
+	0x95BE, 0xE887, 0x95C3, 0xE88A, 0x95C7, 0x88C5, 0x95CA, 0xE888,
+	0x95CC, 0xE88C, 0x95CD, 0xE88B, 0x95D4, 0xE88E, 0x95D5, 0xE88D,
+	0x95D6, 0xE88F, 0x95D8, 0x93AC, 0x95DC, 0xE890, 0x95E1, 0xE891,
+	0x95E2, 0xE893, 0x95E5, 0xE892, 0x961C, 0x958C, 0x9621, 0xE894,
+	0x9628, 0xE895, 0x962A, 0x8DE3, 0x962E, 0xE896, 0x962F, 0xE897,
+	0x9632, 0x9668, 0x963B, 0x916A, 0x963F, 0x88A2, 0x9640, 0x91C9,
+	0x9642, 0xE898, 0x9644, 0x958D, 0x964B, 0xE89B, 0x964C, 0xE899,
+	0x964D, 0x8D7E, 0x964F, 0xE89A, 0x9650, 0x8CC0, 0x965B, 0x95C3,
+	0x965C, 0xE89D, 0x965D, 0xE89F, 0x965E, 0xE89E, 0x965F, 0xE8A0,
+	0x9662, 0x8940, 0x9663, 0x9077, 0x9664, 0x8F9C, 0x9665, 0x8AD7,
+	0x9666, 0xE8A1, 0x966A, 0x9486, 0x966C, 0xE8A3, 0x9670, 0x8941,
+	0x9672, 0xE8A2, 0x9673, 0x92C2, 0x9675, 0x97CB, 0x9676, 0x93A9,
+	0x9677, 0xE89C, 0x9678, 0x97A4, 0x967A, 0x8CAF, 0x967D, 0x977A,
+	0x9685, 0x8BF7, 0x9686, 0x97B2, 0x9688, 0x8C47, 0x968A, 0x91E0,
+	0x968B, 0xE440, 0x968D, 0xE8A4, 0x968E, 0x8A4B, 0x968F, 0x908F,
+	0x9694, 0x8A75, 0x9695, 0xE8A6, 0x9697, 0xE8A7, 0x9698, 0xE8A5,
+	0x9699, 0x8C84, 0x969B, 0x8DDB, 0x969C, 0x8FE1, 0x969D, 0xFBEB,
+	0x96A0, 0x8942, 0x96A3, 0x97D7, 0x96A7, 0xE8A9, 0x96A8, 0xE7AC,
+	0x96AA, 0xE8A8, 0x96AF, 0xFBEC, 0x96B0, 0xE8AC, 0x96B1, 0xE8AA,
+	0x96B2, 0xE8AB, 0x96B4, 0xE8AD, 0x96B6, 0xE8AE, 0x96B7, 0x97EA,
+	0x96B8, 0xE8AF, 0x96B9, 0xE8B0, 0x96BB, 0x90C7, 0x96BC, 0x94B9,
+	0x96C0, 0x909D, 0x96C1, 0x8AE5, 0x96C4, 0x9759, 0x96C5, 0x89EB,
+	0x96C6, 0x8F57, 0x96C7, 0x8CD9, 0x96C9, 0xE8B3, 0x96CB, 0xE8B2,
+	0x96CC, 0x8E93, 0x96CD, 0xE8B4, 0x96CE, 0xE8B1, 0x96D1, 0x8E47,
+	0x96D5, 0xE8B8, 0x96D6, 0xE5AB, 0x96D9, 0x99D4, 0x96DB, 0x9097,
+	0x96DC, 0xE8B6, 0x96E2, 0x97A3, 0x96E3, 0x93EF, 0x96E8, 0x894A,
+	0x96EA, 0x90E1, 0x96EB, 0x8EB4, 0x96F0, 0x95B5, 0x96F2, 0x895F,
+	0x96F6, 0x97EB, 0x96F7, 0x978B, 0x96F9, 0xE8B9, 0x96FB, 0x9364,
+	0x9700, 0x8EF9, 0x9704, 0xE8BA, 0x9706, 0xE8BB, 0x9707, 0x906B,
+	0x9708, 0xE8BC, 0x970A, 0x97EC, 0x970D, 0xE8B7, 0x970E, 0xE8BE,
+	0x970F, 0xE8C0, 0x9711, 0xE8BF, 0x9713, 0xE8BD, 0x9716, 0xE8C1,
+	0x9719, 0xE8C2, 0x971C, 0x919A, 0x971E, 0x89E0, 0x9724, 0xE8C3,
+	0x9727, 0x96B6, 0x972A, 0xE8C4, 0x9730, 0xE8C5, 0x9732, 0x9849,
+	0x9733, 0xFBED, 0x9738, 0x9E50, 0x9739, 0xE8C6, 0x973B, 0xFBEE,
+	0x973D, 0xE8C7, 0x973E, 0xE8C8, 0x9742, 0xE8CC, 0x9743, 0xFBEF,
+	0x9744, 0xE8C9, 0x9746, 0xE8CA, 0x9748, 0xE8CB, 0x9749, 0xE8CD,
+	0x974D, 0xFBF0, 0x974F, 0xFBF1, 0x9751, 0xFBF2, 0x9752, 0x90C2,
+	0x9755, 0xFBF3, 0x9756, 0x96F5, 0x9759, 0x90C3, 0x975C, 0xE8CE,
+	0x975E, 0x94F1, 0x9760, 0xE8CF, 0x9761, 0xEA72, 0x9762, 0x96CA,
+	0x9764, 0xE8D0, 0x9766, 0xE8D1, 0x9768, 0xE8D2, 0x9769, 0x8A76,
+	0x976B, 0xE8D4, 0x976D, 0x9078, 0x9771, 0xE8D5, 0x9774, 0x8C43,
+	0x9779, 0xE8D6, 0x977A, 0xE8DA, 0x977C, 0xE8D8, 0x9781, 0xE8D9,
+	0x9784, 0x8A93, 0x9785, 0xE8D7, 0x9786, 0xE8DB, 0x978B, 0xE8DC,
+	0x978D, 0x88C6, 0x978F, 0xE8DD, 0x9790, 0xE8DE, 0x9798, 0x8FE2,
+	0x979C, 0xE8DF, 0x97A0, 0x8B66, 0x97A3, 0xE8E2, 0x97A6, 0xE8E1,
+	0x97A8, 0xE8E0, 0x97AB, 0xE691, 0x97AD, 0x95DA, 0x97B3, 0xE8E3,
+	0x97B4, 0xE8E4, 0x97C3, 0xE8E5, 0x97C6, 0xE8E6, 0x97C8, 0xE8E7,
+	0x97CB, 0xE8E8, 0x97D3, 0x8AD8, 0x97DC, 0xE8E9, 0x97ED, 0xE8EA,
+	0x97EE, 0x9442, 0x97F2, 0xE8EC, 0x97F3, 0x89B9, 0x97F5, 0xE8EF,
+	0x97F6, 0xE8EE, 0x97FB, 0x8943, 0x97FF, 0x8BBF, 0x9801, 0x95C5,
+	0x9802, 0x92B8, 0x9803, 0x8DA0, 0x9805, 0x8D80, 0x9806, 0x8F87,
+	0x9808, 0x907B, 0x980C, 0xE8F1, 0x980F, 0xE8F0, 0x9810, 0x9761,
+	0x9811, 0x8AE6, 0x9812, 0x94D0, 0x9813, 0x93DA, 0x9817, 0x909C,
+	0x9818, 0x97CC, 0x981A, 0x8C7A, 0x9821, 0xE8F4, 0x9824, 0xE8F3,
+	0x982C, 0x966A, 0x982D, 0x93AA, 0x9834, 0x896F, 0x9837, 0xE8F5,
+	0x9838, 0xE8F2, 0x983B, 0x9570, 0x983C, 0x978A, 0x983D, 0xE8F6,
+	0x9846, 0xE8F7, 0x984B, 0xE8F9, 0x984C, 0x91E8, 0x984D, 0x8A7A,
+	0x984E, 0x8A7B, 0x984F, 0xE8F8, 0x9854, 0x8AE7, 0x9855, 0x8CB0,
+	0x9857, 0xFBF4, 0x9858, 0x8AE8, 0x985B, 0x935E, 0x985E, 0x97DE,
+	0x9865, 0xFBF5, 0x9867, 0x8CDA, 0x986B, 0xE8FA, 0x986F, 0xE8FB,
+	0x9870, 0xE8FC, 0x9871, 0xE940, 0x9873, 0xE942, 0x9874, 0xE941,
+	0x98A8, 0x9597, 0x98AA, 0xE943, 0x98AF, 0xE944, 0x98B1, 0xE945,
+	0x98B6, 0xE946, 0x98C3, 0xE948, 0x98C4, 0xE947, 0x98C6, 0xE949,
+	0x98DB, 0x94F2, 0x98DC, 0xE3CA, 0x98DF, 0x9048, 0x98E2, 0x8B51,
+	0x98E9, 0xE94A, 0x98EB, 0xE94B, 0x98ED, 0x99AA, 0x98EE, 0x9F5A,
+	0x98EF, 0x94D1, 0x98F2, 0x88F9, 0x98F4, 0x88B9, 0x98FC, 0x8E94,
+	0x98FD, 0x964F, 0x98FE, 0x8FFC, 0x9903, 0xE94C, 0x9905, 0x96DD,
+	0x9909, 0xE94D, 0x990A, 0x977B, 0x990C, 0x8961, 0x9910, 0x8E60,
+	0x9912, 0xE94E, 0x9913, 0x89EC, 0x9914, 0xE94F, 0x9918, 0xE950,
+	0x991D, 0xE952, 0x991E, 0xE953, 0x9920, 0xE955, 0x9921, 0xE951,
+	0x9924, 0xE954, 0x9927, 0xFBF8, 0x9928, 0x8AD9, 0x992C, 0xE956,
+	0x992E, 0xE957, 0x993D, 0xE958, 0x993E, 0xE959, 0x9942, 0xE95A,
+	0x9945, 0xE95C, 0x9949, 0xE95B, 0x994B, 0xE95E, 0x994C, 0xE961,
+	0x9950, 0xE95D, 0x9951, 0xE95F, 0x9952, 0xE960, 0x9955, 0xE962,
+	0x9957, 0x8BC0, 0x9996, 0x8EF1, 0x9997, 0xE963, 0x9998, 0xE964,
+	0x9999, 0x8D81, 0x999E, 0xFBFA, 0x99A5, 0xE965, 0x99A8, 0x8A5D,
+	0x99AC, 0x946E, 0x99AD, 0xE966, 0x99AE, 0xE967, 0x99B3, 0x9279,
+	0x99B4, 0x93E9, 0x99BC, 0xE968, 0x99C1, 0x949D, 0x99C4, 0x91CA,
+	0x99C5, 0x8977, 0x99C6, 0x8BEC, 0x99C8, 0x8BED, 0x99D0, 0x9293,
+	0x99D1, 0xE96D, 0x99D2, 0x8BEE, 0x99D5, 0x89ED, 0x99D8, 0xE96C,
+	0x99DB, 0xE96A, 0x99DD, 0xE96B, 0x99DF, 0xE969, 0x99E2, 0xE977,
+	0x99ED, 0xE96E, 0x99EE, 0xE96F, 0x99F1, 0xE970, 0x99F2, 0xE971,
+	0x99F8, 0xE973, 0x99FB, 0xE972, 0x99FF, 0x8F78, 0x9A01, 0xE974,
+	0x9A05, 0xE976, 0x9A0E, 0x8B52, 0x9A0F, 0xE975, 0x9A12, 0x919B,
+	0x9A13, 0x8CB1, 0x9A19, 0xE978, 0x9A28, 0x91CB, 0x9A2B, 0xE979,
+	0x9A30, 0x93AB, 0x9A37, 0xE97A, 0x9A3E, 0xE980, 0x9A40, 0xE97D,
+	0x9A42, 0xE97C, 0x9A43, 0xE97E, 0x9A45, 0xE97B, 0x9A4D, 0xE982,
+	0x9A4E, 0xFBFB, 0x9A55, 0xE981, 0x9A57, 0xE984, 0x9A5A, 0x8BC1,
+	0x9A5B, 0xE983, 0x9A5F, 0xE985, 0x9A62, 0xE986, 0x9A64, 0xE988,
+	0x9A65, 0xE987, 0x9A69, 0xE989, 0x9A6A, 0xE98B, 0x9A6B, 0xE98A,
+	0x9AA8, 0x8D9C, 0x9AAD, 0xE98C, 0x9AB0, 0xE98D, 0x9AB8, 0x8A5B,
+	0x9ABC, 0xE98E, 0x9AC0, 0xE98F, 0x9AC4, 0x9091, 0x9ACF, 0xE990,
+	0x9AD1, 0xE991, 0x9AD3, 0xE992, 0x9AD4, 0xE993, 0x9AD8, 0x8D82,
+	0x9AD9, 0xFBFC, 0x9ADC, 0xFC40, 0x9ADE, 0xE994, 0x9ADF, 0xE995,
+	0x9AE2, 0xE996, 0x9AE3, 0xE997, 0x9AE6, 0xE998, 0x9AEA, 0x94AF,
+	0x9AEB, 0xE99A, 0x9AED, 0x9545, 0x9AEE, 0xE99B, 0x9AEF, 0xE999,
+	0x9AF1, 0xE99D, 0x9AF4, 0xE99C, 0x9AF7, 0xE99E, 0x9AFB, 0xE99F,
+	0x9B06, 0xE9A0, 0x9B18, 0xE9A1, 0x9B1A, 0xE9A2, 0x9B1F, 0xE9A3,
+	0x9B22, 0xE9A4, 0x9B23, 0xE9A5, 0x9B25, 0xE9A6, 0x9B27, 0xE9A7,
+	0x9B28, 0xE9A8, 0x9B29, 0xE9A9, 0x9B2A, 0xE9AA, 0x9B2E, 0xE9AB,
+	0x9B2F, 0xE9AC, 0x9B31, 0x9F54, 0x9B32, 0xE9AD, 0x9B3B, 0xE2F6,
+	0x9B3C, 0x8B53, 0x9B41, 0x8A40, 0x9B42, 0x8DB0, 0x9B43, 0xE9AF,
+	0x9B44, 0xE9AE, 0x9B45, 0x96A3, 0x9B4D, 0xE9B1, 0x9B4E, 0xE9B2,
+	0x9B4F, 0xE9B0, 0x9B51, 0xE9B3, 0x9B54, 0x9682, 0x9B58, 0xE9B4,
+	0x9B5A, 0x8B9B, 0x9B6F, 0x9844, 0x9B72, 0xFC42, 0x9B74, 0xE9B5,
+	0x9B75, 0xFC41, 0x9B83, 0xE9B7, 0x9B8E, 0x88BC, 0x9B8F, 0xFC43,
+	0x9B91, 0xE9B8, 0x9B92, 0x95A9, 0x9B93, 0xE9B6, 0x9B96, 0xE9B9,
+	0x9B97, 0xE9BA, 0x9B9F, 0xE9BB, 0x9BA0, 0xE9BC, 0x9BA8, 0xE9BD,
+	0x9BAA, 0x968E, 0x9BAB, 0x8E4C, 0x9BAD, 0x8DF8, 0x9BAE, 0x914E,
+	0x9BB1, 0xFC44, 0x9BB4, 0xE9BE, 0x9BB9, 0xE9C1, 0x9BBB, 0xFC45,
+	0x9BC0, 0xE9BF, 0x9BC6, 0xE9C2, 0x9BC9, 0x8CEF, 0x9BCA, 0xE9C0,
+	0x9BCF, 0xE9C3, 0x9BD1, 0xE9C4, 0x9BD2, 0xE9C5, 0x9BD4, 0xE9C9,
+	0x9BD6, 0x8E49, 0x9BDB, 0x91E2, 0x9BE1, 0xE9CA, 0x9BE2, 0xE9C7,
+	0x9BE3, 0xE9C6, 0x9BE4, 0xE9C8, 0x9BE8, 0x8C7E, 0x9BF0, 0xE9CE,
+	0x9BF1, 0xE9CD, 0x9BF2, 0xE9CC, 0x9BF5, 0x88B1, 0x9C00, 0xFC46,
+	0x9C04, 0xE9D8, 0x9C06, 0xE9D4, 0x9C08, 0xE9D5, 0x9C09, 0xE9D1,
+	0x9C0A, 0xE9D7, 0x9C0C, 0xE9D3, 0x9C0D, 0x8A82, 0x9C10, 0x986B,
+	0x9C12, 0xE9D6, 0x9C13, 0xE9D2, 0x9C14, 0xE9D0, 0x9C15, 0xE9CF,
+	0x9C1B, 0xE9DA, 0x9C21, 0xE9DD, 0x9C24, 0xE9DC, 0x9C25, 0xE9DB,
+	0x9C2D, 0x9568, 0x9C2E, 0xE9D9, 0x9C2F, 0x88F1, 0x9C30, 0xE9DE,
+	0x9C32, 0xE9E0, 0x9C39, 0x8A8F, 0x9C3A, 0xE9CB, 0x9C3B, 0x8956,
+	0x9C3E, 0xE9E2, 0x9C46, 0xE9E1, 0x9C47, 0xE9DF, 0x9C48, 0x924C,
+	0x9C52, 0x9690, 0x9C57, 0x97D8, 0x9C5A, 0xE9E3, 0x9C60, 0xE9E4,
+	0x9C67, 0xE9E5, 0x9C76, 0xE9E6, 0x9C78, 0xE9E7, 0x9CE5, 0x92B9,
+	0x9CE7, 0xE9E8, 0x9CE9, 0x94B5, 0x9CEB, 0xE9ED, 0x9CEC, 0xE9E9,
+	0x9CF0, 0xE9EA, 0x9CF3, 0x9650, 0x9CF4, 0x96C2, 0x9CF6, 0x93CE,
+	0x9D03, 0xE9EE, 0x9D06, 0xE9EF, 0x9D07, 0x93BC, 0x9D08, 0xE9EC,
+	0x9D09, 0xE9EB, 0x9D0E, 0x89A8, 0x9D12, 0xE9F7, 0x9D15, 0xE9F6,
+	0x9D1B, 0x8995, 0x9D1F, 0xE9F4, 0x9D23, 0xE9F3, 0x9D26, 0xE9F1,
+	0x9D28, 0x8A9B, 0x9D2A, 0xE9F0, 0x9D2B, 0x8EB0, 0x9D2C, 0x89A7,
+	0x9D3B, 0x8D83, 0x9D3E, 0xE9FA, 0x9D3F, 0xE9F9, 0x9D41, 0xE9F8,
+	0x9D44, 0xE9F5, 0x9D46, 0xE9FB, 0x9D48, 0xE9FC, 0x9D50, 0xEA44,
+	0x9D51, 0xEA43, 0x9D59, 0xEA45, 0x9D5C, 0x894C, 0x9D5D, 0xEA40,
+	0x9D5E, 0xEA41, 0x9D60, 0x8D94, 0x9D61, 0x96B7, 0x9D64, 0xEA42,
+	0x9D6B, 0xFC48, 0x9D6C, 0x9651, 0x9D6F, 0xEA4A, 0x9D70, 0xFC47,
+	0x9D72, 0xEA46, 0x9D7A, 0xEA4B, 0x9D87, 0xEA48, 0x9D89, 0xEA47,
+	0x9D8F, 0x8C7B, 0x9D9A, 0xEA4C, 0x9DA4, 0xEA4D, 0x9DA9, 0xEA4E,
+	0x9DAB, 0xEA49, 0x9DAF, 0xE9F2, 0x9DB2, 0xEA4F, 0x9DB4, 0x92DF,
+	0x9DB8, 0xEA53, 0x9DBA, 0xEA54, 0x9DBB, 0xEA52, 0x9DC1, 0xEA51,
+	0x9DC2, 0xEA57, 0x9DC4, 0xEA50, 0x9DC6, 0xEA55, 0x9DCF, 0xEA56,
+	0x9DD3, 0xEA59, 0x9DD9, 0xEA58, 0x9DE6, 0xEA5B, 0x9DED, 0xEA5C,
+	0x9DEF, 0xEA5D, 0x9DF2, 0x9868, 0x9DF8, 0xEA5A, 0x9DF9, 0x91E9,
+	0x9DFA, 0x8DEB, 0x9DFD, 0xEA5E, 0x9E19, 0xFC4A, 0x9E1A, 0xEA5F,
+	0x9E1B, 0xEA60, 0x9E1E, 0xEA61, 0x9E75, 0xEA62, 0x9E78, 0x8CB2,
+	0x9E79, 0xEA63, 0x9E7D, 0xEA64, 0x9E7F, 0x8EAD, 0x9E81, 0xEA65,
+	0x9E88, 0xEA66, 0x9E8B, 0xEA67, 0x9E8C, 0xEA68, 0x9E91, 0xEA6B,
+	0x9E92, 0xEA69, 0x9E93, 0x985B, 0x9E95, 0xEA6A, 0x9E97, 0x97ED,
+	0x9E9D, 0xEA6C, 0x9E9F, 0x97D9, 0x9EA5, 0xEA6D, 0x9EA6, 0x949E,
+	0x9EA9, 0xEA6E, 0x9EAA, 0xEA70, 0x9EAD, 0xEA71, 0x9EB8, 0xEA6F,
+	0x9EB9, 0x8D8D, 0x9EBA, 0x96CB, 0x9EBB, 0x9683, 0x9EBC, 0x9BF5,
+	0x9EBE, 0x9F80, 0x9EBF, 0x969B, 0x9EC4, 0x89A9, 0x9ECC, 0xEA73,
+	0x9ECD, 0x8B6F, 0x9ECE, 0xEA74, 0x9ECF, 0xEA75, 0x9ED0, 0xEA76,
+	0x9ED1, 0xFC4B, 0x9ED2, 0x8D95, 0x9ED4, 0xEA77, 0x9ED8, 0xE0D2,
+	0x9ED9, 0x96D9, 0x9EDB, 0x91E1, 0x9EDC, 0xEA78, 0x9EDD, 0xEA7A,
+	0x9EDE, 0xEA79, 0x9EE0, 0xEA7B, 0x9EE5, 0xEA7C, 0x9EE8, 0xEA7D,
+	0x9EEF, 0xEA7E, 0x9EF4, 0xEA80, 0x9EF6, 0xEA81, 0x9EF7, 0xEA82,
+	0x9EF9, 0xEA83, 0x9EFB, 0xEA84, 0x9EFC, 0xEA85, 0x9EFD, 0xEA86,
+	0x9F07, 0xEA87, 0x9F08, 0xEA88, 0x9F0E, 0x9343, 0x9F13, 0x8CDB,
+	0x9F15, 0xEA8A, 0x9F20, 0x916C, 0x9F21, 0xEA8B, 0x9F2C, 0xEA8C,
+	0x9F3B, 0x9540, 0x9F3E, 0xEA8D, 0x9F4A, 0xEA8E, 0x9F4B, 0xE256,
+	0x9F4E, 0xE6D8, 0x9F4F, 0xE8EB, 0x9F52, 0xEA8F, 0x9F54, 0xEA90,
+	0x9F5F, 0xEA92, 0x9F60, 0xEA93, 0x9F61, 0xEA94, 0x9F62, 0x97EE,
+	0x9F63, 0xEA91, 0x9F66, 0xEA95, 0x9F67, 0xEA96, 0x9F6A, 0xEA98,
+	0x9F6C, 0xEA97, 0x9F72, 0xEA9A, 0x9F76, 0xEA9B, 0x9F77, 0xEA99,
+	0x9F8D, 0x97B4, 0x9F95, 0xEA9C, 0x9F9C, 0xEA9D, 0x9F9D, 0xE273,
+	0x9FA0, 0xEA9E, 0xF929, 0xFAE0, 0xF9DC, 0xFBE9, 0xFA0E, 0xFA90,
+	0xFA0F, 0xFA9B, 0xFA10, 0xFA9C, 0xFA11, 0xFAB1, 0xFA12, 0xFAD8,
+	0xFA13, 0xFAE8, 0xFA14, 0xFAEA, 0xFA15, 0xFB58, 0xFA16, 0xFB5E,
+	0xFA17, 0xFB75, 0xFA18, 0xFB7D, 0xFA19, 0xFB7E, 0xFA1A, 0xFB80,
+	0xFA1B, 0xFB82, 0xFA1C, 0xFB86, 0xFA1D, 0xFB89, 0xFA1E, 0xFB92,
+	0xFA1F, 0xFB9D, 0xFA20, 0xFB9F, 0xFA21, 0xFBA0, 0xFA22, 0xFBA9,
+	0xFA23, 0xFBB1, 0xFA24, 0xFBB3, 0xFA25, 0xFBB4, 0xFA26, 0xFBB7,
+	0xFA27, 0xFBD3, 0xFA28, 0xFBDA, 0xFA29, 0xFBEA, 0xFA2A, 0xFBF6,
+	0xFA2B, 0xFBF7, 0xFA2C, 0xFBF9, 0xFA2D, 0xFC49, 0xFF01, 0x8149,
+	0xFF02, 0xFA57, 0xFF03, 0x8194, 0xFF04, 0x8190, 0xFF05, 0x8193,
+	0xFF06, 0x8195, 0xFF07, 0xFA56, 0xFF08, 0x8169, 0xFF09, 0x816A,
+	0xFF0A, 0x8196, 0xFF0B, 0x817B, 0xFF0C, 0x8143, 0xFF0D, 0x817C,
+	0xFF0E, 0x8144, 0xFF0F, 0x815E, 0xFF10, 0x824F, 0xFF11, 0x8250,
+	0xFF12, 0x8251, 0xFF13, 0x8252, 0xFF14, 0x8253, 0xFF15, 0x8254,
+	0xFF16, 0x8255, 0xFF17, 0x8256, 0xFF18, 0x8257, 0xFF19, 0x8258,
+	0xFF1A, 0x8146, 0xFF1B, 0x8147, 0xFF1C, 0x8183, 0xFF1D, 0x8181,
+	0xFF1E, 0x8184, 0xFF1F, 0x8148, 0xFF20, 0x8197, 0xFF21, 0x8260,
+	0xFF22, 0x8261, 0xFF23, 0x8262, 0xFF24, 0x8263, 0xFF25, 0x8264,
+	0xFF26, 0x8265, 0xFF27, 0x8266, 0xFF28, 0x8267, 0xFF29, 0x8268,
+	0xFF2A, 0x8269, 0xFF2B, 0x826A, 0xFF2C, 0x826B, 0xFF2D, 0x826C,
+	0xFF2E, 0x826D, 0xFF2F, 0x826E, 0xFF30, 0x826F, 0xFF31, 0x8270,
+	0xFF32, 0x8271, 0xFF33, 0x8272, 0xFF34, 0x8273, 0xFF35, 0x8274,
+	0xFF36, 0x8275, 0xFF37, 0x8276, 0xFF38, 0x8277, 0xFF39, 0x8278,
+	0xFF3A, 0x8279, 0xFF3B, 0x816D, 0xFF3C, 0x815F, 0xFF3D, 0x816E,
+	0xFF3E, 0x814F, 0xFF3F, 0x8151, 0xFF40, 0x814D, 0xFF41, 0x8281,
+	0xFF42, 0x8282, 0xFF43, 0x8283, 0xFF44, 0x8284, 0xFF45, 0x8285,
+	0xFF46, 0x8286, 0xFF47, 0x8287, 0xFF48, 0x8288, 0xFF49, 0x8289,
+	0xFF4A, 0x828A, 0xFF4B, 0x828B, 0xFF4C, 0x828C, 0xFF4D, 0x828D,
+	0xFF4E, 0x828E, 0xFF4F, 0x828F, 0xFF50, 0x8290, 0xFF51, 0x8291,
+	0xFF52, 0x8292, 0xFF53, 0x8293, 0xFF54, 0x8294, 0xFF55, 0x8295,
+	0xFF56, 0x8296, 0xFF57, 0x8297, 0xFF58, 0x8298, 0xFF59, 0x8299,
+	0xFF5A, 0x829A, 0xFF5B, 0x816F, 0xFF5C, 0x8162, 0xFF5D, 0x8170,
+	0xFF5E, 0x8160, 0xFF61, 0x00A1, 0xFF62, 0x00A2, 0xFF63, 0x00A3,
+	0xFF64, 0x00A4, 0xFF65, 0x00A5, 0xFF66, 0x00A6, 0xFF67, 0x00A7,
+	0xFF68, 0x00A8, 0xFF69, 0x00A9, 0xFF6A, 0x00AA, 0xFF6B, 0x00AB,
+	0xFF6C, 0x00AC, 0xFF6D, 0x00AD, 0xFF6E, 0x00AE, 0xFF6F, 0x00AF,
+	0xFF70, 0x00B0, 0xFF71, 0x00B1, 0xFF72, 0x00B2, 0xFF73, 0x00B3,
+	0xFF74, 0x00B4, 0xFF75, 0x00B5, 0xFF76, 0x00B6, 0xFF77, 0x00B7,
+	0xFF78, 0x00B8, 0xFF79, 0x00B9, 0xFF7A, 0x00BA, 0xFF7B, 0x00BB,
+	0xFF7C, 0x00BC, 0xFF7D, 0x00BD, 0xFF7E, 0x00BE, 0xFF7F, 0x00BF,
+	0xFF80, 0x00C0, 0xFF81, 0x00C1, 0xFF82, 0x00C2, 0xFF83, 0x00C3,
+	0xFF84, 0x00C4, 0xFF85, 0x00C5, 0xFF86, 0x00C6, 0xFF87, 0x00C7,
+	0xFF88, 0x00C8, 0xFF89, 0x00C9, 0xFF8A, 0x00CA, 0xFF8B, 0x00CB,
+	0xFF8C, 0x00CC, 0xFF8D, 0x00CD, 0xFF8E, 0x00CE, 0xFF8F, 0x00CF,
+	0xFF90, 0x00D0, 0xFF91, 0x00D1, 0xFF92, 0x00D2, 0xFF93, 0x00D3,
+	0xFF94, 0x00D4, 0xFF95, 0x00D5, 0xFF96, 0x00D6, 0xFF97, 0x00D7,
+	0xFF98, 0x00D8, 0xFF99, 0x00D9, 0xFF9A, 0x00DA, 0xFF9B, 0x00DB,
+	0xFF9C, 0x00DC, 0xFF9D, 0x00DD, 0xFF9E, 0x00DE, 0xFF9F, 0x00DF,
+	0xFFE0, 0x8191, 0xFFE1, 0x8192, 0xFFE2, 0x81CA, 0xFFE3, 0x8150,
+	0xFFE4, 0xFA55, 0xFFE5, 0x818F, 0, 0
+};
+
+#if !_TINY_TABLE
+static
+const WCHAR sjis2uni[] = {
+/*	SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, */
+	0x00A1, 0xFF61, 0x00A2, 0xFF62, 0x00A3, 0xFF63, 0x00A4, 0xFF64,
+	0x00A5, 0xFF65, 0x00A6, 0xFF66, 0x00A7, 0xFF67, 0x00A8, 0xFF68,
+	0x00A9, 0xFF69, 0x00AA, 0xFF6A, 0x00AB, 0xFF6B, 0x00AC, 0xFF6C,
+	0x00AD, 0xFF6D, 0x00AE, 0xFF6E, 0x00AF, 0xFF6F, 0x00B0, 0xFF70,
+	0x00B1, 0xFF71, 0x00B2, 0xFF72, 0x00B3, 0xFF73, 0x00B4, 0xFF74,
+	0x00B5, 0xFF75, 0x00B6, 0xFF76, 0x00B7, 0xFF77, 0x00B8, 0xFF78,
+	0x00B9, 0xFF79, 0x00BA, 0xFF7A, 0x00BB, 0xFF7B, 0x00BC, 0xFF7C,
+	0x00BD, 0xFF7D, 0x00BE, 0xFF7E, 0x00BF, 0xFF7F, 0x00C0, 0xFF80,
+	0x00C1, 0xFF81, 0x00C2, 0xFF82, 0x00C3, 0xFF83, 0x00C4, 0xFF84,
+	0x00C5, 0xFF85, 0x00C6, 0xFF86, 0x00C7, 0xFF87, 0x00C8, 0xFF88,
+	0x00C9, 0xFF89, 0x00CA, 0xFF8A, 0x00CB, 0xFF8B, 0x00CC, 0xFF8C,
+	0x00CD, 0xFF8D, 0x00CE, 0xFF8E, 0x00CF, 0xFF8F, 0x00D0, 0xFF90,
+	0x00D1, 0xFF91, 0x00D2, 0xFF92, 0x00D3, 0xFF93, 0x00D4, 0xFF94,
+	0x00D5, 0xFF95, 0x00D6, 0xFF96, 0x00D7, 0xFF97, 0x00D8, 0xFF98,
+	0x00D9, 0xFF99, 0x00DA, 0xFF9A, 0x00DB, 0xFF9B, 0x00DC, 0xFF9C,
+	0x00DD, 0xFF9D, 0x00DE, 0xFF9E, 0x00DF, 0xFF9F, 0x8140, 0x3000,
+	0x8141, 0x3001, 0x8142, 0x3002, 0x8143, 0xFF0C, 0x8144, 0xFF0E,
+	0x8145, 0x30FB, 0x8146, 0xFF1A, 0x8147, 0xFF1B, 0x8148, 0xFF1F,
+	0x8149, 0xFF01, 0x814A, 0x309B, 0x814B, 0x309C, 0x814C, 0x00B4,
+	0x814D, 0xFF40, 0x814E, 0x00A8, 0x814F, 0xFF3E, 0x8150, 0xFFE3,
+	0x8151, 0xFF3F, 0x8152, 0x30FD, 0x8153, 0x30FE, 0x8154, 0x309D,
+	0x8155, 0x309E, 0x8156, 0x3003, 0x8157, 0x4EDD, 0x8158, 0x3005,
+	0x8159, 0x3006, 0x815A, 0x3007, 0x815B, 0x30FC, 0x815C, 0x2015,
+	0x815D, 0x2010, 0x815E, 0xFF0F, 0x815F, 0xFF3C, 0x8160, 0xFF5E,
+	0x8161, 0x2225, 0x8162, 0xFF5C, 0x8163, 0x2026, 0x8164, 0x2025,
+	0x8165, 0x2018, 0x8166, 0x2019, 0x8167, 0x201C, 0x8168, 0x201D,
+	0x8169, 0xFF08, 0x816A, 0xFF09, 0x816B, 0x3014, 0x816C, 0x3015,
+	0x816D, 0xFF3B, 0x816E, 0xFF3D, 0x816F, 0xFF5B, 0x8170, 0xFF5D,
+	0x8171, 0x3008, 0x8172, 0x3009, 0x8173, 0x300A, 0x8174, 0x300B,
+	0x8175, 0x300C, 0x8176, 0x300D, 0x8177, 0x300E, 0x8178, 0x300F,
+	0x8179, 0x3010, 0x817A, 0x3011, 0x817B, 0xFF0B, 0x817C, 0xFF0D,
+	0x817D, 0x00B1, 0x817E, 0x00D7, 0x8180, 0x00F7, 0x8181, 0xFF1D,
+	0x8182, 0x2260, 0x8183, 0xFF1C, 0x8184, 0xFF1E, 0x8185, 0x2266,
+	0x8186, 0x2267, 0x8187, 0x221E, 0x8188, 0x2234, 0x8189, 0x2642,
+	0x818A, 0x2640, 0x818B, 0x00B0, 0x818C, 0x2032, 0x818D, 0x2033,
+	0x818E, 0x2103, 0x818F, 0xFFE5, 0x8190, 0xFF04, 0x8191, 0xFFE0,
+	0x8192, 0xFFE1, 0x8193, 0xFF05, 0x8194, 0xFF03, 0x8195, 0xFF06,
+	0x8196, 0xFF0A, 0x8197, 0xFF20, 0x8198, 0x00A7, 0x8199, 0x2606,
+	0x819A, 0x2605, 0x819B, 0x25CB, 0x819C, 0x25CF, 0x819D, 0x25CE,
+	0x819E, 0x25C7, 0x819F, 0x25C6, 0x81A0, 0x25A1, 0x81A1, 0x25A0,
+	0x81A2, 0x25B3, 0x81A3, 0x25B2, 0x81A4, 0x25BD, 0x81A5, 0x25BC,
+	0x81A6, 0x203B, 0x81A7, 0x3012, 0x81A8, 0x2192, 0x81A9, 0x2190,
+	0x81AA, 0x2191, 0x81AB, 0x2193, 0x81AC, 0x3013, 0x81B8, 0x2208,
+	0x81B9, 0x220B, 0x81BA, 0x2286, 0x81BB, 0x2287, 0x81BC, 0x2282,
+	0x81BD, 0x2283, 0x81BE, 0x222A, 0x81BF, 0x2229, 0x81C8, 0x2227,
+	0x81C9, 0x2228, 0x81CA, 0xFFE2, 0x81CB, 0x21D2, 0x81CC, 0x21D4,
+	0x81CD, 0x2200, 0x81CE, 0x2203, 0x81DA, 0x2220, 0x81DB, 0x22A5,
+	0x81DC, 0x2312, 0x81DD, 0x2202, 0x81DE, 0x2207, 0x81DF, 0x2261,
+	0x81E0, 0x2252, 0x81E1, 0x226A, 0x81E2, 0x226B, 0x81E3, 0x221A,
+	0x81E4, 0x223D, 0x81E5, 0x221D, 0x81E6, 0x2235, 0x81E7, 0x222B,
+	0x81E8, 0x222C, 0x81F0, 0x212B, 0x81F1, 0x2030, 0x81F2, 0x266F,
+	0x81F3, 0x266D, 0x81F4, 0x266A, 0x81F5, 0x2020, 0x81F6, 0x2021,
+	0x81F7, 0x00B6, 0x81FC, 0x25EF, 0x824F, 0xFF10, 0x8250, 0xFF11,
+	0x8251, 0xFF12, 0x8252, 0xFF13, 0x8253, 0xFF14, 0x8254, 0xFF15,
+	0x8255, 0xFF16, 0x8256, 0xFF17, 0x8257, 0xFF18, 0x8258, 0xFF19,
+	0x8260, 0xFF21, 0x8261, 0xFF22, 0x8262, 0xFF23, 0x8263, 0xFF24,
+	0x8264, 0xFF25, 0x8265, 0xFF26, 0x8266, 0xFF27, 0x8267, 0xFF28,
+	0x8268, 0xFF29, 0x8269, 0xFF2A, 0x826A, 0xFF2B, 0x826B, 0xFF2C,
+	0x826C, 0xFF2D, 0x826D, 0xFF2E, 0x826E, 0xFF2F, 0x826F, 0xFF30,
+	0x8270, 0xFF31, 0x8271, 0xFF32, 0x8272, 0xFF33, 0x8273, 0xFF34,
+	0x8274, 0xFF35, 0x8275, 0xFF36, 0x8276, 0xFF37, 0x8277, 0xFF38,
+	0x8278, 0xFF39, 0x8279, 0xFF3A, 0x8281, 0xFF41, 0x8282, 0xFF42,
+	0x8283, 0xFF43, 0x8284, 0xFF44, 0x8285, 0xFF45, 0x8286, 0xFF46,
+	0x8287, 0xFF47, 0x8288, 0xFF48, 0x8289, 0xFF49, 0x828A, 0xFF4A,
+	0x828B, 0xFF4B, 0x828C, 0xFF4C, 0x828D, 0xFF4D, 0x828E, 0xFF4E,
+	0x828F, 0xFF4F, 0x8290, 0xFF50, 0x8291, 0xFF51, 0x8292, 0xFF52,
+	0x8293, 0xFF53, 0x8294, 0xFF54, 0x8295, 0xFF55, 0x8296, 0xFF56,
+	0x8297, 0xFF57, 0x8298, 0xFF58, 0x8299, 0xFF59, 0x829A, 0xFF5A,
+	0x829F, 0x3041, 0x82A0, 0x3042, 0x82A1, 0x3043, 0x82A2, 0x3044,
+	0x82A3, 0x3045, 0x82A4, 0x3046, 0x82A5, 0x3047, 0x82A6, 0x3048,
+	0x82A7, 0x3049, 0x82A8, 0x304A, 0x82A9, 0x304B, 0x82AA, 0x304C,
+	0x82AB, 0x304D, 0x82AC, 0x304E, 0x82AD, 0x304F, 0x82AE, 0x3050,
+	0x82AF, 0x3051, 0x82B0, 0x3052, 0x82B1, 0x3053, 0x82B2, 0x3054,
+	0x82B3, 0x3055, 0x82B4, 0x3056, 0x82B5, 0x3057, 0x82B6, 0x3058,
+	0x82B7, 0x3059, 0x82B8, 0x305A, 0x82B9, 0x305B, 0x82BA, 0x305C,
+	0x82BB, 0x305D, 0x82BC, 0x305E, 0x82BD, 0x305F, 0x82BE, 0x3060,
+	0x82BF, 0x3061, 0x82C0, 0x3062, 0x82C1, 0x3063, 0x82C2, 0x3064,
+	0x82C3, 0x3065, 0x82C4, 0x3066, 0x82C5, 0x3067, 0x82C6, 0x3068,
+	0x82C7, 0x3069, 0x82C8, 0x306A, 0x82C9, 0x306B, 0x82CA, 0x306C,
+	0x82CB, 0x306D, 0x82CC, 0x306E, 0x82CD, 0x306F, 0x82CE, 0x3070,
+	0x82CF, 0x3071, 0x82D0, 0x3072, 0x82D1, 0x3073, 0x82D2, 0x3074,
+	0x82D3, 0x3075, 0x82D4, 0x3076, 0x82D5, 0x3077, 0x82D6, 0x3078,
+	0x82D7, 0x3079, 0x82D8, 0x307A, 0x82D9, 0x307B, 0x82DA, 0x307C,
+	0x82DB, 0x307D, 0x82DC, 0x307E, 0x82DD, 0x307F, 0x82DE, 0x3080,
+	0x82DF, 0x3081, 0x82E0, 0x3082, 0x82E1, 0x3083, 0x82E2, 0x3084,
+	0x82E3, 0x3085, 0x82E4, 0x3086, 0x82E5, 0x3087, 0x82E6, 0x3088,
+	0x82E7, 0x3089, 0x82E8, 0x308A, 0x82E9, 0x308B, 0x82EA, 0x308C,
+	0x82EB, 0x308D, 0x82EC, 0x308E, 0x82ED, 0x308F, 0x82EE, 0x3090,
+	0x82EF, 0x3091, 0x82F0, 0x3092, 0x82F1, 0x3093, 0x8340, 0x30A1,
+	0x8341, 0x30A2, 0x8342, 0x30A3, 0x8343, 0x30A4, 0x8344, 0x30A5,
+	0x8345, 0x30A6, 0x8346, 0x30A7, 0x8347, 0x30A8, 0x8348, 0x30A9,
+	0x8349, 0x30AA, 0x834A, 0x30AB, 0x834B, 0x30AC, 0x834C, 0x30AD,
+	0x834D, 0x30AE, 0x834E, 0x30AF, 0x834F, 0x30B0, 0x8350, 0x30B1,
+	0x8351, 0x30B2, 0x8352, 0x30B3, 0x8353, 0x30B4, 0x8354, 0x30B5,
+	0x8355, 0x30B6, 0x8356, 0x30B7, 0x8357, 0x30B8, 0x8358, 0x30B9,
+	0x8359, 0x30BA, 0x835A, 0x30BB, 0x835B, 0x30BC, 0x835C, 0x30BD,
+	0x835D, 0x30BE, 0x835E, 0x30BF, 0x835F, 0x30C0, 0x8360, 0x30C1,
+	0x8361, 0x30C2, 0x8362, 0x30C3, 0x8363, 0x30C4, 0x8364, 0x30C5,
+	0x8365, 0x30C6, 0x8366, 0x30C7, 0x8367, 0x30C8, 0x8368, 0x30C9,
+	0x8369, 0x30CA, 0x836A, 0x30CB, 0x836B, 0x30CC, 0x836C, 0x30CD,
+	0x836D, 0x30CE, 0x836E, 0x30CF, 0x836F, 0x30D0, 0x8370, 0x30D1,
+	0x8371, 0x30D2, 0x8372, 0x30D3, 0x8373, 0x30D4, 0x8374, 0x30D5,
+	0x8375, 0x30D6, 0x8376, 0x30D7, 0x8377, 0x30D8, 0x8378, 0x30D9,
+	0x8379, 0x30DA, 0x837A, 0x30DB, 0x837B, 0x30DC, 0x837C, 0x30DD,
+	0x837D, 0x30DE, 0x837E, 0x30DF, 0x8380, 0x30E0, 0x8381, 0x30E1,
+	0x8382, 0x30E2, 0x8383, 0x30E3, 0x8384, 0x30E4, 0x8385, 0x30E5,
+	0x8386, 0x30E6, 0x8387, 0x30E7, 0x8388, 0x30E8, 0x8389, 0x30E9,
+	0x838A, 0x30EA, 0x838B, 0x30EB, 0x838C, 0x30EC, 0x838D, 0x30ED,
+	0x838E, 0x30EE, 0x838F, 0x30EF, 0x8390, 0x30F0, 0x8391, 0x30F1,
+	0x8392, 0x30F2, 0x8393, 0x30F3, 0x8394, 0x30F4,
+	0x8395, 0x30F5, 0x8396, 0x30F6, 0x839F, 0x0391, 0x83A0, 0x0392,
+	0x83A1, 0x0393, 0x83A2, 0x0394, 0x83A3, 0x0395, 0x83A4, 0x0396,
+	0x83A5, 0x0397, 0x83A6, 0x0398, 0x83A7, 0x0399, 0x83A8, 0x039A,
+	0x83A9, 0x039B, 0x83AA, 0x039C, 0x83AB, 0x039D, 0x83AC, 0x039E,
+	0x83AD, 0x039F, 0x83AE, 0x03A0, 0x83AF, 0x03A1, 0x83B0, 0x03A3,
+	0x83B1, 0x03A4, 0x83B2, 0x03A5, 0x83B3, 0x03A6, 0x83B4, 0x03A7,
+	0x83B5, 0x03A8, 0x83B6, 0x03A9, 0x83BF, 0x03B1, 0x83C0, 0x03B2,
+	0x83C1, 0x03B3, 0x83C2, 0x03B4, 0x83C3, 0x03B5, 0x83C4, 0x03B6,
+	0x83C5, 0x03B7, 0x83C6, 0x03B8, 0x83C7, 0x03B9, 0x83C8, 0x03BA,
+	0x83C9, 0x03BB, 0x83CA, 0x03BC, 0x83CB, 0x03BD, 0x83CC, 0x03BE,
+	0x83CD, 0x03BF, 0x83CE, 0x03C0, 0x83CF, 0x03C1, 0x83D0, 0x03C3,
+	0x83D1, 0x03C4, 0x83D2, 0x03C5, 0x83D3, 0x03C6, 0x83D4, 0x03C7,
+	0x83D5, 0x03C8, 0x83D6, 0x03C9, 0x8440, 0x0410, 0x8441, 0x0411,
+	0x8442, 0x0412, 0x8443, 0x0413, 0x8444, 0x0414, 0x8445, 0x0415,
+	0x8446, 0x0401, 0x8447, 0x0416, 0x8448, 0x0417, 0x8449, 0x0418,
+	0x844A, 0x0419, 0x844B, 0x041A, 0x844C, 0x041B, 0x844D, 0x041C,
+	0x844E, 0x041D, 0x844F, 0x041E, 0x8450, 0x041F, 0x8451, 0x0420,
+	0x8452, 0x0421, 0x8453, 0x0422, 0x8454, 0x0423, 0x8455, 0x0424,
+	0x8456, 0x0425, 0x8457, 0x0426, 0x8458, 0x0427, 0x8459, 0x0428,
+	0x845A, 0x0429, 0x845B, 0x042A, 0x845C, 0x042B, 0x845D, 0x042C,
+	0x845E, 0x042D, 0x845F, 0x042E, 0x8460, 0x042F, 0x8470, 0x0430,
+	0x8471, 0x0431, 0x8472, 0x0432, 0x8473, 0x0433, 0x8474, 0x0434,
+	0x8475, 0x0435, 0x8476, 0x0451, 0x8477, 0x0436, 0x8478, 0x0437,
+	0x8479, 0x0438, 0x847A, 0x0439, 0x847B, 0x043A, 0x847C, 0x043B,
+	0x847D, 0x043C, 0x847E, 0x043D, 0x8480, 0x043E, 0x8481, 0x043F,
+	0x8482, 0x0440, 0x8483, 0x0441, 0x8484, 0x0442, 0x8485, 0x0443,
+	0x8486, 0x0444, 0x8487, 0x0445, 0x8488, 0x0446, 0x8489, 0x0447,
+	0x848A, 0x0448, 0x848B, 0x0449, 0x848C, 0x044A, 0x848D, 0x044B,
+	0x848E, 0x044C, 0x848F, 0x044D, 0x8490, 0x044E, 0x8491, 0x044F,
+	0x849F, 0x2500, 0x84A0, 0x2502, 0x84A1, 0x250C, 0x84A2, 0x2510,
+	0x84A3, 0x2518, 0x84A4, 0x2514, 0x84A5, 0x251C, 0x84A6, 0x252C,
+	0x84A7, 0x2524, 0x84A8, 0x2534, 0x84A9, 0x253C, 0x84AA, 0x2501,
+	0x84AB, 0x2503, 0x84AC, 0x250F, 0x84AD, 0x2513, 0x84AE, 0x251B,
+	0x84AF, 0x2517, 0x84B0, 0x2523, 0x84B1, 0x2533, 0x84B2, 0x252B,
+	0x84B3, 0x253B, 0x84B4, 0x254B, 0x84B5, 0x2520, 0x84B6, 0x252F,
+	0x84B7, 0x2528, 0x84B8, 0x2537, 0x84B9, 0x253F, 0x84BA, 0x251D,
+	0x84BB, 0x2530, 0x84BC, 0x2525, 0x84BD, 0x2538, 0x84BE, 0x2542,
+	0x8740, 0x2460, 0x8741, 0x2461, 0x8742, 0x2462, 0x8743, 0x2463,
+	0x8744, 0x2464, 0x8745, 0x2465, 0x8746, 0x2466, 0x8747, 0x2467,
+	0x8748, 0x2468, 0x8749, 0x2469, 0x874A, 0x246A, 0x874B, 0x246B,
+	0x874C, 0x246C, 0x874D, 0x246D, 0x874E, 0x246E, 0x874F, 0x246F,
+	0x8750, 0x2470, 0x8751, 0x2471, 0x8752, 0x2472, 0x8753, 0x2473,
+	0x8754, 0x2160, 0x8755, 0x2161, 0x8756, 0x2162, 0x8757, 0x2163,
+	0x8758, 0x2164, 0x8759, 0x2165, 0x875A, 0x2166, 0x875B, 0x2167,
+	0x875C, 0x2168, 0x875D, 0x2169, 0x875F, 0x3349, 0x8760, 0x3314,
+	0x8761, 0x3322, 0x8762, 0x334D, 0x8763, 0x3318, 0x8764, 0x3327,
+	0x8765, 0x3303, 0x8766, 0x3336, 0x8767, 0x3351, 0x8768, 0x3357,
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+	0xE0D0, 0x734E, 0xE0D1, 0x734F, 0xE0D2, 0x9ED8, 0xE0D3, 0x7357,
+	0xE0D4, 0x736A, 0xE0D5, 0x7368, 0xE0D6, 0x7370, 0xE0D7, 0x7378,
+	0xE0D8, 0x7375, 0xE0D9, 0x737B, 0xE0DA, 0x737A, 0xE0DB, 0x73C8,
+	0xE0DC, 0x73B3, 0xE0DD, 0x73CE, 0xE0DE, 0x73BB, 0xE0DF, 0x73C0,
+	0xE0E0, 0x73E5, 0xE0E1, 0x73EE, 0xE0E2, 0x73DE, 0xE0E3, 0x74A2,
+	0xE0E4, 0x7405, 0xE0E5, 0x746F, 0xE0E6, 0x7425, 0xE0E7, 0x73F8,
+	0xE0E8, 0x7432, 0xE0E9, 0x743A, 0xE0EA, 0x7455, 0xE0EB, 0x743F,
+	0xE0EC, 0x745F, 0xE0ED, 0x7459, 0xE0EE, 0x7441, 0xE0EF, 0x745C,
+	0xE0F0, 0x7469, 0xE0F1, 0x7470, 0xE0F2, 0x7463, 0xE0F3, 0x746A,
+	0xE0F4, 0x7476, 0xE0F5, 0x747E, 0xE0F6, 0x748B, 0xE0F7, 0x749E,
+	0xE0F8, 0x74A7, 0xE0F9, 0x74CA, 0xE0FA, 0x74CF, 0xE0FB, 0x74D4,
+	0xE0FC, 0x73F1, 0xE140, 0x74E0, 0xE141, 0x74E3, 0xE142, 0x74E7,
+	0xE143, 0x74E9, 0xE144, 0x74EE, 0xE145, 0x74F2, 0xE146, 0x74F0,
+	0xE147, 0x74F1, 0xE148, 0x74F8, 0xE149, 0x74F7, 0xE14A, 0x7504,
+	0xE14B, 0x7503, 0xE14C, 0x7505, 0xE14D, 0x750C, 0xE14E, 0x750E,
+	0xE14F, 0x750D, 0xE150, 0x7515, 0xE151, 0x7513, 0xE152, 0x751E,
+	0xE153, 0x7526, 0xE154, 0x752C, 0xE155, 0x753C, 0xE156, 0x7544,
+	0xE157, 0x754D, 0xE158, 0x754A, 0xE159, 0x7549, 0xE15A, 0x755B,
+	0xE15B, 0x7546, 0xE15C, 0x755A, 0xE15D, 0x7569, 0xE15E, 0x7564,
+	0xE15F, 0x7567, 0xE160, 0x756B, 0xE161, 0x756D, 0xE162, 0x7578,
+	0xE163, 0x7576, 0xE164, 0x7586, 0xE165, 0x7587, 0xE166, 0x7574,
+	0xE167, 0x758A, 0xE168, 0x7589, 0xE169, 0x7582, 0xE16A, 0x7594,
+	0xE16B, 0x759A, 0xE16C, 0x759D, 0xE16D, 0x75A5, 0xE16E, 0x75A3,
+	0xE16F, 0x75C2, 0xE170, 0x75B3, 0xE171, 0x75C3, 0xE172, 0x75B5,
+	0xE173, 0x75BD, 0xE174, 0x75B8, 0xE175, 0x75BC, 0xE176, 0x75B1,
+	0xE177, 0x75CD, 0xE178, 0x75CA, 0xE179, 0x75D2, 0xE17A, 0x75D9,
+	0xE17B, 0x75E3, 0xE17C, 0x75DE, 0xE17D, 0x75FE, 0xE17E, 0x75FF,
+	0xE180, 0x75FC, 0xE181, 0x7601, 0xE182, 0x75F0, 0xE183, 0x75FA,
+	0xE184, 0x75F2, 0xE185, 0x75F3, 0xE186, 0x760B, 0xE187, 0x760D,
+	0xE188, 0x7609, 0xE189, 0x761F, 0xE18A, 0x7627, 0xE18B, 0x7620,
+	0xE18C, 0x7621, 0xE18D, 0x7622, 0xE18E, 0x7624, 0xE18F, 0x7634,
+	0xE190, 0x7630, 0xE191, 0x763B, 0xE192, 0x7647, 0xE193, 0x7648,
+	0xE194, 0x7646, 0xE195, 0x765C, 0xE196, 0x7658, 0xE197, 0x7661,
+	0xE198, 0x7662, 0xE199, 0x7668, 0xE19A, 0x7669, 0xE19B, 0x766A,
+	0xE19C, 0x7667, 0xE19D, 0x766C, 0xE19E, 0x7670, 0xE19F, 0x7672,
+	0xE1A0, 0x7676, 0xE1A1, 0x7678, 0xE1A2, 0x767C, 0xE1A3, 0x7680,
+	0xE1A4, 0x7683, 0xE1A5, 0x7688, 0xE1A6, 0x768B, 0xE1A7, 0x768E,
+	0xE1A8, 0x7696, 0xE1A9, 0x7693, 0xE1AA, 0x7699, 0xE1AB, 0x769A,
+	0xE1AC, 0x76B0, 0xE1AD, 0x76B4, 0xE1AE, 0x76B8, 0xE1AF, 0x76B9,
+	0xE1B0, 0x76BA, 0xE1B1, 0x76C2, 0xE1B2, 0x76CD, 0xE1B3, 0x76D6,
+	0xE1B4, 0x76D2, 0xE1B5, 0x76DE, 0xE1B6, 0x76E1, 0xE1B7, 0x76E5,
+	0xE1B8, 0x76E7, 0xE1B9, 0x76EA, 0xE1BA, 0x862F, 0xE1BB, 0x76FB,
+	0xE1BC, 0x7708, 0xE1BD, 0x7707, 0xE1BE, 0x7704, 0xE1BF, 0x7729,
+	0xE1C0, 0x7724, 0xE1C1, 0x771E, 0xE1C2, 0x7725, 0xE1C3, 0x7726,
+	0xE1C4, 0x771B, 0xE1C5, 0x7737, 0xE1C6, 0x7738, 0xE1C7, 0x7747,
+	0xE1C8, 0x775A, 0xE1C9, 0x7768, 0xE1CA, 0x776B, 0xE1CB, 0x775B,
+	0xE1CC, 0x7765, 0xE1CD, 0x777F, 0xE1CE, 0x777E, 0xE1CF, 0x7779,
+	0xE1D0, 0x778E, 0xE1D1, 0x778B, 0xE1D2, 0x7791, 0xE1D3, 0x77A0,
+	0xE1D4, 0x779E, 0xE1D5, 0x77B0, 0xE1D6, 0x77B6, 0xE1D7, 0x77B9,
+	0xE1D8, 0x77BF, 0xE1D9, 0x77BC, 0xE1DA, 0x77BD, 0xE1DB, 0x77BB,
+	0xE1DC, 0x77C7, 0xE1DD, 0x77CD, 0xE1DE, 0x77D7, 0xE1DF, 0x77DA,
+	0xE1E0, 0x77DC, 0xE1E1, 0x77E3, 0xE1E2, 0x77EE, 0xE1E3, 0x77FC,
+	0xE1E4, 0x780C, 0xE1E5, 0x7812, 0xE1E6, 0x7926, 0xE1E7, 0x7820,
+	0xE1E8, 0x792A, 0xE1E9, 0x7845, 0xE1EA, 0x788E, 0xE1EB, 0x7874,
+	0xE1EC, 0x7886, 0xE1ED, 0x787C, 0xE1EE, 0x789A, 0xE1EF, 0x788C,
+	0xE1F0, 0x78A3, 0xE1F1, 0x78B5, 0xE1F2, 0x78AA, 0xE1F3, 0x78AF,
+	0xE1F4, 0x78D1, 0xE1F5, 0x78C6, 0xE1F6, 0x78CB, 0xE1F7, 0x78D4,
+	0xE1F8, 0x78BE, 0xE1F9, 0x78BC, 0xE1FA, 0x78C5, 0xE1FB, 0x78CA,
+	0xE1FC, 0x78EC, 0xE240, 0x78E7, 0xE241, 0x78DA, 0xE242, 0x78FD,
+	0xE243, 0x78F4, 0xE244, 0x7907, 0xE245, 0x7912, 0xE246, 0x7911,
+	0xE247, 0x7919, 0xE248, 0x792C, 0xE249, 0x792B, 0xE24A, 0x7940,
+	0xE24B, 0x7960, 0xE24C, 0x7957, 0xE24D, 0x795F, 0xE24E, 0x795A,
+	0xE24F, 0x7955, 0xE250, 0x7953, 0xE251, 0x797A, 0xE252, 0x797F,
+	0xE253, 0x798A, 0xE254, 0x799D, 0xE255, 0x79A7, 0xE256, 0x9F4B,
+	0xE257, 0x79AA, 0xE258, 0x79AE, 0xE259, 0x79B3, 0xE25A, 0x79B9,
+	0xE25B, 0x79BA, 0xE25C, 0x79C9, 0xE25D, 0x79D5, 0xE25E, 0x79E7,
+	0xE25F, 0x79EC, 0xE260, 0x79E1, 0xE261, 0x79E3, 0xE262, 0x7A08,
+	0xE263, 0x7A0D, 0xE264, 0x7A18, 0xE265, 0x7A19, 0xE266, 0x7A20,
+	0xE267, 0x7A1F, 0xE268, 0x7980, 0xE269, 0x7A31, 0xE26A, 0x7A3B,
+	0xE26B, 0x7A3E, 0xE26C, 0x7A37, 0xE26D, 0x7A43, 0xE26E, 0x7A57,
+	0xE26F, 0x7A49, 0xE270, 0x7A61, 0xE271, 0x7A62, 0xE272, 0x7A69,
+	0xE273, 0x9F9D, 0xE274, 0x7A70, 0xE275, 0x7A79, 0xE276, 0x7A7D,
+	0xE277, 0x7A88, 0xE278, 0x7A97, 0xE279, 0x7A95, 0xE27A, 0x7A98,
+	0xE27B, 0x7A96, 0xE27C, 0x7AA9, 0xE27D, 0x7AC8, 0xE27E, 0x7AB0,
+	0xE280, 0x7AB6, 0xE281, 0x7AC5, 0xE282, 0x7AC4, 0xE283, 0x7ABF,
+	0xE284, 0x9083, 0xE285, 0x7AC7, 0xE286, 0x7ACA, 0xE287, 0x7ACD,
+	0xE288, 0x7ACF, 0xE289, 0x7AD5, 0xE28A, 0x7AD3, 0xE28B, 0x7AD9,
+	0xE28C, 0x7ADA, 0xE28D, 0x7ADD, 0xE28E, 0x7AE1, 0xE28F, 0x7AE2,
+	0xE290, 0x7AE6, 0xE291, 0x7AED, 0xE292, 0x7AF0, 0xE293, 0x7B02,
+	0xE294, 0x7B0F, 0xE295, 0x7B0A, 0xE296, 0x7B06, 0xE297, 0x7B33,
+	0xE298, 0x7B18, 0xE299, 0x7B19, 0xE29A, 0x7B1E, 0xE29B, 0x7B35,
+	0xE29C, 0x7B28, 0xE29D, 0x7B36, 0xE29E, 0x7B50, 0xE29F, 0x7B7A,
+	0xE2A0, 0x7B04, 0xE2A1, 0x7B4D, 0xE2A2, 0x7B0B, 0xE2A3, 0x7B4C,
+	0xE2A4, 0x7B45, 0xE2A5, 0x7B75, 0xE2A6, 0x7B65, 0xE2A7, 0x7B74,
+	0xE2A8, 0x7B67, 0xE2A9, 0x7B70, 0xE2AA, 0x7B71, 0xE2AB, 0x7B6C,
+	0xE2AC, 0x7B6E, 0xE2AD, 0x7B9D, 0xE2AE, 0x7B98, 0xE2AF, 0x7B9F,
+	0xE2B0, 0x7B8D, 0xE2B1, 0x7B9C, 0xE2B2, 0x7B9A, 0xE2B3, 0x7B8B,
+	0xE2B4, 0x7B92, 0xE2B5, 0x7B8F, 0xE2B6, 0x7B5D, 0xE2B7, 0x7B99,
+	0xE2B8, 0x7BCB, 0xE2B9, 0x7BC1, 0xE2BA, 0x7BCC, 0xE2BB, 0x7BCF,
+	0xE2BC, 0x7BB4, 0xE2BD, 0x7BC6, 0xE2BE, 0x7BDD, 0xE2BF, 0x7BE9,
+	0xE2C0, 0x7C11, 0xE2C1, 0x7C14, 0xE2C2, 0x7BE6, 0xE2C3, 0x7BE5,
+	0xE2C4, 0x7C60, 0xE2C5, 0x7C00, 0xE2C6, 0x7C07, 0xE2C7, 0x7C13,
+	0xE2C8, 0x7BF3, 0xE2C9, 0x7BF7, 0xE2CA, 0x7C17, 0xE2CB, 0x7C0D,
+	0xE2CC, 0x7BF6, 0xE2CD, 0x7C23, 0xE2CE, 0x7C27, 0xE2CF, 0x7C2A,
+	0xE2D0, 0x7C1F, 0xE2D1, 0x7C37, 0xE2D2, 0x7C2B, 0xE2D3, 0x7C3D,
+	0xE2D4, 0x7C4C, 0xE2D5, 0x7C43, 0xE2D6, 0x7C54, 0xE2D7, 0x7C4F,
+	0xE2D8, 0x7C40, 0xE2D9, 0x7C50, 0xE2DA, 0x7C58, 0xE2DB, 0x7C5F,
+	0xE2DC, 0x7C64, 0xE2DD, 0x7C56, 0xE2DE, 0x7C65, 0xE2DF, 0x7C6C,
+	0xE2E0, 0x7C75, 0xE2E1, 0x7C83, 0xE2E2, 0x7C90, 0xE2E3, 0x7CA4,
+	0xE2E4, 0x7CAD, 0xE2E5, 0x7CA2, 0xE2E6, 0x7CAB, 0xE2E7, 0x7CA1,
+	0xE2E8, 0x7CA8, 0xE2E9, 0x7CB3, 0xE2EA, 0x7CB2, 0xE2EB, 0x7CB1,
+	0xE2EC, 0x7CAE, 0xE2ED, 0x7CB9, 0xE2EE, 0x7CBD, 0xE2EF, 0x7CC0,
+	0xE2F0, 0x7CC5, 0xE2F1, 0x7CC2, 0xE2F2, 0x7CD8, 0xE2F3, 0x7CD2,
+	0xE2F4, 0x7CDC, 0xE2F5, 0x7CE2, 0xE2F6, 0x9B3B, 0xE2F7, 0x7CEF,
+	0xE2F8, 0x7CF2, 0xE2F9, 0x7CF4, 0xE2FA, 0x7CF6, 0xE2FB, 0x7CFA,
+	0xE2FC, 0x7D06, 0xE340, 0x7D02, 0xE341, 0x7D1C, 0xE342, 0x7D15,
+	0xE343, 0x7D0A, 0xE344, 0x7D45, 0xE345, 0x7D4B, 0xE346, 0x7D2E,
+	0xE347, 0x7D32, 0xE348, 0x7D3F, 0xE349, 0x7D35, 0xE34A, 0x7D46,
+	0xE34B, 0x7D73, 0xE34C, 0x7D56, 0xE34D, 0x7D4E, 0xE34E, 0x7D72,
+	0xE34F, 0x7D68, 0xE350, 0x7D6E, 0xE351, 0x7D4F, 0xE352, 0x7D63,
+	0xE353, 0x7D93, 0xE354, 0x7D89, 0xE355, 0x7D5B, 0xE356, 0x7D8F,
+	0xE357, 0x7D7D, 0xE358, 0x7D9B, 0xE359, 0x7DBA, 0xE35A, 0x7DAE,
+	0xE35B, 0x7DA3, 0xE35C, 0x7DB5, 0xE35D, 0x7DC7, 0xE35E, 0x7DBD,
+	0xE35F, 0x7DAB, 0xE360, 0x7E3D, 0xE361, 0x7DA2, 0xE362, 0x7DAF,
+	0xE363, 0x7DDC, 0xE364, 0x7DB8, 0xE365, 0x7D9F, 0xE366, 0x7DB0,
+	0xE367, 0x7DD8, 0xE368, 0x7DDD, 0xE369, 0x7DE4, 0xE36A, 0x7DDE,
+	0xE36B, 0x7DFB, 0xE36C, 0x7DF2, 0xE36D, 0x7DE1, 0xE36E, 0x7E05,
+	0xE36F, 0x7E0A, 0xE370, 0x7E23, 0xE371, 0x7E21, 0xE372, 0x7E12,
+	0xE373, 0x7E31, 0xE374, 0x7E1F, 0xE375, 0x7E09, 0xE376, 0x7E0B,
+	0xE377, 0x7E22, 0xE378, 0x7E46, 0xE379, 0x7E66, 0xE37A, 0x7E3B,
+	0xE37B, 0x7E35, 0xE37C, 0x7E39, 0xE37D, 0x7E43, 0xE37E, 0x7E37,
+	0xE380, 0x7E32, 0xE381, 0x7E3A, 0xE382, 0x7E67, 0xE383, 0x7E5D,
+	0xE384, 0x7E56, 0xE385, 0x7E5E, 0xE386, 0x7E59, 0xE387, 0x7E5A,
+	0xE388, 0x7E79, 0xE389, 0x7E6A, 0xE38A, 0x7E69, 0xE38B, 0x7E7C,
+	0xE38C, 0x7E7B, 0xE38D, 0x7E83, 0xE38E, 0x7DD5, 0xE38F, 0x7E7D,
+	0xE390, 0x8FAE, 0xE391, 0x7E7F, 0xE392, 0x7E88, 0xE393, 0x7E89,
+	0xE394, 0x7E8C, 0xE395, 0x7E92, 0xE396, 0x7E90, 0xE397, 0x7E93,
+	0xE398, 0x7E94, 0xE399, 0x7E96, 0xE39A, 0x7E8E, 0xE39B, 0x7E9B,
+	0xE39C, 0x7E9C, 0xE39D, 0x7F38, 0xE39E, 0x7F3A, 0xE39F, 0x7F45,
+	0xE3A0, 0x7F4C, 0xE3A1, 0x7F4D, 0xE3A2, 0x7F4E, 0xE3A3, 0x7F50,
+	0xE3A4, 0x7F51, 0xE3A5, 0x7F55, 0xE3A6, 0x7F54, 0xE3A7, 0x7F58,
+	0xE3A8, 0x7F5F, 0xE3A9, 0x7F60, 0xE3AA, 0x7F68, 0xE3AB, 0x7F69,
+	0xE3AC, 0x7F67, 0xE3AD, 0x7F78, 0xE3AE, 0x7F82, 0xE3AF, 0x7F86,
+	0xE3B0, 0x7F83, 0xE3B1, 0x7F88, 0xE3B2, 0x7F87, 0xE3B3, 0x7F8C,
+	0xE3B4, 0x7F94, 0xE3B5, 0x7F9E, 0xE3B6, 0x7F9D, 0xE3B7, 0x7F9A,
+	0xE3B8, 0x7FA3, 0xE3B9, 0x7FAF, 0xE3BA, 0x7FB2, 0xE3BB, 0x7FB9,
+	0xE3BC, 0x7FAE, 0xE3BD, 0x7FB6, 0xE3BE, 0x7FB8, 0xE3BF, 0x8B71,
+	0xE3C0, 0x7FC5, 0xE3C1, 0x7FC6, 0xE3C2, 0x7FCA, 0xE3C3, 0x7FD5,
+	0xE3C4, 0x7FD4, 0xE3C5, 0x7FE1, 0xE3C6, 0x7FE6, 0xE3C7, 0x7FE9,
+	0xE3C8, 0x7FF3, 0xE3C9, 0x7FF9, 0xE3CA, 0x98DC, 0xE3CB, 0x8006,
+	0xE3CC, 0x8004, 0xE3CD, 0x800B, 0xE3CE, 0x8012, 0xE3CF, 0x8018,
+	0xE3D0, 0x8019, 0xE3D1, 0x801C, 0xE3D2, 0x8021, 0xE3D3, 0x8028,
+	0xE3D4, 0x803F, 0xE3D5, 0x803B, 0xE3D6, 0x804A, 0xE3D7, 0x8046,
+	0xE3D8, 0x8052, 0xE3D9, 0x8058, 0xE3DA, 0x805A, 0xE3DB, 0x805F,
+	0xE3DC, 0x8062, 0xE3DD, 0x8068, 0xE3DE, 0x8073, 0xE3DF, 0x8072,
+	0xE3E0, 0x8070, 0xE3E1, 0x8076, 0xE3E2, 0x8079, 0xE3E3, 0x807D,
+	0xE3E4, 0x807F, 0xE3E5, 0x8084, 0xE3E6, 0x8086, 0xE3E7, 0x8085,
+	0xE3E8, 0x809B, 0xE3E9, 0x8093, 0xE3EA, 0x809A, 0xE3EB, 0x80AD,
+	0xE3EC, 0x5190, 0xE3ED, 0x80AC, 0xE3EE, 0x80DB, 0xE3EF, 0x80E5,
+	0xE3F0, 0x80D9, 0xE3F1, 0x80DD, 0xE3F2, 0x80C4, 0xE3F3, 0x80DA,
+	0xE3F4, 0x80D6, 0xE3F5, 0x8109, 0xE3F6, 0x80EF, 0xE3F7, 0x80F1,
+	0xE3F8, 0x811B, 0xE3F9, 0x8129, 0xE3FA, 0x8123, 0xE3FB, 0x812F,
+	0xE3FC, 0x814B, 0xE440, 0x968B, 0xE441, 0x8146, 0xE442, 0x813E,
+	0xE443, 0x8153, 0xE444, 0x8151, 0xE445, 0x80FC, 0xE446, 0x8171,
+	0xE447, 0x816E, 0xE448, 0x8165, 0xE449, 0x8166, 0xE44A, 0x8174,
+	0xE44B, 0x8183, 0xE44C, 0x8188, 0xE44D, 0x818A, 0xE44E, 0x8180,
+	0xE44F, 0x8182, 0xE450, 0x81A0, 0xE451, 0x8195, 0xE452, 0x81A4,
+	0xE453, 0x81A3, 0xE454, 0x815F, 0xE455, 0x8193, 0xE456, 0x81A9,
+	0xE457, 0x81B0, 0xE458, 0x81B5, 0xE459, 0x81BE, 0xE45A, 0x81B8,
+	0xE45B, 0x81BD, 0xE45C, 0x81C0, 0xE45D, 0x81C2, 0xE45E, 0x81BA,
+	0xE45F, 0x81C9, 0xE460, 0x81CD, 0xE461, 0x81D1, 0xE462, 0x81D9,
+	0xE463, 0x81D8, 0xE464, 0x81C8, 0xE465, 0x81DA, 0xE466, 0x81DF,
+	0xE467, 0x81E0, 0xE468, 0x81E7, 0xE469, 0x81FA, 0xE46A, 0x81FB,
+	0xE46B, 0x81FE, 0xE46C, 0x8201, 0xE46D, 0x8202, 0xE46E, 0x8205,
+	0xE46F, 0x8207, 0xE470, 0x820A, 0xE471, 0x820D, 0xE472, 0x8210,
+	0xE473, 0x8216, 0xE474, 0x8229, 0xE475, 0x822B, 0xE476, 0x8238,
+	0xE477, 0x8233, 0xE478, 0x8240, 0xE479, 0x8259, 0xE47A, 0x8258,
+	0xE47B, 0x825D, 0xE47C, 0x825A, 0xE47D, 0x825F, 0xE47E, 0x8264,
+	0xE480, 0x8262, 0xE481, 0x8268, 0xE482, 0x826A, 0xE483, 0x826B,
+	0xE484, 0x822E, 0xE485, 0x8271, 0xE486, 0x8277, 0xE487, 0x8278,
+	0xE488, 0x827E, 0xE489, 0x828D, 0xE48A, 0x8292, 0xE48B, 0x82AB,
+	0xE48C, 0x829F, 0xE48D, 0x82BB, 0xE48E, 0x82AC, 0xE48F, 0x82E1,
+	0xE490, 0x82E3, 0xE491, 0x82DF, 0xE492, 0x82D2, 0xE493, 0x82F4,
+	0xE494, 0x82F3, 0xE495, 0x82FA, 0xE496, 0x8393, 0xE497, 0x8303,
+	0xE498, 0x82FB, 0xE499, 0x82F9, 0xE49A, 0x82DE, 0xE49B, 0x8306,
+	0xE49C, 0x82DC, 0xE49D, 0x8309, 0xE49E, 0x82D9, 0xE49F, 0x8335,
+	0xE4A0, 0x8334, 0xE4A1, 0x8316, 0xE4A2, 0x8332, 0xE4A3, 0x8331,
+	0xE4A4, 0x8340, 0xE4A5, 0x8339, 0xE4A6, 0x8350, 0xE4A7, 0x8345,
+	0xE4A8, 0x832F, 0xE4A9, 0x832B, 0xE4AA, 0x8317, 0xE4AB, 0x8318,
+	0xE4AC, 0x8385, 0xE4AD, 0x839A, 0xE4AE, 0x83AA, 0xE4AF, 0x839F,
+	0xE4B0, 0x83A2, 0xE4B1, 0x8396, 0xE4B2, 0x8323, 0xE4B3, 0x838E,
+	0xE4B4, 0x8387, 0xE4B5, 0x838A, 0xE4B6, 0x837C, 0xE4B7, 0x83B5,
+	0xE4B8, 0x8373, 0xE4B9, 0x8375, 0xE4BA, 0x83A0, 0xE4BB, 0x8389,
+	0xE4BC, 0x83A8, 0xE4BD, 0x83F4, 0xE4BE, 0x8413, 0xE4BF, 0x83EB,
+	0xE4C0, 0x83CE, 0xE4C1, 0x83FD, 0xE4C2, 0x8403, 0xE4C3, 0x83D8,
+	0xE4C4, 0x840B, 0xE4C5, 0x83C1, 0xE4C6, 0x83F7, 0xE4C7, 0x8407,
+	0xE4C8, 0x83E0, 0xE4C9, 0x83F2, 0xE4CA, 0x840D, 0xE4CB, 0x8422,
+	0xE4CC, 0x8420, 0xE4CD, 0x83BD, 0xE4CE, 0x8438, 0xE4CF, 0x8506,
+	0xE4D0, 0x83FB, 0xE4D1, 0x846D, 0xE4D2, 0x842A, 0xE4D3, 0x843C,
+	0xE4D4, 0x855A, 0xE4D5, 0x8484, 0xE4D6, 0x8477, 0xE4D7, 0x846B,
+	0xE4D8, 0x84AD, 0xE4D9, 0x846E, 0xE4DA, 0x8482, 0xE4DB, 0x8469,
+	0xE4DC, 0x8446, 0xE4DD, 0x842C, 0xE4DE, 0x846F, 0xE4DF, 0x8479,
+	0xE4E0, 0x8435, 0xE4E1, 0x84CA, 0xE4E2, 0x8462, 0xE4E3, 0x84B9,
+	0xE4E4, 0x84BF, 0xE4E5, 0x849F, 0xE4E6, 0x84D9, 0xE4E7, 0x84CD,
+	0xE4E8, 0x84BB, 0xE4E9, 0x84DA, 0xE4EA, 0x84D0, 0xE4EB, 0x84C1,
+	0xE4EC, 0x84C6, 0xE4ED, 0x84D6, 0xE4EE, 0x84A1, 0xE4EF, 0x8521,
+	0xE4F0, 0x84FF, 0xE4F1, 0x84F4, 0xE4F2, 0x8517, 0xE4F3, 0x8518,
+	0xE4F4, 0x852C, 0xE4F5, 0x851F, 0xE4F6, 0x8515, 0xE4F7, 0x8514,
+	0xE4F8, 0x84FC, 0xE4F9, 0x8540, 0xE4FA, 0x8563, 0xE4FB, 0x8558,
+	0xE4FC, 0x8548, 0xE540, 0x8541, 0xE541, 0x8602, 0xE542, 0x854B,
+	0xE543, 0x8555, 0xE544, 0x8580, 0xE545, 0x85A4, 0xE546, 0x8588,
+	0xE547, 0x8591, 0xE548, 0x858A, 0xE549, 0x85A8, 0xE54A, 0x856D,
+	0xE54B, 0x8594, 0xE54C, 0x859B, 0xE54D, 0x85EA, 0xE54E, 0x8587,
+	0xE54F, 0x859C, 0xE550, 0x8577, 0xE551, 0x857E, 0xE552, 0x8590,
+	0xE553, 0x85C9, 0xE554, 0x85BA, 0xE555, 0x85CF, 0xE556, 0x85B9,
+	0xE557, 0x85D0, 0xE558, 0x85D5, 0xE559, 0x85DD, 0xE55A, 0x85E5,
+	0xE55B, 0x85DC, 0xE55C, 0x85F9, 0xE55D, 0x860A, 0xE55E, 0x8613,
+	0xE55F, 0x860B, 0xE560, 0x85FE, 0xE561, 0x85FA, 0xE562, 0x8606,
+	0xE563, 0x8622, 0xE564, 0x861A, 0xE565, 0x8630, 0xE566, 0x863F,
+	0xE567, 0x864D, 0xE568, 0x4E55, 0xE569, 0x8654, 0xE56A, 0x865F,
+	0xE56B, 0x8667, 0xE56C, 0x8671, 0xE56D, 0x8693, 0xE56E, 0x86A3,
+	0xE56F, 0x86A9, 0xE570, 0x86AA, 0xE571, 0x868B, 0xE572, 0x868C,
+	0xE573, 0x86B6, 0xE574, 0x86AF, 0xE575, 0x86C4, 0xE576, 0x86C6,
+	0xE577, 0x86B0, 0xE578, 0x86C9, 0xE579, 0x8823, 0xE57A, 0x86AB,
+	0xE57B, 0x86D4, 0xE57C, 0x86DE, 0xE57D, 0x86E9, 0xE57E, 0x86EC,
+	0xE580, 0x86DF, 0xE581, 0x86DB, 0xE582, 0x86EF, 0xE583, 0x8712,
+	0xE584, 0x8706, 0xE585, 0x8708, 0xE586, 0x8700, 0xE587, 0x8703,
+	0xE588, 0x86FB, 0xE589, 0x8711, 0xE58A, 0x8709, 0xE58B, 0x870D,
+	0xE58C, 0x86F9, 0xE58D, 0x870A, 0xE58E, 0x8734, 0xE58F, 0x873F,
+	0xE590, 0x8737, 0xE591, 0x873B, 0xE592, 0x8725, 0xE593, 0x8729,
+	0xE594, 0x871A, 0xE595, 0x8760, 0xE596, 0x875F, 0xE597, 0x8778,
+	0xE598, 0x874C, 0xE599, 0x874E, 0xE59A, 0x8774, 0xE59B, 0x8757,
+	0xE59C, 0x8768, 0xE59D, 0x876E, 0xE59E, 0x8759, 0xE59F, 0x8753,
+	0xE5A0, 0x8763, 0xE5A1, 0x876A, 0xE5A2, 0x8805, 0xE5A3, 0x87A2,
+	0xE5A4, 0x879F, 0xE5A5, 0x8782, 0xE5A6, 0x87AF, 0xE5A7, 0x87CB,
+	0xE5A8, 0x87BD, 0xE5A9, 0x87C0, 0xE5AA, 0x87D0, 0xE5AB, 0x96D6,
+	0xE5AC, 0x87AB, 0xE5AD, 0x87C4, 0xE5AE, 0x87B3, 0xE5AF, 0x87C7,
+	0xE5B0, 0x87C6, 0xE5B1, 0x87BB, 0xE5B2, 0x87EF, 0xE5B3, 0x87F2,
+	0xE5B4, 0x87E0, 0xE5B5, 0x880F, 0xE5B6, 0x880D, 0xE5B7, 0x87FE,
+	0xE5B8, 0x87F6, 0xE5B9, 0x87F7, 0xE5BA, 0x880E, 0xE5BB, 0x87D2,
+	0xE5BC, 0x8811, 0xE5BD, 0x8816, 0xE5BE, 0x8815, 0xE5BF, 0x8822,
+	0xE5C0, 0x8821, 0xE5C1, 0x8831, 0xE5C2, 0x8836, 0xE5C3, 0x8839,
+	0xE5C4, 0x8827, 0xE5C5, 0x883B, 0xE5C6, 0x8844, 0xE5C7, 0x8842,
+	0xE5C8, 0x8852, 0xE5C9, 0x8859, 0xE5CA, 0x885E, 0xE5CB, 0x8862,
+	0xE5CC, 0x886B, 0xE5CD, 0x8881, 0xE5CE, 0x887E, 0xE5CF, 0x889E,
+	0xE5D0, 0x8875, 0xE5D1, 0x887D, 0xE5D2, 0x88B5, 0xE5D3, 0x8872,
+	0xE5D4, 0x8882, 0xE5D5, 0x8897, 0xE5D6, 0x8892, 0xE5D7, 0x88AE,
+	0xE5D8, 0x8899, 0xE5D9, 0x88A2, 0xE5DA, 0x888D, 0xE5DB, 0x88A4,
+	0xE5DC, 0x88B0, 0xE5DD, 0x88BF, 0xE5DE, 0x88B1, 0xE5DF, 0x88C3,
+	0xE5E0, 0x88C4, 0xE5E1, 0x88D4, 0xE5E2, 0x88D8, 0xE5E3, 0x88D9,
+	0xE5E4, 0x88DD, 0xE5E5, 0x88F9, 0xE5E6, 0x8902, 0xE5E7, 0x88FC,
+	0xE5E8, 0x88F4, 0xE5E9, 0x88E8, 0xE5EA, 0x88F2, 0xE5EB, 0x8904,
+	0xE5EC, 0x890C, 0xE5ED, 0x890A, 0xE5EE, 0x8913, 0xE5EF, 0x8943,
+	0xE5F0, 0x891E, 0xE5F1, 0x8925, 0xE5F2, 0x892A, 0xE5F3, 0x892B,
+	0xE5F4, 0x8941, 0xE5F5, 0x8944, 0xE5F6, 0x893B, 0xE5F7, 0x8936,
+	0xE5F8, 0x8938, 0xE5F9, 0x894C, 0xE5FA, 0x891D, 0xE5FB, 0x8960,
+	0xE5FC, 0x895E, 0xE640, 0x8966, 0xE641, 0x8964, 0xE642, 0x896D,
+	0xE643, 0x896A, 0xE644, 0x896F, 0xE645, 0x8974, 0xE646, 0x8977,
+	0xE647, 0x897E, 0xE648, 0x8983, 0xE649, 0x8988, 0xE64A, 0x898A,
+	0xE64B, 0x8993, 0xE64C, 0x8998, 0xE64D, 0x89A1, 0xE64E, 0x89A9,
+	0xE64F, 0x89A6, 0xE650, 0x89AC, 0xE651, 0x89AF, 0xE652, 0x89B2,
+	0xE653, 0x89BA, 0xE654, 0x89BD, 0xE655, 0x89BF, 0xE656, 0x89C0,
+	0xE657, 0x89DA, 0xE658, 0x89DC, 0xE659, 0x89DD, 0xE65A, 0x89E7,
+	0xE65B, 0x89F4, 0xE65C, 0x89F8, 0xE65D, 0x8A03, 0xE65E, 0x8A16,
+	0xE65F, 0x8A10, 0xE660, 0x8A0C, 0xE661, 0x8A1B, 0xE662, 0x8A1D,
+	0xE663, 0x8A25, 0xE664, 0x8A36, 0xE665, 0x8A41, 0xE666, 0x8A5B,
+	0xE667, 0x8A52, 0xE668, 0x8A46, 0xE669, 0x8A48, 0xE66A, 0x8A7C,
+	0xE66B, 0x8A6D, 0xE66C, 0x8A6C, 0xE66D, 0x8A62, 0xE66E, 0x8A85,
+	0xE66F, 0x8A82, 0xE670, 0x8A84, 0xE671, 0x8AA8, 0xE672, 0x8AA1,
+	0xE673, 0x8A91, 0xE674, 0x8AA5, 0xE675, 0x8AA6, 0xE676, 0x8A9A,
+	0xE677, 0x8AA3, 0xE678, 0x8AC4, 0xE679, 0x8ACD, 0xE67A, 0x8AC2,
+	0xE67B, 0x8ADA, 0xE67C, 0x8AEB, 0xE67D, 0x8AF3, 0xE67E, 0x8AE7,
+	0xE680, 0x8AE4, 0xE681, 0x8AF1, 0xE682, 0x8B14, 0xE683, 0x8AE0,
+	0xE684, 0x8AE2, 0xE685, 0x8AF7, 0xE686, 0x8ADE, 0xE687, 0x8ADB,
+	0xE688, 0x8B0C, 0xE689, 0x8B07, 0xE68A, 0x8B1A, 0xE68B, 0x8AE1,
+	0xE68C, 0x8B16, 0xE68D, 0x8B10, 0xE68E, 0x8B17, 0xE68F, 0x8B20,
+	0xE690, 0x8B33, 0xE691, 0x97AB, 0xE692, 0x8B26, 0xE693, 0x8B2B,
+	0xE694, 0x8B3E, 0xE695, 0x8B28, 0xE696, 0x8B41, 0xE697, 0x8B4C,
+	0xE698, 0x8B4F, 0xE699, 0x8B4E, 0xE69A, 0x8B49, 0xE69B, 0x8B56,
+	0xE69C, 0x8B5B, 0xE69D, 0x8B5A, 0xE69E, 0x8B6B, 0xE69F, 0x8B5F,
+	0xE6A0, 0x8B6C, 0xE6A1, 0x8B6F, 0xE6A2, 0x8B74, 0xE6A3, 0x8B7D,
+	0xE6A4, 0x8B80, 0xE6A5, 0x8B8C, 0xE6A6, 0x8B8E, 0xE6A7, 0x8B92,
+	0xE6A8, 0x8B93, 0xE6A9, 0x8B96, 0xE6AA, 0x8B99, 0xE6AB, 0x8B9A,
+	0xE6AC, 0x8C3A, 0xE6AD, 0x8C41, 0xE6AE, 0x8C3F, 0xE6AF, 0x8C48,
+	0xE6B0, 0x8C4C, 0xE6B1, 0x8C4E, 0xE6B2, 0x8C50, 0xE6B3, 0x8C55,
+	0xE6B4, 0x8C62, 0xE6B5, 0x8C6C, 0xE6B6, 0x8C78, 0xE6B7, 0x8C7A,
+	0xE6B8, 0x8C82, 0xE6B9, 0x8C89, 0xE6BA, 0x8C85, 0xE6BB, 0x8C8A,
+	0xE6BC, 0x8C8D, 0xE6BD, 0x8C8E, 0xE6BE, 0x8C94, 0xE6BF, 0x8C7C,
+	0xE6C0, 0x8C98, 0xE6C1, 0x621D, 0xE6C2, 0x8CAD, 0xE6C3, 0x8CAA,
+	0xE6C4, 0x8CBD, 0xE6C5, 0x8CB2, 0xE6C6, 0x8CB3, 0xE6C7, 0x8CAE,
+	0xE6C8, 0x8CB6, 0xE6C9, 0x8CC8, 0xE6CA, 0x8CC1, 0xE6CB, 0x8CE4,
+	0xE6CC, 0x8CE3, 0xE6CD, 0x8CDA, 0xE6CE, 0x8CFD, 0xE6CF, 0x8CFA,
+	0xE6D0, 0x8CFB, 0xE6D1, 0x8D04, 0xE6D2, 0x8D05, 0xE6D3, 0x8D0A,
+	0xE6D4, 0x8D07, 0xE6D5, 0x8D0F, 0xE6D6, 0x8D0D, 0xE6D7, 0x8D10,
+	0xE6D8, 0x9F4E, 0xE6D9, 0x8D13, 0xE6DA, 0x8CCD, 0xE6DB, 0x8D14,
+	0xE6DC, 0x8D16, 0xE6DD, 0x8D67, 0xE6DE, 0x8D6D, 0xE6DF, 0x8D71,
+	0xE6E0, 0x8D73, 0xE6E1, 0x8D81, 0xE6E2, 0x8D99, 0xE6E3, 0x8DC2,
+	0xE6E4, 0x8DBE, 0xE6E5, 0x8DBA, 0xE6E6, 0x8DCF, 0xE6E7, 0x8DDA,
+	0xE6E8, 0x8DD6, 0xE6E9, 0x8DCC, 0xE6EA, 0x8DDB, 0xE6EB, 0x8DCB,
+	0xE6EC, 0x8DEA, 0xE6ED, 0x8DEB, 0xE6EE, 0x8DDF, 0xE6EF, 0x8DE3,
+	0xE6F0, 0x8DFC, 0xE6F1, 0x8E08, 0xE6F2, 0x8E09, 0xE6F3, 0x8DFF,
+	0xE6F4, 0x8E1D, 0xE6F5, 0x8E1E, 0xE6F6, 0x8E10, 0xE6F7, 0x8E1F,
+	0xE6F8, 0x8E42, 0xE6F9, 0x8E35, 0xE6FA, 0x8E30, 0xE6FB, 0x8E34,
+	0xE6FC, 0x8E4A, 0xE740, 0x8E47, 0xE741, 0x8E49, 0xE742, 0x8E4C,
+	0xE743, 0x8E50, 0xE744, 0x8E48, 0xE745, 0x8E59, 0xE746, 0x8E64,
+	0xE747, 0x8E60, 0xE748, 0x8E2A, 0xE749, 0x8E63, 0xE74A, 0x8E55,
+	0xE74B, 0x8E76, 0xE74C, 0x8E72, 0xE74D, 0x8E7C, 0xE74E, 0x8E81,
+	0xE74F, 0x8E87, 0xE750, 0x8E85, 0xE751, 0x8E84, 0xE752, 0x8E8B,
+	0xE753, 0x8E8A, 0xE754, 0x8E93, 0xE755, 0x8E91, 0xE756, 0x8E94,
+	0xE757, 0x8E99, 0xE758, 0x8EAA, 0xE759, 0x8EA1, 0xE75A, 0x8EAC,
+	0xE75B, 0x8EB0, 0xE75C, 0x8EC6, 0xE75D, 0x8EB1, 0xE75E, 0x8EBE,
+	0xE75F, 0x8EC5, 0xE760, 0x8EC8, 0xE761, 0x8ECB, 0xE762, 0x8EDB,
+	0xE763, 0x8EE3, 0xE764, 0x8EFC, 0xE765, 0x8EFB, 0xE766, 0x8EEB,
+	0xE767, 0x8EFE, 0xE768, 0x8F0A, 0xE769, 0x8F05, 0xE76A, 0x8F15,
+	0xE76B, 0x8F12, 0xE76C, 0x8F19, 0xE76D, 0x8F13, 0xE76E, 0x8F1C,
+	0xE76F, 0x8F1F, 0xE770, 0x8F1B, 0xE771, 0x8F0C, 0xE772, 0x8F26,
+	0xE773, 0x8F33, 0xE774, 0x8F3B, 0xE775, 0x8F39, 0xE776, 0x8F45,
+	0xE777, 0x8F42, 0xE778, 0x8F3E, 0xE779, 0x8F4C, 0xE77A, 0x8F49,
+	0xE77B, 0x8F46, 0xE77C, 0x8F4E, 0xE77D, 0x8F57, 0xE77E, 0x8F5C,
+	0xE780, 0x8F62, 0xE781, 0x8F63, 0xE782, 0x8F64, 0xE783, 0x8F9C,
+	0xE784, 0x8F9F, 0xE785, 0x8FA3, 0xE786, 0x8FAD, 0xE787, 0x8FAF,
+	0xE788, 0x8FB7, 0xE789, 0x8FDA, 0xE78A, 0x8FE5, 0xE78B, 0x8FE2,
+	0xE78C, 0x8FEA, 0xE78D, 0x8FEF, 0xE78E, 0x9087, 0xE78F, 0x8FF4,
+	0xE790, 0x9005, 0xE791, 0x8FF9, 0xE792, 0x8FFA, 0xE793, 0x9011,
+	0xE794, 0x9015, 0xE795, 0x9021, 0xE796, 0x900D, 0xE797, 0x901E,
+	0xE798, 0x9016, 0xE799, 0x900B, 0xE79A, 0x9027, 0xE79B, 0x9036,
+	0xE79C, 0x9035, 0xE79D, 0x9039, 0xE79E, 0x8FF8, 0xE79F, 0x904F,
+	0xE7A0, 0x9050, 0xE7A1, 0x9051, 0xE7A2, 0x9052, 0xE7A3, 0x900E,
+	0xE7A4, 0x9049, 0xE7A5, 0x903E, 0xE7A6, 0x9056, 0xE7A7, 0x9058,
+	0xE7A8, 0x905E, 0xE7A9, 0x9068, 0xE7AA, 0x906F, 0xE7AB, 0x9076,
+	0xE7AC, 0x96A8, 0xE7AD, 0x9072, 0xE7AE, 0x9082, 0xE7AF, 0x907D,
+	0xE7B0, 0x9081, 0xE7B1, 0x9080, 0xE7B2, 0x908A, 0xE7B3, 0x9089,
+	0xE7B4, 0x908F, 0xE7B5, 0x90A8, 0xE7B6, 0x90AF, 0xE7B7, 0x90B1,
+	0xE7B8, 0x90B5, 0xE7B9, 0x90E2, 0xE7BA, 0x90E4, 0xE7BB, 0x6248,
+	0xE7BC, 0x90DB, 0xE7BD, 0x9102, 0xE7BE, 0x9112, 0xE7BF, 0x9119,
+	0xE7C0, 0x9132, 0xE7C1, 0x9130, 0xE7C2, 0x914A, 0xE7C3, 0x9156,
+	0xE7C4, 0x9158, 0xE7C5, 0x9163, 0xE7C6, 0x9165, 0xE7C7, 0x9169,
+	0xE7C8, 0x9173, 0xE7C9, 0x9172, 0xE7CA, 0x918B, 0xE7CB, 0x9189,
+	0xE7CC, 0x9182, 0xE7CD, 0x91A2, 0xE7CE, 0x91AB, 0xE7CF, 0x91AF,
+	0xE7D0, 0x91AA, 0xE7D1, 0x91B5, 0xE7D2, 0x91B4, 0xE7D3, 0x91BA,
+	0xE7D4, 0x91C0, 0xE7D5, 0x91C1, 0xE7D6, 0x91C9, 0xE7D7, 0x91CB,
+	0xE7D8, 0x91D0, 0xE7D9, 0x91D6, 0xE7DA, 0x91DF, 0xE7DB, 0x91E1,
+	0xE7DC, 0x91DB, 0xE7DD, 0x91FC, 0xE7DE, 0x91F5, 0xE7DF, 0x91F6,
+	0xE7E0, 0x921E, 0xE7E1, 0x91FF, 0xE7E2, 0x9214, 0xE7E3, 0x922C,
+	0xE7E4, 0x9215, 0xE7E5, 0x9211, 0xE7E6, 0x925E, 0xE7E7, 0x9257,
+	0xE7E8, 0x9245, 0xE7E9, 0x9249, 0xE7EA, 0x9264, 0xE7EB, 0x9248,
+	0xE7EC, 0x9295, 0xE7ED, 0x923F, 0xE7EE, 0x924B, 0xE7EF, 0x9250,
+	0xE7F0, 0x929C, 0xE7F1, 0x9296, 0xE7F2, 0x9293, 0xE7F3, 0x929B,
+	0xE7F4, 0x925A, 0xE7F5, 0x92CF, 0xE7F6, 0x92B9, 0xE7F7, 0x92B7,
+	0xE7F8, 0x92E9, 0xE7F9, 0x930F, 0xE7FA, 0x92FA, 0xE7FB, 0x9344,
+	0xE7FC, 0x932E, 0xE840, 0x9319, 0xE841, 0x9322, 0xE842, 0x931A,
+	0xE843, 0x9323, 0xE844, 0x933A, 0xE845, 0x9335, 0xE846, 0x933B,
+	0xE847, 0x935C, 0xE848, 0x9360, 0xE849, 0x937C, 0xE84A, 0x936E,
+	0xE84B, 0x9356, 0xE84C, 0x93B0, 0xE84D, 0x93AC, 0xE84E, 0x93AD,
+	0xE84F, 0x9394, 0xE850, 0x93B9, 0xE851, 0x93D6, 0xE852, 0x93D7,
+	0xE853, 0x93E8, 0xE854, 0x93E5, 0xE855, 0x93D8, 0xE856, 0x93C3,
+	0xE857, 0x93DD, 0xE858, 0x93D0, 0xE859, 0x93C8, 0xE85A, 0x93E4,
+	0xE85B, 0x941A, 0xE85C, 0x9414, 0xE85D, 0x9413, 0xE85E, 0x9403,
+	0xE85F, 0x9407, 0xE860, 0x9410, 0xE861, 0x9436, 0xE862, 0x942B,
+	0xE863, 0x9435, 0xE864, 0x9421, 0xE865, 0x943A, 0xE866, 0x9441,
+	0xE867, 0x9452, 0xE868, 0x9444, 0xE869, 0x945B, 0xE86A, 0x9460,
+	0xE86B, 0x9462, 0xE86C, 0x945E, 0xE86D, 0x946A, 0xE86E, 0x9229,
+	0xE86F, 0x9470, 0xE870, 0x9475, 0xE871, 0x9477, 0xE872, 0x947D,
+	0xE873, 0x945A, 0xE874, 0x947C, 0xE875, 0x947E, 0xE876, 0x9481,
+	0xE877, 0x947F, 0xE878, 0x9582, 0xE879, 0x9587, 0xE87A, 0x958A,
+	0xE87B, 0x9594, 0xE87C, 0x9596, 0xE87D, 0x9598, 0xE87E, 0x9599,
+	0xE880, 0x95A0, 0xE881, 0x95A8, 0xE882, 0x95A7, 0xE883, 0x95AD,
+	0xE884, 0x95BC, 0xE885, 0x95BB, 0xE886, 0x95B9, 0xE887, 0x95BE,
+	0xE888, 0x95CA, 0xE889, 0x6FF6, 0xE88A, 0x95C3, 0xE88B, 0x95CD,
+	0xE88C, 0x95CC, 0xE88D, 0x95D5, 0xE88E, 0x95D4, 0xE88F, 0x95D6,
+	0xE890, 0x95DC, 0xE891, 0x95E1, 0xE892, 0x95E5, 0xE893, 0x95E2,
+	0xE894, 0x9621, 0xE895, 0x9628, 0xE896, 0x962E, 0xE897, 0x962F,
+	0xE898, 0x9642, 0xE899, 0x964C, 0xE89A, 0x964F, 0xE89B, 0x964B,
+	0xE89C, 0x9677, 0xE89D, 0x965C, 0xE89E, 0x965E, 0xE89F, 0x965D,
+	0xE8A0, 0x965F, 0xE8A1, 0x9666, 0xE8A2, 0x9672, 0xE8A3, 0x966C,
+	0xE8A4, 0x968D, 0xE8A5, 0x9698, 0xE8A6, 0x9695, 0xE8A7, 0x9697,
+	0xE8A8, 0x96AA, 0xE8A9, 0x96A7, 0xE8AA, 0x96B1, 0xE8AB, 0x96B2,
+	0xE8AC, 0x96B0, 0xE8AD, 0x96B4, 0xE8AE, 0x96B6, 0xE8AF, 0x96B8,
+	0xE8B0, 0x96B9, 0xE8B1, 0x96CE, 0xE8B2, 0x96CB, 0xE8B3, 0x96C9,
+	0xE8B4, 0x96CD, 0xE8B5, 0x894D, 0xE8B6, 0x96DC, 0xE8B7, 0x970D,
+	0xE8B8, 0x96D5, 0xE8B9, 0x96F9, 0xE8BA, 0x9704, 0xE8BB, 0x9706,
+	0xE8BC, 0x9708, 0xE8BD, 0x9713, 0xE8BE, 0x970E, 0xE8BF, 0x9711,
+	0xE8C0, 0x970F, 0xE8C1, 0x9716, 0xE8C2, 0x9719, 0xE8C3, 0x9724,
+	0xE8C4, 0x972A, 0xE8C5, 0x9730, 0xE8C6, 0x9739, 0xE8C7, 0x973D,
+	0xE8C8, 0x973E, 0xE8C9, 0x9744, 0xE8CA, 0x9746, 0xE8CB, 0x9748,
+	0xE8CC, 0x9742, 0xE8CD, 0x9749, 0xE8CE, 0x975C, 0xE8CF, 0x9760,
+	0xE8D0, 0x9764, 0xE8D1, 0x9766, 0xE8D2, 0x9768, 0xE8D3, 0x52D2,
+	0xE8D4, 0x976B, 0xE8D5, 0x9771, 0xE8D6, 0x9779, 0xE8D7, 0x9785,
+	0xE8D8, 0x977C, 0xE8D9, 0x9781, 0xE8DA, 0x977A, 0xE8DB, 0x9786,
+	0xE8DC, 0x978B, 0xE8DD, 0x978F, 0xE8DE, 0x9790, 0xE8DF, 0x979C,
+	0xE8E0, 0x97A8, 0xE8E1, 0x97A6, 0xE8E2, 0x97A3, 0xE8E3, 0x97B3,
+	0xE8E4, 0x97B4, 0xE8E5, 0x97C3, 0xE8E6, 0x97C6, 0xE8E7, 0x97C8,
+	0xE8E8, 0x97CB, 0xE8E9, 0x97DC, 0xE8EA, 0x97ED, 0xE8EB, 0x9F4F,
+	0xE8EC, 0x97F2, 0xE8ED, 0x7ADF, 0xE8EE, 0x97F6, 0xE8EF, 0x97F5,
+	0xE8F0, 0x980F, 0xE8F1, 0x980C, 0xE8F2, 0x9838, 0xE8F3, 0x9824,
+	0xE8F4, 0x9821, 0xE8F5, 0x9837, 0xE8F6, 0x983D, 0xE8F7, 0x9846,
+	0xE8F8, 0x984F, 0xE8F9, 0x984B, 0xE8FA, 0x986B, 0xE8FB, 0x986F,
+	0xE8FC, 0x9870, 0xE940, 0x9871, 0xE941, 0x9874, 0xE942, 0x9873,
+	0xE943, 0x98AA, 0xE944, 0x98AF, 0xE945, 0x98B1, 0xE946, 0x98B6,
+	0xE947, 0x98C4, 0xE948, 0x98C3, 0xE949, 0x98C6, 0xE94A, 0x98E9,
+	0xE94B, 0x98EB, 0xE94C, 0x9903, 0xE94D, 0x9909, 0xE94E, 0x9912,
+	0xE94F, 0x9914, 0xE950, 0x9918, 0xE951, 0x9921, 0xE952, 0x991D,
+	0xE953, 0x991E, 0xE954, 0x9924, 0xE955, 0x9920, 0xE956, 0x992C,
+	0xE957, 0x992E, 0xE958, 0x993D, 0xE959, 0x993E, 0xE95A, 0x9942,
+	0xE95B, 0x9949, 0xE95C, 0x9945, 0xE95D, 0x9950, 0xE95E, 0x994B,
+	0xE95F, 0x9951, 0xE960, 0x9952, 0xE961, 0x994C, 0xE962, 0x9955,
+	0xE963, 0x9997, 0xE964, 0x9998, 0xE965, 0x99A5, 0xE966, 0x99AD,
+	0xE967, 0x99AE, 0xE968, 0x99BC, 0xE969, 0x99DF, 0xE96A, 0x99DB,
+	0xE96B, 0x99DD, 0xE96C, 0x99D8, 0xE96D, 0x99D1, 0xE96E, 0x99ED,
+	0xE96F, 0x99EE, 0xE970, 0x99F1, 0xE971, 0x99F2, 0xE972, 0x99FB,
+	0xE973, 0x99F8, 0xE974, 0x9A01, 0xE975, 0x9A0F, 0xE976, 0x9A05,
+	0xE977, 0x99E2, 0xE978, 0x9A19, 0xE979, 0x9A2B, 0xE97A, 0x9A37,
+	0xE97B, 0x9A45, 0xE97C, 0x9A42, 0xE97D, 0x9A40, 0xE97E, 0x9A43,
+	0xE980, 0x9A3E, 0xE981, 0x9A55, 0xE982, 0x9A4D, 0xE983, 0x9A5B,
+	0xE984, 0x9A57, 0xE985, 0x9A5F, 0xE986, 0x9A62, 0xE987, 0x9A65,
+	0xE988, 0x9A64, 0xE989, 0x9A69, 0xE98A, 0x9A6B, 0xE98B, 0x9A6A,
+	0xE98C, 0x9AAD, 0xE98D, 0x9AB0, 0xE98E, 0x9ABC, 0xE98F, 0x9AC0,
+	0xE990, 0x9ACF, 0xE991, 0x9AD1, 0xE992, 0x9AD3, 0xE993, 0x9AD4,
+	0xE994, 0x9ADE, 0xE995, 0x9ADF, 0xE996, 0x9AE2, 0xE997, 0x9AE3,
+	0xE998, 0x9AE6, 0xE999, 0x9AEF, 0xE99A, 0x9AEB, 0xE99B, 0x9AEE,
+	0xE99C, 0x9AF4, 0xE99D, 0x9AF1, 0xE99E, 0x9AF7, 0xE99F, 0x9AFB,
+	0xE9A0, 0x9B06, 0xE9A1, 0x9B18, 0xE9A2, 0x9B1A, 0xE9A3, 0x9B1F,
+	0xE9A4, 0x9B22, 0xE9A5, 0x9B23, 0xE9A6, 0x9B25, 0xE9A7, 0x9B27,
+	0xE9A8, 0x9B28, 0xE9A9, 0x9B29, 0xE9AA, 0x9B2A, 0xE9AB, 0x9B2E,
+	0xE9AC, 0x9B2F, 0xE9AD, 0x9B32, 0xE9AE, 0x9B44, 0xE9AF, 0x9B43,
+	0xE9B0, 0x9B4F, 0xE9B1, 0x9B4D, 0xE9B2, 0x9B4E, 0xE9B3, 0x9B51,
+	0xE9B4, 0x9B58, 0xE9B5, 0x9B74, 0xE9B6, 0x9B93, 0xE9B7, 0x9B83,
+	0xE9B8, 0x9B91, 0xE9B9, 0x9B96, 0xE9BA, 0x9B97, 0xE9BB, 0x9B9F,
+	0xE9BC, 0x9BA0, 0xE9BD, 0x9BA8, 0xE9BE, 0x9BB4, 0xE9BF, 0x9BC0,
+	0xE9C0, 0x9BCA, 0xE9C1, 0x9BB9, 0xE9C2, 0x9BC6, 0xE9C3, 0x9BCF,
+	0xE9C4, 0x9BD1, 0xE9C5, 0x9BD2, 0xE9C6, 0x9BE3, 0xE9C7, 0x9BE2,
+	0xE9C8, 0x9BE4, 0xE9C9, 0x9BD4, 0xE9CA, 0x9BE1, 0xE9CB, 0x9C3A,
+	0xE9CC, 0x9BF2, 0xE9CD, 0x9BF1, 0xE9CE, 0x9BF0, 0xE9CF, 0x9C15,
+	0xE9D0, 0x9C14, 0xE9D1, 0x9C09, 0xE9D2, 0x9C13, 0xE9D3, 0x9C0C,
+	0xE9D4, 0x9C06, 0xE9D5, 0x9C08, 0xE9D6, 0x9C12, 0xE9D7, 0x9C0A,
+	0xE9D8, 0x9C04, 0xE9D9, 0x9C2E, 0xE9DA, 0x9C1B, 0xE9DB, 0x9C25,
+	0xE9DC, 0x9C24, 0xE9DD, 0x9C21, 0xE9DE, 0x9C30, 0xE9DF, 0x9C47,
+	0xE9E0, 0x9C32, 0xE9E1, 0x9C46, 0xE9E2, 0x9C3E, 0xE9E3, 0x9C5A,
+	0xE9E4, 0x9C60, 0xE9E5, 0x9C67, 0xE9E6, 0x9C76, 0xE9E7, 0x9C78,
+	0xE9E8, 0x9CE7, 0xE9E9, 0x9CEC, 0xE9EA, 0x9CF0, 0xE9EB, 0x9D09,
+	0xE9EC, 0x9D08, 0xE9ED, 0x9CEB, 0xE9EE, 0x9D03, 0xE9EF, 0x9D06,
+	0xE9F0, 0x9D2A, 0xE9F1, 0x9D26, 0xE9F2, 0x9DAF, 0xE9F3, 0x9D23,
+	0xE9F4, 0x9D1F, 0xE9F5, 0x9D44, 0xE9F6, 0x9D15, 0xE9F7, 0x9D12,
+	0xE9F8, 0x9D41, 0xE9F9, 0x9D3F, 0xE9FA, 0x9D3E, 0xE9FB, 0x9D46,
+	0xE9FC, 0x9D48, 0xEA40, 0x9D5D, 0xEA41, 0x9D5E, 0xEA42, 0x9D64,
+	0xEA43, 0x9D51, 0xEA44, 0x9D50, 0xEA45, 0x9D59, 0xEA46, 0x9D72,
+	0xEA47, 0x9D89, 0xEA48, 0x9D87, 0xEA49, 0x9DAB, 0xEA4A, 0x9D6F,
+	0xEA4B, 0x9D7A, 0xEA4C, 0x9D9A, 0xEA4D, 0x9DA4, 0xEA4E, 0x9DA9,
+	0xEA4F, 0x9DB2, 0xEA50, 0x9DC4, 0xEA51, 0x9DC1, 0xEA52, 0x9DBB,
+	0xEA53, 0x9DB8, 0xEA54, 0x9DBA, 0xEA55, 0x9DC6, 0xEA56, 0x9DCF,
+	0xEA57, 0x9DC2, 0xEA58, 0x9DD9, 0xEA59, 0x9DD3, 0xEA5A, 0x9DF8,
+	0xEA5B, 0x9DE6, 0xEA5C, 0x9DED, 0xEA5D, 0x9DEF, 0xEA5E, 0x9DFD,
+	0xEA5F, 0x9E1A, 0xEA60, 0x9E1B, 0xEA61, 0x9E1E, 0xEA62, 0x9E75,
+	0xEA63, 0x9E79, 0xEA64, 0x9E7D, 0xEA65, 0x9E81, 0xEA66, 0x9E88,
+	0xEA67, 0x9E8B, 0xEA68, 0x9E8C, 0xEA69, 0x9E92, 0xEA6A, 0x9E95,
+	0xEA6B, 0x9E91, 0xEA6C, 0x9E9D, 0xEA6D, 0x9EA5, 0xEA6E, 0x9EA9,
+	0xEA6F, 0x9EB8, 0xEA70, 0x9EAA, 0xEA71, 0x9EAD, 0xEA72, 0x9761,
+	0xEA73, 0x9ECC, 0xEA74, 0x9ECE, 0xEA75, 0x9ECF, 0xEA76, 0x9ED0,
+	0xEA77, 0x9ED4, 0xEA78, 0x9EDC, 0xEA79, 0x9EDE, 0xEA7A, 0x9EDD,
+	0xEA7B, 0x9EE0, 0xEA7C, 0x9EE5, 0xEA7D, 0x9EE8, 0xEA7E, 0x9EEF,
+	0xEA80, 0x9EF4, 0xEA81, 0x9EF6, 0xEA82, 0x9EF7, 0xEA83, 0x9EF9,
+	0xEA84, 0x9EFB, 0xEA85, 0x9EFC, 0xEA86, 0x9EFD, 0xEA87, 0x9F07,
+	0xEA88, 0x9F08, 0xEA89, 0x76B7, 0xEA8A, 0x9F15, 0xEA8B, 0x9F21,
+	0xEA8C, 0x9F2C, 0xEA8D, 0x9F3E, 0xEA8E, 0x9F4A, 0xEA8F, 0x9F52,
+	0xEA90, 0x9F54, 0xEA91, 0x9F63, 0xEA92, 0x9F5F, 0xEA93, 0x9F60,
+	0xEA94, 0x9F61, 0xEA95, 0x9F66, 0xEA96, 0x9F67, 0xEA97, 0x9F6C,
+	0xEA98, 0x9F6A, 0xEA99, 0x9F77, 0xEA9A, 0x9F72, 0xEA9B, 0x9F76,
+	0xEA9C, 0x9F95, 0xEA9D, 0x9F9C, 0xEA9E, 0x9FA0, 0xEA9F, 0x582F,
+	0xEAA0, 0x69C7, 0xEAA1, 0x9059, 0xEAA2, 0x7464, 0xEAA3, 0x51DC,
+	0xEAA4, 0x7199, 0xFA40, 0x2170, 0xFA41, 0x2171, 0xFA42, 0x2172,
+	0xFA43, 0x2173, 0xFA44, 0x2174, 0xFA45, 0x2175, 0xFA46, 0x2176,
+	0xFA47, 0x2177, 0xFA48, 0x2178, 0xFA49, 0x2179, 0xFA55, 0xFFE4,
+	0xFA56, 0xFF07, 0xFA57, 0xFF02, 0xFA5C, 0x7E8A, 0xFA5D, 0x891C,
+	0xFA5E, 0x9348, 0xFA5F, 0x9288, 0xFA60, 0x84DC, 0xFA61, 0x4FC9,
+	0xFA62, 0x70BB, 0xFA63, 0x6631, 0xFA64, 0x68C8, 0xFA65, 0x92F9,
+	0xFA66, 0x66FB, 0xFA67, 0x5F45, 0xFA68, 0x4E28, 0xFA69, 0x4EE1,
+	0xFA6A, 0x4EFC, 0xFA6B, 0x4F00, 0xFA6C, 0x4F03, 0xFA6D, 0x4F39,
+	0xFA6E, 0x4F56, 0xFA6F, 0x4F92, 0xFA70, 0x4F8A, 0xFA71, 0x4F9A,
+	0xFA72, 0x4F94, 0xFA73, 0x4FCD, 0xFA74, 0x5040, 0xFA75, 0x5022,
+	0xFA76, 0x4FFF, 0xFA77, 0x501E, 0xFA78, 0x5046, 0xFA79, 0x5070,
+	0xFA7A, 0x5042, 0xFA7B, 0x5094, 0xFA7C, 0x50F4, 0xFA7D, 0x50D8,
+	0xFA7E, 0x514A, 0xFA80, 0x5164, 0xFA81, 0x519D, 0xFA82, 0x51BE,
+	0xFA83, 0x51EC, 0xFA84, 0x5215, 0xFA85, 0x529C, 0xFA86, 0x52A6,
+	0xFA87, 0x52C0, 0xFA88, 0x52DB, 0xFA89, 0x5300, 0xFA8A, 0x5307,
+	0xFA8B, 0x5324, 0xFA8C, 0x5372, 0xFA8D, 0x5393, 0xFA8E, 0x53B2,
+	0xFA8F, 0x53DD, 0xFA90, 0xFA0E, 0xFA91, 0x549C, 0xFA92, 0x548A,
+	0xFA93, 0x54A9, 0xFA94, 0x54FF, 0xFA95, 0x5586, 0xFA96, 0x5759,
+	0xFA97, 0x5765, 0xFA98, 0x57AC, 0xFA99, 0x57C8, 0xFA9A, 0x57C7,
+	0xFA9B, 0xFA0F, 0xFA9C, 0xFA10, 0xFA9D, 0x589E, 0xFA9E, 0x58B2,
+	0xFA9F, 0x590B, 0xFAA0, 0x5953, 0xFAA1, 0x595B, 0xFAA2, 0x595D,
+	0xFAA3, 0x5963, 0xFAA4, 0x59A4, 0xFAA5, 0x59BA, 0xFAA6, 0x5B56,
+	0xFAA7, 0x5BC0, 0xFAA8, 0x752F, 0xFAA9, 0x5BD8, 0xFAAA, 0x5BEC,
+	0xFAAB, 0x5C1E, 0xFAAC, 0x5CA6, 0xFAAD, 0x5CBA, 0xFAAE, 0x5CF5,
+	0xFAAF, 0x5D27, 0xFAB0, 0x5D53, 0xFAB1, 0xFA11, 0xFAB2, 0x5D42,
+	0xFAB3, 0x5D6D, 0xFAB4, 0x5DB8, 0xFAB5, 0x5DB9, 0xFAB6, 0x5DD0,
+	0xFAB7, 0x5F21, 0xFAB8, 0x5F34, 0xFAB9, 0x5F67, 0xFABA, 0x5FB7,
+	0xFABB, 0x5FDE, 0xFABC, 0x605D, 0xFABD, 0x6085, 0xFABE, 0x608A,
+	0xFABF, 0x60DE, 0xFAC0, 0x60D5, 0xFAC1, 0x6120, 0xFAC2, 0x60F2,
+	0xFAC3, 0x6111, 0xFAC4, 0x6137, 0xFAC5, 0x6130, 0xFAC6, 0x6198,
+	0xFAC7, 0x6213, 0xFAC8, 0x62A6, 0xFAC9, 0x63F5, 0xFACA, 0x6460,
+	0xFACB, 0x649D, 0xFACC, 0x64CE, 0xFACD, 0x654E, 0xFACE, 0x6600,
+	0xFACF, 0x6615, 0xFAD0, 0x663B, 0xFAD1, 0x6609, 0xFAD2, 0x662E,
+	0xFAD3, 0x661E, 0xFAD4, 0x6624, 0xFAD5, 0x6665, 0xFAD6, 0x6657,
+	0xFAD7, 0x6659, 0xFAD8, 0xFA12, 0xFAD9, 0x6673, 0xFADA, 0x6699,
+	0xFADB, 0x66A0, 0xFADC, 0x66B2, 0xFADD, 0x66BF, 0xFADE, 0x66FA,
+	0xFADF, 0x670E, 0xFAE0, 0xF929, 0xFAE1, 0x6766, 0xFAE2, 0x67BB,
+	0xFAE3, 0x6852, 0xFAE4, 0x67C0, 0xFAE5, 0x6801, 0xFAE6, 0x6844,
+	0xFAE7, 0x68CF, 0xFAE8, 0xFA13, 0xFAE9, 0x6968, 0xFAEA, 0xFA14,
+	0xFAEB, 0x6998, 0xFAEC, 0x69E2, 0xFAED, 0x6A30, 0xFAEE, 0x6A6B,
+	0xFAEF, 0x6A46, 0xFAF0, 0x6A73, 0xFAF1, 0x6A7E, 0xFAF2, 0x6AE2,
+	0xFAF3, 0x6AE4, 0xFAF4, 0x6BD6, 0xFAF5, 0x6C3F, 0xFAF6, 0x6C5C,
+	0xFAF7, 0x6C86, 0xFAF8, 0x6C6F, 0xFAF9, 0x6CDA, 0xFAFA, 0x6D04,
+	0xFAFB, 0x6D87, 0xFAFC, 0x6D6F, 0xFB40, 0x6D96, 0xFB41, 0x6DAC,
+	0xFB42, 0x6DCF, 0xFB43, 0x6DF8, 0xFB44, 0x6DF2, 0xFB45, 0x6DFC,
+	0xFB46, 0x6E39, 0xFB47, 0x6E5C, 0xFB48, 0x6E27, 0xFB49, 0x6E3C,
+	0xFB4A, 0x6EBF, 0xFB4B, 0x6F88, 0xFB4C, 0x6FB5, 0xFB4D, 0x6FF5,
+	0xFB4E, 0x7005, 0xFB4F, 0x7007, 0xFB50, 0x7028, 0xFB51, 0x7085,
+	0xFB52, 0x70AB, 0xFB53, 0x710F, 0xFB54, 0x7104, 0xFB55, 0x715C,
+	0xFB56, 0x7146, 0xFB57, 0x7147, 0xFB58, 0xFA15, 0xFB59, 0x71C1,
+	0xFB5A, 0x71FE, 0xFB5B, 0x72B1, 0xFB5C, 0x72BE, 0xFB5D, 0x7324,
+	0xFB5E, 0xFA16, 0xFB5F, 0x7377, 0xFB60, 0x73BD, 0xFB61, 0x73C9,
+	0xFB62, 0x73D6, 0xFB63, 0x73E3, 0xFB64, 0x73D2, 0xFB65, 0x7407,
+	0xFB66, 0x73F5, 0xFB67, 0x7426, 0xFB68, 0x742A, 0xFB69, 0x7429,
+	0xFB6A, 0x742E, 0xFB6B, 0x7462, 0xFB6C, 0x7489, 0xFB6D, 0x749F,
+	0xFB6E, 0x7501, 0xFB6F, 0x756F, 0xFB70, 0x7682, 0xFB71, 0x769C,
+	0xFB72, 0x769E, 0xFB73, 0x769B, 0xFB74, 0x76A6, 0xFB75, 0xFA17,
+	0xFB76, 0x7746, 0xFB77, 0x52AF, 0xFB78, 0x7821, 0xFB79, 0x784E,
+	0xFB7A, 0x7864, 0xFB7B, 0x787A, 0xFB7C, 0x7930, 0xFB7D, 0xFA18,
+	0xFB7E, 0xFA19, 0xFB80, 0xFA1A, 0xFB81, 0x7994, 0xFB82, 0xFA1B,
+	0xFB83, 0x799B, 0xFB84, 0x7AD1, 0xFB85, 0x7AE7, 0xFB86, 0xFA1C,
+	0xFB87, 0x7AEB, 0xFB88, 0x7B9E, 0xFB89, 0xFA1D, 0xFB8A, 0x7D48,
+	0xFB8B, 0x7D5C, 0xFB8C, 0x7DB7, 0xFB8D, 0x7DA0, 0xFB8E, 0x7DD6,
+	0xFB8F, 0x7E52, 0xFB90, 0x7F47, 0xFB91, 0x7FA1, 0xFB92, 0xFA1E,
+	0xFB93, 0x8301, 0xFB94, 0x8362, 0xFB95, 0x837F, 0xFB96, 0x83C7,
+	0xFB97, 0x83F6, 0xFB98, 0x8448, 0xFB99, 0x84B4, 0xFB9A, 0x8553,
+	0xFB9B, 0x8559, 0xFB9C, 0x856B, 0xFB9D, 0xFA1F, 0xFB9E, 0x85B0,
+	0xFB9F, 0xFA20, 0xFBA0, 0xFA21, 0xFBA1, 0x8807, 0xFBA2, 0x88F5,
+	0xFBA3, 0x8A12, 0xFBA4, 0x8A37, 0xFBA5, 0x8A79, 0xFBA6, 0x8AA7,
+	0xFBA7, 0x8ABE, 0xFBA8, 0x8ADF, 0xFBA9, 0xFA22, 0xFBAA, 0x8AF6,
+	0xFBAB, 0x8B53, 0xFBAC, 0x8B7F, 0xFBAD, 0x8CF0, 0xFBAE, 0x8CF4,
+	0xFBAF, 0x8D12, 0xFBB0, 0x8D76, 0xFBB1, 0xFA23, 0xFBB2, 0x8ECF,
+	0xFBB3, 0xFA24, 0xFBB4, 0xFA25, 0xFBB5, 0x9067, 0xFBB6, 0x90DE,
+	0xFBB7, 0xFA26, 0xFBB8, 0x9115, 0xFBB9, 0x9127, 0xFBBA, 0x91DA,
+	0xFBBB, 0x91D7, 0xFBBC, 0x91DE, 0xFBBD, 0x91ED, 0xFBBE, 0x91EE,
+	0xFBBF, 0x91E4, 0xFBC0, 0x91E5, 0xFBC1, 0x9206, 0xFBC2, 0x9210,
+	0xFBC3, 0x920A, 0xFBC4, 0x923A, 0xFBC5, 0x9240, 0xFBC6, 0x923C,
+	0xFBC7, 0x924E, 0xFBC8, 0x9259, 0xFBC9, 0x9251, 0xFBCA, 0x9239,
+	0xFBCB, 0x9267, 0xFBCC, 0x92A7, 0xFBCD, 0x9277, 0xFBCE, 0x9278,
+	0xFBCF, 0x92E7, 0xFBD0, 0x92D7, 0xFBD1, 0x92D9, 0xFBD2, 0x92D0,
+	0xFBD3, 0xFA27, 0xFBD4, 0x92D5, 0xFBD5, 0x92E0, 0xFBD6, 0x92D3,
+	0xFBD7, 0x9325, 0xFBD8, 0x9321, 0xFBD9, 0x92FB, 0xFBDA, 0xFA28,
+	0xFBDB, 0x931E, 0xFBDC, 0x92FF, 0xFBDD, 0x931D, 0xFBDE, 0x9302,
+	0xFBDF, 0x9370, 0xFBE0, 0x9357, 0xFBE1, 0x93A4, 0xFBE2, 0x93C6,
+	0xFBE3, 0x93DE, 0xFBE4, 0x93F8, 0xFBE5, 0x9431, 0xFBE6, 0x9445,
+	0xFBE7, 0x9448, 0xFBE8, 0x9592, 0xFBE9, 0xF9DC, 0xFBEA, 0xFA29,
+	0xFBEB, 0x969D, 0xFBEC, 0x96AF, 0xFBED, 0x9733, 0xFBEE, 0x973B,
+	0xFBEF, 0x9743, 0xFBF0, 0x974D, 0xFBF1, 0x974F, 0xFBF2, 0x9751,
+	0xFBF3, 0x9755, 0xFBF4, 0x9857, 0xFBF5, 0x9865, 0xFBF6, 0xFA2A,
+	0xFBF7, 0xFA2B, 0xFBF8, 0x9927, 0xFBF9, 0xFA2C, 0xFBFA, 0x999E,
+	0xFBFB, 0x9A4E, 0xFBFC, 0x9AD9, 0xFC40, 0x9ADC, 0xFC41, 0x9B75,
+	0xFC42, 0x9B72, 0xFC43, 0x9B8F, 0xFC44, 0x9BB1, 0xFC45, 0x9BBB,
+	0xFC46, 0x9C00, 0xFC47, 0x9D70, 0xFC48, 0x9D6B, 0xFC49, 0xFA2D,
+	0xFC4A, 0x9E19, 0xFC4B, 0x9ED1, 0, 0
+};
+#endif
+
+
+
+WCHAR ff_convert (	/* Converted code, 0 means conversion error */
+	WCHAR	chr,	/* Character code to be converted */
+	UINT	dir		/* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
+)
+{
+	const WCHAR *p;
+	WCHAR c;
+	int i, n, li, hi;
+
+
+	if (chr <= 0x80) {	/* ASCII */
+		c = chr;
+	} else {
+#if !_TINY_TABLE
+		if (dir) {		/* OEMCP to unicode */
+			p = sjis2uni;
+			hi = sizeof(sjis2uni) / 4 - 1;
+		} else {		/* Unicode to OEMCP */
+			p = uni2sjis;
+			hi = sizeof(uni2sjis) / 4 - 1;
+		}
+		li = 0;
+		for (n = 16; n; n--) {
+			i = li + (hi - li) / 2;
+			if (chr == p[i * 2]) break;
+			if (chr > p[i * 2])
+				li = i;
+			else
+				hi = i;
+		}
+		c = n ? p[i * 2 + 1] : 0;
+#else
+		if (dir) {		/* OEMCP to unicode (Incremental search)*/
+			p = &uni2sjis[1];
+			do {
+				c = *p;
+				p += 2;
+			} while (c && c != chr);
+			p -= 3;
+			c = *p;
+		} else {		/* Unicode to OEMCP */
+			li = 0; hi = sizeof(uni2sjis) / 4 - 1;
+			for (n = 16; n; n--) {
+				i = li + (hi - li) / 2;
+				if (chr == uni2sjis[i * 2]) break;
+				if (chr > uni2sjis[i * 2])
+					li = i;
+				else
+					hi = i;
+			}
+			c = n ? uni2sjis[i * 2 + 1] : 0;
+		}
+#endif
+	}
+
+	return c;
+}
+
+
+
+WCHAR ff_wtoupper (	/* Upper converted character */
+	WCHAR chr		/* Input character */
+)
+{
+	static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 };
+	static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
+	int i;
+
+
+	for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ;
+
+	return tbl_lower[i] ? tbl_upper[i] : chr;
+}
+#endif /* FILE_SYSTEM_USE_LFN */
diff --git a/src/Xilinx/libsrc/xilffs_v3_8/src/diskio.c b/src/Xilinx/libsrc/xilffs_v3_8/src/diskio.c
new file mode 100644
index 0000000..e80800b
--- /dev/null
+++ b/src/Xilinx/libsrc/xilffs_v3_8/src/diskio.c
@@ -0,0 +1,546 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file diskio.c
+*		This file is the glue layer between file system and
+*		driver.
+*		Description related to SD driver:
+*		Process to use file system with SD
+*		Select xilffs in SDK when creating a BSP
+*		In SDK, set "fs_interface" to 1 to select SD interface.
+*		This glue layer can currently be used only with one
+*		SD controller enabled.
+*		In order to use eMMC, in SDK set "Enable MMC" to 1. If not,
+*		SD support is enabled by default.
+*
+*		Description:
+*		This glue layer initializes the host controller and SD card
+*		in disk_initialize. If SD card supports it, 4-bit mode and
+*		high speed mode will be enabled.
+*		The default block size is 512 bytes.
+*		disk_read and disk_write functions are used to read and
+*		write files using ADMA2 in polled mode.
+*		The file system can be used to read from and write to an
+*		SD card that is already formatted as FATFS.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver	Who	Date		Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hk   10/17/13 First release
+* 2.0   hk   02/12/14 Corrected status check in disk initialize. CR# 772072.
+* 2.1   hk   04/16/14 Move check for ExtCSD high speed bit set inside if
+*                     condition for high speed support.
+*                     Include xil_types.h irrespective of xsdps.h. CR# 797086.
+* 2.2   hk   07/28/14 Make changes to enable use of data cache.
+* 3.0	sk	 12/04/14 Added support for micro SD without
+* 					  WP/CD. CR# 810655.
+*					  Make changes for prototypes of disk_read and
+*					  disk_write according to latest version.
+*			 12/15/14 Modified the code according to MISRAC 2012 Compliant.
+*					  Updated the FatFs to R0.10b
+*					  Removed alignment for local buffers as CacheInvalidate
+*					  will take care of it.
+*		sg   03/03/15 Added card detection check logic
+*		     04/28/15 Card detection only in case of card detection signal
+* 3.1   sk   06/04/15 Added support for SD1.
+* 3.2   sk   11/24/15 Considered the slot type before checking the CD/WP pins.
+* 3.3   sk   04/01/15 Added one second delay for checking CD pin.
+* 3.4   sk   06/09/16 Added support for mkfs.
+* 3.8   mj   07/31/17 Added support for RAM based FATfs.
+*       mn   12/04/17 Resolve errors in XilFFS for ARMCC compiler
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+#include "diskio.h"
+#include "ff.h"
+#include "xil_types.h"
+
+#ifdef FILE_SYSTEM_INTERFACE_SD
+#include "xsdps.h"		/* SD device driver */
+#endif
+#include "sleep.h"
+#include "xil_printf.h"
+
+#define HIGH_SPEED_SUPPORT	0x01U
+#define WIDTH_4_BIT_SUPPORT	0x4U
+#define SD_CLK_25_MHZ		25000000U
+#define SD_CLK_26_MHZ		26000000U
+#define SD_CLK_52_MHZ		52000000U
+#define EXT_CSD_DEVICE_TYPE_BYTE	196
+#define EXT_CSD_4_BIT_WIDTH_BYTE	183
+#define EXT_CSD_HIGH_SPEED_BYTE		185
+#define EXT_CSD_DEVICE_TYPE_HIGH_SPEED	0x3
+#define SD_CD_DELAY		10000U
+
+#ifdef FILE_SYSTEM_INTERFACE_RAM
+#include "xparameters.h"
+
+static char *dataramfs = NULL;
+
+#define BLOCKSIZE       1U
+#define SECTORSIZE      512U
+#define SECTORCNT       (RAMFS_SIZE / SECTORSIZE)
+#endif
+
+/*--------------------------------------------------------------------------
+
+	Public Functions
+
+---------------------------------------------------------------------------*/
+
+/*
+ * Global variables
+ */
+static DSTATUS Stat[2] = {STA_NOINIT, STA_NOINIT};	/* Disk status */
+
+#ifdef FILE_SYSTEM_INTERFACE_SD
+static XSdPs SdInstance[2];
+static u32 BaseAddress;
+static u32 CardDetect;
+static u32 WriteProtect;
+static u32 SlotType[2];
+static u8 HostCntrlrVer[2];
+#endif
+
+#ifdef __ICCARM__
+#pragma data_alignment = 32
+static u8 ExtCsd[512];
+#pragma data_alignment = 4
+#else
+static u8 ExtCsd[512] __attribute__ ((aligned(32)));
+#endif
+
+/*-----------------------------------------------------------------------*/
+/* Get Disk Status							*/
+/*-----------------------------------------------------------------------*/
+
+/*****************************************************************************/
+/**
+*
+* Gets the status of the disk.
+* In case of SD, it checks whether card is present or not.
+*
+* @param	pdrv - Drive number
+*
+* @return
+*		0		Status ok
+*		STA_NOINIT	Drive not initialized
+*		STA_NODISK	No medium in the drive
+*		STA_PROTECT	Write protected
+*
+* @note		In case Card detect signal is not connected,
+*		this function will not be able to check if card is present.
+*
+******************************************************************************/
+DSTATUS disk_status (
+		BYTE pdrv	/* Drive number (0) */
+)
+{
+	DSTATUS s = Stat[pdrv];
+	u32 StatusReg;
+	u32 DelayCount = 0;
+
+#ifdef FILE_SYSTEM_INTERFACE_SD
+		if (SdInstance[pdrv].Config.BaseAddress == (u32)0) {
+#ifdef XPAR_XSDPS_1_DEVICE_ID
+				if(pdrv == 1) {
+						BaseAddress = XPAR_XSDPS_1_BASEADDR;
+						CardDetect = XPAR_XSDPS_1_HAS_CD;
+						WriteProtect = XPAR_XSDPS_1_HAS_WP;
+				} else {
+#endif
+						BaseAddress = XPAR_XSDPS_0_BASEADDR;
+						CardDetect = XPAR_XSDPS_0_HAS_CD;
+						WriteProtect = XPAR_XSDPS_0_HAS_WP;
+#ifdef XPAR_XSDPS_1_DEVICE_ID
+				}
+#endif
+				HostCntrlrVer[pdrv] = (u8)(XSdPs_ReadReg16(BaseAddress,
+						XSDPS_HOST_CTRL_VER_OFFSET) & XSDPS_HC_SPEC_VER_MASK);
+				if (HostCntrlrVer[pdrv] == XSDPS_HC_SPEC_V3) {
+					SlotType[pdrv] = XSdPs_ReadReg(BaseAddress,
+							XSDPS_CAPS_OFFSET) & XSDPS_CAPS_SLOT_TYPE_MASK;
+				} else {
+					SlotType[pdrv] = 0;
+				}
+		}
+		StatusReg = XSdPs_GetPresentStatusReg((u32)BaseAddress);
+		if (SlotType[pdrv] != XSDPS_CAPS_EMB_SLOT) {
+			if (CardDetect) {
+				while ((StatusReg & XSDPS_PSR_CARD_INSRT_MASK) == 0U) {
+					if (DelayCount == 500U) {
+						s = STA_NODISK | STA_NOINIT;
+						goto Label;
+					} else {
+						/* Wait for 10 msec */
+						usleep(SD_CD_DELAY);
+						DelayCount++;
+						StatusReg = XSdPs_GetPresentStatusReg((u32)BaseAddress);
+					}
+				}
+			}
+			s &= ~STA_NODISK;
+			if (WriteProtect) {
+					if ((StatusReg & XSDPS_PSR_WPS_PL_MASK) == 0U){
+						s |= STA_PROTECT;
+						goto Label;
+					}
+			}
+			s &= ~STA_PROTECT;
+		} else {
+			s &= ~STA_NODISK & ~STA_PROTECT;
+		}
+
+
+Label:
+		Stat[pdrv] = s;
+#endif
+
+		return s;
+}
+
+/*-----------------------------------------------------------------------*/
+/* Initialize Disk Drive						 */
+/*-----------------------------------------------------------------------*/
+/*****************************************************************************/
+/**
+*
+* Initializes the drive.
+* In case of SD, it initializes the host controller and the card.
+* This function also selects additional settings such as bus width,
+* speed and block size.
+*
+* @param	pdrv - Drive number
+*
+* @return	s - which contains an OR of the following information
+*		STA_NODISK	Disk is not present
+*		STA_NOINIT	Drive not initialized
+*		STA_PROTECT	Drive is write protected
+*		0 or only STA_PROTECT both indicate successful initialization.
+*
+* @note
+*
+******************************************************************************/
+DSTATUS disk_initialize (
+		BYTE pdrv	/* Physical drive number (0) */
+)
+{
+	DSTATUS s;
+	s32 Status;
+#ifdef FILE_SYSTEM_INTERFACE_SD
+	XSdPs_Config *SdConfig;
+#endif
+
+	s = disk_status(pdrv);
+	if ((s & STA_NODISK) != 0U) {
+		return s;
+	}
+
+	/* If disk is already initialized */
+	if ((s & STA_NOINIT) == 0U) {
+		return s;
+	}
+
+#ifdef FILE_SYSTEM_INTERFACE_SD
+	if (CardDetect) {
+			/*
+			 * Card detection check
+			 * If the HC detects the No Card State, power will be cleared
+			 */
+			while(!((XSDPS_PSR_CARD_DPL_MASK |
+					XSDPS_PSR_CARD_STABLE_MASK |
+					XSDPS_PSR_CARD_INSRT_MASK) ==
+					( XSdPs_GetPresentStatusReg((u32)BaseAddress) &
+					(XSDPS_PSR_CARD_DPL_MASK |
+					XSDPS_PSR_CARD_STABLE_MASK |
+					XSDPS_PSR_CARD_INSRT_MASK))));
+	}
+
+	/*
+	 * Initialize the host controller
+	 */
+	SdConfig = XSdPs_LookupConfig((u16)pdrv);
+	if (NULL == SdConfig) {
+		s |= STA_NOINIT;
+		return s;
+	}
+
+	Status = XSdPs_CfgInitialize(&SdInstance[pdrv], SdConfig,
+					SdConfig->BaseAddress);
+	if (Status != XST_SUCCESS) {
+		s |= STA_NOINIT;
+		return s;
+	}
+
+	Status = XSdPs_CardInitialize(&SdInstance[pdrv]);
+	if (Status != XST_SUCCESS) {
+		s |= STA_NOINIT;
+		return s;
+	}
+
+
+	/*
+	 * Disk is initialized.
+	 * Store the same in Stat.
+	 */
+	s &= (~STA_NOINIT);
+
+	Stat[pdrv] = s;
+#endif
+
+#ifdef FILE_SYSTEM_INTERFACE_RAM
+	/* Assign RAMFS address value from xparameters.h */
+	dataramfs = (char *)RAMFS_START_ADDR;
+
+	/* Clearing No init Status for RAM */
+	s &= (~STA_NOINIT);
+	Stat[pdrv] = s;
+#endif
+
+	return s;
+}
+
+
+/*-----------------------------------------------------------------------*/
+/* Read Sector(s)							 */
+/*-----------------------------------------------------------------------*/
+/*****************************************************************************/
+/**
+*
+* Reads the drive
+* In case of SD, it reads the SD card using ADMA2 in polled mode.
+*
+* @param	pdrv - Drive number
+* @param	*buff - Pointer to the data buffer to store read data
+* @param	sector - Start sector number
+* @param	count - Sector count
+*
+* @return
+*		RES_OK		Read successful
+*		STA_NOINIT	Drive not initialized
+*		RES_ERROR	Read not successful
+*
+* @note
+*
+******************************************************************************/
+DRESULT disk_read (
+		BYTE pdrv,	/* Physical drive number (0) */
+		BYTE *buff,	/* Pointer to the data buffer to store read data */
+		DWORD sector,	/* Start sector number (LBA) */
+		UINT count	/* Sector count (1..128) */
+)
+{
+	DSTATUS s;
+#ifdef FILE_SYSTEM_INTERFACE_SD
+	s32 Status;
+	DWORD LocSector = sector;
+#endif
+
+	s = disk_status(pdrv);
+
+	if ((s & STA_NOINIT) != 0U) {
+		return RES_NOTRDY;
+	}
+	if (count == 0U) {
+		return RES_PARERR;
+	}
+
+#ifdef FILE_SYSTEM_INTERFACE_SD
+	/* Convert LBA to byte address if needed */
+	if ((SdInstance[pdrv].HCS) == 0U) {
+		LocSector *= (DWORD)XSDPS_BLK_SIZE_512_MASK;
+	}
+
+	Status  = XSdPs_ReadPolled(&SdInstance[pdrv], (u32)LocSector, count, buff);
+	if (Status != XST_SUCCESS) {
+		return RES_ERROR;
+	}
+#endif
+
+#ifdef FILE_SYSTEM_INTERFACE_RAM
+	memcpy(buff, dataramfs + (sector * SECTORSIZE), count * SECTORSIZE);
+#endif
+
+    return RES_OK;
+}
+
+/*-----------------------------------------------------------------------*/
+/* Miscellaneous Functions						*/
+/*-----------------------------------------------------------------------*/
+
+DRESULT disk_ioctl (
+	BYTE pdrv,				/* Physical drive number (0) */
+	BYTE cmd,				/* Control code */
+	void *buff				/* Buffer to send/receive control data */
+)
+{
+	DRESULT res = RES_OK;
+
+#ifdef FILE_SYSTEM_INTERFACE_SD
+	void *LocBuff = buff;
+	if ((disk_status(pdrv) & STA_NOINIT) != 0U) {	/* Check if card is in the socket */
+		return RES_NOTRDY;
+	}
+
+	res = RES_ERROR;
+	switch (cmd) {
+		case (BYTE)CTRL_SYNC :	/* Make sure that no pending write process */
+			res = RES_OK;
+			break;
+
+		case (BYTE)GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */
+			(*((DWORD *)(void *)LocBuff)) = (DWORD)SdInstance[pdrv].SectorCount;
+			res = RES_OK;
+			break;
+
+		case (BYTE)GET_BLOCK_SIZE :	/* Get erase block size in unit of sector (DWORD) */
+			(*((DWORD *)((void *)LocBuff))) = ((DWORD)128);
+			res = RES_OK;
+			break;
+
+		default:
+			res = RES_PARERR;
+			break;
+	}
+#endif
+
+#ifdef FILE_SYSTEM_INTERFACE_RAM
+	switch (cmd) {
+	case (BYTE)CTRL_SYNC:
+		break;
+	case (BYTE)GET_BLOCK_SIZE:
+		*(WORD *)buff = BLOCKSIZE;
+		break;
+	case (BYTE)GET_SECTOR_SIZE:
+		*(WORD *)buff = SECTORSIZE;
+		break;
+	case (BYTE)GET_SECTOR_COUNT:
+		*(DWORD *)buff = SECTORCNT;
+		break;
+	default:
+		res = RES_PARERR;
+		break;
+	}
+#endif
+
+	return res;
+}
+
+/******************************************************************************/
+/**
+*
+* This function is User Provided Timer Function for FatFs module
+*
+* @param	None
+*
+* @return	DWORD
+*
+* @note		None
+*
+****************************************************************************/
+
+DWORD get_fattime (void)
+{
+	return	((DWORD)(2010U - 1980U) << 25U)	/* Fixed to Jan. 1, 2010 */
+		| ((DWORD)1 << 21)
+		| ((DWORD)1 << 16)
+		| ((DWORD)0 << 11)
+		| ((DWORD)0 << 5)
+		| ((DWORD)0 >> 1);
+}
+
+/*****************************************************************************/
+/**
+*
+* Reads the drive
+* In case of SD, it reads the SD card using ADMA2 in polled mode.
+*
+* @param	pdrv - Drive number
+* @param	*buff - Pointer to the data to be written
+* @param	sector - Sector address
+* @param	count - Sector count
+*
+* @return
+*		RES_OK		Read successful
+*		STA_NOINIT	Drive not initialized
+*		RES_ERROR	Read not successful
+*
+* @note
+*
+******************************************************************************/
+DRESULT disk_write (
+	BYTE pdrv,			/* Physical drive nmuber (0..) */
+	const BYTE *buff,	/* Data to be written */
+	DWORD sector,		/* Sector address (LBA) */
+	UINT count			/* Number of sectors to write (1..128) */
+)
+{
+	DSTATUS s;
+#ifdef FILE_SYSTEM_INTERFACE_SD
+	s32 Status;
+	DWORD LocSector = sector;
+#endif
+
+	s = disk_status(pdrv);
+	if ((s & STA_NOINIT) != 0U) {
+		return RES_NOTRDY;
+	}
+	if (count == 0U) {
+		return RES_PARERR;
+	}
+
+#ifdef FILE_SYSTEM_INTERFACE_SD
+	/* Convert LBA to byte address if needed */
+	if ((SdInstance[pdrv].HCS) == 0U) {
+		LocSector *= (DWORD)XSDPS_BLK_SIZE_512_MASK;
+	}
+
+	Status  = XSdPs_WritePolled(&SdInstance[pdrv], (u32)LocSector, count, buff);
+	if (Status != XST_SUCCESS) {
+		return RES_ERROR;
+	}
+
+#endif
+
+#ifdef FILE_SYSTEM_INTERFACE_RAM
+	memcpy(dataramfs + (sector * SECTORSIZE), buff, count * SECTORSIZE);
+#endif
+
+	return RES_OK;
+}
diff --git a/src/Xilinx/libsrc/xilffs_v3_8/src/ff.c b/src/Xilinx/libsrc/xilffs_v3_8/src/ff.c
new file mode 100644
index 0000000..7f6ce79
--- /dev/null
+++ b/src/Xilinx/libsrc/xilffs_v3_8/src/ff.c
@@ -0,0 +1,5237 @@
+/*----------------------------------------------------------------------------/
+/  FatFs - FAT file system module  R0.10b                (C)ChaN, 2014
+/-----------------------------------------------------------------------------/
+/ FatFs module is a generic FAT file system module for small embedded systems.
+/ This is a free software that opened for education, research and commercial
+/ developments under license policy of following terms.
+/
+/  Copyright (C) 2014, ChaN, all right reserved.
+/
+/ * The FatFs module is a free software and there is NO WARRANTY.
+/ * No restriction on use. You can use, modify and redistribute it for
+/   personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/-----------------------------------------------------------------------------/
+/ Feb 26,'06 R0.00  Prototype.
+/
+/ Apr 29,'06 R0.01  First stable version.
+/
+/ Jun 01,'06 R0.02  Added FAT12 support.
+/                   Removed unbuffered mode.
+/                   Fixed a problem on small (<32M) partition.
+/ Jun 10,'06 R0.02a Added a configuration option (_FS_MINIMUM).
+/
+/ Sep 22,'06 R0.03  Added f_rename().
+/                   Changed option _FS_MINIMUM to _FS_MINIMIZE.
+/ Dec 11,'06 R0.03a Improved cluster scan algorithm to write files fast.
+/                   Fixed f_mkdir() creates incorrect directory on FAT32.
+/
+/ Feb 04,'07 R0.04  Supported multiple drive system.
+/                   Changed some interfaces for multiple drive system.
+/                   Changed f_mountdrv() to f_mount().
+/                   Added f_mkfs().
+/ Apr 01,'07 R0.04a Supported multiple partitions on a physical drive.
+/                   Added a capability of extending file size to f_lseek().
+/                   Added minimization level 3.
+/                   Fixed an endian sensitive code in f_mkfs().
+/ May 05,'07 R0.04b Added a configuration option _USE_NTFLAG.
+/                   Added FSINFO support.
+/                   Fixed DBCS name can result FR_INVALID_NAME.
+/                   Fixed short seek (<= csize) collapses the file object.
+/
+/ Aug 25,'07 R0.05  Changed arguments of f_read(), f_write() and f_mkfs().
+/                   Fixed f_mkfs() on FAT32 creates incorrect FSINFO.
+/                   Fixed f_mkdir() on FAT32 creates incorrect directory.
+/ Feb 03,'08 R0.05a Added f_truncate() and f_utime().
+/                   Fixed off by one error at FAT sub-type determination.
+/                   Fixed btr in f_read() can be mistruncated.
+/                   Fixed cached sector is not flushed when create and close without write.
+/
+/ Apr 01,'08 R0.06  Added fputc(), fputs(), fprintf() and fgets().
+/                   Improved performance of f_lseek() on moving to the same or following cluster.
+/
+/ Apr 01,'09 R0.07  Merged Tiny-FatFs as a configuration option. (_FS_TINY)
+/                   Added long file name feature.
+/                   Added multiple code page feature.
+/                   Added re-entrancy for multitask operation.
+/                   Added auto cluster size selection to f_mkfs().
+/                   Added rewind option to f_readdir().
+/                   Changed result code of critical errors.
+/                   Renamed string functions to avoid name collision.
+/ Apr 14,'09 R0.07a Separated out OS dependent code on reentrant cfg.
+/                   Added multiple sector size feature.
+/ Jun 21,'09 R0.07c Fixed f_unlink() can return FR_OK on error.
+/                   Fixed wrong cache control in f_lseek().
+/                   Added relative path feature.
+/                   Added f_chdir() and f_chdrive().
+/                   Added proper case conversion to extended character.
+/ Nov 03,'09 R0.07e Separated out configuration options from ff.h to ffconf.h.
+/                   Fixed f_unlink() fails to remove a sub-directory on _FS_RPATH.
+/                   Fixed name matching error on the 13 character boundary.
+/                   Added a configuration option, _LFN_UNICODE.
+/                   Changed f_readdir() to return the SFN with always upper case on non-LFN cfg.
+/
+/ May 15,'10 R0.08  Added a memory configuration option. (_USE_LFN = 3)
+/                   Added file lock feature. (_FS_SHARE)
+/                   Added fast seek feature. (_USE_FASTSEEK)
+/                   Changed some types on the API, XCHAR->TCHAR.
+/                   Changed .fname in the FILINFO structure on Unicode cfg.
+/                   String functions support UTF-8 encoding files on Unicode cfg.
+/ Aug 16,'10 R0.08a Added f_getcwd().
+/                   Added sector erase feature. (_USE_ERASE)
+/                   Moved file lock semaphore table from fs object to the bss.
+/                   Fixed a wrong directory entry is created on non-LFN cfg when the given name contains ';'.
+/                   Fixed f_mkfs() creates wrong FAT32 volume.
+/ Jan 15,'11 R0.08b Fast seek feature is also applied to f_read() and f_write().
+/                   f_lseek() reports required table size on creating CLMP.
+/                   Extended format syntax of f_printf().
+/                   Ignores duplicated directory separators in given path name.
+/
+/ Sep 06,'11 R0.09  f_mkfs() supports multiple partition to complete the multiple partition feature.
+/                   Added f_fdisk().
+/ Aug 27,'12 R0.09a Changed f_open() and f_opendir() reject null object pointer to avoid crash.
+/                   Changed option name _FS_SHARE to _FS_LOCK.
+/                   Fixed assertion failure due to OS/2 EA on FAT12/16 volume.
+/ Jan 24,'13 R0.09b Added f_setlabel() and f_getlabel().
+/
+/ Oct 02,'13 R0.10  Added selection of character encoding on the file. (_STRF_ENCODE)
+/                   Added f_closedir().
+/                   Added forced full FAT scan for f_getfree(). (_FS_NOFSINFO)
+/                   Added forced mount feature with changes of f_mount().
+/                   Improved behavior of volume auto detection.
+/                   Improved write throughput of f_puts() and f_printf().
+/                   Changed argument of f_chdrive(), f_mkfs(), disk_read() and disk_write().
+/                   Fixed f_write() can be truncated when the file size is close to 4GB.
+/                   Fixed f_open(), f_mkdir() and f_setlabel() can return incorrect error code.
+/ Jan 15,'14 R0.10a Added arbitrary strings as drive number in the path name. (_STR_VOLUME_ID)
+/                   Added a configuration option of minimum sector size. (_MIN_SS)
+/                   2nd argument of f_rename() can have a drive number and it will be ignored.
+/                   Fixed f_mount() with forced mount fails when drive number is >= 1.
+/                   Fixed f_close() invalidates the file object without volume lock.
+/                   Fixed f_closedir() returns but the volume lock is left acquired.
+/                   Fixed creation of an entry with LFN fails on too many SFN collisions.
+/ May 19,'14 R0.10b Fixed a hard error in the disk I/O layer can collapse the directory entry.
+/                   Fixed LFN entry is not deleted on delete/rename an object with lossy converted SFN.
+/---------------------------------------------------------------------------*/
+#include "xparameters.h"
+#if (defined FILE_SYSTEM_INTERFACE_SD) || (defined FILE_SYSTEM_INTERFACE_RAM)
+#include "ff.h"			/* FatFs configurations and declarations */
+#include "diskio.h"		/* Declarations of low level disk I/O functions */
+#include "xil_printf.h"
+
+
+
+/*--------------------------------------------------------------------------
+
+   Module Private Definitions
+
+---------------------------------------------------------------------------*/
+
+#if FAT_FS != 8051	/* Revision ID */
+#error Wrong include file (ff.h).
+#endif
+
+
+/* Reentrancy related */
+#if _FS_REENTRANT
+#if _USE_LFN == 1
+#error Static LFN work area cannot be used at thread-safe configuration.
+#endif
+#define	ENTER_FF(fs)		{ if (!lock_fs(fs)) return FR_TIMEOUT; }
+#define	LEAVE_FF(fs, res)	{ unlock_fs((fs), (res)); return (res); }
+#else
+#define	ENTER_FF(fs)
+#define LEAVE_FF(fs, res)	return ((res))
+#endif
+
+#define	ABORT(fs, res)		{ fp->err = (BYTE)(res); LEAVE_FF((fs), (res)); }
+
+
+/* Definitions of sector size */
+#if (_MAX_SS < _MIN_SS) || (_MAX_SS != 512 && _MAX_SS != 1024 && _MAX_SS != 2048 && _MAX_SS != 4096) || (_MIN_SS != 512 && _MIN_SS != 1024 && _MIN_SS != 2048 && _MIN_SS != 4096)
+#error Wrong sector size configuration.
+#endif
+#if _MAX_SS == _MIN_SS
+#define	SS(fs)	_MAX_SS	/* Fixed sector size */
+#else
+#define	SS(fs)	((fs)->ssize)	/* Variable sector size */
+#endif
+
+
+/* File access control feature */
+#if _FS_LOCK
+#if _FS_READONLY
+#error _FS_LOCK must be 0 at read-only cfg.
+#endif
+typedef struct {
+	FATFS *fs;		/* Object ID 1, volume (NULL:blank entry) */
+	DWORD clu;		/* Object ID 2, directory (0:root) */
+	WORD idx;		/* Object ID 3, directory index */
+	WORD ctr;		/* Object open counter, 0:none, 0x01..0xFF:read mode open count, 0x100:write mode */
+} FILESEM;
+#endif
+
+
+
+/* DBCS code ranges and SBCS extend character conversion table */
+
+#if _CODE_PAGE == 932	/* Japanese Shift-JIS */
+#define DF1S	0x81U	/* DBC 1st byte range 1 start */
+#define DF_1E	0x9FU	/* DBC 1st byte range 1 end */
+#define DF_2S	0xE0U	/* DBC 1st byte range 2 start */
+#define DF_2E	0xFCU	/* DBC 1st byte range 2 end */
+#define DS_1S	0x40U	/* DBC 2nd byte range 1 start */
+#define DS_1E	0x7EU	/* DBC 2nd byte range 1 end */
+#define DS_2S	0x80U	/* DBC 2nd byte range 2 start */
+#define DS_2E	0xFCU	/* DBC 2nd byte range 2 end */
+
+#elif _CODE_PAGE == 936	/* Simplified Chinese GBK */
+#define DF1S	0x81U
+#define DF_1E	0xFEU
+#define DS_1S	0x40U
+#define DS_1E	0x7EU
+#define DS_2S	0x80U
+#define DS_2E	0xFEU
+
+#elif _CODE_PAGE == 949	/* Korean */
+#define DF1S	0x81U
+#define DF_1E	0xFEU
+#define DS_1S	0x41U
+#define DS_1E	0x5AU
+#define DS_2S	0x61U
+#define DS_2E	0x7AU
+#define _DS3S	0x81U
+#define _DS3E	0xFEU
+
+#elif _CODE_PAGE == 950	/* Traditional Chinese Big5 */
+#define DF1S	0x81U
+#define DF_1E	0xFEU
+#define DS_1S	0x40U
+#define DS_1E	0x7EU
+#define DS_2S	0xA1U
+#define DS_2E	0xFEU
+
+#elif _CODE_PAGE == 437	/* U.S. (OEM) */
+#define DF1S	0
+#define _EXCVT {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F,0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+				0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 720	/* Arabic (OEM) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x45,0x41,0x84,0x41,0x86,0x43,0x45,0x45,0x45,0x49,0x49,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x49,0x49,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 737	/* Greek (OEM) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x96,0x97,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \
+				0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0xAA,0x92,0x93,0x94,0x95,0x96,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0x97,0xEA,0xEB,0xEC,0xE4,0xED,0xEE,0xE7,0xE8,0xF1,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 775	/* Baltic (OEM) */
+#define DF1S	0
+#define _EXCVT {0x80,0x9A,0x91,0xA0,0x8E,0x95,0x8F,0x80,0xAD,0xED,0x8A,0x8A,0xA1,0x8D,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0x95,0x96,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
+				0xA0,0xA1,0xE0,0xA3,0xA3,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xA5,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE3,0xE8,0xE8,0xEA,0xEA,0xEE,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 850	/* Multilingual Latin 1 (OEM) */
+#define DF1S	0
+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
+				0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 852	/* Latin 2 (OEM) */
+#define DF1S	0
+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xDE,0x8F,0x80,0x9D,0xD3,0x8A,0x8A,0xD7,0x8D,0x8E,0x8F,0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0x9F, \
+				0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD2,0xD5,0xD6,0xD7,0xB7,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xE0,0xE1,0xE2,0xE3,0xE3,0xD5,0xE6,0xE6,0xE8,0xE9,0xE8,0xEB,0xED,0xED,0xDD,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xEB,0xFC,0xFC,0xFE,0xFF}
+
+#elif _CODE_PAGE == 855	/* Cyrillic (OEM) */
+#define DF1S	0
+#define _EXCVT {0x81,0x81,0x83,0x83,0x85,0x85,0x87,0x87,0x89,0x89,0x8B,0x8B,0x8D,0x8D,0x8F,0x8F,0x91,0x91,0x93,0x93,0x95,0x95,0x97,0x97,0x99,0x99,0x9B,0x9B,0x9D,0x9D,0x9F,0x9F, \
+				0xA1,0xA1,0xA3,0xA3,0xA5,0xA5,0xA7,0xA7,0xA9,0xA9,0xAB,0xAB,0xAD,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB6,0xB6,0xB8,0xB8,0xB9,0xBA,0xBB,0xBC,0xBE,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD3,0xD3,0xD5,0xD5,0xD7,0xD7,0xDD,0xD9,0xDA,0xDB,0xDC,0xDD,0xE0,0xDF, \
+				0xE0,0xE2,0xE2,0xE4,0xE4,0xE6,0xE6,0xE8,0xE8,0xEA,0xEA,0xEC,0xEC,0xEE,0xEE,0xEF,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 857	/* Turkish (OEM) */
+#define DF1S	0
+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0x98,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x98,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9E, \
+				0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA6,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xDE,0x59,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 858	/* Multilingual Latin 1 + Euro (OEM) */
+#define DF1S	0
+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
+				0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 862	/* Hebrew (OEM) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+				0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 866	/* Russian (OEM) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+				0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0x90,0x91,0x92,0x93,0x9d,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F,0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 874	/* Thai (OEM, Windows) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 1250 /* Central Europe (Windows) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \
+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xA3,0xB4,0xB5,0xB6,0xB7,0xB8,0xA5,0xAA,0xBB,0xBC,0xBD,0xBC,0xAF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF}
+
+#elif _CODE_PAGE == 1251 /* Cyrillic (Windows) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x82,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x80,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \
+				0xA0,0xA2,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB2,0xA5,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xA3,0xBD,0xBD,0xAF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF}
+
+#elif _CODE_PAGE == 1252 /* Latin 1 (Windows) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0xAd,0x9B,0x8C,0x9D,0xAE,0x9F, \
+				0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F}
+
+#elif _CODE_PAGE == 1253 /* Greek (Windows) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xA2,0xB8,0xB9,0xBA, \
+				0xE0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xFB,0xBC,0xFD,0xBF,0xFF}
+
+#elif _CODE_PAGE == 1254 /* Turkish (Windows) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x9D,0x9E,0x9F, \
+				0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F}
+
+#elif _CODE_PAGE == 1255 /* Hebrew (Windows) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+				0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 1256 /* Arabic (Windows) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x8C,0x9D,0x9E,0x9F, \
+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0x41,0xE1,0x41,0xE3,0xE4,0xE5,0xE6,0x43,0x45,0x45,0x45,0x45,0xEC,0xED,0x49,0x49,0xF0,0xF1,0xF2,0xF3,0x4F,0xF5,0xF6,0xF7,0xF8,0x55,0xFA,0x55,0x55,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 1257 /* Baltic (Windows) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xBC,0xBD,0xBE,0xAF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF}
+
+#elif _CODE_PAGE == 1258 /* Vietnam (OEM, Windows) */
+#define DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0xAC,0x9D,0x9E,0x9F, \
+				0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xEC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xFE,0x9F}
+
+#elif _CODE_PAGE == 1	/* ASCII (for only non-LFN cfg) */
+#if _USE_LFN
+#error Cannot use LFN feature without valid code page.
+#endif
+#define DF1S	0
+
+#else
+#error Unknown code page
+
+#endif
+
+
+/* Character code support macros */
+#define IsUpper(c)	(((c)>=(BYTE)'A')&&((c)<=(BYTE)'Z'))
+#define IsLower(c)	(((c)>=(BYTE)'a')&&((c)<=(BYTE)'z'))
+#define IsDigit(c)	(((c)>=(BYTE)'0')&&((c)<=(BYTE)'9'))
+
+#if DF1S		/* Code page is DBCS */
+
+#ifdef DF_2S	/* Two 1st byte areas */
+#define IsDBCS1(c)	((((BYTE)(c) >= DF1S) && ((BYTE)(c) <= DF_1E)) || (((BYTE)(c) >= DF_2S) && ((BYTE)(c) <= DF_2E)))
+#else			/* One 1st byte area */
+#define IsDBCS1(c)	(((BYTE)(c) >= DF1S) && ((BYTE)(c) <= DF_1E))
+#endif
+
+#ifdef _DS3S	/* Three 2nd byte areas */
+#define IsDBCS2(c)	((((BYTE)(c) >= DS_1S) && ((BYTE)(c) <= DS_1E)) || (((BYTE)(c) >= DS_2S) && ((BYTE)(c) <= DS_2E)) || (((BYTE)(c) >= _DS3S) && ((BYTE)(c) <= _DS3E)))
+#else			/* Two 2nd byte areas */
+#define IsDBCS2(c)	((((BYTE)(c) >= DS_1S) && ((BYTE)(c) <= DS_1E)) || (((BYTE)(c) >= DS_2S) && ((BYTE)(c) <= DS_2E)))
+#endif
+
+#else			/* Code page is SBCS */
+
+#define IsDBCS1(c)	0
+#define IsDBCS2(c)	0
+
+#endif /* DF1S */
+
+
+/* Name status flags */
+#define NS			11		/* Index of name status byte in fn[] */
+#define NS_LOSS		0x01U	/* Out of 8.3 format */
+#define NS_LFN		0x02U	/* Force to create LFN entry */
+#define NS_LAST		0x04U	/* Last segment */
+#define NS_BODY		0x08U	/* Lower case flag (body) */
+#define NS_EXT		0x10U	/* Lower case flag (ext) */
+#define NS_DOT		0x20U	/* Dot entry */
+
+
+/* FAT sub-type boundaries */
+#define MIN_FAT16	4086U	/* Minimum number of clusters for FAT16 */
+#define	MIN_FAT32	65526U	/* Minimum number of clusters for FAT32 */
+
+
+/* FatFs refers the members in the FAT structures as byte array instead of
+/ structure member because the structure is not binary compatible between
+/ different platforms */
+
+#define BS_jmpBoot			0U		/* Jump instruction (3) */
+#define BS_OEMName			3U		/* OEM name (8) */
+#define BPB_BytsPerSec		11U		/* Sector size [byte] (2) */
+#define BPB_SecPerClus		13U		/* Cluster size [sector] (1) */
+#define BPB_RsvdSecCnt		14U		/* Size of reserved area [sector] (2) */
+#define BPB_NumFATs			16U		/* Number of FAT copies (1) */
+#define BPB_RootEntCnt		17U		/* Number of root directory entries for FAT12/16 (2) */
+#define BPB_TotSec16		19U		/* Volume size [sector] (2) */
+#define BPB_Media			21U		/* Media descriptor (1) */
+#define BPB_FATSz16			22U		/* FAT size [sector] (2) */
+#define BPB_SecPerTrk		24U		/* Track size [sector] (2) */
+#define BPB_NumHeads		26U		/* Number of heads (2) */
+#define BPB_HiddSec			28U		/* Number of special hidden sectors (4) */
+#define BPB_TotSec32		32U		/* Volume size [sector] (4) */
+#define BS_DrvNum			36U		/* Physical drive number (2) */
+#define BS_BootSig			38U		/* Extended boot signature (1) */
+#define BS_VolID			39U		/* Volume serial number (4) */
+#define BS_VolLab			43U		/* Volume label (8) */
+#define BS_FilSysType		54U		/* File system type (1) */
+#define BPB_FATSz32			36U		/* FAT size [sector] (4) */
+#define BPB_ExtFlags		40U		/* Extended flags (2) */
+#define BPB_FSVer			42U		/* File system version (2) */
+#define BPB_RootClus		44U		/* Root directory first cluster (4) */
+#define BPB_FSInfo			48U		/* Offset of FSINFO sector (2) */
+#define BPB_BkBootSec		50U		/* Offset of backup boot sector (2) */
+#define BS_DrvNum32			64U		/* Physical drive number (2) */
+#define BS_BootSig32		66U		/* Extended boot signature (1) */
+#define BS_VolID32			67U		/* Volume serial number (4) */
+#define BS_VolLab32			71U		/* Volume label (8) */
+#define BS_FilSysType32		82U		/* File system type (1) */
+#define	FSI_LeadSig			0U		/* FSI: Leading signature (4) */
+#define	FSI_StrucSig		484U		/* FSI: Structure signature (4) */
+#define	FSI_Free_Count		488U	/* FSI: Number of free clusters (4) */
+#define	FSI_Nxt_Free		492U	/* FSI: Last allocated cluster (4) */
+#define MBR_Table			446U	/* MBR: Partition table offset (2) */
+#define	SZ_PTE				16U		/* MBR: Size of a partition table entry */
+#define BS_55AA				510U		/* Signature word (2) */
+
+#define	DIR_Name			0U		/* Short file name (11) */
+#define	DIR_Attr			11U		/* Attribute (1) */
+#define	DIR_NTres			12U		/* NT flag (1) */
+#define DIR_CrtTimeTenth	13U		/* Created time sub-second (1) */
+#define	DIR_CrtTime			14U		/* Created time (2) */
+#define	DIR_CrtDate			16U		/* Created date (2) */
+#define DIR_LstAccDate		18U		/* Last accessed date (2) */
+#define	DIR_FstClusHI		20U		/* Higher 16-bit of first cluster (2) */
+#define	DIR_WrtTime			22U		/* Modified time (2) */
+#define	DIR_WrtDate			24U		/* Modified date (2) */
+#define	DIR_FstClusLO		26U		/* Lower 16-bit of first cluster (2) */
+#define	DIR_FileSize		28U		/* File size (4) */
+#define	LDIR_Ord			0U		/* LFN entry order and LLE flag (1) */
+#define	LDIR_Attr			11U		/* LFN attribute (1) */
+#define	LDIR_Type			12U		/* LFN type (1) */
+#define	LDIR_Chksum			13U		/* Sum of corresponding SFN entry */
+#define	LDIR_FstClusLO		26U		/* Filled by zero (0) */
+#define	SZ_DIR				32U		/* Size of a directory entry */
+#define	LLE					0x40U	/* Last long entry flag in LDIR_Ord */
+#define	DDE					0xE5U	/* Deleted directory entry mark in DIR_Name[0] */
+#define	NDDE				0x05U	/* Replacement of the character collides with DDE */
+
+
+
+
+/*------------------------------------------------------------*/
+/* Module private work area                                   */
+/*------------------------------------------------------------*/
+/* Note that uninitialized variables with static duration are
+/  guaranteed zero/null as initial value. If not, either the
+/  linker or start-up routine is out of ANSI-C standard.
+*/
+
+#if _VOLUMES >= 1 || _VOLUMES <= 10
+static
+FATFS *FatFs[_VOLUMES];		/* Pointer to the file system objects (logical drives) */
+#else
+#error Number of volumes must be 1 to 10.
+#endif
+
+#if _FS_RPATH && _VOLUMES >= 2
+static
+BYTE CurrVol;				/* Current drive */
+#endif
+
+#if _FS_LOCK
+static
+FILESEM	Files[_FS_LOCK];	/* Open object lock semaphores */
+#endif
+
+#if _USE_LFN == 0			/* No LFN feature */
+#define	DEF_NAMEBUF			BYTE sfn[12]
+#define INIT_BUF(dobj)		(dobj).fn = sfn
+#define	FREE_BUF()
+
+#elif _USE_LFN == 1			/* LFN feature with static working buffer */
+static
+WCHAR LfnBuf[_MAX_LFN+1];
+#define	DEF_NAMEBUF			BYTE sfn[12]
+#define INIT_BUF(dobj)		{ (dobj).fn = sfn; (dobj).lfn = LfnBuf; }
+#define	FREE_BUF()
+
+#elif _USE_LFN == 2 		/* LFN feature with dynamic working buffer on the stack */
+#define	DEF_NAMEBUF			BYTE sfn[12]; WCHAR lbuf[_MAX_LFN+1]
+#define INIT_BUF(dobj)		{ (dobj).fn = sfn; (dobj).lfn = lbuf; }
+#define	FREE_BUF()
+
+#elif _USE_LFN == 3 		/* LFN feature with dynamic working buffer on the heap */
+#define	DEF_NAMEBUF			BYTE sfn[12]; WCHAR *lfn
+#define INIT_BUF(dobj)		{ lfn = ff_memalloc((_MAX_LFN + 1) * 2); \
+							  if (!lfn) LEAVE_FF((dobj).fs, FR_NOT_ENOUGH_CORE); \
+							  (dobj).lfn = lfn;	(dobj).fn = sfn; }
+#define	FREE_BUF()			ff_memfree(lfn)
+
+#else
+#error Wrong LFN configuration.
+#endif
+
+
+#ifdef _EXCVT
+static
+const BYTE ExCvt[] = _EXCVT;	/* Upper conversion table for extended characters */
+#endif
+
+#if _MULTI_PARTITION
+PARTITION VolToPart[] = {
+    {0, 1},     /* Logical drive 0 ==> Physical drive 0, 1st partition */
+    {0, 2},      /* Logical drive 1 ==> Physical drive 0, 2nd partition */
+    {0, 3},     /* Logical drive 2 ==> Physical drive 0, 3rd partition */
+    {0, 4},     /* Logical drive 3 ==> Physical drive 0, 4th partition */
+	{1, 1},     /* Logical drive 4 ==> Physical drive 1, 1st partition */
+    {1, 2},     /* Logical drive 5 ==> Physical drive 1, 2nd partition */
+	{1, 3},     /* Logical drive 6 ==> Physical drive 1, 3rd partition */
+    {1, 4}     /* Logical drive 7 ==> Physical drive 1, 4th partition */
+};
+#endif
+
+
+
+
+/*--------------------------------------------------------------------------
+
+   Module Private Functions
+
+---------------------------------------------------------------------------*/
+
+
+/*-----------------------------------------------------------------------*/
+/* String functions                                                      */
+/*-----------------------------------------------------------------------*/
+
+/* Copy memory to memory */
+static
+void mem_cpy (void* dst, const void* src, UINT cnt) {
+	BYTE *d = (BYTE*)(void *)dst;
+	const BYTE *s = src;
+
+#if _WORD_ACCESS == 1
+	while (cnt >= sizeof (int)) {
+		*(int*)d = *(int*)s;
+		d += sizeof (int); s += sizeof (int);
+		cnt -= sizeof (int);
+	}
+#endif
+	while ((cnt) > 0U){
+		*d=*s;
+		d+=1U;
+		s+=1U;
+		cnt-=1U;
+	}
+}
+
+/* Fill memory */
+static
+void mem_set (void* dst, s32 val, UINT cnt) {
+	BYTE *d = (BYTE*)(void *)dst;
+
+	while ((cnt) > 0U){
+		*d = (BYTE)val;
+		d+=1U;
+		cnt-=1U;
+	}
+}
+
+/* Compare memory to memory */
+static
+s32 mem_cmp (const void* dst, const void* src, UINT cnt) {
+	const BYTE *d = dst, *s = src;
+	s32 r = (s32)0;
+	UINT LocCnt = cnt;
+	while (((LocCnt)  != 0U) && ((r = (s32)(*d - *s)) == 0)) {
+		d+=1U;
+		s+=1U;
+		LocCnt-=1U;
+	}
+	return r;
+}
+
+/* Check if chr is contained in the string */
+static
+s32 chk_chr (const char* str, s32 chr) {
+	char Status;
+	const char *LocStr = str;
+	while (((*LocStr) != (char)0) && ((*LocStr != chr) != 0U)){
+		LocStr+=1;
+	}
+	Status = *LocStr;
+	return (s32)Status;
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Request/Release grant to access the volume                            */
+/*-----------------------------------------------------------------------*/
+#if _FS_REENTRANT
+static
+s32 lock_fs (
+	FATFS* fs		/* File system object */
+)
+{
+	return ff_req_grant(fs->sobj);
+}
+
+
+static
+void unlock_fs (
+	FATFS* fs,		/* File system object */
+	FRESULT res		/* Result code to be returned */
+)
+{
+	if (fs &&
+		res != FR_NOT_ENABLED &&
+		res != FR_INVALID_DRIVE &&
+		res != FR_INVALID_OBJECT &&
+		res != FR_TIMEOUT) {
+		ff_rel_grant(fs->sobj);
+	}
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* File lock control functions                                           */
+/*-----------------------------------------------------------------------*/
+#if _FS_LOCK
+
+static
+FRESULT chk_lock (	/* Check if the file can be accessed */
+	DIR* dp,		/* Directory object pointing the file to be checked */
+	s32 acc			/* Desired access type (0:Read, 1:Write, 2:Delete/Rename) */
+)
+{
+	UINT i, be;
+
+	/* Search file semaphore table */
+	for (i = be = 0; i < _FS_LOCK; i++) {
+		if (Files[i].fs) {	/* Existing entry */
+			if (Files[i].fs == dp->fs &&	 	/* Check if the object matched with an open object */
+				Files[i].clu == dp->sclust &&
+				Files[i].idx == dp->index) break;
+		} else {			/* Blank entry */
+			be = 1;
+		}
+	}
+	if (i == _FS_LOCK)	/* The object is not opened */
+		return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES;	/* Is there a blank entry for new object? */
+
+	/* The object has been opened. Reject any open against writing file and all write mode open */
+	return (acc || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK;
+}
+
+
+static
+s32 enq_lock (void)	/* Check if an entry is available for a new object */
+{
+	UINT i;
+
+	for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
+	return (i == _FS_LOCK) ? 0 : 1;
+}
+
+
+static
+UINT inc_lock (	/* Increment object open counter and returns its index (0:Internal error) */
+	DIR* dp,	/* Directory object pointing the file to register or increment */
+	s32 acc		/* Desired access (0:Read, 1:Write, 2:Delete/Rename) */
+)
+{
+	UINT i;
+
+
+	for (i = 0; i < _FS_LOCK; i++) {	/* Find the object */
+		if (Files[i].fs == dp->fs &&
+			Files[i].clu == dp->sclust &&
+			Files[i].idx == dp->index) break;
+	}
+
+	if (i == _FS_LOCK) {				/* Not opened. Register it as new. */
+		for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
+		if (i == _FS_LOCK) return 0;	/* No free entry to register (int err) */
+		Files[i].fs = dp->fs;
+		Files[i].clu = dp->sclust;
+		Files[i].idx = dp->index;
+		Files[i].ctr = 0;
+	}
+
+	if (acc && Files[i].ctr) return 0;	/* Access violation (int err) */
+
+	Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1;	/* Set semaphore value */
+
+	return i + 1;
+}
+
+
+static
+FRESULT dec_lock (	/* Decrement object open counter */
+	UINT i			/* Semaphore index (1..) */
+)
+{
+	WORD n;
+	FRESULT res;
+
+
+	if (--i < _FS_LOCK) {	/* Shift index number origin from 0 */
+		n = Files[i].ctr;
+		if (n == 0x100) n = 0;		/* If write mode open, delete the entry */
+		if (n) n--;					/* Decrement read mode open count */
+		Files[i].ctr = n;
+		if (!n) Files[i].fs = 0;	/* Delete the entry if open count gets zero */
+		res = FR_OK;
+	} else {
+		res = FR_INT_ERR;			/* Invalid index nunber */
+	}
+	return res;
+}
+
+
+static
+void clear_lock (	/* Clear lock entries of the volume */
+	FATFS *fs
+)
+{
+	UINT i;
+
+	for (i = 0; i < _FS_LOCK; i++) {
+		if (Files[i].fs == fs) Files[i].fs = 0;
+	}
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Move/Flush disk access window in the file system object               */
+/*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+static
+FRESULT sync_window (
+	FATFS* fs		/* File system object */
+)
+{
+	DWORD wsect;
+	UINT nf;
+
+	if (fs->wflag != 0U) {	/* Write back the sector if it is dirty */
+		wsect = fs->winsect;	/* Current sector number */
+		if (disk_write(fs->drv, fs->win, wsect, 1U) != RES_OK) {
+			return FR_DISK_ERR;
+		}
+		fs->wflag = 0U;
+		if ((wsect - fs->fatbase) < fs->fsize) {		/* Is it in the FAT area? */
+			nf = (UINT)fs->n_fats;
+			for (; nf >= 2U; nf--) {	/* Reflect the change to all FAT copies */
+				wsect += fs->fsize;
+				(void)disk_write(fs->drv, fs->win, wsect, 1U);
+			}
+		}
+	}
+	return FR_OK;
+}
+#endif
+
+
+static
+FRESULT move_window (
+	FATFS* fs,		/* File system object */
+	DWORD sector	/* Sector number to make appearance in the fs->win[] */
+)
+{
+	if (sector != fs->winsect) {	/* Changed current window */
+#if !_FS_READONLY
+		if (sync_window(fs) != FR_OK) {
+			return FR_DISK_ERR;
+		}
+#endif
+		if (disk_read(fs->drv, fs->win, sector, 1U) != RES_OK) {
+			return FR_DISK_ERR;
+		}
+			fs->winsect = sector;
+	}
+
+	return FR_OK;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Synchronize file system and strage device                             */
+/*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+static
+FRESULT sync_fs (	/* FR_OK: successful, FR_DISK_ERR: failed */
+	FATFS* fs		/* File system object */
+)
+{
+	FRESULT res;
+
+	BYTE *lp;
+	res = sync_window(fs);
+	if (res == FR_OK) {
+		/* Update FSINFO sector if needed */
+		if (((fs->fs_type == FS_FAT32) != 0U) && ((fs->fsi_flag == 1U) != 0U)) {
+			/* Create FSINFO structure */
+			mem_set(fs->win, 0, SS(fs));
+			lp = fs->win+BS_55AA;
+			ST_WORD(lp, 0xAA55U);
+			lp = fs->win+FSI_LeadSig;
+			ST_DWORD(lp, 0x41615252);
+			lp = fs->win+FSI_StrucSig;
+			ST_DWORD(lp, 0x61417272);
+			lp = fs->win+FSI_Free_Count;
+			ST_DWORD(lp, fs->free_clust);
+			lp = fs->win+FSI_Nxt_Free;
+			ST_DWORD(lp, fs->last_clust);
+			/* Write it into the FSINFO sector */
+			fs->winsect = fs->volbase + 1U;
+			(void)disk_write(fs->drv, fs->win, fs->winsect, 1U);
+			fs->fsi_flag = 0U;
+		}
+		/* Make sure that no pending write process in the physical drive */
+		if (disk_ioctl(fs->drv, CTRL_SYNC, (void*)NULL) != RES_OK) {
+			res = FR_DISK_ERR;
+		}
+	}
+
+	return res;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get sector# from cluster#                                             */
+/*-----------------------------------------------------------------------*/
+
+
+DWORD clust2sect (	/* !=0: Sector number, 0: Failed - invalid cluster# */
+	FATFS* fs,		/* File system object */
+	DWORD clst		/* Cluster# to be converted */
+)
+{
+	DWORD LocalCluster = clst;
+	DWORD res;
+	LocalCluster -= 2U;
+	if (LocalCluster >= (fs->n_fatent - 2)){
+		res = ((DWORD)0U);		/* Invalid cluster# */
+	}
+	else {
+		res = ((LocalCluster * fs->csize) + fs->database);
+	}
+
+	return res;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* FAT access - Read value of a FAT entry                                */
+/*-----------------------------------------------------------------------*/
+
+
+DWORD get_fat (	/* 0xFFFFFFFF:Disk error, 1:Internal error, Else:Cluster status */
+	FATFS* fs,	/* File system object */
+	DWORD clst	/* Cluster# to get the link information */
+)
+{
+	UINT wc, bc, temp;
+	BYTE *p;
+	DWORD Status = 0xFFFFFFFFU;
+
+
+	if (((clst < 2U) != 0U) || ((clst >= fs->n_fatent) != 0U)){	/* Chack range */
+		Status = (DWORD)1;
+	}
+	else{
+	switch (fs->fs_type) {
+	case FS_FAT12 :
+		bc = (UINT)clst; bc += bc / 2;
+		if (move_window(fs, fs->fatbase + ((DWORD)bc / (DWORD)SS(fs))) > 0){
+			break;
+		}
+		wc = (UINT)fs->win[bc % (UINT)SS(fs)]; bc++;
+		if (move_window(fs, fs->fatbase + ((DWORD)bc / (DWORD)SS(fs))) > 0){
+			break;
+		}
+		temp = fs->win[bc % (UINT)SS(fs)] << 4;
+		temp = temp << 4;
+		wc |= temp;
+		Status = (DWORD)(((clst & (DWORD)1) == (DWORD)(1U)) ? (DWORD)((DWORD)wc >> 4) : (DWORD)((DWORD)wc & (DWORD)0xFFFU));
+		break;
+
+	case FS_FAT16 :
+		if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) > 0){
+			break;
+		}
+		p = &fs->win[(clst * 2) % SS(fs)];
+		Status = (DWORD)LD_WORD(p);
+		break;
+
+	case FS_FAT32 :
+		if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) > 0){
+			break;
+		}
+		p = &fs->win[(clst * 4) % SS(fs)];
+		Status = (LD_DWORD(p) & (DWORD)0x0FFFFFFFU);
+		break;
+	default :
+		/* This is added for Misrac Compliance */
+		break;
+	}
+	}
+	return Status;	/* An error occurred at the disk I/O layer */
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* FAT access - Change value of a FAT entry                              */
+/*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+
+FRESULT put_fat (
+	FATFS* fs,	/* File system object */
+	DWORD clst,	/* Cluster# to be changed in range of 2 to fs->n_fatent - 1 */
+	DWORD val	/* New value to mark the cluster */
+)
+{
+	UINT bc;
+	BYTE *p;
+	FRESULT res;
+	DWORD LocVal = val;
+
+	if (((clst < 2U) != 0U) || ((clst >= fs->n_fatent) != 0U)) {	/* Check range */
+		res = FR_INT_ERR;
+
+	} else {
+		switch (fs->fs_type) {
+		case FS_FAT12 :
+			bc = (UINT)clst; bc += bc / 2;
+			res = move_window(fs, fs->fatbase + ((DWORD)bc / (DWORD)SS(fs)));
+			if (res != FR_OK){
+				break;
+			}
+			p = &fs->win[bc % SS(fs)];
+			*p = (((clst & 1U) == 1U) ? ((*p & 0x0FU) | ((BYTE)LocVal << 4)) : (BYTE)LocVal);
+			bc++;
+			fs->wflag = 1U;
+			res = move_window(fs, fs->fatbase + ((DWORD)bc / (DWORD)SS(fs)));
+			if (res != FR_OK){
+				break;
+			}
+			p = &fs->win[bc % SS(fs)];
+			*p = (((clst & 1U) == 1U) ? (BYTE)(LocVal >> 4) : ((*p & 0xF0U) | ((BYTE)(LocVal >> 8) & 0x0FU)));
+			break;
+
+		case FS_FAT16 :
+			res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2)));
+			if (res != FR_OK){
+				break;
+			}
+			p = &fs->win[(clst * 2) % SS(fs)];
+			ST_WORD(p, (WORD)LocVal);
+			break;
+
+		case FS_FAT32 :
+			res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4)));
+			if (res != FR_OK){
+				break;
+			}
+			p = &fs->win[(clst * 4) % SS(fs)];
+			LocVal |= LD_DWORD(p) & 0xF0000000U;
+			ST_DWORD(p, LocVal);
+			break;
+
+		default :
+			res = FR_INT_ERR;
+			break;
+		}
+		fs->wflag = 1U;
+	}
+
+	return res;
+}
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* FAT handling - Remove a cluster chain                                 */
+/*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+static
+FRESULT remove_chain (
+	FATFS* fs,			/* File system object */
+	DWORD clst			/* Cluster# to remove a chain from */
+)
+{
+	FRESULT res;
+	DWORD nxt;
+	DWORD LocClst = clst;
+#if _USE_ERASE
+	DWORD scl = LocClst, ecl = LocClst, rt[2];
+#endif
+
+	if (((LocClst < 2U) != 0U) || ((LocClst >= fs->n_fatent) != 0U)) {	/* Check range */
+		res = FR_INT_ERR;
+
+	} else {
+		res = FR_OK;
+		while (LocClst < fs->n_fatent) {			/* Not a last link? */
+			nxt = get_fat(fs, LocClst);			/* Get cluster status */
+			if (nxt == 0U) {
+				break;				/* Empty cluster? */
+			}
+			if (nxt == 1U) { res = FR_INT_ERR; break; }	/* Internal error? */
+			if (nxt == 0xFFFFFFFFU) { res = FR_DISK_ERR; break; }	/* Disk error? */
+			res = put_fat(fs, LocClst, 0U);			/* Mark the cluster "empty" */
+			if (res != FR_OK) {
+				break;
+			}
+			if (fs->free_clust != 0xFFFFFFFFU) {	/* Update FSInfo */
+				fs->free_clust++;
+				fs->fsi_flag |= 1U;
+			}
+#if _USE_ERASE
+			if (ecl + 1 == nxt) {	/* Is next cluster contiguous? */
+				ecl = nxt;
+			} else {				/* End of contiguous clusters */
+				rt[0] = clust2sect(fs, scl);					/* Start sector */
+				rt[1] = clust2sect(fs, ecl) + fs->csize - 1;	/* End sector */
+				disk_ioctl(fs->drv, CTRL_ERASE_SECTOR, rt);		/* Erase the block */
+				scl = ecl = nxt;
+			}
+#endif
+			LocClst = nxt;	/* Next cluster */
+		}
+	}
+
+	return res;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* FAT handling - Stretch or Create a cluster chain                      */
+/*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+static
+DWORD create_chain (	/* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */
+	FATFS* fs,			/* File system object */
+	DWORD clst			/* Cluster# to stretch. 0 means create a new chain. */
+)
+{
+	DWORD cs, ncl, scl;
+	FRESULT res;
+
+
+	if (clst == 0U) {		/* Create a new chain */
+		scl = fs->last_clust;			/* Get suggested start point */
+		if (((!scl) != 0U) || ((scl >= fs->n_fatent) != 0U)){
+			scl = 1U;
+		}
+	}
+	else {					/* Stretch the current chain */
+		cs = get_fat(fs, clst);			/* Check the cluster status */
+		if (cs < 2U) {
+			return (DWORD)1;			/* Invalid value */
+		}
+		if (cs == (DWORD)0xFFFFFFFFU) {
+			return cs;	/* A disk error occurred */
+		}
+		if (cs < fs->n_fatent) {
+			return cs;	/* It is already followed by next cluster */
+		}
+		scl = clst;
+	}
+
+	ncl = scl;				/* Start cluster */
+	for (;;) {
+		ncl++;							/* Next cluster */
+		if (ncl >= fs->n_fatent) {		/* Wrap around */
+			ncl = 2U;
+			if (ncl > scl) {
+				return 0;	/* No free cluster */
+			}
+		}
+		cs = get_fat(fs, ncl);			/* Get the cluster status */
+		if (cs == 0U) {
+			break;				/* Found a free cluster */
+		}
+		if ((cs == 0xFFFFFFFFU) || (cs == 1U)) {/* An error occurred */
+			return cs;
+		}
+		if (ncl == scl) {
+			return 0;		/* No free cluster */
+		}
+	}
+
+	res = put_fat(fs, ncl, 0x0FFFFFFFU);	/* Mark the new cluster "last link" */
+	if ((res == FR_OK) && (clst != 0U)) {
+		res = put_fat(fs, clst, ncl);	/* Link it to the previous one if needed */
+	}
+	if (res == FR_OK) {
+		fs->last_clust = ncl;			/* Update FSINFO */
+		if (fs->free_clust != 0xFFFFFFFFU) {
+			fs->free_clust--;
+			fs->fsi_flag |= 1U;
+		}
+	} else {
+		ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFFU : 1U;
+	}
+
+	return ncl;		/* Return new cluster number or error code */
+}
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* FAT handling - Convert offset into cluster with link map table        */
+/*-----------------------------------------------------------------------*/
+
+#if _USE_FASTSEEK
+static
+DWORD clmt_clust (	/* <2:Error, >=2:Cluster number */
+	FIL* fp,		/* Pointer to the file object */
+	DWORD ofs		/* File offset to be converted to cluster# */
+)
+{
+	DWORD cl, ncl, *tbl;
+
+
+	tbl = fp->cltbl + 1;	/* Top of CLMT */
+	cl = ofs / SS(fp->fs) / fp->fs->csize;	/* Cluster order from top of the file */
+	for (;;) {
+		ncl = *tbl++;			/* Number of cluters in the fragment */
+		if (ncl == ((DWORD)0U)) {
+			return 0;		/* End of table? (error) */
+		}
+		if (cl < ncl) {
+			break;	/* In this fragment? */
+		}
+		cl -= ncl; tbl++;		/* Next fragment */
+	}
+	return cl + *tbl;	/* Return the cluster number */
+}
+#endif	/* _USE_FASTSEEK */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Directory handling - Set directory index                              */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT dir_sdi (
+	DIR* dp,		/* Pointer to directory object */
+	UINT idx		/* Index of directory table */
+)
+{
+	WORD LocalDirectory = (WORD)idx;
+	DWORD clst, sect;
+	UINT ic;
+
+
+	dp->index = (WORD)LocalDirectory;	/* Current index */
+	clst = dp->sclust;		/* Table start cluster (0:root) */
+	if (((clst == 1U) !=0) || ((clst >= dp->fs->n_fatent) !=0)) {	/* Check start cluster range */
+		return FR_INT_ERR;
+	}
+	if ((clst == ((DWORD)0U)) && ((dp->fs->fs_type == FS_FAT32) != 0U)) {	/* Replace cluster# 0 with root cluster# if in FAT32 */
+		clst = dp->fs->dirbase;
+	}
+
+	if (clst == 0U) {	/* Static table (root-directory in FAT12/16) */
+		if (LocalDirectory >= dp->fs->n_rootdir) {	/* Is index out of range? */
+			return FR_INT_ERR;
+		}
+		sect = dp->fs->dirbase;
+	}
+	else {				/* Dynamic table (root-directory in FAT32 or sub-directory) */
+		ic = (UINT)((UINT)(SS(dp->fs) / SZ_DIR) * (UINT)dp->fs->csize);	/* Entries per cluster */
+		while (LocalDirectory >= ic) {	/* Follow cluster chain */
+			clst = get_fat(dp->fs, clst);				/* Get next cluster */
+			if (clst == 0xFFFFFFFFU) {
+				 return FR_DISK_ERR;	/* Disk error */
+			}
+			if (((clst < 2U) != 0U) || ((clst >= dp->fs->n_fatent) != 0U)) {	/* Reached to end of table or internal error */
+				return FR_INT_ERR;
+			}
+			LocalDirectory -= (WORD)ic;
+		}
+		sect = clust2sect(dp->fs, clst);
+	}
+	dp->clust = clst;	/* Current cluster# */
+	if (sect == ((DWORD)0U)) {return FR_INT_ERR;}
+	dp->sect = sect + ((DWORD)idx / ((DWORD)SS(dp->fs) / (DWORD)SZ_DIR));					/* Sector# of the directory entry */
+	dp->dir = dp->fs->win + ((idx % (SS(dp->fs) / SZ_DIR)) * SZ_DIR);	/* Ptr to the entry in the sector */
+
+	return FR_OK;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Directory handling - Move directory table index next                  */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT dir_next (	/* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:Could not stretch */
+	DIR* dp,		/* Pointer to the directory object */
+	s32 stretch		/* 0: Do not stretch table, 1: Stretch table if needed */
+)
+{
+	DWORD clst;
+	UINT i;
+
+
+	i = ((UINT)dp->index + (UINT)1U);
+	if (((!(i & 0xFFFFU)) != 0U) || ((!dp->sect) != 0U)) {	/* Report EOT when index has reached 65535 */
+		return FR_NO_FILE;
+	}
+
+	if ((!(i % (SS(dp->fs) / SZ_DIR))) != 0U) {	/* Sector changed? */
+		dp->sect++;					/* Next sector */
+
+		if ((!dp->clust) != 0U) {		/* Static table */
+			if (i >= dp->fs->n_rootdir) {	/* Report EOT if it reached end of static table */
+				return FR_NO_FILE;
+			}
+		}
+		else {					/* Dynamic table */
+			if (((i / (SS(dp->fs) / SZ_DIR)) & (dp->fs->csize - 1U)) == 0U) {	/* Cluster changed? */
+				clst = get_fat(dp->fs, dp->clust);				/* Get next cluster */
+				if (clst <= 1U) {
+					return FR_INT_ERR;
+				}
+				if (clst == 0xFFFFFFFFU) {
+					return FR_DISK_ERR;
+				}
+				if (clst >= dp->fs->n_fatent) {					/* If it reached end of dynamic table, */
+#if !_FS_READONLY
+					UINT c;
+					if (stretch == ((s32)0)) {
+						return FR_NO_FILE;			/* If do not stretch, report EOT */
+					}
+					clst = create_chain(dp->fs, dp->clust);		/* Stretch cluster chain */
+					if (clst == 0U) {
+						return FR_DENIED;			/* No free cluster */
+					}
+					if (clst == 1U) {
+						return FR_INT_ERR;
+					}
+					if (clst == 0xFFFFFFFFU) {
+						return FR_DISK_ERR;
+					}
+					/* Clean-up stretched table */
+					if ((sync_window(dp->fs)) != 0U) {
+						return FR_DISK_ERR;/* Flush disk access window */
+					}
+					mem_set(dp->fs->win, 0, SS(dp->fs));		/* Clear window buffer */
+					dp->fs->winsect = clust2sect(dp->fs, clst);	/* Cluster start sector */
+					for (c = 0U; c < dp->fs->csize; c++) {		/* Fill the new cluster with 0 */
+						dp->fs->wflag = 1U;
+						if ((sync_window(dp->fs)) != 0U) {
+							return FR_DISK_ERR;
+						}
+						dp->fs->winsect++;
+					}
+					dp->fs->winsect -= c;						/* Rewind window offset */
+#else
+					if (stretch == ((s32)0U)) {
+						return FR_NO_FILE;			/* If do not stretch, report EOT (this is to suppress warning) */
+					}
+					return FR_NO_FILE;							/* Report EOT */
+#endif
+				}
+				dp->clust = clst;				/* Initialize data for new cluster */
+				dp->sect = clust2sect(dp->fs, clst);
+			}
+		}
+	}
+
+	dp->index = (WORD)i;	/* Current index */
+	dp->dir = dp->fs->win + ((i % (SS(dp->fs) / SZ_DIR)) * SZ_DIR);	/* Current entry in the window */
+
+	return FR_OK;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Directory handling - Reserve directory entry                          */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+FRESULT dir_alloc (
+	DIR* dp,	/* Pointer to the directory object */
+	UINT nent	/* Number of contiguous entries to allocate (1-21) */
+)
+{
+	FRESULT res;
+	UINT n;
+
+
+	res = dir_sdi(dp, 0U);
+	if (res == FR_OK) {
+		n = 0U;
+		do {
+			res = move_window(dp->fs, dp->sect);
+			if (res != FR_OK) {
+				break;
+			}
+			if ((dp->dir[0] == DDE) || (dp->dir[0] == 0U)) {	/* Is it a blank entry? */
+				n += (UINT)1;
+				if (n == nent) {
+					break;	/* A block of contiguous entries is found */
+				}
+			} else {
+				n = 0U;					/* Not a blank entry. Restart to search */
+			}
+			res = dir_next(dp, 1);		/* Next entry with table stretch enabled */
+		} while (res == FR_OK);
+	}
+	if (res == FR_NO_FILE) {
+		res = FR_DENIED;	/* No directory entry to allocate */
+	}
+	return res;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Directory handling - Load/Store start cluster number                  */
+/*-----------------------------------------------------------------------*/
+
+static
+DWORD ld_clust (
+	FATFS* fs,	/* Pointer to the fs object */
+	BYTE* dir	/* Pointer to the directory entry */
+)
+{
+	DWORD cl;
+
+	cl = (DWORD)LD_WORD(dir+DIR_FstClusLO);
+	if (fs->fs_type == FS_FAT32) {
+		cl |= (DWORD)(LD_WORD(dir+DIR_FstClusHI)) << 16;
+	}
+
+	return cl;
+}
+
+
+#if !_FS_READONLY
+static
+void st_clust (
+	BYTE* dir,	/* Pointer to the directory entry */
+	DWORD cl	/* Value to be set */
+)
+{
+	ST_WORD(dir+DIR_FstClusLO, cl);
+	ST_WORD(dir+DIR_FstClusHI, cl >> 16);
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* LFN handling - Test/Pick/Fit an LFN segment from/to directory entry   */
+/*-----------------------------------------------------------------------*/
+#if _USE_LFN
+static
+const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30};	/* Offset of LFN characters in the directory entry */
+
+
+static
+s32 cmp_lfn (			/* 1:Matched, 0:Not matched */
+	WCHAR* lfnbuf,		/* Pointer to the LFN to be compared */
+	BYTE* dir			/* Pointer to the directory entry containing a part of LFN */
+)
+{
+	UINT i, s;
+	WCHAR wc, uc;
+
+
+	i = ((dir[LDIR_Ord] & ~LLE) - 1) * 13;	/* Get offset in the LFN buffer */
+	s = 0; wc = 1;
+	do {
+		uc = LD_WORD(dir+LfnOfs[s]);	/* Pick an LFN character from the entry */
+		if (wc) {	/* Last character has not been processed */
+			wc = ff_wtoupper(uc);		/* Convert it to upper case */
+			if (i >= _MAX_LFN || wc != ff_wtoupper(lfnbuf[i++]))	/* Compare it */
+				return 0;				/* Not matched */
+		} else {
+			if (uc != 0xFFFF) {
+				return 0;	/* Check filler */
+			}
+		}
+	} while (++s < 13);				/* Repeat until all characters in the entry are checked */
+
+	if ((dir[LDIR_Ord] & LLE) && wc && lfnbuf[i]) {	/* Last segment matched but different length */
+		return 0;
+	}
+
+	return 1;						/* The part of LFN matched */
+}
+
+
+
+static
+s32 pick_lfn (			/* 1:Succeeded, 0:Buffer overflow */
+	WCHAR* lfnbuf,		/* Pointer to the Unicode-LFN buffer */
+	BYTE* dir			/* Pointer to the directory entry */
+)
+{
+	UINT i, s;
+	WCHAR wc, uc;
+
+
+	i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13;	/* Offset in the LFN buffer */
+
+	s = 0; wc = 1;
+	do {
+		uc = LD_WORD(dir+LfnOfs[s]);		/* Pick an LFN character from the entry */
+		if (wc) {	/* Last character has not been processed */
+			if (i >= _MAX_LFN) {
+				return 0;	/* Buffer overflow? */
+			}
+			lfnbuf[i++] = wc = uc;			/* Store it */
+		} else {
+			if (uc != 0xFFFF) {
+				return 0;		/* Check filler */
+			}
+		}
+	} while (++s < 13);						/* Read all character in the entry */
+
+	if (dir[LDIR_Ord] & LLE) {				/* Put terminator if it is the last LFN part */
+		if (i >= _MAX_LFN) {
+			return 0;		/* Buffer overflow? */
+		}
+		lfnbuf[i] = 0;
+	}
+
+	return 1;
+}
+
+
+#if !_FS_READONLY
+static
+void fit_lfn (
+	const WCHAR* lfnbuf,	/* Pointer to the LFN buffer */
+	BYTE* dir,				/* Pointer to the directory entry */
+	BYTE ord,				/* LFN order (1-20) */
+	BYTE sum				/* SFN sum */
+)
+{
+	UINT i, s;
+	WCHAR wc;
+
+
+	dir[LDIR_Chksum] = sum;			/* Set check sum */
+	dir[LDIR_Attr] = AM_LFN;		/* Set attribute. LFN entry */
+	dir[LDIR_Type] = 0;
+	ST_WORD(dir+LDIR_FstClusLO, 0);
+
+	i = (ord - 1) * 13;				/* Get offset in the LFN buffer */
+	s = wc = 0;
+	do {
+		if (wc != 0xFFFF) {
+			wc = lfnbuf[i++];	/* Get an effective character */
+		}
+		ST_WORD(dir+LfnOfs[s], wc);	/* Put it */
+		if (!wc) {
+			wc = 0xFFFF;		/* Padding characters following last character */
+		}
+	} while (++s < 13);
+	if (wc == 0xFFFF || !lfnbuf[i]) {
+		ord |= LLE;	/* Bottom LFN part is the start of LFN sequence */
+	}
+	dir[LDIR_Ord] = ord;			/* Set the LFN order */
+}
+
+#endif
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Create numbered name                                                  */
+/*-----------------------------------------------------------------------*/
+#if _USE_LFN
+static
+void gen_numname (
+	BYTE* dst,			/* Pointer to the buffer to store numbered SFN */
+	const BYTE* src,	/* Pointer to SFN */
+	const WCHAR* lfn,	/* Pointer to LFN */
+	UINT seq			/* Sequence number */
+)
+{
+	BYTE ns[8], c;
+	UINT i, j;
+
+
+	mem_cpy(dst, src, 11);
+
+	if (seq > 5) {	/* On many collisions, generate a hash number instead of sequential number */
+		WCHAR wc;
+		DWORD sr = seq;
+
+		while (*lfn) {	/* Create a CRC */
+			wc = *lfn++;
+			for (i = 0; i < 16; i++) {
+				sr = (sr << 1) + (wc & 1);
+				wc >>= 1;
+				if (sr & 0x10000) {
+					sr ^= 0x11021;
+				}
+			}
+		}
+		seq = (UINT)sr;
+	}
+
+	/* itoa (hexdecimal) */
+	i = 7;
+	do {
+		c = (seq % 16) + '0';
+		if (c > '9') {
+			c += 7;
+		}
+		ns[i--] = c;
+		seq /= 16;
+	} while (seq);
+	ns[i] = '~';
+
+	/* Append the number */
+	for (j = 0; j < i && dst[j] != ' '; j++) {
+		if (IsDBCS1(dst[j])) {
+			if (j == i - 1) {
+				break;
+			}
+			j++;
+		}
+	}
+	do {
+		dst[j++] = (i < 8) ? ns[i++] : ' ';
+	} while (j < 8);
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Calculate sum of an SFN                                               */
+/*-----------------------------------------------------------------------*/
+#if _USE_LFN
+static
+BYTE sum_sfn (
+	const BYTE* dir		/* Pointer to the SFN entry */
+)
+{
+	BYTE sum = 0;
+	UINT n = 11;
+
+	do sum = (sum >> 1) + (sum << 7) + *dir++; while (--n);
+	return sum;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Directory handling - Find an object in the directory                  */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT dir_find (
+	DIR* dp			/* Pointer to the directory object linked to the file name */
+)
+{
+	FRESULT res;
+	BYTE c, *directory;
+#if _USE_LFN
+	BYTE a, ord, sum;
+#endif
+
+	res = dir_sdi(dp, 0U);			/* Rewind directory object */
+	if (res == FR_OK) {
+
+#if _USE_LFN
+	ord = sum = 0xFF; dp->lfn_idx = 0xFFFF;	/* Reset LFN sequence */
+#endif
+	do {
+		res = move_window(dp->fs, dp->sect);
+		if (res != FR_OK) {
+			break;
+		}
+		directory = dp->dir;					/* Ptr to the directory entry of current index */
+		c = *(directory+DIR_Name);
+		if (c == 0U) { res = FR_NO_FILE; break; }	/* Reached to end of table */
+#if _USE_LFN	/* LFN configuration */
+		a = directory[DIR_Attr] & AM_MASK;
+		if (c == DDE || ((a & AM_VOL) && a != AM_LFN)) {	/* An entry without valid data */
+			ord = 0xFF; dp->lfn_idx = 0xFFFF;	/* Reset LFN sequence */
+		} else {
+			if (a == AM_LFN) {			/* An LFN entry is found */
+				if (dp->lfn) {
+					if (c & LLE) {		/* Is it start of LFN sequence? */
+						sum = directory[LDIR_Chksum];
+						c &= ~LLE; ord = c;	/* LFN start order */
+						dp->lfn_idx = dp->index;	/* Start index of LFN */
+					}
+					/* Check validity of the LFN entry and compare it with given name */
+					ord = (c == ord && sum == directory[LDIR_Chksum] && cmp_lfn(dp->lfn, directory)) ? ord - 1 : 0xFF;
+				}
+			} else {					/* An SFN entry is found */
+				if (!ord && sum == sum_sfn(directory)) {
+					break;	/* LFN matched? */
+				}
+				if (!(dp->fn[NS] & NS_LOSS) && !mem_cmp(directory, dp->fn, 11)) {
+					break;	/* SFN matched? */
+				}
+				ord = 0xFF; dp->lfn_idx = 0xFFFF;	/* Reset LFN sequence */
+			}
+		}
+#else		/* Non LFN configuration */
+		if (((!mem_cmp(directory, dp->fn, 11U)) != 0)&&((!(*(directory+DIR_Attr) & AM_VOL)) != 0U)) { /* Is it a valid entry? */
+			break;
+		}
+#endif
+		res = dir_next(dp, 0);		/* Next entry */
+	} while (res == FR_OK);
+	}
+
+	return res;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Read an object from the directory                                     */
+/*-----------------------------------------------------------------------*/
+#if _FS_MINIMIZE <= 1 || _USE_LABEL || _FS_RPATH >= 2
+static
+FRESULT dir_read (
+	DIR* dp,		/* Pointer to the directory object */
+	s32 vol			/* Filtered by 0:file/directory or 1:volume label */
+)
+{
+	FRESULT res;
+	BYTE a, c, *directory;
+#if _USE_LFN
+	BYTE ord = 0xFF, sum = 0xFF;
+#endif
+
+	res = FR_NO_FILE;
+	while ((dp->sect) != 0U) {
+		res = move_window(dp->fs, dp->sect);
+		if (res != FR_OK) {
+			break;
+		}
+		directory = dp->dir;					/* Ptr to the directory entry of current index */
+		c = *(directory+DIR_Name);
+		if (c == 0U) { res = FR_NO_FILE; break; }	/* Reached to end of table */
+		a = (*(directory+DIR_Attr)) & AM_MASK;
+#if _USE_LFN	/* LFN configuration */
+		if (c == DDE || (!_FS_RPATH && c == '.') || (s32)(a == AM_VOL) != vol) {	/* An entry without valid data */
+			ord = 0xFFU;
+		} else {
+			if (a == AM_LFN) {			/* An LFN entry is found */
+				if (c & LLE) {			/* Is it start of LFN sequence? */
+					sum = directory[LDIR_Chksum];
+					c &= ~LLE; ord = c;
+					dp->lfn_idx = dp->index;
+				}
+				/* Check LFN validity and capture it */
+				ord = (c == ord && sum == directory[LDIR_Chksum] && pick_lfn(dp->lfn, directory)) ? ord - 1 : 0xFF;
+			} else {					/* An SFN entry is found */
+				if (ord || sum != sum_sfn(directory)) {	/* Is there a valid LFN? */
+					dp->lfn_idx = 0xFFFFU;		/* It has no LFN. */
+				}
+				break;
+			}
+		}
+#else		/* Non LFN configuration */
+		if (((c != DDE) != 0U) && ((_FS_RPATH || (c != (BYTE)'.')) != 0) && (a != AM_LFN) && (((a == AM_VOL) == vol)!= 0U)) {	/* Is it a valid entry? */
+			break;
+		}
+#endif
+		res = dir_next(dp, 0);				/* Next entry */
+		if (res != FR_OK) {
+			break;
+		}
+	}
+
+	if (res != FR_OK) {
+		dp->sect = 0U;
+	}
+
+	return res;
+}
+#endif	/* _FS_MINIMIZE <= 1 || _USE_LABEL || _FS_RPATH >= 2 */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Register an object to the directory                                   */
+/*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+static
+FRESULT dir_register (	/* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */
+	DIR* dp				/* Target directory with object name to be created */
+)
+{
+	FRESULT res;
+#if _USE_LFN	/* LFN configuration */
+	UINT n, nent;
+	BYTE sn[12], *fn, sum;
+	WCHAR *lfn;
+
+
+	fn = dp->fn; lfn = dp->lfn;
+	mem_cpy(sn, fn, 12);
+
+	if (_FS_RPATH && (sn[NS] & NS_DOT)) {		/* Cannot create dot entry */
+		return FR_INVALID_NAME;
+	}
+
+	if (sn[NS] & NS_LOSS) {			/* When LFN is out of 8.3 format, generate a numbered name */
+		fn[NS] = 0; dp->lfn = 0;			/* Find only SFN */
+		for (n = 1; n < 100; n++) {
+			gen_numname(fn, sn, lfn, n);	/* Generate a numbered name */
+			res = dir_find(dp);				/* Check if the name collides with existing SFN */
+			if (res != FR_OK) {
+				break;
+			}
+		}
+		if (n == 100) {
+			return FR_DENIED;		/* Abort if too many collisions */
+		}
+		if (res != FR_NO_FILE) {
+			return res;	/* Abort if the result is other than 'not collided' */
+		}
+		fn[NS] = sn[NS]; dp->lfn = lfn;
+	}
+
+	if (sn[NS] & NS_LFN) {			/* When LFN is to be created, allocate entries for an SFN + LFNs. */
+		for (n = 0; lfn[n]; n++) ;
+		nent = (n + 25) / 13;
+	} else {						/* Otherwise allocate an entry for an SFN  */
+		nent = 1;
+	}
+	res = dir_alloc(dp, nent);		/* Allocate entries */
+
+	if (res == FR_OK && --nent) {	/* Set LFN entry if needed */
+		res = dir_sdi(dp, dp->index - nent);
+		if (res == FR_OK) {
+			sum = sum_sfn(dp->fn);	/* Sum value of the SFN tied to the LFN */
+			do {					/* Store LFN entries in bottom first */
+				res = move_window(dp->fs, dp->sect);
+				if (res != FR_OK) {
+					break;
+				}
+				fit_lfn(dp->lfn, dp->dir, (BYTE)nent, sum);
+				dp->fs->wflag = 1;
+				res = dir_next(dp, 0);	/* Next entry */
+			} while (res == FR_OK && --nent);
+		}
+	}
+#else	/* Non LFN configuration */
+	res = dir_alloc(dp, 1U);		/* Allocate an entry for SFN */
+#endif
+
+	if (res == FR_OK) {				/* Set SFN entry */
+		res = move_window(dp->fs, dp->sect);
+		if (res == FR_OK) {
+			mem_set(dp->dir, 0, SZ_DIR);	/* Clean the entry */
+			mem_cpy(dp->dir, dp->fn, 11U);	/* Put SFN */
+#if _USE_LFN
+			dp->dir[DIR_NTres] = *(dp->fn+NS) & (NS_BODY | NS_EXT);	/* Put NT flag */
+#endif
+			dp->fs->wflag = 1U;
+		}
+	}
+
+	return res;
+}
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Remove an object from the directory                                   */
+/*-----------------------------------------------------------------------*/
+#if !_FS_READONLY && !_FS_MINIMIZE
+static
+FRESULT dir_remove (	/* FR_OK: Successful, FR_DISK_ERR: A disk error */
+	DIR* dp				/* Directory object pointing the entry to be removed */
+)
+{
+	FRESULT res;
+	WORD temp;
+#if _USE_LFN	/* LFN configuration */
+	UINT i;
+	i = dp->index;	/* SFN index */
+	res = dir_sdi(dp, (WORD)((dp->lfn_idx == 0xFFFF) ? i : dp->lfn_idx));	/* Goto the SFN or top of the LFN entries */
+	if (res == FR_OK) {
+		do {
+			res = move_window(dp->fs, dp->sect);
+			if (res != FR_OK) {
+				break;
+			}
+			mem_set(dp->dir, 0, SZ_DIR);	/* Clear and mark the entry "deleted" */
+			*dp->dir = DDE;
+			dp->fs->wflag = 1;
+			if (dp->index >= i) {
+				break;	/* When reached SFN, all entries of the object has been deleted. */
+			}
+			res = dir_next(dp, 0);		/* Next entry */
+		} while (res == FR_OK);
+		if (res == FR_NO_FILE) {
+			res = FR_INT_ERR;
+		}
+	}
+
+#else			/* Non LFN configuration */
+	temp = dp->index;
+	res = dir_sdi(dp, temp);
+	if (res == FR_OK) {
+		res = move_window(dp->fs, dp->sect);
+		if (res == FR_OK) {
+			mem_set(dp->dir, 0, SZ_DIR);	/* Clear and mark the entry "deleted" */
+			*dp->dir = DDE;
+			dp->fs->wflag = 1U;
+		}
+	}
+#endif
+
+	return res;
+}
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get file information from directory entry                             */
+/*-----------------------------------------------------------------------*/
+#if _FS_MINIMIZE <= 1 || _FS_RPATH >= 2
+static
+void get_fileinfo (		/* No return code */
+	DIR* dp,			/* Pointer to the directory object */
+	FILINFO* fno	 	/* Pointer to the file information to be filled */
+)
+{
+	UINT i;
+	TCHAR *p, c;
+
+
+	p = fno->fname;
+	if (dp->sect!=((DWORD)0U)) {		/* Get SFN */
+		BYTE *dir = dp->dir;
+
+		i = 0U;
+		while (i < 11U) {		/* Copy name body and extension */
+			c = (TCHAR)(*(dir+i));
+			i += (UINT)1;
+			if (c == ' ') {
+				continue;			/* Skip padding spaces */
+			}
+			if (c == (BYTE)NDDE) {
+				c = (TCHAR)DDE;	/* Restore replaced DDE character */
+			}
+			if (i == (UINT)9) {
+				*p = '.';			/* Insert a . if extension is exist */
+				p += 1U;
+			}
+#if _USE_LFN
+			if (IsUpper(c) && (dir[DIR_NTres] & (i >= 9U ? NS_EXT : NS_BODY))) {
+				c += 0x20;			/* To lower */
+			}
+#if _LFN_UNICODE
+			if (IsDBCS1(c) && i != 8 && i != 11 && IsDBCS2(dir[i])) {
+				c = c << 8 | dir[i++];
+			}
+			c = ff_convert(c, 1);	/* OEM -> Unicode */
+			if (c == ((TCHAR)0U)) {
+				c = '?';
+			}
+#endif
+#endif
+			*p = c;
+			p += 1U;
+		}
+		fno->fattrib = (*(dir+DIR_Attr));				/* Attribute */
+		fno->fsize = LD_DWORD(dir+DIR_FileSize);	/* Size */
+		fno->fdate = LD_WORD(dir+DIR_WrtDate);		/* Date */
+		fno->ftime = LD_WORD(dir+DIR_WrtTime);		/* Time */
+	}
+	*p = 0;		/* Terminate SFN string by a \0 */
+
+#if _USE_LFN
+	if (fno->lfname) {
+		WCHAR w, *lfn;
+
+		i = 0; p = fno->lfname;
+		if (dp->sect && fno->lfsize && dp->lfn_idx != 0xFFFF) {	/* Get LFN if available */
+			lfn = dp->lfn;
+			while ((w = *lfn++) != 0) {		/* Get an LFN character */
+#if !_LFN_UNICODE
+				w = ff_convert(w, 0);		/* Unicode -> OEM */
+				if (!w) { i = 0; break; }	/* No LFN if it could not be converted */
+				if (DF1S && w >= 0x100) {	/* Put 1st byte if it is a DBC (always false on SBCS cfg) */
+					p[i++] = (TCHAR)(w >> 8);
+				}
+#endif
+				if (i >= fno->lfsize - 1) { i = 0; break; }	/* No LFN if buffer overflow */
+				p[i++] = (TCHAR)w;
+			}
+		}
+		p[i] = 0;	/* Terminate LFN string by a \0 */
+	}
+#endif
+}
+#endif /* _FS_MINIMIZE <= 1 || _FS_RPATH >= 2*/
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Pick a segment and create the object name in directory form           */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT create_name (
+	DIR* dp,			/* Pointer to the directory object */
+	const TCHAR** path	/* Pointer to pointer to the segment in the path string */
+)
+{
+#if _USE_LFN	/* LFN configuration */
+	BYTE b, cf;
+	WCHAR w, *lfn;
+	UINT i, ni, si, di;
+	const BYTE *p;
+
+	/* Create LFN in Unicode */
+	for (p = *path; *p == '/' || *p == '\\'; p++) ;	/* Strip duplicated separator */
+	lfn = dp->lfn;
+	si = di = 0;
+	for (;;) {
+		w = p[si++];					/* Get a character */
+		if (w < ' ' || w == '/' || w == '\\') {
+			break;	/* Break on end of segment */
+		}
+		if (di >= _MAX_LFN)	{			/* Reject too long name */
+			return FR_INVALID_NAME;
+		}
+#if !_LFN_UNICODE
+		w &= 0xFF;
+		if (IsDBCS1(w)) {				/* Check if it is a DBC 1st byte (always false on SBCS cfg) */
+			b = (BYTE)p[si++];			/* Get 2nd byte */
+			if (!IsDBCS2(b)) {
+				return FR_INVALID_NAME;	/* Reject invalid sequence */
+			}
+			w = (w << 8) + b;			/* Create a DBC */
+		}
+		w = ff_convert(w, 1);			/* Convert ANSI/OEM to Unicode */
+		if (!w) {
+			return FR_INVALID_NAME;	/* Reject invalid code */
+		}
+#endif
+		if (w < 0x80 && chk_chr("\"*:<>\?|\x7F", w)) {/* Reject illegal characters for LFN */
+			return FR_INVALID_NAME;
+		}
+		lfn[di++] = w;					/* Store the Unicode character */
+	}
+	*path = &p[si];						/* Return pointer to the next segment */
+	cf = (w < ' ') ? NS_LAST : 0;		/* Set last segment flag if end of path */
+#if _FS_RPATH
+	if ((di == 1 && lfn[di-1] == '.') || /* Is this a dot entry? */
+		(di == 2 && lfn[di-1] == '.' && lfn[di-2] == '.')) {
+		lfn[di] = 0;
+		for (i = 0; i < 11; i++)
+			dp->fn[i] = (i < di) ? '.' : ' ';
+		dp->fn[i] = cf | NS_DOT;		/* This is a dot entry */
+		return FR_OK;
+	}
+#endif
+	while (di) {						/* Strip trailing spaces and dots */
+		w = lfn[di-1];
+		if (w != ' ' && w != '.') {
+			break;
+		}
+		di--;
+	}
+	if (!di) {
+		return FR_INVALID_NAME;	/* Reject nul string */
+	}
+
+	lfn[di] = 0;						/* LFN is created */
+
+	/* Create SFN in directory form */
+	mem_set(dp->fn, ' ', 11);
+	for (si = 0; lfn[si] == ' ' || lfn[si] == '.'; si++) ;	/* Strip leading spaces and dots */
+	if (si) {
+		cf |= NS_LOSS | NS_LFN;
+	}
+	while (di && lfn[di - 1] != '.') {
+		di--;	/* Find extension (di<=si: no extension) */
+	}
+
+	b = i = 0; ni = 8;
+	for (;;) {
+		w = lfn[si++];					/* Get an LFN character */
+		if ((!w) != 0U) {
+			break;					/* Break on end of the LFN */
+		}
+		if (w == ' ' || (w == '.' && si != di)) {	/* Remove spaces and dots */
+			cf |= NS_LOSS | NS_LFN; continue;
+		}
+
+		if (i >= ni || si == di) {		/* Extension or end of SFN */
+			if (ni == 11) {				/* Long extension */
+				cf |= NS_LOSS | NS_LFN; break;
+			}
+			if (si != di) {
+				cf |= NS_LOSS | NS_LFN;	/* Out of 8.3 format */
+			}
+			if (si > di) {
+				break;			/* No extension */
+			}
+			si = di; i = 8; ni = 11;	/* Enter extension section */
+			b <<= 2; continue;
+		}
+
+		if (w >= 0x80) {				/* Non ASCII character */
+#ifdef _EXCVT
+			w = ff_convert(w, 0);		/* Unicode -> OEM code */
+			if (w) {
+				w = ExCvt[w - 0x80];	/* Convert extended character to upper (SBCS) */
+			}
+#else
+			w = ff_convert(ff_wtoupper(w), 0);	/* Upper converted Unicode -> OEM code */
+#endif
+			cf |= NS_LFN;				/* Force create LFN entry */
+		}
+
+		if (DF1S && w >= 0x100) {		/* Double byte character (always false on SBCS cfg) */
+			if (i >= ni - 1) {
+				cf |= NS_LOSS | NS_LFN; i = ni; continue;
+			}
+			dp->fn[i++] = (BYTE)(w >> 8);
+		} else {						/* Single byte character */
+			if (!w || chk_chr("+,;=[]", w)) {	/* Replace illegal characters for SFN */
+				w = '_'; cf |= NS_LOSS | NS_LFN;/* Lossy conversion */
+			} else {
+				if (IsUpper(w)) {		/* ASCII large capital */
+					b |= 2;
+				} else {
+					if (IsLower(w)) {	/* ASCII small capital */
+						b |= 1; w -= 0x20;
+					}
+				}
+			}
+		}
+		dp->fn[i++] = (BYTE)w;
+	}
+
+	if (dp->fn[0] == DDE) {
+		dp->fn[0] = NDDE;	/* If the first character collides with deleted mark, replace it with 0x05 */
+	}
+
+	if (ni == 8) {
+		b <<= 2;
+	}
+	if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03) {	/* Create LFN entry when there are composite capitals */
+		cf |= NS_LFN;
+	}
+	if (!(cf & NS_LFN)) {						/* When LFN is in 8.3 format without extended character, NT flags are created */
+		if ((b & 0x03) == 0x01) {
+			cf |= NS_EXT;	/* NT flag (Extension has only small capital) */
+		}
+		if ((b & 0x0C) == 0x04) {
+			cf |= NS_BODY;	/* NT flag (Filename has only small capital) */
+		}
+	}
+
+	dp->fn[NS] = cf;	/* SFN is created */
+
+	return FR_OK;
+
+
+#else	/* Non-LFN configuration */
+	BYTE b, c, d, *sfn;
+	UINT ni, si, i;
+	const BYTE *p;
+	p = ((const BYTE *)(*path));
+	/* Create file name in directory form */
+	for (; (*p == (BYTE)'/') || (*p == (BYTE)'\\'); ) {p++;}/* Strip duplicated separator */
+	sfn = dp->fn;
+	mem_set(sfn, (s32)' ', 11U);
+	si =  0U;
+	i =  0U;
+	b = 0U; ni = 8U;
+#if _FS_RPATH
+	if (p[si] == '.') { /* Is this a dot entry? */
+		for (;;) {
+			c = (BYTE)p[si++];
+			if (c != '.' || si >= 3) {
+				break;
+			}
+			sfn[i++] = c;
+		}
+		if (c != '/' && c != '\\' && c > ' ') {
+			return FR_INVALID_NAME;
+		}
+		*path = &p[si];									/* Return pointer to the next segment */
+		sfn[NS] = (c <= ' ') ? NS_LAST | NS_DOT : NS_DOT;	/* Set last segment flag if end of path */
+		return FR_OK;
+	}
+#endif
+	for (;;) {
+		c = ((BYTE)(*(p+si)));
+		si+=1U;
+		if (((c <= (BYTE)' ') != 0) || ((c == (BYTE)'/') != 0) || ((c == (BYTE)'\\') != 0)) {
+			break;	/* Break on end of segment */
+		}
+		if ((c == (BYTE)'.') || (i >= ni)) {
+			if ((ni != 8U) || (c != (BYTE)'.')) {
+				return FR_INVALID_NAME;
+			}
+			i = 8U; ni = 11U;
+			b <<= 2U; continue;
+		}
+		if (c >= 0x80U) {				/* Extended character? */
+			b |= 3U;						/* Eliminate NT flag */
+#ifdef _EXCVT
+			c = ExCvt[c - 0x80U];		/* To upper extended characters (SBCS cfg) */
+#else
+#if !DF1S
+			return FR_INVALID_NAME;		/* Reject extended characters (ASCII cfg) */
+#endif
+#endif
+		}
+		if (IsDBCS1(c)) {				/* Check if it is a DBC 1st byte (always false on SBCS cfg) */
+			d = ((BYTE)(*(p+si)));			/* Get 2nd byte */
+			si+=1U;
+			if ((!IsDBCS2(d)) || (i >= (ni - 1))) {	/* Reject invalid DBC */
+				return FR_INVALID_NAME;
+			}
+			*(sfn+i) = c;
+			i+=1U;
+			*(sfn+i) = d;
+			i+=1U;
+		} else {						/* Single byte code */
+			if ((chk_chr("\"*+,:;<=>\?[]|\x7F", c)) != 0) {	/* Reject illegal chrs for SFN */
+				return FR_INVALID_NAME;
+			}
+			if (IsUpper(c)) {			/* ASCII large capital? */
+				b |= 2U;
+			} else {
+				if (IsLower(c)) {		/* ASCII small capital? */
+					b |= 1U; c -= 0x20U;
+				}
+			}
+			*(sfn+i) = c;
+			i+=1U;
+		}
+	}
+	*path = ((const TCHAR *)(p+si));						/* Return pointer to the next segment */
+	c = (c <= (BYTE)' ') ? NS_LAST : 0;		/* Set last segment flag if end of path */
+
+	if (i == (UINT)0U){
+		return FR_INVALID_NAME;		/* Reject nul string */
+	}
+	if ((*(sfn+0)) == DDE){
+		*(sfn+0) = NDDE;	/* When first char collides with 0xE5, replace it with 0x05 */
+	}
+	if (ni == 8U){
+		b <<= 2U;
+	}
+	if ((b & 0x03U) == 0x01U){
+		c |= NS_EXT;	/* NT flag (Name extension has only small capital) */
+	}
+	if ((b & 0x0CU) == 0x04U){
+		c |= NS_BODY;	/* NT flag (Name body has only small capital) */
+	}
+
+	*(sfn+NS) = c;		/* Store NT flag, File name is created */
+
+	return FR_OK;
+#endif
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Follow a file path                                                    */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT follow_path (	/* FR_OK(0): successful, !=0: error code */
+	DIR* dp,			/* Directory object to return last directory and found object */
+	const TCHAR* path	/* Full-path string to find a file or directory */
+)
+{
+	FRESULT res;
+	BYTE *directory, NameStatus;
+	TCHAR Status = *path;
+	const TCHAR *LocPath = path;
+
+#if _FS_RPATH
+	if (*LocPath == '/' || *LocPath == '\\') { /* There is a heading separator */
+		LocPath++;	dp->sclust = 0;		/* Strip it and start from the root dir */
+	} else {							/* No heading separator */
+		dp->sclust = dp->fs->cdir;	/* Start from the current dir */
+	}
+#else
+	if ((*LocPath == '/') || (*LocPath == '\\')) {	/* Strip heading separator if exist */
+		LocPath++;
+	}
+	dp->sclust = 0U;						/* Start from the root dir */
+#endif
+	Status = *LocPath;
+	if ((UINT)Status < (UINT)' ') {				/* Null path name is the origin directory itself */
+		res = dir_sdi(dp, 0U);
+		dp->dir = 0U;
+	} else {								/* Follow path */
+		for (;;) {
+			res = create_name(dp, &LocPath);	/* Get a segment name of the path */
+			if (res != FR_OK) {
+				break;
+			}
+			res = dir_find(dp);				/* Find an object with the sagment name */
+			NameStatus = *(dp->fn+NS);
+			if (res != FR_OK) {				/* Failed to find the object */
+				if (res == FR_NO_FILE) {	/* Object is not found */
+					if (_FS_RPATH && ((NameStatus & NS_DOT) != 0U)) {	/* If dot entry is not exist, */
+						dp->sclust = 0U; dp->dir = 0U;	/* it is the root directory and stay there */
+						if ((!(NameStatus & NS_LAST))!= 0U) {
+							continue;	/* Continue to follow if not last segment */
+						}
+						res = FR_OK;					/* Ended at the root directroy. Function completed. */
+					} else {							/* Could not find the object */
+						if ((!(NameStatus & NS_LAST)) != 0U) {
+							res = FR_NO_PATH;	/* Adjust error code if not last segment */
+						}
+					}
+				}
+				break;
+			}
+			if ((NameStatus & NS_LAST) != 0U) {
+				break;			/* Last segment matched. Function completed. */
+			}
+			directory = dp->dir;						/* Follow the sub-directory */
+			if ((!((*(directory+DIR_Attr)) & AM_DIR)) != 0U) {	/* It is not a sub-directory and cannot follow */
+				res = FR_NO_PATH; break;
+			}
+			dp->sclust = (DWORD)ld_clust(dp->fs, directory);
+		}
+	}
+
+	return res;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get logical drive number from path name                               */
+/*-----------------------------------------------------------------------*/
+
+static
+s32 get_ldnumber (		/* Returns logical drive number (-1:invalid drive) */
+	const TCHAR** path	/* Pointer to pointer to the path name */
+)
+{
+	const TCHAR *tp, *tt;
+	UINT i;
+	s32 vol = -1;
+
+
+	if ((*path)!=NULL) {	/* If the pointer is not a null */
+		tt = *path;
+		for (; (*tt >= '!') && (*tt != ':'); ) {tt += 1U;}	/* Find ':' in the path */
+		if (*tt == ':') {	/* If a ':' is exist in the path name */
+			tp = *path;
+			i = (*tp - '0');
+			tp += 1U;
+			if ((i < 10U) && (tp == tt)) {	/* Is there a numeric drive id? */
+				if (i < _VOLUMES) {	/* If a drive id is found, get the value and strip it */
+					vol = (s32)i;
+					tt += 1U;
+					*path = ((TCHAR *)tt);
+				}
+			} else {	/* No numeric drive number */
+#if _STR_VOLUME_ID		/* Find string drive id */
+				static const char* const str[] = {_VOLUME_STRS};
+				const char *sp;
+				char c;
+				TCHAR tc;
+
+				i = 0; tt += 1U;
+				do {
+					sp = str[i]; tp = *path;
+					do {	/* Compare a string drive id with path name */
+						c = *sp++; tc = *tp++;
+						if (IsLower(tc)) {
+							tc -= 0x20;
+						}
+					} while (c && (TCHAR)c == tc);
+				} while ((c || tp != tt) && ++i < _VOLUMES);	/* Repeat for each id until pattern match */
+				if (i < _VOLUMES) {	/* If a drive id is found, get the value and strip it */
+					vol = (s32)i;
+					*path = tt;
+				}
+#endif
+			}
+		}
+		else {
+#if _FS_RPATH && _VOLUMES >= 2
+			vol = CurrVol;	/* Current drive */
+#else
+			vol = 0;		/* Drive 0 */
+#endif
+		}
+	}
+	return vol;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Load a sector and check if it is an FAT boot sector                   */
+/*-----------------------------------------------------------------------*/
+
+static
+BYTE check_fs (	/* 0:FAT boor sector, 1:Valid boor sector but not FAT, 2:Not a boot sector, 3:Disk error */
+	FATFS* fs,	/* File system object */
+	DWORD sect	/* Sector# (lba) to check if it is an FAT boot record or not */
+)
+{
+	fs->wflag = 0U; fs->winsect = 0xFFFFFFFFU;	/* Invaidate window */
+	if (move_window(fs, sect) != FR_OK)	{		/* Load boot record */
+		return (BYTE)3;
+	}
+
+	if (LD_WORD(fs->win+BS_55AA) != 0xAA55U) {	/* Check boot record signature (always placed at offset 510 even if the sector size is >512) */
+		return (BYTE)2;
+	}
+
+	if ((LD_DWORD(fs->win+BS_FilSysType) & 0xFFFFFFU) == 0x544146U) {		/* Check "FAT" string */
+		return (BYTE)0;
+	}
+	if ((LD_DWORD(fs->win+BS_FilSysType32) & 0xFFFFFFU) == 0x544146U) {	/* Check "FAT" string */
+		return (BYTE)0;
+	}
+
+	return (BYTE)1;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Find logical drive and check if the volume is mounted                 */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT find_volume (	/* FR_OK(0): successful, !=0: any error occurred */
+	FATFS** rfs,		/* Pointer to pointer to the found file system object */
+	const TCHAR** path,	/* Pointer to pointer to the path name (drive number) */
+	BYTE wmode			/* !=0: Check write protection for write access */
+)
+{
+	static WORD Fsid;					/* File system mount ID */
+	BYTE fmt;
+	s32 vol;
+	DSTATUS stat;
+	DWORD bsect, fasize, tsect, sysect, nclst, szbfat;
+	WORD nrsv;
+	FATFS *fs;
+
+
+	/* Get logical drive number from the path name */
+	(*rfs) = 0;
+	vol = get_ldnumber(path);
+	if (vol < 0) {return FR_INVALID_DRIVE;}
+
+	/* Check if the file system object is valid or not */
+	fs = FatFs[vol];					/* Get pointer to the file system object */
+	if ((!fs) != 0U) {
+		return FR_NOT_ENABLED;		/* Is the file system object available? */
+	}
+
+	ENTER_FF(fs);						/* Lock the volume */
+	*rfs = fs;							/* Return pointer to the file system object */
+
+	if (fs->fs_type != 0U) {					/* If the volume has been mounted */
+		stat = disk_status(fs->drv);
+		if ((!(stat & STA_NOINIT)) != 0U) {		/* and the physical drive is kept initialized */
+			if (!_FS_READONLY && (wmode != (BYTE)0U) && ((stat & STA_PROTECT) != (BYTE)0U)) {/* Check write protection if needed */
+				return FR_WRITE_PROTECTED;
+			}
+			return FR_OK;				/* The file system object is valid */
+		}
+	}
+
+	/* The file system object is not valid. */
+	/* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */
+
+	fs->fs_type = 0U;					/* Clear the file system object */
+	fs->drv = LD2PD(vol);				/* Bind the logical drive and a physical drive */
+	stat = disk_initialize(fs->drv);	/* Initialize the physical drive */
+	if ((stat & STA_NOINIT) != (BYTE)0U) {				/* Check if the initialization succeeded */
+		return FR_NOT_READY;			/* Failed to initialize due to no medium or hard error */
+	}
+	if (!_FS_READONLY && (wmode != (BYTE)0U)&& ((stat & STA_PROTECT) != (BYTE)0U)) {	/* Check disk write protection if needed */
+		return FR_WRITE_PROTECTED;
+	}
+#if _MAX_SS != _MIN_SS						/* Get sector size (multiple sector size cfg only) */
+	if (disk_ioctl(fs->drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK
+		|| SS(fs) < _MIN_SS || SS(fs) > _MAX_SS) {
+		 return FR_DISK_ERR;
+	}
+#endif
+	/* Find an FAT partition on the drive. Supports only generic partitioning, FDISK and SFD. */
+	bsect = 0U;
+	fmt = check_fs(fs, bsect);					/* Load sector 0 and check if it is an FAT boot sector as SFD */
+	if ((fmt == 1U) || (((!fmt) != (BYTE)0U) && ((LD2PT(vol)) != 0U))) {	/* Not an FAT boot sector or forced partition number */
+		UINT i;
+		DWORD br[4];
+
+		for (i = 0U; i < 4U; i++) {			/* Get partition offset */
+			BYTE *pt = fs->win+MBR_Table + ((WORD)i * (WORD)SZ_PTE);
+			br[i] = ((*(pt+4)) != (BYTE)0U) ? LD_DWORD((pt+8U)) : 0U;
+		}
+		i = LD2PT(vol);						/* Partition number: 0:auto, 1-4:forced */
+		if (i != 0U) {
+			i--;
+		}
+		do {								/* Find an FAT volume */
+			bsect = br[i];
+			fmt = (bsect!=(DWORD)0U) ? check_fs(fs, bsect) : 2U;	/* Check the partition */
+			i += (UINT)1;
+		} while ((!LD2PT(vol)) && (fmt != (BYTE)0U)&& (i < 4U));
+	}
+	if (fmt == 3U) {
+		return FR_DISK_ERR;		/* An error occured in the disk I/O layer */
+	}
+	if (fmt != 0U) {
+		return FR_NO_FILESYSTEM;		/* No FAT volume is found */
+	}
+
+	/* An FAT volume is found. Following code initializes the file system object */
+
+	if (LD_WORD(fs->win+BPB_BytsPerSec) != (WORD)SS(fs)) {	/* (BPB_BytsPerSec must be equal to the physical sector size) */
+		return FR_NO_FILESYSTEM;
+	}
+
+	fasize = ((DWORD)LD_WORD(fs->win+BPB_FATSz16));				/* Number of sectors per FAT */
+	if ((!fasize) != 0U) {
+		fasize = (DWORD)LD_DWORD(fs->win+BPB_FATSz32);
+	}
+	fs->fsize = fasize;
+
+	fs->n_fats = fs->win[BPB_NumFATs];					/* Number of FAT copies */
+	if ((fs->n_fats != 1U) && (fs->n_fats != 2U)) {			/* (Must be 1 or 2) */
+		return FR_NO_FILESYSTEM;
+	}
+	fasize *= (DWORD)fs->n_fats;								/* Number of sectors for FAT area */
+
+	fs->csize = fs->win[BPB_SecPerClus];				/* Number of sectors per cluster */
+	if (((!fs->csize) != 0U) || ((fs->csize & (fs->csize - 1U)) != 0U)) {	/* (Must be power of 2) */
+		return FR_NO_FILESYSTEM;
+	}
+
+	fs->n_rootdir = LD_WORD(fs->win+BPB_RootEntCnt);	/* Number of root directory entries */
+	if ((fs->n_rootdir % (SS(fs) / SZ_DIR)) != 0U) {				/* (Must be sector aligned) */
+		return FR_NO_FILESYSTEM;
+	}
+
+	tsect = ((DWORD)LD_WORD(fs->win+BPB_TotSec16));				/* Number of sectors on the volume */
+	if ((!tsect) != 0U) {
+		tsect = (DWORD)LD_DWORD(fs->win+BPB_TotSec32);
+	}
+
+	nrsv = LD_WORD(fs->win+BPB_RsvdSecCnt);				/* Number of reserved sectors */
+	if ((!nrsv) != 0U) {
+		return FR_NO_FILESYSTEM;					/* (Must not be 0) */
+	}
+
+	/* Determine the FAT sub type */
+	sysect = (DWORD)nrsv + fasize + (fs->n_rootdir / (SS(fs) / SZ_DIR));	/* RSV+FAT+DIR */
+	if (tsect < sysect) {
+		return FR_NO_FILESYSTEM;		/* (Invalid volume size) */
+	}
+	nclst = (tsect - sysect) / ((DWORD)fs->csize);				/* Number of clusters */
+	if ((!nclst) != 0U) {
+		return FR_NO_FILESYSTEM;				/* (Invalid volume size) */
+	}
+	fmt = FS_FAT12;
+	if (nclst >= MIN_FAT16) {
+		fmt = FS_FAT16;
+	}
+	if (nclst >= MIN_FAT32) {
+		fmt = FS_FAT32;
+	}
+
+	/* Boundaries and Limits */
+	fs->n_fatent = nclst + 2U;							/* Number of FAT entries */
+	fs->volbase = bsect;								/* Volume start sector */
+	fs->fatbase = bsect + nrsv; 						/* FAT start sector */
+	fs->database = bsect + sysect;						/* Data start sector */
+	if (fmt == FS_FAT32) {
+		if (fs->n_rootdir != 0U) {
+			return FR_NO_FILESYSTEM;		/* (BPB_RootEntCnt must be 0) */
+		}
+		fs->dirbase = LD_DWORD(fs->win+BPB_RootClus);	/* Root directory start cluster */
+		szbfat = fs->n_fatent * 4U;						/* (Needed FAT size) */
+	} else {
+		if ((!fs->n_rootdir) != 0U)	{
+			return FR_NO_FILESYSTEM;	/* (BPB_RootEntCnt must not be 0) */
+		}
+		fs->dirbase = fs->fatbase + fasize;				/* Root directory start sector */
+		szbfat = (((DWORD)fmt) == FS_FAT16) ?					/* (Needed FAT size) */
+			(fs->n_fatent * ((DWORD)2U)) : (((fs->n_fatent * (DWORD)3U) / (DWORD)2U) + (fs->n_fatent & (DWORD)1U));
+	}
+	if (fs->fsize < ((szbfat + (SS(fs) - 1)) / SS(fs))) {	/* (BPB_FATSz must not be less than needed) */
+		return FR_NO_FILESYSTEM;
+	}
+
+#if !_FS_READONLY
+	/* Initialize cluster allocation information */
+	fs->last_clust = 0xFFFFFFFFU;
+	fs->free_clust = 0xFFFFFFFFU;
+
+	/* Get fsinfo if available */
+	fs->fsi_flag = 0x80U;
+#if (_FS_NOFSINFO & 3) != 3U
+	if ((fmt == FS_FAT32)				/* Enable FSINFO only if FAT32 and BPB_FSInfo is 1 */
+		&& (LD_WORD(fs->win+BPB_FSInfo) == 1U)
+		&& (move_window(fs, bsect + 1U) == FR_OK))
+	{
+		fs->fsi_flag = 0U;
+		if ((LD_WORD(fs->win+BS_55AA) == 0xAA55U)	/* Load FSINFO data if available */
+			&& (LD_DWORD(fs->win+FSI_LeadSig) == 0x41615252U)
+			&& (LD_DWORD(fs->win+FSI_StrucSig) == 0x61417272U))
+		{
+#if (_FS_NOFSINFO & 1) == 0
+			fs->free_clust = LD_DWORD(fs->win+FSI_Free_Count);
+#endif
+#if (_FS_NOFSINFO & 2) == 0
+			fs->last_clust = LD_DWORD(fs->win+FSI_Nxt_Free);
+#endif
+		}
+	}
+#endif
+#endif
+	fs->fs_type = fmt;	/* FAT sub-type */
+	Fsid += (WORD)1;
+	fs->id = Fsid;	/* File system mount ID */
+#if _FS_RPATH
+	fs->cdir = 0;		/* Set current directory to root */
+#endif
+#if _FS_LOCK			/* Clear file lock semaphores */
+	clear_lock(fs);
+#endif
+
+	return FR_OK;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Check if the file/directory object is valid or not                    */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT validate (	/* FR_OK(0): The object is valid, !=0: Invalid */
+	void* obj		/* Pointer to the object FIL/DIR to check validity */
+)
+{
+	FIL *fil = (FIL *)(void *)obj;	/* Assuming offset of .fs and .id in the FIL/DIR structure is identical */
+	FRESULT res;
+
+	if (((!fil) != 0U) || ((!fil->fs) != 0U) || ((!fil->fs->fs_type) != 0U) || (fil->fs->id != fil->id)) {
+		res = FR_INVALID_OBJECT;
+	}
+	else {
+		ENTER_FF(fil->fs);		/* Lock file system */
+
+		if ((disk_status(fil->fs->drv) & STA_NOINIT) != (BYTE)0U) {
+			res = FR_NOT_READY;
+		}
+		else {
+			res = FR_OK;
+		}
+	}
+	return res;
+}
+
+
+
+
+/*--------------------------------------------------------------------------
+
+   Public Functions
+
+--------------------------------------------------------------------------*/
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Mount/Unmount a Logical Drive                                         */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_mount (
+	FATFS* fs,			/* Pointer to the file system object (NULL:unmount)*/
+	const TCHAR* path,	/* Logical drive number to be mounted/unmounted */
+	BYTE opt			/* 0:Do not mount (delayed mount), 1:Mount immediately */
+)
+{
+	FATFS *cfs;
+	s32 vol;
+	FRESULT res;
+	const TCHAR *rp = path;
+
+
+	vol = get_ldnumber(&rp);
+	if (vol < 0) {return FR_INVALID_DRIVE;}
+	cfs = FatFs[vol];					/* Pointer to fs object */
+
+	if (cfs != 0U) {
+#if _FS_LOCK
+		clear_lock(cfs);
+#endif
+#if _FS_REENTRANT						/* Discard sync object of the current volume */
+		if ((!ff_del_syncobj(cfs->sobj)) != 0U) {
+			return FR_INT_ERR;
+		}
+#endif
+		cfs->fs_type = 0U;				/* Clear old fs object */
+	}
+
+	if (fs != 0U) {
+		fs->fs_type = 0U;				/* Clear new fs object */
+#if _FS_REENTRANT						/* Create sync object for the new volume */
+		if ((!ff_cre_syncobj((BYTE)vol, &fs->sobj)) != 0U) {
+			return FR_INT_ERR;
+		}
+#endif
+	}
+	FatFs[vol] = fs;					/* Register new fs object */
+
+	if (((!fs) != 0U) || (opt != 1U)) {
+		return FR_OK;	/* Do not mount now, it will be mounted later */
+	}
+
+	res = find_volume(&fs, &path, 0U);	/* Force mounted the volume */
+	LEAVE_FF(fs, res);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Open or Create a File                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_open (
+	FIL* fp,			/* Pointer to the blank file object */
+	const TCHAR* path,	/* Pointer to the file name */
+	BYTE mode			/* Access mode and file open mode flags */
+)
+{
+	FRESULT res;
+	DIR dj = {0};
+	BYTE *dir;
+	DEF_NAMEBUF;
+
+
+	if ((!fp) != 0U) {
+		return FR_INVALID_OBJECT;
+	}
+	fp->fs = NULL;			/* Clear file object */
+
+	/* Get logical drive number */
+#if !_FS_READONLY
+	mode &= FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW;
+	res = find_volume(&dj.fs, &path, (BYTE)(mode & ~FA_READ));
+#else
+	mode &= FA_READ;
+	res = find_volume(&dj.fs, &path, 0U);
+#endif
+	if (res == FR_OK) {
+		INIT_BUF(dj);
+		res = follow_path(&dj, path);	/* Follow the file path */
+		dir = dj.dir;
+#if !_FS_READONLY	/* R/W configuration */
+		if (res == FR_OK) {
+			if ((!dir) != 0U)	{/* Default directory itself */
+				res = FR_INVALID_NAME;
+			}
+#if _FS_LOCK
+			else
+				res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
+#endif
+		}
+		/* Create or Open a file */
+		if ((mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) != (BYTE)0U) {
+			DWORD dw, cl;
+
+			if (res != FR_OK) {					/* No file, create new */
+				if (res == FR_NO_FILE) {			/* There is no file to open, create a new entry */
+#if _FS_LOCK
+					res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES;
+#else
+					res = dir_register(&dj);
+#endif
+				}
+				mode |= FA_CREATE_ALWAYS;		/* File is created */
+				dir = dj.dir;					/* New entry */
+			}
+			else {								/* Any object is already existing */
+				if ((*(dir+DIR_Attr) & (AM_RDO | AM_DIR)) != 0U) {	/* Cannot overwrite it (R/O or DIR) */
+					res = FR_DENIED;
+				} else {
+					if ((mode & FA_CREATE_NEW) != (BYTE)0U) {	/* Cannot create as new file */
+						res = FR_EXIST;
+					}
+				}
+			}
+			if ((res == FR_OK) && ((mode & FA_CREATE_ALWAYS) != (BYTE)0U)) {	/* Truncate it if overwrite mode */
+				dw = get_fattime();				/* Created time */
+				ST_DWORD(dir+DIR_CrtTime, dw);
+				(*(dir+DIR_Attr)) = 0U;				/* Reset attribute */
+				ST_DWORD(dir+DIR_FileSize, 0);	/* size = 0 */
+				cl = ld_clust(dj.fs, dir);		/* Get start cluster */
+				st_clust(dir, 0U);				/* cluster = 0 */
+				dj.fs->wflag = 1U;
+				if (cl != (DWORD)0U) {						/* Remove the cluster chain if exist */
+					dw = dj.fs->winsect;
+					res = remove_chain(dj.fs, cl);
+					if (res == FR_OK) {
+						dj.fs->last_clust = cl - 1;	/* Reuse the cluster hole */
+						res = move_window(dj.fs, dw);
+					}
+				}
+			}
+		}
+		else {	/* Open an existing file */
+			if (res == FR_OK) {					/* Follow succeeded */
+				if ((*(dir+DIR_Attr) & AM_DIR) != 0U) {	/* It is a directory */
+					res = FR_NO_FILE;
+				} else {
+					if (((mode & FA_WRITE) != 0U) && (((*(dir+DIR_Attr)) & AM_RDO) != 0U)) {/* R/O violation */
+						res = FR_DENIED;
+					}
+				}
+			}
+		}
+		if (res == FR_OK) {
+			if ((mode & FA_CREATE_ALWAYS) != 0U) {		/* Set file change flag if created or overwritten */
+				mode |= FA__WRITTEN;
+			}
+			fp->dir_sect = dj.fs->winsect;		/* Pointer to the directory entry */
+			fp->dir_ptr = dir;
+#if _FS_LOCK
+			fp->lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
+			if ((!fp->lockid) != 0U) {
+				res = FR_INT_ERR;
+			}
+#endif
+		}
+
+#else				/* R/O configuration */
+		if (res == FR_OK) {					/* Follow succeeded */
+			dir = dj.dir;
+			if ((!dir) != 0U) {						/* Current directory itself */
+				res = FR_INVALID_NAME;
+			} else {
+				if (((*(dir+DIR_Attr)) & AM_DIR) != 0U)	{/* It is a directory */
+					res = FR_NO_FILE;
+				}
+			}
+		}
+#endif
+		FREE_BUF();
+
+		if (res == FR_OK) {
+			fp->flag = mode;					/* File access mode */
+			fp->err = 0U;						/* Clear error flag */
+			fp->sclust = ld_clust(dj.fs, dir);	/* File start cluster */
+			fp->fsize = LD_DWORD(dir+DIR_FileSize);	/* File size */
+			fp->fptr = 0U;						/* File pointer */
+			fp->dsect = 0U;
+#if _USE_FASTSEEK
+			fp->cltbl = 0;						/* Normal seek mode */
+#endif
+			fp->fs = dj.fs;	 					/* Validate file object */
+			fp->id = fp->fs->id;
+		}
+	}
+
+	LEAVE_FF(dj.fs, res);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Read File                                                             */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_read (
+	FIL* fp, 		/* Pointer to the file object */
+	void* buff,		/* Pointer to data buffer */
+	UINT btr,		/* Number of bytes to read */
+	UINT* br		/* Pointer to number of bytes read */
+)
+{
+	FRESULT res;
+	DWORD clst, sect, remain;
+	UINT rcnt, cc;
+	BYTE csect, *rbuff = (BYTE*)(void *)buff;
+
+
+	*br = 0U;	/* Clear read byte counter */
+
+	res = validate(fp);							/* Check validity */
+	if (res != FR_OK) {
+		LEAVE_FF(fp->fs, res);
+	}
+	if (fp->err != (BYTE)0U) {								/* Check error */
+		LEAVE_FF(fp->fs, (FRESULT)fp->err);
+	}
+	if ((!(fp->flag & FA_READ)) != 0U) { 					/* Check access mode */
+		LEAVE_FF(fp->fs, FR_DENIED);
+	}
+	remain = fp->fsize - fp->fptr;
+	if (btr > (UINT)remain) {
+		btr = (UINT)remain;		/* Truncate btr by remaining bytes */
+	}
+	while(btr != (UINT)0U) {								/* Repeat until all data read */
+
+		if ((fp->fptr % SS(fp->fs)) == 0U) {		/* On the sector boundary? */
+			csect = (BYTE)(((BYTE)((DWORD)fp->fptr / (DWORD)SS(fp->fs))) & (BYTE)(fp->fs->csize - (BYTE)1U));	/* Sector offset in the cluster */
+			if ((!csect) != 0U) {						/* On the cluster boundary? */
+				if (fp->fptr == 0U) {			/* On the top of the file? */
+					clst = fp->sclust;			/* Follow from the origin */
+				} else {						/* Middle or end of the file */
+#if _USE_FASTSEEK
+					if (fp->cltbl) {
+						clst = clmt_clust(fp, fp->fptr);	/* Get cluster# from the CLMT */
+					}
+					else
+#endif
+						clst = get_fat(fp->fs, fp->clust);	/* Follow cluster chain on the FAT */
+				}
+				if (clst < 2U) {
+					ABORT(fp->fs, FR_INT_ERR);
+				}
+				if (clst == 0xFFFFFFFFU) {
+					ABORT(fp->fs, FR_DISK_ERR);
+				}
+				fp->clust = clst;				/* Update current cluster */
+			}
+			sect = clust2sect(fp->fs, fp->clust);	/* Get current sector */
+			if ((!sect) != 0U) {
+				ABORT(fp->fs, FR_INT_ERR);
+			}
+			sect += csect;
+			cc = btr / SS(fp->fs);				/* When remaining bytes >= sector size, */
+			if (cc != 0U) {							/* Read maximum contiguous sectors directly */
+				if ((csect + cc) > fp->fs->csize) {	/* Clip at cluster boundary */
+					cc = (UINT)(fp->fs->csize - csect);
+				}
+				if (disk_read(fp->fs->drv, rbuff, sect, (BYTE)cc) != RES_OK) {
+					ABORT(fp->fs, FR_DISK_ERR);
+				}
+#if !_FS_READONLY && _FS_MINIMIZE <= 2			/* Replace one of the read sectors with cached data if it contains a dirty sector */
+#if _FS_TINY
+				if ((fp->fs->wflag != 0U) && (((fp->fs->winsect - sect) < cc) != 0U)) {
+					mem_cpy(rbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), fp->fs->win, SS(fp->fs));
+				}
+#else
+				if (((fp->flag & FA__DIRTY) != (BYTE)0U) && ((fp->dsect - sect) < cc)) {
+					mem_cpy(rbuff + ((fp->dsect - sect) * SS(fp->fs)), fp->buf, SS(fp->fs));
+				}
+#endif
+#endif
+				rcnt = SS(fp->fs) * cc;			/* Number of bytes transferred */
+				rbuff += rcnt; fp->fptr += rcnt; *br += rcnt;btr -= rcnt;
+				continue;
+			}
+#if !_FS_TINY
+			if (fp->dsect != sect) {			/* Load data sector if not in cache */
+#if !_FS_READONLY
+				if ((fp->flag & FA__DIRTY) != (BYTE)0U) {		/* Write-back dirty sector cache */
+					if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1U) != RES_OK) {
+						ABORT(fp->fs, FR_DISK_ERR);
+					}
+					fp->flag &= ~FA__DIRTY;
+				}
+#endif
+				if (disk_read(fp->fs->drv, fp->buf, sect, 1U) != RES_OK) {	/* Fill sector cache */
+					ABORT(fp->fs, FR_DISK_ERR);
+				}
+			}
+#endif
+			fp->dsect = sect;
+		}
+		rcnt = (UINT)SS(fp->fs) - (UINT)(fp->fptr % SS(fp->fs));	/* Get partial sector data from sector buffer */
+		if (rcnt > btr) {
+			rcnt = btr;
+		}
+#if _FS_TINY
+		if (move_window(fp->fs, fp->dsect) != 0U) {		/* Move sector window */
+			ABORT(fp->fs, FR_DISK_ERR);
+		}
+		mem_cpy(rbuff, &fp->fs->win[fp->fptr % SS(fp->fs)], rcnt);	/* Pick partial sector */
+#else
+		mem_cpy(rbuff, (void *)&fp->buf[fp->fptr % SS(fp->fs)], rcnt);	/* Pick partial sector */
+#endif
+		rbuff += rcnt; fp->fptr += rcnt; *br += rcnt;btr -= rcnt;
+	}
+
+	LEAVE_FF(fp->fs, FR_OK);
+}
+
+
+
+
+#if !_FS_READONLY
+/*-----------------------------------------------------------------------*/
+/* Write File                                                            */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_write (
+	FIL* fp,			/* Pointer to the file object */
+	const void *buff,	/* Pointer to the data to be written */
+	UINT btw,			/* Number of bytes to write */
+	UINT* bw			/* Pointer to number of bytes written */
+)
+{
+	FRESULT res;
+	DWORD clst, sect;
+	UINT wcnt, cc;
+	const BYTE *wbuff = buff;
+	BYTE csect;
+	UINT LocBtw = btw;
+
+	*bw = 0U;	/* Clear write byte counter */
+
+	res = validate(fp);						/* Check validity */
+	if (res != FR_OK) {
+		LEAVE_FF(fp->fs, res);
+	}
+	if (fp->err != (BYTE)0U) {							/* Check error */
+		LEAVE_FF(fp->fs, (FRESULT)fp->err);
+	}
+	if ((!(fp->flag & FA_WRITE)) != 0U) {			/* Check access mode */
+		LEAVE_FF(fp->fs, FR_DENIED);
+	}
+	if ((fp->fptr + LocBtw) < fp->fptr) {
+		LocBtw = 0U;	/* File size cannot reach 4GB */
+	}
+
+	while(LocBtw != (UINT)0U) {							/* Repeat until all data written */
+
+		if ((fp->fptr % SS(fp->fs)) == 0U) {	/* On the sector boundary? */
+			csect = (BYTE)((fp->fptr / ((DWORD)SS(fp->fs))) & (DWORD)(fp->fs->csize - 1U));	/* Sector offset in the cluster */
+			if ((!csect) != 0U) {					/* On the cluster boundary? */
+				if (fp->fptr == 0U) {		/* On the top of the file? */
+					clst = fp->sclust;		/* Follow from the origin */
+					if (clst == 0U)	{		/* When no cluster is allocated, */
+						clst = create_chain(fp->fs, 0U);	/* Create a new cluster chain */
+					}
+				} else {					/* Middle or end of the file */
+#if _USE_FASTSEEK
+					if (fp->cltbl)
+						clst = clmt_clust(fp, fp->fptr);	/* Get cluster# from the CLMT */
+					else
+#endif
+						clst = create_chain(fp->fs, fp->clust);	/* Follow or stretch cluster chain on the FAT */
+				}
+				if (clst == 0U) {
+					break;		/* Could not allocate a new cluster (disk full) */
+				}
+				if (clst == 1U) {
+					ABORT(fp->fs, FR_INT_ERR);
+				}
+				if (clst == 0xFFFFFFFFU) {
+					ABORT(fp->fs, FR_DISK_ERR);
+				}
+				fp->clust = clst;			/* Update current cluster */
+				if (fp->sclust == 0U) {
+					fp->sclust = clst;	/* Set start cluster if the first write */
+				}
+			}
+#if _FS_TINY
+			if (fp->fs->winsect == fp->dsect && (sync_window(fp->fs) != 0U)) {	/* Write-back sector cache */
+				ABORT(fp->fs, FR_DISK_ERR);
+			}
+#else
+			if ((fp->flag & FA__DIRTY) != (BYTE)0U) {		/* Write-back sector cache */
+				if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1U) != RES_OK) {
+					ABORT(fp->fs, FR_DISK_ERR);
+				}
+				fp->flag &= ~FA__DIRTY;
+			}
+#endif
+			sect = clust2sect(fp->fs, fp->clust);	/* Get current sector */
+			if ((!sect) != 0U) {
+				ABORT(fp->fs, FR_INT_ERR);
+			}
+			sect += csect;
+			cc = LocBtw / SS(fp->fs);			/* When remaining bytes >= sector size, */
+			if (cc != 0U) {						/* Write maximum contiguous sectors directly */
+				if ((csect + cc) > fp->fs->csize) {	/* Clip at cluster boundary */
+					cc = (UINT)(fp->fs->csize - csect);
+				}
+				if (disk_write(fp->fs->drv, wbuff, sect, (BYTE)cc) != RES_OK) {
+					ABORT(fp->fs, FR_DISK_ERR);
+				}
+#if _FS_MINIMIZE <= 2
+#if _FS_TINY
+				if ((fp->fs->winsect - sect) < cc) {	/* Refill sector cache if it gets invalidated by the direct write */
+					mem_cpy(fp->fs->win, wbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), SS(fp->fs));
+					fp->fs->wflag = 0U;
+				}
+#else
+				if ((fp->dsect - sect) < cc) { /* Refill sector cache if it gets invalidated by the direct write */
+					mem_cpy(fp->buf, wbuff + ((fp->dsect - sect) * SS(fp->fs)), SS(fp->fs));
+					fp->flag &= ~FA__DIRTY;
+				}
+#endif
+#endif
+				wcnt = SS(fp->fs) * cc;		/* Number of bytes transferred */
+				wbuff += wcnt; fp->fptr += (DWORD)wcnt; *bw += wcnt; LocBtw -= wcnt;
+				continue;
+			}
+#if _FS_TINY
+			if (fp->fptr >= fp->fsize) {	/* Avoid silly cache filling at growing edge */
+				if (sync_window(fp->fs) != 0U) {
+					ABORT(fp->fs, FR_DISK_ERR);
+				}
+				fp->fs->winsect = sect;
+			}
+#else
+			if (fp->dsect != sect) {		/* Fill sector cache with file data */
+				if (((fp->fptr < fp->fsize) != 0U) &&
+					(disk_read(fp->fs->drv, fp->buf, sect, 1U) != RES_OK)) {
+						ABORT(fp->fs, FR_DISK_ERR);
+				}
+			}
+#endif
+			fp->dsect = sect;
+		}
+		wcnt = (((UINT)SS(fp->fs)) - ((UINT)fp->fptr % SS(fp->fs)));/* Put partial sector into file I/O buffer */
+		if (wcnt > LocBtw) {
+			wcnt = LocBtw;
+		}
+#if _FS_TINY
+		if (move_window(fp->fs, fp->dsect) != 0U) {	/* Move sector window */
+			ABORT(fp->fs, FR_DISK_ERR);
+		}
+		mem_cpy((void *)&fp->fs->win[fp->fptr % SS(fp->fs)], wbuff, wcnt);	/* Fit partial sector */
+		fp->fs->wflag = 1U;
+#else
+		mem_cpy((void *)&fp->buf[fp->fptr % SS(fp->fs)], wbuff, wcnt);	/* Fit partial sector */
+		fp->flag |= FA__DIRTY;
+#endif
+		wbuff += wcnt; fp->fptr += (DWORD)wcnt; *bw += wcnt; LocBtw -= wcnt;
+	}
+
+	if (fp->fptr > fp->fsize) {
+		fp->fsize = fp->fptr;	/* Update file size if needed */
+	}
+	fp->flag |= FA__WRITTEN;						/* Set file change flag */
+
+	LEAVE_FF(fp->fs, FR_OK);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Synchronize the File                                                  */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_sync (
+	FIL* fp		/* Pointer to the file object */
+)
+{
+	FRESULT res;
+	DWORD tm;
+	BYTE *directory;
+
+
+	res = validate(fp);					/* Check validity of the object */
+	if (res == FR_OK) {
+		if ((fp->flag & FA__WRITTEN) != 0U) {	/* Has the file been written? */
+			/* Write-back dirty buffer */
+#if !_FS_TINY
+			if ((fp->flag & FA__DIRTY) != (BYTE)0U) {
+				if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1U) != RES_OK) {
+					LEAVE_FF(fp->fs, FR_DISK_ERR);
+				}
+				fp->flag &= ~FA__DIRTY;
+			}
+#endif
+			/* Update the directory entry */
+			res = move_window(fp->fs, fp->dir_sect);
+			if (res == FR_OK) {
+				directory = fp->dir_ptr;
+				*(directory+DIR_Attr) |= AM_ARC;					/* Set archive bit */
+				ST_DWORD(directory+DIR_FileSize, fp->fsize);		/* Update file size */
+				st_clust(directory, fp->sclust);					/* Update start cluster */
+				tm = get_fattime();							/* Update updated time */
+				ST_DWORD(directory+DIR_WrtTime, tm);
+				ST_WORD(directory+DIR_LstAccDate, 0);
+				fp->flag &= ~FA__WRITTEN;
+				fp->fs->wflag = 1U;
+				res = sync_fs(fp->fs);
+			}
+		}
+	}
+
+	LEAVE_FF(fp->fs, res);
+}
+
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Close File                                                            */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_close (
+	FIL *fp		/* Pointer to the file object to be closed */
+)
+{
+	FRESULT res;
+
+
+#if !_FS_READONLY
+	res = f_sync(fp);					/* Flush cached data */
+	if (res == FR_OK)
+#endif
+	{
+		res = validate(fp);				/* Lock volume */
+		if (res == FR_OK) {
+#if _FS_REENTRANT
+			FATFS *fs = fp->fs;
+#endif
+#if _FS_LOCK
+			res = dec_lock(fp->lockid);	/* Decrement file open counter */
+			if (res == FR_OK)
+#endif
+				fp->fs = NULL;				/* Invalidate file object */
+#if _FS_REENTRANT
+			unlock_fs(fs, FR_OK);		/* Unlock volume */
+#endif
+		}
+	}
+	return res;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Change Current Directory or Current Drive, Get Current Directory      */
+/*-----------------------------------------------------------------------*/
+
+#if _FS_RPATH >= 1
+#if _VOLUMES >= 2
+FRESULT f_chdrive (
+	const TCHAR* path		/* Drive number */
+)
+{
+	int vol;
+
+
+	vol = get_ldnumber(&path);
+	if (vol < 0) {
+		return FR_INVALID_DRIVE;
+	}
+
+	CurrVol = (BYTE)vol;
+
+	return FR_OK;
+}
+#endif
+
+
+FRESULT f_chdir (
+	const TCHAR* path	/* Pointer to the directory path */
+)
+{
+	FRESULT res;
+	DIR dj;
+	DEF_NAMEBUF;
+
+
+	/* Get logical drive number */
+	res = find_volume(&dj.fs, &path, 0);
+	if (res == FR_OK) {
+		INIT_BUF(dj);
+		res = follow_path(&dj, path);		/* Follow the path */
+		FREE_BUF();
+		if (res == FR_OK) {					/* Follow completed */
+			if (!dj.dir) {
+				dj.fs->cdir = dj.sclust;	/* Start directory itself */
+			} else {
+				if (dj.dir[DIR_Attr] & AM_DIR) {	/* Reached to the directory */
+					dj.fs->cdir = ld_clust(dj.fs, dj.dir);
+				}
+				else {
+					res = FR_NO_PATH;		/* Reached but a file */
+				}
+			}
+		}
+		if (res == FR_NO_FILE) {
+			res = FR_NO_PATH;
+		}
+	}
+
+	LEAVE_FF(dj.fs, res);
+}
+
+
+#if _FS_RPATH >= 2
+FRESULT f_getcwd (
+	TCHAR* buff,	/* Pointer to the directory path */
+	UINT len		/* Size of path */
+)
+{
+	FRESULT res;
+	DIR dj;
+	UINT i, n;
+	DWORD ccl;
+	TCHAR *tp;
+	FILINFO fno;
+	DEF_NAMEBUF;
+
+
+	*buff = 0;
+	/* Get logical drive number */
+	res = find_volume(&dj.fs, (const TCHAR**)&buff, 0);	/* Get current volume */
+	if (res == FR_OK) {
+		INIT_BUF(dj);
+		i = len;			/* Bottom of buffer (directory stack base) */
+		dj.sclust = dj.fs->cdir;			/* Start to follow upper directory from current directory */
+		while ((ccl = dj.sclust) != 0) {	/* Repeat while current directory is a sub-directory */
+			res = dir_sdi(&dj, 1);			/* Get parent directory */
+			if (res != FR_OK) {
+				break;
+			}
+			res = dir_read(&dj, 0);
+			if (res != FR_OK) {
+				break;
+			}
+			dj.sclust = ld_clust(dj.fs, dj.dir);	/* Goto parent directory */
+			res = dir_sdi(&dj, 0);
+			if (res != FR_OK) {
+				break;
+			}
+			do {							/* Find the entry links to the child directory */
+				res = dir_read(&dj, 0);
+				if (res != FR_OK) {
+					break;
+				}
+				if (ccl == ld_clust(dj.fs, dj.dir)) {
+					break;	/* Found the entry */
+				}
+				res = dir_next(&dj, 0);
+			} while (res == FR_OK);
+			if (res == FR_NO_FILE) {
+				res = FR_INT_ERR;/* It cannot be 'not found'. */
+			}
+			if (res != FR_OK) {
+				break;
+			}
+#if _USE_LFN
+			fno.lfname = buff;
+			fno.lfsize = i;
+#endif
+			get_fileinfo(&dj, &fno);		/* Get the directory name and push it to the buffer */
+			tp = fno.fname;
+#if _USE_LFN
+			if (*buff) {
+				tp = buff;
+			}
+#endif
+			for (n = 0; tp[n]; n++) ;
+			if (i < n + 3) {
+				res = FR_NOT_ENOUGH_CORE; break;
+			}
+			while (n) buff[--i] = tp[--n];
+			buff[--i] = '/';
+		}
+		tp = buff;
+		if (res == FR_OK) {
+#if _VOLUMES >= 2
+			*tp++ = '0' + CurrVol;			/* Put drive number */
+			*tp++ = ':';
+#endif
+			if (i == len) {					/* Root-directory */
+				*tp++ = '/';
+			} else {						/* Sub-directroy */
+				do		/* Add stacked path str */
+					*tp++ = buff[i++];
+				while (i < len);
+			}
+		}
+		*tp = 0;
+		FREE_BUF();
+	}
+
+	LEAVE_FF(dj.fs, res);
+}
+#endif /* _FS_RPATH >= 2 */
+#endif /* _FS_RPATH >= 1 */
+
+
+
+#if _FS_MINIMIZE <= 2
+/*-----------------------------------------------------------------------*/
+/* Seek File R/W Pointer                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_lseek (
+	FIL* fp,		/* Pointer to the file object */
+	DWORD ofs		/* File pointer from top of file */
+)
+{
+	FRESULT res;
+	DWORD LocOfs = ofs;
+
+	res = validate(fp);					/* Check validity of the object */
+	if (res != FR_OK) {
+		LEAVE_FF(fp->fs, res);
+	}
+	if (fp->err != (BYTE)0U) {						/* Check error */
+		LEAVE_FF(fp->fs, (FRESULT)fp->err);
+	}
+
+#if _USE_FASTSEEK
+	if (fp->cltbl) {	/* Fast seek */
+		DWORD cl, pcl, ncl, tcl, dsc, tlen, ulen, *tbl;
+
+		if (ofs == CREATE_LINKMAP) {	/* Create CLMT */
+			tbl = fp->cltbl;
+			tlen = *tbl++; ulen = 2;	/* Given table size and required table size */
+			cl = fp->sclust;			/* Top of the chain */
+			if (cl) {
+				do {
+					/* Get a fragment */
+					tcl = cl; ncl = 0; ulen += 2;	/* Top, length and used items */
+					do {
+						pcl = cl; ncl++;
+						cl = get_fat(fp->fs, cl);
+						if (cl <= 1) {
+							ABORT(fp->fs, FR_INT_ERR);
+						}
+						if (cl == 0xFFFFFFFF) {
+							ABORT(fp->fs, FR_DISK_ERR);
+						}
+					} while (cl == pcl + 1);
+					if (ulen <= tlen) {		/* Store the length and top of the fragment */
+						*tbl++ = ncl; *tbl++ = tcl;
+					}
+				} while (cl < fp->fs->n_fatent);	/* Repeat until end of chain */
+			}
+			*fp->cltbl = ulen;	/* Number of items used */
+			if (ulen <= tlen) {
+				*tbl = 0;		/* Terminate table */
+			}
+			else {
+				res = FR_NOT_ENOUGH_CORE;	/* Given table size is smaller than required */
+			}
+
+		} else {						/* Fast seek */
+			if (LocOfs > fp->fsize) {		/* Clip offset at the file size */
+				LocOfs = fp->fsize;
+			}
+			fp->fptr = LocOfs;				/* Set file pointer */
+			if (LocOfs) {
+				fp->clust = clmt_clust(fp, ofs - 1);
+				dsc = clust2sect(fp->fs, fp->clust);
+				if ((!dsc) != 0U) {
+					ABORT(fp->fs, FR_INT_ERR);
+				}
+				dsc += (LocOfs - 1) / SS(fp->fs) & (fp->fs->csize - 1);
+				if (((fp->fptr % SS(fp->fs)) != 0U)&& ((dsc != fp->dsect) != 0U)) {	/* Refill sector cache if needed */
+#if !_FS_TINY
+#if !_FS_READONLY
+					if (fp->flag & FA__DIRTY) {		/* Write-back dirty sector cache */
+						if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK) {
+							ABORT(fp->fs, FR_DISK_ERR);
+						}
+						fp->flag &= ~FA__DIRTY;
+					}
+#endif
+					if (disk_read(fp->fs->drv, fp->buf, dsc, 1) != RES_OK) {	/* Load current sector */
+						ABORT(fp->fs, FR_DISK_ERR);
+					}
+#endif
+					fp->dsect = dsc;
+				}
+			}
+		}
+	} else
+#endif
+
+	/* Normal Seek */
+	{
+		DWORD clst, bcs, nsect, ifptr;
+
+		if (((LocOfs > fp->fsize) != 0U)					/* In read-only mode, clip offset with the file size */
+#if !_FS_READONLY
+			 && ((!(fp->flag & FA_WRITE)) != 0U)
+#endif
+			) {
+				LocOfs = fp->fsize;
+			}
+
+		ifptr = fp->fptr;
+		fp->fptr = 0U; nsect = 0U;
+		if (LocOfs != (DWORD)0U) {
+			bcs = (DWORD)fp->fs->csize * SS(fp->fs);	/* Cluster size (byte) */
+			if ((ifptr > 0U) &&
+				((((LocOfs - 1) / bcs) >= ((ifptr - 1) / bcs)) != 0U)) {	/* When seek to same or following cluster, */
+				fp->fptr = (ifptr - 1) & ~(bcs - (DWORD)1);	/* start from the current cluster */
+				LocOfs -= fp->fptr;
+				clst = fp->clust;
+			} else {									/* When seek to back cluster, */
+				clst = fp->sclust;						/* start from the first cluster */
+#if !_FS_READONLY
+				if (clst == 0U) {						/* If no cluster chain, create a new chain */
+					clst = create_chain(fp->fs, 0U);
+					if (clst == 1U) {
+						ABORT(fp->fs, FR_INT_ERR);
+					}
+					if (clst == 0xFFFFFFFFU) {
+						ABORT(fp->fs, FR_DISK_ERR);
+					}
+					fp->sclust = clst;
+				}
+#endif
+				fp->clust = clst;
+			}
+			if (clst != 0U) {
+				while (LocOfs > bcs) {						/* Cluster following loop */
+#if !_FS_READONLY
+					if ((fp->flag & FA_WRITE) != (BYTE)0U) {			/* Check if in write mode or not */
+						clst = create_chain(fp->fs, clst);	/* Force stretch if in write mode */
+						if (clst == 0U) {				/* When disk gets full, clip file size */
+							LocOfs = bcs; break;
+						}
+					} else
+#endif
+					{
+						clst = get_fat(fp->fs, clst);	/* Follow cluster chain if not in write mode */
+					}
+					if (clst == 0xFFFFFFFFU) {
+						ABORT(fp->fs, FR_DISK_ERR);
+					}
+					if ((clst <= 1U) || ((clst >= fp->fs->n_fatent) != 0U)) {
+						ABORT(fp->fs, FR_INT_ERR);
+					}
+					fp->clust = clst;
+					fp->fptr += bcs;
+					LocOfs -= bcs;
+				}
+				fp->fptr += LocOfs;
+				if ((LocOfs % SS(fp->fs)) != (UINT)0U) {
+					nsect = clust2sect(fp->fs, clst);	/* Current sector */
+					if ((!nsect) != 0U) {
+						ABORT(fp->fs, FR_INT_ERR);
+					}
+					nsect += LocOfs / SS(fp->fs);
+				}
+			}
+		}
+		if (((fp->fptr % SS(fp->fs)) != 0U) && ((nsect != fp->dsect) != 0U)) {	/* Fill sector cache if needed */
+#if !_FS_TINY
+#if !_FS_READONLY
+			if ((fp->flag & FA__DIRTY) != (BYTE)0U) {			/* Write-back dirty sector cache */
+				if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1U) != RES_OK) {
+					ABORT(fp->fs, FR_DISK_ERR);
+				}
+				fp->flag &= ~FA__DIRTY;
+			}
+#endif
+			if (disk_read(fp->fs->drv, fp->buf, nsect, 1U) != RES_OK) {	/* Fill sector cache */
+				ABORT(fp->fs, FR_DISK_ERR);
+			}
+#endif
+			fp->dsect = nsect;
+		}
+#if !_FS_READONLY
+		if (fp->fptr > fp->fsize) {			/* Set file change flag if the file size is extended */
+			fp->fsize = fp->fptr;
+			fp->flag |= FA__WRITTEN;
+		}
+#endif
+	}
+
+	LEAVE_FF(fp->fs, res);
+}
+
+
+
+#if _FS_MINIMIZE <= 1
+/*-----------------------------------------------------------------------*/
+/* Create a Directory Object                                             */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_opendir (
+	DIR* dp,			/* Pointer to directory object to create */
+	const TCHAR* path	/* Pointer to the directory path */
+)
+{
+	FRESULT res;
+	FATFS* fs;
+	DEF_NAMEBUF;
+
+
+	if ((!dp) != 0U) {
+		res = FR_INVALID_OBJECT;
+	}
+	else {
+	/* Get logical drive number */
+	res = find_volume(&fs, &path, 0U);
+	if (res == FR_OK) {
+		dp->fs = fs;
+		INIT_BUF(*dp);
+		res = follow_path(dp, path);			/* Follow the path to the directory */
+		FREE_BUF();
+		if (res == FR_OK) {						/* Follow completed */
+			if (dp->dir != NULL) {						/* It is not the origin directory itself */
+				if ((dp->dir[DIR_Attr] & AM_DIR) != (BYTE)0U)	{/* The object is a sub directory */
+					dp->sclust = ld_clust(fs, dp->dir);
+				}
+				else {							/* The object is a file */
+					res = FR_NO_PATH;
+				}
+			}
+			if (res == FR_OK) {
+				dp->id = fs->id;
+				res = dir_sdi(dp, 0U);			/* Rewind directory */
+#if _FS_LOCK
+				if (res == FR_OK) {
+					if (dp->sclust) {
+						dp->lockid = inc_lock(dp, 0);	/* Lock the sub directory */
+						if (!dp->lockid)
+							res = FR_TOO_MANY_OPEN_FILES;
+					} else {
+						dp->lockid = 0;	/* Root directory need not to be locked */
+					}
+				}
+#endif
+			}
+		}
+		if (res == FR_NO_FILE) {
+			res = FR_NO_PATH;
+		}
+	}
+	if (res != FR_OK) {
+		dp->fs = NULL;		/* Invalidate the directory object if function faild */
+	}
+
+	}
+	LEAVE_FF(fs, res);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Close Directory                                                       */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_closedir (
+	DIR *dp		/* Pointer to the directory object to be closed */
+)
+{
+	FRESULT res;
+
+
+	res = validate(dp);
+	if (res == FR_OK) {
+#if _FS_REENTRANT
+		FATFS *fs = dp->fs;
+#endif
+#if _FS_LOCK
+		if (dp->lockid) {				/* Decrement sub-directory open counter */
+			res = dec_lock(dp->lockid);
+		}
+		if (res == FR_OK)
+#endif
+			dp->fs = NULL;				/* Invalidate directory object */
+#if _FS_REENTRANT
+		unlock_fs(fs, FR_OK);		/* Unlock volume */
+#endif
+	}
+	return res;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Read Directory Entries in Sequence                                    */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_readdir (
+	DIR* dp,			/* Pointer to the open directory object */
+	FILINFO* fno		/* Pointer to file information to return */
+)
+{
+	FRESULT res;
+	DEF_NAMEBUF;
+
+
+	res = validate(dp);						/* Check validity of the object */
+	if (res == FR_OK) {
+		if ((!fno) != 0U) {
+			res = dir_sdi(dp, 0U);			/* Rewind the directory object */
+		} else {
+			INIT_BUF(*dp);
+			res = dir_read(dp, 0);			/* Read an item */
+			if (res == FR_NO_FILE) {		/* Reached end of directory */
+				dp->sect = 0U;
+				res = FR_OK;
+			}
+			if (res == FR_OK) {				/* A valid entry is found */
+				get_fileinfo(dp, fno);		/* Get the object information */
+				res = dir_next(dp, 0);		/* Increment index for next */
+				if (res == FR_NO_FILE) {
+					dp->sect = 0U;
+					res = FR_OK;
+				}
+			}
+			FREE_BUF();
+		}
+	}
+
+	LEAVE_FF(dp->fs, res);
+}
+
+
+
+#if _FS_MINIMIZE == 0
+/*-----------------------------------------------------------------------*/
+/* Get File Status                                                       */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_stat (
+	const TCHAR* path,	/* Pointer to the file path */
+	FILINFO* fno		/* Pointer to file information to return */
+)
+{
+	FRESULT res;
+	DIR dj = {0};
+	DEF_NAMEBUF;
+
+
+	/* Get logical drive number */
+	res = find_volume(&dj.fs, &path, 0U);
+	if (res == FR_OK) {
+		INIT_BUF(dj);
+		res = follow_path(&dj, path);	/* Follow the file path */
+		if (res == FR_OK) {				/* Follow completed */
+			if (dj.dir != NULL) {		/* Found an object */
+				if (fno != NULL) {
+					get_fileinfo(&dj, fno);
+				}
+			} else {			/* It is root directory */
+				res = FR_INVALID_NAME;
+			}
+		}
+		FREE_BUF();
+	}
+
+	LEAVE_FF(dj.fs, res);
+}
+
+
+
+#if !_FS_READONLY
+/*-----------------------------------------------------------------------*/
+/* Get Number of Free Clusters                                           */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_getfree (
+	const TCHAR* path,	/* Path name of the logical drive number */
+	DWORD* nclst,		/* Pointer to a variable to return number of free clusters */
+	FATFS** fatfsys		/* Pointer to return pointer to corresponding file system object */
+)
+{
+	FRESULT res;
+	FATFS *fs;
+	DWORD n, clst, sect, stat;
+	UINT i;
+	BYTE fat, *p;
+
+
+	/* Get logical drive number */
+	res = find_volume(fatfsys, &path, 0U);
+	fs = *fatfsys;
+	if (res == FR_OK) {
+		/* If free_clust is valid, return it without full cluster scan */
+		if (fs->free_clust <= (fs->n_fatent - 2)) {
+			*nclst = fs->free_clust;
+		} else {
+			/* Get number of free clusters */
+			fat = fs->fs_type;
+			n = 0U;
+			if (fat == FS_FAT12) {
+				clst = (DWORD)2;
+				do {
+					stat = get_fat(fs, clst);
+					if (stat == (DWORD)0xFFFFFFFFU) { res = FR_DISK_ERR; break; }
+					if (stat == 1U) { res = FR_INT_ERR; break; }
+					if (stat == 0U) { n++; }
+					clst += (DWORD)1;
+				} while (clst < fs->n_fatent);
+			} else {
+				clst = fs->n_fatent;
+				sect = fs->fatbase;
+				i = 0U; p = 0U;
+				do {
+					if (i == (UINT)0U) {
+						res = move_window(fs, sect);
+						sect += (DWORD)1;
+						if (res != FR_OK) {
+							break;
+						}
+						p = fs->win;
+						i = SS(fs);
+					}
+					if (fat == FS_FAT16) {
+						if (LD_WORD(p) == 0U) {
+							n++;
+						}
+						p += 2; i -= (UINT)2;
+					} else {
+						if ((LD_DWORD(p) & 0x0FFFFFFFU) == 0U) {
+							n++;
+						}
+						p += 4; i -= (UINT)4;
+					}
+					clst -= (DWORD)1;
+				} while (clst != (DWORD)0U);
+			}
+			fs->free_clust = n;
+			fs->fsi_flag |= 1U;
+			*nclst = n;
+		}
+	}
+	LEAVE_FF(fs, res);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Truncate File                                                         */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_truncate (
+	FIL* fp		/* Pointer to the file object */
+)
+{
+	FRESULT res;
+	DWORD ncl;
+
+
+	res = validate(fp);						/* Check validity of the object */
+	if (res == FR_OK) {
+		if (fp->err != (BYTE) 0U) {						/* Check error */
+			res = (FRESULT)fp->err;
+		} else {
+			if ((!(fp->flag & FA_WRITE)) != 0U) {		/* Check access mode */
+				res = FR_DENIED;
+			}
+		}
+	}
+	if (res == FR_OK) {
+		if (fp->fsize > fp->fptr) {
+			fp->fsize = fp->fptr;	/* Set file size to current R/W point */
+			fp->flag |= FA__WRITTEN;
+			if (fp->fptr == 0U) {	/* When set file size to zero, remove entire cluster chain */
+				res = remove_chain(fp->fs, fp->sclust);
+				fp->sclust = 0U;
+			} else {				/* When truncate a part of the file, remove remaining clusters */
+				ncl = get_fat(fp->fs, fp->clust);
+				res = FR_OK;
+				if (ncl == (DWORD)0xFFFFFFFFU) {
+					res = FR_DISK_ERR;
+				}
+				if (ncl == 1U) {
+					res = FR_INT_ERR;
+				}
+				if ((res == FR_OK) && ((ncl < fp->fs->n_fatent) != 0U)) {
+					res = put_fat(fp->fs, fp->clust, 0x0FFFFFFFU);
+					if (res == FR_OK) {
+						res = remove_chain(fp->fs, ncl);
+					}
+				}
+			}
+#if !_FS_TINY
+			if ((res == FR_OK) && ((fp->flag & FA__DIRTY) != (BYTE)0U)) {
+				if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1U) != RES_OK) {
+					res = FR_DISK_ERR;
+				}
+				else {
+					fp->flag &= ~FA__DIRTY;
+				}
+			}
+#endif
+		}
+		if (res != FR_OK) {
+			fp->err = (FRESULT)res;
+		}
+	}
+
+	LEAVE_FF(fp->fs, res);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Delete a File or Directory                                            */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_unlink (
+	const TCHAR* path		/* Pointer to the file or directory path */
+)
+{
+	FRESULT res;
+	DIR dj = {0}, sdj = {0};
+	BYTE *dir;
+	DWORD dclst;
+	DEF_NAMEBUF;
+
+
+	/* Get logical drive number */
+	res = find_volume(&dj.fs, &path, 1U);
+	if (res == FR_OK) {
+		INIT_BUF(dj);
+		res = follow_path(&dj, path);		/* Follow the file path */
+		if (_FS_RPATH && (res == FR_OK) && ((dj.fn[NS] & NS_DOT) != (BYTE)0U)) {
+			res = FR_INVALID_NAME;			/* Cannot remove dot entry */
+		}
+#if _FS_LOCK
+		if (res == FR_OK) {
+			res = chk_lock(&dj, 2);	/* Cannot remove open file */
+		}
+#endif
+		if (res == FR_OK) {					/* The object is accessible */
+			dir = dj.dir;
+			if ((!dir) != 0U) {
+				res = FR_INVALID_NAME;		/* Cannot remove the start directory */
+			} else {
+				if (((*(dir+DIR_Attr)) & AM_RDO) != (BYTE)0U) {
+					res = FR_DENIED;		/* Cannot remove R/O object */
+				}
+			}
+			dclst = ld_clust(dj.fs, dir);
+			if ((res == FR_OK) && (((*(dir+DIR_Attr)) & AM_DIR) != (BYTE)0U)) {	/* Is it a sub-dir? */
+				if (dclst < 2U) {
+					res = FR_INT_ERR;
+				} else {
+					mem_cpy(&sdj, &dj, sizeof (DIR));	/* Check if the sub-directory is empty or not */
+					sdj.sclust = dclst;
+					res = dir_sdi(&sdj, 2U);		/* Exclude dot entries */
+					if (res == FR_OK) {
+						res = dir_read(&sdj, 0);	/* Read an item */
+						if (res == FR_OK		/* Not empty directory */
+#if _FS_RPATH
+						|| dclst == dj.fs->cdir	/* Current directory */
+#endif
+						) {
+							res = FR_DENIED;
+						}
+						if (res == FR_NO_FILE) {
+							res = FR_OK;	/* Empty */
+						}
+					}
+				}
+			}
+			if (res == FR_OK) {
+				res = dir_remove(&dj);		/* Remove the directory entry */
+				if (res == FR_OK) {
+					if (dclst != (DWORD)0U) {				/* Remove the cluster chain if exist */
+						res = remove_chain(dj.fs, dclst);
+					}
+					if (res == FR_OK) {
+						res = sync_fs(dj.fs);
+					}
+				}
+			}
+		}
+		FREE_BUF();
+	}
+
+	LEAVE_FF(dj.fs, res);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Create a Directory                                                    */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_mkdir (
+	const TCHAR* path		/* Pointer to the directory path */
+)
+{
+	FRESULT res;
+	DIR dj = {0};
+	BYTE *dir, n;
+	DWORD dsc, dcl, pcl, tm = get_fattime();
+	DEF_NAMEBUF;
+
+
+	/* Get logical drive number */
+	res = find_volume(&dj.fs, &path, 1U);
+	if (res == FR_OK) {
+		INIT_BUF(dj);
+		res = follow_path(&dj, path);			/* Follow the file path */
+		if (res == FR_OK) {
+			res = FR_EXIST;		/* Any object with same name is already existing */
+		}
+		if (_FS_RPATH && (res == FR_NO_FILE) && ((dj.fn[NS] & NS_DOT) != (BYTE)0U)) {
+			res = FR_INVALID_NAME;
+		}
+		if (res == FR_NO_FILE) {				/* Can create a new directory */
+			dcl = create_chain(dj.fs, 0U);		/* Allocate a cluster for the new directory table */
+			res = FR_OK;
+			if (dcl == 0U) {
+				res = FR_DENIED;		/* No space to allocate a new cluster */
+			}
+			if (dcl == 1U) {
+				res = FR_INT_ERR;
+			}
+			if (dcl == 0xFFFFFFFFU) {
+				res = FR_DISK_ERR;
+			}
+			if (res == FR_OK) {					/* Flush FAT */
+				res = sync_window(dj.fs);
+			}
+			if (res == FR_OK) {					/* Initialize the new directory table */
+				dsc = clust2sect(dj.fs, dcl);
+				dir = dj.fs->win;
+				mem_set(dir, 0, SS(dj.fs));
+				mem_set(dir, (s32)' ', 11U);	/* Create "." entry */
+				(*(dir+DIR_Name)) = ((BYTE)'.');
+				(*(dir+DIR_Attr)) = AM_DIR;
+				ST_DWORD(dir+DIR_WrtTime, tm);
+				st_clust(dir, dcl);
+				mem_cpy(dir+SZ_DIR, dir, SZ_DIR); 	/* Create ".." entry */
+				(*(dir+SZ_DIR+1U)) = ((BYTE)'.'); pcl = dj.sclust;
+				if ((dj.fs->fs_type == FS_FAT32) && (pcl == dj.fs->dirbase)) {
+					pcl = 0U;
+				}
+				st_clust(dir+SZ_DIR, pcl);
+				n = dj.fs->csize;
+				for (; n; n--) {	/* Write dot entries and clear following sectors */
+					dj.fs->winsect = dsc;
+					dsc += (DWORD)1;
+					dj.fs->wflag = 1U;
+					res = sync_window(dj.fs);
+					if (res != FR_OK) {
+						break;
+					}
+					mem_set(dir, 0, SS(dj.fs));
+				}
+			}
+			if (res == FR_OK) {
+				res = dir_register(&dj);	/* Register the object to the directoy */
+			}
+			if (res != FR_OK) {
+				(void)remove_chain(dj.fs, dcl);			/* Could not register, remove cluster chain */
+			} else {
+				dir = dj.dir;
+				(*(dir+DIR_Attr)) = AM_DIR;				/* Attribute */
+				ST_DWORD(dir+DIR_WrtTime, tm);		/* Created time */
+				st_clust(dir, dcl);					/* Table start cluster */
+				dj.fs->wflag = 1U;
+				res = sync_fs(dj.fs);
+			}
+		}
+		FREE_BUF();
+	}
+
+	LEAVE_FF(dj.fs, res);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Change Attribute                                                      */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_chmod (
+	const TCHAR* path,	/* Pointer to the file path */
+	BYTE value,			/* Attribute bits */
+	BYTE mask			/* Attribute mask to change */
+)
+{
+	FRESULT res;
+	DIR dj = {0};
+	BYTE *dir;
+	DEF_NAMEBUF;
+
+
+	/* Get logical drive number */
+	res = find_volume(&dj.fs, &path, 1U);
+	if (res == FR_OK) {
+		INIT_BUF(dj);
+		res = follow_path(&dj, path);		/* Follow the file path */
+		FREE_BUF();
+		if (_FS_RPATH && (res == FR_OK) && ((dj.fn[NS] & NS_DOT) != (BYTE)0U)) {
+			res = FR_INVALID_NAME;
+		}
+		if (res == FR_OK) {
+			dir = dj.dir;
+			if ((!dir) != 0U) {						/* Is it a root directory? */
+				res = FR_INVALID_NAME;
+			} else {						/* File or sub directory */
+				mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC;	/* Valid attribute mask */
+				(*(dir+DIR_Attr)) = (value & mask) | ((*(dir+DIR_Attr)) & (BYTE)~mask);	/* Apply attribute change */
+				dj.fs->wflag = 1U;
+				res = sync_fs(dj.fs);
+			}
+		}
+	}
+
+	LEAVE_FF(dj.fs, res);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Change Timestamp                                                      */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_utime (
+	const TCHAR* path,	/* Pointer to the file/directory name */
+	const FILINFO* fno	/* Pointer to the time stamp to be set */
+)
+{
+	FRESULT res;
+	DIR dj = {0};
+	BYTE *dir;
+	DEF_NAMEBUF;
+
+
+	/* Get logical drive number */
+	res = find_volume(&dj.fs, &path, 1U);
+	if (res == FR_OK) {
+		INIT_BUF(dj);
+		res = follow_path(&dj, path);	/* Follow the file path */
+		FREE_BUF();
+		if (_FS_RPATH && (res == FR_OK) && ((dj.fn[NS] & NS_DOT) != (BYTE)0U)) {
+			res = FR_INVALID_NAME;
+		}
+		if (res == FR_OK) {
+			dir = dj.dir;
+			if ((!dir) != 0U) {					/* Root directory */
+				res = FR_INVALID_NAME;
+			} else {					/* File or sub-directory */
+				ST_WORD(dir+DIR_WrtTime, fno->ftime);
+				ST_WORD(dir+DIR_WrtDate, fno->fdate);
+				dj.fs->wflag = 1U;
+				res = sync_fs(dj.fs);
+			}
+		}
+	}
+
+	LEAVE_FF(dj.fs, res);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Rename File/Directory                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_rename (
+	const TCHAR* path_old,	/* Pointer to the object to be renamed */
+	const TCHAR* path_new	/* Pointer to the new name */
+)
+{
+	FRESULT res;
+	DIR djo = {0}, djn = {0};
+	BYTE buf[21] = {0};
+	BYTE *dir;
+	DWORD dw;
+	DEF_NAMEBUF;
+
+
+	/* Get logical drive number of the source object */
+	res = find_volume(&djo.fs, &path_old, 1U);
+	if (res == FR_OK) {
+		djn.fs = djo.fs;
+		INIT_BUF(djo);
+		res = follow_path(&djo, path_old);		/* Check old object */
+		if (_FS_RPATH && (res == FR_OK) && ((djo.fn[NS] & NS_DOT) != (BYTE)0U)) {
+			res = FR_INVALID_NAME;
+		}
+#if _FS_LOCK
+		if (res == FR_OK) {
+			res = chk_lock(&djo, 2);
+		}
+#endif
+		if (res == FR_OK) {						/* Old object is found */
+			if (djo.dir == NULL) {						/* Is root dir? */
+				res = FR_NO_FILE;
+			} else {
+				mem_cpy(buf, djo.dir+DIR_Attr, 21U);		/* Save the object information except name */
+				mem_cpy(&djn, &djo, sizeof (DIR));		/* Duplicate the directory object */
+				if (get_ldnumber(&path_new) >= 0) {		/* Snip drive number off and ignore it */
+					res = follow_path(&djn, path_new);	/* and check if new object is exist */
+				}
+				else {
+					res = FR_INVALID_DRIVE;
+				}
+				if (res == FR_OK) {
+					res = FR_EXIST;		/* The new object name is already existing */
+				}
+				if (res == FR_NO_FILE) { 				/* Is it a valid path and no name collision? */
+/* Start critical section that any interruption can cause a cross-link */
+					res = dir_register(&djn);			/* Register the new entry */
+					if (res == FR_OK) {
+						dir = djn.dir;					/* Copy object information except name */
+						mem_cpy(dir+13, buf+2, 19U);
+						(*(dir+DIR_Attr)) = buf[0] | AM_ARC;
+						djo.fs->wflag = 1U;
+						if ((djo.sclust != djn.sclust) && (((*(dir+DIR_Attr)) & AM_DIR) != (BYTE)0U)) {		/* Update .. entry in the directory if needed */
+							dw = clust2sect(djo.fs, ld_clust(djo.fs, dir));
+							if ((!dw) != 0U) {
+								res = FR_INT_ERR;
+							} else {
+								res = move_window(djo.fs, dw);
+								dir = djo.fs->win+SZ_DIR;	/* .. entry */
+								if ((res == FR_OK) && ((*(dir+1)) == ((BYTE)'.'))) {
+									dw = ((djo.fs->fs_type == FS_FAT32) && (djn.sclust == djo.fs->dirbase)) ? ((DWORD)0) : djn.sclust;
+									st_clust(dir, dw);
+									djo.fs->wflag = 1U;
+								}
+							}
+						}
+						if (res == FR_OK) {
+							res = dir_remove(&djo);		/* Remove old entry */
+							if (res == FR_OK) {
+								res = sync_fs(djo.fs);
+							}
+						}
+					}
+/* End critical section */
+				}
+			}
+		}
+		FREE_BUF();
+	}
+
+	LEAVE_FF(djo.fs, res);
+}
+
+#endif /* !_FS_READONLY */
+#endif /* _FS_MINIMIZE == 0 */
+#endif /* _FS_MINIMIZE <= 1 */
+#endif /* _FS_MINIMIZE <= 2 */
+
+
+
+#if _USE_LABEL
+/*-----------------------------------------------------------------------*/
+/* Get volume label                                                      */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_getlabel (
+	const TCHAR* path,	/* Path name of the logical drive number */
+	TCHAR* label,		/* Pointer to a buffer to return the volume label */
+	DWORD* vsn			/* Pointer to a variable to return the volume serial number */
+)
+{
+	FRESULT res;
+	DIR dj;
+	UINT i, j;
+
+
+	/* Get logical drive number */
+	res = find_volume(&dj.fs, &path, 0);
+
+	/* Get volume label */
+	if (res == FR_OK && label) {
+		dj.sclust = 0;					/* Open root directory */
+		res = dir_sdi(&dj, 0);
+		if (res == FR_OK) {
+			res = dir_read(&dj, 1);		/* Get an entry with AM_VOL */
+			if (res == FR_OK) {			/* A volume label is exist */
+#if _USE_LFN && _LFN_UNICODE
+				WCHAR w;
+				i = j = 0;
+				do {
+					w = (i < 11) ? dj.dir[i++] : ' ';
+					if (IsDBCS1(w) && (i < 11) && IsDBCS2(dj.dir[i])) {
+						w = w << 8 | dj.dir[i++];
+					}
+					label[j++] = ff_convert(w, 1);	/* OEM -> Unicode */
+				} while (j < 11);
+#else
+				mem_cpy(label, dj.dir, 11);
+#endif
+				j = 11;
+				do {
+					label[j] = 0;
+					if ((!j) != 0U) {
+						break;
+					}
+				} while (label[--j] == ' ');
+			}
+			if (res == FR_NO_FILE) {	/* No label, return nul string */
+				label[0] = 0;
+				res = FR_OK;
+			}
+		}
+	}
+
+	/* Get volume serial number */
+	if (res == FR_OK && vsn) {
+		res = move_window(dj.fs, dj.fs->volbase);
+		if (res == FR_OK) {
+			i = dj.fs->fs_type == FS_FAT32 ? BS_VolID32 : BS_VolID;
+			*vsn = LD_DWORD(&dj.fs->win[i]);
+		}
+	}
+
+	LEAVE_FF(dj.fs, res);
+}
+
+
+
+#if !_FS_READONLY
+/*-----------------------------------------------------------------------*/
+/* Set volume label                                                      */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_setlabel (
+	const TCHAR* label	/* Pointer to the volume label to set */
+)
+{
+	FRESULT res;
+	DIR dj;
+	BYTE vn[11];
+	UINT i, j, sl;
+	WCHAR w;
+	DWORD tm;
+
+
+	/* Get logical drive number */
+	res = find_volume(&dj.fs, &label, 1);
+	if (res) {
+		LEAVE_FF(dj.fs, res);
+	}
+
+	/* Create a volume label in directory form */
+	vn[0] = 0;
+	for (sl = 0; label[sl]; sl++) ;				/* Get name length */
+	for ( ; sl && label[sl-1] == ' '; sl--) ;	/* Remove trailing spaces */
+	if (sl) {	/* Create volume label in directory form */
+		i = j = 0;
+		do {
+#if _USE_LFN && _LFN_UNICODE
+			w = ff_convert(ff_wtoupper(label[i++]), 0);
+#else
+			w = (BYTE)label[i++];
+			if (IsDBCS1(w)) {
+				w = ((j < 10) && (i < sl) && IsDBCS2(label[i])) ? w << 8 | (BYTE)label[i++] : 0;
+			}
+#if _USE_LFN
+			w = ff_convert(ff_wtoupper(ff_convert(w, 1)), 0);
+#else
+			if (IsLower(w)) {
+				w -= 0x20;			/* To upper ASCII characters */
+			}
+#ifdef _EXCVT
+			if (w >= 0x80) {
+				w = ExCvt[w - 0x80];	/* To upper extended characters (SBCS cfg) */
+			}
+#else
+			if (((!DF1S) != 0U) && ((w >= 0x80) != 0U)) {
+				w = 0;		/* Reject extended characters (ASCII cfg) */
+			}
+#endif
+#endif
+#endif
+			if ((!w) || chk_chr("\"*+,.:;<=>\?[]|\x7F", w) || j >= (UINT)((w >= 0x100) ? 10 : 11)) {/* Reject invalid characters for volume label */
+				LEAVE_FF(dj.fs, FR_INVALID_NAME);
+			}
+			if (w >= 0x100) {
+				vn[j++] = (BYTE)(w >> 8);
+			}
+			vn[j++] = (BYTE)w;
+		} while (i < sl);
+		while (j < 11) vn[j++] = ' ';
+	}
+
+	/* Set volume label */
+	dj.sclust = 0;					/* Open root directory */
+	res = dir_sdi(&dj, 0);
+	if (res == FR_OK) {
+		res = dir_read(&dj, 1);		/* Get an entry with AM_VOL */
+		if (res == FR_OK) {			/* A volume label is found */
+			if (vn[0]) {
+				mem_cpy(dj.dir, vn, 11);	/* Change the volume label name */
+				tm = get_fattime();
+				ST_DWORD(dj.dir+DIR_WrtTime, tm);
+			} else {
+				dj.dir[0] = DDE;			/* Remove the volume label */
+			}
+			dj.fs->wflag = 1;
+			res = sync_fs(dj.fs);
+		} else {					/* No volume label is found or error */
+			if (res == FR_NO_FILE) {
+				res = FR_OK;
+				if (vn[0]) {				/* Create volume label as new */
+					res = dir_alloc(&dj, 1);	/* Allocate an entry for volume label */
+					if (res == FR_OK) {
+						mem_set(dj.dir, 0, SZ_DIR);	/* Set volume label */
+						mem_cpy(dj.dir, vn, 11);
+						dj.dir[DIR_Attr] = AM_VOL;
+						tm = get_fattime();
+						ST_DWORD(dj.dir+DIR_WrtTime, tm);
+						dj.fs->wflag = 1;
+						res = sync_fs(dj.fs);
+					}
+				}
+			}
+		}
+	}
+
+	LEAVE_FF(dj.fs, res);
+}
+
+#endif /* !_FS_READONLY */
+#endif /* _USE_LABEL */
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Forward data to the stream directly (available on only tiny cfg)      */
+/*-----------------------------------------------------------------------*/
+#if _USE_FORWARD && _FS_TINY
+
+FRESULT f_forward (
+	FIL* fp, 						/* Pointer to the file object */
+	UINT (*func)(const BYTE*,UINT),	/* Pointer to the streaming function */
+	UINT btf,						/* Number of bytes to forward */
+	UINT* bf						/* Pointer to number of bytes forwarded */
+)
+{
+	FRESULT res;
+	DWORD remain, clst, sect;
+	UINT rcnt;
+	BYTE csect;
+
+
+	*bf = 0;	/* Clear transfer byte counter */
+
+	res = validate(fp);								/* Check validity of the object */
+	if (res != FR_OK) {
+		LEAVE_FF(fp->fs, res);
+	}
+	if (fp->err) {									/* Check error */
+		LEAVE_FF(fp->fs, (FRESULT)fp->err);
+	}
+	if ((!(fp->flag & FA_READ)) != 0U) {						/* Check access mode */
+		LEAVE_FF(fp->fs, FR_DENIED);
+	}
+
+	remain = fp->fsize - fp->fptr;
+	if (btf > remain) {
+		btf = (UINT)remain;			/* Truncate btf by remaining bytes */
+	}
+
+	for ( ;  btf && (*func)(0, 0);					/* Repeat until all data transferred or stream becomes busy */
+		fp->fptr += rcnt, *bf += rcnt, btf -= rcnt) {
+		csect = (BYTE)(fp->fptr / SS(fp->fs) & (fp->fs->csize - 1));	/* Sector offset in the cluster */
+		if ((fp->fptr % SS(fp->fs)) == 0) {			/* On the sector boundary? */
+			if (!csect) {							/* On the cluster boundary? */
+				clst = (fp->fptr == 0) ?			/* On the top of the file? */
+					fp->sclust : get_fat(fp->fs, fp->clust);
+				if (clst <= 1) {
+					ABORT(fp->fs, FR_INT_ERR);
+				}
+				if (clst == 0xFFFFFFFF) {
+					ABORT(fp->fs, FR_DISK_ERR);
+				}
+				fp->clust = clst;					/* Update current cluster */
+			}
+		}
+		sect = clust2sect(fp->fs, fp->clust);		/* Get current data sector */
+		if ((!sect) != 0U) {
+			ABORT(fp->fs, FR_INT_ERR);
+		}
+		sect += csect;
+		if (move_window(fp->fs, sect)) {				/* Move sector window */
+			ABORT(fp->fs, FR_DISK_ERR);
+		}
+		fp->dsect = sect;
+		rcnt = SS(fp->fs) - (WORD)(fp->fptr % SS(fp->fs));	/* Forward data from sector window */
+		if (rcnt > btf) {
+			rcnt = btf;
+		}
+		rcnt = (*func)(&fp->fs->win[(WORD)fp->fptr % SS(fp->fs)], rcnt);
+		if ((!rcnt) != 0U) {
+			ABORT(fp->fs, FR_INT_ERR);
+		}
+	}
+
+	LEAVE_FF(fp->fs, FR_OK);
+}
+#endif /* _USE_FORWARD */
+
+
+
+#if _USE_MKFS && !_FS_READONLY
+/*-----------------------------------------------------------------------*/
+/* Create File System on the Drive                                       */
+/*-----------------------------------------------------------------------*/
+#define N_ROOTDIR	512		/* Number of root directory entries for FAT12/16 */
+#define N_FATS		1		/* Number of FAT copies (1 or 2) */
+
+
+FRESULT f_mkfs (
+	const TCHAR* path,	/* Logical drive number */
+	BYTE sfd,			/* Partitioning rule 0:FDISK, 1:SFD */
+	UINT au				/* Allocation unit [bytes] */
+)
+{
+	static const WORD vst[] = { 1024,   512,  256,  128,   64,    32,   16,    8,    4,    2,   0};
+	static const WORD cst[] = {32768, 16384, 8192, 4096, 2048, 16384, 8192, 4096, 2048, 1024, 512};
+	int vol;
+	BYTE fmt, md, sys, *tbl, pdrv, part;
+	DWORD n_clst, vs, n, wsect;
+	UINT i;
+	DWORD b_vol, b_fat, b_dir, b_data;	/* LBA */
+	DWORD n_vol, n_rsv, n_fat, n_dir;	/* Size */
+	FATFS *fs;
+	DSTATUS stat;
+
+
+	/* Check mounted drive and clear work area */
+	vol = get_ldnumber(&path);
+	if (vol < 0) {
+		return FR_INVALID_DRIVE;
+	}
+	if (sfd > 1) {
+		return FR_INVALID_PARAMETER;
+	}
+	if (au & (au - 1)) {
+		return FR_INVALID_PARAMETER;
+	}
+	fs = FatFs[vol];
+	if ((!fs) != 0U) {
+		return FR_NOT_ENABLED;
+	}
+	fs->fs_type = 0;
+	pdrv = LD2PD(vol);	/* Physical drive */
+	part = LD2PT(vol);	/* Partition (0:auto detect, 1-4:get from partition table)*/
+
+	/* Get disk statics */
+	stat = disk_initialize(pdrv);
+	if (stat & STA_NOINIT) {
+		return FR_NOT_READY;
+	}
+	if (stat & STA_PROTECT) {
+		return FR_WRITE_PROTECTED;
+	}
+#if _MAX_SS != _MIN_SS		/* Get disk sector size */
+	if (disk_ioctl(pdrv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || (SS(fs) > _MAX_SS) || (SS(fs) < _MIN_SS)) {
+		return FR_DISK_ERR;
+	}
+#endif
+	if (_MULTI_PARTITION && part) {
+		/* Get partition information from partition table in the MBR */
+		if (disk_read(pdrv, fs->win, 0, 1) != RES_OK) {
+			return FR_DISK_ERR;
+		}
+		if (LD_WORD(fs->win+BS_55AA) != 0xAA55) {
+			return FR_MKFS_ABORTED;
+		}
+		tbl = &fs->win[MBR_Table + (part - 1) * SZ_PTE];
+		if ((!tbl[4]) != 0U) {
+			return FR_MKFS_ABORTED;	/* No partition? */
+		}
+		b_vol = LD_DWORD(tbl+8);	/* Volume start sector */
+		n_vol = LD_DWORD(tbl+12);	/* Volume size */
+	} else {
+		/* Create a partition in this function */
+		if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &n_vol) != RES_OK || (n_vol < 128)) {
+			return FR_DISK_ERR;
+		}
+		b_vol = (sfd) ? 0 : 63;		/* Volume start sector */
+		n_vol -= b_vol;				/* Volume size */
+	}
+
+	if ((!au) != 0U) {				/* AU auto selection */
+		vs = n_vol / (2000 / (SS(fs) / 512));
+		for (i = 0; vs < vst[i]; i++) ;
+		au = cst[i];
+	}
+	au /= SS(fs);		/* Number of sectors per cluster */
+	if (au == 0) {
+		au = 1;
+	}
+	if (au > 128) {
+		au = 128;
+	}
+
+	/* Pre-compute number of clusters and FAT sub-type */
+	n_clst = n_vol / au;
+	fmt = FS_FAT12;
+	if (n_clst >= MIN_FAT16) {
+		fmt = FS_FAT16;
+	}
+	if (n_clst >= MIN_FAT32) {
+		fmt = FS_FAT32;
+	}
+
+	/* Determine offset and size of FAT structure */
+	if (fmt == FS_FAT32) {
+		n_fat = ((n_clst * 4) + 8 + SS(fs) - 1) / SS(fs);
+		n_rsv = 32;
+		n_dir = 0;
+	} else {
+		n_fat = (fmt == FS_FAT12) ? (n_clst * 3 + 1) / 2 + 3 : (n_clst * 2) + 4;
+		n_fat = (n_fat + SS(fs) - 1) / SS(fs);
+		n_rsv = 1;
+		n_dir = (DWORD)N_ROOTDIR * SZ_DIR / SS(fs);
+	}
+	b_fat = b_vol + n_rsv;				/* FAT area start sector */
+	b_dir = b_fat + n_fat * N_FATS;		/* Directory area start sector */
+	b_data = b_dir + n_dir;				/* Data area start sector */
+	if (n_vol < b_data + au - b_vol) {
+		return FR_MKFS_ABORTED;	/* Too small volume */
+	}
+
+	/* Align data start sector to erase block boundary (for flash memory media) */
+	if (disk_ioctl(pdrv, GET_BLOCK_SIZE, &n) != RES_OK || (!n) || (n > 32768)) {
+		n = 1;
+	}
+	n = (b_data + n - 1) & ~(n - 1);	/* Next nearest erase block from current data start */
+	n = (n - b_data) / N_FATS;
+	if (fmt == FS_FAT32) {		/* FAT32: Move FAT offset */
+		n_rsv += n;
+		b_fat += n;
+	} else {					/* FAT12/16: Expand FAT size */
+		n_fat += n;
+	}
+
+	/* Determine number of clusters and final check of validity of the FAT sub-type */
+	n_clst = (n_vol - n_rsv - n_fat * N_FATS - n_dir) / au;
+	if (   (fmt == FS_FAT16 && n_clst < MIN_FAT16)
+		|| (fmt == FS_FAT32 && n_clst < MIN_FAT32)) {
+		return FR_MKFS_ABORTED;
+	}
+
+	/* Determine system ID in the partition table */
+	if (fmt == FS_FAT32) {
+		sys = 0x0C;		/* FAT32X */
+	} else {
+		if (fmt == FS_FAT12 && n_vol < 0x10000) {
+			sys = 0x01;	/* FAT12(<65536) */
+		} else {
+			sys = (n_vol < 0x10000) ? 0x04 : 0x06;	/* FAT16(<65536) : FAT12/16(>=65536) */
+		}
+	}
+
+	if (_MULTI_PARTITION && part) {
+		/* Update system ID in the partition table */
+		tbl = &fs->win[MBR_Table + (part - 1) * SZ_PTE];
+		tbl[4] = sys;
+		if (disk_write(pdrv, fs->win, 0, 1) != 0U) {	/* Write it to teh MBR */
+			return FR_DISK_ERR;
+		}
+		md = 0xF8;
+	} else {
+		if (sfd) {	/* No partition table (SFD) */
+			md = 0xF0;
+		} else {	/* Create partition table (FDISK) */
+			mem_set(fs->win, 0, SS(fs));
+			tbl = fs->win+MBR_Table;	/* Create partition table for single partition in the drive */
+			tbl[1] = 1;						/* Partition start head */
+			tbl[2] = 1;						/* Partition start sector */
+			tbl[3] = 0;						/* Partition start cylinder */
+			tbl[4] = sys;					/* System type */
+			tbl[5] = 254;					/* Partition end head */
+			n = (b_vol + n_vol) / 63 / 255;
+			tbl[6] = (BYTE)(n >> 2 | 63);	/* Partition end sector */
+			tbl[7] = (BYTE)n;				/* End cylinder */
+			ST_DWORD(tbl+8, 63);			/* Partition start in LBA */
+			ST_DWORD(tbl+12, n_vol);		/* Partition size in LBA */
+			ST_WORD(fs->win+BS_55AA, 0xAA55);	/* MBR signature */
+			if (disk_write(pdrv, fs->win, 0, 1) != RES_OK) {	/* Write it to the MBR */
+				return FR_DISK_ERR;
+			}
+			md = 0xF8;
+		}
+	}
+
+	/* Create BPB in the VBR */
+	tbl = fs->win;							/* Clear sector */
+	mem_set(tbl, 0, SS(fs));
+	mem_cpy(tbl, "\xEB\xFE\x90" "MSDOS5.0", 11);/* Boot jump code, OEM name */
+	i = SS(fs);								/* Sector size */
+	ST_WORD(tbl+BPB_BytsPerSec, i);
+	tbl[BPB_SecPerClus] = (BYTE)au;			/* Sectors per cluster */
+	ST_WORD(tbl+BPB_RsvdSecCnt, n_rsv);		/* Reserved sectors */
+	tbl[BPB_NumFATs] = N_FATS;				/* Number of FATs */
+	i = (fmt == FS_FAT32) ? 0 : N_ROOTDIR;	/* Number of root directory entries */
+	ST_WORD(tbl+BPB_RootEntCnt, i);
+	if (n_vol < 0x10000) {					/* Number of total sectors */
+		ST_WORD(tbl+BPB_TotSec16, n_vol);
+	} else {
+		ST_DWORD(tbl+BPB_TotSec32, n_vol);
+	}
+	tbl[BPB_Media] = md;					/* Media descriptor */
+	ST_WORD(tbl+BPB_SecPerTrk, 63);			/* Number of sectors per track */
+	ST_WORD(tbl+BPB_NumHeads, 255);			/* Number of heads */
+	ST_DWORD(tbl+BPB_HiddSec, b_vol);		/* Hidden sectors */
+	n = get_fattime();						/* Use current time as VSN */
+	if (fmt == FS_FAT32) {
+		ST_DWORD(tbl+BS_VolID32, n);		/* VSN */
+		ST_DWORD(tbl+BPB_FATSz32, n_fat);	/* Number of sectors per FAT */
+		ST_DWORD(tbl+BPB_RootClus, 2);		/* Root directory start cluster (2) */
+		ST_WORD(tbl+BPB_FSInfo, 1);			/* FSINFO record offset (VBR+1) */
+		ST_WORD(tbl+BPB_BkBootSec, 6);		/* Backup boot record offset (VBR+6) */
+		tbl[BS_DrvNum32] = 0x80;			/* Drive number */
+		tbl[BS_BootSig32] = 0x29;			/* Extended boot signature */
+		mem_cpy(tbl+BS_VolLab32, "NO NAME    " "FAT32   ", 19);	/* Volume label, FAT signature */
+	} else {
+		ST_DWORD(tbl+BS_VolID, n);			/* VSN */
+		ST_WORD(tbl+BPB_FATSz16, n_fat);	/* Number of sectors per FAT */
+		tbl[BS_DrvNum] = 0x80;				/* Drive number */
+		tbl[BS_BootSig] = 0x29;				/* Extended boot signature */
+		mem_cpy(tbl+BS_VolLab, "NO NAME    " "FAT     ", 19);	/* Volume label, FAT signature */
+	}
+	ST_WORD(tbl+BS_55AA, 0xAA55);			/* Signature (Offset is fixed here regardless of sector size) */
+	if (disk_write(pdrv, tbl, b_vol, 1) != RES_OK) {	/* Write it to the VBR sector */
+		return FR_DISK_ERR;
+	}
+	if (fmt == FS_FAT32) {					/* Write backup VBR if needed (VBR+6) */
+		disk_write(pdrv, tbl, b_vol + 6, 1);
+	}
+
+	/* Initialize FAT area */
+	wsect = b_fat;
+	for (i = 0; i < N_FATS; i++) {		/* Initialize each FAT copy */
+		mem_set(tbl, 0, SS(fs));			/* 1st sector of the FAT  */
+		n = md;								/* Media descriptor byte */
+		if (fmt != FS_FAT32) {
+			n |= (fmt == FS_FAT12) ? 0x00FFFF00 : 0xFFFFFF00;
+			ST_DWORD(tbl+0, n);				/* Reserve cluster #0-1 (FAT12/16) */
+		} else {
+			n |= 0xFFFFFF00;
+			ST_DWORD(tbl+0, n);				/* Reserve cluster #0-1 (FAT32) */
+			ST_DWORD(tbl+4, 0xFFFFFFFF);
+			ST_DWORD(tbl+8, 0x0FFFFFFF);	/* Reserve cluster #2 for root directory */
+		}
+		if (disk_write(pdrv, tbl, wsect++, 1) != RES_OK) {
+			return FR_DISK_ERR;
+		}
+		mem_set(tbl, 0, SS(fs));			/* Fill following FAT entries with zero */
+		for (n = 1; n < n_fat; n++) {		/* This loop may take a time on FAT32 volume due to many single sector writes */
+			if (disk_write(pdrv, tbl, wsect++, 1) != RES_OK) {
+				return FR_DISK_ERR;
+			}
+		}
+	}
+
+	/* Initialize root directory */
+	i = (fmt == FS_FAT32) ? au : (UINT)n_dir;
+	do {
+		if (disk_write(pdrv, tbl, wsect++, 1) != RES_OK) {
+			return FR_DISK_ERR;
+		}
+	} while (--i);
+
+#if _USE_ERASE	/* Erase data area if needed */
+	{
+		DWORD eb[2];
+
+		eb[0] = wsect; eb[1] = wsect + (n_clst - ((fmt == FS_FAT32) ? 1 : 0)) * au - 1;
+		disk_ioctl(pdrv, CTRL_ERASE_SECTOR, eb);
+	}
+#endif
+
+	/* Create FSINFO if needed */
+	if (fmt == FS_FAT32) {
+		ST_DWORD(tbl+FSI_LeadSig, 0x41615252);
+		ST_DWORD(tbl+FSI_StrucSig, 0x61417272);
+		ST_DWORD(tbl+FSI_Free_Count, n_clst - 1);	/* Number of free clusters */
+		ST_DWORD(tbl+FSI_Nxt_Free, 2);				/* Last allocated cluster# */
+		ST_WORD(tbl+BS_55AA, 0xAA55);
+		disk_write(pdrv, tbl, b_vol + 1, 1);	/* Write original (VBR+1) */
+		disk_write(pdrv, tbl, b_vol + 7, 1);	/* Write backup (VBR+7) */
+	}
+
+	return (disk_ioctl(pdrv, CTRL_SYNC, (void *)0) == RES_OK) ? FR_OK : FR_DISK_ERR;
+}
+
+
+
+#if _MULTI_PARTITION
+/*-----------------------------------------------------------------------*/
+/* Divide Physical Drive                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_fdisk (
+	BYTE pdrv,			/* Physical drive number */
+	const DWORD szt[],	/* Pointer to the size table for each partitions */
+	void* work			/* Pointer to the working buffer */
+)
+{
+	UINT i, n, sz_cyl, tot_cyl, b_cyl, e_cyl, p_cyl;
+	BYTE s_hd, e_hd, *p, *buf = (BYTE*)work;
+	DSTATUS stat;
+	DWORD sz_disk, sz_part, s_part;
+
+
+	stat = disk_initialize(pdrv);
+	if (stat & STA_NOINIT) {
+		return FR_NOT_READY;
+	}
+	if (stat & STA_PROTECT) {
+		return FR_WRITE_PROTECTED;
+	}
+	if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &sz_disk)) {
+		return FR_DISK_ERR;
+	}
+
+	/* Determine CHS in the table regardless of the drive geometry */
+	for (n = 16; n < 256 && sz_disk / n / 63 > 1024; n *= 2) ;
+	if (n == 256) {
+		n--;
+	}
+	e_hd = n - 1;
+	sz_cyl = 63 * n;
+	tot_cyl = sz_disk / sz_cyl;
+
+	/* Create partition table */
+	mem_set(buf, 0, _MAX_SS);
+	p = buf + MBR_Table; b_cyl = 0;
+	for (i = 0; i < 4; i++, p += SZ_PTE) {
+		p_cyl = (szt[i] <= 100U) ? (DWORD)tot_cyl * szt[i] / 100 : szt[i] / sz_cyl;
+		if (!p_cyl) continue;
+		s_part = (DWORD)sz_cyl * b_cyl;
+		sz_part = (DWORD)sz_cyl * p_cyl;
+		if (i == 0) {	/* Exclude first track of cylinder 0 */
+			s_hd = 1;
+			s_part += 63; sz_part -= 63;
+		} else {
+			s_hd = 0;
+		}
+		e_cyl = b_cyl + p_cyl - 1;
+		if (e_cyl >= tot_cyl) {
+			return FR_INVALID_PARAMETER;
+		}
+
+		/* Set partition table */
+		p[1] = s_hd;						/* Start head */
+		p[2] = (BYTE)((b_cyl >> 2) + 1);	/* Start sector */
+		p[3] = (BYTE)b_cyl;					/* Start cylinder */
+		p[4] = 0x06;						/* System type (temporary setting) */
+		p[5] = e_hd;						/* End head */
+		p[6] = (BYTE)((e_cyl >> 2) + 63);	/* End sector */
+		p[7] = (BYTE)e_cyl;					/* End cylinder */
+		ST_DWORD(p + 8, s_part);			/* Start sector in LBA */
+		ST_DWORD(p + 12, sz_part);			/* Partition size */
+
+		/* Next partition */
+		b_cyl += p_cyl;
+	}
+	ST_WORD(p, 0xAA55);
+
+	/* Write it to the MBR */
+	return (disk_write(pdrv, buf, 0, 1) || disk_ioctl(pdrv, CTRL_SYNC, 0)) ? FR_DISK_ERR : FR_OK;
+}
+
+
+#endif /* _MULTI_PARTITION */
+#endif /* _USE_MKFS && !_FS_READONLY */
+
+
+
+
+#if _USE_STRFUNC
+/*-----------------------------------------------------------------------*/
+/* Get a string from the file                                            */
+/*-----------------------------------------------------------------------*/
+
+TCHAR* f_gets (
+	TCHAR* buff,	/* Pointer to the string buffer to read */
+	s32 len,		/* Size of string buffer (characters) */
+	FIL* fp			/* Pointer to the file object */
+)
+{
+	s32 n = 0;
+	TCHAR c, *p = buff;
+	BYTE s[2];
+	UINT rc;
+
+
+	while (n < len - 1) {	/* Read characters until buffer gets filled */
+#if _USE_LFN && _LFN_UNICODE
+#if _STRF_ENCODE == 3		/* Read a character in UTF-8 */
+		f_read(fp, s, 1, &rc);
+		if (rc != 1) {
+			break;
+		}
+		c = s[0];
+		if (c >= 0x80) {
+			if (c < 0xC0) {
+				continue;	/* Skip stray trailer */
+			}
+			if (c < 0xE0) {			/* Two-byte sequence */
+				f_read(fp, s, 1, &rc);
+				if (rc != 1) {
+					break;
+				}
+				c = ((c & 0x1F) << 6 )| (s[0] & 0x3F);
+				if (c < 0x80) {
+					c = '?';
+				}
+			} else {
+				if (c < 0xF0) {		/* Three-byte sequence */
+					f_read(fp, s, 2, &rc);
+					if (rc != 2) {
+						break;
+					}
+					c = (c << 12) | ((s[0] & 0x3F) << 6) | (s[1] & 0x3F);
+					if (c < 0x800) {
+						c = '?';
+					}
+				} else {			/* Reject four-byte sequence */
+					c = '?';
+				}
+			}
+		}
+#elif _STRF_ENCODE == 2		/* Read a character in UTF-16BE */
+		f_read(fp, s, 2, &rc);
+		if (rc != 2) {
+			break;
+		}
+		c = s[1] + (s[0] << 8);
+#elif _STRF_ENCODE == 1		/* Read a character in UTF-16LE */
+		f_read(fp, s, 2, &rc);
+		if (rc != 2) {
+			break;
+		}
+		c = s[0] + (s[1] << 8);
+#else						/* Read a character in ANSI/OEM */
+		f_read(fp, s, 1, &rc);
+		if (rc != 1) {
+			break;
+		}
+		c = s[0];
+		if (IsDBCS1(c)) {
+			f_read(fp, s, 1, &rc);
+			if (rc != 1) break;
+			c = (c << 8) + s[0];
+		}
+		c = ff_convert(c, 1);	/* OEM -> Unicode */
+		if ((!c) != 0U) {
+			c = '?';
+		}
+#endif
+#else						/* Read a character without conversion */
+		f_read(fp, s, 1, &rc);
+		if (rc != 1) {
+			break;
+		}
+		c = s[0];
+#endif
+		if ((_USE_STRFUNC == 2) && (c == '\r')){
+			 continue;	/* Strip '\r' */
+		}
+		*p++ = c;
+		n++;
+		if (c == '\n') {
+			break;		/* Break on EOL */
+		}
+	}
+	*p = 0;
+	return n ? buff : 0;			/* When no data read (eof or error), return with error. */
+}
+
+
+
+#if !_FS_READONLY
+#include 
+/*-----------------------------------------------------------------------*/
+/* Put a character to the file                                           */
+/*-----------------------------------------------------------------------*/
+
+typedef struct {
+	FIL* fp;
+	s32 idx, nchr;
+	BYTE buf[64];
+} putbuff;
+
+
+static
+void putc_bfd (
+	putbuff* pb,
+	TCHAR c
+)
+{
+	UINT bw;
+	s32 i;
+
+
+	if ((_USE_STRFUNC == 2) && (c == '\n')) {	 /* LF -> CRLF conversion */
+		putc_bfd(pb, '\r');
+	}
+
+	i = pb->idx;	/* Buffer write index (-1:error) */
+	if (i < 0) {
+		return;
+	}
+
+#if _USE_LFN && _LFN_UNICODE
+#if _STRF_ENCODE == 3			/* Write a character in UTF-8 */
+	if (c < 0x80) {				/* 7-bit */
+		pb->buf[i++] = (BYTE)c;
+	} else {
+		if (c < 0x800) {		/* 11-bit */
+			pb->buf[i++] = (BYTE)(0xC0 | c >> 6);
+		} else {				/* 16-bit */
+			pb->buf[i++] = (BYTE)(0xE0 | c >> 12);
+			pb->buf[i++] = (BYTE)(0x80 | (c >> 6 & 0x3F));
+		}
+		pb->buf[i++] = (BYTE)(0x80 | (c & 0x3F));
+	}
+#elif _STRF_ENCODE == 2			/* Write a character in UTF-16BE */
+	pb->buf[i++] = (BYTE)(c >> 8);
+	pb->buf[i++] = (BYTE)c;
+#elif _STRF_ENCODE == 1			/* Write a character in UTF-16LE */
+	pb->buf[i++] = (BYTE)c;
+	pb->buf[i++] = (BYTE)(c >> 8);
+#else							/* Write a character in ANSI/OEM */
+	c = ff_convert(c, 0);	/* Unicode -> OEM */
+	if ((!c) != 0U) {
+		c = '?';
+	}
+	if (c >= 0x100) {
+		pb->buf[i++] = (BYTE)(c >> 8);
+	}
+	pb->buf[i++] = (BYTE)c;
+#endif
+#else							/* Write a character without conversion */
+	pb->buf[i++] = (BYTE)c;
+#endif
+
+	if (i >= (int)(sizeof pb->buf) - 3) {	/* Write buffered characters to the file */
+		f_write(pb->fp, pb->buf, (UINT)i, &bw);
+		i = (bw == (UINT)i) ? 0 : -1;
+	}
+	pb->idx = i;
+	pb->nchr++;
+}
+
+
+
+int f_putc (
+	TCHAR c,	/* A character to be output */
+	FIL* fp		/* Pointer to the file object */
+)
+{
+	putbuff pb;
+	UINT nw;
+
+
+	pb.fp = fp;			/* Initialize output buffer */
+	pb.nchr = pb.idx = 0;
+
+	putc_bfd(&pb, c);	/* Put a character */
+
+	if (   pb.idx >= 0	/* Flush buffered characters to the file */
+		&& f_write(pb.fp, pb.buf, (UINT)pb.idx, &nw) == FR_OK
+		&& (UINT)pb.idx == nw) {
+			return pb.nchr;
+	}
+	return EOF;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Put a string to the file                                              */
+/*-----------------------------------------------------------------------*/
+
+int f_puts (
+	const TCHAR* str,	/* Pointer to the string to be output */
+	FIL* fp				/* Pointer to the file object */
+)
+{
+	putbuff pb;
+	UINT nw;
+
+
+	pb.fp = fp;				/* Initialize output buffer */
+	pb.nchr = pb.idx = 0;
+
+	while (*str) {			/* Put the string */
+		putc_bfd(&pb, *str++);
+	}
+
+	if (   pb.idx >= 0		/* Flush buffered characters to the file */
+		&& f_write(pb.fp, pb.buf, (UINT)pb.idx, &nw) == FR_OK
+		&& (UINT)pb.idx == nw) {
+			return pb.nchr;
+	}
+	return EOF;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Put a formatted string to the file                                    */
+/*-----------------------------------------------------------------------*/
+
+int f_printf (
+	FIL* fp,			/* Pointer to the file object */
+	const TCHAR* fmt,	/* Pointer to the format string */
+	...					/* Optional arguments... */
+)
+{
+	va_list arp;
+	BYTE f, r;
+	UINT nw, i, j, w;
+	DWORD v;
+	TCHAR c, d, s[16], *p;
+	putbuff pb;
+
+
+	pb.fp = fp;				/* Initialize output buffer */
+	pb.nchr = pb.idx = 0;
+
+	va_start(arp, fmt);
+
+	for (;;) {
+		c = *fmt++;
+		if (c == 0) {
+			break;			/* End of string */
+		}
+		if (c != '%') {				/* Non escape character */
+			putc_bfd(&pb, c);
+			continue;
+		}
+		w = f = 0;
+		c = *fmt++;
+		if (c == '0') {				/* Flag: '0' padding */
+			f = 1; c = *fmt++;
+		} else {
+			if (c == '-') {			/* Flag: left justified */
+				f = 2; c = *fmt++;
+			}
+		}
+		while (IsDigit(c)) {		/* Precision */
+			w = w * 10 + c - '0';
+			c = *fmt++;
+		}
+		if ((c == 'l') || (c == 'L')) {	/* Prefix: Size is long int */
+			f |= 4; c = *fmt++;
+		}
+		if ((!c) != 0U) {
+			break;
+		}
+		d = c;
+		if (IsLower(d)) {
+			d -= 0x20;
+		}
+		switch (d) {				/* Type is... */
+		case 'S' :					/* String */
+			p = va_arg(arp, TCHAR*);
+			for (j = 0; p[j]; j++) ;
+			if (!(f & 2)) {
+				while (j++ < w) putc_bfd(&pb, ' ');
+			}
+			while (*p) {
+				putc_bfd(&pb, *p++);
+			}
+			while (j++ < w) {
+				putc_bfd(&pb, ' ');
+			}
+			continue;
+		case 'C' :					/* Character */
+			putc_bfd(&pb, (TCHAR)va_arg(arp, int)); continue;
+		case 'B' :					/* Binary */
+			r = 2; break;
+		case 'O' :					/* Octal */
+			r = 8; break;
+		case 'D' :					/* Signed decimal */
+		case 'U' :					/* Unsigned decimal */
+			r = 10; break;
+		case 'X' :					/* Hexdecimal */
+			r = 16; break;
+		default:					/* Unknown type (pass-through) */
+			putc_bfd(&pb, c); continue;
+		}
+
+		/* Get an argument and put it in numeral */
+		v = (f & 4) ? (DWORD)va_arg(arp, long) : ((d == 'D') ? (DWORD)(long)va_arg(arp, int) : (DWORD)va_arg(arp, unsigned int));
+		if (d == 'D' && (v & 0x80000000)) {
+			v = 0 - v;
+			f |= 8;
+		}
+		i = 0;
+		do {
+			d = (TCHAR)(v % r); v /= r;
+			if (d > 9) {
+				d += (c == 'x') ? 0x27 : 0x07;
+			}
+			s[i++] = d + '0';
+		} while (v && i < sizeof s / sizeof s[0]);
+		if (f & 8) {
+			s[i++] = '-';
+		}
+		j = i; d = (f & 1) ? '0' : ' ';
+		while (((!(f & 2)) != 0U) && ((j++ < w) != 0U)) {
+			putc_bfd(&pb, d);
+		}
+		do putc_bfd(&pb, s[--i]); while (i);
+		while (j++ < w) {
+			putc_bfd(&pb, d);
+		}
+	}
+
+	va_end(arp);
+
+	if (   pb.idx >= 0		/* Flush buffered characters to the file */
+		&& f_write(pb.fp, pb.buf, (UINT)pb.idx, &nw) == FR_OK
+		&& (UINT)pb.idx == nw) {
+			return pb.nchr;
+	}
+	return EOF;
+}
+
+#endif /* !_FS_READONLY */
+#endif /* _USE_STRFUNC */
+
+#endif /* (defined FILE_SYSTEM_INTERFACE_SD) || (defined FILE_SYSTEM_INTERFACE_RAM) */
diff --git a/src/Xilinx/libsrc/xilffs_v3_8/src/include/diskio.h b/src/Xilinx/libsrc/xilffs_v3_8/src/include/diskio.h
new file mode 100644
index 0000000..e8cb253
--- /dev/null
+++ b/src/Xilinx/libsrc/xilffs_v3_8/src/include/diskio.h
@@ -0,0 +1,79 @@
+/*-----------------------------------------------------------------------/
+/  Low level disk interface modlue include file   (C)ChaN, 2014          /
+/-----------------------------------------------------------------------*/
+
+#ifndef DISKIO_DEFINED
+#define DISKIO_DEFINED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define USE_WRITE	1	/* 1: Enable disk_write function */
+#define USE_IOCTL	1	/* 1: Enable disk_ioctl fucntion */
+
+#include "integer.h"
+#include "xil_types.h"
+
+/* Status of Disk Functions */
+typedef BYTE	DSTATUS;
+
+/* Results of Disk Functions */
+typedef enum {
+	RES_OK = 0,		/* 0: Successful */
+	RES_ERROR,		/* 1: R/W Error */
+	RES_WRPRT,		/* 2: Write Protected */
+	RES_NOTRDY,		/* 3: Not Ready */
+	RES_PARERR		/* 4: Invalid Parameter */
+} DRESULT;
+
+
+/*---------------------------------------*/
+/* Prototypes for disk control functions */
+
+DSTATUS disk_initialize (BYTE pdrv);
+DSTATUS disk_status (BYTE pdrv);
+DRESULT disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count);
+DRESULT disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count);
+DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff);
+
+
+/* Disk Status Bits (DSTATUS) */
+
+#define STA_NOINIT		0x01U	/* Drive not initialized */
+#define STA_NODISK		0x02U	/* No medium in the drive */
+#define STA_PROTECT		0x04U	/* Write protected */
+
+
+/* Command code for disk_ioctrl fucntion */
+
+/* Generic command (used by FatFs) */
+#define CTRL_SYNC			0U	/* Flush disk cache (for write functions) */
+#define GET_SECTOR_COUNT	1U	/* Get media size (for only f_mkfs()) */
+#define GET_SECTOR_SIZE		2U	/* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
+#define GET_BLOCK_SIZE		3U	/* Get erase block size (for only f_mkfs()) */
+#define CTRL_ERASE_SECTOR	4U	/* Force erased a block of sectors (for only _USE_ERASE) */
+
+/* Generic command (not used by FatFs) */
+#define CTRL_POWER			5U	/* Get/Set power status */
+#define CTRL_LOCK			6U	/* Lock/Unlock media removal */
+#define CTRL_EJECT			7U	/* Eject media */
+#define CTRL_FORMAT			8U	/* Create physical format on the media */
+
+/* MMC/SDC specific ioctl command */
+#define MMC_GET_TYPE		10U	/* Get card type */
+#define MMC_GET_CSD			11U	/* Get CSD */
+#define MMC_GET_CID			12U	/* Get CID */
+#define MMC_GET_OCR			13U	/* Get OCR */
+#define MMC_GET_SDSTAT		14U	/* Get SD status */
+
+/* ATA/CF specific ioctl command */
+#define ATA_GET_REV			20U	/* Get F/W revision */
+#define ATA_GET_MODEL		21U	/* Get model name */
+#define ATA_GET_SN			22U	/* Get serial number */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/Xilinx/libsrc/xilffs_v3_8/src/include/ff.h b/src/Xilinx/libsrc/xilffs_v3_8/src/include/ff.h
new file mode 100644
index 0000000..2eb2268
--- /dev/null
+++ b/src/Xilinx/libsrc/xilffs_v3_8/src/include/ff.h
@@ -0,0 +1,385 @@
+/*---------------------------------------------------------------------------/
+/  FatFs - FAT file system module include file  R0.10b    (C)ChaN, 2014
+/----------------------------------------------------------------------------/
+/ FatFs module is a generic FAT file system module for small embedded systems.
+/ This is a free software that opened for education, research and commercial
+/ developments under license policy of following terms.
+/
+/  Copyright (C) 2014, ChaN, all right reserved.
+/
+/ * The FatFs module is a free software and there is NO WARRANTY.
+/ * No restriction on use. You can use, modify and redistribute it for
+/   personal, non-profit or commercial product UNDER YOUR RESPONSIBILITY.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/----------------------------------------------------------------------------*/
+
+#ifndef FAT_FS
+#define FAT_FS	8051	/* Revision ID */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "xil_types.h"
+#include "integer.h"	/* Basic integer types */
+#include "ffconf.h"		/* FatFs configuration options */
+
+#if FAT_FS != _FFCONF
+#error Wrong configuration file (ffconf.h).
+#endif
+
+
+
+/* Definitions of volume management */
+
+#if _MULTI_PARTITION		/* Multiple partition configuration */
+typedef struct {
+	BYTE pd;	/* Physical drive number */
+	BYTE pt;	/* Partition: 0:Auto detect, 1-4:Forced partition) */
+} PARTITION;
+extern PARTITION VolToPart[];	/* Volume - Partition resolution table */
+#define LD2PD(vol) (VolToPart[vol].pd)	/* Get physical drive number */
+#define LD2PT(vol) (VolToPart[vol].pt)	/* Get partition index */
+
+#else							/* Single partition configuration */
+#define LD2PD(vol) (BYTE)((vol))	/* Each logical drive is bound to the same physical drive number */
+#define LD2PT(vol) 0U			/* Find first valid partition or in SFD */
+
+#endif
+
+
+
+/* Type of path name strings on FatFs API */
+
+#if _LFN_UNICODE			/* Unicode string */
+#if !_USE_LFN
+#error _LFN_UNICODE must be 0 at non-LFN cfg.
+#endif
+#ifndef _INC_TCHAR
+typedef WCHAR TCHAR;
+#define T(x) L ## x
+#define TEXT(x) L ## x
+#endif
+
+#else						/* ANSI/OEM string */
+#ifndef _INC_TCHAR
+typedef char TCHAR;
+#define T(x) (x)
+#define TEXT(x) (x)
+#endif
+
+#endif
+
+
+
+/* File system object structure (FATFS) */
+
+typedef struct {
+	BYTE	fs_type;		/* FAT sub-type (0:Not mounted) */
+	BYTE	drv;			/* Physical drive number */
+	BYTE	csize;			/* Sectors per cluster (1,2,4...128) */
+	BYTE	n_fats;			/* Number of FAT copies (1 or 2) */
+	BYTE	wflag;			/* win[] flag (b0:dirty) */
+	BYTE	fsi_flag;		/* FSINFO flags (b7:disabled, b0:dirty) */
+	WORD	id;				/* File system mount ID */
+	WORD	n_rootdir;		/* Number of root directory entries (FAT12/16) */
+#if _MAX_SS != _MIN_SS
+	WORD	ssize;			/* Bytes per sector (512, 1024, 2048 or 4096) */
+#endif
+#if _FS_REENTRANT
+	_SYNC_t	sobj;			/* Identifier of sync object */
+#endif
+#if !_FS_READONLY
+	DWORD	last_clust;		/* Last allocated cluster */
+	DWORD	free_clust;		/* Number of free clusters */
+#endif
+#if _FS_RPATH
+	DWORD	cdir;			/* Current directory start cluster (0:root) */
+#endif
+	DWORD	n_fatent;		/* Number of FAT entries, = number of clusters + 2 */
+	DWORD	fsize;			/* Sectors per FAT */
+	DWORD	volbase;		/* Volume start sector */
+	DWORD	fatbase;		/* FAT start sector */
+	DWORD	dirbase;		/* Root directory start sector (FAT32:Cluster#) */
+	DWORD	database;		/* Data start sector */
+	DWORD	winsect;		/* Current sector appearing in the win[] */
+#ifdef __ICCARM__
+#pragma data_alignment = 32
+	BYTE	win[_MAX_SS];
+#pragma data_alignment = 4
+#else
+	BYTE	win[_MAX_SS] __attribute__ ((aligned(32)));	/* Disk access window for Directory, FAT (and Data on tiny cfg) */
+#endif
+} FATFS;
+
+
+
+/* File object structure (FIL) */
+
+typedef struct {
+	FATFS*	fs;				/* Pointer to the related file system object (**do not change order**) */
+	WORD	id;				/* Owner file system mount ID (**do not change order**) */
+	BYTE	flag;			/* Status flags */
+	BYTE	err;			/* Abort flag (error code) */
+	DWORD	fptr;			/* File read/write pointer (Zeroed on file open) */
+	DWORD	fsize;			/* File size */
+	DWORD	sclust;			/* File start cluster (0:no cluster chain, always 0 when fsize is 0) */
+	DWORD	clust;			/* Current cluster of fpter (not valid when fprt is 0) */
+	DWORD	dsect;			/* Sector number appearing in buf[] (0:invalid) */
+#if !_FS_READONLY
+	DWORD	dir_sect;		/* Sector number containing the directory entry */
+	BYTE*	dir_ptr;		/* Pointer to the directory entry in the win[] */
+#endif
+#if _USE_FASTSEEK
+	DWORD*	cltbl;			/* Pointer to the cluster link map table (Nulled on file open) */
+#endif
+#if _FS_LOCK
+	UINT	lockid;			/* File lock ID origin from 1 (index of file semaphore table Files[]) */
+#endif
+#if !_FS_TINY
+#ifdef __ICCARM__
+#pragma data_alignment = 32
+	BYTE	buf[_MAX_SS];	/* File data read/write buffer */
+#pragma data_alignment = 4
+#else
+	BYTE	buf[_MAX_SS] __attribute__ ((aligned(32)));	/* File data read/write buffer */
+#endif
+#endif
+} FIL;
+
+
+
+/* Directory object structure (DIR) */
+
+typedef struct {
+	FATFS*	fs;				/* Pointer to the owner file system object (**do not change order**) */
+	WORD	id;				/* Owner file system mount ID (**do not change order**) */
+	WORD	index;			/* Current read/write index number */
+	DWORD	sclust;			/* Table start cluster (0:Root dir) */
+	DWORD	clust;			/* Current cluster */
+	DWORD	sect;			/* Current sector */
+	BYTE*	dir;			/* Pointer to the current SFN entry in the win[] */
+	BYTE*	fn;				/* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */
+#if _FS_LOCK
+	UINT	lockid;			/* File lock ID (index of file semaphore table Files[]) */
+#endif
+#if _USE_LFN
+	WCHAR*	lfn;			/* Pointer to the LFN working buffer */
+	WORD	lfn_idx;		/* Last matched LFN index number (0xFFFF:No LFN) */
+#endif
+} DIR;
+
+
+
+/* File status structure (FILINFO) */
+
+typedef struct {
+	DWORD	fsize;			/* File size */
+	WORD	fdate;			/* Last modified date */
+	WORD	ftime;			/* Last modified time */
+	BYTE	fattrib;		/* Attribute */
+	TCHAR	fname[13];		/* Short file name (8.3 format) */
+#if _USE_LFN
+	TCHAR*	lfname;			/* Pointer to the LFN buffer */
+	UINT 	lfsize;			/* Size of LFN buffer in TCHAR */
+#endif
+} FILINFO;
+
+
+
+/* File function return code (FRESULT) */
+
+typedef enum {
+	FR_OK = 0U,				/* (0) Succeeded */
+	FR_DISK_ERR,			/* (1) A hard error occurred in the low level disk I/O layer */
+	FR_INT_ERR,				/* (2) Assertion failed */
+	FR_NOT_READY,			/* (3) The physical drive cannot work */
+	FR_NO_FILE,				/* (4) Could not find the file */
+	FR_NO_PATH,				/* (5) Could not find the path */
+	FR_INVALID_NAME,		/* (6) The path name format is invalid */
+	FR_DENIED,				/* (7) Access denied due to prohibited access or directory full */
+	FR_EXIST,				/* (8) Access denied due to prohibited access */
+	FR_INVALID_OBJECT,		/* (9) The file/directory object is invalid */
+	FR_WRITE_PROTECTED,		/* (10) The physical drive is write protected */
+	FR_INVALID_DRIVE,		/* (11) The logical drive number is invalid */
+	FR_NOT_ENABLED,			/* (12) The volume has no work area */
+	FR_NO_FILESYSTEM,		/* (13) There is no valid FAT volume */
+	FR_MKFS_ABORTED,		/* (14) The f_mkfs() aborted due to any parameter error */
+	FR_TIMEOUT,				/* (15) Could not get a grant to access the volume within defined period */
+	FR_LOCKED,				/* (16) The operation is rejected according to the file sharing policy */
+	FR_NOT_ENOUGH_CORE,		/* (17) LFN working buffer could not be allocated */
+	FR_TOO_MANY_OPEN_FILES,	/* (18) Number of open files > _FS_SHARE */
+	FR_INVALID_PARAMETER	/* (19) Given parameter is invalid */
+} FRESULT;
+
+
+
+/*--------------------------------------------------------------*/
+/* FatFs module application interface                           */
+
+FRESULT f_open (FIL* fp, const TCHAR* path, BYTE mode);				/* Open or create a file */
+FRESULT f_close (FIL* fp);											/* Close an open file object */
+FRESULT f_read (FIL* fp, void* buff, UINT btr, UINT* br);			/* Read data from a file */
+FRESULT f_write (FIL* fp, const void* buff, UINT btw, UINT* bw);	/* Write data to a file */
+#if _USE_FORWARD
+FRESULT f_forward (FIL* fp, UINT(*func)(const BYTE*,UINT), UINT btf, UINT* bf);	/* Forward data to the stream */
+#endif
+FRESULT f_lseek (FIL* fp, DWORD ofs);								/* Move file pointer of a file object */
+FRESULT f_sync (FIL* fp);											/* Flush cached data of a writing file */
+#if _FS_MINIMIZE <= 2
+#if _FS_MINIMIZE <= 1
+FRESULT f_opendir (DIR* dp, const TCHAR* path);						/* Open a directory */
+FRESULT f_closedir (DIR* dp);										/* Close an open directory */
+FRESULT f_readdir (DIR* dp, FILINFO* fno);							/* Read a directory item */
+#if _FS_MINIMIZE == 0
+FRESULT f_stat (const TCHAR* path, FILINFO* fno);					/* Get file status */
+#if !_FS_READONLY
+FRESULT f_getfree (const TCHAR* path, DWORD* nclst, FATFS** fatfsys);
+FRESULT f_truncate (FIL* fp);										/* Truncate file */
+FRESULT f_unlink (const TCHAR* path);							/* Delete an existing file or directory */
+FRESULT f_mkdir (const TCHAR* path);								/* Create a sub directory */
+FRESULT f_rename (const TCHAR* path_old, const TCHAR* path_new);	/* Rename/Move a file or directory */
+FRESULT f_chmod (const TCHAR* path, BYTE value, BYTE mask);			/* Change attribute of the file/dir */
+FRESULT f_utime (const TCHAR* path, const FILINFO* fno);			/* Change times-tamp of the file/dir */
+#endif
+#endif
+#endif
+#endif
+DWORD clust2sect (FATFS* fs, DWORD clst);
+DWORD get_fat (	FATFS* fs, DWORD clst);
+FRESULT put_fat (FATFS* fs, DWORD clst, DWORD val);
+#if _FS_RPATH >= 1
+#if _VOLUMES >= 2
+FRESULT f_chdrive (const TCHAR* path);								/* Change current drive */
+#endif
+FRESULT f_chdir (const TCHAR* path);								/* Change current directory */
+#if _FS_RPATH >= 2
+FRESULT f_getcwd (TCHAR* buff, UINT len);							/* Get current directory */
+#endif
+#endif
+#if _USE_LABEL
+FRESULT f_getlabel (const TCHAR* path, TCHAR* label, DWORD* vsn);	/* Get volume label */
+#if !_FS_READONLY
+FRESULT f_setlabel (const TCHAR* label);							/* Set volume label */
+#endif
+#endif
+FRESULT f_mount (FATFS* fs, const TCHAR* path, BYTE opt);			/* Mount/Unmount a logical drive */
+#if _USE_MKFS && !_FS_READONLY
+FRESULT f_mkfs (const TCHAR* path, BYTE sfd, UINT au);				/* Create a file system on the volume */
+#if _MULTI_PARTITION
+FRESULT f_fdisk (BYTE pdrv, const DWORD szt[], void* work);			/* Divide a physical drive into some partitions */
+#endif
+#endif
+#if _USE_STRFUNC
+TCHAR* f_gets (TCHAR* buff, s32 len, FIL* fp);						/* Get a string from the file */
+#if !_FS_READONLY
+int f_putc (TCHAR c, FIL* fp);										/* Put a character to the file */
+int f_puts (const TCHAR* str, FIL* cp);								/* Put a string to the file */
+int f_printf (FIL* fp, const TCHAR* str, ...);						/* Put a formatted string to the file */
+#endif
+#endif
+#define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0)
+#define f_error(fp) ((fp)->err)
+#define f_tell(fp) ((fp)->fptr)
+#define file_size(fp) ((fp)->fsize)
+
+#ifndef EOF
+#define EOF (-1)
+#endif
+
+
+
+
+/*--------------------------------------------------------------*/
+/* Additional user defined functions                            */
+
+/* RTC function */
+#if !_FS_READONLY
+DWORD get_fattime (void);
+#endif
+
+/* Unicode support functions */
+#if _USE_LFN							/* Unicode - OEM code conversion */
+WCHAR ff_convert (WCHAR chr, UINT dir);	/* OEM-Unicode bidirectional conversion */
+WCHAR ff_wtoupper (WCHAR chr);			/* Unicode upper-case conversion */
+#if _USE_LFN == 3						/* Memory functions */
+void* ff_memalloc (UINT msize);			/* Allocate memory block */
+void ff_memfree (void* mblock);			/* Free memory block */
+#endif
+#endif
+
+/* Sync functions */
+#if _FS_REENTRANT
+int ff_cre_syncobj (BYTE vol, _SYNC_t* sobj);	/* Create a sync object */
+int ff_req_grant (_SYNC_t sobj);				/* Lock sync object */
+void ff_rel_grant (_SYNC_t sobj);				/* Unlock sync object */
+int ff_del_syncobj (_SYNC_t sobj);				/* Delete a sync object */
+#endif
+
+
+
+
+/*--------------------------------------------------------------*/
+/* Flags and offset address                                     */
+
+
+/* File access control and file status flags (FIL.flag) */
+
+#define	FA_READ				0x01U
+#define	FA_OPEN_EXISTING	0x00U
+
+#if !_FS_READONLY
+#define	FA_WRITE			0x02U
+#define	FA_CREATE_NEW		0x04U
+#define	FA_CREATE_ALWAYS	0x08U
+#define	FA_OPEN_ALWAYS		0x10U
+#define FA__WRITTEN			0x20U
+#define FA__DIRTY			0x40U
+#endif
+
+
+/* FAT sub type (FATFS.fs_type) */
+
+#define FS_FAT12	1U
+#define FS_FAT16	2U
+#define FS_FAT32	3U
+
+
+/* File attribute bits for directory entry */
+
+#define	AM_RDO	0x01U	/* Read only */
+#define	AM_HID	0x02U	/* Hidden */
+#define	AM_SYS	0x04U	/* System */
+#define	AM_VOL	0x08U	/* Volume label */
+#define AM_LFN	0x0FU	/* LFN entry */
+#define AM_DIR	0x10U	/* Directory */
+#define AM_ARC	0x20U	/* Archive */
+#define AM_MASK	0x3FU	/* Mask of defined bits */
+
+
+/* Fast seek feature */
+#define CREATE_LINKMAP	0xFFFFFFFFU
+
+
+
+/*--------------------------------*/
+/* Multi-byte word access macros  */
+
+#if _WORD_ACCESS == 1	/* Enable word access to the FAT structure */
+#define	LD_WORD(ptr)		(*(WORD*)(BYTE*)(ptr))
+#define	LD_DWORD(ptr)		(DWORD)(*(DWORD*)(BYTE*)(ptr))
+#define	ST_WORD(ptr,val)	(*(WORD*)(BYTE*)(ptr))=(WORD)(val)
+#define	ST_DWORD(ptr,val)	(*(DWORD*)(BYTE*)(ptr))=(DWORD)(val)
+#else					/* Use byte-by-byte access to the FAT structure */
+#define	LD_WORD(ptr)		(((WORD)*((BYTE*)(ptr)+1U)<<8)|(WORD)*(BYTE*)(ptr))
+#define	LD_DWORD(ptr)		((DWORD)(((DWORD)*((BYTE*)(ptr)+3U)<<24)|((DWORD)*((BYTE*)(ptr)+2U)<<16)|((WORD)*((BYTE*)(ptr)+1U)<<8)|*(BYTE*)(ptr)))
+#define	ST_WORD(ptr,val)	(*((BYTE*)((void *)(ptr))))=((BYTE)(val)); (*((BYTE *)((ptr)+1U)))=((BYTE)((val)>>8))
+#define	ST_DWORD(ptr,val)	(*((BYTE*)((void *)(ptr))))=((BYTE)(val)); (*((BYTE*)(void *)((ptr)+1U)))=((BYTE)((DWORD)(val)>>8)); (*((BYTE*)(void *)((ptr)+2U)))=((BYTE)((DWORD)(val)>>16)); (*((BYTE*)(void *)((ptr)+3U)))=((BYTE)((DWORD)(val)>>24))
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FAT_FS */
diff --git a/src/Xilinx/libsrc/xilffs_v3_8/src/include/ffconf.h b/src/Xilinx/libsrc/xilffs_v3_8/src/include/ffconf.h
new file mode 100644
index 0000000..e715d68
--- /dev/null
+++ b/src/Xilinx/libsrc/xilffs_v3_8/src/include/ffconf.h
@@ -0,0 +1,282 @@
+/*---------------------------------------------------------------------------/
+/  FatFs - FAT file system module configuration file  R0.10b (C)ChaN, 2014
+/---------------------------------------------------------------------------*/
+
+#ifndef _FFCONF
+#define _FFCONF 8051	/* Revision ID */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "xparameters.h"
+
+/*---------------------------------------------------------------------------/
+/ Functions and Buffer Configurations
+/---------------------------------------------------------------------------*/
+
+#define	_FS_TINY		0	/* 0:Normal or 1:Tiny */
+/* When _FS_TINY is set to 1, it reduces memory consumption _MAX_SS bytes each
+/  file object. For file data transfer, FatFs uses the common sector buffer in
+/  the file system object (FATFS) instead of private sector buffer eliminated
+/  from the file object (FIL). */
+
+#ifdef FILE_SYSTEM_READ_ONLY
+#define _FS_READONLY	1	/* 1:Read only */
+#else
+#define _FS_READONLY	0	/* 0:Read/Write */
+#endif
+/* Setting _FS_READONLY to 1 defines read only configuration. This removes
+/  writing functions, f_write(), f_sync(), f_unlink(), f_mkdir(), f_chmod(),
+/  f_rename(), f_truncate() and useless f_getfree(). */
+
+
+#define _FS_MINIMIZE	0	/* 0 to 3 */
+/* The _FS_MINIMIZE option defines minimization level to remove API functions.
+/
+/   0: All basic functions are enabled.
+/   1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_chmod(), f_utime(),
+/      f_truncate() and f_rename() function are removed.
+/   2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1.
+/   3: f_lseek() function is removed in addition to 2. */
+
+#if FILE_SYSTEM_USE_STRFUNC == 0
+#define	_USE_STRFUNC	0	/* 0:Disable */
+#elif FILE_SYSTEM_USE_STRFUNC == 1
+#define	_USE_STRFUNC	1	/* 1:Enable */
+#elif FILE_SYSTEM_USE_STRFUNC == 2
+#define	_USE_STRFUNC	2	/* 2:Enable */
+#endif
+/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
+
+#ifdef FILE_SYSTEM_USE_MKFS
+#define	_USE_MKFS		1	/* 1:Enable */
+#else
+#define	_USE_MKFS		0	/* 0:Disable */
+#endif
+/* To enable f_mkfs() function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
+
+
+#define	_USE_FASTSEEK	0	/* 0:Disable or 1:Enable */
+/* To enable fast seek feature, set _USE_FASTSEEK to 1. */
+
+
+#define _USE_LABEL		0	/* 0:Disable or 1:Enable */
+/* To enable volume label functions, set _USE_LAVEL to 1 */
+
+
+#define	_USE_FORWARD	0	/* 0:Disable or 1:Enable */
+/* To enable f_forward() function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
+
+
+/*---------------------------------------------------------------------------/
+/ Locale and Namespace Configurations
+/---------------------------------------------------------------------------*/
+
+#define _CODE_PAGE	932
+/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
+/  Incorrect setting of the code page can cause a file open failure.
+/
+/   932  - Japanese Shift_JIS (DBCS, OEM, Windows)
+/   936  - Simplified Chinese GBK (DBCS, OEM, Windows)
+/   949  - Korean (DBCS, OEM, Windows)
+/   950  - Traditional Chinese Big5 (DBCS, OEM, Windows)
+/   1250 - Central Europe (Windows)
+/   1251 - Cyrillic (Windows)
+/   1252 - Latin 1 (Windows)
+/   1253 - Greek (Windows)
+/   1254 - Turkish (Windows)
+/   1255 - Hebrew (Windows)
+/   1256 - Arabic (Windows)
+/   1257 - Baltic (Windows)
+/   1258 - Vietnam (OEM, Windows)
+/   437  - U.S. (OEM)
+/   720  - Arabic (OEM)
+/   737  - Greek (OEM)
+/   775  - Baltic (OEM)
+/   850  - Multilingual Latin 1 (OEM)
+/   858  - Multilingual Latin 1 + Euro (OEM)
+/   852  - Latin 2 (OEM)
+/   855  - Cyrillic (OEM)
+/   866  - Russian (OEM)
+/   857  - Turkish (OEM)
+/   862  - Hebrew (OEM)
+/   874  - Thai (OEM, Windows)
+/   1    - ASCII (Valid for only non-LFN configuration) */
+
+#ifdef FILE_SYSTEM_USE_LFN
+#define	_USE_LFN	1		/* 0 to 3 */
+#else
+#define	_USE_LFN	0		/* 0 to 3 */
+#endif
+#define	_MAX_LFN	255		/* Maximum LFN length to handle (12 to 255) */
+/* The _USE_LFN option switches the LFN feature.
+/
+/   0: Disable LFN feature. _MAX_LFN has no effect.
+/   1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe.
+/   2: Enable LFN with dynamic working buffer on the STACK.
+/   3: Enable LFN with dynamic working buffer on the HEAP.
+/
+/  When enable LFN feature, Unicode handling functions ff_convert() and ff_wtoupper()
+/  function must be added to the project.
+/  The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. When use stack for the
+/  working buffer, take care on stack overflow. When use heap memory for the working
+/  buffer, memory management functions, ff_memalloc() and ff_memfree(), must be added
+/  to the project. */
+
+
+#define	_LFN_UNICODE	0	/* 0:ANSI/OEM or 1:Unicode */
+/* To switch the character encoding on the FatFs API (TCHAR) to Unicode, enable LFN
+/  feature and set _LFN_UNICODE to 1. This option affects behavior of string I/O
+/  functions. This option must be 0 when LFN feature is not enabled. */
+
+
+#define _STRF_ENCODE	3	/* 0:ANSI/OEM, 1:UTF-16LE, 2:UTF-16BE, 3:UTF-8 */
+/* When Unicode API is enabled by _LFN_UNICODE option, this option selects the character
+/  encoding on the file to be read/written via string I/O functions, f_gets(), f_putc(),
+/  f_puts and f_printf(). This option has no effect when _LFN_UNICODE == 0. Note that
+/  FatFs supports only BMP. */
+
+
+#if FILE_SYSTEM_SET_FS_RPATH == 0
+#define _FS_RPATH		0U
+#elif FILE_SYSTEM_SET_FS_RPATH == 1
+#define _FS_RPATH		1U
+#elif FILE_SYSTEM_SET_FS_RPATH == 2
+#define _FS_RPATH		2U
+#endif
+/* The _FS_RPATH option configures relative path feature.
+/
+/   0: Disable relative path feature and remove related functions.
+/   1: Enable relative path. f_chdrive() and f_chdir() function are available.
+/   2: f_getcwd() function is available in addition to 1.
+/
+/  Note that output of the f_readdir() fnction is affected by this option. */
+
+
+/*---------------------------------------------------------------------------/
+/ Drive/Volume Configurations
+/---------------------------------------------------------------------------*/
+
+#if FILE_SYSTEM_NUM_LOGIC_VOL == 1
+#define _VOLUMES 1U
+#elif FILE_SYSTEM_NUM_LOGIC_VOL == 2
+#define _VOLUMES 2U
+#elif FILE_SYSTEM_NUM_LOGIC_VOL == 3
+#define _VOLUMES 3U
+#elif FILE_SYSTEM_NUM_LOGIC_VOL == 4
+#define _VOLUMES 4U
+#elif FILE_SYSTEM_NUM_LOGIC_VOL == 5
+#define _VOLUMES 5U
+#elif FILE_SYSTEM_NUM_LOGIC_VOL == 6
+#define _VOLUMES 6U
+#elif FILE_SYSTEM_NUM_LOGIC_VOL == 7
+#define _VOLUMES 7U
+#elif FILE_SYSTEM_NUM_LOGIC_VOL == 8
+#define _VOLUMES 8U
+#elif FILE_SYSTEM_NUM_LOGIC_VOL == 9
+#define _VOLUMES 9U
+#else
+#define _VOLUMES 10U
+#endif
+/* Number of volumes (logical drives) to be used. */
+
+
+#define _STR_VOLUME_ID	0	/* 0:Use only 0-9 for drive ID, 1:Use strings for drive ID */
+#define _VOLUME_STRS	"RAM","NAND","CF","SD1","SD2","USB1","USB2","USB3"
+/* When _STR_VOLUME_ID is set to 1, also pre-defined strings can be used as drive
+/  number in the path name. _VOLUME_STRS defines the drive ID strings for each logical
+/  drives. Number of items must be equal to _VOLUMES. Valid characters for the drive ID
+/  strings are: 0-9 and A-Z. */
+
+#ifdef FILE_SYSTEM_MULTI_PARTITION
+#define	_MULTI_PARTITION	1	/* 1:Enable multiple partition */
+#else
+#define	_MULTI_PARTITION	0	/* 0:Single partition */
+#endif
+/* By default(0), each logical drive number is bound to the same physical drive number
+/  and only a FAT volume found on the physical drive is mounted. When it is set to 1,
+/  each logical drive number is bound to arbitrary drive/partition listed in VolToPart[].
+*/
+
+
+#define	_MIN_SS		512U
+#define	_MAX_SS		512U
+/* These options configure the range of sector size to be supported. (512, 1024, 2048 or
+/  4096) Always set both 512 for most systems, all memory card and harddisk. But a larger
+/  value may be required for on-board flash memory and some type of optical media.
+/  When _MAX_SS is larger than _MIN_SS, FatFs is configured to variable sector size and
+/  GET_SECTOR_SIZE command must be implemented to the disk_ioctl() function. */
+
+
+#define	_USE_ERASE	0	/* 0:Disable or 1:Enable */
+/* To enable sector erase feature, set _USE_ERASE to 1. Also CTRL_ERASE_SECTOR command
+/  should be added to the disk_ioctl() function. */
+
+
+#define _FS_NOFSINFO	0	/* 0 to 3 */
+/* If you need to know correct free space on the FAT32 volume, set bit 0 of this option
+/  and f_getfree() function at first time after volume mount will force a full FAT scan.
+/  Bit 1 controls the last allocated cluster number as bit 0.
+/
+/  bit0=0: Use free cluster count in the FSINFO if available.
+/  bit0=1: Do not trust free cluster count in the FSINFO.
+/  bit1=0: Use last allocated cluster number in the FSINFO if available.
+/  bit1=1: Do not trust last allocated cluster number in the FSINFO.
+*/
+
+
+
+/*---------------------------------------------------------------------------/
+/ System Configurations
+/---------------------------------------------------------------------------*/
+
+#define	_FS_LOCK	0	/* 0:Disable or >=1:Enable */
+/* To enable file lock control feature, set _FS_LOCK to non-zero value.
+/  The value defines how many files/sub-directories can be opened simultaneously
+/  with file lock control. This feature uses bss _FS_LOCK * 12 bytes. */
+
+
+#define _FS_REENTRANT	0		/* 0:Disable or 1:Enable */
+#define _FS_TIMEOUT		1000	/* Timeout period in unit of time tick */
+#define	_SYNC_t			HANDLE	/* O/S dependent sync object type. e.g. HANDLE, OS_EVENT*, ID, SemaphoreHandle_t and etc.. */
+/* The _FS_REENTRANT option switches the re-entrancy (thread safe) of the FatFs module.
+/
+/   0: Disable re-entrancy. _FS_TIMEOUT and _SYNC_t have no effect.
+/   1: Enable re-entrancy. Also user provided synchronization handlers,
+/      ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj()
+/      function must be added to the project.
+*/
+
+#ifdef FILE_SYSTEM_WORD_ACCESS
+#define _WORD_ACCESS	1
+#else
+#define _WORD_ACCESS 	0
+#endif
+/* The _WORD_ACCESS option is an only platform dependent option. It defines
+/  which access method is used to the word data on the FAT volume.
+/
+/   0: Byte-by-byte access. Always compatible with all platforms.
+/   1: Word access. Do not choose this unless under both the following conditions.
+/
+/  * Address misaligned memory access is always allowed for ALL instructions.
+/  * Byte order on the memory is little-endian.
+/
+/  If it is the case, _WORD_ACCESS can also be set to 1 to improve performance and
+/  reduce code size. Following table shows an example of some processor types.
+/
+/   ARM7TDMI    0           ColdFire    0           V850E       0
+/   Cortex-M3   0           Z80         0/1         V850ES      0/1
+/   Cortex-M0   0           RX600(LE)   0/1         TLCS-870    0/1
+/   AVR         0/1         RX600(BE)   0           TLCS-900    0/1
+/   AVR32       0           RL78        0           R32C        0
+/   PIC18       0/1         SH-2        0           M16C        0/1
+/   PIC24       0           H8S         0           MSP430      0
+/   PIC32       0           H8/300H     0           x86         0/1
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _FFCONF */
diff --git a/src/Xilinx/libsrc/xilffs_v3_8/src/include/integer.h b/src/Xilinx/libsrc/xilffs_v3_8/src/include/integer.h
new file mode 100644
index 0000000..8933f14
--- /dev/null
+++ b/src/Xilinx/libsrc/xilffs_v3_8/src/include/integer.h
@@ -0,0 +1,33 @@
+/*-------------------------------------------*/
+/* Integer type definitions for FatFs module */
+/*-------------------------------------------*/
+
+#ifndef _FF_INTEGER
+#define _FF_INTEGER
+
+#ifdef _WIN32	/* FatFs development platform */
+
+#include 
+#include 
+
+#else			/* Embedded platform */
+
+/* This type MUST be 8 bit */
+typedef unsigned char	BYTE;
+
+/* These types MUST be 16 bit */
+typedef short			SHORT;
+typedef unsigned short	WORD;
+typedef unsigned short	WCHAR;
+
+/* These types MUST be 16 bit or 32 bit */
+typedef int				INT;
+typedef unsigned int	UINT;
+
+/* These types MUST be 32 bit */
+typedef long			LONG;
+typedef unsigned int	DWORD;
+
+#endif
+
+#endif
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/Makefile b/src/Xilinx/libsrc/xilpm_v2_3/src/Makefile
new file mode 100644
index 0000000..0e0e84f
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/Makefile
@@ -0,0 +1,36 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxilpm.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner xilpm_libs
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling xilpm library"
+
+xilpm_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+include:
+	echo "Include files for this library have already been copied."
+clean:
+	rm -rf ${OBJECTS}
+	rm -rf $(RELEASEDIR)/${LIB}
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_api_sys.c b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_api_sys.c
new file mode 100644
index 0000000..7a47820
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_api_sys.c
@@ -0,0 +1,1179 @@
+/******************************************************************************
+*
+* Copyright (C) 2015-2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "pm_client.h"
+#include "pm_common.h"
+#include "pm_api_sys.h"
+#include "pm_callbacks.h"
+
+/** @name Payload Packets
+ *
+ * Assigning of argument values into array elements.
+ * pause and pm_dbg are used for debugging and should be removed in
+ * final version.
+ * @{
+ */
+#define PACK_PAYLOAD(pl, arg0, arg1, arg2, arg3, arg4, arg5)		\
+	pl[0] = (u32)arg0;						\
+	pl[1] = (u32)arg1;						\
+	pl[2] = (u32)arg2;						\
+	pl[3] = (u32)arg3;						\
+	pl[4] = (u32)arg4;						\
+	pl[5] = (u32)arg5;						\
+	pm_dbg("%s(%x, %x, %x, %x, %x)\n", __func__, arg1, arg2, arg3, arg4, arg5);
+
+#define PACK_PAYLOAD0(pl, api_id) \
+	PACK_PAYLOAD(pl, api_id, 0, 0, 0, 0, 0)
+#define PACK_PAYLOAD1(pl, api_id, arg1) \
+	PACK_PAYLOAD(pl, api_id, arg1, 0, 0, 0, 0)
+#define PACK_PAYLOAD2(pl, api_id, arg1, arg2) \
+	PACK_PAYLOAD(pl, api_id, arg1, arg2, 0, 0, 0)
+#define PACK_PAYLOAD3(pl, api_id, arg1, arg2, arg3) \
+	PACK_PAYLOAD(pl, api_id, arg1, arg2, arg3, 0, 0)
+#define PACK_PAYLOAD4(pl, api_id, arg1, arg2, arg3, arg4) \
+	PACK_PAYLOAD(pl, api_id, arg1, arg2, arg3, arg4, 0)
+#define PACK_PAYLOAD5(pl, api_id, arg1, arg2, arg3, arg4, arg5) \
+	PACK_PAYLOAD(pl, api_id, arg1, arg2, arg3, arg4, arg5)
+/*@}*/
+
+/****************************************************************************/
+/**
+ * @brief  Initialize xilpm library
+ *
+ * @param  IpiInst Pointer to IPI driver instance
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_InitXilpm(XIpiPsu *IpiInst)
+{
+	XStatus status = XST_SUCCESS;
+
+	if (NULL == IpiInst) {
+		pm_dbg("ERROR passing NULL pointer to %s\n", __func__);
+		status = XST_INVALID_PARAM;
+		goto done;
+	}
+
+	XPm_ClientSetPrimaryMaster();
+
+	primary_master->ipi = IpiInst;
+done:
+	return status;
+}
+
+/****************************************************************************/
+/**
+ * @brief This Function returns information about the boot reason.
+ * If the boot is not a system startup but a resume,
+ * power down request bitfield for this processor will be cleared.
+ *
+ * @return Returns processor boot status
+ * - PM_RESUME : If the boot reason is because of system resume.
+ * - PM_INITIAL_BOOT : If this boot is the initial system startup.
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+enum XPmBootStatus XPm_GetBootStatus(void)
+{
+	u32 pwrdn_req;
+
+	XPm_ClientSetPrimaryMaster();
+
+	pwrdn_req = pm_read(primary_master->pwrctl);
+	if (0 != (pwrdn_req & primary_master->pwrdn_mask)) {
+		pwrdn_req &= ~primary_master->pwrdn_mask;
+		pm_write(primary_master->pwrctl, pwrdn_req);
+		return PM_RESUME;
+	} else {
+		return PM_INITIAL_BOOT;
+	}
+}
+
+/****************************************************************************/
+/**
+ * @brief  This Function waits for PMU to finish all previous API requests
+ * sent by the PU and performs client specific actions to finish suspend
+ * procedure (e.g. execution of wfi instruction on A53 and R5 processors).
+ *
+ * @note   This function should not return if the suspend procedure is
+ * successful.
+ *
+ ****************************************************************************/
+void XPm_SuspendFinalize(void)
+{
+	XStatus status;
+
+	/*
+	 * Wait until previous IPI request is handled by the PMU.
+	 * If PMU is busy, keep trying until PMU becomes responsive
+	 */
+	do {
+		status = XIpiPsu_PollForAck(primary_master->ipi,
+					    IPI_PMU_PM_INT_MASK,
+					    PM_IPI_TIMEOUT);
+		if (status != XST_SUCCESS) {
+			pm_dbg("ERROR timed out while waiting for PMU to"
+			       " finish processing previous PM-API call\n");
+		}
+	} while (XST_SUCCESS != status);
+
+	XPm_ClientSuspendFinalize();
+}
+
+/****************************************************************************/
+/**
+ * @brief  Sends IPI request to the PMU
+ *
+ * @param  master  Pointer to the master who is initiating request
+ * @param  payload API id and call arguments to be written in IPI buffer
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+static XStatus pm_ipi_send(struct XPm_Master *const master,
+			   u32 payload[PAYLOAD_ARG_CNT])
+{
+	XStatus status;
+
+	status = XIpiPsu_PollForAck(master->ipi, IPI_PMU_PM_INT_MASK,
+				    PM_IPI_TIMEOUT);
+	if (status != XST_SUCCESS) {
+		pm_dbg("%s: ERROR: Timeout expired\n", __func__);
+		goto done;
+	}
+
+	status = XIpiPsu_WriteMessage(master->ipi, IPI_PMU_PM_INT_MASK,
+				      payload, PAYLOAD_ARG_CNT,
+				      XIPIPSU_BUF_TYPE_MSG);
+	if (status != XST_SUCCESS) {
+		pm_dbg("xilpm: ERROR writing to IPI request buffer\n");
+		goto done;
+	}
+
+	status = XIpiPsu_TriggerIpi(master->ipi, IPI_PMU_PM_INT_MASK);
+done:
+	return status;
+}
+
+/****************************************************************************/
+/**
+ * @brief  Reads IPI response after PMU has handled interrupt
+ *
+ * @param  master Pointer to the master who is waiting and reading response
+ * @param  value1 Used to return value from 2nd IPI buffer element (optional)
+ * @param  value2 Used to return value from 3rd IPI buffer element (optional)
+ * @param  value3 Used to return value from 4th IPI buffer element (optional)
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+static XStatus pm_ipi_buff_read32(struct XPm_Master *const master,
+				  u32 *value1, u32 *value2, u32 *value3)
+{
+	u32 response[RESPONSE_ARG_CNT];
+	XStatus status;
+
+	/* Wait until current IPI interrupt is handled by PMU */
+	status = XIpiPsu_PollForAck(master->ipi, IPI_PMU_PM_INT_MASK,
+				  PM_IPI_TIMEOUT);
+
+	if (status != XST_SUCCESS) {
+		pm_dbg("%s: ERROR: Timeout expired\n", __func__);
+		goto done;
+	}
+
+	status = XIpiPsu_ReadMessage(master->ipi, IPI_PMU_PM_INT_MASK,
+				     response, RESPONSE_ARG_CNT,
+				     XIPIPSU_BUF_TYPE_RESP);
+
+	if (status != XST_SUCCESS) {
+		pm_dbg("xilpm: ERROR reading from PMU's IPI response buffer\n");
+		goto done;
+	}
+
+	/*
+	 * Read response from IPI buffer
+	 * buf-0: success or error+reason
+	 * buf-1: value1
+	 * buf-2: value2
+	 * buf-3: value3
+	 */
+	if (NULL != value1)
+		*value1 = response[1];
+	if (NULL != value2)
+		*value2 = response[2];
+	if (NULL != value3)
+		*value3 = response[3];
+
+	status = response[0];
+done:
+	return status;
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is used by a CPU to declare that it is about to
+ * suspend itself. After the PMU processes this call it will wait for the
+ * requesting CPU to complete the suspend procedure and become ready to be
+ * put into a sleep state.
+ *
+ * @param  nid     Node ID of the CPU node to be suspended.
+ * @param  latency Maximum wake-up latency requirement in us(microsecs)
+ * @param  state   Instead of specifying a maximum latency, a CPU can also
+ * explicitly request a certain power state.
+ * @param  address Address from which to resume when woken up.
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   This is a blocking call, it will return only once PMU has responded
+ *
+ ****************************************************************************/
+XStatus XPm_SelfSuspend(const enum XPmNodeId nid,
+			const u32 latency,
+			const u8 state,
+			const u64 address)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	struct XPm_Master *master = pm_get_master_by_node(nid);
+	if (NULL == master) {
+		/*
+		 * If a subsystem node ID (APU or RPU) was passed then
+		 * the master to be used is the primary master.
+		 * E.g. for the APU the primary master is APU0
+		 */
+		if (subsystem_node == nid) {
+			master = primary_master;
+		} else {
+			return XST_INVALID_PARAM;
+		}
+	}
+	/*
+	 * Do client specific suspend operations
+	 * (e.g. disable interrupts and set powerdown request bit)
+	 */
+	XPm_ClientSuspend(master);
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD5(payload, PM_SELF_SUSPEND, nid, latency, state, (u32)address,
+		     (u32)(address >> 32));
+	ret = pm_ipi_send(master, payload);
+	if (XST_SUCCESS != ret)
+		return ret;
+	/* Wait for PMU to finish handling request */
+	return pm_ipi_buff_read32(master, NULL, NULL, NULL);
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is called to configure the power management
+ * framework. The call triggers power management controller to load the
+ * configuration object and configure itself according to the content of the
+ * object.
+ *
+ * @param  address Start address of the configuration object
+ *
+ * @return XST_SUCCESS if successful, otherwise an error code
+ *
+ * @note   The provided address must be in 32-bit address space which is
+ * accessible by the PMU.
+ *
+ ****************************************************************************/
+XStatus XPm_SetConfiguration(const u32 address)
+{
+	XStatus status;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD1(payload, PM_SET_CONFIGURATION, address);
+	status = pm_ipi_send(primary_master, payload);
+
+	if (XST_SUCCESS != status)
+		return status;
+
+	return pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is called to notify the power management controller
+ * about the completed power management initialization.
+ *
+ * @return XST_SUCCESS if successful, otherwise an error code
+ *
+ * @note   It is assumed that all used nodes are requested when this call is
+ * made. The power management controller may power down the nodes which are
+ * not requested after this call is processed.
+ *
+ ****************************************************************************/
+XStatus XPm_InitFinalize(void)
+{
+	XStatus status;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD0(payload, PM_INIT_FINALIZE);
+	status = pm_ipi_send(primary_master, payload);
+
+	if (XST_SUCCESS != status)
+		return status;
+
+	return pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is used by a PU to request suspend of another PU.
+ * This call triggers the power management controller to notify the PU
+ * identified by 'nodeID' that a suspend has been requested. This will
+ * allow said PU to gracefully suspend itself by calling XPm_SelfSuspend
+ * for each of its CPU nodes, or else call XPm_AbortSuspend with its PU
+ * node as argument and specify the reason.
+ *
+ * @param  target  Node ID of the PU node to be suspended
+ * @param  ack     Requested acknowledge type
+ * @param  latency Maximum wake-up latency requirement in us(micro sec)
+ * @param  state   Instead of specifying a maximum latency, a PU can
+ * also explicitly request a certain power state.
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   If 'ack' is set to PM_ACK_CB_STANDARD, the requesting PU will
+ * be notified upon completion of suspend or if an error occurred,
+ * such as an abort or a timeout.
+ *
+ ****************************************************************************/
+XStatus XPm_RequestSuspend(const enum XPmNodeId target,
+			   const enum XPmRequestAck ack,
+			   const u32 latency, const u8 state)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD4(payload, PM_REQUEST_SUSPEND, target, ack, latency, state);
+	ret = pm_ipi_send(primary_master, payload);
+
+	if ((XST_SUCCESS == ret) && (REQUEST_ACK_BLOCKING == ack))
+		return pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+	else
+		return ret;
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function can be used to request power up of a CPU node
+ * within the same PU, or to power up another PU.
+ *
+ * @param  target     Node ID of the CPU or PU to be powered/woken up.
+ * @param  setAddress Specifies whether the start address argument is being passed.
+ * - 0 : do not set start address
+ * - 1 : set start address
+ * @param  address    Address from which to resume when woken up.
+ * Will only be used if set_address is 1.
+ * @param  ack        Requested acknowledge type
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   If acknowledge is requested, the calling PU will be notified
+ * by the power management controller once the wake-up is completed.
+ *
+ ****************************************************************************/
+XStatus XPm_RequestWakeUp(const enum XPmNodeId target,
+			  const bool setAddress,
+			  const u64 address,
+			  const enum XPmRequestAck ack)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+	u64 encodedAddress;
+	struct XPm_Master *master = pm_get_master_by_node(target);
+
+	XPm_ClientWakeup(master);
+
+	/* encode set Address into 1st bit of address */
+	encodedAddress = address | !!setAddress;
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD4(payload, PM_REQUEST_WAKEUP, target, (u32)encodedAddress,
+		     (u32)(encodedAddress >> 32), ack);
+	ret = pm_ipi_send(primary_master, payload);
+
+	if ((XST_SUCCESS == ret) && (REQUEST_ACK_BLOCKING == ack))
+		return pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+	else
+		return ret;
+}
+
+/****************************************************************************/
+/**
+ * @brief  One PU can request a forced poweroff of another PU or its power
+ * island or power domain. This can be used for killing an unresponsive PU,
+ * in which case all resources of that PU will be automatically released.
+ *
+ * @param  target Node ID of the PU node or power island/domain to be
+ * powered down.
+ * @param  ack    Requested acknowledge type
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   Force power down may not be requested by a PU for itself.
+ *
+ ****************************************************************************/
+XStatus XPm_ForcePowerDown(const enum XPmNodeId target,
+			   const enum XPmRequestAck ack)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD2(payload, PM_FORCE_POWERDOWN, target, ack);
+	ret = pm_ipi_send(primary_master, payload);
+
+	if ((XST_SUCCESS == ret) && (REQUEST_ACK_BLOCKING == ack))
+		return pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+	else
+		return ret;
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is called by a CPU after a XPm_SelfSuspend call to
+ * notify the power management controller that CPU has aborted suspend
+ * or in response to an init suspend request when the PU refuses to suspend.
+ *
+ * @param  reason Reason code why the suspend can not be performed or completed
+ * - ABORT_REASON_WKUP_EVENT : local wakeup-event received
+ * - ABORT_REASON_PU_BUSY : PU is busy
+ * - ABORT_REASON_NO_PWRDN : no external powerdown supported
+ * - ABORT_REASON_UNKNOWN : unknown error during suspend procedure
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   Calling PU expects the PMU to abort the initiated suspend procedure.
+ * This is a non-blocking call without any acknowledge.
+ *
+ ****************************************************************************/
+XStatus XPm_AbortSuspend(const enum XPmAbortReason reason)
+{
+	XStatus status;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD2(payload, PM_ABORT_SUSPEND, reason, primary_master->node_id);
+	status = pm_ipi_send(primary_master, payload);
+	if (XST_SUCCESS == status) {
+		/* Wait for PMU to finish handling request */
+		status = XIpiPsu_PollForAck(primary_master->ipi,
+					IPI_PMU_PM_INT_MASK, PM_IPI_TIMEOUT);
+		if (status != XST_SUCCESS) {
+			pm_dbg("%s: ERROR: Timeout expired\n", __func__);
+		}
+	}
+
+	/*
+	 * Do client specific abort suspend operations
+	 * (e.g. enable interrupts and clear powerdown request bit)
+	 */
+	XPm_ClientAbortSuspend();
+
+	return status;
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is called by a PU to add or remove a wake-up source
+ * prior to going to suspend. The list of wake sources for a PU is
+ * automatically cleared whenever the PU is woken up or when one of its
+ * CPUs aborts the suspend procedure.
+ *
+ * @param  target    Node ID of the target to be woken up.
+ * @param  wkup_node Node ID of the wakeup device.
+ * @param  enable    Enable flag:
+ * - 1 : the wakeup source is added to the list
+ * - 0 : the wakeup source is removed from the list
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   Declaring a node as a wakeup source will ensure that the node
+ * will not be powered off. It also will cause the PMU to configure the
+ * GIC Proxy accordingly if the FPD is powered off.
+ *
+ ****************************************************************************/
+XStatus XPm_SetWakeUpSource(const enum XPmNodeId target,
+			    const enum XPmNodeId wkup_node,
+			    const u8 enable)
+{
+	u32 payload[PAYLOAD_ARG_CNT];
+	PACK_PAYLOAD3(payload, PM_SET_WAKEUP_SOURCE, target, wkup_node, enable);
+	return pm_ipi_send(primary_master, payload);
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function can be used by a privileged PU to shut down
+ * or restart the complete device.
+ *
+ * @param  restart Should the system be restarted automatically?
+ * - PM_SHUTDOWN : no restart requested, system will be powered off permanently
+ * - PM_RESTART : restart is requested, system will go through a full reset
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   In either case the PMU will call XPm_InitSuspendCb for each of
+ * the other PUs, allowing them to gracefully shut down. If a PU is asleep
+ * it will be woken up by the PMU. The PU making the XPm_SystemShutdown
+ * should perform its own suspend procedure after calling this API. It will
+ * not receive an init suspend callback.
+ *
+ ****************************************************************************/
+XStatus XPm_SystemShutdown(u32 type, u32 subtype)
+{
+	u32 payload[PAYLOAD_ARG_CNT];
+	PACK_PAYLOAD2(payload, PM_SYSTEM_SHUTDOWN, type, subtype);
+	return pm_ipi_send(primary_master, payload);
+}
+
+/* APIs for managing PM slaves */
+
+/****************************************************************************/
+/**
+ * @brief  Used to request the usage of a PM-slave. Using this API call a PU
+ * requests access to a slave device and asserts its requirements on that
+ * device. Provided the PU is sufficiently privileged, the PMU will enable
+ * access to the memory mapped region containing the control registers of
+ * that device. For devices that can only be serving a single PU, any other
+ * privileged PU will now be blocked from accessing this device until the
+ * node is released.
+ *
+ * @param  node         Node ID of the PM slave requested
+ * @param  capabilities Slave-specific capabilities required, can be combined
+ * - PM_CAP_ACCESS : full access / functionality
+ * - PM_CAP_CONTEXT : preserve context
+ * - PM_CAP_WAKEUP : emit wake interrupts
+ * @param  qos          Quality of Service (0-100) required
+ * @param  ack          Requested acknowledge type
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_RequestNode(const enum XPmNodeId node,
+			const u32 capabilities,
+			const u32 qos,
+			const enum XPmRequestAck ack)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	PACK_PAYLOAD4(payload, PM_REQUEST_NODE, node, capabilities, qos, ack);
+	ret = pm_ipi_send(primary_master, payload);
+
+	if ((XST_SUCCESS == ret) && (REQUEST_ACK_BLOCKING == ack))
+		return pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+	else
+		return ret;
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is used by a PU to announce a change in requirements
+ * for a specific slave node which is currently in use.
+ *
+ * @param  nid          Node ID of the PM slave.
+ * @param  capabilities Slave-specific capabilities required.
+ * @param  qos          Quality of Service (0-100) required.
+ * @param  ack          Requested acknowledge type
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   If this function is called after the last awake CPU within the PU
+ * calls SelfSuspend, the requirement change shall be performed after the CPU
+ * signals the end of suspend to the power management controller,
+ * (e.g. WFI interrupt).
+ *
+ ****************************************************************************/
+XStatus XPm_SetRequirement(const enum XPmNodeId nid,
+			   const u32 capabilities,
+			   const u32 qos,
+			   const enum XPmRequestAck ack)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+	PACK_PAYLOAD4(payload, PM_SET_REQUIREMENT, nid, capabilities, qos, ack);
+	ret = pm_ipi_send(primary_master, payload);
+
+	if ((XST_SUCCESS == ret) && (REQUEST_ACK_BLOCKING == ack))
+		return pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+	else
+		return ret;
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is used by a PU to release the usage of a PM slave.
+ * This will tell the power management controller that the node is no longer
+ * needed by that PU, potentially allowing the node to be placed into an
+ * inactive state.
+ *
+ * @param  node Node ID of the PM slave.
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_ReleaseNode(const enum XPmNodeId node)
+{
+	u32 payload[PAYLOAD_ARG_CNT];
+	PACK_PAYLOAD1(payload, PM_RELEASE_NODE, node);
+	return pm_ipi_send(primary_master, payload);
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is used by a PU to announce a change in the maximum
+ * wake-up latency requirements for a specific slave node currently used by
+ * that PU.
+ *
+ * @param  node    Node ID of the PM slave.
+ * @param  latency Maximum wake-up latency required.
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   Setting maximum wake-up latency can constrain the set of possible
+ * power states a resource can be put into.
+ *
+ ****************************************************************************/
+XStatus XPm_SetMaxLatency(const enum XPmNodeId node,
+			  const u32 latency)
+{
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD2(payload, PM_SET_MAX_LATENCY, node, latency);
+	return pm_ipi_send(primary_master, payload);
+}
+
+/* Callback API functions */
+struct pm_init_suspend pm_susp = {
+	.received = false,
+/* initialization of other fields is irrelevant while 'received' is false */
+};
+
+struct pm_acknowledge pm_ack = {
+	.received = false,
+/* initialization of other fields is irrelevant while 'received' is false */
+};
+
+/****************************************************************************/
+/**
+ * @brief  Callback function to be implemented in each PU, allowing the power
+ * management controller to request that the PU suspend itself.
+ *
+ * @param  reason  Suspend reason:
+ * - SUSPEND_REASON_PU_REQ : Request by another PU
+ * - SUSPEND_REASON_ALERT : Unrecoverable SysMon alert
+ * - SUSPEND_REASON_SHUTDOWN : System shutdown
+ * - SUSPEND_REASON_RESTART : System restart
+ * @param  latency Maximum wake-up latency in us(micro secs). This information
+ * can be used by the PU to decide what level of context saving may be
+ * required.
+ * @param  state   Targeted sleep/suspend state.
+ * @param  timeout Timeout in ms, specifying how much time a PU has to initiate
+ * its suspend procedure before it's being considered unresponsive.
+ *
+ * @return None
+ *
+ * @note   If the PU fails to act on this request the power management
+ * controller or the requesting PU may choose to employ the forceful
+ * power down option.
+ *
+ ****************************************************************************/
+void XPm_InitSuspendCb(const enum XPmSuspendReason reason,
+		       const u32 latency,
+		       const u32 state,
+		       const u32 timeout)
+{
+	if (true == pm_susp.received) {
+		pm_dbg("WARNING: dropping unhandled init suspend request!\n");
+		pm_dbg("Dropped %s (%d, %d, %d, %d)\n", __func__, pm_susp.reason,
+			pm_susp.latency, pm_susp.state, pm_susp.timeout);
+	}
+	pm_dbg("%s (%d, %d, %d, %d)\n", __func__, reason, latency, state, timeout);
+
+	pm_susp.reason = reason;
+	pm_susp.latency = latency;
+	pm_susp.state = state;
+	pm_susp.timeout = timeout;
+	pm_susp.received = true;
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is called by the power management controller in
+ * response to any request where an acknowledge callback was requested,
+ * i.e. where the 'ack' argument passed by the PU was REQUEST_ACK_CB_STANDARD.
+ *
+ * @param  node    ID of the component or sub-system in question.
+ * @param  status  Status of the operation:
+ * - OK: the operation completed successfully
+ * - ERR: the requested operation failed
+ * @param  oppoint Operating point of the node in question
+ *
+ * @return None
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+void XPm_AcknowledgeCb(const enum XPmNodeId node,
+		       const XStatus status,
+		       const u32 oppoint)
+{
+	if (true == pm_ack.received) {
+		pm_dbg("WARNING: dropping unhandled acknowledge!\n");
+		pm_dbg("Dropped %s (%d, %d, %d)\n", __func__, pm_ack.node,
+			pm_ack.status, pm_ack.opp);
+	}
+	pm_dbg("%s (%d, %d, %d)\n", __func__, node, status, oppoint);
+
+	pm_ack.node = node;
+	pm_ack.status = status;
+	pm_ack.opp = oppoint;
+	pm_ack.received = true;
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is called by the power management controller if an
+ * event the PU was registered for has occurred. It will populate the notifier
+ * data structure passed when calling XPm_RegisterNotifier.
+ *
+ * @param  node    ID of the node the event notification is related to.
+ * @param  event   ID of the event
+ * @param  oppoint Current operating state of the node.
+ *
+ * @return None
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+void XPm_NotifyCb(const enum XPmNodeId node,
+		  const u32 event,
+		  const u32 oppoint)
+{
+	pm_dbg("%s (%d, %d, %d)\n", __func__, node, event, oppoint);
+	XPm_NotifierProcessEvent(node, event, oppoint);
+}
+
+/* Miscellaneous API functions */
+
+/****************************************************************************/
+/**
+ * @brief  This function is used to request the version number of the API
+ * running on the power management controller.
+ *
+ * @param  version Returns the API 32-bit version number.
+ * Returns 0 if no PM firmware present.
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_GetApiVersion(u32 *version)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD0(payload, PM_GET_API_VERSION);
+	ret = pm_ipi_send(primary_master, payload);
+
+	if (XST_SUCCESS != ret)
+		return ret;
+
+	/* Return result from IPI return buffer */
+	return pm_ipi_buff_read32(primary_master, version, NULL, NULL);
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is used to obtain information about the current state
+ * of a component. The caller must pass a pointer to an XPm_NodeStatus
+ * structure, which must be pre-allocated by the caller.
+ *
+ * @param  node       ID of the component or sub-system in question.
+ * @param  nodestatus Used to return the complete status of the node.
+ *
+ * - status - The current power state of the requested node.
+ *  - For CPU nodes:
+ *   - 0 : if CPU is powered down,
+ *   - 1 : if CPU is active (powered up),
+ *   - 2 : if CPU is suspending (powered up)
+ *  - For power islands and power domains:
+ *   - 0 : if island is powered down,
+ *   - 1 : if island is powered up
+ *  - For PM slaves:
+ *   - 0 : if slave is powered down,
+ *   - 1 : if slave is powered up,
+ *   - 2 : if slave is in retention
+ *
+ * - requirement - Slave nodes only: Returns current requirements the
+ * requesting PU has requested of the node.
+ *
+ * - usage - Slave nodes only: Returns current usage status of the node:
+ *  - 0 : node is not used by any PU,
+ *  - 1 : node is used by caller exclusively,
+ *  - 2 : node is used by other PU(s) only,
+ *  - 3 : node is used by caller and by other PU(s)
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_GetNodeStatus(const enum XPmNodeId node,
+			  XPm_NodeStatus *const nodestatus)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD1(payload, PM_GET_NODE_STATUS, node);
+	ret = pm_ipi_send(primary_master, payload);
+
+	if (XST_SUCCESS != ret)
+		return ret;
+
+	/* Return result from IPI return buffer */
+	return pm_ipi_buff_read32(primary_master, &nodestatus->status,
+				  &nodestatus->requirements,
+				  &nodestatus->usage);
+}
+
+/****************************************************************************/
+/**
+ * @brief  Call this function to request the power management controller to
+ * return information about an operating characteristic of a component.
+ *
+ * @param  node   ID of the component or sub-system in question.
+ * @param  type   Type of operating characteristic requested:
+ * - power (current power consumption),
+ * - latency (current latency in us to return to active state),
+ * - temperature (current temperature),
+ * @param  result Used to return the requested operating characteristic.
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_GetOpCharacteristic(const enum XPmNodeId node,
+				const enum XPmOpCharType type,
+				u32* const result)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD2(payload, PM_GET_OP_CHARACTERISTIC, node, type);
+	ret = pm_ipi_send(primary_master, payload);
+
+	if (XST_SUCCESS != ret)
+		return ret;
+
+	/* Return result from IPI return buffer */
+	return pm_ipi_buff_read32(primary_master, result, NULL, NULL);
+}
+
+/****************************************************************************/
+/**
+ * @brief  This function is used to assert or release reset for a particular
+ * reset line. Alternatively a reset pulse can be requested as well.
+ *
+ * @param  reset  ID of the reset line
+ * @param  assert Identifies action:
+ * - PM_RESET_ACTION_RELEASE : release reset,
+ * - PM_RESET_ACTION_ASSERT : assert reset,
+ * - PM_RESET_ACTION_PULSE : pulse reset,
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_ResetAssert(const enum XPmReset reset,
+			const enum XPmResetAction assert)
+{
+       XStatus ret;
+       u32 payload[PAYLOAD_ARG_CNT];
+
+       /* Send request to the PMU */
+       PACK_PAYLOAD2(payload, PM_RESET_ASSERT, reset, assert);
+       ret = pm_ipi_send(primary_master, payload);
+
+       if (XST_SUCCESS != ret)
+               return ret;
+
+       /* Return result from IPI return buffer */
+       return pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+}
+
+/****************************************************************************/
+/**
+ * @brief  Call this function to get the current status of the selected
+ * reset line.
+ *
+ * @param  reset  Reset line
+ * @param  status Status of specified reset (true - asserted, false - released)
+ *
+ * @return Returns 1/XST_FAILURE for 'asserted' or
+ * 0/XST_SUCCESS for 'released'.
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_ResetGetStatus(const enum XPmReset reset, u32 *status)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD1(payload, PM_RESET_GET_STATUS, reset);
+	ret = pm_ipi_send(primary_master, payload);
+
+	if (XST_SUCCESS != ret)
+		return ret;
+
+	/* Return result from IPI return buffer */
+	return pm_ipi_buff_read32(primary_master, status, NULL, NULL);
+}
+
+/****************************************************************************/
+/**
+ * @brief  A PU can call this function to request that the power management
+ * controller call its notify callback whenever a qualifying event occurs.
+ * One can request to be notified for a specific or any event related to
+ * a specific node.
+ *
+ * @param  notifier Pointer to the notifier object to be associated with
+ * the requested notification. The notifier object contains the following
+ * data related to the notification:
+ *
+ * - nodeID : ID of the node to be notified about,
+ *
+ * - eventID : ID of the event in question, '-1' denotes all events
+ * ( - EVENT_STATE_CHANGE, EVENT_ZERO_USERS, EVENT_ERROR_CONDITION),
+ *
+ * - wake : true: wake up on event, false: do not wake up
+ * (only notify if awake), no buffering/queueing
+ *
+ * - callback : Pointer to the custom callback function to be called when the
+ * notification is available. The callback executes from interrupt context,
+ * so the user must take special care when implementing the callback.
+ * Callback is optional, may be set to NULL.
+ *
+ * - received : Variable indicating how many times the notification has been
+ * received since the notifier is registered.
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   The caller shall initialize the notifier object before invoking
+ * the XPm_RegisteredNotifier function. While notifier is registered,
+ * the notifier object shall not be modified by the caller.
+ *
+ ****************************************************************************/
+XStatus XPm_RegisterNotifier(XPm_Notifier* const notifier)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	if (!notifier) {
+		pm_dbg("%s ERROR: NULL notifier pointer\n", __func__);
+		return XST_INVALID_PARAM;
+	}
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD4(payload, PM_REGISTER_NOTIFIER, notifier->node,
+		      notifier->event, notifier->flags, 1);
+	ret = pm_ipi_send(primary_master, payload);
+
+	if (XST_SUCCESS != ret)
+		return ret;
+
+	ret = pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+
+	if (XST_SUCCESS != ret)
+		return ret;
+
+	/* Add notifier in the list only if PMU has it registered */
+	return XPm_NotifierAdd(notifier);
+}
+
+/****************************************************************************/
+/**
+ * @brief  A PU calls this function to unregister for the previously
+ * requested notifications.
+ *
+ * @param  notifier Pointer to the notifier object associated with the
+ * previously requested notification
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_UnregisterNotifier(XPm_Notifier* const notifier)
+{
+	XStatus ret;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	if (!notifier) {
+		pm_dbg("%s ERROR: NULL notifier pointer\n", __func__);
+		return XST_INVALID_PARAM;
+	}
+
+	/*
+	 * Remove first the notifier from the list. If it's not in the list
+	 * report an error, and don't trigger PMU since it don't have it
+	 * registered either.
+	 */
+	ret = XPm_NotifierRemove(notifier);
+	if (XST_SUCCESS != ret)
+		return ret;
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD4(payload, PM_REGISTER_NOTIFIER, notifier->node,
+		      notifier->event, 0, 0);
+	ret = pm_ipi_send(primary_master, payload);
+
+	return pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+}
+
+/* Direct Control API Functions */
+/****************************************************************************/
+/**
+ * @brief  Call this function to write a value directly into a register that
+ * isn't accessible directly, such as registers in the clock control unit.
+ * This call is bypassing the power management logic. The permitted addresses
+ * are subject to restrictions as defined in the PCW configuration.
+ *
+ * @param  address Physical 32-bit address of memory mapped register to write
+ * to.
+ * @param  mask    32-bit value used to limit write to specific bits in the
+ * register.
+ * @param  value   Value to write to the register bits specified by the mask.
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   If the access isn't permitted this function returns an error code.
+ *
+ ****************************************************************************/
+XStatus XPm_MmioWrite(const u32 address, const u32 mask, const u32 value)
+{
+	XStatus status;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD3(payload, PM_MMIO_WRITE, address, mask, value);
+	status = pm_ipi_send(primary_master, payload);
+
+	if (XST_SUCCESS != status)
+		return status;
+
+	/* Return result from IPI return buffer */
+	return pm_ipi_buff_read32(primary_master, NULL, NULL, NULL);
+}
+
+/****************************************************************************/
+/**
+ * @brief  Call this function to read a value from a register that isn't
+ * accessible directly. The permitted addresses are subject to restrictions
+ * as defined in the PCW configuration.
+ *
+ * @param  address Physical 32-bit address of memory mapped register to
+ * read from.
+ * @param  value   Returns the 32-bit value read from the register
+ *
+ * @return XST_SUCCESS if successful else XST_FAILURE or an error code
+ * or a reason code
+ *
+ * @note   If the access isn't permitted this function returns an error code.
+ *
+ ****************************************************************************/
+XStatus XPm_MmioRead(const u32 address, u32 *const value)
+{
+	XStatus status;
+	u32 payload[PAYLOAD_ARG_CNT];
+
+	/* Send request to the PMU */
+	PACK_PAYLOAD1(payload, PM_MMIO_READ, address);
+	status = pm_ipi_send(primary_master, payload);
+
+	if (XST_SUCCESS != status)
+		return status;
+
+	/* Return result from IPI return buffer */
+	return pm_ipi_buff_read32(primary_master, value, NULL, NULL);
+}
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_api_sys.h b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_api_sys.h
new file mode 100644
index 0000000..e5919ca
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_api_sys.h
@@ -0,0 +1,221 @@
+/******************************************************************************
+*
+* Copyright (C) 2015-2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+ * @file pm_api_sys.h
+ * PM API System implementation
+ * @addtogroup xpm_apis XilPM APIs
+ *
+ * Xilinx Power Management(XilPM) provides Embedded Energy Management
+ * Interface (EEMI) APIs for power management on Zynq® UltraScale+™
+ * MPSoC. For more details about power management on Zynq Ultrascale+ MPSoC,
+ * see the Zynq UltraScale+ MPSoC Power Management User Guide (UG1199).
+ * For more details about EEMI, see the Embedded Energy Management Interface
+ * (EEMI) API User Guide(UG1200).
+ * @{
+ *****************************************************************************/
+
+#ifndef _PM_API_SYS_H_
+#define _PM_API_SYS_H_
+
+#include 
+#include 
+#include 
+#include "pm_defs.h"
+#include "pm_common.h"
+
+XStatus XPm_InitXilpm(XIpiPsu *IpiInst);
+
+void XPm_SuspendFinalize();
+
+enum XPmBootStatus XPm_GetBootStatus();
+
+/* System-level API function declarations */
+XStatus XPm_RequestSuspend(const enum XPmNodeId node,
+			   const enum XPmRequestAck ack,
+			   const u32 latency,
+			   const u8 state);
+
+XStatus XPm_SelfSuspend(const enum XPmNodeId node,
+			const u32 latency,
+			const u8 state,
+			const u64 address);
+
+XStatus XPm_ForcePowerDown(const enum XPmNodeId node,
+			   const enum XPmRequestAck ack);
+
+XStatus XPm_AbortSuspend(const enum XPmAbortReason reason);
+
+XStatus XPm_RequestWakeUp(const enum XPmNodeId node,
+			  const bool setAddress,
+			  const u64 address,
+			  const enum XPmRequestAck ack);
+
+XStatus XPm_SetWakeUpSource(const enum XPmNodeId target,
+			    const enum XPmNodeId wkup_node,
+			    const u8 enable);
+
+XStatus XPm_SystemShutdown(u32 type, u32 subtype);
+
+XStatus XPm_SetConfiguration(const u32 address);
+
+XStatus XPm_InitFinalize();
+
+/* Callback API function */
+/*
+ * pm_init_suspend - Init suspend callback arguments (save for custom handling)
+ */
+struct pm_init_suspend {
+	volatile bool received;			/**< Has init suspend callback been received/handled */
+	enum XPmSuspendReason reason;	/**< Reason of initializing suspend */
+	u32 latency;					/**< Maximum allowed latency */
+	u32 state;						/**< Targeted sleep/suspend state */
+	u32 timeout;					/**< Period of time the client has to response */
+};
+
+/*
+ * pm_acknowledge - Acknowledge callback arguments (save for custom handling)
+ */
+struct pm_acknowledge {
+	volatile bool received;		/**< Has acknowledge argument been received? */
+	enum XPmNodeId node;		/**< Node argument about which the acknowledge is */
+	XStatus status;				/**< Acknowledged status */
+	u32 opp;					/**< Operating point of node in question */
+};
+
+/* Forward declaration to enable self reference in struct definition */
+typedef struct XPm_Notifier XPm_Notifier;
+
+/**
+ * XPm_Notifier - Notifier structure registered with a callback by app
+ */
+typedef struct XPm_Notifier {
+	/**
+	 *  Custom callback handler to be called when the notification is
+	 *  received. The custom handler would execute from interrupt
+	 *  context, it shall return quickly and must not block! (enables
+	 *  event-driven notifications)
+	 */
+	void (*const callback)(XPm_Notifier* const notifier);
+	enum XPmNodeId node; /**< Node argument (the node to receive notifications about) */
+	enum XPmNotifyEvent event;	/**< Event argument (the event type to receive notifications about) */
+	u32 flags;	/**< Flags */
+	/**
+	 *  Operating point of node in question. Contains the value updated
+	 *  when the last event notification is received. User shall not
+	 *  modify this value while the notifier is registered.
+	 */
+	volatile u32 oppoint;
+	/**
+	 *  How many times the notification has been received - to be used
+	 *  by application (enables polling). User shall not modify this
+	 *  value while the notifier is registered.
+	 */
+	volatile u32 received;
+	/**
+	 *  Pointer to next notifier in linked list. Must not be modified
+	 *  while the notifier is registered. User shall not ever modify
+	 *  this value.
+	 */
+	XPm_Notifier* next;
+} XPm_Notifier;
+
+/* Notifier Flags */
+#define XILPM_NOTIFIER_FLAG_WAKE	BIT(0) /* wake up PU for notification */
+
+/**
+ * XPm_NodeStatus - struct containing node status information
+ */
+typedef struct XPm_NodeStatus {
+	u32 status;			/**< Node power state */
+	u32 requirements;	/**< Current requirements asserted on the node (slaves only) */
+	u32 usage;			/**< Usage information (which master is currently using the slave) */
+} XPm_NodeStatus;
+
+/********************************************************************/
+/**
+ * Global data declarations
+ ********************************************************************/
+extern struct pm_init_suspend pm_susp;
+extern struct pm_acknowledge pm_ack;
+
+void XPm_InitSuspendCb(const enum XPmSuspendReason reason,
+		       const u32 latency,
+		       const u32 state,
+		       const u32 timeout);
+
+void XPm_AcknowledgeCb(const enum XPmNodeId node,
+		       const XStatus status,
+		       const u32 oppoint);
+
+void XPm_NotifyCb(const enum XPmNodeId node,
+		  const u32 event,
+		  const u32 oppoint);
+
+/* API functions for managing PM Slaves */
+XStatus XPm_RequestNode(const enum XPmNodeId node,
+			const u32 capabilities,
+			const u32 qos,
+			const enum XPmRequestAck ack);
+XStatus XPm_ReleaseNode(const enum XPmNodeId node);
+XStatus XPm_SetRequirement(const enum XPmNodeId node,
+			   const u32 capabilities,
+			   const u32 qos,
+			   const enum XPmRequestAck ack);
+XStatus XPm_SetMaxLatency(const enum XPmNodeId node,
+			  const u32 latency);
+
+/* Miscellaneous API functions */
+XStatus XPm_GetApiVersion(u32 *version);
+
+XStatus XPm_GetNodeStatus(const enum XPmNodeId node,
+			  XPm_NodeStatus *const nodestatus);
+
+XStatus XPm_RegisterNotifier(XPm_Notifier* const notifier);
+XStatus XPm_UnregisterNotifier(XPm_Notifier* const notifier);
+
+XStatus XPm_GetOpCharacteristic(const enum XPmNodeId node,
+				const enum XPmOpCharType type,
+				u32* const result);
+
+/* Direct-Control API functions */
+XStatus XPm_ResetAssert(const enum XPmReset reset,
+			const enum XPmResetAction assert);
+
+XStatus XPm_ResetGetStatus(const enum XPmReset reset, u32 *status);
+
+XStatus XPm_MmioWrite(const u32 address, const u32 mask, const u32 value);
+
+XStatus XPm_MmioRead(const u32 address, u32 *const value);
+/** @} */
+#endif /* _PM_API_SYS_H_ */
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_callbacks.c b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_callbacks.c
new file mode 100644
index 0000000..9ac2a72
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_callbacks.c
@@ -0,0 +1,149 @@
+/******************************************************************************
+*
+* Copyright (C) 2015-2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "pm_callbacks.h"
+#include "pm_client.h"
+
+static XPm_Notifier* notifierList = NULL;
+
+/****************************************************************************/
+/**
+ * @brief  Add notifier into the list
+ *
+ * @param  notifier Pointer to notifier object which needs to be added
+ *  in the list
+ *
+ * @return Returns XST_SUCCESS if notifier is added /
+ *  XST_INVALID_PARAM if given notifier argument is NULL
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_NotifierAdd(XPm_Notifier* const notifier)
+{
+	XStatus status;
+
+	if (!notifier) {
+		status = XST_INVALID_PARAM;
+		goto done;
+	}
+
+	notifier->received = 0;
+
+	/* New notifiers are added at the front of list */
+	notifier->next = notifierList;
+	notifierList = notifier;
+
+	status = XST_SUCCESS;
+
+done:
+	return status;
+}
+
+/****************************************************************************/
+/**
+ * @brief  Remove notifier from the list
+ *
+ * @param  notifier Pointer to notifier object to be removed from list
+ *
+ * @return Returns XST_SUCCESS if notifier is removed /
+ *  XST_INVALID_PARAM if given notifier pointer is NULL /
+ *  XST_FAILURE if notifier is not found
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+XStatus XPm_NotifierRemove(XPm_Notifier* const notifier)
+{
+	XStatus status = XST_FAILURE;
+	XPm_Notifier* curr;
+	XPm_Notifier* prev = NULL;
+
+	if (!notifier) {
+		status = XST_INVALID_PARAM;
+		goto done;
+	}
+
+	curr = notifierList;
+	while (curr) {
+		if (notifier == curr) {
+			if (prev)
+				prev->next = curr->next;
+			else
+				notifierList = curr->next;
+
+			status = XST_SUCCESS;
+			break;
+		}
+		prev = curr;
+		curr = curr->next;
+	}
+
+done:
+	return status;
+}
+
+/****************************************************************************/
+/**
+ * @brief  Call to process notification event
+ *
+ * @param  node    Node which is the subject of notification
+ * @param  event   Event which is the subject of notification
+ * @param  oppoint Operating point of the node in question
+ *
+ * @return None
+ *
+ * @note   None
+ *
+ ****************************************************************************/
+void XPm_NotifierProcessEvent(const enum XPmNodeId node,
+			      const enum XPmNotifyEvent event,
+			      const u32 oppoint)
+{
+	XPm_Notifier* notifier = notifierList;
+
+	while (notifier) {
+		if ((node == notifier->node) &&
+		    (event == notifier->event)) {
+			notifier->oppoint = oppoint;
+			notifier->received++;
+			if (notifier->callback)
+				notifier->callback(notifier);
+			/*
+			 * Don't break here, there could be multiple pairs of
+			 * (node, event) with different notifiers
+			 */
+		}
+		notifier = notifier->next;
+	}
+}
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_callbacks.h b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_callbacks.h
new file mode 100644
index 0000000..6047b64
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_callbacks.h
@@ -0,0 +1,56 @@
+/******************************************************************************
+*
+* Copyright (C) 2015-2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+ * @file pm_callbacks.h
+ *
+ * Callbacks implementation - for xilpm internal purposes only
+ *****************************************************************************/
+
+#ifndef XILPM_CALLBACKS_H_
+#define XILPM_CALLBACKS_H_
+
+#include 
+#include 
+#include "pm_defs.h"
+#include "pm_api_sys.h"
+
+XStatus XPm_NotifierAdd(XPm_Notifier* const notifier);
+
+XStatus XPm_NotifierRemove(XPm_Notifier* const notifier);
+
+void XPm_NotifierProcessEvent(const enum XPmNodeId node,
+			      const enum XPmNotifyEvent event,
+			      const u32 oppoint);
+
+#endif
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_cfg_obj.c b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_cfg_obj.c
new file mode 100644
index 0000000..9f57c6e
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_cfg_obj.c
@@ -0,0 +1,572 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "xil_types.h"
+#include "pm_defs.h"
+
+#define PM_CONFIG_MASTER_SECTION_ID	0x101U
+#define PM_CONFIG_SLAVE_SECTION_ID	0x102U
+#define PM_CONFIG_PREALLOC_SECTION_ID	0x103U
+#define PM_CONFIG_POWER_SECTION_ID	0x104U
+#define PM_CONFIG_RESET_SECTION_ID	0x105U
+#define PM_CONFIG_SHUTDOWN_SECTION_ID	0x106U
+#define PM_CONFIG_SET_CONFIG_SECTION_ID	0x107U
+#define PM_CONFIG_GPO_SECTION_ID	0x108U
+
+#define PM_SLAVE_FLAG_IS_SHAREABLE	0x1U
+#define PM_MASTER_USING_SLAVE_MASK	0x2U
+
+#define PM_CONFIG_GPO1_MIO_PIN_34_MAP	(1U << 10U)
+#define PM_CONFIG_GPO1_MIO_PIN_35_MAP	(1U << 11U)
+#define PM_CONFIG_GPO1_MIO_PIN_36_MAP	(1U << 12U)
+#define PM_CONFIG_GPO1_MIO_PIN_37_MAP	(1U << 13U)
+
+#define PM_CONFIG_GPO1_BIT_2_MASK	(1U << 2U)
+#define PM_CONFIG_GPO1_BIT_3_MASK	(1U << 3U)
+#define PM_CONFIG_GPO1_BIT_4_MASK	(1U << 4U)
+#define PM_CONFIG_GPO1_BIT_5_MASK	(1U << 5U)
+
+#define SUSPEND_TIMEOUT	0xFFFFFFFFU
+
+
+#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK    0x00000001
+#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK    0x00000100
+#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK    0x00000200
+
+
+
+const u32 XPm_ConfigObject[] __attribute__((used, section(".sys_cfg_data"))) = {
+	/**********************************************************************/
+	/* HEADER */
+	1,	/* Number of remaining words in the header */
+	8,	/* Number of sections included in config object */
+	/**********************************************************************/
+	/* MASTER SECTION */
+	PM_CONFIG_MASTER_SECTION_ID, /* Master SectionID */
+	3U, /* No. of Masters*/
+
+	NODE_APU, /* Master Node ID */
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK, /* IPI Mask of this master */
+	SUSPEND_TIMEOUT, /* Suspend timeout */
+	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Suspend permissions */
+	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Wake permissions */
+
+	NODE_RPU_0, /* Master Node ID */
+	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask of this master */
+	SUSPEND_TIMEOUT, /* Suspend timeout */
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Suspend permissions */
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Wake permissions */
+
+	NODE_RPU_1, /* Master Node ID */
+	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask of this master */
+	SUSPEND_TIMEOUT, /* Suspend timeout */
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* Suspend permissions */
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* Wake permissions */
+
+
+	/**********************************************************************/
+	/* SLAVE SECTION */
+
+
+	PM_CONFIG_SLAVE_SECTION_ID,	/* Section ID */
+	49,				/* Number of slaves */
+
+	NODE_OCM_BANK_0,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_OCM_BANK_1,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_OCM_BANK_2,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_OCM_BANK_3,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_TCM_0_A,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
+
+	NODE_TCM_0_B,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
+
+	NODE_TCM_1_A,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_TCM_1_B,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_L2,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_GPU_PP_0,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_GPU_PP_1,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_USB_0,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_USB_1,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_TTC_0,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_TTC_1,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_TTC_2,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_TTC_3,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_SATA,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_ETH_0,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_ETH_1,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_ETH_2,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_ETH_3,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_UART_0,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_UART_1,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_SPI_0,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_SPI_1,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_I2C_0,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_I2C_1,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_SD_0,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_SD_1,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_DP,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_GDMA,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_ADMA,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_NAND,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_QSPI,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_GPIO,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_CAN_0,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_CAN_1,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_EXTERN,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_DDR,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_IPI_APU,
+	0U,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK, /* IPI Mask */
+
+	NODE_IPI_RPU_0,
+	0U,
+	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
+
+	NODE_IPI_RPU_1,
+	0U,
+	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_GPU,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_PCIE,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_PCAP,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_RTC,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+	NODE_VCU,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	0U, /* IPI Mask */
+
+	NODE_PL,
+	PM_SLAVE_FLAG_IS_SHAREABLE,
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+
+
+	/**********************************************************************/
+	/* PREALLOC SECTION */
+
+	PM_CONFIG_PREALLOC_SECTION_ID, /* Preallaoc SectionID */
+	3U, /* No. of Masters*/
+
+/* Prealloc for psu_cortexa53_0 */
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK,
+	12,
+	NODE_IPI_APU,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_DDR,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_L2,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_OCM_BANK_0,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_OCM_BANK_1,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_OCM_BANK_2,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_OCM_BANK_3,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_I2C_0,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_I2C_1,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_SD_1,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_QSPI,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_PL,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+
+	/* Prealloc for psu_cortexr5_0 */
+	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK,
+	3,
+	NODE_IPI_RPU_0,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_TCM_0_A,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_TCM_0_B,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+
+	/* Prealloc for psu_cortexr5_1 */
+	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	3,
+	NODE_IPI_RPU_1,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_TCM_1_A,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+	NODE_TCM_1_B,
+	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
+	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
+
+
+	
+	/**********************************************************************/
+	/* POWER SECTION */
+
+	PM_CONFIG_POWER_SECTION_ID, /* Power Section ID */
+	4U, /* Number of power nodes */
+
+	NODE_APU, /* Power node ID */
+	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
+
+	NODE_RPU, /* Power node ID */
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK, /* Force power down permissions */
+
+	NODE_FPD, /* Power node ID */
+	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
+
+	NODE_PLD, /* Power node ID */
+	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
+
+
+	/**********************************************************************/
+	/* RESET SECTION */
+
+	PM_CONFIG_RESET_SECTION_ID, /* Reset Section ID */
+	120U, /* Number of resets */
+
+	XILPM_RESET_PCIE_CFG, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_PCIE_BRIDGE, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_PCIE_CTRL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_DP, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_SWDT_CRF, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_AFI_FM5, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_AFI_FM4, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_AFI_FM3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_AFI_FM2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_AFI_FM1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_AFI_FM0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GDMA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPU_PP1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPU_PP0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPU, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_SATA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_ACPU3_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_ACPU2_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_ACPU1_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_ACPU0_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_APU_L2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_ACPU3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_ACPU2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_ACPU1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_ACPU0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_DDR, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_APM_FPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_SOFT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GEM0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GEM1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GEM2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GEM3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_QSPI, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_UART0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_UART1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_SPI0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_SPI1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_SDIO0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_SDIO1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_CAN0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_CAN1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_I2C0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_I2C1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_TTC0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_TTC1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_TTC2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_TTC3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_SWDT_CRL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_NAND, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_ADMA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPIO, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_IOU_CC, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_TIMESTAMP, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_RPU_R50, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_RPU_R51, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_RPU_AMBA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_OCM, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_RPU_PGE, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_USB0_CORERESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_USB1_CORERESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_USB0_HIBERRESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_USB1_HIBERRESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_USB0_APB, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_USB1_APB, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_IPI, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_APM_LPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_RTC, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_SYSMON, 0,
+	XILPM_RESET_AFI_FM6, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_LPD_SWDT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_FPD, PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK,
+	XILPM_RESET_RPU_DBG1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_RPU_DBG0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_DBG_LPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_DBG_FPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_APLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_DPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_VPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_IOPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_RPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_4, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_5, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_6, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_7, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_8, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_9, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_10, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_11, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_12, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_13, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_14, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_15, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_16, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_17, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_18, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_19, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_20, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_21, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_22, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_23, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_24, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_25, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_26, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_27, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_28, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_29, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_30, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPO3_PL_31, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_RPU_LS, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_PS_ONLY, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_PL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPIO5_EMIO_92, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPIO5_EMIO_93, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPIO5_EMIO_94, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+	XILPM_RESET_GPIO5_EMIO_95, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
+
+	/**********************************************************************/
+	/* SET CONFIG SECTION */
+	PM_CONFIG_SET_CONFIG_SECTION_ID,	/* Section ID */
+	0,					/* Permissions to set config */
+	/**********************************************************************/
+	/* SHUTDOWN SECTION */
+	PM_CONFIG_SHUTDOWN_SECTION_ID,		/* Section ID */
+	0,					/* Number of shutdown types */
+	/**********************************************************************/
+	/* GPO SECTION */
+	PM_CONFIG_GPO_SECTION_ID,		/* GPO Section ID */
+	PM_CONFIG_GPO1_MIO_PIN_34_MAP |
+	PM_CONFIG_GPO1_MIO_PIN_35_MAP |
+	PM_CONFIG_GPO1_MIO_PIN_36_MAP |
+	PM_CONFIG_GPO1_MIO_PIN_37_MAP |
+	0,					/* State of GPO pins */
+};
+
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_cfg_obj.h b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_cfg_obj.h
new file mode 100644
index 0000000..ac3bcbe
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_cfg_obj.h
@@ -0,0 +1,40 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#ifndef _PM_CFG_OBJ_H_
+#define _PM_CFG_OBJ_H_
+
+#include "xil_types.h"
+
+extern const u32 XPm_ConfigObject[];
+
+#endif /* _PM_CFG_OBJ_H_ */
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_client.c b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_client.c
new file mode 100644
index 0000000..1f08119
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_client.c
@@ -0,0 +1,232 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*
+ * CONTENT
+ * Each PU client in the system have such file with definitions of
+ * masters in the subsystem and functions for getting informations
+ * about the master.
+ */
+
+#include "pm_client.h"
+#include "xparameters.h"
+#include 
+#include 
+#include 
+#include "xreg_cortexr5.h"
+
+#define PM_CLIENT_RPU_ERR_INJ            0xFF9A0020U
+#define PM_CLIENT_RPU_FAULT_LOG_EN_MASK  0x00000101U
+
+/* Mask to get affinity level 0 */
+#define PM_CLIENT_AFL0_MASK              0xFF
+
+static struct XPm_Master pm_rpu_0_master = {
+	.node_id = NODE_RPU_0,
+	.pwrctl = RPU_RPU_0_PWRDWN,
+	.pwrdn_mask = RPU_RPU_0_PWRDWN_EN_MASK,
+	.ipi = NULL,
+};
+
+static struct XPm_Master pm_rpu_1_master = {
+	.node_id = NODE_RPU_1,
+	.pwrctl = RPU_RPU_1_PWRDWN,
+	.pwrdn_mask = RPU_RPU_1_PWRDWN_EN_MASK,
+	.ipi = NULL,
+};
+
+/* Order in pm_master_all array must match cpu ids */
+static struct XPm_Master *const pm_masters_all[] = {
+	&pm_rpu_0_master,
+	&pm_rpu_1_master,
+};
+
+/**
+ * pm_get_master() - returns pointer to the master structure
+ * @cpuid:	id of the cpu whose master struct pointer should be returned
+ *
+ * Return: pointer to a master structure if master is found, otherwise NULL
+ */
+struct XPm_Master *pm_get_master(const u32 cpuid)
+{
+	if (PM_ARRAY_SIZE(pm_masters_all)) {
+		return pm_masters_all[cpuid];
+	}
+	return NULL;
+}
+
+/**
+ * pm_get_master_by_node() - returns pointer to the master structure
+ * @nid:	ndoe id of the cpu master
+ *
+ * Return: pointer to a master structure if master is found, otherwise NULL
+ */
+struct XPm_Master *pm_get_master_by_node(const enum XPmNodeId nid)
+{
+	u8 i;
+
+	for (i = 0; i < PM_ARRAY_SIZE(pm_masters_all); i++) {
+		if (nid == pm_masters_all[i]->node_id) {
+			return pm_masters_all[i];
+		}
+	}
+
+	return NULL;
+}
+
+static u32 pm_get_cpuid(const enum XPmNodeId node)
+{
+	u32 i;
+
+	for (i = 0; i < PM_ARRAY_SIZE(pm_masters_all); i++) {
+		if (pm_masters_all[i]->node_id == node) {
+			return i;
+		}
+	}
+
+	return UNDEFINED_CPUID;
+}
+
+const enum XPmNodeId subsystem_node = NODE_RPU;
+/* By default, lock-step mode is assumed */
+struct XPm_Master *primary_master = &pm_rpu_0_master;
+
+void XPm_ClientSuspend(const struct XPm_Master *const master)
+{
+	u32 pwrdn_req;
+
+	/* Disable interrupts at processor level */
+	pm_disable_int();
+	/* Set powerdown request */
+	pwrdn_req = pm_read(master->pwrctl);
+	pwrdn_req |= master->pwrdn_mask;
+	pm_write(master->pwrctl, pm_read(master->pwrctl) | master->pwrdn_mask);
+}
+
+void XPm_ClientAbortSuspend(void)
+{
+	u32 pwrdn_req = pm_read(primary_master->pwrctl);
+
+	/* Clear powerdown request */
+	pwrdn_req &= ~primary_master->pwrdn_mask;
+	pm_write(primary_master->pwrctl, pwrdn_req);
+	/* Enable interrupts at processor level */
+	pm_enable_int();
+}
+
+void XPm_ClientWakeup(const struct XPm_Master *const master)
+{
+	u32 cpuid = pm_get_cpuid(master->node_id);
+
+	if (UNDEFINED_CPUID != cpuid) {
+		u32 val = pm_read(master->pwrctl);
+		val &= ~(master->pwrdn_mask);
+		pm_write(master->pwrctl, val);
+	}
+}
+
+/**
+ * XPm_ClientSuspendFinalize() - Finalize suspend procedure by executing
+ * 				 wfi instruction
+ */
+void XPm_ClientSuspendFinalize(void)
+{
+	u32 ctrlReg;
+
+	/*
+	 * Unconditionally disable fault log.
+	 * BSP enables it once the processor resumes.
+	 */
+	pm_dbg("Disabling RPU Lock-Step Fault Log...\n");
+	pm_write(PM_CLIENT_RPU_ERR_INJ,
+			pm_read(PM_CLIENT_RPU_ERR_INJ) & ~PM_CLIENT_RPU_FAULT_LOG_EN_MASK);
+
+	/* Flush data cache if the cache is enabled */
+	ctrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+	if (XREG_CP15_CONTROL_C_BIT & ctrlReg)
+		Xil_DCacheFlush();
+
+	pm_dbg("Going to WFI...\n");
+	__asm__("wfi");
+	pm_dbg("WFI exit...\n");
+}
+
+/**
+ * XPm_GetMasterName() - Get name of the master
+ *
+ * This function determines name of the master based on current configuration.
+ *
+ * @return     Name of the master
+ */
+char* XPm_GetMasterName(void)
+{
+	bool lockstep = !(pm_read(RPU_RPU_GLBL_CNTL) &
+		     RPU_RPU_GLBL_CNTL_SLSPLIT_MASK);
+
+	if (lockstep) {
+		return "RPU";
+	} else {
+		switch (primary_master->node_id) {
+		case NODE_RPU_0:
+			return "RPU0";
+		case NODE_RPU_1:
+			return "RPU1";
+		default:
+			return "ERROR";
+		};
+	};
+}
+
+/**
+ * XPm_ClientSetPrimaryMaster() -Set primary master
+ *
+ * This function determines the RPU configuration (split or lock-step mode)
+ * and sets the primary master accordingly.
+ *
+ * If this function is not called, the default configuration is assumed
+ * (i.e. lock-step)
+ */
+void XPm_ClientSetPrimaryMaster(void)
+{
+	u32 master_id;
+	bool lockstep;
+
+	master_id = mfcp(XREG_CP15_MULTI_PROC_AFFINITY) & PM_CLIENT_AFL0_MASK;
+	lockstep = !(pm_read(RPU_RPU_GLBL_CNTL) &
+		     RPU_RPU_GLBL_CNTL_SLSPLIT_MASK);
+	if (lockstep) {
+		primary_master = &pm_rpu_0_master;
+	} else {
+		primary_master = pm_masters_all[master_id];
+	}
+	pm_print("Running in %s mode\n", lockstep ? "Lock-Step" : "Split");
+}
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_client.h b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_client.h
new file mode 100644
index 0000000..a778449
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_client.h
@@ -0,0 +1,58 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*
+ * CONTENT
+ * File is specific for each PU instance and must exist in order to
+ * port Power Management code for some new PU.
+ * Contains PU specific macros and macros to be defined depending on
+ * the execution environment.
+ */
+
+#ifndef _PM_CLIENT_H_
+#define _PM_CLIENT_H_
+
+#include 
+#include 
+#include "pm_rpu.h"
+#include "pm_defs.h"
+#include "pm_common.h"
+
+#define IPI_TRIG_OFFSET		0x0
+#define IPI_OBS_OFFSET		0x4
+
+char* XPm_GetMasterName(void);
+
+#define pm_print(MSG, ...)	xil_printf("%s: "MSG, \
+					   XPm_GetMasterName(), ##__VA_ARGS__)
+
+#endif /* _PM_CLIENT_H_ */
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_common.h b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_common.h
new file mode 100644
index 0000000..c8cfe9b
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_common.h
@@ -0,0 +1,112 @@
+/******************************************************************************
+*
+* Copyright (C) 2015-2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+ * @file pm_common.h
+ *
+ * Definitions of commonly used macros and data types needed for
+ * PU Power Management. This file should be common for all PU's.
+ *****************************************************************************/
+
+#ifndef _PM_COMMON_H_
+#define _PM_COMMON_H_
+
+#include 
+#include "pm_defs.h"
+#include "xparameters.h"
+
+#define DEBUG_MODE
+
+#define PM_ARRAY_SIZE(x)	(sizeof(x) / sizeof(x[0]))
+
+#define PAYLOAD_ARG_CNT		6U	/* 1 for API ID + 5 for API arguments */
+#define RESPONSE_ARG_CNT	4U	/* 1 for status + 3 for values */
+
+#define PM_IPI_TIMEOUT		(~0)
+
+#define IPI_PMU_PM_INT_MASK	XPAR_XIPIPS_TARGET_PSU_PMU_0_CH0_MASK
+
+/**
+ * XPm_Master - Master structure
+ */
+struct XPm_Master {
+	const enum XPmNodeId node_id; /**< Node ID */
+	const u32 pwrctl;             /** < Power Control Register Address */
+	const u32 pwrdn_mask;         /**< Power Down Mask */
+	XIpiPsu *ipi;                 /**< IPI Instance */
+};
+
+enum XPmNodeId pm_get_subsystem_node(void);
+struct XPm_Master *pm_get_master(const u32 cpuid);
+struct XPm_Master *pm_get_master_by_node(const enum XPmNodeId nid);
+
+#define APU_0_PWRCTL_CPUPWRDWNREQ_MASK	0x00000001U
+#define APU_1_PWRCTL_CPUPWRDWNREQ_MASK	0x00000002U
+#define APU_2_PWRCTL_CPUPWRDWNREQ_MASK	0x00000004U
+#define APU_3_PWRCTL_CPUPWRDWNREQ_MASK	0x00000008U
+#define IPI_RPU_MASK			0x00000100U
+
+#define UNDEFINED_CPUID		(~0U)
+
+#define pm_read(addr)		Xil_In32(addr)
+#define pm_write(addr, value)	Xil_Out32(addr, value)
+#define pm_enable_int()		Xil_ExceptionEnable()
+#define pm_disable_int()	Xil_ExceptionDisable()
+
+/* Conditional debugging prints */
+#ifdef DEBUG_MODE
+	#define pm_dbg(MSG, ...) \
+		do { \
+			pm_print(MSG,##__VA_ARGS__); \
+		} while (0)
+#else
+	#define pm_dbg(MSG, ...)	{}
+#endif
+
+#ifndef bool
+	#define bool	u8
+	#define true	1U
+	#define false	0U
+#endif
+
+void XPm_ClientSuspend(const struct XPm_Master *const master);
+void XPm_ClientAbortSuspend(void);
+void XPm_ClientWakeup(const struct XPm_Master *const master);
+void XPm_ClientSuspendFinalize(void);
+void XPm_ClientSetPrimaryMaster(void);
+
+/* Do not modify below this line */
+extern const enum XPmNodeId subsystem_node;
+extern struct XPm_Master *primary_master;
+
+#endif /* _PM_COMMON_H_ */
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_defs.h b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_defs.h
new file mode 100644
index 0000000..96418f8
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_defs.h
@@ -0,0 +1,481 @@
+/******************************************************************************
+*
+* Copyright (C) 2015-2016 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+ * @file pm_defs.h
+ *
+ * PM Definitions implementation
+ * @addtogroup xpm_apis XilPM APIs
+ * @{
+ *****************************************************************************/
+
+#ifndef PM_DEFS_H_
+#define PM_DEFS_H_
+
+/** @name PM Version Number macros
+ *
+ * @{
+ */
+#define PM_VERSION_MAJOR	1
+#define PM_VERSION_MINOR	0
+
+#define PM_VERSION	((PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR)
+/*@}*/
+
+/** @name Capabilities for RAM
+ *
+ * @{
+ */
+#define PM_CAP_ACCESS	0x1U
+#define PM_CAP_CONTEXT	0x2U
+#define PM_CAP_WAKEUP	0x4U
+/*@}*/
+
+/** @name Node default states macros
+ *
+ * @{
+ */
+#define NODE_STATE_OFF		0
+#define NODE_STATE_ON		1
+/*@}*/
+
+/** @name Processor's states macros
+ *
+ * @{
+ */
+#define PROC_STATE_FORCEDOFF	0
+#define PROC_STATE_ACTIVE	1
+#define PROC_STATE_SLEEP	2
+#define PROC_STATE_SUSPENDING	3
+/*@}*/
+
+/** @name Maximum Latency/QOS macros
+ *
+ * @{
+ */
+#define MAX_LATENCY	(~0U)
+#define MAX_QOS		100U
+/*@}*/
+
+/** @name System shutdown/Restart macros
+ *
+ * @{
+ */
+#define PMF_SHUTDOWN_TYPE_SHUTDOWN	0U
+#define PMF_SHUTDOWN_TYPE_RESET		1U
+
+#define PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM	0U
+#define PMF_SHUTDOWN_SUBTYPE_PS_ONLY	1U
+#define PMF_SHUTDOWN_SUBTYPE_SYSTEM	2U
+/*@}*/
+
+/**
+ *  @name APIs for Miscellaneous functions, suspending of PUs, managing PM slaves and Direct control.
+ */
+enum XPmApiId {
+	/** Miscellaneous API functions: */
+	PM_GET_API_VERSION = 1, /**< Do not change or move */
+	PM_SET_CONFIGURATION,
+	PM_GET_NODE_STATUS,
+	PM_GET_OP_CHARACTERISTIC,
+	PM_REGISTER_NOTIFIER,
+	/** API for suspending of PUs: */
+	PM_REQUEST_SUSPEND,
+	PM_SELF_SUSPEND,
+	PM_FORCE_POWERDOWN,
+	PM_ABORT_SUSPEND,
+	PM_REQUEST_WAKEUP,
+	PM_SET_WAKEUP_SOURCE,
+	PM_SYSTEM_SHUTDOWN,
+	/** API for managing PM slaves: */
+	PM_REQUEST_NODE,
+	PM_RELEASE_NODE,
+	PM_SET_REQUIREMENT,
+	PM_SET_MAX_LATENCY,
+	/** Direct control API functions: */
+	PM_RESET_ASSERT,
+	PM_RESET_GET_STATUS,
+	PM_MMIO_WRITE,
+	PM_MMIO_READ,
+	PM_INIT_FINALIZE,
+	PM_FPGA_LOAD,
+	PM_FPGA_GET_STATUS,
+	PM_GET_CHIPID,
+	/* Secure library generic API functions */
+	PM_SECURE_RSA_AES,
+	PM_SECURE_SHA,
+	PM_SECURE_RSA,
+	PM_PINCTRL_REQUEST,
+	PM_PINCTRL_RELEASE,
+	PM_PINCTRL_GET_FUNCTION,
+	PM_PINCTRL_SET_FUNCTION,
+	PM_PINCTRL_CONFIG_PARAM_GET,
+	PM_PINCTRL_CONFIG_PARAM_SET,
+	/* PM IOCTL API */
+	PM_IOCTL,
+	/* API to query information from firmware */
+	PM_QUERY_DATA,
+	/* Clock control API functions */
+	PM_CLOCK_ENABLE,
+	PM_CLOCK_DISABLE,
+	PM_CLOCK_GETSTATE,
+	PM_CLOCK_SETDIVIDER,
+	PM_CLOCK_GETDIVIDER,
+	PM_CLOCK_SETRATE,
+	PM_CLOCK_GETRATE,
+	PM_CLOCK_SETPARENT,
+	PM_CLOCK_GETPARENT,
+	/* Secure image */
+	PM_SECURE_IMAGE,
+	PM_API_MAX
+};
+
+/** @name PM API Min and Max macros
+ *
+ * @{
+ */
+#define PM_API_MIN	PM_GET_API_VERSION
+/*@}*/
+
+/**
+ *  @name PM API Callback Id Enum
+ */
+enum XPmApiCbId {
+	PM_INIT_SUSPEND_CB = 30,
+	PM_ACKNOWLEDGE_CB,
+	PM_NOTIFY_CB,
+};
+
+/**
+ *  @name PM Node ID Enum
+ */
+enum XPmNodeId {
+	NODE_UNKNOWN,
+	NODE_APU,
+	NODE_APU_0,
+	NODE_APU_1,
+	NODE_APU_2,
+	NODE_APU_3,
+	NODE_RPU,
+	NODE_RPU_0,
+	NODE_RPU_1,
+	NODE_PLD,
+	NODE_FPD,
+	NODE_OCM_BANK_0,
+	NODE_OCM_BANK_1,
+	NODE_OCM_BANK_2,
+	NODE_OCM_BANK_3,
+	NODE_TCM_0_A,
+	NODE_TCM_0_B,
+	NODE_TCM_1_A,
+	NODE_TCM_1_B,
+	NODE_L2,
+	NODE_GPU_PP_0,
+	NODE_GPU_PP_1,
+	NODE_USB_0,
+	NODE_USB_1,
+	NODE_TTC_0,
+	NODE_TTC_1,
+	NODE_TTC_2,
+	NODE_TTC_3,
+	NODE_SATA,
+	NODE_ETH_0,
+	NODE_ETH_1,
+	NODE_ETH_2,
+	NODE_ETH_3,
+	NODE_UART_0,
+	NODE_UART_1,
+	NODE_SPI_0,
+	NODE_SPI_1,
+	NODE_I2C_0,
+	NODE_I2C_1,
+	NODE_SD_0,
+	NODE_SD_1,
+	NODE_DP,
+	NODE_GDMA,
+	NODE_ADMA,
+	NODE_NAND,
+	NODE_QSPI,
+	NODE_GPIO,
+	NODE_CAN_0,
+	NODE_CAN_1,
+	NODE_EXTERN,
+	NODE_APLL,
+	NODE_VPLL,
+	NODE_DPLL,
+	NODE_RPLL,
+	NODE_IOPLL,
+	NODE_DDR,
+	NODE_IPI_APU,
+	NODE_IPI_RPU_0,
+	NODE_GPU,
+	NODE_PCIE,
+	NODE_PCAP,
+	NODE_RTC,
+	NODE_LPD,
+	NODE_VCU,
+	NODE_IPI_RPU_1,
+	NODE_IPI_PL_0,
+	NODE_IPI_PL_1,
+	NODE_IPI_PL_2,
+	NODE_IPI_PL_3,
+	NODE_PL,
+	NODE_ID_MAX
+};
+
+/**
+ *  @name PM Acknowledge Request Types
+ */
+enum XPmRequestAck {
+	REQUEST_ACK_NO = 1,
+	REQUEST_ACK_BLOCKING,
+	REQUEST_ACK_NON_BLOCKING,
+	REQUEST_ACK_CB_CERROR,
+};
+
+/**
+ *  @name PM Abort Reasons Enum
+ */
+enum XPmAbortReason {
+	ABORT_REASON_WKUP_EVENT = 100,
+	ABORT_REASON_PU_BUSY,
+	ABORT_REASON_NO_PWRDN,
+	ABORT_REASON_UNKNOWN,
+};
+
+/**
+ *  @name PM Suspend Reasons Enum
+ */
+enum XPmSuspendReason {
+	SUSPEND_REASON_PU_REQ = 201,
+	SUSPEND_REASON_ALERT,
+	SUSPEND_REASON_SYS_SHUTDOWN,
+};
+
+/**
+ *  @name PM RAM States Enum
+ */
+enum XPmRamState {
+	PM_RAM_STATE_OFF = 0,
+	PM_RAM_STATE_RETENTION,
+	PM_RAM_STATE_ON,
+};
+
+/**
+ *  @name PM Operating Characteristic types Enum
+ */
+enum XPmOpCharType {
+	PM_OPCHAR_TYPE_POWER = 1,
+	PM_OPCHAR_TYPE_TEMP,
+	PM_OPCHAR_TYPE_LATENCY,
+};
+
+ /* Power management specific return error statuses */
+/** @defgroup pmstatmacro
+ * @{
+ */
+/** An internal error occurred while performing the requested operation */
+#define XST_PM_INTERNAL  2000L
+/** Conflicting requirements have been asserted when more than one processing
+ * cluster is using the same PM slave */
+#define XST_PM_CONFLICT  2001L
+/** The processing cluster does not have access to the requested node or
+ * operation */
+#define XST_PM_NO_ACCESS  2002L
+/** The API function does not apply to the node passed as argument */
+#define XST_PM_INVALID_NODE  2003L
+/**  A processing cluster has already been assigned access to a PM slave and
+ * has issued a duplicate request for that PM slave */
+#define XST_PM_DOUBLE_REQ  2004L
+/** The target processing cluster has aborted suspend */
+#define XST_PM_ABORT_SUSPEND  2005L
+/** A timeout occurred while performing the requested operation*/
+#define XST_PM_TIMEOUT   2006L
+/**  Slave request cannot be granted since node is non-shareable and used */
+#define XST_PM_NODE_USED  2007L
+/**@}*/
+
+/**
+ *  @name Boot Status Enum
+ */
+enum XPmBootStatus {
+	PM_INITIAL_BOOT,	/**< boot is a fresh system startup */
+	PM_RESUME,			/**< boot is a resume */
+	PM_BOOT_ERROR,		/**< error, boot cause cannot be identified */
+};
+
+/**
+ *  @name PM Reset Action types
+ */
+enum XPmResetAction {
+	XILPM_RESET_ACTION_RELEASE,
+	XILPM_RESET_ACTION_ASSERT,
+	XILPM_RESET_ACTION_PULSE,
+};
+
+/**
+ *  @name PM Reset Line IDs
+ */
+enum XPmReset {
+	XILPM_RESET_PCIE_CFG = 1000,
+	XILPM_RESET_PCIE_BRIDGE,
+	XILPM_RESET_PCIE_CTRL,
+	XILPM_RESET_DP,
+	XILPM_RESET_SWDT_CRF,
+	XILPM_RESET_AFI_FM5,
+	XILPM_RESET_AFI_FM4,
+	XILPM_RESET_AFI_FM3,
+	XILPM_RESET_AFI_FM2,
+	XILPM_RESET_AFI_FM1,
+	XILPM_RESET_AFI_FM0,
+	XILPM_RESET_GDMA,
+	XILPM_RESET_GPU_PP1,
+	XILPM_RESET_GPU_PP0,
+	XILPM_RESET_GPU,
+	XILPM_RESET_GT,
+	XILPM_RESET_SATA,
+	XILPM_RESET_ACPU3_PWRON,
+	XILPM_RESET_ACPU2_PWRON,
+	XILPM_RESET_ACPU1_PWRON,
+	XILPM_RESET_ACPU0_PWRON,
+	XILPM_RESET_APU_L2,
+	XILPM_RESET_ACPU3,
+	XILPM_RESET_ACPU2,
+	XILPM_RESET_ACPU1,
+	XILPM_RESET_ACPU0,
+	XILPM_RESET_DDR,
+	XILPM_RESET_APM_FPD,
+	XILPM_RESET_SOFT,
+	XILPM_RESET_GEM0,
+	XILPM_RESET_GEM1,
+	XILPM_RESET_GEM2,
+	XILPM_RESET_GEM3,
+	XILPM_RESET_QSPI,
+	XILPM_RESET_UART0,
+	XILPM_RESET_UART1,
+	XILPM_RESET_SPI0,
+	XILPM_RESET_SPI1,
+	XILPM_RESET_SDIO0,
+	XILPM_RESET_SDIO1,
+	XILPM_RESET_CAN0,
+	XILPM_RESET_CAN1,
+	XILPM_RESET_I2C0,
+	XILPM_RESET_I2C1,
+	XILPM_RESET_TTC0,
+	XILPM_RESET_TTC1,
+	XILPM_RESET_TTC2,
+	XILPM_RESET_TTC3,
+	XILPM_RESET_SWDT_CRL,
+	XILPM_RESET_NAND,
+	XILPM_RESET_ADMA,
+	XILPM_RESET_GPIO,
+	XILPM_RESET_IOU_CC,
+	XILPM_RESET_TIMESTAMP,
+	XILPM_RESET_RPU_R50,
+	XILPM_RESET_RPU_R51,
+	XILPM_RESET_RPU_AMBA,
+	XILPM_RESET_OCM,
+	XILPM_RESET_RPU_PGE,
+	XILPM_RESET_USB0_CORERESET,
+	XILPM_RESET_USB1_CORERESET,
+	XILPM_RESET_USB0_HIBERRESET,
+	XILPM_RESET_USB1_HIBERRESET,
+	XILPM_RESET_USB0_APB,
+	XILPM_RESET_USB1_APB,
+	XILPM_RESET_IPI,
+	XILPM_RESET_APM_LPD,
+	XILPM_RESET_RTC,
+	XILPM_RESET_SYSMON,
+	XILPM_RESET_AFI_FM6,
+	XILPM_RESET_LPD_SWDT,
+	XILPM_RESET_FPD,
+	XILPM_RESET_RPU_DBG1,
+	XILPM_RESET_RPU_DBG0,
+	XILPM_RESET_DBG_LPD,
+	XILPM_RESET_DBG_FPD,
+	XILPM_RESET_APLL,
+	XILPM_RESET_DPLL,
+	XILPM_RESET_VPLL,
+	XILPM_RESET_IOPLL,
+	XILPM_RESET_RPLL,
+	XILPM_RESET_GPO3_PL_0,
+	XILPM_RESET_GPO3_PL_1,
+	XILPM_RESET_GPO3_PL_2,
+	XILPM_RESET_GPO3_PL_3,
+	XILPM_RESET_GPO3_PL_4,
+	XILPM_RESET_GPO3_PL_5,
+	XILPM_RESET_GPO3_PL_6,
+	XILPM_RESET_GPO3_PL_7,
+	XILPM_RESET_GPO3_PL_8,
+	XILPM_RESET_GPO3_PL_9,
+	XILPM_RESET_GPO3_PL_10,
+	XILPM_RESET_GPO3_PL_11,
+	XILPM_RESET_GPO3_PL_12,
+	XILPM_RESET_GPO3_PL_13,
+	XILPM_RESET_GPO3_PL_14,
+	XILPM_RESET_GPO3_PL_15,
+	XILPM_RESET_GPO3_PL_16,
+	XILPM_RESET_GPO3_PL_17,
+	XILPM_RESET_GPO3_PL_18,
+	XILPM_RESET_GPO3_PL_19,
+	XILPM_RESET_GPO3_PL_20,
+	XILPM_RESET_GPO3_PL_21,
+	XILPM_RESET_GPO3_PL_22,
+	XILPM_RESET_GPO3_PL_23,
+	XILPM_RESET_GPO3_PL_24,
+	XILPM_RESET_GPO3_PL_25,
+	XILPM_RESET_GPO3_PL_26,
+	XILPM_RESET_GPO3_PL_27,
+	XILPM_RESET_GPO3_PL_28,
+	XILPM_RESET_GPO3_PL_29,
+	XILPM_RESET_GPO3_PL_30,
+	XILPM_RESET_GPO3_PL_31,
+	XILPM_RESET_RPU_LS,
+	XILPM_RESET_PS_ONLY,
+	XILPM_RESET_PL,
+	XILPM_RESET_GPIO5_EMIO_92,
+	XILPM_RESET_GPIO5_EMIO_93,
+	XILPM_RESET_GPIO5_EMIO_94,
+	XILPM_RESET_GPIO5_EMIO_95,
+};
+
+/**
+ *  @name PM Notify Events Enum
+ */
+enum XPmNotifyEvent {
+	EVENT_STATE_CHANGE = 1,
+	EVENT_ZERO_USERS = 2,
+	EVENT_ERROR_CONDITION = 4,
+};
+ /** @} */
+#endif /* PM_DEFS_H_ */
diff --git a/src/Xilinx/libsrc/xilpm_v2_3/src/pm_rpu.h b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_rpu.h
new file mode 100644
index 0000000..cf8eef1
--- /dev/null
+++ b/src/Xilinx/libsrc/xilpm_v2_3/src/pm_rpu.h
@@ -0,0 +1,1527 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#ifndef _PM_RPU_H_
+#define _PM_RPU_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * RPU Base Address
+ */
+#define RPU_BASEADDR      0XFF9A0000
+
+/**
+ * Register: RPU_RPU_GLBL_CNTL
+ */
+#define RPU_RPU_GLBL_CNTL    ( ( RPU_BASEADDR ) + 0X00000000 )
+
+#define RPU_RPU_GLBL_CNTL_GIC_AXPROT_SHIFT   10
+#define RPU_RPU_GLBL_CNTL_GIC_AXPROT_WIDTH   1
+#define RPU_RPU_GLBL_CNTL_GIC_AXPROT_MASK    0X00000400
+
+#define RPU_RPU_GLBL_CNTL_TCM_CLK_CNTL_SHIFT   8
+#define RPU_RPU_GLBL_CNTL_TCM_CLK_CNTL_WIDTH   1
+#define RPU_RPU_GLBL_CNTL_TCM_CLK_CNTL_MASK    0X00000100
+
+#define RPU_RPU_GLBL_CNTL_TCM_WAIT_SHIFT   7
+#define RPU_RPU_GLBL_CNTL_TCM_WAIT_WIDTH   1
+#define RPU_RPU_GLBL_CNTL_TCM_WAIT_MASK    0X00000080
+
+#define RPU_RPU_GLBL_CNTL_TCM_COMB_SHIFT   6
+#define RPU_RPU_GLBL_CNTL_TCM_COMB_WIDTH   1
+#define RPU_RPU_GLBL_CNTL_TCM_COMB_MASK    0X00000040
+
+#define RPU_RPU_GLBL_CNTL_TEINIT_SHIFT   5
+#define RPU_RPU_GLBL_CNTL_TEINIT_WIDTH   1
+#define RPU_RPU_GLBL_CNTL_TEINIT_MASK    0X00000020
+
+#define RPU_RPU_GLBL_CNTL_SLCLAMP_SHIFT   4
+#define RPU_RPU_GLBL_CNTL_SLCLAMP_WIDTH   1
+#define RPU_RPU_GLBL_CNTL_SLCLAMP_MASK    0X00000010
+
+#define RPU_RPU_GLBL_CNTL_SLSPLIT_SHIFT   3
+#define RPU_RPU_GLBL_CNTL_SLSPLIT_WIDTH   1
+#define RPU_RPU_GLBL_CNTL_SLSPLIT_MASK    0X00000008
+
+#define RPU_RPU_GLBL_CNTL_DBGNOCLKSTOP_SHIFT   2
+#define RPU_RPU_GLBL_CNTL_DBGNOCLKSTOP_WIDTH   1
+#define RPU_RPU_GLBL_CNTL_DBGNOCLKSTOP_MASK    0X00000004
+
+#define RPU_RPU_GLBL_CNTL_CFGIE_SHIFT   1
+#define RPU_RPU_GLBL_CNTL_CFGIE_WIDTH   1
+#define RPU_RPU_GLBL_CNTL_CFGIE_MASK    0X00000002
+
+#define RPU_RPU_GLBL_CNTL_CFGEE_SHIFT   0
+#define RPU_RPU_GLBL_CNTL_CFGEE_WIDTH   1
+#define RPU_RPU_GLBL_CNTL_CFGEE_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_GLBL_STATUS
+ */
+#define RPU_RPU_GLBL_STATUS    ( ( RPU_BASEADDR ) + 0X00000004 )
+
+#define RPU_RPU_GLBL_STATUS_DBGNOPWRDWN_SHIFT   0
+#define RPU_RPU_GLBL_STATUS_DBGNOPWRDWN_WIDTH   1
+#define RPU_RPU_GLBL_STATUS_DBGNOPWRDWN_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_ERR_CNTL
+ */
+#define RPU_RPU_ERR_CNTL    ( ( RPU_BASEADDR ) + 0X00000008 )
+
+#define RPU_RPU_ERR_CNTL_APB_ERR_RES_SHIFT   0
+#define RPU_RPU_ERR_CNTL_APB_ERR_RES_WIDTH   1
+#define RPU_RPU_ERR_CNTL_APB_ERR_RES_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_RAM
+ */
+#define RPU_RPU_RAM    ( ( RPU_BASEADDR ) + 0X0000000C )
+
+#define RPU_RPU_RAM_RAMCONTROL1_SHIFT   8
+#define RPU_RPU_RAM_RAMCONTROL1_WIDTH   8
+#define RPU_RPU_RAM_RAMCONTROL1_MASK    0X0000FF00
+
+#define RPU_RPU_RAM_RAMCONTROL0_SHIFT   0
+#define RPU_RPU_RAM_RAMCONTROL0_WIDTH   8
+#define RPU_RPU_RAM_RAMCONTROL0_MASK    0X000000FF
+
+/**
+ * Register: RPU_RPU_CACHE_DATA
+ */
+#define RPU_RPU_CACHE_DATA    ( ( RPU_BASEADDR ) + 0X00000010 )
+
+#define RPU_RPU_CACHE_DATA_DDIRTY_EMAS_SHIFT   29
+#define RPU_RPU_CACHE_DATA_DDIRTY_EMAS_WIDTH   1
+#define RPU_RPU_CACHE_DATA_DDIRTY_EMAS_MASK    0X20000000
+
+#define RPU_RPU_CACHE_DATA_DDIRTY_EMAW_SHIFT   27
+#define RPU_RPU_CACHE_DATA_DDIRTY_EMAW_WIDTH   2
+#define RPU_RPU_CACHE_DATA_DDIRTY_EMAW_MASK    0X18000000
+
+#define RPU_RPU_CACHE_DATA_DDIRTY_EMA_SHIFT   24
+#define RPU_RPU_CACHE_DATA_DDIRTY_EMA_WIDTH   3
+#define RPU_RPU_CACHE_DATA_DDIRTY_EMA_MASK    0X07000000
+
+#define RPU_RPU_CACHE_DATA_DTAG_EMAS_SHIFT   23
+#define RPU_RPU_CACHE_DATA_DTAG_EMAS_WIDTH   1
+#define RPU_RPU_CACHE_DATA_DTAG_EMAS_MASK    0X00800000
+
+#define RPU_RPU_CACHE_DATA_DTAG_EMAW_SHIFT   21
+#define RPU_RPU_CACHE_DATA_DTAG_EMAW_WIDTH   2
+#define RPU_RPU_CACHE_DATA_DTAG_EMAW_MASK    0X00600000
+
+#define RPU_RPU_CACHE_DATA_DTAG_EMA_SHIFT   18
+#define RPU_RPU_CACHE_DATA_DTAG_EMA_WIDTH   3
+#define RPU_RPU_CACHE_DATA_DTAG_EMA_MASK    0X001C0000
+
+#define RPU_RPU_CACHE_DATA_DDATA_EMAS_SHIFT   17
+#define RPU_RPU_CACHE_DATA_DDATA_EMAS_WIDTH   1
+#define RPU_RPU_CACHE_DATA_DDATA_EMAS_MASK    0X00020000
+
+#define RPU_RPU_CACHE_DATA_DDATA_EMAW_SHIFT   15
+#define RPU_RPU_CACHE_DATA_DDATA_EMAW_WIDTH   2
+#define RPU_RPU_CACHE_DATA_DDATA_EMAW_MASK    0X00018000
+
+#define RPU_RPU_CACHE_DATA_DDATA_EMA_SHIFT   12
+#define RPU_RPU_CACHE_DATA_DDATA_EMA_WIDTH   3
+#define RPU_RPU_CACHE_DATA_DDATA_EMA_MASK    0X00007000
+
+#define RPU_RPU_CACHE_DATA_ITAG_EMAS_SHIFT   11
+#define RPU_RPU_CACHE_DATA_ITAG_EMAS_WIDTH   1
+#define RPU_RPU_CACHE_DATA_ITAG_EMAS_MASK    0X00000800
+
+#define RPU_RPU_CACHE_DATA_ITAG_EMAW_SHIFT   9
+#define RPU_RPU_CACHE_DATA_ITAG_EMAW_WIDTH   2
+#define RPU_RPU_CACHE_DATA_ITAG_EMAW_MASK    0X00000600
+
+#define RPU_RPU_CACHE_DATA_ITAG_EMA_SHIFT   6
+#define RPU_RPU_CACHE_DATA_ITAG_EMA_WIDTH   3
+#define RPU_RPU_CACHE_DATA_ITAG_EMA_MASK    0X000001C0
+
+#define RPU_RPU_CACHE_DATA_IDATA_EMAS_SHIFT   5
+#define RPU_RPU_CACHE_DATA_IDATA_EMAS_WIDTH   1
+#define RPU_RPU_CACHE_DATA_IDATA_EMAS_MASK    0X00000020
+
+#define RPU_RPU_CACHE_DATA_IDATA_EMAW_SHIFT   3
+#define RPU_RPU_CACHE_DATA_IDATA_EMAW_WIDTH   2
+#define RPU_RPU_CACHE_DATA_IDATA_EMAW_MASK    0X00000018
+
+#define RPU_RPU_CACHE_DATA_IDATA_EMA_SHIFT   0
+#define RPU_RPU_CACHE_DATA_IDATA_EMA_WIDTH   3
+#define RPU_RPU_CACHE_DATA_IDATA_EMA_MASK    0X00000007
+
+/**
+ * Register: RPU_RPU_CACHE_SYN
+ */
+#define RPU_RPU_CACHE_SYN    ( ( RPU_BASEADDR ) + 0X00000014 )
+
+#define RPU_RPU_CACHE_SYN_DDIRTY_EMAS_SHIFT   29
+#define RPU_RPU_CACHE_SYN_DDIRTY_EMAS_WIDTH   1
+#define RPU_RPU_CACHE_SYN_DDIRTY_EMAS_MASK    0X20000000
+
+#define RPU_RPU_CACHE_SYN_DDIRTY_EMAW_SHIFT   27
+#define RPU_RPU_CACHE_SYN_DDIRTY_EMAW_WIDTH   2
+#define RPU_RPU_CACHE_SYN_DDIRTY_EMAW_MASK    0X18000000
+
+#define RPU_RPU_CACHE_SYN_DDIRTY_EMA_SHIFT   24
+#define RPU_RPU_CACHE_SYN_DDIRTY_EMA_WIDTH   3
+#define RPU_RPU_CACHE_SYN_DDIRTY_EMA_MASK    0X07000000
+
+#define RPU_RPU_CACHE_SYN_DTAG_EMAS_SHIFT   23
+#define RPU_RPU_CACHE_SYN_DTAG_EMAS_WIDTH   1
+#define RPU_RPU_CACHE_SYN_DTAG_EMAS_MASK    0X00800000
+
+#define RPU_RPU_CACHE_SYN_DTAG_EMAW_SHIFT   21
+#define RPU_RPU_CACHE_SYN_DTAG_EMAW_WIDTH   2
+#define RPU_RPU_CACHE_SYN_DTAG_EMAW_MASK    0X00600000
+
+#define RPU_RPU_CACHE_SYN_DTAG_EMA_SHIFT   18
+#define RPU_RPU_CACHE_SYN_DTAG_EMA_WIDTH   3
+#define RPU_RPU_CACHE_SYN_DTAG_EMA_MASK    0X001C0000
+
+#define RPU_RPU_CACHE_SYN_DDATA_EMAS_SHIFT   17
+#define RPU_RPU_CACHE_SYN_DDATA_EMAS_WIDTH   1
+#define RPU_RPU_CACHE_SYN_DDATA_EMAS_MASK    0X00020000
+
+#define RPU_RPU_CACHE_SYN_DDATA_EMAW_SHIFT   15
+#define RPU_RPU_CACHE_SYN_DDATA_EMAW_WIDTH   2
+#define RPU_RPU_CACHE_SYN_DDATA_EMAW_MASK    0X00018000
+
+#define RPU_RPU_CACHE_SYN_DDATA_EMA_SHIFT   12
+#define RPU_RPU_CACHE_SYN_DDATA_EMA_WIDTH   3
+#define RPU_RPU_CACHE_SYN_DDATA_EMA_MASK    0X00007000
+
+#define RPU_RPU_CACHE_SYN_ITAG_EMAS_SHIFT   11
+#define RPU_RPU_CACHE_SYN_ITAG_EMAS_WIDTH   1
+#define RPU_RPU_CACHE_SYN_ITAG_EMAS_MASK    0X00000800
+
+#define RPU_RPU_CACHE_SYN_ITAG_EMAW_SHIFT   9
+#define RPU_RPU_CACHE_SYN_ITAG_EMAW_WIDTH   2
+#define RPU_RPU_CACHE_SYN_ITAG_EMAW_MASK    0X00000600
+
+#define RPU_RPU_CACHE_SYN_ITAG_EMA_SHIFT   6
+#define RPU_RPU_CACHE_SYN_ITAG_EMA_WIDTH   3
+#define RPU_RPU_CACHE_SYN_ITAG_EMA_MASK    0X000001C0
+
+#define RPU_RPU_CACHE_SYN_IDATA_EMAS_SHIFT   5
+#define RPU_RPU_CACHE_SYN_IDATA_EMAS_WIDTH   1
+#define RPU_RPU_CACHE_SYN_IDATA_EMAS_MASK    0X00000020
+
+#define RPU_RPU_CACHE_SYN_IDATA_EMAW_SHIFT   3
+#define RPU_RPU_CACHE_SYN_IDATA_EMAW_WIDTH   2
+#define RPU_RPU_CACHE_SYN_IDATA_EMAW_MASK    0X00000018
+
+#define RPU_RPU_CACHE_SYN_IDATA_EMA_SHIFT   0
+#define RPU_RPU_CACHE_SYN_IDATA_EMA_WIDTH   3
+#define RPU_RPU_CACHE_SYN_IDATA_EMA_MASK    0X00000007
+
+/**
+ * Register: RPU_RPU_TCM_DATA
+ */
+#define RPU_RPU_TCM_DATA    ( ( RPU_BASEADDR ) + 0X00000018 )
+
+#define RPU_RPU_TCM_DATA_B_EMAS_SHIFT   17
+#define RPU_RPU_TCM_DATA_B_EMAS_WIDTH   1
+#define RPU_RPU_TCM_DATA_B_EMAS_MASK    0X00020000
+
+#define RPU_RPU_TCM_DATA_B_EMAW_SHIFT   15
+#define RPU_RPU_TCM_DATA_B_EMAW_WIDTH   2
+#define RPU_RPU_TCM_DATA_B_EMAW_MASK    0X00018000
+
+#define RPU_RPU_TCM_DATA_B_EMA_SHIFT   12
+#define RPU_RPU_TCM_DATA_B_EMA_WIDTH   3
+#define RPU_RPU_TCM_DATA_B_EMA_MASK    0X00007000
+
+#define RPU_RPU_TCM_DATA_A_EMAS_SHIFT   5
+#define RPU_RPU_TCM_DATA_A_EMAS_WIDTH   1
+#define RPU_RPU_TCM_DATA_A_EMAS_MASK    0X00000020
+
+#define RPU_RPU_TCM_DATA_A_EMAW_SHIFT   3
+#define RPU_RPU_TCM_DATA_A_EMAW_WIDTH   2
+#define RPU_RPU_TCM_DATA_A_EMAW_MASK    0X00000018
+
+#define RPU_RPU_TCM_DATA_A_EMA_SHIFT   0
+#define RPU_RPU_TCM_DATA_A_EMA_WIDTH   3
+#define RPU_RPU_TCM_DATA_A_EMA_MASK    0X00000007
+
+/**
+ * Register: RPU_RPU_TCM_SYN
+ */
+#define RPU_RPU_TCM_SYN    ( ( RPU_BASEADDR ) + 0X0000001C )
+
+#define RPU_RPU_TCM_SYN_B_EMAS_SHIFT   23
+#define RPU_RPU_TCM_SYN_B_EMAS_WIDTH   1
+#define RPU_RPU_TCM_SYN_B_EMAS_MASK    0X00800000
+
+#define RPU_RPU_TCM_SYN_B_EMAW_SHIFT   21
+#define RPU_RPU_TCM_SYN_B_EMAW_WIDTH   2
+#define RPU_RPU_TCM_SYN_B_EMAW_MASK    0X00600000
+
+#define RPU_RPU_TCM_SYN_B_EMA_SHIFT   18
+#define RPU_RPU_TCM_SYN_B_EMA_WIDTH   3
+#define RPU_RPU_TCM_SYN_B_EMA_MASK    0X001C0000
+
+#define RPU_RPU_TCM_SYN_A_EMAS_SHIFT   11
+#define RPU_RPU_TCM_SYN_A_EMAS_WIDTH   1
+#define RPU_RPU_TCM_SYN_A_EMAS_MASK    0X00000800
+
+#define RPU_RPU_TCM_SYN_A_EMAW_SHIFT   9
+#define RPU_RPU_TCM_SYN_A_EMAW_WIDTH   2
+#define RPU_RPU_TCM_SYN_A_EMAW_MASK    0X00000600
+
+#define RPU_RPU_TCM_SYN_A_EMA_SHIFT   6
+#define RPU_RPU_TCM_SYN_A_EMA_WIDTH   3
+#define RPU_RPU_TCM_SYN_A_EMA_MASK    0X000001C0
+
+/**
+ * Register: RPU_RPU_ERR_INJ
+ */
+#define RPU_RPU_ERR_INJ    ( ( RPU_BASEADDR ) + 0X00000020 )
+
+#define RPU_RPU_ERR_INJ_DCCMINP2_SHIFT   8
+#define RPU_RPU_ERR_INJ_DCCMINP2_WIDTH   8
+#define RPU_RPU_ERR_INJ_DCCMINP2_MASK    0X0000FF00
+
+#define RPU_RPU_ERR_INJ_DCCMINP_SHIFT   0
+#define RPU_RPU_ERR_INJ_DCCMINP_WIDTH   8
+#define RPU_RPU_ERR_INJ_DCCMINP_MASK    0X000000FF
+
+/**
+ * Register: RPU_RPU_CCF_MASK
+ */
+#define RPU_RPU_CCF_MASK    ( ( RPU_BASEADDR ) + 0X00000024 )
+
+#define RPU_RPU_CCF_MASK_TEST_MBIST_MODE_SHIFT   7
+#define RPU_RPU_CCF_MASK_TEST_MBIST_MODE_WIDTH   1
+#define RPU_RPU_CCF_MASK_TEST_MBIST_MODE_MASK    0X00000080
+
+#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_LP_SHIFT   6
+#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_LP_WIDTH   1
+#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_LP_MASK    0X00000040
+
+#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_SHIFT   5
+#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_WIDTH   1
+#define RPU_RPU_CCF_MASK_TEST_SCAN_MODE_MASK    0X00000020
+
+#define RPU_RPU_CCF_MASK_ISO_SHIFT   4
+#define RPU_RPU_CCF_MASK_ISO_WIDTH   1
+#define RPU_RPU_CCF_MASK_ISO_MASK    0X00000010
+
+#define RPU_RPU_CCF_MASK_PGE_SHIFT   3
+#define RPU_RPU_CCF_MASK_PGE_WIDTH   1
+#define RPU_RPU_CCF_MASK_PGE_MASK    0X00000008
+
+#define RPU_RPU_CCF_MASK_R50_DBG_RST_SHIFT   2
+#define RPU_RPU_CCF_MASK_R50_DBG_RST_WIDTH   1
+#define RPU_RPU_CCF_MASK_R50_DBG_RST_MASK    0X00000004
+
+#define RPU_RPU_CCF_MASK_R50_RST_SHIFT   1
+#define RPU_RPU_CCF_MASK_R50_RST_WIDTH   1
+#define RPU_RPU_CCF_MASK_R50_RST_MASK    0X00000002
+
+#define RPU_RPU_CCF_MASK_PGE_RST_SHIFT   0
+#define RPU_RPU_CCF_MASK_PGE_RST_WIDTH   1
+#define RPU_RPU_CCF_MASK_PGE_RST_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_INTR_0
+ */
+#define RPU_RPU_INTR_0    ( ( RPU_BASEADDR ) + 0X00000028 )
+
+#define RPU_RPU_INTR_0_SPI_SHIFT   0
+#define RPU_RPU_INTR_0_SPI_WIDTH   32
+#define RPU_RPU_INTR_0_SPI_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_INTR_1
+ */
+#define RPU_RPU_INTR_1    ( ( RPU_BASEADDR ) + 0X0000002C )
+
+#define RPU_RPU_INTR_1_SPI_SHIFT   0
+#define RPU_RPU_INTR_1_SPI_WIDTH   32
+#define RPU_RPU_INTR_1_SPI_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_INTR_2
+ */
+#define RPU_RPU_INTR_2    ( ( RPU_BASEADDR ) + 0X00000030 )
+
+#define RPU_RPU_INTR_2_SPI_SHIFT   0
+#define RPU_RPU_INTR_2_SPI_WIDTH   32
+#define RPU_RPU_INTR_2_SPI_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_INTR_3
+ */
+#define RPU_RPU_INTR_3    ( ( RPU_BASEADDR ) + 0X00000034 )
+
+#define RPU_RPU_INTR_3_SPI_SHIFT   0
+#define RPU_RPU_INTR_3_SPI_WIDTH   32
+#define RPU_RPU_INTR_3_SPI_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_INTR_4
+ */
+#define RPU_RPU_INTR_4    ( ( RPU_BASEADDR ) + 0X00000038 )
+
+#define RPU_RPU_INTR_4_SPI_SHIFT   0
+#define RPU_RPU_INTR_4_SPI_WIDTH   32
+#define RPU_RPU_INTR_4_SPI_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_INTR_MASK_0
+ */
+#define RPU_RPU_INTR_MASK_0    ( ( RPU_BASEADDR ) + 0X00000040 )
+
+#define RPU_RPU_INTR_MASK_0_SPI_SHIFT   0
+#define RPU_RPU_INTR_MASK_0_SPI_WIDTH   32
+#define RPU_RPU_INTR_MASK_0_SPI_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_INTR_MASK_1
+ */
+#define RPU_RPU_INTR_MASK_1    ( ( RPU_BASEADDR ) + 0X00000044 )
+
+#define RPU_RPU_INTR_MASK_1_SPI_SHIFT   0
+#define RPU_RPU_INTR_MASK_1_SPI_WIDTH   32
+#define RPU_RPU_INTR_MASK_1_SPI_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_INTR_MASK_2
+ */
+#define RPU_RPU_INTR_MASK_2    ( ( RPU_BASEADDR ) + 0X00000048 )
+
+#define RPU_RPU_INTR_MASK_2_SPI_SHIFT   0
+#define RPU_RPU_INTR_MASK_2_SPI_WIDTH   32
+#define RPU_RPU_INTR_MASK_2_SPI_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_INTR_MASK_3
+ */
+#define RPU_RPU_INTR_MASK_3    ( ( RPU_BASEADDR ) + 0X0000004C )
+
+#define RPU_RPU_INTR_MASK_3_SPI_SHIFT   0
+#define RPU_RPU_INTR_MASK_3_SPI_WIDTH   32
+#define RPU_RPU_INTR_MASK_3_SPI_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_INTR_MASK_4
+ */
+#define RPU_RPU_INTR_MASK_4    ( ( RPU_BASEADDR ) + 0X00000050 )
+
+#define RPU_RPU_INTR_MASK_4_SPI_SHIFT   0
+#define RPU_RPU_INTR_MASK_4_SPI_WIDTH   32
+#define RPU_RPU_INTR_MASK_4_SPI_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_CCF_VAL
+ */
+#define RPU_RPU_CCF_VAL    ( ( RPU_BASEADDR ) + 0X00000054 )
+
+#define RPU_RPU_CCF_VAL_TEST_MBIST_MODE_SHIFT   7
+#define RPU_RPU_CCF_VAL_TEST_MBIST_MODE_WIDTH   1
+#define RPU_RPU_CCF_VAL_TEST_MBIST_MODE_MASK    0X00000080
+
+#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_LP_SHIFT   6
+#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_LP_WIDTH   1
+#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_LP_MASK    0X00000040
+
+#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_SHIFT   5
+#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_WIDTH   1
+#define RPU_RPU_CCF_VAL_TEST_SCAN_MODE_MASK    0X00000020
+
+#define RPU_RPU_CCF_VAL_ISO_SHIFT   4
+#define RPU_RPU_CCF_VAL_ISO_WIDTH   1
+#define RPU_RPU_CCF_VAL_ISO_MASK    0X00000010
+
+#define RPU_RPU_CCF_VAL_PGE_SHIFT   3
+#define RPU_RPU_CCF_VAL_PGE_WIDTH   1
+#define RPU_RPU_CCF_VAL_PGE_MASK    0X00000008
+
+#define RPU_RPU_CCF_VAL_R50_DBG_RST_SHIFT   2
+#define RPU_RPU_CCF_VAL_R50_DBG_RST_WIDTH   1
+#define RPU_RPU_CCF_VAL_R50_DBG_RST_MASK    0X00000004
+
+#define RPU_RPU_CCF_VAL_R50_RST_SHIFT   1
+#define RPU_RPU_CCF_VAL_R50_RST_WIDTH   1
+#define RPU_RPU_CCF_VAL_R50_RST_MASK    0X00000002
+
+#define RPU_RPU_CCF_VAL_PGE_RST_SHIFT   0
+#define RPU_RPU_CCF_VAL_PGE_RST_WIDTH   1
+#define RPU_RPU_CCF_VAL_PGE_RST_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_SAFETY_CHK
+ */
+#define RPU_RPU_SAFETY_CHK    ( ( RPU_BASEADDR ) + 0X000000F0 )
+
+#define RPU_RPU_SAFETY_CHK_VAL_SHIFT   0
+#define RPU_RPU_SAFETY_CHK_VAL_WIDTH   32
+#define RPU_RPU_SAFETY_CHK_VAL_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU
+ */
+#define RPU_RPU    ( ( RPU_BASEADDR ) + 0X000000F4 )
+
+#define RPU_RPU_ECO_SHIFT   0
+#define RPU_RPU_ECO_WIDTH   32
+#define RPU_RPU_ECO_MASK    0XFFFFFFFF
+
+/**
+ * Register: RPU_RPU_0_CFG
+ */
+#define RPU_RPU_0_CFG    ( ( RPU_BASEADDR ) + 0X00000100 )
+
+#define RPU_RPU_0_CFG_CFGNMFI0_SHIFT   3
+#define RPU_RPU_0_CFG_CFGNMFI0_WIDTH   1
+#define RPU_RPU_0_CFG_CFGNMFI0_MASK    0X00000008
+
+#define RPU_RPU_0_CFG_VINITHI_SHIFT   2
+#define RPU_RPU_0_CFG_VINITHI_WIDTH   1
+#define RPU_RPU_0_CFG_VINITHI_MASK    0X00000004
+
+#define RPU_RPU_0_CFG_COHERENT_SHIFT   1
+#define RPU_RPU_0_CFG_COHERENT_WIDTH   1
+#define RPU_RPU_0_CFG_COHERENT_MASK    0X00000002
+
+#define RPU_RPU_0_CFG_NCPUHALT_SHIFT   0
+#define RPU_RPU_0_CFG_NCPUHALT_WIDTH   1
+#define RPU_RPU_0_CFG_NCPUHALT_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_0_STATUS
+ */
+#define RPU_RPU_0_STATUS    ( ( RPU_BASEADDR ) + 0X00000104 )
+
+#define RPU_RPU_0_STATUS_NVALRESET_SHIFT   5
+#define RPU_RPU_0_STATUS_NVALRESET_WIDTH   1
+#define RPU_RPU_0_STATUS_NVALRESET_MASK    0X00000020
+
+#define RPU_RPU_0_STATUS_NVALIRQ_SHIFT   4
+#define RPU_RPU_0_STATUS_NVALIRQ_WIDTH   1
+#define RPU_RPU_0_STATUS_NVALIRQ_MASK    0X00000010
+
+#define RPU_RPU_0_STATUS_NVALFIQ_SHIFT   3
+#define RPU_RPU_0_STATUS_NVALFIQ_WIDTH   1
+#define RPU_RPU_0_STATUS_NVALFIQ_MASK    0X00000008
+
+#define RPU_RPU_0_STATUS_NWFIPIPESTOPPED_SHIFT   2
+#define RPU_RPU_0_STATUS_NWFIPIPESTOPPED_WIDTH   1
+#define RPU_RPU_0_STATUS_NWFIPIPESTOPPED_MASK    0X00000004
+
+#define RPU_RPU_0_STATUS_NWFEPIPESTOPPED_SHIFT   1
+#define RPU_RPU_0_STATUS_NWFEPIPESTOPPED_WIDTH   1
+#define RPU_RPU_0_STATUS_NWFEPIPESTOPPED_MASK    0X00000002
+
+#define RPU_RPU_0_STATUS_NCLKSTOPPED_SHIFT   0
+#define RPU_RPU_0_STATUS_NCLKSTOPPED_WIDTH   1
+#define RPU_RPU_0_STATUS_NCLKSTOPPED_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_0_PWRDWN
+ */
+#define RPU_RPU_0_PWRDWN    ( ( RPU_BASEADDR ) + 0X00000108 )
+
+#define RPU_RPU_0_PWRDWN_EN_SHIFT   0
+#define RPU_RPU_0_PWRDWN_EN_WIDTH   1
+#define RPU_RPU_0_PWRDWN_EN_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_0_ISR
+ */
+#define RPU_RPU_0_ISR    ( ( RPU_BASEADDR ) + 0X00000114 )
+
+#define RPU_RPU_0_ISR_FPUFC_SHIFT   24
+#define RPU_RPU_0_ISR_FPUFC_WIDTH   1
+#define RPU_RPU_0_ISR_FPUFC_MASK    0X01000000
+
+#define RPU_RPU_0_ISR_FPOFC_SHIFT   23
+#define RPU_RPU_0_ISR_FPOFC_WIDTH   1
+#define RPU_RPU_0_ISR_FPOFC_MASK    0X00800000
+
+#define RPU_RPU_0_ISR_FPIXC_SHIFT   22
+#define RPU_RPU_0_ISR_FPIXC_WIDTH   1
+#define RPU_RPU_0_ISR_FPIXC_MASK    0X00400000
+
+#define RPU_RPU_0_ISR_FPIOC_SHIFT   21
+#define RPU_RPU_0_ISR_FPIOC_WIDTH   1
+#define RPU_RPU_0_ISR_FPIOC_MASK    0X00200000
+
+#define RPU_RPU_0_ISR_FPIDC_SHIFT   20
+#define RPU_RPU_0_ISR_FPIDC_WIDTH   1
+#define RPU_RPU_0_ISR_FPIDC_MASK    0X00100000
+
+#define RPU_RPU_0_ISR_FPDZC_SHIFT   19
+#define RPU_RPU_0_ISR_FPDZC_WIDTH   1
+#define RPU_RPU_0_ISR_FPDZC_MASK    0X00080000
+
+#define RPU_RPU_0_ISR_TCM_ASLV_CE_SHIFT   18
+#define RPU_RPU_0_ISR_TCM_ASLV_CE_WIDTH   1
+#define RPU_RPU_0_ISR_TCM_ASLV_CE_MASK    0X00040000
+
+#define RPU_RPU_0_ISR_TCM_ASLV_FAT_SHIFT   17
+#define RPU_RPU_0_ISR_TCM_ASLV_FAT_WIDTH   1
+#define RPU_RPU_0_ISR_TCM_ASLV_FAT_MASK    0X00020000
+
+#define RPU_RPU_0_ISR_TCM_LST_CE_SHIFT   16
+#define RPU_RPU_0_ISR_TCM_LST_CE_WIDTH   1
+#define RPU_RPU_0_ISR_TCM_LST_CE_MASK    0X00010000
+
+#define RPU_RPU_0_ISR_TCM_PREFETCH_CE_SHIFT   15
+#define RPU_RPU_0_ISR_TCM_PREFETCH_CE_WIDTH   1
+#define RPU_RPU_0_ISR_TCM_PREFETCH_CE_MASK    0X00008000
+
+#define RPU_RPU_0_ISR_B1TCM_CE_SHIFT   14
+#define RPU_RPU_0_ISR_B1TCM_CE_WIDTH   1
+#define RPU_RPU_0_ISR_B1TCM_CE_MASK    0X00004000
+
+#define RPU_RPU_0_ISR_B0TCM_CE_SHIFT   13
+#define RPU_RPU_0_ISR_B0TCM_CE_WIDTH   1
+#define RPU_RPU_0_ISR_B0TCM_CE_MASK    0X00002000
+
+#define RPU_RPU_0_ISR_ATCM_CE_SHIFT   12
+#define RPU_RPU_0_ISR_ATCM_CE_WIDTH   1
+#define RPU_RPU_0_ISR_ATCM_CE_MASK    0X00001000
+
+#define RPU_RPU_0_ISR_B1TCM_UE_SHIFT   11
+#define RPU_RPU_0_ISR_B1TCM_UE_WIDTH   1
+#define RPU_RPU_0_ISR_B1TCM_UE_MASK    0X00000800
+
+#define RPU_RPU_0_ISR_B0TCM_UE_SHIFT   10
+#define RPU_RPU_0_ISR_B0TCM_UE_WIDTH   1
+#define RPU_RPU_0_ISR_B0TCM_UE_MASK    0X00000400
+
+#define RPU_RPU_0_ISR_ATCM_UE_SHIFT   9
+#define RPU_RPU_0_ISR_ATCM_UE_WIDTH   1
+#define RPU_RPU_0_ISR_ATCM_UE_MASK    0X00000200
+
+#define RPU_RPU_0_ISR_DTAG_DIRTY_FAT_SHIFT   8
+#define RPU_RPU_0_ISR_DTAG_DIRTY_FAT_WIDTH   1
+#define RPU_RPU_0_ISR_DTAG_DIRTY_FAT_MASK    0X00000100
+
+#define RPU_RPU_0_ISR_DDATA_FAT_SHIFT   7
+#define RPU_RPU_0_ISR_DDATA_FAT_WIDTH   1
+#define RPU_RPU_0_ISR_DDATA_FAT_MASK    0X00000080
+
+#define RPU_RPU_0_ISR_TCM_LST_FAT_SHIFT   6
+#define RPU_RPU_0_ISR_TCM_LST_FAT_WIDTH   1
+#define RPU_RPU_0_ISR_TCM_LST_FAT_MASK    0X00000040
+
+#define RPU_RPU_0_ISR_TCM_PREFETCH_FAT_SHIFT   5
+#define RPU_RPU_0_ISR_TCM_PREFETCH_FAT_WIDTH   1
+#define RPU_RPU_0_ISR_TCM_PREFETCH_FAT_MASK    0X00000020
+
+#define RPU_RPU_0_ISR_DDATA_CE_SHIFT   4
+#define RPU_RPU_0_ISR_DDATA_CE_WIDTH   1
+#define RPU_RPU_0_ISR_DDATA_CE_MASK    0X00000010
+
+#define RPU_RPU_0_ISR_DTAG_DIRTY_CE_SHIFT   3
+#define RPU_RPU_0_ISR_DTAG_DIRTY_CE_WIDTH   1
+#define RPU_RPU_0_ISR_DTAG_DIRTY_CE_MASK    0X00000008
+
+#define RPU_RPU_0_ISR_IDATA_CE_SHIFT   2
+#define RPU_RPU_0_ISR_IDATA_CE_WIDTH   1
+#define RPU_RPU_0_ISR_IDATA_CE_MASK    0X00000004
+
+#define RPU_RPU_0_ISR_ITAG_CE_SHIFT   1
+#define RPU_RPU_0_ISR_ITAG_CE_WIDTH   1
+#define RPU_RPU_0_ISR_ITAG_CE_MASK    0X00000002
+
+#define RPU_RPU_0_ISR_APB_ERR_SHIFT   0
+#define RPU_RPU_0_ISR_APB_ERR_WIDTH   1
+#define RPU_RPU_0_ISR_APB_ERR_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_0_IMR
+ */
+#define RPU_RPU_0_IMR    ( ( RPU_BASEADDR ) + 0X00000118 )
+
+#define RPU_RPU_0_IMR_FPUFC_SHIFT   24
+#define RPU_RPU_0_IMR_FPUFC_WIDTH   1
+#define RPU_RPU_0_IMR_FPUFC_MASK    0X01000000
+
+#define RPU_RPU_0_IMR_FPOFC_SHIFT   23
+#define RPU_RPU_0_IMR_FPOFC_WIDTH   1
+#define RPU_RPU_0_IMR_FPOFC_MASK    0X00800000
+
+#define RPU_RPU_0_IMR_FPIXC_SHIFT   22
+#define RPU_RPU_0_IMR_FPIXC_WIDTH   1
+#define RPU_RPU_0_IMR_FPIXC_MASK    0X00400000
+
+#define RPU_RPU_0_IMR_FPIOC_SHIFT   21
+#define RPU_RPU_0_IMR_FPIOC_WIDTH   1
+#define RPU_RPU_0_IMR_FPIOC_MASK    0X00200000
+
+#define RPU_RPU_0_IMR_FPIDC_SHIFT   20
+#define RPU_RPU_0_IMR_FPIDC_WIDTH   1
+#define RPU_RPU_0_IMR_FPIDC_MASK    0X00100000
+
+#define RPU_RPU_0_IMR_FPDZC_SHIFT   19
+#define RPU_RPU_0_IMR_FPDZC_WIDTH   1
+#define RPU_RPU_0_IMR_FPDZC_MASK    0X00080000
+
+#define RPU_RPU_0_IMR_TCM_ASLV_CE_SHIFT   18
+#define RPU_RPU_0_IMR_TCM_ASLV_CE_WIDTH   1
+#define RPU_RPU_0_IMR_TCM_ASLV_CE_MASK    0X00040000
+
+#define RPU_RPU_0_IMR_TCM_ASLV_FAT_SHIFT   17
+#define RPU_RPU_0_IMR_TCM_ASLV_FAT_WIDTH   1
+#define RPU_RPU_0_IMR_TCM_ASLV_FAT_MASK    0X00020000
+
+#define RPU_RPU_0_IMR_TCM_LST_CE_SHIFT   16
+#define RPU_RPU_0_IMR_TCM_LST_CE_WIDTH   1
+#define RPU_RPU_0_IMR_TCM_LST_CE_MASK    0X00010000
+
+#define RPU_RPU_0_IMR_TCM_PREFETCH_CE_SHIFT   15
+#define RPU_RPU_0_IMR_TCM_PREFETCH_CE_WIDTH   1
+#define RPU_RPU_0_IMR_TCM_PREFETCH_CE_MASK    0X00008000
+
+#define RPU_RPU_0_IMR_B1TCM_CE_SHIFT   14
+#define RPU_RPU_0_IMR_B1TCM_CE_WIDTH   1
+#define RPU_RPU_0_IMR_B1TCM_CE_MASK    0X00004000
+
+#define RPU_RPU_0_IMR_B0TCM_CE_SHIFT   13
+#define RPU_RPU_0_IMR_B0TCM_CE_WIDTH   1
+#define RPU_RPU_0_IMR_B0TCM_CE_MASK    0X00002000
+
+#define RPU_RPU_0_IMR_ATCM_CE_SHIFT   12
+#define RPU_RPU_0_IMR_ATCM_CE_WIDTH   1
+#define RPU_RPU_0_IMR_ATCM_CE_MASK    0X00001000
+
+#define RPU_RPU_0_IMR_B1TCM_UE_SHIFT   11
+#define RPU_RPU_0_IMR_B1TCM_UE_WIDTH   1
+#define RPU_RPU_0_IMR_B1TCM_UE_MASK    0X00000800
+
+#define RPU_RPU_0_IMR_B0TCM_UE_SHIFT   10
+#define RPU_RPU_0_IMR_B0TCM_UE_WIDTH   1
+#define RPU_RPU_0_IMR_B0TCM_UE_MASK    0X00000400
+
+#define RPU_RPU_0_IMR_ATCM_UE_SHIFT   9
+#define RPU_RPU_0_IMR_ATCM_UE_WIDTH   1
+#define RPU_RPU_0_IMR_ATCM_UE_MASK    0X00000200
+
+#define RPU_RPU_0_IMR_DTAG_DIRTY_FAT_SHIFT   8
+#define RPU_RPU_0_IMR_DTAG_DIRTY_FAT_WIDTH   1
+#define RPU_RPU_0_IMR_DTAG_DIRTY_FAT_MASK    0X00000100
+
+#define RPU_RPU_0_IMR_DDATA_FAT_SHIFT   7
+#define RPU_RPU_0_IMR_DDATA_FAT_WIDTH   1
+#define RPU_RPU_0_IMR_DDATA_FAT_MASK    0X00000080
+
+#define RPU_RPU_0_IMR_TCM_LST_FAT_SHIFT   6
+#define RPU_RPU_0_IMR_TCM_LST_FAT_WIDTH   1
+#define RPU_RPU_0_IMR_TCM_LST_FAT_MASK    0X00000040
+
+#define RPU_RPU_0_IMR_TCM_PREFETCH_FAT_SHIFT   5
+#define RPU_RPU_0_IMR_TCM_PREFETCH_FAT_WIDTH   1
+#define RPU_RPU_0_IMR_TCM_PREFETCH_FAT_MASK    0X00000020
+
+#define RPU_RPU_0_IMR_DDATA_CE_SHIFT   4
+#define RPU_RPU_0_IMR_DDATA_CE_WIDTH   1
+#define RPU_RPU_0_IMR_DDATA_CE_MASK    0X00000010
+
+#define RPU_RPU_0_IMR_DTAG_DIRTY_CE_SHIFT   3
+#define RPU_RPU_0_IMR_DTAG_DIRTY_CE_WIDTH   1
+#define RPU_RPU_0_IMR_DTAG_DIRTY_CE_MASK    0X00000008
+
+#define RPU_RPU_0_IMR_IDATA_CE_SHIFT   2
+#define RPU_RPU_0_IMR_IDATA_CE_WIDTH   1
+#define RPU_RPU_0_IMR_IDATA_CE_MASK    0X00000004
+
+#define RPU_RPU_0_IMR_ITAG_CE_SHIFT   1
+#define RPU_RPU_0_IMR_ITAG_CE_WIDTH   1
+#define RPU_RPU_0_IMR_ITAG_CE_MASK    0X00000002
+
+#define RPU_RPU_0_IMR_APB_ERR_SHIFT   0
+#define RPU_RPU_0_IMR_APB_ERR_WIDTH   1
+#define RPU_RPU_0_IMR_APB_ERR_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_0_IEN
+ */
+#define RPU_RPU_0_IEN    ( ( RPU_BASEADDR ) + 0X0000011C )
+
+#define RPU_RPU_0_IEN_FPUFC_SHIFT   24
+#define RPU_RPU_0_IEN_FPUFC_WIDTH   1
+#define RPU_RPU_0_IEN_FPUFC_MASK    0X01000000
+
+#define RPU_RPU_0_IEN_FPOFC_SHIFT   23
+#define RPU_RPU_0_IEN_FPOFC_WIDTH   1
+#define RPU_RPU_0_IEN_FPOFC_MASK    0X00800000
+
+#define RPU_RPU_0_IEN_FPIXC_SHIFT   22
+#define RPU_RPU_0_IEN_FPIXC_WIDTH   1
+#define RPU_RPU_0_IEN_FPIXC_MASK    0X00400000
+
+#define RPU_RPU_0_IEN_FPIOC_SHIFT   21
+#define RPU_RPU_0_IEN_FPIOC_WIDTH   1
+#define RPU_RPU_0_IEN_FPIOC_MASK    0X00200000
+
+#define RPU_RPU_0_IEN_FPIDC_SHIFT   20
+#define RPU_RPU_0_IEN_FPIDC_WIDTH   1
+#define RPU_RPU_0_IEN_FPIDC_MASK    0X00100000
+
+#define RPU_RPU_0_IEN_FPDZC_SHIFT   19
+#define RPU_RPU_0_IEN_FPDZC_WIDTH   1
+#define RPU_RPU_0_IEN_FPDZC_MASK    0X00080000
+
+#define RPU_RPU_0_IEN_TCM_ASLV_CE_SHIFT   18
+#define RPU_RPU_0_IEN_TCM_ASLV_CE_WIDTH   1
+#define RPU_RPU_0_IEN_TCM_ASLV_CE_MASK    0X00040000
+
+#define RPU_RPU_0_IEN_TCM_ASLV_FAT_SHIFT   17
+#define RPU_RPU_0_IEN_TCM_ASLV_FAT_WIDTH   1
+#define RPU_RPU_0_IEN_TCM_ASLV_FAT_MASK    0X00020000
+
+#define RPU_RPU_0_IEN_TCM_LST_CE_SHIFT   16
+#define RPU_RPU_0_IEN_TCM_LST_CE_WIDTH   1
+#define RPU_RPU_0_IEN_TCM_LST_CE_MASK    0X00010000
+
+#define RPU_RPU_0_IEN_TCM_PREFETCH_CE_SHIFT   15
+#define RPU_RPU_0_IEN_TCM_PREFETCH_CE_WIDTH   1
+#define RPU_RPU_0_IEN_TCM_PREFETCH_CE_MASK    0X00008000
+
+#define RPU_RPU_0_IEN_B1TCM_CE_SHIFT   14
+#define RPU_RPU_0_IEN_B1TCM_CE_WIDTH   1
+#define RPU_RPU_0_IEN_B1TCM_CE_MASK    0X00004000
+
+#define RPU_RPU_0_IEN_B0TCM_CE_SHIFT   13
+#define RPU_RPU_0_IEN_B0TCM_CE_WIDTH   1
+#define RPU_RPU_0_IEN_B0TCM_CE_MASK    0X00002000
+
+#define RPU_RPU_0_IEN_ATCM_CE_SHIFT   12
+#define RPU_RPU_0_IEN_ATCM_CE_WIDTH   1
+#define RPU_RPU_0_IEN_ATCM_CE_MASK    0X00001000
+
+#define RPU_RPU_0_IEN_B1TCM_UE_SHIFT   11
+#define RPU_RPU_0_IEN_B1TCM_UE_WIDTH   1
+#define RPU_RPU_0_IEN_B1TCM_UE_MASK    0X00000800
+
+#define RPU_RPU_0_IEN_B0TCM_UE_SHIFT   10
+#define RPU_RPU_0_IEN_B0TCM_UE_WIDTH   1
+#define RPU_RPU_0_IEN_B0TCM_UE_MASK    0X00000400
+
+#define RPU_RPU_0_IEN_ATCM_UE_SHIFT   9
+#define RPU_RPU_0_IEN_ATCM_UE_WIDTH   1
+#define RPU_RPU_0_IEN_ATCM_UE_MASK    0X00000200
+
+#define RPU_RPU_0_IEN_DTAG_DIRTY_FAT_SHIFT   8
+#define RPU_RPU_0_IEN_DTAG_DIRTY_FAT_WIDTH   1
+#define RPU_RPU_0_IEN_DTAG_DIRTY_FAT_MASK    0X00000100
+
+#define RPU_RPU_0_IEN_DDATA_FAT_SHIFT   7
+#define RPU_RPU_0_IEN_DDATA_FAT_WIDTH   1
+#define RPU_RPU_0_IEN_DDATA_FAT_MASK    0X00000080
+
+#define RPU_RPU_0_IEN_TCM_LST_FAT_SHIFT   6
+#define RPU_RPU_0_IEN_TCM_LST_FAT_WIDTH   1
+#define RPU_RPU_0_IEN_TCM_LST_FAT_MASK    0X00000040
+
+#define RPU_RPU_0_IEN_TCM_PREFETCH_FAT_SHIFT   5
+#define RPU_RPU_0_IEN_TCM_PREFETCH_FAT_WIDTH   1
+#define RPU_RPU_0_IEN_TCM_PREFETCH_FAT_MASK    0X00000020
+
+#define RPU_RPU_0_IEN_DDATA_CE_SHIFT   4
+#define RPU_RPU_0_IEN_DDATA_CE_WIDTH   1
+#define RPU_RPU_0_IEN_DDATA_CE_MASK    0X00000010
+
+#define RPU_RPU_0_IEN_DTAG_DIRTY_CE_SHIFT   3
+#define RPU_RPU_0_IEN_DTAG_DIRTY_CE_WIDTH   1
+#define RPU_RPU_0_IEN_DTAG_DIRTY_CE_MASK    0X00000008
+
+#define RPU_RPU_0_IEN_IDATA_CE_SHIFT   2
+#define RPU_RPU_0_IEN_IDATA_CE_WIDTH   1
+#define RPU_RPU_0_IEN_IDATA_CE_MASK    0X00000004
+
+#define RPU_RPU_0_IEN_ITAG_CE_SHIFT   1
+#define RPU_RPU_0_IEN_ITAG_CE_WIDTH   1
+#define RPU_RPU_0_IEN_ITAG_CE_MASK    0X00000002
+
+#define RPU_RPU_0_IEN_APB_ERR_SHIFT   0
+#define RPU_RPU_0_IEN_APB_ERR_WIDTH   1
+#define RPU_RPU_0_IEN_APB_ERR_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_0_IDS
+ */
+#define RPU_RPU_0_IDS    ( ( RPU_BASEADDR ) + 0X00000120 )
+
+#define RPU_RPU_0_IDS_FPUFC_SHIFT   24
+#define RPU_RPU_0_IDS_FPUFC_WIDTH   1
+#define RPU_RPU_0_IDS_FPUFC_MASK    0X01000000
+
+#define RPU_RPU_0_IDS_FPOFC_SHIFT   23
+#define RPU_RPU_0_IDS_FPOFC_WIDTH   1
+#define RPU_RPU_0_IDS_FPOFC_MASK    0X00800000
+
+#define RPU_RPU_0_IDS_FPIXC_SHIFT   22
+#define RPU_RPU_0_IDS_FPIXC_WIDTH   1
+#define RPU_RPU_0_IDS_FPIXC_MASK    0X00400000
+
+#define RPU_RPU_0_IDS_FPIOC_SHIFT   21
+#define RPU_RPU_0_IDS_FPIOC_WIDTH   1
+#define RPU_RPU_0_IDS_FPIOC_MASK    0X00200000
+
+#define RPU_RPU_0_IDS_FPIDC_SHIFT   20
+#define RPU_RPU_0_IDS_FPIDC_WIDTH   1
+#define RPU_RPU_0_IDS_FPIDC_MASK    0X00100000
+
+#define RPU_RPU_0_IDS_FPDZC_SHIFT   19
+#define RPU_RPU_0_IDS_FPDZC_WIDTH   1
+#define RPU_RPU_0_IDS_FPDZC_MASK    0X00080000
+
+#define RPU_RPU_0_IDS_TCM_ASLV_CE_SHIFT   18
+#define RPU_RPU_0_IDS_TCM_ASLV_CE_WIDTH   1
+#define RPU_RPU_0_IDS_TCM_ASLV_CE_MASK    0X00040000
+
+#define RPU_RPU_0_IDS_TCM_ASLV_FAT_SHIFT   17
+#define RPU_RPU_0_IDS_TCM_ASLV_FAT_WIDTH   1
+#define RPU_RPU_0_IDS_TCM_ASLV_FAT_MASK    0X00020000
+
+#define RPU_RPU_0_IDS_TCM_LST_CE_SHIFT   16
+#define RPU_RPU_0_IDS_TCM_LST_CE_WIDTH   1
+#define RPU_RPU_0_IDS_TCM_LST_CE_MASK    0X00010000
+
+#define RPU_RPU_0_IDS_TCM_PREFETCH_CE_SHIFT   15
+#define RPU_RPU_0_IDS_TCM_PREFETCH_CE_WIDTH   1
+#define RPU_RPU_0_IDS_TCM_PREFETCH_CE_MASK    0X00008000
+
+#define RPU_RPU_0_IDS_B1TCM_CE_SHIFT   14
+#define RPU_RPU_0_IDS_B1TCM_CE_WIDTH   1
+#define RPU_RPU_0_IDS_B1TCM_CE_MASK    0X00004000
+
+#define RPU_RPU_0_IDS_B0TCM_CE_SHIFT   13
+#define RPU_RPU_0_IDS_B0TCM_CE_WIDTH   1
+#define RPU_RPU_0_IDS_B0TCM_CE_MASK    0X00002000
+
+#define RPU_RPU_0_IDS_ATCM_CE_SHIFT   12
+#define RPU_RPU_0_IDS_ATCM_CE_WIDTH   1
+#define RPU_RPU_0_IDS_ATCM_CE_MASK    0X00001000
+
+#define RPU_RPU_0_IDS_B1TCM_UE_SHIFT   11
+#define RPU_RPU_0_IDS_B1TCM_UE_WIDTH   1
+#define RPU_RPU_0_IDS_B1TCM_UE_MASK    0X00000800
+
+#define RPU_RPU_0_IDS_B0TCM_UE_SHIFT   10
+#define RPU_RPU_0_IDS_B0TCM_UE_WIDTH   1
+#define RPU_RPU_0_IDS_B0TCM_UE_MASK    0X00000400
+
+#define RPU_RPU_0_IDS_ATCM_UE_SHIFT   9
+#define RPU_RPU_0_IDS_ATCM_UE_WIDTH   1
+#define RPU_RPU_0_IDS_ATCM_UE_MASK    0X00000200
+
+#define RPU_RPU_0_IDS_DTAG_DIRTY_FAT_SHIFT   8
+#define RPU_RPU_0_IDS_DTAG_DIRTY_FAT_WIDTH   1
+#define RPU_RPU_0_IDS_DTAG_DIRTY_FAT_MASK    0X00000100
+
+#define RPU_RPU_0_IDS_DDATA_FAT_SHIFT   7
+#define RPU_RPU_0_IDS_DDATA_FAT_WIDTH   1
+#define RPU_RPU_0_IDS_DDATA_FAT_MASK    0X00000080
+
+#define RPU_RPU_0_IDS_TCM_LST_FAT_SHIFT   6
+#define RPU_RPU_0_IDS_TCM_LST_FAT_WIDTH   1
+#define RPU_RPU_0_IDS_TCM_LST_FAT_MASK    0X00000040
+
+#define RPU_RPU_0_IDS_TCM_PREFETCH_FAT_SHIFT   5
+#define RPU_RPU_0_IDS_TCM_PREFETCH_FAT_WIDTH   1
+#define RPU_RPU_0_IDS_TCM_PREFETCH_FAT_MASK    0X00000020
+
+#define RPU_RPU_0_IDS_DDATA_CE_SHIFT   4
+#define RPU_RPU_0_IDS_DDATA_CE_WIDTH   1
+#define RPU_RPU_0_IDS_DDATA_CE_MASK    0X00000010
+
+#define RPU_RPU_0_IDS_DTAG_DIRTY_CE_SHIFT   3
+#define RPU_RPU_0_IDS_DTAG_DIRTY_CE_WIDTH   1
+#define RPU_RPU_0_IDS_DTAG_DIRTY_CE_MASK    0X00000008
+
+#define RPU_RPU_0_IDS_IDATA_CE_SHIFT   2
+#define RPU_RPU_0_IDS_IDATA_CE_WIDTH   1
+#define RPU_RPU_0_IDS_IDATA_CE_MASK    0X00000004
+
+#define RPU_RPU_0_IDS_ITAG_CE_SHIFT   1
+#define RPU_RPU_0_IDS_ITAG_CE_WIDTH   1
+#define RPU_RPU_0_IDS_ITAG_CE_MASK    0X00000002
+
+#define RPU_RPU_0_IDS_APB_ERR_SHIFT   0
+#define RPU_RPU_0_IDS_APB_ERR_WIDTH   1
+#define RPU_RPU_0_IDS_APB_ERR_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_0_SLV_BASE
+ */
+#define RPU_RPU_0_SLV_BASE    ( ( RPU_BASEADDR ) + 0X00000124 )
+
+#define RPU_RPU_0_SLV_BASE_ADDR_SHIFT   0
+#define RPU_RPU_0_SLV_BASE_ADDR_WIDTH   8
+#define RPU_RPU_0_SLV_BASE_ADDR_MASK    0X000000FF
+
+/**
+ * Register: RPU_RPU_0_AXI_OVER
+ */
+#define RPU_RPU_0_AXI_OVER    ( ( RPU_BASEADDR ) + 0X00000128 )
+
+#define RPU_RPU_0_AXI_OVER_AWCACHE_SHIFT   6
+#define RPU_RPU_0_AXI_OVER_AWCACHE_WIDTH   4
+#define RPU_RPU_0_AXI_OVER_AWCACHE_MASK    0X000003C0
+
+#define RPU_RPU_0_AXI_OVER_ARCACHE_SHIFT   2
+#define RPU_RPU_0_AXI_OVER_ARCACHE_WIDTH   4
+#define RPU_RPU_0_AXI_OVER_ARCACHE_MASK    0X0000003C
+
+#define RPU_RPU_0_AXI_OVER_AWCACHE_EN_SHIFT   1
+#define RPU_RPU_0_AXI_OVER_AWCACHE_EN_WIDTH   1
+#define RPU_RPU_0_AXI_OVER_AWCACHE_EN_MASK    0X00000002
+
+#define RPU_RPU_0_AXI_OVER_ARCACHE_EN_SHIFT   0
+#define RPU_RPU_0_AXI_OVER_ARCACHE_EN_WIDTH   1
+#define RPU_RPU_0_AXI_OVER_ARCACHE_EN_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_1_CFG
+ */
+#define RPU_RPU_1_CFG    ( ( RPU_BASEADDR ) + 0X00000200 )
+
+#define RPU_RPU_1_CFG_CFGNMFI1_SHIFT   3
+#define RPU_RPU_1_CFG_CFGNMFI1_WIDTH   1
+#define RPU_RPU_1_CFG_CFGNMFI1_MASK    0X00000008
+
+#define RPU_RPU_1_CFG_VINITHI_SHIFT   2
+#define RPU_RPU_1_CFG_VINITHI_WIDTH   1
+#define RPU_RPU_1_CFG_VINITHI_MASK    0X00000004
+
+#define RPU_RPU_1_CFG_COHERENT_SHIFT   1
+#define RPU_RPU_1_CFG_COHERENT_WIDTH   1
+#define RPU_RPU_1_CFG_COHERENT_MASK    0X00000002
+
+#define RPU_RPU_1_CFG_NCPUHALT_SHIFT   0
+#define RPU_RPU_1_CFG_NCPUHALT_WIDTH   1
+#define RPU_RPU_1_CFG_NCPUHALT_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_1_STATUS
+ */
+#define RPU_RPU_1_STATUS    ( ( RPU_BASEADDR ) + 0X00000204 )
+
+#define RPU_RPU_1_STATUS_NVALRESET_SHIFT   5
+#define RPU_RPU_1_STATUS_NVALRESET_WIDTH   1
+#define RPU_RPU_1_STATUS_NVALRESET_MASK    0X00000020
+
+#define RPU_RPU_1_STATUS_NVALIRQ_SHIFT   4
+#define RPU_RPU_1_STATUS_NVALIRQ_WIDTH   1
+#define RPU_RPU_1_STATUS_NVALIRQ_MASK    0X00000010
+
+#define RPU_RPU_1_STATUS_NVALFIQ_SHIFT   3
+#define RPU_RPU_1_STATUS_NVALFIQ_WIDTH   1
+#define RPU_RPU_1_STATUS_NVALFIQ_MASK    0X00000008
+
+#define RPU_RPU_1_STATUS_NWFIPIPESTOPPED_SHIFT   2
+#define RPU_RPU_1_STATUS_NWFIPIPESTOPPED_WIDTH   1
+#define RPU_RPU_1_STATUS_NWFIPIPESTOPPED_MASK    0X00000004
+
+#define RPU_RPU_1_STATUS_NWFEPIPESTOPPED_SHIFT   1
+#define RPU_RPU_1_STATUS_NWFEPIPESTOPPED_WIDTH   1
+#define RPU_RPU_1_STATUS_NWFEPIPESTOPPED_MASK    0X00000002
+
+#define RPU_RPU_1_STATUS_NCLKSTOPPED_SHIFT   0
+#define RPU_RPU_1_STATUS_NCLKSTOPPED_WIDTH   1
+#define RPU_RPU_1_STATUS_NCLKSTOPPED_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_1_PWRDWN
+ */
+#define RPU_RPU_1_PWRDWN    ( ( RPU_BASEADDR ) + 0X00000208 )
+
+#define RPU_RPU_1_PWRDWN_EN_SHIFT   0
+#define RPU_RPU_1_PWRDWN_EN_WIDTH   1
+#define RPU_RPU_1_PWRDWN_EN_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_1_ISR
+ */
+#define RPU_RPU_1_ISR    ( ( RPU_BASEADDR ) + 0X00000214 )
+
+#define RPU_RPU_1_ISR_FPUFC_SHIFT   24
+#define RPU_RPU_1_ISR_FPUFC_WIDTH   1
+#define RPU_RPU_1_ISR_FPUFC_MASK    0X01000000
+
+#define RPU_RPU_1_ISR_FPOFC_SHIFT   23
+#define RPU_RPU_1_ISR_FPOFC_WIDTH   1
+#define RPU_RPU_1_ISR_FPOFC_MASK    0X00800000
+
+#define RPU_RPU_1_ISR_FPIXC_SHIFT   22
+#define RPU_RPU_1_ISR_FPIXC_WIDTH   1
+#define RPU_RPU_1_ISR_FPIXC_MASK    0X00400000
+
+#define RPU_RPU_1_ISR_FPIOC_SHIFT   21
+#define RPU_RPU_1_ISR_FPIOC_WIDTH   1
+#define RPU_RPU_1_ISR_FPIOC_MASK    0X00200000
+
+#define RPU_RPU_1_ISR_FPIDC_SHIFT   20
+#define RPU_RPU_1_ISR_FPIDC_WIDTH   1
+#define RPU_RPU_1_ISR_FPIDC_MASK    0X00100000
+
+#define RPU_RPU_1_ISR_FPDZC_SHIFT   19
+#define RPU_RPU_1_ISR_FPDZC_WIDTH   1
+#define RPU_RPU_1_ISR_FPDZC_MASK    0X00080000
+
+#define RPU_RPU_1_ISR_TCM_ASLV_CE_SHIFT   18
+#define RPU_RPU_1_ISR_TCM_ASLV_CE_WIDTH   1
+#define RPU_RPU_1_ISR_TCM_ASLV_CE_MASK    0X00040000
+
+#define RPU_RPU_1_ISR_TCM_ASLV_FAT_SHIFT   17
+#define RPU_RPU_1_ISR_TCM_ASLV_FAT_WIDTH   1
+#define RPU_RPU_1_ISR_TCM_ASLV_FAT_MASK    0X00020000
+
+#define RPU_RPU_1_ISR_TCM_LST_CE_SHIFT   16
+#define RPU_RPU_1_ISR_TCM_LST_CE_WIDTH   1
+#define RPU_RPU_1_ISR_TCM_LST_CE_MASK    0X00010000
+
+#define RPU_RPU_1_ISR_TCM_PREFETCH_CE_SHIFT   15
+#define RPU_RPU_1_ISR_TCM_PREFETCH_CE_WIDTH   1
+#define RPU_RPU_1_ISR_TCM_PREFETCH_CE_MASK    0X00008000
+
+#define RPU_RPU_1_ISR_B1TCM_CE_SHIFT   14
+#define RPU_RPU_1_ISR_B1TCM_CE_WIDTH   1
+#define RPU_RPU_1_ISR_B1TCM_CE_MASK    0X00004000
+
+#define RPU_RPU_1_ISR_B0TCM_CE_SHIFT   13
+#define RPU_RPU_1_ISR_B0TCM_CE_WIDTH   1
+#define RPU_RPU_1_ISR_B0TCM_CE_MASK    0X00002000
+
+#define RPU_RPU_1_ISR_ATCM_CE_SHIFT   12
+#define RPU_RPU_1_ISR_ATCM_CE_WIDTH   1
+#define RPU_RPU_1_ISR_ATCM_CE_MASK    0X00001000
+
+#define RPU_RPU_1_ISR_B1TCM_UE_SHIFT   11
+#define RPU_RPU_1_ISR_B1TCM_UE_WIDTH   1
+#define RPU_RPU_1_ISR_B1TCM_UE_MASK    0X00000800
+
+#define RPU_RPU_1_ISR_B0TCM_UE_SHIFT   10
+#define RPU_RPU_1_ISR_B0TCM_UE_WIDTH   1
+#define RPU_RPU_1_ISR_B0TCM_UE_MASK    0X00000400
+
+#define RPU_RPU_1_ISR_ATCM_UE_SHIFT   9
+#define RPU_RPU_1_ISR_ATCM_UE_WIDTH   1
+#define RPU_RPU_1_ISR_ATCM_UE_MASK    0X00000200
+
+#define RPU_RPU_1_ISR_DTAG_DIRTY_FAT_SHIFT   8
+#define RPU_RPU_1_ISR_DTAG_DIRTY_FAT_WIDTH   1
+#define RPU_RPU_1_ISR_DTAG_DIRTY_FAT_MASK    0X00000100
+
+#define RPU_RPU_1_ISR_DDATA_FAT_SHIFT   7
+#define RPU_RPU_1_ISR_DDATA_FAT_WIDTH   1
+#define RPU_RPU_1_ISR_DDATA_FAT_MASK    0X00000080
+
+#define RPU_RPU_1_ISR_TCM_LST_FAT_SHIFT   6
+#define RPU_RPU_1_ISR_TCM_LST_FAT_WIDTH   1
+#define RPU_RPU_1_ISR_TCM_LST_FAT_MASK    0X00000040
+
+#define RPU_RPU_1_ISR_TCM_PREFETCH_FAT_SHIFT   5
+#define RPU_RPU_1_ISR_TCM_PREFETCH_FAT_WIDTH   1
+#define RPU_RPU_1_ISR_TCM_PREFETCH_FAT_MASK    0X00000020
+
+#define RPU_RPU_1_ISR_DDATA_CE_SHIFT   4
+#define RPU_RPU_1_ISR_DDATA_CE_WIDTH   1
+#define RPU_RPU_1_ISR_DDATA_CE_MASK    0X00000010
+
+#define RPU_RPU_1_ISR_DTAG_DIRTY_CE_SHIFT   3
+#define RPU_RPU_1_ISR_DTAG_DIRTY_CE_WIDTH   1
+#define RPU_RPU_1_ISR_DTAG_DIRTY_CE_MASK    0X00000008
+
+#define RPU_RPU_1_ISR_IDATA_CE_SHIFT   2
+#define RPU_RPU_1_ISR_IDATA_CE_WIDTH   1
+#define RPU_RPU_1_ISR_IDATA_CE_MASK    0X00000004
+
+#define RPU_RPU_1_ISR_ITAG_CE_SHIFT   1
+#define RPU_RPU_1_ISR_ITAG_CE_WIDTH   1
+#define RPU_RPU_1_ISR_ITAG_CE_MASK    0X00000002
+
+#define RPU_RPU_1_ISR_APB_ERR_SHIFT   0
+#define RPU_RPU_1_ISR_APB_ERR_WIDTH   1
+#define RPU_RPU_1_ISR_APB_ERR_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_1_IMR
+ */
+#define RPU_RPU_1_IMR    ( ( RPU_BASEADDR ) + 0X00000218 )
+
+#define RPU_RPU_1_IMR_FPUFC_SHIFT   24
+#define RPU_RPU_1_IMR_FPUFC_WIDTH   1
+#define RPU_RPU_1_IMR_FPUFC_MASK    0X01000000
+
+#define RPU_RPU_1_IMR_FPOFC_SHIFT   23
+#define RPU_RPU_1_IMR_FPOFC_WIDTH   1
+#define RPU_RPU_1_IMR_FPOFC_MASK    0X00800000
+
+#define RPU_RPU_1_IMR_FPIXC_SHIFT   22
+#define RPU_RPU_1_IMR_FPIXC_WIDTH   1
+#define RPU_RPU_1_IMR_FPIXC_MASK    0X00400000
+
+#define RPU_RPU_1_IMR_FPIOC_SHIFT   21
+#define RPU_RPU_1_IMR_FPIOC_WIDTH   1
+#define RPU_RPU_1_IMR_FPIOC_MASK    0X00200000
+
+#define RPU_RPU_1_IMR_FPIDC_SHIFT   20
+#define RPU_RPU_1_IMR_FPIDC_WIDTH   1
+#define RPU_RPU_1_IMR_FPIDC_MASK    0X00100000
+
+#define RPU_RPU_1_IMR_FPDZC_SHIFT   19
+#define RPU_RPU_1_IMR_FPDZC_WIDTH   1
+#define RPU_RPU_1_IMR_FPDZC_MASK    0X00080000
+
+#define RPU_RPU_1_IMR_TCM_ASLV_CE_SHIFT   18
+#define RPU_RPU_1_IMR_TCM_ASLV_CE_WIDTH   1
+#define RPU_RPU_1_IMR_TCM_ASLV_CE_MASK    0X00040000
+
+#define RPU_RPU_1_IMR_TCM_ASLV_FAT_SHIFT   17
+#define RPU_RPU_1_IMR_TCM_ASLV_FAT_WIDTH   1
+#define RPU_RPU_1_IMR_TCM_ASLV_FAT_MASK    0X00020000
+
+#define RPU_RPU_1_IMR_TCM_LST_CE_SHIFT   16
+#define RPU_RPU_1_IMR_TCM_LST_CE_WIDTH   1
+#define RPU_RPU_1_IMR_TCM_LST_CE_MASK    0X00010000
+
+#define RPU_RPU_1_IMR_TCM_PREFETCH_CE_SHIFT   15
+#define RPU_RPU_1_IMR_TCM_PREFETCH_CE_WIDTH   1
+#define RPU_RPU_1_IMR_TCM_PREFETCH_CE_MASK    0X00008000
+
+#define RPU_RPU_1_IMR_B1TCM_CE_SHIFT   14
+#define RPU_RPU_1_IMR_B1TCM_CE_WIDTH   1
+#define RPU_RPU_1_IMR_B1TCM_CE_MASK    0X00004000
+
+#define RPU_RPU_1_IMR_B0TCM_CE_SHIFT   13
+#define RPU_RPU_1_IMR_B0TCM_CE_WIDTH   1
+#define RPU_RPU_1_IMR_B0TCM_CE_MASK    0X00002000
+
+#define RPU_RPU_1_IMR_ATCM_CE_SHIFT   12
+#define RPU_RPU_1_IMR_ATCM_CE_WIDTH   1
+#define RPU_RPU_1_IMR_ATCM_CE_MASK    0X00001000
+
+#define RPU_RPU_1_IMR_B1TCM_UE_SHIFT   11
+#define RPU_RPU_1_IMR_B1TCM_UE_WIDTH   1
+#define RPU_RPU_1_IMR_B1TCM_UE_MASK    0X00000800
+
+#define RPU_RPU_1_IMR_B0TCM_UE_SHIFT   10
+#define RPU_RPU_1_IMR_B0TCM_UE_WIDTH   1
+#define RPU_RPU_1_IMR_B0TCM_UE_MASK    0X00000400
+
+#define RPU_RPU_1_IMR_ATCM_UE_SHIFT   9
+#define RPU_RPU_1_IMR_ATCM_UE_WIDTH   1
+#define RPU_RPU_1_IMR_ATCM_UE_MASK    0X00000200
+
+#define RPU_RPU_1_IMR_DTAG_DIRTY_FAT_SHIFT   8
+#define RPU_RPU_1_IMR_DTAG_DIRTY_FAT_WIDTH   1
+#define RPU_RPU_1_IMR_DTAG_DIRTY_FAT_MASK    0X00000100
+
+#define RPU_RPU_1_IMR_DDATA_FAT_SHIFT   7
+#define RPU_RPU_1_IMR_DDATA_FAT_WIDTH   1
+#define RPU_RPU_1_IMR_DDATA_FAT_MASK    0X00000080
+
+#define RPU_RPU_1_IMR_TCM_LST_FAT_SHIFT   6
+#define RPU_RPU_1_IMR_TCM_LST_FAT_WIDTH   1
+#define RPU_RPU_1_IMR_TCM_LST_FAT_MASK    0X00000040
+
+#define RPU_RPU_1_IMR_TCM_PREFETCH_FAT_SHIFT   5
+#define RPU_RPU_1_IMR_TCM_PREFETCH_FAT_WIDTH   1
+#define RPU_RPU_1_IMR_TCM_PREFETCH_FAT_MASK    0X00000020
+
+#define RPU_RPU_1_IMR_DDATA_CE_SHIFT   4
+#define RPU_RPU_1_IMR_DDATA_CE_WIDTH   1
+#define RPU_RPU_1_IMR_DDATA_CE_MASK    0X00000010
+
+#define RPU_RPU_1_IMR_DTAG_DIRTY_CE_SHIFT   3
+#define RPU_RPU_1_IMR_DTAG_DIRTY_CE_WIDTH   1
+#define RPU_RPU_1_IMR_DTAG_DIRTY_CE_MASK    0X00000008
+
+#define RPU_RPU_1_IMR_IDATA_CE_SHIFT   2
+#define RPU_RPU_1_IMR_IDATA_CE_WIDTH   1
+#define RPU_RPU_1_IMR_IDATA_CE_MASK    0X00000004
+
+#define RPU_RPU_1_IMR_ITAG_CE_SHIFT   1
+#define RPU_RPU_1_IMR_ITAG_CE_WIDTH   1
+#define RPU_RPU_1_IMR_ITAG_CE_MASK    0X00000002
+
+#define RPU_RPU_1_IMR_APB_ERR_SHIFT   0
+#define RPU_RPU_1_IMR_APB_ERR_WIDTH   1
+#define RPU_RPU_1_IMR_APB_ERR_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_1_IEN
+ */
+#define RPU_RPU_1_IEN    ( ( RPU_BASEADDR ) + 0X0000021C )
+
+#define RPU_RPU_1_IEN_FPUFC_SHIFT   24
+#define RPU_RPU_1_IEN_FPUFC_WIDTH   1
+#define RPU_RPU_1_IEN_FPUFC_MASK    0X01000000
+
+#define RPU_RPU_1_IEN_FPOFC_SHIFT   23
+#define RPU_RPU_1_IEN_FPOFC_WIDTH   1
+#define RPU_RPU_1_IEN_FPOFC_MASK    0X00800000
+
+#define RPU_RPU_1_IEN_FPIXC_SHIFT   22
+#define RPU_RPU_1_IEN_FPIXC_WIDTH   1
+#define RPU_RPU_1_IEN_FPIXC_MASK    0X00400000
+
+#define RPU_RPU_1_IEN_FPIOC_SHIFT   21
+#define RPU_RPU_1_IEN_FPIOC_WIDTH   1
+#define RPU_RPU_1_IEN_FPIOC_MASK    0X00200000
+
+#define RPU_RPU_1_IEN_FPIDC_SHIFT   20
+#define RPU_RPU_1_IEN_FPIDC_WIDTH   1
+#define RPU_RPU_1_IEN_FPIDC_MASK    0X00100000
+
+#define RPU_RPU_1_IEN_FPDZC_SHIFT   19
+#define RPU_RPU_1_IEN_FPDZC_WIDTH   1
+#define RPU_RPU_1_IEN_FPDZC_MASK    0X00080000
+
+#define RPU_RPU_1_IEN_TCM_ASLV_CE_SHIFT   18
+#define RPU_RPU_1_IEN_TCM_ASLV_CE_WIDTH   1
+#define RPU_RPU_1_IEN_TCM_ASLV_CE_MASK    0X00040000
+
+#define RPU_RPU_1_IEN_TCM_ASLV_FAT_SHIFT   17
+#define RPU_RPU_1_IEN_TCM_ASLV_FAT_WIDTH   1
+#define RPU_RPU_1_IEN_TCM_ASLV_FAT_MASK    0X00020000
+
+#define RPU_RPU_1_IEN_TCM_LST_CE_SHIFT   16
+#define RPU_RPU_1_IEN_TCM_LST_CE_WIDTH   1
+#define RPU_RPU_1_IEN_TCM_LST_CE_MASK    0X00010000
+
+#define RPU_RPU_1_IEN_TCM_PREFETCH_CE_SHIFT   15
+#define RPU_RPU_1_IEN_TCM_PREFETCH_CE_WIDTH   1
+#define RPU_RPU_1_IEN_TCM_PREFETCH_CE_MASK    0X00008000
+
+#define RPU_RPU_1_IEN_B1TCM_CE_SHIFT   14
+#define RPU_RPU_1_IEN_B1TCM_CE_WIDTH   1
+#define RPU_RPU_1_IEN_B1TCM_CE_MASK    0X00004000
+
+#define RPU_RPU_1_IEN_B0TCM_CE_SHIFT   13
+#define RPU_RPU_1_IEN_B0TCM_CE_WIDTH   1
+#define RPU_RPU_1_IEN_B0TCM_CE_MASK    0X00002000
+
+#define RPU_RPU_1_IEN_ATCM_CE_SHIFT   12
+#define RPU_RPU_1_IEN_ATCM_CE_WIDTH   1
+#define RPU_RPU_1_IEN_ATCM_CE_MASK    0X00001000
+
+#define RPU_RPU_1_IEN_B1TCM_UE_SHIFT   11
+#define RPU_RPU_1_IEN_B1TCM_UE_WIDTH   1
+#define RPU_RPU_1_IEN_B1TCM_UE_MASK    0X00000800
+
+#define RPU_RPU_1_IEN_B0TCM_UE_SHIFT   10
+#define RPU_RPU_1_IEN_B0TCM_UE_WIDTH   1
+#define RPU_RPU_1_IEN_B0TCM_UE_MASK    0X00000400
+
+#define RPU_RPU_1_IEN_ATCM_UE_SHIFT   9
+#define RPU_RPU_1_IEN_ATCM_UE_WIDTH   1
+#define RPU_RPU_1_IEN_ATCM_UE_MASK    0X00000200
+
+#define RPU_RPU_1_IEN_DTAG_DIRTY_FAT_SHIFT   8
+#define RPU_RPU_1_IEN_DTAG_DIRTY_FAT_WIDTH   1
+#define RPU_RPU_1_IEN_DTAG_DIRTY_FAT_MASK    0X00000100
+
+#define RPU_RPU_1_IEN_DDATA_FAT_SHIFT   7
+#define RPU_RPU_1_IEN_DDATA_FAT_WIDTH   1
+#define RPU_RPU_1_IEN_DDATA_FAT_MASK    0X00000080
+
+#define RPU_RPU_1_IEN_TCM_LST_FAT_SHIFT   6
+#define RPU_RPU_1_IEN_TCM_LST_FAT_WIDTH   1
+#define RPU_RPU_1_IEN_TCM_LST_FAT_MASK    0X00000040
+
+#define RPU_RPU_1_IEN_TCM_PREFETCH_FAT_SHIFT   5
+#define RPU_RPU_1_IEN_TCM_PREFETCH_FAT_WIDTH   1
+#define RPU_RPU_1_IEN_TCM_PREFETCH_FAT_MASK    0X00000020
+
+#define RPU_RPU_1_IEN_DDATA_CE_SHIFT   4
+#define RPU_RPU_1_IEN_DDATA_CE_WIDTH   1
+#define RPU_RPU_1_IEN_DDATA_CE_MASK    0X00000010
+
+#define RPU_RPU_1_IEN_DTAG_DIRTY_CE_SHIFT   3
+#define RPU_RPU_1_IEN_DTAG_DIRTY_CE_WIDTH   1
+#define RPU_RPU_1_IEN_DTAG_DIRTY_CE_MASK    0X00000008
+
+#define RPU_RPU_1_IEN_IDATA_CE_SHIFT   2
+#define RPU_RPU_1_IEN_IDATA_CE_WIDTH   1
+#define RPU_RPU_1_IEN_IDATA_CE_MASK    0X00000004
+
+#define RPU_RPU_1_IEN_ITAG_CE_SHIFT   1
+#define RPU_RPU_1_IEN_ITAG_CE_WIDTH   1
+#define RPU_RPU_1_IEN_ITAG_CE_MASK    0X00000002
+
+#define RPU_RPU_1_IEN_APB_ERR_SHIFT   0
+#define RPU_RPU_1_IEN_APB_ERR_WIDTH   1
+#define RPU_RPU_1_IEN_APB_ERR_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_1_IDS
+ */
+#define RPU_RPU_1_IDS    ( ( RPU_BASEADDR ) + 0X00000220 )
+
+#define RPU_RPU_1_IDS_FPUFC_SHIFT   24
+#define RPU_RPU_1_IDS_FPUFC_WIDTH   1
+#define RPU_RPU_1_IDS_FPUFC_MASK    0X01000000
+
+#define RPU_RPU_1_IDS_FPOFC_SHIFT   23
+#define RPU_RPU_1_IDS_FPOFC_WIDTH   1
+#define RPU_RPU_1_IDS_FPOFC_MASK    0X00800000
+
+#define RPU_RPU_1_IDS_FPIXC_SHIFT   22
+#define RPU_RPU_1_IDS_FPIXC_WIDTH   1
+#define RPU_RPU_1_IDS_FPIXC_MASK    0X00400000
+
+#define RPU_RPU_1_IDS_FPIOC_SHIFT   21
+#define RPU_RPU_1_IDS_FPIOC_WIDTH   1
+#define RPU_RPU_1_IDS_FPIOC_MASK    0X00200000
+
+#define RPU_RPU_1_IDS_FPIDC_SHIFT   20
+#define RPU_RPU_1_IDS_FPIDC_WIDTH   1
+#define RPU_RPU_1_IDS_FPIDC_MASK    0X00100000
+
+#define RPU_RPU_1_IDS_FPDZC_SHIFT   19
+#define RPU_RPU_1_IDS_FPDZC_WIDTH   1
+#define RPU_RPU_1_IDS_FPDZC_MASK    0X00080000
+
+#define RPU_RPU_1_IDS_TCM_ASLV_CE_SHIFT   18
+#define RPU_RPU_1_IDS_TCM_ASLV_CE_WIDTH   1
+#define RPU_RPU_1_IDS_TCM_ASLV_CE_MASK    0X00040000
+
+#define RPU_RPU_1_IDS_TCM_ASLV_FAT_SHIFT   17
+#define RPU_RPU_1_IDS_TCM_ASLV_FAT_WIDTH   1
+#define RPU_RPU_1_IDS_TCM_ASLV_FAT_MASK    0X00020000
+
+#define RPU_RPU_1_IDS_TCM_LST_CE_SHIFT   16
+#define RPU_RPU_1_IDS_TCM_LST_CE_WIDTH   1
+#define RPU_RPU_1_IDS_TCM_LST_CE_MASK    0X00010000
+
+#define RPU_RPU_1_IDS_TCM_PREFETCH_CE_SHIFT   15
+#define RPU_RPU_1_IDS_TCM_PREFETCH_CE_WIDTH   1
+#define RPU_RPU_1_IDS_TCM_PREFETCH_CE_MASK    0X00008000
+
+#define RPU_RPU_1_IDS_B1TCM_CE_SHIFT   14
+#define RPU_RPU_1_IDS_B1TCM_CE_WIDTH   1
+#define RPU_RPU_1_IDS_B1TCM_CE_MASK    0X00004000
+
+#define RPU_RPU_1_IDS_B0TCM_CE_SHIFT   13
+#define RPU_RPU_1_IDS_B0TCM_CE_WIDTH   1
+#define RPU_RPU_1_IDS_B0TCM_CE_MASK    0X00002000
+
+#define RPU_RPU_1_IDS_ATCM_CE_SHIFT   12
+#define RPU_RPU_1_IDS_ATCM_CE_WIDTH   1
+#define RPU_RPU_1_IDS_ATCM_CE_MASK    0X00001000
+
+#define RPU_RPU_1_IDS_B1TCM_UE_SHIFT   11
+#define RPU_RPU_1_IDS_B1TCM_UE_WIDTH   1
+#define RPU_RPU_1_IDS_B1TCM_UE_MASK    0X00000800
+
+#define RPU_RPU_1_IDS_B0TCM_UE_SHIFT   10
+#define RPU_RPU_1_IDS_B0TCM_UE_WIDTH   1
+#define RPU_RPU_1_IDS_B0TCM_UE_MASK    0X00000400
+
+#define RPU_RPU_1_IDS_ATCM_UE_SHIFT   9
+#define RPU_RPU_1_IDS_ATCM_UE_WIDTH   1
+#define RPU_RPU_1_IDS_ATCM_UE_MASK    0X00000200
+
+#define RPU_RPU_1_IDS_DTAG_DIRTY_FAT_SHIFT   8
+#define RPU_RPU_1_IDS_DTAG_DIRTY_FAT_WIDTH   1
+#define RPU_RPU_1_IDS_DTAG_DIRTY_FAT_MASK    0X00000100
+
+#define RPU_RPU_1_IDS_DDATA_FAT_SHIFT   7
+#define RPU_RPU_1_IDS_DDATA_FAT_WIDTH   1
+#define RPU_RPU_1_IDS_DDATA_FAT_MASK    0X00000080
+
+#define RPU_RPU_1_IDS_TCM_LST_FAT_SHIFT   6
+#define RPU_RPU_1_IDS_TCM_LST_FAT_WIDTH   1
+#define RPU_RPU_1_IDS_TCM_LST_FAT_MASK    0X00000040
+
+#define RPU_RPU_1_IDS_TCM_PREFETCH_FAT_SHIFT   5
+#define RPU_RPU_1_IDS_TCM_PREFETCH_FAT_WIDTH   1
+#define RPU_RPU_1_IDS_TCM_PREFETCH_FAT_MASK    0X00000020
+
+#define RPU_RPU_1_IDS_DDATA_CE_SHIFT   4
+#define RPU_RPU_1_IDS_DDATA_CE_WIDTH   1
+#define RPU_RPU_1_IDS_DDATA_CE_MASK    0X00000010
+
+#define RPU_RPU_1_IDS_DTAG_DIRTY_CE_SHIFT   3
+#define RPU_RPU_1_IDS_DTAG_DIRTY_CE_WIDTH   1
+#define RPU_RPU_1_IDS_DTAG_DIRTY_CE_MASK    0X00000008
+
+#define RPU_RPU_1_IDS_IDATA_CE_SHIFT   2
+#define RPU_RPU_1_IDS_IDATA_CE_WIDTH   1
+#define RPU_RPU_1_IDS_IDATA_CE_MASK    0X00000004
+
+#define RPU_RPU_1_IDS_ITAG_CE_SHIFT   1
+#define RPU_RPU_1_IDS_ITAG_CE_WIDTH   1
+#define RPU_RPU_1_IDS_ITAG_CE_MASK    0X00000002
+
+#define RPU_RPU_1_IDS_APB_ERR_SHIFT   0
+#define RPU_RPU_1_IDS_APB_ERR_WIDTH   1
+#define RPU_RPU_1_IDS_APB_ERR_MASK    0X00000001
+
+/**
+ * Register: RPU_RPU_1_SLV_BASE
+ */
+#define RPU_RPU_1_SLV_BASE    ( ( RPU_BASEADDR ) + 0X00000224 )
+
+#define RPU_RPU_1_SLV_BASE_ADDR_SHIFT   0
+#define RPU_RPU_1_SLV_BASE_ADDR_WIDTH   8
+#define RPU_RPU_1_SLV_BASE_ADDR_MASK    0X000000FF
+
+/**
+ * Register: RPU_RPU_1_AXI_OVER
+ */
+#define RPU_RPU_1_AXI_OVER    ( ( RPU_BASEADDR ) + 0X00000228 )
+
+#define RPU_RPU_1_AXI_OVER_AWCACHE_SHIFT   6
+#define RPU_RPU_1_AXI_OVER_AWCACHE_WIDTH   4
+#define RPU_RPU_1_AXI_OVER_AWCACHE_MASK    0X000003C0
+
+#define RPU_RPU_1_AXI_OVER_ARCACHE_SHIFT   2
+#define RPU_RPU_1_AXI_OVER_ARCACHE_WIDTH   4
+#define RPU_RPU_1_AXI_OVER_ARCACHE_MASK    0X0000003C
+
+#define RPU_RPU_1_AXI_OVER_AWCACHE_EN_SHIFT   1
+#define RPU_RPU_1_AXI_OVER_AWCACHE_EN_WIDTH   1
+#define RPU_RPU_1_AXI_OVER_AWCACHE_EN_MASK    0X00000002
+
+#define RPU_RPU_1_AXI_OVER_ARCACHE_EN_SHIFT   0
+#define RPU_RPU_1_AXI_OVER_ARCACHE_EN_WIDTH   1
+#define RPU_RPU_1_AXI_OVER_ARCACHE_EN_MASK    0X00000001
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* _PM_RPU_H_ */
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/Makefile b/src/Xilinx/libsrc/xilsecure_v3_0/src/Makefile
new file mode 100644
index 0000000..bee9f40
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/Makefile
@@ -0,0 +1,78 @@
+###############################################################################
+#
+# Copyright (C) 2013 - 2015 Xilinx, Inc.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Use of the Software is limited solely to applications:
+# (a) running on a Xilinx device, or
+# (b) that interact with a Xilinx device through a bus or interconnect.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+# XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Except as contained in this notice, the name of the Xilinx shall not be used
+# in advertising or otherwise to promote the sale, use or other dealings in
+# this Software without prior written authorization from Xilinx.
+#
+###############################################################################
+
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS =
+LIB=libxilsecure.a
+
+EXTRA_ARCHIVE_FLAGS=rc
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+SECURE_DIR = .
+OUTS = *.o
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+SECURE_SRCS := $(wildcard *.c)
+SECURE_OBJS = $(addprefix $(SECURE_DIR)/, $(SECURE_SRCS:%.c=%.o))
+
+INCLUDEFILES=$(SECURE_DIR)/xsecure_sha.h \
+		$(SECURE_DIR)/xsecure_aes.h \
+		$(SECURE_DIR)/xsecure_rsa.h \
+		$(SECURE_DIR)/xsecure_hw.h \
+		$(SECURE_DIR)/xsecure_sha2.h \
+		$(SECURE_DIR)/xsecure.h
+
+libs: libxilsecure.a
+
+libxilsecure.a: print_msg_secure $(SECURE_OBJS)
+	cp $(SECURE_DIR)/$(LIB) $(RELEASEDIR)
+	$(ARCHIVER) $(EXTRA_ARCHIVE_FLAGS) ${RELEASEDIR}/${LIB} ${SECURE_OBJS}
+
+print_msg_secure:
+	@echo "Compiling XilSecure Library"
+
+.PHONY: include
+include: libxilsecure_includes
+
+libxilsecure_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf $(SECURE_DIR)/${OBJECTS}
+	rm -rf ${RELEASEDIR}/${LIB}
+
+$(SECURE_DIR)/%.o: $(SECURE_DIR)/%.c $(INCLUDEFILES)
+	$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) -c $< -o $@
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/libxilsecure.a b/src/Xilinx/libsrc/xilsecure_v3_0/src/libxilsecure.a
new file mode 100644
index 0000000..b811e0c
Binary files /dev/null and b/src/Xilinx/libsrc/xilsecure_v3_0/src/libxilsecure.a differ
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure.c b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure.c
new file mode 100644
index 0000000..452181c
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure.c
@@ -0,0 +1,1317 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 - 18 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsecure.c
+*
+* This file contains the implementation of the interface functions for secure
+* library.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -------------------------------------------------------
+* 1.0   DP  02/15/17 Initial release
+* 2.2   vns 09/18/17 Added APIs to support generic functionality
+*                    for SHA3 and RSA hardware at linux level.
+*                    Removed RSA-SHA2 authentication support
+*                    for loading linux image and dtb from u-boot, as here it
+*                    is using SHA2 hash and single RSA key pair authentication
+* 3.0   vns 02/21/18 Added support for single partition image authentication
+*                    and/or decryption.
+* 

+*
+* @note
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xsecure.h"
+
+XSecure_Aes SecureAes;
+XSecure_Rsa Secure_Rsa;
+XSecure_Sha3 Sha3Instance;
+
+XCsuDma CsuDma = {0U};
+
+/************************** Function Prototypes ******************************/
+
+/************************** Function Definitions *****************************/
+
+/*****************************************************************************/
+/**
+ * This function is used to initialize the DMA driver
+ *
+ * @param	None
+ *
+ * @return	returns the error code on any error
+ *		returns XST_SUCCESS on success
+ *
+ *****************************************************************************/
+u32 XSecure_CsuDmaInit(void)
+{
+	u32 Status;
+	s32 SStatus;
+	XCsuDma_Config * CsuDmaConfig;
+
+	CsuDmaConfig = XCsuDma_LookupConfig(XSECURE_CSUDMA_DEVICEID);
+	if (NULL == CsuDmaConfig) {
+		Status = XSECURE_ERROR_CSUDMA_INIT_FAIL;
+		goto END;
+	}
+
+	SStatus = XCsuDma_CfgInitialize(&CsuDma, CsuDmaConfig,
+			CsuDmaConfig->BaseAddress);
+	if (SStatus != XST_SUCCESS) {
+		Status = XSECURE_ERROR_CSUDMA_INIT_FAIL;
+		goto END;
+	}
+	Status = XST_SUCCESS;
+END:
+	return Status;
+}
+
+/****************************************************************************/
+/**
+ * Converts the char into the equivalent nibble.
+ *	Ex: 'a' -> 0xa, 'A' -> 0xa, '9'->0x9
+ *
+ * @param	InChar is input character. It has to be between 0-9,a-f,A-F
+ * @param	Num is the output nibble.
+ *
+ * @return
+ *		- XST_SUCCESS no errors occured.
+ *		- ERROR when input parameters are not valid
+ *
+ * @note	None.
+ *
+ *****************************************************************************/
+static u32 XSecure_ConvertCharToNibble(char InChar, u8 *Num) {
+	/* Convert the char to nibble */
+	if ((InChar >= '0') && (InChar <= '9'))
+		*Num = InChar - '0';
+	else if ((InChar >= 'a') && (InChar <= 'f'))
+		*Num = InChar - 'a' + 10;
+	else if ((InChar >= 'A') && (InChar <= 'F'))
+		*Num = InChar - 'A' + 10;
+	else
+		return XSECURE_STRING_INVALID_ERROR;
+
+	return XST_SUCCESS;
+}
+
+/****************************************************************************/
+/**
+ * Converts the string into the equivalent Hex buffer.
+ *	Ex: "abc123" -> {0xab, 0xc1, 0x23}
+ *
+ * @param	Str is a Input String. Will support the lower and upper
+ *		case values. Value should be between 0-9, a-f and A-F
+ *
+ * @param	Buf is Output buffer.
+ * @param	Len of the input string. Should have even values
+ *
+ * @return
+ *		- XST_SUCCESS no errors occured.
+ *		- ERROR when input parameters are not valid
+ *		- an error when input buffer has invalid values
+ *
+ * @note	None.
+ *
+ *****************************************************************************/
+static u32 XSecure_ConvertStringToHex(char *Str, u32 *Buf, u8 Len)
+{
+	u32 Status = XST_SUCCESS;
+	u8 ConvertedLen = 0;
+	u8 Index = 0;
+	u8 Nibble[XSECURE_MAX_NIBBLES];
+	u8 NibbleNum;
+
+	while (ConvertedLen < Len) {
+		/* Convert char to nibble */
+		for (NibbleNum = 0;
+		NibbleNum < XSECURE_ARRAY_LENGTH(Nibble); NibbleNum++) {
+			Status = XSecure_ConvertCharToNibble(
+				Str[ConvertedLen++], &Nibble[NibbleNum]);
+
+			if (Status != XST_SUCCESS)
+				/* Error converting char to nibble */
+				return XSECURE_STRING_INVALID_ERROR;
+
+		}
+
+		Buf[Index++] = Nibble[0] << 28 | Nibble[1] << 24 |
+				Nibble[2] << 20 | Nibble[3] << 16 |
+				Nibble[4] << 12 | Nibble[5] << 8 |
+				Nibble[6] << 4 | Nibble[7];
+	}
+	return XST_SUCCESS;
+}
+
+
+/*****************************************************************************/
+/** This is the function to decrypt the encrypted data and load back to memory
+ *
+ * @param	WrSize: Number of bytes that the encrypted image contains
+ *
+ * @param       WrAddrHigh: Higher 32-bit Linear memory space from where CSUDMA
+ *              will read the data
+ *
+ * @param       WrAddrLow: Lower 32-bit Linear memory space from where CSUDMA
+ *              will read the data
+ *
+ * @return	None
+ *
+ *****************************************************************************/
+static u32 XSecure_Decrypt(u32 WrSize, u32 SrcAddrHigh, u32 SrcAddrLow)
+{
+	u32 Status = XST_SUCCESS;
+	u64 WrAddr;
+	u8 Index;
+
+	WrSize *= XSECURE_WORD_LEN;
+	WrAddr = ((u64)SrcAddrHigh << 32) | SrcAddrLow;
+	XSecure_ConvertStringToHex((char *)(UINTPTR)WrAddr + WrSize,
+					Key, XSECURE_KEY_STR_LEN);
+	XSecure_ConvertStringToHex(
+		(char *)(UINTPTR)WrAddr + XSECURE_KEY_STR_LEN + WrSize,
+				Iv, XSECURE_IV_STR_LEN);
+
+	/* Xilsecure expects Key in big endian form */
+	for (Index = 0; Index < XSECURE_ARRAY_LENGTH(Key); Index++)
+		Key[Index] = Xil_Htonl(Key[Index]);
+	for (Index = 0; Index < XSECURE_ARRAY_LENGTH(Iv); Index++)
+		Iv[Index] = Xil_Htonl(Iv[Index]);
+
+	/* Initialize the Aes driver so that it's ready to use */
+	XSecure_AesInitialize(&SecureAes, &CsuDma, XSECURE_CSU_AES_KEY_SRC_KUP,
+			                           (u32 *)Iv, (u32 *)Key);
+	Status = XSecure_AesDecrypt(&SecureAes,
+				(u8 *)(UINTPTR)WrAddr,
+			(u8 *)(UINTPTR)WrAddr, WrSize - XSECURE_GCM_TAG_LEN);
+
+	return Status;
+}
+
+/*****************************************************************************/
+/** This is the function to authenticate or decrypt or both for secure images
+  * based on flags
+ *
+ * @param	WrSize: Number of bytes that the secure image contains
+ *
+ * @param       SrcAddrHigh: Higher 32-bit Linear memory space from where CSUDMA
+ *              will read the data
+ *
+ * @param       SrcAddrLow: Lower 32-bit Linear memory space from where CSUDMA
+ *              will read the data
+ * @param	flags:
+ *		 1 - Decrypt the image.
+ *		 0 - Authenticate the image.
+ *		 0 - Authenticated and decrypt the image.
+ * NOTE -
+ *  The current implementation supports only decryption of images
+ *
+ * @return	error or success based on implementation in secure libraries
+ *
+ *****************************************************************************/
+u32 XSecure_RsaAes(u32 SrcAddrHigh, u32 SrcAddrLow, u32 WrSize, u32 Flags)
+{
+	u32 Status = XST_SUCCESS;
+
+	switch (Flags & XSECURE_MASK) {
+	case XSECURE_AES:
+		Status = XSecure_CsuDmaInit();
+		if (Status != XST_SUCCESS) {
+			return XSECURE_ERROR_CSUDMA_INIT_FAIL;
+		}
+		Status = XSecure_Decrypt(WrSize, SrcAddrHigh, SrcAddrLow);
+		break;
+	case XSECURE_RSA:
+
+	case XSECURE_RSA_AES:
+
+	default:
+		Status = XSECURE_INVALID_FLAG;
+	}
+	return Status;
+}
+
+ /****************************************************************************/
+ /**
+ * This function access the xilsecure SHA3 hardware based on the flags provided
+ * to calculate the SHA3 hash.
+ *
+ * @param	SrcAddrHigh  Higher 32-bit of the input or output address.
+ * @param	SrcAddrLow   Lower 32-bit of the input or output address.
+ * @param	SrcSize      Size of the data on which hash should be
+ *		calculated.
+ * @param	Flags: inputs for the operation requested
+ *		BIT(0) - for initializing csudma driver and SHA3,
+ *		(Here address and size inputs can be NULL)
+ *		BIT(1) - To call Sha3_Update API which can be called multiple
+ *		times when data is not contiguous.
+ *		BIT(2) - to get final hash of the whole updated data.
+ *		Hash will be overwritten at provided address with 48 bytes.
+ *
+ * @return	Returns Status XST_SUCCESS on success and error code on failure.
+ *
+ *****************************************************************************/
+u32 XSecure_Sha3Hash(u32 SrcAddrHigh, u32 SrcAddrLow, u32 SrcSize, u32 Flags)
+{
+	u32 Status = XST_SUCCESS;
+	u64 SrcAddr = ((u64)SrcAddrHigh << 32) | SrcAddrLow;
+
+	switch (Flags & XSECURE_SHA3_MASK) {
+	case XSECURE_SHA3_INIT:
+		Status = XSecure_CsuDmaInit();
+		if (Status != XST_SUCCESS) {
+			return XSECURE_ERROR_CSUDMA_INIT_FAIL;
+		}
+
+		Status = XSecure_Sha3Initialize(&Sha3Instance, &CsuDma);
+		if (Status != XST_SUCCESS) {
+			return XSECURE_SHA3_INIT_FAIL;
+		}
+		XSecure_Sha3Start(&Sha3Instance);
+		break;
+	case XSECURE_SHA3_UPDATE:
+		if (SrcSize % 4 != 0x00) {
+			return XSECURE_SIZE_ERR;
+		}
+		XSecure_Sha3Update(&Sha3Instance, (u8 *)(UINTPTR)SrcAddr,
+						SrcSize);
+		break;
+	case XSECURE_SHA3_FINAL:
+		XSecure_Sha3Finish(&Sha3Instance, (u8 *)(UINTPTR)SrcAddr);
+		break;
+	default:
+		Status = XSECURE_INVALID_FLAG;
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * This is the function to RSA decrypt or encrypt the provided data and load back
+ * to memory
+ *
+ * @param	SrcAddrHigh	Higher 32-bit Linear memory space from where
+ *		CSUDMA will read the data
+ * @param	SrcAddrLow	Lower 32-bit Linear memory space from where
+ *		CSUDMA will read the data
+ * @param	WrSize	Number of bytes to be encrypted or decrypted.
+ * @param	Flags:
+ *		BIT(0) - Encryption/Decryption
+ *			 0 - Rsa Private key Decryption
+ *			 1 - Rsa Public key Encryption
+ *
+ * @return	Returns Status XST_SUCCESS on success and error code on failure.
+ *
+ * @note	Data to be encrypted/Decrypted + Modulus + Exponent
+ *		Modulus and Data should always be key size
+ *		Exponent : private key's exponent is key size while decrypting
+ *		the signature and 32 bit for public key for encrypting the
+ *		signature
+ *		In this API we are not taking exponentiation value.
+ *
+ *****************************************************************************/
+u32 XSecure_RsaCore(u32 SrcAddrHigh, u32 SrcAddrLow, u32 SrcSize,
+				u32 Flags)
+{
+	u32 Status = XST_SUCCESS;
+	u64 WrAddr = ((u64)SrcAddrHigh << 32) | SrcAddrLow;
+	u8 *Modulus = (u8 *)(UINTPTR)(WrAddr + SrcSize);
+	u8 *Exponent = (u8 *)(UINTPTR)(WrAddr + SrcSize
+						+ SrcSize);
+
+	Status = XSecure_RsaInitialize(&Secure_Rsa, Modulus, NULL, Exponent);
+	if (Status != XST_SUCCESS) {
+		goto END;
+	}
+	switch (Flags & XSECURE_RSA_OPERATION) {
+	case XSECURE_DEC:
+		Status = XSecure_RsaPrivateDecrypt(&Secure_Rsa,
+			(u8 *)(UINTPTR)WrAddr, SrcSize,(u8 *)(UINTPTR)WrAddr);
+		break;
+	case XSECURE_ENC:
+		Status = XSecure_RsaPublicEncrypt(&Secure_Rsa,
+			(u8 *)(UINTPTR)WrAddr, SrcSize,(u8 *)(UINTPTR)WrAddr);
+		break;
+	default:
+		Status = XSECURE_INVALID_FLAG;
+		break;
+	}
+
+END:
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function performs authentication of data by encrypting the signature
+ * with provided key and compares with hash of the data and returns success or
+ * failure.
+ *
+ * @param	Signature	Pointer to the RSA signature of the data
+ * @param	Key		Pointer to XSecure_RsaKey structure.
+ * @param	Hash		Pointer to the hash of the data to be
+ *		authenticated.
+ *
+ * @return	Returns Status
+ * 		- XST_SUCCESS on success
+ * 		- Error code on failure
+ *
+ *****************************************************************************/
+u32 XSecure_DataAuth(u8 *Signature, XSecure_RsaKey *Key, u8 *Hash)
+{
+
+	u32 Status;
+	XSecure_Rsa SecureRsa;
+	u8 EncSignature[XSECURE_MOD_LEN];
+
+	/* Assert conditions */
+	Xil_AssertNonvoid(Signature != NULL);
+	Xil_AssertNonvoid(Key != NULL);
+	Xil_AssertNonvoid((Key->Modulus != NULL) && (Key->Exponent != NULL));
+	Xil_AssertNonvoid(Hash != NULL);
+
+	/* Initialize RSA instance */
+	Status = XSecure_RsaInitialize(&SecureRsa,
+			Key->Modulus, Key->Exponentiation, Key->Exponent);
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_RSA_INIT_ERR;
+		goto END;
+	}
+
+	/* Encrypt signature with RSA key */
+	Status = XSecure_RsaPublicEncrypt(&SecureRsa, Signature,
+			XSECURE_MOD_LEN, EncSignature);
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_RSA_ENCRYPT_ERR;
+		goto END;
+	}
+
+
+	/* Compare encrypted signature with sha3 hash calculated on data */
+	Status = XSecure_RsaSignVerification(EncSignature, Hash,
+					XSECURE_HASH_TYPE_SHA3);
+	if (Status != XST_SUCCESS) {
+		goto END;
+		Status = XSECURE_VERIFY_ERR;
+	}
+
+END:
+	if (Status != XST_SUCCESS) {
+		Status = Status | XSECURE_AUTH_FAILURE;
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function performs authentication of a partition of an image.
+ *
+ * @param	CsuDmaInstPtr	Pointer to the CSU DMA instance.
+ * @param	Data		Pointer to partition to be authenticated.
+ * @param	Size		Represents the size of the partition.
+ * @param	AuthCertPtr	Pointer to authentication certificate of the
+ *		partition.
+ *
+ * @return	Returns Status
+ *		- XST_SUCCESS on success
+ *		- Error code on failure
+ *
+ *****************************************************************************/
+u32 XSecure_PartitionAuthentication(XCsuDma *CsuDmaInstPtr, u8 *Data,
+				u32 Size, u8 *AuthCertPtr)
+{
+	u32 Status;
+	XSecure_Sha3 SecureSha3;
+	u8 Hash[XSECURE_HASH_TYPE_SHA3];
+	u8 *Signature = (AuthCertPtr + XSECURE_AUTH_CERT_PARTSIG_OFFSET);
+	XSecure_RsaKey Key;
+	u8 *AcPtr = AuthCertPtr;
+
+	/* Assert conditions */
+	Xil_AssertNonvoid(CsuDmaInstPtr != NULL);
+	Xil_AssertNonvoid(Data != NULL);
+	Xil_AssertNonvoid(Size != 0x00);
+	Xil_AssertNonvoid(AuthCertPtr != NULL);
+
+	/* Initialize Sha and RSA instances */
+	Status = XSecure_Sha3Initialize(&SecureSha3, CsuDmaInstPtr);
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_SHA3_INIT_FAIL;
+		goto END;
+	}
+
+	/* Calculate Hash on Data to be authenticated */
+	XSecure_Sha3Start(&SecureSha3);
+	XSecure_Sha3Update(&SecureSha3, Data, Size);
+	XSecure_Sha3Update(&SecureSha3, AuthCertPtr,
+		(XSECURE_AUTH_CERT_MIN_SIZE - XSECURE_PARTITION_SIG_SIZE));
+	XSecure_Sha3Finish(&SecureSha3, Hash);
+
+	AcPtr += (XSECURE_RSA_AC_ALIGN + XSECURE_PPK_SIZE);
+	Key.Modulus = AcPtr;
+
+	AcPtr += XSECURE_SPK_MOD_SIZE;
+	Key.Exponentiation = AcPtr;
+
+	AcPtr += XSECURE_SPK_MOD_EXT_SIZE;
+	Key.Exponent = AcPtr;
+
+	Status = XSecure_DataAuth(Signature, &Key, Hash);
+END:
+	if (Status != XST_SUCCESS) {
+		Status = Status | XSECURE_AUTH_FAILURE;
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function performs authentication of a boot header of the image.
+ *
+ * @param	CsuDmaInstPtr	Pointer to the CSU DMA instance.
+ * @param	Data		pointer to boot header of the image.
+ * @param	Size 		Size of the boot header.
+ * @param	AuthCertPtr	Pointer to authentication certificate.
+ *
+ * @return	Returns Status
+ * 		- XST_SUCCESS on success
+ * 		- XST_FAILURE on failure
+ *
+ *****************************************************************************/
+static inline u32 XSecure_BhdrAuthentication(XCsuDma *CsuDmaInstPtr,
+				u8 *Data, u32 Size, u8 *AuthCertPtr)
+{
+
+	u32 Status;
+	XSecure_Sha3 SecureSha3;
+	u8 Hash[XSECURE_HASH_TYPE_SHA3];
+	u8 *Signature = (AuthCertPtr + XSECURE_AUTH_CERT_BHDRSIG_OFFSET);
+	XSecure_RsaKey Key;
+	u8 *AcPtr = AuthCertPtr;
+
+	/* Assert conditions */
+	Xil_AssertNonvoid(CsuDmaInstPtr != NULL);
+	Xil_AssertNonvoid(Data != NULL);
+	Xil_AssertNonvoid(Size != 0x00);
+	Xil_AssertNonvoid(AuthCertPtr != NULL);
+
+	/* Initialize Sha and RSA instances */
+	Status = XSecure_Sha3Initialize(&SecureSha3, CsuDmaInstPtr);
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_SHA3_INIT_FAIL;
+		goto END;
+	}
+
+	Status = XSecure_Sha3PadSelection(&SecureSha3,
+					XSECURE_CSU_KECCAK_SHA3);
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_SHA3_PADSELECT_ERR;
+		goto END;
+	}
+	/* Calculate Hash on Data to be authenticated */
+	XSecure_Sha3Start(&SecureSha3);
+	XSecure_Sha3Update(&SecureSha3, Data, Size);
+	XSecure_Sha3Finish(&SecureSha3, Hash);
+
+	AcPtr += (XSECURE_RSA_AC_ALIGN + XSECURE_PPK_SIZE);
+	Key.Modulus = AcPtr;
+
+	AcPtr += XSECURE_SPK_MOD_SIZE;
+	Key.Exponentiation = AcPtr;
+
+	AcPtr += XSECURE_SPK_MOD_EXT_SIZE;
+	Key.Exponent = AcPtr;
+
+
+	Status = XSecure_DataAuth(Signature, &Key, Hash);
+	if (Status != XST_SUCCESS) {
+		goto END;
+	}
+
+END:
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_BOOT_HDR_FAIL | Status;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function copies the data from specified source to destination
+ * using CSU DMA.
+ *
+ * @param	DestPtr		Pointer to the destination address.
+ * @param	SrcPtr		Pointer to the source address.
+ * @param	Size 		Data size to be copied.
+ *
+ * @return	Returns Status
+ * 		- XST_SUCCESS on success
+ * 		- XST_FAILURE on failure
+ *
+ *****************************************************************************/
+u32 XSecure_MemCopy(void * DestPtr, void * SrcPtr, u32 Size)
+{
+
+	XSecure_SssSetup(XSecure_SssInputDstDma
+			(XSECURE_CSU_SSS_SRC_SRC_DMA));
+
+
+	/* Data transfer in loop back mode */
+	XCsuDma_Transfer(&CsuDma, XCSUDMA_DST_CHANNEL,
+				(UINTPTR)DestPtr, Size, 1);
+	XCsuDma_Transfer(&CsuDma, XCSUDMA_SRC_CHANNEL,
+				(UINTPTR)SrcPtr, Size, 1);
+
+	/* Polling for transfer to be done */
+	XCsuDma_WaitForDone(&CsuDma, XCSUDMA_DST_CHANNEL);
+
+	/* To acknowledge the transfer has completed */
+	XCsuDma_IntrClear(&CsuDma, XCSUDMA_SRC_CHANNEL, XCSUDMA_IXR_DONE_MASK);
+	XCsuDma_IntrClear(&CsuDma, XCSUDMA_DST_CHANNEL, XCSUDMA_IXR_DONE_MASK);
+
+	return XST_SUCCESS;
+}
+
+#if defined (PSU_PMU)
+/*****************************************************************************/
+/**
+ * @brief
+ * This function verifies SPK by authenticating SPK with PPK, also checks either
+ * SPK is revoked or not.if it is not boot header authentication.
+ *
+ * @param	AcPtr		Pointer to the authentication certificate.
+ * @param	EfuseRsaenable	Input variable which holds
+ *		efuse RSA authentication or boot header authentication.
+ *		0 - Boot header authentication
+ *		1 - RSA authentication
+ *
+ * @return	Returns Status
+ * 		- XST_SUCCESS on success
+ * 		- Error code on failure
+ *
+ *****************************************************************************/
+u32 XSecure_VerifySpk(u8 *AcPtr, u32 EfuseRsaenable)
+{
+	u32 Status = XST_SUCCESS;
+
+	if (EfuseRsaenable != 0x00) {
+		/* Verify SPK with verified PPK */
+		Status = XSecure_SpkAuthentication(&CsuDma, AcPtr, EfusePpk);
+		if (Status != XST_SUCCESS) {
+			goto END;
+		}
+		/* SPK revocation */
+		Status = XSecure_SpkRevokeCheck(AcPtr);
+		if (Status != XST_SUCCESS) {
+			goto END;
+		}
+	} else {
+		/* Verify SPK with PPK in authentication certificate */
+		Status = XSecure_SpkAuthentication(&CsuDma, AcPtr, NULL);
+		if (Status != XST_SUCCESS) {
+			goto END;
+		}
+	}
+
+END:
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function authenticates the single partition image's boot header and
+ * image header, also copies all the required details to the ImageInfo pointer.
+ *
+ * @param	StartAddr	Pointer to the single partition image.
+ * @param	ImageInfo	Pointer to XSecure_ImageInfo structure.
+ *
+ * @return	Returns Status
+ * 		- XST_SUCCESS on success
+ * 		- Error code on failure
+ *		- XSECURE_AUTH_NOT_ENABLED - represents image is not
+ *		authenticated.
+ *
+ * @note	Copies the header and authentication certificate to internal
+ *		buffer.
+ *
+ *****************************************************************************/
+u32 XSecure_AuthenticationHeaders(u8 *StartAddr, XSecure_ImageInfo *ImageInfo)
+{
+	u32 ImgAttributes;
+	u32 Status = XST_FAILURE;
+	u32 ImgHdrToffset;
+	u32 AuthCertOffset;
+	u32 SizeofBH;
+	u32 SizeofImgHdr;
+	u32 PhOffset;
+	u8 *IvPtr = (u8 *)(UINTPTR)Iv;
+
+	/* Pointer IV available */
+	ImageInfo->Iv = Iv;
+
+	memset(Buffer, 0, XSECURE_BUFFER_SIZE);
+	memset(AcBuf, 0, XSECURE_AUTH_CERT_MIN_SIZE);
+
+	ImageInfo->EfuseRsaenable = XSecure_IsRsaEnabled();
+
+	/* Copy boot header to internal buffer */
+	XSecure_MemCopy(Buffer, StartAddr,
+		XSECURE_BOOT_HDR_MAX_SIZE/XSECURE_WORD_LEN);
+
+	/* Know image header's authentication certificate */
+	ImgHdrToffset = (Xil_In32((u32)(Buffer + XSECURE_IMAGE_HDR_OFFSET)));
+	AuthCertOffset = Xil_In32((UINTPTR)(StartAddr +
+			ImgHdrToffset + XSECURE_AC_IMAGE_HDR_OFFSET)) *
+					XSECURE_WORD_LEN;
+	if (AuthCertOffset == 0x00) {
+		if (ImageInfo->EfuseRsaenable != 0x00) {
+			return XSECURE_AUTH_ISCOMPULSORY;
+		}
+		return XSECURE_AUTH_NOT_ENABLED;
+	}
+
+	/* Copy Image header authentication certificate to local memory */
+	XSecure_MemCopy(AcBuf, (u8 *)(StartAddr + AuthCertOffset),
+			XSECURE_AUTH_CERT_MIN_SIZE/XSECURE_WORD_LEN);
+
+	ImgAttributes = Xil_In32((UINTPTR)(Buffer +
+				XSECURE_IMAGE_ATTR_OFFSET));
+
+	if ((ImgAttributes & XSECURE_IMG_ATTR_BHDR_MASK) != 0x00) {
+		ImageInfo->BhdrAuth = XSECURE_ENABLED;
+	}
+
+	/* If PUF helper data exists in boot header */
+	if ((ImgAttributes & XSECURE_IMG_ATTR_PUFHD_MASK) != 0x00) {
+		SizeofBH = XSECURE_BOOT_HDR_MAX_SIZE;
+	}
+	else {
+		SizeofBH = XSECURE_BOOT_HDR_MIN_SIZE;
+	}
+
+	/* Authenticate keys */
+	if (ImageInfo->EfuseRsaenable != 0x00) {
+		if (ImageInfo->BhdrAuth != 0x00) {
+			return XSECURE_BHDR_AUTH_NOT_ALLOWED;
+		}
+	}
+	if (ImageInfo->EfuseRsaenable == 0x00) {
+		if (ImageInfo->BhdrAuth == 0x00) {
+			return XSECURE_ONLY_BHDR_AUTH_ALLOWED;
+		}
+	}
+
+	if (ImageInfo->EfuseRsaenable != 0x0) {
+		/* Verify PPK hash with eFUSE */
+		Status = XSecure_PpkVerify(&CsuDma, AcBuf);
+		if (Status != XST_SUCCESS) {
+			return Status;
+		}
+		/* Copy PPK to global variable for future use */
+		XSecure_MemCopy(EfusePpk, AcBuf + XSECURE_AC_PPK_OFFSET,
+				XSECURE_PPK_SIZE/XSECURE_WORD_LEN);
+	}
+	/* SPK authentication */
+	Status = XSecure_SpkAuthentication(&CsuDma, AcBuf, NULL);
+	if (Status != XST_SUCCESS) {
+		Status = Status | XSECURE_BOOT_HDR_FAIL;
+		goto END;
+	}
+	if (ImageInfo->EfuseRsaenable != 0x00) {
+		/* SPK revocation check */
+		Status = XSecure_SpkRevokeCheck(AcBuf);
+		if (Status != XST_SUCCESS) {
+			Status = Status | XSECURE_BOOT_HDR_FAIL;
+			goto END;
+		}
+	}
+	/* Authenticated boot header */
+	Status = XSecure_BhdrAuthentication(&CsuDma, Buffer, SizeofBH, AcBuf);
+	if (Status != XST_SUCCESS) {
+		goto END;
+	}
+
+	/* Copy boot header parameters */
+	ImageInfo->KeySrc =
+		Xil_In32((UINTPTR)(Buffer + XSECURE_KEY_SOURCE_OFFSET));
+	/* Copy secure header IV */
+	if (ImageInfo->KeySrc != 0x00) {
+		XSecure_MemCopy(ImageInfo->Iv, (Buffer + XSECURE_IV_OFFSET),
+						XSECURE_IV_SIZE);
+	}
+
+	/* Image header Authentication */
+
+	/* Copy image header to internal memory */
+	SizeofImgHdr = AuthCertOffset - ImgHdrToffset;
+	XSecure_MemCopy(Buffer, (u8 *)(StartAddr + ImgHdrToffset),
+					SizeofImgHdr/XSECURE_WORD_LEN);
+
+	/* Authenticate image header */
+	Status = XSecure_PartitionAuthentication(&CsuDma,
+			Buffer, SizeofImgHdr, (u8 *)(UINTPTR)AcBuf);
+	if (Status != XST_SUCCESS) {
+		Status = Status | XSECURE_IMG_HDR_FAIL;
+		goto END;
+	}
+	 /*
+	  * After image header authentication just making sure we
+	  * have used proper AC for authenticating
+	  */
+	if ((Xil_In32((UINTPTR)(Buffer +
+		XSECURE_AC_IMAGE_HDR_OFFSET)) * XSECURE_WORD_LEN) !=
+						AuthCertOffset) {
+		Status = XSECURE_IMG_HDR_FAIL;
+		goto END;
+	}
+
+	/* Partition header */
+	PhOffset = Xil_In32((UINTPTR)(Buffer + XSECURE_PH_OFFSET));
+
+	/* Partition header offset is w.r.t to image start address */
+	XSecure_PartitionHeader *Ph = (XSecure_PartitionHeader *)(UINTPTR)
+		(Buffer + ((PhOffset * XSECURE_WORD_LEN) - ImgHdrToffset));
+
+	if (Ph->NextPartitionOffset != 0x00) {
+		Status = XSECURE_IMAGE_WITH_MUL_PARTITIONS;
+		goto END;
+	}
+	ImageInfo->PartitionHdr = Ph;
+
+	/* Add partition header IV to boot header IV */
+	if (ImageInfo->KeySrc != 0x00) {
+		*(IvPtr + XSECURE_IV_LEN) = (*(IvPtr + XSECURE_IV_LEN)) +
+						(Ph->Iv & XSECURE_PH_IV_MASK);
+	}
+
+END:
+
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function process the secure image of single partition created by
+ * bootgen.
+ *
+ * @param	AddrHigh	Higher 32-bit linear memory space of single
+ *		partition non-bitstream image.
+ * @param	AddrLow		Lower 32-bit linear memory space of single
+ *		partition non-bitstream image.
+ * @param	KupAddrHigh	Higher 32-bit linear memory space of KUP key.
+ * @param	KupAddrLow	Ligher 32-bit linear memory space of KUP key.
+ *
+ * @return	Returns Status
+ * 		- XST_SUCCESS on success
+ * 		- Error code on failure
+ *
+ *****************************************************************************/
+u32 XSecure_SecureImage(u32 AddrHigh, u32 AddrLow,
+		u32 KupAddrHigh, u32 KupAddrLow, XSecure_DataAddr *Addr)
+{
+	u8* SrcAddr = (u8 *)(UINTPTR)(((u64)AddrHigh << XSECURE_WORD_SHIFT) |
+								AddrLow);
+	u32 Status = XST_FAILURE;
+	XSecure_ImageInfo ImageHdrInfo = {0};
+	u8 *KupKey = (u8 *)(UINTPTR)(((u64)KupAddrHigh << XSECURE_WORD_SHIFT) |
+							KupAddrLow);
+	u8 NoAuth = 0;
+	u32 EncOnly;
+	u8 IsEncrypted;
+	u8 *IvPtr = (u8 *)(UINTPTR)Iv;
+	u8 *EncSrc;
+	u8 *DecDst;
+	u8 Index;
+
+	/* Address provided is null */
+	if (SrcAddr == NULL) {
+		return XST_FAILURE;
+	}
+	/* Initialize CSU DMA driver */
+	Status = XSecure_CsuDmaInit();
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_ERROR_CSUDMA_INIT_FAIL;
+		goto END;
+	}
+	/* Headers authentication */
+	Status = XSecure_AuthenticationHeaders(SrcAddr, &ImageHdrInfo);
+	if (Status != XST_SUCCESS) {
+	/* Error other than XSECURE_AUTH_NOT_ENABLED error will be an error */
+		if (Status != XSECURE_AUTH_NOT_ENABLED) {
+			goto END;
+		}
+		else {
+			/* Here Buffer still contains Boot header */
+			NoAuth = 1;
+		}
+	}
+	else {
+		/*
+		 * In case of partition is not authenticated and
+		 * headers are only authenticated
+		 */
+		Addr->AddrHigh = (u32)((u64)((UINTPTR)SrcAddr +
+				(ImageHdrInfo.PartitionHdr->DataWordOffset *
+						XSECURE_WORD_LEN)) >> 32);
+		Addr->AddrLow = (u32)((UINTPTR)SrcAddr +
+					(ImageHdrInfo.PartitionHdr->DataWordOffset) *
+							XSECURE_WORD_LEN);
+	}
+
+	/* If authentication is enabled and authentication of partition is enabled */
+	if ((NoAuth == 0) &&
+		((ImageHdrInfo.PartitionHdr->PartitionAttributes &
+			XSECURE_PH_ATTR_AUTH_ENABLE) != 0x00U)) {
+		/* Copy authentication certificate to internal memory */
+		XSecure_MemCopy(AcBuf, (u8 *)(SrcAddr +
+			(ImageHdrInfo.PartitionHdr->AuthCertificateOffset *
+					XSECURE_WORD_LEN)),
+			XSECURE_AUTH_CERT_MIN_SIZE/XSECURE_WORD_LEN);
+
+		Status = XSecure_VerifySpk(AcBuf, ImageHdrInfo.EfuseRsaenable);
+		if (Status != XST_SUCCESS) {
+			Status = XSECURE_PARTITION_FAIL | Status;
+			goto END;
+		}
+
+		/* Authenticate Partition */
+		Status = XSecure_PartitionAuthentication(&CsuDma,
+				(u8 *)(SrcAddr +
+			(ImageHdrInfo.PartitionHdr->DataWordOffset) *
+					XSECURE_WORD_LEN),
+			((ImageHdrInfo.PartitionHdr->TotalDataWordLength *
+					XSECURE_WORD_LEN) -
+			XSECURE_AUTH_CERT_MIN_SIZE),
+			(u8 *)(UINTPTR)AcBuf);
+		if (Status != XST_SUCCESS) {
+			Status = Status | XSECURE_PARTITION_FAIL;
+			goto END;
+		}
+	}
+
+	if (NoAuth != 0x0) {
+		XSecure_PartitionHeader *Ph =
+			(XSecure_PartitionHeader *)(UINTPTR)
+			(SrcAddr + Xil_In32((UINTPTR)Buffer +
+					XSECURE_PH_TABLE_OFFSET));
+		ImageHdrInfo.PartitionHdr = Ph;
+		if ((ImageHdrInfo.PartitionHdr->PartitionAttributes &
+				XSECURE_PH_ATTR_AUTH_ENABLE) != 0x00U) {
+			Status = XSECURE_HDR_NOAUTH_PART_AUTH;
+			goto END;
+		}
+	}
+
+	/* Decrypt the partition if encryption is enabled */
+	EncOnly = XSecure_IsEncOnlyEnabled();
+	IsEncrypted = ImageHdrInfo.PartitionHdr->PartitionAttributes &
+						XSECURE_PH_ATTR_ENC_ENABLE;
+	if (IsEncrypted != 0x00) {
+		/* key selection */
+		if (NoAuth != 0x00) {
+			ImageHdrInfo.KeySrc = Xil_In32((UINTPTR)Buffer +
+						XSECURE_KEY_SOURCE_OFFSET);
+			if (ImageHdrInfo.KeySrc != XSECURE_KEY_SRC_KUP) {
+				Status = XSECURE_DEC_WRONG_KEY_SOURCE;
+				goto END;
+			}
+			XSecure_MemCopy(ImageHdrInfo.Iv,
+				(Buffer + XSECURE_IV_OFFSET), XSECURE_IV_SIZE);
+			/* Add partition header IV to boot header IV */
+			*(IvPtr + XSECURE_IV_LEN) =
+				(*(IvPtr + XSECURE_IV_LEN)) +
+				(ImageHdrInfo.PartitionHdr->Iv & XSECURE_PH_IV_MASK);
+		}
+		/*
+		 * When authentication exists and requesting
+		 * for device key other than eFUSE and KUP key
+		 * when ENC_ONLY bit is blown
+		 */
+		if (EncOnly != 0x00) {
+			if ((ImageHdrInfo.KeySrc == XSECURE_KEY_SRC_BBRAM) ||
+			(ImageHdrInfo.KeySrc == XSECURE_KEY_SRC_GREY_BH) ||
+			(ImageHdrInfo.KeySrc == XSECURE_KEY_SRC_BLACK_BH)) {
+				Status = XSECURE_DEC_WRONG_KEY_SOURCE;
+				goto END;
+			}
+		}
+	}
+	else {
+		/* when image is not encrypted */
+		if (EncOnly != 0x00) {
+			Status = XSECURE_ENC_ISCOMPULSORY;
+			goto END;
+		}
+		if (NoAuth != 0x00U) {
+			Status = XSECURE_ISNOT_SECURE_IMAGE;
+			goto END;
+		}
+		else {
+			Status = XST_SUCCESS;
+			goto END;
+		}
+	}
+	if (ImageHdrInfo.KeySrc == XSECURE_KEY_SRC_KUP) {
+		if (KupKey != 0x00) {
+			XSecure_ConvertStringToHex((char *)(UINTPTR)KupKey,
+					Key, XSECURE_KEY_STR_LEN);
+			/* XilSecure expects Key in big endian form */
+			for (Index = 0; Index < XSECURE_ARRAY_LENGTH(Key);
+							Index++) {
+				Key[Index] = Xil_Htonl(Key[Index]);
+			}
+		}
+		else {
+			Status = XSECURE_KUP_KEY_NOT_PROVIDED;
+			goto END;
+		}
+	 }
+	else {
+		if (KupKey != 0x00) {
+			Status = XSECURE_KUP_KEY_NOT_REQUIRED;
+			goto END;
+		}
+	}
+
+	/* Initialize the AES driver so that it's ready to use */
+	if (ImageHdrInfo.KeySrc == XSECURE_KEY_SRC_KUP) {
+		XSecure_AesInitialize(&SecureAes, &CsuDma,
+				XSECURE_CSU_AES_KEY_SRC_KUP,
+				(u32 *)ImageHdrInfo.Iv, (u32 *)Key);
+	}
+	else {
+		XSecure_AesInitialize(&SecureAes, &CsuDma,
+					XSECURE_CSU_AES_KEY_SRC_DEV,
+					(u32 *)ImageHdrInfo.Iv, NULL);
+	}
+	if (ImageHdrInfo.PartitionHdr->DestinationLoadAddress == 0x00) {
+		EncSrc = (u8 *)(UINTPTR)(SrcAddr +
+				(ImageHdrInfo.PartitionHdr->DataWordOffset) *
+					XSECURE_WORD_LEN);
+		DecDst = (u8 *)(UINTPTR)(SrcAddr +
+				(ImageHdrInfo.PartitionHdr->DataWordOffset) *
+					XSECURE_WORD_LEN);
+	}
+	else {
+		EncSrc = (u8 *)(UINTPTR)(SrcAddr +
+				(ImageHdrInfo.PartitionHdr->DataWordOffset) *
+					XSECURE_WORD_LEN);
+		DecDst = (u8 *)(UINTPTR)
+			(ImageHdrInfo.PartitionHdr->DestinationLoadAddress);
+	}
+	Status = XSecure_AesDecrypt(&SecureAes,
+				DecDst, EncSrc,
+		(ImageHdrInfo.PartitionHdr->UnEncryptedDataWordLength *
+				XSECURE_WORD_LEN));
+
+	if (Status != XST_SUCCESS) {
+		if (Status != XSECURE_CSU_AES_KEY_CLEAR_ERROR) {
+			/* Clear the decrypted data */
+			memset(DecDst, 0,
+			(ImageHdrInfo.PartitionHdr->UnEncryptedDataWordLength *
+				XSECURE_WORD_LEN));
+		}
+		if (Status == XSECURE_CSU_AES_GCM_TAG_MISMATCH) {
+			Status = XSECURE_AES_GCM_TAG_NOT_MATCH;
+		}
+		Status = XSECURE_PARTITION_FAIL |
+				XSECURE_AES_DECRYPTION_FAILURE | Status;
+		Addr->AddrHigh = 0x00U;
+		Addr->AddrLow = 0x00U;
+	}
+	else {
+		Addr->AddrHigh = (u32)((u64)(UINTPTR)(DecDst) >> 32);
+		Addr->AddrLow = (u32)(UINTPTR)(DecDst);
+	}
+
+END:
+	/* Clear internal buffers */
+	memset(Buffer, 0, XSECURE_BUFFER_SIZE);
+	memset(AcBuf, 0, XSECURE_AUTH_CERT_MIN_SIZE);
+	memset(EfusePpk, 0, XSECURE_PPK_SIZE);
+
+	return Status;
+}
+#endif
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function tells whether RSA authentication is enabled or not.
+ *
+ * @return	Returns Status
+ * 		- XSECURE_ENABLED if RSA bit of efuse is programmed
+ * 		- XSECURE_NOTENABLED if RSA bit of efuse is not programmed.
+ *
+ *****************************************************************************/
+u32 XSecure_IsRsaEnabled()
+{
+	if ((Xil_In32(XSECURE_EFUSE_SEC_CTRL) &
+			XSECURE_EFUSE_SEC_CTRL_RSA_ENABLE) != 0x00) {
+
+		return XSECURE_ENABLED;
+	}
+
+	return XSECURE_NOTENABLED;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function tells whether encrypt only is enabled or not.
+ *
+ * @return	Returns Status
+ * 		- XSECURE_ENABLED if enc_only bit of efuse is programmed
+ * 		- XSECURE_NOTENABLED if enc_only bit of efuse is not programmed
+ *
+ *****************************************************************************/
+u32 XSecure_IsEncOnlyEnabled()
+{
+	if ((Xil_In32(XSECURE_EFUSE_SEC_CTRL) &
+			XSECURE_EFUSE_SEC_CTRL_ENC_ONLY) != 0x00U) {
+
+		return XSECURE_ENABLED;
+	}
+
+	return XSECURE_NOTENABLED;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function verifies the PPK hash with PPK programmed on efuse.
+ *
+ * @param	CsuDmaInstPtr	Pointer to CSU DMA instance.
+ * @param	AuthCert	Pointer to authentication certificate.
+ *
+ * @return	Returns Status
+ * 		- XST_SUCCESS on successful verification.
+ * 		- Error code on failure.
+ *
+ *****************************************************************************/
+u32 XSecure_PpkVerify(XCsuDma *CsuDmaInstPtr, u8 *AuthCert)
+{
+	u8 PpkSel = (*(u32 *)AuthCert & XSECURE_AH_ATTR_PPK_SEL_MASK) >>
+					XSECURE_AH_ATTR_PPK_SEL_SHIFT;
+	u32 Status = XST_SUCCESS;
+	u32 Hash[XSECURE_HASH_TYPE_SHA3/XSECURE_WORD_LEN];
+	XSecure_Sha3 Sha3Instance;
+	u8 Index;
+	u32 EfusePpkAddr;
+
+	/* Check if PPK selection is correct */
+	if (PpkSel > 1) {
+		Status = XSECURE_SEL_ERR;
+		goto END;
+	}
+
+	/* Calculate PPK hash */
+	XSecure_Sha3Initialize(&Sha3Instance, CsuDmaInstPtr);
+	Status = XSecure_Sha3PadSelection(&Sha3Instance,
+				XSECURE_CSU_KECCAK_SHA3);
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_SHA3_PADSELECT_ERR;
+		goto END;
+	}
+	XSecure_Sha3Digest(&Sha3Instance, AuthCert + XSECURE_AC_PPK_OFFSET,
+					XSECURE_KEY_SIZE, (u8 *)Hash);
+
+	/* Check selected is PPK revoked */
+	if (PpkSel == 0x0U) {
+		EfusePpkAddr = XSECURE_EFUSE_PPK0;
+		if ((Xil_In32(XSECURE_EFUSE_SEC_CTRL) &
+				XSECURE_EFUSE_SEC_CTRL_PPK0_REVOKE) != 0x00) {
+			Status = XSECURE_REVOKE_ERR;
+			goto END;
+		}
+	}
+	else {
+		EfusePpkAddr = XSECURE_EFUSE_PPK1;
+		if ((Xil_In32(XSECURE_EFUSE_SEC_CTRL) &
+				XSECURE_EFUSE_SEC_CTRL_PPK1_REVOKE) != 0x00) {
+			Status = XSECURE_REVOKE_ERR;
+			goto END;
+		}
+	}
+	/* Verify PPK hash */
+	for (Index = 0;
+		Index < (XSECURE_HASH_TYPE_SHA3 / XSECURE_WORD_LEN); Index++) {
+		if (Hash[Index] != Xil_In32(
+				EfusePpkAddr + (Index * XSECURE_WORD_LEN))) {
+			Status = XSECURE_VERIFY_ERR;
+			goto END;
+		}
+	}
+
+END:
+	if (Status != XST_SUCCESS) {
+		Status = Status | XSECURE_PPK_ERR;
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function authenticates SPK with provided PPK or PPK from authentication
+ * certificate.
+ *
+ * @param	CsuDmaInstPtr	Pointer to CSU DMA instance.
+ * @param	AuthCert	Pointer to authentication certificate.
+ * @param	Ppk		Pointer to the PPK key.
+ *		- If NULL uses PPK from provided authentication certificate.
+ *
+ * @return	Returns Status
+ * 		- XST_SUCCESS on successful verification.
+ * 		- Error code on failure.
+ *
+ *****************************************************************************/
+u32 XSecure_SpkAuthentication(XCsuDma *CsuDmaInstPtr, u8 *AuthCert, u8 *Ppk)
+{
+	u8 SpkHash[XSECURE_HASH_TYPE_SHA3];
+	u8* PpkModular;
+	u8* PpkModularEx;
+	u8* PpkExpPtr;
+	u32 Status;
+	u8 RsaSha3Array[512] = {0};
+	u8 *PpkPtr;
+	u8 *AcPtr = (u8 *)AuthCert;
+
+	if (Ppk == NULL) {
+		PpkPtr = (AcPtr + XSECURE_RSA_AC_ALIGN);
+	}
+	else {
+		PpkPtr = Ppk;
+	}
+
+	/* Initialize sha3 */
+	XSecure_Sha3Initialize(&Sha3Instance, CsuDmaInstPtr);
+	XSecure_Sha3PadSelection(&Sha3Instance, XSECURE_CSU_KECCAK_SHA3);
+	XSecure_Sha3Start(&Sha3Instance);
+
+
+	/* Hash the PPK + SPK choice */
+	XSecure_Sha3Update(&Sha3Instance, AcPtr, XSECURE_AUTH_HEADER_SIZE);
+
+	/* Set PPK pointer */
+	PpkModular = (u8 *)PpkPtr;
+	PpkPtr += XSECURE_PPK_MOD_SIZE;
+	PpkModularEx = PpkPtr;
+	PpkPtr += XSECURE_PPK_MOD_EXT_SIZE;
+	PpkExpPtr = PpkPtr;
+	AcPtr += (XSECURE_RSA_AC_ALIGN + XSECURE_PPK_SIZE);
+
+	/* Calculate SPK + Auth header Hash */
+	XSecure_Sha3Update(&Sha3Instance, (u8 *)AcPtr, XSECURE_SPK_SIZE);
+
+	XSecure_Sha3Finish(&Sha3Instance, (u8 *)SpkHash);
+
+	/* Set SPK Signature pointer */
+	AcPtr += XSECURE_SPK_SIZE;
+
+
+	Status = (u32)XSecure_RsaInitialize(&Secure_Rsa, PpkModular,
+			PpkModularEx, PpkExpPtr);
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_RSA_INIT_ERR;
+		goto END;
+	}
+
+	/* Decrypt SPK Signature */
+	Status = XSecure_RsaPublicEncrypt(&Secure_Rsa, AcPtr,
+				XSECURE_SPK_SIG_SIZE, RsaSha3Array);
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_RSA_ENCRYPT_ERR;
+		goto END;
+	}
+
+	/* Authenticate SPK Signature */
+	Status = XSecure_RsaSignVerification(RsaSha3Array,
+				SpkHash, XSECURE_HASH_TYPE_SHA3);
+	if (Status != XST_SUCCESS) {
+		Status = XSECURE_VERIFY_ERR;
+		goto END;
+	}
+
+
+END:
+	if (Status != XST_SUCCESS) {
+		Status = Status | XSECURE_SPK_ERR;
+	}
+
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function checks whether SPK is been revoked or not.
+ *
+ * @param	AuthCert	Pointer to authentication certificate.
+ *
+ * @return	Returns Status
+ * 		- XST_SUCCESS on successful verification.
+ * 		- Error code on failure.
+ *
+ *****************************************************************************/
+u32 XSecure_SpkRevokeCheck(u8 *AuthCert)
+{
+	u32 Status = XST_SUCCESS;
+	u32 *SpkID = (u32 *)(UINTPTR)(AuthCert + XSECURE_AC_SPKID_OFFSET);
+
+	if (*SpkID != Xil_In32(XSECURE_EFUSE_SPKID)) {
+		Status = (XSECURE_SPK_ERR | XSECURE_REVOKE_ERR);
+	}
+
+	return Status;
+}
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure.h b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure.h
new file mode 100644
index 0000000..ce04c4e
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure.h
@@ -0,0 +1,329 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 - 18 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xsecure.h
+*
+* This is the header file which contains secure library interface function prototype
+* for authentication and decryption of images.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date        Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  dp   02/15/17 Initial release
+* 2.2   vns  09/18/17 Added APIs to support generic functionality
+*                     for SHA3 and RSA hardware at linux level.
+* 3.0   vns  02/19/18 Added error codes and macros for secure image.
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+#ifndef XSECURE_H
+#define XSECURE_H
+
+/************************** Include Files ***********************************/
+
+#include "xcsudma.h"
+#include "xsecure_aes.h"
+#include "xsecure_rsa.h"
+#include "xsecure_sha.h"
+
+/************************** Constant Definitions *****************************/
+
+#define XSECURE_AES		1
+#define XSECURE_RSA		2
+#define XSECURE_RSA_AES		3
+
+#define XSECURE_SHA3_INIT	1
+#define XSECURE_SHA3_UPDATE	2
+#define XSECURE_SHA3_FINAL	4
+#define XSECURE_SHA3_MASK	(XSECURE_SHA3_INIT | \
+				XSECURE_SHA3_UPDATE | XSECURE_SHA3_FINAL)
+
+/* 0th bit of flag tells about encryption or decryption */
+#define XSECURE_ENC		1
+#define XSECURE_DEC		0
+
+#define XSECURE_RSA_OPERATION	1
+#define XSECURE_RSA_KEY_SELECT  2
+
+#define XSECURE_MASK		(XSECURE_AES | XSECURE_RSA)
+
+#define XSECURE_KEY_STR_LEN		64	/* String length */
+#define XSECURE_IV_STR_LEN		24	/* String length */
+#define XSECURE_KEY_LEN			8
+#define XSECURE_IV_LEN			3
+#define XSECURE_GCM_TAG_LEN		128
+#define XSECURE_WORD_LEN		4
+#define XSECURE_MAX_NIBBLES		8
+
+#define XSECURE_WORD_SHIFT		32
+
+#define XSECURE_ARRAY_LENGTH(array) (sizeof((array))/sizeof((array)[0]))
+
+#define XSECURE_ERROR_CSUDMA_INIT_FAIL	0x1
+#define XSECURE_STRING_INVALID_ERROR	0x2
+#define XSECURE_INVALID_FLAG		0x3
+#define XSECURE_ISNOT_SECURE_IMAGE	0x4
+#define XSECURE_SHA3_INIT_FAIL		0x5
+#define XSECURE_SIZE_ERR		0x6
+
+#define XSECURE_SEL_ERR			0x7
+#define XSECURE_REVOKE_ERR		0x8
+#define XSECURE_VERIFY_ERR		0x9
+#define XSECURE_RSA_INIT_ERR		0xA
+#define XSECURE_RSA_ENCRYPT_ERR		0xB
+#define XSECURE_SHA3_PADSELECT_ERR	0xC
+#define XSECURE_IMAGE_WITH_MUL_PARTITIONS 0xD
+#define XSECURE_AUTH_ISCOMPULSORY	0xE
+#define XSECURE_ENC_ISCOMPULSORY	0xF
+
+#define XSECURE_BHDR_AUTH_NOT_ALLOWED	0x10
+#define	XSECURE_ONLY_BHDR_AUTH_ALLOWED	0x11
+#define XSECURE_HDR_NOAUTH_PART_AUTH	0x12
+#define XSECURE_DEC_WRONG_KEY_SOURCE	0x13
+#define XSECURE_KUP_KEY_NOT_PROVIDED	0x14
+#define XSECURE_KUP_KEY_NOT_REQUIRED	0x15
+#define XSECURE_AES_GCM_TAG_NOT_MATCH	0x16
+
+#define XSECURE_AUTH_NOT_ENABLED 	0xFF
+
+#define XSECURE_PPK_ERR			0x100
+#define XSECURE_SPK_ERR			0x200
+#define XSECURE_AUTH_FAILURE		0x300
+#define XSECURE_AES_DECRYPTION_FAILURE	0x400
+
+#define XSECURE_BOOT_HDR_FAIL		0x1000
+#define XSECURE_IMG_HDR_FAIL		0x2000
+#define XSECURE_PARTITION_FAIL		0x3000
+
+
+
+#define XSECURE_CSUDMA_DEVICEID		0
+
+#define XSECURE_MOD_LEN			512
+
+#define XSECURE_PH_ATTR_AUTH_ENABLE	0x8000U
+#define XSECURE_PH_ATTR_ENC_ENABLE	0x0080U
+
+#define XSECURE_AH_ATTR_PPK_SEL_MASK   	0x30000U
+#define XSECURE_AH_ATTR_PPK_SEL_SHIFT	16
+
+#define XSECURE_AC_SPKID_OFFSET		0x04U
+#define XSECURE_AC_PPK_OFFSET		0x40U
+#define XSECURE_AC_SPK_OFFSET		0x480U
+#define XSECURE_AC_SPK_SIG_OFFSET	0x8C0U
+
+#define XSECURE_KEY_SIZE		(512U+512U+64U)
+
+#define XSECURE_ENABLED			0xFF
+#define XSECURE_NOTENABLED		0
+
+
+#define XSECURE_EFUSE_BASEADDR		(0XFFCC0000U)
+/* Register PPK0_0 */
+#define XSECURE_EFUSE_PPK0	(XSECURE_EFUSE_BASEADDR + 0x000010A0U)
+
+/* Register PPK1_0 */
+#define XSECURE_EFUSE_PPK1	(XSECURE_EFUSE_BASEADDR + 0x000010D0U)
+
+/* Register SPK ID */
+#define XSECURE_EFUSE_SPKID	(XSECURE_EFUSE_BASEADDR + 0x0000105CU)
+
+/* Register: EFUSE_SEC_CTRL */
+#define XSECURE_EFUSE_SEC_CTRL    (XSECURE_EFUSE_BASEADDR  + 0X00001058U)
+#define XSECURE_EFUSE_SEC_CTRL_PPK0_REVOKE	(0x18000000U)
+#define XSECURE_EFUSE_SEC_CTRL_PPK1_REVOKE	(0xC0000000U)
+#define XSECURE_EFUSE_SEC_CTRL_RSA_ENABLE   	(0x03FFF800U)
+#define XSECURE_EFUSE_SEC_CTRL_ENC_ONLY		(0x00000004U)
+
+#define XSECURE_SPK_SIZE			(512U+512U+64U)
+#define XSECURE_PPK_SIZE			(XSECURE_SPK_SIZE)
+#define XSECURE_PPK_MOD_SIZE			(512U)
+#define XSECURE_PPK_MOD_EXT_SIZE		(512U)
+#define XSECURE_SPK_MOD_SIZE			XSECURE_PPK_MOD_SIZE
+#define XSECURE_SPK_MOD_EXT_SIZE		XSECURE_PPK_MOD_EXT_SIZE
+#define XSECURE_SPK_SIG_SIZE			(512U)
+#define XSECURE_BHDR_SIG_SIZE			(512U)
+#define XSECURE_PARTITION_SIG_SIZE		(512U)
+#define XSECURE_RSA_AC_ALIGN			(64U)
+#define XSECURE_SPKID_AC_ALIGN			(4U)
+
+#define XSECURE_AUTH_HEADER_SIZE		(8U)
+
+#define	XSECURE_AUTH_CERT_USER_DATA	((u32)64U - XSECURE_AUTH_HEADER_SIZE)
+
+#define XSECURE_AUTH_CERT_MIN_SIZE	(XSECURE_AUTH_HEADER_SIZE 	\
+					+ XSECURE_AUTH_CERT_USER_DATA 	\
+					+ XSECURE_PPK_SIZE 		\
+					+ XSECURE_SPK_SIZE 		\
+					+ XSECURE_SPK_SIG_SIZE 		\
+					+ XSECURE_BHDR_SIG_SIZE 	\
+					+ XSECURE_PARTITION_SIG_SIZE)
+
+#define XSECURE_AUTH_CERT_BHDRSIG_OFFSET	0xAC0
+#define XSECURE_AUTH_CERT_PARTSIG_OFFSET	0xCC0
+
+#define XSECURE_BOOT_HDR_MIN_SIZE	(0x000008B8U)
+#define XSECURE_BOOT_HDR_MAX_SIZE	(XSECURE_BOOT_HDR_MIN_SIZE + \
+					(0x00000182U * 4))
+			/**< When boot header contains PUF helper data */
+#define XSECURE_BUFFER_SIZE		(0x00001080U)
+#define XSECURE_IV_SIZE			(4U)
+
+#define XSECURE_IV_OFFSET		(0xA0U)
+#define XSECURE_PH_TABLE_OFFSET		(0x9CU)
+#define XSECURE_IMAGE_HDR_OFFSET	(0x98U)
+#define XSECURE_IMAGE_ATTR_OFFSET	(0x44U)
+#define XSECURE_KEY_SOURCE_OFFSET	(0x28U)
+
+#define XSECURE_IMG_ATTR_BHDR_MASK	(0xC000U)
+#define XSECURE_IMG_ATTR_PUFHD_MASK	(0x00C0U)
+
+#define XSECURE_PH_OFFSET		(0x8U)
+#define XSECURE_AC_IMAGE_HDR_OFFSET	(0x10U)
+
+#define XSECURE_PH_IV_MASK		(0xFFU)
+
+#define XSECURE_KEY_SRC_KUP		(0xA3A5C3C5U)
+#define XSECURE_KEY_SRC_BBRAM		(0x3A5C3C5AU)
+#define XSECURE_KEY_SRC_BLACK_BH	(0xA35C7C53U)
+#define XSECURE_KEY_SRC_GREY_BH		(0xA35C7CA5U)
+
+/**************************** Type Definitions *******************************/
+
+/* Partition address */
+typedef struct {
+	u32 AddrHigh;	/**< Partition address high */
+	u32 AddrLow;	/**< Partition address low */
+}XSecure_DataAddr;
+
+/* RSA key components */
+typedef struct {
+	u8 *Modulus;		/**< Modulus */
+	u8 *Exponentiation;	/**< Exponentitation */
+	u8 *Exponent;		/**< Exponent */
+}XSecure_RsaKey;
+
+/**
+ * Structure to store the partition header details.
+ * It contains all the information of partition header in order.
+ */
+typedef struct {
+	u32 EncryptedDataWordLength; /**< Encrypted word length of partition*/
+	u32 UnEncryptedDataWordLength; /**< unencrypted word length */
+	u32 TotalDataWordLength;
+		/**< Total word length including the authentication
+			certificate if any*/
+	u32 NextPartitionOffset; /**< Address of the next partition header*/
+	u64 DestinationExecutionAddress; /**< Execution address */
+	u64 DestinationLoadAddress; /**< Load address in DDR/TCM */
+	u32 DataWordOffset; /**< */
+	u32 PartitionAttributes; /**< partition attributes */
+	u32 SectionCount; /**< section count */
+	u32 ChecksumWordOffset; /**< address to checksum when enabled */
+	u32 ImageHeaderOffset; /**< address to image header */
+	u32 AuthCertificateOffset;
+		/**< address to the authentication certificate when enabled */
+	u32 Iv; /**< 8 bits are to be added to  and remaining are reserved */
+	u32 Checksum; /**< checksum of the partition header */
+} XSecure_PartitionHeader;
+
+/* Image info */
+typedef struct {
+	u32 EfuseRsaenable; /**< 0 if not burnt 0xFF if burnt */
+	XSecure_PartitionHeader *PartitionHdr; /**< Pointer to the buffer
+					* which is holding image header */
+	u32 BhdrAuth; /**< 0 if not enabled and 0xFF if set */
+	u32 KeySrc;  /**< Key src from boot header */
+	u32 *Iv;
+			/**< From Boot header + 8bits from partition header */
+	u8 *AuthCerPtr; /**< Buffer allocated to copy AC of the partition */
+}XSecure_ImageInfo;
+
+/************************** Variable Definitions *****************************/
+#if defined (PSU_PMU)
+u8 EfusePpk[XSECURE_PPK_SIZE]__attribute__ ((aligned (32)));
+			/**< eFUSE verified PPK */
+u8 AcBuf[XSECURE_AUTH_CERT_MIN_SIZE]__attribute__ ((aligned (32)));
+			/**< Buffer to store authentication certificate */
+u8 Buffer[XSECURE_BUFFER_SIZE] __attribute__ ((aligned (32)));
+			/**< Buffer to store */
+#endif
+
+u32 Iv[XSECURE_IV_LEN];
+u32 Key[XSECURE_KEY_LEN];
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+u32 XSecure_RsaAes(u32 SrcAddrHigh, u32 SrcAddrLow, u32 WrSize, u32 flags);
+u32 XSecure_Sha3Hash(u32 SrcAddrHigh, u32 SrcAddrLow, u32 SrcSize, u32 Flags);
+u32 XSecure_RsaCore(u32 SrcAddrHigh, u32 SrcAddrLow, u32 SrcSize, u32 Flags);
+
+/* Memory copy */
+u32 XSecure_MemCopy(void * DestPtr, void * SrcPtr, u32 Size);
+
+/* Keys verification */
+#if defined (PSU_PMU)
+u32 XSecure_VerifySpk(u8 *Acptr, u32 EfuseRsaenable);
+#endif
+u32 XSecure_PpkVerify(XCsuDma *CsuDmaInstPtr, u8 *AuthCert);
+u32 XSecure_SpkAuthentication(XCsuDma *CsuDmaInstPtr, u8 *AuthCert, u8 *Ppk);
+u32 XSecure_SpkRevokeCheck(u8 *AuthCert);
+
+/* Authentication functions */
+u32 XSecure_PartitionAuthentication(XCsuDma *CsuDmaInstPtr, u8 *Data,
+				u32 Size, u8 *AuthCertPtr);
+#if defined (PSU_PMU)
+u32 XSecure_AuthenticationHeaders(u8 *StartAddr, XSecure_ImageInfo *ImageInfo);
+#endif
+
+/* eFUSE read functions */
+u32 XSecure_IsRsaEnabled();
+u32 XSecure_IsEncOnlyEnabled();
+
+#if defined (PSU_PMU)
+/* For single partition secure image */
+u32 XSecure_SecureImage(u32 AddrHigh, u32 AddrLow,
+		u32 KupAddrHigh, u32 KupAddrLow, XSecure_DataAddr *Addr);
+#endif
+/*****************************************************************************/
+
+#endif  /* XSECURE_HW_H */
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_aes.c b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_aes.c
new file mode 100644
index 0000000..704763f
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_aes.c
@@ -0,0 +1,1373 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 18 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xsecure_aes.c
+*
+* This file contains the implementation of the interface functions for AES
+* driver. Refer to the header file xsecure_aes.h for more detailed information.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -------------------------------------------------------
+* 1.00  ba  09/10/14 Initial release
+* 1.1   ba  11/10/15 Modified Key loading logic in AES encryption
+* 1.1	ba  12/22/15 Added Chunking support in decryption
+* 2.0   vns 01/28/17 Added APIs for decryption which can be used for
+*                    generic decryption.
+*       vns 02/03/17 Added APIs for encryption in generic way.
+*                    Removed existing XSecure_AesEncrypt API
+*                    Modified encryption and decryption APIs such that all
+*                    inputs will be accepted in little endian format(KEY, IV
+*                    and Data).
+* 2.2   vns 07/06/16 Added doxygen tags
+* 3.0   vns 01/03/18 Modified XSecure_AesDecrypt() API to use key and IV placed
+*                    in secure header by bootgen to decrypt the actual
+*                    partition.
+*       vns 02/19/18 Modified XSecure_AesKeyZero() to clear KUP and AES key
+*                    Added XSecure_AesKeyZero() call in XSecure_AesDecrypt()
+*                    API to clear keys.
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xsecure_aes.h"
+
+/************************** Function Prototypes ******************************/
+
+/************************** Function Definitions *****************************/
+
+/*****************************************************************************/
+/**
+ *
+ * @brief
+ * This function initializes the instance pointer.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Aes instance.
+ * @param	CsuDmaPtr	Pointer to the XCsuDma instance.
+ * @param	KeySel		Key source for decryption, can be KUP/device key
+ *		- XSECURE_CSU_AES_KEY_SRC_KUP :For KUP key
+ *		- XSECURE_CSU_AES_KEY_SRC_DEV :For Device Key
+ * @param	Iv		Pointer to the Initialization Vector
+ *		for decryption
+ * @param	Key		Pointer to Aes decryption key in case KUP
+ *		key is used.
+ * 		Passes `Null` if device key is to be used.
+ *
+ * @return	XST_SUCCESS if initialization was successful.
+ *
+ * @note	All the inputs are accepted in little endian format, but AES
+ *		engine accepts the data in big endianess, this will be taken
+ *		care while passing data to AES engine.
+ *
+ ******************************************************************************/
+s32 XSecure_AesInitialize(XSecure_Aes *InstancePtr, XCsuDma *CsuDmaPtr,
+				u32 KeySel, u32* Iv,  u32* Key)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(CsuDmaPtr != NULL);
+
+	InstancePtr->BaseAddress = XSECURE_CSU_AES_BASE;
+	InstancePtr->CsuDmaPtr = CsuDmaPtr;
+	InstancePtr->KeySel = KeySel;
+	InstancePtr->Iv = Iv;
+	InstancePtr->Key = Key;
+	InstancePtr->IsChunkingEnabled = XSECURE_CSU_AES_CHUNKING_DISABLED;
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+ *
+ * @brief
+ * This funcion is used to initialize the AES engine for encryption.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Aes instance.
+ * @param	EncData		Pointer of a buffer in which encrypted data
+ *		along with GCM TAG will be stored. Buffer size should be
+ *		Size of data plus 16 bytes.
+ * @param	Size		A 32 bit variable, which holds the size of
+ *		the input data to be encrypted.
+ *
+ * @return	None
+ *
+ * @note	If all the data to be encrypted is available at single location
+ *		One can use XSecure_AesEncryptData() directly.
+ *
+ ******************************************************************************/
+void XSecure_AesEncryptInit(XSecure_Aes *InstancePtr, u8 *EncData, u32 Size)
+{
+	u32 SssCfg = 0U;
+	u32 SssDma;
+	u32 SssAes;
+	u32 Count=0U;
+	u32 Value=0U;
+	u32 Addr=0U;
+	XCsuDma_Configure ConfigurValues = {0};
+
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(EncData != NULL);
+	Xil_AssertVoid(Size != (u32)0x0);
+
+	/* Configure the SSS for AES.*/
+	SssDma = XSecure_SssInputDstDma(XSECURE_CSU_SSS_SRC_AES);
+	SssAes = XSecure_SssInputAes(XSECURE_CSU_SSS_SRC_SRC_DMA);
+	SssCfg = SssDma |SssAes ;
+	XSecure_SssSetup(SssCfg);
+
+	/* Clear AES contents by reseting it. */
+	XSecure_AesReset(InstancePtr);
+
+	/* Clear AES_KEY_CLEAR bits to avoid clearing of key */
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+			XSECURE_CSU_AES_KEY_CLR_OFFSET, (u32)0x0U);
+
+	if(InstancePtr->KeySel == XSECURE_CSU_AES_KEY_SRC_DEV) {
+		XSecure_AesKeySelNLoad(InstancePtr);
+	}
+	else {
+		for(Count = 0U; Count < 8U; Count++) {
+			/* Helion AES block expects the key in big-endian. */
+			Value = Xil_Htonl(InstancePtr->Key[Count]);
+			Addr = InstancePtr->BaseAddress +
+				XSECURE_CSU_AES_KUP_0_OFFSET
+					+ (Count * 4);
+			XSecure_Out32(Addr, Value);
+		}
+		XSecure_AesKeySelNLoad(InstancePtr);
+	}
+
+	/* Configure the AES for Encryption.*/
+	XSecure_WriteReg(InstancePtr->BaseAddress, XSECURE_CSU_AES_CFG_OFFSET,
+					XSECURE_CSU_AES_CFG_ENC);
+	/* Start the message.*/
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+		XSECURE_CSU_AES_START_MSG_OFFSET, XSECURE_CSU_AES_START_MSG);
+
+	/* Enable CSU DMA Src channel for byte swapping.*/
+	XCsuDma_GetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+					&ConfigurValues);
+	ConfigurValues.EndianType = 1U;
+	XCsuDma_SetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+					&ConfigurValues);
+
+	/* Enable CSU DMA Dst channel for byte swapping.*/
+	XCsuDma_GetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_DST_CHANNEL,
+			&ConfigurValues);
+	ConfigurValues.EndianType = 1U;
+	XCsuDma_SetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_DST_CHANNEL,
+			&ConfigurValues);
+
+	/* Push IV into the AES engine.*/
+	XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+		(UINTPTR)InstancePtr->Iv, XSECURE_SECURE_GCM_TAG_SIZE/4U, 0);
+
+	XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
+
+	/* Configure the CSU DMA Tx/Rx.*/
+	XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_DST_CHANNEL,
+			(UINTPTR)EncData,
+			(Size + XSECURE_SECURE_GCM_TAG_SIZE)/4U, 0);
+
+	/* Update the size of data */
+	InstancePtr->SizeofData = Size;
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function is used to update the AES engine with provided data for
+ * encryption.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Aes instance.
+ * @param	Data	Pointer to the data for which encryption should be
+ * 		performed.
+ * @param	Size	A 32 bit variable, which holds the size of the input
+ *		data in bytes.
+ *
+ * @return	None
+ *
+ * @note	When Size of the data equals to size of the remaining data
+ *		to be processed that data will be treated as final data.
+ *		This API can be called multpile times but sum of all Sizes
+ *		should be equal to Size mentioned at encryption initialization
+ *		(XSecure_AesEncryptInit()).
+ *		If all the data to be encrypted is available at single location
+ *		Please call XSecure_AesEncryptData() directly.
+ *
+ ******************************************************************************/
+void XSecure_AesEncryptUpdate(XSecure_Aes *InstancePtr, const u8 *Data, u32 Size)
+{
+
+	XCsuDma_Configure ConfigurValues = {0};
+	u8 IsFinal = FALSE;
+
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Data != NULL);
+	Xil_AssertVoid(Size <= InstancePtr->SizeofData);
+
+	if (Size == InstancePtr->SizeofData) {
+		IsFinal = TRUE;
+	}
+	XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+				(UINTPTR) Data,	Size/4U, IsFinal);
+
+	/* Wait for Src DMA done. */
+	XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
+
+	/* Acknowledge the transfer has completed */
+	XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+						XCSUDMA_IXR_DONE_MASK);
+
+
+	if (IsFinal == TRUE) {
+		/* Wait for Dst DMA done. */
+		XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr,
+					XCSUDMA_DST_CHANNEL);
+
+		/* Acknowledge the transfer has completed */
+		XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_DST_CHANNEL,
+						XCSUDMA_IXR_DONE_MASK);
+		/* Disble CSU DMA Dst channel for byte swapping. */
+		XCsuDma_GetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_DST_CHANNEL,
+				&ConfigurValues);
+		ConfigurValues.EndianType = 0U;
+		XCsuDma_SetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_DST_CHANNEL,
+				&ConfigurValues);
+
+		/* Disable CSU DMA Src channel for byte swapping. */
+		XCsuDma_GetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+							&ConfigurValues);
+		ConfigurValues.EndianType = 0U;
+		XCsuDma_SetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+							&ConfigurValues);
+
+		/* Wait for AES encryption completion.*/
+		XSecure_AesWaitForDone(InstancePtr);
+	}
+	/* Update the size of instance */
+	InstancePtr->SizeofData = InstancePtr->SizeofData - Size;
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This Function encrypts the data provided by using hardware AES engine.
+ *
+ * @param	InstancePtr	A pointer to the XSecure_Aes instance.
+ * @param	Dst	A pointer to a buffer where encrypted data along with
+ *		GCM tag will be stored. The Size of buffer provided should be
+ *		Size of the data plus 16 bytes
+ * @param	Src	A pointer to input data for encryption.
+ * @param	Len	Size of input data in bytes
+ *
+ * @return	None
+ *
+ * @note	If data to be encrypted is not available at one place one can
+ *		call XSecure_AesEncryptInit() and update the AES engine with
+ *		data to be encrypted by calling XSecure_AesEncryptUpdate()
+ *		API multiple times as required.
+ *
+ ******************************************************************************/
+void XSecure_AesEncryptData(XSecure_Aes *InstancePtr, u8 *Dst, const u8 *Src,
+			u32 Len)
+{
+	XSecure_AesEncryptInit(InstancePtr, Dst, Len);
+	XSecure_AesEncryptUpdate(InstancePtr, Src, Len);
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function initializes the AES engine for decryption.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Aes instance.
+ * @param	DecData		Pointer in which decrypted data will be stored.
+ * @param	Size		Expected size of the data in bytes.
+ * @param	GcmTagAddr	Pointer to the GCM tag which needs to be
+ *		verified during decryption of the data.
+ *
+ * @return	None
+ *
+ * @note	If data is encrypted using XSecure_AesEncrypt API then GCM tag
+ *		address will be at the end of encrypted data. EncData + Size will
+ *		be the GCM tag address.
+ *		Chunking will not be handled over here.
+ *
+ ******************************************************************************/
+void XSecure_AesDecryptInit(XSecure_Aes *InstancePtr, u8 * DecData,
+		u32 Size, u8 *GcmTagAddr)
+{
+
+	u32 SssCfg = 0x0U;
+	u32 SssAes;
+	XCsuDma_Configure ConfigurValues = {0};
+	u32 Count = 0U;
+	u32 Value = 0U;
+	u32 Addr = 0U;
+
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(DecData != NULL);
+	Xil_AssertVoid(Size != 0x00U);
+	Xil_AssertVoid(GcmTagAddr != NULL);
+
+	/* Configure the SSS for AES. */
+	SssAes = XSecure_SssInputAes(XSECURE_CSU_SSS_SRC_SRC_DMA);
+
+	if (DecData == (u8*)XSECURE_DESTINATION_PCAP_ADDR) {
+		SssCfg = SssAes |
+			XSecure_SssInputPcap(XSECURE_CSU_SSS_SRC_AES);
+	}
+	else {
+		SssCfg = SssAes |
+			XSecure_SssInputDstDma(XSECURE_CSU_SSS_SRC_AES);
+	}
+	XSecure_SssSetup(SssCfg);
+
+	/* Clear AES contents by reseting it. */
+	XSecure_AesReset(InstancePtr);
+
+	/* Configure AES for Decryption */
+	XSecure_WriteReg(InstancePtr->BaseAddress, XSECURE_CSU_AES_CFG_OFFSET,
+					 XSECURE_CSU_AES_CFG_DEC);
+
+	/* Clear AES_KEY_CLEAR bits to avoid clearing of key */
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+			XSECURE_CSU_AES_KEY_CLR_OFFSET, (u32)0x0U);
+
+	if (InstancePtr->KeySel == XSECURE_CSU_AES_KEY_SRC_DEV) {
+		XSecure_AesKeySelNLoad(InstancePtr);
+	}
+	else {
+		for (Count = 0U; Count < 8U; Count++) {
+			/* Helion AES block expects the key in big-endian. */
+			Value = Xil_Htonl(InstancePtr->Key[Count]);
+			Addr = InstancePtr->BaseAddress +
+					XSECURE_CSU_AES_KUP_0_OFFSET
+					+ (Count * 4);
+			XSecure_Out32(Addr, Value);
+		}
+		XSecure_AesKeySelNLoad(InstancePtr);
+	}
+
+	/* Enable CSU DMA Src channel for byte swapping.*/
+	XCsuDma_GetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+						&ConfigurValues);
+	ConfigurValues.EndianType = 1U;
+	XCsuDma_SetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+				&ConfigurValues);
+
+	if (DecData != (u8*)XSECURE_DESTINATION_PCAP_ADDR) {
+		XCsuDma_GetConfig(InstancePtr->CsuDmaPtr,
+					XCSUDMA_DST_CHANNEL,
+					&ConfigurValues);
+		ConfigurValues.EndianType = 1U;
+
+		XCsuDma_SetConfig(InstancePtr->CsuDmaPtr,
+					XCSUDMA_DST_CHANNEL,
+					&ConfigurValues);
+		/* Configure the CSU DMA Tx/Rx for the incoming Block */
+		XCsuDma_Transfer(InstancePtr->CsuDmaPtr,
+					XCSUDMA_DST_CHANNEL,
+					(UINTPTR)DecData, Size/4U, 0);
+	}
+	/* Start the message. */
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_AES_START_MSG_OFFSET,
+				XSECURE_CSU_AES_START_MSG);
+
+	/* Push IV into the AES engine. */
+	XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+		(UINTPTR)InstancePtr->Iv, XSECURE_SECURE_GCM_TAG_SIZE/4U, 0);
+
+	XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
+
+	/* Acknowledge the transfer has completed */
+	XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+				XCSUDMA_IXR_DONE_MASK);
+
+	InstancePtr->GcmTagAddr = (u32 *)GcmTagAddr;
+	InstancePtr->SizeofData = Size;
+	InstancePtr->Destination = DecData;
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function is used to update the AES engine for decryption with provided
+ * data
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Aes instance.
+ * @param	EncData		Pointer to the encrypted data which needs to be
+ *		decrypted.
+ * @param	Size		Expected size of data to be decrypted in bytes.
+ *
+ * @return	Final call of this API returns the status of GCM tag matching.
+ *		- XSECURE_CSU_AES_GCM_TAG_MISMATCH: If GCM tag is mismatched
+ *		- XST_SUCCESS: If GCM tag is matching.
+ *
+ * @note	When Size of the data equals to size of the remaining data
+ *		that data will be treated as final data.
+ *		This API can be called multpile times but sum of all Sizes
+ *		should be equal to Size mention in init. Return of the final
+ *		call of this API tells whether GCM tag is matching or not.
+ *
+ ******************************************************************************/
+s32 XSecure_AesDecryptUpdate(XSecure_Aes *InstancePtr, u8 *EncData, u32 Size)
+{
+	u32 GcmStatus;
+	XCsuDma_Configure ConfigurValues = {0};
+	u8 IsFinalUpdate = FALSE;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(EncData != NULL);
+	Xil_AssertNonvoid(Size <= InstancePtr->SizeofData);
+
+	/* Check if this is final update */
+	if (InstancePtr->SizeofData == Size) {
+		IsFinalUpdate = TRUE;
+	}
+
+	XCsuDma_Transfer(InstancePtr->CsuDmaPtr,
+				XCSUDMA_SRC_CHANNEL,
+				(UINTPTR)EncData, Size/4U, IsFinalUpdate);
+	/* Wait for the Src DMA completion. */
+	XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
+	if (InstancePtr->Destination ==
+			(u8 *)XSECURE_DESTINATION_PCAP_ADDR) {
+		XSecure_PcapWaitForDone();
+	}
+
+	/* Acknowledge the transfer has completed */
+	XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+							XCSUDMA_IXR_DONE_MASK);
+
+	/* If this is the last update for the data */
+	if (IsFinalUpdate == TRUE) {
+		XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+			(UINTPTR)InstancePtr->GcmTagAddr,
+			XSECURE_SECURE_GCM_TAG_SIZE/4U, IsFinalUpdate);
+
+		/* Wait for the Src DMA completion. */
+		XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr,
+				XCSUDMA_SRC_CHANNEL);
+
+		/* Acknowledge the transfer has completed */
+		XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+				XCSUDMA_IXR_DONE_MASK);
+		if (InstancePtr->Destination ==
+				(u8 *)XSECURE_DESTINATION_PCAP_ADDR) {
+			XSecure_PcapWaitForDone();
+		}
+
+		/* Disable CSU DMA Src channel for byte swapping. */
+		XCsuDma_GetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+						&ConfigurValues);
+		ConfigurValues.EndianType = 0U;
+		XCsuDma_SetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+						&ConfigurValues);
+
+		if (InstancePtr->Destination !=
+				(u8 *)XSECURE_DESTINATION_PCAP_ADDR) {
+			/* Disable CSU DMA Dst channel for byte swapping. */
+			XCsuDma_GetConfig(InstancePtr->CsuDmaPtr,
+				XCSUDMA_DST_CHANNEL, &ConfigurValues);
+			ConfigurValues.EndianType = 0U;
+			XCsuDma_SetConfig(InstancePtr->CsuDmaPtr,
+				XCSUDMA_DST_CHANNEL, &ConfigurValues);
+		}
+
+		/* Wait for AES Decryption completion. */
+		XSecure_AesWaitForDone(InstancePtr);
+
+		/* Get the AES status to know if GCM check passed. */
+		GcmStatus = XSecure_ReadReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_AES_STS_OFFSET) &
+					XSECURE_CSU_AES_STS_GCM_TAG_OK;
+
+		if (GcmStatus == 0U) {
+			return XSECURE_CSU_AES_GCM_TAG_MISMATCH;
+		}
+	}
+
+	/* Update the size of data */
+	InstancePtr->SizeofData = InstancePtr->SizeofData - Size;
+
+	return XST_SUCCESS;
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function decrypts the encrypted data provided and updates the
+ * DecData buffer with decrypted data
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Aes instance.
+ * @param	DecData		Pointer to a buffer in which decrypted data will
+ *		be stored.
+ * @param	EncData		Pointer to the encrypted data which needs to be
+ *		decrypted.
+ * @param	Size		Size of data to be	decrypted in bytes.
+ *
+ * @return	This API returns the status of GCM tag matching.
+ *		- XSECURE_CSU_AES_GCM_TAG_MISMATCH: If GCM tag was mismatched
+ *		- XST_SUCCESS: If GCM tag was matched.
+ *
+ * @note	When XSecure_AesEncryptData() API is used for encryption
+ *		In same buffer GCM tag also be stored, but Size should be
+ *		mentioned only for data.
+ *
+ ******************************************************************************/
+s32 XSecure_AesDecryptData(XSecure_Aes *InstancePtr, u8 * DecData, u8 *EncData,
+		u32 Size, u8 * GcmTagAddr)
+{
+	s32 Status = XST_SUCCESS;
+
+	XSecure_AesDecryptInit(InstancePtr, DecData, Size, GcmTagAddr);
+
+	Status = XSecure_AesDecryptUpdate(InstancePtr, EncData, Size);
+	if (Status != XST_SUCCESS) {
+		goto END;
+	}
+
+END:
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This API enables/disables data chunking. Chunking will be used when complete
+ * encrypted data is not present at a single contiguous location (for eg. DDR
+ * less systems.) or the data source is not directly reachable through CSU DMA.
+ *
+ * @param	InstancePtr 	Pointer to the XSecure_Aes instance.
+ * @param	Chunking 	Used to enable or disable data chunking.
+ *
+ * @return	None
+ *
+ * @note	Chunking enable will be taken account only for
+ *		XSecure_AesDecrypt() API usage.
+ *
+ ******************************************************************************/
+void XSecure_AesSetChunking(XSecure_Aes *InstancePtr, u8 Chunking)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	InstancePtr->IsChunkingEnabled = Chunking;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function sets the configuration for Data Chunking.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Aes instance.
+ * @param	ReadBuffer	Buffer where the data will be written
+ *		after copying.
+ * @param	ChunkSize	Length of the buffer in bytes.
+ * @param	DeviceCopy 	Function pointer to copy data from FLASH
+ *		to buffer.
+ *		Arguments are:
+ *		 - SrcAddress: Address of data in device
+ *
+ *		 - DestAddress: Address where data will be copied
+ *
+ *		 - Length: Length of data in bytes.
+ *		Return value should be 0 in case of success and 1
+ *		in case of failure.
+ *
+ * @return	None
+ *
+ * @note	This function should be used along with
+ *		XSecure_AesSetChunkConfig() API, this feature is taken into
+ *		account only for XSecure_AesDecrypt() API while decrypting
+ *		the boot image's partition which is generated using bootgen.
+ *
+ ******************************************************************************/
+void XSecure_AesSetChunkConfig(XSecure_Aes *InstancePtr, u8 *ReadBuffer,
+				u32 ChunkSize, u32(*DeviceCopy)(u32, UINTPTR, u32))
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(DeviceCopy != NULL);
+	Xil_AssertVoid(ChunkSize != 0U);
+	/* Chunk Size has to be multiple of words */
+	Xil_AssertVoid(ChunkSize % 4U == 0U);
+
+	InstancePtr->ReadBuffer = ReadBuffer;
+	InstancePtr->ChunkSize = ChunkSize;
+	InstancePtr->DeviceCopy = DeviceCopy;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function waits for AES completion for keyload.
+ *
+ * @param	InstancePtr 	Pointer to the XSecure_Aes instance.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+static void XSecure_AesWaitKeyLoad(XSecure_Aes *InstancePtr)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	volatile u32 Status;
+
+	do {
+		Status = XSecure_ReadReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_AES_STS_OFFSET);
+	} while (!((u32)Status & XSECURE_CSU_AES_STS_KEY_INIT_DONE));
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function waits for AES completion.
+ *
+ * @param	InstancePtr Pointer to the XSecure_Aes instance.
+ *
+ * @return	None
+ *
+ ******************************************************************************/
+void XSecure_AesWaitForDone(XSecure_Aes *InstancePtr)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	volatile u32 Status;
+
+	do {
+		Status = XSecure_ReadReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_AES_STS_OFFSET);
+	} while ((u32)Status & XSECURE_CSU_AES_STS_AES_BUSY);
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function resets the AES engine.
+ *
+ * @param	InstancePtr is a pointer to the XSecure_Aes instance.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void XSecure_AesReset(XSecure_Aes *InstancePtr)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+			XSECURE_CSU_AES_RESET_OFFSET, XSECURE_CSU_AES_RESET);
+
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+			XSECURE_CSU_AES_RESET_OFFSET, 0x0U);
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function resets the AES key storage registers.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Aes instance.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+u32 XSecure_AesKeyZero(XSecure_Aes *InstancePtr)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	volatile u32 Status;
+	u32 ReadReg;
+	u32 TimeOut = XSECURE_AES_TIMEOUT_MAX;
+
+	ReadReg = XSecure_ReadReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_AES_KEY_CLR_OFFSET);
+
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_AES_KEY_CLR_OFFSET,
+				(u32)(ReadReg | XSECURE_CSU_AES_KEY_ZERO |
+						XSECURE_CSU_AES_KUP_ZERO));
+
+	do {
+		Status = XSecure_ReadReg(InstancePtr->BaseAddress,
+					 XSECURE_CSU_AES_STS_OFFSET) &
+		(XSECURE_CSU_AES_STS_AES_KEY_ZERO | XSECURE_CSU_AES_STS_KUP_ZEROED);
+		if (Status == (XSECURE_CSU_AES_STS_AES_KEY_ZERO |
+					XSECURE_CSU_AES_STS_KUP_ZEROED)) {
+			break;
+		}
+
+	} while (TimeOut-- != 0x00);
+
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_AES_KEY_CLR_OFFSET, (u32)ReadReg);
+	if (TimeOut == 0) {
+		return XSECURE_CSU_AES_KEY_CLEAR_ERROR;
+	}
+
+	return XST_SUCCESS;
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function configures and load AES key from selected key source.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Aes instance.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void XSecure_AesKeySelNLoad(XSecure_Aes *InstancePtr)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	if(InstancePtr->KeySel == XSECURE_CSU_AES_KEY_SRC_DEV)
+	{
+		XSecure_WriteReg(InstancePtr->BaseAddress,
+		XSECURE_CSU_AES_KEY_SRC_OFFSET, XSECURE_CSU_AES_KEY_SRC_DEV);
+	}
+	else
+	{
+		XSecure_WriteReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_AES_KEY_SRC_OFFSET,
+				XSECURE_CSU_AES_KEY_SRC_KUP);
+	}
+
+	/* Trig loading of key. */
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_AES_KEY_LOAD_OFFSET,
+					XSECURE_CSU_AES_KEY_LOAD);
+
+	/* Wait for AES key loading.*/
+	XSecure_AesWaitKeyLoad(InstancePtr);
+}
+
+/*****************************************************************************/
+/**
+ *
+ * @brief
+ * This is a helper function to decrypt chunked bitstream block and route to
+ * PCAP.
+ *
+ * @param	InstancePtr 	Pointer to the XSecure_Aes instance.
+ * @param	Src 	Pointer to the encrypted bitstream block start.
+ * @param	Len 	Length of bitstream data block in bytes.
+ *
+ * @return	returns XST_SUCCESS if bitstream block is decrypted by AES.
+ *
+ *
+ ******************************************************************************/
+static s32 XSecure_AesChunkDecrypt(XSecure_Aes *InstancePtr, const u8 *Src,
+					u32 Len)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Len != 0U);
+
+	s32 Status = XST_SUCCESS;
+
+	u32 NumChunks = Len / (InstancePtr->ChunkSize);
+	u32 RemainingBytes = Len % (InstancePtr->ChunkSize);
+	u32 Index = 0U;
+	u32 StartAddrByte = (u32)(INTPTR)Src;
+
+	/*
+	 * Start the chunking process, copy encrypted chunks into OCM and push
+	 * decrypted data to PCAP
+	 */
+
+	for(Index = 0; Index < NumChunks; Index++)
+	{
+		Status = InstancePtr->DeviceCopy(StartAddrByte,
+					(UINTPTR)(InstancePtr->ReadBuffer),
+					InstancePtr->ChunkSize);
+
+		if (XST_SUCCESS != Status)
+		{
+			Status = XSECURE_CSU_AES_DEVICE_COPY_ERROR;
+			return Status;
+		}
+
+		XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+					(UINTPTR)(InstancePtr->ReadBuffer),
+					(InstancePtr->ChunkSize)/4U, 0);
+
+		/*
+		 * wait for the SRC_DMA to complete
+		 */
+		XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
+
+		/* Acknowledge the transfers has completed */
+		XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+							XCSUDMA_IXR_DONE_MASK);
+
+		XSecure_PcapWaitForDone();
+
+		StartAddrByte += InstancePtr->ChunkSize;
+	}
+
+	if((RemainingBytes != 0))
+	{
+		Status = InstancePtr->DeviceCopy(StartAddrByte,
+				(UINTPTR)(InstancePtr->ReadBuffer), RemainingBytes);
+
+		if (XST_SUCCESS != Status)
+		{
+			Status = XSECURE_CSU_AES_DEVICE_COPY_ERROR;
+			return Status;
+		}
+
+		XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+			(UINTPTR)(InstancePtr->ReadBuffer), RemainingBytes/4U, 0);
+
+		/* wait for the SRC_DMA to complete and the pcap to be IDLE */
+		XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr,
+					XCSUDMA_SRC_CHANNEL);
+
+		/* Acknowledge the transfers have completed */
+		XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+							XCSUDMA_IXR_DONE_MASK);
+		XSecure_PcapWaitForDone();
+
+		StartAddrByte += RemainingBytes;
+	}
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function handles decryption using the AES engine.
+ *
+ * @param	InstancePtr Pointer to the XSecure_Aes instance.
+ * @param	Dst 	Pointer to location where encrypted data will be written
+ * @param	Src 	Pointer to input data for encryption.
+ * @param	Tag 	Pointer to the GCM tag used for authentication
+ * @param	Len 	Length of the output data expected after decryption.
+ * @param	Flag 	Denotes whether the block is Secure header or data block
+ *
+ * @return	returns XST_SUCCESS if GCM tag matching was successful
+ *
+ *
+ ******************************************************************************/
+s32 XSecure_AesDecryptBlk(XSecure_Aes *InstancePtr, u8 *Dst,
+			const u8 *Src, const u8 *Tag, u32 Len, u32 Flag)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Tag != NULL);
+
+	volatile s32 Status = XST_SUCCESS;
+
+	u32 GcmStatus = 0U;
+	u32 StartAddrByte = (u32)(INTPTR)Src;
+
+	/* Start the message. */
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_AES_START_MSG_OFFSET,
+				XSECURE_CSU_AES_START_MSG);
+
+	/* Push IV into the AES engine. */
+	XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+		(UINTPTR)InstancePtr->Iv, XSECURE_SECURE_GCM_TAG_SIZE/4U, 0);
+
+	XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
+
+	/* Acknowledge the transfer has completed */
+	XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+				XCSUDMA_IXR_DONE_MASK);
+
+	/* Enable CSU DMA Src channel for byte swapping.*/
+	XCsuDma_Configure ConfigurValues = {0};
+
+	XCsuDma_GetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+						&ConfigurValues);
+
+	ConfigurValues.EndianType = 1U;
+
+	XCsuDma_SetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+				&ConfigurValues);
+
+	if(Flag)
+	{
+		/*
+		 * This means we are decrypting Block of the boot image.
+		 * Enable CSU DMA Dst channel for byte swapping.
+		 */
+
+		if (Dst != (u8*)XSECURE_DESTINATION_PCAP_ADDR)
+		{
+			XCsuDma_GetConfig(InstancePtr->CsuDmaPtr,
+						XCSUDMA_DST_CHANNEL,
+						&ConfigurValues);
+			ConfigurValues.EndianType = 1U;
+
+			XCsuDma_SetConfig(InstancePtr->CsuDmaPtr,
+						XCSUDMA_DST_CHANNEL,
+						&ConfigurValues);
+			/* Configure the CSU DMA Tx/Rx for the incoming Block. */
+			XCsuDma_Transfer(InstancePtr->CsuDmaPtr,
+						XCSUDMA_DST_CHANNEL,
+						(UINTPTR)Dst, Len/4U, 0);
+		}
+
+		if (InstancePtr->IsChunkingEnabled
+			== XSECURE_CSU_AES_CHUNKING_DISABLED)
+		{
+			XCsuDma_Transfer(InstancePtr->CsuDmaPtr,
+						XCSUDMA_SRC_CHANNEL,
+						(UINTPTR)Src, Len/4U, 0);
+
+			if (Dst != (u8*)XSECURE_DESTINATION_PCAP_ADDR)
+			{
+				/* Wait for the Dst DMA completion. */
+				XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr,
+							XCSUDMA_DST_CHANNEL);
+
+				XCsuDma_IntrClear(InstancePtr->CsuDmaPtr,
+							XCSUDMA_DST_CHANNEL,
+							XCSUDMA_IXR_DONE_MASK);
+
+				/* Disble CSU DMA Dst channel for byte swapping */
+
+				XCsuDma_GetConfig(InstancePtr->CsuDmaPtr,
+							XCSUDMA_DST_CHANNEL,
+							&ConfigurValues);
+
+				ConfigurValues.EndianType = 0U;
+
+				XCsuDma_SetConfig(InstancePtr->CsuDmaPtr,
+							XCSUDMA_DST_CHANNEL,
+							&ConfigurValues);
+			}
+			else
+			{
+				/* Wait for the Src DMA completion. */
+				XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr,
+							XCSUDMA_SRC_CHANNEL);
+				XSecure_PcapWaitForDone();
+			}
+
+			/* Acknowledge the transfers have completed */
+			XCsuDma_IntrClear(InstancePtr->CsuDmaPtr,
+						XCSUDMA_SRC_CHANNEL,
+						XCSUDMA_IXR_DONE_MASK);
+		}
+		else
+		{
+			/* Copy all the chunks to OCM, decrypt & send to PCAP */
+			Status = XSecure_AesChunkDecrypt(InstancePtr, Src, Len);
+			if (XST_SUCCESS != Status)
+			{
+				return Status;
+			}
+			/* update address to point to incoming secure header */
+			StartAddrByte += Len;
+		}
+
+		/*
+		 * Configure AES engine to push decrypted Key and IV in the
+		 * block to the CSU KEY and IV registers.
+		 */
+		XSecure_WriteReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_AES_KUP_WR_OFFSET,
+				XSECURE_CSU_AES_IV_WR | XSECURE_CSU_AES_KUP_WR);
+
+	}
+	else
+	{
+		/*
+		 * This means we are decrypting the Secure header.
+		 * Configure AES engine to push decrypted IV in the Secure
+		 * header to the CSU IV register.
+		 */
+		XSecure_WriteReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_AES_KUP_WR_OFFSET,
+				XSECURE_CSU_AES_IV_WR | XSECURE_CSU_AES_KUP_WR);
+	}
+
+	/* Push the Secure header/footer for decrypting next blocks KEY and IV. */
+	if (InstancePtr->IsChunkingEnabled == XSECURE_CSU_AES_CHUNKING_ENABLED)
+	{
+		/* Copy the secure header and GCM tag from flash to OCM */
+		Status = InstancePtr->DeviceCopy(StartAddrByte,
+				(UINTPTR)(InstancePtr->ReadBuffer),
+				(XSECURE_SECURE_HDR_SIZE
+				+ XSECURE_SECURE_GCM_TAG_SIZE));
+
+		if (XST_SUCCESS != Status)
+		{
+			Status = XSECURE_CSU_AES_DEVICE_COPY_ERROR;
+			return Status;
+		}
+
+		XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+					(UINTPTR)(InstancePtr->ReadBuffer),
+					XSECURE_SECURE_HDR_SIZE/4U, 1);
+	}
+	else
+	{
+		XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+					(UINTPTR)(Src + Len),
+					XSECURE_SECURE_HDR_SIZE/4U, 1);
+	}
+
+	/* Wait for the Src DMA completion. */
+	XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
+
+	/* Acknowledge the transfer has completed */
+	XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+						XCSUDMA_IXR_DONE_MASK);
+
+	/* Restore Key write register to 0. */
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_AES_KUP_WR_OFFSET, 0x0);
+
+	/* Push the GCM tag. */
+	if (InstancePtr->IsChunkingEnabled == XSECURE_CSU_AES_CHUNKING_ENABLED)
+	{
+		XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+			(UINTPTR)(InstancePtr->ReadBuffer
+					+ XSECURE_SECURE_HDR_SIZE),
+			XSECURE_SECURE_GCM_TAG_SIZE/4U, 0);
+	}
+	else
+	{
+		XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+					(UINTPTR)Tag,
+					XSECURE_SECURE_GCM_TAG_SIZE/4U, 0);
+	}
+
+	/* Wait for the Src DMA completion. */
+	XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
+
+	/* Acknowledge the transfer has completed */
+	XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+						XCSUDMA_IXR_DONE_MASK);
+
+	/* Disable CSU DMA Src channel for byte swapping. */
+
+	XCsuDma_GetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+							&ConfigurValues);
+	ConfigurValues.EndianType = 0U;
+
+	XCsuDma_SetConfig(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+							&ConfigurValues);
+
+	/* Wait for AES Decryption completion. */
+	XSecure_AesWaitForDone(InstancePtr);
+
+	/* Get the AES status to know if GCM check passed. */
+	GcmStatus = XSecure_ReadReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_AES_STS_OFFSET) &
+				XSECURE_CSU_AES_STS_GCM_TAG_OK;
+
+	if (!!GcmStatus == 0U)
+	{
+		return XSECURE_CSU_AES_GCM_TAG_MISMATCH;
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ *
+ * @brief
+ * This function will handle the AES-GCM Decryption.
+ * @cond xsecure_internal
+ @{
+ *	The Multiple key(a.k.a Key Rolling) or Single key
+ *	Encrypted images will have the same format,
+ *	such that it will have the following:
+ *
+ *	Secure header -->	Dummy AES Key of 32byte +
+ *						Block 0 IV of 12byte +
+ *						DLC for Block 0 of 4byte +
+ *						GCM tag of 16byte(Un-Enc).
+ *	Block N --> Boot Image Data for Block N of n size +
+ *				Block N+1 AES key of 32byte +
+ *				Block N+1 IV of 12byte +
+ *				GCM tag for Block N of 16byte(Un-Enc).
+ *
+ *	The Secure header and Block 0 will be decrypted using
+ *	Device key or user provide key.
+ *	If more than 1 blocks are found then the key and IV
+ * 	obtained from previous block will be used for decryption
+ *
+ *
+ *	1> Read the 1st 64bytes and decrypt 48 bytes using
+ *		the selected Device key.
+ *	2> Decrypt the 0th block using the IV + Size from step 2
+ *		and selected device key.
+ *	3> After decryption we will get decrypted data+KEY+IV+Blk
+ *		Size so store the KEY/IV into KUP/IV registers.
+ *	4> Using Blk size, IV and Next Block Key information
+ *		start decrypting the next block.
+ *	5> if the Current Image size > Total image length,
+ *		go to next step 8. Else go back to step 5
+ *	6> If there are failures, return error code
+ *	7> If we have reached this step means the decryption is SUCCESS.
+ ** @}
+ * @endcond
+ *
+ * @param	InstancePtr 	Pointer to the XSecure_Aes instance.
+ * @param	Src 	Pointer to encrypted data source location
+ * @param	Dst 	Pointer to location where decrypted data will be
+ *			written.
+ * @param	Length	Expected total length of decrypted image expected.
+ *
+ * @return	returns XST_SUCCESS if successful, or the relevant errorcode.
+ *
+ * @note	This function is used for decrypting the Image's partition
+ *		encrypted by Bootgen
+ *
+ ******************************************************************************/
+s32 XSecure_AesDecrypt(XSecure_Aes *InstancePtr, u8 *Dst, const u8 *Src,
+			u32 Length)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	/* Chunking is only for bitstream partitions */
+	Xil_AssertNonvoid(((Dst == (u8*)XSECURE_DESTINATION_PCAP_ADDR)
+				|| (InstancePtr->IsChunkingEnabled
+					== XSECURE_CSU_AES_CHUNKING_DISABLED)));
+
+	u32 SssCfg = 0x0U;
+	volatile s32 Status = XST_SUCCESS;
+	u32 CurrentImgLen = 0x0U;
+	u32 NextBlkLen = 0x0U;
+	u32 PrevBlkLen = 0x0U;
+	u8 *DestAddr= 0x0U;
+	u8 *SrcAddr = 0x0U;
+	u8 *GcmTagAddr = 0x0U;
+	u32 BlockCnt = 0x0U;
+	u32 ImageLen = 0x0U;
+	u32 SssPcap = 0x0U;
+	u32 SssDma = 0x0U;
+	u32 SssAes = 0x0U;
+	XCsuDma_Configure ConfigurValues = {0};
+	u32 KeyClearStatus;
+
+	/* Configure the SSS for AES. */
+	SssAes = XSecure_SssInputAes(XSECURE_CSU_SSS_SRC_SRC_DMA);
+
+	if (Dst == (u8*)XSECURE_DESTINATION_PCAP_ADDR)
+	{
+		SssPcap = XSecure_SssInputPcap(XSECURE_CSU_SSS_SRC_AES);
+		SssCfg =  SssPcap|SssAes;
+	}
+	else
+	{
+		SssDma = XSecure_SssInputDstDma(XSECURE_CSU_SSS_SRC_AES);
+		SssCfg = SssDma|SssAes ;
+	}
+
+	XSecure_SssSetup(SssCfg);
+
+	/* Configure AES for Decryption */
+	XSecure_WriteReg(InstancePtr->BaseAddress, XSECURE_CSU_AES_CFG_OFFSET,
+					 XSECURE_CSU_AES_CFG_DEC);
+
+	DestAddr = Dst;
+	ImageLen = Length;
+
+	SrcAddr = (u8 *)Src ;
+	GcmTagAddr = SrcAddr + XSECURE_SECURE_HDR_SIZE;
+
+	/* Clear AES contents by reseting it. */
+	XSecure_AesReset(InstancePtr);
+
+	/* Clear AES_KEY_CLEAR bits to avoid clearing of key */
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+			XSECURE_CSU_AES_KEY_CLR_OFFSET, (u32)0x0U);
+
+	if(InstancePtr->KeySel == XSECURE_CSU_AES_KEY_SRC_DEV)
+	{
+		XSecure_AesKeySelNLoad(InstancePtr);
+	}
+	else
+	{
+		u32 Count=0U, Value=0U;
+		u32 Addr=0U;
+		for(Count = 0U; Count < 8U; Count++)
+		{
+			/* Helion AES block expects the key in big-endian. */
+			Value = Xil_Htonl(InstancePtr->Key[Count]);
+
+			Addr = InstancePtr->BaseAddress +
+				XSECURE_CSU_AES_KUP_0_OFFSET
+				+ (Count * 4);
+
+			XSecure_Out32(Addr, Value);
+		}
+		XSecure_AesKeySelNLoad(InstancePtr);
+	}
+
+	do
+	{
+		PrevBlkLen = NextBlkLen;
+		if (BlockCnt == 0) {
+			/* Enable CSU DMA Src channel for byte swapping.*/
+			XCsuDma_GetConfig(InstancePtr->CsuDmaPtr,
+				XCSUDMA_SRC_CHANNEL, &ConfigurValues);
+			ConfigurValues.EndianType = 1U;
+			XCsuDma_SetConfig(InstancePtr->CsuDmaPtr,
+				XCSUDMA_SRC_CHANNEL, &ConfigurValues);
+		}
+
+		/* Start decryption of Secure-Header/Block/Footer. */
+
+		Status = XSecure_AesDecryptBlk(InstancePtr, DestAddr,
+						(const u8 *)SrcAddr,
+						((const u8 *)GcmTagAddr),
+						NextBlkLen, BlockCnt);
+
+		/* If decryption failed then return error. */
+		if(Status != XST_SUCCESS)
+		{
+			goto ENDF;
+		}
+
+		/*
+		 * Find the size of next block to be decrypted.
+		 * Size is in 32-bit words so mul it with 4
+		 */
+		NextBlkLen = Xil_Htonl(XSecure_ReadReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_AES_IV_3_OFFSET)) * 4;
+
+		/* Update the current image size. */
+		CurrentImgLen += NextBlkLen;
+
+		if(0U == NextBlkLen)
+		{
+			if(CurrentImgLen != Length)
+			{
+				/*
+				 * If this is the last block then check
+				 * if the current image != size in the header
+				 * then return error.
+				 */
+				Status = XSECURE_CSU_AES_IMAGE_LEN_MISMATCH;
+				goto ENDF;
+			}
+			else
+			{
+				goto ENDF;
+			}
+		}
+		else
+		{
+			/*
+			 * If this is not the last block then check
+			 * if the current image > size in the header
+			 * then return error.
+			 */
+			if(CurrentImgLen > ImageLen)
+			{
+				Status = XSECURE_CSU_AES_IMAGE_LEN_MISMATCH;
+				goto ENDF;
+			}
+		}
+
+		/*
+		 * Update DestAddr and SrcAddr for next Block decryption.
+		 */
+		if (Dst != (u8*)XSECURE_DESTINATION_PCAP_ADDR)
+		{
+			DestAddr += PrevBlkLen;
+		}
+		SrcAddr = (GcmTagAddr + XSECURE_SECURE_GCM_TAG_SIZE);
+		/*
+		 * We are done with Secure header to decrypt the Block 0
+		 * we can change the AES key source to KUP.
+		 */
+		InstancePtr->KeySel = XSECURE_CSU_AES_KEY_SRC_KUP;
+		XSecure_AesKeySelNLoad(InstancePtr);
+		/* Point IV to the CSU IV register. */
+		InstancePtr->Iv = (u32 *)(InstancePtr->BaseAddress +
+					(UINTPTR)XSECURE_CSU_AES_IV_0_OFFSET);
+
+
+		/* Update the GcmTagAddr to get GCM-TAG for next block. */
+		GcmTagAddr = SrcAddr + NextBlkLen + XSECURE_SECURE_HDR_SIZE;
+
+		/* Update block count. */
+		BlockCnt++;
+
+	}while(1);
+
+ENDF:
+	XSecure_AesReset(InstancePtr);
+	KeyClearStatus = XSecure_AesKeyZero(InstancePtr);
+	if (KeyClearStatus != XST_SUCCESS) {
+		return KeyClearStatus;
+	}
+
+	return Status;
+}
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_aes.h b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_aes.h
new file mode 100644
index 0000000..8c53b0b
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_aes.h
@@ -0,0 +1,253 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 18 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xsecure_aes.h
+* @addtogroup xsecure_aes_apis XilSecure AES APIs
+* @{
+* @cond xsecure_internal
+* This file contains hardware interface related information for CSU AES device
+*
+* This driver supports the following features:
+*
+* - AES decryption with/without keyrolling
+* - Authentication using GCM tag
+* - AES encryption
+*
+* Initialization & Configuration
+*
+* The Aes driver instance can be initialized
+* in the following way:
+*
+*   - XSecure_AesInitialize(XSecure_Aes *InstancePtr, XCsuDma *CsuDmaPtr,
+*					u32 KeySel, u32* Iv, u32* Key)
+*
+* The key for decryption can be the device key or user provided key.
+* KeySel variable denotes the key to be used. In case the key is user
+* provided, key has to be provided in Key variable. If it is device key,
+* the key variable will be ignored and device key will be used
+*
+* The initial Initialization vector will be used for decrypting secure header
+* and block 0 of given encrypted data.
+*
+*
+* @note
+*	-The format of encrypted data(boot image) has to be exactly as
+*	 specified by the bootgen. Any encrypted data has to start with a
+*	 secure header first and then the data blocks.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date        Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  ba   10/10/14 Initial release
+* 1.1   ba   11/10/15 Modified Key loading logic in AES encryption
+* 2.0   vns  01/28/17 Added APIs for decryption which can be used for decrypting
+*                     data rather than a boot image.
+*       vns  02/03/17 Added APIs for encryption in generic way.
+*                     Modified existing XSecure_AesEncrypt to
+*                     XSecure_AesEncryptData, and added XSecure_AesEncryptInit
+*                     and XSecure_AesEncryptUpdate APIs for generic usage.
+* 2.2   vns  07/06/16 Added doxygen tags
+* 3.0   vns  02/19/18 Added error code for key clear
+*                     XSECURE_CSU_AES_KEY_CLEAR_ERROR and timeout macro
+*                     XSECURE_AES_TIMEOUT_MAX
+*
+* 

+* @endcond
+*
+******************************************************************************/
+
+#ifndef XSECURE_CSU_AES_H
+#define XSECURE_CSU_AES_H
+
+/************************** Include Files ***********************************/
+
+#include "xsecure_hw.h"
+#include "xcsudma.h"
+#include "xstatus.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions ****************************/
+/** @cond xsecure_internal
+@{
+*/
+#define XSECURE_CSU_AES_STS_AES_BUSY	(1U << 0) /**< AES busy */
+#define XSECURE_CSU_AES_STS_AES_READY	(1U << 1)
+					/**< Ready to Receive Data */
+#define XSECURE_CSU_AES_STS_AES_DONE	(1U << 2)
+					/**< Operation Complete */
+#define XSECURE_CSU_AES_STS_GCM_TAG_OK	(1U << 3) /**< GCM Tag Passed */
+#define XSECURE_CSU_AES_STS_KEY_INIT_DONE	(1U << 4)
+					/**< Key Initialize */
+#define XSECURE_CSU_AES_STS_AES_KEY_ZERO	(1U << 8)
+					/**< AES key zeroed */
+#define XSECURE_CSU_AES_STS_KUP_ZEROED	(1U << 9) /**< KUP key Zeroed */
+#define XSECURE_CSU_AES_STS_BOOT_KEY_ZERO	(1U << 10)
+					/**< Boot Key zeroed */
+#define XSECURE_CSU_AES_STS_OKR_ZERO 	(1U << 11)
+					/**< Operational Key zeroed */
+
+#define XSECURE_CSU_AES_KEY_SRC_KUP	(0x0U) /**< KUP key source */
+#define XSECURE_CSU_AES_KEY_SRC_DEV	(0x1U) /**< Device Key source */
+
+#define XSECURE_CSU_AES_CHUNKING_DISABLED (0x0U)
+#define XSECURE_CSU_AES_CHUNKING_ENABLED (0x1U)
+
+#define XSECURE_CSU_AES_KEY_LOAD	(1U << 0)
+					/**< Load AES key from Source */
+
+#define XSECURE_CSU_AES_START_MSG	(1U << 0) /**< AES Start message */
+
+#define XSECURE_CSU_AES_KUP_WR		(1U << 0)
+					/**< Direct AES Output to KUP */
+#define XSECURE_CSU_AES_IV_WR		(1U << 1)
+					/**< Direct AES Output to IV Reg */
+
+#define XSECURE_CSU_AES_RESET		(1U << 0) /**< Reset Value */
+
+#define XSECURE_CSU_AES_KEY_ZERO	(1U << 0)
+					/**< set AES key to zero */
+#define XSECURE_CSU_AES_KUP_ZERO	(1U << 1)
+					/**< Set KUP Reg. to zero */
+
+#define XSECURE_CSU_AES_CFG_DEC		(0x0U) /**< AES mode Decrypt */
+#define XSECURE_CSU_AES_CFG_ENC		(0x1U) /**< AES Mode Encrypt */
+
+#define XSECURE_CSU_KUP_WR		(1U << 0)
+					/**< Direct output to KUP */
+#define XSECURE_CSU_IV_WR		(1U << 4)
+					/**< image length mismatch */
+
+/* Error Codes and Statuses */
+#define XSECURE_CSU_AES_DECRYPTION_DONE	(0L)
+					/**< AES Decryption successful */
+#define XSECURE_CSU_AES_GCM_TAG_MISMATCH	(1L)
+					/**< user provided GCM tag does
+						not match calculated tag */
+#define XSECURE_CSU_AES_IMAGE_LEN_MISMATCH	(2L)
+					/**< image length mismatch */
+#define XSECURE_CSU_AES_DEVICE_COPY_ERROR	(3L)
+					/**< device copy failed */
+#define XSECURE_CSU_AES_KEY_CLEAR_ERROR		(4L)
+					/**< AES key clear error */
+
+#define XSECURE_SECURE_HDR_SIZE		(48U)
+					/**< Secure Header Size in Bytes*/
+#define XSECURE_SECURE_GCM_TAG_SIZE	(16U) /**< GCM Tag Size in Bytes */
+
+#define XSECURE_DESTINATION_PCAP_ADDR    (0XFFFFFFFFU)
+
+#define XSECURE_AES_TIMEOUT_MAX		(0x1FFFFU)
+
+/************************** Type Definitions ********************************/
+
+/**
+ * The AES-GCM driver instance data structure. A pointer to an instance data
+ * structure is passed around by functions to refer to a specific driver
+ * instance.
+ */
+typedef struct {
+	u32 BaseAddress; /**< Device Base Address */
+	XCsuDma *CsuDmaPtr; /**< CSUDMA Instance Pointer */
+	u32* Iv; /**< Initialization Vector */
+	u32* Key; /**< AES Key */
+	u32* GcmTagAddr; /**< GCM tag address for decryption */
+	u32  KeySel; /**< Key Source selection */
+	u8 IsChunkingEnabled; /**< Data Chunking enabled/disabled */
+	u8* ReadBuffer; /**< Data Buffer to be used in case of chunking */
+	u32 ChunkSize; /**< Size of one chunk in bytes */
+	u32 (*DeviceCopy) (u32 SrcAddress, UINTPTR DestAddress, u32 Length);
+		/**< Function pointer for copying data chunk from device to buffer.
+		 * Arguments are:
+		 * SrcAddress: Address of data in device.
+		 * DestAddress: Address where data will be copied
+		 * Length: Length of data in bytes.
+		 * Return value should be 0 in case of success and 1 for failure.
+		 */
+	u32 SizeofData; /**< Size of Data to be encrypted or decrypted */
+	u8  *Destination; /**< Destination for decrypted/encrypted data */
+} XSecure_Aes;
+
+/** @}
+@endcond */
+/************************** Function Prototypes ******************************/
+
+/* Initialization Functions */
+
+s32  XSecure_AesInitialize(XSecure_Aes *InstancePtr, XCsuDma *CsuDmaPtr,
+				u32 KeySel, u32* Iv,  u32* Key);
+
+/* Decryption of data */
+void XSecure_AesDecryptInit(XSecure_Aes *InstancePtr, u8 * DecData,
+		u32 Size, u8 * GcmTagAddr);
+s32 XSecure_AesDecryptUpdate(XSecure_Aes *InstancePtr, u8 *EncData, u32 Size);
+
+s32 XSecure_AesDecryptData(XSecure_Aes *InstancePtr, u8 * DecData, u8 *EncData,
+		u32 Size, u8 * GcmTagAddr);
+
+/* Decryption of boot image created by using bootgen */
+s32 XSecure_AesDecrypt(XSecure_Aes *InstancePtr, u8 *Dst, const u8 *Src,
+				u32 Length);
+
+/* Encryption */
+void XSecure_AesEncryptInit(XSecure_Aes *InstancePtr, u8 *EncData, u32 Size);
+void XSecure_AesEncryptUpdate(XSecure_Aes *InstancePtr, const u8 *Data,
+							u32 Size);
+void XSecure_AesEncryptData(XSecure_Aes *InstancePtr, u8 *Dst, const u8 *Src,
+				u32 Len);
+
+/* Reset */
+void XSecure_AesReset(XSecure_Aes  *InstancePtr);
+
+void XSecure_AesWaitForDone(XSecure_Aes *InstancePtr);
+
+/** @cond xsecure_internal
+@{ */
+void XSecure_AesKeySelNLoad(XSecure_Aes *InstancePtr);
+s32 XSecure_AesDecryptBlk(XSecure_Aes *InstancePtr, u8 *Dst,
+			const u8 *Src, const u8 *Tag, u32 Len, u32 Flag);
+/* Enable/Disable chunking */
+void XSecure_AesSetChunking(XSecure_Aes *InstancePtr, u8 Chunking);
+
+/* Configuring Data chunking settings */
+void XSecure_AesSetChunkConfig(XSecure_Aes *InstancePtr, u8 *ReadBuffer,
+		u32 ChunkSize, u32(*DeviceCopy)(u32, UINTPTR, u32));
+/** @}
+@endcond */
+
+#endif /* XSECURE_AES_H_ */
+
+/**@}*/
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_hw.h b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_hw.h
new file mode 100644
index 0000000..4ba143c
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_hw.h
@@ -0,0 +1,364 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 17 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file xsecure_hw.h
+*
+* This is the header file which contains definitions for the hardware
+* interface of secure hardware devices.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date        Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  ba   09/25/14 Initial release
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+#ifndef XSECURE_HW_H
+#define XSECURE_HW_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "xparameters.h"
+#include "xil_types.h"
+#include "sleep.h"
+
+/************************** Constant Definitions *****************************/
+
+#define XSECURE_CSU_REG_BASE_ADDR	(0xFFCA0000U)
+					/**< CSU base address */
+#define XSECURE_CSU_DMA_BASE		(0xFFC80000U)
+					/**< CSUDMA base address */
+
+#define XSECURE_CSU_SHA3_BASE	(XSECURE_CSU_REG_BASE_ADDR + 0x2000U)
+					/**< SHA3 base address */
+#define XSECURE_CSU_CTRL_REG	(XSECURE_CSU_REG_BASE_ADDR + 0x4U)
+					/**< CSU control reg. */
+#define XSECURE_CSU_SSS_BASE	(XSECURE_CSU_REG_BASE_ADDR + 0x8U)
+					/**< CSU SSS base address */
+#define XSECURE_CSU_AES_BASE	(XSECURE_CSU_REG_BASE_ADDR + 0x1000U)
+					/**< CSU AES base address */
+#define XSECURE_CSU_RSA_BASE	(0xFFCE0000U)
+					/**< RSA reg. base address */
+#define XSECURE_CSU_PCAP_STATUS (XSECURE_CSU_REG_BASE_ADDR + 0X00003010U)
+					/**< CSU PCAP Status reg. */
+#define XSECURE_CSU_PCAP_STATUS_PCAP_WR_IDLE_MASK    (0X00000001U)
+					/**< PCAP Write Idle */
+
+/** @name Register Map
+ *
+ * Register offsets for the SHA module.
+ * @{
+ */
+#define XSECURE_CSU_SHA3_START_OFFSET	(0x00U) /**< SHA start message */
+#define XSECURE_CSU_SHA3_RESET_OFFSET	(0x04U) /**< Reset Register */
+#define XSECURE_CSU_SHA3_DONE_OFFSET	(0x08U) /**< SHA Done Register */
+
+#define XSECURE_CSU_SHA3_DIGEST_0_OFFSET	(0x10U)
+					/**< SHA3 Digest: Reg 0 */
+#define XSECURE_CSU_SHA3_DIGEST_11_OFFSET	(0x34U)
+					/**< SHA3 Digest: Last Register */
+/* @} */
+
+/** @name Register Map
+ *
+ * Register offsets for the AES module.
+ * @{
+ */
+#define XSECURE_CSU_AES_STS_OFFSET	(0x00U) /**< AES Status */
+#define XSECURE_CSU_AES_KEY_SRC_OFFSET	(0x04U) /**< AES Key Source */
+#define XSECURE_CSU_AES_KEY_LOAD_OFFSET	(0x08U) /**< AES Key Load Reg */
+#define XSECURE_CSU_AES_START_MSG_OFFSET (0x0CU) /**< AES Start Message */
+#define XSECURE_CSU_AES_RESET_OFFSET	(0x10U) /**< AES Reset Register */
+#define XSECURE_CSU_AES_KEY_CLR_OFFSET	(0x14U) /**< AES Key Clear */
+#define XSECURE_CSU_AES_CFG_OFFSET	(0x18U)/**< AES Operational Mode */
+#define XSECURE_CSU_AES_KUP_WR_OFFSET	(0x1CU)
+						/**< AES KUP Write Control */
+
+#define XSECURE_CSU_AES_KUP_0_OFFSET	(0x20U)
+						/**< AES Key Update 0 */
+#define XSECURE_CSU_AES_KUP_1_OFFSET	(0x24U) /**< AES Key Update 1 */
+#define XSECURE_CSU_AES_KUP_2_OFFSET	(0x28U) /**< AES Key Update 2 */
+#define XSECURE_CSU_AES_KUP_3_OFFSET	(0x2CU) /**< AES Key Update 3 */
+#define XSECURE_CSU_AES_KUP_4_OFFSET	(0x30U) /**< AES Key Update 4 */
+#define XSECURE_CSU_AES_KUP_5_OFFSET	(0x34U) /**< AES Key Update 5 */
+#define XSECURE_CSU_AES_KUP_6_OFFSET	(0x38U) /**< AES Key Update 6 */
+#define XSECURE_CSU_AES_KUP_7_OFFSET	(0x3CU) /**< AES Key Update 7 */
+
+#define XSECURE_CSU_AES_IV_0_OFFSET		(0x40U) /**< AES IV 0 */
+#define XSECURE_CSU_AES_IV_1_OFFSET		(0x44U) /**< AES IV 1 */
+#define XSECURE_CSU_AES_IV_2_OFFSET		(0x48U) /**< AES IV 2 */
+#define XSECURE_CSU_AES_IV_3_OFFSET		(0x4CU) /**< AES IV 3 */
+/* @} */
+
+
+/** @name Register Map
+ *
+ * Register offsets for the RSA module.
+ * @{
+ */
+#define XSECURE_CSU_RSA_WRITE_DATA_OFFSET	(0x00U)
+						/**< RAM write data offset */
+#define XSECURE_CSU_RSA_WRITE_ADDR_OFFSET	(0x04U)
+						/**< RAM write address offset */
+#define XSECURE_CSU_RSA_READ_DATA_OFFSET	(0x08U)
+						/**< RAM data read offset */
+#define XSECURE_CSU_RSA_READ_ADDR_OFFSET	(0x0CU)
+						/**< RAM read offset */
+#define XSECURE_CSU_RSA_CONTROL_OFFSET		(0x10U)
+						/**< RSA Control Reg */
+
+#define XSECURE_CSU_RSA_STATUS_OFFSET		(0x14U)
+						/**< Status Register */
+
+#define XSECURE_CSU_RSA_MINV0_OFFSET		(0x18U)
+					/**< RSA MINV(Mod 32 Inverse) 0 */
+#define XSECURE_CSU_RSA_MINV1_OFFSET		(0x1CU)
+						/**< RSA MINV 1 */
+#define XSECURE_CSU_RSA_MINV2_OFFSET		(0x20U) /**< RSA MINV 2 */
+#define XSECURE_CSU_RSA_MINV3_OFFSET		(0x24U) /**< RSA MINV 3 */
+#define XSECURE_CSU_RSA_ZERO_OFFSET		(0x28U) /**< RSA Zero offset */
+
+#define XSECURE_CSU_RSA_WR_DATA_0_OFFSET	(0x2cU) /**< Write Data 0 */
+#define XSECURE_CSU_RSA_WR_DATA_1_OFFSET	(0x30U) /**< Write Data 1 */
+#define XSECURE_CSU_RSA_WR_DATA_2_OFFSET	(0x34U) /**< Write Data 2 */
+#define XSECURE_CSU_RSA_WR_DATA_3_OFFSET	(0x38U) /**< Write Data 3 */
+#define XSECURE_CSU_RSA_WR_DATA_4_OFFSET	(0x3cU) /**< Write Data 4 */
+#define XSECURE_CSU_RSA_WR_DATA_5_OFFSET	(0x40U) /**< Write Data 5 */
+#define XSECURE_CSU_RSA_WR_ADDR_OFFSET		(0x44U)
+					/**< Write address in RSA RAM */
+
+#define XSECURE_CSU_RSA_RD_DATA_0_OFFSET	(0x48U) /**< Read Data 0 */
+#define XSECURE_CSU_RSA_RD_DATA_1_OFFSET	(0x4cU) /**< Read Data 1 */
+#define XSECURE_CSU_RSA_RD_DATA_2_OFFSET	(0x50U) /**< Read Data 2 */
+#define XSECURE_CSU_RSA_RD_DATA_3_OFFSET	(0x54U) /**< Read Data 3 */
+#define XSECURE_CSU_RSA_RD_DATA_4_OFFSET	(0x58U) /**< Read Data 4 */
+#define XSECURE_CSU_RSA_RD_DATA_5_OFFSET	(0x5cU) /**< Read Data 5 */
+#define XSECURE_CSU_RSA_RD_ADDR_OFFSET		(0x60U)
+						/**< Read address in RSA RAM */
+
+/* @} */
+
+/**************************** Type Definitions *******************************/
+
+/* Definition for SSS reg Source bits. */
+typedef enum
+{
+	XSECURE_CSU_SSS_SRC_PCAP	= 0x3U,	/**< SSS source is PCAP */
+	XSECURE_CSU_SSS_SRC_SRC_DMA	= 0x5U,	/**< SSS source is DMA */
+	XSECURE_CSU_SSS_SRC_AES		= 0xAU,	/**< SSS source is AES */
+	XSECURE_CSU_SSS_SRC_PSTP	= 0xCU,	/**< SSS source is PSTP */
+	XSECURE_CSU_SSS_SRC_NONE	= 0x0U,	/**< NO Source */
+	XSECURE_CSU_SSS_SRC_MASK	= 0xFU	/**< Mask for SSS source */
+}XSECURE_CSU_SSS_SRC;				/**< SSS source values */
+
+/**
+* Definition for SSS reg Destination bits.
+*/
+typedef enum
+{
+	XSECURE_CSU_SSS_PCAP_SHIFT = 0U,/**< Offset for destination PCAP */
+	XSECURE_CSU_SSS_DMA_SHIFT = 4U,	/**< Offset for destination DMA */
+	XSECURE_CSU_SSS_AES_SHIFT = 8U,	/**< Offset for destination AES */
+	XSECURE_CSU_SSS_SHA_SHIFT = 12U,/**< Offset for destination SHA */
+	XSECURE_CSU_SSS_PSTP_SHIFT = 16U/**< Offset for destination PSTP */
+}XSECURE_CSU_SSS_DEST_SHIFT;		/**<.Offset for SSS destination.*/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+* Read a CSU register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the base address of
+*		the device.
+*
+* @return	The value read from the register.
+*
+* @note		C-Style signature:
+*		u32 XSecure_ReadReg(u32 BaseAddress, int RegOffset)
+*
+******************************************************************************/
+#define XSecure_ReadReg(BaseAddress, RegOffset) \
+				Xil_In32((BaseAddress) + (RegOffset))
+
+/***************************************************************************/
+/**
+* Write a CSU register.
+*
+* @param	BaseAddress contains the base address of the device.
+* @param	RegOffset contains the offset from the base address of
+*		the device.
+* @param	RegisterValue is the value to be written to the register
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_WriteReg(u32 BaseAddress, int RegOffset,
+*			u16 RegisterValue)
+*
+******************************************************************************/
+#define XSecure_WriteReg(BaseAddress, RegOffset, RegisterValue) \
+			Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))
+
+#define XSecure_In32(Addr)			Xil_In32(Addr)
+
+#define XSecure_In64(Addr)			Xil_In64(Addr)
+
+#define XSecure_Out32(Addr, Data)		Xil_Out32(Addr, Data)
+
+#define XSecure_Out64(Addr, Data)		Xil_Out64(Addr, Data)
+
+/**
+* Definition for SSS inline functions
+*/
+
+static inline u32 XSecure_SssInputPcap(XSECURE_CSU_SSS_SRC Src)
+{
+    Src &= XSECURE_CSU_SSS_SRC_MASK;
+    return (Src << XSECURE_CSU_SSS_PCAP_SHIFT);
+}
+
+/***************************************************************************/
+/**
+* Set the SSS configuration mask for a data transfer to DMA device
+*
+* @param	Src contains the bits for source device sending data to DMA.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_SssInputDstDma(XSECURE_CSU_SSS_SRC Src)
+*
+******************************************************************************/
+static inline u32 XSecure_SssInputDstDma(XSECURE_CSU_SSS_SRC Src)
+{
+	Src &= XSECURE_CSU_SSS_SRC_MASK;
+	return (Src << XSECURE_CSU_SSS_DMA_SHIFT);
+}
+
+/***************************************************************************/
+/**
+* Set the SSS configuration mask for a data transfer to AES device
+*
+* @param	Src contains the bits for AES source device
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_SssInputAes(XSECURE_CSU_SSS_SRC Src)
+*
+******************************************************************************/
+static inline u32 XSecure_SssInputAes(XSECURE_CSU_SSS_SRC Src)
+{
+	Src &= XSECURE_CSU_SSS_SRC_MASK;
+	return (Src << XSECURE_CSU_SSS_AES_SHIFT);
+}
+
+/***************************************************************************/
+/**
+* Set the SSS configuration mask for a data transfer to SHA device
+*
+* @param	Src contains the bits for SHA source device
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_SssInputSha3(XSECURE_CSU_SSS_SRC Src)
+*
+******************************************************************************/
+static inline u32 XSecure_SssInputSha3(XSECURE_CSU_SSS_SRC Src)
+{
+	Src &= XSECURE_CSU_SSS_SRC_MASK;
+	return (Src << XSECURE_CSU_SSS_SHA_SHIFT);
+}
+
+/***************************************************************************/
+/**
+* Set up the CSU Secure Stream Switch configuration
+*
+* @param	Cfg contains the 32 bit value to be written into SSS config
+*			register
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_SssSetup(u32 Cfg)
+*
+******************************************************************************/
+static inline void XSecure_SssSetup(u32 Cfg)
+{
+	XSecure_Out32(XSECURE_CSU_SSS_BASE, Cfg);
+}
+
+/***************************************************************************/
+/**
+* Wait for writes to PL and hence PCAP write cycle to complete
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		C-Style signature:
+*			void XSecure_PcapWaitForDone(void)
+*
+******************************************************************************/
+static inline void XSecure_PcapWaitForDone()
+{
+	while ((Xil_In32(XSECURE_CSU_PCAP_STATUS) &
+			XSECURE_CSU_PCAP_STATUS_PCAP_WR_IDLE_MASK) !=
+			XSECURE_CSU_PCAP_STATUS_PCAP_WR_IDLE_MASK);
+}
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* XSECURE_HW_H */
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_rsa.c b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_rsa.c
new file mode 100644
index 0000000..a3f5c30
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_rsa.c
@@ -0,0 +1,681 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 17 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsecure_rsa.c
+*
+* This file contains the implementation of the interface functions for RSA
+* driver. Refer to the header file xsecure_sha.h for more detailed information.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.0   ba   10/13/14 Initial release
+* 1.1   ba   12/11/15 Added support for NIST approved SHA-3 in 2.0 silicon
+* 2.0   vns  03/15/17 Fixed compilation warning, and corrected SHA2 padding
+*                     verfication for silicon version other than 1.0
+* 2.2   vns  07/06/17 Added doxygen tags
+*       vns  17/08/17 Added APIs XSecure_RsaPublicEncrypt and
+*                     XSecure_RsaPrivateDecrypt.As per functionality
+*                     XSecure_RsaPublicEncrypt is same as XSecure_RsaDecrypt.
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xsecure_rsa.h"
+
+/************************** Constant Definitions *****************************/
+
+/* PKCS padding for SHA-3 in 1.0 Silicon */
+static const u8 XSecure_Silicon1_TPadSha3[] = {0x30U, 0x41U, 0x30U, 0x0DU,
+			0x06U, 0x09U, 0x60U, 0x86U, 0x48U, 0x01U, 0x65U, 0x03U, 0x04U,
+			0x02U, 0x02U, 0x05U, 0x00U, 0x04U, 0x30U };
+
+/* PKCS padding scheme for SHA-2 */
+static const u8 XSecure_Silicon1_TPadSha2[] = {0x30U, 0x31U, 0x30U, 0x0DU,
+			0x06U, 0x09U, 0x60U, 0x86U, 0x48U, 0x01U, 0x65U, 0x03U, 0x04U,
+			0x02U, 0x01U, 0x05U, 0x00U, 0x04U, 0x20U };
+
+/* PKCS padding for SHA-3 in 2.0 Silicon and onwards */
+static const u8 XSecure_Silicon2_TPadSha3[] = {0x30U, 0x41U, 0x30U, 0x0DU,
+			0x06U, 0x09U, 0x60U, 0x86U, 0x48U, 0x01U, 0x65U, 0x03U, 0x04U,
+			0x02U, 0x09U, 0x05U, 0x00U, 0x04U, 0x30U };
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+static s32 XSecure_RsaOperation(XSecure_Rsa *InstancePtr, u8 *Input,
+					u8 *Result);
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Definitions *****************************/
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function initializes a specific Xsecure_Rsa instance so that it is
+ * ready to be used.
+ *
+ * @param	InstancePtr 	Pointer to the XSecure_Rsa instance.
+ * @param	Mod		A character Pointer which contains the key
+ *		Modulus of key size.
+ * @param	ModExt		A Pointer to the pre-calculated exponential
+ *		(R^2 Mod N) value.
+ *		- NULL - if user doesn't have pre-calculated R^2 Mod N value,
+ *		control will take care of this calculation internally.
+ * @param	ModExpo		Pointer to the buffer which contains key
+ *		exponent.
+ *
+ * @return	XST_SUCCESS if initialization was successful.
+ *
+ * @note	`Modulus`, `ModExt` and `ModExpo` are part of prtition signature
+ * 		when authenticated boot image is generated by bootgen, else the
+ *		all of them should be extracted from the key.
+ *
+ ******************************************************************************/
+s32 XSecure_RsaInitialize(XSecure_Rsa *InstancePtr, u8 *Mod, u8 *ModExt,
+							u8 *ModExpo)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Mod != NULL);
+	Xil_AssertNonvoid(ModExpo != NULL);
+
+	InstancePtr->BaseAddress = XSECURE_CSU_RSA_BASE;
+	InstancePtr->Mod = Mod;
+	InstancePtr->ModExt = ModExt;
+	InstancePtr->ModExpo = ModExpo;
+	InstancePtr->SizeInWords = XSECURE_RSA_4096_SIZE_WORDS;
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function writes data to RSA RAM at a given offset.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Aes instance.
+ * @param	WrData		Pointer to the data to be written to RSA RAM
+ * @param	RamOffset	Offset for the data to be written in RSA RAM
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+static void XSecure_RsaWriteMem(XSecure_Rsa *InstancePtr, u32* WrData,
+							u8 RamOffset)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	u32 Index = 0U;
+	u32 DataOffset = 0U;
+	u32 TmpIndex = 0U;
+	u32 Data = 0U;
+
+	/** Each of this loop will write 192 bits of data*/
+	for (DataOffset = 0U; DataOffset < 22U; DataOffset++)
+	{
+		for (Index = 0U; Index < 6U; Index++)
+		{
+			TmpIndex = (DataOffset*6) + Index;
+			/**
+			* Exponent size is only 4 bytes
+			* and rest of the data needs to be 0
+			*/
+			if((XSECURE_CSU_RSA_RAM_EXPO == RamOffset) &&
+				(InstancePtr->EncDec == XSECURE_RSA_SIGN_ENC))
+			{
+				if(0U == TmpIndex )
+				{
+					Data = Xil_Htonl(*WrData);
+				}
+				else
+				{
+					Data = 0x0U;
+				}
+			}
+			else
+			{
+				if(TmpIndex >= InstancePtr->SizeInWords)
+				{
+					Data = 0x0U;
+				}
+				else
+				{
+				/**
+				* The RSA data in Image is in Big Endian.
+				* So reverse it before putting in RSA memory,
+				* becasue RSA h/w expects it in Little endian.
+				*/
+
+				Data = Xil_Htonl(WrData[(InstancePtr->SizeInWords - 1) - TmpIndex]);
+				}
+			}
+			XSecure_WriteReg(InstancePtr->BaseAddress,
+			(XSECURE_CSU_RSA_WR_DATA_0_OFFSET + (Index * 4)),
+							Data);
+		}
+		XSecure_WriteReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_RSA_WR_ADDR_OFFSET,
+				((RamOffset * 22) + DataOffset));
+	}
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function reads back the resulting data from RSA RAM.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Rsa instance.
+ * @param	RdData		Pointer to location where the decrypted data will
+ * 		be written
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+static void XSecure_RsaGetData(XSecure_Rsa *InstancePtr, u32 *RdData)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	u32 Index = 0U;
+	u32 DataOffset = 0U;
+	s32 TmpIndex = 0;
+
+	/* Each of this loop will write 192 bits of data */
+	for (DataOffset = 0U; DataOffset < 22U; DataOffset++)
+	{
+		XSecure_WriteReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_RSA_RD_ADDR_OFFSET,
+				(XSECURE_CSU_RSA_RAM_RES_Y * 22) + DataOffset);
+
+		Index = (DataOffset == 0U) ? 2: 0;
+		for (; Index < 6; Index++)
+		{
+			TmpIndex = (InstancePtr->SizeInWords + 1) - ((DataOffset*6) + Index);
+			if(TmpIndex < 0)
+			{
+				break;
+			}
+			/*
+			 * The Signature digest is compared in Big endian.
+			 * So because RSA h/w results in Little endian,
+			 * reverse it after reading it from RSA memory,
+			 */
+			RdData[TmpIndex] = Xil_Htonl(XSecure_ReadReg(
+						InstancePtr->BaseAddress,
+			(XSECURE_CSU_RSA_RD_DATA_0_OFFSET+ (Index * 4))));
+		}
+	}
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function calculates the MINV value and put it into RSA core registers.
+ *
+ * @param	InstancePtr Pointer to XSeure_Rsa instance
+ *
+ * @return	None
+ *
+ * @note	MINV is the 32-bit value of `-M mod 2**32`,
+ *		where M is LSB 32 bits of the original modulus.
+ *
+ ******************************************************************************/
+
+static void XSecure_RsaMod32Inverse(XSecure_Rsa *InstancePtr)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	/* Calculate the MINV */
+	u8 Count = 0U;
+	u32 *ModPtr = (u32 *)(InstancePtr->Mod);
+	u32 ModVal = Xil_Htonl(ModPtr[InstancePtr->SizeInWords - 1]);
+	u32 Inv = 2U - ModVal;
+
+	for (Count = 0U; Count < 4U; ++Count)
+	{
+		Inv = (Inv * (2U - ( ModVal * Inv ) ) );
+	}
+
+	Inv = -Inv;
+
+	/* Put the value in MINV registers */
+	XSecure_WriteReg(InstancePtr->BaseAddress, XSECURE_CSU_RSA_MINV0_OFFSET,
+						(Inv & 0xFF ));
+	XSecure_WriteReg(InstancePtr->BaseAddress, XSECURE_CSU_RSA_MINV1_OFFSET,
+						((Inv >> 8) & 0xFF ));
+	XSecure_WriteReg(InstancePtr->BaseAddress, XSECURE_CSU_RSA_MINV2_OFFSET,
+						((Inv >> 16) & 0xFF ));
+	XSecure_WriteReg(InstancePtr->BaseAddress, XSECURE_CSU_RSA_MINV3_OFFSET,
+						((Inv >> 24) & 0xFF ));
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function writes all the RSA data used for decryption (Modulus, Exponent)
+ * at the corresponding offsets in RSA RAM.
+ *
+ * @param	InstancePtr 	Pointer to the XSecure_Rsa instance.
+ *
+ * @return	None.
+ *
+ *
+ ******************************************************************************/
+static void XSecure_RsaPutData(XSecure_Rsa *InstancePtr)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	/* Initialize Modular exponentiation */
+	XSecure_RsaWriteMem(InstancePtr, (u32 *)InstancePtr->ModExpo,
+					XSECURE_CSU_RSA_RAM_EXPO);
+
+	/* Initialize Modular. */
+	XSecure_RsaWriteMem(InstancePtr, (u32 *)InstancePtr->Mod,
+					XSECURE_CSU_RSA_RAM_MOD);
+
+	if (InstancePtr->ModExt != NULL) {
+	/* Initialize Modular extension (R*R Mod M) */
+		XSecure_RsaWriteMem(InstancePtr, (u32 *)InstancePtr->ModExt,
+					XSECURE_CSU_RSA_RAM_RES_Y);
+	}
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function handles the RSA decryption from end to end.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Rsa instance.
+ * @param	EncText		Pointer to the buffer which contains the input
+ *		data to be decrypted.
+ * @param	Result		Pointer to the buffer where resultant decrypted
+ *		data to be stored		.
+  *
+ * @return	XST_SUCCESS if decryption was successful.
+ *
+ * @note	This API will be deprecated soon. Instead of this please use
+ *		XSecure_RsaPublicEncrypt() API. This API can only support 4096
+ *		key Size.
+ *
+ ******************************************************************************/
+s32 XSecure_RsaDecrypt(XSecure_Rsa *InstancePtr, u8 *EncText, u8 *Result)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Result != NULL);
+
+	volatile u32 Status = 0x0U;
+	s32 ErrorCode = XST_SUCCESS;
+
+	InstancePtr->EncDec = XSECURE_RSA_SIGN_ENC;
+
+	/* Put Modulus, exponent, Mod extension in RSA RAM */
+	XSecure_RsaPutData(InstancePtr);
+
+	/* Initialize Digest */
+	XSecure_RsaWriteMem(InstancePtr, (u32 *)EncText,
+				XSECURE_CSU_RSA_RAM_DIGEST);
+
+	/* Initialize MINV values from Mod. */
+	XSecure_RsaMod32Inverse(InstancePtr);
+
+	/* Start the RSA operation. */
+	if (InstancePtr->ModExt != NULL) {
+		XSecure_WriteReg(InstancePtr->BaseAddress,
+			XSECURE_CSU_RSA_CONTROL_OFFSET,
+			XSECURE_CSU_RSA_CONTROL_MASK);
+	}
+	else {
+		XSecure_WriteReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_RSA_CONTROL_OFFSET,
+		XSECURE_CSU_RSA_CONTROL_4096 + XSECURE_CSU_RSA_CONTROL_EXP);
+	}
+
+	/* Check and wait for status */
+	do
+	{
+		Status = XSecure_ReadReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_RSA_STATUS_OFFSET);
+
+		if(XSECURE_CSU_RSA_STATUS_ERROR ==
+				((u32)Status & XSECURE_CSU_RSA_STATUS_ERROR))
+		{
+			ErrorCode = XST_FAILURE;
+			goto END;
+		}
+	}while(XSECURE_CSU_RSA_STATUS_DONE !=
+				((u32)Status & XSECURE_CSU_RSA_STATUS_DONE));
+
+
+	/* Copy the result */
+	XSecure_RsaGetData(InstancePtr, (u32 *)Result);
+
+END:
+	return ErrorCode;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function verifies the RSA decrypted data provided is either matching
+ *  with the provided expected hash by taking care of PKCS padding.
+ *
+ * @param	Signature	Pointer to the buffer which holds the decrypted
+ *		RSA signature
+ * @param	Hash		Pointer to the buffer which has hash
+ *		calculated on the data to be authenticated.
+ * @param	HashLen		Length of Hash used.
+ *		- For SHA3 it should be 48 bytes
+ *		- For SHA2 it should be 32 bytes
+ *
+ * @return	XST_SUCCESS if decryption was successful.
+ *
+ *
+ ******************************************************************************/
+u32 XSecure_RsaSignVerification(u8 *Signature, u8 *Hash, u32 HashLen)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(Signature != NULL);
+	Xil_AssertNonvoid(Hash != NULL);
+
+	u8 * Tpadding = (u8 *)XNULL;
+	u32 Pad = XSECURE_FSBL_SIG_SIZE - 3U - 19U - HashLen;
+	u8 * PadPtr = Signature;
+	u32 sign_index;
+	u32 Status = XST_SUCCESS;
+
+	/* If Silicon version is not 1.0 then use the latest NIST approved SHA-3
+	 * id for padding
+	 */
+	if (XGetPSVersion_Info() != XPS_VERSION_1)
+	{
+		if(XSECURE_HASH_TYPE_SHA3 == HashLen)
+		{
+			Tpadding = (u8 *)XSecure_Silicon2_TPadSha3;
+		}
+		else
+		{
+			Tpadding = (u8 *)XSecure_Silicon1_TPadSha2;
+		}
+	}
+	else
+	{
+		if(XSECURE_HASH_TYPE_SHA3 == HashLen)
+		{
+			Tpadding = (u8 *)XSecure_Silicon1_TPadSha3;
+		}
+		else
+		{
+			Tpadding = (u8 *)XSecure_Silicon1_TPadSha2;
+		}
+	}
+
+	/*
+	 * Re-Create PKCS#1v1.5 Padding
+	* MSB  ------------------------------------------------------------LSB
+	* 0x0 || 0x1 || 0xFF(for 202 bytes) || 0x0 || T_padding || SHA384 Hash
+	*/
+
+	if (0x00U != *PadPtr)
+	{
+		Status = XST_FAILURE;
+		goto ENDF;
+	}
+	PadPtr++;
+
+	if (0x01U != *PadPtr)
+	{
+		Status = XST_FAILURE;
+		goto ENDF;
+	}
+	PadPtr++;
+
+	for (sign_index = 0U; sign_index < Pad; sign_index++)
+	{
+		if (0xFFU != *PadPtr)
+		{
+			Status = XST_FAILURE;
+			goto ENDF;
+		}
+		PadPtr++;
+	}
+
+	if (0x00U != *PadPtr)
+	{
+		Status = XST_FAILURE;
+		goto ENDF;
+	}
+	PadPtr++;
+
+	for (sign_index = 0U; sign_index < 19U; sign_index++)
+	{
+		if (*PadPtr != Tpadding[sign_index])
+		{
+			Status = XST_FAILURE;
+			goto ENDF;
+		}
+		PadPtr++;
+	}
+
+	for (sign_index = 0U; sign_index < HashLen; sign_index++)
+	{
+		if (*PadPtr != Hash[sign_index])
+		{
+			Status = XST_FAILURE;
+			goto ENDF;
+		}
+		PadPtr++;
+	}
+
+ENDF:
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+* This function handles the RSA signature encryption with public key components
+* provide at XSecure_RsaInitialize() API.
+*
+* @param	InstancePtr	Pointer to the XSecure_Rsa instance.
+* @param	Input		Pointer to the buffer which contains the input
+*		data to be decrypted.
+* @param	Size		Key size in bytes, Input size also should be
+* 		same as Key size mentioned.Inputs supported are
+* 		- XSECURE_RSA_4096_KEY_SIZE and
+* 		- XSECURE_RSA_2048_KEY_SIZE
+* @param	Result		Pointer to the buffer where resultant decrypted
+*		data to be stored		.
+*
+* @return	XST_SUCCESS if encryption was successful.
+*
+* @note		Modulus of API XSecure_RsaInitialize() should also
+* 		be same size of key size mentioned in this API and exponent
+* 		should be 32 bit size.
+*
+******************************************************************************/
+s32 XSecure_RsaPublicEncrypt(XSecure_Rsa *InstancePtr, u8 *Input, u32 Size,
+					u8 *Result)
+{
+	s32 ErrorCode = XST_SUCCESS;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Result != NULL);
+	Xil_AssertNonvoid(Input != NULL);
+	Xil_AssertNonvoid((Size != XSECURE_RSA_4096_KEY_SIZE) ||
+					(Size != XSECURE_RSA_2048_KEY_SIZE));
+
+	/* Setting for RSA signature encryption with public key */
+	InstancePtr->EncDec = XSECURE_RSA_SIGN_ENC;
+	InstancePtr->SizeInWords = Size/4;
+
+	ErrorCode = XSecure_RsaOperation(InstancePtr, Input, Result);
+
+	return ErrorCode;
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+* This function handles the RSA signature decryption with private key components
+* provide at XSecure_RsaInitialize() API.
+*
+* @param	InstancePtr	Pointer to the XSecure_Rsa instance.
+* @param	Input		Pointer to the buffer which contains the input
+*		data to be decrypted.
+* @param	Size		Key size in bytes, Input size also should be same as
+* 		Key size mentioned.
+* 		Inputs supported are XSECURE_RSA_4096_KEY_SIZE and
+* 		XSECURE_RSA_2048_KEY_SIZE*
+* @param	Result		Pointer to the buffer where resultant decrypted
+*		data to be stored		.
+*
+* @return	XST_SUCCESS if decryption was successful.
+*
+* @note		Modulus and Exponent in XSecure_RsaInitialize() API should also
+* 			be same as key size mentioned in this API.
+*
+******************************************************************************/
+s32 XSecure_RsaPrivateDecrypt(XSecure_Rsa *InstancePtr, u8 *Input, u32 Size,
+				u8 *Result)
+{
+	s32 ErrorCode;
+
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Result != NULL);
+	Xil_AssertNonvoid(Input != NULL);
+	Xil_AssertNonvoid((Size != XSECURE_RSA_4096_KEY_SIZE) ||
+			(Size != XSECURE_RSA_2048_KEY_SIZE));
+
+	/* Setting to perform RSA signature decryption with private key */
+	InstancePtr->EncDec = XSECURE_RSA_SIGN_DEC;
+	InstancePtr->SizeInWords = Size/4;
+
+	ErrorCode = XSecure_RsaOperation(InstancePtr, Input, Result);
+
+	return ErrorCode;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+* This function handles the all RSA operations with provided inputs.
+*
+* @param	InstancePtr	Pointer to the XSecure_Rsa instance.
+* @param	Input		Pointer to the buffer which contains the input
+*		data to be decrypted.
+* @param	Result		Pointer to the buffer where resultant decrypted
+*		data to be stored		.
+*
+* @return	XST_SUCCESS on success.
+*
+******************************************************************************/
+static s32 XSecure_RsaOperation(XSecure_Rsa *InstancePtr, u8 *Input,
+							u8 *Result)
+{
+	volatile u32 Status = 0x0U;
+	s32 ErrorCode = XST_SUCCESS;
+	u32 RsaType = XSECURE_CSU_RSA_CONTROL_4096;
+
+	/* Put Modulus, exponent, Mod extension in RSA RAM */
+	XSecure_RsaPutData(InstancePtr);
+
+	/* Initialize Digest */
+	XSecure_RsaWriteMem(InstancePtr, (u32 *)Input,
+				XSECURE_CSU_RSA_RAM_DIGEST);
+
+	/* Initialize MINV values from Mod. */
+	XSecure_RsaMod32Inverse(InstancePtr);
+
+	if (InstancePtr->SizeInWords == XSECURE_RSA_4096_SIZE_WORDS) {
+		RsaType = XSECURE_CSU_RSA_CONTROL_4096;
+	}
+	else if (InstancePtr->SizeInWords == XSECURE_RSA_2048_SIZE_WORDS) {
+		RsaType = XSECURE_CSU_RSA_CONTROL_2048;
+	}
+	/* Start the RSA operation. */
+	if (InstancePtr->ModExt != NULL) {
+		XSecure_WriteReg(InstancePtr->BaseAddress,
+			XSECURE_CSU_RSA_CONTROL_OFFSET,
+			RsaType + XSECURE_CSU_RSA_CONTROL_EXP_PRE);
+	}
+	else {
+		XSecure_WriteReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_RSA_CONTROL_OFFSET,
+				RsaType + XSECURE_CSU_RSA_CONTROL_EXP);
+	}
+
+	/* Check and wait for status */
+	do
+	{
+		Status = XSecure_ReadReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_RSA_STATUS_OFFSET);
+
+		if(XSECURE_CSU_RSA_STATUS_ERROR ==
+				((u32)Status & XSECURE_CSU_RSA_STATUS_ERROR))
+		{
+			ErrorCode = XST_FAILURE;
+			goto END;
+		}
+	}while(XSECURE_CSU_RSA_STATUS_DONE !=
+				((u32)Status & XSECURE_CSU_RSA_STATUS_DONE));
+
+
+	/* Copy the result */
+	XSecure_RsaGetData(InstancePtr, (u32 *)Result);
+
+END:
+	return ErrorCode;
+
+}
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_rsa.h b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_rsa.h
new file mode 100644
index 0000000..0854d3b
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_rsa.h
@@ -0,0 +1,194 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 17 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsecure_rsa.h
+* @addtogroup xsecure_rsa_apis XilSecure RSA APIs
+* @{
+* @cond xsecure_internal
+* This file contains hardware interface related information for RSA device
+*
+* This driver supports the following features:
+*
+* - RSA 4096 based decryption
+* - verification/authentication of decrypted data
+*
+* Initialization & Configuration
+*
+* The Rsa driver instance can be initialized
+* in the following way:
+*
+*   - XSecure_RsaInitialize(XSecure_Rsa *InstancePtr, u8* EncText,
+*					u8 *Mod, u8 *ModExt, u8 *ModExpo)
+*
+* The method used for RSA decryption needs precalculated value off R^2 mod N
+* which is generated by bootgen and is present in the signature along with
+* modulus and exponent.
+*
+* @note
+*	-The format of the public key( modulus, exponent and precalculated
+*	 R^2 mod N should be same as specified by the bootgen
+*
+*	-For matching, PKCS paddding scheme has to be applied in the manner
+*	 specified by the bootgen.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date        Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.0   ba   10/10/14 Initial release
+* 2.2   vns  07/06/17 Added doxygen tags
+*       vns  17/08/17 Added APIs XSecure_RsaPublicEncrypt and
+*                     XSecure_RsaPrivateDecrypt.As per functionality
+*                     XSecure_RsaPublicEncrypt is same as XSecure_RsaDecrypt.
+*
+* 

+*
+* @endcond
+******************************************************************************/
+
+#ifndef XSECURE_RSA_H_
+#define XSECURE_RSA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xsecure_hw.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+#include "xstatus.h"
+#include "xplatform_info.h"
+/************************** Constant Definitions ****************************/
+/** @cond xsecure_internal
+@{
+*/
+
+#define XSECURE_RSA_4096_KEY_SIZE		(4096/8)	/**< RSA 4096 key size */
+#define XSECURE_RSA_2048_KEY_SIZE		(2048/8)	/**< RSA 2048 key size */
+
+#define XSECURE_RSA_4096_SIZE_WORDS		(128)	/**< RSA 4096 Size in words */
+#define XSECURE_RSA_2048_SIZE_WORDS		(64)	/**< RSA 2048 Size in words */
+
+/** @name Control Register
+ *
+ * The Control register (CR) controls the major functions of the device.
+ * It is used to set the function to be implemented by the RSA device in
+ * the next iteration.
+ *
+ * Control Register Bit Definition
+ */
+#define XSECURE_CSU_RSA_CONTROL_2048	(0xA0U) /**< RSA 2048 Length Code */
+#define XSECURE_CSU_RSA_CONTROL_4096	(0xC0U) /**< RSA 4096 Length Code */
+#define XSECURE_CSU_RSA_CONTROL_DCA	(0x08U) /**< Abort Operation */
+#define XSECURE_CSU_RSA_CONTROL_NOP	(0x00U) /**< No Operation */
+#define XSECURE_CSU_RSA_CONTROL_EXP	(0x01U) /**< Exponentiation Opcode */
+#define XSECURE_CSU_RSA_CONTROL_EXP_PRE	(0x05U) /**< Expo. using R*R mod M */
+#define XSECURE_CSU_RSA_CONTROL_MASK	(XSECURE_CSU_RSA_CONTROL_4096 + \
+					XSECURE_CSU_RSA_CONTROL_EXP_PRE)
+/* @} */
+
+/** @name RSA status Register
+ *
+ * The Status Register(SR) indicates the current state of RSA device.
+ *
+ * Status Register Bit Definition
+ */
+#define XSECURE_CSU_RSA_STATUS_DONE		(0x1U) /**< Operation Done */
+#define XSECURE_CSU_RSA_STATUS_BUSY		(0x2U) /**< RSA busy */
+#define XSECURE_CSU_RSA_STATUS_ERROR	(0x4U) /**< Error */
+#define XSECURE_CSU_RSA_STATUS_PROG_CNT	(0xF8U)  /**< Progress Counter */
+/* @}*/
+
+#define XSECURE_CSU_RSA_RAM_EXPO	(0U) /**< bit for RSA RAM Exponent */
+#define XSECURE_CSU_RSA_RAM_MOD		(1U) /**< bit for RSA RAM modulus */
+#define XSECURE_CSU_RSA_RAM_DIGEST	(2U) /**< bit for RSA RAM Digest */
+#define XSECURE_CSU_RSA_RAM_SPAD	(3U) /**< bit for RSA RAM SPAD */
+#define XSECURE_CSU_RSA_RAM_RES_Y	(4U) /**< bit for RSA RAM Result(Y) */
+#define XSECURE_CSU_RSA_RAM_RES_Q	(5U) /**< bit for RSA RAM Result(Q) */
+
+#define XSECURE_CSU_RSA_RAM_WORDS	(6U) /**< Total Locations in RSA RAM */
+
+#define XSECURE_RSA_FAILED		0x1U /**< RSA Failed Error Code */
+
+#define XSECURE_HASH_TYPE_SHA3		(48U) /**< SHA-3 hash size */
+#define XSECURE_HASH_TYPE_SHA2		(32U)/**< SHA-2 hash size */
+#define XSECURE_FSBL_SIG_SIZE		(512U) /**< FSBL signature size */
+
+#define XSECURE_RSA_SIGN_ENC		0U
+#define XSECURE_RSA_SIGN_DEC		1U
+
+/***************************** Type Definitions ******************************/
+/**
+ * The RSA driver instance data structure. A pointer to an instance data
+ * structure is passed around by functions to refer to a specific driver
+ * instance.
+ */
+typedef struct {
+	u32 BaseAddress; /**< Device Base Address */
+	u8* Mod; /**< Modulus */
+	u8* ModExt; /**< Precalc. R sq. mod N */
+	u8* ModExpo; /**< Exponent */
+	u8 EncDec; /**< 0 for signature verification and 1 for generation */
+	u32 SizeInWords;/** RSA key size in words */
+} XSecure_Rsa;
+/**
+@}
+@endcond */
+/***************************** Function Prototypes ***************************/
+
+/* Initialization */
+s32  XSecure_RsaInitialize(XSecure_Rsa *InstancePtr, u8 *Mod, u8 *ModExt,
+				u8 *ModExpo);
+
+/* RSA Decryption */
+s32 XSecure_RsaDecrypt(XSecure_Rsa *InstancePtr, u8* EncText, u8* Result);
+
+/* RSA Signature Validation, assuming PKCS padding */
+u32 XSecure_RsaSignVerification(u8 *Signature, u8 *Hash, u32 HashLen);
+
+/* XSecure_RsaPublicEncrypt performs same as XSecure_RsaDecrypt API */
+s32 XSecure_RsaPublicEncrypt(XSecure_Rsa *InstancePtr, u8 *Input, u32 Size,
+								u8 *Result);
+
+s32 XSecure_RsaPrivateDecrypt(XSecure_Rsa *InstancePtr, u8 *Input, u32 Size,
+								u8 *Result);
+
+#ifdef __cplusplus
+extern "C" }
+#endif
+
+#endif /* XSECURE_RSA_H_ */
+/* @} */
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_sha.c b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_sha.c
new file mode 100644
index 0000000..56617c9
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_sha.c
@@ -0,0 +1,396 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 18 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsecure_sha.c
+*
+* This file contains the implementation of the interface functions for SHA
+* driver. Refer to the header file xsecure_sha.h for more detailed information.
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  ba   08/10/14 Initial release
+* 2.0   vns  01/28/17 Added API to read SHA3 hash.
+* 2.2   vns  07/06/17 Added doxygen tags
+* 3.0   vns  01/23/18 Added NIST SHA3 support.
+*                     Added SSS configuration before every CSU DMA transfer
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+#include "xsecure_sha.h"
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Definitions *****************************/
+
+/****************************************************************************/
+/**
+* @brief
+* This function initializes a specific Xsecure_Sha3 instance so that it is
+* ready to be used.
+*
+* @param	InstancePtr 	Pointer to the XSecure_Sha3 instance.
+* @param	CsuDmaPtr 	Pointer to the XCsuDma instance.
+*
+* @return	XST_SUCCESS if initialization was successful
+*
+* @note		The base address is initialized directly with value from
+* 		xsecure_hw.h
+*		By default uses NIST SHA3 padding, to change to KECCAK
+*		padding call XSecure_Sha3PadSelection() after
+*		XSecure_Sha3Initialize().
+*
+*****************************************************************************/
+
+s32 XSecure_Sha3Initialize(XSecure_Sha3 *InstancePtr, XCsuDma* CsuDmaPtr)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(CsuDmaPtr != NULL);
+
+	InstancePtr->BaseAddress = XSECURE_CSU_SHA3_BASE;
+	InstancePtr->Sha3Len = 0U;
+	InstancePtr->CsuDmaPtr = CsuDmaPtr;
+	InstancePtr->Sha3PadType = XSECURE_CSU_NIST_SHA3;
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function provides an option to select the SHA-3 padding type to be used
+ * while calculating the hash.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Sha3 instance.
+ * @param	Sha3Type 	Type of the sha3 padding to be used.
+ * 			 - For NIST SHA-3 padding - XSECURE_CSU_NIST_SHA3
+ * 			 - For KECCAK SHA-3 padding - XSECURE_CSU_KECCAK_SHA3
+ *
+ * @return	By default provides support for NIST SHA-3, if wants to change for
+ * 			Keccak SHA-3 this function should be called after
+ * 			XSecure_Sha3Initialize()
+ *
+ ******************************************************************************/
+ s32 XSecure_Sha3PadSelection(XSecure_Sha3 *InstancePtr,
+		 XSecure_Sha3PadType Sha3Type)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Sha3Type <= XSECURE_CSU_KECCAK_SHA3);
+
+	/* If operation is in between can't be modified */
+	if (InstancePtr->Sha3Len != 0x00U) {
+		return XST_FAILURE;
+	}
+	InstancePtr->Sha3PadType = Sha3Type;
+
+	return XST_SUCCESS;
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function generates padding for the SHA-3 engine.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Sha3 instance.
+ * @param	Dst 	Pointer to location where padding is to be applied.
+ * @param	MsgLen	Length of padding in bytes.
+ *
+ * @return	None
+ *
+ ******************************************************************************/
+void XSecure_Sha3Padd(XSecure_Sha3 *InstancePtr, u8 *Dst, u32 MsgLen)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	memset(Dst, 0, MsgLen);
+	Dst[0] = 0x1U;
+	Dst[MsgLen -1U] |= 0x80U;
+}
+
+/*****************************************************************************/
+/**
+ * Generate padding for the NIST SHA-3
+ *
+ * @param	InstancePtr is a pointer to the XSecure_Sha3 instance.
+ * @param	Dst is the pointer to location where padding is to be applied
+ * @param	MsgLen is the length of padding in bytes
+ *
+ * @return	None
+ *
+ * @note	None
+ *
+ ******************************************************************************/
+static void XSecure_NistSha3Padd(XSecure_Sha3 *InstancePtr, u8 *Dst, u32 MsgLen)
+{
+	/* Assert validates the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	memset(Dst, 0, MsgLen);
+	Dst[0] =  0x6;
+	Dst[MsgLen -1U] |= 0x80U;
+}
+/*****************************************************************************/
+/**
+ * @brief
+ * This function configures the SSS and starts the SHA-3 engine.
+ *
+ * @param	InstancePtr 	Pointer to the XSecure_Sha3 instance.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void XSecure_Sha3Start(XSecure_Sha3 *InstancePtr)
+{
+	/* Asserts validate the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	InstancePtr->Sha3Len = 0U;
+
+	/* Reset SHA3 engine. */
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+			XSECURE_CSU_SHA3_RESET_OFFSET,
+			XSECURE_CSU_SHA3_RESET_RESET);
+
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_SHA3_RESET_OFFSET, 0U);
+
+	/* Start SHA3 engine. */
+	XSecure_WriteReg(InstancePtr->BaseAddress,
+			XSECURE_CSU_SHA3_START_OFFSET,
+			XSECURE_CSU_SHA3_START_START);
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function updates hash for new input data block.
+ *
+ * @param	InstancePtr 	Pointer to the XSecure_Sha3 instance.
+ * @param	Data 		Pointer to the input data for hashing.
+ * @param	Size 		Size of the input data in bytes.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void XSecure_Sha3Update(XSecure_Sha3 *InstancePtr, const u8 *Data,
+						const u32 Size)
+{
+	/* Asserts validate the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Size != (u32)0x00U);
+
+	InstancePtr->Sha3Len += Size;
+
+	/* Configure the SSS for SHA3 hashing. */
+	XSecure_SssSetup(XSecure_SssInputSha3(XSECURE_CSU_SSS_SRC_SRC_DMA));
+
+	XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+					(UINTPTR)Data, (u32)Size/4, 0);
+
+	/* Checking the CSU DMA done bit should be enough. */
+	XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
+
+	/* Acknowledge the transfer has completed */
+	XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+						XCSUDMA_IXR_DONE_MASK);
+}
+
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function waits till SHA3 completes its action.
+ *
+ * @param	InstancePtr 	Pointer to the XSecure_Sha3 instance.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void XSecure_Sha3WaitForDone(XSecure_Sha3 *InstancePtr)
+{
+	/* Asserts validate the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	volatile u32 Status;
+
+	do
+	{
+		Status = XSecure_ReadReg(InstancePtr->BaseAddress,
+					XSECURE_CSU_SHA3_DONE_OFFSET);
+	} while (XSECURE_CSU_SHA3_DONE_DONE !=
+			((u32)Status & XSECURE_CSU_SHA3_DONE_DONE));
+}
+
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function sends the last data and padding when blocksize is not
+ * multiple of 104 bytes.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Sha3 instance.
+ * @param	Hash		Pointer to location where resulting hash will
+ *		be written
+ *
+ * @return	None
+ *
+ *
+ *****************************************************************************/
+void XSecure_Sha3Finish(XSecure_Sha3 *InstancePtr, u8 *Hash)
+{
+	/* Asserts validate the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Hash != NULL);
+
+	u32 *HashPtr = (u32 *)Hash;
+	u32 PartialLen = InstancePtr->Sha3Len % XSECURE_SHA3_BLOCK_LEN;
+	u8 XSecure_RsaSha3Array[512] = {0U};
+
+	PartialLen = (PartialLen == 0U)?(XSECURE_SHA3_BLOCK_LEN) :
+		(XSECURE_SHA3_BLOCK_LEN - PartialLen);
+
+	if (InstancePtr->Sha3PadType == XSECURE_CSU_NIST_SHA3) {
+		XSecure_NistSha3Padd(InstancePtr, XSecure_RsaSha3Array,
+						PartialLen);
+	}
+	else {
+		XSecure_Sha3Padd(InstancePtr, XSecure_RsaSha3Array,
+						PartialLen);
+	}
+
+	/* Configure the SSS for SHA3 hashing. */
+	XSecure_SssSetup(XSecure_SssInputSha3(XSECURE_CSU_SSS_SRC_SRC_DMA));
+
+	XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+				(UINTPTR)XSecure_RsaSha3Array, PartialLen/4, 1);
+
+	/* Check for CSU DMA done bit */
+	XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
+
+	/* Acknowledge the transfer has completed */
+	XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
+						XCSUDMA_IXR_DONE_MASK);
+
+	/* Check the SHA3 DONE bit. */
+	XSecure_Sha3WaitForDone(InstancePtr);
+
+	/* If requested, read out the Hash in reverse order.  */
+	if (Hash)
+	{
+		u32 Index = 0U;
+		u32 Val = 0U;
+		for (Index=0U; Index < 12U; Index++)
+		{
+			Val = XSecure_ReadReg(InstancePtr->BaseAddress,
+				XSECURE_CSU_SHA3_DIGEST_0_OFFSET + (Index * 4));
+			HashPtr[11U - Index] = Val;
+		}
+	}
+
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function calculates the SHA-3 digest on the given input data.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Sha3 instance.
+ * @param	In		Pointer to the input data for hashing
+ * @param	Size		Size of the input data
+ * @param	Out		Pointer to location where resulting hash will
+ *		be written.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void XSecure_Sha3Digest(XSecure_Sha3 *InstancePtr, const u8 *In, const u32 Size,
+								u8 *Out)
+{
+	/* Asserts validate the input arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Size != (u32)0x00U);
+	Xil_AssertVoid(Out != NULL);
+
+	XSecure_Sha3Start(InstancePtr);
+	XSecure_Sha3Update(InstancePtr, In, Size);
+	XSecure_Sha3Finish(InstancePtr, Out);
+}
+
+/*****************************************************************************/
+/**
+ * @brief
+ * Reads the SHA3 hash of the data. It can be called intermediately of updates
+ * also to read hashs.
+ *
+ * @param	InstancePtr	Pointer to the XSecure_Sha3 instance.
+ * @param	Hash		Pointer to a buffer in which read hash will be
+ *		stored.
+ *
+ * @return	None
+ *
+ * @note	None
+ *
+ ******************************************************************************/
+void XSecure_Sha3_ReadHash(XSecure_Sha3 *InstancePtr, u8 *Hash)
+{
+	u32 Index = 0U;
+	u32 Val = 0U;
+	u32 *HashPtr = (u32 *)Hash;
+
+	for (Index=0U; Index < 12U; Index++)
+	{
+		Val = XSecure_ReadReg(InstancePtr->BaseAddress,
+			XSECURE_CSU_SHA3_DIGEST_0_OFFSET + (Index * 4));
+		HashPtr[11U - Index] = Val;
+	}
+}
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_sha.h b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_sha.h
new file mode 100644
index 0000000..b2f98b2
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_sha.h
@@ -0,0 +1,150 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 18 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsecure_sha.h
+* @addtogroup xsecure_sha3_apis SHA-3
+* @{
+* @cond xsecure_internal
+* This file Contains the function prototypes, defines and macros for
+* the SHA-384 hardware module.
+*
+* This driver supports the following features:
+*
+* - SHA-3 hash calculation
+*
+* Initialization & Configuration
+*
+* The SHA-3 driver instance can be initialized
+* in the following way:
+*
+*   - XSecure_Sha3Initialize(XSecure_Sha3 *InstancePtr, XCsuDma *CsuDmaPtr)
+*
+* A pointer to CsuDma instance has to be passed in initialization as CSU
+* DMA will be used for data transfers to SHA module.
+*
+*
+* @note
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date        Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  ba   11/05/14 Initial release
+* 2.0   vns  01/28/17 Added API to read SHA3 hash.
+* 2.2   vns  07/06/17 Added doxygen tags
+* 3.0   vns  01/23/18 Added NIST SHA3 support.
+*
+* 

+*
+* @note
+* @endcond
+*
+******************************************************************************/
+#ifndef XSECURE_SHA_H
+#define XSECURE_SHA_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xsecure_hw.h"
+#include "xcsudma.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions ****************************/
+/** @cond xsecure_internal
+@{
+*/
+
+/**
+* CSU SHA3 Memory Map
+*/
+#define XSECURE_CSU_SHA3_START_START	(1U << 0) /**< SHA Start Message */
+
+#define XSECURE_CSU_SHA3_RESET_RESET	(1U << 0) /**< SHA Reset Value */
+
+#define XSECURE_CSU_SHA3_DONE_DONE	(1U << 0) /**< SHA Done */
+
+#define XSECURE_SHA3_BLOCK_LEN		(104U) /**< SHA min block length */
+
+#define XSECURE_SHA3_LAST_PACKET	(0x1U) /**< Last Data Packet */
+
+/***************************** Type Definitions******************************/
+
+/* SHA3 type selection */
+typedef enum {
+	XSECURE_CSU_NIST_SHA3, /**< NIST sha3 */
+	XSECURE_CSU_KECCAK_SHA3 /**< Keccak sha3 */
+}XSecure_Sha3PadType;
+
+/**
+ * The SHA-3 driver instance data structure. A pointer to an instance data
+ * structure is passed around by functions to refer to a specific driver
+ * instance.
+ */
+typedef struct {
+	u32 BaseAddress;  /**< Device Base Address */
+	XCsuDma *CsuDmaPtr; /**< Pointer to CSU DMA Instance */
+	u32 Sha3Len; /**< SHA3 Input Length */
+	XSecure_Sha3PadType Sha3PadType; /** Selection for Sha3 */
+} XSecure_Sha3;
+/**
+@}
+@endcond */
+/***************************** Function Prototypes ***************************/
+/* Initialization */
+s32 XSecure_Sha3Initialize(XSecure_Sha3 *InstancePtr, XCsuDma *CsuDmaPtr);
+
+void XSecure_Sha3Start(XSecure_Sha3 *InstancePtr);
+
+/* Data Transfer */
+void XSecure_Sha3Update(XSecure_Sha3 *InstancePtr, const u8 *Data,
+						const u32 Size);
+void XSecure_Sha3Finish(XSecure_Sha3 *InstancePtr, u8 *Hash);
+
+/* Complete SHA digest calculation */
+void XSecure_Sha3Digest(XSecure_Sha3 *InstancePtr, const u8 *In,
+						const u32 Size, u8 *Out);
+void XSecure_Sha3_ReadHash(XSecure_Sha3 *InstancePtr, u8 *Hash);
+s32 XSecure_Sha3PadSelection(XSecure_Sha3 *InstancePtr,
+		XSecure_Sha3PadType Sha3Type);
+
+#ifdef __cplusplus
+extern "C" }
+#endif
+
+#endif /** XSECURE_SHA_H */
+/* @} */
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_sha2.h b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_sha2.h
new file mode 100644
index 0000000..79a2afc
--- /dev/null
+++ b/src/Xilinx/libsrc/xilsecure_v3_0/src/xsecure_sha2.h
@@ -0,0 +1,171 @@
+/******************************************************************************
+*
+* Copyright (C) 2016 - 17 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xsecure_sha2.h
+* @addtogroup xsecure_sha2_apis XilSecure SHA2 APIs
+* @{
+* @cond xsecure_internal
+*
+* This file contains the RSA algorithm functions
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver	Who	Date		Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.2   vns  23/08/16 First release
+* 2.2   vns  07/06/16 Added doxygen tags
+*
+* 

+*
+* @note
+* @endcond
+******************************************************************************/
+#ifndef ___XSECURE_H___
+#define ___XSECURE_H___
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/***************************** Include Files *********************************/
+/** @cond xsecure_internal
+@{
+*/
+#define SHA_BLKSIZE		512
+#define SHA_BLKBYTES	(SHA_BLKSIZE/8)
+#define SHA_BLKWORDS	(SHA_BLKBYTES/4)
+
+#define SHA_VALSIZE		256
+#define SHA_VALBYTES	(SHA_VALSIZE/8)
+#define SHA_VALWORDS	(SHA_VALBYTES/4)
+
+/*
+ * SHA-256 context structure
+ * Includes SHA-256 state, coalescing buffer to collect the processed strings, and
+ * total byte length counter (used both to manage the buffer and for padding)
+ */
+typedef struct
+{
+	unsigned int state[8];
+	unsigned char buffer[SHA_BLKBYTES];
+	unsigned long long bytes;
+} sha2_context;
+/** @}
+@endcond */
+/*
+ * SHA-256 user interfaces
+ */
+/*****************************************************************************/
+/**
+ * @brief
+ * This function calculates the hash for the input data using SHA-256
+ * algorithm. This function internally calls the sha2_init, updates and
+ * finishes functions and updates the result.
+ *
+ * @param   	In 	Char pointer which contains the input data.
+ * @param	Size 	Length of the input data
+ * @param	Out 	Pointer to location where resulting hash will be
+ *		written.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void sha_256(const unsigned char *in, const unsigned int size, unsigned char *out);
+/*****************************************************************************/
+/**
+ * @brief
+ * This function initializes the SHA2 context.
+ *
+ * @param  	ctx 	Pointer to sha2_context structure that stores status and
+ *			buffer.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void sha2_starts(sha2_context *ctx);
+/*****************************************************************************/
+/**
+ * @brief
+ * This function adds the input data to SHA256 calculation.
+ *
+ * @param   	ctx 	Pointer to sha2_context structure that stores status and
+ *			buffer.
+ * @param	input 	Pointer to the data to add.
+ * @param	Out 	Length of the input data.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void sha2_update(sha2_context *ctx, unsigned char* input, unsigned int ilen);
+/*****************************************************************************/
+/**
+ * @brief
+ * This function finishes the SHA calculation.
+ *
+ * @param   	ctx 	Pointer to sha2_context structure that stores status and
+ * 			buffer.
+ * @param	output 	Pointer to the calculated hash data.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void sha2_finish(sha2_context *ctx, unsigned char* output);
+
+/*****************************************************************************/
+/**
+ * @brief
+ * This function reads the SHA2 hash, it can be called intermediately of
+ * updates to read the SHA2 hash.
+ *
+ * @param   	ctx 	Pointer to sha2_context structure that stores status and
+ * 			buffer.
+ * @param	output 	Pointer to the calculated hash data.
+ *
+ * @return	None
+ *
+ *
+ ******************************************************************************/
+void sha2_hash(sha2_context *ctx, unsigned char *output);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ___XSECURE_H___ */
+/** @} */
\ No newline at end of file
diff --git a/src/Xilinx/libsrc/zdma_v1_5/src/Makefile b/src/Xilinx/libsrc/zdma_v1_5/src/Makefile
new file mode 100644
index 0000000..9cd3725
--- /dev/null
+++ b/src/Xilinx/libsrc/zdma_v1_5/src/Makefile
@@ -0,0 +1,40 @@
+COMPILER=
+ARCHIVER=
+CP=cp
+COMPILER_FLAGS=
+EXTRA_COMPILER_FLAGS=
+LIB=libxil.a
+
+CC_FLAGS = $(COMPILER_FLAGS)
+ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
+
+RELEASEDIR=../../../lib
+INCLUDEDIR=../../../include
+INCLUDES=-I./. -I${INCLUDEDIR}
+
+OUTS = *.o
+
+LIBSOURCES:=*.c
+INCLUDEFILES:=*.h
+
+OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))
+
+libs: banner zdma_libs clean
+
+%.o: %.c
+	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
+
+banner:
+	echo "Compiling zdma"
+
+zdma_libs: ${OBJECTS}
+	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
+
+.PHONY: include
+include: zdma_includes
+
+zdma_includes:
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OBJECTS}
diff --git a/src/Xilinx/libsrc/zdma_v1_5/src/xzdma.c b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma.c
new file mode 100644
index 0000000..8cad941
--- /dev/null
+++ b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma.c
@@ -0,0 +1,1289 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xzdma.c
+* @addtogroup zdma_v1_5
+* @{
+*
+* This file contains the implementation of the interface functions for ZDMA
+* driver. Refer to the header file xzdma.h for more detailed information.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ------------------------------------------------------
+* 1.0   vns     2/27/15  First release
+*       vns    16/10/15  Corrected Destination descriptor addresss calculation
+*                        in XZDma_CreateBDList API
+* 1.1   vns    05/11/15  Modified XZDma_SetMode to return XST_FAILURE on
+*                        selecting DMA mode other than normal mode in
+*                        scatter gather mode data transfer and corrected
+*                        XZDma_SetChDataConfig API to set over fetch and
+*                        src issue parameters correctly.
+* 1.3   mus    08/14/17  Add CCI support for A53 in EL1 NS
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xzdma.h"
+
+/************************** Function Prototypes ******************************/
+
+static void StubCallBack(void *CallBackRef, u32 Mask);
+static void StubDoneCallBack(void *CallBackRef);
+static void XZDma_SimpleMode(XZDma *InstancePtr, XZDma_Transfer *Data);
+static void XZDma_ScatterGather(XZDma *InstancePtr, XZDma_Transfer *Data,
+								u32 Num);
+static void XZDma_LinearMode(XZDma *InstancePtr, XZDma_Transfer *Data,
+	XZDma_LiDscr *SrcDscrPtr,XZDma_LiDscr *DstDscrPtr, u8 IsLast);
+static void XZDma_ConfigLinear(XZDma_LiDscr *DscrPtr, u64 Addr, u32 Size,
+								u32 CtrlValue);
+static void XZDma_LinkedListMode(XZDma *InstancePtr, XZDma_Transfer *Data,
+	XZDma_LlDscr *SrcDscrPtr,XZDma_LlDscr *DstDscrPtr, u8 IsLast);
+static void XZDma_ConfigLinkedList(XZDma_LlDscr *DscrPtr, u64 Addr, u32 Size,
+					u32 CtrlValue, u64 NextDscrAddr);
+static void XZDma_Enable(XZDma *InstancePtr);
+static void XZDma_GetConfigurations(XZDma *InstancePtr);
+
+/************************** Function Definitions *****************************/
+
+/*****************************************************************************/
+/**
+*
+* This function initializes an ZDMA core. This function must be called
+* prior to using an ZDMA core. Initialization of an ZDMA includes setting
+* up the instance data and ensuring the hardware is in a quiescent state and
+* resets all the hardware configurations.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	CfgPtr is a reference to a structure containing information
+*		about a specific XZDma instance.
+* @param	EffectiveAddr is the device base address in the virtual memory
+*		address space. The caller is responsible for keeping the
+*		address mapping from EffectiveAddr to the device physical
+*		base address unchanged once this function is invoked.
+*		Unexpected errors may occur if the address mapping changes
+*		after this function is called. If address translation is not
+*		used, pass in the physical address instead.
+*
+* @return
+*		- XST_SUCCESS if initialization was successful.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XZDma_CfgInitialize(XZDma *InstancePtr, XZDma_Config *CfgPtr,
+			u32 EffectiveAddr)
+{
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(CfgPtr != NULL);
+	Xil_AssertNonvoid(EffectiveAddr != ((u32)0x00));
+
+	InstancePtr->Config.BaseAddress = CfgPtr->BaseAddress;
+	InstancePtr->Config.DeviceId = CfgPtr->DeviceId;
+	InstancePtr->Config.DmaType = CfgPtr->DmaType;
+	InstancePtr->Config.IsCacheCoherent = CfgPtr->IsCacheCoherent;
+
+	InstancePtr->Config.BaseAddress = EffectiveAddr;
+
+	InstancePtr->IsReady = (u32)(XIL_COMPONENT_IS_READY);
+
+	InstancePtr->IsSgDma = FALSE;
+	InstancePtr->Mode = XZDMA_NORMAL_MODE;
+	InstancePtr->IntrMask = 0x00U;
+	InstancePtr->ChannelState = XZDMA_IDLE;
+
+	/*
+	 * Set all handlers to stub values, let user configure this
+	 * data later
+	 */
+	InstancePtr->DoneHandler =
+				(XZDma_DoneHandler)((void *)StubDoneCallBack);
+	InstancePtr->ErrorHandler =
+				(XZDma_ErrorHandler)((void *)StubCallBack);
+
+	XZDma_Reset(InstancePtr);
+	XZDma_GetConfigurations(InstancePtr);
+
+	return (XST_SUCCESS);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the pointer type and mode in which ZDMA needs to transfer
+* the data.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	IsSgDma is a variable which specifies whether transfer has to
+*		to be done in scatter gather mode or simple mode.
+*		- TRUE  - Scatter gather pointer type
+*		- FALSE - Simple pointer type
+* @param	Mode is the type of the mode in which data has to be initiated
+*		- XZDMA_NORMAL_MODE   - Normal data transfer from source to
+*					destination (Valid for both Scatter
+*					gather and simple types)
+*		- XZDMA_WRONLY_MODE  - Write only mode (Valid only for Simple)
+*		- XZDMA_RDONLY_MODE  - Read only mode (Valid only for Simple)
+*
+* @return
+*		- XST_SUCCESS - If mode has been set successfully.
+*		- XST_FAILURE - If mode has not been set.
+*
+* @note		Mode cannot be changed while ZDMA is not in IDLE state.
+*
+******************************************************************************/
+s32 XZDma_SetMode(XZDma *InstancePtr, u8 IsSgDma, XZDma_Mode Mode)
+{
+	u32 Data;
+	s32 Status;
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((IsSgDma == TRUE) || (IsSgDma == FALSE));
+	Xil_AssertNonvoid(Mode <= XZDMA_RDONLY_MODE);
+
+	if (InstancePtr->ChannelState != XZDMA_IDLE) {
+		Status = XST_FAILURE;
+		goto End;
+	}
+	else {
+		Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
+						XZDMA_CH_CTRL0_OFFSET);
+		/* Simple mode */
+		if (IsSgDma != TRUE) {
+			Data = (Data & (~XZDMA_CTRL0_POINT_TYPE_MASK));
+			if (Mode == XZDMA_NORMAL_MODE) {
+				Data &= (~XZDMA_CTRL0_MODE_MASK);
+			}
+			else if (Mode == XZDMA_WRONLY_MODE) {
+				Data |= XZDMA_CTRL0_WRONLY_MASK;
+			}
+			else {
+				Data |= XZDMA_CTRL0_RDONLY_MASK;
+			}
+			XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+						XZDMA_CH_CTRL0_OFFSET, Data);
+			InstancePtr->IsSgDma = FALSE;
+			InstancePtr->Mode = Mode;
+		}
+
+		else {
+			if (Mode != XZDMA_NORMAL_MODE) {
+				Status = XST_FAILURE;
+				goto End;
+			}
+			else {
+				Data |= (XZDMA_CTRL0_POINT_TYPE_MASK);
+				Data &= ~(XZDMA_CTRL0_MODE_MASK);
+				XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+						XZDMA_CH_CTRL0_OFFSET, Data);
+
+				InstancePtr->IsSgDma = TRUE;
+				InstancePtr->Mode = Mode;
+			}
+		}
+		Status = XST_SUCCESS;
+	}
+
+End:
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the descriptor type and descriptor pointer's start address
+* of both source and destination based on the memory allocated by user and also
+* calculates no of descriptors(BDs) can be created in the allocated memory.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	TypeOfDscr is a variable which specifies descriptor type
+*		whether Linear or linked list type of descriptor.
+*		- XZDMA_LINEAR    - Linear type of descriptor.
+*		- XZDMA_LINKEDLIST- Linked list type of descriptor.
+* @param	Dscr_MemPtr is a pointer to the allocated memory for creating
+*		descriptors. It Should be aligned to 64 bytes.
+*
+* @param	NoOfBytes specifies the number of bytes allocated for
+*		descriptors
+*
+* @return	The Count of the descriptors can be created.
+*
+* @note		User should allocate the memory for descriptors which should
+*		be capable of how many transfers he wish to do in one start.
+*		For Linear mode each descriptor needs 128 bit memory so for
+*		one data transfer it requires 2*128 = 256 bits i.e. 32 bytes
+*		Similarly for Linked list mode for each descriptor it needs
+*		256 bit, so for one data transfer it require 2*256 = 512 bits
+*		i.e. 64 bytes.
+*
+******************************************************************************/
+u32 XZDma_CreateBDList(XZDma *InstancePtr, XZDma_DscrType TypeOfDscr,
+					UINTPTR Dscr_MemPtr, u32 NoOfBytes)
+{
+	u32 Size;
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid((TypeOfDscr == XZDMA_LINEAR) ||
+					(TypeOfDscr == XZDMA_LINKEDLIST));
+	Xil_AssertNonvoid(Dscr_MemPtr != 0x00);
+	Xil_AssertNonvoid(NoOfBytes != 0x00U);
+
+	InstancePtr->Descriptor.DscrType = TypeOfDscr;
+
+	if (TypeOfDscr == XZDMA_LINEAR) {
+		Size = sizeof(XZDma_LiDscr);
+	}
+	else {
+		Size = sizeof(XZDma_LlDscr);
+	}
+	InstancePtr->Descriptor.DscrCount =
+						(NoOfBytes >> 1) / Size;
+	InstancePtr->Descriptor.SrcDscrPtr = (void *)Dscr_MemPtr;
+	InstancePtr->Descriptor.DstDscrPtr =
+			(void *)(Dscr_MemPtr + (Size * InstancePtr->Descriptor.DscrCount));
+
+	if (!InstancePtr->Config.IsCacheCoherent)
+	Xil_DCacheInvalidateRange((INTPTR)Dscr_MemPtr, NoOfBytes);
+
+	return (InstancePtr->Descriptor.DscrCount);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the data attributes and control configurations of a
+* ZDMA core based on the inputs provided.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Configure is a pointer to the XZDma_ChDataConfig structure
+*		which has all the configuration fields.
+*		The fields of the structure are:
+*		- OverFetch - Allows over fetch or not
+*			- 0 - Not allowed to over-fetch on SRC
+*			- 1 - Allowed to over-fetch on SRC
+*		- SrcIssue  - Outstanding transaction on SRC
+*			- Range is 1 to 32
+*		- SrcBurstType - Burst Type for SRC AXI transaction
+*			- XZDMA_FIXED_BURST - Fixed burst
+*			- XZDMA_INCR_BURST  - Incremental burst
+*		- SrcBurstLen - AXI Length for Data Read.
+*			- Range of values is (1,2,4,8,16).
+*		- DstBurstType - Burst Type for SRC AXI transaction
+*			- XZDMA_FIXED_BURST - Fixed burst
+*			- XZDMA_INCR_BURST - Incremental burst
+*		- DstBurstLen     - AXI Length for Data write.
+*			- Range of values is (1,2,4,8,16).
+*		- SrcCache - AXI cache bits for Data read
+*		- SrcQos - Configurable QoS bits for AXI Data read
+*		- DstCache - AXI cache bits for Data write
+*		- DstQos - configurable QoS bits for AXI Data write
+*
+* @return
+* 		- XST_FAILURE  If ZDMA Core is not in Idle state and
+* 		- XST_SUCCESS If Configurations are made successfully
+*
+* @note
+* 		- These configurations will last till we modify or Reset
+*		  by XZDma_Reset(XZDma *InstancePtr).
+* 		- Configurations should be modified only when ZDMA channel
+* 		  is IDLE this can be confirmed by using
+*		  XZDma_ChannelState(XZDma *InstancePtr) API.
+*
+******************************************************************************/
+s32 XZDma_SetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure)
+{
+	u32 Data;
+	s32 Status;
+
+	/* Verify arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Configure != NULL);
+
+	if (InstancePtr->ChannelState != XZDMA_IDLE) {
+		Status = XST_FAILURE;
+	}
+	else {
+		InstancePtr->DataConfig.DstBurstType = Configure->DstBurstType;
+		InstancePtr->DataConfig.DstBurstLen = Configure->DstBurstLen;
+		InstancePtr->DataConfig.SrcBurstType = Configure->SrcBurstType;
+		InstancePtr->DataConfig.SrcBurstLen = Configure->SrcBurstLen;
+		InstancePtr->DataConfig.OverFetch = Configure->OverFetch;
+		InstancePtr->DataConfig.SrcIssue = Configure->SrcIssue;
+		InstancePtr->DataConfig.SrcCache = Configure->SrcCache;
+		InstancePtr->DataConfig.SrcQos = Configure->SrcQos;
+		InstancePtr->DataConfig.DstCache = Configure->DstCache;
+		InstancePtr->DataConfig.DstQos = Configure->DstQos;
+
+		/* Setting over fetch */
+		Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
+				XZDMA_CH_CTRL0_OFFSET) & (~XZDMA_CTRL0_OVR_FETCH_MASK);
+
+		Data |= (((u32)(Configure->OverFetch) <<
+				XZDMA_CTRL0_OVR_FETCH_SHIFT) &
+					XZDMA_CTRL0_OVR_FETCH_MASK);
+
+		XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+					XZDMA_CH_CTRL0_OFFSET, Data);
+
+		/* Setting source issue */
+		Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
+						XZDMA_CH_CTRL1_OFFSET) & (~XZDMA_CTRL1_SRC_ISSUE_MASK);
+		Data |= (u32)(Configure->SrcIssue & XZDMA_CTRL1_SRC_ISSUE_MASK);
+
+		XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+						XZDMA_CH_CTRL1_OFFSET, Data);
+
+		/* Setting Burst length and burst type */
+		Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
+						XZDMA_CH_DATA_ATTR_OFFSET);
+		Data = (Data & (~(XZDMA_DATA_ATTR_ARBURST_MASK |
+				 XZDMA_DATA_ATTR_ARLEN_MASK |
+				 XZDMA_DATA_ATTR_AWBURST_MASK |
+				 XZDMA_DATA_ATTR_AWLEN_MASK |
+				 XZDMA_DATA_ATTR_ARCACHE_MASK |
+				 XZDMA_DATA_ATTR_AWCACHE_MASK |
+				 XZDMA_DATA_ATTR_AWQOS_MASK |
+				 XZDMA_DATA_ATTR_ARQOS_MASK)));
+
+		Data |= ((((u32)(Configure->SrcBurstType) <<
+				XZDMA_DATA_ATTR_ARBURST_SHIFT) &
+				XZDMA_DATA_ATTR_ARBURST_MASK) |
+				(((u32)(Configure->SrcCache) <<
+				XZDMA_DATA_ATTR_ARCACHE_SHIFT) &
+				XZDMA_DATA_ATTR_ARCACHE_MASK) |
+				(((u32)(Configure->SrcQos) <<
+				XZDMA_DATA_ATTR_ARQOS_SHIFT) &
+				XZDMA_DATA_ATTR_ARQOS_MASK) |
+			(((u32)(Configure->SrcBurstLen) <<
+				XZDMA_DATA_ATTR_ARLEN_SHIFT) &
+				XZDMA_DATA_ATTR_ARLEN_MASK) |
+			(((u32)(Configure->DstBurstType) <<
+				XZDMA_DATA_ATTR_AWBURST_SHIFT) &
+				XZDMA_DATA_ATTR_AWBURST_MASK) |
+			(((u32)(Configure->DstCache) <<
+				XZDMA_DATA_ATTR_AWCACHE_SHIFT) &
+				XZDMA_DATA_ATTR_AWCACHE_MASK) |
+			(((u32)(Configure->DstQos) <<
+				XZDMA_DATA_ATTR_AWQOS_SHIFT) &
+				XZDMA_DATA_ATTR_AWQOS_MASK) |
+			(((u32)(Configure->DstBurstLen)) &
+				XZDMA_DATA_ATTR_AWLEN_MASK));
+
+		XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+					XZDMA_CH_DATA_ATTR_OFFSET, Data);
+		Status = XST_SUCCESS;
+	}
+
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function gets the data attributes and control configurations of a
+* ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Configure is a pointer to the XZDma_ChDataConfig structure
+*		which has all the configuration fields.
+*		The fields of the structure are:
+*		- OverFetch - Allows over fetch or not
+*			- 0 - Not allowed to over-fetch on SRC
+*			- 1 - Allowed to over-fetch on SRC
+*		- SrcIssue  - Outstanding transaction on SRC
+*			- Range is 1 to 32
+*		- SrcBurstType - Burst Type for SRC AXI transaction
+*			- XZDMA_FIXED_BURST - Fixed burst
+*			- XZDMA_INCR_BURST  - Incremental burst
+*		- SrcBurstLen - AXI Length for Data Read.
+*			- Can be max of 16 to be compatible with AXI3
+*		- DstBurstType - Burst Type for SRC AXI transaction
+*			- XZDMA_FIXED_BURST - Fixed burst
+*			- XZDMA_INCR_BURST - Incremental burst
+*		- DstBurstLen     - AXI Length for Data write.
+*			- Can be max of 16 to be compatible with AXI3
+*		- SrcCache - AXI cache bits for Data read
+*		- SrcQos - Configurable QoS bits for AXI Data read
+*		- DstCache - AXI cache bits for Data write
+*		- DstQos - Configurable QoS bits for AXI Data write
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void XZDma_GetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure)
+{
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Configure != NULL);
+
+	Configure->SrcBurstType = InstancePtr->DataConfig.SrcBurstType;
+	Configure->SrcCache = InstancePtr->DataConfig.SrcCache;
+	Configure->SrcQos = InstancePtr->DataConfig.SrcQos;
+	Configure->SrcBurstLen = InstancePtr->DataConfig.SrcBurstLen;
+
+	Configure->DstBurstType = InstancePtr->DataConfig.DstBurstType;
+	Configure->DstCache = InstancePtr->DataConfig.DstCache;
+	Configure->DstQos = InstancePtr->DataConfig.DstQos;
+	Configure->DstBurstLen = InstancePtr->DataConfig.DstBurstLen;
+
+	Configure->OverFetch = InstancePtr->DataConfig.OverFetch;
+	Configure->SrcIssue = InstancePtr->DataConfig.SrcIssue;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets the descriptor attributes based on the inputs provided
+* in the structure.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Configure is a pointer to the XZDma_ChDscrConfig structure
+*		which has all the configuration fields.
+*		The fields of the structure are:
+*		- AxCoherent - AXI transactions generated for the descriptor.
+*			- 0 - Non coherent
+*			- 1 - Coherent
+*		- AXCache    - AXI cache bit used for DSCR fetch
+*				(both on SRC and DST Side)
+*		- AXQos      - QoS bit used for DSCR fetch
+*				(both on SRC and DST Side)
+*
+* @return
+*		- XST_FAILURE  If ZDMA core is not in Idle state and
+* 		- XST_SUCCESS If Configurations are made successfully
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XZDma_SetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure)
+{
+	u32 Data;
+	s32 Status;
+
+	/* Verify arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Configure != NULL);
+
+	if (InstancePtr->ChannelState != XZDMA_IDLE) {
+		Status = XST_FAILURE;
+	}
+
+	else {
+		InstancePtr->DscrConfig.AXCache = Configure->AXCache;
+		InstancePtr->DscrConfig.AXQos = Configure->AXQos;
+		InstancePtr->DscrConfig.AxCoherent = Configure->AxCoherent;
+
+		Data = ((((u32)(Configure->AxCoherent) <<
+				XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT) &
+				XZDMA_DSCR_ATTR_AXCOHRNT_MASK) |
+			(((u32)(Configure->AXCache) <<
+				XZDMA_DSCR_ATTR_AXCACHE_SHIFT) &
+				XZDMA_DSCR_ATTR_AXCACHE_MASK) |
+			(((u32)Configure->AXQos) &
+				XZDMA_DSCR_ATTR_AXQOS_MASK));
+
+		XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+				XZDMA_CH_DSCR_ATTR_OFFSET, Data);
+
+		Status = XST_SUCCESS;
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This function gets the descriptor attributes of the channel.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Configure is a pointer to the XZDma_ChDscrConfig structure
+*		which has all the configuration fields.
+*		The fields of the structure are:
+*		- AxCoherent - AXI transactions generated for the descriptor.
+*			- 0 - Non coherent
+*			- 1 - Coherent
+*		- AXCache    - AXI cache bit used for DSCR fetch
+*				(both on SRC and DST Side)
+*		- AXQos      - QoS bit used for DSCR fetch
+*				(both on SRC and DST Side)
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XZDma_GetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure)
+{
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Configure != NULL);
+
+	Configure->AXCache = InstancePtr->DscrConfig.AXCache;
+	Configure->AXQos = InstancePtr->DscrConfig.AXQos;
+	Configure->AxCoherent = InstancePtr->DscrConfig.AxCoherent;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function preloads the buffers which will be used in write only mode.
+* In write only mode the data in the provided buffer will be written in
+* destination address for specified size.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Buffer is a pointer to an array of 64/128 bit data.
+*		i.e. pointer to 32 bit array of size 2/4
+*		 - Array of Size 2 for ADMA
+*		 - Array of Size 4 for GDMA
+*
+* @return	None.
+*
+* @note		Valid only in simple mode.
+* 		Prior to call this function ZDMA instance should be set in
+* 		Write only mode by using
+*		XZDma_SetMode(XZDma *InstancePtr, u8 IsSgDma,
+*							XZDma_Mode Mode)
+*		To initiate data transfer after this API need to call
+*		XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num)
+*		In which only destination fields has to be filled.
+*
+******************************************************************************/
+void XZDma_WOData(XZDma *InstancePtr, u32 *Buffer)
+{
+	u32 *LocBuf = Buffer;
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Buffer != NULL);
+
+	if (InstancePtr->Config.DmaType == (u8)0) {
+		XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+				XZDMA_CH_WR_ONLY_WORD0_OFFSET, *LocBuf);
+		LocBuf++;
+		XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+				XZDMA_CH_WR_ONLY_WORD1_OFFSET, *LocBuf);
+		LocBuf++;
+		XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+				XZDMA_CH_WR_ONLY_WORD2_OFFSET, *LocBuf);
+		LocBuf++;
+		XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+				XZDMA_CH_WR_ONLY_WORD3_OFFSET, *LocBuf);
+	}
+
+	else {
+		XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+				XZDMA_CH_WR_ONLY_WORD0_OFFSET, *LocBuf);
+		LocBuf++;
+		XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+				XZDMA_CH_WR_ONLY_WORD1_OFFSET, *LocBuf);
+	}
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function resume the paused state of ZDMA core and starts the transfer
+* from where it has paused.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		Valid only for scatter gather mode.
+*
+******************************************************************************/
+void XZDma_Resume(XZDma *InstancePtr)
+{
+	u32 Value;
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->IsSgDma == TRUE);
+	Xil_AssertVoid(InstancePtr->ChannelState == XZDMA_PAUSE);
+
+	Value = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
+		XZDMA_CH_CTRL0_OFFSET) & (~XZDMA_CTRL0_CONT_ADDR_MASK);
+	Value |= XZDMA_CTRL0_CONT_MASK;
+	InstancePtr->ChannelState = XZDMA_BUSY;
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+				XZDMA_CH_CTRL0_OFFSET, Value);
+}
+
+/*****************************************************************************/
+/**
+*
+* This function resets the ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		This function resets all the configurations made previously.
+*		Disables all the interrupts and clears interrupt status.
+*
+*****************************************************************************/
+void XZDma_Reset(XZDma *InstancePtr)
+{
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(InstancePtr->ChannelState == XZDMA_IDLE);
+
+	/* Disable's the channel */
+	XZDma_DisableCh(InstancePtr);
+
+	/* Disables all interrupts */
+	XZDma_DisableIntr(InstancePtr, XZDMA_IXR_ALL_INTR_MASK);
+	XZDma_IntrClear(InstancePtr, XZDMA_IXR_ALL_INTR_MASK);
+	InstancePtr->IntrMask = 0x00U;
+
+	/* All configurations are being reset */
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_CTRL0_OFFSET,
+					XZDMA_CTRL0_RESET_VALUE);
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_CTRL1_OFFSET,
+					XZDMA_CTRL1_RESET_VALUE);
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+		XZDMA_CH_DATA_ATTR_OFFSET, XZDMA_DATA_ATTR_RESET_VALUE);
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+		XZDMA_CH_DSCR_ATTR_OFFSET, XZDMA_DSCR_ATTR_RESET_VALUE);
+
+	/* Clears total byte */
+	XZDma_TotalByteClear(InstancePtr);
+
+	/* Clears interrupt count of both source and destination channels */
+	(void)XZDma_GetSrcIntrCnt(InstancePtr);
+	(void)XZDma_GetDstIntrCnt(InstancePtr);
+
+	if (InstancePtr->Config.IsCacheCoherent) {
+		XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+				XZDMA_CH_DSCR_ATTR_OFFSET,
+				InstancePtr->Config.IsCacheCoherent << XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT);
+		XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+				XZDMA_CH_SRC_DSCR_WORD3_OFFSET,
+				InstancePtr->Config.IsCacheCoherent & XZDMA_WORD3_COHRNT_MASK);
+		XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+				XZDMA_CH_DST_DSCR_WORD3_OFFSET,
+				InstancePtr->Config.IsCacheCoherent & XZDMA_WORD3_COHRNT_MASK);
+	}
+	InstancePtr->ChannelState = XZDMA_IDLE;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function returns the state of ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	This function returns state of ZDMA core
+*		- XZDMA_IDLE - If ZDMA core is in idle state.
+*		- XZDMA_PAUSE - If ZDMA is in paused state.
+*		- XZDMA_BUSY - If ZDMA is in busy state.
+* @note		None.
+*		C-style signature:
+*		XZDmaState XZDma_ChannelState(XZDma *InstancePtr)
+*
+******************************************************************************/
+XZDmaState XZDma_ChannelState(XZDma *InstancePtr)
+{
+	XZDmaState Status;
+	u32 Value;
+
+	/* Verify arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	Value = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
+			(XZDMA_CH_STS_OFFSET)) & (XZDMA_STS_ALL_MASK);
+
+	if ((Value == XZDMA_STS_DONE_MASK) ||
+			(Value == XZDMA_STS_DONE_ERR_MASK)) {
+		Status = XZDMA_IDLE;
+	}
+	else if (Value == XZDMA_STS_PAUSE_MASK) {
+		Status = XZDMA_PAUSE;
+	}
+	else {
+		Status = XZDMA_BUSY;
+	}
+
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This function sets all the required fields for initiating data transfer. Data
+* transfer elements needs to be passed through structure pointer.
+* Data transfer can be done in any of the three modes (simple, Linear or Linked
+* List) based on the selected mode but before calling this API make sure that
+* ZDMA is in Idle state.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Data is a pointer of array to the XZDma_Transfer structure which
+*		has all the configuration fields for initiating data transfer.
+*		The fields of the structure are:
+*		- SrcAddr      - Source address
+*		- DstAddr     - Destination address
+*		- Size      - size of the data to be transferred in bytes
+*		- SrcCoherent  - AXI transactions generated to process the
+*				descriptor payload for source channel
+*			- 0 - Non coherent
+*			- 1 - Coherent
+*		- DstCoherent - AXI transactions generated to process the
+*				descriptor payload for destination channel
+*			- 0 - Non coherent
+*			- 1 - Coherent
+*		- Pause 	-  Valid only for scatter gather mode.
+*				Will pause after completion of this descriptor.
+* @param	Num specifies number of array elements of Data pointer.
+*		- For simple mode Num should be equal to 1
+*		- For Scatter gather mode (either linear or linked list) Num
+*		  can be any choice. (But based on which memory should be
+*		  allocated by Application) It should be less than the return
+*		  value of XZDma_CreateBDList.
+*
+* @return
+*		- XST_SUCCESS - if ZDMA initiated the transfer.
+*		- XST_FAILURE - if ZDMA has not initiated data transfer.
+*
+* @note		After Pause to resume the transfer need to use the following
+*		API
+*		- XZDma_Resume
+*		User should provide allocated memory and descriptor type in
+*		scatter gather mode through the following API before calling
+*		the start API.
+*		- XZDma_SetDescriptorType(XZDma *InstancePtr,
+*			XZDma_DscrType TypeOfDscr, UINTPTR Dscr_MemPtr,
+*							u32 NoOfBytes)
+*
+******************************************************************************/
+s32 XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num)
+{
+	s32 Status;
+
+	/* Verify arguments */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(Data != NULL);
+	Xil_AssertNonvoid(Num != 0x00U);
+
+	if ((InstancePtr->ChannelState == XZDMA_BUSY) &&
+			(Num >= InstancePtr->Descriptor.DscrCount)) {
+		Status = XST_FAILURE;
+	}
+	else {
+		if (InstancePtr->IsSgDma != TRUE) {
+			XZDma_SimpleMode(InstancePtr, Data);
+			Status = XST_SUCCESS;
+		}
+		else {
+
+			XZDma_ScatterGather(InstancePtr, Data, Num);
+			Status = XST_SUCCESS;
+		}
+
+		XZDma_Enable(InstancePtr);
+	}
+
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* This static function sets all the required fields for initiating data
+* transfer in simple mode.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Data is a pointer of array to the XZDma_Transfer structure
+*		which has all the configuration fields for initiating data
+*		transfer.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void XZDma_SimpleMode(XZDma *InstancePtr, XZDma_Transfer *Data)
+{
+
+	u32 Value;
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Data != NULL);
+
+	XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+		XZDMA_CH_SRC_DSCR_WORD0_OFFSET,
+			(Data->SrcAddr & XZDMA_WORD0_LSB_MASK));
+	XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+		XZDMA_CH_SRC_DSCR_WORD1_OFFSET,
+		(((u64)Data->SrcAddr >> XZDMA_WORD1_MSB_SHIFT) &
+		XZDMA_WORD1_MSB_MASK));
+
+	XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+		XZDMA_CH_DST_DSCR_WORD0_OFFSET,
+		(Data->DstAddr & XZDMA_WORD0_LSB_MASK));
+	XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+		XZDMA_CH_DST_DSCR_WORD1_OFFSET,
+		(((u64)Data->DstAddr >> XZDMA_WORD1_MSB_SHIFT) &
+		XZDMA_WORD1_MSB_MASK));
+
+	XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+		XZDMA_CH_SRC_DSCR_WORD2_OFFSET,
+		(Data->Size & XZDMA_WORD2_SIZE_MASK));
+	XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+		XZDMA_CH_DST_DSCR_WORD2_OFFSET,
+		(Data->Size & XZDMA_WORD2_SIZE_MASK));
+
+	Value = (u32)(Data->SrcCoherent & XZDMA_WORD3_COHRNT_MASK);
+	XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+		XZDMA_CH_SRC_DSCR_WORD3_OFFSET, Value);
+
+	Value = (u32)(Data->DstCoherent & XZDMA_WORD3_COHRNT_MASK);
+	XZDma_WriteReg((InstancePtr->Config.BaseAddress),
+			XZDMA_CH_DST_DSCR_WORD3_OFFSET, Value);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This static function sets all the required fields for initiating data
+* transfer in scatter gather mode.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Data is a pointer of array to the XZDma_Transfer structure
+*		which has all the configuration fields for initiating data
+*		transfer.
+* @param	Num specifies number of array elements of Data pointer.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void XZDma_ScatterGather(XZDma *InstancePtr, XZDma_Transfer *Data,
+								u32 Num)
+{
+	u32 Count = 0x00U;
+	u8 Last;
+	XZDma_Transfer *LocalData = Data;
+	XZDma_LiDscr *LiSrcDscr =
+		(XZDma_LiDscr *)(void *)(InstancePtr->Descriptor.SrcDscrPtr);
+	XZDma_LiDscr *LiDstDscr =
+		(XZDma_LiDscr *)(void *)(InstancePtr->Descriptor.DstDscrPtr);
+	XZDma_LlDscr *LlSrcDscr =
+		(XZDma_LlDscr *)(void *)(InstancePtr->Descriptor.SrcDscrPtr);
+	XZDma_LlDscr *LlDstDscr =
+		(XZDma_LlDscr *)(void *)(InstancePtr->Descriptor.DstDscrPtr);
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Data != NULL);
+	Xil_AssertVoid(Num != 0x00U);
+
+	if (InstancePtr->Descriptor.DscrType == XZDMA_LINEAR) {
+		Last = FALSE;
+		do {
+			if (Count == (Num- 1)) {
+				Last = TRUE;
+			}
+			XZDma_LinearMode(InstancePtr, LocalData, LiSrcDscr,
+							LiDstDscr, Last);
+			Count++;
+			LiSrcDscr++;
+			LiDstDscr++;
+			LocalData++;
+		} while(Count < Num);
+	}
+	else {
+		Last = FALSE;
+		do {
+			if (Count == (Num - 1)) {
+				Last = TRUE;
+			}
+			XZDma_LinkedListMode(InstancePtr, LocalData, LlSrcDscr,
+							LlDstDscr, Last);
+			Count++;
+			LlDstDscr++;
+			LlSrcDscr++;
+			LocalData++;
+		} while(Count < Num);
+	}
+
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+		XZDMA_CH_SRC_START_LSB_OFFSET,
+		((UINTPTR)(InstancePtr->Descriptor.SrcDscrPtr) &
+					XZDMA_WORD0_LSB_MASK));
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+		XZDMA_CH_SRC_START_MSB_OFFSET,
+		(((u64)(UINTPTR)(InstancePtr->Descriptor.SrcDscrPtr) >>
+			XZDMA_WORD1_MSB_SHIFT) & XZDMA_WORD1_MSB_MASK));
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+		XZDMA_CH_DST_START_LSB_OFFSET,
+		((UINTPTR)(InstancePtr->Descriptor.DstDscrPtr) &
+					XZDMA_WORD0_LSB_MASK));
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress,
+		XZDMA_CH_DST_START_MSB_OFFSET,
+		(((u64)(UINTPTR)(InstancePtr->Descriptor.DstDscrPtr) >>
+			XZDMA_WORD1_MSB_SHIFT) & XZDMA_WORD1_MSB_MASK));
+}
+
+/*****************************************************************************/
+/**
+*
+* This static function sets all the required fields for initiating data
+* transfer in Linear descriptor type.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Data is a pointer of array to the XZDma_Transfer structure which
+*		has all the configuration fields for initiating data transfer.
+* @param	SrcDscrPtr is descriptor pointer of source in which Data fields
+*		has to be filled.
+* @param	DstDscrPtr is descriptor pointer of destination in which Data
+*		fields has to be filled.
+* @param	IsLast specifies whether provided descriptor pointer is last
+*		one or not.
+*		- XZDMA_TRUE - If descriptor is last
+*		- XZDMA_FALSE - If descriptor is not last
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void XZDma_LinearMode(XZDma *InstancePtr, XZDma_Transfer *Data,
+	XZDma_LiDscr *SrcDscrPtr, XZDma_LiDscr *DstDscrPtr, u8 IsLast)
+{
+	u32 Value;
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Data != NULL);
+	Xil_AssertVoid(SrcDscrPtr != NULL);
+	Xil_AssertVoid(DstDscrPtr != NULL);
+	Xil_AssertVoid((IsLast == TRUE) || (IsLast == FALSE));
+
+	if (Data->Pause == TRUE) {
+		Value = XZDMA_WORD3_CMD_PAUSE_MASK;
+	}
+	else if (IsLast == TRUE) {
+		Value = XZDMA_WORD3_CMD_STOP_MASK;
+	}
+	else {
+		Value = XZDMA_WORD3_CMD_NXTVALID_MASK;
+	}
+	if (Data->SrcCoherent == TRUE) {
+		Value |= XZDMA_WORD3_COHRNT_MASK;
+	}
+
+	XZDma_ConfigLinear(SrcDscrPtr, (u64)Data->SrcAddr, Data->Size, Value);
+
+	Value = 0U;
+
+	if (Data->DstCoherent == TRUE) {
+		Value |= XZDMA_WORD3_COHRNT_MASK;
+	}
+
+	XZDma_ConfigLinear(DstDscrPtr, (u64)Data->DstAddr, Data->Size, Value);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This static function sets all the required fields for initiating data
+* transfer in Linear descriptor type.
+*
+* @param	DscrPtr is a pointer to source/destination descriptor.
+* @param	Addr is a 64 bit variable which denotes the address of data.
+* @param	Size specifies the amount of the data to be transferred.
+* @param	CtrlValue contains all the control fields of descriptor.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void XZDma_ConfigLinear(XZDma_LiDscr *DscrPtr, u64 Addr, u32 Size,
+								u32 CtrlValue)
+{
+	/* Verify arguments */
+	Xil_AssertVoid(DscrPtr != NULL);
+	Xil_AssertVoid(Addr != 0x00U);
+
+	DscrPtr->Address = Addr;
+	DscrPtr->Size = Size & XZDMA_WORD2_SIZE_MASK;
+	DscrPtr->Cntl = CtrlValue;
+
+	Xil_DCacheFlushRange((UINTPTR)DscrPtr, sizeof(XZDma_LlDscr));
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This static function sets all the required fields for initiating data
+* transfer in Linked list descriptor type.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Data is a pointer of array to the XZDma_Transfer structure which
+*		has all the configuration fields for initiating data transfer.
+* @param	SrcDscrPtr is descriptor pointer of source in which Data fields
+*		has to be filled.
+* @param	DstDscrPtr is descriptor pointer of destination in which Data
+*		fields has to be filled.
+* @param	IsLast specifies whether provided descriptor pointer is last
+*		one or not.
+*		- TRUE - If descriptor is last
+*		- FALSE - If descriptor is not last
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void XZDma_LinkedListMode(XZDma *InstancePtr, XZDma_Transfer *Data,
+	XZDma_LlDscr *SrcDscrPtr,XZDma_LlDscr *DstDscrPtr, u8 IsLast)
+{
+	u32 Value;
+	XZDma_LlDscr *NextSrc = SrcDscrPtr;
+	XZDma_LlDscr *NextDst = DstDscrPtr;
+	u64 NextSrcAdrs = 0x00U;
+	u64 NextDstAdrs = 0x00U;
+
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+	Xil_AssertVoid(Data != NULL);
+	Xil_AssertVoid(SrcDscrPtr != NULL);
+	Xil_AssertVoid(DstDscrPtr != NULL);
+	Xil_AssertVoid((IsLast == TRUE) || (IsLast == FALSE));
+
+	NextDst++;
+	NextSrc++;
+
+	if (Data->Pause == TRUE) {
+		Value = XZDMA_WORD3_CMD_PAUSE_MASK;
+		if (IsLast != TRUE) {
+			NextSrcAdrs = (u64)(UINTPTR)NextSrc;
+			NextDstAdrs = (u64)(UINTPTR)NextDst;
+		}
+	}
+	else if (IsLast == TRUE) {
+		Value = XZDMA_WORD3_CMD_STOP_MASK;
+	}
+	else {
+		Value = XZDMA_WORD3_CMD_NXTVALID_MASK;
+		NextSrcAdrs = (u64)(UINTPTR)NextSrc;
+		NextDstAdrs = (u64)(UINTPTR)NextDst;
+	}
+	if (Data->SrcCoherent == TRUE) {
+		Value |= XZDMA_WORD3_COHRNT_MASK;
+	}
+
+	XZDma_ConfigLinkedList(SrcDscrPtr, (u64)Data->SrcAddr,
+					Data->Size, Value, NextSrcAdrs);
+
+	Value = 0U;
+
+	if (Data->DstCoherent == TRUE) {
+		Value |= XZDMA_WORD3_COHRNT_MASK;
+	}
+
+	XZDma_ConfigLinkedList(DstDscrPtr, (u64)Data->DstAddr,
+					Data->Size, Value, NextDstAdrs);
+
+}
+
+/*****************************************************************************/
+/**
+*
+* This static function sets all the required fields for initiating data
+* transfer in Linked list descriptor type.
+*
+* @param	DscrPtr is a pointer to source/destination descriptor.
+* @param	Addr is a 64 bit variable which denotes the address of data.
+* @param	Size specifies the amount of the data to be transferred.
+* @param	CtrlValue contains all the control fields of descriptor.
+* @param	NextDscrAddr is the address of next descriptor.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void XZDma_ConfigLinkedList(XZDma_LlDscr *DscrPtr, u64 Addr, u32 Size,
+			u32 CtrlValue, u64 NextDscrAddr)
+{
+	/* Verify arguments */
+	Xil_AssertVoid(DscrPtr != NULL);
+	Xil_AssertVoid(Addr != 0x00U);
+
+	DscrPtr->Address = Addr;
+	DscrPtr->Size = Size & XZDMA_WORD2_SIZE_MASK;
+	DscrPtr->Cntl = CtrlValue;
+	DscrPtr->NextDscr = NextDscrAddr;
+	DscrPtr->Reserved = 0U;
+
+	Xil_DCacheFlushRange((UINTPTR)DscrPtr, sizeof(XZDma_LlDscr));
+}
+
+/*****************************************************************************/
+/**
+* This static function enable's all the interrupts which user intended to
+* enable and enables the ZDMA channel for initiating data transfer.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+
+static void XZDma_Enable(XZDma *InstancePtr)
+{
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_IEN_OFFSET,
+			(InstancePtr->IntrMask & XZDMA_IXR_ALL_INTR_MASK));
+	InstancePtr->ChannelState = XZDMA_BUSY;
+	XZDma_EnableCh(InstancePtr);
+
+}
+
+/*****************************************************************************/
+/**
+* This static function gets all the reset configurations of ZDMA.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void XZDma_GetConfigurations(XZDma *InstancePtr)
+{
+	/* Verify arguments */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	InstancePtr->DataConfig.SrcIssue = (u8)XZDMA_CTRL1_SRC_ISSUE_MASK;
+	InstancePtr->DataConfig.SrcBurstType = XZDMA_INCR_BURST;
+	InstancePtr->DataConfig.SrcBurstLen = 0xFU;
+	InstancePtr->DataConfig.OverFetch = 1U;
+	InstancePtr->DataConfig.DstBurstType = XZDMA_INCR_BURST;
+	InstancePtr->DataConfig.DstBurstLen = 0xFU;
+	InstancePtr->DataConfig.SrcCache = 0x2U;
+	InstancePtr->DataConfig.DstCache = 0x2U;
+	InstancePtr->DataConfig.SrcQos = 0x0U;
+	InstancePtr->DataConfig.DstQos = 0x0U;
+
+	InstancePtr->DscrConfig.AXCache = 0U;
+	InstancePtr->DscrConfig.AXQos = 0U;
+	InstancePtr->DscrConfig.AxCoherent = 0U;
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine is a stub for the asynchronous callbacks. The stub is here in
+* case the upper layer forgot to set the handlers. On initialization, All
+* handlers are set to this callback. It is considered an error for this
+* handler to be invoked.
+*
+* @param	CallBackRef is a callback reference passed in by the upper
+*		layer when setting the callback functions, and passed back to
+*		the upper layer when the callback is invoked.
+* @param	Mask is the type of the interrupts to enable. Use OR'ing of
+*		XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
+*		this parameter value.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void StubCallBack(void *CallBackRef, u32 Mask)
+{
+	/* Verify arguments. */
+	Xil_AssertVoid(CallBackRef != NULL);
+	Xil_AssertVoid(Mask != (u32)0x00);
+	Xil_AssertVoidAlways();
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine is a stub for the DMA done callback. The stub is here in
+* case the upper layer forgot to set the handlers. On initialization, Done
+* handler are set to this callback.
+*
+* @param	CallBackRef is a callback reference passed in by the upper
+*		layer when setting the callback functions, and passed back to
+*		the upper layer when the callback is invoked.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+static void StubDoneCallBack(void *CallBackRef)
+{
+	/* Verify arguments. */
+	Xil_AssertVoid(CallBackRef != NULL);
+	Xil_AssertVoidAlways();
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/zdma_v1_5/src/xzdma.h b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma.h
new file mode 100644
index 0000000..9ff6907
--- /dev/null
+++ b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma.h
@@ -0,0 +1,713 @@
+/******************************************************************************
+*
+* Copyright (C) 2014-2017 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xzdma.h
+* @addtogroup zdma_v1_5
+* @{
+* @details
+*
+* ZDMA is a general purpose DMA designed to support memory to memory and memory
+* to IO buffer transfers. ZynqMP has two instance of general purpose ZDMA.
+* One is located in FPD (full power domain) which is GDMA and other is located
+* in LPD (low power domain) which is ADMA.
+*
+* GMDA & ADMA are configured each with 8 DMA channels and and each channel can
+* be programmed secure or non-secure.
+* Each channel is divided into two functional sides, Source (Read) and
+* Destination (Write). Each DMA channel can be independently programmed
+* in one of following DMA modes.
+*	- Simple DMA
+*		- Normal data transfer from source to destination.
+*		- Write Only mode.
+*		- Read Only mode.
+*	- Scatter Gather DMA
+*		- Only Normal mode it can't support other two modes.
+* In Scatter gather descriptor can be of 3 types
+*	- Linear descriptor.
+*	- Linked list descriptor
+*	- Hybrid descriptor (Combination of both Linear and Linked list)
+* Our driver will not support Hybrid type of descriptor.
+*
+* Initialization & Configuration
+*
+* The device driver enables higher layer software (e.g., an application) to
+* communicate to the ZDMA core.
+*
+* XZDma_CfgInitialize() API is used to initialize the ZDMA core.
+* The user needs to first call the XZDma_LookupConfig() API which returns
+* the Configuration structure pointer which is passed as a parameter to the
+* XZDma_CfgInitialize() API.
+*
+*  Interrupts 
+* The driver provides an interrupt handler XZDma_IntrHandler for handling
+* the interrupt from the ZDMA core. The users of this driver have to
+* register this handler with the interrupt system and provide the callback
+* functions by using XZDma_SetCallBack API. In this version Descriptor done
+* option is disabled.
+*
+*  Virtual Memory 
+*
+* This driver supports Virtual Memory. The RTOS is responsible for calculating
+* the correct device base address in Virtual Memory space.
+*
+*  Threads 
+*
+* This driver is not thread safe. Any needs for threads or thread mutual
+* exclusion must be satisfied by the layer above this driver.
+*
+*  Asserts 
+*
+* Asserts are used within all Xilinx drivers to enforce constraints on argument
+* values. Asserts can be turned off on a system-wide basis by defining, at
+* compile time, the NDEBUG identifier. By default, asserts are turned on and it
+* is recommended that users leave asserts on during development.
+*
+*  Building the driver 
+*
+* The XZDma driver is composed of several source files. This allows the user
+* to build and link only those parts of the driver that are necessary.
+*
+* This header file contains identifiers and register-level driver functions (or
+* macros), range macros, structure typedefs that can be used to access the
+* Xilinx ZDMA core instance.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ------------------------------------------------------
+* 1.0   vns     2/27/15  First release
+* 1.1   vns    15/02/16  Corrected Destination descriptor addresss calculation
+*                        in XZDma_CreateBDList API
+*                        Modified XZDma_SetMode to return XST_FAILURE on
+*                        selecting DMA mode other than normal mode in
+*                        scatter gather mode data transfer and corrected
+*                        XZDma_SetChDataConfig API to set over fetch and
+*                        src issue parameters correctly.
+*       ms     03/17/17  Added readme.txt file in examples folder for doxygen
+*                        generation.
+*       ms     04/05/17  Modified comment lines notation in functions of zdma
+*                        examples to avoid unnecessary description to get
+*                        displayed while generating doxygen and also changed
+*                        filename tag to include the readonly mode example file
+*                        in doxygen.
+* 1.3   mus     08/14/17 Update cache coherency information of the interface in
+*                        its config structure.
+* 1.4   adk 	11/02/17 Updated examples to fix compilation errors for IAR
+*			 compiler.
+* 1.5   adk     11/22/17 Added peripheral test app support for ZDMA driver.
+*		12/11/17 Fixed peripheral test app generation issues when dma
+*			 buffers are configured on OCM memory(CR#990806).
+* 

+*
+******************************************************************************/
+#ifndef XZDMA_H_
+#define XZDMA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xzdma_hw.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xil_cache.h"
+#include "bspconfig.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+/** @name ZDMA Handler Types
+ * @{
+ */
+typedef enum {
+	XZDMA_HANDLER_DONE,	/**< For Done Handler */
+	XZDMA_HANDLER_ERROR,	/**< For Error Handler */
+} XZDma_Handler;
+/*@}*/
+
+/** @name ZDMA Descriptors Types
+ * @{
+ */
+typedef enum {
+	XZDMA_LINEAR,		/**< Linear descriptor */
+	XZDMA_LINKEDLIST,	/**< Linked list descriptor */
+} XZDma_DscrType;
+/*@}*/
+
+/** @name ZDMA Operation modes
+ * @{
+ */
+typedef enum {
+	XZDMA_NORMAL_MODE,	/**< Normal transfer from source to
+				  *  destination*/
+	XZDMA_WRONLY_MODE,	/**< Write only mode */
+	XZDMA_RDONLY_MODE	/**< Read only mode */
+} XZDma_Mode;
+/*@}*/
+
+/** @name ZDMA state
+ * @{
+ */
+typedef enum {
+	XZDMA_IDLE,		/**< ZDMA is in Idle state */
+	XZDMA_PAUSE,		/**< Paused state */
+	XZDMA_BUSY,		/**< Busy state */
+} XZDmaState;
+/*@}*/
+
+/** @name ZDMA AXI Burst type
+ * @{
+ */
+typedef enum {
+	XZDMA_FIXED_BURST = 0,	/**< Fixed burst type */
+	XZDMA_INCR_BURST	/**< Increment burst type */
+} XZDma_BurstType;
+/*@}*/
+
+/******************************************************************************/
+/**
+* This typedef contains scatter gather descriptor fields for ZDMA core.
+*/
+typedef struct {
+	void *SrcDscrPtr;	/**< Source Descriptor pointer */
+	void *DstDscrPtr;	/**< Destination Descriptor pointer */
+	u32 DscrCount;		/**< Count of descriptors available */
+	XZDma_DscrType DscrType;/**< Type of descriptor either Linear or
+				  *  Linked list type */
+} XZDma_Descriptor;
+
+/******************************************************************************/
+/**
+* This typedef contains scatter gather descriptor fields for ZDMA core.
+*/
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+typedef struct {
+	u64 Address;	/**< Address */
+	u32 Size;	/**< Word2, Size of data */
+	u32 Cntl;	/**< Word3 Control data */
+	u64 NextDscr; 	/**< Address of next descriptor */
+	u64 Reserved;	/**< Reserved address */
+#if defined (__ICCARM__)
+}  XZDma_LlDscr ;
+#pragma pack(pop)
+#else
+} __attribute__ ((packed)) XZDma_LlDscr;
+#endif
+/******************************************************************************/
+/**
+* This typedef contains Linear descriptor fields for ZDMA core.
+*/
+#if defined (__ICCARM__)
+#pragma pack(push, 1)
+#endif
+typedef struct {
+	u64 Address;	/**< Address */
+	u32 Size;	/**< Word3, Size of data */
+	u32 Cntl;	/**< Word4, control data */
+#if defined (__ICCARM__)
+}XZDma_LiDscr;
+#pragma pack(pop)
+#else
+}  __attribute__ ((packed)) XZDma_LiDscr;
+#endif
+/******************************************************************************/
+/**
+*
+* This typedef contains the data configurations of ZDMA core
+*/
+typedef struct {
+	u8 OverFetch;		/**< Enable Over fetch */
+	u8 SrcIssue;		/**< Outstanding transactions for Source */
+	XZDma_BurstType SrcBurstType;
+				/**< Burst type for SRC */
+	u8 SrcBurstLen;		/**< AXI length for data read */
+	XZDma_BurstType DstBurstType;
+				/**< Burst type for DST */
+	u8 DstBurstLen;		/**< AXI length for data write */
+	u8 SrcCache;		/**< AXI cache bits for data read */
+	u8 SrcQos;		/**< AXI QOS bits for data read */
+	u8 DstCache;		/**< AXI cache bits for data write */
+	u8 DstQos;		/**< AXI QOS bits for data write */
+} XZDma_DataConfig;
+
+/******************************************************************************/
+/**
+*
+* This typedef contains the descriptor configurations of ZDMA core
+*/
+typedef struct{
+	u8 AxCoherent;	/**< AXI transactions are coherent or non-coherent */
+	u8 AXCache;	/**< AXI cache for DSCR fetch */
+	u8 AXQos;	/**< Qos bit for DSCR fetch */
+} XZDma_DscrConfig;
+
+/******************************************************************************/
+/**
+* Callback type for Completion of all data transfers.
+*
+* @param 	CallBackRef is a callback reference passed in by the upper layer
+*		when setting the callback functions, and passed back to the
+*		upper layer when the callback is invoked.
+*******************************************************************************/
+typedef void (*XZDma_DoneHandler) (void *CallBackRef);
+
+/******************************************************************************/
+/**
+* Callback type for all error interrupts.
+*
+* @param 	CallBackRef is a callback reference passed in by the upper layer
+*		when setting the callback functions, and passed back to the
+*		upper layer when the callback is invoked.
+* @param	ErrorMask is a bit mask indicating the cause of the error. Its
+*		value equals 'OR'ing one or more XZDMA_IXR_* values defined in
+*		xzdma_hw.h
+****************************************************************************/
+typedef void (*XZDma_ErrorHandler) (void *CallBackRef, u32 ErrorMask);
+
+/**
+* This typedef contains configuration information for a ZDMA core
+* Each ZDMA core should have a configuration structure associated.
+*/
+typedef struct {
+	u16 DeviceId;		/**< Device Id of ZDMA */
+	u32 BaseAddress;	/**< BaseAddress of ZDMA */
+	u8 DmaType;		/**< Type of DMA */
+	u8 IsCacheCoherent; /**< Describes whether Cache Coherent or not;
+                              * Applicable only to A53 in EL1 NS mode */
+} XZDma_Config;
+
+/******************************************************************************/
+/**
+*
+* The XZDma driver instance data structure. A pointer to an instance data
+* structure is passed around by functions to refer to a specific driver
+* instance.
+*/
+typedef struct {
+	XZDma_Config Config;	/**< Hardware configuration */
+	u32 IsReady;		/**< Device and the driver instance
+				  *  are initialized */
+	u32 IntrMask;		/**< Mask for enabling interrupts */
+
+	XZDma_Mode Mode;	/**< Mode of ZDMA core to be operated */
+	u8 IsSgDma;		/**< Is ZDMA core is in scatter gather or
+				  *  not will be specified */
+	u32 Slcr_adma;		/**< Used to hold SLCR ADMA register
+				  *  contents */
+	XZDma_Descriptor Descriptor;	/**< It contains information about
+					  * descriptors */
+
+	XZDma_DoneHandler DoneHandler;	/**< Call back for transfer
+					  *  done interrupt */
+	void *DoneRef;			/**< To be passed to the done
+					  * interrupt callback */
+
+	XZDma_ErrorHandler ErrorHandler;/**< Call back for error
+					  *  interrupt */
+	void *ErrorRef;			/**< To be passed to the error
+					  * interrupt callback */
+	XZDma_DataConfig DataConfig;	/**< Current configurations */
+	XZDma_DscrConfig DscrConfig;	/**< Current configurations */
+	XZDmaState ChannelState;	 /**< ZDMA channel is busy */
+
+} XZDma;
+
+/******************************************************************************/
+/**
+*
+* This typedef contains the fields for transfer of data.
+*/
+typedef struct {
+	UINTPTR SrcAddr;	/**< Source address */
+	UINTPTR DstAddr;	/**< Destination Address */
+	u32 Size;		/**< Size of the data to be transferred */
+	u8 SrcCoherent;		/**< Source coherent */
+	u8 DstCoherent;		/**< Destination coherent */
+	u8 Pause;		/**< Will pause data transmission after
+				  *  this transfer only for SG mode */
+} XZDma_Transfer;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+*
+* This function returns interrupt status read from Interrupt Status Register.
+* Use the XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to interpret the
+* returned value.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	The pending interrupts of the ZDMA core.
+*		Use the masks specified in xzdma_hw.h to interpret
+*		the returned value.
+* @note
+* 		C-style signature:
+*		void XZDma_IntrGetStatus(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_IntrGetStatus(InstancePtr) \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress, XZDMA_CH_ISR_OFFSET)
+
+/*****************************************************************************/
+/**
+*
+* This function clears interrupt(s). Every bit set in Interrupt Status
+* Register indicates that a specific type of interrupt is occurring, and this
+* function clears one or more interrupts by writing a bit mask to Interrupt
+* Clear Register.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Mask is the type of the interrupts to enable. Use OR'ing of
+*		XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
+*		this parameter value.
+*
+* @return	None.
+*
+* @note
+* 		C-style signature:
+*		void XZDma_IntrClear(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_IntrClear(InstancePtr, Mask) \
+	XZDma_WriteReg( (InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_ISR_OFFSET, ((u32)(Mask) & (u32)XZDMA_IXR_ALL_INTR_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function returns interrupt mask to know which interrupts are
+* enabled and which of them were disabled.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	The current interrupt mask. The mask indicates which interrupts
+*		are enabled/disabled.
+*		0 bit represents .....corresponding interrupt is enabled.
+*		1 bit represents .....Corresponding interrupt is disabled.
+*
+* @note
+* 		C-style signature:
+*		void XZDma_GetIntrMask(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_GetIntrMask(InstancePtr) \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress,  \
+			(u32)(XZDMA_CH_IMR_OFFSET))
+
+/*****************************************************************************/
+/**
+*
+* This function enables individual interrupts of the ZDMA core by updating
+* the Interrupt Enable register.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Mask is the type of the interrupts to enable. Use OR'ing of
+*		XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
+*		this parameter value.
+*
+* @return	None.
+*
+* @note		The existing enabled interrupt(s) will remain enabled.
+* 		C-style signature:
+*		void XZDma_EnableIntr(XZDma *InstancePtr, u32 Mask)
+*
+******************************************************************************/
+#define XZDma_EnableIntr(InstancePtr, Mask) \
+	(InstancePtr)->IntrMask = ((InstancePtr)->IntrMask | (Mask))
+
+/*****************************************************************************/
+/**
+*
+* This function disables individual interrupts of the ZDMA core by updating
+* the Interrupt Disable register.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+* @param	Mask is the type of the interrupts to disable. Use OR'ing of
+*		XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
+*		this parameter value.
+*
+* @return	None.
+*
+* @note		The existing disabled interrupt(s) will remain disabled.
+* 		C-style signature:
+*		void XZDma_DisableIntr(XZDma *InstancePtr, u32 Mask)
+*
+******************************************************************************/
+#define XZDma_DisableIntr(InstancePtr, Mask) \
+	XZDma_WriteReg( (InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_IDS_OFFSET, \
+	((u32)XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_IDS_OFFSET) | ((u32)(Mask) & (u32)XZDMA_IXR_ALL_INTR_MASK)))
+
+/*****************************************************************************/
+/**
+*
+* This function returns source current payload address under process
+* of ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		This address may not be precise due to ZDMA pipeline structure
+*		C-style signature:
+*		u64 XZDma_SrcCurPyld(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_SrcCurPyld(InstancePtr) \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_SRC_CUR_PYLD_LSB_OFFSET)) | \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_SRC_CUR_PYLD_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
+
+/*****************************************************************************/
+/**
+*
+* This function returns destination current payload address under process
+* of ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		This address may not be precise due to ZDMA pipeline structure
+*		C-style signature:
+*		u64 XZDma_DstCurPyld(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_DstCurPyld(InstancePtr) \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_DST_CUR_PYLD_LSB_OFFSET)) | \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_DST_CUR_PYLD_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
+
+/*****************************************************************************/
+/**
+*
+* This function returns source descriptor current payload address under
+* process of ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		This address may not be precise due to ZDMA pipeline structure
+*		C-style signature:
+*		u64 XZDma_SrcDscrCurPyld(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_SrcDscrCurPyld(InstancePtr) \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_SRC_CUR_DSCR_LSB_OFFSET)) | \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_SRC_CUR_DSCR_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
+
+
+/*****************************************************************************/
+/**
+*
+* This function returns destination descriptor current payload address under
+* process of ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		This address may not be precise due to ZDMA pipeline structure
+*		C-style signature:
+*		u64 XZDma_DstDscrCurPyld(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_DstDscrCurPyld(InstancePtr) \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_DST_CUR_DSCR_LSB_OFFSET)) | \
+	((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+	XZDMA_CH_DST_CUR_DSCR_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
+
+/*****************************************************************************/
+/**
+*
+* This function gets the count of total bytes transferred through core
+* since last clear in ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note
+*		C-style signature:
+*		void XZDma_GetTotalByte(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_GetTotalByte(InstancePtr) \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_TOTAL_BYTE_OFFSET)
+
+/*****************************************************************************/
+/**
+*
+* This function clears the count of total bytes transferred in ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note
+*		C-style signature:
+*		void XZDma_TotalByteClear(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_TotalByteClear(InstancePtr) \
+	XZDma_WriteReg((InstancePtr)->Config.BaseAddress, \
+		XZDMA_CH_TOTAL_BYTE_OFFSET, \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+		XZDMA_CH_TOTAL_BYTE_OFFSET))
+
+/*****************************************************************************/
+/**
+*
+* This function gets the total number of Interrupt count for source after last
+* call of this API.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		Once this API is called then count will become zero.
+*		C-style signature:
+*		void XZDma_GetSrcIntrCnt(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_GetSrcIntrCnt(InstancePtr) \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_IRQ_SRC_ACCT_OFFSET)
+
+/*****************************************************************************/
+/**
+*
+* This function gets the total number of Interrupt count for destination
+* after last call of this API.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		Once this API is called then count will become zero.
+*		C-style signature:
+*		void XZDma_GetDstIntrCnt(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_GetDstIntrCnt(InstancePtr) \
+	XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
+			XZDMA_CH_IRQ_DST_ACCT_OFFSET)
+
+/*****************************************************************************/
+/**
+*
+* This function Enable's the ZDMA core for initiating the data transfer once the
+* data transfer completes it will be automatically disabled.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		None.
+*		C-style signature:
+*		void XZDma_EnableCh(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_EnableCh(InstancePtr) \
+	XZDma_WriteReg((InstancePtr)->Config.BaseAddress, \
+			(XZDMA_CH_CTRL2_OFFSET), (XZDMA_CH_CTRL2_EN_MASK))
+
+/*****************************************************************************/
+/**
+*
+* This function Disable's the ZDMA core.
+*
+* @param	InstancePtr is a pointer to the XZDma instance.
+*
+* @return	None.
+*
+* @note		None.
+*		C-style signature:
+*		void XZDma_DisableCh(XZDma *InstancePtr)
+*
+******************************************************************************/
+#define XZDma_DisableCh(InstancePtr) \
+	XZDma_WriteReg((InstancePtr)->Config.BaseAddress,\
+		(XZDMA_CH_CTRL2_OFFSET), (XZDMA_CH_CTRL2_DIS_MASK))
+
+/************************ Prototypes of functions **************************/
+
+XZDma_Config *XZDma_LookupConfig(u16 DeviceId);
+
+s32 XZDma_CfgInitialize(XZDma *InstancePtr, XZDma_Config *CfgPtr,
+			u32 EffectiveAddr);
+s32 XZDma_SetMode(XZDma *InstancePtr, u8 IsSgDma, XZDma_Mode Mode);
+u32 XZDma_CreateBDList(XZDma *InstancePtr, XZDma_DscrType TypeOfDscr,
+					UINTPTR Dscr_MemPtr, u32 NoOfBytes);
+s32 XZDma_SetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure);
+void XZDma_GetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure);
+s32 XZDma_SetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure);
+void XZDma_GetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure);
+s32 XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num);
+void XZDma_WOData(XZDma *InstancePtr, u32 *Buffer);
+void XZDma_Resume(XZDma *InstancePtr);
+void XZDma_Reset(XZDma *InstancePtr);
+XZDmaState XZDma_ChannelState(XZDma *InstancePtr);
+
+s32 XZDma_SelfTest(XZDma *InstancePtr);
+
+void XZDma_IntrHandler(void *Instance);
+s32 XZDma_SetCallBack(XZDma *InstancePtr, XZDma_Handler HandlerType,
+	void *CallBackFunc, void *CallBackRef);
+
+/*@}*/
+
+#ifdef __cplusplus
+}
+
+#endif
+
+#endif /* XZDMA_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_g.c b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_g.c
new file mode 100644
index 0000000..1c86f90
--- /dev/null
+++ b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_g.c
@@ -0,0 +1,147 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version: 
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+* 
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+* 
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xzdma.h"
+
+/*
+* The configuration table for devices
+*/
+
+XZDma_Config XZDma_ConfigTable[XPAR_XZDMA_NUM_INSTANCES] =
+{
+	{
+		XPAR_PSU_ADMA_0_DEVICE_ID,
+		XPAR_PSU_ADMA_0_BASEADDR,
+		XPAR_PSU_ADMA_0_DMA_MODE,
+		XPAR_PSU_ADMA_0_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_ADMA_1_DEVICE_ID,
+		XPAR_PSU_ADMA_1_BASEADDR,
+		XPAR_PSU_ADMA_1_DMA_MODE,
+		XPAR_PSU_ADMA_1_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_ADMA_2_DEVICE_ID,
+		XPAR_PSU_ADMA_2_BASEADDR,
+		XPAR_PSU_ADMA_2_DMA_MODE,
+		XPAR_PSU_ADMA_2_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_ADMA_3_DEVICE_ID,
+		XPAR_PSU_ADMA_3_BASEADDR,
+		XPAR_PSU_ADMA_3_DMA_MODE,
+		XPAR_PSU_ADMA_3_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_ADMA_4_DEVICE_ID,
+		XPAR_PSU_ADMA_4_BASEADDR,
+		XPAR_PSU_ADMA_4_DMA_MODE,
+		XPAR_PSU_ADMA_4_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_ADMA_5_DEVICE_ID,
+		XPAR_PSU_ADMA_5_BASEADDR,
+		XPAR_PSU_ADMA_5_DMA_MODE,
+		XPAR_PSU_ADMA_5_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_ADMA_6_DEVICE_ID,
+		XPAR_PSU_ADMA_6_BASEADDR,
+		XPAR_PSU_ADMA_6_DMA_MODE,
+		XPAR_PSU_ADMA_6_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_ADMA_7_DEVICE_ID,
+		XPAR_PSU_ADMA_7_BASEADDR,
+		XPAR_PSU_ADMA_7_DMA_MODE,
+		XPAR_PSU_ADMA_7_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_GDMA_0_DEVICE_ID,
+		XPAR_PSU_GDMA_0_BASEADDR,
+		XPAR_PSU_GDMA_0_DMA_MODE,
+		XPAR_PSU_GDMA_0_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_GDMA_1_DEVICE_ID,
+		XPAR_PSU_GDMA_1_BASEADDR,
+		XPAR_PSU_GDMA_1_DMA_MODE,
+		XPAR_PSU_GDMA_1_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_GDMA_2_DEVICE_ID,
+		XPAR_PSU_GDMA_2_BASEADDR,
+		XPAR_PSU_GDMA_2_DMA_MODE,
+		XPAR_PSU_GDMA_2_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_GDMA_3_DEVICE_ID,
+		XPAR_PSU_GDMA_3_BASEADDR,
+		XPAR_PSU_GDMA_3_DMA_MODE,
+		XPAR_PSU_GDMA_3_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_GDMA_4_DEVICE_ID,
+		XPAR_PSU_GDMA_4_BASEADDR,
+		XPAR_PSU_GDMA_4_DMA_MODE,
+		XPAR_PSU_GDMA_4_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_GDMA_5_DEVICE_ID,
+		XPAR_PSU_GDMA_5_BASEADDR,
+		XPAR_PSU_GDMA_5_DMA_MODE,
+		XPAR_PSU_GDMA_5_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_GDMA_6_DEVICE_ID,
+		XPAR_PSU_GDMA_6_BASEADDR,
+		XPAR_PSU_GDMA_6_DMA_MODE,
+		XPAR_PSU_GDMA_6_IS_CACHE_COHERENT
+	},
+	{
+		XPAR_PSU_GDMA_7_DEVICE_ID,
+		XPAR_PSU_GDMA_7_BASEADDR,
+		XPAR_PSU_GDMA_7_DMA_MODE,
+		XPAR_PSU_GDMA_7_IS_CACHE_COHERENT
+	}
+};
+
+
diff --git a/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_hw.h b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_hw.h
new file mode 100644
index 0000000..046921c
--- /dev/null
+++ b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_hw.h
@@ -0,0 +1,384 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xzdma_hw.h
+* @addtogroup zdma_v1_5
+* @{
+*
+* This header file contains identifiers and register-level driver functions (or
+* macros) that can be used to access the Xilinx ZDMA core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ------------------------------------------------------
+* 1.0   vns     2/27/15  First release
+* 

+*
+******************************************************************************/
+#ifndef XZDMA_HW_H_
+#define XZDMA_HW_H_		/**< Prevent circular inclusions
+				  *  by using protection macros	*/
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+
+/** @name Registers offsets
+ * @{
+ */
+#define XZDMA_ERR_CTRL				(0x000U)
+#define XZDMA_CH_ECO				(0x004U)
+#define XZDMA_CH_ISR_OFFSET			(0x100U)
+#define XZDMA_CH_IMR_OFFSET			(0x104U)
+#define XZDMA_CH_IEN_OFFSET			(0x108U)
+#define XZDMA_CH_IDS_OFFSET			(0x10CU)
+#define XZDMA_CH_CTRL0_OFFSET			(0x110U)
+#define XZDMA_CH_CTRL1_OFFSET			(0x114U)
+#define XZDMA_CH_PERIF_OFFSET			(0x118U)
+#define XZDMA_CH_STS_OFFSET			(0x11CU)
+#define XZDMA_CH_DATA_ATTR_OFFSET		(0x120U)
+#define XZDMA_CH_DSCR_ATTR_OFFSET		(0x124U)
+#define XZDMA_CH_SRC_DSCR_WORD0_OFFSET		(0x128U)
+#define XZDMA_CH_SRC_DSCR_WORD1_OFFSET		(0x12CU)
+#define XZDMA_CH_SRC_DSCR_WORD2_OFFSET		(0x130U)
+#define XZDMA_CH_SRC_DSCR_WORD3_OFFSET		(0x134U)
+#define XZDMA_CH_DST_DSCR_WORD0_OFFSET		(0x138U)
+#define XZDMA_CH_DST_DSCR_WORD1_OFFSET		(0x13CU)
+#define XZDMA_CH_DST_DSCR_WORD2_OFFSET		(0x140U)
+#define XZDMA_CH_DST_DSCR_WORD3_OFFSET		(0x144U)
+#define XZDMA_CH_WR_ONLY_WORD0_OFFSET		(0x148U)
+#define XZDMA_CH_WR_ONLY_WORD1_OFFSET		(0x14CU)
+#define XZDMA_CH_WR_ONLY_WORD2_OFFSET		(0x150U)
+#define XZDMA_CH_WR_ONLY_WORD3_OFFSET		(0x154U)
+#define XZDMA_CH_SRC_START_LSB_OFFSET		(0x158U)
+#define XZDMA_CH_SRC_START_MSB_OFFSET		(0x15CU)
+#define XZDMA_CH_DST_START_LSB_OFFSET		(0x160U)
+#define XZDMA_CH_DST_START_MSB_OFFSET		(0x164U)
+#define XZDMA_CH_SRC_CUR_PYLD_LSB_OFFSET	(0x168U)
+#define XZDMA_CH_SRC_CUR_PYLD_MSB_OFFSET	(0x16CU)
+#define XZDMA_CH_DST_CUR_PYLD_LSB_OFFSET	(0x170U)
+#define XZDMA_CH_DST_CUR_PYLD_MSB_OFFSET	(0x174U)
+#define XZDMA_CH_SRC_CUR_DSCR_LSB_OFFSET	(0x178U)
+#define XZDMA_CH_SRC_CUR_DSCR_MSB_OFFSET	(0x17CU)
+#define XZDMA_CH_DST_CUR_DSCR_LSB_OFFSET	(0x180U)
+#define XZDMA_CH_DST_CUR_DSCR_MSB_OFFSET	(0x184U)
+#define XZDMA_CH_TOTAL_BYTE_OFFSET		(0x188U)
+#define XZDMA_CH_RATE_CNTL_OFFSET		(0x18CU)
+#define XZDMA_CH_IRQ_SRC_ACCT_OFFSET		(0x190U)
+#define XZDMA_CH_IRQ_DST_ACCT_OFFSET		(0x194U)
+#define XZDMA_CH_CTRL2_OFFSET			(0x200U)
+/*@}*/
+
+#define XZDMA_SLCR_SECURE_OFFSET		(0xff4b0024)
+/** @name Interrupt Enable/Disable/Mask/Status registers bit masks and shifts
+ * @{
+ */
+#define XZDMA_IXR_DMA_PAUSE_MASK	(0x00000800U) /**< IXR pause mask */
+#define XZDMA_IXR_DMA_DONE_MASK		(0x00000400U) /**< IXR done mask */
+#define XZDMA_IXR_AXI_WR_DATA_MASK	(0x00000200U) /**< IXR AXI write data
+							*  error mask */
+#define XZDMA_IXR_AXI_RD_DATA_MASK	(0x00000100U) /**< IXR AXI read data
+							*  error mask */
+#define XZDMA_IXR_AXI_RD_DST_DSCR_MASK	(0x00000080U) /**< IXR AXI read
+							*  descriptor error
+							*  mask */
+#define XZDMA_IXR_AXI_RD_SRC_DSCR_MASK	(0x00000040U) /**< IXR AXI write
+							*  descriptor error
+							*  mask */
+#define XZDMA_IXR_DST_ACCT_ERR_MASK	(0x00000020U) /**< IXR DST interrupt
+							*  count overflow
+							*  mask */
+#define XZDMA_IXR_SRC_ACCT_ERR_MASK	(0x00000010U) /**< IXR SRC interrupt
+							*  count overflow
+							*  mask */
+#define XZDMA_IXR_BYTE_CNT_OVRFL_MASK	(0x00000008U) /**< IXR byte count over
+							* flow mask */
+#define XZDMA_IXR_DST_DSCR_DONE_MASK	(0x00000004U) /**< IXR destination
+							*  descriptor done
+							*  mask */
+#define XZDMA_IXR_SRC_DSCR_DONE_MASK	(0x00000002U) /**< IXR source
+							*  descriptor done
+							*  mask */
+#define XZDMA_IXR_INV_APB_MASK		(0x00000001U) /**< IXR invalid APB
+							*  access mask */
+#define XZDMA_IXR_ALL_INTR_MASK		(0x00000FFFU) /**< IXR OR of all the
+							*  interrupts mask */
+#define XZDMA_IXR_DONE_MASK		(0x00000400U) /**< IXR All done mask */
+
+#define XZDMA_IXR_ERR_MASK		(0x00000BF9U) /**< IXR all Error mask*/
+					/**< Or of XZDMA_IXR_AXI_WR_DATA_MASK,
+					  * XZDMA_IXR_AXI_RD_DATA_MASK,
+					  * XZDMA_IXR_AXI_RD_DST_DSCR_MASK,
+					  * XZDMA_IXR_AXI_RD_SRC_DSCR_MASK,
+					  * XZDMA_IXR_INV_APB_MASK,
+					  * XZDMA_IXR_DMA_PAUSE_MASK,
+					  * XZDMA_IXR_BYTE_CNT_OVRFL_MASK,
+					  * XZDMA_IXR_SRC_ACCT_ERR_MASK,
+					  *  XZDMA_IXR_DST_ACCT_ERR_MASK */
+/*@}*/
+
+/** @name Channel Control0 register bit masks and shifts
+ * @{
+ */
+#define XZDMA_CTRL0_OVR_FETCH_MASK	(0x00000080U) /**< Over fetch mask */
+#define XZDMA_CTRL0_POINT_TYPE_MASK	(0x00000040U) /**< Pointer type mask */
+#define XZDMA_CTRL0_MODE_MASK		(0x00000030U) /**< Mode mask */
+#define XZDMA_CTRL0_WRONLY_MASK		(0x00000010U) /**< Write only mask */
+#define XZDMA_CTRL0_RDONLY_MASK		(0x00000020U) /**< Read only mask */
+#define XZDMA_CTRL0_RATE_CNTL_MASK	(0x00000008U) /**< Rate control mask */
+#define XZDMA_CTRL0_CONT_ADDR_MASK	(0x00000004U) /**< Continue address
+							*  specified mask */
+#define XZDMA_CTRL0_CONT_MASK		(0x00000002U) /**< Continue mask */
+
+#define XZDMA_CTRL0_OVR_FETCH_SHIFT	(7U)	/**< Over fetch shift */
+#define XZDMA_CTRL0_POINT_TYPE_SHIFT	(6U)	/**< Pointer type shift */
+#define XZDMA_CTRL0_MODE_SHIFT		(4U)	/**< Mode type shift */
+#define XZDMA_CTRL0_RESET_VALUE		(0x00000080U) /**< CTRL0 reset value */
+
+/*@}*/
+
+/** @name Channel Control1 register bit masks and shifts
+ * @{
+ */
+#define XZDMA_CTRL1_SRC_ISSUE_MASK	(0x0000001FU) /**< Source issue mask */
+#define XZDMA_CTRL1_RESET_VALUE		(0x000003FFU) /**< CTRL1 reset value */
+/*@}*/
+
+/** @name Channel Peripheral register bit masks and shifts
+ * @{
+ */
+#define XZDMA_PERIF_PROG_CELL_CNT_MASK	(0x0000003EU) /**< Peripheral program
+							*  cell count */
+#define XZDMA_PERIF_SIDE_MASK		(0x00000002U) /**< Interface attached
+							* the side mask */
+#define XZDMA_PERIF_EN_MASK		(0x00000001U) /**< Peripheral flow
+							* control mask */
+/*@}*/
+
+/** @name Channel Status register bit masks and shifts
+ * @{
+ */
+#define XZDMA_STS_DONE_ERR_MASK	(0x00000003U) /**< Done with errors mask */
+#define XZDMA_STS_BUSY_MASK	(0x00000002U) /**< ZDMA is busy in transfer
+						*  mask */
+#define XZDMA_STS_PAUSE_MASK	(0x00000001U) /**< ZDMA is in Pause state
+						*  mask */
+#define XZDMA_STS_DONE_MASK	(0x00000000U) /**< ZDMA done mask */
+#define XZDMA_STS_ALL_MASK	(0x00000003U) /**< ZDMA status mask */
+
+/*@}*/
+
+/** @name Channel Data Attribute register bit masks and shifts
+ * @{
+ */
+#define XZDMA_DATA_ATTR_ARBURST_MASK	(0x0C000000U) /**< Data ArBurst mask */
+#define XZDMA_DATA_ATTR_ARCACHE_MASK	(0x03C00000U) /**< Data ArCache mask */
+#define XZDMA_DATA_ATTR_ARQOS_MASK	(0x003C0000U) /**< Data ARQos masks */
+#define XZDMA_DATA_ATTR_ARLEN_MASK	(0x0003C000U) /**< Data Arlen mask */
+#define XZDMA_DATA_ATTR_AWBURST_MASK	(0x00003000U) /**< Data Awburst mask */
+#define XZDMA_DATA_ATTR_AWCACHE_MASK	(0x00000F00U) /**< Data AwCache mask */
+#define XZDMA_DATA_ATTR_AWQOS_MASK	(0x000000F0U) /**< Data AwQos mask */
+#define XZDMA_DATA_ATTR_AWLEN_MASK	(0x0000000FU) /**< Data Awlen mask */
+
+#define XZDMA_DATA_ATTR_ARBURST_SHIFT	(26U) /**< Data Arburst shift */
+#define XZDMA_DATA_ATTR_ARCACHE_SHIFT	(22U) /**< Data ArCache shift */
+#define XZDMA_DATA_ATTR_ARQOS_SHIFT	(18U) /**< Data ARQos shift */
+#define XZDMA_DATA_ATTR_ARLEN_SHIFT	(14U) /**< Data Arlen shift */
+#define XZDMA_DATA_ATTR_AWBURST_SHIFT	(12U) /**< Data Awburst shift  */
+#define XZDMA_DATA_ATTR_AWCACHE_SHIFT	(8U)  /**< Data Awcache shift */
+#define XZDMA_DATA_ATTR_AWQOS_SHIFT	(4U)  /**< Data Awqos shift */
+#define XZDMA_DATA_ATTR_RESET_VALUE	(0x0483D20FU) /**< Data Attributes
+							*  reset value */
+
+/*@}*/
+
+/** @name Channel DSCR Attribute register bit masks and shifts
+ * @{
+ */
+#define XZDMA_DSCR_ATTR_AXCOHRNT_MASK	(0x00000100U) /**< Descriptor coherent
+							*  mask */
+#define XZDMA_DSCR_ATTR_AXCACHE_MASK	(0x000000F0U) /**< Descriptor cache
+							* mask */
+#define XZDMA_DSCR_ATTR_AXQOS_MASK	(0x0000000FU) /**< Descriptor AxQos
+							*  mask */
+
+#define XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT	(8U) /**< Descriptor coherent shift */
+#define XZDMA_DSCR_ATTR_AXCACHE_SHIFT	(4U) /**< Descriptor cache shift */
+#define XZDMA_DSCR_ATTR_RESET_VALUE	(0x00000000U) /**< Dscr Attributes
+							*  reset value */
+
+/*@}*/
+
+/** @name Channel Source/Destination Word0 register bit mask
+ * @{
+ */
+#define XZDMA_WORD0_LSB_MASK	(0xFFFFFFFFU)	/**< LSB Address mask */
+/*@}*/
+
+/** @name Channel Source/Destination Word1 register bit mask
+ * @{
+ */
+#define XZDMA_WORD1_MSB_MASK	(0x0001FFFFU)	/**< MSB Address mask */
+#define XZDMA_WORD1_MSB_SHIFT	(32U)		/**< MSB Address shift */
+/*@}*/
+
+/** @name Channel Source/Destination Word2 register bit mask
+ * @{
+ */
+#define XZDMA_WORD2_SIZE_MASK	(0x3FFFFFFFU) /**< Size mask */
+/*@}*/
+
+/** @name Channel Source/Destination Word3 register bit masks and shifts
+ * @{
+ */
+#define XZDMA_WORD3_CMD_MASK		(0x00000018U)	/**< Cmd mask */
+#define XZDMA_WORD3_CMD_SHIFT		(3U)		/**< Cmd shift */
+#define XZDMA_WORD3_CMD_NXTVALID_MASK	(0x00000000U)	/**< Next Dscr is valid
+							  *  mask */
+#define XZDMA_WORD3_CMD_PAUSE_MASK	(0x00000008U)	/**< Pause after this
+							  * dscr mask */
+#define XZDMA_WORD3_CMD_STOP_MASK	(0x00000010U)	/**< Stop after this
+							..*  dscr mask */
+#define XZDMA_WORD3_INTR_MASK		(0x00000004U)	/**< Interrupt
+							  *  enable or disable
+							  *  mask */
+#define XZDMA_WORD3_INTR_SHIFT		(2U)		/**< Interrupt enable
+							  *  disable
+							  *  shift */
+#define XZDMA_WORD3_TYPE_MASK		(0x00000002U)	/**< Type of Descriptor
+							  *  mask */
+#define XZDMA_WORD3_TYPE_SHIFT		(1U)		/**< Type of Descriptor
+							  *  Shift */
+#define XZDMA_WORD3_COHRNT_MASK		(0x00000001U)	/**< Coherence mask */
+/*@}*/
+
+/** @name Channel Source/Destination start address or current payload
+ *  MSB register bit mask
+ * @{
+ */
+#define XZDMA_START_MSB_ADDR_MASK	(0x0001FFFFU)	/**< Start msb address
+							  *  mask */
+/*@}*/
+
+/** @name Channel Rate control count register bit mask
+ * @{
+ */
+#define XZDMA_CH_RATE_CNTL_MASK		(0x00000FFFU) /**< Channel rate control
+							*  mask */
+/*@}*/
+
+/** @name Channel Source/Destination Interrupt account count register bit mask
+ * @{
+ */
+#define XZDMA_CH_IRQ_ACCT_MASK		(0x000000FFU) /**< Interrupt count
+							*  mask */
+/*@}*/
+
+/** @name Channel debug register 0/1 bit mask
+ * @{
+ */
+#define XZDMA_CH_DBG_CMN_BUF_MASK	(0x000001FFU) /**< Common buffer count
+							* mask */
+/*@}*/
+
+/** @name Channel control2 register bit mask
+ * @{
+ */
+#define XZDMA_CH_CTRL2_EN_MASK		(0x00000001U) /**< Channel enable
+							*  mask */
+#define XZDMA_CH_CTRL2_DIS_MASK		(0x00000000U) /**< Channel disable
+							*  mask */
+/*@}*/
+
+/** @name Channel control2 register bit mask
+ * @{
+ */
+ #define XZDMA_WRITE_TO_CLEAR_MASK	(0x00000000U) /**< Write to clear
+							*  mask */
+ /*@}*/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define XZDma_In32		Xil_In32	/**< Input operation */
+#define XZDma_Out32		Xil_Out32	/**< Output operation */
+
+/*****************************************************************************/
+/**
+*
+* This macro reads the given register.
+*
+* @param	BaseAddress is the Xilinx base address of the ZDMA core.
+* @param	RegOffset is the register offset of the register.
+*
+* @return	The 32-bit value of the register.
+*
+* @note		C-style signature:
+*		u32 XZDma_ReadReg(u32 BaseAddress, u32 RegOffset)
+*
+******************************************************************************/
+#define XZDma_ReadReg(BaseAddress, RegOffset) \
+		XZDma_In32((BaseAddress) + (u32)(RegOffset))
+
+/*****************************************************************************/
+/**
+*
+* This macro writes the value into the given register.
+*
+* @param	BaseAddress is the Xilinx base address of the ZDMA core.
+* @param	RegOffset is the register offset of the register.
+* @param	Data is the 32-bit value to write to the register.
+*
+* @return	None.
+*
+* @note		C-style signature:
+*		void XZDma_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
+*
+******************************************************************************/
+#define XZDma_WriteReg(BaseAddress, RegOffset, Data) \
+		XZDma_Out32(((BaseAddress) + (u32)(RegOffset)), (u32)(Data))
+
+#ifdef __cplusplus
+}
+
+#endif
+
+#endif /* XZDMA_HW_H_ */
+/** @} */
diff --git a/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_intr.c b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_intr.c
new file mode 100644
index 0000000..0e6af86
--- /dev/null
+++ b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_intr.c
@@ -0,0 +1,205 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xzdma_intr.c
+* @addtogroup zdma_v1_5
+* @{
+*
+* This file contains interrupt related functions of Xilinx ZDMA core.
+* Please see xzdma.h for more details of the driver.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ------------------------------------------------------
+* 1.0   vns     2/27/15  First release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xzdma.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/************************** Function Definitions *****************************/
+
+
+/*****************************************************************************/
+/**
+*
+* This function is the interrupt handler for the ZDMA core.
+*
+* This handler reads the pending interrupt from Status register, determines the
+* source of the interrupts and calls the respective callbacks for the
+* interrupts that are enabled in IRQ_ENABLE register, and finally clears the
+* interrupts.
+*
+* The application is responsible for connecting this function to the interrupt
+* system. Application beyond this driver is also responsible for providing
+* callbacks to handle interrupts and installing the callbacks using
+* XZDma_SetCallBack() during initialization phase. .
+*
+* @param	Instance is a pointer to the XZDma instance to be worked on.
+*
+* @return	None.
+*
+* @note		To generate interrupt required interrupts should be enabled.
+*
+******************************************************************************/
+void XZDma_IntrHandler(void *Instance)
+{
+	u32 PendingIntr;
+	u32 ErrorStatus;
+	XZDma *InstancePtr = NULL;
+	InstancePtr = (XZDma *)((void *)Instance);
+
+	/* Verify arguments. */
+	Xil_AssertVoid(InstancePtr != NULL);
+
+	/* Get pending interrupts */
+	PendingIntr = (u32)(XZDma_IntrGetStatus(InstancePtr));
+	PendingIntr &= (~XZDma_GetIntrMask(InstancePtr));
+
+	/* ZDMA transfer has completed */
+	ErrorStatus = (PendingIntr) & (XZDMA_IXR_DMA_DONE_MASK);
+	if ((ErrorStatus) != 0U) {
+		XZDma_DisableIntr(InstancePtr, XZDMA_IXR_ALL_INTR_MASK);
+		InstancePtr->ChannelState = XZDMA_IDLE;
+		InstancePtr->DoneHandler(InstancePtr->DoneRef);
+	}
+
+	/* An error has been occurred */
+	ErrorStatus = PendingIntr & (XZDMA_IXR_ERR_MASK);
+	if ((ErrorStatus) != 0U) {
+		if ((ErrorStatus & XZDMA_IXR_DMA_PAUSE_MASK) ==
+				XZDMA_IXR_DMA_PAUSE_MASK) {
+			InstancePtr->ChannelState = XZDMA_PAUSE;
+		}
+		else {
+			if ((ErrorStatus & (XZDMA_IXR_AXI_WR_DATA_MASK |
+				XZDMA_IXR_AXI_RD_DATA_MASK |
+				XZDMA_IXR_AXI_RD_DST_DSCR_MASK |
+				XZDMA_IXR_AXI_RD_SRC_DSCR_MASK)) != 0x00U) {
+				InstancePtr->ChannelState = XZDMA_IDLE;
+			}
+		}
+		InstancePtr->ErrorHandler(InstancePtr->ErrorRef, ErrorStatus);
+	}
+
+	/* Clear pending interrupt(s) */
+	XZDma_IntrClear(InstancePtr, PendingIntr);
+}
+
+/*****************************************************************************/
+/**
+*
+* This routine installs an asynchronous callback function for the given
+* HandlerType.
+*
+* 
+* HandlerType              Callback Function Type
+* -----------------------  --------------------------------------------------
+* XZDMA_HANDLER_DONE	   Done handler
+* XZDMA_HANDLER_ERROR	   Error handler
+*
+* 

+*
+* @param	InstancePtr is a pointer to the XZDma instance to be worked on.
+* @param	HandlerType specifies which callback is to be attached.
+* @param	CallBackFunc is the address of the callback function.
+* @param	CallBackRef is a user data item that will be passed to the
+* 		callback function when it is invoked.
+*
+* @return
+*		- XST_SUCCESS when handler is installed.
+*		- XST_INVALID_PARAM when HandlerType is invalid.
+*
+* @note		Invoking this function for a handler that already has been
+*		installed replaces it with the new handler.
+*
+******************************************************************************/
+s32 XZDma_SetCallBack(XZDma *InstancePtr, XZDma_Handler HandlerType,
+	void *CallBackFunc, void *CallBackRef)
+{
+	s32 Status;
+
+	/* Verify arguments. */
+	Xil_AssertNonvoid(InstancePtr != NULL);
+	Xil_AssertNonvoid(CallBackFunc != NULL);
+	Xil_AssertNonvoid(CallBackRef != NULL);
+	Xil_AssertNonvoid((HandlerType == XZDMA_HANDLER_DONE) ||
+				(HandlerType == XZDMA_HANDLER_ERROR));
+	Xil_AssertNonvoid(InstancePtr->IsReady ==
+				(u32)(XIL_COMPONENT_IS_READY));
+
+	/*
+	 * Calls the respective callback function corresponding to
+	 * the handler type
+	 */
+	switch (HandlerType) {
+		case XZDMA_HANDLER_DONE:
+			InstancePtr->DoneHandler =
+				(XZDma_DoneHandler)((void *)CallBackFunc);
+			InstancePtr->DoneRef = CallBackRef;
+			Status = (XST_SUCCESS);
+			break;
+
+		case XZDMA_HANDLER_ERROR:
+			InstancePtr->ErrorHandler =
+				(XZDma_ErrorHandler)((void *)CallBackFunc);
+			InstancePtr->ErrorRef = CallBackRef;
+			Status = (XST_SUCCESS);
+			break;
+
+		default:
+			Status = (XST_INVALID_PARAM);
+			break;
+	}
+
+	return Status;
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_selftest.c b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_selftest.c
new file mode 100644
index 0000000..9e8b9dc
--- /dev/null
+++ b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_selftest.c
@@ -0,0 +1,119 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xzdma_selftest.c
+* @addtogroup zdma_v1_5
+* @{
+*
+* This file contains the self-test function for the ZDMA core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ------------------------------------------------------
+* 1.0   vns     2/27/15  First release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xzdma.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/************************** Function Definitions *****************************/
+
+/*****************************************************************************/
+/**
+*
+* This file contains a diagnostic self-test function for the ZDMA driver.
+* Refer to the header file xzdma.h for more detailed information.
+*
+* @param	InstancePtr is a pointer to XZDma instance.
+*
+* @return
+*		- XST_SUCCESS if the test is successful.
+*		- XST_FAILURE if the test is failed.
+*
+* @note		None.
+*
+******************************************************************************/
+s32 XZDma_SelfTest(XZDma *InstancePtr)
+{
+
+	u32 Data;
+	s32 Status;
+
+	Xil_AssertNonvoid(InstancePtr != NULL);
+
+	Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
+				XZDMA_CH_CTRL0_OFFSET);
+
+	/* Changing DMA channel to over fetch */
+
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_CTRL0_OFFSET,
+			(Data | XZDMA_CTRL0_OVR_FETCH_MASK));
+
+	if (((u32)XZDma_ReadReg(InstancePtr->Config.BaseAddress,
+		XZDMA_CH_CTRL0_OFFSET) & XZDMA_CTRL0_OVR_FETCH_MASK) !=
+						XZDMA_CTRL0_OVR_FETCH_MASK) {
+		Status = (s32)XST_FAILURE;
+	}
+	else {
+		Status = (s32)XST_SUCCESS;
+	}
+
+	/* Retrieving the change settings */
+	XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_CTRL0_OFFSET,
+				Data);
+
+	return Status;
+
+}
+/** @} */
diff --git a/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_sinit.c b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_sinit.c
new file mode 100644
index 0000000..b033d46
--- /dev/null
+++ b/src/Xilinx/libsrc/zdma_v1_5/src/xzdma_sinit.c
@@ -0,0 +1,106 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xzdma_sinit.c
+* @addtogroup zdma_v1_5
+* @{
+*
+* This file contains static initialization methods for Xilinx ZDMA core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------  -------- ------------------------------------------------------
+* 1.0   vns     2/27/15  First release
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xzdma.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/************************** Variable Definitions *****************************/
+
+
+/************************** Function Definitions *****************************/
+
+/*****************************************************************************/
+/**
+*
+* XZDma_LookupConfig returns a reference to an XZDma_Config structure
+* based on the unique device id, DeviceId. The return value will refer
+* to an entry in the device configuration table defined in the xzdma_g.c
+* file.
+*
+* @param	DeviceId is the unique device ID of the device for the lookup
+*		operation.
+*
+* @return	CfgPtr is a reference to a config record in the configuration
+*		table (in xzdma_g.c) corresponding to DeviceId, or
+*		NULL if no match is found.
+*
+* @note		None.
+******************************************************************************/
+XZDma_Config *XZDma_LookupConfig(u16 DeviceId)
+{
+	extern XZDma_Config XZDma_ConfigTable[XPAR_XZDMA_NUM_INSTANCES];
+	XZDma_Config *CfgPtr = NULL;
+	u32 Index;
+
+	/* Checks all the instances */
+	for (Index = (u32)0x0; Index < (u32)(XPAR_XZDMA_NUM_INSTANCES);
+								Index++) {
+		if (XZDma_ConfigTable[Index].DeviceId == DeviceId) {
+			CfgPtr = &XZDma_ConfigTable[Index];
+			break;
+		}
+	}
+
+	return (XZDma_Config *)CfgPtr;
+}
+/** @} */
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diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Cfg/Template/can_cfg.c b/src/ucos_v1_42/micrium_source/uC-CAN/Cfg/Template/can_cfg.c
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--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Cfg/Template/can_cfg.c
@@ -0,0 +1,300 @@
+/*
+*********************************************************************************************************
+*                                                uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         uC/CAN CONFIGURATION
+*
+*                                               TEMPLATE
+*
+* Filename      : can_cfg.c
+* Version       : V2.42.00
+* Programmer(s) : E0
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               INCLUDES
+*********************************************************************************************************
+*/
+
+#include  "can_cfg.h"
+#include  "can_sig.h"
+#include  "can_bus.h"
+#include  "can_frm.h"
+#include  "can_msg.h"
+#include  "can_os.h"
+#include  "drv_can.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#if (CANSIG_GRANULARITY == CAN_CFG_BIT)
+#define  CAN_CFG_SIZE_MOD           8u
+#else
+#define  CAN_CFG_SIZE_MOD           1u
+#endif
+
+#define  CAN_CFG_LITTLE_ENDIAN      1u
+
+#if  (CAN_CFG_LITTLE_ENDIAN == 1u)
+#define  CAN_CFG_ENDIAN             CANFRM_LITTLE_ENDIAN
+#else
+#define  CAN_CFG_ENDIAN             CANFRM_BIG_ENDIAN
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                              LOCAL DATA
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    CAN SIGNAL CALLBACK DEFINITION
+*
+* Description : Prototype of Signal Callback Function. This is only an example to be replaced by
+*               one or more user Callback Functions.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (CANSIG_CALLBACK_EN == 1u)
+void  CallBackFct(void*  arg, CANSIG_VAL_T*  value, CPU_INT32U  CallbackId);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             GLOBAL DATA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             CAN SIGNALS
+*
+* Description : Allocation of CAN Signals
+*
+* Note(s)     : This table must be modified by the user to define all Signals needed for the
+*               Application. The below defined Signals are only examples and might be modified or
+*               removed.
+*********************************************************************************************************
+*/
+
+const  CANSIG_PARA  CanSig[CANSIG_N] = {
+                                                                /* ---------------- SIGNAL NODESTATUS ----------------- */
+    {CANSIG_UNCHANGED,                                          /*      Initial Status                                  */ 
+      1,                                                        /*      Width in Bytes                                  */ 
+      0,                                                        /*      Initial Value                                   */ 
+#if (CANSIG_CALLBACK_EN > 0)
+      0},                                                       /*      Callback Function: User Defined                 */ 
+#else
+    },
+#endif
+                                                                /* ----------------- SIGNAL CPULOAD ------------------- */ 
+    {CANSIG_UNCHANGED,                                          /*      Initial Status                                  */ 
+      1,                                                        /*      Width in Bytes                                  */ 
+      0,                                                        /*      Initial Value                                   */ 
+#if (CANSIG_CALLBACK_EN > 0)
+      0}                                                        /*      No Callback                                     */ 
+#else
+    },
+#endif
+}; 
+
+
+/*
+*********************************************************************************************************
+*                                             CAN MESSAGES
+*
+* Description : Allocation of CAN Messages
+*
+* Note(s)     : This Table must be modified by the user to define all Messages needed for 
+*               the Application. The below defined Messages are only examples and might be
+*               modified or removed.
+*********************************************************************************************************
+*/
+
+const  CANMSG_PARA  CanMsg[CANMSG_N] = 
+{ 
+                                                                /* ------------------ MESSAGE STATUS ------------------ */
+   { 0x123L,                                                    /*      CAN-Identifier                                  */  
+     CANMSG_TX,                                                 /*      Message Type                                    */ 
+     3,                                                         /*      DLC of Message                                  */ 
+     3,                                                         /*      No. of Links                                    */ 
+      { { S_NODESTATUS,                                         /*      Signal ID                                       */ 
+         0 },                                                   /*      Byte Position                                   */ 
+        { S_CPULOAD,                                            /*      Signal ID                                       */ 
+         2 }                                                    /*      Byte Position                                   */ 
+      },
+   },
+
+                                                                /* ----------------- MESSAGE COMMAND ------------------ */
+   { 0x122L,                                                    /*      CAN-Identifier                                  */ 
+     CANMSG_RX,                                                 /*      Message Type                                    */ 
+     1,                                                         /*      DLC of Message                                  */ 
+     1,                                                         /*      No. of Links                                    */ 
+     { { S_NODESTATUS,                                          /*      Signal ID                                       */ 
+         0 }                                                    /*      Byte Position                                   */ 
+     }
+   }
+}; 
+
+
+/*
+*********************************************************************************************************
+*                                       CAN SIGNAL CONFIGURATION
+*
+* Description : Allocation of Global CAN Signal Table.
+*
+* Note(s)     : This is the Signal Table on which the CAN
+*               Signal Layer will work. If the CANSIG_STATIC Configuration is chosen it will be
+*               initialized with the CanCfg_Init() Function otherwise it will be filled by calling
+*               CanSigCreate().
+*********************************************************************************************************
+*/
+
+CANSIG_DATA  CanSigTbl[CANSIG_N];
+
+
+/*
+*********************************************************************************************************
+*                                        CAN BUS CONFIGURATION
+*
+* Description : This structure contains the information for a bus for Can Controller 0.
+*               A bus represents one interface to the world.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+const CANBUS_PARA CanCfg = {
+    CAN_FALSE,                                                  /* EXTENDED FLAG                                        */
+    CAN_DEFAULT_BAUDRATE,                                       /* BAUDRATE                                             */
+    0u,                                                         /* BUS NODE                                             */
+    0u,                                                         /* BUS DEVICE                                           */
+                                                                /* DRIVER FUNCTIONS                                     */
+    _CAN_Init,                                        /*      Init                                            */
+    _CAN_Open,                                        /*      Open                                            */
+    _CAN_Close,                                       /*      Close                                           */
+    _CAN_IoCtl,                                       /*      IoCtl                                           */
+    _CAN_Read,                                        /*      Read                                            */
+    _CAN_Write,                                       /*      Write                                           */
+    {                                                           /* DRIVER IO FUNCTION CODES                             */
+        IO__CAN_SET_BAUDRATE,                         /*      Set Baud Rate                                   */
+        IO__CAN_START,                                /*      Start                                           */
+        IO__CAN_STOP,                                 /*      Stop                                            */
+        IO__CAN_RX_STANDARD,                          /*      Rx Standard                                     */
+        IO__CAN_RX_EXTENDED,                          /*      Rx Extended                                     */
+        IO__CAN_TX_READY,                             /*      Tx Ready                                        */
+        IO__CAN_GET_NODE_STATUS,                      /*      Get Node Status                                 */
+    }
+};
+
+
+/*
+*********************************************************************************************************
+*                                       CAN BUS NODE STATUS HOOK
+*
+* Description : This function is a hook function called by CanBusNSHandler() when CANBUS_HOOK_NS_EN found
+*               in 'can_cfg.h' is set to 1.
+*
+* Argument(s) : busId       BusId passed by CanBusNSHandler.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CanBusNSHandler()
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (CANBUS_HOOK_NS_EN == 1u)
+void  CanBusNSHook (CPU_INT16S  busId)
+{
+    (void)&busId;                                               /* Prevent Compiler Warning                             */
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                           CAN BUS RX HOOK
+*
+* Description : This function is a hook function called by CanBusRxHandler() when CANBUS_HOOK_RX_EN found
+*               in 'can_cfg.h' is set to 1.
+*
+* Argument(s) : busId       BusId passed by CanBusRxHandler.
+*               buffer      Buffer of CAN Frame Received.
+*
+* Return(s)   : Error code:  0 = No Error
+*                           -1 = Error Occurred.
+*
+* Caller(s)   : CanBusRxHandler()
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (CANBUS_HOOK_RX_EN == 1u)
+CPU_INT16S  CanBusRxHook (CPU_INT16S  busId, void  *buffer)
+{
+    (void)&busId;                                               /* Prevent Compiler Warning                             */
+    (void)&buffer;                                              /* Prevent Compiler Warning                             */
+
+    return (0);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          CALLBACK FUNCTION
+*
+* Description : This function is the callback function example of the CAN signal layer. It
+*               has to be replaced by one or more user callback functions.
+*
+* Arguments   : arg         Pointer to signal
+*               value       Value of signal
+*               CallbackId  ID to identify where this callback function was called from
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (CANSIG_CALLBACK_EN == 1u)
+void  CallBackFct(void*  arg, CANSIG_VAL_T*  value, CPU_INT32U  CallbackId)
+{
+    (void)&CallbackId;                                          /* Prevent Compiler Warning                             */
+    (void)&value;                                               /* Prevent Compiler Warning                             */
+    (void)&arg;                                                 /* Prevent Compiler Warning                             */
+
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Cfg/Template/can_cfg.h b/src/ucos_v1_42/micrium_source/uC-CAN/Cfg/Template/can_cfg.h
new file mode 100644
index 0000000..7f30dae
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Cfg/Template/can_cfg.h
@@ -0,0 +1,295 @@
+/*
+*********************************************************************************************************
+*                                                uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         uC/CAN CONFIGURATION
+*
+*                                               TEMPLATE
+*
+* Filename      : can_cfg.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+*********************************************************************************************************
+*/
+
+#ifndef _CAN_CFG_H_
+#define _CAN_CFG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            CONFIGURATION
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            COMMON DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* Definiton for CANSIG_GRANULARITY, Options:           */
+#define  CAN_CFG_BIT                            0u              /*      BIT                                             */
+#define  CAN_CFG_BYTE                           1u              /*      BYTE                                            */
+
+#ifndef  CAN_FALSE
+#define  CAN_FALSE                              0u
+#endif
+
+#ifndef  CAN_TRUE
+#define  CAN_TRUE                               1u
+#endif
+
+#ifndef  NULL_PTR
+#define  NULL_PTR                              (void *)0
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               CAN BUS
+*********************************************************************************************************
+*/
+
+#define  CANBUS_EN                              1u              /* Enable CAN Bus Management                            */
+#define  CANBUS_N                               3u              /*   Number of busses                                   */
+#define  CANBUS_ARG_CHK_EN                      1u              /*   Enable runtime argument checking                   */
+#define  CANBUS_TX_HANDLER_EN                   1u              /*   Enable usage of CanBusTxHandler                    */
+#define  CANBUS_RX_HANDLER_EN                   1u              /*   Enable usage of CanBusRxHandler                    */
+#define  CANBUS_NS_HANDLER_EN                   1u              /*   Enable usage of CanBusNsHandler                    */
+												  
+#define  CANBUS_STAT_EN                         1u              /*   Enable Bus Statistics                              */
+#define  CANBUS_TX_QSIZE                 (2u * CANBUS_N)        /*   Transmit Queue Size in CAN Frames for each CAN Bus */
+#define  CANBUS_RX_QSIZE                 (2u * CANBUS_N)        /*   Receive Queue Size in CAN Frames for each CAN Bus  */
+
+#define  CANBUS_HOOK_NS_EN                      1u              /*   Enable Node Status Handler Hook Function           */
+#define  CANBUS_HOOK_RX_EN                      1u              /*   Enable Rx Handler Hook Function                    */
+#define  CANBUS_RX_READ_ALWAYS_EN               1u              /*   If enabled the Rx Handler executes a read even..   */
+                                                                /*   .. when frames can't be allocated                  */
+
+
+/*
+*********************************************************************************************************
+*                                             CAN MESSAGE
+*********************************************************************************************************
+*/
+
+#define  CANMSG_EN                              1u              /* Enable CAN Message Support                           */
+#define  CANMSG_N                               2u              /*   Number of messages                                 */
+#define  CANMSG_ARG_CHK_EN                      1u              /*   Enable runtime argument checking                   */
+
+
+/*
+*********************************************************************************************************
+*                                             CAN SIGNAL
+*********************************************************************************************************
+*/
+
+#define  CANSIG_EN                              1u              /* Enable CAN Signal Database                           */
+#define  CANSIG_N                               3u              /*   Number of signals                                  */
+#define  CANSIG_ARG_CHK_EN                      1u              /*   Enable runtime argument checking                   */
+#define  CANSIG_MAX_WIDTH                       4u              /*   Maximal signal width in byte                       */
+#define  CANSIG_GRANULARITY               CAN_CFG_BYTE          /*   Set signal resolution to byte                      */
+#define  CANSIG_STATIC_CONFIG                   1u              /* To reduce memory usage, declare static signal table  */
+#define  CANSIG_USE_DELETE                      0u              /* To reduce memory usage don't use delete functions    */
+#define  CANSIG_CALLBACK_EN                     0u              /* Enable callback functions                            */
+
+
+/*
+*********************************************************************************************************
+*                                              CAN FRAME
+*********************************************************************************************************
+*/
+
+#define  CANFRM_ARG_CHK_EN                      1u              /* Enable runtime argument checking                     */
+
+
+/*
+*********************************************************************************************************
+*                                               CAN OS
+*********************************************************************************************************
+*/
+
+#define  CANOS_ARG_CHK_EN                       1u              /* Enable runtime argument checking                     */
+
+
+/*  
+*********************************************************************************************************
+*                                       DRIVER SPECIFIC DEFINES
+*********************************************************************************************************
+*/
+                                                                /* ---------------- BAUDRATE SETTINGS ----------------- */
+#define  CAN_DEFAULT_BAUDRATE             1000000u              /* Default Baudrate                                     */
+#define  CAN_DEFAULT_SP                       750u              /* Default Bit Sample Point in 1/10 %                   */
+#define  CAN_DEFAULT_RJW                      125u              /* Default Re-Synch Jump Width in 1/10 %                */
+
+                                                                /* ---------------- TIMEOUT SETTINGS ------------------ */
+#define  CAN_TIMEOUT_ERR_VAL               100000uL             /* Timeout Value for While Loop Error Checks            */
+
+
+/*
+*********************************************************************************************************
+*                                     APPLICATION SPECIFIC DEFINES
+*********************************************************************************************************
+*/
+                                                                /* ------------ APPLICATION ENUMERATIONS -------------- */
+enum {
+   S_NODESTATUS = 0, 
+   S_CPULOAD, 
+   S_COUNTER, 
+   S_MAX,
+};
+
+enum {
+   M_STATUS = 0, 
+   M_COMMAND, 
+   M_MAX
+};
+
+
+/*
+*********************************************************************************************************
+*                                         CONFIGURATION ERRORS 
+*********************************************************************************************************
+*/
+                                                                /* ---------------------- CAN OS ---------------------- */
+#if  ((CANOS_ARG_CHK_EN < 0u) || (CANOS_ARG_CHK_EN > 1u))
+#error "CANOS_ARG_CHK_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+                                                                /* --------------------- CAN FRAME -------------------- */
+#if  ((CANFRM_ARG_CHK_EN < 0u) || (CANFRM_ARG_CHK_EN > 1u))
+#error "CANFRM_ARG_CHK_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+                                                                /* -------------------- CAN SIGNALS ------------------- */
+#if  ((CANSIG_EN < 0u) || (CANSIG_EN > 1u))
+#error "CANSIG_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANSIG_N < 1u) || (CANSIG_N > 32767u))
+#error "CANSIG_N is invalid; check definition to be in range 1 ... 32767!"
+#endif
+
+#if  ((CANSIG_ARG_CHK_EN < 0u) || (CANSIG_ARG_CHK_EN > 1u))
+#error "CANSIG_ARG_CHK_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANSIG_MAX_WIDTH != 1u) && (CANSIG_MAX_WIDTH != 2u) && (CANSIG_MAX_WIDTH != 4u))
+#error "CANSIG_MAX_WIDTH is invalid; check definition to be 1, 2 or 4!"
+#endif
+
+#if  ((CANSIG_GRANULARITY < 0u) || (CANSIG_GRANULARITY > 1u))
+#error "CANSIG_GRANULARITY is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANSIG_STATIC_CONFIG < 0u) || (CANSIG_STATIC_CONFIG > 1u))
+#error "CANSIG_STATIC_CONFIG is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANSIG_USE_DELETE < 0u) || (CANSIG_USE_DELETE > 1u))
+#error "CANSIG_USE_DELETE is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANSIG_CALLBACK_EN < 0u) || (CANSIG_CALLBACK_EN > 1u))
+#error "CANSIG_CALLBACK_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+                                                                /* ------------------- CAN MESSAGES ------------------- */
+#if  ((CANMSG_EN < 0u) || (CANMSG_EN > 1u))
+#error "CANMSG_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANMSG_N < 1u) || (CANMSG_N > 32767u))
+#error "CANMSG_N is invalid; check definition to be in range 1 ... 32767!"
+#endif
+
+#if  ((CANMSG_ARG_CHK_EN < 0u) || (CANMSG_ARG_CHK_EN > 1u))
+#error "CANMSG_ARG_CHK_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+                                                                /* ---------------------- CAN BUS --------------------- */
+#if  ((CANBUS_EN < 0u) || (CANBUS_EN > 1u))
+#error "CANBUS_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if   (CANBUS_N < 1u)
+#error "CANBUS_N is invalid; check definition to be greater than 0!"
+#endif
+
+#if  ((CANBUS_ARG_CHK_EN < 0u) || (CANBUS_ARG_CHK_EN > 1u))
+#error "CANBUS_ARG_CHK_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANBUS_TX_HANDLER_EN < 0u) || (CANBUS_TX_HANDLER_EN > 1u))
+#error "CANBUS_TX_HANDLER_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANBUS_RX_HANDLER_EN < 0u) || (CANBUS_RX_HANDLER_EN > 1u))
+#error "CANBUS_RX_HANDLER_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANBUS_NS_HANDLER_EN < 0u) || (CANBUS_NS_HANDLER_EN > 1u))
+#error "CANBUS_NS_HANDLER_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANBUS_STAT_EN < 0u) || (CANBUS_STAT_EN > 1u))
+#error "CANBUS_STAT_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if   (CANBUS_RX_QSIZE < 1u)
+#error "CANBUS_RX_QSIZE is invalid; check definition to be greater than 0!"
+#endif
+
+#if   (CANBUS_TX_QSIZE < 1u)
+#error "CANBUS_TX_QSIZE is invalid; check definition to be greater than 0!"
+#endif
+
+#if  ((CANBUS_HOOK_RX_EN < 0u) || (CANBUS_HOOK_RX_EN > 1u))
+#error "CANBUS_HOOK_RX_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANBUS_HOOK_NS_EN < 0u) || (CANBUS_HOOK_NS_EN > 1u))
+#error "CANBUS_HOOK_NS_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+#if  ((CANBUS_RX_READ_ALWAYS_EN < 0u) || (CANBUS_RX_READ_ALWAYS_EN > 1u))
+#error "CANBUS_RX_READ_ALWAYS_EN is invalid; check definition to be 0 or 1!"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          CONFIGURATION END
+*********************************************************************************************************
+*/
+
+#ifdef __cplusplus                                              /* #endif 'C' Extern.                                   */
+}
+#endif
+
+#endif                                                          /* #ifndef _CAN_CFG_H_                                  */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Drivers/ZC7xxx/drv_can.h b/src/ucos_v1_42/micrium_source/uC-CAN/Drivers/ZC7xxx/drv_can.h
new file mode 100644
index 0000000..03ed018
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Drivers/ZC7xxx/drv_can.h
@@ -0,0 +1,317 @@
+/*
+*********************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           CAN DRIVER CODE
+*
+*                                         ZYNQ-ZC7000 Series
+*
+* Filename      : drv_can.h
+* Version       : V2.42.00
+* Programmer(s) : DC
+*********************************************************************************************************
+*/
+
+#ifndef  _DRV_CAN_H_
+#define  _DRV_CAN_H_
+
+/*
+*********************************************************************************************************
+*                                              INCLUDES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "drv_def.h"
+#include  "can_bsp.h"
+
+#include  
+#include  "can_bus.h"
+#include  "cpu.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  ZC7xxx_CAN_NAME           "Zynq ZC7000:CAN Module"     /* Unique Driver Name for Installation                  */
+
+                                                                /* ---------------- MAILBOX SETTINGS ------------------ */
+#define  ZC7xxx_CAN_Tx_Rx_FIFO                      64u         /* Tx & Rx FIFO Mailbox Buffer Size. Msg Buffering Size.*/
+
+#define  ZC7xxx_CAN_SID_LIMIT                   0x07FFu         /* CAN Standard ID Value Limit                          */
+#define  ZC7xxx_CAN_SID_MASK                0xFFE00000u         /* CAN Standard ID Location Mask Value.                 */
+
+#define  ZC7xxx_CAN_EID_LIMIT                 0x03FFFFu         /* CAN Extended ID Value Limit                          */
+#define  ZC7xxx_CAN_EID_MASK                   0x7FFFEu         /* CAN Extended ID Location Mask Value.                 */
+
+#define  ZC7xxx_CAN_DLC_LIMIT                     0x0Fu         /* Limit DLC to 8 Bytes                                 */
+#define  ZC7xxx_CAN_DLC_DATA_SPLIT                   4u         /* DLC Value for Split between Data1 & Data2 Registers. */
+
+                                                                /* ---------------- CAN FRAME SETTINGS ---------------- */
+#define  ZC7xxx_CAN_FRM_RTR_FLAG            DEF_BIT_30
+#define  ZC7xxx_CAN_FRM_IDE_FLAG            DEF_BIT_29
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifndef  CAN_DIAGNOSTIC_OFF
+#define  CAN_DIAGNOSTIC_OFF                          0u
+#endif
+
+#ifndef  CAN_DIAGNOSTIC_LOOPBACK
+#define  CAN_DIAGNOSTIC_LOOPBACK                     1u
+#endif
+
+#ifndef  CAN_DIAGNOSTIC_SNOOP
+#define  CAN_DIAGNOSTIC_SNOOP                        2u
+#endif
+
+#ifndef  CAN_DIAGNOSTIC_SELECT
+#define  CAN_DIAGNOSTIC_SELECT              CAN_DIAGNOSTIC_OFF
+#endif
+
+#if    ((CAN_DIAGNOSTIC_SELECT != CAN_DIAGNOSTIC_OFF     ) && \
+        (CAN_DIAGNOSTIC_SELECT != CAN_DIAGNOSTIC_LOOPBACK) && \
+        (CAN_DIAGNOSTIC_SELECT != CAN_DIAGNOSTIC_SNOOP   ))
+#error  "CAN_DIAGNOSTIC_SELECT must be either LoopBack Mode, Snoop Mode, or Selected to be OFF.   "
+#error  "Please select CAN_DIAGNOSITC_SELECT as one of these options only.                        "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            DEVICE NAMES
+*
+* Description : Enumeration defines the Available Device Names for the Driver XXXCANInit() Function.
+*
+* Note(s)     : The ZYNQ ZC7000 Series Driver only Supports 2 Internal CAN Controllers (0->1).
+*********************************************************************************************************
+*/
+
+typedef  enum  zc7xxx_can_dev {
+    ZC7xxx_CAN_BUS_0 = 0u,                                      /* Internal CAN controller #0                           */
+    ZC7xxx_CAN_BUS_1 = 1u,                                      /* Internal CAN controller #1                           */
+    ZC7xxx_CAN_N_DEV = 2u                                       /* Number of CAN controllers                            */
+} ZC7xxx_CAN_DEV;
+
+
+/*
+*********************************************************************************************************
+*                                         DRIVER ERROR CODES
+*
+* Description : Enumeration defines the possible Driver Error Codes.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+typedef  enum  zc7xxx_can_err {
+    ZC7xxx_CAN_ERR_NONE = 0u,                                   /*        NO ERR: Everything is OK                      */
+    ZC7xxx_CAN_ERR_BUS,                                         /*       BUS ERR: Wrong Bus Was Chosen                  */
+    ZC7xxx_CAN_ERR_BUSY,                                        /*      BUSY ERR: Msg Can't be Sent, Bus is Busy        */
+    ZC7xxx_CAN_ERR_INIT,                                        /*      INIT ERR: Reset State not Set, Dev Init Fail    */
+    ZC7xxx_CAN_ERR_MODE,                                        /*      MODE ERR: Error Accessing Wanted Mode on Device */
+    ZC7xxx_CAN_ERR_OPEN,                                        /*      OPEN ERR: Device can't be Used, Device un-Opened*/
+    ZC7xxx_CAN_ERR_CLOSE,                                       /*     CLOSE ERR: Device can't be Closed                */
+    ZC7xxx_CAN_ERR_FUNC,                                        /*  FUNCTION ERR: Given Function Code is not Valid      */
+    ZC7xxx_CAN_ERR_ARG,                                         /*  ARGUMENT ERR: Argument Check has Failed             */
+    ZC7xxx_CAN_ERR_NO_DATA,                                     /*      DATA ERR: No Data is Available                  */
+} ZC7xxx_CAN_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                     I/O CONTROL FUNCTION CODES
+*
+* Description : Enumeration defines the available Function Codes for the Driver XXXIoCtl() Function.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+typedef  enum  zc7xxx_can_io_list {
+    IO_ZC7xxx_CAN_GET_IDENT = 0u,                               /* ---------- GET DRIVER IDENTIFICATION CODE ---------- */
+                                                                /* arg = Pointer to Local Ident Variable (CPU_INT32U)   */
+    IO_ZC7xxx_CAN_GET_ERRNO,                                    /* --------------- GET DRIVER ERROR CODE -------------- */
+                                                                /* arg = Pointer to Local Error Code Var. (CPU_INT16U)  */
+    IO_ZC7xxx_CAN_GET_DRVNAME,                                  /* ------------------ GET DRIVER NAME ----------------- */
+                                                                /* arg = Pointer to Local String Variable (char)        */
+    IO_ZC7xxx_CAN_SET_BAUDRATE,                                 /* ----------------- SET BUS BAUDRATE ----------------- */
+                                                                /* arg = Pointer to Local Baudrate Var. (CPU_INT32U)    */
+    IO_ZC7xxx_CAN_START,                                        /* -------------------- ENABLE BUS -------------------- */
+                                                                /* No Pointer: Fnct Code sets CAN to Operational Mode.  */
+    IO_ZC7xxx_CAN_CONFIG,                                       /* ----------------- SET CAN TO CONFIG ---------------- */
+                                                                /* No Pointer: Fnct Code sets CAN to 'CONFIG' Mode.     */
+    IO_ZC7xxx_CAN_SLEEP,                                        /* ----------------- SET CAN TO SLEEP ----------------- */
+                                                                /* No Pointer: Fnct Code sets CAN to 'SLEEP' Mode.      */
+    IO_ZC7xxx_CAN_LBACK,                                        /* ---------------- SET CAN TO LOOPBACK --------------- */
+                                                                /* No Pointer: Fnct Code sets CAN to 'LOOPBACK' Mode.   */
+    IO_ZC7xxx_CAN_SNOOP,                                        /* ----------------- SET CAN TO SNOOP ----------------- */
+                                                                /* No Pointer: Fnct Code sets CAN to 'SNOOP' Mode.      */
+    IO_ZC7xxx_CAN_RX_STANDARD,                                  /* ------- SET  RECIEVER TO STANDARD IDENTIFIER ------- */
+                                                                /* No Pointer: CAN Rx recieves only CAN Standard IDs    */
+    IO_ZC7xxx_CAN_RX_EXTENDED,                                  /* ------- SET  RECIEVER TO EXTENDED IDENTIFIER ------- */
+                                                                /* No Pointer: CAN Rx recieves only CAN Extended IDs    */
+    IO_ZC7xxx_CAN_TX_READY,                                     /* ---------------- GET TX READY STATUS --------------- */
+                                                                /* arg = Pointer to TX Rdy Status Variable (CPU_INT08U) */
+    IO_ZC7xxx_CAN_GET_NODE_STATUS,                              /* ------------------ GET NODE STATUS ----------------- */
+                                                                /* arg = Pointer to Node Status Variable (CPU_INT08U)   */
+    IO_ZC7xxx_CAN_SET_RX_FILTER,                                /* ------------------ SET RX FILTER 1 ----------------- */
+                                                                /* arg = CPU_INT32U[2]: arg[0] = mask, arg[1] = ID      */
+    IO_ZC7xxx_CAN_IO_FUNC_N                                     /* ------------- NUMBER OF FUNCTION CODES ------------- */
+} ZC7xxx_CAN_IO_LIST;                                           /* No Pointer: Holds number of Function Codes Available */
+
+
+/*
+*********************************************************************************************************
+*                                          ZC7xxx CAN MODES
+*
+* Description : Enumeration defines the ZYNQ ZC7000 Series CAN Modes.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+typedef  enum  zc7xxx_can_mode {
+    ZC7xxx_CAN_MODE_CONFIG = 0u,                                /* CAN Controller Set To: Configure Mode / Reset Mode.  */
+    ZC7xxx_CAN_MODE_RESET,                                      /* CAN Controller Set To: Reset CAN Module.             */
+    ZC7xxx_CAN_MODE_SLEEP,                                      /* CAN Controller Set To: Sleep     Mode.               */
+    ZC7xxx_CAN_MODE_SNOOP,                                      /* CAN Controller Set To: Snoop     Mode.               */
+    ZC7xxx_CAN_MODE_LOOP_BACK,                                  /* CAN Controller Set To: Loop Back Mode.               */
+    ZC7xxx_CAN_MODE_NORMAL                                      /* CAN Controller Set To: Normal    Mode.               */
+} ZC7xxx_CAN_MODE;
+
+
+/*
+*********************************************************************************************************
+*                                         DRIVER RUNTIME DATA
+*
+* Description : Structure holds the Driver Runtime data.
+*
+* Note(s)     : (1) 'Prev_Mode' is used to Maintain the "Diagnostic" settings of the CAN controller
+*                   by storing the previous CAN Operating Mode prior to entering 'Configuration'
+*                   Mode to then restore the CAN Module to the previous mode. Default setting will
+*                   be set to 'Normal' Mode.
+*********************************************************************************************************
+*/
+
+typedef  struct  zc7xxx_can_data {
+    CPU_BOOLEAN       Use;                                      /* USE MARKER: Marker Indicating if Dev is In Use       */
+    ZC7xxx_CAN_REG   *RegPtr;                                   /*   REGISTER: Pointer to the CAN Base Address(s)       */
+    ZC7xxx_CAN_MODE   Prev_Mode;                                /* PREV MODE : Sets Previous Mode of CAN Ctrl. Note(1). */
+} ZC7xxx_CAN_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                          CAN FRAME STRUCT
+*
+* Description : Structure defines a CAN Frame.
+*
+* Note(s)     : To Differentiate between Standard and Extended IDs, the following Addition to the
+*               ID is implemented: (Based on the Structure found in uC/CAN Frame files).
+*                   - Bit #31     : Reserved (Always 0u)
+*                   - Bit #30     : Remote Transmission Request Flag (1u = RTR, 0u = Data Frame)
+*                   - Bit #29     : Extended ID Flag (1u = Extended, 0u = Standard)
+*                   - Bit #28 - 0 : Identifier (Standard, Extended, or Both)
+*********************************************************************************************************
+*/
+
+typedef  struct  zc7xxx_can_frm {
+    CPU_INT32U  Identifier;                                     /* CAN IDENTIFIER: Can Identifier                       */
+    CPU_INT08U  Data[8u];                                       /*    CAN PAYLOAD: Bytes[Max 8] in Single CAN Msg       */
+    CPU_INT08U  DLC;                                            /*        CAN DLC: Num of Valid Data(s) in Payload      */
+    CPU_INT08U  Spare[3u];                                      /*          SPARE: Sets FRM w/ Integral Num of Pointers */
+} ZC7xxx_CAN_FRM;
+
+
+/*
+*********************************************************************************************************
+*                                         CAN REG FRM STRUCT
+*
+* Description : Structure defines a ZC7xxx Rx & Tx Message Format.
+*
+* Note(s)     : Since all 4 registers [ID, DLC, Data1, Data2] are required to be written to / read
+*               from regardless of the actual number of data bytes & valid fields in the message, a
+*               structure is used as a 'middle man' to read from / write to specific parts of the
+*               Rx / Tx message prior to receiving / sending.
+*********************************************************************************************************
+*/
+
+typedef  struct  zc7xxx_can_reg_frm {
+    CPU_REG32  ID;                                              /* IDENTIFIER : CAN Rx / Tx ID     Register             */
+    CPU_REG32  DLC;                                             /*        DLC : CAN Rx / Tx DLC    Register             */
+    CPU_REG32  Data1;                                           /* DATA 1 REG : CAN Rx / Tx DATA 1 Register             */
+    CPU_REG32  Data2;                                           /* DATA 2 REG : CAN Rx / Tx DATA 2 Register             */
+} ZC7xxx_CAN_REG_FRM;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_INT16S  ZC7xxx_CAN_Init    (CPU_INT32U   para_id);
+
+CPU_INT16S  ZC7xxx_CAN_Open    (CPU_INT16S   dev_id,
+                                CPU_INT32U   dev_name,
+                                CPU_INT16U   mode);
+
+CPU_INT16S  ZC7xxx_CAN_Close   (CPU_INT16S   para_id);
+
+CPU_INT16S  ZC7xxx_CAN_IoCtl   (CPU_INT16S   para_id,
+                                CPU_INT16U   func,
+                                void        *p_arg);
+
+CPU_INT16S  ZC7xxx_CAN_Read    (CPU_INT16S   para_id,
+                                CPU_INT08U  *buf,
+                                CPU_INT16U   size);
+
+CPU_INT16S  ZC7xxx_CAN_Write   (CPU_INT16S   para_id,
+                                CPU_INT08U  *buf,
+                                CPU_INT16U   size);
+
+void        ZC7xxx_CAN_ErrCheck(CPU_INT32U   para_id);
+
+
+/*
+*********************************************************************************************************
+*                                            ERROR SECTION
+*********************************************************************************************************
+*/
+
+#endif                                                          /* #ifndef _DRV_CAN_H_                                  */
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Drivers/ZC7xxx/drv_can_reg.h b/src/ucos_v1_42/micrium_source/uC-CAN/Drivers/ZC7xxx/drv_can_reg.h
new file mode 100644
index 0000000..db92699
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Drivers/ZC7xxx/drv_can_reg.h
@@ -0,0 +1,363 @@
+/*
+*********************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      CAN DRIVER REGISTER CODE
+*
+*                                         ZYNQ-ZC7000 Series
+*
+* Filename      : drv_can_reg.h
+* Version       : V2.42.00
+* Programmer(s) : DC
+*********************************************************************************************************
+*/
+
+#ifndef  _DRV_CAN_REG_H
+#define  _DRV_CAN_REG_H
+
+
+/*
+*********************************************************************************************************
+*                                              INCLUDES
+*********************************************************************************************************
+*/
+
+#include  "cpu.h"
+#include  "can_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifndef  CAN_MODULE_CHANNEL_0
+#define  CAN_MODULE_CHANNEL_0                   DEF_DISABLED
+#endif
+
+#ifndef  CAN_MODULE_CHANNEL_1
+#define  CAN_MODULE_CHANNEL_1                   DEF_DISABLED
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          ADDRESS REGISTERS
+*********************************************************************************************************
+*/
+                                                                /* ------------------- BASE ADDRESS ------------------- */
+#define  ZC7xxx_CAN0_ADDR                       0xE0008000u
+#define  ZC7xxx_CAN1_ADDR                       0xE0009000u
+
+
+/*
+****************************************************************************************************
+*                                           BIT DEFINITIONS
+****************************************************************************************************
+*/
+                                                                /* ---------------- SOFTWARE RESET REG ---------------- */
+#define  ZC7xxx_CAN_SRR_CEN                     DEF_BIT_01
+#define  ZC7xxx_CAN_SRR_SRST                    DEF_BIT_00
+
+                                                                /* ------------------ MODE SELECT REG ----------------- */
+#define  ZC7xxx_CAN_MSR_SNOOP                   DEF_BIT_02
+#define  ZC7xxx_CAN_MSR_LBACK                   DEF_BIT_01
+#define  ZC7xxx_CAN_MSR_SLEEP                   DEF_BIT_00
+
+                                                                /* ------------------ ERR STATUS REG ------------------ */
+#define  ZC7xxx_CAN_ESR_ACKER                   DEF_BIT_04
+#define  ZC7xxx_CAN_ESR_BERR                    DEF_BIT_03
+#define  ZC7xxx_CAN_ESR_STER                    DEF_BIT_02
+#define  ZC7xxx_CAN_ESR_FMER                    DEF_BIT_01
+#define  ZC7xxx_CAN_ESR_CRCER                   DEF_BIT_00
+
+                                                                /* ------------------ STATUS REGISTER ----------------- */
+#define  ZC7xxx_CAN_SR_SNOOP                    DEF_BIT_12
+#define  ZC7xxx_CAN_SR_ACFBSY                   DEF_BIT_11
+#define  ZC7xxx_CAN_SR_TXFLL                    DEF_BIT_10
+#define  ZC7xxx_CAN_SR_TXBFLL                   DEF_BIT_09
+
+#define  ZC7xxx_CAN_SR_ESTAT_CFG_MODE          (0u << 7u)
+#define  ZC7xxx_CAN_SR_ESTAT_ERR_ACTIVE        (1u << 7u)
+#define  ZC7xxx_CAN_SR_ESTAT_ERR_PASS          (2u << 7u)
+#define  ZC7xxx_CAN_SR_ESTAT_BUS_OFF           (3u << 7u)
+
+#define  ZC7xxx_CAN_SR_ERRWRN                   DEF_BIT_06
+#define  ZC7xxx_CAN_SR_BBSY                     DEF_BIT_05
+#define  ZC7xxx_CAN_SR_BIDLE                    DEF_BIT_04
+#define  ZC7xxx_CAN_SR_NORMAL                   DEF_BIT_03
+#define  ZC7xxx_CAN_SR_SLEEP                    DEF_BIT_02
+#define  ZC7xxx_CAN_SR_LBACK                    DEF_BIT_01
+#define  ZC7xxx_CAN_SR_CONFIG                   DEF_BIT_00
+
+                                                                /* ------------------ INT STATUS REG ------------------ */
+#define  ZC7xxx_CAN_ISR_TXFEMP                  DEF_BIT_14
+#define  ZC7xxx_CAN_ISR_TXFWMEMP                DEF_BIT_13
+#define  ZC7xxx_CAN_ISR_RXFWMFLL                DEF_BIT_12
+#define  ZC7xxx_CAN_ISR_WKUP                    DEF_BIT_11
+#define  ZC7xxx_CAN_ISR_SLP                     DEF_BIT_10
+#define  ZC7xxx_CAN_ISR_BSOFF                   DEF_BIT_09
+#define  ZC7xxx_CAN_ISR_ERROR                   DEF_BIT_08
+#define  ZC7xxx_CAN_ISR_RXNEMP                  DEF_BIT_07
+#define  ZC7xxx_CAN_ISR_RXOFLW                  DEF_BIT_06
+#define  ZC7xxx_CAN_ISR_RXUFLW                  DEF_BIT_05
+#define  ZC7xxx_CAN_ISR_RXOK                    DEF_BIT_04
+#define  ZC7xxx_CAN_ISR_TXBFLL                  DEF_BIT_03
+#define  ZC7xxx_CAN_ISR_TXFLL                   DEF_BIT_02
+#define  ZC7xxx_CAN_ISR_TXOK                    DEF_BIT_01
+#define  ZC7xxx_CAN_ISR_ARBLST                  DEF_BIT_00
+
+                                                                /* ------------------ INT ENABLE REG ------------------ */
+#define  ZC7xxx_CAN_IER_ETXFEMP                 DEF_BIT_14
+#define  ZC7xxx_CAN_IER_ETXFWMEMP               DEF_BIT_13
+#define  ZC7xxx_CAN_IER_ERXFWMFLL               DEF_BIT_12
+#define  ZC7xxx_CAN_IER_EWKUP                   DEF_BIT_11
+#define  ZC7xxx_CAN_IER_ESLP                    DEF_BIT_10
+#define  ZC7xxx_CAN_IER_EBSOFF                  DEF_BIT_09
+#define  ZC7xxx_CAN_IER_EERROR                  DEF_BIT_08
+#define  ZC7xxx_CAN_IER_ERXNEMP                 DEF_BIT_07
+#define  ZC7xxx_CAN_IER_ERXOFLW                 DEF_BIT_06
+#define  ZC7xxx_CAN_IER_ERXUFLW                 DEF_BIT_05
+#define  ZC7xxx_CAN_IER_ERXOK                   DEF_BIT_04
+#define  ZC7xxx_CAN_IER_ETXBFLL                 DEF_BIT_03
+#define  ZC7xxx_CAN_IER_ETXFLL                  DEF_BIT_02
+#define  ZC7xxx_CAN_IER_ETXOK                   DEF_BIT_01
+#define  ZC7xxx_CAN_IER_EARBLST                 DEF_BIT_00
+
+                                                                /* ------------------ INT CLEAR REG ------------------- */
+#define  ZC7xxx_CAN_ICR_CTXFEMP                 DEF_BIT_14
+#define  ZC7xxx_CAN_ICR_CTXFWMEMP               DEF_BIT_13
+#define  ZC7xxx_CAN_ICR_CRXFWMFLL               DEF_BIT_12
+#define  ZC7xxx_CAN_ICR_CWKUP                   DEF_BIT_11
+#define  ZC7xxx_CAN_ICR_CSLP                    DEF_BIT_10
+#define  ZC7xxx_CAN_ICR_CBSOFF                  DEF_BIT_09
+#define  ZC7xxx_CAN_ICR_CERROR                  DEF_BIT_08
+#define  ZC7xxx_CAN_ICR_CRXNEMP                 DEF_BIT_07
+#define  ZC7xxx_CAN_ICR_CRXOFLW                 DEF_BIT_06
+#define  ZC7xxx_CAN_ICR_CRXUFLW                 DEF_BIT_05
+#define  ZC7xxx_CAN_ICR_CRXOK                   DEF_BIT_04
+#define  ZC7xxx_CAN_ICR_CTXBFLL                 DEF_BIT_03
+#define  ZC7xxx_CAN_ICR_CTXFLL                  DEF_BIT_02
+#define  ZC7xxx_CAN_ICR_CTXOK                   DEF_BIT_01
+#define  ZC7xxx_CAN_ICR_CARBLST                 DEF_BIT_00
+
+                                                                /* --------------- TIMESTAMP CONTROL REG -------------- */
+#define  ZC7xxx_CAN_TCR_CTS                     DEF_BIT_00
+
+                                                                /* ---------------- CAN MSG ID DEFINES ---------------- */
+                                                                /* #Defines Apply for Tx FIFO, Tx HPB & Rx FIFO Reg.    */
+#define  ZC7xxx_CAN_ID_SRRRTR                   DEF_BIT_20
+#define  ZC7xxx_CAN_ID_IDE                      DEF_BIT_19
+#define  ZC7xxx_CAN_ID_RTR                      DEF_BIT_00
+
+                                                                /* --------------- ACCEPTANCE FILTER REG -------------- */
+#define  ZC7xxx_CAN_AFR_UAF4                    DEF_BIT_03
+#define  ZC7xxx_CAN_AFR_UAF3                    DEF_BIT_02
+#define  ZC7xxx_CAN_AFR_UAF2                    DEF_BIT_01
+#define  ZC7xxx_CAN_AFR_UAF1                    DEF_BIT_00
+
+                                                                /* ------------ ACCEPTANCE FILTER MSK REG x ----------- */
+                                                                /* #Defines Apply for Filter Mask Registers 1, 2, 3, & 4*/
+#define  ZC7xxx_CAN_AFMRx_AMSRR                 DEF_BIT_20
+#define  ZC7xxx_CAN_AFMRx_AMIDE                 DEF_BIT_19
+#define  ZC7xxx_CAN_AFMRx_AMRTR                 DEF_BIT_00
+
+                                                                /* ------------ ACCEPTANCE FILTER ID REG x ------------ */
+                                                                /* #Defines Apply for Filter ID Registers 1, 2, 3, & 4. */
+#define  ZC7xxx_CAN_AFIRx_AISRR                 DEF_BIT_20
+#define  ZC7xxx_CAN_AFIRx_AIIDE                 DEF_BIT_19
+#define  ZC7xxx_CAN_AFIRx_AIRTR                 DEF_BIT_00
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*
+* Note(s) : (1) When Using Extended IDs for Rx'd Messages, its required to save both the Standard
+*               Section and Extended Section of the ID and placed both in the Rx Frame in the
+*               following Format:
+*                           Bits:  31     30    29                   18                   0
+*                   uC/CAN Frame: [ 0u | RTR | IDE |    Standard ID    |    Extended ID    ]
+*
+*********************************************************************************************************
+*/
+                                                                /* ------------- BAUD RATE SETTING MACROs ------------- */
+#define  ZC7xxx_CAN_BRPR_BRP(x)                 ((x) & 0xFFu)   /* Set Baud Rate Prescaler in the BRPR Register.        */
+
+                                                                /* Set Bit Timing Register Settings on the BTR Register.*/
+#define  ZC7xxx_CAN_BTR_SJW(x)                 (((x) & 0x03u) << 7u)
+#define  ZC7xxx_CAN_BTR_TS2(x)                 (((x) & 0x07u) << 4u)
+#define  ZC7xxx_CAN_BTR_TS1(x)                 (((x) & 0x0Fu) << 0u)
+
+                                                                /* ------------- CAN MSG WATERMARK MACROs ------------- */
+#define  ZC7xxx_CAN_WIR_EW(x)                  (((x) & 0xFFu) << 8u)
+#define  ZC7xxx_CAN_WIR_FW(x)                  (((x) & 0xFFu) << 0u)
+
+                                                                /* ----------------- CAN TX MSG MACROs ---------------- */
+                                                                /*  - ID MACROs -                                       */
+                                                                /* #Defines Apply for Tx FIFO & Tx HPB Registers.       */
+                                                                /* Standard Message ID. Standard Frame is 11 Bits.      */
+#define  ZC7xxx_CAN_Tx_ID_IDH(x)               (((x) & 0x07FFu) << 21u)
+
+                                                                /* Extended Message ID. Valid only for Extended Frames. */
+#define  ZC7xxx_CAN_Tx_ID_IDL(x)               (((x) & 0x03FFFFu) << 1u)
+
+                                                                /*  - DLC MACROs -                                      */
+                                                                /* #Define Applies for Tx FIFO & Tx HPB Registers.      */
+#define  ZC7xxx_CAN_Tx_DLC_DLC(x)              (((x) & 0x0Fu) << 28u)
+
+                                                                /*  - DATA 1 & 2 MACROs -                               */
+                                                                /* #Defines Apply for Tx FIFO & Tx HPB Registers.       */
+#define  ZC7xxx_CAN_Tx_DATA_BYTES(x, y)        (((x) & 0xFFu) << (24u - (8u * (y))))
+
+                                                                /* ----------------- CAN RX MSG MACROs ---------------- */
+                                                                /*  - ID MACROs -                                       */
+                                                                /* #Defines Apply for Rx FIFO Register.                 */
+                                                                /* Standard Message ID. Standard Frame is 11 Bits.      */
+#define  ZC7xxx_CAN_Rx_ID_IDH(x)               (((x) >> 21u) & 0x07FFu)
+
+                                                                /* Extended Message ID. Valid only for Extended Frames. */
+#define  ZC7xxx_CAN_Rx_ID_IDL(x)               (((x) >>  1u) & 0x03FFFFu)
+
+                                                                /* Gets BOTH Standard & Extended IDs. See Note (1).     */
+#define  ZC7xxx_CAN_Rx_ID_BOTH(x)              ((ZC7xxx_CAN_Rx_ID_IDH((x)) << 18u) | ZC7xxx_CAN_Rx_ID_IDL((x)))
+
+                                                                /*  - DLC MACROs -                                      */
+                                                                /* Read DLC Quantity from Rx FIFO Register.             */
+#define  ZC7xxx_CAN_Rx_DLC_DLC(x)              (((x) >> 28u) & 0x0Fu)
+
+                                                                /* Read Rx Timestamp Value. Only for Rx'd Messages.     */
+#define  ZC7xxx_CAN_Rx_DLC_RXT(x)              (((x) >>  0u) & 0xFFFFu)
+
+                                                                /*  - DATA 1 & 2 MACROs -                               */
+                                                                /* Reads Data Byte based on DLC Count Value.            */
+#define  ZC7xxx_CAN_Rx_DATA_BYTES(x, y)        (((x) >> (24u - (8u * (y)))) & 0xFFu)
+
+                                                                /* --------- ACCEPTANCE FILTER MSK REG x MACROs ------- */
+                                                                /* #Defines Apply for Filter Mask Registers 1, 2, 3, & 4*/
+#define  ZC7xxx_CAN_AFMRx_AMIDH(x)             (((x) &   0x07FFu) << 21u)
+#define  ZC7xxx_CAN_AFMRx_AMIDL(x)             (((x) & 0x03FFFFu) <<  1u)
+
+                                                                /* --------- ACCEPTANCE FILTER ID REG x MACROs -------- */
+                                                                /* #Defines Apply for Filter ID Registers 1, 2, 3, & 4. */
+#define  ZC7xxx_CAN_AFIRx_AIIDH(x)             (((x) &   0x07FFu) << 21u)
+#define  ZC7xxx_CAN_AFIRx_AIIDL(x)             (((x) & 0x03FFFFu) <<  1u)
+
+
+/*
+*********************************************************************************************************
+*                                             DATA ARRAY
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            CAN REGISTER
+*
+* Description : Structure defines the CAN Register Structure.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+typedef  volatile  struct  zc7xxx_can_reg {                     /* ---------- CAN CONTROLLER REGISTER SUMMARY --------- */
+    CPU_REG32  SRR;                                             /* Software Reset       Register.                       */
+    CPU_REG32  MSR;                                             /* Mode Select          Register.                       */
+    CPU_REG32  BRPR;                                            /* Baud Rate Prescaler  Register.                       */
+    CPU_REG32  BTR;                                             /* Bit Timing           Register.                       */
+    CPU_REG32  ECR;                                             /* Error Counter        Register.                       */
+    CPU_REG32  ESR;                                             /* Error Status         Register.                       */
+    CPU_REG32  SR;                                              /* Status               Register.                       */
+    CPU_REG32  ISR;                                             /* Interrupt Status     Register.                       */
+    CPU_REG32  IER;                                             /* Interrupt Enable     Register.                       */
+    CPU_REG32  ICR;                                             /* Interrupt Clear      Register.                       */
+    CPU_REG32  TCR;                                             /* Timestamp Control    Register.                       */
+    CPU_REG32  WIR;                                             /* Watermark Interrupt  Register.                       */
+    CPU_REG32  TXFIFO_ID;                                       /* Transmit Message: FIFO Message Identifier.           */
+    CPU_REG32  TXFIFO_DLC;                                      /* Transmit Message: FIFO Data Length Code.             */
+    CPU_REG32  TXFIFO_DATA1;                                    /* Transmit Message: FIFO Data Word 1.                  */
+    CPU_REG32  TXFIFO_DATA2;                                    /* Transmit Message: FIFO Data Word 2.                  */
+    CPU_REG32  TXHPB_ID;                                        /* Transmit High Priority Buffer: Message Identifier.   */
+    CPU_REG32  TXHPB_DLC;                                       /* Transmit High Priority Buffer: Data Length Code.     */
+    CPU_REG32  TXHPB_DATA1;                                     /* Transmit High Priority Buffer: Data Word 1.          */
+    CPU_REG32  TXHPB_DATA2;                                     /* Transmit High Priority Buffer: Data Word 2.          */
+    CPU_REG32  RXFIFO_ID;                                       /* Receive Message: FIFO Message Identifier.            */
+    CPU_REG32  RXFIFO_DLC;                                      /* Receive Message: FIFO Data Length Code.              */
+    CPU_REG32  RXFIFO_DATA1;                                    /* Receive Message: FIFO Data Word 1.                   */
+    CPU_REG32  RXFIFO_DATA2;                                    /* Receive Message: FIFO Data Word 2.                   */
+    CPU_REG32  AFR;                                             /* Acceptance Filter    Register.                       */
+    CPU_REG32  AFMR1;                                           /* Acceptance Filter    Mask Register: 1.               */
+    CPU_REG32  AFIR1;                                           /* Acceptance Filter    ID   Register: 1.               */
+    CPU_REG32  AFMR2;                                           /* Acceptance Filter    Mask Register: 2.               */
+    CPU_REG32  AFIR2;                                           /* Acceptance Filter    ID   Register: 2.               */
+    CPU_REG32  AFMR3;                                           /* Acceptance Filter    Mask Register: 3.               */
+    CPU_REG32  AFIR3;                                           /* Acceptance Filter    ID   Register: 3.               */
+    CPU_REG32  AFMR4;                                           /* Acceptance Filter    Mask Register: 4.               */
+    CPU_REG32  AFIR4;                                           /* Acceptance Filter    ID   Register: 4.               */
+} ZC7xxx_CAN_REG;
+
+
+/*
+*********************************************************************************************************
+*                                        CAN BAUDRATE REGISTER
+*
+* Description : Structure defines the CAN BaudRate Register Structure.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+typedef  struct  zc7xxx_can_baud {    
+    CPU_INT32U  BaudRate;                                       /* Holds the Baudrate.                                  */
+    CPU_INT32U  SamplePoint;                                    /* Holds the Sample point in 0.1%                       */
+    CPU_INT32U  ReSynchJumpWidth;                               /* Holds the Re-Synchronization Jump Width in 0.1%      */
+    CPU_INT08U  PrescalerDiv;                                   /* Holds the Prescaler Divide Factor                    */
+    CPU_INT08U  SJW;                                            /* Holds the Re-Synch Jump Width         (StdValue = 1) */
+    CPU_INT08U  PropagationSeg;                                 /* Holds the Propagation Segment Time    (StdValue = 2) */
+    CPU_INT08U  PhaseBufSeg1;                                   /* Holds the Phase Buffer Segment 1      (StdValue = 7) */
+    CPU_INT08U  PhaseBufSeg2;                                   /* Holds the Phase Buffer Segment 2      (StdValue = 7) */
+} ZC7xxx_CAN_BAUD;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            ERROR SECTION
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Drivers/drv_def.h b/src/ucos_v1_42/micrium_source/uC-CAN/Drivers/drv_def.h
new file mode 100644
index 0000000..d16de6c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Drivers/drv_def.h
@@ -0,0 +1,141 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : drv_def.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+****************************************************************************************************
+*/
+
+#ifndef _DRV_DEF_H
+#define _DRV_DEF_H
+
+
+/**************************************************************************************************/
+/*                         ACCESS TYPE DEFINITIONS                                                */
+/**************************************************************************************************/
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 EXLCUSIVE ACCESS
+*
+*            This define holds the value for mode coding bit 7: exclusive access
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_EXCLUSIVE  (0u << 7u)
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 SHARED ACCESS
+*
+*            This define holds the value for mode coding bit 7: shared access
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_SHARE      (1u << 7u)
+
+
+/**************************************************************************************************/
+/*                         PERMISSION DEFINITIONS                                                 */
+/**************************************************************************************************/
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 EXECUTE PERMISSION
+*
+*            This define holds the value for mode coding bit 0: execute permission enabled
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_EXE        (1u << 0u)
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 WRITE PERMISSION
+*
+*            This define holds the value for mode coding bit 1: write permission enabled
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_WO         (1u << 1u)
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 READ PERMISSION
+*
+*            This define holds the value for mode coding bit 2: read permission enabled
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_RO         (1u << 2u)
+
+
+/**************************************************************************************************/
+/*                         ACCESS MODE DEFINITIONS                                                */
+/**************************************************************************************************/
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 EXCLUSIVE READ/WRITE ACCESS
+*
+*            This define holds the value for mode: exclusive read/write access
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_RW         (DEV_EXCLUSIVE | DEV_WO | DEV_RO)
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 EXCLUSIVE READ/WRITE/EXECUTE ACCESS
+*
+*            This define holds the value for mode: exclusive read/write/execute access
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_RWX        (DEV_EXCLUSIVE | DEV_WO | DEV_RO | DEV_EXE)
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 SHARED WRITE ACCESS
+*
+*            This define holds the value for mode: shared write access
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_SHWO       (DEV_SHARE | DEV_WO)
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 SHARED READ ACCESS
+*
+*            This define holds the value for mode: shared read access
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_SHRO       (DEV_SHARE | DEV_RO)
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 SHARED READ/WRITE ACCESS
+*
+*            This define holds the value for mode: shared read/write access
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_SHRW       (DEV_SHARE | DEV_WO | DEV_RO)
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                 SHARED READ/WRITE/EXECUTE ACCESS
+*
+*            This define holds the value for mode: shared read/write/execute access
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define DEV_SHRWX      (DEV_SHARE | DEV_WO | DEV_RO | DEV_EXE)
+
+
+#endif  /* #ifndef _DRV_DEF_H */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/OS/NONE/can_os.h b/src/ucos_v1_42/micrium_source/uC-CAN/OS/NONE/can_os.h
new file mode 100644
index 0000000..3fe5d5e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/OS/NONE/can_os.h
@@ -0,0 +1,72 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_os.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+****************************************************************************************************
+*/
+
+#ifndef _CAN_OS_H_
+#define _CAN_OS_H_
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "can_frm.h"                                  /* CAN Frame handling                       */
+#include "can_cfg.h"                                  /* CAN Configuration defines                */
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                                OS: NO ERROR
+*
+*            This errorcode indicates 'no error detected'.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANOS_NO_ERR      (CPU_INT08U)0
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*                                     FUNCTION PROTOTYPES                                        */
+/*------------------------------------------------------------------------------------------------*/
+
+CPU_INT16S CANOS_Init          (void);
+
+CPU_INT08U CANOS_PendRxFrame   (CPU_INT16U timeout, CPU_INT16S busId);
+void       CANOS_PostRxFrame   (CPU_INT16S busId);
+void       CANOS_ResetRx       (CPU_INT16S busId);
+
+CPU_INT08U CANOS_PendTxFrame   (CPU_INT16U timeout, CPU_INT16S busId);
+void       CANOS_PostTxFrame   (CPU_INT16S busId);
+void       CANOS_ResetTx       (CPU_INT16S busId);
+
+CPU_INT32U CANOS_GetTime       (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* #ifndef _CAN_OS_H */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/OS/uCOS-II/can_os.h b/src/ucos_v1_42/micrium_source/uC-CAN/OS/uCOS-II/can_os.h
new file mode 100644
index 0000000..a3e0cb7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/OS/uCOS-II/can_os.h
@@ -0,0 +1,72 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_os.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+****************************************************************************************************
+*/
+
+#ifndef _CAN_OS_H_
+#define _CAN_OS_H_
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "can_frm.h"                                  /* CAN Frame handling                       */
+#include "can_cfg.h"                                  /* CAN Configuration defines                */
+#include                            /* RTOS: µC/OS-II services                  */
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                                OS: NO ERROR
+*
+*            This errorcode indicates 'no error detected'.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANOS_NO_ERR      (CPU_INT08U)0
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*                                     FUNCTION PROTOTYPES                                        */
+/*------------------------------------------------------------------------------------------------*/
+
+CPU_INT16S CANOS_Init          (void);
+
+CPU_INT08U CANOS_PendRxFrame   (CPU_INT16U timeout, CPU_INT16S busId);
+void       CANOS_PostRxFrame   (CPU_INT16S busId);
+void       CANOS_ResetRx       (CPU_INT16S busId);
+
+CPU_INT08U CANOS_PendTxFrame   (CPU_INT16U timeout, CPU_INT16S busId);
+void       CANOS_PostTxFrame   (CPU_INT16S busId);
+void       CANOS_ResetTx       (CPU_INT16S busId);
+
+CPU_INT32U CANOS_GetTime       (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* #ifndef _CAN_OS_H */
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/OS/uCOS-III/can_os.h b/src/ucos_v1_42/micrium_source/uC-CAN/OS/uCOS-III/can_os.h
new file mode 100644
index 0000000..58ec0e0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/OS/uCOS-III/can_os.h
@@ -0,0 +1,72 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_os.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+****************************************************************************************************
+*/
+
+#ifndef _CAN_OS_H_
+#define _CAN_OS_H_
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "can_frm.h"                                  /* CAN Frame handling                       */
+#include "can_cfg.h"                                  /* CAN Configuration defines                */
+#include                                 /* RTOS: µC/OS-III services                 */
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                                OS: NO ERROR
+*
+*            This errorcode indicates 'no error detected'.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANOS_NO_ERR      (CPU_INT08U)0
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*                                     FUNCTION PROTOTYPES                                        */
+/*------------------------------------------------------------------------------------------------*/
+
+CPU_INT16S CANOS_Init          (void);
+
+CPU_INT08U CANOS_PendRxFrame   (CPU_INT16U timeout, CPU_INT16S busId);
+void       CANOS_PostRxFrame   (CPU_INT16S busId);
+void       CANOS_ResetRx       (CPU_INT16S busId);
+
+CPU_INT08U CANOS_PendTxFrame   (CPU_INT16U timeout, CPU_INT16S busId);
+void       CANOS_PostTxFrame   (CPU_INT16S busId);
+void       CANOS_ResetTx       (CPU_INT16S busId);
+
+CPU_INT32U CANOS_GetTime       (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* #ifndef _CAN_OS_H */
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_bus.h b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_bus.h
new file mode 100644
index 0000000..b0a3074
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_bus.h
@@ -0,0 +1,488 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_bus.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+* Purpose       : This include file defines the symbolic constants and function prototypes
+*                 for the buffered CAN bus handling.
+****************************************************************************************************
+*/
+
+#ifndef _CAN_BUS_H_
+#define _CAN_BUS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+****************************************************************************************************
+*                                             INCLUDES
+****************************************************************************************************
+*/
+
+#include "can_os.h"                                   /* operating system abstraction             */
+#include "can_drv.h"                                  /* CAN driver abstraction                   */
+#include "drv_def.h"                                  /* Device driver definitions                */
+#include "can_cfg.h"                                  /* configuration settings uC/Can            */
+
+
+#if CANBUS_EN > 0
+
+/*
+****************************************************************************************************
+*                                              DEFINES
+****************************************************************************************************
+*/
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      STATUS: NOT USED
+* \ingroup  UCCAN
+*
+*           This define holds the coding for the information: 'bus not used'. This status
+*           is the default status, before the CAN bus initialization function is called.
+*           After the CAN bus initialization, this status remains in the CAN bus interface
+*           slots, which is not configured via the configuration structure.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANBUS_UNUSED        0x00
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      STATUS: ACTIVE
+* \ingroup  UCCAN
+*
+*           This define holds the coding for the information: 'bus is active'. This status
+*           is the default status, after the CAN bus initialization function is called.
+*           This status indicates, that the bus is ready for communication.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANBUS_ACTIVE        0x01
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      STATUS: PASSIVE
+* \ingroup  UCCAN
+*
+*           This define holds the coding for the information: 'bus is passive'. This status
+*           will be set, if a node status change to 'passive' is detected.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANBUS_PASSIVE       0x02
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      STATUS: ERROR
+* \ingroup  UCCAN
+*
+*           This define holds the coding for the information: 'bus error detected'. This
+*           status will be set, if a node status change to 'error' or 'bus-off' is detected.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANBUS_ERROR         -3
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      I/O CONTROL FUNCTIONCODES
+* \ingroup  UCCAN
+*
+*           This enumeration defines the functioncode values for the function CanBusIoCtl().
+*/
+/*------------------------------------------------------------------------------------------------*/
+enum CANBUS_IOCTL_FUNC {
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  RESET BUS
+    * \ingroup  UCCAN
+    *
+    *       This enum value is the function code to reset the bus interface.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANBUS_RESET = 0,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  FLUSH TX QUEUE
+    * \ingroup  UCCAN
+    *
+    *       This enum value is the functioncode to clear the transmission queue.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANBUS_FLUSH_TX,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  FLUSH RX QUEUE
+    * \ingroup  UCCAN
+    *
+    *       This enum value is the functioncode to clear the receive queue.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANBUS_FLUSH_RX,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  SET TX TIMEOUT
+    * \ingroup  UCCAN
+    *
+    *       This enum value is the functioncode to set the transmit timeout during waiting for a
+    *       free entry in the transmission queue.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANBUS_SET_TX_TIMEOUT,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  SET RX TIMEOUT
+    * \ingroup  UCCAN
+    *
+    *       This enum value is the functioncode to set the receive timeout during waiting for a
+    *       received CAN frame.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANBUS_SET_RX_TIMEOUT
+};
+
+
+/*
+****************************************************************************************************
+*                                            DATA TYPES
+****************************************************************************************************
+*/
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      CAN BUS CONFIGURATION
+* \ingroup  UCCAN
+*
+*           This structure contains the informations for a bus. A bus represents one
+*           interface to the world.
+*
+* \note     For systems with very limited amount of RAM, this structure can be placed in
+*           ROM by declaring (and initializing) a const-variable during compile-time.
+*/
+/*------------------------------------------------------------------------------------------------*/
+typedef struct {
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  EXTENDED FLAG
+    * \ingroup  UCCAN
+    *
+    *       This member holds the default configuration for the receive buffer.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_BOOLEAN Extended;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  BAUDRATE
+    * \ingroup  UCCAN
+    *
+    *       This member holds the baudrate in bit/s.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT32U Baudrate;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  BUS NODE
+    * \ingroup  UCCAN
+    *
+    *       This member holds the bus node name, which must be used to interface with
+    *       the can bus layer.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT32U BusNodeName;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  DRIVER DEVICE
+    * \ingroup  UCCAN
+    *
+    *       This member holds the driver device name, which must be used to open the interface with
+    *       the lowlevel device driver.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT32U DriverDevName;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  DRIVER INIT FUNCTION
+    * \ingroup  UCCAN
+    *
+    *       This member holds the function pointer to the CAN lowlevel device driver Init()
+    *       function.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16S (*Init)(CPU_INT32U arg);
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  DRIVER OPEN FUNCTION
+    * \ingroup  UCCAN
+    *
+    *       This member holds the function pointer to the CAN lowlevel device driver Open()
+    *       function.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16S (*Open)(CPU_INT16S devId, CPU_INT32U devName, CPU_INT16U mode);
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  DRIVER CLOSE FUNCTION
+    * \ingroup  UCCAN
+    *
+    *       This member holds the function pointer to the CAN lowlevel device driver Close()
+    *       function.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16S (*Close)(CPU_INT16S paraId);
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  DRIVER IOCTL FUNCTION
+    * \ingroup  UCCAN
+    *
+    *       This member holds the function pointer to the CAN lowlevel device driver IoCtl()
+    *       function.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16S (*IoCtl)(CPU_INT16S paraId, CPU_INT16U func, void * argp);
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  DRIVER READ FUNCTION
+    * \ingroup  UCCAN
+    *
+    *       This member holds the function pointer to the CAN lowlevel device driver Read()
+    *       function.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16S (*Read)(CPU_INT16S paraId, CPU_INT08U * buffer, CPU_INT16U size);
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  DRIVER WRITE FUNCTION
+    * \ingroup  UCCAN
+    *
+    *       This member holds the function pointer to the CAN lowlevel device driver Write()
+    *       function.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16S (*Write)(CPU_INT16S paraId, CPU_INT08U *buffer, CPU_INT16U size);
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  DRIVER IO FUNCTION CODES
+    * \ingroup  UCCAN
+    *
+    *       This member array holds the needed function codes for the CAN bus layer. These function
+    *       codes shall be available in the used low level device driver.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16U Io[CAN_IO_FUNC_N];
+
+} CANBUS_PARA;
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      CAN BUS OBJECT
+* \ingroup  UCCAN
+*
+*           This structure holds the runtime data for the CAN bus management.
+*/
+/*------------------------------------------------------------------------------------------------*/
+typedef struct {
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  CONFIG LINK
+    * \ingroup  UCCAN
+    *
+    *       This member holds the pointer to the readonly CAN bus configuration.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANBUS_PARA *Cfg;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  DEVICE
+    * \ingroup  UCCAN
+    *
+    *       This member holds the device ID, which is returned by the CANOpen() function of the
+    *       linked lowlevel device driver.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16S Dev;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  RX TIMEOUT
+    * \ingroup  UCCAN
+    *
+    *       This member holds the timeout, which is used during the CanBusRead().
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16U RxTimeout;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  TX TIMEOUT
+    * \ingroup  UCCAN
+    *
+    *       This member holds the timeout, which is used during the CanBusWrite().
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16U TxTimeout;
+
+	/*--------------------------------------------------------------------------------------------*/
+	/*!
+	* \brief                      CAN BUS TRANSMIT FRAME BUFFER
+	* \ingroup  UCCAN
+	*
+	*           Allocation of transmit can bus frame buffer
+	*/
+	/*--------------------------------------------------------------------------------------------*/
+	CANFRM     BufTx[CANBUS_TX_QSIZE];
+
+	/*--------------------------------------------------------------------------------------------*/
+	/*!
+	* \brief                      CAN BUS TRANSMIT BUFFER READ FRAME
+	* \ingroup  UCCAN
+	*
+	*           Next read location in can bus frame buffer
+	*/
+	/*--------------------------------------------------------------------------------------------*/
+	CPU_INT16U BufTxRd;
+
+	/*--------------------------------------------------------------------------------------------*/
+	/*!
+	* \brief                      CAN BUS TRANSMIT BUFFER WRITE FRAME
+	* \ingroup  UCCAN
+	*
+	*           Next write location in can bus frame buffer
+	*/
+	/*--------------------------------------------------------------------------------------------*/
+	CPU_INT16U BufTxWr;
+
+	/*--------------------------------------------------------------------------------------------*/
+	/*!
+	* \brief                      CAN BUS RECEIVE FRAME BUFFER
+	* \ingroup  UCCAN
+	*
+	*           Allocation of receive can bus frame buffer
+	*/
+	/*--------------------------------------------------------------------------------------------*/
+	CANFRM     BufRx[CANBUS_RX_QSIZE];
+
+	/*--------------------------------------------------------------------------------------------*/
+	/*!
+	* \brief                      CAN BUS RECEIVE BUFFER READ FRAME
+	* \ingroup  UCCAN
+	*
+	*           Next read location in can bus frame buffer
+	*/
+	/*--------------------------------------------------------------------------------------------*/
+	CPU_INT16U BufRxRd;
+
+	/*--------------------------------------------------------------------------------------------*/
+	/*!
+	* \brief                      CAN BUS RECEIVE BUFFER WRITE FRAME
+	* \ingroup  UCCAN
+	*
+	*           Next write location in can bus frame buffer
+	*/
+	/*--------------------------------------------------------------------------------------------*/
+	CPU_INT16U BufRxWr;
+
+#if CANBUS_STAT_EN > 0
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  RECEIVED FRAMES
+    * \ingroup  UCCAN
+    *
+    *       This member holds the counter, which will be incremented every received CAN frame.
+    *
+    * \note This counter is incremented, when the CanBusRead() function successfully gives the
+    *       CAN frame to the application layer.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16U RxOk;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  TRANSMITTED FRAMES
+    * \ingroup  UCCAN
+    *
+    *       This member holds the counter, which will be incremented every transmitted CAN frame.
+    *
+    * \note This counter is incremented, when the CAN transmit complete interrupt indicates,
+    *       that the CAN frame is sent to the bus.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16U TxOk;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  LOST RECEIVE FRAMES
+    * \ingroup  UCCAN
+    *
+    *       This member holds the counter, which will be incremented for every received CAN frame
+    *       which can not transfered to the application, due to a full receive queue.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16U RxLost;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  LOST RECEIVE FRAMES
+    * \ingroup  UCCAN
+    *
+    *       This member holds the counter, which will be incremented for every transmission CAN
+    *       frame, which can not transfered to the transmit interrupt handler due to a full
+    *       transmission queue.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16U TxLost;
+#endif /* CANBUS_STAT_EN > 0 */
+
+} CANBUS_DATA;
+
+
+/*
+****************************************************************************************************
+*                                       FUNCTION PROTOTYPES
+****************************************************************************************************
+*/
+
+CPU_INT16S CanBusInit      (CPU_INT32U arg);
+CPU_INT16S CanBusIoCtl     (CPU_INT16S busId, CPU_INT16U func, void *argp);
+CPU_INT16S CanBusRead      (CPU_INT16S busId, void *buffer, CPU_INT16U size);
+CPU_INT16S CanBusWrite     (CPU_INT16S busId, void *buffer, CPU_INT16U size);
+CPU_INT16S CanBusEnable    (CANBUS_PARA *cfg);
+CPU_INT16S CanBusDisable   (CPU_INT16S busId);
+void       CanBusTxHandler (CPU_INT16S busId);
+void       CanBusRxHandler (CPU_INT16S busId);
+void       CanBusNSHandler (CPU_INT16S busId);
+
+#if CANBUS_HOOK_NS_EN == 1
+void       CanBusNSHook    (CPU_INT16S busId);    /* hooks are found in can_cfg.c */
+#endif
+#if CANBUS_HOOK_RX_EN == 1
+CPU_INT16S CanBusRxHook    (CPU_INT16S busId, void *buffer);
+#endif
+
+
+#endif  /* CANBUS_EN > 0 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* #ifndef _CAN_BUS_H_ */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_drv.h b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_drv.h
new file mode 100644
index 0000000..b5fc17b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_drv.h
@@ -0,0 +1,118 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_drv.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+* Purpose       : This include file defines the CAN low-level device driver interface.
+****************************************************************************************************
+*/
+
+#ifndef _CAN_DRV_H_
+#define _CAN_DRV_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                          I/O CONTROL FUNCTIONCODES
+*
+*            This enumeration defines the required functioncode values for the lowlevel
+*            device driver function IoCtl().
+*/
+/*------------------------------------------------------------------------------------------------*/
+enum CANDRV_IOCTL_FUNC {
+    /*! \brief Set Baudrate
+     *
+     * This enum value is the functioncode to set the baudrate of the CAN controller interface.
+     *
+     * The parameter pointer shall point to an CPU_INT32U variable, which holds the baudrate
+     * in bit/s.
+     */
+    CAN_SET_BAUDRATE = 0,
+    /*! \brief Enable Bus
+     *
+     * This enum value is the functioncode to start the CAN controller interface. Most common
+     * is to set the CAN controller in active mode.
+     *
+     * The parameter pointer is not used for this function.
+     */
+    CAN_START,
+    /*! \brief Disable Bus
+     *
+     * This enum value is the functioncode to stop the CAN controller interface. Most common
+     * is to set the CAN controller in passive mode.
+     *
+     * The parameter pointer is not used for this function.
+     */
+    CAN_STOP,
+    /*! \brief Set Receiver to Standard Identifier
+     *
+     * This enum value is the functioncode to configure the CAN receiver to receive only
+     * CAN standard identifiers.
+     *
+     * The parameter pointer is not used for this function.
+     */
+    CAN_RX_STANDARD,
+    /*! \brief Set Receiver to Extended Identifier
+     *
+     * This enum value is the functioncode to configure the CAN receiver to receive only
+     * CAN extended identifiers.
+     *
+     * The parameter pointer is not used for this function.
+     */
+    CAN_RX_EXTENDED,
+    /*! \brief Get TX Buffer Status
+     *
+     * This enum value is the functioncode to get the status of the current transmit
+     * buffer.
+     *
+     * The parameter pointer shall point to a CPU_INT08U variable, where the status
+     * shall be written to.
+     */
+    CAN_TX_READY,
+    /*! \brief Get Node Status
+     *
+     * This enum value is the functioncode to get the node status from the
+     * CAN controller.
+    *
+    * The parameter pointer shall point to a CPU_INT08U variable, where the status
+    * shall be written to.
+     */
+    CAN_GET_NODE_STATUS,
+
+    /*! \brief Number of Needed IO Function Codes
+     *
+     * This enum value holds the number of function codes, which are used within the
+     * can bus layer.
+     */
+    CAN_IO_FUNC_N
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* #ifndef _CAN_DRV_H_ */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_err.h b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_err.h
new file mode 100644
index 0000000..820f122
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_err.h
@@ -0,0 +1,89 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_err.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+* Purpose       : This include file holds the error codes and error macro used in the uC/CAN layers.
+****************************************************************************************************
+*/
+
+#ifndef CAN_ERR__H
+#define CAN_ERR__H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/****************************************************************************/
+/* uC/CAN global error variable (contains latest CAN error code             */
+/****************************************************************************/
+extern volatile CPU_INT16S can_errnum;
+
+/****************************************************************************/
+/* uC/CAN error codes                                                       */
+/****************************************************************************/
+#define CAN_ERR_NONE         0
+#define CAN_ERR_NULLPTR     -1
+#define CAN_ERR_SIGMOD      -4
+#define CAN_ERR_BUSID       -10
+#define CAN_ERR_FRMSIZE     -11
+#define CAN_ERR_OPEN        -12
+#define CAN_ERR_ENABLE      -14
+#define CAN_ERR_IOCTRLFUNC  -15
+#define CAN_ERR_NULLMSG     -17
+#define CAN_ERR_MSGID       -18
+#define CAN_ERR_MSGUNUSED   -19
+#define CAN_ERR_MSGCREATE   -20
+#define CAN_ERR_SIGID       -21
+#define CAN_ERR_NULLSIGCFG  -22
+#define CAN_ERR_CANSIZE     -23
+#define CAN_ERR_BUFFSIZE    -24
+#define CAN_ERR_SIGCREATE   -25
+#define CAN_ERR_FRMWIDTH    -26
+#define CAN_ERR_BUSINIT     -27
+#define CAN_ERR_OSINIT      -240
+#define CAN_ERR_OSFREE      -241
+#define CAN_ERR_OSQUEUE     -242
+#define CAN_ERR_OSALLOC     -244
+#define CAN_ERR_OSSEM       -245
+#define CAN_ERR_OSQPEND     -246
+#define CAN_ERR_NOFRM       -247
+#define CAN_ERR_OSSEMPEND   -248
+#define CAN_ERR_OSSEMPOST   -248
+#define CAN_ERR_OSQACCEPT   -249
+#define CAN_ERR_UNKNOWN     -255
+
+/****************************************************************************/
+/* uC/CAN macros                                                            */
+/****************************************************************************/
+/*lint –emacro( {717}, CANSetErrRegister ) */
+#define CANSetErrRegister(errorcode)     do { if (errorcode < CAN_ERR_NONE) {can_errnum = errorcode;} } while (0)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CAN_ERR__H */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_frm.h b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_frm.h
new file mode 100644
index 0000000..c37381d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_frm.h
@@ -0,0 +1,154 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_frm.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+* Purpose       : This include file defines the symbolic constants and function prototypes for
+*                 the CAN frame handling.
+****************************************************************************************************
+*/
+
+#ifndef _CAN_FRM_H_
+#define _CAN_FRM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+****************************************************************************************************
+*                                             INCLUDES
+****************************************************************************************************
+*/
+#include "cpu.h"                                      /* CPU configuration                        */
+
+
+/*
+****************************************************************************************************
+*                                             DEFINES
+****************************************************************************************************
+*/
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      CODING: BIT MASK
+*
+*           The position byte is encoded in the following way:
+*           - Bit 0..5: BYte position of first byte in payload
+*           - Bit 6..7: Encoding of bytes (0=big endian, 1=little endian)
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANFRM_CODING_MSK     0xC0u
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      CODING: BIG ENDIAN
+*
+*           Encoding of bytes in big endian format.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANFRM_BIG_ENDIAN     0x00u
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      CODING: LITTLE ENDIAN
+*
+*           Encoding of bytes in little endian format.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANFRM_LITTLE_ENDIAN  0x40u
+
+
+/*
+****************************************************************************************************
+*                                            DATA TYPES
+****************************************************************************************************
+*/
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      CAN FRAME
+*
+*           This structure contains all needed data to handle a single CAN frame
+*/
+/*------------------------------------------------------------------------------------------------*/
+typedef struct {
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  CAN IDENTIFIER
+    *
+    *       This member holds the CAN identifier.
+    *
+    * \note To differentiate standard and extended identifiers the following addition to the
+    *       identifier is implemented:
+    *       - bit31: reserved (always 0)
+    *       - bit30: marks a remote transmission request (1=rtr, 0=data frame)
+    *       - bit29: marks an extended identifier (1=extended, 0=standard)
+    *       - bit28-0: the identifier (standard or extended)
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT32U Identifier;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  CAN PAYLOAD
+    *
+    *       This member holds up to 8 bytes, which can be handled with a single CAN message.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT08U Data[8];
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  CAN DLC
+    *
+    *       This member holds the number of valid datas in the payload.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT08U DLC;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  SPARE
+    *
+    *       These bytes are added to get a frame size of an integral number of pointers.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT08U Spare[3];
+
+} CANFRM;
+
+
+/*
+****************************************************************************************************
+*                                       FUNCTION PROTOTYPES
+****************************************************************************************************
+*/
+
+void       CanFrmSet(CANFRM *frm, CPU_INT32U value, CPU_INT08U width, CPU_INT08U pos);
+CPU_INT32U CanFrmGet(CANFRM *frm, CPU_INT08U width, CPU_INT08U pos);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* #ifndef _CAN_FRM_H_ */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_msg.h b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_msg.h
new file mode 100644
index 0000000..478dab5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_msg.h
@@ -0,0 +1,287 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_msg.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+* Purpose       : This include file defines the symbolic constants for the CAN message database.
+****************************************************************************************************
+*/
+
+#ifndef _CAN_MSG_H_
+#define _CAN_MSG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+****************************************************************************************************
+*                                             INCLUDES
+****************************************************************************************************
+*/
+#include "cpu.h"                                      /* CPU configuration                        */
+#include "can_cfg.h"                                  /* CAN abstraction module configuration     */
+
+/*
+****************************************************************************************************
+*                                              DEFINES
+****************************************************************************************************
+*/
+
+#if CANMSG_EN > 0
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      TYPE: NOT USED
+*
+*           This define holds the coding for the information: 'message not used'. This status
+*           is the default status, before the CAN message initialization function is called.
+*           After the CAN message initialization, this status remains in the CAN message interface
+*           slots, which is not configured via the configuration structure.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANMSG_UNUSED        0x00
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      TYPE: TX MESSAGE
+*
+*           This define holds the coding for the information: 'transmit message'. This status
+*           will be set, after a signal is created with a corresponding transmit configuration.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANMSG_TX            0x01u
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      TYPE: RX MESSAGE
+*
+*           This define holds the coding for the information: 'receive message'. This status
+*           will be set, after a signal is created with a corresponding receive configuration.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANMSG_RX            0x02u
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      TYPE MASK FOR USER TYPES
+*
+*           This define holds the mask for the user definable type informations. This mask
+*           is used to remove these bits within the CAN signal management. These bits are
+*           free for application layer message management.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANMSG_USER          0xF0u
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      MAX NUMBER OF LINKS
+*
+*           This define holds the maximal number of linked signals per message.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANMSG_MAX_LINK      8u
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      I/O CONTROL FUNCTIONCODES
+*
+*           This enumeration defines the functioncode values for the function CanMsgIoCtl().
+*/
+/*------------------------------------------------------------------------------------------------*/
+enum CANMSG_IOCTL_FUNC {
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  IS MESSAGE CHANGED
+    *
+    *       With this function code the IO control will check all linked signals for a change.
+    *       If at least one signal is changed, the argument pointer will be used to set the
+    *       boolen return status to TRUE, otherwise the return status will be set to FALSE.
+    *
+    * \note Argument pointer type: CPU_BOOLEAN *
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANMSG_IS_CHANGED = 0
+};
+
+
+/*
+****************************************************************************************************
+*                                            DATA TYPES
+****************************************************************************************************
+*/
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      SIGNAL MAP
+*
+*           This structure holds all informations, which are needed for the link from
+*           CAN signals to the data position in the CAN message.
+*/
+/*------------------------------------------------------------------------------------------------*/
+typedef struct {
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  SIGNAL ID
+    *
+    *       This member holds the unique signal identifier, which shall be linked to the message.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16U Id;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  POSITION
+    *
+    *       This member holds position of the first bit or byte, which is used in the can frame.
+    *       Interpreting the position in bit or byte depends on the configuration
+    *       setting 'CANSIG_GRANULARITY'.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT08U Pos;
+
+} CANMSG_LINK;
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      MESSAGE CONFIGURATION
+*
+*           This structure contains the informations for a CAN signal. A signal represents
+*           a piece of information within the CAN payload (a single bit, a bitfield,
+*           a integer value, etc...).
+*
+* \note     For systems with very limited amount of RAM, this structure can be placed in
+*           ROM by declaring (and initializing) a const-variable during compile-time.
+*/
+/*------------------------------------------------------------------------------------------------*/
+typedef struct {
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                  IDENTIFIER
+    *
+    *       This member holds the identifier of the message.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT32U Identifier;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+     * \brief                 TYPE
+     *
+     *      This member holds the type of the message.
+     */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT08U Type;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+     * \brief                 DATA LENGTH CODE
+     *
+     *      This member holds the DLC of the message.
+     */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT08U DLC;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+     * \brief                 NUMBER OF SIGNALS
+     *
+     *      This member holds the used number of signals in the following link table.
+     */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT08U SigNum;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+     * \brief                 LINK TABLE
+     *
+     *      This array holds the linked signal for this message.
+     */
+    /*--------------------------------------------------------------------------------------------*/
+    CANMSG_LINK SigLst[CANMSG_MAX_LINK];
+
+} CANMSG_PARA;
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*!
+* \brief                      CAN MESSAGE OBJECT
+*
+*           This structure contains the dynamic informations for a CAN message.
+*/
+/*------------------------------------------------------------------------------------------------*/
+typedef struct
+{
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+     * \brief                 MESSAGE IDENTIFIER
+     *
+     *      This member holds the system wide unique message identifier.
+     */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16U Id;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+     * \brief                 CONFIGURATION LINK
+     *
+     *      This member holds a pointer to the corresponding message configuration.
+     */
+    /*--------------------------------------------------------------------------------------------*/
+    CANMSG_PARA *Cfg;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+     * \brief                 MESSAGE LIST LINK
+     *
+     *      This member points to the next CAN message object, or contains NULL for the end
+     *      of the list.
+     */
+    /*--------------------------------------------------------------------------------------------*/
+    void *Next;
+
+} CANMSG_DATA;
+
+/*
+****************************************************************************************************
+*                                       FUNCTION PROTOTYPES
+****************************************************************************************************
+*/
+
+CPU_INT16S CanMsgInit   (CPU_INT32U arg);
+CPU_INT16S CanMsgOpen   (CPU_INT16S drvId, CPU_INT32U devName, CPU_INT16U mode);
+CPU_INT16S CanMsgIoCtl  (CPU_INT16S msgId, CPU_INT16U func, void *argp);
+CPU_INT16S CanMsgRead   (CPU_INT16S msgId, void *buffer, CPU_INT16U size);
+CPU_INT16S CanMsgWrite  (CPU_INT16S msgId, void *buffer, CPU_INT16U size);
+CPU_INT16S CanMsgCreate (CANMSG_PARA *cfg);
+CPU_INT16S CanMsgDelete (CPU_INT16S msgId);
+
+#endif  /* CANMSG_EN > 0 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* #ifndef _CAN_MSG_H_ */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_sig.h b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_sig.h
new file mode 100644
index 0000000..54d531f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CAN/Source/can_sig.h
@@ -0,0 +1,388 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_sig.h
+* Version       : V2.42.00
+* Programmer(s) : E0
+* Purpose       : This include file defines the symbolic constants for the CAN signal database.
+****************************************************************************************************
+*/
+
+#ifndef _CAN_SIG_H_
+#define _CAN_SIG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+****************************************************************************************************
+*                                             INCLUDES
+****************************************************************************************************
+*/
+
+#include "cpu.h"                                      /* CPU configuration                        */
+#include "can_cfg.h"                                  /* CAN abstraction module configuration     */
+
+
+/*
+****************************************************************************************************
+*                                           DEFINES
+****************************************************************************************************
+*/
+#define CANSIG_CLR_STATUS 0xF8u
+
+
+/*
+****************************************************************************************************
+*                                            TYPES
+****************************************************************************************************
+*/
+
+#if CANSIG_EN > 0
+
+#if   CANSIG_MAX_WIDTH == 1u
+typedef CPU_INT08U CANSIG_VAL_T;
+#elif CANSIG_MAX_WIDTH == 2u
+typedef CPU_INT16U CANSIG_VAL_T;
+#elif CANSIG_MAX_WIDTH == 4u
+typedef CPU_INT32U CANSIG_VAL_T;
+#else
+#error "can_sig.h: CANSIG_MAX_WIDTH is invalid; check definition to be 1, 2 or 4!"
+#endif
+
+#if CANSIG_CALLBACK_EN > 0
+typedef void (*CANSIG_CALLBACK)(void* arg, CANSIG_VAL_T* value, CPU_INT32U CallbackId);
+#endif
+
+/*
+****************************************************************************************************
+*                                              DEFINES
+****************************************************************************************************
+*/
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        STATUS: NOT USED
+*
+*           This define holds the coding for the information: 'signal not used'. This status
+*           is the default status, before the CAN signal initialization function is called.
+*           After the CAN signal initialization, this status remains in the CAN signal interface
+*           slots, which is not configured via the configuration structure.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANSIG_UNUSED        0x00u
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        STATUS: NOT CHANGED
+*
+*           This define holds the coding for the information: 'signal is unchanged'. This status
+*           will be set, after a signal access with CanSigRead().
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANSIG_UNCHANGED     0x01u
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        STATUS: UPDATED
+*
+*           This define holds the coding for the information: 'signal is updated'. This status
+*           will be set, after a signal write access with CanSigWrite() - independent from the
+*           signal value.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANSIG_UPDATED       0x02u
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        STATUS: CHANGED
+*
+*           This define holds the coding for the information: 'signal is changed'. This status
+*           will be set, when a CanSigWrite() access changes the value of the signal.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANSIG_CHANGED       0x03u
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        STATUS: ERROR
+*
+*           This define holds the coding for the information: 'signal error'.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANSIG_ERROR         0x04u
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        STATUS: WRITE PROTECTION ENABLED
+*
+*           This define holds the coding for the information: signal is write protected.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANSIG_PROT_RO       0x40u
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        STATUS: TIMESTAMPING DISABLED
+*
+*           This define holds the coding for the information: signal timestamp is disabled.
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANSIG_NO_TIMESTAMP  0x80u
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        CALLBACK ID BITS
+*
+*           This define holds the coding for the information: callback identification bits
+*/
+/*------------------------------------------------------------------------------------------------*/
+#define CANSIG_CALLBACK_WRITE_ID 0x00000001u
+#define CANSIG_CALLBACK_READ_ID  0x00000002u
+
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        I/O CONTROL FUNCTIONCODES
+*
+*           This enumeration defines the functioncode values for the function CanSigIoCtl().
+*/
+/*------------------------------------------------------------------------------------------------*/
+enum CANSIG_IOCTL_FUNC {
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      FUNCTIONCODE: GET WIDTH
+    *
+    *       This enum value is the functioncode to get the width of the signal.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_GET_WIDTH = 1,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      FUNCTIONCODE: GET STATUS
+    *
+    *       This enum value is the functioncode to get the status of the signal.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_GET_STATUS,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      FUNCTIONCODE: GET TIMESTAMP
+    *
+    *       This enum value is the functioncode to get the timestamp of the signal.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_GET_TIMESTAMP,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      FUNCTIONCODE: GET TIME SINCE LAST UPDATE
+    *
+    *       This enum value is the functioncode to get the time since last update of the signal.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_GET_TIME_SINCE_UPDATE,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      FUNCTIONCODE: DISABLE TIMESTAMPING
+    *
+    *       This enum value is the functioncode to disable the timestamping.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_DISABLE_TIMESTAMP,                         /*!< \brief Disable timestamp for next upd. */
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      FUNCTIONCODE: ENABLE TIMESTAMPING
+    *
+    *       This enum value is the functioncode to enable the timestamping.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_ENABLE_TIMESTAMP,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      FUNCTIONCODE: SET TIMESTAMP
+    *
+    *       This enum value is the functioncode to set the timestamp.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_SET_TIMESTAMP,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      FUNCTIONCODE: GET WRITE PROTECTION
+    *
+    *       This enum value is the functioncode to get the status of the write protection.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_GET_WRITE_PROTECTION,
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      FUNCTIONCODE: SET WRITE PROTECTION
+    *
+    *       This enum value is the functioncode to set the signal status to write protection.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_SET_WRITE_PROTECTION
+
+};
+
+
+/*
+****************************************************************************************************
+*                                            DATA TYPES
+****************************************************************************************************
+*/
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        SIGNAL CONFIGURATION
+*
+*           This structure contains the configuration informations for a signal. A signal
+*           represents a piece of information within the application (a single bit,
+*           a bitfield, a integer value, etc...).
+*
+* \note     For systems with very limited amount of RAM, this structure can be placed in
+*           ROM by declaring (and initializing) a const-variable during compile-time.
+*/
+/*------------------------------------------------------------------------------------------------*/
+typedef struct {
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      INITIAL STATUS
+    *
+    *       This member holds the initial status of the signal. This status will be copied to the
+    *       signal status during initialization phase by calling CanSigInit().
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT08U Status;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      WIDTH
+    *
+    *       This member holds the width of the signal in bit/byte depending on CANSIG_GRANULARITY.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT08U Width;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      INITIAL VALUE
+    *
+    *       This member holds the initial value of the signal. This value will be copied to the
+    *       signal value during initialization phase by calling CanSigInit().
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_VAL_T Value;
+
+#if CANSIG_CALLBACK_EN > 0
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      CALLBACK FUNCTION
+    *
+    *       This member holds the function pointer to the callback function.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_CALLBACK CallbackFct;
+#endif
+
+} CANSIG_PARA;
+
+/*------------------------------------------------------------------------------------------------*/
+/*! \brief                        SIGNAL OBJECT
+ *
+ *           This structure contains the current status informations for a signal.
+ */
+/*------------------------------------------------------------------------------------------------*/
+typedef struct {
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      CONFIG LINK
+    *
+    *       This member holds the pointer to the corresponding CAN signal parameters.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_PARA *Cfg;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      VALUE
+    *
+    *       This member holds the current value of the signal.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CANSIG_VAL_T Value;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      STATUS
+    *
+    *       This member holds the current status of the signal.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT08U Status;
+#if CANSIG_STATIC_CONFIG == 0
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      TIMESTAMP
+    *
+    *       This member holds the timestamp of the corresponding CAN signal.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT32U   TimeStamp;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      NEXT LINK
+    *
+    *       This member holds the pointer to the next signal in the signal list.
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    void *Next;
+    /*--------------------------------------------------------------------------------------------*/
+    /*!
+    * \brief                      SIGNAL ID
+    *
+    *       This member holds the unique signal identifier
+    */
+    /*--------------------------------------------------------------------------------------------*/
+    CPU_INT16U Id;
+#endif
+} CANSIG_DATA;
+
+
+/*
+****************************************************************************************************
+*                                       FUNCTION PROTOTYPES
+****************************************************************************************************
+*/
+
+CPU_INT16S CanSigIoCtl (CPU_INT16S sigId, CPU_INT16U  func, void *argp);
+CPU_INT16S CanSigWrite (CPU_INT16S sigId, void *buffer, CPU_INT16U size);
+CPU_INT16S CanSigRead  (CPU_INT16S sigId, void *buffer, CPU_INT16U size);
+CPU_INT16S CanSigInit  (CPU_INT32U arg);
+#if CANSIG_STATIC_CONFIG == 0
+CPU_INT16S CanSigCreate(CANSIG_PARA *cfg);
+#if CANSIG_USE_DELETE == 1
+CPU_INT16S CanSigDelete(CPU_INT16S sigId);
+#endif
+#endif
+
+#endif  /* CANSIG_EN > 0 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* #ifndef _CAN_SIG_H_ */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu.h b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu.h
new file mode 100644
index 0000000..4da3411
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu.h
@@ -0,0 +1,756 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            CPU PORT FILE
+*
+*                                        Generic ARM-Cortex-A
+*                                              GNU GCC
+*
+* Filename      : cpu.h
+* Version       : V1.30.02.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_MODULE_PRESENT
+#define  CPU_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                          CPU INCLUDE FILES
+*
+* Note(s) : (1) The following CPU files are located in the following directories :
+*
+*               (a) \\cpu_cfg.h
+*
+*               (b) \\cpu_def.h
+*
+*               (c) \\\\cpu*.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for common   CPU-compiler software
+*                                                          directory name for specific CPU
+*                                                     directory name for specific compiler
+*
+*           (2) Compiler MUST be configured to include the '\\' directory the 
+*               specific CPU-compiler directory, & '\\' as additional include 
+*               path directories.
+*
+*           (3) Since NO custom library modules are included, 'cpu.h' may ONLY use configurations from 
+*               CPU configuration file 'cpu_cfg.h' that do NOT reference any custom library definitions.
+*
+*               In other words, 'cpu.h' may use 'cpu_cfg.h' configurations that are #define'd to numeric 
+*               constants or to NULL (i.e. NULL-valued #define's); but may NOT use configurations to 
+*               custom library #define's (e.g. DEF_DISABLED or DEF_ENABLED).
+*********************************************************************************************************
+*/
+
+#include  
+#include                                             /* See Note #3.                                         */
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    CONFIGURE STANDARD DATA TYPES
+*
+* Note(s) : (1) Configure standard data types according to CPU-/compiler-specifications.
+*
+*           (2) (a) (1) 'CPU_FNCT_VOID' data type defined to replace the commonly-used function pointer
+*                       data type of a pointer to a function which returns void & has no arguments.
+*
+*                   (2) Example function pointer usage :
+*
+*                           CPU_FNCT_VOID  FnctName;
+*
+*                           FnctName();
+*
+*               (b) (1) 'CPU_FNCT_PTR'  data type defined to replace the commonly-used function pointer
+*                       data type of a pointer to a function which returns void & has a single void
+*                       pointer argument.
+*
+*                   (2) Example function pointer usage :
+*
+*                           CPU_FNCT_PTR   FnctName;
+*                           void          *p_obj
+*
+*                           FnctName(p_obj);
+*********************************************************************************************************
+*/
+
+typedef            void        CPU_VOID;
+typedef            char        CPU_CHAR;                        /*  8-bit character                                     */
+typedef  unsigned  char        CPU_BOOLEAN;                     /*  8-bit boolean or logical                            */
+typedef  unsigned  char        CPU_INT08U;                      /*  8-bit unsigned integer                              */
+typedef    signed  char        CPU_INT08S;                      /*  8-bit   signed integer                              */
+typedef  unsigned  short       CPU_INT16U;                      /* 16-bit unsigned integer                              */
+typedef    signed  short       CPU_INT16S;                      /* 16-bit   signed integer                              */
+typedef  unsigned  int         CPU_INT32U;                      /* 32-bit unsigned integer                              */
+typedef    signed  int         CPU_INT32S;                      /* 32-bit   signed integer                              */
+typedef  unsigned  long  long  CPU_INT64U;                      /* 64-bit unsigned integer                              */
+typedef    signed  long  long  CPU_INT64S;                      /* 64-bit   signed integer                              */
+
+typedef            float       CPU_FP32;                        /* 32-bit floating point                                */
+typedef            double      CPU_FP64;                        /* 64-bit floating point                                */
+
+
+typedef  volatile  CPU_INT08U  CPU_REG08;                       /*  8-bit register                                      */
+typedef  volatile  CPU_INT16U  CPU_REG16;                       /* 16-bit register                                      */
+typedef  volatile  CPU_INT32U  CPU_REG32;                       /* 32-bit register                                      */
+typedef  volatile  CPU_INT64U  CPU_REG64;                       /* 64-bit register                                      */
+
+
+typedef            void      (*CPU_FNCT_VOID)(void);            /* See Note #2a.                                        */
+typedef            void      (*CPU_FNCT_PTR )(void *p_obj);     /* See Note #2b.                                        */
+
+
+/*
+****************************************************************************************************
+*                                           DATA VALUES
+****************************************************************************************************
+*/
+#ifndef TRUE
+#define TRUE ((CPU_BOOLEAN)1)                         /*!< \brief Value for logical 'true'        */
+#endif
+
+#ifndef FALSE
+#define FALSE ((CPU_BOOLEAN)0)                        /*!< \brief Value for logical 'false'       */
+#endif
+
+#ifndef NULL
+#define NULL ((void*)0)                               /*!< \brief Value for unused pointers       */
+#endif
+
+/*
+*********************************************************************************************************
+*                                       CPU WORD CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_ADDR_SIZE & CPU_CFG_DATA_SIZE with CPU's word sizes :
+*
+*                   CPU_WORD_SIZE_08             8-bit word size
+*                   CPU_WORD_SIZE_16            16-bit word size
+*                   CPU_WORD_SIZE_32            32-bit word size
+*                   CPU_WORD_SIZE_64            64-bit word size            See Note #1a
+*
+*               (a) 64-bit word size NOT currently supported.
+*
+*           (2) Configure CPU_CFG_ENDIAN_TYPE with CPU's data-word-memory order :
+*
+*               (a) CPU_ENDIAN_TYPE_BIG         Big-   endian word order (CPU words' most  significant
+*                                                                         octet @ lowest memory address)
+*               (b) CPU_ENDIAN_TYPE_LITTLE      Little-endian word order (CPU words' least significant
+*                                                                         octet @ lowest memory address)
+*********************************************************************************************************
+*/
+
+                                                                /* Define  CPU         word sizes (see Note #1) :       */
+#define  CPU_CFG_ADDR_SIZE              CPU_WORD_SIZE_32        /* Defines CPU address word size  (in octets).          */
+#define  CPU_CFG_DATA_SIZE              CPU_WORD_SIZE_32        /* Defines CPU data    word size  (in octets).          */
+#define  CPU_CFG_DATA_SIZE_MAX          CPU_WORD_SIZE_64        /* Defines CPU maximum word size  (in octets).          */
+
+                                                                /* Defines CPU data    word-memory order (see Note #2). */
+#if (defined(__BYTE_ORDER__) && \
+            (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
+#define  CPU_CFG_ENDIAN_TYPE            CPU_ENDIAN_TYPE_BIG
+#else
+#define  CPU_CFG_ENDIAN_TYPE            CPU_ENDIAN_TYPE_LITTLE
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 CONFIGURE CPU ADDRESS & DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* CPU address type based on address bus size.          */
+#if     (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_32)
+typedef  CPU_INT32U  CPU_ADDR;
+#elif   (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_ADDR;
+#else
+typedef  CPU_INT08U  CPU_ADDR;
+#endif
+
+                                                                /* CPU data    type based on data    bus size.          */
+#if     (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32)
+typedef  CPU_INT32U  CPU_DATA;
+#elif   (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_DATA;
+#else
+typedef  CPU_INT08U  CPU_DATA;
+#endif
+
+
+typedef  CPU_DATA    CPU_ALIGN;                                 /* Defines CPU data-word-alignment size.                */
+typedef  CPU_ADDR    CPU_SIZE_T;                                /* Defines CPU standard 'size_t'   size.                */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU STACK CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_STK_GROWTH in 'cpu.h' with CPU's stack growth order :
+*
+*               (a) CPU_STK_GROWTH_LO_TO_HI     CPU stack pointer increments to the next higher  stack
+*                                                   memory address after data is pushed onto the stack
+*               (b) CPU_STK_GROWTH_HI_TO_LO     CPU stack pointer decrements to the next lower   stack
+*                                                   memory address after data is pushed onto the stack
+*
+*           (2) Configure CPU_CFG_STK_ALIGN_BYTES with the highest minimum alignement required for
+*               cpu stacks.
+*
+*               (a) ARM Procedure Calls Standard requires an 8 bytes stack alignment.
+*********************************************************************************************************
+*/
+
+#define  CPU_CFG_STK_GROWTH       CPU_STK_GROWTH_HI_TO_LO       /* Defines CPU stack growth order (see Note #1).        */
+
+#define  CPU_CFG_STK_ALIGN_BYTES  (8u)                          /* Defines CPU stack alignment in bytes. (see Note #2). */
+
+typedef  CPU_INT32U               CPU_STK;                      /* Defines CPU stack data type.                         */
+typedef  CPU_ADDR                 CPU_STK_SIZE;                 /* Defines CPU stack size data type.                    */
+
+
+/*
+*********************************************************************************************************
+*                                   CRITICAL SECTION CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_CRITICAL_METHOD with CPU's/compiler's critical section method :
+*
+*                                                       Enter/Exit critical sections by ...
+*
+*                   CPU_CRITICAL_METHOD_INT_DIS_EN      Disable/Enable interrupts
+*                   CPU_CRITICAL_METHOD_STATUS_STK      Push/Pop       interrupt status onto stack
+*                   CPU_CRITICAL_METHOD_STATUS_LOCAL    Save/Restore   interrupt status to local variable
+*
+*               (a) CPU_CRITICAL_METHOD_INT_DIS_EN  is NOT a preferred method since it does NOT support
+*                   multiple levels of interrupts.  However, with some CPUs/compilers, this is the only
+*                   available method.
+*
+*               (b) CPU_CRITICAL_METHOD_STATUS_STK    is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Push/save   interrupt status onto a local stack
+*                       (2) Disable     interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Pop/restore interrupt status from a local stack
+*
+*               (c) CPU_CRITICAL_METHOD_STATUS_LOCAL  is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Save    interrupt status into a local variable
+*                       (2) Disable interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Restore interrupt status from a local variable
+*
+*           (2) Critical section macro's most likely require inline assembly.  If the compiler does NOT
+*               allow inline assembly in C source files, critical section macro's MUST call an assembly
+*               subroutine defined in a 'cpu_a.asm' file located in the following software directory :
+*
+*                   \\\\
+*
+*                       where
+*                                   directory path for common   CPU-compiler software
+*                                                      directory name for specific CPU
+*                                                 directory name for specific compiler
+*
+*           (3) (a) To save/restore interrupt status, a local variable 'cpu_sr' of type 'CPU_SR' MAY need
+*                   to be declared (e.g. if 'CPU_CRITICAL_METHOD_STATUS_LOCAL' method is configured).
+*
+*                   (1) 'cpu_sr' local variable SHOULD be declared via the CPU_SR_ALLOC() macro which, if 
+*                        used, MUST be declared following ALL other local variables.
+*
+*                        Example :
+*
+*                           void  Fnct (void)
+*                           {
+*                               CPU_INT08U  val_08;
+*                               CPU_INT16U  val_16;
+*                               CPU_INT32U  val_32;
+*                               CPU_SR_ALLOC();         MUST be declared after ALL other local variables
+*                                   :
+*                                   :
+*                           }
+*
+*               (b) Configure 'CPU_SR' data type with the appropriate-sized CPU data type large enough to
+*                   completely store the CPU's/compiler's status word.
+*********************************************************************************************************
+*/
+                                                                /* Configure CPU critical method      (see Note #1) :   */
+#define  CPU_CFG_CRITICAL_METHOD    CPU_CRITICAL_METHOD_STATUS_LOCAL
+
+typedef  CPU_INT32U                 CPU_SR;                     /* Defines   CPU status register size (see Note #3b).   */
+
+                                                                /* Allocates CPU status register word (see Note #3a).   */
+#if     (CPU_CFG_CRITICAL_METHOD == CPU_CRITICAL_METHOD_STATUS_LOCAL)
+#define  CPU_SR_ALLOC()             CPU_SR  cpu_sr = (CPU_SR)0
+#else
+#define  CPU_SR_ALLOC()
+#endif
+
+
+#define  CPU_INT_DIS() __asm__ __volatile__ ("mrs  %[sr_res], cpsr\r\n" "cpsid if\r\n" "dsb\r\n" : [sr_res]"=r" (cpu_sr) :: "memory");
+
+#define  CPU_INT_EN() __asm__ __volatile__ ("dsb\r\n" "msr  cpsr_c, %[sr_val]\r\n" :: [sr_val]"r" (cpu_sr) : "memory");
+
+
+#ifdef   CPU_CFG_INT_DIS_MEAS_EN
+                                                                        /* Disable interrupts, ...                      */
+                                                                        /* & start interrupts disabled time measurement.*/
+#define  CPU_CRITICAL_ENTER()  do { CPU_INT_DIS();         \
+                                    CPU_IntDisMeasStart(); }  while (0)
+                                                                        /* Stop & measure   interrupts disabled time,   */
+                                                                        /* ...  & re-enable interrupts.                 */
+#define  CPU_CRITICAL_EXIT()   do { CPU_IntDisMeasStop();  \
+                                    CPU_INT_EN();          }  while (0)
+
+#else
+
+#define  CPU_CRITICAL_ENTER()  do { CPU_INT_DIS(); } while (0)          /* Disable   interrupts.                        */
+#define  CPU_CRITICAL_EXIT()   do { CPU_INT_EN();  } while (0)          /* Re-enable interrupts.                        */
+
+#endif
+#define __flush_caches()                                                           \
+    ({  CPU_INT32U dummy1 = (0);																	\
+		asm volatile(	"1: 	mrc p15, 0, r15, c7, c14, 3 	\n\t"	/*Write back data cache	*/	\
+						"		bne 1b 							\n\t"								\
+						" 		mcr p15, 0, %0, c7, c7, 0		\n\t"	/*Invalidate caches 	*/	\
+						"		mcr p15, 0, %0, c7, c10, 4		\n\t"	/*Drain write buffer	*/	\
+						: : "r" (dummy1), "r" (dummy1)  ); })
+
+#define __flush_cache_entry(x)                                                         \
+    ({ CPU_INT32U __arg = (x);                                                     \
+       asm volatile(" mcr p15, 0, %0, c7, c14, 1" : : "r" (__arg) : ); 			 \
+       asm volatile(" mcr p15, 0, %0, c7, c5, 1"  : : "r" (__arg) : ); 			 \
+       asm volatile(" mcr p15, 0, %0, c7, c13, 1" : : "r" (__arg) : ); })
+
+#define __get_task_sp_in_exc()                                   				   					\
+	({ CPU_INT32U __res = 0;                                                           				\
+	   CPU_INT32U __cpsr = 0;														   				\
+	   CPU_INT32U __orig_cpsr = 0;														   			\
+	   	asm volatile(	"MRS     %1, CPSR 	  	\n\t"/* get current PSR value                    */ \
+	   					"MOV	 %2, %1			\n\t"/* create a backup of it.. 				 */ \
+	   					"BIC	 %1, %1, #0x1F	\n\t"/* clear the mode bits                      */ \
+	   					"ORR     %1, %1, #0x9F  \n\t"/* change to SYS mode and disable irqs      */ \
+						"MSR     CPSR_c, %1     \n\t"/* set SYS mode bits                        */ \
+						"MOV	 %0, SP 		\n\t"/* get SP from task stack                   */ \
+						"MSR     CPSR, %2  		\n\t"/* restore old PSR value                    */ \
+		 : "=r" (__res)	:"r" (__cpsr), "r" (__orig_cpsr): );										\
+	      __res; })
+
+#define __get_task_lr_in_exc()                                   				   					\
+	({ CPU_INT32U __res = 0;                                                           				\
+	   CPU_INT32U __cpsr = 0;														   				\
+	   CPU_INT32U __orig_cpsr = 0;														   			\
+	   	asm volatile(	"MRS     %1, CPSR 	  	\n\t"/* get current PSR value                    */ \
+	   					"MOV	 %2, %1			\n\t"/* create a backup of it.. 				 */ \
+	   					"BIC	 %1, %1, #0x1F	\n\t"/* clear the mode bits                      */ \
+	   					"ORR     %1, %1, #0x9F  \n\t"/* change to SYS mode and disable irqs      */ \
+						"MSR     CPSR_c, %1     \n\t"/* set SYS mode bits                        */ \
+						"MOV	 %0, LR 		\n\t"/* get LR from task stack                   */ \
+						"MSR     CPSR, %2  		\n\t"/* restore old PSR value                    */ \
+		 : "=r" (__res)	:"r" (__cpsr), "r" (__orig_cpsr): );										\
+	      __res; })
+
+#define __get_cpsr_in_exc()                                   				   							\
+		({ CPU_INT32U __res = 0;                                                           				\
+		   	asm volatile(	"MRS     %0, CPSR 	  	\n\t"/* get current CPSR value                   */ \
+			 : "=r" (__res)	: : );																		\
+		      __res; })
+
+#define __get_spsr_in_exc()                                   				   							\
+		({ CPU_INT32U __res = 0;                                                           				\
+		   	asm volatile(	"MRS     %0, SPSR 	  	\n\t"/* get current SPSR value                   */ \
+			 : "=r" (__res)	: : );																		\
+		      __res; })
+
+/* Restore old cpsr irq state with old cpu_sr (used in CPU_CRITICAL_EXIT)*/
+#define __set_interrupt_state(x)                                                   \
+    ({ CPU_INT32U __arg = (x);                                                     \
+       asm volatile(" mrs r1,CPSR\n bic r1,r1,#0xC0\n orr r1,r1,%0\n msr CPSR_c,r1" : : "r" (__arg) : "r1"); })
+
+/* Instert a nop */
+#define __no_operation() ({ asm volatile(" nop" : : : ); })
+
+#define __set_domain_control(x)                                                    \
+    ({ CPU_INT32U __arg = (x);                                                     \
+       asm volatile(" mcr p15, 0, %0, c3, c0, 0" : : "r" (__arg) : ); })
+
+#define __get_domain_control()                                                     \
+    ({ CPU_INT32U __res;                                                           \
+       asm volatile(" mrc p15, 0, %0, c3, c0, 0" : "=r" (__res) : : );             \
+       __res; })
+
+/* Invalidate unified tlb, see armv7 ref.manual page */
+#define __invalidate_tlb()                                                         \
+    ({ CPU_INT32U __arg = (0);                                                     \
+       asm volatile(" mcr p15, 0, %0, c8, c7, 0" : : "r" (__arg) : ); })
+
+/* Set base-adress of translation table,
+ * Register: TTBR0
+ *  see armv7 ref.man B4.1.154
+ */
+#define __set_mmu_table(x)                                                         \
+    ({ CPU_INT32U __arg = (x);                                                     \
+       asm volatile(" mcr p15, 0, %0, c2, c0, 0" : : "r" (__arg) : ); })
+
+/*
+ * Get Control-Register of mmu (TTBCR)
+ * see armv7 ref.man B4.1.153
+ */
+#define __get_mmu_control()                                                        \
+    ({ CPU_INT32U __res;                                                           \
+       asm volatile(" mrc p15, 0, %0, c2, c0, 2" : "=r" (__res) : : );             \
+       __res; })
+
+/*
+ * Set Control-Register of mmu (TTBCR)
+ * see armv7 ref.man B4.1.153
+ */
+#define __set_mmu_control(x)                                                       \
+    ({ CPU_INT32U __arg = (x);                                                     \
+       asm volatile(" mcr p15, 0, %0, c2, c0, 2" : : "r" (__arg) : ); })
+
+/*
+ * Read system control register (SCTLR)
+ * see armv7 ref.man B4.1.130
+ */
+#define __get_sys_control()    														\
+	({ CPU_INT32U __res;                                                           \
+	   asm volatile(" mrc p15, 0, %0, c1, c0, 0" : "=r" (__res) : : );             \
+	   __res; })
+
+/*
+ * Set system control register (SCTLR)
+ * see armv7 ref.man B4.1.130
+ */
+#define __set_sys_control(x)                                                       \
+    ({ CPU_INT32U __arg = (x);                                                     \
+       asm volatile(" mcr p15, 0, %0, c1, c0, 0" : : "r" (__arg) : ); })
+
+/*
+ * Read Auxiliary Control Register (ACTLR)
+ * see cortex a9 tech.ref.man 4.3.10
+ */
+#define __get_actlr()    														\
+	({ CPU_INT32U __res;                                                           \
+	   asm volatile(" mrc p15, 0, %0, c1, c0, 1" : "=r" (__res) : : );             \
+	   __res; })
+
+/*
+ * Set Auxiliary Control Register (ACTLR)
+ * see cortex a9 tech.ref.man 4.3.10
+ */
+#define __set_actlr(x)                                                       \
+    ({ CPU_INT32U __arg = (x);                                                     \
+       asm volatile(" mcr p15, 0, %0, c1, c0, 1" : : "r" (__arg) : ); })
+
+/*
+ * Invalidate Branch Predictor using BPIALL register
+ * see armv7 ref.man B3.18.6
+ */
+#define __invalidate_branchpred()													\
+	({ CPU_INT32U __arg = (0);                                                     \
+       asm volatile(" mcr p15, 0, %0, c7, c5, 6" : : "r" (__arg) : ); })
+
+/*
+ * Clear all mmu fault adresses in DFAR, DFSR, IFAR and IFSR
+ * see armv7 ref.man B3.18.3
+ */
+#define __clr_mmu_fault()         																			\
+		CPU_INT32U __arg = (0);                                                     \
+		do {                                                              									\
+			asm volatile(" mcr p15, 0, %0, c6, c0, 0" : : "r" (__arg) : ); /* clear data fault address                 */	\
+			asm volatile(" mcr p15, 0, %0, c5, c0, 0" : : "r" (__arg) : ); /* clear data fault status                  */	\
+			asm volatile(" mcr p15, 0, %0, c6, c0, 2" : : "r" (__arg) : ); /* clear instruction fault address          */	\
+			asm volatile(" mcr p15, 0, %0, c5, c0, 1" : : "r" (__arg) : ); /* clear instruction fault status           */	\
+		} while (0)
+
+/*
+ * Data barrier dsb
+ */
+#define __dsb()		asm volatile("dsb");
+
+/*
+ * Instruction synq
+ */
+#define __isb()		asm volatile("isb");
+
+/*
+ * Set Address Space Identifier (ASID)
+ * see armv7 ref.man B4.1.36
+ */
+#define __set_asid(x)                                                       \
+	    ({ CPU_INT32U __arg = (x);                                                     \
+	       asm volatile(" mcr p15, 0, %0, c13, c0, 1" : : "r" (__arg) : ); })
+
+/*
+ * Get MMU instruction fault status register (IFSR)
+ * see armv7 ref.man B4.1.96
+ */
+#define __get_mmu_inst_fsr()                                                       \
+    ({ CPU_INT32U __res;                                                           \
+       asm volatile(" mrc p15, 0, %0, c5, c0, 1" : "=r" (__res) : : );             \
+       __res; })
+
+/*
+ * Get MMU data fault status register (DFSR)
+ * see armv7 ref.man B4.1.52
+ */
+#define __get_mmu_data_fsr()														\
+	({ CPU_INT32U __res;                                                           \
+	   asm volatile(" mrc p15, 0, %0, c5, c0, 0" : "=r" (__res) : : );             \
+	   __res; })
+
+/*
+ * Flush L1 Data cache line
+ * 1. Set Cache size selection register to 0 (CSSELR, see armv7 ref.man B4.1.41)
+ * 2. Clean and inv data cache line by MVA (see armv7 ref.man D15.7.8)
+ */
+#define __L1DCacheFlushLine(x)														\
+		 ({ CPU_INT32U __arg = (x & (~0x1FU));                                      \
+		 CPU_INT32U __arg0 = 0;														\
+		 asm volatile(" mcr p15, 2, %0,  c0, c0,  0" : : "r" (__arg0): );				\
+		 asm volatile(" mcr p15, 0, %0,  c7, c14, 1" : : "r" (__arg) : ); 			\
+		 asm volatile("dsb" : : : "memory");})
+
+#define __L1DCacheFlushLineShort(x)										\
+		 ({ CPU_INT32U __arg = (x);                                      \
+		 asm volatile(" mcr p15, 0, %0,  c7, c14, 1" : : "r" (__arg) : );})
+
+/*
+ * Invalidate L1 Data cache line
+ * 2. inv data cache line by MVA (see armv7 ref.man D15.7.8)
+ */
+#define __L1DCacheInvalidateLine(x)										 \
+		 ({ CPU_INT32U __arg = (x);                                      \
+		 asm volatile(" mcr p15, 0, %0,  c7, c6, 1" : : "r" (__arg) : );})
+
+/*
+ * Select Cache size (CSSELR, see armv7 ref.man B4.1.41)
+ */
+#define __set_CSSELR(x)														\
+		 ({ CPU_INT32U __arg = (x);                                      	\
+		 asm volatile(" mcr p15, 2, %0,  c0, c0,  0" : : "r" (__arg) : ); })
+
+
+#define  __trap()		asm volatile (".short 0xde00\n");
+
+/*
+*********************************************************************************************************
+*                                    MEMORY BARRIERS CONFIGURATION
+*
+* Note(s) : (1) (a) Configure memory barriers if required by the architecture.
+*
+*                   CPU_MB      Full memory barrier.
+*                   CPU_RMB     Read (Loads) memory barrier.
+*                   CPU_WMB     Write (Stores) memory barrier.
+*
+*********************************************************************************************************
+*/
+
+#define  CPU_MB()       __asm__ __volatile__ ("dsb" : : : "memory")
+#define  CPU_RMB()      __asm__ __volatile__ ("dsb" : : : "memory")
+#define  CPU_WMB()      __asm__ __volatile__ ("dsb" : : : "memory")
+
+
+/*
+*********************************************************************************************************
+*                                    CPU COUNT ZEROS CONFIGURATION
+*
+* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT  to define count leading  zeros bits
+*                   function(s) in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_LEAD_ZEROS_ASM_PRESENT       #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT   NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
+*
+*               (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits
+*                   function(s) in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT      #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT  NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
+*********************************************************************************************************
+*/
+
+                                                                /* Configure CPU count leading  zeros bits ...          */
+#define  CPU_CFG_LEAD_ZEROS_ASM_PRESENT                         /* ... assembly-version (see Note #1a).                 */
+
+                                                                /* Configure CPU count trailing zeros bits ...          */
+#define  CPU_CFG_TRAIL_ZEROS_ASM_PRESENT                        /* ... assembly-version (see Note #1b).                 */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*
+* Note(s) : (1) CPU_CntLeadZeros() prototyped/defined respectively in :
+*
+*               (a) 'cpu.h'/'cpu_a.asm',       if CPU_CFG_LEAD_ZEROS_ASM_PRESENT      #define'd in 'cpu.h'/
+*                                                 'cpu_cfg.h' to enable assembly-version function
+*
+*               (b) 'cpu_core.h'/'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT  NOT #define'd in 'cpu.h'/
+*                                                 'cpu_cfg.h' to enable C-source-version function otherwise
+*
+*               See also 'cpu_core.h  FUNCTION PROTOTYPES  Note #2'.
+*
+*          (2) CPU_PMU_xxx() functions are intended to manage the Event & Performanace Monitor unit (PMU).
+*********************************************************************************************************
+*/
+
+void        CPU_IntDis       (void);
+void        CPU_IntEn        (void);
+
+CPU_SR      CPU_SR_Save      (void);
+void        CPU_SR_Restore   (CPU_SR  cpu_sr);
+
+void        CPU_WaitForInt   (void);
+void        CPU_WaitForEvent (void);
+void		CPU_SignalEvent  (void);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_CFG_ADDR_SIZE
+#error  "CPU_CFG_ADDR_SIZE              not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+
+#elif  ((CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_32))
+#error  "CPU_CFG_ADDR_SIZE        illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#endif
+
+
+#ifndef  CPU_CFG_DATA_SIZE
+#error  "CPU_CFG_DATA_SIZE              not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+
+#elif  ((CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_32))
+#error  "CPU_CFG_DATA_SIZE        illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_ENDIAN_TYPE
+#error  "CPU_CFG_ENDIAN_TYPE            not #define'd in 'cpu.h'   "
+#error  "                         [MUST be  CPU_ENDIAN_TYPE_BIG   ]"
+#error  "                         [     ||  CPU_ENDIAN_TYPE_LITTLE]"
+
+#elif  ((CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_BIG   ) && \
+        (CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_LITTLE))
+#error  "CPU_CFG_ENDIAN_TYPE      illegally #define'd in 'cpu.h'   "
+#error  "                         [MUST be  CPU_ENDIAN_TYPE_BIG   ]"
+#error  "                         [     ||  CPU_ENDIAN_TYPE_LITTLE]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_STK_GROWTH
+#error  "CPU_CFG_STK_GROWTH             not #define'd in 'cpu.h'    "
+#error  "                         [MUST be  CPU_STK_GROWTH_LO_TO_HI]"
+#error  "                         [     ||  CPU_STK_GROWTH_HI_TO_LO]"
+
+#elif  ((CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_LO_TO_HI) && \
+        (CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_HI_TO_LO))
+#error  "CPU_CFG_STK_GROWTH       illegally #define'd in 'cpu.h'    "
+#error  "                         [MUST be  CPU_STK_GROWTH_LO_TO_HI]"
+#error  "                         [     ||  CPU_STK_GROWTH_HI_TO_LO]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_CRITICAL_METHOD
+#error  "CPU_CFG_CRITICAL_METHOD        not #define'd in 'cpu.h'             "
+#error  "                         [MUST be  CPU_CRITICAL_METHOD_INT_DIS_EN  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_STK  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_LOCAL]"
+
+#elif  ((CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_INT_DIS_EN  ) && \
+        (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_STK  ) && \
+        (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_LOCAL))
+#error  "CPU_CFG_CRITICAL_METHOD  illegally #define'd in 'cpu.h'             "
+#error  "                         [MUST be  CPU_CRITICAL_METHOD_INT_DIS_EN  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_STK  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_LOCAL]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif                                                          /* End of CPU module include.                           */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu_a.S b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu_a.S
new file mode 100644
index 0000000..6523c75
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/GNU/cpu_a.S
@@ -0,0 +1,257 @@
+@********************************************************************************************************
+@                                                uC/CPU
+@                                    CPU CONFIGURATION & PORT LAYER
+@
+@                          (c) Copyright 2004-2015 Micrium, Inc. Weston, FL
+@
+@               All rights reserved.  Protected by international copyright laws.
+@
+@               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+@               illegal to distribute this source code to any third party unless you receive 
+@               written permission by an authorized Micrium representative.  Knowledge of 
+@               the source code may NOT be used to develop a similar product.
+@
+@               Please help us continue to provide the Embedded community with the finest 
+@               software available.  Your honesty is greatly appreciated.
+@
+@               You can find our product's user manual, API reference, release notes and
+@               more information at https://doc.micrium.com.
+@               You can contact us at www.micrium.com.
+@********************************************************************************************************
+
+@********************************************************************************************************
+@
+@                                            CPU PORT FILE
+@
+@                                        Generic ARM-Cortex-A
+@                                               GNU GCC
+@
+@ Filename      : cpu_a.s
+@ Version       : V1.30.02.00
+@ Programmer(s) : JBL
+@********************************************************************************************************
+
+
+@********************************************************************************************************
+@                                           .global FUNCTIONS
+@********************************************************************************************************
+
+    .global  CPU_SR_Save
+    .global  CPU_SR_Restore
+
+    .global  CPU_IntDis
+    .global  CPU_IntEn
+    
+    .global  CPU_WaitForInt
+    .global  CPU_WaitForEvent
+    .global  CPU_SignalEvent
+
+    .global  CPU_CntLeadZeros
+    .global  CPU_CntTrailZeros
+
+
+@********************************************************************************************************
+@                                      CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+     .code 32
+
+
+@********************************************************************************************************
+@                                     ENABLE & DISABLE INTERRUPTS
+@
+@ Description : Disable/Enable IRQs & FIQs.
+@
+@ Prototypes  : void  CPU_IntEn (void)@
+@               void  CPU_IntDis(void)@
+@********************************************************************************************************
+
+    .type   CPU_IntDis, %function
+CPU_IntDis:
+        CPSID   IF
+        DSB
+        BX      LR
+
+
+    .type   CPU_IntEn, %function
+CPU_IntEn:
+        DSB
+        CPSIE   IF
+        BX      LR
+
+
+@********************************************************************************************************
+@                                      CRITICAL SECTION FUNCTIONS
+@
+@ Description : Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking, the
+@               state of the interrupt disable flag is stored in the local variable 'cpu_sr' & interrupts
+@               are then disabled ('cpu_sr' is allocated in all functions that need to disable interrupts).
+@               The previous interrupt state is restored by copying 'cpu_sr' into the CPU's status register.
+@
+@ Prototypes  : CPU_SR  CPU_SR_Save   (void)@
+@               void    CPU_SR_Restore(CPU_SR  cpu_sr)@
+@
+@ Note(s)     : (1) These functions are used in general like this :
+@
+@                       void  Task (void  *p_arg)
+@                       {
+@                           CPU_SR_ALLOC()@                     /* Allocate storage for CPU status register */
+@                               :
+@                               :
+@                           CPU_CRITICAL_ENTER()@               /* cpu_sr = CPU_SR_Save()@                  */
+@                               :
+@                               :
+@                           CPU_CRITICAL_EXIT()@                /* CPU_SR_Restore(cpu_sr)@                  */
+@                               :
+@                       }
+@********************************************************************************************************
+
+    .type   CPU_SR_Save, %function
+CPU_SR_Save:
+        MRS     R0, CPSR
+        CPSID   IF                                              @ Set IRQ & FIQ bits in CPSR to DISABLE all interrupts
+        DSB
+        BX      LR                                              @ DISABLED, return the original CPSR contents in R0
+
+    .type   CPU_SR_Restore, %function
+CPU_SR_Restore:
+        DSB
+        MSR     CPSR_c, R0
+        BX      LR
+
+
+@********************************************************************************************************
+@                                         WAIT FOR INTERRUPT
+@
+@ Description : Enters sleep state, which will be exited when an interrupt is received.
+@
+@ Prototypes  : void  CPU_WaitForInt (void)
+@
+@ Argument(s) : none.
+@********************************************************************************************************
+
+    .type   CPU_WaitForInt, %function
+CPU_WaitForInt:
+        DSB
+        WFI                                     @ Wait for interrupt
+        BX      LR
+
+
+
+@********************************************************************************************************
+@                                         WAIT FOR EXCEPTION
+@
+@ Description : Enters sleep state, which will be exited when an exception is received.
+@
+@ Prototypes  : void  CPU_WaitForExcept (void)
+@
+@ Argument(s) : none.
+@********************************************************************************************************
+
+    .type   CPU_WaitForEvent, %function
+CPU_WaitForEvent:
+        DSB
+        WFE                                     @ Wait for exception
+        BX      LR
+
+@********************************************************************************************************
+@                                         SIGNAL EVENT
+@
+@ Description : Sends an event to other CPUs, waking up the ones in WFE state
+@
+@ Prototypes  : void  CPU_SignalEvent (void)
+@
+@ Argument(s) : none.
+@********************************************************************************************************
+
+    .type   CPU_SignalEvent, %function
+CPU_SignalEvent:
+        DSB
+        SEV                                     @ Send event
+        BX      LR
+
+
+@********************************************************************************************************
+@                                         CPU_CntLeadZeros()
+@                                        COUNT LEADING ZEROS
+@
+@ Description : Counts the number of contiguous, most-significant, leading zero bits before the first
+@               binary one bit in a data value.
+@
+@ Prototype   : CPU_DATA  CPU_CntLeadZeros(CPU_DATA  val);
+@
+@ Argument(s) : val         Data value to count leading zero bits.
+@
+@ Return(s)   : Number of contiguous, most-significant, leading zero bits in 'val'.
+@
+@ Caller(s)   : Application.
+@
+@               This function is an INTERNAL CPU module function but MAY be called by application function(s).
+@
+@ Note(s)     : (1) If the argument is zero, the value 32 is returned.
+@
+@               (2) MUST be implemented in cpu_a.asm if and only if CPU_CFG_LEAD_ZEROS_ASM_PRESENT is
+@                   #define'd in 'cpu_cfg.h' or 'cpu.h'.
+@********************************************************************************************************
+
+    .type   CPU_CntLeadZeros, %function
+CPU_CntLeadZeros:
+        CLZ     R0, R0                                          @ Count leading zeros
+        BX      LR
+
+
+@********************************************************************************************************
+@                                         CPU_CntTrailZeros()
+@                                        COUNT TRAILING ZEROS
+@
+@ Description : Counts the number of contiguous, least-significant, trailing zero bits before the
+@                   first binary one bit in a data value.
+@
+@ Prototype   : CPU_DATA  CPU_CntTrailZeros(CPU_DATA  val);
+@
+@ Argument(s) : val         Data value to count trailing zero bits.
+@
+@ Return(s)   : Number of contiguous, least-significant, trailing zero bits in 'val'.
+@
+@ Caller(s)   : Application.
+@
+@               This function is an INTERNAL CPU module function but MAY be called by application
+@               function(s).
+@
+@ Note(s)     : (1) (a) Supports 32-bit data value size as configured by 'CPU_DATA' (see 'cpu.h
+@                       CPU WORD CONFIGURATION  Note #1').
+@
+@                   (b) For 32-bit values :
+@
+@                             b31  b30  b29  b28  b27  ...  b02  b01  b00    # Trailing Zeros
+@                             ---  ---  ---  ---  ---       ---  ---  ---    ----------------
+@                              x    x    x    x    x         x    x    1            0
+@                              x    x    x    x    x         x    1    0            1
+@                              x    x    x    x    x         1    0    0            2
+@                              :    :    :    :    :         :    :    :            :
+@                              :    :    :    :    :         :    :    :            :
+@                              x    x    x    x    1         0    0    0           27
+@                              x    x    x    1    0         0    0    0           28
+@                              x    x    1    0    0         0    0    0           29
+@                              x    1    0    0    0         0    0    0           30
+@                              1    0    0    0    0         0    0    0           31
+@                              0    0    0    0    0         0    0    0           32
+@
+@
+@               (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT is
+@                   #define'd in 'cpu_cfg.h' or 'cpu.h'.
+@********************************************************************************************************
+
+    .type   CPU_CntTrailZeros, %function
+CPU_CntTrailZeros:
+        RBIT    R0, R0                          @ Reverse bits
+        CLZ     R0, R0                          @ Count trailing zeros
+        BX      LR
+
+
+@********************************************************************************************************
+@                                     CPU ASSEMBLY PORT FILE END
+@********************************************************************************************************
+
+    .end
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/RealView/cpu.h b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/RealView/cpu.h
new file mode 100644
index 0000000..8a980e3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/RealView/cpu.h
@@ -0,0 +1,549 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            CPU PORT FILE
+*
+*                                        Generic ARM-Cortex-A
+*                                      RealView Development Suite
+*                            RealView Microcontroller Development Kit (MDK)
+*                                       ARM Developer Suite (ADS)
+*                                            Keil uVision
+*
+* Filename      : cpu.h
+* Version       : V1.30.02.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This CPU header file is protected from multiple pre-processor inclusion through use of
+*               the  CPU module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_MODULE_PRESENT                                     /* See Note #1.                                         */
+#define  CPU_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                          CPU INCLUDE FILES
+*
+* Note(s) : (1) The following CPU files are located in the following directories :
+*
+*               (a) \\cpu_cfg.h
+*
+*               (b) (1) \\cpu_def.h
+*                   (2) \\\\cpu*.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for common   CPU-compiler software
+*                                                          directory name for specific CPU
+*                                                     directory name for specific compiler
+*
+*           (2) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) (1) '\\'                  directory         See Note #1b1
+*                   (2) '\\\\' directory         See Note #1b2
+*
+*           (3) Since NO custom library modules are included, 'cpu.h' may ONLY use configurations from
+*               CPU configuration file 'cpu_cfg.h' that do NOT reference any custom library definitions.
+*
+*               In other words, 'cpu.h' may use 'cpu_cfg.h' configurations that are #define'd to numeric
+*               constants or to NULL (i.e. NULL-valued #define's); but may NOT use configurations to
+*               custom library #define's (e.g. DEF_DISABLED or DEF_ENABLED).
+*********************************************************************************************************
+*/
+
+#include  
+#include                                             /* See Note #3.                                         */
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    CONFIGURE STANDARD DATA TYPES
+*
+* Note(s) : (1) Configure standard data types according to CPU-/compiler-specifications.
+*
+*           (2) (a) (1) 'CPU_FNCT_VOID' data type defined to replace the commonly-used function pointer
+*                       data type of a pointer to a function which returns void & has no arguments.
+*
+*                   (2) Example function pointer usage :
+*
+*                           CPU_FNCT_VOID  FnctName;
+*
+*                           FnctName();
+*
+*               (b) (1) 'CPU_FNCT_PTR'  data type defined to replace the commonly-used function pointer
+*                       data type of a pointer to a function which returns void & has a single void
+*                       pointer argument.
+*
+*                   (2) Example function pointer usage :
+*
+*                           CPU_FNCT_PTR   FnctName;
+*                           void          *p_obj
+*
+*                           FnctName(p_obj);
+*********************************************************************************************************
+*/
+
+typedef            void        CPU_VOID;
+typedef            char        CPU_CHAR;                        /*  8-bit character                                     */
+typedef  unsigned  char        CPU_BOOLEAN;                     /*  8-bit boolean or logical                            */
+typedef  unsigned  char        CPU_INT08U;                      /*  8-bit unsigned integer                              */
+typedef    signed  char        CPU_INT08S;                      /*  8-bit   signed integer                              */
+typedef  unsigned  short       CPU_INT16U;                      /* 16-bit unsigned integer                              */
+typedef    signed  short       CPU_INT16S;                      /* 16-bit   signed integer                              */
+typedef  unsigned  int         CPU_INT32U;                      /* 32-bit unsigned integer                              */
+typedef    signed  int         CPU_INT32S;                      /* 32-bit   signed integer                              */
+typedef  unsigned  long  long  CPU_INT64U;                      /* 64-bit unsigned integer                              */
+typedef    signed  long  long  CPU_INT64S;                      /* 64-bit   signed integer                              */
+
+typedef            float       CPU_FP32;                        /* 32-bit floating point                                */
+typedef            double      CPU_FP64;                        /* 64-bit floating point                                */
+
+
+typedef  volatile  CPU_INT08U  CPU_REG08;                       /*  8-bit register                                      */
+typedef  volatile  CPU_INT16U  CPU_REG16;                       /* 16-bit register                                      */
+typedef  volatile  CPU_INT32U  CPU_REG32;                       /* 32-bit register                                      */
+typedef  volatile  CPU_INT64U  CPU_REG64;                       /* 64-bit register                                      */
+
+
+typedef            void      (*CPU_FNCT_VOID)(void);            /* See Note #2a.                                        */
+typedef            void      (*CPU_FNCT_PTR )(void *p_obj);     /* See Note #2b.                                        */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU WORD CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_ADDR_SIZE, CPU_CFG_DATA_SIZE, & CPU_CFG_DATA_SIZE_MAX with CPU's &/or
+*               compiler's word sizes :
+*
+*                   CPU_WORD_SIZE_08             8-bit word size
+*                   CPU_WORD_SIZE_16            16-bit word size
+*                   CPU_WORD_SIZE_32            32-bit word size
+*                   CPU_WORD_SIZE_64            64-bit word size
+*
+*           (2) Configure CPU_CFG_ENDIAN_TYPE with CPU's data-word-memory order :
+*
+*               (a) CPU_ENDIAN_TYPE_BIG         Big-   endian word order (CPU words' most  significant
+*                                                                         octet @ lowest memory address)
+*               (b) CPU_ENDIAN_TYPE_LITTLE      Little-endian word order (CPU words' least significant
+*                                                                         octet @ lowest memory address)
+*********************************************************************************************************
+*/
+
+                                                                /* Define  CPU         word sizes (see Note #1) :       */
+#define  CPU_CFG_ADDR_SIZE              CPU_WORD_SIZE_32        /* Defines CPU address word size  (in octets).          */
+#define  CPU_CFG_DATA_SIZE              CPU_WORD_SIZE_32        /* Defines CPU data    word size  (in octets).          */
+#define  CPU_CFG_DATA_SIZE_MAX          CPU_WORD_SIZE_64        /* Defines CPU maximum word size  (in octets).          */
+
+#if defined(__BIG_ENDIAN)
+#define  CPU_CFG_ENDIAN_TYPE            CPU_ENDIAN_TYPE_BIG     /* Defines CPU data    word-memory order (see Note #2). */
+#else
+#define  CPU_CFG_ENDIAN_TYPE            CPU_ENDIAN_TYPE_LITTLE  /* Defines CPU data    word-memory order (see Note #2). */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 CONFIGURE CPU ADDRESS & DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* CPU address type based on address bus size.          */
+#if     (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_32)
+typedef  CPU_INT32U  CPU_ADDR;
+#elif   (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_ADDR;
+#else
+typedef  CPU_INT08U  CPU_ADDR;
+#endif
+
+                                                                /* CPU data    type based on data    bus size.          */
+#if     (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32)
+typedef  CPU_INT32U  CPU_DATA;
+#elif   (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_DATA;
+#else
+typedef  CPU_INT08U  CPU_DATA;
+#endif
+
+
+typedef  CPU_DATA    CPU_ALIGN;                                 /* Defines CPU data-word-alignment size.                */
+typedef  CPU_ADDR    CPU_SIZE_T;                                /* Defines CPU standard 'size_t'   size.                */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU STACK CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_STK_GROWTH in 'cpu.h' with CPU's stack growth order :
+*
+*               (a) CPU_STK_GROWTH_LO_TO_HI     CPU stack pointer increments to the next higher  stack
+*                                                   memory address after data is pushed onto the stack
+*               (b) CPU_STK_GROWTH_HI_TO_LO     CPU stack pointer decrements to the next lower   stack
+*                                                   memory address after data is pushed onto the stack
+*
+*           (2) Configure CPU_CFG_STK_ALIGN_BYTES with the highest minimum alignement required for
+*               cpu stacks.
+*
+*               (a) ARM Procedure Calls Standard requires an 8 bytes stack alignment.
+*********************************************************************************************************
+*/
+
+#define  CPU_CFG_STK_GROWTH       CPU_STK_GROWTH_HI_TO_LO       /* Defines CPU stack growth order (see Note #1).        */
+
+#define  CPU_CFG_STK_ALIGN_BYTES  (8u)                          /* Defines CPU stack alignment in bytes. (see Note #2). */
+
+typedef  CPU_INT32U               CPU_STK;                      /* Defines CPU stack data type.                         */
+typedef  CPU_ADDR                 CPU_STK_SIZE;                 /* Defines CPU stack size data type.                    */
+
+
+/*
+*********************************************************************************************************
+*                                   CRITICAL SECTION CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_CRITICAL_METHOD with CPU's/compiler's critical section method :
+*
+*                                                       Enter/Exit critical sections by ...
+*
+*                   CPU_CRITICAL_METHOD_INT_DIS_EN      Disable/Enable interrupts
+*                   CPU_CRITICAL_METHOD_STATUS_STK      Push/Pop       interrupt status onto stack
+*                   CPU_CRITICAL_METHOD_STATUS_LOCAL    Save/Restore   interrupt status to local variable
+*
+*               (a) CPU_CRITICAL_METHOD_INT_DIS_EN  is NOT a preferred method since it does NOT support
+*                   multiple levels of interrupts.  However, with some CPUs/compilers, this is the only
+*                   available method.
+*
+*               (b) CPU_CRITICAL_METHOD_STATUS_STK    is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Push/save   interrupt status onto a local stack
+*                       (2) Disable     interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Pop/restore interrupt status from a local stack
+*
+*               (c) CPU_CRITICAL_METHOD_STATUS_LOCAL  is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Save    interrupt status into a local variable
+*                       (2) Disable interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Restore interrupt status from a local variable
+*
+*           (2) Critical section macro's most likely require inline assembly.  If the compiler does NOT
+*               allow inline assembly in C source files, critical section macro's MUST call an assembly
+*               subroutine defined in a 'cpu_a.asm' file located in the following software directory :
+*
+*                   \\\\
+*
+*                       where
+*                                   directory path for common   CPU-compiler software
+*                                                      directory name for specific CPU
+*                                                 directory name for specific compiler
+*
+*           (3) (a) To save/restore interrupt status, a local variable 'cpu_sr' of type 'CPU_SR' MAY need
+*                   to be declared (e.g. if 'CPU_CRITICAL_METHOD_STATUS_LOCAL' method is configured).
+*
+*                   (1) 'cpu_sr' local variable SHOULD be declared via the CPU_SR_ALLOC() macro which, if
+*                        used, MUST be declared following ALL other local variables.
+*
+*                        Example :
+*
+*                           void  Fnct (void)
+*                           {
+*                               CPU_INT08U  val_08;
+*                               CPU_INT16U  val_16;
+*                               CPU_INT32U  val_32;
+*                               CPU_SR_ALLOC();         MUST be declared after ALL other local variables
+*                                   :
+*                                   :
+*                           }
+*
+*               (b) Configure 'CPU_SR' data type with the appropriate-sized CPU data type large enough to
+*                   completely store the CPU's/compiler's status word.
+*********************************************************************************************************
+*/
+                                                                /* Configure CPU critical method      (see Note #1) :   */
+#define  CPU_CFG_CRITICAL_METHOD    CPU_CRITICAL_METHOD_STATUS_LOCAL
+
+typedef  CPU_INT32U                 CPU_SR;                     /* Defines   CPU status register size (see Note #3b).   */
+
+                                                                /* Allocates CPU status register word (see Note #3a).   */
+#if     (CPU_CFG_CRITICAL_METHOD == CPU_CRITICAL_METHOD_STATUS_LOCAL)
+#define  CPU_SR_ALLOC()             CPU_SR  cpu_sr = (CPU_SR)0
+#else
+#define  CPU_SR_ALLOC()
+#endif
+
+
+static __asm int disable_irq(void)
+{
+  MRS      r0,APSR ; formerly CPSR
+  AND      r0,r0,#0x80
+  CPSID    i
+  BX       lr
+}
+
+
+
+#define  CPU_INT_DIS()         do { cpu_sr = disable_irq(); __dsb(0xF);} while (0) /* Save    CPU status word & disable interrupts.*/
+#define  CPU_INT_EN()          do { if(!cpu_sr) {__dsb(0xF); __enable_irq();} } while (0) /* Restore CPU status word.   */
+
+
+#ifdef   CPU_CFG_INT_DIS_MEAS_EN
+                                                                        /* Disable interrupts, ...                      */
+                                                                        /* & start interrupts disabled time measurement.*/
+#define  CPU_CRITICAL_ENTER()  do { CPU_INT_DIS();         \
+                                    CPU_IntDisMeasStart(); }  while (0)
+                                                                        /* Stop & measure   interrupts disabled time,   */
+                                                                        /* ...  & re-enable interrupts.                 */
+#define  CPU_CRITICAL_EXIT()   do { CPU_IntDisMeasStop();  \
+                                    CPU_INT_EN();          }  while (0)
+
+#else
+
+#define  CPU_CRITICAL_ENTER()  do { CPU_INT_DIS(); } while (0)          /* Disable   interrupts.                        */
+#define  CPU_CRITICAL_EXIT()   do { CPU_INT_EN();  } while (0)          /* Re-enable interrupts.                        */
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    MEMORY BARRIERS CONFIGURATION
+*
+* Note(s) : (1) (a) Configure memory barriers if required by the architecture.
+*
+*                   CPU_MB      Full memory barrier.
+*                   CPU_RMB     Read (Loads) memory barrier.
+*                   CPU_WMB     Write (Stores) memory barrier.
+*
+*********************************************************************************************************
+*/
+
+#define  CPU_MB()       __dsb(0xF)
+#define  CPU_RMB()      __dsb(0xF)
+#define  CPU_WMB()      __dsb(0xF)
+
+
+/*
+*********************************************************************************************************
+*                                    CPU COUNT ZEROS CONFIGURATION
+*
+* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT  to define count leading  zeros bits
+*                   function(s) in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_LEAD_ZEROS_ASM_PRESENT       #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT   NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
+*
+*               (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits
+*                   function(s) in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT      #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT  NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
+*********************************************************************************************************
+*/
+
+                                                                /* Configure CPU count leading  zeros bits ...          */
+#define  CPU_CFG_LEAD_ZEROS_ASM_PRESENT                         /* ... assembly-version (see Note #1a).                 */
+
+                                                                /* Configure CPU count trailing zeros bits ...          */
+#define  CPU_CFG_TRAIL_ZEROS_ASM_PRESENT                        /* ... assembly-version (see Note #1b).                 */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        CPU_IntDis       (void);
+void        CPU_IntEn        (void);
+
+CPU_SR      CPU_SR_Save      (void);
+void        CPU_SR_Restore   (CPU_SR  cpu_sr);
+
+void        CPU_WaitForInt   (void);
+void        CPU_WaitForEvent (void);
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_CFG_ADDR_SIZE
+#error  "CPU_CFG_ADDR_SIZE              not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_ADDR_SIZE        illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+#ifndef  CPU_CFG_DATA_SIZE
+#error  "CPU_CFG_DATA_SIZE              not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_DATA_SIZE        illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+#ifndef  CPU_CFG_DATA_SIZE_MAX
+#error  "CPU_CFG_DATA_SIZE_MAX          not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_DATA_SIZE_MAX    illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+
+#if     (CPU_CFG_DATA_SIZE_MAX < CPU_CFG_DATA_SIZE)
+#error  "CPU_CFG_DATA_SIZE_MAX    illegally #define'd in 'cpu.h' "
+#error  "                         [MUST be  >= CPU_CFG_DATA_SIZE]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_ENDIAN_TYPE
+#error  "CPU_CFG_ENDIAN_TYPE            not #define'd in 'cpu.h'   "
+#error  "                         [MUST be  CPU_ENDIAN_TYPE_BIG   ]"
+#error  "                         [     ||  CPU_ENDIAN_TYPE_LITTLE]"
+
+#elif  ((CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_BIG   ) && \
+        (CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_LITTLE))
+#error  "CPU_CFG_ENDIAN_TYPE      illegally #define'd in 'cpu.h'   "
+#error  "                         [MUST be  CPU_ENDIAN_TYPE_BIG   ]"
+#error  "                         [     ||  CPU_ENDIAN_TYPE_LITTLE]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_STK_GROWTH
+#error  "CPU_CFG_STK_GROWTH             not #define'd in 'cpu.h'    "
+#error  "                         [MUST be  CPU_STK_GROWTH_LO_TO_HI]"
+#error  "                         [     ||  CPU_STK_GROWTH_HI_TO_LO]"
+
+#elif  ((CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_LO_TO_HI) && \
+        (CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_HI_TO_LO))
+#error  "CPU_CFG_STK_GROWTH       illegally #define'd in 'cpu.h'    "
+#error  "                         [MUST be  CPU_STK_GROWTH_LO_TO_HI]"
+#error  "                         [     ||  CPU_STK_GROWTH_HI_TO_LO]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_CRITICAL_METHOD
+#error  "CPU_CFG_CRITICAL_METHOD        not #define'd in 'cpu.h'             "
+#error  "                         [MUST be  CPU_CRITICAL_METHOD_INT_DIS_EN  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_STK  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_LOCAL]"
+
+#elif  ((CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_INT_DIS_EN  ) && \
+        (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_STK  ) && \
+        (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_LOCAL))
+#error  "CPU_CFG_CRITICAL_METHOD  illegally #define'd in 'cpu.h'             "
+#error  "                         [MUST be  CPU_CRITICAL_METHOD_INT_DIS_EN  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_STK  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_LOCAL]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'cpu.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif                                                          /* End of CPU module include.                           */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/RealView/cpu_a.s b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/RealView/cpu_a.s
new file mode 100644
index 0000000..8256987
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A/RealView/cpu_a.s
@@ -0,0 +1,278 @@
+;********************************************************************************************************
+;                                                uC/CPU
+;                                    CPU CONFIGURATION & PORT LAYER
+;
+;                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+;
+;               All rights reserved.  Protected by international copyright laws.
+;
+;               uC/CPU is provided in source form to registered licensees ONLY.  It is
+;               illegal to distribute this source code to any third party unless you receive
+;               written permission by an authorized Micrium representative.  Knowledge of
+;               the source code may NOT be used to develop a similar product.
+;
+;               Please help us continue to provide the Embedded community with the finest
+;               software available.  Your honesty is greatly appreciated.
+;
+;               You can find our product's user manual, API reference, release notes and
+;               more information at https://doc.micrium.com.
+;               You can contact us at www.micrium.com.
+;********************************************************************************************************
+
+;********************************************************************************************************
+;
+;                                            CPU PORT FILE
+;
+;                                        Generic ARM-Cortex-A
+;                                      RealView Development Suite
+;                            RealView Microcontroller Development Kit (MDK)
+;                                       ARM Developer Suite (ADS)
+;                                            Keil uVision
+;
+; Filename      : cpu_a.asm
+; Version       : V1.30.02.00
+; Programmer(s) : JBL
+;********************************************************************************************************
+
+
+;********************************************************************************************************
+;                                           PUBLIC FUNCTIONS
+;********************************************************************************************************
+
+        EXPORT  CPU_IntDis
+        EXPORT  CPU_IntEn
+
+        EXPORT  CPU_SR_Save
+        EXPORT  CPU_SR_Restore
+
+        EXPORT  CPU_WaitForInt
+        EXPORT  CPU_WaitForEvent
+
+        EXPORT  CPU_CntLeadZeros
+        EXPORT  CPU_CntTrailZeros
+
+
+;********************************************************************************************************
+;                                      CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+        AREA |.text|, CODE, READONLY, ALIGN=4
+        PRESERVE8
+
+
+;********************************************************************************************************
+;                                    DISABLE and ENABLE INTERRUPTS
+;
+; Description : Disable/Enable interrupts.
+;
+; Prototypes  : void  CPU_IntDis(void);
+;               void  CPU_IntEn (void);
+;********************************************************************************************************
+
+CPU_IntDis FUNCTION
+
+        CPSID   IF
+        DSB
+        BX      LR
+
+        ENDFUNC
+
+
+CPU_IntEn FUNCTION
+
+        DSB
+        CPSIE   IF
+        BX      LR
+
+        ENDFUNC
+
+
+;********************************************************************************************************
+;                                      CRITICAL SECTION FUNCTIONS
+;
+; Description : Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking, the
+;               state of the interrupt disable flag is stored in the local variable 'cpu_sr' & interrupts
+;               are then disabled ('cpu_sr' is allocated in all functions that need to disable interrupts).
+;               The previous interrupt state is restored by copying 'cpu_sr' into the CPU's status register.
+;
+; Prototypes  : CPU_SR  CPU_SR_Save   (void);
+;               void    CPU_SR_Restore(CPU_SR  cpu_sr);
+;
+; Note(s)     : (1) These functions are used in general like this :
+;
+;                       void  Task (void  *p_arg)
+;                       {
+;                           CPU_SR_ALLOC();                     /* Allocate storage for CPU status register */
+;                               :
+;                               :
+;                           CPU_CRITICAL_ENTER();               /* cpu_sr = CPU_SR_Save();                  */
+;                               :
+;                               :
+;                           CPU_CRITICAL_EXIT();                /* CPU_SR_Restore(cpu_sr);                  */
+;                               :
+;                       }
+;********************************************************************************************************
+
+CPU_SR_Save FUNCTION
+
+        MRS     R0, CPSR
+        CPSID   IF                                              ; Set IRQ & FIQ bits in CPSR to DISABLE all interrupts
+        DSB
+        BX      LR                                              ; DISABLED, return the original CPSR contents in R0
+
+        ENDFUNC
+
+CPU_SR_Restore FUNCTION                                         ; See Note #2
+
+        DSB
+        MSR     CPSR_c, R0
+        BX      LR
+
+        ENDFUNC
+
+
+;********************************************************************************************************
+;                                         WAIT FOR INTERRUPT
+;
+; Description : Enters sleep state, which will be exited when an interrupt is received.
+;
+; Prototypes  : void  CPU_WaitForInt (void)
+;
+; Argument(s) : none.
+;********************************************************************************************************
+
+CPU_WaitForInt FUNCTION
+
+        DSB
+        WFI                                     ; Wait for interrupt
+        BX      LR
+
+        ENDFUNC
+
+
+;********************************************************************************************************
+;                                         WAIT FOR EXCEPTION
+;
+; Description : Enters sleep state, which will be exited when an exception is received.
+;
+; Prototypes  : void  CPU_WaitForExcept (void)
+;
+; Argument(s) : none.
+;********************************************************************************************************
+
+CPU_WaitForEvent FUNCTION
+
+        DSB
+        WFE                                     ; Wait for exception
+        BX      LR
+
+        ENDFUNC
+
+
+;********************************************************************************************************
+;                                         CPU_CntLeadZeros()
+;                                        COUNT LEADING ZEROS
+;
+; Description : Counts the number of contiguous, most-significant, leading zero bits before the
+;                   first binary one bit in a data value.
+;
+; Prototype   : CPU_DATA  CPU_CntLeadZeros(CPU_DATA  val);
+;
+; Argument(s) : val         Data value to count leading zero bits.
+;
+; Return(s)   : Number of contiguous, most-significant, leading zero bits in 'val'.
+;
+; Caller(s)   : Application.
+;
+;               This function is an INTERNAL CPU module function but MAY be called by application
+;               function(s).
+;
+; Note(s)     : (1) (a) Supports 32-bit data value size as configured by 'CPU_DATA' (see 'cpu.h
+;                       CPU WORD CONFIGURATION  Note #1').
+;
+;                   (b) For 32-bit values :
+;
+;                             b31  b30  b29  ...  b04  b03  b02  b01  b00    # Leading Zeros
+;                             ---  ---  ---       ---  ---  ---  ---  ---    ---------------
+;                              1    x    x         x    x    x    x    x            0
+;                              0    1    x         x    x    x    x    x            1
+;                              0    0    1         x    x    x    x    x            2
+;                              :    :    :         :    :    :    :    :            :
+;                              :    :    :         :    :    :    :    :            :
+;                              0    0    0         1    x    x    x    x           27
+;                              0    0    0         0    1    x    x    x           28
+;                              0    0    0         0    0    1    x    x           29
+;                              0    0    0         0    0    0    1    x           30
+;                              0    0    0         0    0    0    0    1           31
+;                              0    0    0         0    0    0    0    0           32
+;
+;
+;               (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_LEAD_ZEROS_ASM_PRESENT is
+;                   #define'd in 'cpu_cfg.h' or 'cpu.h'.
+;********************************************************************************************************
+
+CPU_CntLeadZeros FUNCTION
+
+        CLZ     R0, R0                          ; Count leading zeros
+        BX      LR
+
+        ENDFUNC
+
+
+;********************************************************************************************************
+;                                         CPU_CntTrailZeros()
+;                                        COUNT TRAILING ZEROS
+;
+; Description : Counts the number of contiguous, least-significant, trailing zero bits before the
+;                   first binary one bit in a data value.
+;
+; Prototype   : CPU_DATA  CPU_CntTrailZeros(CPU_DATA  val);
+;
+; Argument(s) : val         Data value to count trailing zero bits.
+;
+; Return(s)   : Number of contiguous, least-significant, trailing zero bits in 'val'.
+;
+; Caller(s)   : Application.
+;
+;               This function is an INTERNAL CPU module function but MAY be called by application
+;               function(s).
+;
+; Note(s)     : (1) (a) Supports 32-bit data value size as configured by 'CPU_DATA' (see 'cpu.h
+;                       CPU WORD CONFIGURATION  Note #1').
+;
+;                   (b) For 32-bit values :
+;
+;                             b31  b30  b29  b28  b27  ...  b02  b01  b00    # Trailing Zeros
+;                             ---  ---  ---  ---  ---       ---  ---  ---    ----------------
+;                              x    x    x    x    x         x    x    1            0
+;                              x    x    x    x    x         x    1    0            1
+;                              x    x    x    x    x         1    0    0            2
+;                              :    :    :    :    :         :    :    :            :
+;                              :    :    :    :    :         :    :    :            :
+;                              x    x    x    x    1         0    0    0           27
+;                              x    x    x    1    0         0    0    0           28
+;                              x    x    1    0    0         0    0    0           29
+;                              x    1    0    0    0         0    0    0           30
+;                              1    0    0    0    0         0    0    0           31
+;                              0    0    0    0    0         0    0    0           32
+;
+;
+;               (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT is
+;                   #define'd in 'cpu_cfg.h' or 'cpu.h'.
+;********************************************************************************************************
+
+CPU_CntTrailZeros FUNCTION
+
+        RBIT    R0, R0                          ; Reverse bits
+        CLZ     R0, R0                          ; Count trailing zeros
+        BX      LR
+
+        ENDFUNC
+
+
+;********************************************************************************************************
+;                                     CPU ASSEMBLY PORT FILE END
+;********************************************************************************************************
+
+        END
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A50/GNU/cpu.h b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A50/GNU/cpu.h
new file mode 100644
index 0000000..317434e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A50/GNU/cpu.h
@@ -0,0 +1,549 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            CPU PORT FILE
+*
+*                                        Generic ARM-Cortex-A50
+*                                                 GNU
+*
+* Filename      : cpu.h
+* Version       : V1.30.02.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This CPU header file is protected from multiple pre-processor inclusion through use of
+*               the  CPU module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_MODULE_PRESENT                                     /* See Note #1.                                         */
+#define  CPU_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                          CPU INCLUDE FILES
+*
+* Note(s) : (1) The following CPU files are located in the following directories :
+*
+*               (a) \\cpu_cfg.h
+*
+*               (b) (1) \\cpu_def.h
+*                   (2) \\\\cpu*.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for common   CPU-compiler software
+*                                                          directory name for specific CPU
+*                                                     directory name for specific compiler
+*
+*           (2) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) (1) '\\'                  directory         See Note #1b1
+*                   (2) '\\\\' directory         See Note #1b2
+*
+*           (3) Since NO custom library modules are included, 'cpu.h' may ONLY use configurations from
+*               CPU configuration file 'cpu_cfg.h' that do NOT reference any custom library definitions.
+*
+*               In other words, 'cpu.h' may use 'cpu_cfg.h' configurations that are #define'd to numeric
+*               constants or to NULL (i.e. NULL-valued #define's); but may NOT use configurations to
+*               custom library #define's (e.g. DEF_DISABLED or DEF_ENABLED).
+*********************************************************************************************************
+*/
+
+#include  
+#include                                             /* See Note #3.                                         */
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    CONFIGURE STANDARD DATA TYPES
+*
+* Note(s) : (1) Configure standard data types according to CPU-/compiler-specifications.
+*
+*           (2) (a) (1) 'CPU_FNCT_VOID' data type defined to replace the commonly-used function pointer
+*                       data type of a pointer to a function which returns void & has no arguments.
+*
+*                   (2) Example function pointer usage :
+*
+*                           CPU_FNCT_VOID  FnctName;
+*
+*                           FnctName();
+*
+*               (b) (1) 'CPU_FNCT_PTR'  data type defined to replace the commonly-used function pointer
+*                       data type of a pointer to a function which returns void & has a single void
+*                       pointer argument.
+*
+*                   (2) Example function pointer usage :
+*
+*                           CPU_FNCT_PTR   FnctName;
+*                           void          *p_obj
+*
+*                           FnctName(p_obj);
+*********************************************************************************************************
+*/
+
+typedef            void        CPU_VOID;
+typedef            char        CPU_CHAR;                        /*  8-bit character                                     */
+typedef  unsigned  char        CPU_BOOLEAN;                     /*  8-bit boolean or logical                            */
+typedef  unsigned  char        CPU_INT08U;                      /*  8-bit unsigned integer                              */
+typedef    signed  char        CPU_INT08S;                      /*  8-bit   signed integer                              */
+typedef  unsigned  short       CPU_INT16U;                      /* 16-bit unsigned integer                              */
+typedef    signed  short       CPU_INT16S;                      /* 16-bit   signed integer                              */
+typedef  unsigned  int         CPU_INT32U;                      /* 32-bit unsigned integer                              */
+typedef    signed  int         CPU_INT32S;                      /* 32-bit   signed integer                              */
+typedef  unsigned  long        CPU_INT64U;                      /* 64-bit unsigned integer                              */
+typedef    signed  long        CPU_INT64S;                      /* 64-bit   signed integer                              */
+
+typedef            float       CPU_FP32;                        /* 32-bit floating point                                */
+typedef            double      CPU_FP64;                        /* 64-bit floating point                                */
+
+
+typedef  volatile  CPU_INT08U  CPU_REG08;                       /*  8-bit register                                      */
+typedef  volatile  CPU_INT16U  CPU_REG16;                       /* 16-bit register                                      */
+typedef  volatile  CPU_INT32U  CPU_REG32;                       /* 32-bit register                                      */
+typedef  volatile  CPU_INT64U  CPU_REG64;                       /* 64-bit register                                      */
+
+
+typedef            void      (*CPU_FNCT_VOID)(void);            /* See Note #2a.                                        */
+typedef            void      (*CPU_FNCT_PTR )(void *p_obj);     /* See Note #2b.                                        */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU WORD CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_ADDR_SIZE, CPU_CFG_DATA_SIZE, & CPU_CFG_DATA_SIZE_MAX with CPU's &/or
+*               compiler's word sizes :
+*
+*                   CPU_WORD_SIZE_08             8-bit word size
+*                   CPU_WORD_SIZE_16            16-bit word size
+*                   CPU_WORD_SIZE_32            32-bit word size
+*                   CPU_WORD_SIZE_64            64-bit word size
+*
+*           (2) Configure CPU_CFG_ENDIAN_TYPE with CPU's data-word-memory order :
+*
+*               (a) CPU_ENDIAN_TYPE_BIG         Big-   endian word order (CPU words' most  significant
+*                                                                         octet @ lowest memory address)
+*               (b) CPU_ENDIAN_TYPE_LITTLE      Little-endian word order (CPU words' least significant
+*                                                                         octet @ lowest memory address)
+*********************************************************************************************************
+*/
+
+                                                                /* Define  CPU         word sizes (see Note #1) :       */
+#define  CPU_CFG_ADDR_SIZE              CPU_WORD_SIZE_64        /* Defines CPU address word size  (in octets).          */
+#define  CPU_CFG_DATA_SIZE              CPU_WORD_SIZE_64        /* Defines CPU data    word size  (in octets).          */
+#define  CPU_CFG_DATA_SIZE_MAX          CPU_WORD_SIZE_64        /* Defines CPU maximum word size  (in octets).          */
+
+#define  CPU_CFG_ENDIAN_TYPE            CPU_ENDIAN_TYPE_LITTLE  /* Defines CPU data    word-memory order (see Note #2). */
+
+
+/*
+*********************************************************************************************************
+*                                 CONFIGURE CPU ADDRESS & DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* CPU address type based on address bus size.          */
+#if     (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_64)
+typedef  CPU_INT64U  CPU_ADDR;
+#elif   (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_32)
+typedef  CPU_INT32U  CPU_ADDR;
+#elif   (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_ADDR;
+#else
+typedef  CPU_INT08U  CPU_ADDR;
+#endif
+
+                                                                /* CPU data    type based on data    bus size.          */
+#if     (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_64)
+typedef  CPU_INT64U  CPU_DATA;
+#elif   (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32)
+typedef  CPU_INT32U  CPU_DATA;
+#elif   (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_DATA;
+#else
+typedef  CPU_INT08U  CPU_DATA;
+#endif
+
+
+typedef  CPU_DATA    CPU_ALIGN;                                 /* Defines CPU data-word-alignment size.                */
+typedef  CPU_ADDR    CPU_SIZE_T;                                /* Defines CPU standard 'size_t'   size.                */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU STACK CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_STK_GROWTH in 'cpu.h' with CPU's stack growth order :
+*
+*               (a) CPU_STK_GROWTH_LO_TO_HI     CPU stack pointer increments to the next higher  stack
+*                                                   memory address after data is pushed onto the stack
+*               (b) CPU_STK_GROWTH_HI_TO_LO     CPU stack pointer decrements to the next lower   stack
+*                                                   memory address after data is pushed onto the stack
+*
+*           (2) Configure CPU_CFG_STK_ALIGN_BYTES with the highest minimum alignement required for
+*               cpu stacks.
+*
+*               (a) ARM Procedure Calls Standard requires an 8 bytes stack alignment.
+*********************************************************************************************************
+*/
+
+#define  CPU_CFG_STK_GROWTH       CPU_STK_GROWTH_HI_TO_LO       /* Defines CPU stack growth order (see Note #1).        */
+
+#define  CPU_CFG_STK_ALIGN_BYTES (16u)                          /* Defines CPU stack alignment in bytes. (see Note #2). */
+
+typedef  CPU_INT64U               CPU_STK;                      /* Defines CPU stack data type.                         */
+typedef  CPU_ADDR                 CPU_STK_SIZE;                 /* Defines CPU stack size data type.                    */
+
+
+/*
+*********************************************************************************************************
+*                                   CRITICAL SECTION CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_CRITICAL_METHOD with CPU's/compiler's critical section method :
+*
+*                                                       Enter/Exit critical sections by ...
+*
+*                   CPU_CRITICAL_METHOD_INT_DIS_EN      Disable/Enable interrupts
+*                   CPU_CRITICAL_METHOD_STATUS_STK      Push/Pop       interrupt status onto stack
+*                   CPU_CRITICAL_METHOD_STATUS_LOCAL    Save/Restore   interrupt status to local variable
+*
+*               (a) CPU_CRITICAL_METHOD_INT_DIS_EN  is NOT a preferred method since it does NOT support
+*                   multiple levels of interrupts.  However, with some CPUs/compilers, this is the only
+*                   available method.
+*
+*               (b) CPU_CRITICAL_METHOD_STATUS_STK    is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Push/save   interrupt status onto a local stack
+*                       (2) Disable     interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Pop/restore interrupt status from a local stack
+*
+*               (c) CPU_CRITICAL_METHOD_STATUS_LOCAL  is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Save    interrupt status into a local variable
+*                       (2) Disable interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Restore interrupt status from a local variable
+*
+*           (2) Critical section macro's most likely require inline assembly.  If the compiler does NOT
+*               allow inline assembly in C source files, critical section macro's MUST call an assembly
+*               subroutine defined in a 'cpu_a.asm' file located in the following software directory :
+*
+*                   \\\\
+*
+*                       where
+*                                   directory path for common   CPU-compiler software
+*                                                      directory name for specific CPU
+*                                                 directory name for specific compiler
+*
+*           (3) (a) To save/restore interrupt status, a local variable 'cpu_sr' of type 'CPU_SR' MAY need
+*                   to be declared (e.g. if 'CPU_CRITICAL_METHOD_STATUS_LOCAL' method is configured).
+*
+*                   (1) 'cpu_sr' local variable SHOULD be declared via the CPU_SR_ALLOC() macro which, if
+*                        used, MUST be declared following ALL other local variables.
+*
+*                        Example :
+*
+*                           void  Fnct (void)
+*                           {
+*                               CPU_INT08U  val_08;
+*                               CPU_INT16U  val_16;
+*                               CPU_INT32U  val_32;
+*                               CPU_SR_ALLOC();         MUST be declared after ALL other local variables
+*                                   :
+*                                   :
+*                           }
+*
+*               (b) Configure 'CPU_SR' data type with the appropriate-sized CPU data type large enough to
+*                   completely store the CPU's/compiler's status word.
+*********************************************************************************************************
+*/
+                                                                /* Configure CPU critical method      (see Note #1) :   */
+#define  CPU_CFG_CRITICAL_METHOD    CPU_CRITICAL_METHOD_STATUS_LOCAL
+
+typedef  CPU_INT64U                 CPU_SR;                     /* Defines   CPU status register size (see Note #3b).   */
+
+                                                                /* Allocates CPU status register word (see Note #3a).   */
+#if     (CPU_CFG_CRITICAL_METHOD == CPU_CRITICAL_METHOD_STATUS_LOCAL)
+#define  CPU_SR_ALLOC()             CPU_SR  cpu_sr = (CPU_SR)0
+#else
+#define  CPU_SR_ALLOC()
+#endif
+
+
+
+
+#define  CPU_INT_DIS()         do { cpu_sr = CPU_SR_Save(); } while (0) /* Save    CPU status word & disable interrupts.*/
+#define  CPU_INT_EN()          do { CPU_SR_Restore(cpu_sr); } while (0) /* Restore CPU status word.                     */
+
+
+#ifdef   CPU_CFG_INT_DIS_MEAS_EN
+                                                                        /* Disable interrupts, ...                      */
+                                                                        /* & start interrupts disabled time measurement.*/
+#define  CPU_CRITICAL_ENTER()  do { CPU_INT_DIS();         \
+                                    CPU_IntDisMeasStart(); }  while (0)
+                                                                        /* Stop & measure   interrupts disabled time,   */
+                                                                        /* ...  & re-enable interrupts.                 */
+#define  CPU_CRITICAL_EXIT()   do { CPU_IntDisMeasStop();  \
+                                    CPU_INT_EN();          }  while (0)
+
+#else
+
+#define  CPU_CRITICAL_ENTER()  do { CPU_INT_DIS(); } while (0)          /* Disable   interrupts.                        */
+#define  CPU_CRITICAL_EXIT()   do { CPU_INT_EN();  } while (0)          /* Re-enable interrupts.                        */
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    MEMORY BARRIERS CONFIGURATION
+*
+* Note(s) : (1) (a) Configure memory barriers if required by the architecture.
+*
+*                   CPU_MB      Full memory barrier.
+*                   CPU_RMB     Read (Loads) memory barrier.
+*                   CPU_WMB     Write (Stores) memory barrier.
+*
+*********************************************************************************************************
+*/
+
+#define  CPU_MB()       __asm__ __volatile__ ("dsb sy" : : : "memory")
+#define  CPU_RMB()      __asm__ __volatile__ ("dsb sy" : : : "memory")
+#define  CPU_WMB()      __asm__ __volatile__ ("dsb sy" : : : "memory")
+
+/*
+*********************************************************************************************************
+*                                          CP15 ACCESSORS
+*
+* Note(s) : (1) (a) Read and Write CP15 registers using the architecturally defined name.
+*
+*********************************************************************************************************
+*/
+
+#define CPU_CP_GET(val, reg) __asm__ __volatile__ ("mrs %0, " #reg : "=r" (val) : : "memory")
+
+#define CPU_CP_SET(val, reg) __asm__ __volatile__ ("msr " #reg ",%0"  : : "r" (val) : "memory")
+
+
+/*
+*********************************************************************************************************
+*                                    CPU COUNT ZEROS CONFIGURATION
+*
+* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT  to define count leading  zeros bits
+*                   function(s) in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_LEAD_ZEROS_ASM_PRESENT       #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT   NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
+*
+*               (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits
+*                   function(s) in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT      #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT  NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
+*********************************************************************************************************
+*/
+
+                                                                /* Configure CPU count leading  zeros bits ...          */
+#define  CPU_CFG_LEAD_ZEROS_ASM_PRESENT                         /* ... assembly-version (see Note #1a).                 */
+
+                                                                /* Configure CPU count trailing zeros bits ...          */
+#define  CPU_CFG_TRAIL_ZEROS_ASM_PRESENT                        /* ... assembly-version (see Note #1b).                 */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        CPU_IntDis       (void);
+void        CPU_IntEn        (void);
+
+CPU_SR      CPU_SR_Save      (void);
+void        CPU_SR_Restore   (CPU_SR  cpu_sr);
+
+void        CPU_WaitForInt   (void);
+void        CPU_WaitForEvent (void);
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_CFG_ADDR_SIZE
+#error  "CPU_CFG_ADDR_SIZE              not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_ADDR_SIZE        illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+#ifndef  CPU_CFG_DATA_SIZE
+#error  "CPU_CFG_DATA_SIZE              not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_DATA_SIZE        illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+#ifndef  CPU_CFG_DATA_SIZE_MAX
+#error  "CPU_CFG_DATA_SIZE_MAX          not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_DATA_SIZE_MAX    illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+
+#if     (CPU_CFG_DATA_SIZE_MAX < CPU_CFG_DATA_SIZE)
+#error  "CPU_CFG_DATA_SIZE_MAX    illegally #define'd in 'cpu.h' "
+#error  "                         [MUST be  >= CPU_CFG_DATA_SIZE]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_ENDIAN_TYPE
+#error  "CPU_CFG_ENDIAN_TYPE            not #define'd in 'cpu.h'   "
+#error  "                         [MUST be  CPU_ENDIAN_TYPE_BIG   ]"
+#error  "                         [     ||  CPU_ENDIAN_TYPE_LITTLE]"
+
+#elif  ((CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_BIG   ) && \
+        (CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_LITTLE))
+#error  "CPU_CFG_ENDIAN_TYPE      illegally #define'd in 'cpu.h'   "
+#error  "                         [MUST be  CPU_ENDIAN_TYPE_BIG   ]"
+#error  "                         [     ||  CPU_ENDIAN_TYPE_LITTLE]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_STK_GROWTH
+#error  "CPU_CFG_STK_GROWTH             not #define'd in 'cpu.h'    "
+#error  "                         [MUST be  CPU_STK_GROWTH_LO_TO_HI]"
+#error  "                         [     ||  CPU_STK_GROWTH_HI_TO_LO]"
+
+#elif  ((CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_LO_TO_HI) && \
+        (CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_HI_TO_LO))
+#error  "CPU_CFG_STK_GROWTH       illegally #define'd in 'cpu.h'    "
+#error  "                         [MUST be  CPU_STK_GROWTH_LO_TO_HI]"
+#error  "                         [     ||  CPU_STK_GROWTH_HI_TO_LO]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_CRITICAL_METHOD
+#error  "CPU_CFG_CRITICAL_METHOD        not #define'd in 'cpu.h'             "
+#error  "                         [MUST be  CPU_CRITICAL_METHOD_INT_DIS_EN  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_STK  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_LOCAL]"
+
+#elif  ((CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_INT_DIS_EN  ) && \
+        (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_STK  ) && \
+        (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_LOCAL))
+#error  "CPU_CFG_CRITICAL_METHOD  illegally #define'd in 'cpu.h'             "
+#error  "                         [MUST be  CPU_CRITICAL_METHOD_INT_DIS_EN  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_STK  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_LOCAL]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'cpu.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif                                                          /* End of CPU module include.                           */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A50/GNU/cpu_a.S b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A50/GNU/cpu_a.S
new file mode 100644
index 0000000..525f95a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-A50/GNU/cpu_a.S
@@ -0,0 +1,262 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015 Micrium, Inc. Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            CPU PORT FILE
+*
+*                                        Generic ARM-Cortex-A
+*                                               GNU GCC
+*
+* Filename      : cpu_a.s
+* Version       : V1.30.02.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           .global FUNCTIONS
+*********************************************************************************************************
+*/
+
+    .global  CPU_SR_Save
+    .global  CPU_SR_Restore
+
+    .global  CPU_IntDis
+    .global  CPU_IntEn
+    
+    .global  CPU_WaitForInt
+    .global  CPU_WaitForEvent
+
+    .global  CPU_CntLeadZeros
+    .global  CPU_CntTrailZeros
+
+
+/*
+*********************************************************************************************************
+*                                      CODE GENERATION DIRECTIVES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    DISABLE and ENABLE INTERRUPTS
+*
+* Description : Disable/Enable interrupts.
+*
+* Prototypes  : void  CPU_IntDis(void);
+*               void  CPU_IntEn (void);
+*********************************************************************************************************
+*/
+
+CPU_IntDis:
+
+        MSR     DAIFSet, #3
+        DSB     SY
+        RET
+
+CPU_IntEn:
+
+        DSB     SY
+        MSR     DAIFClr, #3
+        RET
+
+/*
+*********************************************************************************************************
+*                                      CRITICAL SECTION FUNCTIONS
+*
+* Description : Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking, the
+*               state of the interrupt disable flag is stored in the local variable 'cpu_sr' & interrupts
+*               are then disabled ('cpu_sr' is allocated in all functions that need to disable interrupts).
+*               The previous interrupt state is restored by copying 'cpu_sr' into the CPU's status register.
+*
+* Prototypes  : CPU_SR  CPU_SR_Save   (void)*
+*               void    CPU_SR_Restore(CPU_SR  cpu_sr)*
+*********************************************************************************************************
+*/
+
+CPU_SR_Save:
+
+        MRS      x0, DAIF
+        MSR      DAIFSet, #3
+        DSB      SY
+        RET
+
+
+CPU_SR_Restore:
+
+        DSB     SY
+        MOV     x1, #0xC0
+		ANDS    x0, x0, x1
+		B.NE    CPU_SR_Restore_Exit
+		MSR     DAIFClr, #3
+CPU_SR_Restore_Exit:
+        RET
+
+
+/*
+*********************************************************************************************************
+*                                         WAIT FOR INTERRUPT
+*
+* Description : Enters sleep state, which will be exited when an interrupt is received.
+*
+* Prototypes  : void  CPU_WaitForInt (void)
+*
+* Argument(s) : none.
+*********************************************************************************************************
+*/
+
+CPU_WaitForInt:
+
+        DSB SY
+        WFI                                     /* Wait for interrupt */
+        RET
+
+
+/*
+*********************************************************************************************************
+*                                         WAIT FOR EXCEPTION
+*
+* Description : Enters sleep state, which will be exited when an exception is received.
+*
+* Prototypes  : void  CPU_WaitForExcept (void)
+*
+* Argument(s) : none.
+*********************************************************************************************************
+*/
+
+CPU_WaitForEvent:
+
+        DSB SY
+        WFE                                     /* Wait for exception */
+        RET
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_CntLeadZeros()
+*                                        COUNT LEADING ZEROS
+*
+* Description : Counts the number of contiguous, most-significant, leading zero bits before the
+*                   first binary one bit in a data value.
+*
+* Prototype   : CPU_DATA  CPU_CntLeadZeros(CPU_DATA  val)*
+*
+* Argument(s) : val         Data value to count leading zero bits.
+*
+* Return(s)   : Number of contiguous, most-significant, leading zero bits in 'val'.
+*
+* Caller(s)   : Application.
+*
+*               This function is an INTERNAL CPU module function but MAY be called by application
+*               function(s).
+*
+* Note(s)     : (1) (a) Supports 32-bit data value size as configured by 'CPU_DATA' (see 'cpu.h
+*                       CPU WORD CONFIGURATION  Note #1').
+*
+*                   (b) For 32-bit values :
+*
+*                             b31  b30  b29  ...  b04  b03  b02  b01  b00    # Leading Zeros
+*                             ---  ---  ---       ---  ---  ---  ---  ---    ---------------
+*                              1    x    x         x    x    x    x    x            0
+*                              0    1    x         x    x    x    x    x            1
+*                              0    0    1         x    x    x    x    x            2
+*                              :    :    :         :    :    :    :    :            :
+*                              :    :    :         :    :    :    :    :            :
+*                              0    0    0         1    x    x    x    x           27
+*                              0    0    0         0    1    x    x    x           28
+*                              0    0    0         0    0    1    x    x           29
+*                              0    0    0         0    0    0    1    x           30
+*                              0    0    0         0    0    0    0    1           31
+*                              0    0    0         0    0    0    0    0           32
+*
+*
+*               (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_LEAD_ZEROS_ASM_PRESENT is
+*                   #define'd in 'cpu_cfg.h' or 'cpu.h'.
+*********************************************************************************************************
+*/
+
+CPU_CntLeadZeros:
+
+        CLZ     x0, x0                          /* Count leading zeros */
+        RET
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_CntTrailZeros()
+*                                        COUNT TRAILING ZEROS
+*
+* Description : Counts the number of contiguous, least-significant, trailing zero bits before the
+*                   first binary one bit in a data value.
+*
+* Prototype   : CPU_DATA  CPU_CntTrailZeros(CPU_DATA  val)*
+*
+* Argument(s) : val         Data value to count trailing zero bits.
+*
+* Return(s)   : Number of contiguous, least-significant, trailing zero bits in 'val'.
+*
+* Caller(s)   : Application.
+*
+*               This function is an INTERNAL CPU module function but MAY be called by application
+*               function(s).
+*
+* Note(s)     : (1) (a) Supports 32-bit data value size as configured by 'CPU_DATA' (see 'cpu.h
+*                       CPU WORD CONFIGURATION  Note #1').
+*
+*                   (b) For 32-bit values :
+*
+*                             b31  b30  b29  b28  b27  ...  b02  b01  b00    # Trailing Zeros
+*                             ---  ---  ---  ---  ---       ---  ---  ---    ----------------
+*                              x    x    x    x    x         x    x    1            0
+*                              x    x    x    x    x         x    1    0            1
+*                              x    x    x    x    x         1    0    0            2
+*                              :    :    :    :    :         :    :    :            :
+*                              :    :    :    :    :         :    :    :            :
+*                              x    x    x    x    1         0    0    0           27
+*                              x    x    x    1    0         0    0    0           28
+*                              x    x    1    0    0         0    0    0           29
+*                              x    1    0    0    0         0    0    0           30
+*                              1    0    0    0    0         0    0    0           31
+*                              0    0    0    0    0         0    0    0           32
+*
+*
+*               (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT is
+*                   #define'd in 'cpu_cfg.h' or 'cpu.h'.
+*********************************************************************************************************
+*/
+
+CPU_CntTrailZeros:
+
+        RBIT    x0, x0                          /* Reverse bits */
+        CLZ     x0, x0                          /* Count trailing zeros */
+        RET
+
+
+/*
+*********************************************************************************************************
+*                                     CPU ASSEMBLY PORT FILE END
+*********************************************************************************************************
+*/
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-M7/GNU/cpu.h b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-M7/GNU/cpu.h
new file mode 100644
index 0000000..7fd957c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-M7/GNU/cpu.h
@@ -0,0 +1,745 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2016; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            CPU PORT FILE
+*
+*                                            ARM-Cortex-M4
+*                                            GNU C Compiler
+*
+* Filename      : cpu.h
+* Version       : V1.31.00
+* Programmer(s) : JJL
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This CPU header file is protected from multiple pre-processor inclusion through use of 
+*               the  CPU module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_MODULE_PRESENT                                     /* See Note #1.                                         */
+#define  CPU_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                          CPU INCLUDE FILES
+*
+* Note(s) : (1) The following CPU files are located in the following directories :
+*
+*               (a) \\cpu_cfg.h
+*
+*               (b) (1) \\cpu_def.h
+*                   (2) \\\\cpu*.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for common   CPU-compiler software
+*                                                          directory name for specific CPU
+*                                                     directory name for specific compiler
+*
+*           (2) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) (1) '\\'                  directory         See Note #1b1
+*                   (2) '\\\\' directory         See Note #1b2
+*
+*           (3) Since NO custom library modules are included, 'cpu.h' may ONLY use configurations from
+*               CPU configuration file 'cpu_cfg.h' that do NOT reference any custom library definitions.
+*
+*               In other words, 'cpu.h' may use 'cpu_cfg.h' configurations that are #define'd to numeric
+*               constants or to NULL (i.e. NULL-valued #define's); but may NOT use configurations to
+*               custom library #define's (e.g. DEF_DISABLED or DEF_ENABLED).
+*********************************************************************************************************
+*/
+
+#include  
+#include                                             /* See Note #3.                                         */
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    CONFIGURE STANDARD DATA TYPES
+*
+* Note(s) : (1) Configure standard data types according to CPU-/compiler-specifications.
+*
+*           (2) (a) (1) 'CPU_FNCT_VOID' data type defined to replace the commonly-used function pointer
+*                       data type of a pointer to a function which returns void & has no arguments.
+*
+*                   (2) Example function pointer usage :
+*
+*                           CPU_FNCT_VOID  FnctName;
+*
+*                           FnctName();
+*
+*               (b) (1) 'CPU_FNCT_PTR'  data type defined to replace the commonly-used function pointer
+*                       data type of a pointer to a function which returns void & has a single void
+*                       pointer argument.
+*
+*                   (2) Example function pointer usage :
+*
+*                           CPU_FNCT_PTR   FnctName;
+*                           void          *p_obj
+*
+*                           FnctName(p_obj);
+*********************************************************************************************************
+*/
+
+typedef            void        CPU_VOID;
+typedef            char        CPU_CHAR;                        /*  8-bit character                                     */
+typedef  unsigned  char        CPU_BOOLEAN;                     /*  8-bit boolean or logical                            */
+typedef  unsigned  char        CPU_INT08U;                      /*  8-bit unsigned integer                              */
+typedef    signed  char        CPU_INT08S;                      /*  8-bit   signed integer                              */
+typedef  unsigned  short       CPU_INT16U;                      /* 16-bit unsigned integer                              */
+typedef    signed  short       CPU_INT16S;                      /* 16-bit   signed integer                              */
+typedef  unsigned  int         CPU_INT32U;                      /* 32-bit unsigned integer                              */
+typedef    signed  int         CPU_INT32S;                      /* 32-bit   signed integer                              */
+typedef  unsigned  long  long  CPU_INT64U;                      /* 64-bit unsigned integer                              */
+typedef    signed  long  long  CPU_INT64S;                      /* 64-bit   signed integer                              */
+
+typedef            float       CPU_FP32;                        /* 32-bit floating point                                */
+typedef            double      CPU_FP64;                        /* 64-bit floating point                                */
+
+
+typedef  volatile  CPU_INT08U  CPU_REG08;                       /*  8-bit register                                      */
+typedef  volatile  CPU_INT16U  CPU_REG16;                       /* 16-bit register                                      */
+typedef  volatile  CPU_INT32U  CPU_REG32;                       /* 32-bit register                                      */
+typedef  volatile  CPU_INT64U  CPU_REG64;                       /* 64-bit register                                      */
+
+
+typedef            void      (*CPU_FNCT_VOID)(void);            /* See Note #2a.                                        */
+typedef            void      (*CPU_FNCT_PTR )(void *p_obj);     /* See Note #2b.                                        */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU WORD CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_ADDR_SIZE, CPU_CFG_DATA_SIZE, & CPU_CFG_DATA_SIZE_MAX with CPU's &/or 
+*               compiler's word sizes :
+*
+*                   CPU_WORD_SIZE_08             8-bit word size
+*                   CPU_WORD_SIZE_16            16-bit word size
+*                   CPU_WORD_SIZE_32            32-bit word size
+*                   CPU_WORD_SIZE_64            64-bit word size
+*
+*           (2) Configure CPU_CFG_ENDIAN_TYPE with CPU's data-word-memory order :
+*
+*               (a) CPU_ENDIAN_TYPE_BIG         Big-   endian word order (CPU words' most  significant
+*                                                                         octet @ lowest memory address)
+*               (b) CPU_ENDIAN_TYPE_LITTLE      Little-endian word order (CPU words' least significant
+*                                                                         octet @ lowest memory address)
+*********************************************************************************************************
+*/
+
+                                                                /* Define  CPU         word sizes (see Note #1) :       */
+#define  CPU_CFG_ADDR_SIZE              CPU_WORD_SIZE_32        /* Defines CPU address word size  (in octets).          */
+#define  CPU_CFG_DATA_SIZE              CPU_WORD_SIZE_32        /* Defines CPU data    word size  (in octets).          */
+#define  CPU_CFG_DATA_SIZE_MAX          CPU_WORD_SIZE_64        /* Defines CPU maximum word size  (in octets).          */
+
+#define  CPU_CFG_ENDIAN_TYPE            CPU_ENDIAN_TYPE_LITTLE  /* Defines CPU data    word-memory order (see Note #2). */
+
+
+/*
+*********************************************************************************************************
+*                                 CONFIGURE CPU ADDRESS & DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* CPU address type based on address bus size.          */
+#if     (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_32)
+typedef  CPU_INT32U  CPU_ADDR;
+#elif   (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_ADDR;
+#else
+typedef  CPU_INT08U  CPU_ADDR;
+#endif
+
+                                                                /* CPU data    type based on data    bus size.          */
+#if     (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32)
+typedef  CPU_INT32U  CPU_DATA;
+#elif   (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_DATA;
+#else
+typedef  CPU_INT08U  CPU_DATA;
+#endif
+
+
+typedef  CPU_DATA    CPU_ALIGN;                                 /* Defines CPU data-word-alignment size.                */
+typedef  CPU_ADDR    CPU_SIZE_T;                                /* Defines CPU standard 'size_t'   size.                */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU STACK CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_STK_GROWTH in 'cpu.h' with CPU's stack growth order :
+*
+*               (a) CPU_STK_GROWTH_LO_TO_HI     CPU stack pointer increments to the next higher  stack
+*                                                   memory address after data is pushed onto the stack
+*               (b) CPU_STK_GROWTH_HI_TO_LO     CPU stack pointer decrements to the next lower   stack
+*                                                   memory address after data is pushed onto the stack
+*
+*           (2) Configure CPU_CFG_STK_ALIGN_BYTES with the highest minimum alignement required for
+*               cpu stacks.
+*
+*               (a) ARM Procedure Calls Standard requires an 8 bytes stack alignment.
+*********************************************************************************************************
+*/
+
+#define  CPU_CFG_STK_GROWTH       CPU_STK_GROWTH_HI_TO_LO       /* Defines CPU stack growth order (see Note #1).        */
+
+#define  CPU_CFG_STK_ALIGN_BYTES  (8u)                          /* Defines CPU stack alignment in bytes. (see Note #2). */
+
+typedef  CPU_INT32U               CPU_STK;                      /* Defines CPU stack data type.                         */
+typedef  CPU_ADDR                 CPU_STK_SIZE;                 /* Defines CPU stack size data type.                    */
+
+
+/*
+*********************************************************************************************************
+*                                   CRITICAL SECTION CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_CRITICAL_METHOD with CPU's/compiler's critical section method :
+*
+*                                                       Enter/Exit critical sections by ...
+*
+*                   CPU_CRITICAL_METHOD_INT_DIS_EN      Disable/Enable interrupts
+*                   CPU_CRITICAL_METHOD_STATUS_STK      Push/Pop       interrupt status onto stack
+*                   CPU_CRITICAL_METHOD_STATUS_LOCAL    Save/Restore   interrupt status to local variable
+*
+*               (a) CPU_CRITICAL_METHOD_INT_DIS_EN  is NOT a preferred method since it does NOT support
+*                   multiple levels of interrupts.  However, with some CPUs/compilers, this is the only
+*                   available method.
+*
+*               (b) CPU_CRITICAL_METHOD_STATUS_STK    is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Push/save   interrupt status onto a local stack
+*                       (2) Disable     interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Pop/restore interrupt status from a local stack
+*
+*               (c) CPU_CRITICAL_METHOD_STATUS_LOCAL  is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Save    interrupt status into a local variable
+*                       (2) Disable interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Restore interrupt status from a local variable
+*
+*           (2) Critical section macro's most likely require inline assembly.  If the compiler does NOT
+*               allow inline assembly in C source files, critical section macro's MUST call an assembly
+*               subroutine defined in a 'cpu_a.asm' file located in the following software directory :
+*
+*                   \\\\
+*
+*                       where
+*                                   directory path for common   CPU-compiler software
+*                                                      directory name for specific CPU
+*                                                 directory name for specific compiler
+*
+*           (3) (a) To save/restore interrupt status, a local variable 'cpu_sr' of type 'CPU_SR' MAY need
+*                   to be declared (e.g. if 'CPU_CRITICAL_METHOD_STATUS_LOCAL' method is configured).
+*
+*                   (1) 'cpu_sr' local variable SHOULD be declared via the CPU_SR_ALLOC() macro which, if 
+*                        used, MUST be declared following ALL other local variables.
+*
+*                        Example :
+*
+*                           void  Fnct (void)
+*                           {
+*                               CPU_INT08U  val_08;
+*                               CPU_INT16U  val_16;
+*                               CPU_INT32U  val_32;
+*                               CPU_SR_ALLOC();         MUST be declared after ALL other local variables
+*                                   :
+*                                   :
+*                           }
+*
+*               (b) Configure 'CPU_SR' data type with the appropriate-sized CPU data type large enough to
+*                   completely store the CPU's/compiler's status word.
+*********************************************************************************************************
+*/
+                                                                /* Configure CPU critical method      (see Note #1) :   */
+#define  CPU_CFG_CRITICAL_METHOD    CPU_CRITICAL_METHOD_STATUS_LOCAL
+
+typedef  CPU_INT32U                 CPU_SR;                     /* Defines   CPU status register size (see Note #3b).   */
+
+                                                                /* Allocates CPU status register word (see Note #3a).   */
+#if     (CPU_CFG_CRITICAL_METHOD == CPU_CRITICAL_METHOD_STATUS_LOCAL)
+#define  CPU_SR_ALLOC()             CPU_SR  cpu_sr = (CPU_SR)0
+#else
+#define  CPU_SR_ALLOC()
+#endif
+
+
+
+#define  CPU_INT_DIS()         do { cpu_sr = CPU_SR_Save(); } while (0) /* Save    CPU status word & disable interrupts.*/
+#define  CPU_INT_EN()          do { CPU_SR_Restore(cpu_sr); } while (0) /* Restore CPU status word.                     */
+
+
+#ifdef   CPU_CFG_INT_DIS_MEAS_EN
+                                                                        /* Disable interrupts, ...                      */
+                                                                        /* & start interrupts disabled time measurement.*/
+#define  CPU_CRITICAL_ENTER()  do { CPU_INT_DIS();         \
+                                    CPU_IntDisMeasStart(); }  while (0)
+                                                                        /* Stop & measure   interrupts disabled time,   */
+                                                                        /* ...  & re-enable interrupts.                 */
+#define  CPU_CRITICAL_EXIT()   do { CPU_IntDisMeasStop();  \
+                                    CPU_INT_EN();          }  while (0)
+
+#else
+
+#define  CPU_CRITICAL_ENTER()  do { CPU_INT_DIS(); } while (0)          /* Disable   interrupts.                        */
+#define  CPU_CRITICAL_EXIT()   do { CPU_INT_EN();  } while (0)          /* Re-enable interrupts.                        */
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    MEMORY BARRIERS CONFIGURATION
+*
+* Note(s) : (1) (a) Configure memory barriers if required by the architecture.
+*
+*                   CPU_MB      Full memory barrier.
+*                   CPU_RMB     Read (Loads) memory barrier.
+*                   CPU_WMB     Write (Stores) memory barrier.
+*
+*********************************************************************************************************
+*/
+
+#define  CPU_MB()       __asm__ __volatile__ ("dsb" : : : "memory")
+#define  CPU_RMB()      __asm__ __volatile__ ("dsb" : : : "memory")
+#define  CPU_WMB()      __asm__ __volatile__ ("dsb" : : : "memory")
+
+
+/*
+*********************************************************************************************************
+*                                    CPU COUNT ZEROS CONFIGURATION
+*
+* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT  to define count leading  zeros bits 
+*                   function(s) in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_LEAD_ZEROS_ASM_PRESENT       #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT   NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
+*
+*               (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits 
+*                   function(s) in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT      #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT  NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
+*********************************************************************************************************
+*/
+
+                                                                /* Configure CPU count leading  zeros bits ...          */
+#define  CPU_CFG_LEAD_ZEROS_ASM_PRESENT                         /* ... assembly-version (see Note #1a).                 */
+
+                                                                /* Configure CPU count trailing zeros bits ...          */
+#define  CPU_CFG_TRAIL_ZEROS_ASM_PRESENT                        /* ... assembly-version (see Note #1b).                 */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        CPU_IntDis       (void);
+void        CPU_IntEn        (void);
+
+void        CPU_IntSrcDis    (CPU_INT08U  pos);
+void        CPU_IntSrcEn     (CPU_INT08U  pos);
+void        CPU_IntSrcPendClr(CPU_INT08U  pos);
+CPU_INT16S  CPU_IntSrcPrioGet(CPU_INT08U  pos);
+void        CPU_IntSrcPrioSet(CPU_INT08U  pos,
+                              CPU_INT08U  prio);
+
+
+CPU_SR      CPU_SR_Save      (void);
+void        CPU_SR_Restore   (CPU_SR      cpu_sr);
+
+
+void        CPU_WaitForInt   (void);
+void        CPU_WaitForExcept(void);
+
+
+CPU_DATA    CPU_RevBits      (CPU_DATA    val);
+
+void        CPU_BitBandClr   (CPU_ADDR    addr,
+                              CPU_INT08U  bit_nbr);
+void        CPU_BitBandSet   (CPU_ADDR    addr,
+                              CPU_INT08U  bit_nbr);
+
+
+/*
+*********************************************************************************************************
+*                                          INTERRUPT SOURCES
+*********************************************************************************************************
+*/
+
+#define  CPU_INT_STK_PTR                                   0u
+#define  CPU_INT_RESET                                     1u
+#define  CPU_INT_NMI                                       2u
+#define  CPU_INT_HFAULT                                    3u
+#define  CPU_INT_MEM                                       4u
+#define  CPU_INT_BUSFAULT                                  5u
+#define  CPU_INT_USAGEFAULT                                6u
+#define  CPU_INT_RSVD_07                                   7u
+#define  CPU_INT_RSVD_08                                   8u
+#define  CPU_INT_RSVD_09                                   9u
+#define  CPU_INT_RSVD_10                                  10u
+#define  CPU_INT_SVCALL                                   11u
+#define  CPU_INT_DBGMON                                   12u
+#define  CPU_INT_RSVD_13                                  13u
+#define  CPU_INT_PENDSV                                   14u
+#define  CPU_INT_SYSTICK                                  15u
+#define  CPU_INT_EXT0                                     16u
+
+/*
+*********************************************************************************************************
+*                                            CPU REGISTERS
+*********************************************************************************************************
+*/
+
+#define  CPU_REG_NVIC_NVIC           (*((CPU_REG32 *)(0xE000E004)))             /* Int Ctrl'er Type Reg.                */
+#define  CPU_REG_NVIC_ST_CTRL        (*((CPU_REG32 *)(0xE000E010)))             /* SysTick Ctrl & Status Reg.           */
+#define  CPU_REG_NVIC_ST_RELOAD      (*((CPU_REG32 *)(0xE000E014)))             /* SysTick Reload      Value Reg.       */
+#define  CPU_REG_NVIC_ST_CURRENT     (*((CPU_REG32 *)(0xE000E018)))             /* SysTick Current     Value Reg.       */
+#define  CPU_REG_NVIC_ST_CAL         (*((CPU_REG32 *)(0xE000E01C)))             /* SysTick Calibration Value Reg.       */
+
+#define  CPU_REG_NVIC_SETEN(n)       (*((CPU_REG32 *)(0xE000E100 + (n) * 4u)))  /* IRQ Set En Reg.                      */
+#define  CPU_REG_NVIC_CLREN(n)       (*((CPU_REG32 *)(0xE000E180 + (n) * 4u)))  /* IRQ Clr En Reg.                      */
+#define  CPU_REG_NVIC_SETPEND(n)     (*((CPU_REG32 *)(0xE000E200 + (n) * 4u)))  /* IRQ Set Pending Reg.                 */
+#define  CPU_REG_NVIC_CLRPEND(n)     (*((CPU_REG32 *)(0xE000E280 + (n) * 4u)))  /* IRQ Clr Pending Reg.                 */
+#define  CPU_REG_NVIC_ACTIVE(n)      (*((CPU_REG32 *)(0xE000E300 + (n) * 4u)))  /* IRQ Active Reg.                      */
+#define  CPU_REG_NVIC_PRIO(n)        (*((CPU_REG32 *)(0xE000E400 + (n) * 4u)))  /* IRQ Prio Reg.                        */
+
+#define  CPU_REG_NVIC_CPUID          (*((CPU_REG32 *)(0xE000ED00)))             /* CPUID Base Reg.                      */
+#define  CPU_REG_NVIC_ICSR           (*((CPU_REG32 *)(0xE000ED04)))             /* Int Ctrl State  Reg.                 */
+#define  CPU_REG_NVIC_VTOR           (*((CPU_REG32 *)(0xE000ED08)))             /* Vect Tbl Offset Reg.                 */
+#define  CPU_REG_NVIC_AIRCR          (*((CPU_REG32 *)(0xE000ED0C)))             /* App Int/Reset Ctrl Reg.              */
+#define  CPU_REG_NVIC_SCR            (*((CPU_REG32 *)(0xE000ED10)))             /* System Ctrl Reg.                     */
+#define  CPU_REG_NVIC_CCR            (*((CPU_REG32 *)(0xE000ED14)))             /* Cfg    Ctrl Reg.                     */
+#define  CPU_REG_NVIC_SHPRI1         (*((CPU_REG32 *)(0xE000ED18)))             /* System Handlers  4 to  7 Prio.       */
+#define  CPU_REG_NVIC_SHPRI2         (*((CPU_REG32 *)(0xE000ED1C)))             /* System Handlers  8 to 11 Prio.       */
+#define  CPU_REG_NVIC_SHPRI3         (*((CPU_REG32 *)(0xE000ED20)))             /* System Handlers 12 to 15 Prio.       */
+#define  CPU_REG_NVIC_SHCSR          (*((CPU_REG32 *)(0xE000ED24)))             /* System Handler Ctrl & State Reg.     */
+#define  CPU_REG_NVIC_CFSR           (*((CPU_REG32 *)(0xE000ED28)))             /* Configurable Fault Status Reg.       */
+#define  CPU_REG_NVIC_HFSR           (*((CPU_REG32 *)(0xE000ED2C)))             /* Hard  Fault Status Reg.              */
+#define  CPU_REG_NVIC_DFSR           (*((CPU_REG32 *)(0xE000ED30)))             /* Debug Fault Status Reg.              */
+#define  CPU_REG_NVIC_MMFAR          (*((CPU_REG32 *)(0xE000ED34)))             /* Mem Manage Addr Reg.                 */
+#define  CPU_REG_NVIC_BFAR           (*((CPU_REG32 *)(0xE000ED38)))             /* Bus Fault  Addr Reg.                 */
+#define  CPU_REG_NVIC_AFSR           (*((CPU_REG32 *)(0xE000ED3C)))             /* Aux Fault Status Reg.                */
+
+#define  CPU_REG_NVIC_PFR0           (*((CPU_REG32 *)(0xE000ED40)))             /* Processor Feature Reg 0.             */
+#define  CPU_REG_NVIC_PFR1           (*((CPU_REG32 *)(0xE000ED44)))             /* Processor Feature Reg 1.             */
+#define  CPU_REG_NVIC_DFR0           (*((CPU_REG32 *)(0xE000ED48)))             /* Debug     Feature Reg 0.             */
+#define  CPU_REG_NVIC_AFR0           (*((CPU_REG32 *)(0xE000ED4C)))             /* Aux       Feature Reg 0.             */
+#define  CPU_REG_NVIC_MMFR0          (*((CPU_REG32 *)(0xE000ED50)))             /* Memory Model Feature Reg 0.          */
+#define  CPU_REG_NVIC_MMFR1          (*((CPU_REG32 *)(0xE000ED54)))             /* Memory Model Feature Reg 1.          */
+#define  CPU_REG_NVIC_MMFR2          (*((CPU_REG32 *)(0xE000ED58)))             /* Memory Model Feature Reg 2.          */
+#define  CPU_REG_NVIC_MMFR3          (*((CPU_REG32 *)(0xE000ED5C)))             /* Memory Model Feature Reg 3.          */
+#define  CPU_REG_NVIC_ISAFR0         (*((CPU_REG32 *)(0xE000ED60)))             /* ISA Feature Reg 0.                   */
+#define  CPU_REG_NVIC_ISAFR1         (*((CPU_REG32 *)(0xE000ED64)))             /* ISA Feature Reg 1.                   */
+#define  CPU_REG_NVIC_ISAFR2         (*((CPU_REG32 *)(0xE000ED68)))             /* ISA Feature Reg 2.                   */
+#define  CPU_REG_NVIC_ISAFR3         (*((CPU_REG32 *)(0xE000ED6C)))             /* ISA Feature Reg 3.                   */
+#define  CPU_REG_NVIC_ISAFR4         (*((CPU_REG32 *)(0xE000ED70)))             /* ISA Feature Reg 4.                   */
+#define  CPU_REG_NVIC_SW_TRIG        (*((CPU_REG32 *)(0xE000EF00)))             /* Software Trigger Int Reg.            */
+
+#define  CPU_REG_MPU_TYPE            (*((CPU_REG32 *)(0xE000ED90)))             /* MPU Type Reg.                        */
+#define  CPU_REG_MPU_CTRL            (*((CPU_REG32 *)(0xE000ED94)))             /* MPU Ctrl Reg.                        */
+#define  CPU_REG_MPU_REG_NBR         (*((CPU_REG32 *)(0xE000ED98)))             /* MPU Region Nbr Reg.                  */
+#define  CPU_REG_MPU_REG_BASE        (*((CPU_REG32 *)(0xE000ED9C)))             /* MPU Region Base Addr Reg.            */
+#define  CPU_REG_MPU_REG_ATTR        (*((CPU_REG32 *)(0xE000EDA0)))             /* MPU Region Attrib & Size Reg.        */
+
+#define  CPU_REG_DBG_CTRL            (*((CPU_REG32 *)(0xE000EDF0)))             /* Debug Halting Ctrl & Status Reg.     */
+#define  CPU_REG_DBG_SELECT          (*((CPU_REG32 *)(0xE000EDF4)))             /* Debug Core Reg Selector Reg.         */
+#define  CPU_REG_DBG_DATA            (*((CPU_REG32 *)(0xE000EDF8)))             /* Debug Core Reg Data     Reg.         */
+#define  CPU_REG_DBG_INT             (*((CPU_REG32 *)(0xE000EDFC)))             /* Debug Except & Monitor Ctrl Reg.     */
+
+
+/*
+*********************************************************************************************************
+*                                          CPU REGISTER BITS
+*********************************************************************************************************
+*/
+
+                                                                /* ---------- SYSTICK CTRL & STATUS REG BITS ---------- */
+#define  CPU_REG_NVIC_ST_CTRL_COUNTFLAG           0x00010000
+#define  CPU_REG_NVIC_ST_CTRL_CLKSOURCE           0x00000004
+#define  CPU_REG_NVIC_ST_CTRL_TICKINT             0x00000002
+#define  CPU_REG_NVIC_ST_CTRL_ENABLE              0x00000001
+
+
+                                                                /* -------- SYSTICK CALIBRATION VALUE REG BITS -------- */
+#define  CPU_REG_NVIC_ST_CAL_NOREF                0x80000000
+#define  CPU_REG_NVIC_ST_CAL_SKEW                 0x40000000
+
+                                                                /* -------------- INT CTRL STATE REG BITS ------------- */
+#define  CPU_REG_NVIC_ICSR_NMIPENDSET             0x80000000
+#define  CPU_REG_NVIC_ICSR_PENDSVSET              0x10000000
+#define  CPU_REG_NVIC_ICSR_PENDSVCLR              0x08000000
+#define  CPU_REG_NVIC_ICSR_PENDSTSET              0x04000000
+#define  CPU_REG_NVIC_ICSR_PENDSTCLR              0x02000000
+#define  CPU_REG_NVIC_ICSR_ISRPREEMPT             0x00800000
+#define  CPU_REG_NVIC_ICSR_ISRPENDING             0x00400000
+#define  CPU_REG_NVIC_ICSR_RETTOBASE              0x00000800
+
+                                                                /* ------------- VECT TBL OFFSET REG BITS ------------- */
+#define  CPU_REG_NVIC_VTOR_TBLBASE                0x20000000
+
+                                                                /* ------------ APP INT/RESET CTRL REG BITS ----------- */
+#define  CPU_REG_NVIC_AIRCR_ENDIANNESS            0x00008000
+#define  CPU_REG_NVIC_AIRCR_SYSRESETREQ           0x00000004
+#define  CPU_REG_NVIC_AIRCR_VECTCLRACTIVE         0x00000002
+#define  CPU_REG_NVIC_AIRCR_VECTRESET             0x00000001
+
+                                                                /* --------------- SYSTEM CTRL REG BITS --------------- */
+#define  CPU_REG_NVIC_SCR_SEVONPEND               0x00000010
+#define  CPU_REG_NVIC_SCR_SLEEPDEEP               0x00000004
+#define  CPU_REG_NVIC_SCR_SLEEPONEXIT             0x00000002
+
+                                                                /* ----------------- CFG CTRL REG BITS ---------------- */
+#define  CPU_REG_NVIC_CCR_STKALIGN                0x00000200
+#define  CPU_REG_NVIC_CCR_BFHFNMIGN               0x00000100
+#define  CPU_REG_NVIC_CCR_DIV_0_TRP               0x00000010
+#define  CPU_REG_NVIC_CCR_UNALIGN_TRP             0x00000008
+#define  CPU_REG_NVIC_CCR_USERSETMPEND            0x00000002
+#define  CPU_REG_NVIC_CCR_NONBASETHRDENA          0x00000001
+
+                                                                /* ------- SYSTEM HANDLER CTRL & STATE REG BITS ------- */
+#define  CPU_REG_NVIC_SHCSR_USGFAULTENA           0x00040000
+#define  CPU_REG_NVIC_SHCSR_BUSFAULTENA           0x00020000
+#define  CPU_REG_NVIC_SHCSR_MEMFAULTENA           0x00010000
+#define  CPU_REG_NVIC_SHCSR_SVCALLPENDED          0x00008000
+#define  CPU_REG_NVIC_SHCSR_BUSFAULTPENDED        0x00004000
+#define  CPU_REG_NVIC_SHCSR_MEMFAULTPENDED        0x00002000
+#define  CPU_REG_NVIC_SHCSR_USGFAULTPENDED        0x00001000
+#define  CPU_REG_NVIC_SHCSR_SYSTICKACT            0x00000800
+#define  CPU_REG_NVIC_SHCSR_PENDSVACT             0x00000400
+#define  CPU_REG_NVIC_SHCSR_MONITORACT            0x00000100
+#define  CPU_REG_NVIC_SHCSR_SVCALLACT             0x00000080
+#define  CPU_REG_NVIC_SHCSR_USGFAULTACT           0x00000008
+#define  CPU_REG_NVIC_SHCSR_BUSFAULTACT           0x00000002
+#define  CPU_REG_NVIC_SHCSR_MEMFAULTACT           0x00000001
+
+                                                                /* -------- CONFIGURABLE FAULT STATUS REG BITS -------- */
+#define  CPU_REG_NVIC_CFSR_DIVBYZERO              0x02000000
+#define  CPU_REG_NVIC_CFSR_UNALIGNED              0x01000000
+#define  CPU_REG_NVIC_CFSR_NOCP                   0x00080000
+#define  CPU_REG_NVIC_CFSR_INVPC                  0x00040000
+#define  CPU_REG_NVIC_CFSR_INVSTATE               0x00020000
+#define  CPU_REG_NVIC_CFSR_UNDEFINSTR             0x00010000
+#define  CPU_REG_NVIC_CFSR_BFARVALID              0x00008000
+#define  CPU_REG_NVIC_CFSR_STKERR                 0x00001000
+#define  CPU_REG_NVIC_CFSR_UNSTKERR               0x00000800
+#define  CPU_REG_NVIC_CFSR_IMPRECISERR            0x00000400
+#define  CPU_REG_NVIC_CFSR_PRECISERR              0x00000200
+#define  CPU_REG_NVIC_CFSR_IBUSERR                0x00000100
+#define  CPU_REG_NVIC_CFSR_MMARVALID              0x00000080
+#define  CPU_REG_NVIC_CFSR_MSTKERR                0x00000010
+#define  CPU_REG_NVIC_CFSR_MUNSTKERR              0x00000008
+#define  CPU_REG_NVIC_CFSR_DACCVIOL               0x00000002
+#define  CPU_REG_NVIC_CFSR_IACCVIOL               0x00000001
+
+                                                                /* ------------ HARD FAULT STATUS REG BITS ------------ */
+#define  CPU_REG_NVIC_HFSR_DEBUGEVT               0x80000000
+#define  CPU_REG_NVIC_HFSR_FORCED                 0x40000000
+#define  CPU_REG_NVIC_HFSR_VECTTBL                0x00000002
+
+                                                                /* ------------ DEBUG FAULT STATUS REG BITS ----------- */
+#define  CPU_REG_NVIC_DFSR_EXTERNAL               0x00000010
+#define  CPU_REG_NVIC_DFSR_VCATCH                 0x00000008
+#define  CPU_REG_NVIC_DFSR_DWTTRAP                0x00000004
+#define  CPU_REG_NVIC_DFSR_BKPT                   0x00000002
+#define  CPU_REG_NVIC_DFSR_HALTED                 0x00000001
+
+
+/*
+*********************************************************************************************************
+*                                          CPU REGISTER MASK
+*********************************************************************************************************
+*/
+
+#define  CPU_MSK_NVIC_ICSR_VECT_ACTIVE            0x000001FF
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_CFG_ADDR_SIZE
+#error  "CPU_CFG_ADDR_SIZE              not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_ADDR_SIZE        illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+#ifndef  CPU_CFG_DATA_SIZE
+#error  "CPU_CFG_DATA_SIZE              not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_DATA_SIZE        illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+#ifndef  CPU_CFG_DATA_SIZE_MAX
+#error  "CPU_CFG_DATA_SIZE_MAX          not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_DATA_SIZE_MAX    illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+
+#if     (CPU_CFG_DATA_SIZE_MAX < CPU_CFG_DATA_SIZE)
+#error  "CPU_CFG_DATA_SIZE_MAX    illegally #define'd in 'cpu.h' "
+#error  "                         [MUST be  >= CPU_CFG_DATA_SIZE]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_ENDIAN_TYPE
+#error  "CPU_CFG_ENDIAN_TYPE            not #define'd in 'cpu.h'   "
+#error  "                         [MUST be  CPU_ENDIAN_TYPE_BIG   ]"
+#error  "                         [     ||  CPU_ENDIAN_TYPE_LITTLE]"
+
+#elif  ((CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_BIG   ) && \
+        (CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_LITTLE))
+#error  "CPU_CFG_ENDIAN_TYPE      illegally #define'd in 'cpu.h'   "
+#error  "                         [MUST be  CPU_ENDIAN_TYPE_BIG   ]"
+#error  "                         [     ||  CPU_ENDIAN_TYPE_LITTLE]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_STK_GROWTH
+#error  "CPU_CFG_STK_GROWTH             not #define'd in 'cpu.h'    "
+#error  "                         [MUST be  CPU_STK_GROWTH_LO_TO_HI]"
+#error  "                         [     ||  CPU_STK_GROWTH_HI_TO_LO]"
+
+#elif  ((CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_LO_TO_HI) && \
+        (CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_HI_TO_LO))
+#error  "CPU_CFG_STK_GROWTH       illegally #define'd in 'cpu.h'    "
+#error  "                         [MUST be  CPU_STK_GROWTH_LO_TO_HI]"
+#error  "                         [     ||  CPU_STK_GROWTH_HI_TO_LO]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_CRITICAL_METHOD
+#error  "CPU_CFG_CRITICAL_METHOD        not #define'd in 'cpu.h'             "
+#error  "                         [MUST be  CPU_CRITICAL_METHOD_INT_DIS_EN  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_STK  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_LOCAL]"
+
+#elif  ((CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_INT_DIS_EN  ) && \
+        (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_STK  ) && \
+        (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_LOCAL))
+#error  "CPU_CFG_CRITICAL_METHOD  illegally #define'd in 'cpu.h'             "
+#error  "                         [MUST be  CPU_CRITICAL_METHOD_INT_DIS_EN  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_STK  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_LOCAL]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'cpu.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif                                                          /* End of CPU module include.                           */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-M7/GNU/cpu_a.S b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-M7/GNU/cpu_a.S
new file mode 100644
index 0000000..7a41e51
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-M7/GNU/cpu_a.S
@@ -0,0 +1,290 @@
+@********************************************************************************************************
+@                                                uC/CPU
+@                                    CPU CONFIGURATION & PORT LAYER
+@
+@                          (c) Copyright 2004-2016; Micrium, Inc.; Weston, FL
+@
+@               All rights reserved.  Protected by international copyright laws.
+@
+@               uC/CPU is provided in source form to registered licensees ONLY.  It is
+@               illegal to distribute this source code to any third party unless you receive
+@               written permission by an authorized Micrium representative.  Knowledge of
+@               the source code may NOT be used to develop a similar product.
+@
+@               Please help us continue to provide the Embedded community with the finest
+@               software available.  Your honesty is greatly appreciated.
+@
+@               You can find our product's user manual, API reference, release notes and
+@               more information at https://doc.micrium.com.
+@               You can contact us at www.micrium.com.
+@********************************************************************************************************
+
+@********************************************************************************************************
+@
+@                                            CPU PORT FILE
+@
+@                                            ARM-Cortex-M4
+@                                            GNU C Compiler
+@
+@ Filename      : cpu_a.asm
+@ Version       : V1.31.00
+@ Programmer(s) : JJL
+@********************************************************************************************************
+
+
+@********************************************************************************************************
+@                                           PUBLIC FUNCTIONS
+@********************************************************************************************************
+
+        .global  CPU_IntDis
+        .global  CPU_IntEn
+
+        .global  CPU_SR_Save
+        .global  CPU_SR_Restore
+
+        .global  CPU_WaitForInt
+        .global  CPU_WaitForExcept
+
+
+        .global  CPU_CntLeadZeros
+        .global  CPU_CntTrailZeros
+        .global  CPU_RevBits
+
+
+@********************************************************************************************************
+@                                      CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+.text
+.align 2
+.syntax unified
+
+
+@********************************************************************************************************
+@                                    DISABLE and ENABLE INTERRUPTS
+@
+@ Description: Disable/Enable interrupts.
+@
+@ Prototypes : void  CPU_IntDis(void);
+@              void  CPU_IntEn (void);
+@********************************************************************************************************
+
+.thumb_func
+CPU_IntDis:
+        CPSID   I
+        BX      LR
+
+.thumb_func
+CPU_IntEn:
+        CPSIE   I
+        BX      LR
+
+
+@********************************************************************************************************
+@                                      CRITICAL SECTION FUNCTIONS
+@
+@ Description : Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking, the
+@               state of the interrupt disable flag is stored in the local variable 'cpu_sr' & interrupts
+@               are then disabled ('cpu_sr' is allocated in all functions that need to disable interrupts).
+@               The previous interrupt state is restored by copying 'cpu_sr' into the CPU's status register.
+@
+@ Prototypes  : CPU_SR  CPU_SR_Save   (void);
+@               void    CPU_SR_Restore(CPU_SR  cpu_sr);
+@
+@ Note(s)     : (1) These functions are used in general like this :
+@
+@                       void  Task (void  *p_arg)
+@                       {
+@                           CPU_SR_ALLOC();                     /* Allocate storage for CPU status register */
+@                               :
+@                               :
+@                           CPU_CRITICAL_ENTER();               /* cpu_sr = CPU_SR_Save();                  */
+@                               :
+@                               :
+@                           CPU_CRITICAL_EXIT();                /* CPU_SR_Restore(cpu_sr);                  */
+@                               :
+@                       }
+@********************************************************************************************************
+
+.thumb_func
+CPU_SR_Save:
+        MRS     R0, PRIMASK                     @ Set prio int mask to mask all (except faults)
+        CPSID   I
+        BX      LR
+
+.thumb_func
+CPU_SR_Restore:                                  @ See Note #2.
+        MSR     PRIMASK, R0
+        BX      LR
+
+
+@********************************************************************************************************
+@                                         WAIT FOR INTERRUPT
+@
+@ Description : Enters sleep state, which will be exited when an interrupt is received.
+@
+@ Prototypes  : void  CPU_WaitForInt (void)
+@
+@ Argument(s) : none.
+@********************************************************************************************************
+
+.thumb_func
+CPU_WaitForInt:
+        WFI                                     @ Wait for interrupt
+        BX      LR
+
+
+@********************************************************************************************************
+@                                         WAIT FOR EXCEPTION
+@
+@ Description : Enters sleep state, which will be exited when an exception is received.
+@
+@ Prototypes  : void  CPU_WaitForExcept (void)
+@
+@ Argument(s) : none.
+@********************************************************************************************************
+
+.thumb_func
+CPU_WaitForExcept:
+        WFE                                     @ Wait for exception
+        BX      LR
+
+
+@********************************************************************************************************
+@                                         CPU_CntLeadZeros()
+@                                        COUNT LEADING ZEROS
+@
+@ Description : Counts the number of contiguous, most-significant, leading zero bits before the
+@                   first binary one bit in a data value.
+@
+@ Prototype   : CPU_DATA  CPU_CntLeadZeros(CPU_DATA  val);
+@
+@ Argument(s) : val         Data value to count leading zero bits.
+@
+@ Return(s)   : Number of contiguous, most-significant, leading zero bits in 'val'.
+@
+@ Caller(s)   : Application.
+@
+@               This function is an INTERNAL CPU module function but MAY be called by application
+@               function(s).
+@
+@ Note(s)     : (1) (a) Supports 32-bit data value size as configured by 'CPU_DATA' (see 'cpu.h
+@                       CPU WORD CONFIGURATION  Note #1').
+@
+@                   (b) For 32-bit values :
+@
+@                             b31  b30  b29  ...  b04  b03  b02  b01  b00    # Leading Zeros
+@                             ---  ---  ---       ---  ---  ---  ---  ---    ---------------
+@                              1    x    x         x    x    x    x    x            0
+@                              0    1    x         x    x    x    x    x            1
+@                              0    0    1         x    x    x    x    x            2
+@                              :    :    :         :    :    :    :    :            :
+@                              :    :    :         :    :    :    :    :            :
+@                              0    0    0         1    x    x    x    x           27
+@                              0    0    0         0    1    x    x    x           28
+@                              0    0    0         0    0    1    x    x           29
+@                              0    0    0         0    0    0    1    x           30
+@                              0    0    0         0    0    0    0    1           31
+@                              0    0    0         0    0    0    0    0           32
+@
+@
+@               (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_LEAD_ZEROS_ASM_PRESENT is
+@                   #define'd in 'cpu_cfg.h' or 'cpu.h'.
+@********************************************************************************************************
+
+.thumb_func
+CPU_CntLeadZeros:
+        CLZ     R0, R0                          @ Count leading zeros
+        BX      LR
+
+
+@********************************************************************************************************
+@                                         CPU_CntTrailZeros()
+@                                        COUNT TRAILING ZEROS
+@
+@ Description : Counts the number of contiguous, least-significant, trailing zero bits before the
+@                   first binary one bit in a data value.
+@
+@ Prototype   : CPU_DATA  CPU_CntTrailZeros(CPU_DATA  val);
+@
+@ Argument(s) : val         Data value to count trailing zero bits.
+@
+@ Return(s)   : Number of contiguous, least-significant, trailing zero bits in 'val'.
+@
+@ Caller(s)   : Application.
+@
+@               This function is an INTERNAL CPU module function but MAY be called by application
+@               function(s).
+@
+@ Note(s)     : (1) (a) Supports 32-bit data value size as configured by 'CPU_DATA' (see 'cpu.h
+@                       CPU WORD CONFIGURATION  Note #1').
+@
+@                   (b) For 32-bit values :
+@
+@                             b31  b30  b29  b28  b27  ...  b02  b01  b00    # Trailing Zeros
+@                             ---  ---  ---  ---  ---       ---  ---  ---    ----------------
+@                              x    x    x    x    x         x    x    1            0
+@                              x    x    x    x    x         x    1    0            1
+@                              x    x    x    x    x         1    0    0            2
+@                              :    :    :    :    :         :    :    :            :
+@                              :    :    :    :    :         :    :    :            :
+@                              x    x    x    x    1         0    0    0           27
+@                              x    x    x    1    0         0    0    0           28
+@                              x    x    1    0    0         0    0    0           29
+@                              x    1    0    0    0         0    0    0           30
+@                              1    0    0    0    0         0    0    0           31
+@                              0    0    0    0    0         0    0    0           32
+@
+@
+@               (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT is
+@                   #define'd in 'cpu_cfg.h' or 'cpu.h'.
+@********************************************************************************************************
+
+.thumb_func
+CPU_CntTrailZeros:
+        RBIT    R0, R0                          @ Reverse bits
+        CLZ     R0, R0                          @ Count trailing zeros
+        BX      LR
+
+
+@********************************************************************************************************
+@                                            CPU_RevBits()
+@                                            REVERSE BITS
+@
+@ Description : Reverses the bits in a data value.
+@
+@ Prototypes  : CPU_DATA  CPU_RevBits(CPU_DATA  val);
+@
+@ Argument(s) : val         Data value to reverse bits.
+@
+@ Return(s)   : Value with all bits in 'val' reversed (see Note #1).
+@
+@ Caller(s)   : Application.
+@
+@               This function is an INTERNAL CPU module function but MAY be called by application function(s).
+@
+@ Note(s)     : (1) The final, reversed data value for 'val' is such that :
+@
+@                       'val's final bit  0       =  'val's original bit  N
+@                       'val's final bit  1       =  'val's original bit (N - 1)
+@                       'val's final bit  2       =  'val's original bit (N - 2)
+@
+@                               ...                           ...
+@
+@                       'val's final bit (N - 2)  =  'val's original bit  2
+@                       'val's final bit (N - 1)  =  'val's original bit  1
+@                       'val's final bit  N       =  'val's original bit  0
+@********************************************************************************************************
+
+.thumb_func
+CPU_RevBits:
+        RBIT    R0, R0                          @ Reverse bits
+        BX      LR
+
+
+@********************************************************************************************************
+@                                     CPU ASSEMBLY PORT FILE END
+@********************************************************************************************************
+
+.end
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-M7/GNU/cpu_c.c b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-M7/GNU/cpu_c.c
new file mode 100644
index 0000000..dec900f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/ARM-Cortex-M7/GNU/cpu_c.c
@@ -0,0 +1,749 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2016; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            CPU PORT FILE
+*
+*                                            ARM-Cortex-M4
+*                                            GNU C Compiler
+*
+* Filename      : cpu_c.c
+* Version       : V1.31.00
+* Programmer(s) : JJL
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define   MICRIUM_SOURCE
+#include  
+#include  
+
+#include  
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  CPU_INT_SRC_POS_MAX                  ((((CPU_REG_NVIC_NVIC + 1) & 0x1F) * 32) + 16)
+
+#define  CPU_BIT_BAND_SRAM_REG_LO                 0x20000000
+#define  CPU_BIT_BAND_SRAM_REG_HI                 0x200FFFFF
+#define  CPU_BIT_BAND_SRAM_BASE                   0x22000000
+
+
+#define  CPU_BIT_BAND_PERIPH_REG_LO               0x40000000
+#define  CPU_BIT_BAND_PERIPH_REG_HI               0x400FFFFF
+#define  CPU_BIT_BAND_PERIPH_BASE                 0x42000000
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CPU_BitBandClr()
+*
+* Description : Clear bit in bit-band region.
+*
+* Argument(s) : addr            Byte address in memory space.
+*
+*               bit_nbr         Bit number in byte.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  CPU_BitBandClr (CPU_ADDR    addr,
+                      CPU_INT08U  bit_nbr)
+{
+    CPU_ADDR  bit_word_off;
+    CPU_ADDR  bit_word_addr;
+
+
+    if ((addr >= CPU_BIT_BAND_SRAM_REG_LO) &&
+        (addr <= CPU_BIT_BAND_SRAM_REG_HI)) {
+        bit_word_off  = ((addr - CPU_BIT_BAND_SRAM_REG_LO  ) * 32) + (bit_nbr * 4);
+        bit_word_addr = CPU_BIT_BAND_SRAM_BASE   + bit_word_off;
+
+      *(volatile CPU_INT32U *)(bit_word_addr) = 0;
+
+    } else if ((addr >= CPU_BIT_BAND_PERIPH_REG_LO) &&
+               (addr <= CPU_BIT_BAND_PERIPH_REG_HI)) {
+        bit_word_off  = ((addr - CPU_BIT_BAND_PERIPH_REG_LO) * 32) + (bit_nbr * 4);
+        bit_word_addr = CPU_BIT_BAND_PERIPH_BASE + bit_word_off;
+
+      *(volatile CPU_INT32U *)(bit_word_addr) = 0;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          CPU_BitBandSet()
+*
+* Description : Set bit in bit-band region.
+*
+* Argument(s) : addr            Byte address in memory space.
+*
+*               bit_nbr         Bit number in byte.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  CPU_BitBandSet (CPU_ADDR    addr,
+                      CPU_INT08U  bit_nbr)
+{
+    CPU_ADDR  bit_word_off;
+    CPU_ADDR  bit_word_addr;
+
+
+    if ((addr >= CPU_BIT_BAND_SRAM_REG_LO) &&
+        (addr <= CPU_BIT_BAND_SRAM_REG_HI)) {
+        bit_word_off  = ((addr - CPU_BIT_BAND_SRAM_REG_LO  ) * 32) + (bit_nbr * 4);
+        bit_word_addr = CPU_BIT_BAND_SRAM_BASE   + bit_word_off;
+
+      *(volatile CPU_INT32U *)(bit_word_addr) = 1;
+
+    } else if ((addr >= CPU_BIT_BAND_PERIPH_REG_LO) &&
+               (addr <= CPU_BIT_BAND_PERIPH_REG_HI)) {
+        bit_word_off  = ((addr - CPU_BIT_BAND_PERIPH_REG_LO) * 32) + (bit_nbr * 4);
+        bit_word_addr = CPU_BIT_BAND_PERIPH_BASE + bit_word_off;
+
+      *(volatile CPU_INT32U *)(bit_word_addr) = 1;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_IntSrcDis()
+*
+* Description : Disable an interrupt source.
+*
+* Argument(s) : pos     Position of interrupt vector in interrupt table :
+*
+*                           0       Invalid (see Note #1a).
+*                           1       Invalid (see Note #1b).
+*                           2       Non-maskable interrupt.
+*                           3       Hard Fault.
+*                           4       Memory Management.
+*                           5       Bus Fault.
+*                           6       Usage Fault.
+*                           7-10    Reserved.
+*                           11      SVCall
+*                           12      Debug monitor.
+*                           13      Reserved
+*                           14      PendSV.
+*                           15      SysTick.
+*                           16+     External Interrupt.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Several table positions do not contain interrupt sources :
+*
+*                   (a) Position 0 contains the stack pointer.
+*                   (b) Positions 7-10, 13 are reserved.
+*
+*               (2) Several interrupts cannot be disabled/enabled :
+*
+*                   (a) Reset.
+*                   (b) NMI.
+*                   (c) Hard fault.
+*                   (d) SVCall.
+*                   (e) Debug monitor.
+*                   (f) PendSV.
+*
+*               (3) The maximum Cortex-M4 table position is 256.  A particular Cortex-M4 may have fewer
+*                   than 240 external exceptions and, consequently, fewer than 256 table positions.
+*                   This function assumes that the specified table position is valid if the interrupt
+*                   controller type register's INTLINESNUM field is large enough so that the position
+*                   COULD be valid.
+*********************************************************************************************************
+*/
+
+void  CPU_IntSrcDis (CPU_INT08U  pos)
+{
+    CPU_INT08U  group;
+    CPU_INT08U  pos_max;
+    CPU_INT08U  nbr;
+    CPU_SR_ALLOC();
+
+
+    switch (pos) {
+        case CPU_INT_STK_PTR:                                   /* ---------------- INVALID OR RESERVED --------------- */
+        case CPU_INT_RSVD_07:
+        case CPU_INT_RSVD_08:
+        case CPU_INT_RSVD_09:
+        case CPU_INT_RSVD_10:
+        case CPU_INT_RSVD_13:
+             break;
+
+
+                                                                /* ----------------- SYSTEM EXCEPTIONS ---------------- */
+        case CPU_INT_RESET:                                     /* Reset (see Note #2).                                 */
+        case CPU_INT_NMI:                                       /* Non-maskable interrupt (see Note #2).                */
+        case CPU_INT_HFAULT:                                    /* Hard fault (see Note #2).                            */
+        case CPU_INT_SVCALL:                                    /* SVCall (see Note #2).                                */
+        case CPU_INT_DBGMON:                                    /* Debug monitor (see Note #2).                         */
+        case CPU_INT_PENDSV:                                    /* PendSV (see Note #2).                                */
+             break;
+
+        case CPU_INT_MEM:                                       /* Memory management.                                   */
+             CPU_CRITICAL_ENTER();
+             CPU_REG_NVIC_SHCSR &= ~CPU_REG_NVIC_SHCSR_MEMFAULTENA;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_BUSFAULT:                                  /* Bus fault.                                           */
+             CPU_CRITICAL_ENTER();
+             CPU_REG_NVIC_SHCSR &= ~CPU_REG_NVIC_SHCSR_BUSFAULTENA;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_USAGEFAULT:                                /* Usage fault.                                         */
+             CPU_CRITICAL_ENTER();
+             CPU_REG_NVIC_SHCSR &= ~CPU_REG_NVIC_SHCSR_USGFAULTENA;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_SYSTICK:                                   /* SysTick.                                             */
+             CPU_CRITICAL_ENTER();
+             CPU_REG_NVIC_ST_CTRL &= ~CPU_REG_NVIC_ST_CTRL_ENABLE;
+             CPU_CRITICAL_EXIT();
+             break;
+
+
+                                                                /* ---------------- EXTERNAL INTERRUPT ---------------- */
+        default:
+            pos_max = CPU_INT_SRC_POS_MAX;
+            if (pos < pos_max) {                                /* See Note #3.                                         */
+                 group = (pos - 16) / 32;
+                 nbr   = (pos - 16) % 32;
+
+                 CPU_CRITICAL_ENTER();
+                 CPU_REG_NVIC_CLREN(group) = DEF_BIT(nbr);
+                 CPU_CRITICAL_EXIT();
+             }
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_IntSrcEn()
+*
+* Description : Enable an interrupt source.
+*
+* Argument(s) : pos     Position of interrupt vector in interrupt table (see 'CPU_IntSrcDis()').
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) See 'CPU_IntSrcDis()  Note #1'.
+*
+*               (2) See 'CPU_IntSrcDis()  Note #2'.
+*
+*               (3) See 'CPU_IntSrcDis()  Note #3'.
+*********************************************************************************************************
+*/
+
+void  CPU_IntSrcEn (CPU_INT08U  pos)
+{
+    CPU_INT08U  group;
+    CPU_INT08U  nbr;
+    CPU_INT08U  pos_max;
+    CPU_SR_ALLOC();
+
+
+    switch (pos) {
+        case CPU_INT_STK_PTR:                                   /* ---------------- INVALID OR RESERVED --------------- */
+        case CPU_INT_RSVD_07:
+        case CPU_INT_RSVD_08:
+        case CPU_INT_RSVD_09:
+        case CPU_INT_RSVD_10:
+        case CPU_INT_RSVD_13:
+             break;
+
+
+                                                                /* ----------------- SYSTEM EXCEPTIONS ---------------- */
+        case CPU_INT_RESET:                                     /* Reset (see Note #2).                                 */
+        case CPU_INT_NMI:                                       /* Non-maskable interrupt (see Note #2).                */
+        case CPU_INT_HFAULT:                                    /* Hard fault (see Note #2).                            */
+        case CPU_INT_SVCALL:                                    /* SVCall (see Note #2).                                */
+        case CPU_INT_DBGMON:                                    /* Debug monitor (see Note #2).                         */
+        case CPU_INT_PENDSV:                                    /* PendSV (see Note #2).                                */
+             break;
+
+        case CPU_INT_MEM:                                       /* Memory management.                                   */
+             CPU_CRITICAL_ENTER();
+             CPU_REG_NVIC_SHCSR |= CPU_REG_NVIC_SHCSR_MEMFAULTENA;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_BUSFAULT:                                  /* Bus fault.                                           */
+             CPU_CRITICAL_ENTER();
+             CPU_REG_NVIC_SHCSR |= CPU_REG_NVIC_SHCSR_BUSFAULTENA;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_USAGEFAULT:                                /* Usage fault.                                         */
+             CPU_CRITICAL_ENTER();
+             CPU_REG_NVIC_SHCSR |= CPU_REG_NVIC_SHCSR_USGFAULTENA;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_SYSTICK:                                   /* SysTick.                                             */
+             CPU_CRITICAL_ENTER();
+             CPU_REG_NVIC_ST_CTRL |= CPU_REG_NVIC_ST_CTRL_ENABLE;
+             CPU_CRITICAL_EXIT();
+             break;
+
+
+                                                                /* ---------------- EXTERNAL INTERRUPT ---------------- */
+        default:
+            pos_max = CPU_INT_SRC_POS_MAX;
+            if (pos < pos_max) {                                /* See Note #3.                                         */
+                 group = (pos - 16) / 32;
+                 nbr   = (pos - 16) % 32;
+
+                 CPU_CRITICAL_ENTER();
+                 CPU_REG_NVIC_SETEN(group) = DEF_BIT(nbr);
+                 CPU_CRITICAL_EXIT();
+             }
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_IntSrcPendClr()
+*
+* Description : Clear a pending interrupt.
+*
+* Argument(s) : pos     Position of interrupt vector in interrupt table (see 'CPU_IntSrcDis()').
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) See 'CPU_IntSrcDis()  Note #1'.
+*
+*               (2) The pending status of several interrupts cannot be clear/set :
+*
+*                   (a) Reset.
+*                   (b) NMI.
+*                   (c) Hard fault.
+*                   (d) Memory Managment.
+*                   (e) Bus Fault.
+*                   (f) Usage Fault.
+*                   (g) SVCall.
+*                   (h) Debug monitor.
+*                   (i) PendSV.
+*                   (j) Systick 
+*
+*               (3) See 'CPU_IntSrcDis()  Note #3'.
+*********************************************************************************************************
+*/
+
+void  CPU_IntSrcPendClr (CPU_INT08U  pos)
+
+{
+    CPU_INT08U  group;
+    CPU_INT08U  nbr;
+    CPU_INT08U  pos_max;
+    CPU_SR_ALLOC();
+
+
+    switch (pos) {
+        case CPU_INT_STK_PTR:                                   /* ---------------- INVALID OR RESERVED --------------- */
+        case CPU_INT_RSVD_07:
+        case CPU_INT_RSVD_08:
+        case CPU_INT_RSVD_09:
+        case CPU_INT_RSVD_10:
+        case CPU_INT_RSVD_13:
+             break;
+                                                                /* ----------------- SYSTEM EXCEPTIONS ---------------- */
+        case CPU_INT_RESET:                                     /* Reset (see Note #2).                                 */
+        case CPU_INT_NMI:                                       /* Non-maskable interrupt (see Note #2).                */
+        case CPU_INT_HFAULT:                                    /* Hard fault (see Note #2).                            */
+        case CPU_INT_MEM:                                       /* Memory management (see Note #2).                     */
+        case CPU_INT_SVCALL:                                    /* SVCall (see Note #2).                                */
+        case CPU_INT_DBGMON:                                    /* Debug monitor (see Note #2).                         */
+        case CPU_INT_PENDSV:                                    /* PendSV (see Note #2).                                */
+        case CPU_INT_BUSFAULT:                                  /* Bus fault.                                           */
+        case CPU_INT_USAGEFAULT:                                /* Usage fault.                                         */
+        case CPU_INT_SYSTICK:                                   /* SysTick.                                             */
+             break;
+                                                                /* ---------------- EXTERNAL INTERRUPT ---------------- */
+        default:
+            pos_max = CPU_INT_SRC_POS_MAX;
+            if (pos < pos_max) {                                /* See Note #3.                                         */
+                 group = (pos - 16) / 32;
+                 nbr   = (pos - 16) % 32;
+
+                 CPU_CRITICAL_ENTER();
+                 CPU_REG_NVIC_CLRPEND(group) = DEF_BIT(nbr);
+                 CPU_CRITICAL_EXIT();
+             }
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_IntSrcPrioSet()
+*
+* Description : Set priority of an interrupt source.
+*
+* Argument(s) : pos     Position of interrupt vector in interrupt table (see 'CPU_IntSrcDis()').
+*
+*               prio    Priority.  Use a lower priority number for a higher priority.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) See 'CPU_IntSrcDis()  Note #1'.
+*
+*               (2) Several interrupts priorities CANNOT be set :
+*
+*                   (a) Reset (always -3).
+*                   (b) NMI (always -2).
+*                   (c) Hard fault (always -1).
+*
+*               (3) See 'CPU_IntSrcDis()  Note #3'.
+*********************************************************************************************************
+*/
+
+void  CPU_IntSrcPrioSet (CPU_INT08U  pos,
+                         CPU_INT08U  prio)
+{
+    CPU_INT08U  group;
+    CPU_INT08U  nbr;
+    CPU_INT08U  pos_max;
+    CPU_INT32U  temp;
+    CPU_SR_ALLOC();
+
+
+    switch (pos) {
+        case CPU_INT_STK_PTR:                                   /* ---------------- INVALID OR RESERVED --------------- */
+        case CPU_INT_RSVD_07:
+        case CPU_INT_RSVD_08:
+        case CPU_INT_RSVD_09:
+        case CPU_INT_RSVD_10:
+        case CPU_INT_RSVD_13:
+             break;
+
+
+                                                                /* ----------------- SYSTEM EXCEPTIONS ---------------- */
+        case CPU_INT_RESET:                                     /* Reset (see Note #2).                                 */
+        case CPU_INT_NMI:                                       /* Non-maskable interrupt (see Note #2).                */
+        case CPU_INT_HFAULT:                                    /* Hard fault (see Note #2).                            */
+             break;
+
+        case CPU_INT_MEM:                                       /* Memory management.                                   */
+             CPU_CRITICAL_ENTER();
+             temp                 = CPU_REG_NVIC_SHPRI1;
+             temp                &= ~(DEF_OCTET_MASK << (0 * DEF_OCTET_NBR_BITS));
+             temp                |=  (prio           << (0 * DEF_OCTET_NBR_BITS));
+             CPU_REG_NVIC_SHPRI1  = temp;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_BUSFAULT:                                  /* Bus fault.                                           */
+             CPU_CRITICAL_ENTER();
+             temp                 = CPU_REG_NVIC_SHPRI1;
+             temp                &= ~(DEF_OCTET_MASK << (1 * DEF_OCTET_NBR_BITS));
+             temp                |=  (prio           << (1 * DEF_OCTET_NBR_BITS));
+             CPU_REG_NVIC_SHPRI1  = temp;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_USAGEFAULT:                                /* Usage fault.                                         */
+             CPU_CRITICAL_ENTER();
+             temp                 = CPU_REG_NVIC_SHPRI1;
+             temp                &= ~(DEF_OCTET_MASK << (2 * DEF_OCTET_NBR_BITS));
+             temp                |=  (prio           << (2 * DEF_OCTET_NBR_BITS));
+             CPU_REG_NVIC_SHPRI1  = temp;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_SVCALL:                                    /* SVCall.                                              */
+             CPU_CRITICAL_ENTER();
+             temp                 = CPU_REG_NVIC_SHPRI2;
+             temp                &= ~((CPU_INT32U)DEF_OCTET_MASK << (3 * DEF_OCTET_NBR_BITS));
+             temp                |=  (prio                       << (3 * DEF_OCTET_NBR_BITS));
+             CPU_REG_NVIC_SHPRI2  = temp;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_DBGMON:                                    /* Debug monitor.                                       */
+             CPU_CRITICAL_ENTER();
+             temp                = CPU_REG_NVIC_SHPRI3;
+             temp                &= ~(DEF_OCTET_MASK << (0 * DEF_OCTET_NBR_BITS));
+             temp                |=  (prio           << (0 * DEF_OCTET_NBR_BITS));
+             CPU_REG_NVIC_SHPRI3  = temp;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_PENDSV:                                    /* PendSV.                                              */
+             CPU_CRITICAL_ENTER();
+             temp                 = CPU_REG_NVIC_SHPRI3;
+             temp                &= ~(DEF_OCTET_MASK << (2 * DEF_OCTET_NBR_BITS));
+             temp                |=  (prio           << (2 * DEF_OCTET_NBR_BITS));
+             CPU_REG_NVIC_SHPRI3  = temp;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_SYSTICK:                                   /* SysTick.                                             */
+             CPU_CRITICAL_ENTER();
+             temp                 = CPU_REG_NVIC_SHPRI3;
+             temp                &= ~((CPU_INT32U)DEF_OCTET_MASK << (3 * DEF_OCTET_NBR_BITS));
+             temp                |=  (prio                       << (3 * DEF_OCTET_NBR_BITS));
+             CPU_REG_NVIC_SHPRI3  = temp;
+             CPU_CRITICAL_EXIT();
+             break;
+
+
+                                                                /* ---------------- EXTERNAL INTERRUPT ---------------- */
+        default:
+            pos_max = CPU_INT_SRC_POS_MAX;
+            if (pos < pos_max) {                                /* See Note #3.                                         */
+                 group                    = (pos - 16) / 4;
+                 nbr                      = (pos - 16) % 4;
+
+                 CPU_CRITICAL_ENTER();
+                 temp                     = CPU_REG_NVIC_PRIO(group);
+                 temp                    &= ~(DEF_OCTET_MASK << (nbr * DEF_OCTET_NBR_BITS));
+                 temp                    |=  (prio           << (nbr * DEF_OCTET_NBR_BITS));
+                 CPU_REG_NVIC_PRIO(group) = temp;
+                 CPU_CRITICAL_EXIT();
+             }
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_IntSrcPrioGet()
+*
+* Description : Get priority of an interrupt source.
+*
+* Argument(s) : pos     Position of interrupt vector in interrupt table (see 'CPU_IntSrcDis()').
+*
+* Return(s)   : Priority of interrupt source.  If the interrupt source specified is invalid, then
+*               DEF_INT_16S_MIN_VAL is returned.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) See 'CPU_IntSrcDis()      Note #1'.
+*
+*               (2) See 'CPU_IntSrcPrioSet()  Note #2'.
+*
+*               (3) See 'CPU_IntSrcDis()      Note #3'.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  CPU_IntSrcPrioGet (CPU_INT08U  pos)
+{
+    CPU_INT08U  group;
+    CPU_INT08U  nbr;
+    CPU_INT08U  pos_max;
+    CPU_INT16S  prio;
+    CPU_INT32U  temp;
+    CPU_SR_ALLOC();
+
+
+    switch (pos) {
+        case CPU_INT_STK_PTR:                                   /* ---------------- INVALID OR RESERVED --------------- */
+        case CPU_INT_RSVD_07:
+        case CPU_INT_RSVD_08:
+        case CPU_INT_RSVD_09:
+        case CPU_INT_RSVD_10:
+        case CPU_INT_RSVD_13:
+             prio = DEF_INT_16S_MIN_VAL;
+             break;
+
+
+                                                                /* ----------------- SYSTEM EXCEPTIONS ---------------- */
+        case CPU_INT_RESET:                                     /* Reset (see Note #2).                                 */
+             prio = -3;
+             break;
+
+        case CPU_INT_NMI:                                       /* Non-maskable interrupt (see Note #2).                */
+             prio = -2;
+             break;
+
+        case CPU_INT_HFAULT:                                    /* Hard fault (see Note #2).                            */
+             prio = -1;
+             break;
+
+
+        case CPU_INT_MEM:                                       /* Memory management.                                   */
+             CPU_CRITICAL_ENTER();
+             temp = CPU_REG_NVIC_SHPRI1;
+             prio = (temp >> (0 * DEF_OCTET_NBR_BITS)) & DEF_OCTET_MASK;
+             CPU_CRITICAL_EXIT();
+             break;
+
+
+        case CPU_INT_BUSFAULT:                                  /* Bus fault.                                           */
+             CPU_CRITICAL_ENTER();
+             temp = CPU_REG_NVIC_SHPRI1;
+             prio = (temp >> (1 * DEF_OCTET_NBR_BITS)) & DEF_OCTET_MASK;
+             CPU_CRITICAL_EXIT();
+             break;
+
+
+        case CPU_INT_USAGEFAULT:                                /* Usage fault.                                         */
+             CPU_CRITICAL_ENTER();
+             temp = CPU_REG_NVIC_SHPRI1;
+             prio = (temp >> (2 * DEF_OCTET_NBR_BITS)) & DEF_OCTET_MASK;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_SVCALL:                                    /* SVCall.                                              */
+             CPU_CRITICAL_ENTER();
+             temp = CPU_REG_NVIC_SHPRI2;
+             prio = (temp >> (3 * DEF_OCTET_NBR_BITS)) & DEF_OCTET_MASK;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_DBGMON:                                    /* Debug monitor.                                       */
+             CPU_CRITICAL_ENTER();
+             temp = CPU_REG_NVIC_SHPRI3;
+             prio = (temp >> (0 * DEF_OCTET_NBR_BITS)) & DEF_OCTET_MASK;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_PENDSV:                                    /* PendSV.                                              */
+             CPU_CRITICAL_ENTER();
+             temp = CPU_REG_NVIC_SHPRI3;
+             prio = (temp >> (2 * DEF_OCTET_NBR_BITS)) & DEF_OCTET_MASK;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case CPU_INT_SYSTICK:                                   /* SysTick.                                             */
+             CPU_CRITICAL_ENTER();
+             temp = CPU_REG_NVIC_SHPRI3;
+             prio = (temp >> (3 * DEF_OCTET_NBR_BITS)) & DEF_OCTET_MASK;
+             CPU_CRITICAL_EXIT();
+             break;
+
+
+                                                                /* ---------------- EXTERNAL INTERRUPT ---------------- */
+        default:
+            pos_max = CPU_INT_SRC_POS_MAX;
+            if (pos < pos_max) {                                /* See Note #3.                                         */
+                 group = (pos - 16) / 4;
+                 nbr   = (pos - 16) % 4;
+
+                 CPU_CRITICAL_ENTER();
+                 temp  = CPU_REG_NVIC_PRIO(group);
+                 CPU_CRITICAL_EXIT();
+
+                 prio  = (temp >> (nbr * DEF_OCTET_NBR_BITS)) & DEF_OCTET_MASK;
+             } else {
+                 prio  = DEF_INT_16S_MIN_VAL;
+             }
+             break;
+    }
+
+    return (prio);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv5_generic_l1/IAR/cpu_cache_armv5_generic_l1_a.s b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv5_generic_l1/IAR/cpu_cache_armv5_generic_l1_a.s
new file mode 100644
index 0000000..f4be71c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv5_generic_l1/IAR/cpu_cache_armv5_generic_l1_a.s
@@ -0,0 +1,124 @@
+;********************************************************************************************************
+;                                                uC/CPU
+;                                    CPU CONFIGURATION & PORT LAYER
+;
+;                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+;
+;               All rights reserved.  Protected by international copyright laws.
+;
+;               uC/CPU is provided in source form to registered licensees ONLY.  It is
+;               illegal to distribute this source code to any third party unless you receive
+;               written permission by an authorized Micrium representative.  Knowledge of
+;               the source code may NOT be used to develop a similar product.
+;
+;               Please help us continue to provide the Embedded community with the finest
+;               software available.  Your honesty is greatly appreciated.
+;
+;               You can find our product's user manual, API reference, release notes and
+;               more information at https://doc.micrium.com.
+;               You can contact us at www.micrium.com.
+;
+; File      : cpu_cache_armv5_generic_l1_s.s
+; Version   : V1.30.02.00
+; For       : ARMv5 Generic Cache
+; Toolchain : IAR EWARM
+;
+; Notes : none.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                           MACROS AND DEFINIITIONS
+;********************************************************************************************************
+
+    PRESERVE8
+
+    RSEG CODE:CODE:NOROOT(2)
+    CODE32
+
+
+;********************************************************************************************************
+;                                           CPU_DCache_LineSizeGet()
+;
+; Description : Returns the cache line size.
+;
+; Prototypes  : void  CPU_DCache_LineSizeGet (void)
+;
+; Argument(s) : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_LineSizeGet
+
+CPU_DCache_LineSizeGet
+
+    MRC     p15, 0, r0, c0, c0, 1
+    AND     r0, r0, #0xF0000
+    LSR     r0, r0, #16
+    MOV     r1, #1
+    LSL     r1, r1, r0
+    LSL     r0, r1, #2
+
+
+    BX      lr
+
+
+;********************************************************************************************************
+;                                      INVALIDATE DATA CACHE RANGE
+;
+; Description : Invalidate a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeInv  (void       *p_mem,
+;                                           CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to invalidate.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeInv
+
+CPU_DCache_RangeInv
+    ADD r1, r1, r0
+    BIC r0, r0, #31
+
+CPU_DCache_RangeInvL1:
+    MCR p15,0, r0, c7, c6, 1
+    ADD r0, r0, #32
+    CMP r0, r1
+    BLT CPU_DCache_RangeInvL1
+    BX LR
+
+    BX LR
+
+
+;********************************************************************************************************
+;                                       FLUSH DATA CACHE RANGE
+;
+; Description : Flush (clean) a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeFlush  (void       *p_mem,
+;                                             CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to flush.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeFlush
+
+CPU_DCache_RangeFlush
+    ADD r1, r1, r0
+    BIC r0, r0, #31
+
+CPU_DCache_RangeFlushL1:
+    MCR p15, 0, r0, c7, c14, 1
+    ADD r0, r0, #32
+    CMP r0, r1
+    BLT CPU_DCache_RangeFlushL1
+    BX LR
+
+    END
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv5_generic_l1/cpu_cache_armv5_generic_l1.c b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv5_generic_l1/cpu_cache_armv5_generic_l1.c
new file mode 100644
index 0000000..ee4d8bf
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv5_generic_l1/cpu_cache_armv5_generic_l1.c
@@ -0,0 +1,92 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      CPU CACHE IMPLEMENTATION
+*                                       ARMv5 Generic L1 Cache
+*
+* Filename      : cpu_cache_armv5_generic_l1.c
+* Version       : V1.30.02.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+#include 
+#include "../../../cpu_cache.h"
+#include 
+
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                        EXTERNAL DECLARATIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+CPU_INT32U CPU_Cache_Linesize;                                  /* Cache line size.                                     */
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_CacheMGMTInit()
+*
+* Description : Initialize cpu cache module.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_Init().
+*
+*               This function is an INTERNAL CPU module function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  CPU_Cache_Init(void)
+{
+    CPU_Cache_Linesize = 32u;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/GNU/cpu_cache_armv7_generic_l1_a.S b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/GNU/cpu_cache_armv7_generic_l1_a.S
new file mode 100644
index 0000000..7d45356
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/GNU/cpu_cache_armv7_generic_l1_a.S
@@ -0,0 +1,138 @@
+@********************************************************************************************************
+@                                                uC/CPU
+@                                    CPU CONFIGURATION & PORT LAYER
+@
+@                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+@
+@               All rights reserved.  Protected by international copyright laws.
+@
+@               uC/CPU is provided in source form to registered licensees ONLY.  It is
+@               illegal to distribute this source code to any third party unless you receive
+@               written permission by an authorized Micrium representative.  Knowledge of
+@               the source code may NOT be used to develop a similar product.
+@
+@               Please help us continue to provide the Embedded community with the finest
+@               software available.  Your honesty is greatly appreciated.
+@
+@               You can find our product's user manual, API reference, release notes and
+@               more information at https://doc.micrium.com.
+@               You can contact us at www.micrium.com.
+@
+@ File      : cpu_cache_armv7_generic_l1_s.s
+@ Version   : V1.30.02.00
+@ For       : ARMv7 Generic Cache
+@ Toolchain : GNU
+@
+@ Notes : none.
+@********************************************************************************************************
+@
+
+@********************************************************************************************************
+@                                           MACROS AND DEFINIITIONS
+@********************************************************************************************************
+
+
+    .code 32
+
+
+.equ CPU_CACHE_L2C_REG7_CACHE_SYNC,      0x730
+.equ CPU_CACHE_L2C_REG7_CACHE_INV_PA,    0x770
+.equ CPU_CACHE_L2C_REG7_CACHE_INV_WAY,   0x77C
+.equ CPU_CACHE_L2C_REG7_CACHE_CLEAN_PA,  0x7B0
+
+
+@********************************************************************************************************
+@                                           CPU_DCache_LineSizeGet()
+@
+@ Description : Returns the cache line size.
+@
+@ Prototypes  : void  CPU_DCache_LineSizeGet (void)
+@
+@ Argument(s) : none.
+@********************************************************************************************************
+
+.global CPU_DCache_LineSizeGet
+
+CPU_DCache_LineSizeGet:
+
+    MRC     p15, 0, r0, c0, c0, 1
+    AND     r0, r0, #0xF0000
+    LSR     r0, r0, #16
+    MOV     r1, #1
+    LSL     r1, r1, r0
+    LSL     r0, r1, #2
+
+    BX      lr
+
+
+@********************************************************************************************************
+@                                      INVALIDATE DATA CACHE RANGE
+@
+@ Description : Invalidate a range of data cache by MVA.
+@
+@ Prototypes  : void  CPU_DCache_RangeInv  (void       *p_mem,
+@                                           CPU_SIZE_T  range);
+@
+@ Argument(s) : p_mem    Start address of the region to invalidate.
+@
+@               range    Size of the region to invalidate in bytes.
+@
+@ Note(s)     : none.
+@********************************************************************************************************
+
+.global CPU_DCache_RangeInv
+
+CPU_DCache_RangeInv:
+    DSB
+    MOVW r2, #:lower16:CPU_Cache_Linesize
+    MOVT r2, #:upper16:CPU_Cache_Linesize
+    LDR  r2, [r2]
+    SUB  r3, r2, #1
+    ADD  r1, r1, r0
+    BIC  r0, r0, r3
+
+CPU_DCache_RangeInvL1:
+    MCR  p15,0, r0, c7, c6, 1
+    ADD  r0, r0, r2
+    CMP  r0, r1
+    BLT  CPU_DCache_RangeInvL1
+    DSB
+
+    BX LR
+
+
+@********************************************************************************************************
+@                                       FLUSH DATA CACHE RANGE
+@
+@ Description : Flush (clean) a range of data cache by MVA.
+@
+@ Prototypes  : void  CPU_DCache_RangeFlush  (void       *p_mem,
+@                                             CPU_SIZE_T  range)@
+@
+@ Argument(s) : p_mem    Start address of the region to flush.
+@
+@               range    Size of the region to invalidate in bytes.
+@
+@ Note(s)     : none.
+@********************************************************************************************************
+
+.global CPU_DCache_RangeFlush
+
+CPU_DCache_RangeFlush:
+    DSB
+    MOVW r2, #:lower16:CPU_Cache_Linesize
+    MOVT r2, #:upper16:CPU_Cache_Linesize
+    LDR  r2, [r2]
+    SUB  r3, r2, #1
+    ADD  r1, r1, r0
+    BIC  r0, r0, r3
+
+CPU_DCache_RangeFlushL1:
+    MCR  p15, 0, r0, c7, c10, 1
+    ADD  r0, r0, r2
+    CMP  r0, r1
+    BLT  CPU_DCache_RangeFlushL1
+    DSB
+
+    BX lr
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/IAR/cpu_cache_armv7_generic_l1_a.s b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/IAR/cpu_cache_armv7_generic_l1_a.s
new file mode 100644
index 0000000..b5f4bff
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/IAR/cpu_cache_armv7_generic_l1_a.s
@@ -0,0 +1,173 @@
+;********************************************************************************************************
+;                                                uC/CPU
+;                                    CPU CONFIGURATION & PORT LAYER
+;
+;                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+;
+;               All rights reserved.  Protected by international copyright laws.
+;
+;               uC/CPU is provided in source form to registered licensees ONLY.  It is
+;               illegal to distribute this source code to any third party unless you receive
+;               written permission by an authorized Micrium representative.  Knowledge of
+;               the source code may NOT be used to develop a similar product.
+;
+;               Please help us continue to provide the Embedded community with the finest
+;               software available.  Your honesty is greatly appreciated.
+;
+;               You can find our product's user manual, API reference, release notes and
+;               more information at https://doc.micrium.com.
+;               You can contact us at www.micrium.com.
+;
+; File      : cpu_cache_armv7_generic_l1_s.s
+; Version   : V1.30.02.00
+; For       : ARMv7 Generic Cache
+; Toolchain : IAR EWARM
+;
+; Notes : none.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                           MACROS AND DEFINIITIONS
+;********************************************************************************************************
+
+    IMPORT CPU_Cache_Linesize
+
+
+    PRESERVE8
+
+    RSEG CODE:CODE:NOROOT(2)
+    CODE32
+
+
+;********************************************************************************************************
+;                                           CPU_DCache_LineSizeGet()
+;
+; Description : Returns the cache line size.
+;
+; Prototypes  : void  CPU_DCache_LineSizeGet (void)
+;
+; Argument(s) : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_LineSizeGet
+
+CPU_DCache_LineSizeGet
+
+    MRC     p15, 0, r0, c0, c0, 1
+    AND     r0, r0, #0xF0000
+    LSR     r0, r0, #16
+    MOV     r1, #1
+    LSL     r1, r1, r0
+    LSL     r0, r1, #2
+
+
+    BX      lr
+
+
+;********************************************************************************************************
+;                                      INVALIDATE DATA CACHE RANGE
+;
+; Description : Invalidate a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeInv  (void       *p_mem,
+;                                           CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to invalidate.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeInv
+
+CPU_DCache_RangeInv
+    DSB
+    MOV32 r2, CPU_Cache_Linesize
+    LDR r2, [r2]
+    SUB r3, r2, #1
+    ADD r1, r1, r0
+    BIC r0, r0, r3
+
+CPU_DCache_RangeInvL1
+    MCR p15,0, r0, c7, c6, 1
+    ADD r0, r0, r2
+    CMP r0, r1
+    BLT CPU_DCache_RangeInvL1
+    DSB
+
+    BX LR
+
+
+;********************************************************************************************************
+;                                       FLUSH DATA CACHE RANGE
+;
+; Description : Flush (clean) a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeFlush  (void       *p_mem,
+;                                             CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to flush.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeFlush
+
+CPU_DCache_RangeFlush
+    DSB
+    MOV32 r2, CPU_Cache_Linesize
+    LDR r2, [r2]
+    SUB r3, r2, #1
+    ADD r1, r1, r0
+    BIC r0, r0, r3
+
+CPU_DCache_RangeFlushL1
+    MCR p15, 0, r0, c7, c10, 1
+    ADD r0, r0, r2
+    CMP r0, r1
+    BLT CPU_DCache_RangeFlushL1
+    DSB
+
+    BX lr
+
+
+;********************************************************************************************************
+;                                 FLUSH & INVALIDATE DATA CACHE RANGE
+;
+; Description : Flush and invalidate a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeFlushInv  (void       *p_mem,
+;                                                CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to flush.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeFlushInv
+
+CPU_DCache_RangeFlushInv
+    DSB
+    MOV32 r2, CPU_Cache_Linesize
+    LDR r2, [r2]
+    SUB r3, r2, #1
+    ADD r1, r1, r0
+    BIC r0, r0, r3
+
+CPU_DCache_RangeFlushInvL1
+    MCR p15, 0, r0, c7, c14, 1
+    ADD r0, r0, r2
+    CMP r0, r1
+    BLT CPU_DCache_RangeFlushInvL1
+    DSB
+
+    BX lr
+
+
+    END
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/RealView/cpu_cache_armv7_generic_l1_a.s b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/RealView/cpu_cache_armv7_generic_l1_a.s
new file mode 100644
index 0000000..2bbc890
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/RealView/cpu_cache_armv7_generic_l1_a.s
@@ -0,0 +1,149 @@
+;********************************************************************************************************
+;                                                uC/CPU
+;                                    CPU CONFIGURATION & PORT LAYER
+;
+;                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+;
+;               All rights reserved.  Protected by international copyright laws.
+;
+;               uC/CPU is provided in source form to registered licensees ONLY.  It is
+;               illegal to distribute this source code to any third party unless you receive
+;               written permission by an authorized Micrium representative.  Knowledge of
+;               the source code may NOT be used to develop a similar product.
+;
+;               Please help us continue to provide the Embedded community with the finest
+;               software available.  Your honesty is greatly appreciated.
+;
+;               You can find our product's user manual, API reference, release notes and
+;               more information at https://doc.micrium.com.
+;               You can contact us at www.micrium.com.
+;
+; File      : cpu_cache_armv7_generic_l1_s.s
+; Version   : V1.30.02.00
+; For       : ARMv7 Generic Cache
+; Toolchain : IAR EWARM
+;
+; Notes : none.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                           MACROS AND DEFINIITIONS
+;********************************************************************************************************
+
+    PRESERVE8
+
+    AREA  BSP_Cache,CODE,READONLY
+
+    ENTRY
+
+
+CPU_CACHE_L2C_REG7_CACHE_SYNC      EQU  0x730
+CPU_CACHE_L2C_REG7_CACHE_INV_PA    EQU  0x770
+CPU_CACHE_L2C_REG7_CACHE_INV_WAY   EQU  0x77C
+CPU_CACHE_L2C_REG7_CACHE_CLEAN_PA  EQU  0x7B0
+
+
+    IMPORT CPU_Cache_Linesize
+
+
+;********************************************************************************************************
+;                                           CPU_DCache_LineSizeGet()
+;
+; Description : Returns the cache line size.
+;
+; Prototypes  : void  CPU_DCache_LineSizeGet (void)
+;
+; Argument(s) : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_LineSizeGet
+
+CPU_DCache_LineSizeGet FUNCTION
+
+    MRC     p15, 0, r0, c0, c0, 1
+    AND     r0, r0, #0xF0000
+    LSR     r0, r0, #16
+    MOV     r1, #1
+    LSL     r1, r1, r0
+    LSL     r0, r1, #2
+
+    BX      lr
+
+    ENDFUNC
+
+
+;********************************************************************************************************
+;                                      INVALIDATE DATA CACHE RANGE
+;
+; Description : Invalidate a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeInv  (void       *p_mem,
+;                                           CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to invalidate.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeInv
+
+CPU_DCache_RangeInv FUNCTION
+    DSB
+    MOV32 r2, CPU_Cache_Linesize
+    LDR r2, [r2]
+    SUB r3, r2, #1
+    ADD r1, r1, r0
+    BIC r0, r0, r3
+
+CPU_DCache_RangeInvL1
+    MCR p15,0, r0, c7, c6, 1
+    ADD r0, r0, r2
+    CMP r0, r1
+    BLT CPU_DCache_RangeInvL1
+    DSB
+
+    BX LR
+
+    ENDFUNC
+
+
+;********************************************************************************************************
+;                                       FLUSH DATA CACHE RANGE
+;
+; Description : Flush (clean) a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeFlush  (void       *p_mem,
+;                                             CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to flush.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeFlush
+
+CPU_DCache_RangeFlush FUNCTION
+    DSB
+    MOV32 r2, CPU_Cache_Linesize
+    LDR r2, [r2]
+    SUB r3, r2, #1
+    ADD r1, r1, r0
+    BIC r0, r0, r3
+
+CPU_DCache_RangeFlushL1
+    MCR p15, 0, r0, c7, c10, 1
+    ADD r0, r0, r2
+    CMP r0, r1
+    BLT CPU_DCache_RangeFlushL1
+    DSB
+
+    ENDFUNC
+
+
+    END
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/cpu_cache_armv7_generic_l1.c b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/cpu_cache_armv7_generic_l1.c
new file mode 100644
index 0000000..848e6e1
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1/cpu_cache_armv7_generic_l1.c
@@ -0,0 +1,95 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      CPU CACHE IMPLEMENTATION
+*                                       ARMv7 Generic L1 Cache
+*
+* Filename      : cpu_cache_armv7_generic_l1.c
+* Version       : V1.30.02.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+#include 
+#include "../../../cpu_cache.h"
+#include 
+
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                        EXTERNAL DECLARATIONS
+*********************************************************************************************************
+*/
+
+CPU_INT32U  CPU_DCache_LineSizeGet(void);
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+CPU_INT32U CPU_Cache_Linesize;                                  /* Cache line size.                                     */
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_CacheMGMTInit()
+*
+* Description : Initialize cpu cache module.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_Init().
+*
+*               This function is an INTERNAL CPU module function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  CPU_Cache_Init(void)
+{
+    CPU_Cache_Linesize = CPU_DCache_LineSizeGet();
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/GNU/cpu_cache_armv7_generic_l1_l2c310_l2_a.S b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/GNU/cpu_cache_armv7_generic_l1_l2c310_l2_a.S
new file mode 100644
index 0000000..e520017
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/GNU/cpu_cache_armv7_generic_l1_l2c310_l2_a.S
@@ -0,0 +1,160 @@
+@********************************************************************************************************
+@                                                uC/CPU
+@                                    CPU CONFIGURATION & PORT LAYER
+@
+@                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+@
+@               All rights reserved.  Protected by international copyright laws.
+@
+@               uC/CPU is provided in source form to registered licensees ONLY.  It is
+@               illegal to distribute this source code to any third party unless you receive
+@               written permission by an authorized Micrium representative.  Knowledge of
+@               the source code may NOT be used to develop a similar product.
+@
+@               Please help us continue to provide the Embedded community with the finest
+@               software available.  Your honesty is greatly appreciated.
+@
+@               You can find our product's user manual, API reference, release notes and
+@               more information at https://doc.micrium.com.
+@               You can contact us at www.micrium.com.
+@
+@ File      : cpu_cache_armv7_generic_l1_s.s
+@ Version   : V1.30.02.00
+@ For       : ARMv7 Generic Cache
+@ Toolchain : GNU
+@
+@ Notes : none.
+@********************************************************************************************************
+@
+
+@********************************************************************************************************
+@                                           MACROS AND DEFINIITIONS
+@********************************************************************************************************
+
+
+    .code 32
+
+
+.equ CPU_CACHE_L2C_REG7_CACHE_SYNC,      0x730
+.equ CPU_CACHE_L2C_REG7_CACHE_INV_PA,    0x770
+.equ CPU_CACHE_L2C_REG7_CACHE_INV_WAY,   0x77C
+.equ CPU_CACHE_L2C_REG7_CACHE_CLEAN_PA,  0x7B0
+
+
+@********************************************************************************************************
+@                                           CPU_DCache_LineSizeGet()
+@
+@ Description : Returns the cache line size.
+@
+@ Prototypes  : void  CPU_DCache_LineSizeGet (void)
+@
+@ Argument(s) : none.
+@********************************************************************************************************
+
+.global CPU_DCache_LineSizeGet
+
+CPU_DCache_LineSizeGet:
+
+    MRC     p15, 0, r0, c0, c0, 1
+    AND     r0, r0, #0xF0000
+    LSR     r0, r0, #16
+    MOV     r1, #1
+    LSL     r1, r1, r0
+    LSL     r0, r1, #2
+
+    BX      lr
+
+
+@********************************************************************************************************
+@                                      INVALIDATE DATA CACHE RANGE
+@
+@ Description : Invalidate a range of data cache by MVA.
+@
+@ Prototypes  : void  CPU_DCache_RangeInv  (void       *p_mem,
+@                                           CPU_SIZE_T  range)@
+@
+@ Argument(s) : p_mem    Start address of the region to invalidate.
+@
+@               range    Size of the region to invalidate in bytes.
+@
+@ Note(s)     : none.
+@********************************************************************************************************
+
+.global CPU_DCache_RangeInv
+
+CPU_DCache_RangeInv:
+    DSB
+    ADD  r1, r1, r0
+    MOVW R12, #:lower16:CPU_Cache_Linesize
+    MOVT R12, #:upper16:CPU_Cache_Linesize
+    LDR  r12, [r12]
+    SUB  r2, r12, #1
+    BIC  r0, r0, r2
+    MOV  r3, r0
+
+    MOVW r2, #:lower16:CPU_Cache_PL310BaseAddr
+    MOVT r2, #:upper16:CPU_Cache_PL310BaseAddr
+    LDR  r2, [r2]
+CPU_DCache_RangeInvL2:
+    STR  r3, [r2, #CPU_CACHE_L2C_REG7_CACHE_INV_PA]
+    ADD  r3, r3, r12
+    CMP  r3, r1
+    BLT  CPU_DCache_RangeInvL2
+    DSB
+
+CPU_DCache_RangeInvL1:
+    MCR  p15,0, r0, c7, c6, 1
+    ADD  r0, r0, r12
+    CMP  r0, r1
+    BLT  CPU_DCache_RangeInvL1
+    DSB
+
+    BX LR
+
+
+@********************************************************************************************************
+@                                       FLUSH DATA CACHE RANGE
+@
+@ Description : Flush (clean) a range of data cache by MVA.
+@
+@ Prototypes  : void  CPU_DCache_RangeFlush  (void       *p_mem,
+@                                             CPU_SIZE_T  range)@
+@
+@ Argument(s) : p_mem    Start address of the region to flush.
+@
+@               range    Size of the region to invalidate in bytes.
+@
+@ Note(s)     : none.
+@********************************************************************************************************
+
+.global CPU_DCache_RangeFlush
+
+CPU_DCache_RangeFlush:
+    DSB
+    ADD r1, r1, r0
+    MOVW R12, #:lower16:CPU_Cache_Linesize
+    MOVT R12, #:upper16:CPU_Cache_Linesize
+    LDR r12, [r12]
+    SUB r2, r12, #1
+    BIC r0, r0, r2
+
+    MOV r3, r0
+CPU_DCache_RangeFlushL1:
+    MCR p15, 0, r3, c7, c14, 1
+    ADD r3, r3, r12
+    CMP r3, r1
+    BLT CPU_DCache_RangeFlushL1
+    DSB
+
+    MOVW r2, #:lower16:CPU_Cache_PL310BaseAddr
+    MOVT r2, #:upper16:CPU_Cache_PL310BaseAddr
+    LDR    r2, [r2]
+CPU_DCache_RangeFlushL2:
+    STR r0, [r2, #CPU_CACHE_L2C_REG7_CACHE_CLEAN_PA]
+    ADD r0, r0, r12
+    CMP r0, r1
+    BLT CPU_DCache_RangeFlushL2
+    DSB
+
+    BX LR
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/IAR/cpu_cache_armv7_generic_l1_l2c310_l2_a.s b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/IAR/cpu_cache_armv7_generic_l1_l2c310_l2_a.s
new file mode 100644
index 0000000..4a88725
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/IAR/cpu_cache_armv7_generic_l1_l2c310_l2_a.s
@@ -0,0 +1,165 @@
+;********************************************************************************************************
+;                                                uC/CPU
+;                                    CPU CONFIGURATION & PORT LAYER
+;
+;                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+;
+;               All rights reserved.  Protected by international copyright laws.
+;
+;               uC/CPU is provided in source form to registered licensees ONLY.  It is
+;               illegal to distribute this source code to any third party unless you receive
+;               written permission by an authorized Micrium representative.  Knowledge of
+;               the source code may NOT be used to develop a similar product.
+;
+;               Please help us continue to provide the Embedded community with the finest
+;               software available.  Your honesty is greatly appreciated.
+;
+;               You can find our product's user manual, API reference, release notes and
+;               more information at https://doc.micrium.com.
+;               You can contact us at www.micrium.com.
+;
+; File      : cpu_cache_armv7_generic_l1_l2c310_l2_s.s
+; Version   : V1.30.02.00
+; For       : Generic ARMv7 L1 cache with external L2C310 L2 cache controller
+; Toolchain : IAR EWARM
+;
+; Notes : none.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                           MACROS AND DEFINIITIONS
+;********************************************************************************************************
+
+
+CPU_CACHE_L2C_REG7_CACHE_SYNC      EQU  0x730
+CPU_CACHE_L2C_REG7_CACHE_INV_PA    EQU  0x770
+CPU_CACHE_L2C_REG7_CACHE_INV_WAY   EQU  0x77C
+CPU_CACHE_L2C_REG7_CACHE_CLEAN_PA  EQU  0x7B0
+
+
+    IMPORT CPU_Cache_Linesize
+    IMPORT CPU_Cache_PL310BaseAddr
+
+
+    PRESERVE8
+
+    RSEG CODE:CODE:NOROOT(2)
+    CODE32
+
+
+;********************************************************************************************************
+;                                           CPU_DCache_LineSizeGet()
+;
+; Description : Returns the cache line size.
+;
+; Prototypes  : void  CPU_DCache_LineSizeGet (void)
+;
+; Argument(s) : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_LineSizeGet
+
+CPU_DCache_LineSizeGet
+
+    MRC     p15, 0, r0, c0, c0, 1
+    AND     r0, r0, #0xF0000
+    LSR     r0, r0, #16
+    MOV     r1, #1
+    LSL     r1, r1, r0
+    LSL     r0, r1, #2
+
+
+    BX      lr
+    
+
+;********************************************************************************************************
+;                                      INVALIDATE DATA CACHE RANGE
+;
+; Description : Invalidate a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeInv  (void       *p_mem,
+;                                           CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to invalidate.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeInv
+
+CPU_DCache_RangeInv
+    DSB
+    ADD r1, r1, r0
+    MOV32 r12, CPU_Cache_Linesize
+    LDR r12, [r12]
+    SUB r2, r12, #1
+    BIC r0, r0, r2
+    MOV r3, r0
+
+    MOV32  r2, CPU_Cache_PL310BaseAddr
+    LDR    r2, [r2]
+CPU_DCache_RangeInvL2
+    STR r3, [r2, #CPU_CACHE_L2C_REG7_CACHE_INV_PA]
+    ADD r3, r3, r12
+    CMP r3, r1
+    BLT CPU_DCache_RangeInvL2
+    DSB
+
+CPU_DCache_RangeInvL1
+    MCR p15,0, r0, c7, c6, 1
+    ADD r0, r0, r12
+    CMP r0, r1
+    BLT CPU_DCache_RangeInvL1
+    DSB
+
+    BX LR
+
+
+;********************************************************************************************************
+;                                       FLUSH DATA CACHE RANGE
+;
+; Description : Flush (clean) a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeFlush  (void       *p_mem,
+;                                             CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to flush.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeFlush
+
+CPU_DCache_RangeFlush
+    DSB
+    ADD r1, r1, r0
+    MOV32 r12, CPU_Cache_Linesize
+    LDR r12, [r12]
+    SUB r2, r12, #1
+    BIC r0, r0, r2
+
+    MOV r3, r0
+CPU_DCache_RangeFlushL1
+    MCR p15, 0, r3, c7, c14, 1
+    ADD r3, r3, r12
+    CMP r3, r1
+    BLT CPU_DCache_RangeFlushL1
+    DSB
+
+    MOV32  r2, CPU_Cache_PL310BaseAddr
+    LDR    r2, [r2]
+CPU_DCache_RangeFlushL2
+    STR r0, [r2, #CPU_CACHE_L2C_REG7_CACHE_CLEAN_PA]
+    ADD r0, r0, r12
+    CMP r0, r1
+    BLT CPU_DCache_RangeFlushL2
+    DSB
+
+    BX LR
+
+    END
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/RealView/cpu_cache_armv7_generic_l1_l2c310_l2_a.s b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/RealView/cpu_cache_armv7_generic_l1_l2c310_l2_a.s
new file mode 100644
index 0000000..e144379
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/RealView/cpu_cache_armv7_generic_l1_l2c310_l2_a.s
@@ -0,0 +1,172 @@
+;********************************************************************************************************
+;                                                uC/CPU
+;                                    CPU CONFIGURATION & PORT LAYER
+;
+;                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+;
+;               All rights reserved.  Protected by international copyright laws.
+;
+;               uC/CPU is provided in source form to registered licensees ONLY.  It is
+;               illegal to distribute this source code to any third party unless you receive
+;               written permission by an authorized Micrium representative.  Knowledge of
+;               the source code may NOT be used to develop a similar product.
+;
+;               Please help us continue to provide the Embedded community with the finest
+;               software available.  Your honesty is greatly appreciated.
+;
+;               You can find our product's user manual, API reference, release notes and
+;               more information at https://doc.micrium.com.
+;               You can contact us at www.micrium.com.
+;
+; File      : cpu_cache_armv7_generic_l1_s.s
+; Version   : V1.30.02.00
+; For       : ARMv7 Generic Cache
+; Toolchain : IAR EWARM
+;
+; Notes : none.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                           MACROS AND DEFINIITIONS
+;********************************************************************************************************
+
+    PRESERVE8
+
+    AREA  BSP_Cache,CODE,READONLY
+
+    ENTRY
+
+
+CPU_CACHE_L2C_REG7_CACHE_SYNC      EQU  0x730
+CPU_CACHE_L2C_REG7_CACHE_INV_PA    EQU  0x770
+CPU_CACHE_L2C_REG7_CACHE_INV_WAY   EQU  0x77C
+CPU_CACHE_L2C_REG7_CACHE_CLEAN_PA  EQU  0x7B0
+
+
+    IMPORT CPU_Cache_Linesize
+    IMPORT CPU_Cache_PL310BaseAddr
+
+
+;********************************************************************************************************
+;                                           CPU_DCache_LineSizeGet()
+;
+; Description : Returns the cache line size.
+;
+; Prototypes  : void  CPU_DCache_LineSizeGet (void)
+;
+; Argument(s) : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_LineSizeGet
+
+CPU_DCache_LineSizeGet FUNCTION
+
+    MRC     p15, 0, r0, c0, c0, 1
+    AND     r0, r0, #0xF0000
+    LSR     r0, r0, #16
+    MOV     r1, #1
+    LSL     r1, r1, r0
+    LSL     r0, r1, #2
+
+    BX      lr
+
+    ENDFUNC
+
+
+;********************************************************************************************************
+;                                      INVALIDATE DATA CACHE RANGE
+;
+; Description : Invalidate a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeInv  (void       *p_mem,
+;                                           CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to invalidate.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeInv
+
+CPU_DCache_RangeInv FUNCTION
+    DSB
+    ADD r1, r1, r0
+    MOV32 r12, CPU_Cache_Linesize
+    LDR r12, [r12]
+    SUB r2, r12, #1
+    BIC r0, r0, r2
+    MOV r3, r0
+
+    MOV32  r2, CPU_Cache_PL310BaseAddr
+    LDR    r2, [r2]
+CPU_DCache_RangeInvL2
+    STR r3, [r2, #CPU_CACHE_L2C_REG7_CACHE_INV_PA]
+    ADD r3, r3, r12
+    CMP r3, r1
+    BLT CPU_DCache_RangeInvL2
+    DSB
+
+CPU_DCache_RangeInvL1
+    MCR p15,0, r0, c7, c6, 1
+    ADD r0, r0, r12
+    CMP r0, r1
+    BLT CPU_DCache_RangeInvL1
+    DSB
+
+    BX LR
+
+    ENDFUNC
+
+
+;********************************************************************************************************
+;                                       FLUSH DATA CACHE RANGE
+;
+; Description : Flush (clean) a range of data cache by MVA.
+;
+; Prototypes  : void  CPU_DCache_RangeFlush  (void       *p_mem,
+;                                             CPU_SIZE_T  range);
+;
+; Argument(s) : p_mem    Start address of the region to flush.
+;
+;               range    Size of the region to invalidate in bytes.
+;
+; Note(s)     : none.
+;********************************************************************************************************
+
+    EXPORT CPU_DCache_RangeFlush
+
+CPU_DCache_RangeFlush FUNCTION
+    DSB
+    ADD r1, r1, r0
+    MOV32 r12, CPU_Cache_Linesize
+    LDR r12, [r12]
+    SUB r2, r12, #1
+    BIC r0, r0, r2
+
+    MOV r3, r0
+CPU_DCache_RangeFlushL1
+    MCR p15, 0, r3, c7, c14, 1
+    ADD r3, r3, r12
+    CMP r3, r1
+    BLT CPU_DCache_RangeFlushL1
+    DSB
+
+    MOV32  r2, CPU_Cache_PL310BaseAddr
+    LDR    r2, [r2]
+CPU_DCache_RangeFlushL2
+    STR r0, [r2, #CPU_CACHE_L2C_REG7_CACHE_CLEAN_PA]
+    ADD r0, r0, r12
+    CMP r0, r1
+    BLT CPU_DCache_RangeFlushL2
+    DSB
+
+    BX LR
+
+    ENDFUNC
+
+
+    END
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/cpu_cache_armv7_generic_l1_l2c310_l2.c b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/cpu_cache_armv7_generic_l1_l2c310_l2.c
new file mode 100644
index 0000000..d0bc7b8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7_generic_l1_l2c310_l2/cpu_cache_armv7_generic_l1_l2c310_l2.c
@@ -0,0 +1,101 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      CPU CACHE IMPLEMENTATION
+*                    Generic ARMv7 L1 Cache and External L2C310 L2 Cache Controller
+*
+* Filename      : cpu_cache_armv7_generic_l1_l2c310_l2.c
+* Version       : V1.30.02.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+#include 
+#include "../../../cpu_cache.h"
+#include 
+
+#ifndef CPU_CACHE_CFG_L2C310_BASE_ADDR
+#error  "CPU_CFG.H, Missing CPU_CACHE_CFG_L2C310_BASE_ADDR: Base address of L2C310 Level 2 cache controller"
+#endif
+
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                        EXTERNAL DECLARATIONS
+*********************************************************************************************************
+*/
+
+CPU_INT32U  CPU_DCache_LineSizeGet (void);
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+CPU_INT32U  CPU_Cache_Linesize;                                 /* Cache line size.                                     */
+CPU_INT32U  CPU_Cache_PL310BaseAddr;                            /* PL310 L2 cache controller base addr.                 */
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_CacheMGMTInit()
+*
+* Description : Initialize cpu cache module.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_Init().
+*
+*               This function is an INTERNAL CPU module function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  CPU_Cache_Init(void)
+{
+    CPU_Cache_Linesize      = CPU_DCache_LineSizeGet();
+    CPU_Cache_PL310BaseAddr = CPU_CACHE_CFG_L2C310_BASE_ADDR;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7m_generic_l1/cpu_cache_armv7m_generic_l1.c b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7m_generic_l1/cpu_cache_armv7m_generic_l1.c
new file mode 100644
index 0000000..127be5f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cache/ARM/armv7m_generic_l1/cpu_cache_armv7m_generic_l1.c
@@ -0,0 +1,217 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2016; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       CPU CACHE IMPLEMENTATION
+*                                           ARMv7-M L1 Cache
+*
+* Filename      : cpu_cache_armv7m_generic_l1.c
+* Version       : V1.31.00
+* Programmer(s) : JBL
+*                 SB
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+#include 
+#include "cpu_cache.h"
+#include 
+
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                        MACROS AND DEFINIITIONS
+*********************************************************************************************************
+*/
+                                                                /* ------ CACHE CONTROL IDENTIFICATION REGISTERS ------ */
+#define  SCS_CLIDR      (*((CPU_REG32 *)(0xE000ED78u)))
+#define  SCS_CTR        (*((CPU_REG32 *)(0xE000ED7Cu)))
+#define  SCS_CCSIDR     (*((CPU_REG32 *)(0xE000ED80u)))
+#define  SCS_CCSELR     (*((CPU_REG32 *)(0xE000ED84u)))
+                                                                /* ----------- CACHE MAINTENANCE OPERATIONS ----------- */
+#define  SCS_ICIALLU    (*((CPU_REG32 *)(0xE000EF50u)))         /* Invalidate I-cache to PoU                            */
+#define  SCS_ICIMVAU    (*((CPU_REG32 *)(0xE000EF58u)))         /* Invalidate I-cache to PoU by MVA                     */
+#define  SCS_DCIMVAC    (*((CPU_REG32 *)(0xE000EF5Cu)))         /* Invalidate D-cache to PoC by MVA                     */
+#define  SCS_DCISW      (*((CPU_REG32 *)(0xE000EF60u)))         /* Invalidate D-cache by Set/Way                        */
+#define  SCS_DCCMVAU    (*((CPU_REG32 *)(0xE000EF64u)))         /* Clean D-cache to PoU by MVA                          */
+#define  SCS_DCCMVAC    (*((CPU_REG32 *)(0xE000EF68u)))         /* Clean D-cache to PoC by MVA                          */
+#define  SCS_DCCSW      (*((CPU_REG32 *)(0xE000EF6Cu)))         /* Clean D-cache by Set/Way                             */
+#define  SCS_DCCIMVAC   (*((CPU_REG32 *)(0xE000EF70u)))         /* Clean and invalidate D-cache by MVA                  */
+#define  SCS_DCCISW     (*((CPU_REG32 *)(0xE000EF74u)))         /* Clean and invalidate D-cache by Set/Way              */
+#define  SCS_BPIALL     (*((CPU_REG32 *)(0xE000EF78u)))         /* Invalidate Branch predictor                          */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  CPU_DCache_LineSizeGet (void);
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U CPU_Cache_Linesize;                          /* Cache line size.                                     */
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_Cache_Init()
+*
+* Description : Initialize cpu cache module.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_Init().
+*
+*               This function is an INTERNAL CPU module function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  CPU_Cache_Init (void)
+{
+    CPU_Cache_Linesize = CPU_DCache_LineSizeGet();
+}
+
+
+/*
+*********************************************************************************************************
+*                                       CPU_DCache_LineSizeGet()
+*
+* Description : Returns the cache line size.
+*
+* Prototypes  : CPU_INT32U  CPU_DCache_LineSizeGet (void)
+*
+* Argument(s) : none.
+*
+* Note(s)     : Line Size = 2^(CCSIDR[2:0] + 2)
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  CPU_DCache_LineSizeGet (void)
+{
+    return (1u << ((SCS_CCSIDR & 0x7u)) + 2u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      INVALIDATE DATA CACHE RANGE
+*
+* Description : Invalidate a range of data cache by MVA.
+*
+* Prototypes  : void  CPU_DCache_RangeInv  (void      *p_mem,
+*                                           CPU_ADDR   len);
+*
+* Argument(s) : p_mem    Start address of the region to invalidate.
+*
+*               range    Size of the region to invalidate in bytes.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  CPU_DCache_RangeInv (void      *addr_start,
+                           CPU_ADDR   len)
+{
+                                                                /* Align the address according to the line size.        */
+    addr_start = (void *)((CPU_ADDR)addr_start & ~(CPU_Cache_Linesize - 1u));
+
+    CPU_MB();
+
+    while(len > CPU_Cache_Linesize) {
+        SCS_DCIMVAC = (CPU_ADDR)addr_start;
+        addr_start = (void *)((CPU_ADDR)addr_start + CPU_Cache_Linesize);
+        len -= CPU_Cache_Linesize;
+    }
+
+    if (len > 0u) {
+        SCS_DCIMVAC = (CPU_ADDR)addr_start;
+    }
+
+    CPU_MB();
+}
+
+
+/*
+*********************************************************************************************************
+*                                        FLUSH DATA CACHE RANGE
+*
+* Description : Flush (clean) a range of data cache by MVA.
+*
+* Prototypes  : void  CPU_DCache_RangeFlush  (void      *p_mem,
+*                                             CPU_ADDR   len);
+*
+* Argument(s) : p_mem    Start address of the region to flush.
+*
+*               range    Size of the region to invalidate in bytes.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  CPU_DCache_RangeFlush  (void      *addr_start,
+                              CPU_ADDR   len)
+{
+                                                                /* Align the address according to the line size.        */
+    addr_start = (void *)((CPU_ADDR)addr_start & ~(CPU_Cache_Linesize - 1u));
+
+    CPU_MB();
+
+    while(len > CPU_Cache_Linesize) {
+        SCS_DCCMVAC = (CPU_ADDR)addr_start;
+        addr_start = (void *)((CPU_ADDR)addr_start + CPU_Cache_Linesize);
+        len -= CPU_Cache_Linesize;
+    }
+
+    if (len > 0u) {
+        SCS_DCCMVAC = (CPU_ADDR)addr_start;
+    }
+
+    CPU_MB();
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/Cfg/Template/cpu_cfg.h b/src/ucos_v1_42/micrium_source/uC-CPU/Cfg/Template/cpu_cfg.h
new file mode 100644
index 0000000..2338bcc
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/Cfg/Template/cpu_cfg.h
@@ -0,0 +1,215 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       CPU CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : cpu_cfg.h
+* Version       : V1.30.02
+* Programmer(s) : SR
+*                 ITJ
+*                 JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_CFG_MODULE_PRESENT
+#define  CPU_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                       CPU NAME CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_NAME_EN to enable/disable CPU host name feature :
+*
+*               (a) CPU host name storage
+*               (b) CPU host name API functions
+*
+*           (2) Configure CPU_CFG_NAME_SIZE with the desired ASCII string size of the CPU host name, 
+*               including the terminating NULL character.
+*
+*               See also 'cpu_core.h  GLOBAL VARIABLES  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure CPU host name feature (see Note #1) :      */
+#define  CPU_CFG_NAME_EN                        DEF_DISABLED
+                                                                /*   DEF_DISABLED  CPU host name DISABLED               */
+                                                                /*   DEF_ENABLED   CPU host name ENABLED                */
+
+                                                                /* Configure CPU host name ASCII string size ...        */
+#define  CPU_CFG_NAME_SIZE                                16    /* ... (see Note #2).                                   */
+
+
+/*
+*********************************************************************************************************
+*                                     CPU TIMESTAMP CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_TS_xx_EN to enable/disable CPU timestamp features :
+*
+*               (a) CPU_CFG_TS_32_EN   enable/disable 32-bit CPU timestamp feature
+*               (b) CPU_CFG_TS_64_EN   enable/disable 64-bit CPU timestamp feature
+*
+*           (2) (a) Configure CPU_CFG_TS_TMR_SIZE with the CPU timestamp timer's word size :
+*
+*                       CPU_WORD_SIZE_08         8-bit word size
+*                       CPU_WORD_SIZE_16        16-bit word size
+*                       CPU_WORD_SIZE_32        32-bit word size
+*                       CPU_WORD_SIZE_64        64-bit word size
+*
+*               (b) If the size of the CPU timestamp timer is not a binary multiple of 8-bit octets 
+*                   (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple octet word 
+*                   size SHOULD be configured (e.g. to 16-bits).  However, the minimum supported word 
+*                   size for CPU timestamp timers is 8-bits.
+*
+*                   See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TS_TmrRd()  Note #2a'.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure CPU timestamp features (see Note #1) :     */
+#define  CPU_CFG_TS_32_EN                       DEF_DISABLED
+#define  CPU_CFG_TS_64_EN                       DEF_DISABLED
+                                                                /*   DEF_DISABLED  CPU timestamps DISABLED              */
+                                                                /*   DEF_ENABLED   CPU timestamps ENABLED               */
+
+                                                                /* Configure CPU timestamp timer word size ...          */
+                                                                /* ... (see Note #2) :                                  */
+#define  CPU_CFG_TS_TMR_SIZE                    CPU_WORD_SIZE_32
+
+
+/*
+*********************************************************************************************************
+*                        CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION
+*
+* Note(s) : (1) (a) Configure CPU_CFG_INT_DIS_MEAS_EN to enable/disable measuring CPU's interrupts 
+*                   disabled time :
+*
+*                   (a)  Enabled,       if CPU_CFG_INT_DIS_MEAS_EN      #define'd in 'cpu_cfg.h'
+*
+*                   (b) Disabled,       if CPU_CFG_INT_DIS_MEAS_EN  NOT #define'd in 'cpu_cfg.h'
+*
+*                   See also 'cpu_core.h  FUNCTION PROTOTYPES  Note #1'.
+*
+*               (b) Configure CPU_CFG_INT_DIS_MEAS_OVRHD_NBR with the number of times to measure & 
+*                   average the interrupts disabled time measurements overhead.
+*
+*                   See also 'cpu_core.c  CPU_IntDisMeasInit()  Note #3a'.
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* Configure CPU interrupts disabled time ...           */
+#define  CPU_CFG_INT_DIS_MEAS_EN                                /* ... measurements feature (see Note #1a).             */
+#endif
+
+                                                                /* Configure number of interrupts disabled overhead ... */
+#define  CPU_CFG_INT_DIS_MEAS_OVRHD_NBR                    1u   /* ... time measurements (see Note #1b).                */
+
+
+/*
+*********************************************************************************************************
+*                                    CPU COUNT ZEROS CONFIGURATION
+*
+* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT  to define count leading  zeros bits 
+*                   function(s) in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_LEAD_ZEROS_ASM_PRESENT       #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT   NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
+*
+*               (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits 
+*                   function(s) in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT      #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT  NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* Configure CPU count leading  zeros bits ...          */
+#define  CPU_CFG_LEAD_ZEROS_ASM_PRESENT                         /* ... assembly-version (see Note #1a).                 */
+#endif
+
+#if 0                                                           /* Configure CPU count trailing zeros bits ...          */
+#define  CPU_CFG_TRAIL_ZEROS_ASM_PRESENT                        /* ... assembly-version (see Note #1b).                 */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      CPU ENDIAN TYPE OVERRIDE
+*
+* Note(s) : (1) Configure CPU_CFG_ENDIAN_TYPE to override the default CPU endian type defined in cpu.h.
+*
+*               (a) CPU_ENDIAN_TYPE_BIG         Big-   endian word order (CPU words' most  significant
+*                                                                         octet @ lowest memory address)
+*               (b) CPU_ENDIAN_TYPE_LITTLE      Little-endian word order (CPU words' least significant
+*                                                                         octet @ lowest memory address)
+*
+*           (2) Defining CPU_CFG_ENDIAN_TYPE here is only valid for supported bi-endian architectures.
+*               See  'cpu.h  CPU WORD CONFIGURATION  Note #3' for details
+*********************************************************************************************************
+*/
+
+#if 0
+#define  CPU_CFG_ENDIAN_TYPE            CPU_ENDIAN_TYPE_BIG     /* Defines CPU data    word-memory order (see Note #2). */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          CACHE MANAGEMENT
+*
+* Note(s) : (1) Configure CPU_CFG_CACHE_MGMT_EN to enable the cache managment API.
+
+*
+*           (2) Defining CPU_CFG_CACHE_MGMT_EN to DEF_ENABLED only enable the cache management function.
+*               Cache are assumed to be configured and enabled by the time CPU_init() is called.
+*********************************************************************************************************
+*/
+
+#define  CPU_CFG_CACHE_MGMT_EN            DEF_DISABLED          /* Defines CPU data    word-memory order (see Note #1). */
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of CPU cfg module include.                       */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/MicroBlaze/GNU/cpu.h b/src/ucos_v1_42/micrium_source/uC-CPU/MicroBlaze/GNU/cpu.h
new file mode 100644
index 0000000..7c4aff3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/MicroBlaze/GNU/cpu.h
@@ -0,0 +1,505 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            CPU PORT FILE
+*
+*                                              MicroBlaze
+*                                            GNU C Compiler
+*
+* Filename      : cpu.h
+* Version       : V1.30.02.00
+* Programmer(s) : MG
+*               : NB
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This CPU header file is protected from multiple pre-processor inclusion through use of 
+*               the  CPU module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_MODULE_PRESENT                                     /* See Note #1.                                         */
+#define  CPU_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                          CPU INCLUDE FILES
+*
+* Note(s) : (1) The following CPU files are located in the following directories :
+*
+*               (a) \\cpu_cfg.h
+*
+*               (b) (1) \\cpu_def.h
+*                   (2) \\\\cpu*.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for common   CPU-compiler software
+*                                                          directory name for specific CPU
+*                                                     directory name for specific compiler
+*
+*           (2) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) (1) '\\'                  directory         See Note #1b1
+*                   (2) '\\\\' directory         See Note #1b2
+*
+*           (3) Since NO custom library modules are included, 'cpu.h' may ONLY use configurations from 
+*               CPU configuration file 'cpu_cfg.h' that do NOT reference any custom library definitions.
+*
+*               In other words, 'cpu.h' may use 'cpu_cfg.h' configurations that are #define'd to numeric 
+*               constants or to NULL (i.e. NULL-valued #define's); but may NOT use configurations to 
+*               custom library #define's (e.g. DEF_DISABLED or DEF_ENABLED).
+*********************************************************************************************************
+*/
+
+#include  
+#include                                             /* See Note #3.                                         */
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    CONFIGURE STANDARD DATA TYPES
+*
+* Note(s) : (1) Configure standard data types according to CPU-/compiler-specifications.
+*
+*           (2) (a) (1) 'CPU_FNCT_VOID' data type defined to replace the commonly-used function pointer
+*                       data type of a pointer to a function which returns void & has no arguments.
+*
+*                   (2) Example function pointer usage :
+*
+*                           CPU_FNCT_VOID  FnctName;
+*
+*                           FnctName();
+*
+*               (b) (1) 'CPU_FNCT_PTR'  data type defined to replace the commonly-used function pointer
+*                       data type of a pointer to a function which returns void & has a single void
+*                       pointer argument.
+*
+*                   (2) Example function pointer usage :
+*
+*                           CPU_FNCT_PTR   FnctName;
+*                           void          *p_obj
+*
+*                           FnctName(p_obj);
+*********************************************************************************************************
+*/
+
+typedef            void        CPU_VOID;
+typedef            char        CPU_CHAR;                        /*  8-bit character                                     */
+typedef  unsigned  char        CPU_BOOLEAN;                     /*  8-bit boolean or logical                            */
+typedef  unsigned  char        CPU_INT08U;                      /*  8-bit unsigned integer                              */
+typedef    signed  char        CPU_INT08S;                      /*  8-bit   signed integer                              */
+typedef  unsigned  short       CPU_INT16U;                      /* 16-bit unsigned integer                              */
+typedef    signed  short       CPU_INT16S;                      /* 16-bit   signed integer                              */
+typedef  unsigned  int         CPU_INT32U;                      /* 32-bit unsigned integer                              */
+typedef    signed  int         CPU_INT32S;                      /* 32-bit   signed integer                              */
+typedef  unsigned  long  long  CPU_INT64U;                      /* 64-bit unsigned integer                              */
+typedef    signed  long  long  CPU_INT64S;                      /* 64-bit   signed integer                              */
+
+typedef            float       CPU_FP32;                        /* 32-bit floating point                                */
+typedef            double      CPU_FP64;                        /* 64-bit floating point                                */
+
+
+typedef  volatile  CPU_INT08U  CPU_REG08;                       /*  8-bit register                                      */
+typedef  volatile  CPU_INT16U  CPU_REG16;                       /* 16-bit register                                      */
+typedef  volatile  CPU_INT32U  CPU_REG32;                       /* 32-bit register                                      */
+typedef  volatile  CPU_INT64U  CPU_REG64;                       /* 64-bit register                                      */
+
+
+typedef            void      (*CPU_FNCT_VOID)(void);            /* See Note #2a.                                        */
+typedef            void      (*CPU_FNCT_PTR )(void *p_obj);     /* See Note #2b.                                        */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU WORD CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_ADDR_SIZE, CPU_CFG_DATA_SIZE, & CPU_CFG_DATA_SIZE_MAX with CPU's &/or 
+*               compiler's word sizes :
+*
+*                   CPU_WORD_SIZE_08             8-bit word size
+*                   CPU_WORD_SIZE_16            16-bit word size
+*                   CPU_WORD_SIZE_32            32-bit word size
+*                   CPU_WORD_SIZE_64            64-bit word size
+*
+*           (2) Configure CPU_CFG_ENDIAN_TYPE with CPU's data-word-memory order :
+*
+*               (a) CPU_ENDIAN_TYPE_BIG         Big-   endian word order (CPU words' most  significant
+*                                                                         octet @ lowest memory address)
+*               (b) CPU_ENDIAN_TYPE_LITTLE      Little-endian word order (CPU words' least significant
+*                                                                         octet @ lowest memory address)
+*********************************************************************************************************
+*/
+
+                                                                /* Define  CPU         word sizes (see Note #1) :       */
+#define  CPU_CFG_ADDR_SIZE              CPU_WORD_SIZE_32        /* Defines CPU address word size  (in octets).          */
+#define  CPU_CFG_DATA_SIZE              CPU_WORD_SIZE_32        /* Defines CPU data    word size  (in octets).          */
+#define  CPU_CFG_DATA_SIZE_MAX          CPU_WORD_SIZE_64        /* Defines CPU maximum word size  (in octets).          */
+
+                                                                /* Defines CPU data    word-memory order (see Note #2). */
+#if (defined(__BYTE_ORDER__) && \
+            (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
+#define  CPU_CFG_ENDIAN_TYPE            CPU_ENDIAN_TYPE_BIG
+#else
+#define  CPU_CFG_ENDIAN_TYPE            CPU_ENDIAN_TYPE_LITTLE
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 CONFIGURE CPU ADDRESS & DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* CPU address type based on address bus size.          */
+#if     (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_32)
+typedef  CPU_INT32U  CPU_ADDR;
+#elif   (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_ADDR;
+#else
+typedef  CPU_INT08U  CPU_ADDR;
+#endif
+
+                                                                /* CPU data    type based on data    bus size.          */
+#if     (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32)
+typedef  CPU_INT32U  CPU_DATA;
+#elif   (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_DATA;
+#else
+typedef  CPU_INT08U  CPU_DATA;
+#endif
+
+
+typedef  CPU_DATA    CPU_ALIGN;                                 /* Defines CPU data-word-alignment size.                */
+typedef  CPU_ADDR    CPU_SIZE_T;                                /* Defines CPU standard 'size_t'   size.                */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU STACK CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_STK_GROWTH in 'cpu.h' with CPU's stack growth order :
+*
+*               (a) CPU_STK_GROWTH_LO_TO_HI     CPU stack pointer increments to the next higher  stack
+*                                                   memory address after data is pushed onto the stack
+*               (b) CPU_STK_GROWTH_HI_TO_LO     CPU stack pointer decrements to the next lower   stack
+*                                                   memory address after data is pushed onto the stack
+*
+*           (2) Configure CPU_CFG_STK_ALIGN_BYTES with the highest minimum alignement required for
+*               cpu stacks.
+*********************************************************************************************************
+*/
+
+#define  CPU_CFG_STK_GROWTH       CPU_STK_GROWTH_HI_TO_LO       /* Defines CPU stack growth order (see Note #1).        */
+
+#define  CPU_CFG_STK_ALIGN_BYTES  (sizeof(CPU_ALIGN))           /* Defines CPU stack alignment in bytes. (see Note #2). */
+
+typedef  CPU_INT32U               CPU_STK;                      /* Defines CPU stack data type.                         */
+typedef  CPU_ADDR                 CPU_STK_SIZE;                 /* Defines CPU stack size data type.                    */
+
+
+/*
+*********************************************************************************************************
+*                                   CRITICAL SECTION CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_CRITICAL_METHOD with CPU's/compiler's critical section method :
+*
+*                                                       Enter/Exit critical sections by ...
+*
+*                   CPU_CRITICAL_METHOD_INT_DIS_EN      Disable/Enable interrupts
+*                   CPU_CRITICAL_METHOD_STATUS_STK      Push/Pop       interrupt status onto stack
+*                   CPU_CRITICAL_METHOD_STATUS_LOCAL    Save/Restore   interrupt status to local variable
+*
+*               (a) CPU_CRITICAL_METHOD_INT_DIS_EN  is NOT a preferred method since it does NOT support
+*                   multiple levels of interrupts.  However, with some CPUs/compilers, this is the only
+*                   available method.
+*
+*               (b) CPU_CRITICAL_METHOD_STATUS_STK    is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Push/save   interrupt status onto a local stack
+*                       (2) Disable     interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Pop/restore interrupt status from a local stack
+*
+*               (c) CPU_CRITICAL_METHOD_STATUS_LOCAL  is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Save    interrupt status into a local variable
+*                       (2) Disable interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Restore interrupt status from a local variable
+*
+*           (2) Critical section macro's most likely require inline assembly.  If the compiler does NOT
+*               allow inline assembly in C source files, critical section macro's MUST call an assembly
+*               subroutine defined in a 'cpu_a.asm' file located in the following software directory :
+*
+*                   \\\\
+*
+*                       where
+*                                   directory path for common   CPU-compiler software
+*                                                      directory name for specific CPU
+*                                                 directory name for specific compiler
+*
+*           (3) (a) To save/restore interrupt status, a local variable 'cpu_sr' of type 'CPU_SR' MAY need 
+*                   to be declared (e.g. if 'CPU_CRITICAL_METHOD_STATUS_LOCAL' method is configured).
+*
+*                   (1) 'cpu_sr' local variable SHOULD be declared via the CPU_SR_ALLOC() macro which, if 
+*                        used, MUST be declared following ALL other local variables.
+*
+*                        Example :
+*
+*                           void  Fnct (void)
+*                           {
+*                               CPU_INT08U  val_08;
+*                               CPU_INT16U  val_16;
+*                               CPU_INT32U  val_32;
+*                               CPU_SR_ALLOC();         MUST be declared after ALL other local variables
+*                                   :
+*                                   :
+*                           }
+*
+*               (b) Configure 'CPU_SR' data type with the appropriate-sized CPU data type large enough to 
+*                   completely store the CPU's/compiler's status word.
+*********************************************************************************************************
+*/
+                                                                /* Configure CPU critical method      (see Note #1) :   */
+#define  CPU_CFG_CRITICAL_METHOD    CPU_CRITICAL_METHOD_STATUS_LOCAL
+
+typedef  CPU_INT32U                 CPU_SR;                     /* Defines   CPU status register size (see Note #3b).   */
+
+                                                                /* Allocates CPU status register word (see Note #3a).   */
+#if     (CPU_CFG_CRITICAL_METHOD == CPU_CRITICAL_METHOD_STATUS_LOCAL)
+#define  CPU_SR_ALLOC()             CPU_SR  cpu_sr = (CPU_SR)0
+#else
+#define  CPU_SR_ALLOC()
+#endif
+
+
+
+#define  CPU_INT_DIS()         do { cpu_sr = CPU_SR_Save(); } while (0) /* Save    CPU status word & disable interrupts.*/
+#define  CPU_INT_EN()          do { CPU_SR_Restore(cpu_sr); } while (0) /* Restore CPU status word.                     */
+
+
+#ifdef   CPU_CFG_INT_DIS_MEAS_EN
+                                                                        /* Disable interrupts, ...                      */
+                                                                        /* & start interrupts disabled time measurement.*/
+#define  CPU_CRITICAL_ENTER()  do { CPU_INT_DIS();         \
+                                    CPU_IntDisMeasStart(); }  while (0)
+                                                                        /* Stop & measure   interrupts disabled time,   */
+                                                                        /* ...  & re-enable interrupts.                 */
+#define  CPU_CRITICAL_EXIT()   do { CPU_IntDisMeasStop();  \
+                                    CPU_INT_EN();          }  while (0)
+
+#else
+
+#define  CPU_CRITICAL_ENTER()  do { CPU_INT_DIS(); } while (0)          /* Disable   interrupts.                        */
+#define  CPU_CRITICAL_EXIT()   do { CPU_INT_EN();  } while (0)          /* Re-enable interrupts.                        */
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    MEMORY BARRIERS CONFIGURATION
+*
+* Note(s) : (1) (a) Configure memory barriers if required by the architecture.
+*
+*                   CPU_MB      Full memory barrier.
+*                   CPU_RMB     Read (Loads) memory barrier.
+*                   CPU_WMB     Write (Stores) memory barrier.
+*
+*********************************************************************************************************
+*/
+
+#define  CPU_MB()       __asm__ __volatile__ ("mbar 1" : : : "memory")
+#define  CPU_RMB()      __asm__ __volatile__ ("mbar 1" : : : "memory")
+#define  CPU_WMB()      __asm__ __volatile__ ("mbar 1" : : : "memory")
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_SR  CPU_SR_Save             (void);
+void    CPU_SR_Restore          (CPU_SR  cpu_sr);
+
+void    CPU_CacheDataFlush      (void *addr, CPU_INT32U len);                                          
+void    CPU_CacheDataInvalidate (void *addr, CPU_INT32U len);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_CFG_ADDR_SIZE
+#error  "CPU_CFG_ADDR_SIZE              not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_ADDR_SIZE        illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+#ifndef  CPU_CFG_DATA_SIZE
+#error  "CPU_CFG_DATA_SIZE              not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_DATA_SIZE        illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+#ifndef  CPU_CFG_DATA_SIZE_MAX
+#error  "CPU_CFG_DATA_SIZE_MAX          not #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+
+#elif  ((CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_DATA_SIZE_MAX != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_DATA_SIZE_MAX    illegally #define'd in 'cpu.h'               "
+#error  "                         [MUST be  CPU_WORD_SIZE_08   8-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_16  16-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_32  32-bit alignment]"
+#error  "                         [     ||  CPU_WORD_SIZE_64  64-bit alignment]"
+#endif
+
+
+
+#if     (CPU_CFG_DATA_SIZE_MAX < CPU_CFG_DATA_SIZE)
+#error  "CPU_CFG_DATA_SIZE_MAX    illegally #define'd in 'cpu.h' "
+#error  "                         [MUST be  >= CPU_CFG_DATA_SIZE]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_ENDIAN_TYPE
+#error  "CPU_CFG_ENDIAN_TYPE            not #define'd in 'cpu.h'   "
+#error  "                         [MUST be  CPU_ENDIAN_TYPE_BIG   ]"
+#error  "                         [     ||  CPU_ENDIAN_TYPE_LITTLE]"
+
+#elif  ((CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_BIG   ) && \
+        (CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_LITTLE))
+#error  "CPU_CFG_ENDIAN_TYPE      illegally #define'd in 'cpu.h'   "
+#error  "                         [MUST be  CPU_ENDIAN_TYPE_BIG   ]"
+#error  "                         [     ||  CPU_ENDIAN_TYPE_LITTLE]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_STK_GROWTH
+#error  "CPU_CFG_STK_GROWTH             not #define'd in 'cpu.h'    "
+#error  "                         [MUST be  CPU_STK_GROWTH_LO_TO_HI]"
+#error  "                         [     ||  CPU_STK_GROWTH_HI_TO_LO]"
+
+#elif  ((CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_LO_TO_HI) && \
+        (CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_HI_TO_LO))
+#error  "CPU_CFG_STK_GROWTH       illegally #define'd in 'cpu.h'    "
+#error  "                         [MUST be  CPU_STK_GROWTH_LO_TO_HI]"
+#error  "                         [     ||  CPU_STK_GROWTH_HI_TO_LO]"
+#endif
+
+
+
+
+#ifndef  CPU_CFG_CRITICAL_METHOD
+#error  "CPU_CFG_CRITICAL_METHOD        not #define'd in 'cpu.h'             "
+#error  "                         [MUST be  CPU_CRITICAL_METHOD_INT_DIS_EN  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_STK  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_LOCAL]"
+
+#elif  ((CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_INT_DIS_EN  ) && \
+        (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_STK  ) && \
+        (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_LOCAL))
+#error  "CPU_CFG_CRITICAL_METHOD  illegally #define'd in 'cpu.h'             "
+#error  "                         [MUST be  CPU_CRITICAL_METHOD_INT_DIS_EN  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_STK  ]"
+#error  "                         [     ||  CPU_CRITICAL_METHOD_STATUS_LOCAL]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'cpu.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif                                                          /* End of CPU module include.                           */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/MicroBlaze/GNU/cpu_a.S b/src/ucos_v1_42/micrium_source/uC-CPU/MicroBlaze/GNU/cpu_a.S
new file mode 100644
index 0000000..eb9bccf
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/MicroBlaze/GNU/cpu_a.S
@@ -0,0 +1,174 @@
+/*
+********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            CPU PORT FILE
+*
+*                                              MicroBlaze
+*                                            GNU C Compiler
+*
+* Filename      : cpu_a.s
+* Version       : V1.30.02.00
+* Programmer(s) : MG
+*********************************************************************************************************
+*/
+
+#define _ASMLANGUAGE
+
+#include  
+
+/*
+*********************************************************************************************************
+*                                            PUBLIC FUNCTIONS
+*********************************************************************************************************
+*/
+
+        .globl      CPU_SR_Save
+        .globl      CPU_SR_Restore
+
+/*
+*********************************************************************************************************
+*                                              EQUATES
+*********************************************************************************************************
+*/
+
+.equ    CPU_IE_BIT,         0x02
+
+.text
+
+
+/*
+*********************************************************************************************************
+*                                         DISABLE INTERRUPTS
+*                                      CPU_SR  CPU_SR_Save(void);
+*
+* Description : Disables the interrupts and returns the RMSR contents.  This allows the IE state to be
+*               restored at a subsequent time.
+*
+*               The variable in the calling routine which the return is set to MUST be declared 'volatile'
+*               for proper operation.  There is no guarantee that the proper register will be scheduled
+*               for the subsequent 'CPU_SR_Save()' function call if the variable is not declared
+*               'volatile'.
+*
+* Arguments   : None
+*
+* Returns     : Current RMSR contents in R3
+*
+* Note(s)     : This function uses the MSRCLR instruction, which is not, by default, recognized by
+*               MicroBlaze processors.  Setting the paramter C_USE_MSR_INSTR to '1' in the MHS file
+*               allows the processor to recognize this instruction.
+*********************************************************************************************************
+*/
+
+#ifdef CPU_CFG_MB_HAS_MSR_INST
+CPU_SR_Save:
+    RTSD    r15, 8
+    MSRCLR  r3,  CPU_IE_BIT        /* Save MSR in r3 and disable interrupts              */
+#else
+CPU_SR_Save:
+    ADDIK   r1, r1, -4             /* Save R4 since it's used as a scratchpad register   */
+    SW      r4, r1, r0
+
+    MFS     r3, RMSR               /* Read the MSR.  r3 is used as the return value      */
+    ANDNI   r4, r3, CPU_IE_BIT     /* Mask off the IE bit                                */
+    MTS     RMSR, r4               /* Store the MSR                                      */
+
+    LW      r4, r1, r0             /* Restore R4                                         */
+    ADDIK   r1, r1, 4
+
+    AND     r0, r0, r0             /* NO-OP - pipeline flush                             */
+    AND     r0, r0, r0             /* NO-OP - pipeline flush                             */
+    AND     r0, r0, r0             /* NO-OP - pipeline flush                             */
+
+    RTSD    r15, 8                 /* Return to caller with R3 containing original RMSR  */
+    AND     r0, r0, r0             /* NO-OP                                              */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         ENABLE INTERRUPTS
+*                                    void CPU_SR_Restore(CPU_SR sr);
+*
+* Description: Enables the interrupts using the provided data. If the IE bit is set in the argument, the
+*              RTID opcode is used to return.  If the IE bis is clear, the standard RTSD is used leaving
+*              the interrupts disabled.
+*
+*              The argument from the calling routine MUST be declared 'volatile' for proper operation.
+*              There is no guarantee that the proper register will be scheduled for the 'CPU_SR_Restore()'
+*              function call if the variable is not declared 'volatile'.
+*
+* Arguments   : Saved RMSR contents in R5
+*
+* Returns     : None
+*
+* Note(s)     : None
+*********************************************************************************************************
+*/
+
+CPU_SR_Restore:
+    RTSD    r15, 8
+    MTS     rMSR, r5                         /* Move the saved status from r5 into rMSR                */
+
+
+/*
+********************************************************************************************************
+*                                         CPU_CntLeadZeros()
+*                                        COUNT LEADING ZEROS
+*
+* Description : Counts the number of contiguous, most-significant, leading zero bits before the first
+*               binary one bit in a data value.
+*
+* Prototype   : CPU_DATA  CPU_CntLeadZeros(CPU_DATA  val);
+*
+* Argument(s) : val         Data value to count leading zero bits.
+*
+* Return(s)   : Number of contiguous, most-significant, leading zero bits in 'val'.
+*
+* Caller(s)   : Application.
+*
+*               This function is an INTERNAL CPU module function but MAY be called by application function(s).
+*
+* Note(s)     : (1) If the argument is zero, the value 32 is returned.
+*
+*               (2) MUST be implemented in cpu_a.asm if and only if CPU_CFG_LEAD_ZEROS_ASM_PRESENT is
+*                   #define'd in 'cpu_cfg.h' or 'cpu.h'.
+********************************************************************************************************
+*/
+
+#ifdef CPU_CFG_LEAD_ZEROS_ASM_PRESENT
+.globl CPU_CntLeadZeros
+CPU_CntLeadZeros:
+    RTSD    r15, 8
+    CLZ     r3, r5
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     CPU ASSEMBLY PORT FILE END
+*********************************************************************************************************
+*/
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/MicroBlaze/GNU/cpu_c.c b/src/ucos_v1_42/micrium_source/uC-CPU/MicroBlaze/GNU/cpu_c.c
new file mode 100644
index 0000000..76682c8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/MicroBlaze/GNU/cpu_c.c
@@ -0,0 +1,108 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*                  illegal to distribute this source code to any third party unless you receive 
+*                  written permission by an authorized Micrium representative.  Knowledge of 
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest 
+*                  software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            CPU PORT FILE
+*
+*                                              Microblaze
+*                                                 GNU
+*
+* Filename      : cpu_c.c
+* Version       : V1.30.02.00
+* Programmer(s) : NB
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#include  
+#include  
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL VARIABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       CPU_FlushDCache()
+*
+* Description : Flush a specific range in the cache memory 
+*
+* Argument(s) :     addr    the start address of the memory area to flush
+*                   len     the size of the memory area to flush
+* 
+* Return(s)   : none.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : The function uses microblaze_flush_dcache_range() which is part of Xilinx libraries  
+*********************************************************************************************************
+*/
+
+void  CPU_CacheDataFlush (void       *addr, 
+                          CPU_INT32U  len)
+{
+     microblaze_flush_dcache_range((CPU_INT32S)addr, len);           
+}
+
+/*
+*********************************************************************************************************
+*                                       CPU_InvalidateDCache()
+*
+* Description : Invalide a specific range in the cache memory
+*
+* Argument(s) :     addr    the start address of the memory area to invalidate
+*                   len     the size of the memory area to invalidate
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : The function uses microblaze_invalidate_dcache_range() which is part of Xilinx libraries  
+*********************************************************************************************************
+*/
+                                              
+void  CPU_CacheDataInvalidate (void        *addr,
+                               CPU_INT32U   len)
+{
+     microblaze_invalidate_dcache_range((CPU_INT32S)addr, len);                 
+}
+
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/cpu_cache.h b/src/ucos_v1_42/micrium_source/uC-CPU/cpu_cache.h
new file mode 100644
index 0000000..5c2a914
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/cpu_cache.h
@@ -0,0 +1,143 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           CACHE CPU MODULE
+*
+* Filename      : cpu_cache.h
+* Version       : V1.30.02
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This cache CPU header file is protected from multiple pre-processor inclusion through use of 
+*               the  cache CPU module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_CACHE_MODULE_PRESENT                               /* See Note #1.                                         */
+#define  CPU_CACHE_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   CPU_CACHE_MODULE
+#define  CPU_CACHE_EXT
+#else
+#define  CPU_CACHE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                         CACHE CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifndef CPU_CFG_CACHE_MGMT_EN
+#define CPU_CFG_CACHE_MGMT_EN  DEF_DISABLED
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      CACHE OPERATIONS DEFINES
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)
+#ifndef  CPU_DCACHE_RANGE_FLUSH
+#define  CPU_DCACHE_RANGE_FLUSH(addr_start, len)  CPU_DCache_RangeFlush(addr_start, len)
+#endif /* CPU_DCACHE_RANGE_FLUSH */
+#else
+#define  CPU_DCACHE_RANGE_FLUSH(addr_start, len)
+#endif /* CPU_CFG_CACHE_MGMT_EN) */
+
+
+#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)
+#ifndef  CPU_DCACHE_RANGE_INV
+#define  CPU_DCACHE_RANGE_INV(addr_start, len)  CPU_DCache_RangeInv(addr_start, len)
+#endif /* CPU_DCACHE_RANGE_INV */
+#else
+#define  CPU_DCACHE_RANGE_INV(addr_start, len)
+#endif /* CPU_CFG_CACHE_MGMT_EN) */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+void  CPU_Cache_Init       (void);
+
+void  CPU_DCache_RangeFlush(void      *addr_start,
+                            CPU_ADDR   len);
+
+void  CPU_DCache_RangeInv  (void      *addr_start,
+                            CPU_ADDR   len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CPU_CFG_CACHE_MGMT_EN */
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'cpu_core.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of CPU core module include.                      */
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/cpu_core.c b/src/ucos_v1_42/micrium_source/uC-CPU/cpu_core.c
new file mode 100644
index 0000000..7c8c751
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/cpu_core.c
@@ -0,0 +1,2411 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           CORE CPU MODULE
+*
+* Filename      : cpu_core.c
+* Version       : V1.30.02
+* Programmer(s) : SR
+*                 ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    CPU_CORE_MODULE
+#include  "cpu_core.h"
+
+#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)
+#include  "cpu_cache.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* Pop cnt algorithm csts.                              */
+#define CRC_UTIL_POPCNT_MASK01010101_32  0x55555555u
+#define CRC_UTIL_POPCNT_MASK00110011_32  0x33333333u
+#define CRC_UTIL_POPCNT_MASK00001111_32  0x0F0F0F0Fu
+#define CRC_UTIL_POPCNT_POWERSOF256_32   0x01010101u
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  CPU COUNT LEAD ZEROs LOOKUP TABLE
+*
+* Note(s) : (1) Index into bit pattern table determines the number of leading zeros in an 8-bit value :
+*
+*                         b07  b06  b05  b04  b03  b02  b01  b00    # Leading Zeros
+*                         ---  ---  ---  ---  ---  ---  ---  ---    ---------------
+*                          1    x    x    x    x    x    x    x            0
+*                          0    1    x    x    x    x    x    x            1
+*                          0    0    1    x    x    x    x    x            2
+*                          0    0    0    1    x    x    x    x            3
+*                          0    0    0    0    1    x    x    x            4
+*                          0    0    0    0    0    1    x    x            5
+*                          0    0    0    0    0    0    1    x            6
+*                          0    0    0    0    0    0    0    1            7
+*                          0    0    0    0    0    0    0    0            8
+*********************************************************************************************************
+*/
+
+#if (!(defined(CPU_CFG_LEAD_ZEROS_ASM_PRESENT)) || \
+      (CPU_CFG_DATA_SIZE_MAX > CPU_CFG_DATA_SIZE))
+static  const  CPU_INT08U  CPU_CntLeadZerosTbl[256] = {                             /* Data vals :                      */
+/*   0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F   */
+    8u,  7u,  6u,  6u,  5u,  5u,  5u,  5u,  4u,  4u,  4u,  4u,  4u,  4u,  4u,  4u,  /*   0x00 to 0x0F                   */
+    3u,  3u,  3u,  3u,  3u,  3u,  3u,  3u,  3u,  3u,  3u,  3u,  3u,  3u,  3u,  3u,  /*   0x10 to 0x1F                   */
+    2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  /*   0x20 to 0x2F                   */
+    2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  2u,  /*   0x30 to 0x3F                   */
+    1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  /*   0x40 to 0x4F                   */
+    1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  /*   0x50 to 0x5F                   */
+    1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  /*   0x60 to 0x6F                   */
+    1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  1u,  /*   0x70 to 0x7F                   */
+    0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  /*   0x80 to 0x8F                   */
+    0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  /*   0x90 to 0x9F                   */
+    0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  /*   0xA0 to 0xAF                   */
+    0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  /*   0xB0 to 0xBF                   */
+    0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  /*   0xC0 to 0xCF                   */
+    0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  /*   0xD0 to 0xDF                   */
+    0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  /*   0xE0 to 0xEF                   */
+    0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u,  0u   /*   0xF0 to 0xFF                   */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+CPU_INT32U  const  CPU_EndiannessTest = 0x12345678LU;               /* Variable to test CPU endianness.                 */
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if    (CPU_CFG_NAME_EN   == DEF_ENABLED)                           /* ---------------- CPU NAME FNCTS ---------------- */
+static  void        CPU_NameInit         (void);
+#endif
+
+
+                                                                    /* ----------------- CPU TS FNCTS ----------------- */
+#if   ((CPU_CFG_TS_EN     == DEF_ENABLED) || \
+       (CPU_CFG_TS_TMR_EN == DEF_ENABLED))
+static  void        CPU_TS_Init          (void);
+#endif
+
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN                                     /* ---------- CPU INT DIS TIME MEAS FNCTS --------- */
+static  void        CPU_IntDisMeasInit   (void);
+
+static  CPU_TS_TMR  CPU_IntDisMeasMaxCalc(CPU_TS_TMR  time_tot_cnts);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             CPU_Init()
+*
+* Description : (1) Initialize CPU module :
+*
+*                   (a) Initialize CPU timestamps
+*                   (b) Initialize CPU interrupts disabled time measurements
+*                   (c) Initialize CPU host name
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Your Product's Application.
+*
+*               This function is a CPU initialization function & MAY be called by application/
+*               initialization function(s).
+*
+* Note(s)     : (2) CPU_Init() MUST be called ... :
+*
+*                   (a) ONLY ONCE from a product's application; ...
+*                   (b) BEFORE product's application calls any core CPU module function(s)
+*
+*               (3) The following initialization functions MUST be sequenced as follows :
+*
+*                   (a) CPU_TS_Init()           SHOULD precede ALL calls to other CPU timestamp functions
+*
+*                   (b) CPU_IntDisMeasInit()    SHOULD precede ALL calls to CPU_CRITICAL_ENTER()/CPU_CRITICAL_EXIT()
+*                                                   & other CPU interrupts disabled time measurement functions
+*********************************************************************************************************
+*/
+
+void  CPU_Init (void)
+{
+                                                                /* --------------------- INIT TS ---------------------- */
+#if ((CPU_CFG_TS_EN     == DEF_ENABLED) || \
+     (CPU_CFG_TS_TMR_EN == DEF_ENABLED))
+    CPU_TS_Init();                                              /* See Note #3a.                                        */
+#endif
+                                                                /* -------------- INIT INT DIS TIME MEAS -------------- */
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+    CPU_IntDisMeasInit();                                       /* See Note #3b.                                        */
+#endif
+
+                                                                /* ------------------ INIT CPU NAME ------------------- */
+#if (CPU_CFG_NAME_EN == DEF_ENABLED)
+     CPU_NameInit();
+#endif
+
+#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)
+     CPU_Cache_Init();
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_SW_Exception()
+*
+* Description : Trap unrecoverable software exception.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) CPU_SW_Exception() deadlocks the current code execution -- whether multi-tasked/
+*                   -processed/-threaded or single-threaded -- when the current code execution cannot
+*                   gracefully recover or report a fault or exception condition.
+*
+*                   See also 'cpu_core.h  CPU_SW_EXCEPTION()  Note #1'.
+*********************************************************************************************************
+*/
+
+void  CPU_SW_Exception (void)
+{
+    while (DEF_ON) {
+        ;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            CPU_NameClr()
+*
+* Description : Clear CPU Name.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_NameInit(),
+*               Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_NAME_EN == DEF_ENABLED)
+void  CPU_NameClr (void)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    Mem_Clr((void     *)&CPU_Name[0],
+            (CPU_SIZE_T) CPU_CFG_NAME_SIZE);
+    CPU_CRITICAL_EXIT();
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            CPU_NameGet()
+*
+* Description : Get CPU host name.
+*
+* Argument(s) : p_name      Pointer to an ASCII character array that will receive the return CPU host
+*                               name ASCII string from this function (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               CPU_ERR_NONE                    CPU host name successfully returned.
+*                               CPU_ERR_NULL_PTR                Argument 'p_name' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) The size of the ASCII character array that will receive the return CPU host name
+*                   ASCII string :
+*
+*                   (a) MUST   be greater than or equal to the current CPU host name's ASCII string
+*                           size including the terminating NULL character;
+*                   (b) SHOULD be greater than or equal to CPU_CFG_NAME_SIZE
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_NAME_EN == DEF_ENABLED)
+void  CPU_NameGet (CPU_CHAR  *p_name,
+                   CPU_ERR   *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    if (p_err == (CPU_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_name == (CPU_CHAR *)0) {
+       *p_err = CPU_ERR_NULL_PTR;
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();
+   (void)Str_Copy_N(p_name,
+                   &CPU_Name[0],
+                    CPU_CFG_NAME_SIZE);
+    CPU_CRITICAL_EXIT();
+
+   *p_err = CPU_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            CPU_NameSet()
+*
+* Description : Set CPU host name.
+*
+* Argument(s) : p_name      Pointer to CPU host name to set.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               CPU_ERR_NONE                    CPU host name successfully set.
+*                               CPU_ERR_NULL_PTR                Argument 'p_name' passed a NULL pointer.
+*                               CPU_ERR_NAME_SIZE               Invalid CPU host name size (see Note #1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) 'p_name' ASCII string size, including the terminating NULL character, MUST be less
+*                    than or equal to CPU_CFG_NAME_SIZE.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_NAME_EN == DEF_ENABLED)
+void  CPU_NameSet (const  CPU_CHAR  *p_name,
+                          CPU_ERR   *p_err)
+{
+    CPU_SIZE_T  len;
+    CPU_SR_ALLOC();
+
+
+    if (p_err == (CPU_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_name == (const CPU_CHAR *)0) {
+       *p_err = CPU_ERR_NULL_PTR;
+        return;
+    }
+
+    len = Str_Len_N(p_name,
+                    CPU_CFG_NAME_SIZE);
+    if (len < CPU_CFG_NAME_SIZE) {                              /* If       cfg name len < max name size, ...           */
+        CPU_CRITICAL_ENTER();
+       (void)Str_Copy_N(&CPU_Name[0],                           /* ... copy cfg name to CPU host name.                  */
+                         p_name,
+                         CPU_CFG_NAME_SIZE);
+        CPU_CRITICAL_EXIT();
+       *p_err = CPU_ERR_NONE;
+
+    } else {
+       *p_err = CPU_ERR_NAME_SIZE;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_TS_Get32()
+*
+* Description : Get current 32-bit CPU timestamp.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Current 32-bit CPU timestamp (in timestamp timer counts).
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) When applicable, the amount of time measured by CPU timestamps is calculated by
+*                   either of the following equations :
+*
+*                       (a) Time measured  =  Number timer counts  *  Timer period
+*
+*                               where
+*
+*                                   Number timer counts     Number of timer counts measured
+*                                   Timer period            Timer's period in some units of
+*                                                               (fractional) seconds
+*                                   Time measured           Amount of time measured, in same
+*                                                               units of (fractional) seconds
+*                                                               as the Timer period
+*
+*                                              Number timer counts
+*                       (b) Time measured  =  ---------------------
+*                                                Timer frequency
+*
+*                               where
+*
+*                                   Number timer counts     Number of timer counts measured
+*                                   Timer frequency         Timer's frequency in some units
+*                                                               of counts per second
+*                                   Time measured           Amount of time measured, in seconds
+*
+*                   See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TS_TmrRd()  Note #2c1'.
+*
+*               (2) In case the CPU timestamp timer has lower precision than the 32-bit CPU timestamp;
+*                   its precision is extended via periodic updates by accumulating the deltas of the
+*                   timestamp timer count values into the higher-precision 32-bit CPU timestamp.
+*
+*               (3) After initialization, 'CPU_TS_32_Accum' & 'CPU_TS_32_TmrPrev' MUST ALWAYS
+*                   be accessed AND updated exclusively with interrupts disabled -- but NOT
+*                   with critical sections.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_32_EN == DEF_ENABLED)
+CPU_TS32  CPU_TS_Get32 (void)
+{
+    CPU_TS32    ts;
+#if (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_32)
+    CPU_TS_TMR  tmr_cur;
+    CPU_TS_TMR  tmr_delta;
+    CPU_SR_ALLOC();
+
+#endif
+
+#if (CPU_CFG_TS_TMR_SIZE >= CPU_WORD_SIZE_32)
+    ts = (CPU_TS32)CPU_TS_TmrRd();                                  /* Get cur ts tmr val (in 32-bit ts cnts).          */
+
+#else
+    CPU_INT_DIS();
+    tmr_cur            = (CPU_TS_TMR) CPU_TS_TmrRd();               /* Get cur ts tmr val (in ts tmr cnts).             */
+    tmr_delta          = (CPU_TS_TMR)(tmr_cur - CPU_TS_32_TmrPrev); /* Calc      delta ts tmr cnts.                     */
+    CPU_TS_32_Accum   += (CPU_TS32  ) tmr_delta;                    /* Inc ts by delta ts tmr cnts (see Note #2).       */
+    CPU_TS_32_TmrPrev  = (CPU_TS_TMR) tmr_cur;                      /* Save cur ts tmr cnts for next update.            */
+    ts                 = (CPU_TS32  ) CPU_TS_32_Accum;
+    CPU_INT_EN();
+#endif
+
+    return (ts);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_TS_Get64()
+*
+* Description : Get current 64-bit CPU timestamp.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Current 64-bit CPU timestamp (in timestamp timer counts).
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) When applicable, the amount of time measured by CPU timestamps is calculated by
+*                   either of the following equations :
+*
+*                       (a) Time measured  =  Number timer counts  *  Timer period
+*
+*                               where
+*
+*                                   Number timer counts     Number of timer counts measured
+*                                   Timer period            Timer's period in some units of
+*                                                               (fractional) seconds
+*                                   Time measured           Amount of time measured, in same
+*                                                               units of (fractional) seconds
+*                                                               as the Timer period
+*
+*                                              Number timer counts
+*                       (b) Time measured  =  ---------------------
+*                                                Timer frequency
+*
+*                               where
+*
+*                                   Number timer counts     Number of timer counts measured
+*                                   Timer frequency         Timer's frequency in some units
+*                                                               of counts per second
+*                                   Time measured           Amount of time measured, in seconds
+*
+*                   See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TS_TmrRd()  Note #2c1'.
+*
+*               (2) In case the CPU timestamp timer has lower precision than the 64-bit CPU timestamp;
+*                   its precision is extended via periodic updates by accumulating the deltas of the
+*                   timestamp timer count values into the higher-precision 64-bit CPU timestamp.
+*
+*               (3) After initialization, 'CPU_TS_64_Accum' & 'CPU_TS_64_TmrPrev' MUST ALWAYS
+*                   be accessed AND updated exclusively with interrupts disabled -- but NOT
+*                   with critical sections.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_64_EN == DEF_ENABLED)
+CPU_TS64  CPU_TS_Get64 (void)
+{
+    CPU_TS64    ts;
+#if (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_64)
+    CPU_TS_TMR  tmr_cur;
+    CPU_TS_TMR  tmr_delta;
+    CPU_SR_ALLOC();
+#endif
+
+
+#if (CPU_CFG_TS_TMR_SIZE >= CPU_WORD_SIZE_64)
+    ts = (CPU_TS64)CPU_TS_TmrRd();                                  /* Get cur ts tmr val (in 64-bit ts cnts).          */
+
+#else
+    CPU_INT_DIS();
+    tmr_cur            = (CPU_TS_TMR) CPU_TS_TmrRd();               /* Get cur ts tmr val (in ts tmr cnts).             */
+    tmr_delta          = (CPU_TS_TMR)(tmr_cur - CPU_TS_64_TmrPrev); /* Calc      delta ts tmr cnts.                     */
+    CPU_TS_64_Accum   += (CPU_TS64  ) tmr_delta;                    /* Inc ts by delta ts tmr cnts (see Note #2).       */
+    CPU_TS_64_TmrPrev  = (CPU_TS_TMR) tmr_cur;                      /* Save cur ts tmr cnts for next update.            */
+    ts                 = (CPU_TS64  ) CPU_TS_64_Accum;
+    CPU_INT_EN();
+#endif
+
+    return (ts);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_TS_Update()
+*
+* Description : Update current CPU timestamp(s).
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application/BSP periodic time handler (see Note #1).
+*
+*               This function is a CPU timestamp BSP function & SHOULD be called only by appropriate
+*               application/BSP function(s).
+*
+* Note(s)     : (1) (a) CPU timestamp(s) MUST be updated periodically by some application (or BSP) time
+*                       handler in order to (adequately) maintain CPU timestamp(s)' time.
+*
+*                   (b) CPU timestamp(s) MUST be updated more frequently than the CPU timestamp timer
+*                       overflows; otherwise, CPU timestamp(s) will lose time.
+*
+*                       See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TS_TmrRd()  Note #2c2'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_EN == DEF_ENABLED)
+void  CPU_TS_Update (void)
+{
+#if ((CPU_CFG_TS_32_EN    == DEF_ENABLED)  && \
+     (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_32))
+   (void)CPU_TS_Get32();
+#endif
+
+#if ((CPU_CFG_TS_64_EN    == DEF_ENABLED)  && \
+     (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_64))
+   (void)CPU_TS_Get64();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_TS_TmrFreqGet()
+*
+* Description : Get CPU timestamp's timer frequency.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               CPU_ERR_NONE                    CPU timestamp's timer frequency successfully
+*                                                                   returned.
+*                               CPU_ERR_TS_FREQ_INVALID         CPU timestamp's timer frequency invalid &/or
+*                                                                   NOT yet configured.
+*
+* Return(s)   : CPU timestamp's timer frequency (in Hertz), if NO error(s).
+*
+*               0,                                          otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+CPU_TS_TMR_FREQ  CPU_TS_TmrFreqGet (CPU_ERR  *p_err)
+{
+    CPU_TS_TMR_FREQ  freq_hz;
+
+
+    if (p_err == (CPU_ERR *)0) {
+        CPU_SW_EXCEPTION(0);
+    }
+
+    freq_hz =  CPU_TS_TmrFreq_Hz;
+   *p_err   = (freq_hz != 0u) ? CPU_ERR_NONE : CPU_ERR_TS_FREQ_INVALID;
+
+    return (freq_hz);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_TS_TmrFreqSet()
+*
+* Description : Set CPU timestamp's timer frequency.
+*
+* Argument(s) : freq_hz     Frequency (in Hertz) to set for CPU timestamp's timer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_TS_TmrInit(),
+*               Application/BSP initialization function(s).
+*
+*               This function is a CPU module BSP function & SHOULD be called only by appropriate
+*               application/BSP function(s) [see Note #1].
+*
+* Note(s)     : (1) (a) (1) CPU timestamp timer frequency is NOT required for internal CPU timestamp
+*                           operations but may OPTIONALLY be configured by CPU_TS_TmrInit() or other
+*                           application/BSP initialization functions.
+*
+*                       (2) CPU timestamp timer frequency MAY be used with optional CPU_TSxx_to_uSec()
+*                           to convert CPU timestamps from timer counts into microseconds.
+*
+*                           See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TSxx_to_uSec()  Note #2a'.
+*
+*                   (b) CPU timestamp timer period SHOULD be less than the typical measured time but MUST
+*                       be less than the maximum measured time; otherwise, timer resolution inadequate to
+*                       measure desired times.
+*
+*                       See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TSxx_to_uSec()  Note #2b'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+void  CPU_TS_TmrFreqSet (CPU_TS_TMR_FREQ  freq_hz)
+{
+    CPU_TS_TmrFreq_Hz = freq_hz;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     CPU_IntDisMeasMaxCurReset()
+*
+* Description : Reset current maximum interrupts disabled time.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Maximum interrupts disabled time (in CPU timestamp timer counts) before resetting.
+*
+*               See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TS_TmrRd()      Note #2c'
+*                      & 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TSxx_to_uSec()  Note #2'.
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) After initialization, 'CPU_IntDisMeasMaxCur_cnts' MUST ALWAYS be accessed
+*                   exclusively with interrupts disabled -- but NOT with critical sections.
+*********************************************************************************************************
+*/
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+CPU_TS_TMR  CPU_IntDisMeasMaxCurReset (void)
+{
+    CPU_TS_TMR  time_max_cnts;
+    CPU_SR_ALLOC();
+
+
+    time_max_cnts             = CPU_IntDisMeasMaxCurGet();
+    CPU_INT_DIS();
+    CPU_IntDisMeasMaxCur_cnts = 0u;
+    CPU_INT_EN();
+
+    return (time_max_cnts);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      CPU_IntDisMeasMaxCurGet()
+*
+* Description : Get current maximum interrupts disabled time.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Current maximum interrupts disabled time (in CPU timestamp timer counts).
+*
+*               See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TS_TmrRd()      Note #2c'
+*                      & 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TSxx_to_uSec()  Note #2'.
+*
+* Caller(s)   : CPU_IntDisMeasMaxCurReset(),
+*               Application.
+*
+*               This function is a CPU module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) After initialization, 'CPU_IntDisMeasMaxCur_cnts' MUST ALWAYS be accessed
+*                   exclusively with interrupts disabled -- but NOT with critical sections.
+*********************************************************************************************************
+*/
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+CPU_TS_TMR  CPU_IntDisMeasMaxCurGet (void)
+{
+    CPU_TS_TMR  time_tot_cnts;
+    CPU_TS_TMR  time_max_cnts;
+    CPU_SR_ALLOC();
+
+
+    CPU_INT_DIS();
+    time_tot_cnts = CPU_IntDisMeasMaxCur_cnts;
+    CPU_INT_EN();
+    time_max_cnts = CPU_IntDisMeasMaxCalc(time_tot_cnts);
+
+    return (time_max_cnts);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CPU_IntDisMeasMaxGet()
+*
+* Description : Get (non-resetable) maximum interrupts disabled time.
+*
+* Argument(s) : none.
+*
+* Return(s)   : (Non-resetable) maximum interrupts disabled time (in CPU timestamp timer counts).
+*
+*               See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TS_TmrRd()      Note #2c'
+*                      & 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TSxx_to_uSec()  Note #2'.
+*
+* Caller(s)   : CPU_IntDisMeasInit(),
+*               Application.
+*
+*               This function is a CPU module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) After initialization, 'CPU_IntDisMeasMax_cnts' MUST ALWAYS be accessed
+*                   exclusively with interrupts disabled -- but NOT with critical sections.
+*********************************************************************************************************
+*/
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+CPU_TS_TMR  CPU_IntDisMeasMaxGet (void)
+{
+    CPU_TS_TMR  time_tot_cnts;
+    CPU_TS_TMR  time_max_cnts;
+    CPU_SR_ALLOC();
+
+
+    CPU_INT_DIS();
+    time_tot_cnts = CPU_IntDisMeasMax_cnts;
+    CPU_INT_EN();
+    time_max_cnts = CPU_IntDisMeasMaxCalc(time_tot_cnts);
+
+    return (time_max_cnts);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_IntDisMeasStart()
+*
+* Description : Start interrupts disabled time measurement.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_CRITICAL_ENTER().
+*
+*               This function is an INTERNAL CPU module function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+void  CPU_IntDisMeasStart (void)
+{
+    CPU_IntDisMeasCtr++;
+    if (CPU_IntDisNestCtr == 0u) {                                  /* If ints NOT yet dis'd, ...                       */
+        CPU_IntDisMeasStart_cnts = CPU_TS_TmrRd();                  /* ... get ints dis'd start time.                   */
+    }
+    CPU_IntDisNestCtr++;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_IntDisMeasStop()
+*
+* Description : Stop interrupts disabled time measurement.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_CRITICAL_EXIT().
+*
+*               This function is an INTERNAL CPU module function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) (a) The total amount of time interrupts are disabled by system &/or application code
+*                       during critical sections is calculated by the following equations :
+*
+*                       (1) When interrupts disabled time measurements are disabled :
+*
+*
+*                               |   CRITICAL  |                           |   CRITICAL  |
+*                               |<- SECTION ->|                           |<- SECTION ->|
+*                               |    ENTER    |                           |    EXIT     |
+*
+*                            Disable                                    Enable
+*                           Interrupts                                Interrupts
+*
+*                               ||           ||                           ||           ||
+*                               ||           ||                           ||           ||
+*                               ||       |   ||<------------------------->||       |   ||
+*                               ||       |<->||             |             ||<----->|   ||
+*                               ||       | | ||             |             ||   |   |   ||
+*                                        | |                |                  |   |
+*                                   interrupts            time                 interrupts
+*                                    disabled                 interrupts       |enabled
+*                                          |                   disabled        |
+*                                          |              (via application)    |
+*                                       time                                 time
+*                                           interrupts                           interrupts
+*                                         disabled ovrhd                        enabled ovrhd
+*
+*
+*                           (A) time            =  [ time            -  time           ]  -  time
+*                                   interrupts     [     interrupts         interrupts ]         total
+*                                    disabled      [      enabled            disabled  ]         ovrhd
+*                               (via application)
+*
+*
+*                           (B) time       =  time              +  time
+*                                   total         interrupts           interrupts
+*                                   ovrhd        enabled ovrhd       disabled ovrhd
+*
+*
+*                                   where
+*
+*                                           time                    time interrupts are disabled between
+*                                               interrupts              first critical section enter &
+*                                                disabled               last  critical section exit (i.e.
+*                                           (via application)           minus total overhead time)
+*
+*                                           time                    time when interrupts are disabled
+*                                               interrupts
+*                                                disabled
+*
+*                                           time                    time when interrupts are  enabled
+*                                               interrupts
+*                                                enabled
+*
+*
+*                                           time                    total overhead time to disable/enable
+*                                               total                   interrupts during critical section
+*                                               ovrhd                   enter & exit
+*
+*                                           time                    total overhead time to disable interrupts
+*                                               interrupts              during critical section enter
+*                                             disabled ovrhd
+*
+*                                           time                    total overhead time to enable  interrupts
+*                                               interrupts              during critical section exit
+*                                              enabled ovrhd
+*
+*
+*                       (2) When interrupts disabled time measurements are enabled :
+*
+*
+*        |                                    |                           |                                       |
+*        |<----- CRITICAL SECTION ENTER ----->|                           |<------- CRITICAL SECTION EXIT ------->|
+*        |                                    |                           |                                       |
+*
+*                   Time                                                 Time
+*     Disable    Measurement                                          Measurement                  Enable
+*    Interrupts     Start                                                Stop                    Interrupts
+*
+*        ||           |                      ||                           ||                         |           ||
+*        ||           |                      ||                           ||                         |           ||
+*        ||           |        |             ||<------------------------->||               |         |           ||
+*        ||       |   |        |<----------->||             |             ||<------------->|         |       |   ||
+*        ||       |   |        |      |      ||             |             ||       |       |         |       |   ||
+*                 |            |      |                     |                      |       |                 |
+*            interrupts       get     |                   time                     |      get            interrupts
+*             disabled    start time  |                       interrupts           |   stop time          enabled
+*                            meas     |                        disabled            |     meas
+*                                   time                  (via application)      time
+*                                       start meas                                   stop meas
+*                                         ovrhd                                        ovrhd
+*
+*
+*                           (A) time            =  [ time       -  time      ]  -  time
+*                                   interrupts     [      stop         start ]         total meas
+*                                    disabled      [      meas         meas  ]           ovrhd
+*                               (via application)
+*
+*
+*                           (B) time            =  time            +  time
+*                                   total meas         start meas         stop meas
+*                                     ovrhd              ovrhd              ovrhd
+*
+*
+*                                   where
+*
+*                                           time                    time interrupts are disabled between first
+*                                               interrupts              critical section enter & last critical
+*                                                disabled               section exit (i.e. minus measurement
+*                                           (via application)           overhead time; however, this does NOT
+*                                                                       include any overhead time to disable
+*                                                                       or enable interrupts during critical
+*                                                                       section enter & exit)
+*
+*                                           time                    time of disable interrupts start time
+*                                               start                   measurement (in timer counts)
+*                                               meas
+*
+*                                           time                    time of disable interrupts stop  time
+*                                               stop                    measurement (in timer counts)
+*                                               meas
+*
+*
+*                                           time                    total overhead time to start/stop disabled
+*                                               total meas              interrupts time measurements (in timer
+*                                                 ovrhd                 counts)
+*
+*                                           time                    total overhead time after getting start
+*                                               start meas              time until end of start measurement
+*                                                 ovrhd                 function  (in timer counts)
+*
+*                                           time                    total overhead time from beginning of stop
+*                                               stop meas               measurement function until after getting
+*                                                 ovrhd                 stop time (in timer counts)
+*
+*
+*                   (b) (1) (A) In order to correctly handle unsigned subtraction overflows of start times
+*                               from stop times, CPU timestamp timer count values MUST be returned via
+*                               word-size-configurable 'CPU_TS_TMR' data type.
+*
+*                               See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TS_TmrRd()  Note #2a'.
+*
+*                           (B) Since unsigned subtraction of start times from stop times assumes increasing
+*                               values, timestamp timer count values MUST increase with each time count.
+*
+*                               See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TS_TmrRd()  Note #2b'.
+*
+*                       (2) (A) To expedite & reduce interrupts disabled time measurement overhead; only the
+*                               subtraction of start times from stop times is performed.
+*
+*                           (B) The final calculations to subtract the interrupts disabled time measurement
+*                               overhead is performed asynchronously in appropriate API functions.
+*
+*                               See also 'CPU_IntDisMeasMaxCalc()  Note #1b'.
+*********************************************************************************************************
+*/
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+void  CPU_IntDisMeasStop (void)
+{
+    CPU_TS_TMR  time_ints_disd_cnts;
+
+
+    CPU_IntDisNestCtr--;
+    if (CPU_IntDisNestCtr == 0u) {                                  /* If ints NO longer dis'd,        ...              */
+        CPU_IntDisMeasStop_cnts = CPU_TS_TmrRd();                   /* ... get  ints dis'd stop time & ...              */
+                                                                    /* ... calc ints dis'd tot  time (see Note #1b2A).  */
+        time_ints_disd_cnts     = CPU_IntDisMeasStop_cnts -
+                                  CPU_IntDisMeasStart_cnts;
+                                                                    /* Calc max ints dis'd times.                       */
+        if (CPU_IntDisMeasMaxCur_cnts < time_ints_disd_cnts) {
+            CPU_IntDisMeasMaxCur_cnts = time_ints_disd_cnts;
+        }
+        if (CPU_IntDisMeasMax_cnts    < time_ints_disd_cnts) {
+            CPU_IntDisMeasMax_cnts    = time_ints_disd_cnts;
+        }
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_CntLeadZeros()
+*
+* Description : Count the number of contiguous, most-significant, leading zero bits in a data value.
+*
+* Argument(s) : val         Data value to count leading zero bits.
+*
+* Return(s)   : Number of contiguous, most-significant, leading zero bits in 'val', if NO error(s).
+*
+*               DEF_INT_CPU_U_MAX_VAL,                                              otherwise.
+*
+* Caller(s)   : CPU_CntTrailZeros(),
+*               Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) (a) Supports the following data value sizes :
+*
+*                       (1)  8-bits
+*                       (2) 16-bits
+*                       (3) 32-bits
+*                       (4) 64-bits
+*
+*                       See also 'cpu_def.h  CPU WORD CONFIGURATION  Note #1'.
+*
+*                   (b) (1) For  8-bit values :
+*
+*                                  b07  b06  b05  b04  b03  b02  b01  b00    # Leading Zeros
+*                                  ---  ---  ---  ---  ---  ---  ---  ---    ---------------
+*                                   1    x    x    x    x    x    x    x            0
+*                                   0    1    x    x    x    x    x    x            1
+*                                   0    0    1    x    x    x    x    x            2
+*                                   0    0    0    1    x    x    x    x            3
+*                                   0    0    0    0    1    x    x    x            4
+*                                   0    0    0    0    0    1    x    x            5
+*                                   0    0    0    0    0    0    1    x            6
+*                                   0    0    0    0    0    0    0    1            7
+*                                   0    0    0    0    0    0    0    0            8
+*
+*
+*                       (2) For 16-bit values :
+*
+*                             b15  b14  b13  ...  b04  b03  b02  b01  b00    # Leading Zeros
+*                             ---  ---  ---       ---  ---  ---  ---  ---    ---------------
+*                              1    x    x         x    x    x    x    x            0
+*                              0    1    x         x    x    x    x    x            1
+*                              0    0    1         x    x    x    x    x            2
+*                              :    :    :         :    :    :    :    :            :
+*                              :    :    :         :    :    :    :    :            :
+*                              0    0    0         1    x    x    x    x           11
+*                              0    0    0         0    1    x    x    x           12
+*                              0    0    0         0    0    1    x    x           13
+*                              0    0    0         0    0    0    1    x           14
+*                              0    0    0         0    0    0    0    1           15
+*                              0    0    0         0    0    0    0    0           16
+*
+*                       (3) For 32-bit values :
+*
+*                             b31  b30  b29  ...  b04  b03  b02  b01  b00    # Leading Zeros
+*                             ---  ---  ---       ---  ---  ---  ---  ---    ---------------
+*                              1    x    x         x    x    x    x    x            0
+*                              0    1    x         x    x    x    x    x            1
+*                              0    0    1         x    x    x    x    x            2
+*                              :    :    :         :    :    :    :    :            :
+*                              :    :    :         :    :    :    :    :            :
+*                              0    0    0         1    x    x    x    x           27
+*                              0    0    0         0    1    x    x    x           28
+*                              0    0    0         0    0    1    x    x           29
+*                              0    0    0         0    0    0    1    x           30
+*                              0    0    0         0    0    0    0    1           31
+*                              0    0    0         0    0    0    0    0           32
+*
+*
+*                       (4) For 64-bit values :
+*
+*                             b63  b62  b61  ...  b04  b03  b02  b01  b00    # Leading Zeros
+*                             ---  ---  ---       ---  ---  ---  ---  ---    ---------------
+*                              1    x    x         x    x    x    x    x            0
+*                              0    1    x         x    x    x    x    x            1
+*                              0    0    1         x    x    x    x    x            2
+*                              :    :    :         :    :    :    :    :            :
+*                              :    :    :         :    :    :    :    :            :
+*                              0    0    0         1    x    x    x    x           59
+*                              0    0    0         0    1    x    x    x           60
+*                              0    0    0         0    0    1    x    x           61
+*                              0    0    0         0    0    0    1    x           62
+*                              0    0    0         0    0    0    0    1           63
+*                              0    0    0         0    0    0    0    0           64
+*
+*
+*                       See also 'CPU COUNT LEAD ZEROs LOOKUP TABLE  Note #1'.
+*********************************************************************************************************
+*/
+
+#ifndef   CPU_CFG_LEAD_ZEROS_ASM_PRESENT
+CPU_DATA  CPU_CntLeadZeros (CPU_DATA  val)
+{
+    CPU_DATA  nbr_lead_zeros;
+
+
+#if   (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_08)
+    nbr_lead_zeros = CPU_CntLeadZeros08((CPU_INT08U)val);
+
+#elif (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16)
+    nbr_lead_zeros = CPU_CntLeadZeros16((CPU_INT16U)val);
+
+#elif (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32)
+    nbr_lead_zeros = CPU_CntLeadZeros32((CPU_INT32U)val);
+
+#elif (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_64)
+    nbr_lead_zeros = CPU_CntLeadZeros64((CPU_INT64U)val);
+
+#else                                                           /* See Note #1a.                                        */
+    nbr_lead_zeros = DEF_INT_CPU_U_MAX_VAL;
+#endif
+
+
+    return (nbr_lead_zeros);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_CntLeadZeros08()
+*
+* Description : Count the number of contiguous, most-significant, leading zero bits in an 8-bit data value.
+*
+* Argument(s) : val         Data value to count leading zero bits.
+*
+* Return(s)   : Number of contiguous, most-significant, leading zero bits in 'val'.
+*
+* Caller(s)   : CPU_CntLeadZeros(),
+*               CPU_CntTrailZeros08(),
+*               Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) Supports  8-bit values :
+*
+*                               b07  b06  b05  b04  b03  b02  b01  b00    # Leading Zeros
+*                               ---  ---  ---  ---  ---  ---  ---  ---    ---------------
+*                                1    x    x    x    x    x    x    x            0
+*                                0    1    x    x    x    x    x    x            1
+*                                0    0    1    x    x    x    x    x            2
+*                                0    0    0    1    x    x    x    x            3
+*                                0    0    0    0    1    x    x    x            4
+*                                0    0    0    0    0    1    x    x            5
+*                                0    0    0    0    0    0    1    x            6
+*                                0    0    0    0    0    0    0    1            7
+*                                0    0    0    0    0    0    0    0            8
+*
+*
+*                   See also 'CPU COUNT LEAD ZEROs LOOKUP TABLE  Note #1'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_08)
+CPU_DATA  CPU_CntLeadZeros08 (CPU_INT08U  val)
+{
+#if  (!((defined(CPU_CFG_LEAD_ZEROS_ASM_PRESENT)) && \
+        (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_08)))
+    CPU_DATA  ix;
+#endif
+    CPU_DATA  nbr_lead_zeros;
+
+                                                                                /* ---------- ASM-OPTIMIZED ----------- */
+#if ((defined(CPU_CFG_LEAD_ZEROS_ASM_PRESENT)) && \
+     (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_08))
+    nbr_lead_zeros  =  CPU_CntLeadZeros((CPU_DATA)val);
+    nbr_lead_zeros -= (CPU_CFG_DATA_SIZE - CPU_WORD_SIZE_08) * DEF_OCTET_NBR_BITS;
+
+
+#else                                                                           /* ----------- C-OPTIMIZED ------------ */
+                                                                                /* Chk bits [07:00] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+    ix              = (CPU_DATA)(val);                                          /* .. lookup tbl ix  = 'val' >>  0 bits */
+    nbr_lead_zeros  = (CPU_DATA)(CPU_CntLeadZerosTbl[ix]);                      /* .. plus nbr msb lead zeros =  0 bits.*/
+#endif
+
+
+    return (nbr_lead_zeros);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_CntLeadZeros16()
+*
+* Description : Count the number of contiguous, most-significant, leading zero bits in a 16-bit data value.
+*
+* Argument(s) : val         Data value to count leading zero bits.
+*
+* Return(s)   : Number of contiguous, most-significant, leading zero bits in 'val'.
+*
+* Caller(s)   : CPU_CntLeadZeros(),
+*               CPU_CntTrailZeros16(),
+*               Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) Supports 16-bit values :
+*
+*                          b15  b14  b13  ...  b04  b03  b02  b01  b00    # Leading Zeros
+*                          ---  ---  ---       ---  ---  ---  ---  ---    ---------------
+*                           1    x    x         x    x    x    x    x            0
+*                           0    1    x         x    x    x    x    x            1
+*                           0    0    1         x    x    x    x    x            2
+*                           :    :    :         :    :    :    :    :            :
+*                           :    :    :         :    :    :    :    :            :
+*                           0    0    0         1    x    x    x    x           11
+*                           0    0    0         0    1    x    x    x           12
+*                           0    0    0         0    0    1    x    x           13
+*                           0    0    0         0    0    0    1    x           14
+*                           0    0    0         0    0    0    0    1           15
+*                           0    0    0         0    0    0    0    0           16
+*
+*
+*                   See also 'CPU COUNT LEAD ZEROs LOOKUP TABLE  Note #1'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_16)
+CPU_DATA  CPU_CntLeadZeros16 (CPU_INT16U  val)
+{
+#if  (!((defined(CPU_CFG_LEAD_ZEROS_ASM_PRESENT)) && \
+        (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_16)))
+    CPU_DATA  ix;
+#endif
+    CPU_DATA  nbr_lead_zeros;
+
+                                                                                /* ---------- ASM-OPTIMIZED ----------- */
+#if ((defined(CPU_CFG_LEAD_ZEROS_ASM_PRESENT)) && \
+     (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_16))
+    nbr_lead_zeros  =  CPU_CntLeadZeros((CPU_DATA)val);
+    nbr_lead_zeros -= (CPU_CFG_DATA_SIZE - CPU_WORD_SIZE_16) * DEF_OCTET_NBR_BITS;
+
+
+#else                                                                           /* ----------- C-OPTIMIZED ------------ */
+    if (val > 0x00FFu) {                                                        /* Chk bits [15:08] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+        ix             = (CPU_DATA)((CPU_DATA)val >> 8u);                       /* .. lookup tbl ix  = 'val' >>  8 bits */
+        nbr_lead_zeros = (CPU_DATA)(CPU_CntLeadZerosTbl[ix]);                   /* .. plus nbr msb lead zeros =  0 bits.*/
+
+    } else {                                                                    /* Chk bits [07:00] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+        ix             = (CPU_DATA)(val);                                       /* .. lookup tbl ix  = 'val' >>  0 bits */
+        nbr_lead_zeros = (CPU_DATA)((CPU_DATA)CPU_CntLeadZerosTbl[ix] +  8u);   /* .. plus nbr msb lead zeros =  8 bits.*/
+    }
+#endif
+
+
+    return (nbr_lead_zeros);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_CntLeadZeros32()
+*
+* Description : Count the number of contiguous, most-significant, leading zero bits in a 32-bit data value.
+*
+* Argument(s) : val         Data value to count leading zero bits.
+*
+* Return(s)   : Number of contiguous, most-significant, leading zero bits in 'val'.
+*
+* Caller(s)   : CPU_CntLeadZeros(),
+*               CPU_CntTrailZeros32(),
+*               Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) Supports 32-bit values :
+*
+*                          b31  b30  b29  ...  b04  b03  b02  b01  b00    # Leading Zeros
+*                          ---  ---  ---       ---  ---  ---  ---  ---    ---------------
+*                           1    x    x         x    x    x    x    x            0
+*                           0    1    x         x    x    x    x    x            1
+*                           0    0    1         x    x    x    x    x            2
+*                           :    :    :         :    :    :    :    :            :
+*                           :    :    :         :    :    :    :    :            :
+*                           0    0    0         1    x    x    x    x           27
+*                           0    0    0         0    1    x    x    x           28
+*                           0    0    0         0    0    1    x    x           29
+*                           0    0    0         0    0    0    1    x           30
+*                           0    0    0         0    0    0    0    1           31
+*                           0    0    0         0    0    0    0    0           32
+*
+*
+*                   See also 'CPU COUNT LEAD ZEROs LOOKUP TABLE  Note #1'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_32)
+CPU_DATA  CPU_CntLeadZeros32 (CPU_INT32U  val)
+{
+#if  (!((defined(CPU_CFG_LEAD_ZEROS_ASM_PRESENT)) && \
+        (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_32)))
+    CPU_DATA  ix;
+#endif
+    CPU_DATA  nbr_lead_zeros;
+
+                                                                                /* ---------- ASM-OPTIMIZED ----------- */
+#if ((defined(CPU_CFG_LEAD_ZEROS_ASM_PRESENT)) && \
+     (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_32))
+    nbr_lead_zeros  =  CPU_CntLeadZeros((CPU_DATA)val);
+    nbr_lead_zeros -= (CPU_CFG_DATA_SIZE - CPU_WORD_SIZE_32) * DEF_OCTET_NBR_BITS;
+
+
+#else                                                                           /* ----------- C-OPTIMIZED ------------ */
+    if (val > 0x0000FFFFu) {
+        if (val > 0x00FFFFFFu) {                                                /* Chk bits [31:24] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+            ix             = (CPU_DATA)((CPU_DATA)(val >> 24u));                /* .. lookup tbl ix  = 'val' >> 24 bits */
+            nbr_lead_zeros = (CPU_DATA)(CPU_CntLeadZerosTbl[ix]);               /* .. plus nbr msb lead zeros =  0 bits.*/
+
+        } else {                                                                /* Chk bits [23:16] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+            ix             = (CPU_DATA)((CPU_DATA)(val >> 16u));                /* .. lookup tbl ix  = 'val' >> 16 bits */
+            nbr_lead_zeros = (CPU_DATA)((CPU_DATA)CPU_CntLeadZerosTbl[ix] +  8u);/* .. plus nbr msb lead zeros =  8 bits.*/
+        }
+
+    } else {
+        if (val > 0x000000FFu) {                                                /* Chk bits [15:08] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+            ix             = (CPU_DATA)((CPU_DATA)(val >>  8u));                /* .. lookup tbl ix  = 'val' >>  8 bits */
+            nbr_lead_zeros = (CPU_DATA)((CPU_DATA)CPU_CntLeadZerosTbl[ix] + 16u);/* .. plus nbr msb lead zeros = 16 bits.*/
+
+        } else {                                                                /* Chk bits [07:00] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+            ix             = (CPU_DATA)((CPU_DATA)(val >>  0u));                /* .. lookup tbl ix  = 'val' >>  0 bits */
+            nbr_lead_zeros = (CPU_DATA)((CPU_DATA)CPU_CntLeadZerosTbl[ix] + 24u);/* .. plus nbr msb lead zeros = 24 bits.*/
+        }
+    }
+#endif
+
+
+    return (nbr_lead_zeros);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_CntLeadZeros64()
+*
+* Description : Count the number of contiguous, most-significant, leading zero bits in a 64-bit data value.
+*
+* Argument(s) : val         Data value to count leading zero bits.
+*
+* Return(s)   : Number of contiguous, most-significant, leading zero bits in 'val'.
+*
+* Caller(s)   : CPU_CntLeadZeros(),
+*               CPU_CntTrailZeros64(),
+*               Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) Supports 64-bit values :
+*
+*                          b63  b62  b61  ...  b04  b03  b02  b01  b00    # Leading Zeros
+*                          ---  ---  ---       ---  ---  ---  ---  ---    ---------------
+*                           1    x    x         x    x    x    x    x            0
+*                           0    1    x         x    x    x    x    x            1
+*                           0    0    1         x    x    x    x    x            2
+*                           :    :    :         :    :    :    :    :            :
+*                           :    :    :         :    :    :    :    :            :
+*                           0    0    0         1    x    x    x    x           59
+*                           0    0    0         0    1    x    x    x           60
+*                           0    0    0         0    0    1    x    x           61
+*                           0    0    0         0    0    0    1    x           62
+*                           0    0    0         0    0    0    0    1           63
+*                           0    0    0         0    0    0    0    0           64
+*
+*
+*                   See also 'CPU COUNT LEAD ZEROs LOOKUP TABLE  Note #1'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_64)
+CPU_DATA  CPU_CntLeadZeros64 (CPU_INT64U  val)
+{
+#if  (!((defined(CPU_CFG_LEAD_ZEROS_ASM_PRESENT)) && \
+        (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_64)))
+    CPU_DATA  ix;
+#endif
+    CPU_DATA  nbr_lead_zeros;
+
+                                                                                /* ---------- ASM-OPTIMIZED ----------- */
+#if ((defined(CPU_CFG_LEAD_ZEROS_ASM_PRESENT)) && \
+     (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_64))
+    nbr_lead_zeros  =  CPU_CntLeadZeros((CPU_DATA)val);
+    nbr_lead_zeros -= (CPU_CFG_DATA_SIZE - CPU_WORD_SIZE_64) * DEF_OCTET_NBR_BITS;
+
+
+#else                                                                           /* ----------- C-OPTIMIZED ------------ */
+    if (val > 0x00000000FFFFFFFFu) {
+        if (val > 0x0000FFFFFFFFFFFFu) {
+            if (val > 0x00FFFFFFFFFFFFFFu) {                                    /* Chk bits [63:56] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+                ix             = (CPU_DATA)((CPU_INT64U)val >> 56u);            /* .. lookup tbl ix  = 'val' >> 56 bits */
+                nbr_lead_zeros = (CPU_DATA)(CPU_CntLeadZerosTbl[ix]);           /* .. plus nbr msb lead zeros =  0 bits.*/
+
+            } else {                                                            /* Chk bits [55:48] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+                ix             = (CPU_DATA)((CPU_INT64U)val >> 48u);            /* .. lookup tbl ix  = 'val' >> 48 bits */
+                nbr_lead_zeros = (CPU_DATA)((CPU_INT64U)CPU_CntLeadZerosTbl[ix] +  8u);/* .. plus nbr msb lead zeros =  8 bits.*/
+            }
+
+        } else {
+            if (val > 0x000000FFFFFFFFFFu) {                                    /* Chk bits [47:40] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+                ix             = (CPU_DATA)((CPU_INT64U)val >> 40u);            /* .. lookup tbl ix  = 'val' >> 40 bits */
+                nbr_lead_zeros = (CPU_DATA)((CPU_INT64U)CPU_CntLeadZerosTbl[ix] + 16u);/* .. plus nbr msb lead zeros = 16 bits.*/
+
+            } else {                                                            /* Chk bits [39:32] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+                ix             = (CPU_DATA)((CPU_INT64U)val >> 32u);            /* .. lookup tbl ix  = 'val' >> 32 bits */
+                nbr_lead_zeros = (CPU_DATA)((CPU_INT64U)CPU_CntLeadZerosTbl[ix] + 24u);/* .. plus nbr msb lead zeros = 24 bits.*/
+            }
+        }
+
+    } else {
+        if (val > 0x000000000000FFFFu) {
+            if (val > 0x0000000000FFFFFFu) {                                    /* Chk bits [31:24] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+                ix             = (CPU_DATA)((CPU_INT64U)val >> 24u);              /* .. lookup tbl ix  = 'val' >> 24 bits */
+                nbr_lead_zeros = (CPU_DATA)((CPU_INT64U)CPU_CntLeadZerosTbl[ix] + 32u);/* .. plus nbr msb lead zeros = 32 bits.*/
+
+            } else {                                                            /* Chk bits [23:16] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+                ix             = (CPU_DATA)((CPU_INT64U)val >> 16u);            /* .. lookup tbl ix  = 'val' >> 16 bits */
+                nbr_lead_zeros = (CPU_DATA)((CPU_INT64U)CPU_CntLeadZerosTbl[ix] + 40u);/* .. plus nbr msb lead zeros = 40 bits.*/
+            }
+
+        } else {
+            if (val > 0x00000000000000FFu) {                                    /* Chk bits [15:08] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+                ix             = (CPU_DATA)((CPU_INT64U)val >>  8u);            /* .. lookup tbl ix  = 'val' >>  8 bits */
+                nbr_lead_zeros = (CPU_DATA)((CPU_INT64U)CPU_CntLeadZerosTbl[ix] + 48u);/* .. plus nbr msb lead zeros = 48 bits.*/
+
+            } else {                                                            /* Chk bits [07:00] :                   */
+                                                                                /* .. Nbr lead zeros =               .. */
+                ix             = (CPU_DATA)(val);                               /* .. lookup tbl ix  = 'val' >>  0 bits */
+                nbr_lead_zeros = (CPU_DATA)((CPU_INT64U)CPU_CntLeadZerosTbl[ix] + 56u);/* .. plus nbr msb lead zeros = 56 bits.*/
+            }
+        }
+    }
+#endif
+
+
+    return (nbr_lead_zeros);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_CntTrailZeros()
+*
+* Description : Count the number of contiguous, least-significant, trailing zero bits in a data value.
+*
+* Argument(s) : val         Data value to count trailing zero bits.
+*
+* Return(s)   : Number of contiguous, least-significant, trailing zero bits in 'val'.
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) (a) Supports the following data value sizes :
+*
+*                       (1)  8-bits
+*                       (2) 16-bits
+*                       (3) 32-bits
+*                       (4) 64-bits
+*
+*                       See also 'cpu_def.h  CPU WORD CONFIGURATION  Note #1'.
+*
+*                   (b) (1) For  8-bit values :
+*
+*                                  b07  b06  b05  b04  b03  b02  b01  b00    # Trailing Zeros
+*                                  ---  ---  ---  ---  ---  ---  ---  ---    ----------------
+*                                   x    x    x    x    x    x    x    1            0
+*                                   x    x    x    x    x    x    1    0            1
+*                                   x    x    x    x    x    1    0    0            2
+*                                   x    x    x    x    1    0    0    0            3
+*                                   x    x    x    1    0    0    0    0            4
+*                                   x    x    1    0    0    0    0    0            5
+*                                   x    1    0    0    0    0    0    0            6
+*                                   1    0    0    0    0    0    0    0            7
+*                                   0    0    0    0    0    0    0    0            8
+*
+*
+*                       (2) For 16-bit values :
+*
+*                             b15  b14  b13  b12  b11  ...  b02  b01  b00    # Trailing Zeros
+*                             ---  ---  ---  ---  ---       ---  ---  ---    ----------------
+*                              x    x    x    x    x         x    x    1            0
+*                              x    x    x    x    x         x    1    0            1
+*                              x    x    x    x    x         1    0    0            2
+*                              :    :    :    :    :         :    :    :            :
+*                              :    :    :    :    :         :    :    :            :
+*                              x    x    x    x    1         0    0    0           11
+*                              x    x    x    1    0         0    0    0           12
+*                              x    x    1    0    0         0    0    0           13
+*                              x    1    0    0    0         0    0    0           14
+*                              1    0    0    0    0         0    0    0           15
+*                              0    0    0    0    0         0    0    0           16
+*
+*
+*                       (3) For 32-bit values :
+*
+*                             b31  b30  b29  b28  b27  ...  b02  b01  b00    # Trailing Zeros
+*                             ---  ---  ---  ---  ---       ---  ---  ---    ----------------
+*                              x    x    x    x    x         x    x    1            0
+*                              x    x    x    x    x         x    1    0            1
+*                              x    x    x    x    x         1    0    0            2
+*                              :    :    :    :    :         :    :    :            :
+*                              :    :    :    :    :         :    :    :            :
+*                              x    x    x    x    1         0    0    0           27
+*                              x    x    x    1    0         0    0    0           28
+*                              x    x    1    0    0         0    0    0           29
+*                              x    1    0    0    0         0    0    0           30
+*                              1    0    0    0    0         0    0    0           31
+*                              0    0    0    0    0         0    0    0           32
+*
+*
+*                       (4) For 64-bit values :
+*
+*                             b63  b62  b61  b60  b59  ...  b02  b01  b00    # Trailing Zeros
+*                             ---  ---  ---  ---  ---       ---  ---  ---    ----------------
+*                              x    x    x    x    x         x    x    1            0
+*                              x    x    x    x    x         x    1    0            1
+*                              x    x    x    x    x         1    0    0            2
+*                              :    :    :    :    :         :    :    :            :
+*                              :    :    :    :    :         :    :    :            :
+*                              x    x    x    x    1         0    0    0           59
+*                              x    x    x    1    0         0    0    0           60
+*                              x    x    1    0    0         0    0    0           61
+*                              x    1    0    0    0         0    0    0           62
+*                              1    0    0    0    0         0    0    0           63
+*                              0    0    0    0    0         0    0    0           64
+*
+*               (2) For non-zero values, the returned number of contiguous, least-significant, trailing
+*                   zero bits is also equivalent to the bit position of the least-significant set bit.
+*
+*               (3) 'val' SHOULD be validated for non-'0' PRIOR to all other counting zero calculations :
+*
+*                   (a) CPU_CntTrailZeros()'s final conditional statement calculates 'val's number of
+*                       trailing zeros based on its return data size, 'CPU_CFG_DATA_SIZE', & 'val's
+*                       calculated number of lead zeros ONLY if the initial 'val' is non-'0' :
+*
+*                           if (val != 0u) {
+*                               nbr_trail_zeros = ((CPU_CFG_DATA_SIZE * DEF_OCTET_NBR_BITS) - 1u) - nbr_lead_zeros;
+*                           } else {
+*                               nbr_trail_zeros = nbr_lead_zeros;
+*                           }
+*
+*                       Therefore, initially validating all non-'0' values avoids having to conditionally
+*                       execute the final 'if' statement.
+*********************************************************************************************************
+*/
+
+#ifndef   CPU_CFG_TRAIL_ZEROS_ASM_PRESENT
+CPU_DATA  CPU_CntTrailZeros (CPU_DATA  val)
+{
+    CPU_DATA  val_bit_mask;
+    CPU_DATA  nbr_lead_zeros;
+    CPU_DATA  nbr_trail_zeros;
+
+
+    if (val == 0u) {                                            /* Rtn ALL val bits as zero'd (see Note #3).            */
+        return (CPU_CFG_DATA_SIZE * DEF_OCTET_NBR_BITS);
+    }
+
+
+    val_bit_mask    = val & ((CPU_DATA)~val + 1u);              /* Zero/clr all bits EXCEPT least-sig set bit.          */
+    nbr_lead_zeros  = CPU_CntLeadZeros(val_bit_mask);           /* Cnt  nbr lead  0s.                                   */
+                                                                /* Calc nbr trail 0s = (nbr val bits - 1) - nbr lead 0s.*/
+    nbr_trail_zeros = ((CPU_CFG_DATA_SIZE * DEF_OCTET_NBR_BITS) - 1u) - nbr_lead_zeros;
+
+
+    return (nbr_trail_zeros);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_CntTrailZeros08()
+*
+* Description : Count the number of contiguous, least-significant, trailing zero bits in an 8-bit data value.
+*
+* Argument(s) : val         Data value to count trailing zero bits.
+*
+* Return(s)   : Number of contiguous, least-significant, trailing zero bits in 'val'.
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) Supports  8-bit values :
+*
+*                               b07  b06  b05  b04  b03  b02  b01  b00    # Trailing Zeros
+*                               ---  ---  ---  ---  ---  ---  ---  ---    ----------------
+*                                x    x    x    x    x    x    x    1            0
+*                                x    x    x    x    x    x    1    0            1
+*                                x    x    x    x    x    1    0    0            2
+*                                x    x    x    x    1    0    0    0            3
+*                                x    x    x    1    0    0    0    0            4
+*                                x    x    1    0    0    0    0    0            5
+*                                x    1    0    0    0    0    0    0            6
+*                                1    0    0    0    0    0    0    0            7
+*                                0    0    0    0    0    0    0    0            8
+*
+*
+*               (2) For non-zero values, the returned number of contiguous, least-significant, trailing
+*                   zero bits is also equivalent to the bit position of the least-significant set bit.
+*
+*               (3) 'val' SHOULD be validated for non-'0' PRIOR to all other counting zero calculations :
+*
+*                   (a) For assembly-optimized implementations, CPU_CntTrailZeros() returns 'val's
+*                       number of trailing zeros via CPU's native data size, 'CPU_CFG_DATA_SIZE'.
+*                       If the returned number of zeros exceeds CPU_CntTrailZeros08()'s  8-bit return
+*                       data size, then the returned number of zeros must be offset by the difference
+*                       between CPU_CntTrailZeros()'s  & CPU_CntTrailZeros08()'s return data size :
+*
+*                           nbr_trail_zeros = CPU_CntTrailZeros((CPU_DATA)val);
+*                           if (nbr_trail_zeros >  (CPU_WORD_SIZE_08  * DEF_OCTET_NBR_BITS)) {
+*                               nbr_trail_zeros -= (CPU_CFG_DATA_SIZE - CPU_WORD_SIZE_08) * DEF_OCTET_NBR_BITS;
+*                           }
+*
+*                       However, this ONLY occurs for an initial 'val' of '0' since all non-'0'  8-bit
+*                       values would return a number of trailing zeros less than or equal to  8 bits.
+*
+*                       Therefore, initially validating all non-'0' values prior to calling assembly-
+*                       optimized CPU_CntTrailZeros() avoids having to offset the number of returned
+*                       trailing zeros by the difference in CPU data size and  8-bit data value bits.
+*
+*                   (b) For CPU_CntTrailZeros08()'s C implementation, the final conditional statement
+*                       calculates 'val's number of trailing zeros based on CPU_CntTrailZeros08()'s
+*                        8-bit return data size & 'val's calculated number of lead zeros ONLY if the
+*                       initial 'val' is non-'0' :
+*
+*                           if (val != 0u) {
+*                               nbr_trail_zeros = ((CPU_WORD_SIZE_08 * DEF_OCTET_NBR_BITS) - 1u) - nbr_lead_zeros;
+*                           } else {
+*                               nbr_trail_zeros = nbr_lead_zeros;
+*                           }
+*
+*                       Therefore, initially validating all non-'0' values avoids having to conditionally
+*                       execute the final 'if' statement.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_08)
+CPU_DATA  CPU_CntTrailZeros08 (CPU_INT08U  val)
+{
+#if  (!((defined(CPU_CFG_TRAIL_ZEROS_ASM_PRESENT)) && \
+        (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_08)))
+    CPU_INT08U  val_bit_mask;
+    CPU_DATA    nbr_lead_zeros;
+#endif
+    CPU_DATA    nbr_trail_zeros;
+
+
+    if (val == 0u) {                                            /* Rtn ALL val bits as zero'd (see Note #3).            */
+        return (CPU_WORD_SIZE_08 * DEF_OCTET_NBR_BITS);
+    }
+
+                                                                /* ------------------ ASM-OPTIMIZED ------------------- */
+#if ((defined(CPU_CFG_TRAIL_ZEROS_ASM_PRESENT)) && \
+     (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_08))
+    nbr_trail_zeros = CPU_CntTrailZeros((CPU_DATA)val);
+
+#else                                                           /* ------------------- C-OPTIMIZED -------------------- */
+    val_bit_mask    = val & ((CPU_INT08U)~val + 1u);            /* Zero/clr all bits EXCEPT least-sig set bit.          */
+    nbr_lead_zeros  = CPU_CntLeadZeros08(val_bit_mask);         /* Cnt  nbr lead  0s.                                   */
+                                                                /* Calc nbr trail 0s = (nbr val bits - 1) - nbr lead 0s.*/
+    nbr_trail_zeros = ((CPU_WORD_SIZE_08 * DEF_OCTET_NBR_BITS) - 1u) - nbr_lead_zeros;
+#endif
+
+
+    return (nbr_trail_zeros);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_CntTrailZeros16()
+*
+* Description : Count the number of contiguous, least-significant, trailing zero bits in a 16-bit data value.
+*
+* Argument(s) : val         Data value to count trailing zero bits.
+*
+* Return(s)   : Number of contiguous, least-significant, trailing zero bits in 'val'.
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) Supports 16-bit values :
+*
+*                          b15  b14  b13  b12  b11  ...  b02  b01  b00    # Trailing Zeros
+*                          ---  ---  ---  ---  ---       ---  ---  ---    ----------------
+*                           x    x    x    x    x         x    x    1            0
+*                           x    x    x    x    x         x    1    0            1
+*                           x    x    x    x    x         1    0    0            2
+*                           :    :    :    :    :         :    :    :            :
+*                           :    :    :    :    :         :    :    :            :
+*                           x    x    x    x    1         0    0    0           11
+*                           x    x    x    1    0         0    0    0           12
+*                           x    x    1    0    0         0    0    0           13
+*                           x    1    0    0    0         0    0    0           14
+*                           1    0    0    0    0         0    0    0           15
+*                           0    0    0    0    0         0    0    0           16
+*
+*
+*               (2) For non-zero values, the returned number of contiguous, least-significant, trailing
+*                   zero bits is also equivalent to the bit position of the least-significant set bit.
+*
+*               (3) 'val' SHOULD be validated for non-'0' PRIOR to all other counting zero calculations :
+*
+*                   (a) For assembly-optimized implementations, CPU_CntTrailZeros() returns 'val's
+*                       number of trailing zeros via CPU's native data size, 'CPU_CFG_DATA_SIZE'.
+*                       If the returned number of zeros exceeds CPU_CntTrailZeros16()'s 16-bit return
+*                       data size, then the returned number of zeros must be offset by the difference
+*                       between CPU_CntTrailZeros()'s  & CPU_CntTrailZeros16()'s return data size :
+*
+*                           nbr_trail_zeros = CPU_CntTrailZeros((CPU_DATA)val);
+*                           if (nbr_trail_zeros >  (CPU_WORD_SIZE_16  * DEF_OCTET_NBR_BITS)) {
+*                               nbr_trail_zeros -= (CPU_CFG_DATA_SIZE - CPU_WORD_SIZE_16) * DEF_OCTET_NBR_BITS;
+*                           }
+*
+*                       However, this ONLY occurs for an initial 'val' of '0' since all non-'0' 16-bit
+*                       values would return a number of trailing zeros less than or equal to 16 bits.
+*
+*                       Therefore, initially validating all non-'0' values prior to calling assembly-
+*                       optimized CPU_CntTrailZeros() avoids having to offset the number of returned
+*                       trailing zeros by the difference in CPU data size and 16-bit data value bits.
+*
+*                   (b) For CPU_CntTrailZeros16()'s C implementation, the final conditional statement
+*                       calculates 'val's number of trailing zeros based on CPU_CntTrailZeros16()'s
+*                       16-bit return data size & 'val's calculated number of lead zeros ONLY if the
+*                       initial 'val' is non-'0' :
+*
+*                           if (val != 0u) {
+*                               nbr_trail_zeros = ((CPU_WORD_SIZE_16 * DEF_OCTET_NBR_BITS) - 1u) - nbr_lead_zeros;
+*                           } else {
+*                               nbr_trail_zeros = nbr_lead_zeros;
+*                           }
+*
+*                       Therefore, initially validating all non-'0' values avoids having to conditionally
+*                       execute the final 'if' statement.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_16)
+CPU_DATA  CPU_CntTrailZeros16 (CPU_INT16U  val)
+{
+#if  (!((defined(CPU_CFG_TRAIL_ZEROS_ASM_PRESENT)) && \
+        (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_16)))
+    CPU_INT16U  val_bit_mask;
+    CPU_DATA    nbr_lead_zeros;
+#endif
+    CPU_DATA    nbr_trail_zeros;
+
+
+    if (val == 0u) {                                            /* Rtn ALL val bits as zero'd (see Note #3).            */
+        return (CPU_WORD_SIZE_16 * DEF_OCTET_NBR_BITS);
+    }
+
+                                                                /* ------------------ ASM-OPTIMIZED ------------------- */
+#if ((defined(CPU_CFG_TRAIL_ZEROS_ASM_PRESENT)) && \
+     (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_16))
+    nbr_trail_zeros = CPU_CntTrailZeros((CPU_DATA)val);
+
+#else                                                           /* ------------------- C-OPTIMIZED -------------------- */
+    val_bit_mask    = val & ((CPU_INT16U)~val + 1u);            /* Zero/clr all bits EXCEPT least-sig set bit.          */
+    nbr_lead_zeros  = CPU_CntLeadZeros16(val_bit_mask);         /* Cnt  nbr lead  0s.                                   */
+                                                                /* Calc nbr trail 0s = (nbr val bits - 1) - nbr lead 0s.*/
+    nbr_trail_zeros = ((CPU_WORD_SIZE_16 * DEF_OCTET_NBR_BITS) - 1u) - nbr_lead_zeros;
+#endif
+
+
+    return (nbr_trail_zeros);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_CntTrailZeros32()
+*
+* Description : Count the number of contiguous, least-significant, trailing zero bits in a 32-bit data value.
+*
+* Argument(s) : val         Data value to count trailing zero bits.
+*
+* Return(s)   : Number of contiguous, least-significant, trailing zero bits in 'val'.
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) Supports 32-bit values :
+*
+*                          b31  b30  b29  b28  b27  ...  b02  b01  b00    # Trailing Zeros
+*                          ---  ---  ---  ---  ---       ---  ---  ---    ----------------
+*                           x    x    x    x    x         x    x    1            0
+*                           x    x    x    x    x         x    1    0            1
+*                           x    x    x    x    x         1    0    0            2
+*                           :    :    :    :    :         :    :    :            :
+*                           :    :    :    :    :         :    :    :            :
+*                           x    x    x    x    1         0    0    0           27
+*                           x    x    x    1    0         0    0    0           28
+*                           x    x    1    0    0         0    0    0           29
+*                           x    1    0    0    0         0    0    0           30
+*                           1    0    0    0    0         0    0    0           31
+*                           0    0    0    0    0         0    0    0           32
+*
+*
+*               (2) For non-zero values, the returned number of contiguous, least-significant, trailing
+*                   zero bits is also equivalent to the bit position of the least-significant set bit.
+*
+*               (3) 'val' SHOULD be validated for non-'0' PRIOR to all other counting zero calculations :
+*
+*                   (a) For assembly-optimized implementations, CPU_CntTrailZeros() returns 'val's
+*                       number of trailing zeros via CPU's native data size, 'CPU_CFG_DATA_SIZE'.
+*                       If the returned number of zeros exceeds CPU_CntTrailZeros32()'s 32-bit return
+*                       data size, then the returned number of zeros must be offset by the difference
+*                       between CPU_CntTrailZeros()'s  & CPU_CntTrailZeros32()'s return data size :
+*
+*                           nbr_trail_zeros = CPU_CntTrailZeros((CPU_DATA)val);
+*                           if (nbr_trail_zeros >  (CPU_WORD_SIZE_32  * DEF_OCTET_NBR_BITS)) {
+*                               nbr_trail_zeros -= (CPU_CFG_DATA_SIZE - CPU_WORD_SIZE_32) * DEF_OCTET_NBR_BITS;
+*                           }
+*
+*                       However, this ONLY occurs for an initial 'val' of '0' since all non-'0' 32-bit
+*                       values would return a number of trailing zeros less than or equal to 32 bits.
+*
+*                       Therefore, initially validating all non-'0' values prior to calling assembly-
+*                       optimized CPU_CntTrailZeros() avoids having to offset the number of returned
+*                       trailing zeros by the difference in CPU data size and 32-bit data value bits.
+*
+*                   (b) For CPU_CntTrailZeros32()'s C implementation, the final conditional statement
+*                       calculates 'val's number of trailing zeros based on CPU_CntTrailZeros32()'s
+*                       32-bit return data size & 'val's calculated number of lead zeros ONLY if the
+*                       initial 'val' is non-'0' :
+*
+*                           if (val != 0u) {
+*                               nbr_trail_zeros = ((CPU_WORD_SIZE_32 * DEF_OCTET_NBR_BITS) - 1u) - nbr_lead_zeros;
+*                           } else {
+*                               nbr_trail_zeros = nbr_lead_zeros;
+*                           }
+*
+*                       Therefore, initially validating all non-'0' values avoids having to conditionally
+*                       execute the final 'if' statement.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_32)
+CPU_DATA  CPU_CntTrailZeros32 (CPU_INT32U  val)
+{
+#if  (!((defined(CPU_CFG_TRAIL_ZEROS_ASM_PRESENT)) && \
+        (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_32)))
+    CPU_INT32U  val_bit_mask;
+    CPU_DATA    nbr_lead_zeros;
+#endif
+    CPU_DATA    nbr_trail_zeros;
+
+
+    if (val == 0u) {                                            /* Rtn ALL val bits as zero'd (see Note #3).            */
+        return (CPU_WORD_SIZE_32 * DEF_OCTET_NBR_BITS);
+    }
+
+                                                                /* ------------------ ASM-OPTIMIZED ------------------- */
+#if ((defined(CPU_CFG_TRAIL_ZEROS_ASM_PRESENT)) && \
+     (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_32))
+    nbr_trail_zeros = CPU_CntTrailZeros((CPU_DATA)val);
+
+#else                                                           /* ------------------- C-OPTIMIZED -------------------- */
+    val_bit_mask    = val & ((CPU_INT32U)~val + 1u);            /* Zero/clr all bits EXCEPT least-sig set bit.          */
+    nbr_lead_zeros  = CPU_CntLeadZeros32(val_bit_mask);         /* Cnt  nbr lead  0s.                                   */
+                                                                /* Calc nbr trail 0s = (nbr val bits - 1) - nbr lead 0s.*/
+    nbr_trail_zeros = ((CPU_WORD_SIZE_32 * DEF_OCTET_NBR_BITS) - 1u) - nbr_lead_zeros;
+#endif
+
+
+    return (nbr_trail_zeros);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_CntTrailZeros64()
+*
+* Description : Count the number of contiguous, least-significant, trailing zero bits in a 64-bit data value.
+*
+* Argument(s) : val         Data value to count trailing zero bits.
+*
+* Return(s)   : Number of contiguous, least-significant, trailing zero bits in 'val'.
+*
+* Caller(s)   : Application.
+*
+*               This function is a CPU module application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) Supports 64-bit values :
+*
+*                          b63  b62  b61  b60  b59  ...  b02  b01  b00    # Trailing Zeros
+*                          ---  ---  ---  ---  ---       ---  ---  ---    ----------------
+*                           x    x    x    x    x         x    x    1            0
+*                           x    x    x    x    x         x    1    0            1
+*                           x    x    x    x    x         1    0    0            2
+*                           :    :    :    :    :         :    :    :            :
+*                           :    :    :    :    :         :    :    :            :
+*                           x    x    x    x    1         0    0    0           59
+*                           x    x    x    1    0         0    0    0           60
+*                           x    x    1    0    0         0    0    0           61
+*                           x    1    0    0    0         0    0    0           62
+*                           1    0    0    0    0         0    0    0           63
+*                           0    0    0    0    0         0    0    0           64
+*
+*
+*               (2) For non-zero values, the returned number of contiguous, least-significant, trailing
+*                   zero bits is also equivalent to the bit position of the least-significant set bit.
+*
+*               (3) 'val' SHOULD be validated for non-'0' PRIOR to all other counting zero calculations :
+*
+*                   (a) For assembly-optimized implementations, CPU_CntTrailZeros() returns 'val's
+*                       number of trailing zeros via CPU's native data size, 'CPU_CFG_DATA_SIZE'.
+*                       If the returned number of zeros exceeds CPU_CntTrailZeros64()'s 64-bit return
+*                       data size, then the returned number of zeros must be offset by the difference
+*                       between CPU_CntTrailZeros()'s  & CPU_CntTrailZeros64()'s return data size :
+*
+*                           nbr_trail_zeros = CPU_CntTrailZeros((CPU_DATA)val);
+*                           if (nbr_trail_zeros >  (CPU_WORD_SIZE_64  * DEF_OCTET_NBR_BITS)) {
+*                               nbr_trail_zeros -= (CPU_CFG_DATA_SIZE - CPU_WORD_SIZE_64) * DEF_OCTET_NBR_BITS;
+*                           }
+*
+*                       However, this ONLY occurs for an initial 'val' of '0' since all non-'0' 64-bit
+*                       values would return a number of trailing zeros less than or equal to 64 bits.
+*
+*                       Therefore, initially validating all non-'0' values prior to calling assembly-
+*                       optimized CPU_CntTrailZeros() avoids having to offset the number of returned
+*                       trailing zeros by the difference in CPU data size and 64-bit data value bits.
+*
+*                   (b) For CPU_CntTrailZeros64()'s C implementation, the final conditional statement
+*                       calculates 'val's number of trailing zeros based on CPU_CntTrailZeros64()'s
+*                       64-bit return data size & 'val's calculated number of lead zeros ONLY if the
+*                       initial 'val' is non-'0' :
+*
+*                           if (val != 0u) {
+*                               nbr_trail_zeros = ((CPU_WORD_SIZE_64 * DEF_OCTET_NBR_BITS) - 1u) - nbr_lead_zeros;
+*                           } else {
+*                               nbr_trail_zeros = nbr_lead_zeros;
+*                           }
+*
+*                       Therefore, initially validating all non-'0' values avoids having to conditionally
+*                       execute the final 'if' statement.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_64)
+CPU_DATA  CPU_CntTrailZeros64 (CPU_INT64U  val)
+{
+#if  (!((defined(CPU_CFG_TRAIL_ZEROS_ASM_PRESENT)) && \
+        (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_64)))
+    CPU_INT64U  val_bit_mask;
+    CPU_DATA    nbr_lead_zeros;
+#endif
+    CPU_DATA    nbr_trail_zeros;
+
+
+    if (val == 0u) {                                            /* Rtn ALL val bits as zero'd (see Note #3).            */
+        return (CPU_WORD_SIZE_64 * DEF_OCTET_NBR_BITS);
+    }
+
+                                                                /* ------------------ ASM-OPTIMIZED ------------------- */
+#if ((defined(CPU_CFG_TRAIL_ZEROS_ASM_PRESENT)) && \
+     (CPU_CFG_DATA_SIZE >= CPU_WORD_SIZE_64))
+    nbr_trail_zeros = CPU_CntTrailZeros((CPU_DATA)val);
+
+#else                                                           /* ------------------- C-OPTIMIZED -------------------- */
+    val_bit_mask    = val & ((CPU_INT64U)~val + 1u);            /* Zero/clr all bits EXCEPT least-sig set bit.          */
+    nbr_lead_zeros  = CPU_CntLeadZeros64(val_bit_mask);         /* Cnt  nbr lead  0s.                                   */
+                                                                /* Calc nbr trail 0s = (nbr val bits - 1) - nbr lead 0s.*/
+    nbr_trail_zeros = ((CPU_WORD_SIZE_64 * DEF_OCTET_NBR_BITS) - 1u) - nbr_lead_zeros;
+#endif
+
+
+    return (nbr_trail_zeros);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CRCUtil_PopCnt_32()
+*
+* Description : Compute population count (hamming weight) for value (number of bits set).
+*
+* Argument(s) : value           Value to compute population count on.
+*
+*
+* Return(s)   : value's population count.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) Algorithm taken from http://en.wikipedia.org/wiki/Hamming_weight
+*********************************************************************************************************
+*/
+
+CPU_INT08U  CPU_PopCnt32 (CPU_INT32U  value)
+{
+    CPU_INT32U  even_cnt;
+    CPU_INT32U  odd_cnt;
+    CPU_INT32U  result;
+
+
+    odd_cnt  = (value >> 1u) & CRC_UTIL_POPCNT_MASK01010101_32; /* 2-bits pieces.                                       */
+    result   =  value - odd_cnt;                                /* Same result as result=odd_cnt+(value & 0x55555555).  */
+
+    even_cnt =  result & CRC_UTIL_POPCNT_MASK00110011_32;       /* 4-bits pieces.                                       */
+    odd_cnt  = (result >> 2u) & CRC_UTIL_POPCNT_MASK00110011_32;
+    result   =  even_cnt + odd_cnt;
+
+    even_cnt =  result & CRC_UTIL_POPCNT_MASK00001111_32;       /* 8-bits pieces.                                       */
+    odd_cnt  = (result >> 4u) & CRC_UTIL_POPCNT_MASK00001111_32;
+    result   =  even_cnt + odd_cnt;
+
+    result = (result * CRC_UTIL_POPCNT_POWERSOF256_32) >> 24u;
+
+    return ((CPU_INT08U)result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            CPU_StatReset()
+*
+* Description : Reset all performance monitors.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : OSStatReset().
+*
+* Note(s)     : Critical section provided by caller.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_PERF_MON_EN == DEF_ENABLED)
+void  CPU_StatReset (void)
+{
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+    CPU_IntDisMeasMax_cnts = 0u;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           CPU_NameInit()
+*
+* Description : Initialize CPU Name.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_NAME_EN == DEF_ENABLED)
+static  void  CPU_NameInit (void)
+{
+    CPU_NameClr();
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            CPU_TS_Init()
+*
+* Description : (1) Initialize CPU timestamp :
+*
+*                   (a) Initialize/start CPU timestamp timer                            See Note #1
+*                   (b) Initialize       CPU timestamp controls
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_Init().
+*
+* Note(s)     : (1) The following initialization MUST be sequenced as follows :
+*
+*                   (a) CPU_TS_TmrFreq_Hz     MUST be initialized prior to CPU_TS_TmrInit()
+*                   (b) CPU_TS_TmrInit()      SHOULD precede calls to all other CPU timestamp functions;
+*                                                 otherwise, invalid time measurements may be calculated/
+*                                                 returned.
+*
+*                   See also 'CPU_Init()  Note #3a'.
+*********************************************************************************************************
+*/
+
+#if ((CPU_CFG_TS_EN     == DEF_ENABLED) || \
+     (CPU_CFG_TS_TMR_EN == DEF_ENABLED))
+static  void  CPU_TS_Init (void)
+{
+#if (((CPU_CFG_TS_32_EN    == DEF_ENABLED     )  && \
+      (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_32)) || \
+     ((CPU_CFG_TS_64_EN    == DEF_ENABLED     )  && \
+      (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_64)))
+    CPU_TS_TMR  ts_tmr_cnts;
+#endif
+
+
+                                                                /* ----------------- INIT CPU TS TMR ------------------ */
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+    CPU_TS_TmrFreq_Hz   = 0u;                                   /* Init/clr     ts tmr freq (see Note #1a).             */
+    CPU_TS_TmrInit();                                           /* Init & start ts tmr      (see Note #1b).             */
+#endif
+
+
+                                                                /* ------------------- INIT CPU TS -------------------- */
+#if (((CPU_CFG_TS_32_EN    == DEF_ENABLED     )  && \
+      (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_32)) || \
+     ((CPU_CFG_TS_64_EN    == DEF_ENABLED     )  && \
+      (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_64)))
+    ts_tmr_cnts = CPU_TS_TmrRd();                               /* Get init ts tmr val (in ts tmr cnts).                */
+#endif
+
+#if  ((CPU_CFG_TS_32_EN    == DEF_ENABLED)  && \
+      (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_32))
+    CPU_TS_32_Accum   = 0u;                                     /* Init 32-bit accum'd ts.                              */
+    CPU_TS_32_TmrPrev = ts_tmr_cnts;                            /* Init 32-bit ts prev tmr val.                         */
+#endif
+
+#if  ((CPU_CFG_TS_64_EN    == DEF_ENABLED)  && \
+      (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_64))
+    CPU_TS_64_Accum   = 0u;                                     /* Init 64-bit accum'd ts.                              */
+    CPU_TS_64_TmrPrev = ts_tmr_cnts;                            /* Init 64-bit ts prev tmr val.                         */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CPU_IntDisMeasInit()
+*
+* Description : (1) Initialize interrupts disabled time measurements feature :
+*
+*                   (a) Initialize interrupts disabled time measurement controls
+*                   (b) Calculate  interrupts disabled time measurement overhead
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_Init().
+*
+* Note(s)     : (2) CPU_IntDisMeasInit() SHOULD precede ALL calls to CPU_CRITICAL_ENTER()/CPU_CRITICAL_EXIT()
+*                   & other CPU interrupts disabled time measurement functions; otherwise, invalid interrupts
+*                   disabled time measurements may be calculated/returned.
+*
+*                   See also 'CPU_Init()  Note #3b'.
+*
+*               (3) (a) (1) Interrupts disabled time measurement overhead performed multiple times to calculate
+*                           a rounded average with better accuracy, hopefully of +/- one timer count.
+*
+*                       (2) However, a single overhead time measurement is recommended, even for instruction-
+*                           cache-enabled CPUs, since critical sections are NOT typically called within
+*                           instruction-cached loops.  Thus a single non-cached/non-averaged time measurement
+*                           is a more realistic overhead for the majority of non-cached interrupts disabled
+*                           time measurements.
+*
+*                   (b) Interrupts MUST be disabled while measuring the interrupts disabled time measurement
+*                       overhead; otherwise, overhead measurements could be interrupted which would incorrectly
+*                       calculate an inflated overhead time which would then incorrectly calculate deflated
+*                       interrupts disabled times.
+*********************************************************************************************************
+*/
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+static  void  CPU_IntDisMeasInit (void)
+{
+    CPU_TS_TMR  time_meas_tot_cnts;
+    CPU_INT16U  i;
+    CPU_SR_ALLOC();
+
+                                                                /* ----------- INIT INT DIS TIME MEAS CTRLS ----------- */
+    CPU_IntDisMeasCtr         = 0u;
+    CPU_IntDisNestCtr         = 0u;
+    CPU_IntDisMeasStart_cnts  = 0u;
+    CPU_IntDisMeasStop_cnts   = 0u;
+    CPU_IntDisMeasMaxCur_cnts = 0u;
+    CPU_IntDisMeasMax_cnts    = 0u;
+    CPU_IntDisMeasOvrhd_cnts  = 0u;
+
+                                                                /* ----------- CALC INT DIS TIME MEAS OVRHD ----------- */
+    time_meas_tot_cnts = 0u;
+    CPU_INT_DIS();                                              /* Ints MUST be dis'd for ovrhd calc (see Note #3b).    */
+    for (i = 0u; i < CPU_CFG_INT_DIS_MEAS_OVRHD_NBR; i++) {
+        CPU_IntDisMeasMaxCur_cnts = 0u;
+        CPU_IntDisMeasStart();                                  /* Perform multiple consecutive start/stop time meas's  */
+        CPU_IntDisMeasStop();
+        time_meas_tot_cnts += CPU_IntDisMeasMaxCur_cnts;        /* ...       & sum time meas max's                  ... */
+    }
+                                                                /* ... to calc avg time meas ovrhd (see Note #3a).      */
+    CPU_IntDisMeasOvrhd_cnts  = (time_meas_tot_cnts + (CPU_CFG_INT_DIS_MEAS_OVRHD_NBR / 2u))
+                                                    /  CPU_CFG_INT_DIS_MEAS_OVRHD_NBR;
+    CPU_IntDisMeasMaxCur_cnts =  0u;                            /* Reset max ints dis'd times.                          */
+    CPU_IntDisMeasMax_cnts    =  0u;
+    CPU_INT_EN();
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CPU_IntDisMeasMaxCalc()
+*
+* Description : Calculate maximum interrupts disabled time.
+*
+* Argument(s) : time_tot_cnts   Total interrupt disabled time, in timer counts.
+*
+* Return(s)   : Maximum interrupts disabled time (in CPU timestamp timer counts).
+*
+* Caller(s)   : CPU_IntDisMeasMaxCurGet(),
+*               CPU_IntDisMeasMaxGet().
+*
+* Note(s)     : (1) (a) The total amount of time interrupts are disabled by system &/or application code
+*                       during critical sections is calculated by the following equations :
+*
+*                       (1) time            =   [ time      -  time      ]  -  time
+*                               interrupts      [     stop         start ]         total meas
+*                                disabled       [     meas         meas  ]           ovrhd
+*                           (via application)
+*
+*
+*                       (2) time            =  time            +  time
+*                               total meas         start meas         stop meas
+*                                 ovrhd              ovrhd              ovrhd
+*
+*
+*                               where
+*
+*                                       time                    time interrupts are disabled between
+*                                           interrupts              first critical section enter &
+*                                            disabled               last  critical section exit minus
+*                                       (via application)           time measurement overhead
+*
+*                                       time                    time of disable interrupts start time
+*                                           start                   measurement (in timer counts)
+*                                           meas
+*
+*                                       time                    time of disable interrupts stop  time
+*                                           stop                    measurement (in timer counts)
+*                                           meas
+*
+*                                       time                    total overhead time to start/stop disabled
+*                                           total meas              interrupts time measurements (in timer
+*                                             ovrhd                 counts)
+*
+*                                       time                    total overhead time after getting start
+*                                           start meas              time until end of start measurement
+*                                             ovrhd                 function  (in timer counts)
+*
+*                                       time                    total overhead time from beginning of stop
+*                                           stop meas               measurement function until after getting
+*                                             ovrhd                 stop time (in timer counts)
+*
+*
+*                   (b) To expedite & reduce interrupts disabled time measurement overhead, the final
+*                       calculations to subtract the interrupts disabled time measurement overhead is
+*                       performed asynchronously in API functions.
+*
+*                       See also 'CPU_IntDisMeasStop()  Note #1b2'.
+*
+*                   (c) The amount of time interrupts are disabled is calculated by either of the
+*                       following equations :
+*
+*                       (1) Interrupts disabled time  =  Number timer counts  *  Timer period
+*
+*                               where
+*
+*                                   Number timer counts             Number of timer counts measured
+*                                   Timer period                    Timer's period in some units of
+*                                                                       (fractional) seconds
+*                                   Interrupts disabled time        Amount of time interrupts are
+*                                                                       disabled, in same units of
+*                                                                       (fractional) seconds as the
+*                                                                       Timer period
+*
+*                                                         Number timer counts
+*                       (2) Interrupts disabled time  =  ---------------------
+*                                                           Timer frequency
+*
+*                               where
+*
+*                                   Number timer counts             Number of timer counts measured
+*                                   Timer frequency                 Timer's frequency in some units
+*                                                                       of counts per second
+*                                   Interrupts disabled time        Amount of time interrupts are
+*                                                                       disabled, in seconds
+*
+*                       See also 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TS_TmrRd()      Note #2c'
+*                              & 'cpu_core.h  FUNCTION PROTOTYPES  CPU_TSxx_to_uSec()  Note #2'.
+*
+*               (2) Although it is not typical, it is possible for an interrupts disabled time
+*                   measurement to be less than the interrupts disabled time measurement overhead;
+*                   especially if the overhead was calculated with a single, non-cached measurement
+*                   & critical sections are called within instruction-cached loops.
+*********************************************************************************************************
+*/
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+static  CPU_TS_TMR  CPU_IntDisMeasMaxCalc (CPU_TS_TMR  time_tot_cnts)
+{
+    CPU_TS_TMR  time_max_cnts;
+
+
+    time_max_cnts = time_tot_cnts;
+    if (time_max_cnts >  CPU_IntDisMeasOvrhd_cnts) {            /* If       max ints dis'd time >  ovrhd time, ...      */
+        time_max_cnts -= CPU_IntDisMeasOvrhd_cnts;              /* ... adj  max ints dis'd time by ovrhd time; ...      */
+    } else {                                                    /* ... else max ints dis'd time <  ovrhd time, ...      */
+        time_max_cnts  = 0u;                                    /* ... clr  max ints dis'd time (see Note #2).          */
+    }
+
+    return (time_max_cnts);
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/cpu_core.h b/src/ucos_v1_42/micrium_source/uC-CPU/cpu_core.h
new file mode 100644
index 0000000..3f35b0b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/cpu_core.h
@@ -0,0 +1,1059 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           CORE CPU MODULE
+*
+* Filename      : cpu_core.h
+* Version       : V1.30.02
+* Programmer(s) : SR
+*                 ITJ
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in 
+*                     the project build :
+*
+*                     (a) uC/LIB V1.35.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This core CPU header file is protected from multiple pre-processor inclusion through use of 
+*               the  core CPU module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_CORE_MODULE_PRESENT                                /* See Note #1.                                         */
+#define  CPU_CORE_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   CPU_CORE_MODULE
+#define  CPU_CORE_EXT
+#else
+#define  CPU_CORE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) CPU-configuration software files are located in the following directories :
+*
+*               (a) \\cpu_cfg.h
+*
+*               (b) (1) \\cpu_*.*
+*                   (2) \\\\cpu*.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (2) NO compiler-supplied standard library functions SHOULD be used.
+*
+*               (a) Standard library functions are implemented in the custom library module(s) :
+*
+*                       \\lib_*.*
+*
+*                           where
+*                                         directory path for custom library software
+*
+*           (3) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) (1) '\\'                  directory         See Note #1b1
+*                   (2) '\\\\' directory         See Note #1b2
+*
+*               (c) '\\' directory                            See Note #2a
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+#if (CPU_CFG_NAME_EN == DEF_ENABLED)
+#include  
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          CPU CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure CPU parameters.  DO NOT MODIFY.
+*
+*           (2) CPU timestamp timer feature is required for :
+*
+*               (a) CPU timestamps
+*               (b) CPU interrupts disabled time measurement
+*
+*               See also 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                      & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1'.
+*********************************************************************************************************
+*/
+
+#ifdef   CPU_CFG_TS_EN
+#undef   CPU_CFG_TS_EN
+#endif
+
+
+#if    ((CPU_CFG_TS_32_EN == DEF_ENABLED) || \
+        (CPU_CFG_TS_64_EN == DEF_ENABLED))
+#define  CPU_CFG_TS_EN                          DEF_ENABLED
+#else
+#define  CPU_CFG_TS_EN                          DEF_DISABLED
+#endif
+
+#if    ((CPU_CFG_TS_EN == DEF_ENABLED) || \
+(defined(CPU_CFG_INT_DIS_MEAS_EN)))
+#define  CPU_CFG_TS_TMR_EN                      DEF_ENABLED
+#else
+#define  CPU_CFG_TS_TMR_EN                      DEF_DISABLED
+#endif
+
+#if    ((CPU_CFG_TS_EN == DEF_ENABLED) || \
+(defined(CPU_CFG_INT_DIS_MEAS_EN)))
+#define  CPU_CFG_PERF_MON_EN                    DEF_ENABLED
+#else
+#define  CPU_CFG_PERF_MON_EN                    DEF_DISABLED
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          CACHE CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure CACHE parameters.  DO NOT MODIFY.
+*
+**********************************************************************************************************
+*/
+
+#ifndef CPU_CFG_CACHE_MGMT_EN
+#define CPU_CFG_CACHE_MGMT_EN DEF_DISABLED
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  CPU_TIME_MEAS_NBR_MIN                             1u
+#define  CPU_TIME_MEAS_NBR_MAX                           128u
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           CPU ERROR CODES
+*********************************************************************************************************
+*/
+
+typedef enum cpu_err {
+
+    CPU_ERR_NONE                            =         0u,
+    CPU_ERR_NULL_PTR                        =        10u,
+
+    CPU_ERR_NAME_SIZE                       =      1000u,
+
+    CPU_ERR_TS_FREQ_INVALID                 =      2000u
+
+} CPU_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                      CPU TIMESTAMP DATA TYPES
+*
+* Note(s) : (1) CPU timestamp timer data type defined to the binary-multiple of 8-bit octets as configured 
+*               by 'CPU_CFG_TS_TMR_SIZE' (see 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #2').
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  CPU_TS32;
+typedef  CPU_INT64U  CPU_TS64;
+
+typedef  CPU_TS32    CPU_TS;                                    /* Req'd for backwards-compatibility.                   */
+
+
+#if     (CPU_CFG_TS_TMR_EN   == DEF_ENABLED)                    /* CPU ts tmr defined to cfg'd word size (see Note #1). */
+#if     (CPU_CFG_TS_TMR_SIZE == CPU_WORD_SIZE_08)
+typedef  CPU_INT08U  CPU_TS_TMR;
+#elif   (CPU_CFG_TS_TMR_SIZE == CPU_WORD_SIZE_16)
+typedef  CPU_INT16U  CPU_TS_TMR;
+#elif   (CPU_CFG_TS_TMR_SIZE == CPU_WORD_SIZE_64)
+typedef  CPU_INT64U  CPU_TS_TMR;
+#else                                                           /* CPU ts tmr dflt size = 32-bits.                      */
+typedef  CPU_INT32U  CPU_TS_TMR;
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                               CPU TIMESTAMP TIMER FREQUENCY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  CPU_TS_TMR_FREQ;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if    (CPU_CFG_NAME_EN   == DEF_ENABLED)
+CPU_CORE_EXT  CPU_CHAR         CPU_Name[CPU_CFG_NAME_SIZE];     /* CPU host name.                                       */
+#endif
+
+
+#if ((CPU_CFG_TS_32_EN    == DEF_ENABLED)  && \
+     (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_32))
+CPU_CORE_EXT  CPU_TS32         CPU_TS_32_Accum;                 /* 32-bit accum'd ts  (in ts tmr cnts).                 */
+CPU_CORE_EXT  CPU_TS_TMR       CPU_TS_32_TmrPrev;               /* 32-bit ts prev tmr (in ts tmr cnts).                 */
+#endif
+
+#if ((CPU_CFG_TS_64_EN    == DEF_ENABLED)  && \
+     (CPU_CFG_TS_TMR_SIZE <  CPU_WORD_SIZE_64))
+CPU_CORE_EXT  CPU_TS64         CPU_TS_64_Accum;                 /* 64-bit accum'd ts  (in ts tmr cnts).                 */
+CPU_CORE_EXT  CPU_TS_TMR       CPU_TS_64_TmrPrev;               /* 64-bit ts prev tmr (in ts tmr cnts).                 */
+#endif
+
+#if  (CPU_CFG_TS_TMR_EN   == DEF_ENABLED)
+CPU_CORE_EXT  CPU_TS_TMR_FREQ  CPU_TS_TmrFreq_Hz;               /* CPU ts tmr freq (in Hz).                             */
+#endif
+
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+CPU_CORE_EXT  CPU_INT16U       CPU_IntDisMeasCtr;               /* Nbr tot    ints dis'd ctr.                           */
+CPU_CORE_EXT  CPU_INT16U       CPU_IntDisNestCtr;               /* Nbr nested ints dis'd ctr.                           */
+                                                                /* Ints dis'd time (in ts tmr cnts) : ...               */
+CPU_CORE_EXT  CPU_TS_TMR       CPU_IntDisMeasStart_cnts;        /* ...  start time.                                     */
+CPU_CORE_EXT  CPU_TS_TMR       CPU_IntDisMeasStop_cnts;         /* ...  stop  time.                                     */
+CPU_CORE_EXT  CPU_TS_TMR       CPU_IntDisMeasOvrhd_cnts;        /* ...        time meas ovrhd.                          */
+CPU_CORE_EXT  CPU_TS_TMR       CPU_IntDisMeasMaxCur_cnts;       /* ...     resetable max time dis'd.                    */
+CPU_CORE_EXT  CPU_TS_TMR       CPU_IntDisMeasMax_cnts;          /* ... non-resetable max time dis'd.                    */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         CPU_SW_EXCEPTION()
+*
+* Description : Trap unrecoverable software exception.
+*
+* Argument(s) : err_rtn_val     Error type &/or value of the calling function to return (see Note #2b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) CPU_SW_EXCEPTION() deadlocks the current code execution -- whether multi-tasked/
+*                   -processed/-threaded or single-threaded -- when the current code execution cannot 
+*                   gracefully recover or report a fault or exception condition.
+*
+*                   Example CPU_SW_EXCEPTION() call :
+*
+*                       void  Fnct (CPU_ERR  *p_err)
+*                       {
+*                           :
+*
+*                           if (p_err == (CPU_ERR *)0) {        If 'p_err' NULL, cannot return error ...
+*                               CPU_SW_EXCEPTION(;);            ... so trap invalid argument exception.
+*                           }
+*
+*                           :
+*                       }
+*
+*                   See also 'cpu_core.c  CPU_SW_Exception()  Note #1'.
+*
+*               (2) (a) CPU_SW_EXCEPTION()  MAY be developer-implemented to output &/or handle any error or 
+*                       exception conditions; but since CPU_SW_EXCEPTION() is intended to trap unrecoverable 
+*                       software  conditions, it is recommended that developer-implemented versions prevent 
+*                       execution of any code following calls to CPU_SW_EXCEPTION() by deadlocking the code 
+*                       (see Note #1).
+*
+*                           Example CPU_SW_EXCEPTION() :
+*
+*                               #define  CPU_SW_EXCEPTION(err_rtn_val)      do {                         \
+*                                                                               Log(__FILE__, __LINE__); \
+*                                                                               CPU_SW_Exception();      \
+*                                                                           } while (0)
+*
+*                   (b) (1) However, if execution of code following calls to CPU_SW_EXCEPTION() is required 
+*                           (e.g. for automated testing); it is recommended that the last statement in 
+*                           developer-implemented versions be to return from the current function to prevent 
+*                           possible software exception(s) in the current function from triggering CPU &/or 
+*                           hardware exception(s).
+*
+*                           Example CPU_SW_EXCEPTION() :
+*
+*                               #define  CPU_SW_EXCEPTION(err_rtn_val)      do {                         \
+*                                                                               Log(__FILE__, __LINE__); \
+*                                                                               return  err_rtn_val;     \
+*                                                                           } while (0)
+*
+*                           (A) Note that 'err_rtn_val' in the return statement MUST NOT be enclosed in 
+*                               parentheses.  This allows CPU_SW_EXCEPTION() to return from functions that 
+*                               return 'void', i.e. NO return type or value (see also Note #2b2A).
+*
+*                       (2) In order for CPU_SW_EXCEPTION() to return from functions with various return 
+*                           types/values, each caller function MUST pass an appropriate error return type 
+*                           & value to CPU_SW_EXCEPTION().
+*
+*                           (A) Note that CPU_SW_EXCEPTION()  MUST NOT be passed any return type or value 
+*                               for functions that return 'void', i.e. NO return type or value; but SHOULD 
+*                               instead be passed a single semicolon.  This prevents possible compiler 
+*                               warnings that CPU_SW_EXCEPTION() is passed too few arguments.  However, 
+*                               the compiler may warn that CPU_SW_EXCEPTION() does NOT prevent creating 
+*                               null statements on lines with NO other code statements.
+*
+*                           Example CPU_SW_EXCEPTION() calls :
+*
+*                               void  Fnct (CPU_ERR  *p_err)
+*                               {
+*                                   :
+*
+*                                   if (p_err == (CPU_ERR *)0) {
+*                                       CPU_SW_EXCEPTION(;);            Exception macro returns NO value
+*                                   }                                       (see Note #2b2A)
+*
+*                                   :
+*                               }
+*
+*                               CPU_BOOLEAN  Fnct (CPU_ERR  *p_err)
+*                               {
+*                                   :
+*
+*                                   if (p_err == (CPU_ERR *)0) {
+*                                       CPU_SW_EXCEPTION(DEF_FAIL);     Exception macro returns 'DEF_FAIL'
+*                                   }
+*
+*                                   :
+*                               }
+*
+*                               OBJ  *Fnct (CPU_ERR  *p_err)
+*                               {
+*                                   :
+*
+*                                   if (p_err == (CPU_ERR *)0) {
+*                                       CPU_SW_EXCEPTION((OBJ *)0);     Exception macro returns NULL 'OBJ *'
+*                                   }
+*
+*                                   :
+*                               }
+*
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_SW_EXCEPTION                                                       /* See Note #2.                         */
+#define  CPU_SW_EXCEPTION(err_rtn_val)              do {                    \
+                                                        CPU_SW_Exception(); \
+                                                    } while (0)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_VAL_UNUSED()
+*
+* Description : 
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : #### various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+
+#define  CPU_VAL_UNUSED(val)        ((void)&(val));
+
+
+#define  CPU_VAL_IGNORED(val)       CPU_VAL_UNUSED(val)
+
+
+/*
+*********************************************************************************************************
+*                                          CPU_TYPE_CREATE()
+*
+* Description : Creates a generic type value.
+*
+* Argument(s) : char_1      1st ASCII character to create generic type value.
+*
+*               char_2      2nd ASCII character to create generic type value.
+*
+*               char_3      3rd ASCII character to create generic type value.
+*
+*               char_4      4th ASCII character to create generic type value.
+*
+* Return(s)   : 32-bit generic type value.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) (a) Generic type values should be #define'd with large, non-trivial values to trap 
+*                       & discard invalid/corrupted objects based on type value.
+*
+*                       In other words, by assigning large, non-trivial values to valid objects' type 
+*                       fields; the likelihood that an object with an unassigned &/or corrupted type 
+*                       field will contain a value is highly improbable & therefore the object itself 
+*                       will be trapped as invalid.
+*
+*                   (b) (1) CPU_TYPE_CREATE()  creates a 32-bit type value from four values.
+*
+*                       (2) Ideally, generic type values SHOULD be created from 'CPU_CHAR' characters to 
+*                           represent ASCII string abbreviations of the specific object types.  Memory 
+*                           displays of object type values will display the specific object types with 
+*                           their chosen ASCII names.
+*
+*                           Examples :
+*
+*                               #define  FILE_TYPE  CPU_TYPE_CREATE('F', 'I', 'L', 'E')
+*                               #define  BUF_TYPE   CPU_TYPE_CREATE('B', 'U', 'F', ' ')
+*********************************************************************************************************
+*/
+
+#if     (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
+#define  CPU_TYPE_CREATE(char_1, char_2, char_3, char_4)        (((CPU_INT32U)((CPU_INT08U)(char_1)) << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_2)) << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_3)) << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_4))))
+
+#else
+
+#if    ((CPU_CFG_DATA_SIZE   == CPU_WORD_SIZE_64) || \
+        (CPU_CFG_DATA_SIZE   == CPU_WORD_SIZE_32))
+#define  CPU_TYPE_CREATE(char_1, char_2, char_3, char_4)        (((CPU_INT32U)((CPU_INT08U)(char_1))) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_2)) << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_3)) << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_4)) << (3u * DEF_OCTET_NBR_BITS)))
+
+
+#elif   (CPU_CFG_DATA_SIZE   == CPU_WORD_SIZE_16)
+#define  CPU_TYPE_CREATE(char_1, char_2, char_3, char_4)        (((CPU_INT32U)((CPU_INT08U)(char_1)) << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_2)) << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_3))) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_4)) << (1u * DEF_OCTET_NBR_BITS)))
+
+#else                                                           /* Dflt CPU_WORD_SIZE_08.                               */
+#define  CPU_TYPE_CREATE(char_1, char_2, char_3, char_4)        (((CPU_INT32U)((CPU_INT08U)(char_1)) << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_2)) << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_3)) << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                                 ((CPU_INT32U)((CPU_INT08U)(char_4))))
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*
+* Note(s) : (1) CPU interrupts disabled time measurement functions prototyped/defined only if 
+*               CPU_CFG_INT_DIS_MEAS_EN  #define'd in 'cpu_cfg.h'.
+*
+*           (2) (a) CPU_CntLeadZeros()  defined in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_LEAD_ZEROS_ASM_PRESENT       #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT   NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s)
+*
+*               (b) CPU_CntTrailZeros() defined in :
+*
+*                   (1) 'cpu_a.asm',  if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT      #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable assembly-optimized function(s)
+*
+*                   (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT  NOT #define'd in 'cpu.h'/
+*                                         'cpu_cfg.h' to enable C-source-optimized function(s)
+*********************************************************************************************************
+*/
+
+void             CPU_Init                 (void);
+
+void             CPU_SW_Exception         (void);
+
+
+
+#if (CPU_CFG_NAME_EN == DEF_ENABLED)                                    /* -------------- CPU NAME FNCTS -------------- */
+void             CPU_NameClr              (void);
+
+void             CPU_NameGet              (       CPU_CHAR  *p_name,
+                                                  CPU_ERR   *p_err);
+
+void             CPU_NameSet              (const  CPU_CHAR  *p_name,
+                                                  CPU_ERR   *p_err);
+#endif
+
+
+
+                                                                        /* --------------- CPU TS FNCTS --------------- */
+#if (CPU_CFG_TS_32_EN == DEF_ENABLED)
+CPU_TS32         CPU_TS_Get32             (void);
+#endif
+
+#if (CPU_CFG_TS_64_EN == DEF_ENABLED)
+CPU_TS64         CPU_TS_Get64             (void);
+#endif
+
+#if (CPU_CFG_TS_EN    == DEF_ENABLED)
+void             CPU_TS_Update            (void);
+#endif
+
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)                                  /* ------------- CPU TS TMR FNCTS ------------- */
+CPU_TS_TMR_FREQ  CPU_TS_TmrFreqGet        (CPU_ERR          *p_err);
+
+void             CPU_TS_TmrFreqSet        (CPU_TS_TMR_FREQ   freq_hz);
+#endif
+
+
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN                                         /* -------- CPU INT DIS TIME MEAS FNCTS ------- */
+                                                                        /* See Note #1.                                 */
+CPU_TS_TMR       CPU_IntDisMeasMaxCurReset(void);
+
+CPU_TS_TMR       CPU_IntDisMeasMaxCurGet  (void);
+
+CPU_TS_TMR       CPU_IntDisMeasMaxGet     (void);
+
+
+void             CPU_IntDisMeasStart      (void);
+
+void             CPU_IntDisMeasStop       (void);
+#endif
+
+
+
+                                                                        /* ----------- CPU CNT ZEROS FNCTS ------------ */
+#ifdef  CPU_CFG_LEAD_ZEROS_ASM_PRESENT
+#ifdef __cplusplus
+extern  "C" {
+#endif
+#endif
+
+CPU_DATA         CPU_CntLeadZeros         (CPU_DATA    val);
+
+#ifdef  CPU_CFG_LEAD_ZEROS_ASM_PRESENT
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#if     (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_08)
+CPU_DATA         CPU_CntLeadZeros08       (CPU_INT08U  val);
+#endif
+#if     (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_16)
+CPU_DATA         CPU_CntLeadZeros16       (CPU_INT16U  val);
+#endif
+#if     (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_32)
+CPU_DATA         CPU_CntLeadZeros32       (CPU_INT32U  val);
+#endif
+#if     (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_64)
+CPU_DATA         CPU_CntLeadZeros64       (CPU_INT64U  val);
+#endif
+
+
+#ifdef  CPU_CFG_LEAD_ZEROS_ASM_PRESENT
+#ifdef __cplusplus
+extern  "C" {
+#endif
+#endif
+  
+CPU_DATA         CPU_CntTrailZeros        (CPU_DATA    val);
+
+#ifdef  CPU_CFG_LEAD_ZEROS_ASM_PRESENT
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#if     (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_08)
+CPU_DATA         CPU_CntTrailZeros08      (CPU_INT08U  val);
+#endif
+#if     (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_16)
+CPU_DATA         CPU_CntTrailZeros16      (CPU_INT16U  val);
+#endif
+#if     (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_32)
+CPU_DATA         CPU_CntTrailZeros32      (CPU_INT32U  val);
+#endif
+#if     (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_64)
+CPU_DATA         CPU_CntTrailZeros64      (CPU_INT64U  val);
+#endif
+
+CPU_INT08U       CPU_PopCnt32             (CPU_INT32U  value);
+
+                                                                        /* ------------ CPU PERF MON RESET ------------ */
+#if (CPU_CFG_PERF_MON_EN == DEF_ENABLED)
+void             CPU_StatReset            (void);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                      DEFINED IN PRODUCT'S BSP
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          CPU_TS_TmrInit()
+*
+* Description : Initialize & start CPU timestamp timer.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_TS_Init().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrInit() is an application/BSP function that MUST be defined by the developer 
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR' 
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater 
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR' 
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be 
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets 
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple 
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the 
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                   (c) When applicable, timer period SHOULD be less than the typical measured time 
+*                       but MUST be less than the maximum measured time; otherwise, timer resolution 
+*                       inadequate to measure desired times.
+*
+*                   See also 'CPU_TS_TmrRd()  Note #2'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+void  CPU_TS_TmrInit(void);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_TS_TmrRd()
+*
+* Description : Get current CPU timestamp timer count value.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Timestamp timer count (see Notes #2a & #2b).
+*
+* Caller(s)   : CPU_TS_Init(),
+*               CPU_TS_Get32(),
+*               CPU_TS_Get64(),
+*               CPU_IntDisMeasStart(),
+*               CPU_IntDisMeasStop().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but SHOULD NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrRd() is an application/BSP function that MUST be defined by the developer 
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR' 
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater 
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR' 
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be 
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets 
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple 
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the 
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                       (1) If timer is a 'down' counter whose values decrease with each time count,
+*                           then the returned timer value MUST be ones-complemented.
+*
+*                   (c) (1) When applicable, the amount of time measured by CPU timestamps is 
+*                           calculated by either of the following equations :
+*
+*                           (A) Time measured  =  Number timer counts  *  Timer period
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured 
+*                                       Timer period            Timer's period in some units of 
+*                                                                   (fractional) seconds
+*                                       Time measured           Amount of time measured, in same 
+*                                                                   units of (fractional) seconds 
+*                                                                   as the Timer period
+*
+*                                                  Number timer counts
+*                           (B) Time measured  =  ---------------------
+*                                                    Timer frequency
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer frequency         Timer's frequency in some units 
+*                                                                   of counts per second
+*                                       Time measured           Amount of time measured, in seconds
+*
+*                       (2) Timer period SHOULD be less than the typical measured time but MUST be less 
+*                           than the maximum measured time; otherwise, timer resolution inadequate to 
+*                           measure desired times.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+CPU_TS_TMR  CPU_TS_TmrRd(void);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_TSxx_to_uSec()
+*
+* Description : Convert a 32-/64-bit CPU timestamp from timer counts to microseconds.
+*
+* Argument(s) : ts_cnts   CPU timestamp (in timestamp timer counts [see Note #2aA]).
+*
+* Return(s)   : Converted CPU timestamp (in microseconds           [see Note #2aD]).
+*
+* Caller(s)   : Application.
+*
+*               This function is an (optional) CPU module application programming interface (API) 
+*               function which MAY be implemented by application/BSP function(s) [see Note #1] & 
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS32_to_uSec()/CPU_TS64_to_uSec() are application/BSP functions that MAY be 
+*                   optionally defined by the developer when either of the following CPU features is 
+*                   enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) The amount of time measured by CPU timestamps is calculated by either of 
+*                       the following equations :
+*
+*                                                                        10^6 microseconds
+*                       (1) Time measured  =   Number timer counts   *  -------------------  *  Timer period
+*                                                                            1 second
+*
+*                                              Number timer counts       10^6 microseconds
+*                       (2) Time measured  =  ---------------------  *  -------------------
+*                                                Timer frequency             1 second
+*
+*                               where
+*
+*                                   (A) Number timer counts     Number of timer counts measured
+*                                   (B) Timer frequency         Timer's frequency in some units 
+*                                                                   of counts per second
+*                                   (C) Timer period            Timer's period in some units of 
+*                                                                   (fractional)  seconds
+*                                   (D) Time measured           Amount of time measured, 
+*                                                                   in microseconds
+*
+*                   (b) Timer period SHOULD be less than the typical measured time but MUST be less 
+*                       than the maximum measured time; otherwise, timer resolution inadequate to 
+*                       measure desired times.
+*
+*                   (c) Specific implementations may convert any number of CPU_TS32 or CPU_TS64 bits 
+*                       -- up to 32 or 64, respectively -- into microseconds.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_32_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS32_to_uSec(CPU_TS32  ts_cnts);
+#endif
+
+#if (CPU_CFG_TS_64_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS64_to_uSec(CPU_TS64  ts_cnts);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_CFG_NAME_EN
+#error  "CPU_CFG_NAME_EN                       not #define'd in 'cpu_cfg.h'"
+#error  "                                [MUST be  DEF_ENABLED ]           "
+#error  "                                [     ||  DEF_DISABLED]           "
+
+#elif  ((CPU_CFG_NAME_EN != DEF_ENABLED ) && \
+        (CPU_CFG_NAME_EN != DEF_DISABLED))
+#error  "CPU_CFG_NAME_EN                 illegally #define'd in 'cpu_cfg.h'"
+#error  "                                [MUST be  DEF_ENABLED ]           "
+#error  "                                [     ||  DEF_DISABLED]           "
+
+
+#elif   (CPU_CFG_NAME_EN == DEF_ENABLED)
+
+#ifndef  CPU_CFG_NAME_SIZE
+#error  "CPU_CFG_NAME_SIZE                     not #define'd in 'cpu_cfg.h'"
+#error  "                                [MUST be  >=   1]                 "
+#error  "                                [     &&  <= 255]                 "
+
+#elif   (DEF_CHK_VAL(CPU_CFG_NAME_SIZE,            \
+                     1,                            \
+                     DEF_INT_08U_MAX_VAL) != DEF_OK)
+#error  "CPU_CFG_NAME_SIZE               illegally #define'd in 'cpu_cfg.h'"
+#error  "                                [MUST be  >=   1]                 "
+#error  "                                [     &&  <= 255]                 "
+#endif
+
+#endif
+
+
+
+
+#ifndef  CPU_CFG_TS_32_EN
+#error  "CPU_CFG_TS_32_EN                      not #define'd in 'cpu_cfg.h'"
+#error  "                                [MUST be  DEF_DISABLED]           "
+#error  "                                [     ||  DEF_ENABLED ]           "
+
+#elif  ((CPU_CFG_TS_32_EN != DEF_DISABLED) && \
+        (CPU_CFG_TS_32_EN != DEF_ENABLED ))
+#error  "CPU_CFG_TS_32_EN                illegally #define'd in 'cpu_cfg.h'"
+#error  "                                [MUST be  DEF_DISABLED]           "
+#error  "                                [     ||  DEF_ENABLED ]           "
+
+#endif
+
+
+#ifndef  CPU_CFG_TS_64_EN
+#error  "CPU_CFG_TS_64_EN                      not #define'd in 'cpu_cfg.h'"
+#error  "                                [MUST be  DEF_DISABLED]           "
+#error  "                                [     ||  DEF_ENABLED ]           "
+
+#elif  ((CPU_CFG_TS_64_EN != DEF_DISABLED) && \
+        (CPU_CFG_TS_64_EN != DEF_ENABLED ))
+#error  "CPU_CFG_TS_64_EN                illegally #define'd in 'cpu_cfg.h'"
+#error  "                                [MUST be  DEF_DISABLED]           "
+#error  "                                [     ||  DEF_ENABLED ]           "
+
+#endif
+
+                                                                /* Correctly configured in 'cpu_core.h'; DO NOT MODIFY. */
+#ifndef  CPU_CFG_TS_EN
+#error  "CPU_CFG_TS_EN                         not #define'd in 'cpu_core.h'"
+#error  "                                [MUST be  DEF_DISABLED]            "
+#error  "                                [     ||  DEF_ENABLED ]            "
+
+#elif  ((CPU_CFG_TS_EN != DEF_DISABLED) && \
+        (CPU_CFG_TS_EN != DEF_ENABLED ))
+#error  "CPU_CFG_TS_EN                   illegally #define'd in 'cpu_core.h'"
+#error  "                                [MUST be  DEF_DISABLED]            "
+#error  "                                [     ||  DEF_ENABLED ]            "
+
+#endif
+
+
+                                                                /* Correctly configured in 'cpu_core.h'; DO NOT MODIFY. */
+#ifndef  CPU_CFG_TS_TMR_EN
+#error  "CPU_CFG_TS_TMR_EN                     not #define'd in 'cpu_core.h'"
+#error  "                                [MUST be  DEF_DISABLED]            "
+#error  "                                [     ||  DEF_ENABLED ]            "
+
+#elif  ((CPU_CFG_TS_TMR_EN != DEF_DISABLED) && \
+        (CPU_CFG_TS_TMR_EN != DEF_ENABLED ))
+#error  "CPU_CFG_TS_TMR_EN               illegally #define'd in 'cpu_core.h'"
+#error  "                                [MUST be  DEF_DISABLED]            "
+#error  "                                [     ||  DEF_ENABLED ]            "
+
+
+#elif   (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+
+#ifndef  CPU_CFG_TS_TMR_SIZE
+#error  "CPU_CFG_TS_TMR_SIZE                   not #define'd in 'cpu_cfg.h'       "
+#error  "                                [MUST be  CPU_WORD_SIZE_08   8-bit timer]"
+#error  "                                [     ||  CPU_WORD_SIZE_16  16-bit timer]"
+#error  "                                [     ||  CPU_WORD_SIZE_32  32-bit timer]"
+#error  "                                [     ||  CPU_WORD_SIZE_64  64-bit timer]"
+
+#elif  ((CPU_CFG_TS_TMR_SIZE != CPU_WORD_SIZE_08) && \
+        (CPU_CFG_TS_TMR_SIZE != CPU_WORD_SIZE_16) && \
+        (CPU_CFG_TS_TMR_SIZE != CPU_WORD_SIZE_32) && \
+        (CPU_CFG_TS_TMR_SIZE != CPU_WORD_SIZE_64))
+#error  "CPU_CFG_TS_TMR_SIZE             illegally #define'd in 'cpu_cfg.h'       "
+#error  "                                [MUST be  CPU_WORD_SIZE_08   8-bit timer]"
+#error  "                                [     ||  CPU_WORD_SIZE_16  16-bit timer]"
+#error  "                                [     ||  CPU_WORD_SIZE_32  32-bit timer]"
+#error  "                                [     ||  CPU_WORD_SIZE_64  64-bit timer]"
+#endif
+
+#endif
+
+
+
+#ifndef  CPU_CFG_INT_DIS_MEAS_EN
+#if 0                                                           /* Optionally configured in 'cpu_cfg.h'; DO NOT MODIFY. */
+#error  "CPU_CFG_INT_DIS_MEAS_EN               not #define'd in 'cpu_cfg.h'"
+#endif
+
+#else
+
+#ifndef  CPU_CFG_INT_DIS_MEAS_OVRHD_NBR
+#error  "CPU_CFG_INT_DIS_MEAS_OVRHD_NBR        not #define'd in 'cpu_cfg.h' "
+#error  "                                [MUST be  >= CPU_TIME_MEAS_NBR_MIN]"
+#error  "                                [     ||  <= CPU_TIME_MEAS_NBR_MAX]"
+
+#elif   (DEF_CHK_VAL(CPU_CFG_INT_DIS_MEAS_OVRHD_NBR, \
+                     CPU_TIME_MEAS_NBR_MIN,          \
+                     CPU_TIME_MEAS_NBR_MAX) != DEF_OK)
+#error  "CPU_CFG_INT_DIS_MEAS_OVRHD_NBR  illegally #define'd in 'cpu_cfg.h' "
+#error  "                                [MUST be  >= CPU_TIME_MEAS_NBR_MIN]"
+#error  "                                [     ||  <= CPU_TIME_MEAS_NBR_MAX]"
+
+#endif
+
+#endif
+
+
+
+
+#ifndef  CPU_CFG_LEAD_ZEROS_ASM_PRESENT
+#if 0                                                           /* Optionally configured in 'cpu_cfg.h'; DO NOT MODIFY. */
+#error  "CPU_CFG_LEAD_ZEROS_ASM_PRESENT        not #define'd in 'cpu.h'/'cpu_cfg.h'"
+#endif
+#endif
+
+
+#ifndef  CPU_CFG_TRAIL_ZEROS_ASM_PRESENT
+#if 0                                                           /* Optionally configured in 'cpu_cfg.h'; DO NOT MODIFY. */
+#error  "CPU_CFG_TRAIL_ZEROS_ASM_PRESENT       not #define'd in 'cpu.h'/'cpu_cfg.h'"
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    CPU PORT CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_CFG_ADDR_SIZE
+#error  "CPU_CFG_ADDR_SIZE      not #define'd in 'cpu.h'"
+#endif
+
+#ifndef  CPU_CFG_DATA_SIZE
+#error  "CPU_CFG_DATA_SIZE      not #define'd in 'cpu.h'"
+#endif
+
+#ifndef  CPU_CFG_DATA_SIZE_MAX
+#error  "CPU_CFG_DATA_SIZE_MAX  not #define'd in 'cpu.h'"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    LIBRARY CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* See 'cpu_core.h  Note #1a'.                          */
+#if     (LIB_VERSION < 13500u)
+#error  "LIB_VERSION  [SHOULD be >= V1.35.00]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'cpu_core.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of CPU core module include.                      */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CPU/cpu_def.h b/src/ucos_v1_42/micrium_source/uC-CPU/cpu_def.h
new file mode 100644
index 0000000..8966e23
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CPU/cpu_def.h
@@ -0,0 +1,220 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      CPU CONFIGURATION DEFINES
+*
+* Filename      : cpu_def.h
+* Version       : V1.30.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This CPU definition header file is protected from multiple pre-processor inclusion 
+*               through use of the CPU definition module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  CPU_DEF_MODULE_PRESENT
+#define  CPU_DEF_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                   CORE CPU MODULE VERSION NUMBER
+*
+* Note(s) : (1) (a) The core CPU module software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer 
+*                                                       portion denotes the major version number & the unscaled 
+*                                                       fractional portion denotes the (concatenated) minor 
+*                                                       version numbers
+*********************************************************************************************************
+*/
+
+#define  CPU_CORE_VERSION                              13002u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU WORD CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_ADDR_SIZE & CPU_CFG_DATA_SIZE in 'cpu.h' with CPU's word sizes :
+*
+*                   CPU_WORD_SIZE_08             8-bit word size
+*                   CPU_WORD_SIZE_16            16-bit word size
+*                   CPU_WORD_SIZE_32            32-bit word size
+*                   CPU_WORD_SIZE_64            64-bit word size
+*
+*           (2) Configure CPU_CFG_ENDIAN_TYPE in 'cpu.h' with CPU's data-word-memory order :
+*
+*               (a) CPU_ENDIAN_TYPE_BIG         Big-   endian word order (CPU words' most  significant
+*                                                                         octet @ lowest memory address)
+*               (b) CPU_ENDIAN_TYPE_LITTLE      Little-endian word order (CPU words' least significant
+*                                                                         octet @ lowest memory address)
+*********************************************************************************************************
+*/
+
+                                                        /* ---------------------- CPU WORD SIZE ----------------------- */
+#define  CPU_WORD_SIZE_08                          1u   /*  8-bit word size (in octets).                                */
+#define  CPU_WORD_SIZE_16                          2u   /* 16-bit word size (in octets).                                */
+#define  CPU_WORD_SIZE_32                          4u   /* 32-bit word size (in octets).                                */
+#define  CPU_WORD_SIZE_64                          8u   /* 64-bit word size (in octets).                                */
+
+
+                                                        /* ------------------ CPU WORD-ENDIAN ORDER ------------------- */
+#define  CPU_ENDIAN_TYPE_NONE                      0u
+#define  CPU_ENDIAN_TYPE_BIG                       1u   /* Big-   endian word order (see Note #1a).                     */
+#define  CPU_ENDIAN_TYPE_LITTLE                    2u   /* Little-endian word order (see Note #1b).                     */
+
+
+/*
+*********************************************************************************************************
+*                                       CPU STACK CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_STK_GROWTH in 'cpu.h' with CPU's stack growth order :
+*
+*               (a) CPU_STK_GROWTH_LO_TO_HI     CPU stack pointer increments to the next higher  stack 
+*                                                   memory address after data is pushed onto the stack
+*               (b) CPU_STK_GROWTH_HI_TO_LO     CPU stack pointer decrements to the next lower   stack 
+*                                                   memory address after data is pushed onto the stack
+*********************************************************************************************************
+*/
+
+                                                        /* ------------------ CPU STACK GROWTH ORDER ------------------ */
+#define  CPU_STK_GROWTH_NONE                       0u
+#define  CPU_STK_GROWTH_LO_TO_HI                   1u   /* CPU stk incs towards higher mem addrs (see Note #1a).        */
+#define  CPU_STK_GROWTH_HI_TO_LO                   2u   /* CPU stk decs towards lower  mem addrs (see Note #1b).        */
+
+
+/*
+*********************************************************************************************************
+*                                   CRITICAL SECTION CONFIGURATION
+*
+* Note(s) : (1) Configure CPU_CFG_CRITICAL_METHOD with CPU's/compiler's critical section method :
+*
+*                                                       Enter/Exit critical sections by ...
+*
+*                   CPU_CRITICAL_METHOD_INT_DIS_EN      Disable/Enable interrupts
+*                   CPU_CRITICAL_METHOD_STATUS_STK      Push/Pop       interrupt status onto stack
+*                   CPU_CRITICAL_METHOD_STATUS_LOCAL    Save/Restore   interrupt status to local variable
+*
+*               (a) CPU_CRITICAL_METHOD_INT_DIS_EN  is NOT a preferred method since it does NOT support
+*                   multiple levels of interrupts.  However, with some CPUs/compilers, this is the only
+*                   available method.
+*
+*               (b) CPU_CRITICAL_METHOD_STATUS_STK    is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Push/save   interrupt status onto a local stack
+*                       (2) Disable     interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Pop/restore interrupt status from a local stack
+*
+*               (c) CPU_CRITICAL_METHOD_STATUS_LOCAL  is one preferred method since it supports multiple
+*                   levels of interrupts.  However, this method assumes that the compiler provides C-level
+*                   &/or assembly-level functionality for the following :
+*
+*                     ENTER CRITICAL SECTION :
+*                       (1) Save    interrupt status into a local variable
+*                       (2) Disable interrupts
+*
+*                     EXIT  CRITICAL SECTION :
+*                       (3) Restore interrupt status from a local variable
+*
+*           (2) Critical section macro's most likely require inline assembly.  If the compiler does NOT
+*               allow inline assembly in C source files, critical section macro's MUST call an assembly
+*               subroutine defined in a 'cpu_a.asm' file located in the following software directory :
+*
+*                   \\\\
+*
+*                       where
+*                                   directory path for common   CPU-compiler software
+*                                                      directory name for specific CPU
+*                                                 directory name for specific compiler
+*
+*           (3) (a) To save/restore interrupt status, a local variable 'cpu_sr' of type 'CPU_SR' MAY need 
+*                   to be declared (e.g. if 'CPU_CRITICAL_METHOD_STATUS_LOCAL' method is configured).
+*
+*                   (1) 'cpu_sr' local variable SHOULD be declared via the CPU_SR_ALLOC() macro which, 
+*                        if used, MUST be declared following ALL other local variables (see any 'cpu.h  
+*                        CRITICAL SECTION CONFIGURATION  Note #3a1').
+*
+*                        Example :
+*
+*                           void  Fnct (void)
+*                           {
+*                               CPU_INT08U  val_08;
+*                               CPU_INT16U  val_16;
+*                               CPU_INT32U  val_32;
+*                               CPU_SR_ALLOC();         MUST be declared after ALL other local variables
+*                                   :
+*                                   :
+*                           }
+*
+*               (b) Configure 'CPU_SR' data type with the appropriate-sized CPU data type large enough to 
+*                   completely store the CPU's/compiler's status word.
+*********************************************************************************************************
+*/
+
+                                                        /* --------------- CPU CRITICAL SECTION METHODS --------------- */
+#define  CPU_CRITICAL_METHOD_NONE                  0u   /*                                                              */
+#define  CPU_CRITICAL_METHOD_INT_DIS_EN            1u   /* DIS/EN       ints                    (see Note #1a).         */
+#define  CPU_CRITICAL_METHOD_STATUS_STK            2u   /* Push/Pop     int status onto stk     (see Note #1b).         */
+#define  CPU_CRITICAL_METHOD_STATUS_LOCAL          3u   /* Save/Restore int status to local var (see Note #1c).         */
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'cpu_def.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                  /* End of CPU def module include.                               */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CRC/Cfg/Template/crc_cfg.h b/src/ucos_v1_42/micrium_source/uC-CRC/Cfg/Template/crc_cfg.h
new file mode 100644
index 0000000..48bff9c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CRC/Cfg/Template/crc_cfg.h
@@ -0,0 +1,81 @@
+/*
+*********************************************************************************************************
+*                                                uC/CRC
+*           ERROR DETECTING CODE (EDC) & ERROR CORRECTING CODE (ECC) CALCULATION UTILITIES
+*
+*                         (c) Copyright 2007-2012; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/FS is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : crc_cfg.h
+* Version       : V1.09.00
+* Programmer(s) : BAN
+*                 EJ
+*********************************************************************************************************
+*/
+
+#ifndef  CRC_CFG_H
+#define  CRC_CFG_H
+
+
+/*
+*********************************************************************************************************
+*                                                 EDC
+*
+* Note(s) : (1) Configure EDC_CRC_CFG_ERR_ARG_CHK_EXT_EN to enable/disable the CRC external argument
+*               check feature
+*
+*           (2) Configure EDC_CRC_CFG_OPTIMIZE_ASM_EN to enable/disable optimized assembly-language
+*               calculation.
+*
+*           (3) Each of these determine whether the associated table of pre-computed CRC values will
+*               be included in the build.  For more information about the tables, the meaning of the
+*               identifiers, and how these are used, please refer to the documentation.
+*********************************************************************************************************
+*/
+
+#define  EDC_CRC_CFG_ERR_ARG_CHK_EXT_EN          DEF_ENABLED    /* See Note #1.                                         */
+#define  EDC_CRC_CFG_OPTIMIZE_ASM_EN             DEF_DISABLED   /* See Note #2.                                         */
+
+#define  EDC_CRC_CFG_CRC16_1021_EN               DEF_ENABLED    /* See Note #3.                                         */
+#define  EDC_CRC_CFG_CRC16_8005_EN               DEF_ENABLED
+#define  EDC_CRC_CFG_CRC16_8048_EN               DEF_ENABLED
+#define  EDC_CRC_CFG_CRC32_EN                    DEF_ENABLED
+#define  EDC_CRC_CFG_CRC16_1021_REF_EN           DEF_ENABLED
+#define  EDC_CRC_CFG_CRC16_8005_REF_EN           DEF_ENABLED
+#define  EDC_CRC_CFG_CRC16_8048_REF_EN           DEF_ENABLED
+#define  EDC_CRC_CFG_CRC32_REF_EN                DEF_ENABLED
+
+/*
+*********************************************************************************************************
+*                                                 ECC
+*
+* Note(s) : (1) Configure ECC_HAMMING_CFG_ARG_CHK_EXT_EN to enable/disable the Hamming code external
+*               argument check feature
+*
+*********************************************************************************************************
+*/
+
+#define  ECC_HAMMING_CFG_ARG_CHK_EXT_EN          DEF_ENABLED    /* See Note #1.                                         */
+
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-CRC/Cfg/Template/crc_cfg.h.new b/src/ucos_v1_42/micrium_source/uC-CRC/Cfg/Template/crc_cfg.h.new
new file mode 100644
index 0000000..48bff9c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CRC/Cfg/Template/crc_cfg.h.new
@@ -0,0 +1,81 @@
+/*
+*********************************************************************************************************
+*                                                uC/CRC
+*           ERROR DETECTING CODE (EDC) & ERROR CORRECTING CODE (ECC) CALCULATION UTILITIES
+*
+*                         (c) Copyright 2007-2012; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/FS is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : crc_cfg.h
+* Version       : V1.09.00
+* Programmer(s) : BAN
+*                 EJ
+*********************************************************************************************************
+*/
+
+#ifndef  CRC_CFG_H
+#define  CRC_CFG_H
+
+
+/*
+*********************************************************************************************************
+*                                                 EDC
+*
+* Note(s) : (1) Configure EDC_CRC_CFG_ERR_ARG_CHK_EXT_EN to enable/disable the CRC external argument
+*               check feature
+*
+*           (2) Configure EDC_CRC_CFG_OPTIMIZE_ASM_EN to enable/disable optimized assembly-language
+*               calculation.
+*
+*           (3) Each of these determine whether the associated table of pre-computed CRC values will
+*               be included in the build.  For more information about the tables, the meaning of the
+*               identifiers, and how these are used, please refer to the documentation.
+*********************************************************************************************************
+*/
+
+#define  EDC_CRC_CFG_ERR_ARG_CHK_EXT_EN          DEF_ENABLED    /* See Note #1.                                         */
+#define  EDC_CRC_CFG_OPTIMIZE_ASM_EN             DEF_DISABLED   /* See Note #2.                                         */
+
+#define  EDC_CRC_CFG_CRC16_1021_EN               DEF_ENABLED    /* See Note #3.                                         */
+#define  EDC_CRC_CFG_CRC16_8005_EN               DEF_ENABLED
+#define  EDC_CRC_CFG_CRC16_8048_EN               DEF_ENABLED
+#define  EDC_CRC_CFG_CRC32_EN                    DEF_ENABLED
+#define  EDC_CRC_CFG_CRC16_1021_REF_EN           DEF_ENABLED
+#define  EDC_CRC_CFG_CRC16_8005_REF_EN           DEF_ENABLED
+#define  EDC_CRC_CFG_CRC16_8048_REF_EN           DEF_ENABLED
+#define  EDC_CRC_CFG_CRC32_REF_EN                DEF_ENABLED
+
+/*
+*********************************************************************************************************
+*                                                 ECC
+*
+* Note(s) : (1) Configure ECC_HAMMING_CFG_ARG_CHK_EXT_EN to enable/disable the Hamming code external
+*               argument check feature
+*
+*********************************************************************************************************
+*/
+
+#define  ECC_HAMMING_CFG_ARG_CHK_EXT_EN          DEF_ENABLED    /* See Note #1.                                         */
+
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-CRC/Source/crc_util.c b/src/ucos_v1_42/micrium_source/uC-CRC/Source/crc_util.c
new file mode 100644
index 0000000..69f5da8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CRC/Source/crc_util.c
@@ -0,0 +1,195 @@
+/*
+*********************************************************************************************************
+*                                               uC/CRC
+*           ERROR DETECTING CODE (EDC) & ERROR CORRECTING CODE (ECC) CALCULATION UTILITIES
+*
+*                          (c) Copyright 2007-2012; Micrium, Inc.; Weston, FL
+*
+*              All rights reserved.  Protected by international copyright laws.
+*
+*              uC/PRODUCT is provided in source form to registered licensees ONLY.  It is
+*              illegal to distribute this source code to any third party unless you receive
+*              written permission by an authorized Micrium representative.  Knowledge of
+*              the source code may NOT be used to develop a similar product.
+*
+*              Please help us continue to provide the Embedded community with the finest
+*              software available.  Your honesty is greatly appreciated.
+*
+*              You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       uC/CRC UTILITY LIBRARY
+*
+* Filename      : crc_util.c
+* Version       : V1.09.01
+* Programmer(s) : EJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#include 
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifdef CRC_UTIL_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef __cplusplus
+extern  "C" {                                  /* See Note #1.                                         */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef __cplusplus
+}                                              /* End of 'extern'al C lang linkage.                    */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* Pop cnt algorithms.                                  */
+#define CRC_UTIL_POPCNT_METHOD_FAST_MULT  0
+#define CRC_UTIL_POPCNT_METHOD_SLOW_MULT  1
+
+#define CRC_UTIL_POPCNT_METHOD           CRC_UTIL_POPCNT_METHOD_FAST_MULT
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           CRCUtil_PopCnt_32()
+*
+* Description : Compute population count (hamming weight) for value (number of bits set).
+*
+* Argument(s) : value           Value to compute population count on.
+*
+*
+* Return(s)   : value's population count.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) Algorithm taken from http://en.wikipedia.org/wiki/Hamming_weight
+*********************************************************************************************************
+*/
+
+CPU_INT08U  CRCUtil_PopCnt_32 (CPU_INT32U  value)
+{
+    CPU_INT32U  even_cnt;
+    CPU_INT32U  odd_cnt;
+    CPU_INT32U  result;
+
+
+    odd_cnt  = (value >> 1u) & CRC_UTIL_POPCNT_MASK01010101_32; /* 2-bits pieces.                                       */
+    result   =  value - odd_cnt;                                /* Same result as result=odd_cnt+(value & 0x55555555).  */
+
+    even_cnt =  result & CRC_UTIL_POPCNT_MASK00110011_32;       /* 4-bits pieces.                                       */
+    odd_cnt  = (result >> 2u) & CRC_UTIL_POPCNT_MASK00110011_32;
+    result   =  even_cnt + odd_cnt;
+
+    even_cnt =  result & CRC_UTIL_POPCNT_MASK00001111_32;       /* 8-bits pieces.                                       */
+    odd_cnt  = (result >> 4u) & CRC_UTIL_POPCNT_MASK00001111_32;
+    result   =  even_cnt + odd_cnt;
+
+#if CRC_UTIL_POPCNT_METHOD == CRC_UTIL_POPCNT_METHOD_SLOW_MULT
+    result  +=  result >> 8u;                                   /* 16-bits pieces into their lowest 8 bits              */
+    result  +=  result >> 16u;                                  /* Add together both counts.                            */
+
+    result  &=  0x3Fu
+    return (result);                                            /* Mask unwanted bits.                                  */
+#else
+    result = (result * CRC_UTIL_POPCNT_POWERSOF256_32) >> 24u;
+    return (result);
+#endif
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of CRC_UTIL module include.                           */
diff --git a/src/ucos_v1_42/micrium_source/uC-CRC/Source/crc_util.h b/src/ucos_v1_42/micrium_source/uC-CRC/Source/crc_util.h
new file mode 100644
index 0000000..c72a8e2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CRC/Source/crc_util.h
@@ -0,0 +1,143 @@
+/*
+*********************************************************************************************************
+*                                                uC/CRC
+*           ERROR DETECTING CODE (EDC) & ERROR CORRECTING CODE (ECC) CALCULATION UTILITIES
+*
+*                         (c) Copyright 2007-2012; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/FS is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/CRC UTILITY LIBRARY
+*
+* Filename      : crc_util.h
+* Version       : V1.09.01
+* Programmer(s) : EJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef   CRC_UTIL_MODULE_PRESENT
+#define   CRC_UTIL_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef    CRC_UTIL_MODULE
+#define   CRC_UTIL_EXT
+#else
+#define   CRC_UTIL_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* Pop cnt algorithm csts.                              */
+#define CRC_UTIL_POPCNT_MASK01010101_32  0x55555555u
+#define CRC_UTIL_POPCNT_MASK00110011_32  0x33333333u
+#define CRC_UTIL_POPCNT_MASK00001111_32  0x0F0F0F0Fu
+#define CRC_UTIL_POPCNT_POWERSOF256_32   0x01010101u
+
+
+/*
+*********************************************************************************************************
+*                                       ECC ERROR CODES DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       ERROR ADDRESS DATA TYPE
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        ECC MODULE DATA TYPE
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_INT08U  CRCUtil_PopCnt_32 (CPU_INT32U  v);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of ECC module include.                           */
diff --git a/src/ucos_v1_42/micrium_source/uC-CRC/Source/ecc.h b/src/ucos_v1_42/micrium_source/uC-CRC/Source/ecc.h
new file mode 100644
index 0000000..7c60627
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CRC/Source/ecc.h
@@ -0,0 +1,193 @@
+/*
+*********************************************************************************************************
+*                                                uC/CRC
+*           ERROR DETECTING CODE (EDC) & ERROR CORRECTING CODE (ECC) CALCULATION UTILITIES
+*
+*                         (c) Copyright 2007-2012; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/FS is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               ERROR CORRECTING CODE (ECC) DEFINITIONS
+*
+* Filename      : ecc.h
+* Version       : V1.09.01
+* Programmer(s) : FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef   ECC_PRESENT
+#define   ECC_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef    ECC_MODULE
+#define   ECC_EXT
+#else
+#define   ECC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          ECC ERROR CODES
+*********************************************************************************************************
+*/
+
+typedef enum ecc_err {
+    ECC_ERR_NONE                                 =      0u,     /* No error.                                            */
+    ECC_ERR_CORRECTABLE                          =      1u,     /* Correctable error detected in data.                  */
+    ECC_ERR_ECC_CORRECTABLE                      =      2u,     /* Correctable error detected in ECC.                   */
+    ECC_ERR_INVALID_ARG                          =      3u,     /* Argument passed invalid value.                       */
+    ECC_ERR_INVALID_LEN                          =      4u,     /* Len argument passed invalid length.                  */
+    ECC_ERR_NULL_PTR                             =      5u,     /* Pointer argument passed NULL pointer.                */
+    ECC_ERR_UNCORRECTABLE                        =      6u      /* Uncorrectable error detected in data.                */
+} ECC_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+enum {
+    ECC_FAULT = ((CPU_INT08U)-1)
+};
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       ERROR ADDRESS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  ecc_err_loc {
+    CPU_INT08U  LocBit;
+    CPU_SIZE_T  LocOctet;
+} ECC_ERR_LOC;
+
+/*
+*********************************************************************************************************
+*                                        ECC MODULE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  void        (*ECC_CALC_FNCT)   (void          *p_buf,  /* Calc ECC.                                            */
+                                         CPU_SIZE_T     len,
+                                         void          *p_buf_ext,
+                                         CPU_SIZE_T     len_ext,
+                                         CPU_INT08U    *p_ecc,
+                                         ECC_ERR       *p_err);
+
+typedef  CPU_INT08U  (*ECC_CHK_FNCT)    (void          *p_buf,  /* Chk ECC.                                             */
+                                         CPU_SIZE_T     len,
+                                         void          *p_buf_ext,
+                                         CPU_SIZE_T     len_ext,
+                                         CPU_INT08U    *p_ecc,
+                                         ECC_ERR_LOC    err_loc_tbl[],
+                                         CPU_INT08U     err_loc_tbl_size,
+                                         ECC_ERR       *p_err);
+
+typedef  void        (*ECC_CORRECT_FNCT)(void          *p_buf,  /* Correct ECC errs.                                    */
+                                         CPU_SIZE_T     len,
+                                         void          *p_buf_ext,
+                                         CPU_SIZE_T     len_ext,
+                                         CPU_INT08U    *p_ecc,
+                                         ECC_ERR       *p_err);
+
+typedef  struct  ecc_calc {
+    CPU_SIZE_T        BufLenMin;
+    CPU_SIZE_T        BufLenMax;
+    CPU_INT08U        ECC_Len;
+    CPU_INT08U        NbrCorrectableBits;
+    ECC_CALC_FNCT     Calc;
+    ECC_CHK_FNCT      Chk;
+    ECC_CORRECT_FNCT  Correct;
+} ECC_CALC;
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of ECC module include.                           */
diff --git a/src/ucos_v1_42/micrium_source/uC-CRC/Source/ecc_hamming.c b/src/ucos_v1_42/micrium_source/uC-CRC/Source/ecc_hamming.c
new file mode 100644
index 0000000..ad0e98a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CRC/Source/ecc_hamming.c
@@ -0,0 +1,1154 @@
+/*
+*********************************************************************************************************
+*                                                uC/CRC
+*           ERROR DETECTING CODE (EDC) & ERROR CORRECTING CODE (ECC) CALCULATION UTILITIES
+*
+*                         (c) Copyright 2007-2012; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/CRC is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      HAMMING CODE CALCULATION
+*
+* Filename      : ecc_hamming.c
+* Version       : V1.09.01
+* Programmer(s) : FBJ
+*                 BAN
+*********************************************************************************************************
+* Note(s)       : (1) Hamming module is endianness-agnostic. When calling API functions, it is possible
+*                     to pass ECCs or buffer data with any endianness, as long as it is consistent.
+*
+*                 (2) (a) This module uses the type CPU_DATA for variables that need to be at least
+*                         16-bit. To avoid overflow of those variables, this module should not be used
+*                         with 8-bit CPUs.
+*
+*                     (b) If using a 16-bit CPU, buffer data length should be limited to  65536 octets
+*                         (see HAMMING_LEN_OCTET_BUF_MAX) and ECC length should be limited to 4 octets
+*                         (see HAMMING_LEN_OCTET_ECC) to avoid overflow.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    ECC_HAMMING_MODULE
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  HAMMING_NBR_CORRECTABLE_BITS                      1u
+
+#define  HAMMING_LEN_OCTET_ECC                             4u
+#define  HAMMING_LEN_OCTET_BUF_MAX                      8192u   /* Max buf len must limit the size of ECC to 4 octets.  */
+#define  HAMMING_LEN_OCTET_BUF_MIN                         1u
+#define  HAMMING_LEN_OCTET_PER_LOOP_ITER                  32u
+
+#define  HAMMING_DIFF_CNT_EXPECTED                ((DEF_OCTET_NBR_BITS * HAMMING_LEN_OCTET_ECC) / 2u)
+
+#define  HAMMING_MASK_EVEN_COL_1                  0x55555555u   /* Binary: 01010101010101010101010101010101.            */
+#define  HAMMING_MASK_ODD_COL_1                   0xAAAAAAAAu   /* Binary: 10101010101010101010101010101010.            */
+#define  HAMMING_MASK_ODD_COL_2                   0xCCCCCCCCu   /* Binary: 11001100110011001100110011001100.            */
+#define  HAMMING_MASK_ODD_COL_4                   0xF0F0F0F0u   /* Binary: 11110000111100001111000011110000.            */
+
+#if     (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
+#define  HAMMING_MASK_ODD_LINE_1                  0x00FF00FFu   /* Binary: 00000000111111110000000011111111.            */
+#define  HAMMING_MASK_ODD_LINE_2                  0x0000FFFFu   /* Binary: 00000000000000001111111111111111.            */
+#else
+#define  HAMMING_MASK_ODD_LINE_1                  0xFF00FF00u   /* Binary: 11111111000000001111111100000000.            */
+#define  HAMMING_MASK_ODD_LINE_2                  0xFFFF0000u   /* Binary: 11111111111111110000000000000000.            */
+#endif
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+const  CPU_INT08U  Hamming_BitCnt[256] = {
+    0u, 1u, 1u, 2u, 1u, 2u, 2u, 3u, 1u, 2u, 2u, 3u, 2u, 3u, 3u, 4u,
+    1u, 2u, 2u, 3u, 2u, 3u, 3u, 4u, 2u, 3u, 3u, 4u, 3u, 4u, 4u, 5u,
+    1u, 2u, 2u, 3u, 2u, 3u, 3u, 4u, 2u, 3u, 3u, 4u, 3u, 4u, 4u, 5u,
+    2u, 3u, 3u, 4u, 3u, 4u, 4u, 5u, 3u, 4u, 4u, 5u, 4u, 5u, 5u, 6u,
+    1u, 2u, 2u, 3u, 2u, 3u, 3u, 4u, 2u, 3u, 3u, 4u, 3u, 4u, 4u, 5u,
+    2u, 3u, 3u, 4u, 3u, 4u, 4u, 5u, 3u, 4u, 4u, 5u, 4u, 5u, 5u, 6u,
+    2u, 3u, 3u, 4u, 3u, 4u, 4u, 5u, 3u, 4u, 4u, 5u, 4u, 5u, 5u, 6u,
+    3u, 4u, 4u, 5u, 4u, 5u, 5u, 6u, 4u, 5u, 5u, 6u, 5u, 6u, 6u, 7u,
+    1u, 2u, 2u, 3u, 2u, 3u, 3u, 4u, 2u, 3u, 3u, 4u, 3u, 4u, 4u, 5u,
+    2u, 3u, 3u, 4u, 3u, 4u, 4u, 5u, 3u, 4u, 4u, 5u, 4u, 5u, 5u, 6u,
+    2u, 3u, 3u, 4u, 3u, 4u, 4u, 5u, 3u, 4u, 4u, 5u, 4u, 5u, 5u, 6u,
+    3u, 4u, 4u, 5u, 4u, 5u, 5u, 6u, 4u, 5u, 5u, 6u, 5u, 6u, 6u, 7u,
+    2u, 3u, 3u, 4u, 3u, 4u, 4u, 5u, 3u, 4u, 4u, 5u, 4u, 5u, 5u, 6u,
+    3u, 4u, 4u, 5u, 4u, 5u, 5u, 6u, 4u, 5u, 5u, 6u, 5u, 6u, 6u, 7u,
+    3u, 4u, 4u, 5u, 4u, 5u, 5u, 6u, 4u, 5u, 5u, 6u, 5u, 6u, 6u, 7u,
+    4u, 5u, 5u, 6u, 5u, 6u, 6u, 7u, 5u, 6u, 6u, 7u, 6u, 7u, 7u, 8u
+};
+
+const  ECC_CALC  Hamming_ECC = {
+    HAMMING_LEN_OCTET_BUF_MIN,
+    HAMMING_LEN_OCTET_BUF_MAX,
+    HAMMING_LEN_OCTET_ECC,
+    HAMMING_NBR_CORRECTABLE_BITS,
+   &Hamming_Calc,
+   &Hamming_Chk,
+   &Hamming_Correct
+};
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                /* Calc err loc.                                        */
+static  void        Hamming_CalcErrLoc(CPU_INT32U    ecc_xor,
+                                       ECC_ERR_LOC  *p_err_loc);
+
+                                                                /* Calc par on 32-bit val.                              */
+static  CPU_INT32U  Hamming_ParCalc_32(CPU_INT32U    data_32);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         Hamming_Calc()
+*
+* Description : Calculate Hamming code.
+*
+* Argument(s) : p_buf       Pointer to buffer that contains the data (see Note #1).
+*
+*               len         Length of buffer, in octets (see Note #2).
+*
+*               p_buf_ext   Pointer to extension buffer that contains the additional data (see Note #1).
+*
+*               len_ext     Length of extension buffer, in octets (see Note #2b).
+*
+*               p_ecc       Pointer to 4-octet   buffer that will receive Hamming code (see Note #3a).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               ECC_ERR_NONE                    Hamming code calculated.
+*                               ECC_ERR_INVALID_LEN             Argument 'len' passed an invalid length.
+*                               ECC_ERR_NULL_PTR                Argument 'p_buf' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) The calculation on 'p_buf' is optimized for 'CPU_INT32U'-aligned buffers, though
+*                       any buffer alignment is acceptable.
+*
+*                   (b) The calculation on 'p_buf_ext' is significantly slower, but is allowed for
+*                       convenience when the Hamming code must cover data in 2 buffers. If not needed,
+*                       a NULL pointer can be passed as the 'p_buf_ext'.
+*
+*               (2) (a) The parameter 'len' must be a multiple of HAMMING_LEN_OCTET_PER_LOOP_ITER.
+*
+*                   (b) The sum of 'len' & 'len_ext' must be between HAMMING_LEN_OCTET_BUF_MIN and
+*                       HAMMING_LEN_OCTET_BUF_MAX octets.
+*
+*                   (c) To take advantage of the fast calculation performed on 'p_buf', a single buffer
+*                       with a 'len' that is not a multiple of HAMMING_LEN_OCTET_PER_LOOP_ITER should
+*                       be split in 2 buffers. The following example shows how to call Hamming_Calc()
+*                       for a single buffer with a 'len' that is not a multiple of
+*                       HAMMING_LEN_OCTET_PER_LOOP_ITER. Split the single buffer into Hamming_Calc()'s
+*                       primary & extension buffers, 'p_buf' & 'p_buf_ext' respectively:
+*
+*                               len         = 100;
+*                               len_buf     = len / HAMMING_LEN_OCTET_PER_LOOP_ITER;
+*                               len_buf_ext = len % HAMMING_LEN_OCTET_PER_LOOP_ITER;
+*                               p_buf_ext   = (CPU_INT08U *)p_buf + len_buf;
+*
+*                               Hamming_Calc(p_buf,
+*                                            p_buf_ext,
+*                                            len_buf,
+*                                            len_buf_ext,
+*                                            p_ecc,
+*                                            p_err);
+*
+*               (3) (a) The return parameter 'p_ecc' must point to a valid 4-octet buffer; this buffer
+*                       need not be 'CPU_INT32U'-aligned.
+*
+*                   (b) Data buffers larger than HAMMING_LEN_OCTET_BUF_MAX should be divided into smaller
+*                       segments, with the ECCs calculated for the individual segments concatenated to
+*                       form the ECC for the entire buffer.
+*
+*                   (c) The number of relevant bits in the error correction code (*p_ecc) depends on
+*                       the sum of 'len' & 'len_ext', according to following table. The application
+*                       need not to store irrelevant data.
+*
+*                           ---------------------------+---------------------------
+*                          |  Total length of buffers  |  Number of relevant bits  |
+*                          |       (in octets)         |       (lsb) in ECC        |
+*                           ---------------------------+---------------------------
+*                          |                  1        |             6             |
+*                          |                  2        |             8             |
+*                          |          3  -    4        |            10             |
+*                          |          5  -    8        |            12             |
+*                          |          9  -   16        |            14             |
+*                          |         17  -   32        |            16             |
+*                          |         33  -   64        |            18             |
+*                          |         65  -  128        |            20             |
+*                          |        129  -  256        |            22             |
+*                          |        257  -  512        |            24             |
+*                          |        513  - 1024        |            26             |
+*                          |       1023  - 2048        |            28             |
+*                          |       2049  - 4096        |            30             |
+*                          |       4097  - 8192        |            32             |
+*                           ---------------------------+---------------------------
+*
+*               (4) A Hamming code is an error-correcting code (ECC) that can correct single-bit errors &
+*                   detect multiple-bit errors.  This implementation detects double-bit errors.
+*
+*                   (a) In a Hamming code calculation, parities are calculated for overlapping bit
+*                       groups in a data buffer.
+*
+*                   (b) Intermediate parities are calculated for each word (the line or word parities) &
+*                       for each bit position in all words (the column or bit parities).
+*
+*                   (c) The intermediate parity values are used to calculate the final parity bits.
+*
+*                       (1) Thirteen odd parity bits are calculated from the line/octet parities :
+*
+*                           (a) L0001o is the par bit of lines   1,   3, ...       8189,      8191 (odd                 lines)
+*                           (b) L0002o is the par bit of lines 2-3, 6-7, ...  8186-8187, 8190-8191 (odd  groups of    2 lines)
+*                            .
+*                            .
+*                           (m) L4096o is the par bit of lines 4096-8191                           (odd  groups of 4096 lines)
+*
+*                       (2) Thirteen even parity bits are calculated from the line/octet parities :
+*
+*                           (a) L0001e is the par bit of lines   0,   2, ...       8188,      8190 (even                lines)
+*                           (b) L0002e is the par bit of lines 0-1, 4-5, ...  8184-8185, 8188-8189 (even groups of    2 lines)
+*                            .
+*                            .
+*                           (m) L4096e is the par bit of lines   0-4095                            (even groups of 4096 lines)
+*
+*                       (3) Three odd parity bits are calculated from the column/bit parities :
+*
+*                           (a) C1o  is the par bit of columns   1,   3,   5,   7                 (odd              columns)
+*                           (b) C2o  is the par bit of columns 2-3, 6-7                           (odd  groups of 2 columns)
+*                           (c) C4o  is the par bit of columns 4-7                                (odd  groups of 4 columns)
+*
+*                       (4) Three even parity bits are calculated from the column/bit parities :
+*
+*                           (a) C1e  is the par bit of columns   2,   4,   6,   8                 (even             columns)
+*                           (b) C2e  is the par bit of columns 0-1, 4-5                           (even groups of 2 columns)
+*                           (c) C4e  is the par bit of columns 0-3                                (even groups of 4 columns)
+*
+*                   (d) 4 8-bit values are formed from these parity bits :
+*
+*                           hamming[0]  BITS  7- 0:    L0001o  L0001e     C4o     C4e     C2o     C2e     C1o     C1e
+*                           hamming[1]  BITS 15- 8:    L0016o  L0016e  L0008o  L0008e  L0004o  L0004e  L0002o  L0002e
+*                           hamming[2]  BITS 23-16:    L0256o  L0256e  L0128o  L0128e  L0064o  L0064e  L0032o  L0032e
+*                           hamming[3]  BITS 31-24:    L4096o  L4096e  L2048o  L2048e  L1024o  L1024e  L0512o  L0512e
+*  +----------------------------------------------------------------------------------------------------------------------+
+*  |                                                                                                                      |
+*  |                                                                 LINE / OCTET      CONTRIBUTING TO THE FOLLOWING      |
+*  |                                 BIT ADDRESS                      PARITIES    |--------- LINE PARITY BITS ----------| |
+*  |                     7    6    5    4    3    2    1    0                                                             |
+*  |                 0  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001e  L002e  L004e  L008e ...  L4096e |
+*  |                 1  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001o  L002e  L004e  L008e ...  L4096e |
+*  |                 2  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001e  L002o  L004e  L008e ...  L4096e |
+*  |                 3  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001o  L002o  L004e  L008e ...  L4096e |
+*  |      B          4  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001e  L002e  L004o  L008e ...  L4096e |
+*  |      Y          5  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001o  L002e  L004o  L008e ...  L4096e |
+*  |      T          6  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001e  L002o  L004o  L008e ...  L4096e |
+*  |      E          7  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001o  L002o  L004o  L008e ...  L4096e |
+*  |                 .                                                                                                    |
+*  |      A          .                                                                                                    |
+*  |      D          .                                                                                                    |
+*  |      D       8184  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001e  L002e  L004e  L008o ...  L4096o |
+*  |      R       8185  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001o  L002e  L004e  L008o ...  L4096o |
+*  |      E       8186  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001e  L002o  L004e  L008o ...  L4096o |
+*  |      S       8187  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001o  L002o  L004e  L008o ...  L4096o |
+*  |      S       8188  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001e  L002e  L004o  L008o ...  L4096o |
+*  |              8189  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001o  L002e  L004o  L008o ...  L4096o |
+*  |              8190  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001e  L002o  L004o  L008o ...  L4096o |
+*  |              8191  ---  ---  ---  ---  ---  ---  ---  ---    ==>    0/1       L001o  L002o  L004o  L008o ...  L4096o |
+*  |                                                                                                                      |
+*  |                     |    |    |    |    |    |    |    |                                                             |
+*  |                     V    V    V    V    V    V    V    V                                                             |
+*  | COLUMN / BIT                                                                                                         |
+*  |  PARITIES          0/1  0/1  0/1  0/1  0/1  0/1  0/1  0/1                                                            |
+*  |                                                                                                                      |
+*  | CONTRIBUTING TO                                                                                                      |
+*  |  THE FOLLOWING                                                                                                       |
+*  |   -----                                                                                                              |
+*  |     |              C1o  C1e  C1o  C1e  C1o  C1e  C1o  C1e                                                            |
+*  |   COLUMN                                                                                                             |
+*  |   PARITY           C2o  C2o  C2e  C2e  C2o  C2o  C2e  C2e                                                            |
+*  |    BITS                                                                                                              |
+*  |     |              C4o  C4o  C4o  C4o  C4e  C4e  C4e  C4e                                                            |
+*  |   -----                                                                                                              |
+*  +----------------------------------------------------------------------------------------------------------------------+
+*
+*               (5) Modifications are made to the algorithm to make it faster.
+*
+*                   (a) The calculation is made on 32 bits data.
+*
+*                   (b) Loop unrolling is used.
+*
+*                   (c) Only odd parity bits are calculated in the loop to improve algorithm speed.
+*                       Even parity bits are calculated from odd parity bits and from the parity of
+*                       the whole data block, using the following binary equation :
+*
+*                           Par of whole data = Par of an even group + Par of corresponding odd group
+*
+*                       Examples of the binary equation :
+*
+*                                     par_data_whole =   C1e +   C1o
+*                                     par_data_whole =   C2e +   C2o
+*                                     par_data_whole = L512e + L512o
+*
+*               (6) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+void  Hamming_Calc (void        *p_buf,
+                    CPU_SIZE_T   len,
+                    void        *p_buf_ext,
+                    CPU_SIZE_T   len_ext,
+                    CPU_INT08U  *p_ecc,
+                    ECC_ERR     *p_err)
+{
+    CPU_INT08U  *p_line_data_08;
+    CPU_INT32U  *p_line_data_32;
+    CPU_INT32U   line_data_32;
+    CPU_INT32U   L0001o;
+    CPU_INT32U   L0002o;
+    CPU_INT32U   L0004o;
+    CPU_INT32U   L0008o;
+    CPU_INT32U   L0016o;
+    CPU_INT32U   L0032o;
+    CPU_INT32U   L0064o;
+    CPU_INT32U   L0128o;
+    CPU_INT32U   L0256o;
+    CPU_INT32U   L0512o;
+    CPU_INT32U   L1024o;
+    CPU_INT32U   L2048o;
+    CPU_INT32U   L4096o;
+    CPU_INT32U   C1o;
+    CPU_INT32U   C2o;
+    CPU_INT32U   C4o;
+    CPU_INT32U   hamming;
+    CPU_INT32U   hamming_even;
+    CPU_INT32U   hamming_odd;
+    CPU_INT32U   par_odd_shifted;
+    CPU_INT32U   par_col;
+    CPU_INT32U   par_tot;
+    CPU_INT32U   par_tot_even_mask;
+    CPU_INT32U   par_big_blk_ix;
+    CPU_INT32U   par_big_blk;
+    CPU_DATA     align_mod_32;
+    CPU_DATA     ix;
+    CPU_DATA     loop_ext_start;
+    CPU_DATA     loop_ext_end;
+    CPU_DATA     loop_ext_nbr_iter;
+    CPU_DATA     loop_ext_len_rem;
+    CPU_DATA     loop_main_nbr_iter;
+#if (ECC_HAMMING_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_DATA     loop_main_mod;
+    CPU_DATA     len_tot;
+    CPU_BOOLEAN  len_invalid;
+#endif
+
+
+#if (ECC_HAMMING_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)             /* ------------------- VALIDATE ARGS ------------------ */
+    if (p_err == (ECC_ERR *)0) {                                /* Validate rtn err ptr.                                */
+        CPU_SW_EXCEPTION(;);
+    }
+    if (p_ecc == (CPU_INT08U *)0) {                             /* Validate rtn ECC ptr (see Note #3a).                 */
+       *p_err = ECC_ERR_NULL_PTR;
+        return;
+    }
+    Mem_Clr((void *)p_ecc, HAMMING_LEN_OCTET_ECC);              /* Init ECC buf for err(s) (see Note #6).               */
+
+    if (p_buf == (void *)0) {                                   /* Validate     buf ptr.                                */
+       *p_err = ECC_ERR_NULL_PTR;
+        return;
+    }
+    if (len_ext > 0) {                                          /* Validate ext buf ptr.                                */
+        if (p_buf_ext == (void *)0) {
+           *p_err = ECC_ERR_NULL_PTR;
+            return;
+        }
+    }
+
+    len_tot       =   len + len_ext;
+    len_invalid   = ((len_tot > HAMMING_LEN_OCTET_BUF_MAX) ||
+                     (len_tot < HAMMING_LEN_OCTET_BUF_MIN)) ? DEF_INVALID : DEF_VALID;
+    loop_main_mod =   len % HAMMING_LEN_OCTET_PER_LOOP_ITER;
+
+    if (len_invalid != DEF_VALID) {                             /* Validate len.                                        */
+       *p_err = ECC_ERR_INVALID_LEN;
+        return;
+    }
+    if (loop_main_mod != 0u) {
+       *p_err = ECC_ERR_INVALID_LEN;
+        return;
+    }
+#endif
+
+
+                                                                /* ----------------- INIT VARIABLES ------------------- */
+    loop_main_nbr_iter = len / HAMMING_LEN_OCTET_PER_LOOP_ITER;
+    L0004o             = 0u;
+    L0008o             = 0u;
+    L0016o             = 0u;
+    L0032o             = 0u;
+    L0064o             = 0u;
+    L0128o             = 0u;
+    L0256o             = 0u;
+    L0512o             = 0u;
+    L1024o             = 0u;
+    L2048o             = 0u;
+    L4096o             = 0u;
+    hamming_odd        = 0u;
+    par_tot            = 0u;
+    par_big_blk        = 0u;
+
+    align_mod_32       = (CPU_ADDR)p_buf % sizeof(CPU_INT32U);
+
+    if (align_mod_32 == 0u) {                                   /* --------- ACCESS MEM ON 4-OCTET BOUNDARIES --------- */
+        p_line_data_32  = (CPU_INT32U *)p_buf;
+                                                                /* -------------------- CALC PARITY ------------------- */
+                                                                /* Calc odd par's (see Note #5c).                       */
+        for (ix = 0u; ix < loop_main_nbr_iter; ix++) {
+            par_col         = *p_line_data_32;
+
+            p_line_data_32++;
+
+            L0004o         ^= *p_line_data_32;
+            par_col        ^= *p_line_data_32;
+
+            p_line_data_32++;
+
+            L0008o         ^= *p_line_data_32;
+            par_col        ^= *p_line_data_32;
+
+            p_line_data_32++;
+
+            L0004o         ^= *p_line_data_32;
+            L0008o         ^= *p_line_data_32;
+            par_col        ^= *p_line_data_32;
+
+            p_line_data_32++;
+
+            L0016o         ^= *p_line_data_32;
+            par_col        ^= *p_line_data_32;
+
+            p_line_data_32++;
+
+            L0004o         ^= *p_line_data_32;
+            L0016o         ^= *p_line_data_32;
+            par_col        ^= *p_line_data_32;
+
+            p_line_data_32++;
+
+            L0008o         ^= *p_line_data_32;
+            L0016o         ^= *p_line_data_32;
+            par_col        ^= *p_line_data_32;
+
+            p_line_data_32++;
+
+            L0004o         ^= *p_line_data_32;
+            L0008o         ^= *p_line_data_32;
+            L0016o         ^= *p_line_data_32;
+            par_col        ^= *p_line_data_32;
+
+            p_line_data_32++;
+
+
+            par_tot        ^= par_col;
+
+            par_col         = Hamming_ParCalc_32(par_col);
+            par_big_blk_ix  = ix * par_col;
+            par_big_blk    ^= par_big_blk_ix;
+        }
+
+    } else {                                                    /* --------- ACCESS MEM ON 1-OCTET BOUNDARIES --------- */
+        p_line_data_08  = (CPU_INT08U *)p_buf;
+
+                                                                /* -------------------- CALC PARITY ------------------- */
+                                                                /* Calc odd par's (see Note #5c).                       */
+        for (ix = 0u; ix < loop_main_nbr_iter; ix++) {
+            MEM_VAL_COPY_GET_INT32U(&line_data_32, p_line_data_08);
+            par_col         = line_data_32;
+
+            p_line_data_08 += sizeof(CPU_INT32U);
+
+            MEM_VAL_COPY_GET_INT32U(&line_data_32, p_line_data_08);
+            L0004o         ^= line_data_32;
+            par_col        ^= line_data_32;
+
+            p_line_data_08 += sizeof(CPU_INT32U);
+
+            MEM_VAL_COPY_GET_INT32U(&line_data_32, p_line_data_08);
+            L0008o         ^= line_data_32;
+            par_col        ^= line_data_32;
+
+            p_line_data_08 += sizeof(CPU_INT32U);
+
+            MEM_VAL_COPY_GET_INT32U(&line_data_32, p_line_data_08);
+            L0004o         ^= line_data_32;
+            L0008o         ^= line_data_32;
+            par_col        ^= line_data_32;
+
+            p_line_data_08 += sizeof(CPU_INT32U);
+
+            MEM_VAL_COPY_GET_INT32U(&line_data_32, p_line_data_08);
+            L0016o         ^= line_data_32;
+            par_col        ^= line_data_32;
+
+            p_line_data_08 += sizeof(CPU_INT32U);
+
+            MEM_VAL_COPY_GET_INT32U(&line_data_32, p_line_data_08);
+            L0004o         ^= line_data_32;
+            L0016o         ^= line_data_32;
+            par_col        ^= line_data_32;
+
+            p_line_data_08 += sizeof(CPU_INT32U);
+
+            MEM_VAL_COPY_GET_INT32U(&line_data_32, p_line_data_08);
+            L0008o         ^= line_data_32;
+            L0016o         ^= line_data_32;
+            par_col        ^= line_data_32;
+
+            p_line_data_08 += sizeof(CPU_INT32U);
+
+            MEM_VAL_COPY_GET_INT32U(&line_data_32, p_line_data_08);
+            L0004o         ^= line_data_32;
+            L0008o         ^= line_data_32;
+            L0016o         ^= line_data_32;
+            par_col        ^= line_data_32;
+
+            p_line_data_08 += sizeof(CPU_INT32U);
+
+
+            par_tot        ^= par_col;
+
+            par_col         = Hamming_ParCalc_32(par_col);
+            par_big_blk_ix  = ix * par_col;
+            par_big_blk    ^= par_big_blk_ix;
+        }
+
+    }
+
+
+
+                                                                /* ---------- CALC PARITY OF EXTENDED BUFFER ---------- */
+    if (p_buf_ext != (void *)0) {
+
+        loop_ext_nbr_iter =  len_ext / CPU_WORD_SIZE_32;
+        loop_ext_len_rem  =  len_ext % CPU_WORD_SIZE_32;
+
+        p_line_data_08    = (CPU_INT08U *)p_buf_ext;
+
+        loop_ext_start    = (HAMMING_LEN_OCTET_PER_LOOP_ITER / CPU_WORD_SIZE_32) * loop_main_nbr_iter;
+        loop_ext_end      =  loop_ext_start + loop_ext_nbr_iter;
+
+        for (ix = loop_ext_start; ix <= loop_ext_end; ix++) {
+
+            if (ix == loop_ext_end) {
+                line_data_32 = 0;                               /* For last iteration, get rem'ing valid octets.        */
+                MEM_VAL_COPY_GET_INTU(  &line_data_32, p_line_data_08, loop_ext_len_rem);
+            } else {
+                MEM_VAL_COPY_GET_INT32U(&line_data_32, p_line_data_08);
+            }
+
+            if (ix & DEF_BIT_00) {
+                L0004o     ^= line_data_32;
+            }
+            if (ix & DEF_BIT_01) {
+                L0008o     ^= line_data_32;
+            }
+            if (ix & DEF_BIT_02) {
+                L0016o     ^= line_data_32;
+            }
+            if (ix & DEF_BIT_03) {
+                L0032o     ^= line_data_32;
+            }
+            if (ix & DEF_BIT_04) {
+                L0064o     ^= line_data_32;
+            }
+            if (ix & DEF_BIT_05) {
+                L0128o     ^= line_data_32;
+            }
+            if (ix & DEF_BIT_06) {
+                L0256o     ^= line_data_32;
+            }
+            if (ix & DEF_BIT_07) {
+                L0512o     ^= line_data_32;
+            }
+            if (ix & DEF_BIT_08) {
+                L1024o     ^= line_data_32;
+            }
+            if (ix & DEF_BIT_09) {
+                L2048o     ^= line_data_32;
+            }
+            if (ix & DEF_BIT_10) {
+                L4096o     ^= line_data_32;
+            }
+            par_tot        ^= line_data_32;
+
+            p_line_data_08 += sizeof(CPU_INT32U);
+        }
+
+    }
+
+
+                                                                /* ------------ CALC ODD LINES PARITY BITS ------------ */
+    L4096o  = Hamming_ParCalc_32(L4096o);
+    L2048o  = Hamming_ParCalc_32(L2048o);
+    L1024o  = Hamming_ParCalc_32(L1024o);
+    L0512o  = Hamming_ParCalc_32(L0512o);
+    L0256o  = Hamming_ParCalc_32(L0256o);
+    L0128o  = Hamming_ParCalc_32(L0128o);
+    L0064o  = Hamming_ParCalc_32(L0064o);
+    L0032o  = Hamming_ParCalc_32(L0032o);
+    L0016o  = Hamming_ParCalc_32(L0016o);
+    L0008o  = Hamming_ParCalc_32(L0008o);
+    L0004o  = Hamming_ParCalc_32(L0004o);
+    L0002o  = Hamming_ParCalc_32(par_tot & HAMMING_MASK_ODD_LINE_2);
+    L0001o  = Hamming_ParCalc_32(par_tot & HAMMING_MASK_ODD_LINE_1);
+
+                                                                /* Add accumulated parity during first section.         */
+    L4096o ^= DEF_BIT_IS_SET(par_big_blk, DEF_BIT_07);
+    L2048o ^= DEF_BIT_IS_SET(par_big_blk, DEF_BIT_06);
+    L1024o ^= DEF_BIT_IS_SET(par_big_blk, DEF_BIT_05);
+    L0512o ^= DEF_BIT_IS_SET(par_big_blk, DEF_BIT_04);
+    L0256o ^= DEF_BIT_IS_SET(par_big_blk, DEF_BIT_03);
+    L0128o ^= DEF_BIT_IS_SET(par_big_blk, DEF_BIT_02);
+    L0064o ^= DEF_BIT_IS_SET(par_big_blk, DEF_BIT_01);
+    L0032o ^= DEF_BIT_IS_SET(par_big_blk, DEF_BIT_00);
+
+
+                                                                /* ----------- CALC ODD COLUMNS PARITY BITS ----------- */
+    C4o     = Hamming_ParCalc_32(par_tot & HAMMING_MASK_ODD_COL_4);
+    C2o     = Hamming_ParCalc_32(par_tot & HAMMING_MASK_ODD_COL_2);
+    C1o     = Hamming_ParCalc_32(par_tot & HAMMING_MASK_ODD_COL_1);
+
+
+                                                                /* --------- SET ODD PAR BITS IN HAMMING CODE --------- */
+                                                                /* ----------- SET PAR BITS IN FIRST OCTET ------------ */
+    if (C1o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_01);
+    }
+    if (C2o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_03);
+    }
+    if (C4o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_05);
+    }
+    if (L0001o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_07);
+    }
+
+                                                                /* ----------- SET PAR BITS IN SECOND OCTET ----------- */
+    if (L0002o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_09);
+    }
+    if (L0004o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_11);
+    }
+    if (L0008o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_13);
+    }
+    if (L0016o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_15);
+    }
+
+                                                                /* ----------- SET PAR BITS IN THIRD OCTET ------------ */
+    if (L0032o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_17);
+    }
+    if (L0064o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_19);
+    }
+    if (L0128o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_21);
+    }
+    if (L0256o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_23);
+    }
+
+                                                                /* ----------- SET PAR BITS IN FOURTH OCTET ----------- */
+    if (L0512o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_25);
+    }
+    if (L1024o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_27);
+    }
+    if (L2048o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_29);
+    }
+    if (L4096o) {
+        DEF_BIT_SET(hamming_odd, DEF_BIT_31);
+    }
+
+
+                                                                /* ---------------- SET EVEN PAR BITS ----------------- */
+                                                                /* See Note #5c.                                        */
+    par_odd_shifted   = hamming_odd >> 1u;                      /* Shift odd bits to loc of corresponding even bits.    */
+    par_tot           = Hamming_ParCalc_32(par_tot);            /* Calc tot par.                                        */
+    par_tot_even_mask = HAMMING_MASK_EVEN_COL_1 * par_tot;      /* Set each even bit to tot par in mask.                */
+    hamming_even      = par_odd_shifted ^ par_tot_even_mask;    /* Invert even bits or not, depending on tot par.       */
+    hamming           = hamming_even | hamming_odd;             /* OR even and odd bits to obtain full Hamming code.    */
+
+
+                                                                /* ----------------- SET HAMMING CODE ----------------- */
+    MEM_VAL_COPY_SET_INT32U(p_ecc, &hamming);
+
+   *p_err = ECC_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Hamming_Chk()
+*
+* Description : Check previously computed Hamming code against current data.
+*
+* Argument(s) : p_buf               Pointer to buffer that contains the data (see Note #1).
+*               -----               Argument validated by Hamming_Calc().
+*
+*               len                 Length of buffer, in octets (see Note #2).
+*               ---                 Argument validated by Hamming_Calc().
+*
+*               p_buf_ext           Pointer to extension buffer that contains the additional data (see Note #1).
+*               ---------           Argument validated by Hamming_Calc().
+*
+*               len_ext             Length of extension buffer, in octets (see Note #2b).
+*               -------             Argument validated by Hamming_Calc().
+*
+*               p_ecc               Pointer to 4-octet   buffer that contains the Hamming code.
+*               -----               Argument validated by Hamming_Calc().
+*
+*               err_loc_tbl         Table that will receive the location of any errors.
+*
+*               err_loc_tbl_size    Size of 'err_loc_tbl'; the maximum number of error locations that can
+*                                   be returned.
+*
+*               p_err               Pointer to variable that will receive the return error code from this function :
+*
+*                                       ECC_ERR_NONE                Hamming code verified.
+*                                       ECC_ERR_CORRECTABLE         Correctable error detected in data.
+*                                       ECC_ERR_INVALID_LEN         Argument 'len' passed an invalid length.
+*                                       ECC_ERR_NULL_PTR            Argument 'p_buf', 'p_ecc' or
+*                                                                       'err_loc_tbl' passed a NULL pointer.
+*                                       ECC_ERR_UNCORRECTABLE       Uncorrectable error detected.
+*
+* Return(s)   : 0,          if there is no               error  in data,
+*               1,          if there is 1    correctable error  in data,
+*               2,          if there is 2+ uncorrectable errors in data,
+*               ECC_FAULT,  if an error occured.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) The calculation on 'p_buf' is optimized for 'CPU_INT32U'-aligned buffers, though
+*                       any buffer alignment is acceptable.
+*
+*                   (b) The calculation on 'p_buf_ext' is significantly slower, but is allowed for
+*                       convenience when the Hamming code must cover data in 2 buffers. If not needed,
+*                       a NULL pointer can be passed as the 'p_buf_ext'.
+*
+*               (2) (a) The parameter 'len' must be a multiple of HAMMING_LEN_OCTET_PER_LOOP_ITER.
+*
+*                   (b) The sum of 'len' & 'len_ext' must be between HAMMING_LEN_OCTET_BUF_MIN and
+*                       HAMMING_LEN_OCTET_BUF_MAX.
+*
+*                   (c) The number of least-significant bits that are relevant in the error correction code
+*                       (*p_ecc) depends on the sum of 'len' & 'len_ext', according to following table.
+*                       The application need not to store irrelevant data.
+*
+*                           ---------------------------+---------------------------
+*                          |  Total length of buffers  |  Number of relevant bits  |
+*                          |       (in octets)         |       (lsb) in ECC        |
+*                           ---------------------------+---------------------------
+*                          |                  1        |             6             |
+*                          |                  2        |             8             |
+*                          |          3  -    4        |            10             |
+*                          |          5  -    8        |            12             |
+*                          |          9  -   16        |            14             |
+*                          |         17  -   32        |            16             |
+*                          |         33  -   64        |            18             |
+*                          |         65  -  128        |            20             |
+*                          |        129  -  256        |            22             |
+*                          |        257  -  512        |            24             |
+*                          |        513  - 1024        |            26             |
+*                          |       1023  - 2048        |            28             |
+*                          |       2049  - 4096        |            30             |
+*                          |       4097  - 8192        |            32             |
+*                           ---------------------------+---------------------------
+*
+*               (3) Hamming_Chk() checks the location of the error, but does not correct it.
+*                   Hamming_Correct() should be called instead of Hamming_Chk() for the error to be
+*                   corrected.
+*
+*               (4) (a) The maximum number of errors that can be corrected is 1, so 'max_errs' should be 1.
+*
+*                   (b) An uncorrectable error is one in which two or more bits of the data have changed
+*                       & the error is detectable.
+*
+*                   (c) If more than two bits of the data have changed, the error may be misdiagnosed as
+*                       a single-bit error.
+*
+*               (5) (a) If a single-bit error occurs in the data, either the odd OR even parity bit for
+*                       each line & column parity (but NOT both) will be flipped in the check ECC. Since
+*                       the number of valid parity bits depends of the sum of 'len' and 'len_ext', the
+*                       number of flipped bits expected must be computed each time the function is called.
+*
+*                   (b) Since the number of parity bits may vary according to the sum of 'len' and 'len_ext',
+*                       the unused bits must be masked to avoid detecting false positive errors.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  Hamming_Chk (void         *p_buf,
+                         CPU_SIZE_T    len,
+                         void         *p_buf_ext,
+                         CPU_SIZE_T    len_ext,
+                         CPU_INT08U   *p_ecc,
+                         ECC_ERR_LOC   err_loc_tbl[],
+                         CPU_INT08U    err_loc_tbl_size,
+                         ECC_ERR      *p_err)
+{
+    CPU_INT08U  hamming_chk[HAMMING_LEN_OCTET_ECC];
+    CPU_INT32U  hamming_calcd;
+    CPU_INT32U  hamming_stored;
+    CPU_INT32U  hamming_xor;
+    CPU_INT32U  hamming_pair_calc;
+    CPU_INT32U  hamming_mask;
+    CPU_INT08U  diff_cnt;
+    CPU_INT08U  diff_cnt_expected;
+    CPU_INT32U  len_tot;
+    CPU_INT32U  i;
+
+
+#if (ECC_HAMMING_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)             /* ------------------- VALIDATE ARGS ------------------ */
+    if (p_err == (ECC_ERR *)0) {                                /* Validate rtn err ptr.                                */
+        CPU_SW_EXCEPTION(ECC_FAULT);
+    }
+    if (err_loc_tbl_size < HAMMING_NBR_CORRECTABLE_BITS) {              /* Validate err cnt (see Note #4a).                     */
+       *p_err = ECC_ERR_INVALID_ARG;
+        return (ECC_FAULT);
+    } else if (err_loc_tbl == (ECC_ERR_LOC *)0) {
+       *p_err = ECC_ERR_NULL_PTR;
+        return (ECC_FAULT);
+    }
+#endif
+
+
+                                                                /* ----------------- CALC HAMMING CODE ---------------- */
+    Hamming_Calc(p_buf,                                         /* Calculate Hamming code for current buffer.           */
+                 len,
+                 p_buf_ext,
+                 len_ext,
+                &hamming_chk[0u],
+                 p_err);
+    if (*p_err != ECC_ERR_NONE) {
+        return (ECC_FAULT);
+    }
+
+    MEM_VAL_COPY_GET_INT32U(&hamming_calcd,  &hamming_chk[0u]);
+    MEM_VAL_COPY_GET_INT32U(&hamming_stored, &p_ecc[0u]);
+
+    hamming_xor = hamming_stored ^ hamming_calcd;
+                                                                /* Calc expected nbr of flipped bits in             ... */
+                                                                /* ... case of a correctable err  (see Note #5a)    ... */
+                                                                /* ... and mask irrelevant bits   (see Note #5b).       */
+    len_tot           = len + len_ext;
+    diff_cnt_expected = HAMMING_DIFF_CNT_EXPECTED;
+    hamming_mask      = 0xFFFFFFFFu;
+                                                                /* Determine size of ECC and set hamming_mask and   ... */
+                                                                /* ... diff_cnt_expected accordingly (see Note #2c).    */
+    for (i = len_tot; i <= (HAMMING_LEN_OCTET_BUF_MAX / 2u); i *= 2u) {
+        hamming_mask  = hamming_mask >> 2u;
+        diff_cnt_expected--;
+    }
+
+    hamming_xor &= hamming_mask;
+    if (hamming_xor == 0u) {
+       *p_err = ECC_ERR_NONE;
+        return (0u);
+    }
+
+    diff_cnt = CRCUtil_PopCnt_32(hamming_xor);
+    if (diff_cnt == diff_cnt_expected) {                        /* If half of par bits are flipped (see Note #5a)   ... */
+                                                                /* ... make sure exactly 1 bit per pair is set.         */
+        hamming_pair_calc  = (hamming_xor >> 1u) & CRC_UTIL_POPCNT_MASK01010101_32;
+        hamming_pair_calc +=  hamming_xor & CRC_UTIL_POPCNT_MASK01010101_32;
+        hamming_pair_calc  = ~hamming_pair_calc;
+        hamming_pair_calc &=  hamming_mask;
+        hamming_pair_calc &=  CRC_UTIL_POPCNT_MASK01010101_32;
+
+        if (hamming_pair_calc == 0u) {                          /* If only 1 bit per pair is set ...                    */
+            Hamming_CalcErrLoc(hamming_xor,                     /* ... calc loc of the flipped data bit (see Note #3).  */
+                              &err_loc_tbl[0]);
+           *p_err = ECC_ERR_CORRECTABLE;
+            return (1u);
+        }
+    }
+
+   *p_err = ECC_ERR_UNCORRECTABLE;
+    return (2u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Hamming_Correct()
+*
+* Description : Check previously computed Hamming code against current data & correct any error(s), if
+*               possible.
+*
+* Argument(s) : p_buf       Pointer to buffer that contains the data (see Note #1).
+*               -----       Argument validated by Hamming_Chk().
+*
+*               len         Length of buffer, in octets (see Note #2).
+*               ---         Argument validated by Hamming_Chk().
+*
+*               p_buf_ext   Pointer to extension buffer that contains the additional data (see Note #1).
+*               ---------   Argument validated by Hamming_Chk().
+*
+*               len_ext     Length of extension buffer, in octets (see Note #2b).
+*               -------     Argument validated by Hamming_Chk().
+*
+*               p_ecc       Pointer to 4-octet   buffer that contains the Hamming code.
+*               -----       Argument validated by Hamming_Chk().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*               -----       Argument validated by Hamming_Chk().
+*
+*                               ECC_ERR_NONE                    Hamming code verified.
+*                               ECC_ERR_CORRECTABLE             Correctable error detected in data.
+*                               ECC_ERR_INVALID_LEN             Argument 'len' passed an invalid length.
+*                               ECC_ERR_NULL_PTR                Argument 'p_buf' or 'p_ecc' or passed a NULL
+*                                                                   pointer.
+*                               ECC_ERR_UNCORRECTABLE           Uncorrectable error detected.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) The calculation on 'p_buf' is optimized for 'CPU_INT32U'-aligned buffers, though
+*                       any buffer alignment is acceptable.
+*
+*                   (b) The calculation on 'p_buf_ext' is significantly slower, but is allowed for
+*                       convenience when the Hamming code must cover data in 2 buffers. If not needed,
+*                       a NULL pointer can be passed as the 'p_buf_ext'.
+*
+*               (2) (a) The parameter 'len' must be a multiple of HAMMING_LEN_OCTET_PER_LOOP_ITER.
+*
+*                   (b) The sum of 'len' & 'len_ext' must be between HAMMING_LEN_OCTET_BUF_MIN and
+*                       HAMMING_LEN_OCTET_BUF_MAX.
+*********************************************************************************************************
+*/
+
+void  Hamming_Correct (void        *p_buf,
+                       CPU_SIZE_T   len,
+                       void        *p_buf_ext,
+                       CPU_SIZE_T   len_ext,
+                       CPU_INT08U  *p_ecc,
+                       ECC_ERR     *p_err)
+{
+    CPU_INT08U    *p_buf_08;
+    ECC_ERR_LOC    err_loc;
+    CPU_ADDR       octet_loc;
+    CPU_INT08U     err_bit;
+
+
+                                                                /* ----------------- CHK HAMMING CODE ----------------- */
+    (void)Hamming_Chk(p_buf,                                    /* Calc Hamming code for cur buf.                       */
+                      len,
+                      p_buf_ext,
+                      len_ext,
+                      p_ecc,
+                     &err_loc,
+                      1u,
+                      p_err);
+
+    if (*p_err != ECC_ERR_CORRECTABLE) {
+        return;
+    }
+
+                                                                /* Correct err.                                         */
+    if (err_loc.LocOctet < len ) {
+        p_buf_08  = (CPU_INT08U *)p_buf;
+        octet_loc =  err_loc.LocOctet;
+    } else if (err_loc.LocOctet < (len + len_ext)) {
+        p_buf_08  = (CPU_INT08U *)p_buf_ext;
+        octet_loc =  err_loc.LocOctet - len;
+    } else {
+       *p_err = ECC_ERR_UNCORRECTABLE;                          /* Correction loc out of bounds.                        */
+        return;
+    }
+    err_bit              = DEF_BIT(err_loc.LocBit);             /* Flip corrupted/correctable bit.                      */
+    p_buf_08[octet_loc] ^= err_bit;
+                                                                /* Rtn err from Hamming_Chk().                          */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Hamming_CalcErrLoc()
+*
+* Description : Calculate error location.
+*
+* Argument(s) : ecc_xor         Value of the xor between stored and computed hamming code.
+*
+*               p_err_loc       Pointer to the location of the error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Hamming_Chk(),
+*               Hamming_Eval().
+*
+* Note(s)     : (1) See 'Hamming_Calc() Note #4d and corresponding table'.
+*********************************************************************************************************
+*/
+
+static  void  Hamming_CalcErrLoc (CPU_INT32U    ecc_xor,
+                                  ECC_ERR_LOC  *p_err_loc)
+{
+    CPU_INT32U  xor_val;
+    CPU_SIZE_T  loc_octet;
+    CPU_INT08U  loc_bit;
+
+
+    xor_val    = ecc_xor;
+
+    xor_val    = xor_val >> 1u;
+    loc_bit    = xor_val &  DEF_BIT_00;
+    xor_val    = xor_val >> 1u;
+    loc_bit   |= xor_val &  DEF_BIT_01;
+    xor_val    = xor_val >> 1u;
+    loc_bit   |= xor_val &  DEF_BIT_02;
+    xor_val    = xor_val >> 3u;
+
+    xor_val    = xor_val >> 1u;
+    loc_octet  = xor_val &  DEF_BIT_00;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_01;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_02;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_03;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_04;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_05;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_06;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_07;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_08;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_09;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_10;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_11;
+    xor_val    = xor_val >> 1u;
+    loc_octet |= xor_val &  DEF_BIT_12;
+
+
+    p_err_loc->LocBit   = loc_bit;
+    p_err_loc->LocOctet = loc_octet;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        Hamming_ParCalc_32()
+*
+* Description : Calculate parity for 32-bit data value.
+*
+* Argument(s) : data_32     32-bit data value.
+*
+* Return(s)   : Parity.
+*
+* Caller(s)   : Hamming_Calc().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  Hamming_ParCalc_32 (CPU_INT32U  data_32)
+{
+    CPU_INT32U  par;
+
+
+    par  =  data_32;
+    par ^= (par >> 16u);
+    par ^= (par >>  8u);
+    par ^= (par >>  4u);
+    par ^= (par >>  2u);
+    par ^= (par >>  1u);
+
+    par &=  DEF_BIT_00;
+
+    return (par);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-CRC/Source/ecc_hamming.h b/src/ucos_v1_42/micrium_source/uC-CRC/Source/ecc_hamming.h
new file mode 100644
index 0000000..4193520
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CRC/Source/ecc_hamming.h
@@ -0,0 +1,156 @@
+/*
+*********************************************************************************************************
+*                                                uC/CRC
+*           ERROR DETECTING CODE (EDC) & ERROR CORRECTING CODE (ECC) CALCULATION UTILITIES
+*
+*                         (c) Copyright 2007-2012; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/CRC is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      HAMMING CODE CALCULATION
+*
+* Filename      : ecc_hamming.h
+* Version       : V1.09.01
+* Programmer(s) : FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef   ECC_HAMMING_PRESENT
+#define   ECC_HAMMING_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   ECC_HAMMING_MODULE
+#define  ECC_HAMMING_EXT
+#else
+#define  ECC_HAMMING_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  ECC_CALC  Hamming_ECC;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        Hamming_Calc   (void          *p_buf,               /* Calc Hamming code.                                   */
+                            CPU_SIZE_T     len,
+                            void          *p_buf_ext,
+                            CPU_SIZE_T     len_ext,
+                            CPU_INT08U    *p_ecc,
+                            ECC_ERR       *p_err);
+
+CPU_INT08U  Hamming_Chk    (void          *p_buf,               /* Chk Hamming code.                                    */
+                            CPU_SIZE_T     len,
+                            void          *p_buf_ext,
+                            CPU_SIZE_T     len_ext,
+                            CPU_INT08U    *p_ecc,
+                            ECC_ERR_LOC    err_loc_tbl[],
+                            CPU_INT08U     err_loc_tbl_size,
+                            ECC_ERR       *p_err);
+
+void        Hamming_Correct(void          *p_buf,               /* Correct errors.                                      */
+                            CPU_SIZE_T     len,
+                            void          *p_buf_ext,
+                            CPU_SIZE_T     len_ext,
+                            CPU_INT08U    *p_ecc,
+                            ECC_ERR       *p_err);
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  ECC_HAMMING_CFG_ARG_CHK_EXT_EN
+#error  "ECC_HAMMING_CFG_ARG_CHK_EXT_EN         not #define'd in 'crc_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+
+#elif  ((ECC_HAMMING_CFG_ARG_CHK_EXT_EN != DEF_DISABLED) && \
+        (ECC_HAMMING_CFG_ARG_CHK_EXT_EN != DEF_ENABLED ))
+#error  "ECC_HAMMING_CFG_ARG_CHK_EXT_EN   illegally #define'd in 'crc_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of HAMMING module include.                       */
diff --git a/src/ucos_v1_42/micrium_source/uC-CRC/Source/edc_crc.c b/src/ucos_v1_42/micrium_source/uC-CRC/Source/edc_crc.c
new file mode 100644
index 0000000..546a721
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CRC/Source/edc_crc.c
@@ -0,0 +1,1382 @@
+/*
+*********************************************************************************************************
+*                                                uC/CRC
+*           ERROR DETECTING CODE (EDC) & ERROR CORRECTING CODE (ECC) CALCULATION UTILITIES
+*
+*                         (c) Copyright 2007-2012; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/FS is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                              CYCLIC REDUNDANCY CHECK (CRC) CALCULATION
+*
+* Filename      : edc_crc.c
+* Version       : V1.09.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    EDC_CRC_MODULE
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+#if (EDC_CRC_CFG_CRC16_1021_EN == DEF_ENABLED)
+const  CPU_INT16U  CRC_TblCRC16_1021[256] = {
+    0x0000u, 0x1021u, 0x2042u, 0x3063u, 0x4084u, 0x50A5u, 0x60C6u, 0x70E7u, 0x8108u, 0x9129u, 0xA14Au, 0xB16Bu, 0xC18Cu, 0xD1ADu, 0xE1CEu, 0xF1EFu,
+    0x1231u, 0x0210u, 0x3273u, 0x2252u, 0x52B5u, 0x4294u, 0x72F7u, 0x62D6u, 0x9339u, 0x8318u, 0xB37Bu, 0xA35Au, 0xD3BDu, 0xC39Cu, 0xF3FFu, 0xE3DEu,
+    0x2462u, 0x3443u, 0x0420u, 0x1401u, 0x64E6u, 0x74C7u, 0x44A4u, 0x5485u, 0xA56Au, 0xB54Bu, 0x8528u, 0x9509u, 0xE5EEu, 0xF5CFu, 0xC5ACu, 0xD58Du,
+    0x3653u, 0x2672u, 0x1611u, 0x0630u, 0x76D7u, 0x66F6u, 0x5695u, 0x46B4u, 0xB75Bu, 0xA77Au, 0x9719u, 0x8738u, 0xF7DFu, 0xE7FEu, 0xD79Du, 0xC7BCu,
+    0x48C4u, 0x58E5u, 0x6886u, 0x78A7u, 0x0840u, 0x1861u, 0x2802u, 0x3823u, 0xC9CCu, 0xD9EDu, 0xE98Eu, 0xF9AFu, 0x8948u, 0x9969u, 0xA90Au, 0xB92Bu,
+    0x5AF5u, 0x4AD4u, 0x7AB7u, 0x6A96u, 0x1A71u, 0x0A50u, 0x3A33u, 0x2A12u, 0xDBFDu, 0xCBDCu, 0xFBBFu, 0xEB9Eu, 0x9B79u, 0x8B58u, 0xBB3Bu, 0xAB1Au,
+    0x6CA6u, 0x7C87u, 0x4CE4u, 0x5CC5u, 0x2C22u, 0x3C03u, 0x0C60u, 0x1C41u, 0xEDAEu, 0xFD8Fu, 0xCDECu, 0xDDCDu, 0xAD2Au, 0xBD0Bu, 0x8D68u, 0x9D49u,
+    0x7E97u, 0x6EB6u, 0x5ED5u, 0x4EF4u, 0x3E13u, 0x2E32u, 0x1E51u, 0x0E70u, 0xFF9Fu, 0xEFBEu, 0xDFDDu, 0xCFFCu, 0xBF1Bu, 0xAF3Au, 0x9F59u, 0x8F78u,
+    0x9188u, 0x81A9u, 0xB1CAu, 0xA1EBu, 0xD10Cu, 0xC12Du, 0xF14Eu, 0xE16Fu, 0x1080u, 0x00A1u, 0x30C2u, 0x20E3u, 0x5004u, 0x4025u, 0x7046u, 0x6067u,
+    0x83B9u, 0x9398u, 0xA3FBu, 0xB3DAu, 0xC33Du, 0xD31Cu, 0xE37Fu, 0xF35Eu, 0x02B1u, 0x1290u, 0x22F3u, 0x32D2u, 0x4235u, 0x5214u, 0x6277u, 0x7256u,
+    0xB5EAu, 0xA5CBu, 0x95A8u, 0x8589u, 0xF56Eu, 0xE54Fu, 0xD52Cu, 0xC50Du, 0x34E2u, 0x24C3u, 0x14A0u, 0x0481u, 0x7466u, 0x6447u, 0x5424u, 0x4405u,
+    0xA7DBu, 0xB7FAu, 0x8799u, 0x97B8u, 0xE75Fu, 0xF77Eu, 0xC71Du, 0xD73Cu, 0x26D3u, 0x36F2u, 0x0691u, 0x16B0u, 0x6657u, 0x7676u, 0x4615u, 0x5634u,
+    0xD94Cu, 0xC96Du, 0xF90Eu, 0xE92Fu, 0x99C8u, 0x89E9u, 0xB98Au, 0xA9ABu, 0x5844u, 0x4865u, 0x7806u, 0x6827u, 0x18C0u, 0x08E1u, 0x3882u, 0x28A3u,
+    0xCB7Du, 0xDB5Cu, 0xEB3Fu, 0xFB1Eu, 0x8BF9u, 0x9BD8u, 0xABBBu, 0xBB9Au, 0x4A75u, 0x5A54u, 0x6A37u, 0x7A16u, 0x0AF1u, 0x1AD0u, 0x2AB3u, 0x3A92u,
+    0xFD2Eu, 0xED0Fu, 0xDD6Cu, 0xCD4Du, 0xBDAAu, 0xAD8Bu, 0x9DE8u, 0x8DC9u, 0x7C26u, 0x6C07u, 0x5C64u, 0x4C45u, 0x3CA2u, 0x2C83u, 0x1CE0u, 0x0CC1u,
+    0xEF1Fu, 0xFF3Eu, 0xCF5Du, 0xDF7Cu, 0xAF9Bu, 0xBFBAu, 0x8FD9u, 0x9FF8u, 0x6E17u, 0x7E36u, 0x4E55u, 0x5E74u, 0x2E93u, 0x3EB2u, 0x0ED1u, 0x1EF0u
+};
+
+const  CRC_MODEL_16  CRC_ModelCRC16_1021 = {
+    0x1021u,
+    0xFFFFu,
+    DEF_NO,
+    0x0000u,
+   &CRC_TblCRC16_1021[0]
+};
+#endif
+
+
+#if (EDC_CRC_CFG_CRC16_1021_REF_EN == DEF_ENABLED)
+const  CPU_INT16U  CRC_TblCRC16_1021_ref[256] = {
+    0x0000u, 0x1189u, 0x2312u, 0x329Bu, 0x4624u, 0x57ADu, 0x6536u, 0x74BFu, 0x8C48u, 0x9DC1u, 0xAF5Au, 0xBED3u, 0xCA6Cu, 0xDBE5u, 0xE97Eu, 0xF8F7u,
+    0x1081u, 0x0108u, 0x3393u, 0x221Au, 0x56A5u, 0x472Cu, 0x75B7u, 0x643Eu, 0x9CC9u, 0x8D40u, 0xBFDBu, 0xAE52u, 0xDAEDu, 0xCB64u, 0xF9FFu, 0xE876u,
+    0x2102u, 0x308Bu, 0x0210u, 0x1399u, 0x6726u, 0x76AFu, 0x4434u, 0x55BDu, 0xAD4Au, 0xBCC3u, 0x8E58u, 0x9FD1u, 0xEB6Eu, 0xFAE7u, 0xC87Cu, 0xD9F5u,
+    0x3183u, 0x200Au, 0x1291u, 0x0318u, 0x77A7u, 0x662Eu, 0x54B5u, 0x453Cu, 0xBDCBu, 0xAC42u, 0x9ED9u, 0x8F50u, 0xFBEFu, 0xEA66u, 0xD8FDu, 0xC974u,
+    0x4204u, 0x538Du, 0x6116u, 0x709Fu, 0x0420u, 0x15A9u, 0x2732u, 0x36BBu, 0xCE4Cu, 0xDFC5u, 0xED5Eu, 0xFCD7u, 0x8868u, 0x99E1u, 0xAB7Au, 0xBAF3u,
+    0x5285u, 0x430Cu, 0x7197u, 0x601Eu, 0x14A1u, 0x0528u, 0x37B3u, 0x263Au, 0xDECDu, 0xCF44u, 0xFDDFu, 0xEC56u, 0x98E9u, 0x8960u, 0xBBFBu, 0xAA72u,
+    0x6306u, 0x728Fu, 0x4014u, 0x519Du, 0x2522u, 0x34ABu, 0x0630u, 0x17B9u, 0xEF4Eu, 0xFEC7u, 0xCC5Cu, 0xDDD5u, 0xA96Au, 0xB8E3u, 0x8A78u, 0x9BF1u,
+    0x7387u, 0x620Eu, 0x5095u, 0x411Cu, 0x35A3u, 0x242Au, 0x16B1u, 0x0738u, 0xFFCFu, 0xEE46u, 0xDCDDu, 0xCD54u, 0xB9EBu, 0xA862u, 0x9AF9u, 0x8B70u,
+    0x8408u, 0x9581u, 0xA71Au, 0xB693u, 0xC22Cu, 0xD3A5u, 0xE13Eu, 0xF0B7u, 0x0840u, 0x19C9u, 0x2B52u, 0x3ADBu, 0x4E64u, 0x5FEDu, 0x6D76u, 0x7CFFu,
+    0x9489u, 0x8500u, 0xB79Bu, 0xA612u, 0xD2ADu, 0xC324u, 0xF1BFu, 0xE036u, 0x18C1u, 0x0948u, 0x3BD3u, 0x2A5Au, 0x5EE5u, 0x4F6Cu, 0x7DF7u, 0x6C7Eu,
+    0xA50Au, 0xB483u, 0x8618u, 0x9791u, 0xE32Eu, 0xF2A7u, 0xC03Cu, 0xD1B5u, 0x2942u, 0x38CBu, 0x0A50u, 0x1BD9u, 0x6F66u, 0x7EEFu, 0x4C74u, 0x5DFDu,
+    0xB58Bu, 0xA402u, 0x9699u, 0x8710u, 0xF3AFu, 0xE226u, 0xD0BDu, 0xC134u, 0x39C3u, 0x284Au, 0x1AD1u, 0x0B58u, 0x7FE7u, 0x6E6Eu, 0x5CF5u, 0x4D7Cu,
+    0xC60Cu, 0xD785u, 0xE51Eu, 0xF497u, 0x8028u, 0x91A1u, 0xA33Au, 0xB2B3u, 0x4A44u, 0x5BCDu, 0x6956u, 0x78DFu, 0x0C60u, 0x1DE9u, 0x2F72u, 0x3EFBu,
+    0xD68Du, 0xC704u, 0xF59Fu, 0xE416u, 0x90A9u, 0x8120u, 0xB3BBu, 0xA232u, 0x5AC5u, 0x4B4Cu, 0x79D7u, 0x685Eu, 0x1CE1u, 0x0D68u, 0x3FF3u, 0x2E7Au,
+    0xE70Eu, 0xF687u, 0xC41Cu, 0xD595u, 0xA12Au, 0xB0A3u, 0x8238u, 0x93B1u, 0x6B46u, 0x7ACFu, 0x4854u, 0x59DDu, 0x2D62u, 0x3CEBu, 0x0E70u, 0x1FF9u,
+    0xF78Fu, 0xE606u, 0xD49Du, 0xC514u, 0xB1ABu, 0xA022u, 0x92B9u, 0x8330u, 0x7BC7u, 0x6A4Eu, 0x58D5u, 0x495Cu, 0x3DE3u, 0x2C6Au, 0x1EF1u, 0x0F78u
+};
+
+const  CRC_MODEL_16  CRC_ModelCRC16_1021_ref = {
+     0x1021u,
+     0xFFFFu,
+     DEF_YES,
+     0x0000u,
+    &CRC_TblCRC16_1021_ref[0]
+};
+#endif
+
+
+#if (EDC_CRC_CFG_CRC16_8005_EN == DEF_ENABLED)
+const  CPU_INT16U  CRC_TblCRC16_8005[256] = {
+    0x0000u, 0x8005u, 0x800Fu, 0x000Au, 0x801Bu, 0x001Eu, 0x0014u, 0x8011u, 0x8033u, 0x0036u, 0x003Cu, 0x8039u, 0x0028u, 0x802Du, 0x8027u, 0x0022u,
+    0x8063u, 0x0066u, 0x006Cu, 0x8069u, 0x0078u, 0x807Du, 0x8077u, 0x0072u, 0x0050u, 0x8055u, 0x805Fu, 0x005Au, 0x804Bu, 0x004Eu, 0x0044u, 0x8041u,
+    0x80C3u, 0x00C6u, 0x00CCu, 0x80C9u, 0x00D8u, 0x80DDu, 0x80D7u, 0x00D2u, 0x00F0u, 0x80F5u, 0x80FFu, 0x00FAu, 0x80EBu, 0x00EEu, 0x00E4u, 0x80E1u,
+    0x00A0u, 0x80A5u, 0x80AFu, 0x00AAu, 0x80BBu, 0x00BEu, 0x00B4u, 0x80B1u, 0x8093u, 0x0096u, 0x009Cu, 0x8099u, 0x0088u, 0x808Du, 0x8087u, 0x0082u,
+    0x8183u, 0x0186u, 0x018Cu, 0x8189u, 0x0198u, 0x819Du, 0x8197u, 0x0192u, 0x01B0u, 0x81B5u, 0x81BFu, 0x01BAu, 0x81ABu, 0x01AEu, 0x01A4u, 0x81A1u,
+    0x01E0u, 0x81E5u, 0x81EFu, 0x01EAu, 0x81FBu, 0x01FEu, 0x01F4u, 0x81F1u, 0x81D3u, 0x01D6u, 0x01DCu, 0x81D9u, 0x01C8u, 0x81CDu, 0x81C7u, 0x01C2u,
+    0x0140u, 0x8145u, 0x814Fu, 0x014Au, 0x815Bu, 0x015Eu, 0x0154u, 0x8151u, 0x8173u, 0x0176u, 0x017Cu, 0x8179u, 0x0168u, 0x816Du, 0x8167u, 0x0162u,
+    0x8123u, 0x0126u, 0x012Cu, 0x8129u, 0x0138u, 0x813Du, 0x8137u, 0x0132u, 0x0110u, 0x8115u, 0x811Fu, 0x011Au, 0x810Bu, 0x010Eu, 0x0104u, 0x8101u,
+    0x8303u, 0x0306u, 0x030Cu, 0x8309u, 0x0318u, 0x831Du, 0x8317u, 0x0312u, 0x0330u, 0x8335u, 0x833Fu, 0x033Au, 0x832Bu, 0x032Eu, 0x0324u, 0x8321u,
+    0x0360u, 0x8365u, 0x836Fu, 0x036Au, 0x837Bu, 0x037Eu, 0x0374u, 0x8371u, 0x8353u, 0x0356u, 0x035Cu, 0x8359u, 0x0348u, 0x834Du, 0x8347u, 0x0342u,
+    0x03C0u, 0x83C5u, 0x83CFu, 0x03CAu, 0x83DBu, 0x03DEu, 0x03D4u, 0x83D1u, 0x83F3u, 0x03F6u, 0x03FCu, 0x83F9u, 0x03E8u, 0x83EDu, 0x83E7u, 0x03E2u,
+    0x83A3u, 0x03A6u, 0x03ACu, 0x83A9u, 0x03B8u, 0x83BDu, 0x83B7u, 0x03B2u, 0x0390u, 0x8395u, 0x839Fu, 0x039Au, 0x838Bu, 0x038Eu, 0x0384u, 0x8381u,
+    0x0280u, 0x8285u, 0x828Fu, 0x028Au, 0x829Bu, 0x029Eu, 0x0294u, 0x8291u, 0x82B3u, 0x02B6u, 0x02BCu, 0x82B9u, 0x02A8u, 0x82ADu, 0x82A7u, 0x02A2u,
+    0x82E3u, 0x02E6u, 0x02ECu, 0x82E9u, 0x02F8u, 0x82FDu, 0x82F7u, 0x02F2u, 0x02D0u, 0x82D5u, 0x82DFu, 0x02DAu, 0x82CBu, 0x02CEu, 0x02C4u, 0x82C1u,
+    0x8243u, 0x0246u, 0x024Cu, 0x8249u, 0x0258u, 0x825Du, 0x8257u, 0x0252u, 0x0270u, 0x8275u, 0x827Fu, 0x027Au, 0x826Bu, 0x026Eu, 0x0264u, 0x8261u,
+    0x0220u, 0x8225u, 0x822Fu, 0x022Au, 0x823Bu, 0x023Eu, 0x0234u, 0x8231u, 0x8213u, 0x0216u, 0x021Cu, 0x8219u, 0x0208u, 0x820Du, 0x8207u, 0x0202u
+};
+
+const  CRC_MODEL_16  CRC_ModelCRC16_8005 = {
+     0x8005u,
+     0x0000u,
+     DEF_NO,
+     0x0000u,
+    &CRC_TblCRC16_8005[0]
+};
+#endif
+
+
+#if (EDC_CRC_CFG_CRC16_8005_REF_EN == DEF_ENABLED)
+const  CPU_INT16U  CRC_TblCRC16_8005_ref[256] = {
+    0x0000u, 0xC0C1u, 0xC181u, 0x0140u, 0xC301u, 0x03C0u, 0x0280u, 0xC241u, 0xC601u, 0x06C0u, 0x0780u, 0xC741u, 0x0500u, 0xC5C1u, 0xC481u, 0x0440u,
+    0xCC01u, 0x0CC0u, 0x0D80u, 0xCD41u, 0x0F00u, 0xCFC1u, 0xCE81u, 0x0E40u, 0x0A00u, 0xCAC1u, 0xCB81u, 0x0B40u, 0xC901u, 0x09C0u, 0x0880u, 0xC841u,
+    0xD801u, 0x18C0u, 0x1980u, 0xD941u, 0x1B00u, 0xDBC1u, 0xDA81u, 0x1A40u, 0x1E00u, 0xDEC1u, 0xDF81u, 0x1F40u, 0xDD01u, 0x1DC0u, 0x1C80u, 0xDC41u,
+    0x1400u, 0xD4C1u, 0xD581u, 0x1540u, 0xD701u, 0x17C0u, 0x1680u, 0xD641u, 0xD201u, 0x12C0u, 0x1380u, 0xD341u, 0x1100u, 0xD1C1u, 0xD081u, 0x1040u,
+    0xF001u, 0x30C0u, 0x3180u, 0xF141u, 0x3300u, 0xF3C1u, 0xF281u, 0x3240u, 0x3600u, 0xF6C1u, 0xF781u, 0x3740u, 0xF501u, 0x35C0u, 0x3480u, 0xF441u,
+    0x3C00u, 0xFCC1u, 0xFD81u, 0x3D40u, 0xFF01u, 0x3FC0u, 0x3E80u, 0xFE41u, 0xFA01u, 0x3AC0u, 0x3B80u, 0xFB41u, 0x3900u, 0xF9C1u, 0xF881u, 0x3840u,
+    0x2800u, 0xE8C1u, 0xE981u, 0x2940u, 0xEB01u, 0x2BC0u, 0x2A80u, 0xEA41u, 0xEE01u, 0x2EC0u, 0x2F80u, 0xEF41u, 0x2D00u, 0xEDC1u, 0xEC81u, 0x2C40u,
+    0xE401u, 0x24C0u, 0x2580u, 0xE541u, 0x2700u, 0xE7C1u, 0xE681u, 0x2640u, 0x2200u, 0xE2C1u, 0xE381u, 0x2340u, 0xE101u, 0x21C0u, 0x2080u, 0xE041u,
+    0xA001u, 0x60C0u, 0x6180u, 0xA141u, 0x6300u, 0xA3C1u, 0xA281u, 0x6240u, 0x6600u, 0xA6C1u, 0xA781u, 0x6740u, 0xA501u, 0x65C0u, 0x6480u, 0xA441u,
+    0x6C00u, 0xACC1u, 0xAD81u, 0x6D40u, 0xAF01u, 0x6FC0u, 0x6E80u, 0xAE41u, 0xAA01u, 0x6AC0u, 0x6B80u, 0xAB41u, 0x6900u, 0xA9C1u, 0xA881u, 0x6840u,
+    0x7800u, 0xB8C1u, 0xB981u, 0x7940u, 0xBB01u, 0x7BC0u, 0x7A80u, 0xBA41u, 0xBE01u, 0x7EC0u, 0x7F80u, 0xBF41u, 0x7D00u, 0xBDC1u, 0xBC81u, 0x7C40u,
+    0xB401u, 0x74C0u, 0x7580u, 0xB541u, 0x7700u, 0xB7C1u, 0xB681u, 0x7640u, 0x7200u, 0xB2C1u, 0xB381u, 0x7340u, 0xB101u, 0x71C0u, 0x7080u, 0xB041u,
+    0x5000u, 0x90C1u, 0x9181u, 0x5140u, 0x9301u, 0x53C0u, 0x5280u, 0x9241u, 0x9601u, 0x56C0u, 0x5780u, 0x9741u, 0x5500u, 0x95C1u, 0x9481u, 0x5440u,
+    0x9C01u, 0x5CC0u, 0x5D80u, 0x9D41u, 0x5F00u, 0x9FC1u, 0x9E81u, 0x5E40u, 0x5A00u, 0x9AC1u, 0x9B81u, 0x5B40u, 0x9901u, 0x59C0u, 0x5880u, 0x9841u,
+    0x8801u, 0x48C0u, 0x4980u, 0x8941u, 0x4B00u, 0x8BC1u, 0x8A81u, 0x4A40u, 0x4E00u, 0x8EC1u, 0x8F81u, 0x4F40u, 0x8D01u, 0x4DC0u, 0x4C80u, 0x8C41u,
+    0x4400u, 0x84C1u, 0x8581u, 0x4540u, 0x8701u, 0x47C0u, 0x4680u, 0x8641u, 0x8201u, 0x42C0u, 0x4380u, 0x8341u, 0x4100u, 0x81C1u, 0x8081u, 0x4040u
+};
+
+const  CRC_MODEL_16  CRC_ModelCRC16_8005_ref = {
+     0x8005u,
+     0x0000u,
+     DEF_YES,
+     0x0000u,
+    &CRC_TblCRC16_8005_ref[0]
+};
+#endif
+
+
+#if (EDC_CRC_CFG_CRC16_8048_EN == DEF_ENABLED)
+const  CPU_INT16U  CRC_TblCRC16_8048[256] = {
+    0x0000u, 0x8048u, 0x80D8u, 0x0090u, 0x81F8u, 0x01B0u, 0x0120u, 0x8168u, 0x83B8u, 0x03F0u, 0x0360u, 0x8328u, 0x0240u, 0x8208u, 0x8298u, 0x02D0u,
+    0x8738u, 0x0770u, 0x07E0u, 0x87A8u, 0x06C0u, 0x8688u, 0x8618u, 0x0650u, 0x0480u, 0x84C8u, 0x8458u, 0x0410u, 0x8578u, 0x0530u, 0x05A0u, 0x85E8u,
+    0x8E38u, 0x0E70u, 0x0EE0u, 0x8EA8u, 0x0FC0u, 0x8F88u, 0x8F18u, 0x0F50u, 0x0D80u, 0x8DC8u, 0x8D58u, 0x0D10u, 0x8C78u, 0x0C30u, 0x0CA0u, 0x8CE8u,
+    0x0900u, 0x8948u, 0x89D8u, 0x0990u, 0x88F8u, 0x08B0u, 0x0820u, 0x8868u, 0x8AB8u, 0x0AF0u, 0x0A60u, 0x8A28u, 0x0B40u, 0x8B08u, 0x8B98u, 0x0BD0u,
+    0x9C38u, 0x1C70u, 0x1CE0u, 0x9CA8u, 0x1DC0u, 0x9D88u, 0x9D18u, 0x1D50u, 0x1F80u, 0x9FC8u, 0x9F58u, 0x1F10u, 0x9E78u, 0x1E30u, 0x1EA0u, 0x9EE8u,
+    0x1B00u, 0x9B48u, 0x9BD8u, 0x1B90u, 0x9AF8u, 0x1AB0u, 0x1A20u, 0x9A68u, 0x98B8u, 0x18F0u, 0x1860u, 0x9828u, 0x1940u, 0x9908u, 0x9998u, 0x19D0u,
+    0x1200u, 0x9248u, 0x92D8u, 0x1290u, 0x93F8u, 0x13B0u, 0x1320u, 0x9368u, 0x91B8u, 0x11F0u, 0x1160u, 0x9128u, 0x1040u, 0x9008u, 0x9098u, 0x10D0u,
+    0x9538u, 0x1570u, 0x15E0u, 0x95A8u, 0x14C0u, 0x9488u, 0x9418u, 0x1450u, 0x1680u, 0x96C8u, 0x9658u, 0x1610u, 0x9778u, 0x1730u, 0x17A0u, 0x97E8u,
+    0xB838u, 0x3870u, 0x38E0u, 0xB8A8u, 0x39C0u, 0xB988u, 0xB918u, 0x3950u, 0x3B80u, 0xBBC8u, 0xBB58u, 0x3B10u, 0xBA78u, 0x3A30u, 0x3AA0u, 0xBAE8u,
+    0x3F00u, 0xBF48u, 0xBFD8u, 0x3F90u, 0xBEF8u, 0x3EB0u, 0x3E20u, 0xBE68u, 0xBCB8u, 0x3CF0u, 0x3C60u, 0xBC28u, 0x3D40u, 0xBD08u, 0xBD98u, 0x3DD0u,
+    0x3600u, 0xB648u, 0xB6D8u, 0x3690u, 0xB7F8u, 0x37B0u, 0x3720u, 0xB768u, 0xB5B8u, 0x35F0u, 0x3560u, 0xB528u, 0x3440u, 0xB408u, 0xB498u, 0x34D0u,
+    0xB138u, 0x3170u, 0x31E0u, 0xB1A8u, 0x30C0u, 0xB088u, 0xB018u, 0x3050u, 0x3280u, 0xB2C8u, 0xB258u, 0x3210u, 0xB378u, 0x3330u, 0x33A0u, 0xB3E8u,
+    0x2400u, 0xA448u, 0xA4D8u, 0x2490u, 0xA5F8u, 0x25B0u, 0x2520u, 0xA568u, 0xA7B8u, 0x27F0u, 0x2760u, 0xA728u, 0x2640u, 0xA608u, 0xA698u, 0x26D0u,
+    0xA338u, 0x2370u, 0x23E0u, 0xA3A8u, 0x22C0u, 0xA288u, 0xA218u, 0x2250u, 0x2080u, 0xA0C8u, 0xA058u, 0x2010u, 0xA178u, 0x2130u, 0x21A0u, 0xA1E8u,
+    0xAA38u, 0x2A70u, 0x2AE0u, 0xAAA8u, 0x2BC0u, 0xAB88u, 0xAB18u, 0x2B50u, 0x2980u, 0xA9C8u, 0xA958u, 0x2910u, 0xA878u, 0x2830u, 0x28A0u, 0xA8E8u,
+    0x2D00u, 0xAD48u, 0xADD8u, 0x2D90u, 0xACF8u, 0x2CB0u, 0x2C20u, 0xAC68u, 0xAEB8u, 0x2EF0u, 0x2E60u, 0xAE28u, 0x2F40u, 0xAF08u, 0xAF98u, 0x2FD0u
+};
+
+const  CRC_MODEL_16  CRC_ModelCRC16_8048 = {
+    0x8048u,
+    0x0000u,
+    DEF_NO,
+    0x0000u,
+   &CRC_TblCRC16_8048[0]
+};
+#endif
+
+
+#if (EDC_CRC_CFG_CRC16_8048_REF_EN == DEF_ENABLED)
+const  CPU_INT16U  CRC_TblCRC16_8048_ref[256] = {
+    0x0000u, 0x1C1Du, 0x1C39u, 0x0024u, 0x1C71u, 0x006Cu, 0x0048u, 0x1C55u, 0x1CE1u, 0x00FCu, 0x00D8u, 0x1CC5u, 0x0090u, 0x1C8Du, 0x1CA9u, 0x00B4u,
+    0x1DC1u, 0x01DCu, 0x01F8u, 0x1DE5u, 0x01B0u, 0x1DADu, 0x1D89u, 0x0194u, 0x0120u, 0x1D3Du, 0x1D19u, 0x0104u, 0x1D51u, 0x014Cu, 0x0168u, 0x1D75u,
+    0x1F81u, 0x039Cu, 0x03B8u, 0x1FA5u, 0x03F0u, 0x1FEDu, 0x1FC9u, 0x03D4u, 0x0360u, 0x1F7Du, 0x1F59u, 0x0344u, 0x1F11u, 0x030Cu, 0x0328u, 0x1F35u,
+    0x0240u, 0x1E5Du, 0x1E79u, 0x0264u, 0x1E31u, 0x022Cu, 0x0208u, 0x1E15u, 0x1EA1u, 0x02BCu, 0x0298u, 0x1E85u, 0x02D0u, 0x1ECDu, 0x1EE9u, 0x02F4u,
+    0x1B01u, 0x071Cu, 0x0738u, 0x1B25u, 0x0770u, 0x1B6Du, 0x1B49u, 0x0754u, 0x07E0u, 0x1BFDu, 0x1BD9u, 0x07C4u, 0x1B91u, 0x078Cu, 0x07A8u, 0x1BB5u,
+    0x06C0u, 0x1ADDu, 0x1AF9u, 0x06E4u, 0x1AB1u, 0x06ACu, 0x0688u, 0x1A95u, 0x1A21u, 0x063Cu, 0x0618u, 0x1A05u, 0x0650u, 0x1A4Du, 0x1A69u, 0x0674u,
+    0x0480u, 0x189Du, 0x18B9u, 0x04A4u, 0x18F1u, 0x04ECu, 0x04C8u, 0x18D5u, 0x1861u, 0x047Cu, 0x0458u, 0x1845u, 0x0410u, 0x180Du, 0x1829u, 0x0434u,
+    0x1941u, 0x055Cu, 0x0578u, 0x1965u, 0x0530u, 0x192Du, 0x1909u, 0x0514u, 0x05A0u, 0x19BDu, 0x1999u, 0x0584u, 0x19D1u, 0x05CCu, 0x05E8u, 0x19F5u,
+    0x1201u, 0x0E1Cu, 0x0E38u, 0x1225u, 0x0E70u, 0x126Du, 0x1249u, 0x0E54u, 0x0EE0u, 0x12FDu, 0x12D9u, 0x0EC4u, 0x1291u, 0x0E8Cu, 0x0EA8u, 0x12B5u,
+    0x0FC0u, 0x13DDu, 0x13F9u, 0x0FE4u, 0x13B1u, 0x0FACu, 0x0F88u, 0x1395u, 0x1321u, 0x0F3Cu, 0x0F18u, 0x1305u, 0x0F50u, 0x134Du, 0x1369u, 0x0F74u,
+    0x0D80u, 0x119Du, 0x11B9u, 0x0DA4u, 0x11F1u, 0x0DECu, 0x0DC8u, 0x11D5u, 0x1161u, 0x0D7Cu, 0x0D58u, 0x1145u, 0x0D10u, 0x110Du, 0x1129u, 0x0D34u,
+    0x1041u, 0x0C5Cu, 0x0C78u, 0x1065u, 0x0C30u, 0x102Du, 0x1009u, 0x0C14u, 0x0CA0u, 0x10BDu, 0x1099u, 0x0C84u, 0x10D1u, 0x0CCCu, 0x0CE8u, 0x10F5u,
+    0x0900u, 0x151Du, 0x1539u, 0x0924u, 0x1571u, 0x096Cu, 0x0948u, 0x1555u, 0x15E1u, 0x09FCu, 0x09D8u, 0x15C5u, 0x0990u, 0x158Du, 0x15A9u, 0x09B4u,
+    0x14C1u, 0x08DCu, 0x08F8u, 0x14E5u, 0x08B0u, 0x14ADu, 0x1489u, 0x0894u, 0x0820u, 0x143Du, 0x1419u, 0x0804u, 0x1451u, 0x084Cu, 0x0868u, 0x1475u,
+    0x1681u, 0x0A9Cu, 0x0AB8u, 0x16A5u, 0x0AF0u, 0x16EDu, 0x16C9u, 0x0AD4u, 0x0A60u, 0x167Du, 0x1659u, 0x0A44u, 0x1611u, 0x0A0Cu, 0x0A28u, 0x1635u,
+    0x0B40u, 0x175Du, 0x1779u, 0x0B64u, 0x1731u, 0x0B2Cu, 0x0B08u, 0x1715u, 0x17A1u, 0x0BBCu, 0x0B98u, 0x1785u, 0x0BD0u, 0x17CDu, 0x17E9u, 0x0BF4u
+};
+
+const  CRC_MODEL_16  CRC_ModelCRC16_8048_ref = {
+    0x8048u,
+    0x0000u,
+    DEF_YES,
+    0x0000u,
+   &CRC_TblCRC16_8048_ref[0]
+};
+#endif
+
+
+#if (EDC_CRC_CFG_CRC32_EN == DEF_ENABLED)
+const  CPU_INT32U  CRC_TblCRC32[256] = {
+    0x00000000u, 0x04C11DB7u, 0x09823B6Eu, 0x0D4326D9u, 0x130476DCu, 0x17C56B6Bu, 0x1A864DB2u, 0x1E475005u, 0x2608EDB8u, 0x22C9F00Fu, 0x2F8AD6D6u, 0x2B4BCB61u, 0x350C9B64u, 0x31CD86D3u, 0x3C8EA00Au, 0x384FBDBDu, 
+    0x4C11DB70u, 0x48D0C6C7u, 0x4593E01Eu, 0x4152FDA9u, 0x5F15ADACu, 0x5BD4B01Bu, 0x569796C2u, 0x52568B75u, 0x6A1936C8u, 0x6ED82B7Fu, 0x639B0DA6u, 0x675A1011u, 0x791D4014u, 0x7DDC5DA3u, 0x709F7B7Au, 0x745E66CDu, 
+    0x9823B6E0u, 0x9CE2AB57u, 0x91A18D8Eu, 0x95609039u, 0x8B27C03Cu, 0x8FE6DD8Bu, 0x82A5FB52u, 0x8664E6E5u, 0xBE2B5B58u, 0xBAEA46EFu, 0xB7A96036u, 0xB3687D81u, 0xAD2F2D84u, 0xA9EE3033u, 0xA4AD16EAu, 0xA06C0B5Du, 
+    0xD4326D90u, 0xD0F37027u, 0xDDB056FEu, 0xD9714B49u, 0xC7361B4Cu, 0xC3F706FBu, 0xCEB42022u, 0xCA753D95u, 0xF23A8028u, 0xF6FB9D9Fu, 0xFBB8BB46u, 0xFF79A6F1u, 0xE13EF6F4u, 0xE5FFEB43u, 0xE8BCCD9Au, 0xEC7DD02Du, 
+    0x34867077u, 0x30476DC0u, 0x3D044B19u, 0x39C556AEu, 0x278206ABu, 0x23431B1Cu, 0x2E003DC5u, 0x2AC12072u, 0x128E9DCFu, 0x164F8078u, 0x1B0CA6A1u, 0x1FCDBB16u, 0x018AEB13u, 0x054BF6A4u, 0x0808D07Du, 0x0CC9CDCAu, 
+    0x7897AB07u, 0x7C56B6B0u, 0x71159069u, 0x75D48DDEu, 0x6B93DDDBu, 0x6F52C06Cu, 0x6211E6B5u, 0x66D0FB02u, 0x5E9F46BFu, 0x5A5E5B08u, 0x571D7DD1u, 0x53DC6066u, 0x4D9B3063u, 0x495A2DD4u, 0x44190B0Du, 0x40D816BAu, 
+    0xACA5C697u, 0xA864DB20u, 0xA527FDF9u, 0xA1E6E04Eu, 0xBFA1B04Bu, 0xBB60ADFCu, 0xB6238B25u, 0xB2E29692u, 0x8AAD2B2Fu, 0x8E6C3698u, 0x832F1041u, 0x87EE0DF6u, 0x99A95DF3u, 0x9D684044u, 0x902B669Du, 0x94EA7B2Au, 
+    0xE0B41DE7u, 0xE4750050u, 0xE9362689u, 0xEDF73B3Eu, 0xF3B06B3Bu, 0xF771768Cu, 0xFA325055u, 0xFEF34DE2u, 0xC6BCF05Fu, 0xC27DEDE8u, 0xCF3ECB31u, 0xCBFFD686u, 0xD5B88683u, 0xD1799B34u, 0xDC3ABDEDu, 0xD8FBA05Au, 
+    0x690CE0EEu, 0x6DCDFD59u, 0x608EDB80u, 0x644FC637u, 0x7A089632u, 0x7EC98B85u, 0x738AAD5Cu, 0x774BB0EBu, 0x4F040D56u, 0x4BC510E1u, 0x46863638u, 0x42472B8Fu, 0x5C007B8Au, 0x58C1663Du, 0x558240E4u, 0x51435D53u, 
+    0x251D3B9Eu, 0x21DC2629u, 0x2C9F00F0u, 0x285E1D47u, 0x36194D42u, 0x32D850F5u, 0x3F9B762Cu, 0x3B5A6B9Bu, 0x0315D626u, 0x07D4CB91u, 0x0A97ED48u, 0x0E56F0FFu, 0x1011A0FAu, 0x14D0BD4Du, 0x19939B94u, 0x1D528623u, 
+    0xF12F560Eu, 0xF5EE4BB9u, 0xF8AD6D60u, 0xFC6C70D7u, 0xE22B20D2u, 0xE6EA3D65u, 0xEBA91BBCu, 0xEF68060Bu, 0xD727BBB6u, 0xD3E6A601u, 0xDEA580D8u, 0xDA649D6Fu, 0xC423CD6Au, 0xC0E2D0DDu, 0xCDA1F604u, 0xC960EBB3u, 
+    0xBD3E8D7Eu, 0xB9FF90C9u, 0xB4BCB610u, 0xB07DABA7u, 0xAE3AFBA2u, 0xAAFBE615u, 0xA7B8C0CCu, 0xA379DD7Bu, 0x9B3660C6u, 0x9FF77D71u, 0x92B45BA8u, 0x9675461Fu, 0x8832161Au, 0x8CF30BADu, 0x81B02D74u, 0x857130C3u, 
+    0x5D8A9099u, 0x594B8D2Eu, 0x5408ABF7u, 0x50C9B640u, 0x4E8EE645u, 0x4A4FFBF2u, 0x470CDD2Bu, 0x43CDC09Cu, 0x7B827D21u, 0x7F436096u, 0x7200464Fu, 0x76C15BF8u, 0x68860BFDu, 0x6C47164Au, 0x61043093u, 0x65C52D24u, 
+    0x119B4BE9u, 0x155A565Eu, 0x18197087u, 0x1CD86D30u, 0x029F3D35u, 0x065E2082u, 0x0B1D065Bu, 0x0FDC1BECu, 0x3793A651u, 0x3352BBE6u, 0x3E119D3Fu, 0x3AD08088u, 0x2497D08Du, 0x2056CD3Au, 0x2D15EBE3u, 0x29D4F654u, 
+    0xC5A92679u, 0xC1683BCEu, 0xCC2B1D17u, 0xC8EA00A0u, 0xD6AD50A5u, 0xD26C4D12u, 0xDF2F6BCBu, 0xDBEE767Cu, 0xE3A1CBC1u, 0xE760D676u, 0xEA23F0AFu, 0xEEE2ED18u, 0xF0A5BD1Du, 0xF464A0AAu, 0xF9278673u, 0xFDE69BC4u, 
+    0x89B8FD09u, 0x8D79E0BEu, 0x803AC667u, 0x84FBDBD0u, 0x9ABC8BD5u, 0x9E7D9662u, 0x933EB0BBu, 0x97FFAD0Cu, 0xAFB010B1u, 0xAB710D06u, 0xA6322BDFu, 0xA2F33668u, 0xBCB4666Du, 0xB8757BDAu, 0xB5365D03u, 0xB1F740B4u, 
+};
+
+const  CRC_MODEL_32  CRC_ModelCRC32 = {
+    0x04C11DB7u,
+    0xFFFFFFFFu,
+    DEF_NO,
+    0xFFFFFFFFu,
+   &CRC_TblCRC32[0]
+};
+#endif
+
+
+#if (EDC_CRC_CFG_CRC32_REF_EN == DEF_ENABLED)
+const  CPU_INT32U  CRC_TblCRC32_ref[256] = {
+    0x00000000u, 0x77073096u, 0xEE0E612Cu, 0x990951BAu, 0x076DC419u, 0x706AF48Fu, 0xE963A535u, 0x9E6495A3u, 0x0EDB8832u, 0x79DCB8A4u, 0xE0D5E91Eu, 0x97D2D988u, 0x09B64C2Bu, 0x7EB17CBDu, 0xE7B82D07u, 0x90BF1D91u,
+    0x1DB71064u, 0x6AB020F2u, 0xF3B97148u, 0x84BE41DEu, 0x1ADAD47Du, 0x6DDDE4EBu, 0xF4D4B551u, 0x83D385C7u, 0x136C9856u, 0x646BA8C0u, 0xFD62F97Au, 0x8A65C9ECu, 0x14015C4Fu, 0x63066CD9u, 0xFA0F3D63u, 0x8D080DF5u,
+    0x3B6E20C8u, 0x4C69105Eu, 0xD56041E4u, 0xA2677172u, 0x3C03E4D1u, 0x4B04D447u, 0xD20D85FDu, 0xA50AB56Bu, 0x35B5A8FAu, 0x42B2986Cu, 0xDBBBC9D6u, 0xACBCF940u, 0x32D86CE3u, 0x45DF5C75u, 0xDCD60DCFu, 0xABD13D59u,
+    0x26D930ACu, 0x51DE003Au, 0xC8D75180u, 0xBFD06116u, 0x21B4F4B5u, 0x56B3C423u, 0xCFBA9599u, 0xB8BDA50Fu, 0x2802B89Eu, 0x5F058808u, 0xC60CD9B2u, 0xB10BE924u, 0x2F6F7C87u, 0x58684C11u, 0xC1611DABu, 0xB6662D3Du,
+    0x76DC4190u, 0x01DB7106u, 0x98D220BCu, 0xEFD5102Au, 0x71B18589u, 0x06B6B51Fu, 0x9FBFE4A5u, 0xE8B8D433u, 0x7807C9A2u, 0x0F00F934u, 0x9609A88Eu, 0xE10E9818u, 0x7F6A0DBBu, 0x086D3D2Du, 0x91646C97u, 0xE6635C01u,
+    0x6B6B51F4u, 0x1C6C6162u, 0x856530D8u, 0xF262004Eu, 0x6C0695EDu, 0x1B01A57Bu, 0x8208F4C1u, 0xF50FC457u, 0x65B0D9C6u, 0x12B7E950u, 0x8BBEB8EAu, 0xFCB9887Cu, 0x62DD1DDFu, 0x15DA2D49u, 0x8CD37CF3u, 0xFBD44C65u,
+    0x4DB26158u, 0x3AB551CEu, 0xA3BC0074u, 0xD4BB30E2u, 0x4ADFA541u, 0x3DD895D7u, 0xA4D1C46Du, 0xD3D6F4FBu, 0x4369E96Au, 0x346ED9FCu, 0xAD678846u, 0xDA60B8D0u, 0x44042D73u, 0x33031DE5u, 0xAA0A4C5Fu, 0xDD0D7CC9u,
+    0x5005713Cu, 0x270241AAu, 0xBE0B1010u, 0xC90C2086u, 0x5768B525u, 0x206F85B3u, 0xB966D409u, 0xCE61E49Fu, 0x5EDEF90Eu, 0x29D9C998u, 0xB0D09822u, 0xC7D7A8B4u, 0x59B33D17u, 0x2EB40D81u, 0xB7BD5C3Bu, 0xC0BA6CADu,
+    0xEDB88320u, 0x9ABFB3B6u, 0x03B6E20Cu, 0x74B1D29Au, 0xEAD54739u, 0x9DD277AFu, 0x04DB2615u, 0x73DC1683u, 0xE3630B12u, 0x94643B84u, 0x0D6D6A3Eu, 0x7A6A5AA8u, 0xE40ECF0Bu, 0x9309FF9Du, 0x0A00AE27u, 0x7D079EB1u,
+    0xF00F9344u, 0x8708A3D2u, 0x1E01F268u, 0x6906C2FEu, 0xF762575Du, 0x806567CBu, 0x196C3671u, 0x6E6B06E7u, 0xFED41B76u, 0x89D32BE0u, 0x10DA7A5Au, 0x67DD4ACCu, 0xF9B9DF6Fu, 0x8EBEEFF9u, 0x17B7BE43u, 0x60B08ED5u,
+    0xD6D6A3E8u, 0xA1D1937Eu, 0x38D8C2C4u, 0x4FDFF252u, 0xD1BB67F1u, 0xA6BC5767u, 0x3FB506DDu, 0x48B2364Bu, 0xD80D2BDAu, 0xAF0A1B4Cu, 0x36034AF6u, 0x41047A60u, 0xDF60EFC3u, 0xA867DF55u, 0x316E8EEFu, 0x4669BE79u,
+    0xCB61B38Cu, 0xBC66831Au, 0x256FD2A0u, 0x5268E236u, 0xCC0C7795u, 0xBB0B4703u, 0x220216B9u, 0x5505262Fu, 0xC5BA3BBEu, 0xB2BD0B28u, 0x2BB45A92u, 0x5CB36A04u, 0xC2D7FFA7u, 0xB5D0CF31u, 0x2CD99E8Bu, 0x5BDEAE1Du,
+    0x9B64C2B0u, 0xEC63F226u, 0x756AA39Cu, 0x026D930Au, 0x9C0906A9u, 0xEB0E363Fu, 0x72076785u, 0x05005713u, 0x95BF4A82u, 0xE2B87A14u, 0x7BB12BAEu, 0x0CB61B38u, 0x92D28E9Bu, 0xE5D5BE0Du, 0x7CDCEFB7u, 0x0BDBDF21u,
+    0x86D3D2D4u, 0xF1D4E242u, 0x68DDB3F8u, 0x1FDA836Eu, 0x81BE16CDu, 0xF6B9265Bu, 0x6FB077E1u, 0x18B74777u, 0x88085AE6u, 0xFF0F6A70u, 0x66063BCAu, 0x11010B5Cu, 0x8F659EFFu, 0xF862AE69u, 0x616BFFD3u, 0x166CCF45u,
+    0xA00AE278u, 0xD70DD2EEu, 0x4E048354u, 0x3903B3C2u, 0xA7672661u, 0xD06016F7u, 0x4969474Du, 0x3E6E77DBu, 0xAED16A4Au, 0xD9D65ADCu, 0x40DF0B66u, 0x37D83BF0u, 0xA9BCAE53u, 0xDEBB9EC5u, 0x47B2CF7Fu, 0x30B5FFE9u,
+    0xBDBDF21Cu, 0xCABAC28Au, 0x53B39330u, 0x24B4A3A6u, 0xBAD03605u, 0xCDD70693u, 0x54DE5729u, 0x23D967BFu, 0xB3667A2Eu, 0xC4614AB8u, 0x5D681B02u, 0x2A6F2B94u, 0xB40BBE37u, 0xC30C8EA1u, 0x5A05DF1Bu, 0x2D02EF8Du
+};
+
+const  CRC_MODEL_32  CRC_ModelCRC32_ref = {
+    0x04C11DB7u,
+    0xFFFFFFFFu,
+    DEF_YES,
+    0xFFFFFFFFu,
+   &CRC_TblCRC32_ref[0]
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+static  const  CPU_INT08U  CRC_ReflectTbl[256] = {
+    0x00u, 0x80u, 0x40u, 0xC0u, 0x20u, 0xA0u, 0x60u, 0xE0u, 0x10u, 0x90u, 0x50u, 0xD0u, 0x30u, 0xB0u, 0x70u, 0xF0u,
+    0x08u, 0x88u, 0x48u, 0xC8u, 0x28u, 0xA8u, 0x68u, 0xE8u, 0x18u, 0x98u, 0x58u, 0xD8u, 0x38u, 0xB8u, 0x78u, 0xF8u,
+    0x04u, 0x84u, 0x44u, 0xC4u, 0x24u, 0xA4u, 0x64u, 0xE4u, 0x14u, 0x94u, 0x54u, 0xD4u, 0x34u, 0xB4u, 0x74u, 0xF4u,
+    0x0Cu, 0x8Cu, 0x4Cu, 0xCCu, 0x2Cu, 0xACu, 0x6Cu, 0xECu, 0x1Cu, 0x9Cu, 0x5Cu, 0xDCu, 0x3Cu, 0xBCu, 0x7Cu, 0xFCu,
+    0x02u, 0x82u, 0x42u, 0xC2u, 0x22u, 0xA2u, 0x62u, 0xE2u, 0x12u, 0x92u, 0x52u, 0xD2u, 0x32u, 0xB2u, 0x72u, 0xF2u,
+    0x0Au, 0x8Au, 0x4Au, 0xCAu, 0x2Au, 0xAAu, 0x6Au, 0xEAu, 0x1Au, 0x9Au, 0x5Au, 0xDAu, 0x3Au, 0xBAu, 0x7Au, 0xFAu,
+    0x06u, 0x86u, 0x46u, 0xC6u, 0x26u, 0xA6u, 0x66u, 0xE6u, 0x16u, 0x96u, 0x56u, 0xD6u, 0x36u, 0xB6u, 0x76u, 0xF6u,
+    0x0Eu, 0x8Eu, 0x4Eu, 0xCEu, 0x2Eu, 0xAEu, 0x6Eu, 0xEEu, 0x1Eu, 0x9Eu, 0x5Eu, 0xDEu, 0x3Eu, 0xBEu, 0x7Eu, 0xFEu,
+    0x01u, 0x81u, 0x41u, 0xC1u, 0x21u, 0xA1u, 0x61u, 0xE1u, 0x11u, 0x91u, 0x51u, 0xD1u, 0x31u, 0xB1u, 0x71u, 0xF1u,
+    0x09u, 0x89u, 0x49u, 0xC9u, 0x29u, 0xA9u, 0x69u, 0xE9u, 0x19u, 0x99u, 0x59u, 0xD9u, 0x39u, 0xB9u, 0x79u, 0xF9u,
+    0x05u, 0x85u, 0x45u, 0xC5u, 0x25u, 0xA5u, 0x65u, 0xE5u, 0x15u, 0x95u, 0x55u, 0xD5u, 0x35u, 0xB5u, 0x75u, 0xF5u,
+    0x0Du, 0x8Du, 0x4Du, 0xCDu, 0x2Du, 0xADu, 0x6Du, 0xEDu, 0x1Du, 0x9Du, 0x5Du, 0xDDu, 0x3Du, 0xBDu, 0x7Du, 0xFDu,
+    0x03u, 0x83u, 0x43u, 0xC3u, 0x23u, 0xA3u, 0x63u, 0xE3u, 0x13u, 0x93u, 0x53u, 0xD3u, 0x33u, 0xB3u, 0x73u, 0xF3u,
+    0x0Bu, 0x8Bu, 0x4Bu, 0xCBu, 0x2Bu, 0xABu, 0x6Bu, 0xEBu, 0x1Bu, 0x9Bu, 0x5Bu, 0xDBu, 0x3Bu, 0xBBu, 0x7Bu, 0xFBu,
+    0x07u, 0x87u, 0x47u, 0xC7u, 0x27u, 0xA7u, 0x67u, 0xE7u, 0x17u, 0x97u, 0x57u, 0xD7u, 0x37u, 0xB7u, 0x77u, 0xF7u,
+    0x0Fu, 0x8Fu, 0x4Fu, 0xCFu, 0x2Fu, 0xAFu, 0x6Fu, 0xEFu, 0x1Fu, 0x9Fu, 0x5Fu, 0xDFu, 0x3Fu, 0xBFu, 0x7Fu, 0xFFu
+};
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (EDC_CRC_CFG_OPTIMIZE_ASM_EN == DEF_DISABLED)
+static  CPU_INT16U  CRC_ChkSumCalcTbl_16Bit      (CPU_INT16U          init_val,
+                                                  const  CPU_INT16U  *p_tbl,
+                                                  CPU_INT08U         *p_data,
+                                                  CPU_SIZE_T          size);
+
+static  CPU_INT16U  CRC_ChkSumCalcTbl_16Bit_ref  (CPU_INT16U          init_val,
+                                                  const  CPU_INT16U  *p_tbl,
+                                                  CPU_INT08U         *p_data,
+                                                  CPU_SIZE_T          size);
+
+static  CPU_INT32U  CRC_ChkSumCalcTbl_32Bit      (CPU_INT32U          init_val,
+                                                  const  CPU_INT32U  *p_tbl,
+                                                  CPU_INT08U         *p_data,
+                                                  CPU_SIZE_T          size);
+
+static  CPU_INT32U  CRC_ChkSumCalcTbl_32Bit_ref  (CPU_INT32U          init_val,
+                                                  const  CPU_INT32U  *p_tbl,
+                                                  CPU_INT08U         *p_data,
+                                                  CPU_SIZE_T          size);
+#endif
+
+static  CPU_INT16U  CRC_ChkSumCalcNoTbl_16Bit    (CPU_INT16U          init_val,
+                                                  CPU_INT16U          poly,
+                                                  CPU_INT08U         *p_data,
+                                                  CPU_SIZE_T          size);
+
+static  CPU_INT16U  CRC_ChkSumCalcNoTbl_16Bit_ref(CPU_INT16U          init_val,
+                                                  CPU_INT16U          poly,
+                                                  CPU_INT08U         *p_data,
+                                                  CPU_SIZE_T          size);
+
+static  CPU_INT32U  CRC_ChkSumCalcNoTbl_32Bit    (CPU_INT32U          init_val,
+                                                  CPU_INT32U          poly,
+                                                  CPU_INT08U         *p_data,
+                                                  CPU_SIZE_T          size);
+
+static  CPU_INT32U  CRC_ChkSumCalcNoTbl_32Bit_ref(CPU_INT32U          init_val,
+                                                  CPU_INT32U          poly,
+                                                  CPU_INT08U         *p_data,
+                                                  CPU_SIZE_T          size);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CRC_Open_16Bit()
+*
+* Description : Open (begin) a CRC calculation for a data stream.
+*
+* Argument(s) : p_model     Pointer to model to use in calculation.
+*
+*               p_calc      Pointer to calculation.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               EDC_CRC_ERR_NONE        CRC calculated successfully.
+*                               EDC_CRC_ERR_NULL_PTR    Argument 'p_model'/'p_calc' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) For a data stream CRC calculation, the CRC model MUST include a table of pre-computed
+*                   CRC values.  See 'CRC_ChkSumCalc_16Bit()  Notes #1u, #2'.
+*
+*               (2) A data stream CRC calculation proceeds as follows :
+*
+*                   (a) 'CRC_Open_16Bit()'    called to initialize 'CRC_CALC_16' structure.
+*
+*                   (b) 'CRC_WrBlock_16Bit()' called for each block of bytes to factor into CRC.
+*                       AND / OR
+*                       'CRC_WrOctet_16Bit()' called for each octet          to factor into CRC.
+*
+*                   (c) 'CRC_Close_16Bit()'   called to get final CRC value.
+*********************************************************************************************************
+*/
+
+void  CRC_Open_16Bit (CRC_MODEL_16  *p_model,
+                      CRC_CALC_16   *p_calc,
+                      EDC_ERR       *p_err)
+{
+    CRC_MODEL_16  *p_model_calc;
+
+
+#if (ECC_CRC_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------- VALIDATE ARGS ------------------ */
+    if (p_model == (CRC_MODEL_16 *)0) {                         /* Validate model ptr.                                  */
+       *p_err = EDC_CRC_ERR_NULL_PTR;
+        return;
+    }
+    if (p_calc == (CRC_CALC_16 *)0) {                           /* Validate calc ptr.                                   */
+       *p_err = EDC_CRC_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+
+
+                                                                /* ------------------- VALIDATE MODEL ----------------- */
+    if (p_model->TblPtr == (const CPU_INT16U *)0) {             /* See Notes #1.                                        */
+       *p_err = EDC_CRC_ERR_INVALID_MODEL;
+        return;
+    }
+
+
+
+                                                                /* ------------------ INIT CALC INFO ------------------ */
+    p_model_calc          = &p_calc->Model;
+    p_model_calc->Poly    =  p_model->Poly;
+    p_model_calc->InitVal =  p_model->InitVal;
+    p_model_calc->Reflect =  p_model->Reflect;
+    p_model_calc->XorOut  =  p_model->XorOut;
+    p_model_calc->TblPtr  =  p_model->TblPtr;
+
+    if (p_model->Reflect == DEF_YES) {
+        p_calc->CRC_Curr = CRC_Reflect_16Bit(p_model->InitVal);
+    } else {
+        p_calc->CRC_Curr = p_model->InitVal;
+    }
+
+   *p_err = EDC_CRC_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         CRC_WrBlock_16Bit()
+*
+* Description : Process buffer for data stream CRC calculation.
+*
+* Argument(s) : p_calc      Pointer to calculation.
+*
+*               p_data      Pointer to data buffer.
+*
+*               size        Size of buffer, in octets.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) See 'CRC_Open_16Bit()  Note #1'.
+*********************************************************************************************************
+*/
+
+void  CRC_WrBlock_16Bit (CRC_CALC_16  *p_calc,
+                         void         *p_data,
+                         CPU_SIZE_T    size)
+{
+    CPU_INT08U   *p_data_08;
+    CPU_INT16U    crc;
+    CPU_BOOLEAN   reflect;
+
+
+    reflect   = (p_calc->Model).Reflect;
+    p_data_08 = (CPU_INT08U *)p_data;
+
+    if (reflect == DEF_YES) {
+        crc = CRC_ChkSumCalcTbl_16Bit_ref( p_calc->CRC_Curr,
+                                          (p_calc->Model).TblPtr,
+                                           p_data_08,
+                                           size);
+    } else {
+        crc = CRC_ChkSumCalcTbl_16Bit( p_calc->CRC_Curr,
+                                      (p_calc->Model).TblPtr,
+                                       p_data_08,
+                                       size);
+    }
+
+    p_calc->CRC_Curr = crc;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         CRC_WrOctet_16Bit()
+*
+* Description : Process octet for data stream CRC calculation.
+*
+* Argument(s) : p_calc      Pointer to calculation.
+*
+*               octet       Octet for CRC calculation.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) See 'CRC_Open_16Bit()  Note #1'.
+*********************************************************************************************************
+*/
+
+void  CRC_WrOctet_16Bit (CRC_CALC_16  *p_calc,
+                         CPU_INT08U    octet)
+{
+           CPU_INT16U    crc;
+           CPU_INT08U    ix;
+           CPU_BOOLEAN   reflect;
+    const  CPU_INT16U   *p_tbl;
+
+
+    crc     =  p_calc->CRC_Curr;
+    reflect = (p_calc->Model).Reflect;
+    p_tbl   = (p_calc->Model).TblPtr;
+
+    if (reflect == DEF_YES) {
+        ix  = (CPU_INT08U)(crc ^ octet) & 0xFFu;
+        crc =  p_tbl[ix] ^ (CPU_INT16U)(crc >> 8);
+    } else {
+        ix  = (CPU_INT08U)((CPU_INT08U)(crc >> 8) ^ octet) & 0xFFu;
+        crc =  p_tbl[ix] ^ (CPU_INT16U)(crc << 8);
+    }
+
+    p_calc->CRC_Curr = crc;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          CRC_Close_16Bit()
+*
+* Description : Close (end) CRC calculation.
+*
+* Argument(s) : p_calc      Pointer to calculation.
+*
+* Return(s)   : 16-bit CRC.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) See 'CRC_Open_16Bit()  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  CRC_Close_16Bit (CRC_CALC_16  *p_calc)
+{
+    CPU_INT16U  crc;
+
+
+    crc  =  p_calc->CRC_Curr;
+    crc ^= (p_calc->Model).XorOut;
+
+    return (crc);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          CRC_Open_32Bit()
+*
+* Description : Open (begin) a CRC calculation for a data stream.
+*
+* Argument(s) : p_model     Pointer to model to use in calculation.
+*
+*               p_calc      Pointer to calculation.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               EDC_CRC_ERR_NONE        CRC calculated successfully.
+*                               EDC_CRC_ERR_NULL_PTR    Argument 'p_model'/'p_calc' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) For a data stream CRC calculation, the CRC model MUST include a table of pre-computed
+*                   CRC values.  See 'CRC_ChkSumCalc_32Bit()  Notes #1u, #2'.
+*
+*               (2) A data stream CRC calculation proceeds as follows :
+*
+*                   (a) 'CRC_Open_32Bit()'    called to initialize 'CRC_CALC_32' structure.
+*
+*                   (b) 'CRC_WrBlock_32Bit()' called for each block of bytes to factor into CRC.
+*                       AND / OR
+*                       'CRC_WrOctet_32Bit()' called for each octet          to factor into CRC.
+*
+*                   (c) 'CRC_Close_32Bit()'   called to get final CRC value.
+*********************************************************************************************************
+*/
+
+void  CRC_Open_32Bit (CRC_MODEL_32  *p_model,
+                      CRC_CALC_32   *p_calc,
+                      EDC_ERR       *p_err)
+{
+    CRC_MODEL_32  *p_model_calc;
+
+
+#if (ECC_CRC_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------- VALIDATE ARGS ------------------ */
+    if (p_model == (CRC_MODEL_32 *)0) {                         /* Validate model ptr.                                  */
+       *p_err = EDC_CRC_ERR_NULL_PTR;
+        return;
+    }
+    if (p_calc == (CRC_CALC_32 *)0) {                           /* Validate calc ptr.                                   */
+       *p_err = EDC_CRC_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+
+
+                                                                /* ------------------- VALIDATE MODEL ----------------- */
+    if (p_model->TblPtr == (const CPU_INT32U *)0) {             /* See Notes #1.                                        */
+       *p_err = EDC_CRC_ERR_INVALID_MODEL;
+        return;
+    }
+
+
+
+                                                                /* ------------------ INIT CALC INFO ------------------ */
+    p_model_calc          = &p_calc->Model;
+    p_model_calc->Poly    =  p_model->Poly;
+    p_model_calc->InitVal =  p_model->InitVal;
+    p_model_calc->Reflect =  p_model->Reflect;
+    p_model_calc->XorOut  =  p_model->XorOut;
+    p_model_calc->TblPtr  =  p_model->TblPtr;
+
+    if (p_model->Reflect == DEF_YES) {
+        p_calc->CRC_Curr = CRC_Reflect_32Bit(p_model->InitVal);
+    } else {
+        p_calc->CRC_Curr = p_model->InitVal;
+    }
+
+   *p_err = EDC_CRC_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         CRC_WrBlock_32Bit()
+*
+* Description : Process buffer for data stream CRC calculation.
+*
+* Argument(s) : p_calc      Pointer to calculation.
+*
+*               p_data      Pointer to data buffer.
+*
+*               size        Size of buffer, in octets.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) See 'CRC_Open_32Bit()  Note #1'.
+*********************************************************************************************************
+*/
+
+void  CRC_WrBlock_32Bit (CRC_CALC_32  *p_calc,
+                         void         *p_data,
+                         CPU_SIZE_T    size)
+{
+    CPU_INT08U   *p_data_08;
+    CPU_INT32U    crc;
+    CPU_BOOLEAN   reflect;
+
+
+    reflect   = (p_calc->Model).Reflect;
+    p_data_08 = (CPU_INT08U *)p_data;
+
+    if (reflect == DEF_YES) {
+        crc = CRC_ChkSumCalcTbl_32Bit_ref( p_calc->CRC_Curr,
+                                          (p_calc->Model).TblPtr,
+                                           p_data_08,
+                                           size);
+    } else {
+        crc = CRC_ChkSumCalcTbl_32Bit( p_calc->CRC_Curr,
+                                      (p_calc->Model).TblPtr,
+                                       p_data_08,
+                                       size);
+    }
+
+    p_calc->CRC_Curr = crc;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         CRC_WrOctet_32Bit()
+*
+* Description : Process octet for data stream CRC calculation.
+*
+* Argument(s) : p_calc      Pointer to calculation.
+*
+*               octet       Octet for CRC calculation.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) See 'CRC_Open_32Bit()  Note #1'.
+*********************************************************************************************************
+*/
+
+void  CRC_WrOctet_32Bit (CRC_CALC_32  *p_calc,
+                         CPU_INT08U    octet)
+{
+           CPU_INT32U    crc;
+           CPU_INT08U    ix;
+           CPU_BOOLEAN   reflect;
+    const  CPU_INT32U   *p_tbl;
+
+
+    crc     =  p_calc->CRC_Curr;
+    reflect = (p_calc->Model).Reflect;
+    p_tbl   = (p_calc->Model).TblPtr;
+
+    if (reflect == DEF_YES) {
+        ix  = (CPU_INT08U)(crc ^ octet) & 0xFFu;
+        crc =  p_tbl[ix] ^ (CPU_INT32U)(crc >> 8);
+    } else {
+        ix  = (CPU_INT08U)(((crc >> 24) ^ octet) & 0x000000FFu);
+        crc =  p_tbl[ix] ^ (CPU_INT32U)(crc << 8);
+    }
+
+    p_calc->CRC_Curr = crc;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          CRC_Close_32Bit()
+*
+* Description : Close (end) CRC calculation.
+*
+* Argument(s) : p_calc      Pointer to calculation.
+*
+* Return(s)   : 32-bit CRC.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) See 'CRC_Open_32Bit()  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  CRC_Close_32Bit (CRC_CALC_32  *p_calc)
+{
+    CPU_INT32U  crc;
+
+
+    crc  =  p_calc->CRC_Curr;
+    crc ^= (p_calc->Model).XorOut;
+
+    return (crc);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       CRC_ChkSumCalc_16Bit()
+*
+* Description : Calculate a 16-bit CRC.
+*
+* Argument(s) : p_model     Pointer to model to use in calculation.
+*
+*               p_data      Pointer to data buffer.
+*
+*               size        Size of buffer, in octets.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               EDC_CRC_ERR_NONE        CRC calculated successfully.
+*                               EDC_CRC_ERR_NULL_PTR    Argument 'p_model'/'p_data' passed a NULL pointer.
+*
+* Return(s)   : 16-bit CRC.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) If 'p_model->TblPtr' is a NULL pointer, then this function will use a slower method
+*                   for calculating the CRC that does NOT use a pre-computed table.  Otherwise, the table
+*                   located at 'p_model->TblPtr' will be used in the computation.
+*
+*               (2) If you have not pre-computed a table (using 'CRC_TblMake_16Bit()') or are not using
+*                   one of the provided tables, then be certain that 'p_model->TblPtr' is a NULL pointer.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  CRC_ChkSumCalc_16Bit (CRC_MODEL_16  *p_model,
+                                  void          *p_data,
+                                  CPU_SIZE_T     size,
+                                  EDC_ERR       *p_err)
+{
+    CPU_INT08U  *p_data_08;
+    CPU_INT16U   crc;
+    CPU_INT16U   init_val;
+
+
+#if (ECC_CRC_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------- VALIDATE ARGS ------------------ */
+    if (p_model == (CRC_MODEL_16 *)0) {                         /* Validate model ptr.                                  */
+       *p_err = EDC_CRC_ERR_NULL_PTR;
+        return (0u);
+    }
+    if (p_data == (void *)0) {                                  /* Validate buf ptr.                                    */
+       *p_err = EDC_CRC_ERR_NULL_PTR;
+        return (0u);
+    }
+#endif
+
+
+
+                                                                /* ----------------------- INIT CALC ------------------ */
+    p_data_08 = (CPU_INT08U *)p_data;
+
+    if (p_model->Reflect == DEF_YES) {
+        init_val = CRC_Reflect_16Bit(p_model->InitVal);
+    } else {
+        init_val = p_model->InitVal;
+    }
+
+
+
+                                                                /* ------------------------ DO CALC ------------------- */
+    if (p_model->TblPtr == (const CPU_INT16U *)0) {             /* See Note #1.                                         */
+        if (p_model->Reflect == DEF_YES) {
+            crc = CRC_ChkSumCalcNoTbl_16Bit_ref(init_val,
+                                                p_model->Poly,
+                                                p_data_08,
+                                                size);
+        } else {
+            crc = CRC_ChkSumCalcNoTbl_16Bit(init_val,
+                                            p_model->Poly,
+                                            p_data_08,
+                                            size);
+        }
+    } else {
+        if (p_model->Reflect == DEF_YES) {
+            crc = CRC_ChkSumCalcTbl_16Bit_ref(init_val,
+                                              p_model->TblPtr,
+                                              p_data_08,
+                                              size);
+        } else {
+            crc = CRC_ChkSumCalcTbl_16Bit(init_val,
+                                          p_model->TblPtr,
+                                          p_data_08,
+                                          size);
+        }
+    }
+
+    crc  ^= p_model->XorOut;
+   *p_err = EDC_CRC_ERR_NONE;
+
+    return (crc);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       CRC_ChkSumCalc_32Bit()
+*
+* Description : Calculate a 32-bit CRC.
+*
+* Argument(s) : p_model     Pointer to model to use in calculation.
+*
+*               p_data      Pointer to data buffer.
+*
+*               size        Size of buffer, in octets.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               EDC_CRC_ERR_NONE        CRC calculated successfully.
+*                               EDC_CRC_ERR_NULL_PTR    Argument 'p_model'/'p_data' passed a NULL pointer.
+* Return(s)   : 32-bit CRC.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) If 'p_model->TblPtr' is a NULL pointer, then this function will use a slower method
+*                   for calculating the CRC that does NOT use a pre-computed table.  Otherwise, the table
+*                   located at 'pm_odel->TblPtr' will be used in the computation.
+*
+*               (2) If you have not pre-computed a table (using 'CRC_TblMake_32Bit()') or are not using
+*                   one of the provided tables, then be certain that 'p_model->TblPtr' is a NULL pointer.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  CRC_ChkSumCalc_32Bit (CRC_MODEL_32  *p_model,
+                                  void          *p_data,
+                                  CPU_SIZE_T     size,
+                                  EDC_ERR       *p_err)
+{
+    CPU_INT08U  *p_data_08;
+    CPU_INT32U   crc;
+    CPU_INT32U   init_val;
+
+
+#if (ECC_CRC_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------- VALIDATE ARGS ------------------ */
+    if (p_model == (CRC_MODEL_32 *)0) {                         /* Validate model ptr.                                  */
+       *p_err = EDC_CRC_ERR_NULL_PTR;
+        return (0u);
+    }
+    if (p_data == (void *)0) {                                  /* Validate buf ptr.                                    */
+       *p_err = EDC_CRC_ERR_NULL_PTR;
+        return (0u);
+    }
+#endif
+
+
+
+                                                                /* ----------------------- INIT CALC ------------------ */
+    p_data_08 = (CPU_INT08U *)p_data;
+
+    if (p_model->Reflect == DEF_YES) {
+        init_val = CRC_Reflect_32Bit(p_model->InitVal);
+    } else {
+        init_val = p_model->InitVal;
+    }
+
+
+
+                                                                /* ------------------------ DO CALC ------------------- */
+    if (p_model->TblPtr == (const CPU_INT32U *)0) {             /* See Note #1.                                         */
+        if (p_model->Reflect == DEF_YES) {
+            crc = CRC_ChkSumCalcNoTbl_32Bit_ref(init_val,
+                                                p_model->Poly,
+                                                p_data_08,
+                                                size);
+        } else {
+            crc = CRC_ChkSumCalcNoTbl_32Bit(init_val,
+                                            p_model->Poly,
+                                            p_data_08,
+                                            size);
+        }
+    } else {
+        if (p_model->Reflect == DEF_YES) {
+            crc = CRC_ChkSumCalcTbl_32Bit_ref(init_val,
+                                              p_model->TblPtr,
+                                              p_data_08,
+                                              size);
+        } else {
+            crc = CRC_ChkSumCalcTbl_32Bit(init_val,
+                                          p_model->TblPtr,
+                                          p_data_08,
+                                          size);
+        }
+    }
+
+    crc  ^= p_model->XorOut;
+   *p_err = EDC_CRC_ERR_NONE;
+
+    return (crc);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                      CRC_ChkSumCalcTbl_16Bit() / CRC_ChkSumCalcTbl_16Bit_ref()
+*
+* Description : Calculate a 16-bit CRC using a table with or without reflection.
+*
+* Argument(s) : init_val    Initial CRC value.
+*
+*               p_tbl       Pre-computed CRC table to use in calculation.
+*
+*               p_data      Pointer to data buffer.
+*
+*               size        Size of buffer, in octets.
+*
+* Return(s)   : 16-bit CRC.
+*
+* Caller(s)   : CRC_WrBlock_16Bit(), CRC_ChkSumCalc_16Bit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (EDC_CRC_CFG_OPTIMIZE_ASM_EN == DEF_DISABLED)
+static  CPU_INT16U  CRC_ChkSumCalcTbl_16Bit (CPU_INT16U          init_val,
+                                             const  CPU_INT16U  *p_tbl,
+                                             CPU_INT08U         *p_data,
+                                             CPU_SIZE_T          size)
+{
+    CPU_INT16U  crc;
+    CPU_INT08U  ix;
+
+
+    crc = init_val;
+    while (size > 0u) {
+        ix      = (CPU_INT08U)((CPU_INT08U)(crc >> 8) ^ *p_data) & 0xFFu;
+        crc     = p_tbl[ix] ^ (CPU_INT16U)(crc << 8);
+        p_data += sizeof(CPU_INT08U);
+        size   -= sizeof(CPU_INT08U);
+    }
+    return (crc);
+}
+
+static  CPU_INT16U  CRC_ChkSumCalcTbl_16Bit_ref (CPU_INT16U          init_val,
+                                                 const  CPU_INT16U  *p_tbl,
+                                                 CPU_INT08U         *p_data,
+                                                 CPU_SIZE_T          size)
+{
+    CPU_INT16U  crc;
+    CPU_INT08U  ix;
+
+
+    crc = init_val;
+    while (size > 0u) {
+        ix      = (CPU_INT08U)(crc ^ *p_data) & 0xFFu;
+        crc     = p_tbl[ix] ^ (CPU_INT08U)(crc >> 8);
+        p_data += sizeof(CPU_INT08U);
+        size   -= sizeof(CPU_INT08U);
+    }
+    return (crc);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                      CRC_ChkSumCalcTbl_32Bit() / CRC_ChkSumCalcTbl_32Bit_ref()
+*
+* Description : Calculate a 16-bit CRC using a table with or without reflection.
+*
+* Argument(s) : init_val    Initial CRC value.
+*
+*               p_tbl       Pre-computed CRC table to use in calculation.
+*
+*               p_data      Pointer to data buffer.
+*
+*               size        Size of buffer, in octets.
+*
+* Return(s)   : 32-bit CRC.
+*
+* Caller(s)   : CRC_WrBlock_32Bit(), CRC_ChkSumCalc_32Bit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (EDC_CRC_CFG_OPTIMIZE_ASM_EN == DEF_DISABLED)
+static  CPU_INT32U  CRC_ChkSumCalcTbl_32Bit (CPU_INT32U          init_val,
+                                             const  CPU_INT32U  *p_tbl,
+                                             CPU_INT08U         *p_data,
+                                             CPU_SIZE_T          size)
+{
+    CPU_INT32U   crc;
+    CPU_INT08U   ix;
+
+
+    crc = init_val;
+    while (size > 0u) {
+        ix      = (CPU_INT08U)(((crc >> 24) ^ *p_data) & 0xFFu);
+        crc     = p_tbl[ix] ^ (crc << 8);
+        p_data += sizeof(CPU_INT08U);
+        size   -= sizeof(CPU_INT08U);
+    }
+    return (crc);
+}
+
+static  CPU_INT32U  CRC_ChkSumCalcTbl_32Bit_ref (CPU_INT32U          init_val,
+                                                 const  CPU_INT32U  *p_tbl,
+                                                 CPU_INT08U         *p_data,
+                                                 CPU_SIZE_T          size)
+{
+    CPU_INT32U   crc;
+    CPU_INT08U   ix;
+
+
+    crc = init_val;
+    while (size > 0u) {
+        ix      = (CPU_INT08U)(crc ^ *p_data) & 0xFFu;
+        crc     = p_tbl[ix] ^ (crc >> 8);
+        p_data += sizeof(CPU_INT08U);
+        size   -= sizeof(CPU_INT08U);
+    }
+    return (crc);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                    CRC_ChkSumCalcNoTbl_16Bit() / CRC_ChkSumCalcNoTbl_16Bit_ref()
+*
+* Description : Calculate a 16-bit CRC without a table.
+*
+* Argument(s) : init_val    Initial CRC value.
+*
+*               poly        Polynomial to use in calculation.
+*
+*               p_data      Pointer to data buffer.
+*
+*               size        Size of buffer, in octets.
+*
+* Return(s)   : 16-bit CRC.
+*
+* Caller(s)   : CRC_ChkSumCalc_16Bit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  CRC_ChkSumCalcNoTbl_16Bit (CPU_INT16U   init_val,
+                                               CPU_INT16U   poly,
+                                               CPU_INT08U  *p_data,
+                                               CPU_SIZE_T   size)
+{
+    CPU_INT16U  crc;
+    CPU_INT08U  data;
+    CPU_INT08U  i;
+
+
+    crc = init_val;
+    while (size > 0u) {
+        data  = *p_data;
+        crc  ^= (CPU_INT16U)((CPU_INT16U)data << 8);
+        for (i = 0u; i < 8u; i++) {
+            if (DEF_BIT_IS_SET(crc, DEF_BIT_15) == DEF_YES) {
+                crc = (CPU_INT16U)(crc << 1) ^ poly;
+            } else {
+                crc <<= 1;
+            }
+        }
+        size   -= sizeof(CPU_INT08U);
+        p_data += sizeof(CPU_INT08U);
+    }
+    return (crc);
+}
+
+static  CPU_INT16U  CRC_ChkSumCalcNoTbl_16Bit_ref (CPU_INT16U   init_val,
+                                                   CPU_INT16U   poly,
+                                                   CPU_INT08U  *p_data,
+                                                   CPU_SIZE_T   size)
+{
+    CPU_INT16U  crc;
+    CPU_INT08U  data;
+    CPU_INT08U  i;
+
+
+    crc = init_val;
+    while (size > 0u) {
+        data  = CRC_Reflect_08Bit(*p_data);
+        crc  ^= (CPU_INT16U)((CPU_INT16U)data << 8);
+        for (i = 0u; i < 8u; i++) {
+            if (DEF_BIT_IS_SET(crc, DEF_BIT_15) == DEF_YES) {
+                crc = (CPU_INT16U)(crc << 1) ^ poly;
+            } else {
+                crc <<= 1;
+            }
+        }
+        size   -= sizeof(CPU_INT08U);
+        p_data += sizeof(CPU_INT08U);
+    }
+    crc = CRC_Reflect_16Bit(crc);
+    return (crc);
+}
+
+
+/*
+*********************************************************************************************************
+*                    CRC_ChkSumCalcNoTbl_32Bit() / CRC_ChkSumCalcNoTbl_32Bit_ref()
+*
+* Description : Calculate a 32-bit CRC without a table.
+*
+* Argument(s) : init_val    Initial CRC value.
+*
+*               poly        Polynomial to use in calculation.
+*
+*               p_data      Pointer to data buffer.
+*
+*               size        Size of buffer, in octets.
+*
+* Return(s)   : 32-bit CRC.
+*
+* Caller(s)   : CRC_ChkSumCalc_32Bit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  CRC_ChkSumCalcNoTbl_32Bit (CPU_INT32U   init_val,
+                                               CPU_INT32U   poly,
+                                               CPU_INT08U  *p_data,
+                                               CPU_SIZE_T   size)
+{
+    CPU_INT32U  crc;
+    CPU_INT08U  data;
+    CPU_INT08U  i;
+
+
+    crc = init_val;
+    while (size > 0u) {
+        data  = *p_data;
+        crc  ^= ((CPU_INT32U)data << 24);
+        for (i = 0u; i < 8u; i++) {
+            if (DEF_BIT_IS_SET(crc, DEF_BIT_31) == DEF_YES) {
+                crc = (crc << 1) ^ poly;
+            } else {
+                crc <<= 1;
+            }
+        }
+        size   -= sizeof(CPU_INT08U);
+        p_data += sizeof(CPU_INT08U);
+    }
+    return (crc);
+}
+
+static  CPU_INT32U  CRC_ChkSumCalcNoTbl_32Bit_ref (CPU_INT32U   init_val,
+                                                   CPU_INT32U   poly,
+                                                   CPU_INT08U  *p_data,
+                                                   CPU_SIZE_T   size)
+{
+    CPU_INT32U  crc;
+    CPU_INT08U  data;
+    CPU_INT08U  i;
+
+
+    crc = init_val;
+    while (size > 0u) {
+        data  = CRC_Reflect_08Bit(*p_data);
+        crc  ^= ((CPU_INT32U)data << 24);
+        for (i = 0u; i < 8u; i++) {
+            if (DEF_BIT_IS_SET(crc, DEF_BIT_31) == DEF_YES) {
+                crc = (crc << 1) ^ poly;
+            } else {
+                crc <<= 1;
+            }
+        }
+        size   -= sizeof(CPU_INT08U);
+        p_data += sizeof(CPU_INT08U);
+    }
+    crc = CRC_Reflect_32Bit(crc);
+    return (crc);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         CRC_Reflect_08Bit()
+*
+* Description : Reflect a 8-bit value.
+*
+* Argument(s) : datum       The datum to reflect.
+*
+* Return(s)   : The reflected value.
+*
+* Caller(s)   : CRC_TblMake_16Bit(),
+*               CRC_TblMake_32Bit(),
+*               CRC_ChkSumCalcNoTbl_16Bit_ref()
+*               CRC_ChkSumCalcNoTbl_32Bit_ref().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  CRC_Reflect_08Bit (CPU_INT08U  datum)
+{
+    return (CRC_ReflectTbl[datum]);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        CRC_Reflect_16Bit()
+*
+* Description : Reflect a 16-bit value.
+*
+* Argument(s) : datum       The datum to reflect.
+*
+* Return(s)   : The reflected value.
+*
+* Caller(s)   : CRC_Open_16Bit(),
+*               CRC_ChkSumCalc_16Bit(),
+*               CRC_TblMake_16Bit(),
+*               CRC_ChkSumCalcNoTbl_16Bit_ref().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  CRC_Reflect_16Bit (CPU_INT16U  datum)
+{
+    CPU_INT08U  tmp_datum_08;
+    CPU_INT08U  ref_datum_08;
+    CPU_INT16U  ref_datum;
+
+
+    tmp_datum_08  = (CPU_INT08U)((datum & 0xFF00u) >> 8);
+    ref_datum     = (CPU_INT16U)CRC_ReflectTbl[tmp_datum_08];
+
+    tmp_datum_08  = (CPU_INT08U)((datum & 0x00FFu) >> 0);
+    ref_datum_08  = (CPU_INT08U)CRC_ReflectTbl[tmp_datum_08];
+
+    ref_datum    |= (CPU_INT16U)((CPU_INT16U)ref_datum_08 << 8);
+
+    return (ref_datum);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         CRC_Reflect_32Bit()
+*
+* Description : Reflect a 32-bit value.
+*
+* Argument(s) : datum       The datum to reflect.
+*
+* Return(s)   : The reflected data.
+*
+* Caller(s)   : CRC_Open_32Bit(),
+*               CRC_ChkSumCalc_32Bit(),
+*               CRC_TblMake_32Bit(),
+*               CRC_ChkSumCalcNoTbl_32Bit_ref().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U   CRC_Reflect_32Bit (CPU_INT32U  datum)
+{
+    CPU_INT08U  tmp_datum_08;
+    CPU_INT08U  ref_datum_08;
+    CPU_INT32U  ref_datum;
+
+
+    tmp_datum_08  = (CPU_INT08U)((datum & 0xFF000000u) >> 24);
+    ref_datum     = (CPU_INT16U)CRC_ReflectTbl[tmp_datum_08];
+
+    tmp_datum_08  = (CPU_INT08U)((datum & 0x00FF0000u) >> 16);
+    ref_datum_08  = (CPU_INT08U)CRC_ReflectTbl[tmp_datum_08];
+    ref_datum    |= (CPU_INT32U)ref_datum_08 << 8;
+
+    tmp_datum_08  = (CPU_INT08U)((datum & 0x0000FF00u) >>  8);
+    ref_datum_08  = (CPU_INT08U)CRC_ReflectTbl[tmp_datum_08];
+    ref_datum    |= (CPU_INT32U)ref_datum_08 << 16;
+
+    tmp_datum_08  = (CPU_INT08U)((datum & 0x000000FFu) >>  0);
+    ref_datum_08  = (CPU_INT08U)CRC_ReflectTbl[tmp_datum_08];
+    ref_datum    |= (CPU_INT32U)ref_datum_08 << 24;
+
+    return (ref_datum);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-CRC/Source/edc_crc.h b/src/ucos_v1_42/micrium_source/uC-CRC/Source/edc_crc.h
new file mode 100644
index 0000000..f5a4c04
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-CRC/Source/edc_crc.h
@@ -0,0 +1,558 @@
+/*
+*********************************************************************************************************
+*                                                uC/CRC
+*           ERROR DETECTING CODE (EDC) & ERROR CORRECTING CODE (ECC) CALCULATION UTILITIES
+*
+*                         (c) Copyright 2007-2012; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/FS is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                              CYCLIC REDUNDANCY CHECK (CRC) CALCULATION
+*
+* Filename      : edc_crc.h
+* Version       : V1.09.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef   EDC_CRC_PRESENT
+#define   EDC_CRC_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                           CRC VERSION NUMBER
+*
+* Note(s) : (1) (a) The CRC software version is denoted as follows :
+*
+*                       Vx.yy
+*
+*                           where
+*                                  V     denotes 'Version' label
+*                                  x     denotes major software version revision number
+*                                  yy    denotes minor software version revision number
+*
+*               (b) The CRC software version label #define is formatted as follows :
+*
+*                       ver = x.yy * 100
+*
+*                           where
+*                                  ver   denotes software version number scaled as
+*                                        an integer value
+*                                  x.yy  denotes software version number
+*********************************************************************************************************
+*/
+
+#define  CRC_VERSION               105u                         /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef    EDC_CRC_MODULE
+#define   EDC_CRC_EXT
+#else
+#define   EDC_CRC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifndef  ECC_CRC_CFG_ARG_CHK_EXT_EN
+#define  ECC_CRC_CFG_ARG_CHK_EXT_EN             DEF_ENABLED
+#endif
+
+#ifndef  EDC_CRC_CFG_OPTIMIZE_ASM_EN
+#define  EDC_CRC_CFG_OPTIMIZE_ASM_EN            DEF_DISABLED
+#endif
+
+#ifndef  EDC_CRC_CFG_CRC16_1021_EN
+#define  EDC_CRC_CFG_CRC16_1021_EN              DEF_DISABLED
+#endif
+
+#ifndef  EDC_CRC_CFG_CRC16_1021_REF_EN
+#define  EDC_CRC_CFG_CRC16_1021_REF_EN          DEF_DISABLED
+#endif
+
+#ifndef  EDC_CRC_CFG_CRC16_8005_EN
+#define  EDC_CRC_CFG_CRC16_8005_EN              DEF_DISABLED
+#endif
+
+#ifndef  EDC_CRC_CFG_CRC16_8005_REF_EN
+#define  EDC_CRC_CFG_CRC16_8005_REF_EN          DEF_DISABLED
+#endif
+
+#ifndef  EDC_CRC_CFG_CRC16_8048_EN
+#define  EDC_CRC_CFG_CRC16_8048_EN              DEF_DISABLED
+#endif
+
+#ifndef  EDC_CRC_CFG_CRC16_8048_REF_EN
+#define  EDC_CRC_CFG_CRC16_8048_REF_EN          DEF_DISABLED
+#endif
+
+#ifndef  EDC_CRC_CFG_CRC32_EN
+#define  EDC_CRC_CFG_CRC32_EN                   DEF_DISABLED
+#endif
+
+#ifndef  EDC_CRC_CFG_CRC32_REF_EN
+#define  EDC_CRC_CFG_CRC32_REF_EN               DEF_DISABLED
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            CRC ERROR CODES
+*********************************************************************************************************
+*/
+
+typedef enum edc_err {
+    EDC_CRC_ERR_NONE                             =      0u,         /* No error.                                            */
+    EDC_CRC_ERR_NULL_PTR                         =      1u,         /* Null ptr argument.                                   */
+    EDC_CRC_ERR_INVALID_MODEL                    =      2u,         /* Invalid CRC calc model.                              */
+} EDC_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  struct  crc_model_16 {
+           CPU_INT16U    Poly;
+           CPU_INT16U    InitVal;
+           CPU_BOOLEAN   Reflect;
+           CPU_INT16U    XorOut;
+    const  CPU_INT16U   *TblPtr;
+} CRC_MODEL_16;
+
+typedef  struct  crc_model_32 {
+           CPU_INT32U    Poly;
+           CPU_INT32U    InitVal;
+           CPU_BOOLEAN   Reflect;
+           CPU_INT32U    XorOut;
+    const  CPU_INT32U   *TblPtr;
+} CRC_MODEL_32;
+
+typedef  struct  crc_calc_16 {
+    CRC_MODEL_16  Model;
+    CPU_INT16U    CRC_Curr;
+} CRC_CALC_16;
+
+typedef  struct  crc_calc_32 {
+    CRC_MODEL_32  Model;
+    CPU_INT32U    CRC_Curr;
+} CRC_CALC_32;
+
+
+/*
+*********************************************************************************************************
+*                                              CONSTANTS
+*
+* Note(s) : (1) Constant tables for several common CRCs are supplied.  Unfortunately, there often exists
+*               no definitive specification of these CRCs or such specification is difficult to obtain.
+*               Consequently, the most convenient method for determining the necessary CRC is accomplished
+*               by comparing CRCs from real tests with CRCs from example tests.  CRC outputs for the input
+*               ASCII string "123456789" are given in this table :
+*
+*
+*                       ------------------------------------------------------------------
+*                       |    POLY    |  REFLECT?  |  INIT VAL  | COMP. OUT? |     CRC    |
+*                       -------------+------------+------------+------------+-------------
+*                       |     0x1021 |     NO     |     0x0000 |     NO     |     0x31C3 |
+*                       |     0x1021 |     NO     |     0x0000 |     YES    |     0xCE3C |
+*                       |     0x1021 |     NO     |     0x1D0F |     NO     |     0xE5CC |
+*                       |     0x1021 |     NO     |     0xFFFF |     NO     |     0x29B1 |
+*                       |     0x1021 |     NO     |     0xFFFF |     YES    |     0xD64E |
+*                       -------------+------------+------------+------------+-------------
+*                       |     0x1021 |     YES    |     0x0000 |     NO     |     0x2189 |
+*                       |     0x1021 |     YES    |     0x0000 |     YES    |     0xDE76 |
+*                       |     0x1021 |     YES    |     0xFFFF |     NO     |     0x6F91 |
+*                       |     0x1021 |     YES    |     0xFFFF |     YES    |     0x906E |
+*                       -------------+------------+------------+------------+-------------
+*                       |     0x8005 |     NO     |     0x0000 |     NO     |     0xFEE8 |
+*                       |     0x8005 |     NO     |     0x0000 |     YES    |     0x0117 |
+*                       |     0x8005 |     NO     |     0xFFFF |     NO     |     0xAEE7 |
+*                       |     0x8005 |     NO     |     0xFFFF |     YES    |     0x5118 |
+*                       -------------+------------+------------+------------+-------------
+*                       |     0x8005 |     YES    |     0x0000 |     NO     |     0xBB3D |
+*                       |     0x8005 |     YES    |     0x0000 |     YES    |     0x44C2 |
+*                       |     0x8005 |     YES    |     0xFFFF |     NO     |     0x4B37 |
+*                       |     0x8005 |     YES    |     0xFFFF |     YES    |     0xB4C8 |
+*                       -------------+------------+------------+------------+-------------
+*                       |     0x8048 |     NO     |     0x0000 |     NO     |     0x80A0 |
+*                       |     0x8048 |     NO     |     0x0000 |     YES    |     0x7F5F |
+*                       |     0x8048 |     NO     |     0xFFFF |     NO     |     0xE8E0 |
+*                       |     0x8048 |     NO     |     0xFFFF |     YES    |     0x171F |
+*                       -------------+------------+------------+------------+-------------
+*                       |     0x8048 |     YES    |     0x0000 |     NO     |     0x1506 |
+*                       |     0x8048 |     YES    |     0x0000 |     YES    |     0xEAF9 |
+*                       |     0x8048 |     YES    |     0xFFFF |     NO     |     0x1710 |
+*                       |     0x8048 |     YES    |     0xFFFF |     YES    |     0xE8EF |
+*                       -------------+------------+------------+------------+-------------
+*                       | 0x04C11DB7 |     NO     | 0x00000000 |     NO     | 0x89A1897F |
+*                       | 0x04C11DB7 |     NO     | 0x00000000 |     YES    | 0x765E7680 |
+*                       | 0x04C11DB7 |     NO     | 0xFFFFFFFF |     NO     | 0x0376E6E7 |
+*                       | 0x04C11DB7 |     NO     | 0xFFFFFFFF |     YES    | 0xFC891918 |
+*                       -------------+------------+------------+------------+-------------
+*                       | 0x04C11DB7 |     YES    | 0x00000000 |     NO     | 0x2DFD2D88 |
+*                       | 0x04C11DB7 |     YES    | 0x00000000 |     YES    | 0xD202D277 |
+*                       | 0x04C11DB7 |     YES    | 0xFFFFFFFF |     NO     | 0x340BC6D9 |
+*                       | 0x04C11DB7 |     YES    | 0xFFFFFFFF |     YES    | 0xCBF43926 |
+*                       -------------+------------+------------+------------+-------------
+*
+*               (a) The column 'COMP. OUT?' (short for 'COMPLEMENT OUTPUT?') indicates whether the output
+*                   XOR value would be either 0xFFFF (for a CRC16) or 0xFFFFFFFF (for a CRC32).
+*
+*                   (1) If YES, this means that the CRC model struct ('CRC_MODEL_16' or 'CRC_MODEL_32')
+*                       should have a 'XorOut' member equal to 0xFFFF or 0xFFFFFFFF, respectively.
+*
+*                   (2) If NO,  this means that the CRC model struct ('CRC_MODEL_16' or 'CRC_MODEL_32')
+*                       should have a 'XorOut' member equal to 0x0000 or 0x00000000, respectively.
+*
+*               (b) The column 'REFLECT?' indicates that BOTH the input data & final output value
+*                   would be reflected.
+*
+*                   (1) If YES, this means that the CRC model struct ('CRC_MODEL_16' or 'CRC_MODEL_32')
+*                       should have a 'Reflect' member equal to DEF_YES.
+*
+*                   (2) If NO,  this means that the CRC model struct ('CRC_MODEL_16' or 'CRC_MODEL_32')
+*                       should have a 'Reflect' member equal to DEF_NO.
+*
+*           (2) The constant tables depend ONLY on the polynomial & whether the data is reflected.
+*               The additional model parameters, such as the initial value & the XOR for the output,
+*               do not matter.  Consequently, the provided tables may be used with user-defined models
+*               that differ only in initial value &/or XOR for the output with the models provided
+*               here.
+*********************************************************************************************************
+*/
+
+#if (EDC_CRC_CFG_CRC16_1021_EN == DEF_ENABLED)
+extern  const  CPU_INT16U    CRC_TblCRC16_1021[256];
+extern  const  CRC_MODEL_16  CRC_ModelCRC16_1021;
+#endif
+
+#if (EDC_CRC_CFG_CRC16_1021_REF_EN == DEF_ENABLED)
+extern  const  CPU_INT16U    CRC_TblCRC16_1021_ref[256];
+extern  const  CRC_MODEL_16  CRC_ModelCRC16_1021_ref;
+#endif
+
+#if (EDC_CRC_CFG_CRC16_8005_EN == DEF_ENABLED)
+extern  const  CPU_INT16U    CRC_TblCRC16_8005[256];
+extern  const  CRC_MODEL_16  CRC_ModelCRC16_8005;
+#endif
+
+#if (EDC_CRC_CFG_CRC16_8005_REF_EN == DEF_ENABLED)
+extern  const  CPU_INT16U    CRC_TblCRC16_8005_ref[256];
+extern  const  CRC_MODEL_16  CRC_ModelCRC16_8005_ref;
+#endif
+
+#if (EDC_CRC_CFG_CRC16_8048_EN == DEF_ENABLED)
+extern  const  CPU_INT16U    CRC_TblCRC16_8048[256];
+extern  const  CRC_MODEL_16  CRC_ModelCRC16_8048;
+#endif
+
+#if (EDC_CRC_CFG_CRC16_8048_REF_EN == DEF_ENABLED)
+extern  const  CPU_INT16U    CRC_TblCRC16_8048_ref[256];
+extern  const  CRC_MODEL_16  CRC_ModelCRC16_8048_ref;
+#endif
+
+#if (EDC_CRC_CFG_CRC32_EN == DEF_ENABLED)
+extern  const  CPU_INT32U    CRC_TblCRC32[256];
+extern  const  CRC_MODEL_32  CRC_ModelCRC32;
+#endif
+
+#if (EDC_CRC_CFG_CRC32_REF_EN == DEF_ENABLED)
+extern  const  CPU_INT32U    CRC_TblCRC32_ref[256];
+extern  const  CRC_MODEL_32  CRC_ModelCRC32_ref;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------- 16-BIT CRC ON DATA STREAM ------------ */
+void        CRC_Open_16Bit             (CRC_MODEL_16       *p_model,
+                                        CRC_CALC_16        *p_calc,
+                                        EDC_ERR            *p_err);
+
+void        CRC_WrBlock_16Bit          (CRC_CALC_16        *p_calc,
+                                        void               *p_data,
+                                        CPU_SIZE_T          size);
+
+void        CRC_WrOctet_16Bit          (CRC_CALC_16        *p_calc,
+                                        CPU_INT08U          octet);
+
+CPU_INT16U  CRC_Close_16Bit            (CRC_CALC_16        *p_calc);
+
+                                                                /* ------------- 32-BIT CRC ON DATA STREAM ------------ */
+void        CRC_Open_32Bit             (CRC_MODEL_32       *p_model,
+                                        CRC_CALC_32        *p_calc,
+                                        EDC_ERR            *p_err);
+
+void        CRC_WrBlock_32Bit          (CRC_CALC_32        *p_calc,
+                                        void               *p_data,
+                                        CPU_SIZE_T          size);
+
+void        CRC_WrOctet_32Bit          (CRC_CALC_32        *p_calc,
+                                        CPU_INT08U          octet);
+
+CPU_INT32U  CRC_Close_32Bit            (CRC_CALC_32        *p_calc);
+
+                                                                /* --------------------- Reflection ------------------- */
+CPU_INT08U  CRC_Reflect_08Bit          (CPU_INT08U          datum);
+
+CPU_INT16U  CRC_Reflect_16Bit          (CPU_INT16U          datum);
+
+CPU_INT32U  CRC_Reflect_32Bit          (CPU_INT32U          datum);
+
+
+                                                                /* -------------- CALCULATION ON DATA SET ------------- */
+CPU_INT16U  CRC_ChkSumCalc_16Bit       (CRC_MODEL_16       *p_model,
+                                        void               *p_data,
+                                        CPU_SIZE_T          size,
+                                        EDC_ERR            *p_err);
+
+CPU_INT32U  CRC_ChkSumCalc_32Bit       (CRC_MODEL_32       *p_model,
+                                        void               *p_data,
+                                        CPU_SIZE_T          size,
+                                        EDC_ERR            *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                       defined in edc_crc_a.asm
+*********************************************************************************************************
+*/
+
+#if (EDC_CRC_CFG_OPTIMIZE_ASM_EN == DEF_ENABLED)
+CPU_INT16U  CRC_ChkSumCalcTbl_16Bit    (CPU_INT16U          init_val,
+                                        const  CPU_INT16U  *p_tbl,
+                                        CPU_INT08U         *p_data,
+                                        CPU_SIZE_T          size);
+
+CPU_INT16U  CRC_ChkSumCalcTbl_16Bit_ref(CPU_INT16U          init_val,
+                                        const  CPU_INT16U  *p_tbl,
+                                        CPU_INT08U         *p_data,
+                                        CPU_SIZE_T          size);
+
+CPU_INT32U  CRC_ChkSumCalcTbl_32Bit    (CPU_INT32U          init_val,
+                                        const  CPU_INT32U  *p_tbl,
+                                        CPU_INT08U          *p_data,
+                                        CPU_SIZE_T          size);
+
+CPU_INT32U  CRC_ChkSumCalcTbl_32Bit_ref(CPU_INT32U          init_val,
+                                        const  CPU_INT32U  *p_tbl,
+                                        CPU_INT08U         *p_data,
+                                        CPU_SIZE_T          size);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  ECC_CRC_CFG_ARG_CHK_EXT_EN
+#error  "ECC_CRC_CFG_ARG_CHK_EXT_EN             not #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+
+#elif  ((ECC_CRC_CFG_ARG_CHK_EXT_EN != DEF_DISABLED) && \
+        (ECC_CRC_CFG_ARG_CHK_EXT_EN != DEF_ENABLED ))
+#error  "ECC_CRC_CFG_ARG_CHK_EXT_EN       illegally #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+
+#ifndef  EDC_CRC_CFG_OPTIMIZE_ASM_EN
+#error  "EDC_CRC_CFG_OPTIMIZE_ASM_EN            not #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#elif  ((EDC_CRC_CFG_OPTIMIZE_ASM_EN != DEF_ENABLED ) && \
+        (EDC_CRC_CFG_OPTIMIZE_ASM_EN != DEF_DISABLED))
+#error  "EDC_CRC_CFG_OPTIMIZE_ASM_EN      illegally #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+
+#ifndef  EDC_CRC_CFG_CRC16_1021_EN
+#error  "EDC_CRC_CFG_CRC16_1021_EN              not #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#elif  ((EDC_CRC_CFG_CRC16_1021_EN != DEF_ENABLED ) && \
+        (EDC_CRC_CFG_CRC16_1021_EN != DEF_DISABLED))
+#error  "EDC_CRC_CFG_CRC16_1021_EN        illegally #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+
+#ifndef  EDC_CRC_CFG_CRC16_1021_REF_EN
+#error  "EDC_CRC_CFG_CRC16_1021_REF_EN          not #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#elif  ((EDC_CRC_CFG_CRC16_1021_REF_EN != DEF_ENABLED ) && \
+        (EDC_CRC_CFG_CRC16_1021_REF_EN != DEF_DISABLED))
+#error  "EDC_CRC_CFG_CRC16_1021_REF_EN    illegally #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+#ifndef  EDC_CRC_CFG_CRC16_8005_EN
+#error  "EDC_CRC_CFG_CRC16_8005_EN              not #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#elif  ((EDC_CRC_CFG_CRC16_8005_EN != DEF_ENABLED ) && \
+        (EDC_CRC_CFG_CRC16_8005_EN != DEF_DISABLED))
+#error  "EDC_CRC_CFG_CRC16_8005_EN        illegally #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+
+#ifndef  EDC_CRC_CFG_CRC16_8005_REF_EN
+#error  "EDC_CRC_CFG_CRC16_8005_REF_EN          not #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#elif  ((EDC_CRC_CFG_CRC16_8005_REF_EN != DEF_ENABLED ) && \
+        (EDC_CRC_CFG_CRC16_8005_REF_EN != DEF_DISABLED))
+#error  "EDC_CRC_CFG_CRC16_8005_REF_EN    illegally #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+
+#ifndef  EDC_CRC_CFG_CRC16_8048_EN
+#error  "EDC_CRC_CFG_CRC16_8048_EN              not #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#elif  ((EDC_CRC_CFG_CRC16_8048_EN != DEF_ENABLED ) && \
+        (EDC_CRC_CFG_CRC16_8048_EN != DEF_DISABLED))
+#error  "EDC_CRC_CFG_CRC16_8048_EN        illegally #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+
+#ifndef  EDC_CRC_CFG_CRC16_8048_REF_EN
+#error  "EDC_CRC_CFG_CRC16_8048_REF_EN          not #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#elif  ((EDC_CRC_CFG_CRC16_8048_REF_EN != DEF_ENABLED ) && \
+        (EDC_CRC_CFG_CRC16_8048_REF_EN != DEF_DISABLED))
+#error  "EDC_CRC_CFG_CRC16_8048_REF_EN    illegally #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+
+#ifndef  EDC_CRC_CFG_CRC32_EN
+#error  "EDC_CRC_CFG_CRC32_EN                   not #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#elif  ((EDC_CRC_CFG_CRC32_EN != DEF_ENABLED ) && \
+        (EDC_CRC_CFG_CRC32_EN != DEF_DISABLED))
+#error  "EDC_CRC_CFG_CRC32_EN             illegally #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+#ifndef  EDC_CRC_CFG_CRC32_REF_EN
+#error  "EDC_CRC_CFG_CRC32_REF_EN               not #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#elif  ((EDC_CRC_CFG_CRC32_REF_EN != DEF_ENABLED ) && \
+        (EDC_CRC_CFG_CRC32_REF_EN != DEF_DISABLED))
+#error  "EDC_CRC_CFG_CRC32_REF_EN         illegally #define'd in 'app_cfg.h'"
+#error  "                                 [MUST be DEF_ENABLED ]            "
+#error  "                                 [     || DEF_DISABLED]            "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of CRC module include.                           */
diff --git a/src/ucos_v1_42/micrium_source/uC-Clk/Cfg/Template/clk_cfg.c b/src/ucos_v1_42/micrium_source/uC-Clk/Cfg/Template/clk_cfg.c
new file mode 100644
index 0000000..733c5e9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Clk/Cfg/Template/clk_cfg.c
@@ -0,0 +1,100 @@
+/*
+*********************************************************************************************************
+*                                               uC/Clk
+*                                          Clock / Calendar
+*
+*                      (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*          All rights reserved.  Protected by international copyright laws.
+*
+*          uC/Clk is provided in source form to registered licensees ONLY.  It is
+*          illegal to distribute this source code to any third party unless you receive
+*          written permission by an authorized Micrium representative.  Knowledge of
+*          the source code may NOT be used to develop a similar product.
+*
+*          Please help us continue to provide the Embedded community with the finest
+*          software available.  Your honesty is greatly appreciated.
+*
+*          You can find our product's user manual, API reference, release notes and
+*          more information at: https://doc.micrium.com
+*
+*          You can contact us at: www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+**                                     CLOCK CONFIGURATION FILE
+*
+*                                          TEMPLATE-EXAMPLE
+*
+* Filename      : clk_cfg.c
+* Version       : V3.10.00
+* Programmer(s) : AL
+*                 AOP
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    CLK_CFG_MODULE
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                     EXAMPLE TASKS CONFIGURATION
+*
+* Notes: (1) (a) Task priorities can be defined either in this configuration file 'clk_cfg.c' or in a global
+*                OS tasks priorities configuration header file which must be included in 'clk_cfg.c' and
+*                used within task's configuration structures:
+*
+*                   in app_cfg.h:
+*                       #define  CLK_TASK_PRIO           30u
+*                       #define  CLK_TASK_STK_SIZE      512u
+*
+*                   in clk_cfg.c:
+*                       #include  
+*
+*                       CLK_TASK_CFG  ClkTaskCfg        = {
+*                                                             CLK_TASK_PRIO,
+*                                                             CLK_TASK_STK_SIZE,
+*                                                             DEF_NULL,
+*                                                         };
+*
+*        (2)  The only guaranteed method of determining the required task stack sizes is to calculate the maximum
+*             stack usage for each task. Obviously, the maximum stack usage for a task is the total stack usage
+*             along the task's most-stack-greedy function path plus the (maximum) stack usage for interrupts.
+*             Note that the most-stack-greedy function path is not necessarily the longest or deepest function path.
+*             Micrium cannot provide any recommended stack size values since it's specific to each compiler and
+*             processor.
+*
+*             Although Micrium does NOT officially recommend any specific tools to calculate task/function stack usage.
+*             However Wikipedia maintains a list of static code analysis tools for various languages including C:
+*
+*                 http://en.wikipedia.org/wiki/List_of_tools_for_static_code_analysis
+*
+*        (3)  When the stack pointer is defined as null (DEF_NULL), the task's stack is allocated automatically on the
+*             heap of uC/LIB. If for some reason you would like to allocate the stack somewhere else and by yourself,
+*             you can just specify the memory location of the stack to use.
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_EXT_EN == DEF_DISABLED)
+const  CLK_TASK_CFG  ClkTaskCfg = {
+        CLK_TASK_PRIO,                                          /* CLK task priority                    (see Note #1).   */
+        CLK_TASK_STK_SIZE,                                      /* CLK task stack size in bytes         (see Note #2).   */
+        DEF_NULL                                                /* CLK task stack pointer               (See Note #3).   */
+};
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-Clk/Cfg/Template/clk_cfg.h b/src/ucos_v1_42/micrium_source/uC-Clk/Cfg/Template/clk_cfg.h
new file mode 100644
index 0000000..ef8c1ef
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Clk/Cfg/Template/clk_cfg.h
@@ -0,0 +1,243 @@
+/*
+*********************************************************************************************************
+*                                               uC/Clk
+*                                          Clock / Calendar
+*
+*                      (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*          All rights reserved.  Protected by international copyright laws.
+*
+*          uC/Clk is provided in source form to registered licensees ONLY.  It is
+*          illegal to distribute this source code to any third party unless you receive
+*          written permission by an authorized Micrium representative.  Knowledge of
+*          the source code may NOT be used to develop a similar product.
+*
+*          Please help us continue to provide the Embedded community with the finest
+*          software available.  Your honesty is greatly appreciated.
+*
+*          You can find our product's user manual, API reference, release notes and
+*          more information at: https://doc.micrium.com
+*
+*          You can contact us at: www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 CLOCK / CALENDAR CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : clk_cfg.h
+* Version       : V3.10.00
+* Programmer(s) : JDH
+*                 JJL
+*                 SR
+*                 AA
+*                 AL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                 MODULE
+* Note(s) : (1) This configuration header file is protected from multiple pre-processor inclusion.
+*********************************************************************************************************
+*/
+
+#ifndef CLK_CFG_H
+#define CLK_CFG_H
+
+
+/*
+*********************************************************************************************************
+*                                           TASKS PRIORITIES
+*
+* Notes: (1) Task priority configuration:
+*
+*           (a) If the clock timestamp is NOT an externally-maintained the Clock OS port must be
+*               included in the project and the following task priority should be defined:
+*
+*                      CLK_TASK_PRIO
+*
+*               The task priority can be defined either in this configuration file 'clk_cfg.h' or in a
+*               global OS tasks tasks configuration header file that must be included in 'clk_cfg.h'.
+*********************************************************************************************************
+*/
+
+
+#ifndef  CLK_TASK_PRIO                                          /* See Note #1.                                         */
+#define  CLK_TASK_PRIO                                    20
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                              STACK SIZES
+*                             Size of the task stacks (# of OS_STK entries)
+* Notes: (1) Size of the task stacks configuration:
+*
+*           (a) If the clock timestamp is NOT externally-maintained the Clock OS port must be
+*               included in the project and the following stack size should be defined:
+*
+*                      CLK_TASK_STK_SIZE
+*
+*               The Size of the task stacks can be defined either in this configuration file 'clk_cfg.h' or
+*               in a global OS tasks configuration header file that must be included in 'clk_cfg.h'.
+*********************************************************************************************************
+*/
+
+#ifndef  CLK_TASK_STK_SIZE                                      /* See Note #1.                                         */
+#define  CLK_TASK_STK_SIZE                              1024
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                          CLOCK CONFIGURATION
+*
+* Note(s) : (1) Configure CLK_CFG_EXT_EN to enable/disable an externally-maintained clock :
+*
+*               (a) When ENABLED,  clock is maintained externally via hardware or another application
+*                      (see also 'clk.h  Note #4').
+*               (b) When DISABLED, clock is maintained internally via software
+*                      (see also 'clk.h  Note #3').
+*
+*           (2) (a) Configure CLK_CFG_SIGNAL_EN to enable/disable signaling of the internally-maintained
+*                   software clock :
+*
+*                   (1) When ENABLED,  clock is signaled by application calls to Clk_SignalClk().
+*                   (2) When DISABLED, clock is signaled by OS-dependent timing features.
+*
+*               (b) CLK_CFG_SIGNAL_EN configuration is required only if CLK_CFG_EXT_EN is disabled.
+*
+*               See also 'clk.h  Note #3b'.
+*
+*           (3) (a) Configure CLK_CFG_SIGNAL_FREQ_HZ to the number of times the application will signal
+*                   the clock every second.
+*
+*               (b) CLK_CFG_SIGNAL_FREQ_HZ configuration is required only if CLK_CFG_SIGNAL_EN is enabled.
+*
+*           (4) (a) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                   (1) Between +|- 12 hours (+|- 43200 seconds)
+*                   (2) Multiples of 15 minutes
+*
+*               (b) Time zone offset MUST be set in seconds.
+*
+*               (c) Default values CAN be changed real-time by using an appropriate function.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure argument check feature :                   */
+#define  CLK_CFG_ARG_CHK_EN                     DEF_ENABLED
+                                                                /*   DEF_DISABLED   Argument checks DISABLED            */
+                                                                /*   DEF_ENABLED    Argument checks ENABLED             */
+
+
+                                                                /* Configure Clock string conversion features :         */
+#define  CLK_CFG_STR_CONV_EN                    DEF_ENABLED
+                                                                /*   DEF_DISABLED   Clock string conversions DISABLED   */
+                                                                /*   DEF_ENABLED    Clock string conversions ENABLED    */
+
+
+                                                                /* Configure Clock NTP conversion features :            */
+#define  CLK_CFG_NTP_EN                         DEF_ENABLED
+                                                                /*   DEF_DISABLED   NTP conversions DISABLED            */
+                                                                /*   DEF_ENABLED    NTP conversions ENABLED             */
+
+
+                                                                /* Configure Clock Unix conversion features :           */
+#define  CLK_CFG_UNIX_EN                        DEF_ENABLED
+                                                                /*   DEF_DISABLED   Unix conversions DISABLED           */
+                                                                /*   DEF_ENABLED    Unix conversions ENABLED            */
+
+
+                                                                /* Configure External timestamp feature (see Note #1) : */
+#define  CLK_CFG_EXT_EN                         DEF_DISABLED
+                                                                /*   DEF_DISABLED   Software Clock maintained           */
+                                                                /*   DEF_ENABLED    External Clock maintained           */
+
+
+                                                                /* Configure Clock signal feature (see Note #2) :       */
+#define  CLK_CFG_SIGNAL_EN                      DEF_DISABLED
+                                                                /*   DEF_DISABLED   Task time delayed                   */
+                                                                /*   DEF_ENABLED    Signaled via application call ...   */
+                                                                /*                  ... to Clk_SignalClk()              */
+
+
+#define  CLK_CFG_SIGNAL_FREQ_HZ                         1000u   /* Configure signal frequency  (see Note #3).           */
+
+#define  CLK_CFG_TZ_DFLT_SEC                               0    /* Configure default time zone (see Note #4).           */
+
+
+/*
+*********************************************************************************************************
+*                                        TASKS CONFIGURATION
+*
+* Note(s) : (1) (a) The clock and calender task configuration MUST be defined in application files,
+*                   typically 'clk_cfg.c', & SHOULD be forward-declared with the exact same name &
+*                   type in order to be used by the application during calls to Clk_Init().
+*
+*               (b) Since this task configuration structure is referenced ONLY by application files,
+*                   there is NO required naming convention for this configuration structure.
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_EXT_EN == DEF_DISABLED)
+extern  const  CLK_TASK_CFG  ClkTaskCfg;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     TRACE / DEBUG CONFIGURATION
+*
+* Note(s) : (1) By default Clk tracing is disabled. Clk tracing can be enabled by adding
+*               the following #define:
+*
+*                   CLK_TRACE_LEVEL
+*                   CLK_TRACE
+*
+*           (2) Configure CLK_TRACE_LEVEL with the desired output trace level :
+*
+*               (a) TRACE_LEVEL_OFF  will disable all output from Clk.
+*
+*               (b) TRACE_LEVEL_INFO will enable  minimum trace for important events.
+*
+*               (c) TRACE_LEVEL_DBG  will enable  general debugging trace and INFO trace.
+*
+*           (3) Configure CLK_TRACE to the 'printf' style function that will be used to output all the
+*               tracing messages. If CLK_TRACE_LEVEL is configured to TRACE_LEVEL_OFF, there is no need
+*               to configure CLK_TRACE.
+*
+*           (4) Configuration example:
+*                   #ifndef  TRACE_LEVEL_OFF
+*                   #define  TRACE_LEVEL_OFF                                   0
+*                   #endif
+*
+*                   #ifndef  TRACE_LEVEL_INFO
+*                   #define  TRACE_LEVEL_INFO                                  1
+*                   #endif
+*
+*                   #ifndef  TRACE_LEVEL_DBG
+*                   #define  TRACE_LEVEL_DBG                                   2
+*                   #endif
+*
+*                   #define  CLK_TRACE_LEVEL                        TRACE_LEVEL_DBG
+*                   #define  CLK_TRACE                              printf
+*********************************************************************************************************
+*/
+
+#endif  /* CLK_CFG_H */
diff --git a/src/ucos_v1_42/micrium_source/uC-Clk/Cmd/clk_cmd.c b/src/ucos_v1_42/micrium_source/uC-Clk/Cmd/clk_cmd.c
new file mode 100644
index 0000000..0bdbfe9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Clk/Cmd/clk_cmd.c
@@ -0,0 +1,1146 @@
+/*
+*********************************************************************************************************
+*                                               uC/Clk
+*                                             Clock module
+*
+*                      (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*          All rights reserved.  Protected by international copyright laws.
+*
+*          uC/Clk is provided in source form to registered licensees ONLY.  It is
+*          illegal to distribute this source code to any third party unless you receive
+*          written permission by an authorized Micrium representative.  Knowledge of
+*          the source code may NOT be used to develop a similar product.
+*
+*          Please help us continue to provide the Embedded community with the finest
+*          software available.  Your honesty is greatly appreciated.
+*
+*          You can find our product's user manual, API reference, release notes and
+*          more information at: https://doc.micrium.com
+*
+*          You can contact us at: www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          CLOCK / CALENDAR
+*
+* Filename      : clk_cmd.c
+* Version       : V3.10.00
+* Programmer(s) : AL
+*                 AOP
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/CPU    V1.30
+*                     (b) uC/OS-II  V2.90 or
+*                         uC/OS-III V3.03
+*                     (c) uC/Shell  V1.03
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  CLK_CMD_MODULE
+
+#include  "clk_cmd.h"
+#include  "../Source/clk.h"
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  CLK_CMD_ARG_BEGIN                                     ASCII_CHAR_HYPHEN_MINUS
+#define  CLK_CMD_ARG_TIME_TYPE                                 ASCII_CHAR_LATIN_LOWER_T
+
+#define  CLK_CMD_NBR_MIN_PER_HR                                60u
+#define  CLK_CMD_NBR_SEC_PER_MIN                               60u
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+#define  CLK_CMD_TBL_NAME                                    ("clk")
+
+#define  CLK_CMD_NAME_HELP                                   ("clk_help")
+#define  CLK_CMD_NAME_SET                                    ("clk_set")
+#define  CLK_CMD_NAME_GET                                    ("clk_get")
+
+#define  CLK_CMD_HELP                                        ("help")
+#define  CLK_CMD_HELP_SHORT                                  ("h")
+
+#define  CLK_CMD_FORMAT_DATETIME                             ("datetime")
+#define  CLK_CMD_FORMAT_NTP                                  ("ntp")
+#define  CLK_CMD_FORMAT_UNIX                                 ("unix")
+
+#define  CLK_CMD_FORMAT_DATETIME_SHORT                       ("d")
+#define  CLK_CMD_FORMAT_NTP_SHORT                            ("n")
+#define  CLK_CMD_FORMAT_UNIX_SHORT                           ("u")
+
+
+#define  CLK_CMD_OUTPUT_CMD_LIST                             ("Command List: ")
+#define  CLK_CMD_OUTPUT_ERR                                  ("Error: ")
+#define  CLK_CMD_OUTPUT_SUCCESS                              ("Completed successfully")
+#define  CLK_CMD_OUTPUT_TABULATION                           ("\t")
+
+#define  CLK_CMD_OUTPUT_ERR_CMD_ARG_INVALID                  ("Invalid Arguments")
+#define  CLK_CMD_OUTPUT_ERR_CMD_NOT_IMPLEMENTED              ("This command is not yet implemented")
+#define  CLK_CMD_OUTPUT_ERR_CONV_DISABLED                    ("CLK_CFG_STR_CONV_EN is not enabled. Formatting not available.")
+#define  CLK_CMD_OUTPUT_ERR_CMD_INTERNAL_ERR                 ("Clk Internal Error. Date & Time cannot be converted.")
+
+#define  CLK_CMD_HELP_SET                                    ("usage: clk_set [VALUE] {FORMAT}\r\n")
+
+#define  CLK_CMD_HELP_GET                                    ("usage: clk_get {FORMAT}\r\n")
+
+#define  CLK_CMD_HELP_VALUE                                  ("where VALUE is:\r\n"                                                 \
+                                                              "  YYYY-MM-DD {HH:MM:SS {UTC+/-HH:MM}}      for DATETIME format.\r\n" \
+                                                              "  a 32-bit integer greater than 946684799  for UNIX     format.\r\n" \
+                                                              "  a 32-bit integer greater than 3155673599 for NTP      format.\r\n")
+
+#define  CLK_CMD_HELP_FORMAT                                 ("where FORMAT is:\r\n"                                                        \
+                                                              "\r\n"                                                                        \
+                                                              "  -d, --datetime   DATETIME format.\r\n"                                     \
+                                                              "  -u, --unix       UNIX     format.\r\n"                                     \
+                                                              "  -n, --ntp        NTP      format.\r\n\r\n"                                 \
+                                                              "  if FORMAT is not provided, VALUE is assumed to be in DATETIME format.\r\n")
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                    CLOCK COMMAND TIME DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum {
+    CLK_CMD_TIME_TYPE_NONE     = 0x00,
+    CLK_CMD_TIME_TYPE_DATETIME = 0x30,
+    CLK_CMD_TIME_TYPE_NTP      = 0x31,
+    CLK_CMD_TIME_TYPE_UNIX     = 0x32
+} CLK_CMD_TIME_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                  CLOCK COMMAND ARGUMENT DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct clk_cmd_arg {
+    CLK_CMD_TIME_TYPE  TimeType;
+    CPU_CHAR          *DatePtr;
+    CPU_CHAR          *TimePtr;
+    CPU_CHAR          *OffsetPtr;
+} CLK_CMD_ARG;
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S   ClkCmd_Help        (       CPU_INT16U        argc,
+                                                CPU_CHAR         *p_argv[],
+                                                SHELL_OUT_FNCT    out_fnct,
+                                                SHELL_CMD_PARAM  *p_cmd_param);
+
+static  CPU_INT16S   ClkCmd_Set         (       CPU_INT16U        argc,
+                                                CPU_CHAR         *p_argv[],
+                                                SHELL_OUT_FNCT    out_fnct,
+                                                SHELL_CMD_PARAM  *p_cmd_param);
+
+static  CPU_INT16S   ClkCmd_Get         (       CPU_INT16U        argc,
+                                                CPU_CHAR         *p_argv[],
+                                                SHELL_OUT_FNCT    out_fnct,
+                                                SHELL_CMD_PARAM  *p_cmd_param);
+
+static  CLK_CMD_ARG  ClkCmd_CmdArgParse (       CPU_INT16U        argc,
+                                                CPU_CHAR         *p_argv[],
+                                                CLK_CMD_ERR      *p_err);
+
+static  CPU_INT16S   ClkCmd_OutputCmdTbl(       SHELL_CMD        *p_cmd_tbl,
+                                                SHELL_OUT_FNCT    out_fnct,
+                                                SHELL_CMD_PARAM  *p_cmd_param);
+
+static  CPU_INT16S   ClkCmd_OutputError (       CPU_CHAR         *p_error,
+                                                SHELL_OUT_FNCT    out_fnct,
+                                                SHELL_CMD_PARAM  *p_cmd_param);
+
+static  CPU_INT16S   ClkCmd_OutputMsg   (const  CPU_CHAR         *p_msg,
+                                                CPU_BOOLEAN       new_line_start,
+                                                CPU_BOOLEAN       new_line_end,
+                                                CPU_BOOLEAN       tab_start,
+                                                SHELL_OUT_FNCT    out_fnct,
+                                                SHELL_CMD_PARAM  *p_cmd_param);
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+static  SHELL_CMD ClkCmdTbl[] =
+{
+    {CLK_CMD_NAME_HELP, ClkCmd_Help},
+    {CLK_CMD_NAME_SET,  ClkCmd_Set},
+    {CLK_CMD_NAME_GET,  ClkCmd_Get},
+    {0,                 0}
+};
+
+
+/*
+*********************************************************************************************************
+*                                                MACRO
+*********************************************************************************************************
+*/
+
+#define  CLK_CMD_OUT_MSG_CHK(out_val, cur_out_cnt, exit_fail_label)     do {                                           \
+                                                                            switch (out_val) {                         \
+                                                                                case SHELL_OUT_RTN_CODE_CONN_CLOSED:   \
+                                                                                case SHELL_OUT_ERR:                    \
+                                                                                     out_val = SHELL_EXEC_ERR;         \
+                                                                                     goto exit_fail_label;             \
+                                                                                                                       \
+                                                                                                                       \
+                                                                                default:                               \
+                                                                                     cur_out_cnt += out_val;           \
+                                                                                     break;                            \
+                                                                            }                                          \
+                                                                        } while(0)
+
+
+/*
+*********************************************************************************************************
+*                                            ClkCmd_Init()
+*
+* Description : Add Clk commands to uC/Shell.
+*
+* Argument(s) : p_err   Pointer to an error code which will be returned to your application:
+*
+*                           CLK_CMD_ERR_NONE            No error.
+*
+*                           CLK_CMD_ERR_SHELL_INIT      Command table not added to uC-Shell
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  ClkCmd_Init (CLK_CMD_ERR  *p_err)
+{
+    SHELL_ERR  shell_err;
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE ERR PTR ----------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+
+    Shell_CmdTblAdd((CPU_CHAR *)CLK_CMD_TBL_NAME,
+                    ClkCmdTbl,
+                    &shell_err);
+
+    if (shell_err == SHELL_ERR_NONE) {
+        *p_err = CLK_CMD_ERR_NONE;
+    } else {
+        *p_err = CLK_CMD_ERR_SHELL_INIT;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            ClkCmd_Help()
+*
+* Description : Output the available commands.
+*
+* Argument(s) : argc            Count of the arguments supplied.
+*
+*               p_argv          Array of pointers to the strings which are those arguments.
+*
+*               out_fnct        Callback to a respond to the requester.
+*
+*               p_cmd_param     Pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell_Exec().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  ClkCmd_Help (CPU_INT16U        argc,
+                                 CPU_CHAR         *p_argv[],
+                                 SHELL_OUT_FNCT    out_fnct,
+                                 SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S  ret_val;
+
+
+    (void)argc;                                                 /* Prevent 'variable unused' compiler warning.          */
+    (void)p_argv;                                               /* Prevent 'variable unused' compiler warning.          */
+
+    ret_val = ClkCmd_OutputCmdTbl(ClkCmdTbl,
+                                  out_fnct,
+                                  p_cmd_param);
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            ClkCmd_Set()
+*
+* Description : Set the current date and time.
+*
+* Argument(s) : argc            Count of the arguments supplied.
+*
+*               p_argv          Array of pointers to the strings which are those arguments.
+*
+*               out_fnct        Callback to a respond to the requester.
+*
+*               p_cmd_param     Pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell_Exec().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  ClkCmd_Set (CPU_INT16U        argc,
+                                CPU_CHAR         *p_argv[],
+                                SHELL_OUT_FNCT    out_fnct,
+                                SHELL_CMD_PARAM  *p_cmd_param)
+{
+#if  (CLK_CFG_STR_CONV_EN == DEF_ENABLED)
+    CPU_CHAR       date_time_str[CLK_STR_FMT_MAX_LEN];
+#endif
+#if  (CLK_CFG_NTP_EN == DEF_ENABLED)
+    CPU_INT32U     ts_ntp_toset;
+#endif
+#if  (CLK_CFG_UNIX_EN == DEF_ENABLED)
+    CLK_TS_SEC     ts_unix_toset;
+#endif
+    CPU_INT16S     ret_val                            = 0u;
+    CPU_INT16S     byte_out_cnt                       = 0u;
+    CLK_YR         yr                                 = 0u;
+    CLK_MONTH      month                              = 0u;
+    CLK_DAY        day                                = 0u;
+    CLK_HR         hr                                 = 0u;
+    CLK_MIN        min                                = 0u;
+    CLK_SEC        sec                                = 0u;
+    CLK_TZ_SEC     tz_sec                             = 0u;
+    CPU_SIZE_T     off_len                            = 0u;
+    CPU_INT08S     off_hr                             = 0u;
+    CPU_INT08S     off_min                            = 0u;
+    CPU_CHAR      *p_next;
+    CPU_CHAR      *p_next_tmp;
+    CLK_CMD_ARG    cmd_arg;
+    CLK_DATE_TIME  date_time;
+    CPU_INT32U     off_ix;
+    CLK_TS_SEC     ts_sec;
+    CPU_BOOLEAN    success;
+    CLK_CMD_ERR    err;
+
+
+    cmd_arg = ClkCmd_CmdArgParse(argc,
+                                 p_argv,
+                                 &err);
+    switch (err) {
+        case CLK_CMD_ERR_NONE:
+             break;
+
+
+        case CLK_CMD_ERR_CMD_ARG_INVALID:
+             ret_val = ClkCmd_OutputError((CPU_CHAR *)CLK_CMD_OUTPUT_ERR_CMD_ARG_INVALID,
+                                          out_fnct,
+                                          p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+             goto exit_ok;
+
+
+        case CLK_CMD_ERR_CMD_ARG_NO_ARGS:
+        case CLK_CMD_ERR_HELP:
+        default:
+             ret_val = ClkCmd_OutputMsg(CLK_CMD_HELP_SET,
+                                        DEF_YES,
+                                        DEF_YES,
+                                        DEF_NO,
+                                        out_fnct,
+                                        p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+
+             ret_val = ClkCmd_OutputMsg(CLK_CMD_HELP_VALUE,
+                                        DEF_YES,
+                                        DEF_YES,
+                                        DEF_NO,
+                                        out_fnct,
+                                        p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+
+             ret_val = ClkCmd_OutputMsg(CLK_CMD_HELP_FORMAT,
+                                        DEF_YES,
+                                        DEF_YES,
+                                        DEF_NO,
+                                        out_fnct,
+                                        p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+             goto exit_ok;
+    }
+
+    switch (cmd_arg.TimeType) {
+        case CLK_CMD_TIME_TYPE_NONE:
+        case CLK_CMD_TIME_TYPE_DATETIME:
+                                                                /* Parsing date.                                        */
+             if (cmd_arg.DatePtr != DEF_NULL) {
+                 yr    = (CLK_YR)   Str_ParseNbr_Int32U((const  CPU_CHAR *)cmd_arg.DatePtr,
+                                                        &p_next,
+                                                        10u);
+
+                 month = (CLK_MONTH)Str_ParseNbr_Int32U((const  CPU_CHAR *)&p_next[1],
+                                                        &p_next_tmp,
+                                                        10u);
+
+                 day   = (CLK_DAY)  Str_ParseNbr_Int32U((const  CPU_CHAR *)&p_next_tmp[1],
+                                                        DEF_NULL,
+                                                        10u);
+             } else {
+                 goto arg_invalid;
+             }
+
+                                                                /* Parsing time. (optional)                             */
+             if (cmd_arg.TimePtr != DEF_NULL) {
+                 hr  = (CLK_HR) Str_ParseNbr_Int32U((const  CPU_CHAR *)cmd_arg.TimePtr,
+                                                    &p_next,
+                                                    10u);
+
+                 min = (CLK_MIN)Str_ParseNbr_Int32U((const  CPU_CHAR *)&p_next[1],
+                                                    &p_next_tmp,
+                                                    10u);
+
+                 sec = (CLK_SEC)Str_ParseNbr_Int32U((const  CPU_CHAR *)&p_next_tmp[1],
+                                                    DEF_NULL,
+                                                    10u);
+
+                                                                /* Parsing timezone. (optional).                        */
+                 if (cmd_arg.OffsetPtr != DEF_NULL) {
+                     off_len = Str_Len(cmd_arg.OffsetPtr);
+
+                     for (off_ix = 0u ; off_ix < off_len ; off_ix++) {
+                         if ((cmd_arg.OffsetPtr[off_ix] == ASCII_CHAR_HYPHEN_MINUS) ||
+                             (cmd_arg.OffsetPtr[off_ix] == ASCII_CHAR_PLUS_SIGN)) {
+
+                             off_hr  = (CPU_INT08S)Str_ParseNbr_Int32S((const  CPU_CHAR *)&cmd_arg.OffsetPtr[off_ix],
+                                                                       &p_next,
+                                                                       10u);
+
+                             off_min = (CPU_INT08S)Str_ParseNbr_Int32S((const  CPU_CHAR *)&p_next[1],
+                                                                       DEF_NULL,
+                                                                       10u);
+                             break;
+                         }
+                     }
+
+                     tz_sec = (CLK_TZ_SEC)((off_hr * (CPU_INT08S)CLK_CMD_NBR_MIN_PER_HR + off_min) *
+                                                     (CPU_INT08S)CLK_CMD_NBR_SEC_PER_MIN);
+                 }
+             }
+
+             success = Clk_DateTimeMake(&date_time,             /* Make a datetime struct.                              */
+                                        yr,
+                                        month,
+                                        day,
+                                        hr,
+                                        min,
+                                        sec,
+                                        tz_sec);
+
+             if (success == DEF_FAIL) {
+                 goto arg_invalid;
+             }
+                                                                /* Converting datetime to timestamp.                    */
+             success = Clk_DateTimeToTS(&ts_sec,
+                                        &date_time);
+
+             if (success == DEF_FAIL) {
+                 goto arg_invalid;
+             }
+                                                                /* Setting clock to timestamp.                          */
+             success = Clk_SetTS(ts_sec);
+
+             if (success == DEF_FAIL) {
+                 goto arg_invalid;
+             }
+             break;
+
+#if  (CLK_CFG_NTP_EN == DEF_ENABLED)
+        case CLK_CMD_TIME_TYPE_NTP:
+             ts_ntp_toset = Str_ParseNbr_Int32U(cmd_arg.DatePtr,
+                                                DEF_NULL,
+                                                10u);
+             success      = Clk_SetTS_NTP(ts_ntp_toset);
+
+             if (success == DEF_FAIL) {
+                 goto arg_invalid;
+             }
+             break;
+#endif
+
+
+#if  (CLK_CFG_UNIX_EN == DEF_ENABLED)
+        case CLK_CMD_TIME_TYPE_UNIX:
+             ts_unix_toset = (CLK_TS_SEC)Str_ParseNbr_Int32U(cmd_arg.DatePtr,
+                                                             DEF_NULL,
+                                                             10u);
+             success       = Clk_SetTS_Unix(ts_unix_toset);
+
+             if(success == DEF_FAIL) {
+                 goto arg_invalid;
+             }
+             break;
+#endif
+
+
+        default:
+            goto arg_invalid;
+    }
+
+    success = Clk_GetDateTime(&date_time);
+    if(success == DEF_FAIL) {
+        goto arg_invalid;
+    }
+#if (CLK_CFG_STR_CONV_EN == DEF_ENABLED)
+    success = Clk_DateTimeToStr(&date_time,
+                                CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS_UTC,
+                                date_time_str,
+                                CLK_STR_FMT_MAX_LEN);
+
+    if(success == DEF_FAIL) {
+        goto arg_invalid;
+    }
+
+    ret_val = ClkCmd_OutputMsg(date_time_str,
+                               DEF_YES,
+                               DEF_YES,
+                               DEF_NO,
+                               out_fnct,
+                               p_cmd_param);
+
+    CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+    goto exit_ok;
+#else
+    goto conv_not_enabled;
+#endif
+
+#if  (CLK_CFG_STR_CONV_EN == DEF_DISABLED)
+conv_not_enabled:
+    ret_val = ClkCmd_OutputError((CPU_CHAR *)CLK_CMD_OUTPUT_ERR_CONV_DISABLED,
+                                 out_fnct,
+                                 p_cmd_param);
+
+    CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+    goto exit_ok;
+#endif
+
+arg_invalid:
+    ret_val = ClkCmd_OutputError((CPU_CHAR *)CLK_CMD_OUTPUT_ERR_CMD_ARG_INVALID,
+                                 out_fnct,
+                                 p_cmd_param);
+
+    CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+    goto exit_ok;
+
+exit_ok:
+    ret_val = byte_out_cnt;
+
+
+exit_fail:
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            ClkCmd_Get()
+*
+* Description : Manage a clock get command according to the specified format.
+*
+* Argument(s) : argc            Count of the arguments supplied.
+*
+*               p_argv          Array of pointers to the strings which are those arguments.
+*
+*               out_fnct        Callback to a respond to the requester.
+*
+*               p_cmd_param     Pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : NetCmdTbl.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  ClkCmd_Get (CPU_INT16U        argc,
+                                CPU_CHAR         *p_argv[],
+                                SHELL_OUT_FNCT    out_fnct,
+                                SHELL_CMD_PARAM  *p_cmd_param)
+{
+#if  (CLK_CFG_STR_CONV_EN == DEF_ENABLED)
+    CPU_CHAR       date_time_str[CLK_STR_FMT_MAX_LEN];
+#endif
+#if  (CLK_CFG_UNIX_EN == DEF_ENABLED)
+    CLK_TS_SEC     ts_unix_sec;
+#endif
+#if  (CLK_CFG_NTP_EN == DEF_ENABLED)
+    CLK_TS_SEC     ts_ntp_sec;
+#endif
+#if ((CLK_CFG_UNIX_EN == DEF_ENABLED) || \
+     (CLK_CFG_NTP_EN  == DEF_ENABLED))
+    CPU_CHAR       ts_str[DEF_INT_32U_NBR_DIG_MAX + 1];
+#endif
+    CPU_INT16S     ret_val                             = 0u;
+    CPU_INT16S     byte_out_cnt                        = 0u;
+    CLK_CMD_ARG    cmd_arg;
+    CLK_DATE_TIME  date_time;
+    CPU_BOOLEAN    success;
+    CLK_CMD_ERR    err;
+
+
+    cmd_arg = ClkCmd_CmdArgParse(argc,
+                                 p_argv,
+                                 &err);
+
+    switch (err) {
+        case CLK_CMD_ERR_CMD_ARG_NO_ARGS:
+        case CLK_CMD_ERR_NONE:
+             break;
+
+
+        case CLK_CMD_ERR_CMD_ARG_INVALID:
+             ret_val = ClkCmd_OutputError((CPU_CHAR *)CLK_CMD_OUTPUT_ERR_CMD_ARG_INVALID,
+                                          out_fnct,
+                                          p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+             goto exit_ok;
+
+
+        case CLK_CMD_ERR_HELP:
+        default:
+             ret_val = ClkCmd_OutputMsg(CLK_CMD_HELP_GET,
+                                        DEF_YES,
+                                        DEF_YES,
+                                        DEF_NO,
+                                        out_fnct,
+                                        p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+
+             ret_val = ClkCmd_OutputMsg(CLK_CMD_HELP_FORMAT,
+                                        DEF_YES,
+                                        DEF_YES,
+                                        DEF_NO,
+                                        out_fnct,
+                                        p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+             goto exit_ok;
+    }
+
+    switch(cmd_arg.TimeType){
+        case CLK_CMD_TIME_TYPE_NONE:
+        case CLK_CMD_TIME_TYPE_DATETIME:
+             success = Clk_GetDateTime(&date_time);
+             if(success == DEF_FAIL) {
+                 goto date_time_invalid;
+             }
+
+#if (CLK_CFG_STR_CONV_EN == DEF_ENABLED)
+             success = Clk_DateTimeToStr(&date_time,
+                                         CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS_UTC,
+                                         date_time_str,
+                                         CLK_STR_FMT_MAX_LEN);
+             if(success == DEF_FAIL) {
+                 goto date_time_invalid;
+             }
+
+             ret_val = ClkCmd_OutputMsg(date_time_str,
+                                        DEF_YES,
+                                        DEF_YES,
+                                        DEF_NO,
+                                        out_fnct,
+                                        p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+             break;
+#else
+             goto conv_not_enabled;
+#endif
+
+#if  (CLK_CFG_NTP_EN == DEF_ENABLED)
+        case CLK_CMD_TIME_TYPE_NTP:
+             success = Clk_GetTS_NTP(&ts_ntp_sec);
+             if(success == DEF_FAIL) {
+                 goto date_time_invalid;
+             }
+
+             (void)Str_FmtNbr_Int32U(ts_ntp_sec,
+                                     DEF_INT_32U_NBR_DIG_MAX,
+                                     10u,
+                                     '\0',
+                                     DEF_NO,
+                                     DEF_YES ,
+                                     ts_str);
+
+             ret_val = ClkCmd_OutputMsg(ts_str,
+                                        DEF_YES,
+                                        DEF_YES,
+                                        DEF_NO,
+                                        out_fnct,
+                                        p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+             break;
+#endif
+
+#if  (CLK_CFG_UNIX_EN == DEF_ENABLED)
+        case CLK_CMD_TIME_TYPE_UNIX:
+             success = Clk_GetTS_Unix(&ts_unix_sec);
+             if(success == DEF_FAIL) {
+                 goto date_time_invalid;
+             }
+
+            (void)Str_FmtNbr_Int32U(ts_unix_sec,
+                                    DEF_INT_32U_NBR_DIG_MAX,
+                                    10u,
+                                    '\0',
+                                    DEF_NO,
+                                    DEF_YES,
+                                    ts_str);
+
+             ret_val = ClkCmd_OutputMsg(ts_str,
+                                        DEF_YES,
+                                        DEF_YES,
+                                        DEF_NO,
+                                        out_fnct,
+                                        p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+             break;
+#endif
+
+        default:
+             ret_val = ClkCmd_OutputError((CPU_CHAR *)CLK_CMD_OUTPUT_ERR_CMD_ARG_INVALID,
+                                          out_fnct,
+                                          p_cmd_param);
+
+             CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+    }
+    goto exit_ok;
+
+#if  (CLK_CFG_STR_CONV_EN == DEF_DISABLED)
+conv_not_enabled:
+        ret_val = ClkCmd_OutputError((CPU_CHAR *)CLK_CMD_OUTPUT_ERR_CONV_DISABLED,
+                                     out_fnct,
+                                     p_cmd_param);
+
+        CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+        goto exit_ok;
+#endif
+
+date_time_invalid:
+    ret_val = ClkCmd_OutputError((CPU_CHAR *)CLK_CMD_OUTPUT_ERR_CMD_INTERNAL_ERR,
+                                 out_fnct,
+                                 p_cmd_param);
+
+    CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+    goto exit_ok;
+
+exit_ok:
+    ret_val = byte_out_cnt;
+
+
+exit_fail:
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        ClkCmd_CmdArgParse()
+*
+* Description : Parse and validate the argument for a clock test command.
+*
+* Argument(s) : argc    Count of the arguments supplied.
+*
+*               p_argv  Array of pointers to the strings which are those arguments.
+*
+*               p_err   Ppointer to an error code which will be returned to your application:
+*
+*                       CLK_CMD_ERR_NONE                        No error
+*
+*                       CLK_CMD_ERR_PARSER_ARG_VALUE_INVALID    Invalid arguments with the command
+*                       CLK_CMD_ERR_CMD_ARG_INVALID             Too much arguments
+*
+* Return(s)   : CLK_CMD_ARG data structure filled with command arguments data
+*
+* Caller(s)   : ClkCmd_Get(),
+*               ClkCmd_Set().
+*
+* Note(s)     : Expected command line:
+*
+*               clk_set
+*               clk_get
+*********************************************************************************************************
+*/
+
+static  CLK_CMD_ARG  ClkCmd_CmdArgParse (CPU_INT16U    argc,
+                                         CPU_CHAR     *p_argv[],
+                                         CLK_CMD_ERR  *p_err)
+{
+    CLK_CMD_ARG  cmd_args;
+    CPU_INT16U   i;
+    CPU_INT16U   arg_caught = 0u;
+
+
+    cmd_args.TimeType  = CLK_CMD_TIME_TYPE_NONE;
+    cmd_args.DatePtr   = DEF_NULL;
+    cmd_args.TimePtr   = DEF_NULL;
+    cmd_args.OffsetPtr = DEF_NULL;
+
+    if (argc == 1) {
+       *p_err = CLK_CMD_ERR_CMD_ARG_NO_ARGS;
+        goto exit;
+    }
+
+    for (i = 1u; i < argc; i++) {
+        if (*p_argv[i] == CLK_CMD_ARG_BEGIN) {
+            if (*(p_argv[i] + 1) == CLK_CMD_ARG_BEGIN) {        /* --option type argument.                              */
+                if (Str_Cmp(p_argv[i] + 2, CLK_CMD_FORMAT_DATETIME) == 0) {
+                    cmd_args.TimeType = CLK_CMD_TIME_TYPE_DATETIME;
+                } else if (Str_Cmp(p_argv[i] + 2, CLK_CMD_FORMAT_NTP) == 0) {
+                    cmd_args.TimeType = CLK_CMD_TIME_TYPE_NTP;
+                } else if (Str_Cmp(p_argv[i] + 2, CLK_CMD_FORMAT_UNIX) == 0) {
+                    cmd_args.TimeType = CLK_CMD_TIME_TYPE_UNIX;
+                } else if (Str_Cmp(p_argv[i] + 2, CLK_CMD_HELP) == 0) {
+                   *p_err = CLK_CMD_ERR_HELP;
+                    goto exit;
+                } else {
+                   *p_err = CLK_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+                    goto exit;
+                }
+            } else {                                            /* -o type argument.                                    */
+                if (Str_Cmp(p_argv[i] + 1, CLK_CMD_FORMAT_DATETIME_SHORT) == 0) {
+                    cmd_args.TimeType = CLK_CMD_TIME_TYPE_DATETIME;
+                } else if (Str_Cmp(p_argv[i] + 1, CLK_CMD_FORMAT_NTP_SHORT) == 0) {
+                    cmd_args.TimeType = CLK_CMD_TIME_TYPE_NTP;
+                } else if (Str_Cmp(p_argv[i] + 1, CLK_CMD_FORMAT_UNIX_SHORT) == 0) {
+                    cmd_args.TimeType = CLK_CMD_TIME_TYPE_UNIX;
+                } else if (Str_Cmp(p_argv[i] + 1, CLK_CMD_HELP_SHORT) == 0) {
+                   *p_err = CLK_CMD_ERR_HELP;
+                    goto exit;
+                } else {
+                   *p_err = CLK_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+                    goto exit;
+                }
+            }
+        } else {
+            switch (arg_caught) {
+                case 0:
+                     cmd_args.DatePtr   = p_argv[i];
+                     break;
+
+
+                case 1:
+                     cmd_args.TimePtr   = p_argv[i];
+                     break;
+
+
+                case 2:
+                     cmd_args.OffsetPtr = p_argv[i];
+                     break;
+
+
+                default:
+                     break;
+            }
+
+            arg_caught++;
+        }
+    }
+
+   *p_err = CLK_CMD_ERR_NONE;
+
+exit:
+    return (cmd_args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        ClkCmd_OutputCmdTbl()
+*
+* Description : Format and output the clock test command table
+*
+* Argument(s) : p_cmd_tbl       is the pointer on the pointer table
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : ClkCmd_Help().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  ClkCmd_OutputCmdTbl (SHELL_CMD        *p_cmd_tbl,
+                                         SHELL_OUT_FNCT    out_fnct,
+                                         SHELL_CMD_PARAM  *p_cmd_param)
+{
+    SHELL_CMD   *p_shell_cmd;
+    CPU_INT16S   ret_val;
+
+
+    ret_val = ClkCmd_OutputMsg(CLK_CMD_OUTPUT_CMD_LIST,
+                               DEF_YES,
+                               DEF_YES,
+                               DEF_NO,
+                               out_fnct,
+                               p_cmd_param);
+    switch (ret_val) {
+        case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+        case SHELL_OUT_ERR:
+             return (SHELL_EXEC_ERR);
+
+
+        default:
+             break;
+    }
+
+    p_shell_cmd = p_cmd_tbl;
+
+    while (p_shell_cmd->Fnct != 0) {
+        ret_val = ClkCmd_OutputMsg(p_shell_cmd->Name,
+                                   DEF_NO,
+                                   DEF_YES,
+                                   DEF_YES,
+                                   out_fnct,
+                                   p_cmd_param);
+        switch (ret_val) {
+            case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+            case SHELL_OUT_ERR:
+                 return (SHELL_EXEC_ERR);
+
+
+            default:
+                 break;
+        }
+        p_shell_cmd++;
+    }
+
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         ClkCmd_OutputError()
+*
+* Description : Outputs error message.
+*
+* Argument(s) : p_error         Pointer to a string describing the error.
+*
+*               out_fnct        Callback to a respond to the requester.
+*
+*               p_cmd_param     Pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors:
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise.
+*
+* Caller(s)   : ClkCmd_OutputCmdArgInvalid(),
+*               ClkCmd_OutputNotImplemented().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  ClkCmd_OutputError (CPU_CHAR         *p_error,
+                                        SHELL_OUT_FNCT    out_fnct,
+                                        SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S  ret_val;
+    CPU_INT16S  byte_out_cnt = 0;
+
+
+    ret_val = ClkCmd_OutputMsg(CLK_CMD_OUTPUT_ERR,
+                               DEF_YES,
+                               DEF_NO,
+                               DEF_NO,
+                               out_fnct,
+                               p_cmd_param);
+
+    CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+
+    ret_val = ClkCmd_OutputMsg(p_error,
+                               DEF_NO,
+                               DEF_YES,
+                               DEF_NO,
+                               out_fnct,
+                               p_cmd_param);
+
+    CLK_CMD_OUT_MSG_CHK(ret_val, byte_out_cnt, exit_fail);
+
+    ret_val = byte_out_cnt;
+
+
+exit_fail:
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          ClkCmd_OutputMsg()
+*
+* Description : Format and output a message.
+*
+* Argument(s) : p_msg           Pointer of char on the string to format and output.
+*
+*               new_line_start  If DEF_YES, will add a new line character at the start.
+*
+*               new_line_end    If DEF_YES, will add a new line character at the end.
+*
+*               tab_start       If DEF_YES, will add a tab character at the start.
+*
+*               out_fnct        Callback to a respond to the requester.
+*
+*               p_cmd_param     Pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed,
+*
+*               SHELL_OUT_ERR,                                  otherwise.
+*
+* Caller(s)   : ClkCmd_Set(),
+*               ClkCmd_Get(),
+*               ClkCmd_OutputError(),
+*               ClkCmd_OutputSuccess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  ClkCmd_OutputMsg (const  CPU_CHAR         *p_msg,
+                                             CPU_BOOLEAN       new_line_start,
+                                             CPU_BOOLEAN       new_line_end,
+                                             CPU_BOOLEAN       tab_start,
+                                             SHELL_OUT_FNCT    out_fnct,
+                                             SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16U  output_len;
+    CPU_INT16S  output;
+    CPU_INT16S  byte_out_cnt = 0;
+
+
+    if (new_line_start == DEF_YES) {
+        output = out_fnct((CPU_CHAR *)STR_NEW_LINE,
+                          STR_NEW_LINE_LEN,
+                          p_cmd_param->pout_opt);
+
+        CLK_CMD_OUT_MSG_CHK(output, byte_out_cnt, exit_fail);
+    }
+
+    if (tab_start == DEF_YES) {
+        output = out_fnct((CPU_CHAR *)CLK_CMD_OUTPUT_TABULATION,
+                          1,
+                          p_cmd_param->pout_opt);
+
+        CLK_CMD_OUT_MSG_CHK(output, byte_out_cnt, exit_fail);
+    }
+
+    output_len = (CPU_INT16U)Str_Len(p_msg);
+    output     = out_fnct((CPU_CHAR *)p_msg,
+                          output_len,
+                          p_cmd_param->pout_opt);
+
+    CLK_CMD_OUT_MSG_CHK(output, byte_out_cnt, exit_fail);
+
+    if (new_line_end == DEF_YES) {
+        output = out_fnct((CPU_CHAR *)STR_NEW_LINE,
+                          STR_NEW_LINE_LEN,
+                          p_cmd_param->pout_opt);
+
+        CLK_CMD_OUT_MSG_CHK(output, byte_out_cnt, exit_fail);
+    }
+
+    output = byte_out_cnt;
+
+exit_fail:
+    return (output);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-Clk/Cmd/clk_cmd.h b/src/ucos_v1_42/micrium_source/uC-Clk/Cmd/clk_cmd.h
new file mode 100644
index 0000000..3264edc
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Clk/Cmd/clk_cmd.h
@@ -0,0 +1,101 @@
+/*
+*********************************************************************************************************
+*                                               uC/Clk
+*                                             Clock module
+*
+*                      (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*          All rights reserved.  Protected by international copyright laws.
+*
+*          uC/Clk is provided in source form to registered licensees ONLY.  It is
+*          illegal to distribute this source code to any third party unless you receive
+*          written permission by an authorized Micrium representative.  Knowledge of
+*          the source code may NOT be used to develop a similar product.
+*
+*          Please help us continue to provide the Embedded community with the finest
+*          software available.  Your honesty is greatly appreciated.
+*
+*          You can find our product's user manual, API reference, release notes and
+*          more information at: https://doc.micrium.com
+*
+*          You can contact us at: www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          CLOCK / CALENDAR
+*
+* Filename      : clk_cmd.h
+* Version       : V3.10.00
+* Programmer(s) : AL
+*                 AOP
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/CPU    V1.30
+*                     (b) uC/OS-II  V2.90 or
+*                         uC/OS-III V3.03
+*                     (c) uC/Shell  V1.03
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  CLK_CMD_MODULE_PRESENT
+#define  CLK_CMD_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+typedef enum clk_cmd_err {
+    CLK_CMD_ERR_NONE                       =   0,               /* No errors.                                           */
+    CLK_CMD_ERR_HELP                       =   1,               /* Help requested by user.                              */
+
+    CLK_CMD_ERR_MODULE_INIT                =  10,
+    CLK_CMD_ERR_SHELL_INIT                 =  11,               /* Command table not added to uC-Shell.                 */
+    CLK_CMD_ERR_SIGNALTASK_INIT            =  12,
+
+    CLK_CMD_ERR_CMD_ARG_INVALID            =  30,
+    CLK_CMD_ERR_CMD_ARG_NOT_IMPLEMENTED    =  31,
+    CLK_CMD_ERR_CMD_ARG_NO_ARGS            =  32,
+
+    CLK_CMD_ERR_PARSER_ARG_VALUE_INVALID   =  40
+
+} CLK_CMD_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  ClkCmd_Init(CLK_CMD_ERR  *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of network test module include.                  */
diff --git a/src/ucos_v1_42/micrium_source/uC-Clk/Source/clk.c b/src/ucos_v1_42/micrium_source/uC-Clk/Source/clk.c
new file mode 100644
index 0000000..9cda5be
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Clk/Source/clk.c
@@ -0,0 +1,4077 @@
+/*
+*********************************************************************************************************
+*                                               uC/Clk
+*                                          Clock / Calendar
+*
+*                      (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*          All rights reserved.  Protected by international copyright laws.
+*
+*          uC/Clk is provided in source form to registered licensees ONLY.  It is
+*          illegal to distribute this source code to any third party unless you receive
+*          written permission by an authorized Micrium representative.  Knowledge of
+*          the source code may NOT be used to develop a similar product.
+*
+*          Please help us continue to provide the Embedded community with the finest
+*          software available.  Your honesty is greatly appreciated.
+*
+*          You can find our product's user manual, API reference, release notes and
+*          more information at: https://doc.micrium.com
+*
+*          You can contact us at: www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          CLOCK / CALENDAR
+*
+* Filename      : clk.c
+* Version       : V3.10.00
+* Programmer(s) : JDH
+*                 COP
+*                 JJL
+*                 SR
+*                 AA
+*                 AL
+*                 AOP
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included
+*                     in the project build :
+*
+*                     (a) uC/CPU    V1.30
+*                     (b) uC/LIB    V1.38
+*                     (c) uC/Common V1.00
+*
+*                 (2) (a) Clock module is based on Coordinated Universal Time (UTC) and supports the
+*                         following features :
+*
+*                         (1) Time zones
+*                         (2) Leap years
+*                         (3) Leap seconds
+*
+*                     (b) Clock module does NOT support Daylight (Savings) Time. If you want to handle
+*                         Daylight Time in your application, set time zone offset accordingly.
+*
+*                     (c) Timestamp and Coordinated Universal Time (UTC) related links :
+*
+*                         (1) http://www.timeanddate.com/time/aboututc.html
+*                         (2) http://www.allanstime.com/Publications/DWA/Science_Timekeeping/TheScienceOfTimekeeping.pdf
+*                         (3) http://www.cl.cam.ac.uk/~mgk25/time/metrologia-leapsecond.pdf
+*                         (4) http://www.navcen.uscg.gov/pdf/cgsicMeetings/45/29a%20UTCLeapSecond.ppt
+*
+*
+*                 (3) (a) Clock module implements a software-maintained clock/calendar when 'CLK_CFG_EXT_EN'
+*                         is disabled (see Note #4).
+*
+*                     (b) (1) Software-maintained clock/calendar is based on a periodic delay or timeout
+*                             when 'CLK_CFG_SIGNAL_EN' is disabled.
+*
+*                         (2) Software-maintained clock/calendar is based on a periodic signal or timer
+*                             when 'CLK_CFG_SIGNAL_EN' is enabled.
+*
+*                     (c) When software-maintained clock is enabled, Clock module's OS-dependent files and
+*                         respective OS-application configuration MUST be included in the build.
+*
+*
+*                 (4) (a) Clock module initializes, gets and sets its timestamp via an External timestamp
+*                         when 'CLK_CFG_EXT_EN' is enabled.
+*
+*                     (b) (1) External timestamp can be maintained either in :
+*
+*                             (A) Hardware (e.g. via a hardware clock chip)
+*                             (B) From another application (e.g. SNTPc)
+*
+*                         (2) External timestamp is accessed by application/BSP functions defined by the
+*                             developer that MUST follow the functional requirements of the particular
+*                             hardware/application(s).
+*
+*                             See also 'net.h  Clk_ExtTS_Init()',
+*                                      'net.h  Clk_ExtTS_Get()',
+*                                    & 'net.h  Clk_ExtTS_Set()'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    CLK_MODULE
+#include  "clk.h"
+
+#if (CLK_CFG_EXT_EN == DEF_DISABLED)
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_EXT_EN == DEF_DISABLED)
+#if (CLK_CFG_SIGNAL_EN == DEF_ENABLED)
+#define  CLK_KAL_SIGNAL_NAME               "Clk Signal"
+#endif
+
+#define  CLK_KAL_TASK_NAME                 "Real time Clk"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL DATA TYPE
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                CLOCK PERIODIC TICK COUNTER DATA TYPE
+*********************************************************************************************************
+*/
+
+#if ((CLK_CFG_EXT_EN    != DEF_ENABLED) &&  \
+     (CLK_CFG_SIGNAL_EN == DEF_ENABLED))
+typedef  CPU_INT32U  CLK_TICK_CTR;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CLOCK DATA DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  clk_data {
+#if  (CLK_CFG_EXT_EN    != DEF_ENABLED)
+    CLK_TS_SEC       Clk_TS_UTC_sec;
+#if  (CLK_CFG_SIGNAL_EN == DEF_ENABLED)
+    CLK_TICK_CTR     Clk_TickCtr;
+#endif
+#endif
+#if ((CLK_CFG_EXT_EN    == DEF_DISABLED) &&  \
+     (CLK_CFG_SIGNAL_EN == DEF_ENABLED))
+    KAL_SEM_HANDLE   Clk_SignalHandle;
+#endif
+
+#if (CLK_CFG_EXT_EN == DEF_DISABLED)
+    KAL_TASK_HANDLE  Clk_TaskHandle;
+#endif
+    CLK_TZ_SEC       Clk_TZ_sec;
+} CLK_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+static  const  CLK_DAY  Clk_DaysInYr[2u] = {
+    DEF_TIME_NBR_DAY_PER_YR, DEF_TIME_NBR_DAY_PER_YR_LEAP
+};
+
+static  const  CLK_DAY  Clk_DaysInMonth[2u][CLK_MONTH_PER_YR] = {
+  /* Jan  Feb  Mar  Apr  May  Jun  Jul  Aug  Sep  Oct  Nov  Dec */
+   { 31u, 28u, 31u, 30u, 31u, 30u, 31u, 31u, 30u, 31u, 30u, 31u },
+   { 31u, 29u, 31u, 30u, 31u, 30u, 31u, 31u, 30u, 31u, 30u, 31u }
+};
+
+#if (CLK_CFG_STR_CONV_EN == DEF_ENABLED)
+static  const  CPU_CHAR *  const  Clk_StrMonth[CLK_MONTH_PER_YR] = {
+                    /*           1 */
+                    /* 01234567890 */
+   (const  CPU_CHAR *)"January",
+   (const  CPU_CHAR *)"February",
+   (const  CPU_CHAR *)"March",
+   (const  CPU_CHAR *)"April",
+   (const  CPU_CHAR *)"May",
+   (const  CPU_CHAR *)"June",
+   (const  CPU_CHAR *)"July",
+   (const  CPU_CHAR *)"August",
+   (const  CPU_CHAR *)"September",
+   (const  CPU_CHAR *)"October",
+   (const  CPU_CHAR *)"November",
+   (const  CPU_CHAR *)"December"
+};
+
+static  const  CPU_CHAR *  const  Clk_StrDayOfWk[DEF_TIME_NBR_DAY_PER_WK] = {
+                    /*           1 */
+                    /* 01234567890 */
+   (const  CPU_CHAR *)"Sunday",
+   (const  CPU_CHAR *)"Monday",
+   (const  CPU_CHAR *)"Tuesday",
+   (const  CPU_CHAR *)"Wednesday",
+   (const  CPU_CHAR *)"Thursday",
+   (const  CPU_CHAR *)"Friday",
+   (const  CPU_CHAR *)"Saturday"
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  CLK_DATA     *Clk_Ptr            = DEF_NULL;
+
+static  CLK_YR        Clk_CacheYr;
+
+static  CLK_MONTH     Clk_CacheMonth;
+
+static  CLK_NBR_DAYS  Clk_CacheYrDays;
+
+static  CLK_DAY       Clk_CacheMonthDays;
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTIONS PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_IsLeapYr              (CLK_YR          yr);
+
+
+static  CPU_BOOLEAN  Clk_IsDateValid           (CLK_YR          yr,
+                                                CLK_MONTH       month,
+                                                CLK_DAY         day,
+                                                CLK_YR          yr_start,
+                                                CLK_YR          yr_end);
+
+static  CPU_BOOLEAN  Clk_IsDayOfYrValid        (CLK_YR          yr,
+                                                CLK_DAY         day_of_yr);
+
+static  CPU_BOOLEAN  Clk_IsDayOfWkValid        (CLK_DAY         day_of_wk);
+
+
+static  CPU_BOOLEAN  Clk_IsTimeValid           (CLK_HR          hr,
+                                                CLK_MONTH       min,
+                                                CLK_DAY         sec);
+
+static  CPU_BOOLEAN  Clk_IsTZValid             (CLK_TZ_SEC      tz_sec);
+
+
+static  CPU_BOOLEAN  Clk_IsDateTimeValidHandler(CLK_DATE_TIME  *p_date_time,
+                                                CLK_YR          yr_start,
+                                                CLK_YR          yr_end);
+
+static  CLK_DAY      Clk_GetDayOfYrHandler     (CLK_YR          yr,
+                                                CLK_MONTH       month,
+                                                CLK_DAY         day);
+
+static  CLK_DAY      Clk_GetDayOfWkHandler     (CLK_YR          yr,
+                                                CLK_MONTH       month,
+                                                CLK_DAY         day);
+
+static  void         Clk_SetTZ_Handler         (CLK_TZ_SEC      tz_sec);
+
+
+static  CPU_BOOLEAN  Clk_TS_ToDateTimeHandler  (CLK_TS_SEC      ts_sec,
+                                                CLK_TZ_SEC      tz_sec,
+                                                CLK_DATE_TIME  *p_date_time,
+                                                CLK_YR          yr_start,
+                                                CLK_YR          yr_end);
+
+static  CPU_BOOLEAN  Clk_DateTimeToTS_Handler  (CLK_TS_SEC     *p_ts_sec,
+                                                CLK_DATE_TIME  *p_date_time,
+                                                CLK_YR          yr_start);
+
+static  CPU_BOOLEAN  Clk_DateTimeMakeHandler   (CLK_DATE_TIME  *p_date_time,
+                                                CLK_YR          yr,
+                                                CLK_MONTH       month,
+                                                CLK_DAY         day,
+                                                CLK_HR          hr,
+                                                CLK_MIN         min,
+                                                CLK_SEC         sec,
+                                                CLK_TZ_SEC      tz_sec,
+                                                CLK_YR          yr_start,
+                                                CLK_YR          yr_end);
+
+
+#if (CLK_CFG_EXT_EN    == DEF_DISABLED)
+static  void         Clk_TaskHandler           (void           *p_arg);
+
+static  void         Clk_KAL_Wait              (CLK_ERR        *p_err);
+
+#if (CLK_CFG_SIGNAL_EN == DEF_ENABLED)
+static  void         Clk_KAL_Signal            (CLK_ERR        *p_err);
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             Clk_Init()
+*
+* Description : (1) Initialize Clock module :
+*
+*                   (a) Initialize clock :
+*                       (1) External timestamp, if available
+*                       (2) Clock/operating system initialization
+*
+*                   (b) Initialize Clock module variables
+*
+*
+* Argument(s) : p_task_cfg  Pointer to structure for the configuration of the clock task.
+*
+*               p_mem_seg   Memory segment from which internal data will be allocated. If DEF_NULL,
+*                           will be allocated from the global heap.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               CLK_ERR_NONE                    Clock successfully initialized.
+*
+*                               CLK_ERR_NOT_NULL_PTR            p_task_cfg argument should be null if
+*                               --------------------            CLK_CFG_EXT_EN is DEF_ENABLED
+*                               CLK_ERR_ALLOC                   Failed to allocate data.
+*
+*                                                               -------- RETURNED BY Clk_KAL_Init() : ---------
+*                               CLK_OS_ERR_INIT_SIGNAL          Clock OS signal  NOT successfully initialized.
+*                               CLK_OS_ERR_INIT_TASK            Clock OS task    NOT successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Your Product's Application.
+*
+*               This function is a Clock module initialization function & MAY be called by application/
+*               initialization function(s).
+*
+* Note(s)     :  (1) 'p_task_cfg' needs be NULL if CLK_CFG_EXT_EN is set to DEF_ENABLED
+*********************************************************************************************************
+*/
+
+void  Clk_Init (const  CLK_TASK_CFG  *p_task_cfg,
+                       MEM_SEG       *p_mem_seg,
+                       CLK_ERR       *p_err)
+{
+#if (CLK_CFG_EXT_EN == DEF_DISABLED)
+    KAL_ERR       err_kal;
+    CPU_BOOLEAN   kal_feat_is_ok;
+#endif
+    CLK_DATA     *p_temp_clk_data;
+    LIB_ERR       err_lib;
+    CPU_SR_ALLOC();
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE ERR PTR ----------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (Clk_Ptr != DEF_NULL) {                                  /* Make sure Clk module is init once.                   */
+        CPU_CRITICAL_EXIT();
+       *p_err = CLK_ERR_NONE;
+        return;
+    }
+    CPU_CRITICAL_EXIT();
+
+
+    p_temp_clk_data = (CLK_DATA *)Mem_SegAlloc("Clk - Data",    /* Allocate data needed by Clk.                         */
+                                               p_mem_seg,
+                                               sizeof(CLK_DATA),
+                                               &err_lib);
+
+    if ((p_temp_clk_data == DEF_NULL) ||
+        (err_lib         != LIB_MEM_ERR_NONE)) {
+       *p_err = CLK_ERR_ALLOC;
+        return;
+    }
+
+#if (CLK_CFG_EXT_EN     == DEF_ENABLED)                         /* ------------------- INIT EXT TS -------------------- */
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* --------------- VALIDATE TASK CFG PTR -------------- */
+    if (p_task_cfg != DEF_NULL) {                               /* Validate task cfg ptr.                               */
+       *p_err = CLK_ERR_NOT_NULL_PTR;
+        return;
+    }
+#else
+    (void)p_task_cfg;                                           /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+    Clk_ExtTS_Init();
+
+#else                                                           /* ------------------- CLK/OS INIT -------------------- */
+    KAL_Init(DEF_NULL, &err_kal);
+    if (err_kal != KAL_ERR_NONE) {
+       *p_err = CLK_OS_ERR_INIT_TASK;
+        return;
+    }
+
+    kal_feat_is_ok  = KAL_FeatureQuery(KAL_FEATURE_TASK_CREATE, KAL_OPT_NONE);
+#if (CLK_CFG_SIGNAL_EN == DEF_ENABLED)
+    kal_feat_is_ok &= KAL_FeatureQuery(KAL_FEATURE_SEM_CREATE,  KAL_OPT_NONE);
+    kal_feat_is_ok &= KAL_FeatureQuery(KAL_FEATURE_SEM_POST,    KAL_OPT_NONE);
+    kal_feat_is_ok &= KAL_FeatureQuery(KAL_FEATURE_SEM_PEND,    KAL_OPT_NONE);
+#else
+    kal_feat_is_ok &= KAL_FeatureQuery(KAL_FEATURE_DLY,         KAL_OPT_DLY_NONE);
+#endif
+
+    if (kal_feat_is_ok != DEF_OK) {
+       *p_err = CLK_OS_ERR_INIT_TASK;
+        return;
+    }
+
+    if(p_task_cfg == DEF_NULL){
+        *p_err = CLK_OS_ERR_INIT_TASK;
+        return;
+    }
+
+
+#if (CLK_CFG_SIGNAL_EN == DEF_ENABLED)                          /* ----------------- CREATE CLOCK SIGNAL ----------------- */
+                                                                /* Create counting semaphore to signal each elapsed second.*/
+    p_temp_clk_data->Clk_SignalHandle = KAL_SemCreate((const CPU_CHAR *)CLK_KAL_SIGNAL_NAME,
+                                                      DEF_NULL,
+                                                      &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_MEM_ALLOC:
+        case KAL_ERR_ISR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = CLK_OS_ERR_INIT_SIGNAL;
+             return;
+    }
+#endif
+                                                                /* ----------------- INITIALIZE CLK TASK ----------------- */
+    p_temp_clk_data->Clk_TaskHandle = KAL_TaskAlloc(CLK_KAL_TASK_NAME,
+                                                    p_task_cfg->StkPtr,
+                                                    p_task_cfg->StkSizeBytes,
+                                                    DEF_NULL,
+                                                    &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_MEM_ALLOC:
+        default:
+            *p_err = CLK_OS_ERR_INIT_TASK;
+             return;
+    }
+#endif
+
+                                                                /* ---------------- INIT CLK VARIABLES ---------------- */
+#if (CLK_CFG_EXT_EN    == DEF_DISABLED)
+    p_temp_clk_data->Clk_TS_UTC_sec = CLK_TS_SEC_NONE;          /* Clk epoch = 2000-01-01 00:00:00 UTC                  */
+#if (CLK_CFG_SIGNAL_EN == DEF_ENABLED)
+    p_temp_clk_data->Clk_TickCtr    = CLK_TICK_NONE;
+#endif
+#endif
+    p_temp_clk_data->Clk_TZ_sec     = CLK_CFG_TZ_DFLT_SEC;      /* Clk TZ = UTC offset                                  */
+    Clk_CacheMonth                  = CLK_MONTH_NONE;
+    Clk_CacheMonthDays              = CLK_DAY_NONE;
+    Clk_CacheYr                     = CLK_YR_NONE;
+    Clk_CacheYrDays                 = CLK_DAY_NONE;
+
+    CPU_CRITICAL_ENTER();
+    Clk_Ptr = p_temp_clk_data;
+    CPU_CRITICAL_EXIT();
+
+#if (CLK_CFG_EXT_EN == DEF_DISABLED)
+    KAL_TaskCreate(Clk_Ptr->Clk_TaskHandle,
+                   Clk_TaskHandler,
+                   DEF_NULL,
+                   (CPU_INT08U)p_task_cfg->Prio,
+                   DEF_NULL,
+                  &err_kal);
+
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_ISR:
+        case KAL_ERR_OS:
+        default:
+            *p_err = CLK_OS_ERR_INIT_TASK;
+             return;
+    }
+#endif
+
+   *p_err = CLK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Clk_SignalClk()
+*
+* Description : (1) Increment the clock tick counter :
+*
+*                   (a) Increment the clock tick counter
+*                   (b) Signal the clock task when one second has elapsed
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               CLK_ERR_NONE                    Clock successfully signaled.
+*                               CLK_ERR_NOT_INIT                Clock NOT initialized.
+*
+*                                                               - RETURNED BY Clk_KAL_Signal() : -
+*                               CLK_KAL_ERR_SIGNAL              Clock NOT successfully signaled.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module periodic signal function & MAY be called by application/
+*               BSP function(s).
+*
+* Note(s)     : (1) CLK_CFG_SIGNAL_FREQ_HZ must be set to the number of times Clk_SignalClk() will be
+*                   called every second.
+*
+*               (2) 'Clk_TickCtr' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+#if ((CLK_CFG_EXT_EN    != DEF_ENABLED) &&  \
+     (CLK_CFG_SIGNAL_EN == DEF_ENABLED))
+void  Clk_SignalClk (CLK_ERR  *p_err)
+{
+    CPU_BOOLEAN  signal;
+    CPU_SR_ALLOC();
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ------------------- VALIDATE PTRS ------------------ */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(;);
+    }
+
+    CPU_CRITICAL_ENTER();
+    if (Clk_Ptr == DEF_NULL) {                                  /* Validate Clk data ptr.                               */
+        CPU_CRITICAL_EXIT();
+       *p_err = CLK_ERR_NOT_INIT;
+        return;
+    }
+    CPU_CRITICAL_EXIT();
+#endif
+
+    signal = DEF_NO;
+    CPU_CRITICAL_ENTER();                                       /* See Note #2.                                         */
+    Clk_Ptr->Clk_TickCtr++;
+    if (Clk_Ptr->Clk_TickCtr >= CLK_CFG_SIGNAL_FREQ_HZ) {
+        Clk_Ptr->Clk_TickCtr -= CLK_CFG_SIGNAL_FREQ_HZ;         /* See Note #1.                                         */
+        signal                = DEF_YES;
+    }
+    CPU_CRITICAL_EXIT();
+
+    if (signal == DEF_YES) {
+        Clk_KAL_Signal(p_err);
+        if (*p_err != CLK_OS_ERR_NONE) {
+            return;
+        }
+    }
+
+   *p_err = CLK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             Clk_GetTS()
+*
+* Description : Get current Clock timestamp.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Current timestamp (in seconds, UTC+00).
+*
+* Caller(s)   : Clk_GetTS_NTP(),
+*               Clk_GetTS_Unix(),
+*               Clk_GetDateTime(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) Internal Clock timestamp ('Clk_TS_UTC_sec') SHOULD be set for UTC+00. Thus any
+*                   local time zone offset MUST be applied after calling Clk_GetTS().
+*
+*               (2) 'Clk_TS_UTC_sec' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CLK_TS_SEC  Clk_GetTS (void)
+{
+    CLK_TS_SEC  ts_sec;
+#if (CLK_CFG_EXT_EN != DEF_ENABLED)
+    CPU_SR_ALLOC();
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ------------------- VALIDATE PTR ------------------- */
+    CPU_CRITICAL_ENTER();
+    if (Clk_Ptr == DEF_NULL) {                                  /* Validate Clk data ptr.                               */
+        CPU_CRITICAL_EXIT();
+        CPU_SW_EXCEPTION(0);
+    }
+    CPU_CRITICAL_EXIT();
+#endif
+                                                                /* ---------------------- GET TS ---------------------- */
+    CPU_CRITICAL_ENTER();
+    ts_sec = Clk_Ptr->Clk_TS_UTC_sec;
+    CPU_CRITICAL_EXIT();
+#else
+    ts_sec = Clk_ExtTS_Get();
+#endif
+
+    return (ts_sec);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Clk_SetTS()
+*
+* Description : Set Clock timestamp.
+*
+* Argument(s) : ts_sec      Current timestamp to set (in seconds, UTC+00).
+*
+* Return(s)   : DEF_OK,   if timestamp is successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Clk_SetTS_NTP(),
+*               Clk_SetTS_Unix(),
+*               Clk_SetDateTime(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) Internal Clock timestamp ('Clk_TS_UTC_sec') SHOULD be set for UTC+00 and should
+*                   NOT include any local time zone offset.
+*
+*               (2) 'Clk_TS_UTC_sec' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Clk_SetTS (CLK_TS_SEC  ts_sec)
+{
+     CPU_BOOLEAN  valid;
+#if (CLK_CFG_EXT_EN != DEF_ENABLED)
+    CPU_SR_ALLOC();
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ------------------- VALIDATE PTR ------------------- */
+    CPU_CRITICAL_ENTER();
+    if (Clk_Ptr == DEF_NULL) {                                  /* Validate Clk data ptr.                               */
+        CPU_CRITICAL_EXIT();
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+    CPU_CRITICAL_EXIT();
+#endif
+
+                                                                /* ---------------------- SET TS ---------------------- */
+    CPU_CRITICAL_ENTER();
+    Clk_Ptr->Clk_TS_UTC_sec = ts_sec;
+    CPU_CRITICAL_EXIT();
+
+    valid          = DEF_OK;
+#else
+    valid          = Clk_ExtTS_Set(ts_sec);
+#endif
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Clk_GetTZ()
+*
+* Description : Get Clock time zone offset.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Time zone offset (in seconds, +|- from UTC).
+*
+* Caller(s)   : Clk_GetDateTime(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                   (a) Between  +|- 12 hours (+|- 43200 seconds)
+*                   (b) Multiples of 15 minutes
+*
+*               (2) 'Clk_TZ_sec' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CLK_TZ_SEC  Clk_GetTZ (void)
+{
+    CLK_TZ_SEC  tz_sec;
+    CPU_SR_ALLOC();
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ------------------- VALIDATE PTR ------------------- */
+    CPU_CRITICAL_ENTER();
+    if (Clk_Ptr == DEF_NULL) {                                  /* Validate Clk data ptr.                               */
+        CPU_CRITICAL_EXIT();
+        CPU_SW_EXCEPTION(0);
+    }
+    CPU_CRITICAL_EXIT();
+#endif
+
+                                                                /* ---------------------- GET TZ ---------------------- */
+    CPU_CRITICAL_ENTER();
+    tz_sec = Clk_Ptr->Clk_TZ_sec;
+    CPU_CRITICAL_EXIT();
+
+    return (tz_sec);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Clk_SetTZ()
+*
+* Description : Set Clock time zone offset.
+*
+* Argument(s) : tz_sec      Time zone offset (in seconds, +|- from UTC).
+*
+* Return(s)   : DEF_OK,   if time zone is valid and set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                   (a) Between  +|- 12 hours (+|- 43200 seconds)
+*                   (b) Multiples of 15 minutes
+*
+*               (2) Time zone is not applied on the current Clock timestamp.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Clk_SetTZ (CLK_TZ_SEC  tz_sec)
+{
+    CPU_BOOLEAN  valid;
+
+                                                                /* ------------------- VALIDATE TZ -------------------- */
+    valid = Clk_IsTZValid(tz_sec);
+    if (valid != DEF_YES) {
+        return  (DEF_FAIL);
+    }
+
+                                                                /* ---------------------- SET TZ ---------------------- */
+    Clk_SetTZ_Handler(tz_sec);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_GetDateTime()
+*
+* Description : Get current Clock timestamp as a date/time structure.
+*
+* Argument(s) : p_date_time     Pointer to variable that will receive the date/time structure.
+*
+* Return(s)   : DEF_OK,   if timestamp is valid & date/time structure successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Internal Clock time zone offset ('Clk_TZ_sec') is used to calculate the
+*                   local date/time ('p_date_time') returned. Thus local date/time is returned
+*                   at UTC+TZ, where Clock time zone offset (TZ) is returned as local time zone
+*                   offset ('p_date_time->TZ_sec').
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Clk_GetDateTime (CLK_DATE_TIME  *p_date_time)
+{
+    CLK_TS_SEC   ts_sec;
+    CLK_TZ_SEC   tz_sec;
+    CPU_BOOLEAN  valid;
+
+
+#if 0                                                           /* Validated in Clk_TS_ToDateTime().                    */
+    if (p_date_time == (CLK_DATE_TIME *)0) {                    /* -------------- VALIDATE DATE/TIME PTR -------------- */
+        return (DEF_FAIL);
+    }
+#endif
+
+
+    ts_sec = Clk_GetTS();                                       /* ---------------------- GET TS ---------------------- */
+    tz_sec = Clk_GetTZ();                                       /* ---------------------- GET TZ ---------------------- */
+
+                                                                /* ------------- CONV CLK TS TO DATE/TIME ------------- */
+    valid  = Clk_TS_ToDateTime(ts_sec,
+                               tz_sec,
+                               p_date_time);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_SetDateTime()
+*
+* Description : Set Clock timestamp from a date/time structure.
+*
+* Argument(s) : p_date_time     Pointer to variable that contains the date/time structure.
+*
+* Return(s)   : DEF_OK,   if Clock date/time successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) (a) Date/time ('p_date_time') SHOULD be set to local time with correct time zone
+*                       offset ('p_date_time->TZ_sec'). Clk_SetDateTime() removes the time zone offset
+*                       from the date/time to calculate the Clock timestamp at UTC+00.
+*
+*                   (b) Internal Clock time zone offset ('Clk_TZ_sec') is set to the local time zone
+*                       offset ('p_date_time->TZ_sec').
+*
+*                   (c) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                       (1) Between  +|- 12 hours (+|- 43200 seconds)
+*                       (2) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Clk_SetDateTime (CLK_DATE_TIME  *p_date_time)
+{
+    CLK_TS_SEC   ts_sec;
+    CPU_BOOLEAN  valid;
+
+
+#if 0                                                           /* Validated in Clk_DateTimeToTS().                     */
+    if (p_date_time == (CLK_DATE_TIME *)0) {                    /* -------------- VALIDATE DATE/TIME PTR -------------- */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------- CONV DATE/TIME TO CLK TS ------------- */
+    valid = Clk_DateTimeToTS(&ts_sec, p_date_time);             /* Validates date/time & TZ (see Note #1c).             */
+    if (valid != DEF_OK) {
+        CLK_TRACE_DBG(("Date/time is not valid"));
+        return  (DEF_FAIL);
+    }
+
+                                                                /* ---------------------- SET TS ---------------------- */
+    valid = Clk_SetTS(ts_sec);                                  /* See Note #1a.                                        */
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+                                                                /* ---------------------- SET TZ ---------------------- */
+    Clk_SetTZ_Handler(p_date_time->TZ_sec);                     /* See Note #1b.                                        */
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Clk_TS_ToDateTime()
+*
+* Description : Convert Clock timestamp to date/time structure.
+*
+* Argument(s) : ts_sec          Timestamp to convert (in seconds,          UTC+00).
+*
+*               tz_sec          Time zone offset     (in seconds, +|- from UTC).
+*
+*               p_date_time     Pointer to variable that will receive the date/time structure.
+*
+* Return(s)   : DEF_OK,   if date/time structure successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Clk_GetDateTime(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) Timestamp ('ts_sec') MUST be set for UTC+00 & SHOULD NOT include the time
+*                       zone offset ('tz_sec') since Clk_TS_ToDateTime() includes the time zone
+*                       offset in its date/time calculation. Thus the time zone offset SHOULD NOT
+*                       be applied before or after calling Clk_TS_ToDateTime().
+*
+*                   (b) Time zone field of the date/time structure ('p_date_time->TZ_sec') is set
+*                       to the value of the time zone argument ('tz_sec').
+*
+*                   (c) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                       (1) Between  +|- 12 hours (+|- 43200 seconds)
+*                       (2) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Clk_TS_ToDateTime (CLK_TS_SEC      ts_sec,
+                                CLK_TZ_SEC      tz_sec,
+                                CLK_DATE_TIME  *p_date_time)
+{
+    CPU_BOOLEAN  valid;
+
+                                                                /* ------------- CONV CLK TS TO DATE/TIME ------------- */
+    CLK_TRACE_DBG(("\r\nConvert TS to Date/time:\r\n"
+                   "    TS to convert= %u\n\r\n",
+                   (unsigned int)ts_sec));
+
+    valid = Clk_TS_ToDateTimeHandler(ts_sec,
+                                     tz_sec,
+                                     p_date_time,
+                                     CLK_EPOCH_YR_START,
+                                     CLK_EPOCH_YR_END);
+    if (valid != DEF_OK) {
+        CLK_TRACE_DBG(("    Date/time conversion has failed\r\n"));
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Clk_DateTimeToTS()
+*
+* Description : Convert date/time structure to Clock timestamp.
+*
+* Argument(s) : p_ts_sec        Pointer to variable that will receive the Clock timestamp :
+*
+*                                   In seconds UTC+00,  if NO error(s);
+*                                   CLK_TS_SEC_NONE,    otherwise.
+*
+*               p_date_time     Pointer to variable that contains date/time structure to convert.
+*
+* Return(s)   : DEF_OK,   if timestamp successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Clk_SetDateTime(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Date/time structure ('p_date_time') MUST be representable in Clock timestamp.
+*                   Thus date to convert MUST be :
+*
+*                   (a) >= CLK_EPOCH_YR_START
+*                   (b) <  CLK_EPOCH_YR_END
+*
+*               (2) (a) Date/time ('p_date_time') SHOULD be set to local time with correct time zone
+*                       offset ('p_date_time->TZ_sec'). Clk_DateTimeToTS() removes the time zone
+*                       offset from the date/time to calculate & return a Clock timestamp at UTC+00.
+*
+*                   (b) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                       (1) Between  +|- 12 hours (+|- 43200 seconds)
+*                       (2) Multiples of 15 minutes
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Clk_DateTimeToTS (CLK_TS_SEC     *p_ts_sec,
+                               CLK_DATE_TIME  *p_date_time)
+{
+    CPU_BOOLEAN  valid;
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE TS PTR ------------------ */
+    if (p_ts_sec == (CLK_TS_SEC *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_ts_sec = CLK_TS_SEC_NONE;                                 /* Init to ts none for err (see Note #3).               */
+
+
+#if 0                                                           /* Validated in Clk_IsDateTimeValid().                  */
+    if (p_date_time == (CLK_DATE_TIME *)0) {                    /* -------------- VALIDATE DATE/TIME PTR -------------- */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ---------------- VALIDATE DATE/TIME ---------------- */
+    valid = Clk_IsDateTimeValid(p_date_time);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+                                                                /* ------------- CONV DATE/TIME TO CLK TS ------------- */
+    CLK_TRACE_DBG(("Convert Date/time to TS:\r\n"));
+    valid = Clk_DateTimeToTS_Handler(p_ts_sec,
+                                     p_date_time,
+                                     CLK_EPOCH_YR_START);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Clk_DateTimeMake()
+*
+* Description : Build a valid Clock epoch date/time structure.
+*
+* Argument(s) : p_date_time     Pointer to variable that will receive the date/time structure.
+*
+*               yr              Year    value [CLK_EPOCH_YR_START to CLK_EPOCH_YR_END) [see Note #1].
+*
+*               month           Month   value [     CLK_MONTH_JAN to    CLK_MONTH_DEC].
+*
+*               day             Day     value [                 1 to               31].
+*
+*               hr              Hours   value [                 0 to               23].
+*
+*               min             Minutes value [                 0 to               59].
+*
+*               sec             Seconds value [                 0 to               60] (see Note #3).
+*
+*               tz_sec          Time zone offset (in seconds, +|- from UTC) [-43200 to 43200].
+*
+* Return(s)   : DEF_OK,   if date/time structure successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Date/time structure ('p_date_time') MUST be representable in Clock timestamp.
+*                   Thus date to convert MUST be :
+*
+*                   (a) >= CLK_EPOCH_YR_START
+*                   (b) <  CLK_EPOCH_YR_END
+*
+*               (2) Day of week ('p_date_time->DayOfWk') and Day of year ('p_date_time->DayOfYr')
+*                   are internally calculated and set in the date/time structure if date is valid.
+*
+*               (3) Seconds value of 60 is valid to be compatible with leap second adjustment and
+*                   the atomic clock time structure.
+*
+*               (4) Time zone is based ('tz_sec') on Coordinated Universal Time (UTC) & has valid
+*                   values :
+*
+*                   (a) Between  +|- 12 hours (+|- 43200 seconds)
+*                   (b) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Clk_DateTimeMake (CLK_DATE_TIME  *p_date_time,
+                               CLK_YR          yr,
+                               CLK_MONTH       month,
+                               CLK_DAY         day,
+                               CLK_HR          hr,
+                               CLK_MIN         min,
+                               CLK_SEC         sec,
+                               CLK_TZ_SEC      tz_sec)
+{
+    CPU_BOOLEAN  valid;
+
+                                                                /* ---------- VALIDATE & CONV CLK DATE/TIME ----------- */
+    valid = Clk_DateTimeMakeHandler(p_date_time,
+                                    yr,
+                                    month,
+                                    day,
+                                    hr,
+                                    min,
+                                    sec,
+                                    tz_sec,
+                                    CLK_EPOCH_YR_START,
+                                    CLK_EPOCH_YR_END);
+    if (valid != DEF_YES) {
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       Clk_IsDateTimeValid()
+*
+* Description : Determine if date/time structure is valid in Clock epoch.
+*
+* Argument(s) : p_date_time     Pointer to variable that contains the date/time structure to validate.
+*
+* Return(s)   : DEF_YES, if date/time structure is valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Clk_DateTimeToTS(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Date/time structure ('p_date_time') MUST be representable in Clock epoch. Thus
+*                   date to validate MUST be :
+*
+*                   (a) >= CLK_EPOCH_YR_START
+*                   (b) <  CLK_EPOCH_YR_END
+*
+*               (2) Time zone is based ('p_date_time->TZ_sec') on Coordinated Universal Time (UTC)
+*                   & has valid values :
+*
+*                   (a) Between  +|- 12 hours (+|- 43200 seconds)
+*                   (b) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Clk_IsDateTimeValid (CLK_DATE_TIME  *p_date_time)
+{
+    CPU_BOOLEAN  valid;
+
+                                                                /* -------------- VALIDATE CLK DATE/TIME -------------- */
+    CLK_TRACE_DBG(("Validate Clock date/time: "));
+
+    valid = Clk_IsDateTimeValidHandler(p_date_time,
+                                       CLK_EPOCH_YR_START,
+                                       CLK_EPOCH_YR_END);
+    if (valid != DEF_YES) {
+        CLK_TRACE_DBG(("Fail\r\n"));
+        return  (DEF_NO);
+    }
+
+    CLK_TRACE_DBG(("Ok\r\n"));
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_GetDayOfWk()
+*
+* Description : Get the day of week.
+*
+* Argument(s) : yr          Year  value [1900 to 2135] (see Note #1).
+*
+*               month       Month value [   1 to   12] / [CLK_MONTH_JAN to CLK_MONTH_DEC].
+*
+*               day         Day   value [   1 to   31].
+*
+* Return(s)   : Day of week [1 to 7] / [CLK_DAY_OF_WK_SUN to CLK_DAY_OF_WK_SAT], if NO error(s).
+*
+*               CLK_DAY_OF_WK_NONE,                                              otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) It's only possible to get a day of week of an epoch supported by Clock :
+*
+*                   (a) Earliest year is the NTP   epoch start year, thus Year ('yr') MUST be greater
+*                       than or equal to 'CLK_NTP_EPOCH_YR_START'.
+*
+*                   (b) Latest   year is the Clock epoch end   year, thus Year ('yr') MUST be less
+*                       than 'CLK_EPOCH_YR_END'.
+*********************************************************************************************************
+*/
+
+CLK_DAY  Clk_GetDayOfWk (CLK_YR     yr,
+                         CLK_MONTH  month,
+                         CLK_DAY    day)
+{
+    CLK_DAY      day_of_wk;
+    CPU_BOOLEAN  valid;
+
+                                                                /* ------------------ VALIDATE DATE ------------------- */
+    valid = Clk_IsDateValid(yr,
+                            month,
+                            day,
+                            CLK_NTP_EPOCH_YR_START,
+                            CLK_EPOCH_YR_END);
+    if (valid != DEF_YES) {
+        return (CLK_DAY_OF_WK_NONE);
+    }
+
+                                                                /* ------------------ GET DAY OF WK ------------------- */
+    day_of_wk = Clk_GetDayOfWkHandler(yr, month, day);
+
+    return (day_of_wk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_GetDayOfYr()
+*
+* Description : Get the day of year.
+*
+* Argument(s) : yr          Year  value [1900 to 2135] (see Note #1).
+*
+*               month       Month value [   1 to   12] / [CLK_MONTH_JAN to CLK_MONTH_DEC].
+*
+*               day         Day   value [   1 to   31].
+*
+* Return(s)   : Day of year [1 to 366], if NO error(s).
+*
+*               CLK_DAY_OF_WK_NONE,     otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) It's only possible to get a day of year of an epoch supported by Clock :
+*
+*                   (a) Earliest year is the NTP   epoch start year, thus Year ('yr') MUST be greater
+*                       than or equal to 'CLK_NTP_EPOCH_YR_START'.
+*
+*                   (b) Latest   year is the Clock epoch end   year, thus Year ('yr') MUST be less
+*                       than 'CLK_EPOCH_YR_END'.
+*********************************************************************************************************
+*/
+
+CLK_DAY  Clk_GetDayOfYr (CLK_YR     yr,
+                         CLK_MONTH  month,
+                         CLK_DAY    day)
+{
+    CLK_DAY      day_of_wk;
+    CPU_BOOLEAN  valid;
+
+                                                                /* ------------------ VALIDATE DATE ------------------- */
+    valid = Clk_IsDateValid(yr,
+                            month,
+                            day,
+                            CLK_NTP_EPOCH_YR_START,
+                            CLK_EPOCH_YR_END);
+    if (valid != DEF_YES) {
+        return (CLK_DAY_OF_WK_NONE);
+    }
+
+                                                                /* ------------------ GET DAY OF YR ------------------- */
+    day_of_wk = Clk_GetDayOfYrHandler(yr, month, day);
+
+    return (day_of_wk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Clk_DateTimeToStr()
+*
+* Description : Converts a date/time structure to an ASCII string.
+*
+* Argument(s) : p_date_time     Pointer to variable that contains the date/time structure to convert.
+*
+*               fmt             Desired string format :
+*
+*                                   CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS_UTC     "YYYY-MM-DD HH:MM:SS UTC+TZ"
+*                                   CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS         "YYYY-MM-DD HH:MM:SS"
+*                                   CLK_STR_FMT_MM_DD_YY_HH_MM_SS           "MM-DD-YY HH:MM:SS"
+*                                   CLK_STR_FMT_YYYY_MM_DD                  "YYYY-MM-DD"
+*                                   CLK_STR_FMT_MM_DD_YY                    "MM-DD-YY"
+*                                   CLK_STR_FMT_DAY_MONTH_DD_YYYY           "Day Month DD, YYYY"
+*                                   CLK_STR_FMT_DAY_MONTH_DD_HH_MM_SS_YYYY  "Day Mon DD HH:MM:SS YYYY"
+*                                   CLK_STR_FMT_HH_MM_SS                    "HH:MM:SS"
+*                                   CLK_STR_FMT_HH_MM_SS_AM_PM              "HH:MM:SS AM|PM"
+*
+*               p_str           Pointer to buffer that will receive the formated string (see Note #2).
+*
+*               str_len         Maximum number of characters the string can contains.
+*
+* Return(s)   : DEF_OK,   if string successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) It's only possible to convert date supported by Clock :
+*
+*                   (a) Earliest year is the NTP   epoch start year, thus Year ('yr') MUST be greater
+*                       than or equal to 'CLK_NTP_EPOCH_YR_START'.
+*
+*                   (b) Latest   year is the Clock epoch end   year, thus Year ('yr') MUST be less
+*                       than 'CLK_EPOCH_YR_END'.
+*
+*               (2) The size of the string buffer that will receive the returned string address MUST be
+*                   greater than or equal to CLK_STR_FMT_MAX_LEN.
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*               (4) Absolute value of the time zone offset is stored into 'CLK_TS_SEC' data type to be
+*                   compliant with unsigned integer verification/operations.
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_STR_CONV_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_DateTimeToStr (CLK_DATE_TIME  *p_date_time,
+                                CLK_STR_FMT     fmt,
+                                CPU_CHAR       *p_str,
+                                CPU_SIZE_T      str_len)
+{
+    CPU_CHAR      yr   [CLK_STR_DIG_YR_LEN     + 1u];
+    CPU_CHAR      month[CLK_STR_DIG_MONTH_LEN  + 1u];
+    CPU_CHAR      day  [CLK_STR_DIG_DAY_LEN    + 1u];
+    CPU_CHAR      hr   [CLK_STR_DIG_HR_LEN     + 1u];
+    CPU_CHAR      min  [CLK_STR_DIG_MIN_LEN    + 1u];
+    CPU_CHAR      sec  [CLK_STR_DIG_SEC_LEN    + 1u];
+    CPU_CHAR      tz   [CLK_STR_DIG_TZ_MAX_LEN + 1u];
+    CPU_CHAR      am_pm[CLK_STR_AM_PM_LEN      + 1u];
+    CPU_CHAR     *p_yr;
+    CPU_BOOLEAN   valid;
+    CLK_HR        half_day_hr;
+    CLK_TS_SEC    tz_hr_abs;                                     /* See Note #4.                                         */
+    CLK_TS_SEC    tz_min_abs;                                    /* See Note #4.                                         */
+    CLK_TS_SEC    tz_sec_rem_abs;                                /* See Note #4.                                         */
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE STR PTR ----------------- */
+    if (p_str == (CPU_CHAR *)0) {
+        return (DEF_FAIL);
+    }
+    if (str_len < sizeof("")) {
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_str = '\0';                                               /* Init to NULL str for err (see Note #3).              */
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE STR LEN ----------------- */
+    switch (fmt) {
+        case CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS_UTC:
+             if (str_len < CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS_UTC_LEN) {
+                 return (DEF_FAIL);
+             }
+             break;
+
+        case CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS:
+             if (str_len < CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS_LEN) {
+                 return (DEF_FAIL);
+             }
+             break;
+
+        case CLK_STR_FMT_MM_DD_YY_HH_MM_SS:
+             if (str_len < CLK_STR_FMT_MM_DD_YY_HH_MM_SS_LEN) {
+                 return (DEF_FAIL);
+             }
+             break;
+
+        case CLK_STR_FMT_YYYY_MM_DD:
+             if (str_len < CLK_STR_FMT_YYYY_MM_DD_LEN) {
+                 return (DEF_FAIL);
+             }
+             break;
+
+        case CLK_STR_FMT_MM_DD_YY:
+             if (str_len < CLK_STR_FMT_MM_DD_YY_LEN) {
+                 return (DEF_FAIL);
+             }
+             break;
+
+        case CLK_STR_FMT_DAY_MONTH_DD_YYYY:
+             if (str_len < CLK_STR_FMT_DAY_MONTH_DD_YYYY_MAX_LEN) {
+                 return (DEF_FAIL);
+             }
+             break;
+
+        case CLK_STR_FMT_DAY_MONTH_DD_HH_MM_SS_YYYY:
+             if (str_len < CLK_STR_FMT_DAY_MONTH_DD_HH_MM_SS_YYYY_LEN) {
+                 return (DEF_FAIL);
+             }
+             break;
+
+        case CLK_STR_FMT_HH_MM_SS:
+             if (str_len < CLK_STR_FMT_HH_MM_SS_LEN) {
+                 return (DEF_FAIL);
+             }
+             break;
+
+        case CLK_STR_FMT_HH_MM_SS_AM_PM:
+             if (str_len < CLK_STR_FMT_HH_MM_SS_AM_PM_LEN) {
+                 return (DEF_FAIL);
+             }
+             break;
+
+        default:
+             return (DEF_FAIL);
+    }
+#else
+  (void)str_len;                                                /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+                                                                /* ---------------- VALIDATE DATE/TIME ---------------- */
+#if 0                                                           /* Validated in Clk_IsDateTimeValidHandler().           */
+    if (p_date_time == (CLK_DATE_TIME *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+    valid = Clk_IsDateTimeValidHandler(p_date_time,
+                                       CLK_NTP_EPOCH_YR_START,
+                                       CLK_EPOCH_YR_END);
+    if (valid != DEF_YES) {
+        return  (DEF_FAIL);
+    }
+
+                                                                /* -------------- CREATE DATE/TIME STRS --------------- */
+   (void)Str_FmtNbr_Int32U(p_date_time->Yr,                     /* Create yr str.                                       */
+                           CLK_STR_DIG_YR_LEN,
+                           DEF_NBR_BASE_DEC,
+                           (CPU_CHAR)'\0',
+                           DEF_NO,
+                           DEF_YES,
+                           yr);
+
+   (void)Str_FmtNbr_Int32U(p_date_time->Month,                  /* Create month (dig) str.                              */
+                           CLK_STR_DIG_MONTH_LEN,
+                           DEF_NBR_BASE_DEC,
+                           (CPU_CHAR)'0',
+                           DEF_NO,
+                           DEF_YES,
+                           month);
+
+   (void)Str_FmtNbr_Int32U(p_date_time->Day,                    /* Create day str.                                      */
+                           CLK_STR_DIG_DAY_LEN,
+                           DEF_NBR_BASE_DEC,
+                           (CPU_CHAR)'0',
+                           DEF_NO,
+                           DEF_YES,
+                           day);
+
+   (void)Str_FmtNbr_Int32U(p_date_time->Hr,                     /* Create hr str.                                       */
+                           CLK_STR_DIG_HR_LEN,
+                           DEF_NBR_BASE_DEC,
+                           (CPU_CHAR)'0',
+                           DEF_NO,
+                           DEF_YES,
+                           hr);
+
+   (void)Str_FmtNbr_Int32U(p_date_time->Min,                    /* Create min str.                                      */
+                           CLK_STR_DIG_MIN_LEN,
+                           DEF_NBR_BASE_DEC,
+                           (CPU_CHAR)'0',
+                           DEF_NO,
+                           DEF_YES,
+                           min);
+
+   (void)Str_FmtNbr_Int32U(p_date_time->Sec,                    /* Create sec str.                                      */
+                           CLK_STR_DIG_SEC_LEN,
+                           DEF_NBR_BASE_DEC,
+                           (CPU_CHAR)'0',
+                           DEF_NO,
+                           DEF_YES,
+                           sec);
+
+
+
+    switch (fmt) {                                              /* ---------------- FMT DATE/TIME STR ----------------- */
+
+        case CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS_UTC:               /* ------ BUILD STR "YYYY-MM-DD HH:MM:SS UTC+TZ" ------ */
+             CLK_TRACE_DBG(("Date/time to string : YYYY-MM-DD HH:MM:SS UTC+TZ (+|-hh:mm)\r\n"));
+
+            (void)Str_Copy_N(p_str, yr,     CLK_STR_DIG_YR_LEN + 1u);
+            (void)Str_Cat_N (p_str, "-",    1u);
+
+            (void)Str_Cat_N (p_str, month,  CLK_STR_DIG_MONTH_LEN);
+            (void)Str_Cat_N (p_str, "-",    1u);
+
+            (void)Str_Cat_N (p_str, day,    CLK_STR_DIG_DAY_LEN);
+            (void)Str_Cat_N (p_str, " ",    1u);
+
+            (void)Str_Cat_N (p_str, hr,     CLK_STR_DIG_HR_LEN);
+            (void)Str_Cat_N (p_str, ":",    1u);
+
+            (void)Str_Cat_N (p_str, min,    CLK_STR_DIG_MIN_LEN);
+            (void)Str_Cat_N (p_str, ":",    1u);
+
+            (void)Str_Cat_N (p_str, sec,    CLK_STR_DIG_SEC_LEN);
+            (void)Str_Cat_N (p_str, " ",    1u);
+
+            (void)Str_Cat_N (p_str, "UTC",  3u);
+
+             if (p_date_time->TZ_sec >= 0) {
+                (void)Str_Cat_N(p_str, "+", 1u);
+             } else {
+                (void)Str_Cat_N(p_str, "-", 1u);
+             }
+
+             tz_sec_rem_abs = (CLK_TS_SEC)DEF_ABS(p_date_time->TZ_sec);
+             tz_hr_abs      = tz_sec_rem_abs / DEF_TIME_NBR_SEC_PER_HR;
+             tz_sec_rem_abs = tz_sec_rem_abs % DEF_TIME_NBR_SEC_PER_HR;
+            (void)Str_FmtNbr_Int32U(tz_hr_abs,
+                                    CLK_STR_DIG_TZ_HR_LEN,
+                                    DEF_NBR_BASE_DEC,
+                                    (CPU_CHAR)'0',
+                                    DEF_NO,
+                                    DEF_YES,
+                                    tz);
+
+            (void)Str_Cat_N(p_str, tz,  CLK_STR_DIG_TZ_HR_LEN);
+            (void)Str_Cat_N(p_str, ":", 1u);
+
+             tz_min_abs = tz_sec_rem_abs / DEF_TIME_NBR_SEC_PER_MIN;
+            (void)Str_FmtNbr_Int32U(tz_min_abs,
+                                    CLK_STR_DIG_TZ_MIN_LEN,
+                                    DEF_NBR_BASE_DEC,
+                                    (CPU_CHAR)'0',
+                                    DEF_NO,
+                                    DEF_YES,
+                                    tz);
+
+            (void)Str_Cat_N(p_str, tz,  CLK_STR_DIG_TZ_MIN_LEN);
+             break;
+
+
+
+        case CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS:                   /* --------- BUILD STR "YYYY-MM-DD HH:MM:SS" ---------- */
+             CLK_TRACE_DBG(("Date/time to string : YYYY-MM-DD HH:MM:SS\r\n"));
+
+            (void)Str_Copy_N(p_str, yr,    CLK_STR_DIG_YR_LEN + 1u);
+            (void)Str_Cat_N (p_str, "-",   1u);
+
+            (void)Str_Cat_N (p_str, month, CLK_STR_DIG_MONTH_LEN);
+            (void)Str_Cat_N (p_str, "-",   1u);
+
+            (void)Str_Cat_N (p_str, day,   CLK_STR_DIG_DAY_LEN);
+            (void)Str_Cat_N (p_str, " ",   1u);
+
+            (void)Str_Cat_N (p_str, hr,    CLK_STR_DIG_HR_LEN);
+            (void)Str_Cat_N (p_str, ":",   1u);
+
+            (void)Str_Cat_N (p_str, min,   CLK_STR_DIG_MIN_LEN);
+            (void)Str_Cat_N (p_str, ":",   1u);
+
+            (void)Str_Cat_N (p_str, sec,   CLK_STR_DIG_SEC_LEN);
+             break;
+
+
+        case CLK_STR_FMT_MM_DD_YY_HH_MM_SS:                     /* ---------- BUILD STR "MM-DD-YY HH:MM:SS" ----------- */
+             CLK_TRACE_DBG(("Date/time to string : MM-DD-YY HH:MM:SS\r\n"));
+
+            (void)Str_Copy_N(p_str, month, CLK_STR_DIG_MONTH_LEN + 1u);
+            (void)Str_Cat_N (p_str, "-",   1u);
+
+            (void)Str_Cat_N (p_str, day,   CLK_STR_DIG_DAY_LEN);
+            (void)Str_Cat_N (p_str, "-",   1u);
+
+             p_yr = yr + CLK_STR_DIG_YR_TRUNC_LEN;
+            (void)Str_Cat_N (p_str, p_yr,  CLK_STR_DIG_YR_TRUNC_LEN);
+            (void)Str_Cat_N (p_str, " ",   1u);
+
+            (void)Str_Cat_N (p_str, hr,    CLK_STR_DIG_HR_LEN);
+            (void)Str_Cat_N (p_str, ":",   1u);
+
+            (void)Str_Cat_N (p_str, min,   CLK_STR_DIG_MIN_LEN);
+            (void)Str_Cat_N (p_str, ":",   1u);
+
+            (void)Str_Cat_N (p_str, sec,   CLK_STR_DIG_SEC_LEN);
+             break;
+
+
+
+        case CLK_STR_FMT_YYYY_MM_DD:                            /* -------------- BUILD STR "YYYY-MM-DD" -------------- */
+             CLK_TRACE_DBG(("Date/time to string : YYYY-MM-DD\r\n"));
+
+            (void)Str_Copy_N(p_str, yr,    CLK_STR_DIG_YR_LEN + 1u);
+            (void)Str_Cat_N (p_str, "-",   1u);
+
+            (void)Str_Cat_N (p_str, month, CLK_STR_DIG_MONTH_LEN);
+            (void)Str_Cat_N (p_str,  "-",  1u);
+
+            (void)Str_Cat_N (p_str, day,   CLK_STR_DIG_DAY_LEN);
+             break;
+
+
+
+        case CLK_STR_FMT_MM_DD_YY:                              /* --------------- BUILD STR ""MM-DD-YY" -------------- */
+             CLK_TRACE_DBG(("Date/time to string : MM-DD-YY\r\n"));
+
+            (void)Str_Copy_N(p_str, month, CLK_STR_DIG_MONTH_LEN + 1u);
+            (void)Str_Cat_N (p_str, "-",   1u);
+
+            (void)Str_Cat_N (p_str, day,   CLK_STR_DIG_DAY_LEN);
+            (void)Str_Cat_N (p_str, "-",   1u);
+
+             p_yr = yr + CLK_STR_DIG_YR_TRUNC_LEN;
+            (void)Str_Cat_N (p_str, p_yr,  CLK_STR_DIG_YR_TRUNC_LEN);
+             break;
+
+
+
+        case CLK_STR_FMT_DAY_MONTH_DD_YYYY:                     /* ---------- BUILD STR "Day Month DD, YYYY" ---------- */
+             CLK_TRACE_DBG(("Date/time to string : Day Month DD, YYYY\r\n"));
+
+            (void)Str_Copy_N(p_str,
+                             Clk_StrDayOfWk[p_date_time->DayOfWk - CLK_FIRST_DAY_OF_WK],
+                             CLK_STR_DAY_OF_WK_MAX_LEN + 1u);
+            (void)Str_Cat_N( p_str, " ",  1u);
+
+            (void)Str_Cat_N( p_str,
+                             Clk_StrMonth[p_date_time->Month - CLK_FIRST_DAY_OF_MONTH],
+                             CLK_STR_MONTH_MAX_LEN);
+            (void)Str_Cat_N( p_str, " ",  1u);
+
+            (void)Str_Cat_N( p_str, day,  CLK_STR_DIG_DAY_LEN);
+            (void)Str_Cat_N( p_str, ", ", 2u);
+
+            (void)Str_Cat_N( p_str, yr,   CLK_STR_DIG_YR_LEN);
+             break;
+
+
+        case CLK_STR_FMT_DAY_MONTH_DD_HH_MM_SS_YYYY:            /* ------- BUILD STR "Day Mon DD HH:MM:SS YYYY" ------- */
+             CLK_TRACE_DBG(("Date/time to string : Day Mon DD HH:MM:SS YYYY\r\n"));
+
+            (void)Str_Copy_N(p_str,
+                             Clk_StrDayOfWk[p_date_time->DayOfWk - CLK_FIRST_DAY_OF_WK],
+                             CLK_STR_DAY_OF_WK_TRUNC_LEN + 1u);
+             p_str[3] = '\0';
+            (void)Str_Cat_N (p_str, " ", 1u);
+
+            (void)Str_Cat_N( p_str,
+                             Clk_StrMonth[p_date_time->Month - CLK_FIRST_DAY_OF_MONTH],
+                             CLK_STR_MONTH_TRUNC_LEN);
+            (void)Str_Cat_N (p_str, " ", 1u);
+
+            (void)Str_Cat_N (p_str, day, CLK_STR_DIG_DAY_LEN);
+            (void)Str_Cat_N (p_str, " ", 1u);
+
+            (void)Str_Cat_N (p_str, hr,  CLK_STR_DIG_HR_LEN);
+            (void)Str_Cat_N (p_str, ":", 1u);
+
+            (void)Str_Cat_N (p_str, min, CLK_STR_DIG_MIN_LEN);
+            (void)Str_Cat_N (p_str, ":", 1u);
+
+            (void)Str_Cat_N (p_str, sec, CLK_STR_DIG_SEC_LEN);
+            (void)Str_Cat_N (p_str, " ", 1u);
+
+            (void)Str_Cat_N (p_str, yr,  CLK_STR_DIG_YR_LEN);
+             break;
+
+
+
+        case CLK_STR_FMT_HH_MM_SS:                              /* --------------- BUILD STR "HH:MM:SS" --------------- */
+             CLK_TRACE_DBG(("Date/time to string : HH:MM:SS\r\n"));
+
+            (void)Str_Copy_N(p_str, hr,  CLK_STR_DIG_HR_LEN + 1u);
+            (void)Str_Cat_N (p_str, ":", 1u);
+
+            (void)Str_Cat_N (p_str, min, CLK_STR_DIG_MIN_LEN);
+            (void)Str_Cat_N (p_str, ":", 1u);
+
+            (void)Str_Cat_N (p_str, sec, CLK_STR_DIG_SEC_LEN);
+             break;
+
+
+
+        case CLK_STR_FMT_HH_MM_SS_AM_PM:                        /* ------------ BUILD STR "HH:MM:SS AM|PM" ------------ */
+             CLK_TRACE_DBG(("Date/time to string : HH:MM:SS AM|PM\r\n"));
+
+             if (p_date_time->Hr < CLK_HR_PER_HALF_DAY) {       /* Chk for AM or PM.                                    */
+                (void)Str_Copy_N(am_pm, "AM", CLK_STR_AM_PM_LEN + 1u);
+                 if (p_date_time->Hr == 0u) {
+                     half_day_hr = CLK_HR_PER_HALF_DAY;
+                 } else {
+                     half_day_hr = p_date_time->Hr;
+                 }
+             } else {
+                (void)Str_Copy_N(am_pm, "PM", CLK_STR_AM_PM_LEN + 1u);
+                 half_day_hr = p_date_time->Hr - CLK_HR_PER_HALF_DAY;
+             }
+
+            (void)Str_FmtNbr_Int32U(half_day_hr,
+                                    CLK_STR_DIG_HR_LEN,
+                                    DEF_NBR_BASE_DEC,
+                                    (CPU_CHAR)'0',
+                                    DEF_NO,
+                                    DEF_YES,
+                                    hr);
+
+            (void)Str_Copy_N(p_str, hr,    CLK_STR_DIG_HR_LEN + 1u);
+            (void)Str_Cat_N (p_str, ":",   1u);
+
+            (void)Str_Cat_N (p_str, min,   CLK_STR_DIG_MIN_LEN);
+            (void)Str_Cat_N (p_str, ":",   1u);
+
+            (void)Str_Cat_N (p_str, sec,   CLK_STR_DIG_SEC_LEN);
+            (void)Str_Cat_N (p_str, " ",   1u);
+
+            (void)Str_Cat_N (p_str, am_pm, CLK_STR_AM_PM_LEN);
+             break;
+
+
+
+        default:                                                /* ------------------- INVALID FMT -------------------- */
+             CLK_TRACE_DBG(("Date/time to string : Invalid format\r\n"));
+             return (DEF_FAIL);
+    }
+
+    CLK_TRACE_DBG(("    %s\r\n", p_str));
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           Clk_GetTS_NTP()
+*
+* Description : Get current Clock timestamp as an NTP timestamp.
+*
+* Argument(s) : p_ts_ntp_sec    Pointer to variable that will receive the NTP timestamp :
+*
+*                                   In seconds UTC+00,  if NO error(s);
+*                                   CLK_TS_SEC_NONE,    otherwise.
+*
+* Return(s)   : DEF_OK,   if timestamp successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) NTP timestamp is converted from the internal Clock timestamp which SHOULD
+*                       be set for UTC+00. Thus the NTP timestamp is returned at UTC+00.
+*
+*                   (b) NTP timestamp does NOT include the internal Clock time zone. Thus any
+*                       local time zone offset MUST be applied after calling Clk_GetTS_NTP().
+*
+*               (2) NTP timestamp will eventually overflow, thus it's not possible to get NTP
+*                   timestamp for years on or after CLK_NTP_EPOCH_YR_END.
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all
+*                   other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_NTP_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_GetTS_NTP (CLK_TS_SEC  *p_ts_ntp_sec)
+{
+    CLK_TS_SEC   ts_sec;
+    CPU_BOOLEAN  valid;
+
+
+#if 0                                                           /* Validated & init'd in Clk_TS_ToTS_NTP().             */
+    if (p_ts_ntp_sec == (CLK_TS_SEC *)0) {                      /* ----------------- VALIDATE TS PTR ------------------ */
+        return (DEF_FAIL);
+    }
+
+   *p_ts_ntp_sec = CLK_TS_SEC_NONE;                             /* Init to ts none for err (see Note #3).               */
+#endif
+
+                                                                /* -------------------- GET CLK TS -------------------- */
+    ts_sec = Clk_GetTS();
+
+                                                                /* -------------- CONV CLK TS TO NTP TS --------------- */
+    valid  = Clk_TS_ToTS_NTP(ts_sec, p_ts_ntp_sec);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           Clk_SetTS_NTP()
+*
+* Description : Set Clock timestamp from an NTP timestamp.
+*
+* Argument(s) : ts_ntp_sec      Current NTP timestamp to set (in seconds, UTC+00).
+*
+* Return(s)   : DEF_OK,   if timestamp successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) Internal Clock timestamp SHOULD be set for UTC+00 and should NOT include any local
+*                   time zone offset.
+*
+*               (2) Only years supported by Clock & NTP can be set, thus the timestamp date MUST be :
+*
+*                   (a) >= CLK_EPOCH_YR_START
+*                   (b) <  CLK_NTP_EPOCH_YR_END
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_NTP_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_SetTS_NTP (CLK_TS_SEC  ts_ntp_sec)
+{
+    CLK_TS_SEC   ts_sec;
+    CPU_BOOLEAN  valid;
+
+                                                                /* -------------- CONV NTP TS TO CLK TS --------------- */
+    valid = Clk_TS_NTP_ToTS(&ts_sec, ts_ntp_sec);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+                                                                /* -------------------- SET CLK TS -------------------- */
+    valid = Clk_SetTS(ts_sec);
+
+    return (valid);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_TS_ToTS_NTP()
+*
+* Description : Convert Clock timestamp to NTP timestamp.
+*
+* Argument(s) : ts_sec          Timestamp to convert (in seconds, UTC+00).
+*
+*               p_ts_ntp_sec    Pointer to variable that will receive the NTP timestamp :
+*
+*                                   In seconds UTC+00,  if NO error(s);
+*                                   CLK_TS_SEC_NONE,    otherwise.
+*
+* Return(s)   : DEF_OK,   if timestamp successfully converted.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Clk_GetTS_NTP(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Returned timestamp does NOT include any time zone offset. Thus any local time
+*                   zone offset SHOULD be applied before or after calling Clk_TS_ToTS_NTP().
+*
+*               (2) Only years supported by Clock & NTP can be converted, thus the timestamp date
+*                   MUST be :
+*
+*                   (a) >= CLK_EPOCH_YR_START
+*                   (b) <  CLK_NTP_EPOCH_YR_END
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all
+*                   other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_NTP_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_TS_ToTS_NTP (CLK_TS_SEC   ts_sec,
+                              CLK_TS_SEC  *p_ts_ntp_sec)
+{
+    CLK_TS_SEC  ts_ntp_sec;
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE TS PTR ------------------ */
+    if (p_ts_ntp_sec == (CLK_TS_SEC *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_ts_ntp_sec = CLK_TS_SEC_NONE;                             /* Init to ts none for err (see Note #3).               */
+
+    CLK_TRACE_DBG(("\r\nConvert TS to NTP TS:\r\n"
+                   "    TS = %u\r\n", (unsigned int)ts_sec));
+
+                                                                /* -------------- CONV CLK TS TO NTP TS --------------- */
+    ts_ntp_sec = ts_sec + CLK_NTP_EPOCH_OFFSET_SEC;
+    if (ts_ntp_sec < CLK_NTP_EPOCH_OFFSET_SEC) {                /* Chk for ovf.                                         */
+        CLK_TRACE_DBG(("    NTP TS conversion has failed\r\n"));
+        return (DEF_FAIL);
+    }
+
+   *p_ts_ntp_sec = ts_ntp_sec;
+    CLK_TRACE_DBG(("    NTP TS converted = %u\r\n", (unsigned int)*p_ts_ntp_sec));
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_TS_NTP_ToTS()
+*
+* Description : Convert NTP timestamp to Clock timestamp.
+*
+* Argument(s) : p_ts_sec        Pointer to variable that will receive the Clock timestamp :
+*
+*                                   In seconds UTC+00,  if NO error(s);
+*                                   CLK_TS_SEC_NONE,    otherwise.
+*
+*               ts_ntp_sec      NTP timestamp value to convert (in seconds, UTC+00).
+*
+* Return(s)   : DEF_OK,   if timestamp successfully converted.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Clk_SetTS_NTP(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Returned timestamp does NOT include any time zone offset. Thus any local time
+*                   zone offset SHOULD be applied before or after calling Clk_TS_NTP_ToTS().
+*
+*               (2) Only years supported by Clock & NTP can be converted, thus the timestamp date
+*                   MUST be :
+*
+*                   (a) >= CLK_EPOCH_YR_START
+*                   (b) <  CLK_NTP_EPOCH_YR_END
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_NTP_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_TS_NTP_ToTS (CLK_TS_SEC  *p_ts_sec,
+                              CLK_TS_SEC   ts_ntp_sec)
+{
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE TS PTR ------------------ */
+    if (p_ts_sec == (CLK_TS_SEC *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_ts_sec = CLK_TS_SEC_NONE;                                 /* Init to ts none for err (see Note #3).               */
+
+    CLK_TRACE_DBG(("Convert NTP TS to TS:\r\n"
+                   "    NTP TS = %u\r\n", (unsigned int)ts_ntp_sec));
+
+    if (ts_ntp_sec < CLK_NTP_EPOCH_OFFSET_SEC) {                /* Chk for ovf.                                         */
+        CLK_TRACE_DBG(("TS overflow\r\n"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* -------------- CONV NTP TS TO CLK TS --------------- */
+   *p_ts_sec = ts_ntp_sec - CLK_NTP_EPOCH_OFFSET_SEC;
+    CLK_TRACE_DBG(("    TS converted = %u\r\n", (unsigned int)*p_ts_sec));
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       Clk_TS_NTP_ToDateTime()
+*
+* Description : Convert NTP timestamp to date/time structure.
+*
+* Argument(s) : ts_ntp_sec      Timestamp to convert (in seconds,          UTC+00).
+*
+*               tz_sec          Time zone offset     (in seconds, +|- from UTC).
+*
+*               p_date_time     Pointer to variable that will receive the date/time structure.
+*
+* Return(s)   : DEF_OK,   if date/time structure successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) (a) Timestamp ('ts_ntp_sec') MUST be set for UTC+00 & SHOULD NOT include the time
+*                       zone offset ('tz_sec') since Clk_TS_NTP_ToDateTime() includes the time zone
+*                       offset in its date/time calculation. Thus the time zone offset SHOULD NOT be
+*                       applied before or after calling Clk_TS_NTP_ToDateTime().
+*
+*                   (b) Time zone field of the date/time structure ('p_date_time->TZ_sec') is set to
+*                       the value of the time zone argument ('tz_sec').
+*
+*                   (c) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                       (1) Between  +|- 12 hours (+|- 43200 seconds)
+*                       (2) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_NTP_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_TS_NTP_ToDateTime (CLK_TS_SEC      ts_ntp_sec,
+                                    CLK_TZ_SEC      tz_sec,
+                                    CLK_DATE_TIME  *p_date_time)
+{
+    CPU_BOOLEAN  valid;
+
+                                                                /* ------------- CONV NTP TS TO DATE/TIME ------------- */
+    CLK_TRACE_DBG(("\r\nConvert TS NTP to Date/time:\r\n"
+                   "    TS to convert= %u\r\n\r\n",
+                   (unsigned int)ts_ntp_sec));
+
+    valid = Clk_TS_ToDateTimeHandler(ts_ntp_sec,
+                                     tz_sec,
+                                     p_date_time,
+                                     CLK_NTP_EPOCH_YR_START,
+                                     CLK_NTP_EPOCH_YR_END);
+    if (valid != DEF_OK) {
+        CLK_TRACE_DBG(("    Date/time conversion has failed\r\n"));
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       Clk_DateTimeToTS_NTP()
+*
+* Description : Convert a date/time structure to NTP timestamp.
+*
+* Argument(s) : p_ts_ntp_sec    Pointer to variable that will receive the NTP timestamp :
+*
+*                                   In seconds UTC+00,  if NO error(s);
+*                                   CLK_TS_SEC_NONE,    otherwise.
+*
+*               p_date_time     Pointer to variable that contains date/time structure to convert.
+*
+* Return(s)   : DEF_OK,   if timestamp successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Date/time structure ('p_date_time') MUST be representable in NTP timestamp.
+*                   Thus date to convert MUST be :
+*
+*                   (a) >= CLK_NTP_EPOCH_YR_START
+*                   (b) <  CLK_NTP_EPOCH_YR_END
+*
+*               (2) (a) Date/time ('p_date_time') SHOULD be set to local time with correct time zone
+*                       offset ('p_date_time->TZ_sec'). Clk_DateTimeToTS_NTP() removes the time zone
+*                       offset from the date/time to calculate & return a Clock timestamp at UTC+00.
+*
+*                   (b) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                       (1) Between  +|- 12 hours (+|- 43200 seconds)
+*                       (2) Multiples of 15 minutes
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_NTP_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_DateTimeToTS_NTP (CLK_TS_SEC     *p_ts_ntp_sec,
+                                   CLK_DATE_TIME  *p_date_time)
+{
+    CPU_BOOLEAN  valid;
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE TS PTR ------------------ */
+    if (p_ts_ntp_sec == (CLK_TS_SEC *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_ts_ntp_sec = CLK_TS_SEC_NONE;                             /* Init to ts none for err (see Note #3).               */
+
+
+#if 0                                                           /* Validated in Clk_IsNTP_DateTimeValid().              */
+    if (p_date_time == (CLK_DATE_TIME *)0) {                    /* -------------- VALIDATE DATE/TIME PTR -------------- */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ---------------- VALIDATE DATE/TIME ---------------- */
+    valid = Clk_IsNTP_DateTimeValid(p_date_time);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+                                                                /* ------------- CONV DATE/TIME TO NTP TS ------------- */
+    CLK_TRACE_DBG(("Convert Date/time to TS:\r\n"));
+    valid = Clk_DateTimeToTS_Handler(p_ts_ntp_sec,
+                                     p_date_time,
+                                     CLK_NTP_EPOCH_YR_START);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       Clk_NTP_DateTimeMake()
+*
+* Description : Build a valid NTP epoch date/time structure.
+*
+* Argument(s) : p_date_time     Pointer to variable that will receive the date/time structure.
+*
+*               yr              Year    value [CLK_NTP_EPOCH_YR_START to CLK_NTP_EPOCH_YR_END) (see Note #1).
+*
+*               month           Month   value [         CLK_MONTH_JAN to        CLK_MONTH_DEC].
+*
+*               day             Day     value [                     1 to                   31].
+*
+*               hr              Hours   value [                     0 to                   23].
+*
+*               min             Minutes value [                     0 to                   59].
+*
+*               sec             Seconds value [                     0 to                   60] (see Note #3).
+*
+*               tz_sec          Time zone offset (in seconds, +|- from UTC) [-43200 to 43200].
+*
+* Return(s)   : DEF_OK,   if date/time structure successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Date/time structure ('p_date_time') MUST be representable in NTP timestamp.
+*                   Thus date to convert MUST be :
+*
+*                   (a) >= CLK_NTP_EPOCH_YR_START
+*                   (b) <  CLK_NTP_EPOCH_YR_END
+*
+*               (2) Day of week ('p_date_time->DayOfWk') and Day of year ('p_date_time->DayOfYr')
+*                   are internally calculated and set in the date/time structure if date is valid.
+*
+*               (3) Seconds value of 60 is valid to be compatible with leap second adjustment and
+*                   the atomic clock time structure.
+*
+*               (4) Time zone is based ('tz_sec') on Coordinated Universal Time (UTC) & has valid
+*                   values :
+*
+*                   (a) Between  +|- 12 hours (+|- 43200 seconds)
+*                   (b) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_NTP_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_NTP_DateTimeMake (CLK_DATE_TIME  *p_date_time,
+                                   CLK_YR          yr,
+                                   CLK_MONTH       month,
+                                   CLK_DAY         day,
+                                   CLK_HR          hr,
+                                   CLK_MIN         min,
+                                   CLK_SEC         sec,
+                                   CLK_TZ_SEC      tz_sec)
+{
+    CPU_BOOLEAN  valid;
+
+                                                                /* ---------- VALIDATE & CONV NTP DATE/TIME ----------- */
+    valid = Clk_DateTimeMakeHandler(p_date_time,
+                                    yr,
+                                    month,
+                                    day,
+                                    hr,
+                                    min,
+                                    sec,
+                                    tz_sec,
+                                    CLK_NTP_EPOCH_YR_START,
+                                    CLK_NTP_EPOCH_YR_END);
+    if (valid != DEF_YES) {
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      Clk_IsNTP_DateTimeValid()
+*
+* Description : Determine if date/time structure is valid in NTP epoch.
+*
+* Argument(s) : p_date_time     Pointer to variable that contains the date/time structure to validate.
+*
+* Return(s)   : DEF_YES, if date/time structure is valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Clk_DateTimeToTS_NTP(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Date/time structure ('p_date_time') MUST be representable in NTP epoch. Thus
+*                   date to validate MUST be :
+*
+*                   (a) >= CLK_NTP_EPOCH_YR_START
+*                   (b) <  CLK_NTP_EPOCH_YR_END
+*
+*               (2) Time zone is based ('p_date_time->TZ_sec') on Coordinated Universal Time (UTC)
+*                   & has valid values :
+*
+*                   (a) Between  +|- 12 hours (+|- 43200 seconds)
+*                   (b) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_NTP_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_IsNTP_DateTimeValid (CLK_DATE_TIME  *p_date_time)
+{
+    CPU_BOOLEAN  valid;
+
+                                                                /* -------------- VALIDATE NTP DATE/TIME -------------- */
+    CLK_TRACE_DBG(("Validate NTP date/time: "));
+
+    valid = Clk_IsDateTimeValidHandler(p_date_time,
+                                       CLK_NTP_EPOCH_YR_START,
+                                       CLK_NTP_EPOCH_YR_END);
+    if (valid != DEF_YES) {
+        CLK_TRACE_DBG(("Fail\r\n"));
+        return  (DEF_NO);
+    }
+
+    CLK_TRACE_DBG(("Ok\r\n"));
+
+    return (DEF_YES);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_GetTS_Unix()
+*
+* Description : Get current Clock timestamp as a Unix timestamp.
+*
+* Argument(s) : p_ts_unix_sec   Pointer to variable that will receive the Unix timestamp :
+*
+*                                   In seconds UTC+00,  if NO error(s);
+*                                   CLK_TS_SEC_NONE,    otherwise.
+*
+* Return(s)   : DEF_OK,   if timestamp successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) Unix timestamp is converted from the internal Clock timestamp which SHOULD
+*                       be set for UTC+00. Thus the Unix timestamp is returned at UTC+00.
+*
+*                   (b) Unix timestamp does NOT include the internal Clock time zone. Thus any
+*                       local time zone offset MUST be applied after calling Clk_GetTS_Unix().
+*
+*               (2) Unix timestamp will eventually overflow, thus it's not possible to get Unix
+*                   timestamp for years on or after CLK_UNIX_EPOCH_YR_END.
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all
+*                   other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_UNIX_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_GetTS_Unix (CLK_TS_SEC  *p_ts_unix_sec)
+{
+    CLK_TS_SEC   ts_sec;
+    CPU_BOOLEAN  valid;
+
+                                                                /* -------------------- GET CLK TS -------------------- */
+    ts_sec = Clk_GetTS();
+
+                                                                /* -------------- CONV CLK TS TO UNIX TS -------------- */
+    valid  = Clk_TS_ToTS_Unix(ts_sec, p_ts_unix_sec);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_SetTS_Unix()
+*
+* Description : Set Clock timestamp from a Unix timestamp.
+*
+* Argument(s) : ts_unix_sec     Current Unix timestamp to set (in seconds, UTC+00).
+*
+* Return(s)   : DEF_OK,   if timestamp successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) Internal Clock timestamp SHOULD be set for UTC+00 and should NOT include any local
+*                   time zone offset.
+*
+*               (2) Only years supported by Clock & Unix can be set, thus the timestamp date MUST be :
+*
+*                   (a) >= CLK_EPOCH_YR_START
+*                   (b) <  CLK_UNIX_EPOCH_YR_END
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_UNIX_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_SetTS_Unix (CLK_TS_SEC  ts_unix_sec)
+{
+    CLK_TS_SEC   ts_sec;
+    CPU_BOOLEAN  valid;
+
+                                                                /* -------------- CONV UNIX TS TO CLK TS -------------- */
+    valid = Clk_TS_UnixToTS(&ts_sec, ts_unix_sec);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+                                                                /* -------------------- SET CLK TS -------------------- */
+    valid = Clk_SetTS(ts_sec);
+
+    return (valid);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         Clk_TS_ToTS_Unix()
+*
+* Description : Convert Clock timestamp to Unix timestamp.
+*
+* Argument(s) : ts_sec          Timestamp to convert (in seconds, UTC+00).
+*
+*               p_ts_unix_sec   Pointer to variable that will receive the Unix timestamp :
+*
+*                                   In seconds UTC+00,  if NO error(s);
+*                                   CLK_TS_SEC_NONE,    otherwise.
+*
+* Return(s)   : DEF_OK,   if timestamp successfully converted.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Clk_GetTS_Unix(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Returned timestamp does NOT include any time zone offset. Thus any local time
+*                   zone offset SHOULD be applied before or after calling Clk_TS_ToTS_Unix().
+*
+*               (2) Only years supported by Clock & Unix can be converted, thus the timestamp date
+*                   MUST be :
+*
+*                   (a) >= CLK_EPOCH_YR_START
+*                   (b) <  CLK_UNIX_EPOCH_YR_END
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_UNIX_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_TS_ToTS_Unix (CLK_TS_SEC   ts_sec,
+                               CLK_TS_SEC  *p_ts_unix_sec)
+{
+    CLK_TS_SEC  ts_unix_sec;
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE TS PTR ------------------ */
+    if (p_ts_unix_sec == (CLK_TS_SEC *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_ts_unix_sec = CLK_TS_SEC_NONE;                            /* Init to ts none for err (see Note #3).               */
+
+    CLK_TRACE_DBG(("\r\nConvert TS to Unix TS:\r\n"
+                   "    TS = %u\r\n", (unsigned int)ts_sec));
+
+                                                                /* -------------- CONV CLK TS TO UNIX TS -------------- */
+    ts_unix_sec = ts_sec + CLK_UNIX_EPOCH_OFFSET_SEC;
+    if (ts_unix_sec < CLK_UNIX_EPOCH_OFFSET_SEC) {              /* Chk for ovf.                                         */
+        CLK_TRACE_DBG(("    Unix TS conversion has failed\r\n"));
+        return (DEF_FAIL);
+    }
+
+   *p_ts_unix_sec = ts_unix_sec;
+    CLK_TRACE_DBG(("    Unix TS converted = %u\r\n", (unsigned int)*p_ts_unix_sec));
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_TS_UnixToTS()
+*
+* Description : Convert Unix timestamp to Clock timestamp.
+*
+* Argument(s) : p_ts_sec        Pointer to variable that will receive the Clock timestamp :
+*
+*                                   In seconds UTC+00,  if NO error(s);
+*                                   CLK_TS_SEC_NONE,    otherwise.
+*
+*               ts_unix_sec     Unix timestamp value to convert (in seconds, UTC+00).
+*
+* Return(s)   : DEF_OK,   if timestamp successfully converted.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Clk_SetTS_Unix(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Returned timestamp does NOT include any time zone offset. Thus any local time
+*                   zone offset SHOULD be applied before or after calling Clk_TS_UnixToTS().
+*
+*               (2) Only years supported by Clock & Unix can be converted, thus the timestamp date
+*                   MUST be :
+*
+*                   (a) >= CLK_EPOCH_YR_START
+*                   (b) <  CLK_UNIX_EPOCH_YR_END
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_UNIX_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_TS_UnixToTS (CLK_TS_SEC  *p_ts_sec,
+                              CLK_TS_SEC   ts_unix_sec)
+{
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE TS PTR ------------------ */
+    if (p_ts_sec == (CLK_TS_SEC *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_ts_sec = CLK_TS_SEC_NONE;                                 /* Init to ts none for err (see Note #3).               */
+
+    CLK_TRACE_DBG(("Convert Unix TS to TS:\r\n"
+                   "    Unix TS = %u\r\n", (unsigned int)ts_unix_sec));
+
+    if (ts_unix_sec < CLK_UNIX_EPOCH_OFFSET_SEC) {              /* Chk for ovf.                                         */
+        CLK_TRACE_DBG(("TS overflow\r\n"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* -------------- CONV UNIX TS TO CLK TS -------------- */
+   *p_ts_sec = ts_unix_sec - CLK_UNIX_EPOCH_OFFSET_SEC;
+    CLK_TRACE_DBG(("    TS converted = %u\r\n", (unsigned int)*p_ts_sec));
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       Clk_TS_UnixToDateTime()
+*
+* Description : Convert Unix timestamp to a date/time structure.
+*
+* Argument(s) : ts_unix_sec     Timestamp to convert (in seconds,          UTC+00).
+*
+*               tz_sec          Time zone offset     (in seconds, +|- from UTC).
+*
+*               p_date_time     Pointer to variable that will receive the date/time structure.
+*
+* Return(s)   : DEF_OK,   if date/time structure successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (1) (a) Timestamp ('ts_unix_sec') MUST be set for UTC+00 & SHOULD NOT include the time
+*                       zone offset ('tz_sec') since Clk_TS_UnixToDateTime() includes the time zone
+*                       offset in its date/time calculation. Thus the time zone offset SHOULD NOT be
+*                       applied before or after calling Clk_TS_UnixToDateTime().
+*
+*                   (b) Time zone field of the date/time structure ('p_date_time->TZ_sec') is set to
+*                       the value of the time zone argument ('tz_sec').
+*
+*                   (c) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                       (1) Between  +|- 12 hours (+|- 43200 seconds)
+*                       (2) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_UNIX_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_TS_UnixToDateTime (CLK_TS_SEC      ts_unix_sec,
+                                    CLK_TZ_SEC      tz_sec,
+                                    CLK_DATE_TIME  *p_date_time)
+{
+    CPU_BOOLEAN  valid;
+
+                                                                /* ------------ CONV UNIX TS TO DATE/TIME ------------- */
+    CLK_TRACE_DBG(("\r\nConvert TS Unix to Date/time:\r\n"
+                   "    TS to convert= %u\n\r\n",
+                   (unsigned int)ts_unix_sec));
+
+    valid = Clk_TS_ToDateTimeHandler(ts_unix_sec,
+                                     tz_sec,
+                                     p_date_time,
+                                     CLK_UNIX_EPOCH_YR_START,
+                                     CLK_UNIX_EPOCH_YR_END);
+    if (valid != DEF_OK) {
+        CLK_TRACE_DBG(("    Date/time conversion has failed\r\n"));
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       Clk_DateTimeToTS_Unix()
+*
+* Description : Convert a date/time structure to Unix timestamp.
+*
+* Argument(s) : p_ts_sec        Pointer to variable that will receive the Unix timestamp :
+*
+*                                   In seconds UTC+00,  if NO error(s);
+*                                   CLK_TS_SEC_NONE,    otherwise.
+*
+*               p_date_time     Pointer to variable that contains date/time structure to convert.
+*
+* Return(s)   : DEF_OK,   if timestamp successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Date/time structure ('p_date_time') MUST be representable in Unix timestamp.
+*                   Thus date to convert MUST be :
+*
+*                   (a) >= CLK_UNIX_EPOCH_YR_START
+*                   (b) <  CLK_UNIX_EPOCH_YR_END
+*
+*               (2) (a) Date/time ('p_date_time') SHOULD be set to local time with correct  time zone
+*                       offset ('p_date_time->TZ_sec'). Clk_DateTimeToTS_Unix() removes the time zone
+*                       offset from the date/time to calculate & return a Clock timestamp at UTC+00.
+*
+*                   (b) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                       (1) Between  +|- 12 hours (+|- 43200 seconds)
+*                       (2) Multiples of 15 minutes
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_UNIX_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_DateTimeToTS_Unix (CLK_TS_SEC     *p_ts_unix_sec,
+                                    CLK_DATE_TIME  *p_date_time)
+{
+    CPU_BOOLEAN  valid;
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ----------------- VALIDATE TS PTR ------------------ */
+    if (p_ts_unix_sec == (CLK_TS_SEC *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_ts_unix_sec = CLK_TS_SEC_NONE;                            /* Init to ts none for err (see Note #3).               */
+
+
+#if 0                                                           /* Validated in Clk_IsUnixDateTimeValid().              */
+    if (p_date_time == (CLK_DATE_TIME *)0) {                    /* -------------- VALIDATE DATE/TIME PTR -------------- */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ---------------- VALIDATE DATE/TIME ---------------- */
+    valid = Clk_IsUnixDateTimeValid(p_date_time);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+                                                                /* ------------ CONV DATE/TIME TO UNIX TS ------------- */
+    CLK_TRACE_DBG(("Convert Date/time to TS:\r\n"));
+    valid = Clk_DateTimeToTS_Handler(p_ts_unix_sec,
+                                     p_date_time,
+                                     CLK_UNIX_EPOCH_YR_START);
+    if (valid != DEF_OK) {
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       Clk_UnixDateTimeMake()
+*
+* Description : Build a valid Unix epoch date/time structure.
+*
+* Argument(s) : p_date_time     Pointer to variable that will receive the date/time structure.
+*
+*               yr              Year    value [CLK_UNIX_EPOCH_YR_START to CLK_UNIX_EPOCH_YR_END) (see Note #1).
+*
+*               month           Month   value [          CLK_MONTH_JAN to         CLK_MONTH_DEC].
+*
+*               day             Day     value [                      1 to                    31].
+*
+*               hr              Hours   value [                      0 to                    23].
+*
+*               min             Minutes value [                      0 to                    59].
+*
+*               sec             Seconds value [                      0 to                    60] (see Note #3).
+*
+*               tz_sec          Time zone offset (in seconds, +|- from UTC) [-43200 to 43200].
+*
+* Return(s)   : DEF_OK,   if date/time structure successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Date/time structure ('p_date_time') MUST be representable in Unix timestamp.
+*                   Thus date to convert MUST be :
+*
+*                   (a) >= CLK_UNIX_EPOCH_YR_START
+*                   (b) <  CLK_UNIX_EPOCH_YR_END
+*
+*               (2) Day of week ('p_date_time->DayOfWk') and Day of year ('p_date_time->DayOfYr')
+*                   are internally calculated and set in the date/time structure if date is valid.
+*
+*               (3) Seconds value of 60 is valid to be compatible with leap second adjustment and
+*                   the atomic clock time structure.
+*
+*               (4) Time zone is based ('tz_sec') on Coordinated Universal Time (UTC) & has valid
+*                   values :
+*
+*                   (a) Between  +|- 12 hours (+|- 43200 seconds)
+*                   (b) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_UNIX_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_UnixDateTimeMake (CLK_DATE_TIME  *p_date_time,
+                                   CLK_YR          yr,
+                                   CLK_MONTH       month,
+                                   CLK_DAY         day,
+                                   CLK_HR          hr,
+                                   CLK_MIN         min,
+                                   CLK_SEC         sec,
+                                   CLK_TZ_SEC      tz_sec)
+{
+    CPU_BOOLEAN  valid;
+
+                                                                /* ---------- VALIDATE & CONV UNIX DATE/TIME ---------- */
+    valid = Clk_DateTimeMakeHandler(p_date_time,
+                                    yr,
+                                    month,
+                                    day,
+                                    hr,
+                                    min,
+                                    sec,
+                                    tz_sec,
+                                    CLK_UNIX_EPOCH_YR_START,
+                                    CLK_UNIX_EPOCH_YR_END);
+    if (valid != DEF_YES) {
+        return  (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      Clk_IsUnixDateTimeValid()
+*
+* Description : Determine if date/time structure is valid in Unix epoch.
+*
+* Argument(s) : p_date_time     Pointer to variable that contains the date/time structure to validate.
+*
+* Return(s)   : DEF_YES, if date/time structure is valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Clk_DateTimeToTS_Unix(),
+*               Application.
+*
+*               This function is a Clock module application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Date/time structure ('p_date_time') MUST be representable in Unix epoch. Thus
+*                   date to validate MUST be :
+*
+*                   (a) >= CLK_UNIX_EPOCH_YR_START
+*                   (b) <  CLK_UNIX_EPOCH_YR_END
+*
+*               (2) Time zone is based ('p_date_time->TZ_sec') on Coordinated Universal Time (UTC)
+*                   & has valid values :
+*
+*                   (a) Between  +|- 12 hours (+|- 43200 seconds)
+*                   (b) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_UNIX_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_IsUnixDateTimeValid (CLK_DATE_TIME  *p_date_time)
+{
+    CPU_BOOLEAN  valid;
+
+                                                                /* ------------- VALIDATE UNIX DATE/TIME -------------- */
+    CLK_TRACE_DBG(("Validate Unix date/time: "));
+
+    valid = Clk_IsDateTimeValidHandler(p_date_time,
+                                       CLK_UNIX_EPOCH_YR_START,
+                                       CLK_UNIX_EPOCH_YR_END);
+    if (valid != DEF_YES) {
+        CLK_TRACE_DBG(("Fail\r\n"));
+        return  (DEF_FAIL);
+    }
+
+    CLK_TRACE_DBG(("Ok\r\n"));
+
+    return (DEF_YES);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           Clk_IsLeapYr()
+*
+* Description : Determines if year is a leap year.
+*
+* Argument(s) : yr          Year value [1900 to  2135].
+*
+* Return(s)   : DEF_YES, if 'yr' is     a leap year.
+*
+*               DEF_NO,  if 'yr' is NOT a leap year.
+*
+* Caller(s)   : Clk_IsDateValid(),
+*               Clk_IsDayOfYrValid(),
+*               Clk_GetDayOfYrHandler(),
+*               Clk_GetDayOfWkHandler(),
+*               Clk_TS_ToDateTimeHandler(),
+*               Clk_DateTimeToTS_Handler().
+*
+* Note(s)     : (1) (a) Most years that are evenly divisible by 4 are leap years; ...
+*                   (b) (1) except years that are evenly divisible by 100,        ...
+*                       (2) unless they  are also evenly divisible by 400.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_IsLeapYr (CLK_YR  yr)
+{
+    CPU_BOOLEAN  leap_yr;
+
+
+    leap_yr = ( ((yr %   4u) == 0u) &&                          /* Chk for leap yr (see Note #1).                       */
+               (((yr % 100u) != 0u) || ((yr % 400u) == 0u))) ? DEF_YES : DEF_NO;
+
+    return (leap_yr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_IsDateValid()
+*
+* Description : Determine if date values are valid.
+*
+* Argument(s) : yr          Year  value [yr_start to  yr_end].
+*
+*               month       Month value [       1 to      12] / [CLK_MONTH_JAN to CLK_MONTH_DEC].
+*
+*               day         Day   value [       1 to      31].
+*
+*               yr_start    Start year of the epoch.
+*
+*               yr_end      End   year of the epoch.
+*
+* Return(s)   : DEF_YES, if date is valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Clk_GetDayOfWk(),
+*               Clk_IsDateTimeValidHandler(),
+*               Clk_DateTimeMakeHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_IsDateValid (CLK_YR     yr,
+                                      CLK_MONTH  month,
+                                      CLK_DAY    day,
+                                      CLK_YR     yr_start,
+                                      CLK_YR     yr_end)
+{
+    CPU_BOOLEAN  leap_yr;
+    CPU_INT08U   leap_yr_ix;
+    CLK_DAY      days_in_month;
+
+                                                                /* ------------------- VALIDATE YR -------------------- */
+    if ((yr <  yr_start) ||
+        (yr >= yr_end  )) {
+         CLK_TRACE_DBG(("Invalid year, must be > %u & < %u\r\n",
+                        (unsigned int)yr_end,
+                        (unsigned int)yr_start));
+         return (DEF_NO);
+    }
+
+                                                                /* ------------------ VALIDATE MONTH ------------------ */
+    if ((month < CLK_FIRST_MONTH_OF_YR) ||
+        (month > CLK_MONTH_PER_YR     )) {
+        CLK_TRACE_DBG(("Invalid year, must be >= %u & < %u\r\n",
+                       (unsigned int)CLK_FIRST_MONTH_OF_YR,
+                       (unsigned int)CLK_MONTH_PER_YR));
+        return (DEF_NO);
+    }
+
+                                                                /* ------------------- VALIDATE DAY ------------------- */
+    leap_yr       =  Clk_IsLeapYr(yr);
+    leap_yr_ix    = (leap_yr == DEF_YES) ? 1u : 0u;
+    days_in_month =  Clk_DaysInMonth[leap_yr_ix][month - CLK_FIRST_MONTH_OF_YR];
+    if ((day < CLK_FIRST_DAY_OF_MONTH) ||
+        (day > days_in_month         )) {
+         CLK_TRACE_DBG(("Invalid day, must be > %u & < %u\r\n",
+                        (unsigned int)CLK_FIRST_DAY_OF_MONTH,
+                        (unsigned int)days_in_month));
+         return (DEF_NO);
+    }
+
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Clk_IsDayOfYrValid()
+*
+* Description : Determine if day of year is valid.
+*
+* Argument(s) : yr          Year        value [1900 to 2135].
+*
+*               day_of_yr   Day of year value [1    to   31].
+*
+* Return(s)   : DEF_YES, if day of year is valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Clk_IsDateTimeValidHandler(),
+*               Clk_TS_ToDateTimeHandler(),
+*               Clk_DateTimeMakeHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_IsDayOfYrValid (CLK_YR   yr,
+                                         CLK_DAY  day_of_yr)
+{
+    CPU_BOOLEAN  leap_yr;
+    CPU_INT08U   leap_yr_ix;
+    CLK_DAY      yr_days_max;
+
+                                                                /* ---------------- VALIDATE DAY OF YR ---------------- */
+    leap_yr     =  Clk_IsLeapYr(yr);
+    leap_yr_ix  = (leap_yr == DEF_YES) ? 1u : 0u;
+    yr_days_max =  Clk_DaysInYr[leap_yr_ix];
+    if ((day_of_yr < CLK_FIRST_DAY_OF_YR) ||
+        (day_of_yr > yr_days_max        )) {
+        CLK_TRACE_DBG(("Invalid day of year, must be >= %u & < %u\r\n",
+                       (unsigned int)CLK_FIRST_DAY_OF_YR,
+                       (unsigned int)yr_days_max));
+        return (DEF_NO);
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Clk_IsDayOfWkValid()
+*
+* Description : Determine if day of week is valid.
+*
+* Argument(s) : day_of_wk   Day of week value [1 to 7] / [CLK_DAY_OF_WK_SUN to CLK_DAY_OF_WK_SAT].
+*
+* Return(s)   : DEF_YES, if day of week is valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Clk_IsDateTimeValidHandler(),
+*               Clk_TS_ToDateTimeHandler(),
+*               Clk_DateTimeMakeHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_IsDayOfWkValid (CLK_DAY  day_of_wk)
+{
+                                                                /* ---------------- VALIDATE DAY OF WK ---------------- */
+    if ((day_of_wk < CLK_FIRST_DAY_OF_WK    ) ||
+        (day_of_wk > DEF_TIME_NBR_DAY_PER_WK)) {
+        CLK_TRACE_DBG(("Invalid day of week, must be >= %u & < %u\r\n",
+                       (unsigned int)CLK_FIRST_DAY_OF_WK,
+                       (unsigned int)DEF_TIME_NBR_DAY_PER_WK));
+        return (DEF_NO);
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_IsTimeValid()
+*
+* Description : Determine if time values are valid.
+*
+* Argument(s) : hr          Hours   value [0 to 23].
+*
+*               min         Minutes value [0 to 59].
+*
+*               sec         Seconds value [0 to 60] (see Note #1).
+*
+* Return(s)   : DEF_YES, if time is valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Clk_IsDateTimeValidHandler(),
+*               Clk_TS_ToDateTimeHandler(),
+*               Clk_DateTimeMakeHandler().
+*
+* Note(s)     : (1) Seconds value of 60 is valid to be compatible with leap second adjustment and
+*                   the atomic clock time structure.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_IsTimeValid (CLK_HR     hr,
+                                      CLK_MONTH  min,
+                                      CLK_DAY    sec)
+{
+                                                                /* ------------------ VALIDATE HOUR ------------------- */
+    if (hr  >= DEF_TIME_NBR_HR_PER_DAY) {
+        CLK_TRACE_DBG(("Invalid hour, must be < %u\r\n",    (unsigned int)DEF_TIME_NBR_HR_PER_DAY));
+        return (DEF_NO);
+    }
+
+                                                                /* ------------------- VALIDATE MIN ------------------- */
+    if (min >= DEF_TIME_NBR_MIN_PER_HR) {
+        CLK_TRACE_DBG(("Invalid minute, must be < %u\r\n",  (unsigned int)DEF_TIME_NBR_MIN_PER_HR));
+        return (DEF_NO);
+    }
+
+                                                                /* ------------------- VALIDATE SEC ------------------- */
+    if (sec >  DEF_TIME_NBR_SEC_PER_MIN) {
+        CLK_TRACE_DBG(("Invalid second, must be =< %u\r\n", (unsigned int)DEF_TIME_NBR_SEC_PER_MIN));
+        return (DEF_NO);
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Clk_IsTZValid()
+*
+* Description : Determine if time zone is valid.
+*
+* Argument(s) : tz_sec      Time zone offset (in seconds, +|- from UTC) [-43200 to 43200].
+*
+* Return(s)   : DEF_YES, if time zone is valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Clk_SetTZ(),
+*               Clk_IsDateTimeValidHandler(),
+*               Clk_DateTimeMakeHandler().
+*
+* Note(s)     : (1) Time zone is based ('tz_sec') on Coordinated Universal Time (UTC) & has valid values :
+*
+*                   (a) Between  +|- 12 hours (+|- 43200 seconds)
+*                   (b) Multiples of 15 minutes
+*
+*               (2) Absolute value of the time zone offset is stored into 'CLK_TS_SEC' data type to be
+*                   compliant with unsigned integer verification/operations.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_IsTZValid (CLK_TZ_SEC  tz_sec)
+{
+    CLK_TS_SEC  tz_sec_abs;                                     /* See Note #2.                                         */
+
+                                                                /* -------------- VALIDATE TZ PRECISION --------------- */
+    tz_sec_abs = (CLK_TS_SEC)DEF_ABS(tz_sec);
+    if ((tz_sec_abs % CLK_TZ_SEC_PRECISION) != 0u) {            /* See Note #1b.                                        */
+        CLK_TRACE_DBG(("Invalid time zone, must be multiple of %d seconds\r\n",
+                       (  signed int)CLK_TZ_SEC_PRECISION));
+        return (DEF_NO);
+    }
+
+                                                                /* --------------- VALIDATE TZ MIN-MAX ---------------- */
+    if (tz_sec_abs > CLK_TZ_SEC_MAX) {                          /* See Note #1a.                                        */
+        CLK_TRACE_DBG(("Invalid time zone, must be > %d & < %u\r\n",
+                       (  signed int)CLK_TZ_SEC_MIN,
+                       (unsigned int)CLK_TZ_SEC_MAX));
+        return (DEF_NO);
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    Clk_IsDateTimeValidHandler()
+*
+* Description : Determine if date/time structure is valid.
+*
+* Argument(s) : p_date_time     Pointer to variable that contains the date/time structure to validate.
+*
+*               yr_start        Start year of the epoch.
+*
+*               yr_end          End   year of the epoch.
+*
+* Return(s)   : DEF_YES, date/time structure is valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Clk_IsDateTimeValid(),
+*               Clk_IsNTP_DateTimeValid(),
+*               Clk_IsUnixDateTimeValid(),
+*               Clk_DateTimeToStr().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_IsDateTimeValidHandler (CLK_DATE_TIME  *p_date_time,
+                                                 CLK_YR          yr_start,
+                                                 CLK_YR          yr_end)
+{
+    CPU_BOOLEAN  valid;
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* -------------- VALIDATE DATE/TIME PTR -------------- */
+    if (p_date_time == (CLK_DATE_TIME *)0) {
+        return (DEF_NO);
+    }
+#endif
+
+                                                                /* ------------------ VALIDATE DATE ------------------- */
+    valid = Clk_IsDateValid(p_date_time->Yr, p_date_time->Month, p_date_time->Day, yr_start, yr_end);
+    if (valid != DEF_YES) {
+        return  (DEF_NO);
+    }
+
+                                                                /* ------------------ VALIDATE TIME ------------------- */
+    valid = Clk_IsTimeValid(p_date_time->Hr, p_date_time->Min, p_date_time->Sec);
+    if (valid != DEF_YES) {
+        return  (DEF_NO);
+    }
+
+                                                                /* ---------------- VALIDATE DAY OF WK ---------------- */
+    valid = Clk_IsDayOfWkValid(p_date_time->DayOfWk);
+    if (valid != DEF_YES) {
+        return  (DEF_NO);
+    }
+
+                                                                /* ---------------- VALIDATE DAY OF YR ---------------- */
+    valid = Clk_IsDayOfYrValid(p_date_time->Yr, p_date_time->DayOfYr);
+    if (valid != DEF_YES) {
+        return  (DEF_NO);
+    }
+
+                                                                /* ------------------- VALIDATE TZ -------------------- */
+    valid = Clk_IsTZValid(p_date_time->TZ_sec);
+    if (valid != DEF_YES) {
+        return  (DEF_NO);
+    }
+
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       Clk_GetDayOfYrHandler()
+*
+* Description : Get the day of year.
+*
+* Argument(s) : yr          Year  value [1900 to 2135].
+*               --          Argument checked in Clk_TS_ToDateTimeHandler(),
+*                                               Clk_DateTimeMakeHandler().
+*
+*               month       Month value [1 to 12] / [CLK_MONTH_JAN to CLK_MONTH_DEC].
+*               -----       Argument checked in Clk_TS_ToDateTimeHandler(),
+*                                               Clk_DateTimeMakeHandler().
+*
+*               day         Day   value [1 to 31].
+*               ---         Argument checked in Clk_TS_ToDateTimeHandler(),
+*                                               Clk_DateTimeMakeHandler().
+*
+* Return(s)   : Day of year [1 to 366].
+*
+* Caller(s)   : Clk_TS_ToDateTimeHandler(),
+*               Clk_DateTimeMakeHandler().
+*
+* Note(s)     : (1) Since global performance can be affected by the calculation of the days of year some
+*                   caches have been implemented:
+*
+*                   (a) Clk_CacheMonth store the month requested.
+*
+*                   (b) Clk_CacheMonthDays store the number of days calculated for the month stored in
+*                       Clk_CacheMonth
+*********************************************************************************************************
+*/
+
+static  CLK_DAY  Clk_GetDayOfYrHandler (CLK_YR     yr,
+                                        CLK_MONTH  month,
+                                        CLK_DAY    day)
+{
+    CPU_BOOLEAN  leap_yr;
+    CPU_INT08U   leap_yr_ix;
+    CLK_MONTH    month_ix;
+    CLK_DAY      day_of_yr;
+    CLK_DAY      days_month;
+    CLK_DAY      days_in_month;
+
+
+    CLK_TRACE_DBG(("Day of year of  %u, %u, %u = ",
+                   (unsigned int)day,
+                   (unsigned int)month,
+                   (unsigned int)yr));
+
+    day_of_yr  =  day - CLK_FIRST_DAY_OF_MONTH;
+    leap_yr    =  Clk_IsLeapYr(yr);
+    leap_yr_ix = (leap_yr == DEF_YES) ? 1u : 0u;
+
+    if (Clk_CacheMonth != month) {                              /* See Note #1a.                                        */
+        days_month = 0u;
+        for (month_ix = CLK_FIRST_MONTH_OF_YR; month_ix < month; month_ix++) {
+            days_in_month  = Clk_DaysInMonth[leap_yr_ix][month_ix - CLK_FIRST_MONTH_OF_YR];
+            days_month    += days_in_month;
+        }
+
+        Clk_CacheMonth     = month;                             /* See Note #1a.                                        */
+        Clk_CacheMonthDays = days_month;                        /* See Note #1b.                                        */
+
+    } else {
+        days_month = Clk_CacheMonthDays;                        /* See Note #1b.                                        */
+    }
+
+    day_of_yr += days_month;
+    day_of_yr += CLK_FIRST_DAY_OF_YR;
+    CLK_TRACE_DBG(("Day of year = %u\r\n", (unsigned int)day_of_yr));
+
+    return (day_of_yr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       Clk_GetDayOfWkHandler()
+*
+* Description : Get the day of week.
+*
+* Argument(s) : yr          Year  value [1900 to 2135].
+*               --          Argument checked in Clk_GetDayOfWk(),
+*                                               Clk_TS_ToDateTimeHandler(),
+*                                               Clk_DateTimeMakeHandler().
+*
+*               month       Month value [1 to 12] / [CLK_MONTH_JAN to CLK_MONTH_DEC].
+*               -----       Argument checked in Clk_GetDayOfWk(),
+*                                               Clk_TS_ToDateTimeHandler(),
+*                                               Clk_DateTimeMakeHandler().
+*
+*               day         Day   value [1 to 31].
+*               ---         Argument checked in Clk_GetDayOfWk(),
+*                                               Clk_TS_ToDateTimeHandler(),
+*                                               Clk_DateTimeMakeHandler().
+*
+* Return(s)   : Day of week [1 to 7] / [CLK_DAY_OF_WK_SUN to CLK_DAY_OF_WK_SAT].
+*
+* Caller(s)   : Clk_GetDayOfWk(),
+*               Clk_TS_ToDateTimeHandler(),
+*               Clk_DateTimeMakeHandler().
+*
+* Note(s)     : (1) Finds the day of week at the earliest supported year (NTP) and its first day of week :
+*
+*                   (a) CLK_NTP_EPOCH_YR_START
+*                   (b) CLK_NTP_EPOCH_DAY_OF_WK
+*
+*               (2) Since global performance can be affected by the calculation of the days of week some
+*                   caches have been implemented:
+*
+*                   (a) Clk_CacheMonth store the last month requested.
+*
+*                   (b) Clk_CacheMonthDays store the last number of days calculated for the month stored in
+*                       Clk_CacheMonth.
+*
+*                   (c) Clk_CacheYr store the last year requested.
+*
+*                   (d) Clk_CacheYrDays store the last number of days calculated for the year stored in
+*                       Clk_CacheYr.
+*********************************************************************************************************
+*/
+
+static  CLK_DAY  Clk_GetDayOfWkHandler (CLK_YR     yr,
+                                        CLK_MONTH  month,
+                                        CLK_DAY    day)
+{
+    CPU_BOOLEAN   leap_yr;
+    CPU_INT08U    leap_yr_ix;
+    CLK_YR        yr_ix;
+    CLK_MONTH     month_ix;
+    CLK_DAY       day_of_wk;
+    CLK_DAY       days_in_month;
+    CLK_DAY       days_month;
+    CLK_NBR_DAYS  days_yr;
+    CLK_NBR_DAYS  days;
+
+
+    CLK_TRACE_DBG(("Day of week of  %u, %u, %u = ",
+                   (unsigned int)day,
+                   (unsigned int)month,
+                   (unsigned int)yr));
+
+    days       =  day - CLK_FIRST_DAY_OF_MONTH;
+    leap_yr    =  Clk_IsLeapYr(yr);
+    leap_yr_ix = (leap_yr == DEF_YES) ? 1u : 0u;
+
+    if (Clk_CacheMonth != month) {                              /* See Note #2a.                                        */
+        days_month = 0u;
+        for (month_ix = CLK_FIRST_MONTH_OF_YR; month_ix < month; month_ix++) {
+            days_in_month  = Clk_DaysInMonth[leap_yr_ix][month_ix - CLK_FIRST_MONTH_OF_YR];
+            days_month    += days_in_month;
+        }
+
+        Clk_CacheMonth     = month;                             /* See Note #2a.                                        */
+        Clk_CacheMonthDays = days_month;                        /* See Note #2b.                                        */
+
+    } else {
+        days_month = Clk_CacheMonthDays;                        /* See Note #2b.                                        */
+    }
+
+
+    if (Clk_CacheYr != yr) {                                    /* See Note #2c.                                        */
+        days_yr = 0u;
+                                                                /* See Note #1a.                                        */
+        for (yr_ix = CLK_NTP_EPOCH_YR_START; yr_ix < yr; yr_ix++) {
+            leap_yr     =  Clk_IsLeapYr(yr_ix);
+            leap_yr_ix  = (leap_yr == DEF_YES) ? 1u : 0u;
+            days_yr    +=  Clk_DaysInYr[leap_yr_ix];
+        }
+
+        Clk_CacheYr     = yr;                                   /* See Note #2c.                                        */
+        Clk_CacheYrDays = days_yr;                              /* See Note #2d.                                        */
+
+    } else {
+        days_yr = Clk_CacheYrDays;                              /* See Note #2b.                                        */
+    }
+
+
+    days      += days_month;
+    days      += days_yr;
+    days      += CLK_NTP_EPOCH_DAY_OF_WK;                       /* See Note #1b.                                        */
+    days      -= CLK_FIRST_DAY_OF_WK;
+    day_of_wk  = days % DEF_TIME_NBR_DAY_PER_WK;
+    day_of_wk += CLK_FIRST_DAY_OF_WK;
+    CLK_TRACE_DBG(("Day of week = %u)\r\n", (unsigned int)day_of_wk));
+
+    return (day_of_wk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Clk_SetTZ_Handler()
+*
+* Description : Set Clock time zone offset.
+*
+* Argument(s) : tz_sec      Time zone offset (in seconds, +|- from UTC).
+*               ------      Argument checked by Clk_SetTZ(),
+*                                               Clk_SetDateTime().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Clk_SetTZ(),
+*               Clk_SetDateTime().
+*
+* Note(s)     : (1) 'Clk_TZ_sec' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+static  void  Clk_SetTZ_Handler (CLK_TZ_SEC  tz_sec)
+{
+    CPU_SR_ALLOC();
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ------------------- VALIDATE PTR ------------------- */
+    CPU_CRITICAL_ENTER();
+    if (Clk_Ptr == DEF_NULL) {                                  /* Validate Clk data ptr.                               */
+        CPU_CRITICAL_EXIT();
+        CPU_SW_EXCEPTION(;);
+    }
+    CPU_CRITICAL_EXIT();
+#endif
+
+                                                                /* ---------------------- SET TZ ---------------------- */
+    CPU_CRITICAL_ENTER();
+    Clk_Ptr->Clk_TZ_sec = tz_sec;
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+*********************************************************************************************************
+*                                     Clk_TS_ToDateTimeHandler()
+*
+* Description : Convert any type of timestamp to date/time structure.
+*
+* Argument(s) : ts_sec          Timestamp to convert (in seconds,          UTC+00).
+*
+*               tz_sec          Time zone offset     (in seconds, +|- from UTC).
+*
+*               p_date_time     Pointer to variable that contains the date/time structure to validate.
+*
+*               yr_start        Start year of the epoch.
+*
+*               yr_end          End   year of the epoch.
+*
+* Return(s)   : DEF_OK,   if date/time structure is valid.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Clk_TS_ToDateTime(),
+*               Clk_TS_NTP_ToDateTime(),
+*               Clk_TS_UnixToDateTime().
+*
+* Note(s)     : (1) (a) Timestamp ('ts_sec') MUST be set for UTC+00 & SHOULD NOT include the time
+*                       zone offset ('tz_sec') since Clk_TS_ToDateTimeHandler() includes the time
+*                       zone offset in its date/time calculation. Thus the time zone offset SHOULD
+*                       NOT be applied before or after calling Clk_TS_ToDateTimeHandler().
+*
+*                   (b) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                       (1) Between  +|- 12 hours (+|- 43200 seconds)
+*                       (2) Multiples of 15 minutes
+*
+*                   (c) Timestamp MUST be adjusted by adding timezone offset ('tz_sec') :
+*
+*                       (1) For negative timezone offset, it's subtracted
+*                       (2) For positive timezone offset, it's added
+*
+*                   (d) Time zone field of the date/time structure ('p_date_time->TZ_sec') is set
+*                       to the value of time zone argument ('tz_sec').
+*
+*               (2) Absolute value of the time zone offset is stored into 'CLK_TS_SEC' data type to be
+*                   compliant with unsigned integer verification/operations.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_TS_ToDateTimeHandler (CLK_TS_SEC      ts_sec,
+                                               CLK_TZ_SEC      tz_sec,
+                                               CLK_DATE_TIME  *p_date_time,
+                                               CLK_YR          yr_start,
+                                               CLK_YR          yr_end)
+{
+    CLK_TS_SEC    ts_sec_rem;
+    CLK_TS_SEC    tz_sec_abs;                                   /* See Note #2.                                         */
+    CLK_TS_SEC    sec_to_remove;
+    CLK_NBR_DAYS  days_in_yr;
+    CLK_DAY       days_in_month;
+    CPU_INT08U    leap_yr_ix;
+    CPU_BOOLEAN   leap_yr;
+    CPU_BOOLEAN   valid;
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* -------------- VALIDATE DATE/TIME PTR -------------- */
+    if (p_date_time == (CLK_DATE_TIME *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ------------ ADJ INIT TS FOR TZ OFFSET ------------- */
+    ts_sec_rem = ts_sec;
+    tz_sec_abs = (CLK_TS_SEC)DEF_ABS(tz_sec);
+    if (tz_sec < 0) {
+        if (ts_sec_rem < tz_sec_abs) {                          /* Chk for ovf when tz is neg.                          */
+            CLK_TRACE_DBG(("    Timestamp is too small to substract time zone offset\r\n"));
+            return (DEF_FAIL);
+        }
+        ts_sec_rem -= tz_sec_abs;                               /* See Note #1c1.                                       */
+
+    } else {
+        ts_sec_rem += tz_sec_abs;                               /* See Note #1c2.                                       */
+        if (ts_sec_rem < tz_sec_abs) {                          /* Chk for ovf when tz is pos.                          */
+            CLK_TRACE_DBG(("    Timestamp is too big to add time zone offset\r\n"));
+            return (DEF_FAIL);
+        }
+    }
+
+
+                                                                /* ---------------------- GET YR ---------------------- */
+    p_date_time->Yr =  yr_start;
+    leap_yr         =  Clk_IsLeapYr(p_date_time->Yr);
+    leap_yr_ix      = (leap_yr == DEF_YES) ? 1u : 0u;
+    days_in_yr      =  Clk_DaysInYr[leap_yr_ix];
+    sec_to_remove   =  days_in_yr * DEF_TIME_NBR_SEC_PER_DAY;
+    while ((ts_sec_rem      >= sec_to_remove) &&
+           (p_date_time->Yr <  yr_end)) {
+        ts_sec_rem    -=  sec_to_remove;
+        p_date_time->Yr++;
+        leap_yr        =  Clk_IsLeapYr(p_date_time->Yr);
+        leap_yr_ix     = (leap_yr == DEF_YES) ? 1u : 0u;
+        days_in_yr     =  Clk_DaysInYr[leap_yr_ix];
+        sec_to_remove  =  days_in_yr * DEF_TIME_NBR_SEC_PER_DAY;
+    }
+
+    if (p_date_time->Yr >= yr_end) {
+        CLK_TRACE_DBG(("    Year conversion has failed\r\n"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* -------------------- GET MONTH --------------------- */
+    p_date_time->Month =  CLK_FIRST_MONTH_OF_YR;
+#if 0                                                           /* Already determined in 'GET YR'.                      */
+    leap_yr            =  Clk_IsLeapYr(p_date_time->Yr);
+    leap_yr_ix         = (leap_yr == DEF_YES) ? 1u : 0u;
+#endif
+    days_in_month      =  Clk_DaysInMonth[leap_yr_ix][p_date_time->Month - CLK_FIRST_MONTH_OF_YR];
+    sec_to_remove      =  days_in_month * DEF_TIME_NBR_SEC_PER_DAY;
+    while ((ts_sec_rem         >= sec_to_remove) &&
+           (p_date_time->Month <  CLK_MONTH_PER_YR)) {
+        ts_sec_rem    -=  sec_to_remove;
+        p_date_time->Month++;
+        days_in_month  =  Clk_DaysInMonth[leap_yr_ix][p_date_time->Month - CLK_FIRST_MONTH_OF_YR];
+        sec_to_remove  =  days_in_month * DEF_TIME_NBR_SEC_PER_DAY;
+    }
+
+    if (p_date_time->Month > CLK_MONTH_PER_YR) {
+        CLK_TRACE_DBG(("    Month conversion has failed\r\n"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------------------- GET DAY ---------------------- */
+    sec_to_remove     = DEF_TIME_NBR_SEC_PER_DAY;
+    p_date_time->Day  = (CLK_DAY)(ts_sec_rem / sec_to_remove);
+    p_date_time->Day += CLK_FIRST_DAY_OF_MONTH;
+    ts_sec_rem        = ts_sec_rem % sec_to_remove;
+#if 0                                                           /* Already determined in 'GET MONTH'.                   */
+    days_in_month     = Clk_DaysInMonth[leap_yr_ix][p_date_time->Month - CLK_FIRST_MONTH_OF_YR];
+#endif
+
+    if (p_date_time->Day > days_in_month) {
+         CLK_TRACE_DBG(("    Day conversion has failed\r\n"));
+         return (DEF_FAIL);
+    }
+
+                                                                /* ------------------ GET DAY OF WK ------------------- */
+    p_date_time->DayOfWk = Clk_GetDayOfWkHandler(p_date_time->Yr,
+                                                 p_date_time->Month,
+                                                 p_date_time->Day);
+    valid                = Clk_IsDayOfWkValid(p_date_time->DayOfWk);
+
+    if ((p_date_time->Day  > days_in_month) ||
+        (valid            == DEF_NO)) {
+        CLK_TRACE_DBG(("    Day conversion has failed\r\n"));
+        return (DEF_FAIL);
+    }
+
+    p_date_time->DayOfYr = Clk_GetDayOfYrHandler(p_date_time->Yr,
+                                                 p_date_time->Month,
+                                                 p_date_time->Day);
+    valid                = Clk_IsDayOfYrValid(p_date_time->Yr,
+                                              p_date_time->DayOfYr);
+    if (valid != DEF_OK) {
+        CLK_TRACE_DBG(("    Day of year conversion has failed\r\n"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------------------- GET HR ----------------------- */
+    sec_to_remove       =          DEF_TIME_NBR_SEC_PER_HR;
+    p_date_time->Hr     = (CLK_HR)(ts_sec_rem / sec_to_remove);
+    ts_sec_rem          =          ts_sec_rem % sec_to_remove;
+
+                                                                /* --------------------- GET MIN ---------------------- */
+    sec_to_remove       =           DEF_TIME_NBR_SEC_PER_MIN;
+    p_date_time->Min    = (CLK_MIN)(ts_sec_rem / sec_to_remove);
+    ts_sec_rem          =           ts_sec_rem % sec_to_remove;
+
+                                                                /* --------------------- GET SEC ---------------------- */
+    p_date_time->Sec    = (CLK_SEC) ts_sec_rem;
+
+                                                                /* --------------------- GET TZ ----------------------- */
+    p_date_time->TZ_sec =           tz_sec;
+
+
+                                                                /* ------------------ VALIDATE TIME ------------------- */
+    valid = Clk_IsTimeValid(p_date_time->Hr, p_date_time->Min, p_date_time->Sec);
+    if (valid != DEF_OK) {
+        CLK_TRACE_DBG(("    Time conversion has failed\r\n"));
+        return  (DEF_FAIL);
+    }
+
+    CLK_TRACE_DBG(("Date/time converted:  \r\n"
+                   "     Year         = %u\r\n"
+                   "     Month        = %u\r\n"
+                   "     Day          = %u\r\n"
+                   "     Hour         = %u\r\n"
+                   "     Minutes      = %u\r\n"
+                   "     Seconds      = %u\r\n"
+                   "     Time zone    = %d\r\n",
+                   (unsigned int)p_date_time->Yr,
+                   (unsigned int)p_date_time->Month,
+                   (unsigned int)p_date_time->Day,
+                   (unsigned int)p_date_time->Hr,
+                   (unsigned int)p_date_time->Min,
+                   (unsigned int)p_date_time->Sec,
+                   (  signed int)p_date_time->TZ_sec));
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     Clk_DateTimeToTS_Handler()
+*
+* Description : Convert date/time structure to any type of timestamp.
+*
+* Argument(s) : p_ts_sec        Pointer to variable that will receive the timestamp :
+*               --------
+*                                   In seconds UTC+00,  if NO error(s);
+*                                   CLK_TS_SEC_NONE,    otherwise.
+*
+*                               Argument checked in Clk_DateTimeToTS(),
+*                                                   Clk_DateTimeToTS_NTP(),
+*                                                   Clk_DateTimeToTS_Unix().
+*
+*               p_date_time     Pointer to variable that contains the date/time structure to validate.
+*               -----------     Argument checked in Clk_DateTimeToTS(),
+*                                                   Clk_DateTimeToTS_NTP(),
+*                                                   Clk_DateTimeToTS_Unix().
+*
+*               yr_start        Start year of the epoch.
+*
+* Return(s)   : DEF_OK,   if timestamp is valid.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Clk_DateTimeToTS(),
+*               Clk_DateTimeToTS_NTP(),
+*               Clk_DateTimeToTS_Unix().
+*
+* Note(s)     : (1) (a) Date/time ('p_date_time') SHOULD be set to local time with correct time zone
+*                       offset ('p_date_time->TZ_sec'). Clk_DateTimeToTS_Handler() removes the time
+*                       zone offset from the date/time to calculate & return a Clock timestamp at
+*                       UTC+00.
+
+*                   (b) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*                       (1) Between  +|- 12 hours (+|- 43200 seconds)
+*                       (2) Multiples of 15 minutes
+*
+*                   (c) Timestamp MUST be adjusted by subtracting timezone offset ('p_date_time->TZ_sec') :
+*
+*                       (1) For negative timezone offset, it's added
+*                       (2) For positive timezone offset, it's subtracted
+*
+*               (2) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*                   (a) However, some pointers may already be initialized by calling functions. These
+*                       pointers do NOT need to be re-initialized but are shown for completeness.
+*
+*               (3) Absolute value of the time zone offset is stored into 'CLK_TS_SEC' data type to be
+*                   compliant with unsigned integer verification/operations.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_DateTimeToTS_Handler (CLK_TS_SEC     *p_ts_sec,
+                                               CLK_DATE_TIME  *p_date_time,
+                                               CLK_YR          yr_start)
+{
+    CPU_BOOLEAN   leap_yr;
+    CPU_INT08U    leap_yr_ix;
+    CLK_YR        yr_ix;
+    CLK_MONTH     month_ix;
+    CLK_NBR_DAYS  nbr_days;
+    CLK_TS_SEC    ts_sec;
+    CLK_TS_SEC    tz_sec_abs;                                   /* See Note #3.                                         */
+
+
+#if 0                                                           /* See Note #2a.                                        */
+   *p_ts_sec = CLK_TS_SEC_NONE;                                 /* Init to ts none for err (see Note #2).               */
+#endif
+
+    CLK_TRACE_DBG(("Date/time converted:  \r\n"
+                   "     Year         = %u\r\n"
+                   "     Month        = %u\r\n"
+                   "     Day          = %u\r\n"
+                   "     Hour         = %u\r\n"
+                   "     Minutes      = %u\r\n"
+                   "     Seconds      = %u\r\n"
+                   "     Time zone    = %d\r\n",
+                   (unsigned int)p_date_time->Yr,
+                   (unsigned int)p_date_time->Month,
+                   (unsigned int)p_date_time->Day,
+                   (unsigned int)p_date_time->Hr,
+                   (unsigned int)p_date_time->Min,
+                   (unsigned int)p_date_time->Sec,
+                   (  signed int)p_date_time->TZ_sec));
+
+                                                                /* ------------- CONV DATE/TIME TO CLK TS ------------- */
+    nbr_days   =  p_date_time->Day - CLK_FIRST_DAY_OF_MONTH;
+    leap_yr    =  Clk_IsLeapYr(p_date_time->Yr);
+    leap_yr_ix = (leap_yr == DEF_YES) ? 1u : 0u;
+    for (month_ix = CLK_FIRST_MONTH_OF_YR; month_ix < p_date_time->Month; month_ix++) {
+        nbr_days += Clk_DaysInMonth[leap_yr_ix][month_ix - CLK_FIRST_MONTH_OF_YR];
+    }
+
+    for (yr_ix = yr_start; yr_ix < p_date_time->Yr; yr_ix++) {
+        leap_yr     =  Clk_IsLeapYr(yr_ix);
+        leap_yr_ix  = (leap_yr == DEF_YES) ? 1u : 0u;
+        nbr_days   +=  Clk_DaysInYr[leap_yr_ix];
+    }
+
+    ts_sec  = nbr_days         * DEF_TIME_NBR_SEC_PER_DAY;
+    ts_sec += p_date_time->Hr  * DEF_TIME_NBR_SEC_PER_HR;
+    ts_sec += p_date_time->Min * DEF_TIME_NBR_SEC_PER_MIN;
+    ts_sec += p_date_time->Sec;
+
+                                                                /* ------------ ADJ FINAL TS FOR TZ OFFSET ------------ */
+    tz_sec_abs = (CLK_TS_SEC)DEF_ABS(p_date_time->TZ_sec);
+    if (p_date_time->TZ_sec < 0) {
+        ts_sec += tz_sec_abs;                                   /* See Note #1c1.                                       */
+        if (ts_sec < tz_sec_abs) {                              /* Chk for ovf when tz is neg.                          */
+            CLK_TRACE_DBG(("    Timestamp is too big to add time zone offset\r\n"));
+            return (DEF_FAIL);
+        }
+
+    } else {
+        if (ts_sec < tz_sec_abs) {                              /* Chk for ovf when tz is pos.                          */
+            CLK_TRACE_DBG(("    Timestamp is too small to substract time zone offset\r\n"));
+            return (DEF_FAIL);
+        }
+        ts_sec -= tz_sec_abs;                                   /* See Note #1c2.                                       */
+    }
+
+   *p_ts_sec = ts_sec;
+    CLK_TRACE_DBG(("    TS converted       = %u\r\n", (unsigned int)*p_ts_sec));
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     Clk_DateTimeMakeHandler()
+*
+* Description : Build a valid epoch date/time structure.
+*
+* Argument(s) : p_date_time     Pointer to variable that will receive the date/time structure.
+*
+*               yr              Year    value [yr_start      to yr_end).
+*
+*               month           Month   value [CLK_MONTH_JAN to CLK_MONTH_DEC].
+*
+*               day             Day     value [            1 to            31].
+*
+*               hr              Hours   value [            0 to            23].
+*
+*               min             Minutes value [            0 to            59].
+*
+*               sec             Seconds value [            0 to            60] (see Note #2).
+*
+*               tz_sec          Time zone offset (in seconds, +|- from UTC) [-43200 to 43200].
+*
+*               yr_start        Start year of the epoch.
+*
+*               yr_end          End   year of the epoch.
+*
+* Return(s)   : DEF_OK,   if date/time structure is valid.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Clk_DateTimeMake(),
+*               Clk_NTPDateTimeMake(),
+*               Clk_UnixDateTimeMake().
+*
+* Note(s)     : (1) Day of week ('p_date_time->DayOfWk') and Day of year ('p_date_time->DayOfYr')
+*                   are internally calculated and set in the date/time structure if date is valid.
+*
+*               (2) Seconds value of 60 is valid to be compatible with leap second adjustment and
+*                   the atomic clock time structure.
+*
+*               (3) Time zone is based ('tz_sec') on Coordinated Universal Time (UTC) & has valid
+*                   values :
+*
+*                   (a) Between  +|- 12 hours (+|- 43200 seconds)
+*                   (b) Multiples of 15 minute
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Clk_DateTimeMakeHandler (CLK_DATE_TIME  *p_date_time,
+                                              CLK_YR          yr,
+                                              CLK_MONTH       month,
+                                              CLK_DAY         day,
+                                              CLK_HR          hr,
+                                              CLK_MIN         min,
+                                              CLK_SEC         sec,
+                                              CLK_TZ_SEC      tz_sec,
+                                              CLK_YR          yr_start,
+                                              CLK_YR          yr_end)
+{
+    CPU_BOOLEAN  valid;
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* -------------- VALIDATE DATE/TIME PTR -------------- */
+    if (p_date_time == (CLK_DATE_TIME *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------------ VALIDATE DATE ------------------- */
+    valid = Clk_IsDateValid(yr, month, day, yr_start, yr_end);
+    if (valid != DEF_YES) {
+        return  (DEF_FAIL);
+    }
+
+    p_date_time->Yr      = yr;
+    p_date_time->Month   = month;
+    p_date_time->Day     = day;
+    p_date_time->DayOfWk = Clk_GetDayOfWkHandler(yr, month, day);
+    p_date_time->DayOfYr = Clk_GetDayOfYrHandler(yr, month, day);
+
+
+                                                                /* ---------------- VALIDATE DAY OF WK ---------------- */
+    valid = Clk_IsDayOfWkValid(p_date_time->DayOfWk);
+    if (valid != DEF_YES) {
+        return  (DEF_FAIL);
+    }
+
+                                                                /* ---------------- VALIDATE DAY OF YR ---------------- */
+    valid = Clk_IsDayOfYrValid(yr, p_date_time->DayOfYr);
+    if (valid != DEF_YES) {
+        return  (DEF_FAIL);
+    }
+
+                                                                /* ------------------ VALIDATE TIME ------------------- */
+    valid = Clk_IsTimeValid(hr, min, sec);
+    if (valid != DEF_YES) {
+        return  (DEF_FAIL);
+    }
+
+    p_date_time->Hr  = hr;
+    p_date_time->Min = min;
+    p_date_time->Sec = sec;
+
+                                                                /* ------------------- VALIDATE TZ -------------------- */
+    valid = Clk_IsTZValid(tz_sec);
+    if (valid != DEF_YES) {
+        return  (DEF_FAIL);
+    }
+
+    p_date_time->TZ_sec = tz_sec;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Clk_TaskHandler()
+*
+* Description : (1) Handle clock signal :
+*
+*                  (a) Wait for a signal
+*                  (b) Update timestamp
+*
+*
+* Argument(s) : p_arg   Pointer to argument (unused).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Clk_KAL_Task().
+*
+* Note(s)     : (1) 'Clk_TS_UTC_sec' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_EXT_EN != DEF_ENABLED)
+static  void  Clk_TaskHandler (void  *p_arg)
+{
+    CLK_ERR  err;
+    CPU_SR_ALLOC();
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ------------------- VALIDATE PTR ------------------- */
+    CPU_CRITICAL_ENTER();
+    if (Clk_Ptr == DEF_NULL) {                                  /* Validate Clk data ptr.                               */
+        CPU_CRITICAL_EXIT();
+        CPU_SW_EXCEPTION(;);
+    }
+    CPU_CRITICAL_EXIT();
+#endif
+
+    (void)p_arg;                                                /* Prevent 'variable unused' compiler warning.          */
+
+    while (DEF_ON) {
+                                                                /* --------------- WAIT FOR CLK SIGNAL ---------------- */
+        do {
+            Clk_KAL_Wait(&err);
+        } while (err != CLK_OS_ERR_NONE);
+
+                                                                /* -------------------- UPDATE TS --------------------- */
+        CPU_CRITICAL_ENTER();
+        if (Clk_Ptr->Clk_TS_UTC_sec < CLK_TS_SEC_MAX) {
+            Clk_Ptr->Clk_TS_UTC_sec++;
+        }
+        CPU_CRITICAL_EXIT();
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            Clk_KAL_Wait()
+*
+* Description : Wait for clock signal to increment clock timestamp.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               CLK_OS_ERR_NONE                 Signal           received.
+*                               CLK_OS_ERR_WAIT                 Signal       NOT received.
+*                               CLK_ERR_NOT_INIT                Clock module NOT initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Clk_TaskHandler().
+*
+*               This function is an INTERNAL Clock function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_EXT_EN != DEF_ENABLED)
+static  void  Clk_KAL_Wait (CLK_ERR  *p_err)
+{
+#if (CLK_CFG_SIGNAL_EN == DEF_ENABLED)
+    KAL_SEM_HANDLE  sem_handle;
+    KAL_ERR         err_kal;
+    CPU_SR_ALLOC();
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ------------------- VALIDATE PTR ------------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(;);
+    }
+
+    CPU_CRITICAL_ENTER();
+    if (Clk_Ptr == DEF_NULL) {                                  /* Validate Clk data ptr.                               */
+        CPU_CRITICAL_EXIT();
+       *p_err = CLK_ERR_NOT_INIT;
+        return;
+    }
+    CPU_CRITICAL_EXIT();
+#endif
+
+    CPU_CRITICAL_ENTER();
+    sem_handle = Clk_Ptr->Clk_SignalHandle;
+    CPU_CRITICAL_EXIT();
+
+    KAL_SemPend(sem_handle,
+                KAL_OPT_PEND_BLOCKING,
+                0u,
+                &err_kal);
+
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_NOT_AVAIL:
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_ABORT:
+        case KAL_ERR_TIMEOUT:
+        case KAL_ERR_ISR:
+        case KAL_ERR_WOULD_BLOCK:
+        case KAL_ERR_OS:
+        default:
+            *p_err = CLK_OS_ERR_WAIT;
+             return;
+    }
+#else
+    KAL_DlyTick(KAL_TickRate,
+                KAL_OPT_DLY_PERIODIC);
+#endif
+
+    *p_err = CLK_OS_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           Clk_KAL_Signal()
+*
+* Description : Signal clock module to increment timestamp.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function
+*
+*                               CLK_KAL_ERR_NONE                 Clock module     successfully signaled.
+*                               CLK_KAL_ERR_SIGNAL               Clock module NOT successfully signaled.
+*                               CLK_ERR_NOT_INIT                 Clock module NOT initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Clk_SignalClk().
+*
+*               This function is an INTERNAL Clock function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) Clk_OS_Signal() MUST be called once per second.
+*********************************************************************************************************
+*/
+
+#if ((CLK_CFG_EXT_EN    != DEF_ENABLED) &&  \
+     (CLK_CFG_SIGNAL_EN == DEF_ENABLED))
+static  void  Clk_KAL_Signal (CLK_ERR  *p_err)
+{
+    KAL_SEM_HANDLE  sem_handle;
+    KAL_ERR         err_kal;
+    CPU_SR_ALLOC();
+
+
+#if (CLK_CFG_ARG_CHK_EN == DEF_ENABLED)                         /* ------------------- VALIDATE PTR ------------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(;);
+    }
+
+    CPU_CRITICAL_ENTER();
+    if (Clk_Ptr == DEF_NULL) {                                  /* Validate Clk data ptr.                               */
+        CPU_CRITICAL_EXIT();
+       *p_err = CLK_ERR_NOT_INIT;
+        return;
+    }
+    CPU_CRITICAL_EXIT();
+#endif
+
+    CPU_CRITICAL_ENTER();
+    sem_handle = Clk_Ptr->Clk_SignalHandle;
+    CPU_CRITICAL_EXIT();
+
+    KAL_SemPost(sem_handle,
+                KAL_OPT_POST_NONE,
+                &err_kal);
+
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_NOT_AVAIL:
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_OVF:
+        default:
+            *p_err = CLK_OS_ERR_SIGNAL;
+             return;
+    }
+
+    *p_err = CLK_OS_ERR_NONE;
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-Clk/Source/clk.h b/src/ucos_v1_42/micrium_source/uC-Clk/Source/clk.h
new file mode 100644
index 0000000..edf4894
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Clk/Source/clk.h
@@ -0,0 +1,1209 @@
+/*
+*********************************************************************************************************
+*                                               uC/Clk
+*                                          Clock / Calendar
+*
+*                      (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*          All rights reserved.  Protected by international copyright laws.
+*
+*          uC/Clk is provided in source form to registered licensees ONLY.  It is
+*          illegal to distribute this source code to any third party unless you receive
+*          written permission by an authorized Micrium representative.  Knowledge of
+*          the source code may NOT be used to develop a similar product.
+*
+*          Please help us continue to provide the Embedded community with the finest
+*          software available.  Your honesty is greatly appreciated.
+*
+*          You can find our product's user manual, API reference, release notes and
+*          more information at: https://doc.micrium.com
+*
+*          You can contact us at: www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          CLOCK / CALENDAR
+*
+* Filename      : clk.h
+* Version       : V3.10.00
+* Programmer(s) : JDH
+*                 COP
+*                 JJL
+*                 SR
+*                 AA
+*                 AL
+*                 AOP
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included
+*                     in the project build :
+*
+*                     (a) uC/CPU    V1.30
+*                     (b) uC/LIB    V1.38
+*                     (c) uC/Common V1.00
+*
+*                 (2) (a) Clock module is based on Coordinated Universal Time (UTC) and supports the
+*                         following features :
+*
+*                         (1) Time zones
+*                         (2) Leap years
+*                         (3) Leap seconds
+*
+*                     (b) Clock module does NOT support Daylight (Savings) Time. If you want to handle
+*                         Daylight Time in your application, set time zone offset accordingly.
+*
+*                     (c) Timestamp and Coordinated Universal Time (UTC) related links :
+*
+*                         (1) http://www.timeanddate.com/time/aboututc.html
+*                         (2) http://www.allanstime.com/Publications/DWA/Science_Timekeeping/TheScienceOfTimekeeping.pdf
+*                         (3) http://www.cl.cam.ac.uk/~mgk25/time/metrologia-leapsecond.pdf
+*                         (4) http://www.navcen.uscg.gov/pdf/cgsicMeetings/45/29a%20UTCLeapSecond.ppt
+*
+*
+*                 (3) (a) Clock module implements a software-maintained clock/calendar when 'CLK_CFG_EXT_EN'
+*                         is disabled (see Note #4).
+*
+*                     (b) (1) Software-maintained clock/calendar is based on a periodic delay or timeout
+*                             when 'CLK_CFG_SIGNAL_EN' is disabled.
+*
+*                         (2) Software-maintained clock/calendar is based on a periodic signal or timer
+*                             when 'CLK_CFG_SIGNAL_EN' is enabled.
+*
+*                     (c) When software-maintained clock is enabled, Clock module's OS-dependent files and
+*                         respective OS-application configuration MUST be included in the build.
+*
+*
+*                 (4) (a) Clock module initializes, gets and sets its timestamp via an External timestamp
+*                         when 'CLK_CFG_EXT_EN' is enabled.
+*
+*                     (b) (1) External timestamp can be maintained either in :
+*
+*                             (A) Hardware (e.g. via a hardware clock chip)
+*                             (B) From another application (e.g. SNTPc)
+*
+*                         (2) External timestamp is accessed by application/BSP functions defined by the
+*                             developer that MUST follow the functional requirements of the particular
+*                             hardware/application(s).
+*
+*                             See also 'net.h  Clk_ExtTS_Init()',
+*                                      'net.h  Clk_ExtTS_Get()',
+*                                    & 'net.h  Clk_ExtTS_Set()'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This Clock module header file is protected from multiple pre-processor inclusion through
+*               use of the Clock module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  CLK_MODULE_PRESENT                                     /* See Note #1.                                         */
+#define  CLK_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                        CLOCK VERSION NUMBER
+*
+* Note(s) : (1) (a) The Clock software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The Clock software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*/
+
+#define  CLK_VERSION                                   31000u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) Clock module files are located in the following directories :
+*
+*               (a)     \\clk_cfg.h
+*
+*               (b) (1) \\Source\clk.h
+*                                    \clk.c
+*
+*                   (2) \\OS\\clk_os.c
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                                          directory path for Clock module
+*                                                           directory name for specific operating system (OS)
+*
+*           (2) CPU-configuration software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common   CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) NO compiler-supplied standard library functions are used by the Clock module.
+*
+*               (a) Standard library functions are implemented in the custom library module(s) :
+*
+*                       \\lib*.*
+*
+*                       where
+*                                     directory path for custom library software
+*
+*           (4) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\'                                          See Note #1a
+*
+*               (b) '\\' directories                                                   See Note #1b
+*
+*               (c) (1) '\\'                                        See Note #2a
+*                   (2) '\\\\'                       See Note #2b
+*
+*               (d) '\\'                                          See Note #3a
+*********************************************************************************************************
+*/
+
+#include                                            /* CPU Core Library         (see Note #2)               */
+
+#include                                             /* Standard        Defines (see Note #3a)               */
+#include                                             /* Standard String Library (see Note #3a)               */
+#include                                             /* Standard Memory Library (see Note #3a)               */
+
+#include                                             /* Clk Configuration File  (see Note #1a)               */
+
+#include  "clk_type.h"                                          /* Clk Stack                                            */
+
+
+/*
+*********************************************************************************************************
+*                                        MODULE CONFIGURATION
+*
+* Note(s) : (1) (a) When the External timestamp is disabled, the Clock/Calendar is software-  maintained
+*                   and 'clk_os.c' MUST             be included in the project (see 'net.h  Note #3c').
+*
+*               (b) When the External timestamp is enabled,  the Clock/Calendar is externally maintained
+*                   and 'clk_os.c' does NOT need to be included in the project.
+*********************************************************************************************************
+*/
+
+#if     (CLK_CFG_EXT_EN != DEF_ENABLED)
+#define  CLK_OS_MODULE_PRESENT                                  /* See Note #1a.                                        */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       CLK STR FORMAT DEFINES
+*********************************************************************************************************
+*/
+
+                                                                                    /*           1         2         3  */
+                                                                                    /* 0123456789012345678901234567890  */
+#define  CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS_UTC_LEN          30u   /*     Str len of fmt "YYYY-MM-DD HH:MM:SS UTC+TZ" :    */
+                                                                /*             ...    "YYYY-MM-DD HH:MM:SS UTC+hh:mm"   */
+                                                                /*             ... or "YYYY-MM-DD HH:MM:SS UTC-hh:mm".  */
+#define  CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS_LEN              20u   /*     Str len of fmt "YYYY-MM-DD HH:MM:SS".            */
+#define  CLK_STR_FMT_MM_DD_YY_HH_MM_SS_LEN                18u   /*     Str len of fmt "MM-DD-YY HH:MM:SS".              */
+#define  CLK_STR_FMT_YYYY_MM_DD_LEN                       11u   /*     Str len of fmt "YYYY-MM-DD".                     */
+#define  CLK_STR_FMT_MM_DD_YY_LEN                          9u   /*     Str len of fmt "MM-DD-YY".                       */
+#define  CLK_STR_FMT_DAY_MONTH_DD_YYYY_MAX_LEN            29u   /* Max str len of fmt "Day Month DD, YYYY".             */
+#define  CLK_STR_FMT_DAY_MONTH_DD_HH_MM_SS_YYYY_LEN       25u   /*     Str len of fmt "Day Mon DD HH:MM:SS YYYY".       */
+#define  CLK_STR_FMT_HH_MM_SS_LEN                          9u   /*     Str len of fmt "HH:MM:SS".                       */
+#define  CLK_STR_FMT_HH_MM_SS_AM_PM_LEN                   15u   /*     Str len of fmt "HH:MM:SS AM|PM".                 */
+
+#define  CLK_STR_FMT_MAX_LEN                              30u   /* Max str len of all clk str fmts.                     */
+
+
+#define  CLK_STR_DIG_YR_LEN                                4u   /*     Str len of       yr dig.                         */
+#define  CLK_STR_DIG_YR_TRUNC_LEN                          2u   /*     Str len of trunc yr dig.                         */
+#define  CLK_STR_DIG_MONTH_LEN                             2u   /*     Str len of mon      dig.                         */
+#define  CLK_STR_DIG_DAY_LEN                               2u   /*     Str len of day      dig.                         */
+#define  CLK_STR_DIG_HR_LEN                                2u   /*     Str len of hr       dig.                         */
+#define  CLK_STR_DIG_MIN_LEN                               2u   /*     Str len of min      dig.                         */
+#define  CLK_STR_DIG_SEC_LEN                               2u   /*     Str len of sec      dig.                         */
+#define  CLK_STR_DIG_TZ_HR_LEN                             2u   /*     Str len of tz hr    dig.                         */
+#define  CLK_STR_DIG_TZ_MIN_LEN                            2u   /*     Str len of tz min   dig.                         */
+#define  CLK_STR_DIG_TZ_MAX_LEN                            2u   /* Max str len of tz       digs.                        */
+#define  CLK_STR_DAY_OF_WK_MAX_LEN                         9u   /* Max str len of day of wk       str (e.g. Wednesday). */
+#define  CLK_STR_DAY_OF_WK_TRUNC_LEN                       3u   /*     Str len of day of wk trunc str.                  */
+#define  CLK_STR_MONTH_MAX_LEN                             9u   /* Max str len of month           str (e.g. September). */
+#define  CLK_STR_MONTH_TRUNC_LEN                           3u   /*     Str len of month     trunc str.                  */
+#define  CLK_STR_AM_PM_LEN                                 2u   /*     Str len of am-pm           str.                  */
+
+
+/*
+*********************************************************************************************************
+*                                            CLOCK DEFINES
+*
+* Note(s) : (1) Year 2038 problem (e.g. Unix Millennium bug, Y2K38 or Y2.038K) may cause some computer
+*               software to fail before or in the year 2038. The problem affects all software and
+*               systems that both store time as a signed 32-bit integer and interpret this number as
+*               the number of seconds since 00:00:00 UTC on 1970/01/1.
+*
+*               There is no straightforward and general fix for this problem. Changing timestamp
+*               datatype to an unsigned 32-bit integer have been chosen to avoid this problem. Thus
+*               timestamp will be accurate until the year 2106, but dates before 1970 are not possible.
+*********************************************************************************************************
+*/
+
+#define  CLK_FIRST_MONTH_OF_YR                             1u   /* First month of a yr    [1 to  12].                   */
+#define  CLK_FIRST_DAY_OF_MONTH                            1u   /* First day   of a month [1 to  31].                   */
+#define  CLK_FIRST_DAY_OF_YR                               1u   /* First day   of a yr    [1 to 366].                   */
+#define  CLK_FIRST_DAY_OF_WK                               1u   /* First day   of a wk    [1 to   7].                   */
+
+
+#define  CLK_MONTH_PER_YR                                 12u
+#define  CLK_HR_PER_HALF_DAY                              12uL
+
+#define  CLK_YR_NONE                                       0u
+
+#define  CLK_MONTH_NONE                                    0u
+#define  CLK_MONTH_JAN                                     1u
+#define  CLK_MONTH_FEB                                     2u
+#define  CLK_MONTH_MAR                                     3u
+#define  CLK_MONTH_APR                                     4u
+#define  CLK_MONTH_MAY                                     5u
+#define  CLK_MONTH_JUN                                     6u
+#define  CLK_MONTH_JUL                                     7u
+#define  CLK_MONTH_AUG                                     8u
+#define  CLK_MONTH_SEP                                     9u
+#define  CLK_MONTH_OCT                                    10u
+#define  CLK_MONTH_NOV                                    11u
+#define  CLK_MONTH_DEC                                    12u
+
+#define  CLK_DAY_NONE                                      0u
+#define  CLK_DAY_OF_WK_NONE                                0u
+#define  CLK_DAY_OF_WK_SUN                                 1u
+#define  CLK_DAY_OF_WK_MON                                 2u
+#define  CLK_DAY_OF_WK_TUE                                 3u
+#define  CLK_DAY_OF_WK_WED                                 4u
+#define  CLK_DAY_OF_WK_THU                                 5u
+#define  CLK_DAY_OF_WK_FRI                                 6u
+#define  CLK_DAY_OF_WK_SAT                                 7u
+
+
+                                                                /* ------------------ CLK TS DEFINES ------------------ */
+#define  CLK_TS_SEC_MIN                 DEF_INT_32U_MIN_VAL
+#define  CLK_TS_SEC_MAX                 DEF_INT_32U_MAX_VAL
+#define  CLK_TS_SEC_NONE                CLK_TS_SEC_MIN
+
+
+                                                                /* ------------------ CLK TZ DEFINES ------------------ */
+#define  CLK_TZ_MIN_PRECISION                             15uL
+#define  CLK_TZ_SEC_PRECISION          (CLK_TZ_MIN_PRECISION * DEF_TIME_NBR_SEC_PER_MIN)
+#define  CLK_TZ_SEC_MIN              (-(CLK_HR_PER_HALF_DAY  * DEF_TIME_NBR_SEC_PER_HR))
+#define  CLK_TZ_SEC_MAX                (CLK_HR_PER_HALF_DAY  * DEF_TIME_NBR_SEC_PER_HR)
+
+
+                                                                /* ----------------- CLK TICK DEFINES ----------------- */
+#define  CLK_TICK_NONE                                     0u
+
+
+                                                                /* ---------------- CLK EPOCH DEFINES ----------------- */
+#define  CLK_EPOCH_YR_START                             2000u   /* Clk epoch starts = 2000-01-01 00:00:00 UTC.          */
+#define  CLK_EPOCH_YR_END                               2136u   /*           ends   = 2135-12-31 23:59:59 UTC.          */
+#define  CLK_EPOCH_DAY_OF_WK                               7u   /*                    2000-01-01 is Sat.                */
+
+
+                                                                /* -------------- NTP EPOCH DATE DEFINES -------------- */
+#define  CLK_NTP_EPOCH_YR_START                         1900u   /* NTP epoch starts = 1900-01-01 00:00:00 UTC.          */
+#define  CLK_NTP_EPOCH_YR_END                           2036u   /*           ends   = 2035-12-31 23:59:59 UTC.          */
+#define  CLK_NTP_EPOCH_DAY_OF_WK                           2u   /*                    1900-01-01 is Mon.                */
+#define  CLK_NTP_EPOCH_OFFSET_YR_CNT           (CLK_EPOCH_YR_START - CLK_NTP_EPOCH_YR_START)
+
+                                                                /* Only 24 leap yrs because 1900 is NOT a leap yr.      */
+#define  CLK_NTP_EPOCH_OFFSET_LEAP_DAY_CNT    ((CLK_NTP_EPOCH_OFFSET_YR_CNT / 4u) - 1u)
+
+                                                                /*     100 yrs * 365 * 24 * 60 * 60 = 3153600000        */
+                                                                /*   +  24 leap days * 24 * 60 * 60 =    2073600        */
+                                                                /* CLK_NTP_OFFSET_SEC               = 3155673600        */
+#define  CLK_NTP_EPOCH_OFFSET_SEC             ((CLK_NTP_EPOCH_OFFSET_YR_CNT       * DEF_TIME_NBR_SEC_PER_YR ) +  \
+                                               (CLK_NTP_EPOCH_OFFSET_LEAP_DAY_CNT * DEF_TIME_NBR_SEC_PER_DAY))
+
+
+                                                                /* ------------- UNIX EPOCH DATE DEFINES -------------- */
+                                                                /* See Note #1.                                         */
+#define  CLK_UNIX_EPOCH_YR_START                        1970u   /* Unix epoch starts = 1970-01-01 00:00:00 UTC.         */
+#define  CLK_UNIX_EPOCH_YR_END                          2106u   /*            ends   = 2105-12-31 23:59:59 UTC.         */
+#define  CLK_UNIX_EPOCH_DAY_OF_WK                          5u   /*                     1970-01-01 is Thu.               */
+#define  CLK_UNIX_EPOCH_OFFSET_YR_CNT          (CLK_EPOCH_YR_START - CLK_UNIX_EPOCH_YR_START)
+#define  CLK_UNIX_EPOCH_OFFSET_LEAP_DAY_CNT    (CLK_UNIX_EPOCH_OFFSET_YR_CNT / 4u)
+
+                                                                /*     30 yrs * 365 * 24 * 60 * 60 = 946080000          */
+                                                                /*   +  7 leap days * 24 * 60 * 60 =    604800          */
+                                                                /* CLK_UNIX_OFFSET_SEC             = 946684800          */
+#define  CLK_UNIX_EPOCH_OFFSET_SEC            ((CLK_UNIX_EPOCH_OFFSET_YR_CNT       * DEF_TIME_NBR_SEC_PER_YR ) +  \
+                                               (CLK_UNIX_EPOCH_OFFSET_LEAP_DAY_CNT * DEF_TIME_NBR_SEC_PER_DAY))
+
+
+/*
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     CLOCK ERROR CODES DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum   clk_err {
+    CLK_ERR_NONE           = 0u,                                /* No err.                                              */
+
+    CLK_ERR_NOT_NULL_PTR   = 10,
+    CLK_ERR_NOT_INIT       = 11,
+    CLK_ERR_ALLOC          = 20,
+                                                                /* -------- CLOCK-OS LAYER ERROR CODE DEFINES --------- */
+    CLK_OS_ERR_NONE        = 100u,
+
+    CLK_OS_ERR_INIT_TASK   = 101u,
+    CLK_OS_ERR_INIT_SIGNAL = 102u,
+    CLK_OS_ERR_INIT_NAME   = 103u,
+
+    CLK_OS_ERR_WAIT        = 120u,
+    CLK_OS_ERR_SIGNAL      = 121u
+} CLK_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                    CLOCK FORMAT STRING DATA TYPE
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_STR_CONV_EN == DEF_ENABLED)
+typedef  enum  clk_str_fmt {
+    CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS_UTC    = 1u,
+    CLK_STR_FMT_YYYY_MM_DD_HH_MM_SS        = 2u,
+    CLK_STR_FMT_MM_DD_YY_HH_MM_SS          = 3u,
+    CLK_STR_FMT_YYYY_MM_DD                 = 4u,
+    CLK_STR_FMT_MM_DD_YY                   = 5u,
+    CLK_STR_FMT_DAY_MONTH_DD_YYYY          = 6u,
+    CLK_STR_FMT_DAY_MONTH_DD_HH_MM_SS_YYYY = 7u,
+    CLK_STR_FMT_HH_MM_SS                   = 8u,
+    CLK_STR_FMT_HH_MM_SS_AM_PM             = 9u
+} CLK_STR_FMT;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CLOCK DATE DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  CLK_YR;
+typedef  CPU_INT08U  CLK_MONTH;
+typedef  CPU_INT16U  CLK_DAY;
+typedef  CPU_INT32U  CLK_NBR_DAYS;
+
+
+/*
+*********************************************************************************************************
+*                                        CLOCK TIME DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  CLK_HR;
+typedef  CPU_INT08U  CLK_MIN;
+typedef  CPU_INT08U  CLK_SEC;
+
+
+/*
+*********************************************************************************************************
+*                                      CLOCK TIMESTAMP DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  CLK_TS_SEC;
+
+
+/*
+*********************************************************************************************************
+*                                      CLOCK TIME ZONE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32S  CLK_TZ_SEC;
+
+
+/*
+*********************************************************************************************************
+*                                     CLOCK DATE/TIME DATA TYPE
+*
+* Note(s) : (1) Same date/time structure is used for all epoch. Thus Year value ('Yr') should be a value
+*               between the epoch start and end years.
+*
+*           (2) Seconds value of 60 is valid to be compatible with leap second adjustment and the atomic
+*               clock time stucture.
+*
+*           (3) Time zone is based on Coordinated Universal Time (UTC) & has valid values :
+*
+*               (a) Between  +|- 12 hours (+|- 43200 seconds)
+*               (b) Multiples of 15 minutes
+*********************************************************************************************************
+*/
+
+typedef  struct  clk_date_time {
+    CLK_YR      Yr;                                             /* Yr        [epoch start to end yr), (see Note #1).    */
+    CLK_MONTH   Month;                                          /* Month     [          1 to     12], (Jan to Dec).     */
+    CLK_DAY     Day;                                            /* Day       [          1 to     31].                   */
+    CLK_DAY     DayOfWk;                                        /* Day of wk [          1 to      7], (Sun to Sat).     */
+    CLK_DAY     DayOfYr;                                        /* Day of yr [          1 to    366].                   */
+    CLK_HR      Hr;                                             /* Hr        [          0 to     23].                   */
+    CLK_MIN     Min;                                            /* Min       [          0 to     59].                   */
+    CLK_SEC     Sec;                                            /* Sec       [          0 to     60], (see Note #2).    */
+    CLK_TZ_SEC  TZ_sec;                                         /* TZ        [     -43200 to  43200], (see Note #3).    */
+} CLK_DATE_TIME;
+
+
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void         Clk_Init               (const  CLK_TASK_CFG   *p_task_cfg,
+                                            MEM_SEG        *p_mem_seg,
+                                            CLK_ERR        *p_err);
+
+#if    ((CLK_CFG_SIGNAL_EN == DEF_ENABLED) && \
+        (CLK_CFG_EXT_EN    != DEF_ENABLED))
+void         Clk_SignalClk          (       CLK_ERR        *p_err);
+#endif
+
+                                                                    /* --------------- CLK TS GET & SET --------------- */
+CLK_TS_SEC   Clk_GetTS              (       void);                  /* Get clk TS.                                      */
+                                                                    /* Set clk TS.                                      */
+CPU_BOOLEAN  Clk_SetTS              (       CLK_TS_SEC      ts_sec);
+
+
+                                                                    /* --------------- CLK TZ GET & SET --------------- */
+CLK_TZ_SEC   Clk_GetTZ              (       void);                  /* Get clk TZ offset.                               */
+                                                                    /* Set clk TZ offset.                               */
+CPU_BOOLEAN  Clk_SetTZ              (       CLK_TZ_SEC      tz_sec);
+
+
+                                                                    /* ----------- CLK TS & DATE/TIME UTIL ------------ */
+                                                                    /* Get clk TS using a CLK_DATE_TIME struct.         */
+CPU_BOOLEAN  Clk_GetDateTime        (       CLK_DATE_TIME  *p_date_time);
+                                                                    /* Set clk TS using a CLK_DATE_TIME struct.         */
+CPU_BOOLEAN  Clk_SetDateTime        (       CLK_DATE_TIME  *p_date_time);
+
+CPU_BOOLEAN  Clk_TS_ToDateTime      (       CLK_TS_SEC      ts_sec,
+                                            CLK_TZ_SEC      tz_sec,
+                                            CLK_DATE_TIME  *p_date_time);
+
+CPU_BOOLEAN  Clk_DateTimeToTS       (       CLK_TS_SEC     *p_ts_sec,
+                                            CLK_DATE_TIME  *p_date_time);
+                                                                    /* Make a date/time struct.                         */
+CPU_BOOLEAN  Clk_DateTimeMake       (       CLK_DATE_TIME  *p_date_time,
+                                            CLK_YR          yr,
+                                            CLK_MONTH       month,
+                                            CLK_DAY         day,
+                                            CLK_HR          hr,
+                                            CLK_MIN         min,
+                                            CLK_SEC         sec,
+                                            CLK_TZ_SEC      tz_sec);
+
+CPU_BOOLEAN  Clk_IsDateTimeValid    (       CLK_DATE_TIME  *p_date_time);
+
+
+                                                                    /* ------------------ DATE UTIL ------------------- */
+CLK_DAY      Clk_GetDayOfWk         (       CLK_YR          yr,
+                                            CLK_MONTH       month,
+                                            CLK_DAY         day);
+
+CLK_DAY      Clk_GetDayOfYr         (       CLK_YR          yr,
+                                            CLK_MONTH       month,
+                                            CLK_DAY         day);
+
+
+#if (CLK_CFG_STR_CONV_EN == DEF_ENABLED)                            /* ---------------- STR CONV UTIL ----------------- */
+                                                                    /* Conv a date/time struct to a str.                */
+CPU_BOOLEAN  Clk_DateTimeToStr      (       CLK_DATE_TIME  *p_date_time,
+                                            CLK_STR_FMT     fmt,
+                                            CPU_CHAR       *p_str,
+                                            CPU_SIZE_T      str_len);
+#endif
+
+
+
+#if (CLK_CFG_NTP_EN == DEF_ENABLED)                                 /* --------------- NTP TS GET & SET --------------- */
+                                                                    /* Get clk TS using NTP TS.                         */
+CPU_BOOLEAN  Clk_GetTS_NTP          (       CLK_TS_SEC     *p_ts_ntp_sec);
+                                                                    /* Set clk TS using NTP TS.                         */
+CPU_BOOLEAN  Clk_SetTS_NTP          (       CLK_TS_SEC      ts_ntp_sec);
+
+
+                                                                    /* ----------- NTP TS & DATE/TIME UTIL ------------ */
+CPU_BOOLEAN  Clk_TS_ToTS_NTP        (       CLK_TS_SEC      ts_sec,
+                                            CLK_TS_SEC     *p_ts_ntp_sec);
+
+CPU_BOOLEAN  Clk_TS_NTP_ToTS        (       CLK_TS_SEC     *p_ts_sec,
+                                            CLK_TS_SEC      ts_ntp_sec);
+
+CPU_BOOLEAN  Clk_TS_NTP_ToDateTime  (       CLK_TS_SEC      ts_ntp_sec,
+                                            CLK_TZ_SEC      tz_sec,
+                                            CLK_DATE_TIME  *p_date_time);
+
+CPU_BOOLEAN  Clk_DateTimeToTS_NTP   (       CLK_TS_SEC     *p_ts_ntp_sec,
+                                            CLK_DATE_TIME  *p_date_time);
+
+CPU_BOOLEAN  Clk_NTP_DateTimeMake   (       CLK_DATE_TIME  *p_date_time,
+                                            CLK_YR          yr,
+                                            CLK_MONTH       month,
+                                            CLK_DAY         day,
+                                            CLK_HR          hr,
+                                            CLK_MIN         min,
+                                            CLK_SEC         sec,
+                                            CLK_TZ_SEC      tz_sec);
+
+CPU_BOOLEAN  Clk_IsNTP_DateTimeValid(       CLK_DATE_TIME  *p_date_time);
+
+#endif
+
+
+#if (CLK_CFG_UNIX_EN == DEF_ENABLED)                                /* -------------- UNIX TS GET & SET --------------- */
+                                                                    /* Get clk TS using Unix TS.                        */
+CPU_BOOLEAN  Clk_GetTS_Unix         (       CLK_TS_SEC     *p_ts_unix_sec);
+                                                                    /* Set clk TS using Unix TS.                        */
+CPU_BOOLEAN  Clk_SetTS_Unix         (       CLK_TS_SEC      ts_unix_sec);
+
+
+                                                                    /* ----------- UNIX TS & DATE/TIME UTIL ----------- */
+CPU_BOOLEAN  Clk_TS_ToTS_Unix       (       CLK_TS_SEC      ts_sec,
+                                            CLK_TS_SEC     *p_ts_unix_sec);
+
+CPU_BOOLEAN  Clk_TS_UnixToTS        (       CLK_TS_SEC     *p_ts_sec,
+                                            CLK_TS_SEC      ts_unix_sec);
+
+CPU_BOOLEAN  Clk_TS_UnixToDateTime  (       CLK_TS_SEC      ts_unix_sec,
+                                            CLK_TZ_SEC      tz_sec,
+                                            CLK_DATE_TIME  *p_date_time);
+
+CPU_BOOLEAN  Clk_DateTimeToTS_Unix  (       CLK_TS_SEC     *p_ts_unix_sec,
+                                            CLK_DATE_TIME  *p_date_time);
+
+CPU_BOOLEAN  Clk_UnixDateTimeMake   (       CLK_DATE_TIME  *p_date_time,
+                                            CLK_YR          yr,
+                                            CLK_MONTH       month,
+                                            CLK_DAY         day,
+                                            CLK_HR          hr,
+                                            CLK_MIN         min,
+                                            CLK_SEC         sec,
+                                            CLK_TZ_SEC      tz_sec);
+
+CPU_BOOLEAN  Clk_IsUnixDateTimeValid(       CLK_DATE_TIME  *p_date_time);
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                      DEFINED IN PRODUCT'S BSP
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          Clk_ExtTS_Init()
+*
+* Description : Initialize & start External timestamp timer.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Clk_Init().
+*
+*               This function is an INTERNAL Clock module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) CLK_ExtTS_Init() is an application/BSP function that MUST be defined by the developer
+*                   if External timestamp is enabled.
+*
+*                   See 'clk_cfg.h  CLK CONFIGURATION  Note #1'.
+*
+*               (2) (a) External timestamp values MUST be returned via 'CLK_TS_SEC' data type.
+*
+*                   (b) External timestamp values SHOULD be returned on the epoch of Clock module and
+*                       include the time zone offset.
+*
+*               (3) (a) External timestamp SHOULD be an 'up' counter whose values increase at each second.
+*                       It's possible to use a 'down' counter, but a conversion MUST be applied when setting
+*                       and getting timestamp.
+*
+*                   (b) External timestamp COULD come from another application (e.g. by SNTPc).
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_EXT_EN == DEF_ENABLED)
+void  Clk_ExtTS_Init(void);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           Clk_ExtTS_Get()
+*
+* Description : Get Clock module's timestamp from converted External timestamp.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Current Clock timestamp (in seconds, UTC+00).
+*
+* Caller(s)   : Clk_GetTS().
+*
+*               This function is an INTERNAL Clock module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but SHOULD NOT be called by application function(s).
+*
+* Note(s)     : (1) Clk_ExtTS_Get() is an application/BSP function that MUST be defined by the developer
+*                   if External timestamp is enabled.
+*
+*                   See 'clk_cfg.h  CLK CONFIGURATION  Note #1'
+*
+*
+*               (2) (a) Clock timestamp values MUST be returned via 'CLK_TS_SEC' data type.
+*
+*                   (b) (1) If the External timestamp has more bits than the 'CLK_TS_SEC' data type,
+*                           Clk_ExtTS_Get() MUST truncate the External timestamp's higher order bits
+*                           greater than the 'CLK_TS_SEC' data type.
+*
+*                       (2) If the External timestamp has less bits than the 'CLK_TS_SEC' data type,
+*                           Clk_ExtTS_Get() MUST pad the Clock timestamp's higher order bits with
+*                           0 bits.
+*
+*
+*               (3) (a) External timestamp values MUST be returned from the reference of the Clock
+*                       epoch start date/time.
+*
+*                   (b) External timestamp SHOULD start on midnight of January 1st of its epoch start
+*                       year. Otherwise, the equations to convert between External timestamp & Clock
+*                       timestamp MUST also include the External timestamp's epoch Day-of-Year, Hour,
+*                       Minute, & Second (see Note #4).
+*
+*                   (c) Returned Clock timestamp MUST be representable in Clock epoch. Thus equivalent
+*                       date of the External timestamp MUST be between :
+*
+*                       (1) >= CLK_EPOCH_YR_START
+*                       (2) <  CLK_EPOCH_YR_END
+*
+*                   (d) If the External timestamp includes an (optional) external time zone,
+*                       Clk_ExtTS_Get() MUST subtract the external time zone offset from the
+*                       converted External timestamp.
+*
+*
+*               (4) The Clock timestamp is calculated by one of the following equations (assuming
+*                   Note #3b) :
+*
+*                   (a) When External epoch start year is less than Clock epoch start year
+*                       ('CLK_EPOCH_YR_START') :
+*
+*                       Clock TS = External TS
+*                                - [(((Clock start year - External start year) * 365) + leap day count)
+*                                    * seconds per day]
+*                                - External TZ
+*
+*                       Examples with a 32-bit External timestamp :
+*
+*                       (1)   Valid equivalent date to convert is after  Clock epoch start year :
+*
+*                             2010 Oct 8, 11:11:11 UTC-05:00
+*                           External TS (in seconds)                                 = 1286536271
+*                           External start year                                      =       1970
+*                           Clock    start year                                      =       2000
+*                           Leap day count between External & Clock epoch start year =          7
+*                           External TZ (in seconds)                                 =     -18000
+*                           Clock    TS (in seconds)                                 =  339869471
+*                             2010 Oct 8, 16:11:11 UTC
+*
+*                           This example successfully converts an External timestamp into a
+*                           representable Clock timestamp without underflowing.
+*
+*                       (2) Invalid equivalent date to convert is before Clock epoch start year :
+*
+*                             1984 Oct 8, 11:11:11 UTC-05:00
+*                           External TS (in seconds)                                 =  466081871
+*                           External start year                                      =       1970
+*                           Clock    start year                                      =       2000
+*                           Leap day count between External & Clock epoch start year =          7
+*                           External TZ (in seconds)                                 =     -18000
+*                           Clock    TS (in seconds)                                 = -480584929
+*
+*                           This example underflows to a negative Clock timestamp since the
+*                           equivalent date to convert is incorrectly less than the Clock epoch
+*                           start year ('CLK_EPOCH_YR_START').
+*
+*
+*                   (b) When External epoch start year is greater than Clock epoch start year
+*                       ('CLK_EPOCH_YR_START') :
+*
+*                       Clock TS = External TS
+*                                + [(((External start year - Clock start year) * 365) + leap day count)
+*                                    * seconds per day]
+*                                - External TZ
+*
+*
+*                       Examples with a 32-bit External timestamp :
+*
+*                       (1)   Valid equivalent date to convert is before Clock epoch end year :
+*
+*                             2010 Oct 8, 11:11:11 UTC-05:00
+*                           External TS (in seconds)                                 =   24232271
+*                           External start year                                      =       2010
+*                           Clock    end   year                                      =       2136
+*                           Leap day count between External & Clock epoch start year =          3
+*                           External TZ (in seconds)                                 =     -18000
+*                           Clock    TS (in seconds)                                 =  339869471
+*                             2010 Oct 8, 16:11:11 UTC-05:00
+*
+*                           This example successfully converts an External timestamp into a
+*                           representable Clock timestamp without overflowing.
+*
+*                       (2) Invalid equivalent date to convert is after  Clock epoch end year :
+*
+*                             2140 Oct 8, 11:11:11 UTC-05:00
+*                           External TS (in seconds)                                 = 4126677071
+*                           External start year                                      =       2010
+*                           Clock    end   year                                      =       2136
+*                           Leap day count between External & Clock epoch start year =          3
+*                           External TZ (in seconds)                                 =     -18000
+*                           Clock    TS (in seconds)                                 = 4442314271
+*
+*                           This example overflows the Clock timestamp (32-bit) 'CLK_TS_SEC' data
+*                           type with an equivalent date incorrectly greater than or equal to the
+*                           Clock epoch end year ('CLK_EPOCH_YR_END').
+*
+*
+*                   (c) Where
+*
+*                       (1) Clock    TS             Converted Clock timestamp (in seconds,
+*                                                       from UTC+00)
+*                       (2) External TS             External timestamp to convert (in seconds)
+*                       (3) Clock    start year     Clock epoch start year ('CLK_EPOCH_YR_START')
+*                       (4) Clock    end   year     Clock epoch end   year ('CLK_EPOCH_YR_END')
+*                       (5) External start year     External timestamp epoch start year
+*                       (6) Leap day count          Number of leap days between Clock epoch
+*                                                       start year & External epoch start year
+*                       (7) Seconds per day         Number of seconds per day (86400)
+*                       (8) External TZ             Time zone offset applied to External TS
+*                                                       (in seconds, from UTC+00)
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_EXT_EN == DEF_ENABLED)
+CLK_TS_SEC  Clk_ExtTS_Get(void);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           Clk_ExtTS_Set()
+*
+* Description : Set External timestamp.
+*
+* Argument(s) : ts_sec      Timestamp value to set (in seconds, UTC+00).
+*
+* Return(s)   : DEF_OK,     if External timestamp succesfully set.
+*
+*               DEF_FAIL,   otherwise.
+*
+* Caller(s)   : Clk_SetTS().
+*
+*               This function is an INTERNAL Clock module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but SHOULD NOT be called by application function(s).
+*
+* Note(s)     : (1) CLK_ExtTS_Set() is an application/BSP function that MUST be defined by the developer
+*                   if External timestamp is enabled.
+*
+*                       See 'clk_cfg.h  CLK CONFIGURATION  Note #1'.
+*
+*                   (a) If External timestamp is provided by another application, it's possible that the
+*                       External timestamp may NOT be set (e.g. by SNTPc) in which case CLK_ExtTS_Set()
+*                       MUST ALWAYS return 'DEF_FAIL'.
+*
+*
+*               (2) (a) External timestamp values are converted from Clock timestamp's 'CLK_TS_SEC'
+*                       data type.
+*
+*                   (b) (1) If the External timestamp has more bits than the 'CLK_TS_SEC' data type,
+*                           Clk_ExtTS_Set() MUST pad the External timestamp's higher order bits with
+*                           0 bits.
+*
+*                       (2) If the External timestamp has less bits than the 'CLK_TS_SEC' data type,
+*                           Clk_ExtTS_Set() MUST truncate the Clock timestamp's higher order bits
+*                           greater than the External timestamp.
+*
+*
+*               (3) (a) External timestamp values MUST be converted from the reference of the Clock
+*                       epoch start date/time.
+*
+*                   (b) External timestamp SHOULD start on midnight of January 1st of its epoch start
+*                       year. Otherwise, the equations to convert between External timestamp & Clock
+*                       timestamp MUST also include the External timestamp's epoch Day-of-Year, Hour,
+*                       Minute, & Second (see Note #4).
+*
+*                   (c) Converted External timestamp MUST be representable in External epoch. Thus
+*                       equivalent date of the External timestamp MUST be between :
+*
+*                       (1) External epoch start year
+*                       (2) External epoch end   year
+*
+*                   (d) If the External timestamp includes an (optional) external time zone,
+*                       Clk_ExtTS_Set() MUST add the external time zone offset to the converted
+*                       External timestamp.
+*
+*
+*               (4) The External timestamp is calculated by one of the following equations (assuming
+*                   Note #3b) :
+*
+*                   (a) When External epoch start year is less than Clock epoch start year
+*                       ('CLK_EPOCH_YR_START') :
+*
+*                       External TS = Clock TS
+*                                   + [(((Clock start year - External start year) * 365) + leap day count)
+*                                       * seconds per day]
+*                                   + External TZ
+*
+*                       Examples with a 32-bit External timestamp :
+*
+*                       (1)   Valid equivalent date to convert is before External epoch end year :
+*
+*                             2010 Oct 8, 16:11:11 UTC
+*                           Clock    TS (in seconds)                                 =  339869471
+*                           External start year                                      =       1970
+*                           External end   year                                      =       2106
+*                           Leap day count between External & Clock epoch start year =          7
+*                           External TZ (in seconds)                                 =     -18000
+*                           External TS (in seconds)                                 = 1286536271
+*                             2010 Oct 8, 11:11:11 UTC-05:00
+*
+*                           This example successfully converts an External timestamp into a
+*                           representable Clock timestamp without overflowing.
+*
+*                       (2) Invalid equivalent date to convert is after  External epoch end year :
+*
+*                             2120 Oct 8, 11:11:11 UTC
+*                           Clock    TS (in seconds)                                 = 3811144271
+*                           External start year                                      =       1970
+*                           External end   year                                      =       2106
+*                           Leap day count between External & Clock epoch start year =          7
+*                           External TZ (in seconds)                                 =     -18000
+*                           External TS (in seconds)                                 = 4757811071
+*
+*                           This example overflows the External (32-bit) timestamp with an equivalent
+*                           date incorrectly greater than or equal to the External epoch end year.
+*
+*
+*                   (b) When External epoch start year is greater than Clock epoch start year
+*                       ('CLK_EPOCH_YR_START') :
+*
+*                       External TS = Clock TS
+*                                   - [(((External start year - Clock start year) * 365) + leap day count)
+*                                       * seconds per day]
+*                                   + External TZ
+*
+*
+*                       Examples with a 32-bit External timestamp :
+*
+*                       (1)   Valid equivalent date to convert is after  External epoch start year :
+*
+*                             2010 Oct 8, 16:11:11 UTC
+*                           Clock    TS (in seconds)                                 =  339869471
+*                           External start year                                      =       2010
+*                           Leap day count between External & Clock epoch start year =          3
+*                           External TZ (in seconds)                                 =     -18000
+*                           External TS (in seconds)                                 =   24232271
+*                             2010 Oct 8, 11:11:11 UTC-05:00
+*
+*                           This example successfully converts an External timestamp into a
+*                           representable Clock timestamp without underflowing.
+*
+*                       (2) Invalid equivalent date to convert is before External epoch start year :
+*
+*                             2005 Oct 8, 11:11:11 UTC
+*                           Clock    TS (in seconds)                                 =  182085071
+*                           External start year                                      =       2010
+*                           Leap day count between External & Clock epoch start year =          3
+*                           External TZ (in seconds)                                 =     -18000
+*                           External TS (in seconds)                                 = -133552129
+*
+*                           This example underflows to a negative External timestamp since the
+*                           equivalent date to convert is incorrectly less than the External
+*                           epoch start year.
+*
+*
+*                   (c) where
+*
+*                       (1) Clock    TS             Clock timestamp (in seconds, from UTC+00)
+*                       (2) External TS             Converted External timestamp (in seconds)
+*                       (3) Clock    start year     Clock epoch start year ('CLK_EPOCH_YR_START')
+*                       (4) External start year     External timestamp epoch start year
+*                       (5) External end   year     External timestamp epoch end   year
+*                       (6) Leap day count          Number of leap days between Clock epoch
+*                                                       start year & External epoch start year
+*                       (7) Seconds per day         Number of seconds per day (86400)
+*                       (8) External TZ             Time zone offset applied to External TS
+*                                                       (in seconds, from UTC+00)
+*********************************************************************************************************
+*/
+
+#if (CLK_CFG_EXT_EN == DEF_ENABLED)
+CPU_BOOLEAN  Clk_ExtTS_Set(CLK_TS_SEC  ts_sec);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                              TRACING
+*********************************************************************************************************
+*/
+
+                                                                /* Trace level, default to TRACE_LEVEL_OFF.             */
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                                   0
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                                  1
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                                   2
+#endif
+
+#ifndef  CLK_TRACE_LEVEL
+#define  CLK_TRACE_LEVEL                                   TRACE_LEVEL_OFF
+#endif
+
+#ifndef  CLK_TRACE
+#define  CLK_TRACE                                         printf
+#endif
+
+#if ((defined(CLK_TRACE))       && \
+     (defined(CLK_TRACE_LEVEL)) && \
+     (CLK_TRACE_LEVEL >= TRACE_LEVEL_INFO))
+
+    #if (CLK_TRACE_LEVEL >= TRACE_LEVEL_LOG)
+        #define  CLK_TRACE_LOG(msg)     CLK_TRACE  msg
+    #else
+        #define  CLK_TRACE_LOG(msg)
+    #endif
+
+
+    #if (CLK_TRACE_LEVEL >= TRACE_LEVEL_DBG)
+        #define  CLK_TRACE_DBG(msg)     CLK_TRACE  msg
+    #else
+        #define  CLK_TRACE_DBG(msg)
+    #endif
+
+    #define  CLK_TRACE_INFO(msg)        CLK_TRACE  msg
+
+#else
+    #define  CLK_TRACE_LOG(msg)
+    #define  CLK_TRACE_DBG(msg)
+    #define  CLK_TRACE_INFO(msg)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  CLK_CFG_ARG_CHK_EN
+#error  "CLK_CFG_ARG_CHK_EN                            not #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+#elif  ((CLK_CFG_ARG_CHK_EN != DEF_ENABLED ) &&  \
+        (CLK_CFG_ARG_CHK_EN != DEF_DISABLED))
+
+#error  "CLK_CFG_ARG_CHK_EN                      illegally #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+#endif
+
+
+
+#ifndef  CLK_CFG_STR_CONV_EN
+#error  "CLK_CFG_STR_CONV_EN                           not #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+#elif  ((CLK_CFG_STR_CONV_EN != DEF_ENABLED ) &&  \
+        (CLK_CFG_STR_CONV_EN != DEF_DISABLED))
+#error  "CLK_CFG_STR_CONV_EN                     illegally #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+#endif
+
+
+
+
+#ifndef  CLK_CFG_NTP_EN
+#error  "CLK_CFG_NTP_EN                                not #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+#elif  ((CLK_CFG_NTP_EN != DEF_ENABLED ) &&  \
+        (CLK_CFG_NTP_EN != DEF_DISABLED))
+#error  "CLK_CFG_NTP_EN                          illegally #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+#endif
+
+
+
+#ifndef  CLK_CFG_UNIX_EN
+#error  "CLK_CFG_UNIX_EN                               not #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+#elif  ((CLK_CFG_UNIX_EN != DEF_ENABLED ) &&  \
+        (CLK_CFG_UNIX_EN != DEF_DISABLED))
+#error  "CLK_CFG_UNIX_EN                         illegally #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+#endif
+
+
+
+
+#ifndef  CLK_CFG_EXT_EN
+#error  "CLK_CFG_EXT_EN                                not #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+
+#elif  ((CLK_CFG_EXT_EN != DEF_ENABLED ) &&  \
+        (CLK_CFG_EXT_EN != DEF_DISABLED))
+#error  "CLK_CFG_EXT_EN                          illegally #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+
+
+#elif   (CLK_CFG_EXT_EN != DEF_ENABLED)
+
+#ifndef  CLK_CFG_SIGNAL_EN
+#error  "CLK_CFG_SIGNAL_EN                             not #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+
+
+#elif  ((CLK_CFG_SIGNAL_EN != DEF_ENABLED ) &&  \
+        (CLK_CFG_SIGNAL_EN != DEF_DISABLED))
+#error  "CLK_CFG_SIGNAL_EN                       illegally #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  DEF_DISABLED]           "
+#error  "                                        [     ||  DEF_ENABLED ]           "
+
+
+#elif   (CLK_CFG_SIGNAL_EN == DEF_ENABLED)
+
+#ifndef  CLK_CFG_SIGNAL_FREQ_HZ
+#error  "CLK_CFG_SIGNAL_FREQ_HZ                        not #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  > 0]                    "
+#elif   (CLK_CFG_SIGNAL_FREQ_HZ < 1)
+#error  "CLK_CFG_SIGNAL_FREQ_HZ                  illegally #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  > 0]                    "
+#endif
+
+#endif
+
+#endif
+
+#if    ((CLK_CFG_EXT_EN    == DEF_ENABLED) && \
+        (CLK_CFG_SIGNAL_EN == DEF_DISABLED))
+                                                                /* See 'clk.h  Note #3'.                                */
+#error  "CLK_CFG_SIGNAL_EN must be set to DEF_ENABLED if CLK_CFG_EXT_EN is set to DEF_ENABLED"
+#endif
+
+
+#ifndef  CLK_CFG_TZ_DFLT_SEC
+#error  "CLK_CFG_TZ_DFLT_SEC                           not #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  >= CLK_TZ_SEC_MIN               ]"
+#error  "                                        [     &&  <= CLK_TZ_SEC_MAX               ]"
+#error  "                                        [     &&  multiple of CLK_TZ_SEC_PRECISION]"
+#elif  (( DEF_ABS(CLK_CFG_TZ_DFLT_SEC) > CLK_TZ_SEC_MAX) ||  \
+        ((DEF_ABS(CLK_CFG_TZ_DFLT_SEC) % CLK_TZ_SEC_PRECISION) != 0u))
+#error  "CLK_CFG_TZ_DFLT_SEC                     illegally #define'd in 'clk_cfg.h'"
+#error  "                                        [MUST be  >= CLK_TZ_SEC_MIN               ]"
+#error  "                                        [     &&  <= CLK_TZ_SEC_MAX               ]"
+#error  "                                        [     &&  multiple of CLK_TZ_SEC_PRECISION]"
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    LIBRARY CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+/*
+*                     (a) uC/CPU    V1.30
+*                     (b) uC/LIB    V1.38
+*                     (c) uC/Common V1.00
+*/
+
+
+                                                                /* See 'clk.h  Note #1a'.                               */
+#if     (CPU_CORE_VERSION < 13000u)
+#error  "CPU_CORE_VERSION  [SHOULD be >= V1.30]"
+#endif
+
+
+                                                                /* See 'clk.h  Note #1b'.                               */
+#if     (LIB_VERSION < 13800u)
+#error  "LIB_VERSION       [SHOULD be >= V1.38]"
+#endif
+
+                                                                /* See 'clk.h  Note #1c'.                               */
+#ifdef   COMMON_VERSION
+#error  "Remove #ifdef  COMMON_VERSION once released."
+#if     (COMMON_VERSION < 10000u)
+#error  "COMMON_VERSION    [SHOULD be >= V1.00]"
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'clk.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of CLK module include (see 'MODULE  Note #1').   */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-Clk/Source/clk_type.h b/src/ucos_v1_42/micrium_source/uC-Clk/Source/clk_type.h
new file mode 100644
index 0000000..59e8f5d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Clk/Source/clk_type.h
@@ -0,0 +1,74 @@
+/*
+*********************************************************************************************************
+*                                               uC/Clk
+*                                             Clock module
+*
+*                      (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*          All rights reserved.  Protected by international copyright laws.
+*
+*          uC/Clk is provided in source form to registered licensees ONLY.  It is
+*          illegal to distribute this source code to any third party unless you receive
+*          written permission by an authorized Micrium representative.  Knowledge of
+*          the source code may NOT be used to develop a similar product.
+*
+*          Please help us continue to provide the Embedded community with the finest
+*          software available.  Your honesty is greatly appreciated.
+*
+*          You can find our product's user manual, API reference, release notes and
+*          more information at: https://doc.micrium.com
+*
+*          You can contact us at: www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         CLK CMD SOURCE CODE
+*
+* Filename      : clk_type.h
+* Version       : V3.10.00
+* Programmer(s) : AA
+*                 AOP
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  CLK_TYPE_MODULE_PRESENT
+#define  CLK_TYPE_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*
+* Note(s): (1) When the Stack pointer is defined as null pointer (DEF_NULL), the task's stack should be
+*              automatically allocated on the heap of uC/LIB.
+*********************************************************************************************************
+*/
+
+typedef  struct  clk_task_cfg {
+    CPU_INT32U   Prio;                                          /* Task priority.                                       */
+    CPU_INT32U   StkSizeBytes;                                  /* Size of the stack.                                   */
+    void        *StkPtr;                                        /* Pointer to base of the stack (see Note #1).          */
+} CLK_TASK_CFG;
+
+
+#endif  /* CLK_TYPE_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/Auth/auth.c b/src/ucos_v1_42/micrium_source/uC-Common/Auth/auth.c
new file mode 100644
index 0000000..0e3edea
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/Auth/auth.c
@@ -0,0 +1,767 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               uC/Common - Authentication Module (Auth)
+*
+* Filename      : auth.c
+* Version       : V1.01.00
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : (1) 'goto' statements were used in this software module. Their usage
+*                     is restricted to cleanup purposes in exceptional program flow (e.g.
+*                     error handling), in compliance with CERT MEM12-C and MISRA C:2012
+*                     rules 15.2, 15.3 and 15.4.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  "auth.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct  auth_user_credentials {                        /* --------------- AUTH USER CREDENTIALS -------------- */
+    AUTH_USER  User;                                            /* User structure.                                      */
+    CPU_CHAR   Pwd[AUTH_PWD_MAX_LENGTH];                        /* Password for this user.                              */
+} AUTH_USER_CREDENTIALS;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+AUTH_USER  Auth_RootUser = {
+        { 'r', 'o', 'o', 't', '\0' },
+        AUTH_RIGHT_ROOT
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  KAL_LOCK_HANDLE        Auth_LockHandle;
+
+static  CPU_SIZE_T             Auth_UserNbr = 1;
+
+static  AUTH_USER_CREDENTIALS  Auth_UsersCredentials[AUTH_NB_USERS_MAX] = {
+        {
+            {
+                    { 'r', 'o', 'o', 't', '\0' },
+                    AUTH_RIGHT_ROOT
+            },
+            { 'a', 'd', 'm', 'i', 'n', '\0' }
+        }
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Auth_GetUserHandler (const  CPU_CHAR   *p_name,
+                                                 AUTH_USER  *p_user,
+                                                 RTOS_ERR   *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              Auth_Init()
+*
+* Description : (1) Initialize Authentication module:
+*
+*                   (a) Create Lock.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               --------------- RETURNED BY KAL_LockCreate() --------------
+*                               See KAL_LockCreate() for additional return error codes.
+*
+* Return(s)   : DEF_OK,   if initialization was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Auth_Init (RTOS_ERR  *p_err)
+{
+    CPU_BOOLEAN  res = DEF_OK;
+
+
+    Auth_LockHandle = KAL_LockCreate("Auth Lock",
+                                      KAL_OPT_CREATE_NONE,
+                                      p_err);
+    if (*p_err != RTOS_ERR_NONE) {
+        res = DEF_FAIL;
+    }
+
+    return (res);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Auth_CreateUser()
+*
+* Description : Create a user and fill the user structure provided.
+*
+* Argument(s) : p_name  Pointer to user name string.
+*
+*               p_pwd   Pointer to password string.
+*
+*               p_user  Pointer to user object to fill.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           RTOS_ERR_NONE
+*                           RTOS_ERR_INVALID_STR_LEN
+*                           RTOS_ERR_NO_MORE_RSRC
+*                           RTOS_ERR_ALREADY_EXISTS
+*
+*                               ----------- RETURNED BY KAL_LockAcquire/Release() ---------
+*                               See KAL_LockAcquire/Release() for additional return error codes.
+*
+* Return(s)   : DEF_OK,   if user created successfully.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Auth_CreateUser (const  CPU_CHAR   *p_name,
+                              const  CPU_CHAR   *p_pwd,
+                                     AUTH_USER  *p_user,
+                                     RTOS_ERR   *p_err)
+{
+    AUTH_USER_CREDENTIALS  *p_user_cred;
+    CPU_SIZE_T              name_len;
+    CPU_SIZE_T              pwd_len;
+    CPU_SIZE_T              i;
+    CPU_INT16S              cmp_result;
+    CPU_BOOLEAN             result     = DEF_FAIL;
+    RTOS_ERR                local_err;
+
+
+    KAL_LockAcquire(Auth_LockHandle, KAL_OPT_PEND_NONE, KAL_TIMEOUT_INFINITE, p_err);
+    if (*p_err != RTOS_ERR_NONE) {
+        goto exit;
+    }
+
+    name_len = Str_Len_N(p_name, AUTH_NAME_MAX_LENGTH + 1);
+    pwd_len  = Str_Len_N(p_pwd,  AUTH_PWD_MAX_LENGTH  + 1);
+
+    if (name_len > AUTH_NAME_MAX_LENGTH) {
+       *p_err = RTOS_ERR_INVALID_STR_LEN;
+        goto exit_release;
+    }
+
+    if (pwd_len > AUTH_PWD_MAX_LENGTH) {
+       *p_err = RTOS_ERR_INVALID_STR_LEN;
+        goto exit_release;
+    }
+
+
+    if (Auth_UserNbr >= AUTH_NB_USERS_MAX) {
+       *p_err = RTOS_ERR_NO_MORE_RSRC;
+        goto exit_release;
+    }
+
+    for (i = 0; i < Auth_UserNbr; ++i) {
+
+        cmp_result = Str_Cmp_N(Auth_UsersCredentials[i].User.Name, p_name, name_len);
+        if (cmp_result == 0) {
+           *p_err = RTOS_ERR_ALREADY_EXISTS;
+            goto exit_release;
+        }
+    }
+
+    p_user_cred = &Auth_UsersCredentials[Auth_UserNbr];
+    ++Auth_UserNbr;
+
+    name_len = DEF_MIN(name_len + 1, AUTH_NAME_MAX_LENGTH);
+    pwd_len  = DEF_MIN(pwd_len + 1, AUTH_PWD_MAX_LENGTH);
+
+    (void)Str_Copy_N(p_user_cred->User.Name,
+                     p_name,
+                     name_len);
+
+    (void)Str_Copy_N(p_user_cred->Pwd,
+                     p_pwd,
+                     pwd_len);
+
+    p_user_cred->User.Rights = AUTH_RIGHT_NONE;
+
+    (void)Str_Copy_N(p_user->Name,
+                     p_name,
+                     name_len);
+
+    p_user->Rights = AUTH_RIGHT_NONE;
+
+
+    result = DEF_OK;
+   *p_err  = RTOS_ERR_NONE;
+
+
+exit_release:
+    KAL_LockRelease(Auth_LockHandle, &local_err);
+    (void)&local_err;
+
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Auth_ChangePassword()
+*
+* Description : Change the user's password.
+*
+* Argument(s) : p_user      Pointer to user object.
+*
+*               p_pwd       Pointer to the new password.
+*
+*               p_as_user   Pointer to user that have the permission level to do the action.
+*                               Must be the same as p_user or the ROOT user.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               RTOS_ERR_NONE
+*                               RTOS_ERR_INVALID_STR_LEN
+*                               RTOS_ERR_PERMISSION
+*                               RTOS_ERR_NOT_FOUND
+*
+*                               ----------- RETURNED BY KAL_LockAcquire/Release() ---------
+*                               See KAL_LockAcquire/Release() for additional return error codes.
+*
+* Return(s)   : DEF_OK,   if password changed successfully.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if 0
+CPU_BOOLEAN  Auth_ChangePassword (       AUTH_USER  *p_user,
+                                  const  CPU_CHAR   *p_pwd,
+                                  const  AUTH_USER  *p_as_user,
+                                         RTOS_ERR   *p_err)
+{
+    CPU_SIZE_T    name_len;
+    CPU_SIZE_T    pwd_len;
+    CPU_SIZE_T    i;
+    CPU_INT16S    cmp_result;
+    CPU_BOOLEAN   result     = DEF_FAIL;
+    RTOS_ERR      local_err;
+
+
+    KAL_LockAcquire(Auth_LockHandle, KAL_OPT_PEND_NONE, KAL_TIMEOUT_INFINITE, p_err);
+    if (*p_err != RTOS_ERR_NONE) {
+        goto exit;
+    }
+
+    name_len = Str_Len_N(p_user->Name, AUTH_NAME_MAX_LENGTH + 1);
+    pwd_len  = Str_Len_N(p_pwd,  AUTH_PWD_MAX_LENGTH  + 1);
+
+    if (pwd_len > AUTH_PWD_MAX_LENGTH) {
+       *p_err = RTOS_ERR_INVALID_STR_LEN;
+        goto exit_release;
+    }
+
+    if ((Str_Cmp(p_as_user->Name, p_user->Name)             != 0)      &&
+        (DEF_BIT_IS_CLR(p_as_user->Rights, AUTH_RIGHT_ROOT) == DEF_YES)) {
+       *p_err = RTOS_ERR_PERMISSION;
+        goto exit_release;
+    }
+
+    for (i = 0; i < Auth_UserNbr; ++i) {
+
+        cmp_result = Str_Cmp_N(Auth_UsersCredentials[i].User.Name, p_user->Name, name_len);
+        if (cmp_result == 0) {
+
+            (void)Str_Copy_N(Auth_UsersCredentials[i].Pwd,
+                             p_pwd,
+                             pwd_len);
+
+            result = DEF_OK;
+           *p_err  = RTOS_ERR_NONE;
+            goto exit_release;
+        }
+    }
+
+   *p_err = RTOS_ERR_NOT_FOUND;
+
+
+exit_release:
+    KAL_LockRelease(Auth_LockHandle, &local_err);
+    (void)&local_err;
+
+exit:
+    return (result);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           Auth_GetUser()
+*
+* Description : Get the user structure with the given name.
+*
+* Argument(s) : p_name      Pointer to user name string to retrieve.
+*
+*               p_user      Pointer to user object that will be filled with the data retrieved.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               RTOS_ERR_NONE
+*
+*                               ----------- RETURNED BY KAL_LockAcquire/Release() ---------
+*                               See KAL_LockAcquire/Release() for additional return error codes.
+*
+*                               ------------ RETURNED BY Auth_GetUserHandler() ------------
+*                               See Auth_GetUserHandler() for additional return error codes.
+*
+* Return(s)   : DEF_OK,   if user was successfully found.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Auth_GetUser (const  CPU_CHAR   *p_name,
+                                  AUTH_USER  *p_user,
+                                  RTOS_ERR   *p_err)
+{
+    CPU_BOOLEAN  result;
+    RTOS_ERR     local_err;
+
+
+    KAL_LockAcquire(Auth_LockHandle, KAL_OPT_PEND_NONE, KAL_TIMEOUT_INFINITE, p_err);
+    if (*p_err != RTOS_ERR_NONE) {
+        result = DEF_FAIL;
+        goto exit;
+    }
+
+    result = Auth_GetUserHandler(p_name, p_user, p_err);
+
+    KAL_LockRelease(Auth_LockHandle, &local_err);
+    (void)&local_err;
+
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     Auth_ValidateCredentials()
+*
+* Description : Validates the user and password tuple with known users.
+*
+* Argument(s) : p_name      Pointer to user name string.
+*
+*               p_pwd       Pointer to password string.
+*
+*               p_user      Pointer to user object that will be filled with the data retrieved.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               RTOS_ERR_NONE
+*                               RTOS_ERR_INVALID_STR_LEN
+*                               RTOS_ERR_INVALID_CREDENTIALS
+*
+*                               ----------- RETURNED BY KAL_LockAcquire/Release() ---------
+*                               See KAL_LockAcquire/Release() for additional return error codes.
+*
+* Return(s)   : DEF_OK,   if credentials are valid.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Auth_ValidateCredentials (const  CPU_CHAR   *p_name,
+                                       const  CPU_CHAR   *p_pwd,
+                                              AUTH_USER  *p_user,
+                                              RTOS_ERR   *p_err)
+{
+    CPU_SIZE_T   name_len;
+    CPU_SIZE_T   pwd_len;
+    CPU_SIZE_T   i;
+    CPU_INT16S   cmp_result;
+    CPU_BOOLEAN  result     = DEF_FAIL;
+    RTOS_ERR     local_err;
+
+
+    KAL_LockAcquire(Auth_LockHandle, KAL_OPT_PEND_NONE, KAL_TIMEOUT_INFINITE, p_err);
+    if (*p_err != RTOS_ERR_NONE) {
+        goto exit;
+    }
+
+    name_len = Str_Len_N(p_name, AUTH_NAME_MAX_LENGTH + 1);
+    pwd_len  = Str_Len_N(p_pwd,  AUTH_PWD_MAX_LENGTH  + 1);
+
+    if (name_len > AUTH_NAME_MAX_LENGTH) {
+       *p_err = RTOS_ERR_INVALID_STR_LEN;
+        goto exit_release;
+    }
+
+    if (pwd_len > AUTH_PWD_MAX_LENGTH) {
+       *p_err = RTOS_ERR_INVALID_STR_LEN;
+        goto exit_release;
+    }
+
+    for (i = 0; i < Auth_UserNbr; ++i) {
+
+        cmp_result = Str_Cmp_N(Auth_UsersCredentials[i].User.Name, p_name, name_len);
+        if (cmp_result == 0) {
+
+            cmp_result = Str_Cmp_N(Auth_UsersCredentials[i].Pwd, p_pwd, pwd_len);
+            if (cmp_result == 0) {
+
+                (void)Str_Copy_N(p_user->Name, p_name, name_len);
+                p_user->Rights = Auth_UsersCredentials[i].User.Rights;
+
+                result = DEF_OK;
+               *p_err  = RTOS_ERR_NONE;
+                goto exit_release;
+            }
+            break;
+        }
+    }
+
+   *p_err = RTOS_ERR_INVALID_CREDENTIALS;
+
+
+exit_release:
+    KAL_LockRelease(Auth_LockHandle, &local_err);
+    (void)&local_err;
+
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Auth_GrantRight()
+*
+* Description : Grants a right to a user as another user (limits the rights granted).
+*
+* Argument(s) : right       New right to grant.
+*
+*               p_user      Pointer to user object that will received the new right.
+*
+*               p_as_user   Pointer to user that has the permission level to do the action.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               RTOS_ERR_NONE
+*                               RTOS_ERR_PERMISSION
+*                               RTOS_ERR_NOT_FOUND
+*
+*                               ----------- RETURNED BY KAL_LockAcquire/Release() ---------
+*                               See KAL_LockAcquire/Release() for additional return error codes.
+*
+*                               ------------ RETURNED BY Auth_GetUserHandler() ------------
+*                               See Auth_GetUserHandler() for additional return error codes.
+*
+* Return(s)   : DEF_OK,   if right was granted successfully.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Auth_GrantRight (AUTH_RIGHT   right,
+                              AUTH_USER   *p_user,
+                              AUTH_USER   *p_as_user,
+                              RTOS_ERR    *p_err)
+{
+    CPU_SIZE_T   name_len;
+    CPU_SIZE_T   i;
+    CPU_INT16S   cmp_result;
+    CPU_BOOLEAN  result     = DEF_FAIL;
+    RTOS_ERR     local_err;
+
+
+    KAL_LockAcquire(Auth_LockHandle, KAL_OPT_PEND_NONE, KAL_TIMEOUT_INFINITE, p_err);
+    if (*p_err != RTOS_ERR_NONE) {
+        goto exit;
+    }
+
+    (void)Auth_GetUserHandler(p_as_user->Name, p_as_user, p_err);
+    if (*p_err != RTOS_ERR_NONE) {
+        goto exit_release;
+    }
+
+    if (((DEF_BIT_IS_SET(p_as_user->Rights, AUTH_RIGHT_MNG)  == DEF_NO)  ||
+         (DEF_BIT_IS_SET(p_as_user->Rights, right)           == DEF_NO)) &&
+        (DEF_BIT_IS_SET(p_as_user->Rights, AUTH_RIGHT_ROOT)  == DEF_NO))  {
+       *p_err = RTOS_ERR_PERMISSION;
+        goto exit_release;
+    }
+
+    name_len = Str_Len_N(p_user->Name, AUTH_NAME_MAX_LENGTH + 1);
+
+    for (i = 0; i < Auth_UserNbr; ++i) {
+
+        cmp_result = Str_Cmp_N(Auth_UsersCredentials[i].User.Name, p_user->Name, name_len);
+        if (cmp_result == 0) {
+
+            DEF_BIT_SET(Auth_UsersCredentials[i].User.Rights, right);
+
+            p_user->Rights = Auth_UsersCredentials[i].User.Rights;
+
+            result = DEF_OK;
+           *p_err  = RTOS_ERR_NONE;
+            goto exit_release;
+        }
+    }
+
+   *p_err = RTOS_ERR_NOT_FOUND;
+
+
+exit_release:
+    KAL_LockRelease(Auth_LockHandle, &local_err);
+    (void)&local_err;
+
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Auth_RevokeRight()
+*
+* Description : Revokes the right of a specified user.
+*
+* Argument(s) : right       Right to revoke.
+*
+*               p_user      Pointer to user object which right will be revoked.
+*
+*               p_as_user   Pointer to user that has the permission level to do the action.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               RTOS_ERR_NONE
+*                               RTOS_ERR_PERMISSION
+*                               RTOS_ERR_NOT_FOUND
+*
+*                               ----------- RETURNED BY KAL_LockAcquire/Release() ---------
+*                               See KAL_LockAcquire/Release() for additional return error codes.
+*
+*                               ------------ RETURNED BY Auth_GetUserHandler() ------------
+*                               See Auth_GetUserHandler() for additional return error codes.
+*
+* Return(s)   : DEF_OK,   if right was revoked successfully.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Auth_RevokeRight (AUTH_RIGHT   right,
+                               AUTH_USER   *p_user,
+                               AUTH_USER   *p_as_user,
+                               RTOS_ERR    *p_err)
+{
+    CPU_SIZE_T   name_len;
+    CPU_SIZE_T   i;
+    CPU_INT16S   cmp_result;
+    CPU_BOOLEAN  result     = DEF_FAIL;
+    RTOS_ERR     local_err;
+
+
+    KAL_LockAcquire(Auth_LockHandle, KAL_OPT_PEND_NONE, KAL_TIMEOUT_INFINITE, p_err);
+    if (*p_err != RTOS_ERR_NONE) {
+        goto exit;
+    }
+
+    (void)Auth_GetUserHandler(p_as_user->Name, p_as_user, p_err);
+    if (*p_err != RTOS_ERR_NONE) {
+        goto exit_release;
+    }
+
+                                                                /* This implementation allows the ROOT user ...         */
+                                                                /* ... to revoke it's own ROOT right.                   */
+    if (((DEF_BIT_IS_SET(p_as_user->Rights, AUTH_RIGHT_MNG)  == DEF_NO) ||
+         (DEF_BIT_IS_SET(p_as_user->Rights, right)           == DEF_NO)   ) &&
+        (DEF_BIT_IS_SET(p_as_user->Rights, AUTH_RIGHT_ROOT)  == DEF_NO    )    ) {
+       *p_err = RTOS_ERR_PERMISSION;
+        goto exit_release;
+    }
+
+    name_len = Str_Len_N(p_user->Name, AUTH_NAME_MAX_LENGTH + 1);
+
+    for (i = 0; i < Auth_UserNbr; ++i) {
+
+        cmp_result = Str_Cmp_N(Auth_UsersCredentials[i].User.Name, p_user->Name, name_len);
+        if (cmp_result == 0) {
+
+            DEF_BIT_CLR(Auth_UsersCredentials[i].User.Rights, right);
+
+            p_user->Rights = Auth_UsersCredentials[i].User.Rights;
+
+            result = DEF_OK;
+           *p_err  = RTOS_ERR_NONE;
+            goto exit_release;
+        }
+    }
+
+   *p_err = RTOS_ERR_NOT_FOUND;
+
+
+exit_release:
+    KAL_LockRelease(Auth_LockHandle, &local_err);
+    (void)&local_err;
+
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         Auth_GetUserHandler()
+*
+* Description : Get the user structure with the given name.
+*
+* Argument(s) : p_name      Pointer to user name string to retrieve.
+*
+*               p_user      Pointer to user object that will be filled with the data retrieved.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               RTOS_ERR_NONE
+*                               RTOS_ERR_NOT_FOUND
+*
+* Return(s)   : DEF_OK,   if user was successfully found.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Auth_GetUser().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Auth_GetUserHandler (const  CPU_CHAR   *p_name,
+                                                 AUTH_USER  *p_user,
+                                                 RTOS_ERR   *p_err)
+{
+    CPU_SIZE_T   name_len;
+    CPU_SIZE_T   i;
+    CPU_INT16S   cmp_result;
+    CPU_BOOLEAN  result;
+
+
+    name_len = Str_Len_N(p_name, AUTH_NAME_MAX_LENGTH + 1);
+
+    for (i = 0; i < Auth_UserNbr; ++i) {
+
+        cmp_result = Str_Cmp_N(Auth_UsersCredentials[i].User.Name, p_user->Name, name_len);
+        if (cmp_result == 0) {
+
+            (void)Str_Copy_N(p_user->Name,
+                             Auth_UsersCredentials[i].User.Name,
+                             name_len);
+
+            p_user->Rights = Auth_UsersCredentials[i].User.Rights;
+
+            result = DEF_OK;
+           *p_err  = RTOS_ERR_NONE;
+            goto exit;
+        }
+    }
+
+    result = DEF_FAIL;
+   *p_err  = RTOS_ERR_NOT_FOUND;
+
+
+exit:
+   return (result);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/Auth/auth.h b/src/ucos_v1_42/micrium_source/uC-Common/Auth/auth.h
new file mode 100644
index 0000000..fc5e825
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/Auth/auth.h
@@ -0,0 +1,184 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               uC/Common - Authentication Module (Auth)
+*
+* Filename      : auth.h
+* Version       : V1.01.00
+* Programmer(s) : FG
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This library header file is protected from multiple pre-processor inclusion through
+*               use of the library module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef AUTH_MODULE_PRESENT                                     /* See Note #1.                                         */
+#define AUTH_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../common_err.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  AUTH_PWD_MAX_LENGTH     32
+#define  AUTH_NAME_MAX_LENGTH    32
+
+#define  AUTH_NB_USERS_MAX       10
+
+
+#define  AUTH_RIGHT_NONE         DEF_BIT_NONE
+#define  AUTH_RIGHT_0            DEF_BIT_00
+#define  AUTH_RIGHT_1            DEF_BIT_01
+#define  AUTH_RIGHT_2            DEF_BIT_02
+#define  AUTH_RIGHT_3            DEF_BIT_03
+#define  AUTH_RIGHT_4            DEF_BIT_04
+#define  AUTH_RIGHT_5            DEF_BIT_05
+#define  AUTH_RIGHT_6            DEF_BIT_06
+#define  AUTH_RIGHT_7            DEF_BIT_07
+#define  AUTH_RIGHT_8            DEF_BIT_08
+#define  AUTH_RIGHT_9            DEF_BIT_09
+#define  AUTH_RIGHT_10           DEF_BIT_10
+#define  AUTH_RIGHT_11           DEF_BIT_11
+#define  AUTH_RIGHT_12           DEF_BIT_12
+#define  AUTH_RIGHT_13           DEF_BIT_13
+#define  AUTH_RIGHT_14           DEF_BIT_14
+#define  AUTH_RIGHT_15           DEF_BIT_15
+#define  AUTH_RIGHT_16           DEF_BIT_16
+#define  AUTH_RIGHT_17           DEF_BIT_17
+#define  AUTH_RIGHT_18           DEF_BIT_18
+#define  AUTH_RIGHT_19           DEF_BIT_19
+#define  AUTH_RIGHT_20           DEF_BIT_20
+#define  AUTH_RIGHT_21           DEF_BIT_21
+#define  AUTH_RIGHT_22           DEF_BIT_22
+#define  AUTH_RIGHT_23           DEF_BIT_23
+#define  AUTH_RIGHT_24           DEF_BIT_24
+#define  AUTH_RIGHT_25           DEF_BIT_25
+#define  AUTH_RIGHT_26           DEF_BIT_26
+#define  AUTH_RIGHT_27           DEF_BIT_27
+
+#define  AUTH_RIGHT_RSVD_1       DEF_BIT_28
+#define  AUTH_RIGHT_RSVD_2       DEF_BIT_29
+
+#define  AUTH_RIGHT_MNG          DEF_BIT_30
+#define  AUTH_RIGHT_ROOT         DEF_BIT_31
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  AUTH_RIGHT;                                /* Auth right is a 32-bit bitmap.                       */
+
+typedef  struct  auth_user  {                                   /* --------------------- AUTH USER -------------------- */
+    CPU_CHAR    Name[AUTH_NAME_MAX_LENGTH];                     /* Name of the user.                                    */
+    AUTH_RIGHT  Rights;                                         /* Rights associated to this user.                      */
+} AUTH_USER;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  AUTH_USER  Auth_RootUser;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Auth_Init                (        RTOS_ERR    *p_err);
+
+CPU_BOOLEAN  Auth_CreateUser          (const   CPU_CHAR    *p_name,
+                                       const   CPU_CHAR    *p_pwd,
+                                               AUTH_USER   *p_user,
+                                               RTOS_ERR    *p_err);
+
+CPU_BOOLEAN  Auth_GetUser             (const   CPU_CHAR    *p_name,
+                                               AUTH_USER   *p_user,
+                                               RTOS_ERR    *p_err);
+
+CPU_BOOLEAN  Auth_ValidateCredentials (const   CPU_CHAR    *p_name,
+                                       const   CPU_CHAR    *p_pwd,
+                                               AUTH_USER   *p_user,
+                                               RTOS_ERR    *p_err);
+
+CPU_BOOLEAN  Auth_GrantRight          (        AUTH_RIGHT   right,
+                                               AUTH_USER   *p_user,
+                                               AUTH_USER   *p_as_user,
+                                               RTOS_ERR    *p_err);
+
+CPU_BOOLEAN  Auth_RevokeRight         (        AUTH_RIGHT   right,
+                                               AUTH_USER   *p_user,
+                                               AUTH_USER   *p_as_user,
+                                               RTOS_ERR    *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* AUTH_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/Collections/slist.c b/src/ucos_v1_42/micrium_source/uC-Common/Collections/slist.c
new file mode 100644
index 0000000..a9e8fc9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/Collections/slist.c
@@ -0,0 +1,290 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                uC/Common - Singly-linked Lists (SList)
+*
+* Filename      : slist.c
+* Version       : V1.01.00
+* Programmer(s) : EJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  COLL_SLIST_MODULE
+
+#include  "slist.h"
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             SList_Init()
+*
+* Description : Initializes a singly-linked list.
+*
+* Argument(s) : p_head_ptr      Pointer to pointer of head element of list.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  SList_Init (SLIST_MEMBER  **p_head_ptr)
+{
+   *p_head_ptr = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             SList_Push()
+*
+* Description : Add given item at beginning of list.
+*
+* Argument(s) : p_head_ptr      Pointer to pointer of head element of list.
+*
+*               p_item          Pointer to item to add.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  SList_Push (SLIST_MEMBER  **p_head_ptr,
+                  SLIST_MEMBER   *p_item)
+{
+    p_item->p_next = *p_head_ptr;
+   *p_head_ptr     =  p_item;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SList_PushBack()
+*
+* Description : Add item at end of list.
+*
+* Argument(s) : p_head_ptr      Pointer to pointer of head element of list.
+*
+*               p_item          Pointer to item to add.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  SList_PushBack (SLIST_MEMBER  **p_head_ptr,
+                      SLIST_MEMBER   *p_item)
+{
+    SLIST_MEMBER  **p_next_ptr = p_head_ptr;
+
+
+    while (*p_next_ptr != DEF_NULL) {
+        p_next_ptr = &((*p_next_ptr)->p_next);
+    }
+
+    p_item->p_next = DEF_NULL;
+   *p_next_ptr     = p_item;
+}
+
+
+/*
+*********************************************************************************************************
+*                                              SList_Pop()
+*
+* Description : Removes and returns first element of list.
+*
+* Argument(s) : p_head_ptr      Pointer to pointer of head element of list.
+*
+* Return(s)   : Pointer to item that was at top of the list.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+SLIST_MEMBER  *SList_Pop (SLIST_MEMBER  **p_head_ptr)
+{
+    SLIST_MEMBER  *p_item;
+
+    p_item = *p_head_ptr;
+    if (p_item == DEF_NULL) {
+        return (DEF_NULL);
+    }
+
+   *p_head_ptr = p_item->p_next;
+
+    p_item->p_next = DEF_NULL;
+
+    return (p_item);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              SList_Add()
+*
+* Description : Add item after given item.
+*
+* Argument(s) : p_item      Pointer to item to add.
+*
+*               p_pos       Pointer to item after which the item to add will be inserted.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  SList_Add (SLIST_MEMBER  *p_item,
+                 SLIST_MEMBER  *p_pos)
+{
+    p_item->p_next = p_pos->p_next;
+    p_pos->p_next  = p_item;
+}
+
+
+/*
+*********************************************************************************************************
+*                                              SList_Rem()
+*
+* Description : Remove item from list.
+*
+* Argument(s) : p_head_ptr      Pointer to pointer of head element of list.
+*
+*               p_item          Pointer to item to remove.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) A CPU_SW_EXCEPTION() is thrown if the item is not found within the list.
+*********************************************************************************************************
+*/
+
+void  SList_Rem (SLIST_MEMBER  **p_head_ptr,
+                 SLIST_MEMBER   *p_item)
+{
+    SLIST_MEMBER  **p_next_ptr;
+
+
+    for (p_next_ptr = p_head_ptr; *p_next_ptr != DEF_NULL; p_next_ptr = &((*p_next_ptr)->p_next)) {
+        if (*p_next_ptr == p_item) {
+           *p_next_ptr = p_item->p_next;
+            return;
+        }
+    }
+
+    CPU_SW_EXCEPTION(;);                                        /* See Note #1.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                             SList_Sort()
+*
+* Description : Sorts list items.
+*
+* Argument(s) : p_head_ptr      Pointer to pointer of head element of list.
+*
+*               cmp_fnct        Pointer to function to use for sorting the list.
+*                                   p_item_l    Pointer to left  item.
+*                                   p_item_r    Pointer to right item.
+*                                   Returns whether the two items are ordered (DEF_YES) or not (DEF_NO).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  SList_Sort (SLIST_MEMBER  **p_head_ptr,
+                  CPU_BOOLEAN   (*cmp_fnct)(SLIST_MEMBER  *p_item_l,
+                                            SLIST_MEMBER  *p_item_r))
+{
+    CPU_BOOLEAN     swapped;
+    SLIST_MEMBER  **pp_item_l;
+
+
+    do {
+        swapped = DEF_NO;
+
+        pp_item_l = p_head_ptr;
+                                                                /* Loop until end of list is found.                     */
+        while ((*pp_item_l != DEF_NULL) && (*pp_item_l)->p_next != DEF_NULL) {
+            SLIST_MEMBER  *p_item_r = (*pp_item_l)->p_next;
+            CPU_BOOLEAN    ordered;
+
+
+            ordered = cmp_fnct(*pp_item_l, p_item_r);           /* Call provided compare fnct.                          */
+            if (ordered == DEF_NO) {                            /* If order is not correct, swap items.                 */
+                SLIST_MEMBER  *p_tmp = p_item_r->p_next;
+
+
+                p_item_r->p_next   =  *pp_item_l;               /* Swap the two items.                                  */
+              (*pp_item_l)->p_next =   p_tmp;
+               *pp_item_l          =   p_item_r;
+                pp_item_l          = &(p_item_r->p_next);
+                swapped            =   DEF_YES;                 /* Indicate a swap has been done.                       */
+            } else {
+                pp_item_l = &((*pp_item_l)->p_next);
+            }
+        }
+    } while (swapped == DEF_YES);                               /* Re-loop until no items have been swapped.            */
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/Collections/slist.h b/src/ucos_v1_42/micrium_source/uC-Common/Collections/slist.h
new file mode 100644
index 0000000..42c6e5e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/Collections/slist.h
@@ -0,0 +1,127 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                uC/Common - Singly-linked Lists (SList)
+*
+* Filename      : slist.h
+* Version       : V1.01.00
+* Programmer(s) : EJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This library header file is protected from multiple pre-processor inclusion through
+*               use of the library module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  COLL_SLIST_MODULE_PRESENT                              /* See Note #1.                                         */
+#define  COLL_SLIST_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct  slist_member  SLIST_MEMBER;
+
+struct  slist_member {
+    SLIST_MEMBER  *p_next;
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              MACROS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#define  OFFSET_OF(type, member)                      ((CPU_SIZE_T)&(((type *)0)->member))
+#define  CONTAINER_OF(p_member, parent_type, member)  (parent_type *)((CPU_ADDR)(p_member) - ((CPU_ADDR)(&((parent_type *)0)->member)))
+
+#define  SLIST_FOR_EACH(list_head, iterator)          for ((iterator) = (list_head); (iterator) != DEF_NULL; (iterator) = (iterator)->p_next)
+
+#define  SLIST_FOR_EACH_ENTRY(list_head, entry, type, member) for (  (entry) = SLIST_ENTRY(list_head, type, member); \
+                                                                   &((entry)->member.p_next) != DEF_NULL; \
+                                                                     (entry) = SLIST_ENTRY((entry)->member.p_next, type, member))
+
+#define  SLIST_ENTRY                                  CONTAINER_OF
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+void           SList_Init     (SLIST_MEMBER  **p_head_ptr);
+
+void           SList_Push     (SLIST_MEMBER  **p_head_ptr,
+                               SLIST_MEMBER   *p_item);
+
+void           SList_PushBack (SLIST_MEMBER  **p_head_ptr,
+                               SLIST_MEMBER   *p_item);
+
+SLIST_MEMBER  *SList_Pop      (SLIST_MEMBER  **p_head_ptr);
+
+void           SList_Add      (SLIST_MEMBER   *p_item,
+                               SLIST_MEMBER   *p_pos);
+
+void           SList_Rem      (SLIST_MEMBER  **p_head_ptr,
+                               SLIST_MEMBER   *p_item);
+
+void           SList_Sort     (SLIST_MEMBER  **p_head_ptr,
+                               CPU_BOOLEAN   (*cmp_fnct)(SLIST_MEMBER  *p_item_l, SLIST_MEMBER  *p_item_r));
+
+#endif /* COLL_SLIST_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/KAL/None/kal.c b/src/ucos_v1_42/micrium_source/uC-Common/KAL/None/kal.c
new file mode 100644
index 0000000..5682c96
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/KAL/None/kal.c
@@ -0,0 +1,1613 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               uC/Common - Kernel Abstraction Layer (KAL)
+*                                          No Operating System
+*
+* Filename      : kal.c
+* Version       : V1.01.00
+* Programmer(s) : EJ
+*                 JFD
+*                 OD
+*********************************************************************************************************
+* Note(s)       : (1) Since no operating system is present, most of the present features are implemented
+*                     directly in the KAL.
+*
+*                 (2) Since no operating system is present, active wait is used and may considerably
+*                     reduce performance.
+*
+*                 (3) Since no operating system is present, it is assumed that there is no multi-tasking.
+*                     Therefore, the locking mechanism can be reduced to nothing, since the execution
+*                     flow can only be pre-empted by an interrupt and it is impossible to pend on a lock
+*                     in an interrupt context.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  KAL_MODULE
+
+#include  "../kal.h"
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  KAL_CFG_ARG_CHK_EXT_EN                 DEF_ENABLED
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+KAL_CPP_EXT  const  CPU_INT32U           KAL_Version           =  10000u;
+KAL_CPP_EXT  const  KAL_TICK_RATE_HZ     KAL_TickRate          =  0u;
+
+KAL_CPP_EXT  const  KAL_TASK_HANDLE      KAL_TaskHandleNull    = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_LOCK_HANDLE      KAL_LockHandleNull    = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_SEM_HANDLE       KAL_SemHandleNull     = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_TMR_HANDLE       KAL_TmrHandleNull     = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_Q_HANDLE         KAL_QHandleNull       = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_TASK_REG_HANDLE  KAL_TaskRegHandleNull = {DEF_NULL};
+
+             const  KAL_LOCK_HANDLE      KAL_LockDfltHandle    = {(void *)1u};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- KAL SEM TYPE ------------------- */
+typedef  struct  kal_sem {
+    volatile  CPU_INT32U  Cnt;                                  /* Cnt used by sem.                                     */
+} KAL_SEM;
+
+
+                                                                /* ----------------- KAL INTERNAL DATA ---------------- */
+typedef  struct  kal_data {
+    MEM_SEG       *MemSegPtr;                                   /* Mem Seg to alloc from.                               */
+    MEM_DYN_POOL   SemPool;                                     /* Pool for sems.                                       */
+} KAL_DATA;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  KAL_DATA  *KAL_DataPtr = DEF_NULL;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         KAL CORE API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              KAL_Init()
+*
+* Description : Initialize the Kernel Abstraction Layer.
+*
+* Argument(s) : p_cfg       Pointer to KAL configuration structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_ALREADY_INIT       Already initialized and p_cfg is not NULL.
+*                                   RTOS_ERR_ALLOC              Memory segment allocation failed.
+*                                   RTOS_ERR_INIT               Memory pool initialization failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) This function must be called prior to any product initialization function if the
+*                   application needs to specify a memory segment.
+*********************************************************************************************************
+*/
+
+void  KAL_Init (KAL_CFG   *p_cfg,
+                RTOS_ERR  *p_err)
+{
+    MEM_SEG  *p_seg;
+    LIB_ERR   err_lib;
+    CPU_SR_ALLOC();
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+    CPU_CRITICAL_ENTER();
+    if (KAL_DataPtr != DEF_NULL) {                              /* Chk if KAL already init. See note #1.                */
+        CPU_CRITICAL_EXIT();
+        if (p_cfg == DEF_NULL) {
+           *p_err = RTOS_ERR_NONE;                              /* KAL_Init() can be called many times if no cfg.       */
+        } else {
+           *p_err = RTOS_ERR_ALREADY_INIT;                      /* If a cfg is given and KAL is already init, set err.  */
+        }
+        return;
+    }
+
+    p_seg = DEF_NULL;
+    if (p_cfg != DEF_NULL) {                                    /* Load cfg if given.                                   */
+        p_seg = p_cfg->MemSegPtr;
+    }
+
+    KAL_DataPtr = (KAL_DATA *)Mem_SegAlloc("KAL internal data",
+                                            p_seg,
+                                            sizeof(KAL_DATA),
+                                           &err_lib);
+    CPU_CRITICAL_EXIT();
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = RTOS_ERR_ALLOC;
+        return;
+    }
+
+    KAL_DataPtr->MemSegPtr = p_seg;
+
+    Mem_DynPoolCreate("KAL sem pool",
+                      &KAL_DataPtr->SemPool,
+                       KAL_DataPtr->MemSegPtr,
+                       sizeof(KAL_SEM),
+                       sizeof(CPU_ALIGN),
+                       0u,
+                       LIB_MEM_BLK_QTY_UNLIMITED,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = RTOS_ERR_INIT;
+        return;
+    }
+
+   *p_err = RTOS_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_FeatureQuery()
+*
+* Description : Check if specified feature is available.
+*
+* Argument(s) : feature     Feature to query.
+*
+*               opt         Option associated with the feature requested.
+*
+* Return(s)   : DEF_YES, if feature is available.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  KAL_FeatureQuery (KAL_FEATURE  feature,
+                               KAL_OPT      opt)
+{
+    CPU_BOOLEAN  is_en;
+
+
+    (void)&opt;
+
+    is_en = DEF_NO;
+
+    switch (feature) {
+        case KAL_FEATURE_TASK_CREATE:                           /* ---------------------- TASKS ----------------------- */
+        case KAL_FEATURE_TASK_DEL:
+             break;
+
+
+        case KAL_FEATURE_LOCK_CREATE:                           /* ---------------------- LOCKS ----------------------- */
+        case KAL_FEATURE_LOCK_ACQUIRE:
+        case KAL_FEATURE_LOCK_RELEASE:
+        case KAL_FEATURE_LOCK_DEL:
+             is_en = DEF_YES;
+             break;
+
+
+        case KAL_FEATURE_SEM_CREATE:                            /* ----------------------- SEMS ----------------------- */
+        case KAL_FEATURE_SEM_DEL:
+             is_en = DEF_YES;
+             break;
+
+
+        case KAL_FEATURE_SEM_PEND:
+             if (DEF_BIT_IS_SET(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+                 is_en = DEF_YES;
+             } else {
+                 #if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+                     is_en = DEF_YES;
+                 #endif
+             }
+             break;
+
+
+        case KAL_FEATURE_SEM_POST:
+             is_en = DEF_YES;
+             break;
+
+
+        case KAL_FEATURE_SEM_ABORT:
+        case KAL_FEATURE_SEM_SET:
+             break;
+
+
+        case KAL_FEATURE_Q_CREATE:                              /* ---------------------- QUEUES ---------------------- */
+        case KAL_FEATURE_Q_POST:
+        case KAL_FEATURE_Q_PEND:
+             break;
+
+
+        case KAL_FEATURE_DLY:                                   /* ----------------------- DLYS ----------------------- */
+             #if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+        case KAL_FEATURE_TASK_REG:                              /* --------------------- TASK REGS -------------------- */
+             break;
+
+
+        case KAL_FEATURE_TICK_GET:                              /* ------------------- TICK CTR INFO ------------------ */
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (is_en);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         TASK API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_TaskAlloc()
+*
+* Description : Allocate a task object and its stack.
+*
+* Argument(s) : p_name          Pointer to name of the task.
+*
+*               p_stk_base      Pointer to start of task stack. If NULL, the stack will be allocated from
+*                               the KAL memory segment.
+*
+*               stk_size_bytes  Size (in bytes) of the task stack.
+*
+*               p_cfg           Pointer to KAL task configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Feature not available without an OS.
+*
+* Return(s)   : Allocated task's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TASK_HANDLE  KAL_TaskAlloc (const  CPU_CHAR          *p_name,
+                                       void              *p_stk_base,
+                                       CPU_SIZE_T         stk_size_bytes,
+                                       KAL_TASK_EXT_CFG  *p_cfg,
+                                       RTOS_ERR          *p_err)
+{
+    KAL_TASK_HANDLE  handle = KAL_TaskHandleNull;
+
+
+                                                                /* Task creation is not avail.                          */
+    (void)&p_name;
+    (void)&p_stk_base;
+    (void)&stk_size_bytes;
+    (void)&p_cfg;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskCreate()
+*
+* Description : Create and start a task.
+*
+* Argument(s) : task_handle     Handle of the task to create.
+*
+*               p_fnct          Pointer to task function.
+*
+*               p_task_arg      Pointer to argument that will be passed to task function (can be DEF_NULL).
+*
+*               prio            Task priority.
+*
+*               p_cfg           Pointer to KAL task configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Feature not available without an OS.
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) The task must be allocated prior to this call using KAL_TaskAlloc().
+*********************************************************************************************************
+*/
+
+void  KAL_TaskCreate (KAL_TASK_HANDLE     task_handle,
+                      void              (*p_fnct)(void  *p_arg),
+                      void               *p_task_arg,
+                      CPU_INT08U          prio,
+                      KAL_TASK_EXT_CFG   *p_cfg,
+                      RTOS_ERR           *p_err)
+{
+                                                                /* Task creation is not avail.                          */
+    (void)&task_handle;
+    (void)&(*p_fnct);
+    (void)&p_task_arg;
+    (void)&prio;
+    (void)&p_cfg;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_TaskDel()
+*
+* Description : Delete a task.
+*
+* Argument(s) : task_handle     Handle of the task to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Feature not available without an OS.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TaskDel (KAL_TASK_HANDLE   task_handle,
+                   RTOS_ERR         *p_err)
+{
+                                                                /* Task del is not avail.                               */
+    (void)&task_handle;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         LOCK API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockCreate()
+*
+* Description : Create a lock, which is unlocked by default.
+*
+* Argument(s) : p_name          Pointer to name of the lock.
+*
+*               p_cfg           Pointer to KAL lock configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               Function always successful.
+*
+* Return(s)   : Created lock handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_LOCK_HANDLE  KAL_LockCreate (const  CPU_CHAR          *p_name,
+                                        KAL_LOCK_EXT_CFG  *p_cfg,
+                                        RTOS_ERR          *p_err)
+{
+    KAL_LOCK_HANDLE  handle = KAL_LockHandleNull;
+
+
+    (void)&p_name;
+    (void)&p_cfg;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NONE;
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockAcquire()
+*
+* Description : Acquire a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to acquire.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or lock is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or lock is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately even if lock is not available.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               Function always successful.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockAcquire (KAL_LOCK_HANDLE   lock_handle,
+                       KAL_OPT           opt,
+                       CPU_INT32U        timeout_ms,
+                       RTOS_ERR         *p_err)
+{
+    (void)&lock_handle;
+    (void)&opt;
+    (void)&timeout_ms;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockRelease()
+*
+* Description : Release a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to release.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               Function always successful.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockRelease (KAL_LOCK_HANDLE   lock_handle,
+                       RTOS_ERR         *p_err)
+{
+    (void)&lock_handle;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_LockDel()
+*
+* Description : Delete a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               Function always successful.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockDel (KAL_LOCK_HANDLE   lock_handle,
+                   RTOS_ERR         *p_err)
+{
+    (void)&lock_handle;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          SEM API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_SemCreate()
+*
+* Description : Create a semaphore, with a count of 0.
+*
+* Argument(s) : p_name          Pointer to name of the semaphore.
+*
+*               p_cfg           Pointer to KAL semaphore configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_SUPPORTED      'p_cfg' parameter was not NULL.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for semaphore.
+*
+* Return(s)   : Created semaphore's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_SEM_HANDLE  KAL_SemCreate (const  CPU_CHAR         *p_name,
+                                      KAL_SEM_EXT_CFG  *p_cfg,
+                                      RTOS_ERR         *p_err)
+{
+    KAL_SEM_HANDLE   handle = KAL_SemHandleNull;
+    KAL_SEM         *p_sem;
+    LIB_ERR          err_lib;
+
+
+    (void)&p_name;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return (handle);
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    p_sem = (KAL_SEM *)Mem_DynPoolBlkGet(&KAL_DataPtr->SemPool,
+                                         &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = RTOS_ERR_ALLOC;
+        return (handle);
+    }
+
+    p_sem->Cnt       =  0u;                                     /* Created sem is unvavail at creation.                 */
+    handle.SemObjPtr = (void *)p_sem;
+   *p_err            =  RTOS_ERR_NONE;
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemPend()
+*
+* Description : Pend on a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to pend on.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or semaphore is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or semaphore is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately even if semaphore is not available.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_WOULD_BLOCK        KAL_OPT_PEND_NON_BLOCKING opt specified and
+*                                                               semaphore is not available.
+*                                   RTOS_ERR_TIMEOUT            Operation timed-out.
+*                                   RTOS_ERR_OS                 Generic OS error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPend (KAL_SEM_HANDLE   sem_handle,
+                   KAL_OPT          opt,
+                   CPU_INT32U       timeout_ms,
+                   RTOS_ERR        *p_err)
+{
+    KAL_SEM    *p_sem;
+    CPU_REG32   sem_cnt = 0u;
+    CPU_SR_ALLOC();
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (DEF_BIT_IS_SET_ANY(opt, ~(KAL_OPT_PEND_NONE | KAL_OPT_PEND_NON_BLOCKING)) == DEF_YES) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (dly_ts > (DEF_GET_U_MAX_VAL(CPU_TS_TMR) - 1u)) {
+           *p_err = RTOS_ERR_INVALID_ARG;                       /* Dly too long for size of tmr used.                   */
+            return;
+        }
+    #endif
+
+    p_sem = (KAL_SEM *)sem_handle.SemObjPtr;
+
+    if (DEF_BIT_IS_CLR(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+                                                                /* Blocking call.                                       */
+        if (timeout_ms == 0u) {
+            while (sem_cnt == 0u) {
+                CPU_CRITICAL_ENTER();
+                sem_cnt = p_sem->Cnt;
+                if (sem_cnt != 0u) {
+                   p_sem->Cnt--;                                /* Dec sem cnt.                                         */
+                }
+                CPU_CRITICAL_EXIT();
+            }
+           *p_err = RTOS_ERR_NONE;
+        } else {
+            #if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+            {
+                CPU_TS_TMR       ts;
+                CPU_TS_TMR       ts_prev;
+                CPU_INT32U       ts_delta;
+                CPU_INT32U       timeout_ts;
+                CPU_TS_TMR_FREQ  tmr_freq;
+                CPU_INT08U       tmr_size = sizeof(CPU_TS_TMR);
+                CPU_ERR          err_cpu;
+
+
+                tmr_freq = CPU_TS_TmrFreqGet(&err_cpu);
+                if (err_cpu != CPU_ERR_NONE) {
+                   *p_err = RTOS_ERR_OS;
+                    return;
+                }
+
+                timeout_ts = timeout_ms * (tmr_freq / 1000u);   /* Calc timeout ts val, depending on tmr freq.          */
+                ts_delta   = 0u;
+                ts_prev    = CPU_TS_TmrRd();
+
+                while (ts_delta < timeout_ts) {                 /* Loop until sem is avail or timeout expires.          */
+                    CPU_CRITICAL_ENTER();
+                    sem_cnt = p_sem->Cnt;
+                    if (sem_cnt != 0u) {
+                        p_sem->Cnt--;                           /* Dec sem cnt.                                         */
+                        CPU_CRITICAL_EXIT();
+                       *p_err = RTOS_ERR_NONE;
+                        return;
+                    }
+                    CPU_CRITICAL_EXIT();
+
+                    ts = CPU_TS_TmrRd();
+                    if (ts >= ts_prev) {                        /* Update ts_delta val.                                 */
+                        ts_delta += ts - ts_prev;
+                    } else {                                    /* Wraparound.                                          */
+                        ts_delta += DEF_GET_U_MAX_VAL(CPU_TS_TMR) - ts_prev + ts;
+                    }
+                    ts_prev = ts;
+                }
+               *p_err = RTOS_ERR_TIMEOUT;
+            }
+            #else
+               *p_err = RTOS_ERR_NOT_AVAIL;
+            #endif
+        }
+    } else {                                                    /* Non-blocking call.                                   */
+        CPU_CRITICAL_ENTER();
+        if (p_sem->Cnt != 0u) {
+            p_sem->Cnt--;
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = RTOS_ERR_WOULD_BLOCK;
+        }
+        CPU_CRITICAL_EXIT();
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemPost()
+*
+* Description : Post a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to post.
+*
+*               opt             Options available:
+*                                   KAL_OPT_POST_NONE:     wake only the highest priority task pending on semaphore.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_WOULD_OVF          Semaphore would overflow.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPost (KAL_SEM_HANDLE   sem_handle,
+                   KAL_OPT          opt,
+                   RTOS_ERR        *p_err)
+{
+    KAL_SEM  *p_sem;
+    CPU_SR_ALLOC();
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (opt != KAL_OPT_POST_NONE) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    p_sem = (KAL_SEM *)sem_handle.SemObjPtr;
+
+    CPU_CRITICAL_ENTER();
+    p_sem->Cnt++;
+    if (p_sem->Cnt != 0u) {
+       *p_err = RTOS_ERR_NONE;
+    } else {
+       *p_err = RTOS_ERR_WOULD_OVF;
+        p_sem->Cnt--;
+    }
+    CPU_CRITICAL_EXIT();
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_SemPendAbort()
+*
+* Description : Abort given semaphore and resume all the tasks pending on it.
+*
+* Argument(s) : sem_handle      Handle of the sempahore to abort.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Feature not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPendAbort (KAL_SEM_HANDLE   sem_handle,
+                        RTOS_ERR        *p_err)
+{
+    (void)&sem_handle;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemSet()
+*
+* Description : Set value of semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to set.
+*
+*               cnt             Count value to set semaphore.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Feature not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemSet (KAL_SEM_HANDLE   sem_handle,
+                  CPU_INT08U       cnt,
+                  RTOS_ERR        *p_err)
+{
+    (void)&sem_handle;
+    (void)&cnt;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemDel()
+*
+* Description : Delete a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemDel (KAL_SEM_HANDLE   sem_handle,
+                  RTOS_ERR        *p_err)
+{
+    KAL_SEM  *p_sem;
+    LIB_ERR   err_lib;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    p_sem = (KAL_SEM *)sem_handle.SemObjPtr;
+
+    Mem_DynPoolBlkFree(       &KAL_DataPtr->SemPool,
+                       (void *)p_sem,
+                              &err_lib);
+    (void)&err_lib;
+
+   *p_err = RTOS_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TMR API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_TmrCreate()
+*
+* Description : Create a single-shot timer.
+*
+* Argument(s) : p_name          Pointer to name of the timer.
+*
+*               p_callback      Pointer to the callback function that will be called on completion of timer.
+*
+*               p_callback_arg  Argument passed to callback function.
+*
+*               interval_ms     If timer is 'one-shot', delay  used by the timer, in milliseconds.
+*                               If timer is 'periodic', period used by the timer, in milliseconds.
+*
+*               p_cfg           Pointer to KAL timer configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*
+* Return(s)   : Created timer handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TMR_HANDLE  KAL_TmrCreate (const  CPU_CHAR   *p_name,
+                               void             (*p_callback)(void  *p_arg),
+                               void              *p_callback_arg,
+                               CPU_INT32U         interval_ms,
+                               KAL_TMR_EXT_CFG   *p_cfg,
+                               RTOS_ERR          *p_err)
+{
+    KAL_TMR_HANDLE  handle = KAL_TmrHandleNull;
+
+
+    (void)&p_name;
+    (void)&p_callback;
+    (void)&p_callback_arg;
+    (void)&interval_ms;
+    (void)&p_cfg;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_TmrStart()
+*
+* Description : Start timer.
+*
+* Argument(s) : tmr_handle      Handle of timer to start.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TmrStart (KAL_TMR_HANDLE   tmr_handle,
+                    RTOS_ERR        *p_err)
+{
+    (void)&tmr_handle;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Q API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             KAL_QCreate()
+*
+* Description : Create an empty queue.
+*
+* Argument(s) : p_name          Pointer to name of the queue.
+*
+*               max_msg_qty     Maximum number of message contained in the queue.
+*
+*               p_cfg           Pointer to KAL queue configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Feature not available without an OS.
+*
+* Return(s)   : Created queue handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_Q_HANDLE  KAL_QCreate (const  CPU_CHAR       *p_name,
+                                  KAL_MSG_QTY     max_msg_qty,
+                                  KAL_Q_EXT_CFG  *p_cfg,
+                                  RTOS_ERR       *p_err)
+{
+    KAL_Q_HANDLE  handle = KAL_QHandleNull;
+
+
+                                                                /* Qs are not avail.                                    */
+    (void)&p_name;
+    (void)&max_msg_qty;
+    (void)&p_cfg;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              KAL_QPend()
+*
+* Description : Pend/get first message of queue.
+*
+* Argument(s) : q_handle        Handle of the queue to pend on.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or message is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or message is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately with or without message.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Feature not available without an OS.
+*
+* Return(s)   : Pointer to message obtained, if any, if no error.
+*
+*               Null pointer,                        otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *KAL_QPend (KAL_Q_HANDLE   q_handle,
+                  KAL_OPT        opt,
+                  CPU_INT32U     timeout_ms,
+                  RTOS_ERR      *p_err)
+{
+                                                                /* Qs are not avail.                                    */
+    (void)&q_handle;
+    (void)&opt;
+    (void)&timeout_ms;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(DEF_NULL);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return (DEF_NULL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              KAL_QPost()
+*
+* Description : Post message on queue.
+*
+* Argument(s) : q_handle        Handle of the queue on which to post message.
+*
+*               p_msg           Pointer to message to post.
+*
+*               opt             Options available:
+*                                   KAL_OPT_POST_NONE:     wake only the highest priority task pending on queue.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Feature not available without an OS.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_QPost (KAL_Q_HANDLE   q_handle,
+                 void          *p_msg,
+                 KAL_OPT        opt,
+                 RTOS_ERR      *p_err)
+{
+                                                                /* Qs are not avail.                                    */
+    (void)&q_handle;
+    (void)&p_msg;
+    (void)&opt;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DLY API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               KAL_Dly()
+*
+* Description : Delay current task (in milliseconds).
+*
+* Argument(s) : dly_ms          Delay value, in milliseconds.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) This function is only available if time stamp is enabled. Otherwise, without an OS,
+*                   there is no other available way to measure time.
+*********************************************************************************************************
+*/
+
+void  KAL_Dly (CPU_INT32U  dly_ms)
+{
+    #if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+        CPU_TS_TMR       ts;
+        CPU_TS_TMR       ts_prev;
+        CPU_INT32U       ts_delta;
+        CPU_INT32U       dly_ts;
+        CPU_TS_TMR_FREQ  tmr_freq;
+        CPU_INT08U       tmr_size = sizeof(CPU_TS_TMR);
+        CPU_ERR          err_cpu;
+
+
+        #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)             /* ---------------- VALIDATE ARGUMENTS ---------------- */
+            if (dly_ts > (DEF_GET_U_MAX_VAL(CPU_TS_TMR) - 1u)) {
+                CPU_SW_EXCEPTION(;);                            /* Fail call. Dly too long for size of tmr used.        */
+            }
+        #endif
+
+        tmr_freq = CPU_TS_TmrFreqGet(&err_cpu);
+        if (err_cpu != CPU_ERR_NONE) {
+            CPU_SW_EXCEPTION(;);                                /* Fail call.                                           */
+        }
+
+        dly_ts   = dly_ms * (tmr_freq / 1000u);                 /* Calc dly ts val, depending on tmr freq.              */
+        ts_delta = 0u;
+        ts_prev  = CPU_TS_TmrRd();
+
+        while (ts_delta < dly_ts) {                             /* Loop until dly expires.                              */
+            ts = CPU_TS_TmrRd();
+            if (ts > ts_prev) {                                 /* Update ts_delta val.                                 */
+                ts_delta += ts - ts_prev;
+            } else {                                            /* Wraparound.                                          */
+                ts_delta += DEF_GET_U_MAX_VAL(CPU_TS_TMR) - ts_prev + ts;
+            }
+            ts_prev = ts;
+        }
+
+        return;
+    #else
+        (void)&dly_ms;
+
+        CPU_SW_EXCEPTION(;);                                    /* Fail call. See note #1.                              */
+    #endif
+}
+
+/*
+*********************************************************************************************************
+*                                             KAL_DlyTick()
+*
+* Description : Delay current task (in ticks).
+*
+* Argument(s) : dly_ticks       Delay value, in ticks.
+*
+*               opt             Options available:
+*                                   KAL_OPT_DLY_NONE:       apply a 'normal' delay.
+*                                   KAL_OPT_DLY:            apply a 'normal' delay.
+*                                   KAL_OPT_DLY_PERIODIC:   apply a periodic delay.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) This function can only be called if an OS is present, since the notion of 'tick' is
+*                   not present if no OS is available.
+*********************************************************************************************************
+*/
+
+void  KAL_DlyTick (KAL_TICK  dly_ticks,
+                   KAL_OPT   opt)
+{
+    (void)&dly_ticks;
+    (void)&opt;
+
+    CPU_SW_EXCEPTION(;);                                        /* Fail call. See note #1.                              */
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TASK REG API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          KAL_TaskRegCreate()
+*
+* Description : Create a task register.
+*
+* Argument(s) : p_cfg           Pointer to KAL task register configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Feature not available without an OS.
+*
+* Return(s)   : Created task register's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TASK_REG_HANDLE  KAL_TaskRegCreate (KAL_TASK_REG_EXT_CFG  *p_cfg,
+                                        RTOS_ERR              *p_err)
+{
+    KAL_TASK_REG_HANDLE  handle = KAL_TaskRegHandleNull;
+
+
+    (void)&p_cfg;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskRegGet()
+*
+* Description : Get value from a task register.
+*
+* Argument(s) : task_handle     Handle of the task associated to the task register. Current task is used if NULL.
+*
+*               task_reg_handle Handle of the task register to read.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Feature not available without an OS.
+*
+* Return(s)   : Value read from the task register, if no error.
+*               0,                                 otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  KAL_TaskRegGet (KAL_TASK_HANDLE       task_handle,
+                            KAL_TASK_REG_HANDLE   task_reg_handle,
+                            RTOS_ERR             *p_err)
+{
+                                                                /* Task reg is not avail.                               */
+    (void)&task_handle;
+    (void)&task_reg_handle;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(0u);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return (0u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskRegSet()
+*
+* Description : Set value of task register.
+*
+* Argument(s) : task_handle     Handle of the task associated to the task register. Current task is used if NULL.
+*
+*               task_reg_handle Handle of the task register to write to.
+*
+*               val             Value to write in the task register.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Feature not available without an OS.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TaskRegSet (KAL_TASK_HANDLE       task_handle,
+                      KAL_TASK_REG_HANDLE   task_reg_handle,
+                      CPU_INT32U            val,
+                      RTOS_ERR             *p_err)
+{
+                                                                /* Task reg is not avail.                               */
+    (void)&task_handle;
+    (void)&task_reg_handle;
+    (void)&val;
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_TickGet()
+*
+* Description : Get value of OS' tick counter.
+*
+* Argument(s) : p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_AVAIL          Feature not available without an OS.
+*
+* Return(s)   : OS tick counter's value.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TICK  KAL_TickGet (RTOS_ERR  *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(0u);
+        }
+    #endif
+
+   *p_err = RTOS_ERR_NOT_AVAIL;
+
+    return (0u);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/KAL/POSIX/kal.c b/src/ucos_v1_42/micrium_source/uC-Common/KAL/POSIX/kal.c
new file mode 100644
index 0000000..7a6d988
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/KAL/POSIX/kal.c
@@ -0,0 +1,1186 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                uC/Common - Kernel Abstraction Layer (KAL)
+*                                            POSIX Threads
+*
+* Filename      : kal.c
+* Version       : V0.00.01
+* Programmer(s) : EJ
+*********************************************************************************************************
+* Notes         : (1) Requires a Single UNIX Specification, Version 3 compliant operating environment.
+*                     On Linux _XOPEN_SOURCE must be defined to at least 600, generally by passing the
+*                     -D_XOPEN_SOURCE=600 command line option to GCC.
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define   MICRIUM_SOURCE
+#define   KAL_MODULE
+
+#include  "../kal.h"
+
+#include  
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                             LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define KAL_CFG_ARG_CHK_EXT_EN  DEF_ENABLED
+
+/*
+*********************************************************************************************************
+*                                            LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+KAL_CPP_EXT  const  KAL_TASK_HANDLE      KAL_TaskHandleNull    = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_LOCK_HANDLE      KAL_LockHandleNull    = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_SEM_HANDLE       KAL_SemHandleNull     = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_Q_HANDLE         KAL_QHandleNull       = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_TMR_HANDLE       KAL_TmrHandleNull     = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_TASK_REG_HANDLE  KAL_TaskRegHandleNull = {DEF_NULL};
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  struct  kal_data {
+    MEM_SEG       *MemSegPtr;
+
+    MEM_DYN_POOL   TaskPool;
+    MEM_DYN_POOL   LockPool;
+    MEM_DYN_POOL   SemPool;
+} KAL_DATA;
+
+typedef  struct  kal_lock {
+    pthread_mutex_t      Mutex;
+    pthread_mutexattr_t  MutexAttr;
+} KAL_LOCK;
+
+
+typedef  struct  kal_sem {
+    sem_t      Sem;
+} KAL_SEM;
+
+typedef  struct  kal_task {
+    pthread_t       Thread;
+    pthread_attr_t  ThreadAttr;
+} KAL_TASK;
+
+typedef  struct  kal_task_fnct_info {
+    void  (*Fnct)(void  *p_arg);
+    void   *ArgPtr;
+    sem_t   SemInit;
+} KAL_TASK_FNCT_INFO;
+
+
+/*
+*********************************************************************************************************
+*                                              LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  KAL_DATA  *KAL_DataPtr = DEF_NULL;
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  *KAL_TaskFnctWrapper(void  *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         KAL CORE API FUNCTIONS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_Init()
+*
+* Description : Initialize the Kernel Abstraction Layer.
+*
+* Note(s)     : (1) This function must be called prior to any product initialization function if the
+*                   application needs to specify a memory segment
+*********************************************************************************************************
+*/
+
+void  KAL_Init (KAL_CFG  *p_cfg,
+                KAL_ERR  *p_err)
+{
+    LIB_ERR   err_lib;
+    MEM_SEG  *p_seg ;
+
+
+#if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+#endif                                                          /* ----- (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) ------ */
+
+    if (KAL_DataPtr != (KAL_DATA *)0) {                         /* Chk if KAL already init. See note (1).               */
+       *p_err = KAL_ERR_NONE;
+        return;
+    }
+
+                                                                /* ------------------ ALLOC KAL DATA ------------------ */
+    p_seg = DEF_NULL;
+    if (p_cfg != DEF_NULL) {                                    /* Load cfg if given.                                   */
+        KAL_DataPtr->MemSegPtr = p_cfg->MemSegPtr;
+    }
+
+    KAL_DataPtr = (KAL_DATA *)Mem_SegAlloc("KAL internal data",
+                                            p_seg,
+                                            sizeof(KAL_DATA),
+                                           &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = KAL_ERR_MEM_ALLOC;
+        return;
+    }
+
+    KAL_DataPtr->MemSegPtr = p_seg;
+
+                                                                /* ----------------- CREATE TASK POOL ----------------- */
+    Mem_DynPoolCreate("KAL task pool",
+                     &KAL_DataPtr->TaskPool,
+                      KAL_DataPtr->MemSegPtr,
+                      sizeof(KAL_TASK),
+                      sizeof(CPU_ALIGN),
+                      0u,
+                      LIB_MEM_BLK_QTY_UNLIMITED,
+                     &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = KAL_ERR_POOL_INIT;
+        return;
+    }
+
+                                                                /* ----------------- CREATE LOCK POOL ----------------- */
+    Mem_DynPoolCreate("KAL lock pool",
+                     &KAL_DataPtr->LockPool,
+                      KAL_DataPtr->MemSegPtr,
+                      sizeof(KAL_LOCK),
+                      sizeof(CPU_ALIGN),
+                      0u,
+                      LIB_MEM_BLK_QTY_UNLIMITED,
+                     &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = KAL_ERR_POOL_INIT;
+        return;
+    }
+
+                                                                /* ----------------- CREATE LOCK POOL ----------------- */
+    Mem_DynPoolCreate("KAL sem pool",
+                     &KAL_DataPtr->SemPool,
+                      KAL_DataPtr->MemSegPtr,
+                      sizeof(KAL_SEM),
+                      sizeof(CPU_ALIGN),
+                      0u,
+                      LIB_MEM_BLK_QTY_UNLIMITED,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        *p_err = KAL_ERR_POOL_INIT;
+        return;
+    }
+
+
+   *p_err = KAL_ERR_NONE;
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         KAL_FeatureQuery()
+*
+* Description : Query a feature and make sure it is available.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  KAL_FeatureQuery (KAL_FEATURE  feature,
+                               KAL_OPT      opt)
+{
+    switch (feature) {
+        case KAL_FEATURE_LOCK_CREATE:
+        case KAL_FEATURE_LOCK_DEL:
+             return (DEF_YES);
+
+
+        default:
+             return (DEF_NO);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         TASK API FUNCTIONS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskAlloc()
+*
+* Description : Allocate a task object and its stack.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+KAL_TASK_HANDLE  KAL_TaskAlloc (const  CPU_CHAR          *p_name,
+                                       void              *p_stk_base,
+                                       CPU_SIZE_T         stk_size_word,
+                                       KAL_TASK_EXT_CFG  *p_cfg,
+                                       KAL_ERR           *p_err)
+{
+    KAL_TASK_HANDLE   handle = {DEF_NULL};
+    KAL_TASK         *p_task_data;
+    LIB_ERR           lib_err;
+    int               pthread_err;
+
+#if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(handle);
+    }
+
+    if (p_cfg != DEF_NULL) {                                    /* Chk for unimpl cfg specified.                        */
+       *p_err = KAL_ERR_UNIMPLEMENTED;
+        return (handle);
+    }
+
+    if (p_stk_base != DEF_NULL) {                               /* Chk for unimpl user-specified stk base.              */
+       *p_err = KAL_ERR_UNIMPLEMENTED;
+        return (handle);
+    }
+#endif
+
+    p_task_data = (KAL_TASK *)Mem_DynPoolBlkGet(&KAL_DataPtr->TaskPool,
+                                                     &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *p_err = KAL_ERR_MEM_ALLOC;
+        return (handle);
+    }
+
+                                                                /* ------------------ SET MUTEX ATTR ------------------ */
+    pthread_err = pthread_attr_init(&p_task_data->ThreadAttr);
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_CREATE;
+        return (handle);
+    }
+
+
+                                                                /* Turn off sched param inheritance.                    */
+    pthread_err = pthread_attr_setinheritsched(&p_task_data->ThreadAttr, PTHREAD_EXPLICIT_SCHED);
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_CREATE;
+        return (handle);
+    }
+
+                                                                /* Sel round-robin sched policy for equal-prio tasks    */
+    pthread_err = pthread_attr_setschedpolicy(&p_task_data->ThreadAttr, SCHED_RR);
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_CREATE;
+        return (handle);
+    }
+
+                                                                /* Set stk size.                                        */
+    pthread_err = pthread_attr_setstacksize(&p_task_data->ThreadAttr, stk_size_word * sizeof(CPU_DATA));
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_CREATE;
+        return (handle);
+    }
+
+    handle.TaskObjPtr = (void *)p_task_data;
+   *p_err = KAL_ERR_NONE;
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_TaskSizeGet()
+*
+* Description : Get the size in memory of a task.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  KAL_TaskSizeGet (CPU_SIZE_T         stk_size_word,
+                             KAL_TASK_EXT_CFG  *p_cfg,
+                             KAL_ERR           *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+    return (0);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_TaskCreate()
+*
+* Description : Create a task.
+*
+* Note(s)     : (1) The task must be allocated prior to this call using KAL_TaskAlloc().
+*********************************************************************************************************
+*/
+
+void  KAL_TaskCreate (KAL_TASK_HANDLE    task_handle,
+                      void             (*p_fnct)(void *),
+                      void              *p_arg,
+                      CPU_INT08U         prio,
+                      KAL_TASK_EXT_CFG  *p_cfg,
+                      KAL_ERR           *p_err)
+{
+    KAL_TASK        *p_task_data;
+    KAL_TASK_FNCT_INFO    fnct_info;
+    int                   pthread_err;
+    struct  sched_param   param;
+
+
+#if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (task_handle.TaskObjPtr == DEF_NULL) {                   /* Chk for NULL obj ptr.                                */
+       *p_err = KAL_ERR_NULL_PTR;
+        return;
+    }
+
+    if (p_cfg != DEF_NULL) {                                    /* Chk for invalid opt flag.                            */
+       *p_err = KAL_ERR_UNIMPLEMENTED;
+        return;
+    }
+#endif
+
+    p_task_data = (KAL_TASK *)task_handle.TaskObjPtr;
+
+                                                                /* ----------------- SET THREAD ATTRS ----------------- */
+    param.sched_priority = 99 - prio;
+    pthread_err = pthread_attr_setschedparam(&p_task_data->ThreadAttr, ¶m);
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_CREATE;
+        return;
+    }
+
+
+                                                                /* ------------------ CREATE THREAD ------------------- */
+    fnct_info.Fnct  = p_fnct;
+    fnct_info.ArgPtr = p_arg;
+
+    pthread_err = sem_init(&fnct_info.SemInit, 0u, 0u);
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_CREATE;
+        return;
+    }
+
+    pthread_err = pthread_create(&p_task_data->Thread,
+                                 &p_task_data->ThreadAttr,
+                                  KAL_TaskFnctWrapper,
+                         (void *)&fnct_info);
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_CREATE;
+        return;
+    }
+
+    pthread_err = sem_wait(&fnct_info.SemInit);
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_CREATE;
+        return;
+    }
+
+   *p_err = KAL_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_TaskDel()
+*
+* Description : Delete a task.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  KAL_TaskDel (KAL_TASK_HANDLE   task_handle,
+                   KAL_ERR          *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         LOCK API FUNCTIONS
+*********************************************************************************************************
+*/
+
+KAL_LOCK_HANDLE  KAL_LockCreate (const  CPU_CHAR          *p_name,
+                                        KAL_LOCK_EXT_CFG  *p_cfg,
+                                        KAL_ERR           *p_err)
+{
+    KAL_LOCK_HANDLE   handle = KAL_LockHandleNull;
+    KAL_LOCK    *p_lock_data;
+    LIB_ERR           lib_err;
+    int               pthread_err;
+
+
+#if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(handle);
+    }
+
+    if ((p_cfg != DEF_NULL) &&                                  /* Chk for invalid opt flags.                           */
+        ((p_cfg->Opt & ~(KAL_OPT_CREATE_REENTRANT)) != 0u)) {
+       *p_err = KAL_ERR_INVALID_ARG;
+        return (handle);
+    }
+#endif
+
+    p_lock_data = (KAL_LOCK *)Mem_DynPoolBlkGet(&KAL_DataPtr->LockPool,
+                                                     &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *p_err = KAL_ERR_MEM_ALLOC;
+        return (handle);
+    }
+
+                                                                /* ------------------ SET MUTEX ATTR ------------------ */
+    pthread_err = pthread_mutexattr_init(&p_lock_data->MutexAttr);
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_CREATE;
+        goto fail_release_blk;
+    }
+
+    if (p_cfg != DEF_NULL) {                                    /* Set attr according to cfg.                           */
+        if (DEF_BIT_IS_SET(p_cfg->Opt, KAL_OPT_CREATE_REENTRANT)) {
+            pthread_err = pthread_mutexattr_settype(&p_lock_data->MutexAttr, PTHREAD_MUTEX_RECURSIVE);
+            if (pthread_err != 0) {
+               *p_err = KAL_ERR_CREATE;
+                goto fail_release_attr;
+            }
+        }
+    }
+
+                                                                /* -------------------- INIT MUTEX -------------------- */
+    pthread_err = pthread_mutex_init(&p_lock_data->Mutex, &p_lock_data->MutexAttr);
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_CREATE;
+        goto fail_release_attr;
+    }
+
+    handle.LockObjPtr = p_lock_data;
+
+   *p_err = KAL_ERR_NONE;
+    return (handle);
+
+
+fail_release_attr:
+    pthread_err = pthread_mutexattr_destroy(&p_lock_data->MutexAttr);
+    if (pthread_err != 0) {
+        CPU_SW_EXCEPTION(handle);
+    }
+
+fail_release_blk:
+    Mem_DynPoolBlkFree(&KAL_DataPtr->LockPool, (void *)p_lock_data, &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        CPU_SW_EXCEPTION(handle);
+    }
+
+    return (handle);
+}
+
+
+CPU_SIZE_T  KAL_LockSizeGet (KAL_LOCK_EXT_CFG  *p_cfg,
+                             KAL_ERR           *p_err)
+{
+   *p_err = KAL_ERR_NONE;
+    return (sizeof(KAL_LOCK));
+}
+
+
+void  KAL_LockAcquire (KAL_LOCK_HANDLE   lock_handle,
+                       KAL_OPT           opt,
+                       CPU_INT32U        timeout,
+                       KAL_ERR          *p_err)
+{
+    KAL_LOCK  *p_lock_data;
+    int             pthread_err;
+
+
+#if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (lock_handle.LockObjPtr == DEF_NULL) {                   /* Chk for NULL obj ptr.                                */
+       *p_err = KAL_ERR_NULL_PTR;
+        return;
+    }
+
+    if (opt != 0u) {                                            /* Chk for invalid opt flag.                            */
+       *p_err = KAL_ERR_INVALID_ARG;
+        return;
+    }
+#endif
+
+    p_lock_data = (KAL_LOCK *)lock_handle.LockObjPtr;
+
+    if (timeout == 0u) {
+        pthread_err = pthread_mutex_lock(&p_lock_data->Mutex);
+        if (pthread_err != 0) {
+           *p_err = KAL_ERR_OS;
+            return;
+        }
+    } else {
+        struct  timespec  ts_timeout;
+
+
+        ts_timeout.tv_sec  =  timeout / 1000u;
+        ts_timeout.tv_nsec = (timeout % 1000u) * 1000u;
+
+        pthread_err = pthread_mutex_timedlock(&p_lock_data->Mutex, &ts_timeout);
+        if (pthread_err != 0) {
+           *p_err = KAL_ERR_OS;
+            return;
+        }
+    }
+
+   *p_err = KAL_ERR_NONE;
+}
+
+
+void  KAL_LockRelease (KAL_LOCK_HANDLE   lock_handle,
+                       KAL_ERR          *p_err)
+{
+    KAL_LOCK  *p_lock_data;
+    int             pthread_err;
+
+
+#if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (lock_handle.LockObjPtr == DEF_NULL) {                   /* Chk for NULL obj ptr.                                */
+       *p_err = KAL_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+    p_lock_data = (KAL_LOCK *)lock_handle.LockObjPtr;
+
+    pthread_err = pthread_mutex_unlock(&p_lock_data->Mutex);
+    if (pthread_err != 0) {
+       *p_err = KAL_ERR_OS;
+        return;
+    }
+
+   *p_err = KAL_ERR_NONE;
+}
+
+
+void  KAL_LockDel (KAL_LOCK_HANDLE   lock_handle,
+                   KAL_ERR          *p_err)
+{
+    KAL_LOCK  *p_lock_data;
+    int             pthread_err;
+    LIB_ERR         lib_err;
+
+
+    p_lock_data = (KAL_LOCK *)lock_handle.LockObjPtr;
+    if (p_lock_data == DEF_NULL) {
+       *p_err = KAL_ERR_NULL_PTR;
+        return;
+    }
+
+    pthread_err = pthread_mutexattr_destroy(&p_lock_data->MutexAttr);
+    if (pthread_err != 0) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    pthread_err = pthread_mutex_destroy(&p_lock_data->Mutex);
+    if (pthread_err != 0) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    Mem_DynPoolBlkFree(&KAL_DataPtr->LockPool, (void *)p_lock_data, &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+   *p_err = KAL_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                          SEM API FUNCTIONS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_SemCreate()
+*
+* Description : Create a semaphore.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+KAL_SEM_HANDLE  KAL_SemCreate (const  CPU_CHAR         *p_name,
+                                      KAL_SEM_EXT_CFG  *p_cfg,
+                                      KAL_ERR          *p_err)
+{
+    KAL_SEM_HANDLE   handle = KAL_SemHandleNull;
+    KAL_SEM    *p_sem_data;
+    LIB_ERR          lib_err;
+    int              sem_err;
+
+
+#if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(handle);
+    }
+
+    if (p_cfg != DEF_NULL) {                                    /* Chk for invalid opt flags.                           */
+       *p_err = KAL_ERR_INVALID_ARG;
+        return (handle);
+    }
+#endif
+
+    p_sem_data = (KAL_SEM *)Mem_DynPoolBlkGet(&KAL_DataPtr->SemPool,
+                                                   &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *p_err = KAL_ERR_MEM_ALLOC;
+        return (handle);
+    }
+
+                                                                /* --------------------- INIT SEM --------------------- */
+    sem_err = sem_init(&p_sem_data->Sem, 0u, 0u);
+    if (sem_err != 0) {
+      *p_err = KAL_ERR_CREATE;
+       Mem_DynPoolBlkFree(&KAL_DataPtr->SemPool, (void *)p_sem_data, &lib_err);
+       if (lib_err != LIB_MEM_ERR_NONE) {
+           CPU_SW_EXCEPTION(handle);
+       }
+       return (handle);
+    }
+
+    handle.SemObjPtr = p_sem_data;
+
+   *p_err = KAL_ERR_NONE;
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_SemSizeGet()
+*
+* Description : Get the size of a semaphore.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  KAL_SemSizeGet (KAL_SEM_EXT_CFG  *p_cfg,
+                            KAL_ERR          *p_err)
+{
+    *p_err = KAL_ERR_NONE;
+     return (sizeof(KAL_SEM));
+}
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_SemPend()
+*
+* Description : Pend on a semaphore.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPend (KAL_SEM_HANDLE   sem_handle,
+                   KAL_OPT          opt,
+                   CPU_INT32U       timeout,
+                   KAL_ERR         *p_err)
+{
+    KAL_SEM  *p_sem_data;
+    int            sem_err;
+
+
+#if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (sem_handle.SemObjPtr == DEF_NULL) {                     /* Chk for NULL obj ptr.                                */
+       *p_err = KAL_ERR_NULL_PTR;
+        return;
+    }
+
+    if (opt != 0u) {                                            /* Chk for invalid opt flag.                            */
+       *p_err = KAL_ERR_INVALID_ARG;
+        return;
+    }
+#endif
+
+    p_sem_data = (KAL_SEM *)sem_handle.SemObjPtr;
+
+    if (timeout == 0u) {
+        sem_err = sem_wait(&p_sem_data->Sem);
+        if (sem_err != 0) {
+           *p_err = KAL_ERR_OS;
+            return;
+        }
+    } else {
+        struct  timespec  ts_timeout;
+
+
+        ts_timeout.tv_sec  =  timeout / 1000u;
+        ts_timeout.tv_nsec = (timeout % 1000u) * 1000u;
+
+        sem_err = sem_timedwait(&p_sem_data->Sem, &ts_timeout);
+        if (sem_err != 0) {
+           *p_err = KAL_ERR_OS;
+            return;
+        }
+    }
+
+   *p_err = KAL_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_SemPost()
+*
+* Description : Post a semaphore.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPost (KAL_SEM_HANDLE   sem_handle,
+                   KAL_OPT          opt,
+                   KAL_ERR         *p_err)
+{
+    KAL_SEM  *p_sem_data;
+    int            sem_err;
+
+
+#if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (sem_handle.SemObjPtr == DEF_NULL) {                     /* Chk for NULL obj ptr.                                */
+       *p_err = KAL_ERR_NULL_PTR;
+        return;
+    }
+
+    if (opt != KAL_OPT_NONE) {                                  /* Chk for invalid opt flags.                           */
+       *p_err = KAL_ERR_INVALID_ARG;
+        return;
+    }
+#endif
+
+    p_sem_data = (KAL_SEM *)sem_handle.SemObjPtr;
+
+    sem_err = sem_post(&p_sem_data->Sem);
+    if (sem_err != 0) {
+       *p_err = KAL_ERR_OS;
+        return;
+    }
+
+   *p_err = KAL_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         KAL_SemPendAbort()
+*
+* Description : Abort given semaphore and resume all the tasks pending on it.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPendAbort (KAL_SEM_HANDLE   sem_handle,
+                        KAL_ERR         *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_SemSet()
+*
+* Description : Set count of given semaphore.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  KAL_SemSet (KAL_SEM_HANDLE   sem_handle,
+                  CPU_INT08U       count,
+                  KAL_ERR         *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_SemDel()
+*
+* Description : Delete given semaphore.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  KAL_SemDel (KAL_SEM_HANDLE   sem_handle,
+                  KAL_ERR         *p_err)
+{
+    KAL_SEM  *p_sem_data;
+    int            sem_err;
+    LIB_ERR        err_lib;
+
+
+    p_sem_data = (KAL_SEM *)sem_handle.SemObjPtr;
+
+    sem_err = sem_destroy(&p_sem_data->Sem);
+    if (sem_err != 0) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    Mem_DynPoolBlkFree(&KAL_DataPtr->SemPool, (void *)p_sem_data, &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+   *p_err = KAL_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TMR API FUNCTIONS
+*********************************************************************************************************
+*/
+
+KAL_TMR_HANDLE  KAL_TmrCreate (const  CPU_CHAR         *p_name,
+                                      void            (*p_callback)(void *),
+                                      void             *p_callback_arg,
+                                      CPU_INT32U        period_ms,
+                                      KAL_TMR_EXT_CFG  *p_cfg,
+                                      KAL_ERR          *p_err)
+{
+    KAL_TMR_HANDLE  handle = {DEF_NULL};
+
+
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+    return (handle);
+}
+
+
+CPU_SIZE_T  KAL_TmrSizeGet (void            (*p_callback)(void *),
+                            void             *p_callback_arg,
+                            CPU_INT32U        delay_ms,
+                            KAL_TMR_EXT_CFG  *p_cfg,
+                            KAL_ERR          *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+    return (0);
+}
+
+
+void  KAL_TmrStart (KAL_TMR_HANDLE   tmr,
+                    KAL_ERR         *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Q API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_QCreate()
+*
+* Description : Create a message queue.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+KAL_Q_HANDLE  KAL_QCreate (const  CPU_CHAR       *p_name,
+                                  KAL_MSG_QTY     max_msg_qty,
+                                  KAL_Q_EXT_CFG  *p_cfg,
+                                  KAL_ERR        *p_err)
+{
+    KAL_Q_HANDLE  handle = {DEF_NULL};
+
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_QSizeGet()
+*
+* Description : Get message queue size.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  KAL_QSizeGet (KAL_MSG_QTY     max_msg_qty,
+                          KAL_Q_EXT_CFG  *p_cfg,
+                          KAL_ERR        *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+    return (0);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_QPost()
+*
+* Description : Post message on queue.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  KAL_QPost (KAL_Q_HANDLE   q_handle,
+                 void          *p_msg,
+                 KAL_OPT        opt,
+                 KAL_ERR       *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_QPend()
+*
+* Description : Pend/get first message of queue.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  *KAL_QPend (KAL_Q_HANDLE   q_handle,
+                  KAL_OPT        opt,
+                  CPU_INT32U     timeout,
+                  KAL_ERR       *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+    return (DEF_NULL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_QDel()
+*
+* Description : Delay current task.
+*
+* Note(s)     : If someone ever wants to implement this function, the KAL_QCreate() function will have
+*               to be modified in order to allocate the Qs from a dynamic memory pool.
+*********************************************************************************************************
+*/
+
+void  KAL_QDel (KAL_Q_HANDLE   q_handle,
+                KAL_ERR       *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DLY API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               KAL_Dly()
+*
+* Description : Delay current task.
+*
+* Notes(s)    : None.
+*********************************************************************************************************
+*/
+
+void  KAL_Dly (CPU_INT32U  dly_ms)
+{
+    struct timespec time;
+
+
+    time.tv_sec  = dly_ms/1000;
+    dly_ms      %= 1000u;
+    time.tv_nsec = dly_ms * 1000 * 1000;
+
+    if (nanosleep(&time, DEF_NULL) != 0) {
+        CPU_SW_EXCEPTION(;);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TASK REG API FUNCTIONS
+*********************************************************************************************************
+*/
+
+KAL_TASK_REG_HANDLE  KAL_TaskRegCreate (KAL_TASK_REG_EXT_CFG  *p_cfg,
+                                        KAL_ERR               *p_err)
+{
+    KAL_TASK_REG_HANDLE  handle = {DEF_NULL};
+
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+    return (handle);
+}
+
+
+CPU_SIZE_T  KAL_TaskRegSizeGet (KAL_TASK_REG_EXT_CFG  *p_cfg,
+                                KAL_ERR               *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+    return (0);
+}
+
+
+CPU_INT32U  KAL_TaskRegGet (KAL_TASK_HANDLE       task_handle,
+                            KAL_TASK_REG_HANDLE   task_reg,
+                            KAL_ERR              *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+    return ((CPU_INT32U)-1);
+}
+
+
+void  KAL_TaskRegSet (KAL_TASK_HANDLE       task_handle,
+                      KAL_TASK_REG_HANDLE   task_reg_handle,
+                      CPU_INT32U            value,
+                      KAL_ERR              *p_err)
+{
+   *p_err = KAL_ERR_UNIMPLEMENTED;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void  *KAL_TaskFnctWrapper(void  *p_arg)
+{
+    KAL_TASK_FNCT_INFO  *p_fnct_info;
+    void (*fnct)(void *);
+    void  *p_fnct_arg;
+
+
+    p_fnct_info = (KAL_TASK_FNCT_INFO *)p_arg;
+    fnct        = p_fnct_info->Fnct;
+    p_fnct_arg  = p_fnct_info->ArgPtr;
+
+    sem_post(&p_fnct_info->SemInit);
+
+    fnct(p_fnct_arg);
+
+    return (DEF_NULL);
+}
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/KAL/Template/kal.c b/src/ucos_v1_42/micrium_source/uC-Common/KAL/Template/kal.c
new file mode 100644
index 0000000..29dfd33
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/KAL/Template/kal.c
@@ -0,0 +1,1064 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               uC/Common - Kernel Abstraction Layer (KAL)
+*                                               Template
+*
+* Filename      : kal.c
+* Version       : V1.01.00
+* Programmer(s) : EJ
+*                 OD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  KAL_MODULE
+
+#include  "../kal.h"
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+KAL_CPP_EXT  const  CPU_INT32U           KAL_Version           =  10000u;
+                                                                /* &&&& OS TICK RATE                            */
+KAL_CPP_EXT  const  KAL_TICK_RATE_HZ     KAL_TickRate          =  0u;
+
+KAL_CPP_EXT  const  KAL_TASK_HANDLE      KAL_TaskHandleNull    = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_LOCK_HANDLE      KAL_LockHandleNull    = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_SEM_HANDLE       KAL_SemHandleNull     = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_TMR_HANDLE       KAL_TmrHandleNull     = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_Q_HANDLE         KAL_QHandleNull       = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_TASK_REG_HANDLE  KAL_TaskRegHandleNull = {DEF_NULL};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         KAL CORE API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              KAL_Init()
+*
+* Description : Initialize the Kernel Abstraction Layer.
+*
+* Argument(s) : p_cfg       Pointer to KAL configuration structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) This function must be called prior to any product initialization function if the
+*                   application needs to specify a memory segment.
+*********************************************************************************************************
+*/
+
+void  KAL_Init (KAL_CFG   *p_cfg,
+                RTOS_ERR  *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_FeatureQuery()
+*
+* Description : Check if specified feature is available.
+*
+* Argument(s) : feature     Feature to query.
+*
+*               opt         Option associated with the feature requested.
+*
+* Return(s)   : DEF_YES, if feature is available.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  KAL_FeatureQuery (KAL_FEATURE  feature,
+                               KAL_OPT      opt)
+{
+    CPU_BOOLEAN  is_en;
+
+
+    (void)&opt;
+
+    is_en = DEF_NO;
+
+    switch (feature) {
+        case KAL_FEATURE_TASK_CREATE:                           /* ---------------------- TASKS ----------------------- */
+        case KAL_FEATURE_TASK_DEL:
+             break;
+
+
+        case KAL_FEATURE_LOCK_CREATE:                           /* ---------------------- LOCKS ----------------------- */
+        case KAL_FEATURE_LOCK_ACQUIRE:
+        case KAL_FEATURE_LOCK_RELEASE:
+        case KAL_FEATURE_LOCK_DEL:
+             break;
+
+
+        case KAL_FEATURE_SEM_CREATE:                            /* ----------------------- SEMS ----------------------- */
+        case KAL_FEATURE_SEM_DEL:
+        case KAL_FEATURE_SEM_PEND:
+        case KAL_FEATURE_SEM_POST:
+        case KAL_FEATURE_SEM_ABORT:
+        case KAL_FEATURE_SEM_SET:
+             break;
+
+
+        case KAL_FEATURE_Q_CREATE:                              /* ---------------------- QUEUES ---------------------- */
+        case KAL_FEATURE_Q_POST:
+        case KAL_FEATURE_Q_PEND:
+             break;
+
+
+        case KAL_FEATURE_DLY:                                   /* ----------------------- DLYS ----------------------- */
+             break;
+
+
+        case KAL_FEATURE_TASK_REG:                              /* --------------------- TASK REGS -------------------- */
+             break;
+
+
+        case KAL_FEATURE_TICK_GET:                              /* ------------------- TICK CTR INFO ------------------ */
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (is_en);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         TASK API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_TaskAlloc()
+*
+* Description : Allocate a task object and its stack.
+*
+* Argument(s) : p_name          Pointer to name of the task.
+*
+*               p_stk_base      Pointer to start of task stack. If NULL, the stack will be allocated from
+*                               the KAL memory segment.
+*
+*               stk_size_bytes  Size (in bytes) of the task stack.
+*
+*               p_cfg           Pointer to KAL task configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : Allocated task's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TASK_HANDLE  KAL_TaskAlloc (const  CPU_CHAR          *p_name,
+                                       void              *p_stk_base,
+                                       CPU_SIZE_T         stk_size_bytes,
+                                       KAL_TASK_EXT_CFG  *p_cfg,
+                                       RTOS_ERR          *p_err)
+{
+    KAL_TASK_HANDLE  handle = KAL_TaskHandleNull;
+
+
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskCreate()
+*
+* Description : Create and start a task.
+*
+* Argument(s) : task_handle     Handle of the task to create.
+*
+*               p_fnct          Pointer to task function.
+*
+*               p_task_arg      Pointer to argument that will be passed to task function (can be DEF_NULL).
+*
+*               prio            Task priority.
+*
+*               p_cfg           Pointer to KAL task configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) The task must be allocated prior to this call using KAL_TaskAlloc().
+*********************************************************************************************************
+*/
+
+void  KAL_TaskCreate (KAL_TASK_HANDLE     task_handle,
+                      void              (*p_fnct)(void  *p_arg),
+                      void               *p_task_arg,
+                      CPU_INT08U          prio,
+                      KAL_TASK_EXT_CFG   *p_cfg,
+                      RTOS_ERR           *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_TaskDel()
+*
+* Description : Delete a task.
+*
+* Argument(s) : task_handle     Handle of the task to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TaskDel (KAL_TASK_HANDLE   task_handle,
+                   RTOS_ERR         *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         LOCK API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockCreate()
+*
+* Description : Create a lock, which is unlocked by default.
+*
+* Argument(s) : p_name          Pointer to name of the lock.
+*
+*               p_cfg           Pointer to KAL lock configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : Created lock handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_LOCK_HANDLE  KAL_LockCreate (const  CPU_CHAR          *p_name,
+                                        KAL_LOCK_EXT_CFG  *p_cfg,
+                                        RTOS_ERR          *p_err)
+{
+    KAL_LOCK_HANDLE  handle = KAL_LockHandleNull;
+
+
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockAcquire()
+*
+* Description : Acquire a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to acquire.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or lock is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or lock is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately even if lock is not available.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockAcquire (KAL_LOCK_HANDLE   lock_handle,
+                       KAL_OPT           opt,
+                       CPU_INT32U        timeout_ms,
+                       RTOS_ERR         *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockRelease()
+*
+* Description : Release a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to release.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockRelease (KAL_LOCK_HANDLE   lock_handle,
+                       RTOS_ERR         *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_LockDel()
+*
+* Description : Delete a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockDel (KAL_LOCK_HANDLE   lock_handle,
+                   RTOS_ERR         *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          SEM API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_SemCreate()
+*
+* Description : Create a semaphore, with a count of 0.
+*
+* Argument(s) : p_name          Pointer to name of the semaphore.
+*
+*               p_cfg           Pointer to KAL semaphore configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : Created semaphore's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_SEM_HANDLE  KAL_SemCreate (const  CPU_CHAR         *p_name,
+                                      KAL_SEM_EXT_CFG  *p_cfg,
+                                      RTOS_ERR         *p_err)
+{
+    KAL_SEM_HANDLE  handle = KAL_SemHandleNull;
+
+
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemPend()
+*
+* Description : Pend on a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to pend on.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or semaphore is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or semaphore is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately even if semaphore is not available.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPend (KAL_SEM_HANDLE   sem_handle,
+                   KAL_OPT          opt,
+                   CPU_INT32U       timeout_ms,
+                   RTOS_ERR        *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemPost()
+*
+* Description : Post a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to post.
+*
+*               opt             Options available:
+*                                   KAL_OPT_POST_NONE:     wake only the highest priority task pending on semaphore.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPost (KAL_SEM_HANDLE   sem_handle,
+                   KAL_OPT          opt,
+                   RTOS_ERR        *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_SemPendAbort()
+*
+* Description : Abort given semaphore and resume all the tasks pending on it.
+*
+* Argument(s) : sem_handle      Handle of the sempahore to abort.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPendAbort (KAL_SEM_HANDLE   sem_handle,
+                        RTOS_ERR        *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemSet()
+*
+* Description : Set value of semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to set.
+*
+*               cnt             Count value to set semaphore.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemSet (KAL_SEM_HANDLE   sem_handle,
+                  CPU_INT08U       cnt,
+                  RTOS_ERR        *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemDel()
+*
+* Description : Delete a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemDel (KAL_SEM_HANDLE   sem_handle,
+                  RTOS_ERR        *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TMR API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_TmrCreate()
+*
+* Description : Create a single-shot timer.
+*
+* Argument(s) : p_name          Pointer to name of the timer.
+*
+*               p_callback      Pointer to the callback function that will be called on completion of timer.
+*
+*               p_callback_arg  Argument passed to callback function.
+*
+*               interval_ms     If timer is 'one-shot', delay  used by the timer, in milliseconds.
+*                               If timer is 'periodic', period used by the timer, in milliseconds.
+*
+*               p_cfg           Pointer to KAL timer configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : Created timer handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TMR_HANDLE  KAL_TmrCreate (const  CPU_CHAR   *p_name,
+                               void             (*p_callback)(void  *p_arg),
+                               void              *p_callback_arg,
+                               CPU_INT32U         interval_ms,
+                               KAL_TMR_EXT_CFG   *p_cfg,
+                               RTOS_ERR          *p_err)
+{
+    KAL_TMR_HANDLE  handle = KAL_TmrHandleNull;
+
+
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_TmrStart()
+*
+* Description : Start timer.
+*
+* Argument(s) : tmr_handle      Handle of timer to start.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TmrStart (KAL_TMR_HANDLE   tmr_handle,
+                    RTOS_ERR        *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Q API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             KAL_QCreate()
+*
+* Description : Create an empty queue.
+*
+* Argument(s) : p_name          Pointer to name of the queue.
+*
+*               max_msg_qty     Maximum number of message contained in the queue.
+*
+*               p_cfg           Pointer to KAL queue configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : Created queue handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_Q_HANDLE  KAL_QCreate (const  CPU_CHAR       *p_name,
+                                  KAL_MSG_QTY     max_msg_qty,
+                                  KAL_Q_EXT_CFG  *p_cfg,
+                                  RTOS_ERR       *p_err)
+{
+    KAL_Q_HANDLE  handle = KAL_QHandleNull;
+
+
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              KAL_QPend()
+*
+* Description : Pend/get first message of queue.
+*
+* Argument(s) : q_handle        Handle of the queue to pend on.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or message is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or message is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately with or without message.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : Pointer to message obtained, if any, if no error.
+*
+*               Null pointer,                        otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *KAL_QPend (KAL_Q_HANDLE   q_handle,
+                  KAL_OPT        opt,
+                  CPU_INT32U     timeout_ms,
+                  RTOS_ERR      *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+    return (DEF_NULL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              KAL_QPost()
+*
+* Description : Post message on queue.
+*
+* Argument(s) : q_handle        Handle of the queue on which to post message.
+*
+*               p_msg           Pointer to message to post.
+*
+*               opt             Options available:
+*                                   KAL_OPT_POST_NONE:     wake only the highest priority task pending on queue.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_QPost (KAL_Q_HANDLE   q_handle,
+                 void          *p_msg,
+                 KAL_OPT        opt,
+                 RTOS_ERR      *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DLY API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               KAL_Dly()
+*
+* Description : Delay current task (in milliseconds).
+*
+* Argument(s) : dly_ms          Delay value, in milliseconds.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_Dly (CPU_INT32U  dly_ms)
+{
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_DlyTick()
+*
+* Description : Delay current task (in ticks).
+*
+* Argument(s) : dly_ticks       Delay value, in ticks.
+*
+*               opt             Options available:
+*                                   KAL_OPT_DLY_NONE:       apply a 'normal' delay.
+*                                   KAL_OPT_DLY:            apply a 'normal' delay.
+*                                   KAL_OPT_DLY_PERIODIC:   apply a periodic delay.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_DlyTick (KAL_TICK  dly_ticks,
+                   KAL_OPT   opt)
+{
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TASK REG API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          KAL_TaskRegCreate()
+*
+* Description : Create a task register.
+*
+* Argument(s) : p_cfg           Pointer to KAL task register configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : Created task register's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TASK_REG_HANDLE  KAL_TaskRegCreate (KAL_TASK_REG_EXT_CFG  *p_cfg,
+                                        RTOS_ERR              *p_err)
+{
+    KAL_TASK_REG_HANDLE  handle = KAL_TaskRegHandleNull;
+
+
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_TickGet()
+*
+* Description : Get value of OS' tick counter.
+*
+* Argument(s) : p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : OS tick counter's value.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TICK  KAL_TickGet (RTOS_ERR *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+    return (0u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskRegGet()
+*
+* Description : Get value from a task register.
+*
+* Argument(s) : task_handle     Handle of the task associated to the task register. Current task is used if NULL.
+*
+*               task_reg_handle Handle of the task register to read.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : Value read from the task register, if no error.
+*               0,                                 otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  KAL_TaskRegGet (KAL_TASK_HANDLE       task_handle,
+                            KAL_TASK_REG_HANDLE   task_reg_handle,
+                            RTOS_ERR             *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+    return (0u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskRegSet()
+*
+* Description : Set value of task register.
+*
+* Argument(s) : task_handle     Handle of the task associated to the task register. Current task is used if NULL.
+*
+*               task_reg_handle Handle of the task register to write to.
+*
+*               val             Value to write in the task register.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NOT_SUPPORTED      Function not implemented.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TaskRegSet (KAL_TASK_HANDLE       task_handle,
+                      KAL_TASK_REG_HANDLE   task_reg_handle,
+                      CPU_INT32U            val,
+                      RTOS_ERR             *p_err)
+{
+   *p_err = RTOS_ERR_NOT_SUPPORTED;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/KAL/kal.h b/src/ucos_v1_42/micrium_source/uC-Common/KAL/kal.h
new file mode 100644
index 0000000..1570ff6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/KAL/kal.h
@@ -0,0 +1,575 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               uC/Common - Kernel Abstraction Layer (KAL)
+*
+* Filename      : kal.h
+* Version       : V1.01.00
+* Programmer(s) : OD
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/LIB V1.38.00
+*
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This library header file is protected from multiple pre-processor inclusion through
+*               use of the library module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  KAL_MODULE_PRESENT                                     /* See Note #1.                                         */
+#define  KAL_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  "../common_err.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef   KAL_MODULE
+#define  KAL_EXT
+#else
+#define  KAL_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (LIB_VERSION < 13800)
+#error  "KAL requires LIB_VERSION (defined in lib_def.h) 1.38.00 or higher to function properly."
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                                GENERAL
+*********************************************************************************************************
+*/
+
+#define  KAL_TIMEOUT_INFINITE                  0u
+
+#define  KAL_OPT_NONE                           DEF_BIT_NONE
+
+
+/*
+*********************************************************************************************************
+*                                        CREATE OPTS (LOCK ONLY)
+*********************************************************************************************************
+*/
+
+#define  KAL_OPT_CREATE_NONE                    KAL_OPT_NONE
+
+#define  KAL_OPT_CREATE_NON_REENTRANT           KAL_OPT_NONE    /* Create non-re-entrant lock.                          */
+#define  KAL_OPT_CREATE_REENTRANT               DEF_BIT_00      /* Create     re-entrant lock.                          */
+
+
+/*
+*********************************************************************************************************
+*                                       PEND OPTS (LOCK, SEM, Q)
+*********************************************************************************************************
+*/
+
+#define  KAL_OPT_PEND_NONE                      KAL_OPT_NONE
+
+#define  KAL_OPT_PEND_BLOCKING                  KAL_OPT_NONE    /* Block until rsrc is avail.                           */
+#define  KAL_OPT_PEND_NON_BLOCKING              DEF_BIT_00      /* Don't block if rsrc is unavail.                      */
+
+
+/*
+*********************************************************************************************************
+*                                       POST OPTS (LOCK, SEM, Q)
+*********************************************************************************************************
+*/
+
+#define  KAL_OPT_POST_NONE                      KAL_OPT_NONE
+
+
+/*
+*********************************************************************************************************
+*                                        ABORT OPTS (LOCK, SEM)
+*********************************************************************************************************
+*/
+
+#define  KAL_OPT_ABORT_NONE                     KAL_OPT_NONE
+
+
+/*
+*********************************************************************************************************
+*                                      DELETE OPTS (LOCK, SEM, Q)
+*********************************************************************************************************
+*/
+
+#define  KAL_OPT_DEL_NONE                       KAL_OPT_NONE
+
+
+/*
+*********************************************************************************************************
+*                                               TMR OPTS
+*********************************************************************************************************
+*/
+
+#define  KAL_OPT_TMR_NONE                       KAL_OPT_NONE
+
+#define  KAL_OPT_TMR_ONE_SHOT                   KAL_OPT_NONE    /* One-shot tmr,   callback called only once.           */
+#define  KAL_OPT_TMR_PERIODIC                   DEF_BIT_00      /* Periodic timer, callback called periodically.        */
+
+
+/*
+*********************************************************************************************************
+*                                               DLY OPTS
+*********************************************************************************************************
+*/
+
+#define  KAL_OPT_DLY_NONE                       KAL_OPT_NONE
+
+#define  KAL_OPT_DLY                            KAL_OPT_NONE    /* 'Normal' delay.                                      */
+#define  KAL_OPT_DLY_PERIODIC                   DEF_BIT_00      /* Periodic delay.                                      */
+
+
+/*
+*********************************************************************************************************
+*                                      LEGACY ERROR CODES
+*
+* Note(s) : (1) These error codes are deprecated and will be removed in a future version. Please use the
+*               codes from RTOS_ERR instead, located in common_err.h
+*********************************************************************************************************
+*/
+
+#define  KAL_ERR_NONE               RTOS_ERR_NONE
+
+#define  KAL_ERR_NOT_AVAIL          RTOS_ERR_NOT_AVAIL
+#define  KAL_ERR_UNIMPLEMENTED      RTOS_ERR_NOT_SUPPORTED
+#define  KAL_ERR_INVALID_ARG        RTOS_ERR_INVALID_ARG
+#define  KAL_ERR_NULL_PTR           RTOS_ERR_NULL_PTR
+#define  KAL_ERR_OS                 RTOS_ERR_OS
+
+#define  KAL_ERR_ALREADY_INIT       RTOS_ERR_ALREADY_INIT
+#define  KAL_ERR_MEM_ALLOC          RTOS_ERR_ALLOC
+#define  KAL_ERR_POOL_INIT          RTOS_ERR_INIT
+#define  KAL_ERR_CREATE             RTOS_ERR_CREATE_FAIL
+#define  KAL_ERR_TIMEOUT            RTOS_ERR_TIMEOUT
+#define  KAL_ERR_ABORT              RTOS_ERR_ABORT
+#define  KAL_ERR_WOULD_BLOCK        RTOS_ERR_WOULD_BLOCK
+#define  KAL_ERR_ISR                RTOS_ERR_ISR
+#define  KAL_ERR_OVF                RTOS_ERR_WOULD_OVF
+#define  KAL_ERR_RSRC               RTOS_ERR_NO_MORE_RSRC
+
+#define  KAL_ERR_LOCK_OWNER         RTOS_ERR_OWNERSHIP
+
+
+/*
+*********************************************************************************************************
+*                                      LANGUAGE SUPPORT DEFINES
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+#define  KAL_CPP_EXT  extern
+#else
+#define  KAL_CPP_EXT
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                                GENERAL
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  KAL_TICK;
+typedef  CPU_INT32U  KAL_TICK_RATE_HZ;
+
+typedef  CPU_INT16U  KAL_MSG_QTY;
+
+typedef  CPU_INT08U  KAL_OPT;
+
+                                                                /* !!!! This type is deprecated and will be removed ... */
+typedef  RTOS_ERR    KAL_ERR;                                   /* ... a future version. Use RTOS_ERR instead.          */
+
+
+/*
+*********************************************************************************************************
+*                                              OBJ HANDLES
+*********************************************************************************************************
+*/
+
+typedef  struct  kal_task_handle {                              /* -------------------- TASK HANDLE ------------------- */
+    void  *TaskObjPtr;
+} KAL_TASK_HANDLE;
+
+typedef  struct  kal_lock_handle {                              /* -------------------- LOCK HANDLE ------------------- */
+    void  *LockObjPtr;
+} KAL_LOCK_HANDLE;
+
+typedef  struct  kal_sem_handle {                               /* -------------------- SEM HANDLE -------------------- */
+    void  *SemObjPtr;
+} KAL_SEM_HANDLE;
+
+typedef  struct  kal_q_handle {                                 /* --------------------- Q HANDLE --------------------- */
+    void  *QObjPtr;
+} KAL_Q_HANDLE;
+
+typedef  struct  kal_tmr_handle {                               /* -------------------- TMR HANDLE -------------------- */
+    void  *TmrObjPtr;
+} KAL_TMR_HANDLE;
+
+typedef  struct  kal_task_reg_handle {                          /* ------------------ TASK REG HANDLE ----------------- */
+    void  *TaskRegObjPtr;
+} KAL_TASK_REG_HANDLE;
+
+
+/*
+*********************************************************************************************************
+*                                              CFG STRUCTS
+*********************************************************************************************************
+*/
+
+typedef  struct  kal_cfg {                                      /* ---------------------- GEN CFG --------------------- */
+    MEM_SEG     *MemSegPtr;                                     /* Mem seg to use for alloc.                            */
+} KAL_CFG;
+
+typedef  struct  kal_task_ext_cfg {                             /* ------------------- TASK EXT CFG ------------------- */
+    CPU_INT32U   Rsvd;                                          /* Rsvd for future use.                                 */
+} KAL_TASK_EXT_CFG;
+
+typedef  struct  kal_lock_ext_cfg {                             /* ------------------- LOCK EXT CFG ------------------- */
+    KAL_OPT      Opt;                                           /* Opt passed to LockCreate() funct.                    */
+} KAL_LOCK_EXT_CFG;
+
+typedef  struct  kal_sem_ext_cfg {                              /* -------------------- SEM EXT CFG ------------------- */
+    CPU_INT32U   Rsvd;                                          /* Rsvd for future use.                                 */
+} KAL_SEM_EXT_CFG;
+
+typedef  struct  kal_q_ext_cfg {                                /* --------------------- Q EXT CFG -------------------- */
+    CPU_INT32U   Rsvd;                                          /* Rsvd for future use.                                 */
+} KAL_Q_EXT_CFG;
+
+typedef  struct  kal_tmr_ext_cfg {                              /* -------------------- TMR EXT CFG ------------------- */
+    KAL_OPT      Opt;                                           /* Opt passed to TmrCreate() funct.                     */
+} KAL_TMR_EXT_CFG;
+
+typedef  struct  kal_task_reg_ext_cfg {                         /* ----------------- TASK REG EXT CFG ----------------- */
+    CPU_INT32U   Rsvd;                                          /* Rsvd for future use.                                 */
+} KAL_TASK_REG_EXT_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                            KAL FEATURES
+*********************************************************************************************************
+*/
+
+typedef  enum  kal_feature {
+    KAL_FEATURE_TASK_CREATE = 0u,                               /* Task creation.                                       */
+    KAL_FEATURE_TASK_DEL,                                       /* Task del.                                            */
+
+    KAL_FEATURE_LOCK_CREATE,                                    /* Lock create, acquire and release.                    */
+    KAL_FEATURE_LOCK_ACQUIRE,                                   /* Lock pend.                                           */
+    KAL_FEATURE_LOCK_RELEASE,                                   /* Lock post.                                           */
+    KAL_FEATURE_LOCK_DEL,                                       /* Lock del.                                            */
+
+    KAL_FEATURE_SEM_CREATE,                                     /* Sem creation.                                        */
+    KAL_FEATURE_SEM_PEND,                                       /* Sem pend.                                            */
+    KAL_FEATURE_SEM_POST,                                       /* Sem post.                                            */
+    KAL_FEATURE_SEM_ABORT,                                      /* Sem pend abort.                                      */
+    KAL_FEATURE_SEM_SET,                                        /* Sem set cnt.                                         */
+    KAL_FEATURE_SEM_DEL,                                        /* Sem del.                                             */
+
+    KAL_FEATURE_TMR,                                            /* Tmr creation and exec.                               */
+
+    KAL_FEATURE_Q_CREATE,                                       /* Q creation.                                          */
+    KAL_FEATURE_Q_POST,                                         /* Q post.                                              */
+    KAL_FEATURE_Q_PEND,                                         /* Q pend.                                              */
+
+    KAL_FEATURE_DLY,                                            /* Dly in both ms and ticks.                            */
+
+    KAL_FEATURE_TASK_REG,                                       /* Task storage creation, get and set.                  */
+
+    KAL_FEATURE_TICK_GET                                        /* Get OS tick val.                                     */
+} KAL_FEATURE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  CPU_INT32U           KAL_Version;                /* KAL version.                                         */
+extern  const  KAL_TICK_RATE_HZ     KAL_TickRate;               /* Tick rate.                                           */
+
+                                                                /* ------------------- NULL HANDLES ------------------- */
+extern  const  KAL_TASK_HANDLE      KAL_TaskHandleNull;
+extern  const  KAL_LOCK_HANDLE      KAL_LockHandleNull;
+extern  const  KAL_SEM_HANDLE       KAL_SemHandleNull;
+extern  const  KAL_Q_HANDLE         KAL_QHandleNull;
+extern  const  KAL_TASK_REG_HANDLE  KAL_TaskRegHandleNull;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  KAL_TASK_HANDLE_IS_NULL(task_handle)            ((task_handle.TaskObjPtr        == KAL_TaskHandleNull.TaskObjPtr)       ? DEF_YES : DEF_NO)
+#define  KAL_LOCK_HANDLE_IS_NULL(lock_handle)            ((lock_handle.LockObjPtr        == KAL_LockHandleNull.LockObjPtr)       ? DEF_YES : DEF_NO)
+#define  KAL_SEM_HANDLE_IS_NULL(sem_handle)              ((sem_handle.SemObjPtr          == KAL_SemHandleNull.SemObjPtr)         ? DEF_YES : DEF_NO)
+#define  KAL_Q_HANDLE_IS_NULL(q_handle)                  ((q_handle.QObjPtr              == KAL_QHandleNull.QObjPtr)             ? DEF_YES : DEF_NO)
+#define  KAL_TMR_HANDLE_IS_NULL(tmr_handle)              ((tmr_handle.TmrObjPtr          == KAL_TmrHandleNull.TmrObjPtr)         ? DEF_YES : DEF_NO)
+#define  KAL_TASK_REG_HANDLE_IS_NULL(task_reg_handle)    ((task_reg_handle.TaskRegObjPtr == KAL_TaskRegHandleNull.TaskRegObjPtr) ? DEF_YES : DEF_NO)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                                 CORE
+*********************************************************************************************************
+*/
+
+void                  KAL_Init         (      KAL_CFG                *p_cfg,
+                                              RTOS_ERR               *p_err);
+
+CPU_BOOLEAN           KAL_FeatureQuery (      KAL_FEATURE             feature,
+                                              KAL_OPT                 opt);
+
+
+/*
+*********************************************************************************************************
+*                                                 TASKS
+*********************************************************************************************************
+*/
+
+KAL_TASK_HANDLE       KAL_TaskAlloc    (const CPU_CHAR               *p_name,
+                                              void                   *p_stk_base,
+                                              CPU_SIZE_T              stk_size_bytes,
+                                              KAL_TASK_EXT_CFG       *p_cfg,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_TaskCreate   (      KAL_TASK_HANDLE         task_handle,
+                                              void                  (*p_fnct)(void  *p_arg),
+                                              void                   *p_task_arg,
+                                              CPU_INT08U              prio,
+                                              KAL_TASK_EXT_CFG       *p_cfg,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_TaskDel      (      KAL_TASK_HANDLE         task_handle,
+                                              RTOS_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                                 LOCKS
+*********************************************************************************************************
+*/
+
+KAL_LOCK_HANDLE       KAL_LockCreate   (const CPU_CHAR               *p_name,
+                                              KAL_LOCK_EXT_CFG       *p_cfg,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_LockAcquire  (      KAL_LOCK_HANDLE         lock_handle,
+                                              KAL_OPT                 opt,
+                                              CPU_INT32U              timeout,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_LockRelease  (      KAL_LOCK_HANDLE         lock_handle,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_LockDel      (      KAL_LOCK_HANDLE         lock_handle,
+                                              RTOS_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                                 SEMS
+*********************************************************************************************************
+*/
+
+KAL_SEM_HANDLE        KAL_SemCreate    (const CPU_CHAR               *p_name,
+                                              KAL_SEM_EXT_CFG        *p_cfg,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_SemPend      (      KAL_SEM_HANDLE          sem_handle,
+                                              KAL_OPT                 opt,
+                                              CPU_INT32U              timeout,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_SemPost      (      KAL_SEM_HANDLE          sem_handle,
+                                              KAL_OPT                 opt,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_SemPendAbort (      KAL_SEM_HANDLE          sem_handle,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_SemSet       (      KAL_SEM_HANDLE          sem_handle,
+                                              CPU_INT08U              cnt,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_SemDel       (      KAL_SEM_HANDLE          sem_handle,
+                                              RTOS_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                                 TMRS
+*********************************************************************************************************
+*/
+
+KAL_TMR_HANDLE        KAL_TmrCreate    (const CPU_CHAR               *p_name,
+                                              void                  (*p_callback)(void  *p_arg),
+                                              void                   *p_callback_arg,
+                                              CPU_INT32U              interval_ms,
+                                              KAL_TMR_EXT_CFG        *p_cfg,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_TmrStart     (      KAL_TMR_HANDLE          tmr_handle,
+                                              RTOS_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                                  QS
+*********************************************************************************************************
+*/
+
+KAL_Q_HANDLE          KAL_QCreate      (const CPU_CHAR               *p_name,
+                                              KAL_MSG_QTY             max_msg_qty,
+                                              KAL_Q_EXT_CFG          *p_cfg,
+                                              RTOS_ERR               *p_err);
+
+void                 *KAL_QPend        (      KAL_Q_HANDLE            q_handle,
+                                              KAL_OPT                 opt,
+                                              CPU_INT32U              timeout,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_QPost        (      KAL_Q_HANDLE            q_handle,
+                                              void                   *p_msg,
+                                              KAL_OPT                 opt,
+                                              RTOS_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                                 DLYS
+*********************************************************************************************************
+*/
+
+void                  KAL_Dly          (      CPU_INT32U              dly_ms);
+
+void                  KAL_DlyTick      (      KAL_TICK                dly_tick,
+                                              KAL_OPT                 opt);
+
+
+/*
+*********************************************************************************************************
+*                                               TASK REGS
+*********************************************************************************************************
+*/
+
+KAL_TASK_REG_HANDLE   KAL_TaskRegCreate(      KAL_TASK_REG_EXT_CFG   *p_cfg,
+                                              RTOS_ERR               *p_err);
+
+CPU_INT32U            KAL_TaskRegGet   (      KAL_TASK_HANDLE         task_handle,
+                                              KAL_TASK_REG_HANDLE     task_reg,
+                                              RTOS_ERR               *p_err);
+
+void                  KAL_TaskRegSet   (      KAL_TASK_HANDLE         task_handle,
+                                              KAL_TASK_REG_HANDLE     task_reg_handle,
+                                              CPU_INT32U              val,
+                                              RTOS_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                               TICK CTR
+*********************************************************************************************************
+*/
+
+KAL_TICK              KAL_TickGet      (      RTOS_ERR               *p_err);
+
+#endif /* KAL_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-II/kal.c b/src/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-II/kal.c
new file mode 100644
index 0000000..08ba3f5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-II/kal.c
@@ -0,0 +1,2815 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               uC/Common - Kernel Abstraction Layer (KAL)
+*                                                uCOS-II
+*
+* Filename      : kal.c
+* Version       : V1.01.00
+* Programmer(s) : EJ
+*                 OD
+*********************************************************************************************************
+* Note(s)       : (1) 'goto' statements were used in this software module. Their usage
+*                     is restricted to cleanup purposes in exceptional program flow (e.g.
+*                     error handling), in compliance with CERT MEM12-C and MISRA C:2012
+*                     rules 15.2, 15.3 and 15.4.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  KAL_MODULE
+
+#include  "../kal.h"
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  KAL_CFG_ARG_CHK_EXT_EN                 OS_ARG_CHK_EN
+
+#define  KAL_LOCK_OWNER_PRIO_NONE              (OS_LOWEST_PRIO + 1u)
+
+#define  KAL_INIT_STATUS_NONE                   0u
+#define  KAL_INIT_STATUS_OK                     1u
+#define  KAL_INIT_STATUS_FAIL                   2u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+KAL_CPP_EXT  const  CPU_INT32U           KAL_Version           =  10000u;
+KAL_CPP_EXT  const  KAL_TICK_RATE_HZ     KAL_TickRate          =  OS_TICKS_PER_SEC;
+
+KAL_CPP_EXT  const  KAL_TASK_HANDLE      KAL_TaskHandleNull    = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_LOCK_HANDLE      KAL_LockHandleNull    = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_SEM_HANDLE       KAL_SemHandleNull     = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_TMR_HANDLE       KAL_TmrHandleNull     = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_Q_HANDLE         KAL_QHandleNull       = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_TASK_REG_HANDLE  KAL_TaskRegHandleNull = {DEF_NULL};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ KAL TASK TYPE ------------------- */
+typedef  struct  kal_task {
+           CPU_STK     *StkBasePtr;                             /* Task stack base ptr.                                 */
+           CPU_INT32U   StkSizeBytes;                           /* Task stack size (in bytes).                          */
+
+           CPU_INT08U   Prio;                                   /* Task prio.                                           */
+#if (OS_TASK_NAME_EN == DEF_ENABLED)                            /* Check if task name is en.                            */
+    const  CPU_CHAR    *NamePtr;                                /* Task name string.                                    */
+#endif
+} KAL_TASK;
+
+                                                                /* ------------------- KAL LOCK TYPE ------------------ */
+typedef  struct  kal_lock {
+    OS_EVENT    *SemEventPtr;                                   /* Pointer to an OS_EVENT sem.                          */
+    CPU_INT08U   OptFlags;                                      /* Opt flags passed at creation.                        */
+
+    CPU_INT08U   OwnerPrio;                                     /* Prio of curr lock owner. Used only when re-entrant.  */
+    CPU_INT08U   NestingCtr;                                    /* Curr cnt of nesting calls to acquire re-entrant lock.*/
+} KAL_LOCK;
+
+                                                                /* ------------------- KAL TMR TYPE ------------------- */
+#if (OS_TMR_EN == DEF_ENABLED)
+typedef  struct  kal_tmr {
+    OS_TMR   *TmrPtr;                                           /* Ptr to an OS-II tmr obj.                             */
+
+    void    (*CallbackFnct)(void  *p_arg);                      /* Tmr registered callback fnct.                        */
+    void     *CallbackArg;                                      /* Arg to pass to callback fnct.                        */
+} KAL_TMR;
+#endif
+
+                                                                /* ---------------- KAL TASK REG TYPE ----------------- */
+#if (OS_TASK_REG_TBL_SIZE > 0u)
+typedef  struct  kal_task_reg {
+    CPU_INT08U  Id;                                             /* Id of the task reg.                                  */
+} KAL_TASK_REG;
+#endif
+
+                                                                /* -------------- KAL INTERNAL DATA TYPE -------------- */
+typedef  struct  kal_data {
+    MEM_SEG       *MemSegPtr;                                   /* Mem Seg to alloc from.                               */
+
+#if (OS_SEM_EN == DEF_ENABLED)
+    MEM_DYN_POOL   LockPool;                                    /* Dyn mem pool used to alloc locks.                    */
+#endif
+
+#if (OS_TMR_EN == DEF_ENABLED)
+    MEM_DYN_POOL   TmrPool;                                     /* Dyn mem pool used to alloc tmrs.                     */
+#endif
+
+#if (OS_TASK_REG_TBL_SIZE > 0u)
+    MEM_DYN_POOL   TaskRegPool;                                 /* Dyn mem pool used to alloc task regs.                */
+#endif
+} KAL_DATA;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static            KAL_DATA     *KAL_DataPtr    = DEF_NULL;
+
+static            CPU_BOOLEAN   KAL_IsInit     = DEF_NO;
+static  volatile  CPU_INT08U    KAL_InitStatus = KAL_INIT_STATUS_NONE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (OS_TMR_EN == DEF_ENABLED)
+static  void      KAL_TmrFnctWrapper(void        *p_tmr_os,
+                                     void        *p_arg);
+#endif
+
+static  KAL_TICK  KAL_msToTicks     (CPU_INT32U   ms);
+
+static  RTOS_ERR  KAL_ErrConvert    (CPU_INT08U   err_os);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         KAL CORE API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              KAL_Init()
+*
+* Description : Initialize the Kernel Abstraction Layer.
+*
+* Argument(s) : p_cfg       Pointer to KAL configuration structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_OS                 Concurrent initialization failed.
+*                                   RTOS_ERR_ALREADY_INIT       Already initialized and p_cfg is not NULL.
+*                                   RTOS_ERR_ALLOC              Memory segment allocation failed.
+*                                   RTOS_ERR_INIT               Memory pool initialization failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) This function must be called prior to any product initialization function if the
+*                   application needs to specify a memory segment.
+*********************************************************************************************************
+*/
+
+void  KAL_Init (KAL_CFG   *p_cfg,
+                RTOS_ERR  *p_err)
+{
+    MEM_SEG  *p_seg;
+    LIB_ERR   err_lib;
+    CPU_SR_ALLOC();
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+    CPU_CRITICAL_ENTER();
+    if (KAL_IsInit == DEF_YES) {                                /* Chk if KAL already init. See note #1.                */
+        CPU_INT08U  init_status = KAL_InitStatus;
+
+
+        CPU_CRITICAL_EXIT();
+
+        while (init_status == KAL_INIT_STATUS_NONE) {           /* Wait until init is done before returning.            */
+            OSTimeDly(100u);
+            CPU_CRITICAL_ENTER();
+            init_status = KAL_InitStatus;
+            CPU_CRITICAL_EXIT();
+        }
+        if (init_status == KAL_INIT_STATUS_OK) {                /* Check resulting init status.                         */
+            if (p_cfg == DEF_NULL) {
+               *p_err = RTOS_ERR_NONE;                          /* KAL_Init() can be called many times if no cfg.       */
+            } else {
+               *p_err = RTOS_ERR_ALREADY_INIT;                  /* If a cfg is given and KAL is already init, set err.  */
+            }
+        } else {
+           *p_err = RTOS_ERR_OS;                                /* Concurrent init failed.                              */
+        }
+        return;
+    }
+
+    KAL_IsInit = DEF_YES;                                       /* Prevent another init, even in case of err.           */
+    CPU_CRITICAL_EXIT();
+
+    p_seg = DEF_NULL;
+    if (p_cfg != DEF_NULL) {                                    /* Load cfg if given.                                   */
+        p_seg = p_cfg->MemSegPtr;
+    }
+
+    KAL_DataPtr = (KAL_DATA *)Mem_SegAlloc("KAL internal data",
+                                            p_seg,
+                                            sizeof(KAL_DATA),
+                                           &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = RTOS_ERR_ALLOC;
+        goto end_err;
+    }
+
+    KAL_DataPtr->MemSegPtr = p_seg;
+
+    #if (OS_SEM_EN == DEF_ENABLED)
+        Mem_DynPoolCreate("KAL lock pool",
+                          &KAL_DataPtr->LockPool,
+                           KAL_DataPtr->MemSegPtr,
+                           sizeof(KAL_LOCK),
+                           sizeof(CPU_ALIGN),
+                           0u,
+                           LIB_MEM_BLK_QTY_UNLIMITED,
+                          &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_INIT;
+            goto end_err;
+        }
+    #endif
+
+    #if (OS_TMR_EN == DEF_ENABLED)
+        Mem_DynPoolCreate("KAL tmr pool",
+                          &KAL_DataPtr->TmrPool,
+                           KAL_DataPtr->MemSegPtr,
+                           sizeof(KAL_TMR),
+                           sizeof(CPU_ALIGN),
+                           0u,
+                           LIB_MEM_BLK_QTY_UNLIMITED,
+                          &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_INIT;
+            goto end_err;
+        }
+    #endif
+
+    #if (OS_TASK_REG_TBL_SIZE > 0u)
+        Mem_DynPoolCreate("KAL task reg pool",
+                          &KAL_DataPtr->TaskRegPool,
+                           KAL_DataPtr->MemSegPtr,
+                           sizeof(KAL_TASK_REG),
+                           sizeof(CPU_ALIGN),
+                           0u,
+                           LIB_MEM_BLK_QTY_UNLIMITED,
+                          &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_INIT;
+            goto end_err;
+        }
+    #endif
+
+    CPU_CRITICAL_ENTER();
+    KAL_InitStatus = KAL_INIT_STATUS_OK;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = RTOS_ERR_NONE;
+
+    return;
+
+end_err:                                                        /* Init failed. Handle vars for other concurrent init.  */
+    CPU_CRITICAL_ENTER();
+    KAL_InitStatus = KAL_INIT_STATUS_FAIL;                      /* Indicate potential concurrent init that it failed.   */
+    CPU_CRITICAL_EXIT();
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_FeatureQuery()
+*
+* Description : Check if specified feature is available.
+*
+* Argument(s) : feature     Feature to query.
+*
+*               opt         Option associated with the feature requested.
+*
+* Return(s)   : DEF_YES, if feature is available.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  KAL_FeatureQuery (KAL_FEATURE  feature,
+                               KAL_OPT      opt)
+{
+    CPU_BOOLEAN  is_en;
+
+
+    is_en = DEF_NO;
+
+    switch (feature) {
+        case KAL_FEATURE_TASK_CREATE:                           /* ---------------------- TASKS ----------------------- */
+             is_en = DEF_YES;
+             break;
+
+
+        case KAL_FEATURE_TASK_DEL:
+             #if (OS_TASK_DEL_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+#if (OS_SEM_EN == DEF_ENABLED)                                  /* ------------------- LOCKS & SEMS ------------------- */
+        case KAL_FEATURE_LOCK_CREATE:
+        case KAL_FEATURE_LOCK_RELEASE:
+        case KAL_FEATURE_SEM_CREATE:
+             is_en = DEF_YES;
+             break;
+
+
+        case KAL_FEATURE_LOCK_ACQUIRE:
+             if (DEF_BIT_IS_CLR(opt, KAL_OPT_CREATE_REENTRANT) == DEF_YES) {
+                                                                /* Re-entrant locks not supported in OS-II right now.   */
+                 if (DEF_BIT_IS_CLR(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+                     is_en = DEF_YES;
+                 } else {
+                     #if (OS_SEM_ACCEPT_EN == DEF_ENABLED)
+                         is_en = DEF_YES;                       /* Non-blocking supported only if OSSemAccept() is en.  */
+                     #endif
+                 }
+             }
+             break;
+
+
+        case KAL_FEATURE_SEM_PEND:
+             if (DEF_BIT_IS_CLR(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+                 is_en = DEF_YES;
+             } else {
+                 #if (OS_SEM_ACCEPT_EN == DEF_ENABLED)
+                     is_en = DEF_YES;                           /* Non-blocking supported only if OSSemAccept() is en.  */
+                 #endif
+             }
+             break;
+
+
+        case KAL_FEATURE_SEM_POST:
+             is_en = DEF_YES;
+             break;
+
+
+        case KAL_FEATURE_SEM_ABORT:
+             #if (OS_SEM_PEND_ABORT_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+        case KAL_FEATURE_SEM_SET:
+             #if (OS_SEM_SET_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+#if (OS_SEM_DEL_EN == DEF_ENABLED)
+        case KAL_FEATURE_LOCK_DEL:
+             if (DEF_BIT_IS_CLR(opt, KAL_OPT_CREATE_REENTRANT) == DEF_YES) {
+                 is_en = DEF_YES;
+             }
+             break;
+
+
+        case KAL_FEATURE_SEM_DEL:
+             is_en = DEF_YES;
+             break;
+#endif
+#endif /* OS_SEM_EN */
+
+
+        case KAL_FEATURE_TMR:                                   /* ----------------------- TMRS ----------------------- */
+             #if (OS_TMR_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+#if (OS_Q_EN == DEF_ENABLED)                                    /* ---------------------- QUEUES ---------------------- */
+        case KAL_FEATURE_Q_CREATE:
+             #if ((OS_Q_POST_EN     == DEF_ENABLED) || \
+                  (OS_Q_POST_OPT_EN == DEF_ENABLED))
+                 is_en = DEF_YES;                               /* Qs and at least one of the Q post fnct are avail.    */
+             #endif
+             break;
+
+
+        case KAL_FEATURE_Q_PEND:
+             if (DEF_BIT_IS_CLR(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+                 is_en = DEF_YES;
+             } else {
+                 #if (OS_Q_ACCEPT_EN == DEF_ENABLED)
+                     is_en = DEF_YES;                           /* Non-blocking supported only if OSQAccept() is en.    */
+                 #endif
+             }
+             break;
+
+
+        case KAL_FEATURE_Q_POST:
+             #if ((OS_Q_POST_OPT_EN == DEF_ENABLED) || \
+                  (OS_Q_POST_EN == DEF_ENABLED))
+                 is_en = DEF_YES;
+             #endif
+             break;
+#endif  /* OS_Q_EN */
+
+
+        case KAL_FEATURE_DLY:                                   /* ----------------------- DLYS ----------------------- */
+             if (DEF_BIT_IS_CLR(opt, KAL_OPT_DLY_PERIODIC) == DEF_YES) {
+                 is_en = DEF_YES;
+             }
+             break;
+
+
+        case KAL_FEATURE_TASK_REG:                              /* ------------------- TASK STORAGE ------------------- */
+             #if (OS_TASK_REG_TBL_SIZE > 0u)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+        case KAL_FEATURE_TICK_GET:                              /* ------------------- TICK CTR INFO ------------------ */
+             #if (OS_TIME_GET_SET_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (is_en);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         TASK API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_TaskAlloc()
+*
+* Description : Allocate a task object and its stack.
+*
+* Argument(s) : p_name          Pointer to name of the task.
+*
+*               p_stk_base      Pointer to start of task stack. If NULL, the stack will be allocated from
+*                               the KAL memory segment.
+*
+*               stk_size_bytes  Size (in bytes) of the task stack.
+*
+*               p_cfg           Pointer to KAL task configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_INVALID_ARG        Specified stack size is invalid.
+*                                   RTOS_ERR_NOT_SUPPORTED      'p_cfg' parameter was not NULL.
+*                                   RTOS_ERR_ALLOC              Task stack or control block allocation failed.
+*
+* Return(s)   : Allocated task's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TASK_HANDLE  KAL_TaskAlloc (const  CPU_CHAR          *p_name,
+                                       void              *p_stk_base,
+                                       CPU_SIZE_T         stk_size_bytes,
+                                       KAL_TASK_EXT_CFG  *p_cfg,
+                                       RTOS_ERR          *p_err)
+{
+    KAL_TASK_HANDLE   handle = KAL_TaskHandleNull;
+    KAL_TASK         *p_task;
+    CPU_ADDR          stk_addr;
+    CPU_ADDR          stk_addr_aligned;
+    CPU_SIZE_T        actual_stk_size_bytes;
+    LIB_ERR           err_lib;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return (handle);
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    if (p_stk_base == DEF_NULL) {                               /* Must alloc task stk on mem seg.                      */
+        stk_addr_aligned = (CPU_ADDR)Mem_SegAllocExt("KAL task stk",
+                                                      KAL_DataPtr->MemSegPtr,
+                                                      stk_size_bytes,
+                                                      CPU_CFG_STK_ALIGN_BYTES,
+                                                      DEF_NULL,
+                                                     &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+        actual_stk_size_bytes = stk_size_bytes;
+    } else {
+                                                                /* Align stk ptr, if needed.                            */
+        stk_addr              = (CPU_ADDR)p_stk_base;
+        stk_addr_aligned      =  MATH_ROUND_INC_UP_PWR2(stk_addr, CPU_CFG_STK_ALIGN_BYTES);
+        actual_stk_size_bytes =  stk_size_bytes - (stk_addr_aligned - stk_addr);
+    }
+
+    p_task = (KAL_TASK *)Mem_SegAlloc("KAL task",
+                                       KAL_DataPtr->MemSegPtr,
+                                       sizeof(KAL_TASK),
+                                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = RTOS_ERR_ALLOC;
+        return (handle);
+    }
+
+    p_task->StkBasePtr   = (CPU_STK *)stk_addr_aligned;
+    p_task->StkSizeBytes =  actual_stk_size_bytes;
+    p_task->Prio         =  0u;
+    #if (OS_TASK_NAME_EN == DEF_ENABLED)                        /* Check if task name is en.                            */
+        p_task->NamePtr  =  p_name;
+    #else
+        (void)&p_name;
+    #endif
+    handle.TaskObjPtr    = (void *)p_task;
+
+   *p_err = RTOS_ERR_NONE;
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskCreate()
+*
+* Description : Create and start a task.
+*
+* Argument(s) : task_handle     Handle of the task to create.
+*
+*               p_fnct          Pointer to task function.
+*
+*               p_task_arg      Pointer to argument that will be passed to task function (can be DEF_NULL).
+*
+*               prio            Task priority.
+*
+*               p_cfg           Pointer to KAL task configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_SUPPORTED      'p_cfg' parameter was not NULL.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Invalid argument passed to function.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) The task must be allocated prior to this call using KAL_TaskAlloc().
+*********************************************************************************************************
+*/
+
+void  KAL_TaskCreate (KAL_TASK_HANDLE     task_handle,
+                      void              (*p_fnct)(void  *p_arg),
+                      void               *p_task_arg,
+                      CPU_INT08U          prio,
+                      KAL_TASK_EXT_CFG   *p_cfg,
+                      RTOS_ERR           *p_err)
+{
+    KAL_TASK      *p_task;
+    CPU_STK_SIZE   stk_size_words;
+    CPU_INT32U     stk_top_offset;
+    CPU_INT08U     err_os;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_fnct == DEF_NULL) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (KAL_TASK_HANDLE_IS_NULL(task_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return;
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    p_task         = (KAL_TASK *)task_handle.TaskObjPtr;
+    stk_size_words =  p_task->StkSizeBytes / sizeof(CPU_STK);
+
+    #if (OS_STK_GROWTH == DEF_ENABLED)                          /* Set stk top offset, based on OS_STK_GROWTH cfg.      */
+        stk_top_offset = stk_size_words - 1u;
+    #else
+        stk_top_offset = 0u;
+    #endif
+
+    #if (OS_TASK_CREATE_EXT_EN == DEF_ENABLED)
+    {
+        CPU_INT32U  stk_bottom_offset;
+
+
+        #if (OS_STK_GROWTH == DEF_ENABLED)                      /* Set stk bottom offset, based on OS_STK_GROWTH cfg.   */
+            stk_bottom_offset = 0u;
+        #else
+            stk_bottom_offset = stk_size_words - 1u;
+        #endif
+
+        err_os = OSTaskCreateExt(p_fnct,
+                                 p_task_arg,
+                                &p_task->StkBasePtr[stk_top_offset],
+                                 prio,
+                                 prio,
+                                &p_task->StkBasePtr[stk_bottom_offset],
+                                 stk_size_words,
+                                 DEF_NULL,
+                                 OS_TASK_OPT_STK_CLR | OS_TASK_OPT_STK_CHK);
+    }
+    #else
+        err_os = OSTaskCreate(p_fnct,
+                              p_task_arg,
+                             &p_task->StkBasePtr[stk_top_offset],
+                              prio);
+    #endif
+    if (err_os != OS_ERR_NONE) {
+       *p_err = KAL_ErrConvert(err_os);
+        return;
+    }
+
+   *p_err        = RTOS_ERR_NONE;
+    p_task->Prio = prio;
+
+    #if (OS_TASK_NAME_EN == DEF_ENABLED)                        /* Set task name if names en.                           */
+        if (p_task->NamePtr != DEF_NULL) {                      /* Do not try to set name if name is NULL.              */
+            OSTaskNameSet(prio, (INT8U *)p_task->NamePtr, &err_os);
+            if (err_os != OS_ERR_NONE) {
+               *p_err = KAL_ErrConvert(err_os);
+            }
+        }
+    #endif
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_TaskDel()
+*
+* Description : Delete a task.
+*
+* Argument(s) : task_handle     Handle of the task to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Task handle is invalid.
+*                                   RTOS_ERR_ISR                If trying to delete task from an ISR.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TaskDel (KAL_TASK_HANDLE   task_handle,
+                   RTOS_ERR         *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_TASK_HANDLE_IS_NULL(task_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if (OS_TASK_DEL_EN == DEF_ENABLED)
+    {
+        KAL_TASK    *p_task;
+        CPU_INT08U   err_os;
+
+
+        p_task = (KAL_TASK *)task_handle.TaskObjPtr;
+
+        err_os =  OSTaskDel(p_task->Prio);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&task_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                         LOCK API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockCreate()
+*
+* Description : Create a lock, which is unlocked by default.
+*
+* Argument(s) : p_name          Pointer to name of the lock.
+*
+*               p_cfg           Pointer to KAL lock configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for lock.
+*                                   RTOS_ERR_CREATE_FAIL        Lock creation failed.
+*
+* Return(s)   : Created lock handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_LOCK_HANDLE  KAL_LockCreate (const  CPU_CHAR          *p_name,
+                                        KAL_LOCK_EXT_CFG  *p_cfg,
+                                        RTOS_ERR          *p_err)
+{
+    KAL_LOCK_HANDLE  handle = KAL_LockHandleNull;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (p_cfg != DEF_NULL) {
+            if (DEF_BIT_IS_SET_ANY(p_cfg->Opt, ~(KAL_OPT_CREATE_NONE | KAL_OPT_CREATE_REENTRANT)) == DEF_YES) {
+               *p_err = RTOS_ERR_INVALID_ARG;
+                return (handle);
+            }
+        }
+    #endif
+
+    #if (OS_SEM_EN == DEF_ENABLED)
+    {
+        KAL_LOCK  *p_kal_lock;
+        OS_EVENT  *p_sem;
+        LIB_ERR    err_lib;
+
+
+        p_kal_lock = (KAL_LOCK *)Mem_DynPoolBlkGet(&KAL_DataPtr->LockPool,
+                                                   &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+
+        p_kal_lock->OptFlags = DEF_BIT_NONE;
+
+        if ((p_cfg                                                != DEF_NULL) &&
+            (DEF_BIT_IS_SET(p_cfg->Opt, KAL_OPT_CREATE_REENTRANT) == DEF_YES)) {
+                                                                /* Created lock is re-entrant.                          */
+            DEF_BIT_SET(p_kal_lock->OptFlags, KAL_OPT_CREATE_REENTRANT);
+            p_kal_lock->OwnerPrio  = KAL_LOCK_OWNER_PRIO_NONE;
+            p_kal_lock->NestingCtr = 0u;
+        }
+
+       *p_err = RTOS_ERR_NONE;
+
+        p_sem = OSSemCreate(1u);
+        if (p_sem == (OS_EVENT *)0) {
+            Mem_DynPoolBlkFree(       &KAL_DataPtr->LockPool,   /* Free rsrc to pool.                                   */
+                               (void *)p_sem,
+                                      &err_lib);
+            (void)&err_lib;                                     /* Err ignored.                                         */
+
+           *p_err = RTOS_ERR_CREATE_FAIL;
+            return (handle);
+        }
+
+        #if (OS_EVENT_NAME_EN == DEF_ENABLED)                   /* Set name only if cfg is en.                          */
+            if (p_name != DEF_NULL) {
+                CPU_INT08U  err_os;
+
+
+                OSEventNameSet(         p_sem,
+                               (INT8U *)p_name,
+                                       &err_os);
+                (void)&err_os;                                  /* Err ignored, no err can occur if OSSemCreate() is OK.*/
+            }
+        #else
+            (void)&p_name;
+        #endif
+
+        p_kal_lock->SemEventPtr =  p_sem;
+        handle.LockObjPtr       = (void *)p_kal_lock;
+
+        return (handle);
+    }
+    #else
+        (void)&p_name;
+        (void)&p_cfg;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (handle);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockAcquire()
+*
+* Description : Acquire a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to acquire.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or lock is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or lock is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately even if lock is not available.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_TIMEOUT            Operation timed-out.
+*                                   RTOS_ERR_ISR                Function was called from an ISR.
+*                                   RTOS_ERR_WOULD_BLOCK        KAL_OPT_PEND_NON_BLOCKING opt specified and
+*                                                               lock is not available.
+*                                   RTOS_ERR_WOULD_OVF          Nesting count would overflow.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockAcquire (KAL_LOCK_HANDLE   lock_handle,
+                       KAL_OPT           opt,
+                       CPU_INT32U        timeout_ms,
+                       RTOS_ERR         *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_LOCK_HANDLE_IS_NULL(lock_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (DEF_BIT_IS_SET_ANY(opt, ~(KAL_OPT_PEND_NONE | KAL_OPT_PEND_NON_BLOCKING)) == DEF_YES) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    #if (OS_SEM_EN == DEF_ENABLED)
+    {
+        KAL_LOCK    *p_kal_lock;
+        OS_EVENT    *p_sem;
+        CPU_INT32U   timeout_ticks;
+        CPU_INT08U   err_os;
+        CPU_SR_ALLOC();
+
+
+        p_kal_lock = (KAL_LOCK *)lock_handle.LockObjPtr;
+        p_sem      =  p_kal_lock->SemEventPtr;
+
+        if (timeout_ms != KAL_TIMEOUT_INFINITE) {
+            timeout_ticks = KAL_msToTicks(timeout_ms);
+        } else {
+            timeout_ticks = 0u;
+        }
+
+        if (DEF_BIT_IS_SET(p_kal_lock->OptFlags, KAL_OPT_CREATE_REENTRANT) == DEF_YES) {
+            CPU_CRITICAL_ENTER();
+            if (p_kal_lock->OwnerPrio == OSPrioCur) {
+                p_kal_lock->NestingCtr++;
+                if (p_kal_lock->NestingCtr != 0u) {
+                   *p_err = RTOS_ERR_NONE;
+                } else {
+                   *p_err = RTOS_ERR_WOULD_OVF;
+                    p_kal_lock->NestingCtr--;
+                }
+                CPU_CRITICAL_EXIT();
+                return;
+            }
+            CPU_CRITICAL_EXIT();
+        }
+
+        if (DEF_BIT_IS_CLR(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+            OSSemPend(p_sem,
+                      timeout_ticks,
+                     &err_os);
+            if (err_os == OS_ERR_NONE) {
+               *p_err = RTOS_ERR_NONE;
+            } else {
+               *p_err = KAL_ErrConvert(err_os);
+                return;
+            }
+        } else {
+            #if (OS_SEM_ACCEPT_EN == DEF_ENABLED)               /* If OSSemAccept() is en.                              */
+                CPU_INT16U  ret_val;
+
+
+                ret_val = OSSemAccept(p_sem);
+                if (ret_val != 0u) {
+                   *p_err = RTOS_ERR_NONE;
+                } else {
+                   *p_err = RTOS_ERR_WOULD_BLOCK;
+                    return;
+                }
+            #else                                               /* If OSSemAccept() is dis, cannot exec operation.      */
+               *p_err = RTOS_ERR_NOT_AVAIL;
+                return;
+            #endif
+        }
+
+        if (DEF_BIT_IS_SET(p_kal_lock->OptFlags, KAL_OPT_CREATE_REENTRANT) == DEF_YES) {
+            CPU_CRITICAL_ENTER();
+            p_kal_lock->OwnerPrio  = OSPrioCur;                 /* If lock is re-entrant, set prio to cur.              */
+            p_kal_lock->NestingCtr = 0u;
+            CPU_CRITICAL_EXIT();
+        }
+
+        return;
+    }
+    #else
+        (void)&lock_handle;
+        (void)&opt;
+        (void)&timeout_ms;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockRelease()
+*
+* Description : Release a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to release.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_WOULD_OVF          Semaphore would overflow.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockRelease (KAL_LOCK_HANDLE   lock_handle,
+                       RTOS_ERR         *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_LOCK_HANDLE_IS_NULL(lock_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if (OS_SEM_EN == DEF_ENABLED)
+    {
+        KAL_LOCK    *p_kal_lock;
+        OS_EVENT    *p_sem;
+        CPU_INT08U   err_os;
+        CPU_SR_ALLOC();
+
+
+        p_kal_lock = (KAL_LOCK *)lock_handle.LockObjPtr;
+        p_sem      =  p_kal_lock->SemEventPtr;
+
+        if (DEF_BIT_IS_SET(p_kal_lock->OptFlags, KAL_OPT_CREATE_REENTRANT) == DEF_YES) {
+                                                                /* Re-entrant lock.                                     */
+            CPU_CRITICAL_ENTER();
+            if (p_kal_lock->NestingCtr != 0u) {
+                p_kal_lock->NestingCtr--;
+                CPU_CRITICAL_EXIT();
+               *p_err = RTOS_ERR_NONE;
+                return;
+            }
+                                                                /* If lock is re-entrant and is not nested, set ...     */
+            p_kal_lock->OwnerPrio = KAL_LOCK_OWNER_PRIO_NONE;   /* ... OwnerPrio to 'none'.                             */
+            CPU_CRITICAL_EXIT();
+        }
+
+        err_os = OSSemPost(p_sem);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&lock_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_LockDel()
+*
+* Description : Delete a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_ISR                Function was called from an ISR.
+*                                   RTOS_ERR_NOT_SUPPORTED      Re-entrant locks cannot be deleted.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockDel (KAL_LOCK_HANDLE   lock_handle,
+                   RTOS_ERR         *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_LOCK_HANDLE_IS_NULL(lock_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if ((OS_SEM_EN     == DEF_ENABLED) && \
+         (OS_SEM_DEL_EN == DEF_ENABLED))                        /* Sems and sems del are avail.                         */
+    {
+        KAL_LOCK    *p_kal_lock;
+        CPU_INT08U   err_os;
+        LIB_ERR      err_lib;
+        CPU_SR_ALLOC();
+
+
+        p_kal_lock = (KAL_LOCK *)lock_handle.LockObjPtr;
+
+        if (DEF_BIT_IS_SET(p_kal_lock->OptFlags, KAL_OPT_CREATE_REENTRANT) == DEF_YES) {
+            CPU_CRITICAL_ENTER();
+            p_kal_lock->OwnerPrio  = KAL_LOCK_OWNER_PRIO_NONE;  /* If lock is re-entrant, set OwnerPrio to 'none'.      */
+            p_kal_lock->NestingCtr = 0u;
+            CPU_CRITICAL_EXIT();
+        }
+        (void)OSSemDel(p_kal_lock->SemEventPtr,
+                       OS_DEL_ALWAYS,
+                      &err_os);
+        if (err_os == OS_ERR_NONE) {
+            Mem_DynPoolBlkFree(       &KAL_DataPtr->LockPool,   /* Free rsrc to pool.                                   */
+                               (void *)p_kal_lock,
+                                      &err_lib);
+            (void)&err_lib;                                     /* Err ignored.                                         */
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else                                                       /* Sems or sems del is not avail.                       */
+        (void)&lock_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          SEM API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_SemCreate()
+*
+* Description : Create a semaphore, with a count of 0.
+*
+* Argument(s) : p_name          Pointer to name of the semaphore.
+*
+*               p_cfg           Pointer to KAL semaphore configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NOT_SUPPORTED      'p_cfg' parameter was not NULL.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for semaphore.
+*                                   RTOS_ERR_CREATE_FAIL        Semaphore creation failed.
+*
+* Return(s)   : Created semaphore's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_SEM_HANDLE  KAL_SemCreate (const  CPU_CHAR         *p_name,
+                                      KAL_SEM_EXT_CFG  *p_cfg,
+                                      RTOS_ERR         *p_err)
+{
+    KAL_SEM_HANDLE  handle = KAL_SemHandleNull;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return (handle);
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    #if (OS_SEM_EN == DEF_ENABLED)
+    {
+        OS_EVENT  *p_sem;
+
+
+       *p_err = RTOS_ERR_NONE;
+
+        p_sem = OSSemCreate(0u);
+        if (p_sem == (OS_EVENT *)0) {
+           *p_err = RTOS_ERR_CREATE_FAIL;
+            return (handle);
+        }
+
+        #if (OS_EVENT_NAME_EN == DEF_ENABLED)
+            if (p_name != DEF_NULL) {
+                CPU_INT08U  err_os;
+
+
+                OSEventNameSet(         p_sem,
+                               (INT8U *)p_name,
+                                       &err_os);
+                (void)&err_os;                                  /* Err ignored, no err can occur if OSSemCreate() is OK.*/
+            }
+        #else
+            (void)&p_name;
+        #endif
+
+        handle.SemObjPtr = (void *)p_sem;
+
+        return (handle);
+    }
+    #else
+        (void)&p_name;
+        (void)&p_cfg;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (handle);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemPend()
+*
+* Description : Pend on a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to pend on.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or semaphore is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or semaphore is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately even if semaphore is not available.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_ABORT              Pend operation was aborted.
+*                                   RTOS_ERR_TIMEOUT            Operation timed-out.
+*                                   RTOS_ERR_ISR                Function was called from an ISR.
+*                                   RTOS_ERR_WOULD_BLOCK        KAL_OPT_PEND_NON_BLOCKING opt specified and
+*                                                               semaphore is not available.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPend (KAL_SEM_HANDLE   sem_handle,
+                   KAL_OPT          opt,
+                   CPU_INT32U       timeout_ms,
+                   RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (DEF_BIT_IS_SET_ANY(opt, ~(KAL_OPT_PEND_NONE | KAL_OPT_PEND_NON_BLOCKING)) == DEF_YES) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    #if (OS_SEM_EN == DEF_ENABLED)
+    {
+        OS_EVENT    *p_sem;
+        CPU_INT32U   timeout_ticks;
+
+
+        p_sem = (OS_EVENT *)sem_handle.SemObjPtr;
+
+        if (timeout_ms != KAL_TIMEOUT_INFINITE) {
+            timeout_ticks = KAL_msToTicks(timeout_ms);
+        } else {
+            timeout_ticks = 0u;
+        }
+
+        if (DEF_BIT_IS_CLR(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+            CPU_INT08U  err_os;
+
+
+            OSSemPend(p_sem,
+                      timeout_ticks,
+                     &err_os);
+            if (err_os == OS_ERR_NONE) {
+               *p_err = RTOS_ERR_NONE;
+            } else {
+               *p_err = KAL_ErrConvert(err_os);
+            }
+        } else {
+            #if (OS_SEM_ACCEPT_EN == DEF_ENABLED)               /* If OSSemAccept() is en.                              */
+            {
+                CPU_INT16U  ret_val;
+
+
+                ret_val = OSSemAccept(p_sem);
+                if (ret_val == 0u) {
+                   *p_err = RTOS_ERR_WOULD_BLOCK;
+                }
+            }
+            #else                                               /* If OSSemAccept() is dis, cannot exec operation.      */
+               *p_err = RTOS_ERR_NOT_AVAIL;
+            #endif
+        }
+
+        return;
+    }
+    #else
+        (void)&sem_handle;
+        (void)&opt;
+        (void)&timeout_ms;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemPost()
+*
+* Description : Post a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to post.
+*
+*               opt             Options available:
+*                                   KAL_OPT_POST_NONE:     wake only the highest priority task pending on semaphore.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_WOULD_OVF          Semaphore would overflow.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPost (KAL_SEM_HANDLE   sem_handle,
+                   KAL_OPT          opt,
+                   RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (opt != KAL_OPT_POST_NONE) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    #if (OS_SEM_EN == DEF_ENABLED)
+    {
+        OS_EVENT    *p_sem;
+        CPU_INT08U   err_os;
+
+
+        p_sem  = (OS_EVENT *)sem_handle.SemObjPtr;
+
+        err_os =  OSSemPost(p_sem);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&sem_handle;
+        (void)&opt;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_SemPendAbort()
+*
+* Description : Abort given semaphore and resume all the tasks pending on it.
+*
+* Argument(s) : sem_handle      Handle of the sempahore to abort.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPendAbort (KAL_SEM_HANDLE   sem_handle,
+                        RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if ((OS_SEM_EN            == DEF_ENABLED) && \
+         (OS_SEM_PEND_ABORT_EN == DEF_ENABLED))                 /* Sems and sems pend abort are avail.                  */
+    {
+        OS_EVENT    *p_sem;
+        CPU_INT08U   err_os;
+
+
+        p_sem = (OS_EVENT *)sem_handle.SemObjPtr;
+
+        (void)OSSemPendAbort(p_sem,
+                             OS_PEND_OPT_BROADCAST,
+                            &err_os);
+        if ((err_os == OS_ERR_NONE) ||
+            (err_os != OS_ERR_PEND_ABORT)) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else                                                       /* Sems or sems pend abort is not avail.                */
+        (void)&sem_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemSet()
+*
+* Description : Set value of semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to set.
+*
+*               cnt             Count value to set semaphore.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_OS                 Tasks are waiting on semaphore. Cannot set value.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemSet (KAL_SEM_HANDLE   sem_handle,
+                  CPU_INT08U       cnt,
+                  RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------ VALIDATE ARGS ------------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {    /* Validate handle.                                     */
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if ((OS_SEM_EN     == DEF_ENABLED) && \
+         (OS_SEM_SET_EN == DEF_ENABLED))                        /* Sems and sems set are avail.                         */
+    {
+        CPU_INT08U  err_os;
+
+
+        OSSemSet((OS_EVENT *)sem_handle.SemObjPtr,
+                             cnt,
+                            &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else                                                       /* Sems or sems set is not avail.                       */
+        (void)&sem_handle;
+        (void)&cnt;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemDel()
+*
+* Description : Delete a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_ISR                Function was called from an ISR.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemDel (KAL_SEM_HANDLE   sem_handle,
+                  RTOS_ERR         *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if ((OS_SEM_EN     == DEF_ENABLED) && \
+         (OS_SEM_DEL_EN == DEF_ENABLED))                        /* Sems and sems del are avail.                         */
+    {
+        CPU_INT08U  err_os;
+
+
+        (void)OSSemDel((OS_EVENT *)sem_handle.SemObjPtr,
+                                   OS_DEL_ALWAYS,
+                                  &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else                                                       /* Sems or sems del is not avail.                       */
+        (void)&sem_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TMR API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_TmrCreate()
+*
+* Description : Create a single-shot timer.
+*
+* Argument(s) : p_name          Pointer to name of the timer.
+*
+*               p_callback      Pointer to the callback function that will be called on completion of timer.
+*
+*               p_callback_arg  Argument passed to callback function.
+*
+*               interval_ms     If timer is 'one-shot', delay  used by the timer, in milliseconds.
+*                               If timer is 'periodic', period used by the timer, in milliseconds.
+*
+*               p_cfg           Pointer to KAL timer configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Null pointer passed to function.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for resource.
+*                                   RTOS_ERR_INVALID_ARG        Invalid argument passed to function.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*                                   RTOS_ERR_NO_MORE_RSRC       OS cannot allocate timer resource.
+*                                   RTOS_ERR_OS                 Generic OS error.
+*
+* Return(s)   : Created timer handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TMR_HANDLE  KAL_TmrCreate (const  CPU_CHAR   *p_name,
+                               void             (*p_callback)(void  *p_arg),
+                               void              *p_callback_arg,
+                               CPU_INT32U         interval_ms,
+                               KAL_TMR_EXT_CFG   *p_cfg,
+                               RTOS_ERR          *p_err)
+{
+    KAL_TMR_HANDLE  handle = KAL_TmrHandleNull;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (p_callback == DEF_NULL) {                           /* Validate callback fnct ptr.                          */
+           *p_err = RTOS_ERR_NULL_PTR;
+            return (handle);
+        }
+
+        if (interval_ms == 0u) {                                /* Validate time.                                       */
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return (handle);
+        }
+
+        if (p_cfg != DEF_NULL) {
+            if (DEF_BIT_IS_SET_ANY(p_cfg->Opt, ~(KAL_OPT_TMR_NONE | KAL_OPT_TMR_PERIODIC)) == DEF_YES) {
+               *p_err = RTOS_ERR_INVALID_ARG;
+                return (handle);
+            }
+        }
+    #endif
+
+    #if (OS_TMR_EN == DEF_ENABLED)
+    {
+        KAL_TMR     *p_tmr;
+        CPU_INT32U   tmr_dly;
+        CPU_INT32U   tmr_period;
+        CPU_INT08U   opt_os;
+        CPU_INT08U   err_os;
+        LIB_ERR      err_lib;
+
+
+        p_tmr  = (KAL_TMR *)Mem_DynPoolBlkGet(&KAL_DataPtr->TmrPool,
+                                              &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+
+        p_tmr->CallbackFnct = p_callback;
+        p_tmr->CallbackArg  = p_callback_arg;
+                                                                /* Tmr is 'periodic'.                                   */
+        if ((p_cfg                                            != DEF_NULL) &&
+            (DEF_BIT_IS_SET(p_cfg->Opt, KAL_OPT_TMR_PERIODIC) == DEF_YES)) {
+            opt_os     = OS_TMR_OPT_PERIODIC;
+            tmr_dly    = 0u;
+            tmr_period = KAL_msToTicks(interval_ms);
+        } else {
+            opt_os     = OS_TMR_OPT_ONE_SHOT;                   /* Tmr is 'one-shot'.                                   */
+            tmr_dly    = KAL_msToTicks(interval_ms);
+            tmr_period = 0u;
+        }
+
+        p_tmr->TmrPtr = OSTmrCreate(              tmr_dly,      /* Create tmr obj.                                      */
+                                                  tmr_period,
+                                                  opt_os,
+                                                  KAL_TmrFnctWrapper,
+                                    (void       *)p_tmr,
+                                    (CPU_INT08U *)p_name,
+                                                 &err_os);
+        if (err_os == OS_ERR_NONE) {
+            handle.TmrObjPtr = p_tmr;
+           *p_err            = RTOS_ERR_NONE;
+        } else {
+            Mem_DynPoolBlkFree(&KAL_DataPtr->TmrPool,
+                                p_tmr,
+                               &err_lib);
+            (void)&err_lib;
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (handle);
+    }
+    #else
+        (void)&p_name;
+        (void)&p_callback;
+        (void)&p_callback_arg;
+        (void)&interval_ms;
+        (void)&p_cfg;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (handle);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_TmrStart()
+*
+* Description : Start timer.
+*
+* Argument(s) : tmr_handle      Handle of timer to start.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Null timer handle passed to function.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*                                   RTOS_ERR_INVALID_ARG        Invalid handle passed to function.
+*                                   RTOS_ERR_OS                 Generic OS error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TmrStart (KAL_TMR_HANDLE   tmr_handle,
+                    RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_TMR_HANDLE_IS_NULL(tmr_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if (OS_TMR_EN == DEF_ENABLED)
+    {
+        KAL_TMR     *p_tmr;
+        CPU_INT08U   err_os;
+
+
+        p_tmr = (KAL_TMR *)tmr_handle.TmrObjPtr;
+
+        (void)OSTmrStart(p_tmr->TmrPtr,
+                        &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&tmr_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Q API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             KAL_QCreate()
+*
+* Description : Create an empty queue.
+*
+* Argument(s) : p_name          Pointer to name of the queue.
+*
+*               max_msg_qty     Maximum number of message contained in the queue.
+*
+*               p_cfg           Pointer to KAL queue configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for queue.
+*                                   RTOS_ERR_CREATE_FAIL        Queue creation failed.
+*
+* Return(s)   : Created queue handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_Q_HANDLE  KAL_QCreate (const  CPU_CHAR       *p_name,
+                                  KAL_MSG_QTY     max_msg_qty,
+                                  KAL_Q_EXT_CFG  *p_cfg,
+                                  RTOS_ERR       *p_err)
+{
+    KAL_Q_HANDLE  handle = KAL_QHandleNull;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return (handle);
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    #if ((OS_Q_EN          == DEF_ENABLED) && \
+        ((OS_Q_POST_EN     == DEF_ENABLED) || \
+         (OS_Q_POST_OPT_EN == DEF_ENABLED)))                    /* Qs and at least one of the Q post fnct are avail.    */
+    {
+        void      **p_q_start;
+        OS_EVENT   *p_q_event;
+        LIB_ERR     err_lib;
+
+
+        p_q_start = (void **)Mem_SegAlloc("KAL Q",
+                                           KAL_DataPtr->MemSegPtr,
+                                           sizeof(void *) * max_msg_qty,
+                                          &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+
+        p_q_event = OSQCreate(p_q_start,
+                              max_msg_qty);
+        if (p_q_event == (OS_EVENT *)0) {
+           *p_err = RTOS_ERR_CREATE_FAIL;
+            return (handle);
+        }
+
+        #if (OS_EVENT_NAME_EN == DEF_ENABLED)
+            if (p_name != DEF_NULL) {
+                CPU_INT08U  err_os;
+
+
+                OSEventNameSet(              p_q_event,
+                               (CPU_INT08U *)p_name,
+                                            &err_os);
+                (void)&err_os;                                  /* Err ignored, no err can occur if OSQCreate() is OK.  */
+            }
+        #else
+            (void)&p_name;
+        #endif
+
+        handle.QObjPtr = (void *)p_q_event;
+       *p_err          =  RTOS_ERR_NONE;
+
+        return (handle);
+    }
+    #else                                                       /* Qs or Q post are not avail.                          */
+        (void)&p_name;
+        (void)&max_msg_qty;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (handle);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                              KAL_QPend()
+*
+* Description : Pend/get first message of queue.
+*
+* Argument(s) : q_handle        Handle of the queue to pend on.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or message is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or message is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately with or without message.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_TIMEOUT            Operation timed-out.
+*                                   RTOS_ERR_ISR                Function was called from an ISR.
+*                                   RTOS_ERR_WOULD_BLOCK        KAL_OPT_PEND_NON_BLOCKING opt specified and no
+*                                                               message is available.
+*
+* Return(s)   : Pointer to message obtained, if any, if no error.
+*
+*               Null pointer,                        otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *KAL_QPend (KAL_Q_HANDLE   q_handle,
+                  KAL_OPT        opt,
+                  CPU_INT32U     timeout_ms,
+                  RTOS_ERR      *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(DEF_NULL);
+        }
+
+        if (KAL_Q_HANDLE_IS_NULL(q_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return (DEF_NULL);
+        }
+
+        if (DEF_BIT_IS_SET_ANY(opt, ~(KAL_OPT_PEND_NONE | KAL_OPT_PEND_NON_BLOCKING)) == DEF_YES) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return (DEF_NULL);
+        }
+    #endif
+
+    #if ((OS_Q_EN          == DEF_ENABLED) && \
+        ((OS_Q_POST_EN     == DEF_ENABLED) || \
+         (OS_Q_POST_OPT_EN == DEF_ENABLED)))                    /* Qs and at least one of the Q post fnct are avail.    */
+    {
+        OS_EVENT    *p_q_event;
+        void        *p_msg;
+        CPU_INT08U   err_os;
+
+
+        p_q_event = (OS_EVENT *)q_handle.QObjPtr;
+
+        if (DEF_BIT_IS_CLR(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+            CPU_INT32U  timeout_ticks;
+
+
+                                                                /* Blocking call.                                       */
+            if (timeout_ms != KAL_TIMEOUT_INFINITE) {
+                timeout_ticks = KAL_msToTicks(timeout_ms);
+            } else {
+                timeout_ticks = 0u;
+            }
+
+            p_msg = OSQPend(p_q_event,
+                            timeout_ticks,
+                           &err_os);
+        } else {                                                /* Non-blocking call.                                   */
+            #if (OS_Q_ACCEPT_EN == DEF_ENABLED)
+                p_msg = OSQAccept(p_q_event,
+                                 &err_os);
+            #else
+               *p_err = RTOS_ERR_NOT_AVAIL;
+
+                return (DEF_NULL);
+            #endif
+        }
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (p_msg);
+    }
+    #else                                                       /* Qs or Q post are not avail.                          */
+        (void)&q_handle;
+        (void)&opt;
+        (void)&timeout_ms;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (DEF_NULL);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                              KAL_QPost()
+*
+* Description : Post message on queue.
+*
+* Argument(s) : q_handle        Handle of the queue on which to post message.
+*
+*               p_msg           Pointer to message to post.
+*
+*               opt             Options available:
+*                                   KAL_OPT_POST_NONE:     wake only the highest priority task pending on queue.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_NO_MORE_RSRC       Queue cannot contain any more message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_QPost (KAL_Q_HANDLE   q_handle,
+                 void          *p_msg,
+                 KAL_OPT        opt,
+                 RTOS_ERR      *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_Q_HANDLE_IS_NULL(q_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (opt != KAL_OPT_POST_NONE) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return;
+        }
+    #else
+        (void)&opt;
+    #endif
+
+    #if ((OS_Q_EN          == DEF_ENABLED) && \
+        ((OS_Q_POST_EN     == DEF_ENABLED) || \
+         (OS_Q_POST_OPT_EN == DEF_ENABLED)))                    /* Qs and at least one of the Q post fnct are avail.    */
+    {
+        OS_EVENT    *p_q_event;
+        CPU_INT08U   err_os;
+
+
+        p_q_event = (OS_EVENT *)q_handle.QObjPtr;
+
+        #if (OS_Q_POST_OPT_EN == DEF_ENABLED)
+            err_os = OSQPostOpt(p_q_event,
+                                p_msg,
+                                OS_POST_OPT_NONE);
+            if (err_os == OS_ERR_NONE) {
+               *p_err = RTOS_ERR_NONE;
+            } else {
+               *p_err = KAL_ErrConvert(err_os);
+            }
+        #elif (OS_Q_POST_EN == DEF_ENABLED)
+            err_os = OSQPost(p_q_event,
+                             p_msg);
+            if (err_os == OS_ERR_NONE) {
+               *p_err = RTOS_ERR_NONE;
+            } else {
+               *p_err = KAL_ErrConvert(err_os);
+            }
+        #endif
+
+        return;
+    }
+    #else                                                       /* Qs or Q post are not avail.                          */
+        (void)&q_handle;
+        (void)&p_msg;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DLY API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               KAL_Dly()
+*
+* Description : Delay current task (in milliseconds).
+*
+* Argument(s) : dly_ms          Delay value, in milliseconds.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_Dly (CPU_INT32U  dly_ms)
+{
+    CPU_INT32U  dly_ticks;
+
+
+    if (dly_ms != 0u) {
+        dly_ticks = KAL_msToTicks(dly_ms);
+    } else {
+        dly_ticks = 0u;
+    }
+
+    OSTimeDly(dly_ticks);
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_DlyTick()
+*
+* Description : Delay current task (in ticks).
+*
+* Argument(s) : dly_ticks       Delay value, in ticks.
+*
+*               opt             Options available:
+*                                   KAL_OPT_DLY_NONE:       apply a 'normal' delay.
+*                                   KAL_OPT_DLY:            apply a 'normal' delay.
+*                                   KAL_OPT_DLY_PERIODIC:   apply a periodic delay.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) KAL_OPT_DLY_PERIODIC is not supported. Using KAL_OPT_DLY instead.
+*********************************************************************************************************
+*/
+
+void  KAL_DlyTick (KAL_TICK  dly_ticks,
+                   KAL_OPT   opt)
+{
+    (void)&opt;
+
+    OSTimeDly(dly_ticks);
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TASK REG API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          KAL_TaskRegCreate()
+*
+* Description : Create a task register.
+*
+* Argument(s) : p_cfg           Pointer to KAL task register configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NOT_SUPPORTED      'p_cfg' parameter was not NULL.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for task register.
+*                                   RTOS_ERR_NO_MORE_RSRC       No more task register available.
+*
+* Return(s)   : Created task register's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TASK_REG_HANDLE  KAL_TaskRegCreate (KAL_TASK_REG_EXT_CFG  *p_cfg,
+                                        RTOS_ERR              *p_err)
+{
+    KAL_TASK_REG_HANDLE  handle = KAL_TaskRegHandleNull;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return (handle);
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    #if (OS_TASK_REG_TBL_SIZE > 0u)
+    {
+        KAL_TASK_REG  *p_task_reg;
+        CPU_INT08U     err_os;
+        LIB_ERR        err_lib;
+
+
+        p_task_reg = (KAL_TASK_REG *)Mem_DynPoolBlkGet(&KAL_DataPtr->TaskRegPool,
+                                                       &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+
+        p_task_reg->Id = OSTaskRegGetID(&err_os);
+        if (err_os == OS_ERR_NONE) {
+            handle.TaskRegObjPtr = (void *)p_task_reg;
+           *p_err                =  RTOS_ERR_NONE;
+        } else {
+                                                                /* Free rsrc to pool.                                   */
+            Mem_DynPoolBlkFree(       &KAL_DataPtr->TaskRegPool,
+                               (void *)p_task_reg,
+                                      &err_lib);
+            (void)&err_lib;                                     /* Err ignored.                                         */
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (handle);
+    }
+    #else
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (handle);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskRegGet()
+*
+* Description : Get value from a task register.
+*
+* Argument(s) : task_handle     Handle of the task associated to the task register. Current task is used if NULL.
+*
+*               task_reg_handle Handle of the task register to read.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Task register handle is NULL.
+*                                   RTOS_ERR_INVALID_ARG        Handle specified is invalid.
+*
+* Return(s)   : Value read from the task register, if no error.
+*               0,                                 otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  KAL_TaskRegGet (KAL_TASK_HANDLE       task_handle,
+                            KAL_TASK_REG_HANDLE   task_reg_handle,
+                            RTOS_ERR             *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(0u);
+        }
+
+        if (KAL_TASK_REG_HANDLE_IS_NULL(task_reg_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return (0u);
+        }
+    #endif
+
+    #if (OS_TASK_REG_TBL_SIZE > 0u)
+    {
+        KAL_TASK_REG  *p_task_reg;
+        CPU_INT08U     task_prio;
+        CPU_INT32U     ret_val;
+        CPU_INT08U     err_os;
+
+
+        p_task_reg = (KAL_TASK_REG *)task_reg_handle.TaskRegObjPtr;
+
+        if (KAL_TASK_HANDLE_IS_NULL(task_handle) == DEF_YES) {
+            task_prio = OS_PRIO_SELF;                           /* Use cur task if no task handle is provided.          */
+        } else {
+                                                                /* Get prio from task handle provided.                  */
+            task_prio = ((KAL_TASK *)task_handle.TaskObjPtr)->Prio;
+        }
+
+        ret_val = OSTaskRegGet(task_prio,
+                               p_task_reg->Id,
+                              &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (ret_val);
+    }
+    #else
+        (void)&task_handle;
+        (void)&task_reg_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (0u);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskRegSet()
+*
+* Description : Set value of task register.
+*
+* Argument(s) : task_handle     Handle of the task associated to the task register. Current task is used if NULL.
+*
+*               task_reg_handle Handle of the task register to write to.
+*
+*               val             Value to write in the task register.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Task register handle is NULL.
+*                                   RTOS_ERR_INVALID_ARG        Handle specified is invalid.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TaskRegSet (KAL_TASK_HANDLE       task_handle,
+                      KAL_TASK_REG_HANDLE   task_reg_handle,
+                      CPU_INT32U            val,
+                      RTOS_ERR             *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_TASK_REG_HANDLE_IS_NULL(task_reg_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if (OS_TASK_REG_TBL_SIZE > 0u)
+    {
+        KAL_TASK_REG  *p_task_reg;
+        CPU_INT08U     task_prio;
+        CPU_INT08U     err_os;
+
+
+        p_task_reg = (KAL_TASK_REG *)task_reg_handle.TaskRegObjPtr;
+
+        if (KAL_TASK_HANDLE_IS_NULL(task_handle) == DEF_YES) {
+            task_prio = OS_PRIO_SELF;                           /* Use cur task if no task handle is provided.          */
+        } else {
+                                                                /* Get prio from task handle provided.                  */
+            task_prio = ((KAL_TASK *)task_handle.TaskObjPtr)->Prio;
+        }
+
+        OSTaskRegSet(task_prio,
+                     p_task_reg->Id,
+                     val,
+                    &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&task_handle;
+        (void)&task_reg_handle;
+        (void)&val;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_TickGet()
+*
+* Description : Get value of OS' tick counter.
+*
+* Argument(s) : p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*
+* Return(s)   : OS tick counter's value.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TICK  KAL_TickGet (RTOS_ERR  *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(0u);
+        }
+    #endif
+
+    #if (OS_TIME_GET_SET_EN == DEF_ENABLED)
+    {
+        KAL_TICK  tick_cnt;
+
+
+        tick_cnt = OSTimeGet();
+
+       *p_err = RTOS_ERR_NONE;
+
+        return (tick_cnt);
+    }
+    #else
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (0u);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         KAL_TmrFnctWrapper()
+*
+* Description : Wrapper function for timer callback.
+*
+* Argument(s) : p_tmr_os        Pointer to OS timer object.
+*
+*               p_arg           Pointer to KAL timer object.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (OS_TMR_EN == DEF_ENABLED)
+static  void  KAL_TmrFnctWrapper (void  *p_tmr_os,
+                                  void  *p_arg)
+{
+    KAL_TMR  *p_tmr;
+
+
+    (void)&p_tmr_os;
+
+    p_tmr = (KAL_TMR *)p_arg;
+    p_tmr->CallbackFnct(p_tmr->CallbackArg);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_msToTicks()
+*
+* Description : Convert milliseconds value in tick value.
+*
+* Argument(s) : ms              Millisecond value to convert.
+*
+* Return(s)   : Number of ticks corresponding to the millisecond value, rounded up, if needed.
+*
+* Caller(s)   : KAL_LockAcquire(),
+*               KAL_SemPend(),
+*               KAL_QPend(),
+*               KAL_Dly().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  KAL_TICK  KAL_msToTicks (CPU_INT32U  ms)
+{
+           KAL_TICK    ticks;
+#if  ((OS_TICKS_PER_SEC          >= 1000u) && \
+      (OS_TICKS_PER_SEC %  1000u ==    0u))
+    const  CPU_INT08U  mult = OS_TICKS_PER_SEC / 1000u;
+#endif
+
+
+    #if  ((OS_TICKS_PER_SEC          >= 1000u) && \
+          (OS_TICKS_PER_SEC %  1000u ==    0u))                 /* Optimize calc if possible for often used vals.       */
+        ticks =    ms * mult;
+    #elif (OS_TICKS_PER_SEC ==  100u)
+        ticks =  ((ms +  9u) /  10u);
+    #elif (OS_TICKS_PER_SEC ==   10u)
+        ticks =  ((ms + 99u) / 100u);
+    #else                                                       /* General formula.                                     */
+        ticks = (((ms * OS_TICKS_PER_SEC)  + 1000u - 1u) / 1000u);
+    #endif
+
+    return (ticks);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_ErrConvert()
+*
+* Description : Convert OS errors in KAL errors.
+*
+* Argument(s) : err_os          Error value used by the OS.
+*
+* Return(s)   : KAL error.
+*
+* Caller(s)   : Various KAL functions.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  RTOS_ERR  KAL_ErrConvert (CPU_INT08U  err_os)
+{
+    RTOS_ERR  err_rtos;
+
+
+    switch (err_os) {
+        case OS_ERR_NONE:
+             err_rtos = RTOS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_EVENT_TYPE:
+        case OS_ERR_INVALID_OPT:
+        case OS_ERR_ID_INVALID:
+        case OS_ERR_PNAME_NULL:
+        case OS_ERR_PRIO_EXIST:
+        case OS_ERR_PRIO_INVALID:
+        case OS_ERR_TASK_DEL:
+        case OS_ERR_TASK_DEL_IDLE:
+        case OS_ERR_TASK_NOT_EXIST:
+        case OS_ERR_TMR_INACTIVE:
+        case OS_ERR_TMR_INVALID_DLY:
+        case OS_ERR_TMR_INVALID_TYPE:
+        case OS_ERR_TMR_INVALID:
+             err_rtos = RTOS_ERR_INVALID_ARG;
+             break;
+
+
+        case OS_ERR_PEVENT_NULL:
+             err_rtos = RTOS_ERR_NULL_PTR;
+             break;
+
+
+        case OS_ERR_PEND_LOCKED:
+        case OS_ERR_TASK_WAITING:
+        case OS_ERR_TMR_INVALID_PERIOD:
+        case OS_ERR_TMR_INVALID_OPT:
+        case OS_ERR_TMR_INVALID_STATE:
+             err_rtos = RTOS_ERR_OS;
+             break;
+
+
+        case OS_ERR_TIMEOUT:
+             err_rtos = RTOS_ERR_TIMEOUT;
+             break;
+
+
+        case OS_ERR_PEND_ABORT:
+             err_rtos = RTOS_ERR_ABORT;
+             break;
+
+
+        case OS_ERR_Q_EMPTY:
+             err_rtos = RTOS_ERR_WOULD_BLOCK;
+             break;
+
+
+        case OS_ERR_PEND_ISR:
+        case OS_ERR_DEL_ISR:
+        case OS_ERR_NAME_SET_ISR:
+        case OS_ERR_TASK_CREATE_ISR:
+        case OS_ERR_TASK_DEL_ISR:
+        case OS_ERR_TMR_ISR:
+             err_rtos = RTOS_ERR_ISR;
+             break;
+
+
+        case OS_ERR_SEM_OVF:
+             err_rtos = RTOS_ERR_WOULD_OVF;
+             break;
+
+
+        case OS_ERR_Q_FULL:
+        case OS_ERR_NO_MORE_ID_AVAIL:
+        case OS_ERR_TMR_NON_AVAIL:
+             err_rtos = RTOS_ERR_NO_MORE_RSRC;
+             break;
+
+
+        default:
+             err_rtos = RTOS_ERR_OS;
+             break;
+    }
+
+    return (err_rtos);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-III/kal.c b/src/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-III/kal.c
new file mode 100644
index 0000000..5b1949a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/KAL/uCOS-III/kal.c
@@ -0,0 +1,2736 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               uC/Common - Kernel Abstraction Layer (KAL)
+*                                                uCOS-III
+*
+* Filename      : kal.c
+* Version       : V1.01.00
+* Programmer(s) : EJ
+*                 JFD
+*                 OD
+*********************************************************************************************************
+* Note(s)       : (1) 'goto' statements were used in this software module. Their usage
+*                     is restricted to cleanup purposes in exceptional program flow (e.g.
+*                     error handling), in compliance with CERT MEM12-C and MISRA C:2012
+*                     rules 15.2, 15.3 and 15.4.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  KAL_MODULE
+
+#include  "../kal.h"
+#include  
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  KAL_CFG_ARG_CHK_EXT_EN                 OS_CFG_ARG_CHK_EN
+
+#define  KAL_CFG_TASK_STK_SIZE_PCT_FULL       90u
+
+#define  KAL_INIT_STATUS_NONE                   0u
+#define  KAL_INIT_STATUS_OK                     1u
+#define  KAL_INIT_STATUS_FAIL                   2u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+KAL_CPP_EXT  const  CPU_INT32U           KAL_Version           =  10000u;
+KAL_CPP_EXT  const  KAL_TICK_RATE_HZ     KAL_TickRate          =  OS_CFG_TICK_RATE_HZ;
+
+KAL_CPP_EXT  const  KAL_TASK_HANDLE      KAL_TaskHandleNull    = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_LOCK_HANDLE      KAL_LockHandleNull    = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_SEM_HANDLE       KAL_SemHandleNull     = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_TMR_HANDLE       KAL_TmrHandleNull     = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_Q_HANDLE         KAL_QHandleNull       = {DEF_NULL};
+KAL_CPP_EXT  const  KAL_TASK_REG_HANDLE  KAL_TaskRegHandleNull = {DEF_NULL};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ KAL TASK TYPE ------------------- */
+typedef  struct  kal_task {
+           OS_TCB       TCB;                                    /* TCB for OS-III.                                      */
+
+           CPU_STK     *StkBasePtr;                             /* Task stack base ptr.                                 */
+           CPU_INT32U   StkSizeBytes;                           /* Task stack size (in bytes).                          */
+
+    const  CPU_CHAR    *NamePtr;                                /* Task name string.                                    */
+} KAL_TASK;
+
+                                                                /* ------------------- KAL LOCK TYPE ------------------ */
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+typedef  struct  kal_lock {
+    OS_MUTEX    Mutex;                                          /* OS-III mutex obj.                                    */
+    CPU_INT08U  OptFlags;                                       /* Opt flags associated with this lock.                 */
+} KAL_LOCK;
+#endif
+
+                                                                /* ------------------- KAL TMR TYPE ------------------- */
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+typedef  struct  kal_tmr {
+    OS_TMR    Tmr;                                              /* OS-III tmr obj.                                      */
+
+    void    (*CallbackFnct)(void  *p_arg);                      /* Tmr registered callback fnct.                        */
+    void     *CallbackArg;                                      /* Arg to pass to callback fnct.                        */
+} KAL_TMR;
+#endif
+
+                                                                /* ---------------- KAL TASK REG TYPE ----------------- */
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+typedef  struct  kal_task_reg {
+    OS_REG_ID  Id;                                              /* Id of the task reg.                                  */
+} KAL_TASK_REG;
+#endif
+
+                                                                /* -------------- KAL INTERNAL DATA TYPE -------------- */
+typedef  struct  kal_data {
+    MEM_SEG       *MemSegPtr;                                   /* Mem Seg to alloc from.                               */
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    MEM_DYN_POOL   MutexPool;                                   /* Dyn mem pool used to alloc mutex.                    */
+#endif
+
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+    MEM_DYN_POOL   SemPool;                                     /* Dyn mem pool used to alloc sems.                     */
+#endif
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+    MEM_DYN_POOL   TmrPool;                                     /* Dyn mem pool used to alloc tmrs.                     */
+#endif
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+    MEM_DYN_POOL   TaskRegPool;                                 /* Dyn mem pool used to alloc task regs.                */
+#endif
+} KAL_DATA;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static            KAL_DATA     *KAL_DataPtr    = DEF_NULL;
+
+static            CPU_BOOLEAN   KAL_IsInit     = DEF_NO;
+static  volatile  CPU_INT08U    KAL_InitStatus = KAL_INIT_STATUS_NONE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+static  void      KAL_TmrFnctWrapper(void        *p_tmr_os,
+                                     void        *p_arg);
+#endif
+
+static  KAL_TICK  KAL_msToTicks     (CPU_INT32U   ms);
+
+static  RTOS_ERR  KAL_ErrConvert    (OS_ERR       err_os);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         KAL CORE API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              KAL_Init()
+*
+* Description : Initialize the Kernel Abstraction Layer.
+*
+* Argument(s) : p_cfg       Pointer to KAL configuration structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_OS                 Concurrent initialization failed.
+*                                   RTOS_ERR_ALREADY_INIT       Already initialized and p_cfg is not NULL.
+*                                   RTOS_ERR_ALLOC              Memory segment allocation failed.
+*                                   RTOS_ERR_INIT               Memory pool initialization failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) This function must be called prior to any product initialization function if the
+*                   application needs to specify a memory segment.
+*********************************************************************************************************
+*/
+
+void  KAL_Init (KAL_CFG   *p_cfg,
+                RTOS_ERR  *p_err)
+{
+    MEM_SEG  *p_seg;
+    OS_ERR    err_os;
+    LIB_ERR   err_lib;
+    CPU_SR_ALLOC();
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+    CPU_CRITICAL_ENTER();
+    if (KAL_IsInit == DEF_YES) {                                /* Chk if KAL already init. See note #1.                */
+        CPU_INT08U  init_status = KAL_InitStatus;
+
+
+        CPU_CRITICAL_EXIT();
+
+        while (init_status == KAL_INIT_STATUS_NONE) {           /* Wait until init is done before returning.            */
+            OSTimeDly(100u,
+                      OS_OPT_TIME_DLY,
+                     &err_os);
+            (void)&err_os;
+            CPU_CRITICAL_ENTER();
+            init_status = KAL_InitStatus;
+            CPU_CRITICAL_EXIT();
+        }
+        if (init_status == KAL_INIT_STATUS_OK) {                /* Check resulting init status.                         */
+            if (p_cfg == DEF_NULL) {
+               *p_err = RTOS_ERR_NONE;                          /* KAL_Init() can be called many times if no cfg.       */
+            } else {
+               *p_err = RTOS_ERR_ALREADY_INIT;                  /* If a cfg is given and KAL is already init, set err.  */
+            }
+        } else {
+           *p_err = RTOS_ERR_OS;                                /* Concurrent init failed.                              */
+        }
+        return;
+    }
+
+    KAL_IsInit = DEF_YES;                                       /* Prevent another init, even in case of err.           */
+    CPU_CRITICAL_EXIT();
+
+    p_seg = DEF_NULL;
+    if (p_cfg != DEF_NULL) {                                    /* Load cfg if given.                                   */
+        p_seg = p_cfg->MemSegPtr;
+    }
+
+    KAL_DataPtr = (KAL_DATA *)Mem_SegAlloc("KAL internal data",
+                                            p_seg,
+                                            sizeof(KAL_DATA),
+                                           &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = RTOS_ERR_ALLOC;
+        goto end_err;
+    }
+
+    KAL_DataPtr->MemSegPtr = p_seg;
+
+    #if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+        Mem_DynPoolCreate("KAL mutex pool",
+                          &KAL_DataPtr->MutexPool,
+                           KAL_DataPtr->MemSegPtr,
+                           sizeof(KAL_LOCK),
+                           sizeof(CPU_ALIGN),
+                           0u,
+                           LIB_MEM_BLK_QTY_UNLIMITED,
+                          &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_INIT;
+            goto end_err;
+        }
+    #endif
+
+    #if (OS_CFG_SEM_EN == DEF_ENABLED)
+        Mem_DynPoolCreate("KAL sem pool",
+                          &KAL_DataPtr->SemPool,
+                           KAL_DataPtr->MemSegPtr,
+                           sizeof(OS_SEM),
+                           sizeof(CPU_ALIGN),
+                           0u,
+                           LIB_MEM_BLK_QTY_UNLIMITED,
+                          &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_INIT;
+            goto end_err;
+        }
+    #endif
+
+    #if (OS_CFG_TMR_EN == DEF_ENABLED)
+        Mem_DynPoolCreate("KAL tmr pool",
+                          &KAL_DataPtr->TmrPool,
+                           KAL_DataPtr->MemSegPtr,
+                           sizeof(KAL_TMR),
+                           sizeof(CPU_ALIGN),
+                           0u,
+                           LIB_MEM_BLK_QTY_UNLIMITED,
+                          &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_INIT;
+            goto end_err;
+        }
+    #endif
+
+    #if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+        Mem_DynPoolCreate("KAL task reg pool",
+                          &KAL_DataPtr->TaskRegPool,
+                           KAL_DataPtr->MemSegPtr,
+                           sizeof(KAL_TASK_REG),
+                           sizeof(CPU_ALIGN),
+                           0u,
+                           LIB_MEM_BLK_QTY_UNLIMITED,
+                          &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_INIT;
+            goto end_err;
+        }
+    #endif
+
+    CPU_CRITICAL_ENTER();
+    KAL_InitStatus = KAL_INIT_STATUS_OK;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = RTOS_ERR_NONE;
+
+    return;
+
+end_err:                                                        /* Init failed. Handle vars for other concurrent init.  */
+    CPU_CRITICAL_ENTER();
+    KAL_InitStatus = KAL_INIT_STATUS_FAIL;                      /* Indicate potential concurrent init that it failed.   */
+    CPU_CRITICAL_EXIT();
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_FeatureQuery()
+*
+* Description : Check if specified feature is available.
+*
+* Argument(s) : feature     Feature to query.
+*
+*               opt         Option associated with the feature requested.
+*
+* Return(s)   : DEF_YES, if feature is available.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  KAL_FeatureQuery (KAL_FEATURE  feature,
+                               KAL_OPT      opt)
+{
+    CPU_BOOLEAN  is_en;
+
+
+    (void)&opt;
+
+    is_en = DEF_NO;
+
+    switch (feature) {
+        case KAL_FEATURE_TASK_CREATE:                           /* ---------------------- TASKS ----------------------- */
+             is_en = DEF_YES;
+             break;
+
+
+        case KAL_FEATURE_TASK_DEL:
+             #if (OS_CFG_TASK_DEL_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)                            /* ----------------------- LOCKS ---------------------- */
+        case KAL_FEATURE_LOCK_CREATE:
+        case KAL_FEATURE_LOCK_ACQUIRE:
+        case KAL_FEATURE_LOCK_RELEASE:
+             is_en = DEF_YES;
+             break;
+
+
+        case KAL_FEATURE_LOCK_DEL:
+             #if (OS_CFG_MUTEX_DEL_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+#endif /* OS_CFG_MUTEX_EN */
+
+
+#if (OS_CFG_SEM_EN == DEF_ENABLED)                              /* ----------------------- SEMS ----------------------- */
+        case KAL_FEATURE_SEM_CREATE:
+        case KAL_FEATURE_SEM_PEND:
+        case KAL_FEATURE_SEM_POST:
+             is_en = DEF_YES;
+             break;
+
+
+        case KAL_FEATURE_SEM_ABORT:
+             #if (OS_CFG_SEM_PEND_ABORT_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+        case KAL_FEATURE_SEM_SET:
+             #if (OS_CFG_SEM_SET_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+        case KAL_FEATURE_SEM_DEL:
+             #if (OS_CFG_SEM_DEL_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+#endif /* OS_CFG_SEM_EN */
+
+
+        case KAL_FEATURE_TMR:                                   /* ----------------------- TMRS ----------------------- */
+             #if (OS_CFG_TMR_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+        case KAL_FEATURE_Q_CREATE:                              /* ---------------------- QUEUES ---------------------- */
+        case KAL_FEATURE_Q_PEND:
+        case KAL_FEATURE_Q_POST:
+             #if (OS_CFG_Q_EN == DEF_ENABLED)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+        case KAL_FEATURE_DLY:                                   /* ----------------------- DLYS ----------------------- */
+             is_en = DEF_YES;
+             break;
+
+
+        case KAL_FEATURE_TASK_REG:                              /* ------------------- TASK STORAGE ------------------- */
+             #if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+                 is_en = DEF_YES;
+             #endif
+             break;
+
+
+        case KAL_FEATURE_TICK_GET:                              /* ------------------- TICK CTR INFO ------------------ */
+             is_en = DEF_YES;
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (is_en);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         TASK API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_TaskAlloc()
+*
+* Description : Allocate a task object and its stack.
+*
+* Argument(s) : p_name          Pointer to name of the task.
+*
+*               p_stk_base      Pointer to start of task stack. If NULL, the stack will be allocated from
+*                               the KAL memory segment.
+*
+*               stk_size_bytes  Size (in bytes) of the task stack.
+*
+*               p_cfg           Pointer to KAL task configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_INVALID_ARG        Specified stack size is invalid.
+*                                   RTOS_ERR_NOT_SUPPORTED      'p_cfg' parameter was not NULL.
+*                                   RTOS_ERR_ALLOC              Task stack or control block allocation failed.
+*
+* Return(s)   : Allocated task's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TASK_HANDLE  KAL_TaskAlloc (const  CPU_CHAR          *p_name,
+                                       void              *p_stk_base,
+                                       CPU_SIZE_T         stk_size_bytes,
+                                       KAL_TASK_EXT_CFG  *p_cfg,
+                                       RTOS_ERR          *p_err)
+{
+    KAL_TASK_HANDLE   handle = KAL_TaskHandleNull;
+    KAL_TASK         *p_task;
+    CPU_ADDR          stk_addr;
+    CPU_ADDR          stk_addr_aligned;
+    CPU_SIZE_T        actual_stk_size_bytes;
+    LIB_ERR           err_lib;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (stk_size_bytes < (OS_CFG_STK_SIZE_MIN * sizeof(CPU_STK))) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return (handle);
+        }
+
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return (handle);
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    if (p_stk_base == DEF_NULL) {                               /* Must alloc task stk on mem seg.                      */
+        stk_addr_aligned = (CPU_ADDR)Mem_SegAllocExt("KAL task stk",
+                                                      KAL_DataPtr->MemSegPtr,
+                                                      stk_size_bytes,
+                                                      CPU_CFG_STK_ALIGN_BYTES,
+                                                      DEF_NULL,
+                                                     &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+        actual_stk_size_bytes = stk_size_bytes;
+    } else {
+                                                                /* Align stk ptr, if needed.                            */
+        stk_addr              = (CPU_ADDR)p_stk_base;
+        stk_addr_aligned      =  MATH_ROUND_INC_UP_PWR2(stk_addr, CPU_CFG_STK_ALIGN_BYTES);
+        actual_stk_size_bytes =  stk_size_bytes - (stk_addr_aligned - stk_addr);
+    }
+
+    p_task = (KAL_TASK *)Mem_SegAlloc("KAL task",
+                                       KAL_DataPtr->MemSegPtr,
+                                       sizeof(KAL_TASK),
+                                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = RTOS_ERR_ALLOC;
+        return (handle);
+    }
+
+    p_task->StkBasePtr   = (CPU_STK *)stk_addr_aligned;
+    p_task->StkSizeBytes =  actual_stk_size_bytes;
+    p_task->NamePtr      =  p_name;
+    handle.TaskObjPtr    = (void *)p_task;
+
+   *p_err = RTOS_ERR_NONE;
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskCreate()
+*
+* Description : Create and start a task.
+*
+* Argument(s) : task_handle     Handle of the task to create.
+*
+*               p_fnct          Pointer to task function.
+*
+*               p_task_arg      Pointer to argument that will be passed to task function (can be DEF_NULL).
+*
+*               prio            Task priority.
+*
+*               p_cfg           Pointer to KAL task configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_SUPPORTED      'p_cfg' parameter was not NULL.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Invalid argument passed to function.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : (1) The task must be allocated prior to this call using KAL_TaskAlloc().
+*********************************************************************************************************
+*/
+
+void  KAL_TaskCreate (KAL_TASK_HANDLE     task_handle,
+                      void              (*p_fnct)(void  *p_arg),
+                      void               *p_task_arg,
+                      CPU_INT08U          prio,
+                      KAL_TASK_EXT_CFG   *p_cfg,
+                      RTOS_ERR           *p_err)
+{
+    KAL_TASK      *p_task;
+    CPU_STK_SIZE   stk_size_words;
+    CPU_STK_SIZE   stk_limit;
+    OS_ERR         err_os;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_TASK_HANDLE_IS_NULL(task_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return;
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    p_task         = (KAL_TASK *)task_handle.TaskObjPtr;
+    stk_size_words =  p_task->StkSizeBytes / sizeof(CPU_STK);
+    stk_limit      = (stk_size_words * (100u - KAL_CFG_TASK_STK_SIZE_PCT_FULL)) / 100u;
+
+    OSTaskCreate(&p_task->TCB,
+      (CPU_CHAR *)p_task->NamePtr,
+                  p_fnct,
+                  p_task_arg,
+                  prio,
+                  p_task->StkBasePtr,
+                  stk_limit,
+                  stk_size_words,
+                  0u,
+                  0u,
+                  DEF_NULL,
+                 (OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR),
+                 &err_os);
+    if (err_os == OS_ERR_NONE) {
+       *p_err = RTOS_ERR_NONE;
+    } else {
+       *p_err = KAL_ErrConvert(err_os);
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_TaskDel()
+*
+* Description : Delete a task.
+*
+* Argument(s) : task_handle     Handle of the task to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Invalid argument passed to function.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*                                   RTOS_ERR_OS                 Generic OS error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TaskDel (KAL_TASK_HANDLE   task_handle,
+                   RTOS_ERR         *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_TASK_HANDLE_IS_NULL(task_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if (OS_CFG_TASK_DEL_EN == DEF_ENABLED)
+    {
+        OS_TCB  *p_tcb;
+        OS_ERR   err_os;
+
+
+        p_tcb = &((KAL_TASK *)task_handle.TaskObjPtr)->TCB;     /* Get TCB from task handle provided.                   */
+
+        OSTaskDel(p_tcb,
+                 &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&task_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                         LOCK API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockCreate()
+*
+* Description : Create a lock, which is unlocked by default.
+*
+* Argument(s) : p_name          Pointer to name of the lock.
+*
+*               p_cfg           Pointer to KAL lock configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for lock.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*                                   RTOS_ERR_INVALID_ARG        Invalid argument passed to function.
+*
+* Return(s)   : Created lock handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_LOCK_HANDLE  KAL_LockCreate (const  CPU_CHAR          *p_name,
+                                        KAL_LOCK_EXT_CFG  *p_cfg,
+                                        RTOS_ERR          *p_err)
+{
+    KAL_LOCK_HANDLE  handle = KAL_LockHandleNull;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+    #endif
+
+    #if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    {
+        KAL_LOCK    *p_kal_lock;
+        CPU_INT08U   opt_flags;
+        LIB_ERR      err_lib;
+        OS_ERR       err_os;
+
+
+        p_kal_lock = (KAL_LOCK *)Mem_DynPoolBlkGet(&KAL_DataPtr->MutexPool,
+                                                   &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+
+        OSMutexCreate(           &p_kal_lock->Mutex,
+                      (CPU_CHAR *)p_name,
+                                 &err_os);
+        if (err_os == OS_ERR_NONE) {
+            if ((p_cfg                                                != DEF_NULL) &&
+                (DEF_BIT_IS_SET(p_cfg->Opt, KAL_OPT_CREATE_REENTRANT) == DEF_YES)) {
+                opt_flags = KAL_OPT_CREATE_REENTRANT;
+            } else {
+                opt_flags = KAL_OPT_CREATE_NON_REENTRANT;
+            }
+            p_kal_lock->OptFlags =  opt_flags;
+            handle.LockObjPtr    = (void *)p_kal_lock;
+           *p_err                =  RTOS_ERR_NONE;
+        } else {
+            Mem_DynPoolBlkFree(       &KAL_DataPtr->MutexPool,
+                               (void *)p_kal_lock,
+                                      &err_lib);
+            (void)&err_lib;                                     /* Err ignored.                                         */
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (handle);
+    }
+    #else
+        (void)&p_name;
+        (void)&p_cfg;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (handle);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockAcquire()
+*
+* Description : Acquire a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to acquire.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or lock is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or lock is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately even if lock is not available.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*                                   RTOS_ERR_ABORT              Pend operation was aborted.
+*                                   RTOS_ERR_TIMEOUT            Operation timed-out.
+*                                   RTOS_ERR_OWNERSHIP          Calling task already owns the lock.
+*                                   RTOS_ERR_WOULD_BLOCK        KAL_OPT_PEND_NON_BLOCKING opt specified and
+*                                                               lock is not available.
+*                                   RTOS_ERR_OS                 Generic OS error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockAcquire (KAL_LOCK_HANDLE   lock_handle,
+                       KAL_OPT           opt,
+                       CPU_INT32U        timeout_ms,
+                       RTOS_ERR         *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_LOCK_HANDLE_IS_NULL(lock_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (DEF_BIT_IS_SET_ANY(opt, ~(KAL_OPT_PEND_NONE | KAL_OPT_PEND_NON_BLOCKING)) == DEF_YES) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    #if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    {
+        KAL_LOCK    *p_kal_lock;
+        CPU_INT32U   timeout_ticks;
+        OS_OPT       opt_os;
+        OS_ERR       err_os;
+
+
+        if (timeout_ms != KAL_TIMEOUT_INFINITE) {
+            timeout_ticks = KAL_msToTicks(timeout_ms);
+        } else {
+            timeout_ticks = 0u;
+        }
+
+        opt_os = OS_OPT_NONE;
+        if (DEF_BIT_IS_CLR(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+            opt_os |= OS_OPT_PEND_BLOCKING;
+        } else {
+            opt_os |= OS_OPT_PEND_NON_BLOCKING;
+        }
+
+        p_kal_lock = (KAL_LOCK *)lock_handle.LockObjPtr;
+        OSMutexPend(&p_kal_lock->Mutex,
+                     timeout_ticks,
+                     opt_os,
+                     DEF_NULL,
+                    &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else if (err_os != OS_ERR_MUTEX_OWNER) {
+           *p_err = KAL_ErrConvert(err_os);
+        } else {
+            if (DEF_BIT_IS_SET(p_kal_lock->OptFlags, KAL_OPT_CREATE_REENTRANT) == DEF_YES) {
+               *p_err = RTOS_ERR_NONE;
+            } else {
+                OSMutexPost(&p_kal_lock->Mutex,                 /* Post mutex to decrement nesting ctr.                 */
+                             OS_OPT_POST_NONE,
+                            &err_os);
+                (void)&err_os;
+               *p_err = RTOS_ERR_OWNERSHIP;
+            }
+        }
+
+        return;
+    }
+    #else
+        (void)&lock_handle;
+        (void)&opt;
+        (void)&timeout_ms;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_LockRelease()
+*
+* Description : Release a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to release.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Task releasing lock does not own lock.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockRelease (KAL_LOCK_HANDLE   lock_handle,
+                       RTOS_ERR         *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_LOCK_HANDLE_IS_NULL(lock_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    {
+        KAL_LOCK  *p_kal_lock;
+        OS_ERR     err_os;
+
+
+        p_kal_lock = (KAL_LOCK *)lock_handle.LockObjPtr;
+        OSMutexPost(&p_kal_lock->Mutex,
+                     OS_OPT_POST_NONE,
+                    &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else if (err_os != OS_ERR_MUTEX_NESTING) {
+           *p_err = KAL_ErrConvert(err_os);
+        } else {
+            if (DEF_BIT_IS_SET(p_kal_lock->OptFlags, KAL_OPT_CREATE_REENTRANT) == DEF_YES) {
+               *p_err = RTOS_ERR_NONE;
+            } else {
+               *p_err = RTOS_ERR_OS;
+            }
+        }
+
+        return;
+    }
+    #else
+        (void)&lock_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_LockDel()
+*
+* Description : Delete a lock.
+*
+* Argument(s) : lock_handle     Handle of the lock to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_ISR                Function was called from an ISR.
+*                                   RTOS_ERR_OS                 Generic OS error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_LockDel (KAL_LOCK_HANDLE   lock_handle,
+                   RTOS_ERR         *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_LOCK_HANDLE_IS_NULL(lock_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if ((OS_CFG_MUTEX_EN     == DEF_ENABLED) && \
+         (OS_CFG_MUTEX_DEL_EN == DEF_ENABLED))                  /* Mutex and mutex del are avail.                       */
+    {
+        KAL_LOCK  *p_kal_lock;
+        OS_ERR     err_os;
+
+
+        p_kal_lock = (KAL_LOCK *)lock_handle.LockObjPtr;
+
+        (void)OSMutexDel(&p_kal_lock->Mutex,
+                          OS_OPT_DEL_ALWAYS,
+                         &err_os);
+        if (err_os == OS_ERR_NONE) {
+            LIB_ERR  err_lib;
+
+
+            Mem_DynPoolBlkFree(       &KAL_DataPtr->MutexPool,
+                               (void *)p_kal_lock,
+                                      &err_lib);
+            (void)&err_lib;
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else                                                       /* Mutex or mutex del is not avail.                     */
+        (void)&lock_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          SEM API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_SemCreate()
+*
+* Description : Create a semaphore, with a count of 0.
+*
+* Argument(s) : p_name          Pointer to name of the semaphore.
+*
+*               p_cfg           Pointer to KAL semaphore configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NOT_SUPPORTED      'p_cfg' parameter was not NULL.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for semaphore.
+*                                   RTOS_ERR_INVALID_ARG        Invalid argument passed to function.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*
+* Return(s)   : Created semaphore's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_SEM_HANDLE  KAL_SemCreate (const  CPU_CHAR         *p_name,
+                                      KAL_SEM_EXT_CFG  *p_cfg,
+                                      RTOS_ERR         *p_err)
+{
+    KAL_SEM_HANDLE  handle = KAL_SemHandleNull;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return (handle);
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    #if (OS_CFG_SEM_EN == DEF_ENABLED)
+    {
+        OS_SEM   *p_sem;
+        LIB_ERR   err_lib;
+        OS_ERR    err_os;
+
+
+        p_sem = (OS_SEM *)Mem_DynPoolBlkGet(&KAL_DataPtr->SemPool,
+                                            &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+
+        OSSemCreate(            p_sem,
+                    (CPU_CHAR *)p_name,
+                                0u,
+                               &err_os);
+        if (err_os == OS_ERR_NONE) {
+            handle.SemObjPtr = (void *)p_sem;
+           *p_err            =  RTOS_ERR_NONE;
+        } else {
+            Mem_DynPoolBlkFree(       &KAL_DataPtr->SemPool,
+                               (void *)p_sem,
+                                      &err_lib);
+            (void)&err_lib;
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (handle);
+    }
+    #else
+        (void)&p_name;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (handle);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemPend()
+*
+* Description : Pend on a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to pend on.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or semaphore is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or semaphore is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately even if semaphore is not available.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_ABORT              Pend operation was aborted.
+*                                   RTOS_ERR_TIMEOUT            Operation timed-out.
+*                                   RTOS_ERR_ISR                Function was called from an ISR.
+*                                   RTOS_ERR_WOULD_BLOCK        KAL_OPT_PEND_NON_BLOCKING opt specified and
+*                                                               semaphore is not available.
+*                                   RTOS_ERR_OS                 Generic OS error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPend (KAL_SEM_HANDLE   sem_handle,
+                   KAL_OPT          opt,
+                   CPU_INT32U       timeout_ms,
+                   RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (DEF_BIT_IS_SET_ANY(opt, ~(KAL_OPT_PEND_NONE | KAL_OPT_PEND_NON_BLOCKING)) == DEF_YES) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    #if (OS_CFG_SEM_EN == DEF_ENABLED)
+    {
+        CPU_INT32U  timeout_ticks;
+        OS_OPT      opt_os;
+        OS_ERR      err_os;
+
+
+        if (timeout_ms != KAL_TIMEOUT_INFINITE) {
+            timeout_ticks = KAL_msToTicks(timeout_ms);
+        } else {
+            timeout_ticks = 0u;
+        }
+
+        opt_os = OS_OPT_NONE;
+        if (DEF_BIT_IS_CLR(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+            opt_os |= OS_OPT_PEND_BLOCKING;
+        } else {
+            opt_os |= OS_OPT_PEND_NON_BLOCKING;
+        }
+
+        OSSemPend((OS_SEM *)sem_handle.SemObjPtr,
+                            timeout_ticks,
+                            opt_os,
+                            DEF_NULL,
+                           &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&sem_handle;
+        (void)&opt;
+        (void)&timeout_ms;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemPost()
+*
+* Description : Post a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to post.
+*
+*               opt             Options available:
+*                                   KAL_OPT_POST_NONE:     wake only the highest priority task pending on semaphore.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_WOULD_OVF          Semaphore would overflow.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPost (KAL_SEM_HANDLE   sem_handle,
+                   KAL_OPT          opt,
+                   RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (opt != KAL_OPT_POST_NONE) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    #if (OS_CFG_SEM_EN == DEF_ENABLED)
+    {
+        OS_ERR  err_os;
+
+
+        OSSemPost((OS_SEM *)sem_handle.SemObjPtr,
+                            OS_OPT_POST_1,
+                           &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&sem_handle;
+        (void)&opt;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          KAL_SemPendAbort()
+*
+* Description : Abort given semaphore and resume all the tasks pending on it.
+*
+* Argument(s) : sem_handle      Handle of the sempahore to abort.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle specified is invalid.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemPendAbort (KAL_SEM_HANDLE   sem_handle,
+                        RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if ((OS_CFG_SEM_EN            == DEF_ENABLED) && \
+         (OS_CFG_SEM_PEND_ABORT_EN == DEF_ENABLED))
+    {
+        OS_ERR  err_os;
+
+
+        (void)OSSemPendAbort((OS_SEM *)sem_handle.SemObjPtr,
+                                       OS_OPT_PEND_ABORT_ALL,
+                                      &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&sem_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemSet()
+*
+* Description : Set value of semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to set.
+*
+*               cnt             Count value to set semaphore.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle specified is invalid.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemSet (KAL_SEM_HANDLE   sem_handle,
+                  CPU_INT08U       cnt,
+                  RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------ VALIDATE ARGS ------------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {    /* Validate handle.                                     */
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if ((OS_CFG_SEM_EN      == DEF_ENABLED) && \
+         (OS_CFG_SEM_SET_EN  == DEF_ENABLED))
+    {
+        OS_ERR  err_os;
+
+
+        OSSemSet((OS_SEM *)sem_handle.SemObjPtr,
+                           cnt,
+                          &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&sem_handle;
+        (void)&cnt;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_SemDel()
+*
+* Description : Delete a semaphore.
+*
+* Argument(s) : sem_handle      Handle of the semaphore to delete.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle specified is invalid.
+*                                   RTOS_ERR_ISR                Function was called from an ISR.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_SemDel (KAL_SEM_HANDLE   sem_handle,
+                  RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_SEM_HANDLE_IS_NULL(sem_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if ((OS_CFG_SEM_EN     == DEF_ENABLED) && \
+         (OS_CFG_SEM_DEL_EN == DEF_ENABLED))
+    {
+        OS_SEM  *p_sem;
+        OS_ERR   err_os;
+
+
+        p_sem = (OS_SEM *)sem_handle.SemObjPtr;
+
+        (void)OSSemDel(p_sem,
+                       OS_OPT_DEL_ALWAYS,
+                      &err_os);
+        if (err_os == OS_ERR_NONE) {
+            LIB_ERR  err_lib;
+
+
+            Mem_DynPoolBlkFree(       &KAL_DataPtr->SemPool,
+                               (void *)p_sem,
+                                      &err_lib);
+            (void)&err_lib;
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&sem_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TMR API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            KAL_TmrCreate()
+*
+* Description : Create a single-shot timer.
+*
+* Argument(s) : p_name          Pointer to name of the timer.
+*
+*               p_callback      Pointer to the callback function that will be called on completion of timer.
+*
+*               p_callback_arg  Argument passed to callback function.
+*
+*               interval_ms     If timer is 'one-shot', delay  used by the timer, in milliseconds.
+*                               If timer is 'periodic', period used by the timer, in milliseconds.
+*
+*               p_cfg           Pointer to KAL timer configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Null pointer passed to function.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for semaphore.
+*                                   RTOS_ERR_INVALID_ARG        Invalid argument passed to function.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*                                   RTOS_ERR_OS                 Generic OS error.
+*
+* Return(s)   : Created timer handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TMR_HANDLE  KAL_TmrCreate (const  CPU_CHAR          *p_name,
+                                      void             (*p_callback)(void  *p_arg),
+                                      void              *p_callback_arg,
+                                      CPU_INT32U         interval_ms,
+                                      KAL_TMR_EXT_CFG   *p_cfg,
+                                      RTOS_ERR          *p_err)
+{
+    KAL_TMR_HANDLE  handle = KAL_TmrHandleNull;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (p_callback == DEF_NULL) {                           /* Validate callback fnct ptr.                          */
+           *p_err = RTOS_ERR_NULL_PTR;
+            return (handle);
+        }
+
+        if (interval_ms == 0u) {                                /* Validate time.                                       */
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return (handle);
+        }
+
+        if (p_cfg != DEF_NULL) {
+            if (DEF_BIT_IS_SET_ANY(p_cfg->Opt, ~(KAL_OPT_TMR_NONE | KAL_OPT_TMR_PERIODIC)) == DEF_YES) {
+               *p_err = RTOS_ERR_INVALID_ARG;
+                return (handle);
+            }
+        }
+    #endif
+
+    #if (OS_CFG_TMR_EN == DEF_ENABLED)
+    {
+        KAL_TMR     *p_tmr;
+        CPU_INT32U   tmr_dly;
+        CPU_INT32U   tmr_period;
+        OS_OPT       opt_os;
+        KAL_TICK     ticks;
+        OS_ERR       err_os;
+        LIB_ERR      err_lib;
+        #if  ((OS_CFG_TMR_TASK_RATE_HZ         >= 1000u) && \
+              (OS_CFG_TMR_TASK_RATE_HZ % 1000u ==    0u))
+        const  CPU_INT08U   mult = OS_CFG_TMR_TASK_RATE_HZ / 1000u;
+        #endif
+
+
+        p_tmr  = (KAL_TMR *)Mem_DynPoolBlkGet(&KAL_DataPtr->TmrPool,
+                                              &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+
+        p_tmr->CallbackFnct = p_callback;
+        p_tmr->CallbackArg  = p_callback_arg;
+                                                                /* Calc nbr of tmr ticks (rounded up nearest int).      */
+        #if  ((OS_CFG_TMR_TASK_RATE_HZ         >= 1000u) && \
+              (OS_CFG_TMR_TASK_RATE_HZ % 1000u ==    0u))       /* Optimize calc if possible for often used vals.       */
+            ticks =    interval_ms * mult;
+        #elif (OS_CFG_TMR_TASK_RATE_HZ ==  100u)
+            ticks =  ((interval_ms +  9u) /  10u);
+        #elif (OS_CFG_TMR_TASK_RATE_HZ ==   10u)
+            ticks =  ((interval_ms + 99u) / 100u);
+        #else                                                   /* General formula.                                     */
+            ticks = (((interval_ms * OS_CFG_TMR_TASK_RATE_HZ)  + 1000u - 1u) / 1000u);
+        #endif
+                                                                /* Tmr is 'periodic'.                                   */
+        if ((p_cfg                                            != DEF_NULL) &&
+            (DEF_BIT_IS_SET(p_cfg->Opt, KAL_OPT_TMR_PERIODIC) == DEF_YES)) {
+            opt_os     = OS_OPT_TMR_PERIODIC;
+            tmr_dly    = 0u;
+            tmr_period = ticks;
+        } else {
+            opt_os     = OS_OPT_TMR_ONE_SHOT;                   /* Tmr is 'one-shot'.                                   */
+            tmr_dly    = ticks;
+            tmr_period = 0u;
+        }
+
+        OSTmrCreate(           &p_tmr->Tmr,                     /* Create tmr obj.                                      */
+                    (CPU_CHAR *)p_name,
+                                tmr_dly,
+                                tmr_period,
+                                opt_os,
+                                KAL_TmrFnctWrapper,
+                    (void     *)p_tmr,
+                               &err_os);
+        if (err_os == OS_ERR_NONE) {
+            handle.TmrObjPtr = p_tmr;
+           *p_err            = RTOS_ERR_NONE;
+        } else {
+            Mem_DynPoolBlkFree(&KAL_DataPtr->TmrPool,
+                                p_tmr,
+                               &err_lib);
+            (void)&err_lib;
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (handle);
+    }
+    #else
+        (void)&p_name;
+        (void)&p_callback;
+        (void)&p_callback_arg;
+        (void)&interval_ms;
+        (void)&p_cfg;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (handle);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_TmrStart()
+*
+* Description : Start timer.
+*
+* Argument(s) : tmr_handle      Handle of timer to start.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Null timer handle passed to function.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*                                   RTOS_ERR_OS                 Generic OS error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TmrStart (KAL_TMR_HANDLE   tmr_handle,
+                    RTOS_ERR        *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_TMR_HANDLE_IS_NULL(tmr_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if (OS_CFG_TMR_EN == DEF_ENABLED)
+    {
+        KAL_TMR  *p_tmr;
+        OS_ERR    err_os;
+
+
+        p_tmr = (KAL_TMR *)tmr_handle.TmrObjPtr;
+
+        OSTmrStart(&p_tmr->Tmr,
+                   &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&tmr_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Q API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             KAL_QCreate()
+*
+* Description : Create an empty queue.
+*
+* Argument(s) : p_name          Pointer to name of the queue.
+*
+*               max_msg_qty     Maximum number of message contained in the queue.
+*
+*               p_cfg           Pointer to KAL queue configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NOT_SUPPORTED      'p_cfg' parameter was not NULL.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for queue.
+*                                   RTOS_ERR_ISR                Function called from an ISR context.
+*                                   RTOS_ERR_INVALID_ARG        Argument passed to function is invalid.
+*
+* Return(s)   : Created queue handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_Q_HANDLE  KAL_QCreate (const  CPU_CHAR       *p_name,
+                                  KAL_MSG_QTY     max_msg_qty,
+                                  KAL_Q_EXT_CFG  *p_cfg,
+                                  RTOS_ERR       *p_err)
+{
+    KAL_Q_HANDLE  handle = KAL_QHandleNull;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return (handle);
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    #if (OS_CFG_Q_EN == DEF_ENABLED)
+    {
+        OS_Q     *p_q;
+        LIB_ERR   err_lib;
+        OS_ERR    err_os;
+
+
+        p_q = (OS_Q *)Mem_SegAlloc("KAL Q",
+                                    KAL_DataPtr->MemSegPtr,
+                                    sizeof(OS_Q),
+                                   &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+
+        OSQCreate(            p_q,
+                  (CPU_CHAR *)p_name,
+                              max_msg_qty,
+                             &err_os);
+        if (err_os == OS_ERR_NONE) {
+            handle.QObjPtr = (void *)p_q;
+           *p_err          =  RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (handle);
+    }
+    #else
+        (void)&p_name;
+        (void)&max_msg_qty;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (handle);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                              KAL_QPend()
+*
+* Description : Pend/get first message of queue.
+*
+* Argument(s) : q_handle        Handle of the queue to pend on.
+*
+*               opt             Options available:
+*                                   KAL_OPT_PEND_NONE:          block until timeout expires or message is available.
+*                                   KAL_OPT_PEND_BLOCKING:      block until timeout expires or message is available.
+*                                   KAL_OPT_PEND_NON_BLOCKING:  return immediately with or without message.
+*
+*               timeout_ms      Timeout, in milliseconds. A value of 0 will never timeout.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_ABORT              Pend operation was aborted.
+*                                   RTOS_ERR_TIMEOUT            Operation timed-out.
+*                                   RTOS_ERR_ISR                Function was called from an ISR.
+*                                   RTOS_ERR_WOULD_BLOCK        KAL_OPT_PEND_NON_BLOCKING opt specified and no
+*                                                               message is available.
+*                                   RTOS_ERR_OS                 Generic OS error.
+*
+* Return(s)   : Pointer to message obtained, if any, if no error.
+*
+*               Null pointer,                        otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *KAL_QPend (KAL_Q_HANDLE   q_handle,
+                  KAL_OPT        opt,
+                  CPU_INT32U     timeout_ms,
+                  RTOS_ERR      *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(DEF_NULL);
+        }
+
+        if (KAL_Q_HANDLE_IS_NULL(q_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return (DEF_NULL);
+        }
+
+        if (DEF_BIT_IS_SET_ANY(opt, ~(KAL_OPT_PEND_NONE | KAL_OPT_PEND_NON_BLOCKING)) == DEF_YES) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return (DEF_NULL);
+        }
+    #endif
+
+    #if (OS_CFG_Q_EN == DEF_ENABLED)
+    {
+        void         *p_msg;
+        CPU_INT32U    timeout_ticks;
+        OS_MSG_SIZE   msg_size;
+        OS_OPT        opt_os;
+        OS_ERR        err_os;
+
+
+        if (timeout_ms != KAL_TIMEOUT_INFINITE) {
+            timeout_ticks = KAL_msToTicks(timeout_ms);
+        } else {
+            timeout_ticks = 0u;
+        }
+
+        opt_os = OS_OPT_NONE;
+        if (DEF_BIT_IS_CLR(opt, KAL_OPT_PEND_NON_BLOCKING) == DEF_YES) {
+            opt_os |= OS_OPT_PEND_BLOCKING;
+        } else {
+            opt_os |= OS_OPT_PEND_NON_BLOCKING;
+        }
+
+        p_msg = OSQPend((OS_Q *)q_handle.QObjPtr,
+                                timeout_ticks,
+                                opt_os,
+                               &msg_size,
+                                DEF_NULL,
+                               &err_os);
+        (void)&msg_size;
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (p_msg);
+    }
+    #else
+        (void)&q_handle;
+        (void)&opt;
+        (void)&timeout_ms;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (DEF_NULL);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                              KAL_QPost()
+*
+* Description : Post message on queue.
+*
+* Argument(s) : q_handle        Handle of the queue on which to post message.
+*
+*               p_msg           Pointer to message to post.
+*
+*               opt             Options available:
+*                                   KAL_OPT_POST_NONE:     wake only the highest priority task pending on queue.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Handle contains a NULL/invalid pointer.
+*                                   RTOS_ERR_INVALID_ARG        Handle or options specified is invalid.
+*                                   RTOS_ERR_NO_MORE_RSRC       Queue cannot contain any more message,
+*                                                               no more message available.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_QPost (KAL_Q_HANDLE   q_handle,
+                 void          *p_msg,
+                 KAL_OPT        opt,
+                 RTOS_ERR      *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_Q_HANDLE_IS_NULL(q_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+
+        if (opt != KAL_OPT_POST_NONE) {
+           *p_err = RTOS_ERR_INVALID_ARG;
+            return;
+        }
+    #else
+        (void)&opt;
+    #endif
+
+    #if (OS_CFG_Q_EN == DEF_ENABLED)                            /* Qs are available.                                    */
+    {
+        OS_ERR  err_os;
+
+
+        OSQPost((OS_Q *)q_handle.QObjPtr,
+                        p_msg,
+                        0u,
+                        OS_OPT_POST_1,
+                       &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&q_handle;
+        (void)&p_msg;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DLY API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               KAL_Dly()
+*
+* Description : Delay current task (in milliseconds).
+*
+* Argument(s) : dly_ms          Delay value, in milliseconds.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_Dly (CPU_INT32U  dly_ms)
+{
+    CPU_INT32U  dly_ticks;
+    OS_ERR      err_os;
+
+
+    dly_ticks = KAL_msToTicks(dly_ms);
+
+    OSTimeDly(dly_ticks,
+              OS_OPT_TIME_DLY,
+             &err_os);
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        switch (err_os) {
+            case OS_ERR_NONE:
+            case OS_ERR_TIME_ZERO_DLY:
+                 break;
+
+            case OS_ERR_OPT_INVALID:
+            case OS_ERR_SCHED_LOCKED:
+            case OS_ERR_TIME_DLY_ISR:
+            default:
+                 CPU_SW_EXCEPTION(;);
+                 break;
+        }
+    #else
+        (void)&err_os;                                          /* Ignore err from OSTimeDly().                         */
+    #endif
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_DlyTick()
+*
+* Description : Delay current task (in ticks).
+*
+* Argument(s) : dly_ticks       Delay value, in ticks.
+*
+*               opt             Options available:
+*                                   KAL_OPT_DLY_NONE:       apply a 'normal' delay.
+*                                   KAL_OPT_DLY:            apply a 'normal' delay.
+*                                   KAL_OPT_DLY_PERIODIC:   apply a periodic delay.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_DlyTick (KAL_TICK  dly_ticks,
+                   KAL_OPT   opt)
+{
+    OS_OPT  opt_os;
+    OS_ERR  err_os;
+
+
+    if (DEF_BIT_IS_SET(opt, KAL_OPT_DLY_PERIODIC) == DEF_YES) {
+        opt_os = OS_OPT_TIME_PERIODIC;
+    } else {
+        opt_os = OS_OPT_TIME_DLY;
+    }
+
+    OSTimeDly(dly_ticks,
+              opt_os,
+             &err_os);
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        switch (err_os) {
+            case OS_ERR_NONE:
+            case OS_ERR_TIME_ZERO_DLY:
+                 break;
+
+            case OS_ERR_OPT_INVALID:
+            case OS_ERR_SCHED_LOCKED:
+            case OS_ERR_TIME_DLY_ISR:
+            default:
+                 CPU_SW_EXCEPTION(;);
+                 break;
+        }
+    #else
+        (void)&err_os;                                          /* Ignore err from OSTimeDly().                         */
+    #endif
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TASK REG API FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          KAL_TaskRegCreate()
+*
+* Description : Create a task register.
+*
+* Argument(s) : p_cfg           Pointer to KAL task register configuration structure.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NOT_SUPPORTED      'p_cfg' parameter was not NULL.
+*                                   RTOS_ERR_ALLOC              Unable to allocate memory for task register.
+*                                   RTOS_ERR_NO_MORE_RSRC       No more task register available.
+*
+* Return(s)   : Created task register's handle.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TASK_REG_HANDLE  KAL_TaskRegCreate (KAL_TASK_REG_EXT_CFG  *p_cfg,
+                                        RTOS_ERR              *p_err)
+{
+    KAL_TASK_REG_HANDLE  handle = KAL_TaskRegHandleNull;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(handle);
+        }
+
+        if (p_cfg != DEF_NULL) {                                /* Make sure no unsupported cfg recv.                   */
+           *p_err = RTOS_ERR_NOT_SUPPORTED;
+            return (handle);
+        }
+    #else
+        (void)&p_cfg;
+    #endif
+
+    #if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+    {
+        KAL_TASK_REG  *p_task_reg;
+        LIB_ERR        err_lib;
+        OS_ERR         err_os;
+
+
+        p_task_reg = (KAL_TASK_REG *)Mem_DynPoolBlkGet(&KAL_DataPtr->TaskRegPool,
+                                                       &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = RTOS_ERR_ALLOC;
+            return (handle);
+        }
+
+        p_task_reg->Id = OSTaskRegGetID(&err_os);
+        if (err_os == OS_ERR_NONE) {
+            handle.TaskRegObjPtr = (void *)p_task_reg;
+           *p_err                =  RTOS_ERR_NONE;
+        } else {
+                                                                /* Free rsrc to pool.                                   */
+            Mem_DynPoolBlkFree(       &KAL_DataPtr->TaskRegPool,
+                               (void *)p_task_reg,
+                                      &err_lib);
+            (void)&err_lib;                                     /* Err ignored.                                         */
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (handle);
+    }
+    #else
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (handle);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskRegGet()
+*
+* Description : Get value from a task register.
+*
+* Argument(s) : task_handle     Handle of the task associated to the task register. Current task is used if NULL.
+*
+*               task_reg_handle Handle of the task register to read.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Task register handle is NULL.
+*                                   RTOS_ERR_INVALID_ARG        Handle specified is invalid.
+*
+* Return(s)   : Value read from the task register, if no error.
+*               0,                                 otherwise.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  KAL_TaskRegGet (KAL_TASK_HANDLE       task_handle,
+                            KAL_TASK_REG_HANDLE   task_reg_handle,
+                            RTOS_ERR             *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(0u);
+        }
+
+        if (KAL_TASK_REG_HANDLE_IS_NULL(task_reg_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return (0u);
+        }
+    #endif
+
+    #if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+    {
+        KAL_TASK_REG  *p_task_reg;
+        OS_TCB        *p_task_tcb;
+        CPU_INT32U     ret_val;
+        OS_ERR         err_os;
+
+
+        p_task_reg = (KAL_TASK_REG *)task_reg_handle.TaskRegObjPtr;
+
+        if (KAL_TASK_HANDLE_IS_NULL(task_handle) == DEF_YES) {
+            p_task_tcb = OSTCBCurPtr;                           /* Use cur task if no task handle is provided.          */
+        } else {
+                                                                /* Get TCB from task handle provided.                   */
+            p_task_tcb = &((KAL_TASK *)task_handle.TaskObjPtr)->TCB;
+        }
+
+        ret_val = OSTaskRegGet(p_task_tcb,
+                               p_task_reg->Id,
+                              &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return (ret_val);
+    }
+    #else
+        (void)&task_handle;
+        (void)&task_reg_handle;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return (0u);
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_TaskRegSet()
+*
+* Description : Set value of task register.
+*
+* Argument(s) : task_handle     Handle of the task associated to the task register. Current task is used if NULL.
+*
+*               task_reg_handle Handle of the task register to write to.
+*
+*               val             Value to write in the task register.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*                                   RTOS_ERR_NOT_AVAIL          Configuration does not allow operation.
+*                                   RTOS_ERR_NULL_PTR           Task register handle is NULL.
+*                                   RTOS_ERR_INVALID_ARG        Handle specified is invalid.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  KAL_TaskRegSet (KAL_TASK_HANDLE       task_handle,
+                      KAL_TASK_REG_HANDLE   task_reg_handle,
+                      CPU_INT32U            val,
+                      RTOS_ERR             *p_err)
+{
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (KAL_TASK_REG_HANDLE_IS_NULL(task_reg_handle) == DEF_YES) {
+           *p_err = RTOS_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    #if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+    {
+        KAL_TASK_REG  *p_task_reg;
+        OS_TCB        *p_task_tcb;
+        OS_ERR         err_os;
+
+
+        p_task_reg = (KAL_TASK_REG *)task_reg_handle.TaskRegObjPtr;
+
+        if (KAL_TASK_HANDLE_IS_NULL(task_handle) == DEF_YES) {
+            p_task_tcb = OSTCBCurPtr;                           /* Use cur task if no task handle is provided.          */
+        } else {
+                                                                /* Get TCB from task handle provided.                   */
+            p_task_tcb = &((KAL_TASK *)task_handle.TaskObjPtr)->TCB;
+        }
+
+        OSTaskRegSet(       p_task_tcb,
+                            p_task_reg->Id,
+                    (OS_REG)val,
+                           &err_os);
+        if (err_os == OS_ERR_NONE) {
+           *p_err = RTOS_ERR_NONE;
+        } else {
+           *p_err = KAL_ErrConvert(err_os);
+        }
+
+        return;
+    }
+    #else
+        (void)&task_handle;
+        (void)&task_reg_handle;
+        (void)&val;
+
+       *p_err = RTOS_ERR_NOT_AVAIL;
+
+        return;
+    #endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                             KAL_TickGet()
+*
+* Description : Get value of OS' tick counter.
+*
+* Argument(s) : p_err           Pointer to variable that will receive the return error code from this function:
+*
+*                                   RTOS_ERR_NONE               No error.
+*
+* Return(s)   : OS tick counter's value.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_TICK  KAL_TickGet (RTOS_ERR  *p_err)
+{
+    KAL_TICK  tick_cnt;
+    OS_ERR    err_os;
+
+
+    #if (KAL_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARGUMENTS ---------------- */
+        if (p_err == DEF_NULL) {                                /* Validate err ptr.                                    */
+            CPU_SW_EXCEPTION(0u);
+        }
+    #endif
+
+    tick_cnt = OSTimeGet(&err_os);
+    if (err_os == OS_ERR_NONE) {
+       *p_err = RTOS_ERR_NONE;
+    } else {
+       *p_err = KAL_ErrConvert(err_os);
+    }
+
+    return (tick_cnt);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         KAL_TmrFnctWrapper()
+*
+* Description : Wrapper function for timer callback.
+*
+* Argument(s) : p_tmr_os        Pointer to OS timer object.
+*
+*               p_arg           Pointer to KAL timer object.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Micrium product(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+static  void  KAL_TmrFnctWrapper (void  *p_tmr_os,
+                                  void  *p_arg)
+{
+    KAL_TMR  *p_tmr;
+
+
+    (void)&p_tmr_os;
+
+    p_tmr = (KAL_TMR *)p_arg;
+    p_tmr->CallbackFnct(p_tmr->CallbackArg);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            KAL_msToTicks()
+*
+* Description : Convert milliseconds value in tick value.
+*
+* Argument(s) : ms              Millisecond value to convert.
+*
+* Return(s)   : Number of ticks corresponding to the millisecond value, rounded up, if needed.
+*
+* Caller(s)   : KAL_LockAcquire(),
+*               KAL_SemPend(),
+*               KAL_QPend(),
+*               KAL_Dly().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  KAL_TICK  KAL_msToTicks (CPU_INT32U  ms)
+{
+           KAL_TICK    ticks;
+#if  ((OS_CFG_TICK_RATE_HZ         >= 1000u) && \
+      (OS_CFG_TICK_RATE_HZ % 1000u ==    0u))
+    const  CPU_INT08U  mult = OS_CFG_TICK_RATE_HZ / 1000u;
+#endif
+
+
+    #if  ((OS_CFG_TICK_RATE_HZ         >= 1000u) && \
+          (OS_CFG_TICK_RATE_HZ % 1000u ==    0u))               /* Optimize calc if possible for often used vals.       */
+        ticks =    ms * mult;
+    #elif (OS_CFG_TICK_RATE_HZ ==  100u)
+        ticks =  ((ms +  9u) /  10u);
+    #elif (OS_CFG_TICK_RATE_HZ ==   10u)
+        ticks =  ((ms + 99u) / 100u);
+    #else                                                       /* General formula.                                     */
+        ticks = (((ms * OS_CFG_TICK_RATE_HZ)  + 1000u - 1u) / 1000u);
+    #endif
+
+    return (ticks);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           KAL_ErrConvert()
+*
+* Description : Convert OS errors in KAL errors.
+*
+* Argument(s) : err_os          Error value used by the OS.
+*
+* Return(s)   : KAL error.
+*
+* Caller(s)   : Various KAL functions.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  RTOS_ERR  KAL_ErrConvert (OS_ERR  err_os)
+{
+    RTOS_ERR  err_rtos;
+
+
+    switch (err_os) {
+        case OS_ERR_NONE:
+        case OS_ERR_PEND_ABORT_NONE:
+        case OS_ERR_TIME_ZERO_DLY:
+             err_rtos = RTOS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_MUTEX_NOT_OWNER:
+        case OS_ERR_NAME:
+        case OS_ERR_OBJ_TYPE:
+        case OS_ERR_OPT_INVALID:
+        case OS_ERR_PRIO_INVALID:
+        case OS_ERR_Q_SIZE:
+        case OS_ERR_REG_ID_INVALID:
+        case OS_ERR_STK_INVALID:
+        case OS_ERR_STK_SIZE_INVALID:
+        case OS_ERR_STK_LIMIT_INVALID:
+        case OS_ERR_TASK_DEL_IDLE:
+        case OS_ERR_TASK_INVALID:
+        case OS_ERR_TCB_INVALID:
+        case OS_ERR_TMR_INVALID_PERIOD:
+             err_rtos = RTOS_ERR_INVALID_ARG;
+             break;
+
+
+        case OS_ERR_OBJ_PTR_NULL:
+        case OS_ERR_PTR_INVALID:
+             err_rtos = RTOS_ERR_NULL_PTR;
+             break;
+
+
+        case OS_ERR_ILLEGAL_CREATE_RUN_TIME:
+        case OS_ERR_MUTEX_NESTING:
+        case OS_ERR_OBJ_DEL:
+        case OS_ERR_SCHED_LOCKED:
+        case OS_ERR_STATE_INVALID:
+        case OS_ERR_STATUS_INVALID:
+        case OS_ERR_TASK_WAITING:
+        case OS_ERR_TMR_INACTIVE:
+        case OS_ERR_TMR_INVALID_DLY:
+        case OS_ERR_TMR_INVALID_STATE:
+        case OS_ERR_TMR_INVALID:
+             err_rtos = RTOS_ERR_OS;
+             break;
+
+
+        case OS_ERR_TIMEOUT:
+             err_rtos = RTOS_ERR_TIMEOUT;
+             break;
+
+
+        case OS_ERR_PEND_ABORT:
+             err_rtos = RTOS_ERR_ABORT;
+             break;
+
+
+        case OS_ERR_PEND_WOULD_BLOCK:
+             err_rtos = RTOS_ERR_WOULD_BLOCK;
+             break;
+
+
+        case OS_ERR_CREATE_ISR:
+        case OS_ERR_DEL_ISR:
+        case OS_ERR_PEND_ISR:
+        case OS_ERR_PEND_ABORT_ISR:
+        case OS_ERR_POST_ISR:
+        case OS_ERR_SET_ISR:
+        case OS_ERR_TASK_CREATE_ISR:
+        case OS_ERR_TASK_DEL_ISR:
+        case OS_ERR_TIME_DLY_ISR:
+        case OS_ERR_TMR_ISR:
+             err_rtos = RTOS_ERR_ISR;
+             break;
+
+
+        case OS_ERR_SEM_OVF:
+             err_rtos = RTOS_ERR_WOULD_OVF;
+             break;
+
+
+        case OS_ERR_MSG_POOL_EMPTY:
+        case OS_ERR_NO_MORE_ID_AVAIL:
+        case OS_ERR_Q_MAX:
+             err_rtos = RTOS_ERR_NO_MORE_RSRC;
+             break;
+
+
+        case OS_ERR_MUTEX_OWNER:
+             err_rtos = RTOS_ERR_OWNERSHIP;
+             break;
+
+
+        default:
+             err_rtos = RTOS_ERR_OS;
+             break;
+    }
+
+    return (err_rtos);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/common.h b/src/ucos_v1_42/micrium_source/uC-Common/common.h
new file mode 100644
index 0000000..f69a67b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/common.h
@@ -0,0 +1,91 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    uC/Common - Common Definitions
+*
+* Filename      : common.h
+* Version       : V1.01.00
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This library header file is protected from multiple pre-processor inclusion through
+*               use of the library module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  COMMON_MODULE_PRESENT                                  /* See Note #1.                                         */
+#define  COMMON_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     COMMON MODULE VERSION NUMBER
+*
+* Note(s) : (1) (a) The common module software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*/
+
+#define  COMMON_VERSION                                10100u   /* See Note #1.                                         */
+
+
+#endif /* COMMON_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-Common/common_err.h b/src/ucos_v1_42/micrium_source/uC-Common/common_err.h
new file mode 100644
index 0000000..d072470
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Common/common_err.h
@@ -0,0 +1,115 @@
+/*
+*********************************************************************************************************
+*                                               uC/Common
+*                                   Common Features for Micrium Stacks
+*
+*                         (c) Copyright 2013-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Common is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com
+*
+*               You can contact us at http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    uC/Common - Generic error codes
+*
+* Filename      : common_err.h
+* Version       : V1.01.00
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This library header file is protected from multiple pre-processor inclusion through
+*               use of the library module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  COMMON_ERR_MODULE_PRESENT                              /* See Note #1.                                         */
+#define  COMMON_ERR_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           COMMON ERR CODES
+*
+* Note(s) : (1) Caller should NEVER rely on the order/numerical value of ANY of these enum items. Their
+*               order within the enum may change and other enum item may be added anywhere, impacting
+*               the numerical values of other enum items.
+*
+*           (2) A function MUST return the most accurate error it can. For example, if a NULL pointer is
+*               passed to a function requiring a non-NULL pointer, it should return the RTOS_ERR_NULL_PTR
+*               error and NOT RTOS_ERR_INVALID_ARG. A function should only return RTOS_ERR_INVALID_ARG
+*               if no other error code can better describe the error that occurred.
+*********************************************************************************************************
+*/
+
+typedef  enum  rtos_err {
+    RTOS_ERR_NONE,                                              /* No err.                                              */
+
+                                                                /* ------------------ FEATURE SUPPORT ----------------- */
+    RTOS_ERR_NOT_AVAIL,                                         /* Feature not avail (due to cfg val(s).                */
+    RTOS_ERR_NOT_SUPPORTED,                                     /* Feature not supported.                               */
+
+                                                                /* ------------------- INVALID ARGS ------------------- */
+    RTOS_ERR_INVALID_ARG,                                       /* Invalid arg or consequence of invalid arg.           */
+    RTOS_ERR_NULL_PTR,                                          /* Null ptr.                                            */
+    RTOS_ERR_INVALID_STR_LEN,                                   /* Len of str passed is invalid.                        */
+    RTOS_ERR_INVALID_CREDENTIALS,                               /* Credentials used are invalid.                        */
+    RTOS_ERR_NOT_FOUND,                                         /* Requested item could not be found.                   */
+
+                                                                /* ---------------- CREATION/ALLOCATION --------------- */
+    RTOS_ERR_ALLOC,                                             /* Generic alloc err.                                   */
+    RTOS_ERR_CREATE_FAIL,                                       /* Gen create obj err.                                  */
+    RTOS_ERR_NO_MORE_RSRC,                                      /* Rsrc not avail to perform the operation.             */
+    RTOS_ERR_INIT,                                              /* Init failed.                                         */
+    RTOS_ERR_ALREADY_INIT,                                      /* Module has already been init'd.                      */
+    RTOS_ERR_ALREADY_EXISTS,                                    /* Item already exists.                                 */
+
+                                                                /* ------------------- PEND/ACQUIRE ------------------- */
+    RTOS_ERR_ABORT,                                             /* Operation aborted.                                   */
+    RTOS_ERR_TIMEOUT,                                           /* Operation timed out.                                 */
+
+                                                                /* ------------------- POST/RELEASE ------------------- */
+    RTOS_ERR_WOULD_BLOCK,                                       /* Non-blocking operation would block.                  */
+    RTOS_ERR_OWNERSHIP,                                         /* Ownership err.                                       */
+    RTOS_ERR_WOULD_OVF,                                         /* Item would overflow.                                 */
+
+                                                                /* -------------------- OS-RELATED -------------------- */
+    RTOS_ERR_ISR,                                               /* Illegal call from ISR.                               */
+    RTOS_ERR_OS,                                                /* Generic OS err.                                      */
+
+                                                                /* ----------------------- MISC ----------------------- */
+    RTOS_ERR_PERMISSION                                         /* Operation not allowed.                               */
+} RTOS_ERR;
+
+#endif /* COMMON_ERR_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DHCPc/Cfg/Template/dhcp-c_cfg.h b/src/ucos_v1_42/micrium_source/uC-DHCPc/Cfg/Template/dhcp-c_cfg.h
new file mode 100644
index 0000000..f909ba3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DHCPc/Cfg/Template/dhcp-c_cfg.h
@@ -0,0 +1,146 @@
+/*
+*********************************************************************************************************
+*                                               uC/DHCPc
+*                              Dynamic Host Configuration Protocol Client
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DHCP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   DHCP CLIENT CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : dhcp-c_cfg.h
+* Version       : V2.10.00
+* Programmer(s) : SR
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           TASKS PRIORITIES
+* Notes: (1) Task priorities configuration values should be used by the DHCPc OS port. The following task priorities
+*            should be defined:
+*
+*                   DHCPc_OS_CFG_TASK_PRIO
+*                   DHCPc_OS_CFG_TMR_TASK_PRIO
+*
+*            Task priorities can be defined either in this configuration file 'dhcp-c_cfg.h' or in a global
+*            OS tasks priorities configuration header file which must be included in 'dhcp-c_cfg.h'.
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #1.                                         */
+#define  DHCPc_OS_CFG_TASK_PRIO                           13
+#define  DHCPc_OS_CFG_TMR_TASK_PRIO                       14
+
+
+/*
+*********************************************************************************************************
+*                                              STACK SIZES
+*            Size (depth) of the task stacks (See the definition of CPU_STK for stack width)
+*********************************************************************************************************
+*/
+
+#define  DHCPc_OS_CFG_TASK_STK_SIZE                      512
+#define  DHCPc_OS_CFG_TMR_TASK_STK_SIZE                  512
+
+
+/*
+*********************************************************************************************************
+*                                                 DHCPc
+*
+* Note(s) : (1) Default port for DHCP server is 67, and default port for DHCP client is 68.
+*
+*           (3) Configure DHCPc_CFG_MAX_NBR_IF to the maximum number of interface this DHCP client will
+*               be able to manage at a given time.
+*
+*           (4) Once the DHCP server has assigned the client an address, the later may perform a final
+*               check prior to use this address in order to make sure it is not being used by another
+*               host on the network.
+*********************************************************************************************************
+*/
+
+#define  DHCPc_CFG_IP_PORT_SERVER                         67    /* Configure DHCP server port            (see Note #1). */
+#define  DHCPc_CFG_IP_PORT_CLIENT                         68    /* Configure DHCP client port            (see Note #1). */
+
+#define  DHCPc_CFG_MAX_RX_TIMEOUT_MS                    5000    /* Maximum inactivity time (ms) on receive.             */
+
+#define  DHCPc_CFG_PARAM_REQ_TBL_SIZE                      5    /* Configure requested parameter table size.            */
+
+#define  DHCPc_CFG_MAX_NBR_IF                              1    /* Configure maximum number of interface (see Note #3). */
+
+#define  DHCPc_CFG_ADDR_VALIDATE_EN              DEF_ENABLED    /* Configure final check on assigned address ...        */
+                                                                /* ... (see Note #4) :                                  */
+                                                                /*   DEF_DISABLED  Validation NOT performed             */
+                                                                /*   DEF_ENABLED   Validation     performed             */
+
+#define  DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN        DEF_ENABLED    /* Configure dynamic link-local address configuration : */
+                                                                /*   DEF_DISABLED  local-link configuration DISABLED    */
+                                                                /*   DEF_ENABLED   local-link configuration ENABLED     */
+
+#define  DHCPc_CFG_LOCAL_LINK_MAX_RETRY                    3    /* Configure maximum number of retry to get a           */
+                                                                /* link-local address.                                  */
+
+
+/*
+*********************************************************************************************************
+*                                 DHCPc ARGUMENT CHECK CONFIGURATION
+*
+* Note(s) : (1) Configure DHCPc_CFG_ARG_CHK_EXT_EN to enable/disable the DHCP client external argument
+*               check feature :
+*
+*               (a) When ENABLED,  ALL arguments received from any port interface provided by the developer
+*                   or application are checked/validated.
+*
+*               (b) When DISABLED, NO  arguments received from any port interface provided by the developer
+*                   or application are checked/validated.
+*
+*           (2) Configure DHCPc_CFG_ARG_CHK_DBG_EN to enable/disable the DHCP client internal debug
+*               argument check feature :
+*
+*               (a) When ENABLED,     internal arguments are checked/validated to debug the DHCP client.
+*
+*               (b) When DISABLED, NO internal arguments are checked/validated to debug the DHCP client.
+*
+*           (3) Configure DHCPc_DBG_CFG_MEM_CLR_EN to enable/disable the DHCP client from clearing
+*               internal data structure memory buffers; a convenient feature while debugging.
+*********************************************************************************************************
+*/
+                                                                /* Configure external argument check feature ...        */
+                                                                /* ... (see Note #1) :                                  */
+#define  DHCPc_CFG_ARG_CHK_EXT_EN                DEF_ENABLED
+                                                                /*   DEF_DISABLED     Argument check DISABLED           */
+                                                                /*   DEF_ENABLED      Argument check ENABLED            */
+
+                                                                /* Configure internal argument check feature ...        */
+                                                                /* ... (see Note #2) :                                  */
+#define  DHCPc_CFG_ARG_CHK_DBG_EN                DEF_DISABLED
+                                                                /*   DEF_DISABLED     Argument check DISABLED           */
+                                                                /*   DEF_ENABLED      Argument check ENABLED            */
+
+                                                                /* Configure memory clear feature  (see Note #3) :      */
+#define  DHCPc_DBG_CFG_MEM_CLR_EN                DEF_ENABLED
+                                                                /*   DEF_DISABLED     Data structure clears DISABLED    */
+                                                                /*   DEF_ENABLED      Data structure clears ENABLED     */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DHCPc/Doc/doc.html b/src/ucos_v1_42/micrium_source/uC-DHCPc/Doc/doc.html
new file mode 100644
index 0000000..8c22b59
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DHCPc/Doc/doc.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/TCPIP - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/DHCPc - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DHCPc/Examples/dhcp-c_init.c b/src/ucos_v1_42/micrium_source/uC-DHCPc/Examples/dhcp-c_init.c
new file mode 100644
index 0000000..770ea9d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DHCPc/Examples/dhcp-c_init.c
@@ -0,0 +1,206 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find information about uC/DHCPc by visiting https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                       DHCPc SINGLE INTERFACE
+*
+* Filename      : dhcp-c_init.c
+* Version       : V2.10.00
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize uC/DHCPc, start DHCP negotiation on 1 interface,
+*                     request parameters from the server during the negotiation. The function returns only
+*                     the DHCP negotiation is completed.
+*
+*                 (2) This example is for :
+*
+*                       (a) 1 interface.
+*                       (b) uC/TCPIP - V3.00.01
+*                       (b) uCOS-III - V3.00
+*
+*                 (3) This file is an example about how to use uC/DHCPc, It may not cover all case needed by a real
+*                     application. Also some modification might be needed, insert the code to perform the stated
+*                     actions wherever 'TODO' comments are found.
+*
+*                     (a) For example this example doesn't manage the link state (plugs and unplugs), this can
+*                         be a problem when switching from a network to another network.
+*
+*                     (b) This example is not fully tested, so it is not guaranteed that all cases are cover
+*                         properly.
+*********************************************************************************************************
+*/
+
+#include                                           /* TODO OS header is required for time delay definition */
+
+#include  
+#include  
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            AppInit_DHCPc()
+*
+* Description : This function initialize uC/DHCPc and start DHCPc negotiation for the interface. This function
+*               returns only the DHCP negotiation is completed.
+*
+* Argument(s) : if_nbr_tbl      Table that contains interface ID to be initialized with uC/DHCPc
+*
+*               nbr_if_cfgd     Number of interface to initialized (contained in tables)
+*
+*               if_dhcp_result  Table that will receive the DHCPc result of each interface to initialize.
+*
+* Return(s)   : DEF_OK,   Completed successfully.
+*
+*               DEF_FAIL, Initialization failed.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Prior to do any call to DHCPc the module must be initialized. If the process is successful,
+*                   the DHCP client s tasks are started, and its various data structures are initialized.
+*
+*               (2) It is possible to request additional parameters from the DHCP server by setting a DHCPc options
+*                   table, which must be passed to start function. Note that the server will not necessarily
+*                   transmit those parameters.
+*
+*               (3) Start the DHCP management of the interfaces. Note that the interface is not configured yet upon
+*                   returning from this function.
+*
+*               (4) An OS time delay must be applied between each call to DHCP to allow other task to run.
+*
+*               (5) Once the DHCP management of an interface has been started, the application may want to check the
+*                   status of the lease negotiation in order to determine whether or not the interface has been properly
+*                   configured:
+*
+*                   (a) Status DHCP_STATUS_CFG_IN_PROGRESS means that the negotiation is still underway.
+*
+*                   (b) Status DHCP_STATUS_CFGD indicates that the DHCP negotiation is done and that the interface is
+*                       properly configured.
+*
+*                   (c) Status DHCP_STATUS_CFGD_NO_TMR specifies that the DHCP negotiation is done and that the interface
+*                       is properly configured, but no timer has been set for renewing the lease. The effect of this is
+*                       that the lease is going to be permanent, even though the server might have set a time limit for it.
+*
+*                   (d) Status DHCP_STATUS_CFGD_LOCAL_LINK means that the DHCP negotiation was not successful, and that a
+*                       link-local address has been attributed to the interface. It is important to note that the DHCP
+*                       client will not try to negotiate a lease with a server at this point.
+*
+*                   (e) Status DHCP_STATUS_FAIL denotes a negotiation error. At this point, the application should call
+*                       the DHCPc_Stop() function and decide what to do next.
+*
+*               (6) Once the DHCP negotiation is completed successfully, it is possible to retrieve the parameters requested
+*                   during the start. If the function returns an error an invalid value, it means that the server might have
+*                   not transmitted the requested parameters.
+*
+*               (7) It is possible to retrieve the address configured by the DHCP client by calling the appropriate TCP/IP
+*                   stack API.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppDHCPc_Init (NET_IF_NBR      if_nbr,
+                            NET_IPv4_ADDR  *p_addr_cfgd,
+                            NET_IPv4_ADDR  *p_addr_dns)
+{
+    DHCPc_STATUS      status;
+    CPU_BOOLEAN       done;
+    DHCPc_OPT_CODE    req_param[DHCPc_CFG_PARAM_REQ_TBL_SIZE];
+    CPU_INT08U        req_param_qty;
+    NET_IPv4_ADDR     addr_tbl[NET_IPv4_CFG_IF_MAX_NBR_ADDR];
+    NET_IP_ADDRS_QTY  addr_ip_tbl_qty;
+    CPU_INT16U        size;
+    OS_ERR            err_os;
+    NET_ERR           err_net;
+    DHCPc_ERR         err;
+
+
+                                                                /* --------------- INITIALIZE uC/DHCPc ---------------- */
+    err = DHCPc_Init();                                         /* See Note #1.                                         */
+    if (err != DHCPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ---------- CFG DHCPC PARAMETER REQUESTED ----------- */
+    req_param[0]   = DHCP_OPT_DOMAIN_NAME_SERVER;               /* Obtain DNS address. See Note #2                      */
+    req_param_qty  = 1u;                                        /* 1 parameter requested.                               */
+
+
+                                                                /* ----------- START DHCPC ON THE INTERFACE ----------- */
+    DHCPc_Start(if_nbr, req_param, req_param_qty, &err);        /* See Note #3.                                         */
+    if (err != DHCPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ------- WAIT UNTIL NEGOTIATION IS COMPLETED -------- */
+    done = DEF_NO;
+    while (done == DEF_NO) {
+        OSTimeDlyHMSM(0, 0, 0, 200, OS_OPT_TIME_DLY, &err_os);  /* TODO change following OS API. See Note #4.           */
+
+        status = DHCPc_ChkStatus(if_nbr, &err);                 /* Check DHCP status. See Note #5.                      */
+        switch (status) {
+            case DHCP_STATUS_CFG_IN_PROGRESS:                   /* See Note #5a.                                        */
+                 break;
+
+
+            case DHCP_STATUS_CFGD:                              /* See Note #5b.                                        */
+            case DHCP_STATUS_CFGD_NO_TMR:                       /* See Note #5c.                                        */
+                 size = sizeof(NET_IPv4_ADDR);                  /* An address has been configured.                      */
+                 DHCPc_GetOptVal(             if_nbr,           /* Get DNS address obtained by the DHCPc. See Note #6.  */
+                                              DHCP_OPT_DOMAIN_NAME_SERVER,
+                                (CPU_INT08U *)p_addr_dns,
+                                             &size,
+                                             &err);
+                 /* Break intentionally omitted. */
+
+
+            case DHCP_STATUS_CFGD_LOCAL_LINK:                   /* See Note #5d.                                        */
+                 done = DEF_YES;
+                 addr_ip_tbl_qty = sizeof(addr_tbl) / sizeof(NET_IPv4_ADDR);
+                (void)NetIPv4_GetAddrHost(if_nbr,               /* See Note #7. Get current address configured.         */
+                                         &addr_tbl[0],
+                                         &addr_ip_tbl_qty,
+                                         &err_net);
+                 if (err_net != NET_IPv4_ERR_NONE) {
+                     return (DEF_FAIL);
+                 }
+
+                *p_addr_cfgd = addr_tbl[0];
+                 break;
+
+
+            case DHCP_STATUS_FAIL:                              /* See Note #5e. No address has been configured.        */
+                 DHCPc_Stop(if_nbr, &err);
+                 return (DEF_FAIL);
+
+
+            default:
+                 break;
+        }
+    }
+
+    return (DEF_OK);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-DHCPc/Examples/dhcp-c_mgr.c b/src/ucos_v1_42/micrium_source/uC-DHCPc/Examples/dhcp-c_mgr.c
new file mode 100644
index 0000000..590e163
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DHCPc/Examples/dhcp-c_mgr.c
@@ -0,0 +1,423 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find information about uC/DHCPc by visiting https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                            DHCPc MANAGER
+*
+* Filename      : dhcp-c_mgr.c
+* Version       : V2.10.00
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize uC/DHCPc and manage DHCP following the interface link
+*                     state change (restart DHCP negotiation when the link move UP to DOWN to UP). This example use
+*                     an OS timer and it notifies the upper application when a new IP address is configured using a
+*                     callback function.
+*
+*                 (2) This example can support :
+*
+*                       (a) 1 interface.
+*                       (b) uC/TCPIP - V3.00.01
+*                       (b) uCOS-III - V3.00
+*
+*                 (2) This file is an example about how to use uC/DHCPc, It may not cover all case needed by a real
+*                     application. Also some modification might be needed, insert the code to perform the stated
+*                     actions wherever 'TODO' comments are found.
+*
+*                     (a) For example, changes are required to support many interfaces or if DHCPc parameter must
+*                         be requested.
+*
+*                     (b) This example is not fully tested, so it is not guaranteed that all cases are cover
+*                         properly.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  void  (*APP_DHCP_CALLBACK)(NET_IF_LINK_STATE link_state,
+                                    DHCPc_STATUS      status,
+                                    NET_IPv4_ADDR     host_addr);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+OS_TMR             AppDHCPcMgr_Tmr;
+NET_IF_NBR         AppDHCPcMgr_IF_Nbr;
+APP_DHCP_CALLBACK  AppDHCPcMgr_Callback;
+DHCPc_STATUS       AppDHCPcMgr_LastStatus = DHCP_STATUS_NONE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  AppDHCPcMgr_Start            (NET_IF_NBR          if_nbr);
+static  CPU_BOOLEAN  AppDHCPcMgr_Stop             (NET_IF_NBR          if_nbr);
+
+static  void         AppDHCPcMgr_IF_LinkSubscriber(NET_IF_NBR          if_nbr,
+                                                   NET_IF_LINK_STATE   state);
+
+static  void         AppDHCPcMgr_CheckState       (void               *p_tmr,
+                                                   void               *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                         AppDHCPcMgr_Init()
+*
+* Description : (1) This function initialize uC/DHCPc, DHCPc Manager objects and start DHCPc for the interface if
+*                   the link is up:
+*
+*                   (a)
+*
+* Argument(s) : if_nbr      ID of the interface to manage.
+*
+*               callback    Callback function to call when an address has been obtained or the process has failed.
+*
+* Return(s)   : DEF_OK,   Successfully initialized uc/DHCPc and the interface will be managed.
+*
+*               DEF_FAIL, Initialization failed.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Prior to do any call to DHCPc the module must be initialized. If the process is successful,
+*                   the DHCP client s tasks are started, and its various data structures are initialized.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppDHCPcMgr_Init (NET_IF_NBR         if_nbr,
+                               APP_DHCP_CALLBACK  callback)
+{
+    NET_IF_LINK_STATE  state;
+    CPU_BOOLEAN        result;
+    OS_ERR             err_os;
+    DHCPc_ERR          err_dhcp;
+    NET_ERR            err_net;
+
+
+    AppDHCPcMgr_Callback = callback;
+    AppDHCPcMgr_IF_Nbr   = if_nbr;
+
+
+                                                                /* --------------- INITIALIZE uC/DHCPc ---------------- */
+    err_dhcp = DHCPc_Init();                                    /* See Note #1.                                         */
+    if (err_dhcp != DHCPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ------- SUBCRIBE TO LINK CHANGE NOTIFICATION ------- */
+    NetIF_LinkStateSubscribe(if_nbr,                            /* Subscribe a function to be notified when the link    */
+                            &AppDHCPcMgr_IF_LinkSubscriber,     /* state of the interface change.                       */
+                            &err_net);
+    if (err_net != NET_IF_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+
+                                                                /* ---- CREATE AN OS TIMER TO MONITOR DHCPc STATUS ---- */
+    OSTmrCreate(&AppDHCPcMgr_Tmr,
+                "App DHCPc Mgr Timer",
+                 0,
+                 OSCfg_TickRate_Hz,
+                 OS_OPT_TMR_PERIODIC,
+                &AppDHCPcMgr_CheckState,
+                &AppDHCPcMgr_IF_Nbr,
+                &err_os);
+    if (err_os != OS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------ GET CURRENT IF LINK STATE ------------- */
+    state  = NetIF_LinkStateGet(if_nbr, &err_net);
+    switch (state) {
+        case NET_IF_LINK_UP:                                    /* If link is already up ...                            */
+             result = AppDHCPcMgr_Start(if_nbr);                /* Start DHCPc on this interface.                       */
+             break;
+
+
+        case NET_IF_LINK_DOWN:                                  /* If link is down, let the subscriber function ...     */
+             result = DEF_OK;                                   /* start DHCPc on the interface when the link will ...  */
+             break;                                             /* come up.                                             */
+
+        default:
+             return (DEF_FAIL);
+    }
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          AppDHCPcMgr_Start()
+*
+* Description : This function start DHCP negotiation on the interface and start the manager timer which is
+*               responsible to monitor the DHCP result and call the callback function.
+*
+* Argument(s) : if_nbr  Interface ID.
+*
+* Return(s)   : DEF_OK,   Successfully started.
+*
+*               DEF_FAIL, Start failed.
+*
+* Caller(s)   : AppInit_DHCPc(),
+*               AppLinkStateSubscriber().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  AppDHCPcMgr_Start (NET_IF_NBR  if_nbr)
+{
+    OS_ERR     err_os;
+    DHCPc_ERR  err_dhcp;
+
+
+                                                                /* ------ START DHCP FOR THE SELECTED INTERFACE ------- */
+    DHCPc_Start(if_nbr, DEF_NULL, 0, &err_dhcp);
+    if (err_dhcp != DHCPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------- START THE MANAGER TIMER -------------- */
+    (void)OSTmrStart(&AppDHCPcMgr_Tmr, &err_os);
+    if (err_os != OS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          AppDHCPcMgr_Stop()
+*
+* Description : This function stop DHCP negotiation on the interface and stop the manager timer.
+*
+* Argument(s) : if_nbr  Interface ID.
+*
+* Return(s)   : DEF_OK,   Successfully stopped.
+*
+*               DEF_FAIL, Stop failed.
+*
+* Caller(s)   : AppLinkStateSubscriber().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  AppDHCPcMgr_Stop (NET_IF_NBR  if_nbr)
+{
+    OS_ERR     err_os;
+    DHCPc_ERR  err_dhcp;
+
+
+                                                                /* --------- STOP DHCP ON SELECTED INTERFACE ---------- */
+    DHCPc_Stop(if_nbr, &err_dhcp);
+
+
+                                                                /* -------------- STOP THE MANAGER TIMER -------------- */
+   (void)OSTmrStop(&AppDHCPcMgr_Tmr, OS_OPT_TMR_NONE, DEF_NULL, &err_os);
+    if (err_os != OS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    AppDHCPcMgr_LastStatus = DHCP_STATUS_NONE;
+    return (DEF_OK);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                   AppDHCPcMgr_LinkStateSubscriber()
+*
+* Description : This function is called every time the link stage of the interface change.
+*
+* Argument(s) :  if_nbr  Interface ID.
+*
+*               state    Current link state
+*
+* Return(s)   : none.
+*
+* Caller(s)   : uC/TCP-IP - Created by AppDHCPcMgr_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppDHCPcMgr_IF_LinkSubscriber (NET_IF_NBR         if_nbr,
+                                             NET_IF_LINK_STATE  state)
+{
+    switch (state) {
+        case NET_IF_LINK_UP:                                    /* Link is back to up ...                               */
+             (void)AppDHCPcMgr_Start(if_nbr);                   /* Start acquiring an address on this interface.        */
+             break;
+
+        case NET_IF_LINK_DOWN:                                  /* Link is down ...                                     */
+             (void)AppDHCPcMgr_Stop(if_nbr);                    /* Stop DHCP and remove address.                        */
+             if (AppDHCPcMgr_Callback != DEF_NULL) {            /* Notify the application about it.                     */
+                 AppDHCPcMgr_Callback(NET_IF_LINK_DOWN, DHCP_STATUS_NONE, NET_IPv4_ADDR_NONE);
+             }
+             break;
+
+        default:
+            break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       AppDHCPcMgr_CheckState()
+*
+* Description : This function is periodically called to monitor the DHCPc status and result. The callback
+*               function is called when an address is configured or the negotiation has failed.
+*
+* Argument(s) : p_tmr   Pointer to OS timer
+*
+*               p_arg   Function argument pointer.
+*
+* Return(s)   : none.
+*
+* Created by  : AppDHCPcMgr_Init().
+*
+* Note(s)     : (1) Once the DHCP management of an interface has been started, the application may want to check the
+*                   status of the lease negotiation in order to determine whether or not the interface has been properly
+*                   configured:
+*
+*                   (a) Status DHCP_STATUS_CFG_IN_PROGRESS means that the negotiation is still underway.
+*
+*                   (b) Status DHCP_STATUS_CFGD indicates that the DHCP negotiation is done and that the interface is
+*                       properly configured.
+*
+*                   (c) Status DHCP_STATUS_CFGD_NO_TMR specifies that the DHCP negotiation is done and that the interface
+*                       is properly configured, but no timer has been set for renewing the lease. The effect of this is
+*                       that the lease is going to be permanent, even though the server might have set a time limit for it.
+*
+*                   (d) Status DHCP_STATUS_CFGD_LOCAL_LINK means that the DHCP negotiation was not successful, and that a
+*                       link-local address has been attributed to the interface. It is important to note that the DHCP
+*                       client will not try to negotiate a lease with a server at this point.
+*
+*                   (e) Status DHCP_STATUS_FAIL denotes a negotiation error. At this point, the application should call
+*                       the DHCPc_Stop() function and decide what to do next.
+*********************************************************************************************************
+*/
+
+static  void  AppDHCPcMgr_CheckState (void *p_tmr,
+                                      void *p_arg)
+{
+    NET_IPv4_ADDR     addr_tbl[NET_IPv4_CFG_IF_MAX_NBR_ADDR];
+    NET_IP_ADDRS_QTY  addr_ip_tbl_qty;
+    NET_IF_NBR       *p_if_nbr;
+    DHCPc_STATUS      status;
+    NET_ERR           err_net;
+    DHCPc_ERR         err_dhcp;
+
+
+    p_if_nbr = (NET_IF_NBR *)p_arg;
+    status   =  DHCPc_ChkStatus(*p_if_nbr, &err_dhcp);          /* See Note #1.                                         */
+    switch (status) {
+        case DHCP_STATUS_CFGD:                                  /* IF an IP address has been configured.                */
+        case DHCP_STATUS_CFGD_NO_TMR:
+        case DHCP_STATUS_CFGD_LOCAL_LINK:
+             if ((AppDHCPcMgr_LastStatus   != status) &&        /* The state has changed.                               */
+                 (AppDHCPcMgr_Callback != DEF_NULL)){
+                  addr_ip_tbl_qty = sizeof(addr_tbl) / sizeof(NET_IPv4_ADDR);
+                 (void)NetIPv4_GetAddrHost(*p_if_nbr,           /* Get current address configured.                      */
+                                           &addr_tbl[0],
+                                           &addr_ip_tbl_qty,
+                                           &err_net);
+
+                  AppDHCPcMgr_Callback(NET_IF_LINK_UP,          /* Notify the application about the address configured. */
+                                           status,
+                                           addr_tbl[0]);
+             }
+             break;
+
+
+        case DHCP_STATUS_FAIL:                                  /* Acquiring an address has failed.                     */
+             if (AppDHCPcMgr_Callback != DEF_NULL) {
+                 AppDHCPcMgr_Callback(NET_IF_LINK_UP,           /* Notify the application about the failing ...         */
+                                          status,               /* The application could configure a static address ... */
+                                          NET_IPv4_ADDR_NONE);  /* in the callback function when it fails.              */
+             }
+             AppDHCPcMgr_Stop(*p_if_nbr);
+             break;
+
+
+        case DHCP_STATUS_NONE:
+        case DHCP_STATUS_CFG_IN_PROGRESS:
+        default:
+             break;
+    }
+
+
+    AppDHCPcMgr_LastStatus = status;
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DHCPc/Examples/dhcp-c_multiple_if.c b/src/ucos_v1_42/micrium_source/uC-DHCPc/Examples/dhcp-c_multiple_if.c
new file mode 100644
index 0000000..41edf19
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DHCPc/Examples/dhcp-c_multiple_if.c
@@ -0,0 +1,172 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find information about uC/DHCPc by visiting https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                      DHCPc MULTIPLE INTERFACE
+*
+* Filename      : dhcp-c_multiple_if.c
+* Version       : V2.10.00
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize uC/DHCPc, start DHCP negotiation on many interface
+*                     and return only when all DHCP negotiation are completed.
+*
+*                 (2) This example is for :
+*
+*                       (a) Many interfaces.
+*                       (b) uC/TCPIP - V3.00.01
+*                       (b) uCOS-III - V3.00
+*
+*                 (3) This file is an example about how to use uC/DHCPc, It may not cover all case needed by a real
+*                     application. Also some modification might be needed, insert the code to perform the stated
+*                     actions wherever 'TODO' comments are found.
+*
+*                     (a) For example this example doesn't manage the link state (plugs and unplugs), this can
+*                         be a problem when switching from a network to another network.
+*
+*                     (b) This example is not fully tested, so it is not guaranteed that all cases are cover
+*                         properly.
+*********************************************************************************************************
+*/
+#include                                           /* TODO OS header is required for time delay definition */
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                      AppDHCPc_InitMultipleIF()
+*
+* Description : This function initialize uC/DHCPc and start DHCPc negotiation for many interfaces. This
+*               function returns only the DHCP negotiation is completed.
+*
+* Argument(s) : if_nbr_tbl      Table that contains interface ID to be initialized with uC/DHCPc
+*
+*               nbr_if_cfgd     Number of interface to initialized (contained in tables)
+*
+*               if_dhcp_result  Table that will receive the DHCPc result of each interface to initialize.
+*
+* Return(s)   : DEF_OK,   Completed successfully.
+*
+*               DEF_FAIL, Initialization failed.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Prior to do any call to DHCPc the module must be initialized. If the process is successful,
+*                   the DHCP client s tasks are started, and its various data structures are initialized.
+*
+*               (2) Start the DHCP management of the interfaces. Note that the interface is not configured yet upon
+*                   returning from this function.
+*
+*               (3) An OS time delay must be applied between each call to DHCP to allow other task to run.
+*
+*               (4) Once the DHCP management of an interface has been started, the application may want to check the
+*                   status of the lease negotiation in order to determine whether or not the interface has been properly
+*                   configured:
+*
+*                   (a) Status DHCP_STATUS_CFG_IN_PROGRESS means that the negotiation is still underway.
+*
+*                   (b) Status DHCP_STATUS_CFGD indicates that the DHCP negotiation is done and that the interface is
+*                       properly configured.
+*
+*                   (c) Status DHCP_STATUS_CFGD_NO_TMR specifies that the DHCP negotiation is done and that the interface
+*                       is properly configured, but no timer has been set for renewing the lease. The effect of this is
+*                       that the lease is going to be permanent, even though the server might have set a time limit for it.
+*
+*                   (d) Status DHCP_STATUS_CFGD_LOCAL_LINK means that the DHCP negotiation was not successful, and that a
+*                       link-local address has been attributed to the interface. It is important to note that the DHCP
+*                       client will not try to negotiate a lease with a server at this point.
+*
+*                   (e) Status DHCP_STATUS_FAIL denotes a negotiation error. At this point, the application should call
+*                       the DHCPc_Stop() function and decide what to do next.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppDHCPc_InitMultipleIF (NET_IF_NBR    if_nbr_tbl[],
+                                      CPU_INT08U    nbr_if_cfgd,
+                                      DHCPc_STATUS  if_dhcp_result[])
+{
+    NET_IF_NBR      if_nbr_cur;
+    CPU_INT08U      nbr_if_init;
+    CPU_INT08U      ix;
+    DHCPc_STATUS    status;
+    OS_ERR          os_err;
+    DHCPc_ERR       err;
+
+
+                                                                /* --------------- INITIALIZE uC/DHCPc ---------------- */
+    err = DHCPc_Init();                                         /* See Note #1.                                         */
+    if (err != DHCPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------ START DHCPC EACH INTERFACE ------------ */
+    for (ix = 0; ix < nbr_if_cfgd; ix++) {
+        if_nbr_cur = if_nbr_tbl[ix];
+        DHCPc_Start(if_nbr_cur,                                 /* See Note #2.                                         */
+                    DEF_NULL,
+                    0,
+                   &err);
+        if (err != DHCPc_ERR_NONE) {
+            return (DEF_FAIL);
+        }
+
+        if_dhcp_result[ix] = DHCP_STATUS_CFG_IN_PROGRESS;
+    }
+
+
+
+    nbr_if_init = 0u;
+
+                                                                /* ------ WAIT UNTIL NEGOTIATIONS ARE COMPLETED ------- */
+    while (nbr_if_init < nbr_if_cfgd) {
+        OSTimeDlyHMSM(0, 0, 0, 200, OS_OPT_TIME_DLY, &os_err);  /* TODO change following OS API. See Note #3.           */
+
+
+        for (ix = 0; ix < nbr_if_cfgd; ix++) {
+            if (if_dhcp_result[ix] == DHCP_STATUS_CFG_IN_PROGRESS) {
+                if_nbr_cur = if_nbr_tbl[ix];
+                status = DHCPc_ChkStatus(if_nbr_cur, &err);     /* Check DHCP status. See Note #4.                      */
+                switch (status) {
+                    case DHCP_STATUS_CFG_IN_PROGRESS:           /* See Note #4a.                                        */
+                         break;
+
+                    case DHCP_STATUS_CFGD:                      /* See Note #4b.                                        */
+                    case DHCP_STATUS_CFGD_NO_TMR:               /* See Note #4c.                                        */
+                    case DHCP_STATUS_CFGD_LOCAL_LINK:           /* See Note #4d.                                        */
+                    case DHCP_STATUS_FAIL:                      /* See Note #4e.                                        */
+                         if_dhcp_result[ix] = status;           /* Store negotiation result.                            */
+                         nbr_if_init++;
+                         break;
+
+                    default:
+                         break;
+                }
+            }
+        }
+    }
+
+    return (DEF_OK);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-DHCPc/OS/uCOS-II/dhcp-c_os.c b/src/ucos_v1_42/micrium_source/uC-DHCPc/OS/uCOS-II/dhcp-c_os.c
new file mode 100644
index 0000000..81f826a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DHCPc/OS/uCOS-II/dhcp-c_os.c
@@ -0,0 +1,1271 @@
+/*
+*********************************************************************************************************
+*                                               uC/DHCPc
+*                              Dynamic Host Configuration Protocol Client
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DHCP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 DHCP CLIENT OPERATING SYSTEM LAYER
+*
+*                                          Micrium uC/OS-II
+*
+* Filename      : dhcp-c_os.c
+* Version       : V2.10.00
+* Programmer(s) : SR
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/OS-II V2.86 (or more recent version) is included in the project build.
+*
+*                 (2) REQUIREs the following uC/OS-II feature(s) to be ENABLED :
+*
+*                         ------ FEATURE ------     -- MINIMUM CONFIGURATION FOR DHCPc/OS PORT --
+*
+*                     (a) Semaphores
+*                         (1) OS_SEM_EN             Enabled
+*                         (2) OS_SEM_SET_EN         Enabled
+*
+*                     (b) Timers
+*                         (1) OS_TMR_EN             Enabled
+*
+*                     (c) Message Queues
+*                         (1) OS_Q_EN               Enabled
+*
+*                     (d) OS Events                 OS_MAX_EVENTS >= DHCPc_OS_NBR_EVENTS
+*                                                       (see 'OS OBJECT DEFINES')
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#include  "../../Source/dhcp-c.h"
+#include                                             /* See this 'dhcp-c_os.c  Note #1'.                     */
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     OS TASK/OBJECT NAME DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- TASK NAMES -------------------- */
+                                          /*           1         2 */
+                                          /* 012345678901234567890 */
+#define  DHCPc_OS_TASK_NAME                 "DHCPc Task"
+#define  DHCPc_OS_TMR_TASK_NAME             "DHCPc Tmr Task"
+
+#define  DHCPc_OS_TASK_NAME_SIZE_MAX                      15    /* Max of ALL DHCPc task name sizes.                    */
+
+
+                                                                /* -------------------- OBJ NAMES --------------------- */
+                                          /*           1         2 */
+                                          /* 012345678901234567890 */
+#define  DHCPc_OS_INIT_NAME                 "DHCPc Init Signal"
+#define  DHCPc_OS_LOCK_NAME                 "DHCPc Global Lock"
+#define  DHCPc_OS_TMR_NAME                  "DHCPc Tmr"
+#define  DHCPc_OS_TMR_SIGNAL_NAME           "DHCPc Tmr Signal"
+#define  DHCPc_OS_Q_NAME                    "DHCPc Msg Q"
+
+#define  DHCPc_OBJ_NAME_SIZE_MAX                          18    /* Max of ALL DHCPc obj name sizes.                     */
+
+
+/*
+*********************************************************************************************************
+*                                          OS OBJECT DEFINES
+*********************************************************************************************************
+*/
+
+#define  DHCPc_OS_NBR_SEM_DHCPc_INIT                       1
+#define  DHCPc_OS_NBR_SEM_DHCPc_LOCK                       1
+#define  DHCPc_OS_NBR_SEM_DHCPc_TMR_SIGNAL                 1
+
+#define  DHCPc_OS_NBR_SEM                              (DHCPc_OS_NBR_SEM_DHCPc_INIT + \
+                                                        DHCPc_OS_NBR_SEM_DHCPc_LOCK + \
+                                                        DHCPc_OS_NBR_SEM_DHCPc_TMR_SIGNAL)
+
+#define  DHCPc_OS_NBR_Q                                    1
+
+#define  DHCPc_OS_NBR_EVENTS                           (DHCPc_OS_NBR_SEM + \
+                                                        DHCPc_OS_NBR_Q)
+
+                                                                /* 1 msg per IF.                                        */
+#define  DHCPc_OS_SIZE_Q                               (DHCPc_CFG_MAX_NBR_IF * DHCPc_COMM_MSG_MAX_NBR)
+
+
+/*
+*********************************************************************************************************
+*                                          OS TIMER DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* Period of DHCPc tmr in tmr tick.                     */
+#define  DHCPc_OS_TMR_PERIOD_TMR_TICK                  (DHCPc_TMR_PERIOD_SEC * OS_TMR_CFG_TICKS_PER_SEC)
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+                                                                /* --------------------- TASK STK --------------------- */
+static  OS_STK     DHCPc_OS_TaskStk[DHCPc_OS_CFG_TASK_STK_SIZE];
+static  OS_STK     DHCPc_OS_TmrTaskStk[DHCPc_OS_CFG_TMR_TASK_STK_SIZE];
+
+
+                                                                /* ----------------- LOCKS & SIGNALS ------------------ */
+static  OS_EVENT  *DHCPc_OS_InitSignalPtr;
+static  OS_EVENT  *DHCPc_OS_LockPtr;
+static  OS_EVENT  *DHCPc_OS_TmrSignalPtr;
+
+
+                                                                /* ---------------------- TIMER ----------------------- */
+static  OS_TMR    *DHCPc_OS_TmrPtr;
+
+
+                                                                /* ------------------ MESSAGE QUEUE ------------------- */
+static  OS_EVENT  *DHCPc_OS_MsgQPtr;
+static  void      *DHCPc_OS_MsgQ[DHCPc_OS_SIZE_Q];
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                /* ---------- DHCPc TASK MANAGEMENT FUNCTION ---------- */
+static  void  DHCPc_OS_Task       (void  *p_data);
+
+                                                                /* ------- DHCPc TIMER TASK MANAGEMENT FUNCTION ------- */
+static  void  DHCPc_OS_TmrTask    (void  *p_data);
+
+                                                                /* ---------- DHCPc TIMER CALLBACK FUNCTION ----------- */
+static  void  DHCPc_OS_TmrCallback(void  *p_tmr,
+                                   void  *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* See this 'dhcp-c_os.c  Note #1'.                     */
+#if     (OS_VERSION < 286u)
+#error  "OS_VERSION                      [SHOULD be >= V2.86]                "
+#endif
+
+
+
+                                                                /* See this 'dhcp-c_os.c  Note #2a'.                    */
+#if     (OS_SEM_EN < 1u)
+#error  "OS_SEM_EN                       illegally #define'd in 'os_cfg.h'             "
+#error  "                                [MUST be  > 0, (see 'dhcp-c_os.c  Note #2a1')]"
+#endif
+
+#if     (OS_SEM_SET_EN < 1u)
+#error  "OS_SEM_SET_EN                   illegally #define'd in 'os_cfg.h'             "
+#error  "                                [MUST be  > 0, (see 'dhcp-c_os.c  Note #2a2')]"
+#endif
+
+
+
+                                                                /* See this 'dhcp-c_os.c  Note #2b'.                    */
+#if     (OS_TMR_EN < 1u)
+#error  "OS_TMR_EN                       illegally #define'd in 'os_cfg.h'             "
+#error  "                                [MUST be  > 0, (see 'dhcp-c_os.c  Note #2b1')]"
+#endif
+
+
+
+                                                                /* See this 'dhcp-c_os.c  Note #2c'.                    */
+#if     (OS_Q_EN < 1u)
+#error  "OS_Q_EN                         illegally #define'd in 'os_cfg.h'             "
+#error  "                                [MUST be  > 0, (see 'dhcp-c_os.c  Note #2c1')]"
+#endif
+
+
+
+                                                                /* See this 'dhcp-c_os.c  Note #2d'.                    */
+#if     (OS_MAX_EVENTS < DHCPc_OS_NBR_EVENTS)
+#error  "OS_MAX_EVENTS                   illegally #define'd in 'os_cfg.h'    "
+#error  "                                [MUST be  >= DHCPc_OS_NBR_EVENTS    ]"
+#error  "                                [      (see 'dhcp-c_os.c  Note #2d')]"
+#endif
+
+
+
+
+#ifndef  DHCPc_OS_CFG_TASK_PRIO
+#error  "DHCPc_OS_CFG_TASK_PRIO                not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  >= 0]                      "
+#elif   (DHCPc_OS_CFG_TASK_PRIO < 0u)
+#error  "DHCPc_OS_CFG_TASK_PRIO          illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  >= 0]                      "
+#endif
+
+#ifndef  DHCPc_OS_CFG_TMR_TASK_PRIO
+#error  "DHCPc_OS_CFG_TMR_TASK_PRIO            not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  >= 0]                      "
+#elif   (DHCPc_OS_CFG_TMR_TASK_PRIO < 0u)
+#error  "DHCPc_OS_CFG_TMR_TASK_PRIO      illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  >= 0]                      "
+#endif
+
+
+
+#ifndef  DHCPc_OS_CFG_TASK_STK_SIZE
+#error  "DHCPc_OS_CFG_TASK_STK_SIZE            not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  > 0]                    "
+#elif   (DHCPc_OS_CFG_TASK_STK_SIZE < 1u)
+#error  "DHCPc_OS_CFG_TASK_STK_SIZE      illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  > 0]                       "
+#endif
+
+#ifndef  DHCPc_OS_CFG_TMR_TASK_STK_SIZE
+#error  "DHCPc_OS_CFG_TMR_TASK_STK_SIZE        not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  > 0]                       "
+#elif   (DHCPc_OS_CFG_TMR_TASK_STK_SIZE < 1u)
+#error  "DHCPc_OS_CFG_TMR_TASK_STK_SIZE  illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  > 0]                       "
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   DHCPc INITIALIZATION FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_OS_Init()
+*
+* Description : (1) Perform DHCPc/OS initialization :
+*
+*                   (a) Implement DHCPc initialization signal by creating a counting semaphore.
+*
+*                       (1) Initialize DHCPc initialization signal with no signal by setting the
+*                           semaphore count to 0 to block the semaphore.
+*
+*                   (b) Implement global DHCPc lock by creating a binary semaphore.
+*
+*                       (1) Initialize DHCPc lock as released by setting the semaphore count to 1.
+*
+*                   (c) Implement timer expiration communication by creating a message queue.
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc/OS initialization successful.
+*
+*                               DHCPc_OS_ERR_INIT_SIGNAL        DHCPc    initialization signal
+*                                                                   NOT successfully initialized.
+*                               DHCPc_OS_ERR_INIT_SIGNAL_NAME   DHCPc    initialization signal name
+*                                                                   NOT successfully configured.
+*
+*                               DHCPc_OS_ERR_INIT_LOCK          DHCPc    lock           signal
+*                                                                   NOT successfully initialized.
+*                               DHCPc_OS_ERR_INIT_LOCK_NAME     DHCPc    lock           signal name
+*                                                                   NOT successfully configured.
+*
+*                               DHCPc_OS_ERR_INIT_Q             DHCPc    queue
+*                                                                   NOT successfully configured.
+*                               DHCPc_OS_ERR_INIT_Q_NAME        DHCPc    queue                 name
+*                                                                   NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Init().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+void  DHCPc_OS_Init (DHCPc_ERR  *perr)
+{
+#if (((OS_VERSION >= 288) && (OS_EVENT_NAME_EN   >  0)) || \
+     ((OS_VERSION <  288) && (OS_EVENT_NAME_SIZE >= DHCPc_OBJ_NAME_SIZE_MAX)))
+    INT8U  os_err;
+#endif
+
+                                                                /* -------------- INITIALIZE DHCPc SIGNAL ------------- */
+                                                                /* Create DHCPc initialization signal ...               */
+    DHCPc_OS_InitSignalPtr = OSSemCreate((INT16U)0);            /* ... with NO DHCPc tasks signaled (see Note #1a1).    */
+    if (DHCPc_OS_InitSignalPtr == (OS_EVENT *)0) {
+       *perr = DHCPc_OS_ERR_INIT_SIGNAL;
+        return;
+    }
+
+#if (((OS_VERSION >= 288) && (OS_EVENT_NAME_EN   >  0)) || \
+     ((OS_VERSION <  288) && (OS_EVENT_NAME_SIZE >= DHCPc_OBJ_NAME_SIZE_MAX)))
+    OSEventNameSet((OS_EVENT *) DHCPc_OS_InitSignalPtr,
+                   (INT8U    *) DHCPc_OS_INIT_NAME,
+                   (INT8U    *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_SIGNAL_NAME;
+        return;
+    }
+#endif
+
+                                                                /* --------------- INITIALIZE DHCPc LOCK -------------- */
+                                                                /* Create DHCPc lock signal ...                         */
+    DHCPc_OS_LockPtr = OSSemCreate((INT16U)1);                  /* ... with DHCPc access available (see Note #1b1).     */
+    if (DHCPc_OS_LockPtr == (OS_EVENT *)0) {
+       *perr = DHCPc_OS_ERR_INIT_LOCK;
+        return;
+    }
+
+#if (((OS_VERSION >= 288) && (OS_EVENT_NAME_EN   >  0)) || \
+     ((OS_VERSION <  288) && (OS_EVENT_NAME_SIZE >= DHCPc_OBJ_NAME_SIZE_MAX)))
+    OSEventNameSet((OS_EVENT *) DHCPc_OS_LockPtr,
+                   (INT8U    *) DHCPc_OS_LOCK_NAME,
+                   (INT8U    *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_LOCK_NAME;
+        return;
+    }
+#endif
+
+
+                                                                /* ---------- INITIALIZE DHCPc MESSAGE QUEUE ---------- */
+    DHCPc_OS_MsgQPtr = OSQCreate(&DHCPc_OS_MsgQ[0],             /* Create DHCPc message queue (see Note #1c).           */
+                                  DHCPc_OS_SIZE_Q);
+    if (DHCPc_OS_MsgQPtr == (OS_EVENT *)0) {
+       *perr = DHCPc_OS_ERR_INIT_Q;
+        return;
+    }
+
+#if (((OS_VERSION >= 288) && (OS_EVENT_NAME_EN   >  0)) || \
+     ((OS_VERSION <  288) && (OS_EVENT_NAME_SIZE >= DHCPc_OBJ_NAME_SIZE_MAX)))
+    OSEventNameSet((OS_EVENT *) DHCPc_OS_MsgQPtr,
+                   (INT8U    *) DHCPc_OS_Q_NAME,
+                   (INT8U    *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_Q_NAME;
+        return;
+    }
+#endif
+
+
+   *perr = DHCPc_OS_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_InitWait()
+*
+* Description : Wait on signal indicating DHCPc initialization is complete.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               Initialization signal     received.
+*                               DHCPc_OS_ERR_INIT               Initialization signal NOT received.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TaskHandler(),
+*               DHCPc_TmrTaskHandler().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc initialization signal MUST be acquired--i.e. MUST wait for access; do NOT timeout.
+*
+*                   (a) Failure to acquire signal will prevent DHCPc task(s) from running.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_InitWait (DHCPc_ERR  *perr)
+{
+    INT8U  os_err;
+
+
+    OSSemPend((OS_EVENT *) DHCPc_OS_InitSignalPtr,              /* Wait until DHCPc initialization completes ...        */
+              (INT16U    ) 0,                                   /* ... without timeout (see Note #1).                   */
+              (INT8U    *)&os_err);
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_PEVENT_NULL:
+        case OS_ERR_EVENT_TYPE:
+        case OS_ERR_PEND_ISR:
+        case OS_ERR_PEND_LOCKED:
+        case OS_ERR_PEND_ABORT:
+        case OS_ERR_TIMEOUT:
+        default:
+            *perr = DHCPc_OS_ERR_INIT;                          /* See Note #1a.                                        */
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc_OS_InitSignal()
+*
+* Description : Signal that DHCPc initialization is complete.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc initialization     successfully signaled.
+*                               DHCPc_OS_ERR_INIT_SIGNALD       DHCPc initialization NOT successfully signaled.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Init().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc initialization MUST be signaled--i.e. MUST signal without failure.
+*
+*                   (a) Failure to signal will prevent DHCPc task(s) from running.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_InitSignal (DHCPc_ERR  *perr)
+{
+    INT8U  os_err;
+
+
+    os_err = OSSemPost(DHCPc_OS_InitSignalPtr);                 /* Signal DHCPc initialization complete.                */
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_PEVENT_NULL:
+        case OS_ERR_EVENT_TYPE:
+        case OS_ERR_SEM_OVF:
+        default:
+            *perr = DHCPc_OS_ERR_INIT_SIGNALD;                  /* See Note #1a.                                        */
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   DHCPc LOCK MANAGEMENT FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_OS_Lock()
+*
+* Description : Acquire mutually exclusive access to DHCP client.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc access     acquired.
+*                               DHCPc_OS_ERR_LOCK               DHCPc access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL DHCP client function & SHOULD NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc access MUST be acquired--i.e. MUST wait for access; do NOT timeout.
+*
+*                   (a) Failure to acquire DHCPc access will prevent DHCPc task(s)/operation(s) from
+*                       functioning.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_Lock (DHCPc_ERR  *perr)
+{
+    INT8U  os_err;
+
+
+    OSSemPend((OS_EVENT *) DHCPc_OS_LockPtr,                    /* Acquire DHCPc access ...                             */
+              (INT16U    ) 0,                                   /* ... without timeout (see Note #1).                   */
+              (INT8U    *)&os_err);
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_PEVENT_NULL:
+        case OS_ERR_EVENT_TYPE:
+        case OS_ERR_PEND_ISR:
+        case OS_ERR_PEND_LOCKED:
+        case OS_ERR_PEND_ABORT:
+        case OS_ERR_TIMEOUT:
+        default:
+            *perr = DHCPc_OS_ERR_LOCK;                          /* See Note #1a.                                        */
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DHCPc_OS_Unlock()
+*
+* Description : Release mutually exclusive access to DHCP client.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL DHCP client function & SHOULD NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc access MUST be released--i.e. MUST unlock access without failure.
+*
+*                   (a) Failure to release DHCPc access will prevent DHCPc task(s)/operation(s) from
+*                       functioning.  Thus DHCPc access is assumed to be successfully released since
+*                       NO uC/OS-II error handling could be performed to counteract failure.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_Unlock (void)
+{
+   (void)OSSemPost(DHCPc_OS_LockPtr);                           /* Release DHCPc access (see Note #1).                  */
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   DHCPc TASK MANAGEMENT FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_TaskInit()
+*
+* Description : (1) Perform DHCPc Task/OS initialization :
+*
+*                   (a) Create DHCPc task
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc task/OS initialization successful.
+*                               DHCPc_OS_ERR_INIT_TASK          DHCPc task      NOT successfully initialized.
+*                               DHCPc_OS_ERR_INIT_TASK_NAME     DHCPc task name NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TmrInit().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+void  DHCPc_OS_TaskInit (DHCPc_ERR  *perr)
+{
+    INT8U  os_err;
+
+
+                                                                /* Create DHCPc_OS_Task().                              */
+#if (OS_TASK_CREATE_EXT_EN == 1)
+
+#if (OS_STK_GROWTH == 1)
+    os_err = OSTaskCreateExt((void (*)(void *)) DHCPc_OS_Task,
+                             (void          * ) 0,
+                             (OS_STK        * )&DHCPc_OS_TaskStk[DHCPc_OS_CFG_TASK_STK_SIZE - 1],
+                             (INT8U           ) DHCPc_OS_CFG_TASK_PRIO,
+                             (INT16U          ) DHCPc_OS_CFG_TASK_PRIO,         /* Set task id same as task prio.       */
+                             (OS_STK        * )&DHCPc_OS_TaskStk[0],
+                             (INT32U          ) DHCPc_OS_CFG_TASK_STK_SIZE,
+                             (void          * ) 0,
+                             (INT16U          )(OS_TASK_OPT_STK_CLR | OS_TASK_OPT_STK_CHK));
+#else
+    os_err = OSTaskCreateExt((void (*)(void *)) DHCPc_OS_Task,
+                             (void          * ) 0,
+                             (OS_STK        * )&DHCPc_OS_TaskStk[0],
+                             (INT8U           ) DHCPc_OS_CFG_TASK_PRIO,
+                             (INT16U          ) DHCPc_OS_CFG_TASK_PRIO,         /* Set task id same as task prio.       */
+                             (OS_STK        * )&DHCPc_OS_TaskStk[DHCPc_OS_CFG_TASK_STK_SIZE - 1],
+                             (INT32U          ) DHCPc_OS_CFG_TASK_STK_SIZE,
+                             (void          * ) 0,
+                             (INT16U          )(OS_TASK_OPT_STK_CLR | OS_TASK_OPT_STK_CHK));
+#endif
+
+#else
+
+#if (OS_STK_GROWTH == 1)
+    os_err = OSTaskCreate((void (*)(void *)) DHCPc_OS_Task,
+                          (void          * ) 0,
+                          (OS_STK        * )&DHCPc_OS_TaskStk[DHCPc_OS_CFG_TASK_STK_SIZE - 1],
+                          (INT8U           ) DHCPc_OS_CFG_TASK_PRIO);
+#else
+    os_err = OSTaskCreate((void (*)(void *)) DHCPc_OS_Task,
+                          (void          * ) 0,
+                          (OS_STK        * )&DHCPc_OS_TaskStk[0],
+                          (INT8U           ) DHCPc_OS_CFG_TASK_PRIO);
+#endif
+
+#endif
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_TASK;
+        return;
+    }
+
+
+#if (((OS_VERSION >= 288) && (OS_EVENT_NAME_EN   >  0)) || \
+     ((OS_VERSION <  288) && (OS_EVENT_NAME_SIZE >= DHCPc_OS_TASK_NAME_SIZE_MAX)))
+    OSTaskNameSet((INT8U  ) DHCPc_OS_CFG_TASK_PRIO,             /* Set the name of the task.                            */
+                  (INT8U *) DHCPc_OS_TASK_NAME,
+                  (INT8U *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_TASK_NAME;
+        return;
+    }
+#endif
+
+
+   *perr = DHCPc_OS_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_OS_Task()
+*
+* Description : OS-dependent shell task to run DHCPc task.
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-II).
+*
+* Return(s)   : none.
+*
+* Created by  : DHCPc_OS_TaskInit().
+*
+* Note(s)     : (1) DHCPc_OS_Task() blocked until DHCPc initialization completes.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_OS_Task (void  *p_data)
+{
+   (void)&p_data;                                               /* Prevent 'variable unused' compiler warning.          */
+
+
+    while (DEF_ON) {
+        DHCPc_TaskHandler();
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                 DHCPc MESSAGE MANAGEMENT FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_MsgWait()
+*
+* Description : Wait on message indicating DHCP action to be performed on an interface.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               Message received.
+*                               DHCPc_OS_ERR_MSG_Q              Message NOT received.
+*
+* Return(s)   : Pointer to received message, if no error.
+*
+*               Pointer to NULL,             otherwise.
+*
+* Caller(s)   : DHCPc_TaskHandler().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc message from timer MUST be acquired--i.e. MUST wait for message; do NOT timeout.
+*********************************************************************************************************
+*/
+
+void  *DHCPc_OS_MsgWait (DHCPc_ERR  *perr)
+{
+    void   *p_msg;
+    INT8U   os_err;
+
+
+    p_msg = OSQPend((OS_EVENT *) DHCPc_OS_MsgQPtr,              /* Wait on DHCPc queue ...                              */
+                    (INT16U    ) 0,                             /* ... without timeout (see Note #1).                   */
+                    (INT8U    *)&os_err);
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_PEVENT_NULL:
+        case OS_ERR_EVENT_TYPE:
+        case OS_ERR_PEND_ISR:
+        case OS_ERR_PEND_LOCKED:
+        case OS_ERR_PEND_ABORT:
+        case OS_ERR_TIMEOUT:
+        default:
+            *perr = DHCPc_OS_ERR_MSG_Q;
+             break;
+    }
+
+    return (p_msg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_MsgPost()
+*
+* Description : Post a message indicating DHCP action to be performed on an interface.
+*
+* Argument(s) : pmsg            Pointer to message to post.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               Message     successfully posted.
+*                               DHCPc_OS_ERR_MSG_Q              Message NOT successfully posted.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TmrTaskHandler(),
+*               DHCPc_Start(),
+*               DHCPc_Stop().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_MsgPost (void       *pmsg,
+                        DHCPc_ERR  *perr)
+{
+    INT8U  os_err;
+
+
+    os_err = OSQPost(DHCPc_OS_MsgQPtr, pmsg);                   /* Post message to message queue.                       */
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_Q_FULL:
+        case OS_ERR_EVENT_TYPE:
+        case OS_ERR_PEVENT_NULL:
+        default:
+            *perr = DHCPc_OS_ERR_MSG_Q;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                  DHCPc TIMER MANAGEMENT FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_TmrInit()
+*
+* Description : (1) Perform DHCPc Timer/OS initialization :
+*
+*                   (a) Create DHCPc timer
+*                   (b) Create DHCPc timer signal
+*                   (c) Create DHCPc timer task
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE                   DHCPc timer/OS initialization successful.
+*
+*                               DHCPc_OS_ERR_INIT_TMR               DHCPc timer                NOT successfully
+*                                                                       initialized.
+*
+*                               DHCPc_OS_ERR_INIT_TMR_SIGNAL        DHCPc timer    signal      NOT successfully
+*                                                                       initialized.
+*                               DHCPc_OS_ERR_INIT_TMR_SIGNAL_NAME   DHCPc timer    signal name NOT successfully
+*                                                                       initialized.
+*
+*                               DHCPc_OS_ERR_INIT_TMR_TASK          DHCPc timer    task        NOT successfully
+*                                                                       initialized.
+*                               DHCPc_OS_ERR_INIT_TMR_TASK_NAME     DHCPc timer    task name   NOT successfully
+*                                                                       configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TmrInit().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) The DHCPc timer's primary purpose is to schedule & run DHCPc_TmrTaskHandler(); the
+*                   timer should have DHCPc_TmrTaskHandler() execute at every DHCPc_OS_TMR_PERIOD_SEC
+*                   seconds forever (i.e. timer should NEVER stop running), and is doing that by signaling
+*                   a semaphore which is being pended on by the DHCPc timer task.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_TmrInit (DHCPc_ERR  *perr)
+{
+    INT8U  os_err;
+
+
+                                                                /* ----------------- CREATE DHCPc TMR ----------------- */
+    DHCPc_OS_TmrPtr = OSTmrCreate((INT32U         ) 0,
+                                  (INT32U         ) DHCPc_OS_TMR_PERIOD_TMR_TICK,
+                                  (INT8U          ) OS_TMR_OPT_PERIODIC,
+                                  (OS_TMR_CALLBACK) DHCPc_OS_TmrCallback,
+                                  (void          *) 0,
+                                  (INT8U         *) DHCPc_OS_TMR_NAME,
+                                  (INT8U         *)&os_err);
+    if (DHCPc_OS_TmrPtr == (OS_TMR *)0) {
+       *perr = DHCPc_OS_ERR_INIT_TMR;
+        return;
+    }
+
+
+                                                                /* ------------- CREATE DHCPc TMR SIGNAL -------------- */
+    DHCPc_OS_TmrSignalPtr = OSSemCreate((INT16U)0);
+    if (DHCPc_OS_TmrSignalPtr == (OS_EVENT *)0) {
+       *perr = DHCPc_OS_ERR_INIT_TMR_SIGNAL;
+        return;
+    }
+
+#if (((OS_VERSION >= 288) && (OS_EVENT_NAME_EN   >  0)) || \
+     ((OS_VERSION <  288) && (OS_EVENT_NAME_SIZE >= DHCPc_OBJ_NAME_SIZE_MAX)))
+    OSEventNameSet((OS_EVENT *) DHCPc_OS_TmrSignalPtr,
+                   (INT8U    *) DHCPc_OS_TMR_SIGNAL_NAME,
+                   (INT8U    *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_TMR_SIGNAL_NAME;
+        return;
+    }
+#endif
+
+
+                                                                /* -------------- CREATE DHCPc TMR TASK --------------- */
+#if (OS_TASK_CREATE_EXT_EN == 1)
+
+#if (OS_STK_GROWTH == 1)
+    os_err = OSTaskCreateExt((void (*)(void *)) DHCPc_OS_TmrTask,
+                             (void          * ) 0,
+                             (OS_STK        * )&DHCPc_OS_TmrTaskStk[DHCPc_OS_CFG_TMR_TASK_STK_SIZE - 1],
+                             (INT8U           ) DHCPc_OS_CFG_TMR_TASK_PRIO,
+                             (INT16U          ) DHCPc_OS_CFG_TMR_TASK_PRIO,     /* Set task id same as task prio.       */
+                             (OS_STK        * )&DHCPc_OS_TmrTaskStk[0],
+                             (INT32U          ) DHCPc_OS_CFG_TMR_TASK_STK_SIZE,
+                             (void          * ) 0,
+                             (INT16U          )(OS_TASK_OPT_STK_CLR | OS_TASK_OPT_STK_CHK));
+#else
+    os_err = OSTaskCreateExt((void (*)(void *)) DHCPc_OS_TmrTask,
+                             (void          * ) 0,
+                             (OS_STK        * )&DHCPc_OS_TmrTaskStk[0],
+                             (INT8U           ) DHCPc_OS_CFG_TMR_TASK_PRIO,
+                             (INT16U          ) DHCPc_OS_CFG_TMR_TASK_PRIO,     /* Set task id same as task prio.       */
+                             (OS_STK        * )&DHCPc_OS_TmrTaskStk[DHCPc_OS_CFG_TMR_TASK_STK_SIZE - 1],
+                             (INT32U          ) DHCPc_OS_CFG_TMR_TASK_STK_SIZE,
+                             (void          * ) 0,
+                             (INT16U          )(OS_TASK_OPT_STK_CLR | OS_TASK_OPT_STK_CHK));
+#endif
+
+#else
+
+#if (OS_STK_GROWTH == 1)
+    os_err = OSTaskCreate((void (*)(void *)) DHCPc_OS_TmrTask,
+                          (void          * ) 0,
+                          (OS_STK        * )&DHCPc_OS_TmrTaskStk[DHCPc_OS_CFG_TMR_TASK_STK_SIZE - 1],
+                          (INT8U           ) DHCPc_OS_CFG_TMR_TASK_PRIO);
+#else
+    os_err = OSTaskCreate((void (*)(void *)) DHCPc_OS_TmrTask,
+                          (void          * ) 0,
+                          (OS_STK        * )&DHCPc_OS_TmrTaskStk[0],
+                          (INT8U           ) DHCPc_OS_CFG_TMR_TASK_PRIO);
+#endif
+
+#endif
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_TMR_TASK;
+        return;
+    }
+
+
+#if (((OS_VERSION >= 288) && (OS_EVENT_NAME_EN   >  0)) || \
+     ((OS_VERSION <  288) && (OS_EVENT_NAME_SIZE >= DHCPc_OS_TASK_NAME_SIZE_MAX)))
+    OSTaskNameSet((INT8U  ) DHCPc_OS_CFG_TMR_TASK_PRIO,         /* Set the name of the task.                            */
+                  (INT8U *) DHCPc_OS_TMR_TASK_NAME,
+                  (INT8U *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_TMR_TASK_NAME;
+        return;
+    }
+#endif
+
+
+   *perr = DHCPc_OS_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_TmrTask()
+*
+* Description : OS-dependent shell task to run DHCPc timer task.
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-II).
+*
+* Return(s)   : none.
+*
+* Created by  : DHCPc_OS_TmrInit().
+*
+* Note(s)     : (1) DHCPc_OS_TmrTask() blocked until DHCPc initialization completes.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_OS_TmrTask (void  *p_data)
+{
+   (void)&p_data;                                               /* Prevent 'variable unused' compiler warning.          */
+
+
+    while (DEF_ON) {
+        DHCPc_TmrTaskHandler();
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_TmrStart()
+*
+* Description : Start the DHCPc Timer.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc timer     successfully started.
+*                               DHCPc_OS_ERR_TMR                DHCPc timer NOT successfully started.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Init().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) The DHCPc timer MUST have been previously created by calling DHCPc_OS_TmrInit().
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_TmrStart (DHCPc_ERR  *perr)
+{
+    BOOLEAN  tmr_started;
+    INT8U    os_err;
+
+
+    tmr_started = OSTmrStart(DHCPc_OS_TmrPtr, &os_err);
+    if (tmr_started != OS_TRUE) {
+       *perr = DHCPc_OS_ERR_TMR;
+        return;
+    }
+
+   *perr = DHCPc_OS_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       DHCPc_OS_TmrCallback()
+*
+* Description : DHCPc Timer callback function.
+*
+* Argument(s) : p_tmr       Pointer to         expiring timer (ignored).
+*
+*               p_arg       Argument passed by expiring timer (none).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Expiring DHCPc_OS_TMR_NAME Timer.
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_OS_TmrCallback (void  *p_tmr,
+                                    void  *p_arg)
+{
+   (void)&p_tmr;                                                /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_arg;
+
+    DHCPc_OS_TmrSignal();                                       /* Signal DHCPc timer expired.                          */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_TmrWait()
+*
+* Description : Wait on signal indicating DHCPc timer expired.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               Timer signal     received.
+*                               DHCPc_OS_ERR_TMR                Timer signal NOT received.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TmrTaskHandler().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc timer signal MUST be acquired--i.e. MUST wait for access; do NOT timeout.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_TmrWait (DHCPc_ERR  *perr)
+{
+    INT8U  os_err;
+
+
+    OSSemPend((OS_EVENT *) DHCPc_OS_TmrSignalPtr,               /* Wait until DHCPc timer expires ...                   */
+              (INT16U    ) 0,                                   /* ... without timeout (see Note #1).                   */
+              (INT8U    *)&os_err);
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_PEVENT_NULL:
+        case OS_ERR_EVENT_TYPE:
+        case OS_ERR_PEND_ISR:
+        case OS_ERR_PEND_LOCKED:
+        case OS_ERR_PEND_ABORT:
+        case OS_ERR_TIMEOUT:
+        default:
+            *perr = DHCPc_OS_ERR_TMR;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc_OS_TmrSignal()
+*
+* Description : Signal that DHCPc timer expired.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_OS_TmrCallback().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc timer MUST be signaled--i.e. MUST signal without failure.
+*
+*                   (a) Failure to signal will prevent DHCPc timer task from running.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_TmrSignal (void)
+{
+   (void)OSSemPost(DHCPc_OS_TmrSignalPtr);                      /* Signal DHCPc timer expired (see Note #1).            */
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       DHCPc/OS TIME FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       DHCPc_OS_TimeGet_tick()
+*
+* Description : Get the current time value.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Number of clock ticks elapsed since OS startup.
+*
+* Caller(s)   : DHCPc_TxMsgPrepare(),
+*               DHCPc_LeaseTimeCalc(),
+*               DHCPc_TmrTaskHandler().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) The value returned by this function OS configuration dependent (number of ticks per
+*                   second), and hence cannot be interpreted directly by the caller.
+*
+*                   See 'DHCPc_OS_TimeCalcElapsed_sec()' for useful usage.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  DHCPc_OS_TimeGet_tick (void)
+{
+    INT32U  time_cur;
+
+
+    time_cur = OSTimeGet();
+
+    return ((CPU_INT32U)time_cur);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   DHCPc_OS_TimeCalcElapsed_sec()
+*
+* Description : Calculate the number of seconds elapsed between start and stop time.
+*
+* Argument(s) : time_start      Start time (in clock ticks).
+*
+*               time_stop       Stop  time (in clock ticks).
+*
+* Return(s)   : Number of seconds elapsed, if NO errors.
+*
+*               0,                         otherwise.
+*
+* Caller(s)   : DHCPc_LeaseTimeCalc().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) The values of the 'time_start' & 'time_stop' parameters are obtained from a call to
+*                   DHCPc_OS_TimeGet_tick().  Those values are clock tick dependent, and are converted
+*                   in units of seconds by this function.
+*
+*               (2) Elapsed time delta calculation adjusts ONLY for a single overflow time ticks.  Thus
+*                   if elapsed time is greater than the maximum 32-bit overflow threshold, then elapsed
+*                   time will incorrectly calculate a lower elaspsed time.  However, this should NEVER
+*                   occur since the maximum 32-bit overflow threshold for times measured in seconds is
+*                   136.2 years.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  DHCPc_OS_TimeCalcElapsed_sec (CPU_INT32U  time_start,
+                                          CPU_INT32U  time_stop)
+{
+#if (OS_TICKS_PER_SEC > 0u)
+    CPU_INT32U  time_delta_tick;
+    CPU_INT32U  time_sec;
+
+                                                                /* Calculate delta time (in ticks) [see Note #2].       */
+    if (time_start <= time_stop) {
+        time_delta_tick = time_stop - time_start;
+    } else {                                                    /* If stop time > start time, adjust for tick overflow. */
+        time_delta_tick = ((DEF_INT_32U_MAX_VAL - time_start) + 1u) + time_stop;
+    }
+
+    time_sec = time_delta_tick / OS_TICKS_PER_SEC;              /* Calculate time (in seconds).                         */
+
+    return (time_sec);
+
+#else
+   (void)&time_start;                                           /* Prevent 'variable unused' compiler warnings.         */
+   (void)&time_stop;
+
+    return (0u);
+#endif
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DHCPc/OS/uCOS-III/dhcp-c_os.c b/src/ucos_v1_42/micrium_source/uC-DHCPc/OS/uCOS-III/dhcp-c_os.c
new file mode 100644
index 0000000..d38d5da
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DHCPc/OS/uCOS-III/dhcp-c_os.c
@@ -0,0 +1,1162 @@
+/*
+*********************************************************************************************************
+*                                               uC/DHCPc
+*                              Dynamic Host Configuration Protocol Client
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DHCP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 DHCP CLIENT OPERATING SYSTEM LAYER
+*
+*                                          Micrium uC/OS-III
+*
+* Filename      : dhcp-c_os.c
+* Version       : V2.10.00
+* Programmer(s) : SR
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/OS-III V3.01.0 (or more recent version) is included in the project build.
+*
+*                 (2) REQUIREs the following uC/OS-III feature(s) to be ENABLED :
+*
+*                         ------ FEATURE ------     --------- MINIMUM CONFIGURATION FOR DHCPc/OS PORT ---------
+*
+*                     (a) Semaphores
+*                         (1) OS_CFG_SEM_EN         Enabled
+*                         (2) OS_CFG_SEM_SET_EN     Enabled
+*
+*                     (b) Timers
+*                         (1) OS_CFG_TMR_EN         Enabled
+*
+*                     (c) Message Queues
+*                         (1) OS_CFG_TASK_Q_EN      Enabled
+*
+*                     (d) Messages                  OS_CFG_MSG_POOL_SIZE/OSCfg_MsgPoolSize >= DHCPc_OS_NBR_MSGS
+*                                                       (see 'OS OBJECT DEFINES')
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+
+#include  "../../Source/dhcp-c.h"
+#include                                           /* See this 'dhcp-c_os.c  Note #1'.                     */
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     OS TASK/OBJECT NAME DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- TASK NAMES -------------------- */
+                                          /*           1         2 */
+                                          /* 012345678901234567890 */
+#define  DHCPc_OS_TASK_NAME                 "DHCPc Task"
+#define  DHCPc_OS_TMR_TASK_NAME             "DHCPc Tmr Task"
+
+
+                                                                /* -------------------- OBJ NAMES --------------------- */
+                                          /*           1         2 */
+                                          /* 012345678901234567890 */
+#define  DHCPc_OS_INIT_NAME                 "DHCPc Init Signal"
+#define  DHCPc_OS_LOCK_NAME                 "DHCPc Global Lock"
+#define  DHCPc_OS_TMR_NAME                  "DHCPc Tmr"
+#define  DHCPc_OS_TMR_SIGNAL_NAME           "DHCPc Tmr Signal"
+#define  DHCPc_OS_Q_NAME                    "DHCPc Msg Q"
+
+
+/*
+*********************************************************************************************************
+*                                          OS OBJECT DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* 1 msg per IF.                                        */
+#define  DHCPc_OS_NBR_MSGS                             (DHCPc_CFG_MAX_NBR_IF * DHCPc_COMM_MSG_MAX_NBR)
+
+
+/*
+*********************************************************************************************************
+*                                          OS TIMER DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* Period of DHCPc tmr in tmr tick.                     */
+#define  DHCPc_OS_TMR_PERIOD_TMR_TICK                  (DHCPc_TMR_PERIOD_SEC * OSCfg_TmrTaskRate_Hz)
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- TASK TCBs --------------------- */
+static  OS_TCB   DHCPc_OS_TaskTCB;
+static  OS_TCB   DHCPc_OS_TmrTaskTCB;
+
+
+                                                                /* --------------------- TASK STK --------------------- */
+static  CPU_STK  DHCPc_OS_TaskStk[DHCPc_OS_CFG_TASK_STK_SIZE];
+static  CPU_STK  DHCPc_OS_TmrTaskStk[DHCPc_OS_CFG_TMR_TASK_STK_SIZE];
+
+
+                                                                /* ----------------- LOCKS & SIGNALS ------------------ */
+static  OS_SEM   DHCPc_OS_InitSignalObj;
+static  OS_SEM   DHCPc_OS_LockObj;
+static  OS_SEM   DHCPc_OS_TmrSignalObj;
+
+
+                                                                /* ---------------------- TIMER ----------------------- */
+static  OS_TMR   DHCPc_OS_TmrObj;
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                /* ---------- DHCPc TASK MANAGEMENT FUNCTION ---------- */
+static  void  DHCPc_OS_Task       (void  *p_data);
+
+                                                                /* ------- DHCPc TIMER TASK MANAGEMENT FUNCTION ------- */
+static  void  DHCPc_OS_TmrTask    (void  *p_data);
+
+                                                                /* ---------- DHCPc TIMER CALLBACK FUNCTION ----------- */
+static  void  DHCPc_OS_TmrCallback(void  *p_tmr,
+                                   void  *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* See this 'dhcp-c_os.c  Note #1'.                     */
+#if     (OS_VERSION < 3010u)
+#error  "OS_VERSION                      [SHOULD be >= V3.01.0]"
+#endif
+
+
+
+                                                                /* See this 'dhcp-c_os.c  Note #2a'.                    */
+#if     (OS_CFG_SEM_EN < 1u)
+#error  "OS_CFG_SEM_EN                   illegally #define'd in 'os_cfg.h'             "
+#error  "                                [MUST be  > 0, (see 'dhcp-c_os.c  Note #2a1')]"
+#endif
+
+#if     (OS_CFG_SEM_SET_EN < 1u)
+#error  "OS_CFG_SEM_SET_EN               illegally #define'd in 'os_cfg.h'             "
+#error  "                                [MUST be  > 0, (see 'dhcp-c_os.c  Note #2a2')]"
+#endif
+
+
+
+                                                                /* See this 'dhcp-c_os.c  Note #2b'.                    */
+#if     (OS_CFG_TMR_EN < 1u)
+#error  "OS_CFG_TMR_EN                   illegally #define'd in 'os_cfg.h'             "
+#error  "                                [MUST be  > 0, (see 'dhcp-c_os.c  Note #2b1')]"
+#endif
+
+
+
+                                                                /* See this 'dhcp-c_os.c  Note #2c'.                    */
+#if     (OS_CFG_TASK_Q_EN < 1u)
+#error  "OS_CFG_TASK_Q_EN                illegally #define'd in 'os_cfg.h'             "
+#error  "                                [MUST be  > 0, (see 'dhcp-c_os.c  Note #2c1')]"
+#endif
+
+
+
+
+#ifndef  DHCPc_OS_CFG_TASK_PRIO
+#error  "DHCPc_OS_CFG_TASK_PRIO                not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  >= 0]                      "
+#elif   (DHCPc_OS_CFG_TASK_PRIO < 0u)
+#error  "DHCPc_OS_CFG_TASK_PRIO          illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  >= 0]                      "
+#endif
+
+#ifndef  DHCPc_OS_CFG_TMR_TASK_PRIO
+#error  "DHCPc_OS_CFG_TMR_TASK_PRIO            not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  >= 0]                      "
+#elif   (DHCPc_OS_CFG_TMR_TASK_PRIO < 0u)
+#error  "DHCPc_OS_CFG_TMR_TASK_PRIO      illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  >= 0]                      "
+#endif
+
+
+
+#ifndef  DHCPc_OS_CFG_TASK_STK_SIZE
+#error  "DHCPc_OS_CFG_TASK_STK_SIZE            not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  > 0]                    "
+#elif   (DHCPc_OS_CFG_TASK_STK_SIZE < 1u)
+#error  "DHCPc_OS_CFG_TASK_STK_SIZE      illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  > 0]                       "
+#endif
+
+#ifndef  DHCPc_OS_CFG_TMR_TASK_STK_SIZE
+#error  "DHCPc_OS_CFG_TMR_TASK_STK_SIZE        not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  > 0]                       "
+#elif   (DHCPc_OS_CFG_TMR_TASK_STK_SIZE < 1u)
+#error  "DHCPc_OS_CFG_TMR_TASK_STK_SIZE  illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                [MUST be  > 0]                       "
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   DHCPc INITIALIZATION FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_OS_Init()
+*
+* Description : (1) Perform DHCPc/OS initialization :
+*
+*                   (a) Implement DHCPc initialization signal by creating a counting semaphore.
+*
+*                       (1) Initialize DHCPc initialization signal with no signal by setting the
+*                           semaphore count to 0 to block the semaphore.
+*
+*                   (b) Implement global DHCPc lock by creating a binary semaphore.
+*
+*                       (1) Initialize DHCPc lock as released by setting the semaphore count to 1.
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc/OS initialization successful.
+*
+*                               DHCPc_OS_ERR_INIT_SIGNAL        DHCPc    initialization signal
+*                                                                   NOT successfully initialized.
+*                               DHCPc_OS_ERR_INIT_LOCK          DHCPc    lock           signal
+*                                                                   NOT successfully initialized.
+*
+*                               DHCPc_OS_ERR_CFG                DHCPc/OS configuration invalid.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Init().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_Init (DHCPc_ERR  *perr)
+{
+    OS_ERR  os_err;
+
+
+                                                                /* --------- VALIDATE DHCPc/OS CONFIGURATION ---------- */
+    if (OSCfg_MsgPoolSize < DHCPc_OS_NBR_MSGS) {                /* See this 'dhcp-c_os.c  Note #2d'.                    */
+       *perr = DHCPc_OS_ERR_CFG;
+        return;
+    }
+
+
+                                                                /* -------------- INITIALIZE DHCPc SIGNAL ------------- */
+    OSSemCreate((OS_SEM   *)&DHCPc_OS_InitSignalObj,            /* Create DHCPc initialization signal ...               */
+                (CPU_CHAR *) DHCPc_OS_INIT_NAME,
+                (OS_SEM_CTR) 0u,                                /* ... with NO DHCPc tasks signaled (see Note #1a1).    */
+                (OS_ERR   *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_SIGNAL;
+        return;
+    }
+
+
+                                                                /* --------------- INITIALIZE DHCPc LOCK -------------- */
+    OSSemCreate((OS_SEM   *)&DHCPc_OS_LockObj,                  /* Create DHCPc lock signal ...                         */
+                (CPU_CHAR *) DHCPc_OS_LOCK_NAME,
+                (OS_SEM_CTR) 1u,                                /* ... with DHCPc access available (see Note #1b1).     */
+                (OS_ERR   *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_LOCK;
+        return;
+    }
+
+
+   *perr = DHCPc_OS_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_InitWait()
+*
+* Description : Wait on signal indicating DHCPc initialization is complete.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               Initialization signal     received.
+*                               DHCPc_OS_ERR_INIT               Initialization signal NOT received.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TaskHandler(),
+*               DHCPc_TmrTaskHandler().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc initialization signal MUST be acquired--i.e. MUST wait for access; do NOT timeout.
+*
+*                   (a) Failure to acquire signal will prevent DHCPc task(s) from running.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_InitWait (DHCPc_ERR  *perr)
+{
+    OS_ERR  os_err;
+
+
+   (void)OSSemPend((OS_SEM *)&DHCPc_OS_InitSignalObj,           /* Wait until DHCPc initialization completes ...        */
+                   (OS_TICK ) 0u,                               /* ... without timeout (see Note #1).                   */
+                   (OS_OPT  ) OS_OPT_PEND_BLOCKING,
+                   (CPU_TS *) 0,
+                   (OS_ERR *)&os_err);
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_OBJ_PTR_NULL:
+        case OS_ERR_OBJ_TYPE:
+        case OS_ERR_OBJ_DEL:
+        case OS_ERR_OPT_INVALID:
+        case OS_ERR_PEND_ISR:
+        case OS_ERR_PEND_ABORT:
+        case OS_ERR_PEND_WOULD_BLOCK:
+        case OS_ERR_STATUS_INVALID:
+        case OS_ERR_SCHED_LOCKED:
+        case OS_ERR_TIMEOUT:
+        default:
+            *perr = DHCPc_OS_ERR_INIT;                          /* See Note #1a.                                        */
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc_OS_InitSignal()
+*
+* Description : Signal that DHCPc initialization is complete.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc initialization     successfully signaled.
+*                               DHCPc_OS_ERR_INIT_SIGNALD       DHCPc initialization NOT successfully signaled.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Init().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc initialization MUST be signaled--i.e. MUST signal without failure.
+*
+*                   (a) Failure to signal will prevent DHCPc task(s) from running.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_InitSignal (DHCPc_ERR  *perr)
+{
+    OS_ERR  os_err;
+
+
+   (void)OSSemPost((OS_SEM *)&DHCPc_OS_InitSignalObj,           /* Signal DHCPc initialization complete.                */
+                   (OS_OPT  ) OS_OPT_POST_1,
+                   (OS_ERR *)&os_err);
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_OBJ_PTR_NULL:
+        case OS_ERR_OBJ_TYPE:
+        case OS_ERR_SEM_OVF:
+        case OS_ERR_INT_Q_FULL:
+        default:
+            *perr = DHCPc_OS_ERR_INIT_SIGNALD;                  /* See Note #1a.                                        */
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   DHCPc LOCK MANAGEMENT FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_OS_Lock()
+*
+* Description : Acquire mutually exclusive access to DHCP client.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc access     acquired.
+*                               DHCPc_OS_ERR_LOCK               DHCPc access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL DHCP client function & SHOULD NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc access MUST be acquired--i.e. MUST wait for access; do NOT timeout.
+*
+*                   (a) Failure to acquire DHCPc access will prevent DHCPc task(s)/operation(s) from
+*                       functioning.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_Lock (DHCPc_ERR  *perr)
+{
+    OS_ERR  os_err;
+
+
+   (void)OSSemPend((OS_SEM *)&DHCPc_OS_LockObj,                 /* Acquire DHCPc access ...                             */
+                   (OS_TICK ) 0u,                               /* ... without timeout (see Note #1).                   */
+                   (OS_OPT  ) OS_OPT_PEND_BLOCKING,
+                   (CPU_TS *) 0,
+                   (OS_ERR *)&os_err);
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_OBJ_PTR_NULL:
+        case OS_ERR_OBJ_TYPE:
+        case OS_ERR_OBJ_DEL:
+        case OS_ERR_OPT_INVALID:
+        case OS_ERR_PEND_ISR:
+        case OS_ERR_PEND_ABORT:
+        case OS_ERR_PEND_WOULD_BLOCK:
+        case OS_ERR_STATUS_INVALID:
+        case OS_ERR_SCHED_LOCKED:
+        case OS_ERR_TIMEOUT:
+        default:
+            *perr = DHCPc_OS_ERR_LOCK;                          /* See Note #1a.                                        */
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DHCPc_OS_Unlock()
+*
+* Description : Release mutually exclusive access to DHCP client.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL DHCP client function & SHOULD NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc access MUST be released--i.e. MUST unlock access without failure.
+*
+*                   (a) Failure to release DHCPc access will prevent DHCPc task(s)/operation(s) from
+*                       functioning.  Thus DHCPc access is assumed to be successfully released since
+*                       NO uC/OS-III error handling could be performed to counteract failure.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_Unlock (void)
+{
+    OS_ERR  os_err;
+
+
+   (void)OSSemPost((OS_SEM *)&DHCPc_OS_LockObj,                 /* Release DHCPc access.                                */
+                   (OS_OPT  ) OS_OPT_POST_1,
+                   (OS_ERR *)&os_err);
+
+   (void)&os_err;                                               /* See Note #1a.                                        */
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   DHCPc TASK MANAGEMENT FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_TaskInit()
+*
+* Description : (1) Perform DHCPc Task/OS initialization :
+*
+*                   (a) Create DHCPc task
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc task/OS initialization successful.
+*                               DHCPc_OS_ERR_INIT_TASK          DHCPc task NOT successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TmrInit().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_TaskInit (DHCPc_ERR  *perr)
+{
+    OS_ERR  os_err;
+
+
+                                                                /* Create DHCPc task.                                   */
+    OSTaskCreate((OS_TCB     *)&DHCPc_OS_TaskTCB,
+                 (CPU_CHAR   *) DHCPc_OS_TASK_NAME,
+                 (OS_TASK_PTR ) DHCPc_OS_Task,
+                 (void       *) 0,
+                 (OS_PRIO     ) DHCPc_OS_CFG_TASK_PRIO,
+                 (CPU_STK    *)&DHCPc_OS_TaskStk[0],
+                 (CPU_STK_SIZE)(DHCPc_OS_CFG_TASK_STK_SIZE / 10u),
+                 (CPU_STK_SIZE) DHCPc_OS_CFG_TASK_STK_SIZE,
+                 (OS_MSG_QTY  ) DHCPc_OS_NBR_MSGS,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_TASK;
+        return;
+    }
+
+   *perr = DHCPc_OS_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_OS_Task()
+*
+* Description : OS-dependent shell task to run DHCPc task.
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-III).
+*
+* Return(s)   : none.
+*
+* Created by  : DHCPc_OS_TaskInit().
+*
+* Note(s)     : (1) DHCPc_OS_Task() blocked until DHCPc initialization completes.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_OS_Task (void  *p_data)
+{
+   (void)&p_data;                                               /* Prevent 'variable unused' compiler warning.          */
+
+
+    while (DEF_ON) {
+        DHCPc_TaskHandler();
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                 DHCPc MESSAGE MANAGEMENT FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_MsgWait()
+*
+* Description : Wait on message indicating DHCP action to be performed on an interface.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               Message received.
+*                               DHCPc_OS_ERR_MSG_Q              Message NOT received.
+*
+* Return(s)   : Pointer to received message, if no error.
+*
+*               Pointer to NULL,             otherwise.
+*
+* Caller(s)   : DHCPc_TaskHandler().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc message from timer MUST be acquired--i.e. MUST wait for message; do NOT timeout.
+*********************************************************************************************************
+*/
+
+void  *DHCPc_OS_MsgWait (DHCPc_ERR  *perr)
+{
+    void         *p_msg;
+    OS_MSG_SIZE   os_msg_size;
+    OS_ERR        os_err;
+
+                                                                /* Wait on DHCPc task queue ...                         */
+    p_msg = OSTaskQPend((OS_TICK      ) 0u,                     /* ... without timeout (see Note #1).                   */
+                        (OS_OPT       ) OS_OPT_PEND_BLOCKING,
+                        (OS_MSG_SIZE *)&os_msg_size,
+                        (CPU_TS      *) 0,
+                        (OS_ERR      *)&os_err);
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_Q_EMPTY:
+        case OS_ERR_TIMEOUT:
+        case OS_ERR_PEND_ISR:
+        case OS_ERR_PEND_ABORT:
+        case OS_ERR_PEND_WOULD_BLOCK:
+        case OS_ERR_SCHED_LOCKED:
+        default:
+            *perr = DHCPc_OS_ERR_MSG_Q;
+             break;
+    }
+
+    return (p_msg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_MsgPost()
+*
+* Description : Post a message indicating DHCP action to be performed on an interface.
+*
+* Argument(s) : pmsg            Pointer to message to post.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               Message     successfully posted.
+*                               DHCPc_OS_ERR_MSG_Q              Message NOT successfully posted.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TmrTaskHandler(),
+*               DHCPc_Start(),
+*               DHCPc_Stop().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_MsgPost (void       *pmsg,
+                        DHCPc_ERR  *perr)
+{
+    OS_ERR  os_err;
+
+
+    OSTaskQPost((OS_TCB    *)&DHCPc_OS_TaskTCB,                 /* Post message to message queue.                       */
+                (void      *) pmsg,
+                (OS_MSG_SIZE) 0u,                               /* Message size ignored.                                */
+                (OS_OPT     ) OS_OPT_POST_FIFO,
+                (OS_ERR    *)&os_err);
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_Q_MAX:
+        case OS_ERR_MSG_POOL_EMPTY:
+        case OS_ERR_INT_Q_FULL:
+        case OS_ERR_STATE_INVALID:
+        default:
+            *perr = DHCPc_OS_ERR_MSG_Q;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                  DHCPc TIMER MANAGEMENT FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_TmrInit()
+*
+* Description : (1) Perform DHCPc Timer/OS initialization :
+*
+*                   (a) Create DHCPc timer
+*                   (b) Create DHCPc timer signal
+*                   (c) Create DHCPc timer task
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc timer/OS initialization successful.
+*                               DHCPc_OS_ERR_INIT_TMR           DHCPc timer        NOT successfully initialized.
+*                               DHCPc_OS_ERR_INIT_TMR_SIGNAL    DHCPc timer signal NOT successfully initialized.
+*                               DHCPc_OS_ERR_INIT_TMR_TASK      DHCPc timer task   NOT successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TmrInit().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) The DHCPc timer's primary purpose is to schedule & run DHCPc_TmrTaskHandler(); the
+*                   timer should have DHCPc_TmrTaskHandler() execute at every DHCPc_OS_TMR_PERIOD_SEC
+*                   seconds forever (i.e. timer should NEVER stop running), and is doing that by signaling
+*                   a semaphore which is being pended on by the DHCPc timer task.
+*********************************************************************************************************
+*/
+void  DHCPc_OS_TmrInit (DHCPc_ERR  *perr)
+{
+    OS_ERR  os_err;
+
+
+                                                                /* ----------------- CREATE DHCPc TMR ----------------- */
+    OSTmrCreate((OS_TMR            *)&DHCPc_OS_TmrObj,
+                (CPU_CHAR          *) DHCPc_OS_TMR_NAME,
+                (OS_TICK            ) 0u,
+                (OS_TICK            ) DHCPc_OS_TMR_PERIOD_TMR_TICK,
+                (OS_OPT             ) OS_OPT_TMR_PERIODIC,
+                (OS_TMR_CALLBACK_PTR) DHCPc_OS_TmrCallback,
+                (void              *) 0,
+                (OS_ERR            *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_TMR;
+        return;
+    }
+
+
+                                                                /* ------------- CREATE DHCPc TMR SIGNAL -------------- */
+    OSSemCreate((OS_SEM    *)&DHCPc_OS_TmrSignalObj,
+                (CPU_CHAR  *) DHCPc_OS_TMR_SIGNAL_NAME,
+                (OS_SEM_CTR ) 0u,
+                (OS_ERR    *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_TMR_SIGNAL;
+        return;
+    }
+
+
+                                                                /* -------------- CREATE DHCPc TMR TASK --------------- */
+    OSTaskCreate((OS_TCB     *)&DHCPc_OS_TmrTaskTCB,
+                 (CPU_CHAR   *) DHCPc_OS_TMR_TASK_NAME,
+                 (OS_TASK_PTR ) DHCPc_OS_TmrTask,
+                 (void       *) 0,
+                 (OS_PRIO     ) DHCPc_OS_CFG_TMR_TASK_PRIO,
+                 (CPU_STK    *)&DHCPc_OS_TmrTaskStk[0],
+                 (CPU_STK_SIZE)(DHCPc_OS_CFG_TMR_TASK_STK_SIZE / 10u),
+                 (CPU_STK_SIZE) DHCPc_OS_CFG_TMR_TASK_STK_SIZE,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+    if (os_err != OS_ERR_NONE) {
+       *perr = DHCPc_OS_ERR_INIT_TMR_TASK;
+        return;
+    }
+
+
+   *perr = DHCPc_OS_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_TmrTask()
+*
+* Description : OS-dependent shell task to run DHCPc timer task.
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-III).
+*
+* Return(s)   : none.
+*
+* Created by  : DHCPc_OS_TmrInit().
+*
+* Note(s)     : (1) DHCPc_OS_TmrTask() blocked until DHCPc initialization completes.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_OS_TmrTask (void  *p_data)
+{
+   (void)&p_data;                                               /* Prevent 'variable unused' compiler warning.          */
+
+
+    while (DEF_ON) {
+        DHCPc_TmrTaskHandler();
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_TmrStart()
+*
+* Description : Start the DHCPc Timer.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               DHCPc timer     successfully started.
+*                               DHCPc_OS_ERR_TMR                DHCPc timer NOT successfully started.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Init().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) The DHCPc timer MUST have been previously created by calling DHCPc_OS_TmrInit().
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_TmrStart (DHCPc_ERR  *perr)
+{
+    OS_ERR  os_err;
+
+
+   (void)OSTmrStart(&DHCPc_OS_TmrObj, &os_err);
+
+    switch(os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_OBJ_TYPE:
+        case OS_ERR_TMR_INVALID:
+        case OS_ERR_TMR_INACTIVE:
+        case OS_ERR_TMR_INVALID_STATE:
+        case OS_ERR_TMR_ISR:
+        default:
+            *perr = DHCPc_OS_ERR_TMR;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       DHCPc_OS_TmrCallback()
+*
+* Description : DHCPc Timer callback function.
+*
+* Argument(s) : p_tmr       Pointer to         expiring timer (ignored).
+*
+*               p_arg       Argument passed by expiring timer (none).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Expiring DHCPc_OS_TMR_NAME Timer.
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_OS_TmrCallback (void  *p_tmr,
+                                    void  *p_arg)
+{
+   (void)&p_tmr;                                                /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_arg;
+
+    DHCPc_OS_TmrSignal();                                       /* Signal DHCPc timer expired.                          */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_OS_TmrWait()
+*
+* Description : Wait on signal indicating DHCPc timer expired.
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_OS_ERR_NONE               Timer signal     received.
+*                               DHCPc_OS_ERR_TMR                Timer signal NOT received.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TmrTaskHandler().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc timer signal MUST be acquired--i.e. MUST wait for access; do NOT timeout.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_TmrWait (DHCPc_ERR  *perr)
+{
+    OS_ERR  os_err;
+
+
+   (void)OSSemPend((OS_SEM *)&DHCPc_OS_TmrSignalObj,            /* Wait until DHCPc timer expires ...                   */
+                   (OS_TICK ) 0u,                               /* ... without timeout (see Note #1).                   */
+                   (OS_OPT  ) OS_OPT_PEND_BLOCKING,
+                   (CPU_TS *) 0,
+                   (OS_ERR *)&os_err);
+
+    switch (os_err) {
+        case OS_ERR_NONE:
+            *perr = DHCPc_OS_ERR_NONE;
+             break;
+
+
+        case OS_ERR_OBJ_PTR_NULL:
+        case OS_ERR_OBJ_TYPE:
+        case OS_ERR_OBJ_DEL:
+        case OS_ERR_OPT_INVALID:
+        case OS_ERR_PEND_ISR:
+        case OS_ERR_PEND_ABORT:
+        case OS_ERR_PEND_WOULD_BLOCK:
+        case OS_ERR_STATUS_INVALID:
+        case OS_ERR_SCHED_LOCKED:
+        case OS_ERR_TIMEOUT:
+        default:
+            *perr = DHCPc_OS_ERR_TMR;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc_OS_TmrSignal()
+*
+* Description : Signal that DHCPc timer expired.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_OS_TmrCallback().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) DHCPc timer MUST be signaled--i.e. MUST signal without failure.
+*
+*                   (a) Failure to signal will prevent DHCPc timer task from running.
+*********************************************************************************************************
+*/
+
+void  DHCPc_OS_TmrSignal (void)
+{
+    OS_ERR  os_err;
+
+
+   (void)OSSemPost((OS_SEM *)&DHCPc_OS_TmrSignalObj,            /* Signal DHCPc timer expired.                          */
+                   (OS_OPT  ) OS_OPT_POST_1,
+                   (OS_ERR *)&os_err);
+
+   (void)&os_err;                                               /* See Note #1a.                                        */
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       DHCPc/OS TIME FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       DHCPc_OS_TimeGet_tick()
+*
+* Description : Get the current time value.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Number of clock ticks elapsed since OS startup.
+*
+* Caller(s)   : DHCPc_TxMsgPrepare(),
+*               DHCPc_LeaseTimeCalc(),
+*               DHCPc_TmrTaskHandler().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) The value returned by this function OS configuration dependent (number of ticks per
+*                   second), and hence cannot be interpreted directly by the caller.
+*
+*                   See 'DHCPc_OS_TimeCalcElapsed_sec()' for useful usage.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  DHCPc_OS_TimeGet_tick (void)
+{
+    OS_TICK  time_cur;
+    OS_ERR   os_err;
+
+
+    time_cur = OSTimeGet(&os_err);
+   (void)&os_err;
+
+    return ((CPU_INT32U)time_cur);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   DHCPc_OS_TimeCalcElapsed_sec()
+*
+* Description : Calculate the number of seconds elapsed between start and stop time.
+*
+* Argument(s) : time_start      Start time (in clock ticks).
+*
+*               time_stop       Stop  time (in clock ticks).
+*
+* Return(s)   : Number of seconds elapsed, if NO errors.
+*
+*               0,                         otherwise.
+*
+* Caller(s)   : DHCPc_LeaseTimeCalc().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) The values of the 'time_start' & 'time_stop' parameters are obtained from a call to
+*                   DHCPc_OS_TimeGet_tick().  Those values are clock tick dependent, and are converted
+*                   in units of seconds by this function.
+*
+*               (2) Elapsed time delta calculation adjusts ONLY for a single overflow time ticks.  Thus
+*                   if elapsed time is greater than the maximum 32-bit overflow threshold, then elapsed
+*                   time will incorrectly calculate a lower elaspsed time.  However, this should NEVER
+*                   occur since the maximum 32-bit overflow threshold for times measured in seconds is
+*                   136.2 years.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  DHCPc_OS_TimeCalcElapsed_sec (CPU_INT32U  time_start,
+                                          CPU_INT32U  time_stop)
+{
+    CPU_INT32U  time_delta_tick;
+    CPU_INT32U  time_sec;
+
+
+    if (OSCfg_TickRate_Hz > 0u) {
+                                                                /* Calculate delta time (in ticks) [see Note #2].       */
+        if (time_start <= time_stop) {
+            time_delta_tick = time_stop - time_start;
+        } else {                                                /* If stop time > start time, adjust for tick overflow. */
+            time_delta_tick = ((DEF_INT_32U_MAX_VAL - time_start) + 1u) + time_stop;
+        }
+
+        time_sec = time_delta_tick / OSCfg_TickRate_Hz;         /* Calculate time (in seconds).                         */
+
+    } else {
+        time_sec = 0u;
+    }
+
+    return (time_sec);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DHCPc/Source/dhcp-c.c b/src/ucos_v1_42/micrium_source/uC-DHCPc/Source/dhcp-c.c
new file mode 100644
index 0000000..edad532
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DHCPc/Source/dhcp-c.c
@@ -0,0 +1,5196 @@
+/*
+*********************************************************************************************************
+*                                               uC/DHCPc
+*                              Dynamic Host Configuration Protocol Client
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DHCP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             DHCP CLIENT
+*
+* Filename      : dhcp-c.c
+* Version       : V2.10.00
+* Programmer(s) : SR
+*********************************************************************************************************
+* Note(s)       : (1) Supports Dynamic Host Configuration Protocol as described in RFC #2131 with the
+*                     following features/restrictions/constraints :
+*
+*                     (a) Dynamic Configuration of IPv4 Link-Local Addresses       RFC #3927
+*                     (b) Supports both infinite & temporary address leases,
+*                             with automatic renewal of lease if necessary
+*
+*                 (2) To protect the validity & prevent the corruption of shared DHCP client resources,
+*                     the primary tasks of the DHCP client are prevented from running concurrently
+*                     through the use of a global DHCPc lock implementing protection by mutual exclusion.
+*
+*                     (a) The mechanism of protected mutual exclusion is irrelevant but MUST be implemented
+*                         in the following two functions :
+*
+*                             DHCPc_OS_Lock()                       acquire access to DHCP client
+*                             DHCPc_OS_Unlock()                     release access to DHCP client
+*
+*                         implemented in
+*
+*                             \\OS\\dhcp-c_os.*
+*
+*                             where
+*                                                            directory path for DHCPc module
+*                                                               directory name for specific OS
+*
+*                     (b) Since this global lock implements mutual exclusion at the DHCP client task
+*                         level, critical sections are NOT required to prevent task-level concurrency in
+*                         the DHCP client.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    DHCPc_MODULE
+#include  "dhcp-c.h"
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+                                                                                    /* -------- IF INFO FNCTS --------- */
+static  void            DHCPc_IF_InfoInit            (DHCPc_ERR          *perr);
+
+static  DHCPc_IF_INFO  *DHCPc_IF_InfoGet             (NET_IF_NBR          if_nbr,
+                                                      DHCPc_ERR          *perr);
+
+static  DHCPc_IF_INFO  *DHCPc_IF_InfoGetCfgd         (NET_IF_NBR          if_nbr);
+
+static  void            DHCPc_IF_InfoFree            (DHCPc_IF_INFO      *pif_info);
+
+static  void            DHCPc_IF_InfoClr             (DHCPc_IF_INFO      *pif_info);
+
+
+
+                                                                                    /* ---------- MSG FNCTS ----------- */
+static  void            DHCPc_MsgInit                (DHCPc_ERR          *perr);
+
+static  void            DHCPc_MsgRxHandler           (DHCPc_COMM         *pcomm);
+
+static  DHCPc_MSG      *DHCPc_MsgGet                 (DHCPc_ERR          *perr);
+
+static  CPU_INT08U     *DHCPc_MsgGetOpt              (DHCPc_OPT_CODE      opt_code,
+                                                      CPU_INT08U         *pmsg_buf,
+                                                      CPU_INT16U          msg_buf_size,
+                                                      CPU_INT08U         *popt_val_len);
+
+static  void            DHCPc_MsgFree                (DHCPc_MSG          *pmsg);
+
+static  void            DHCPc_MsgClr                 (DHCPc_MSG          *pmsg);
+
+
+
+                                                                                    /* ---------- COMM FNCTS ---------- */
+static  void            DHCPc_CommInit               (DHCPc_ERR          *perr);
+
+static  DHCPc_COMM     *DHCPc_CommGet                (NET_IF_NBR          if_nbr,
+                                                      DHCPc_COMM_MSG      comm_msg,
+                                                      DHCPc_ERR          *perr);
+
+static  void            DHCPc_CommFree               (DHCPc_COMM         *pcomm);
+
+static  void            DHCPc_CommClr                (DHCPc_COMM         *pcomm);
+
+
+
+                                                                                    /* ---------- TMR FNCTS ----------- */
+static  void            DHCPc_TmrInit                (DHCPc_ERR          *perr);
+
+static  void            DHCPc_TmrCfg                 (DHCPc_IF_INFO      *pif_info,
+                                                      DHCPc_COMM_MSG      tmr_msg,
+                                                      CPU_INT32U          time_sec,
+                                                      DHCPc_ERR          *perr);
+
+static  DHCPc_TMR      *DHCPc_TmrGet                 (void               *pobj,
+                                                      DHCPc_TMR_TICK      time,
+                                                      DHCPc_ERR          *perr);
+
+static  void            DHCPc_TmrFree                (DHCPc_TMR          *ptmr);
+
+static  void            DHCPc_TmrClr                 (DHCPc_TMR          *ptmr);
+
+
+                                                                                    /* ----- STATE HANDLER FNCTS ------ */
+static  NET_SOCK_ID     DHCPc_InitSock               (NET_IPv4_ADDR       ip_addr_local,
+                                                      NET_IF_NBR          if_nbr);
+
+
+static  void            DHCPc_InitStateHandler       (DHCPc_IF_INFO      *pif_info,
+                                                      DHCPc_ERR          *perr);
+
+static  void            DHCPc_RenewRebindStateHandler(DHCPc_IF_INFO      *pif_info,
+                                                      DHCPc_COMM_MSG      exp_tmr_msg,
+                                                      DHCPc_ERR          *perr);
+
+static  void            DHCPc_StopStateHandler       (DHCPc_IF_INFO      *pif_info,
+                                                      DHCPc_ERR          *perr);
+
+
+static  void            DHCPc_Discover               (NET_SOCK_ID         sock_id,
+                                                      DHCPc_IF_INFO      *pif_info,
+                                                      CPU_INT08U         *paddr_hw,
+                                                      CPU_INT08U          addr_hw_len,
+                                                      DHCPc_ERR          *perr);
+
+static  void            DHCPc_Req                    (NET_SOCK_ID         sock_id,
+                                                      DHCPc_IF_INFO      *pif_info,
+                                                      CPU_INT08U         *paddr_hw,
+                                                      CPU_INT08U          addr_hw_len,
+                                                      DHCPc_ERR          *perr);
+
+static  void            DHCPc_DeclineRelease         (NET_SOCK_ID         sock_id,
+                                                      DHCPc_IF_INFO      *pif_info,
+                                                      DHCPc_MSG_TYPE      msg_type,
+                                                      CPU_INT08U         *paddr_hw,
+                                                      CPU_INT08U          addr_hw_len,
+                                                      DHCPc_ERR          *perr);
+
+
+static  CPU_INT16U      DHCPc_CalcBackOff            (CPU_INT16U          timeout_ms);
+
+
+
+                                                                                    /* ---------- ADDR FNCTS ---------- */
+#if ((DHCPc_CFG_ADDR_VALIDATE_EN       == DEF_ENABLED) || \
+     (DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN == DEF_ENABLED))
+static  void            DHCPc_AddrValidate           (NET_IF_NBR          if_nbr,
+                                                      NET_IPv4_ADDR       addr_target,
+                                                      CPU_INT32U          dly_ms,
+                                                      DHCPc_ERR          *perr);
+#endif
+
+static  void            DHCPc_AddrCfg                (DHCPc_IF_INFO      *pif_info,
+                                                      DHCPc_ERR          *perr);
+
+#if (DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN == DEF_ENABLED)
+static  void            DHCPc_AddrLocalLinkCfg       (DHCPc_IF_INFO      *pif_info,
+                                                      CPU_INT08U         *paddr_hw,
+                                                      CPU_INT08U          addr_hw_len,
+                                                      DHCPc_ERR          *perr);
+
+static  NET_IPv4_ADDR   DHCPc_AddrLocalLinkGet       (CPU_INT08U         *paddr_hw,
+                                                      CPU_INT08U          addr_hw_len);
+#endif
+
+
+
+                                                                                    /* --------- LEASE FNCTS ---------- */
+static  void            DHCPc_LeaseTimeCalc          (DHCPc_IF_INFO      *pif_info,
+                                                      DHCPc_ERR          *perr);
+
+static  void            DHCPc_LeaseTimeUpdate        (DHCPc_IF_INFO      *pif_info,
+                                                      DHCPc_COMM_MSG      exp_tmr_msg,
+                                                      DHCPc_ERR          *perr);
+
+
+                                                                                    /* ----------- RX FNCTS ----------- */
+static  DHCPc_MSG_TYPE  DHCPc_RxReply                (NET_SOCK_ID         sock_id,
+                                                      DHCPc_IF_INFO      *pif_info,
+                                                      NET_IPv4_ADDR       server_id,
+                                                      CPU_INT08U         *paddr_hw,
+                                                      CPU_INT08U          addr_hw_len,
+                                                      CPU_INT08U         *pmsg_buf,
+                                                      CPU_INT16U         *pmsg_buf_len,
+                                                      DHCPc_ERR          *perr);
+
+static  CPU_INT16U      DHCPc_Rx                     (NET_SOCK_ID         sock_id,
+                                                      void               *pdata_buf,
+                                                      CPU_INT16U          data_buf_len,
+                                                      NET_SOCK_ADDR      *paddr_remote,
+                                                      NET_SOCK_ADDR_LEN  *paddr_remote_len,
+                                                      DHCPc_ERR          *perr);
+
+
+                                                                                    /* ----------- TX FNCTS ----------- */
+static  CPU_INT16U      DHCPc_TxMsgPrepare           (DHCPc_IF_INFO      *pif_info,
+                                                      DHCPc_MSG_TYPE      msg_type,
+                                                      CPU_INT08U         *paddr_hw,
+                                                      CPU_INT08U          addr_hw_len,
+                                                      CPU_INT08U         *pmsg_buf,
+                                                      CPU_INT16U          msg_buf_size,
+                                                      DHCPc_ERR          *perr);
+
+static  void            DHCPc_Tx                     (NET_SOCK_ID         sock_id,
+                                                      void               *pdata_buf,
+                                                      CPU_INT16U          data_buf_len,
+                                                      NET_SOCK_ADDR      *paddr_remote,
+                                                      NET_SOCK_ADDR_LEN   addr_remote_len,
+                                                      DHCPc_ERR          *perr);
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           INITIALIZED DATA
+*
+* Note(s) : (1) This array is used for requesting parameters from the DHCP server.  Do NOT modify data type.
+*********************************************************************************************************
+*/
+
+static  const  DHCPc_OPT_CODE  DHCPc_ReqParam[] = {
+    DHCP_OPT_SUBNET_MASK,
+    DHCP_OPT_ROUTER,
+    DHCP_OPT_DOMAIN_NAME_SERVER,
+    DHCP_OPT_TIME_OFFSET
+};
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            DHCPc_Init()
+*
+* Description : (1) Initialize DHCP client :
+*
+*                   (a) Initialize DHCP client global variables
+*                   (b) Initialize DHCP client information & message buffer
+*                   (c) Initialize DHCP client counters
+*                   (d) Initialize DHCP client global OS objects
+*                   (e) Signal ALL DHCP client modules that DHCP client initialization is complete
+*                   (f) Start      DHCP client timer
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : DHCPc_ERR_NONE,                                   if NO errors.
+*
+*               Specific initialization error code (see Note #4), otherwise.
+*
+* Caller(s)   : Your Product's Application.
+*
+*               This function is a DHCP client initialization function & MAY be called by
+*               application/initialization function(s).
+*
+* Note(s)     : (2) DHCPc_Init() MUST be called ...
+*
+*                   (a) AFTER  product's OS has been initialized
+*                   (b) BEFORE product's application calls any DHCP client function(s)
+*
+*               (3) DHCPc_Init() MUST ONLY be called ONCE from product's application.
+*
+*               (4) (a) If any DHCP initialization error occurs, any remaining DHCP initialization is
+*                       immediately aborted & the specific initialization error code is returned.
+*
+*                   (b) DHCP error codes are listed in 'dhcp-c.h'.  A search of the specific error code
+*                       number(s) provides the corresponding error code label(s).  A search of the error
+*                       code label(s) provides the source code location of the DHCP initialization
+*                       error(s).
+*********************************************************************************************************
+*/
+
+DHCPc_ERR  DHCPc_Init (void)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    CPU_INT08U  i;
+    DHCPc_ERR   err;
+
+
+    DHCPc_InitDone = DEF_NO;                                    /* Block DHCPc fncts/tasks until init complete.         */
+
+                                                                /* -------------- INIT DHCPc GLOBAL VAR --------------- */
+
+
+                                                                /* ------- INIT DHCPc INFO, MSG BUF, & COMM OBJ ------- */
+    DHCPc_IF_InfoInit(&err);                                    /* Create DHCPc IF Info  pool.                          */
+    if (err != DHCPc_ERR_NONE) {
+        return (err);
+    }
+
+    DHCPc_MsgInit(&err);                                        /* Create DHCPc msg      pool.                          */
+    if (err != DHCPc_ERR_NONE) {
+        return (err);
+    }
+
+    DHCPc_CommInit(&err);                                       /* Create DHCPc comm obj pool.                          */
+    if (err != DHCPc_ERR_NONE) {
+        return (err);
+    }
+
+                                                                /* ----------------- INIT DHCPc CTRS ------------------ */
+#if 0 && (DHCPc_CFG_CTR_EN     == DEF_ENABLED)
+                                                                /* #### NOT implemented.                                */
+#endif
+
+                                                                /* --------------- INIT DHCPc ERR CTRS ---------------- */
+#if 0 && (DHCPc_CFG_CTR_ERR_EN == DEF_ENABLED)
+                                                                /* #### NOT implemented.                                */
+#endif
+
+                                                                /* -------------- PERFORM DHCPc/OS INIT --------------- */
+    DHCPc_OS_Init(&err);                                        /* Create DHCPc obj(s).                                 */
+    if (err != DHCPc_OS_ERR_NONE) {
+        return (err);
+    }
+
+                                                                /* --------- INIT DHCPc TIMER & TASK MODULES ---------- */
+    DHCPc_TmrInit(&err);
+    if (err != DHCPc_ERR_NONE) {
+        return (err);
+    }
+
+                                                                /* ------------ SIGNAL DHCPc INIT COMPLETE ------------ */
+    DHCPc_InitDone = DEF_YES;                                   /* Signal     DHCPc fncts/tasks that init complete.     */
+
+    for (i = 0; i < DHCPc_TASK_NBR; i++) {                      /* Signal ALL DHCPc tasks       that init complete.     */
+        DHCPc_OS_InitSignal(&err);
+        if (err != DHCPc_OS_ERR_NONE) {
+            DHCPc_InitDone = DEF_NO;
+            return (err);
+        }
+    }
+
+                                                                /* ----------------- START DHCPc TMR ------------------ */
+    DHCPc_OS_TmrStart(&err);
+    if (err != DHCPc_OS_ERR_NONE) {
+        DHCPc_InitDone = DEF_NO;
+        return (err);
+    }
+
+
+    return (DHCPc_ERR_NONE);
+#else
+    return (DHCPc_ERR_IPv4_NOT_PRESENT);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            DHCPc_Start()
+*
+* Description : (1) Start DHCP address configuration/management on specified interface :
+*
+*                   (a) Acquire  DHCPc lock
+*                   (b) Get      interface information structure
+*                   (c) Copy     requested DHCP options.
+*                   (d) Post     message to DHCP client task
+*                   (e) Release  DHCPc lock
+*
+*
+* Argument(s) : if_nbr              Interface number to start DHCP configuration/management.
+*
+*               preq_param_tbl      Pointer to table of requested DHCP parameters.
+*
+*               req_param_tbl_qty   Size of requested parameter table.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Address DHCP negotiation successfully started.
+*                               DHCPc_ERR_NULL_PTR              Argument 'preq_param_tbl' passed a NULL pointer.
+*                               DHCPc_ERR_INIT_INCOMPLETE       DHCP client initialization NOT complete.
+*                               DHCPc_ERR_IF_INVALID            Interface invalid or disabled.
+*                               DHCPc_ERR_PARAM_REQ_TBL_SIZE    Requested parameter table size too small.
+*                               DHCPc_ERR_MSG_Q                 Error posting start command to message queue.
+*
+*                                                               -------- RETURNED BY DHCPc_OS_Lock() : ---------
+*                               DHCPc_OS_ERR_LOCK               DHCPc access NOT acquired.
+*
+*                                                               ------- RETURNED BY DHCPc_IF_InfoGet() : -------
+*                               DHCPc_ERR_IF_INFO_IF_USED       Interface information already in use.
+*                               DHCPc_ERR_INVALID_HW_ADDR       Error retrieving interface's hardware address.
+*                               DHCPc_ERR_IF_INFO_NONE_AVAIL    Interface information pool empty.
+*
+*                                                               -------- RETURNED BY DHCPc_CommGet() : ---------
+*                               DHCPc_ERR_COMM_NONE_AVAIL       Communication object pool empty.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a DHCP client application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (2) DHCPc_Start() MUST be called AFTER the interface has been properly configured &
+*                   enabled.  Failure to do so could cause unknown results.
+*
+*               (3) DHCPc_Start() NOT executed until DHCP client initialization completes.
+*
+*               (4) DHCPc_Start() blocks ALL other DHCP client tasks by pending on & acquiring the
+*                   global DHCPc lock (see dhcp-c.h  Note #2').
+*
+*               (5) DHCPc_Start() execution is asynchronous--i.e. interface will NOT necessarily be
+*                   started upon return from this function.  The application SHOULD periodically call
+*                   DHCPc_ChkStatus() until the interface's DHCP management is successfully started
+*                   and configured.
+*********************************************************************************************************
+*/
+
+void  DHCPc_Start (NET_IF_NBR       if_nbr,
+                   DHCPc_OPT_CODE  *preq_param_tbl,
+                   CPU_INT08U       req_param_tbl_qty,
+                   DHCPc_ERR       *perr)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    CPU_BOOLEAN      if_en;
+    DHCPc_IF_INFO   *pif_info;
+    DHCPc_COMM      *pcomm;
+    DHCPc_COMM_MSG   comm_msg;
+    NET_ERR          err_net;
+
+
+#if (DHCPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (req_param_tbl_qty > 0) {
+        if (preq_param_tbl == (DHCPc_OPT_CODE *)0) {
+           *perr = DHCPc_ERR_NULL_PTR;
+            return;
+        }
+    }
+#endif
+
+    if (DHCPc_InitDone != DEF_YES) {                            /* If init NOT complete, exit (see Note #3).            */
+       *perr = DHCPc_ERR_INIT_INCOMPLETE;
+        return;
+    }
+
+
+    if_en  = NetIF_IsEnCfgd(if_nbr, &err_net);                  /* Validate IF en.                                      */
+    if (if_en != DEF_YES) {
+       *perr = DHCPc_ERR_IF_INVALID;
+        return;
+    }
+
+    if (req_param_tbl_qty > DHCPc_CFG_PARAM_REQ_TBL_SIZE) {     /* If param req qty > param req tbl, ...                */
+       *perr = DHCPc_ERR_PARAM_REQ_TBL_SIZE;                    /* ... rtn err.                                         */
+        return;
+    }
+
+                                                                /* ---------------- ACQUIRE DHCPc LOCK ---------------- */
+    DHCPc_OS_Lock(perr);                                        /* See Note #4.                                         */
+    if (*perr != DHCPc_OS_ERR_NONE) {
+        return;
+    }
+
+                                                                /* ------------------- GET IF INFO -------------------- */
+    pif_info = DHCPc_IF_InfoGet(if_nbr, perr);
+    if (*perr != DHCPc_ERR_NONE) {
+        DHCPc_OS_Unlock();
+        return;
+    }
+
+    pif_info->ClientState = DHCP_STATE_INIT;                    /* Client in INIT state.                                */
+
+
+                                                                /* ----------------- COPY REQ DHCP OPT -----------------*/
+    Mem_Copy((void     *)&pif_info->ParamReqTbl[0],
+             (void     *) preq_param_tbl,
+             (CPU_SIZE_T) req_param_tbl_qty);
+
+    pif_info->ParamReqQty = req_param_tbl_qty;
+
+                                                                /* -------------- POST MSG TO DHCP TASK --------------- */
+    comm_msg = DHCPc_COMM_MSG_START;
+    pcomm    = DHCPc_CommGet(if_nbr, comm_msg, perr);
+    if (*perr != DHCPc_ERR_NONE) {
+        DHCPc_IF_InfoFree(pif_info);
+        DHCPc_OS_Unlock();
+        return;
+    }
+
+    DHCPc_OS_MsgPost((void      *)pcomm,
+                     (DHCPc_ERR *)perr);
+    if (*perr != DHCPc_OS_ERR_NONE) {
+       *perr = DHCPc_ERR_MSG_Q;
+        DHCPc_CommFree(pcomm);
+        DHCPc_IF_InfoFree(pif_info);
+        DHCPc_OS_Unlock();
+        return;
+    }
+
+                                                                /* ---------------- RELEASE DHCPc LOCK ---------------- */
+    DHCPc_OS_Unlock();
+
+   *perr = DHCPc_ERR_NONE;
+#else
+   *perr = DHCPc_ERR_IPv4_NOT_PRESENT;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            DHCPc_Stop()
+*
+* Description : (1) Stop DHCP address configuration/management on specified interface :
+*
+*                   (a) Acquire  DHCPc lock
+*                   (b) Post     message to DHCP client task
+*                   (c) Release  DHCPc lock
+*
+*
+* Argument(s) : if_nbr      Interface number to stop DHCP management.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Interface DHCP configuration successfully
+*                                                                   stopped.
+*                               DHCPc_ERR_INIT_INCOMPLETE       DHCP client initialization NOT complete.
+*                               DHCPc_ERR_IF_NOT_MANAGED        Interface NOT managed by the DHCP client.
+*                               DHCPc_ERR_MSG_Q                 Error posting stop command to message queue.
+*
+*                                                               ------ RETURNED BY DHCPc_OS_Lock() : -------
+*                               DHCPc_OS_ERR_LOCK               DHCPc access NOT acquired.
+*
+*                                                               ------ RETURNED BY DHCPc_CommGet() : -------
+*                               DHCPc_ERR_COMM_NONE_AVAIL       Communication object pool empty.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a DHCP client application programming interface (API) function & MAY be called by
+*               application function(s).
+*
+* Note(s)     : (2) DHCPc_Stop() MUST be called PRIOR to disable any interface having been configured
+*                   using DHCP.  Failure to do so could cause unknown behaviors.
+*
+*               (3) DHCPc_Stop() NOT executed until DHCP client initialization completes.
+*
+*               (4) DHCPc_Stop() blocks ALL other DHCP client tasks by pending on & acquiring the global
+*                   DHCPc lock (see dhcp-c.h  Note #2').
+*
+*               (5) DHCPc_Stop() execution is asynchronous--i.e. interface will NOT necessarily be
+*                   stopped upon return from this function.  The application SHOULD periodically call
+*                   DHCPc_ChkStatus() until the interface's DHCP management is successfully stopped and
+*                   un-configured.
+*********************************************************************************************************
+*/
+
+void  DHCPc_Stop (NET_IF_NBR   if_nbr,
+                  DHCPc_ERR   *perr)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    DHCPc_IF_INFO   *pif_info;
+    DHCPc_COMM      *pcomm;
+    DHCPc_COMM_MSG   comm_msg;
+
+
+    if (DHCPc_InitDone != DEF_YES) {                            /* If init NOT complete, exit (see Note #3).            */
+       *perr = DHCPc_ERR_INIT_INCOMPLETE;
+        return;
+    }
+
+                                                                /* ---------------- ACQUIRE DHCPc LOCK ---------------- */
+    DHCPc_OS_Lock(perr);                                        /* See Note #4.                                         */
+    if (*perr != DHCPc_OS_ERR_NONE) {
+        return;
+    }
+
+    pif_info = DHCPc_IF_InfoGetCfgd(if_nbr);
+    if (pif_info == (DHCPc_IF_INFO *)0) {                       /* If IF NOT managed by DHCPc, ...                      */
+       *perr = DHCPc_ERR_IF_NOT_MANAGED;                        /* ... rtn err.                                         */
+        DHCPc_OS_Unlock();
+        return;
+    }
+
+                                                                /* -------------- POST MSG TO DHCP TASK --------------- */
+    comm_msg = DHCPc_COMM_MSG_STOP;
+    pcomm    = DHCPc_CommGet(if_nbr, comm_msg, perr);
+    if (*perr != DHCPc_ERR_NONE) {
+        DHCPc_OS_Unlock();
+        return;
+    }
+
+    DHCPc_OS_MsgPost((void      *)pcomm,
+                     (DHCPc_ERR *)perr);
+    if (*perr != DHCPc_OS_ERR_NONE) {
+        *perr  = DHCPc_ERR_MSG_Q;
+         DHCPc_CommFree(pcomm);
+         DHCPc_OS_Unlock();
+         return;
+    }
+
+                                                                /* ---------------- RELEASE DHCPc LOCK ---------------- */
+    DHCPc_OS_Unlock();
+
+   *perr = DHCPc_ERR_NONE;
+#else
+   *perr = DHCPc_ERR_IPv4_NOT_PRESENT;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DHCPc_ChkStatus()
+*
+* Description : Check an interface's DHCP status & last error.
+*
+* Argument(s) : if_nbr      Interface number to check status.
+*
+*               perr_last   Pointer to variable that will receive the last error code for the specified
+*                           interface :
+*
+*                           DHCPc_ERR_NONE                      No error saved for this interface.
+*                           DHCPc_ERR_INIT_INCOMPLETE           DHCP client initialization NOT complete.
+*                           DHCPc_ERR_IF_NOT_MANAGED            Interface NOT managed by the DHCP client.
+*
+*                           Specific initialization error code (see Note #2).
+*
+* Return(s)   : DHCP status for the interface :
+*
+*                   DHCP_STATUS_NONE,               NO status information available since DHCPc
+*                                                       services for this interface either :
+*
+*                                                           NOT successfully started
+*                                                        OR     successfully stopped.
+*
+*                   DHCP_STATUS_CFG_IN_PROGRESS,    DHCPc configuration still in progress.
+*
+*                   DHCP_STATUS_CFGD,               DHCPc configuration successfully completed.
+*                   DHCP_STATUS_CFGD_NO_TMR,        DHCPc configuration successfully completed;
+*                                                       however, NO DHCP lease timer available.
+*
+*                   DHCP_STATUS_CFGD_LOCAL_LINK,    DHCPc failed to configure a globally-routable
+*                                                       address, but successfully configured a
+*                                                       Link-Local address.
+*
+*                   DHCP_STATUS_FAIL,               DHCPc configuration failed.
+*
+* Caller(s)   : Application.
+*
+*               This function is a DHCP client application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) DHCPc_ChkStatus() NOT executed until DHCP client initialization completes.
+*
+*               (2) (a) If any DHCP error occurs, the specific error code is preserved.
+*
+*                   (b) DHCP error codes are listed in 'dhcp-c.h'.  A search of the specific error code
+*                       number(s) provides the corresponding error code label(s).
+*********************************************************************************************************
+*/
+
+DHCPc_STATUS  DHCPc_ChkStatus (NET_IF_NBR   if_nbr,
+                               DHCPc_ERR   *perr_last)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    DHCPc_IF_INFO  *pif_info;
+    DHCPc_STATUS    status;
+    CPU_SR_ALLOC();
+
+
+    if (DHCPc_InitDone != DEF_YES) {                            /* If init NOT complete, exit (see Note #1).            */
+       *perr_last = DHCPc_ERR_INIT_INCOMPLETE;
+        return (DHCP_STATUS_NONE);
+    }
+
+    CPU_CRITICAL_ENTER();
+    pif_info = DHCPc_IF_InfoGetCfgd(if_nbr);
+    if (pif_info != (DHCPc_IF_INFO *)0) {
+       *perr_last = pif_info->LastErr;
+        status    = pif_info->LeaseStatus;
+
+    } else {
+       *perr_last = DHCPc_ERR_IF_NOT_MANAGED;
+        status    = DHCP_STATUS_NONE;
+    }
+    CPU_CRITICAL_EXIT();
+
+
+    return (status);
+#else
+   *perr_last = DHCPc_ERR_IPv4_NOT_PRESENT;
+    return (DHCP_STATUS_FAIL);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DHCPc_GetOptVal()
+*
+* Description : (1) Get the value of a specific DHCP option for a given interface :
+*
+*                   (a) Acquire DHCPc lock
+*                   (b) Get interface information structure
+*                   (c) Retrieve specific option's value
+*                   (d) Release DHCPc lock
+*
+*
+* Argument(s) : if_nbr          Interface number to get option value.
+*
+*               opt_code        Option code      to get value.
+*
+*               pval_buf        Pointer to buffer that will receive the option value.
+*
+*               pval_buf_len    Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the buffer, in octets, pointed to by 'pval_buf'.
+*                                   (b) (1) Return the actual length of the option, if NO errors;
+*                                       (2) Return an undefined value,              otherwise.
+*
+*                               See also Note #4.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Option value successfully returned.
+*                               DHCPc_ERR_NULL_PTR              Argument 'pval_buf/pval_buf_len' passed a NULL
+*                                                                   pointer.
+*                               DHCPc_ERR_INIT_INCOMPLETE       DHCP client initialization NOT complete.
+*                               DHCPc_ERR_IF_NOT_MANAGED        Interface NOT managed by the DHCP client.
+*                               DHCPc_ERR_IF_NOT_CFG            Interface NOT yet configured by the DHCP client.
+*                               DHCPc_ERR_IF_OPT_NONE           Option NOT present.
+*                               DHCPc_ERR_OPT_BUF_SIZE          Option value buffer size too small.
+*
+*                                                               -------- RETURNED BY DHCPc_OS_Lock() : ---------
+*                               DHCPc_OS_ERR_LOCK               DHCPc access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a DHCP client application programming interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (2) DHCPc_ChkStatus() NOT executed until DHCP client initialization completes.
+*
+*               (3) DHCPc_Stop() blocks ALL other DHCP client tasks by pending on & acquiring the global
+*                   DHCPc lock (see dhcp-c.h  Note #2').
+*
+*               (4) Since 'pval_buf_len' parameter is both an input & output parameter
+*                   (see 'Argument(s) : pval_buf_len'), ... :
+*
+*                   (a) Its input value SHOULD be validated prior to use; ...
+*
+*                       (1) In the case that the 'pval_buf_len' parameter is passed a null pointer,
+*                           NO input value is validated or used.
+*
+*                       (2) The length of the option value buffer MUST be greater than or equal to the
+*                           length of the actual option value requested.
+*
+*                   (b) While its output value MUST be initially configured to return a default value
+*                       PRIOR to all other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+void  DHCPc_GetOptVal (NET_IF_NBR       if_nbr,
+                       DHCPc_OPT_CODE   opt_code,
+                       CPU_INT08U      *pval_buf,
+                       CPU_INT16U      *pval_buf_len,
+                       DHCPc_ERR       *perr)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    DHCPc_IF_INFO  *pif_info;
+    DHCPc_MSG      *pmsg;
+    CPU_INT08U     *popt_val;
+    CPU_INT08U      opt_val_len;
+
+
+                                                                /* -------------- VALIDATE BUF & BUF LEN -------------- */
+#if (DHCPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if ((pval_buf     == (CPU_INT08U *)0) ||
+        (pval_buf_len == (CPU_INT16U *)0)) {
+       *perr = DHCPc_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+    if (DHCPc_InitDone != DEF_YES) {                            /* If init NOT complete, exit (see Note #2).            */
+       *perr = DHCPc_ERR_INIT_INCOMPLETE;
+        return;
+    }
+
+                                                                /* ---------------- ACQUIRE DHCPc LOCK ---------------- */
+    DHCPc_OS_Lock(perr);                                        /* See Note #3.                                         */
+    if (*perr != DHCPc_OS_ERR_NONE) {
+        return;
+    }
+
+    pif_info = DHCPc_IF_InfoGetCfgd(if_nbr);
+    if (pif_info == (DHCPc_IF_INFO *)0) {                       /* If IF NOT managed by DHCPc, ...                      */
+       *perr = DHCPc_ERR_IF_NOT_MANAGED;                        /* ... rtn err.                                         */
+        DHCPc_OS_Unlock();
+        return;
+    }
+
+    if (pif_info->LeaseStatus != DHCP_STATUS_CFGD) {            /* If IF NOT cfg'd, ...                                 */
+       *perr = DHCPc_ERR_IF_NOT_CFG;                            /* ... rtn err.                                         */
+        DHCPc_OS_Unlock();
+        return;
+    }
+
+    pmsg = pif_info->MsgPtr;
+    if (pmsg == (DHCPc_MSG *)0) {                               /* If NO DHCP msg for IF, ...                           */
+       *perr = DHCPc_ERR_IF_NOT_CFG;                            /* ... rtn err.                                         */
+        DHCPc_OS_Unlock();
+        return;
+    }
+
+                                                                /* ------------------- GET OPT VAL -------------------- */
+    popt_val = DHCPc_MsgGetOpt( opt_code,
+                               &pmsg->MsgBuf[0],
+                                pmsg->MsgLen,
+                               &opt_val_len);
+
+    if (popt_val == (CPU_INT08U *)0) {                          /* If NO opt val rtn'd, ...                             */
+       *perr = DHCPc_ERR_IF_OPT_NONE;                           /* ... rtn err.                                         */
+        DHCPc_OS_Unlock();
+        return;
+    }
+
+    if (opt_val_len > *pval_buf_len) {                          /* If opt val larger than val buf, ....                 */
+       *perr = DHCPc_ERR_OPT_BUF_SIZE;                          /* ... rtn err.                                         */
+        DHCPc_OS_Unlock();
+        return;
+    }
+
+    Mem_Copy((void     *)pval_buf,                              /* Copy opt val into val buf ..                         */
+             (void     *)popt_val,
+             (CPU_SIZE_T)opt_val_len);
+
+   *pval_buf_len = opt_val_len;                                 /* .. & set opt val len.                                */
+
+                                                                /* ---------------- RELEASE DHCPc LOCK ---------------- */
+    DHCPc_OS_Unlock();
+
+   *perr = DHCPc_ERR_NONE;
+#else
+   *perr = DHCPc_ERR_IPv4_NOT_PRESENT;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_TaskHandler()
+*
+* Description : (1) Handle lease management :
+*
+*                   (a) Wait for message from DHCP client timer
+*                   (b) Acquire  DHCPc lock
+*                   (c) Handle   received message
+*                   (d) Release  DHCPc lock
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_OS_Task().
+*
+*               This function is a DHCP client to operating system (OS) function & SHOULD be called only
+*               by appropriate DHCPc-operating system port function(s).
+*
+* Note(s)     : (2) DHCPc_TaskHandler() blocked until DHCP client initialization completes.
+*
+*               (3) DHCPc_TaskHandler() blocks ALL other DHCP client tasks by pending on & acquiring
+*                   the global DHCPc lock (see dhcp-c.h  Note #2').
+*********************************************************************************************************
+*/
+
+void  DHCPc_TaskHandler (void)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    void       *pmsg;
+    DHCPc_ERR   err;
+
+
+    if (DHCPc_InitDone != DEF_YES) {                            /* If init NOT complete, ...                            */
+        DHCPc_OS_InitWait(&err);                                /* ... wait on DHCPc init (see Note #2).                */
+        if (err != DHCPc_OS_ERR_NONE) {
+            return;
+        }
+    }
+
+
+    while (DEF_ON) {
+                                                                /* ------------------- WAIT FOR MSG ------------------- */
+        do {
+            pmsg = DHCPc_OS_MsgWait(&err);
+        } while ((err  !=  DHCPc_OS_ERR_NONE) &&
+                 (pmsg != (void *)0));
+
+                                                                /* ---------------- ACQUIRE DHCPc LOCK ---------------- */
+        DHCPc_OS_Lock(&err);                                    /* See Note #3.                                         */
+        if (err != DHCPc_OS_ERR_NONE) {
+            continue;
+        }
+
+                                                                /* -------------------- HANDLE MSG -------------------- */
+        DHCPc_MsgRxHandler((DHCPc_COMM *)pmsg);
+
+                                                                /* ---------------- RELEASE DHCPc LOCK ---------------- */
+        DHCPc_OS_Unlock();
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       DHCPc_TmrTaskHandler()
+*
+* Description : (1) Handle DHCP timers in the DHCPc Timer List :
+*
+*                   (a) Wait for signal from the DHCPc timer
+*
+*                   (b) Acquire DHCPc lock (see Note #2)
+*
+*                   (c) Handle every  DHCPc timer in Timer List :
+*                       (1) Decrement DHCPc timer(s)
+*                       (2) For any timer that expires (see Note #3) :
+*                           (A) Free from Timer List
+*                           (B) Get  current time
+*                           (C) Post message to DHCPc Task
+*
+*                   (d) Release DHCPc lock
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_OS_TmrTask() [see 'dhcp-c_os.c'].
+*
+*               This function is a DHCP client to operating system (OS) function & SHOULD be called only
+*               by appropriate DHCPc-operating system port function(s).
+*
+* Note(s)     : (2) DHCPc_TaskHandler() blocked until DHCP client initialization completes.
+*
+*               (3) DHCPc_TmrTaskHandler() blocks ALL other DHCP client tasks by pending on & acquiring
+*                   the global DHCPc lock (see dhcp-c.h  Note #2').
+*
+*               (4) Since the DHCPc task executes asynchronously from the timer task handler, the
+*                   current time is kept into the interface information structure to prevent lease time
+*                   drifting.
+*
+*               (5) When a DHCP timer expires, the timer SHOULD be freed PRIOR to executing the timer
+*                   expiration function.  This ensures that at least one timer is available if the timer
+*                   expiration function requires a timer.
+*********************************************************************************************************
+*/
+
+void  DHCPc_TmrTaskHandler (void)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    DHCPc_TMR      *ptmr;
+    DHCPc_TMR      *ptmr_next;
+    DHCPc_COMM     *pcomm;
+    DHCPc_IF_INFO  *pif_info;
+    DHCPc_ERR       err;
+
+
+    if (DHCPc_InitDone != DEF_YES) {                            /* If init NOT complete, ...                            */
+        DHCPc_OS_InitWait(&err);                                /* ... wait on DHCPc init (see Note #2).                */
+        if (err != DHCPc_OS_ERR_NONE) {
+            return;
+        }
+    }
+
+
+    while (DEF_ON) {
+                                                                /* ----------------- WAIT TMR SIGNAL ------------------ */
+        do {
+            DHCPc_OS_TmrWait(&err);
+        } while (err != DHCPc_OS_ERR_NONE);
+
+
+                                                                /* ---------------- ACQUIRE DHCPc LOCK ---------------- */
+        DHCPc_OS_Lock(&err);                                    /* See Note #3.                                         */
+        if (err != DHCPc_OS_ERR_NONE) {
+            continue;
+        }
+
+                                                                /* --------------- HANDLE TMR TASK LIST --------------- */
+        ptmr = DHCPc_TmrListHead;                               /* Start @ Tmr List head.                               */
+        while (ptmr != (DHCPc_TMR *)0) {                        /* Handle  Tmr List tmrs.                               */
+
+            ptmr_next = ptmr->NextPtr;                          /* Set next tmr to update.                              */
+
+            if (ptmr->TmrVal > 1) {                             /* If tmr val > 1, dec tmr val.                         */
+                ptmr->TmrVal--;
+
+            } else {                                            /* Else tmr expired,              ...                   */
+
+                pcomm    = (DHCPc_COMM *)ptmr->Obj;             /* ... get obj                    ...                   */
+
+                pif_info = DHCPc_IF_InfoGetCfgd(pcomm->IF_Nbr); /* ... get if info                ...                   */
+                if (pif_info != ((DHCPc_IF_INFO *)0)) {
+                                                                /* ... get cur time (see Note #4) ...                   */
+                    pif_info->TmrExpirationTime = DHCPc_OS_TimeGet_tick();
+                }
+
+                DHCPc_TmrFree(ptmr);                            /* ... free tmr     (see Note #5) ...                   */
+                DHCPc_OS_MsgPost((void      *) pcomm,           /* ... & post obj to DHCP client task.                  */
+                                 (DHCPc_ERR *)&err);
+            }
+
+            ptmr = ptmr_next;
+        }
+
+                                                                /* ---------------- RELEASE DHCPc LOCK ---------------- */
+        DHCPc_OS_Unlock();
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_IF_InfoInit()
+*
+* Description : (1) Initialize DHCPc interface information :
+*
+*                   (a) Initialize interface information pool
+*                   (b) Initialize interface information table
+*                   (c) Initialize interface information list pointer
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DHCPc interface information successfully
+*                                                                   initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Init().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) Interface inforation pool MUST be initialized PRIOR to initializing the pool with
+*                   pointers to interface information.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_IF_InfoInit (DHCPc_ERR  *perr)
+{
+    DHCPc_IF_INFO      *pif_info;
+    DHCPc_IF_INFO_QTY   i;
+
+                                                                /* ---------------- INIT IF INFO POOL ----------------- */
+    DHCPc_InfoPoolPtr = (DHCPc_IF_INFO *)0;                     /* Init-clr DHCPc IF info pool (see Note #2).           */
+
+
+                                                                /* ----------------- INIT IF INFO TBL ----------------- */
+    pif_info = &DHCPc_InfoTbl[0];
+    for (i = 0; i < DHCPc_NBR_IF_INFO; i++) {
+        pif_info->ID       = (DHCPc_IF_INFO_QTY)i;
+        pif_info->Flags    =  DHCPc_FLAG_NONE;                  /* Init each IF info as NOT used.                       */
+
+#if (DHCPc_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        DHCPc_IF_InfoClr(pif_info);
+#endif
+
+        pif_info->NextPtr  =  DHCPc_InfoPoolPtr;                /* Free each IF info to info pool (see Note #2).        */
+        DHCPc_InfoPoolPtr  =  pif_info;
+
+        pif_info++;
+    }
+
+                                                                /* ---------------- INIT INFO LIST PTR ---------------- */
+    DHCPc_InfoListHead = (DHCPc_IF_INFO *)0;
+
+
+   *perr = DHCPc_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_IF_InfoGet()
+*
+* Description : (1) Allocate & initialize a DHCPc interface information :
+*
+*                   (a) Validate interface NOT attributed (see Note #2).
+*                   (b) Generate base transaction identifier
+*                   (c) Get        interface information
+*                   (d) Initialize interface information
+*                   (e) Insert     interface information at head of interface information list
+*                   (f) Return pointer to interface information
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*
+* Argument(s) : if_nbr      Interface number to get the interface information structure.
+*               ------      Argument validated in DHCPc_Start().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Interface information successfully allocated
+*                                                                   & initialized.
+*                               DHCPc_ERR_IF_INFO_IF_USED       Interface information already in use.
+*                               DHCPc_ERR_INVALID_HW_ADDR       Error retrieving interface's hardware address.
+*                               DHCPc_ERR_IF_INFO_NONE_AVAIL    Interface information pool empty.
+*
+* Return(s)   : Pointer to interface information, if NO errors.
+*
+*               Pointer to NULL,                  otherwise.
+*
+* Caller(s)   : DHCPc_Start().
+*
+* Note(s)     : (2) Only one interface information may exist for a given interface number.
+*
+*               (3) #### This implementation of the DHCP client presumes an Ethernet hardware type.
+*
+*               (4) The transaction ID (xid) it generated by taking the 3 least significant bytes of
+*                   the hardware address, left-shifted by one octet.
+*
+*               (5) The use of critical section is necessary to protect the data in the interface
+*                   information structures, since the function DHCPc_ChkStatus() does NOT get the DHCPc
+*                   lock when it access them.
+*********************************************************************************************************
+*/
+
+static  DHCPc_IF_INFO  *DHCPc_IF_InfoGet (NET_IF_NBR   if_nbr,
+                                          DHCPc_ERR   *perr)
+{
+    DHCPc_IF_INFO  *pif_info;
+    CPU_INT08U      addr_hw_len;
+    CPU_INT08U      addr_hw[NET_IF_ETHER_ADDR_SIZE];
+    CPU_INT32U      transaction_id_base;
+    NET_ERR         err_net;
+    CPU_SR_ALLOC();
+
+
+                                                                /* --------------- VALIDATE IF NBR USED --------------- */
+    pif_info = DHCPc_IF_InfoGetCfgd(if_nbr);
+    if (pif_info != ((DHCPc_IF_INFO *)0)) {                     /* If if nbr already has if info, ...                   */
+       *perr = DHCPc_ERR_IF_INFO_IF_USED;                       /* ... rtn err (see Note #2).                           */
+        return ((DHCPc_IF_INFO *)0);
+    }
+
+                                                                /* ---------- GENERATE TRANSACTION BASE NBR ----------- */
+    addr_hw_len = NET_IF_ETHER_ADDR_SIZE;                       /* See Note #3.                                         */
+    NetIF_AddrHW_Get(if_nbr,
+                    &addr_hw[0],
+                    &addr_hw_len,
+                    &err_net);
+
+    if ((err_net     != NET_IF_ERR_NONE) ||
+        (addr_hw_len != NET_IF_ETHER_ADDR_SIZE)) {
+       *perr = DHCPc_ERR_INVALID_HW_ADDR;
+        return ((DHCPc_IF_INFO *)0);
+    }
+
+                                                                /* Generate base transaction ID (see Note #4).          */
+    transaction_id_base = ((((CPU_INT32U)addr_hw[3]) << (3 * DEF_OCTET_NBR_BITS)) +
+                           (((CPU_INT32U)addr_hw[4]) << (2 * DEF_OCTET_NBR_BITS)) +
+                           (((CPU_INT32U)addr_hw[5]) << (1 * DEF_OCTET_NBR_BITS)));
+
+
+                                                                /* ------------------- GET IF INFO -------------------- */
+    if (DHCPc_InfoPoolPtr != (DHCPc_IF_INFO *)0) {              /* If if info pool NOT empty, get if info from pool.    */
+        pif_info           = (DHCPc_IF_INFO *)DHCPc_InfoPoolPtr;
+        DHCPc_InfoPoolPtr  = (DHCPc_IF_INFO *)pif_info->NextPtr;
+
+    } else {                                                    /* If none avail, rtn err.                              */
+       *perr = DHCPc_ERR_IF_INFO_NONE_AVAIL;
+        return ((DHCPc_IF_INFO *)0);
+    }
+
+                                                                /* ------------------- INIT IF INFO ------------------- */
+    DHCPc_IF_InfoClr(pif_info);
+    pif_info->PrevPtr       = (DHCPc_IF_INFO *)0;
+    pif_info->NextPtr       = (DHCPc_IF_INFO *)DHCPc_InfoListHead;
+    pif_info->IF_Nbr        =  if_nbr;
+    pif_info->LeaseStatus   =  DHCP_STATUS_CFG_IN_PROGRESS;
+    pif_info->TransactionID =  transaction_id_base;
+    DEF_BIT_SET(pif_info->Flags, DHCPc_FLAG_USED);              /* Set if info as used.                                 */
+
+                                                                /* --------- INSERT IF INFO INTO IF INFO LIST --------- */
+    CPU_CRITICAL_ENTER();                                       /* See Note #5.                                         */
+    if (DHCPc_InfoListHead != (DHCPc_IF_INFO *)0) {             /* If list NOT empty, insert before head.               */
+        DHCPc_InfoListHead->PrevPtr = pif_info;
+    }
+    DHCPc_InfoListHead = pif_info;                              /* Insert if info @ list head.                          */
+    CPU_CRITICAL_EXIT();
+
+
+   *perr =  DHCPc_ERR_NONE;
+
+    return (pif_info);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       DHCPc_IF_InfoGetCfgd()
+*
+* Description : Get interface information structure for configured interface.
+*
+* Argument(s) : if_nbr      Interface number to get the interface information structure.
+*
+* Return(s)   : Pointer to interface information structure, if interface configured with DHCP.
+*
+*               Pointer to NULL,                            otherwise.
+*
+* Caller(s)   : DHCPc_Stop(),
+*               DHCPc_ChkStatus(),
+*               DHCPc_TmrTaskHandler(),
+*               DHCPc_MsgRxHandler(),
+*               DHCPc_IF_InfoGet().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  DHCPc_IF_INFO  *DHCPc_IF_InfoGetCfgd (NET_IF_NBR  if_nbr)
+{
+    DHCPc_IF_INFO  *pif_info;
+    CPU_BOOLEAN     if_cfgd;
+
+
+    pif_info = DHCPc_InfoListHead;
+    if_cfgd  = DEF_NO;
+
+    while ((pif_info != (DHCPc_IF_INFO *)0) &&
+           (if_cfgd  !=  DEF_YES)) {
+        if (pif_info->IF_Nbr == if_nbr) {
+            if_cfgd = DEF_YES;
+
+        } else {
+            pif_info = pif_info->NextPtr;
+        }
+    }
+
+    if (if_cfgd != DEF_YES) {                                   /* If IF nbr NOT cfg'd, ...                             */
+        return ((DHCPc_IF_INFO *)0);                            /* ... rtn NULL ptr.                                    */
+    }
+
+    return (pif_info);                                          /* Else, rth ptr to IF info struct for cfg'd IF.        */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_IF_InfoFree()
+*
+* Description : (1) Free a DHCPc inteface information :
+*
+*                   (a) Remove interface information from    interface information list
+*                   (b) Clear  interface information controls
+*                   (c) Free   interface information back to interface information pool
+*
+*
+* Argument(s) : pif_info    Pointer to a DHCPc interface information.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Start(),
+*               DHCPc_StopStateHandler().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) #### To prevent freeing an interface information already freed via previous interface
+*                   information free, DHCPc_IF_InfoFree() checks the interface information's 'USED' flag
+*                   BEFORE freeing the interface information.
+*
+*                   This prevention is only best-effort since any invalid duplicate interface information
+*                   frees MAY be asynchronous to potentially valid interface information gets.  Thus the
+*                   invalid interface information free(s) MAY corrupt the interface information's valid
+*                   operation(s).
+*
+*                   However, since the primary tasks of the DHCP client are prevented from running
+*                   concurrently (see 'dhcp-c.h  Note #2'), it is NOT necessary to protect DHCPc
+*                   interface information resources from possible corruption since no asynchronous access
+*                   from other task is possible.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_IF_InfoFree (DHCPc_IF_INFO  *pif_info)
+{
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN     used;
+#endif
+    DHCPc_IF_INFO  *pprev;
+    DHCPc_IF_INFO  *pnext;
+    CPU_SR_ALLOC();
+
+
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (pif_info == (DHCPc_IF_INFO *)0) {
+        return;
+    }
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* -------------- VALIDATE IF INFO USED --------------- */
+    used = DEF_BIT_IS_SET(pif_info->Flags, DHCPc_FLAG_USED);
+    if (used != DEF_YES) {                                      /* If IF info NOT used, ...                             */
+        return;                                                 /* ... rtn but do NOT free (see Note #2).               */
+    }
+#endif
+
+                                                                /* --------- REMOVE IF INFO FROM IF INFO LIST --------- */
+    CPU_CRITICAL_ENTER();                                       /* See 'DHCPc_IF_InfoGet()  Note #5'.                   */
+    pprev = pif_info->PrevPtr;
+    pnext = pif_info->NextPtr;
+    if (pprev != (DHCPc_IF_INFO *)0) {                          /* If pif_info is NOT   the head of IF info list, ...   */
+        pprev->NextPtr    = pnext;                              /* ... set pprev's NextPtr to skip pif_info.            */
+    } else {                                                    /* Else set pnext as head of IF info list.              */
+        DHCPc_InfoListHead = pnext;
+    }
+    if (pnext != (DHCPc_IF_INFO *)0) {                          /* If pif_info is NOT @ the tail of IF info list, ...   */
+        pnext->PrevPtr    = pprev;                              /* ... set pnext's PrevPtr to skip pif_info.            */
+    }
+    CPU_CRITICAL_EXIT();
+
+                                                                /* ------------------- CLR IF INFO -------------------- */
+    DEF_BIT_CLR(pif_info->Flags, DHCPc_FLAG_USED);              /* Set IF info as NOT used.                             */
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+    DHCPc_IF_InfoClr(pif_info);
+#endif
+
+                                                                /* ------------------- FREE IF INFO ------------------- */
+    pif_info->NextPtr = DHCPc_InfoPoolPtr;
+    DHCPc_InfoPoolPtr = pif_info;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_IF_InfoClr()
+*
+* Description : Clear DHCPc interface information controls.
+*
+* Argument(s) : pif_info    Pointer to a DHCPc interface information.
+*               --------    Argument validated in DHCPc_IF_InfoInit(),
+*                                    checked   in DHCPc_IF_InfoGet(),
+*                                    checked   in DHCPc_IF_InfoFree().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_IF_InfoInit(),
+*               DHCPc_IF_InfoGet(),
+*               DHCPc_IF_InfoFree().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_IF_InfoClr (DHCPc_IF_INFO  *pif_info)
+{
+    pif_info->PrevPtr           = (DHCPc_IF_INFO *)0;
+    pif_info->NextPtr           = (DHCPc_IF_INFO *)0;
+
+    pif_info->IF_Nbr            =  NET_IF_NBR_NONE;
+    pif_info->ServerID          =  NET_IPv4_ADDR_NONE;
+
+    Mem_Clr((void     *)&pif_info->ParamReqTbl[0],
+            (CPU_SIZE_T) DHCPc_CFG_PARAM_REQ_TBL_SIZE);
+
+    pif_info->ParamReqQty       =  0;
+
+    pif_info->MsgPtr            = (DHCPc_MSG     *)0;
+
+    pif_info->ClientState       =  DHCP_STATE_NONE;
+    pif_info->LeaseStatus       =  DHCP_STATUS_NONE;
+    pif_info->LastErr           =  DHCPc_ERR_NONE;
+
+    pif_info->TransactionID     =  0;
+
+    pif_info->NegoStartTime     =  0;
+    pif_info->TmrExpirationTime =  0;
+
+    pif_info->LeaseTime_sec     =  0;
+    pif_info->T1_Time_sec       =  0;
+    pif_info->T2_Time_sec       =  0;
+
+    pif_info->Tmr               = (DHCPc_TMR     *)0;
+
+    pif_info->Flags             =  DHCPc_FLAG_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_MsgInit()
+*
+* Description : (1) Initialize DHCPc messages :
+*
+*                   (a) Initialize message pool
+*                   (b) Initialize message table
+*                   (c) Initialize message list pointer
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DHCPc message successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Init().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) Message pool MUST be initialized PRIOR to initializing the pool with pointers to
+*                   message.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_MsgInit (DHCPc_ERR  *perr)
+{
+    DHCPc_MSG      *pmsg;
+    DHCPc_MSG_QTY   i;
+
+                                                                /* ------------------ INIT MSG POOL ------------------- */
+    DHCPc_MsgPoolPtr = (DHCPc_MSG *)0;                          /* Init-clr DHCPc msg pool (see Note #2).               */
+
+
+                                                                /* ------------------- INIT MSG TBL ------------------- */
+    pmsg = &DHCPc_MsgTbl[0];
+    for (i = 0; i < DHCPc_NBR_MSG_BUF; i++) {
+        pmsg->ID         = (DHCPc_MSG_QTY)i;
+        pmsg->Flags      =  DHCPc_FLAG_NONE;                    /* Init each msg as NOT used.                           */
+
+#if (DHCPc_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        DHCPc_MsgClr(pmsg);
+#endif
+
+        pmsg->NextPtr    =  DHCPc_MsgPoolPtr;                   /* Free each msg to msg pool (see Note #2).             */
+        DHCPc_MsgPoolPtr =  pmsg;
+
+        pmsg++;
+    }
+
+                                                                /* ---------------- INIT MSG LIST PTR ----------------- */
+    DHCPc_MsgListHead = (DHCPc_MSG *)0;
+
+
+   *perr = DHCPc_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc_MsgRxHandler()
+*
+* Description : (1) Handle messages received from timers and DHCP API functions :
+*
+*                   (a) Get interface information structure
+*                   (b) Demultiplex message
+*
+*
+* Argument(s) : pcomm       Pointer to DHCP communication object.
+*               -----       Argument checked in DHCPc_TaskHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TaskHandler().
+*
+* Note(s)     : (2) The communication object SHOULD be freed PRIOR to executing the appropriate action.
+*                   This ensures that at least one communication object is available if the taken action
+*                   requires a communication object.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_MsgRxHandler (DHCPc_COMM  *pcomm)
+{
+    NET_IF_NBR       if_nbr;
+    DHCPc_IF_INFO   *pif_info;
+    DHCPc_COMM_MSG   msg;
+    DHCPc_ERR        err;
+    CPU_SR_ALLOC();
+
+
+    if_nbr = pcomm->IF_Nbr;
+    msg    = pcomm->CommMsg;
+
+    DHCPc_CommFree(pcomm);                                      /* Free comm obj (see Note #2).                         */
+
+
+                                                                /* ---------- GET IF INFO STRUCT FROM IF NBR ---------- */
+    pif_info = DHCPc_IF_InfoGetCfgd(if_nbr);
+    if (pif_info == ((DHCPc_IF_INFO *)0)) {                     /* If IF NOT cfg'd, ...                                 */
+        return;                                                 /* ... rtn.                                             */
+    }
+
+                                                                /* -------------------- DEMUX MSG --------------------- */
+    switch (msg) {
+        case DHCPc_COMM_MSG_START:                              /* If nego starting ...                                 */
+        case DHCPc_COMM_MSG_LEASE_EXPIRED:                      /* ... or lease expired, ...                            */
+             CPU_CRITICAL_ENTER();
+             pif_info->LeaseStatus = DHCP_STATUS_CFG_IN_PROGRESS;
+             CPU_CRITICAL_EXIT();
+
+             DHCPc_InitStateHandler(pif_info, &err);            /* ... go into INIT state.                              */
+             switch (err) {
+                 case DHCPc_ERR_NONE:
+                      CPU_CRITICAL_ENTER();
+                      pif_info->LeaseStatus = DHCP_STATUS_CFGD;
+                      CPU_CRITICAL_EXIT();
+                      break;
+
+
+                 case DHCPc_ERR_NONE_NO_TMR:
+                      CPU_CRITICAL_ENTER();
+                      pif_info->LeaseStatus = DHCP_STATUS_CFGD_NO_TMR;
+                      CPU_CRITICAL_EXIT();
+                      break;
+
+
+                 case DHCPc_ERR_NONE_LOCAL_LINK:
+                      CPU_CRITICAL_ENTER();
+                      pif_info->LeaseStatus = DHCP_STATUS_CFGD_LOCAL_LINK;
+                      CPU_CRITICAL_EXIT();
+                      break;
+
+
+                 default:
+                      CPU_CRITICAL_ENTER();
+                      pif_info->LeaseStatus = DHCP_STATUS_FAIL;
+                      pif_info->LastErr     = err;
+                      CPU_CRITICAL_EXIT();
+                      break;
+             }
+             break;
+
+
+        case DHCPc_COMM_MSG_T1_EXPIRED:                         /* If T1 or T2 expired, ...                             */
+        case DHCPc_COMM_MSG_T2_EXPIRED:
+             DHCPc_RenewRebindStateHandler(pif_info, msg, &err);/* ... go into RENEWING/REBINDING state.                */
+             switch (err) {
+                 case DHCPc_ERR_NONE:
+                 case DHCPc_ERR_INIT_SOCK:
+                      break;                                    /* Already cfg'd, status set.                           */
+
+
+                 case DHCPc_ERR_NONE_NO_TMR:
+                      CPU_CRITICAL_ENTER();
+                      pif_info->LeaseStatus = DHCP_STATUS_CFGD_NO_TMR;
+                      CPU_CRITICAL_EXIT();
+                      break;
+
+
+                 default:
+                      CPU_CRITICAL_ENTER();
+                      pif_info->LeaseStatus = DHCP_STATUS_FAIL;
+                      pif_info->LastErr     = err;
+                      CPU_CRITICAL_EXIT();
+                      break;
+             }
+             break;
+
+
+        case DHCPc_COMM_MSG_STOP:                               /* If nego stopping, ...                                */
+             DHCPc_StopStateHandler(pif_info, &err);            /* ... go into STOP state.                              */
+             break;
+
+
+        case DHCPc_COMM_MSG_NONE:                               /* Else, ...                                            */
+        default:
+             break;                                             /* ... do nothing.                                      */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_MsgGet()
+*
+* Description : (1) Allocate & initialize a DHCPc message :
+*
+*                   (a) Get        message
+*                   (b) Initialize message
+*                   (c) Insert     message at head of message list
+*                   (d) Return pointer to message
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Message successfully allocated & initialized.
+*                               DHCPc_ERR_MSG_NONE_AVAIL        Message pool empty.
+*
+* Return(s)   : Pointer to message, if NO errors.
+*
+*               Pointer to NULL,    otherwise.
+*
+* Caller(s)   : DHCPc_Discover(),
+*               DHCPc_Req(),
+*               DHCPc_DeclineRelease().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  DHCPc_MSG  *DHCPc_MsgGet (DHCPc_ERR  *perr)
+{
+    DHCPc_MSG  *pmsg;
+
+                                                                /* --------------------- GET MSG ---------------------- */
+    if (DHCPc_MsgPoolPtr != (DHCPc_MSG *)0) {                   /* If msg pool NOT empty, get msg from pool.            */
+        pmsg              = (DHCPc_MSG *)DHCPc_MsgPoolPtr;
+        DHCPc_MsgPoolPtr  = (DHCPc_MSG *)pmsg->NextPtr;
+
+    } else {                                                    /* If none avail, rtn err.                              */
+       *perr = DHCPc_ERR_MSG_NONE_AVAIL;
+        return ((DHCPc_MSG *)0);
+    }
+
+                                                                /* --------------------- INIT MSG --------------------- */
+    DHCPc_MsgClr(pmsg);
+    pmsg->PrevPtr = (DHCPc_MSG *)0;
+    pmsg->NextPtr = (DHCPc_MSG *)DHCPc_MsgListHead;
+    DEF_BIT_SET(pmsg->Flags, DHCPc_FLAG_USED);                  /* Set msg as used.                                     */
+
+                                                                /* ------------- INSERT MSG INTO MSG LIST ------------- */
+    if (DHCPc_MsgListHead != (DHCPc_MSG *)0) {                  /* If list NOT empty, insert before head.               */
+        DHCPc_MsgListHead->PrevPtr = pmsg;
+    }
+    DHCPc_MsgListHead = pmsg;                                   /* Insert msg @ list head.                              */
+
+
+   *perr =  DHCPc_ERR_NONE;
+
+    return (pmsg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DHCPc_MsgGetOpt()
+*
+* Description : Retrieve the specified option value from a DHCP message buffer.
+*
+* Argument(s) : opt_code            Option code to return value of.
+*
+*               pmsg_buf            Pointer to DHCP message buffer to search.
+*
+*               msg_buf_size        Size of message buffer (in octets).
+*
+*               popt_val_len        Pointer to variable that will receive the length of the option value.
+*
+* Return(s)   : Pointer to the specified option value, if option found without error.
+*
+*               Pointer tu NULL,                       otherwise.
+*
+* Caller(s)   : DHCPc_Discover(),
+*               DHCPc_LeaseTimeCalc(),
+*               DHCPc_AddrCfg(),
+*               DHCPc_RxReply().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  *DHCPc_MsgGetOpt (DHCPc_OPT_CODE   opt_code,
+                                      CPU_INT08U      *pmsg_buf,
+                                      CPU_INT16U       msg_buf_size,
+                                      CPU_INT08U      *popt_val_len)
+{
+    CPU_INT32U    magic_cookie;
+    CPU_BOOLEAN   opt_start;
+    CPU_BOOLEAN   opt_found;
+    CPU_INT08U   *popt;
+    CPU_INT08U   *popt_val;
+    CPU_INT08U   *pend_msg;
+
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                   /* ------------------- VALIDATE PTR ------------------- */
+    if (popt_val_len == (CPU_INT08U *)0) {
+        return ((CPU_INT08U *)0);
+    }
+
+    if (pmsg_buf == (CPU_INT08U *)0) {
+        return ((CPU_INT08U *)0);
+    }
+#endif
+
+   *popt_val_len =  0;                                          /* Cfg rtn opt val len for err.                         */
+
+
+    popt = pmsg_buf + DHCP_MSG_HDR_SIZE;
+
+                                                                /* -------- VALIDATE BEGINNING OF OPT SECTION --------- */
+    magic_cookie = NET_UTIL_HOST_TO_NET_32(DHCP_MAGIC_COOKIE);
+    opt_start = Mem_Cmp((void     *) popt,
+                        (void     *)&magic_cookie,
+                        (CPU_SIZE_T) DHCP_MAGIC_COOKIE_SIZE);
+
+    if (opt_start != DEF_YES) {                                 /* If magic cookie NOT here, ...                        */
+        return ((CPU_INT08U *)0);                               /* ... rtn.                                             */
+    }
+
+    popt += DHCP_MAGIC_COOKIE_SIZE;                             /* Go to first opt.                                     */
+
+
+                                                                /* --------------------- SRCH OPT --------------------- */
+    opt_found = DEF_NO;
+    pend_msg  = pmsg_buf + msg_buf_size;
+
+    while ((opt_found != DEF_YES)      &&                       /* Srch until opt found,                                */
+           (*popt     != DHCP_OPT_END) &&                       /* & opt end    NOT reached,                            */
+           ( popt     <= pend_msg)) {                           /* & end of msg NOT reached.                            */
+
+        if (*popt == opt_code) {                                /* If popt equals srch'd opt code, ...                  */
+            opt_found = DEF_YES;                                /* ... opt found.                                       */
+
+        } else if (*popt == DHCP_OPT_PAD) {                     /* If popt is padding, ...                              */
+            popt++;                                             /* ... advance.                                         */
+
+        } else {                                                /* Else, another opt found,  ...                        */
+                                                                /* ... skip to next opt.                                */
+            popt += ((*(popt + DHCP_OPT_FIELD_CODE_LEN)) + DHCP_OPT_FIELD_HDR_LEN);
+        }
+    }
+
+
+    if (opt_found != DEF_YES) {
+        return ((CPU_INT08U *)0);
+    }
+
+   *popt_val_len = *(popt + DHCP_OPT_FIELD_CODE_LEN);          /* Set opt val len ...                                  */
+    popt_val     =   popt + DHCP_OPT_FIELD_HDR_LEN;            /* ... & set opt val ptr.                               */
+
+    return (popt_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_MsgFree()
+*
+* Description : (1) Free a DHCPc message :
+*
+*                   (a) Remove message from    message list
+*                   (b) Clear  message controls
+*                   (c) Free   message back to message pool
+*
+*
+* Argument(s) : pmsg        Pointer to a DHCPc message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_StopStateHandler(),
+*               DHCPc_Discover(),
+*               DHCPc_Req(),
+*               DHCPc_DeclineRelease().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) #### To prevent freeing a message already freed via previous message free,
+*                   DHCPc_MsgFree() checks the message's 'USED' flag BEFORE freeing the message.
+*
+*                   This prevention is only best-effort since any invalid duplicate message frees MAY be
+*                   asynchronous to potentially valid message gets.  Thus the invalid message free(s) MAY
+*                   corrupt the message's valid operation(s).
+*
+*                   However, since the primary tasks of the DHCP client are prevented from running
+*                   concurrently (see 'dhcp-c.h  Note #2'), it is NOT necessary to protect DHCPc
+*                   message resources from possible corruption since no asynchronous access from other
+*                   task is possible.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_MsgFree (DHCPc_MSG  *pmsg)
+{
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN   used;
+#endif
+    DHCPc_MSG    *pprev;
+    DHCPc_MSG    *pnext;
+
+
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (pmsg == (DHCPc_MSG *)0) {
+        return;
+    }
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE MSG USED ----------------- */
+    used = DEF_BIT_IS_SET(pmsg->Flags, DHCPc_FLAG_USED);
+    if (used != DEF_YES) {                                      /* If msg NOT used, ...                                 */
+        return;                                                 /* ... rtn but do NOT free (see Note #2).               */
+    }
+#endif
+
+                                                                /* ------------- REMOVE MSG FROM MSG LIST ------------- */
+    pprev = pmsg->PrevPtr;
+    pnext = pmsg->NextPtr;
+    if (pprev != (DHCPc_MSG *)0) {                              /* If pmsg is NOT   the head of msg list, ...           */
+        pprev->NextPtr    = pnext;                              /* ... set pprev's NextPtr to skip pmsg.                */
+    } else {                                                    /* Else set pnext as head of msg list.                  */
+        DHCPc_MsgListHead = pnext;
+    }
+    if (pnext != (DHCPc_MSG *)0) {                              /* If pmsg is NOT @ the tail of msg list, ...           */
+        pnext->PrevPtr    = pprev;                              /* ... set pnext's PrevPtr to skip pmsg.                */
+    }
+
+                                                                /* ---------------------- CLR MSG --------------------- */
+    DEF_BIT_CLR(pmsg->Flags, DHCPc_FLAG_USED);                  /* Set msg as NOT used.                                 */
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+    DHCPc_MsgClr(pmsg);
+#endif
+
+                                                                /* --------------------- FREE MSG --------------------- */
+    pmsg->NextPtr    = DHCPc_MsgPoolPtr;
+    DHCPc_MsgPoolPtr = pmsg;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_MsgClr()
+*
+* Description : Clear DHCPc message controls.
+*
+* Argument(s) : pmsg        Pointer to a DHCPc message.
+*               ----        Argument validated in DHCPc_MsgInit(),
+*                                    checked   in DHCPc_MsgGet(),
+*                                    checked   in DHCPc_MsgFree().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_MsgInit(),
+*               DHCPc_MsgGet(),
+*               DHCPc_MsgFree().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_MsgClr (DHCPc_MSG  *pmsg)
+{
+    pmsg->PrevPtr = (DHCPc_MSG *)0;
+    pmsg->NextPtr = (DHCPc_MSG *)0;
+
+    Mem_Clr((void     *)&pmsg->MsgBuf[0],
+            (CPU_SIZE_T) DHCP_MSG_BUF_SIZE);
+
+    pmsg->MsgLen  =  0;
+    pmsg->Flags   =  DHCPc_FLAG_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DHCPc_CommInit()
+*
+* Description : (1) Initialize DHCPc communication objects :
+*
+*                   (a) Initialize communication object pool
+*                   (b) Initialize communication object table
+*                   (c) Initialize communication object list pointer
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DHCPc communication objects successfully
+*                                                                   initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Init().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) Communication object pool MUST be initialized PRIOR to initializing the pool with
+*                   pointers to communication objects.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_CommInit (DHCPc_ERR  *perr)
+{
+    DHCPc_COMM      *pcomm;
+    DHCPc_COMM_QTY   i;
+
+                                                                /* ---------------- INIT COMM OBJ POOL ---------------- */
+    DHCPc_CommPoolPtr = (DHCPc_COMM *)0;                        /* Init-clr DHCPc comm obj pool (see Note #2).          */
+
+
+                                                                /* ----------------- INIT COMM OBJ TBL ---------------- */
+    pcomm = &DHCPc_CommTbl[0];
+    for (i = 0; i < DHCPc_NBR_COMM; i++) {
+        pcomm->ID         = (DHCPc_COMM_QTY)i;
+        pcomm->Flags      =  DHCPc_FLAG_NONE;                   /* Init each comm obj as NOT used.                      */
+
+#if (DHCPc_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        DHCPc_CommClr(pcomm);
+#endif
+
+        pcomm->NextPtr    = DHCPc_CommPoolPtr;                  /* Free each comm obj to comm obj pool (see Note #2).   */
+        DHCPc_CommPoolPtr = pcomm;
+
+        pcomm++;
+    }
+
+                                                                /* -------------- INIT COMM OBJ LIST PTR -------------- */
+    DHCPc_CommListHead = (DHCPc_COMM *)0;
+
+
+   *perr = DHCPc_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_CommGet()
+*
+* Description : (1) Allocate & initialize a DHCPc communication object :
+*
+*                   (a) Get        communication object
+*                   (b) Initialize communication object
+*                   (c) Insert     communication object at head of communication object list
+*                   (d) Return pointer to communication object
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*
+* Argument(s) : if_nbr          Interface number requesting a communication object.
+*
+*               comm_msg        Message to pass.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Communication object successfully allocated
+*                                                                   & initialized.
+*                               DHCPc_ERR_COMM_NONE_AVAIL       Communication object pool empty.
+*
+* Return(s)   : Pointer to communication object, if NO errors.
+*
+*               Pointer to NULL,                 otherwise.
+*
+* Caller(s)   : DHCPc_Start(),
+*               DHCPc_Stop(),
+*               DHCPc_TmrCfg().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  DHCPc_COMM  *DHCPc_CommGet (NET_IF_NBR       if_nbr,
+                                    DHCPc_COMM_MSG   comm_msg,
+                                    DHCPc_ERR       *perr)
+{
+    DHCPc_COMM  *pcomm;
+
+
+                                                                /* ------------------- GET COMM OBJ ------------------- */
+    if (DHCPc_CommPoolPtr != (DHCPc_COMM *)0) {                 /* If comm obj pool NOT empty, get comm obj from pool   */
+        pcomm              = (DHCPc_COMM *)DHCPc_CommPoolPtr;
+        DHCPc_CommPoolPtr  = (DHCPc_COMM *)pcomm->NextPtr;
+
+    } else {                                                    /* If none avail, rtn err.                              */
+       *perr = DHCPc_ERR_COMM_NONE_AVAIL;
+        return ((DHCPc_COMM *)0);
+    }
+
+                                                                /* ------------------ INIT COMM OBJ ------------------- */
+    DHCPc_CommClr(pcomm);
+    pcomm->PrevPtr = (DHCPc_COMM *)0;
+    pcomm->NextPtr = (DHCPc_COMM *)DHCPc_CommListHead;
+    pcomm->IF_Nbr  =  if_nbr;
+    pcomm->CommMsg =  comm_msg;
+    DEF_BIT_SET(pcomm->Flags, DHCPc_FLAG_USED);                 /* Set comm obj as used.                                */
+
+                                                                /* -------- INSERT COMM OBJ INTO COMM OBJ LIST -------- */
+    if (DHCPc_CommListHead != (DHCPc_COMM *)0) {                /* If list NOT empty, insert before head.               */
+        DHCPc_CommListHead->PrevPtr = pcomm;
+    }
+    DHCPc_CommListHead = pcomm;                                 /* Insert comm obj @ list head.                         */
+
+
+   *perr =  DHCPc_ERR_NONE;
+
+    return (pcomm);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DHCPc_CommFree()
+*
+* Description : (1) Free a DHCPc communication object :
+*
+*                   (a) Remove communication object from    communication object list
+*                   (b) Clear  communication object controls
+*                   (c) Free   communication object back to communication object pool
+*
+*
+* Argument(s) : pcomm       Pointer to a DHCPc communication object.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Start(),
+*               DHCPc_Stop(),
+*               DHCPc_MsgRxHandler(),
+*               DHCPc_TmrCfg().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) #### To prevent freeing a communication object already freed via previous communication
+*                   object free, DHCPc_CommFree() checks the communication object's 'USED' flag BEFORE
+*                   freeing the communication object.
+*
+*                   This prevention is only best-effort since any invalid duplicate communication object
+*                   frees MAY be asynchronous to potentially valid communication object gets.  Thus the
+*                   invalid communication object free(s) MAY corrupt the communicatino object's valid
+*                   operation(s).
+*
+*                   However, since the primary tasks of the DHCP client are prevented from running
+*                   concurrently (see 'dhcp-c.h  Note #2'), it is NOT necessary to protect DHCPc
+*                   communication object resources from possible corruption since no asynchronous access
+*                   from other task is possible.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_CommFree (DHCPc_COMM  *pcomm)
+{
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN   used;
+#endif
+    DHCPc_COMM   *pprev;
+    DHCPc_COMM   *pnext;
+
+
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (pcomm == (DHCPc_COMM *)0) {
+        return;
+    }
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* -------------- VALIDATE COMM OBJ USED -------------- */
+    used = DEF_BIT_IS_SET(pcomm->Flags, DHCPc_FLAG_USED);
+    if (used != DEF_YES) {                                      /* If comm obj NOT used, ...                            */
+        return;                                                 /* ... rtn but do NOT free (see Note #2).               */
+    }
+#endif
+
+                                                                /* -------- REMOVE COMM OBJ FROM COMM OBJ LIST -------- */
+    pprev = pcomm->PrevPtr;
+    pnext = pcomm->NextPtr;
+    if (pprev != (DHCPc_COMM *)0) {                             /* If pcomm is NOT   the head of comm obj list, ...     */
+        pprev->NextPtr     = pnext;                             /* ... set pprev's NextPtr to skip pcomm.               */
+    } else {                                                    /* Else set pnext as head of comm obj list.             */
+        DHCPc_CommListHead = pnext;
+    }
+    if (pnext != (DHCPc_COMM *)0) {                             /* If pcomm is NOT @ the tail of comm obj list, ...     */
+        pnext->PrevPtr     = pprev;                             /* ... set pnext's PrevPtr to skip pcomm.               */
+    }
+
+                                                                /* ------------------- CLR COMM OBJ ------------------- */
+    DEF_BIT_CLR(pcomm->Flags, DHCPc_FLAG_USED);                 /* Set comm obj as NOT used.                            */
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+    DHCPc_CommClr(pcomm);
+#endif
+
+                                                                /* ------------------ FREE COMM OBJ ------------------- */
+    pcomm->NextPtr    = DHCPc_CommPoolPtr;
+    DHCPc_CommPoolPtr = pcomm;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_CommClr()
+*
+* Description : Clear DHCPc communication object controls.
+*
+* Argument(s) : pcomm       Pointer to a DHCPc communication object.
+*               ----        Argument validated in DHCPc_CommInit(),
+*                                    checked   in DHCPc_CommGet(),
+*                                    checked   in DHCPc_CommFree().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_CommInit(),
+*               DHCPc_CommGet(),
+*               DHCPc_CommFree().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_CommClr (DHCPc_COMM  *pcomm)
+{
+    pcomm->PrevPtr = (DHCPc_COMM *)0;
+    pcomm->NextPtr = (DHCPc_COMM *)0;
+
+    pcomm->IF_Nbr  =  0;
+    pcomm->CommMsg =  DHCPc_COMM_MSG_NONE;
+
+    pcomm->Flags   =  DHCPc_FLAG_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_TmrInit()
+*
+* Description : (1) Initialize DHCPc :
+*
+*                   (a) Perform Timer/OS initialization
+*                   (b) Perform Task/OS  initialization
+*                   (c) Initialize timer pool
+*                   (d) Initialize timer table
+*                   (e) Initialize timer list pointer
+*
+*
+* Argument(s) : perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                      DHCPc timer module successfully initialized.
+*
+*                                                                   ----- RETURNED BY DHCPc_OS_TmrInit() : ------
+*                               DHCPc_OS_ERR_INIT_TMR               DHCPc timer                NOT successfully
+*                                                                       initialized.
+*                               DHCPc_OS_ERR_INIT_TMR_SIGNAL        DHCPc timer    signal      NOT successfully
+*                                                                       initialized.
+*                               DHCPc_OS_ERR_INIT_TMR_SIGNAL_NAME   DHCPc timer    signal name NOT successfully
+*                                                                       initialized.
+*                               DHCPc_OS_ERR_INIT_TMR_TASK          DHCPc timer    task        NOT successfully
+*                                                                       initialized.
+*                               DHCPc_OS_ERR_INIT_TMR_TASK_NAME     DHCPc timer    task name   NOT successfully
+*                                                                       configured.
+*
+*                                                                   ----- RETURNED BY DHCPc_OS_TaskInit() : -----
+*                               DHCPc_OS_ERR_INIT_TASK              DHCPc task      NOT successfully initialized.
+*                               DHCPc_OS_ERR_INIT_TASK_NAME         DHCPc task name NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Init().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) Timer pool MUST be initialized PRIOR to initializing the pool with pointers to timers.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_TmrInit (DHCPc_ERR  *perr)
+{
+    DHCPc_TMR      *ptmr;
+    DHCPc_TMR_QTY   i;
+
+
+                                                                /* -------------- PERFORM TIMER/OS INIT --------------- */
+    DHCPc_OS_TmrInit(perr);                                     /* Create DHCPc Tmr & Tmr Task.                         */
+    if (*perr != DHCPc_OS_ERR_NONE) {
+        return;
+    }
+
+                                                                /* --------------- PERFORM TASK/OS INIT --------------- */
+    DHCPc_OS_TaskInit(perr);                                    /* Create DHCPc Task.                                   */
+    if (*perr != DHCPc_OS_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------------ INIT TMR POOL ------------------- */
+    DHCPc_TmrPoolPtr = (DHCPc_TMR *)0;                          /* Init-clr DHCPc tmr pool (see Note #2).               */
+
+
+                                                                /* ------------------ INIT TMR TBL -------------------- */
+    ptmr = &DHCPc_TmrTbl[0];
+    for (i = 0; i < DHCPc_NBR_TMR; i++) {
+        ptmr->ID    = (DHCPc_TMR_QTY)i;
+        ptmr->Flags =  DHCPc_FLAG_NONE;                         /* Init each tmr as NOT used.                           */
+
+#if (DHCPc_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        DHCPc_TmrClr(ptmr);
+#endif
+
+        ptmr->NextPtr    = DHCPc_TmrPoolPtr;                    /* Free each tmr to tmr pool (see Note #2).             */
+        DHCPc_TmrPoolPtr = ptmr;
+
+        ptmr++;
+    }
+
+                                                                /* ---------------- INIT TMR LIST PTR ----------------- */
+    DHCPc_TmrListHead = (DHCPc_TMR *)0;
+
+
+   *perr = DHCPc_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_TmrCfg()
+*
+* Description : (1) Configure & insert a timer.
+*
+*                   (a) Get communication object
+*                   (b) Get timer
+*
+*
+* Argument(s) : pif_info        Pointer to DHCP interface information structure.
+*               --------        Argument checked   in DHCPc_MsgRxHandler(),
+*                                        validated in DHCPc_LeaseTimeCalc(),
+*                                                     DHCPc_LeaseTimeUpdate().
+*
+*               tmr_msg         Timer expiration message.
+*
+*               time_sec        Initial timer value (in seconds) [see Note #2].
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Timer successfully configured.
+*                               DHCPc_ERR_TMR_INVALID_MSG       Invalid timer message.
+*
+*                                                               --- RETURNED BY DHCPc_MsgGet() : ---
+*                               DHCPc_ERR_COMM_NONE_AVAIL       Communication object pool empty.
+*
+*                                                               --- RETURNED BY DHCPc_TmrGet() : ---
+*                               DHCPc_ERR_TMR_NONE_AVAIL        Timer pool empty.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_MsgRxHandler(),
+*               DHCPc_LeaseTimeCalc(),
+*               DHCPc_LeaseTimeUpdate().
+*
+* Note(s)     : (2) Timer value of 0 ticks/seconds allowed; next tick will expire timer.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_TmrCfg (DHCPc_IF_INFO   *pif_info,
+                            DHCPc_COMM_MSG   tmr_msg,
+                            CPU_INT32U       time_sec,
+                            DHCPc_ERR       *perr)
+{
+    DHCPc_COMM      *pcomm;
+    DHCPc_TMR_TICK   time_tick;
+
+
+                                                                /* ----------------- VALIDATE TMR MSG ----------------- */
+    switch (tmr_msg) {
+        case DHCPc_COMM_MSG_START:
+        case DHCPc_COMM_MSG_T1_EXPIRED:
+        case DHCPc_COMM_MSG_T2_EXPIRED:
+        case DHCPc_COMM_MSG_LEASE_EXPIRED:
+             break;
+
+
+        default:
+            *perr = DHCPc_ERR_TMR_INVALID_MSG;
+             return;
+    }
+
+
+    if (time_sec == DHCP_LEASE_INFINITE) {                      /* If time infinite, ...                                */
+       *perr = DHCPc_ERR_NONE;                                  /* ... rtn.                                             */
+        return;
+    }
+
+                                                                /* --------------------- CFG TMR ---------------------- */
+                                                                /* Get comm obj,                                        */
+    pcomm = DHCPc_CommGet((NET_IF_NBR    )pif_info->IF_Nbr,
+                          (DHCPc_COMM_MSG)tmr_msg,
+                          (DHCPc_ERR    *)perr);
+    if (*perr != DHCPc_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ... & set tmr.                                       */
+    time_tick     = (time_sec / DHCPc_TMR_PERIOD_SEC);
+    pif_info->Tmr =  DHCPc_TmrGet((void         *)pcomm,
+                                  (DHCPc_TMR_TICK)time_tick,
+                                  (DHCPc_ERR    *)perr);
+    if (*perr != DHCPc_ERR_NONE) {
+         DHCPc_CommFree(pcomm);
+         return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_TmrGet()
+*
+* Description : (1) Allocate & initialize a DHCPc timer :
+*
+*                   (a) Get        timer
+*                   (b) Validate   timer
+*                   (c) Initialize timer
+*                   (d) Insert     timer at head of timer list
+*                   (e) Return pointer to timer
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*               (2) The timer pool is implemented as a stack :
+*
+*                   (a) 'DHCPc_TmrPoolPtr' points to the head of the timer pool.
+*
+*                   (b) Timers' 'NextPtr's link each timer to form   the timer pool stack.
+*
+*                   (c) Timers are inserted & removed at the head of the timer pool stack.
+*
+*
+*                                        Timers are
+*                                    inserted & removed
+*                                        at the head
+*                                      (see Note #2c)
+*
+*                                             |                NextPtr
+*                                             |            (see Note #2b)
+*                                             v                   |
+*                                                                 |
+*                                          -------       -------  v    -------       -------
+*                         Timer Pool  ---->|     |------>|     |------>|     |------>|     |
+*                          Pointer         |     |       |     |       |     |       |     |
+*                                          |     |       |     |       |     |       |     |
+*                       (see Note #2a)     -------       -------       -------       -------
+*
+*                                          |                                               |
+*                                          |<------------ Pool of Free Timers ------------>|
+*                                          |                 (see Note #2)                 |
+*
+*
+* Argument(s) : pobj        Pointer to object that requests a timer.
+*               ----        Argument validated in DHCPc_TmrCfg().
+*
+*               time_tick   Initial timer value (in 'DHCPc_TMR_TICK' ticks) [see Note #3].
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Timer successfully allocated & initialized.
+*                               DHCPc_ERR_TMR_NONE_AVAIL        Timer pool empty.
+*
+* Return(s)   : Pointer to timer, if NO errors.
+*
+*               Pointer to NULL,  otherwise.
+*
+* Caller(s)   : DHCPc_TmrCfg().
+*
+* Note(s)     : (3) Timer value of 0 ticks/seconds allowed; next tick will expire timer.
+*********************************************************************************************************
+*/
+
+static  DHCPc_TMR  *DHCPc_TmrGet (void            *pobj,
+                                  DHCPc_TMR_TICK   time_tick,
+                                  DHCPc_ERR       *perr)
+{
+    DHCPc_TMR  *ptmr;
+
+
+                                                                /* --------------------- GET TMR ---------------------- */
+    if (DHCPc_TmrPoolPtr != (DHCPc_TMR *)0) {                   /* If tmr pool NOT empty, get tmr from pool.            */
+        ptmr              = (DHCPc_TMR *)DHCPc_TmrPoolPtr;
+        DHCPc_TmrPoolPtr  = (DHCPc_TMR *)ptmr->NextPtr;
+
+    } else {                                                    /* If none avail, rtn err.                              */
+       *perr = DHCPc_ERR_TMR_NONE_AVAIL;
+        return ((DHCPc_TMR *)0);
+    }
+
+
+                                                                /* --------------------- INIT TMR --------------------- */
+    DHCPc_TmrClr(ptmr);
+    ptmr->PrevPtr = (DHCPc_TMR *)0;
+    ptmr->NextPtr = (DHCPc_TMR *)DHCPc_TmrListHead;
+    ptmr->Obj     = pobj;
+    ptmr->TmrVal  = time_tick;                                  /* Set tmr val (in ticks).                              */
+    DEF_BIT_SET(ptmr->Flags, DHCPc_FLAG_USED);                  /* Set tmr as used.                                     */
+
+                                                                /* ------------- INSERT TMR INTO TMR LIST ------------- */
+    if (DHCPc_TmrListHead != (DHCPc_TMR *)0) {                  /* If list NOT empty, insert before head.               */
+        DHCPc_TmrListHead->PrevPtr = ptmr;
+    }
+    DHCPc_TmrListHead = ptmr;                                   /* Insert tmr @ list head.                              */
+
+
+   *perr =  DHCPc_ERR_NONE;
+
+    return (ptmr);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_TmrFree()
+*
+* Description : (1) Free a DHCPc timer :
+*
+*                   (a) Remove timer from    timer list
+*                   (b) Clear  timer controls
+*                   (c) Free   timer back to timer pool
+*
+*
+* Argument(s) : ptmr        Pointer to a DHCPc timer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_TmrTaskHandler(),
+*               DHCPc_StopStateHandler().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) #### To prevent freeing a timer already freed via previous timer free,
+*                   DHCPc_TmrFree() checks the timer's 'USED' flag BEFORE freeing the timer.
+*
+*                   This prevention is only best-effort since any invalid duplicate timer frees MAY be
+*                   asynchronous to potentially valid timer gets.  Thus the invalid timer free(s) MAY
+*                   corrupt the timer's valid operation(s).
+*
+*                   However, since the primary tasks of the DHCP client are prevented from running
+*                   concurrently (see 'dhcp-c.h  Note #2'), it is NOT necessary to protect DHCPc
+*                   timer resources from possible corruption since no asynchronous access from other
+*                   task is possible.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_TmrFree (DHCPc_TMR  *ptmr)
+{
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN   used;
+#endif
+    DHCPc_TMR    *pprev;
+    DHCPc_TMR    *pnext;
+
+
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (ptmr == (DHCPc_TMR *)0) {
+        return;
+    }
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE TMR USED ----------------- */
+    used = DEF_BIT_IS_SET(ptmr->Flags, DHCPc_FLAG_USED);
+    if (used != DEF_YES) {                                      /* If tmr NOT used, ...                                 */
+        return;                                                 /* ... rtn but do NOT free (see Note #2).               */
+    }
+#endif
+
+                                                                /* ------------- REMOVE TMR FROM MSG LIST ------------- */
+    pprev = ptmr->PrevPtr;
+    pnext = ptmr->NextPtr;
+    if (pprev != (DHCPc_TMR *)0) {                              /* If ptmr is NOT   the head of tmr list, ...           */
+        pprev->NextPtr    = pnext;                              /* ... set pprev's NextPtr to skip ptmr.                */
+    } else {                                                    /* Else set pnext as head of tmr list.                  */
+        DHCPc_TmrListHead = pnext;
+    }
+    if (pnext != (DHCPc_TMR *)0) {                              /* If ptmr is NOT @ the tail of tmr list, ...           */
+        pnext->PrevPtr    = pprev;                              /* ... set pnext's PrevPtr to skip ptmr.                */
+    }
+
+                                                                /* ---------------------- CLR TMR --------------------- */
+    DEF_BIT_CLR(ptmr->Flags, DHCPc_FLAG_USED);                  /* Set tmr as NOT used.                                 */
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+    DHCPc_TmrClr(ptmr);
+#endif
+
+                                                                /* --------------------- FREE TMR --------------------- */
+    ptmr->NextPtr    = DHCPc_TmrPoolPtr;
+    DHCPc_TmrPoolPtr = ptmr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_TmrClr()
+*
+* Description : Clear DHCPc timer controls.
+*
+* Argument(s) : ptmr        Pointer to a DHCPc timer.
+*               ----        Argument validated in DHCPc_TmrInit(),
+*                                    checked   in DHCPc_TmrGet(),
+*                                    checked   in DHCPc_TmrFree().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTmr_Init(),
+*               DHCPc_TmrGet(),
+*               DHCPc_TmrFree().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_TmrClr (DHCPc_TMR  *ptmr)
+{
+    ptmr->PrevPtr = (DHCPc_TMR     *)0;
+    ptmr->NextPtr = (DHCPc_TMR     *)0;
+
+    ptmr->Obj     = (void          *)0;
+    ptmr->TmrVal  =  0;
+
+    ptmr->Flags   =  DHCPc_FLAG_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DHCPc_InitSock()
+*
+* Description : Initialize a socket.
+*
+* Argument(s) : ip_addr_local       Local IP address to bind to, in network order.
+*
+* Return(s)   : Socket descriptor/handle identifier, if NO errors.
+*
+*               NET_SOCK_BSD_ERR_OPEN,               otherwise.
+*
+* Caller(s)   : DHCPc_InitStateHandler(),
+*               DHCPc_RenewRebindStateHandler(),
+*               DHCPc_StopStateHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_SOCK_ID  DHCPc_InitSock (NET_IPv4_ADDR  ip_addr_local,
+                                     NET_IF_NBR     if_nbr)
+{
+    NET_SOCK_ID         sock_id;
+    NET_SOCK_ADDR_IPv4  local_addr;
+    NET_SOCK_ADDR_LEN   local_addr_size;
+    CPU_BOOLEAN         rtn_status;
+    CPU_BOOLEAN         success;
+    NET_ERR             err_net;
+
+
+                                                                /* -------------------- OPEN SOCK --------------------- */
+    sock_id = NetApp_SockOpen((NET_SOCK_PROTOCOL_FAMILY) NET_SOCK_ADDR_FAMILY_IP_V4,
+                              (NET_SOCK_TYPE           ) NET_SOCK_TYPE_DATAGRAM,
+                              (NET_SOCK_PROTOCOL       ) NET_SOCK_PROTOCOL_UDP,
+                              (CPU_INT16U              ) 0,
+                              (CPU_INT32U              ) 0,
+                              (NET_ERR                *)&err_net);
+
+    if (sock_id == NET_SOCK_BSD_ERR_OPEN) {
+        return (NET_SOCK_BSD_ERR_OPEN);
+    }
+
+                                                                /* ------------ SET IF NBR FOR THE SOCKET ------------ */
+    success = NetSock_CfgIF(sock_id,
+                            if_nbr,
+                           &err_net);
+    if (success != DEF_OK) {
+        return (NET_SOCK_BSD_ERR_OPEN);
+    }
+
+                                                                /* ------------------ SET LOCAL ADDR ------------------ */
+    local_addr_size = sizeof(local_addr);
+    Mem_Clr((void     *)&local_addr,
+            (CPU_SIZE_T) local_addr_size);
+    local_addr.AddrFamily = NET_SOCK_ADDR_FAMILY_IP_V4;
+    local_addr.Addr       = ip_addr_local;
+    local_addr.Port       = NET_UTIL_HOST_TO_NET_16(DHCPc_CFG_IP_PORT_CLIENT);
+
+
+                                                                /* -------------------- BIND SOCK --------------------- */
+    rtn_status = NetApp_SockBind((NET_SOCK_ID      ) sock_id,
+                                 (NET_SOCK_ADDR   *)&local_addr,
+                                 (NET_SOCK_ADDR_LEN) local_addr_size,
+                                 (CPU_INT16U       ) 0,
+                                 (CPU_INT32U       ) 0,
+                                 (NET_ERR         *)&err_net);
+
+    if (rtn_status != DEF_OK) {
+        NetApp_SockClose((NET_SOCK_ID ) sock_id,
+                         (CPU_INT32U  ) 0,
+                         (NET_ERR    *)&err_net);
+
+        return (NET_SOCK_BSD_ERR_OPEN);
+    }
+
+
+    return (sock_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      DHCPc_InitStateHandler()
+*
+* Description : (1) Perform actions associated with the INIT state :
+*
+*                   (a) Get      interface's hardware address
+*                   (b) Initialize socket
+*                   (c) Start    interface's dynamic configuration
+*                   (d) Transmit DISCOVER & select OFFER
+*                   (e) Transmit REQUEST  & get    reply
+*                   (f) Configure interface & lease timer
+*
+*
+* Argument(s) : pif_info    Pointer to DHCP interface information.
+*               --------    Argument validated in DHCPc_MsgRxHandler().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DHCP lease successfully negotiated &
+*                                                                   interface configured (timer     set).
+*                               DHCPc_ERR_NONE_NO_TMR           DHCP lease successfully negotiated &
+*                                                                   interface configured (timer NOT set).
+*                               DHCPc_ERR_NONE_LOCAL_LINK       DHCP lease negotiation error, interface
+*                                                                   configured with a link-local address.
+*                               DHCPc_ERR_LOCAL_LINK            Error configuring dynamic link-local address.
+*                               DHCPc_ERR_IF_INVALID            Interface invalid or disabled.
+*                               DHCPc_ERR_IF_CFG_STATE          Error setting interface configuration state.
+*                               DHCPc_ERR_INVALID_HW_ADDR       Error retrieving interface's hardware address.
+*                               DHCPc_ERR_INIT_SOCK             Error initializing socket.
+*
+*                                                               -------- RETURNED BY DHCPc_Discover() : ---------
+*                               DHCPc_ERR_NULL_PTR              Argument(s) passed a NULL pointer.
+*                               DHCPc_ERR_MSG_NONE_AVAIL        Message pool empty.
+*                               DHCPc_ERR_INVALID_MSG_SIZE      Argument 'pmsg_buf' size invalid.
+*                               DHCPc_ERR_INVALID_MSG           Invalid DHCP message.
+*                               DHCPc_ERR_TX                    Transmit error.
+*                               DHCPc_ERR_RX_MSG_TYPE           Error extracting message type from reply message.
+*                               DHCPc_ERR_RX_OVF                Receive error, data buffer overflow.
+*                               DHCPc_ERR_RX                    Receive error.
+*
+*                                                               ---------- RETURNED BY DHCPc_Req() : ------------
+*                               DHCPc_ERR_NULL_PTR              Argument(s) passed a NULL pointer.
+*                               DHCPc_ERR_RX_NAK                NAK message received from server.
+*                               DHCPc_ERR_MSG_NONE_AVAIL        Message pool empty.
+*                               DHCPc_ERR_INVALID_MSG_SIZE      Argument 'pmsg_buf' size invalid.
+*                               DHCPc_ERR_INVALID_MSG           Invalid DHCP message.
+*                               DHCPc_ERR_TX                    Transmit error.
+*                               DHCPc_ERR_INVALID_MSG_SIZE      Argument 'pmsg_buf' size invalid.
+*                               DHCPc_ERR_RX_MSG_TYPE           Error extracting message type from reply message.
+*                               DHCPc_ERR_RX_OVF                Receive error, data buffer overflow.
+*                               DHCPc_ERR_RX                    Receive error.
+*
+*                                                               -------- RETURNED BY DHCPc_AddrCfg() : ----------
+*                               DHCPc_ERR_IF_CFG                Error configuring the interface's network.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_MsgRxHandler().
+*
+* Note(s)     : (2) #### This implementation of the DHCP client presumes an Ethernet hardware type.
+*
+*               (3) From RFC 2131, section 'Constructing and sending DHCP messages', "DHCP messages broadcast
+*                   by a client prior to that client obtaining its IP address must have the source address
+*                   field in the IP header set to 0".  Starting the dynamic configuration results in all
+*                   addresses being removed from the interface and set to 0.
+*
+*               (4) RFC #2131, section 'Client-Server interaction - allocating a network address', states
+*                   that "The client SHOULD wait a mininum of ten seconds before restarting the
+*                   configuration process to avoid excessive network traffic in case of looping".
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_InitStateHandler (DHCPc_IF_INFO  *pif_info,
+                                      DHCPc_ERR      *perr)
+{
+    NET_IF_NBR      if_nbr;
+    CPU_BOOLEAN     if_en;
+    CPU_INT08U      addr_hw_len;
+    CPU_INT08U      addr_hw[NET_IF_ETHER_ADDR_SIZE];
+    NET_SOCK_ID     sock_id;
+    CPU_INT16U      nego_retry_cnt;
+    CPU_BOOLEAN     nego_done;
+    CPU_BOOLEAN     nego_dly;
+#if (DHCPc_CFG_ADDR_VALIDATE_EN == DEF_ENABLED)
+    DHCPc_MSG      *pmsg;
+    DHCP_MSG_HDR   *pmsg_hdr;
+    NET_IPv4_ADDR   proposed_addr;
+#endif
+    NET_ERR         err_net;
+
+
+    if_nbr = pif_info->IF_Nbr;
+
+    if_en  = NetIF_IsEnCfgd(if_nbr, &err_net);                  /* Validate IF en.                                      */
+    if (if_en != DEF_YES) {                                     /* If IF NOT enabled, ...                               */
+       *perr = DHCPc_ERR_IF_INVALID;                            /* ... rtn err.                                         */
+        return;
+    }
+
+                                                                /* ------------------- GET HW ADDR -------------------- */
+    addr_hw_len = NET_IF_ETHER_ADDR_SIZE;                       /* See Note #2.                                         */
+    NetIF_AddrHW_Get( if_nbr,
+                     &addr_hw[0],
+                     &addr_hw_len,
+                     &err_net);
+    if ((err_net     != NET_IF_ERR_NONE) ||
+        (addr_hw_len != NET_IF_ETHER_ADDR_SIZE)) {
+       *perr = DHCPc_ERR_INVALID_HW_ADDR;
+        return;
+    }
+
+                                                                /* -------------------- INIT SOCK --------------------- */
+    sock_id = DHCPc_InitSock(NET_IPv4_ADDR_THIS_HOST, if_nbr);
+    if (sock_id == NET_SOCK_BSD_ERR_OPEN) {
+       *perr = DHCPc_ERR_INIT_SOCK;
+        return;
+    }
+
+                                                                /* ---------------- START DYNAMIC CFG ----------------- */
+    NetIPv4_CfgAddrAddDynamicStart(if_nbr, &err_net);           /* See Note #3.                                         */
+    if (err_net != NET_IPv4_ERR_NONE) {
+       *perr = DHCPc_ERR_IF_CFG_STATE;
+        return;
+    }
+
+
+                                                                /* ------------ TX DISCOVER & SELECT OFFER ------------ */
+    nego_retry_cnt = 0;
+    nego_done      = DEF_NO;
+    nego_dly       = DEF_NO;
+
+    while ((nego_retry_cnt <  DHCPc_NEGO_MAX_RETRY) &&
+           (nego_done      != DEF_YES)) {
+
+        pif_info->ClientState = DHCP_STATE_INIT;
+
+        if (nego_dly == DEF_YES) {                              /* Dly nego, if req'd (see Note #4).                    */
+            KAL_Dly(DHCP_INIT_DLY_MS);
+        }
+
+        DHCPc_Discover(sock_id, pif_info, &addr_hw[0], addr_hw_len, perr);
+        if (*perr != DHCPc_ERR_NONE) {
+            nego_retry_cnt++;
+            nego_dly = DEF_YES;
+
+        } else {                                                /* DISCOVER tx'd & OFFER(s) rx'd, ..                    */
+                                                                /* .. tx REQUEST & get reply.                           */
+            pif_info->ClientState = DHCP_STATE_SELECTING;
+
+            DHCPc_Req(sock_id, pif_info, &addr_hw[0], addr_hw_len, perr);
+
+            switch (*perr) {
+                case DHCPc_ERR_NONE:
+#if (DHCPc_CFG_ADDR_VALIDATE_EN == DEF_ENABLED)
+                                                                /* Get proposed addr.                                   */
+                     pmsg     = (DHCPc_MSG    *) pif_info->MsgPtr;
+                     pmsg_hdr = (DHCP_MSG_HDR *)&pmsg->MsgBuf[0];
+
+                     NET_UTIL_VAL_COPY_32(&proposed_addr, &pmsg_hdr->yiaddr);
+
+                                                                /* Validate proposed addr.                              */
+                     DHCPc_AddrValidate(               if_nbr,
+                                        (NET_IPv4_ADDR)proposed_addr,
+                                        (CPU_INT32U   )DHCP_ADDR_VALIDATE_WAIT_TIME_MS,
+                                        (DHCPc_ERR   *)perr);
+                     switch (*perr) {
+                         case DHCPc_ERR_NONE:
+                         case DHCPc_ERR_ADDR_VALIDATE:
+                              nego_done = DEF_YES;
+                              break;
+
+
+                         case DHCPc_ERR_ADDR_USED:
+                         default:
+                             DHCPc_DeclineRelease((NET_SOCK_ID    ) sock_id,
+                                                  (DHCPc_IF_INFO *) pif_info,
+                                                  (DHCPc_MSG_TYPE ) DHCP_MSG_DECLINE,
+                                                  (CPU_INT08U    *)&addr_hw[0],
+                                                  (CPU_INT08U     ) addr_hw_len,
+                                                  (DHCPc_ERR     *) perr);
+                             nego_retry_cnt++;
+                             nego_dly = DEF_YES;
+                             break;
+                     }
+#else
+                     nego_done = DEF_YES;
+#endif
+                     break;
+
+
+                case DHCPc_ERR_RX_NAK:
+                     nego_retry_cnt++;
+                     nego_dly = DEF_YES;
+                     break;
+
+
+                default:
+                     nego_done = DEF_YES;
+                     break;
+            }
+        }
+    }
+
+    NetApp_SockClose((NET_SOCK_ID ) sock_id,                    /* Close sock.                                          */
+                     (CPU_INT32U  ) 0,
+                     (NET_ERR    *)&err_net);
+
+
+                                                                /* ------------- CFG IF WITH NEGO'D LEASE ------------- */
+    switch (*perr) {
+        case DHCPc_ERR_NONE:                                    /* If lease successfully acquired, ...                  */
+
+             DHCPc_AddrCfg(pif_info, perr);                     /* ... cfg net addr                ...                  */
+             if (*perr == DHCPc_ERR_NONE) {
+                 DHCPc_LeaseTimeCalc(pif_info, perr);           /* ... calc lease time & set tmr.                       */
+                 if (*perr != DHCPc_ERR_NONE) {                 /* If err setting tmr, ...                              */
+                    *perr = DHCPc_ERR_NONE_NO_TMR;              /* ... rtn err         ...                              */
+                 }
+
+                 pif_info->ClientState = DHCP_STATE_BOUND;      /* ... & set client state to BOUND.                     */
+
+             } else {                                           /* If err cfg'ing IF, ...                               */
+                                                                /* ... stop dynamic cfg & set client state to NONE.     */
+                 NetIPv4_CfgAddrAddDynamicStop(if_nbr, &err_net);
+                 pif_info->ClientState = DHCP_STATE_NONE;
+             }
+             break;
+
+
+        case DHCPc_ERR_RX_NAK:                                  /* ... Else if err, ..                                  */
+        default:
+#if (DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN == DEF_ENABLED)           /*     .. & dyn link local ENABLED, ...                 */
+                                                                /*        ... cfg using link locak addr.                */
+             DHCPc_AddrLocalLinkCfg(pif_info, &addr_hw[0], addr_hw_len, perr);
+             if (*perr == DHCPc_ERR_NONE) {
+                 pif_info->ClientState = DHCP_STATE_LOCAL_LINK;
+                *perr                  = DHCPc_ERR_NONE_LOCAL_LINK;
+
+             } else {
+                 NetIPv4_CfgAddrAddDynamicStop(if_nbr, &err_net);
+
+                 pif_info->ClientState = DHCP_STATE_NONE;
+                *perr                  = DHCPc_ERR_LOCAL_LINK;
+             }
+#else
+             NetIPv4_CfgAddrAddDynamicStop(if_nbr, &err_net);
+             pif_info->ClientState = DHCP_STATE_NONE;
+#endif
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                   DHCPc_RenewRebindStateHandler()
+*
+* Description : (1) Perform actions associated with the RENEW/REBIND state :
+*
+*                   (b) Get interface's hardware address
+*                   (c) Initialize socket
+*                   (e) Transmit REQUEST & get reply
+*                   (f) Configure lease timer
+*
+*
+* Argument(s) : pif_info        Pointer to DHCP interface information.
+*               --------        Argument validated in DHCPc_MsgRxHandler().
+*
+*               exp_tmr_msg     Expired timer message.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DHCP lease successfully renewed/rebound.
+*                               DHCPc_ERR_NONE_NO_TMR           Error setting timer, lease might NOT have
+*                                                                   been renewed/rebound (see Note #4).
+*                               DHCPc_ERR_INVALID_MSG           Invalid timer expiration message.
+*                               DHCPc_ERR_IF_INVALID            Interface invalid or disabled.
+*                               DHCPc_ERR_INVALID_HW_ADDR       Error retrieving interface's hardware address.
+*                               DHCPc_ERR_INIT_SOCK             Error initializing socket.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_MsgRxHandler().
+*
+* Note(s)     : (2) #### This implementation of the DHCP client presumes an Ethernet hardware type.
+*
+*               (3) If the socket cannot be opened, the DHCP lease is updated, and a new timer is set
+*                   so that the renewing/rebinding process can take place later.
+*
+*               (4) A DHCPc_ERR_NONE_NO_TMR error indicates that there was an error either calculating
+*                   the new lease time if it was successfully  renewed/rebound, or the update lease time
+*                   was not successful should the lease not be renewed/rebound.
+*
+*                   In both cases, the lease then becomes technically infinite since NO timer is set.
+*                   This could cause an expired lease to still be used by this host, which would violate
+*                   RFC #2131.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_RenewRebindStateHandler (DHCPc_IF_INFO   *pif_info,
+                                             DHCPc_COMM_MSG   exp_tmr_msg,
+                                             DHCPc_ERR       *perr)
+{
+#if (DHCPc_CFG_BROADCAST_BIT_EN != DEF_ENABLED)
+    DHCPc_MSG      *pmsg;
+    DHCP_MSG_HDR   *pmsg_hdr;
+#endif
+    NET_IF_NBR      if_nbr;
+    CPU_BOOLEAN     if_en;
+    CPU_INT08U      addr_hw_len;
+    CPU_INT08U      addr_hw[NET_IF_ETHER_ADDR_SIZE];
+    NET_IPv4_ADDR   addr_host;
+    NET_SOCK_ID     sock_id;
+    NET_ERR         err_net;
+
+
+    switch (exp_tmr_msg) {                                      /* Set cur client state.                                */
+        case DHCPc_COMM_MSG_T1_EXPIRED:
+             pif_info->ClientState = DHCP_STATE_RENEWING;
+             break;
+
+
+        case DHCPc_COMM_MSG_T2_EXPIRED:
+             pif_info->ClientState = DHCP_STATE_REBINDING;
+             break;
+
+
+        default:
+            *perr = DHCPc_ERR_INVALID_MSG;
+             return;
+    }
+
+
+    if_nbr = pif_info->IF_Nbr;
+
+    if_en  = NetIF_IsEnCfgd(if_nbr, &err_net);                  /* Validate IF en.                                      */
+    if (if_en != DEF_YES) {                                     /* If IF NOT enabled, ...                               */
+       *perr = DHCPc_ERR_IF_INVALID;                            /* ... rtn err.                                         */
+        return;
+    }
+
+                                                                /* ------------------- GET HW ADDR -------------------- */
+    addr_hw_len = NET_IF_ETHER_ADDR_SIZE;                       /* See Note #2.                                         */
+    NetIF_AddrHW_Get( if_nbr,
+                     &addr_hw[0],
+                     &addr_hw_len,
+                     &err_net);
+    if ((err_net     != NET_IF_ERR_NONE) ||
+        (addr_hw_len != NET_IF_ETHER_ADDR_SIZE)) {
+       *perr = DHCPc_ERR_INVALID_HW_ADDR;
+        return;
+    }
+
+                                                                /* -------------------- INIT SOCK --------------------- */
+#if (DHCPc_CFG_BROADCAST_BIT_EN != DEF_ENABLED)
+    pmsg     = (DHCPc_MSG    *) pif_info->MsgPtr;               /* Get host addr from cur OFFER.                        */
+    pmsg_hdr = (DHCP_MSG_HDR *)&pmsg->MsgBuf[0];
+    NET_UTIL_VAL_COPY_32(&addr_host, &pmsg_hdr->yiaddr);
+#else
+    addr_host = NET_IPv4_ADDR_THIS_HOST;
+#endif
+
+    sock_id = DHCPc_InitSock(addr_host, if_nbr);
+    if (sock_id == NET_SOCK_BSD_ERR_OPEN) {                     /* If sock NOT opened,            ...                   */
+        DHCPc_LeaseTimeUpdate(pif_info, exp_tmr_msg, perr);     /* ... update cur lease & cfg tmr ...                   */
+        if (*perr == DHCPc_ERR_NONE) {
+           *perr = DHCPc_ERR_INIT_SOCK;                         /* ... & set err (see Note #3).                         */
+
+        } else {
+           *perr = DHCPc_ERR_NONE_NO_TMR;
+        }
+
+        return;
+    }
+
+                                                                /* -------------- TX REQUEST & GET REPLY -------------- */
+
+                                                                /* Tx REQUEST & get reply.                              */
+    DHCPc_Req(sock_id, pif_info, &addr_hw[0], addr_hw_len, perr);
+
+    NetApp_SockClose((NET_SOCK_ID ) sock_id,
+                     (CPU_INT32U  ) 0,
+                     (NET_ERR    *)&err_net);
+
+    if (*perr == DHCPc_ERR_NONE) {                              /* If lease renewed/rebound,       ...                  */
+        DHCPc_LeaseTimeCalc(pif_info, perr);                    /* ... calc lease time & cfg tmr.                       */
+
+    } else {                                                    /* Else lease NOT renewed/rebound, ...                  */
+        DHCPc_LeaseTimeUpdate(pif_info, exp_tmr_msg, perr);     /* ... update cur lease & cfg tmr.                      */
+    }
+
+
+    if (*perr != DHCPc_ERR_NONE) {                              /* If err setting tmr, ...                              */
+       *perr = DHCPc_ERR_NONE_NO_TMR;                           /* ... rtn err (see Note #4).                           */
+    }
+
+    pif_info->ClientState = DHCP_STATE_BOUND;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      DHCPc_StopStateHandler()
+*
+* Description : (1) Perform actions associated with the STOPPING state :
+*
+*                   (a) Transmit RELEASE message, if necessary
+*                   (b) Free     interface's  objects
+*                   (c) Remove   interface IP address
+*
+*
+* Argument(s) : pif_info    Pointer to DHCP interface information.
+*               --------    Argument checked   in DHCPc_MsgRxHandler(),
+*                                    validated in DHCPc_InitStateHandler(),
+*                                              in DHCPc_RenewRebindStateHandler().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Interface DHCP configuration successfully
+*                                                                   stopped.
+*                               DHCPc_ERR_IF_CFG                Error removing interface IP address from
+*                                                                   stack.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_MsgRxHandler().
+*
+*               This function is an INTERNAL DHCP client function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) #### This implementation of the DHCP client presumes an Ethernet hardware type.
+*
+*               (3) RFC #2131, section 'DHCP client behaviour - DHCPRELEASE', states that "if the client
+*                   no longer requires use of its assigned network address [...], the client sends a
+*                   DHCPRELEASE message to the server.  Note that the correct operation of DHCP does not
+*                   depend on the transmission of DHCPRELEASE messages."
+*
+*                   Hence, if an error occurs while attempting to transmit a DHCPRELEASE message, no
+*                   error handling is performed.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_StopStateHandler (DHCPc_IF_INFO  *pif_info,
+                                      DHCPc_ERR      *perr)
+{
+    DHCPc_STATE     client_state;
+    CPU_BOOLEAN     tx_decline;
+    CPU_INT08U      addr_hw_len;
+    CPU_INT08U      addr_hw[NET_IF_ETHER_ADDR_SIZE];
+    DHCPc_MSG      *pmsg;
+    DHCP_MSG_HDR   *pmsg_hdr;
+    NET_IPv4_ADDR   addr_host;
+    NET_SOCK_ID     sock_id;
+    DHCPc_TMR      *ptmr;
+    DHCPc_COMM     *pcomm;
+    NET_IF_NBR      if_nbr;
+    NET_ERR         err_net;
+
+
+    if_nbr                = pif_info->IF_Nbr;
+    client_state          = pif_info->ClientState;              /* Get client state ...                                 */
+    pif_info->ClientState = DHCP_STATE_STOPPING;                /* ... and set it to STOPPING.                          */
+
+                                                                /* -------------------- TX RELEASE -------------------- */
+    switch (client_state) {
+        case DHCP_STATE_REQUESTING:
+        case DHCP_STATE_BOUND:
+        case DHCP_STATE_RENEWING:
+        case DHCP_STATE_REBINDING:
+             tx_decline = DEF_YES;
+             break;
+
+
+        default:
+             tx_decline = DEF_NO;
+             break;
+    }
+
+    if (tx_decline == DEF_YES) {
+                                                                /* ------------------- GET HW ADDR -------------------- */
+        addr_hw_len = NET_IF_ETHER_ADDR_SIZE;                   /* See Note #2.                                         */
+        NetIF_AddrHW_Get( if_nbr,
+                         &addr_hw[0],
+                         &addr_hw_len,
+                         &err_net);
+        if ((err_net     == NET_IF_ERR_NONE) &&                 /* See Note #3.                                         */
+            (addr_hw_len == NET_IF_ETHER_ADDR_SIZE)) {
+
+                                                                /* -------------------- INIT SOCK --------------------- */
+            pmsg     = (DHCPc_MSG    *) pif_info->MsgPtr;       /* Get host addr from cur OFFER.                        */
+            pmsg_hdr = (DHCP_MSG_HDR *)&pmsg->MsgBuf[0];
+            NET_UTIL_VAL_COPY_32(&addr_host, &pmsg_hdr->yiaddr);
+
+            sock_id = DHCPc_InitSock(addr_host, if_nbr);
+            if (sock_id != NET_SOCK_BSD_ERR_OPEN) {
+
+                DHCPc_DeclineRelease((NET_SOCK_ID    ) sock_id,
+                                     (DHCPc_IF_INFO *) pif_info,
+                                     (DHCPc_MSG_TYPE ) DHCP_MSG_RELEASE,
+                                     (CPU_INT08U    *)&addr_hw[0],
+                                     (CPU_INT08U     ) addr_hw_len,
+                                     (DHCPc_ERR     *) perr);
+
+                                                                /* Dly to resolve dest addr.                            */
+                KAL_Dly((CPU_INT32U)(DHCP_RELEASE_DLY_S * DEF_TIME_NBR_mS_PER_SEC));
+
+                NetApp_SockClose((NET_SOCK_ID ) sock_id,        /* Close sock.                                          */
+                                 (CPU_INT32U  ) 0,
+                                 (NET_ERR    *)&err_net);
+            }
+        }
+    }
+
+                                                                /* ---------------- FREE IF'S DATA OBJ ---------------- */
+    ptmr = pif_info->Tmr;
+    if (ptmr != (DHCPc_TMR *)0) {                               /* If lease tmr not NULL, ...                           */
+        pcomm = (DHCPc_COMM *)ptmr->Obj;
+        if (pcomm != (DHCPc_COMM *)0) {
+            DHCPc_CommFree(pcomm);                              /* ...    free comm       ...                           */
+        }
+
+        DHCPc_TmrFree(ptmr);                                    /* ...  & free tmr.                                     */
+    }
+
+    pmsg = pif_info->MsgPtr;
+    if (pmsg != (DHCPc_MSG *)0) {                               /* If msg       not NULL, ...                           */
+        DHCPc_MsgFree(pmsg);                                    /* ... free msg.                                        */
+    }
+
+    DHCPc_IF_InfoFree(pif_info);
+
+                                                                /* ----------------- REM IF'S IP ADDR ----------------- */
+    NetIPv4_CfgAddrRemoveAll(if_nbr, &err_net);
+    if (err_net != NET_IPv4_ERR_NONE) {
+       *perr = DHCPc_ERR_IF_CFG;
+
+    } else {
+       *perr = DHCPc_ERR_NONE;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DHCPc_Discover()
+*
+* Description : (1) Perform the DISCOVER phase of the lease negotiation :
+*
+*                   (a) Get message
+*                   (b) Generate new 'xid' (see Note #2)
+*                   (c) Prepare  DISCOVER message
+*                   (d) Transmit DISCOVER message
+*                   (e) Get reply from server(s)
+*                   (f) Copy lease OFFER
+*
+*
+* Argument(s) : sock_id         Socket ID of socket to transmit & receive DHCPc data.
+*
+*               pif_info        Pointer to DHCP interface information.
+*               --------        Argument checked in DHCPc_InitStateHandler().
+*
+*               paddr_hw        Pointer to hardware address buffer.
+*
+*               addr_hw_len     Length of the hardware address buffer pointed to by 'paddr_hw'.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DISCOVER successfully transmitted & OFFER(S)
+*                                                                   received (see Note #2).
+*                               DHCPc_ERR_NULL_PTR              Argument(s) passed a NULL pointer.
+*                               DHCPc_ERR_INVALID_HW_ADDR       Argument 'paddr_hw' has an invalid length.
+*
+*                                                               --------- RETURNED BY DHCPc_MsgGet() : ----------
+*                               DHCPc_ERR_MSG_NONE_AVAIL        Message pool empty.
+*
+*                                                               ------ RETURNED BY DHCPc_TxMsgPrepare() : -------
+*                               DHCPc_ERR_INVALID_MSG_SIZE      Argument 'pmsg_buf' size invalid.
+*                               DHCPc_ERR_INVALID_MSG           Invalid DHCP message.
+*
+*                                                               ----------- RETURNED BY DHCPc_Tx() : ------------
+*                               DHCPc_ERR_TX                    Transmit error.
+*
+*                                                               -------- RETURNED BY DHCPc_RxReply() : ----------
+*                               DHCPc_ERR_INVALID_MSG_SIZE      Argument 'pmsg_buf' size invalid.
+*                               DHCPc_ERR_RX_MSG_TYPE           Error extracting message type from reply message.
+*                               DHCPc_ERR_RX_OVF                Receive error, data buffer overflow.
+*                               DHCPc_ERR_RX                    Receive error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_InitStateHandler().
+*
+* Note(s)     : (2) RFC #2131, section 'Constructing and sending DHCP messages', states that "selecting
+*                   a new 'xid' for each retransmission is an implementation decision.  A client may
+*                   choose to reuse the same 'xid' or select a new 'xid' for each retransmitted message".
+*
+*                   This implementation increments the previously used 'xid' and used that new value as
+*                   the transaction ID.
+*
+*               (3) When the function returns DHCPc_ERR_NONE, the OFFER message's parameters are copied
+*                   into the structure pointed to by 'pif_info' so that a REQUEST message can be crafted.
+*
+*               (4) If NO DHCP OFFER is received following a DHCP DISCOVER transmission, the caller is
+*                   responsible of the retransmission handling--i.e. this function will NOT attempt to
+*                   send another DISCOVER.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_Discover (NET_SOCK_ID     sock_id,
+                              DHCPc_IF_INFO  *pif_info,
+                              CPU_INT08U     *paddr_hw,
+                              CPU_INT08U      addr_hw_len,
+                              DHCPc_ERR      *perr)
+{
+    DHCPc_MSG           *pmsg;
+    CPU_INT16U           discover_retry_cnt;
+    CPU_BOOLEAN          discover_done;
+    CPU_BOOLEAN          discover_dly;
+    CPU_INT16U           dly_ms;
+    CPU_INT16U           discover_msg_len;
+    NET_SOCK_ADDR_IPv4   addr_server;
+    NET_SOCK_ADDR_LEN    addr_server_size;
+    CPU_BOOLEAN          rx_done;
+    DHCPc_MSG_TYPE       dhcp_rx_msg_type;
+    CPU_INT08U          *popt;
+    CPU_INT08U           opt_val_len;
+
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                   /* --------------- VALIDATE PTR & ARGS ---------------- */
+    if (paddr_hw == (CPU_INT08U *)0) {
+       *perr = DHCPc_ERR_NULL_PTR;
+        return;
+    }
+
+    if (addr_hw_len != NET_IF_ETHER_ADDR_SIZE) {
+       *perr = DHCPc_ERR_INVALID_HW_ADDR;
+        return;
+    }
+#endif
+
+                                                                /* --------------------- GET MSG ---------------------- */
+    pmsg = DHCPc_MsgGet(perr);
+    if (*perr != DHCPc_ERR_NONE) {
+        return;
+    }
+
+
+    discover_retry_cnt = 0;
+    discover_done      = DEF_NO;
+    discover_dly       = DEF_NO;
+    dly_ms             = 0;
+
+    while ((discover_retry_cnt <  DHCPc_NEGO_MAX_RETRY) &&      /* While DISCOVER retry < max retry ...                 */
+           (discover_done      != DEF_YES)) {                   /* ... & DISCOVER NOT done,         ...                 */
+
+        if (discover_dly == DEF_YES) {                          /* Dly DISCOVER, if req'd.                              */
+            dly_ms = DHCPc_CalcBackOff(dly_ms);
+            KAL_Dly(dly_ms);
+        }
+
+                                                                /* ------------------ GENERATE 'XID' ------------------ */
+        pif_info->TransactionID++;                              /* Inc last transaction ID (see Note #2).               */
+
+
+                                                                /* --------------- PREPARE DISCOVER MSG --------------- */
+        discover_msg_len = DHCPc_TxMsgPrepare((DHCPc_IF_INFO *) pif_info,
+                                              (DHCPc_MSG_TYPE ) DHCP_MSG_DISCOVER,
+                                              (CPU_INT08U    *) paddr_hw,
+                                              (CPU_INT08U     ) addr_hw_len,
+                                              (CPU_INT08U    *)&pmsg->MsgBuf[0],
+                                              (CPU_INT16U     ) DHCP_MSG_BUF_SIZE,
+                                              (DHCPc_ERR     *) perr);
+        if (*perr != DHCPc_ERR_NONE) {
+            DHCPc_MsgFree(pmsg);
+            return;
+        }
+
+                                                                /* ---------------------- TX MSG ---------------------- */
+        addr_server_size = sizeof(addr_server);
+        Mem_Clr((void     *)&addr_server,
+                (CPU_SIZE_T) addr_server_size);
+        addr_server.AddrFamily = NET_SOCK_ADDR_FAMILY_IP_V4;
+        addr_server.Addr       = NET_UTIL_HOST_TO_NET_32(NET_IPv4_ADDR_BROADCAST);
+        addr_server.Port       = NET_UTIL_HOST_TO_NET_16(DHCPc_CFG_IP_PORT_SERVER);
+
+        DHCPc_Tx((NET_SOCK_ID      ) sock_id,
+                 (void            *)&pmsg->MsgBuf[0],
+                 (CPU_INT16U       ) discover_msg_len,
+                 (NET_SOCK_ADDR   *)&addr_server,
+                 (NET_SOCK_ADDR_LEN) addr_server_size,
+                 (DHCPc_ERR       *) perr);
+        if (*perr != DHCPc_ERR_NONE) {
+            discover_done = DEF_YES;
+
+        } else {
+
+                                                                /* ------------- RX REPLY FROM SERVER(S) -------------- */
+            rx_done = DEF_FALSE;
+
+
+            while (rx_done != DEF_YES) {
+
+                pmsg->MsgLen = DHCP_MSG_BUF_SIZE;
+                dhcp_rx_msg_type = DHCPc_RxReply((NET_SOCK_ID    ) sock_id,
+                                                 (DHCPc_IF_INFO *) pif_info,
+                                                 (NET_IPv4_ADDR  ) NET_IPv4_ADDR_NONE,
+                                                 (CPU_INT08U    *) paddr_hw,
+                                                 (CPU_INT08U     ) addr_hw_len,
+                                                 (CPU_INT08U    *)&pmsg->MsgBuf[0],
+                                                 (CPU_INT16U    *)&pmsg->MsgLen,
+                                                 (DHCPc_ERR     *) perr);
+
+                switch (*perr) {
+                    case DHCPc_ERR_NONE:                        /* If NO err                    ...                     */
+
+                         switch (dhcp_rx_msg_type) {
+                             case DHCP_MSG_OFFER:               /* ... & rx'd msg is OFFER,     ...                     */
+                                  rx_done       = DEF_YES;      /* ... rx         done          ...                     */
+                                  discover_done = DEF_YES;      /* ... & DISCOVER done.                                 */
+                                  break;
+
+
+                             default:                           /* ... Else rx'd msg NOT OFFER, ...                     */
+                                  rx_done = DEF_NO;             /* ... rx NOT done.                                     */
+                                  break;
+                         }
+                         break;
+
+
+                    default:                                    /* If rx err,                   ...                     */
+                         rx_done      = DEF_YES;
+                         discover_dly = DEF_YES;
+                         discover_retry_cnt++;                  /* ... restart DISCOVER.                                */
+                         break;
+                }
+            }
+        }
+    }
+
+    if (*perr != DHCPc_ERR_NONE) {
+        DHCPc_MsgFree(pmsg);
+        return;
+    }
+
+                                                                /* ----------- COPY OFFER IN IF INFO STRUCT ----------- */
+    if (pif_info->MsgPtr != (DHCPc_MSG *)0) {                   /* If msg ptr NOT NULL, ...                             */
+        DHCPc_MsgFree(pif_info->MsgPtr);                        /* ... free msg         ...                             */
+    }
+
+    pif_info->MsgPtr = pmsg;                                    /* ... & set msg ptr to rx'd OFFER.                     */
+
+                                                                /* Get server id.                                       */
+    popt = DHCPc_MsgGetOpt((DHCPc_OPT_CODE) DHCP_OPT_SERVER_IDENTIFIER,
+                           (CPU_INT08U   *)&pmsg->MsgBuf[0],
+                           (CPU_INT16U    ) pmsg->MsgLen,
+                           (CPU_INT08U   *)&opt_val_len);
+    if (popt != (CPU_INT08U *)0) {
+        NET_UTIL_VAL_COPY_32(&pif_info->ServerID, popt);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                             DHCPc_Req()
+*
+* Description : (1) Perform the REQUEST phase of the lease negotiation :
+*
+*                   (a) Get              message
+*                   (b) Prepare  REQUEST message from last received OFFER
+*                   (c) Transmit REQUEST message
+*                   (d) Get reply from server(s)
+*                   (e) Copy ACK.
+*
+*
+* Argument(s) : sock_id         Socket ID of socket to transmit & receive DHCPc data.
+*
+*               pif_info        Pointer to DHCP interface information.
+*               --------        Argument checked in DHCPc_InitStateHandler().
+*
+*               paddr_hw        Pointer to hardware address buffer.
+*
+*               addr_hw_len     Length of the hardware address buffer pointed to by 'paddr_hw'.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  REQUEST successfully transmitted & ACK received.
+*                               DHCPc_ERR_NULL_PTR              Argument(s) passed a NULL pointer.
+*                               DHCPc_ERR_INVALID_HW_ADDR       Argument 'paddr_hw' has an invalid length.
+*                               DHCPc_ERR_RX_NAK                NAK message received from server.
+*
+*                                                               --------- RETURNED BY DHCPc_MsgGet() : ----------
+*                               DHCPc_ERR_MSG_NONE_AVAIL        Message pool empty.
+*
+*                                                               ------ RETURNED BY DHCPc_TxMsgPrepare() : -------
+*                               DHCPc_ERR_INVALID_MSG_SIZE      Argument 'pmsg_buf' size invalid.
+*                               DHCPc_ERR_INVALID_MSG           Invalid DHCP message.
+*
+*                                                               ----------- RETURNED BY DHCPc_Tx() : ------------
+*                               DHCPc_ERR_TX                    Transmit error.
+*
+*                                                               -------- RETURNED BY DHCPc_RxReply() : ----------
+*                               DHCPc_ERR_INVALID_MSG_SIZE      Argument 'pmsg_buf' size invalid.
+*                               DHCPc_ERR_RX_MSG_TYPE           Error extracting message type from reply message.
+*                               DHCPc_ERR_RX_OVF                Receive error, data buffer overflow.
+*                               DHCPc_ERR_RX                    Receive error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_InitStateHandler(),
+*               DHCPc_RenewRebindStateHandler()
+*
+* Note(s)     : (2) If NO DHCP message is received following a DHCP REQUEST transmission, the caller is
+*                   responsible of the retransmission handling--i.e. this function will NOT attempt to
+*                   send another REQUEST.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_Req (NET_SOCK_ID     sock_id,
+                             DHCPc_IF_INFO  *pif_info,
+                             CPU_INT08U     *paddr_hw,
+                             CPU_INT08U      addr_hw_len,
+                             DHCPc_ERR      *perr)
+{
+    DHCPc_MSG           *pmsg;
+    CPU_INT16U           request_retry_cnt;
+    CPU_BOOLEAN          request_done;
+    CPU_BOOLEAN          request_dly;
+    CPU_INT16U           dly_ms;
+    CPU_INT16U           request_msg_len;
+    NET_IPv4_ADDR        addr_server_ip;
+    NET_SOCK_ADDR_IPv4   addr_server;
+    NET_SOCK_ADDR_LEN    addr_server_size;
+    CPU_BOOLEAN          rx_done;
+    DHCPc_MSG_TYPE       dhcp_rx_msg_type;
+
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                   /* --------------- VALIDATE PTR & ARGS ---------------- */
+    if (paddr_hw == (CPU_INT08U *)0) {
+       *perr = DHCPc_ERR_NULL_PTR;
+        return;
+    }
+
+    if (addr_hw_len != NET_IF_ETHER_ADDR_SIZE) {
+       *perr = DHCPc_ERR_INVALID_HW_ADDR;
+        return;
+    }
+#endif
+
+                                                                /* --------------------- GET MSG ---------------------- */
+    pmsg = DHCPc_MsgGet(perr);
+    if (*perr != DHCPc_ERR_NONE) {
+        return;
+    }
+
+
+    request_retry_cnt = 0;
+    request_done      = DEF_NO;
+    request_dly       = DEF_NO;
+    dly_ms            = 0;
+
+    while ((request_retry_cnt <  DHCPc_NEGO_MAX_RETRY) &&       /* While REQUEST retry < max retry ...                  */
+           (request_done      != DEF_YES)) {                    /* ... & REQUEST NOT done,         ...                  */
+
+        if (request_dly == DEF_YES) {                           /* Dly REQUEST, if req'd.                               */
+            dly_ms = DHCPc_CalcBackOff(dly_ms);
+            KAL_Dly(dly_ms);
+        }
+
+                                                                /* --------------- PREPARE REQUEST MSG ---------------- */
+        request_msg_len = DHCPc_TxMsgPrepare((DHCPc_IF_INFO *) pif_info,
+                                             (DHCPc_MSG_TYPE ) DHCP_MSG_REQUEST,
+                                             (CPU_INT08U    *) paddr_hw,
+                                             (CPU_INT08U     ) addr_hw_len,
+                                             (CPU_INT08U    *)&pmsg->MsgBuf[0],
+                                             (CPU_INT16U     ) DHCP_MSG_BUF_SIZE,
+                                             (DHCPc_ERR     *) perr);
+        if (*perr != DHCPc_ERR_NONE) {
+            DHCPc_MsgFree(pmsg);
+            return;
+        }
+
+
+                                                                /* ---------------------- TX MSG ---------------------- */
+        if (pif_info->ClientState == DHCP_STATE_RENEWING) {     /* If client in RENEWING state, ...                     */
+            addr_server_ip = pif_info->ServerID;                /* ... tx unicast   msg.                                */
+        } else {                                                /* Else,                        ...                     */
+            addr_server_ip = NET_IPv4_ADDR_BROADCAST;           /* ... tx broadcast msg.                                */
+        }
+
+        addr_server_size = sizeof(addr_server);
+        Mem_Clr((void     *)&addr_server,
+                (CPU_SIZE_T) addr_server_size);
+        addr_server.AddrFamily = NET_SOCK_ADDR_FAMILY_IP_V4;
+        addr_server.Addr       = addr_server_ip;
+        addr_server.Port       = NET_UTIL_HOST_TO_NET_16(DHCPc_CFG_IP_PORT_SERVER);
+
+        DHCPc_Tx((NET_SOCK_ID      ) sock_id,
+                 (void            *)&pmsg->MsgBuf[0],
+                 (CPU_INT16U       ) request_msg_len,
+                 (NET_SOCK_ADDR   *)&addr_server,
+                 (NET_SOCK_ADDR_LEN) addr_server_size,
+                 (DHCPc_ERR       *) perr);
+        if (*perr != DHCPc_ERR_NONE) {
+            request_done = DEF_YES;
+
+        } else {
+
+                                                                /* ------------- RX REPLY FROM SERVER(S) -------------- */
+            rx_done = DEF_FALSE;
+
+
+            while (rx_done != DEF_YES) {
+
+                pmsg->MsgLen = DHCP_MSG_BUF_SIZE;
+                dhcp_rx_msg_type = DHCPc_RxReply((NET_SOCK_ID    ) sock_id,
+                                                 (DHCPc_IF_INFO *) pif_info,
+                                                 (NET_IPv4_ADDR  ) NET_IPv4_ADDR_NONE,
+                                                 (CPU_INT08U    *) paddr_hw,
+                                                 (CPU_INT08U     ) addr_hw_len,
+                                                 (CPU_INT08U    *)&pmsg->MsgBuf[0],
+                                                 (CPU_INT16U    *)&pmsg->MsgLen,
+                                                 (DHCPc_ERR     *) perr);
+
+                switch (*perr) {
+                    case DHCPc_ERR_NONE:                        /* If NO err                          ...               */
+
+                         switch (dhcp_rx_msg_type) {
+                             case DHCP_MSG_ACK:                 /* ... & rx'd msg is ACK,             ...               */
+                                  rx_done      = DEF_YES;       /* ... rx        done                 ...               */
+                                  request_done = DEF_YES;       /* ... & REQUEST done.                                  */
+                                  break;
+
+
+                             case DHCP_MSG_NAK:                 /* ... else if rx'd msg is NAK,       ...               */
+                                  rx_done      = DEF_YES;       /* ... rx        done,                ...               */
+                                  request_done = DEF_YES;       /* ... REQUEST done,                  ...               */
+                                 *perr = DHCPc_ERR_RX_NAK;      /* ... & rtn err.                                       */
+                                  break;
+
+
+                             default:                           /* ... Else rx'd msg NOT ACK nor NAK, ...               */
+                                  rx_done = DEF_NO;             /* ... rx NOT done.                                     */
+                                  break;
+                         }
+                         break;
+
+
+                    default:                                    /* If rx err,         ...                               */
+                         rx_done     = DEF_YES;
+                         request_dly = DEF_YES;
+                         request_retry_cnt++;                   /* ... restart REQUEST.                                 */
+                         break;
+                }
+            }
+        }
+    }
+
+    if (*perr != DHCPc_ERR_NONE) {
+        DHCPc_MsgFree(pmsg);
+        return;
+    }
+
+                                                                /* ------------ COPY ACK IN IF INFO STRUCT ------------ */
+    if (pif_info->MsgPtr != (DHCPc_MSG *)0) {                   /* If msg ptr NOT NULL, ...                             */
+        DHCPc_MsgFree(pif_info->MsgPtr);                        /* ... free msg         ...                             */
+    }
+
+    pif_info->MsgPtr = pmsg;                                    /* ... & set msg ptr to rx'd ACK.                       */
+}
+
+
+/*
+*********************************************************************************************************
+*                                       DHCPc_DeclineRelease()
+*
+* Description : (1) Perform the DECLINE or RELEASE phase of the lease negotiation :
+*
+*                   (a) Get                      message
+*                   (b) Prepare  DECLINE/RELEASE message
+*                   (c) Transmit DECLINE/RELEASE message
+*
+*
+* Argument(s) : sock_id         Socket ID of socket to transmit & receive DHCPc data.
+*
+*               pif_info        Pointer to DHCP interface information.
+*               --------        Argument validated in DHCPc_InitStateHandler(),
+*                                                     DHCPc_StopStateHandler().
+*
+*               msg_type        DHCP message type to prepare :
+*
+*                                   DHCP_MSG_DECLINE        Decline message
+*                                   DHCP_MSG_RELEASE        Release message
+*
+*               paddr_hw        Pointer to hardware address buffer.
+*
+*               addr_hw_len     Length of the hardware address buffer pointed to by 'paddr_hw'.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DECLINE/RELEASE successfully transmitted
+*                               DHCPc_ERR_NULL_PTR              Argument(s) passed a NULL pointer.
+*                               DHCPc_ERR_INVALID_HW_ADDR       Argument 'paddr_hw' has an invalid length.
+*                               DHCPc_ERR_INVALID_MSG           Invalid DHCP message.
+*
+*                                                               ------ RETURNED BY DHCPc_MsgGet() : ------
+*                               DHCPc_ERR_MSG_NONE_AVAIL        Message pool empty.
+*
+*                                                               --- RETURNED BY DHCPc_TxMsgPrepare() : ---
+*                               DHCPc_ERR_INVALID_MSG_SIZE      Argument 'pmsg_buf' size invalid.
+*                               DHCPc_ERR_INVALID_MSG           Invalid DHCP message.
+*
+*                                                               -------- RETURNED BY DHCPc_Tx() : --------
+*                               DHCPc_ERR_TX                    Transmit error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_InitStateHandler(),
+*               DHCPc_StopStateHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_DeclineRelease (NET_SOCK_ID      sock_id,
+                                    DHCPc_IF_INFO   *pif_info,
+                                    DHCPc_MSG_TYPE   msg_type,
+                                    CPU_INT08U      *paddr_hw,
+                                    CPU_INT08U       addr_hw_len,
+                                    DHCPc_ERR       *perr)
+{
+    DHCPc_MSG           *pmsg;
+    CPU_INT16U           release_msg_len;
+    NET_IPv4_ADDR        addr_ip_server;
+    NET_SOCK_ADDR_IPv4   addr_server;
+    NET_SOCK_ADDR_LEN    addr_server_size;
+
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                   /* --------------- VALIDATE PTR & ARGS ---------------- */
+    if (paddr_hw == (CPU_INT08U *)0) {
+       *perr = DHCPc_ERR_NULL_PTR;
+        return;
+    }
+
+    if (addr_hw_len != NET_IF_ETHER_ADDR_SIZE) {
+       *perr = DHCPc_ERR_INVALID_HW_ADDR;
+        return;
+    }
+#endif
+
+    switch (msg_type) {
+        case DHCP_MSG_DECLINE:
+             addr_ip_server = NET_IPv4_ADDR_BROADCAST;
+             break;
+
+
+        case DHCP_MSG_RELEASE:
+             addr_ip_server = pif_info->ServerID;
+             break;
+
+
+        default:
+            *perr = DHCPc_ERR_INVALID_MSG;
+             return;
+    }
+
+                                                                /* --------------------- GET MSG ---------------------- */
+    pmsg = DHCPc_MsgGet(perr);
+    if (*perr != DHCPc_ERR_NONE) {
+        return;
+    }
+
+                                                                /* --------------- PREPARE RELEASE MSG ---------------- */
+    release_msg_len = DHCPc_TxMsgPrepare((DHCPc_IF_INFO *) pif_info,
+                                         (DHCPc_MSG_TYPE ) msg_type,
+                                         (CPU_INT08U    *) paddr_hw,
+                                         (CPU_INT08U     ) addr_hw_len,
+                                         (CPU_INT08U    *)&pmsg->MsgBuf[0],
+                                         (CPU_INT16U     ) DHCP_MSG_BUF_SIZE,
+                                         (DHCPc_ERR     *) perr);
+    if (*perr != DHCPc_ERR_NONE) {
+        DHCPc_MsgFree(pmsg);
+        return;
+    }
+
+
+                                                                /* ---------------------- TX MSG ---------------------- */
+    addr_server_size = sizeof(addr_server);
+    Mem_Clr((void     *)&addr_server,
+            (CPU_SIZE_T) addr_server_size);
+    addr_server.AddrFamily = NET_SOCK_ADDR_FAMILY_IP_V4;
+    addr_server.Addr       = addr_ip_server;
+    addr_server.Port       = NET_UTIL_HOST_TO_NET_16(DHCPc_CFG_IP_PORT_SERVER);
+
+    DHCPc_Tx((NET_SOCK_ID      ) sock_id,
+             (void            *)&pmsg->MsgBuf[0],
+             (CPU_INT16U       ) release_msg_len,
+             (NET_SOCK_ADDR   *)&addr_server,
+             (NET_SOCK_ADDR_LEN) addr_server_size,
+             (DHCPc_ERR       *) perr);
+
+
+    DHCPc_MsgFree(pmsg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc_CalcBackOff()
+*
+* Description : Calculate next backed-off retransmit/retry timeout value.
+*
+* Argument(s) : timeout_ms      Current timeout value (in milliseconds).
+*
+* Return(s)   : Backed-off re-transmit/retry timeout value (in milliseconds).
+*
+* Caller(s)   : DHCPc_Discover(),
+*               DHCPc_Req().
+*
+* Note(s)     : (1) RFC #2131, Section 4.1 'Constructing and sending DHCP messages' states that "the
+*                   client MUST adopt a retransmission strategy that incorporates a randomized
+*                   exponential backoff algorithm to determine the delay between retransmissions".
+*
+*                   It also stipulates that "the retransmission delay SHOULD be double with subsequent
+*                   retransmissions up to a maximum of 64 seconds".
+*
+*                   This implementation takes some distance from the RFC by setting the initial delay
+*                   value to 2 seconds instead of the proposed 4 seconds.  It also does NOT randomize
+*                   the delay value.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  DHCPc_CalcBackOff (CPU_INT16U  timeout_ms)
+{
+    CPU_INT32U  timeout_calcd;
+
+
+    if (timeout_ms == 0) {
+        timeout_calcd = (CPU_INT32U)DHCPc_BACKOFF_DLY_INITIAL_MS;
+
+    } else {
+        timeout_calcd = (timeout_ms < (CPU_INT32U)DHCPc_BACKOFF_DLY_MAX_MS)
+                      ? (timeout_ms * (CPU_INT32U)DHCPc_BACKOFF_DLY_SCALAR)
+                      : (CPU_INT32U)DHCPc_BACKOFF_DLY_MAX_MS;
+
+        timeout_calcd = DEF_MIN((CPU_INT32U)timeout_calcd,
+                                (CPU_INT32U)DHCPc_BACKOFF_DLY_MAX_MS);
+    }
+
+    return ((CPU_INT16U)timeout_calcd);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc_AddrValidate()
+*
+* Description : (1) Validate IP address not already used on the network.
+*
+*                   (a) Probe addr on network
+*                   (b) Wait for reply
+*                   (c) Get HW addr from ARP cache
+*
+*
+* Argument(s) : if_nbr          IF on which to perform address validation.
+*
+*               addr_target     IP address to validate, in network-order.
+*
+*               dly_ms          Delay to wait for a reply, in milliseconds.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  No error, address NOT used on the network.
+*                               DHCPc_ERR_ADDR_VALIDATE         Error validating address.
+*                               DHCPc_ERR_ADDR_USED             Address already used on the network.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_InitStateHandler().
+*
+* Note(s)     : (2) If ARP is not present (NET_ARP_MODULE_EN not defined), or if any other error
+*                   happens when attempting to check the address, DHCPc_ERR_ADDR_VALIDATE is returned,
+*                   meaning that the check does not allow to conclude anything.
+*********************************************************************************************************
+*/
+
+#if ((DHCPc_CFG_ADDR_VALIDATE_EN       == DEF_ENABLED) || \
+     (DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN == DEF_ENABLED))
+static  void  DHCPc_AddrValidate (NET_IF_NBR      if_nbr,
+                                  NET_IPv4_ADDR   addr_target,
+                                  CPU_INT32U      dly_ms,
+                                  DHCPc_ERR      *perr)
+{
+#ifdef  NET_ARP_MODULE_EN
+    CPU_INT08U        hw_addr_sender[NET_CACHE_HW_ADDR_LEN_ETHER];
+    NET_IPv4_ADDR     addr_this_host;
+    NET_ARP_ADDR_LEN  addr_len;
+#endif
+    NET_ERR           err_net;
+
+
+   (void)&err_net;                                              /* Prevent possible 'variable unused' warning.          */
+
+   *perr = DHCPc_ERR_ADDR_VALIDATE;                             /* Dflt rtn val.                                        */
+
+#ifdef  NET_ARP_MODULE_EN
+    addr_this_host = NET_IPv4_ADDR_NONE;
+    addr_len       = sizeof(addr_target);
+
+                                                                /* ---------------- PROBE ADDR ON NET ----------------- */
+    NetARP_CacheProbeAddrOnNet((NET_PROTOCOL_TYPE) NET_PROTOCOL_TYPE_IP_V4,
+                               (CPU_INT08U      *)&addr_this_host,
+                               (CPU_INT08U      *)&addr_target,
+                               (NET_ARP_ADDR_LEN ) addr_len,
+                               (NET_ERR         *)&err_net);
+
+    if (err_net != NET_ARP_ERR_NONE) {
+        return;                                                 /* See Note #2.                                         */
+    }
+                                                                /* ------------------ WAIT FOR REPLY ------------------ */
+    KAL_Dly(dly_ms);
+
+                                                                /* ------------ GET HW ADDR FROM ARP CACHE ------------ */
+    NetARP_CacheGetAddrHW(                   if_nbr,
+                          (CPU_INT08U     *)&hw_addr_sender[0],
+                          (NET_ARP_ADDR_LEN) NET_CACHE_HW_ADDR_LEN_ETHER,
+                          (CPU_INT08U     *)&addr_target,
+                          (NET_ARP_ADDR_LEN) addr_len,
+                          (NET_ERR        *)&err_net);
+
+    switch (err_net) {
+        case NET_ARP_ERR_CACHE_NOT_FOUND:                       /* If cache NOT found or cache pending, ...             */
+        case NET_ARP_ERR_CACHE_PEND:
+        case NET_CACHE_ERR_PEND:
+            *perr = DHCPc_ERR_NONE;                             /* ... addr NOT used.                                   */
+             break;
+
+
+        case NET_ARP_ERR_NONE:                                  /* If NO err, ...                                       */
+            *perr = DHCPc_ERR_ADDR_USED;                        /* ... hw addr in cache resolved (addr used).          */
+             break;
+
+
+        default:
+            *perr = DHCPc_ERR_ADDR_VALIDATE;
+             break;
+    }
+
+
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_AddrCfg()
+*
+* Description : Configure the interface's network parameters with the last accepted OFFER.
+*
+* Argument(s) : pif_info        Pointer to DHCP interface information.
+*               --------        Argument validated in DHCPc_InitStateHandler().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Interface's network successfully configured.
+*                               DHCPc_ERR_IF_CFG                Error configuring the interface's network.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_InitStateHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_AddrCfg (DHCPc_IF_INFO  *pif_info,
+                             DHCPc_ERR      *perr)
+{
+    DHCPc_MSG      *pmsg;
+    DHCP_MSG_HDR   *pmsg_hdr;
+    CPU_INT08U     *popt;
+    CPU_INT08U      opt_val_len;
+    CPU_BOOLEAN     cfgd;
+    NET_IF_NBR      if_nbr;
+    NET_IPv4_ADDR   addr_host;
+    NET_IPv4_ADDR   addr_subnet_mask;
+    NET_IPv4_ADDR   addr_dflt_gateway;
+    NET_ERR         err_net;
+
+
+    pmsg     = (DHCPc_MSG    *) pif_info->MsgPtr;
+    pmsg_hdr = (DHCP_MSG_HDR *)&pmsg->MsgBuf[0];
+
+                                                                /* -------------------- GET PARAM --------------------- */
+    addr_subnet_mask  = NET_IPv4_ADDR_NONE;
+    addr_dflt_gateway = NET_IPv4_ADDR_NONE;
+
+                                                                /* Get assign'd addr.                                   */
+    NET_UTIL_VAL_COPY_GET_NET_32(&addr_host, &pmsg_hdr->yiaddr);
+
+                                                                /* Get assign'd subnet mask.                            */
+    popt = DHCPc_MsgGetOpt((DHCPc_OPT_CODE) DHCP_OPT_SUBNET_MASK,
+                           (CPU_INT08U   *)&pmsg->MsgBuf[0],
+                           (CPU_INT16U    ) pmsg->MsgLen,
+                           (CPU_INT08U   *)&opt_val_len);
+    if (popt != (CPU_INT08U *)0) {
+        NET_UTIL_VAL_COPY_GET_NET_32(&addr_subnet_mask, popt);
+    }
+
+    popt = DHCPc_MsgGetOpt((DHCPc_OPT_CODE) DHCP_OPT_ROUTER,    /* Get assign'd dflt gateway.                           */
+                           (CPU_INT08U   *)&pmsg->MsgBuf[0],
+                           (CPU_INT16U    ) pmsg->MsgLen,
+                           (CPU_INT08U   *)&opt_val_len);
+    if (popt != (CPU_INT08U *)0) {
+        NET_UTIL_VAL_COPY_GET_NET_32(&addr_dflt_gateway, popt);
+    }
+
+                                                                /* ------------------- CFG IF ADDR -------------------- */
+    if_nbr = pif_info->IF_Nbr;
+    cfgd   = NetIPv4_CfgAddrAddDynamic(if_nbr, addr_host, addr_subnet_mask, addr_dflt_gateway, &err_net);
+    if (cfgd != DEF_OK) {                                       /* If cfg invalid, ...                                  */
+       *perr = DHCPc_ERR_IF_CFG;                                /* ... rtn err.                                         */
+        return;
+    }
+
+   *perr = DHCPc_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      DHCPc_AddrLocalLinkCfg()
+*
+* Description : (1) Perform action associated with dynamic link-local address configuration
+*
+*                   (a) Get random address
+*                   (b) Test address
+*                   (c) Interpret test result
+*                   (d) Configure interface and announce IP address
+*
+*
+* Argument(s) : pif_info        Pointer to DHCP interface information.
+*               --------        Argument checked in DHCPc_InitStateHandler().
+*
+*               paddr_hw        Pointer to hardware address buffer.
+*
+*               addr_hw_len     Length of the hardware address buffer pointed to by 'paddr_hw'.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Interface configured using a link-local address.
+*                               DHCPc_ERR_IF_CFG                Error configuring the interface's network.
+*
+*                                                               ------ RETURNED BY DHCPc_AddrValidate() : ------
+*                               DHCPc_ERR_ADDR_VALIDATE         Error validating address.
+*                               DHCPc_ERR_ADDR_USED             Address already used on the network.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : (2) From RFC #3027, section 'Probe details' :
+*
+*                   (a) "If the number of conflicts [experienced in the process of trying to acquire an
+*                       address] exceeds MAX_CONFLICTS, then the host MUST limit the rate at which it
+*                       probes for new addresses to no more than one new address per RATE_LIMIT_INTERVAL".
+*
+*                   (b) "When ready to begin probing, the host should then wait for a random time interval
+*                       selected uniformly in the range zero to PROBE_WAIT seconds, and should then send
+*                       PROBE_NUM probe packets, each of these probe packets spaced randomly, PROBE_MIN to
+*                       PROBE_MAX seconds apart".
+*
+*                       This implementation takes some distance from the RFC by waiting PROBE_WAIT
+*                       seconds before sending the first probe packet.  As for the retransmission of ARP
+*                       packets, this if left to the ARP layer.
+*
+*               (3) From RFC #3027, section 'Announcing an Address', "[...] the host MUST announce its
+*                   claimed address by broadcasting ANNOUNCE_NUM ARP announcements, spaced
+*                   ANNOUNCE_INTERVAL seconds apart".
+*
+*                   This is being done to make sure hosts on the network do NOT have ARP cache entries
+*                   from other host that had been previously using the same address.
+*********************************************************************************************************
+*/
+
+#if (DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN == DEF_ENABLED)
+static  void  DHCPc_AddrLocalLinkCfg (DHCPc_IF_INFO  *pif_info,
+                                      CPU_INT08U     *paddr_hw,
+                                      CPU_INT08U      addr_hw_len,
+                                      DHCPc_ERR      *perr)
+{
+    NET_IPv4_ADDR  addr_host;
+    NET_IPv4_ADDR  addr_net;
+    CPU_INT08U     addr_len;
+    CPU_BOOLEAN    addr_srch_done;
+    CPU_INT08U     nbr_conflicts;
+    CPU_BOOLEAN    cfgd;
+    CPU_INT08U     announce_nbr;
+    CPU_BOOLEAN    announce_done;
+    NET_ERR        err_net;
+
+
+                                                                /* ------------------ GET RANDOM ADDR ----------------- */
+    nbr_conflicts  = 0;
+    addr_srch_done = DEF_NO;
+
+    while ((addr_srch_done != DEF_YES) &&
+           (nbr_conflicts  <=  DHCPc_CFG_LOCAL_LINK_MAX_RETRY)) {
+
+        if (nbr_conflicts > DHCP_LOCAL_LINK_MAX_CONFLICTS) {
+                                                                /* See Note #2a.                                        */
+            KAL_Dly((CPU_INT32U)(DHCP_LOCAL_LINK_RATE_LIMIT_INTERVAL_S * DEF_TIME_NBR_mS_PER_SEC));
+        }
+
+        addr_host =  DHCPc_AddrLocalLinkGet(paddr_hw, addr_hw_len);
+        addr_net  = (NET_IPv4_ADDR)NET_UTIL_HOST_TO_NET_32(addr_host);
+
+
+                                                                /* -------------- VALIDATE ADDR NOT USED -------------- */
+                                                                /* Dly (see Note #2b).                                  */
+        KAL_Dly((CPU_INT32U)(DHCP_LOCAL_LINK_PROBE_WAIT_S * DEF_TIME_NBR_mS_PER_SEC));
+
+                                                                /* Probe addr.                                          */
+        DHCPc_AddrValidate(                pif_info->IF_Nbr,
+                           (NET_IPv4_ADDR) addr_net,
+                           (CPU_INT32U   )(DHCP_LOCAL_LINK_ANNOUNCE_WAIT_S * DEF_TIME_NBR_mS_PER_SEC),
+                           (DHCPc_ERR   *) perr);
+        switch(*perr) {
+            case DHCPc_ERR_NONE:                                /* If addr not used, ...                                */
+                 addr_srch_done = DEF_YES;                      /* ... addr validated.                                  */
+                 break;
+
+
+            case DHCPc_ERR_ADDR_USED:                           /* Else if addr used, ...                               */
+                 nbr_conflicts++;                               /* ... restart process.                                 */
+                 break;
+
+
+            case DHCPc_ERR_ADDR_VALIDATE:                       /* Else if any other error, ...                         */
+            default:
+                 addr_srch_done = DEF_YES;                      /* ... stop link-local cfg.                             */
+        }
+    }
+
+    if (*perr != DHCPc_ERR_NONE) {
+        return;
+    }
+
+                                                                /* -------------- CFG IF & ANNOUNCE ADDR -------------- */
+    cfgd = NetIPv4_CfgAddrAddDynamic((NET_IF_NBR   ) pif_info->IF_Nbr,
+                                     (NET_IPv4_ADDR) addr_host,
+                                     (NET_IPv4_ADDR) NET_IPv4_ADDR_LOCAL_LINK_HOST_MAX,
+                                     (NET_IPv4_ADDR) NET_IPv4_ADDR_NONE,
+                                     (NET_ERR     *)&err_net);
+    if (cfgd != DEF_OK) {
+       *perr = DHCPc_ERR_IF_CFG;
+        return;
+    }
+
+    addr_len      = sizeof(NET_IPv4_ADDR);
+    announce_nbr  = 0;
+    announce_done = DEF_NO;
+
+
+    while ((announce_nbr  < DHCP_LOCAL_LINK_ANNOUNCE_NUM) &&    /* See Note #3.                                         */
+           (announce_done != DEF_YES)) {
+
+        NetARP_TxReqGratuitous((NET_PROTOCOL_TYPE) NET_PROTOCOL_TYPE_IP_V4,
+                               (CPU_INT08U      *)&addr_net,
+                               (CPU_INT08U       ) addr_len,
+                               (NET_ERR         *)&err_net);
+
+        if (err_net == NET_ARP_ERR_NONE) {
+            KAL_Dly((CPU_INT32U)(DHCP_LOCAL_LINK_ANNOUNCE_INTERVAL_S * DEF_TIME_NBR_mS_PER_SEC));
+
+        } else {
+            announce_done = DEF_YES;
+        }
+
+        announce_nbr++;
+    }
+
+
+   *perr = DHCPc_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      DHCPc_AddrLocalLinkGet()
+*
+* Description : (1) Generate a pseudo-random IPv4 address in the Link-Local reserved range :
+*
+*                   (a) Generate a seed from the hardware address
+*                   (b) Generate a seed from the current time
+*                   (c) Get pseudo-random number from seeds
+*                   (d) Generate address
+*
+*
+* Argument(s) : paddr_hw        Pointer to hardware address buffer.
+*               --------        Argument validated in DHCPc_AddrLocalLinkCfg().
+*
+*               addr_hw_len     Length of the hardware address buffer pointed to by 'paddr_hw'.
+*
+* Return(s)   : IPv4 Link-Local address.
+*
+* Caller(s)   : DHCPc_AddrLocalLinkCfg().
+*
+* Note(s)     : (2) The seeds are generated by creating 32-bit values from :
+*
+*                   (a) The two least significant bytes of the hardware address, shifted by 16 bits &
+*                   (b) The     least significant byte  of the current time.
+*
+*               (3) The random address returned from this function is obtained by adding an "offset"
+*                   generated from the random number to the link-local base address (defined by
+*                   NET_IP_ADDR_LOCAL_LINK_HOST_MIN).
+*********************************************************************************************************
+*/
+
+#if (DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN == DEF_ENABLED)
+static  NET_IPv4_ADDR  DHCPc_AddrLocalLinkGet (CPU_INT08U  *paddr_hw,
+                                               CPU_INT08U   addr_hw_len)
+{
+    CPU_INT32U     time_cur;
+    CPU_INT32U     seed_hw_addr;
+    CPU_INT32U     seed_time;
+    CPU_INT32U     random;
+    NET_IPv4_ADDR  addr;
+
+
+                                                                /* ------------------ GENERATE SEEDS ------------------ */
+    seed_hw_addr = 0;                                           /* See Note #2a.                                        */
+    seed_hw_addr = ((((CPU_INT32U) paddr_hw + (addr_hw_len - 1)) << 24) |
+                    (((CPU_INT32U) paddr_hw + (addr_hw_len    )) << 16));
+
+
+    time_cur  =  DHCPc_OS_TimeGet_tick();                       /* See Note #2b.                                        */
+    seed_time = (time_cur & 0x0000FFFF);
+
+                                                                /* ---------------- GET PSEUDO-RAND NBR --------------- */
+    random = (seed_time | seed_hw_addr);                        /* OR the two seeds.                                    */
+
+                                                                /* ------------------- GENERATE ADDR ------------------ */
+                                                                /* See Note #3.                                         */
+    addr =            NET_IPv4_ADDR_LOCAL_LINK_HOST_MIN +
+           (random % (NET_IPv4_ADDR_LOCAL_LINK_HOST_MAX - NET_IPv4_ADDR_LOCAL_LINK_HOST_MIN + 1));
+
+    return (addr);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc_LeaseTimeCalc()
+*
+* Description : (1) Calculate the lease time & renewing/rebinding times for last accepted lease :
+*
+*                   (a) Get           lease time from ACK message
+*                   (b) Get/calculate times T1 & T2
+*                   (c) Update        times with negotiation duration & set minimum
+*                   (d) Configure     timer
+*
+*
+* Argument(s) : pif_info        Pointer to DHCP interface information.
+*               --------        Argument validated in DHCPc_InitStateHandler(),
+*                                                     DHCPc_RenewRebindStateHandler().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Lease time successfully calculated.
+*                               DHCPc_ERR_TMR_CFG               Configuration timer error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_InitStateHandler(),
+*               DHCPc_RenewRebindStateHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_LeaseTimeCalc (DHCPc_IF_INFO  *pif_info,
+                                   DHCPc_ERR      *perr)
+{
+    DHCPc_MSG   *pmsg;
+    CPU_INT08U  *popt;
+    CPU_INT08U   opt_val_len;
+    CPU_INT32U   time_lease;
+    CPU_INT32U   time_t1;
+    CPU_INT32U   time_t2;
+    CPU_INT32U   time_nego_stop;
+    CPU_INT32U   time_nego_sec;
+
+
+    time_lease = DHCP_LEASE_INFINITE;
+
+                                                                /* ------------- GET LEASE TIME FROM ACK -------------- */
+    pmsg = pif_info->MsgPtr;
+                                                                /* Get lease time.                                      */
+    popt = DHCPc_MsgGetOpt((DHCPc_OPT_CODE) DHCP_OPT_IP_ADDRESS_LEASE_TIME,
+                           (CPU_INT08U   *)&pmsg->MsgBuf[0],
+                           (CPU_INT16U    ) pmsg->MsgLen,
+                           (CPU_INT08U   *)&opt_val_len);
+    if (popt != (CPU_INT08U *)0) {
+        NET_UTIL_VAL_COPY_GET_NET_32(&time_lease, popt);
+    }
+
+    if (time_lease == DHCP_LEASE_INFINITE) {                    /* If lease time infinite, ...                          */
+        pif_info->LeaseTime_sec = DHCP_LEASE_INFINITE;
+        pif_info->T1_Time_sec   = DHCP_LEASE_INFINITE;
+        pif_info->T2_Time_sec   = DHCP_LEASE_INFINITE;
+
+       *perr = DHCPc_ERR_NONE;                                  /* ... NO tmr to set.                                   */
+        return;
+    }
+
+                                                                /* Get renewal time.                                    */
+    popt = DHCPc_MsgGetOpt((DHCPc_OPT_CODE) DHCP_OPT_RENEWAL_TIME_VALUE,
+                           (CPU_INT08U   *)&pmsg->MsgBuf[0],
+                           (CPU_INT16U    ) pmsg->MsgLen,
+                           (CPU_INT08U   *)&opt_val_len);
+    if (popt != (CPU_INT08U *)0) {
+        NET_UTIL_VAL_COPY_GET_NET_32(&time_t1, popt);
+
+    } else {
+        time_t1 = (CPU_INT32U)(time_lease * DHCP_T1_LEASE_FRACTION);
+    }
+
+                                                                /* Get rebinding time.                                  */
+    popt = DHCPc_MsgGetOpt((DHCPc_OPT_CODE) DHCP_OPT_REBINDING_TIME_VALUE,
+                           (CPU_INT08U   *)&pmsg->MsgBuf[0],
+                           (CPU_INT16U    ) pmsg->MsgLen,
+                           (CPU_INT08U   *)&opt_val_len);
+    if (popt != (CPU_INT08U *)0) {
+        NET_UTIL_VAL_COPY_GET_NET_32(&time_t2, popt);
+
+    } else {
+        time_t2 = (CPU_INT32U)(time_lease * DHCP_T2_LEASE_FRACTION);
+    }
+
+
+                                                                /* ----------------- CALC LEASE TIME ------------------ */
+    time_nego_stop = DHCPc_OS_TimeGet_tick();
+    time_nego_sec  = DHCPc_OS_TimeCalcElapsed_sec(pif_info->NegoStartTime,
+                                                  time_nego_stop);
+
+    if (time_t1 >  time_nego_sec) {                             /* Subst nego time.                                     */
+        time_t1 -= time_nego_sec;
+    }
+
+    if (time_t2 >  time_nego_sec) {
+        time_t2 -= time_nego_sec;
+    }
+
+    if (time_lease >  time_nego_sec) {
+        time_lease -= time_nego_sec;
+    }
+
+    pif_info->T1_Time_sec   = time_t1;
+    pif_info->T2_Time_sec   = time_t2;
+    pif_info->LeaseTime_sec = time_lease;
+
+
+                                                                /* --------------------- CFG TMR ---------------------- */
+    DHCPc_TmrCfg((DHCPc_IF_INFO *)pif_info,
+                 (DHCPc_COMM_MSG )DHCPc_COMM_MSG_T1_EXPIRED,
+                 (CPU_INT32U     )pif_info->T1_Time_sec,
+                 (DHCPc_ERR     *)perr);
+
+    if (*perr != DHCPc_ERR_NONE) {
+        *perr  = DHCPc_ERR_TMR_CFG;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       DHCPc_LeaseTimeUpdate()
+*
+* Description : (1) Update the lease time & renewing/rebinding times following lease extension failure :
+*
+*                   (a) Update lease times
+*                   (b) Determine timer value & message
+*                   (c) Configure timer
+*
+*
+* Argument(s) : pif_info        Pointer to DHCP interface information.
+*               --------        Argument validated in DHCPc_RenewRebindStateHandler().
+*
+*               exp_tmr_msg     Message for expired timer.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  Lease time successfully updated & timer set.
+*                               DHCPc_ERR_TMR_INVALID_MSG       Invalid expiration timer message.
+*                               DHCPc_ERR_TMR_CFG               Configuration timer error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_RenewRebindStateHandler().
+*
+* Note(s)     : (2) From RFC #2131, section 'Reacquisition and expiration', "In both RENEWING and
+*                   REBINDING states, if the client receives no response to its DHCPREQUEST message, the
+*                   client SHOULD wait one-half of the remaining time until T2 (in RENEWING state) and
+*                   one-half of the remaining lease time (in REBINDING state), down to a minimum of 60
+*                   seconds, before retransmitting the DHCPREQUEST message".
+*
+*                   However, in order to prevent a miss on one of the followed times (T1, T2, or the
+*                   lease itself), this implementation waits down to a remaining time of 5 minutes until
+*                   T2 (RENEWING) or the lease time (REBINDING).
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_LeaseTimeUpdate (DHCPc_IF_INFO   *pif_info,
+                                     DHCPc_COMM_MSG   exp_tmr_msg,
+                                     DHCPc_ERR       *perr)
+{
+    CPU_INT32U      time_nego_stop;
+    CPU_INT32U      time_nego_sec;
+    CPU_INT32U      tmr_val_sec;
+    DHCPc_COMM_MSG  tmr_msg;
+
+
+    time_nego_stop = DHCPc_OS_TimeGet_tick();
+    time_nego_sec  = DHCPc_OS_TimeCalcElapsed_sec(pif_info->NegoStartTime, time_nego_stop);
+
+                                                                /* ---------------- UPDATE LEASE TIMES ---------------- */
+                                                                /* Dec expired tmr time from other times.               */
+    switch (exp_tmr_msg) {
+        case DHCPc_COMM_MSG_T1_EXPIRED:
+             if (pif_info->LeaseTime_sec >  pif_info->T1_Time_sec) {
+                 pif_info->LeaseTime_sec -= pif_info->T1_Time_sec;
+             } else {
+                 pif_info->LeaseTime_sec  = 0;
+             }
+
+             if (pif_info->T2_Time_sec >  pif_info->T1_Time_sec) {
+                 pif_info->T2_Time_sec -= pif_info->T1_Time_sec;
+             } else {
+                 pif_info->T2_Time_sec  = 0;
+             }
+
+             pif_info->T1_Time_sec = 0;
+             break;
+
+
+        case DHCPc_COMM_MSG_T2_EXPIRED:
+             if (pif_info->LeaseTime_sec >  pif_info->T2_Time_sec) {
+                 pif_info->LeaseTime_sec -= pif_info->T2_Time_sec;
+             } else {
+                 pif_info->LeaseTime_sec  = 0;
+             }
+
+             pif_info->T2_Time_sec = 0;
+             pif_info->T1_Time_sec = 0;
+             break;
+
+
+        default:
+            *perr = DHCPc_ERR_TMR_INVALID_MSG;
+             return;
+    }
+
+                                                                /* Dec time elapsed since tmr expired.                  */
+    if (pif_info->LeaseTime_sec >  time_nego_sec) {
+        pif_info->LeaseTime_sec -= time_nego_sec;
+    }
+
+    if (pif_info->T2_Time_sec >  time_nego_sec) {
+        pif_info->T2_Time_sec -= time_nego_sec;
+    }
+
+
+                                                                /* ------------- DETERMINE TMR VAL & MSG -------------- */
+    switch (exp_tmr_msg) {                                      /* See Note #2.                                         */
+        case DHCPc_COMM_MSG_T1_EXPIRED:
+             if (pif_info->T2_Time_sec > (2 * DHCP_MIN_RETX_TIME_S)) {
+                 tmr_val_sec           = (pif_info->T2_Time_sec / 2);
+                 pif_info->T1_Time_sec =  tmr_val_sec;
+
+                 tmr_msg     = DHCPc_COMM_MSG_T1_EXPIRED;
+
+             } else {
+                 tmr_val_sec = pif_info->T2_Time_sec;
+                 tmr_msg     = DHCPc_COMM_MSG_T2_EXPIRED;
+             }
+             break;
+
+
+        case DHCPc_COMM_MSG_T2_EXPIRED:
+             if (pif_info->LeaseTime_sec > (2 * DHCP_MIN_RETX_TIME_S)) {
+                 tmr_val_sec           = (pif_info->LeaseTime_sec / 2);
+                 pif_info->T2_Time_sec =  tmr_val_sec;
+
+                 tmr_msg     = DHCPc_COMM_MSG_T2_EXPIRED;
+
+             } else {
+                 tmr_val_sec = pif_info->LeaseTime_sec;
+                 tmr_msg     = DHCPc_COMM_MSG_LEASE_EXPIRED;
+             }
+             break;
+
+
+        default:
+            *perr = DHCPc_ERR_TMR_INVALID_MSG;
+             return;
+    }
+
+                                                                /* --------------------- CFG TMR ---------------------- */
+    DHCPc_TmrCfg(pif_info, tmr_msg, tmr_val_sec, perr);
+    if (*perr != DHCPc_ERR_NONE) {
+        *perr  = DHCPc_ERR_TMR_CFG;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DHCPc_RxReply()
+*
+* Description : (1) Receive DHCP reply message :
+*
+*                   (a) Receive           message data from server
+*
+*                   (b) Validate received message
+*
+*                       (1) opcode
+*                       (2) hardware address
+*                       (3) transaction ID
+*                       (4) server      ID
+*
+*                   (c) Retrieve received message type
+*
+*
+* Argument(s) : sock_id             Socket ID of socket to receive DHCP reply message.
+*
+*               pif_info            Pointer to DHCP interface information.
+*               --------            Argument checked in DHCPc_Discover(),
+*                                                       DHCPc_Req().
+*
+*               server_id           Server identifier.
+*
+*               paddr_hw            Pointer to hardware address buffer.
+*
+*               addr_hw_len         Length of the hardware address buffer pointed to by 'paddr_hw'.
+*
+*               pmsg_buf            Pointer to DHCP message buffer to receive reply.
+*
+*               pmsg_buf_len        Pointer to a variable to ... :
+*
+*                                       (a) Pass the size of the message buffer pointed to by 'pmsg_buf'.
+*                                       (b) (1) Return the actual size of the received message buffer, if NO errors;
+*                                           (2) Return 0,                                              otherwise.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DHCPc reply successfully received.
+*                               DHCPc_ERR_NULL_PTR              Argument(s) passed a NULL pointer.
+*                               DHCPc_ERR_INVALID_MSG_SIZE      Argument 'pmsg_buf' size invalid.
+*                               DHCPc_ERR_INVALID_HW_ADDR       Argument 'paddr_hw' has an invalid length.
+*                               DHCPc_ERR_RX_MSG_TYPE           Error extracting message type from reply message.
+*
+*                                                               ----------- RETURNED BY DHCPc_Rx() : ------------
+*                               DHCPc_ERR_RX_OVF                Receive error, data buffer overflow.
+*                               DHCPc_ERR_RX                    Receive error.
+*
+* Return(s)   : Type of received message, if NO error.
+*
+*               DHCP_MSG_NONE,            otherwise.
+*
+* Caller(s)   : DHCPc_Discover(),
+*               DHCPc_Req().
+*
+* Note(s)     : (2) #### This implementation of the DHCP client presumes an Ethernet hardware type.
+*
+*               (3) Received messages smaller than the minimum size allowed are silently discarded.
+*
+*                   See also 'dhcp-c.h  DHCP MESSAGE DEFINES  Note #2'.
+*********************************************************************************************************
+*/
+
+static  DHCPc_MSG_TYPE  DHCPc_RxReply (NET_SOCK_ID     sock_id,
+                                       DHCPc_IF_INFO  *pif_info,
+                                       NET_IPv4_ADDR   server_id,
+                                       CPU_INT08U     *paddr_hw,
+                                       CPU_INT08U      addr_hw_len,
+                                       CPU_INT08U     *pmsg_buf,
+                                       CPU_INT16U     *pmsg_buf_len,
+                                       DHCPc_ERR      *perr)
+{
+    CPU_BOOLEAN         remote_match;
+    CPU_BOOLEAN         opcode_reply;
+    CPU_BOOLEAN         addr_hw_match;
+    CPU_BOOLEAN         transaction_id_match;
+    CPU_BOOLEAN         rx_err;
+    NET_SOCK_ADDR       addr_remote;
+    NET_SOCK_ADDR_LEN   addr_remote_size;
+    CPU_INT16U          rx_msg_len;
+    DHCP_MSG_HDR       *pmsg_hdr;
+    CPU_INT32U          rx_xid;
+    CPU_INT08U         *popt;
+    CPU_INT08U         *opt_val_len;
+    NET_IPv4_ADDR       addr_server;
+    DHCPc_MSG_TYPE      msg_type;
+
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                   /* --------------- VALIDATE PTR & ARGS ---------------- */
+    if ((paddr_hw     == (CPU_INT08U *)0) ||
+        (pmsg_buf     == (CPU_INT08U *)0) ||
+        (pmsg_buf_len == (CPU_INT16U *)0)) {
+       *pmsg_buf_len = 0;
+       *perr         = DHCPc_ERR_NULL_PTR;
+        return (DHCP_MSG_NONE);
+    }
+
+    if (*pmsg_buf_len < DHCP_MSG_RX_MIN_LEN) {
+        *pmsg_buf_len = 0;
+        *perr         = DHCPc_ERR_INVALID_MSG_SIZE;
+        return (DHCP_MSG_NONE);
+    }
+
+    if (addr_hw_len != NET_IF_ETHER_ADDR_SIZE) {
+       *pmsg_buf_len = 0;
+       *perr         = DHCPc_ERR_INVALID_HW_ADDR;
+        return (DHCP_MSG_NONE);
+    }
+
+#else
+   (void)&addr_hw_len;                                          /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+                                                                /* ------------ RX MESSAGE FROM SERVER(S) ------------- */
+    remote_match         = DEF_NO;
+    opcode_reply         = DEF_NO;
+    addr_hw_match        = DEF_NO;
+    transaction_id_match = DEF_NO;
+    rx_err               = DEF_NO;
+
+    while (((remote_match         != DEF_YES)  ||
+            (opcode_reply         != DEF_YES)  ||
+            (addr_hw_match        != DEF_YES)  ||
+            (transaction_id_match != DEF_YES)) &&
+            (rx_err               != DEF_YES)) {
+
+        addr_remote_size = sizeof(addr_remote);
+
+        rx_msg_len = DHCPc_Rx((NET_SOCK_ID        ) sock_id,
+                              (void              *) pmsg_buf,
+                              (CPU_INT16U         )*pmsg_buf_len,
+                              (NET_SOCK_ADDR     *)&addr_remote,
+                              (NET_SOCK_ADDR_LEN *)&addr_remote_size,
+                              (DHCPc_ERR         *) perr);
+
+        if (*perr == DHCPc_ERR_NONE) {
+                                                                /* ------------------- VALIDATE MSG ------------------- */
+            if (rx_msg_len >= DHCP_MSG_RX_MIN_LEN) {            /* See Note #3.                                         */
+                pmsg_hdr = (DHCP_MSG_HDR *)pmsg_buf;
+
+                                                                /* Validate opcode.                                     */
+                opcode_reply = (pmsg_hdr->op == DHCP_OP_REPLY) ? DEF_YES : DEF_NO;
+
+
+                                                                /* Validate HW addr.                                    */
+                addr_hw_match = Mem_Cmp((void     *)pmsg_hdr->chaddr,
+                                        (void     *)paddr_hw,
+                                        (CPU_SIZE_T)NET_IF_ETHER_ADDR_SIZE);
+
+
+                                                                /* Validate transaction ID.                             */
+                NET_UTIL_VAL_COPY_GET_NET_32(&rx_xid, &pmsg_hdr->xid);
+                transaction_id_match = (rx_xid == pif_info->TransactionID) ? DEF_YES : DEF_NO;
+
+
+                                                                /* Validate server id.                                  */
+                if (server_id != NET_IPv4_ADDR_NONE) {          /* If server id known,    ...                           */
+                                                                /* ... get server id opt, ...                           */
+                    popt = DHCPc_MsgGetOpt((DHCPc_OPT_CODE) DHCP_OPT_SERVER_IDENTIFIER,
+                                           (CPU_INT08U   *) pmsg_buf,
+                                           (CPU_INT16U    ) rx_msg_len,
+                                           (CPU_INT08U   *)&opt_val_len);
+
+                    if (popt == (CPU_INT08U *)0) {
+                        remote_match = DEF_NO;
+
+                    } else {                                    /* ... & compare with lease server id.                  */
+                        NET_UTIL_VAL_COPY_32(&addr_server, popt);
+                        remote_match = (addr_server == server_id ? DEF_YES : DEF_NO);
+                    }
+
+                } else {
+                    remote_match = DEF_YES;
+                }
+            }
+
+        } else {
+            rx_err = DEF_YES;
+        }
+    }
+
+    if (*perr != DHCPc_ERR_NONE) {
+       *pmsg_buf_len = 0;
+        return (DHCP_MSG_NONE);
+    }
+
+                                                                /* ------------------- GET MSG TYPE ------------------- */
+    popt = DHCPc_MsgGetOpt((DHCPc_OPT_CODE) DHCP_OPT_DHCP_MESSAGE_TYPE,
+                           (CPU_INT08U   *) pmsg_buf,
+                           (CPU_INT16U    ) rx_msg_len,
+                           (CPU_INT08U   *)&opt_val_len);
+
+    if (popt == (CPU_INT08U *)0) {
+       *pmsg_buf_len = 0;
+       *perr         = DHCPc_ERR_RX_MSG_TYPE;
+        return (DHCP_MSG_NONE);
+    }
+
+                                                                /* Retrieve msg type opt val.                           */
+    msg_type     = (DHCPc_MSG_TYPE)(*popt);
+   *pmsg_buf_len =  rx_msg_len;
+
+    return (msg_type);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             DHCPc_Rx()
+*
+* Description : Receive DHCPc data via socket.
+*
+* Argument(s) : sock_id             Socket ID of socket to receive DHCPc data.
+*
+*               pdata_buf           Pointer to DHCPc data buffer to receive data.
+*               ---------           Argument checked in DHCPc_RxReply().
+*
+*               data_buf_len        Length  of DHCPc data buffer to receive data.
+*
+*               paddr_remote        Pointer to an address buffer that will receive the socket address
+*                                       structure with the received data's remote address.
+*
+*               paddr_remote_len    Pointer to a variable to ... :
+*
+*                                       (a) Pass the size of the address buffer pointed to by 'paddr_remote'.
+*                                       (b) Return the actual size of socket address structure with the
+*                                               received data's remote address.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DHCPc data successfully received.
+*                               DHCPc_ERR_RX_OVF                Receive error, data buffer overflow.
+*                               DHCPc_ERR_RX                    Receive error.
+*
+* Return(s)   : Length of DHCPc data received (in octets), if no error.
+*
+*               0,                                         otherwise.
+*
+* Caller(s)   : DHCPc_RxReply().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  DHCPc_Rx (NET_SOCK_ID         sock_id,
+                              void               *pdata_buf,
+                              CPU_INT16U          data_buf_len,
+                              NET_SOCK_ADDR      *paddr_remote,
+                              NET_SOCK_ADDR_LEN  *paddr_remote_len,
+                              DHCPc_ERR          *perr)
+{
+    CPU_INT16U  rx_len;
+    NET_ERR     err_net;
+
+
+                                                                /* ------------------- RX APP DATA -------------------- */
+    rx_len = NetApp_SockRx((NET_SOCK_ID        ) sock_id,
+                           (void              *) pdata_buf,
+                           (CPU_INT16U         ) data_buf_len,
+                           (CPU_INT16U         ) 0,
+#if (NET_VERSION >= 21200u)
+                           (NET_SOCK_API_FLAGS ) NET_SOCK_FLAG_NONE,
+#else
+                           (CPU_INT16S         ) NET_SOCK_FLAG_NONE,
+#endif
+                           (NET_SOCK_ADDR     *) paddr_remote,
+                           (NET_SOCK_ADDR_LEN *) paddr_remote_len,
+                           (CPU_INT16U         ) DHCPc_RX_MAX_RETRY,
+                           (CPU_INT32U         ) DHCPc_CFG_MAX_RX_TIMEOUT_MS,
+                           (CPU_INT32U         ) DHCPc_RX_TIME_DLY_MS,
+                           (NET_ERR           *)&err_net);
+
+    switch (err_net) {
+        case NET_APP_ERR_NONE:
+            *perr = DHCPc_ERR_NONE;
+             break;
+
+
+        case NET_APP_ERR_DATA_BUF_OVF:
+            *perr = DHCPc_ERR_RX_OVF;
+             break;
+
+
+        case NET_APP_ERR_CONN_CLOSED:
+        case NET_APP_ERR_FAULT:
+        case NET_APP_ERR_INVALID_ARG:
+        case NET_APP_ERR_INVALID_OP:
+        case NET_ERR_RX:
+        default:
+             rx_len = 0;
+            *perr   = DHCPc_ERR_RX;
+             break;
+    }
+
+    return (rx_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc_TxMsgPrepare()
+*
+* Description : Prepare DHCP message.
+*
+* Argument(s) : pif_info        Pointer to DHCP interface information.
+*               --------        Argument checked   in DHCPc_Discover(),
+*                                                     DHCPc_Req(),
+*                                        validated in DHCPc_DeclineRelease().
+*
+*               msg_type        Type of message to be prepared :
+*
+*                                   DHCP_MSG_DISCOVER
+*                                   DHCP_MSG_REQUEST
+*                                   DHCP_MSG_DECLINE
+*                                   DHCP_MSG_RELEASE
+*
+*               paddr_hw        Pointer to hardware address buffer.
+*
+*               addr_hw_len     Length of the hardware address buffer pointed to by 'paddr_hw'.
+*
+*               pmsg_buf        Pointer to DHCP transmit message buffer.
+*
+*               msg_buf_size    Size of message buffer (in octets).
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DHCPc message successfully prepared.
+*                               DHCPc_ERR_NULL_PTR              Argument(s) 'paddr_hw/pmsg_buf' passed a
+*                                                                   NULL pointer.
+*                               DHCPc_ERR_INVALID_HW_ADDR       Argument 'paddr_hw' has an invalid length.
+*                               DHCPc_ERR_INVALID_MSG_SIZE      Argument 'pmsg_buf' size invalid.
+*                               DHCPc_ERR_INVALID_MSG           Invalid DHCP message.
+*
+* Return(s)   : Size of the message (in octets).
+*
+* Caller(s)   : DHCPc_Discover(),
+*               DHCPc_Req(),
+*               DHCPc_DeclineRelease().
+*
+* Note(s)     : (2) #### This implementation of the DHCP client presumes an Ethernet hardware type.
+*
+*               (3) From RFC #2131, section 'Protocol Summary', "To work around some clients that cannot
+*                   accept IP unicast datagrams before the TCP/IP software is configured [...], DHCP uses
+*                   the 'flags' field".  Section 'Constructing and sending DHCP messages' continues by
+*                   adding that "a client that cannot receive unicast IP datagrams until its protocol
+*                   software has been configured with an IP address SHOULD set the BROADCAST bit in the
+*                   'flags' field to 1".
+*
+*                  "A server [...] sending [...] a DHCP message directly to a DHCP client SHOULD examine
+*                   [that bit] in the 'flags' field.  If this bit is set to 1, the DHCP message SHOULD be
+*                   sent as an IP broadcast using an IP broadcast address as the IP destination address
+*                   and the link-layer broadcast address as the link-layer destination address".
+*
+*                   #### Since the Micrium uC/TCP-IP stack is NOT able to receive a packet on an
+*                   unconfigured interface, the BROADCAST bit is always set in the 'flags' field of a DHCP
+*                   message, when permitted by the RFC.
+*
+*               (4) #### The application requested parameters are NOT checked agains the system requested
+*                   ones, so it is possible that the same parameter be requested twice.  However, this
+*                   CANNOT lead to potential problem.
+*
+*               (5) The vendor-specific options MUST be large enough so the DHCP message is at least
+*                   DHCP_MSG_TX_MIN_LEN octets.
+*
+*                   See also 'dhcp-c.h  DHCP MESSAGE DEFINES  Note #2'.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  DHCPc_TxMsgPrepare (DHCPc_IF_INFO   *pif_info,
+                                        DHCPc_MSG_TYPE   msg_type,
+                                        CPU_INT08U      *paddr_hw,
+                                        CPU_INT08U       addr_hw_len,
+                                        CPU_INT08U      *pmsg_buf,
+                                        CPU_INT16U       msg_buf_size,
+                                        DHCPc_ERR       *perr)
+{
+    DHCP_MSG_HDR  *pmsg_hdr;
+    CPU_INT08U    *pmsg_opt;
+    DHCPc_MSG     *pmsg_last_rx;
+    DHCP_MSG_HDR  *pmsg_last_rx_hdr;
+    CPU_INT16U     msg_size;
+    CPU_INT16U     flag;
+    CPU_INT32U     ciaddr;
+    CPU_BOOLEAN    get_local_addr;
+    CPU_BOOLEAN    wr_req_ip_addr;
+    CPU_BOOLEAN    wr_server_id;
+    CPU_BOOLEAN    req_param;
+    CPU_INT08U     req_param_qty;
+    CPU_INT08U    *popt;
+    CPU_INT16U     opt_len;
+    CPU_INT16U     opt_pad_len;
+#if (CPU_CFG_NAME_EN == DEF_ENABLED)
+    CPU_CHAR       host_name[CPU_CFG_NAME_SIZE];
+    CPU_SIZE_T     host_name_len;
+    CPU_ERR        err_cpu;
+#endif
+
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                   /* --------------- VALIDATE PTR & ARGS ---------------- */
+    if ((paddr_hw == (CPU_INT08U    *)0) ||
+        (pmsg_buf == (CPU_INT08U    *)0)) {
+       *perr = DHCPc_ERR_NULL_PTR;
+        return (0);
+    }
+
+    if (addr_hw_len != NET_IF_ETHER_ADDR_SIZE) {                /* See Note #2.                                         */
+       *perr = DHCPc_ERR_INVALID_HW_ADDR;
+        return (0);
+    }
+
+    if (msg_buf_size < DHCP_MSG_BUF_SIZE) {
+       *perr = DHCPc_ERR_INVALID_MSG_SIZE;
+        return (0);
+    }
+
+#else
+   (void)&addr_hw_len;                                          /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+                                                                /* ---------- GET SPECIFIC FIELDS & OPT VAL ----------- */
+    flag = 0;
+    switch (msg_type) {
+        case DHCP_MSG_DISCOVER:
+#if (DHCPc_CFG_BROADCAST_BIT_EN == DEF_ENABLED)                 /* See Note #3.                                         */
+             flag           = DHCP_FLAG_BROADCAST;
+#endif
+             get_local_addr = DEF_NO;
+             wr_req_ip_addr = DEF_NO;
+             wr_server_id   = DEF_NO;
+             req_param      = DEF_YES;
+             break;
+
+
+        case DHCP_MSG_REQUEST:
+#if (DHCPc_CFG_BROADCAST_BIT_EN == DEF_ENABLED)                 /* See Note #3.                                         */
+             flag      = DHCP_FLAG_BROADCAST;
+#endif
+             req_param = DEF_YES;
+
+             switch (pif_info->ClientState) {
+                 case DHCP_STATE_SELECTING:
+                      get_local_addr = DEF_NO;
+                      wr_req_ip_addr = DEF_YES;
+                      wr_server_id   = DEF_YES;
+                      break;
+
+
+                 case DHCP_STATE_INIT_REBOOT:
+                      get_local_addr = DEF_NO;
+                      wr_req_ip_addr = DEF_YES;
+                      wr_server_id   = DEF_NO;
+                      break;
+
+
+                 case DHCP_STATE_BOUND:
+                 case DHCP_STATE_RENEWING:
+                 case DHCP_STATE_REBINDING:
+                      get_local_addr = DEF_YES;
+                      wr_req_ip_addr = DEF_NO;
+                      wr_server_id   = DEF_NO;
+                      break;
+
+
+                 default:
+                      get_local_addr = DEF_NO;
+                      wr_req_ip_addr = DEF_NO;
+                      break;
+             }
+             break;
+
+
+        case DHCP_MSG_DECLINE:
+             get_local_addr = DEF_NO;
+             wr_req_ip_addr = DEF_YES;
+             wr_server_id   = DEF_YES;
+             req_param      = DEF_NO;
+             break;
+
+
+        case DHCP_MSG_RELEASE:
+             get_local_addr = DEF_YES;
+             wr_req_ip_addr = DEF_NO;
+             wr_server_id   = DEF_YES;
+             req_param      = DEF_NO;
+             break;
+
+
+        default:                                                /* Unsupported msg, ...                                 */
+            *perr = DHCPc_ERR_INVALID_MSG;
+             return (0);                                        /* ... rtn.                                             */
+    }
+
+    pmsg_last_rx     = (DHCPc_MSG    *) pif_info->MsgPtr;
+    pmsg_last_rx_hdr = (DHCP_MSG_HDR *)&pmsg_last_rx->MsgBuf[0];
+
+    if (get_local_addr == DEF_YES) {
+        NET_UTIL_VAL_COPY_32(&ciaddr, &pmsg_last_rx_hdr->yiaddr);
+
+    } else {
+        ciaddr = 0;
+    }
+
+
+    Mem_Clr((void     *)pmsg_buf,                               /* Clr msg buf.                                         */
+            (CPU_SIZE_T)msg_buf_size);
+
+                                                                /* --------------- SETTING DHCP MSG HDR --------------- */
+    pmsg_hdr        = (DHCP_MSG_HDR *)&pmsg_buf[0];
+
+    pmsg_hdr->op    = DHCP_OP_REQUEST;
+    pmsg_hdr->htype = DHCP_HTYPE_ETHER;                         /* See Note #2.                                         */
+    pmsg_hdr->hlen  = NET_IF_ETHER_ADDR_SIZE;
+    pmsg_hdr->hops  = 0;
+
+    NET_UTIL_VAL_COPY_SET_NET_32(&pmsg_hdr->xid, &pif_info->TransactionID);
+    NET_UTIL_VAL_SET_NET_32(&pmsg_hdr->secs, 0);
+
+    NET_UTIL_VAL_COPY_SET_NET_16(&pmsg_hdr->flags, &flag);
+
+    NET_UTIL_VAL_COPY_32(&pmsg_hdr->ciaddr, &ciaddr);           /* Already in net order.                                */
+    NET_UTIL_VAL_SET_NET_32(&pmsg_hdr->yiaddr, 0);
+    NET_UTIL_VAL_SET_NET_32(&pmsg_hdr->siaddr, 0);
+    NET_UTIL_VAL_SET_NET_32(&pmsg_hdr->giaddr, 0);
+
+    Mem_Copy((void     *) pmsg_hdr->chaddr,                     /* Copy hw addr (see Note #2).                          */
+             (void     *) paddr_hw,
+             (CPU_SIZE_T) NET_IF_ETHER_ADDR_SIZE);
+
+
+                                                                /* --------------- SETTING DHCP MSG OPT --------------- */
+    pmsg_opt = &pmsg_buf[DHCP_MSG_HDR_SIZE];
+    popt     =  pmsg_opt;
+
+    NET_UTIL_VAL_SET_NET_32(popt, DHCP_MAGIC_COOKIE);           /* DHCP Magic cookie.                                   */
+    popt    += DHCP_MAGIC_COOKIE_SIZE;
+
+   *popt++   = DHCP_OPT_DHCP_MESSAGE_TYPE;                      /* DHCP Message Type.                                   */
+   *popt++   = 1;                                               /* Msg type opt len.                                    */
+   *popt++   = msg_type;
+
+    if (wr_req_ip_addr == DEF_YES) {                            /* Requested IP address.                                */
+       *popt++  = DHCP_OPT_REQUESTED_IP_ADDRESS;
+       *popt++  = 4;
+        NET_UTIL_VAL_COPY_32(popt, &pmsg_last_rx_hdr->yiaddr);
+        popt   += 4;
+    }
+
+    if (wr_server_id == DEF_YES) {                              /* Server ID.                                           */
+       *popt++  = DHCP_OPT_SERVER_IDENTIFIER;
+       *popt++  = 4;
+        NET_UTIL_VAL_COPY_32(popt, &pif_info->ServerID);
+        popt   += 4;
+    }
+
+#if (CPU_CFG_NAME_EN == DEF_ENABLED)                            /* Host name.                                           */
+    CPU_NameGet(host_name, &err_cpu);
+    if (err_cpu == CPU_ERR_NONE) {
+        host_name_len = Str_Len(host_name);
+        if (host_name_len > 0) {
+           *popt++  = DHCP_OPT_HOST_NAME;
+           *popt++  = host_name_len;
+            Mem_Copy(popt, host_name, host_name_len);
+            popt   += host_name_len;
+        }
+    }
+#endif
+
+    if (req_param == DEF_YES) {                                 /* Req'd param.                                         */
+        req_param_qty = sizeof(DHCPc_ReqParam);
+
+       *popt++ = DHCP_OPT_PARAMETER_REQUEST_LIST;
+       *popt++ = pif_info->ParamReqQty + req_param_qty;
+
+        Mem_Copy((void     *) popt,                             /* Copy system req'd param.                             */
+                 (void     *)&DHCPc_ReqParam[0],
+                 (CPU_SIZE_T) req_param_qty);
+        popt += req_param_qty;
+
+        if (pif_info->ParamReqQty > 0) {
+            Mem_Copy((void     *) popt,                         /* Copy app    req'd param (see Note #4).               */
+                     (void     *)&pif_info->ParamReqTbl[0],
+                     (CPU_SIZE_T) pif_info->ParamReqQty);
+            popt += pif_info->ParamReqQty;
+        }
+    }
+
+   *popt++   = DHCP_OPT_END;                                    /* End of options.                                      */
+
+
+                                                                /* -------------------- GET MSG LEN ------------------- */
+    opt_len = popt - pmsg_opt;
+    if (opt_len < (DHCP_MSG_TX_MIN_LEN - DHCP_MSG_HDR_SIZE)) {  /* See Note #4.                                         */
+        opt_pad_len = ((DHCP_MSG_TX_MIN_LEN - DHCP_MSG_HDR_SIZE) - opt_len);
+
+        Mem_Set((void     *)popt,
+                (CPU_INT08U)DHCP_OPT_PAD,
+                (CPU_SIZE_T)opt_pad_len);
+
+        opt_len = (DHCP_MSG_TX_MIN_LEN - DHCP_MSG_HDR_SIZE);
+    }
+
+                                                                /* ------------------- GET CUR TIME ------------------- */
+    pif_info->NegoStartTime = DHCPc_OS_TimeGet_tick();
+
+
+    msg_size = DHCP_MSG_HDR_SIZE + opt_len;
+   *perr     = DHCPc_ERR_NONE;
+
+    return (msg_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             DHCPc_Tx()
+*
+* Description : Transmit DHCPc data via socket.
+*
+* Argument(s) : sock_id             Socket ID of socket to transmit DHCPc data.
+*
+*               pdata_buf           Pointer to DHCPc data buffer to transmit.
+*
+*               data_buf_len        Length  of DHCPc data buffer to transmit.
+*
+*               paddr_remote        Pointer to the socket address structure of the remote address
+*
+*               addr_remote_len     Length  of the socket address structure pointed to by 'paddr_remote'.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               DHCPc_ERR_NONE                  DHCPc data successfully transmitted.
+*                               DHCPc_ERR_NULL_PTR              Argument(s) 'pdata_buf/paddr_remote' passed
+*                                                                   a NULL pointer.
+*                               DHCPc_ERR_TX                    Transmit error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DHCPc_Discover(),
+*               DHCPc_Req(),
+*               DHCPc_DeclineRelease().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DHCPc_Tx (NET_SOCK_ID         sock_id,
+                        void               *pdata_buf,
+                        CPU_INT16U          data_buf_len,
+                        NET_SOCK_ADDR      *paddr_remote,
+                        NET_SOCK_ADDR_LEN   addr_remote_len,
+                        DHCPc_ERR          *perr)
+{
+    NET_ERR  err_net;
+
+
+#if (DHCPc_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                   /* ------------------ VALIDATE PTRS ------------------- */
+    if ((pdata_buf    == (void          *)0) ||
+        (paddr_remote == (NET_SOCK_ADDR *)0)) {
+       *perr = DHCPc_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+
+                                                                /* ------------------- TX APP DATA -------------------- */
+   (void)NetApp_SockTx((NET_SOCK_ID       ) sock_id,
+                       (void             *) pdata_buf,
+                       (CPU_INT16U        ) data_buf_len,
+#if (NET_VERSION >= 21200u)
+                       (NET_SOCK_API_FLAGS) NET_SOCK_FLAG_NONE,
+#else
+                       (CPU_INT16S        ) NET_SOCK_FLAG_NONE,
+#endif
+                       (NET_SOCK_ADDR    *) paddr_remote,
+                       (NET_SOCK_ADDR_LEN ) addr_remote_len,
+                       (CPU_INT16U        ) DHCPc_TX_MAX_RETRY,
+                       (CPU_INT32U        ) 0,
+                       (CPU_INT32U        ) DHCPc_TX_TIME_DLY_MS,
+                       (NET_ERR          *)&err_net);
+
+    if (err_net == NET_APP_ERR_NONE) {
+       *perr = DHCPc_ERR_NONE;
+
+    } else {
+       *perr = DHCPc_ERR_TX;
+    }
+}
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-DHCPc/Source/dhcp-c.h b/src/ucos_v1_42/micrium_source/uC-DHCPc/Source/dhcp-c.h
new file mode 100644
index 0000000..f09af68
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DHCPc/Source/dhcp-c.h
@@ -0,0 +1,1306 @@
+/*
+*********************************************************************************************************
+*                                               uC/DHCPc
+*                              Dynamic Host Configuration Protocol Client
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DHCP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             DHCP CLIENT
+*
+* Filename      : dhcp-c.h
+* Version       : V2.10.00
+* Programmer(s) : SR
+*********************************************************************************************************
+* Note(s)       : (1) Supports Dynamic Host Configuration Protocol as described in RFC #2131 with the
+*                     following features/restrictions/constraints :
+*
+*                     (a) Dynamic Configuration of IPv4 Link-Local Addresses       RFC #3927
+*                     (b) Supports both infinite & temporary address leases,
+*                             with automatic renewal of lease if necessary
+*
+*                 (2) To protect the validity & prevent the corruption of shared DHCP client resources,
+*                     the primary tasks of the DHCP client are prevented from running concurrently
+*                     through the use of a global DHCPc lock implementing protection by mutual exclusion.
+*
+*                     (a) The mechanism of protected mutual exclusion is irrelevant but MUST be implemented
+*                         in the following two functions :
+*
+*                             DHCPc_OS_Lock()                       acquire access to DHCP client
+*                             DHCPc_OS_Unlock()                     release access to DHCP client
+*
+*                         implemented in
+*
+*                             \\OS\\dhcp-c_os.*
+*
+*                             where
+*                                                            directory path for DHCPc module
+*                                                               directory name for specific OS
+*
+*                     (b) Since this global lock implements mutual exclusion at the DHCP client task
+*                         level, critical sections are NOT required to prevent task-level concurrency in
+*                         the DHCP client.
+*
+*                 (3) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V2.13.02
+*                     (b) uC/CPU    V1.27
+*                     (c) uC/LIB    V1.35.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This header file is protected from multiple pre-processor inclusion through use of the
+*               DHCPc present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  DHCPc_PRESENT                                          /* See Note #1.                                         */
+#define  DHCPc_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc VERSION NUMBER
+*
+* Note(s) : (1) (a) The DHCPc module software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The DHCPc software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*/
+
+#define  DHCPc_VERSION                                 21000u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   DHCPc_MODULE
+#define  DHCPc_EXT
+#else
+#define  DHCPc_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The DHCPc module files are located in the following directories :
+*
+*               (a) \\dhcp-c_cfg.h
+*
+*               (b) \\Source\net_*.*
+*
+*               (c) (1) \\Source\dhcp-c.h
+*                                      \dhcp-c.c
+*
+*                   (2) \\OS\\dhcp-c_os.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for network protocol suite
+*                                                        directory path for DHCPc module
+*                                                           directory name for specific operating system (OS)
+*
+*           (2) CPU-configuration software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) NO compiler-supplied standard library functions SHOULD be used.
+*
+*               (a) Standard library functions are implemented in the custom library module(s) :
+*
+*                       \\lib_*.*
+*
+*                           where
+*                                         directory path for custom library software
+*
+*           (4) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) '\\'   directory                            See Note #1b
+*
+*               (c) '\\' directory                                               See Note #1c
+*
+*               (d) (1) '\\'                  directory         See Note #2a
+*                   (2) '\\\\' directory         See Note #2b
+*
+*               (e) '\\' directory                            See Note #3a
+*********************************************************************************************************
+*/
+
+#include                                            /* CPU Core Library               (see Note #2a)        */
+
+#include                                             /* Standard        Defines        (see Note #3a)        */
+#include                                             /* Standard String Library        (see Note #3a)        */
+#include                                             /* Standard Memory Library        (see Note #3a)        */
+
+#include                                          /* DHCPc Configuration File       (see Note #1a)        */
+
+#include                                          /* Network Protocol Suite         (see Note #1b)        */
+#include  
+#include  
+#include  
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          DHCPc DEFAULT CFG
+*
+* Note(s) : (1) Configure DHCPc_CFG_BROADCAST_BIT_EN to DEF_ENABLED to instruct the contacted DHCP server
+*               to use broadcast packets instead of unicast ones.  Used for TCP/IP stacks that cannot
+*               receive unicast packets when not fully configured.  This is the case of the uC/TCPIP
+*               stack, so this define MUST be set to DEF_ENABLED when this DHCP client is used with the
+*               Micrium's uC/TCP-IP stack.
+*********************************************************************************************************
+*/
+
+#ifndef  DHCPc_CFG_BROADCAST_BIT_EN
+#define  DHCPc_CFG_BROADCAST_BIT_EN              DEF_ENABLED    /* Configure broadcast bit               (see Note #1) :*/
+                                                                /*   DEF_DISABLED  Broadcast bit NOT set                */
+                                                                /*   DEF_ENABLED   Broadcast bit     set                */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      DHCPc ERROR CODE DEFINES
+*********************************************************************************************************
+*/
+
+typedef  enum dhcp_c_err {
+
+    DHCPc_ERR_NONE                                   =    0,
+
+    DHCPc_ERR_NONE_NO_TMR                            =    1,
+    DHCPc_ERR_NONE_LOCAL_LINK                        =    2,
+
+    DHCPc_ERR_INIT_INCOMPLETE                        =   10,    /* DHCPc init NOT completed.                            */
+    DHCPc_ERR_INIT_SOCK                              =   11,    /* Sock  init err.                                      */
+
+    DHCPc_ERR_NULL_PTR                               =   15,    /* Ptr arg(s) passed NULL ptr(s).                       */
+    DHCPc_ERR_INVALID_MSG_SIZE                       =   16,    /* Invalid DHCP msg size.                               */
+    DHCPc_ERR_INVALID_HW_ADDR                        =   17,    /* Invalid/NO hw addr.                                  */
+    DHCPc_ERR_INVALID_MSG                            =   18,    /* Invalid DHCP msg.                                    */
+    DHCPc_ERR_OPT_BUF_SIZE                           =   19,    /* Opt val buf size too small.                          */
+    DHCPc_ERR_PARAM_REQ_TBL_SIZE                     =   20,    /* Req param tbl size too small.                        */
+
+    DHCPc_ERR_IF_CFG_STATE                           =   20,    /* IP cfg state err.                                    */
+    DHCPc_ERR_IF_CFG                                 =   21,    /* IF cfg err.                                          */
+    DHCPc_ERR_IF_NOT_CFG                             =   22,    /* IF NOT yet cfg'd with DHCP.                          */
+    DHCPc_ERR_IF_INVALID                             =   23,    /* IF invalid or disabled.                              */
+    DHCPc_ERR_IF_NOT_MANAGED                         =   24,    /* IF NOT managed by DHCP client.                       */
+    DHCPc_ERR_IF_OPT_NONE                            =   25,    /* DHCP opt NOT present on IF.                          */
+
+    DHCPc_ERR_IF_INFO_NONE_AVAIL                     =   30,    /* IF info  pool empty.                                 */
+    DHCPc_ERR_IF_INFO_IF_USED                        =   31,    /* IF info  already already used for this IF.           */
+
+    DHCPc_ERR_MSG_NONE_AVAIL                         =   40,    /* Msg      pool empty.                                 */
+    DHCPc_ERR_MSG_Q                                  =   41,    /* Err posting to msg Q.                                */
+
+    DHCPc_ERR_COMM_NONE_AVAIL                        =   50,    /* Comm obj pool empty.                                 */
+
+    DHCPc_ERR_TMR_NONE_AVAIL                         =   60,    /* Tmr      pool empty.                                 */
+    DHCPc_ERR_TMR_INVALID_MSG                        =   61,    /* Invalid tmr msg.                                     */
+    DHCPc_ERR_TMR_CFG                                =   62,    /* Err cfg'ing tmr.                                     */
+
+    DHCPc_ERR_ADDR_VALIDATE                          =   70,    /* Err validating addr.                                 */
+    DHCPc_ERR_ADDR_USED                              =   71,    /* Addr in use.                                         */
+
+    DHCPc_ERR_LOCAL_LINK                             =   75,    /* Err cfg'ing dyn link-local addr.                     */
+
+    DHCPc_ERR_RX                                     =   80,    /* Rx err.                                              */
+    DHCPc_ERR_RX_OVF                                 =   81,    /* Rx err data buffer ovf.                              */
+    DHCPc_ERR_RX_NAK                                 =   82,    /* NAK msg rx'd.                                        */
+    DHCPc_ERR_RX_MSG_TYPE                            =   83,    /* Rep msg type err.                                    */
+
+    DHCPc_ERR_TX                                     =   90,    /* Tx err.                                              */
+
+    DHCPc_ERR_IPv4_NOT_PRESENT                       =  100,    /* DHCPc requires NET_IP_CFG_IPv4_EN set to DEF_ENABLED */
+
+
+
+    DHCPc_OS_ERR_NONE                                = 1000,
+
+    DHCPc_OS_ERR_INIT                                = 1010,
+    DHCPc_OS_ERR_CFG                                 = 1011,
+
+    DHCPc_OS_ERR_INIT_SIGNAL                         = 1020,
+    DHCPc_OS_ERR_INIT_SIGNAL_NAME                    = 1021,
+    DHCPc_OS_ERR_INIT_SIGNALD                        = 1022,
+    DHCPc_OS_ERR_INIT_LOCK                           = 1023,
+    DHCPc_OS_ERR_INIT_LOCK_NAME                      = 1024,
+    DHCPc_OS_ERR_INIT_Q                              = 1025,
+    DHCPc_OS_ERR_INIT_Q_NAME                         = 1026,
+    DHCPc_OS_ERR_INIT_TMR                            = 1027,
+    DHCPc_OS_ERR_INIT_TMR_SIGNAL                     = 1028,
+    DHCPc_OS_ERR_INIT_TMR_SIGNAL_NAME                = 1029,
+
+    DHCPc_OS_ERR_INIT_TASK                           = 1040,
+    DHCPc_OS_ERR_INIT_TASK_NAME                      = 1041,
+    DHCPc_OS_ERR_INIT_TMR_TASK                       = 1042,
+    DHCPc_OS_ERR_INIT_TMR_TASK_NAME                  = 1043,
+
+    DHCPc_OS_ERR_LOCK                                = 1050,
+    DHCPc_OS_ERR_MSG_Q                               = 1051,
+    DHCPc_OS_ERR_TMR                                 = 1052,
+
+} DHCPc_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                         TASK NUMBER DEFINE
+*********************************************************************************************************
+*/
+
+#define  DHCPc_TASK_NBR                                     2   /* Total number of DHCPc task.                          */
+
+
+/*
+*********************************************************************************************************
+*                                        DHCP MESSAGE DEFINES
+*
+* Note(s) : (1) RFC #2131, section 'Protocol Summary' states that "a DHCP client must be prepared to
+*               receive a message of up to 576 octets".  Hense, the size of the DHCP message buffer is
+*               fixed to this length.
+*
+*           (2) (a) RFC #2131, section 'Introduction' states that "the format of DHCP messages is based
+*                   on the format of BOOTP messages, to capture the BOOTP relay agent behavior described
+*                   as part of the BOOTP specification, and to allow interoperability of existing BOOTP
+*                   clients with DHCP servers".
+*
+*                   Although not explicitly stated, DHCP messages should be at least 300 octets to
+*                   preserve backward compatibility with BOOTP which does define this minimum size (some
+*                   BOOTP relay agents have been known to drop packets of less than this length).
+*
+*               (b) However, NO control may be exerciced on received DHCP message, and in order to remain
+*                   compatible with uncomplying DHCP server, smaller incomming DHCP message are NOT
+*                   discarded, provided they are at least 244 bytes (the minimum DHCP message lenght
+*                   uncluding mandatory "DHCP message type" option).
+*
+*               (c) Thus :
+*
+*                   (1) Transmitted packets will be padded so their length is at least 300 octets.
+*
+*                   (2) Received    packets under 244 octets will be discarded.
+*
+*           (3) Section 'The Client-Server Protocol' of this RFC stipulates that "the first four octets
+*               of the 'options' field of the DHCP message contain the (decimal) values 99, 130, 83 and
+*               99, respectively (this is the same magic cookie as is defined in RFC 1497)".
+*
+*           (4) See also 'DHCP MESSAGE DATA TYPE  Note #2'.
+*
+*           (5) DHCP operation codes are defined in RFC #2131, section 'Protocol Summary'.
+*********************************************************************************************************
+*/
+
+#define  DHCP_MSG_BUF_SIZE                                576   /* Buf size                          (see Note #1).     */
+
+#define  DHCP_MSG_TX_MIN_LEN                              300   /* Min tx'd msg len                  (see Note #2).     */
+#define  DHCP_MSG_RX_MIN_LEN                              244   /* Min rx'd msg len                  (see Note #2).     */
+
+#define  DHCP_MAGIC_COOKIE                         0x63825363   /* Magic cookie                      (see Note #3).     */
+#define  DHCP_MAGIC_COOKIE_SIZE                             4   /* Size of magic cookie (in octets).                    */
+
+#define  DHCP_FLAG_BROADCAST                         (1 << 15)  /* Broadcast flag                    (see Note #4).     */
+
+                                                                /* Operation codes                   (see Note #5).     */
+#define  DHCP_OP_REQUEST                                    1
+#define  DHCP_OP_REPLY                                      2
+
+#define  DHCP_HTYPE_ETHER                                   1   /* Ethernet hardware address type.                      */
+
+
+/*
+*********************************************************************************************************
+*                                      DHCP MESSAGE TYPE DEFINES
+*
+* Note(s) : (1) DHCP message types are defined in RFC #2132, section 'DHCP Extensions, DHCP Message
+*               Type'.
+*
+*           (2) DHCP_MSG_NONE is not defined in RFC #2132, and is intended to be used internally only.
+*********************************************************************************************************
+*/
+
+#define  DHCP_MSG_NONE                                     0    /* See note #2.                                         */
+
+#define  DHCP_MSG_DISCOVER                                 1
+#define  DHCP_MSG_OFFER                                    2
+#define  DHCP_MSG_REQUEST                                  3
+#define  DHCP_MSG_DECLINE                                  4
+#define  DHCP_MSG_ACK                                      5
+#define  DHCP_MSG_NAK                                      6
+#define  DHCP_MSG_RELEASE                                  7
+#define  DHCP_MSG_INFORM                                   8
+
+
+/*
+*********************************************************************************************************
+*                                 DHCP COMMUNICATION MESSAGE DEFINES
+*
+* Note(s) : (1) The worse case for the communication message queue is 5 messages being posted to the
+*               queue waiting to be consumed; this is hence the maximum queue size per interface.
+*********************************************************************************************************
+*/
+
+#define  DHCPc_COMM_MSG_NONE                               0
+
+#define  DHCPc_COMM_MSG_START                              1
+#define  DHCPc_COMM_MSG_STOP                               2
+#define  DHCPc_COMM_MSG_T1_EXPIRED                         3
+#define  DHCPc_COMM_MSG_T2_EXPIRED                         4
+#define  DHCPc_COMM_MSG_LEASE_EXPIRED                      5
+
+
+#define  DHCPc_COMM_MSG_MAX_NBR                            5    /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                      DHCP CLIENT STATE DEFINES
+*
+* Note(s) : (1) The DHCP states are depicted in RFC #2131, figure 5 'State-transition diagram for DHCP
+*               clients'.
+*
+*           (2) DHCP_STATE_NONE, DHCP_STATE_LOCAL_LINK, & DHCP_STATE_STOPPING are not defined in RFC #2132,
+*               and are intended to be used internally only.
+*********************************************************************************************************
+*/
+
+#define  DHCP_STATE_NONE                                   0    /* See note #2.                                         */
+
+#define  DHCP_STATE_INIT                                   1
+#define  DHCP_STATE_SELECTING                              2
+#define  DHCP_STATE_REQUESTING                             3
+#define  DHCP_STATE_BOUND                                  4
+#define  DHCP_STATE_RENEWING                               5
+#define  DHCP_STATE_REBINDING                              6
+#define  DHCP_STATE_REBOOTING                              7
+#define  DHCP_STATE_INIT_REBOOT                            8
+
+#define  DHCP_STATE_LOCAL_LINK                             9    /* See note #2.                                         */
+
+#define  DHCP_STATE_STOPPING                              10    /* See note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                 DHCP INTERFACE LEASE STATUS DEFINES
+*********************************************************************************************************
+*/
+
+#define  DHCP_STATUS_NONE                                  0
+
+#define  DHCP_STATUS_CFG_IN_PROGRESS                       1
+#define  DHCP_STATUS_CFGD                                  2
+#define  DHCP_STATUS_CFGD_NO_TMR                           3
+#define  DHCP_STATUS_CFGD_LOCAL_LINK                       4
+
+#define  DHCP_STATUS_FAIL                                  5
+
+
+/*
+*********************************************************************************************************
+*                                         DHCP OPTION DEFINES
+*
+* Note(s) : (1) This section defines the DHCP Options and BOOTP Vendor Extensions, as defined in
+*               RFC #2132.  This list is not necessarily exhaustive; please refer to the Internet
+*               Assigned Numbers Authority (www.iana.org) for the complete list.
+*********************************************************************************************************
+*/
+
+#define  DHCP_OPT_FIELD_CODE_LEN                                   1
+#define  DHCP_OPT_FIELD_LEN_LEN                                    1
+#define  DHCP_OPT_FIELD_HDR_LEN                     (DHCP_OPT_FIELD_CODE_LEN + DHCP_OPT_FIELD_LEN_LEN)
+
+                                                                /* OPTION NUMBER  OPTION SIZE (payload only)            */
+#define  DHCP_OPT_PAD                                              0    /*  0                                           */
+
+                                                                /* RFC 1497 Vendor Extensions                           */
+#define  DHCP_OPT_SUBNET_MASK                                      1    /*  4                                           */
+#define  DHCP_OPT_TIME_OFFSET                                      2    /*  4                                           */
+#define  DHCP_OPT_ROUTER                                           3    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_TIME_SERVER                                      4    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_NAME_SERVER                                      5    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_DOMAIN_NAME_SERVER                               6    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_LOG_SERVER                                       7    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_COOKIE_SERVER                                    8    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_LPR_SERVER                                       9    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_IMPRESS_SERVER                                  10    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_RESSOURCE_LOCATION_SERVER                       11    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_HOST_NAME                                       12    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_BOOT_FILE_SIZE                                  13    /*  2                                           */
+#define  DHCP_OPT_MERIT_DUMP_FILE                                 14    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_DOMAIN_NAME                                     15    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_SWAP_SERVER                                     16    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_ROOT_PATH                                       17    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_EXTENSION_PATH                                  18    /*  n,     1 <= n <= 255                        */
+
+                                                                /* IP Layer Parameters per Host                         */
+#define  DHCP_OPT_IP_FORWARDING                                   19    /*  1 (value = 0/1)                             */
+#define  DHCP_OPT_NON_LOCAL_SOURCE_ROUTING                        20    /*  1 (value = 0/1)                             */
+#define  DHCP_OPT_POLICY_FILTER                                   21    /*  n * 8, 1 <= n <= 255                        */
+#define  DHCP_OPT_MAXIMUM_DATAGRAM_REASSEMBLY_SIZE                22    /*  2                                           */
+#define  DHCP_OPT_DEFAULT_IP_TIME_TO_LIVE                         23    /*  1                                           */
+#define  DHCP_OPT_PATH_MTU_AGING_TIMEOUT                          24    /*  4                                           */
+#define  DHCP_OPT_PATH_MTU_PLATEAU_TABLE                          25    /*  n * 2, 1 <= n <= 255                        */
+
+                                                                /* IP Layer Parameters per Interface                    */
+#define  DHCP_OPT_INTERFACE_MTU                                   26    /*  2                                           */
+#define  DHCP_OPT_ALL_SUBNETS_ARE_LOCAL                           27    /*  1 (value = 0/1)                             */
+#define  DHCP_OPT_BROADCAST_ADDRESS                               28    /*  4                                           */
+#define  DHCP_OPT_PERFORM_MASK_DISCOVERY                          29    /*  1 (value = 0/1)                             */
+#define  DHCP_OPT_MASK_SUPPLIER                                   30    /*  1 (value = 0/1)                             */
+#define  DHCP_OPT_PERFORM_ROUTER_DISCOVERY                        31    /*  1 (value = 0/1)                             */
+#define  DHCP_OPT_ROUTER_SOLLICITATION_ADDRESS                    32    /*  4                                           */
+#define  DHCP_OPT_STATIC_ROUTE                                    33    /*  n * 8, 1 <= n <= 255                        */
+
+                                                                /* Link Layer Parameters per Interface                  */
+#define  DHCP_OPT_TRAILER_ENCAPSULATION                           34    /*  1 (value = 0/1)                             */
+#define  DHCP_OPT_ARP_CACHE_TIMEOUT                               35    /*  4                                           */
+#define  DHCP_OPT_ETHERNET_ENCAPSULATION                          36    /*  1 (value = 0/1)                             */
+
+                                                                /* TCP Parameters                                       */
+#define  DHCP_OPT_TCP_DEFAULT_TTL                                 37    /*  1                                           */
+#define  DHCP_OPT_TCP_KEEPALIVE_INTERVAL                          38    /*  4                                           */
+#define  DHCP_OPT_TCP_KEEPALIVE_GARBAGE                           39    /*  1 (value = 0/1)                             */
+
+                                                                /* Application and Service Parameters                   */
+#define  DHCP_OPT_NETWORK_INFORMATION_SERVICE_DOMAIN              40    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_NETWORK_INFORMATION_SERVER                      41    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_NETWORK_TIME_PROTOCOL_SERVER                    42    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_VENDOR_SPECIFIC_INFORMATION                     43    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_NETBIOS_OVER_TCPIP_NAME_SERVER                  44    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_NETBIOS_OVER_TCPIP_DATAGRAM_DISTRIBUTION_SERVER 45    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_NETBIOS_OVER_TCPIP_NODE_TYPE                    46    /*  1                                           */
+#define  DHCP_OPT_NETBIOS_OVER_TCPIP_SCOPE                        47    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_X_WINDOW_SYSTEM_FONT_SERVER                     48    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_X_WINDOW_SYSTEM_DISPLAY_MANAGER                 49    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_NETWORK_INFORMATION_SERVICE_PLUS_DOMAIN         64    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_NETWORK_INFORMATION_SERVICE_PLUS_SERVER         65    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_MOBILE_IP_HOME_AGENT                            68    /*  n * 4, 0 <= n <= 255                        */
+#define  DHCP_OPT_SIMPLE_MAIL_TRANSPORT_PROTOCOL_SERVER           69    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_POST_OFFICE_PROTOCOL_SERVER                     70    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_NETWORK_NEWS_TRANSPORT_PROTOCOL_SERVER          71    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_DEFAULT_WORLD_WIDE_WEB_SERVER                   72    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_DEFAULT_FINGER_SERVER                           73    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_DEFAULT_INTERNET_RELAY_CHAT_SERVER              74    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_STREETTALK_SERVER                               75    /*  n * 4, 1 <= n <= 255                        */
+#define  DHCP_OPT_STREETTALK_DIRECTORY_ASSISTANCE_SERVER          76    /*  n * 4, 1 <= n <= 255                        */
+
+                                                                /* DHCP Extensions                                      */
+#define  DHCP_OPT_REQUESTED_IP_ADDRESS                            50    /*  4                                           */
+#define  DHCP_OPT_IP_ADDRESS_LEASE_TIME                           51    /*  4                                           */
+#define  DHCP_OPT_OPTION_OVERLOAD                                 52    /*  1 (value = 1/2/3)                           */
+                                                                        /*    (See 'DHCP MESSAGE TYPE DEFINES')         */
+#define  DHCP_OPT_DHCP_MESSAGE_TYPE                               53    /*  1 (value = 1-9)                             */
+#define  DHCP_OPT_SERVER_IDENTIFIER                               54    /*  4                                           */
+#define  DHCP_OPT_PARAMETER_REQUEST_LIST                          55    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_ERROR_MESSAGE                                   56    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_MAXIMUM_DHCP_MESSAGE_SIZE                       57    /*  2                                           */
+#define  DHCP_OPT_RENEWAL_TIME_VALUE                              58    /*  4                                           */
+#define  DHCP_OPT_REBINDING_TIME_VALUE                            59    /*  4                                           */
+#define  DHCP_OPT_VENDOR_CLASS_IDENTIFIER                         60    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_CLIENT_IDENTIFIER                               61    /*  n,     2 <= n <= 255                        */
+#define  DHCP_OPT_TFTP_SERVER_NAME                                66    /*  n,     1 <= n <= 255                        */
+#define  DHCP_OPT_BOOTFILE_NAME                                   67    /*  n,     1 <= n <= 255                        */
+
+#define  DHCP_OPT_END                                            255    /*  0                                           */
+
+
+/*
+*********************************************************************************************************
+*                                          DHCP TIME DEFINES
+*
+* Note(s) : (1) Minimum retransmitting delay between attempt when rebinding or renewing the lease.
+*
+*               See also 'DHCPc_LeaseTimeUpdate()  Note #2'.
+*
+*           (2) Delay between retried lease negotiation.
+*
+*               See also 'DHCPc_InitStateHandler()  Note #4'.
+*
+*           (3) When a RELEASE message is transmited, it is possible that the target has to resolve
+*               the destination hardware address through ARP.  We hence have to introduce a slight delay
+*               to allow that address to be resolved and for the RELEASE message to be sent out before
+*               the interface network layer is un-configured.
+*
+*               Not doing so would result in the message to never to transmited since an un-configured
+*               interface does NOT resolve pending ARP caches.
+*********************************************************************************************************
+*/
+
+#define  DHCP_LEASE_INFINITE                       0xFFFFFFFF   /* Permanent lease time.                                */
+
+#define  DHCP_T1_LEASE_FRACTION                         0.5     /* T1 dflt fraction.                                    */
+#define  DHCP_T2_LEASE_FRACTION                         0.875   /* T2 dflt fraction.                                    */
+
+#define  DHCP_MIN_RETX_TIME_S                           300     /* Min re-tx time (see Note #1).                        */
+
+#define  DHCP_INIT_DLY_MS                             10000     /* Init       dly (see Note #2).                        */
+
+                                                                /* Release    dly (see Note #3).                        */
+#define  DHCP_RELEASE_DLY_S                         NET_ARP_REQ_RETRY_TIMEOUT_DFLT_SEC
+
+
+/*
+*********************************************************************************************************
+*                                         DHCP TIMER DEFINES
+*
+* Note(s) : (1) DHCP client time tick for timer(s) associated to address lease(s).
+*********************************************************************************************************
+*/
+
+#define  DHCPc_TMR_PERIOD_SEC                               5   /* Period of DHCPc tmr in sec (see Note #1).            */
+
+
+/*
+*********************************************************************************************************
+*                   DHCPc TIMER, INTERFACE INFORMATION, & MESSAGE QUANTITY DEFINES
+*
+* Note(s) : (1) Define the number of timers & interface information as the total number of interfaces.
+*
+*           (2) Define the number of message buffer as the total number of interfaces information plus
+*               one.  Since the interface information structure holds the last OFFER or ACK message
+*               packet, one extra buffer is needed to be able to craft a message intended to be
+*               transmitted.
+*
+*           (3) Define the number of communication object as twice the total number of interfaces
+*               configured to use DHCP.  Since communication objects are used by both DHCPc timers &
+*               by the start and stop function, it is possible that DHCPc_CFG_MAX_NBR_IF number of
+*               communication objects be used by timers while the application tries to stop
+*               those DHCPc_CFG_MAX_NBR_IF interfaces at the same time.
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #1.                                         */
+#define  DHCPc_NBR_TMR                      DHCPc_CFG_MAX_NBR_IF
+#define  DHCPc_NBR_IF_INFO                  DHCPc_CFG_MAX_NBR_IF
+
+                                                                /* See Note #2.                                         */
+#define  DHCPc_NBR_MSG_BUF                 (DHCPc_CFG_MAX_NBR_IF + 1)
+
+                                                                /* See Note #3.                                         */
+#define  DHCPc_NBR_COMM                    (DHCPc_CFG_MAX_NBR_IF * 2)
+
+
+/*
+*********************************************************************************************************
+*                                         DHCPc FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- DHCPc FLAGS -------------------- */
+#define  DHCPc_FLAG_NONE                         DEF_BIT_NONE
+#define  DHCPc_FLAG_USED                           DEF_BIT_00   /* Obj cur used; i.e. NOT in free pool.                 */
+
+
+/*
+*********************************************************************************************************
+*                                  DHCPc TIME DELAY & RETRY DEFINES
+*********************************************************************************************************
+*/
+
+#define  DHCPc_NEGO_MAX_RETRY                               3   /* Max nbr of nego retry.                               */
+
+#define  DHCPc_BACKOFF_DLY_INITIAL_MS                    2000   /* Initial dly                  (in ms).                */
+#define  DHCPc_BACKOFF_DLY_MAX_MS                       64000   /* Max exponential back-off dly (in ms).                */
+#define  DHCPc_BACKOFF_DLY_SCALAR                           2   /* Exponential back-off dly scalar.                     */
+
+#define  DHCPc_TX_MAX_RETRY                                 3   /* Max nbr of  tx  retry   when transitory err.         */
+#define  DHCPc_RX_MAX_RETRY                                 3   /* Max nbr of  rx  retry   when transitory err.         */
+#define  DHCPc_TX_TIME_DLY_MS                             500   /* Dly between tx  retries when transitory err, in ms.  */
+#define  DHCPc_RX_TIME_DLY_MS                             500   /* Dly between rx  retries when transitory err, in ms.  */
+
+#define  DHCP_ADDR_VALIDATE_WAIT_TIME_MS                 3000   /* ARP reply wait time for addr validation.             */
+
+
+/*
+*********************************************************************************************************
+*                                         LINK-LOCAL ADDRESSES DEFINES
+*********************************************************************************************************
+*/
+
+#define  DHCP_LOCAL_LINK_PROBE_WAIT_S                    1
+#define  DHCP_LOCAL_LINK_PROBE_NUM                       3
+#define  DHCP_LOCAL_LINK_PROBE_MIN_S                     1
+#define  DHCP_LOCAL_LINK_PROBE_MAX_S                     2
+#define  DHCP_LOCAL_LINK_ANNOUNCE_WAIT_S                 2
+#define  DHCP_LOCAL_LINK_ANNOUNCE_NUM                    2
+#define  DHCP_LOCAL_LINK_ANNOUNCE_INTERVAL_S             2
+#define  DHCP_LOCAL_LINK_MAX_CONFLICTS                  10
+#define  DHCP_LOCAL_LINK_RATE_LIMIT_INTERVAL_S          60
+#define  DHCP_LOCAL_LINK_DEFEND_INTERVAL_S              10
+
+#define  DHCP_LOCAL_LINK_DHCP_LOOKUP_S                 300
+#define  DHCP_LOCAL_LINK_ARP_CONFLICT_POOL_S            10
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     DHCPc ERROR CODES DATA TYPE
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                  DHCPc TIMER, INTERFACE INFORMATION, & MESSAGE QUANTITY DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  DHCPc_IF_INFO_QTY;                         /* Defines max qty of       IF info to support.         */
+#define  DHCPc_IF_INFO_NBR_MIN                            1
+#define  DHCPc_IF_INFO_NBR_MAX          DEF_INT_16U_MAX_VAL
+
+typedef  CPU_INT16U  DHCPc_MSG_QTY;                             /* Defines max qty of       msg     to support.         */
+#define  DHCPc_MSG_NBR_MIN                                1
+#define  DHCPc_MSG_NBR_MAX              DEF_INT_16U_MAX_VAL
+
+typedef  CPU_INT16U  DHCPc_COMM_QTY;                            /* Defines max qty of DHCPc comm    to support.         */
+#define  DHCPc_COMM_NBR_MIN                               1
+#define  DHCPc_COMM_NBR_MAX             DEF_INT_16U_MAX_VAL
+
+typedef  CPU_INT16U  DHCPc_TMR_QTY;                             /* Defines max qty of DHCPc tmrs    to support.         */
+#define  DHCPc_TMR_NBR_MIN                                1
+#define  DHCPc_TMR_NBR_MAX              DEF_INT_16U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc TIMER DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  DHCPc_TMR_TICK;
+
+
+/*
+*********************************************************************************************************
+*                                     DHCP MESSAGE TYPE DATA TYPE
+*
+* Note(s) : (1) See section 'DHCP MESSAGE TYPE DEFINES' for possible values.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  DHCPc_MSG_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                DHCP COMMUNICATION MESSAGE DATA TYPE
+*
+* Note(s) : (1) See section 'DHCP COMMUNICATION MESSAGE DEFINES' for possible values.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  DHCPc_COMM_MSG;
+
+
+/*
+*********************************************************************************************************
+*                                     DHCP CLIENT STATE DATA TYPE
+*
+* Note(s) : (1) See section 'DHCP CLIENT STATE DEFINES' for possible values.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  DHCPc_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                DHCP INTERFACE LEASE STATUS DATA TYPE
+*
+* Note(s) : (1) See section 'DHCP IF LEASE STATUS DEFINES' for possible values.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  DHCPc_STATUS;
+
+
+/*
+*********************************************************************************************************
+*                                 DHCP MESSAGE OPTION CODE DATA TYPE
+*
+* Note(s) : (1) See section 'DHCP OPTION DEFINES' for possible values.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  DHCPc_OPT_CODE;
+
+
+/*
+*********************************************************************************************************
+*                                       DHCP MESSAGE DATA TYPE
+*
+* Note(s) : (1) DHCP message format is defined in RFC #2131, section 2 'Protocol Summary'.
+*
+*           (2) RFC #2131, section 2 'Protocol Summary' states that "DHCP servers [...] may not be able
+*               to deliver DHCP messages to clients that cannot accept hardware unicast datagrams before
+*               the TCP/IP software is configured."
+*
+*              "To work around [that], DHCP uses the 'flags' field.  The leftmost bit is defined as the
+*               BRAODCAST (B) flag. [...] The remaining bits of the flags field are reserved for future
+*               use [and] they MUST be set to zero by clients."
+*
+*                   0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
+*                   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+*                   |B|             MBZ             |
+*                   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+*
+*                   B:  BROADCAST flag
+*
+*                   MBZ:  MUST BE ZERO (reserved for future use)
+*
+*           (3) The DHCP message 'header' is immediately followed by the variable length 'option' field.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- DHCP MSG HDR ------------------- */
+typedef  struct dhcp_msg_hdr {
+    CPU_INT08U  op;                                             /* Op code.                                             */
+    CPU_INT08U  htype;                                          /* HW addr type.                                        */
+    CPU_INT08U  hlen;                                           /* HW addr len.                                         */
+    CPU_INT08U  hops;
+    CPU_INT32U  xid;                                            /* Transaction ID.                                      */
+    CPU_INT16U  secs;                                           /* Sec elapsed since beginning of addr acquisition.     */
+    CPU_INT16U  flags;                                          /* See Note #2.                                         */
+    CPU_INT32U  ciaddr;                                         /* Client IP addr set   by client.                      */
+    CPU_INT32U  yiaddr;                                         /* Client IP addr rtn'd by server.                      */
+    CPU_INT32U  siaddr;
+    CPU_INT32U  giaddr;
+    CPU_INT08U  chaddr[16];                                     /* Client HW addr.                                      */
+    CPU_INT08U  sname[64];
+    CPU_INT08U  file[128];
+                                                                /* DHCP Opt's (see Note #3).                            */
+} DHCP_MSG_HDR;
+
+#define  DHCP_MSG_HDR_SIZE                    (sizeof(DHCP_MSG_HDR))
+#define  DHCPc_MSG_OPT_SIZE  (DHCP_PKT_BUF_SIZE - DHCP_MSG_HDR_SIZE)
+
+
+/*
+*********************************************************************************************************
+*                                      DHCPc INTERNAL DATA TYPES
+*
+* Note(s) : (1) Those type definitions are put here to make sure they are declared before being inserted
+*               in one another.
+*********************************************************************************************************
+*/
+
+typedef  struct  dhcpc_msg      DHCPc_MSG;
+typedef  struct  dhcpc_if_info  DHCPc_IF_INFO;
+typedef  struct  dhcpc_comm     DHCPc_COMM;
+typedef  struct  dhcpc_tmr      DHCPc_TMR;
+
+
+/*
+*********************************************************************************************************
+*                                       DHCPc MESSAGE DATA TYPE
+*********************************************************************************************************
+*/
+
+struct dhcpc_msg {
+    DHCPc_MSG      *PrevPtr;                                    /* Ptr to PREV msg.                                     */
+    DHCPc_MSG      *NextPtr;                                    /* Ptr to NEXT msg.                                     */
+
+    DHCPc_MSG_QTY   ID;                                         /* Msg id.                                              */
+
+    CPU_INT08U      MsgBuf[DHCP_MSG_BUF_SIZE];                  /* Buf for DHCP msg.                                    */
+
+    CPU_INT16U      MsgLen;                                     /* Tot len of msg (hdr + opt).                          */
+
+    CPU_INT16U      Flags;                                      /* Msg flags.                                           */
+};
+
+
+/*
+*********************************************************************************************************
+*                                DHCPc INTERFACE INFORMATION DATA TYPE
+*********************************************************************************************************
+*/
+
+struct dhcpc_if_info {
+    DHCPc_IF_INFO      *PrevPtr;                                /* Ptr to PREV IF INFO.                                 */
+    DHCPc_IF_INFO      *NextPtr;                                /* Ptr to NEXT IF INFO.                                 */
+
+    DHCPc_IF_INFO_QTY   ID;                                     /* IF info id.                                          */
+    NET_IF_NBR          IF_Nbr;                                 /* IF nbr for this IF info.                             */
+
+    NET_IPv4_ADDR       ServerID;                               /* Server responsible for lease (in net order).         */
+
+                                                                /* Param req tbl.                                       */
+    DHCPc_OPT_CODE      ParamReqTbl[DHCPc_CFG_PARAM_REQ_TBL_SIZE];
+    CPU_INT08U          ParamReqQty;                            /* Param req qty.                                       */
+
+    DHCPc_MSG          *MsgPtr;                                 /* Ptr to DHCP msg.                                     */
+
+    DHCPc_STATE         ClientState;                            /* DHCP client state.                                   */
+    DHCPc_STATUS        LeaseStatus;                            /* Status of DHCP lease for this IF.                    */
+    DHCPc_ERR           LastErr;                                /* Last DHCP error, set only when lease failed.         */
+
+    CPU_INT32U          TransactionID;
+
+    CPU_INT32U          NegoStartTime;                          /* Nego start     time.                                 */
+    CPU_INT32U          TmrExpirationTime;                      /* Tmr expiration time.                                 */
+
+    CPU_INT32U          LeaseTime_sec;
+    CPU_INT32U          T1_Time_sec;
+    CPU_INT32U          T2_Time_sec;
+
+    DHCPc_TMR          *Tmr;                                    /* Ptr to DHCP tmr.                                     */
+
+    CPU_INT16U          Flags;                                  /* IF info flags.                                       */
+};
+
+
+/*
+*********************************************************************************************************
+*                                    DHCPc COMMUNICATION DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  dhcpc_comm {
+    DHCPc_COMM      *PrevPtr;                                   /* Ptr to PREV comm.                                    */
+    DHCPc_COMM      *NextPtr;                                   /* Ptr to NEXT comm.                                    */
+
+    DHCPc_COMM_QTY   ID;                                        /* Comm id.                                             */
+
+    NET_IF_NBR       IF_Nbr;                                    /* IF nbr for this comm.                                */
+    DHCPc_COMM_MSG   CommMsg;                                   /* Msg    for this comm.                                */
+
+    CPU_INT16U       Flags;                                     /* Comm flags.                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*                                        DHCPc TIMER DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  dhcpc_tmr {
+    DHCPc_TMR       *PrevPtr;                                   /* Ptr to PREV tmr.                                     */
+    DHCPc_TMR       *NextPtr;                                   /* Ptr to NEXT tmr.                                     */
+
+    DHCPc_TMR_QTY    ID;                                        /* Tmr id.                                              */
+
+    void            *Obj;                                       /* Ptr to obj using tmr.                                */
+    DHCPc_TMR_TICK   TmrVal;                                    /* Cur tmr val (in DHCPc_TMR_TICK ticks).               */
+
+    CPU_INT16U       Flags;                                     /* Tmr flags.                                           */
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+DHCPc_EXT  CPU_BOOLEAN     DHCPc_InitDone;                      /* Indicates when DHCPc initialization is complete.     */
+
+DHCPc_EXT  DHCPc_IF_INFO   DHCPc_InfoTbl[DHCPc_NBR_IF_INFO];
+DHCPc_EXT  DHCPc_IF_INFO  *DHCPc_InfoPoolPtr;                   /* Ptr to pool of free DHCPc info.                      */
+DHCPc_EXT  DHCPc_IF_INFO  *DHCPc_InfoListHead;                  /* Ptr to head of Info List.                            */
+
+DHCPc_EXT  DHCPc_MSG       DHCPc_MsgTbl[DHCPc_NBR_MSG_BUF];
+DHCPc_EXT  DHCPc_MSG      *DHCPc_MsgPoolPtr;                    /* Ptr to pool of free DHCPc msg.                       */
+DHCPc_EXT  DHCPc_MSG      *DHCPc_MsgListHead;                   /* Ptr to head of Msg List.                             */
+
+DHCPc_EXT  DHCPc_COMM      DHCPc_CommTbl[DHCPc_NBR_COMM];
+DHCPc_EXT  DHCPc_COMM     *DHCPc_CommPoolPtr;                   /* Ptr to pool of free DHCPc comm.                      */
+DHCPc_EXT  DHCPc_COMM     *DHCPc_CommListHead;                  /* Ptr to head of Comm List.                            */
+
+DHCPc_EXT  DHCPc_TMR       DHCPc_TmrTbl[DHCPc_NBR_TMR];
+DHCPc_EXT  DHCPc_TMR      *DHCPc_TmrPoolPtr;                    /* Ptr to pool of free DHCPc tmrs.                      */
+DHCPc_EXT  DHCPc_TMR      *DHCPc_TmrListHead;                   /* Ptr to head of Tmr List.                             */
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+DHCPc_ERR      DHCPc_Init         (void);                       /* DHCPc initialization function.                       */
+
+                                                                /* Start DHCP service for specified interface.          */
+void           DHCPc_Start        (NET_IF_NBR       if_nbr,
+                                   DHCPc_OPT_CODE  *preq_param_tbl,
+                                   CPU_INT08U       req_param_tbl_qty,
+                                   DHCPc_ERR       *perr);
+
+                                                                /* Stop  DHCP service for specified interface.          */
+void           DHCPc_Stop         (NET_IF_NBR       if_nbr,
+                                   DHCPc_ERR       *perr);
+
+                                                                /* Check an interface's DHCP status & last error.       */
+DHCPc_STATUS  DHCPc_ChkStatus     (NET_IF_NBR       if_nbr,
+                                   DHCPc_ERR       *perr_last);
+
+                                                                /* Get value for a given DHCP option.                   */
+void          DHCPc_GetOptVal     (NET_IF_NBR       if_nbr,
+                                   DHCPc_OPT_CODE   opt_code,
+                                   CPU_INT08U      *pval_buf,
+                                   CPU_INT16U      *pval_buf_len,
+                                   DHCPc_ERR       *perr);
+
+
+void          DHCPc_TmrTaskHandler(void);
+
+void          DHCPc_TaskHandler   (void);
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                      RTOS INTERFACE FUNCTIONS
+*                                  (see specific OS'S  dhcp-c_os.c)
+*********************************************************************************************************
+*/
+
+void         DHCPc_OS_Init               (DHCPc_ERR   *perr);       /* Create         DHCPc Objects.                    */
+
+void         DHCPc_OS_InitWait           (DHCPc_ERR   *perr);       /* Wait  until DHCPc initialization is complete.    */
+
+void         DHCPc_OS_InitSignal         (DHCPc_ERR   *perr);       /* Signal that DHCPc initialization is complete.    */
+
+
+void         DHCPc_OS_Lock               (DHCPc_ERR   *perr);       /* Acquire access to DHCP client.                   */
+
+void         DHCPc_OS_Unlock             (void);                    /* Release access to DHCP client.                   */
+
+
+void         DHCPc_OS_TaskInit           (DHCPc_ERR   *perr);       /* Create & start DHCPc Task.                       */
+
+
+void        *DHCPc_OS_MsgWait            (DHCPc_ERR   *perr);       /* Wait for DHCP message.                           */
+
+void         DHCPc_OS_MsgPost            (void        *pmsg,        /* Post     DHCP message.                           */
+                                          DHCPc_ERR   *perr);
+
+
+void         DHCPc_OS_TmrInit            (DHCPc_ERR   *perr);       /* Create      DHCPc Timer.                         */
+
+void         DHCPc_OS_TmrStart           (DHCPc_ERR   *perr);       /* Start       DHCPc Timer.                         */
+
+void         DHCPc_OS_TmrWait            (DHCPc_ERR   *perr);       /* Wait  until DHCPc Timer expires.                 */
+
+void         DHCPc_OS_TmrSignal          (void);                    /* Signal that DHCPc Timer expired.                 */
+
+
+CPU_INT32U   DHCPc_OS_TimeGet_tick       (void);                    /* Get       current time (in ticks).               */
+
+CPU_INT32U   DHCPc_OS_TimeCalcElapsed_sec(CPU_INT32U   time_start,  /* Calculate elapsed time (in seconds).             */
+                                          CPU_INT32U   time_stop);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  DHCPc_CFG_IP_PORT_SERVER
+#error  "DHCPc_CFG_IP_PORT_SERVER                not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >= NET_PORT_NBR_MIN]       "
+#error  "                                  [     &&  <= NET_PORT_NBR_MAX]       "
+
+#elif   (DEF_CHK_VAL(DHCPc_CFG_IP_PORT_SERVER,  \
+                     NET_PORT_NBR_MIN,          \
+                     NET_PORT_NBR_MAX) != DEF_OK)
+#error  "DHCPc_CFG_IP_PORT_SERVER          illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >= NET_PORT_NBR_MIN]       "
+#error  "                                  [     &&  <= NET_PORT_NBR_MAX]       "
+#endif
+
+
+#ifndef  DHCPc_CFG_IP_PORT_CLIENT
+#error  "DHCPc_CFG_IP_PORT_CLIENT                not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >= NET_PORT_NBR_MIN]       "
+#error  "                                  [     &&  <= NET_PORT_NBR_MAX]       "
+
+#elif   (DEF_CHK_VAL(DHCPc_CFG_IP_PORT_CLIENT,  \
+                     NET_PORT_NBR_MIN,          \
+                     NET_PORT_NBR_MAX) != DEF_OK)
+#error  "DHCPc_CFG_IP_PORT_CLIENT          illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >= NET_PORT_NBR_MIN]       "
+#error  "                                  [     &&  <= NET_PORT_NBR_MAX]       "
+#endif
+
+
+
+#ifndef  DHCPc_CFG_MAX_RX_TIMEOUT_MS
+#error  "DHCPc_CFG_MAX_RX_TIMEOUT_MS             not #define'd in 'dhcp-c_cfg.h' "
+#error  "                                  [MUST be  >= NET_TIMEOUT_MIN_mS]      "
+#error  "                                  [     &&  <= NET_TIMEOUT_MAX_mS]      "
+
+#elif   (DEF_CHK_VAL(DHCPc_CFG_MAX_RX_TIMEOUT_MS, \
+                     NET_TIMEOUT_MIN_mS,          \
+                     NET_TIMEOUT_MAX_mS) != DEF_OK)
+#error  "DHCPc_CFG_MAX_RX_TIMEOUT_MS       illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >= NET_TIMEOUT_MIN_mS]     "
+#error  "                                  [     &&  <= NET_TIMEOUT_MAX_mS]     "
+#endif
+
+
+
+#ifndef  DHCPc_CFG_BROADCAST_BIT_EN
+#error  "DHCPc_CFG_BROADCAST_BIT_EN              not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+
+#elif  ((DHCPc_CFG_BROADCAST_BIT_EN != DEF_DISABLED) && \
+        (DHCPc_CFG_BROADCAST_BIT_EN != DEF_ENABLED ))
+#error  "DHCPc_CFG_BROADCAST_BIT_EN        illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+#endif
+
+
+
+#ifndef  DHCPc_CFG_PARAM_REQ_TBL_SIZE
+#error  "DHCPc_CFG_PARAM_REQ_TBL_SIZE            not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >= 1  ]                    "
+#error  "                                  [     &&  <= 255]                    "
+
+#elif   (DEF_CHK_VAL(DHCPc_CFG_PARAM_REQ_TBL_SIZE, \
+                     1,                            \
+                     DEF_INT_08U_MAX_VAL) != DEF_OK)
+#error  "DHCPc_CFG_PARAM_REQ_TBL_SIZE      illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >= 1  ]                    "
+#error  "                                  [     &&  <= 255]                    "
+#endif
+
+
+
+#ifndef  DHCPc_CFG_MAX_NBR_IF
+#error  "DHCPc_CFG_MAX_NBR_IF                    not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >= 1                    ]  "
+#error  "                                  [     &&  <= NET_IF_CFG_MAX_NBR_IF]  "
+
+
+#elif   (DEF_CHK_VAL(DHCPc_CFG_MAX_NBR_IF,           \
+                     1,                              \
+                     NET_IF_CFG_MAX_NBR_IF) != DEF_OK)
+#error  "DHCPc_CFG_MAX_NBR_IF              illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >= 1                    ]  "
+#error  "                                  [     &&  <= NET_IF_CFG_MAX_NBR_IF]  "
+
+#endif
+
+
+
+#ifndef  DHCPc_CFG_ADDR_VALIDATE_EN
+#error  "DHCPc_CFG_ADDR_VALIDATE_EN              not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+
+#elif  ((DHCPc_CFG_ADDR_VALIDATE_EN != DEF_ENABLED ) && \
+        (DHCPc_CFG_ADDR_VALIDATE_EN != DEF_DISABLED))
+#error  "DHCPc_CFG_ADDR_VALIDATE_EN        illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+#endif
+
+
+
+#ifndef  DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN
+#error  "DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN        not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+
+#elif  ((DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN != DEF_DISABLED) && \
+        (DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN != DEF_ENABLED ))
+#error  "DHCPc_CFG_DYN_LOCAL_LINK_ADDR_EN  illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+#endif
+
+
+#ifndef  DHCPc_CFG_LOCAL_LINK_MAX_RETRY
+#error  "DHCPc_CFG_LOCAL_LINK_MAX_RETRY          not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >=   1]                    "
+#error  "                                  [     &&  <= 255]                    "
+
+#elif   (DEF_CHK_VAL(DHCPc_CFG_LOCAL_LINK_MAX_RETRY, \
+                     1,                              \
+                     DEF_INT_08U_MAX_VAL) != DEF_OK)
+#error  "DHCPc_CFG_LOCAL_LINK_MAX_RETRY    illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  >=   1]                    "
+#error  "                                  [     &&  <= 255]                    "
+#endif
+
+
+
+#ifndef  DHCPc_CFG_ARG_CHK_EXT_EN
+#error  "DHCPc_CFG_ARG_CHK_EXT_EN                not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+
+#elif  ((DHCPc_CFG_ARG_CHK_EXT_EN != DEF_DISABLED) && \
+        (DHCPc_CFG_ARG_CHK_EXT_EN != DEF_ENABLED ))
+#error  "DHCPc_CFG_ARG_CHK_EXT_EN          illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+#endif
+
+
+#ifndef  DHCPc_CFG_ARG_CHK_DBG_EN
+#error  "DHCPc_CFG_ARG_CHK_DBG_EN                not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+
+#elif  ((DHCPc_CFG_ARG_CHK_DBG_EN != DEF_DISABLED) && \
+        (DHCPc_CFG_ARG_CHK_DBG_EN != DEF_ENABLED ))
+#error  "DHCPc_CFG_ARG_CHK_DBG_EN          illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+#endif
+
+
+#ifndef  DHCPc_DBG_CFG_MEM_CLR_EN
+#error  "DHCPc_DBG_CFG_MEM_CLR_EN                not #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+
+#elif  ((DHCPc_DBG_CFG_MEM_CLR_EN != DEF_DISABLED) && \
+        (DHCPc_DBG_CFG_MEM_CLR_EN != DEF_ENABLED ))
+#error  "DHCPc_DBG_CFG_MEM_CLR_EN          illegally #define'd in 'dhcp-c_cfg.h'"
+#error  "                                  [MUST be  DEF_DISABLED]              "
+#error  "                                  [     ||  DEF_ENABLED ]              "
+#endif
+
+
+
+                                                                /* Correctly configured in 'dhcp-c.h'; DO NOT MODIFY.   */
+#ifndef  DHCPc_NBR_TMR
+#error  "DHCPc_NBR_TMR                           not #define'd in 'dhcp-c.h'"
+#error  "                                  [MUST be  >= DHCPc_TMR_NBR_MIN]  "
+#error  "                                  [     &&  <= DHCPc_TMR_NBR_MAX]  "
+
+#elif   (DEF_CHK_VAL(DHCPc_NBR_TMR,              \
+                     DHCPc_TMR_NBR_MIN,          \
+                     DHCPc_TMR_NBR_MAX) != DEF_OK)
+#error  "DHCPc_NBR_TMR                     illegally #define'd in 'dhcp-c.h'"
+#error  "                                  [MUST be  >= DHCPc_TMR_NBR_MIN]  "
+#error  "                                  [     &&  <= DHCPc_TMR_NBR_MAX]  "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if     (NET_IF_CFG_ETHER_EN != DEF_ENABLED)
+#error  "NET_IF_CFG_ETHER_EN               illegally #define'd in 'net_cfg.h'"
+#error  "                                  [MUST be  DEF_ENABLED]            "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    LIBRARY CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* See 'dhcp-c.h  Note #3a'.                            */
+#if     (NET_VERSION < 30000u)
+#error  "NET_VERSION       [SHOULD be >= V3.00.00]"
+#endif
+
+                                                                /* See 'dhcp-c.h  Note #3b'.                            */
+#if     (CPU_CORE_VERSION < 127u)
+#error  "CPU_CORE_VERSION  [SHOULD be >= V1.27]"
+#endif
+
+                                                                /* See 'dhcp-c.h  Note #3c'.                            */
+#if     (LIB_VERSION < 13800u)
+#error  "LIB_VERSION       [SHOULD be >= V1.38.00]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of DHCPc module include.                         */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DHCPc/subdir.mk b/src/ucos_v1_42/micrium_source/uC-DHCPc/subdir.mk
new file mode 100644
index 0000000..dde1706
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DHCPc/subdir.mk
@@ -0,0 +1,2 @@
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-DHCPc/Source/dhcp-c.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-DHCPc/OS/uCOS-II/dhcp-c_os.c
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Cfg/Template/dns-c_cfg.c b/src/ucos_v1_42/micrium_source/uC-DNSc/Cfg/Template/dns-c_cfg.c
new file mode 100644
index 0000000..c572ed8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Cfg/Template/dns-c_cfg.c
@@ -0,0 +1,145 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    DNS CLIENT CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : dns-c_cfg.c
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) All values that are used in this file and are defined in other header files should be
+*               included in this file. Some values could be located in the same file such as task priority
+*               and stack size. This template file assume that the following values are defined in app_cfg.h:
+*
+*                   DNSc_OS_CFG_INSTANCE_TASK_PRIO
+*                   DNSc_OS_CFG_INSTANCE_TASK_STK_SIZE
+*
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                             /* See Note #1.                                         */
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                 DNS CLIENT CONFIGURATION STRUCTURE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  DNSc_CFG  DNSc_Cfg = {
+                                /* Configure segment where allocate the memory for          */
+                                /* DNS objects:                                             */
+    DEF_NULL,
+                                /* [DEF_NULL] to allocate from uC/LIB Memory HEAP.          */
+                                /* [Pointer] to the memory segment.                         */
+
+
+                                /* Configure default DNS server to use.                     */
+    "8.8.8.8",
+                                /* [Pointer] to a string that contains the IP address.      */
+
+
+                                /* Configure the maximum host name length                   */
+    255,
+                                /* [MUST be >= 2]                                           */
+
+
+                                /* Configure number of entry the cache can contains:        */
+    2,                          /* [MUST be >= 1]                                           */
+
+
+                                /* Configure how many IP addresses can be stored by host:   */
+    1,                          /* Number of IPv4 Addresses.                                */
+    1,                          /* Number of IPv6 Addresses.                                */
+                                /* [MUST be >= 1]                                           */
+
+
+
+                                /* Configure task delay in integer milliseconds :           */
+    DNSc_DFLT_TASK_DLY_MS,
+                                /* Default value: [DNSc_DFLT_TASK_DLY_MS] = 50ms            */
+                                /* [MUST be >= 1]                                           */
+
+
+                                /* Configure maximum of request resolution retry :          */
+    DNSc_DFLT_REQ_RETRY_NBR_MAX,
+                                /* Default value: [DNSc_DFLT_REQ_RETRY_NBR_MAX] = 2         */
+                                /* [MUST be >= 1]                                           */
+
+                                /* Configure timeout before a request resolution retry :    */
+    DNSc_DFLT_REQ_RETRY_TIMEOUT_MS,
+                                /* Default value: [DNSc_DFLT_REQ_RETRY_TIMEOUT_MS] = 1000ms */
+                                /* [MUST be >= 100]                                         */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               DNS CLIENT TASK CONFIGURATION STRUCTURE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (DNSc_CFG_MODE_ASYNC_EN == DEF_ENABLED)
+#ifndef  DNSc_OS_CFG_INSTANCE_TASK_PRIO
+#define  DNSc_OS_CFG_INSTANCE_TASK_PRIO                  30
+#endif
+
+#ifndef  DNSc_OS_CFG_INSTANCE_TASK_STK_SIZE
+#define  DNSc_OS_CFG_INSTANCE_TASK_STK_SIZE             512
+#endif
+
+const  DNSc_CFG_TASK  DNSc_CfgTask = {
+                                         DNSc_OS_CFG_INSTANCE_TASK_PRIO,
+                                         DNSc_OS_CFG_INSTANCE_TASK_STK_SIZE,
+                                         DEF_NULL
+                                     };
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Cfg/Template/dns-c_cfg.h b/src/ucos_v1_42/micrium_source/uC-DNSc/Cfg/Template/dns-c_cfg.h
new file mode 100644
index 0000000..7b6e27d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Cfg/Template/dns-c_cfg.h
@@ -0,0 +1,111 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    DNS CLIENT CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : dns-c_cfg.h
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+*/
+
+#ifndef DNSc_CFG_MODULE_PRESENT
+#define DNSc_CFG_MODULE_PRESENT
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                  DNSc ARGUMENT CHECK CONFIGURATION
+*
+* Note(s) : (1) Configure DNSc_CFG_ARG_CHK_EXT_EN to enable/disable the DNS client external argument
+*               check feature :
+*
+*               (a) When ENABLED,  ALL arguments received from any port interface provided by the developer
+*                   are checked/validated.
+*
+*               (b) When DISABLED, NO  arguments received from any port interface provided by the developer
+*                   are checked/validated.
+*********************************************************************************************************
+*/
+                                                                /* Configure external argument check feature ...        */
+                                                                /* See Note 1.                                          */
+#define  DNSc_CFG_ARG_CHK_EXT_EN                    DEF_DISABLED
+                                                                /* DEF_DISABLED     External argument check DISABLED    */
+                                                                /* DEF_ENABLED      External argument check ENABLED     */
+
+/*
+*********************************************************************************************************
+*                                     DNSc FEATURES CONFIGURATION
+*
+* Note(s) : (1) Configure DNSc_CFG_MODE_ASYNC_EN to enable/disable the DNS client asynchronous communication mode:
+*
+*               (a) When ENABLED,  A dedicated task will handle all host resolution request. It will be possible to
+*                   call DNS API to get remote host address without blocking.
+*
+*               (b) When DISABLED, The API to get remote host will always block until the resolution is completed.
+*
+*           (2) Configure DNSc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the asynchronous
+*               communication is enabled.
+*
+*               (a) When ENABLED,  It will be possible to block when calling the DNS API to get remote host until the
+*                   resolution is completed (via a flag option).
+*
+*               (b) When DISABLED, The API to get remote host will always be non-blocking, must poll DNS client to
+*                   know when the resolution is completed.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure asynchronous mode feature, See Note #1 ... */
+#define  DNSc_CFG_MODE_ASYNC_EN                     DEF_DISABLED
+                                                                /* DEF_DISABLED     Asynchronous mode DISABLED          */
+                                                                /* DEF_ENABLED      Asynchronous mode ENABLED           */
+
+
+                                                                /* Configure blocking option feature, See Note #2 ... */
+#define  DNSc_CFG_MODE_BLOCK_EN                     DEF_DISABLED
+                                                                /* DEF_DISABLED     Blocking option DISABLED            */
+                                                                /* DEF_ENABLED      Blocking option ENABLED             */
+
+/*
+*********************************************************************************************************
+*                                DNSc RUN-TIME STRUCTURE CONFIGURATION
+*
+* Note(s) : (1) These structures should be defined into a 'C' file.
+*********************************************************************************************************
+*/
+
+extern  const  DNSc_CFG       DNSc_Cfg;                         /* Must always be defined.                              */
+
+#if (DNSc_CFG_MODE_ASYNC_EN == DEF_ENABLED)
+extern  const  DNSc_CFG_TASK  DNSc_CfgTask;                     /* Not required when Asynchronous mode is disabled.     */
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Cmd/dns-c_cmd.c b/src/ucos_v1_42/micrium_source/uC-DNSc/Cmd/dns-c_cmd.c
new file mode 100644
index 0000000..eedcf64
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Cmd/dns-c_cmd.c
@@ -0,0 +1,423 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         uC/DNSc CMD MODULE
+*
+* Filename      : dns-c_cmd.c
+* Version       : V2.00.01
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/DNSc   V2.00.00
+*                     (b) uC/TCP-IP V3.01.00
+*                     (c) uC/Shell  V1.03.01
+************************************************************* ********************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  DNSc_CMD_MODULE
+
+
+#include  "Source/dns-c.h"
+#include  "dns-c_cmd.h"
+
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  DNSc_CMD_OUTPUT_ERR_REQ_FAIL          ("Request fail : ")
+#define  DNSc_CMD_OUTPUT_ERR_STATUS_PENDING    ("Request is pending")
+#define  DNSc_CMD_OUTPUT_ERR_STATUS_FAILED     ("Request failed")
+
+#define  DNSc_CMD_OUTPUT_ERR_CLR_CACHE_FAIL    ("Cache clear failed : ")
+#define  DNSc_CMD_OUTPUT_ERR_SET_SERVER_FAIL   ("Set server failed : ")
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  DNScCmd_GetHost     (CPU_INT16U          argc,
+                                         CPU_CHAR           *p_argv[],
+                                         SHELL_OUT_FNCT      out_fnct,
+                                         SHELL_CMD_PARAM    *p_cmd_param);
+
+static  CPU_INT16S DNScCmd_SetServerAddr(CPU_INT16U          argc,
+                                         CPU_CHAR           *p_argv[],
+                                         SHELL_OUT_FNCT      out_fnct,
+                                         SHELL_CMD_PARAM    *p_cmd_param);
+
+static  CPU_INT16S DNScCmd_ClrCache     (CPU_INT16U          argc,
+                                         CPU_CHAR           *p_argv[],
+                                         SHELL_OUT_FNCT      out_fnct,
+                                         SHELL_CMD_PARAM    *p_cmd_param);
+
+static  CPU_INT16S  DNScCmd_Help        (CPU_INT16U          argc,
+                                         CPU_CHAR           *p_argv[],
+                                         SHELL_OUT_FNCT      out_fnct,
+                                         SHELL_CMD_PARAM    *p_cmd_param);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  SHELL_CMD DNSc_CmdTbl[] =
+{
+    {"dns_get_host",   DNScCmd_GetHost},
+    {"dns_server_set", DNScCmd_SetServerAddr},
+    {"dns_cache_clr",  DNScCmd_ClrCache},
+    {"dns_help",       DNScCmd_Help},
+    {0, 0 }
+};
+
+
+/*
+*********************************************************************************************************
+*                                           DNScCmd_Init()
+*
+* Description : Add  test stubs to uC-Shell.
+*
+* Argument(s) : p_err    Pointer to variable that will receive the return error code from this function :
+*
+*                             DNSc_CMD_ERR_NONE         No error.
+*                             DNSc_CMD_ERR_SHELL_INIT   Command table not added to uC-Shell
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScCmd_Init (DNSc_CMD_ERR  *p_err)
+{
+    SHELL_ERR  err;
+
+
+    Shell_CmdTblAdd("dns", DNSc_CmdTbl, &err);
+    if (err == SHELL_ERR_NONE) {
+        *p_err = DNSc_CMD_ERR_NONE;
+    } else {
+        *p_err = DNSc_CMD_ERR_SHELL_INIT;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCmd_SetServerAddr()
+*
+* Description : Command to configure DNS client server to be used by default.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Referenced in DNSc_CmdTbl.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  DNScCmd_SetServerAddr (CPU_INT16U          argc,
+                                           CPU_CHAR           *p_argv[],
+                                           SHELL_OUT_FNCT      out_fnct,
+                                           SHELL_CMD_PARAM    *p_cmd_param)
+{
+    CPU_INT16S  output;
+    DNSc_ERR    err;
+
+
+    if (argc != 2) {
+        output = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    DNSc_CfgServerByStr(p_argv[1], &err);
+    if (err != DNSc_ERR_NONE) {
+        CPU_CHAR  msg[25];
+
+
+        Str_Copy(msg, DNSc_CMD_OUTPUT_ERR_SET_SERVER_FAIL);
+        Str_FmtNbr_Int32U(err, 5, 10, '\0', DEF_YES, DEF_YES, msg + sizeof(DNSc_CMD_OUTPUT_ERR_SET_SERVER_FAIL));
+        output = NetCmd_OutputError(msg, out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    output = NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+exit:
+    return (output);
+}
+
+/*
+*********************************************************************************************************
+*                                           DNScCmd_GetHost()
+*
+* Description : Command to resolve an host name.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Referenced in DNSc_CmdTbl.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  DNScCmd_GetHost (CPU_INT16U        argc,
+                             CPU_CHAR         *p_argv[],
+                             SHELL_OUT_FNCT    out_fnct,
+                             SHELL_CMD_PARAM  *p_cmd_param)
+{
+    DNSc_STATUS     status;
+    DNSc_ADDR_OBJ   addrs[50];
+    CPU_INT08U      addr_ctr = 50u;
+    CPU_INT08U      ix;
+    CPU_INT16S      output;
+    DNSc_ERR        err;
+
+
+    if (argc != 2) {
+        output = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+    status = DNSc_GetHost(p_argv[1],
+                          addrs,
+                         &addr_ctr,
+                          DNSc_FLAG_NONE,
+                          DEF_NULL,
+                         &err);
+    if (err != DNSc_ERR_NONE) {
+        CPU_CHAR  msg[20];
+
+
+        Str_Copy(msg, DNSc_CMD_OUTPUT_ERR_REQ_FAIL);
+        Str_FmtNbr_Int32U(err, 5, 10, '\0', DEF_YES, DEF_YES, msg + sizeof(DNSc_CMD_OUTPUT_ERR_REQ_FAIL));
+        output = NetCmd_OutputError(msg, out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+    switch (status) {
+        case DNSc_STATUS_RESOLVED:
+             break;
+
+        case DNSc_STATUS_PENDING:
+             output = NetCmd_OutputError(DNSc_CMD_OUTPUT_ERR_STATUS_PENDING, out_fnct, p_cmd_param);
+             goto exit;
+
+        case DNSc_STATUS_FAILED:
+        default:
+             output = NetCmd_OutputError(DNSc_CMD_OUTPUT_ERR_STATUS_FAILED, out_fnct, p_cmd_param);
+             goto exit;
+    }
+
+    for (ix = 0u; ix < addr_ctr; ix++) {
+        CPU_CHAR  addr_str[NET_ASCII_LEN_MAX_ADDR_IP];
+        NET_ERR   net_err;
+
+        if (addrs[ix].Len == NET_IPv4_ADDR_LEN) {
+#ifdef  NET_IPv4_MODULE_EN
+            NET_IPv4_ADDR *p_addr = (NET_IPv4_ADDR *)addrs[ix].Addr;
+
+
+            NetASCII_IPv4_to_Str(*p_addr, addr_str, NET_ASCII_LEN_MAX_ADDR_IP, &net_err);
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            NET_IPv6_ADDR *p_addr = (NET_IPv6_ADDR *)addrs[ix].Addr;
+
+
+            NetASCII_IPv6_to_Str(p_addr, addr_str, DEF_NO, DEF_YES, &net_err);
+#endif
+        }
+
+        output += NetCmd_OutputMsg(addr_str, DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+    }
+
+    output = NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+exit:
+    return (output);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DNScCmd_ClrCache()
+*
+* Description : Command function to clear the cache.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Referenced in DNSc_CmdTbl.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  DNScCmd_ClrCache (CPU_INT16U        argc,
+                                      CPU_CHAR         *p_argv[],
+                                      SHELL_OUT_FNCT    out_fnct,
+                                      SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S output;
+    DNSc_ERR   err;
+
+
+    if (argc != 1) {
+        output = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    DNSc_CacheClrAll(&err);
+    if (err != DNSc_ERR_NONE) {
+        CPU_CHAR  msg[25];
+
+
+        Str_Copy(msg, DNSc_CMD_OUTPUT_ERR_CLR_CACHE_FAIL);
+        Str_FmtNbr_Int32U(err, 5, 10, '\0', DEF_YES, DEF_YES, msg + sizeof(DNSc_CMD_OUTPUT_ERR_CLR_CACHE_FAIL));
+        output = NetCmd_OutputError(msg, out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    output = NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+exit:
+    return (output);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            DNScCmd_Help()
+*
+* Description : Output DNSc command help.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Referenced in DNSc_CmdTbl.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S DNScCmd_Help (CPU_INT16U        argc,
+                                 CPU_CHAR         *p_argv[],
+                                 SHELL_OUT_FNCT    out_fnct,
+                                 SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S  ret_val;
+
+
+    ret_val = NetCmd_OutputCmdTbl(DNSc_CmdTbl, out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Cmd/dns-c_cmd.h b/src/ucos_v1_42/micrium_source/uC-DNSc/Cmd/dns-c_cmd.h
new file mode 100644
index 0000000..cc8a430
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Cmd/dns-c_cmd.h
@@ -0,0 +1,72 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           uC/DNSc TEST CODE
+*
+* Filename      : dns-c_cmd.h
+* Version       : V2.00.01
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+#ifndef  DNSc_CMD_MODULE_PRESENT
+#define  DNSc_CMD_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef enum dnsc_test_err {
+    DNSc_CMD_ERR_NONE             = 0,                         /* No errors.                                           */
+
+    DNSc_CMD_ERR_INIT             = 10u,
+
+    DNSc_CMD_ERR_SHELL_INIT       = 11u,                       /* Command table not added to uC-Shell.                 */
+
+} DNSc_CMD_ERR;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void  DNScCmd_Init (DNSc_CMD_ERR  *p_err);
+
+
+
+#endif                                                          /* End of template module include.      */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Examples/dns-c_get_host.c b/src/ucos_v1_42/micrium_source/uC-DNSc/Examples/dns-c_get_host.c
new file mode 100644
index 0000000..03a48aa
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Examples/dns-c_get_host.c
@@ -0,0 +1,103 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find information about uC/DHCPc by visiting https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                       DNS HOST NAME RESOLUTION
+*
+* Filename      : dns-c_get_host.c
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to resolve an hostname using DNS client.
+*
+*                 (2) This example is for :
+*
+*                       (b) uC/TCPIP - V3.01.00
+*
+*                 (3) This file is an example about how to use uC/DNSc, It may not cover all case needed by a real
+*                     application. Also some modification might be needed, insert the code to perform the stated
+*                     actions wherever 'TODO' comments are found.
+*
+*                     (a) This example is not fully tested, so it is not guaranteed that all cases are cover
+*                         properly.
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                       AppDNSc_GetHostMicrium()
+*
+* Description : This function resolve the hostname "micrium.com" and return the IP address of the host.
+*
+* Argument(s) : p_addr_str  Pointer to a string that will receive the IP address.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Prior to do any call to DNSc the module must be initialized.
+*********************************************************************************************************
+*/
+
+void  AppDNSc_GetHostMicrium (CPU_CHAR  *p_addr_str)
+{
+    DNSc_ADDR_OBJ  addrs[2u];
+    CPU_INT08U     addr_nbr = 2u;
+    CPU_INT08U     ix;
+    DNSc_ERR       dns_err;
+
+
+    DNSc_GetHost("micrium.com", addrs, &addr_nbr, DNSc_FLAG_NONE, DEF_NULL, &dns_err);
+    if (dns_err != DNSc_ERR_NONE) {
+        return;
+    }
+
+    for (ix = 0u; ix < addr_nbr; ix++) {
+        NET_ERR   net_err;
+
+
+        if (addrs[ix].Len == NET_IPv4_ADDR_LEN) {
+#ifdef  NET_IPv4_MODULE_EN
+            NET_IPv4_ADDR *p_addr = (NET_IPv4_ADDR *)addrs[ix].Addr;
+
+
+            NetASCII_IPv4_to_Str(*p_addr, p_addr_str, NET_ASCII_LEN_MAX_ADDR_IP, &net_err);
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            NET_IPv6_ADDR *p_addr = (NET_IPv6_ADDR *)addrs[ix].Addr;
+
+
+            NetASCII_IPv6_to_Str(p_addr, p_addr_str, DEF_NO, DEF_YES, &net_err);
+#endif
+        }
+    }
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Examples/dns-c_init.c b/src/ucos_v1_42/micrium_source/uC-DNSc/Examples/dns-c_init.c
new file mode 100644
index 0000000..cadd60b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Examples/dns-c_init.c
@@ -0,0 +1,90 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find information about uC/DHCPc by visiting https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                      DNS CLIENT INITIALIZATION
+*
+* Filename      : dns-c_init.c
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize uC/DNSc correctly.
+*
+*                 (2) This example is for :
+*
+*                       (b) uC/TCPIP - V3.01.00
+*
+*                 (3) This file is an example about how to use uC/DNSc, It may not cover all case needed by a real
+*                     application. Also some modification might be needed, insert the code to perform the stated
+*                     actions wherever 'TODO' comments are found.
+*
+*                     (a) This example is not fully tested, so it is not guaranteed that all cases are cover
+*                         properly.
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            AppInit_DNSc()
+*
+* Description : This function initialize uC/DNSc. This function returns only the DHCP negotiation is completed.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   Completed successfully.
+*
+*               DEF_FAIL, Initialization failed.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Prior to do any call to DNS client the module must be initialized. If the process is successful,
+*                   the DNS client s tasks are started (if applicable), and its various data structures are initialized.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppDNSc_Init (void)
+{
+    DNSc_ERR  dns_err;
+
+                                                                /* --------------- INITIALIZE uC/DHCPc ---------------- */
+                                                                /* See Note #1.                                         */
+#if (DNSc_CFG_MODE_ASYNC_EN == DEF_DISABLED)
+    DNSc_Init(&DNSc_Cfg, DEF_NULL, &dns_err);
+
+#else
+    DNSc_Init(&DNSc_Cfg, &DNSc_CfgTask, &dns_err);
+#endif
+
+    if (dns_err != DNSc_ERR_NONE) {
+        return (DEF_FAIL);
+
+    }
+
+    return (DEF_OK);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Examples/dns-c_init_shell.c b/src/ucos_v1_42/micrium_source/uC-DNSc/Examples/dns-c_init_shell.c
new file mode 100644
index 0000000..4b1bdc7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Examples/dns-c_init_shell.c
@@ -0,0 +1,81 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find information about uC/DHCPc by visiting https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                    ADD DNS COMMANDS TO uC/SHELL
+*
+* Filename      : dns-c_init_shell.c
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize DNS client command for uC/Shell.
+*
+*                 (2) This example is for :
+*
+*                       (b) uC/TCPIP - V3.01.00
+*
+*                 (3) This file is an example about how to use uC/DNSc, It may not cover all case needed by a real
+*                     application. Also some modification might be needed, insert the code to perform the stated
+*                     actions wherever 'TODO' comments are found.
+*
+*                     (a) This example is not fully tested, so it is not guaranteed that all cases are cover
+*                         properly.
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            AppInit_DNSc()
+*
+* Description : This function add all command of DNSc that can be executed by uC/Shell.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   Completed successfully.
+*
+*               DEF_FAIL, Initialization failed.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Prior to do any call to DNSc the module must be initialized.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppDNScCmd_Init (void)
+{
+    DNSc_CMD_ERR  dns_cmd_err;
+
+
+    DNScCmd_Init(&dns_cmd_err);
+    if (dns_cmd_err != DNSc_CMD_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c.c b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c.c
new file mode 100644
index 0000000..44f39e5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c.c
@@ -0,0 +1,668 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             DNS CLIENT
+*
+* Filename      : dns-c.c
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This file implements a basic DNS client based on RFC #1035.  It provides the
+*                     mechanism used to retrieve an IP address from a given host name.
+*
+*                 (2) Assumes the following versions (or more recent) of software modules are included
+*                     in the project build :
+*
+*                     (a) uC/TCP-IP V3.00
+*                     (b) uC/CPU    V1.30
+*                     (c) uC/LIB    V1.37
+*                     (d) uC/Common-KAL V1.00.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    DNSc_MODULE
+#include  "dns-c.h"
+#include  "dns-c_req.h"
+#include  "dns-c_cache.h"
+#include  "dns-c_task.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                             DNSc_Init()
+*
+* Description : Initialize DNSc module.
+*
+* Argument(s) : p_cfg       Pointer to DNSc's configuration.
+*
+*               p_task_cfg  Pointer to a structure that contains the task configuration of the Asynchronous task.
+*                           If Asynchronous mode is disabled this pointer should be set to DEF_NULL.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               DNSc_ERR_NONE           Server address successfully set.
+*                               DNSc_ERR_NULL_PTR       Invalid pointer.
+*
+*                               RETURNED BY DNScCache_Init():
+*                                   See DNScCache_Init() for additional return error codes.
+*
+*                               RETURNED BY DNScTask_Init():
+*                                   See DNScTask_Init() for additional return error codes.
+*
+*                               RETURNED BY DNScReq_ServerInit():
+*                                   See DNScReq_ServerInit() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) DNSc_Init() MUST be called PRIOR to using other DNSc functions.
+*********************************************************************************************************
+*/
+
+void  DNSc_Init (const  DNSc_CFG       *p_cfg,
+                 const  DNSc_CFG_TASK  *p_task_cfg,
+                        DNSc_ERR       *p_err)
+{
+#if (DNSc_CFG_ARG_CHK_EN == DEF_ENABELD)
+    if (p_cfg == DEF_NULL) {
+       *p_err = DNSc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    DNScCache_Init(p_cfg, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+    DNScReq_ServerInit(p_cfg, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+    DNScTask_Init(p_cfg, p_task_cfg, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DNSc_CfgServerByStr()
+*
+* Description : Configure DNS server that must be used by default using a string.
+*
+* Argument(s) : p_server    Pointer to a string that contains the IP address of the DNS server.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               DNSc_ERR_NONE           Server address successfully set.
+*                               DNSc_ERR_NULL_PTR       Invalid pointer.
+*
+*                               RETURNED BY DNScCache_AddrObjSet():
+*                                   See DNScCache_AddrObjSet() for additional return error codes.
+*
+*                               RETURNED BY DNScReq_ServerSet():
+*                                   See DNScReq_ServerSet() for additional return error codes.
+
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNSc_CfgServerByStr (CPU_CHAR  *p_server,
+                           DNSc_ERR  *p_err)
+{
+    DNSc_ADDR_OBJ  ip_addr;
+
+
+#if (DNSc_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (p_server == DEF_NULL) {
+        *p_err = DNSc_ERR_NULL_PTR;
+         goto exit;
+    }
+#endif
+
+    DNScCache_AddrObjSet(&ip_addr, p_server, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+        goto exit;
+    }
+
+
+    DNScReq_ServerSet(&ip_addr, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNSc_CfgServerByAddr()
+*
+* Description : Configure DNS server that must be used by default using an address structure.
+*
+* Argument(s) : p_addr  Pointer to structure that contains the IP address of the DNS server.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE           Server address successfully set.
+*                           DNSc_ERR_NULL_PTR       Invalid pointer.
+*                           DNSc_ERR_ADDR_INVALID   Invalid IP address.
+*
+*                           RETURNED BY DNScCache_AddrObjSet():
+*                               See DNScCache_AddrObjSet() for additional return error codes.
+*
+*                           RETURNED BY DNScReq_ServerSet():
+*                               See DNScReq_ServerSet() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNSc_CfgServerByAddr (DNSc_ADDR_OBJ  *p_addr,
+                            DNSc_ERR       *p_err)
+{
+#if (DNSc_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (p_addr == DEF_NULL) {
+       *p_err = DNSc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    switch (p_addr->Len) {
+        case NET_IPv4_ADDR_SIZE:
+        case NET_IPv6_ADDR_SIZE:
+             break;
+
+        default:
+            *p_err = DNSc_ERR_ADDR_INVALID;
+             goto exit;
+    }
+
+    DNScReq_ServerSet(p_addr, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DNSc_GetServerByStr()
+*
+* Description : Get DNS server in string format that is configured to be use by default.
+*
+* Argument(s) : p_addr      Pointer to structure that will receive the IP address of the DNS server.
+*
+*               str_len_max Maximum string length.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE               Server address successfully returned.
+*                           DNSc_ERR_INVALID_ARG        Invalid argument
+*                           DNSc_ERR_ADDR_INVALID       Invalid server address.
+*                           DNSc_ERR_FAULT              Unknown error.
+*
+*                           RETURNED BY DNScReq_ServerGet():
+*                               See DNScReq_ServerGet() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNSc_GetServerByStr (CPU_CHAR    *p_str,
+                           CPU_INT08U   str_len_max,
+                           DNSc_ERR    *p_err)
+{
+    DNSc_ADDR_OBJ  addr;
+    NET_ERR        err;
+
+
+#if (DNSc_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (p_str == DEF_NULL) {
+       *p_err = DNSc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    DNScReq_ServerGet(&addr, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+        goto exit;
+    }
+
+    switch (addr.Len) {
+        case NET_IPv4_ADDR_LEN:
+#ifdef  NET_IPv4_MODULE_EN
+             if (str_len_max < NET_ASCII_LEN_MAX_ADDR_IPv4) {
+                *p_err = DNSc_ERR_INVALID_ARG;
+                 goto exit;
+             }
+
+             NetASCII_IPv4_to_Str(*(NET_IPv4_ADDR *)addr.Addr, p_str, DEF_NO, &err);
+             if (err != NET_ASCII_ERR_NONE) {
+                *p_err = DNSc_ERR_ADDR_INVALID;
+                 goto exit;
+             }
+             break;
+#else
+            *p_err = DNSc_ERR_ADDR_INVALID;
+             goto exit;
+
+#endif
+
+        case NET_IPv6_ADDR_LEN:
+#ifdef  NET_IPv6_MODULE_EN
+             if (str_len_max < NET_ASCII_LEN_MAX_ADDR_IPv6) {
+                *p_err = DNSc_ERR_INVALID_ARG;
+                 goto exit;
+             }
+
+             NetASCII_IPv6_to_Str((NET_IPv6_ADDR *)addr.Addr, p_str, DEF_NO, DEF_NO, &err);
+             if (err != NET_ASCII_ERR_NONE) {
+                *p_err = DNSc_ERR_ADDR_INVALID;
+                 goto exit;
+             }
+             break;
+#else
+             *p_err = DNSc_ERR_ADDR_INVALID;
+              goto exit;
+#endif
+
+        default:
+            *p_err = DNSc_ERR_FAULT;
+             goto exit;
+    }
+
+
+   *p_err = DNSc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNSc_CfgServerByAddr()
+*
+* Description : Get DNS server in address object that is configured to be use by default.
+*
+* Argument(s) : p_addr  Pointer to structure that will receive the IP address of the DNS server.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE           Server address successfully returned.
+*
+*                           RETURNED BY DNScReq_ServerGet():
+*                               See DNScReq_ServerGet() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNSc_GetServerByAddr (DNSc_ADDR_OBJ  *p_addr,
+                            DNSc_ERR       *p_err)
+{
+#if (DNSc_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (p_addr == DEF_NULL) {
+       *p_err = DNSc_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+    DNScReq_ServerGet(p_addr, p_err);
+
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            DNSc_GetHost()
+*
+* Description : Convert string representation of a host name to its corresponding IP address using DNS
+*               service.
+*
+* Argument(s) : p_host_name     Pointer to a string that contains the host name.
+*
+*               p_addrs         Pointer to arrays that will receive the IP address from this function.
+*
+*               p_addr_nbr      Pointer to a variable that contains how many address can be contained in the addresses
+*                               array and that will receive the number of address copied in the addresses array
+*
+*               flags           DNS client flag:
+*
+*                                   DNSc_FLAG_NONE              By default this function is blocking.
+*                                   DNSc_FLAG_NO_BLOCK          Don't block (only possible if DNSc's task is enabled).
+*                                   DNSc_FLAG_FORCE_CACHE       Take host from the cache, don't send new DNS request.
+*                                   DNSc_FLAG_FORCE_RENEW       Force DNS request, remove existing entry in the cache.
+*                                   DNSc_FLAG_FORCE_RESOLUTION  Force DNS to resolve given host name.
+*                                   DNSc_FLAG_IPv4_ONLY         Return only IPv4 address(es).
+*                                   DNSc_FLAG_IPv6_ONLY         Return only IPv6 address(es).
+*
+*               p_cfg           Pointer to a request configuration. Should be set to overwrite default DNS configuration
+*                               (such as DNS server, request timeout, etc.).
+*                               Must be set to DEF_NULL to use default configuration.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   DNSc_ERR_NONE               Request successful issued or resolved.
+*                                   DNSc_ERR_NULL_PTR           Invalid pointer.
+*                                   DNSc_ERR_INVALID_ARG        Invalid argument.
+*                                   DNSc_ERR_FAULT              Fault error.
+*
+*                                   RETURNED BY DNScCache_Srch():
+*                                       See DNScCache_Srch() for additional return error codes.
+*
+*                                   RETURNED BY DNScCache_HostObjGet():
+*                                       See DNScCache_HostObjGet() for additional return error codes.
+*
+*                                   RETURNED BY DNScTask_ProcessHostReq():
+*                                       See DNScTask_ProcessHostReq() for additional return error codes.
+*
+* Return(s)   : Resolution status:
+*                       DNSc_STATUS_PENDING         Host resolution is pending, call again to see the status. (Processed by DNSc's task)
+*                       DNSc_STATUS_RESOLVED        Host is resolved.
+*                       DNSc_STATUS_FAILED          Host resolution has failed.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+DNSc_STATUS  DNSc_GetHost (CPU_CHAR       *p_host_name,
+                           DNSc_ADDR_OBJ  *p_addrs,
+                           CPU_INT08U     *p_addr_nbr,
+                           DNSc_FLAGS      flags,
+                           DNSc_REQ_CFG   *p_cfg,
+                           DNSc_ERR       *p_err)
+{
+    NET_IP_ADDR_FAMILY   ip_family;
+    DNSc_STATUS          status   =  DNSc_STATUS_FAILED;
+    CPU_BOOLEAN          flag_set =  DEF_NO;
+    CPU_INT08U           addr_nbr = *p_addr_nbr;
+    DNSc_HOST_OBJ       *p_host;
+    NET_ERR              err;
+
+
+                                                                /* ------------------ VALIDATE ARGS ------------------- */
+#if (DNSc_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (p_host_name == DEF_NULL) {
+        *p_err = DNSc_ERR_NULL_PTR;
+         goto exit;
+    }
+
+    if (p_addrs == DEF_NULL) {
+        *p_err = DNSc_ERR_NULL_PTR;
+         goto exit;
+    }
+
+    if (addr_nbr_max <= 0u) {
+        *p_err = DNSc_ERR_INVALID_ARG;
+         goto exit;
+    }
+
+#ifndef  DNSc_TASK_MODULE_EN
+    if (DEF_BIT_SET(flags, DNSc_FLAG_NO_BLOCK)) {
+       *p_err = DNSc_ERR_INVALID_CFG;
+        goto exit;
+    } else {
+#ifndef DNSc_SIGNAL_TASK_MODULE_EN
+       *p_err = DNSc_ERR_INVALID_CFG;
+        goto exit;
+#endif
+    }
+
+    if (DEF_BIT_IS_SET(flags, DNSc_FLAG_FORCE_CACHE) &&
+        DEF_BIT_IS_SET(flags, DNSc_FLAG_FORCE_RENEW)) {
+       *p_err = DNSc_ERR_INVALID_CFG;
+        goto exit;
+    }
+#endif
+#endif
+
+    flag_set = DEF_BIT_IS_SET(flags, DNSc_FLAG_FORCE_RESOLUTION);
+    if (flag_set == DEF_NO) {
+                                                                /* First check to see if the incoming host name is      */
+                                                                /* simply a decimal-dot-formatted IP address. If it     */
+                                                                /* is, then just convert it and return.                 */
+        ip_family = NetASCII_Str_to_IP(p_host_name,
+                                       p_addrs[0].Addr,
+                                       sizeof(p_addrs[0].Addr),
+                                      &err);
+        if (err == NET_ASCII_ERR_NONE) {
+            switch (ip_family) {
+                case NET_IP_ADDR_FAMILY_IPv4:
+                     p_addrs[0].Len = NET_IPv4_ADDR_LEN;
+                     status         = DNSc_STATUS_RESOLVED;
+                    *p_addr_nbr     = 1u;
+                    *p_err          = DNSc_ERR_NONE;
+                     goto exit;
+
+                case NET_IP_ADDR_FAMILY_IPv6:
+                     p_addrs[0].Len = NET_IPv6_ADDR_LEN;
+                     status         = DNSc_STATUS_RESOLVED;
+                    *p_addr_nbr     = 1u;
+                    *p_err          = DNSc_ERR_NONE;
+                     goto exit;
+
+                default:
+                    break;
+            }
+        }
+    }
+
+    flag_set = DEF_BIT_IS_SET(flags, DNSc_FLAG_FORCE_CACHE);
+    if (flag_set == DEF_YES) {
+        status = DNScCache_Srch(p_host_name, p_addrs, addr_nbr, p_addr_nbr, flags, p_err);
+        goto exit;
+    }
+
+
+    flag_set = DEF_BIT_IS_SET(flags, DNSc_FLAG_FORCE_RENEW);
+    if (flag_set == DEF_NO) {
+                                                                /* ---------- SRCH IN EXISTING CACHE ENTRIES ---------- */
+        status = DNScCache_Srch(p_host_name, p_addrs, addr_nbr, p_addr_nbr, flags, p_err);
+        switch (status) {
+            case DNSc_STATUS_PENDING:
+            case DNSc_STATUS_RESOLVED:
+                 goto exit;
+
+            case DNSc_STATUS_FAILED:
+                 break;
+
+            default:
+                *p_err = DNSc_ERR_FAULT;
+                 goto exit;
+        }
+
+    } else {
+        DNScCache_HostSrchRemove(p_host_name, p_err);
+    }
+
+                                                                /* ----------- ACQUIRE HOST OBJ FOR THE REQ ----------- */
+    p_host = DNScCache_HostObjGet(p_host_name, flags, p_cfg, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         status = DNSc_STATUS_FAILED;
+         goto exit;
+    }
+
+
+    status = DNScTask_HostResolve(p_host, flags, p_cfg, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+    switch (status) {
+        case DNSc_STATUS_PENDING:
+             goto exit;
+
+        case DNSc_STATUS_RESOLVED:
+        case DNSc_STATUS_UNKNOWN:
+             break;
+
+        case DNSc_STATUS_FAILED:
+             goto exit_free_host;
+
+        default:
+            *p_err = DNSc_ERR_FAULT;
+             goto exit;
+    }
+
+
+    status = DNScCache_Srch(p_host_name, p_addrs, addr_nbr, p_addr_nbr, flags, p_err);
+
+    goto exit;
+
+
+exit_free_host:
+    DNScCache_HostObjFree(p_host);
+
+exit:
+    return (status);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            DNSc_CacheClr()
+*
+* Description : Flush DNS cache.
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           RETURNED BY DNScCache_Clr():
+*                               See DNScCache_Clr() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  DNSc_CacheClrAll (DNSc_ERR  *p_err)
+{
+    DNScCache_Clr(p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DNSc_CacheClrHost()
+*
+* Description : Remove a host from the cache.
+*
+* Argument(s) : p_host_name Pointer to a string that contains the host name to remove from the cache.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               RETURNED BY DNScCache_HostSrchRemove():
+*                                   See DNScCache_HostSrchRemove() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNSc_CacheClrHost (CPU_CHAR  *p_host_name,
+                         DNSc_ERR  *p_err)
+{
+    DNScCache_HostSrchRemove(p_host_name, p_err);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c.h b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c.h
new file mode 100644
index 0000000..4f24052
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c.h
@@ -0,0 +1,398 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             DNS CLIENT
+*
+* Filename      : dns-c.h
+* Version       : V2.00.03
+* Programmer(s) : JDH
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) This file implements a basic DNS client based on RFC #1035.  It provides the
+*                     mechanism used to retrieve an IP address from a given host name.
+*
+*                 (2) Assumes the following versions (or more recent) of software modules are included
+*                     in the project build :
+*
+*                     (a) uC/TCP-IP V3.00
+*                     (b) uC/CPU    V1.22
+*                     (c) uC/LIB    V1.30
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This header file is protected from multiple pre-processor inclusion through use of the
+*               DNSc present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+
+#ifndef  DNSc_PRESENT                                           /* See Note #1.                                         */
+#define  DNSc_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         DNSc VERSION NUMBER
+*
+* Note(s) : (1) (a) The DNSc module software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The DNSc software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*/
+
+#define  DNSc_VERSION               20003u                      /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The DNSc module files are located in the following directories :
+*
+*               (a) \\dns-c_cfg.h
+*
+*               (b) \\Source\net_*.*
+*
+*               (c) \\Source\dns-c.h
+*                                 \dns-c.c
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for network protocol suite
+*                                                         directory path for DNSc module
+*
+*           (2) CPU-configuration software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) NO compiler-supplied standard library functions SHOULD be used.
+*
+*               (a) Standard library functions are implemented in the custom library module(s) :
+*
+*                       \\lib_*.*
+*
+*                           where
+*                                         directory path for custom library software
+*
+*           (4) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) '\\'   directory                            See Note #1b
+*
+*               (c) '\\' directory                                                See Note #1c
+*
+*               (d) (1) '\\'                  directory         See Note #2a
+*                   (2) '\\\\' directory         See Note #2b
+*
+*               (e) '\\' directory                            See Note #3a
+*********************************************************************************************************
+*/
+
+#include                                                 /* CPU Configuration              (see Note #2b)        */
+#include                                            /* CPU Core Library               (see Note #2a)        */
+
+#include                                             /* Standard        Defines        (see Note #3a)        */
+#include                                             /* Standard String Library        (see Note #3a)        */
+
+#include                                           /* DNSc Configuration File (see Note #1a)               */
+#include  "dns-c_type.h"
+#include  
+#include  
+
+#include                                          /* Network Protocol Suite         (see Note #1b)        */
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         CONFIGURATION ERROR
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  DNSc_CFG_MODE_ASYNC_EN
+    #error  "DNSc_CFG_MODE_ASYNC_EN not #define'd in 'dns-c_cfg.h' [MUST be  DEF_DISABLED ||  DEF_ENABLED ] "
+#elif  ((DNSc_CFG_MODE_ASYNC_EN != DEF_ENABLED ) && \
+        (DNSc_CFG_MODE_ASYNC_EN != DEF_DISABLED))
+    #error  "DNSc_CFG_MODE_ASYNC_EN not #define'd in 'dns-c_cfg.h' [MUST be  DEF_DISABLED ||  DEF_ENABLED ] "
+#endif
+
+#if  (DNSc_CFG_MODE_ASYNC_EN == DEF_ENABLED)
+    #define  DNSc_TASK_MODULE_EN
+
+    #ifndef  DNSc_CFG_MODE_BLOCK_EN
+        #error  "DNSc_CFG_MODE_BLOCK_EN not #define'd in 'dns-c_cfg.h' [MUST be  DEF_DISABLED ||  DEF_ENABLED ] "
+    #elif  ((DNSc_CFG_MODE_BLOCK_EN != DEF_ENABLED ) && \
+            (DNSc_CFG_MODE_BLOCK_EN != DEF_DISABLED))
+        #error  "DNSc_CFG_MODE_BLOCK_EN not #define'd in 'dns-c_cfg.h' [MUST be  DEF_DISABLED ||  DEF_ENABLED ] "
+    #endif
+
+    #if  (DNSc_CFG_MODE_BLOCK_EN == DEF_ENABLED)
+        #define  DNSc_SIGNAL_TASK_MODULE_EN
+    #endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            DEFINE ERROR
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  DNSc_DFLT_TASK_DLY_MS                 50u
+#define  DNSc_DFLT_REQ_RETRY_NBR_MAX            2u
+#define  DNSc_DFLT_REQ_RETRY_TIMEOUT_MS      1000u
+
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  enum  DNSc_err {
+    DNSc_ERR_NONE                =   1,
+    DNSc_ERR_MEM_ALLOC           =   2,
+    DNSc_ERR_FAULT               =   3,
+    DNSc_ERR_TASK_SIGNAL         =   3,
+    DNSc_ERR_FAULT_INIT          =   4,
+    DNSc_ERR_NULL_PTR            =   5,
+    DNSc_ERR_INVALID_ARG         =   6,
+    DNSc_ERR_INVALID_CFG         =   7,
+    DNSc_ERR_INVALID_SERVER      =   8,
+
+    DNSc_ERR_INVALID_HOST_NAME   =   9,
+
+
+    DNSc_ERR_CACHE_LOCK           = 30,
+    DNSc_ERR_CACHE_HOST_NOT_FOUND = 31,
+    DNSc_ERR_CACHE_HOST_PENDING   = 32,
+    DNSc_ERR_CACHE_HOST_FAILED    = 33,
+
+    DNSc_ERR_NO_SERVER           =  50,
+    DNSc_ERR_GIVING_UP           =  51,
+    DNSc_ERR_FMT                 =  52,
+    DNSc_ERR_SERVER_FAIL         =  53,
+    DNSc_ERR_NAME_NOT_EXIST      =  54,
+    DNSc_ERR_NOT_A_RESPONSE      =  55,
+    DNSc_ERR_RESOLUTION_FAIL     =  56,
+    DNSc_ERR_NO_RESPONSE         =  57,
+
+    DNSc_ERR_SOCK_OPEN_FAIL      =  70,
+    DNSc_ERR_SOCK_CONN_FAIL      =  71,
+
+    DNSc_ERR_TX                  =  90,
+    DNSc_ERR_TX_FAULT            =  91,
+    DNSc_ERR_RX                  =  92,
+    DNSc_ERR_RX_FAULT            =  93,
+
+    DNSc_ERR_BUF_LEN             = 110,
+    DNSc_ERR_IF_LINK_DOWN        = 111,
+    DNSc_ERR_IF_LINK_INVALID     = 112,
+
+
+    DNSc_ERR_BAD_RESPONSE_TYPE   = 130,
+    DNSc_ERR_BAD_QUESTION_COUNT  = 131,
+    DNSc_ERR_BAD_ANSWER_COUNT    = 132,
+    DNSc_ERR_BAD_RESPONSE_ID     = 133,
+    DNSc_ERR_BAD_REQUEST_TYPE    = 134,
+
+
+    DNSc_ERR_LAST                = 150,
+    DNSc_ERR_INVALID_ID          = 151,
+    DNSc_ERR_ADDR_INVALID        = 152,
+
+} DNSc_ERR;
+
+
+typedef  enum DNSc_state {
+    DNSc_STATE_FREE = 0,
+    DNSc_STATE_INIT_REQ,
+    DNSc_STATE_IF_SEL,
+    DNSc_STATE_TX_REQ_IPv4,
+    DNSc_STATE_RX_RESP_IPv4,
+    DNSc_STATE_TX_REQ_IPv6,
+    DNSc_STATE_RX_RESP_IPv6,
+    DNSc_STATE_RESOLVED,
+    DNSc_STATE_FAILED,
+} DNSc_STATE;
+
+
+typedef  enum  DNSc_status {
+    DNSc_STATUS_PENDING,
+    DNSc_STATUS_RESOLVED,
+    DNSc_STATUS_FAILED,
+    DNSc_STATUS_UNKNOWN,
+    DNSc_STATUS_NONE,
+} DNSc_STATUS;
+
+
+
+#ifdef  NET_IPv6_MODULE_EN
+#define  DNSc_ADDR_SIZE   NET_IPv6_ADDR_LEN
+#else
+#define  DNSc_ADDR_SIZE   NET_IPv4_ADDR_LEN
+#endif
+
+typedef  CPU_INT08U   DNSc_FLAGS;
+
+#define  DNSc_FLAG_NONE              DEF_BIT_NONE
+#define  DNSc_FLAG_NO_BLOCK          DEF_BIT_00
+#define  DNSc_FLAG_FORCE_CACHE       DEF_BIT_01
+#define  DNSc_FLAG_FORCE_RENEW       DEF_BIT_02
+#define  DNSc_FLAG_FORCE_RESOLUTION  DEF_BIT_03
+#define  DNSc_FLAG_IPv4_ONLY         DEF_BIT_04
+#define  DNSc_FLAG_IPv6_ONLY         DEF_BIT_05
+
+
+typedef  struct  dnsc_ip_addr {
+    CPU_INT08U  Addr[DNSc_ADDR_SIZE];
+    CPU_INT08U  Len;
+} DNSc_ADDR_OBJ;
+
+typedef  struct  DNSc_addr_item   DNSc_ADDR_ITEM;
+
+struct  DNSc_addr_item {
+    DNSc_ADDR_OBJ   *AddrPtr;
+    DNSc_ADDR_ITEM  *NextPtr;
+};
+
+
+#define  DNSc_QUERY_ID_NONE     0u
+
+typedef  struct  DNSc_req_cfg {
+    DNSc_ADDR_OBJ  *ServerAddrPtr;
+    NET_PORT_NBR    ServerPort;
+    CPU_INT16U      TaskDly_ms;
+    CPU_INT16U      ReqTimeout_ms;
+    CPU_INT08U      ReqRetry;
+} DNSc_REQ_CFG;
+
+
+typedef  struct  DNSc_host {
+    CPU_CHAR        *NamePtr;
+    CPU_INT16U       NameLenMax;
+    DNSc_STATE       State;
+    DNSc_ADDR_ITEM  *AddrsFirstPtr;
+    DNSc_ADDR_ITEM  *AddrsEndPtr;
+    CPU_INT08U       AddrsCount;
+    CPU_INT08U       AddrsIPv4Count;
+    CPU_INT08U       AddrsIPv6Count;
+    CPU_INT08U       ReqCtr;
+    NET_SOCK_ID      SockID;
+    NET_IF_NBR       IF_Nbr;
+    CPU_INT16U       QueryID;
+    NET_TS_MS        TS_ms;
+    DNSc_REQ_CFG    *ReqCfgPtr;
+#ifdef  DNSc_SIGNAL_TASK_MODULE_EN
+    KAL_SEM_HANDLE   TaskSignal;
+#endif
+} DNSc_HOST_OBJ;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void         DNSc_Init            (const  DNSc_CFG       *p_cfg,
+                                   const  DNSc_CFG_TASK  *p_task_cfg,
+                                          DNSc_ERR       *p_err);
+
+void         DNSc_CfgServerByStr  (       CPU_CHAR       *p_server,
+                                          DNSc_ERR       *p_err);
+
+void         DNSc_CfgServerByAddr (       DNSc_ADDR_OBJ  *p_addr,
+                                          DNSc_ERR       *p_err);
+
+void         DNSc_GetServerByStr  (       CPU_CHAR       *p_str,
+                                          CPU_INT08U      str_len_max,
+                                          DNSc_ERR       *p_err);
+
+void         DNSc_GetServerByAddr (       DNSc_ADDR_OBJ  *p_addr,
+                                          DNSc_ERR       *p_err);
+
+DNSc_STATUS  DNSc_GetHost         (       CPU_CHAR       *p_host_name,
+                                          DNSc_ADDR_OBJ  *p_addrs,
+                                          CPU_INT08U     *p_addr_nbr,
+                                          DNSc_FLAGS      flags,
+                                          DNSc_REQ_CFG   *p_cfg,
+                                          DNSc_ERR       *p_err);
+
+void         DNSc_CacheClrAll     (       DNSc_ERR       *p_err);
+
+void         DNSc_CacheClrHost    (       CPU_CHAR       *p_host_name,
+                                          DNSc_ERR       *p_err);
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_cache.c b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_cache.c
new file mode 100644
index 0000000..29c7c3d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_cache.c
@@ -0,0 +1,2095 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       DNS CLIENT CACHE MODULE
+*
+* Filename      : dns-c_cache.c
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This file implements a basic DNS client based on RFC #1035.  It provides the
+*                     mechanism used to retrieve an IP address from a given host name.
+*
+*                 (2) Assumes the following versions (or more recent) of software modules are included
+*                     in the project build :
+*
+*                     (a) uC/LIB V1.37
+*                     (b) uC/Common-KAL V1.00.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "dns-c_cache.h"
+#include  "dns-c_req.h"
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static        KAL_LOCK_HANDLE  DNScCache_LockHandle;
+
+static        MEM_DYN_POOL     DNScCache_ItemPool;
+static        MEM_DYN_POOL     DNScCache_HostObjPool;
+static        MEM_DYN_POOL     DNScCache_HostNamePool;
+static        MEM_DYN_POOL     DNScCache_AddrItemPool;
+static        MEM_DYN_POOL     DNScCache_AddrObjPool;
+
+static        DNSc_CACHE_ITEM  *DNSc_CacheItemListHead;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void              DNScCache_LockAcquire      (       DNSc_ERR         *p_err);
+
+static  void              DNScCache_LockRelease      (void);
+
+
+static  void              DNScCache_HostRemoveHandler(       DNSc_HOST_OBJ   *p_host);
+
+static  void              DNScCache_HostObjNameSet   (       DNSc_HOST_OBJ   *p_host,
+                                                             CPU_CHAR        *p_host_name,
+                                                             DNSc_ERR        *p_err);
+
+static  DNSc_HOST_OBJ    *DNScCache_HostSrchByName   (       CPU_CHAR         *p_host_name);
+
+static  CPU_BOOLEAN       DNScCache_HostNameCmp      (       DNSc_HOST_OBJ    *p_host,
+                                                             CPU_CHAR         *p_host_name);
+
+static  DNSc_CACHE_ITEM  *DNScCache_ItemGet          (       DNSc_ERR         *p_err);
+
+static  void              DNScCache_ItemFree         (       DNSc_CACHE_ITEM  *p_cache);
+
+static  DNSc_HOST_OBJ    *DNScCache_ItemHostGet      (       void);
+
+static  void              DNScCache_ItemRelease      (       DNSc_CACHE_ITEM  *p_cache);
+
+static  void              DNScCache_ItemRemove       (       DNSc_CACHE_ITEM  *p_cache);
+
+static  DNSc_ADDR_ITEM   *DNScCache_AddrItemGet      (       DNSc_ERR         *p_err);
+
+static  void              DNScCache_AddrItemFree     (       DNSc_ADDR_ITEM   *p_item);
+
+static  void              DNScCache_HostRelease      (       DNSc_HOST_OBJ    *p_host);
+
+static  void              DNScCache_HostAddrClr      (       DNSc_HOST_OBJ    *p_host);
+
+static  DNSc_STATUS       DNScCache_Resolve          (const  DNSc_CFG         *p_cfg,
+                                                             DNSc_HOST_OBJ    *p_host,
+                                                             DNSc_ERR         *p_err);
+
+static  void              DNScCache_Req              (       DNSc_HOST_OBJ    *p_host,
+                                                             DNSc_ERR         *p_err);
+
+static  DNSc_STATUS       DNScCache_Resp             (const  DNSc_CFG         *p_cfg,
+                                                             DNSc_HOST_OBJ    *p_host,
+                                                             DNSc_ERR         *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                           DNScCache_Init()
+*
+* Description : Initialize cache module.
+*
+* Argument(s) : p_cfg   Pointer to DNSc's configuration.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE           Cache module successfully initialized.
+*                           DNSc_ERR_MEM_ALLOC      Memory allocation error.
+*                           DNSc_ERR_FAULT_INIT     Fault during OS object initialization.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNSc_Init().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScCache_Init (const  DNSc_CFG  *p_cfg,
+                             DNSc_ERR  *p_err)
+{
+    CPU_SIZE_T  nb_addr;
+    LIB_ERR     err;
+    KAL_ERR     kal_err;
+
+
+    DNScCache_LockHandle = KAL_LockCreate("DNSc Lock",
+                                         KAL_OPT_CREATE_NONE,
+                                         &kal_err);
+    switch (kal_err) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = DNSc_ERR_MEM_ALLOC;
+             goto exit;
+
+        default:
+            *p_err = DNSc_ERR_FAULT_INIT;
+             goto exit;
+    }
+
+
+    Mem_DynPoolCreate("DNSc Cache Item Pool",
+                      &DNScCache_ItemPool,
+                       p_cfg->MemSegPtr,
+                       sizeof(DNSc_CACHE_ITEM),
+                       sizeof(CPU_ALIGN),
+                       1u,
+                       p_cfg->CacheEntriesMaxNbr,
+                      &err);
+    if (err != LIB_MEM_ERR_NONE) {
+       *p_err = DNSc_ERR_MEM_ALLOC;
+        goto exit;
+    }
+
+    DNSc_CacheItemListHead = DEF_NULL;
+
+
+    Mem_DynPoolCreate("DNSc Cache Host Obj Pool",
+                      &DNScCache_HostObjPool,
+                       p_cfg->MemSegPtr,
+                       sizeof(DNSc_HOST_OBJ),
+                       sizeof(CPU_ALIGN),
+                       1u,
+                       p_cfg->CacheEntriesMaxNbr,
+                      &err);
+    if (err != LIB_MEM_ERR_NONE) {
+       *p_err = DNSc_ERR_MEM_ALLOC;
+        goto exit;
+    }
+
+    Mem_DynPoolCreate("DNSc Cache Host Obj Pool",
+                      &DNScCache_HostNamePool,
+                       p_cfg->MemSegPtr,
+                       p_cfg->HostNameLenMax,
+                       sizeof(CPU_ALIGN),
+                       1u,
+                       p_cfg->CacheEntriesMaxNbr,
+                      &err);
+    if (err != LIB_MEM_ERR_NONE) {
+       *p_err = DNSc_ERR_MEM_ALLOC;
+        goto exit;
+    }
+
+
+    nb_addr = 0u;
+#ifdef  NET_IPv4_MODULE_EN
+    nb_addr += p_cfg->AddrIPv4MaxPerHost;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    nb_addr += p_cfg->AddrIPv6MaxPerHost;
+#endif
+    nb_addr *= p_cfg->CacheEntriesMaxNbr;
+
+    Mem_DynPoolCreate("DNSc Cache Addr Item Pool",
+                      &DNScCache_AddrItemPool,
+                       p_cfg->MemSegPtr,
+                       sizeof(DNSc_ADDR_ITEM),
+                       sizeof(CPU_ALIGN),
+                       1u,
+                       nb_addr,
+                      &err);
+    if (err != LIB_MEM_ERR_NONE) {
+       *p_err = DNSc_ERR_MEM_ALLOC;
+        goto exit;
+    }
+
+    nb_addr++;
+
+    Mem_DynPoolCreate("DNSc Cache Addr Obj Pool",
+                      &DNScCache_AddrObjPool,
+                       p_cfg->MemSegPtr,
+                       sizeof(DNSc_ADDR_OBJ),
+                       sizeof(CPU_ALIGN),
+                       1u,
+                       nb_addr,
+                      &err);
+    if (err != LIB_MEM_ERR_NONE) {
+       *p_err = DNSc_ERR_MEM_ALLOC;
+        goto exit;
+    }
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            DNScCache_Clr()
+*
+* Description : Clear all elements of the cache.
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE   Cache successfully cleared.
+*
+*                           RETURNED BY DNScCache_LockAcquire():
+*                               See DNScCache_LockAcquire() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNSc_CacheClrAll().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScCache_Clr (DNSc_ERR  *p_err)
+{
+    DNSc_CACHE_ITEM  *p_cache = DNSc_CacheItemListHead;
+    DNSc_CACHE_ITEM  *p_cache_next;
+
+
+    DNScCache_LockAcquire(p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+
+    while (p_cache != DEF_NULL) {
+        p_cache_next = p_cache->NextPtr;
+        switch (p_cache->HostPtr->State) {
+            case DNSc_STATE_INIT_REQ:
+            case DNSc_STATE_TX_REQ_IPv4:
+            case DNSc_STATE_RX_RESP_IPv4:
+            case DNSc_STATE_TX_REQ_IPv6:
+            case DNSc_STATE_RX_RESP_IPv6:
+                 break;
+
+            case DNSc_STATE_FREE:
+            case DNSc_STATE_RESOLVED:
+            case DNSc_STATE_FAILED:
+            default:
+                 DNScCache_ItemRelease(p_cache);
+                 break;
+        }
+
+        p_cache = p_cache_next;
+    }
+
+   *p_err = DNSc_ERR_NONE;
+
+    DNScCache_LockRelease();
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_HostInsert()
+*
+* Description : Add an entry in the cache.
+*
+* Argument(s) : p_host  Pointer to host object.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE   Host successfully inserted.
+*
+*                           RETURNED BY DNScCache_LockAcquire():
+*                               See DNScCache_LockAcquire() for additional return error codes.
+*
+*                           RETURNED BY DNScCache_ItemGet():
+*                               See DNScCache_ItemGet() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScTask_ResolveHost().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScCache_HostInsert (DNSc_HOST_OBJ  *p_host,
+                            DNSc_ERR       *p_err)
+{
+    DNSc_CACHE_ITEM  *p_cache;
+
+
+    DNScCache_LockAcquire(p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+    p_cache = DNScCache_ItemGet(p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit_release;
+    }
+
+    p_cache->HostPtr = p_host;
+
+    if (DNSc_CacheItemListHead == DEF_NULL) {
+        p_cache->NextPtr        = DEF_NULL;
+        DNSc_CacheItemListHead  = p_cache;
+    } else {
+        p_cache->NextPtr        = DNSc_CacheItemListHead;
+        DNSc_CacheItemListHead  = p_cache;
+    }
+
+   *p_err = DNSc_ERR_NONE;
+
+exit_release:
+    DNScCache_LockRelease();
+
+exit:
+    return;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                      DNScCache_HostSrchRemove()
+*
+* Description : Search host name in cache and remove it.
+*
+* Argument(s) : p_host_name     Pointer to a string that contains the host name.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   DNSc_ERR_NONE                   Host removed
+*                                   DNSc_ERR_CACHE_HOST_NOT_FOUND   Host not found in the cache.
+*
+*                                   RETURNED BY DNScCache_LockAcquire():
+*                                       See DNScCache_LockAcquire() for additional return error codes.
+*
+*                                   RETURNED BY DNScCache_HostSrchByName():
+*                                       See DNScCache_HostSrchByName() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNSc_CacheClrHost(),
+*               DNSc_GetHost().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScCache_HostSrchRemove (CPU_CHAR  *p_host_name,
+                                DNSc_ERR  *p_err)
+{
+    DNSc_HOST_OBJ  *p_host;
+
+
+    DNScCache_LockAcquire(p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+
+    p_host = DNScCache_HostSrchByName(p_host_name);
+    if (p_host != DEF_NULL) {
+        switch(p_host->State) {
+            case DNSc_STATE_TX_REQ_IPv4:
+            case DNSc_STATE_RX_RESP_IPv4:
+            case DNSc_STATE_TX_REQ_IPv6:
+            case DNSc_STATE_RX_RESP_IPv6:
+                *p_err  = DNSc_ERR_CACHE_HOST_PENDING;
+                 goto exit_release;
+
+            case DNSc_STATE_RESOLVED:
+            case DNSc_STATE_FAILED:
+            default:
+                *p_err  = DNSc_ERR_NONE;
+                 DNScCache_HostRemoveHandler(p_host);
+                 goto exit_release;
+        }
+    }
+
+   *p_err  = DNSc_ERR_CACHE_HOST_NOT_FOUND;                     /* Not found.                                           */
+
+    goto exit_release;
+
+
+exit_release:
+    DNScCache_LockRelease();
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_HostRemove()
+*
+* Description : Remove host from the cache.
+*
+* Argument(s) : p_host  Pointer to the host object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScTask_HostResolve().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScCache_HostRemove (DNSc_HOST_OBJ  *p_host)
+{
+    DNSc_ERR          err;
+
+    DNScCache_LockAcquire(&err);
+    if (err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+    DNScCache_HostRemoveHandler(p_host);
+
+    DNScCache_LockRelease();
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DNScCache_Srch()
+*
+* Description : Search host in cache and return IP addresses, if found.
+*
+* Argument(s) : p_host_name         Pointer to a string that contains the host name.
+*
+*               p_addrs             Pointer to addresses array.
+*
+*               addr_nbr_max        Number of address the address array can contains.
+*
+*               p_addr_nbr_rtn      Pointer to a variable that will receive number of addresses copied.
+*
+*               flags           DNS client flag:
+*
+*                                   DNSc_FLAG_NONE              By default all IP address can be returned.
+*                                   DNSc_FLAG_IPv4_ONLY         Return only IPv4 address(es).
+*                                   DNSc_FLAG_IPv6_ONLY         Return only IPv6 address(es).
+*
+*               p_err               Pointer to variable that will receive the return error code from this function :
+*
+*                                       DNSc_ERR_NONE                   Host found.
+*                                       DNSc_ERR_CACHE_HOST_PENDING     Host resolution is pending.
+*                                       DNSc_ERR_CACHE_HOST_NOT_FOUND   Host not found in the cache.
+*
+*                                       RETURNED BY DNScCache_LockAcquire():
+*                                           See DNScCache_LockAcquire() for additional return error codes.
+*
+* Return(s)   : Resolution status:
+*                       DNSc_STATUS_PENDING         Host resolution is pending, call again to see the status. (Processed by DNSc's task)
+*                       DNSc_STATUS_RESOLVED        Host is resolved.
+*                       DNSc_STATUS_FAILED          Host resolution has failed.
+*
+* Caller(s)   : DNSc_GetHost().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+DNSc_STATUS  DNScCache_Srch (CPU_CHAR       *p_host_name,
+                             DNSc_ADDR_OBJ  *p_addrs,
+                             CPU_INT08U      addr_nbr_max,
+                             CPU_INT08U     *p_addr_nbr_rtn,
+                             DNSc_FLAGS      flags,
+                             DNSc_ERR       *p_err)
+{
+    CPU_INT08U       i       = 0u;
+    DNSc_HOST_OBJ   *p_host  = DEF_NULL;
+    DNSc_ADDR_OBJ   *p_addr  = DEF_NULL;
+    DNSc_ADDR_ITEM  *p_item  = DEF_NULL;
+    DNSc_STATUS      status  = DNSc_STATUS_FAILED;
+    CPU_BOOLEAN      no_ipv4 = DEF_BIT_IS_SET(flags, DNSc_FLAG_IPv6_ONLY);
+    CPU_BOOLEAN      no_ipv6 = DEF_BIT_IS_SET(flags, DNSc_FLAG_IPv4_ONLY);
+
+
+   *p_addr_nbr_rtn = 0u;
+
+    DNScCache_LockAcquire(p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+
+    p_host = DNScCache_HostSrchByName(p_host_name);
+    if (p_host != DEF_NULL) {
+        switch(p_host->State) {
+            case DNSc_STATE_TX_REQ_IPv4:
+            case DNSc_STATE_RX_RESP_IPv4:
+            case DNSc_STATE_TX_REQ_IPv6:
+            case DNSc_STATE_RX_RESP_IPv6:
+                 status = DNSc_STATUS_PENDING;
+                *p_err  = DNSc_ERR_CACHE_HOST_PENDING;
+                 goto exit_release;
+
+            case DNSc_STATE_RESOLVED:
+                 status = DNSc_STATUS_RESOLVED;
+                 goto exit_found;
+
+            case DNSc_STATE_FAILED:
+            default:
+                *p_err  = DNSc_ERR_NONE;
+                 goto exit_release;
+        }
+    }
+
+   *p_err  = DNSc_ERR_CACHE_HOST_NOT_FOUND;                     /* Not found.                                           */
+
+    goto exit_release;
+
+
+exit_found:
+
+    p_item = p_host->AddrsFirstPtr;
+
+    for (i = 0u; i < p_host->AddrsCount; i++) {                 /* Copy Addresses                                       */
+        p_addr = p_item->AddrPtr;
+        if (*p_addr_nbr_rtn < addr_nbr_max) {
+            CPU_BOOLEAN  add_addr = DEF_YES;
+
+
+            switch (p_addr->Len) {
+                case NET_IPv4_ADDR_SIZE:
+                     if (no_ipv4 == DEF_YES) {
+                         add_addr = DEF_NO;
+                     }
+                     break;
+
+                case NET_IPv6_ADDR_SIZE:
+                     if (no_ipv6 == DEF_YES) {
+                         add_addr = DEF_NO;
+                     }
+                     break;
+
+                default:
+                     add_addr = DEF_NO;
+                     break;
+            }
+
+            if (add_addr == DEF_YES) {
+                p_addrs[*p_addr_nbr_rtn] = *p_addr;
+               *p_addr_nbr_rtn += 1u;
+            }
+
+            p_item = p_item->NextPtr;
+
+        } else {
+            goto exit_release;
+        }
+    }
+
+   (void)&p_addr_nbr_rtn;
+
+   *p_err = DNSc_ERR_NONE;
+
+exit_release:
+    DNScCache_LockRelease();
+
+
+exit:
+    return (status);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_HostObjGet()
+*
+* Description : Get a free host object.
+*
+* Argument(s) : p_host_name     Pointer to a string that contains the domain name.
+*
+*               flags           DNS client flag:
+*
+*                                   DNSc_FLAG_NONE              By default this function is blocking.
+*                                   DNSc_FLAG_NO_BLOCK          Don't block (only possible if DNSc's task is enabled).
+*                                   DNSc_FLAG_FORCE_CACHE       Take host from the cache, don't send new DNS request.
+*                                   DNSc_FLAG_FORCE_RENW       Force DNS request, remove existing entry in the cache.
+*
+*               p_cfg           Pointer to a request configuration. Should be set to overwrite default DNS configuration
+*                               (such as DNS server, request timeout, etc.). Must be set to DEF_NULL to use default
+*                               configuration.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   DNSc_ERR_NONE           Successfully acquired a host object.
+*                                   DNSc_ERR_MEM_ALLOC      Not able to allocate a host object.
+*
+*                                   RETURNED BY DNScCache_LockAcquire():
+*                                       See DNScCache_LockAcquire() for additional return error codes.
+*
+*                                   RETURNED BY DNScCache_HostObjNameSet():
+*                                       See DNScCache_HostObjNameSet() for additional return error codes.
+*
+* Return(s)   : Pointer to the host object acquired.
+*
+* Caller(s)   : DNSc_GetHost().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+DNSc_HOST_OBJ  *DNScCache_HostObjGet (CPU_CHAR      *p_host_name,
+                                      DNSc_FLAGS     flags,
+                                      DNSc_REQ_CFG  *p_cfg,
+                                      DNSc_ERR      *p_err)
+{
+#ifdef DNSc_SIGNAL_TASK_MODULE_EN
+    KAL_SEM_HANDLE   sem    = KAL_SemHandleNull;
+#endif
+    DNSc_HOST_OBJ   *p_host = DEF_NULL;
+    LIB_ERR          err;
+
+
+    DNScCache_LockAcquire(p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+
+                                                                /* ---------- ACQUIRE SIGNAL TASK SEMAPHORE ----------- */
+#ifdef DNSc_SIGNAL_TASK_MODULE_EN
+    if (DEF_BIT_IS_SET(flags, DNSc_FLAG_NO_BLOCK) == DEF_NO) {
+        KAL_ERR  kal_err;
+
+
+        sem = KAL_SemCreate("DNSc Block Task Signal", DEF_NULL, &kal_err);
+        if (kal_err != KAL_ERR_NONE) {
+            *p_err = DNSc_ERR_MEM_ALLOC;
+             goto exit;
+        }
+    }
+#endif
+
+
+
+    p_host = (DNSc_HOST_OBJ *)Mem_DynPoolBlkGet(&DNScCache_HostObjPool, &err);
+    if (err == LIB_MEM_ERR_NONE) {
+        p_host->NamePtr = (CPU_CHAR *)Mem_DynPoolBlkGet(&DNScCache_HostNamePool, &err);
+        if (err != LIB_MEM_ERR_NONE) {
+            *p_err = DNSc_ERR_MEM_ALLOC;
+             goto exit_free_host_obj;
+        }
+
+    } else {
+        p_host = DNScCache_ItemHostGet();
+    }
+
+    if (p_host == DEF_NULL) {
+       *p_err = DNSc_ERR_MEM_ALLOC;
+        goto exit_release;
+    }
+
+    if (p_host->NamePtr == DEF_NULL) {
+        p_host->NameLenMax = DNScCache_HostNamePool.BlkSize - 1;
+    }
+
+    p_host->NameLenMax = DNScCache_HostNamePool.BlkSize;
+    Mem_Clr(p_host->NamePtr, p_host->NameLenMax);
+    p_host->IF_Nbr         = NET_IF_NBR_WILDCARD;
+    p_host->AddrsCount     = 0u;
+    p_host->AddrsIPv4Count = 0u;
+    p_host->AddrsIPv6Count = 0u;
+    p_host->AddrsFirstPtr  = DEF_NULL;
+    p_host->AddrsEndPtr    = DEF_NULL;
+
+#ifdef DNSc_SIGNAL_TASK_MODULE_EN
+    p_host->TaskSignal = sem;
+#endif
+
+    p_host->State      = DNSc_STATE_INIT_REQ;
+    p_host->ReqCfgPtr  = p_cfg;
+
+    DNScCache_HostObjNameSet(p_host, p_host_name, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit_release;
+    }
+
+    goto exit_release;
+
+
+exit_free_host_obj:
+     Mem_DynPoolBlkFree(&DNScCache_HostObjPool, p_host, &err);
+
+exit_release:
+    DNScCache_LockRelease();
+
+exit:
+    return (p_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_HostObjFree()
+*
+* Description : Free a host object.
+*
+* Argument(s) : p_host  Pointer to the host object to free.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_HostRelease(),
+*               DNSc_GetHost().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScCache_HostObjFree (DNSc_HOST_OBJ  *p_host)
+{
+    LIB_ERR          err;
+
+
+#ifdef DNSc_SIGNAL_TASK_MODULE_EN
+    if (p_host->TaskSignal.SemObjPtr != KAL_SemHandleNull.SemObjPtr) {
+        KAL_ERR  kal_err;
+
+
+        KAL_SemDel(p_host->TaskSignal, &kal_err);
+    }
+
+    p_host->TaskSignal = KAL_SemHandleNull;
+#endif
+
+
+    DNScCache_HostAddrClr(p_host);
+    Mem_DynPoolBlkFree(&DNScCache_HostNamePool, p_host->NamePtr, &err);
+    Mem_DynPoolBlkFree(&DNScCache_HostObjPool,  p_host,          &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      DNScCache_HostAddrInsert()
+*
+* Description : Insert address object in the addresses list of the host object.
+*
+* Argument(s) : p_cfg   Pointer to DNSc's configuration.
+*
+*               p_host  Pointer to the host object.
+*
+*               p_addr  Pointer to the address object (must be acquired with cache module)
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE       Address successfully added.
+*                           DNSc_ERR_MEM_ALLOC  Unable to insert the IP address due to the memory configuration
+*                           DNSc_ERR_FAULT      Unknown error (should not occur)
+*
+*                           RETURNED BY DNScCache_AddrItemGet():
+*                               See DNScCache_AddrItemGet() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScReq_RxRespAddAddr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScCache_HostAddrInsert (const  DNSc_CFG       *p_cfg,
+                                       DNSc_HOST_OBJ  *p_host,
+                                       DNSc_ADDR_OBJ  *p_addr,
+                                       DNSc_ERR       *p_err)
+{
+    DNSc_ADDR_ITEM  *p_item_cur;
+
+
+    switch (p_addr->Len) {
+        case NET_IPv4_ADDR_SIZE:
+             if (p_host->AddrsIPv4Count >= p_cfg->AddrIPv4MaxPerHost) {
+                 *p_err = DNSc_ERR_MEM_ALLOC;
+                 goto exit;
+             }
+             break;
+
+
+        case NET_IPv6_ADDR_SIZE:
+             if (p_host->AddrsIPv6Count >= p_cfg->AddrIPv6MaxPerHost) {
+                *p_err = DNSc_ERR_MEM_ALLOC;
+                 goto exit;
+             }
+             break;
+
+        default:
+            *p_err = DNSc_ERR_FAULT;
+             goto exit;
+    }
+
+    p_item_cur = DNScCache_AddrItemGet(p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+
+    p_item_cur->AddrPtr = p_addr;
+
+    if (p_host->AddrsFirstPtr == DEF_NULL) {
+        p_host->AddrsFirstPtr = p_item_cur;
+        p_host->AddrsEndPtr   = p_item_cur;
+
+    } else {
+        p_host->AddrsEndPtr->NextPtr = p_item_cur;
+        p_host->AddrsEndPtr          = p_item_cur;
+    }
+
+    switch (p_addr->Len) {
+        case NET_IPv4_ADDR_SIZE:
+             p_host->AddrsIPv4Count++;
+             break;
+
+
+        case NET_IPv6_ADDR_SIZE:
+             p_host->AddrsIPv6Count++;
+             break;
+
+        default:
+            *p_err = DNSc_ERR_FAULT;
+             goto exit;
+    }
+
+    p_host->AddrsCount++;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_AddrObjGet()
+*
+* Description : Acquire an address object that can be inserted in host list afterward.
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE   Successfully acquired an address object.
+*                           DNSc_ERR_MEM_ALLOC  Unable to acquire an address object.
+*
+* Return(s)   : Pointer to the address object acquired, if no error.
+*
+*               DEF_NULL, otherwise
+*
+* Caller(s)   : DNScReq_RxRespAddAddr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+DNSc_ADDR_OBJ  *DNScCache_AddrObjGet (DNSc_ERR  *p_err)
+{
+    DNSc_ADDR_OBJ  *p_addr = DEF_NULL;
+    LIB_ERR         err;
+
+
+    p_addr = (DNSc_ADDR_OBJ *)Mem_DynPoolBlkGet(&DNScCache_AddrObjPool, &err);
+    if (err != LIB_MEM_ERR_NONE) {
+       *p_err = DNSc_ERR_MEM_ALLOC;
+        goto exit;
+    }
+
+    Mem_Clr(p_addr, sizeof(DNSc_ADDR_OBJ));
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return (p_addr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_AddrObjFree()
+*
+* Description : Free an address object
+*
+* Argument(s) : p_addr  Pointer to address object to free.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_AddrItemFree(),
+*               DNScReq_RxRespAddAddr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScCache_AddrObjFree (DNSc_ADDR_OBJ  *p_addr)
+{
+    LIB_ERR  err;
+
+
+    Mem_DynPoolBlkFree(&DNScCache_AddrObjPool, p_addr, &err);
+   (void)&err;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_AddrObjSet()
+*
+* Description : Set address object from IP string.
+*
+* Argument(s) : p_addr      Pointer to the address object.
+*
+*               p_str_addr  Pointer to the string that contains the IP address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               DNSc_ERR_NONE           Address successfully set.
+*                               DNSc_ERR_ADDR_INVALID   Invalid IP address.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScReq_ServerInit(),
+*               DNSc_CfgServerByStr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScCache_AddrObjSet (DNSc_ADDR_OBJ  *p_addr,
+                            CPU_CHAR       *p_str_addr,
+                            DNSc_ERR       *p_err)
+{
+    NET_IP_ADDR_FAMILY  ip_addr_family;
+    NET_ERR             net_err;
+
+
+    ip_addr_family = NetASCII_Str_to_IP(         p_str_addr,
+                                        (void *)&p_addr->Addr,
+                                                 sizeof(p_addr->Addr),
+                                                &net_err);
+    if (net_err != NET_ASCII_ERR_NONE) {
+        *p_err = DNSc_ERR_ADDR_INVALID;
+         goto exit;
+    }
+
+    switch (ip_addr_family) {
+        case NET_IP_ADDR_FAMILY_IPv4:
+             p_addr->Len = NET_IPv4_ADDR_SIZE;
+             break;
+
+        case NET_IP_ADDR_FAMILY_IPv6:
+             p_addr->Len = NET_IPv6_ADDR_SIZE;
+             break;
+
+        default:
+            *p_err = DNSc_ERR_ADDR_INVALID;
+             goto exit;
+    }
+
+   *p_err = DNSc_ERR_NONE;
+
+    exit:
+        return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_ResolveHost()
+*
+* Description : Launch resolution of an host.
+*
+* Argument(s) : p_cfg   Pointer to DNSc's configuration.
+*
+*               p_host  Pointer to the host object.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           RETURNED BY DNScCache_LockAcquire():
+*                               See DNScCache_LockAcquire() for additional return error codes.
+*
+*                           RETURNED BY DNScCache_Resolve():
+*                               See DNScCache_Resolve() for additional return error codes.
+*
+* Return(s)   : Resolution status:
+*                       DNSc_STATUS_PENDING         Host resolution is pending, call again to see the status. (Processed by DNSc's task)
+*                       DNSc_STATUS_RESOLVED        Host is resolved.
+*                       DNSc_STATUS_FAILED          Host resolution has failed.
+*
+* Caller(s)   : DNScTask().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+DNSc_STATUS  DNScCache_ResolveHost (const  DNSc_CFG       *p_cfg,
+                                           DNSc_HOST_OBJ  *p_host,
+                                           DNSc_ERR       *p_err)
+{
+    DNSc_STATUS  status;
+
+
+    DNScCache_LockAcquire(p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+
+    status = DNScCache_Resolve(p_cfg, p_host, p_err);
+
+    DNScCache_LockRelease();
+
+
+exit:
+    return (status);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_ResolveAll()
+*
+* Description : Launch resolution on all entries that are pending in the cache.
+*
+* Argument(s) : p_cfg   Pointer to DNSc's configuration.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE   Resolution has been launched on all entries.
+*
+*                           RETURNED BY DNScCache_LockAcquire():
+*                               See DNScCache_LockAcquire() for additional return error codes.
+*
+* Return(s)   : Number of entries that are completed.
+*
+* Caller(s)   : DNScTask().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  DNScCache_ResolveAll (const  DNSc_CFG  *p_cfg,
+                                         DNSc_ERR  *p_err)
+{
+    DNSc_CACHE_ITEM  *p_item;
+    DNSc_HOST_OBJ    *p_host;
+    DNSc_STATUS       status;
+    CPU_INT16U        resolved_ctr = 0u;
+
+
+    DNScCache_LockAcquire(p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+
+    p_item = DNSc_CacheItemListHead;
+
+    while (p_item != DEF_NULL) {
+        p_host = p_item->HostPtr;
+
+        if (p_host->State != DNSc_STATE_RESOLVED) {
+            status = DNScCache_Resolve(p_cfg, p_host, p_err);
+            switch (status) {
+                case DNSc_STATUS_NONE:
+                case DNSc_STATUS_PENDING:
+                     break;
+
+                case DNSc_STATUS_RESOLVED:
+                case DNSc_STATUS_FAILED:
+                default:
+#ifdef  DNSc_SIGNAL_TASK_MODULE_EN
+                    if (KAL_SEM_HANDLE_IS_NULL(p_host->TaskSignal) != DEF_YES) {
+                        KAL_ERR  kal_err;
+
+
+                        KAL_SemPost(p_host->TaskSignal, KAL_OPT_NONE, &kal_err);
+                    }
+#endif
+                    resolved_ctr++;
+                    break;
+            }
+        }
+
+        p_item = p_item->NextPtr;
+    }
+
+
+   *p_err = DNSc_ERR_NONE;
+
+    DNScCache_LockRelease();
+
+
+exit:
+    return (resolved_ctr);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_LockAcquire()
+*
+* Description : Acquire lock on the cache list.
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE           Lock successfully acquired.
+*                           DNSc_ERR_CACHE_LOCK     Unable to acquire the lock.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_Clr(),
+*               DNScCache_HostInsert(),
+*               DNScCache_HostObjGet(),
+*               DNScCache_HostRemove(),
+*               DNScCache_HostSrchRemove(),
+*               DNScCache_ResolveAll(),
+*               DNScCache_ResolveHost(),
+*               DNScCache_Srch().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_LockAcquire (DNSc_ERR  *p_err)
+{
+    KAL_ERR  err;
+
+
+    KAL_LockAcquire(DNScCache_LockHandle, KAL_OPT_PEND_NONE, 0, &err);
+    if (err != KAL_ERR_NONE) {
+        *p_err = DNSc_ERR_CACHE_LOCK;
+         goto exit;
+    }
+
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_LockRelease()
+*
+* Description : Release cache list lock.
+*
+* Argument(s) : None.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_Clr(),
+*               DNScCache_HostInsert(),
+*               DNScCache_HostObjGet(),
+*               DNScCache_HostRemove(),
+*               DNScCache_HostSrchRemove(),
+*               DNScCache_ResolveAll(),
+*               DNScCache_ResolveHost(),
+*               DNScCache_Srch().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_LockRelease (void)
+{
+    KAL_ERR  err;
+
+
+    KAL_LockRelease(DNScCache_LockHandle, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     DNScCache_HostRemoveHandler()
+*
+* Description : Remove host from the cache.
+*
+* Argument(s) : p_host  Pointer to the host object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_HostRemove(),
+*               DNScCache_HostSrchRemove().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_HostRemoveHandler (DNSc_HOST_OBJ  *p_host)
+{
+    DNSc_CACHE_ITEM  *p_cache = DNSc_CacheItemListHead;
+
+
+    while (p_cache != DEF_NULL) {
+        if (p_cache->HostPtr == p_host) {
+            DNScCache_ItemRelease(p_cache);
+            goto exit;
+        }
+        p_cache = p_cache->NextPtr;
+    }
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      DNScCache_HostObjNameSet()
+*
+* Description : Set the name in host object.
+*
+* Argument(s) : p_host          Pointer to the host object to set.
+*
+*               p_host_name     Pointer to a string that contains the domain name.
+
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                               DNSc_ERR_NONE   Host name successfully set.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_HostObjGet().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_HostObjNameSet (DNSc_HOST_OBJ  *p_host,
+                                        CPU_CHAR       *p_host_name,
+                                        DNSc_ERR       *p_err)
+{
+     Str_Copy_N(p_host->NamePtr, p_host_name, p_host->NameLenMax);
+    *p_err = DNSc_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      DNScCache_HostSrchByName()
+*
+* Description : Search for an host in the cache from a host name string.
+*
+* Argument(s) : p_host_name     Pointer to a string that contains the domain name.
+*
+* Return(s)   : Pointer to the host object, if found.
+*
+*               DEF_NULL, Otherwise.
+*
+* Caller(s)   : DNScCache_HostSrchRemove(),
+*               DNScCache_Srch().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  DNSc_HOST_OBJ  *DNScCache_HostSrchByName (CPU_CHAR  *p_host_name)
+{
+    DNSc_HOST_OBJ    *p_host  = DEF_NULL;
+    DNSc_CACHE_ITEM  *p_cache = DNSc_CacheItemListHead;
+    CPU_BOOLEAN       match;
+
+
+    if (p_cache == DEF_NULL) {
+         goto exit;
+    }
+
+    while (p_cache != DEF_NULL) {
+        p_host = p_cache->HostPtr;
+        match  = DNScCache_HostNameCmp(p_host, p_host_name);
+        if (match == DEF_YES) {
+            goto exit;
+        }
+
+        p_cache = p_cache->NextPtr;
+    }
+
+    p_host = DEF_NULL;
+
+exit:
+    return (p_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_HostNameCmp()
+*
+* Description : Compare host object name field and a host name hane string
+*
+* Argument(s) : p_host          Pointer to the host object.
+*
+*               p_host_name     Pointer to a string that contains the host name.
+*
+* Return(s)   : DEF_OK, if names match
+*
+*               DEF_FAIL, otherwise
+*
+* Caller(s)   : DNScCache_HostSrchByName().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  DNScCache_HostNameCmp (DNSc_HOST_OBJ  *p_host,
+                                            CPU_CHAR       *p_host_name)
+{
+    CPU_BOOLEAN  result = DEF_FAIL;
+    CPU_INT16S   cmp;
+
+
+    cmp = Str_Cmp_N(p_host_name, p_host->NamePtr, p_host->NameLenMax);
+    if (cmp == 0) {
+        result = DEF_OK;
+    }
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DNScCache_ItemGet()
+*
+* Description : Get an Cache item element (list element)
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*
+* Return(s)   : Pointer to the item element.
+*
+* Caller(s)   : DNScCache_HostInsert().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  DNSc_CACHE_ITEM  *DNScCache_ItemGet (DNSc_ERR  *p_err)
+{
+    DNSc_CACHE_ITEM  *p_cache;
+    LIB_ERR           err;
+
+
+    p_cache = (DNSc_CACHE_ITEM *)Mem_DynPoolBlkGet(&DNScCache_ItemPool, &err);
+    if (err != LIB_MEM_ERR_NONE) {
+       *p_err = DNSc_ERR_MEM_ALLOC;
+        goto exit;
+    }
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return (p_cache);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         DNScCache_ItemFree()
+*
+* Description : Free cache item element.
+*
+* Argument(s) : p_cache Pointer to cache item element.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_ItemHostGet(),
+*               DNScCache_ItemRelease().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_ItemFree (DNSc_CACHE_ITEM  *p_cache)
+{
+    LIB_ERR  err;
+
+
+    Mem_DynPoolBlkFree(&DNScCache_ItemPool, p_cache, &err);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_ItemHostGet()
+*
+* Description : Get host item element (list element).
+*
+* Argument(s) : none.
+*
+* Return(s)   : Pointer to host item element.
+*
+* Caller(s)   : DNScCache_HostObjGet().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  DNSc_HOST_OBJ  *DNScCache_ItemHostGet (void)
+{
+    DNSc_CACHE_ITEM  *p_item_cur = DNSc_CacheItemListHead;
+    DNSc_HOST_OBJ    *p_host     = DEF_NULL;
+
+
+    if (p_item_cur == DEF_NULL) {
+        goto exit;
+    }
+
+
+    while (p_item_cur != DEF_NULL) {
+        p_host = p_item_cur->HostPtr;
+        switch (p_host->State) {
+            case DNSc_STATE_TX_REQ_IPv4:
+            case DNSc_STATE_RX_RESP_IPv4:
+            case DNSc_STATE_TX_REQ_IPv6:
+            case DNSc_STATE_RX_RESP_IPv6:
+                 break;
+
+            case DNSc_STATE_FREE:
+            case DNSc_STATE_FAILED:
+            case DNSc_STATE_RESOLVED:
+                 goto exit_found;
+
+            default:
+                 p_host = DEF_NULL;
+                 goto exit;
+        }
+        p_item_cur = p_item_cur->NextPtr;
+    }
+
+
+    p_host = DEF_NULL;
+    goto exit;
+
+
+exit_found:
+    DNScCache_ItemRemove(p_item_cur);
+    DNScCache_HostAddrClr(p_host);
+
+exit:
+    return (p_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_ItemRelease()
+*
+* Description : Release a cache item and everything contained in the item.
+*
+* Argument(s) : p_cache     Pointer to the cache item.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_Clr(),
+*               DNScCache_HostRemoveHandler().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_ItemRelease (DNSc_CACHE_ITEM  *p_cache)
+{
+    if (p_cache->HostPtr != DEF_NULL) {
+        DNScCache_HostRelease(p_cache->HostPtr);
+    }
+
+    DNScCache_ItemRemove(p_cache);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_ItemRemove()
+*
+* Description : Remove an item (list element) in the cache.
+*
+* Argument(s) : p_cache     Pointer to the cache list element to remove.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_ItemHostGet(),
+*               DNScCache_ItemRelease().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_ItemRemove (DNSc_CACHE_ITEM  *p_cache)
+{
+    if (DNSc_CacheItemListHead == p_cache) {
+        DNSc_CacheItemListHead = p_cache->NextPtr;
+        goto exit_found;
+
+    } else {
+        DNSc_CACHE_ITEM  *p_cache_cur  = DNSc_CacheItemListHead->NextPtr;
+        DNSc_CACHE_ITEM  *p_cache_prev = DNSc_CacheItemListHead;
+
+        while (p_cache_cur != DEF_NULL) {
+            if (p_cache_cur == p_cache) {
+                p_cache_prev->NextPtr = p_cache_cur->NextPtr;
+                goto exit_found;
+            }
+        }
+    }
+
+    goto exit;
+
+
+exit_found:
+    DNScCache_ItemFree(p_cache);
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_AddrItemGet()
+*
+* Description : get an address item element (list)
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE       Successfully acquired an address element.
+*                           DNSc_ERR_MEM_ALLOC  Unable to acquire an address element.
+*
+* Return(s)   : Pointer to address element, if no error.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : DNScCache_HostAddrInsert().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  DNSc_ADDR_ITEM  *DNScCache_AddrItemGet (DNSc_ERR  *p_err)
+{
+    DNSc_ADDR_ITEM  *p_item = DEF_NULL;
+    LIB_ERR          err;
+
+
+    p_item = (DNSc_ADDR_ITEM *)Mem_DynPoolBlkGet(&DNScCache_AddrItemPool, &err);
+    if (err != LIB_MEM_ERR_NONE) {
+       *p_err = DNSc_ERR_MEM_ALLOC;
+        goto exit;
+    }
+
+    p_item->AddrPtr = DEF_NULL;
+    p_item->NextPtr = DEF_NULL;
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return (p_item);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                       DNScCache_AddrItemFree()
+*
+* Description : Free an address item element.
+*
+* Argument(s) : p_item  Pointer to the address item element.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_HostRelease().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_AddrItemFree (DNSc_ADDR_ITEM  *p_item)
+{
+    LIB_ERR  err;
+
+
+    DNScCache_AddrObjFree(p_item->AddrPtr);
+    if (p_item->AddrPtr != DEF_NULL) {
+        Mem_DynPoolBlkFree(&DNScCache_AddrItemPool, p_item, &err);
+    }
+
+   (void)&err;
+}
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_HostRelease()
+*
+* Description : Release an host and all element contained in the host.
+*
+* Argument(s) : p_host  Pointer to the host object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_ItemRelease().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_HostRelease (DNSc_HOST_OBJ  *p_host)
+{
+
+
+    DNScCache_HostAddrClr(p_host);
+    DNScCache_HostObjFree(p_host);
+}
+
+
+
+
+/*
+*********************************************************************************************************
+*                                        DNScCache_HostAddrClr()
+*
+* Description : Remove and free all address elements contained in a host object.
+*
+* Argument(s) : p_host  Pointer to the host object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_HostObjFree(),
+*               DNScCache_HostRelease(),
+*               DNScCache_ItemHostGet().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_HostAddrClr (DNSc_HOST_OBJ  *p_host)
+{
+    DNSc_ADDR_ITEM  *p_addr_coll_cur  = p_host->AddrsFirstPtr;
+    DNSc_ADDR_ITEM  *p_addr_coll_next = DEF_NULL;
+
+
+    while (p_addr_coll_cur != DEF_NULL) {
+        p_addr_coll_next = p_addr_coll_cur->NextPtr;
+
+        DNScCache_AddrItemFree(p_addr_coll_cur);
+
+        p_addr_coll_cur = p_addr_coll_next;
+    }
+
+    p_host->AddrsFirstPtr = DEF_NULL;
+    p_host->AddrsEndPtr   = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DNScCache_Resolve()
+*
+* Description : Process resolution of an host (state machine controller).
+*
+* Argument(s) : p_cfg   Pointer to DNSc's configuration.
+*
+*               p_host  Pointer to the host object.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE   No error.
+*                           DNSc_ERR_FAULT  Unknown error (should not occur).
+*
+*                           RETURNED BY DNScReq_Init():
+*                               See DNScReq_Init() for additional return error codes.
+*
+*                           RETURNED BY DNScCache_Req():
+*                               See DNScCache_Req() for additional return error codes.
+*
+*                           RETURNED BY DNScCache_Resp():
+*                               See DNScCache_Resp() for additional return error codes.
+*
+* Return(s)   : Resolution status:
+*                       DNSc_STATUS_PENDING         Host resolution is pending, call again to see the status. (Processed by DNSc's task)
+*                       DNSc_STATUS_RESOLVED        Host is resolved.
+*                       DNSc_STATUS_FAILED          Host resolution has failed.
+*
+* Caller(s)   : DNScCache_ResolveAll(),
+*               DNScCache_ResolveHost().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  DNSc_STATUS  DNScCache_Resolve (const  DNSc_CFG       *p_cfg,
+                                               DNSc_HOST_OBJ  *p_host,
+                                               DNSc_ERR       *p_err)
+{
+    DNSc_STATUS     status        = DNSc_STATUS_PENDING;
+    DNSc_ADDR_OBJ  *p_server_addr = DEF_NULL;
+    NET_PORT_NBR    server_port   = NET_PORT_NBR_NONE;
+
+
+    switch (p_host->State) {
+        case DNSc_STATE_INIT_REQ:
+             if (p_host->ReqCfgPtr != DEF_NULL) {
+                 p_server_addr = p_host->ReqCfgPtr->ServerAddrPtr;
+                 server_port   = p_host->ReqCfgPtr->ServerPort;
+             }
+
+             p_host->SockID = DNScReq_Init(p_server_addr, server_port, p_err);
+             if (*p_err != DNSc_ERR_NONE) {
+                 status = DNSc_STATUS_FAILED;
+                 goto exit;
+             }
+
+             p_host->ReqCtr = 0u;
+             p_host->State  = DNSc_STATE_IF_SEL;
+             status         = DNSc_STATUS_PENDING;
+             break;
+
+
+        case DNSc_STATE_IF_SEL:
+             p_host->IF_Nbr = DNSc_ReqIF_Sel(p_host->IF_Nbr, p_host->SockID, p_err);
+             if (*p_err != DNSc_ERR_NONE) {
+                 status = DNSc_STATUS_FAILED;
+                 break;
+             }
+
+#ifdef  NET_IPv4_MODULE_EN
+             p_host->State = DNSc_STATE_TX_REQ_IPv4;
+#else
+   #ifdef  NET_IPv6_MODULE_EN
+             p_host->State = DNSc_STATE_TX_REQ_IPv6;
+   #else
+            *p_err = DNSc_ERR_FAULT;
+             goto exit;
+   #endif
+#endif
+
+            status = DNSc_STATUS_PENDING;
+            break;
+
+        case DNSc_STATE_TX_REQ_IPv4:
+        case DNSc_STATE_TX_REQ_IPv6:
+             DNScCache_Req(p_host, p_err);
+             status = DNSc_STATUS_PENDING;
+             break;
+
+
+        case DNSc_STATE_RX_RESP_IPv4:
+        case DNSc_STATE_RX_RESP_IPv6:
+             status = DNScCache_Resp(p_cfg, p_host, p_err);
+             break;
+
+
+        case DNSc_STATE_RESOLVED:
+             status = DNSc_STATUS_RESOLVED;
+            *p_err  = DNSc_ERR_NONE;
+             break;
+
+
+        case DNSc_STATE_FREE:
+        default:
+             status = DNSc_STATUS_FAILED;
+            *p_err  = DNSc_ERR_FAULT;
+             goto exit;
+    }
+
+
+    switch (status) {
+        case DNSc_STATUS_PENDING:
+             break;
+
+        case DNSc_STATUS_RESOLVED:
+        case DNSc_STATUS_FAILED:
+        default:
+             DNSc_ReqClose(p_host->SockID);
+             break;
+    }
+
+
+exit:
+    return (status);
+}
+
+/*
+*********************************************************************************************************
+*                                            DNScCache_Req()
+*
+* Description : Send an host resolution request.
+*
+* Argument(s) : p_host  Pointer to the host object.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE   No error.
+*                           DNSc_ERR_FAULT  Unknown error (should not occur).
+*
+*                           RETURNED BY DNScReq_TxReq():
+*                               See DNScReq_TxReq() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_Resolve().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScCache_Req (DNSc_HOST_OBJ  *p_host,
+                             DNSc_ERR       *p_err)
+{
+    DNSc_REQ_TYPE  req_type;
+
+
+    switch (p_host->State) {
+        case DNSc_STATE_TX_REQ_IPv4:
+             req_type = DNSc_REQ_TYPE_IPv4;
+             break;
+
+        case DNSc_STATE_TX_REQ_IPv6:
+             req_type = DNSc_REQ_TYPE_IPv6;
+             break;
+
+        default:
+            *p_err = DNSc_ERR_FAULT;
+             goto exit;
+    }
+
+
+    p_host->QueryID = DNScReq_TxReq(p_host->NamePtr, p_host->SockID, DNSc_QUERY_ID_NONE, req_type, p_err);
+    switch (*p_err) {
+        case DNSc_ERR_NONE:
+             break;
+
+        case DNSc_ERR_IF_LINK_DOWN:
+             p_host->State = DNSc_STATE_IF_SEL;
+             goto exit_no_err;
+
+        default:
+             goto exit;
+    }
+
+    switch (p_host->State) {
+        case DNSc_STATE_TX_REQ_IPv4:
+             p_host->State = DNSc_STATE_RX_RESP_IPv4;
+             break;
+
+        case DNSc_STATE_TX_REQ_IPv6:
+             p_host->State = DNSc_STATE_RX_RESP_IPv6;
+             break;
+
+        default:
+            *p_err = DNSc_ERR_FAULT;
+             goto exit;
+    }
+
+
+    p_host->TS_ms = NetUtil_TS_Get_ms();
+    p_host->ReqCtr++;
+
+
+exit_no_err:
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DNScCache_Resp()
+*
+* Description : Receive host resolution request response.
+*
+* Argument(s) : p_cfg   Pointer to DNSc's configuration.
+*
+*               p_host  Pointer to the host object.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE   No error.
+*                           DNSc_ERR_FAULT  Unknown error (should not occur).
+*
+*                           RETURNED BY DNScReq_TxReq():
+*                               See DNScReq_TxReq() for additional return error codes.
+*
+* Return(s)   : Resolution status:
+*                       DNSc_STATUS_PENDING         Host resolution is pending, call again to see the status. (Processed by DNSc's task)
+*                       DNSc_STATUS_RESOLVED        Host is resolved.
+*                       DNSc_STATUS_FAILED          Host resolution has failed.
+*
+* Caller(s)   : DNScCache_Resolve().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  DNSc_STATUS  DNScCache_Resp (const  DNSc_CFG       *p_cfg,
+                                            DNSc_HOST_OBJ  *p_host,
+                                            DNSc_ERR       *p_err)
+{
+    DNSc_STATUS  status;
+    NET_TS_MS    ts_cur_ms;
+    NET_TS_MS    ts_delta_ms;
+    CPU_INT16U   timeout_ms   = p_cfg->ReqRetryTimeout_ms;
+    CPU_INT08U   req_retry    = p_cfg->ReqRetryNbrMax;
+    CPU_BOOLEAN  re_tx        = DEF_NO;
+    CPU_BOOLEAN  change_state = DEF_NO;
+
+
+    if (p_host->ReqCfgPtr != DEF_NULL) {
+        timeout_ms = p_host->ReqCfgPtr->ReqTimeout_ms;
+        req_retry  = p_host->ReqCfgPtr->ReqRetry;
+    }
+
+    status = DNScReq_RxResp(p_cfg, p_host, p_host->SockID, p_host->QueryID, p_err);
+    switch (*p_err) {
+        case DNSc_ERR_NONE:
+             change_state = DEF_YES;
+             break;
+
+        case DNSc_ERR_RX:
+             if (p_host->ReqCtr >= req_retry) {
+                 status        = DNSc_STATUS_FAILED;
+                 p_host->State = DNSc_STATE_FAILED;
+                *p_err         = DNSc_ERR_NO_SERVER;
+                 goto exit;
+
+             } else {
+                 ts_cur_ms   = NetUtil_TS_Get_ms();
+                 ts_delta_ms = ts_cur_ms - p_host->TS_ms;
+                 if (ts_delta_ms >= timeout_ms) {
+                     re_tx        = DEF_YES;
+                     change_state = DEF_YES;
+                 }
+             }
+             break;
+
+        default:
+            goto exit;
+    }
+
+    if (change_state == DEF_YES) {
+        switch (p_host->State) {
+            case DNSc_STATE_RX_RESP_IPv4:
+                 if (re_tx == DEF_YES) {
+                     p_host->State = DNSc_STATE_TX_REQ_IPv4;
+
+                 } else {
+#ifdef  NET_IPv6_MODULE_EN
+                     p_host->ReqCtr = 0;
+                     p_host->State  = DNSc_STATE_TX_REQ_IPv6;
+                     status         = DNSc_STATUS_PENDING;
+#else
+                     p_host->State = DNSc_STATE_RESOLVED;
+                     status        = DNSc_STATUS_RESOLVED;
+#endif
+                 }
+                 break;
+
+            case DNSc_STATE_RX_RESP_IPv6:
+                 if (re_tx == DEF_YES) {
+                     p_host->State = DNSc_STATE_TX_REQ_IPv6;
+                     status        = DNSc_STATUS_PENDING;
+
+                 } else if (status != DNSc_STATUS_RESOLVED) {   /* If the resolution has failed, let try on another     */
+                     p_host->State = DNSc_STATE_IF_SEL;         /* interface. It may be possible to reach the DNS       */
+                     status        = DNSc_STATUS_PENDING;       /* server using another link.                           */
+
+                 } else {
+                     p_host->State = DNSc_STATE_RESOLVED;
+                     status        = DNSc_STATUS_RESOLVED;
+                 }
+                 break;
+
+            default:
+                 status = DNSc_STATUS_FAILED;
+                *p_err  = DNSc_ERR_FAULT;
+                 goto exit;
+        }
+    }
+
+
+exit:
+    return (status);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_cache.h b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_cache.h
new file mode 100644
index 0000000..8069e98
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_cache.h
@@ -0,0 +1,139 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       DNS CLIENT CACHE MODULE
+*
+* Filename      : dns-c_cache.h
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included
+*                     in the project build :
+*
+*                     (a) uC/LIB    V1.37.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This header file is protected from multiple pre-processor inclusion through use of the
+*               pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  DNSc_CACHE_PRESENT                                     /* See Note #1.                                         */
+#define  DNSc_CACHE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "dns-c.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct  DNSc_cache_item  DNSc_CACHE_ITEM;
+
+struct DNSc_cache_item {
+    DNSc_HOST_OBJ    *HostPtr;
+    DNSc_CACHE_ITEM  *NextPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void            DNScCache_Init          (const  DNSc_CFG       *p_cfg,
+                                                DNSc_ERR       *p_err);
+
+void            DNScCache_Clr           (       DNSc_ERR       *p_err);
+
+void            DNScCache_HostInsert    (       DNSc_HOST_OBJ  *p_host,
+                                                DNSc_ERR       *p_err);
+
+void            DNScCache_HostRemove    (       DNSc_HOST_OBJ  *p_host);
+
+void            DNScCache_HostSrchRemove(       CPU_CHAR       *p_host_name,
+                                                DNSc_ERR       *p_err);
+
+DNSc_STATUS     DNScCache_Srch          (       CPU_CHAR       *p_host_name,
+                                                DNSc_ADDR_OBJ  *p_addrs,
+                                                CPU_INT08U      addr_nbr_max,
+                                                CPU_INT08U     *p_addr_nbr_rtn,
+                                                DNSc_FLAGS      flags,
+                                                DNSc_ERR       *p_err);
+
+DNSc_HOST_OBJ  *DNScCache_HostObjGet    (       CPU_CHAR       *p_host_name,
+                                                DNSc_FLAGS      flags,
+                                                DNSc_REQ_CFG   *p_cfg,
+                                                DNSc_ERR       *p_err);
+
+void            DNScCache_HostObjFree   (       DNSc_HOST_OBJ  *p_host);
+
+void            DNScCache_HostAddrInsert(const  DNSc_CFG       *p_cfg,
+                                                DNSc_HOST_OBJ  *p_host,
+                                                DNSc_ADDR_OBJ  *p_addr,
+                                                DNSc_ERR       *p_err);
+
+DNSc_ADDR_OBJ  *DNScCache_AddrObjGet    (       DNSc_ERR       *p_err);
+
+void            DNScCache_AddrObjFree   (       DNSc_ADDR_OBJ  *p_addr);
+
+void            DNScCache_AddrObjSet    (       DNSc_ADDR_OBJ  *p_addr,
+                                                CPU_CHAR       *p_str_addr,
+                                                DNSc_ERR       *p_err);
+
+DNSc_STATUS     DNScCache_ResolveHost   (const  DNSc_CFG       *p_cfg,
+                                                DNSc_HOST_OBJ  *p_host,
+                                                DNSc_ERR       *p_err);
+
+CPU_INT16U      DNScCache_ResolveAll    (const  DNSc_CFG       *p_cfg,
+                                                DNSc_ERR       *p_err);
+
+#endif /* DNSc_CACHE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_req.c b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_req.c
new file mode 100644
index 0000000..79606cb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_req.c
@@ -0,0 +1,1409 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       DNS CLIENT REQ MODULE
+*
+* Filename      : dns-c_req.c
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included
+*                     in the project build :
+*
+*                     (a) uC/TCPIP    V3.00.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  DNSc_REQ_MODULE
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  "dns-c_req.h"
+#include  "dns-c_cache.h"
+
+#include  
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  
+#endif
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                  DNS MODULE CONFIGURATION DEFINES
+*********************************************************************************************************
+*/
+
+#define  DNSc_PKT_MAX_SIZE                               512u
+#define  DNSc_PKT_HDR_SIZE                                12u
+#define  DNSc_PKT_TYPE_SIZE                                2u
+#define  DNSc_PKT_CLASS_SIZE                               2u
+#define  DNSc_PKT_TTL_SIZE                                 4u
+
+#define  DNSc_HDR_MSG_LEN_MAX       (DNSc_PKT_MAX_SIZE - DNSc_PKT_HDR_SIZE)
+
+#define  DNSc_NAME_LEN_SIZE                                1u
+#define  DNSc_ZERO_CHAR_SIZE                               1u
+
+#define  DNSc_MAX_RX_RETRY                                 3u
+#define  DNSc_MAX_RX_DLY_MS                              100u
+
+#define  DNSc_SOCK_TX_RETRY_MAX                             5u
+#define  DNSc_SOCK_TX_DLY_MS                                10u
+
+/*
+*********************************************************************************************************
+*                                           DNS TYPE DEFINE
+*
+* Note(s) : (1) Fixed value of the the DNS hdr.
+*
+*               (a) Outgoing DNS msg might contain only one question and should not contain any answer
+*                   record, authority record or additional info.
+*
+*               (b) Value of param is fixed so that DNS outgoing pkt represent a standard query and that
+*                   recursion is desired.
+*
+*           (2) Message compression format is described in RFC #1035, Section 4.1.4.
+*
+*               (a) The returned host name may be whether a literal string in the format of a 1-byte count
+*                   followed by the characters that make up the name,or a pointer to a literal string. In
+*                   the case of a compressed host name, the pointer can be represented as follows :
+*
+*                         1  1  1  1  1  1
+*                         5  4  3  2  1  0  9  8  7  6  5  4  3  2  1  0
+*                       -------------------------------------------------
+*                       | 1| 1|                 OFFSET                  |
+*                       -------------------------------------------------
+*
+*                   where OFFSET specifies an offset from the first byte of the ID field in the domain
+*                   header. To reach the IP addr, we must skip over the returned host name, whether it
+*                   is compressed or not. To detect a compression, the 6 LSB of the first byte must be
+*                   masked.
+*
+*               (b) If the host name is compressed, the pkt pointer should skip over the pointer that
+*                   refers to the literal host name string, which has size of 2 bytes.
+*
+*
+**********************************************************************************************************
+*/
+
+                                                                /* See Note #1a.                                        */
+#define  DNSc_QUESTION_NBR                                 1u
+#define  DNSc_ANSWER_NBR                                   0u
+#define  DNSc_AUTHORITY_NBR                                0u
+#define  DNSc_ADDITIONAL_NBR                               0u
+
+#define  DNSc_PARAM_ENTRY                             0x0100    /* See Note #1b.                                        */
+
+#define  DNSc_TYPE_A                                       1u   /* Host      addr type (see RFC #1035, Section 3.2.2).  */
+#define  DNSc_TYPE_CNAME                                   5u   /* Canonical addr type (see RFC #1035, Section 3.3.1).  */
+#define  DNSc_TYPE_AAAA                                   28u   /* Host      addr type (see RFC #3596, Section 2.1).    */
+#define  DNSc_CLASS_IN                                     1u   /* Internet class      (see RFC #1035, Section 3.2.4).  */
+
+#define  DNSc_PARAM_QUERY                                  0u   /* Query operation     (see RFC #1035, Section 4.1.1).  */
+
+
+#define  DNSc_PARAM_MASK_QR                           0x8000    /* Mask the 15 MSBs to extract the operation type.      */
+#define  DNSc_PARAM_MASK_RCODE                        0x000F    /* Mask the 12 LSBs to extract the response code.       */
+
+#define  DNSc_ANSWER_NBR_MIN                               1u   /* Response msg should contain at least one answer.     */
+
+#define  DNSc_COMP_ANSWER                               0xC0    /* See Note #2a.                                        */
+#define  DNSc_HOST_NAME_PTR_SIZE                           2u   /* See Note #2b.                                        */
+
+
+#define  DNSc_RCODE_NO_ERR                                 0u   /* No error code       (see RFC #1035, Section 4.1.1).  */
+#define  DNSc_RCODE_INVALID_REQ_FMT                        1u
+#define  DNSc_RCODE_SERVER_FAIL                            2u
+#define  DNSc_RCODE_NAME_NOT_EXIST                         3u
+
+
+#define  DNSc_PORT_DFLT                                     53u /* Configure client IP port. Default is 53.             */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct  DNSc_server {
+    DNSc_ADDR_OBJ  Addr;
+    CPU_BOOLEAN    IsValid;
+} DNSc_SERVER;
+
+
+/*
+*********************************************************************************************************
+*                                          DNS MSG DATA TYPE
+*
+* Note(s) : (1) See RFC #1035, section 4.1 for DNS message format.
+*
+*           (2) Param is a 16 bits field that specifies the operation requested and a response code that
+*               can be represented as follows :
+*
+*                         1  1  1  1  1  1
+*                         5  4  3  2  1  0  9  8  7  6  5  4  3  2  1  0
+*                       -------------------------------------------------
+*                       |   RCODE   |   RSV  |RA|RD|TC|AA|   QTYPE   |QR|
+*                       -------------------------------------------------
+*
+*                   where
+*                           RCODE        Response code
+*                                        0    No error
+*                                        1    Format error in query
+*                                        2    Server failure
+*                                        3    Name does not exist
+*                                        4    Query not supported by server
+*                                        5    Query refused by server
+*
+*                           RSV          Reserved
+
+*                           RA           Set if recursion available
+*                           RD           Set if recursion desired
+*                           TC           Set if message truncated
+*                           AA           Set if answer authoritative
+*
+*                           QTYPE        Query type
+*                                        0    Standard
+*                                        1    Inverse
+*                                        2    Obsolete
+*                                        3    Obsolete
+*
+*                           QR           Operation type
+*                                        0    Query
+*                                        1    Response
+*********************************************************************************************************
+*/
+
+typedef  struct  DNSc_Msg {
+    CPU_INT16U   QueryID;                                       /* Unique ID.                                           */
+    CPU_INT16U   Param;                                         /* Parameters (see Note #2).                            */
+    CPU_INT16U   QuestionNbr;                                   /* Number of question records.                          */
+    CPU_INT16U   AnswerNbr;                                     /* Number of answer records.                            */
+    CPU_INT16U   AuthorityNbr;                                  /* Number of authoritative name server records.         */
+    CPU_INT16U   AdditionalNbr;                                 /* Number of additional info.                           */
+    CPU_INT08U   QueryMsg;
+} DNSc_HDR;
+
+
+typedef  struct  DNSc_query_info {
+    CPU_INT16U  Type;
+    CPU_INT16U  Class;
+
+} DNSc_QUERY_INFO;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U   DNSc_QueryID = 1u;
+static  DNSc_SERVER  DNSc_ServerAddr;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  DNScReq_TxPrepareMsg (       CPU_INT08U     *p_buf,
+                                                 CPU_INT16U      buf_len,
+                                                 CPU_CHAR       *p_host_name,
+                                                 DNSc_REQ_TYPE   req_type,
+                                                 CPU_INT16U      req_query_id,
+                                                 DNSc_ERR       *p_err);
+
+static  void        DNScReq_RxRespMsg    (const  DNSc_CFG       *p_cfg,
+                                                 DNSc_HOST_OBJ  *p_host,
+                                                 CPU_INT08U     *p_resp_msg,
+                                                 CPU_INT16U      resp_msg_len,
+                                                 CPU_INT16U      req_query_id,
+
+                                                 DNSc_ERR       *p_err);
+
+static  void        DNScReq_RxRespAddAddr(const  DNSc_CFG       *p_cfg,
+                                                 DNSc_HOST_OBJ  *p_host,
+                                                 CPU_INT16U      answer_type,
+                                                 CPU_INT08U     *p_data,
+                                                 DNSc_ERR       *p_err);
+
+static  void        DNScReq_TxData       (       NET_SOCK_ID     sock_id,
+                                                 CPU_INT08U     *p_buf,
+                                                 CPU_INT16U      data_len,
+                                                 DNSc_ERR       *p_err);
+
+static  CPU_INT16U  DNScReq_RxData       (       NET_SOCK_ID     sock_id,
+                                                 CPU_INT08U     *p_buf,
+                                                 CPU_INT16U      buf_len,
+                                                 DNSc_ERR       *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                           DNSc_ServerInit()
+*
+* Description : Initialize default request server.
+*
+* Argument(s) : p_cfg   Pointer to the DNS'c configuration.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE           Request server successfully initialized.
+*                           DNSc_ERR_INVALID_CFG    Invalid server configuration.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNSc_Init().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScReq_ServerInit (const  DNSc_CFG  *p_cfg,
+                                 DNSc_ERR  *p_err)
+{
+    DNSc_SERVER  server_addr;
+    CPU_SR_ALLOC();
+
+
+
+    if (p_cfg->ServerDfltPtr != DEF_NULL) {
+        DNScCache_AddrObjSet(&server_addr.Addr, p_cfg->ServerDfltPtr, p_err);
+        if (*p_err != DNSc_ERR_NONE) {
+            *p_err  = DNSc_ERR_INVALID_CFG;
+             goto exit;
+        }
+
+        server_addr.IsValid = DEF_YES;
+
+    } else {
+        server_addr.IsValid = DEF_NO;
+    }
+
+    CPU_CRITICAL_ENTER();
+    DNSc_ServerAddr = server_addr;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = DNSc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DNScReq_ServerSet()
+*
+* Description : Set server's address.
+*
+* Argument(s) : p_addr  Pointer to IP address.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE           Server address successfully Set.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNSc_CfgServerByAddr(),
+*               DNSc_CfgServerByStr().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScReq_ServerSet (DNSc_ADDR_OBJ  *p_addr,
+                         DNSc_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    DNSc_ServerAddr.Addr    = *p_addr;
+    DNSc_ServerAddr.IsValid =  DEF_YES;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = DNSc_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DNScReq_ServerGet()
+*
+* Description : Get the server's address configured.
+*
+* Argument(s) : p_addr  Pointer to structure that will receive the IP address of the DNS server.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE           Successfully returned.
+*                           DNSc_ERR_ADDR_INVALID   Invalid server's address.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNSc_GetServerByAddr(),
+*               DNSc_GetServerByStr().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNScReq_ServerGet (DNSc_ADDR_OBJ  *p_addr,
+                         DNSc_ERR       *p_err)
+{
+    CPU_BOOLEAN  valid = DEF_NO;
+    DNSc_SERVER  server_addr;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    server_addr = DNSc_ServerAddr;
+    CPU_CRITICAL_EXIT();
+
+
+    valid = server_addr.IsValid;
+    if (valid == DEF_YES) {
+       *p_addr = server_addr.Addr;
+    }
+
+    if (valid != DEF_YES) {
+       *p_err = DNSc_ERR_ADDR_INVALID;
+        goto exit;
+    }
+
+   *p_err =  DNSc_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            DNScReq_Init()
+*
+* Description : Initialize request.
+*
+* Argument(s) : p_server_addr   Pointer to the server address to use for the request.
+*
+*               server_port     Server port.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   DNSc_ERR_NONE               Successfully initialized.
+*                                   DNSc_ERR_INVALID_SERVER     Invalid server address.
+*                                   DNSc_ERR_ADDR_INVALID       Invalid IP address.
+*                                   DNSc_ERR_SOCK_OPEN_FAIL     Failed to initialize a socket.
+*
+*
+* Return(s)   : Socket ID,        if successfully initialized.
+*
+*               NET_SOCK_ID_NONE, otherwise.
+*
+* Caller(s)   : DNScCache_Resolve().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+NET_SOCK_ID  DNScReq_Init (DNSc_ADDR_OBJ  *p_server_addr,
+                           NET_PORT_NBR    server_port,
+                           DNSc_ERR       *p_err)
+{
+    NET_IPv4_ADDR             net_ipv4_addr_any;
+    DNSc_ADDR_OBJ            *p_server;
+    NET_SOCK_ADDR_FAMILY      addr_family;
+    NET_SOCK_PROTOCOL_FAMILY  protocol_family;
+    NET_SOCK_ID               sock_id = NET_SOCK_ID_NONE;
+    NET_PORT_NBR              port    = DNSc_PORT_DFLT;
+    NET_SOCK_ADDR             sock_addr_server;
+    NET_SOCK_ADDR             sock_addr_local;
+    NET_SOCK_ADDR_LEN         addr_len;
+    CPU_INT08U               *p_addr;
+    NET_ERR                   net_err;
+    DNSc_SERVER               server_addr;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    server_addr = DNSc_ServerAddr;
+    CPU_CRITICAL_EXIT();
+
+    if (p_server_addr == DEF_NULL) {
+
+        if (server_addr.IsValid == DEF_NO) {
+           *p_err = DNSc_ERR_INVALID_SERVER;
+            goto exit_sock_id_none;
+        }
+
+        p_server = &server_addr.Addr;
+
+    } else {
+        p_server =  p_server_addr;
+    }
+
+    if (server_port != NET_PORT_NBR_NONE) {
+        port = server_port;
+    }
+
+
+    switch (p_server->Len) {
+        case NET_IPv4_ADDR_LEN:
+             addr_family       = NET_SOCK_ADDR_FAMILY_IP_V4;
+             protocol_family   = NET_SOCK_PROTOCOL_FAMILY_IP_V4;
+             net_ipv4_addr_any =  NET_IPv4_ADDR_ANY;
+             p_addr            = (CPU_INT08U *)&net_ipv4_addr_any;
+             addr_len          =  NET_IPv4_ADDR_SIZE;
+             break;
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_IPv6_ADDR_LEN:
+             addr_family     = NET_SOCK_ADDR_FAMILY_IP_V6;
+             protocol_family = NET_SOCK_PROTOCOL_FAMILY_IP_V6;
+             p_addr          = (CPU_INT08U *)&NET_IPv6_ADDR_ANY;
+             addr_len        =  NET_IPv6_ADDR_SIZE;
+             break;
+#endif
+
+        case NET_IP_ADDR_FAMILY_UNKNOWN:
+        default:
+            *p_err = DNSc_ERR_ADDR_INVALID;
+             goto exit_sock_id_none;
+    }
+
+
+
+                                                                /* --- CREATE SOCKET TO COMMUNICATE WITH DNS SERVER --- */
+    sock_id = NetSock_Open(protocol_family,
+                           NET_SOCK_TYPE_DATAGRAM,
+                           NET_SOCK_PROTOCOL_UDP,
+                          &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+        *p_err = DNSc_ERR_SOCK_OPEN_FAIL;
+         goto exit_sock_id_none;
+    }
+
+
+    NetApp_SetSockAddr(&sock_addr_local,
+                        addr_family,
+                        NET_PORT_NBR_NONE,
+                        p_addr,
+                        addr_len,
+                       &net_err);
+    if (net_err != NET_APP_ERR_NONE) {
+       *p_err = DNSc_ERR_SOCK_OPEN_FAIL;
+        goto exit_close_sock;
+    }
+
+
+    NetApp_SetSockAddr(&sock_addr_server,
+                        addr_family,
+                        port,
+                        p_server->Addr,
+                        p_server->Len,
+                       &net_err);
+    if (net_err != NET_APP_ERR_NONE) {
+       *p_err = DNSc_ERR_SOCK_OPEN_FAIL;
+        goto exit_close_sock;
+    }
+
+
+    (void)NetSock_Bind(sock_id,
+                      &sock_addr_local,
+                       sizeof(sock_addr_local),
+                      &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+       *p_err = DNSc_ERR_SOCK_OPEN_FAIL;
+        goto exit_close_sock;
+    }
+
+    NetSock_Conn(sock_id,                                       /* Open sock to DNS server.                             */
+                &sock_addr_server,
+                 sizeof(sock_addr_server),
+                &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+       *p_err = DNSc_ERR_SOCK_OPEN_FAIL;
+        goto exit_close_sock;
+    }
+
+   *p_err = DNSc_ERR_NONE;
+
+
+    goto exit;
+
+exit_close_sock:
+    NetSock_Close(sock_id,
+                 &net_err);
+
+exit_sock_id_none:
+    sock_id = NET_SOCK_ID_NONE;
+
+exit:
+    return (sock_id);
+}
+
+/* TODO */
+NET_IF_NBR  DNSc_ReqIF_Sel (NET_IF_NBR   if_nbr_last,
+                            NET_SOCK_ID  sock_id,
+                            DNSc_ERR    *p_err)
+{
+    NET_IF_NBR  if_nbr_up = NET_IF_NBR_NONE;
+    NET_IF_NBR  if_nbr_ix;
+    NET_IF_NBR  if_nbr_cfgd;
+    NET_IF_NBR  if_nbr_base;
+    NET_ERR     net_err;
+
+
+    if_nbr_base  = NetIF_GetNbrBaseCfgd();
+    if_nbr_cfgd  = NetIF_GetExtAvailCtr(&net_err);
+    if_nbr_cfgd -= if_nbr_base;
+
+    if (if_nbr_last != NET_IF_NBR_WILDCARD) {
+        if_nbr_ix = if_nbr_last + 1;
+        if (if_nbr_ix > if_nbr_cfgd) {
+           *p_err = DNSc_ERR_NO_RESPONSE;
+            goto exit;
+        }
+
+    } else {
+        if_nbr_ix = if_nbr_base;
+    }
+
+
+    for (; if_nbr_ix <= if_nbr_cfgd; if_nbr_ix++) {
+        NET_IF_LINK_STATE  state  = NET_IF_LINK_DOWN;
+
+        state = NetIF_LinkStateGet(if_nbr_ix, &net_err);
+        if ((state == NET_IF_LINK_UP) &&
+            (if_nbr_up == NET_IF_NBR_NONE)) {
+            if_nbr_up = if_nbr_ix;
+            break;
+        }
+    }
+
+
+    if (if_nbr_up == NET_IF_NBR_NONE) {
+       *p_err = DNSc_ERR_IF_LINK_DOWN;
+        goto exit;
+    }
+
+
+    NetSock_CfgIF(sock_id, if_nbr_up, &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+        *p_err = DNSc_ERR_SOCK_OPEN_FAIL;
+         goto exit;
+    }
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return (if_nbr_up);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            DNSc_ReqClose()
+*
+* Description : Close request objects.
+*
+* Argument(s) : sock_id     Socket ID used during the request.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScCache_Resolve().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  DNSc_ReqClose (NET_SOCK_ID  sock_id)
+{
+    NET_ERR err;
+
+
+    NetSock_Close(sock_id, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            DNScReq_TxReq()
+*
+* Description : Prepare request and transmit to the server.
+*
+* Argument(s) : p_host_name     Pointer to a string that contains the host name to resolve.
+*
+*               sock_id         Socket ID.
+*
+*               query_id        Query ID of the request.
+*
+*                                   DNSc_QUERY_ID_NONE a new query ID is generated.
+*
+*               req_type        Request type:
+*
+*                                   DNSc_REQ_TYPE_IPv4  Request IPv4 address(es)
+*                                   DNSc_REQ_TYPE_IPv6  Request IPv6 address(es)
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   DNSc_ERR_NONE  Request successfully completed.
+*
+*                               RETURNED BY DNScReq_TxReqPrepare():
+*                                   See DNScReq_TxReqPrepare() for additional return error codes.
+*
+*                               RETURNED BY DNScReq_TxData():
+*                                   See DNScReq_TxData() for additional return error codes.
+*
+* Return(s)   : Query ID, if successfully transmitted.
+*
+*               DNSc_QUERY_ID_NONE, Otherwise.
+*
+* Caller(s)   : DNScCache_Req().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  DNScReq_TxReq (CPU_CHAR       *p_host_name,
+                           NET_SOCK_ID     sock_id,
+                           CPU_INT16U      query_id,
+                           DNSc_REQ_TYPE   req_type,
+                           DNSc_ERR       *p_err)
+{
+    CPU_INT08U  buf[DNSc_PKT_MAX_SIZE];
+    CPU_INT16U  req_query_id = DNSc_QUERY_ID_NONE;
+    CPU_INT16U  data_len;
+
+
+
+    if (query_id == DNSc_QUERY_ID_NONE) {
+        CPU_SR_ALLOC();
+
+        CPU_CRITICAL_ENTER();
+        req_query_id = DNSc_QueryID++;
+        CPU_CRITICAL_EXIT();
+    }
+
+    data_len = DNScReq_TxPrepareMsg(buf, DNSc_PKT_MAX_SIZE, p_host_name, req_type, req_query_id, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+        goto exit_err;
+    }
+
+    DNScReq_TxData(sock_id, buf, data_len, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit_err;
+    }
+
+
+   *p_err = DNSc_ERR_NONE;
+
+    goto exit;
+
+
+exit_err:
+
+    req_query_id = DNSc_QUERY_ID_NONE;
+
+exit:
+    return (req_query_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DNScReq_RxResp()
+*
+* Description : Receive DNS response.
+*
+* Argument(s) : p_cfg       Pointer to DNSc's configuration.
+*
+*               p_host      Pointer to the host object.
+*
+*               sock_id     Socket ID.
+*
+*               query_id    Query ID of the request.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               DNSc_ERR_NONE   Response received and host resolved.
+*
+*                               RETURNED BY DNScReq_RxData():
+*                                   See DNScReq_RxData() for additional return error codes.
+*
+*                               RETURNED BY DNScReq_RxRespProcess():
+*                                   See DNScReq_RxRespProcess() for additional return error codes.
+*
+* Return(s)   : Request Status:
+*
+*                   DNSc_STATUS_PENDING
+*                   DNSc_STATUS_RESOLVED
+*
+* Caller(s)   : DNScCache_Resp().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+DNSc_STATUS  DNScReq_RxResp (const  DNSc_CFG       *p_cfg,
+                                    DNSc_HOST_OBJ  *p_host,
+                                    NET_SOCK_ID     sock_id,
+                                    CPU_INT16U      query_id,
+                                    DNSc_ERR       *p_err)
+{
+
+    DNSc_STATUS  status = DNSc_STATUS_PENDING;
+    CPU_INT08U   buf[DNSc_PKT_MAX_SIZE];
+    CPU_INT16U   data_len;
+
+
+    data_len = DNScReq_RxData(sock_id, buf, sizeof(buf), p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+    DNScReq_RxRespMsg(p_cfg, p_host, buf, data_len, query_id, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+    status = DNSc_STATUS_RESOLVED;
+
+exit:
+    return (status);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        DNScReq_TxPrepareMsg()
+*
+* Description : Prepare request's message.
+*
+* Argument(s) : p_buf           Buffer where to format the request.
+*
+*               buf_len         Request's buffer length.
+*
+*               p_host_name     Pointer to a string that contains the host name to resolve.
+*
+*               req_type        Request type:
+*
+*                                   DNSc_REQ_TYPE_IPv4  Request IPv4 address(es)
+*                                   DNSc_REQ_TYPE_IPv6  Request IPv6 address(es)
+*
+*               req_query_id    Request ID.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   DNSc_ERR_NONE               Request sucessfully prepared.
+*                                   DNSc_ERR_INVALID_HOST_NAME  Invalid host name.
+*                                   DNSc_ERR_FAULT              Unknown error.
+*
+* Return(s)   : Message length.
+*
+* Caller(s)   : DNScReq_TxReq().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  DNScReq_TxPrepareMsg (CPU_INT08U     *p_buf,
+                                          CPU_INT16U      buf_len,
+                                          CPU_CHAR       *p_host_name,
+                                          DNSc_REQ_TYPE   req_type,
+                                          CPU_INT16U      req_query_id,
+                                          DNSc_ERR       *p_err)
+{
+    DNSc_HDR    *p_hdr       = (DNSc_HDR *)p_buf;
+    CPU_INT08U  *p_query;
+    CPU_INT08U  *p_cname;
+    CPU_INT16U   msg_len     =  0u;
+    CPU_INT16U   msg_type;
+    CPU_INT16U   buf_rem_len = buf_len;
+    CPU_INT16U   class;
+    CPU_CHAR    *p_name;
+    CPU_CHAR    *p_dot;
+
+
+    switch (req_type) {
+        case DNSc_REQ_TYPE_IPv4:
+             msg_type = DNSc_TYPE_A;
+             break;
+
+        case DNSc_REQ_TYPE_IPv6:
+             msg_type = DNSc_TYPE_AAAA;
+             break;
+
+        default:
+            *p_err = DNSc_ERR_FAULT;
+             goto exit;
+    }
+
+
+    p_hdr->QueryID       = NET_UTIL_HOST_TO_NET_16(req_query_id);
+    p_hdr->Param         = NET_UTIL_HOST_TO_NET_16(DNSc_PARAM_ENTRY);
+    p_hdr->QuestionNbr   = NET_UTIL_HOST_TO_NET_16(DNSc_QUESTION_NBR);
+    p_hdr->AnswerNbr     = NET_UTIL_HOST_TO_NET_16(DNSc_ANSWER_NBR);
+    p_hdr->AuthorityNbr  = NET_UTIL_HOST_TO_NET_16(DNSc_AUTHORITY_NBR);
+    p_hdr->AdditionalNbr = NET_UTIL_HOST_TO_NET_16(DNSc_ADDITIONAL_NBR);
+
+
+
+    p_query = &p_hdr->QueryMsg;
+    p_cname =  p_query;
+
+    buf_rem_len -= (p_query - p_buf);
+    p_name       =  p_host_name;
+
+    do {                                                        /* Message compression (See RFC-1035 Section 4.1.4)     */
+        CPU_INT08U  str_len;
+
+
+        p_dot = Str_Char(p_name, ASCII_CHAR_FULL_STOP);
+        if (p_dot != DEF_NULL) {
+            str_len = p_dot - p_name;                           /* Nb of chars between char and next '.'                */
+
+        } else {
+            str_len = Str_Len_N(p_name, buf_len);               /* Nb of chars between first char and '\0'              */
+        }
+
+
+        if ((str_len <= 0u)          &&
+            (str_len >  buf_rem_len)) {
+           *p_err = DNSc_ERR_INVALID_HOST_NAME;
+            goto exit;
+        }
+
+        *p_cname = str_len;                                     /* Put number of char that follow before the next stop. */
+         p_cname++;
+
+         Mem_Copy(p_cname, p_name, str_len);                    /* Copy Chars                                           */
+
+         p_name       = (p_dot   + 1u);
+         p_cname     +=  str_len;
+         buf_rem_len -=  str_len;
+
+    } while (p_dot);
+
+
+   *p_cname = ASCII_CHAR_NULL;                                  /* Insert end of line char                              */
+    p_cname++;
+
+    p_query  = p_cname;
+
+    msg_type = NET_UTIL_HOST_TO_NET_16(msg_type);               /* Set query TYPE.                                      */
+    Mem_Copy(p_query, &msg_type, sizeof(msg_type));
+
+
+    p_query += sizeof(msg_type);
+
+    class = NET_UTIL_HOST_TO_NET_16(DNSc_CLASS_IN);             /* Set query CLASS.                                     */
+    Mem_Copy(p_query, &class, sizeof(class));
+    p_query += sizeof(class);
+
+    msg_len  = p_query - p_buf;                                 /* Compute total pkt size (see Note #4).                */
+
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return (msg_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          DNScReq_RxRespMsg()
+*
+* Description : Analyze response message.
+*
+* Argument(s) : p_cfg           Pointer to DNSc's configuration.
+*
+*               p_resp_msg      Pointer to the response's message.
+*
+*               resp_msg_len    Response's message length
+*
+*               req_query_id    Request ID expected.
+*
+*               p_host          Pointer to a host object.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   DNSc_ERR_NONE                   Response successfully parsed.
+*                                   DNSc_ERR_NOT_A_RESPONSE         Invalid message type.
+*                                   DNSc_ERR_BAD_RESPONSE_ID        Invalid response ID.
+*                                   DNSc_ERR_FMT                    Bad formating.
+*                                   DNSc_ERR_SERVER_FAIL            Server return fail error.
+*                                   DNSc_ERR_NAME_NOT_EXIST         Server didn't find the host name.
+*                                   DNSc_ERR_BAD_RESPONSE_TYPE      Invalid response type.
+*                                   DNSc_ERR_BAD_QUESTION_COUNT     Invalid question count.
+*
+*
+* Return(s)   : none.
+*
+* Caller(s)   : DNScReq_RxResp().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScReq_RxRespMsg (const  DNSc_CFG       *p_cfg,
+                                        DNSc_HOST_OBJ  *p_host,
+                                        CPU_INT08U     *p_resp_msg,
+                                        CPU_INT16U      resp_msg_len,
+                                        CPU_INT16U      req_query_id,
+                                        DNSc_ERR       *p_err)
+{
+    DNSc_HDR    *p_dns_msg = (DNSc_HDR *)p_resp_msg;
+    CPU_INT16U   query_id;
+    CPU_INT16U   question_nbr;
+    CPU_INT16U   answer_nbr;
+    CPU_INT08U  *p_data;
+    CPU_INT16U   answer_type;
+    CPU_INT16U   data_16;
+    CPU_INT08U   ix;
+
+
+    Mem_Copy(&data_16, &p_dns_msg->Param, sizeof(p_dns_msg->Param));
+    data_16 = NET_UTIL_NET_TO_HOST_16(data_16) & DNSc_PARAM_MASK_QR;
+    if (data_16 == DNSc_PARAM_QUERY) {                          /* If the response is not a query response,         ... */
+       *p_err = DNSc_ERR_NOT_A_RESPONSE;                        /* ... rtn err.                                         */
+        return;
+    }
+
+
+    Mem_Copy(&query_id, &p_dns_msg->QueryID, sizeof(p_dns_msg->QueryID));
+    query_id= NET_UTIL_NET_TO_HOST_16(query_id);                /* If the query ID is incorrect,                    ... */
+    if (query_id != req_query_id) {
+       *p_err = DNSc_ERR_BAD_RESPONSE_ID;                       /* ... rtn err.                                         */
+        return;
+    }
+
+    Mem_Copy(&data_16, &p_dns_msg->Param, sizeof(p_dns_msg->Param));
+    data_16 = NET_UTIL_NET_TO_HOST_16(data_16) & DNSc_PARAM_MASK_RCODE;
+    switch (data_16) {
+        case DNSc_RCODE_NO_ERR:
+             break;
+
+        case DNSc_RCODE_INVALID_REQ_FMT:
+            *p_err = DNSc_ERR_FMT;
+             goto exit;
+
+        case DNSc_RCODE_SERVER_FAIL:
+            *p_err = DNSc_ERR_SERVER_FAIL;
+             goto exit;
+
+        case DNSc_RCODE_NAME_NOT_EXIST:
+            *p_err = DNSc_ERR_NAME_NOT_EXIST;
+             goto exit;
+
+        default:
+            *p_err = DNSc_ERR_BAD_RESPONSE_TYPE;
+             goto exit;
+    }
+
+
+    Mem_Copy(&question_nbr, &p_dns_msg->QuestionNbr, sizeof(p_dns_msg->QuestionNbr));
+    question_nbr = NET_UTIL_NET_TO_HOST_16(question_nbr);
+    if (question_nbr != DNSc_QUESTION_NBR) {                    /* If nbr of question do not match the query,       ... */
+       *p_err = DNSc_ERR_BAD_QUESTION_COUNT;                    /* ... rtn err.                                         */
+        return;
+    }
+
+    Mem_Copy(&answer_nbr, &p_dns_msg->AnswerNbr, sizeof(p_dns_msg->AnswerNbr));
+    answer_nbr = NET_UTIL_NET_TO_HOST_16(answer_nbr);
+    if (answer_nbr < DNSc_ANSWER_NBR_MIN) {                     /* If nbr of answer is null,                        ... */
+       *p_err = DNSc_ERR_NONE;                                  /* No answer for this type of request.                  */
+        return;
+    }
+
+                                                                /* Skip over the questions section.                     */
+    p_data = &p_dns_msg->QueryMsg;
+
+    for (ix = 0u; ix < question_nbr; ix++) {
+
+        while (*p_data != ASCII_CHAR_NULL) {                    /* Step through the host name until reaching the ZERO.  */
+            p_data += *p_data;
+            p_data++;
+        }
+
+        p_data += (DNSc_ZERO_CHAR_SIZE +                        /* Skip over the ZERO.                                  */
+                   DNSc_PKT_TYPE_SIZE  +                        /* Skip over the TYPE.                                  */
+                   DNSc_PKT_CLASS_SIZE);                        /* Skip over the CLASS.                                 */
+    }
+
+
+
+                                                                /* Extract the rtn'd IP addr (see Note #5).             */
+    for (ix = 0; ix < answer_nbr; ix++) {
+
+                                                                /* Skip over the answer host name.                      */
+        if ((*p_data & DNSc_COMP_ANSWER) == DNSc_COMP_ANSWER) {                      /* If the host name is compressed,                  ... */
+             p_data  += DNSc_HOST_NAME_PTR_SIZE;                 /* ... skip over the host name pointer.                 */
+
+        } else {
+
+            while (*p_data != ASCII_CHAR_NULL) {                /* Step through the host name until reaching the ZERO.  */
+                p_data += *p_data;
+                p_data++;
+            }
+
+            p_data += DNSc_ZERO_CHAR_SIZE;                      /* Skip over the ZERO.                                  */
+        }
+
+
+
+        Mem_Copy(&answer_type, p_data, sizeof(CPU_INT16U));
+        answer_type =  NET_UTIL_NET_TO_HOST_16(answer_type);    /* Get answer TYPE.                                     */
+
+        p_data += (DNSc_PKT_TYPE_SIZE  +                        /* Skip over the CLASS & the TTL.                       */
+                   DNSc_PKT_CLASS_SIZE +
+                   DNSc_PKT_TTL_SIZE);
+
+
+        Mem_Copy(&data_16, p_data, sizeof(CPU_INT16U));
+        data_16 = NET_UTIL_NET_TO_HOST_16(data_16); /* Addr len.                                          */
+        p_data += sizeof(CPU_INT16U);
+
+        DNScReq_RxRespAddAddr(p_cfg, p_host, answer_type, p_data, p_err);
+
+        p_data += data_16;
+    }
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScReq_RxRespAddAddr()
+*
+* Description : Add address for the response message to the host.
+*
+* Argument(s) : p_cfg           Pointer to the DNSc configuration.
+*
+*               p_host          Pointer to the host object.
+*
+*               answer_type     Answer type.
+*
+*               p_data          Pointer to the data that contains the address.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   DNSc_ERR_NONE               Address successfully added to the host object.
+*                                   DNSc_ERR_BAD_RESPONSE_TYPE  Unknown answer type.
+*
+*                                   RETURNED BY DNScCache_AddrObjGet():
+*                                       See DNScCache_AddrObjGet() for additional return error codes.
+*
+*                                   RETURNED BY DNScCache_HostAddrInsert():
+*                                       See DNScCache_HostAddrInsert() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScReq_RxRespMsg().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScReq_RxRespAddAddr (const  DNSc_CFG       *p_cfg,
+                                            DNSc_HOST_OBJ  *p_host,
+                                            CPU_INT16U      answer_type,
+                                            CPU_INT08U     *p_data,
+                                            DNSc_ERR       *p_err)
+{
+    DNSc_ADDR_OBJ  *p_addr;
+
+
+    p_addr = DNScCache_AddrObjGet(p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+        goto exit;
+    }
+
+
+    switch (answer_type) {
+        case DNSc_TYPE_A:
+             Mem_Copy(&p_addr->Addr, p_data, sizeof(CPU_INT32U));
+           *(CPU_INT32U *)p_addr->Addr = NET_UTIL_NET_TO_HOST_32(*(CPU_INT32U *)p_addr->Addr);
+             p_addr->Len  =  NET_IPv4_ADDR_LEN;
+             break;
+
+        case DNSc_TYPE_AAAA:
+             Mem_Copy(p_addr->Addr, p_data, NET_IPv6_ADDR_LEN);
+             p_addr->Len = NET_IPv6_ADDR_LEN;
+             break;
+
+        default:
+            *p_err = DNSc_ERR_BAD_RESPONSE_TYPE;
+             goto exit_release_addr;
+    }
+
+
+    DNScCache_HostAddrInsert(p_cfg, p_host, p_addr, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit_release_addr;
+    }
+
+
+   *p_err = DNSc_ERR_NONE;
+    goto exit;
+
+
+exit_release_addr:
+    DNScCache_AddrObjFree(p_addr);
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DNScReq_TxData()
+*
+* Description : Transmit data on the network
+*
+* Argument(s) : sock_id     Socket ID.
+*
+*               p_buf       Pointer to the buffer that contains the data to transmit.
+*
+*               data_len    Data length to transmit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               DNSc_ERR_NONE       Data successfully transmitted.
+*                               DNSc_ERR_TX         Unable to transmit the data (should retry later).
+*                               DNSc_ERR_TX_FAULT   Network socket fault (socket must be closed).
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNScReq_TxReq().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  DNScReq_TxData (NET_SOCK_ID   sock_id,
+                              CPU_INT08U   *p_buf,
+                              CPU_INT16U    data_len,
+                              DNSc_ERR     *p_err)
+{
+    CPU_INT32S    data_txd;
+    CPU_INT08U   *p_data     = p_buf;
+    CPU_INT08U    fail_retry = 0u;
+    CPU_INT32U    len        = data_len;
+    CPU_BOOLEAN   req_done   = DEF_NO;
+    NET_ERR       net_err;
+
+
+    do {
+                                                                /* Tx DNS req.                                          */
+        data_txd = NetSock_TxData(sock_id,
+                                  p_data,
+                                  data_len,
+                                  NET_SOCK_FLAG_TX_NO_BLOCK,
+                                 &net_err);
+        switch (net_err) {
+            case NET_SOCK_ERR_NONE:
+                 if (data_txd > 0) {
+                     p_data += data_txd;
+                     len    -= data_txd;
+                 }
+
+                 if (len <= 0) {
+                     req_done = DEF_YES;
+                 }
+                 break;
+
+            case NET_ERR_TX:                                    /* Retry on transitory tx err(s).                       */
+                 if ((len        > 0u) &&
+                     (fail_retry < DNSc_SOCK_TX_RETRY_MAX)) {
+
+                     KAL_Dly(DNSc_SOCK_TX_DLY_MS);
+                     fail_retry++;
+
+                 } else {
+                    *p_err    = DNSc_ERR_TX;
+                     goto exit;
+                 }
+                 break;
+
+            case NET_ERR_IF_LINK_DOWN:
+                 *p_err = DNSc_ERR_IF_LINK_DOWN;
+                  goto exit;
+
+            default:                                            /* Rtn   on any fatal  tx err(s).                       */
+                *p_err = DNSc_ERR_TX_FAULT;
+                 goto exit;
+        }
+
+    } while (req_done != DEF_YES);
+
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           DNScReq_RxData()
+*
+* Description : Receive data from the network.
+*
+* Argument(s) : sock_id     Socket ID.
+*
+*               p_buf       Pointer to the buffer that will receive the data.
+*
+*               data_len    Buffer length.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               DNSc_ERR_NONE       Data has been received successfully.
+*                               DNSc_ERR_RX         No data has been received.
+*                               DNSc_ERR_RX_FAULT   Network socket fault (socket must be closed).
+*
+* Return(s)   : Number of bytes received.
+*
+* Caller(s)   : DNScReq_RxResp().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  DNScReq_RxData (NET_SOCK_ID   sock_id,
+                                    CPU_INT08U   *p_buf,
+                                    CPU_INT16U    buf_len,
+                                    DNSc_ERR     *p_err)
+{
+    CPU_INT32S  rx_len  = 0;
+    NET_ERR     net_err;
+
+
+    rx_len  = NetSock_RxData(sock_id,
+                             p_buf,
+                             buf_len,
+                             NET_SOCK_FLAG_RX_NO_BLOCK,
+                            &net_err);
+    switch (net_err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+        case NET_SOCK_ERR_RX_Q_EMPTY:
+             rx_len = 0;
+            *p_err  = DNSc_ERR_RX;
+             goto exit;
+
+        default:                                /* Rtn   on any fatal  rx err(s).                       */
+            *p_err = DNSc_ERR_RX_FAULT;
+             goto exit;
+    }
+
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+    return ((CPU_INT16U)rx_len);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_req.h b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_req.h
new file mode 100644
index 0000000..5cfa2cb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_req.h
@@ -0,0 +1,117 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       DNS CLIENT REQ MODULE
+*
+* Filename      : dns-c_req.h
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included
+*                     in the project build :
+*
+*                     (a) uC/TCPIP    V3.00.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  DNSc_REQ_PRESENT
+#define  DNSc_REQ_PRESENT
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "dns-c.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  enum c_req_type {
+    DNSc_REQ_TYPE_IPv4,
+    DNSc_REQ_TYPE_IPv6,
+} DNSc_REQ_TYPE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void         DNScReq_ServerInit(const  DNSc_CFG       *p_cfg,
+                                       DNSc_ERR       *p_err);
+
+void         DNScReq_ServerSet (       DNSc_ADDR_OBJ  *p_addr,
+                                       DNSc_ERR       *p_err);
+
+void         DNScReq_ServerGet (       DNSc_ADDR_OBJ  *p_addr,
+                                       DNSc_ERR       *p_err);
+
+NET_SOCK_ID  DNScReq_Init      (       DNSc_ADDR_OBJ  *p_server_addr,
+                                       NET_PORT_NBR    server_port,
+                                       DNSc_ERR       *p_err);
+
+NET_IF_NBR   DNSc_ReqIF_Sel    (       NET_IF_NBR      if_nbr_last,
+                                       NET_SOCK_ID     sock_id,
+                                       DNSc_ERR       *p_err);
+
+void         DNSc_ReqClose     (       NET_SOCK_ID     sock_id);
+
+CPU_INT16U   DNScReq_TxReq     (       CPU_CHAR       *p_host_name,
+                                       NET_SOCK_ID     sock_id,
+                                       CPU_INT16U      query_id,
+                                       DNSc_REQ_TYPE   req_type,
+                                       DNSc_ERR       *p_err);
+
+DNSc_STATUS  DNScReq_RxResp    (const  DNSc_CFG       *p_cfg,
+                                       DNSc_HOST_OBJ  *p_host,
+                                       NET_SOCK_ID     sock_id,
+                                       CPU_INT16U      query_id,
+                                       DNSc_ERR       *p_err);
+
+#endif  /* DNSc_REQ_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_task.c b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_task.c
new file mode 100644
index 0000000..68b4a9e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_task.c
@@ -0,0 +1,372 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       DNS CLIENT TASK MODULE
+*
+* Filename      : dns-c_task.c
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included
+*                     in the project build :
+*
+*                     (a) uC/Common-KAL V1.00.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "dns-c_type.h"
+#include  "dns-c_task.h"
+#include  "dns-c_cache.h"
+#include  "KAL/kal.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  DNSc_TASK_MODULE_EN
+       KAL_TASK_HANDLE  DNScTask_TaskHandle;
+       KAL_SEM_HANDLE   DNScTask_SignalHandle;
+#else
+const  DNSc_CFG        *DNScTask_CfgPtr;
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  DNSc_TASK_MODULE_EN
+static  void  DNScTask       (void  *p_arg);
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                            DNScTask_Init()
+*
+* Description : Initialize DNSc task module.
+*
+* Argument(s) : p_cfg   Pointer to the DNSc configuration.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE           Successfully initialized
+*                           DNSc_ERR_MEM_ALLOC      Memory allocation error.
+*                           DNSc_ERR_FAULT_INIT     Fault during OS object initialization.
+*
+*
+* Return(s)   : None.
+*
+* Caller(s)   : DNSc_Init().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  DNScTask_Init (const  DNSc_CFG       *p_cfg,
+                     const  DNSc_CFG_TASK  *p_task_cfg,
+                            DNSc_ERR       *p_err)
+{
+#ifdef  DNSc_TASK_MODULE_EN
+    void     *p_stack = DEF_NULL;
+    KAL_ERR   kal_err;
+
+
+#if (DNSc_CFG_ARG_CHK_EN == DEF_ENABELD)
+    if (p_task_cfg == DEF_NULL) {
+       *p_err = DNSc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+
+    DNScTask_SignalHandle = KAL_SemCreate("DNSc Task Signal",
+                                           DEF_NULL,
+                                          &kal_err);
+    switch (kal_err) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = DNSc_ERR_MEM_ALLOC;
+             goto exit;
+
+        default:
+            *p_err = DNSc_ERR_FAULT_INIT;
+             goto exit;
+    }
+
+    if (p_task_cfg->StkPtr != DEF_NULL) {
+        p_stack = (void *)p_task_cfg->StkPtr;
+    }
+
+    DNScTask_TaskHandle = KAL_TaskAlloc("DNSc Task",
+                                         p_stack,
+                                         p_task_cfg->StkSizeBytes,
+                                         DEF_NULL,
+                                        &kal_err);
+    switch (kal_err) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = DNSc_ERR_MEM_ALLOC;
+             goto exit;
+
+        default:
+            *p_err = DNSc_ERR_FAULT_INIT;
+             goto exit;
+    }
+
+
+    KAL_TaskCreate(DNScTask_TaskHandle,
+                  &DNScTask,
+           (void *)p_cfg,
+                   p_task_cfg->Prio,
+                   DEF_NULL,
+                  &kal_err);
+    switch (kal_err) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = DNSc_ERR_MEM_ALLOC;
+             goto exit;
+
+        default:
+            *p_err = DNSc_ERR_FAULT_INIT;
+             goto exit;
+    }
+
+
+   *p_err = DNSc_ERR_NONE;
+
+exit:
+#else
+    DNScTask_CfgPtr = p_cfg;
+#endif
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        DNScTask_ResolveHost()
+*
+* Description : Function to submit a host resolution to the task or to perform host resolution.
+*
+* Argument(s) : p_host  Pointer to the Host object.
+*
+*               flags   Request flag option
+*
+*               p_cfg   Request configuration.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           DNSc_ERR_NONE               Resolution submitted or completed.
+*                           DNSc_ERR_TASK_SIGNAL
+*
+*                           RETURNED BY DNScCache_HostInsert():
+*                               See DNScCache_HostInsert() for additional return error codes.
+*
+*                           RETURNED BY DNScCache_ProcessHost():
+*                               See DNScCache_ProcessHost() for additional return error codes.
+*
+*
+* Return(s)   : Resolution status:
+*                       DNSc_STATUS_PENDING         Host resolution is pending, call again to see the status. (Processed by DNSc's task)
+*                       DNSc_STATUS_RESOLVED        Host is resolved.
+*                       DNSc_STATUS_FAILED          Host resolution has failed.
+*
+* Caller(s)   : DNSc_GetHost().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+DNSc_STATUS  DNScTask_HostResolve (DNSc_HOST_OBJ  *p_host,
+                                   DNSc_FLAGS      flags,
+                                   DNSc_REQ_CFG   *p_cfg,
+                                   DNSc_ERR       *p_err)
+{
+#ifdef DNSc_TASK_MODULE_EN
+    KAL_ERR  err;
+#endif
+    DNSc_STATUS  status = DNSc_STATUS_NONE;
+
+
+    DNScCache_HostInsert(p_host, p_err);
+    if (*p_err != DNSc_ERR_NONE) {
+         goto exit;
+    }
+
+
+#ifdef DNSc_TASK_MODULE_EN
+    KAL_SemPost(DNScTask_SignalHandle, KAL_OPT_POST_NONE, &err);
+
+
+#ifdef  DNSc_SIGNAL_TASK_MODULE_EN
+    if (DEF_BIT_IS_SET(flags, DNSc_FLAG_NO_BLOCK) == DEF_NO) {
+        KAL_ERR  err_muck;
+
+
+        status = DNSc_STATUS_UNKNOWN;
+        KAL_SemPend(p_host->TaskSignal, KAL_OPT_PEND_BLOCKING, 0u, &err);
+        KAL_SemDel(p_host->TaskSignal, &err_muck);
+       (void)&err_muck;
+        p_host->TaskSignal = KAL_SemHandleNull;
+        if (err != KAL_ERR_NONE) {
+           *p_err = DNSc_ERR_TASK_SIGNAL;
+            goto exit_cache_remove;
+        }
+
+    } else {
+        status = DNSc_STATUS_PENDING;
+    }
+#endif  /* DNSc_SIGNAL_TASK_MODULE_EN */
+
+#else
+    status = DNSc_STATUS_PENDING;
+    while (status == DNSc_STATUS_PENDING) {
+        CPU_INT16U  dly = DNScTask_CfgPtr->TaskDly_ms;
+
+
+        if (p_cfg != DEF_NULL) {
+            dly = p_cfg->TaskDly_ms;
+        }
+
+
+        status = DNScCache_ResolveHost(DNScTask_CfgPtr, p_host, p_err);
+
+        KAL_Dly(dly);
+    }
+
+    if (status == DNSc_STATUS_FAILED) {
+        goto exit_cache_remove;
+    }
+
+#endif  /* DNSc_TASK_MODULE_EN */
+
+
+    goto exit;
+
+exit_cache_remove:
+    DNScCache_HostRemove(p_host);
+    status = DNSc_STATUS_FAILED;
+
+
+
+exit:
+    return (status);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              DNScTask()
+*
+* Description : DNSc's task.
+*
+* Argument(s) : p_arg   Pointer to task argument, should be the DNSc's configuration.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Referenced by DNScTask_Init().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef  DNSc_TASK_MODULE_EN
+static  void  DNScTask (void  *p_arg)
+{
+    const  DNSc_CFG    *p_cfg           = (const DNSc_CFG *)p_arg;
+           CPU_INT16U   nb_req_active   =  0u;
+           CPU_INT16U   nb_req_resolved =  0u;
+           KAL_OPT      opt;
+           KAL_ERR      kal_err;
+           DNSc_ERR     dns_err;
+
+
+
+    while (DEF_ON) {
+        opt = KAL_OPT_PEND_NONE;
+        if (nb_req_active > 0u) {
+            DEF_BIT_SET(opt, KAL_OPT_PEND_NON_BLOCKING);
+        }
+
+        KAL_SemPend(DNScTask_SignalHandle, opt, 0, &kal_err);
+        switch (kal_err) {
+            case KAL_ERR_NONE:
+                 nb_req_active++;
+                 break;
+
+            default:
+                 break;
+        }
+
+        nb_req_resolved = DNScCache_ResolveAll(p_cfg, &dns_err);
+        if (nb_req_resolved < nb_req_active) {
+            nb_req_active  -= nb_req_resolved;
+        } else {
+            nb_req_active   = 0u;
+        }
+
+        KAL_Dly(p_cfg->TaskDly_ms);
+    }
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_task.h b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_task.h
new file mode 100644
index 0000000..1f39acd
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_task.h
@@ -0,0 +1,82 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       DNS CLIENT TASK MODULE
+*
+* Filename      : dns-c_task.h
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included
+*                     in the project build :
+*
+*                     (a) uC/Common-KAL V1.00.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  DNSc_KAL_PRESENT
+#define  DNSc_TASK_PRESENT
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "dns-c.h"
+#include  "dns-c_type.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void         DNScTask_Init       (const  DNSc_CFG       *p_cfg,
+                                  const  DNSc_CFG_TASK  *p_task_cfg,
+                                         DNSc_ERR       *p_err);
+
+DNSc_STATUS  DNScTask_HostResolve(       DNSc_HOST_OBJ  *p_host,
+                                         DNSc_FLAGS      flags,
+                                         DNSc_REQ_CFG   *p_cfg,
+                                         DNSc_ERR       *p_err);
+
+#endif  /* DNSc_KAL_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_type.h b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_type.h
new file mode 100644
index 0000000..d0a3887
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_type.h
@@ -0,0 +1,79 @@
+/*
+*********************************************************************************************************
+*                                               uC/DNSc
+*                                     Domain Name Server (client)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/DNSc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     DNS CLIENT TYPE DEFINITION
+*
+* Filename      : dns-c_type.h
+* Version       : V2.00.03
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : None.
+*********************************************************************************************************
+*/
+
+#ifndef DNSc_TYPE_PRESENT
+#define DNSc_TYPE_PRESENT
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           DNS CFG DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct  DNSc_cfg_task {
+    CPU_INT32U  Prio;
+    CPU_INT16U  StkSizeBytes;
+    CPU_ADDR    StkPtr;
+} DNSc_CFG_TASK;
+
+
+typedef  struct DNSc_cfg {
+    MEM_SEG        *MemSegPtr;
+
+    CPU_CHAR       *ServerDfltPtr;
+    CPU_INT16U      HostNameLenMax;
+
+    CPU_INT08U      CacheEntriesMaxNbr;
+
+    CPU_INT08U      AddrIPv4MaxPerHost;
+    CPU_INT08U      AddrIPv6MaxPerHost;
+
+    CPU_INT08U      TaskDly_ms;
+    CPU_INT08U      ReqRetryNbrMax;
+    CPU_INT16U      ReqRetryTimeout_ms;
+} DNSc_CFG;
+
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-DNSc/subdir.mk b/src/ucos_v1_42/micrium_source/uC-DNSc/subdir.mk
new file mode 100644
index 0000000..2b6d537
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-DNSc/subdir.mk
@@ -0,0 +1,6 @@
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_cache.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_req.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-DNSc/Source/dns-c_task.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-DNSc/Cmd/dns-c_cmd.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-DNSc/Cfg/Template/dns-c_cfg.c
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/CFG/Template/fs_cfg.h b/src/ucos_v1_42/micrium_source/uC-FS/CFG/Template/fs_cfg.h
new file mode 100644
index 0000000..f81c5b3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/CFG/Template/fs_cfg.h
@@ -0,0 +1,462 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   FILE SYSTEM CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : fs_cfg.h
+* Version       : v4.07.00
+* Programmer(s) : FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                 MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_CFG_H
+#define  FS_CFG_H
+
+
+/*
+*********************************************************************************************************
+*                                                INCLUDE
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                       FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) Configure FS_CFG_SYS_DRV_SEL to select file system driver inclusion :
+*               (a) When FS_SYS_DRV_SEL_FAT, the FAT file system driver will be used.
+*
+*           (2) Configure FS_CFG_CACHE_EN to enable/disable the cache support :
+*               (a) When ENABLED,  cache functionality will be     available.
+*               (b) When DISABLED, cache functionality will be NOT available.
+*
+*           (3) Configure FS_CFG_API_EN to enable/disable presence of POSIX-compatible API :
+*               (a) When ENABLED,  POSIX-compatible API will     be present.
+*               (b) When DISABLED, POSIX-compatible API will NOT be present.
+*
+*           (4) Configure FS_CFG_DIR_EN to enable/disable presence of directory access module :
+*               (a) When ENABLED,  directory access module will     be present.
+*               (b) When DISABLED, directory access module will NOT be present.
+*
+*           (5) Configure FS_CFG_FILE_BUF_EN to enable/disable file buffer support :
+*               (a) When ENABLED,  file read/write buffer functionality will     be available.
+*               (b) When DISABLED, file read/write buffer functionality will NOT be available.
+*
+*           (6) Configure FS_CFG_FILE_LOCK_EN to enable/disable file lock functionality :
+*               (a) When ENABLED,  a file can be  locked across    operations.
+*               (b) When DISABLED, a file is only locked during an operation.
+*
+*           (7) Configure FS_CFG_PARTITION_EN to enable/disable extended support for partitions :
+*               (a) When ENABLED,  volumes can    be opened on secondary partitions & partitions can    be created.
+*               (b) When DISABLED, volumes cannot be opened on secondary partitions & partitions cannot be created.
+*
+*           (8) Configure FS_CFG_WORKING_DIR_EN to enable/disable working directory support :
+*               (a) When ENABLED,  file system operations can be performed relative to a working directory.
+*               (b) When DISABLED, all file system operations MUST be performed on absolute paths.
+*
+*           (9) Configure FS_CFG_UTF8_EN to enable/disable UTF-8 support :
+*               (a) When ENABLED,  file names may  be specified in UTF-8.
+*               (b) When DISABLED, file names must be specified in ASCII.
+*
+*          (10) Configure FS_CFG_RD_ONLY_EN to enable/disable file/volume/device write access :
+*               (a) When ENABLED,  files, volumes & devices may only be read.  Code for write operations
+*                   is NOT included.
+*               (b) When DISABLED, files, volumes & devices may be read & written.
+*
+*          (11) Configure FS_CFG_CONCURRENT_ENTRIES_ACCESS_EN to enable/disable file/dir concurrent access :
+*               (a) When ENABLED,  concurrent access is     allowed, and operations are more flexible.
+*               (b) When DISABLED, concurrent access is not allowed, and operations are safer.
+*
+*          (12) Configure FS_CFG_64_BITS_LBA_EN to enable/disable 64-bit LBA (logical block addressing) :
+*               (a) When ENABLED,  devices can contain up to 2^64 sectors of storage.
+*               (b) When DISABLED, devices can contain up to 2^32 sectors of storage.
+*
+*          (13) Configure FS_CFG_BUF_ALIGN_OCTETS to set the minimum buffer alignement required in 
+*               octets. This configuration will be applied to filesystem buffers only. Application
+*               buffers allocated in the application are not verified for alignment.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure file system driver presence (see Note #1) :*/
+#define  FS_CFG_SYS_DRV_SEL                      FS_SYS_DRV_SEL_FAT
+                                                                /*   FS_SYS_DRV_SEL_FAT  FAT file system driver present.*/
+
+
+                                                                /* Configure POSIX API presence (see Note #3) :         */
+#define  FS_CFG_API_EN                           DEF_ENABLED
+                                                                /*   DEF_DISABLED   POSIX API NOT present.              */
+                                                                /*   DEF_ENABLED    POSIX API     present.              */
+
+
+                                                                /* Configure cache support (see Note #2) :              */
+#define  FS_CFG_CACHE_EN                         DEF_DISABLED
+                                                                /*   DEV_DISABLED   cache NOT supported.                */
+                                                                /*   DEV_ENABLED    cache     supported.                */
+
+
+                                                                /* Configure directory module presence (see Note #4) :  */
+#define  FS_CFG_DIR_EN                           DEF_ENABLED
+                                                                /*   DEF_DISABLED   Directory module NOT present.       */
+                                                                /*   DEF_ENABLED    Directory module     present.       */
+
+
+                                                                /* Configure file buf support (see Note #5) :           */
+#define  FS_CFG_FILE_BUF_EN                      DEF_ENABLED
+                                                                /*   DEF_DISABLED   File data rd/wr directly from vol.  */
+                                                                /*   DEF_ENABLED    File buffer can be assigned.        */
+
+
+                                                                /* Configure file lock support (see Note #6) :          */
+#define  FS_CFG_FILE_LOCK_EN                     DEF_DISABLED
+                                                                /*   DEF_DISABLED   Files only locked during single op. */
+                                                                /*   DEF_ENABLED    A file may be locked across op's.   */
+
+
+                                                                /* Configure partition support (see Note #7) :          */
+#define  FS_CFG_PARTITION_EN                     DEF_DISABLED
+                                                                /*   DEF_DISABLED   Partition creation NOT supported.   */
+                                                                /*   DEF_ENABLED    Partition creation     supported.   */
+
+
+                                                                /* Configure working directory support (see Note #8) :  */
+#define  FS_CFG_WORKING_DIR_EN                   DEF_DISABLED
+                                                                /*   DEF_DISABLED   Working directory NOT supported.    */
+                                                                /*   DEF_ENABLED    Working directory     supported.    */
+
+
+                                                                /* Configure UTF8  support (see Note #9) :              */
+#define  FS_CFG_UTF8_EN                          DEF_DISABLED
+                                                                /*   DEF_DISABLED   File names specified in ASCII.      */
+                                                                /*   DEF_ENABLED    File names specified in UTF-8.      */
+
+
+                                                                /* Configure read-only operation (see Note #10) :       */
+#define  FS_CFG_RD_ONLY_EN                       DEF_DISABLED
+                                                                /*   DEF_DISABLED   Read & write operations may be done.*/
+                                                                /*   DEF_ENABLED    Only read operations may be done.   */
+
+
+                                                                /* Config concurrent access to entries (see Note #11) : */
+#define  FS_CFG_CONCURRENT_ENTRIES_ACCESS_EN     DEF_DISABLED
+                                                                /*   DEF_DISABLED   Concurrent access NOT allowed.      */
+                                                                /*   DEF_ENABLED    Concurrent access     allowed       */
+
+
+                                                                /* Config support of 64-bit LBA (see Note #12) :        */
+#define  FS_CFG_64_BITS_LBA_EN                   DEF_DISABLED
+                                                                /*   DEF_DISABLED   LBA limited to 32 bits.             */
+                                                                /*   DEF_ENABLED    LBA limited to 64 bits.             */
+
+
+                                                                /* Config min alignment of buf's     (see Note #13) :   */
+#define  FS_CFG_BUF_ALIGN_OCTETS                 sizeof(CPU_DATA)
+
+
+/*
+*********************************************************************************************************
+*                             FILE SYSTEM NAME RESTRICTION CONFIGURATION
+*
+* Note(s) : (1) Configure FS_CFG_MAX_PATH_NAME_LEN with the desired maximum path name length.
+*           (2) Configure FS_CFG_MAX_FILE_NAME_LEN with the desired maximum file name length.
+*           (3) Configure FS_CFG_MAX_VOL_NAME_LEN with the desired maximum volume name length.
+*
+*               A full file name is composed of an explicit volume name (optionally) & a path name; the
+*               characters after the last non-final path separator character ('\') are the file name :
+*
+*                   |                                                            |
+*                   |---------------------- FULL NAME LENGTH --------------------|
+*                   |                                                            |
+*
+*                     	     |                                                   |
+*                    	     |----------------- PATH NAME LENGTH ----------------|
+*                    	     |                                                   |
+*
+*                   myvolume:\MyDir0\MyDir1\MyDir2\my_very_very_long_file_name.txt
+*
+*                   |       |                      |                             |
+*                   |---o---|                      |------ FILE NAME LENGTH -----|
+*                   |   |   |                      |                             |
+*                       |
+*                       ------ VOLUME NAME LENGTH
+*
+*               The constant 'FS_CFG_MAX_FULL_NAME_LEN' is defined in 'fs_cfg_fs.h' to describe the
+*               maximum full name length, as shown in this diagram.
+*
+*
+*           (4) Configure FS_CFG_MAX_DEV_DRV_NAME_LEN with the desired maximum device driver name length.
+*           (5) Configure FS_CFG_MAX_DEV_NAME_LEN with the desired maximum device name length.
+*
+*               A device name is composed of a device driver name, a colon, an integer (the unit number)
+*               and a final colon :
+*
+*                       ------------ DEVICE NAME LENGTH
+*                       |
+*                   |   |   |
+*                   |---o---|
+*                   |       |
+*                   sdcard:0:
+*                   |    |
+*                   |-o--|
+*                   | |  |
+*                     |
+*                     -------------- DEVICE DRIVER NAME LENGTH
+*
+*
+*               Each of these maximum name length configurations specifies the maximum string length
+*               WITHOUT the NULL character.  Consequently, a buffer which holds one of these names
+*               must be one character longer than the define value.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure maximum device name length (see Note #5).  */
+#define  FS_CFG_MAX_DEV_NAME_LEN                          15u
+
+                                                                /* Configure maximum device driver name length ...      */
+                                                                /* ... (see Note #4).                                   */
+#define  FS_CFG_MAX_DEV_DRV_NAME_LEN                      10u
+
+                                                                /* Configure maximum file name length (see Note #2).    */
+#define  FS_CFG_MAX_FILE_NAME_LEN                        255u
+
+                                                                /* Configure maximum path name length (see Note #1).    */
+#define  FS_CFG_MAX_PATH_NAME_LEN                        260u
+
+                                                                /* Configure maximum volume name length (see Note #3).  */
+#define  FS_CFG_MAX_VOL_NAME_LEN                          10u
+
+/*
+*********************************************************************************************************
+*                                     FILE SYSTEM DEBUG CONFIGURATION
+*
+* Note(s) : (1) Configure FS_CFG_DBG_MEM_CLR_EN to enable/disable the file system suite from clearing
+*               internal data structure memory buffers; a convenient feature while debugging.
+*
+*           (2) Configure FS_CFG_DBG_WR_VERIFY_EN to enable/disable the file system suite from verifying
+*               writes by reading back data; a convenient feature while debugging a driver.
+*********************************************************************************************************
+*/
+                                                                /* Configure memory clear feature (see Note #1) :       */
+#define  FS_CFG_DBG_MEM_CLR_EN                  DEF_ENABLED
+                                                                /*   DEF_DISABLED  Data structure clears DISABLED       */
+                                                                /*   DEF_ENABLED   Data structure clears ENABLED        */
+
+
+                                                                /* Configure write verification feature (see Note #2) : */
+#define  FS_CFG_DBG_WR_VERIFY_EN                DEF_DISABLED
+                                                                /*   DEF_DISABLED  Write verification feature DISABLED  */
+                                                                /*   DEF_ENABLED   Write verification feature ENABLED   */
+
+/*
+*********************************************************************************************************
+*                                FILE SYSTEM ARGUMENT CHECK CONFIGURATION
+*
+* Note(s) : (1) Configure FS_ERR_CFG_ARG_CHK_EXT_EN to enable/disable the file system suite external
+*               argument check feature :
+*               (a) When ENABLED,  ALL arguments received from any port interface provided by the developer
+*                   or application are checked/validated.
+*               (b) When DISABLED, NO  arguments received from any port interface provided by the developer
+*                   or application are checked/validated.
+*
+*           (2) Configure FS_ERR_CFG_ARG_CHK_DBG_EN to enable/disable the file system suite internal,
+*               debug argument check feature :
+*               (a) When ENABLED,     internal arguments are checked/validated to debug the file system
+*                   suite.
+*               (b) When DISABLED, NO internal arguments are checked/validated to debug the file system
+*                   suite.
+*********************************************************************************************************
+*/
+                                                                /* Configure external argument check feature ...        */
+                                                                /* ... (see Note #1) :                                  */
+#define  FS_CFG_ERR_ARG_CHK_EXT_EN              DEF_ENABLED
+                                                                /*   DEF_DISABLED     Argument check DISABLED           */
+                                                                /*   DEF_ENABLED      Argument check ENABLED            */
+
+
+                                                                /* Configure internal argument check feature :          */
+                                                                /* ... (see Note #2) :                                  */
+#define  FS_CFG_ERR_ARG_CHK_DBG_EN              DEF_ENABLED
+                                                                /*   DEF_DISABLED     Argument check DISABLED           */
+                                                                /*   DEF_ENABLED      Argument check ENABLED            */
+
+/*
+*********************************************************************************************************
+*                              FILE SYSTEM COUNTER MANAGEMENT CONFIGURATION
+*
+* Note(s) : (1) Configure FS_CTR_CFG_STAT_EN to enable/disable file system suite statistics counters.
+*
+*           (2) Configure FS_CTR_CFG_ERR_EN  to enable/disable file system suite error      counters.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure statistics counter feature (see Note #1) : */
+#define  FS_CFG_CTR_STAT_EN                     DEF_DISABLED
+                                                                /*   DEF_DISABLED     Stat  counters DISABLED           */
+                                                                /*   DEF_ENABLED      Stat  counters ENABLED            */
+
+
+                                                                /* Configure error      counter feature (see Note #2) : */
+#define  FS_CFG_CTR_ERR_EN                      DEF_DISABLED
+                                                                /*   DEF_DISABLED     Error counters DISABLED           */
+                                                                /*   DEF_ENABLED      Error counters ENABLED            */
+
+/*
+*********************************************************************************************************
+*                                      FILE SYSTEM FAT CONFIGURATION
+*
+* Note(s) : (1) Configure FS_FAT_CFG_LFN_EN to enable/disable the file long file name support :
+*               (a) When ENABLED,  long file name entries may     be used.
+*               (b) When DISABLED, long file name entries may NOT be used.
+*
+*           (2) Configure FS_FAT_CFG_FAT12_EN to enable/disable FAT12 support :
+*               (a) When ENABLED,  FAT12 volumes can         be accessed &   formatted.
+*               (b) When DISABLED, FAT12 volumes can neither be accessed nor formatted.
+*
+*           (3) Configure FS_FAT_CFG_FAT16_EN to enable/disable FAT12 support :
+*               (a) When ENABLED,  FAT12 volumes can         be accessed &   formatted.
+*               (b) When DISABLED, FAT12 volumes can neither be accessed nor formatted.
+*
+*           (4) Configure FS_FAT_CFG_FAT32_EN to enable/disable FAT12 support :
+*               (a) When ENABLED,  FAT12 volumes can         be accessed &   formatted.
+*               (b) When DISABLED, FAT12 volumes can neither be accessed nor formatted.
+*
+*           (5) Configure FS_FAT_CFG_JOURNAL_EN to enable/disable presence of journaling access module :
+*               (a) When ENABLED,  journaling access module will     be present.
+*               (b) When DISABLED, journaling access module will NOT be present.
+*
+*           (6) Configure FS_FAT_CFG_VOL_CHK_EN to enable/disable volume check support :
+*               (a) When ENABLED,  volume integrity can     be checked.  If enabled, FS_FAT_CFG_VOL_CHK_MAX_LEVELS
+*                   is the maximum number of directory levels that will be checked.
+*               (b) When DISABLED, volume integrity can NOT be checked.
+*********************************************************************************************************
+*/
+                                                                /* Configure Long File Name support   (see Note #1) :   */
+#define  FS_FAT_CFG_LFN_EN                       DEF_ENABLED
+                                                                /*   DEF_DISABLED   LFN NOT supported.                  */
+                                                                /*   DEF_ENABLED    LFN     supported.                  */
+
+
+                                                                /* Configure FAT12 support (see Note #2) :              */
+#define  FS_FAT_CFG_FAT12_EN                     DEF_ENABLED
+                                                                /*   DEF_DISABLED   FAT12 NOT supported.                */
+                                                                /*   DEF_ENABLED    FAT12     supported.                */
+
+
+                                                                /* Configure FAT16 support (see Note #3) :              */
+#define  FS_FAT_CFG_FAT16_EN                     DEF_ENABLED
+                                                                /*   DEF_DISABLED   FAT16 NOT supported.                */
+                                                                /*   DEF_ENABLED    FAT16     supported.                */
+
+
+                                                                /* Configure FAT32 support (see Note #4) :              */
+#define  FS_FAT_CFG_FAT32_EN                     DEF_ENABLED
+                                                                /*   DEF_DISABLED   FAT32 NOT supported.                */
+                                                                /*   DEF_ENABLED    FAT32     supported.                */
+
+
+                                                                /* Configure journaling support (see Note #5) :         */
+#define  FS_FAT_CFG_JOURNAL_EN                   DEF_DISABLED
+                                                                /*   DEF_DISABLED   Journaling NOT supported.           */
+                                                                /*   DEF_ENABLED    Journaling     supported.           */
+
+
+                                                                /* Configure volume check support (see Note #6) :       */
+#define  FS_FAT_CFG_VOL_CHK_EN                   DEF_DISABLED
+                                                                /*   DEF_DISABLED   Volume check NOT supported.         */
+                                                                /*   DEF_ENABLED    Volume check     supported.         */
+
+
+                                                                /* Configure max levels chk'd (see Note #6).            */
+#define  FS_FAT_CFG_VOL_CHK_MAX_LEVELS                    20u
+
+/*
+*********************************************************************************************************
+*                           FILE SYSTEM SD/MMC DEVICE DRIVER CONFIGURATION
+*
+* Note(s) : (1) Configure FS_DEV_SD_SPI_CFG_CRC_EN to enable/disable CRC generation & checking for data
+*               writes & reads.
+*               (a) When enabled, a CRC will be generated for data written to the card, & the CRC of
+*                   received data will be checked.
+*               (b) When disabled, no CRC will be generated for data written to the card, & the CRC of
+*                   received data will not be checked.
+*********************************************************************************************************
+*/
+                                                                 /* Configure data CRC generation/check (see Note #2).   */
+#define  FS_DEV_SD_SPI_CFG_CRC_EN                DEF_DISABLED
+
+
+/*
+*********************************************************************************************************
+*                                         FILE SYSTEM TRACING
+*
+* Note(s) : (1) Configure FS_TRACE_LEVEL with the desired output trace level :
+*               (a) TRACE_LEVEL_OFF  will disable all output from the filesystem.
+*
+*               (b) TRACE_LEVEL_INFO will enable  minimum trace for important events (opening a device,
+*                   initialization errors, etc).
+*
+*               (c) TRACE_LEVEL_DBG  will enable  general debugging trace and INFO trace.
+*
+*               (d) TRACE_LEVEL_LOG  will enable  all trace, including low-level information trace.
+*
+*           (2) Configure FS_TRACE to the 'printf' style function that will be used to output all the
+*               tracing messages. If FS_TRACE_LEVEL is configured to TRACE_LEVEL_OFF, there is no need
+*               to configure FS_TRACE.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure file system trace lvl (see Note #1) :      */
+#define  FS_TRACE_LEVEL                     TRACE_LEVEL_OFF
+                                                                /* TRACE_LEVEL_OFF      Output trace DISABLED.          */
+                                                                /* TRACE_LEVEL_INFO     Info   trace ENABLED.           */
+                                                                /* TRACE_LEVEL_DBG      Debug  trace ENABLED.           */
+                                                                /* TRACE_LEVEL_LOG      Log    trace ENABLED.           */
+
+
+                                                                /* Configure file system trace function (see Note #2) : */
+#define  FS_TRACE                           printf
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Cmd/fs_shell.h b/src/ucos_v1_42/micrium_source/uC-FS/Cmd/fs_shell.h
new file mode 100644
index 0000000..0879498
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Cmd/fs_shell.h
@@ -0,0 +1,380 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          FS SHELL COMMANDS
+*
+* Filename      : fs_shell.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/Shell V1.00 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_SHELL_PRESENT                                       /* See Note #1.                                         */
+#define  FS_SHELL_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_SHELL_MODULE
+#define  FS_SHELL_EXT
+#else
+#define  FS_SHELL_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+#include  "../Source/fs.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  FSShell_Init(void);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  FS_SHELL_CFG_BUF_LEN
+#error  "FS_SHELL_CFG_BUF_LEN                  not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be >=   256]                     "
+#error  "                                [     && <= 65535]                     "
+
+#elif  ((FS_SHELL_CFG_BUF_LEN <                256u) || \
+        (FS_SHELL_CFG_BUF_LEN > DEF_INT_16U_MAX_VAL))
+#error  "FS_SHELL_CFG_BUF_LEN            illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be >=   256]                     "
+#error  "                                [     && <= 65535]                     "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_CAT_EN
+#error  "FS_SHELL_CFG_CMD_CAT_EN               not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_CAT_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_CAT_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_CAT_EN         illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_CD_EN
+#error  "FS_SHELL_CFG_CMD_CD_EN                not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_CD_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_CD_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_CD_EN          illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_CP_EN
+#error  "FS_SHELL_CFG_CMD_CP_EN                not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_CP_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_CP_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_CP_EN          illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_DATE_EN
+#error  "FS_SHELL_CFG_CMD_DATE_EN              not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_DATE_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_DATE_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_DATE_EN        illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_DF_EN
+#error  "FS_SHELL_CFG_CMD_DF_EN                not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_DF_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_DF_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_DF_EN          illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_LS_EN
+#error  "FS_SHELL_CFG_CMD_LS_EN                not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_LS_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_LS_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_LS_EN          illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_MKDIR_EN
+#error  "FS_SHELL_CFG_CMD_MKDIR_EN             not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_MKDIR_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_MKDIR_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_MKDIR_EN       illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_MKFS_EN
+#error  "FS_SHELL_CFG_CMD_MKFS_EN              not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_MKFS_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_MKFS_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_MKFS_EN        illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_MOUNT_EN
+#error  "FS_SHELL_CFG_CMD_MOUNT_EN             not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_MOUNT_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_MOUNT_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_MOUNT_EN       illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_MV_EN
+#error  "FS_SHELL_CFG_CMD_MV_EN                not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_MV_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_MV_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_MV_EN          illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_OD_EN
+#error  "FS_SHELL_CFG_CMD_OD_EN                not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_OD_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_OD_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_OD_EN          illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_PWD_EN
+#error  "FS_SHELL_CFG_CMD_PWD_EN               not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_PWD_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_PWD_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_PWD_EN         illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_RM_EN
+#error  "FS_SHELL_CFG_CMD_RM_EN                not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_RM_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_RM_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_RM_EN          illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_RMDIR_EN
+#error  "FS_SHELL_CFG_CMD_RMDIR_EN               not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_RMDIR_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_RMDIR_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_RMDIR_EN       illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_TOUCH_EN
+#error  "FS_SHELL_CFG_CMD_TOUCH_EN             not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_TOUCH_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_TOUCH_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_TOUCH_EN       illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_UMOUNT_EN
+#error  "FS_SHELL_CFG_CMD_UMOUNT_EN            not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_UMOUNT_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_UMOUNT_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_UMOUNT_EN      illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+
+#ifndef  FS_SHELL_CFG_CMD_WC_EN
+#error  "FS_SHELL_CFG_CMD_WC_EN                not #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+
+#elif  ((FS_SHELL_CFG_CMD_WC_EN != DEF_DISABLED) && \
+        (FS_SHELL_CFG_CMD_WC_EN != DEF_ENABLED))
+#error  "FS_SHELL_CFG_CMD_WC_EN          illegally #define'd in 'fs_shell_cfg.h'"
+#error  "                                [MUST be DEF_DISABLED]                 "
+#error  "                                [     || DEF_ENABLED ]                 "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of FS_SHELL module include.                      */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/IDE/fs_dev_ide.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/IDE/fs_dev_ide.h
new file mode 100644
index 0000000..d2fa8f3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/IDE/fs_dev_ide.h
@@ -0,0 +1,255 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                             IDE DEVICES
+*
+* Filename      : fs_dev_ide.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Reference(s)  : (1) CompactFlash Association.  "CF+ and CompactFlash Specification Revision 4.1".
+*                     002/16/07.
+*
+*                 (2) ANSI.  "AT Attachment with Packet Interface - 6 -- (ATA/ATAPI-6)."
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_IDE_PRESENT
+#define  FS_DEV_IDE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_IDE_MODULE
+#define  FS_DEV_IDE_EXT
+#else
+#define  FS_DEV_IDE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/fs_dev.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            MODE DEFINES
+*
+* Note(s) : (1) (a) True IDE PIO timing modes 0, 1, 2, 3 & 4 are defined in [Ref 2].  Additional CF-
+*                   specific PIO timing modes 5 & 6 are defined by [Ref 1].  Timings for all modes are
+*                   given in [Ref 1], Table 21.
+*
+*               (b) True IDE Multiword DMA timing modes 0, 1 & 2 are defined by [Ref 2].  Additional CF-
+*                   specific multiword DMA timing modes 3 & 4 are defined by [Ref 1].  Timings for all
+*                   modes are given in [Ref 1], Table 21.
+*
+*               (c) Ultra DMA timing modes 0, 1, 2, 3, 4, 5 & 6 are defined by [Ref 2].
+*
+*           (2) Multiword DMA is NEVER supported for CF cards accessed in PC Card Memory or PC Card I/O
+*               interface Mode.  (See [Ref 1] Table 58.)
+*
+*           (3) ALL IDE device & host controllers MUST support PIO mode.
+*********************************************************************************************************
+*/
+
+#define  FS_DEV_IDE_MODE_TYPE_PIO                 DEF_BIT_03    /* PIO mode.                                            */
+#define  FS_DEV_IDE_MODE_TYPE_DMA                 DEF_BIT_05    /* Multiword DMA mode.                                  */
+#define  FS_DEV_IDE_MODE_TYPE_UDMA                DEF_BIT_06    /* Ultra DMA mode.                                      */
+
+/*
+*********************************************************************************************************
+*                                          REGISTER DEFINES
+*
+* Note(s) : (1) See [Ref 1], Section 6.1.5 'CF-ATA Registers'.  The register define values are the
+*               offsets for contiguous I/O or memory mapped addressing.
+*
+*           (2) The register define values may NOT be the appropriate bus/memory offset.  [Ref 1], Tables
+*               4 'Pin Assignments and Pin Type', 47 'Memory Mapped Decoding' & 48 'True IDE Mode I/O
+*               Decoding', in addition to MCU/MPU datasheets and hardware schematics should be used to
+*               determine the correct offset.
+*
+*               (a) For a primary   I/O mapped drive, the offsets may be 0x1F0-0x1F7, 0x3F6-0x3F7.
+*               (b) For a secondary I/O mapped drive, the offsets may be 0x170-0x177, 0x376-0x377.
+*               (c) In contiguous I/O & memory mapped addressing, several duplicate registers are available :
+*                   (1) Duplicate even data @ 0x08
+*                   (2) Duplicate odd  data @ 0x09
+*                   (3) Duplicate error/features @ 0x0D
+*               (d) In true IDE mode, ...
+*                   (1) the registers DATA, ERR/FR, SC, SN, CYL, CYH, DH & STATUS/CMD are accessed at
+*                       locations 0x00-0x07 with nCE1 active & nCE2 inactive.
+*                   (2) the registers ALTSTATUS/DEVCTRL & DRVADDR are accessed at locations 0x06-0x07
+*                       with nCE1 inactive & nCE2 active.
+*
+*           (3) The SN, CYL & CYH registers are also called the LBA_LOW, LBA_MID & LBA_HIGH registers.
+*********************************************************************************************************
+*/
+
+#define  FS_DEV_IDE_REG_DATA                            0x00u   /* Data Register.                                       */
+#define  FS_DEV_IDE_REG_ERR                             0x01u   /* Error Register (read).                               */
+#define  FS_DEV_IDE_REG_FR                              0x01u   /* Features Register (write).                           */
+#define  FS_DEV_IDE_REG_SC                              0x02u   /* Sector Count  Register.                              */
+#define  FS_DEV_IDE_REG_SN                              0x03u   /* Sector Number Register.                              */
+#define  FS_DEV_IDE_REG_CYL                             0x04u   /* Cylinder Low  Register.                              */
+#define  FS_DEV_IDE_REG_CYH                             0x05u   /* Cylinder High Register.                              */
+#define  FS_DEV_IDE_REG_DH                              0x06u   /* Card/Drive/Head Register.                            */
+#define  FS_DEV_IDE_REG_STATUS                          0x07u   /* Status Register (read).                              */
+#define  FS_DEV_IDE_REG_CMD                             0x07u   /* Command Register (write).                            */
+
+#define  FS_DEV_IDE_REG_ALTSTATUS                       0x0Eu   /* Alternate Status Register (read).                    */
+#define  FS_DEV_IDE_REG_DEVCTRL                         0x0Eu   /* Device Control Register (write).                     */
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern          const  FS_DEV_API  FSDev_IDE;
+FS_DEV_IDE_EXT         FS_CTR      FSDev_IDE_UnitCtr;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                 DEFINED IN BSP'S 'fs_dev_ide_bsp.c'
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  FSDev_IDE_BSP_Open             (FS_QTY        unit_nbr);   /* Open (initialize) hardware.                  */
+
+void         FSDev_IDE_BSP_Close            (FS_QTY        unit_nbr);   /* Close (uninitialize) hardware.               */
+
+void         FSDev_IDE_BSP_Lock             (FS_QTY        unit_nbr);   /* Acquire IDE bus lock.                        */
+
+void         FSDev_IDE_BSP_Unlock           (FS_QTY        unit_nbr);   /* Release IDE bus lock.                        */
+
+void         FSDev_IDE_BSP_Reset            (FS_QTY        unit_nbr);   /* Hardware-reset IDE device.                   */
+
+
+CPU_INT08U   FSDev_IDE_BSP_RegRd            (FS_QTY        unit_nbr,    /* Read data from IDE device register.          */
+                                             CPU_INT08U    reg);
+
+void         FSDev_IDE_BSP_RegWr            (FS_QTY        unit_nbr,    /* Write data to IDE device register.           */
+                                             CPU_INT08U    reg,
+                                             CPU_INT08U    val);
+
+void         FSDev_IDE_BSP_CmdWr            (FS_QTY        unit_nbr,    /* Write cmd to IDE device.                     */
+                                             CPU_INT08U    cmd[]);
+
+
+void         FSDev_IDE_BSP_DataRd           (FS_QTY        unit_nbr,    /* Read data from IDE device.                   */
+                                             void         *p_dest,
+                                             CPU_SIZE_T    cnt);
+
+void         FSDev_IDE_BSP_DataWr           (FS_QTY        unit_nbr,    /* Write data to IDE device.                    */
+                                             void         *p_src,
+                                             CPU_SIZE_T    cnt);
+
+
+void         FSDev_IDE_BSP_DMA_Start        (FS_QTY        unit_nbr,    /* Setup DMA for command (initialize channel).  */
+                                             void         *p_data,
+                                             CPU_SIZE_T    cnt,
+                                             FS_FLAGS      mode_type,
+                                             CPU_BOOLEAN   rd);
+
+void         FSDev_IDE_BSP_DMA_End          (FS_QTY        unit_nbr,    /* End DMA transfer (& uninitialize channel).   */
+                                             void         *p_data,
+                                             CPU_SIZE_T    cnt,
+                                             CPU_BOOLEAN   rd);
+
+
+CPU_INT08U   FSDev_IDE_BSP_GetDrvNbr        (FS_QTY        unit_nbr);   /* Get IDE drive number.                        */
+
+FS_FLAGS     FSDev_IDE_BSP_GetModesSupported(FS_QTY        unit_nbr);   /* Get supported transfer modes.                */
+
+CPU_INT08U   FSDev_IDE_BSP_SetMode          (FS_QTY        unit_nbr,    /* Set transfer mode.                           */
+                                             FS_FLAGS      mode_type,
+                                             CPU_INT08U    mode);
+
+void         FSDev_IDE_BSP_Dly400_ns        (FS_QTY        unit_nbr);   /* Delay for 400 ns.                            */
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of IDE module include.                           */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/MSC/fs_dev_msc.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/MSC/fs_dev_msc.h
new file mode 100644
index 0000000..bdd4223
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/MSC/fs_dev_msc.h
@@ -0,0 +1,138 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                     USB HOST MASS STORAGE CLASS
+*                                           for uC/USB-Host
+*
+* Filename      : fs_dev_msc.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/USB-Host V3.10, 3.30 or 3.40 is included in the project build.
+*
+*                     (a) Since version 3.40 of uC/USB-Host, USB_VERSION has been renamed to USBH_VERSION.
+*
+*                 (2) REQUIREs the following uC/USB features :
+*
+*                     (a) Host stack.
+*
+*                     (b) Host Mass Storage Class (MSC) driver.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_MSC_PRESENT
+#define  FS_DEV_MSC_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_MSC_MODULE
+#define  FS_DEV_MSC_EXT
+#else
+#define  FS_DEV_MSC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/fs_dev.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern          const  FS_DEV_API  FSDev_MSC;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+FS_QTY  FSDev_MSC_DevOpen (USBH_MSC_DEV  *p_msc_dev,
+                           FS_ERR        *p_err);
+
+void    FSDev_MSC_DevClose(USBH_MSC_DEV  *p_msc_dev);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of MSC module include.                           */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Cfg/Template/fs_dev_nand_cfg.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Cfg/Template/fs_dev_nand_cfg.h
new file mode 100644
index 0000000..dcbe765
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Cfg/Template/fs_dev_nand_cfg.h
@@ -0,0 +1,206 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NAND DRIVER CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : fs_nand_cfg.c
+* Version       : v4.07.00.00
+* Programmer(s) : FBJ
+*                 EJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                 MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_NAND_CFG_H
+#define  FS_NAND_CFG_H
+
+
+/*
+*********************************************************************************************************
+*                                                INCLUDE
+*********************************************************************************************************
+*/
+
+#include 
+
+
+/*
+*********************************************************************************************************
+*                                      NAND DRIVER CONFIGURATION
+*
+* Note(s) : (1) FS_NAND_CFG_MAX_CTRLR_IMPL determines the maximum number of registered NAND controller
+*               implementations. Each controller that will be used needs to be registered. Registering
+*               a controller implementation will invoke its 'Init()' function.
+
+*           (2) FS_NAND_CFG_AUTO_SYNC_EN determines if, for each operation on the device (i.e. each call
+*               to the device's API), the metadata should be synchronized. Synchronizing at the end of
+*               each operation is safer; it ensures the device can be remounted and appear exactly as it
+*               should. Disabling automatic synchronization will result in a large write speed increase,
+*               as the metadata won't be committed automatically, unless done in the application. If a 
+*               power down occurs between a device operation and a sync operation, the device will appear
+*               as it was in a prior state when remounted. Device synchronization can be forced with a 
+*               call to FSDev_Sync().
+*
+*               Note that using large write buffers will reduce the metadata synchronization performance
+*               hit as fewer calls to the device API will be needed.
+*
+*           (3) FS_NAND_CFG_UPDATE_BLK_META_CACHE_EN determines if, for each update block, the
+*               metadata will be cached. Enabling this will allow searching for a specific updated sector
+*               through data in RAM instead of accessing the device, which would require additional read
+*               page operations.
+*
+*               More RAM will be consumed if this option is enabled, but write/read speed will be improved.
+*
+*               RAM usage = ( x (log2() + log2()) /
+*                            8) octets (rounded up).
+*
+*           (4) FS_NAND_CFG_DIRTY_MAP_CACHE_EN determines if the dirty blocks map will be cached. With
+*               this feature enabled, a copy of the dirty blocks map on the device is cached. It is
+*               possible then to determine if the state "dirty" of a block is commited on the device 
+*               without the need to actually read the device.
+*
+*               With this feature enabled, overall write and read speed should be improved. Also, 
+*               robustness will be improved for specific cases. However, more RAM will be consumed.
+*
+*               RAM usage = ( / 8) octets (rounded up).
+*
+*           (5) FS_NAND_CFG_UPDATE_BLK_TBL_SUBSET_SIZE controls the size of the subsets of sectors pointed
+*               by each entry of the update block tables. The value must be a power of 2 (or 0). 
+*
+*               If, for example, the value is 4, each time a specific updated sector is requested, the 
+*               NAND translation layer must find the sector from a group of 4 sectors. Thus, if the cache 
+*               is disabled, 4 sectors must be read from the device. Otherwise, the 4 entries will be 
+*               searched from in the cache. If the value is set to 0, the table will be disabled 
+*               completely, meaning that all sectors of the block might have to be be read before the 
+*               specified sector is found. If the value is 1, the table completely specifies the location 
+*               of the sector, and thus no search must be performed. In that case, enabling the update 
+*               blocks metadata cache will yield no performance benefit.
+*
+*               RAM usage = ( x (log2(Nbr secs per blk>) - log2() x
+*                             / 8) octets (rounded up).
+*
+*           (6) FS_NAND_CFG_RSVD_AVAIL_BLK_CNT indicates the number of blocks in the available blocks 
+*               table that are reserved for metadata block folding. Since this operation is critical 
+*               and must be done before adding blocks to the available blocks table, the driver needs
+*               enough reserved blocks to make sure at least one of them is not bad so that the metadata 
+*               can be folded successfully. When set to 3, probability for the metadata folding operation
+*               to fail is really low. This value should be sufficient for most applications.
+*
+*           (7) FS_NAND_CFG_MAX_RD_RETRIES indicates the maximum number of retries performed when a read
+*               operation fails. It is recommended by most manufacturers to retry reading a page if it 
+*               fails, as successive read operations might be successful. This number should be at least 
+*               set to 2 for smooth  operation, but might be set higher to improve reliability.
+*
+*           (8) FS_NAND_CFG_MAX_SUB_PCT indicates the maximum number of update blocks that can be
+*               sequential update blocks (SUB). This value is set as a percentage of the total number
+*               of update blocks.
+*
+*********************************************************************************************************
+*/
+
+                                                                /* Config max nbr of reg'd ctrlr layer impl.            */
+#define  FS_NAND_CFG_MAX_CTRLR_IMPL                       1u    /*                                     (see Note #1)  : */
+
+                                                                /* Config auto sync                    (see Note #2)  : */
+#define  FS_NAND_CFG_AUTO_SYNC_EN                DEF_ENABLED
+                                                                /*   DEF_DISABLED   auto sync of meta data disabled.    */
+                                                                /*   DEF_ENABLED    auto sync of meta data enabled.     */
+
+                                                                /* Config meta cache                   (see Note #3)  : */
+#define  FS_NAND_CFG_UB_META_CACHE_EN            DEF_ENABLED
+                                                                /*   DEF_DISABLED   meta cache NOT present.             */
+                                                                /*   DEF_ENABLED    meta cache     present.             */
+
+                                                                /* Config commited dirty map cache     (see Note #4)  : */
+#define  FS_NAND_CFG_DIRTY_MAP_CACHE_EN          DEF_ENABLED
+                                                                /*   DEF_DISABLED   dirty cache NOT present.            */
+                                                                /*   DEF_ENABLED    dirty cache     present.            */
+
+                                                                /* Config update blk tbl subset size   (see Note #5)  : */
+#define  FS_NAND_CFG_UB_TBL_SUBSET_SIZE                   1u
+
+                                                                /* Config cnt of rsvd avail blks       (see Note #6)  : */
+#define  FS_NAND_CFG_RSVD_AVAIL_BLK_CNT                   3u
+
+                                                                /* Config nbr retries after rd fail    (see Note #7)  : */
+#define  FS_NAND_CFG_MAX_RD_RETRIES                      10u
+
+                                                                /* Config max pct of UB that can be SUB(see Note #8)  : */
+#define  FS_NAND_CFG_MAX_SUB_PCT                         30
+
+
+/*
+*********************************************************************************************************
+*                                   NAND DRIVER ADVANCED CONFIGURATION
+*
+* Note(s) : (1) We strongly recommend to leave default values to these configurations. These are advanced
+*               configurations that do not need to be modified.
+*
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ FTL TH CONFIG ------------------- */
+                                                                /* Config th (see FS_NAND_SecWrInUB() note #2).         */
+#define  FS_NAND_CFG_TH_PCT_MERGE_RUB_START_SUB          20
+#define  FS_NAND_CFG_TH_PCT_CONVERT_SUB_TO_RUB           10     /* See also FS_NAND_UB_Alloc() note #2b.                */
+#define  FS_NAND_CFG_TH_PCT_PAD_SUB                       5
+
+                                                                /* Config th (see FS_NAND_UB_Alloc() note #2).          */
+#define  FS_NAND_CFG_TH_PCT_MERGE_SUB                    10
+#define  FS_NAND_CFG_TH_SUB_MIN_IDLE_TO_FOLD              5
+
+
+/*
+*********************************************************************************************************
+*                                   NAND DRIVER DEBUG CONFIGURATION
+*
+* Note(s) : (1) We strongly recommend to leave default values to these configurations. These are advanced
+*               configurations that usually do not need to be modified.
+*
+*********************************************************************************************************
+*/
+
+#define  FS_NAND_CFG_DUMP_SUPPORT_EN           DEF_DISABLED
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/GenExt/fs_dev_nand_ctrlr_gen_micron_ecc.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/GenExt/fs_dev_nand_ctrlr_gen_micron_ecc.h
new file mode 100644
index 0000000..001e588
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/GenExt/fs_dev_nand_ctrlr_gen_micron_ecc.h
@@ -0,0 +1,125 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                      NAND DEVICE GENERIC CONTROLLER MICRON HARDWARE ECC EXTENSION
+*
+* Filename      : fs_dev_nand_ctrlr_gen_micron_ecc.h
+* Version       : v4.07.00
+* Programmer(s) : EJ
+*                 
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                                 MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_NAND_CGEN_MICRON_ECC_MODULE_PRESENT
+#define  FS_NAND_CGEN_MICRON_ECC_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../fs_dev_nand_ctrlr_gen.h"
+
+
+/*
+*********************************************************************************************************
+*                                                EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_NAND_CGEN_MICRON_ECC_MODULE
+#define  FS_NAND_CGEN_MICRON_ECC_EXT
+#else
+#define  FS_NAND_CGEN_MICRON_ECC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  FS_NAND_CTRLR_GEN_EXT  FS_NAND_CtrlrGen_MicronECC;
+
+/*
+*********************************************************************************************************
+*                                                 MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/GenExt/fs_dev_nand_ctrlr_gen_soft_ecc.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/GenExt/fs_dev_nand_ctrlr_gen_soft_ecc.h
new file mode 100644
index 0000000..97fa838
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/GenExt/fs_dev_nand_ctrlr_gen_soft_ecc.h
@@ -0,0 +1,136 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                         NAND DEVICE GENERIC CONTROLLER SOFTWARE ECC EXTENSION
+*
+* Filename      : fs_dev_nand_ctrlr_gen_soft_ecc.h
+* Version       : v4.07.00
+* Programmer(s) : EJ
+*                 
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                                 MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_NAND_CGEN_SOFT_ECC_MODULE_PRESENT
+#define  FS_NAND_CGEN_SOFT_ECC_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../fs_dev_nand_ctrlr_gen.h"
+
+
+/*
+*********************************************************************************************************
+*                                                EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_NAND_CGEN_SOFT_ECC_MODULE
+#define  FS_NAND_CGEN_SOFT_ECC_EXT
+#else
+#define  FS_NAND_CGEN_SOFT_ECC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DATA TYPES
+*********************************************************************************************************
+*/
+
+#define  FS_NAND_CTRLR_GEN_SOFT_ECC_CFG_FIELDS \
+    FS_NAND_CTRLR_GEN_SOFT_ECC_CFG_FIELD(const  ECC_CALC, *ECC_ModulePtr, DEF_NULL /* Pointer to ECC module */)
+
+#define FS_NAND_CTRLR_GEN_SOFT_ECC_CFG_FIELD(type, name, dflt_val)  type name;
+typedef  struct  {
+    FS_NAND_CTRLR_GEN_SOFT_ECC_CFG_FIELDS
+} FS_NAND_CTRLR_GEN_SOFT_ECC_CFG;
+#undef  FS_NAND_CTRLR_GEN_SOFT_ECC_CFG_FIELD
+
+extern  const  FS_NAND_CTRLR_GEN_SOFT_ECC_CFG  FS_NAND_CtrlrGen_SoftECC_DfltCfg;
+
+
+/*
+*********************************************************************************************************
+*                                            GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  FS_NAND_CTRLR_GEN_EXT  FS_NAND_CtrlrGen_SoftECC;
+
+/*
+*********************************************************************************************************
+*                                                 MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/GenExt/fs_dev_nand_ctrlr_imx28_bch.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/GenExt/fs_dev_nand_ctrlr_imx28_bch.h
new file mode 100644
index 0000000..84559d2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/GenExt/fs_dev_nand_ctrlr_imx28_bch.h
@@ -0,0 +1,139 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                         NAND DEVICE GENERIC CONTROLLER SOFTWARE ECC EXTENSION
+*
+* Filename      : fs_dev_nand_ctrlr_imx28_bch.h
+* Version       : v4.07.00
+* Programmer(s) : EJ
+*                 
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                                 MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_NAND_CGEN_BCH_MODULE_PRESENT
+#define  FS_NAND_CGEN_BCH_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../fs_dev_nand_ctrlr_gen.h"
+
+
+/*
+*********************************************************************************************************
+*                                                EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_NAND_CGEN_BCH_MODULE
+#define  FS_NAND_CGEN_BCH_EXT
+#else
+#define  FS_NAND_CGEN_BCH_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DATA TYPES
+*********************************************************************************************************
+*/
+
+#define  FS_NAND_CTRLR_GEN_BCH_CFG_FIELDS \
+    FS_NAND_CTRLR_GEN_BCH_CFG_FIELD(       CPU_INT32U,  Ecc0,     2u) \
+    FS_NAND_CTRLR_GEN_BCH_CFG_FIELD(       CPU_INT32U,  EccN,     2u) \
+    FS_NAND_CTRLR_GEN_BCH_CFG_FIELD(       CPU_INT32U,  EccThres, 0u) \
+    FS_NAND_CTRLR_GEN_BCH_CFG_FIELD(const  ECC_CALC,   *NextPtr, DEF_NULL)
+
+#define FS_NAND_CTRLR_GEN_BCH_CFG_FIELD(type, name, dflt_val)  type name;
+typedef  struct  {
+    FS_NAND_CTRLR_GEN_BCH_CFG_FIELDS
+} FS_NAND_CTRLR_GEN_BCH_CFG;
+#undef  FS_NAND_CTRLR_GEN_BCH_CFG_FIELD
+
+extern  const  FS_NAND_CTRLR_GEN_BCH_CFG  FS_NAND_CtrlrGen_BCH_DlftCfg;
+
+
+/*
+*********************************************************************************************************
+*                                            GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  FS_NAND_CTRLR_GEN_EXT  FS_NAND_CtrlrGen_BCH;
+
+/*
+*********************************************************************************************************
+*                                                 MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/fs_dev_nand_ctrlr_gen.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/fs_dev_nand_ctrlr_gen.h
new file mode 100644
index 0000000..1851dc9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Ctrlr/fs_dev_nand_ctrlr_gen.h
@@ -0,0 +1,318 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                         NAND FLASH DEVICES
+*                                   GENERIC CONTROLLER-LAYER DRIVER
+*
+* Filename      : fs_dev_nand_ctrlr_gen.h
+* Version       : v4.07.00.00
+* Programmer(s) : EJ
+*                 FBJ
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_NAND_CTRLR_GEN_MODULE_PRESENT
+#define  FS_NAND_CTRLR_GEN_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  "../fs_dev_nand.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_NAND_CTRLR_GEN_MODULE
+#define  FS_NAND_CTRLR_GEN_MOD_EXT
+#else
+#define  FS_NAND_CTRLR_GEN_MOD_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_NAND_CTRLR_GEN_CTRS_TBL_SIZE  2u
+
+/*
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*/
+
+
+
+/*
+**********************************************************************************************************
+*                            NAND FLASH DEVICE CONTROLLER GENERIC BSP API
+**********************************************************************************************************
+*/
+
+
+typedef  struct {
+    void  (*Open)           (FS_ERR       *p_err);              /* Open BSP.                                            */
+
+    void  (*Close)          (void);                             /* Close BSP.                                           */
+
+    void  (*ChipSelEn)      (void);                             /* Enable chip select.                                  */
+
+    void  (*ChipSelDis)     (void);                             /* Disable chip select.                                 */
+
+    void  (*CmdWr)          (CPU_INT08U   *p_cmd,               /* Write cmd cycle(s).                                  */
+                             CPU_SIZE_T    cnt,
+                             FS_ERR       *p_err);
+
+    void  (*AddrWr)         (CPU_INT08U   *p_addr,              /* Write addr cycle(s).                                 */
+                             CPU_SIZE_T    cnt,
+                             FS_ERR       *p_err);
+
+    void  (*DataWr)         (void         *p_src,               /* Write data cycle(s).                                 */
+                             CPU_SIZE_T    cnt,
+                             CPU_INT08U    width,
+                             FS_ERR       *p_err);
+
+    void  (*DataRd)         (void         *p_dest,              /* Read data.                                           */
+                             CPU_SIZE_T    cnt,
+                             CPU_INT08U    width,
+                             FS_ERR       *p_err);
+
+    void  (*WaitWhileBusy)  (void         *poll_fcnt_arg,       /* Wait until ready.                                    */
+                             CPU_BOOLEAN (*poll_fcnt)(void  *arg),
+                             CPU_INT32U    to_us,
+                             FS_ERR       *p_err);
+} FS_NAND_CTRLR_GEN_BSP_API;
+
+
+/*
+*********************************************************************************************************
+*                                        SPARE SEGMENT INFO STRUCT
+*********************************************************************************************************
+*/
+
+typedef  struct {
+    FS_NAND_PG_SIZE  PgOffset;                                  /* Offset in pg of spare seg.                           */
+    FS_NAND_PG_SIZE  Len;                                       /* Len in bytes of spare seg.                           */
+} FS_NAND_CTRLR_GEN_SPARE_SEG_INFO;
+
+
+/*
+*********************************************************************************************************
+*                          NAND GENERIC CONTROLLER STAT AND ERR CTRS STRUCT
+*********************************************************************************************************
+*/
+
+#if ((FS_CFG_CTR_STAT_EN == DEF_ENABLED) || \
+     (FS_CFG_CTR_ERR_EN  == DEF_ENABLED))
+typedef  struct  fs_nand_ctrlr_gen_ctrs {
+#if (FS_CFG_CTR_STAT_EN == DEF_ENABLED)                         /* -------------------- STAT CTRS --------------------- */
+    FS_CTR                             StatRdCtr;               /* Nbr of sec rd.                                       */
+    FS_CTR                             StatWrCtr;               /* Nbr of sec wr.                                       */
+    FS_CTR                             StatEraseCtr;            /* Nbr of blk erase.                                    */
+    FS_CTR                             StatSpareRdRawCtr;       /* Nbr of raw spare rd.                                 */
+    FS_CTR                             StatOOSRdRawCtr;         /* Nbr of raw OOS rd.                                   */
+#endif
+
+#if (FS_CFG_CTR_ERR_EN == DEF_ENABLED)                          /* --------------------- ERR CTRS --------------------- */
+    FS_CTR                             ErrCorrECC_Ctr;          /* Nbr of correctable ECC rd errs.                      */
+    FS_CTR                             ErrCriticalCorrECC_Ctr;  /* Nbr of critical correctable ECC rd errs.             */
+    FS_CTR                             ErrUncorrECC_Ctr;        /* Nbr of uncorrectable ECC rd errs.                    */
+    FS_CTR                             ErrWrCtr;                /* Nbr of wr failures.                                  */
+    FS_CTR                             ErrEraseCtr;             /* Nbr of erase failures.                               */
+#endif
+} FS_NAND_CTRLR_GEN_CTRS;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         NAND CTRLR DATA STRUCT
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_nand_ctrlr_gen_ext   FS_NAND_CTRLR_GEN_EXT;
+typedef  struct  fs_nand_ctrlr_gen_data  FS_NAND_CTRLR_GEN_DATA;
+
+struct fs_nand_ctrlr_gen_data {
+    FS_NAND_PART_API                  *PartPtr;                 /* Ptr to part layer interface.                         */
+    FS_NAND_PART_DATA                 *PartDataPtr;             /* Ptr to part layer data.                              */
+
+    FS_NAND_CTRLR_GEN_BSP_API         *BSP_Ptr;                 /* Ptr to ctrlr BSP.                                    */
+
+    CPU_INT08U                         AddrSize;                /* Size in B of addr.                                   */
+    CPU_INT08U                         ColAddrSize;             /* Size in B of col addr.                               */
+    CPU_INT08U                         RowAddrSize;             /* Size in B of row addr.                               */
+
+    FS_NAND_PG_SIZE                    SecSize;                 /* Size in octets of sec.                               */
+    FS_NAND_PG_SIZE                    SpareTotalAvailSize;     /* Nbr of avail spare bytes.                            */
+
+    FS_NAND_PG_SIZE                    OOS_SizePerSec;          /* Size in octets of OOS area per sec.                  */
+
+    FS_NAND_CTRLR_GEN_SPARE_SEG_INFO  *OOS_InfoTbl;             /* OOS segments info tbl.                               */
+
+    void                              *SpareBufPtr;             /* Ptr to OOS buf.                                      */
+
+    void                              *CtrlrExtData;            /* Pointer to ctrlr ext data.                           */
+    const  FS_NAND_CTRLR_GEN_EXT      *CtrlrExtPtr;             /* Pointer to ctrlr ext.                                */
+
+#if ((FS_CFG_CTR_STAT_EN == DEF_ENABLED) || \
+     (FS_CFG_CTR_ERR_EN == DEF_ENABLED))
+    FS_NAND_CTRLR_GEN_CTRS             Ctrs;
+#endif
+
+    FS_NAND_CTRLR_GEN_DATA            *NextPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                        NAND FLASH DEVICE GENERIC CONTROLLER EXT MOD DATA TYPE
+*********************************************************************************************************
+*/
+
+struct fs_nand_ctrlr_gen_ext {
+    void              (*Init)        (FS_ERR                  *p_err);
+
+    void             *(*Open)        (FS_NAND_CTRLR_GEN_DATA  *p_ctrlr_data,
+                                      void                    *p_ext_cfg,
+                                      FS_ERR                  *p_err);
+
+    void              (*Close)       (void                    *p_ext_data);
+
+    FS_NAND_PG_SIZE   (*Setup)       (FS_NAND_CTRLR_GEN_DATA  *p_ctrlr_data,
+                                      void                    *p_ext_data,
+                                      FS_ERR                  *p_err);
+
+    void              (*RdStatusChk) (void                    *p_ext_data,
+                                      FS_ERR                  *p_err);
+
+    void              (*ECC_Calc)    (void                    *p_ext_data,
+                                      void                    *p_sec_buf,
+                                      void                    *p_oos_buf,
+                                      FS_NAND_PG_SIZE          oos_size,
+                                      FS_ERR                  *p_err);
+
+    void              (*ECC_Verify)  (void                    *p_ext_data,
+                                      void                    *p_sec_buf,
+                                      void                    *p_oos_buf,
+                                      FS_NAND_PG_SIZE          oos_size,
+                                      FS_ERR                  *p_err);
+};
+
+
+/*
+**********************************************************************************************************
+*                      NAND FLASH DEVICE GENERIC CONTROLLER CONFIGURATION DATA TYPE
+**********************************************************************************************************
+*/
+
+#define  FS_NAND_CTRLR_GEN_CFG_FIELDS                                          \
+    FS_NAND_CTRLR_GEN_CFG_FIELD(FS_NAND_CTRLR_GEN_EXT, *CtrlrExt   , DEF_NULL) \
+    FS_NAND_CTRLR_GEN_CFG_FIELD(void                 , *CtrlrExtCfg, DEF_NULL)
+
+
+#define FS_NAND_CTRLR_GEN_CFG_FIELD(type, name, dftl_val) type name;
+typedef  struct  fs_nand_ctrlr_gen_cfg {
+    FS_NAND_CTRLR_GEN_CFG_FIELDS
+} FS_NAND_CTRLR_GEN_CFG;
+#undef  FS_NAND_CTRLR_GEN_CFG_FIELD
+
+extern  const  FS_NAND_CTRLR_GEN_CFG  FS_NAND_CtrlrGen_DfltCfg;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const              FS_NAND_CTRLR_API        FS_NAND_CtrlrGen;
+FS_NAND_CTRLR_GEN_MOD_EXT  FS_CTR                   FS_NAND_CtrlrGen_UnitCtr;
+#if ((FS_CFG_CTR_STAT_EN == DEF_ENABLED) || \
+     (FS_CFG_CTR_ERR_EN  == DEF_ENABLED))
+FS_NAND_CTRLR_GEN_MOD_EXT  FS_NAND_CTRLR_GEN_CTRS  *FS_NAND_CtrlrGen_CtrsTbl[FS_NAND_CTRLR_GEN_CTRS_TBL_SIZE];
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  FS_NAND_CtrlrGen_PollFnct(void  *p_ctrlr_data);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif  /* FS_NAND_CTRLR_GEN_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Part/fs_dev_nand_part_onfi.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Part/fs_dev_nand_part_onfi.h
new file mode 100644
index 0000000..a5433f0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Part/fs_dev_nand_part_onfi.h
@@ -0,0 +1,146 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         FILE SYSTEM DEVICE DRIVER
+*
+*                                          NAND FLASH ONFI DEVICES
+*
+* Filename      : fs_dev_nand_part_onfi.h
+* Version       : v4.07.00.00
+* Programmer(s) : FBJ
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_NAND_ONFI_MODULE_PRESENT
+#define  FS_NAND_ONFI_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../fs_dev_nand.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_NAND_ONFI_MODULE
+#define  FS_NAND_ONFI_EXT
+#else
+#define  FS_NAND_ONFI_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                          NAND FLASH DEVICE ONFI PART CONFIGURATION DATA TYPE
+**********************************************************************************************************
+*/
+
+#define  FS_NAND_PART_ONFI_CFG_FIELDS \
+    FS_NAND_PART_ONFI_CFG_FIELD(FS_NAND_FREE_SPARE_DATA, *FreeSpareMap, DEF_NULL /* Pointer to the map of available bytes in spare area. */)
+
+#define  FS_NAND_PART_ONFI_CFG_FIELD(type, name, dflt_val)  type name;
+typedef  struct  fs_nand_part_onfi_cfg {
+    FS_NAND_PART_ONFI_CFG_FIELDS
+} FS_NAND_PART_ONFI_CFG;
+#undef   FS_NAND_PART_ONFI_CFG_FIELD
+
+extern  const  FS_NAND_PART_ONFI_CFG  FS_NAND_PartONFI_DfltCfg;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const       FS_NAND_PART_API  FS_NAND_PartONFI;
+FS_NAND_ONFI_EXT    FS_CTR            FS_NAND_PartONFI_UnitCtr;
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Part/fs_dev_nand_part_static.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Part/fs_dev_nand_part_static.h
new file mode 100644
index 0000000..44a065f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/Part/fs_dev_nand_part_static.h
@@ -0,0 +1,162 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                         NAND FLASH DEVICES
+*                                STATIC CONFIGURATION PART-LAYER DRIVER
+*
+* Filename      : fs_dev_nand_static.c
+* Version       : v4.07.00.00
+* Programmer(s) : EJ
+*                 FBJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_NAND_STATIC_MODULE_PRESENT
+#define  FS_NAND_STATIC_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../fs_dev_nand.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_NAND_STATIC_MODULE
+#define  FS_NAND_STATIC_EXT
+#else
+#define  FS_NAND_STATIC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                       NAND FLASH DEVICE GENERIC CONTROLLER CONFIGURATION DATA TYPE
+**********************************************************************************************************
+*/
+
+
+#define  FS_NAND_PART_STATIC_CFG_FIELDS                                                                                                                                          \
+    FS_NAND_PART_STATIC_CFG_FIELD(FS_NAND_BLK_QTY         ,  BlkCnt          ,     0u                          /* Total number of blocks.                              */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(FS_NAND_PG_PER_BLK_QTY  ,  PgPerBlk        ,     0u                          /* Nbr of pgs per blk.                                  */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(FS_NAND_PG_SIZE         ,  PgSize          ,     0u                          /* Size (in octets) of each pg.                         */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(FS_NAND_PG_SIZE         ,  SpareSize       ,     0u                          /* Size (in octets) of spare area per pg.               */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(CPU_INT08U              ,  NbrPgmPerPg     ,     1u                          /* Nbr of program operation per page.                   */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(CPU_INT08U              ,  BusWidth        ,     8u                          /* Bus width of NAND dev.                               */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(CPU_INT08U              ,  ECC_NbrCorrBits ,   255u                          /* Nbr of bits of ECC correctability.                   */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(FS_NAND_PG_SIZE         ,  ECC_CodewordSize,     0u                          /* ECC codeword size in bytes.                          */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(FS_NAND_DEFECT_MARK_TYPE,  DefectMarkType  , DEFECT_SPARE_L_1_PG_1_OR_N_ALL_0/* Defect mark pos relative to spare area.              */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(FS_NAND_BLK_QTY         ,  MaxBadBlkCnt    , 65535u                          /* Max nbr of bad blk in dev.                           */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(CPU_INT32U              ,  MaxBlkErase     ,     1u                          /* Maximum number of erase operations per block.        */) \
+    FS_NAND_PART_STATIC_CFG_FIELD(FS_NAND_FREE_SPARE_DATA , *FreeSpareMap    , DEF_NULL                        /* Pointer to the map of available bytes in spare area. */)
+
+
+#define  FS_NAND_PART_STATIC_CFG_FIELD(type, name, dftl_val)  type name;
+typedef struct fs_nand_part_static_cfg {
+    FS_NAND_PART_STATIC_CFG_FIELDS
+} FS_NAND_PART_STATIC_CFG;
+#undef   FS_NAND_PART_STATIC_CFG_FIELD
+
+extern  const  FS_NAND_PART_STATIC_CFG  FS_NAND_PartStatic_DfltCfg;
+
+/*
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const        FS_NAND_PART_API  FS_NAND_PartStatic;
+FS_NAND_STATIC_EXT   FS_CTR            FS_NAND_PartStatic_UnitCtr;
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/fs_dev_nand.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/fs_dev_nand.h
new file mode 100644
index 0000000..1ca8fda
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NAND/fs_dev_nand.h
@@ -0,0 +1,438 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*
+*                                         FILE SYSTEM DEVICE DRIVER
+*
+*                                             NAND FLASH DEVICES
+*
+* Filename      : fs_dev_nand.h
+* Version       : v4.07.00.00
+* Programmer(s) : EJ
+*                 FBJ
+*
+*********************************************************************************************************
+* Note(s)       : (1) Supports NAND-type Flash memory devices, including :
+*                     (a) Parallel NAND Flash.
+*                         (1) Small-page (512-B) SLC Devices.
+*                         (2) Large-page (2048-, 4096-, 8096-B) SLC Devices.
+*                         (3) Some MLC Devices.
+*
+*                 (2) Supported media MUST have the following characteristics :
+*                     (a) Medium organized into units (called blocks) which are erased at the same time.
+*                     (b) When erased, all bits are set to 1.
+*                     (c) Only an erase operation can change a bit from 0 to 1.
+*                     (d) Each block divided into smaller units called pages: each page has a data area
+*                         as well as a spare area. 16 bytes spare area are required for each 512 bytes
+*                         sector in the page.
+*
+*                 (3) Supported media TYPICALLY have the following characteristics :
+*                     (a) A  program operation takes much longer than a read    operation.
+*                     (b) An erase   operation takes much longer than a program operation.
+*                     (c) The number of erase operations per block is limited.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_NAND_MODULE_PRESENT
+#define  FS_NAND_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/fs.h"
+#include  "../../Source/fs_dev.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_NAND_MODULE
+#define  FS_NAND_EXT
+#else
+#define  FS_NAND_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_NAND_CFG_DEFAULT                                  0u
+
+#define  FS_NAND_PG_IX_INVALID             ((FS_NAND_PG_SIZE)-1)
+
+#define  FS_NAND_PART_ONFI_PARAM_PAGE_LEN                   256u/* Len of param pg.                                     */
+
+#define  FS_NAND_CTRS_TBL_SIZE                                2u/* Max nbr of ctrs structs in global tbl.               */
+
+
+/*
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  FS_NAND_BLK_QTY;
+typedef  CPU_INT08U  FS_NAND_UB_QTY;
+typedef  CPU_INT16U  FS_NAND_PG_PER_BLK_QTY;
+typedef  CPU_INT16U  FS_NAND_SEC_PER_BLK_QTY;
+typedef  CPU_INT08U  FS_NAND_ASSOC_BLK_QTY;
+typedef  CPU_INT16U  FS_NAND_PG_SIZE;
+
+
+/*
+*********************************************************************************************************
+*                                       NAND IO CTRL DATA DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_nand_io_ctrl_data {
+    void        *DataPtr;                                       /* Ptr to data to write.                                */
+    void        *OOS_Ptr;                                       /* Ptr to out of sec data to write.                     */
+    FS_SEC_NBR   IxPhy;                                         /* Physical sec ix.                                     */
+} FS_NAND_IO_CTRL_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                     NAND FREE SPARE AREA DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_nand_free_spare_data  FS_NAND_FREE_SPARE_DATA;
+struct  fs_nand_free_spare_data {
+    FS_NAND_PG_SIZE  OctetOffset;                               /* Offset in octets of free section of spare.           */
+    FS_NAND_PG_SIZE  OctetLen;                                  /* Len in octets of free section of spare.           */
+};
+
+
+/*
+*********************************************************************************************************
+*                                   NAND FLASH DEVICE SPECIFIC DATA
+*********************************************************************************************************
+*/
+
+typedef enum {
+    DEFECT_SPARE_L_1_PG_1_OR_N_ALL_0 = 0,                       /* Spare byte/word 1 in first or last pg == 0.          */
+    DEFECT_SPARE_ANY_PG_1_OR_N_ALL_0 = 1,                       /* Spare any byte/word in first or last pg == 0.        */
+    DEFECT_SPARE_B_6_W_1_PG_1_OR_2   = 2,                       /* Spare byte 6/word 1 in pg 1 or 2 != FFh.             */
+    DEFECT_SPARE_L_1_PG_1_OR_2       = 3,                       /* Spare byte/word 1 in pg 1 or 2 != FFh.               */
+    DEFECT_SPARE_B_1_6_W_1_IN_PG_1   = 4,                       /* Spare byte 1&6/word 1 in pg 1 != FFh.                */
+    DEFECT_PG_L_1_OR_N_PG_1_OR_2     = 5,                       /* Byte/word 1 (main area) in page 1 or 2 != FFh.       */
+    DEFECT_MARK_TYPE_NBR             = 6                        /* Must be last in enum.                                */
+} FS_NAND_DEFECT_MARK_TYPE;
+
+
+typedef  struct  fs_nand_part_data  FS_NAND_PART_DATA;
+struct  fs_nand_part_data {
+    FS_NAND_BLK_QTY           BlkCnt;                           /* Total number of blocks.                              */
+    FS_NAND_PG_PER_BLK_QTY    PgPerBlk;                         /* Nbr of pgs per blk.                                  */
+    FS_NAND_PG_SIZE           PgSize;                           /* Size (in octets) of each pg.                         */
+    FS_NAND_PG_SIZE           SpareSize;                        /* Size (in octets) of spare area per pg.               */
+    CPU_INT08U                NbrPgmPerPg;                      /* Nbr of program operation per pg.                     */
+    CPU_INT08U                BusWidth;                         /* Bus width of NAND dev.                               */
+    CPU_INT08U                ECC_NbrCorrBits;                  /* Nbr of bits of ECC correctability.                   */
+    FS_NAND_PG_SIZE           ECC_CodewordSize;                 /* ECC codeword size in bytes.                          */
+    FS_NAND_DEFECT_MARK_TYPE  DefectMarkType;                   /* Factory defect mark type.                            */
+    FS_NAND_BLK_QTY           MaxBadBlkCnt;                     /* Max nbr of bad blk in dev.                           */
+    CPU_INT32U                MaxBlkErase;                      /* Maximum number of erase operations per block.        */
+    FS_NAND_FREE_SPARE_DATA  *FreeSpareMap;                     /* Pointer to the map of available bytes in spare area. */
+
+
+    FS_NAND_PART_DATA        *NextPtr;
+};
+
+
+/*
+**********************************************************************************************************
+*                              NAND FLASH DEVICE CONTROLLER API DATA TYPE
+**********************************************************************************************************
+*/
+
+typedef  struct  fs_nand_oos_info {
+    FS_NAND_PG_SIZE   Size;
+    void             *BufPtr;
+} FS_NAND_OOS_INFO;
+
+typedef  struct  fs_nand_part_api FS_NAND_PART_API;
+
+typedef  struct  fs_nand_ctrlr_api {
+    void                (*Init)        (FS_ERR            *p_err);          /* Init NAND ctrlr.                         */
+
+    void               *(*Open)        (FS_NAND_PART_API  *p_part_api,      /* Open NAND ctrlr.                         */
+                                        void              *p_bsp_api,
+                                        void              *p_ctrlr_cfg,
+                                        void              *p_part_cfg,
+                                        FS_ERR            *p_err);
+
+    void                (*Close)       (void              *p_ctrlr_data);   /* Close NAND ctrlr.                        */
+
+    FS_NAND_PART_DATA  *(*PartDataGet) (void              *p_ctrlr_data);   /* Get part data ptr.                       */
+
+    FS_NAND_OOS_INFO    (*Setup)       (void              *p_ctrlr_data,    /* Setup ctrlr.                             */
+                                        FS_NAND_PG_SIZE    sec_size,
+                                        FS_ERR            *p_err);
+
+                                                                            /* ------- NAND FLASH HIGH LVL OPS -------- */
+    void                (*SecRd)       (void              *p_ctrlr_data,    /* Read from pg.                            */
+                                        void              *p_dest,
+                                        void              *p_dest_oos,
+                                        FS_SEC_NBR         sec_ix_phy,
+                                        FS_ERR            *p_err);
+
+    void                (*OOSRdRaw)    (void              *p_ctrlr_data,    /* Read oos raw data without ECC chk.       */
+                                        void              *p_dest_oos,
+                                        FS_SEC_NBR         sec_nbr_phy,
+                                        FS_NAND_PG_SIZE    offset,
+                                        FS_NAND_PG_SIZE    length,
+                                        FS_ERR            *p_err);
+
+    void                (*SpareRdRaw)  (void              *p_ctrlr_data,    /* Read spare data without ECC check.       */
+                                        void              *p_dest_oos,
+                                        FS_SEC_QTY         pg_nbr_phy,
+                                        FS_NAND_PG_SIZE    offset,
+                                        FS_NAND_PG_SIZE    length,
+                                        FS_ERR            *p_err);
+
+    void                (*SecWr)       (void              *p_ctrlr_data,    /* Write page to NAND device.               */
+                                        void              *p_src,
+                                        void              *p_src_spare,
+                                        FS_SEC_NBR         sec_nbr_phy,
+                                        FS_ERR            *p_err);
+
+    void                (*BlkErase)    (void              *p_ctrlr_data,    /* Erase block on NAND device.              */
+                                        CPU_INT32U         blk_nbr_phy,
+                                        FS_ERR            *p_err);
+
+    void                (*IO_Ctrl)     (void              *p_ctrlr_data,    /* Perform NAND device I/O control.         */
+                                        CPU_INT08U         cmd,
+                                        void              *p_buf,
+                                        FS_ERR            *p_err);
+} FS_NAND_CTRLR_API;
+
+
+/*
+**********************************************************************************************************
+*                             NAND FLASH DEVICE PART-SPECIFIC API DATA TYPE
+**********************************************************************************************************
+*/
+
+struct  fs_nand_part_api {
+    FS_NAND_PART_DATA  *(*Open)  (const  FS_NAND_CTRLR_API  *p_ctrlr_api,   /* Get NAND part-specific data.             */
+                                         void               *p_ctrlr_data,
+                                         void               *p_part_cfg,
+                                         FS_ERR             *p_err);
+
+    void                (*Close) (       FS_NAND_PART_DATA  *p_part_data); /* Close part layer impl.                    */
+};
+
+
+/*
+*********************************************************************************************************
+*                               NAND FLASH DEVICE CONFIGURATION DATA TYPE
+**********************************************************************************************************
+*/
+
+#define  FS_NAND_CFG_FIELDS                                                            \
+    FS_NAND_CFG_FIELD(void             , *BSPPtr                , DEF_NULL           ) \
+    FS_NAND_CFG_FIELD(FS_NAND_CTRLR_API, *CtrlrPtr              , DEF_NULL           ) \
+    FS_NAND_CFG_FIELD(void             , *CtrlrCfgPtr           , DEF_NULL           ) \
+    FS_NAND_CFG_FIELD(FS_NAND_PART_API , *PartPtr               , DEF_NULL           ) \
+    FS_NAND_CFG_FIELD(void             , *PartCfgPtr            , DEF_NULL           ) \
+    FS_NAND_CFG_FIELD(FS_SEC_SIZE      ,  SecSize               , FS_NAND_CFG_DEFAULT) \
+    FS_NAND_CFG_FIELD(FS_NAND_BLK_QTY  ,  BlkCnt                , FS_NAND_CFG_DEFAULT) \
+    FS_NAND_CFG_FIELD(FS_NAND_BLK_QTY  ,  BlkIxFirst            , 0u                 ) \
+    FS_NAND_CFG_FIELD(FS_NAND_UB_QTY   ,  UB_CntMax             , 3u                 ) \
+    FS_NAND_CFG_FIELD(CPU_INT08U       ,  RUB_MaxAssoc          , 2u                 ) \
+    FS_NAND_CFG_FIELD(CPU_INT08U       ,  AvailBlkTblEntryCntMax, FS_NAND_CFG_DEFAULT)
+
+
+#define FS_NAND_CFG_FIELD(type, name, dftl_val) type name;
+typedef  struct  fs_nand_cfg {
+    FS_NAND_CFG_FIELDS
+} FS_NAND_CFG;
+#undef  FS_NAND_CFG_FIELD
+
+extern  const  FS_NAND_CFG  FS_NAND_DfltCfg;
+
+
+/*
+**********************************************************************************************************
+*                             NAND FLASH DEVICE PART-SPECIFIC API DATA TYPE
+**********************************************************************************************************
+*/
+
+typedef  struct  fs_nand_param_pg_io_ctrl_data {
+    CPU_INT16U      RelAddr;                                    /* Relative addr of the param pg to rd from.            */
+    CPU_INT16U      ByteCnt;                                    /* Nb of bytes to rd.                                   */
+    CPU_INT08U     *DataPtr;                                    /* Ptr to param pg data.                                */
+} FS_NAND_RD_PARAM_PG_IO_CTRL_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                       NAND STAT AND ERR CTRS
+*********************************************************************************************************
+*/
+
+#if ((FS_CFG_CTR_STAT_EN == DEF_ENABLED) || \
+     (FS_CFG_CTR_ERR_EN  == DEF_ENABLED))
+typedef  struct  fs_nand_ctrs {
+#if (FS_CFG_CTR_STAT_EN == DEF_ENABLED)                         /* -------------------- STAT CTRS --------------------- */
+    FS_CTR                    StatRdCtr;                        /* Nbr of sec rd.                                       */
+    FS_CTR                    StatWrCtr;                        /* Nbr of sec wr.                                       */
+
+    FS_CTR                    StatMetaSecCommitCtr;             /* Nbr of meta sec commits.                             */
+    FS_CTR                    StatSUB_MergeCtr;                 /* Nbr of SUB merges done.                              */
+    FS_CTR                    StatRUB_MergeCtr;                 /* Nbr of RUB full merges done.                         */
+    FS_CTR                    StatRUB_PartialMergeCtr;          /* Nbr of RUB partial merges done.                      */
+
+    FS_CTR                    StatBlkRefreshCtr;                /* Nbr of blk refreshes done.                           */
+#endif
+
+#if (FS_CFG_CTR_ERR_EN == DEF_ENABLED)                          /* --------------------- ERR CTRS --------------------- */
+    FS_CTR                    ErrRefreshDataLoss;               /* Nbr of unrefreshable/lost data sectors.              */
+#endif
+} FS_NAND_CTRS;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  FS_DEV_API     FS_NAND;
+FS_NAND_EXT    FS_QTY         FS_NAND_UnitCtr;
+#if ((FS_CFG_CTR_STAT_EN == DEF_ENABLED) || \
+     (FS_CFG_CTR_ERR_EN  == DEF_ENABLED))
+FS_NAND_EXT    FS_NAND_CTRS  *FS_NAND_CtrsTbl[FS_NAND_CTRS_TBL_SIZE];
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               TRACING
+*********************************************************************************************************
+*/
+
+#if ((defined(FS_NAND_TRACE))       && \
+     (defined(FS_NAND_TRACE_LEVEL)) && \
+     (FS_NAND_TRACE_LEVEL >= TRACE_LEVEL_INFO))
+
+    #if (FS_NAND_TRACE_LEVEL >= TRACE_LEVEL_LOG)
+        #define  FS_NAND_TRACE_LOG(msg)       FS_NAND_TRACE  msg
+    #else
+        #define  FS_NAND_TRACE_LOG(msg)
+    #endif
+
+
+    #if (FS_TRACE_LEVEL >= TRACE_LEVEL_DBG)
+        #define  FS_NAND_TRACE_DBG(msg)       FS_NAND_TRACE  msg
+    #else
+        #define  FS_NAND_TRACE_DBG(msg)
+    #endif
+
+    #define  FS_NAND_TRACE_INFO(msg)          FS_NAND_TRACE  msg
+#else
+    #ifndef  FS_NAND_TRACE_LOG
+        #define  FS_NAND_TRACE_LOG(msg)       FS_TRACE_LOG(msg)
+    #endif
+
+    #ifndef  FS_NAND_TRACE_DBG
+        #define  FS_NAND_TRACE_DBG(msg)       FS_TRACE_DBG(msg)
+    #endif
+
+    #ifndef  FS_NAND_TRACE_INFO
+        #define  FS_NAND_TRACE_INFO(msg)  FS_TRACE_INFO(msg)
+    #endif
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ LOW-LEVEL FNCTS ----------------- */
+void         FS_NAND_LowFmt    (CPU_CHAR  *p_name_dev,          /* Low-level format  device.                            */
+                                FS_ERR    *p_err);
+
+void         FS_NAND_LowMount  (CPU_CHAR  *p_name_dev,          /* Low-level mount   device.                            */
+                                FS_ERR    *p_err);
+
+void         FS_NAND_LowUnmount(CPU_CHAR  *p_name_dev,          /* Low-level unmount device.                            */
+                                FS_ERR    *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+                                                                /* End of NAND module include.                          */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_amd_1x08.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_amd_1x08.h
new file mode 100644
index 0000000..3ae92b5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_amd_1x08.h
@@ -0,0 +1,138 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                              AMD-COMPATIBLE NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_amd_1x08.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) Supports CFI NOR flash implementing AMD command set, including :
+*
+*                     (a) Most AMD & Spansion devices.
+*                     (b) Most ST/Numonyx M29 devices.
+*                     (c) #### List tested devices.
+*
+*                 (2) Fast programming command "write to buffer & program", supported by many flash
+*                     implementing AMD command set, is used in this driver if the "Maximum number of bytes
+*                     in a multi-byte write" (in the CFI device geometry definition) is non-zero.
+*
+*                     (a) Some flash implementing AMD command set have non-zero multi-byte write size but
+*                         do NOT support the "write to buffer & program" command.  Often, these devices
+*                         will support alternate fast programming methods (e.g., "quadruple byte program"
+*                         or "octuple byte program").  This driver MUST be modified for those devices, to
+*                         ignore the multi-byte write size in the CFI information (see 'FSDev_NOR_PHY_Open()
+*                         Note #2'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_AMD_1X08_PRESENT
+#define  FS_DEV_NOR_AMD_1X08_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_AMD_1X08_MODULE
+#define  FS_DEV_NOR_AMD_1X08_EXT
+#else
+#define  FS_DEV_NOR_AMD_1X08_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR AMD module include.                       */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_amd_1x16.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_amd_1x16.h
new file mode 100644
index 0000000..38c0669
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_amd_1x16.h
@@ -0,0 +1,138 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                              AMD-COMPATIBLE NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_amd_1x16.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) Supports CFI NOR flash implementing AMD command set, including :
+*
+*                     (a) Most AMD & Spansion devices.
+*                     (b) Most ST/Numonyx M29 devices.
+*                     (c) #### List tested devices.
+*
+*                 (2) Fast programming command "write to buffer & program", supported by many flash
+*                     implementing AMD command set, is used in this driver if the "Maximum number of bytes
+*                     in a multi-byte write" (in the CFI device geometry definition) is non-zero.
+*
+*                     (a) Some flash implementing AMD command set have non-zero multi-byte write size but
+*                         do NOT support the "write to buffer & program" command.  Often, these devices
+*                         will support alternate fast programming methods (e.g., "double word program" or
+*                        "quadruple word program").  This driver MUST be modified for those devices, to
+*                         ignore the multi-byte write size in the CFI information (see 'FSDev_NOR_PHY_Open()
+*                         Note #2'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_AMD_1X16_PRESENT
+#define  FS_DEV_NOR_AMD_1X16_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_AMD_1X16_MODULE
+#define  FS_DEV_NOR_AMD_1X16_EXT
+#else
+#define  FS_DEV_NOR_AMD_1X16_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR AMD module include.                       */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_at25.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_at25.h
new file mode 100644
index 0000000..dacfe21
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_at25.h
@@ -0,0 +1,122 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                             ATMEL AT25 Serial NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_at25.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*                 FF
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_AT25_PRESENT
+#define  FS_DEV_NOR_AT25_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_AT25_MODULE
+#define  FS_DEV_NOR_AT25_EXT
+#else
+#define  FS_DEV_NOR_AT25_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR AT25 module include.                      */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_at45.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_at45.h
new file mode 100644
index 0000000..4e469e8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_at45.h
@@ -0,0 +1,123 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                             ATMEL AT45 SERIAL NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_at45.h
+* Version       : v4.07.00.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_AT45_PRESENT
+#define  FS_DEV_NOR_AT45_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_AT45_MODULE
+#define  FS_DEV_NOR_AT45_EXT
+#else
+#define  FS_DEV_NOR_AT45_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  FS_DEV_NOR_PHY_API  FSDev_NOR_AT45;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR AT45 module include.                      */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_intel.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_intel.h
new file mode 100644
index 0000000..c47ef0d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_intel.h
@@ -0,0 +1,127 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                             INTEL-COMPATIBLE NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_intel.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) Supports CFI NOR flash implementing Intel command set, including :
+*
+*                     (a) Most Intel/Numonyx devices.
+*                     (b) Some ST/Numonyx M28 devices.
+*                     (c) #### List tested devices.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_INTEL_PRESENT
+#define  FS_DEV_NOR_INTEL_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_INTEL_MODULE
+#define  FS_DEV_NOR_INTEL_EXT
+#else
+#define  FS_DEV_NOR_INTEL_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR INTEL module include.                     */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_micron_np5q.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_micron_np5q.h
new file mode 100644
index 0000000..e80a94c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_micron_np5q.h
@@ -0,0 +1,123 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                             MICRON NP5Q SERIAL NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_np5q.h
+* Version       : v4.07.00.00
+* Programmer(s) : FF
+*                 MOM
+*                 EJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               Module
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_MICRON_NP5Q_PRESENT
+#define  FS_DEV_NOR_MICRON_NP5Q_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_MICRON_NP5Q_MODULE
+#define  FS_DEV_NOR_MICRON_NP5Q_EXT
+#else
+#define  FS_DEV_NOR_MICRON_NP5Q_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR MICRON NP5Q module include.               */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_n25q.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_n25q.h
new file mode 100644
index 0000000..556dcd7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_n25q.h
@@ -0,0 +1,89 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                          (c) Copyright 2014-2014; Micrium, Inc.; Weston, FL
+*
+*              All rights reserved.  Protected by international copyright laws.
+*
+*              uC/PRODUCT is provided in source form to registered licensees ONLY.  It is
+*              illegal to distribute this source code to any third party unless you receive
+*              written permission by an authorized Micrium representative.  Knowledge of
+*              the source code may NOT be used to develop a similar product.
+*
+*              Please help us continue to provide the Embedded community with the finest
+*              software available.  Your honesty is greatly appreciated.
+*
+*              You can find our product's user manual, API reference, release notes and
+*              more information at https://doc.micrium.com.
+*              You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                             MICRON N25Q SERIAL NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_n25q.h
+* Version       : v4.07.00.00
+* Programmer(s) : ED
+*                 EJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_N25Q_PRESENT
+#define  FS_DEV_NOR_N25Q_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../fs_dev_nor.h"
+#include  "CmdIf/fs_dev_nor_cmd_if.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef struct fs_dev_nor_phy_n25q_cfg {
+    FS_DEV_NOR_CMD_IF_API  *CmdIfPtr;                           /* Ptr to cmd if API structure.                         */
+    void                   *CmdIfCfgPtr;                        /* Ptr to cmd if cfg structure.                         */
+
+    CPU_BOOLEAN             QuadIOModeEn;                       /* DEF_ENABLED: quad mode, DEF_DISABLED: 1-bit mode.    */
+    CPU_INT08U              DummyCycleCnt;                      /* Nbr of cycles to insert before fast rds. Effect ...  */
+                                                                /* on max dev freq.                                     */
+} FS_DEV_NOR_PHY_N25Q_CFG;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of Micron N25Q module include.      */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_s25fl.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_s25fl.h
new file mode 100644
index 0000000..4337e81
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_s25fl.h
@@ -0,0 +1,126 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/FS is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                              SPANSION S25FL NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_s25fl.h
+* Version       : v4.07.00.00
+* Programmer(s) : DC
+*                 ED
+*                 EJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_S25FL_PRESENT
+#define  FS_DEV_NOR_S25FL_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_S25FL_MODULE
+#define  FS_DEV_NOR_S25FL_EXT
+#else
+#define  FS_DEV_NOR_S25FL_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+#include  "CmdIf/fs_dev_nor_cmd_if.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+* Note(s):  (1) Enables Quad I/O capability. When enabled, Quad I/O mode can be used by setting "QuadModeEn"
+*               in the PHY cfg structure.
+*               Note that Quad I/O is unsupported on the Spansion S25FL128P NOR flash chip.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #1.                                         */
+#define  FS_DEV_NOR_PHY_QUAD_IO_EN                      DEF_ENABLED
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  S25FL PHY CONFIGURATION STRUCTURE
+*********************************************************************************************************
+*/
+
+typedef struct fs_dev_nor_phy_s25fl_cfg {
+    FS_DEV_NOR_CMD_IF_API  *CmdIfPtr;                           /* Ptr to cmd if API structure.                         */
+    void                   *CmdIfCfgPtr;                        /* Ptr to cmd if cfg structure.                         */
+
+    CPU_BOOLEAN             QuadModeEn;                         /* DEF_ENABLED: quad mode, DEF_DISABLED: 1-bit mode.    */
+    CPU_INT08U              LatencyCode;                        /* Latency code used to calc inter cycles.              */
+                                                                /* Unused for S25FL-P devices.                          */
+} FS_DEV_NOR_PHY_S25FL_CFG;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_sst25.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_sst25.h
new file mode 100644
index 0000000..e3c7d78
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_sst25.h
@@ -0,0 +1,145 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                             SST SST25 SERIAL NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_sst25.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) Supports Numonyx/ST's M29 parallel NOR flash memories, as described in various
+*                     datasheets at Numonyx (http://www.numonyx.com).  This driver has been tested with
+*                     or should work with the following devices :
+*
+*                         M29W320EB               M29W640GH  [+]
+*                         M29W320ET [=]           M29W640GL  [+]
+*                         M29W064FB               M29W128FH  [+]
+*                         M29W064FT [=]           M29W128FL  [+]
+*                         M29W640FB               M29W128GH  [+]
+*                         M29W640FT [=] [*]       M29W128GL  [+]     [*]
+*                                                 M29W640GB  [+]
+*                                                 M29W640GT  [+] [=]
+*
+*                               [*} Devices tested
+*                               [+] These devices will be accessed more efficiently with the generic AMD
+*                                   1x16 driver.
+*                               [=] These devices are top boot-block devices, which have several small
+*                                   blocks at the top of the memory.  However, the CFI device geometry
+*                                   lists the boot block region before the regular block region.  To
+*                              reverse the block regions logically, define NOR_REVERSE_CFI in fs_cfg.h.
+*
+*                 (2) Fast programming command "double word program", supported by these flash devices,
+*                     is used in this driver.  For other operations, the standard AMD command set is used.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_SST25_PRESENT
+#define  FS_DEV_NOR_SST25_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_SST25_MODULE
+#define  FS_DEV_NOR_SST25_EXT
+#else
+#define  FS_DEV_NOR_SST25_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR SST25 module include.                     */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_sst39.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_sst39.h
new file mode 100644
index 0000000..aa92860
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_sst39.h
@@ -0,0 +1,152 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                                 SST SST39 NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_sst39.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) Supports SST's SST39 Multi-Purpose Flash memories, as described in various
+*                     datasheets at SST (http://www.sst.com).  This driver has been tested with or should
+*                     work with the following devices :
+*
+*                         SST39LF200A/VF200A
+*                         SST39LF400A/VF400A
+*                         SST39LF800A/VF800A
+*
+*                         SST39VF1601/WF1601
+*                         SST39VF3201        [*]
+*                         SST39VF3202
+*                         SST39VF6401
+*                         SST39VF6402
+*
+*                         SST39SF010A
+*                         SST39SF020A
+*                         SST39SF040
+*
+*                         SST39WF1681
+*                         SST39WF1682
+*
+*                         SST39WF800A
+*                         SST39WF800B
+*
+*                         SST39LF512/VF512
+*                         SST39LF010/VF010
+*                         SST39LF020/VF020
+*                         SST39LF040/VF040
+*
+*                               [*} Devices tested
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_SST39_PRESENT
+#define  FS_DEV_NOR_SST39_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_SST39_MODULE
+#define  FS_DEV_NOR_SST39_EXT
+#else
+#define  FS_DEV_NOR_SST39_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR SST39 module include.                     */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_stm25.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_stm25.h
new file mode 100644
index 0000000..23646d6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_stm25.h
@@ -0,0 +1,137 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                      ST MICROELECTRONICS M25 SERIAL NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_stm25.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) Supports Numonyx/ST's M25 & M45 serial NOR flash memories, as described in various
+*                     datasheets at Numonyx (http://www.numonyx.com).  This driver has been tested with
+*                     or should work with the following devices :
+*
+*                         M25P05-A [*]     M25PE10 [*]     M25PX80     M45PE10
+*                         M25P10-A         M25PE20 [*]     M25PX16     M45PE20
+*                         M25P20   [*]     M25PE40 [*]     M25PX32     M45PE40
+*                         M25P40   [*]     M25PE80 [*]     M25PX64     M45PE80
+*                         M25P80           M25PE16 [*]                 M45PE16
+*                         M25P16   [*]
+*                         M25P32   [*]
+*                         M25P64   [*]
+*                         M25P128
+*
+*                              [*} Devices tested
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_STM25_PRESENT
+#define  FS_DEV_NOR_STM25_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_STM25_MODULE
+#define  FS_DEV_NOR_STM25_EXT
+#else
+#define  FS_DEV_NOR_STM25_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR STM25 module include.                     */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_stm29_1x08.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_stm29_1x08.h
new file mode 100644
index 0000000..fcbbf39
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_stm29_1x08.h
@@ -0,0 +1,146 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                          ST MICROELECTRONICS M29 NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_stm29_1x08.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) Supports Numonyx/ST's M29 parallel NOR flash memories, as described in various
+*                     datasheets at Numonyx (http://www.numonyx.com).  This driver has been tested with
+*                     or should work with the following devices :
+*
+*                         M29W320EB               M29W640GH  [+]
+*                         M29W320ET [=]           M29W640GL  [+]
+*                         M29W064FB               M29W128FH  [+]
+*                         M29W064FT [=]           M29W128FL  [+]
+*                         M29W640FB               M29W128GH  [+]
+*                         M29W640FT [=] [*]       M29W128GL  [+]     [*]
+*                                                 M29W640GB  [+]
+*                                                 M29W640GT  [+] [=]
+*
+*                               [*} Devices tested
+*                               [+] These devices will be accessed more efficiently with the generic AMD
+*                                   1x16 driver.
+*                               [=] These devices are top boot-block devices, which have several small
+*                                   blocks at the top of the memory.  However, the CFI device geometry
+*                                   lists the boot block region before the regular block region.  To
+*                                   reverse the block regions logically, define NOR_REVERSE_CFI in fs_cfg.h.
+*
+*                 (2) Fast programming commands "double byte program" & "quadruple byte program",
+*                     supported by these flash devices, is used in this driver.  For other operations,
+*                     the standard AMD command set is used.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_STM29_1X08_PRESENT
+#define  FS_DEV_NOR_STM29_1X08_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_STM29_1X08_MODULE
+#define  FS_DEV_NOR_STM29_1X08_EXT
+#else
+#define  FS_DEV_NOR_STM29_1X08_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR AMD module include.                       */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_stm29_1x16.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_stm29_1x16.h
new file mode 100644
index 0000000..6c879a6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/PHY/fs_dev_nor_stm29_1x16.h
@@ -0,0 +1,145 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*                          ST MICROELECTRONICS M29 NOR PHYSICAL-LAYER DRIVER
+*
+* Filename      : fs_dev_nor_stm29_1x16.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) Supports Numonyx/ST's M29 parallel NOR flash memories, as described in various
+*                     datasheets at Numonyx (http://www.numonyx.com).  This driver has been tested with
+*                     or should work with the following devices :
+*
+*                         M29W320EB               M29W640GH  [+]
+*                         M29W320ET [=]           M29W640GL  [+]
+*                         M29W064FB               M29W128FH  [+]
+*                         M29W064FT [=]           M29W128FL  [+]
+*                         M29W640FB               M29W128GH  [+]
+*                         M29W640FT [=] [*]       M29W128GL  [+]     [*]
+*                                                 M29W640GB  [+]
+*                                                 M29W640GT  [+] [=]
+*
+*                               [*} Devices tested
+*                               [+] These devices will be accessed more efficiently with the generic AMD
+*                                   1x16 driver.
+*                               [=] These devices are top boot-block devices, which have several small
+*                                   blocks at the top of the memory.  However, the CFI device geometry
+*                                   lists the boot block region before the regular block region.  To
+*                                   reverse the block regions logically, define NOR_REVERSE_CFI in fs_cfg.h.
+*
+*                 (2) Fast programming command "double word program", supported by these flash devices,
+*                     is used in this driver.  For other operations, the standard AMD command set is used.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_STM29_1X16_PRESENT
+#define  FS_DEV_NOR_STM29_1X16_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_STM29_1X16_MODULE
+#define  FS_DEV_NOR_STM29_1X16_EXT
+#else
+#define  FS_DEV_NOR_STM29_1X16_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_nor.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR AMD module include.                       */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/fs_dev_nor.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/fs_dev_nor.h
new file mode 100644
index 0000000..46adc54
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/NOR/fs_dev_nor.h
@@ -0,0 +1,511 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                          NOR FLASH DEVICES
+*
+* Filename      : fs_dev_nor.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*                 FF
+*********************************************************************************************************
+* Note(s)       : (1) Supports NOR-type Flash memory devices, including :
+*                     (a) Parallel NOR Flash.
+*                         (1) AMD-compatible devices.
+*                         (2) Intel-compatible devices.
+*                         (3) SST devices.
+*                         (4) Any other similar memory devices.
+*
+*                     (b) Serial   NOR Flash.
+*                         (1) ST M25 SPI devices.
+*                         (2) SST SST25 SPI devices.
+*                         (3) Any other similar memory devices.
+*
+*                  (2) Supported media MUST have the following characteristics :
+*                      (a) Medium organized into units (called blocks) which are erased at the same time.
+*                      (b) When erased, all bits are 1.
+*                      (c) Only an erase operation can change a bit from a 0 to a 1.
+*                      (d) Any bit  can be individually programmed  from a 1 to a 0.
+*                      (e) Any word can be individually accessed (read or programmed).
+*
+*                  (3) Supported media TYPICALLY have the following characteristics :
+*                      (a) A program operation takes much longer than a read    operation.
+*                      (b) An erase  operation takes much longer than a program operation.
+*                      (c) The number of erase operations per block is limited.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_PRESENT
+#define  FS_DEV_NOR_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_NOR_MODULE
+#define  FS_DEV_NOR_EXT
+#else
+#define  FS_DEV_NOR_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/fs_dev.h"
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_CFG_WR_CHK_EN
+#define  FS_DEV_NOR_CFG_WR_CHK_EN                   DEF_DISABLED
+#endif
+
+#ifndef  FS_DEV_NOR_CFG_DBG_CHK_EN
+#define  FS_DEV_NOR_CFG_DBG_CHK_EN                  DEF_DISABLED
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_DEV_NOR_ERASE_CNT_DIFF_TH_MIN                  5u
+#define  FS_DEV_NOR_ERASE_CNT_DIFF_TH_MAX               1000u
+#define  FS_DEV_NOR_ERASE_CNT_DIFF_TH_DFLT                20u
+
+#define  FS_DEV_NOR_PCT_RSVD_MIN                           5u
+#define  FS_DEV_NOR_PCT_RSVD_MAX                          35u
+#define  FS_DEV_NOR_PCT_RSVD_DFLT                         10u
+
+#define  FS_DEV_NOR_PCT_RSVD_SEC_ACTIVE_MAX               90u
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                              NOR FLASH DEVICE PHYSICAL DATA DATA TYPE
+*
+* Note(s) : (1) (a) Prior to file system suite initialization, application may populate a
+*                  'FS_DEV_NOR_PHY_DATA' structure & pass it directly to a physical-layer driver.
+*
+*               (b) At file system suite initialization, NOR driver will maintain a 'FS_DEV_NOR_PHY_DATA'
+*                   populated based on configuration.  Thereafter, the application should NOT access the
+*                   NOR device directly through the physical-layer driver; instead, the NOR driver
+*                   raw access functions should be used.
+*
+*           (2) (a) Application/NOR driver populates 'UnitNbr' based on the device being addressed.  For
+*                   example, if "nor:2:" is to be accessed, then 'UnitNbr' will hold the integer 2.
+*
+*               (b) Application/NOR driver populates 'AddrBase' & 'RegionNbr' to specify which NOR &
+*                   NOR region to access.  See 'NOR FLASH DEVICE CONFIGURATION DATA TYPE  Note #1a, #1b'.
+*
+*               (c) Application/NOR driver populates 'BusWidth', 'BusWidthMax', 'PhyDevCnt' & 'MaxClkFreq'
+*                   to determine bus/communication parameters.  See 'NOR FLASH DEVICE CONFIGURATION DATA TYPE  Note #1i'.
+*
+*               (d) Physical-layer driver populates 'BlkCnt', 'BlkSize' & 'AddrRegionStart', which describe
+*                   the block region 'RegionNbr' to be accessed.  It MAY assign a pointer to physical-
+*                   layer driver-specific information to 'DataPtr'.
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_dev_nor_phy_data {
+    FS_QTY               UnitNbr;
+
+    CPU_ADDR             AddrBase;                              /* Base address of flash.                               */
+    CPU_INT08U           RegionNbr;                             /* Block region within flash.                           */
+
+    CPU_INT08U           BusWidth;                              /* Bus width of flash.                                  */
+    CPU_INT08U           BusWidthMax;                           /* Maximum bus width of flash.                          */
+    CPU_INT08U           PhyDevCnt;                             /* Number of devices interleaved for flash.             */
+    CPU_INT32U           MaxClkFreq;                            /* Maximum clock frequency of serial flash.             */
+
+    FS_SEC_QTY           BlkCnt;                                /* Total number of blocks in region.                    */
+    FS_SEC_SIZE          BlkSize;                               /* Size of each block in region.                        */
+    CPU_ADDR             AddrRegionStart;                       /* Start address of block region within NOR.            */
+    void                *DataPtr;                               /* Pointer to phy-specific data.                        */
+
+    CPU_INT32U           WrMultSize;                            /* Flash write multiple size.                           */
+
+    void                *PhyCfgPtr;                             /* Pointer to phy-specific configuration structure.     */
+} FS_DEV_NOR_PHY_DATA;
+
+/*
+*********************************************************************************************************
+*                           NOR FLASH DEVICE PHYSICAL DRIVER API DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_dev_nor_phy_api {
+    void  (*Open)     (FS_DEV_NOR_PHY_DATA  *p_phy_data,
+                       FS_ERR               *p_err);
+
+    void  (*Close)    (FS_DEV_NOR_PHY_DATA  *p_phy_data);
+
+    void  (*Rd)       (FS_DEV_NOR_PHY_DATA  *p_phy_data,
+                       void                 *p_dest,
+                       CPU_INT32U            start,
+                       CPU_INT32U            cnt,
+                       FS_ERR               *p_err);
+
+    void  (*Wr)       (FS_DEV_NOR_PHY_DATA  *p_phy_data,
+                       void                 *p_src,
+                       CPU_INT32U            start,
+                       CPU_INT32U            cnt,
+                       FS_ERR               *p_err);
+
+    void  (*EraseBlk) (FS_DEV_NOR_PHY_DATA  *p_phy_data,
+                       CPU_INT32U            start,
+                       CPU_INT32U            size,
+                       FS_ERR               *p_err);
+
+    void  (*IO_Ctrl)  (FS_DEV_NOR_PHY_DATA  *p_phy_data,
+                       CPU_INT08U            cmd,
+                       void                 *p_buf,
+                       FS_ERR               *p_err);
+} FS_DEV_NOR_PHY_API;
+
+
+/*
+*********************************************************************************************************
+*                              NOR FLASH DEVICE CONFIGURATION DATA TYPE
+*
+* Note(s) : (1) The user must specify a valid configuration structure with configuration data.
+*
+*               (a) 'AddrBase' MUST specify
+*                   (1) ... the base address of the flash memory, for a parallel flash.
+*                   (2) ... 0x00000000 for a serial flash.
+*
+*               (b) 'RegionNbr' MUST specify the block region which will be used for the file system area.
+*                    Block regions are enumerated by the physical-layer driver; for more information, see
+*                    the physical-layer driver header file.  (On monolithic devices, devices with only one
+*                    block region, this MUST be 0.)
+*
+*               (c) 'AddrStart' MUST specify
+*                   (1) ... the absolute start address of the file system area in the flash memory, for
+*                           a parallel flash.
+*                   (2) ... the offset of the start of the file system area in the flash, for a serial
+*                           flash.
+*
+*                   The address specified by 'AddrStart' MUST lie within the region 'RegionNbr' (see Note
+*                   #1b).
+*
+*               (d) 'DevSize' MUST specify the number of octets that will belong to the file system area.
+*
+*               (e) 'SecSize' MUST specify the sector size for the low-level flash format (either 512,
+*                   1024, 2048 or 4096).
+*
+*               (f) (a) 'PctRsvd' MUST specify the percentage of sectors on the flash that will be
+*                       reserved for extra-file system storage (to improve efficiency).  This value must
+*                       be between 5% & 35%, except if 0 is specified whereupon the default will be used (10%).
+*
+*               (g) 'EraseCntDiffTh' MUST specify the difference between minimum & maximum erase counts
+*                   that will trigger passive wear-leveling.  This value must be between 5 & 100, except
+*                   if 0 is specified whereupon the default will be used (20).
+*
+*               (h) 'PhyPtr' MUST point to the appropriate physical-layer driver :
+*
+*                       FSDev_NOR_AMD_1x08      CFI-compatible parallel NOR implementing AMD   command set,
+*                                                   8-bit data bus
+*                       FSDev_NOR_AMD_1x16      CFI-compatible parallel NOR implementing AMD   command set,
+*                                                   16-bit data bus
+*                       FSDev_NOR_Intel_1x16    CFI-compatible parallel NOR implementing Intel command set,
+*                                                   16-bit data bus
+*                       FSDev_NOR_SST39         SST SST39 Multi-Purpose Flash
+*                       FSDev_NOR_STM25         ST  M25   serial flash
+*                       FSDev_NOR_SST25         SST SST25 serial flash
+*                       FSDev_NOR_S25FL         Spansion S25FL serial flash
+*                       FSDev_NOR_N25Q          Micron N25Q serial flash
+*                       Other                   User-developed
+*
+*                   For lists of devices supported by each driver, please see the physical layer driver's
+*                   header file.
+*
+*               (i) (1) For a parallel flash, the bus configuration is specified via 'BusWidth',
+*                       'BusWidthMax' & 'PhyDevCnt' :
+*                       (A) 'BusWidth' is the bus width, in bits, between the MCU/MPU & each connected device.
+*                       (B) 'BusWidthMax' is the maximum width supported by each connected device.
+*                       (C) 'PhyDevCnt' is the number of devices interleaved on the bus.
+*
+*                       For example, if a single flash capable of x8 or x16 operation is located on the
+*                       bus & used in x8 mode, then
+*                           BusWidth    =  8
+*                           BusWidthMax = 16
+*                           PhyDevCnt   =  1
+*                       If two NORs operating in x16 mode are interleaved to form a x32 NOR, then
+*                           BusWidth    = 16
+*                           BuxWidthMax = 16
+*                           PhyDevCnt   =  2
+*
+*                   (2) For a serial flash, the serial configuration is specified via 'MaxClkFreq'.
+*                       'MaxClkFreq' is the maximum clock frequency of the serial flash.
+*
+*               (j) 'PhyCfgPtr' should be set to DEF_NULL for most physical-layer drivers but point to a phy
+*                   specific configuration structure for S25FL and N25Q physical-layer drivers.
+*
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_dev_nor_cfg {
+    CPU_ADDR             AddrBase;                              /* Base address of flash.                               */
+    CPU_INT08U           RegionNbr;                             /* Block region within flash.                           */
+
+    CPU_ADDR             AddrStart;                             /* Start address of data within flash.                  */
+    CPU_INT32U           DevSize;                               /* Size of flash, in octets.                            */
+    FS_SEC_SIZE          SecSize;                               /* Sector size of low-level formatted flash.            */
+    CPU_INT08U           PctRsvd;                               /* Percentage of device area reserved.                  */
+    CPU_INT16U           EraseCntDiffTh;                        /* Erase count difference threshold.                    */
+
+    FS_DEV_NOR_PHY_API  *PhyPtr;                                /* Pointer to phy driver.                               */
+
+    CPU_INT08U           BusWidth;                              /* Bus width of flash.                                  */
+    CPU_INT08U           BusWidthMax;                           /* Maximum bus width of flash.                          */
+    CPU_INT08U           PhyDevCnt;                             /* Number of flash devices interleaved.                 */
+    CPU_INT32U           MaxClkFreq;                            /* Maximum clock frequency of serial flash.             */
+
+    void                *PhyCfgPtr;                             /* Pointer to PHY configuration structure.              */
+} FS_DEV_NOR_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                     NOR IO CTRL DATA DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_dev_nor_io_ctrl_data {
+    void                 *DataPtr;
+    CPU_INT32U            Start;
+    CPU_INT32U            Size;
+} FS_DEV_NOR_IO_CTRL_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern          const  FS_DEV_API          FSDev_NOR;
+FS_DEV_NOR_EXT         FS_CTR              FSDev_NOR_UnitCtr;
+
+/*
+*********************************************************************************************************
+*                                       PHYSICAL LAYER DRIVERS
+*********************************************************************************************************
+*/
+
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_AMD_1x08;
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_AMD_1x16;
+
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_Intel_1x16;
+
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_SST25;
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_SST39_1x16;
+
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_STM25;
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_STM29_1x08;
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_STM29_1x16;
+
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_AT25;
+
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_Micron_NP5Q;
+
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_S25FL;
+
+extern          const  FS_DEV_NOR_PHY_API  FSDev_NOR_N25Q;
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                                /* ---------- LOW-LEVEL FNCTS --------- */
+void         FSDev_NOR_LowFmt               (CPU_CHAR              *name_dev,   /* Low-level format  device.            */
+                                             FS_ERR                *p_err);
+
+void         FSDev_NOR_LowMount             (CPU_CHAR              *name_dev,   /* Low-level mount   device.            */
+                                             FS_ERR                *p_err);
+
+void         FSDev_NOR_LowUnmount           (CPU_CHAR              *name_dev,   /* Low-level unmount device.            */
+                                             FS_ERR                *p_err);
+
+void         FSDev_NOR_LowCompact           (CPU_CHAR              *name_dev,   /* Low-level compact device.            */
+                                             FS_ERR                *p_err);
+
+void         FSDev_NOR_LowDefrag            (CPU_CHAR              *name_dev,   /* Low-level defrag  device.            */
+                                             FS_ERR                *p_err);
+
+                                                                                /* ---------- PHYSICAL FNCTS ---------- */
+void         FSDev_NOR_PhyRd                (CPU_CHAR              *name_dev,   /* Read data from physical device.      */
+                                             void                  *p_dest,
+                                             CPU_INT32U             start,
+                                             CPU_INT32U             cnt,
+                                             FS_ERR                *p_err);
+
+void         FSDev_NOR_PhyWr                (CPU_CHAR              *name_dev,   /* Write data to physical device.       */
+                                             void                  *p_src,
+                                             CPU_INT32U             start,
+                                             CPU_INT32U             cnt,
+                                             FS_ERR                *p_err);
+
+void         FSDev_NOR_PhyEraseBlk          (CPU_CHAR              *name_dev,   /* Erase block on physical device.      */
+                                             CPU_INT32U             start,
+                                             CPU_INT32U             size,
+                                             FS_ERR                *p_err);
+
+void         FSDev_NOR_PhyEraseChip         (CPU_CHAR              *name_dev,   /* Erase entire physical device.        */
+                                             FS_ERR                *p_err);
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                 DEFINED IN BSP'S 'fs_dev_nor_bsp.c'
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  FSDev_NOR_BSP_Open             (FS_QTY                 unit_nbr,   /* Open (init) NOR bus interface.       */
+                                             CPU_ADDR               addr_base,
+                                             CPU_INT08U             bus_width,
+                                             CPU_INT08U             phy_dev_cnt);
+
+void         FSDev_NOR_BSP_Close            (FS_QTY                 unit_nbr);  /* Close (uninit) NOR bus interface.    */
+
+void         FSDev_NOR_BSP_Rd_08            (FS_QTY                 unit_nbr,   /* Read  from bus interface  (8-bit).   */
+                                             void                  *p_dest,
+                                             CPU_ADDR               addr_src,
+                                             CPU_INT32U             cnt);
+
+void         FSDev_NOR_BSP_Rd_16            (FS_QTY                 unit_nbr,   /* Read  from bus interface (16-bit).   */
+                                             void                  *p_dest,
+                                             CPU_ADDR               addr_src,
+                                             CPU_INT32U             cnt);
+
+CPU_INT08U   FSDev_NOR_BSP_RdWord_08        (FS_QTY                 unit_nbr,   /* Read  from bus interface  (8-bit).   */
+                                             CPU_ADDR               addr_src);
+
+CPU_INT16U   FSDev_NOR_BSP_RdWord_16        (FS_QTY                 unit_nbr,   /* Read  from bus interface (16-bit).   */
+                                             CPU_ADDR               addr_src);
+
+void         FSDev_NOR_BSP_WrWord_08        (FS_QTY                 unit_nbr,   /* Write to   bus interface  (8-bit).   */
+                                             CPU_ADDR               addr_dest,
+                                             CPU_INT08U             datum);
+
+void         FSDev_NOR_BSP_WrWord_16        (FS_QTY                 unit_nbr,   /* Write to   bus interface (16-bit).   */
+                                             CPU_ADDR               addr_dest,
+                                             CPU_INT16U             datum);
+
+void         FSDev_NOR_BSP_WaitWhileBusy    (FS_QTY                 unit_nbr,   /* Wait while NOR busy.                 */
+                                             FS_DEV_NOR_PHY_DATA   *p_phy_data,
+                                             CPU_BOOLEAN          (*poll_fnct)(FS_DEV_NOR_PHY_DATA  *p_phy_data_arg, FS_ERR  *p_err),
+                                             CPU_INT32U             typical_dur_us,
+                                             CPU_INT32U             timeout_us,
+                                             FS_ERR                *p_err);
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                 DEFINED IN BSP'S 'fs_dev_nor_bsp.c'
+*
+* Note(s) : (1) SPI functions MUST be gathered into a SPI API structure.
+*********************************************************************************************************
+*/
+
+extern  const  FS_DEV_SPI_API  FSDev_NOR_BSP_SPI;
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_NOR_CFG_WR_CHK_EN
+#error  "FS_DEV_NOR_CFG_WR_CHK_EN          not #define'd in 'app_cfg.h'"
+#error  "                            [MUST be  DEF_DISABLED]           "
+#error  "                            [     ||  DEF_ENABLED ]           "
+
+#elif  ((FS_DEV_NOR_CFG_WR_CHK_EN != DEF_DISABLED) && \
+        (FS_DEV_NOR_CFG_WR_CHK_EN != DEF_ENABLED ))
+#error  "FS_DEV_NOR_CFG_WR_CHK_EN    illegally #define'd in 'app_cfg.h'"
+#error  "                            [MUST be  DEF_DISABLED]           "
+#error  "                            [     ||  DEF_ENABLED ]           "
+#endif
+
+
+#ifndef  FS_DEV_NOR_CFG_DBG_CHK_EN
+#error  "FS_DEV_NOR_CFG_DBG_CHK_EN         not #define'd in 'app_cfg.h'"
+#error  "                            [MUST be  DEF_DISABLED]           "
+#error  "                            [     ||  DEF_ENABLED ]           "
+
+#elif  ((FS_DEV_NOR_CFG_DBG_CHK_EN != DEF_DISABLED) && \
+        (FS_DEV_NOR_CFG_DBG_CHK_EN != DEF_ENABLED ))
+#error  "FS_DEV_NOR_CFG_DBG_CHK_EN   illegally #define'd in 'app_cfg.h'"
+#error  "                            [MUST be  DEF_DISABLED]           "
+#error  "                            [     ||  DEF_ENABLED ]           "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NOR module include.                           */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/RAMDisk/fs_dev_ramdisk.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/RAMDisk/fs_dev_ramdisk.h
new file mode 100644
index 0000000..d33fdca
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/RAMDisk/fs_dev_ramdisk.h
@@ -0,0 +1,134 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                              RAM DISK
+*
+* Filename      : fs_dev_ramdisk.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_RAM_PRESENT
+#define  FS_DEV_RAM_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_RAM_MODULE
+#define  FS_DEV_RAM_EXT
+#else
+#define  FS_DEV_RAM_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/fs_dev.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  RAM UNIT CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_dev_ram_cfg {
+    FS_SEC_SIZE   SecSize;
+    FS_SEC_QTY    Size;
+    void         *DiskPtr;
+} FS_DEV_RAM_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern          const  FS_DEV_API  FSDev_RAM;
+FS_DEV_RAM_EXT         FS_CTR      FSDev_RAM_UnitCtr;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of RAM module include.                           */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/SD/Card/fs_dev_sd_card.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/SD/Card/fs_dev_sd_card.h
new file mode 100644
index 0000000..5ca4635
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/SD/Card/fs_dev_sd_card.h
@@ -0,0 +1,348 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                             SD/MMC CARD
+*                                              CARD MODE
+*
+* Filename      : fs_dev_sd_card.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Reference(s)  : (1) SD Card Association.  "Physical Layer Simplified Specification Version 2.00".
+*                     July 26, 2006.
+*
+*                 (2) JEDEC Solid State Technology Association.  "MultiMediaCard (MMC) Electrical
+*                     Standard, High Capacity".  JESD84-B42.  July 2007.
+*********************************************************************************************************
+* Note(s)       : (1) This driver has been tested with MOST SD/MMC media types, including :
+*
+*                     (a) Standard capacity SD cards, v1.x & v2.0.
+*                     (b) SDmicro cards.
+*                     (c) High capacity SD cards (SDHC)
+*                     (d) MMC
+*                     (e) MMCplus
+*
+*                     It should also work with devices conformant to the relevant SD or MMC specifications.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_SD_CARD_PRESENT
+#define  FS_DEV_SD_CARD_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_SD_CARD_MODULE
+#define  FS_DEV_SD_CARD_EXT
+#else
+#define  FS_DEV_SD_CARD_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/fs_dev.h"
+#include  "../fs_dev_sd.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       RESPONSE TYPES DEFINES
+*
+* Note(s) : (a) The response type data stored in the FSDev_SD_Card_CmdRespType[] table encodes the
+*               the SD response to the low nibble while the MMC response type is encoded as the
+*               high nibble
+*********************************************************************************************************
+*/
+
+#define  FS_DEV_SD_CARD_RESP_TYPE_UNKNOWN                  0u
+#define  FS_DEV_SD_CARD_RESP_TYPE_NONE                     1u          /* No  Response.                                        */
+#define  FS_DEV_SD_CARD_RESP_TYPE_R1                       2u          /* R1  Response: Normal Response Command.               */
+#define  FS_DEV_SD_CARD_RESP_TYPE_R1B                      3u          /* R1b Response.                                        */
+#define  FS_DEV_SD_CARD_RESP_TYPE_R2                       4u          /* R2  Response: CID, CSD Register.                     */
+#define  FS_DEV_SD_CARD_RESP_TYPE_R3                       5u          /* R3  Response: OCR Register.                          */
+#define  FS_DEV_SD_CARD_RESP_TYPE_R4                       6u          /* R4  Response: Fast I/O Response (MMC).               */
+#define  FS_DEV_SD_CARD_RESP_TYPE_R5                       7u          /* R5  Response: Interrupt Request Response (MMC).      */
+#define  FS_DEV_SD_CARD_RESP_TYPE_R5B                      8u          /* R5B Response.                                        */
+#define  FS_DEV_SD_CARD_RESP_TYPE_R6                       9u          /* R6  Response: Published RCA Response.                */
+#define  FS_DEV_SD_CARD_RESP_TYPE_R7                      10u          /* R7  Response: Card Interface Condition.              */
+
+#define  FS_DEV_MMC_RESP_TYPE_UNKNOWN               (0u << 4u)
+#define  FS_DEV_MMC_RESP_TYPE_NONE                  (1u << 4u)         /* No  Response.                                        */
+#define  FS_DEV_MMC_RESP_TYPE_R1                    (2u << 4u)         /* R1  Response: Normal Response Command.               */
+#define  FS_DEV_MMC_RESP_TYPE_R1B                   (3u << 4u)         /* R1b Response.                                        */
+#define  FS_DEV_MMC_RESP_TYPE_R2                    (4u << 4u)         /* R2  Response: CID, CSD Register.                     */
+#define  FS_DEV_MMC_RESP_TYPE_R3                    (5u << 4u)         /* R3  Response: OCR Register.                          */
+#define  FS_DEV_MMC_RESP_TYPE_R4                    (6u << 4u)         /* R4  Response: Fast I/O Response (MMC).               */
+#define  FS_DEV_MMC_RESP_TYPE_R5                    (7u << 4u)         /* R5  Response: Interrupt Request Response (MMC).      */
+#define  FS_DEV_MMC_RESP_TYPE_R5B                   (8u << 4u)         /* R5B Response.                                        */
+#define  FS_DEV_MMC_RESP_TYPE_R6                    (9u << 4u)         /* R6  Response: Published RCA Response.                */
+#define  FS_DEV_MMC_RESP_TYPE_R7                    10u << 4u)         /* R7  Response: Card Interface Condition.              */
+
+#define  FS_DEV_SD_CARD_RESP_TYPE_MASK                   0x0F          /* SD Card response mask.                               */
+#define  FS_DEV_SD_CARD_RESP_TYPE_OFFSET                 0x00          /* SD Card response offset.                             */
+#define  FS_DEV_MMC_RESP_TYPE_MASK                       0xF0          /* MMC response mask.                                   */
+#define  FS_DEV_MMC_RESP_TYPE_OFFSET                     0x04          /* MCC response offset.                                 */
+
+/*
+*********************************************************************************************************
+*                                          CMD FLAG DEFINES
+*
+* Note(s) : (a) If FS_DEV_SD_CARD_CMD_FLAG_INIT is set, then the controller should send the 80-clock
+*               initialization sequence before transmitting the command.
+*
+*           (b) If FS_DEV_SD_CARD_CMD_FLAG_OPEN_DRAIN is set, then the command should be transmitted
+*               with the command line in an open drain state.
+*
+*           (c) If FS_DEV_SD_CARD_CMD_FLAG_BUSY is set, then the controller should check for busy after
+*               the response before transmitting any data.
+*
+*           (d) If FS_DEV_SD_CARD_CMD_FLAG_CRC_VALID is set, then CRC check should be enabled.
+*
+*           (e) If FS_DEV_SD_CARD_CMD_FLAG_IX_VALID is set, then index check should be enabled.
+*
+*           (f) If FS_DEV_SD_CARD_CMD_FLAG_START_DATA_TX is set, then this command will either start
+*               transmitting data, or expect to start receiving data.
+*
+*           (g) If FS_DEV_SD_CARD_CMD_FLAG_STOP_DATA_TX is set, then this command is attempting to stop
+*               (abort) data transmission/reception.
+*
+*           (h) If FS_DEV_SD_CARD_CMD_FLAG_RESP is set, then a response is expected for this command.
+*
+*           (i) If FS_DEV_SD_CARD_CMD_FLAG_RESP_LONG is set, then a long response is expected for this
+*               command.
+*********************************************************************************************************
+*/
+
+#define  FS_DEV_SD_CARD_CMD_FLAG_NONE             DEF_BIT_NONE
+#define  FS_DEV_SD_CARD_CMD_FLAG_INIT             DEF_BIT_00    /* Initializaton sequence before command.               */
+#define  FS_DEV_SD_CARD_CMD_FLAG_BUSY             DEF_BIT_01    /* Busy signal expected after command.                  */
+#define  FS_DEV_SD_CARD_CMD_FLAG_CRC_VALID        DEF_BIT_02    /* CRC valid after command.                             */
+#define  FS_DEV_SD_CARD_CMD_FLAG_IX_VALID         DEF_BIT_03    /* Index valid after command.                           */
+#define  FS_DEV_SD_CARD_CMD_FLAG_OPEN_DRAIN       DEF_BIT_04    /* Command line is open drain.                          */
+#define  FS_DEV_SD_CARD_CMD_FLAG_START_DATA_TX    DEF_BIT_05    /* Data start command.                                  */
+#define  FS_DEV_SD_CARD_CMD_FLAG_STOP_DATA_TX     DEF_BIT_06    /* Data stop  command.                                  */
+#define  FS_DEV_SD_CARD_CMD_FLAG_RESP             DEF_BIT_07    /* Response expected.                                   */
+#define  FS_DEV_SD_CARD_CMD_FLAG_RESP_LONG        DEF_BIT_08    /* Long response expected.                              */
+
+/*
+*********************************************************************************************************
+*                                       DATA DIR & TYPE DEFINES
+*
+* Note(s) : (a) The data direction will be otherwise than 'none' if & only if the command flag
+*               FS_DEV_SD_CARD_CMD_FLAG_DATA_START is set.
+*********************************************************************************************************
+*/
+
+#define  FS_DEV_SD_CARD_DATA_DIR_NONE                      0u   /* No data transfer.                                    */
+#define  FS_DEV_SD_CARD_DATA_DIR_HOST_TO_CARD              1u   /* Transfer host-to-card (write).                       */
+#define  FS_DEV_SD_CARD_DATA_DIR_CARD_TO_HOST              2u   /* Transfer card-to-host (read).                        */
+
+#define  FS_DEV_SD_CARD_DATA_TYPE_NONE                     0u   /* No data transfer.                                    */
+#define  FS_DEV_SD_CARD_DATA_TYPE_SINGLE_BLOCK             1u   /* Single data block.                                   */
+#define  FS_DEV_SD_CARD_DATA_TYPE_MULTI_BLOCK              2u   /* Multiple data blocks.                                */
+#define  FS_DEV_SD_CARD_DATA_TYPE_STREAM                   3u   /* Stream data.                                         */
+
+/*
+*********************************************************************************************************
+*                                             CARD ERRORS
+*
+* Note(s) : (a) One of these errors should be returned from the BSP from 'FSDev_SD_Card_BSP_CmdStart()',
+*               'FSDev_SD_Card_BSP_CmdWaitEnd()', 'FSDev_SD_Card_BSP_CmdDataRd()' & 'FSDev_SD_Card_BSP_CmdDataWr()'.
+*********************************************************************************************************
+*/
+
+typedef enum fs_dev_sd_card_err {
+
+    FS_DEV_SD_CARD_ERR_NONE                     =     0u,       /* No error.                                            */
+    FS_DEV_SD_CARD_ERR_NO_CARD                  =     1u,       /* No card present.                                     */
+    FS_DEV_SD_CARD_ERR_BUSY                     =     2u,       /* Controller is busy.                                  */
+    FS_DEV_SD_CARD_ERR_UNKNOWN                  =     3u,       /* Unknown or other error.                              */
+    FS_DEV_SD_CARD_ERR_WAIT_TIMEOUT             =     4u,       /* Timeout in waiting for cmd response/data.            */
+    FS_DEV_SD_CARD_ERR_RESP_TIMEOUT             =     5u,       /* Timeout in receiving cmd response.                   */
+    FS_DEV_SD_CARD_ERR_RESP_CHKSUM              =     6u,       /* Error in response checksum.                          */
+    FS_DEV_SD_CARD_ERR_RESP_CMD_IX              =     7u,       /* Response command index err.                          */
+    FS_DEV_SD_CARD_ERR_RESP_END_BIT             =     8u,       /* Response end bit error.                              */
+    FS_DEV_SD_CARD_ERR_RESP                     =     9u,       /* Other response error.                                */
+    FS_DEV_SD_CARD_ERR_DATA_UNDERRUN            =    10u,       /* Data underrun.                                       */
+    FS_DEV_SD_CARD_ERR_DATA_OVERRUN             =    11u,       /* Data overrun.                                        */
+    FS_DEV_SD_CARD_ERR_DATA_TIMEOUT             =    12u,       /* Timeout in receiving data.                           */
+    FS_DEV_SD_CARD_ERR_DATA_CHKSUM              =    13u,       /* Error in data checksum.                              */
+    FS_DEV_SD_CARD_ERR_DATA_START_BIT           =    14u,       /* Data start bit error.                                */
+    FS_DEV_SD_CARD_ERR_DATA                     =    15u        /* Other data error.                                    */
+
+} FS_DEV_SD_CARD_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      SD CARD COMMAND DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_dev_sd_card_cmd {
+    CPU_INT08U  Cmd;                                            /* Command number.                                      */
+    CPU_INT32U  Arg;                                            /* Command argument.                                    */
+    FS_FLAGS    Flags;                                          /* Command flags.                                       */
+    CPU_INT08U  RespType;                                       /* Response type.                                       */
+    CPU_INT08U  DataDir;                                        /* Data transfer direction.                             */
+    CPU_INT08U  DataType;                                       /* Data transfer type.                                  */
+    CPU_INT32U  BlkSize;                                        /* Size of block(s) in data transfer.                   */
+    CPU_INT32U  BlkCnt;                                         /* Number of blocks in data transfer.                   */
+} FS_DEV_SD_CARD_CMD;
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern             const  FS_DEV_API  FSDev_SD_Card;
+FS_DEV_SD_CARD_EXT        FS_CTR      FSDev_SD_Card_UnitCtr;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void         FSDev_SD_Card_QuerySD           (CPU_CHAR            *name_dev,    /* Get info about SD/MMC card.          */
+                                              FS_DEV_SD_INFO      *p_info,
+                                              FS_ERR              *p_err);
+
+void         FSDev_SD_Card_RdCID             (CPU_CHAR            *name_dev,    /* Read SD/MMC Card ID reg.             */
+                                              CPU_INT08U          *p_dest,
+                                              FS_ERR              *p_err);
+
+void         FSDev_SD_Card_RdCSD             (CPU_CHAR            *name_dev,    /* Read SD/MMC Card-Specific Data reg.  */
+                                              CPU_INT08U          *p_dest,
+                                              FS_ERR              *p_err);
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                               DEFINED IN BSP'S 'fs_dev_sd_card_bsp.c'
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  FSDev_SD_Card_BSP_Open             (FS_QTY               unit_nbr);   /* Open (init) SD/MMC card interface.   */
+
+void         FSDev_SD_Card_BSP_Close            (FS_QTY               unit_nbr);   /* Close (uninit) SD/MMC card interface.*/
+
+void         FSDev_SD_Card_BSP_Lock             (FS_QTY               unit_nbr);   /* Acquire SD/MMC card bus lock.        */
+
+void         FSDev_SD_Card_BSP_Unlock           (FS_QTY               unit_nbr);   /* Release SD/MMC card bus lock.        */
+
+void         FSDev_SD_Card_BSP_CmdStart         (FS_QTY               unit_nbr,    /* Start a command.                     */
+                                                 FS_DEV_SD_CARD_CMD  *p_cmd,
+                                                 void                *p_data,
+                                                 FS_DEV_SD_CARD_ERR  *p_err);
+
+void         FSDev_SD_Card_BSP_CmdWaitEnd       (FS_QTY               unit_nbr,    /* Wait for command end (& response).   */
+                                                 FS_DEV_SD_CARD_CMD  *p_cmd,
+                                                 CPU_INT32U          *p_resp,
+                                                 FS_DEV_SD_CARD_ERR  *p_err);
+
+void         FSDev_SD_Card_BSP_CmdDataRd        (FS_QTY               unit_nbr,    /* Read data following command.         */
+                                                 FS_DEV_SD_CARD_CMD  *p_cmd,
+                                                 void                *p_dest,
+                                                 FS_DEV_SD_CARD_ERR  *p_err);
+
+void         FSDev_SD_Card_BSP_CmdDataWr        (FS_QTY               unit_nbr,    /* Write data following command.        */
+                                                 FS_DEV_SD_CARD_CMD  *p_cmd,
+                                                 void                *p_src,
+                                                 FS_DEV_SD_CARD_ERR  *p_err);
+
+CPU_INT32U   FSDev_SD_Card_BSP_GetBlkCntMax     (FS_QTY               unit_nbr,    /* Get max block cnt for block size.    */
+                                                 CPU_INT32U           blk_size);
+
+CPU_INT08U   FSDev_SD_Card_BSP_GetBusWidthMax   (FS_QTY               unit_nbr);   /* Get max bus width, in bits.          */
+
+void         FSDev_SD_Card_BSP_SetBusWidth      (FS_QTY               unit_nbr,    /* Set bus width.                       */
+                                                 CPU_INT08U           width);
+
+void         FSDev_SD_Card_BSP_SetClkFreq       (FS_QTY               unit_nbr,    /* Set clock frequency.                 */
+                                                 CPU_INT32U           freq);
+
+void         FSDev_SD_Card_BSP_SetTimeoutData   (FS_QTY               unit_nbr,    /* Set data timeout.                    */
+                                                 CPU_INT32U           to_clks);
+
+void         FSDev_SD_Card_BSP_SetTimeoutResp   (FS_QTY               unit_nbr,    /* Set response timeout.                */
+                                                 CPU_INT32U           to_ms);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of SD CARD module include.                       */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/SD/fs_dev_sd.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/SD/fs_dev_sd.h
new file mode 100644
index 0000000..5eab02a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/SD/fs_dev_sd.h
@@ -0,0 +1,499 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                             SD/MMC CARD
+*                                     COMMON DEFINES & FUNCTIONS
+*
+* Filename      : fs_dev_sd.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Reference(s)  : (1) SD Card Association.  "Physical Layer Simplified Specification Version 2.00".
+*                     July 26, 2006.
+*
+*                 (2) JEDEC Solid State Technology Association.  "MultiMediaCard (MMC) Electrical
+*                     Standard, High Capacity".  JESD84-B42.  July 2007.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_SD_PRESENT
+#define  FS_DEV_SD_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_SD_MODULE
+#define  FS_DEV_SD_EXT
+#else
+#define  FS_DEV_SD_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/fs_dev.h"
+
+#if (FS_DEV_SD_SPI_CFG_CRC_EN == DEF_ENABLED)
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- CARD TYPES -------------------- */
+#define  FS_DEV_SD_CARDTYPE_NONE                           0u   /* Card type unspecified.                               */
+#define  FS_DEV_SD_CARDTYPE_SD_V1_X                        1u   /* v1.x SD card.                                        */
+#define  FS_DEV_SD_CARDTYPE_SD_V2_0                        2u   /* v2.0 standard-capacity SD card.                      */
+#define  FS_DEV_SD_CARDTYPE_SD_V2_0_HC                     3u   /* v2.0 high-capacity SD card.                          */
+#define  FS_DEV_SD_CARDTYPE_MMC                            4u   /* Standard-capacity MMC (< 2GB).                       */
+#define  FS_DEV_SD_CARDTYPE_MMC_HC                         5u   /* High-capacity MMC (>= 2GB).                          */
+
+                                                                /* ------------------ CARD REGISTERS ------------------ */
+#define  FS_DEV_SD_REG_OCR                                 1u   /* Operation Conditions Register.                       */
+#define  FS_DEV_SD_REG_CID                                 2u   /* Card Identification Register.                        */
+#define  FS_DEV_SD_REG_CSD                                 3u   /* Card-Specific Data Register.                         */
+#define  FS_DEV_SD_REG_RCA                                 4u   /* Relative Card Address Register.                      */
+#define  FS_DEV_SD_REG_DSR                                 5u   /* Driver Stage Register.                               */
+#define  FS_DEV_SD_REG_SCR                                 6u   /* SD Card Configuration Register (SD only).            */
+#define  FS_DEV_SD_REG_EXT_CSD                             7u   /* Extended CSD Register (MMC only).                    */
+
+                                                                /* --------------- CARD REGISTER LENGTHS -------------- */
+#define  FS_DEV_SD_OCR_REG_LEN                             4u   /* Length of OCR register, in bytes.                    */
+#define  FS_DEV_SD_CID_REG_LEN                            16u   /* Length of CID register, in bytes.                    */
+#define  FS_DEV_SD_CSD_REG_LEN                            16u   /* Length of CSD register, in bytes.                    */
+#define  FS_DEV_SD_RCA_REG_LEN                             2u   /* Length of RCA register, in bytes.                    */
+#define  FS_DEV_SD_DSR_REG_LEN                             2u   /* Length of DSR register, in bytes.                    */
+#define  FS_DEV_SD_CID_SCR_LEN                             8u   /* Length of SCR register, in bytes.                    */
+#define  FS_DEV_SD_CID_EXT_CSD_LEN                       512u   /* Length of extended CSD register, in bytes.           */
+
+#define  FS_DEV_SD_DFLT_CLK_SPD                       400000u   /* Dflt clk spd, in Hz.                                 */
+
+#define  FS_DEV_SD_BLK_SIZE                              512u
+
+#define  FS_DEV_SD_RESP_MAX_LEN                           16u   /* Max resp len, in bytes.                              */
+
+
+/*
+*********************************************************************************************************
+*                                   SD COMMAND ARGUMENT BIT DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ----------- ACMD41 ARGUMENT BIT DEFINES ------------ */
+#define  FS_DEV_SD_ACMD41_HCS                    DEF_BIT_30
+
+
+                                                                /* ------------ CMD8  ARGUMENT BIT DEFINES ------------ */
+#define  FS_DEV_SD_CMD8_VHS_27_36_V              DEF_BIT_08
+#define  FS_DEV_SD_CMD8_VHS_LOW                  DEF_BIT_09
+
+#define  FS_DEV_SD_CMD8_CHK_PATTERN                     0xA5u
+
+
+                                                                /* ------------ CMD59 ARGUMENT BIT DEFINES ------------ */
+#define  FS_DEV_SD_CMD59_CRC_OPT                 DEF_BIT_00
+
+/*
+*********************************************************************************************************
+*                                             SD COMMANDS
+*
+* Note(s) : (1) Detailed command descriptions are given in [Ref 1], Section 4.7.5, and [Ref 2], Section 7.9.4.
+*
+*           (2) (a) Commands that are not supported in SPI mode include :
+*
+*                       CMD2        CMD11       CMD39
+*                       CMD3        CMD15       CMD40
+*                       CMD4        CMD20
+*                       CMD7        CMD26
+*
+*               (b) Commands that are reserved for I/O mode include :
+*
+*                       CMD5
+*                       CMD52
+*                       CMD53
+*                       CMD54
+*
+*               (c) Reserved commands include :
+*
+*                       CMD14       CMD37       CMD50
+*                       CMD19       CMD41       CMD51
+*                       CMD21       CMD43       CMD57
+*                       CMD22       CMD44       CMD60
+*                       CMD23       CMD45       CMD61
+*                       CMD31       CMD46       CMD62
+*                       CMD34       CMD47       CMD63
+*                       CMD35       CMD48
+*                       CMD36       CMD49
+*********************************************************************************************************
+*/
+
+#define  FS_DEV_SD_CMD_CMD00                                0u
+#define  FS_DEV_SD_CMD_GO_IDLE_STATE         FS_DEV_SD_CMD_CMD00    /* Resets all cards to idle state.                  */
+#define  FS_DEV_MMC_CMD_GO_IDLE_STATE        FS_DEV_SD_CMD_CMD00
+
+#define  FS_DEV_SD_CMD_CMD01                                1u
+#define  FS_DEV_SD_CMD_SEND_OP_COND          FS_DEV_SD_CMD_CMD01    /* Sends host cap supp info & act card's init.      */
+#define  FS_DEV_MMC_CMD_SEND_OP_COND         FS_DEV_SD_CMD_CMD01
+
+#define  FS_DEV_SD_CMD_CMD02                                2u
+#define  FS_DEV_SD_CMD_ALL_SEND_CID          FS_DEV_SD_CMD_CMD02    /* Asks any card to send CID numbers on CMD line.   */
+#define  FS_DEV_MMC_CMD_ALL_SEND_CID         FS_DEV_SD_CMD_CMD02
+
+#define  FS_DEV_SD_CMD_CMD03                                3u
+#define  FS_DEV_SD_CMD_SEND_RELATIVE_ADDR    FS_DEV_SD_CMD_CMD03    /* Asks card to publish new RCA.                    */
+#define  FS_DEV_MMC_CMD_SEND_RELATIVE_ADDR   FS_DEV_SD_CMD_CMD03
+
+#define  FS_DEV_SD_CMD_CMD04                                4u
+#define  FS_DEV_SD_CMD_SET_DSR               FS_DEV_SD_CMD_CMD04    /* Programs the DSR of all cards.                   */
+#define  FS_DEV_MMC_CMD_SET_DSR              FS_DEV_SD_CMD_CMD04
+
+#define  FS_DEV_SD_CMD_CMD06                                6u
+#define  FS_DEV_SD_CMD_SWITCH_FUNC           FS_DEV_SD_CMD_CMD06    /* Switches card function.                          */
+#define  FS_DEV_MMC_CMD_SWITCH_FUNC          FS_DEV_SD_CMD_CMD06
+
+#define  FS_DEV_SD_CMD_CMD07                                7u
+#define  FS_DEV_SD_CMD_SEL_DESEL_CARD        FS_DEV_SD_CMD_CMD07    /* Toggle card between stand-by & transfer states.  */
+#define  FS_DEV_MMC_CMD_SEL_DESEL_CARD       FS_DEV_SD_CMD_CMD07
+
+#define  FS_DEV_SD_CMD_CMD08                                8u
+#define  FS_DEV_SD_CMD_SEND_IF_COND          FS_DEV_SD_CMD_CMD08    /* Sends SD interface conditions.                   */
+#define  FS_DEV_MMC_CMD_SEND_EXT_CSD         FS_DEV_SD_CMD_CMD08
+
+#define  FS_DEV_SD_CMD_CMD09                                9u
+#define  FS_DEV_SD_CMD_SEND_CSD              FS_DEV_SD_CMD_CMD09    /* Addr'd card sends Card-Specific Data (CSD).      */
+#define  FS_DEV_MMC_CMD_SEND_CSD             FS_DEV_SD_CMD_CMD09
+
+#define  FS_DEV_SD_CMD_CMD10                               10u
+#define  FS_DEV_SD_CMD_SEND_CID              FS_DEV_SD_CMD_CMD10    /* Addr'd card sends Card Identification (CID).     */
+#define  FS_DEV_MMC_CMD_SEND_CID             FS_DEV_SD_CMD_CMD10
+
+#define  FS_DEV_SD_CMD_CMD11                               11u
+#define  FS_DEV_SD_CMD_READ_DAT_UNTIL_STOP   FS_DEV_SD_CMD_CMD11    /* Read data until stop transmission.               */
+#define  FS_DEV_MMC_CMD_READ_DAT_UNTIL_STOP  FS_DEV_SD_CMD_CMD11
+
+#define  FS_DEV_SD_CMD_CMD12                               12u
+#define  FS_DEV_SD_CMD_STOP_TRANSMISSION     FS_DEV_SD_CMD_CMD12    /* Forces the card to stop transmission.            */
+#define  FS_DEV_MMC_CMD_STOP_TRANSMISSION    FS_DEV_SD_CMD_CMD12
+
+#define  FS_DEV_SD_CMD_CMD13                               13u
+#define  FS_DEV_SD_CMD_SEND_STATUS           FS_DEV_SD_CMD_CMD13    /* Addressed card sends its status register.        */
+#define  FS_DEV_MMC_CMD_SEND_STATUS          FS_DEV_SD_CMD_CMD13
+
+#define  FS_DEV_SD_CMD_CMD14                               14u
+#define  FS_DEV_SD_CMD_BUSTEST_R             FS_DEV_SD_CMD_CMD14    /* Read the reversed bus testing data pattern.      */
+#define  FS_DEV_MMC_CMD_BUSTEST_R            FS_DEV_SD_CMD_CMD14
+
+#define  FS_DEV_SD_CMD_CMD15                               15u
+#define  FS_DEV_SD_CMD_GO_INACTIVE_STATE     FS_DEV_SD_CMD_CMD15    /* Sends an addressed card into the inactive state. */
+#define  FS_DEV_MMC_CMD_GO_INACTIVE_STATE    FS_DEV_SD_CMD_CMD15
+
+#define  FS_DEV_SD_CMD_CMD16                               16u
+#define  FS_DEV_SD_CMD_SET_BLOCKLEN          FS_DEV_SD_CMD_CMD16    /* Sets the block length in block (std cap SD).     */
+#define  FS_DEV_MMc_CMD_SET_BLOCKLEN         FS_DEV_SD_CMD_CMD16
+
+#define  FS_DEV_SD_CMD_CMD17                               17u
+#define  FS_DEV_SD_CMD_READ_SINGLE_BLOCK     FS_DEV_SD_CMD_CMD17    /* Reads a block the size sel'd by SET_BLOCKLEN.    */
+#define  FS_DEV_MMC_CMD_READ_SINGLE_BLOCK    FS_DEV_SD_CMD_CMD17
+
+#define  FS_DEV_SD_CMD_CMD18                               18u
+#define  FS_DEV_SD_CMD_READ_MULTIPLE_BLOCK   FS_DEV_SD_CMD_CMD18    /* Continuously xfers data blks until STOP_TRAN.    */
+#define  FS_DEV_MMC_CMD_READ_MULTIPLE_BLOCK  FS_DEV_SD_CMD_CMD18
+
+#define  FS_DEV_SD_CMD_CMD19                               19u
+#define  FS_DEV_SD_CMD_BUSTEST_W             FS_DEV_SD_CMD_CMD19    /* Send the bus test data pattern to a card.        */
+#define  FS_DEV_MMC_CMD_BUSTEST_W            FS_DEV_SD_CMD_CMD19
+
+#define  FS_DEV_SD_CMD_CMD20                               20u
+#define  FS_DEV_SD_CMD_WRITE_DAT_UNTIL_STOP  FS_DEV_SD_CMD_CMD20    /* Write a data stream until stop transmission.     */
+#define  FS_DEV_MMC_CMD_WRITE_DAT_UNTIL_STOP FS_DEV_SD_CMD_CMD20
+
+#define  FS_DEV_SD_CMD_CMD23                               23u
+#define  FS_DEV_SD_CMD_SET_BLOCK_COUNT       FS_DEV_SD_CMD_CMD23    /* Define the number of blocks to be transferred.   */
+#define  FS_DEV_MMC_CMD_SET_BLOCK_COUNT      FS_DEV_SD_CMD_CMD23
+
+#define  FS_DEV_SD_CMD_CMD24                               24u
+#define  FS_DEV_SD_CMD_WRITE_BLOCK           FS_DEV_SD_CMD_CMD24    /* Writes a block the size sel'd by SET_BLOCKLEN.   */
+#define  FS_DEV_MMC_CMD_WRITE_BLOCK          FS_DEV_SD_CMD_CMD24
+
+#define  FS_DEV_SD_CMD_CMD25                               25u
+#define  FS_DEV_SD_CMD_WRITE_MULTIPLE_BLOCK  FS_DEV_SD_CMD_CMD25    /* Continuously writes data blks until STOP_TRAN.   */
+#define  FS_DEV_MMC_CMD_WRITE_MULTIPLE_BLOCK FS_DEV_SD_CMD_CMD25
+
+#define  FS_DEV_SD_CMD_CMD26                               26u
+#define  FS_DEV_SD_CMD_PROGRAM_CID           FS_DEV_SD_CMD_CMD26    /* Programming of the CID.                          */
+#define  FS_DEV_MMC_CMD_PROGRAM_CID          FS_DEV_SD_CMD_CMD26
+
+#define  FS_DEV_SD_CMD_CMD27                               27u
+#define  FS_DEV_SD_CMD_PROGRAM_CSD           FS_DEV_SD_CMD_CMD27    /* Programming of the programmable bits of the CSD. */
+#define  FS_DEV_MMC_CMD_PROGRAM_CSD          FS_DEV_SD_CMD_CMD27
+
+#define  FS_DEV_SD_CMD_CMD28                               28u
+#define  FS_DEV_SD_CMD_SET_WRITE_PROT        FS_DEV_SD_CMD_CMD28    /* Sets the write protection bit of addr'd group.   */
+#define  FS_DEV_MMC_CMD_SET_WRITE_PROT       FS_DEV_SD_CMD_CMD28
+
+#define  FS_DEV_SD_CMD_CMD29                               29u
+#define  FS_DEV_SD_CMD_CLR_WRITE_PROT        FS_DEV_SD_CMD_CMD29    /* Clrs the write protection bit of addr'd group.   */
+#define  FS_DEV_MMC_CMD_CLR_WRITE_PROT       FS_DEV_SD_CMD_CMD29
+
+#define  FS_DEV_SD_CMD_CMD30                               30u
+#define  FS_DEV_SD_CMD_SEND_WRITE_PROT       FS_DEV_SD_CMD_CMD30    /* Asks card to send status of wr protection bits.  */
+#define  FS_DEV_MMC_CMD_SEND_WRITE_PROT      FS_DEV_SD_CMD_CMD30
+
+#define  FS_DEV_SD_CMD_CMD32                               32u
+#define  FS_DEV_SD_CMD_ERASE_WR_BLK_START    FS_DEV_SD_CMD_CMD32    /* Sets addr of 1st wr blk to be erased.            */
+#define  FS_DEV_MMC_CMD_ERASE_WR_BLK_START   FS_DEV_SD_CMD_CMD32
+
+#define  FS_DEV_SD_CMD_CMD33                               33u
+#define  FS_DEV_SD_CMD_ERASE_WR_BLK_END      FS_DEV_SD_CMD_CMD33    /* Sets addr of last wr blk to be erased.           */
+#define  FS_DEV_MMC_CMD_ERASE_WR_BLK_END     FS_DEV_SD_CMD_CMD33
+
+#define  FS_DEV_SD_CMD_CMD35                               35u
+#define  FS_DEV_SD_CMD_ERASE_GROUP_START     FS_DEV_SD_CMD_CMD35    /* Sets address of first erase group within a range.*/
+#define  FS_DEV_MMC_CMD_ERASE_GROUP_START    FS_DEV_SD_CMD_CMD35
+
+#define  FS_DEV_SD_CMD_CMD36                               36u
+#define  FS_DEV_SD_CMD_ERASE_GROUP_END       FS_DEV_SD_CMD_CMD36    /* Sets address of last  erase group within a range.*/
+#define  FS_DEV_MMC_CMD_ERASE_GROUP_END      FS_DEV_SD_CMD_CMD36
+
+#define  FS_DEV_SD_CMD_CMD38                               38u
+#define  FS_DEV_SD_CMD_ERASE                 FS_DEV_SD_CMD_CMD38    /* Erases all prev sel'd wr blks.                   */
+#define  FS_DEV_MMC_CMD_ERASE                FS_DEV_SD_CMD_CMD38
+
+#define  FS_DEV_SD_CMD_CMD39                               39u
+#define  FS_DEV_SD_CMD_FAST_IO               FS_DEV_SD_CMD_CMD39    /* Used to write & read 8-bit data fields.          */
+#define  FS_DEV_MMC_CMD_FAST_IO              FS_DEV_SD_CMD_CMD39
+
+#define  FS_DEV_SD_CMD_CMD40                               40u
+#define  FS_DEV_SD_CMD_GO_IRQ_STATE          FS_DEV_SD_CMD_CMD40    /* Sets the system into interrupt mode.             */
+#define  FS_DEV_MMC_CMD_GO_IRQ_STATE         FS_DEV_SD_CMD_CMD40
+
+#define  FS_DEV_SD_CMD_CMD42                               42u
+#define  FS_DEV_SD_CMD_LOCK_UNLOCK           FS_DEV_SD_CMD_CMD42    /* Used to set/reset password or lock/unlock card.  */
+#define  FS_DEV_MMC_CMD_LOCK_UNLOCK          FS_DEV_SD_CMD_CMD42
+
+#define  FS_DEV_SD_CMD_CMD55                               55u
+#define  FS_DEV_SD_CMD_APP_CMD               FS_DEV_SD_CMD_CMD55    /* Indicates that next cmd is app cmd.              */
+#define  FS_DEV_MMC_CMD_APP_CMD              FS_DEV_SD_CMD_CMD55
+
+#define  FS_DEV_SD_CMD_CMD56                               56u
+#define  FS_DEV_SD_CMD_GEN_CMD               FS_DEV_SD_CMD_CMD56    /* Gets/sends data blk from app cmd.                */
+#define  FS_DEV_MMC_CMD_GEN_CMD              FS_DEV_SD_CMD_CMD56
+
+#define  FS_DEV_SD_CMD_CMD58                               58u
+#define  FS_DEV_SD_CMD_READ_OCR              FS_DEV_SD_CMD_CMD58    /* Reads OCR register of card.                      */
+#define  FS_DEV_MMC_CMD_READ_OCR             FS_DEV_SD_CMD_CMD58
+
+#define  FS_DEV_SD_CMD_CMD59                               59u
+#define  FS_DEV_SD_CMD_CRC_ON_OFF            FS_DEV_SD_CMD_CMD59    /* Turns the CRC option on or off.                  */
+#define  FS_DEV_MMC_CMD_CRC_ON_OFF           FS_DEV_SD_CMD_CMD59
+
+/*
+*********************************************************************************************************
+*                                  SD APPLICATION-SPECIFIC COMMANDS
+*
+* Note(s) : (1) Detailed application-specific command descriptions are given in [Ref 1], Section 4.7.5,
+*               Table 4-26.
+*
+*           (2) (a) Application-specific commands that are not supported in SPI mode include :
+*
+*                       ACMD6
+*
+*               (b) Commands that are reserved for SD security applications include :
+*
+*                       ACMD18      ACMD43      ACMD47
+*                       ACMD25      ACMD44      ACMD48
+*                       ACMD26      ACMD45      ACMD49
+*                       ACMD38      ACMD46
+*
+*               (c) Reserved commands include :
+*
+*                       ACMD17      ACMD24
+*                       ACMD19      ACMD39
+*                       ACMD20      ACMD40
+*                       AMCD21
+*********************************************************************************************************
+*/
+
+#define  FS_DEV_SD_ACMD_ACMD06                              6u
+#define  FS_DEV_SD_ACMD_BUS_WIDTH              FS_DEV_SD_ACMD_ACMD06/* Define the data bus width for data transfer.     */
+
+#define  FS_DEV_SD_ACMD_ACMD13                             13u
+#define  FS_DEV_SD_ACMD_SD_STATUS              FS_DEV_SD_ACMD_ACMD13/* Send the SD status.                              */
+
+#define  FS_DEV_SD_ACMD_ACMD22                             22u
+#define  FS_DEV_SD_ACMD_SEND_NUM_WR_BLOCKS     FS_DEV_SD_ACMD_ACMD22/* Send the nbr of wr'n wr blks.                    */
+
+#define  FS_DEV_SD_ACMD_ACMD23                             23u
+#define  FS_DEV_SD_ACMD_SET_WR_BLK_ERASE_COUNT FS_DEV_SD_ACMD_ACMD23/* Send the nbr of wr blks to be pre-erased.        */
+
+#define  FS_DEV_SD_ACMD_ACMD41                             41u
+#define  FS_DEV_SD_ACMD_SD_SEND_OP_COND        FS_DEV_SD_ACMD_ACMD41/* Sends host capacity support & gets OCR.          */
+
+#define  FS_DEV_SD_ACMD_ACMD42                             42u
+#define  FS_DEV_SD_ACMD_SET_CLR_CARD_DETECT    FS_DEV_SD_ACMD_ACMD42/* Conn/disconn 50 kOhm res on DAT3.                */
+
+#define  FS_DEV_SD_ACMD_ACMD51                             51u
+#define  FS_DEV_SD_ACMD_SEND_SCR               FS_DEV_SD_ACMD_ACMD51/* Reads the SD configuration register.             */
+
+/*
+*********************************************************************************************************
+*                                      OCR REGISTER BIT DEFINES
+*
+* Note(s) : (1) See [Ref 1], Table 5-1, & [Ref 2], Section 8.1.
+*********************************************************************************************************
+*/
+
+#define  FS_DEV_SD_OCR_LVR                       DEF_BIT_07     /* Card is dual-voltage.                                */
+#define  FS_DEV_SD_OCR_20_21V                    DEF_BIT_08     /* Card supports 2.0-2.1V.                              */
+#define  FS_DEV_SD_OCR_21_22V                    DEF_BIT_09     /* Card supports 2.1-2.2V.                              */
+#define  FS_DEV_SD_OCR_22_33V                    DEF_BIT_10     /* Card supports 2.2-2.3V.                              */
+#define  FS_DEV_SD_OCR_23_24V                    DEF_BIT_11     /* Card supports 2.3-2.4V.                              */
+#define  FS_DEV_SD_OCR_24_25V                    DEF_BIT_12     /* Card supports 2.4-2.5V.                              */
+#define  FS_DEV_SD_OCR_25_26V                    DEF_BIT_13     /* Card supports 2.5-2.6V.                              */
+#define  FS_DEV_SD_OCR_26_27V                    DEF_BIT_14     /* Card supports 2.6-2.7V.                              */
+#define  FS_DEV_SD_OCR_27_28V                    DEF_BIT_15     /* Card supports 2.7-2.8V.                              */
+#define  FS_DEV_SD_OCR_28_29V                    DEF_BIT_16     /* Card supports 2.8-2.9V.                              */
+#define  FS_DEV_SD_OCR_29_30V                    DEF_BIT_17     /* Card supports 2.9-3.0V.                              */
+#define  FS_DEV_SD_OCR_30_31V                    DEF_BIT_18     /* Card supports 3.0-3.1V.                              */
+#define  FS_DEV_SD_OCR_31_32V                    DEF_BIT_19     /* Card supports 3.1-3.2V.                              */
+#define  FS_DEV_SD_OCR_32_33V                    DEF_BIT_20     /* Card supports 3.2-3.3V.                              */
+#define  FS_DEV_SD_OCR_33_34V                    DEF_BIT_21     /* Card supports 3.3-3.4V.                              */
+#define  FS_DEV_SD_OCR_34_35V                    DEF_BIT_22     /* Card supports 3.4-3.5V.                              */
+#define  FS_DEV_SD_OCR_35_36V                    DEF_BIT_23     /* Card supports 3.5-3.6V.                              */
+#define  FS_DEV_SD_OCR_CCS                       DEF_BIT_30     /* HC card.                                             */
+#define  FS_DEV_SD_OCR_BUSY                      DEF_BIT_31     /* Card has finished power-up routine.                  */
+
+#define  FS_DEV_SD_OCR_VOLTAGE_MASK             (FS_DEV_SD_OCR_27_28V | FS_DEV_SD_OCR_28_29V | FS_DEV_SD_OCR_29_30V | \
+                                                 FS_DEV_SD_OCR_30_31V | FS_DEV_SD_OCR_31_32V | FS_DEV_SD_OCR_32_33V | \
+                                                 FS_DEV_SD_OCR_33_34V | FS_DEV_SD_OCR_34_35V | FS_DEV_SD_OCR_35_36V)
+#define  FS_DEV_SD_OCR_ACCESS_MODE_SEC           DEF_BIT_30     /* Access mode: sector (for MMC only).                  */
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_dev_sd_info {
+    CPU_INT32U   BlkSize;                                       /* Block size, in octets (typically 512).               */
+    CPU_INT32U   NbrBlks;                                       /* Capacity of device, in blocks.                       */
+    CPU_INT32U   ClkFreq;                                       /* Max supported clock freq, in Hz.                     */
+    CPU_INT32U   Timeout;                                       /* Communication timeout, in cycles.                    */
+    CPU_INT08U   CardType;                                      /* Card type.                                           */
+    CPU_BOOLEAN  HighCapacity;                                  /* Standard capacity/high capacity.                     */
+    CPU_INT08U   ManufID;                                       /* Manufacturer ID.                                     */
+    CPU_INT16U   OEM_ID;                                        /* OEM/Application ID.                                  */
+    CPU_INT32U   ProdSN;                                        /* Product serial number.                               */
+    CPU_CHAR     ProdName[7];                                   /* Product name.                                        */
+    CPU_INT16U   ProdRev;                                       /* Product revision.                                    */
+    CPU_INT16U   Date;                                          /* Date.                                                */
+} FS_DEV_SD_INFO;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  FSDev_SD_ParseCSD        (CPU_INT08U       csd[],      /* Parse CSD.                                       */
+                                       FS_DEV_SD_INFO  *p_sd_info,
+                                       CPU_INT08U       card_type);
+
+CPU_BOOLEAN  FSDev_SD_ParseCID        (CPU_INT08U       cid[],      /* Parse CID.                                       */
+                                       FS_DEV_SD_INFO  *p_sd_info,
+                                       CPU_INT08U       card_type);
+
+CPU_INT08U   FSDev_SD_ChkSumCalc_7Bit (CPU_INT08U      *p_data,     /* Calculate 7-bit CRC.                             */
+                                       CPU_INT32U       size);
+
+#if (FS_DEV_SD_SPI_CFG_CRC_EN == DEF_ENABLED)
+CPU_INT16U   FSDev_SD_ChkSumCalc_16Bit(CPU_INT08U      *p_data,     /* Calculate 16-bit CRC.                            */
+                                       CPU_INT32U       size);
+#endif
+
+#if (FS_TRACE_LEVEL >= TRACE_LEVEL_INFO)
+void         FSDev_SD_TraceInfo       (FS_DEV_SD_INFO  *p_sd_info); /* Output SD trace info.                            */
+#endif
+
+void         FSDev_SD_ClrInfo         (FS_DEV_SD_INFO  *p_sd_info); /* Clr SD info.                                     */
+
+
+CPU_BOOLEAN  FSDev_SD_ParseEXT_CSD    (CPU_INT08U       ext_csd[],  /* Parse EXT_CSD reg.                               */
+                                       FS_DEV_SD_INFO  *p_sd_info);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of SD module include.                            */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Dev/Template/fs_dev_template.h b/src/ucos_v1_42/micrium_source/uC-FS/Dev/Template/fs_dev_template.h
new file mode 100644
index 0000000..7777836
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Dev/Template/fs_dev_template.h
@@ -0,0 +1,139 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                              TEMPLATE
+*
+* Filename      : fs_dev_####.h
+* Version       : v4.07.00.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (a) Replace #### with the driver identifier (in the correct case).
+*                 (b) Replace $$$$ with code/definitions/etc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_TEMPLATE_PRESENT
+#define  FS_DEV_TEMPLATE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_TEMPLATE_MODULE
+#define  FS_DEV_TEMPLATE_EXT
+#else
+#define  FS_DEV_TEMPLATE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/fs_dev.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern const         FS_DEV_API  FSDev_Template;
+FS_DEV_TEMPLATE_EXT  FS_QTY      FSDev_Template_UnitCtr;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                 DEFINED IN BSP'S 'fs_dev_####_bsp.c'
+*********************************************************************************************************
+*/
+
+void  FSDev_Template_BSP_Open (FS_QTY  unit_nbr);               /* Open (initialize).                                   */
+
+void  FSDev_Template_BSP_Close(FS_QTY  unit_nbr);               /* Close (uninitialize).                                */
+
+    /* $$$$ OTHER BSP FUNCTIONS */
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of #### module include.                          */
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat.h
new file mode 100644
index 0000000..0a75122
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat.h
@@ -0,0 +1,937 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+* Filename      : fs_fat.h
+* Version       : v4.07.00
+* Programmer(s) : AHFAI
+*                 FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE GUARD
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_H
+#define  FS_FAT_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_ctr.h"
+#include  "../Source/fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) The following FAT-module-present configuration value MUST be pre-#define'd in
+*               'fs_cfg_fs.h' PRIOR to all other file system modules that require FAT Layer
+*               Configuration (see 'fs_cfg_fs.h  FAT LAYER CONFIGURATION  Note #2b') :
+*
+*                   FS_FAT_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_MODULE_PRESENT                                  /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_MODULE
+#define  FS_FAT_EXT
+#else
+#define  FS_FAT_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_err.h"
+#include  "fs_fat_type.h"
+#include  "../Source/fs_util.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_PATH_SEP_CHAR                    FS_CHAR_PATH_SEP
+
+#define  FS_FAT_SIZE_DIR_ENTRY                            32u
+
+#ifdef   FS_FAT_LFN_MODULE_PRESENT
+#define  FS_FAT_MAX_PATH_NAME_LEN                        256u
+#define  FS_FAT_MAX_FILE_NAME_LEN                        255u
+#define  FS_FAT_FN_API_Active                     FS_FAT_LFN_API
+
+#else
+#define  FS_FAT_MAX_PATH_NAME_LEN                        256u
+#define  FS_FAT_MAX_FILE_NAME_LEN                         12u
+#define  FS_FAT_FN_API_Active                     FS_FAT_SFN_API
+#endif
+
+
+#define  FS_FAT_SFN_NAME_MAX_NBR_CHAR                      8u
+#define  FS_FAT_SFN_EXT_MAX_NBR_CHAR                       3u
+#define  FS_FAT_SFN_MAX_STEM_LEN                           6u
+
+#define  FS_FAT_MODE_NONE                        FS_FILE_ACCESS_MODE_NONE
+#define  FS_FAT_MODE_RD                          FS_FILE_ACCESS_MODE_RD
+#define  FS_FAT_MODE_WR                          FS_FILE_ACCESS_MODE_WR
+#define  FS_FAT_MODE_CREATE                      FS_FILE_ACCESS_MODE_CREATE
+#define  FS_FAT_MODE_TRUNCATE                    FS_FILE_ACCESS_MODE_TRUNCATE
+#define  FS_FAT_MODE_APPEND                      FS_FILE_ACCESS_MODE_APPEND
+#define  FS_FAT_MODE_MUST_CREATE                 FS_FILE_ACCESS_MODE_EXCL
+#define  FS_FAT_MODE_CACHED                      FS_FILE_ACCESS_MODE_CACHED
+#define  FS_FAT_MODE_DEL                         DEF_BIT_07
+#define  FS_FAT_MODE_DIR                         DEF_BIT_08
+#define  FS_FAT_MODE_FILE                        DEF_BIT_09
+
+#define  FS_FAT_MIN_CLUS_NBR                               2u
+
+#define  FS_FAT_FAT16_ENTRY_NBR_OCTETS                     2u
+#define  FS_FAT_FAT32_ENTRY_NBR_OCTETS                     4u
+
+#define  FS_FAT_VOL_LABEL_LEN                             11u
+
+/*
+*********************************************************************************************************
+*                                      BOOT SECTOR & BPB DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_BS_OFF_JMPBOOT                             0u
+#define  FS_FAT_BS_OFF_OEMNAME                             3u
+#define  FS_FAT_BPB_OFF_BYTSPERSEC                        11u
+#define  FS_FAT_BPB_OFF_SECPERCLUS                        13u
+#define  FS_FAT_BPB_OFF_RSVDSECCNT                        14u
+#define  FS_FAT_BPB_OFF_NUMFATS                           16u
+#define  FS_FAT_BPB_OFF_ROOTENTCNT                        17u
+#define  FS_FAT_BPB_OFF_TOTSEC16                          19u
+#define  FS_FAT_BPB_OFF_MEDIA                             21u
+#define  FS_FAT_BPB_OFF_FATSZ16                           22u
+#define  FS_FAT_BPB_OFF_SECPERTRK                         24u
+#define  FS_FAT_BPB_OFF_NUMHEADS                          26u
+#define  FS_FAT_BPB_OFF_HIDDSEC                           28u
+#define  FS_FAT_BPB_OFF_TOTSEC32                          32u
+
+#define  FS_FAT_BS_FAT1216_OFF_DRVNUM                     36u
+#define  FS_FAT_BS_FAT1216_OFF_RESERVED1                  37u
+#define  FS_FAT_BS_FAT1216_OFF_BOOTSIG                    38u
+#define  FS_FAT_BS_FAT1216_OFF_VOLID                      39u
+#define  FS_FAT_BS_FAT1216_OFF_VOLLAB                     43u
+#define  FS_FAT_BS_FAT1216_OFF_FILSYSTYPE                 54u
+
+#define  FS_FAT_BPB_FAT32_OFF_FATSZ32                     36u
+#define  FS_FAT_BPB_FAT32_OFF_EXTFLAGS                    40u
+#define  FS_FAT_BPB_FAT32_OFF_FSVER                       42u
+#define  FS_FAT_BPB_FAT32_OFF_ROOTCLUS                    44u
+#define  FS_FAT_BPB_FAT32_OFF_FSINFO                      48u
+#define  FS_FAT_BPB_FAT32_OFF_BKBOOTSEC                   50u
+#define  FS_FAT_BPB_FAT32_OFF_RESERVED                    52u
+#define  FS_FAT_BS_FAT32_OFF_DRVNUM                       64u
+#define  FS_FAT_BS_FAT32_OFF_RESERVED1                    65u
+#define  FS_FAT_BS_FAT32_OFF_BOOTSIG                      66u
+#define  FS_FAT_BS_FAT32_OFF_VOLID                        67u
+#define  FS_FAT_BS_FAT32_OFF_VOLLAB                       71u
+#define  FS_FAT_BS_FAT32_OFF_FILSYSTYPE                   82u
+
+#define  FS_FAT_BS_FAT12_FILESYSTYPE            "FAT12   "
+#define  FS_FAT_BS_FAT16_FILESYSTYPE            "FAT16   "
+#define  FS_FAT_BS_FAT32_FILESYSTYPE            "FAT32   "
+
+#define  FS_FAT_BS_JMPBOOT_0                            0xEBu
+#define  FS_FAT_BS_JMPBOOT_1                            0x58u
+#define  FS_FAT_BS_JMPBOOT_2                            0x90u
+#define  FS_FAT_BS_OEMNAME                         "MSWIN4.1"
+
+#define  FS_FAT_BPB_MEDIA_FIXED                         0xF8u
+#define  FS_FAT_BPB_MEDIA_REMOVABLE                     0xF0u
+
+#define  FS_FAT_BS_BOOTSIG                              0x29u
+
+#define  FS_FAT_BS_VOLLAB                       "NO NAME    "
+
+#define  FS_FAT_BOOT_SIG                              0xAA55u
+#define  FS_FAT_BOOT_SIG_LO                             0x55u
+#define  FS_FAT_BOOT_SIG_HI                             0xAAu
+
+#define  FS_FAT_BOOT_SIG_LO_OFF                          510u
+#define  FS_FAT_BOOT_SIG_HI_OFF                          511u
+
+/*
+*********************************************************************************************************
+*                                           DEFAULT VALUES
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_DFLT_RSVD_SEC_CNT_FAT12                    1u
+#define  FS_FAT_DFLT_RSVD_SEC_CNT_FAT16                    1u
+#define  FS_FAT_DFLT_RSVD_SEC_CNT_FAT32                   32u
+
+#define  FS_FAT_DFLT_NBR_FATS_FAT12                        2u
+#define  FS_FAT_DFLT_NBR_FATS_FAT16                        2u
+#define  FS_FAT_DFLT_NBR_FATS_FAT32                        2u
+
+#define  FS_FAT_DFLT_ROOT_ENT_CNT_FAT12                  512u
+#define  FS_FAT_DFLT_ROOT_ENT_CNT_FAT16                  512u
+#define  FS_FAT_DFLT_ROOT_ENT_CNT_FAT32                    0u
+
+#define  FS_FAT_DFLT_ROOT_CLUS_NBR                         2u
+#define  FS_FAT_DFLT_FSINFO_SEC_NBR                        1u
+#define  FS_FAT_DFLT_BKBOOTSEC_SEC_NBR                     6u
+
+/*
+*********************************************************************************************************
+*                                         DIRECTORY ENTRY DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_DIRENT_NAME_ERASED_AND_FREE             0xE5u
+#define  FS_FAT_DIRENT_NAME_FREE                        0x00u
+#define  FS_FAT_DIRENT_NAME_LAST_LONG_ENTRY             0x40u
+#define  FS_FAT_DIRENT_NAME_LONG_ENTRY_MASK             0x3Fu
+
+#define  FS_FAT_DIRENT_ATTR_NONE                 DEF_BIT_NONE
+#define  FS_FAT_DIRENT_ATTR_READ_ONLY            DEF_BIT_00     /* Writes to the file should fail.                      */
+#define  FS_FAT_DIRENT_ATTR_HIDDEN               DEF_BIT_01     /* Normal directory listings should not show file.      */
+#define  FS_FAT_DIRENT_ATTR_SYSTEM               DEF_BIT_02     /* Operating system file.                               */
+#define  FS_FAT_DIRENT_ATTR_VOLUME_ID            DEF_BIT_03     /* Marks file with name corresponding to volume label.  */
+#define  FS_FAT_DIRENT_ATTR_DIRECTORY            DEF_BIT_04     /* File is container for other files.                   */
+#define  FS_FAT_DIRENT_ATTR_ARCHIVE              DEF_BIT_05     /* Set when file is created, renamed or written to.     */
+
+#define  FS_FAT_DIRENT_ATTR_LONG_NAME           (FS_FAT_DIRENT_ATTR_READ_ONLY | FS_FAT_DIRENT_ATTR_HIDDEN    | \
+                                                 FS_FAT_DIRENT_ATTR_SYSTEM    | FS_FAT_DIRENT_ATTR_VOLUME_ID)
+
+#define  FS_FAT_DIRENT_ATTR_LONG_NAME_MASK      (FS_FAT_DIRENT_ATTR_READ_ONLY | FS_FAT_DIRENT_ATTR_HIDDEN    | \
+                                                 FS_FAT_DIRENT_ATTR_SYSTEM    | FS_FAT_DIRENT_ATTR_VOLUME_ID | \
+                                                 FS_FAT_DIRENT_ATTR_DIRECTORY | FS_FAT_DIRENT_ATTR_ARCHIVE)
+
+#define  FS_FAT_DIRENT_ATTR_IS_LONG_NAME(attrib)     ((((attrib) & FS_FAT_DIRENT_ATTR_LONG_NAME_MASK) == FS_FAT_DIRENT_ATTR_LONG_NAME) ? DEF_YES : DEF_NO)
+
+#define  FS_FAT_DIRENT_NTRES_NAME_LOWER_CASE     DEF_BIT_03
+#define  FS_FAT_DIRENT_NTRES_EXT_LOWER_CASE      DEF_BIT_04
+
+#define  FS_FAT_DIRENT_OFF_NAME                            0u
+#define  FS_FAT_DIRENT_OFF_ATTR                           11u
+#define  FS_FAT_DIRENT_OFF_NTRES                          12u
+#define  FS_FAT_DIRENT_OFF_CRTTIMETENTH                   13u
+#define  FS_FAT_DIRENT_OFF_CRTTIME                        14u
+#define  FS_FAT_DIRENT_OFF_CRTDATE                        16u
+#define  FS_FAT_DIRENT_OFF_LSTACCDATE                     18u
+#define  FS_FAT_DIRENT_OFF_FSTCLUSHI                      20u
+#define  FS_FAT_DIRENT_OFF_WRTTIME                        22u
+#define  FS_FAT_DIRENT_OFF_WRTDATE                        24u
+#define  FS_FAT_DIRENT_OFF_FSTCLUSLO                      26u
+#define  FS_FAT_DIRENT_OFF_FILESIZE                       28u
+
+/*
+*********************************************************************************************************
+*                                            JOURNAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_JOURNAL_STATE_OPEN               DEF_BIT_01
+#define  FS_FAT_JOURNAL_STATE_START              DEF_BIT_02
+#define  FS_FAT_JOURNAL_STATE_REPLAY             DEF_BIT_03
+
+/*
+*********************************************************************************************************
+*                                          FAT FAT TYPE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_FAT_TYPE_UNKNOWN                           0u
+#define  FS_FAT_FAT_TYPE_FAT12                            12u
+#define  FS_FAT_FAT_TYPE_FAT16                            16u
+#define  FS_FAT_FAT_TYPE_FAT32                            32u
+
+/*
+*********************************************************************************************************
+*                                            FAT TYPE DEFINES
+*
+* Note(s) : (1) FS_FAT_TYPE_??? #define values specifically chosen as ASCII representations of the FAT
+*               types.  Memory displays of FAT types will display the FAT TYPE with the chosen ASCII
+*               name.
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_TYPE_FAT_NONE       FS_TYPE_CREATE(ASCII_CHAR_LATIN_UPPER_N,  \
+                                                   ASCII_CHAR_LATIN_UPPER_O,  \
+                                                   ASCII_CHAR_LATIN_UPPER_N,  \
+                                                   ASCII_CHAR_LATIN_UPPER_E)
+
+#define  FS_FAT_TYPE_FAT_INFO       FS_TYPE_CREATE(ASCII_CHAR_LATIN_UPPER_F,  \
+                                                   ASCII_CHAR_LATIN_UPPER_A,  \
+                                                   ASCII_CHAR_LATIN_UPPER_T,  \
+                                                   ASCII_CHAR_SPACE)
+
+#define  FS_FAT_TYPE_FAT_FILE_INFO  FS_TYPE_CREATE(ASCII_CHAR_LATIN_UPPER_F,  \
+                                                   ASCII_CHAR_LATIN_UPPER_A,  \
+                                                   ASCII_CHAR_LATIN_UPPER_F,  \
+                                                   ASCII_CHAR_LATIN_UPPER_I)
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       FAT FILE DATA DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_fat_file_data {
+    FS_FAT_FILE_SIZE          FilePos;                          /* Current file pos.                                    */
+    FS_FAT_FILE_SIZE          FileSize;                         /* Nbr octets in file.                                  */
+    CPU_BOOLEAN               UpdateReqd;                       /* Dir sec update req'd.                                */
+    FS_FLAGS                  Mode;                             /* Access mode.                                         */
+
+    FS_FAT_SEC_NBR            DirFirstSec;                      /* First sec nbr of file's parent dir.                  */
+    FS_FAT_SEC_NBR            DirStartSec;                      /* Sec  nbr of file's first dir entry.                  */
+    FS_SEC_SIZE               DirStartSecPos;                   /* Pos of      file's first dir entry in sec.           */
+    FS_FAT_SEC_NBR            DirEndSec;                        /* Sec  nbr of file's last  dir entry.                  */
+    FS_SEC_SIZE               DirEndSecPos;                     /* Pos of      file's last  dir entry in sec.           */
+
+    FS_FAT_CLUS_NBR           FileFirstClus;                    /* Clus nbr of first file clus.                         */
+    FS_FAT_SEC_NBR            FileCurSec;                       /* Sec  nbr of cur   file sec.                          */
+    FS_SEC_SIZE               FileCurSecPos;                    /* Pos      of cur   file pos in sec.                   */
+
+    FS_FLAGS                  Attrib;                           /* File attrib.                                         */
+    FS_FAT_DATE               DateCreate;                       /* File creation date.                                  */
+    FS_FAT_TIME               TimeCreate;                       /* File creation time.                                  */
+    FS_FAT_DATE               DateAccess;                       /* File last access date.                               */
+    FS_FAT_DATE               DateWr;                           /* File last wr  date.                                  */
+    FS_FAT_TIME               TimeWr;                           /* File last wr  time.                                  */
+};
+
+
+/*
+*********************************************************************************************************
+*                                         FAT INFO DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_fat_data {
+    FS_FAT_SEC_NBR            RsvdSize;                         /* Nbr of sec  in rsvd area.                            */
+    FS_FAT_SEC_NBR            FAT_Size;                         /* Nbr of sec  in each FAT.                             */
+    FS_FAT_SEC_NBR            RootDirSize;                      /* Nbr of sec  occupied by the root dir.                */
+    FS_FAT_SEC_NBR            VolSize;                          /* Nbr of sec  in vol.                                  */
+    FS_FAT_SEC_NBR            DataSize;                         /* Nbr of sec  in data section of vol.                  */
+    FS_FAT_CLUS_NBR           MaxClusNbr;                       /* Max clus nbr.                                        */
+
+    FS_FAT_SEC_NBR            FS_InfoStart;                     /* Sec nbr of FSINFO.                                   */
+    FS_FAT_SEC_NBR            BPB_BkStart;                      /* Sec nbr of backup BPB.                               */
+    FS_FAT_SEC_NBR            FAT1_Start;                       /* Sec nbr of first sec of 1st FAT.                     */
+    FS_FAT_SEC_NBR            FAT2_Start;                       /* Sec nbr of first sec of 2nd FAT.                     */
+    FS_FAT_SEC_NBR            RootDirStart;                     /* Sec nbr of first sec of root dir.                    */
+    FS_FAT_SEC_NBR            DataStart;                        /* Sec nbr of first data sec.                           */
+
+    FS_FAT_CLUS_NBR           NextClusNbr;                      /* Clus nbr of next clus to alloc.                      */
+
+    FS_SEC_SIZE               SecSize;                          /* Sector  size (in octets).                            */
+    CPU_INT08U                SecSizeLog2;                      /* Sector  size  base-2 log.                            */
+    FS_FAT_SEC_NBR            ClusSize_sec;                     /* Cluster size (in sectors).                           */
+    CPU_INT08U                ClusSizeLog2_sec;                 /* Cluster size  base-2 log (in sectors).               */
+    FS_SEC_SIZE               ClusSize_octet;                   /* Cluster size (in octets).                            */
+    CPU_INT08U                ClusSizeLog2_octet;               /* Cluster size  base-2 log (in octets).                */
+
+    CPU_INT08U                NbrFATs;                          /* Number of FATs.                                      */
+    CPU_INT08U                FAT_Type;                         /* FAT type (12, 16 or 32).                             */
+    const  FS_FAT_TYPE_API   *FAT_TypeAPI_Ptr;
+
+    CPU_BOOLEAN               QueryInfoValid;                   /* Whether 'QueryClusBadCnt' & 'QueryClusFreeCnt' valid.*/
+    FS_FAT_CLUS_NBR           QueryBadClusCnt;                  /* Count of bad  clusters.                              */
+    FS_FAT_CLUS_NBR           QueryFreeClusCnt;                 /* Count of free clusters.                              */
+
+#ifdef  FS_FAT_JOURNAL_MODULE_PRESENT
+    CPU_INT08U                JournalState;
+    FS_FAT_FILE_DATA         *JournalDataPtr;
+#endif
+
+#if (FS_CFG_CTR_STAT_EN == DEF_ENABLED)
+    FS_CTR                    StatAllocClusCtr;                 /* Number of cluster allocations.                       */
+    FS_CTR                    StatFreeClusCtr;                  /* Number of cluster frees.                             */
+#endif
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ CLK_CFG_EXT_EN ------------------ */
+#ifdef  FS_CFG_GET_TS_FROM_OS
+#error  "FS_CFG_GET_TS_FROM_OS should not be #define'd in 'fs_cfg.h' -- replaced by CLK_CFG_EXT_EN in 'clk_cfg.h'   "
+#endif
+
+
+#ifndef  CLK_CFG_STR_CONV_EN
+#error  "CLK_CFG_STR_CONV_EN                          not #define'd in 'clk_cfg.h'              "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  (CLK_CFG_STR_CONV_EN != DEF_ENABLED )
+#error  "CLK_CFG_STR_CONV_EN                    illegally #define'd in 'clk_cfg.h'              "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+#ifndef  CLK_CFG_UNIX_EN
+#error  "CLK_CFG_UNIX_EN                              not #define'd in 'clk_cfg.h'              "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  (CLK_CFG_UNIX_EN != DEF_ENABLED )
+#error  "CLK_CFG_UNIX_EN                        illegally #define'd in 'clk_cfg.h'              "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     FS_FAT_IS_LEGAL_xxx_CHAR()
+*
+* Description : Determine whether character is ...
+*
+*               (a) ... legal Short File Name character ('FS_FAT_IS_LEGAL_SFN_CHAR()') (see Note #1).
+*
+*               (b) ... legal Long  File Name character ('FS_FAT_IS_LEGAL_LFN_CHAR()') (see Note #2).
+*
+* Argument(s) : c           Character.
+*
+* Return(s)   : DEF_YES, if character is   legal.
+*
+*               DEF_NO,  if character is illegal.
+*
+* Caller(s)   : various.
+*
+* Note(s) : (1) (a) According to Microsoft's "FAT: General Overview of On-DiSk Format", the legal characters
+*                   for a short name are :
+*
+*                   (1) Letters, digits & characters with code values greater than 127.
+*                   (2) The special characters
+*
+*                       !  #  $  %  &  '  (  )  -  @  ^  _  `  {  }  ~
+*
+*                   Taken together, this means that the set of legal character codes is the union of the
+*                   following character code ranges :
+*
+*                   (1) [0x80, 0xFF]    characters with code values above 127
+*                   (2) [0x7D, 0x7E]    }  ~
+*                   (3) [0x5E, 0x7B]    ^  _  `  lower-case letters  {
+*                   (4) [0x40, 0x5A]    @  upper-case letters
+*                   (5) [0x30, 0x39]    digits
+*                   (6) [0x2D, 0x2D]    -
+*                   (7) [0x23, 0x29]    #  $  %  &  '  (  )
+*                   (8) [0x21, 0x21]    !
+*
+*               (b) The legal characters for a long name are :
+*
+*                   (1) The legal SFN characters.
+*                   (2) Periods.
+*                   (3) Spaces.
+*                   (4) The special characters
+*
+*                       +  ,  ;  =  [  ]
+*
+*                   Taken together, this means that the set of legal character codes is the union of the
+*                   following character code ranges :
+*
+*                   (1) [0x80, 0xFF]    characters with code values above 127
+*                   (2) [0x7D, 0x7E]    }  ~
+*                   (3) [0x5D, 0x7B]    ]  ^  _  `  lower-case letters  {
+*                   (4) [0x40, 0x5B]    @  upper-case letters  [
+*                   (5) [0x3D, 0x3D]    =
+*                   (6) [0x3B, 0x3B]    ;
+*                   (7) [0x30, 0x39]    digits
+*                   (8) [0x2B, 0x2E]    +  ,  -  .
+*                   (9) [0x23, 0x29]    #  $  %  &  '  (  )
+*                  (10) [0x20, 0x21]    space  !
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_IS_LEGAL_SFN_CHAR(c)           (((((c) >= (CPU_CHAR)ASCII_CHAR_CIRCUMFLEX_ACCENT)  && \
+                                                  ((c) != (CPU_CHAR)ASCII_CHAR_VERTICAL_LINE    )  && \
+                                                  ((c) != (CPU_CHAR)ASCII_CHAR_DELETE           )) || \
+                                                 (((c) >= (CPU_CHAR)ASCII_CHAR_COMMERCIAL_AT    )  && \
+                                                  ((c) <= (CPU_CHAR)ASCII_CHAR_LATIN_UPPER_Z    )) || \
+                                                 (((c) >= (CPU_CHAR)ASCII_CHAR_DIGIT_ZERO       )  && \
+                                                  ((c) <= (CPU_CHAR)ASCII_CHAR_DIGIT_NINE       )) || \
+                                                 (((c) == (CPU_CHAR)ASCII_CHAR_HYPHEN_MINUS     )) || \
+                                                 (((c) >= (CPU_CHAR)ASCII_CHAR_EXCLAMATION_MARK )  && \
+                                                  ((c) <= (CPU_CHAR)ASCII_CHAR_RIGHT_PARENTHESIS)  && \
+                                                  ((c) != (CPU_CHAR)ASCII_CHAR_QUOTATION_MARK   ))) ? (DEF_YES) : (DEF_NO))
+
+
+#define  FS_FAT_IS_LEGAL_LFN_CHAR(c)           (((((c) >= (CPU_CHAR)ASCII_CHAR_COMMERCIAL_AT    )  && \
+                                                  ((c) != (CPU_CHAR)ASCII_CHAR_REVERSE_SOLIDUS  )  && \
+                                                  ((c) != (CPU_CHAR)ASCII_CHAR_VERTICAL_LINE    )  && \
+                                                  ((c) != (CPU_CHAR)ASCII_CHAR_DELETE           )) || \
+                                                  ((c) == (CPU_CHAR)ASCII_CHAR_EQUALS_SIGN      )  || \
+                                                  ((c) == (CPU_CHAR)ASCII_CHAR_SEMICOLON        )  || \
+                                                 (((c) >= (CPU_CHAR)ASCII_CHAR_DIGIT_ZERO       )  && \
+                                                 ((c) <= (CPU_CHAR)ASCII_CHAR_DIGIT_NINE        )) || \
+                                                 (((c) >= (CPU_CHAR)ASCII_CHAR_SPACE            )  && \
+                                                 ((c) <= (CPU_CHAR)ASCII_CHAR_FULL_STOP         )  && \
+                                                 ((c) != (CPU_CHAR)ASCII_CHAR_QUOTATION_MARK    )  && \
+                                                 ((c) != (CPU_CHAR)ASCII_CHAR_ASTERISK)         ))  ? (DEF_YES) : (DEF_NO))
+
+
+#define  FS_FAT_IS_LEGAL_VOL_LABEL_CHAR(c)     ((((c) != ASCII_CHAR_QUOTATION_MARK              )  && \
+                                                 ((c) != ASCII_CHAR_AMPERSAND                   )  && \
+                                                 ((c) != ASCII_CHAR_ASTERISK                    )  && \
+                                                 ((c) != ASCII_CHAR_PLUS_SIGN                   )  && \
+                                                 ((c) != ASCII_CHAR_HYPHEN_MINUS                )  && \
+                                                 ((c) != ASCII_CHAR_COMMA                       )  && \
+                                                 ((c) != ASCII_CHAR_FULL_STOP                   )  && \
+                                                 ((c) != ASCII_CHAR_SOLIDUS                     )  && \
+                                                 ((c) != ASCII_CHAR_COLON                       )  && \
+                                                 ((c) != ASCII_CHAR_SEMICOLON                   )  && \
+                                                 ((c) != ASCII_CHAR_LESS_THAN_SIGN              )  && \
+                                                 ((c) != ASCII_CHAR_EQUALS_SIGN                 )  && \
+                                                 ((c) != ASCII_CHAR_GREATER_THAN_SIGN           )  && \
+                                                 ((c) != ASCII_CHAR_QUESTION_MARK               )  && \
+                                                 ((c) != ASCII_CHAR_LEFT_SQUARE_BRACKET         )  && \
+                                                 ((c) != ASCII_CHAR_RIGHT_SQUARE_BRACKET        )  && \
+                                                 ((c) != ASCII_CHAR_REVERSE_SOLIDUS             ))  ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                        FS_FAT_SEC_TO_CLUS()
+*
+* Description : Get cluster in which sector lies.
+*
+* Argument(s) : p_fat_data  Pointer to FAT info.
+*
+*               sec_nbr     Sector number.
+*
+* Return(s)   : Cluster number.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_SEC_TO_CLUS(p_fat_data, sec_nbr)     ((FS_FAT_CLUS_NBR)FS_UTIL_DIV_PWR2(((sec_nbr) - (p_fat_data)->DataStart), (p_fat_data)->ClusSizeLog2_sec) + 2u)
+
+/*
+*********************************************************************************************************
+*                                        FS_FAT_SEC_TO_CLUS()
+*
+* Description : Get first sector of cluster.
+*
+* Argument(s) : p_fat_data  Pointer to FAT info.
+*
+*               clus_nbr    Cluster number.
+*
+* Return(s)   : Sector number.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_CLUS_TO_SEC(p_fat_data, clus_nbr)      ((p_fat_data)->DataStart + (FS_FAT_SEC_NBR)FS_UTIL_MULT_PWR2(((clus_nbr) - FS_FAT_MIN_CLUS_NBR), (p_fat_data)->ClusSizeLog2_sec))
+
+/*
+*********************************************************************************************************
+*                                        FS_FAT_CLUS_SEC_REM()
+*
+* Description : Get number of sectors remaining in cluster after a certain sector.
+*
+* Argument(s) : p_fat_data  Pointer to FAT info.
+*
+*               sec_nbr     Sector number.
+*
+* Return(s)   : Number of sectors remaining in cluster.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_CLUS_SEC_REM(p_fat_data, sec_nbr)      ((FS_FAT_SEC_NBR)(p_fat_data)->ClusSize_sec - (((sec_nbr) - (p_fat_data)->DataStart) & ((FS_FAT_SEC_NBR)(p_fat_data)->ClusSize_sec - 1u)))
+
+/*
+*********************************************************************************************************
+*                                       FS_FAT_IS_VALID_CLUS()
+*
+* Description : Determine whether cluster number specifies a valid cluster.
+*
+* Argument(s) : p_fat_data  Pointer to FAT info.
+*
+*               clus_nbr    Cluster number.
+*
+* Return(s)   : DEF_YES, if cluster number specifies a valid cluster.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_IS_VALID_CLUS(p_fat_data, clus_nbr)  ((((clus_nbr) <  (p_fat_data)->MaxClusNbr) && \
+                                                       ((clus_nbr) >=  FS_FAT_MIN_CLUS_NBR))       ? (DEF_YES) : (DEF_NO))
+
+/*
+*********************************************************************************************************
+*                                        FS_FAT_IS_VALID_SEC()
+*
+* Description : Determine whether sector number specifies a valid sector.
+*
+* Argument(s) : p_fat_data  Pointer to FAT info.
+*
+*               sec_nbr     Sector number.
+*
+* Return(s)   : DEF_YES, if sector number specifies a valid sector.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  FS_FAT_IS_VALID_SEC(p_fat_data, sec_nbr)    ((((sec_nbr) >= (p_fat_data)->RootDirStart) && \
+                                                       ((sec_nbr) <= (p_fat_data)->RootDirStart + (p_fat_data)->RootDirSize + (p_fat_data)->DataSize)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (FS_FAT_CFG_VOL_CHK_EN == DEF_ENABLED)
+void             FS_FAT_VolChk                 (CPU_CHAR          *name_vol,    /* Check file system on volume.         */
+                                                FS_ERR            *p_err);
+#endif
+
+/*
+*********************************************************************************************************
+*                                  SYSTEM DRIVER FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void             FS_FAT_ModuleInit             (FS_QTY             vol_cnt,     /* Initialize FAT system driver.        */
+                                                FS_QTY             file_cnt,
+                                                FS_QTY             dir_cnt,
+                                                FS_ERR            *p_err);
+
+void             FS_FAT_VolClose               (FS_VOL            *p_vol);      /* Close a volume.                      */
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void             FS_FAT_VolFmt                 (FS_VOL            *p_vol,       /* Create a volume.                     */
+                                                void              *p_sys_cfg,
+                                                FS_SEC_SIZE        sec_size,
+                                                FS_SEC_QTY         size,
+                                                FS_ERR            *p_err);
+#endif
+
+void             FS_FAT_VolLabelGet            (FS_VOL            *p_vol,       /* Get volume label.                    */
+                                                CPU_CHAR          *label,
+                                                CPU_SIZE_T         len_max,
+                                                FS_ERR            *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void             FS_FAT_VolLabelSet            (FS_VOL            *p_vol,       /* Set volume label.                    */
+                                                CPU_CHAR          *label,
+                                                FS_ERR            *p_err);
+#endif
+
+void             FS_FAT_VolOpen                (FS_VOL            *p_vol,       /* Open a volume.                       */
+                                                FS_ERR            *p_err);
+
+void             FS_FAT_VolQuery               (FS_VOL            *p_vol,       /* Get info about a volume.             */
+                                                FS_SYS_INFO       *p_info,
+                                                FS_ERR            *p_err);
+
+/*
+*********************************************************************************************************
+*                                     UTILITY FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+FS_FAT_DATE      FS_FAT_DateFmt                (CLK_DATE_TIME     *p_time);     /* Fmt date for FAT.                    */
+
+FS_FAT_TIME      FS_FAT_TimeFmt                (CLK_DATE_TIME     *p_time);     /* Fmt time for FAT.                    */
+#endif
+
+void             FS_FAT_DateTimeParse          (CLK_TS_SEC        *p_ts,        /* Parse FAT date, time.                */
+                                                FS_FAT_DATE        date,
+                                                FS_FAT_TIME        time);
+
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void             FS_FAT_SecClr                 (FS_VOL            *p_vol,       /* Clr secs on vol.                     */
+                                                void              *p_temp,
+                                                FS_FAT_SEC_NBR     start,
+                                                FS_FAT_SEC_NBR     cnt,
+                                                FS_SEC_SIZE        sec_size,
+                                                FS_FLAGS           sec_type,
+                                                FS_ERR            *p_err);
+
+CPU_CHAR        *FS_FAT_Char_LastPathSep       (CPU_CHAR          *pstr);       /* Find last path sep char.             */
+#endif
+
+/*
+*********************************************************************************************************
+*                                   FAT ACCESS FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void             FS_FAT_LowEntryUpdate         (FS_VOL            *p_vol,       /* Update dir entry.                    */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_FILE_DATA  *p_entry_data,
+                                                CPU_BOOLEAN        get_date,
+                                                FS_ERR            *p_err);
+#endif
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void             FS_FAT_LowEntryCreate         (FS_VOL            *p_vol,       /* Create new entry (low-level).        */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_FILE_DATA  *p_entry_data,
+                                                CPU_CHAR          *name_entry,
+                                                FS_FAT_SEC_NBR     dir_first_sec,
+                                                CPU_BOOLEAN        is_dir,
+                                                FS_ERR            *p_err);
+
+void             FS_FAT_LowEntryDel            (FS_VOL            *p_vol,       /* Del entry (low-level).               */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_FILE_DATA  *p_entry_data,
+                                                FS_ERR            *p_err);
+#endif
+
+void             FS_FAT_LowEntryFind           (FS_VOL            *p_vol,       /* Find entry (low-level).              */
+                                                FS_FAT_FILE_DATA  *p_entry_data,
+                                                CPU_CHAR          *name_entry,
+                                                FS_FLAGS           mode,
+                                                FS_ERR            *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void             FS_FAT_LowEntryRename         (FS_VOL            *p_vol,       /* Rename entry (low-level).            */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_FILE_DATA  *p_entry_data_old,
+                                                FS_FAT_FILE_DATA  *p_entry_data_new,
+                                                CPU_BOOLEAN        exists,
+                                                CPU_CHAR          *name_entry_new,
+                                                FS_ERR            *p_err);
+
+void             FS_FAT_LowEntryTruncate       (FS_VOL            *p_vol,       /* Truncate entry (low-level).          */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_FILE_DATA  *p_entry_data,
+                                                FS_FAT_FILE_SIZE   file_size_truncated,
+                                                FS_ERR            *p_err);
+
+CPU_BOOLEAN      FS_FAT_LowDirChkEmpty         (FS_VOL            *p_vol,       /* Chk whether dir is empty.            */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_CLUS_NBR    dir_clus,
+                                                FS_ERR            *p_err);
+
+void             FS_FAT_LowFileFirstClusAdd    (FS_VOL            *p_vol,       /* Add 1st clus to file.                */
+                                                FS_FAT_FILE_DATA  *p_entry_data,
+                                                FS_BUF            *p_buf,
+                                                FS_ERR            *p_err);
+
+#endif
+
+FS_FAT_CLUS_NBR  FS_FAT_LowFileFirstClusGet    (FS_VOL            *p_vol,       /* Get 1st clus address of file.        */
+                                                CPU_CHAR          *name_entry,
+                                                FS_ERR            *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                 FAT CLUSTER ACCESS FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+FS_FAT_CLUS_NBR  FS_FAT_ClusChainAlloc         (FS_VOL            *p_vol,       /* Alloc clus chain.                        */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_CLUS_NBR    start_clus,
+                                                FS_FAT_CLUS_NBR    nbr_clus,
+                                                FS_ERR            *p_err);
+
+FS_FAT_CLUS_NBR  FS_FAT_ClusChainDel           (FS_VOL            *p_vol,       /* Reverse delete cluster chain.        */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_CLUS_NBR    start_clus,
+                                                CPU_BOOLEAN        del_first,
+                                                FS_ERR            *p_err);
+
+void             FS_FAT_ClusChainReverseDel    (FS_VOL            *p_vol,       /* Reverse delete cluster chain.        */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_CLUS_NBR    start_clus,
+                                                CPU_BOOLEAN        del_first,
+                                                FS_ERR            *p_err);
+#endif
+
+FS_FAT_CLUS_NBR  FS_FAT_ClusChainFollow        (FS_VOL            *p_vol,       /* Follow cluster chain.                */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_CLUS_NBR    start_clus,
+                                                FS_FAT_CLUS_NBR    len,
+                                                FS_FAT_CLUS_NBR   *p_clus_cnt,
+                                                FS_ERR            *p_err);
+
+FS_FAT_CLUS_NBR  FS_FAT_ClusChainEndFind       (FS_VOL            *p_vol,       /* Find cluster chain end cluster.      */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_CLUS_NBR    start_clus,
+                                                FS_FAT_CLUS_NBR   *p_clus_cnt,
+                                                FS_ERR            *p_err);
+
+FS_FAT_CLUS_NBR  FS_FAT_ClusChainReverseFollow (FS_VOL            *p_vol,       /* Reverse follow cluster chain.        */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_CLUS_NBR    start_clus,
+                                                FS_FAT_CLUS_NBR    stop_clus,
+                                                FS_ERR            *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+FS_FAT_CLUS_NBR  FS_FAT_ClusFreeFind           (FS_VOL            *p_vol,       /* Find free cluster.                   */
+                                                FS_BUF            *p_buf,
+                                                FS_ERR            *p_err);
+#endif
+
+FS_FAT_CLUS_NBR  FS_FAT_ClusNextGet            (FS_VOL            *p_vol,       /* Get next cluster in chain.           */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_CLUS_NBR    start_clus,
+                                                FS_ERR            *p_err);
+
+FS_FAT_SEC_NBR   FS_FAT_SecNextGet             (FS_VOL            *p_vol,       /* Get next sector in cluster chain.    */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_SEC_NBR     start_sec,
+                                                FS_ERR            *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+FS_FAT_SEC_NBR   FS_FAT_SecNextGetAlloc        (FS_VOL            *p_vol,       /* Get next sector OR allocate new.     */
+                                                FS_BUF            *p_buf,
+                                                FS_FAT_SEC_NBR     start_sec,
+                                                CPU_BOOLEAN        clr,
+                                                FS_ERR            *p_err);
+
+void             FS_FAT_MakeBootSec            (void              *p_temp,      /* Make boot sector.                    */
+                                                FS_FAT_SYS_CFG    *p_sys_cfg,
+                                                FS_SEC_SIZE        sec_size,
+                                                FS_FAT_SEC_NBR     size,
+                                                FS_FAT_SEC_NBR     fat_size,
+                                                FS_SEC_NBR         partition_start);
+#endif
+
+void             FS_FAT_Query                  (FS_VOL            *p_vol,       /* Get info about file system.          */
+                                                FS_BUF            *p_buf,
+                                                FS_SYS_INFO       *p_info,
+                                                FS_ERR            *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  FS_CFG_MAX_PATH_NAME_LEN
+#error  "FS_CFG_MAX_PATH_NAME_LEN             not #define'd in 'fs_cfg.h'    "
+#error  "                               [MUST be  > FS_FAT_MAX_FILE_NAME_LEN]"
+
+#elif   (FS_CFG_MAX_PATH_NAME_LEN < FS_FAT_MAX_FILE_NAME_LEN)
+#error  "FS_CFG_MAX_PATH_NAME_LEN       illegally #define'd in 'fs_cfg.h'    "
+#error  "                               [MUST be  > FS_FAT_MAX_FILE_NAME_LEN]"
+#endif
+
+
+
+#ifndef  FS_CFG_MAX_FILE_NAME_LEN
+#error  "FS_CFG_MAX_FILE_NAME_LEN             not #define'd in 'fs_cfg.h'    "
+#error  "                               [MUST be  > FS_FAT_MAX_FILE_NAME_LEN]"
+
+#elif   (FS_CFG_MAX_FILE_NAME_LEN < FS_FAT_MAX_FILE_NAME_LEN)
+#error  "FS_CFG_MAX_FILE_NAME_LEN       illegally #define'd in 'fs_cfg.h'    "
+#error  "                               [MUST be  > FS_FAT_MAX_FILE_NAME_LEN]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_dir.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_dir.h
new file mode 100644
index 0000000..138d679
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_dir.h
@@ -0,0 +1,155 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+*                                          DIRECTORY ACCESS
+*
+* Filename      : fs_fat_dir.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'fs_fat.h  MODULE'.
+*
+*           (2) See 'fs_dir.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_DIR_H
+#define  FS_FAT_DIR_H
+
+#ifdef   FS_FAT_MODULE_PRESENT                                  /* See Note #1.                                         */
+#ifdef   FS_DIR_MODULE_PRESENT                                  /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_dir.h"
+#include  "../Source/fs_err.h"
+#include  "../Source/fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_DIR_MODULE
+#define  FS_FAT_DIR_EXT
+#else
+#define  FS_FAT_DIR_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  FS_FAT_DirModuleInit(FS_QTY        dir_cnt,               /* Init FAT dir module.                                 */
+                           FS_ERR       *p_err);
+
+/*
+*********************************************************************************************************
+*                                  SYSTEM DRIVER FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  FS_FAT_DirClose     (FS_DIR        *p_dir);               /* Close a directory.                                   */
+
+void  FS_FAT_DirOpen      (FS_DIR        *p_dir,                /* Open a directory.                                    */
+                           CPU_CHAR      *name_dir,
+                           FS_ERR        *p_err);
+
+void  FS_FAT_DirRd        (FS_DIR        *p_dir,                /* Read a  directory entry.                             */
+                           FS_DIR_ENTRY  *p_dir_entry,
+                           FS_ERR        *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*
+*           (2) See 'MODULE  Note #2'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of directory module include (see Note #2).       */
+#endif                                                          /* End of FAT       module include (see Note #1).       */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_entry.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_entry.h
new file mode 100644
index 0000000..76e3b18
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_entry.h
@@ -0,0 +1,172 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+*                                            ENTRY ACCESS
+*
+* Filename      : fs_fat_entry.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*                 AHFAI
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'fs_fat.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_ENTRY_H
+#define  FS_FAT_ENTRY_H
+
+#ifdef   FS_FAT_MODULE_PRESENT                                  /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_err.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_ENTRY_MODULE
+#define  FS_FAT_ENTRY_EXT
+#else
+#define  FS_FAT_ENTRY_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  SYSTEM DRIVER FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void      FS_FAT_EntryAttribSet(FS_VOL         *p_vol,          /* Set file or directory's attributes.                  */
+                                CPU_CHAR       *name_entry,
+                                FS_FLAGS        attrib,
+                                FS_ERR         *p_err);
+
+void      FS_FAT_EntryCreate   (FS_VOL         *p_vol,          /* Create a file or directory.                          */
+                                CPU_CHAR       *name_entry,
+                                FS_FLAGS        entry_type,
+                                CPU_BOOLEAN     excl,
+                                FS_ERR         *p_err);
+
+void      FS_FAT_EntryDel      (FS_VOL         *p_vol,          /* Delete a file or directory.                          */
+                                CPU_CHAR       *name_entry,
+                                FS_FLAGS        entry_type,
+                                FS_ERR         *p_err);
+#endif
+
+void      FS_FAT_EntryQuery    (FS_VOL         *p_vol,          /* Delete a file or directory.                          */
+                                CPU_CHAR       *name_entry,
+                                FS_ENTRY_INFO  *p_info,
+                                FS_ERR         *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void      FS_FAT_EntryRename   (FS_VOL         *p_vol,          /* Rename a file or directory.                          */
+                                CPU_CHAR       *name_entry_old,
+                                CPU_CHAR       *name_entry_new,
+                                CPU_BOOLEAN     excl,
+                                FS_ERR         *p_err);
+
+void      FS_FAT_EntryTimeSet  (FS_VOL         *p_vol,          /* Set file or directory's date/time.                   */
+                                CPU_CHAR       *name_entry,
+                                CLK_DATE_TIME  *p_time,
+                                CPU_INT08U      time_type,
+                                FS_ERR         *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of FAT module include (see Note #1).             */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_fat12.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_fat12.h
new file mode 100644
index 0000000..8ef49ab
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_fat12.h
@@ -0,0 +1,136 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+*                                            FAT12 SUPPORT
+*
+* Filename      : fs_fat_fat12.h
+* Version       : v4.07.00
+* Programmer(s) : FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) The following FAT-module-present configuration value MUST be pre-#define'd in
+*               'fs_cfg_fs.h' PRIOR to all other file system modules that require FAT FAT12 Layer
+*               Configuration (see 'fs_cfg_fs.h  FAT LAYER CONFIGURATION  Note #2b') :
+*
+*                   FS_FAT_FAT12_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_FAT12_H
+#define  FS_FAT_FAT12_H
+
+#ifdef   FS_FAT_FAT12_MODULE_PRESENT                            /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_err.h"
+#include  "fs_fat_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_FAT12_MODULE
+#define  FS_FAT_FAT12_EXT
+#else
+#define  FS_FAT_FAT12_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  FS_FAT_TYPE_API  FS_FAT_FAT12_API;               /* FAT12 access API.                                    */
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of FAT FAT12 module include (see Note #1).       */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_fat16.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_fat16.h
new file mode 100644
index 0000000..263e9fd
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_fat16.h
@@ -0,0 +1,135 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+*                                            FAT16 SUPPORT
+*
+* Filename      : fs_fat_fat16.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) The following FAT-module-present configuration value MUST be pre-#define'd in
+*               'fs_cfg_fs.h' PRIOR to all other file system modules that require FAT FAT16 Layer
+*               Configuration (see 'fs_cfg_fs.h  FAT LAYER CONFIGURATION  Note #2b') :
+*
+*                   FS_FAT_FAT16_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_FAT16_H
+#define  FS_FAT_FAT16_H
+
+#ifdef   FS_FAT_FAT16_MODULE_PRESENT                            /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_err.h"
+#include  "fs_fat_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_FAT16_MODULE
+#define  FS_FAT_FAT16_EXT
+#else
+#define  FS_FAT_FAT16_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  FS_FAT_TYPE_API  FS_FAT_FAT16_API;               /* FAT16 access API.                                    */
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of FAT FAT16 module include (see Note #1).       */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_fat32.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_fat32.h
new file mode 100644
index 0000000..a6d9059
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_fat32.h
@@ -0,0 +1,135 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+*                                            FAT32 SUPPORT
+*
+* Filename      : fs_fat_fat32.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) The following FAT-module-present configuration value MUST be pre-#define'd in
+*               'fs_cfg_fs.h' PRIOR to all other file system modules that require FAT FAT32 Layer
+*               Configuration (see 'fs_cfg_fs.h  FAT LAYER CONFIGURATION  Note #2b') :
+*
+*                   FS_FAT_FAT32_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_FAT32_H
+#define  FS_FAT_FAT32_H
+
+#ifdef   FS_FAT_FAT32_MODULE_PRESENT                            /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_err.h"
+#include  "fs_fat_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_FAT32_MODULE
+#define  FS_FAT_FAT32_EXT
+#else
+#define  FS_FAT_FAT32_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  FS_FAT_TYPE_API  FS_FAT_FAT32_API;               /* FAT32 access API.                                    */
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of FAT FAT32 module include (see Note #1).       */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_file.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_file.h
new file mode 100644
index 0000000..a4b159c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_file.h
@@ -0,0 +1,170 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+*                                             FILE ACCESS
+*
+* Filename      : fs_fat_file.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'fs_fat.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_FILE_H
+#define  FS_FAT_FILE_H
+
+#ifdef   FS_FAT_MODULE_PRESENT                                  /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_err.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_FILE_MODULE
+#define  FS_FAT_FILE_EXT
+#else
+#define  FS_FAT_FILE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void          FS_FAT_FileModuleInit(FS_QTY          file_cnt,   /* Init FAT dir module.                                 */
+                                    FS_ERR         *p_err);
+
+/*
+*********************************************************************************************************
+*                                  SYSTEM DRIVER FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void          FS_FAT_FileClose     (FS_FILE        *p_file,     /* Close a file.                                        */
+                                    FS_ERR         *p_err);
+
+void          FS_FAT_FileOpen      (FS_FILE        *p_file,     /* Open a file.                                         */
+                                    CPU_CHAR       *name_file,
+                                    FS_ERR         *p_err);
+
+void          FS_FAT_FilePosSet    (FS_FILE        *p_file,     /* Set file position indicator.                         */
+                                    FS_FILE_SIZE    pos_new,
+                                    FS_ERR         *p_err);
+
+void          FS_FAT_FileQuery     (FS_FILE        *p_file,     /* Get info about file.                                 */
+                                    FS_ENTRY_INFO  *p_info,
+                                    FS_ERR         *p_err);
+
+CPU_SIZE_T    FS_FAT_FileRd        (FS_FILE        *p_file,     /* Read from a file.                                    */
+                                    void           *p_dest,
+                                    CPU_SIZE_T      size,
+                                    FS_ERR         *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void          FS_FAT_FileTruncate  (FS_FILE        *p_file,     /* Truncate a file.                                     */
+                                    FS_FILE_SIZE    size,
+                                    FS_ERR         *p_err);
+#endif
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+CPU_SIZE_T    FS_FAT_FileWr        (FS_FILE        *p_file,     /* Write to a file.                                     */
+                                    void           *p_src,
+                                    CPU_SIZE_T      size,
+                                    FS_ERR         *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of FAT module include (see Note #1).             */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_journal.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_journal.h
new file mode 100644
index 0000000..47b08b3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_journal.h
@@ -0,0 +1,206 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+*                                             JOURNALING
+*
+* Filename      : fs_fat_journal.h
+* Version       : v4.07.00
+* Programmer(s) : EH
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'fs_fat.h  MODULE'.
+*
+*           (2) The following FAT-module-present configuration value MUST be pre-#define'd in
+*               'fs_cfg_fs.h' PRIOR to all other file system modules that require FAT Journal Layer
+*               Configuration (see 'fs_cfg_fs.h  FAT LAYER CONFIGURATION  Note #2b') :
+*
+*                   FS_FAT_JOURNAL_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_JOURNAL_H
+#define  FS_FAT_JOURNAL_H
+
+#ifdef   FS_FAT_MODULE_PRESENT                                  /* See Note #1.                                         */
+#ifdef   FS_FAT_JOURNAL_MODULE_PRESENT                          /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_JOURNAL_MODULE
+#define  FS_FAT_JOURNAL_EXT
+#else
+#define  FS_FAT_JOURNAL_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_err.h"
+#include  "fs_fat_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void             FS_FAT_JournalOpen               (CPU_CHAR              *name_vol,     /* Open  journal.               */
+                                                   FS_ERR                *p_err);
+
+void             FS_FAT_JournalClose              (CPU_CHAR              *name_vol,     /* Close journal.               */
+                                                   FS_ERR                *p_err);
+
+
+void             FS_FAT_JournalStart              (CPU_CHAR              *name_vol,     /* Start journaling.            */
+                                                   FS_ERR                *p_err);
+
+void             FS_FAT_JournalStop               (CPU_CHAR              *name_vol,     /* Stop  journaling.            */
+                                                   FS_ERR                *p_err);
+
+/*
+*********************************************************************************************************
+*                                    INTERNAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void             FS_FAT_JournalModuleInit         (FS_QTY                 vol_cnt,      /* Init FAT journal module.     */
+                                                   FS_ERR                *p_err);
+
+
+                                                                                        /* ------- JOURNAL CTRL ------- */
+void             FS_FAT_JournalInit               (FS_VOL                *p_vol,        /* Init journal.                */
+                                                   FS_ERR                *p_err);
+
+void             FS_FAT_JournalExit               (FS_VOL                *p_vol,        /* Exit journal.                */
+                                                   FS_ERR                *p_err);
+
+void             FS_FAT_JournalClr                (FS_VOL                *p_vol,        /* Clr  journal.                */
+                                                   FS_BUF                *p_buf,
+                                                   FS_FAT_FILE_SIZE       start_pos,
+                                                   FS_FAT_FILE_SIZE       len,
+                                                   FS_ERR                *p_err);
+
+void             FS_FAT_JournalClrAllReset        (FS_VOL                *p_vol,        /* Clr  journal entirely.       */
+                                                   FS_BUF                *p_buf,
+                                                   FS_ERR                *p_err);
+
+void             FS_FAT_JournalClrReset           (FS_VOL                *p_vol,        /* Clr  journal up to cur pos.  */
+                                                   FS_BUF                *p_buf,
+                                                   FS_ERR                *p_err);
+
+                                                                                        /* ------- JOURNAL LOGS ------- */
+void             FS_FAT_JournalEnterClusChainAlloc(FS_VOL                *p_vol,        /* Enter clus chain alloc log.  */
+                                                   FS_BUF                *p_buf,
+                                                   FS_FAT_CLUS_NBR        start_clus,
+                                                   CPU_BOOLEAN            is_new,
+                                                   FS_ERR                *p_err);
+
+void             FS_FAT_JournalEnterClusChainDel  (FS_VOL                *p_vol,        /* Enter clus chain del log.    */
+                                                   FS_BUF                *p_buf,
+                                                   FS_FAT_CLUS_NBR        start_clus,
+                                                   FS_FAT_CLUS_NBR        nbr_clus,
+                                                   CPU_BOOLEAN            del_first,
+                                                   FS_ERR                *p_err);
+
+void             FS_FAT_JournalEnterEntryCreate   (FS_VOL                *p_vol,        /* Enter entry create log.      */
+                                                   FS_BUF                *p_buf,
+                                                   FS_FAT_DIR_POS        *p_dir_start_pos,
+                                                   FS_FAT_DIR_POS        *p_dir_end_pos,
+                                                   FS_ERR                *p_err);
+
+void             FS_FAT_JournalEnterEntryUpdate   (FS_VOL                *p_vol,        /* Enter entry update log.      */
+                                                   FS_BUF                *p_buf,
+                                                   FS_FAT_DIR_POS        *p_dir_start_pos,
+                                                   FS_FAT_DIR_POS        *p_dir_end_pos,
+                                                   FS_ERR                *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of journaling module include (see Note #2).      */
+#endif                                                          /* End of FAT        module include (see Note #1).      */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_lfn.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_lfn.h
new file mode 100644
index 0000000..b5ce930
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_lfn.h
@@ -0,0 +1,141 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+*                                       LONG FILE NAME SUPPORT
+*
+* Filename      : fs_fat_lfn.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) The following FAT-module-present configuration value MUST be pre-#define'd in
+*               'fs_cfg_fs.h' PRIOR to all other file system modules that require FAT LFN Layer
+*               Configuration (see 'fs_cfg_fs.h  FAT LAYER CONFIGURATION  Note #2b') :
+*
+*                   FS_FAT_LFN_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_LFN_H
+#define  FS_FAT_LFN_H
+
+#ifdef   FS_FAT_LFN_MODULE_PRESENT                              /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_LFN_MODULE
+#define  FS_FAT_LFN_EXT
+#else
+#define  FS_FAT_LFN_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_err.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  FS_FAT_FN_API  FS_FAT_LFN_API;                   /* Long file name API.                                  */
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (FS_FAT_CFG_VOL_CHK_EN == DEF_ENABLED)
+void  FS_FAT_LFN_DirChk(FS_VOL          *p_vol,                 /* Chk dir.                                             */
+                        FS_BUF          *p_buf,
+                        FS_FAT_SEC_NBR   dir_sec,
+                        FS_ERR          *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of FAT LFN module include (see Note #1).         */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_sfn.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_sfn.h
new file mode 100644
index 0000000..3e25763
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_sfn.h
@@ -0,0 +1,166 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+*                                       SHORT FILE NAME SUPPORT
+*
+* Filename      : fs_fat_sfn.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'fs_fat.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_SFN_H
+#define  FS_FAT_SFN_H
+
+#ifdef   FS_FAT_MODULE_PRESENT                                  /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_err.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_SFN_MODULE
+#define  FS_FAT_SFN_EXT
+#else
+#define  FS_FAT_SFN_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  FS_FAT_FN_API  FS_FAT_SFN_API;                   /* Short file name API.                                 */
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void  FS_FAT_SFN_DirEntryFmt(void              *p_dir_entry,    /* Fmt dir entry for SFN.                               */
+                             CPU_INT32U         name_8_3[],
+                             CPU_BOOLEAN        is_dir,
+                             FS_FAT_CLUS_NBR    file_first_clus,
+                             CPU_BOOLEAN        name_lower_case,
+                             CPU_BOOLEAN        ext_lower_case);
+#endif
+
+void  FS_FAT_SFN_Chk        (CPU_CHAR          *name,           /* Chk file name as SFN.                                */
+                             FS_FILE_NAME_LEN  *p_name_len,
+                             FS_ERR            *p_err);
+
+void  FS_FAT_SFN_Create     (CPU_CHAR          *name,           /* Create SFN.                                          */
+                             CPU_INT32U         name_8_3[],
+                             CPU_BOOLEAN       *p_name_lower_case,
+                             CPU_BOOLEAN       *p_ext_lower_case,
+                             FS_ERR            *p_err);
+
+void  FS_FAT_SFN_SFN_Find   (FS_VOL            *p_vol,          /* Srch dir for SFN dir entry.                          */
+                             FS_BUF            *p_buf,
+                             CPU_INT32U         name_8_3[],
+                             FS_FAT_DIR_POS    *p_dir_start_pos,
+                             FS_FAT_DIR_POS    *p_dir_end_pos,
+                             FS_ERR            *p_err);
+
+void  FS_FAT_SFN_LabelGet   (FS_VOL            *p_vol,          /* Get volume label.                                    */
+                             CPU_CHAR          *label,
+                             FS_ERR            *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void  FS_FAT_SFN_LabelSet   (FS_VOL            *p_vol,          /* Set volume label.                                    */
+                             CPU_CHAR          *label,
+                             FS_ERR            *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of FAT module include (see Note #1).             */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_type.h b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_type.h
new file mode 100644
index 0000000..30c5e0b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/FAT/fs_fat_type.h
@@ -0,0 +1,248 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM FAT MANAGEMENT
+*
+*                                                TYPES
+*
+* Filename      : fs_fat_type.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*                 AHFAI
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE GUARD
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FAT_TYPE_H
+#define  FS_FAT_TYPE_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../Source/fs_cfg_fs.h"
+#include  "../Source/fs_err.h"
+#include  "../Source/fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'fs_fat.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_MODULE_PRESENT                                  /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_TYPE_MODULE
+#define  FS_FAT_TYPE_EXT
+#else
+#define  FS_FAT_TYPE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_fat_data       FS_FAT_DATA;
+typedef  struct  fs_fat_file_data  FS_FAT_FILE_DATA;
+
+typedef  CPU_INT32U  FS_FAT_CLUS_NBR;                           /* Number of clusters/cluster index.                    */
+typedef  CPU_INT32U  FS_FAT_SEC_NBR;                            /* Number of sectors/sector index.                      */
+typedef  CPU_INT16U  FS_FAT_DATE;                               /* FAT date.                                            */
+typedef  CPU_INT16U  FS_FAT_TIME;                               /* FAT time.                                            */
+typedef  CPU_INT08U  FS_FAT_DIR_ENTRY_QTY;                      /* Quantity of directory entries.                       */
+typedef  CPU_INT32U  FS_FAT_FILE_SIZE;                          /* Size of file, in octets.                             */
+
+
+/*
+*********************************************************************************************************
+*                                   FAT FORMAT CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_fat_sys_cfg {
+    FS_SEC_QTY        ClusSize;
+    FS_FAT_SEC_NBR    RsvdAreaSize;
+    CPU_INT16U        RootDirEntryCnt;
+    CPU_INT08U        FAT_Type;
+    CPU_INT08U        NbrFATs;
+} FS_FAT_SYS_CFG;
+
+/*
+*********************************************************************************************************
+*                                  FAT DIRECTORY ENTRY POSITION TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_fat_dir_pos {
+    FS_FAT_SEC_NBR    SecNbr;
+    FS_SEC_SIZE       SecPos;
+} FS_FAT_DIR_POS;
+
+/*
+*********************************************************************************************************
+*                                         FAT TYPE API DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_fat_type_api {
+#if (FS_CFG_RD_ONLY_EN      == DEF_DISABLED)
+    void             (*ClusValWr)       (FS_VOL            *p_vol,
+                                         FS_BUF            *p_buf,
+                                         FS_FAT_CLUS_NBR    clus,
+                                         FS_FAT_CLUS_NBR    val,
+                                         FS_ERR           *p_err);
+#endif
+
+    FS_FAT_CLUS_NBR  (*ClusValRd)       (FS_VOL            *p_vol,
+                                         FS_BUF            *p_buf,
+                                         FS_FAT_CLUS_NBR    clus,
+                                         FS_ERR            *p_err);
+
+    FS_FAT_CLUS_NBR    ClusBad;
+    FS_FAT_CLUS_NBR    ClusEOF;
+    FS_FAT_CLUS_NBR    ClusFree;
+    CPU_CHAR           FileSysType[9];
+} FS_FAT_TYPE_API;
+
+/*
+*********************************************************************************************************
+*                                       FILE NAME API DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_fat_fn_api {
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+    void             (*DirEntryCreate)  (FS_VOL            *p_vol,      /* Create dir entry.                            */
+                                         FS_BUF            *p_buf,
+                                         CPU_CHAR          *name,
+                                         CPU_BOOLEAN        is_dir,
+                                         FS_FAT_CLUS_NBR    file_first_clus,
+                                         FS_FAT_DIR_POS    *p_dir_start_pos,
+                                         FS_FAT_DIR_POS    *p_dir_end_pos,
+                                         FS_ERR            *p_err);
+
+    void             (*DirEntryCreateAt)(FS_VOL            *p_vol,      /* Create dir entry at sec pos.                 */
+                                         FS_BUF            *p_buf,
+                                         CPU_CHAR          *name,
+                                         FS_FILE_NAME_LEN   name_len,
+                                         CPU_INT32U         name_8_3[],
+                                         CPU_BOOLEAN        is_dir,
+                                         FS_FAT_CLUS_NBR    file_first_clus,
+                                         FS_FAT_DIR_POS    *p_dir_pos,
+                                         FS_FAT_DIR_POS    *p_dir_end_pos,
+                                         FS_ERR            *p_err);
+
+    void             (*DirEntryDel)     (FS_VOL            *p_vol,      /* Del dir entry.                               */
+                                         FS_BUF            *p_buf,
+                                         FS_FAT_DIR_POS    *p_dir_start_pos,
+                                         FS_FAT_DIR_POS    *p_dir_end_pos,
+                                         FS_ERR            *p_err);
+#endif
+
+    void             (*DirEntryFind)    (FS_VOL            *p_vol,      /* Srch dir for dir entry.                      */
+                                         FS_BUF            *p_buf,
+                                         CPU_CHAR          *name,
+                                         CPU_CHAR         **p_name_next,
+                                         FS_FAT_DIR_POS    *p_dir_start_pos,
+                                         FS_FAT_DIR_POS    *p_dir_end_pos,
+                                         FS_ERR            *p_err);
+
+    void             (*NextDirEntryGet) (FS_VOL            *p_vol,      /* Get next dir entry in dir.                   */
+                                         FS_BUF            *p_buf,
+                                         void              *name,
+                                         FS_FAT_DIR_POS    *p_dir_start_pos,
+                                         FS_FAT_DIR_POS    *p_dir_end_pos,
+                                         FS_ERR            *p_err);
+} FS_FAT_FN_API;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of FAT module include (see Note #1).             */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/OS/fs_os.h b/src/ucos_v1_42/micrium_source/uC-FS/OS/fs_os.h
new file mode 100644
index 0000000..a206bbb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/OS/fs_os.h
@@ -0,0 +1,11 @@
+#include  
+
+#ifdef  FS_CFG_OS_PORT
+    #define   FS_OS_PORT_INCLUDE_FILE3(full_path)  #full_path
+    #define   FS_OS_PORT_INCLUDE_FILE2(port)       FS_OS_PORT_INCLUDE_FILE3(port/fs_os.h)
+    #define   FS_OS_PORT_INCLUDE_FILE              FS_OS_PORT_INCLUDE_FILE2(FS_CFG_OS_PORT)
+    #include  FS_OS_PORT_INCLUDE_FILE
+#else
+    #include    /* Include 'fs_os.h' that is in root of an include path. */
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/OS/uCOS-II/fs_os.h b/src/ucos_v1_42/micrium_source/uC-FS/OS/uCOS-II/fs_os.h
new file mode 100644
index 0000000..ff8c1da
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/OS/uCOS-II/fs_os.h
@@ -0,0 +1,181 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 FILE SYSTEM OPERATING SYSTEM LAYER
+*
+*                                          Micrium uC/OS-II
+*
+* Filename      : fs_os.h
+* Version       : v4.07.00
+* Programmer(s) : FBJ
+*                 BAN
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/OS-II V2.89 is included in the project build.
+*
+*                 (2) REQUIREs the following uC/OS-II features to be ENABLED :
+*
+*                         ------- FEATURE --------    ---------- MINIMUM CONFIGURATION FOR FS/OS PORT ----------
+*
+*                     (a) OS Events                   OS_MAX_EVENTS >= FS_OS_NBR_EVENTS (see this 'fs_os.h
+*                                                                                             OS OBJECT DEFINES')
+*
+*                     (b) Semaphores                                   FS_OS_NBR_SEM    (see Note #2a)
+*                         (1) OS_SEM_EN                   Enabled
+*
+*                     (c) Task registers
+*                         (1) OS_TASK_REG_TBL_SIZE        >= 2 (if working directory functionality enabled)
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE GUARD
+*********************************************************************************************************
+*/
+
+#ifndef  FS_OS_H
+#define  FS_OS_H
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include                                         /* See this 'fs_os.h  Note #1'.                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_OS_MODULE
+#define  FS_OS_EXT
+#else
+#define  FS_OS_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_OS_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                     OS TASK/OBJECT NAME DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- OBJ NAMES --------------------- */
+#define  FS_LOCK_NAME                       "FS Global Lock"
+#define  FS_DEV_LOCK_NAME                   "FS Device Lock"
+#define  FS_DEV_ACCESS_LOCK_NAME            "FS Device Access Lock"
+#define  FS_FILE_LOCK_NAME                  "FS File Lock"
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  OS_EVENT  *FS_OS_SEM;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (FS_CFG_WORKING_DIR_EN == DEF_ENABLED)
+void  FS_OS_WorkingDirFree(OS_TCB  *p_tcb);
+#endif
+
+CPU_BOOLEAN  FS_OS_SemCreate(FS_OS_SEM  *p_sem,
+                             CPU_INT16U  cnt);
+
+CPU_BOOLEAN  FS_OS_SemDel   (FS_OS_SEM  *p_sem);
+
+CPU_BOOLEAN  FS_OS_SemPend  (FS_OS_SEM  *p_sem,
+                             CPU_INT32U  timeout);
+
+CPU_BOOLEAN  FS_OS_SemPost  (FS_OS_SEM  *p_sem);
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if     (OS_VERSION < 29207u)
+#error  "OS_VERSION             illegal uC/OS-II version            "
+#error  "                       [MUST be >= V2.92.07]               "
+#endif
+
+
+
+#if     (OS_SEM_EN < 1u)
+#error  "OS_SEM_EN              illegally #define'd in 'os_cfg.h'   "
+#error  "                       [MUST be  > 0]                      "
+#endif
+
+
+
+#if     (FS_CFG_FILE_LOCK_EN == DEF_ENABLED)
+
+#if     (OS_SEM_ACCEPT_EN < 1u)
+#error  "OS_SEM_ACCEPT_EN       illegally #define'd in 'os_cfg.h'   "
+#error  "                       [MUST be  > 0]                      "
+#endif
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/OS/uCOS-III/fs_os.h b/src/ucos_v1_42/micrium_source/uC-FS/OS/uCOS-III/fs_os.h
new file mode 100644
index 0000000..437b146
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/OS/uCOS-III/fs_os.h
@@ -0,0 +1,173 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 FILE SYSTEM OPERATING SYSTEM LAYER
+*
+*                                          Micrium uC/OS-III
+*
+* Filename      : fs_os.h
+* Version       : v4.07.00
+* Programmer(s) : FBJ
+*                 BAN
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/OS-III V3.03.01 is included in the project build.
+*
+*                 (2) REQUIREs the following uC/OS-III features to be ENABLED :
+*
+*                         ------- FEATURE --------    ---------- MINIMUM CONFIGURATION FOR FS/OS PORT ----------
+*
+*                     (a) Semaphores
+*                         (1) OS_CFG_SEM_EN               Enabled
+*
+*                     (b) Task registers
+*                         (1) OS_CFG_TASK_REG_TBL_SIZE    >= 2 (if working directory functionality enabled)
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE GUARD
+*********************************************************************************************************
+*/
+
+#ifndef  FS_OS_H
+#define  FS_OS_H
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include                                           /* See this 'fs_os.h  Note #1'.                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_OS_MODULE
+#define  FS_OS_EXT
+#else
+#define  FS_OS_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_OS_PRESENT
+
+/*
+*********************************************************************************************************
+*                                     OS TASK/OBJECT NAME DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- OBJ NAMES --------------------- */
+#define  FS_LOCK_NAME                       "FS Global Lock"
+#define  FS_DEV_LOCK_NAME                   "FS Device Lock"
+#define  FS_DEV_ACCESS_LOCK_NAME            "FS Device Access Lock"
+#define  FS_FILE_LOCK_NAME                  "FS File Lock"
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+typedef  OS_SEM  FS_OS_SEM;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+#if (FS_CFG_WORKING_DIR_EN == DEF_ENABLED)
+void  FS_OS_WorkingDirFree(OS_TCB  *p_tcb);
+#endif
+
+CPU_BOOLEAN  FS_OS_SemCreate(FS_OS_SEM  *p_sem,
+                             CPU_INT16U  cnt);
+
+CPU_BOOLEAN  FS_OS_SemDel   (FS_OS_SEM  *p_sem);
+
+CPU_BOOLEAN  FS_OS_SemPend  (FS_OS_SEM  *p_sem,
+                             CPU_INT32U  timeout);
+
+CPU_BOOLEAN  FS_OS_SemPost  (FS_OS_SEM  *p_sem);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if     (OS_VERSION < 30300u)
+#error  "OS_VERSION                 illegal uC/OS-III version           "
+#error  "                           [MUST be >= V3.03.00]               "
+#endif
+
+#if     (OS_CFG_SEM_EN < 1u)
+#error  "OS_CFG_SEM_EN              illegally #define'd in 'os_cfg.h'   "
+#error  "                           [MUST be  > 0]                      "
+#endif
+
+#if     (OS_CFG_SEM_DEL_EN < 1u)
+#error  "OS_CFG_SEM_DEL_EN          illegally #define'd in 'os_cfg.h'   "
+#error  "                           [MUST be  > 0]                      "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs.h
new file mode 100644
index 0000000..a54dfbd
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs.h
@@ -0,0 +1,398 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    FILE SYSTEM SUITE HEADER FILE
+*
+* Filename      : fs.h
+* Version       : v4.07.00
+* Programmer(s) : FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_H
+#define  FS_H
+
+
+/*
+*********************************************************************************************************
+*                                     FILE SYSTEM VERSION NUMBER
+*
+* Note(s) : (1) (a) The file system software version is denoted as follows :
+*
+*                       Vx.yy
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes major software version revision number
+*                                   yy              denotes minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*/
+
+#define  FS_VERSION                                    40700u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+#include  
+#include  "fs_cfg_fs.h"
+#include  
+#include  "fs_type.h"
+#include  "fs_err.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_MODULE
+#define  FS_EXT
+#else
+#define  FS_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#ifdef   FS_STATIC_DISABLE
+#define  FS_STATIC
+#else
+#define  FS_STATIC  static
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         TRIAL VERSION LIMITS
+*********************************************************************************************************
+*/
+
+#ifndef  FS_TRIAL_MAX_DEV_CNT
+#define  FS_TRIAL_MAX_DEV_CNT          1u
+#endif
+
+#ifndef  FS_TRIAL_MAX_VOL_CNT
+#define  FS_TRIAL_MAX_VOL_CNT          1u
+#endif
+
+#ifndef  FS_TRIAL_MAX_FILE_CNT
+#define  FS_TRIAL_MAX_FILE_CNT         1u
+#endif
+
+#ifndef  FS_TRIAL_MAX_DIR_CNT
+#define  FS_TRIAL_MAX_DIR_CNT          1u
+#endif
+
+#ifndef  FS_TRIAL_MAX_BUF_CNT
+#define  FS_TRIAL_MAX_BUF_CNT          4u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    PATH CHARACTER/STRING DEFINES
+*
+* Note(s) : (1) See 'fs.h  PATH CHARACTER/STRING DEFINES  Note #1'.
+*********************************************************************************************************
+*/
+
+#define  FS_CHAR_PATH_SEP             ((CPU_CHAR  )ASCII_CHAR_REVERSE_SOLIDUS)
+#define  FS_CHAR_PATH_SEP_ALT         ((CPU_CHAR  )ASCII_CHAR_SOLIDUS)
+#define  FS_CHAR_DEV_SEP              ((CPU_CHAR  )ASCII_CHAR_COLON)
+
+#define  FS_STR_PATH_SEP              ((CPU_CHAR *)"\\")
+#define  FS_STR_DEV_SEP               ((CPU_CHAR *)":")
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                 FILE SYSTEM CONFIGURATION DATA TYPE
+*
+* Note(s) : (1) The file system suite is configured at initialization via the 'FS_CFG' structure :
+*
+*               (a) 'DevCnt' is the maximum number of devices that can be open simultaneously. It MUST
+*                    be between 1 & FS_QTY_NBR_MAX, inclusive.
+*
+*               (b) 'VolCnt' is the maximum number of volumes that can be open simultaneously. It MUST
+*                    be between 1 & FS_QTY_NBR_MAX, inclusive.
+*
+*               (c) 'FileCnt' is the maximum number of files that can be open simultaneously. It MUST
+*                    be between 1 & FS_QTY_NBR_MAX, inclusive.
+*
+*               (d) 'DirCnt' is the maximum number of devices that can be open simultaneously.
+*                   (1) If 'DirCnt' is 0, the directory module functions will be blocked after successful
+*                       initialization, & the file system will operate as if compiled with directory
+*                       support disabled.
+*                   (2) If directory support is disabled, 'DirCnt' is ignored.
+*                   (3) Otherwise, 'DirCnt' MUST be between 1 & FS_QTY_NBR_MAX, inclusive.
+*
+*               (e) 'BufCnt' is the maximum number of buffers that can be used simultaneously.
+*                   The minimum necessary 'BufCnt' can be calculated from the number of volumes :
+*
+*                       BufCnt >= VolCnt * 2
+*
+*                   (1) If 'FSEntry_Copy()' or 'FSEntry_Rename()' is used, then up to one additional
+*                       buffer for each volume may be necessary.
+*
+*               (f) 'DevDrvCnt' is the maximum number of device drivers that can be added.  It MUST
+*                    be between 1 & FS_QTY_NBR_MAX, inclusive.
+*
+*               (g) 'MaxSecSize' is the maximum sector size, in octets.  It MUST be 512, 1024, 2048 or
+*                    4096.  No device with a sector size larger than 'MaxSecSize' can be opened.
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_cfg {
+    FS_QTY       DevCnt;                                        /* Max nbr devices     that can be open simultaneously. */
+    FS_QTY       VolCnt;                                        /* Max nbr volumes     that can be open simultaneously. */
+    FS_QTY       FileCnt;                                       /* Max nbr files       that can be open simultaneously. */
+    FS_QTY       DirCnt;                                        /* Max nbr directories that can be open simultaneously. */
+    FS_QTY       BufCnt;                                        /* Max nbr buffers     that can be used simultaneously. */
+    FS_QTY       DevDrvCnt;                                     /* Max nbr device drivers that can be added.            */
+    FS_SEC_SIZE  MaxSecSize;                                    /* Max sec size.                                        */
+} FS_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+FS_EXT  FS_SEC_SIZE  FS_MaxSecSize;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+#define  FS_ERR_CHK_EMPTY_RTN_ARG
+
+#define  FS_ERR_CHK_RTNEXPR(call, callOnError, retExpr)  call; \
+                                                         if (*p_err != FS_ERR_NONE) { \
+                                                             callOnError; \
+                                                             return retExpr; \
+                                                         }
+
+#define  FS_ERR_CHK_RTN(call, callOnError, retVal)       FS_ERR_CHK_RTNEXPR(call, callOnError, (retVal))
+
+#define  FS_ERR_CHK(call, callOnError)                   FS_ERR_CHK_RTNEXPR(call, callOnError, FS_ERR_CHK_EMPTY_RTN_ARG)
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                    /* --------------------- CORE --------------------- */
+FS_ERR       FS_Init              (FS_CFG        *p_fs_cfg);        /* File system startup function.                    */
+
+CPU_INT16U   FS_VersionGet        (void);                           /* Get file system suite software version.          */
+
+CPU_SIZE_T   FS_MaxSecSizeGet     (void);                           /* Get maximum sector size.                         */
+
+
+                                                                    /* --------------- WORKING DIRECTORY -------------- */
+#if (FS_CFG_WORKING_DIR_EN == DEF_ENABLED)
+void         FS_WorkingDirGet     (CPU_CHAR      *path_dir,         /* Get the working directory for current task.      */
+                                   CPU_SIZE_T     size,
+                                   FS_ERR        *p_err);
+
+void         FS_WorkingDirSet     (CPU_CHAR      *path_dir,         /* Set the working directory for current task.      */
+                                   FS_ERR        *p_err);
+#endif
+
+/*
+*********************************************************************************************************
+*                                    INTERNAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_CHAR    *FS_PathParse         (CPU_CHAR      *name_full,        /* Parse full entry path.                           */
+                                   CPU_CHAR      *name_vol,
+                                   FS_ERR        *p_err);
+
+#if (FS_CFG_WORKING_DIR_EN == DEF_ENABLED)
+CPU_CHAR    *FS_WorkingDirPathForm(CPU_CHAR      *name_full,        /* Form full entry path.                            */
+                                   FS_ERR        *p_err);
+
+void         FS_WorkingDirObjFree (CPU_CHAR      *path_buf);        /* Free working dir obj.                            */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               TRACING
+*********************************************************************************************************
+*/
+
+                                                                /* Trace level, default to TRACE_LEVEL_OFF.             */
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                                   0u
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                                  1u
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                                   2u
+#endif
+
+#ifndef  TRACE_LEVEL_LOG
+#define  TRACE_LEVEL_LOG                                   3u
+#endif
+
+
+#if ((defined(FS_TRACE))       && \
+     (defined(FS_TRACE_LEVEL)) && \
+     (FS_TRACE_LEVEL >= TRACE_LEVEL_INFO))
+
+    #if (FS_TRACE_LEVEL >= TRACE_LEVEL_LOG)
+        #define  FS_TRACE_LOG(msg)     FS_TRACE  msg
+    #else
+        #define  FS_TRACE_LOG(msg)
+    #endif
+
+
+    #if (FS_TRACE_LEVEL >= TRACE_LEVEL_DBG)
+        #define  FS_TRACE_DBG(msg)     FS_TRACE  msg
+    #else
+        #define  FS_TRACE_DBG(msg)
+    #endif
+
+    #define  FS_TRACE_INFO(msg)        FS_TRACE  msg
+
+#else
+    #define  FS_TRACE_LOG(msg)
+    #define  FS_TRACE_DBG(msg)
+    #define  FS_TRACE_INFO(msg)
+
+#endif
+
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                      DEFINED IN PRODUCT'S BSP
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          FS_BSP_Dly_ms()
+*
+* Description : Delay for specified time, in milliseconds.
+*
+* Argument(s) : ms      Time delay value, in milliseconds.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : FS_OS_Dly_ms().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) FS_BSP_Dly_ms() is an application/BSP function that MUST be defined by the developer
+*                   if no OS is used (when FS_OS_PRESENT is not #define'd in fs_os.h). Otherwise, the
+*                   function FS_OS_Dly_ms() is used. This function is serviced by the OS, and is defined
+*                   in the user OS port (fs_os.c).
+*********************************************************************************************************
+*/
+
+#ifndef FS_OS_PRESENT
+void         FS_BSP_Dly_ms        (CPU_INT16U     ms);              /* Delay for specified time, in milliseconds.       */
+#endif
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                      DEFINED IN OS'S  fs_os.c
+*********************************************`***********************************************************
+*/
+
+#if (FS_CFG_WORKING_DIR_EN == DEF_ENABLED)
+CPU_CHAR    *FS_OS_WorkingDirGet  (void);                           /* Get working dir assigned to active task.         */
+
+void         FS_OS_WorkingDirSet  (CPU_CHAR      *p_working_dir,    /* Assign working directory to active task.         */
+                                   FS_ERR        *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_api.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_api.h
new file mode 100644
index 0000000..7cbe0c6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_api.h
@@ -0,0 +1,510 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     FILE SYSTEM SUITE API LAYER
+*
+*                                         POSIX API FUNCTIONS
+*
+* Filename      : fs_api.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Notice(s)     : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given
+*                     us permission to reprint portions of their documentation.  Portions of this text are
+*                     reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition,
+*                     Standard for Information Technology -- Portable Operating System Interface (POSIX),
+*                     The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute
+*                     of Electrical and Electronics Engineers, Inc and The Open Group.  In the event of any
+*                     discrepancy between these versions and the original IEEE and The Open Group Standard,
+*                     the original IEEE and The Open Group Standard is the referee document.  The original
+*                     Standard can be obtained online at http://www.opengroup.org/unix/online.html.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE GUARDS
+*********************************************************************************************************
+*/
+
+#ifndef  FS_API_H
+#define  FS_API_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "fs_cfg_fs.h"
+#include  "fs_dir.h"
+#include  "fs_file.h"
+#include  "fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) The following FAT-module-present configuration value MUST be pre-#define'd in
+*               'fs_cfg_fs.h' PRIOR to all other file system modules that require API Layer Configuration
+*               (see 'fs_cfg_fs.h  FAT LAYER CONFIGURATION  Note #2b') :
+*
+*                   FS_API_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#ifdef   FS_API_MODULE_PRESENT                                  /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                           LINT INHIBITION
+*
+* Note(s) : (1) The functions prototyped in this file conform to the POSIX standard, with the same
+*               parameter types & return values.  Certain MISRA guidelines are thereby violated.
+*
+*                   "Note 970: Use of modifier or type 'int' outside of a typedef [MISRA 2004 Rule 6.3]"
+*                   "Note 970: Use of modifier or type 'char' outside of a typedef [MISRA 2004 Rule 6.3]"
+*********************************************************************************************************
+*/
+
+/*lint -e970*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_API_MODULE
+#define  FS_API_EXT
+#else
+#define  FS_API_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_BUFSIZ                                      4096u
+
+#define  FS_EOF                                          (-1)
+
+#define  FS__IOFBF                          FS_FILE_BUF_MODE_RD_WR
+#define  FS__IONBR                          FS_FILE_BUF_MODE_NONE
+
+#define  FS_FOPEN_MAX                       (FSFile_GetFileCntMax())
+
+#define  FS_FILENAME_MAX                    FS_CFG_MAX_FULL_NAME_LEN
+
+#define  FS_SEEK_SET                        FS_FILE_ORIGIN_START
+#define  FS_SEEK_CUR                        FS_FILE_ORIGIN_CUR
+#define  FS_SEEK_END                        FS_FILE_ORIGIN_END
+
+#define  FS_NULL                          ((void *)0)
+
+
+#define  FS_STDIO_ERR                                   (-1)
+
+/*
+*********************************************************************************************************
+*                                            ERROR NUMBERS
+*********************************************************************************************************
+*/
+
+#define  FS_EACCES                                         1u   /* "Permission denied."                                 */
+#define  FS_EAGAIN                                         2u   /* "Resource temporarily unavailable."                  */
+#define  FS_EBADF                                          3u   /* "Bad file descriptor."                               */
+#define  FS_EBUSY                                          4u   /* "Resource busy."                                     */
+#define  FS_EEXIST                                         5u   /* "File exists."                                       */
+#define  FS_EFBIG                                          6u   /* "File too large."                                    */
+#define  FS_EINVAL                                         7u   /* "Invalid argument."                                  */
+#define  FS_EIO                                            8u   /* "Input/output error."                                */
+#define  FS_EISDIR                                         9u   /* "Is a directory."                                    */
+#define  FS_EMFILE                                        10u   /* "Too many files open in system."                     */
+#define  FS_ENAMETOOLONG                                  11u   /* "Filename too long."                                 */
+#define  FS_EBFILE                                        12u   /* "Too many open files."                               */
+#define  FS_NOENT                                         13u   /* "No such file or directory."                         */
+#define  FS_ENOMEM                                        14u   /* "Not enough space."                                  */
+#define  FS_ENOSPC                                        15u   /* "No space left on device."                           */
+#define  FS_ENOTDIR                                       16u   /* "Not a directory."                                   */
+#define  FS_ENOTEMPTY                                     17u   /* "Directory not empty."                               */
+#define  FS_EOVERFLOW                                     18u   /* "Value too large to be stored in date type."         */
+#define  FS_ERANGE                                        19u   /* "Result too large or too small."                     */
+#define  FS_EROFS                                         20u   /* "Read-only file system."                             */
+#define  FS_EXDEV                                         21u   /* "Improper link."                                     */
+
+/*
+*********************************************************************************************************
+*                                             MODE VALUES
+*********************************************************************************************************
+*/
+
+#define  FS_S_IFMT                                    0x7000u
+#define  FS_S_IFBLK                                   0x1000u
+#define  FS_S_IFCHR                                   0x2000u
+#define  FS_S_IFIFO                                   0x3000u
+#define  FS_S_IFREG                                   0x4000u
+#define  FS_S_IFDIR                                   0x5000u
+#define  FS_S_IFLNK                                   0x6000u
+#define  FS_S_IFSOCK                                  0x7000u
+
+#define  FS_S_IRUSR                                   0x0400u
+#define  FS_S_IWUSR                                   0x0200u
+#define  FS_S_IXUSR                                   0x0100u
+#define  FS_S_IRWXU                     (FS_S_IRUSR | FS_S_IWUSR | FS_S_IXUSR)
+
+#define  FS_S_IRGRP                                   0x0040u
+#define  FS_S_IWGRP                                   0x0020u
+#define  FS_S_IXGRP                                   0x0010u
+#define  FS_S_IRWXG                     (FS_S_IRGRP | FS_S_IWGRP | FS_S_IXGRP)
+
+#define  FS_S_IROTH                                   0x0004u
+#define  FS_S_IWOTH                                   0x0002u
+#define  FS_S_IXOTH                                   0x0001u
+#define  FS_S_IRWXO                     (FS_S_IROTH | FS_S_IWOTH | FS_S_IXOTH)
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+#define  FS_S_ISREG(m)               ((((m) & FS_S_IFMT) == FS_S_IFREG) ? 1 : 0)
+#define  FS_S_ISDIR(m)               ((((m) & FS_S_IFMT) == FS_S_IFDIR) ? 1 : 0)
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*
+* Note(s) : (1) IEEE Std 1003.1, 2004 Edition, Section 'stdio.h() : DESCRIPTION' states that fpos_t
+*               should be A non-array type containing all information needed to specify uniquely every
+*               position within a file."
+*
+*           (2) IEEE Std 1003.1, 2004 Edition, Section 'sys/types.h() : DESCRIPTION' states that
+*
+*               (a) off_t is "Used for file sizes" and, additionally, that it "shall be [a] signed
+*                   integer [type]".
+*
+*               (a) size_t is "Used for sizes of objects" and, additionally, that it "shall be an
+*                   unsigned integer type".
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  fs_fpos_t;
+
+typedef  CPU_INT32U  fs_off_t;
+
+typedef  CPU_SIZE_T  fs_size_t;
+
+typedef  CPU_INT32U  fs_dev_t;
+
+typedef  CPU_INT32U  fs_ino_t;
+
+typedef  CPU_INT32U  fs_mode_t;
+
+typedef  CPU_INT32U  fs_nlink_t;
+
+typedef  CPU_INT32U  fs_uid_t;
+
+typedef  CPU_INT32U  fs_gid_t;
+
+typedef  CPU_INT32U  fs_time_t;
+
+typedef  CPU_INT32U  fs_blksize_t;
+
+typedef  CPU_INT32U  fs_blkcnt_t;
+
+/*
+*********************************************************************************************************
+*                                        FILE STATS DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_stat {
+    fs_dev_t      st_dev;                                       /* Device ID of device containing file.                 */
+    fs_ino_t      st_ino;                                       /* File serial number.                                  */
+    fs_mode_t     st_mode;                                      /* Mode of file.                                        */
+    fs_nlink_t    st_nlink;                                     /* Number of hard links to the file.                    */
+    fs_uid_t      st_uid;                                       /* User ID of file.                                     */
+    fs_gid_t      st_gid;                                       /* Group ID of file.                                    */
+    fs_off_t      st_size;                                      /* File size in bytes.                                  */
+    fs_time_t     st_atime;                                     /* Time of last access.                                 */
+    fs_time_t     st_mtime;                                     /* Time of last data modification.                      */
+    fs_time_t     st_ctime;                                     /* Time of last status change.                          */
+    fs_blksize_t  st_blksize;                                   /* Preferred I/O block size for file.                   */
+    fs_blkcnt_t   st_blocks;                                    /* Number of blocks allocated for file.                 */
+};
+
+/*
+*********************************************************************************************************
+*                                           TIME DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_tm {
+    int           tm_sec;                                       /* Seconds [0,60].                                      */
+    int           tm_min;                                       /* Minutes [0,59].                                      */
+    int           tm_hour;                                      /* Hour [0,23].                                         */
+    int           tm_mday;                                      /* Day of month [1,31].                                 */
+    int           tm_mon;                                       /* Month of year [1,12].                                */
+    int           tm_year;                                      /* Years since 1900.                                    */
+    int           tm_wday;                                      /* Day of week [1,7] (Sunday = 1).                      */
+    int           tm_yday;                                      /* Day of year [1,366].                                 */
+    int           tm_isdst;                                     /* Daylight Savings flag.                               */
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*
+* Note(s) : (1) (a) Equivalents of all standard POSIX 'stdio.h' functions are provided EXCEPT :
+*
+*                   (1) The following file operation functions :
+*                       (A) tmpfile()
+*                       (B) tmpnam()
+*                   (2) The following file access functions :
+*                       (A) freopen()
+*                   (3) ALL formatted input/output functions.
+*                   (4) ALL character input/output functions.
+*                   (5) The following error-handling functions:
+*                       (A) perror()
+*
+*               (b) The original function name, besides the prefixed 'fs_', is preserved.
+*
+*               (c) The types of arguments & return values are transformed for the file system suite
+*                   environment :
+*
+*                   (a) 'FILE *' --> 'FS_FILE *'.
+*                   (b) 'fpos_t' --> 'fs_fpos_t'.
+*                   (c) 'size_t' --> 'fs_size_t'.
+*
+*           (2) (a) Equivalents of several POSIX 'dirent.h' functions are provided :
+*
+*                   (1) closedir()
+*                   (2) opendir()
+*                   (3) readdir()
+*
+*               (b) The original function name, besides the prefixed 'fs_', is preserved.
+*
+*               (c) The types of arguments & return values were transformed for the file system suite
+*                   environment :
+*
+*                   (1) 'DIR *'           --> 'FS_DIR *'.
+*                   (2) 'struct dirent *' --> 'struct fs_dirent *'
+*
+*           (3) (a) Equivalents of several POSIX 'sys/stat.h' functions are provided :
+*
+*                   (1) fstat()
+*                   (2) mkdir()
+*                   (3) stat()
+*
+*               (b) The original function name, besides the prefixed 'fs_', is preserved.
+*
+*           (4) (a) Equivalents of several POSIX 'time.h' function are provided :
+*
+*                   (1) asctime_r()
+*                   (2) ctime_r()
+*                   (3) localtime_r()
+*                   (4) mktime()
+*
+*               (b) The original function name, besides the prefixed 'fs_', is preserved.
+*
+*           (5) (a) Equivalents of several POSIX 'unistd.h' functions are provided :
+*
+*                   (1) chdir()
+*                   (2) ftruncate()
+*                   (3) getcwd()
+*                   (4) rmdir()
+*
+*               (b) The original function name, besides the prefixed 'fs_', is preserved.
+*
+*               (c) The types of arguments & return values were transformed for the file system suite
+*                   environment :
+*
+*                   (1) 'int'     --> 'FS_FILE *'. (file descriptor)
+*                   (2) 'off_t'   --> 'fs_off_t'.
+*                   (3) 'size_t'  --> 'fs_size_t'.
+*********************************************************************************************************
+*/
+
+                                                                            /* ------ WORKING DIRECTORY FUNCTIONS ----- */
+#if (FS_CFG_WORKING_DIR_EN == DEF_ENABLED)
+int             fs_chdir       (const  char                *path_dir);      /* Set the working dir for current task.    */
+
+char           *fs_getcwd      (       char                *path_dir,       /* Get the working dir for current task.    */
+                                       fs_size_t            size);
+#endif
+
+
+                                                                            /* ---------- DIRECTORY FUNCTIONS --------- */
+#ifdef   FS_DIR_MODULE_PRESENT
+int             fs_closedir    (       FS_DIR              *p_dir);         /* Close & free a directory.                */
+
+FS_DIR         *fs_opendir     (const  char                *name_full);     /* Open a directory.                        */
+
+int             fs_readdir_r   (       FS_DIR              *p_dir,          /* Read a directory entry from a directory. */
+                                       struct  fs_dirent   *p_dir_entry,
+                                       struct  fs_dirent  **pp_result);
+#endif
+
+
+                                                                            /* ------------ ENTRY FUNCTIONS ----------- */
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+int             fs_mkdir       (const  char                *name_full);     /* Create a directory.                      */
+
+int             fs_remove      (const  char                *name_full);     /* Delete a file or directory.              */
+
+int             fs_rename      (const  char                *name_full_old,  /* Rename a file or directory.              */
+                                const  char                *name_full_new);
+
+int             fs_rmdir       (const  char                *name_full);     /* Delete a directory.                      */
+#endif
+
+int             fs_stat        (const  char                *name_full,      /* Get information about a file or dir.     */
+                                       struct  fs_stat     *p_info);
+
+
+                                                                            /* ------------ FILE FUNCTIONS ------------ */
+void            fs_clearerr    (       FS_FILE             *p_file);        /* Clear EOF & error indicators on a file.  */
+
+int             fs_fclose      (       FS_FILE             *p_file);        /* Close & free a file.                     */
+
+int             fs_feof        (       FS_FILE             *p_file);        /* Test EOF indicator on a file.            */
+
+int             fs_ferror      (       FS_FILE             *p_file);        /* Test error indicator on a file.          */
+
+#if (FS_CFG_FILE_BUF_EN == DEF_ENABLED)
+int             fs_fflush      (       FS_FILE             *p_file);        /* Flush buffer contents to file.           */
+#endif
+
+int             fs_fgetpos     (       FS_FILE             *p_file,         /* Get file position indicator.             */
+                                       fs_fpos_t           *p_pos);
+
+#if (FS_CFG_FILE_LOCK_EN == DEF_ENABLED)
+void            fs_flockfile   (       FS_FILE             *p_file);        /* Acquire task ownership of a file.        */
+#endif
+
+FS_FILE        *fs_fopen       (const  char                *name_full,      /* Open a file.                             */
+                                const  char                *str_mode);
+
+fs_size_t       fs_fread       (       void                *p_dest,         /* Read from a file.                        */
+                                       fs_size_t            size,
+                                       fs_size_t            nitems,
+                                       FS_FILE             *p_file);
+
+int             fs_fseek       (       FS_FILE             *p_file,         /* Set file position indicator.             */
+                                       long  int            offset,
+                                       int                  origin);
+
+int             fs_fsetpos     (       FS_FILE             *p_file,         /* Set file position indicator.             */
+                                const  fs_fpos_t           *p_pos);
+
+int             fs_fstat       (       FS_FILE             *p_file,         /* Get information about a file.            */
+                                       struct  fs_stat     *p_info);
+
+
+long  int       fs_ftell       (       FS_FILE             *p_file);        /* Get file position indicator.             */
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+int             fs_ftruncate   (       FS_FILE             *p_file,         /* Truncate a file.                         */
+                                       fs_off_t             size);
+#endif
+
+#if (FS_CFG_FILE_LOCK_EN == DEF_ENABLED)
+int             fs_ftrylockfile(       FS_FILE             *p_file);        /* Acquire task ownership of a file, if avail*/
+
+void            fs_funlockfile (       FS_FILE             *p_file);        /* Release task ownership of a file.        */
+#endif
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+fs_size_t       fs_fwrite      (const  void                *p_src,          /* Write to a file.                         */
+                                       fs_size_t            size,
+                                       fs_size_t            nitems,
+                                       FS_FILE             *p_file);
+#endif
+
+void            fs_rewind      (       FS_FILE             *p_file);        /* Reset file position indicator of a file. */
+
+#if (FS_CFG_FILE_BUF_EN == DEF_ENABLED)
+void            fs_setbuf      (       FS_FILE             *p_file,         /* Assign buffer to a file.                 */
+                                       char                *p_buf);
+
+int             fs_setvbuf     (       FS_FILE             *p_file,         /* Assign buffer to a file.                 */
+                                       char                *p_buf,
+                                       int                  mode,
+                                       fs_size_t            size);
+#endif
+
+
+                                                                            /* ------------ TIME FUNCTIONS ------------ */
+char           *fs_asctime_r   (const  struct  fs_tm       *p_time,         /* Convert date/time to string.             */
+                                       char                *str_time);
+
+char           *fs_ctime_r     (const  fs_time_t           *p_ts,           /* Convert timestamp to string.             */
+                                       char                *str_time);
+
+struct  fs_tm  *fs_localtime_r (const  fs_time_t           *p_ts,           /* Convert timestamp to date/time.          */
+                                       struct  fs_tm       *p_time);
+
+fs_time_t       fs_mktime      (       struct  fs_tm       *p_time);        /* Convert date/time to timestamp.          */
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of API module include (see Note #1).             */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_buf.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_buf.h
new file mode 100644
index 0000000..3b27645
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_buf.h
@@ -0,0 +1,169 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    FILE SYSTEM BUFFER MANAGEMENT
+*
+* Filename      : fs_buf.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_BUF_H
+#define  FS_BUF_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "fs_cfg_fs.h"
+#include  "fs_err.h"
+#include  "fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_BUF_MODULE
+#define  FS_BUF_EXT
+#else
+#define  FS_BUF_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         BUFFER FLAG DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_BUF_STATE_NONE                                0u
+#define  FS_BUF_STATE_USED                                1u
+#define  FS_BUF_STATE_DIRTY                               2u
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    FILE SYSTEM BUFFER DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_buf {
+    FS_SEC_SIZE   Size;                                         /* Size cfg'd @ init.                                   */
+
+    FS_STATE      State;                                        /* Buf state.                                           */
+    FS_SEC_NBR    Start;                                        /* Sec nbr.                                             */
+    FS_FLAGS      SecType;                                      /* Sector type.                                         */
+    void         *DataPtr;                                      /* Ptr to buf data.                                     */
+    FS_VOL       *VolPtr;                                       /* Ptr to vol.                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void     FSBuf_ModuleInit(FS_QTY        buf_cnt,                /* Initialize buffer module.                            */
+                          CPU_SIZE_T    buf_size,
+                          FS_ERR       *p_err);
+
+
+FS_BUF  *FSBuf_Get       (FS_VOL       *p_vol);                 /* Allocate & initialize a buffer.                      */
+
+void     FSBuf_Free      (FS_BUF       *p_buf);                 /* Free a buffer.                                       */
+
+
+void     FSBuf_Flush     (FS_BUF       *p_buf,                  /* Flush buffer.                                        */
+                          FS_ERR       *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void     FSBuf_MarkDirty (FS_BUF       *p_buf,                  /* Mark buffer as dirty.                                */
+                          FS_ERR       *p_err);
+#endif
+
+void     FSBuf_Set       (FS_BUF       *p_buf,                  /* Set buffer sector.                                   */
+                          FS_SEC_NBR    start,
+                          FS_FLAGS      sec_type,
+                          CPU_BOOLEAN   rd,
+                          FS_ERR       *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_cache.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_cache.h
new file mode 100644
index 0000000..216c80f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_cache.h
@@ -0,0 +1,189 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 FILE SYSTEM SUITE CACHE MANAGEMENT
+*
+* Filename      : fs_cache.h
+* Version       : v4.07.00
+* Programmer(s) : FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         INCLUDE GUARDS
+*********************************************************************************************************
+*/
+
+#ifndef  FS_CACHE_H
+#define  FS_CACHE_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "fs_cfg_fs.h"
+#include  "fs_err.h"
+#include  "fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) The following cache-module-present configuration value MUST be pre-#define'd in
+*               'fs_cfg_fs.h' PRIOR to all other file system modules that require Cache Module
+*               configuration (see 'fs_cfg_fs.h  FILE SYSTEM CONFIGURATION) :
+*
+*                   FS_CACHE_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#ifdef   FS_CACHE_MODULE_PRESENT                                /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+#ifdef   FS_CACHE_MODULE
+#define  FS_CACHE_EXT
+#else
+#define  FS_CACHE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     VOLUME CACHE API DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_vol_cache_api {
+    void  (*Create)    (FS_VOL       *p_vol,                    /* Create cache.                                        */
+                        void         *p_cache_data,
+                        CPU_INT32U    size,
+                        FS_SEC_SIZE   sec_size,
+                        CPU_INT08U    pct_mgmt,
+                        CPU_INT08U    pct_dir,
+                        FS_FLAGS      mode,
+                        FS_ERR       *p_err);
+
+    void  (*Del)       (FS_VOL       *p_vol,                    /* Delete cache.                                        */
+                        FS_ERR       *p_err);
+
+    void  (*Rd)        (FS_VOL       *p_vol,                    /* Read sectors using cache.                            */
+                        void         *p_dest,
+                        FS_SEC_NBR    start,
+                        FS_SEC_QTY    cnt,
+                        FS_FLAGS      sec_type,
+                        FS_ERR       *p_err);
+
+    void  (*Release)   (FS_VOL       *p_vol,                    /* Release sectors using cache.                         */
+                        FS_SEC_NBR    start,
+                        FS_SEC_QTY    cnt,
+                        FS_ERR       *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+    void  (*Wr)        (FS_VOL       *p_vol,                    /* Write sectors using cache.                           */
+                        void         *p_src,
+                        FS_SEC_NBR    start,
+                        FS_SEC_QTY    cnt,
+                        FS_FLAGS      sec_type,
+                        FS_ERR       *p_err);
+#endif
+
+    void  (*Invalidate)(FS_VOL       *p_vol,                    /* Invalidate cache.                                    */
+                        FS_ERR       *p_err);
+
+    void  (*Flush)     (FS_VOL       *p_vol,                    /* Flush cache.                                         */
+                        FS_ERR       *p_err);
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  FS_VOL_CACHE_API  FSCache_Dflt;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of cache module include (see Note #1).           */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_cfg_fs.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_cfg_fs.h
new file mode 100644
index 0000000..4eca31a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_cfg_fs.h
@@ -0,0 +1,562 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM CONFIGURATION
+*
+* Filename      : fs_cfg_fs.h
+* Version       : v4.07.00
+* Programmer(s) : AHFAI
+*                 FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_CFG_FS_H
+#define  FS_CFG_FS_H
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+/*
+************************************************************************************************************************
+*                                             LIBRARY CONFIGURATION ERRORS
+************************************************************************************************************************
+*/
+
+#if (LIB_VERSION < 13800u)
+#error  "lib_def.h, LIB_VERSION SHOULD be >= V1.38.00"
+#endif
+
+/*
+*********************************************************************************************************
+*                           FILE SYSTEM ERROR CHECKING CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* ------------- FS_CFG_ERR_ARG_CHK_EXT_EN ------------ */
+#ifndef  FS_CFG_ERR_ARG_CHK_EXT_EN
+#error  "FS_CFG_ERR_ARG_CHK_EXT_EN                    not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_CFG_ERR_ARG_CHK_EXT_EN != DEF_DISABLED) && \
+        (FS_CFG_ERR_ARG_CHK_EXT_EN != DEF_ENABLED ))
+#error  "FS_CFG_ERR_ARG_CHK_EXT_EN              illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+
+                                                                /* ------------- FS_CFG_ERR_ARG_CHK_DBG_EN ------------ */
+#ifndef  FS_CFG_ERR_ARG_CHK_DBG_EN
+#error  "FS_CFG_ERR_ARG_CHK_DBG_EN                    not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_CFG_ERR_ARG_CHK_DBG_EN != DEF_DISABLED) && \
+        (FS_CFG_ERR_ARG_CHK_DBG_EN != DEF_ENABLED ))
+#error  "FS_CFG_ERR_ARG_CHK_DBG_EN              illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+/*
+*********************************************************************************************************
+*                              FILE SYSTEM COUNTER CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- FS_CFG_CTR_STAT_EN ---------------- */
+#ifndef  FS_CFG_CTR_STAT_EN
+#error  "FS_CFG_CTR_STAT_EN                           not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_CFG_CTR_STAT_EN != DEF_DISABLED) && \
+        (FS_CFG_CTR_STAT_EN != DEF_ENABLED ))
+#error  "FS_CFG_CTR_STAT_EN                     illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+
+                                                                /* ----------------- FS_CFG_CTR_ERR_EN ---------------- */
+#ifndef  FS_CFG_CTR_ERR_EN
+#error  "FS_CFG_CTR_ERR_EN                            not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_CFG_CTR_ERR_EN != DEF_DISABLED) && \
+        (FS_CFG_CTR_ERR_EN != DEF_ENABLED ))
+#error  "FS_CFG_CTR_ERR_EN                      illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+/*
+*********************************************************************************************************
+*                               FILE SYSTEM DEBUG CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* --------------- FS_CFG_DBG_MEM_CLR_EN -------------- */
+#ifndef  FS_CFG_DBG_MEM_CLR_EN
+#error  "FS_CFG_DBG_MEM_CLR_EN                        not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_CFG_DBG_MEM_CLR_EN != DEF_DISABLED) && \
+        (FS_CFG_DBG_MEM_CLR_EN != DEF_ENABLED ))
+#error  "FS_CFG_DBG_MEM_CLR_EN                  illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+
+                                                                /* -------------- FS_CFG_DBG_WR_VERIFY_EN ------------- */
+#ifndef  FS_CFG_DBG_WR_VERIFY_EN
+#error  "FS_CFG_DBG_WR_VERIFY_EN                      not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_CFG_DBG_WR_VERIFY_EN != DEF_DISABLED) && \
+        (FS_CFG_DBG_WR_VERIFY_EN != DEF_ENABLED ))
+#error  "FS_CFG_DBG_WR_VERIFY_EN                illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+/*
+*********************************************************************************************************
+*                                      FILE SYSTEM CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifdef   FS_CFG_SYS_DRV_SEL
+#if     (FS_CFG_SYS_DRV_SEL == FS_SYS_DRV_SEL_FAT)
+#define  FS_FAT_MODULE_PRESENT
+#endif
+#endif
+
+
+#ifdef   FS_CFG_CACHE_EN
+#if     (FS_CFG_CACHE_EN    == DEF_ENABLED)
+#define  FS_CACHE_MODULE_PRESENT
+#endif
+#endif
+
+
+#ifdef   FS_CFG_API_EN
+#if     (FS_CFG_API_EN      == DEF_ENABLED)
+#define  FS_API_MODULE_PRESENT
+#endif
+#endif
+
+
+#ifdef   FS_CFG_DIR_EN
+#if     (FS_CFG_DIR_EN      == DEF_ENABLED)
+#define  FS_DIR_MODULE_PRESENT
+#endif
+#endif
+
+
+#ifdef   FS_FAT_MODULE_PRESENT
+#if     (FS_FAT_CFG_LFN_EN   == DEF_ENABLED)
+#define  FS_FAT_LFN_MODULE_PRESENT
+#endif
+
+#if     (FS_FAT_CFG_FAT12_EN == DEF_ENABLED)
+#define  FS_FAT_FAT12_MODULE_PRESENT
+#endif
+
+#if     (FS_FAT_CFG_FAT16_EN == DEF_ENABLED)
+#define  FS_FAT_FAT16_MODULE_PRESENT
+#endif
+
+#if     (FS_FAT_CFG_FAT32_EN == DEF_ENABLED)
+#define  FS_FAT_FAT32_MODULE_PRESENT
+#endif
+
+#ifdef   FS_FAT_CFG_JOURNAL_EN
+#if     (FS_FAT_CFG_JOURNAL_EN  == DEF_ENABLED)
+#define  FS_FAT_JOURNAL_MODULE_PRESENT
+#endif
+#endif
+#endif
+
+
+                                                                /* -------------- FS_CFG_MAX_DEV_NAME_LEN ------------- */
+#ifndef  FS_CFG_MAX_DEV_NAME_LEN
+#error  "FS_CFG_MAX_DEV_NAME_LEN                      not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_DEV_NAME_LEN < 1u)
+#error  "FS_CFG_MAX_DEV_NAME_LEN                illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_DEV_NAME_LEN < FS_CFG_MAX_DEV_DRV_NAME_LEN + 3u)
+#error  "FS_CFG_MAX_DEV_NAME_LEN                illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= FS_CFG_MAX_DEV_DRV_NAME_LEN + 3]   "
+
+#elif   (FS_CFG_MAX_DEV_NAME_LEN > FS_CFG_MAX_DEV_DRV_NAME_LEN + 5u)
+#error  "FS_CFG_MAX_DEV_NAME_LEN                illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  <= FS_CFG_MAX_DEV_DRV_NAME_LEN + 5]   "
+#endif
+
+
+                                                                /* --------------- FS_CFG_64_BITS_LBA_EN -------------- */
+#ifndef  FS_CFG_64_BITS_LBA_EN
+#error  "FS_CFG_64_BITS_LBA_EN                        not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_CFG_64_BITS_LBA_EN != DEF_DISABLED) && \
+        (FS_CFG_64_BITS_LBA_EN != DEF_ENABLED ))
+#error  "FS_CFG_64_BITS_LBA_EN                  illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+                                                                /* -------------- FS_CFG_BUF_ALIGN_OCTETS ------------- */
+#ifndef  FS_CFG_BUF_ALIGN_OCTETS
+#error  "FS_CFG_BUF_ALIGN_OCTETS                      not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   FILE SYSTEM NAME CONFIGURATION
+*
+* Note(s) : (1) Ideally, the Type module would define ALL file system lengths
+*********************************************************************************************************
+*/
+
+#ifdef   FS_CFG_MAX_VOL_NAME_LEN
+#ifdef   FS_CFG_MAX_PATH_NAME_LEN
+#define  FS_CFG_MAX_FULL_NAME_LEN               (FS_CFG_MAX_VOL_NAME_LEN + FS_CFG_MAX_PATH_NAME_LEN)
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  FILE SYSTEM CONFIGURATION ERRORS
+*
+* Note(s) : (1) Only FAT currently supported.
+*********************************************************************************************************
+*/
+                                                                /* ---------------- FS_CFG_SYS_DRV_SEL ---------------- */
+                                                                /* See Note #1.                                         */
+#ifndef  FS_CFG_SYS_DRV_SEL
+#error  "FS_CFG_SYS_DRV_SEL                           not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  FS_SYS_DRV_SEL_FAT]                   "
+
+#elif   (FS_CFG_SYS_DRV_SEL != FS_SYS_DRV_SEL_FAT)
+#error  "FS_CFG_SYS_DRV_SEL                     illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  FS_SYS_DRV_SEL_FAT]                   "
+#endif
+
+
+
+                                                                /* ------------------ FS_CFG_CACHE_EN ----------------- */
+                                                                /* See Note #2.                                         */
+#ifndef  FS_CFG_CACHE_EN
+#error  "FS_CFG_CACHE_EN                              not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_CFG_CACHE_EN != DEF_DISABLED) && \
+        (FS_CFG_CACHE_EN != DEF_ENABLED ))
+#error  "FS_CFG_CACHE_EN                        illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+
+                                                                /* ------------------- FS_CFG_API_EN ------------------ */
+#ifndef  FS_CFG_API_EN
+#error  "FS_CFG_API_EN                                not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_CFG_API_EN != DEF_DISABLED) && \
+        (FS_CFG_API_EN != DEF_ENABLED ))
+#error  "FS_CFG_API_EN                          illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+
+                                                                /* ------------------- FS_CFG_DIR_EN ------------------ */
+#ifndef  FS_CFG_DIR_EN
+#error  "FS_CFG_DIR_EN                                not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_CFG_DIR_EN != DEF_DISABLED) && \
+        (FS_CFG_DIR_EN != DEF_ENABLED ))
+#error  "FS_CFG_DIR_EN                          illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                         FILE SYSTEM FEATURE INCLUSION CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- FS_CFG_FILE_BUF_EN ---------------- */
+#ifndef  FS_CFG_FILE_BUF_EN
+#error  "FS_CFG_FILE_BUF_EN                           not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+
+#elif  ((FS_CFG_FILE_BUF_EN != DEF_ENABLED ) && \
+        (FS_CFG_FILE_BUF_EN != DEF_DISABLED))
+#error  "FS_CFG_FILE_BUF_EN                     illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+#endif
+
+
+
+                                                                /* ---------------- FS_CFG_FILE_LOCK_EN --------------- */
+#ifndef  FS_CFG_FILE_LOCK_EN
+#error  "FS_CFG_FILE_LOCK_EN                          not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+
+#elif  ((FS_CFG_FILE_LOCK_EN != DEF_ENABLED ) && \
+        (FS_CFG_FILE_LOCK_EN != DEF_DISABLED))
+#error  "FS_CFG_FILE_LOCK_EN                    illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+#endif
+
+
+
+                                                                /* ---------------- FS_CFG_PARTITION_EN --------------- */
+#ifndef  FS_CFG_PARTITION_EN
+#error  "FS_CFG_PARTITION_EN                          not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+
+#elif  ((FS_CFG_PARTITION_EN != DEF_ENABLED ) && \
+        (FS_CFG_PARTITION_EN != DEF_DISABLED))
+#error  "FS_CFG_PARTITION_EN                    illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+#endif
+
+
+
+                                                                /* --------------- FS_CFG_WORKING_DIR_EN -------------- */
+                                                                /* See Note #1.                                         */
+#ifndef  FS_CFG_WORKING_DIR_EN
+#error  "FS_CFG_WORKING_DIR_EN                        not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+
+#elif  ((FS_CFG_WORKING_DIR_EN != DEF_ENABLED ) && \
+        (FS_CFG_WORKING_DIR_EN != DEF_DISABLED))
+#error  "FS_CFG_WORKING_DIR_EN                  illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+#endif
+
+
+
+                                                                /* ------------------ FS_CFG_UTF8_EN ------------------ */
+#ifndef  FS_CFG_UTF8_EN
+#error  "FS_CFG_UTF8_EN                               not #define'd in 'fs_cfg.h'               "
+#error  "                                       [     || DEF_ENABLED ]                          "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+
+#elif  ((FS_CFG_UTF8_EN != DEF_ENABLED ) && \
+        (FS_CFG_UTF8_EN != DEF_DISABLED))
+#error  "FS_CFG_UTF8_EN                         illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     || DEF_ENABLED ]                          "
+#endif
+
+
+
+                                                                /* -------- FS_CFG_CONCURRENT_ENTRIES_ACCESS_EN ------- */
+#ifndef  FS_CFG_CONCURRENT_ENTRIES_ACCESS_EN
+#error  "FS_CFG_CONCURRENT_ENTRIES_ACCESS_EN          not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+
+#elif  ((FS_CFG_CONCURRENT_ENTRIES_ACCESS_EN != DEF_ENABLED) && \
+        (FS_CFG_CONCURRENT_ENTRIES_ACCESS_EN != DEF_DISABLED))
+#error  "FS_CFG_CONCURRENT_ENTRIES_ACCESS_EN    illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+#endif
+
+
+
+                                                                /* ----------------- FS_CFG_RD_ONLY_EN ---------------- */
+#ifndef  FS_CFG_RD_ONLY_EN
+#error  "FS_CFG_RD_ONLY_EN                            not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+
+#elif  ((FS_CFG_RD_ONLY_EN != DEF_ENABLED) && \
+        (FS_CFG_RD_ONLY_EN != DEF_DISABLED))
+#error  "FS_CFG_RD_ONLY_EN                      illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be DEF_DISABLED]                          "
+#error  "                                       [     || DEF_ENABLED ]                          "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                FILE SYSTEM FAT CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FAT_MODULE_PRESENT
+                                                                /* ----------------- FS_FAT_CFG_LFN_EN ---------------- */
+#ifndef  FS_FAT_CFG_LFN_EN
+#error  "FS_FAT_CFG_LFN_EN                            not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_FAT_CFG_LFN_EN != DEF_DISABLED) && \
+        (FS_FAT_CFG_LFN_EN != DEF_ENABLED ))
+#error  "FS_FAT_CFG_LFN_EN                      illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+
+                                                                /* ---------------- FS_FAT_CFG_FAT12_EN --------------- */
+                                                                /* See Note #1.                                         */
+#ifndef  FS_FAT_CFG_FAT12_EN
+#error  "FS_FAT_CFG_FAT12_EN                          not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_FAT_CFG_FAT12_EN != DEF_DISABLED) && \
+        (FS_FAT_CFG_FAT12_EN != DEF_ENABLED ))
+#error  "FS_FAT_CFG_FAT12_EN                    illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+
+                                                                /* ---------------- FS_FAT_CFG_FAT16_EN --------------- */
+#ifndef  FS_FAT_CFG_FAT16_EN
+#error  "FS_FAT_CFG_FAT16_EN                          not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_FAT_CFG_FAT16_EN != DEF_DISABLED) && \
+        (FS_FAT_CFG_FAT16_EN != DEF_ENABLED ))
+#error  "FS_FAT_CFG_FAT16_EN                    illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+
+                                                                /* ---------------- FS_FAT_CFG_FAT32_EN --------------- */
+#ifndef  FS_FAT_CFG_FAT32_EN
+#error  "FS_FAT_CFG_FAT32_EN                          not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_FAT_CFG_FAT32_EN != DEF_DISABLED) && \
+        (FS_FAT_CFG_FAT32_EN != DEF_ENABLED ))
+#error  "FS_FAT_CFG_FAT32_EN                    illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+                                                                /* Make sure at least one FAT Config. is enabled        */
+#if    ((FS_FAT_CFG_FAT12_EN != DEF_ENABLED) && \
+        (FS_FAT_CFG_FAT16_EN != DEF_ENABLED) && \
+        (FS_FAT_CFG_FAT32_EN != DEF_ENABLED))
+#error  "INVALID FS FAT CONFIG                                      in  'fs_cfg.h'              "
+#error  "At least one of (FS_FAT_CFG_FAT12_EN, FS_FAT_CFG_FAT16_EN, FS_FAT_CFG_FAT32_EN)        "
+#error  "                                       [MUST be  DEF_ENABLED ]                         "
+#endif
+
+
+                                                                /* --------------- FS_FAT_CFG_JOURNAL_EN -------------- */
+#ifndef  FS_FAT_CFG_JOURNAL_EN
+#error  "FS_FAT_CFG_JOURNAL_EN                        not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((FS_FAT_CFG_JOURNAL_EN != DEF_DISABLED) && \
+        (FS_FAT_CFG_JOURNAL_EN != DEF_ENABLED ))
+#error  "FS_FAT_CFG_JOURNAL_EN                  illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+#if    ((FS_FAT_CFG_JOURNAL_EN == DEF_ENABLED) && \
+        (FS_CFG_RD_ONLY_EN     == DEF_ENABLED))
+#error  "INVALID FS FAT CONFIG                                      in  'fs_cfg.h'              "
+#error  "Journaling is useless when FS_CFG_RD_ONLY_EN is DEF_ENABLED. FS_FAT_CFG_JOURNAL_EN     "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#endif
+
+#endif
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_ctr.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_ctr.h
new file mode 100644
index 0000000..0ac3357
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_ctr.h
@@ -0,0 +1,188 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   FILE SYSTEM COUNTER MANAGEMENT
+*
+* Filename      : fs_ctr.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_CTR_H
+#define  FS_CTR_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "fs_cfg_fs.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_CTR_MODULE
+#define  FS_CTR_EXT
+#else
+#define  FS_CTR_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    FILE SYSTEM COUNTER DATA TYPE
+*
+* Note(s) : (1) FS_CTR_MAX SHOULD be #define'd based on 'FS_CTR' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  FS_CTR;                                    /* Defines   max nbr of errs/stats to cnt.              */
+
+#define  FS_CTR_MAX                         DEF_INT_32U_MAX_VAL /* Define as max unsigned val (see Note #1).            */
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     FILE SYSTEM COUNTER MACRO'S
+*
+* Description : Increment file system counter(s).
+*
+* Argument(s) : Various file system counter variable(s) & values.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               These macro's are INTERNAL file system suite macro's & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- GENERIC CTR MACRO'S --------------- */
+#define  FS_CTR_INC(ctr)                                     { (ctr)++; }
+
+#define  FS_CTR_INC_LARGE(ctr_hi, ctr_lo)                    { (ctr_lo)++;            \
+                                                                if ((ctr_lo) == 0u) { \
+                                                                    (ctr_hi)++;       \
+                                                                }                     \
+                                                             }
+
+#define  FS_CTR_ADD(ctr, val)                                { (ctr) += (val); }
+
+
+
+#if (FS_CFG_CTR_STAT_EN == DEF_ENABLED)                         /* ----------------- STAT CTR MACRO'S ----------------- */
+
+#define  FS_CTR_STAT_INC(stat_ctr)                              FS_CTR_INC(stat_ctr)
+#define  FS_CTR_STAT_ADD(stat_ctr, val)                         FS_CTR_ADD((stat_ctr), (val))
+
+#else
+
+#define  FS_CTR_STAT_INC(stat_ctr)
+#define  FS_CTR_STAT_ADD(stat_ctr, val)
+
+#endif
+
+
+#if (FS_CFG_CTR_ERR_EN == DEF_ENABLED)                          /* ------------------ ERR CTR MACRO'S ----------------- */
+
+#define  FS_CTR_ERR_INC(err_ctr)                                FS_CTR_INC(err_ctr)
+
+#else
+
+#define  FS_CTR_ERR_CLR(err_ctr);
+
+#define  FS_CTR_ERR_INC(err_ctr)
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_def.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_def.h
new file mode 100644
index 0000000..0ce2226
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_def.h
@@ -0,0 +1,88 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         FILE SYSTEM DEFINES
+*
+* Filename      : fs_def.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                 MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEF_H
+#define  FS_DEF_H
+
+/*
+*********************************************************************************************************
+*                                         FILE SYSTEM DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            BUILD DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_BUILD_FULL                                     1u
+#define  FS_BUILD_DEV_ONLY                                 2u
+
+/*
+*********************************************************************************************************
+*                                        SYSTEM DRIVER DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_SYS_DRV_SEL_FAT                                1u
+
+
+/*
+*********************************************************************************************************
+*                                          TIME DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_TIME_FMT              CLK_STR_FMT_DAY_MONTH_DD_HH_MM_SS_YYYY
+#define  FS_TIME_STR_MIN_LEN      CLK_STR_FMT_DAY_MONTH_DD_HH_MM_SS_YYYY_LEN
+
+#define  FS_TIME_TS_INVALID       ((CLK_TS_SEC)-1)
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of fs_def.h include.                         */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_dev.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_dev.h
new file mode 100644
index 0000000..c16a97a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_dev.h
@@ -0,0 +1,471 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 FILE SYSTEM SUITE DEVICE MANAGEMENT
+*
+* Filename      : fs_dev.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DEV_H
+#define  FS_DEV_H
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DEV_MODULE
+#define  FS_DEV_EXT
+#else
+#define  FS_DEV_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  "fs_cfg_fs.h"
+#include  "fs_ctr.h"
+#include  "fs_err.h"
+#include  "fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        DEVICE STATE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_DEV_STATE_CLOSED                               0u   /* Dev closed.                                          */
+#define  FS_DEV_STATE_CLOSING                              1u   /* Dev closing.                                         */
+#define  FS_DEV_STATE_OPENING                              2u   /* Dev opening.                                         */
+#define  FS_DEV_STATE_OPEN                                 3u   /* Dev open.                                            */
+#define  FS_DEV_STATE_PRESENT                              4u   /* Dev present.                                         */
+#define  FS_DEV_STATE_LOW_FMT_VALID                        5u   /* Dev low fmt valid.                                   */
+
+/*
+*********************************************************************************************************
+*                                     DEVICE I/O CONTROL DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ GENERIC OPTIONS ----------------- */
+#define  FS_DEV_IO_CTRL_REFRESH                            1u   /* Refresh dev.                                         */
+#define  FS_DEV_IO_CTRL_LOW_FMT                            2u   /* Low-level fmt dev.                                   */
+#define  FS_DEV_IO_CTRL_LOW_MOUNT                          3u   /* Low-level mount dev.                                 */
+#define  FS_DEV_IO_CTRL_LOW_UNMOUNT                        4u   /* Low-level unmount dev.                               */
+#define  FS_DEV_IO_CTRL_LOW_COMPACT                        5u   /* Low-level compact dev.                               */
+#define  FS_DEV_IO_CTRL_LOW_DEFRAG                         6u   /* Low-level defrag dev.                                */
+#define  FS_DEV_IO_CTRL_SEC_RELEASE                        7u   /* Release data in sec.                                 */
+#define  FS_DEV_IO_CTRL_PHY_RD                             8u   /* Read  physical dev.                                  */
+#define  FS_DEV_IO_CTRL_PHY_WR                             9u   /* Write physical dev.                                  */
+#define  FS_DEV_IO_CTRL_PHY_RD_PAGE                       10u   /* Read  physical dev page.                             */
+#define  FS_DEV_IO_CTRL_PHY_WR_PAGE                       11u   /* Write physical dev page.                             */
+#define  FS_DEV_IO_CTRL_PHY_ERASE_BLK                     12u   /* Erase physical dev blk.                              */
+#define  FS_DEV_IO_CTRL_PHY_ERASE_CHIP                    13u   /* Erase physical dev.                                  */
+#define  FS_DEV_IO_CTRL_RD_SEC                            14u   /* Read  physical dev sector.                           */
+#define  FS_DEV_IO_CTRL_WR_SEC                            15u   /* Write physical dev sector.                           */
+#define  FS_DEV_IO_CTRL_SYNC                              16u   /* Sync dev.                                            */
+#define  FS_DEV_IO_CTRL_CHIP_ERASE                        17u   /* Erase all data on phy dev.                           */
+
+                                                                /* ------------ SD-DRIVER SPECIFIC OPTIONS ------------ */
+#define  FS_DEV_IO_CTRL_SD_QUERY                          64u   /* Get info about SD/MMC card.                          */
+#define  FS_DEV_IO_CTRL_SD_RD_CID                         65u   /* Read SD/MMC card Card ID reg.                        */
+#define  FS_DEV_IO_CTRL_SD_RD_CSD                         66u   /* Read SD/MMC card Card-Specific Data reg.             */
+
+                                                                /* ----------- NAND-DRIVER SPECIFIC OPTIONS ----------- */
+#define  FS_DEV_IO_CTRL_NAND_PARAM_PG_RD                  80u   /* Read parameter-page from ONFI device.                */
+#define  FS_DEV_IO_CTRL_NAND_DUMP                         81u   /* Dump raw NAND dev.                                   */
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          DEVICE DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_dev {
+    FS_ID          ID;                                          /* Dev ID.                                              */
+    FS_STATE       State;                                       /* State.                                               */
+    FS_CTR         RefCnt;                                      /* Ref cnts.                                            */
+    FS_CTR         RefreshCnt;                                  /* Refresh cnts.                                        */
+
+    CPU_CHAR       Name[FS_CFG_MAX_DEV_NAME_LEN + 1u];          /* Dev name.                                            */
+    FS_QTY         UnitNbr;                                     /* Dev unit nbr.                                        */
+    FS_SEC_QTY     Size;                                        /* Size of dev (in secs).                               */
+    FS_SEC_SIZE    SecSize;                                     /* Size of dev sec.                                     */
+    CPU_BOOLEAN    Fixed;                                       /* Indicates whether device is fixed or removable.      */
+
+    FS_QTY         VolCnt;                                      /* Nbr of open vols on this dev.                        */
+
+    FS_DEV_API    *DevDrvPtr;                                   /* Ptr to dev drv for this dev.                         */
+    void          *DataPtr;                                     /* Ptr to data specific for a device driver.            */
+
+#if (FS_CFG_CTR_STAT_EN == DEF_ENABLED)
+    FS_CTR         StatRdSecCtr;                                /* Nbr rd secs.                                         */
+    FS_CTR         StatWrSecCtr;                                /* Nbr wr secs.                                         */
+#endif
+
+};
+
+/*
+*********************************************************************************************************
+*                                        DEVICE INFO DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_dev_info {
+    FS_STATE      State;                                        /* Device state.                                        */
+    FS_SEC_QTY    Size;                                         /* Size of dev (in secs).                               */
+    FS_SEC_SIZE   SecSize;                                      /* Size of dev sec.                                     */
+    CPU_BOOLEAN   Fixed;                                        /* Indicates whether device is fixed or removable.      */
+} FS_DEV_INFO;
+
+
+/*
+*********************************************************************************************************
+*                                     DEVICE DRIVER API DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_dev_api {
+    const  CPU_CHAR  *(*NameGet)           (void);                        /* Get base name of driver.                             */
+
+    void              (*Init)              (FS_ERR       *p_err);         /* Initialize driver.                                   */
+
+    void              (*Open)              (FS_DEV       *p_dev,          /* Open        a  device instance.                      */
+                                            void         *p_dev_cfg,
+                                            FS_ERR       *p_err);
+
+    void              (*Close)             (FS_DEV       *p_dev);         /* Close       a  device instance.                      */
+
+    void              (*Rd)                (FS_DEV       *p_dev,          /* Read from   a  device instance.                      */
+                                            void         *p_dest,
+                                            FS_SEC_NBR    start,
+                                            FS_SEC_QTY    cnt,
+                                            FS_ERR       *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+    void              (*Wr)                (FS_DEV       *p_dev,          /* Write to    a  device instance.                      */
+                                            void         *p_src,
+                                            FS_SEC_NBR    start,
+                                            FS_SEC_QTY    cnt,
+                                            FS_ERR       *p_err);
+#endif
+
+    void              (*Query)             (FS_DEV       *p_dev,          /* Get info about device instance.                      */
+                                            FS_DEV_INFO  *p_dev_info,
+                                            FS_ERR       *p_err);
+
+    void              (*IO_Ctrl)           (FS_DEV       *p_dev,          /* Ctrl req to a  device instance.                      */
+                                            CPU_INT08U    opt,
+                                            void         *p_data,
+                                            FS_ERR       *p_err);
+};
+
+/*
+*********************************************************************************************************
+*                                   DEVICE DRIVER SPI API DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_dev_spi_api {
+    CPU_BOOLEAN  (*Open)             (FS_QTY          unit_nbr);       /* Open (initialize) SPI.                */
+
+    void         (*Close)            (FS_QTY          unit_nbr);       /* Close (uninitialize) SPI.             */
+
+    void         (*Lock)             (FS_QTY          unit_nbr);       /* Acquire SPI lock.                     */
+
+    void         (*Unlock)           (FS_QTY          unit_nbr);       /* Release SPI lock.                     */
+
+    void         (*Rd)               (FS_QTY          unit_nbr,        /* Read from SPI.                        */
+                                      void           *p_dest,
+                                      CPU_SIZE_T      cnt);
+
+    void         (*Wr)               (FS_QTY          unit_nbr,        /* Write to SPI.                         */
+                                      void           *p_src,
+                                      CPU_SIZE_T      cnt);
+
+    void         (*ChipSelEn)        (FS_QTY          unit_nbr);       /* Enable chip select.                   */
+
+    void         (*ChipSelDis)       (FS_QTY          unit_nbr);       /* Disable chip select.                  */
+
+    void         (*SetClkFreq)       (FS_QTY          unit_nbr,        /* Set SPI clock frequency.              */
+                                      CPU_INT32U      freq);
+
+    void         (*SetBusWidth)      (FS_QTY          unit_nbr,        /* Set SPI-MultiIO bus width.            */
+                                      CPU_INT08U      bus_width,
+                                      FS_ERR         *p_err);
+} FS_DEV_SPI_API;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void               FS_DevDrvAdd             (FS_DEV_API          *p_dev_drv,   /* Add device driver to file system.        */
+                                             FS_ERR              *p_err);
+
+void               FSDev_Close              (CPU_CHAR            *name_dev,    /* Remove a device from the file system.    */
+                                             FS_ERR              *p_err);
+
+#if (FS_CFG_PARTITION_EN == DEF_ENABLED)
+FS_PARTITION_NBR   FSDev_GetNbrPartitions   (CPU_CHAR            *name_dev,    /* Get number of partitions on a device.    */
+                                             FS_ERR              *p_err);
+#endif
+
+void               FSDev_IO_Ctrl            (CPU_CHAR            *name_dev,    /* Perform device I/O control operation.    */
+                                             CPU_INT08U           opt,
+                                             void                *p_data,
+                                             FS_ERR              *p_err);
+
+void               FSDev_Open               (CPU_CHAR            *name_dev,    /* Add a device to the file system.         */
+                                             void                *p_dev_cfg,
+                                             FS_ERR              *p_err);
+
+#if (FS_CFG_PARTITION_EN == DEF_ENABLED)
+#if (FS_CFG_RD_ONLY_EN   == DEF_DISABLED)
+FS_PARTITION_NBR   FSDev_PartitionAdd       (CPU_CHAR            *name_dev,    /* Add partition to a device.               */
+                                             FS_SEC_QTY           partition_size,
+                                             FS_ERR              *p_err);
+#endif
+
+void               FSDev_PartitionFind      (CPU_CHAR            *name_dev,    /* Find partition on a device.              */
+                                             FS_PARTITION_NBR     partition_nbr,
+                                             FS_PARTITION_ENTRY  *p_partition_entry,
+                                             FS_ERR              *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void               FSDev_PartitionInit      (CPU_CHAR            *name_dev,    /* Initialize the partition on a device.    */
+                                             FS_SEC_QTY           partition_size,
+                                             FS_ERR              *p_err);
+#endif
+#endif
+
+void               FSDev_Query              (CPU_CHAR            *name_dev,    /* Obtain information about a device.       */
+                                             FS_DEV_INFO         *p_info,
+                                             FS_ERR              *p_err);
+
+void               FSDev_Rd                 (CPU_CHAR            *name_dev,    /* Read data from device sector(s).         */
+                                             void                *p_dest,
+                                             FS_SEC_NBR           start,
+                                             FS_SEC_QTY           cnt,
+                                             FS_ERR              *p_err);
+
+CPU_BOOLEAN        FSDev_Refresh            (CPU_CHAR            *name_dev,    /* Refresh device.                          */
+                                             FS_ERR              *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void               FSDev_Sync               (CPU_CHAR            *name_dev,    /* Sync device.                             */
+                                             FS_ERR              *p_err);
+
+void               FSDev_Wr                 (CPU_CHAR            *name_dev,    /* Write data to device sector(s).          */
+                                             void                *p_src,
+                                             FS_SEC_NBR           start,
+                                             FS_SEC_QTY           cnt,
+                                             FS_ERR              *p_err);
+#endif
+
+void               FSDev_Invalidate         (CPU_CHAR            *name_dev,    /* Invalidate opened volumes and files.     */
+		                                     FS_ERR              *p_err);
+
+void               FSDev_AccessLock         (CPU_CHAR            *name_dev,    /* Acquire device access lock.              */
+                                             CPU_INT32U           timeout,
+                                             FS_ERR              *p_err);
+
+void               FSDev_AccessUnlock       (CPU_CHAR            *name_dev,    /* Release device access lock.              */
+                                             FS_ERR              *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   MANAGEMENT FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+FS_QTY             FSDev_GetDevCnt       (void);                            /* Get number of open devices.              */
+
+FS_QTY             FSDev_GetDevCntMax    (void);                            /* Get max possible number of open devices. */
+
+void               FSDev_GetDevName      (FS_QTY               dev_nbr,     /* Get name of nth open device.             */
+                                          CPU_CHAR            *name_dev);
+
+/*
+*********************************************************************************************************
+*                                    INTERNAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                            /* ------------ INITIALIZATION ------------ */
+void               FSDev_ModuleInit      (FS_QTY               dev_cnt,     /* Initialize device module.                */
+                                          FS_QTY               dev_drv_cnt,
+                                          FS_ERR              *p_err);
+
+
+                                                                            /* ------------ ACCESS CONTROL ------------ */
+FS_DEV            *FSDev_AcquireLockChk  (CPU_CHAR            *name_dev,    /* Acquire device reference & lock.         */
+                                          FS_ERR              *p_err);
+
+FS_DEV            *FSDev_Acquire         (CPU_CHAR            *name_dev);   /* Acquire device reference.                */
+
+void               FSDev_Release         (FS_DEV              *p_dev);      /* Release device reference.                */
+
+void               FSDev_ReleaseUnlock   (FS_DEV              *p_dev);      /* Release device reference & lock.         */
+
+CPU_BOOLEAN        FSDev_Lock            (FS_DEV              *p_dev);      /* Acquire device lock.                     */
+
+void               FSDev_Unlock          (FS_DEV              *p_dev);      /* Release device lock.                     */
+
+
+void               FSDev_VolAdd          (FS_DEV              *p_dev,       /* Add volume to open volume list.          */
+                                          FS_VOL              *p_vol);
+
+void               FSDev_VolRemove       (FS_DEV              *p_dev,       /* Remove volume from open volume list.     */
+                                          FS_VOL              *p_vol);
+
+
+                                                                            /* ------------- LOCKED ACCESS ------------ */
+void               FSDev_QueryLocked     (FS_DEV              *p_dev,       /* Get information about a device.          */
+                                          FS_DEV_INFO         *p_info,
+                                          FS_ERR              *p_err);
+
+void               FSDev_RdLocked        (FS_DEV              *p_dev,       /* Read data from device sector(s).         */
+                                          void                *p_dest,
+                                          FS_SEC_NBR           start,
+                                          FS_SEC_QTY           cnt,
+                                          FS_ERR              *p_err);
+
+CPU_BOOLEAN        FSDev_RefreshLocked   (FS_DEV              *p_dev,       /* Refresh device.                          */
+                                          FS_ERR              *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void               FSDev_ReleaseLocked   (FS_DEV              *p_dev,       /* Release device sector(s).                */
+                                          FS_SEC_NBR           start,
+                                          FS_SEC_QTY           cnt,
+                                          FS_ERR              *p_err);
+
+void               FSDev_SyncLocked      (FS_DEV              *p_dev,       /* Sync device.                             */
+                                          FS_ERR              *p_err);
+#endif
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void               FSDev_WrLocked        (FS_DEV              *p_dev,       /* Write data to device sector(s).          */
+                                          void                *p_src,
+                                          FS_SEC_NBR           start,
+                                          FS_SEC_QTY           cnt,
+                                          FS_ERR              *p_err);
+#endif
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                      DEFINED IN OS'S  fs_os.c
+*********************************************`***********************************************************
+*/
+
+void               FS_OS_Init            (FS_ERR              *p_err);      /* Create file system objects.                        */
+
+void               FS_OS_Lock            (FS_ERR              *p_err);      /* Acquire access to file system.                     */
+
+void               FS_OS_Unlock          (void);                            /* Release access to file system.                     */
+
+
+void               FS_OS_DevInit         (FS_QTY               dev_cnt,     /* Create file system device objects.                 */
+                                          FS_ERR              *p_err);
+
+void               FS_OS_DevAccessLock   (FS_ID                dev_id,      /* Acquire global exclusive access to a device.       */
+                                          CPU_INT32U           timeout,
+                                          FS_ERR              *p_err);
+
+void               FS_OS_DevAccessUnlock (FS_ID                dev_id);     /* Release global exclusive access to a device.       */
+
+void               FS_OS_DevLock         (FS_ID                dev_id,      /* Acquire access to file system device.              */
+                                          FS_ERR              *p_err);
+
+void               FS_OS_DevUnlock       (FS_ID                dev_id);     /* Release access to file system device.              */
+
+void               FS_OS_Dly_ms          (CPU_INT16U           ms);         /* Delay for specified time, in ms.                   */
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_dir.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_dir.h
new file mode 100644
index 0000000..da13f27
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_dir.h
@@ -0,0 +1,218 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  FILE SYSTEM DIRECTORY MANAGEMENT
+*
+* Filename      : fs_dir.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE GUARD
+*********************************************************************************************************
+*/
+
+#ifndef  FS_DIR_H
+#define  FS_DIR_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "fs_cfg_fs.h"
+#include  "fs_ctr.h"
+#include  "fs_entry.h"
+#include  "fs_err.h"
+#include  "fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) The following directory-module-present configuration value MUST be pre-#define'd in
+*               'fs_cfg_fs.h' PRIOR to all other file system modules that require Directory Module
+*               configuration (see 'fs_cfg_fs.h  FILE SYSTEM CONFIGURATION) :
+*
+*                   FS_DIR_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DIR_MODULE_PRESENT                                  /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_DIR_MODULE
+#define  FS_DIR_EXT
+#else
+#define  FS_DIR_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       DIRECTORY FLAG DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_DIR_STATE_CLOSED                               0u   /* Directory closed.                                    */
+#define  FS_DIR_STATE_CLOSING                              1u   /* Directory closing.                                   */
+#define  FS_DIR_STATE_OPENING                              2u   /* Directory opening.                                   */
+#define  FS_DIR_STATE_OPEN                                 3u   /* Directory open.                                      */
+#define  FS_DIR_STATE_EOF                                  4u   /* Directory at EOF.                                    */
+#define  FS_DIR_STATE_ERR                                  5u   /* Directory error.                                     */
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      DIRECTORY ENTRY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_dirent {
+    CPU_CHAR       Name[FS_CFG_MAX_FILE_NAME_LEN + 1u];
+    FS_ENTRY_INFO  Info;
+} FS_DIR_ENTRY;
+
+
+/*
+*********************************************************************************************************
+*                                         DIRECTORY DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_dir {
+    FS_STATE       State;                                       /* Dir state.                                           */
+    FS_CTR         RefCnt;                                      /* Ref cnts.                                            */
+    FS_CTR         RefreshCnt;                                  /* Refresh cnts.                                        */
+
+    FS_FILE_SIZE   Offset;                                      /* Current dir offset.                                  */
+
+    FS_VOL        *VolPtr;                                      /* Ptr to mounted vol containing the dir.               */
+    void          *DataPtr;                                     /* Ptr to data specific for a file system.              */
+
+#if (FS_CFG_CTR_STAT_EN == DEF_ENABLED)
+    FS_CTR         StatRdEntryCtr;                              /* Nbr rd entries.                                      */
+#endif
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void            FSDir_Close    (FS_DIR        *p_dir,           /* Close a directory.                                   */
+                                FS_ERR        *p_err);
+
+CPU_BOOLEAN     FSDir_IsOpen   (CPU_CHAR      *name_full,       /* Test if dir is open                                  */
+                                FS_ERR        *p_err);
+
+FS_DIR         *FSDir_Open     (CPU_CHAR      *name_full,       /* Open a directory.                                    */
+                                FS_ERR        *p_err);
+
+void            FSDir_Rd       (FS_DIR        *p_dir,           /* Read a directory.                                    */
+                                FS_DIR_ENTRY  *p_dir_entry,
+                                FS_ERR        *p_err);
+
+/*
+*********************************************************************************************************
+*                                   MANAGEMENT FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+FS_QTY   FSDir_GetDirCnt   (void);                              /* Get number of open directories.                      */
+
+FS_QTY   FSDir_GetDirCntMax(void);                              /* Get maximum possible number of open directories.     */
+
+/*
+*********************************************************************************************************
+*                                    INTERNAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void     FSDir_ModuleInit  (FS_QTY         dir_cnt,             /* Initialize directory module.                         */
+                            FS_ERR        *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of directory module include (see Note #1).       */
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_entry.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_entry.h
new file mode 100644
index 0000000..5f39ca9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_entry.h
@@ -0,0 +1,211 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM ENTRY ACCESS
+*
+* Filename      : fs_entry.h
+* Version       : v4.07.00
+* Programmer(s) : AHFAI
+*                 FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_ENTRY_H
+#define  FS_ENTRY_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  "fs_cfg_fs.h"
+#include  "fs_err.h"
+#include  "fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_ENTRY_MODULE
+#define  FS_ENTRY_EXT
+#else
+#define  FS_ENTRY_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       ENTRY ATTRIBUTE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_ENTRY_ATTRIB_NONE                    DEF_BIT_NONE
+#define  FS_ENTRY_ATTRIB_RD                      DEF_BIT_00     /* Entry is readable.                                   */
+#define  FS_ENTRY_ATTRIB_WR                      DEF_BIT_01     /* Entry is writeable.                                  */
+#define  FS_ENTRY_ATTRIB_HIDDEN                  DEF_BIT_02     /* Entry is hidden from user-level processes.           */
+#define  FS_ENTRY_ATTRIB_DIR                     DEF_BIT_06     /* Entry is a directory.                                */
+#define  FS_ENTRY_ATTRIB_DIR_ROOT                DEF_BIT_07     /* Entry is a root directory.                           */
+
+
+                                                                /* DEF_BIT_00 not used to avoid confusion with ...      */
+                                                                /* ... old parameter that could take the values ...     */
+                                                                /* ... of DEF_NO or DEF_YES.                            */
+
+#define  FS_ENTRY_TYPE_FILE                      DEF_BIT_01     /* Entry can be a file                                  */
+#define  FS_ENTRY_TYPE_DIR                       DEF_BIT_02     /* Entry can be a directory                             */
+                                                                /* Entry can be a directory or a file                   */
+#define  FS_ENTRY_TYPE_ANY                      (DEF_BIT_01 | DEF_BIT_02)
+
+
+#define  FS_DATE_TIME_CREATE                     DEF_BIT_00
+#define  FS_DATE_TIME_MODIFY                     DEF_BIT_01
+#define  FS_DATE_TIME_ACCESS                     DEF_BIT_02
+#define  FS_DATE_TIME_ALL                        DEF_BIT_03
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+#define  FS_IS_VALID_DATE_TIME_TYPE(time_type)       (((time_type >= DEF_BIT_00) && (time_type <= DEF_BIT_03)) ? DEF_YES : DEF_NO)
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        ENTRY INFO DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_entry_info {
+    FS_FLAGS      Attrib;                                       /* Entry attributes.                                    */
+    FS_FILE_SIZE  Size;                                         /* File size in octets.                                 */
+    CLK_TS_SEC    DateTimeCreate;                               /* Date/time of creation.                               */
+    CLK_TS_SEC    DateAccess;                                   /* Date of last access.                                 */
+    CLK_TS_SEC    DateTimeWr;                                   /* Date/time of last write.                             */
+    FS_SEC_QTY    BlkCnt;                                       /* Number of blocks allocated for file.                 */
+    FS_SEC_SIZE   BlkSize;                                      /* Block size.                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void      FSEntry_AttribSet(CPU_CHAR       *name_full,          /* Set a file or directory's attributes.                */
+                            FS_FLAGS        attrib,
+                            FS_ERR         *p_err);
+
+void      FSEntry_Copy     (CPU_CHAR       *name_full_src,      /* Copy a file.                                         */
+                            CPU_CHAR       *name_full_dest,
+                            CPU_BOOLEAN     excl,
+                            FS_ERR         *p_err);
+
+void      FSEntry_Create   (CPU_CHAR       *name_full,          /* Create a file or directory.                          */
+                            FS_FLAGS        entry_type,
+                            CPU_BOOLEAN     excl,
+                            FS_ERR         *p_err);
+
+void      FSEntry_Del      (CPU_CHAR       *name_full,          /* Delete a file or directory.                          */
+                            FS_FLAGS        entry_type,
+                            FS_ERR         *p_err);
+#endif
+
+void      FSEntry_Query    (CPU_CHAR       *name_full,          /* Get information about a file or directory.           */
+                            FS_ENTRY_INFO  *p_info,
+                            FS_ERR         *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void      FSEntry_Rename   (CPU_CHAR       *name_full_old,      /* Rename a file or directory.                          */
+                            CPU_CHAR       *name_full_new,
+                            CPU_BOOLEAN     excl,
+                            FS_ERR         *p_err);
+
+void      FSEntry_TimeSet  (CPU_CHAR       *name_full,          /* Set a file or directory's date/time.                 */
+                            CLK_DATE_TIME  *p_time,
+                            CPU_INT08U      time_type,
+                            FS_ERR         *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_err.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_err.h
new file mode 100644
index 0000000..0a95fda
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_err.h
@@ -0,0 +1,432 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  FILE SYSTEM ERROR CODE MANAGEMENT
+*
+* Filename      : fs_err.h
+* Version       : v4.07.00
+* Programmer(s) : AHFAI
+*                 FBJ
+*                 BAN
+*                 EJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_ERR_H
+#define  FS_ERR_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_ERR_MODULE
+#define  FS_ERR_EXT
+#else
+#define  FS_ERR_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       FILE SYSTEM ERROR CODES
+*
+* Note(s) : (1) All generic file system error codes are #define'd in 'fs_err.h';
+*               Any device-specific     error codes are #define'd in device-specific header files.
+*********************************************************************************************************
+*/
+
+typedef enum fs_err {
+
+    FS_ERR_NONE                                 =     0u,
+
+    FS_ERR_INVALID_ARG                          =    10u,       /* Invalid argument.                                    */
+    FS_ERR_INVALID_CFG                          =    11u,       /* Invalid configuration.                               */
+    FS_ERR_INVALID_CHKSUM                       =    12u,       /* Invalid checksum.                                    */
+    FS_ERR_INVALID_LEN                          =    13u,       /* Invalid length.                                      */
+    FS_ERR_INVALID_TIME                         =    14u,       /* Invalid date/time.                                   */
+    FS_ERR_INVALID_TIMESTAMP                    =    15u,       /* Invalid timestamp.                                   */
+    FS_ERR_INVALID_TYPE                         =    16u,       /* Invalid object type.                                 */
+    FS_ERR_MEM_ALLOC                            =    17u,       /* Mem could not be alloc'd.                            */
+    FS_ERR_NULL_ARG                             =    18u,       /* Arg(s) passed NULL val(s).                           */
+    FS_ERR_NULL_PTR                             =    19u,       /* Ptr arg(s) passed NULL ptr(s).                       */
+    FS_ERR_OS                                   =    20u,       /* OS err.                                              */
+    FS_ERR_OVF                                  =    21u,       /* Value too large to be stored in type.                */
+    FS_ERR_EOF                                  =    22u,       /* EOF reached.                                         */
+
+    FS_ERR_WORKING_DIR_NONE_AVAIL               =    30u,       /* No working dir avail.                                */
+    FS_ERR_WORKING_DIR_INVALID                  =    31u,       /* Working dir invalid.                                 */
+
+
+/*
+*********************************************************************************************************
+*                                         BUFFER ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_BUF_NONE_AVAIL                       =   100u,       /* No buf avail.                                        */
+
+
+/*
+*********************************************************************************************************
+*                                          CACHE ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_CACHE_INVALID_MODE                   =   200u,       /* Mode specified invalid.                              */
+    FS_ERR_CACHE_INVALID_SEC_TYPE               =   201u,       /* Sector type specified invalid.                       */
+    FS_ERR_CACHE_TOO_SMALL                      =   202u,       /* Cache specified too small.                           */
+
+
+/*
+*********************************************************************************************************
+*                                         DEVICE ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_DEV                                  =   300u,       /* Device access error.                                 */
+    FS_ERR_DEV_ALREADY_OPEN                     =   301u,       /* Device already open.                                 */
+    FS_ERR_DEV_CHNGD                            =   302u,       /* Device has changed.                                  */
+    FS_ERR_DEV_FIXED                            =   303u,       /* Device is fixed (cannot be closed).                  */
+    FS_ERR_DEV_FULL                             =   304u,       /* Device is full (no space could be allocated).        */
+    FS_ERR_DEV_INVALID                          =   310u,       /* Invalid device.                                      */
+    FS_ERR_DEV_INVALID_CFG                      =   311u,       /* Invalid dev cfg.                                     */
+    FS_ERR_DEV_INVALID_ECC                      =   312u,       /* Invalid ECC.                                         */
+    FS_ERR_DEV_INVALID_IO_CTRL                  =   313u,       /* I/O control invalid.                                 */
+    FS_ERR_DEV_INVALID_LOW_FMT                  =   314u,       /* Low format invalid.                                  */
+    FS_ERR_DEV_INVALID_LOW_PARAMS               =   315u,       /* Invalid low-level device parameters.                 */
+    FS_ERR_DEV_INVALID_MARK                     =   316u,       /* Invalid mark.                                        */
+    FS_ERR_DEV_INVALID_NAME                     =   317u,       /* Invalid device name.                                 */
+    FS_ERR_DEV_INVALID_OP                       =   318u,       /* Invalid operation.                                   */
+    FS_ERR_DEV_INVALID_SEC_NBR                  =   319u,       /* Invalid device sec nbr.                              */
+    FS_ERR_DEV_INVALID_SEC_SIZE                 =   320u,       /* Invalid device sec size.                             */
+    FS_ERR_DEV_INVALID_SIZE                     =   321u,       /* Invalid device size.                                 */
+    FS_ERR_DEV_INVALID_UNIT_NBR                 =   322u,       /* Invalid device unit nbr.                             */
+    FS_ERR_DEV_IO                               =   323u,       /* Device I/O error.                                    */
+    FS_ERR_DEV_NONE_AVAIL                       =   324u,       /* No device avail.                                     */
+    FS_ERR_DEV_NOT_OPEN                         =   325u,       /* Device not open.                                     */
+    FS_ERR_DEV_NOT_PRESENT                      =   326u,       /* Device not present.                                  */
+    FS_ERR_DEV_TIMEOUT                          =   327u,       /* Device timeout.                                      */
+    FS_ERR_DEV_UNIT_NONE_AVAIL                  =   328u,       /* No unit avail.                                       */
+    FS_ERR_DEV_UNIT_ALREADY_EXIST               =   329u,       /* Unit already exists.                                 */
+    FS_ERR_DEV_UNKNOWN                          =   330u,       /* Unknown.                                             */
+    FS_ERR_DEV_VOL_OPEN                         =   331u,       /* Vol open on dev.                                     */
+    FS_ERR_DEV_INCOMPATIBLE_LOW_PARAMS          =   332u,       /* Incompatible low-level device parameters.            */
+    FS_ERR_DEV_INVALID_METADATA                 =   333u,       /* Device driver metadata is invalid.                   */
+    FS_ERR_DEV_OP_ABORTED                       =   334u,       /* Operation aborted.                                   */
+    FS_ERR_DEV_CORRUPT_LOW_FMT                  =   335u,       /* Corrupted low-level fmt.                             */
+    FS_ERR_DEV_INVALID_SEC_DATA                 =   336u,       /* Retrieved sec data is invalid.                       */
+    FS_ERR_DEV_WR_PROT                          =   337u,       /* Device is write protected.                           */
+    FS_ERR_DEV_OP_FAILED                        =   338u,       /* Operation failed.                                    */
+
+    FS_ERR_DEV_NAND_NO_AVAIL_BLK                =   350u,       /* No blk avail.                                        */
+    FS_ERR_DEV_NAND_NO_SUCH_SEC                 =   351u,       /* This sector is not available.                        */
+    FS_ERR_DEV_NAND_ECC_NOT_SUPPORTED           =   352u,       /* The needed ECC scheme is not supported.              */
+
+
+    FS_ERR_DEV_NAND_ONFI_EXT_PARAM_PAGE         =   362u,       /* NAND device extended parameter page must be read.    */
+
+
+/*
+*********************************************************************************************************
+*                                      DEVICE DRIVER ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_DEV_DRV_ALREADY_ADDED                =   400u,       /* Dev drv already added.                               */
+    FS_ERR_DEV_DRV_INVALID_NAME                 =   401u,       /* Invalid dev drv name.                                */
+    FS_ERR_DEV_DRV_NONE_AVAIL                   =   402u,       /* No driver available.                                 */
+
+
+/*
+*********************************************************************************************************
+*                                        DIRECTORY ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_DIR_ALREADY_OPEN                     =   500u,       /* Directory already open.                              */
+    FS_ERR_DIR_DIS                              =   501u,       /* Directory module disabled.                           */
+    FS_ERR_DIR_FULL                             =   502u,       /* Directory is full.                                   */
+    FS_ERR_DIR_NONE_AVAIL                       =   503u,       /* No directory  avail.                                 */
+    FS_ERR_DIR_NOT_OPEN                         =   504u,       /* Directory not open.                                  */
+
+
+/*
+*********************************************************************************************************
+*                                           ECC ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_ECC_CORR                             =   600u,       /* Correctable ECC error.                               */
+    FS_ERR_ECC_CRITICAL_CORR                    =   601u,       /* Critical correctable ECC error (should refresh data).*/
+    FS_ERR_ECC_UNCORR                           =   602u,       /* Uncorrectable ECC error.                             */
+
+
+/*
+*********************************************************************************************************
+*                                          ENTRY ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_ENTRIES_SAME                         =   700u,       /* Paths specify same file system entry.                */
+    FS_ERR_ENTRIES_TYPE_DIFF                    =   701u,       /* Paths do not both specify files OR directories.      */
+    FS_ERR_ENTRIES_VOLS_DIFF                    =   702u,       /* Paths specify file system entries on different vols. */
+    FS_ERR_ENTRY_CORRUPT                        =   703u,       /* File system entry is corrupt.                        */
+    FS_ERR_ENTRY_EXISTS                         =   704u,       /* File system entry exists.                            */
+    FS_ERR_ENTRY_INVALID                        =   705u,       /* File system entry invalid.                           */
+    FS_ERR_ENTRY_NOT_DIR                        =   706u,       /* File system entry NOT a directory.                   */
+    FS_ERR_ENTRY_NOT_EMPTY                      =   707u,       /* File system entry NOT empty.                         */
+    FS_ERR_ENTRY_NOT_FILE                       =   708u,       /* File system entry NOT a file.                        */
+    FS_ERR_ENTRY_NOT_FOUND                      =   709u,       /* File system entry NOT found.                         */
+    FS_ERR_ENTRY_PARENT_NOT_FOUND               =   710u,       /* Entry parent NOT found.                              */
+    FS_ERR_ENTRY_PARENT_NOT_DIR                 =   711u,       /* Entry parent NOT a directory.                        */
+    FS_ERR_ENTRY_RD_ONLY                        =   712u,       /* File system entry marked read-only.                  */
+    FS_ERR_ENTRY_ROOT_DIR                       =   713u,       /* File system entry is a root directory.               */
+    FS_ERR_ENTRY_TYPE_INVALID                   =   714u,       /* File system entry type is invalid.                   */
+    FS_ERR_ENTRY_OPEN                           =   715u,       /* Operation not allowed on already open entry          */
+    FS_ERR_ENTRY_CLUS                           =   716u,       /* No clus allocated to a directory entry               */
+
+/*
+*********************************************************************************************************
+*                                          FILE ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_FILE_ALREADY_OPEN                    =   800u,       /* File already open.                                   */
+    FS_ERR_FILE_BUF_ALREADY_ASSIGNED            =   801u,       /* Buf already assigned.                                */
+    FS_ERR_FILE_ERR                             =   802u,       /* Error indicator set on file.                         */
+    FS_ERR_FILE_INVALID_ACCESS_MODE             =   803u,       /* Access mode is specified invalid.                    */
+    FS_ERR_FILE_INVALID_ATTRIB                  =   804u,       /* Attributes are specified invalid.                    */
+    FS_ERR_FILE_INVALID_BUF_MODE                =   805u,       /* Buf mode is specified invalid or unknown.            */
+    FS_ERR_FILE_INVALID_BUF_SIZE                =   806u,       /* Buf size is specified invalid.                       */
+    FS_ERR_FILE_INVALID_DATE_TIME               =   807u,       /* Date/time is specified invalid.                      */
+    FS_ERR_FILE_INVALID_DATE_TIME_TYPE          =   808u,       /* Date/time type flag is specified invalid.            */
+    FS_ERR_FILE_INVALID_NAME                    =   809u,       /* Name is specified invalid.                           */
+    FS_ERR_FILE_INVALID_ORIGIN                  =   810u,       /* Origin is specified invalid or unknown.              */
+    FS_ERR_FILE_INVALID_OFFSET                  =   811u,       /* Offset is specified invalid.                         */
+    FS_ERR_FILE_INVALID_FILES                   =   812u,       /* Invalid file arguments.                              */
+    FS_ERR_FILE_INVALID_OP                      =   813u,       /* File operation invalid.                              */
+    FS_ERR_FILE_INVALID_OP_SEQ                  =   814u,       /* File operation sequence invalid.                     */
+    FS_ERR_FILE_INVALID_POS                     =   815u,       /* File position invalid.                               */
+    FS_ERR_FILE_LOCKED                          =   816u,       /* File locked.                                         */
+    FS_ERR_FILE_NONE_AVAIL                      =   817u,       /* No file available.                                   */
+    FS_ERR_FILE_NOT_OPEN                        =   818u,       /* File NOT open.                                       */
+    FS_ERR_FILE_NOT_LOCKED                      =   819u,       /* File NOT locked.                                     */
+    FS_ERR_FILE_OVF                             =   820u,       /* File size overflowed max file size.                  */
+    FS_ERR_FILE_OVF_OFFSET                      =   821u,       /* File offset overflowed max file offset.              */
+
+
+/*
+*********************************************************************************************************
+*                                          NAME ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_NAME_BASE_TOO_LONG                   =   900u,       /* Base name too long.                                  */
+    FS_ERR_NAME_EMPTY                           =   901u,       /* Name empty.                                          */
+    FS_ERR_NAME_EXT_TOO_LONG                    =   902u,       /* Extension too long.                                  */
+    FS_ERR_NAME_INVALID                         =   903u,       /* Invalid file name or path.                           */
+    FS_ERR_NAME_MIXED_CASE                      =   904u,       /* Name is mixed case.                                  */
+    FS_ERR_NAME_NULL                            =   905u,       /* Name ptr arg(s) passed NULL ptr(s).                  */
+    FS_ERR_NAME_PATH_TOO_LONG                   =   906u,       /* Entry path is too long.                              */
+    FS_ERR_NAME_BUF_TOO_SHORT                   =   907u,       /* Buffer for name is too short.                        */
+    FS_ERR_NAME_TOO_LONG                        =   908u,       /* Full name is too long.                               */
+
+
+/*
+*********************************************************************************************************
+*                                        PARTITION ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_PARTITION_INVALID                    =  1001u,       /* Partition invalid.                                   */
+    FS_ERR_PARTITION_INVALID_NBR                =  1002u,       /* Partition nbr specified invalid.                     */
+    FS_ERR_PARTITION_INVALID_SIG                =  1003u,       /* Partition sig invalid.                               */
+    FS_ERR_PARTITION_INVALID_SIZE               =  1004u,       /* Partition size invalid.                              */
+    FS_ERR_PARTITION_MAX                        =  1005u,       /* Max nbr partitions have been created in MBR.         */
+    FS_ERR_PARTITION_NOT_FINAL                  =  1006u,       /* Prev partition is not final partition.               */
+    FS_ERR_PARTITION_NOT_FOUND                  =  1007u,       /* Partition NOT found.                                 */
+    FS_ERR_PARTITION_ZERO                       =  1008u,       /* Partition zero.                                      */
+
+
+/*
+*********************************************************************************************************
+*                                          POOLS ERROR CODE
+*********************************************************************************************************
+*/
+
+    FS_ERR_POOL_EMPTY                           =  1100u,       /* Pool is empty.                                       */
+    FS_ERR_POOL_FULL                            =  1101u,       /* Pool is full.                                        */
+    FS_ERR_POOL_INVALID_BLK_ADDR                =  1102u,       /* Block not found in used pool pointers.               */
+    FS_ERR_POOL_INVALID_BLK_IN_POOL             =  1103u,       /* Block found in free pool pointers.                   */
+    FS_ERR_POOL_INVALID_BLK_IX                  =  1104u,       /* Block index invalid.                                 */
+    FS_ERR_POOL_INVALID_BLK_NBR                 =  1105u,       /* Number blocks specified invalid.                     */
+    FS_ERR_POOL_INVALID_BLK_SIZE                =  1106u,       /* Block size specified invalid.                        */
+
+
+/*
+*********************************************************************************************************
+*                                       FILE SYSTEM ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_SYS_TYPE_NOT_SUPPORTED               =  1301u,       /* File sys type not supported.                         */
+    FS_ERR_SYS_INVALID_SIG                      =  1309u,       /* Sec has invalid OR illegal sig.                      */
+    FS_ERR_SYS_DIR_ENTRY_PLACE                  =  1330u,       /* Dir entry could not be placed.                       */
+    FS_ERR_SYS_DIR_ENTRY_NOT_FOUND              =  1331u,       /* Dir entry not found.                                 */
+    FS_ERR_SYS_DIR_ENTRY_NOT_FOUND_YET          =  1332u,       /* Dir entry not found (yet).                           */
+    FS_ERR_SYS_SEC_NOT_FOUND                    =  1333u,       /* Sec not found.                                       */
+    FS_ERR_SYS_CLUS_CHAIN_END                   =  1334u,       /* Cluster chain ended.                                 */
+    FS_ERR_SYS_CLUS_CHAIN_END_EARLY             =  1335u,       /* Cluster chain ended before number clusters traversed.*/
+    FS_ERR_SYS_CLUS_INVALID                     =  1336u,       /* Cluster invalid.                                     */
+    FS_ERR_SYS_CLUS_NOT_AVAIL                   =  1337u,       /* Cluster not avail.                                   */
+    FS_ERR_SYS_SFN_NOT_AVAIL                    =  1338u,       /* SFN is not avail.                                    */
+    FS_ERR_SYS_LFN_ORPHANED                     =  1339u,       /* LFN entry orphaned.                                  */
+
+/*
+*********************************************************************************************************
+*                                           VOLUME ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_VOL_INVALID_NAME                     =  1400u,       /* Invalid volume name.                                 */
+    FS_ERR_VOL_INVALID_SIZE                     =  1401u,       /* Invalid volume size.                                 */
+    FS_ERR_VOL_INVALID_SEC_SIZE                 =  1403u,       /* Invalid volume sector size.                          */
+    FS_ERR_VOL_INVALID_CLUS_SIZE                =  1404u,       /* Invalid volume cluster size.                         */
+    FS_ERR_VOL_INVALID_OP                       =  1405u,       /* Volume operation invalid.                            */
+    FS_ERR_VOL_INVALID_SEC_NBR                  =  1406u,       /* Invalid volume sector number.                        */
+    FS_ERR_VOL_INVALID_SYS                      =  1407u,       /* Invalid file system on volume.                       */
+    FS_ERR_VOL_NO_CACHE                         =  1408u,       /* No cache assigned to volume.                         */
+
+    FS_ERR_VOL_NONE_AVAIL                       =  1410u,       /* No vol  avail.                                       */
+    FS_ERR_VOL_NONE_EXIST                       =  1411u,       /* No vols exist.                                       */
+    FS_ERR_VOL_NOT_OPEN                         =  1413u,       /* Vol NOT open.                                        */
+    FS_ERR_VOL_NOT_MOUNTED                      =  1414u,       /* Vol NOT mounted.                                     */
+    FS_ERR_VOL_ALREADY_OPEN                     =  1415u,       /* Vol already open.                                    */
+    FS_ERR_VOL_FILES_OPEN                       =  1416u,       /* Files open on vol.                                   */
+    FS_ERR_VOL_DIRS_OPEN                        =  1417u,       /* Dirs open on vol.                                    */
+
+    FS_ERR_VOL_JOURNAL_ALREADY_OPEN             =  1420u,       /* Journal already open.                                */
+    FS_ERR_VOL_JOURNAL_CFG_CHNGD                =  1421u,       /* File system suite cfg changed since log created.     */
+    FS_ERR_VOL_JOURNAL_FILE_INVALID             =  1422u,       /* Journal file invalid.                                */
+    FS_ERR_VOL_JOURNAL_FULL                     =  1423u,       /* Journal full.                                        */
+    FS_ERR_VOL_JOURNAL_LOG_INVALID_ARG          =  1424u,       /* Invalid arg read from journal log.                   */
+    FS_ERR_VOL_JOURNAL_LOG_INCOMPLETE           =  1425u,       /* Log not completely entered in journal.               */
+    FS_ERR_VOL_JOURNAL_LOG_NOT_PRESENT          =  1426u,       /* Log not present in journal.                          */
+    FS_ERR_VOL_JOURNAL_NOT_OPEN                 =  1427u,       /* Journal not open.                                    */
+    FS_ERR_VOL_JOURNAL_NOT_REPLAYING            =  1428u,       /* Journal not being replayed.                          */
+    FS_ERR_VOL_JOURNAL_NOT_STARTED              =  1429u,       /* Journaling not started.                              */
+    FS_ERR_VOL_JOURNAL_NOT_STOPPED              =  1430u,       /* Journaling not stopped.                              */
+    FS_ERR_VOL_JOURNAL_REPLAYING                =  1431u,       /* Journal being replayed.                              */
+    FS_ERR_VOL_JOURNAL_MARKER_NBR_MISMATCH      =  1432u,       /* Marker nbr mismatch.                                 */
+
+    FS_ERR_VOL_LABEL_INVALID                    =  1440u,       /* Volume label is invalid.                             */
+    FS_ERR_VOL_LABEL_NOT_FOUND                  =  1441u,       /* Volume label was not found.                          */
+    FS_ERR_VOL_LABEL_TOO_LONG                   =  1442u,       /* Volume label is too long.                            */
+
+
+/*
+*********************************************************************************************************
+*                                    FILE SYSTEM-OS LAYER ERROR CODES
+*********************************************************************************************************
+*/
+
+    FS_ERR_OS_LOCK                              =  1501u,
+    FS_ERR_OS_LOCK_TIMEOUT                      =  1502u,
+    FS_ERR_OS_INIT                              =  1510u,
+    FS_ERR_OS_INIT_LOCK                         =  1511u,
+    FS_ERR_OS_INIT_LOCK_NAME                    =  1512u
+
+} FS_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_file.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_file.h
new file mode 100644
index 0000000..133c2b7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_file.h
@@ -0,0 +1,350 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  FILE SYSTEM SUITE FILE MANAGEMENT
+*
+* Filename      : fs_file.h
+* Version       : v4.07.00
+* Programmer(s) : FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_FILE_H
+#define  FS_FILE_H
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_FILE_MODULE
+#define  FS_FILE_EXT
+#else
+#define  FS_FILE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  "fs_cfg_fs.h"
+#include  "fs_type.h"
+#include  "fs_ctr.h"
+#include  "fs_err.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         FILE STATE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FILE_STATE_CLOSED                              0u   /* File closed.                                         */
+#define  FS_FILE_STATE_CLOSING                             1u   /* File closing.                                        */
+#define  FS_FILE_STATE_OPENING                             2u   /* File opening.                                        */
+#define  FS_FILE_STATE_OPEN                                3u   /* File open.                                           */
+
+/*
+*********************************************************************************************************
+*                                       FILE I/O STATE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FILE_IO_STATE_NONE                             0u   /* None.                                                */
+#define  FS_FILE_IO_STATE_RD                               1u   /* Reading from file.                                   */
+#define  FS_FILE_IO_STATE_WR                               2u   /* Writing to file.                                     */
+
+/*
+*********************************************************************************************************
+*                                    FILE POSITION ORIGIN DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FILE_ORIGIN_START                    DEF_BIT_00     /* Origin is beginning of file.                         */
+#define  FS_FILE_ORIGIN_CUR                      DEF_BIT_01     /* Origin is current file position.                     */
+#define  FS_FILE_ORIGIN_END                      DEF_BIT_02     /* Origin is end of file.                               */
+
+/*
+*********************************************************************************************************
+*                                      FILE ACCESS MODE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FILE_ACCESS_MODE_NONE                DEF_BIT_NONE
+#define  FS_FILE_ACCESS_MODE_RD                  DEF_BIT_00     /* Read from file.                                      */
+#define  FS_FILE_ACCESS_MODE_WR                  DEF_BIT_01     /* Write to  file.                                      */
+#define  FS_FILE_ACCESS_MODE_CREATE              DEF_BIT_02     /* Create    file if it does not exist.                 */
+#define  FS_FILE_ACCESS_MODE_TRUNCATE            DEF_BIT_03     /* Truncate  file if it does     exist.                 */
+#define  FS_FILE_ACCESS_MODE_APPEND              DEF_BIT_04     /* Append to file.                                      */
+#define  FS_FILE_ACCESS_MODE_EXCL                DEF_BIT_05     /* File must be created.                                */
+#define  FS_FILE_ACCESS_MODE_CACHED              DEF_BIT_06     /* Defer file metadata updates until close operation.   */
+#define  FS_FILE_ACCESS_MODE_RDWR               (FS_FILE_ACCESS_MODE_RD | FS_FILE_ACCESS_MODE_WR)
+
+/*
+*********************************************************************************************************
+*                                      FILE BUFFER MODE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FILE_BUF_MODE_NONE                   DEF_BIT_NONE
+#define  FS_FILE_BUF_MODE_RD                     DEF_BIT_00     /* Data buffered ONLY for reads.                        */
+#define  FS_FILE_BUF_MODE_WR                     DEF_BIT_01     /* Data buffered ONLY for writes.                       */
+                                                                /* Data buffered for BOTH reads & writes.               */
+#define  FS_FILE_BUF_MODE_RD_WR                 (DEF_BIT_00 | DEF_BIT_01)
+#define  FS_FILE_BUF_MODE_SEC_ALIGNED            DEF_BIT_02     /* Force buffer align on sec boundaries.                */
+
+/*
+*********************************************************************************************************
+*                                     FILE BUFFER STATUS DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_FILE_BUF_STATUS_NONE                          1u    /* No buffer has been assigned.                         */
+#define  FS_FILE_BUF_STATUS_NEVER                         2u    /* Buffer CANNOT be   assigned.                         */
+#define  FS_FILE_BUF_STATUS_EMPTY                         3u    /* Buffer has been    assigned, but is  empty.          */
+#define  FS_FILE_BUF_STATUS_NONEMPTY_RD                   4u    /* Buffer has been    assigned & contains rd data.      */
+#define  FS_FILE_BUF_STATUS_NONEMPTY_WR                   5u    /* Buffer has been    assigned & contains data to wr.   */
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           FILE DATA TYPE
+*
+* Note(s) : (1) 'DataPtr' can be assigned pointer to file system driver-specific datum/struct/buffer.
+*********************************************************************************************************
+*/
+
+struct  fs_file {
+    FS_ID           ID;                                         /* File ID cfg'd @ init.                                */
+    FS_STATE        State;                                      /* File state.                                          */
+    FS_CTR          RefCnt;                                     /* Ref cnts.                                            */
+    FS_CTR          RefreshCnt;                                 /* Refresh cnts.                                        */
+
+    FS_FLAGS        AccessMode;                                 /* Access mode.                                         */
+    CPU_BOOLEAN     FlagErr;                                    /* Err flag.                                            */
+    CPU_BOOLEAN     FlagEOF;                                    /* EOF flag.                                            */
+    FS_STATE        IO_State;                                   /* I/O state.                                           */
+    FS_FILE_SIZE    Size;                                       /* File size.                                           */
+    FS_FILE_SIZE    Pos;                                        /* File pos.                                            */
+
+#if (FS_CFG_FILE_BUF_EN == DEF_ENABLED)
+    FS_FILE_SIZE    BufStart;                                   /* Start pos of buf in file.                            */
+    CPU_SIZE_T      BufMaxPos;                                  /* Max buf pos.                                         */
+    CPU_SIZE_T      BufSize;                                    /* Buf size.                                            */
+    FS_FLAGS        BufMode;                                    /* Buf mode.                                            */
+    FS_STATE        BufStatus;                                  /* Buf status.                                          */
+    void           *BufPtr;                                     /* Ptr to buf.                                          */
+    FS_SEC_SIZE     BufSecSize;                                 /* Buf sec size.                                        */
+#endif
+
+    FS_VOL         *VolPtr;                                     /* Ptr to mounted vol containing the file.              */
+    void           *DataPtr;                                    /* Ptr to data specific for a file system driver.       */
+
+#if (FS_CFG_CTR_STAT_EN == DEF_ENABLED)
+    FS_CTR          StatRdCtr;                                  /* Nbr rds.                                             */
+    FS_CTR          StatWrCtr;                                  /* Nbr wrs.                                             */
+#endif
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (FS_CFG_FILE_BUF_EN == DEF_ENABLED)
+void           FSFile_BufAssign    (FS_FILE         *p_file,    /* Assign buffer to a file.                             */
+                                    void            *p_buf,
+                                    FS_FLAGS         mode,
+                                    CPU_SIZE_T       size,
+                                    FS_ERR          *p_err);
+
+void           FSFile_BufFlush     (FS_FILE         *p_file,    /* Flush buffer contents to file.                       */
+                                    FS_ERR          *p_err);
+#endif
+
+void           FSFile_Close        (FS_FILE         *p_file,    /* Close a file.                                        */
+                                    FS_ERR          *p_err);
+
+void           FSFile_ClrErr       (FS_FILE         *p_file,    /* Clear EOF & error indicators on a file.              */
+                                    FS_ERR          *p_err);
+
+CPU_BOOLEAN    FSFile_IsErr        (FS_FILE         *p_file,    /* Test error indicator on a file.                      */
+                                    FS_ERR          *p_err);
+
+CPU_BOOLEAN    FSFile_IsEOF        (FS_FILE         *p_file,    /* Test EOF indicator on a file.                        */
+                                    FS_ERR          *p_err);
+
+CPU_BOOLEAN    FSFile_IsOpen       (CPU_CHAR        *name_full, /* Test if file is open                                 */
+                                    FS_FLAGS        *p_mode,
+                                    FS_ERR          *p_err);
+
+#if (FS_CFG_FILE_LOCK_EN == DEF_ENABLED)
+void           FSFile_LockAccept   (FS_FILE         *p_file,    /* Acquire task ownership of a file, if available.      */
+                                    FS_ERR          *p_err);
+
+void           FSFile_LockGet      (FS_FILE         *p_file,    /* Acquire task ownership of a file.                    */
+                                    FS_ERR          *p_err);
+
+void           FSFile_LockSet      (FS_FILE         *p_file,    /* Release task ownership of a file.                    */
+                                    FS_ERR          *p_err);
+#endif
+
+FS_FILE       *FSFile_Open         (CPU_CHAR        *name_full, /* Open a file.                                         */
+                                    FS_FLAGS         mode,
+                                    FS_ERR          *p_err);
+
+FS_FILE_SIZE   FSFile_PosGet       (FS_FILE         *p_file,    /* Get file position indicator.                         */
+                                    FS_ERR          *p_err);
+
+void           FSFile_PosSet       (FS_FILE         *p_file,    /* Set file position indicator.                         */
+                                    FS_FILE_OFFSET   offset,
+                                    FS_STATE         origin,
+                                    FS_ERR          *p_err);
+
+void           FSFile_Query        (FS_FILE         *p_file,    /* Get information about a file.                        */
+                                    FS_ENTRY_INFO   *p_info,
+                                    FS_ERR          *p_err);
+
+CPU_SIZE_T     FSFile_Rd           (FS_FILE         *p_file,    /* Read from a file.                                    */
+                                    void            *p_dest,
+                                    CPU_SIZE_T       size,
+                                    FS_ERR          *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void           FSFile_Truncate     (FS_FILE         *p_file,    /* Truncate a file.                                     */
+                                    FS_FILE_SIZE     size,
+                                    FS_ERR          *p_err);
+#endif
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+CPU_SIZE_T     FSFile_Wr           (FS_FILE         *p_file,    /* Write to a file.                                     */
+                                    void            *p_src,
+                                    CPU_SIZE_T       size,
+                                    FS_ERR          *p_err);
+#endif
+
+/*
+*********************************************************************************************************
+*                                   MANAGEMENT FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+FS_QTY         FSFile_GetFileCnt   (void);                      /* Get number of open files.                            */
+
+FS_QTY         FSFile_GetFileCntMax(void);                      /* Get maximum possible number of open files.           */
+
+/*
+*********************************************************************************************************
+*                                    INTERNAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void           FSFile_ModuleInit   (FS_QTY           file_cnt,  /* Initialize file module.                              */
+                                    FS_ERR          *p_err);
+
+FS_FLAGS       FSFile_ModeParse    (CPU_CHAR        *str_mode,  /* Parse mode string.                                   */
+                                    CPU_SIZE_T       str_len);
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                      DEFINED IN OS'S  fs_os.c
+*********************************************`***********************************************************
+*/
+
+#if (FS_CFG_FILE_LOCK_EN == DEF_ENABLED)
+void           FS_OS_FileInit      (FS_QTY           file_cnt,  /* Create file system device objects.                   */
+                                    FS_ERR          *p_err);
+
+void           FS_OS_FileAccept    (FS_ID            file_id,   /* Accept  access to file system file.                  */
+                                    FS_ERR          *p_err);
+
+void           FS_OS_FileLock      (FS_ID            file_id,   /* Acquire access to file system file.                  */
+                                    FS_ERR          *p_err);
+
+CPU_BOOLEAN    FS_OS_FileUnlock    (FS_ID            file_id);  /* Release access to file system file.                  */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_inc.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_inc.h
new file mode 100644
index 0000000..03f5744
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_inc.h
@@ -0,0 +1,73 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                FILE SYSTEM SUITE INCLUDE HEADER FILE
+*
+* Filename      : fs.h
+* Version       : v4.07.00
+* Programmer(s) : FBJ
+* Note(s)       : (1) It is NOT necessary to use this file as a master include file for   C/FS. It is
+*                     suggested to include to your application only the necessary headers.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_INC_H
+#define  FS_INC_H
+
+
+/*
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  "fs.h"
+#include  "fs_dev.h"
+#include  "fs_dir.h"
+#include  "fs_entry.h"
+#include  "fs_file.h"
+#include  "fs_partition.h"
+#include  "fs_vol.h"
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_partition.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_partition.h
new file mode 100644
index 0000000..0169528
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_partition.h
@@ -0,0 +1,231 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               FILE SYSTEM SUITE PARTITION MANAGEMENT
+*
+* Filename      : fs_partition.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*                 AHFAI
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_PARTITION_H
+#define  FS_PARTITION_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "fs_cfg_fs.h"
+#include  "fs_dev.h"
+#include  "fs_err.h"
+#include  "fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_PARTITION_MODULE
+#define  FS_PARTITION_EXT
+#else
+#define  FS_PARTITION_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*
+* Note(s) : (1) [Ref 1] gives various values used in the partition type field of DOS partitions.  As
+*               noted there, some operating systems do not rely on this marker during file system type
+*               determination; others, such as Microsoft Windows, do.
+*********************************************************************************************************
+*/
+
+#define  FS_PARTITION_DOS_TBL_ENTRY_SIZE                  16u
+
+#define  FS_PARTITION_DOS_OFF_ENTRY_1                    446u
+#define  FS_PARTITION_DOS_OFF_SIG                        510u
+
+#define  FS_PARTITION_DOS_OFF_BOOT_FLAG_1               (FS_PARTITION_DOS_OFF_ENTRY_1)
+#define  FS_PARTITION_DOS_OFF_START_CHS_ADDR_1          (FS_PARTITION_DOS_OFF_ENTRY_1 +  1u)
+#define  FS_PARTITION_DOS_OFF_PARTITION_TYPE_1          (FS_PARTITION_DOS_OFF_ENTRY_1 +  4u)
+#define  FS_PARTITION_DOS_OFF_END_CHS_ADDR_1            (FS_PARTITION_DOS_OFF_ENTRY_1 +  5u)
+#define  FS_PARTITION_DOS_OFF_START_LBA_1               (FS_PARTITION_DOS_OFF_ENTRY_1 +  8u)
+#define  FS_PARTITION_DOS_OFF_SIZE_1                    (FS_PARTITION_DOS_OFF_ENTRY_1 + 12u)
+
+#define  FS_PARTITION_DOS_BOOT_FLAG                     0x80u
+
+#define  FS_PARTITION_TYPE_CHS_MICROSOFT_EXT            0x05u   /* See Note #1.                                         */
+#define  FS_PARTITION_TYPE_FAT32_LBA                    0x0Cu
+#define  FS_PARTITION_TYPE_FAT12_CHS                    0x01u
+#define  FS_PARTITION_TYPE_FAT16_16_32MB                0x04u
+#define  FS_PARTITION_TYPE_FAT16_CHS_32MB_2GB           0x06u
+#define  FS_PARTITION_TYPE_FAT32_CHS                    0x0Bu
+#define  FS_PARTITION_TYPE_FAT16_LBA_32MB_2GB           0x0Eu
+#define  FS_PARTITION_TYPE_LBA_MICROSOFT_EXT            0x0Fu
+#define  FS_PARTITION_TYPE_HID_FAT12_CHS                0x11u
+#define  FS_PARTITION_TYPE_HID_FAT16_16_32MB_CHS        0x14u
+#define  FS_PARTITION_TYPE_HID_FAT16_CHS_32MB_2GB       0x15u
+#define  FS_PARTITION_TYPE_HID_CHS_FAT32                0x1Bu
+#define  FS_PARTITION_TYPE_HID_LBA_FAT32                0x1Cu
+#define  FS_PARTITION_TYPE_HID_FAT16_LBA_32MB_2GB       0x1Eu
+#define  FS_PARTITION_TYPE_NTFS                         0x07u
+#define  FS_PARTITION_TYPE_MICROSOFT_MBR                0x42u
+#define  FS_PARTITION_TYPE_SOLARIS_X86                  0x82u
+#define  FS_PARTITION_TYPE_LINUX_SWAP                   0x82u
+#define  FS_PARTITION_TYPE_LINUX                        0x83u
+#define  FS_PARTITION_TYPE_HIBERNATION_A                0x84u
+#define  FS_PARTITION_TYPE_LINUX_EXT                    0x85u
+#define  FS_PARTITION_TYPE_NTFS_VOLSETA                 0x86u
+#define  FS_PARTITION_TYPE_NTFS_VOLSETB                 0x87u
+#define  FS_PARTITION_TYPE_HIBERNATION_B                0xA0u
+#define  FS_PARTITION_TYPE_HIBERNATION_C                0xA1u
+#define  FS_PARTITION_TYPE_FREE_BSD                     0xA5u
+#define  FS_PARTITION_TYPE_OPEN_BSD                     0xA6u
+#define  FS_PARTITION_TYPE_MAX_OSX                      0xA8u
+#define  FS_PARTITION_TYPE_NET_BSD                      0xA9u
+#define  FS_PARTITION_TYPE_MAC_OSX_BOOT                 0xABu
+#define  FS_PARTITION_TYPE_BSDI                         0xB7u
+#define  FS_PARTITION_TYPE_BSDI_SWAP                    0xB8u
+#define  FS_PARTITION_TYPE_EFI_GPT_DISK                 0xEEu
+#define  FS_PARTITION_TYPE_EFI_SYS_PART                 0xEFu
+#define  FS_PARTITION_TYPE_VMWARE_FILE_SYS              0xFBu
+#define  FS_PARTITION_TYPE_VMWARE_SWAP                  0xFCu
+
+#define  FS_PARTITION_DOS_NAME_EXT                 "Extended Partition"
+#define  FS_PARTITION_DOS_NAME_FAT12               "FAT12"
+#define  FS_PARTITION_DOS_NAME_FAT16               "FAT16"
+#define  FS_PARTITION_DOS_NAME_FAT32               "FAT32"
+#define  FS_PARTITION_DOS_NAME_OTHER               "Other"
+
+#define  FS_PARTITION_DOS_CHS_SECTORS_PER_TRK             63u
+#define  FS_PARTITION_DOS_CSH_HEADS_PER_CYLINDER         255u
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      PARTITION ENTRY DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_partition_entry {
+    FS_SEC_NBR  Start;                                          /* Start sec of partition.                              */
+    FS_SEC_QTY  Size;                                           /* Size of partition.                                   */
+    CPU_INT08U  Type;                                           /* Type of partition.                                   */
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (FS_CFG_PARTITION_EN == DEF_ENABLED)
+FS_PARTITION_NBR   FSPartition_GetNbrPartitions(FS_DEV              *p_dev, /* Get number of partitions on a device.    */
+                                                FS_ERR              *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+FS_PARTITION_NBR   FSPartition_Add             (FS_DEV              *p_dev, /* Add partition to device.                 */
+                                                FS_SEC_QTY           partition_size,
+                                                FS_ERR              *p_err);
+#endif
+
+void               FSPartition_Find            (FS_DEV              *p_dev, /* Find partition on device.                */
+                                                FS_PARTITION_NBR     partition_nbr,
+                                                FS_PARTITION_ENTRY  *p_partition_entry,
+                                                FS_ERR              *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void               FSPartition_Update          (FS_DEV              *p_dev, /* Update partition type.                   */
+                                                FS_PARTITION_NBR     partition_nbr,
+                                                CPU_INT08U           partition_type,
+                                                FS_ERR              *p_err);
+#endif
+#else
+void               FSPartition_FindSimple      (FS_DEV              *p_dev, /* Find partition on device.                */
+                                                FS_PARTITION_ENTRY  *p_partition_entry,
+                                                FS_ERR              *p_err);
+#endif
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void               FSPartition_Init            (FS_DEV              *p_dev, /* Initialize partition (i.e., write MBR).  */
+                                                FS_SEC_QTY           partition_size,
+                                                FS_ERR              *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_sys.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_sys.h
new file mode 100644
index 0000000..dfd6db3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_sys.h
@@ -0,0 +1,264 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                FILE SYSTEM SYSTEM DRIVER MANAGEMENT
+*
+* Filename      : fs_sys.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*                 AHFAI
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_SYS_H
+#define  FS_SYS_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  "fs_cfg_fs.h"
+#include  "fs_dir.h"
+#include  "fs_err.h"
+#include  "fs_file.h"
+#include  "fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_SYS_MODULE
+#define  FS_SYS_EXT
+#else
+#define  FS_SYS_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        SYSTEM INFO DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_sys_info {
+    FS_SEC_QTY  BadSecCnt;                                      /* Nbr of bad  sectors on volume.                       */
+    FS_SEC_QTY  FreeSecCnt;                                     /* Nbr of free sectors on volume.                       */
+    FS_SEC_QTY  UsedSecCnt;                                     /* Nbr of used sectors on volume.                       */
+    FS_SEC_QTY  TotSecCnt;                                      /* Tot nbr of  sectors on volume.                       */
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        FSSys_ModuleInit    (FS_QTY          vol_cnt,       /* Initialize system driver.                            */
+                                 FS_QTY          file_cnt,
+                                 FS_QTY          dir_cnt,
+                                 FS_ERR         *p_err);
+
+
+                                                                /* ----------------- VOLUME FUNCTIONS ----------------- */
+void        FSSys_VolClose      (FS_VOL         *p_vol);        /* Close a volume.                                      */
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void        FSSys_VolFmt        (FS_VOL         *p_vol,         /* Create a volume.                                     */
+                                 void           *p_sys_cfg,
+                                 FS_SEC_SIZE     sec_size,
+                                 FS_SEC_QTY      size,
+                                 FS_ERR         *p_err);
+#endif
+
+void        FSSys_VolLabelGet   (FS_VOL         *p_vol,         /* Get volume label.                                    */
+                                 CPU_CHAR       *label,
+                                 CPU_SIZE_T      len_max,
+                                 FS_ERR         *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void        FSSys_VolLabelSet   (FS_VOL         *p_vol,         /* Set volume label.                                    */
+                                 CPU_CHAR       *label,
+                                 FS_ERR         *p_err);
+#endif
+
+void        FSSys_VolOpen       (FS_VOL         *p_vol,         /* Open a volume.                                       */
+                                 FS_ERR         *p_err);
+
+void        FSSys_VolQuery      (FS_VOL         *p_vol,         /* Get info about a volume.                             */
+                                 FS_SYS_INFO    *p_info,
+                                 FS_ERR         *p_err);
+
+
+                                                                /* ------------------ FILE FUNCTIONS ------------------ */
+void        FSSys_FileClose     (FS_FILE        *p_file,        /* Close a file.                                        */
+                                 FS_ERR         *p_err);
+
+void        FSSys_FileOpen      (FS_FILE        *p_file,        /* Open a file.                                         */
+                                 CPU_CHAR       *name_file,
+                                 FS_ERR         *p_err);
+
+void        FSSys_FilePosSet    (FS_FILE        *p_file,        /* Set file position indicator.                         */
+                                 FS_FILE_SIZE    pos_new,
+                                 FS_ERR         *p_err);
+
+void        FSSys_FileQuery     (FS_FILE        *p_file,        /* Get info about file.                                 */
+                                 FS_ENTRY_INFO  *p_info,
+                                 FS_ERR         *p_err);
+
+CPU_SIZE_T  FSSys_FileRd        (FS_FILE        *p_file,        /* Read from a file.                                    */
+                                 void           *p_dest,
+                                 CPU_SIZE_T      size,
+                                 FS_ERR         *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void        FSSys_FileTruncate  (FS_FILE        *p_file,        /* Truncate a file.                                     */
+                                 FS_FILE_SIZE    size,
+                                 FS_ERR         *p_err);
+#endif
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+CPU_SIZE_T  FSSys_FileWr        (FS_FILE        *p_file,        /* Write to a file.                                     */
+                                 void           *p_src,
+                                 CPU_SIZE_T      size,
+                                 FS_ERR         *p_err);
+#endif
+
+#ifdef FS_DIR_MODULE_PRESENT
+                                                                /* ---------------- DIRECTORY FUNCTIONS --------------- */
+void        FSSys_DirClose      (FS_DIR         *p_dir);        /* Close a directory.                                   */
+
+void        FSSys_DirOpen       (FS_DIR         *p_dir,         /* Open a directory.                                    */
+                                 CPU_CHAR       *name_dir,
+                                 FS_ERR         *p_err);
+
+void        FSSys_DirRd         (FS_DIR         *p_dir,         /* Read a  directory entry.                             */
+                                 FS_DIR_ENTRY   *p_dir_entry,
+                                 FS_ERR         *p_err);
+#endif
+
+                                                                /* ------------------ ENTRY FUNCTIONS ----------------- */
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void        FSSys_EntryAttribSet(FS_VOL         *p_vol,         /* Set file or directory's attributes.                  */
+                                 CPU_CHAR       *name_entry,
+                                 FS_FLAGS        attrib,
+                                 FS_ERR         *p_err);
+
+void        FSSys_EntryCreate   (FS_VOL         *p_vol,         /* Create a file or directory.                          */
+                                 CPU_CHAR       *name_entry,
+                                 FS_FLAGS        entry_type,
+                                 CPU_BOOLEAN     excl,
+                                 FS_ERR         *p_err);
+
+void        FSSys_EntryDel      (FS_VOL         *p_vol,         /* Delete a file or directory.                          */
+                                 CPU_CHAR       *name_entry,
+                                 FS_FLAGS        entry_type,
+                                 FS_ERR         *p_err);
+#endif
+
+void        FSSys_EntryQuery    (FS_VOL         *p_vol,         /* Delete a file or directory.                          */
+                                 CPU_CHAR       *name_entry,
+                                 FS_ENTRY_INFO  *p_info,
+                                 FS_ERR         *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void        FSSys_EntryRename   (FS_VOL         *p_vol,         /* Rename a file or directory.                          */
+                                 CPU_CHAR       *name_entry_old,
+                                 CPU_CHAR       *name_entry_new,
+                                 CPU_BOOLEAN     excl,
+                                 FS_ERR         *p_err);
+
+void        FSSys_EntryTimeSet  (FS_VOL         *p_vol,         /* Set file or directory's date/time.                   */
+                                 CPU_CHAR       *name_entry,
+                                 CLK_DATE_TIME  *p_time,
+                                 CPU_INT08U      time_type,
+                                 FS_ERR         *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_type.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_type.h
new file mode 100644
index 0000000..ca11d26
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_type.h
@@ -0,0 +1,406 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          FILE SYSTEM TYPES
+*
+* Filename      : fs_type.h
+* Version       : v4.07.00
+* Programmer(s) : AHFAI
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_TYPE_H
+#define  FS_TYPE_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_TYPE_MODULE
+#define  FS_TYPE_EXT
+#else
+#define  FS_TYPE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  "fs_cfg_fs.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        FORWARD DECLARATIONS
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_buf              FS_BUF;
+
+typedef  struct  fs_dev              FS_DEV;
+
+typedef  struct  fs_dev_api          FS_DEV_API;
+
+typedef  struct  fs_dir              FS_DIR;
+
+typedef  struct  fs_entry_info       FS_ENTRY_INFO;
+
+typedef  struct  fs_file             FS_FILE;
+
+typedef  struct  fs_partition_entry  FS_PARTITION_ENTRY;
+
+typedef  struct  fs_sys_info         FS_SYS_INFO;
+
+typedef  struct  fs_vol              FS_VOL;
+
+typedef  struct  fs_vol_cache_api    FS_VOL_CACHE_API;
+
+
+/*
+*********************************************************************************************************
+*                                          FILE SYSTEM TYPE
+*
+* Note(s) : (1) 'FS_TYPE' declared as 'CPU_INT32U' & all 'FS_TYPE's #define'd with large, non-trivial
+*               values to trap & discard invalid/corrupted file system objects based on 'FS_TYPE'.
+*
+*           (2) 'FS_TYPE_CREATE()' macro forms 'CPU_INT32U' type value from three 'CPU_CHAR' characters.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  FS_TYPE;
+
+
+#if     (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
+#define  FS_TYPE_CREATE(c1, c2, c3, c4)         ((CPU_INT32U)((c1) << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c2) << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c3) << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c4) << (0u * DEF_OCTET_NBR_BITS)))
+#else
+
+#if     (CPU_CFG_DATA_SIZE   == CPU_WORD_SIZE_32)
+#define  FS_TYPE_CREATE(c1, c2, c3, c4)         ((CPU_INT32U)((c1) << (0u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c2) << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c3) << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c4) << (3u * DEF_OCTET_NBR_BITS)))
+
+
+#elif   (CPU_CFG_DATA_SIZE   == CPU_WORD_SIZE_16)
+#define  FS_TYPE_CREATE(c1, c2, c3, c4)         ((CPU_INT32U)((c1) << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c2) << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c3) << (0u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c4) << (1u * DEF_OCTET_NBR_BITS)))
+
+#else                                                           /* Dflt CPU_WORD_SIZE_08.                               */
+#define  FS_TYPE_CREATE(c1, c2, c3, c4)         ((CPU_INT32U)((c1) << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c2) << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c3) << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                 (CPU_INT32U)((c4) << (0u * DEF_OCTET_NBR_BITS)))
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          FILE SYSTEM FLAGS
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  FS_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                     FILE SYSTEM STATE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  FS_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                 STRUCTURE / ITEM QUANTITY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  FS_QTY;
+
+#define  FS_QTY_NBR_MAX                         DEF_INT_16U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                    STRUCTURE / ITEM ID DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  MEM_POOL_IX  FS_ID;
+
+#define  FS_ID_INVALID                          DEF_GET_U_MAX_VAL(FS_ID)
+#define  FS_ID_NBR_MAX                         (FS_ID_INVALID - 1u)
+
+
+/*
+*********************************************************************************************************
+*                                      ENTRY NAME SIZE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  FS_FILE_NAME_LEN;
+
+#define  FS_FILE_NAME_LEN_MAX                    DEF_INT_16U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                   FILE / DIRECTORY SIZE DATA TYPE
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_DATA_SIZE_MAX >= CPU_WORD_SIZE_64)
+typedef  CPU_INT64S  FS_FILE_OFFSET;
+#define  FS_FILE_OFFSET_MIN                     DEF_INT_64S_MIN_VAL
+#define  FS_FILE_OFFSET_MAX                     DEF_INT_64S_MAX_VAL
+typedef  CPU_INT64S  FS_FILE_OFFSET_SIZE;
+#else
+typedef  CPU_INT32S  FS_FILE_OFFSET;                            /* 2 GB limit for offset.                               */
+#define  FS_FILE_OFFSET_MIN                     DEF_INT_32S_MIN_VAL
+#define  FS_FILE_OFFSET_MAX                     DEF_INT_32S_MAX_VAL
+typedef  CPU_INT32U  FS_FILE_OFFSET_SIZE;
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                   FILE / DIRECTORY SIZE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  FS_FILE_SIZE;
+
+#define  FS_FILE_SIZE_MAX                        DEF_INT_32U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                   SEC QTY, NBR & SIZE DATA TYPES
+*********************************************************************************************************
+*/
+
+#if (FS_CFG_64_BITS_LBA_EN == DEF_ENABLED)
+typedef  CPU_INT64U  FS_SEC_QTY;
+
+#else
+typedef  CPU_INT32U  FS_SEC_QTY;
+#endif
+
+
+typedef  FS_SEC_QTY  FS_SEC_NBR;
+typedef  CPU_INT32U  FS_SEC_SIZE;
+
+typedef  CPU_INT16U  FS_PARTITION_NBR;
+
+#define  FS_INVALID_PARTITION_NBR                DEF_INT_16U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                           BITFIELD TYPES
+*********************************************************************************************************
+*/
+
+#if (defined(__GNUC__) && !defined(__STRICT_ANSI__))
+typedef  CPU_INT08U  FS_BITFIELD08U;
+typedef  CPU_INT16U  FS_BITFIELD16U;
+typedef  CPU_INT32U  FS_BITFIELD32U;
+typedef  CPU_INT64U  FS_BITFIELD64U;
+#else
+typedef  unsigned  int  FS_BITFIELD08U;
+typedef  unsigned  int  FS_BITFIELD16U;
+typedef  unsigned  int  FS_BITFIELD32U;
+typedef  unsigned  int  FS_BITFIELD64U;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* ------------- FS_CFG_MAX_FILE_NAME_LEN ------------- */
+#ifndef  FS_CFG_MAX_FILE_NAME_LEN
+#error  "FS_CFG_MAX_FILE_NAME_LEN                     not #define'd in 'fs_cfg.h'               "
+
+#elif   (FS_CFG_MAX_FILE_NAME_LEN < 1u)
+#error  "FS_CFG_MAX_FILE_NAME_LEN               illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_FILE_NAME_LEN > FS_FILE_NAME_LEN_MAX)
+#error  "FS_CFG_MAX_FILE_NAME_LEN               illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  <= FS_FILE_NAME_LEN_MAX]                                 "
+#endif
+
+
+                                                                /* ------------- FS_CFG_MAX_PATH_NAME_LEN ------------- */
+#ifndef  FS_CFG_MAX_PATH_NAME_LEN
+#error  "FS_CFG_MAX_PATH_NAME_LEN                     not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_PATH_NAME_LEN < 1u)
+#error  "FS_CFG_MAX_PATH_NAME_LEN               illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_PATH_NAME_LEN <= FS_CFG_MAX_FILE_NAME_LEN)
+#error  "FS_CFG_MAX_PATH_NAME_LEN               illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= FS_CFG_MAX_FILE_NAME_LEN]          "
+
+#elif   (FS_CFG_MAX_PATH_NAME_LEN > FS_FILE_NAME_LEN_MAX)
+#error  "FS_CFG_MAX_PATH_NAME_LEN               illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+#endif
+
+
+                                                                /* ------------ FS_CFG_MAX_DEV_DRV_NAME_LEN ----------- */
+#ifndef  FS_CFG_MAX_DEV_DRV_NAME_LEN
+#error  "FS_CFG_MAX_DEV_DRV_NAME_LEN              not #define'd in 'fs_cfg.h'               "
+#error  "                                   [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_DEV_DRV_NAME_LEN < 1u)
+#error  "FS_CFG_MAX_DEV_DRV_NAME_LEN        illegally #define'd in 'fs_cfg.h'               "
+#error  "                                   [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_DEV_DRV_NAME_LEN > FS_FILE_NAME_LEN_MAX)
+#error  "FS_CFG_MAX_DEV_DRV_NAME_LEN        illegally #define'd in 'fs_cfg.h'               "
+#error  "                                   [MUST be  >= 1]                                 "
+#endif
+
+
+                                                                /* -------------- FS_CFG_MAX_DEV_NAME_LEN ------------- */
+#ifndef  FS_CFG_MAX_DEV_NAME_LEN
+#error  "FS_CFG_MAX_DEV_NAME_LEN                      not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_DEV_NAME_LEN < 1u)
+#error  "FS_CFG_MAX_DEV_NAME_LEN                illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_DEV_NAME_LEN < FS_CFG_MAX_DEV_DRV_NAME_LEN + 3u)
+#error  "FS_CFG_MAX_DEV_NAME_LEN                illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= FS_CFG_MAX_DEV_DRV_NAME_LEN + 3]   "
+
+#elif   (FS_CFG_MAX_DEV_NAME_LEN > FS_CFG_MAX_DEV_DRV_NAME_LEN + 5u)
+#error  "FS_CFG_MAX_DEV_NAME_LEN                illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  <= FS_CFG_MAX_DEV_DRV_NAME_LEN + 5]   "
+
+#elif   (FS_CFG_MAX_DEV_NAME_LEN > FS_FILE_NAME_LEN_MAX)
+#error  "FS_CFG_MAX_DEV_NAME_LEN                illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+#endif
+
+
+                                                                /* -------------- FS_CFG_MAX_VOL_NAME_LEN ------------- */
+#ifndef  FS_CFG_MAX_VOL_NAME_LEN
+#error  "FS_CFG_MAX_VOL_NAME_LEN                      not #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_VOL_NAME_LEN < 1u)
+#error  "FS_CFG_MAX_VOL_NAME_LEN                illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+
+#elif   (FS_CFG_MAX_VOL_NAME_LEN > FS_FILE_NAME_LEN_MAX)
+#error  "FS_CFG_MAX_VOL_NAME_LEN                illegally #define'd in 'fs_cfg.h'               "
+#error  "                                       [MUST be  >= 1]                                 "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_unicode.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_unicode.h
new file mode 100644
index 0000000..8051025
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_unicode.h
@@ -0,0 +1,260 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      UNICODE STRING MANAGEMENT
+*
+* Filename      : fs_unicode.h
+* Version       : v4.07.00
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_UNICODE_H
+#define  FS_UNICODE_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "fs_cfg_fs.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_UNICODE_MODULE
+#define  FS_UNICODE_EXT
+#else
+#define  FS_UNICODE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifndef  FS_UNICODE_CFG_WCHAR_SIZE
+#define  FS_UNICODE_CFG_WCHAR_SIZE                        16
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  MB_MAX_LEN                                        4u
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+#if   (FS_UNICODE_CFG_WCHAR_SIZE == 16)
+typedef  CPU_INT16U  CPU_WCHAR;
+#elif (FS_UNICODE_CFG_WCHAR_SIZE == 32)
+typedef  CPU_INT32U  CPU_WCHAR;
+#else
+#error  "FS_UNICODE_CFG_WCHAR_SIZE  illegally #define'd in 'app_cfg.h'"
+#error  "                           [MUST be  16]                     "
+#error  "                           [     ||  32]                     "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T    WC_StrLen            (CPU_WCHAR    *pstr);
+
+CPU_SIZE_T    WC_StrLen_N          (CPU_WCHAR     *pstr,
+                                    CPU_SIZE_T     len_max);
+
+
+                                                                        /* -------------- STR COPY FNCTS -------------- */
+CPU_WCHAR    *WC_StrCopy           (CPU_WCHAR    *pdest,
+                                    CPU_WCHAR    *psrc);
+
+CPU_WCHAR    *WC_StrCopy_N         (CPU_WCHAR    *pdest,
+                                    CPU_WCHAR    *psrc,
+                                    CPU_SIZE_T    len_max);
+
+
+CPU_WCHAR    *WC_StrCat            (CPU_WCHAR    *pdest,
+                                    CPU_WCHAR    *pstr_cat);
+
+CPU_WCHAR    *WC_StrCat_N          (CPU_WCHAR    *pdest,
+                                    CPU_WCHAR    *pstr_cat,
+                                    CPU_SIZE_T    len_max);
+
+
+                                                                        /* -------------- STR CMP  FNCTS -------------- */
+CPU_INT32S    WC_StrCmp            (CPU_WCHAR    *p1_str,
+                                    CPU_WCHAR    *p2_str);
+
+CPU_INT32S    WC_StrCmp_N          (CPU_WCHAR    *p1_str,
+                                    CPU_WCHAR    *p2_str,
+                                    CPU_SIZE_T    len_max);
+
+CPU_INT32S    WC_StrCmpIgnoreCase  (CPU_WCHAR    *p1_str,
+                                    CPU_WCHAR    *p2_str);
+
+CPU_INT32S    WC_StrCmpIgnoreCase_N(CPU_WCHAR    *p1_str,
+                                    CPU_WCHAR    *p2_str,
+                                    CPU_SIZE_T    len_max);
+
+
+                                                                        /* -------------- STR SRCH FNCTS -------------- */
+CPU_WCHAR    *WC_StrChar           (CPU_WCHAR    *pstr,
+                                    CPU_WCHAR     srch_char);
+
+CPU_WCHAR    *WC_StrChar_N         (CPU_WCHAR    *pstr,
+                                    CPU_SIZE_T    len_max,
+                                    CPU_WCHAR     srch_char);
+
+CPU_WCHAR    *WC_StrChar_Last      (CPU_WCHAR    *pstr,
+                                    CPU_WCHAR     srch_char);
+
+CPU_WCHAR    *WC_StrChar_Last_N    (CPU_WCHAR    *pstr,
+                                    CPU_WCHAR     srch_char,
+                                    CPU_SIZE_T    len_max);
+
+
+CPU_WCHAR    *WC_StrStr            (CPU_WCHAR    *pstr,
+                                    CPU_WCHAR    *psrch_str);
+
+CPU_WCHAR    *WC_StrStr_N          (CPU_WCHAR    *pstr,
+                                    CPU_WCHAR    *psrch_str,
+                                    CPU_SIZE_T    len_max);
+
+                                                                        /* ------ CHARACTER CLASSIFICATION FNCTS ------ */
+CPU_BOOLEAN   WC_CharIsAlpha       (CPU_WCHAR     c);
+
+CPU_BOOLEAN   WC_CharIsAlphaNum    (CPU_WCHAR     c);
+
+CPU_BOOLEAN   WC_CharIsLower       (CPU_WCHAR     c);
+
+CPU_BOOLEAN   WC_CharIsUpper       (CPU_WCHAR     c);
+
+CPU_BOOLEAN   WC_CharIsDig         (CPU_WCHAR     c);
+
+CPU_BOOLEAN   WC_CharIsDigOct      (CPU_WCHAR     c);
+
+CPU_BOOLEAN   WC_CharIsDigHex      (CPU_WCHAR     c);
+
+CPU_BOOLEAN   WC_CharIsSpace       (CPU_WCHAR     c);
+
+
+                                                                        /* ------------ CASE MAPPING FNCTS ------------ */
+CPU_WCHAR     WC_CharToLower       (CPU_WCHAR     c);
+
+CPU_WCHAR     WC_CharToUpper       (CPU_WCHAR     c);
+
+CPU_WCHAR     WC_CharToCasefold    (CPU_WCHAR     c);
+
+
+                                                                        /* ------------- CONVERSION FNCTS ------------- */
+CPU_SIZE_T    WC_CharToMB          (CPU_CHAR     *pc_dest,
+                                    CPU_WCHAR     c_src);
+
+CPU_SIZE_T    MB_CharToWC          (CPU_WCHAR    *pc_dest,
+                                    CPU_CHAR     *pc_src,
+                                    CPU_SIZE_T    n);
+
+CPU_SIZE_T    MB_CharLen           (CPU_CHAR     *pc,
+                                    CPU_SIZE_T    n);
+
+
+CPU_SIZE_T    WC_StrToMB           (CPU_CHAR     *pdest,
+                                    CPU_WCHAR   **ppsrc,
+                                    CPU_SIZE_T    len_max);
+
+CPU_SIZE_T    MB_StrToWC           (CPU_WCHAR    *pdest,
+                                    CPU_CHAR    **ppsrc,
+                                    CPU_SIZE_T    len_max);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  FS_UNICODE_CFG_WCHAR_SIZE
+#error  "FS_UNICODE_CFG_WCHAR_SIZE        not #define'd in 'app_cfg.h'"
+#error  "                           [MUST be  16]                     "
+#error  "                           [     ||  32]                     "
+
+#elif  ((FS_UNICODE_CFG_WCHAR_SIZE != 16) && \
+        (FS_UNICODE_CFG_WCHAR_SIZE != 32 ))
+#error  "FS_UNICODE_CFG_WCHAR_SIZE  illegally #define'd in 'app_cfg.h'"
+#error  "                           [MUST be  16]                     "
+#error  "                           [     ||  32]                     "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_util.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_util.h
new file mode 100644
index 0000000..5a7f758
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_util.h
@@ -0,0 +1,342 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  FILE SYSTEM SUITE UTILITY LIBRARY
+*
+* Filename      : fs_util.h
+* Version       : v4.07.00
+* Programmer(s) : EJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_UTIL_H
+#define  FS_UTIL_H
+
+
+/*
+*********************************************************************************************************
+*                                          INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "fs.h"
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_UTIL_MODULE
+#define  FS_UTIL_EXT
+#else
+#define  FS_UTIL_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   POWER-2 MULTIPLY/DIVIDE MACRO'S
+*
+* Note(s) : (1) Multiplications & divisions by powers of 2 are common within the file system suite.
+*               If the power-of-2 multiplication or divisor is a constant, a compiler can optimize the
+*               calculation (typically encoding it as a logical shift).  However, many of the powers-of-2
+*               multiplicands & divisors are known only at run-time, so the integer multiplications &
+*               divisions lose important information that could have been used for optimization.
+*
+*               Multiplications & divisions by powers of 2 within this file system suite are performed
+*               with macros 'FS_UTIL_MULT_PWR2' & 'FS_UTIL_DIV_PWR2', using left & right shifts.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         FS_UTIL_MULT_PWR2()
+*
+* Description : Multiple integer by a power of 2.
+*
+* Argument(s) : nbr         First multiplicand.
+*
+*               pwr         Power of second multiplicand.
+*
+* Return(s)   : Product = nbr * 2^pwr.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) As stated in ISO/IEC 9899:TCP 6.5.8(4) :
+*
+*                      "The result of E1 << E2 is E1 left-shifted E2 bit-positions; vacated bits are
+*                       filled with zeros.  If E1 has an unsigned type, the value of the result is E1 x
+*                       2^E2, reduces modulo one more than the maximum value representable in the result
+*                       type."
+*
+*                   Even with conforming compilers, this macro MAY ONLY be used with unsigned operands.
+*                   Results with signed operands are undefined.
+*
+*               (2) With a non-conforming compiler, this macro should be commented out & redefined.
+*********************************************************************************************************
+*/
+
+#define  FS_UTIL_MULT_PWR2(nbr, pwr)                ((nbr) << (pwr))
+
+
+/*
+*********************************************************************************************************
+*                                         FS_UTIL_DIV_PWR2()
+*
+* Description : Divide integer by a power of 2.
+*
+* Argument(s) : nbr         Dividend.
+*
+*               pwr         Power of divisor.
+*
+* Return(s)   : Quotient = nbr / 2^pwr.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) As stated in ISO/IEC 9899:TCP 6.5.8(5) :
+*
+*                      "The result of E1 >> E2 is E1 right-shifted E2 bit-positions.  If E1 has an
+*                       unsigned type ..., the value of the result is the integral part of the quotient
+*                       of E1 / 2^E2."
+*
+*                   Even with conforming compilers, this macro MAY ONLY be used with unsigned operands.
+*                   Results with signed operands are undefined.
+*
+*               (2) With a non-conforming compiler, this macro should be commented out & redefined.
+*********************************************************************************************************
+*/
+
+#define  FS_UTIL_DIV_PWR2(nbr, pwr)                 ((nbr) >> (pwr))
+
+
+/*
+*********************************************************************************************************
+*                                          FS_UTIL_IS_PWR2()
+*
+* Description : Determine whether unsigned integer is a power of 2 or not.
+*
+* Argument(s) : nbr         Unsigned integer.
+*
+* Return(s)   : DEF_YES, if integer is     a power of 2.
+*               DEF_NO,  if integer is not a power of 2.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none
+*********************************************************************************************************
+*/
+
+#define  FS_UTIL_IS_PWR2(nbr)                     ((((nbr) != 0u) && (((nbr) & ((nbr) - 1u)) == 0u)) ? DEF_YES : DEF_NO)
+
+
+/*
+*********************************************************************************************************
+*                                          FS_UTIL_IS_ODD()
+*
+* Description : Determine whether unsigned integer is odd.
+*
+* Argument(s) : nbr         Unsigned integer.
+*
+* Return(s)   : DEF_YES, if integer is odd.
+*               DEF_NO,  if integer is even.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none
+*********************************************************************************************************
+*/
+
+#define  FS_UTIL_IS_ODD(nbr)                        (DEF_BIT_IS_SET((nbr), DEF_BIT_00))
+
+
+/*
+*********************************************************************************************************
+*                                          FS_UTIL_IS_EVEN()
+*
+* Description : Determine whether unsigned integer is even.
+*
+* Argument(s) : nbr         Unsigned integer.
+*
+* Return(s)   : DEF_YES, if integer is even.
+*               DEF_NO,  if integer is odd.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none
+*********************************************************************************************************
+*/
+
+#define  FS_UTIL_IS_EVEN(nbr)                       (DEF_BIT_IS_CLR((nbr), DEF_BIT_00))
+
+
+/*
+*********************************************************************************************************
+*                                   BIT/OCTET MANIPULATION MACRO'S
+*
+* Note(s) : (1) These macros allow to perform mutliple conversions between bits and octets, either at
+*               runtime or compile time.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     FS_UTIL_BIT_NBR_TO_OCTET_NBR()
+*
+* Description : Convert a number of required bits (generally for a bitmap) into a number of required
+*               octets.
+*
+* Argument(s) : bit_nbr     Number of required bits.
+*
+* Return(s)   : The lowest number of octets that contains at least bit_nbr bits.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none
+*********************************************************************************************************
+*/
+
+#define  FS_UTIL_BIT_NBR_TO_OCTET_NBR(bit_nbr)                ( ((bit_nbr) >> DEF_OCTET_TO_BIT_SHIFT) + \
+                                                               (((bit_nbr) &  DEF_OCTET_TO_BIT_MASK) == 0u ? 0u : 1u))
+
+
+/*
+*********************************************************************************************************
+*                                      FS_UTIL_BITMAP_LOC_GET()
+*
+* Description : Convert the position of a bit in a bitmap to the equivalent location of an octet in
+*               this bitmap, and the location of the bit in this octet.
+*
+* Argument(s) : bit_pos     Position of the bit in the bitmap/array.
+*
+*               octet_loc   Location of the octet in the bitmap/array.
+*
+*               bit_loc     Location of the bit in the octet.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) Care must be taken not to use the same variable for 'bit_pos' and 'bit_loc', because
+*                   it is modified before being used for the calculation of 'octet_loc'.
+*********************************************************************************************************
+*/
+
+#define  FS_UTIL_BITMAP_LOC_GET(bit_pos, octet_loc, bit_loc)    do {                                                    \
+                                                                    (bit_loc)   = (bit_pos)  & DEF_OCTET_TO_BIT_MASK;   \
+                                                                    (octet_loc) = (bit_pos) >> DEF_OCTET_TO_BIT_SHIFT;  \
+                                                                } while (0)
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_INT08U   FSUtil_Log2              (CPU_INT32U  val);            /* Calculate base-2 logarithm of integer.           */
+
+void         FSUtil_ValPack32         (CPU_INT08U  *p_dest,         /* Pack val in array using specified nbr of bits.   */
+                                       CPU_SIZE_T  *p_offset_octet,
+                                       CPU_INT08U  *p_offset_bit,
+                                       CPU_INT32U   val,
+                                       CPU_DATA     nbr_bits);
+
+CPU_INT32U   FSUtil_ValUnpack32       (CPU_INT08U  *p_src,          /* Unpack val from array.                           */
+                                       CPU_SIZE_T  *p_offset_octet,
+                                       CPU_DATA    *p_offset_bit,
+                                       CPU_DATA     nbr_bits);
+
+CPU_BOOLEAN  FSUtil_MapBitIsSet       (CPU_INT08U  *p_bitmap,       /* Determine if specified bit is set in bitmap.     */
+                                       CPU_SIZE_T   offset_bit);
+
+void         FSUtil_MapBitSet         (CPU_INT08U  *p_bitmap,       /* Set specified bit in bitmap.                     */
+                                       CPU_SIZE_T   offset_bit);
+
+void         FSUtil_MapBitClr         (CPU_INT08U  *p_bitmap,       /* Clr specified bit in bitmap.                     */
+                                       CPU_SIZE_T   offset_bit);
+
+void        *FSUtil_ModuleDataGet     (CPU_SIZE_T    data_size,     /* Allocate module data.                            */
+                                       void        **pp_data_head,
+                                       FS_ERR       *p_err);
+
+void         FSUtil_ModuleDataFree    (void         *p_data,        /* Free module data.                                */
+                                       CPU_SIZE_T    data_size,
+                                       void        **pp_data_head,
+                                       FS_ERR       *p_err);
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_vol.h b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_vol.h
new file mode 100644
index 0000000..6b66784
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-FS/Source/fs_vol.h
@@ -0,0 +1,394 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/FS is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 FILE SYSTEM SUITE VOLUME MANAGEMENT
+*
+* Filename      : fs_vol.h
+* Version       : v4.07.00
+* Programmer(s) : AHFAI
+*                 FBJ
+*                 BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  FS_VOL_H
+#define  FS_VOL_H
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   FS_VOL_MODULE
+#define  FS_VOL_EXT
+#else
+#define  FS_VOL_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "fs_cfg_fs.h"
+#include  "fs_err.h"
+#include  "fs_ctr.h"
+#include  "fs_type.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        VOLUME STATE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_VOL_STATE_CLOSED                               0u   /* Volume closed.                                       */
+#define  FS_VOL_STATE_CLOSING                              1u   /* Volume closing.                                      */
+#define  FS_VOL_STATE_OPENING                              2u   /* Volume opening.                                      */
+#define  FS_VOL_STATE_OPEN                                 3u   /* Volume open.                                         */
+#define  FS_VOL_STATE_PRESENT                              4u   /* Volume device present.                               */
+#define  FS_VOL_STATE_MOUNTED                              5u   /* Volume mounted.                                      */
+
+/*
+*********************************************************************************************************
+*                                     VOLUME ACCESS MODE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_VOL_ACCESS_MODE_NONE                 DEF_BIT_NONE
+#define  FS_VOL_ACCESS_MODE_RD                   DEF_BIT_00     /* Readable.                                            */
+#define  FS_VOL_ACCESS_MODE_WR                   DEF_BIT_01     /* Writeable.                                           */
+#define  FS_VOL_ACCESS_MODE_RDWR                (FS_FILE_ACCESS_MODE_RD | FS_FILE_ACCESS_MODE_WR)
+
+/*
+*********************************************************************************************************
+*                                     VOLUME SECTOR TYPE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_VOL_SEC_TYPE_UNKNOWN                 DEF_BIT_NONE
+#define  FS_VOL_SEC_TYPE_MGMT                    DEF_BIT_00
+#define  FS_VOL_SEC_TYPE_DIR                     DEF_BIT_01
+#define  FS_VOL_SEC_TYPE_FILE                    DEF_BIT_02
+
+/*
+*********************************************************************************************************
+*                                      VOLUME CACHE MODE DEFINES
+*********************************************************************************************************
+*/
+
+#define  FS_VOL_CACHE_MODE_NONE                            0u
+#define  FS_VOL_CACHE_MODE_RD                              1u
+#define  FS_VOL_CACHE_MODE_WR_THROUGH                      2u
+#define  FS_VOL_CACHE_MODE_WR_BACK                         3u
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          VOLUME DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  fs_vol {
+    FS_STATE           State;                                   /* State.                                               */
+    FS_CTR             RefCnt;                                  /* Ref cnts.                                            */
+    FS_CTR             RefreshCnt;                              /* Refresh cnts.                                        */
+
+    FS_FLAGS           AccessMode;                              /* Access mode.                                         */
+    CPU_CHAR           Name[FS_CFG_MAX_VOL_NAME_LEN + 1u];      /* Vol name.                                            */
+    FS_PARTITION_NBR   PartitionNbr;                            /* Partition nbr.                                       */
+    FS_SEC_NBR         PartitionStart;                          /* Partition start sec.                                 */
+    FS_SEC_QTY         PartitionSize;                           /* Partition size (in sec's).                           */
+    FS_SEC_SIZE        SecSize;                                 /* Size of a sec, in octets.                            */
+
+    FS_QTY             FileCnt;                                 /* Nbr of open files on this vol.                       */
+#ifdef FS_DIR_MODULE_PRESENT
+    FS_QTY             DirCnt;                                  /* Nbr of open dirs  on this vol.                       */
+#endif
+    FS_DEV            *DevPtr;                                  /* Ptr to dev for this vol.                             */
+    void              *DataPtr;                                 /* Ptr to data specific for a file system driver.       */
+#ifdef FS_CACHE_MODULE_PRESENT
+    FS_VOL_CACHE_API  *CacheAPI_Ptr;                            /* Ptr to cache API for this vol.                       */
+    void              *CacheDataPtr;                            /* Ptr to data specific for a cache.                    */
+#endif
+
+#if (FS_CFG_CTR_STAT_EN == DEF_ENABLED)
+    FS_CTR             StatRdSecCtr;                            /* Nbr rd secs.                                         */
+    FS_CTR             StatWrSecCtr;                            /* Nbr wr secs.                                         */
+#endif
+};
+
+
+/*
+*********************************************************************************************************
+*                                        VOLUME INFO DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  fs_vol_info {
+    FS_STATE           State;                                   /* Volume state.                                        */
+    FS_STATE           DevState;                                /* Device state.                                        */
+    FS_SEC_QTY         DevSize;                                 /* Number of sectors on dev.                            */
+    FS_SEC_SIZE        DevSecSize;                              /* Sector size of dev.                                  */
+    FS_SEC_QTY         PartitionSize;                           /* Number of sectors in partition.                      */
+    FS_SEC_QTY         VolBadSecCnt;                            /* Number of bad   data sectors on vol.                 */
+    FS_SEC_QTY         VolFreeSecCnt;                           /* Number of free  data sectors on vol.                 */
+    FS_SEC_QTY         VolUsedSecCnt;                           /* Number of used  data sectors on vol.                 */
+    FS_SEC_QTY         VolTotSecCnt;                            /* Number of total data sectors on vol.                 */
+} FS_VOL_INFO;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#ifdef FS_CACHE_MODULE_PRESENT
+void          FSVol_CacheAssign    (CPU_CHAR          *name_vol,    /* Assign cache to a volume.                        */
+                                    FS_VOL_CACHE_API  *p_cache_api,
+                                    void              *p_cache_data,
+                                    CPU_INT32U         size,
+                                    CPU_INT08U         pct_mgmt,
+                                    CPU_INT08U         pct_dir,
+                                    FS_FLAGS           mode,
+                                    FS_ERR            *p_err);
+
+void          FSVol_CacheInvalidate(CPU_CHAR          *name_vol,    /* Invalidate cache on a volume.                         */
+                                    FS_ERR            *p_err);
+
+void          FSVol_CacheFlush     (CPU_CHAR          *name_vol,    /* Flush cache on a volume.                         */
+                                    FS_ERR            *p_err);
+#endif
+
+void          FSVol_Close          (CPU_CHAR          *name_vol,    /* Close (unmount) a volume.                        */
+                                    FS_ERR            *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void          FSVol_Fmt            (CPU_CHAR          *name_vol,    /* Format a volume.                                 */
+                                    void              *p_fs_cfg,
+                                    FS_ERR            *p_err);
+#endif
+
+CPU_BOOLEAN   FSVol_IsMounted      (CPU_CHAR          *name_vol);   /* Determine whether a volume is mounted.           */
+
+void          FSVol_LabelGet       (CPU_CHAR          *name_vol,    /* Get volume label.                                */
+                                    CPU_CHAR          *label,
+                                    CPU_SIZE_T         len_max,
+                                    FS_ERR            *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void          FSVol_LabelSet       (CPU_CHAR          *name_vol,    /* Set volume label.                                */
+                                    CPU_CHAR          *label,
+                                    FS_ERR            *p_err);
+#endif
+
+void          FSVol_Open           (CPU_CHAR          *name_vol,    /* Open (mount) a volume.                           */
+                                    CPU_CHAR          *name_dev,
+                                    FS_PARTITION_NBR   partition_nbr,
+                                    FS_ERR            *p_err);
+
+void          FSVol_Query          (CPU_CHAR          *name_vol,    /* Obtain information about a volume.               */
+                                    FS_VOL_INFO       *p_info,
+                                    FS_ERR            *p_err);
+
+void          FSVol_Rd             (CPU_CHAR          *name_vol,    /* Read data from volume sector(s).                 */
+                                    void              *p_dest,
+                                    FS_SEC_NBR         start,
+                                    FS_SEC_QTY         cnt,
+                                    FS_ERR            *p_err);
+
+CPU_BOOLEAN   FSVol_Refresh        (CPU_CHAR          *name_vol,    /* Refresh volume.                                  */
+                                    FS_ERR            *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void          FSVol_Wr             (CPU_CHAR          *name_vol,    /* Write data to volume sector(s).                  */
+                                    void              *p_src,
+                                    FS_SEC_NBR         start,
+                                    FS_SEC_QTY         cnt,
+                                    FS_ERR            *p_err);
+#endif
+
+/*
+*********************************************************************************************************
+*                                   MANAGEMENT FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+FS_QTY        FSVol_GetVolCnt      (void);                          /* Get number of open volumes.                      */
+
+FS_QTY        FSVol_GetVolCntMax   (void);                          /* Get maximum possible number of open volumes.     */
+
+void          FSVol_GetVolName     (FS_QTY             vol_nbr,     /* Get name of nth open volume.                     */
+                                    CPU_CHAR          *name_vol,
+                                    FS_ERR            *p_err);
+
+void          FSVol_GetDfltVolName (CPU_CHAR          *name_vol,    /* Get name of default volume.                      */
+                                    FS_ERR            *p_err);
+
+CPU_BOOLEAN   FSVol_IsDflt         (CPU_CHAR          *name_vol,    /* Determine whether volume is default volume.      */
+                                    FS_ERR            *p_err);
+
+/*
+*********************************************************************************************************
+*                                    INTERNAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                    /* ---------------- INITIALIZATION ---------------- */
+void          FSVol_ModuleInit     (FS_QTY             vol_cnt,     /* Initialize volume module.                        */
+                                    FS_ERR            *p_err);
+
+
+                                                                    /* ---------------- ACCESS CONTROL ---------------- */
+FS_VOL       *FSVol_AcquireLockChk (CPU_CHAR          *name_vol,    /* Acquire volume reference & lock.                 */
+                                    CPU_BOOLEAN        mounted,
+                                    FS_ERR            *p_err);
+
+FS_VOL       *FSVol_Acquire        (CPU_CHAR          *name_vol,    /* Acquire volume reference.                        */
+                                    FS_ERR            *p_err);
+
+FS_VOL       *FSVol_AcquireDflt    (void);                          /* Acquire default volume reference.                */
+
+void          FSVol_Release        (FS_VOL            *p_vol);      /* Release volume reference.                        */
+
+void          FSVol_ReleaseUnlock  (FS_VOL            *p_vol);      /* Release volume reference & lock.                 */
+
+CPU_BOOLEAN   FSVol_Lock           (FS_VOL            *p_vol);      /* Acquire volume lock.                             */
+
+void          FSVol_Unlock         (FS_VOL            *p_vol);      /* Release volume lock.                             */
+
+
+                                                                    /* ----------------- REGISTRATION ----------------- */
+#ifdef FS_DIR_MODULE_PRESENT
+void          FSVol_DirAdd         (FS_VOL            *p_vol,        /* Add directory to open directory list.            */
+                                   FS_DIR            *p_dir);
+
+void          FSVol_DirRemove      (FS_VOL            *p_vol,        /* Remove directory from open directory list.       */
+                                    FS_DIR            *p_dir);
+#endif
+
+void          FSVol_FileAdd        (FS_VOL            *p_vol,        /* Add file to open file list.                      */
+                                    FS_FILE           *p_file);
+
+void          FSVol_FileRemove     (FS_VOL            *p_vol,        /* Remove file from open file list.                 */
+                                    FS_FILE           *p_file);
+
+
+                                                                    /* ----------------- LOCKED ACCESS ---------------- */
+void          FSVol_RdLocked       (FS_VOL            *p_vol,       /* Read data from volume sector(s).                 */
+                                    void              *p_dest,
+                                    FS_SEC_NBR         start,
+                                    FS_SEC_QTY         cnt,
+                                    FS_ERR            *p_err);
+
+void          FSVol_RdLockedEx     (FS_VOL            *p_vol,       /* Read data from volume sector(s).                 */
+                                    void              *p_dest,
+                                    FS_SEC_NBR         start,
+                                    FS_SEC_QTY         cnt,
+                                    FS_FLAGS           sec_type,
+                                    FS_ERR            *p_err);
+
+CPU_BOOLEAN   FSVol_RefreshLocked  (FS_VOL            *p_vol,       /* Refresh volume.                                  */
+                                    FS_ERR            *p_err);
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void          FSVol_ReleaseLocked  (FS_VOL            *p_vol,       /* Release volume sector(s).                        */
+                                    FS_SEC_NBR         start,
+                                    FS_SEC_QTY         cnt,
+                                    FS_ERR            *p_err);
+#endif
+
+#if (FS_CFG_RD_ONLY_EN == DEF_DISABLED)
+void          FSVol_WrLocked       (FS_VOL            *p_vol,       /* Write data to volume sector(s).                  */
+                                    void              *p_src,
+                                    FS_SEC_NBR         start,
+                                    FS_SEC_QTY         cnt,
+                                    FS_ERR            *p_err);
+
+void          FSVol_WrLockedEx     (FS_VOL            *p_vol,       /* Write data to volume sector(s).                  */
+                                    void              *p_src,
+                                    FS_SEC_NBR         start,
+                                    FS_SEC_QTY         cnt,
+                                    FS_FLAGS           sec_type,
+                                    FS_ERR            *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/2lemetry.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/2lemetry.c
new file mode 100644
index 0000000..63f1b92
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/2lemetry.c
@@ -0,0 +1,1189 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT 2LEMETRY APPLICATION SOURCE CODE
+*
+* Filename      : 2lemetry.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       :
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define  MICRIUM_SOURCE
+#define  TWOLEMETRY_MODULE
+
+
+#include  
+
+#include  
+#include  
+#include  
+
+#include  "2lemetry.h"
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef struct twolemetry_conn {
+        TWOLEMETRY_RX_DATA  RxDataFnct;
+        void               *UserCtxPtr;
+}TWOLEMETRY_CONN;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+static  CPU_BOOLEAN Twolemetry_ReqSend                (CPU_CHAR                   *p_url,
+                                                       HTTP_METHOD                 method,
+                                                       HTTPc_CONN_OBJ             *p_conn,
+                                                       HTTPc_REQ_OBJ              *p_req,
+                                                       CPU_CHAR                   *p_credentials);
+#if 0
+static  CPU_INT08U  Twolemetry_ReqPrepareQueryStr     (HTTPc_KEY_VAL             **p_tbl,
+                                                       CPU_CHAR                   *p_client_id,
+                                                       CPU_CHAR                   *p_topic,
+                                                       CPU_CHAR                   *p_qos);
+
+static  CPU_INT08U  Twolemetry_ReqPrepareQueryStr_SMS (HTTPc_KEY_VAL             **p_tbl,
+                                                       CPU_CHAR                   *p_message,
+                                                       CPU_CHAR                   *p_to_phone_number,
+                                                       CPU_CHAR                   *p_topic);
+#endif
+static  void        Twolemetry_RespBodyHook           (HTTPc_CONN_OBJ             *p_conn,
+                                                       HTTPc_REQ_OBJ              *p_req,
+                                                       HTTP_CONTENT_TYPE           content_type,
+                                                       void                       *p_data,
+                                                       CPU_INT16U                  data_len,
+                                                       CPU_BOOLEAN                 last_chunk);
+
+static  CPU_BOOLEAN Twolemetry_Buf_ReqBodyHook        (HTTPc_CONN_OBJ             *p_conn,
+                                                       HTTPc_REQ_OBJ              *p_req,
+                                                       void                      **p_data,
+                                                       CPU_CHAR                   *p_buf,
+                                                       CPU_INT16U                  buf_len,
+                                                       CPU_INT16U                 *p_data_len);
+
+#ifdef HTTPc_TASK_MODULE_EN
+
+static  void        Twolemetry_ConnCloseCallback      (HTTPc_CONN_OBJ             *p_conn,
+                                                       HTTPc_CONN_CLOSE_STATUS     close_status,
+                                                       HTTPc_ERR                   err);
+
+static  void        Twolemetry_TransErrCallback       (HTTPc_CONN_OBJ             *p_conn,
+                                                       HTTPc_REQ_OBJ              *p_req,
+                                                       HTTPc_ERR                   err_code);
+
+static  void        Twolemetry_ConnSecureCallback     (HTTPc_CONN_OBJ             *p_conn,
+                                                       HTTPc_REQ_OBJ              *p_req,
+                                                       HTTPc_ERR                   err_code);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         Twolemetry_Publish()
+*
+* Description : Publish MQTT message on selected Topic
+*
+* Argument(s) : p_client_id     Pointer to the MQTT client ID
+*
+*               p_topic         Pointer on Topic to publish the MQTT message
+*
+*                               If DEF_NULL, default value is : {domain}/{stuff}/{thing}
+*
+*               p_payload       Pointer to JSON formatted MQTT message to publish
+*
+*               p_qos           Quality of service (values from 0 to 3)
+*
+*                               If DEF_NULL, default value is 0
+*
+*               p_credentials   Pointer to Twolemetry credentials ( Key (Username) : Secret(Password) )
+*
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN Twolemetry_Publish (CPU_CHAR    *p_client_id,
+                                CPU_CHAR    *p_topic,
+                                CPU_CHAR    *p_payload,
+                                CPU_CHAR    *p_qos,
+                                CPU_CHAR    *p_credentials)
+
+{
+    CPU_CHAR               url[TWOLEMETRY_URL_LEN_MAX];
+    HTTPc_CONN_OBJ         http_conn;
+    HTTPc_REQ_OBJ          http_req;
+    HTTPc_ERR              err;
+    CPU_BOOLEAN            success;
+    HTTP_CONTENT_TYPE      content_type;
+    CPU_SIZE_T             content_len;
+#if 0
+    HTTPc_PARAM_TBL        tbl_obj;
+    HTTPc_KEY_VAL         *p_query_str_tbl;
+    CPU_INT08U             query_nbr;
+#endif
+
+    Mem_Clr(url, TWOLEMETRY_URL_LEN_MAX);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+
+
+    Str_Copy_N(&url[0], TWOLEMETRY_URL_MESSAGES , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N( &url[0], "?clientid="            , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N( &url[0], p_client_id              , TWOLEMETRY_URL_LEN_MAX);
+    if (p_topic != DEF_NULL) {
+        Str_Cat_N( &url[0], "&topic="           , TWOLEMETRY_URL_LEN_MAX);
+        Str_Cat_N( &url[0], p_topic             , TWOLEMETRY_URL_LEN_MAX);
+    }
+    if (p_qos != DEF_NULL) {
+        Str_Cat_N( &url[0], "&qos="             , TWOLEMETRY_URL_LEN_MAX);
+        Str_Cat_N( &url[0], p_qos               , TWOLEMETRY_URL_LEN_MAX);
+    }
+
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    http_req.UserDataPtr = p_payload;
+#if 0
+
+                                                                /* -------------- SET STRING QUERY DATA --------------- */
+    query_nbr = Twolemetry_ReqPrepareQueryStr(&p_query_str_tbl,
+                                               p_client_id,
+                                               p_topic,
+                                               p_qos);
+    if (query_nbr <= 0) {
+        return (DEF_FAIL);
+    }
+
+                                                                  /* ------------ SET STRING QUERY PARAMETERS ----------- */
+    tbl_obj.EntryNbr = query_nbr;
+    tbl_obj.TblPtr   = (void *)p_query_str_tbl;
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_QUERY_STR_TBL,
+                      &tbl_obj,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+#endif                                               /* ----------- SET REQUEST BODY PARAMETERS ------------ */
+    content_type = HTTP_CONTENT_TYPE_JSON;
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE,
+                      &content_type,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    content_len = Str_Len(p_payload);
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_LEN,
+                      &content_len,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+    HTTPc_ReqSetParam(        &http_req,
+                               HTTPc_PARAM_TYPE_REQ_BODY_HOOK,
+                      (void *)&Twolemetry_Buf_ReqBodyHook,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    success = Twolemetry_ReqSend( url,
+                                  HTTP_METHOD_POST,
+                                 &http_conn,
+                                 &http_req,
+                                  p_credentials);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                         Twolemetry_GetData()
+*
+* Description : Get present data about a thing
+*
+* Argument(s) : p_domain        Pointer to domain of your application
+*
+*               p_stuff         Pointer to the group of your thing
+*
+*               p_thing         Pointer to the thing
+*
+*               p_whatever      Pointer to whatevers (see note #1)
+*
+*               p_credentials   Pointer to Twolemetry credentials ( Key (Username) : Secret(Password) )
+*
+*               fnct            Pointer to the user defined receive data function
+*
+*               p_ctx           Pointer to user context
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application
+*
+* Note(s)     : (1) Two or more values can be passed as comma separated. An '_' can be passed to retrieve all.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN Twolemetry_GetData       (CPU_CHAR             *p_domain,
+                                      CPU_CHAR             *p_stuff,
+                                      CPU_CHAR             *p_thing,
+                                      CPU_CHAR             *p_whatever,
+                                      CPU_CHAR             *p_credentials,
+                                      TWOLEMETRY_RX_DATA    fnct,
+                                      void                 *p_ctx)
+{
+    CPU_CHAR               url[TWOLEMETRY_URL_LEN_MAX];
+    HTTPc_CONN_OBJ         http_conn;
+    HTTPc_REQ_OBJ          http_req;
+    HTTPc_ERR              err;
+    CPU_BOOLEAN            success;
+    TWOLEMETRY_CONN        conn;
+
+
+    conn.RxDataFnct = fnct;
+    conn.UserCtxPtr = p_ctx;
+
+    Mem_Clr(url, TWOLEMETRY_URL_LEN_MAX);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+
+
+    Str_Copy_N(&url[0], TWOLEMETRY_URL_DOMAIN , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], p_domain              , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], "/stuff/"             , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], p_stuff               , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], "/thing/"             , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], p_thing               , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], "/present"            , TWOLEMETRY_URL_LEN_MAX);
+    if (p_whatever != DEF_NULL) {
+        Str_Cat_N (&url[0], "/?whatever="     , TWOLEMETRY_URL_LEN_MAX);
+        Str_Cat_N (&url[0], p_whatever        , TWOLEMETRY_URL_LEN_MAX);
+    }
+
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+    http_req.UserDataPtr = &conn;
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+
+    HTTPc_ReqSetParam(        &http_req,
+                               HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      (void *)&Twolemetry_RespBodyHook,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+    success = Twolemetry_ReqSend( url,
+                                  HTTP_METHOD_GET,
+                                 &http_conn,
+                                 &http_req,
+                                  p_credentials);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    return(DEF_OK);
+}
+/*
+*********************************************************************************************************
+*                                         Twolemetry_SendSMS()
+*
+* Description : Send a SMS message
+*
+* Argument(s) : p_message           Pointer to the body of the message to be sent
+*
+*               p_to_phone_number   Pointer to the destination phone number
+*
+*               p_topic             MQTT topic to publish the SMS result status
+*
+*                                   If DEF_NULL, no result status is published
+*
+*               p_domain            Pointer to domain of your application
+*
+*               p_credentials       Pointer to Twolemetry credentials ( Key (Username) : Secret(Password) )
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN Twolemetry_SendSMS (CPU_CHAR    *p_message,
+                                CPU_CHAR    *p_to_phone_number,
+                                CPU_CHAR    *p_topic,
+                                CPU_CHAR    *p_domain,
+                                CPU_CHAR    *p_credentials)
+{
+    CPU_CHAR               url[TWOLEMETRY_URL_LEN_MAX];
+    HTTPc_CONN_OBJ         http_conn;
+    HTTPc_REQ_OBJ          http_req;
+    HTTPc_ERR              err;
+    CPU_BOOLEAN            success;
+    CPU_CHAR               message[160];
+    CPU_SIZE_T             message_len;
+
+#if 0
+    HTTPc_PARAM_TBL        tbl_obj;
+    HTTPc_KEY_VAL         *p_query_str_tbl;
+    CPU_INT08U             query_nbr;
+#endif
+
+
+    Mem_Clr(url, TWOLEMETRY_URL_LEN_MAX);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+
+    message_len = Str_Len(p_message);
+    success = HTTP_URL_EncodeStr ( p_message,
+                                   message,
+                                  &message_len,
+                                   160);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    Str_Copy_N(&url[0], TWOLEMETRY_URL_DOMAIN , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], p_domain              , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], "/sms?message="       , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], message               , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], "&to="                , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], p_to_phone_number     , TWOLEMETRY_URL_LEN_MAX);
+    if (p_topic != DEF_NULL) {
+        Str_Cat_N (&url[0], "&topic="         , TWOLEMETRY_URL_LEN_MAX);
+        Str_Cat_N (&url[0], p_topic           , TWOLEMETRY_URL_LEN_MAX);
+    }
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#if 0
+                                                                /* -------------- SET STRING QUERY DATA --------------- */
+    query_nbr = Twolemetry_ReqPrepareQueryStr_SMS(&p_query_str_tbl,
+                                                   p_message,
+                                                   p_to_phone_number,
+                                                   p_topic);
+    if (query_nbr <= 0) {
+        return (DEF_FAIL);
+    }
+
+                                                                  /* ------------ SET STRING QUERY PARAMETERS ----------- */
+    tbl_obj.EntryNbr = query_nbr;
+    tbl_obj.TblPtr   = (void *)p_query_str_tbl;
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_QUERY_STR_TBL,
+                      &tbl_obj,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+    success = Twolemetry_ReqSend( url,
+                                  HTTP_METHOD_POST,
+                                 &http_conn,
+                                 &http_req,
+                                  p_credentials);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                       Twolemetry_PushStoreKey()
+*
+* Description : Save a Key-Value pair in store
+*
+* Argument(s) : p_domain        Pointer to domain of your application
+*
+*               p_key           Pointer to key (RowKey or ID)
+*
+*               p_kvp           Pointer to Key-Value pair to save
+*
+*               protect         Protected User Store
+*                               DEF_TRUE
+*                               DEF_FALSE
+*
+*               p_credentials   Pointer to Twolemetry credentials ( Key (Username) : Secret(Password) )
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN Twolemetry_PushStoreKey  (CPU_CHAR         *p_domain,
+                                      CPU_CHAR         *p_key,
+                                      CPU_CHAR         *p_kvp,
+                                      CPU_BOOLEAN       protect,
+                                      CPU_CHAR         *p_credentials)
+{
+    CPU_CHAR               url[TWOLEMETRY_URL_LEN_MAX];
+    HTTPc_CONN_OBJ         http_conn;
+    HTTPc_REQ_OBJ          http_req;
+    HTTPc_ERR              err;
+    CPU_BOOLEAN            success;
+    CPU_CHAR               prot_user_store[5];
+    CPU_CHAR               kvp[100];
+    CPU_SIZE_T             kvp_len;
+
+    Mem_Clr(url, TWOLEMETRY_URL_LEN_MAX);
+    Mem_Clr(kvp, 50);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+
+    if (protect == DEF_TRUE) {
+        Str_Copy(prot_user_store, "true");
+    } else {
+        Str_Copy(prot_user_store, "false");
+    }
+
+    kvp_len = Str_Len(p_kvp);
+    success = HTTP_URL_EncodeStr ( p_kvp,
+                                   kvp,
+                                  &kvp_len,
+                                   100);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    Str_Copy_N(&url[0], TWOLEMETRY_URL_DOMAIN , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], p_domain              , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], "/store/"             , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], p_key                 , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], "?protect="           , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], prot_user_store       , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], "&keyValue="          , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], kvp                   , TWOLEMETRY_URL_LEN_MAX);
+
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    success = Twolemetry_ReqSend( url,
+                                  HTTP_METHOD_POST,
+                                 &http_conn,
+                                 &http_req,
+                                  p_credentials);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+
+    return (DEF_OK);
+
+}
+
+/*
+*********************************************************************************************************
+*                                       Twolemetry_GetStoreKey()
+*
+* Description : Retrieve Key-Value pair from store
+*
+* Argument(s) : p_domain        Pointer to domain of your application
+*
+*               p_key           Pointer to key (RowKey or ID)
+*
+*               protect         Protected User Store
+*                               DEF_TRUE
+*                               DEF_FALSE
+*
+*               p_credentials   Pointer to Twolemetry credentials ( Key (Username) : Secret(Password) )
+*
+*               fnct            Pointer to the user defined receive data function
+*
+*               p_ctx           Pointer to user context
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : AppTaskStart().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN Twolemetry_GetStoreKey   (CPU_CHAR            *p_domain,
+                                      CPU_CHAR            *p_key,
+                                      CPU_BOOLEAN          protect,
+                                      CPU_CHAR            *p_credentials,
+                                      TWOLEMETRY_RX_DATA   fnct,
+                                      void                *p_ctx)
+{
+    CPU_CHAR               url[TWOLEMETRY_URL_LEN_MAX];
+    HTTPc_CONN_OBJ         http_conn;
+    HTTPc_REQ_OBJ          http_req;
+    HTTPc_ERR              err;
+    CPU_BOOLEAN            success;
+    CPU_CHAR               prot_user_store[5];
+    TWOLEMETRY_CONN        conn;
+
+
+    conn.RxDataFnct = fnct;
+    conn.UserCtxPtr = p_ctx;
+
+    Mem_Clr(url, TWOLEMETRY_URL_LEN_MAX);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+
+    if (protect == DEF_TRUE) {
+        Str_Copy(prot_user_store, "true");
+    } else {
+        Str_Copy(prot_user_store, "false");
+    }
+
+
+    Str_Copy_N(&url[0], TWOLEMETRY_URL_DOMAIN , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], p_domain              , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], "/store/"             , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], p_key                 , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], "?protect="           , TWOLEMETRY_URL_LEN_MAX);
+    Str_Cat_N (&url[0], prot_user_store       , TWOLEMETRY_URL_LEN_MAX);
+
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+    http_req.UserDataPtr = &conn;
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+
+    HTTPc_ReqSetParam(        &http_req,
+                               HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      (void *)&Twolemetry_RespBodyHook,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+    success = Twolemetry_ReqSend( url,
+                                  HTTP_METHOD_GET,
+                                 &http_conn,
+                                 &http_req,
+                                  p_credentials);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    return(DEF_OK);
+}
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         Twolemetry_ReqSend()
+*
+* Description : Send a request.
+*
+* Argument(s) : p_url           Pointer to complete URI (or only resource path) of the request.
+*
+*               method          HTTP method of the request.
+*
+*               p_conn          Pointer to valid HTTPc Connection on which request will occurred.
+*
+*               p_req           Pointer to request to send.
+*
+*               p_credentials   Pointer to Twolemetry credentials ( Key (Username) : Secret(Password) )
+*
+* Return(s)   : DEF_OK,   if HTTP transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Twolemetry_SendSMS()
+*
+*               Twolemetry_Publish()
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static CPU_BOOLEAN  Twolemetry_ReqSend (CPU_CHAR          *p_url,
+                                        HTTP_METHOD        method,
+                                        HTTPc_CONN_OBJ    *p_conn,
+                                        HTTPc_REQ_OBJ     *p_req,
+                                        CPU_CHAR          *p_credentials)
+{
+    HTTPc_HDR           hdr;
+    CPU_CHAR            hdr_val[TWOLEMETRY_CFG_HDR_VAL_LEN_MAX];
+    CPU_CHAR            buf[TWOLEMETRY_CFG_CONN_BUF_SIZE];
+    HTTPc_RESP_OBJ      http_resp;
+    HTTPc_PARAM_TBL     tbl_obj;
+    CPU_SIZE_T          str_len;
+    CPU_BOOLEAN         result;
+    HTTPc_ERR           err;
+    CPU_CHAR            credentials_b64[105];
+    NET_ERR             err_net;
+
+
+    NetUtil_Base64Encode (p_credentials,
+                          Str_Len(p_credentials),
+                          &credentials_b64[0],
+                          105,
+                          &err_net);
+    if (err_net != NET_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* Prepare the Authorization header                     */
+    Mem_Clr  (hdr_val, TWOLEMETRY_CFG_HDR_VAL_LEN_MAX);
+    Str_Cat_N(hdr_val, "Basic "           ,TWOLEMETRY_CFG_HDR_VAL_LEN_MAX);
+    Str_Cat_N(hdr_val, &credentials_b64[0],TWOLEMETRY_CFG_HDR_VAL_LEN_MAX);
+
+    hdr.ValPtr   = hdr_val;
+    hdr.ValLen   = Str_Len_N(hdr_val, TWOLEMETRY_CFG_HDR_VAL_LEN_MAX);
+    hdr.HdrField = HTTP_HDR_FIELD_AUTHORIZATION;
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(         p_conn,
+                                HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       (void *)&Twolemetry_ConnCloseCallback,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ConnSetParam(         p_conn,
+                                HTTPc_PARAM_TYPE_SECURE_TRUST_CALLBACK,
+                       (void *)&Twolemetry_ConnSecureCallback,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+
+
+                                                                /* ------------ SET REQ/HDR PARAM          ----------- */
+    tbl_obj.EntryNbr =  1;
+    tbl_obj.TblPtr   = &hdr;
+    HTTPc_ReqSetParam( p_req,
+                       HTTPc_PARAM_TYPE_REQ_HDR_TBL,
+                      &tbl_obj,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam(       p_req,
+                             HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                    (void *)&Twolemetry_TransErrCallback,
+                            &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(TWOLEMETRY_API_HOSTNAME);
+    result = HTTPc_ConnOpen(p_conn,
+                            buf,
+                            TWOLEMETRY_CFG_CONN_BUF_SIZE,
+                            TWOLEMETRY_API_HOSTNAME,
+                            str_len,
+                            HTTPc_FLAG_NONE,
+                           &err);
+    if (err != HTTPc_ERR_NONE ||
+        result != DEF_OK        ) {
+        return (DEF_FAIL);
+    }
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+
+    Mem_Clr(&http_resp, sizeof(http_resp));
+
+    str_len = Str_Len(p_url);
+    result = HTTPc_ReqSend(p_conn,
+                           p_req,
+                          &http_resp,
+                           method,
+                           p_url,
+                           str_len,
+                           HTTPc_FLAG_NONE,
+                          &err);
+    if (err != HTTPc_ERR_NONE ||
+        result != DEF_OK        ) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+#if 0
+/*
+*********************************************************************************************************
+*                                    Twolemetry_ReqPrepareQueryStr()
+*
+* Description : Prepare query string table for MQTT publish.
+*
+* Argument(s) : p_tbl           Variable that will received the pointer to the Query String table.
+*
+*               p_client_id     Pointer to the MQTT client ID
+*
+*               p_topic         Pointer on Topic to publish the MQTT message
+*
+*                               If DEF_NULL, default value is : {domain}/{stuff}/{thing}
+*
+*               p_qos           Quality of service (values from 0 to 3)
+*
+*                               If DEF_NULL, default value is 0
+*
+* Return(s)   : Number of fields in the Query String table.
+*
+* Caller(s)   : Twolemetry_Publish().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  Twolemetry_ReqPrepareQueryStr (HTTPc_KEY_VAL  **p_tbl,
+                                                   CPU_CHAR        *p_client_id,
+                                                   CPU_CHAR        *p_topic,
+                                                   CPU_CHAR        *p_qos)
+{
+    HTTPc_KEY_VAL  *p_key_val;
+    CPU_INT08U      query_nbr;
+
+                                                                /* ----------------- SET FIRST QUERY ------------------ */
+    p_key_val         = &Twolemetry_ReqQueryStrTbl[0];
+    p_key_val->KeyPtr = &Twolemetry_ReqQueryStrKeyTbl[0][0];
+    p_key_val->ValPtr = &Twolemetry_ReqQueryStrValTbl[0][0];
+
+    (void)Str_Copy_N(p_key_val->KeyPtr, "clientid", TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+    (void)Str_Copy_N(p_key_val->ValPtr, p_client_id,TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+    p_key_val->KeyLen = Str_Len_N(p_key_val->KeyPtr, TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+    p_key_val->ValLen = Str_Len_N(p_key_val->ValPtr, TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+    query_nbr = 1;
+    if (p_topic != DEF_NULL) {
+                                                                /* ----------------- SET SECOND QUERY ----------------- */
+        p_key_val         = &Twolemetry_ReqQueryStrTbl[1];
+        p_key_val->KeyPtr = &Twolemetry_ReqQueryStrKeyTbl[1][0];
+        p_key_val->ValPtr = &Twolemetry_ReqQueryStrValTbl[1][0];
+
+        (void)Str_Copy_N(p_key_val->KeyPtr, "topic", TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+        (void)Str_Copy_N(p_key_val->ValPtr, p_topic, TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+        p_key_val->KeyLen = Str_Len_N(p_key_val->KeyPtr, TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+        p_key_val->ValLen = Str_Len_N(p_key_val->ValPtr, TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+        query_nbr++;
+    }
+    if (p_qos != DEF_NULL) {
+                                                                /* ----------------- SET THIRD QUERY ------------------ */
+        p_key_val         = &Twolemetry_ReqQueryStrTbl[1];
+        p_key_val->KeyPtr = &Twolemetry_ReqQueryStrKeyTbl[1][0];
+        p_key_val->ValPtr = &Twolemetry_ReqQueryStrValTbl[1][0];
+
+        (void)Str_Copy_N(p_key_val->KeyPtr, "qos", TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+        (void)Str_Copy_N(p_key_val->ValPtr, p_qos, TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+        p_key_val->KeyLen = Str_Len_N(p_key_val->KeyPtr, TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+        p_key_val->ValLen = Str_Len_N(p_key_val->ValPtr, TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+        query_nbr++;
+    }
+
+
+   *p_tbl = &Twolemetry_ReqQueryStrTbl[0];
+
+    return (query_nbr);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                  Twolemetry_ReqPrepareQueryStr_SMS()
+*
+* Description : Prepare query string table for sms send.
+*
+* Argument(s) : p_tbl               Variable that will received the pointer to the Query String table.
+*
+*               p_message           Pointer to the body of the message to be sent
+*
+*               p_to_phone_number   Pointer to the destination phone number
+*
+*               p_topic             MQTT topic to publish the SMS result status
+*
+*                                   If DEF_NULL, no result status is published
+*
+* Return(s)   : Number of fields in the Query String table.
+*
+* Caller(s)   : Twolemetry_SendSMS().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  Twolemetry_ReqPrepareQueryStr_SMS (HTTPc_KEY_VAL  **p_tbl,
+                                                       CPU_CHAR        *p_message,
+                                                       CPU_CHAR        *p_to_phone_number,
+                                                       CPU_CHAR        *p_topic)
+{
+
+    HTTPc_KEY_VAL  *p_key_val;
+    CPU_INT08U      query_nbr;
+
+                                                                /* ----------------- SET FIRST QUERY ------------------ */
+    p_key_val         = &Twolemetry_ReqQueryStrTbl[0];
+    p_key_val->KeyPtr = &Twolemetry_ReqQueryStrKeyTbl[0][0];
+    p_key_val->ValPtr = &Twolemetry_ReqQueryStrValTbl[0][0];
+
+   (void)Str_Copy_N(p_key_val->KeyPtr, "message", TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+   (void)Str_Copy_N(p_key_val->ValPtr, p_message,TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+    p_key_val->KeyLen = Str_Len_N(p_key_val->KeyPtr, TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+    p_key_val->ValLen = Str_Len_N(p_key_val->ValPtr, TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+                                                                /* ----------------- SET SECOND QUERY ----------------- */
+    p_key_val         = &Twolemetry_ReqQueryStrTbl[1];
+    p_key_val->KeyPtr = &Twolemetry_ReqQueryStrKeyTbl[1][0];
+    p_key_val->ValPtr = &Twolemetry_ReqQueryStrValTbl[1][0];
+
+   (void)Str_Copy_N(p_key_val->KeyPtr, "to", TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+   (void)Str_Copy_N(p_key_val->ValPtr, p_to_phone_number, TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+    p_key_val->KeyLen = Str_Len_N(p_key_val->KeyPtr, TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+    p_key_val->ValLen = Str_Len_N(p_key_val->ValPtr, TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+    query_nbr = 2;
+    if (p_topic != DEF_NULL) {
+                                                                /* ----------------- SET THIRD QUERY ------------------ */
+        p_key_val         = &Twolemetry_ReqQueryStrTbl[1];
+        p_key_val->KeyPtr = &Twolemetry_ReqQueryStrKeyTbl[1][0];
+        p_key_val->ValPtr = &Twolemetry_ReqQueryStrValTbl[1][0];
+
+        (void)Str_Copy_N(p_key_val->KeyPtr, "topic", TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+        (void)Str_Copy_N(p_key_val->ValPtr, p_topic, TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+        p_key_val->KeyLen = Str_Len_N(p_key_val->KeyPtr, TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX);
+        p_key_val->ValLen = Str_Len_N(p_key_val->ValPtr, TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX);
+
+        query_nbr++;
+    }
+
+
+   *p_tbl = &Twolemetry_ReqQueryStrTbl[0];
+    return(query_nbr);
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                       Twolemetry_RespBodyHook()
+*
+* Description : Retrieve data in HTTP Response received.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection object.
+*
+*               p_req           Pointer to current HTTPc Request object.
+*
+*               content_type    HTTP Content Type of the HTTP Response body's data.
+*
+*               p_data          Pointer to a data piece of the HTTP Response body.
+*
+*               data_len        Length of the data piece received.
+*
+*               last_chunk      DEF_YES, if this is the last piece of data.
+*
+*                               DEF_NO,  if more data is up coming.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp_BodyStd()   via 'p_req->OnBodyRx()'
+*               HTTPcResp_BodyChunk() via 'p_req->OnBodyRx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static void  Twolemetry_RespBodyHook (HTTPc_CONN_OBJ     *p_conn,
+                                      HTTPc_REQ_OBJ      *p_req,
+                                      HTTP_CONTENT_TYPE   content_type,
+                                      void               *p_data,
+                                      CPU_INT16U          data_len,
+                                      CPU_BOOLEAN         last_chunk)
+{
+    TWOLEMETRY_CONN *p_twolemetry_conn;
+
+
+    p_twolemetry_conn = (TWOLEMETRY_CONN *)p_req->UserDataPtr;
+    if (p_twolemetry_conn != DEF_NULL &&
+        p_twolemetry_conn->RxDataFnct != DEF_NULL) {
+        p_twolemetry_conn->RxDataFnct(p_data,
+                                      data_len,
+                                      last_chunk,
+                                      p_twolemetry_conn->UserCtxPtr);
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                          Twolemetry_Buf_ReqBodyHook()
+*
+* Description : Specify the data to be sent in the Request body.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               p_data      Variable that will received the pointer to the data to include in the HTTP request.
+*
+*               p_buf       Pointer to HTTP transmit buffer.
+*
+*               buf_len     Length of space remaining in  the HTTP transmit buffer.
+*
+*               p_data_len  Length of the data.
+*
+* Return(s)   : DEF_YES, if all data to transmit was passed by the application
+*               DEF_NO,  if data still remaining to be sent.
+*
+* Caller(s)   : HTTPcReq_BodyData() via 'p_req->OnBodyTx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static CPU_BOOLEAN  Twolemetry_Buf_ReqBodyHook  (HTTPc_CONN_OBJ     *p_conn,
+                                                 HTTPc_REQ_OBJ      *p_req,
+                                                 void              **p_data,
+                                                 CPU_CHAR           *p_buf,
+                                                 CPU_INT16U          buf_len,
+                                                 CPU_INT16U         *p_data_len)
+{
+    CPU_SIZE_T str_len;
+
+    *p_data = p_req->UserDataPtr;
+
+    str_len = Str_Len(*p_data);
+    *p_data_len = str_len;
+
+
+    Str_Copy_N(p_buf, *p_data, str_len);
+
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     Twolemetry_ConnCloseCallback()
+*
+* Description : Callback to notify application that an HTTP connection was closed.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection.
+*
+*               close_status    Status of the connection closing:
+*                                   HTTPc_CONN_CLOSE_STATUS_ERR_INTERNAL
+*                                   HTTPc_CONN_CLOSE_STATUS_SERVER
+*                                   HTTPc_CONN_CLOSE_STATUS_NO_PERSISTENT
+*                                   HTTPc_CONN_CLOSE_STATUS_APP
+*
+*               err             Error Code when connection was closed.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_conn->OnClose()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef HTTPc_TASK_MODULE_EN
+static void  Twolemetry_ConnCloseCallback (HTTPc_CONN_OBJ           *p_conn,
+                                           HTTPc_CONN_CLOSE_STATUS   close_status,
+                                           HTTPc_ERR                 err)
+{
+
+}
+#endif
+
+
+
+
+/*
+*********************************************************************************************************
+*                                      Twolemetry_TransErrCallback()
+*
+* Description : Callback to notify application that an error occurred during an HTTP transaction.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               err_code    Error Code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnErr()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+#ifdef HTTPc_TASK_MODULE_EN
+static void Twolemetry_TransErrCallback (HTTPc_CONN_OBJ  *p_conn,
+                                         HTTPc_REQ_OBJ   *p_req,
+                                         HTTPc_ERR        err_code)
+{
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      Twolemetry_ConnSecureCallback()
+*
+* Description :
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               err_code    Error Code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnErr()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static void Twolemetry_ConnSecureCallback (HTTPc_CONN_OBJ  *p_conn,
+                                           HTTPc_REQ_OBJ   *p_req,
+                                           HTTPc_ERR        err_code)
+{
+
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/2lemetry.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/2lemetry.h
new file mode 100644
index 0000000..6d73410
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/2lemetry.h
@@ -0,0 +1,187 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   HTTP CLIENT 2LEMETRY MODULE
+*
+* Filename      : 2lemetry.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  TWOLEMETRY_MODULE_PRESENT
+#define  TWOLEMETRY_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef   TWOLEMETRY_MODULE
+#define  TWOLEMETRY_EXT
+#else
+#define  TWOLEMETRY_EXT  extern
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  TWOLEMETRY_CFG_REQ_NBR_MAX                        2u
+
+
+#define  TWOLEMETRY_CFG_CONN_NBR_MAX                       3u
+
+#define  TWOLEMETRY_CFG_CONN_BUF_SIZE                   4096u
+
+
+#define  TWOLEMETRY_CFG_HDR_NBR_MAX                       10u
+#define  TWOLEMETRY_CFG_HDR_VAL_LEN_MAX                  300u
+
+#if 0
+#define  TWOLEMETRY_CFG_QUERY_STR_NBR_MAX                  3u
+#define  TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX             50u
+#define  TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX            100u
+#endif
+
+#define  TWOLEMETRY_URL_LEN_MAX                          300u
+
+
+#define  TWOLEMETRY_API_HOSTNAME                  "api.m2m.io"
+#define  TWOLEMETRY_URL_MESSAGES                  "/2/publish"
+#define  TWOLEMETRY_URL_DOMAIN                    "/2/account/domain/"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  void         (*TWOLEMETRY_RX_DATA)     (void                      *p_data,
+                                                 CPU_INT16U                 data_len,
+                                                 CPU_BOOLEAN                last_chunk,
+                                                 void                      *p_user_ctx);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+TWOLEMETRY_EXT   CPU_CHAR                 Twolemetry_Buf[1024];
+#if 0
+TWOLEMETRY_EXT   HTTPc_KEY_VAL            Twolemetry_ReqQueryStrTbl[TWOLEMETRY_CFG_QUERY_STR_NBR_MAX];
+
+TWOLEMETRY_EXT   CPU_CHAR                 Twolemetry_ReqQueryStrKeyTbl[TWOLEMETRY_CFG_QUERY_STR_NBR_MAX][TWOLEMETRY_CFG_QUERY_STR_KEY_LEN_MAX];
+TWOLEMETRY_EXT   CPU_CHAR                 Twolemetry_ReqQueryStrValTbl[TWOLEMETRY_CFG_QUERY_STR_NBR_MAX][TWOLEMETRY_CFG_QUERY_STR_VAL_LEN_MAX];
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+CPU_BOOLEAN Twolemetry_Publish       (CPU_CHAR             *p_client_id,
+                                      CPU_CHAR             *p_topic,
+                                      CPU_CHAR             *p_payload,
+                                      CPU_CHAR             *p_qos,
+                                      CPU_CHAR             *p_credentials);
+
+CPU_BOOLEAN Twolemetry_GetData       (CPU_CHAR             *p_domain,
+                                      CPU_CHAR             *p_stuff,
+                                      CPU_CHAR             *p_thing,
+                                      CPU_CHAR             *p_whatever,
+                                      CPU_CHAR             *p_credentials,
+                                      TWOLEMETRY_RX_DATA    fnct,
+                                      void                 *p_ctx);
+
+CPU_BOOLEAN Twolemetry_SendSMS       (CPU_CHAR             *p_message,
+                                      CPU_CHAR             *p_to_phone_number,
+                                      CPU_CHAR             *p_topic,
+                                      CPU_CHAR             *p_domain,
+                                      CPU_CHAR             *p_credentials);
+
+CPU_BOOLEAN Twolemetry_PushStoreKey  (CPU_CHAR             *p_domain,
+                                      CPU_CHAR             *p_key,
+                                      CPU_CHAR             *p_kvp,
+                                      CPU_BOOLEAN           protect,
+                                      CPU_CHAR             *p_credentials);
+
+CPU_BOOLEAN Twolemetry_GetStoreKey   (CPU_CHAR             *p_domain,
+                                      CPU_CHAR             *p_key,
+                                      CPU_BOOLEAN           protect,
+                                      CPU_CHAR             *p_credentials,
+                                      TWOLEMETRY_RX_DATA    fnct,
+                                      void                 *p_ctx);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* TWOLEMTRY_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/Cfg/Template/http-c_mem_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/Cfg/Template/http-c_mem_cfg.c
new file mode 100644
index 0000000..9fdd983
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/Cfg/Template/http-c_mem_cfg.c
@@ -0,0 +1,77 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            HTTP CLIENT MEMORY MODULE CONFIGURATION FILE
+*
+* Filename      : http-c_mem_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPc_MEM_CFG_MODULE
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPc_MEM_CFG_CONN_NBR_MAX                            10u
+#define  HTTPc_MEM_CFG_BUF_SIZE                              1024u
+#define  HTTPc_MEM_CFG_REQ_NBR_MAX                             20u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP CLIENT INSTANCE CONFIGURATION STRUCTURE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPc_MEM_CFG  HTTPcMem_Cfg = {
+
+        HTTPc_MEM_CFG_CONN_NBR_MAX,
+        HTTPc_MEM_CFG_REQ_NBR_MAX,
+        HTTPc_MEM_CFG_BUF_SIZE,
+};
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/Cfg/Template/http-c_mem_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/Cfg/Template/http-c_mem_cfg.h
new file mode 100644
index 0000000..33c1148
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/Cfg/Template/http-c_mem_cfg.h
@@ -0,0 +1,75 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP CLIENT MEMORY MODULE CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : http-c_mem_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  HTTPc_MEM_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                    HTTP CLIENT RUNTIME CONFIGURATION
+*********************************************************************************************************
+*/
+
+extern  const  HTTPc_MEM_CFG  HTTPcMem_Cfg;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_MEM_MODULE_EN       */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/http-c_mem.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/http-c_mem.c
new file mode 100644
index 0000000..027b2c4
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/http-c_mem.c
@@ -0,0 +1,559 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  HTTP CLIENT MEMORY LIBRARY MODULE
+*
+* Filename      : http-c_mem.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPs_MEM_MODULE
+
+#include  
+#include  "http-c_mem.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  HTTPc_MEM_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+MEM_DYN_POOL  HTTPcMem_PoolConn;
+MEM_DYN_POOL  HTTPcMem_PoolBuf;
+MEM_DYN_POOL  HTTPcMem_PoolReq;
+MEM_DYN_POOL  HTTPcMem_PoolResp;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPcMem_PoolInit()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcMem_PoolInit(const  HTTPc_MEM_CFG  *p_cfg,
+                               HTTPc_MEM_ERR  *p_err)
+{
+    LIB_ERR      err_lib;
+
+
+                                                                /* ----------------- CREATE CONN POOL ----------------- */
+    Mem_DynPoolCreate(DEF_NULL,
+                     &HTTPcMem_PoolConn,
+                      DEF_NULL,
+                      sizeof(HTTPc_CONN_OBJ),
+                      sizeof(CPU_SIZE_T),
+                      1,
+                      p_cfg->ConnNbrMax,
+                     &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = HTTPc_MEM_ERR_POOL_INIT_CONN;
+        goto exit;
+    }
+
+                                                                /* ---------------- CREATE BUFFER POOL ---------------- */
+    Mem_DynPoolCreate(DEF_NULL,
+                     &HTTPcMem_PoolBuf,
+                      DEF_NULL,
+                      p_cfg->BufSize,
+                      sizeof(CPU_SIZE_T),
+                      1,
+                      p_cfg->ConnNbrMax,
+                     &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = HTTPc_MEM_ERR_POOL_INIT_BUF;
+        goto exit;
+    }
+
+                                                                /* ----------------- CREATE REQ POOL ------------------ */
+    Mem_DynPoolCreate(DEF_NULL,
+                     &HTTPcMem_PoolReq,
+                      DEF_NULL,
+                      sizeof(HTTPc_REQ_OBJ),
+                      sizeof(CPU_SIZE_T),
+                      1,
+                      p_cfg->ReqNbrMax,
+                     &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = HTTPc_MEM_ERR_POOL_INIT_REQ;
+        goto exit;
+    }
+
+                                                                /* ----------------- CREATE RESP POOL ----------------- */
+    Mem_DynPoolCreate(DEF_NULL,
+                     &HTTPcMem_PoolResp,
+                      DEF_NULL,
+                      sizeof(HTTPc_RESP_OBJ),
+                      sizeof(CPU_SIZE_T),
+                      1,
+                      p_cfg->ReqNbrMax,
+                     &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = HTTPc_MEM_ERR_POOL_INIT_RESP;
+        goto exit;
+    }
+
+   *p_err = HTTPc_MEM_ERR_NONE;
+
+
+exit:
+   return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcMem_ConnGet()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+HTTPc_CONN_OBJ  *HTTPcMem_ConnGet (HTTPc_MEM_ERR  *p_err)
+{
+    HTTPc_CONN_OBJ  *p_conn;
+    LIB_ERR          err_lib;
+
+
+    p_conn = (HTTPc_CONN_OBJ *)Mem_DynPoolBlkGet(&HTTPcMem_PoolConn,
+                                                 &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             p_conn = DEF_NULL;
+            *p_err  = HTTPc_MEM_ERR_POOL_CONN_EMPTY;
+             goto exit;
+
+
+        default:
+            p_conn = DEF_NULL;
+           *p_err  = HTTPc_MEM_ERR_POOL_CONN_FAULT;
+            goto exit;
+    }
+
+   *p_err = HTTPc_MEM_ERR_NONE;
+
+
+exit:
+    return (p_conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcMem_ConnRelease()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcMem_ConnRelease (HTTPc_CONN_OBJ  *p_conn,
+                            HTTPc_MEM_ERR   *p_err)
+{
+    LIB_ERR  err_lib;
+
+
+    Mem_DynPoolBlkFree(&HTTPcMem_PoolConn,
+                        p_conn,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = HTTPc_MEM_ERR_POOL_CONN_FREE;
+        goto exit;
+    }
+
+   *p_err = HTTPc_MEM_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcMem_BufGet()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *HTTPcMem_BufGet (HTTPc_MEM_ERR  *p_err)
+{
+    CPU_CHAR  *p_buf;
+    LIB_ERR    err_lib;
+
+
+    p_buf = (CPU_CHAR *)Mem_DynPoolBlkGet(&HTTPcMem_PoolBuf,
+                                          &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             p_buf = DEF_NULL;
+            *p_err = HTTPc_MEM_ERR_POOL_BUF_EMPTY;
+             goto exit;
+
+
+        default:
+            p_buf = DEF_NULL;
+           *p_err = HTTPc_MEM_ERR_POOL_BUF_FAULT;
+            goto exit;
+    }
+
+   *p_err = HTTPc_MEM_ERR_NONE;
+
+
+exit:
+    return (p_buf);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcMem_BufRelease()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_buf
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcMem_BufRelease (CPU_CHAR       *p_buf,
+                           HTTPc_MEM_ERR  *p_err)
+{
+    LIB_ERR  err_lib;
+
+
+    Mem_DynPoolBlkFree(&HTTPcMem_PoolBuf,
+                        p_buf,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = HTTPc_MEM_ERR_POOL_BUF_FREE;
+        goto exit;
+    }
+
+   *p_err = HTTPc_MEM_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcMem_ReqGet()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+HTTPc_REQ_OBJ  *HTTPcMem_ReqGet (HTTPc_MEM_ERR  *p_err)
+{
+    HTTPc_REQ_OBJ  *p_req;
+    LIB_ERR         err_lib;
+
+
+    p_req = (HTTPc_REQ_OBJ *)Mem_DynPoolBlkGet(&HTTPcMem_PoolReq,
+                                               &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             p_req = DEF_NULL;
+            *p_err = HTTPc_MEM_ERR_POOL_REQ_EMPTY;
+             goto exit;
+
+
+        default:
+            p_req = DEF_NULL;
+           *p_err = HTTPc_MEM_ERR_POOL_REQ_FAULT;
+            goto exit;
+    }
+
+   *p_err = HTTPc_MEM_ERR_NONE;
+
+
+exit:
+    return (p_req);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcMem_ReqRelease()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_buf
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcMem_ReqRelease (HTTPc_REQ_OBJ  *p_req,
+                           HTTPc_MEM_ERR  *p_err)
+{
+    LIB_ERR  err_lib;
+
+
+    Mem_DynPoolBlkFree(&HTTPcMem_PoolReq,
+                        p_req,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = HTTPc_MEM_ERR_POOL_BUF_FREE;
+        goto exit;
+    }
+
+   *p_err = HTTPc_MEM_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+/*
+*********************************************************************************************************
+*                                          HTTPcMem_RespGet()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+HTTPc_RESP_OBJ  *HTTPcMem_RespGet (HTTPc_MEM_ERR  *p_err)
+{
+    HTTPc_RESP_OBJ  *p_resp;
+    LIB_ERR          err_lib;
+
+
+    p_resp = (HTTPc_RESP_OBJ *)Mem_DynPoolBlkGet(&HTTPcMem_PoolResp,
+                                                 &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             p_resp = DEF_NULL;
+            *p_err  = HTTPc_MEM_ERR_POOL_REQ_EMPTY;
+             goto exit;
+
+
+        default:
+            p_resp = DEF_NULL;
+           *p_err  = HTTPc_MEM_ERR_POOL_REQ_FAULT;
+            goto exit;
+    }
+
+   *p_err = HTTPc_MEM_ERR_NONE;
+
+
+exit:
+    return (p_resp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcMem_RespRelease()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_resp
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcMem_RespRelease (HTTPc_RESP_OBJ  *p_resp,
+                            HTTPc_MEM_ERR   *p_err)
+{
+    LIB_ERR  err_lib;
+
+
+    Mem_DynPoolBlkFree(&HTTPcMem_PoolResp,
+                        p_resp,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = HTTPc_MEM_ERR_POOL_BUF_FREE;
+        goto exit;
+    }
+
+   *p_err = HTTPc_MEM_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_MEM_MODULE_EN       */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/http-c_mem.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/http-c_mem.h
new file mode 100644
index 0000000..0995e33
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/Mem/http-c_mem.h
@@ -0,0 +1,220 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  HTTP CLIENT MEMORY LIBRARY MODULE
+*
+* Filename      : http-c_mem.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_MEM_MODULE_PRESENT
+#define  HTTPc_MEM_MODULE_PRESENT
+
+#if (HTTPc_CFG_MEM_MODULE_EN == DEF_ENABLED)
+#define HTTPc_MEM_MODULE_EN
+#endif
+
+#ifdef   HTTPc_MEM_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef HTTPc_MEM_MODULE
+#define  HTTPc_MEM_EXT
+#else
+#define  HTTPc_MEM_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       HTTPc MEM ERR DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum httpc_mem_err {
+    HTTPc_MEM_ERR_NONE,
+
+    HTTPc_MEM_ERR_POOL_INIT_CONN,
+    HTTPc_MEM_ERR_POOL_INIT_BUF,
+    HTTPc_MEM_ERR_POOL_INIT_REQ,
+    HTTPc_MEM_ERR_POOL_INIT_RESP,
+
+    HTTPc_MEM_ERR_POOL_CONN_EMPTY,
+    HTTPc_MEM_ERR_POOL_CONN_FAULT,
+    HTTPc_MEM_ERR_POOL_CONN_FREE,
+
+    HTTPc_MEM_ERR_POOL_BUF_EMPTY,
+    HTTPc_MEM_ERR_POOL_BUF_FAULT,
+    HTTPc_MEM_ERR_POOL_BUF_FREE,
+
+    HTTPc_MEM_ERR_POOL_REQ_EMPTY,
+    HTTPc_MEM_ERR_POOL_REQ_FAULT,
+    HTTPc_MEM_ERR_POOL_REQ_FREE,
+
+    HTTPc_MEM_ERR_POOL_RESP_EMPTY,
+    HTTPc_MEM_ERR_POOL_RESP_FAULT,
+    HTTPc_MEM_ERR_POOL_RESP_FREE,
+
+} HTTPc_MEM_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPc MEM CFG DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef struct httpc_mem_cfg {
+    CPU_INT08U  ConnNbrMax;
+    CPU_INT08U  ReqNbrMax;
+    CPU_INT16U  BufSize;
+} HTTPc_MEM_CFG;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                MACROS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void             HTTPcMem_PoolInit    (const  HTTPc_MEM_CFG  *p_cfg,
+                                              HTTPc_MEM_ERR  *p_err);
+
+HTTPc_CONN_OBJ  *HTTPcMem_ConnGet     (       HTTPc_MEM_ERR  *p_err);
+
+void             HTTPcMem_ConnRelease (       HTTPc_CONN_OBJ  *p_conn,
+                                              HTTPc_MEM_ERR   *p_err);
+
+CPU_CHAR        *HTTPcMem_BufGet      (       HTTPc_MEM_ERR   *p_err);
+
+void             HTTPcMem_BufRelease  (       CPU_CHAR        *p_buf,
+                                              HTTPc_MEM_ERR   *p_err);
+
+HTTPc_REQ_OBJ   *HTTPcMem_ReqGet      (       HTTPc_MEM_ERR   *p_err);
+
+void             HTTPcMem_ReqRelease  (       HTTPc_REQ_OBJ   *p_req,
+                                              HTTPc_MEM_ERR   *p_err);
+
+HTTPc_RESP_OBJ  *HTTPcMem_RespGet     (       HTTPc_MEM_ERR   *p_err);
+
+void             HTTPcMem_RespRelease (       HTTPc_RESP_OBJ  *p_resp,
+                                              HTTPc_MEM_ERR   *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_MEM_MODULE_EN       */
+#endif  /* HTTPc_MEM_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/dropbox.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/dropbox.c
new file mode 100644
index 0000000..edacf62
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/dropbox.c
@@ -0,0 +1,1133 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT DROPBOX APPLICATION SOURCE CODE
+*
+* Filename      : dropbox.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define  MICRIUM_SOURCE
+#define  DROPBOX_MODULE
+
+
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+
+#include  "dropbox.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct  dropbox_conn {
+    DROPBOX_RX_DATA        RxDataFnct;
+    CPU_CHAR              *RemoteFileName;
+    void                  *UserCtxPtr;
+} DROPBOX_CONN;
+
+typedef struct dropbox_file {
+    CPU_CHAR              *LocalFilename;
+    FS_FILE               *FilePtr;
+} DROPBOX_FILE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+static  CPU_BOOLEAN  Dropbox_ReqSend           (CPU_CHAR                  *p_url,
+                                                HTTP_METHOD                method,
+                                                HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_REQ_OBJ             *p_req,
+                                                CPU_CHAR                  *p_access_token,
+                                                CPU_CHAR                  *p_dropbox_api_url);
+
+static  CPU_BOOLEAN  Dropbox_FS_ReqBodyHook    (HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_REQ_OBJ             *p_req,
+                                                void                     **p_data,
+                                                CPU_CHAR                  *p_buf,
+                                                CPU_INT16U                 buf_len,
+                                                CPU_INT16U                *p_data_len);
+
+static  CPU_BOOLEAN  Dropbox_Buf_ReqBodyHook   (HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_REQ_OBJ             *p_req,
+                                                void                     **p_data,
+                                                CPU_CHAR                  *p_buf,
+                                                CPU_INT16U                 buf_len,
+                                                CPU_INT16U                *p_data_len);
+
+static  void         Dropbox_RespBodyHook      (HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_REQ_OBJ             *p_req,
+                                                HTTP_CONTENT_TYPE          content_type,
+                                                void                      *p_data,
+                                                CPU_INT16U                 data_len,
+                                                CPU_BOOLEAN                last_chunk);
+
+static void          Dropbox_RxFS               (CPU_CHAR                  *remote_file_name,
+                                                 void                      *p_data,
+                                                 CPU_INT16U                 data_len,
+                                                 CPU_BOOLEAN                last_chunk,
+                                                 void                      *p_user_ctx);
+
+#ifdef HTTPc_TASK_MODULE_EN
+static  void         Dropbox_ConnCloseCallback (HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_CONN_CLOSE_STATUS    close_status,
+                                                HTTPc_ERR                  err);
+
+static  void         Dropbox_TransErrCallback  (HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_REQ_OBJ             *p_req,
+                                                HTTPc_ERR                  err_code);
+
+static  void         Dropbox_ConnSecureCallback(HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_REQ_OBJ             *p_req,
+                                                HTTPc_ERR                  err_code);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           Dropbox_Upload_File()
+*
+* Description : Upload file on dropbox using uC/FS
+*
+* Argument(s) : remote_file_name    Pointer to name of the file in server.
+*
+*               local_file_name     Pointer to name of the file in file system.
+*
+*               content_type        HTTP_CONTENT_TYPE :
+*
+*                                        HTTP_CONTENT_TYPE_UNKOWN
+*                                        HTTP_CONTENT_TYPE_NONE
+*                                        HTTP_CONTENT_TYPE_HTML
+*                                        HTTP_CONTENT_TYPE_OCTET_STREAM
+*                                        HTTP_CONTENT_TYPE_PDF
+*                                        HTTP_CONTENT_TYPE_ZIP
+*                                        HTTP_CONTENT_TYPE_GIF
+*                                        HTTP_CONTENT_TYPE_JPEG
+*                                        HTTP_CONTENT_TYPE_PNG
+*                                        HTTP_CONTENT_TYPE_JS
+*                                        HTTP_CONTENT_TYPE_PLAIN
+*                                        HTTP_CONTENT_TYPE_CSS
+*                                        HTTP_CONTENT_TYPE_JSON
+*                                        HTTP_CONTENT_TYPE_APP_FORM
+*                                        HTTP_CONTENT_TYPE_MULTIPART_FORM
+*
+*               content_len         Length of the file to upload.
+*
+*               p_access_token      Pointer to the access token used for Authentication
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN Dropbox_Upload_File (CPU_CHAR         *p_remote_file_name,
+                                 CPU_CHAR         *p_local_file_name,
+                                 HTTP_CONTENT_TYPE content_type,
+                                 CPU_SIZE_T        content_len,
+                                 CPU_CHAR         *p_access_token)
+{
+
+    CPU_CHAR            url[DROPBOX_URL_LEN_MAX];
+    HTTPc_CONN_OBJ      http_conn;
+    HTTPc_REQ_OBJ       http_req;
+    HTTPc_ERR           err;
+    CPU_BOOLEAN         success;
+    DROPBOX_FILE        tx_file;
+
+
+    Mem_Clr(url, DROPBOX_URL_LEN_MAX);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+
+    Str_Cat_N(&url[0], DROPBOX_URL_FILES_PUT, DROPBOX_URL_LEN_MAX);
+    Str_Cat_N(&url[0], p_remote_file_name   , DROPBOX_URL_LEN_MAX);
+
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    tx_file.LocalFilename = p_local_file_name;
+
+    http_req.UserDataPtr = &tx_file;
+
+    HTTPc_ReqSetParam(        &http_req,
+                               HTTPc_PARAM_TYPE_REQ_BODY_HOOK,
+                      (void *)&Dropbox_FS_ReqBodyHook,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE,
+                      &content_type,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_LEN,
+                      &content_len,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    success = Dropbox_ReqSend( url,
+                               HTTP_METHOD_PUT,
+                              &http_conn,
+                              &http_req,
+                               p_access_token,
+                               DROPBOX_API_CONTENT_HOSTNAME);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Dropbox_Upload_Buf()
+*
+* Description : Upload file on dropbox using memory buffer.
+*
+* Argument(s) : remote_file_name    Pointer to name of the file in server.
+*
+*               p_buf               Pointer to memory buffer to send.
+*
+*               p_access_token      Pointer to the access token used for Authentication
+*
+*               content_type        HTTP_CONTENT_TYPE :
+*
+*                                        HTTP_CONTENT_TYPE_UNKOWN
+*                                        HTTP_CONTENT_TYPE_NONE
+*                                        HTTP_CONTENT_TYPE_HTML
+*                                        HTTP_CONTENT_TYPE_OCTET_STREAM
+*                                        HTTP_CONTENT_TYPE_PDF
+*                                        HTTP_CONTENT_TYPE_ZIP
+*                                        HTTP_CONTENT_TYPE_GIF
+*                                        HTTP_CONTENT_TYPE_JPEG
+*                                        HTTP_CONTENT_TYPE_PNG
+*                                        HTTP_CONTENT_TYPE_JS
+*                                        HTTP_CONTENT_TYPE_PLAIN
+*                                        HTTP_CONTENT_TYPE_CSS
+*                                        HTTP_CONTENT_TYPE_JSON
+*                                        HTTP_CONTENT_TYPE_APP_FORM
+*                                        HTTP_CONTENT_TYPE_MULTIPART_FORM
+*
+*               content_len         Length of the file to upload.
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN Dropbox_Upload_Buf (CPU_CHAR         *p_remote_file_name,
+                                CPU_INT08U       *p_buf,
+                                HTTP_CONTENT_TYPE content_type,
+                                CPU_SIZE_T        content_len,
+                                CPU_CHAR         *p_access_token)
+{
+    HTTPc_CONN_OBJ      http_conn;
+    HTTPc_REQ_OBJ       http_req;
+    CPU_CHAR            url[DROPBOX_URL_LEN_MAX];
+    HTTPc_ERR           err;
+    CPU_BOOLEAN         success;
+
+
+    Mem_Clr(url, DROPBOX_URL_LEN_MAX);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+
+    Str_Cat_N(&url[0], DROPBOX_URL_FILES_PUT, DROPBOX_URL_LEN_MAX);
+    Str_Cat_N(&url[0], p_remote_file_name   , DROPBOX_URL_LEN_MAX);
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+    http_req.UserDataPtr = p_buf;
+
+    HTTPc_ReqSetParam(         &http_req,
+                                HTTPc_PARAM_TYPE_REQ_BODY_HOOK,
+                      (void *) &Dropbox_Buf_ReqBodyHook,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE,
+                      &content_type,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_LEN,
+                      &content_len,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    success = Dropbox_ReqSend( url,
+                               HTTP_METHOD_PUT,
+                              &http_conn,
+                              &http_req,
+                               p_access_token,
+                               DROPBOX_API_CONTENT_HOSTNAME);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Dropbox_Download_Buf()
+*
+* Description : Download file from dropbox using memory buffer.
+*
+* Argument(s) : remote_file_name    Pointer to name of the file in server.
+*
+*               access_token        Pointer to the access token used for Authentication
+*
+*               fnct                Pointer to the user defined receive data function
+*
+*               ctx                 Pointer to user context
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Dropbox_Download_Buf (CPU_CHAR              *p_remote_file_name,
+                                   CPU_CHAR              *p_access_token,
+                                   DROPBOX_RX_DATA        fnct,
+                                   void                  *p_ctx)
+{
+    DROPBOX_CONN        conn;
+    CPU_CHAR            url[DROPBOX_URL_LEN_MAX];
+    HTTPc_CONN_OBJ      http_conn;
+    HTTPc_REQ_OBJ       http_req;
+    HTTPc_ERR           err;
+    CPU_BOOLEAN         success;
+
+
+    conn.RemoteFileName = p_remote_file_name;
+    conn.RxDataFnct     = fnct;
+    conn.UserCtxPtr     = p_ctx;
+
+    Mem_Clr(url, DROPBOX_URL_LEN_MAX);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+
+    Str_Cat_N(&url[0], DROPBOX_URL_FILES_GET, DROPBOX_URL_LEN_MAX);
+    Str_Cat_N(&url[0], p_remote_file_name,    DROPBOX_URL_LEN_MAX);
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+    return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+    return (DEF_FAIL);
+    }
+
+    http_req.UserDataPtr = &conn;
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+
+    HTTPc_ReqSetParam(        &http_req,
+                               HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      (void *)&Dropbox_RespBodyHook,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    success = Dropbox_ReqSend( url,
+                               HTTP_METHOD_GET,
+                              &http_conn,
+                              &http_req,
+                               p_access_token,
+                               DROPBOX_API_CONTENT_HOSTNAME);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                        Dropbox_Download_File()
+*
+* Description : Download a file from Dropbox.
+*
+* Argument(s) : p_remote_file_name  Pointer to name of the file in server.
+*
+*               p_local_file_name   Pointer to name of the file in file system
+*
+*               p_access_token      Pointer to the access token used for Authentication
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Dropbox_Download_File (CPU_CHAR              *p_remote_file_name,
+                                    CPU_CHAR              *p_local_file_name,
+                                    CPU_CHAR              *p_access_token)
+{
+    DROPBOX_CONN        conn;
+    CPU_CHAR            url[DROPBOX_URL_LEN_MAX];
+    HTTPc_CONN_OBJ      http_conn;
+    HTTPc_REQ_OBJ       http_req;
+    HTTPc_ERR           err;
+    CPU_BOOLEAN         success;
+    DROPBOX_FILE        rx_file;
+
+
+    rx_file.LocalFilename = p_local_file_name;
+
+    conn.RemoteFileName   =  p_remote_file_name;
+    conn.RxDataFnct       = &Dropbox_RxFS;
+    conn.UserCtxPtr       = &rx_file;
+
+
+    Mem_Clr(url, DROPBOX_URL_LEN_MAX);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+
+    Str_Cat_N(&url[0], DROPBOX_URL_FILES_GET, DROPBOX_URL_LEN_MAX);
+    Str_Cat_N(&url[0], p_remote_file_name,    DROPBOX_URL_LEN_MAX);
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+    return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+    return (DEF_FAIL);
+    }
+
+    http_req.UserDataPtr = &conn;
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+
+    HTTPc_ReqSetParam(        &http_req,
+                               HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      (void *)&Dropbox_RespBodyHook,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    success = Dropbox_ReqSend( url,
+                               HTTP_METHOD_GET,
+                              &http_conn,
+                              &http_req,
+                               p_access_token,
+                               DROPBOX_API_CONTENT_HOSTNAME);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Dropbox_Delete_File()
+*
+* Description : Delete a file on Dropbox server.
+*
+* Argument(s) : p_remote_file_name  Pointer to name of the file in server.
+*
+*               p_access_token      Pointer to the access token used for Authentication
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Dropbox_Delete_File (CPU_CHAR              *p_remote_file_name,
+                                  CPU_CHAR              *p_access_token)
+{
+    CPU_CHAR            url[DROPBOX_URL_LEN_MAX];
+    HTTPc_CONN_OBJ      http_conn;
+    HTTPc_REQ_OBJ       http_req;
+    HTTPc_ERR           err;
+    CPU_BOOLEAN         success;
+
+
+    Mem_Clr(url, DROPBOX_URL_LEN_MAX);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+
+
+    Str_Cat_N(&url[0], DROPBOX_URL_FILES_OPS   , DROPBOX_URL_LEN_MAX);
+    Str_Cat_N(&url[0], "delete?root=auto&path=", DROPBOX_URL_LEN_MAX);
+    Str_Cat_N(&url[0], p_remote_file_name      , DROPBOX_URL_LEN_MAX);
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+    return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+    return (DEF_FAIL);
+    }
+
+    success = Dropbox_ReqSend( url,
+                               HTTP_METHOD_POST,
+                              &http_conn,
+                              &http_req,
+                               p_access_token,
+                               DROPBOX_API_HOSTAME);
+    if (success != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+
+    return(DEF_OK);
+
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         Dropbox_ReqSend()
+*
+* Description : Send a request.
+*
+* Argument(s) : p_url    Pointer to complete URI (or only resource path) of the request.
+*
+*               method   HTTP method of the request.
+*
+*               p_conn   Pointer to valid HTTPc Connection on which request will occurred.
+*
+*               p_req    Pointer to request to send.
+*
+* Return(s)   : DEF_OK,   if HTTP transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static CPU_BOOLEAN  Dropbox_ReqSend  (CPU_CHAR       *p_url,
+                                      HTTP_METHOD     method,
+                                      HTTPc_CONN_OBJ *p_conn,
+                                      HTTPc_REQ_OBJ  *p_req,
+                                      CPU_CHAR       *p_access_token,
+                                      CPU_CHAR       *p_dropbox_api_url)
+{
+    HTTPc_HDR           hdr;
+    CPU_CHAR            hdr_val[DROPBOX_CFG_HDR_VAL_LEN_MAX];
+    CPU_CHAR            buf[DROPBOX_CFG_CONN_BUF_SIZE];
+    HTTPc_RESP_OBJ      http_resp;
+    HTTPc_PARAM_TBL     tbl_obj;
+    CPU_SIZE_T          str_len;
+    CPU_BOOLEAN         result;
+    HTTPc_ERR           err;
+
+
+    Mem_Clr(hdr_val, 255);
+                                                                /* Prepare the "Signature" required by Oauth ...*/
+                                                                /* ... sent through "Authorization" header      */
+
+    Str_Cat_N(hdr_val, "Bearer ",       DROPBOX_CFG_HDR_VAL_LEN_MAX);
+    Str_Cat_N(hdr_val,  p_access_token, DROPBOX_CFG_HDR_VAL_LEN_MAX);
+
+    hdr.ValPtr  = hdr_val;
+    hdr.ValLen  = Str_Len_N(hdr_val, DROPBOX_CFG_HDR_VAL_LEN_MAX);
+    hdr.HdrField = HTTP_HDR_FIELD_AUTHORIZATION;
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(         p_conn,
+                                HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       (void *)&Dropbox_ConnCloseCallback,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ConnSetParam(         p_conn,
+                                HTTPc_PARAM_TYPE_SECURE_TRUST_CALLBACK,
+                       (void *)&Dropbox_ConnSecureCallback,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ------------ SET REQ/HDR PARAM          ----------- */
+    tbl_obj.EntryNbr = 1;
+    tbl_obj.TblPtr   = &hdr;
+    HTTPc_ReqSetParam( p_req,
+                       HTTPc_PARAM_TYPE_REQ_HDR_TBL,
+                      &tbl_obj,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam(         p_req,
+                               HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      (void *)&Dropbox_TransErrCallback,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(p_dropbox_api_url);
+    result  = HTTPc_ConnOpen(p_conn,
+                             buf,
+                             DROPBOX_CFG_CONN_BUF_SIZE,
+                             p_dropbox_api_url,
+                             str_len,
+                             HTTPc_FLAG_NONE,
+                            &err);
+    if (err != HTTPc_ERR_NONE ||
+        result != DEF_OK        ) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    Mem_Clr(&http_resp, sizeof(http_resp));
+
+    str_len = Str_Len(p_url);
+    result  = HTTPc_ReqSend(p_conn,
+                            p_req,
+                           &http_resp,
+                            method,
+                            p_url,
+                            str_len,
+                            HTTPc_FLAG_NONE,
+                           &err);
+    if (err != HTTPc_ERR_NONE ||
+        result != DEF_OK        ) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            Dropbox_RxFS()
+*
+* Description : Save data received in file system.
+*
+* Argument(s) : remote_file_name    Pointer to name of the file in server.
+*
+*               p_data              Pointer to a data piece of the HTTP Response body.
+*
+*               data_len            Length of the data piece received.
+*
+*               last_chunk          DEF_YES, if this is the last piece of data.
+*
+*                                   DEF_NO,  if more data is up coming.
+*
+*               p_user_ctx          Pointer to context.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Dropbox_Download_File().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void  Dropbox_RxFS  (CPU_CHAR          *remote_file_name,
+                     void              *p_data,
+                     CPU_INT16U         data_len,
+                     CPU_BOOLEAN        last_chunk,
+                     void              *p_user_ctx)
+{
+    FS_ERR           err_fs;
+    CPU_SIZE_T       len_wr;
+    FS_FILE         *p_file;
+    CPU_BOOLEAN      is_open;
+    FS_FLAGS         fs_flags;
+    CPU_CHAR        *p_filename;
+    DROPBOX_FILE    *rx_file;
+
+    rx_file = p_user_ctx;
+    p_filename = rx_file->LocalFilename;
+
+
+    is_open = FSFile_IsOpen(p_filename,
+                           &fs_flags,
+                           &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+        goto exit;
+    }
+
+    if (is_open == DEF_NO) {
+        fs_flags = 0;
+        DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_WR);
+        DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_APPEND);
+        DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_CREATE);
+        p_file = FSFile_Open(p_filename,
+                             fs_flags,
+                            &err_fs);
+        if (err_fs != FS_ERR_NONE) {
+             goto exit;
+        }
+        rx_file->FilePtr = p_file;
+    } else {
+        p_file = rx_file->FilePtr;
+    }
+
+
+    len_wr = FSFile_Wr(p_file,
+                       p_data,
+                       data_len,
+                      &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+        goto exit_close;
+    }
+
+    if (last_chunk == DEF_YES) {
+        goto exit_close;
+    }
+
+    goto exit;
+
+exit_close:
+    FSFile_Close(p_file, &err_fs);
+exit:
+    return;
+
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Dropbox_FS_ReqBodyHook()
+*
+* Description : Specify the data to be sent in the Request body.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               p_data      Variable that will received the pointer to the data to include in the HTTP request.
+*
+*               p_buf       Pointer to HTTP transmit buffer.
+*
+*               buf_len     Length of space remaining in  the HTTP transmit buffer.
+*
+*               p_data_len  Length of the data.
+*
+* Return(s)   : DEF_YES, if all data to transmit was passed by the application
+*               DEF_NO,  if data still remaining to be sent.
+*
+* Caller(s)   : HTTPcReq_BodyData() via 'p_req->OnBodyTx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Dropbox_FS_ReqBodyHook (HTTPc_CONN_OBJ     *p_conn,
+                                             HTTPc_REQ_OBJ      *p_req,
+                                             void              **p_data,
+                                             CPU_CHAR           *p_buf,
+                                             CPU_INT16U          buf_len,
+                                             CPU_INT16U         *p_data_len)
+{
+    FS_ERR           err_fs;
+    CPU_SIZE_T       len_rd;
+    CPU_SIZE_T       file_rem;
+    CPU_SIZE_T       size;
+    FS_FILE         *p_file;
+    CPU_BOOLEAN      is_open;
+    CPU_BOOLEAN      finish;
+    FS_FLAGS         fs_flags;
+    CPU_CHAR        *p_filename;
+    DROPBOX_FILE    *tx_file;
+
+    tx_file = p_req->UserDataPtr;
+    p_filename = tx_file->LocalFilename;
+   *p_data     = DEF_NULL;
+
+    is_open = FSFile_IsOpen(p_filename,
+                           &fs_flags,
+                           &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+       *p_data_len = 0;
+        finish = DEF_YES;
+        goto exit;
+    }
+
+    if (is_open == DEF_NO) {
+        fs_flags = 0;
+        DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_RD);
+        DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_CREATE);
+        p_file = FSFile_Open(p_filename,
+                             fs_flags,
+                            &err_fs);
+        if (err_fs != FS_ERR_NONE) {
+            *p_data_len = 0;
+             finish = DEF_YES;
+             goto exit;
+        }
+        tx_file->FilePtr = p_file;
+    } else {
+        p_file = tx_file->FilePtr;
+    }
+
+    file_rem = p_file->Size - p_file->Pos;
+    if (file_rem <= 0) {
+        *p_data_len = 0;
+        finish = DEF_YES;
+        goto exit_close;
+    }
+
+    size = DEF_MIN(file_rem, buf_len);
+
+    len_rd = FSFile_Rd(p_file,
+                       p_buf,
+                       size,
+                      &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+       *p_data_len = 0;
+        finish = DEF_YES;
+        goto exit_close;
+    }
+
+   *p_data_len = len_rd;
+    finish = DEF_NO;
+    if (len_rd == file_rem) {
+        finish = DEF_YES;
+        goto exit_close;
+    }
+    goto exit;
+
+exit_close:
+    FSFile_Close(p_file, &err_fs);
+    p_req->UserDataPtr = DEF_NULL;
+exit:
+    return (finish);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Dropbox_Buf_ReqBodyHook()
+*
+* Description : Specify the data to be sent in the Request body.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               p_data      Variable that will received the pointer to the data to include in the HTTP request.
+*
+*               p_buf       Pointer to HTTP transmit buffer.
+*
+*               buf_len     Length of space remaining in  the HTTP transmit buffer.
+*
+*               p_data_len  Length of the data.
+*
+* Return(s)   : DEF_YES, if all data to transmit was passed by the application
+*               DEF_NO,  if data still remaining to be sent.
+*
+* Caller(s)   : HTTPcReq_BodyData() via 'p_req->OnBodyTx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static CPU_BOOLEAN  Dropbox_Buf_ReqBodyHook  (HTTPc_CONN_OBJ     *p_conn,
+                                              HTTPc_REQ_OBJ      *p_req,
+                                              void              **p_data,
+                                              CPU_CHAR           *p_buf,
+                                              CPU_INT16U          buf_len,
+                                              CPU_INT16U         *p_data_len)
+{
+    CPU_SIZE_T str_len;
+
+    *p_data = p_req->UserDataPtr;
+
+    str_len = Str_Len(*p_data);
+    *p_data_len = str_len;
+
+    p_req->UserDataPtr = DEF_NULL;
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       Dropbox_RespBodyHook()
+*
+* Description : Retrieve data in HTTP Response received.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection object.
+*
+*               p_req           Pointer to current HTTPc Request object.
+*
+*               content_type    HTTP Content Type of the HTTP Response body's data.
+*
+*               p_data          Pointer to a data piece of the HTTP Response body.
+*
+*               data_len        Length of the data piece received.
+*
+*               last_chunk      DEF_YES, if this is the last piece of data.
+*
+*                               DEF_NO,  if more data is up coming.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp_BodyStd()   via 'p_req->OnBodyRx()'
+*               HTTPcResp_BodyChunk() via 'p_req->OnBodyRx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  Dropbox_RespBodyHook (HTTPc_CONN_OBJ     *p_conn,
+                                    HTTPc_REQ_OBJ      *p_req,
+                                    HTTP_CONTENT_TYPE   content_type,
+                                    void               *p_data,
+                                    CPU_INT16U          data_len,
+                                    CPU_BOOLEAN         last_chunk)
+{
+    DROPBOX_CONN  *p_dropbox_conn;
+
+
+    p_dropbox_conn = (DROPBOX_CONN *)p_req->UserDataPtr;
+        if (p_dropbox_conn->RxDataFnct != DEF_NULL) {
+            p_dropbox_conn->RxDataFnct(p_dropbox_conn->RemoteFileName,
+                                       p_data,
+                                       data_len,
+                                       last_chunk,
+                                       p_dropbox_conn->UserCtxPtr);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     Dropbox_ConnCloseCallback()
+*
+* Description : Callback to notify application that an HTTP connection was closed.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection.
+*
+*               close_status    Status of the connection closing:
+*                                   HTTPc_CONN_CLOSE_STATUS_ERR_INTERNAL
+*                                   HTTPc_CONN_CLOSE_STATUS_SERVER
+*                                   HTTPc_CONN_CLOSE_STATUS_NO_PERSISTENT
+*                                   HTTPc_CONN_CLOSE_STATUS_APP
+*
+*               err             Error Code when connection was closed.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_conn->OnClose()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+static  void  Dropbox_ConnCloseCallback (HTTPc_CONN_OBJ           *p_conn,
+                                         HTTPc_CONN_CLOSE_STATUS   close_status,
+                                         HTTPc_ERR                 err)
+{
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      Dropbox_TransErrCallback()
+*
+* Description : Callback to notify application that an error occurred during an HTTP transaction.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               err_code    Error Code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnErr()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+static  void Dropbox_TransErrCallback (HTTPc_CONN_OBJ  *p_conn,
+                                       HTTPc_REQ_OBJ   *p_req,
+                                       HTTPc_ERR        err_code)
+{
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      Dropbox_ConnSecureCallback()
+*
+* Description : TODO
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               err_code    Error Code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnErr()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void Dropbox_ConnSecureCallback (HTTPc_CONN_OBJ  *p_conn,
+                                         HTTPc_REQ_OBJ   *p_req,
+                                         HTTPc_ERR        err_code)
+{
+
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/dropbox.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/dropbox.h
new file mode 100644
index 0000000..d297ae4
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/dropbox.h
@@ -0,0 +1,158 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   HTTP CLIENT DROPBOX MODULE
+*
+* Filename      : dropbox.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  DROPBOX_MODULE_PRESENT
+#define  DROPBOX_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*                                             FS MODULE
+*
+* Note(s): If the uC/FS is present in the project, you can enable it for the example application.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_APP_FS_MODULE_PRESENT   DEF_YES
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+#define  DROPBOX_CFG_CONN_BUF_SIZE              512u
+
+#define  DROPBOX_CFG_HDR_VAL_LEN_MAX            300u
+
+#define  DROPBOX_URL_LEN_MAX                     50u
+
+
+#define  DROPBOX_API_CONTENT_IPv4_ADDR         "23.23.153.198"
+#define  DROPBOX_API_IPv4_ADDR                 "50.19.116.212"
+
+#define  DROPBOX_API_CONTENT_HOSTNAME          "api-content.dropbox.com"
+#define  DROPBOX_API_HOSTAME                   "api.dropbox.com"
+
+#define  DROPBOX_URL_FILES_PUT                 "/1/files_put/auto/"
+#define  DROPBOX_URL_FILES_GET                 "/1/files/auto/"
+#define  DROPBOX_URL_FILES_OPS                 "/1/fileops/"
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  void         (*DROPBOX_RX_DATA)        (CPU_CHAR                  *remote_file_name,
+                                                 void                      *p_data,
+                                                 CPU_INT16U                 data_len,
+                                                 CPU_BOOLEAN                last_chunk,
+                                                 void                      *p_user_ctx);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+CPU_BOOLEAN  Dropbox_Upload_File   (CPU_CHAR              *p_remote_file_name,
+                                    CPU_CHAR              *p_local_file_name,
+                                    HTTP_CONTENT_TYPE      content_type,
+                                    CPU_SIZE_T             content_len,
+                                    CPU_CHAR              *p_access_token);
+
+CPU_BOOLEAN  Dropbox_Upload_Buf    (CPU_CHAR              *p_remote_file_name,
+                                    CPU_INT08U              *p_buf,
+                                    HTTP_CONTENT_TYPE      content_type,
+                                    CPU_SIZE_T             content_len,
+                                    CPU_CHAR              *p_access_token);
+
+CPU_BOOLEAN  Dropbox_Download_Buf  (CPU_CHAR              *p_remote_file_name,
+                                    CPU_CHAR              *p_access_token,
+                                    DROPBOX_RX_DATA        fnct,
+                                    void                  *p_ctx);
+
+CPU_BOOLEAN  Dropbox_Download_File (CPU_CHAR              *p_remote_file_name,
+                                    CPU_CHAR              *p_local_file_name,
+                                    CPU_CHAR              *p_access_token);
+
+CPU_BOOLEAN  Dropbox_Delete_File   (CPU_CHAR              *p_remote_file_name,
+                                    CPU_CHAR              *p_access_token);
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/soundcloud.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/soundcloud.c
new file mode 100644
index 0000000..3086124
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/soundcloud.c
@@ -0,0 +1,878 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT SOUNDCLOUD APPLICATION SOURCE CODE
+*
+* Filename      : soundcloud.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define  MICRIUM_SOURCE
+#define  SOUNDCLOUD_MODULE
+
+
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+
+#include  "soundcloud.h"
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+static  void         SoundCloud_ConnCloseCallback       (HTTPc_CONN_OBJ            *p_conn,
+                                                         HTTPc_CONN_CLOSE_STATUS    close_status,
+                                                         HTTPc_ERR                  err);
+
+static  void         SoundCloud_TransErrCallback        (HTTPc_CONN_OBJ            *p_conn,
+                                                         HTTPc_REQ_OBJ             *p_req,
+                                                         HTTPc_ERR                  err_code);
+
+static void          SoundCloud_RespBodyHook            (HTTPc_CONN_OBJ            *p_conn,
+                                                         HTTPc_REQ_OBJ             *p_req,
+                                                         HTTP_CONTENT_TYPE          content_type,
+                                                         void                      *p_data,
+                                                         CPU_INT16U                 data_len,
+                                                         CPU_INT32U                *data_len_read,
+                                                         CPU_BOOLEAN                last_chunk);
+
+static void          SoundCloud_RespHdrHook             (HTTPc_CONN_OBJ            *p_conn,
+                                                         HTTPc_REQ_OBJ             *p_req,
+                                                         HTTP_HDR_FIELD             hdr_field,
+                                                         CPU_CHAR                  *p_hdr_val,
+                                                         CPU_INT16U                 val_len);
+
+static enum mad_flow SoundCloud_MP3Decode_Input         (void                      *data,
+                                                         struct mad_stream         *stream);
+
+static enum mad_flow SoundCloud_MP3Decode_Output        (void                      *data,
+                                                         struct mad_header const   *header,
+                                                         struct mad_pcm            *pcm,
+                                                         struct mad_stream         *stream);
+
+static enum mad_flow SoundCloud_MP3Decode_Error         (void                      *data,
+                                                         struct mad_stream         *stream,
+                                                         struct mad_frame          *frame);
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  SOUNDCLOUD_POOL_BLK_NBR                  4
+#define  SOUNDCLOUD_TASK_PRIO                     5u                    /* Minimum task priority.   */
+#define  SOUNDCLOUD_TASK_STACK_SIZE               20*1024                   /* Minimum task stack size. */
+#define  SOUNDCLOUD_TASK_NAME                      "SoundCloud Task"           /* Task Name.               */
+
+#define  SOUNDCLOUD_Q_NAME      "SoundCloud Queue"
+
+KAL_Q_HANDLE          SoundCloudQ_Handle;
+
+MEM_POOL     SoundCloud_MsgPool;
+
+typedef struct buffer {
+  unsigned char const *start;
+  unsigned long length;
+}BUFFER;
+
+typedef struct stream_request {
+  CPU_CHAR URL[900];
+  CPU_CHAR Host[30];
+}STREAM_REQUEST;
+
+typedef struct soundcloud_msg {
+  CPU_CHAR   buffer[SOUNDCLOUD_CFG_CONN_BUF_SIZE];
+  CPU_INT32U buffer_len;
+}SOUNDCLOUD_MSG;
+
+STREAM_REQUEST request;
+
+//CPU_CHAR   buff[];
+
+
+#define  SOUNDCLOUD_TASK_MSGBUF_SEM_NAME             "SoundCloud Msg Buf Semaphore"
+
+KAL_SEM_HANDLE  SoundCloudTask_MsgBufSem_Handle;
+
+
+/*
+*********************************************************************************************************
+*                                           SoundCloud_GetStream()
+*
+* Description : Get Stream URL from SoundCloud Server
+*
+* Argument(s) : p_url     Pointer to the sender phone number
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : AppTaskStart().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN SoundCloud_GetStream    (CPU_CHAR         *p_url)
+{
+    HTTPc_CONN_OBJ        *p_conn;
+    HTTPc_REQ_OBJ         *p_req;
+    HTTPc_RESP_OBJ        *p_resp;
+    CPU_CHAR               buf[SOUNDCLOUD_CFG_CONN_BUF_SIZE];
+    CPU_SIZE_T             str_len;
+    CPU_BOOLEAN            result;
+    HTTPc_ERR              err;
+    CPU_INT08U             conn_retry_ctr;
+
+
+    p_conn = &SoundCloud_ConnTbl[0];
+    p_req  = &SoundCloud_ReqTbl[0];
+    p_resp = &SoundCloud_RespTbl[0];
+
+    result = DEF_FALSE;
+    conn_retry_ctr=0;
+                                                        /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+
+    HTTPc_ConnSetParam(         p_conn,
+                                HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       (void *)&SoundCloud_TransErrCallback,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+                                                      /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+    HTTPc_ReqSetParam(        p_req,
+                               HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      (void *)&SoundCloud_TransErrCallback,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam( p_req,
+                                HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+                      (void*)&SoundCloud_RespHdrHook,
+                               &err);
+             if (err != HTTPc_ERR_NONE) {
+                 return (DEF_FAIL);
+             }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(SOUNDCLOUD_API_HOSTNAME);
+    while (result != DEF_YES) {
+        result  = HTTPc_ConnOpen(p_conn,
+                                  buf,
+                                  SOUNDCLOUD_CFG_CONN_BUF_SIZE,
+                                  SOUNDCLOUD_API_HOSTNAME,
+                                  str_len,
+                                  HTTPc_FLAG_NONE,
+                                 &err);
+        if (err != HTTPc_ERR_NONE  ||
+            result == DEF_FAIL) {
+              if (conn_retry_ctr < SOUNDCLOUD_CONN_RETRY_MAX) {
+                  conn_retry_ctr++;
+              } else {
+                  return (DEF_FAIL);
+              }
+         }
+    }                                                           /* ---------------- SEND HTTP REQUEST ----------------- */
+    str_len = Str_Len(p_url);
+    result  = HTTPc_ReqSend(p_conn,
+                            p_req,
+                            p_resp,
+                             HTTP_METHOD_GET,
+                            p_url,
+                             str_len,
+                             HTTPc_FLAG_NONE,
+                            &err);
+    if (err != HTTPc_ERR_NONE ||
+        result != DEF_OK        ) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SoundCloud_PlayStream()
+*
+* Description : Send a SMS message
+*
+* Argument(s) : p_from_phone_number     Pointer to the sender phone number
+*
+*               p_to_phone_number       Pointer to the destination phone number
+*
+*               p_message               Pointer to the body of the message to be sent
+*
+*               p_account_id            Pointer to the account SID
+*
+*               p_auth_token            Pointer to the authentication token
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : AppTaskStart().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN SoundCloud_PlayStream    (CPU_CHAR        *p_host,
+                                      CPU_CHAR        *p_url,
+                                      CPU_CHAR        *p_buf)
+{
+    HTTPc_CONN_OBJ        *p_conn;
+    HTTPc_REQ_OBJ          *p_req;
+    HTTPc_RESP_OBJ         *p_resp;
+    CPU_CHAR               buf[SOUNDCLOUD_CFG_CONN_BUF_SIZE];
+    CPU_SIZE_T             str_len;
+    CPU_BOOLEAN            result;
+    HTTPc_ERR              err;
+    CPU_INT08U             conn_retry_ctr;
+
+
+    stream_buff.WrAddress = p_buf;
+    stream_buff.Start     = p_buf;
+    stream_buff.DecodingStarted = DEF_FALSE;
+
+    result = DEF_FALSE;
+
+    p_conn = &SoundCloud_ConnTbl[1];
+    p_req  = &SoundCloud_ReqTbl[1];
+    p_resp = &SoundCloud_RespTbl[1];
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+
+    HTTPc_ConnSetParam(        p_conn,
+                                HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       (void *)&SoundCloud_ConnCloseCallback,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                               /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+    HTTPc_ReqSetParam(        p_req,
+                               HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      (void *)&SoundCloud_RespBodyHook,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+
+    HTTPc_ReqSetParam(        p_req,
+                               HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      (void *)&SoundCloud_TransErrCallback,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+        HTTPc_ReqSetParam(        p_req,
+                               HTTPc_PARAM_TYPE_TRANS_COMPLETE_CALLBACK,
+                      (void *)&SoundCloud_ConnCloseCallback,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+#endif
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(p_host);
+    while (result != DEF_YES) {
+        result  = HTTPc_ConnOpen(p_conn,
+                                  buf,
+                                  SOUNDCLOUD_CFG_CONN_BUF_SIZE,
+                                  p_host,
+                                  str_len,
+                                  HTTPc_FLAG_NONE,
+                                 &err);
+        if (err != HTTPc_ERR_NONE  ||
+            result == DEF_FAIL) {
+              if (conn_retry_ctr < SOUNDCLOUD_CONN_RETRY_MAX) {
+                  conn_retry_ctr++;
+              } else {
+                  return (DEF_FAIL);
+              }
+         }
+    }
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    str_len = Str_Len(p_url);
+    result  = HTTPc_ReqSend(p_conn,
+                            p_req,
+                            p_resp,
+                             HTTP_METHOD_GET,
+                            p_url,
+                             str_len,
+                             HTTPc_FLAG_REQ_NO_BLOCK,
+                            &err);
+    if (err != HTTPc_ERR_NONE ||
+        result != DEF_OK        ) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*                                        SoundCloud_RespHdrHook()
+*
+* Description : Retrieve header fields in the HTTP response received.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               hdr_field   HTTP header type of the header field received in the HTTP response.
+*
+*               p_hdr_val   Pointer to the value string received in the Response header field.
+*
+*               val_len     Length of the value string.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp_ParseHdr() via 'p_req->OnHdrRx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  SoundCloud_RespHdrHook (HTTPc_CONN_OBJ    *p_conn,
+                             HTTPc_REQ_OBJ     *p_req,
+                             HTTP_HDR_FIELD     hdr_field,
+                             CPU_CHAR          *p_hdr_val,
+                             CPU_INT16U         val_len)
+{
+  CPU_CHAR  *str_parse;
+  CPU_INT16U host_len;
+
+  if (hdr_field == HTTP_HDR_FIELD_LOCATION) {
+      if (Str_Cmp_N(p_hdr_val, "https://",8)==0) {
+          p_hdr_val +=8;
+          val_len -=8;
+          str_parse =  Str_Char(p_hdr_val,ASCII_CHAR_SOLIDUS);
+          host_len =  str_parse - p_hdr_val;
+          Str_Copy_N(request.Host, p_hdr_val,host_len);
+          val_len -= host_len;
+          Str_Copy_N(request.URL, str_parse, val_len);
+      }
+  }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       SoundCloud_RespBodyHook()
+*
+* Description : Retrieve data in HTTP Response received.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection object.
+*
+*               p_req           Pointer to current HTTPc Request object.
+*
+*               content_type    HTTP Content Type of the HTTP Response body's data.
+*
+*               p_data          Pointer to a data piece of the HTTP Response body.
+*
+*               data_len        Length of the data piece received.
+*
+*               last_chunk      DEF_YES, if this is the last piece of data.
+*
+*                               DEF_NO,  if more data is up coming.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp_BodyStd()   via 'p_req->OnBodyRx()'
+*               HTTPcResp_BodyChunk() via 'p_req->OnBodyRx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+
+void  SoundCloud_RespBodyHook   (HTTPc_CONN_OBJ     *p_conn,
+                                 HTTPc_REQ_OBJ      *p_req,
+                                 HTTP_CONTENT_TYPE   content_type,
+                                 void               *p_data,
+                                 CPU_INT16U          data_len,
+                                  CPU_INT32U         *data_len_read,
+                                 CPU_BOOLEAN         last_chunk)
+{
+  KAL_ERR err_kal;
+  SOUNDCLOUD_MSG *p_msg;
+  LIB_ERR     err_lib;
+
+
+    KAL_SemPend(SoundCloudTask_MsgBufSem_Handle,
+                KAL_OPT_PEND_NON_BLOCKING,
+                1,
+                &err_kal);
+
+    switch (err_kal){
+        case KAL_ERR_NONE:
+
+              p_msg = (SOUNDCLOUD_MSG *)Mem_PoolBlkGet(&SoundCloud_MsgPool,
+                                                        sizeof(SOUNDCLOUD_MSG),
+                                                       &err_lib);
+
+              Mem_Copy(p_msg->buffer, p_data, data_len);
+              p_msg->buffer_len = data_len;
+
+              KAL_QPost( SoundCloudQ_Handle,
+                         p_msg,
+                         KAL_OPT_NONE,
+                       &err_kal);
+
+              *data_len_read = data_len;
+             break;
+
+        default:
+            *data_len_read = 0;
+            break;
+
+     }
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                     SoundCloud_ConnCloseCallback()
+*
+* Description : Callback to notify application that an HTTP connection was closed.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection.
+*
+*               close_status    Status of the connection closing:
+*                                   HTTPc_CONN_CLOSE_STATUS_ERR_INTERNAL
+*                                   HTTPc_CONN_CLOSE_STATUS_SERVER
+*                                   HTTPc_CONN_CLOSE_STATUS_NO_PERSISTENT
+*                                   HTTPc_CONN_CLOSE_STATUS_APP
+*
+*               err             Error Code when connection was closed.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_conn->OnClose()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+static void  SoundCloud_ConnCloseCallback (HTTPc_CONN_OBJ             *p_conn,
+                                           HTTPc_CONN_CLOSE_STATUS   close_status,
+                                           HTTPc_ERR                 err)
+{
+
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      SoundCloud_TransErrCallback()
+*
+* Description : Callback to notify application that an error occurred during an HTTP transaction.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               err_code    Error Code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnErr()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+static void SoundCloud_TransErrCallback (HTTPc_CONN_OBJ  *p_conn,
+                                         HTTPc_REQ_OBJ   *p_req,
+                                         HTTPc_ERR        err_code)
+{
+
+}
+#endif
+
+void SoundCloudTask_Init(void)
+{
+    KAL_TASK_HANDLE   task_handle;
+    KAL_ERR           err_kal;
+    LIB_ERR           err_lib;
+    OS_SEM           *MsgBufSem;
+
+    SoundCloudTask_MsgBufSem_Handle = KAL_SemCreate( SOUNDCLOUD_TASK_MSGBUF_SEM_NAME,
+                                                     DEF_NULL,
+                                                    &err_kal);
+
+    MsgBufSem = SoundCloudTask_MsgBufSem_Handle.SemObjPtr;
+
+    MsgBufSem->Ctr = SOUNDCLOUD_POOL_BLK_NBR;
+
+                                                                /* ------- ALLOCATE MEMORY SPACE FOR SoundCloud TASK  ------ */
+    task_handle = KAL_TaskAlloc((const  CPU_CHAR *)SOUNDCLOUD_TASK_NAME,
+                                                   DEF_NULL,
+                                                   SOUNDCLOUD_TASK_STACK_SIZE,
+                                                   DEF_NULL,
+                                                  &err_kal);
+
+                                                                    /* ---------------- CREATE MSG Q ------------------ */
+    SoundCloudQ_Handle = KAL_QCreate(SOUNDCLOUD_Q_NAME,
+                                     SOUNDCLOUD_POOL_BLK_NBR,
+                                     DEF_NULL,
+                                     &err_kal);
+
+                                                                /* ---------------- CREATE SOUNDCLOUD TASK ----------------- */
+    KAL_TaskCreate(task_handle,
+                   SoundCloudTask,
+                   DEF_NULL,
+                   SOUNDCLOUD_TASK_PRIO,
+                   DEF_NULL,
+                   &err_kal);
+
+    Mem_PoolCreate(&SoundCloud_MsgPool,
+                    DEF_NULL,
+                    SOUNDCLOUD_POOL_BLK_NBR* sizeof(SOUNDCLOUD_MSG),
+                    SOUNDCLOUD_POOL_BLK_NBR,
+                    sizeof(SOUNDCLOUD_MSG),
+                    sizeof(CPU_SIZE_T),
+                    0,
+                    &err_lib);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          SoundCloudTask()
+*
+* Description : SoundCloud Mp3 playback main loop.
+*
+* Argument(s) : p_data      Pointer to task initialization (required by uC/OS-III).
+*
+* Return(s)   : None.
+*
+* Caller(s)   :
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void SoundCloudTask(void *p_data)
+{
+
+   (void)&p_data;
+
+    audio_start();
+
+    SoundCloud_MP3Decode();
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                          SoundCloud_MP3Decode()
+*
+* Description : SoundCloud Mp3 playback main loop.
+*
+* Argument(s) : start      Pointer to start of the MP3 buffer
+*
+*               length     Length of the MP3 buffer
+*
+* Return(s)   : None.
+*
+* Caller(s)   :
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+CPU_INT32U SoundCloud_MP3Decode()
+{
+    MAD_DECODER decoder;
+    CPU_INT32U result;
+
+
+     /* configure input, output, and error functions */
+
+    mad_decoder_init(&decoder,
+                     0,
+                     SoundCloud_MP3Decode_Input,
+                     0 /* header */,
+                     0 /* filter */,
+                     SoundCloud_MP3Decode_Output,
+                     SoundCloud_MP3Decode_Error,
+                     0 /* message */);
+
+    /* start decoding */
+
+    result = mad_decoder_run(&decoder, MAD_DECODER_MODE_SYNC);
+
+    /* release the decoder */
+
+    mad_decoder_finish(&decoder);
+
+    return result;
+}
+
+
+/*
+ * This is the input callback. The purpose of this callback is to (re)fill
+ * the stream buffer which is to be decoded. In this example, an entire file
+ * has been mapped into memory, so we just call mad_stream_buffer() with the
+ * address and length of the mapping. When this callback is called a second
+ * time, we are finished decoding.
+ */
+
+static enum mad_flow SoundCloud_MP3Decode_Input(void              *data,
+                                                struct mad_stream *stream)
+{
+    KAL_ERR         err_kal;
+    SOUNDCLOUD_MSG *p_msg;
+    LIB_ERR         err_lib;
+    CPU_INT32U      leftovers_len;
+
+
+    leftovers_len = 0;
+
+    if (stream_buff.DecodingStarted == DEF_TRUE) {
+
+        leftovers_len = stream->bufend - stream->this_frame;
+
+        stream_buff.WrAddress = stream_buff.Start;
+
+        Mem_Copy(stream_buff.Start, stream->this_frame, leftovers_len );
+
+        stream_buff.WrAddress = stream_buff.Start + leftovers_len;
+
+        Mem_PoolBlkFree(&SoundCloud_MsgPool,
+                         stream_buff.p_msg,
+                        &err_lib);
+
+        KAL_SemPost( SoundCloudTask_MsgBufSem_Handle,
+                     KAL_OPT_POST_NONE,
+                   &err_kal);
+    }
+
+
+    p_msg =   (SOUNDCLOUD_MSG*)KAL_QPend(SoundCloudQ_Handle,
+                                         KAL_OPT_PEND_BLOCKING,
+                                         0,
+                                         &err_kal);
+
+
+    Mem_Copy(stream_buff.WrAddress, p_msg->buffer, p_msg->buffer_len + leftovers_len);
+    stream_buff.p_msg = p_msg;
+
+    mad_stream_buffer(stream,stream_buff.Start, p_msg->buffer_len + leftovers_len);
+
+    stream_buff.DecodingStarted = DEF_TRUE;
+
+    return MAD_FLOW_CONTINUE;
+}
+
+
+static enum mad_flow SoundCloud_MP3Decode_Error(void              *data,
+                                                struct mad_stream *stream,
+                                                struct mad_frame  *frame)
+{
+  return MAD_FLOW_CONTINUE;
+}
+
+/*
+ * This is the output callback function. It is called after each frame of
+ * MPEG audio data has been completely decoded. The purpose of this callback
+ * is to output (or play) the decoded PCM audio.
+ */
+
+static enum mad_flow SoundCloud_MP3Decode_Output(void                    *data,
+                                                 struct mad_header const *header,
+                                                 struct mad_pcm          *pcm,
+                                                 struct mad_stream       *stream)
+{
+  CPU_INT32U  nchannels;
+  CPU_INT32U  nsamples;
+  CPU_INT32U *left_ch;
+  CPU_INT32U *right_ch;
+  KAL_ERR     err_kal;
+  CPU_INT16U  index;
+  CPU_INT32U  loop_factor;
+  CPU_INT32U  temp_buff[2304];
+
+
+
+  loop_factor = 1152;
+
+  /* pcm->samplerate contains the sampling frequency */
+
+  nchannels = pcm->channels;
+  nsamples  = pcm->length;
+  left_ch   = pcm->samples[0];
+  right_ch  = pcm->samples[1];
+
+
+  while (nsamples != 0) {
+
+    if (nsamples < loop_factor) {
+        loop_factor = nsamples;
+    }
+
+
+    if(AUDIO_BUFFER_HANDLER_CHECK_STATUS(AUDIO_BUFFER_HANDLER_TX_STARTED)) {
+
+       AudioBufferHandler_WriteSignalWait(&err_kal);
+    }
+
+    for (index=0;index < loop_factor;index++) {
+
+         temp_buff[2*index]   = (CPU_INT32U) (*left_ch++);
+         temp_buff[2*index+1] = (CPU_INT32U) (*right_ch++);
+    }
+
+    vfnAudioBufferHandler_WriteBuffer(&temp_buff[0],2304);
+
+    nsamples -= loop_factor;
+  }
+
+  return MAD_FLOW_CONTINUE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        SoundCloud_PlayTrack()
+*
+* Description : Retrieve header fields in the HTTP response received.
+*
+* Argument(s) : track_id      ID of the track to be played.
+*
+*               client_id     Your SoundCloud ClientId.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void SoundCloud_PlaytTrack(CPU_CHAR *track_id,
+                           CPU_CHAR *client_id)
+{
+    CPU_CHAR *p_buf;
+    LIB_ERR   mem_err;
+    CPU_CHAR  url[SOUNDCLOUD_URL_LEN_MAX];
+
+    Mem_Clr(&url[0], SOUNDCLOUD_URL_LEN_MAX);
+
+    Str_Copy(&url[0], SOUNDCLOUD_URL_TRACKS);
+    Str_Cat( &url[0], track_id);
+    Str_Cat( &url[0], "/stream?client_id=");
+    Str_Cat( &url[0], client_id);
+
+
+    p_buf = Mem_HeapAlloc((SOUNDCLOUD_CFG_CONN_BUF_SIZE+850),
+                          DEF_NULL, DEF_NULL,
+                          &mem_err);
+
+    SoundCloud_GetStream(&url[0]);
+    SoundCloud_PlayStream(request.Host,
+                          request.URL,
+                          p_buf);
+
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/soundcloud.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/soundcloud.h
new file mode 100644
index 0000000..86f746b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/soundcloud.h
@@ -0,0 +1,167 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   HTTP CLIENT SOUNDCLOUD SOURCE CODE
+*
+* Filename      : soundcloud.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  SOUNDCLOUD_MODULE_PRESENT
+#define  SOUNDCLOUD_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef   SOUNDCLOUD_MODULE
+#define  SOUNDCLOUD_EXT
+#else
+#define  SOUNDCLOUD_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void          SoundCloudTask_Init                      (void );
+
+void          SoundCloudTask                           (void            *p_data);
+
+
+typedef struct stream_buffer {
+  CPU_INT08U *WrAddress;
+  CPU_INT08U *Start;
+  CPU_BOOLEAN DecodingStarted;
+  void *p_msg;
+} STREAM_BUFFER;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+#define  SOUNDCLOUD_CFG_REQ_NBR_MAX                        2u
+
+#define  SOUNDCLOUD_CFG_CONN_NBR_MAX                       3u
+#define  SOUNDCLOUD_CFG_CONN_BUF_SIZE                   5*1460u
+
+#define  SOUNDCLOUD_CFG_HDR_NBR_MAX                       10u
+#define  SOUNDCLOUD_CFG_HDR_VAL_LEN_MAX                  300u
+
+#define  SOUNDCLOUD_URL_LEN_MAX                          100u
+
+#define  SOUNDCLOUD_CONN_RETRY_MAX                       5
+
+
+#define  SOUNDCLOUD_API_HOSTNAME                   "api.soundcloud.com"
+
+#define  SOUNDCLOUD_URL_TRACKS                     "/tracks/"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+SOUNDCLOUD_EXT   CPU_INT16U            SoundCloud_Buf[40];
+
+SOUNDCLOUD_EXT   STREAM_BUFFER         stream_buff;
+
+SOUNDCLOUD_EXT   HTTPc_CONN_OBJ        SoundCloud_ConnTbl[SOUNDCLOUD_CFG_CONN_NBR_MAX];
+SOUNDCLOUD_EXT   HTTPc_REQ_OBJ         SoundCloud_ReqTbl[SOUNDCLOUD_CFG_REQ_NBR_MAX];
+SOUNDCLOUD_EXT   HTTPc_RESP_OBJ        SoundCloud_RespTbl[SOUNDCLOUD_CFG_REQ_NBR_MAX];
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+CPU_BOOLEAN SoundCloud_GetStream      (CPU_CHAR           *p_url);
+
+CPU_BOOLEAN SoundCloud_PlayStream     (CPU_CHAR           *p_host,
+                                       CPU_CHAR           *p_url,
+                                       CPU_CHAR           *p_buf);
+
+CPU_INT32U  SoundCloud_MP3Decode      (void );
+
+void        SoundCloud_PlaytTrack     (CPU_CHAR           *track_id,
+                                       CPU_CHAR           *client_id);
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* SOUNDCLOUD_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/twilio.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/twilio.c
new file mode 100644
index 0000000..02b01c5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/twilio.c
@@ -0,0 +1,530 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT TWILIO APPLICATION SOURCE CODE
+*
+* Filename      : twilio.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define  MICRIUM_SOURCE
+#define  TWILIO_MODULE
+
+
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+
+#include  "twilio.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+static  CPU_INT08U   Twilio_ReqPrepareFormApp       (HTTPc_FORM_TBL_FIELD     **p_form_tbl,
+                                                     CPU_CHAR                  *p_from_phone_number,
+                                                     CPU_CHAR                  *p_to_phone_number,
+                                                     CPU_CHAR                  *p_message);
+
+#ifdef HTTPc_TASK_MODULE_EN
+static  void         Twilio_ConnCloseCallback       (HTTPc_CONN_OBJ            *p_conn,
+                                                     HTTPc_CONN_CLOSE_STATUS    close_status,
+                                                     HTTPc_ERR                  err);
+
+
+static  void         Twilio_TransErrCallback        (HTTPc_CONN_OBJ            *p_conn,
+                                                     HTTPc_REQ_OBJ             *p_req,
+                                                     HTTPc_ERR                  err_code);
+
+static  void         Twilio_ConnSecureCallback      (HTTPc_CONN_OBJ            *p_conn,
+                                                     HTTPc_REQ_OBJ             *p_req,
+                                                     HTTPc_ERR                  err_code);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           Twilio_SendSMS()
+*
+* Description : Send a SMS message
+*
+* Argument(s) : p_from_phone_number     Pointer to the sender phone number
+*
+*               p_to_phone_number       Pointer to the destination phone number
+*
+*               p_message               Pointer to the body of the message to be sent
+*
+*               p_account_id            Pointer to the account SID
+*
+*               p_auth_token            Pointer to the authentication token
+*
+* Return(s)   : DEF_OK,   if HTTPc transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : AppTaskStart().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+CPU_BOOLEAN Twilio_SendSMS    (CPU_CHAR         *p_from_phone_number,
+                               CPU_CHAR         *p_to_phone_number,
+                               CPU_CHAR         *p_message,
+                               CPU_CHAR         *p_account_id,
+                               CPU_CHAR         *p_auth_token)
+
+{
+    CPU_CHAR               url[TWILIO_URL_LEN_MAX];
+    HTTPc_CONN_OBJ         http_conn;
+    HTTPc_REQ_OBJ          http_req;
+    HTTPc_RESP_OBJ         http_resp;
+    CPU_INT08U             form_nbr;
+    HTTPc_FORM_TBL_FIELD  *p_form_tbl;
+    HTTP_CONTENT_TYPE      content_type;
+    HTTPc_PARAM_TBL        tbl_obj;
+    CPU_CHAR               buf[TWILIO_CFG_CONN_BUF_SIZE];
+    CPU_SIZE_T             str_len;
+    CPU_BOOLEAN            result;
+    CPU_CHAR               credentials[100];
+    CPU_CHAR               credentials_b64[100];
+    NET_ERR                err_net;
+    HTTPc_ERR              err;
+    HTTPc_HDR              hdr;
+    CPU_CHAR               hdr_val[TWILIO_CFG_HDR_VAL_LEN_MAX];
+
+
+    Mem_Clr(url, TWILIO_URL_LEN_MAX);
+    Mem_Clr(&http_conn, sizeof(http_conn));
+    Mem_Clr(&http_req,  sizeof(http_req));
+    Mem_Clr(&http_resp, sizeof(http_resp));
+    Mem_Clr(hdr_val,    TWILIO_CFG_HDR_VAL_LEN_MAX);
+                                                                /* ------------------- SET THE URL -------------------- */
+    Str_Copy_N(&url[0],TWILIO_URL_MESSAGES,TWILIO_URL_LEN_MAX);
+    Str_Cat_N( &url[0],p_account_id       , TWILIO_URL_LEN_MAX);
+    Str_Cat_N( &url[0],"/Messages"        , TWILIO_URL_LEN_MAX);
+
+
+                                                                /* --------- PREPARE THE AUTHORIZATION HEADER --------- */
+    Str_Copy(&credentials[0], p_account_id);
+    Str_Cat( &credentials[0], ":");
+    Str_Cat( &credentials[0], p_auth_token);
+
+    NetUtil_Base64Encode (&credentials[0],
+                          Str_Len(&credentials[0]),
+                          &credentials_b64[0],
+                          100,
+                          &err_net);
+
+    Str_Cat_N(hdr_val, "Basic ",TWILIO_CFG_HDR_VAL_LEN_MAX);
+    Str_Cat_N(hdr_val, &credentials_b64[0], TWILIO_CFG_HDR_VAL_LEN_MAX);
+
+    hdr.ValPtr   = hdr_val;
+    hdr.ValLen   = Str_Len_N(hdr_val, TWILIO_CFG_HDR_VAL_LEN_MAX);
+    hdr.HdrField = HTTP_HDR_FIELD_AUTHORIZATION;
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(&http_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(&http_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------------- PREPARE FORM ------------------- */
+    form_nbr = Twilio_ReqPrepareFormApp(&p_form_tbl,
+                                         p_from_phone_number,
+                                         p_to_phone_number,
+                                         p_message);
+    if (form_nbr <= 0) {
+    return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(        &http_conn,
+                                HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       (void *)&Twilio_ConnCloseCallback,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+    HTTPc_ConnSetParam(        &http_conn,
+                                HTTPc_PARAM_TYPE_SECURE_TRUST_CALLBACK,
+                       (void *)&Twilio_ConnSecureCallback,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ----------- SET REQUEST BODY PARAMETERS ------------ */
+    content_type = HTTP_CONTENT_TYPE_APP_FORM;
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE,
+                      &content_type,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    tbl_obj.EntryNbr = form_nbr;
+    tbl_obj.TblPtr   = (void *)p_form_tbl;
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_FORM_TBL,
+                      &tbl_obj,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------ SET REQ/HDR PARAM          ----------- */
+    tbl_obj.EntryNbr = 1;
+    tbl_obj.TblPtr = &hdr;
+    HTTPc_ReqSetParam(&http_req,
+                       HTTPc_PARAM_TYPE_REQ_HDR_TBL,
+                      &tbl_obj,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#if 0
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+    HTTPc_ReqSetParam(        &http_req,
+                               HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      (void *)&Twilio_RespBodyHook,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam(        &http_req,
+                               HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      (void *)&Twilio_TransErrCallback,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(TWILIO_API_HOSTNAME);
+    result  = HTTPc_ConnOpen(&http_conn,
+                              buf,
+                              TWILIO_CFG_CONN_BUF_SIZE,
+                              TWILIO_API_HOSTNAME,
+                              str_len,
+                              HTTPc_FLAG_NONE,
+                             &err);
+    if (err != HTTPc_ERR_NONE ||
+        result != DEF_OK        ) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    str_len = Str_Len(&url[0]);
+    result  = HTTPc_ReqSend(&http_conn,
+                            &http_req,
+                            &http_resp,
+                             HTTP_METHOD_POST,
+                            &url[0],
+                             str_len,
+                             HTTPc_FLAG_NONE,
+                            &err);
+    if (err != HTTPc_ERR_NONE ||
+        result != DEF_OK        ) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*                                      Twilio_ReqPrepareFormApp()
+*
+* Description : Configure the application type form table.
+*
+* Argument(s) : p_form_tbl              Variable that will received the pointer to the form table.
+*
+*               p_from_phone_number     Pointer to the sender phone number
+*
+*               p_to_phone_number       Pointer to the destination phone number
+*
+*               p_message               Pointer to the body of the message to be sent
+*
+* Return(s)   : Number of fields in the form table.
+*
+* Caller(s)   : Twilio_SendSMS().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_INT08U  Twilio_ReqPrepareFormApp (HTTPc_FORM_TBL_FIELD  **p_form_tbl,
+                                              CPU_CHAR               *p_from_phone_number,
+                                              CPU_CHAR               *p_to_phone_number,
+                                              CPU_CHAR               *p_message)
+{
+    HTTPc_FORM_TBL_FIELD  *p_tbl;
+    HTTPc_KEY_VAL         *p_kvp;
+    HTTPc_ERR              httpc_err;
+
+
+    p_tbl = &Twilio_FormTbl[0];
+
+                                                                /* --------------- ADD FIRST FORM FIELD --------------- */
+    p_kvp          = &Twilio_FormKeyValTbl[0];
+    p_kvp->KeyPtr  = &Twilio_FormKeyStrTbl[0][0];
+    p_kvp->ValPtr  = &Twilio_FormValStrTbl[0][0];
+
+    p_kvp->KeyLen = Str_Len("From");
+    p_kvp->ValLen = Str_Len(p_from_phone_number);
+
+    (void)Str_Copy_N(p_kvp->KeyPtr, "From",               p_kvp->KeyLen);
+    (void)Str_Copy_N(p_kvp->ValPtr, p_from_phone_number,  p_kvp->ValLen);
+
+
+    HTTPc_FormAddKeyVal(p_tbl, p_kvp, &httpc_err);
+
+                                                                /* -------------- ADD SECOND FORM FIELD --------------- */
+    p_tbl++;
+    p_kvp++;
+
+    p_kvp->KeyPtr    = &Twilio_FormKeyStrTbl[1][0];
+    p_kvp->ValPtr    = &Twilio_FormValStrTbl[1][0];
+
+    p_kvp->KeyLen = Str_Len("To");
+    p_kvp->ValLen = Str_Len(p_to_phone_number);
+
+   (void)Str_Copy_N(p_kvp->KeyPtr, "To",              p_kvp->KeyLen);
+   (void)Str_Copy_N(p_kvp->ValPtr, p_to_phone_number, p_kvp->ValLen);
+
+    HTTPc_FormAddKeyVal(p_tbl, p_kvp, &httpc_err);
+
+                                                                /* --------------- ADD THIRD FORM FIELD --------------- */
+    p_tbl++;
+    p_kvp++;
+
+    p_kvp->KeyPtr    = &Twilio_FormKeyStrTbl[2][0];
+    p_kvp->ValPtr    = &Twilio_FormValStrTbl[2][0];
+
+    p_kvp->KeyLen = Str_Len("Body");
+    p_kvp->ValLen = Str_Len(p_message);
+
+    (void)Str_Copy_N(p_kvp->KeyPtr, "Body",    p_kvp->KeyLen);
+    (void)Str_Copy_N(p_kvp->ValPtr, p_message, p_kvp->ValLen);
+
+    HTTPc_FormAddKeyVal(p_tbl, p_kvp, &httpc_err);
+
+   *p_form_tbl = &Twilio_FormTbl[0];
+
+    return (3);
+}
+#endif
+
+#if 0
+/*
+*********************************************************************************************************
+*                                       Twilio_RespBodyHook()
+*
+* Description : Retrieve data in HTTP Response received.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection object.
+*
+*               p_req           Pointer to current HTTPc Request object.
+*
+*               content_type    HTTP Content Type of the HTTP Response body's data.
+*
+*               p_data          Pointer to a data piece of the HTTP Response body.
+*
+*               data_len        Length of the data piece received.
+*
+*               last_chunk      DEF_YES, if this is the last piece of data.
+*
+*                               DEF_NO,  if more data is up coming.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp_BodyStd()   via 'p_req->OnBodyRx()'
+*               HTTPcResp_BodyChunk() via 'p_req->OnBodyRx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  Twilio_RespBodyHook   (HTTPc_CONN_OBJ     *p_conn,
+                             HTTPc_REQ_OBJ      *p_req,
+                             HTTP_CONTENT_TYPE   content_type,
+                             void               *p_data,
+                             CPU_INT16U          data_len,
+                             CPU_BOOLEAN         last_chunk)
+{
+    CPU_CHAR  *p_data_str;
+
+
+    p_data_str = &Twilio_Buf[0];
+
+    Mem_Copy(p_data_str, p_data, data_len);
+
+    p_data_str +=  data_len;
+   *p_data_str  = '\0';
+    p_data_str  = &Twilio_Buf[0];
+
+    TWILIO_TRACE_INFO(("%s", p_data_str));
+
+
+    if (last_chunk == DEF_YES) {
+
+        TWILIO_TRACE_INFO(("\n\r"));
+    }
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                     Twilio_ConnCloseCallback()
+*
+* Description : Callback to notify application that an HTTP connection was closed.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection.
+*
+*               close_status    Status of the connection closing:
+*                                   HTTPc_CONN_CLOSE_STATUS_ERR_INTERNAL
+*                                   HTTPc_CONN_CLOSE_STATUS_SERVER
+*                                   HTTPc_CONN_CLOSE_STATUS_NO_PERSISTENT
+*                                   HTTPc_CONN_CLOSE_STATUS_APP
+*
+*               err             Error Code when connection was closed.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_conn->OnClose()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+static void  Twilio_ConnCloseCallback (HTTPc_CONN_OBJ             *p_conn,
+                                       HTTPc_CONN_CLOSE_STATUS   close_status,
+                                       HTTPc_ERR                 err)
+{
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      Twilio_TransErrCallback()
+*
+* Description : Callback to notify application that an error occurred during an HTTP transaction.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               err_code    Error Code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnErr()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+static void Twilio_TransErrCallback (HTTPc_CONN_OBJ  *p_conn,
+                                     HTTPc_REQ_OBJ   *p_req,
+                                     HTTPc_ERR        err_code)
+{
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      Twilio_ConnSecureCallback()
+*
+* Description :
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               err_code    Error Code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnErr()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static void Twilio_ConnSecureCallback (HTTPc_CONN_OBJ  *p_conn,
+                                       HTTPc_REQ_OBJ   *p_req,
+                                       HTTPc_ERR        err_code)
+{
+
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/twilio.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/twilio.h
new file mode 100644
index 0000000..7e9b2b8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Add-on/twilio.h
@@ -0,0 +1,166 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   HTTP CLIENT TEST SOURCE CODE
+*
+* Filename      : twilio.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  TWILIO_MODULE_PRESENT
+#define  TWILIO_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef   TWILIO_MODULE
+#define  TWILIO_EXT
+#else
+#define  TWILIO_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  TWILIO_CFG_REQ_NBR_MAX                        2u
+
+#define  TWILIO_CFG_CONN_NBR_MAX                       3u
+#define  TWILIO_CFG_CONN_BUF_SIZE                   4096u
+
+#define  TWILIO_CFG_HDR_NBR_MAX                       10u
+#define  TWILIO_CFG_HDR_VAL_LEN_MAX                  300u
+
+#define  TWILIO_CFG_FORM_BUF_SIZE                    256u
+#define  TWILIO_CFG_FORM_FIELD_NBR_MAX                 3u
+#define  TWILIO_CFG_FORM_FIELD_KEY_LEN_MAX           100u
+#define  TWILIO_CFG_FORM_FIELD_VAL_LEN_MAX           200u
+#define  TWILIO_CFG_FORM_MULTIPART_NAME_LEN_MAX      100u
+#define  TWILIO_CFG_FORM_MULTIPART_FILENAME_LEN_MAX  100u
+
+#define  TWILIO_URL_LEN_MAX                          100u
+
+#define  TWILIO_API_HOSTNAME                   "api.twilio.com"
+
+#define  TWILIO_URL_MESSAGES                   "/2010-04-01/Accounts/"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+TWILIO_EXT   CPU_CHAR             Twilio_Buf[1024];
+
+
+TWILIO_EXT  CPU_CHAR              Twilio_FormBuf[TWILIO_CFG_FORM_BUF_SIZE];
+
+TWILIO_EXT  HTTPc_KEY_VAL         Twilio_FormKeyValTbl[TWILIO_CFG_FORM_FIELD_NBR_MAX];
+TWILIO_EXT  CPU_CHAR              Twilio_FormKeyStrTbl[2*TWILIO_CFG_FORM_FIELD_NBR_MAX][TWILIO_CFG_FORM_FIELD_KEY_LEN_MAX];
+TWILIO_EXT  CPU_CHAR              Twilio_FormValStrTbl[2*TWILIO_CFG_FORM_FIELD_NBR_MAX][TWILIO_CFG_FORM_FIELD_VAL_LEN_MAX];
+TWILIO_EXT  HTTPc_FORM_TBL_FIELD  Twilio_FormTbl[TWILIO_CFG_FORM_FIELD_NBR_MAX];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+CPU_BOOLEAN Twilio_SendSMS        (CPU_CHAR           *p_from_phone_number,
+                                   CPU_CHAR           *p_to_phone_number,
+                                   CPU_CHAR           *p_message,
+                                   CPU_CHAR           *p_account_id,
+                                   CPU_CHAR           *p_auth_token);
+
+
+
+void        Twilio_RespBodyHook   (HTTPc_CONN_OBJ     *p_conn,
+                                   HTTPc_REQ_OBJ      *p_req,
+                                   HTTP_CONTENT_TYPE   content_type,
+                                   void               *p_data,
+                                   CPU_INT16U          data_len,
+                                   CPU_BOOLEAN         last_chunk);
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* TWILIO_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Cfg/Template/http-c_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Cfg/Template/http-c_cfg.c
new file mode 100644
index 0000000..65cbf0c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Cfg/Template/http-c_cfg.c
@@ -0,0 +1,155 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 HTTP CLIENT CONFIGURATION FILE
+*
+* Filename      : http-c_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) All values that are used in this file and are defined in other header files should be
+*               included in this file. Some values could be located in the same file such as task priority
+*               and stack size. This template file assume that the following values are defined in app_cfg.h:
+*
+*                   HTTPc_OS_CFG_INSTANCE_TASK_PRIO
+*                   HTTPc_OS_CFG_INSTANCE_TASK_STK_SIZE
+*
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                             /* See Note #1.                                         */
+#include  
+
+#include  "http-c_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              HTTP CLIENT SUITE CONFIGURATION OBJECT
+*
+* Note(s): (1) For additional information on the HTTP Client Configuration fields, refer to the
+*              Micrium Documentation online at : https://doc.micrium.com/display/HTTPc/Run-Time Configuration
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPc_CFG  HTTPc_Cfg = {
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       TASK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+         1u,                                                    /* .TaskDly_ms (HTTPc Task delay in milliseconds)       */
+         5u,                                                    /* .MsqQ_Size  (Message Task Queue size)                */
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    CONNECTION CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+         2000u,                                                 /* .ConnConnectTimeout_ms   (Connect timeout in ms)     */
+         30u,                                                   /* .ConnInactivityTimeout_s (Inactivity timeout in s)   */
+
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               HTTP CLIENT TASK CONFIGURATION OBJECT
+*
+* Note(s): (1) We recommend to configure the Network Protocol Stack task priorities & HTTP client task
+*              priority as follows:
+*
+*                   NET_OS_CFG_IF_TX_DEALLOC_TASK_PRIO (Highest)
+*
+*                   HTTPc_OS_CFG_TASK_PRIO             (  ...  )
+*
+*                   NET_OS_CFG_TMR_TASK_PRIO           (  ...  )
+*
+*                   NET_OS_CFG_IF_RX_TASK_PRIO         (Lowest )
+*
+*              We recommend that the uC/TCP-IP Timer task and network interface Receive task be lower
+*              priority than almost all other application tasks; but we recommend that the network
+*              interface Transmit De-allocation task be higher priority than all application tasks that
+*              use uC/TCP-IP network services.
+*
+*              However better performance can be observed when the HTTP Client is set with the lowest
+*              priority. So some experimentation could be required to identify the better task priority
+*              configuration.
+*
+*          (2) TODO note on the HTTP Client stack's task size.
+*
+*          (3) When the Stack pointer is defined as null pointer (DEF_NULL), the task's stack should be
+*              automatically allowed on the heap of uC/LIB.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+
+#ifndef  HTTPc_OS_CFG_TASK_PRIO
+#define  HTTPc_OS_CFG_TASK_PRIO                  20
+#endif
+
+#ifndef  HTTPc_OS_CFG_TASK_STK_SIZE
+#define  HTTPc_OS_CFG_TASK_STK_SIZE            1024
+#endif
+
+const  HTTP_TASK_CFG  HTTPc_TaskCfg = {
+        HTTPc_OS_CFG_TASK_PRIO,                                 /* HTTPc task priority              (See Note #1).      */
+        HTTPc_OS_CFG_TASK_STK_SIZE,                             /* HTTPc task stack size in bytes   (See Note #2).      */
+        DEF_NULL,                                               /* HTTPc task stack pointer         (See Note #3).      */
+};
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Cfg/Template/http-c_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Cfg/Template/http-c_cfg.h
new file mode 100644
index 0000000..d6180c2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Cfg/Template/http-c_cfg.h
@@ -0,0 +1,224 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   HTTP CLIENT CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : http-c_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.00.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_CFG_MODULE_PRESENT
+#define  HTTPc_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      COMPILE-TIME CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   HTTP ARGUMENT CHECK CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPc_CFG_ARG_CHK_EXT_EN to enable/disable the HTTP client external argument
+*               check feature :
+*
+*               (a) When ENABLED,  ALL arguments received from any port interface provided by the developer
+*                   are checked/validated.
+*
+*               (b) When DISABLED, NO  arguments received from any port interface provided by the developer
+*                   are checked/validated.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_CFG_ARG_CHK_EXT_EN                 DEF_ENABLED   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                    HTTP CLIENT TASK CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPc_CFG_MODE_ASYNC_TASK_EN to enable/disable HTTP client task.
+*               (a) DEF_DISABLED : No HTTP client task will be created to process the HTTP requests.
+*                                  The Blocking HTTPc API will be enabled.
+*
+*               (b) DEF_ENABLED  : An HTTP client task will be created to process all the HTTP requests.
+*                                  The Non-Blocking HTTPc API will be enabled. Therefore, multiple
+*                                  connections can be handle by the task simultaneously.
+*
+*           (2) Configure HTTPc_CFG_MODE_BLOCK_EN to enable/disable the blocking option when the
+*               asynchronous HTTPc Task is enabled.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_CFG_MODE_ASYNC_TASK_EN           DEF_ENABLED     /* See Note #1.                                         */
+
+#define  HTTPc_CFG_MODE_BLOCK_EN                DEF_ENABLED     /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*                              HTTP CLIENT PERSISTENT CONNECTION CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPc_CFG_PERSISTENT_EN to enable/disable Persistent Connection support.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_CFG_PERSISTENT_EN                DEF_ENABLED     /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                HTTP CLIENT CHUNKED TRANSFER CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPc_CFG_CHUNK_TX_EN to enable/disable Chunked Transfer support in Transmission.
+*
+*           (2) Chunked Transfer in Reception is always enabled.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_CFG_CHUNK_TX_EN                  DEF_ENABLED     /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                 HTTP CLIENT QUERY STRING CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPc_CFG_QUERY_STR_EN to enable/disable Query String support in URL.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_CFG_QUERY_STR_EN                 DEF_ENABLED     /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                HTTP CLIENT HEADER FIELD CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPc_CFG_HDR_RX_EN to enable/disable header field processing in reception
+*               (i.e for headers received in the HTTP response.
+*
+*           (2) Configure HTTPc_CFG_HDR_TX_EN to enable/disable header field processing in transmission
+*               (i.e for headers to include in the HTTP request.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_CFG_HDR_RX_EN                    DEF_ENABLED     /* Configure Header feature in RX (see Note #1):        */
+
+
+#define  HTTPc_CFG_HDR_TX_EN                    DEF_ENABLED     /* Configure Header feature in TX (see Note #2):        */
+
+
+/*
+*********************************************************************************************************
+*                                     HTTP CLIENT FORM CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPc_CFG_FORM_EN to enable/disable HTTP form creation source code.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_CFG_FORM_EN                      DEF_ENABLED     /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                   HTTP CLIENT USER DATA CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPc_CFG_USER_DATA_EN         to enable/disable user data pointer in HTTPc_CONN
+*                                                        and HTTPc_REQ structure.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_CFG_USER_DATA_EN                 DEF_ENABLED     /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                   HTTP CLIENT WEBSOCKET CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPc_CFG_WEBSOCKET_EN        to enable/disable the Websocket feature.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_CFG_WEBSOCKET_EN                 DEF_ENABLED     /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      RUN-TIME CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  HTTP_TASK_CFG   HTTPc_TaskCfg;
+extern  const  HTTPc_CFG       HTTPc_Cfg;
+
+
+/* =============================================== END =============================================== */
+#endif  /* HTTPc_CFG_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_app.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_app.c
new file mode 100644
index 0000000..5b1b1ed
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_app.c
@@ -0,0 +1,1818 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                                EXAMPLE
+*
+*                                  HTTP CLIENT APPLICATION FUNCTIONS FILE
+*
+* Filename      : http-c_app.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.00.00
+*                       (d) uC/TCP-IP V3.02.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define    MICRIUM_SOURCE
+#define    HTTPc_APP_MODULE
+#include  
+
+#include  "http-c_app.h"
+#include  "http-c_hooks.h"
+#include  "static_files.h"
+
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+static  CPU_BOOLEAN  HTTPcApp_FS_Init                 (void);
+#endif
+
+static  CPU_INT08U   HTTPcApp_ReqPrepareQueryStr      (HTTPc_KEY_VAL         **p_tbl);
+
+static  CPU_INT08U   HTTPcApp_ReqPrepareHdrs          (HTTPc_HDR             **p_hdr_tbl);
+
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_INT08U   HTTPcApp_ReqPrepareFormApp       (HTTPc_FORM_TBL_FIELD  **p_form_tbl);
+
+static  CPU_INT08U   HTTPcApp_ReqPrepareFormMultipart (HTTPc_FORM_TBL_FIELD  **p_form_tbl);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            HTTPcApp_Init()
+*
+* Description : Initialize the uC/HTTP-client stack for the example application.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if initialization was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcApp_Init (void)
+{
+    CPU_BOOLEAN  success;
+    HTTPc_ERR    httpc_err;
+
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+    success = HTTPcApp_FS_Init();
+    if (success != DEF_YES) {
+        return (DEF_FAIL);
+    }
+#endif
+                                                                /* ------------- INITIALIZE CLIENT SUITE -------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_Init(&HTTPc_Cfg, &HTTPc_TaskCfg, DEF_NULL, &httpc_err);
+    if (httpc_err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#else
+    HTTPc_Init(&HTTPc_Cfg, DEF_NULL, DEF_NULL, &httpc_err);
+    if (httpc_err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+   (void)&success;
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                         HTTPcApp_ReqSendGet()
+*
+* Description : Send a GET request.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if HTTP transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcApp_ReqSendGet (void)
+{
+    HTTPc_CONN_OBJ     *p_conn;
+    HTTPc_REQ_OBJ      *p_req;
+    HTTPc_RESP_OBJ     *p_resp;
+    CPU_CHAR           *p_buf;
+    HTTPc_KEY_VAL      *p_query_str_tbl;
+    HTTPc_HDR          *p_hdr_tbl;
+    HTTPc_PARAM_TBL     tbl_obj;
+    HTTPc_FLAGS         flags;
+    CPU_INT08U          query_nbr;
+    CPU_INT08U          ext_hdr_nbr;
+    CPU_SIZE_T          str_len;
+    CPU_BOOLEAN         result;
+    HTTPc_ERR           err;
+
+
+    p_conn = &HTTPcApp_ConnTbl[0];
+    p_req  = &HTTPcApp_ReqTbl[0];
+    p_resp = &HTTPcApp_RespTbl[0];
+    p_buf  = &HTTPcApp_ConnBufTbl[0][0];
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+    p_req->UserDataPtr = (void *)&HTTPcApp_Data[0];
+#else
+    return (DEF_FAIL);
+#endif
+
+                                                                /* -------------- SET STRING QUERY DATA --------------- */
+    query_nbr = HTTPcApp_ReqPrepareQueryStr(&p_query_str_tbl);
+    if (query_nbr == 0) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* -------------- SET ADDITIONAL HEADERS -------------- */
+    ext_hdr_nbr = HTTPcApp_ReqPrepareHdrs(&p_hdr_tbl);
+    if (ext_hdr_nbr == 0) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(p_conn,
+                       HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       HTTPcApp_ConnCloseCallback,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------ SET STRING QUERY PARAMETERS ----------- */
+    tbl_obj.EntryNbr = query_nbr;
+    tbl_obj.TblPtr   = (void *)p_query_str_tbl;
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_QUERY_STR_TBL,
+                     &tbl_obj,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------- SET REQUEST ADDITIONAL HEADERS ---------- */
+    tbl_obj.EntryNbr = ext_hdr_nbr;
+    tbl_obj.TblPtr   = (void *)p_hdr_tbl;
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_HDR_TBL,
+                     &tbl_obj,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+                      HTTPcApp_RespHdrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      HTTPcApp_RespBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      HTTPcApp_TransErrCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(HTTP_SERVER_HOSTNAME);
+    flags = HTTPc_FLAG_NONE;
+    result = HTTPc_ConnOpen(p_conn,
+                            p_buf,
+                            HTTPc_APP_CFG_CONN_BUF_SIZE,
+                            HTTP_SERVER_HOSTNAME,
+                            str_len,
+                            flags,
+                           &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("Connection to server succeeded.\n\r"));
+    } else {
+        HTTPc_APP_TRACE_INFO(("Connection to server failed.\n\r"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    str_len = Str_Len("/get");
+    flags = HTTPc_FLAG_NONE;
+    result = HTTPc_ReqSend(p_conn,
+                           p_req,
+                           p_resp,
+                           HTTP_METHOD_GET,
+                          "/get",
+                           str_len,
+                           flags,
+                          &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("%s\n\r", p_resp->ReasonPhrasePtr));
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcApp_ReqSendPost()
+*
+* Description : Send a POST request with a pre-formatted form as body.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if HTTP transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+CPU_BOOLEAN  HTTPcApp_ReqSendPost (void)
+{
+    HTTPc_CONN_OBJ        *p_conn;
+    HTTPc_REQ_OBJ         *p_req;
+    HTTPc_RESP_OBJ        *p_resp;
+    CPU_CHAR              *p_buf;
+    HTTPc_FLAGS            flags;
+    CPU_SIZE_T             str_len;
+    CPU_BOOLEAN            result;
+    HTTPc_FORM_TBL_FIELD  *p_form_tbl;
+    CPU_INT08U             form_nbr;
+    CPU_INT32U             content_len;
+    HTTP_CONTENT_TYPE      content_type;
+    CPU_CHAR              *p_data;
+    HTTPc_ERR              err;
+
+
+    p_conn = &HTTPcApp_ConnTbl[0];
+    p_req  = &HTTPcApp_ReqTbl[0];
+    p_resp = &HTTPcApp_RespTbl[0];
+    p_buf  = &HTTPcApp_ConnBufTbl[0][0];
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+    p_req->UserDataPtr = (void *)&HTTPcApp_Data[0];
+#else
+    return (DEF_FAIL);
+#endif
+
+                                                                /* ----------------- SET FORM TO SEND ----------------- */
+    form_nbr = HTTPcApp_ReqPrepareFormApp(&p_form_tbl);
+    if (form_nbr <= 0) {
+        return (DEF_FAIL);
+    }
+
+    p_data      = &HTTPcApp_FormBuf[0];
+    content_len =  HTTPc_FormAppFmt(p_data,
+                                    HTTPc_APP_CFG_FORM_BUF_SIZE,
+                                    p_form_tbl,
+                                    form_nbr,
+                                   &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(p_conn,
+                       HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       HTTPcApp_ConnCloseCallback,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------ SET STRING QUERY PARAMETERS ----------- */
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_QUERY_STR_HOOK,
+                      HTTPcApp_ReqQueryStrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------- SET REQUEST ADDITIONAL HEADERS ---------- */
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_HDR_HOOK,
+                      HTTPcApp_ReqHdrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ----------- SET REQUEST BODY PARAMETERS ------------ */
+    content_type = HTTP_CONTENT_TYPE_APP_FORM;
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE,
+                     &content_type,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_LEN,
+                     &content_len,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_BODY_HOOK,
+                      HTTPcApp_ReqBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+                      HTTPcApp_RespHdrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      HTTPcApp_RespBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      HTTPcApp_TransErrCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(HTTP_SERVER_HOSTNAME);
+    flags   = HTTPc_FLAG_NONE;
+    result  = HTTPc_ConnOpen(p_conn,
+                             p_buf,
+                             HTTPc_APP_CFG_CONN_BUF_SIZE,
+                             HTTP_SERVER_HOSTNAME,
+                             str_len,
+                             flags,
+                            &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("Connection to server succeeded.\n\r"));
+    } else {
+        HTTPc_APP_TRACE_INFO(("Connection to server failed.\n\r"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    str_len = Str_Len("/post");
+    flags   = HTTPc_FLAG_NONE;
+    result  = HTTPc_ReqSend(p_conn,
+                            p_req,
+                            p_resp,
+                            HTTP_METHOD_POST,
+                           "/post",
+                            str_len,
+                            flags,
+                           &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("%s\n\r", p_resp->ReasonPhrasePtr));
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPcApp_ReqSendAppForm()
+*
+* Description : Send a Application type form.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if HTTP transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+CPU_BOOLEAN  HTTPcApp_ReqSendAppForm (void)
+{
+    HTTPc_CONN_OBJ        *p_conn;
+    HTTPc_REQ_OBJ         *p_req;
+    HTTPc_RESP_OBJ        *p_resp;
+    CPU_CHAR              *p_buf;
+    HTTPc_PARAM_TBL        tbl_obj;
+    HTTPc_FLAGS            flags;
+    CPU_SIZE_T             str_len;
+    CPU_BOOLEAN            result;
+    HTTPc_FORM_TBL_FIELD  *p_form_tbl;
+    CPU_INT08U             form_nbr;
+    HTTP_CONTENT_TYPE      content_type;
+    HTTPc_ERR              err;
+
+
+    p_conn = &HTTPcApp_ConnTbl[0];
+    p_req  = &HTTPcApp_ReqTbl[0];
+    p_resp = &HTTPcApp_RespTbl[0];
+    p_buf  = &HTTPcApp_ConnBufTbl[0][0];
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+    p_req->UserDataPtr = (void *)&HTTPcApp_Data[0];
+#else
+    return (DEF_FAIL);
+#endif
+
+                                                                 /* ----------------- SET FORM TO SEND ----------------- */
+    form_nbr = HTTPcApp_ReqPrepareFormApp(&p_form_tbl);
+    if (form_nbr <= 0) {
+        return (DEF_FAIL);
+    }
+
+                                                                 /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(p_conn,
+                       HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       HTTPcApp_ConnCloseCallback,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------- SET REQUEST BODY PARAMETERS ------------ */
+    content_type = HTTP_CONTENT_TYPE_APP_FORM;
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE,
+                     &content_type,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    tbl_obj.EntryNbr = form_nbr;
+    tbl_obj.TblPtr   = (void *)p_form_tbl;
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_FORM_TBL,
+                     &tbl_obj,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+                      HTTPcApp_RespHdrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      HTTPcApp_RespBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      HTTPcApp_TransErrCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(HTTP_SERVER_HOSTNAME);
+    flags   = HTTPc_FLAG_NONE;
+    result  = HTTPc_ConnOpen(p_conn,
+                             p_buf,
+                             HTTPc_APP_CFG_CONN_BUF_SIZE,
+                             HTTP_SERVER_HOSTNAME,
+                             str_len,
+                             flags,
+                            &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("Connection to server succeeded.\n\r"));
+    } else {
+        HTTPc_APP_TRACE_INFO(("Connection to server failed.\n\r"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    str_len = Str_Len("/post");
+    flags   = HTTPc_FLAG_NONE;
+    result  = HTTPc_ReqSend(p_conn,
+                            p_req,
+                            p_resp,
+                            HTTP_METHOD_POST,
+                           "/post",
+                            str_len,
+                            flags,
+                           &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("%s\n\r", p_resp->ReasonPhrasePtr));
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPcApp_ReqSendMultipartForm()
+*
+* Description : Send a multipart type form.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if HTTP transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+CPU_BOOLEAN  HTTPcApp_ReqSendMultipartForm (void)
+{
+    HTTPc_CONN_OBJ        *p_conn;
+    HTTPc_REQ_OBJ         *p_req;
+    HTTPc_RESP_OBJ        *p_resp;
+    CPU_CHAR              *p_buf;
+    HTTPc_PARAM_TBL        tbl_obj;
+    HTTPc_FLAGS            flags;
+    CPU_SIZE_T             str_len;
+    CPU_BOOLEAN            result;
+    HTTPc_FORM_TBL_FIELD  *p_form_tbl;
+    CPU_INT08U             form_nbr;
+    HTTP_CONTENT_TYPE      content_type;
+    HTTPc_ERR              err;
+
+
+    p_conn = &HTTPcApp_ConnTbl[0];
+    p_req  = &HTTPcApp_ReqTbl[0];
+    p_resp = &HTTPcApp_RespTbl[0];
+    p_buf  = &HTTPcApp_ConnBufTbl[0][0];
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+    p_req->UserDataPtr = (void *)&HTTPcApp_Data[0];
+#else
+    return (DEF_FAIL);
+#endif
+
+                                                                 /* ----------------- SET FORM TO SEND ----------------- */
+    form_nbr = HTTPcApp_ReqPrepareFormMultipart(&p_form_tbl);
+    if (form_nbr <= 0) {
+        return (DEF_FAIL);
+    }
+
+                                                                 /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(p_conn,
+                       HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       HTTPcApp_ConnCloseCallback,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------- SET REQUEST BODY PARAMETERS ------------ */
+    content_type = HTTP_CONTENT_TYPE_MULTIPART_FORM;
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE,
+                     &content_type,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    tbl_obj.EntryNbr = form_nbr;
+    tbl_obj.TblPtr   = (void *)p_form_tbl;
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_FORM_TBL,
+                     &tbl_obj,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+                      HTTPcApp_RespHdrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      HTTPcApp_RespBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      HTTPcApp_TransErrCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(HTTP_SERVER_HOSTNAME);
+    flags   = HTTPc_FLAG_NONE;
+    result  = HTTPc_ConnOpen(p_conn,
+                             p_buf,
+                             HTTPc_APP_CFG_CONN_BUF_SIZE,
+                             HTTP_SERVER_HOSTNAME,
+                             str_len,
+                             flags,
+                            &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("Connection to server succeeded.\n\r"));
+    } else {
+        HTTPc_APP_TRACE_INFO(("Connection to server failed.\n\r"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    str_len = Str_Len("/post");
+    flags   = HTTPc_FLAG_NONE;
+    result  = HTTPc_ReqSend(p_conn,
+                            p_req,
+                            p_resp,
+                            HTTP_METHOD_POST,
+                           "/post",
+                            str_len,
+                            flags,
+                           &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("%s\n\r", p_resp->ReasonPhrasePtr));
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcAPP_ReqSendPut()
+*
+* Description : Send PUT request.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if HTTP transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcAPP_ReqSendPut (void)
+{
+    HTTPc_CONN_OBJ     *p_conn;
+    HTTPc_REQ_OBJ      *p_req;
+    HTTPc_RESP_OBJ     *p_resp;
+    CPU_CHAR           *p_buf;
+    HTTPc_FLAGS         flags;
+    CPU_SIZE_T          str_len;
+    CPU_SIZE_T          content_len;
+    CPU_BOOLEAN         result;
+    HTTP_CONTENT_TYPE   content_type;
+    HTTPc_ERR           err;
+
+
+    p_conn = &HTTPcApp_ConnTbl[0];
+    p_req  = &HTTPcApp_ReqTbl[0];
+    p_resp = &HTTPcApp_RespTbl[0];
+    p_buf  = &HTTPcApp_ConnBufTbl[0][0];
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+    p_req->UserDataPtr = (void *)&HTTPcApp_Data[0];
+#else
+    return (DEF_FAIL);
+#endif
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(p_conn,
+                       HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       HTTPcApp_ConnCloseCallback,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------- SET REQUEST BODY PARAMETERS ------------ */
+    content_type = HTTP_CONTENT_TYPE_GIF;
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE,
+                     &content_type,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    content_len = STATIC_LOGO_GIF_LEN;
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_LEN,
+                     &content_len,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_BODY_HOOK,
+                      HTTPcApp_ReqBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+                      HTTPcApp_RespHdrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      HTTPcApp_RespBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      HTTPcApp_TransErrCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(HTTP_SERVER_HOSTNAME);
+    flags   = HTTPc_FLAG_NONE;
+    result  = HTTPc_ConnOpen(p_conn,
+                             p_buf,
+                             HTTPc_APP_CFG_CONN_BUF_SIZE,
+                             HTTP_SERVER_HOSTNAME,
+                             str_len,
+                             flags,
+                            &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("Connection to server succeeded.\n\r"));
+    } else {
+        HTTPc_APP_TRACE_INFO(("Connection to server failed.\n\r"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    str_len = Str_Len("/post");
+    flags   = HTTPc_FLAG_NONE;
+    result  = HTTPc_ReqSend(p_conn,
+                            p_req,
+                            p_resp,
+                            HTTP_METHOD_PUT,
+                           "/put",
+                            str_len,
+                            flags,
+                           &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("%s\n\r", p_resp->ReasonPhrasePtr));
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPcApp_PersistentConn()
+*
+* Description : Send multiple requests on same connection.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if persistent conn test was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcApp_PersistentConn (void)
+{
+    HTTPc_APP_REQ_DATA  *p_data1;
+    HTTPc_APP_REQ_DATA  *p_data2;
+    HTTPc_CONN_OBJ      *p_conn;
+    HTTPc_REQ_OBJ       *p_req1;
+    HTTPc_RESP_OBJ      *p_resp1;
+    HTTPc_REQ_OBJ       *p_req2;
+    HTTPc_RESP_OBJ      *p_resp2;
+    CPU_CHAR            *p_buf;
+    HTTPc_FLAGS          flags;
+    CPU_SIZE_T           str_len;
+    CPU_BOOLEAN          persistent;
+    CPU_BOOLEAN          result;
+    CPU_BOOLEAN          req1_done;
+    CPU_BOOLEAN          req2_done;
+    CPU_BOOLEAN          close;
+    HTTPc_ERR            err;
+    NET_ERR              err_net;
+    CPU_SR_ALLOC();
+
+
+    p_conn  = &HTTPcApp_ConnTbl[0];
+    p_req1  = &HTTPcApp_ReqTbl[0];
+    p_resp1 = &HTTPcApp_RespTbl[0];
+    p_req2  = &HTTPcApp_ReqTbl[1];
+    p_resp2 = &HTTPcApp_RespTbl[1];
+    p_buf   = &HTTPcApp_ConnBufTbl[0][0];
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+    p_req1->UserDataPtr = (void *)&HTTPcApp_Data[0];
+    p_req2->UserDataPtr = (void *)&HTTPcApp_Data[1];
+
+    p_data1 = (HTTPc_APP_REQ_DATA *)p_req1->UserDataPtr;
+    p_data2 = (HTTPc_APP_REQ_DATA *)p_req2->UserDataPtr;
+#else
+    return (DEF_FAIL);
+#endif
+
+    close = DEF_NO;
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req1, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req2, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION PARAMETERS ------------ */
+    persistent = DEF_YES;
+    HTTPc_ConnSetParam(p_conn,
+                       HTTPc_PARAM_TYPE_PERSISTENT,
+                      &persistent,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(p_conn,
+                       HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       HTTPcApp_ConnCloseCallback,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+    HTTPc_ReqSetParam(p_req1,
+                      HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+                      HTTPcApp_RespHdrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req1,
+                      HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      HTTPcApp_RespBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req2,
+                      HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+                      HTTPcApp_RespHdrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req2,
+                      HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      HTTPcApp_RespBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam(p_req1,
+                      HTTPc_PARAM_TYPE_TRANS_COMPLETE_CALLBACK,
+                      HTTPcApp_TransDoneCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req2,
+                      HTTPc_PARAM_TYPE_TRANS_COMPLETE_CALLBACK,
+                      HTTPcApp_TransDoneCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req1,
+                      HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      HTTPcApp_TransErrCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req2,
+                      HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      HTTPcApp_TransErrCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(HTTP_SERVER_HOSTNAME);
+    flags  = HTTPc_FLAG_NONE;
+    result = HTTPc_ConnOpen(p_conn,
+                            p_buf,
+                            HTTPc_APP_CFG_CONN_BUF_SIZE,
+                            HTTP_SERVER_HOSTNAME,
+                            str_len,
+                            flags,
+                           &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("Connection to server succeeded.\n\r"));
+    } else {
+        HTTPc_APP_TRACE_INFO(("Connection to server failed.\n\r"));
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    str_len = Str_Len("/get");
+    flags = HTTPc_FLAG_NONE;
+    DEF_BIT_SET(flags, HTTPc_FLAG_REQ_NO_BLOCK);
+    (void)HTTPc_ReqSend(p_conn,
+                        p_req1,
+                        p_resp1,
+                        HTTP_METHOD_GET,
+                       "/get",
+                        str_len,
+                        flags,
+                       &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    (void)HTTPc_ReqSend(p_conn,
+                        p_req2,
+                        p_resp2,
+                        HTTP_METHOD_GET,
+                       "/get",
+                        str_len,
+                        flags,
+                       &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    do {
+        CPU_CRITICAL_ENTER();
+        req1_done = p_data1->Done;
+        req2_done = p_data2->Done;
+        CPU_CRITICAL_EXIT();
+
+        if ((req1_done == DEF_YES) &&
+            (req2_done == DEF_YES)) {
+             close = DEF_YES;
+        }
+
+        NetApp_TimeDly_ms(10, &err_net);
+
+    } while (close == DEF_NO);
+
+    flags = HTTPc_FLAG_NONE;
+    HTTPc_ConnClose(p_conn, flags, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcApp_MultiConn()
+*
+* Description : Open multiple Connections to send HTTP requests in parallel.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if multi-conn test was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcApp_MultiConn (void)
+{
+    HTTPc_CONN_OBJ     *p_conn1;
+    HTTPc_CONN_OBJ     *p_conn2;
+    HTTPc_REQ_OBJ      *p_req1;
+    HTTPc_RESP_OBJ     *p_resp1;
+    HTTPc_REQ_OBJ      *p_req2;
+    HTTPc_RESP_OBJ     *p_resp2;
+    CPU_CHAR           *p_buf1;
+    CPU_CHAR           *p_buf2;
+    HTTPc_FLAGS         flags;
+    CPU_SIZE_T          str_len;
+    HTTPc_ERR           err;
+
+
+    p_conn1 = &HTTPcApp_ConnTbl[0];
+    p_conn2 = &HTTPcApp_ConnTbl[1];
+    p_req1  = &HTTPcApp_ReqTbl[0];
+    p_resp1 = &HTTPcApp_RespTbl[0];
+    p_req2  = &HTTPcApp_ReqTbl[1];
+    p_resp2 = &HTTPcApp_RespTbl[1];
+    p_buf1  = &HTTPcApp_ConnBufTbl[0][0];
+    p_buf2  = &HTTPcApp_ConnBufTbl[1][0];
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+    p_req1->UserDataPtr = (void *)&HTTPcApp_Data[0];
+    p_req2->UserDataPtr = (void *)&HTTPcApp_Data[1];
+#else
+    return (DEF_FAIL);
+#endif
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn1, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ConnClr(p_conn2, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req1, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req2, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(p_conn1,
+                       HTTPc_PARAM_TYPE_CONN_CONNECT_CALLBACK,
+                       HTTPcApp_ConnConnectCallback,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ConnSetParam(p_conn2,
+                       HTTPc_PARAM_TYPE_CONN_CONNECT_CALLBACK,
+                       HTTPcApp_ConnConnectCallback,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ConnSetParam(p_conn1,
+                       HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       HTTPcApp_ConnCloseCallback,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ConnSetParam(p_conn2,
+                       HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       HTTPcApp_ConnCloseCallback,
+                      &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------ SET REQ/RESP HOOK FUNCTIONS ----------- */
+    HTTPc_ReqSetParam(p_req1,
+                      HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+                      HTTPcApp_RespHdrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req1,
+                      HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      HTTPcApp_RespBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req2,
+                      HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+                      HTTPcApp_RespHdrHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req2,
+                      HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+                      HTTPcApp_RespBodyHook,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam(p_req1,
+                      HTTPc_PARAM_TYPE_TRANS_COMPLETE_CALLBACK,
+                      HTTPcApp_TransDoneCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req2,
+                      HTTPc_PARAM_TYPE_TRANS_COMPLETE_CALLBACK,
+                      HTTPcApp_TransDoneCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req1,
+                      HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      HTTPcApp_TransErrCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req2,
+                      HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      HTTPcApp_TransErrCallback,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(HTTP_SERVER_HOSTNAME);
+    flags  = HTTPc_FLAG_NONE;
+    DEF_BIT_SET(flags, HTTPc_FLAG_CONN_NO_BLOCK);
+
+    (void)HTTPc_ConnOpen(p_conn1,
+                         p_buf1,
+                         HTTPc_APP_CFG_CONN_BUF_SIZE,
+                         HTTP_SERVER_HOSTNAME,
+                         str_len,
+                         flags,
+                        &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    (void)HTTPc_ConnOpen(p_conn2,
+                         p_buf2,
+                         HTTPc_APP_CFG_CONN_BUF_SIZE,
+                         HTTP_SERVER_HOSTNAME,
+                         str_len,
+                         flags,
+                        &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    str_len = Str_Len("/get");
+    flags = HTTPc_FLAG_NONE;
+    DEF_BIT_SET(flags, HTTPc_FLAG_REQ_NO_BLOCK);
+    (void)HTTPc_ReqSend(p_conn1,
+                        p_req1,
+                        p_resp1,
+                        HTTP_METHOD_GET,
+                       "/get",
+                        str_len,
+                        flags,
+                       &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    (void)HTTPc_ReqSend(p_conn2,
+                        p_req2,
+                        p_resp2,
+                        HTTP_METHOD_GET,
+                       "/get",
+                        str_len,
+                        flags,
+                       &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          AppHTTPc_FS_Init()
+*
+* Description : If uC/FS is present in the project, initialize it for the example application.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK, if FS initialization was successful.
+*               DEF_FAIL, otherwise
+*
+* Caller(s)   : HTTPcApp_Init().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+static  CPU_BOOLEAN  HTTPcApp_FS_Init (void)
+{
+
+    FS_FILE       *p_file;
+    FS_FLAGS       fs_flags;
+    CPU_BOOLEAN    success;
+    CPU_BOOLEAN    result;
+    CPU_SIZE_T     len_wr;
+    CPU_SIZE_T     len_tot;
+    FS_ERR         err_fs;
+
+
+                                                                /* --------------- INITIALIZE FS STACK ---------------- */
+    success = App_FS_Init();
+    if (success == DEF_FAIL) {
+        result = DEF_FAIL;
+        goto exit;
+    }
+
+                                                                /* ------------ SET FS WORKING DIRECTORY -------------- */
+    FS_WorkingDirSet("\\", &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+        result = DEF_FAIL;
+        goto exit;
+    }
+
+                                                                /* ----------------- COPY FILES TO FS ----------------- */
+    fs_flags = 0;
+    DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_WR);
+    DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_CREATE);
+    p_file = FSFile_Open("\\index.html",
+                          fs_flags,
+                         &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+        result = DEF_FAIL;
+        goto exit;
+    }
+
+    len_wr  = 0;
+    len_tot = 0;
+    while (len_tot < STATIC_INDEX_HTML_LEN) {
+
+        len_wr = FSFile_Wr(p_file,
+                          &index_html,
+                           STATIC_INDEX_HTML_LEN,
+                          &err_fs);
+        if (err_fs != FS_ERR_NONE) {
+            result = DEF_FAIL;
+            goto exit_close;
+        }
+
+        len_tot += len_wr;
+    }
+
+    result = DEF_OK;
+
+
+exit_close:
+    FSFile_Close(p_file, &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+        result = DEF_FAIL;
+    }
+
+exit:
+    return (result);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcApp_ReqPrepareQueryStr()
+*
+* Description : Configure the Query String table.
+*
+* Argument(s) : p_tbl   Variable that will received the pointer to the Query String Table.
+*
+* Return(s)   : Number of fields in the table.
+*
+* Caller(s)   : HTTPcApp_ReqSendGet().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  HTTPcApp_ReqPrepareQueryStr (HTTPc_KEY_VAL  **p_tbl)
+{
+    HTTPc_KEY_VAL  *p_kvp;
+
+
+                                                                /* ----------------- SET FIRST QUERY ------------------ */
+    p_kvp         = &HTTPcApp_ReqQueryStrTbl[0];
+    p_kvp->KeyPtr = &HTTPcApp_ReqQueryStrKeyTbl[0][0];
+    p_kvp->ValPtr = &HTTPcApp_ReqQueryStrValTbl[0][0];
+
+   (void)Str_Copy_N(p_kvp->KeyPtr, "Name",       HTTPc_APP_CFG_QUERY_STR_KEY_LEN_MAX);
+   (void)Str_Copy_N(p_kvp->ValPtr, "John Smith", HTTPc_APP_CFG_QUERY_STR_VAL_LEN_MAX);
+
+    p_kvp->KeyLen = Str_Len("Name");
+    p_kvp->ValLen = Str_Len("John Smith");
+
+                                                                /* ---------------- SET SECOND QUERY ------------------ */
+    p_kvp++;
+
+    p_kvp->KeyPtr = &HTTPcApp_ReqQueryStrKeyTbl[1][0];
+    p_kvp->ValPtr = DEF_NULL;
+
+   (void)Str_Copy_N(p_kvp->KeyPtr, "Active", HTTPc_APP_CFG_QUERY_STR_KEY_LEN_MAX);
+
+    p_kvp->KeyLen = Str_Len("Active");
+    p_kvp->ValLen = 0;
+
+   *p_tbl = &HTTPcApp_ReqQueryStrTbl[0];
+
+    return (2);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPcApp_ReqPrepareHdrs()
+*
+* Description : Configure the Header Fields Table
+*
+* Argument(s) : p_hdr_tbl   Variable that will received the pointer to the Header Fields table.
+*
+* Return(s)   : Number of fields in the table.
+*
+* Caller(s)   : HTTPcApp_ReqSendGet().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  HTTPcApp_ReqPrepareHdrs (HTTPc_HDR  **p_hdr_tbl)
+{
+    HTTPc_HDR  *p_hdr;
+
+
+                                                                /* ---------------- ADD ACCEPT HEADER ----------------- */
+    p_hdr           = &HTTPcApp_ReqHdrTbl[0];
+    p_hdr->ValPtr   = &HTTPcApp_ReqHdrValStrTbl[0][0];
+    p_hdr->HdrField =  HTTP_HDR_FIELD_ACCEPT;
+
+    Str_Copy_N(p_hdr->ValPtr, "text/*", HTTPc_APP_CFG_HDR_VAL_LEN_MAX);
+
+    p_hdr->ValLen = Str_Len("text/*");
+
+   *p_hdr_tbl = &HTTPcApp_ReqHdrTbl[0];
+
+    return (1);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcApp_ReqPrepareFormApp()
+*
+* Description : Configure the application type form table.
+*
+* Argument(s) : p_form_tbl  Variable that will received the pointer to the form table.
+*
+* Return(s)   : Number of fields in the form table.
+*
+* Caller(s)   : HTTPcApp_ReqSendPost().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_INT08U  HTTPcApp_ReqPrepareFormApp (HTTPc_FORM_TBL_FIELD  **p_form_tbl)
+{
+    HTTPc_FORM_TBL_FIELD  *p_tbl;
+    HTTPc_KEY_VAL         *p_kvp;
+    HTTPc_ERR              httpc_err;
+
+
+    p_tbl = &HTTPcApp_FormTbl[0];
+
+                                                                /* -------------- ADD FIRST FORM FIELD ---------------- */
+    p_kvp          = &HTTPcApp_FormKeyValTbl[0];
+    p_kvp->KeyPtr  = &HTTPcApp_FormKeyStrTbl[0][0];
+    p_kvp->ValPtr  = &HTTPcApp_FormValStrTbl[0][0];
+
+    p_kvp->KeyLen = Str_Len("Age");
+    p_kvp->ValLen = Str_Len("32");
+
+   (void)Str_Copy_N(p_kvp->KeyPtr, "Age", p_kvp->KeyLen);
+   (void)Str_Copy_N(p_kvp->ValPtr, "32",  p_kvp->ValLen);
+
+
+    HTTPc_FormAddKeyVal(p_tbl, p_kvp, &httpc_err);
+
+                                                                /* -------------- ADD SECOND FORM FIELD --------------- */
+    p_tbl++;
+    p_kvp++;
+
+    p_kvp->KeyPtr    = &HTTPcApp_FormKeyStrTbl[1][0];
+    p_kvp->ValPtr    = &HTTPcApp_FormValStrTbl[1][0];
+
+    p_kvp->KeyLen = Str_Len("book");
+    p_kvp->ValLen = Str_Len("Implementing IPv6 Second Edition");
+
+   (void)Str_Copy_N(p_kvp->KeyPtr, "book",                             p_kvp->KeyLen);
+   (void)Str_Copy_N(p_kvp->ValPtr, "Implementing IPv6 Second Edition", p_kvp->ValLen);
+
+    HTTPc_FormAddKeyVal(p_tbl, p_kvp, &httpc_err);
+
+   *p_form_tbl = &HTTPcApp_FormTbl[0];
+
+    return (2);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPcApp_ReqPrepareFormMultipart()
+*
+* Description : Configure the multipart type form table.
+*
+* Argument(s) : p_form_tbl  Variable that will received the pointer to the form table.
+*
+* Return(s)   : Number of fields in the form table.
+*
+* Caller(s)   : HTTPcApp_ReqSendMultipartForm().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_INT08U  HTTPcApp_ReqPrepareFormMultipart (HTTPc_FORM_TBL_FIELD  **p_form_tbl)
+{
+    HTTPc_FORM_TBL_FIELD  *p_tbl;
+    HTTPc_KEY_VAL         *p_kvp;
+    HTTPc_KEY_VAL_EXT     *p_kvp_big;
+    HTTPc_ERR              httpc_err;
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+    HTTPc_MULTIPART_FILE  *p_form_file;
+    FS_FILE               *p_file;
+    FS_FLAGS               fs_flags;
+    FS_ERR                 err_fs;
+#endif
+
+
+    p_tbl = &HTTPcApp_FormTbl[0];
+
+                                                                /* -------------- ADD FIRST FORM FIELD ---------------- */
+    p_kvp         = &HTTPcApp_FormKeyValTbl[0];
+    p_kvp->KeyPtr = &HTTPcApp_FormKeyStrTbl[0][0];
+    p_kvp->ValPtr = &HTTPcApp_FormValStrTbl[0][0];
+
+    p_kvp->KeyLen =  Str_Len("LED1");
+    p_kvp->ValLen =  Str_Len("ON");
+
+   (void)Str_Copy_N(p_kvp->KeyPtr, "LED1", p_kvp->KeyLen);
+   (void)Str_Copy_N(p_kvp->ValPtr, "ON",   p_kvp->ValLen);
+
+   HTTPc_FormAddKeyVal(p_tbl, p_kvp, &httpc_err);
+
+                                                                /* -------------- ADD SECOND FORM FIELD --------------- */
+    p_tbl++;
+
+    p_kvp_big         = &HTTPcApp_FormKeyValExtTbl[0];
+    p_kvp_big->KeyPtr = &HTTPcApp_FormKeyStrTbl[1][0];
+
+    p_kvp_big->KeyLen = Str_Len("Text");
+    p_kvp_big->ValLen = Str_Len("The Hypertext Transfer Protocol (HTTP) is a stateless application-level protocol for distributed, collaborative, hypertext information systems.");
+
+   (void)Str_Copy_N(p_kvp_big->KeyPtr, "Text", p_kvp_big->KeyLen);
+   (void)Str_Copy_N(&HTTPcApp_FormValStrTbl[1][0], "The Hypertext Transfer Protocol (HTTP) is a stateless application-level protocol for distributed, collaborative, hypertext information systems.", p_kvp_big->ValLen);
+
+    p_kvp_big->OnValTx = &HTTPcApp_FormMultipartHook;
+
+    HTTPc_FormAddKeyValExt(p_tbl, p_kvp_big, &httpc_err);
+
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+                                                                /* -------------- ADD THIRD FORM FIELD ---------------- */
+    p_tbl++;
+
+    p_form_file              = &HTTPcApp_FormMultipartFileTbl[0];
+    p_form_file->NamePtr     = &HTTPcApp_FormMultipartNameStrTbl[0][0];
+    p_form_file->FileNamePtr = &HTTPcApp_FormMultipartFileNameStrTbl[0][0];
+    p_form_file->ContentType =  HTTP_CONTENT_TYPE_HTML;
+
+    Str_Copy(p_form_file->NamePtr, "File");
+    Str_Copy(p_form_file->FileNamePtr, "index.html");
+
+    p_form_file->NameLen = Str_Len("File");
+    p_form_file->FileNameLen = Str_Len("index.html");
+
+    fs_flags = 0;
+    DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_RD);
+    DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_CREATE);
+    p_file = FSFile_Open("\\index.html",
+                         fs_flags,
+                         &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+        return (0);
+    }
+
+    p_form_file->FileLen  =  p_file->Size;
+
+    p_form_file->OnFileTx = &HTTPcApp_FormMultipartFileHook;
+
+    HTTPc_FormAddFile(p_tbl, p_form_file, &httpc_err);
+
+   *p_form_tbl = p_tbl;
+
+    FSFile_Close(p_file, &err_fs);
+
+   *p_form_tbl = &HTTPcApp_FormTbl[0];
+
+    return (3);
+#endif
+
+   *p_form_tbl = &HTTPcApp_FormTbl[0];
+
+    return (2);
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_app.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_app.h
new file mode 100644
index 0000000..33d90a5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_app.h
@@ -0,0 +1,240 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                                EXAMPLE
+*
+*                                  HTTP CLIENT APPLICATION FUNCTIONS FILE
+*
+* Filename      : http-c_app.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.00.00
+*                       (d) uC/TCP-IP V3.02.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_APP_MODULE_PRESENT
+#define  HTTPc_APP_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*                                             FS MODULE
+*
+* Note(s): If the uC/FS is present in the project, you can enable it for the example application.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_APP_FS_MODULE_PRESENT   DEF_NO
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+#include  
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef HTTPc_APP_MODULE
+#define  HTTPc_APP_EXT
+#else
+#define  HTTPc_APP_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTP_SERVER_HOSTNAME                            "httpbin.org"
+
+#define  HTTPc_APP_CFG_CONN_NBR_MAX                       5u
+#define  HTTPc_APP_CFG_REQ_NBR_MAX                        5u
+#define  HTTPc_APP_CFG_CONN_BUF_SIZE                    512u
+
+#define  HTTPc_APP_CFG_QUERY_STR_NBR_MAX                  6u
+#define  HTTPc_APP_CFG_QUERY_STR_KEY_LEN_MAX             20u
+#define  HTTPc_APP_CFG_QUERY_STR_VAL_LEN_MAX             50u
+
+#define  HTTPc_APP_CFG_HDR_NBR_MAX                        6u
+#define  HTTPc_APP_CFG_HDR_VAL_LEN_MAX                  100u
+
+#define  HTTPc_APP_CFG_FORM_BUF_SIZE                    256u
+#define  HTTPc_APP_CFG_FORM_FIELD_NBR_MAX                10u
+#define  HTTPc_APP_CFG_FORM_FIELD_KEY_LEN_MAX           100u
+#define  HTTPc_APP_CFG_FORM_FIELD_VAL_LEN_MAX           200u
+#define  HTTPc_APP_CFG_FORM_MULTIPART_NAME_LEN_MAX      100u
+#define  HTTPc_APP_CFG_FORM_MULTIPART_FILENAME_LEN_MAX  100u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          CONNECTION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  httpc_app_conn_data {
+    CPU_BOOLEAN   Close;
+} HTTPc_APP_CONN_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                           REQUEST DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  httpc_app_req_data {
+    CPU_BOOLEAN   Done;
+    CPU_INT08U    QueryStrIx;
+    CPU_INT16U    FormIx;
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+    FS_FILE      *FilePtr;
+#endif
+} HTTPc_APP_REQ_DATA;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+HTTPc_APP_EXT  HTTPc_APP_REQ_DATA    HTTPcApp_Data[HTTPc_APP_CFG_REQ_NBR_MAX];
+
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_Buf[65535];
+
+HTTPc_APP_EXT  HTTPc_CONN_OBJ        HTTPcApp_ConnTbl[HTTPc_APP_CFG_CONN_NBR_MAX];
+HTTPc_APP_EXT  HTTPc_REQ_OBJ         HTTPcApp_ReqTbl[HTTPc_APP_CFG_REQ_NBR_MAX];
+HTTPc_APP_EXT  HTTPc_RESP_OBJ        HTTPcApp_RespTbl[HTTPc_APP_CFG_REQ_NBR_MAX];
+
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_ConnBufTbl[HTTPc_APP_CFG_CONN_NBR_MAX][HTTPc_APP_CFG_CONN_BUF_SIZE];
+
+HTTPc_APP_EXT  HTTPc_KEY_VAL         HTTPcApp_ReqQueryStrTbl[HTTPc_APP_CFG_QUERY_STR_NBR_MAX];
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_ReqQueryStrKeyTbl[HTTPc_APP_CFG_QUERY_STR_NBR_MAX][HTTPc_APP_CFG_QUERY_STR_KEY_LEN_MAX];
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_ReqQueryStrValTbl[HTTPc_APP_CFG_QUERY_STR_NBR_MAX][HTTPc_APP_CFG_QUERY_STR_VAL_LEN_MAX];
+
+HTTPc_APP_EXT  HTTPc_HDR             HTTPcApp_ReqHdrTbl[HTTPc_APP_CFG_HDR_NBR_MAX];
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_ReqHdrValStrTbl[HTTPc_APP_CFG_HDR_NBR_MAX][HTTPc_APP_CFG_HDR_VAL_LEN_MAX];
+HTTPc_APP_EXT  HTTPc_HDR             HTTPcApp_RespHdrTbl[HTTPc_APP_CFG_HDR_NBR_MAX];
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_RespHdrValStrTbl[HTTPc_APP_CFG_HDR_NBR_MAX][HTTPc_APP_CFG_HDR_VAL_LEN_MAX];
+
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_FormBuf[HTTPc_APP_CFG_FORM_BUF_SIZE];
+HTTPc_APP_EXT  HTTPc_FORM_TBL_FIELD  HTTPcApp_FormTbl[HTTPc_APP_CFG_FORM_FIELD_NBR_MAX];
+
+HTTPc_APP_EXT  HTTPc_KEY_VAL         HTTPcApp_FormKeyValTbl[HTTPc_APP_CFG_FORM_FIELD_NBR_MAX];
+HTTPc_APP_EXT  HTTPc_KEY_VAL_EXT     HTTPcApp_FormKeyValExtTbl[HTTPc_APP_CFG_FORM_FIELD_NBR_MAX];
+HTTPc_APP_EXT  HTTPc_MULTIPART_FILE  HTTPcApp_FormMultipartFileTbl[HTTPc_APP_CFG_FORM_FIELD_NBR_MAX];
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_FormKeyStrTbl[2*HTTPc_APP_CFG_FORM_FIELD_NBR_MAX][HTTPc_APP_CFG_FORM_FIELD_KEY_LEN_MAX];
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_FormValStrTbl[2*HTTPc_APP_CFG_FORM_FIELD_NBR_MAX][HTTPc_APP_CFG_FORM_FIELD_VAL_LEN_MAX];
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_FormMultipartNameStrTbl[HTTPc_APP_CFG_FORM_FIELD_NBR_MAX][HTTPc_APP_CFG_FORM_MULTIPART_NAME_LEN_MAX];
+HTTPc_APP_EXT  CPU_CHAR              HTTPcApp_FormMultipartFileNameStrTbl[HTTPc_APP_CFG_FORM_FIELD_NBR_MAX][HTTPc_APP_CFG_FORM_MULTIPART_FILENAME_LEN_MAX];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcApp_Init                 (void);
+
+CPU_BOOLEAN  HTTPcApp_ReqSendGet           (void);
+
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+CPU_BOOLEAN  HTTPcApp_ReqSendPost          (void);
+
+CPU_BOOLEAN  HTTPcApp_ReqSendAppForm       (void);
+
+CPU_BOOLEAN  HTTPcApp_ReqSendMultipartForm (void);
+#endif
+
+CPU_BOOLEAN  HTTPcAPP_ReqSendPut           (void);
+
+CPU_BOOLEAN  HTTPcApp_PersistentConn       (void);
+
+CPU_BOOLEAN  HTTPcApp_MultiConn            (void);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_APP_MODULE_PRESENT  */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_hooks.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_hooks.c
new file mode 100644
index 0000000..2c4b9f8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_hooks.c
@@ -0,0 +1,685 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                    HTTP CLIENT HOOK FUNCTIONS FILE
+*
+* Filename      : http-c_hooks.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.00.00
+*                       (d) uC/TCP-IP V3.02.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  "http-c_hooks.h"
+#include  "http-c_app.h"
+#include  "static_files.h"
+
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcApp_ReqQueryStrHook()
+*
+* Description : Add a Query String field to a specific HTTP Request.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               p_key_val   Pointer to key-value pair to recover from application.
+*
+* Return(s)   : DEF_YES,    if all the fields of the Query String have been added.
+*               DEF_NO,     otherwise.
+*
+* Caller(s)   : HTTPcReq_QueryStrHook() vis 'p_req->OnQueryStrTx()'.
+*
+* Note(s)     : (1) In this example function, the query string will be added to all the requests on any
+*                   connections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcApp_ReqQueryStrHook (HTTPc_CONN_OBJ     *p_conn,
+                                       HTTPc_REQ_OBJ      *p_req,
+                                       HTTPc_KEY_VAL     **p_key_val)
+{
+    HTTPc_APP_REQ_DATA  *p_app_data;
+    HTTPc_KEY_VAL       *p_kvp;
+    CPU_INT08U           index;
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+    p_app_data = (HTTPc_APP_REQ_DATA *)p_req->UserDataPtr;
+
+    index = p_app_data->QueryStrIx;
+
+    switch(index) {
+        case 0:
+             p_kvp         = &HTTPcApp_ReqQueryStrTbl[0];
+             p_kvp->KeyPtr = &HTTPcApp_ReqQueryStrKeyTbl[0][0];
+             p_kvp->ValPtr = &HTTPcApp_ReqQueryStrValTbl[0][0];
+
+            (void)Str_Copy_N(p_kvp->KeyPtr, "Name", HTTPc_APP_CFG_QUERY_STR_KEY_LEN_MAX);
+            (void)Str_Copy_N(p_kvp->ValPtr, "John", HTTPc_APP_CFG_QUERY_STR_VAL_LEN_MAX);
+
+             p_kvp->KeyLen = Str_Len_N(p_kvp->KeyPtr, HTTPc_APP_CFG_QUERY_STR_KEY_LEN_MAX);
+             p_kvp->ValLen = Str_Len_N(p_kvp->ValPtr, HTTPc_APP_CFG_QUERY_STR_VAL_LEN_MAX);
+
+            *p_key_val = p_kvp;
+             p_app_data->QueryStrIx++;
+             return (DEF_NO);
+
+
+        case 1:
+             p_kvp         = &HTTPcApp_ReqQueryStrTbl[1];
+             p_kvp->KeyPtr = &HTTPcApp_ReqQueryStrKeyTbl[1][0];
+             p_kvp->ValPtr =  DEF_NULL;
+
+            (void)Str_Copy_N(p_kvp->KeyPtr, "active", HTTPc_APP_CFG_QUERY_STR_KEY_LEN_MAX);
+
+             p_kvp->KeyLen = Str_Len_N(p_kvp->KeyPtr, HTTPc_APP_CFG_QUERY_STR_KEY_LEN_MAX);
+
+            *p_key_val = p_kvp;
+             p_app_data->QueryStrIx = 0;
+             return (DEF_YES);
+
+
+        default:
+            *p_key_val = DEF_NULL;
+             p_app_data->QueryStrIx = 0;
+             return (DEF_YES);
+    }
+#else
+   (void)&p_kvp;
+   (void)&index;
+   (void)&p_app_data;
+   *p_key_val = DEF_NULL;
+    return (DEF_YES);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcApp_ReqHdrHook()
+*
+* Description : Add an header field to a specific HTTP Request.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               p_hdr       Pointer to header field to recover from application.
+*
+* Return(s)   : DEF_YES,    if all header fields have been added.
+*               DEF_NO,     otherwise.
+*
+* Caller(s)   : HTTPcReq_HdrExtHook() via 'p_req->OnHdrTx()'
+*
+* Note(s)     : (1) In this example function, the header field will be added to all the requests on any
+*                   connections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcApp_ReqHdrHook (HTTPc_CONN_OBJ     *p_conn,
+                                  HTTPc_REQ_OBJ      *p_req,
+                                  HTTPc_HDR         **p_hdr)
+{
+    HTTPc_HDR  *p_hdr_tmp;
+
+
+    p_hdr_tmp         = &HTTPcApp_ReqHdrTbl[0];
+    p_hdr_tmp->ValPtr = &HTTPcApp_ReqHdrValStrTbl[0][0];
+
+    p_hdr_tmp->HdrField = HTTP_HDR_FIELD_COOKIE;
+    Str_Copy_N(p_hdr_tmp->ValPtr, "ID=234668", HTTPc_APP_CFG_HDR_VAL_LEN_MAX);
+    p_hdr_tmp->ValLen   = Str_Len_N(p_hdr_tmp->ValPtr, HTTPc_APP_CFG_HDR_VAL_LEN_MAX);
+
+   *p_hdr = p_hdr_tmp;
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcApp_ReqBodyHook()
+*
+* Description : Specify the data to be sent in the Request body.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               p_data      Variable that will received the pointer to the data to include in the HTTP request.
+*
+*               p_buf       Pointer to HTTP transmit buffer.
+*
+*               buf_len     Length of space remaining in  the HTTP transmit buffer.
+*
+*               p_data_len  Length of the data.
+*
+* Return(s)   : DEF_YES, if all data to transmit was passed by the application
+*               DEF_NO,  if data still remaining to be sent.
+*
+* Caller(s)   : HTTPcReq_BodyData() via 'p_req->OnBodyTx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcApp_ReqBodyHook (HTTPc_CONN_OBJ     *p_conn,
+                                   HTTPc_REQ_OBJ      *p_req,
+                                   void              **p_data,
+                                   CPU_CHAR           *p_buf,
+                                   CPU_INT16U          buf_len,
+                                   CPU_INT16U         *p_data_len)
+{
+
+    switch (p_req->Method_reserved) {
+        case HTTP_METHOD_POST:
+            *p_data     = &HTTPcApp_FormBuf[0];
+            *p_data_len =  Str_Len(&HTTPcApp_FormBuf[0]);
+             return (DEF_YES);
+
+
+        case HTTP_METHOD_PUT:
+            *p_data     = (void *)&logo_gif[0];
+            *p_data_len =  STATIC_LOGO_GIF_LEN;
+             break;
+
+
+        default:
+            *p_data_len = 0;
+             return (DEF_YES);
+
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcApp_RespHdrHook()
+*
+* Description : Retrieve header fields in the HTTP response received.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               hdr_field   HTTP header type of the header field received in the HTTP response.
+*
+*               p_hdr_val   Pointer to the value string received in the Response header field.
+*
+*               val_len     Length of the value string.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp_ParseHdr() via 'p_req->OnHdrRx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcApp_RespHdrHook (HTTPc_CONN_OBJ    *p_conn,
+                            HTTPc_REQ_OBJ     *p_req,
+                            HTTP_HDR_FIELD     hdr_field,
+                            CPU_CHAR          *p_hdr_val,
+                            CPU_INT16U         val_len)
+{
+    HTTPc_HDR  *p_hdr;
+
+
+    p_hdr         = &HTTPcApp_RespHdrTbl[0];
+    p_hdr->ValPtr = &HTTPcApp_RespHdrValStrTbl[0][0];
+
+    switch (hdr_field) {
+        case HTTP_HDR_FIELD_COOKIE:
+             p_hdr->HdrField = hdr_field;
+             Str_Copy_N(p_hdr->ValPtr, p_hdr_val, val_len);
+             p_hdr->ValLen   = val_len;
+             break;
+
+        default:
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPcApp_RespBodyHook()
+*
+* Description : Retrieve data in HTTP Response received.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection object.
+*
+*               p_req           Pointer to current HTTPc Request object.
+*
+*               content_type    HTTP Content Type of the HTTP Response body's data.
+*
+*               p_data          Pointer to a data piece of the HTTP Response body.
+*
+*               data_len        Length of the data piece received.
+*
+*               last_chunk      DEF_YES, if this is the last piece of data.
+*
+*                               DEF_NO,  if more data is up coming.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp_BodyStd()   via 'p_req->OnBodyRx()'
+*               HTTPcResp_BodyChunk() via 'p_req->OnBodyRx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_INT32U HTTPcApp_RespBodyHook (HTTPc_CONN_OBJ     *p_conn,
+                                  HTTPc_REQ_OBJ      *p_req,
+                                  HTTP_CONTENT_TYPE   content_type,
+                                  void               *p_data,
+                                  CPU_INT16U          data_len,
+                                  CPU_BOOLEAN         last_chunk)
+{
+    CPU_CHAR  *p_data_str;
+
+
+    p_data_str = &HTTPcApp_Buf[0];
+
+    Mem_Copy(p_data_str, p_data, data_len);
+
+    p_data_str +=  data_len;
+   *p_data_str  = '\0';
+    p_data_str  = &HTTPcApp_Buf[0];
+
+    HTTPc_APP_TRACE_INFO(("%s", p_data_str));
+
+    if (last_chunk == DEF_YES) {
+        HTTPc_APP_TRACE_INFO(("\n\r"));
+    }
+
+    return data_len;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcApp_FormMultipartHook()
+*
+* Description : Retrieve the value data for an Key-Val Extended object.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection object.
+*
+*               p_req           Pointer to current HTTPc Request object.
+*
+*               p_key_val_obj   Pointer to current Key-Value Extended object.
+*
+*               p_buf           Pointer to HTTP transmit buffer.
+*
+*               buf_len         Size remaining in HTTP buffer.
+*
+*               p_len_wr        Variable that will received the size of the data copied in the buffer.
+*
+* Return(s)   : DEF_YES, if all the data was transmitted.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPcApp_ReqPrepareFormMultipart().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcApp_FormMultipartHook (HTTPc_CONN_OBJ     *p_conn,
+                                         HTTPc_REQ_OBJ      *p_req,
+                                         HTTPc_KEY_VAL_EXT  *p_key_val_obj,
+                                         CPU_CHAR           *p_buf,
+                                         CPU_INT16U          buf_len,
+                                         CPU_INT16U         *p_len_wr)
+{
+    HTTPc_APP_REQ_DATA  *p_req_data;
+    CPU_CHAR            *p_data;
+    CPU_INT16U           data_ix;
+    CPU_INT16U           min_len;
+
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+    p_req_data = (HTTPc_APP_REQ_DATA *)p_req->UserDataPtr;
+
+    data_ix    = p_req_data->FormIx;
+
+    p_data     = &HTTPcApp_FormValStrTbl[1][0];
+
+    min_len    = DEF_MIN(buf_len, (p_key_val_obj->ValLen - data_ix));
+
+    if (min_len <= 0) {
+        p_req_data->FormIx = 0;
+       *p_len_wr = min_len;
+        return (DEF_YES);
+    }
+
+    Str_Copy_N(p_buf, p_data, min_len);
+
+   *p_len_wr  = min_len;
+    data_ix  += min_len;
+
+    p_req_data->FormIx = data_ix;
+
+    return (DEF_NO);
+#else
+   (void)&p_req_data;
+   (void)&p_data;
+   (void)&data_ix;
+   (void)&min_len;
+
+    return (DEF_YES);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPcApp_FormMultipartFileHook()
+*
+* Description : Retrieve the file data for a Multipart File object.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               p_file_obj  Pointer to current Multipart File object.
+*
+*               p_buf       Pointer to HTTP transmit buffer.
+*
+*               buf_len     Size remaining in HTTP buffer.
+*
+*               p_len_wr    Variable that will received the size of the data copied in the buffer.
+*
+* Return(s)   : DEF_YES, if all the data was transmitted.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPcApp_ReqPrepareFormMultipart().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+CPU_BOOLEAN  HTTPcApp_FormMultipartFileHook (HTTPc_CONN_OBJ        *p_conn,
+                                             HTTPc_REQ_OBJ         *p_req,
+                                             HTTPc_MULTIPART_FILE  *p_file_obj,
+                                             CPU_CHAR              *p_buf,
+                                             CPU_INT16U             buf_len,
+                                             CPU_INT16U            *p_len_wr)
+{
+    HTTPc_APP_REQ_DATA  *p_req_data;
+    FS_FILE             *p_file;
+    FS_FLAGS             fs_flags;
+    CPU_SIZE_T           file_rem;
+    CPU_SIZE_T           size;
+    CPU_SIZE_T           size_rd;
+    CPU_BOOLEAN          is_open;
+    CPU_BOOLEAN          finish;
+    FS_ERR               err_fs;
+
+
+    p_req_data = (HTTPc_APP_REQ_DATA *)p_req->UserDataPtr;
+
+    fs_flags = 0;
+    is_open = FSFile_IsOpen("\\index.html",
+                            &fs_flags,
+                            &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+        finish  = DEF_YES;
+        goto exit;
+    }
+
+    if (is_open == DEF_NO) {
+        fs_flags = 0;
+        DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_RD);
+        DEF_BIT_SET(fs_flags, FS_FILE_ACCESS_MODE_CREATE);
+
+        p_file = FSFile_Open("\\index.html",
+                              fs_flags,
+                             &err_fs);
+        if (err_fs != FS_ERR_NONE) {
+            finish  = DEF_YES;
+            goto exit;
+        }
+
+        p_req_data->FilePtr = p_file;
+
+    } else {
+        p_file = p_req_data->FilePtr;
+    }
+
+    file_rem = p_file->Size - p_file->Pos;
+    if (file_rem <= 0) {
+       *p_len_wr = 0;
+        finish   = DEF_YES;
+        goto exit_close;
+    }
+
+    size = DEF_MIN(file_rem, buf_len);
+
+    size_rd = FSFile_Rd(p_file, p_buf, size, &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+       *p_len_wr = 0;
+        goto exit_close;
+    }
+
+   *p_len_wr = size_rd;
+
+    finish   = DEF_NO;
+
+    goto exit;
+
+
+exit_close:
+    FSFile_Close(p_file, &err_fs);
+
+exit:
+    return (finish);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcApp_ConnConnectCallback()
+*
+* Description : Callback to notify application that an HTTP connection connect process was completed.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection.
+*
+*               open_status     Status of the connection:
+*
+*                               DEF_OK,   if the connection with the server was successful.
+*                               DEF_FAIL, otherwise.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask_Handler() via 'p_conn->OnConnect()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+void  HTTPcApp_ConnConnectCallback (HTTPc_CONN_OBJ  *p_conn,
+                                    CPU_BOOLEAN      open_status)
+{
+    if (open_status == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("Connection to server succeeded.\n\r"));
+    } else {
+        HTTPc_APP_TRACE_INFO(("Connection to server failed.\n\r"));
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcApp_ConnCloseCallback()
+*
+* Description : Callback to notify application that an HTTP connection was closed.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection.
+*
+*               close_status    Status of the connection closing:
+*                                   HTTPc_CONN_CLOSE_STATUS_ERR_INTERNAL
+*                                   HTTPc_CONN_CLOSE_STATUS_SERVER
+*                                   HTTPc_CONN_CLOSE_STATUS_NO_PERSISTENT
+*                                   HTTPc_CONN_CLOSE_STATUS_APP
+*
+*               err             Error Code when connection was closed.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_conn->OnClose()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+void  HTTPcApp_ConnCloseCallback (HTTPc_CONN_OBJ           *p_conn,
+                                  HTTPc_CONN_CLOSE_STATUS   close_status,
+                                  HTTPc_ERR                 err)
+{
+    HTTPc_APP_TRACE_INFO(("Connection closed.\n\r"));
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcApp_TransDoneCallback()
+*
+* Description : Callback to notify application that an HTTP transaction was completed.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection object.
+*
+*               p_req   Pointer to current HTTPc Request object.
+*
+*               p_resp  Pointer to current HTTPc Response object.
+*
+*               status  Status of the transaction:
+*
+*                           DEF_OK,   transaction was successful.
+*                           DEF_FAIL, otherwise.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnTransComplete()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+void  HTTPcApp_TransDoneCallback (HTTPc_CONN_OBJ  *p_conn,
+                                  HTTPc_REQ_OBJ   *p_req,
+                                  HTTPc_RESP_OBJ  *p_resp,
+                                  CPU_BOOLEAN      status)
+{
+    HTTPc_APP_REQ_DATA  *p_data;
+    HTTPc_REQ_OBJ       *p_req1;
+    HTTPc_REQ_OBJ       *p_req2;
+    CPU_SR_ALLOC();
+
+
+    p_req1 = &HTTPcApp_ReqTbl[0];
+    p_req2 = &HTTPcApp_ReqTbl[1];
+
+    if (status == DEF_OK) {
+        HTTPc_APP_TRACE_INFO(("Transaction Status Code: %s\n\r", p_resp->ReasonPhrasePtr));
+    } else {
+        HTTPc_APP_TRACE_INFO(("Transaction failed\n\r"));
+    }
+
+    if (p_req == p_req1) {
+        p_data = (HTTPc_APP_REQ_DATA *)p_req->UserDataPtr;
+        CPU_CRITICAL_ENTER();
+        p_data->Done = DEF_YES;
+        CPU_CRITICAL_EXIT();
+    }
+
+    if (p_req == p_req2) {
+        p_data = (HTTPc_APP_REQ_DATA *)p_req->UserDataPtr;
+        CPU_CRITICAL_ENTER();
+        p_data->Done = DEF_YES;
+        CPU_CRITICAL_EXIT();
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcApp_TransErrCallback()
+*
+* Description : Callback to notify application that an error occurred during an HTTP transaction.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               err_code    Error Code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnErr()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+void HTTPcApp_TransErrCallback (HTTPc_CONN_OBJ  *p_conn,
+                                HTTPc_REQ_OBJ   *p_req,
+                                HTTPc_ERR        err_code)
+{
+    HTTPc_APP_TRACE_INFO(("Transaction error: %i\n\r", err_code));
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_hooks.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_hooks.h
new file mode 100644
index 0000000..7928f6f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/http-c_hooks.h
@@ -0,0 +1,182 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                    HTTP CLIENT HOOK FUNCTIONS FILE
+*
+* Filename      : http-c_hooks.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.00.00
+*                       (d) uC/TCP-IP V3.02.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_HOOKS_MODULE_PRESENT
+#define  HTTPc_HOOKS_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcApp_ReqQueryStrHook       (HTTPc_CONN_OBJ            *p_conn,
+                                             HTTPc_REQ_OBJ             *p_req,
+                                             HTTPc_KEY_VAL            **p_key_val);
+
+CPU_BOOLEAN  HTTPcApp_ReqHdrHook            (HTTPc_CONN_OBJ            *p_conn,
+                                             HTTPc_REQ_OBJ             *p_req,
+                                             HTTPc_HDR                **p_hdr);
+
+CPU_BOOLEAN  HTTPcApp_ReqBodyHook           (HTTPc_CONN_OBJ            *p_conn,
+                                             HTTPc_REQ_OBJ             *p_req,
+                                             void                     **p_data,
+                                             CPU_CHAR                  *p_buf,
+                                             CPU_INT16U                 buf_len,
+                                             CPU_INT16U                *p_data_len);
+
+void         HTTPcApp_RespHdrHook           (HTTPc_CONN_OBJ            *p_conn,
+                                             HTTPc_REQ_OBJ             *p_req,
+                                             HTTP_HDR_FIELD             hdr_field,
+                                             CPU_CHAR                  *p_hdr_val,
+                                             CPU_INT16U                 val_len);
+
+CPU_INT32U   HTTPcApp_RespBodyHook          (HTTPc_CONN_OBJ            *p_conn,
+                                             HTTPc_REQ_OBJ             *p_req,
+                                             HTTP_CONTENT_TYPE          content_type,
+                                             void                      *p_data,
+                                             CPU_INT16U                 data_len,
+                                             CPU_BOOLEAN                last_chunk);
+
+CPU_BOOLEAN  HTTPcApp_FormMultipartHook     (HTTPc_CONN_OBJ            *p_conn,
+                                             HTTPc_REQ_OBJ             *p_req,
+                                             HTTPc_KEY_VAL_EXT         *p_key_val_obj,
+                                             CPU_CHAR                  *p_buf,
+                                             CPU_INT16U                 buf_len,
+                                             CPU_INT16U                *p_len_wr);
+
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+CPU_BOOLEAN  HTTPcApp_FormMultipartFileHook (HTTPc_CONN_OBJ            *p_conn,
+                                             HTTPc_REQ_OBJ             *p_req,
+                                             HTTPc_MULTIPART_FILE      *p_file_obj,
+                                             CPU_CHAR                  *p_buf,
+                                             CPU_INT16U                 buf_len,
+                                             CPU_INT16U                *p_len_wr);
+#endif
+
+#ifdef HTTPc_TASK_MODULE_EN
+void         HTTPcApp_ConnConnectCallback   (HTTPc_CONN_OBJ            *p_conn,
+                                             CPU_BOOLEAN                open_status);
+
+void         HTTPcApp_ConnCloseCallback     (HTTPc_CONN_OBJ            *p_conn,
+                                             HTTPc_CONN_CLOSE_STATUS    close_status,
+                                             HTTPc_ERR                  err);
+
+void         HTTPcApp_TransDoneCallback     (HTTPc_CONN_OBJ            *p_conn,
+                                             HTTPc_REQ_OBJ             *p_req,
+                                             HTTPc_RESP_OBJ            *p_resp,
+                                             CPU_BOOLEAN                status);
+
+void         HTTPcApp_TransErrCallback      (HTTPc_CONN_OBJ            *p_conn,
+                                             HTTPc_REQ_OBJ             *p_req,
+                                             HTTPc_ERR                  err_code);
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     TRACE / DEBUG CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                       0
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                      1
+#endif
+
+#ifndef  TRACE_LEVEL_DEBUG
+#define  TRACE_LEVEL_DEBUG                     2
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                       2
+#endif
+
+#define  HTTPc_APP_TRACE_LEVEL                TRACE_LEVEL_INFO
+#define  HTTPc_APP_TRACE                      printf
+
+#define  HTTPc_APP_TRACE_INFO(x)              ((HTTPc_APP_TRACE_LEVEL >= TRACE_LEVEL_INFO)  ? (void)(HTTPc_APP_TRACE x) : (void)0)
+#define  HTTPc_APP_TRACE_DBG(x)               ((HTTPc_APP_TRACE_LEVEL >= TRACE_LEVEL_DEBUG) ? (void)(HTTPc_APP_TRACE x) : (void)0)
+
+#define  HTTPc_APP_TRACE_DEBUG(x)             HTTPc_APP_TRACE_DBG(x)
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_HOOKS_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/static_files.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/static_files.c
new file mode 100644
index 0000000..576512f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/static_files.c
@@ -0,0 +1,382 @@
+
+#include  "static_files.h"
+
+
+const unsigned char logo_gif[] =
+{
+  0x47,0x49,0x46,0x38,0x39,0x61,0xD4,0x00,0x29,0x00,0xC4,0x00,0x00,0x29,  \
+  0x49,0x5B,0x77,0x8B,0x97,0x35,0x53,0x64,0xCD,0xD5,0xD9,0xA4,0xB1,0xB9,  \
+  0x63,0x7A,0x88,0xAE,0xBA,0xC1,0xC3,0xCC,0xD2,0x9B,0xAA,0xB3,0xD0,0xD7,  \
+  0xDC,0xBB,0xC5,0xCB,0x95,0xA5,0xAE,0x49,0x64,0x74,0x8A,0x9B,0xA6,0xD6,  \
+  0xDC,0xE0,0x84,0x96,0xA1,0x52,0x6C,0x7B,0x1F,0x40,0x53,0xC9,0xD1,0xD7,  \
+  0x40,0x5C,0x6C,0x7B,0x8E,0x9A,0xBE,0xC8,0xCE,0xB7,0xC2,0xC8,0x71,0x86,  \
+  0x92,0x8E,0x9F,0xA9,0x87,0x99,0xA3,0x69,0x7F,0x8C,0x59,0x71,0x80,0x7F,  \
+  0x92,0x9E,0xB4,0xBF,0xC6,0x18,0x3A,0x4E,0xFF,0xFF,0xFF,0x21,0xF9,0x04,  \
+  0x01,0x00,0x00,0x1F,0x00,0x2C,0x00,0x00,0x00,0x00,0xD4,0x00,0x29,0x00,  \
+  0x00,0x05,0xFF,0xE0,0x27,0x8E,0x64,0x69,0x9E,0x68,0x3A,0x10,0xC1,0xC6,  \
+  0x4C,0x13,0x54,0x34,0x4A,0x3A,0x62,0xC2,0xB4,0x39,0x63,0x82,0x65,0x8D,  \
+  0x60,0x23,0x53,0x31,0x39,0x16,0x40,0xE1,0xC3,0x22,0x32,0x3C,0x84,0xD0,  \
+  0xA8,0xB4,0xF1,0xE8,0x7C,0x7E,0xD3,0x2C,0x14,0x93,0x10,0x21,0x92,0xDA,  \
+  0x85,0x41,0x62,0x2B,0x1B,0x1D,0xE8,0xB4,0x1A,0xFD,0x51,0x9B,0xDF,0x70,  \
+  0xD2,0x20,0x00,0xF0,0xD8,0xEF,0x78,0x88,0x35,0x05,0xB1,0x6F,0x48,0x12,  \
+  0x75,0x78,0x1E,0x08,0x46,0x02,0x83,0x1E,0x0F,0x22,0x17,0x88,0x8D,0x8E,  \
+  0x14,0x1F,0x82,0x8E,0x93,0x1E,0x11,0x07,0x22,0x0C,0x94,0x78,0x00,0x05,  \
+  0x45,0x71,0x29,0x08,0x00,0x02,0xA3,0xA3,0x13,0x07,0x10,0x02,0x00,0x0B,  \
+  0x1F,0x04,0xA5,0x9F,0xAF,0x29,0x06,0x87,0x9A,0x95,0x0D,0x28,0x09,0xB3,  \
+  0x19,0x80,0x92,0x77,0x85,0x25,0x0E,0xB3,0x78,0x8A,0x1F,0x01,0xB4,0x93,  \
+  0x90,0xBC,0xC6,0x77,0x96,0x98,0xCA,0x76,0x00,0x06,0xB0,0x26,0x18,0x88,  \
+  0x00,0x15,0xB3,0x7F,0x8C,0x1E,0x00,0xD2,0xDD,0x22,0x04,0x11,0xCE,0x1E,  \
+  0x18,0x27,0x06,0x77,0xD1,0x23,0x81,0x88,0xBE,0x24,0xC0,0x88,0xC3,0xC5,  \
+  0xE2,0x78,0xC8,0xF2,0xCB,0x97,0x1F,0x99,0xE2,0x00,0xF7,0xDE,0x03,0x0A,  \
+  0x1D,0x75,0x0A,0x1C,0xA8,0x80,0x6B,0x9B,0x80,0x04,0x13,0x22,0x28,0xF4,  \
+  0x26,0xAD,0x42,0x32,0x5A,0x11,0x98,0x94,0x78,0x60,0xE7,0xE0,0xAE,0x75,  \
+  0x86,0xDE,0x89,0x88,0x57,0xCF,0x03,0xBD,0x8E,0xCC,0xF0,0xD5,0x0B,0xC0,  \
+  0xB0,0xC7,0xA1,0x0B,0x22,0x80,0xFF,0x45,0xD8,0xE0,0x61,0x41,0x04,0x06,  \
+  0x02,0x22,0x94,0x7C,0xC5,0xB2,0xD1,0x84,0x02,0x1B,0x82,0xE1,0xF9,0x53,  \
+  0xA2,0x26,0x84,0x12,0xEA,0x06,0xB1,0x1B,0xE1,0x6E,0xD0,0x30,0x6D,0x1D,  \
+  0x3F,0xD6,0x0B,0x99,0x0F,0x0F,0x83,0x21,0x14,0xFA,0x20,0x9A,0x30,0xF3,  \
+  0x43,0x41,0x94,0x6D,0x62,0x36,0xF0,0x30,0xC1,0x03,0x87,0x98,0xAF,0x12,  \
+  0x48,0x18,0x4B,0x96,0x47,0x4A,0xB2,0x64,0xBB,0x88,0xE8,0x10,0x6E,0x10,  \
+  0x00,0x76,0x09,0x38,0xE2,0x41,0x27,0xA2,0x60,0x22,0xA0,0x0F,0x87,0xA6,  \
+  0xD4,0x69,0x67,0x98,0x93,0x0C,0x80,0x81,0xC8,0xBD,0x73,0x61,0x48,0xE0,  \
+  0x2A,0x57,0x02,0x03,0xC6,0xD0,0xF4,0xCE,0x84,0x1F,0x8A,0x1B,0xA8,0x6D,  \
+  0x6C,0x07,0xEB,0xC6,0x6A,0x64,0x4A,0x1C,0x30,0x80,0x00,0x83,0x67,0x04,  \
+  0x06,0x06,0xA4,0xB8,0xBA,0xD7,0x83,0x81,0x3A,0x11,0x08,0x00,0x90,0xF9,  \
+  0xE9,0x41,0x04,0x00,0xB0,0x45,0xF1,0x3B,0x10,0x1B,0x76,0x84,0x61,0xC4,  \
+  0x1A,0x11,0x30,0xA1,0x61,0x13,0x83,0xDD,0x23,0x3A,0x9C,0xC3,0x8B,0xF1,  \
+  0x17,0xDF,0xBB,0x28,0x2C,0x34,0x92,0xF8,0xA6,0xF7,0x20,0x9E,0x28,0x28,  \
+  0x7B,0xB0,0xFC,0xE1,0x40,0xDB,0x65,0x9E,0xBE,0x31,0xB8,0xBE,0xA9,0xD3,  \
+  0x09,0xD2,0x56,0x0F,0x9D,0xE2,0x1A,0x88,0x75,0x1C,0x0A,0x83,0x22,0x64,  \
+  0xB7,0x3E,0x08,0x52,0xB3,0x41,0x3F,0x4D,0x28,0xB8,0x89,0xA1,0x83,0x5A,  \
+  0x12,0x19,0x9E,0x89,0xBE,0x38,0x88,0x43,0x07,0x03,0x00,0x06,0x78,0x1C,  \
+  0x6E,0x26,0x28,0x87,0xC8,0x1E,0x6F,0x14,0x80,0x48,0xFF,0x7C,0xD1,0x21,  \
+  0x42,0x5D,0x05,0xDC,0x55,0xC2,0x0F,0x52,0x93,0x40,0x63,0x42,0x41,0x24,  \
+  0xB5,0x91,0x90,0x04,0x14,0x69,0xE0,0x00,0x6C,0xAF,0xA0,0x87,0x87,0x7A,  \
+  0x23,0xB0,0x37,0x4F,0x5D,0x0F,0xE9,0x72,0x86,0x0D,0x3E,0x99,0x10,0x54,  \
+  0x47,0x04,0x96,0x60,0xE0,0x20,0x08,0x9A,0xA1,0x20,0x7C,0x36,0x48,0x47,  \
+  0x9D,0x73,0x9B,0xA8,0xB5,0x95,0x31,0x02,0xEC,0x47,0xD4,0x40,0xFB,0x39,  \
+  0x70,0xC0,0x01,0x0E,0x24,0x50,0x81,0x68,0x47,0x86,0x98,0xDE,0x7A,0x11,  \
+  0xBA,0x67,0x22,0x1E,0xC0,0x7D,0x52,0x14,0x07,0x2E,0x3E,0xE4,0x4C,0x8C,  \
+  0x24,0xCC,0x88,0x47,0x8D,0x65,0xDC,0x98,0x47,0x8E,0x88,0x30,0xC0,0x01,  \
+  0x05,0x17,0x74,0xB5,0x60,0x4A,0x6A,0xDA,0x71,0xDB,0x3F,0x14,0xDA,0xE1,  \
+  0x5E,0x55,0x65,0x88,0x88,0x5D,0x89,0x51,0x8A,0x60,0x41,0x84,0x1E,0x80,  \
+  0xF9,0xC6,0x8C,0x74,0xA5,0xA3,0xA5,0x32,0x5C,0x8E,0xE0,0xE5,0x1D,0x7E,  \
+  0xA6,0x20,0xE6,0x1D,0x0C,0x9E,0x20,0x1D,0x2D,0xBE,0xBC,0xE8,0x81,0x00,  \
+  0x66,0x7D,0x10,0x95,0x06,0x14,0x60,0x80,0x40,0xA2,0x74,0x96,0x60,0xA7,  \
+  0x9B,0x50,0xB6,0xA7,0x67,0x23,0x9C,0xDA,0x40,0xCD,0x36,0x42,0x0A,0xDA,  \
+  0x51,0x5F,0x29,0x1C,0x6A,0x47,0xA9,0x26,0x2C,0x6A,0x47,0xA3,0x26,0x3C,  \
+  0x4A,0x09,0x74,0x92,0x7A,0x00,0x01,0x06,0x06,0x54,0x50,0x69,0xA7,0x40,  \
+  0x35,0x40,0x01,0x98,0x9F,0x56,0x12,0xEA,0x89,0x1F,0x40,0x88,0x48,0xA0,  \
+  0x70,0xDC,0xC8,0xC0,0x09,0xB9,0x8A,0x53,0xE8,0xA8,0x07,0xC6,0x21,0xAB,  \
+  0xFF,0xAE,0x64,0x3A,0xB3,0xC1,0x7D,0x22,0x35,0xF2,0xDA,0x04,0x1A,0x20,  \
+  0xC0,0x2D,0x9D,0x07,0x04,0x33,0x54,0xB1,0x24,0x8A,0x30,0xA5,0x9C,0x22,  \
+  0x44,0xAB,0xD7,0x08,0x0F,0x2C,0x90,0x59,0x3B,0xB3,0xCC,0xC9,0x5F,0x1E,  \
+  0x17,0xE4,0xAB,0xEF,0x05,0x0F,0x4D,0xFB,0x81,0xAB,0x7D,0x5A,0xBB,0x66,  \
+  0x0A,0xB6,0xBA,0x05,0xC1,0xBB,0x04,0x00,0xF9,0xEE,0x27,0x38,0x6D,0xE0,  \
+  0xB0,0xC3,0x6D,0x72,0x55,0x29,0xBA,0xD9,0x29,0x8B,0xAC,0x03,0x11,0xDB,  \
+  0x91,0x21,0x71,0x00,0x40,0x40,0x83,0x59,0x0A,0xB4,0x55,0xE5,0xBD,0xBD,  \
+  0x64,0x64,0x54,0xAB,0xA4,0x0A,0x8C,0x23,0xC1,0x88,0x6C,0x40,0xC0,0xCB,  \
+  0x2F,0x77,0x30,0xEF,0x34,0x7C,0x36,0xB2,0x30,0x1C,0x83,0xDE,0x01,0x80,  \
+  0x90,0xE8,0xD6,0xD0,0x04,0x22,0x73,0x5E,0x3B,0xC1,0xAF,0x22,0x50,0x34,  \
+  0x48,0x86,0xA7,0x02,0x30,0xB3,0xAA,0x42,0x99,0x2C,0x0C,0xCA,0xD5,0x36,  \
+  0x3B,0x70,0x83,0x83,0x50,0xF7,0x46,0x05,0x01,0x4C,0x90,0xF3,0xA4,0xE3,  \
+  0xC6,0x11,0x81,0x00,0x0A,0x28,0x60,0x81,0x05,0x07,0x18,0x3D,0x2B,0x09,  \
+  0xC5,0xB6,0x04,0x2F,0xD0,0x23,0x20,0xD0,0x08,0x96,0x5D,0x3E,0x44,0xCE,  \
+  0x07,0xCE,0xA2,0xE0,0xAE,0xD3,0x77,0xF8,0x0B,0x30,0xAC,0x25,0x5C,0x4B,  \
+  0x6B,0x09,0x3A,0x76,0x93,0x80,0x01,0x0D,0x68,0xB0,0x1D,0x22,0x23,0x7F,  \
+  0x12,0x01,0x55,0xED,0x5C,0x10,0x0E,0x03,0xFC,0x58,0x8A,0x88,0x00,0x04,  \
+  0xAC,0xF0,0xD0,0x9C,0x18,0x37,0xE2,0xB2,0x05,0x06,0x70,0xF0,0x90,0xD2,  \
+  0x59,0x69,0x6C,0x77,0xFF,0x5E,0x78,0xB3,0x9A,0x5C,0xCA,0x52,0xAF,0x4C,  \
+  0x35,0x1E,0x56,0xA7,0x90,0xA4,0x04,0x9C,0x23,0x30,0x94,0x02,0x7C,0xAD,  \
+  0x22,0xCD,0xE2,0x27,0x0C,0x44,0x74,0xDA,0x6E,0x3E,0x42,0x82,0xDB,0xF5,  \
+  0xB8,0x67,0x71,0xE2,0x4C,0xE3,0xF1,0x6E,0x51,0x4F,0x9F,0x1E,0x75,0x82,  \
+  0x53,0x3B,0xEA,0x20,0x1C,0xFC,0x72,0x37,0x72,0xC6,0xCC,0x7A,0xCD,0xF8,  \
+  0x1B,0xBC,0x53,0x62,0xEF,0x07,0x71,0xD2,0x32,0x81,0x5A,0x0B,0x3C,0x13,  \
+  0x39,0xC9,0x76,0x1C,0x3F,0x20,0xD4,0x34,0xAA,0x3C,0x26,0xCB,0x55,0xC3,  \
+  0x71,0xEA,0x26,0x14,0x10,0xB0,0x80,0x54,0x77,0x58,0x74,0xFB,0xF5,0x66,  \
+  0x64,0x7F,0xCC,0x2F,0x35,0x01,0x99,0x9D,0x73,0xCF,0x1A,0x5D,0x71,0xE8,  \
+  0xA5,0x11,0xE5,0xA5,0x2F,0x75,0xEB,0x5B,0x1D,0x61,0xE0,0xE0,0x80,0x82,  \
+  0x21,0xC2,0x76,0xF7,0x3B,0x8F,0x3C,0xB6,0xD7,0x06,0x0A,0xD4,0x6C,0x10,  \
+  0x90,0x23,0x81,0x9A,0x5A,0x57,0xBC,0x92,0x19,0xA7,0x80,0x27,0xD8,0x9B,  \
+  0xFA,0x18,0x95,0x2D,0xD6,0xC5,0x41,0x02,0x0E,0x74,0xD3,0xDC,0xBA,0x81,  \
+  0x3B,0x38,0x14,0x0B,0x00,0x8E,0xB3,0x03,0x4E,0x6A,0x03,0x80,0x69,0x55,  \
+  0x20,0x4D,0x7C,0x02,0x00,0x03,0x10,0xF0,0xAB,0x90,0x95,0x4F,0x05,0x5A,  \
+  0xA3,0x21,0xF1,0x1A,0x48,0x43,0x00,0xAC,0x50,0x3E,0x45,0x04,0x5B,0x1C,  \
+  0xF8,0x45,0xC3,0x02,0xB0,0xA8,0x88,0x70,0x83,0x43,0x02,0x1A,0x90,0x90,  \
+  0x46,0x08,0x40,0x03,0x3E,0xF3,0x46,0x0B,0xB1,0x97,0x9E,0x23,0x89,0x21,  \
+  0x49,0x03,0x48,0x80,0x18,0x07,0x40,0xB4,0xFF,0x5F,0x6C,0x06,0x01,0x0B,  \
+  0x58,0x00,0x68,0x96,0xD6,0xAE,0x34,0x2E,0x20,0x55,0xBF,0x10,0xA3,0x1C,  \
+  0xC5,0x58,0x46,0xAB,0xCC,0x31,0x01,0x64,0x74,0xDD,0x1D,0xE9,0x18,0x07,  \
+  0x3C,0xCE,0x31,0x8C,0x36,0xF0,0xA3,0x1C,0xF3,0xF8,0x0A,0x07,0x48,0xA0,  \
+  0x03,0xF2,0x53,0x23,0x01,0x14,0xD0,0xB5,0x08,0xBA,0xF0,0x49,0xC0,0x8A,  \
+  0xA4,0x24,0x27,0x49,0xC9,0x4A,0x92,0x60,0x8B,0xF9,0x83,0xA4,0x25,0x37,  \
+  0xC9,0xC9,0x4E,0x7A,0xD2,0x04,0x98,0xAC,0x93,0x26,0x3F,0x49,0xCA,0x52,  \
+  0x9A,0xB2,0x24,0xA1,0xB4,0x01,0xC5,0x4E,0xC9,0xCA,0x56,0xBA,0x32,0x05,  \
+  0xA9,0x4C,0xC1,0x2A,0x5F,0x49,0xCB,0x5A,0x9A,0x32,0x96,0xC9,0xC1,0x80,  \
+  0x1B,0xD3,0xD8,0xC8,0x0F,0x0C,0x00,0x8E,0x28,0x60,0x43,0x1B,0xD6,0x40,  \
+  0xCC,0x62,0x96,0xD1,0x01,0x80,0xB4,0xA5,0x32,0x23,0x89,0xCB,0x92,0xC8,  \
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+  0x06,0x19,0x28,0x00,0x04,0xBE,0x06,0x81,0xF8,0xB1,0x73,0x03,0xB0,0x99,  \
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+  0x1C,0xC0,0x2B,0x22,0x40,0x0F,0x19,0xC2,0xB7,0x87,0x04,0x70,0xFF,0x22,  \
+  0x59,0xE1,0xFC,0x40,0x07,0x34,0xC0,0x81,0x2E,0x18,0x60,0x01,0x2C,0x20,  \
+  0xC2,0x07,0x38,0xA4,0x00,0x07,0x14,0x2E,0x1A,0x3E,0xE8,0x00,0x05,0x98,  \
+  0x83,0x50,0x56,0x7E,0x6D,0x97,0x38,0xCD,0xA9,0x4E,0x77,0x8A,0x80,0x17,  \
+  0x96,0xB4,0x6F,0xB7,0xC1,0x40,0x6F,0xF6,0xE0,0x38,0x21,0x99,0x03,0x38,  \
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+  0x20,0x62,0xA0,0xC3,0x07,0xFE,0xB6,0xE2,0x89,0xAE,0xA4,0x62,0x3A,0x24,  \
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+  0x40,0x80,0x22,0x12,0x40,0xCF,0x68,0x13,0x01,0x51,0x87,0x1E,0xF6,0xB6,  \
+  0x6F,0x60,0xE8,0xAC,0xC0,0xFA,0x01,0x05,0x8C,0x43,0x04,0x02,0x88,0xCF,  \
+  0x45,0xA3,0xA8,0xD6,0xB5,0xA8,0xCD,0x04,0x1B,0xC0,0x4A,0x01,0xF6,0xB1,  \
+  0x92,0x05,0x3C,0x60,0x53,0xBF,0xE5,0x1E,0x6C,0x9C,0xA8,0x81,0x08,0x60,  \
+  0x80,0x0A,0x8F,0xA7,0x10,0x00,0x6E,0xB7,0xFB,0x09,0x86,0x4E,0x80,0x78,  \
+  0x1F,0x70,0x5B,0x34,0x24,0x30,0xCF,0x9F,0x55,0xC9,0xA3,0x4E,0xFC,0x00,  \
+  0x47,0x4F,0xB0,0xCF,0x06,0x2C,0xA0,0x63,0x1F,0x08,0xAE,0x04,0x26,0xF0,  \
+  0x80,0x84,0xED,0x21,0x7C,0x11,0xB9,0x42,0x9F,0xA8,0x28,0x01,0x01,0x70,  \
+  0x96,0xBB,0x00,0x46,0x81,0x70,0x00,0x50,0x5A,0x14,0x58,0x90,0x0C,0xC2,  \
+  0xF1,0x05,0x35,0x2A,0x16,0x01,0x5B,0x10,0x63,0x67,0x21,0x9C,0x85,0x00,  \
+  0x8A,0x00,0x8E,0x49,0x49,0x80,0x03,0x4C,0xFD,0x59,0x7A,0x1D,0x20,0x95,  \
+  0x0C,0xC8,0x93,0xB8,0x01,0x0E,0x31,0x09,0x46,0xCA,0x46,0x40,0x20,0xC9,  \
+  0x2A,0x04,0x69,0x97,0xAF,0x7A,0x90,0xE2,0x95,0x9E,0xF8,0x3B,0x1D,0xB0,  \
+  0x4F,0x89,0x42,0xE3,0x62,0xB3,0x38,0x60,0x49,0x44,0x31,0x40,0x0D,0x6E,  \
+  0x6C,0x58,0x11,0x4B,0x32,0x04,0x00,0x3B,  \
+};
+
+
+const unsigned char index_html[] =
+{
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+  0x74,0x65,0x73,0x74,0x2D,0x32,0x30,0x31,0x2E,0x67,0x69,0x66,0x22,0x20,  \
+  0x77,0x69,0x64,0x74,0x68,0x3D,0x22,0x32,0x30,0x30,0x22,0x20,0x68,0x65,  \
+  0x69,0x67,0x68,0x74,0x3D,0x22,0x31,0x35,0x30,0x22,0x3E,0x3C,0x62,0x72,  \
+  0x3E,0x09,0x09,0x0A,0x09,0x09,0x09,0x3C,0x69,0x6D,0x67,0x20,0x73,0x72,  \
+  0x63,0x3D,0x22,0x74,0x65,0x73,0x74,0x32,0x2E,0x6A,0x70,0x67,0x22,0x3E,  \
+  0x3C,0x62,0x72,0x3E,0x09,0x0A,0x09,0x09,0x3C,0x2F,0x64,0x69,0x76,0x3E,  \
+  0x0A,0x0A,0x09,0x09,0x3C,0x64,0x69,0x76,0x20,0x69,0x64,0x3D,0x22,0x63,  \
+  0x6F,0x70,0x79,0x72,0x69,0x67,0x68,0x74,0x22,0x3E,0x0A,0x09,0x09,0x09,  \
+  0x3C,0x70,0x3E,0x43,0x6F,0x70,0x79,0x72,0x69,0x67,0x68,0x74,0x20,0x32,  \
+  0x30,0x31,0x30,0x20,0x4D,0x69,0x63,0x72,0x69,0x26,0x6D,0x69,0x63,0x72,  \
+  0x6F,0x3B,0x6D,0x20,0x49,0x6E,0x63,0x2E,0x3C,0x2F,0x70,0x3E,0x0A,0x09,  \
+  0x09,0x3C,0x2F,0x64,0x69,0x76,0x3E,0x0A,0x0A,0x09,0x3C,0x2F,0x64,0x69,  \
+  0x76,0x3E,0x0A,0x0A,0x3C,0x2F,0x64,0x69,0x76,0x3E,0x0A,0x0A,0x3C,0x2F,  \
+  0x62,0x6F,0x64,0x79,0x3E,0x0A,0x3C,0x2F,0x68,0x74,0x6D,0x6C,0x3E,0x0A,  \
+    \
+};
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/static_files.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/static_files.h
new file mode 100644
index 0000000..1a9f06a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Examples/static_files.h
@@ -0,0 +1,16 @@
+
+#ifndef  APP_STATIC_FILES_PRESENT
+#define  APP_STATIC_FILES_PRESENT
+
+
+#define  STATIC_LOGO_GIF_NAME               "\\logo.gif"
+#define  STATIC_INDEX_HTML_NAME             "\\index.html"
+
+#define  STATIC_LOGO_GIF_LEN                2066u
+#define  STATIC_INDEX_HTML_LEN              3080u
+
+
+extern const unsigned char logo_gif[];
+extern const unsigned char index_html[];
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c.c
new file mode 100644
index 0000000..61366e5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c.c
@@ -0,0 +1,3161 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             HTTP CLIENT
+*
+* Filename      : http-c.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPc_MODULE
+
+#include  
+#include  
+
+#include  "http-c.h"
+#include  "http-c_type.h"
+#include  "http-c_sock.h"
+#include  "http-c_conn.h"
+#include  "http-c_req.h"
+#include  "http-c_resp.h"
+#include  "http-c_mem.h"
+#ifdef HTTPc_TASK_MODULE_EN
+#include  "http-c_task.h"
+#endif
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+#include  "http-c_websock.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPc_BUF_LEN_MIN                  256u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static         CPU_BOOLEAN   HTTPc_InitDone = DEF_NO;
+
+static  const  HTTPc_CFG    *HTTPc_CfgPtr;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if ((HTTPc_CFG_PERSISTENT_EN == DEF_ENABLED) || \
+      defined(HTTPc_SIGNAL_TASK_MODULE_EN)       )
+static  void  HTTPc_ConnCloseHandler (HTTPc_CONN   *p_conn,
+                                      HTTPc_FLAGS   flags,
+                                      HTTPc_ERR    *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPc_Init()
+*
+* Description : (1) Initialize HTTP Client Suite :
+*                   (a) Validate Configuration.
+*                   (c) Create HTTP Client Task if necessary.
+*
+*
+* Argument(s) : p_cfg       Pointer to HTTP Client Instance Configuration Object.
+*
+*               p_task_cfg  Pointer to HTTP Client task configuration object.
+*
+*               p_mem_seg   For future usage: Set to DEF_NULL.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                                  HTTPc Initialization successful.
+*                               HTTPc_ERR_NULL_PTR                              function passed a null pointer as argument(s).
+*                               HTTPc_ERR_CFG_CONN_INACTIVITY_TIMEOUT_INVALID   Invalid inactivity timeout value.
+*                               HTTPc_ERR_CFG_CONN_Q_SIZE_INVALID               Invalid Conn Q size value.
+*                               HTTPc_ERR_CFG_REQ_Q_SIZE_INVALID                Invalid Request Q size value.
+*                               HTTPc_ERR_CFG_TASK_PTR_NULL                     Null Task configuration's pointer.
+*                               HTTPc_ERR_INIT                                  HTTPc Initialization failed.
+**
+*                               ----------- RETURNED BY HTTPcTask_Init() : ------------
+*                               See HTTPcTask_Init() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPc_Init (const  HTTPc_CFG       *p_cfg,
+                  const  HTTP_TASK_CFG   *p_task_cfg,
+                         MEM_SEG         *p_mem_seg,
+                         HTTPc_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    if (HTTPc_InitDone == DEF_NO) {
+        CPU_CRITICAL_EXIT();
+
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+
+        if (p_err == DEF_NULL) {                                /* Validate p_err ptr.                                  */
+            CPU_SW_EXCEPTION();
+        }
+
+        if (p_cfg == DEF_NULL) {                                /* Validate cfg ptr.                                    */
+           *p_err = HTTPc_ERR_NULL_PTR;
+            goto exit;
+        }
+
+        if (p_cfg->MsgQ_Size <= 0) {
+           *p_err = HTTPc_ERR_CFG_MSG_Q_SIZE_INVALID;
+            goto exit;
+        }
+
+#ifdef HTTPc_TASK_MODULE_EN
+                                                                /* Validate HTTPc Task parameters.                      */
+        if (p_task_cfg == DEF_NULL) {
+           *p_err = HTTPc_ERR_CFG_TASK_PTR_NULL;
+            goto exit;
+        }
+
+        HTTPcTask_SetDly (p_cfg->TaskDly_ms, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit;
+        }
+#endif
+#endif
+
+        HTTPc_CfgPtr = p_cfg;                                   /* Set global Cfg pointer variable.                     */
+
+
+#ifdef HTTPc_TASK_MODULE_EN
+        HTTPc_Mem_TaskMsgPoolInit(p_cfg, p_mem_seg, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit;
+        }
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+        HTTPc_Mem_WebSockReqPoolInit(p_cfg, p_mem_seg, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit;
+        }
+#endif
+        HTTPcTask_Init(p_cfg,                                   /* HTTPc Task creation.                                 */
+                       p_task_cfg,
+                       p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit;
+        }
+#endif
+
+    } else {
+        CPU_CRITICAL_EXIT();
+       *p_err = HTTPc_ERR_INIT;
+        goto exit;
+    }
+
+    CPU_CRITICAL_ENTER();
+    HTTPc_InitDone = DEF_YES;
+    CPU_CRITICAL_EXIT();
+
+   (void)&p_mem_seg;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPc_ConnClr()
+*
+* Description : Clear an HTTPc Connection before the first usage.
+*
+* Argument(s) : p_conn_obj  Pointer to the current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Connection object clear successfully.
+*                               HTTPc_ERR_INIT_NOT_COMPLETED    HTTPc Initialization is not completed.
+*                               HTTPc_ERR_NULL_PTR              Function passed Null pointer as argument(s).
+*                               HTTPc_ERR_CONN_IS_USED          Connection is already used.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) This function MUST be called before the HTTPc_CONN object is used for the first time.
+*********************************************************************************************************
+*/
+
+void  HTTPc_ConnClr (HTTPc_CONN_OBJ    *p_conn_obj,
+                     HTTPc_ERR         *p_err)
+{
+    const HTTPc_CFG    *p_cfg;
+          HTTPc_CONN   *p_conn;
+          CPU_BOOLEAN   in_use;
+          CPU_SR_ALLOC();
+
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_conn_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_cfg  = HTTPc_CfgPtr;
+    p_conn = (HTTPc_CONN *)p_conn_obj;
+
+                                                                /* ------ VALIDATE THAT CONN IS NOT USED ALREADY ------ */
+    CPU_CRITICAL_ENTER();
+    in_use = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_IN_USE);
+    CPU_CRITICAL_EXIT();
+    if (in_use == DEF_YES) {
+       *p_err = HTTPc_ERR_CONN_IS_USED;
+        goto exit;
+    }
+
+                                                                /* ------------ INIT CONNECTION PARAMETERS ------------ */
+    Mem_Clr(&p_conn->ServerSockAddr, sizeof (NET_SOCK_ADDR));
+    p_conn->SockID                      = NET_SOCK_ID_NONE;
+    p_conn->SockFlags                   = DEF_BIT_NONE;
+    p_conn->ConnectTimeout_ms           = p_cfg->ConnConnectTimeout_ms;
+    p_conn->InactivityTimeout_s         = p_cfg->ConnInactivityTimeout_s;
+#ifndef NET_SECURE_MODULE_EN
+    p_conn->ServerPort                  = HTTP_DFLT_PORT_NBR;
+#else
+    p_conn->ServerPort                  = HTTP_DFLT_PORT_NBR;
+    p_conn->SockSecureCfg.CommonName    = DEF_NULL;
+    p_conn->SockSecureCfg.TrustCallback = DEF_NULL;
+#endif
+    p_conn->HostNamePtr                 = DEF_NULL;
+    p_conn->HostNameLen                 = 0;
+    p_conn->State                       = HTTPc_CONN_STATE_NONE;
+    p_conn->Flags                       = DEF_BIT_NONE;
+    p_conn->ErrCode                     = HTTPc_ERR_NONE;
+    p_conn->CloseStatus                 = HTTPc_CONN_CLOSE_STATUS_NONE;
+#ifdef HTTPc_TASK_MODULE_EN
+    p_conn->OnConnect                   = DEF_NULL;
+    p_conn->OnClose                     = DEF_NULL;
+#endif
+
+                                                                /* ------------- INIT REQUEST PARAMETERS -------------- */
+    p_conn->ReqListHeadPtr           = DEF_NULL;
+    p_conn->ReqListEndPtr            = DEF_NULL;
+    p_conn->ReqFlags                 = 0u;
+#if (HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED)
+    p_conn->ReqQueryStrTxIx          = 0u;
+    p_conn->ReqQueryStrTempPtr       = DEF_NULL;
+#endif
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+    p_conn->ReqHdrTxIx               = 0u;
+    p_conn->ReqHdrTempPtr            = DEF_NULL;
+#endif
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+    p_conn->ReqFormDataTxIx          = 0u;
+#endif
+    p_conn->ReqDataOffset            = 0u;
+
+                                                                /* ------------- INIT RESPONSE PARAMETERS ------------- */
+    p_conn->RespFlags                = 0u;
+
+
+                                                                /* --------- INIT CONNECTION BUFFER PARAMETERS -------- */
+    p_conn->RxBufPtr                 = p_conn->BufPtr;
+    p_conn->RxDataLenRem             = 0u;
+    p_conn->RxDataLen                = 0u;
+    p_conn->TxBufPtr                 = p_conn->BufPtr;
+    p_conn->TxDataLen                = 0u;
+    p_conn->TxDataPtr                = DEF_NULL;
+    p_conn->BufPtr                   = DEF_NULL;
+    p_conn->BufLen                   = 0;
+    p_conn->NextPtr                  = DEF_NULL;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPc_ConnSetParam()
+*
+* Description : Set parameters related to the HTTP Client Connection.
+*
+* Argument(s) : p_conn      Pointer to the current HTTPc Connection.
+*
+*               type        Parameter type :
+*
+*                               HTTPc_PARAM_TYPE_SERVER_PORT
+*                               HTTPc_PARAM_TYPE_PERSISTENT
+*                               HTTPc_PARAM_TYPE_CONNECT_TIMEOUT
+*                               HTTPc_PARAM_TYPE_INACTIVITY_TIMEOUT
+*                               HTTPc_PARAM_TYPE_SECURE_COMMON_NAME
+*                               HTTPc_PARAM_TYPE_SECURE_TRUST_CALLBACK
+*                               HTTPc_PARAM_TYPE_CONN_CONNECT_CALLBACK
+*                               HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK
+*
+*               p_param     Pointer to parameter
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Parameter set successfully.
+*                               HTTPc_ERR_INIT_NOT_COMPLETED    HTTP Client Initialization not completed.
+*                               HTTPc_ERR_NULL_PTR              Function passed Null argument(s).
+*                               HTTPc_ERR_CONN_IS_USED          HTTPc Connection currently used.
+*                               HTTPc_ERR_PARAM_INVALID         Invalid parameter passed.
+*                               HTTPc_ERR_FEATURE_DIS           Parameter is related with a disabled feature.
+*
+* Return(s)   : None
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPc_ConnSetParam (HTTPc_CONN_OBJ    *p_conn_obj,
+                          HTTPc_PARAM_TYPE   type,
+                          void              *p_param,
+                          HTTPc_ERR         *p_err)
+{
+    HTTPc_CONN       *p_conn;
+    CPU_BOOLEAN       in_use;
+#if (HTTPc_CFG_PERSISTENT_EN == DEF_ENABLED)
+    CPU_BOOLEAN       persistent;
+#endif
+    CPU_SR_ALLOC();
+
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_conn_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_param == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_conn = (HTTPc_CONN *)p_conn_obj;
+
+                                                                /* ------ VALIDATE THAT CONN IS NOT USED ALREADY ------ */
+    CPU_CRITICAL_ENTER();
+    in_use = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_IN_USE);
+    CPU_CRITICAL_EXIT();
+    if (in_use == DEF_YES) {
+       *p_err = HTTPc_ERR_CONN_IS_USED;
+        goto exit;
+    }
+
+    switch (type) {
+        case HTTPc_PARAM_TYPE_SERVER_PORT:
+             p_conn->ServerPort = *(NET_PORT_NBR *)p_param;
+             break;
+
+
+        case HTTPc_PARAM_TYPE_PERSISTENT:
+#if (HTTPc_CFG_PERSISTENT_EN == DEF_ENABLED)
+             persistent = *(CPU_BOOLEAN *)p_param;
+             if (persistent == DEF_YES) {
+                 DEF_BIT_SET(p_conn->Flags, HTTPc_FLAG_CONN_PERSISTENT);
+             }
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_CONNECT_TIMEOUT:
+             p_conn->ConnectTimeout_ms = *(CPU_INT16U *)p_param;
+             break;
+
+
+        case HTTPc_PARAM_TYPE_INACTIVITY_TIMEOUT:
+             p_conn->InactivityTimeout_s = *(CPU_INT16U *)p_param;
+             break;
+
+
+        case HTTPc_PARAM_TYPE_SECURE_COMMON_NAME:
+#ifdef NET_SECURE_MODULE_EN
+             p_conn->SockSecureCfg.CommonName = (CPU_CHAR *)p_param;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_SECURE_TRUST_CALLBACK:
+#ifdef NET_SECURE_MODULE_EN
+             p_conn->SockSecureCfg.TrustCallback = (NET_SOCK_SECURE_TRUST_FNCT)p_param;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_CONN_CONNECT_CALLBACK:
+#ifdef HTTPc_TASK_MODULE_EN
+             p_conn->OnConnect = (HTTPc_CONNECT_CALLBACK)p_param;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK:
+#ifdef HTTPc_TASK_MODULE_EN
+             p_conn->OnClose = (HTTPc_CONN_CLOSE_CALLBACK)p_param;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+        default:
+           *p_err = HTTPc_ERR_PARAM_INVALID;
+            goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            HTTPc_ConnOpen()
+*
+* Description : Open a new HTTP connection.
+*
+* Argument(s) : p_conn_obj          Pointer to HTTPc Connection object to open.
+*
+*               p_buf               Pointer to the HTTP buffer that will be used to Tx and Rx data.
+*
+*               buf_len             Length of the HTTP buffer.
+*
+*               p_hostname_str      Pointer to the hostname string.
+*
+*               hostname_str_len    Length of the hostname string.
+*
+*               flags               Configuration flags :
+*
+*                                       HTTPc_FLAG_CONN_NO_BLOCK
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                          Connection Open successfully started.
+*                               HTTPc_ERR_INIT_NOT_COMPLETED            HTTPc Initialization is not completed.
+*                               HTTPc_ERR_NULL_PTR                      Function passed null pointer as argument(s).
+*                               HTTPc_ERR_CFG_INVALID_BUF_LEN           Buffer Length is to small.
+*                               HTTPc_ERR_CONN_PARAM_HOSTNAME_INVALID   Hostname Pointer is null.
+*                               HTTPc_ERR_CONN_IS_USED                  Connection is already used.
+*
+* Return(s)   : DEF_OK,   if Connection opening successfully completed.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPc_ConnOpen (HTTPc_CONN_OBJ    *p_conn_obj,
+                             CPU_CHAR          *p_buf,
+                             CPU_INT16U         buf_len,
+                             CPU_CHAR          *p_hostname_str,
+                             CPU_INT16U         hostname_str_len,
+                             HTTPc_FLAGS        flags,
+                             HTTPc_ERR         *p_err)
+{
+    HTTPc_CONN      *p_conn;
+    CPU_BOOLEAN      result;
+    CPU_BOOLEAN      in_use;
+    CPU_BOOLEAN      no_block;
+    HTTPc_ERR        err;
+    CPU_SR_ALLOC();
+
+
+    result = DEF_FAIL;
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_conn_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_buf == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (buf_len < HTTPc_BUF_LEN_MIN) {
+       *p_err = HTTPc_ERR_CFG_INVALID_BUF_LEN;
+        goto exit;
+    }
+
+    if (p_hostname_str == DEF_NULL) {
+       *p_err = HTTPc_ERR_CONN_PARAM_HOSTNAME_INVALID;
+        goto exit;
+    }
+
+    if (hostname_str_len <= 0) {
+       *p_err = HTTPc_ERR_CONN_PARAM_HOSTNAME_INVALID;
+        goto exit;
+    }
+#endif
+
+    p_conn = (HTTPc_CONN *)p_conn_obj;
+                                                                /* ------ VALIDATE THAT CONN IS NOT USED ALREADY ------ */
+    CPU_CRITICAL_ENTER();
+    in_use = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_IN_USE);
+    CPU_CRITICAL_EXIT();
+    if (in_use == DEF_YES) {
+       *p_err = HTTPc_ERR_CONN_IS_USED;
+        goto exit;
+    }
+
+                                                                /* -------------- SET BUFFER PARAMETERS --------------- */
+    p_conn->BufPtr   = p_buf;
+    p_conn->TxBufPtr = p_buf;
+    p_conn->RxBufPtr = p_buf;
+    p_conn->BufLen   = buf_len;
+    p_conn->NextPtr  = DEF_NULL;
+
+                                                                /* ------------- SET HOSTNAME PARAMETERS -------------- */
+    p_conn->HostNamePtr = p_hostname_str;
+    p_conn->HostNameLen = hostname_str_len;
+
+                                                                /* ---------------- SET BLOCKING MODE ----------------- */
+    no_block = DEF_BIT_IS_SET(flags, HTTPc_FLAG_CONN_NO_BLOCK);
+    if (no_block == DEF_YES) {
+        DEF_BIT_SET(p_conn->Flags, HTTPc_FLAG_CONN_NO_BLOCK);
+    } else {
+        DEF_BIT_CLR(p_conn->Flags, HTTPc_FLAG_CONN_NO_BLOCK);
+    }
+
+#ifdef HTTPc_TASK_MODULE_EN
+
+    if (no_block == DEF_NO) {
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+        HTTPcTask_ConnConnectSignalCreate(p_conn, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit;
+        }
+#else
+       *p_err = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+#endif
+    }
+
+    HTTPcTask_MsgQueue(         HTTPc_MSG_TYPE_CONN_OPEN,
+                       (void *) p_conn,
+                                p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+        goto exit;
+    }
+
+    HTTPcTask_Wake(p_conn, &err);
+    if (*p_err != HTTPc_ERR_NONE) {
+         CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+
+
+    if (no_block == DEF_NO) {
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+        HTTPcTask_ConnConnectSignalWait(p_conn, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             HTTPc_ConnCloseHandler(p_conn, HTTPc_FLAG_NONE, &err);
+             goto exit;
+        }
+
+        HTTPcTask_ConnConnectSignalDel(p_conn, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             HTTPc_ConnCloseHandler(p_conn, HTTPc_FLAG_NONE, &err);
+             goto exit;
+        }
+
+        CPU_CRITICAL_ENTER();
+        result = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_CONNECT);
+        CPU_CRITICAL_EXIT();
+        if (result == DEF_FAIL) {
+           *p_err = p_conn->ErrCode;
+            goto exit;
+        }
+
+#else
+       *p_err = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+#endif
+    }
+
+#else
+
+    if (no_block == DEF_YES) {
+       *p_err  = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+    }
+
+    HTTPcConn_Add(p_conn);
+
+    while ((p_conn->State != HTTPc_CONN_STATE_PARAM_VALIDATE) &&
+           (p_conn->State != HTTPc_CONN_STATE_NONE)) {
+        HTTPcConn_Process(p_conn);
+    }
+
+   *p_err = p_conn->ErrCode;
+    if (*p_err != HTTPc_ERR_NONE) {
+         goto exit;
+    }
+
+    result = DEF_OK;
+
+#endif
+
+   (void)&err;
+   *p_err = HTTPc_ERR_NONE;
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPc_ConnClose()
+*
+* Description : Close a persistent HTTPc Connection.
+*
+* Argument(s) : p_conn_obj  Pointer to HTTPc Connection to close.
+*
+*               flags       Configuration flags :
+*
+*                               HTTPc_FLAG_CONN_NO_BLOCK
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Connection closing successfully started.
+*                               HTTPc_ERR_INIT_NOT_COMPLETED    HTTPc Initialization is not completed.
+*                               HTTPc_ERR_NULL_PTR              Function passed a null pointer as argument.
+*                               HTTPc_ERR_FEATURE_DIS           Connection Close function is unavailable.
+*
+*                               ------------ RETURNED BY HTTPc_ConnCloseHandler() ------------
+*                               See HTTPc_ConnCloseHandler() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPc_ConnClose (HTTPc_CONN_OBJ    *p_conn_obj,
+                       HTTPc_FLAGS        flags,
+                       HTTPc_ERR         *p_err)
+{
+    HTTPc_CONN  *p_conn;
+
+
+#if (HTTPc_CFG_PERSISTENT_EN == DEF_ENABLED)
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_conn_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_conn = (HTTPc_CONN *)p_conn_obj;
+
+    HTTPc_ConnCloseHandler(p_conn, flags, p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+         goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+    goto exit;
+
+#else
+   (void)&p_conn;
+
+   *p_err = HTTPc_ERR_FEATURE_DIS;
+
+    goto exit;
+#endif
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            HTTPc_ReqClr()
+*
+* Description : Clear Request object members.
+*
+* Argument(s) : p_req_obj   Pointer to request object to clear.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Request cleared successfully.
+*                               HTTPc_ERR_INIT_NOT_COMPLETED    HTTP Client Initialization not completed.
+*                               HTTPc_ERR_NULL_PTR              Function passed a Null arguments.
+*                               HTTPc_ERR_REQ_IS_USED           Request object already in usage.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPc_ReqClr (HTTPc_REQ_OBJ  *p_req_obj,
+                    HTTPc_ERR      *p_err)
+{
+    HTTPc_REQ    *p_req;
+    CPU_BOOLEAN   in_use;
+    CPU_SR_ALLOC();
+
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_req_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_req = (HTTPc_REQ *)p_req_obj;
+
+                                                                /* ------ VALIDATE THAT REQ IS NOT USED ALREADY ------- */
+    CPU_CRITICAL_ENTER();
+    in_use = DEF_BIT_IS_SET(p_req->Flags, HTTPc_FLAG_REQ_IN_USE);
+    CPU_CRITICAL_EXIT();
+    if (in_use == DEF_YES) {
+       *p_err = HTTPc_ERR_REQ_IS_USED;
+        goto exit;
+    }
+
+    p_req->Flags                 = DEF_BIT_NONE;
+    p_req->HdrFlags              = DEF_BIT_NONE;
+    p_req->Method                = HTTP_METHOD_UNKNOWN;
+    p_req->ResourcePathPtr       = DEF_NULL;
+    p_req->ResourcePathLen       = 0;
+    p_req->ContentType           = HTTP_CONTENT_TYPE_UNKNOWN;
+    p_req->ContentLen            = 0u;
+#if (HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED)
+    p_req->QueryStrTbl           = DEF_NULL;
+    p_req->QueryStrNbr           = 0u;
+    p_req->OnQueryStrTx          = DEF_NULL;
+#endif
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+    p_req->HdrTbl                = DEF_NULL;
+    p_req->HdrNbr                = 0;
+    p_req->OnHdrTx               = DEF_NULL;
+#endif
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+    p_req->FormFieldTbl          = DEF_NULL;
+    p_req->FormFieldNbr          = 0;
+#endif
+    p_req->DataPtr               = DEF_NULL;
+#if (HTTPc_CFG_CHUNK_TX_EN == DEF_ENABLED)
+    p_req->OnBodyTx              = DEF_NULL;
+#endif
+
+#if (HTTPc_CFG_HDR_RX_EN == DEF_ENABLED)
+    p_req->OnHdrRx               = DEF_NULL;
+#endif
+    p_req->OnBodyRx              = DEF_NULL;
+
+#ifdef HTTPc_TASK_MODULE_EN
+    p_req->OnTransComplete       = DEF_NULL;
+    p_req->OnErr                 = DEF_NULL;
+#endif
+
+    p_req->ConnPtr               = DEF_NULL;
+    p_req->RespPtr               = DEF_NULL;
+
+    p_req->NextPtr               = DEF_NULL;
+
+   *p_err = HTTPc_ERR_NONE;
+
+    goto exit;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPc_ReqSetParam()
+*
+* Description : Set a parameter related to a given HTTP Request.
+*
+* Argument(s) : p_req_obj   Pointer to request object.
+*
+*               type        Parameter type :
+*
+*                               HTTPc_PARAM_TYPE_REQ_QUERY_STR_TBL
+*                               HTTPc_PARAM_TYPE_REQ_QUERY_STR_HOOK
+*                               HTTPc_PARAM_TYPE_REQ_HDR_TBL
+*                               HTTPc_PARAM_TYPE_REQ_HDR_HOOK
+*                               HTTPc_PARAM_TYPE_REQ_FORM_TBL
+*                               HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE
+*                               HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_LEN
+*                               HTTPc_PARAM_TYPE_REQ_BODY_CHUNK
+*                               HTTPc_PARAM_TYPE_REQ_BODY_HOOK
+*                               HTTPc_PARAM_TYPE_RESP_HDR_HOOK
+*                               HTTPc_PARAM_TYPE_RESP_BODY_HOOK
+*                               HTTPc_PARAM_TYPE_TRANS_COMPLETE_CALLBACK
+*                               HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK
+*
+*               p_param     Pointer to parameter.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Parameter set successfully.
+*                               HTTPc_ERR_INIT_NOT_COMPLETED    HTTP Client Initialization not completed.
+*                               HTTPc_ERR_NULL_PTR              Function passed a null argument(s).
+*                               HTTPc_ERR_REQ_IS_USED           Request object already in usage.
+*                               HTTPc_ERR_FEATURE_DIS           Parameter is related to a feature disabled.
+*                               HTTPc_ERR_PARAM_INVALID         Invalid request parameter.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPc_ReqSetParam (HTTPc_REQ_OBJ     *p_req_obj,
+                         HTTPc_PARAM_TYPE   type,
+                         void              *p_param,
+                         HTTPc_ERR         *p_err)
+{
+    HTTPc_REQ        *p_req;
+    HTTPc_PARAM_TBL  *p_tbl_obj;
+    CPU_BOOLEAN       in_use;
+    CPU_BOOLEAN       chunk_en;
+    CPU_SR_ALLOC();
+
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_req_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_param == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_req = (HTTPc_REQ *)p_req_obj;
+
+                                                                /* ------ VALIDATE THAT REQ IS NOT USED ALREADY ------- */
+    CPU_CRITICAL_ENTER();
+    in_use = DEF_BIT_IS_SET(p_req->Flags, HTTPc_FLAG_REQ_IN_USE);
+    CPU_CRITICAL_EXIT();
+    if (in_use == DEF_YES) {
+       *p_err = HTTPc_ERR_REQ_IS_USED;
+        goto exit;
+    }
+
+                                                                /* ------------- REQUEST PARAMETER SETUP -------------- */
+    switch (type) {
+        case HTTPc_PARAM_TYPE_REQ_QUERY_STR_TBL:
+             p_tbl_obj = (HTTPc_PARAM_TBL *)p_param;
+#if (HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED)
+             p_req->QueryStrTbl  = (HTTPc_KEY_VAL *)p_tbl_obj->TblPtr;
+             p_req->QueryStrNbr  = p_tbl_obj->EntryNbr;
+             p_req->OnQueryStrTx = DEF_NULL;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_REQ_QUERY_STR_HOOK:
+#if (HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED)
+             p_req->OnQueryStrTx = (HTTPc_REQ_QUERY_STR_HOOK)p_param;
+             p_req->QueryStrTbl  = DEF_NULL;
+             p_req->QueryStrNbr  = 0;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_REQ_HDR_TBL:
+             p_tbl_obj = (HTTPc_PARAM_TBL *)p_param;
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+             p_req->HdrNbr     =  p_tbl_obj->EntryNbr;
+             p_req->HdrTbl     = (HTTPc_HDR *)p_tbl_obj->TblPtr;
+             p_req->OnHdrTx    =  DEF_NULL;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_REQ_HDR_HOOK:
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+             p_req->OnHdrTx    = (HTTPc_REQ_HDR_HOOK)p_param;
+             p_req->HdrNbr     =  0;
+             p_req->HdrTbl     =  DEF_NULL;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_REQ_FORM_TBL:
+             p_tbl_obj = (HTTPc_PARAM_TBL *)p_param;
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+             DEF_BIT_SET(p_req->Flags, HTTPc_FLAG_REQ_BODY_PRESENT);
+             DEF_BIT_SET(p_req->Flags, HTTPc_FLAG_REQ_FORM_PRESENT);
+             p_req->FormFieldNbr = p_tbl_obj->EntryNbr;
+             p_req->FormFieldTbl = p_tbl_obj->TblPtr;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE:
+             DEF_BIT_SET(p_req->Flags, HTTPc_FLAG_REQ_BODY_PRESENT);
+             p_req->ContentType = *(HTTP_CONTENT_TYPE *)p_param;
+             break;
+
+
+        case HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_LEN:
+             DEF_BIT_SET(p_req->Flags, HTTPc_FLAG_REQ_BODY_PRESENT);
+             p_req->ContentLen = *(CPU_INT32U *)p_param;
+             break;
+
+
+        case HTTPc_PARAM_TYPE_REQ_BODY_CHUNK:
+#if (HTTPc_CFG_CHUNK_TX_EN == DEF_ENABLED)
+             chunk_en = *(CPU_BOOLEAN *)p_param;
+             if (chunk_en == DEF_YES) {
+                 DEF_BIT_SET(p_req->Flags, HTTPc_FLAG_REQ_BODY_CHUNK_TRANSFER);
+             }
+             DEF_BIT_SET(p_req->Flags, HTTPc_FLAG_REQ_BODY_PRESENT);
+             break;
+#else
+            (void)&chunk_en;
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_REQ_BODY_HOOK:
+             p_req->OnBodyTx = (HTTPc_REQ_BODY_HOOK)p_param;
+             break;
+
+
+        case HTTPc_PARAM_TYPE_RESP_HDR_HOOK:
+#if (HTTPc_CFG_HDR_RX_EN == DEF_ENABLED)
+             p_req->OnHdrRx = (HTTPc_RESP_HDR_HOOK)p_param;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_RESP_BODY_HOOK:
+             p_req->OnBodyRx = (HTTPc_RESP_BODY_HOOK)p_param;
+             break;
+
+
+        case HTTPc_PARAM_TYPE_TRANS_COMPLETE_CALLBACK:
+#ifdef HTTPc_TASK_MODULE_EN
+             p_req->OnTransComplete = (HTTPc_COMPLETE_CALLBACK)p_param;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK:
+#ifdef HTTPc_TASK_MODULE_EN
+             p_req->OnErr = (HTTPc_TRANS_ERR_CALLBACK)p_param;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+        case HTTPc_PARAM_TYPE_REQ_UPGRADE_WEBSOCKET:
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+             DEF_BIT_SET(p_req->Flags, HTTPc_FLAG_REQ_UPGRADE_WEBSOCKET);
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+        default:
+           *p_err = HTTPc_ERR_PARAM_INVALID;
+            goto exit;
+    }
+
+   (void)&p_tbl_obj;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            HTTPc_ReqSend()
+*
+* Description : Send a HTTP request.
+*
+* Argument(s) : p_conn_obj          Pointer to valid HTTPc Connection on which request will occurred.
+*
+*               p_req_obj           Pointer to request to send.
+*
+*               p_resp_obj          Pointer to response object that will be filled with the received response.
+*
+*               method              HTTP method of the request.
+*
+*               p_resource_path     Pointer to complete URI (or only resource path) of the request.
+*
+*               resource_path_len   Resource path length.
+*
+*               flags               Configuration flags :
+*
+*                                       HTTPc_FLAG_REQ_NO_BLOCK
+*
+*               p_err               Pointer to variable that will receive the return error code from this function :
+*
+*                                       HTTPc_ERR_NONE                              Request Sending successfully started.
+*                                       HTTPc_ERR_INIT_NOT_COMPLETED                HTTPc Initialization is not completed.
+*                                       HTTPc_ERR_NULL_PTR                          Null pointer(s) was passed as argument(s).
+*                                       HTTPc_ERR_CONN_IS_RELEASED                  Connection is not active.
+*                                       HTTPc_ERR_REQ_IS_USED                       Request is already in usage.
+*                                       HTTPc_ERR_REQ_PARAM_METHOD_INVALID          Invalid HTTP Method.
+*                                       HTTPc_ERR_REQ_PARAM_RESOURCE_PATH_INVALID   Resource path is null.
+*                                       HTTPc_ERR_FEATURE_DIS                       A needed feature is disabled.
+*
+*
+*                                       ------------ RETURNED BY HTTPcTask_TransDoneSignalCreate() ------------
+*                                       See HTTPcTask_TransDoneSignalCreate() for additional return error codes.
+*
+*                                       ------------ RETURNED BY HTTPcTask_TransDoneSignalWait() ------------
+*                                       See HTTPcTask_TransDoneSignalWait() for additional return error codes.
+*
+*                                       ------------ RETURNED BY HTTPcTask_TransDoneSignalDel() ------------
+*                                       See HTTPcTask_TransDoneSignalDel() for additional return error codes.
+*
+*                                       ------------ RETURNED BY HTTPcReq_Prepare() ------------
+*                                       See HTTPcReq_Prepare() for additional return error codes.
+*
+*                                       ------------ RETURNED BY HTTPcSock_Sel() ------------
+*                                       See HTTPcSock_Sel() for additional return error codes.
+*
+*                                       ------------ RETURNED BY HTTPcReq() ------------
+*                                       See HTTPcReq() for additional return error codes.
+*
+*                                       ------------ RETURNED BY HTTPcResp() ------------
+*                                       See HTTPcResp() for additional return error codes.
+*
+* Return(s)   : DEF_YES, if HTTP Response received successfully.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPc_ReqSend (HTTPc_CONN_OBJ    *p_conn_obj,
+                            HTTPc_REQ_OBJ     *p_req_obj,
+                            HTTPc_RESP_OBJ    *p_resp_obj,
+                            HTTP_METHOD        method,
+                            CPU_CHAR          *p_resource_path,
+                            CPU_INT16U         resource_path_len,
+                            HTTPc_FLAGS        flags,
+                            HTTPc_ERR         *p_err)
+{
+    HTTPc_CONN   *p_conn;
+    HTTPc_REQ    *p_req;
+    CPU_BOOLEAN   result;
+    CPU_BOOLEAN   in_use;
+    CPU_BOOLEAN   no_block;
+    HTTPc_ERR     err;
+    CPU_SR_ALLOC();
+
+
+   (void)&err;
+
+    result = DEF_FAIL;
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_conn_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_req_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_resp_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_conn = (HTTPc_CONN *)p_conn_obj;
+    p_req  = (HTTPc_REQ  *)p_req_obj;
+
+
+                                                                /* ------ VALIDATE THAT REQ IS NOT USED ALREADY ------- */
+    CPU_CRITICAL_ENTER();
+    in_use = DEF_BIT_IS_SET(p_req->Flags, HTTPc_FLAG_REQ_IN_USE);
+    CPU_CRITICAL_EXIT();
+    if (in_use == DEF_YES) {
+       *p_err = HTTPc_ERR_REQ_IS_USED;
+        goto exit;
+    }
+
+    p_req->ConnPtr = p_conn;
+    p_req->RespPtr = p_resp_obj;
+
+                                                                /* ----------------- SET HTTP METHOD ------------------ */
+    switch (method) {
+        case HTTP_METHOD_GET:
+        case HTTP_METHOD_POST:
+        case HTTP_METHOD_HEAD:
+        case HTTP_METHOD_PUT:
+        case HTTP_METHOD_DELETE:
+        case HTTP_METHOD_TRACE:
+        case HTTP_METHOD_CONNECT:
+        case HTTP_METHOD_OPTIONS:
+             p_req->Method = method;
+             break;
+
+        case HTTP_METHOD_UNKNOWN:
+        default:
+            *p_err = HTTPc_ERR_REQ_PARAM_METHOD_INVALID;
+             goto exit;
+    }
+
+                                                                /* ---------------- SET RESOURCE PATH ----------------- */
+    if (p_resource_path == DEF_NULL) {
+       *p_err = HTTPc_ERR_REQ_PARAM_RESOURCE_PATH_INVALID;
+        goto exit;
+    }
+    p_req->ResourcePathPtr = p_resource_path;
+    p_req->ResourcePathLen = resource_path_len;
+
+                                                                /* ---------------- SET BLOCKING MODE ----------------- */
+    no_block = DEF_BIT_IS_SET(flags, HTTPc_FLAG_REQ_NO_BLOCK);
+    if (no_block == DEF_YES) {
+        DEF_BIT_SET(p_req->Flags, HTTPc_FLAG_REQ_NO_BLOCK);
+    } else {
+        DEF_BIT_CLR(p_req->Flags, HTTPc_FLAG_REQ_NO_BLOCK);
+    }
+
+#ifdef HTTPc_TASK_MODULE_EN
+    if (no_block == DEF_NO) {
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+        HTTPcTask_TransDoneSignalCreate(p_conn, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit_conn_close;
+        }
+#else
+       *p_err = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+#endif
+    }
+
+    HTTPcTask_MsgQueue(         HTTPc_MSG_TYPE_REQ,
+                       (void *) p_req,
+                                p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+        goto exit;
+    }
+
+
+    HTTPcTask_Wake(p_conn, &err);
+    if (*p_err != HTTPc_ERR_NONE) {
+         goto exit;
+    }
+
+    if (no_block == DEF_NO) {
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+                                                                /* -------- WAIT FOR RESPONSE IN BLOCKING MODE -------- */
+        HTTPcTask_TransDoneSignalWait(p_conn, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit_conn_close;
+        }
+
+        CPU_CRITICAL_ENTER();
+        result = DEF_BIT_IS_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_COMPLETE_OK);
+        CPU_CRITICAL_EXIT();
+        if (result == DEF_FAIL) {
+           *p_err = p_conn->ErrCode;
+            goto exit;
+        }
+
+        HTTPcTask_TransDoneSignalDel(p_conn, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit_conn_close;
+        }
+
+#else
+       *p_err = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+#endif
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+    goto exit;
+#else
+
+    if (no_block == DEF_YES) {
+       *p_err  = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+    }
+
+    HTTPcConn_ReqAdd(p_req, p_err);                             /* Add Request to Connection.                           */
+    if (*p_err != HTTPc_ERR_NONE) {
+         goto exit;
+    }
+
+    do {
+        HTTPcSock_Sel(p_conn, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit;
+        }
+        HTTPcConn_TransProcess(p_conn);
+    } while ((p_conn->State != HTTPc_CONN_STATE_PARAM_VALIDATE) &&
+             (p_conn->State != HTTPc_CONN_STATE_NONE));
+
+    result = DEF_BIT_IS_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_COMPLETE_OK);
+
+   *p_err = p_conn->ErrCode;
+
+    goto exit;
+
+#endif
+
+
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+exit_conn_close:
+    HTTPc_ConnCloseHandler(p_conn, HTTPc_FLAG_NONE, &err);
+#endif
+
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPc_FormAppFmt()
+*
+* Description : Format an application type form from a form field's table.
+*
+* Argument(s) : p_buf           Pointer to buffer where the form will be written.
+*
+*               buf_len         Buffer length.
+*
+*               p_form_tbl      Pointer to form field's table.
+*
+*               form_tbl_size   Table size.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   HTTPc_ERR_NONE                  Form successfully created.
+*                                   HTTPc_ERR_NULL_PTR              Null pointer argument(s) passed.
+*                                   HTTPc_ERR_FORM_TYPE_INVALID     Invalid form field type.
+*                                   HTTPc_ERR_FORM_BUF_LEN_INVALID  buffer size to small for form.
+*                                   HTTPc_ERR_FORM_CREATE           Form creation faulted.
+*
+* Return(s)   : Length of the formatted form, if no errors.
+*
+*               0 , otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Only standard Key-Value Pair object are supported in the table to be able to format
+*                   the form.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+CPU_INT32U  HTTPc_FormAppFmt (CPU_CHAR              *p_buf,
+                              CPU_INT16U             buf_len,
+                              HTTPc_FORM_TBL_FIELD  *p_form_tbl,
+                              CPU_INT16U             form_tbl_size,
+                              HTTPc_ERR             *p_err)
+{
+    CPU_CHAR              *p_buf_wr;
+    HTTPc_FORM_TBL_FIELD  *p_tbl_field;
+    HTTPc_KEY_VAL         *p_form_field;
+    CPU_INT16U             key_char_encode_nbr;
+    CPU_INT16U             val_char_encode_nbr;
+    CPU_SIZE_T             str_len_key;
+    CPU_SIZE_T             str_len_val;
+    CPU_SIZE_T             data_size;
+    CPU_BOOLEAN            url_encode;
+    CPU_INT16U             i;
+
+
+    data_size = 0;
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(0);
+    }
+
+    if (p_buf == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_form_tbl == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_buf_wr  = p_buf;
+
+                                                                /* ----------------- PARSE FORM TABLE ----------------- */
+    for (i = 0u; i < form_tbl_size; i++) {
+
+        p_tbl_field = &p_form_tbl[i];
+
+        switch (p_tbl_field->Type) {
+            case HTTPc_FORM_FIELD_TYPE_KEY_VAL:
+                 break;
+
+            case HTTPc_FORM_FIELD_TYPE_KEY_VAL_EXT:
+            case HTTPc_FORM_FIELD_TYPE_FILE:
+            default:
+                 data_size = 0;
+                *p_err     = HTTPc_ERR_FORM_TYPE_INVALID;
+                 goto exit;
+        }
+
+        p_form_field = p_tbl_field->FieldObjPtr;
+
+                                                                /* Calculate length of key and value without encoding.  */
+        str_len_key = p_form_field->KeyLen;
+        str_len_val = p_form_field->ValLen;
+
+                                                                 /* Found number of character needing URL encoding.      */
+        key_char_encode_nbr = HTTP_URL_CharEncodeNbr(p_form_field->KeyPtr, str_len_key);
+        val_char_encode_nbr = HTTP_URL_CharEncodeNbr(p_form_field->ValPtr, str_len_val);
+
+                                                                /* Calculate total size needed for key & value encoded. */
+        data_size += str_len_key +
+                     str_len_val +
+                     HTTP_URL_ENCODING_JUMP * key_char_encode_nbr +
+                     HTTP_URL_ENCODING_JUMP * val_char_encode_nbr +
+                     1;                                         /* + 1 for the "=" between key & value.                 */
+
+        if (i < (form_tbl_size - 1)) {
+            data_size++;                                        /* + 1 for the "&" between each key&value pair.         */
+        }
+
+
+        if (data_size > buf_len) {                              /* Return if no more space in buf.                      */
+            data_size = 0;
+           *p_err = HTTPc_ERR_FORM_BUF_LEN_INVALID;
+            goto exit;
+        }
+
+        url_encode = HTTP_URL_EncodeStr(p_form_field->KeyPtr,   /* Encode and Write to buffer the Key.                  */
+                                        p_buf_wr,
+                                       &str_len_key,
+                                        buf_len);
+        if (url_encode == DEF_FAIL) {
+            data_size = 0;
+           *p_err = HTTPc_ERR_FORM_CREATE;
+            goto exit;
+        }
+
+        p_buf_wr += str_len_key;
+        buf_len  -= str_len_key;
+
+       *p_buf_wr = ASCII_CHAR_EQUALS_SIGN;                      /* Write the "=" sign.                                  */
+        p_buf_wr++;
+        buf_len--;
+
+        url_encode = HTTP_URL_EncodeStr(p_form_field->ValPtr,   /* Encode and Write to buffer the Value.                */
+                                        p_buf_wr,
+                                       &str_len_val,
+                                        buf_len);
+        if (url_encode == DEF_FAIL) {
+            data_size = 0;
+           *p_err = HTTPc_ERR_FORM_CREATE;
+            goto exit;
+        }
+
+        p_buf_wr += str_len_val;
+        buf_len  -= str_len_val;
+
+        if (i < (form_tbl_size - 1)) {
+           *p_buf_wr = ASCII_CHAR_AMPERSAND;                    /* Write the "&" sign between pairs.                    */
+            p_buf_wr++;
+            buf_len--;
+        }
+
+        p_form_field++;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return (data_size);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPc_FormMultipartFmt()
+*
+* Description : Format an multipart type form from a form field's table.
+*
+* Argument(s) : p_buf           Pointer to buffer where the form will be written.
+*
+*               buf_len         Buffer length.
+*
+*               p_form_tbl      Pointer to form field's table.
+*
+*               form_tbl_size   Table size.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   HTTPc_ERR_NONE                  Form successfully created.
+*                                   HTTPc_ERR_NULL_PTR              Null pointer argument(s) passed.
+*                                   HTTPc_ERR_FORM_TYPE_INVALID     Invalid form field type.
+*                                   HTTPc_ERR_FORM_BUF_LEN_INVALID  buffer size to small for form.
+*                                   HTTPc_ERR_FORM_CREATE           Form creation faulted.
+*
+* Return(s)   : Length of the formatted form, if no errors.
+*
+*               0 , otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Only standard Key-Value Pair object are supported in the table to be able to format
+*                   the form.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+CPU_INT32U  HTTPc_FormMultipartFmt (CPU_CHAR              *p_buf,
+                                    CPU_INT16U             buf_len,
+                                    HTTPc_FORM_TBL_FIELD  *p_form_tbl,
+                                    CPU_INT16U             form_tbl_size,
+                                    HTTPc_ERR             *p_err)
+{
+    CPU_CHAR              *p_buf_wr;
+    CPU_CHAR              *p_str;
+    HTTPc_FORM_TBL_FIELD  *p_tbl_field;
+    HTTPc_KEY_VAL         *p_form_field;
+    CPU_SIZE_T             data_size = 0;
+    CPU_SIZE_T             name_field_len;
+    CPU_INT08U             name_char_encode_nbr;
+    CPU_INT16U             tot_buf_len;
+    CPU_INT16U             i;
+    CPU_BOOLEAN            url_encode;
+
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(0);
+    }
+
+    if (p_buf == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_form_tbl == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    tot_buf_len = buf_len;
+    p_buf_wr    = p_buf;
+
+                                                                /* ----------------- PARSE FORM TABLE ----------------- */
+    for (i = 0u; i < form_tbl_size; i++) {
+
+        p_tbl_field = &p_form_tbl[i];
+
+        switch (p_tbl_field->Type) {
+            case HTTPc_FORM_FIELD_TYPE_KEY_VAL:
+                 break;
+
+            case HTTPc_FORM_FIELD_TYPE_KEY_VAL_EXT:
+            case HTTPc_FORM_FIELD_TYPE_FILE:
+            default:
+                 data_size = 0;
+                *p_err     = HTTPc_ERR_FORM_TYPE_INVALID;
+                 goto exit;
+        }
+
+        p_form_field = p_tbl_field->FieldObjPtr;
+
+
+        data_size += HTTPc_STR_BOUNDARY_START_LEN + STR_CR_LF_LEN;
+
+                                                                /* Find nbr of chars to encode in name.                 */
+        name_field_len       = p_form_field->KeyLen;
+        name_char_encode_nbr = HTTP_URL_CharEncodeNbr(p_form_field->KeyPtr, name_field_len);
+
+        data_size += HTTP_STR_HDR_FIELD_CONTENT_DISPOSITION_LEN +           /* "Content-Disposition"  */
+                     2 +                                                    /* ": "                   */
+                     HTTP_STR_CONTENT_DISPOSITION_FORM_DATA_LEN +           /* "form-data"            */
+                     2 +                                                    /* "; "                   */
+                     HTTP_STR_MULTIPART_FIELD_NAME_LEN +                    /* "name"                 */
+                     3 +                                                    /* "=\"\""                */
+                     name_field_len +                                       /* "name_rx_in_form"      */
+                     HTTP_URL_ENCODING_JUMP * name_char_encode_nbr +        /* nbr of char to encode. */
+                     STR_CR_LF_LEN;                                         /* "\r\n"                 */
+
+        data_size += 2 * STR_CR_LF_LEN +
+                     p_form_field->ValLen;
+
+
+        if (i == (form_tbl_size -1)) {
+            data_size += (HTTPc_STR_BOUNDARY_END_LEN + STR_CR_LF_LEN);
+        }
+
+        if (data_size > buf_len) {                             /* Return if no more space in buf.                      */
+            data_size = 0;
+           *p_err = HTTPc_ERR_FORM_BUF_LEN_INVALID;
+            goto exit;
+        }
+
+
+                                                                /* Write start of boundary.                            */
+        p_str = Str_Copy_N(p_buf_wr, HTTPc_STR_BOUNDARY_START, data_size);
+        if (p_str == DEF_NULL) {
+           *p_err = HTTPc_ERR_FORM_CREATE;
+            goto exit;
+        }
+
+        p_str += HTTPc_STR_BOUNDARY_START_LEN;
+
+                                                                /* Write CRLF after boundary.                           */
+        p_str = Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+        if (p_str == DEF_NULL) {
+           *p_err = HTTPc_ERR_FORM_CREATE;
+            goto exit;
+        }
+
+        p_str   += STR_CR_LF_LEN;
+        buf_len -= (p_str - p_buf_wr);
+        p_buf_wr = p_str;
+
+                                                                /* Write Content-Disposition header.                    */
+        p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                      tot_buf_len,
+                                      buf_len,
+                                      HTTP_HDR_FIELD_CONTENT_DISPOSITION,
+                                      HTTP_STR_CONTENT_DISPOSITION_FORM_DATA,
+                                      HTTP_STR_CONTENT_DISPOSITION_FORM_DATA_LEN,
+                                      DEF_NO,
+                                      p_err);
+        if (p_str == DEF_NULL) {
+        *p_err = HTTPc_ERR_FORM_CREATE;
+         goto exit;
+        }
+
+       *p_str = ASCII_CHAR_SEMICOLON;
+        p_str++;
+       *p_str = ASCII_CHAR_SPACE;
+        p_str++;
+
+                                                                /* Write string "name".                                 */
+        p_str = Str_Copy_N(p_str, HTTP_STR_MULTIPART_FIELD_NAME, HTTP_STR_MULTIPART_FIELD_NAME_LEN);
+        if (p_str == DEF_NULL) {
+           *p_err = HTTPc_ERR_FORM_CREATE;
+            goto exit;
+        }
+
+        p_str += HTTP_STR_MULTIPART_FIELD_NAME_LEN;
+       *p_str = ASCII_CHAR_EQUALS_SIGN;
+        p_str++;
+       *p_str = ASCII_CHAR_QUOTATION_MARK;
+        p_str++;
+
+                                                                /* Write name's value.                                  */
+        url_encode = HTTP_URL_EncodeStr(p_form_field->KeyPtr,
+                                        p_str,
+                                       &name_field_len,
+                                        buf_len);
+        if (url_encode == DEF_FAIL) {
+           *p_err = HTTPc_ERR_FORM_CREATE;
+            goto exit;
+        }
+
+        p_str += name_field_len;
+       *p_str  = ASCII_CHAR_QUOTATION_MARK;
+        p_str++;
+
+                                                                /* Write 2 CRLF.                                        */
+        p_str = Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+        if (p_str == DEF_NULL) {
+           *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+            goto exit;
+        }
+
+        p_str    += STR_CR_LF_LEN;
+
+        buf_len  -= (p_str- p_buf_wr);
+        p_buf_wr  = p_str;
+
+        p_str = Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+        if (p_str == DEF_NULL) {
+           *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+            goto exit;
+        }
+
+        p_str    += STR_CR_LF_LEN;
+        buf_len  -= (p_str - p_buf_wr);
+        p_buf_wr  = p_str;
+
+                                                                /* Write Data.                                          */
+        Mem_Copy(p_buf_wr, p_form_field->ValPtr, p_form_field->ValLen);
+
+        p_str    += p_form_field->ValLen;
+        buf_len  -= (p_str - p_buf_wr);
+        p_buf_wr  = p_str;
+
+                                                                /* Write CRLF.                                          */
+        p_str = Str_Copy_N(p_buf_wr, STR_CR_LF, STR_CR_LF_LEN);
+        if (p_str == DEF_NULL) {
+           *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+            goto exit;
+        }
+
+        p_str    += STR_CR_LF_LEN;
+        buf_len  -= (p_str - p_buf_wr);
+        p_buf_wr  = p_str;
+
+        if (i == (form_tbl_size -1)) {
+                                                                /* Write end of boundary.                            */
+            p_str = Str_Copy_N(p_buf_wr, HTTPc_STR_BOUNDARY_END, HTTPc_STR_BOUNDARY_END_LEN);
+            if (p_str == DEF_NULL) {
+               *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                goto exit;
+            }
+
+            p_str += HTTPc_STR_BOUNDARY_END_LEN;
+                                                                /* Write CRLF after last boundary.                      */
+            p_str = Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+            if (p_str == DEF_NULL) {
+               *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                goto exit;
+            }
+
+            p_str    += STR_CR_LF_LEN;
+            buf_len  -= (p_str - p_buf_wr);
+            p_buf_wr  = p_str;
+        }
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return (data_size);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPc_FormAddKeyVal()
+*
+* Description : Add a Key-Value Pair object to the form table.
+*
+* Argument(s) : p_form_tbl  Pointer to the form table.
+*
+*               p_kvp       Pointer to Key-Value Pair object to put in table.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Object successfully added to Form table.
+*                               HTTPc_ERR_NULL_PTR              Null argument(s) passed.
+*                               HTTPc_ERR_FORM_FIELD_INVALID    Invalid form object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+void  HTTPc_FormAddKeyVal (HTTPc_FORM_TBL_FIELD  *p_form_tbl,
+                           HTTPc_KEY_VAL         *p_key_val,
+                           HTTPc_ERR             *p_err)
+{
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_form_tbl == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_key_val == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+                                                                /* --------------- VALIDATE KVP OBJECT ---------------- */
+    if (p_key_val->KeyPtr == DEF_NULL) {
+       *p_err = HTTPc_ERR_FORM_FIELD_INVALID;
+        goto exit;
+
+    }
+
+    if (p_key_val->ValPtr == DEF_NULL) {
+       *p_err = HTTPc_ERR_FORM_FIELD_INVALID;
+        goto exit;
+    }
+
+                                                                /* ----------------- SET TABLE FIELD ------------------ */
+    p_form_tbl->Type        = HTTPc_FORM_FIELD_TYPE_KEY_VAL;
+    p_form_tbl->FieldObjPtr = (void *)p_key_val;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPc_FormAddKeyValExt()
+*
+* Description : Add an Extended Key-Value Pair object to the form table.
+*
+* Argument(s) : p_form_tbl      p_key_val_ext
+*
+*               p_key_val_ext   Pointer to the Extended Key-Value Pair object to put in table.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Object successfully added to Form table.
+*                               HTTPc_ERR_NULL_PTR              Null argument(s) passed.
+*                               HTTPc_ERR_FORM_FIELD_INVALID    Invalid form object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) HTTPc_KVP_BIG type object allows you to setup a Hook function that will be called when
+*                   the form is sent to let the Application write the value directly into the buffer.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+void  HTTPc_FormAddKeyValExt (HTTPc_FORM_TBL_FIELD  *p_form_tbl,
+                              HTTPc_KEY_VAL_EXT     *p_key_val_ext,
+                              HTTPc_ERR             *p_err)
+{
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_form_tbl == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_key_val_ext == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+                                                                /* --------------- VALIDATE KVP OBJECT ---------------- */
+    if (p_key_val_ext->KeyPtr == DEF_NULL) {
+       *p_err = HTTPc_ERR_FORM_FIELD_INVALID;
+        goto exit;
+
+    }
+
+    if (p_key_val_ext->OnValTx == DEF_NULL) {
+       *p_err = HTTPc_ERR_FORM_FIELD_INVALID;
+        goto exit;
+    }
+
+                                                                /* ----------------- SET TABLE FIELD ------------------ */
+    p_form_tbl->Type        = HTTPc_FORM_FIELD_TYPE_KEY_VAL_EXT;
+    p_form_tbl->FieldObjPtr = (void *)p_key_val_ext;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPc_FormAddFile()
+*
+* Description : Add a multipart file object to the form table.
+*
+* Argument(s) : p_form_tbl  Pointer to the form table.
+*
+*               p_file_obj  Pointer to the multipart file object to put in table.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Object successfully added to Form table.
+*                               HTTPc_ERR_NULL_PTR              Null argument(s) passed.
+*                               HTTPc_ERR_FORM_FIELD_INVALID    Invalid form object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+void  HTTPc_FormAddFile (HTTPc_FORM_TBL_FIELD  *p_form_tbl,
+                         HTTPc_MULTIPART_FILE  *p_file_obj,
+                         HTTPc_ERR             *p_err)
+{
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_form_tbl == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_file_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+                                                                /* ---------- VALIDATE MULTIPART FILE OBJECT ---------- */
+    if (p_file_obj->NamePtr == DEF_NULL) {
+       *p_err = HTTPc_ERR_FORM_FIELD_INVALID;
+        goto exit;
+
+    }
+
+    if (p_file_obj->FileNamePtr == DEF_NULL) {
+       *p_err = HTTPc_ERR_FORM_FIELD_INVALID;
+        goto exit;
+    }
+
+    if (p_file_obj->OnFileTx == DEF_NULL) {
+       *p_err = HTTPc_ERR_FORM_FIELD_INVALID;
+        goto exit;
+    }
+
+                                                                /* ----------------- SET TABLE FIELD ------------------ */
+    p_form_tbl->Type        = HTTPc_FORM_FIELD_TYPE_FILE;
+    p_form_tbl->FieldObjPtr = (void *)p_file_obj;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPc_WebSockSetParam()
+*
+* Description : Set a parameter related to a given WebSocket Obj.
+*
+* Argument(s) : p_ws_obj    Pointer to the WebSocket Obj.
+*
+*               type        Parameter type :
+*
+*                               HTTPc_PARAM_TYPE_WEBSOCK_ON_OPEN
+*                               HTTPc_PARAM_TYPE_WEBSOCK_ON_CLOSE
+*                               HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_INIT
+*                               HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_DATA
+*                               HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_COMPLETE
+*                               HTTPc_PARAM_TYPE_WEBSOCK_ON_ERR
+*                               HTTPc_PARAM_TYPE_WEBSOCK_ON_PONG
+*
+*               p_param     Pointer to parameter.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Parameter set successfully.
+*                               HTTPc_ERR_INIT_NOT_COMPLETED    HTTPc Initialization is not completed.
+*                               HTTPc_ERR_NULL_PTR              Null argument(s) passed.
+*                               HTTPc_ERR_WEBSOCK_IS_USED       WebSocket Obj is already in use.
+*                               HTTPc_ERR_PARAM_INVALID         Invalid request parameter.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+void  HTTPc_WebSockSetParam (HTTPc_WEBSOCK_OBJ  *p_ws_obj,
+                             HTTPc_PARAM_TYPE    type,
+                             void               *p_param,
+                             HTTPc_ERR          *p_err)
+{
+    HTTPc_WEBSOCK  *p_ws;
+    CPU_BOOLEAN     in_use;
+    CPU_SR_ALLOC();
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_ws_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_param == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_ws = (HTTPc_WEBSOCK *)p_ws_obj;
+                                                                /* ------ VALIDATE THAT REQ IS NOT USED ALREADY ------- */
+    CPU_CRITICAL_ENTER();
+    in_use = p_ws->Flags.IsWebsockUsed;
+    CPU_CRITICAL_EXIT();
+    if (in_use == DEF_YES) {
+       *p_err = HTTPc_ERR_WEBSOCK_IS_USED;
+        goto exit;
+    }
+
+                                                                /* ------------- WEBSOCK PARAMETER SETUP -------------- */
+    switch (type) {
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_ON_OPEN:
+             p_ws->OnOpen = (HTTPc_WEBSOCK_ON_OPEN)p_param;
+             break;
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_ON_CLOSE:
+             p_ws->OnClose = (HTTPc_WEBSOCK_ON_CLOSE)p_param;
+             break;
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_INIT:
+             p_ws->OnMsgRxInit = (HTTPc_WEBSOCK_ON_RX_INIT)p_param;
+             break;
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_DATA:
+             p_ws->OnMsgRxData = (HTTPc_WEBSOCK_ON_RX_DATA)p_param;
+             break;
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_COMPLETE:
+             p_ws->OnMsgRxComplete = (HTTPc_WEBSOCK_ON_RX_COMPLETE)p_param;
+             break;
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_ON_ERR:
+             p_ws->OnErr = (HTTPc_WEBSOCK_ON_ERR)p_param;
+             break;
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_ON_PONG:
+             p_ws->OnPong = (HTTPc_WEBSOCK_ON_PONG)p_param;
+             break;
+
+        default:
+            *p_err = HTTPc_ERR_PARAM_INVALID;
+             goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+exit:
+     return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPc_WebSockMsgSetParam()
+*
+* Description : Set a parameter related to a given WebSocket Msg Obj.
+*
+* Argument(s) : p_msg_obj   Pointer to the WebSocket Msg Obj.
+*
+*               type        Parameter type :
+*
+*                               HTTPc_PARAM_TYPE_WEBSOCK_MSG_USER_DATA
+*                               HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_INIT
+*                               HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_DATA
+*                               HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_COMPLETE
+*
+*               p_param     Pointer to parameter.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Parameter set successfully.
+*                               HTTPc_ERR_INIT_NOT_COMPLETED    HTTPc Initialization is not completed.
+*                               HTTPc_ERR_NULL_PTR              Null argument(s) passed.
+*                               HTTPc_ERR_WEBSOCK_MSG_IS_USED   WebSocket Obj is already in use.
+*                               HTTPc_ERR_PARAM_INVALID         Invalid request parameter.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+void  HTTPc_WebSockMsgSetParam (HTTPc_WEBSOCK_MSG_OBJ  *p_msg_obj,
+                                HTTPc_PARAM_TYPE        type,
+                                void                   *p_param,
+                                HTTPc_ERR              *p_err)
+{
+    HTTPc_WEBSOCK_MSG  *p_msg;
+    CPU_BOOLEAN         in_use;
+    CPU_SR_ALLOC();
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_msg_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_param == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_msg = (HTTPc_WEBSOCK_MSG *)p_msg_obj;
+                                                                /* ------ VALIDATE THAT REQ IS NOT USED ALREADY ------- */
+    CPU_CRITICAL_ENTER();
+    in_use = p_msg->Flags.IsUsed;
+    CPU_CRITICAL_EXIT();
+    if (in_use == DEF_YES) {
+       *p_err = HTTPc_ERR_WEBSOCK_MSG_IS_USED;
+        goto exit;
+    }
+                                                                /* ------------- WEBSOCK PARAMETER SETUP -------------- */
+    switch (type) {
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_MSG_USER_DATA:
+             p_msg->UserDataPtr = p_param;
+             break;
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_INIT:
+             p_msg->OnMsgTxInit = (HTTPc_WEBSOCK_ON_TX_INIT)p_param;
+             break;
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_DATA:
+             p_msg->OnMsgTxData = (HTTPc_WEBSOCK_ON_TX_DATA)p_param;
+             break;
+
+        case HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_COMPLETE:
+             p_msg->OnMsgTxComplete = (HTTPc_WEBSOCK_ON_TX_COMPLETE)p_param;
+             break;
+
+        default:
+            *p_err = HTTPc_ERR_PARAM_INVALID;
+             goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+exit:
+     return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcWebSock_Upgrade()
+*
+* Description : Upgrade a HTTP client connection to a WebSocket.
+*
+* Argument(s) : p_conn_obj          Pointer to valid HTTPc Connection on which request will occurred.
+*
+*               p_req_obj           Pointer to request to send.
+*
+*               p_resp_obj          Pointer to response object that will be filled with the received response.
+*
+*               p_ws_obj            Pointer to WebSocket object.
+*
+*               p_resource_path     Pointer to complete URI (or only resource path) of the request.
+*
+*               resource_path_len   Resource path length.
+*
+*               flags               Configuration flags :
+*
+*                                       HTTPc_FLAG_WEBSOCK_NO_BLOCK
+*
+*               p_err               Pointer to variable that will receive the return error code from this function :
+*
+*                                       HTTPc_ERR_NONE                              Request Sending successfully started.
+*                                       HTTPc_ERR_WEBSOCK_CONN_ALREADY_WEBSOCKET    The connection is already a websocket.
+*                                       HTTPc_ERR_INIT_NOT_COMPLETED                HTTPc Initialization is not completed.
+*                                       HTTPc_ERR_NULL_PTR                          Null pointer(s) was passed as argument(s).
+*                                       HTTPc_ERR_CONN_IS_RELEASED                  Connection is not active.
+*                                       HTTPc_ERR_REQ_IS_USED                       Request is already in usage.
+*                                       HTTPc_ERR_REQ_PARAM_METHOD_INVALID          Invalid HTTP Method.
+*                                       HTTPc_ERR_REQ_PARAM_RESOURCE_PATH_INVALID   Resource path is null.
+*                                       HTTPc_ERR_FEATURE_DIS                       A needed feature is disabled.
+*                                       HTTPc_ERR_PARAM_INVALID                     Invalid request parameter.
+*                                       HTTPc_ERR_MSG_Q_FULL                        Error Queue full.
+*                                       HTTPc_ERR_MSG_Q_SIGNAL_FAULT                Signal Post faulted.
+*                                       HTTPc_ERR_CONN_SIGNAL_CREATE                Signal creation faulted.
+*                                       HTTPc_ERR_CONN_SIGNAL_TIMEOUT               Signal pending timed out.
+*                                       HTTPc_ERR_CONN_SIGNAL_FAULT                 Error occurred during signal pending.
+*                                       HTTPc_ERR_CONN_SIGNAL_DEL                   Signal deletion faulted.
+*                                       HTTPc_ERR_WEBSOCK_REQ_MEM_ERR               WebSock Req Obj allocation failed.
+*                                       HTTPc_ERR_WEBSOCK_SHA1_ENCODE_FAIL          SHA1 encoding failed.
+*                                       HTTPc_ERR_WEBSOCK_BASE64_ENCODE_FAIL        Base64 encoding failed.
+*.-
+* Return(s)   : DEF_OK,   if the operation is successful.
+*               DEF_FAIL, if the operation has failed.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Connection Object:
+*
+*                   (a) Since the WebSocket Upgrade handshake is based on a HTTP request, the connection object
+*                       p_conn_obj MUST have already established a connection to the desired host server.
+*
+*               (2) Request and Response Object.
+*
+*                   (a) Any HTTP request/response features available can be used during the WebSocket Upgrade Request.
+*
+*               (3) WebSocket Upgrade related Header field
+*
+*                   (a) During a WebSocket Upgrade handshake, the following mandatory header fields are managed by the
+*                       WebSocket module and MUST NOT be set by the Application:
+*                           Connection
+*                           Upgrade
+*                           Sec-WebSocket-Key
+*                           Sec-WebSocket-Accept
+*                           Sec-WebSocket-Version
+*
+*                   (b) During a WebSocket Upgrade Handshake, the following optional header fields MAY be managed by
+*                       the Application using the standard HTTPc Request/Response API:
+*                           Sec-WebSocket-Protocol
+*                           Sec-WebSocket-Extensions
+*
+*               (4) If the WebSocket Upgrade Handshake is successful, Status Code in the response obj should be '101'.
+*                   This means that the Host server has switched to the WebSocket protocol. Otherwise, the response
+*                   object will TYPICALLY described the reason of the failure.
+*
+*               (5) When the WebSocket Upgrade is completed, any HTTP request is no more allowed and it is not posssible
+*                   to switch the connection protocol to HTTP. However, if a HTTP request is required to be sent by the
+*                   Application, it SHOULD do one of the following procedure:
+*
+*                   (1) Close the current WebSocket Connection by sending a Close Frame and open again the HTTP
+*                       connection.
+*
+*                   (2) Open a different HTTP connection with the Host Server.
+*********************************************************************************************************
+*/
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+CPU_BOOLEAN  HTTPc_WebSockUpgrade (HTTPc_CONN_OBJ        *p_conn_obj,
+                                   HTTPc_REQ_OBJ         *p_req_obj,
+                                   HTTPc_RESP_OBJ        *p_resp_obj,
+                                   HTTPc_WEBSOCK_OBJ     *p_ws_obj,
+                                   CPU_CHAR              *p_resource_path,
+                                   CPU_INT16U             resource_path_len,
+                                   HTTPc_FLAGS            flags,
+                                   HTTPc_ERR             *p_err)
+{
+    HTTPc_REQ          *p_req;
+    HTTPc_WEBSOCK      *p_ws;
+    HTTPc_WEBSOCK_REQ  *p_ws_req;
+    HTTPc_CONN         *p_conn;
+    CPU_BOOLEAN         is_websocket;
+    CPU_BOOLEAN         is_connected;
+    CPU_BOOLEAN         no_block;
+    CPU_BOOLEAN         result;
+    CPU_SR_ALLOC();
+
+
+    p_req    = (HTTPc_REQ     *)p_req_obj;
+    p_ws     = (HTTPc_WEBSOCK *)p_ws_obj;
+    p_conn   = (HTTPc_CONN    *)p_conn_obj;
+                                                                /* -------------------- VALIDATION -------------------- */
+                                                                /* Validate if the conn is eligible to upgrade.         */
+                                                                /* Check if the conn is already upgraded to Websock.    */
+    CPU_CRITICAL_ENTER();
+    is_websocket = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_WEBSOCKET);
+    CPU_CRITICAL_EXIT();
+    if (is_websocket == DEF_YES) {
+       *p_err  = HTTPc_ERR_WEBSOCK_CONN_ALREADY_WEBSOCKET;
+        result = DEF_NO;
+        goto exit;
+    }
+                                                                /* Check if the connn is still open.                    */
+    CPU_CRITICAL_ENTER();
+    is_connected = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_CONNECT);
+    CPU_CRITICAL_EXIT();
+    if (is_connected == DEF_NO) {
+       *p_err  = HTTPc_ERR_WEBSOCK_CONN_IS_NOT_CONNECTED;
+        result = DEF_NO;
+        goto exit;
+    }
+                                                                /* If no blocking mode, validate callbacks.             */
+    no_block = DEF_BIT_IS_SET(flags, HTTPc_FLAG_WEBSOCK_NO_BLOCK);
+    if (no_block == DEF_YES) {
+        if (p_ws->OnOpen == DEF_NULL) {
+           *p_err  = HTTPc_ERR_REQ_PARAM_WEBSOCK_ON_OPEN_CALLBACK_INVALID;
+            result = DEF_NO;
+            goto exit;
+        }
+    }
+                                                                /* -------------- REQUEST INTIALIZATION --------------- */
+                                                                /* Set as a Upgrade Request to WebSocket.               */
+    is_websocket = DEF_YES;
+    HTTPc_ReqSetParam( p_req_obj,
+                       HTTPc_PARAM_TYPE_REQ_UPGRADE_WEBSOCKET,
+                      &is_websocket,
+                       p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+         result = DEF_FAIL;
+         goto exit;
+    }
+                                                               /* Initialize the WebSocket Request object.              */
+    p_ws_req = HTTPcWebSock_InitReqObj(p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+         result = DEF_FAIL;
+         goto exit;
+    }
+
+    p_ws_req->WebSockObjPtr = p_ws;
+    p_req->WebSockPtr       = p_ws_req;
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    result = HTTPc_ReqSend(p_conn_obj,
+                           p_req_obj,
+                           p_resp_obj,
+                           HTTP_METHOD_GET,
+                           p_resource_path,
+                           resource_path_len,
+                           flags,
+                           p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+         result = DEF_FAIL;
+    }
+
+exit:
+    return (result);
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                          HTTPc_WebSockSend()
+*
+* Description : Send a WebSocket message.
+*
+* Argument(s) : p_conn_obj      Pointer to valid HTTPc Connection upgraded to WebSocket.
+*
+*               p_msg_obj       Pointer to a valid WebSocket message object.
+*
+*               msg_type        Type of message to send.
+*
+*               p_data          Pointer to the payload to send.
+*
+*               data_len        Length of the payload to send.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   HTTPc_ERR_NONE                              Request Sending successfully started.
+*                                   HTTPc_ERR_INIT_NOT_COMPLETED                HTTPc Initialization is not completed.
+*                                   HTTPc_ERR_NULL_PTR                          Null pointer(s) was passed as argument(s).
+*                                   HTTPc_ERR_FEATURE_DIS                       A needed feature is disabled.
+*                                   HTTPc_ERR_WEBSOCK_INVALID_CONN              The connection is not upgraded to websocket.
+*                                   HTTPc_ERR_WEBSOCK_INVALID_TX_PARAM          Tx msg params is invalid.
+*                                   HTTPc_ERR_WEBSOCK_MSG_IS_USED               The WebSock msg object is currently used.
+*                                   HTTPc_ERR_MSG_Q_FULL                        Error Queue full.
+*                                   HTTPc_ERR_MSG_Q_SIGNAL_FAULT                Signal Post faulted.
+*                                   HTTPc_ERR_CONN_SIGNAL_CREATE                Signal creation faulted.
+*                                   HTTPc_ERR_CONN_SIGNAL_TIMEOUT               Signal pending timed out.
+*                                   HTTPc_ERR_CONN_SIGNAL_FAULT                 Error occurred during signal pending.
+*                                   HTTPc_ERR_CONN_SIGNAL_DEL                   Signal deletion faulted.
+*
+* Return(s)   : DEF_OK,     the operation is successful.
+*               DEF_FAIL,   the operation has failed.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) The connection object p_conn MUST has been previouslyupgraded to WebSocket to use this
+*                   function. Refer to the HTTPc_WebSockUpgrade() function.
+*
+*               (2) The available Message Types are :
+*
+*                       HTTPc_WEBSOCK_MSG_TYPE_TXT_FRAME (Data msg)
+*                       HTTPc_WEBSOCK_MSG_TYPE_BIN_FRAME (Data msg)
+*                       HTTPc_WEBSOCK_MSG_TYPE_CLOSE     (Ctrl msg)
+*                       HTTPc_WEBSOCK_MSG_TYPE_PING      (Ctrl msg)
+*                       HTTPc_WEBSOCK_MSG_TYPE_PONG      (Ctrl msg)
+*
+*               (3) Payload Content:
+*
+*                   (a) The "Payload data" (argument p_data) is defined as "Extension data" concatenated
+*                       with "Application data".
+*
+*                   (b) Extension data length is 0 Bytes unless an extension has been negotiated during
+*                       the handshake.
+*
+*                   (c) "Extension data" content and length are defines by the extension negotiated.
+*
+*                   (d) If negotiated, the "Extension data" must be handled by the Application.
+*
+*               (4) Data message Restrictions:
+*
+*                   (b) Even if the RFC6455 allow to sent message payload up to 2^64 bytes, Only 2^32 bytes is
+*                       allowed in the current implementation.
+*
+*               (5) Control message Restrictions:
+*
+*                   (a) According to the RFC 6455 section 5.5:
+*
+*                          "All control frames MUST have a payload length of 125 bytes or less
+*                           and MUST NOT be fragmented."
+*
+*                   (b) Close frame have a specific payload format. Refer to the HTTPc_WebSockFmtCloseMsg()
+*                       function for more information.
+*
+*               (6) Client-to-Server Masking
+*
+*                   (a) According to the RFC 6455 section 5.2:
+*
+*                       "All frames sent from the client to the server are masked by a 32-bit value that is
+*                        contained within the frame."
+*
+*                   (b) The Application DO NOT need to mask the payload since it's handled by the WebSocket
+*                       module.
+*********************************************************************************************************
+*/
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+CPU_BOOLEAN  HTTPc_WebSockSend (HTTPc_CONN_OBJ          *p_conn_obj,
+                                HTTPc_WEBSOCK_MSG_OBJ   *p_msg_obj,
+                                HTTPc_WEBSOCK_MSG_TYPE   msg_type,
+                                CPU_CHAR                *p_data,
+                                CPU_INT32U               payload_len,
+                                HTTPc_FLAGS              flags,
+                                HTTPc_ERR               *p_err)
+{
+    CPU_BOOLEAN         result;
+    CPU_BOOLEAN         is_websocket;
+    CPU_BOOLEAN         no_block;
+    HTTPc_CONN         *p_conn;
+    HTTPc_WEBSOCK_MSG  *p_msg;
+    CPU_BOOLEAN         in_use;
+    HTTPc_ERR           err;
+    CPU_SR_ALLOC();
+
+
+    result = DEF_NO;
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_conn_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_msg_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_conn = (HTTPc_CONN        *)p_conn_obj;
+    p_msg  = (HTTPc_WEBSOCK_MSG *)p_msg_obj;
+                                                                /* Validate the connection state.                       */
+    CPU_CRITICAL_ENTER();
+    is_websocket = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_WEBSOCKET);
+    CPU_CRITICAL_EXIT();
+    if (is_websocket == DEF_NO) {
+       *p_err = HTTPc_ERR_WEBSOCK_INVALID_CONN;
+        result = DEF_NO;
+        goto exit;
+    }
+                                                                /* Check if the Websock msg obj is already used.        */
+    CPU_CRITICAL_ENTER();
+    in_use = p_msg->Flags.IsUsed;
+    CPU_CRITICAL_EXIT();
+    if (in_use == DEF_YES) {
+       *p_err = HTTPc_ERR_WEBSOCK_MSG_IS_USED;
+        goto exit;
+    }
+                                                                /* Validate callback if no blocking mode.               */
+    no_block = DEF_BIT_IS_SET(flags, HTTPc_FLAG_WEBSOCK_NO_BLOCK);
+    if (no_block == DEF_YES) {
+        if (p_msg->OnMsgTxComplete == DEF_NULL) {
+           *p_err  = HTTPc_ERR_WEBSOCK_PARAM_ON_TX_COMPLETE_CALLBACK_INVALID;
+            result = DEF_NO;
+            goto exit;
+        }
+    }
+                                                                /* Check if the message will be set on callback.        */
+    if (p_data == DEF_NULL) {
+        if (p_msg->OnMsgTxData == DEF_NULL) {
+           *p_err  = HTTPc_ERR_WEBSOCK_PARAM_ON_TX_CALLBACK_INVALID;
+            result = DEF_NO;
+            goto exit;
+        }
+    }
+                                                                /* Validate the opcode.                                 */
+    switch (msg_type) {
+        case HTTPc_WEBSOCK_MSG_TYPE_TXT_FRAME:
+        case HTTPc_WEBSOCK_MSG_TYPE_BIN_FRAME:
+             break;
+
+        case HTTPc_WEBSOCK_MSG_TYPE_CLOSE:
+        case HTTPc_WEBSOCK_MSG_TYPE_PING:
+        case HTTPc_WEBSOCK_MSG_TYPE_PONG:
+                                                                /* Control msg can't be longer than 125 bytes.          */
+             if (payload_len > HTTPc_WEBSOCK_MAX_CTRL_FRAME_LEN) {
+                *p_err  = HTTPc_ERR_WEBSOCK_INVALID_TX_PARAM;
+                 result = DEF_NO;
+                 goto exit;
+             }
+             break;
+
+        default:
+            *p_err  = HTTPc_ERR_WEBSOCK_INVALID_TX_PARAM;
+             result = DEF_NO;
+             goto exit;
+    }
+
+                                                                /* --------------- SET WEBSOCK MESSAGE ---------------- */
+    p_msg->DataPtr = p_data;
+    p_msg->Len     = payload_len;
+    p_msg->LenSent = 0u;
+    p_msg->OpCode  = (HTTPc_WEBSOCK_MSG_TYPE) msg_type;
+    p_msg->ConnPtr = p_conn;
+
+    p_msg->Flags.IsFin       = DEF_YES;
+    p_msg->Flags.IsMasked    = DEF_YES;
+    p_msg->Flags.IsHdrSet    = DEF_NO;
+    p_msg->Flags.IsCompleted = DEF_NO;
+
+                                                                /* ---------------- SET BLOCKING MODE ----------------- */
+    no_block = DEF_BIT_IS_SET(flags, HTTPc_FLAG_WEBSOCK_NO_BLOCK );
+    if (no_block == DEF_NO) {
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+        HTTPcTask_TransDoneSignalCreate(p_conn, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit_conn_close;
+        }
+#else
+       *p_err = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+#endif
+    }
+    HTTPcTask_MsgQueue(         HTTPc_MSG_TYPE_WEBSOCK_MSG,
+                       (void *) p_msg,
+                                p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+         goto exit;
+    }
+
+    HTTPcTask_Wake(p_conn, &err);
+    if (*p_err != HTTPc_ERR_NONE) {
+         goto exit;
+    }
+
+    if (no_block == DEF_NO) {
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+                                                    /* -------- WAIT FOR RESPONSE IN BLOCKING MODE -------- */
+        HTTPcTask_TransDoneSignalWait(p_conn, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit_conn_close;
+        }
+        CPU_CRITICAL_ENTER();
+        result = p_msg->Flags.IsCompleted;
+        CPU_CRITICAL_EXIT();
+        if (result == DEF_FAIL) {
+            if (p_conn->ErrCode == HTTPc_ERR_NONE) {
+               *p_err = HTTPc_ERR_WEBSOCK_SEND_ERROR;
+            } else {
+               *p_err = p_conn->ErrCode ;
+            }
+            goto exit;
+        }
+        HTTPcTask_TransDoneSignalDel(p_conn, p_err);
+        if (*p_err != HTTPc_ERR_NONE) {
+             goto exit_conn_close;
+        }
+#else
+       *p_err = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+#endif
+    }
+    result = DEF_OK;
+   *p_err  = HTTPc_ERR_NONE;
+
+exit:
+    return (result);
+
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+exit_conn_close:
+    HTTPc_ConnCloseHandler(p_conn, HTTPc_FLAG_NONE, p_err);
+    return (result);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPc_WebSockClr()
+*
+* Description : Clear an HTTPc WebSock object before the first usage.
+*
+* Argument(s) : p_ws_obj    Pointer to the current HTTPc Websock Object.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  WebSock object clear successfully.
+*                               HTTPc_ERR_INIT_NOT_COMPLETED    HTTPc Initialization is not completed.
+*                               HTTPc_ERR_NULL_PTR              Function passed Null pointer as argument(s).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+void  HTTPc_WebSockClr (HTTPc_WEBSOCK_OBJ  *p_ws_obj,
+                        HTTPc_ERR          *p_err)
+{
+    HTTPc_WEBSOCK  *p_ws;
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_ws_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_ws = (HTTPc_WEBSOCK *)p_ws_obj;
+
+                                                                /* -------------- WEBSOCK INITIALIZATION -------------- */
+    p_ws->CloseCode             = HTTPc_WEBSOCK_CLOSE_CODE_NONE;
+    p_ws->CloseReason.DataPtr   = DEF_NULL;
+    p_ws->CloseReason.Len       = 0u;
+    p_ws->Flags.IsCloseStarted  = DEF_NO;
+    p_ws->Flags.IsPongStarted   = DEF_NO;
+    p_ws->Flags.IsRxDataCached  = DEF_NO;
+    p_ws->Flags.IsTxMsgCtrlUsed = DEF_NO;
+    p_ws->Flags.IsWebsockUsed   = DEF_NO;
+    p_ws->OnClose               = DEF_NULL;
+    p_ws->OnMsgRxInit           = DEF_NULL;
+    p_ws->OnMsgRxData           = DEF_NULL;
+    p_ws->OnMsgRxComplete       = DEF_NULL;
+    p_ws->OnOpen                = DEF_NULL;
+    p_ws->OnErr                 = DEF_NULL;
+    p_ws->OnPong                = DEF_NULL;
+    p_ws->RxMsgLen              = 0u;
+    p_ws->RxMsgLenRead          = 0u;
+    p_ws->RxMsgOpCode           = HTTPc_WEBSOCK_OPCODE_NONE;
+    p_ws->RxState               = HTTPc_WEBSOCK_RX_STATE_WAIT;
+    p_ws->TxMsgListEndPtr       = DEF_NULL;
+    p_ws->TxMsgListHeadPtr      = DEF_NULL;
+    p_ws->TxState               = HTTPc_WEBSOCK_TX_STATE_MSG_INIT;
+    p_ws->TotalMsgLen           = 0u;
+    p_ws->OrigOpCode            = HTTPc_WEBSOCK_OPCODE_NONE;
+
+    Mem_Clr(&p_ws->TxMsgCtrl, sizeof(HTTPc_WEBSOCK_MSG));
+
+   *p_err = HTTPc_ERR_NONE;
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPc_WebSockMsgClr()
+*
+* Description : Clear an HTTPc WebSock Msg object before the first usage.
+*
+* Argument(s) : p_msg_obj   Pointer to the WebSock Msg obj to clear.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  WebSock object clear successfully.
+*                               HTTPc_ERR_INIT_NOT_COMPLETED    HTTPc Initialization is not completed.
+*                               HTTPc_ERR_NULL_PTR              Function passed Null pointer as argument(s).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+void  HTTPc_WebSockMsgClr (HTTPc_WEBSOCK_MSG_OBJ *p_msg_obj,
+                           HTTPc_ERR             *p_err)
+{
+    HTTPc_WEBSOCK_MSG   *p_msg;
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    if (p_msg_obj == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_msg = (HTTPc_WEBSOCK_MSG *)p_msg_obj;
+                                                                /* ------------ WEBSOCK REQ INITIALIZATION ------------ */
+    p_msg->ConnPtr            = DEF_NULL;
+    p_msg->DataPtr            = DEF_NULL;
+    p_msg->Len                = 0u;
+    p_msg->Flags.IsFin        = DEF_NO;
+    p_msg->Flags.IsMasked     = DEF_NO;
+    p_msg->Flags.IsUsed       = DEF_NO;
+    p_msg->Flags.IsNoBlock    = DEF_NO;
+    p_msg->Flags.IsHdrSet     = DEF_NO;
+    p_msg->LenSent            = 0u;
+    p_msg->MskKey             = 0u;
+    p_msg->NextPtr            = DEF_NULL;
+    p_msg->OpCode             = HTTPc_WEBSOCK_OPCODE_NONE;
+    p_msg->UserDataPtr        = DEF_NULL;
+    p_msg->DataLen            = 0u;
+    p_msg->OnMsgTxInit        = DEF_NULL;
+    p_msg->OnMsgTxData        = DEF_NULL;
+    p_msg->OnMsgTxComplete    = DEF_NULL;
+
+   *p_err = HTTPc_ERR_NONE;
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPc_WebSockFmtCloseMsg()
+*
+* Description : Format a Close Frame.
+*
+* Argument(s) : close_code  Value that defines the origin of connection closure.
+*
+*               p_reason    Pointer to a string that contains a reason of the connection closure.
+*
+*               p_buf       Pointer to the destination buffer
+*
+*               buf_len     Length of the destination buffer'
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                            WebSock object clear successfully.
+*                               HTTPc_ERR_NULL_PTR                        Function passed Null pointer as argument(s).
+*                               HTTPc_ERR_WEBSOCK_INVALID_CLOSE_CODE      Close code argument is an unknown value.
+*                               HTTPc_ERR_WEBSOCK_INVALID_CTRL_FRAME_LEN  Total frame is passed are invalid.
+*
+* Return(s)   : Payload length, If operation is successful.
+*
+*               0u,             If operation has failed.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Close Frame have a specific format. According to the RFC 6455 section :
+*
+*                      "If there is a body, the first two bytes of the body MUST be a 2-byte unsigned
+*                       integer (in network byte order) representing a status code with value /code/
+*                       defined in Section 7.4. Following the 2-byte integer,the body MAY contain
+*                       UTF-8-encoded data with value /reason/, the interpretation of which is not
+*                       defined by this specification."
+*
+*               (2) Close Codes available:
+*
+*                      HTTPc_WEBSOCK_CLOSE_CODE_NORMAL
+*                      HTTPc_WEBSOCK_CLOSE_CODE_GOING_AWAY
+*                      HTTPc_WEBSOCK_CLOSE_CODE_PROTOCOL_ERR
+*                      HTTPc_WEBSOCK_CLOSE_CODE_DATA_TYPE_NOT_ALLOWED
+*                      HTTPc_WEBSOCK_CLOSE_CODE_DATA_TYPE_ERR
+*                      HTTPc_WEBSOCK_CLOSE_CODE_POLICY_VIOLATION
+*                      HTTPc_WEBSOCK_CLOSE_CODE_MSG_TOO_BIG
+*                      HTTPc_WEBSOCK_CLOSE_CODE_INVALID_EXT
+*                      HTTPc_WEBSOCK_CLOSE_CODE_UNEXPECTED_CONDITION
+*
+*               (3) Close Reason:
+*
+*                   (a) Except for its length, the reason string has no restriction and it is user-definable.
+*                       This should be used for debug purpose.
+*
+*                   (b) This field can be empty.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_WEBSOCKET_EN == DEF_ENABLED)
+CPU_INT16U  HTTPc_WebSockFmtCloseMsg (HTTPc_WEBSOCK_CLOSE_CODE    close_code,
+                                      CPU_CHAR                   *p_reason,
+                                      CPU_CHAR                   *p_buf,
+                                      CPU_INT16U                  buf_len,
+                                      HTTPc_ERR                  *p_err)
+{
+    CPU_INT16U  str_len;
+    CPU_INT16U  msg_len;
+
+
+    msg_len = 0u;
+
+#if (HTTPc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(0);
+    }
+
+    if (HTTPc_InitDone != DEF_YES) {
+       *p_err = HTTPc_ERR_INIT_NOT_COMPLETED;
+        goto exit;
+    }
+
+    switch (close_code) {
+
+        case HTTPc_WEBSOCK_CLOSE_CODE_NORMAL:
+        case HTTPc_WEBSOCK_CLOSE_CODE_GOING_AWAY:
+        case HTTPc_WEBSOCK_CLOSE_CODE_PROTOCOL_ERR:
+        case HTTPc_WEBSOCK_CLOSE_CODE_DATA_TYPE_NOT_ALLOWED:
+        case HTTPc_WEBSOCK_CLOSE_CODE_DATA_TYPE_ERR:
+        case HTTPc_WEBSOCK_CLOSE_CODE_POLICY_VIOLATION:
+        case HTTPc_WEBSOCK_CLOSE_CODE_MSG_TOO_BIG:
+        case HTTPc_WEBSOCK_CLOSE_CODE_INVALID_EXT:
+        case HTTPc_WEBSOCK_CLOSE_CODE_UNEXPECTED_CONDITION:
+             break;
+
+        default:
+            *p_err = HTTPc_ERR_WEBSOCK_INVALID_CLOSE_CODE;
+             goto exit;
+    }
+    if (p_buf == DEF_NULL) {
+       *p_err = HTTPc_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    str_len = Str_Len(p_reason);
+    if (str_len > HTTPc_WEBSOCK_MAX_CLOSE_REASON_LEN) {
+        *p_err = HTTPc_ERR_WEBSOCK_INVALID_CTRL_FRAME_LEN;
+         goto exit;
+    }
+
+    close_code = MEM_VAL_GET_INT16U_BIG(&close_code);
+    Mem_Copy(p_buf,(CPU_CHAR *)&close_code, sizeof(CPU_INT16U));
+
+    p_buf   += sizeof(CPU_INT16U);
+    buf_len -= HTTPc_WEBSOCK_CLOSE_CODE_LEN;
+
+    if (buf_len < str_len) {
+       *p_err = HTTPc_ERR_WEBSOCK_INVALID_CTRL_FRAME_LEN;
+        goto exit;
+    }
+
+    Str_Copy_N(p_buf, p_reason, str_len);
+    msg_len = str_len + sizeof(CPU_INT16U);
+
+exit:
+    return (msg_len);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       HTTPc_ConnCloseHandler()
+*
+* Description : Close an HTTPc Connection.
+*
+* Argument(s) : p_conn  Pointer to Connection to close.
+*
+*               flags   Configuration flags :
+*
+*                               HTTPc_FLAG_CONN_NO_BLOCK
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPc_ERR_NONE                  Connection closing successfully started.
+*                           HTTPc_ERR_CONN_IS_RELEASED      Connection is not used.
+*                           HTTPc_ERR_FEATURE_DIS           A needed feature is disabled.
+*
+*                           ------------ RETURNED BY HTTPcTask_MsgQueue() ------------
+*                           See HTTPcTask_MsgQueue() for additional return error codes.
+*
+*                           ------------ RETURNED BY HTTPcTask_ConnCloseSignalCreate() ------------
+*                           See HTTPcTask_ConnCloseSignalCreate() for additional return error codes.
+*
+*                           ------------ RETURNED BY HTTPcTask_ConnCloseSignalWait() ------------
+*                           See HTTPcTask_ConnCloseSignalWait() for additional return error codes.
+*
+*                           ------------ RETURNED BY HTTPcTask_ConnCloseSignalDel() ------------
+*                           See HTTPcTask_ConnCloseSignalDel() for additional return error codes.
+*
+*                           ------------ RETURNED BY HTTPcConn_Close() ------------
+*                           See HTTPcConn_Close() for additional return error codes.
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ConnClose(),
+*               HTTPc_ConnOpen(),
+*               HTTPc_ReqSend().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if ((HTTPc_CFG_PERSISTENT_EN == DEF_ENABLED) || \
+      defined(HTTPc_SIGNAL_TASK_MODULE_EN)       )
+static  void  HTTPc_ConnCloseHandler (HTTPc_CONN   *p_conn,
+                                      HTTPc_FLAGS   flags,
+                                      HTTPc_ERR    *p_err)
+{
+    CPU_BOOLEAN      in_use;
+    CPU_BOOLEAN      no_block;
+    HTTPc_ERR        err;
+    CPU_SR_ALLOC();
+
+
+                                                                /* ------------ VALIDATE THAT CONN IS USED ------------ */
+    CPU_CRITICAL_ENTER();
+    in_use = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_IN_USE);
+    CPU_CRITICAL_EXIT();
+    if (in_use == DEF_NO) {
+       *p_err = HTTPc_ERR_CONN_IS_RELEASED;
+        goto exit;
+    }
+
+                                                                /* ---------------- SET BLOCKING MODE ----------------- */
+    no_block = DEF_BIT_IS_SET(flags, HTTPc_FLAG_CONN_NO_BLOCK);
+    if (no_block == DEF_YES) {
+        DEF_BIT_SET(p_conn->Flags, HTTPc_FLAG_CONN_NO_BLOCK);
+    } else {
+        DEF_BIT_CLR(p_conn->Flags, HTTPc_FLAG_CONN_NO_BLOCK);
+    }
+
+#ifdef HTTPc_TASK_MODULE_EN
+    if (no_block == DEF_NO) {
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+
+        HTTPcTask_ConnCloseSignalCreate(p_conn, &err);
+        if(err != HTTPc_ERR_NONE) {
+            CPU_SW_EXCEPTION(;);
+        }
+#else
+       *p_err = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+#endif
+    }
+
+    HTTPcTask_MsgQueue(        HTTPc_MSG_TYPE_CONN_CLOSE,
+                       (void*) p_conn,
+                               p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+        goto exit;
+    }
+
+    HTTPcTask_Wake(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        goto exit;
+    }
+
+    if (no_block == DEF_NO) {
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+        HTTPcTask_ConnCloseSignalWait(p_conn, &err);
+        if(err != HTTPc_ERR_NONE) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        HTTPcTask_ConnCloseSignalDel(p_conn, &err);
+        if(err != HTTPc_ERR_NONE) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+#else
+       *p_err  = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+#endif
+    }
+
+#else
+
+    HTTPcConn_Close(p_conn, p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+         goto exit;
+    }
+
+    HTTPcConn_Remove(p_conn);
+
+#endif
+
+   (void)&err;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c.h
new file mode 100644
index 0000000..67b572a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c.h
@@ -0,0 +1,1299 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             HTTP CLIENT
+*
+* Filename      : http-c.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPc module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_MODULE_PRESENT                                   /* See Note #1.                                         */
+#define  HTTPc_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        HTTPc VERSION NUMBER
+*
+* Note(s) : (1) (a) The HTTPc module software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The HTTPc software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPc_VERSION                                 30002u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+#include  "../../Common/http.h"
+#include  "../../Common/http_dict.h"
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        HTTPc CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_CFG_ARG_CHK_EXT_EN
+   #error  "HTTPc_CFG_ARG_CHK_EXT_EN not #define'd in 'http-c_cfg.h'."
+
+#elif  ((HTTPc_CFG_ARG_CHK_EXT_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_ARG_CHK_EXT_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_ARG_CHK_EXT_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+#ifndef  HTTPc_CFG_MODE_ASYNC_TASK_EN
+   #error  "HTTPc_CFG_MODE_ASYNC_TASK_EN not #define'd in 'http-c_cfg.h'"
+
+#elif  ((HTTPc_CFG_MODE_ASYNC_TASK_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_MODE_ASYNC_TASK_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_MODE_ASYNC_TASK_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+#ifndef  HTTPc_CFG_MODE_BLOCK_EN
+   #error  "HTTPc_CFG_MODE_BLOCK_EN not #define'd in 'http-c_cfg.h'"
+#elif  ((HTTPc_CFG_MODE_BLOCK_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_MODE_BLOCK_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_MODE_BLOCK_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+#ifndef  HTTPc_CFG_PERSISTENT_EN
+   #error  "HTTPc_CFG_PERSISTENT_EN not #define'd in 'http-c_cfg.h'"
+#elif  ((HTTPc_CFG_PERSISTENT_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_PERSISTENT_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_PERSISTENT_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+#ifndef  HTTPc_CFG_CHUNK_TX_EN
+   #error  "HTTPc_CFG_CHUNK_TX_EN not #define'd in 'http-c_cfg.h'"
+#elif  ((HTTPc_CFG_CHUNK_TX_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_CHUNK_TX_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_CHUNK_TX_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+
+#endif
+
+#ifndef  HTTPc_CFG_QUERY_STR_EN
+   #error  "HTTPc_CFG_QUERY_STR_EN not #define'd in 'http-c_cfg.h'"
+#elif  ((HTTPc_CFG_QUERY_STR_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_QUERY_STR_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_QUERY_STR_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+#ifndef  HTTPc_CFG_HDR_RX_EN
+   #error  "HTTPc_CFG_HDR_RX_EN not #define'd in 'http-c_cfg.h'"
+#elif  ((HTTPc_CFG_HDR_RX_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_HDR_RX_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_HDR_RX_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+#ifndef  HTTPc_CFG_HDR_TX_EN
+   #error  "HTTPc_CFG_HDR_TX_EN not #define'd in 'http-c_cfg.h'"
+#elif  ((HTTPc_CFG_HDR_TX_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_HDR_TX_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_HDR_TX_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+#ifndef  HTTPc_CFG_FORM_EN
+   #error  "HTTPc_CFG_FORM_EN not #define'd in 'http-c_cfg.h'"
+#elif  ((HTTPc_CFG_FORM_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_FORM_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_FORM_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+#ifndef  HTTPc_CFG_USER_DATA_EN
+   #error  "HTTPc_CFG_USER_DATA_EN not #define'd in 'http-c_cfg.h'"
+#elif  ((HTTPc_CFG_USER_DATA_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_USER_DATA_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_USER_DATA_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+#ifndef  HTTPc_CFG_WEBSOCKET_EN
+   #error  "HTTPc_CFG_WEBSOCKET_EN not #define'd in 'http-c_cfg.h'"
+#elif  ((HTTPc_CFG_WEBSOCKET_EN != DEF_ENABLED ) && \
+        (HTTPc_CFG_WEBSOCKET_EN != DEF_DISABLED))
+   #error  "HTTPc_CFG_WEBSOCKET_EN illegally #define'd in 'http-c_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+#if ((HTTPc_CFG_WEBSOCKET_EN       == DEF_ENABLED ) && \
+     (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_DISABLED))
+   #error  "HTTPc_CFG_WEBSOCKET_EN cannot be DEF_ENABLED if HTTPc_CFG_MODE_ASYNC_TASK_EN is DEF_DISABLED."
+#endif
+
+/*
+*********************************************************************************************************
+*                                    NETWORK CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if     (NET_VERSION < 30300u)
+#error  "NET_VERSION                       Invalid network protocol suite version. MUST be >= 3.02.00."
+#endif
+
+#if     (NET_SOCK_CFG_SEL_EN != DEF_ENABLED)
+#error  "NET_SOCK_CFG_SEL_EN               illegally #define'd in 'net_cfg.h'. MUST be DEF_ENABLED."
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      LIB CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if     (LIB_VERSION < 13800u)
+#error  "LIB_VERSION                       Invalid library suite version. MUST be >= 1.38.00."
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPc_WEBSOCK_TX_MSG_LEN_NOT_DEFINED         DEF_INT_32U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                            MODULE DEFINES
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+
+    #define  HTTPc_TASK_MODULE_EN
+
+    #if  (HTTPc_CFG_MODE_BLOCK_EN == DEF_ENABLED)
+        #define  HTTPc_SIGNAL_TASK_MODULE_EN
+    #endif
+
+    #if  (HTTPc_CFG_WEBSOCKET_EN == DEF_ENABLED)
+        #define  HTTPc_WEBSOCK_MODULE_EN
+    #endif
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                   HTTP CLIENT FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  HTTPc_FLAGS;
+
+#define  HTTPc_FLAG_NONE                                    DEF_BIT_NONE
+
+                                                                            /* SOCKET FLAGS                             */
+#define  HTTPc_FLAG_SOCK_RDY_RD                             DEF_BIT_00
+#define  HTTPc_FLAG_SOCK_RDY_WR                             DEF_BIT_01
+#define  HTTPc_FLAG_SOCK_RDY_ERR                            DEF_BIT_02
+
+                                                                            /* CONNECTION FLAGS                         */
+#define  HTTPc_FLAG_CONN_CONNECT                            DEF_BIT_00      /* bits 0-3 internal usage.                 */
+#define  HTTPc_FLAG_CONN_IN_USE                             DEF_BIT_01
+#define  HTTPc_FLAG_CONN_TO_CLOSE                           DEF_BIT_02
+#define  HTTPc_FLAG_CONN_PERSISTENT                         DEF_BIT_04      /* bits 4-7 configurable.                   */
+#define  HTTPc_FLAG_CONN_NO_BLOCK                           DEF_BIT_05
+#define  HTTPc_FLAG_CONN_WEBSOCKET                          DEF_BIT_06
+
+                                                                            /* REQUEST CFG FLAGS                        */
+#define  HTTPc_FLAG_REQ_NO_BLOCK                            DEF_BIT_00
+#define  HTTPc_FLAG_REQ_BODY_PRESENT                        DEF_BIT_01
+#define  HTTPc_FLAG_REQ_FORM_PRESENT                        DEF_BIT_02
+#define  HTTPc_FLAG_REQ_BODY_CHUNK_TRANSFER                 DEF_BIT_03
+#define  HTTPc_FLAG_REQ_IN_USE                              DEF_BIT_04
+#define  HTTPc_FLAG_REQ_UPGRADE_WEBSOCKET                   DEF_BIT_05
+
+                                                                            /* REQUEST CFG HDR FLAGS                    */
+#define  HTTPc_FLAG_REQ_HDR_HOST_ADD                        DEF_BIT_00
+#define  HTTPc_FLAG_REQ_HDR_CONTENT_TYPE_ADD                DEF_BIT_01
+#define  HTTPc_FLAG_REQ_HDR_TRANSFER_ENCODE_ADD             DEF_BIT_02
+#define  HTTPc_FLAG_REQ_HDR_CONTENT_LENGTH_ADD              DEF_BIT_03
+#define  HTTPc_FLAG_REQ_HDR_CONNECTION_ADD                  DEF_BIT_04
+#define  HTTPc_FLAG_REQ_HDR_UPGRADE_ADD                     DEF_BIT_05
+#define  HTTPc_FLAG_REQ_HDR_WEBSOCKET_ADD                   DEF_BIT_06
+
+
+                                                                            /* REQUEST FLAGS                            */
+#define  HTTPc_FLAG_REQ_LINE_QUERY_STR_BEGIN                DEF_BIT_00
+#define  HTTPc_FLAG_REQ_LINE_QUERY_STR_DONE                 DEF_BIT_01
+#define  HTTPc_FLAG_REQ_HDR_DONE                            DEF_BIT_02
+#define  HTTPc_FLAG_REQ_BODY_CHUNK_LAST                     DEF_BIT_03
+
+                                                                            /* RESPONSE FLAGS                           */
+#define  HTTPc_FLAG_RESP_RX_MORE_DATA                       DEF_BIT_00
+#define  HTTPc_FLAG_RESP_BODY_CHUNK_TRANSFER                DEF_BIT_01
+#define  HTTPc_FLAG_RESP_COMPLETE_OK                        DEF_BIT_02
+
+                                                                            /* WEBSOCK SEND FLAGS                       */
+#define  HTTPc_FLAG_WEBSOCK_NO_BLOCK                        HTTPc_FLAG_REQ_NO_BLOCK
+
+
+/*
+*********************************************************************************************************
+*                                     API PARAMETERS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  httpc_param_type {
+
+    HTTPc_PARAM_TYPE_SERVER_PORT,
+    HTTPc_PARAM_TYPE_PERSISTENT,
+    HTTPc_PARAM_TYPE_CONNECT_TIMEOUT,
+    HTTPc_PARAM_TYPE_INACTIVITY_TIMEOUT,
+    HTTPc_PARAM_TYPE_SECURE_COMMON_NAME,
+    HTTPc_PARAM_TYPE_SECURE_TRUST_CALLBACK,
+    HTTPc_PARAM_TYPE_USER_DATA,
+
+    HTTPc_PARAM_TYPE_REQ_QUERY_STR_TBL,
+    HTTPc_PARAM_TYPE_REQ_QUERY_STR_HOOK,
+    HTTPc_PARAM_TYPE_REQ_HDR_TBL,
+    HTTPc_PARAM_TYPE_REQ_UPGRADE_WEBSOCKET,
+    HTTPc_PARAM_TYPE_REQ_HDR_HOOK,
+    HTTPc_PARAM_TYPE_REQ_FORM_TBL,
+    HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE,
+    HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_LEN,
+    HTTPc_PARAM_TYPE_REQ_BODY_CHUNK,
+    HTTPc_PARAM_TYPE_REQ_BODY_HOOK,
+    HTTPc_PARAM_TYPE_REQ_USER_DATA,
+
+    HTTPc_PARAM_TYPE_RESP_HDR_HOOK,
+    HTTPc_PARAM_TYPE_RESP_BODY_HOOK,
+
+    HTTPc_PARAM_TYPE_TRANS_COMPLETE_CALLBACK,
+    HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+
+    HTTPc_PARAM_TYPE_CONN_CONNECT_CALLBACK,
+    HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+
+    HTTPc_PARAM_TYPE_WEBSOCK_ON_OPEN,
+    HTTPc_PARAM_TYPE_WEBSOCK_ON_CLOSE,
+    HTTPc_PARAM_TYPE_WEBSOCK_ON_ERR,
+    HTTPc_PARAM_TYPE_WEBSOCK_ON_PONG,
+    HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_INIT,
+    HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_DATA,
+    HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_COMPLETE,
+    HTTPc_PARAM_TYPE_WEBSOCK_USER_DATA,
+
+    HTTPc_PARAM_TYPE_WEBSOCK_MSG_USER_DATA,
+    HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_INIT,
+    HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_DATA,
+    HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_COMPLETE,
+
+} HTTPc_PARAM_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                     TABLE PARAMETER DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  httpc_param_tbl {
+    void        *TblPtr;
+    CPU_INT16U   EntryNbr;
+} HTTPc_PARAM_TBL;
+
+
+/*
+*********************************************************************************************************
+*                                    CONNECTION STATES DATA TYPE
+*********************************************************************************************************
+*/
+
+#define  HTTPc_CONN_STATE_FAMILY_MASK                           DEF_BIT_MASK_08(7, 5)
+
+#define  HTTPc_CONN_STATE_FLOW_FAMILY                           DEF_BIT_MASK_08(0, 5)
+
+#define  HTTPc_CONN_STATE_REQ_FAMILY                            DEF_BIT_MASK_08(1, 5)
+
+#define  HTTPc_CONN_STATE_RESP_FAMILY                           DEF_BIT_MASK_08(2, 5)
+
+#define  HTTPc_CONN_STATE_WEBSOCK_FAMILY                        DEF_BIT_MASK_08(3, 5)
+
+typedef enum httpc_conn_state {
+    HTTPc_CONN_STATE_NONE                                       = 0u,   /* 0b000xxxxx */
+    HTTPc_CONN_STATE_UNKNOWN,
+    HTTPc_CONN_STATE_PARAM_VALIDATE,
+    HTTPc_CONN_STATE_CONNECT,
+    HTTPc_CONN_STATE_COMPLETED,
+    HTTPc_CONN_STATE_CLOSE,
+    HTTPc_CONN_STATE_ERR,
+    HTTPc_CONN_STATE_WEBSOCK_INIT,
+    HTTPc_CONN_STATE_WEBSOCK_CLOSE,
+    HTTPc_CONN_STATE_WEBSOCK_ERR,
+
+
+    HTTPc_CONN_STATE_REQ_LINE_METHOD                            = 32u,  /* 0b001xxxxx */
+    HTTPc_CONN_STATE_REQ_LINE_URI,
+    HTTPc_CONN_STATE_REQ_LINE_QUERY_STR,
+    HTTPc_CONN_STATE_REQ_LINE_PROTO_VER,
+    HTTPc_CONN_STATE_REQ_HDR_HOST,
+    HTTPc_CONN_STATE_REQ_HDR_CONTENT_TYPE,
+    HTTPc_CONN_STATE_REQ_HDR_CONTENT_LEN,
+    HTTPc_CONN_STATE_REQ_HDR_TRANSFER_ENCODE,
+    HTTPc_CONN_STATE_REQ_HDR_CONN,
+    HTTPc_CONN_STATE_REQ_HDR_UPGRADE,
+    HTTPc_CONN_STATE_REQ_HDR_WEBSOCKET,
+    HTTPc_CONN_STATE_REQ_HDR_EXT,
+    HTTPc_CONN_STATE_REQ_HDR_LAST,
+    HTTPc_CONN_STATE_REQ_BODY,
+    HTTPc_CONN_STATE_REQ_BODY_DATA,
+    HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_SIZE,
+    HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_DATA,
+    HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_END,
+    HTTPc_CONN_STATE_REQ_BODY_FORM_APP,
+    HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY,
+    HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_DISPO,
+    HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_TYPE,
+    HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA,
+    HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA_END,
+    HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY_END,
+    HTTPc_CONN_STATE_REQ_END,
+
+    HTTPc_CONN_STATE_RESP_INIT                                  = 64u,  /* 0b010xxxxx */
+    HTTPc_CONN_STATE_RESP_STATUS_LINE,
+    HTTPc_CONN_STATE_RESP_HDR,
+    HTTPc_CONN_STATE_RESP_BODY,
+    HTTPc_CONN_STATE_RESP_BODY_CHUNK_SIZE,
+    HTTPc_CONN_STATE_RESP_BODY_CHUNK_DATA,
+    HTTPc_CONN_STATE_RESP_BODY_CHUNK_LAST,
+    HTTPc_CONN_STATE_RESP_COMPLETED,
+
+
+    HTTPc_CONN_STATE_WEBSOCK_RXTX                              = 96u,  /* 0b011xxxxx */
+
+
+
+} HTTPc_CONN_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                  CONNECTION CLOSE STATUS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum httpc_conn_close_status {
+    HTTPc_CONN_CLOSE_STATUS_NONE,
+    HTTPc_CONN_CLOSE_STATUS_ERR_INTERNAL,
+    HTTPc_CONN_CLOSE_STATUS_SERVER,
+    HTTPc_CONN_CLOSE_STATUS_NO_PERSISTENT,
+    HTTPc_CONN_CLOSE_STATUS_APP
+} HTTPc_CONN_CLOSE_STATUS;
+
+
+/*
+*********************************************************************************************************
+*                                          ERROR DATA TYPE
+*********************************************************************************************************
+*/
+
+#define  HTTPc_ERR_FAMILY_MASK                              DEF_BIT_MASK_08(3, 6)
+#define  HTTPc_ERR_INIT_CFG_FAMILY                          DEF_BIT_MASK_08(0, 6)
+#define  HTTPc_ERR_CONN_FAMILY                              DEF_BIT_MASK_08(1, 6)
+#define  HTTPc_ERR_TRANS_FAMILY                             DEF_BIT_MASK_08(2, 6)
+
+
+typedef  enum  httpc_err {
+                                                                /* ------------ HTTPC_ERR_INIT_CFG_FAMILY ------------- */
+
+    HTTPc_ERR_NONE                                           =   1u,
+
+    HTTPc_ERR_NULL_PTR                                       =   2u,
+    HTTPc_ERR_FEATURE_DIS                                    =   3u,
+
+    HTTPc_ERR_INIT                                           =  10u,
+    HTTPc_ERR_INIT_NOT_COMPLETED                             =  11u,
+    HTTPc_ERR_INIT_TASK_INVALID_ARG                          =  12u,
+    HTTPc_ERR_INIT_TASK_MEM_ALLOC                            =  13u,
+    HTTPc_ERR_INIT_TASK_CREATE                               =  14u,
+    HTTPc_ERR_INIT_MSG_Q                                     =  15u,
+
+    HTTPc_ERR_CFG_CONN_TIMEOUT_INVALID                       =  20u,
+    HTTPc_ERR_CFG_MSG_Q_SIZE_INVALID                         =  21u,
+    HTTPc_ERR_CFG_TASK_PTR_NULL                              =  22u,
+    HTTPc_ERR_CFG_TASK_DLY_INVALID                           =  23u,
+    HTTPc_ERR_CFG_INVALID_BUF_LEN                            =  24u,
+
+    HTTPc_ERR_PARAM_INVALID                                  =  30u,
+
+    HTTPc_ERR_FORM_TYPE_INVALID                              =  40u,
+    HTTPc_ERR_FORM_FIELD_INVALID                             =  41u,
+    HTTPc_ERR_FORM_CREATE                                    =  42u,
+    HTTPc_ERR_FORM_BUF_LEN_INVALID                           =  43u,
+
+    HTTPc_ERR_MSG_INIT_POOL_FAULT                            =  50u,
+    HTTPc_ERR_WEBSOCK_REQ_INIT_POOL_FAULT                    =  51u,
+
+                                                                /* -------------- HTTPC_ERR_CONN_FAMILY --------------- */
+    HTTPc_ERR_CONN_PARAM_ADDR_INVALID                        =  64u,
+    HTTPc_ERR_CONN_PARAM_ADDR_FAMILY_INVALID                 =  65u,
+    HTTPc_ERR_CONN_PARAM_HOSTNAME_INVALID                    =  66u,
+    HTTPc_ERR_CONN_PARAM_PORT_INVALID                        =  67u,
+    HTTPc_ERR_CONN_PARAM_PERSISTENT_INVALID                  =  68u,
+    HTTPc_ERR_CONN_PARAM_CONNECT_TIMEOUT_INVALID             =  69u,
+    HTTPc_ERR_CONN_PARAM_INACTIVITY_TIMEOUT_INVALID          =  70u,
+    HTTPc_ERR_CONN_PARAM_CONNECT_CALLBACK_INVALID            =  71u,
+    HTTPc_ERR_CONN_PARAM_CLOSE_CALLBACK_INVALID              =  72u,
+    HTTPc_ERR_CONN_PARAM_ERR_CALLBACK_INVALID                =  73u,
+    HTTPc_ERR_CONN_PARAM_WEBSOCK_OBJ_INVALID                 =  74u,
+
+    HTTPc_ERR_MSG_Q_FULL                                     =  80u,
+    HTTPc_ERR_MSG_Q_SIGNAL_FAULT                             =  81u,
+    HTTPc_ERR_MSG_Q_EMPTY                                    =  82u,
+
+    HTTPc_ERR_CONN_SIGNAL_CREATE                             =  90u,
+    HTTPc_ERR_CONN_SIGNAL_DEL                                =  91u,
+    HTTPc_ERR_CONN_SIGNAL_TIMEOUT                            =  92u,
+    HTTPc_ERR_CONN_SIGNAL_FAULT                              =  93u,
+    HTTPc_ERR_CONN_IS_CONNECT                                =  94u,
+    HTTPc_ERR_CONN_IS_USED                                   =  95u,
+    HTTPc_ERR_CONN_IS_RELEASED                               =  96u,
+    HTTPc_ERR_CONN_INVALID_STATE                             =  97u,
+
+    HTTPc_ERR_CONN_SOCK_OPEN                                 = 100u,
+    HTTPc_ERR_CONN_SOCK_CONNECT                              = 101u,
+    HTTPc_ERR_CONN_SOCK_TX                                   = 102u,
+    HTTPc_ERR_CONN_SOCK_TX_FATAL                             = 103u,
+    HTTPc_ERR_CONN_SOCK_RX                                   = 104u,
+    HTTPc_ERR_CONN_SOCK_RX_FATAL                             = 105u,
+    HTTPc_ERR_CONN_SOCK_CLOSED                               = 106u,
+    HTTPc_ERR_CONN_SOCK_CLOSE_FATAL                          = 107u,
+    HTTPc_ERR_CONN_SOCK_SEL                                  = 108u,
+    HTTPc_ERR_CONN_SOCK_FAULT                                = 109u,
+    HTTPc_ERR_CONN_SOCK_ABORT_FAILED                         = 110u,
+
+                                                                /* -------------- HTTPC_ERR_TRANS_FAMILY -------------- */
+
+    HTTPc_ERR_TRANS_BUF_LEN_INVALID                          = 128u,
+    HTTPc_ERR_TRANS_TX_BUF_FULL                              = 129u,
+    HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED                    = 130u,
+
+    HTTPc_ERR_REQ_IS_USED                                    = 131u,
+
+    HTTPc_ERR_REQ_PARAM_METHOD_INVALID                       = 140u,
+    HTTPc_ERR_REQ_PARAM_RESOURCE_PATH_INVALID                = 141u,
+    HTTPc_ERR_REQ_PARAM_CONTENT_TYPE_INVALID                 = 142u,
+    HTTPc_ERR_REQ_PARAM_CONTENT_LEN_INVALID                  = 143u,
+    HTTPc_ERR_REQ_PARAM_BODY_INVALID                         = 144u,
+    HTTPc_ERR_REQ_PARAM_QUERY_STR_TBL_INVALID                = 145u,
+    HTTPc_ERR_REQ_PARAM_HDR_INVALID_TBL_PTR                  = 146u,
+    HTTPc_ERR_REQ_PARAM_HDR_UNAUTHORIZED                     = 147u,
+    HTTPc_ERR_REQ_PARAM_FORM_FIELD_TBL_INVALID               = 148u,
+    HTTPc_ERR_REQ_PARAM_FORM_FIELD_NULL_PTR                  = 149u,
+    HTTPc_ERR_REQ_PARAM_FORM_FIELD_INVALID_LEN               = 150u,
+    HTTPc_ERR_REQ_PARAM_ERR_CALLBACK_INVALID                 = 151u,
+    HTTPc_ERR_REQ_PARAM_TRANS_COMPLETE_CALLBACK_INVALID      = 152u,
+    HTTPc_ERR_REQ_PARAM_WEBSOCK_ON_OPEN_CALLBACK_INVALID     = 153u,
+    HTTPc_ERR_REQ_PARAM_WEBSOCK_ON_RX_CALLBACK_INVALID       = 154u,
+
+    HTTPc_ERR_REQ_LINE_CREATE                                = 160u,
+    HTTPc_ERR_REQ_QUERY_STR_CREATE                           = 161u,
+    HTTPc_ERR_REQ_QUERY_STR_INVALID                          = 162u,
+    HTTPc_ERR_REQ_HDR_CREATE                                 = 163u,
+    HTTPc_ERR_REQ_HDR_INVALID                                = 164u,
+    HTTPc_ERR_REQ_FORM_CREATE                                = 165u,
+    HTTPc_ERR_REQ_BODY_PREPARE                               = 166u,
+    HTTPc_ERR_REQ_BODY_CHUNK_PREPARE                         = 167u,
+    HTTPc_ERR_REQ_BODY_CHUNK_INVALID                         = 168u,
+    HTTPc_ERR_REQ_BODY_NOT_PRESENT                           = 169u,
+
+    HTTPc_ERR_RESP_FORMAT_INVALID                            = 180u,
+    HTTPc_ERR_RESP_PROTOCOL_VER_INVALID                      = 181u,
+    HTTPc_ERR_RESP_STATUS_CODE_INVALID                       = 182u,
+    HTTPc_ERR_RESP_REASON_PHRASE_INVALID                     = 183u,
+    HTTPc_ERR_RESP_HDR_INVALID                               = 184u,
+    HTTPc_ERR_RESP_HDR_MALFORMED                             = 185u,
+    HTTPc_ERR_RESP_CONTENT_TYPE_INVALID                      = 186u,
+    HTTPc_ERR_RESP_CONTENT_LEN_INVALID                       = 187u,
+    HTTPc_ERR_RESP_CHUNK_INVALID                             = 188u,
+    HTTPc_ERR_RESP_RX_DATA_LEN_INVALID                       = 189u,
+
+    HTTPc_ERR_WEBSOCK_INVALID_TX_PARAM                       = 200u,
+    HTTPc_ERR_WEBSOCK_INVALID_CONN                           = 201u,
+    HTTPc_ERR_WEBSOCK_CONN_ALREADY_WEBSOCKET                 = 202u,
+    HTTPc_ERR_WEBSOCK_CONN_IS_NOT_CONNECTED                  = 203u,
+    HTTPc_ERR_WEBSOCK_INVALID_TX_LEN                         = 204u,
+    HTTPc_ERR_WEBSOCK_INVALID_RX_LEN                         = 205u,
+    HTTPc_ERR_WEBSOCK_INVALID_STATE                          = 206u,
+    HTTPc_ERR_WEBSOCK_INVALID_TX_STATE                       = 207u,
+    HTTPc_ERR_WEBSOCK_INVALID_RX_STATE                       = 208u,
+    HTTPc_ERR_WEBSOCK_INVALID_OPCODE                         = 209u,
+    HTTPc_ERR_WEBSOCK_FAULT                                  = 210u,
+    HTTPc_ERR_WEBSOCK_TX_MSG_Q_EMPTY                         = 211u,
+    HTTPc_ERR_WEBSOCK_IS_USED                                = 212u,
+    HTTPc_ERR_WEBSOCK_REQ_IS_USED                            = 213u,
+    HTTPc_ERR_WEBSOCK_MSG_IS_USED                            = 214u,
+    HTTPc_ERR_WEBSOCK_INVALID_CLOSE_CODE                     = 215u,
+    HTTPc_ERR_WEBSOCK_INVALID_CTRL_FRAME_LEN                 = 216u,
+    HTTPc_ERR_WEBSOCK_MSG_Q_FULL                             = 217u,
+    HTTPc_ERR_WEBSOCK_MSG_Q_SIGNAL_FAULT                     = 218u,
+    HTTPc_ERR_WEBSOCK_RX_RSVD_BIT_1_SET                      = 219u,
+    HTTPc_ERR_WEBSOCK_RX_RSVD_BIT_2_SET                      = 220u,
+    HTTPc_ERR_WEBSOCK_RX_RSVD_BIT_3_SET                      = 221u,
+    HTTPc_ERR_WEBSOCK_RX_CTRL_FRAME_TOO_LONG                 = 222u,
+    HTTPc_ERR_WEBSOCK_RX_CTRL_FRAME_FRAGMENTED               = 223u,
+    HTTPc_ERR_WEBSOCK_RX_INVALID_OPCODE                      = 224u,
+    HTTPc_ERR_WEBSOCK_RX_FRAG_FRAME_SEQUENCE_INVALID         = 225u,
+    HTTPc_ERR_WEBSOCK_RX_CLOSE_CODE_INVALID                  = 226u,
+    HTTPc_ERR_WEBSOCK_REQ_MEM_ERR                            = 227u,
+    HTTPc_ERR_WEBSOCK_BASE64_ENCODE_FAIL                     = 228u,
+    HTTPc_ERR_WEBSOCK_SHA1_ENCODE_FAIL                       = 229u,
+    HTTPc_ERR_WEBSOCK_PARAM_ON_TX_CALLBACK_INVALID           = 230u,
+    HTTPc_ERR_WEBSOCK_PARAM_ON_TX_COMPLETE_CALLBACK_INVALID  = 231u,
+    HTTPc_ERR_WEBSOCK_SEND_ERROR                             = 232u,
+} HTTPc_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                      HTTP CLIENT OBJECTS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  httpc_conn                 HTTPc_CONN;
+
+typedef  struct  httpc_conn_obj             HTTPc_CONN_OBJ;
+
+typedef  struct  httpc_req                  HTTPc_REQ;
+
+typedef  struct  httpc_req_obj              HTTPc_REQ_OBJ;
+
+typedef  struct  httpc_resp                 HTTPc_RESP;
+
+typedef  struct  httpc_resp                 HTTPc_RESP_OBJ;
+
+typedef  struct  httpc_websock              HTTPc_WEBSOCK;
+
+typedef  struct  httpc_websock_obj          HTTPc_WEBSOCK_OBJ;
+
+typedef  struct  httpc_websock_req          HTTPc_WEBSOCK_REQ;
+
+typedef  struct  httpc_websock_msg          HTTPc_WEBSOCK_MSG;
+
+typedef  struct  httpc_websock_msg_obj      HTTPc_WEBSOCK_MSG_OBJ;
+
+
+/*
+*********************************************************************************************************
+*                                    HTTP CLIENT HDR FIELD DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  httpc_hdr {
+    HTTP_HDR_FIELD      HdrField;
+    CPU_CHAR           *ValPtr;
+    CPU_INT16U          ValLen;
+} HTTPc_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                      HTTP CLIENT FORM DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  httpc_form_field_type {
+    HTTPc_FORM_FIELD_TYPE_KEY_VAL,
+    HTTPc_FORM_FIELD_TYPE_KEY_VAL_EXT,
+    HTTPc_FORM_FIELD_TYPE_FILE
+} HTTPc_FORM_FIELD_TYPE;
+
+typedef  struct  httpc_form_tbl_field {
+    HTTPc_FORM_FIELD_TYPE   Type;
+    void                   *FieldObjPtr;
+} HTTPc_FORM_TBL_FIELD;
+
+
+/*
+*********************************************************************************************************
+*                                        KEY-VALUE PAIR DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  httpc_key_val {
+    CPU_CHAR       *KeyPtr;
+    CPU_INT16U      KeyLen;
+    CPU_CHAR       *ValPtr;
+    CPU_INT16U      ValLen;
+} HTTPc_KEY_VAL;
+
+
+/*
+*********************************************************************************************************
+*                                      BIG KEY-VALUE PAIR DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  httpc_key_val_ext  HTTPc_KEY_VAL_EXT;
+
+typedef  CPU_BOOLEAN  (*HTTPc_KEY_VAL_EXT_HOOK) (HTTPc_CONN_OBJ     *p_conn,
+                                                 HTTPc_REQ_OBJ      *p_req,
+                                                 HTTPc_KEY_VAL_EXT  *p_key_val_obj,
+                                                 CPU_CHAR           *p_buf,
+                                                 CPU_INT16U          buf_len,
+                                                 CPU_INT16U         *p_len_wr);
+
+struct  httpc_key_val_ext {
+    CPU_CHAR                *KeyPtr;
+    CPU_INT16U               KeyLen;
+    HTTPc_KEY_VAL_EXT_HOOK   OnValTx;
+    CPU_INT32U               ValLen;
+};
+
+
+/*
+*********************************************************************************************************
+*                                      HTTP MULTIPART FORM DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  http_multipart_file  HTTPc_MULTIPART_FILE;
+
+typedef  CPU_BOOLEAN  (*HTTPc_MULTIPART_FILE_HOOK) (HTTPc_CONN_OBJ        *p_conn,
+                                                    HTTPc_REQ_OBJ         *p_req,
+                                                    HTTPc_MULTIPART_FILE  *p_file_obj,
+                                                    CPU_CHAR              *p_buf,
+                                                    CPU_INT16U             buf_len,
+                                                    CPU_INT16U            *p_len_wr);
+
+struct  http_multipart_file {
+    CPU_CHAR                   *NamePtr;
+    CPU_INT16U                  NameLen;
+    CPU_CHAR                   *FileNamePtr;
+    CPU_INT16U                  FileNameLen;
+    CPU_INT32U                  FileLen;
+    HTTP_CONTENT_TYPE           ContentType;
+    HTTPc_MULTIPART_FILE_HOOK   OnFileTx;
+};
+
+
+/*
+*********************************************************************************************************
+*                                  HOOK & CALLBACK FUNCTIONS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  void         (*HTTPc_CONNECT_CALLBACK)      (HTTPc_CONN_OBJ            *p_conn,
+                                                      CPU_BOOLEAN                open_status);
+
+typedef  void         (*HTTPc_CONN_CLOSE_CALLBACK)   (HTTPc_CONN_OBJ            *p_conn,
+                                                      HTTPc_CONN_CLOSE_STATUS    close_status,
+                                                      HTTPc_ERR                  err);
+
+typedef  void         (*HTTPc_CONN_ERR_CALLBACK)     (HTTPc_CONN_OBJ            *p_conn,
+                                                      HTTPc_ERR                  err);
+
+typedef  CPU_BOOLEAN  (*HTTPc_REQ_QUERY_STR_HOOK)    (HTTPc_CONN_OBJ            *p_conn,
+                                                      HTTPc_REQ_OBJ             *p_req,
+                                                      HTTPc_KEY_VAL            **p_key_val);
+
+typedef  CPU_BOOLEAN  (*HTTPc_REQ_HDR_HOOK)          (HTTPc_CONN_OBJ            *p_conn,
+                                                      HTTPc_REQ_OBJ             *p_req,
+                                                      HTTPc_HDR                **p_hdr);
+
+typedef  CPU_BOOLEAN  (*HTTPc_REQ_BODY_HOOK)         (HTTPc_CONN_OBJ            *p_conn,
+                                                      HTTPc_REQ_OBJ             *p_req,
+                                                      void                     **p_data,
+                                                      CPU_CHAR                  *p_buf,
+                                                      CPU_INT16U                 buf_len,
+                                                      CPU_INT16U                *p_data_len);
+
+typedef  void         (*HTTPc_RESP_HDR_HOOK)         (HTTPc_CONN_OBJ            *p_conn,
+                                                      HTTPc_REQ_OBJ             *p_req,
+                                                      HTTP_HDR_FIELD             hdr_field,
+                                                      CPU_CHAR                  *p_hdr_val,
+                                                      CPU_INT16U                 val_len);
+
+typedef  CPU_INT32U   (*HTTPc_RESP_BODY_HOOK)        (HTTPc_CONN_OBJ            *p_conn,
+                                                      HTTPc_REQ_OBJ             *p_req,
+                                                      HTTP_CONTENT_TYPE          content_type,
+                                                      void                      *p_data,
+                                                      CPU_INT16U                 data_len,
+                                                      CPU_BOOLEAN                last_chunk);
+
+typedef  void         (*HTTPc_COMPLETE_CALLBACK)     (HTTPc_CONN_OBJ            *p_conn,
+                                                      HTTPc_REQ_OBJ             *p_req,
+                                                      HTTPc_RESP_OBJ            *p_resp,
+                                                      CPU_BOOLEAN                status);
+
+typedef  void         (*HTTPc_TRANS_ERR_CALLBACK)    (HTTPc_CONN_OBJ            *p_conn,
+                                                      HTTPc_REQ_OBJ             *p_req,
+                                                      HTTPc_ERR                  err);
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPc RESPONSE DATA TYPE
+*********************************************************************************************************
+*/
+
+struct httpc_resp {
+           HTTP_PROTOCOL_VER          ProtocolVer;              /* HTTP version received in response message.           */
+           HTTP_STATUS_CODE           StatusCode;               /* Status code received in response.                    */
+    const  CPU_CHAR                  *ReasonPhrasePtr;          /* Pointer to received reason phrase.                   */
+           HTTP_CONTENT_TYPE          ContentType;              /* Content type received in response.                   */
+           CPU_INT32U                 ContentLen;               /* Content length received in response if any.          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                MACROS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         STRUCT FIELD DEFINE MACRO
+*********************************************************************************************************
+*/
+
+#define  FIELD_DEF(prefix, type, name, suffix)    prefix  type  name##suffix;
+
+
+/*
+*********************************************************************************************************
+*                                          USER DATA FIELD MACRO
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+#define  USER_DATA_FIELD_DEF(prefix, suffix)  FIELD_DEF(prefix,  void,  *UserDataPtr,  suffix)
+#else
+#define  USER_DATA_FIELD_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     REQUEST QUERY STRING FIELDS MACRO
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED)
+#define  REQ_QUERY_STR_FIELDS_DEF(prefix, suffix)  FIELD_DEF(prefix,  HTTPc_KEY_VAL,             *QueryStrTbl,  suffix) \
+                                                   FIELD_DEF(prefix,  CPU_INT16U,                 QueryStrNbr,  suffix) \
+                                                   FIELD_DEF(prefix,  HTTPc_REQ_QUERY_STR_HOOK,   OnQueryStrTx, suffix)
+#else
+#define  REQ_QUERY_STR_FIELDS_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     REQUEST HEADER TX FIELDS MACRO
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+#define  REQ_HDR_TX_FIELDS_DEF(prefix, suffix)  FIELD_DEF(prefix,  HTTPc_HDR,           *HdrTbl,   suffix) \
+                                                FIELD_DEF(prefix,  CPU_INT16U,           HdrNbr,   suffix) \
+                                                FIELD_DEF(prefix,  HTTPc_REQ_HDR_HOOK,   OnHdrTx,  suffix)
+#else
+#define  REQ_HDR_TX_FIELDS_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        REQUEST FORM FIELDS MACRO
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+#define  REQ_FORM_FIELDS_DEF(prefix, suffix)  FIELD_DEF(prefix,  HTTPc_FORM_TBL_FIELD ,  *FormFieldTbl,  suffix) \
+                                              FIELD_DEF(prefix,  CPU_INT16U,              FormFieldNbr,  suffix)
+#else
+#define  REQ_FORM_FIELDS_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     REQUEST HDR RX HOOK FIELD MACRO
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_HDR_RX_EN == DEF_ENABLED)
+#define  REQ_HDR_RX_FIELD_DEF(prefix, suffix)  FIELD_DEF(prefix,  HTTPc_RESP_HDR_HOOK,  OnHdrRx,  suffix)
+#else
+#define  REQ_HDR_RX_FIELD_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    REQUEST TASK CALLBACK FIELDS MACRO
+*********************************************************************************************************
+*/
+
+#ifdef HTTPc_TASK_MODULE_EN
+#define  REQ_TASK_CALLBACK_FIELDS_DEF(prefix, suffix)  FIELD_DEF(prefix,  HTTPc_COMPLETE_CALLBACK,   OnTransComplete,  suffix) \
+                                                       FIELD_DEF(prefix,  HTTPc_TRANS_ERR_CALLBACK,  OnErr,            suffix)
+#else
+#define  REQ_TASK_CALLBACK_FIELDS_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         REQUEST STRUCTURE MACRO
+*********************************************************************************************************
+*/
+
+#define  STRUCT_REQ_INIT(prefix, suffix)  \
+    FIELD_DEF(prefix,  HTTPc_FLAGS,                Flags,            suffix) /* Request set of flags.                   */ \
+    FIELD_DEF(prefix,  HTTPc_FLAGS,                HdrFlags,         suffix) /* Set of flags for hdr to include in Req. */ \
+    FIELD_DEF(prefix,  HTTP_METHOD,                Method,           suffix) /* HTTP Request Method.                    */ \
+    FIELD_DEF(prefix,  CPU_CHAR,                  *ResourcePathPtr,  suffix) /* Pointer to URI or Resource path string. */ \
+    FIELD_DEF(prefix,  CPU_INT16U,                 ResourcePathLen,  suffix) /* URI or Resource path string's length.   */ \
+    FIELD_DEF(prefix,  HTTP_CONTENT_TYPE,          ContentType,      suffix) /* Content Type of the Request body.       */ \
+    FIELD_DEF(prefix,  CPU_INT32U,                 ContentLen,       suffix) /* Content Length of the Request body.     */ \
+    FIELD_DEF(prefix,  void,                      *DataPtr,          suffix) /* Pointer to data to put in Request body. */ \
+    REQ_QUERY_STR_FIELDS_DEF(prefix, suffix)                                 /* Query String parameters.                */ \
+    REQ_HDR_TX_FIELDS_DEF(prefix, suffix)                                    /* Request Header fields parameters.       */ \
+    REQ_FORM_FIELDS_DEF(prefix, suffix)                                      /* Form parameters.                        */ \
+    FIELD_DEF(prefix,  HTTPc_REQ_BODY_HOOK,        OnBodyTx,         suffix) /* Body Transfer hook parameter.           */ \
+    REQ_HDR_RX_FIELD_DEF(prefix, suffix)                                     /* Response Header fields parameter.       */ \
+    FIELD_DEF(prefix,  HTTPc_RESP_BODY_HOOK,       OnBodyRx,         suffix) /* Response body hook function.            */ \
+    REQ_TASK_CALLBACK_FIELDS_DEF(prefix, suffix)                             /* Request's callback parameters.          */ \
+    FIELD_DEF(prefix,  HTTPc_CONN,                *ConnPtr,          suffix) /* Pointer to Connection object.           */ \
+    FIELD_DEF(prefix,  HTTPc_RESP,                *RespPtr,          suffix) /* Pointer to Response object.             */ \
+    FIELD_DEF(prefix,  HTTPc_REQ,                 *NextPtr,          suffix) /* Pointer to next Request object.         */ \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_REQ,         *WebSockPtr,       suffix) /* Pointer to WebSocket Request object.    */ \
+    USER_DATA_FIELD_DEF(,)                                                   /* Pointer to user data.                   */
+
+
+struct httpc_req_obj {
+    STRUCT_REQ_INIT(const, _reserved)
+};
+
+struct httpc_req {
+    STRUCT_REQ_INIT(,)
+};
+
+
+/*
+*********************************************************************************************************
+*                                        SOCKET SECURE CFG FIELD MACRO
+*********************************************************************************************************
+*/
+
+#ifdef NET_SECURE_MODULE_EN
+#define  SOCK_SECURE_CFG_FIELD_DEF(prefix, suffix)  FIELD_DEF(prefix, NET_APP_SOCK_SECURE_CFG, SockSecureCfg, suffix)  /* Connection's Socket Secure Cfg. */
+#else
+#define  SOCK_SECURE_CFG_FIELD_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      CONNECTION CALLBACK FIELDS MACRO
+*********************************************************************************************************
+*/
+
+#ifdef HTTPc_TASK_MODULE_EN
+#define  TASK_CONN_CALLBACK_FIELDS_DEF(prefix, suffix)  FIELD_DEF(prefix,  HTTPc_CONNECT_CALLBACK,      OnConnect,  suffix) \
+                                                        FIELD_DEF(prefix,  HTTPc_CONN_CLOSE_CALLBACK ,  OnClose,    suffix)
+#else
+#define  TASK_CONN_CALLBACK_FIELDS_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CONNECTION SIGNAL FIELDS MACRO
+*********************************************************************************************************
+*/
+
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+#define  TASK_CONN_SIGNAL_FIELDS_DEF(prefix, suffix)  FIELD_DEF(prefix,  KAL_SEM_HANDLE,   ConnectSignal,    suffix) \
+                                                      FIELD_DEF(prefix,  KAL_SEM_HANDLE ,  TransDoneSignal,  suffix) \
+                                                      FIELD_DEF(prefix,  KAL_SEM_HANDLE,   CloseSignal,      suffix)
+#else
+#define  TASK_CONN_SIGNAL_FIELDS_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      CONNENCTION QUERY STRING FIELDS MACRO
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED)
+#define  CONN_QUERY_STR_FIELDS_DEF(prefix, suffix)  FIELD_DEF(prefix,  CPU_INT16U ,     ReqQueryStrTxIx,     suffix) \
+                                                    FIELD_DEF(prefix,  HTTPc_KEY_VAL,  *ReqQueryStrTempPtr,  suffix)
+#else
+#define  CONN_QUERY_STR_FIELDS_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CONNECTION HEADER FIELDS MACRO
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+#define  CONN_HDR_FIELDS_DEF(prefix, suffix)  FIELD_DEF(prefix,  CPU_INT16U ,   ReqHdrTxIx,     suffix) \
+                                              FIELD_DEF(prefix,  HTTPc_HDR,    *ReqHdrTempPtr,  suffix)
+#else
+#define  CONN_HDR_FIELDS_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CONECTION FORM FIELD MACRO
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+#define  CONN_FORM_FIELD_DEF(prefix, suffix)  FIELD_DEF(prefix,  CPU_INT16U,  ReqFormDataTxIx,  suffix)
+#else
+#define  CONN_FORM_FIELD_DEF(prefix, suffix)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CONNECTION STRUCTURE MACRO
+*********************************************************************************************************
+*/
+
+#define  STRUCT_CONN_INIT(prefix, suffix)  \
+    FIELD_DEF(prefix,  NET_SOCK_ID,                 SockID,              suffix) /* Connection's Socket ID.                 */ \
+    FIELD_DEF(prefix,  HTTPc_FLAGS,                 SockFlags,           suffix) /* Connection's Socket flags.              */ \
+    SOCK_SECURE_CFG_FIELD_DEF(prefix, suffix)                                    /* Connection's Socket Secure Cfg.         */ \
+    FIELD_DEF(prefix,  CPU_INT16U,                  ConnectTimeout_ms,   suffix) /* Connection Connect Timeout.             */ \
+    FIELD_DEF(prefix,  CPU_INT16U,                  InactivityTimeout_s, suffix) /* Connection Inactivity Timeout.          */ \
+    FIELD_DEF(prefix,  NET_PORT_NBR,                ServerPort,          suffix) /* Server Port number.                     */ \
+    FIELD_DEF(prefix,  NET_SOCK_ADDR,               ServerSockAddr,      suffix) /* Server Socket address.                  */ \
+    FIELD_DEF(prefix,  CPU_CHAR,                   *HostNamePtr,         suffix) /* Pointer to server hostname string.      */ \
+    FIELD_DEF(prefix,  CPU_INT16U,                  HostNameLen,         suffix) /* Server Hostname length.                 */ \
+    FIELD_DEF(prefix,  HTTPc_CONN_STATE,            State,               suffix) /* Connection State.                       */ \
+    FIELD_DEF(prefix,  HTTPc_FLAGS,                 Flags,               suffix) /* Set of flags related to HTTP conn.      */ \
+    FIELD_DEF(prefix,  HTTPc_CONN_CLOSE_STATUS,     CloseStatus,         suffix) /* Status of connection closed.            */ \
+    FIELD_DEF(prefix,  HTTPc_ERR,                   ErrCode,             suffix) /* Error code of connection.               */ \
+    TASK_CONN_CALLBACK_FIELDS_DEF(prefix, suffix)                                /* Connection's Callback functions.        */ \
+    TASK_CONN_SIGNAL_FIELDS_DEF(prefix, suffix)                                  /* Conneciton's signals's handle.          */ \
+    FIELD_DEF(prefix,  HTTPc_REQ,                  *ReqListHeadPtr,      suffix) /* Head of the Request list.               */ \
+    FIELD_DEF(prefix,  HTTPc_REQ,                  *ReqListEndPtr,       suffix) /* End of the Request list.                */ \
+    FIELD_DEF(prefix,  HTTPc_FLAGS,                 ReqFlags,            suffix) /* Req flags for internal process.         */ \
+    CONN_QUERY_STR_FIELDS_DEF(prefix, suffix)                                    /* QueryStr param for internal process.    */ \
+    CONN_HDR_FIELDS_DEF(prefix, suffix)                                          /* Header param for internal process.      */ \
+    CONN_FORM_FIELD_DEF(prefix, suffix)                                          /* Form param for internal process.        */ \
+    FIELD_DEF(prefix,  CPU_INT16U,                  ReqDataOffset,       suffix) /* Offset in Req Data Ptr to Tx.           */ \
+    FIELD_DEF(prefix,  HTTPc_FLAGS,                 RespFlags,           suffix) /* Set of flags related to the resp.       */ \
+    FIELD_DEF(prefix,  void,                       *TxDataPtr,           suffix) /* Pointer to data to transmit.            */ \
+    FIELD_DEF(prefix,  CPU_CHAR,                   *BufPtr,              suffix) /* Pointer to conn buffer.                 */ \
+    FIELD_DEF(prefix,  CPU_INT16U,                  BufLen,              suffix) /* Conn buffer's length.                   */ \
+    FIELD_DEF(prefix,  CPU_CHAR,                   *RxBufPtr,            suffix) /* Pointer inside Buf where to Rx data.    */ \
+    FIELD_DEF(prefix,  CPU_INT16U,                  RxDataLenRem,        suffix) /* Remaining data to process in the rx buf.*/ \
+    FIELD_DEF(prefix,  CPU_INT32U,                  RxDataLen,           suffix) /* Data length received.                   */ \
+    FIELD_DEF(prefix,  CPU_CHAR,                   *TxBufPtr,            suffix) /* Pointer inside Buf where to Tx data.    */ \
+    FIELD_DEF(prefix,  CPU_INT16U,                  TxDataLen,           suffix) /* Length of data to Tx.                   */ \
+    FIELD_DEF(      ,  HTTPc_CONN,                 *NextPtr,             suffix) /* Pointer to next conn in list.           */ \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK,              *WebSockPtr,          suffix) /* Pointer to the Websock                  */ \
+    USER_DATA_FIELD_DEF( , )                                                     /* Pointer to user data.                   */
+
+
+struct httpc_conn_obj {
+      STRUCT_CONN_INIT(const, _reserved)
+};
+
+struct httpc_conn {
+      STRUCT_CONN_INIT(,)
+};
+
+
+/*
+*********************************************************************************************************
+*                                         WEBSOCKET DATA TYPE
+*********************************************************************************************************
+*/
+
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+                                                                /* ----------- WEBSOCK MESSAGE TYPE OPCODE ------------ */
+typedef  CPU_INT08U HTTPc_WEBSOCK_OPCODE;
+
+#define  HTTPc_WEBSOCK_OPCODE_CONTINUATION_FRAME         0x0
+#define  HTTPc_WEBSOCK_OPCODE_TXT_FRAME                  0x1
+#define  HTTPc_WEBSOCK_OPCODE_BIN_FRAME                  0x2
+#define  HTTPc_WEBSOCK_OPCODE_CLOSE                      0x8
+#define  HTTPc_WEBSOCK_OPCODE_PING                       0x9
+#define  HTTPc_WEBSOCK_OPCODE_PONG                       0xA
+#define  HTTPc_WEBSOCK_OPCODE_NONE                       0xFF   /* Not defined by the RFC 6455, but for internal use.   */
+
+
+                                                                /* ---------------- WEBSOCK CLOSE CODE ---------------- */
+typedef  CPU_INT16U HTTPc_WEBSOCK_CLOSE_CODE;
+
+#define  HTTPc_WEBSOCK_CLOSE_CODE_NONE                   0u     /* Not defined by the RFC 6455, but for internal use.   */
+
+#define  HTTPc_WEBSOCK_CLOSE_CODE_NORMAL                 1000u
+#define  HTTPc_WEBSOCK_CLOSE_CODE_GOING_AWAY             1001u
+#define  HTTPc_WEBSOCK_CLOSE_CODE_PROTOCOL_ERR           1002u
+#define  HTTPc_WEBSOCK_CLOSE_CODE_DATA_TYPE_NOT_ALLOWED  1003u
+#define  HTTPc_WEBSOCK_CLOSE_CODE_DATA_TYPE_ERR          1007u
+#define  HTTPc_WEBSOCK_CLOSE_CODE_POLICY_VIOLATION       1008u
+#define  HTTPc_WEBSOCK_CLOSE_CODE_MSG_TOO_BIG            1009u
+#define  HTTPc_WEBSOCK_CLOSE_CODE_INVALID_EXT            1010u
+#define  HTTPc_WEBSOCK_CLOSE_CODE_UNEXPECTED_CONDITION   1011u
+
+
+
+typedef enum {
+
+    HTTPc_WEBSOCK_MSG_TYPE_TXT_FRAME          = HTTPc_WEBSOCK_OPCODE_TXT_FRAME,
+    HTTPc_WEBSOCK_MSG_TYPE_BIN_FRAME          = HTTPc_WEBSOCK_OPCODE_BIN_FRAME,
+    HTTPc_WEBSOCK_MSG_TYPE_CLOSE              = HTTPc_WEBSOCK_OPCODE_CLOSE,
+    HTTPc_WEBSOCK_MSG_TYPE_PING               = HTTPc_WEBSOCK_OPCODE_PING,
+    HTTPc_WEBSOCK_MSG_TYPE_PONG               = HTTPc_WEBSOCK_OPCODE_PONG,
+
+} HTTPc_WEBSOCK_MSG_TYPE;
+
+#endif
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void         HTTPc_Init                (const  HTTPc_CFG                *p_cfg,
+                                        const  HTTP_TASK_CFG            *p_task_cfg,
+                                               MEM_SEG                  *p_mem_seg,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_ConnClr             (       HTTPc_CONN_OBJ           *p_conn_obj,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_ConnSetParam        (       HTTPc_CONN_OBJ           *p_conn_obj,
+                                               HTTPc_PARAM_TYPE          type,
+                                               void                     *p_param,
+                                               HTTPc_ERR                *p_err);
+
+CPU_BOOLEAN  HTTPc_ConnOpen            (       HTTPc_CONN_OBJ           *p_conn_obj,
+                                               CPU_CHAR                 *p_buf,
+                                               CPU_INT16U                buf_len,
+                                               CPU_CHAR                 *p_hostname_str,
+                                               CPU_INT16U                hostname_str_len,
+                                               HTTPc_FLAGS               flags,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_ConnClose           (       HTTPc_CONN_OBJ           *p_conn_obj,
+                                               HTTPc_FLAGS               flags,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_ReqClr              (       HTTPc_REQ_OBJ            *p_req_obj,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_ReqSetParam         (       HTTPc_REQ_OBJ            *p_req_obj,
+                                               HTTPc_PARAM_TYPE          type,
+                                               void                     *p_param,
+                                               HTTPc_ERR                *p_err);
+
+CPU_BOOLEAN  HTTPc_ReqSend             (       HTTPc_CONN_OBJ           *p_conn_obj,
+                                               HTTPc_REQ_OBJ            *p_req_obj,
+                                               HTTPc_RESP_OBJ           *p_resp_obj,
+                                               HTTP_METHOD               method,
+                                               CPU_CHAR                 *p_resource_path,
+                                               CPU_INT16U                resource_path_len,
+                                               HTTPc_FLAGS               flags,
+                                               HTTPc_ERR                *p_err);
+
+
+CPU_INT32U   HTTPc_FormAppFmt          (       CPU_CHAR                 *p_buf,
+                                               CPU_INT16U                buf_len,
+                                               HTTPc_FORM_TBL_FIELD     *p_form_tbl,
+                                               CPU_INT16U                form_tbl_size,
+                                               HTTPc_ERR                *p_err);
+
+
+CPU_INT32U   HTTPc_FormMultipartFmt    (       CPU_CHAR                 *p_buf,
+                                               CPU_INT16U                buf_len,
+                                               HTTPc_FORM_TBL_FIELD     *p_form_tbl,
+                                               CPU_INT16U                form_tbl_size,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_FormAddKeyVal       (       HTTPc_FORM_TBL_FIELD     *p_form_tbl,
+                                               HTTPc_KEY_VAL            *p_key_val,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_FormAddKeyValExt    (       HTTPc_FORM_TBL_FIELD     *p_form_tbl,
+                                               HTTPc_KEY_VAL_EXT        *p_key_val_ext,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_FormAddFile         (       HTTPc_FORM_TBL_FIELD     *p_form_tbl,
+                                               HTTPc_MULTIPART_FILE     *p_file_obj,
+                                               HTTPc_ERR                *p_err);
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+void         HTTPc_WebSockSetParam     (       HTTPc_WEBSOCK_OBJ        *p_ws_obj,
+                                               HTTPc_PARAM_TYPE          type,
+                                               void                     *p_param,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_WebSockMsgSetParam  (       HTTPc_WEBSOCK_MSG_OBJ    *p_msg_obj,
+                                               HTTPc_PARAM_TYPE          type,
+                                               void                     *p_param,
+                                               HTTPc_ERR                *p_err);
+
+CPU_BOOLEAN  HTTPc_WebSockUpgrade      (       HTTPc_CONN_OBJ           *p_conn_obj,
+                                               HTTPc_REQ_OBJ            *p_req_obj,
+                                               HTTPc_RESP_OBJ           *p_resp_obj,
+                                               HTTPc_WEBSOCK_OBJ        *p_ws_obj,
+                                               CPU_CHAR                 *p_resource_path,
+                                               CPU_INT16U                resource_path_len,
+                                               HTTPc_FLAGS               flags,
+                                               HTTPc_ERR                *p_err);
+
+CPU_BOOLEAN  HTTPc_WebSockSend         (       HTTPc_CONN_OBJ           *p_conn_obj,
+                                               HTTPc_WEBSOCK_MSG_OBJ    *p_msg_obj,
+                                               HTTPc_WEBSOCK_MSG_TYPE    msg_type,
+                                               CPU_CHAR                 *p_data,
+                                               CPU_INT32U                payload_len,
+                                               HTTPc_FLAGS               flags,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_WebSockClr          (       HTTPc_WEBSOCK_OBJ        *p_ws_obj,
+                                               HTTPc_ERR                *p_err);
+
+void         HTTPc_WebSockMsgClr       (       HTTPc_WEBSOCK_MSG_OBJ    *p_msg_obj,
+                                               HTTPc_ERR                *p_err);
+
+CPU_INT16U   HTTPc_WebSockFmtCloseMsg  (       HTTPc_WEBSOCK_CLOSE_CODE  close_code,
+                                               CPU_CHAR                 *p_reason,
+                                               CPU_CHAR                 *p_buf,
+                                               CPU_INT16U                buf_len,
+                                               HTTPc_ERR                *p_err);
+#endif
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_conn.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_conn.c
new file mode 100644
index 0000000..af2ff62
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_conn.c
@@ -0,0 +1,834 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      HTTP CLIENT CONNECTIION MODULE
+*
+* Filename      : http-c_conn.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPc_CONN_MODULE
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#include  "http-c_conn.h"
+#include  "http-c_sock.h"
+#include  "http-c_req.h"
+#include  "http-c_resp.h"
+#ifdef HTTPc_TASK_MODULE_EN
+#include  "http-c_task.h"
+#endif
+#ifdef HTTPc_WEBSOCK_MODULE_EN
+#include  "http-c_websock.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcConn_Process()
+*
+* Description : Connection connect processing.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask_Handler().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcConn_Process (HTTPc_CONN  *p_conn)
+{
+    HTTPc_CONN_OBJ    *p_conn_const;
+    CPU_BOOLEAN        is_connect;
+    CPU_BOOLEAN        result;
+    CPU_BOOLEAN        no_block;
+    HTTPc_ERR          err;
+
+
+    p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+
+    switch (p_conn->State) {
+        case HTTPc_CONN_STATE_NONE:
+             break;
+
+        case HTTPc_CONN_STATE_CONNECT:                          /* CONNECT STATE                                        */
+             is_connect = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_CONNECT);
+             if (is_connect == DEF_NO) {
+
+                 HTTPcConn_Connect(p_conn, &err);               /* Connection Connect.                                  */
+                 if (err != HTTPc_ERR_NONE) {
+                     p_conn->ErrCode     = err;
+                     p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_NONE;
+                     p_conn->State       = HTTPc_CONN_STATE_NONE;
+                     result              = DEF_FAIL;
+                     HTTPcConn_Remove(p_conn);
+                 } else {
+                     p_conn->State   = HTTPc_CONN_STATE_PARAM_VALIDATE;
+                     result          = DEF_OK;
+                 }
+
+#ifdef HTTPc_TASK_MODULE_EN
+                                                                /* No-Blocking mode: notify app with callback that ...  */
+                                                                /* ... connect is done.                                 */
+                 no_block = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_NO_BLOCK);
+                 if ((no_block          == DEF_YES ) &&
+                     (p_conn->OnConnect != DEF_NULL)) {
+                      p_conn->OnConnect(p_conn_const, result);
+                 }
+
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+                                                                /* Blocking mode: Signal app that connect is done.      */
+                 if (p_conn->ConnectSignal.SemObjPtr != DEF_NULL) {
+                     HTTPcTask_ConnConnectSignal(p_conn, &err);
+                     if (err != HTTPc_ERR_NONE) {
+                         CPU_SW_EXCEPTION(;);
+                     }
+                 }
+#endif
+#endif
+             } else {
+                 p_conn->State = HTTPc_CONN_STATE_PARAM_VALIDATE;
+             }
+             break;
+
+
+        default:
+             CPU_SW_EXCEPTION(;);
+             break;
+    }
+
+    (void)&p_conn_const;
+    (void)&result;
+    (void)&no_block;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcConn_Connect()
+*
+* Description : (1) Validate Server Socket Address.
+*               (2) Connect to Server.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                             Connection to server successful.
+*                               HTTPc_ERR_CONN_PARAM_PORT_INVALID          Invalid HTTP Server port number.
+*                               HTTPc_ERR_CONN_PARAM_ADDR_INVALID          Invalid HTTP Server address.
+*                               HTTPc_ERR_CONN_PARAM_ADDR_FAMILY_INVALID   Invalid HTTP Server address family.
+*
+*                               ------------ RETURNED BY HTTPcSock_Connect() ------------
+*                               See HTTPcSock_Connect() for additional return error codes.
+*
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask_Handler(),
+*               HTTPc_ConnConnect().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcConn_Connect (HTTPc_CONN      *p_conn,
+                         HTTPc_ERR       *p_err)
+{
+    CPU_BOOLEAN  is_connect;
+#ifdef HTTPc_TASK_MODULE_EN
+    CPU_BOOLEAN  no_block;
+#endif
+
+    is_connect = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_CONNECT);
+    if (is_connect == DEF_YES) {
+       *p_err = HTTPc_ERR_CONN_IS_CONNECT;
+        goto exit;
+    }
+
+                                                                /* ---------------- VALIDATE CALLBACKS ---------------- */
+#ifdef HTTPc_TASK_MODULE_EN
+    no_block = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_NO_BLOCK);
+    if (no_block == DEF_YES) {
+        if (p_conn->OnConnect == DEF_NULL) {
+           *p_err = HTTPc_ERR_CONN_PARAM_CONNECT_CALLBACK_INVALID;
+            goto exit;
+        }
+    }
+
+    if (p_conn->OnClose == DEF_NULL) {
+       *p_err = HTTPc_ERR_CONN_PARAM_CLOSE_CALLBACK_INVALID;
+        goto exit;
+    }
+#endif
+
+                                                                /* -------------- CONNECT TO HTTP SERVER -------------- */
+    HTTPcSock_Connect(p_conn, p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+         goto exit;
+    }
+
+    DEF_BIT_SET(p_conn->Flags, HTTPc_FLAG_CONN_CONNECT);
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcConn_Close()
+*
+* Description : (1) HTTPc Connection Close Handler:
+*                   (a) Call hook function to advertise connection closing.
+*                   (b) Close Socket
+*                   (c) Release HTTPc Connection related objects.
+*                   (d) Remove connection from list.
+*
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               ------------ RETURNED BY HTTPcSock_Close() -------------
+*                               See HTTPcSock_Close() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcConn_TransProcess(),
+*               HTTPc_ConnCloseHandler().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcConn_Close (HTTPc_CONN  *p_conn,
+                       HTTPc_ERR   *p_err)
+{
+    HTTPc_CONN_OBJ    *p_conn_const;
+    HTTPc_REQ         *p_req;
+    HTTPc_REQ_OBJ     *p_req_const;
+
+
+    p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+
+                                                                /* ---------- CLEAR CONNECTION REQUESTS LIST ---------- */
+    p_req        = p_conn->ReqListHeadPtr;
+    p_req_const  = (HTTPc_REQ_OBJ *)p_req;
+    while (p_req != DEF_NULL) {
+#ifdef HTTPc_TASK_MODULE_EN
+        if (p_req->OnTransComplete != DEF_NULL) {
+            p_req->OnTransComplete(p_conn_const, p_req_const, p_req->RespPtr, DEF_FAIL);
+        }
+        if (p_req->OnErr != DEF_NULL) {
+            p_req->OnErr(p_conn_const, p_req_const, HTTPc_ERR_CONN_SOCK_CLOSED);
+        }
+#else
+        (void)&p_conn_const;
+        (void)&p_req_const;
+#endif
+        HTTPcConn_ReqRemove(p_conn);
+        p_req = p_conn->ReqListHeadPtr;
+    }
+
+    DEF_BIT_CLR(p_conn->Flags, HTTPc_FLAG_CONN_CONNECT);
+    DEF_BIT_CLR(p_conn->Flags, HTTPc_FLAG_CONN_IN_USE);
+                                                                /* ------------- CLOSE CONNECTION SOCKET -------------- */
+    HTTPcSock_Close(p_conn, p_err);
+    if (*p_err != HTTPc_ERR_NONE) {
+        *p_err = HTTPc_ERR_CONN_SOCK_CLOSE_FATAL;
+         goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcConn_Process()
+*
+* Description : Process the Connection State.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcTask_Handler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcConn_TransProcess (HTTPc_CONN  *p_conn)
+{
+    HTTPc_CONN_OBJ    *p_conn_const;
+    HTTPc_REQ         *p_req;
+    HTTPc_REQ_OBJ     *p_req_const;
+    CPU_BOOLEAN        result;
+    CPU_BOOLEAN        no_block;
+    CPU_BOOLEAN        success;
+    CPU_BOOLEAN        to_close;
+    HTTPc_ERR          err;
+#ifdef HTTPc_WEBSOCK_MODULE_EN
+    CPU_BOOLEAN        is_websocket;
+#endif
+    p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+
+    p_req        = p_conn->ReqListHeadPtr;
+    p_req_const  = (HTTPc_REQ_OBJ *)p_req;
+
+                                                                /* ------------- CONNECTION STATE MACHINE ------------- */
+    switch (p_conn->State) {
+        case HTTPc_CONN_STATE_PARAM_VALIDATE:                   /* REQUEST PREPARATION & VALIDATTION STATE              */
+             result = HTTPcSock_IsRxClosed(p_conn, &err);       /* Check if connection half-closed by server.           */
+             if (result == DEF_YES) {
+                 p_conn->ErrCode     = HTTPc_ERR_NONE;
+                 p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_SERVER;
+                 p_conn->State       = HTTPc_CONN_STATE_COMPLETED;
+             } else {
+                 if (p_req != DEF_NULL) {
+                     HTTPcConn_TransParamReset(p_conn);         /* Clear Connection internal parameters.                */
+                     HTTPcReq_Prepare(p_conn, &err);
+                     if (err != HTTPc_ERR_NONE) {
+                         p_conn->ErrCode     = err;
+                         p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_NONE;
+                         p_conn->State       = HTTPc_CONN_STATE_ERR;
+                     } else {
+                         p_conn->State = HTTPc_CONN_STATE_REQ_LINE_METHOD;
+                     }
+                 }
+             }
+             break;
+
+
+        case HTTPc_CONN_STATE_REQ_LINE_METHOD:
+        case HTTPc_CONN_STATE_REQ_LINE_URI:
+        case HTTPc_CONN_STATE_REQ_LINE_QUERY_STR:
+        case HTTPc_CONN_STATE_REQ_LINE_PROTO_VER:
+        case HTTPc_CONN_STATE_REQ_HDR_HOST:
+        case HTTPc_CONN_STATE_REQ_HDR_CONTENT_TYPE:
+        case HTTPc_CONN_STATE_REQ_HDR_CONTENT_LEN:
+        case HTTPc_CONN_STATE_REQ_HDR_TRANSFER_ENCODE:
+        case HTTPc_CONN_STATE_REQ_HDR_CONN:
+        case HTTPc_CONN_STATE_REQ_HDR_EXT:
+        case HTTPc_CONN_STATE_REQ_HDR_LAST:
+        case HTTPc_CONN_STATE_REQ_BODY:
+        case HTTPc_CONN_STATE_REQ_BODY_DATA:
+        case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_SIZE:
+        case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_DATA:
+        case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_END:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_APP:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_DISPO:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_TYPE:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA_END:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY_END:
+        case HTTPc_CONN_STATE_REQ_END:                          /* REQUEST PROCESSING STATES                            */
+            (void)HTTPcReq(p_conn, &err);
+             switch (err) {
+                 case HTTPc_ERR_NONE:
+                 case HTTPc_ERR_CONN_SOCK_TX:
+                 case HTTPc_ERR_TRANS_TX_BUF_FULL:
+                      break;
+
+                 case HTTPc_ERR_CONN_SOCK_CLOSED:
+                      p_conn->ErrCode     = err;
+                      p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_SERVER;
+                      p_conn->State       = HTTPc_CONN_STATE_ERR;
+                      break;
+
+                 default:
+                      p_conn->ErrCode     = err;
+                      p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_ERR_INTERNAL;
+                      p_conn->State       = HTTPc_CONN_STATE_ERR;
+                      break;
+             }
+             break;
+
+
+        case HTTPc_CONN_STATE_RESP_INIT:
+        case HTTPc_CONN_STATE_RESP_STATUS_LINE:
+        case HTTPc_CONN_STATE_RESP_HDR:
+        case HTTPc_CONN_STATE_RESP_BODY:
+        case HTTPc_CONN_STATE_RESP_BODY_CHUNK_SIZE:
+        case HTTPc_CONN_STATE_RESP_BODY_CHUNK_DATA:
+        case HTTPc_CONN_STATE_RESP_BODY_CHUNK_LAST:
+        case HTTPc_CONN_STATE_RESP_COMPLETED:                   /* RESPONSE PROCESSING STATES                           */
+             success = HTTPcResp(p_conn, &err);
+             switch (err) {
+                 case HTTPc_ERR_NONE:
+                 case HTTPc_ERR_CONN_SOCK_RX:
+                 case HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED:
+                      break;
+
+                 case HTTPc_ERR_CONN_SOCK_CLOSED:
+                      p_conn->ErrCode     = err;
+                      p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_SERVER;
+                      p_conn->State       = HTTPc_CONN_STATE_ERR;
+                      break;
+
+                 default:
+                      p_conn->ErrCode     = err;
+                      p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_ERR_INTERNAL;
+                      p_conn->State       = HTTPc_CONN_STATE_ERR;
+                      break;
+             }
+
+             if (success == DEF_YES) {
+                 DEF_BIT_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_COMPLETE_OK);
+             } else {
+                 DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_COMPLETE_OK);
+             }
+             break;
+
+
+        case HTTPc_CONN_STATE_ERR:                              /* ERROR STATE                                          */
+#ifdef HTTPc_TASK_MODULE_EN
+                                                                /* Call callback function for Transaction Error.        */
+             if (p_req != DEF_NULL) {
+                 if (p_req->OnErr != DEF_NULL) {
+                     p_req->OnErr(p_conn_const, p_req_const, p_conn->ErrCode);
+                 }
+             } else {
+                 CPU_SW_EXCEPTION(;);
+             }
+#endif
+             p_conn->State = HTTPc_CONN_STATE_COMPLETED;
+             break;
+
+
+        case HTTPc_CONN_STATE_COMPLETED:                        /* TRANSACTION COMPLETE STATE                           */
+             if (p_req != DEF_NULL) {
+                 success = DEF_BIT_IS_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_COMPLETE_OK);
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+                                                                /* Check if it is a upgrade websocket request.          */
+                 result = DEF_BIT_IS_SET(p_req->Flags, HTTPc_FLAG_REQ_UPGRADE_WEBSOCKET);
+                 if ((result  == DEF_YES) && (success == DEF_YES)) {
+                     if ((p_req->WebSockPtr->Flags & HTTPc_FLAG_WEBSOCK_ALL) == HTTPc_FLAG_WEBSOCK_ALL) {
+                         if (p_req->RespPtr->StatusCode == HTTP_STATUS_SWITCHING_PROTOCOLS) {
+                                                                /* The connection is upgrading to websocket.            */
+                             DEF_BIT_SET(p_conn->Flags, HTTPc_FLAG_CONN_WEBSOCKET);
+                             p_conn->WebSockPtr = p_req->WebSockPtr->WebSockObjPtr;
+                         }
+                     }
+                 }
+#endif
+
+#ifdef HTTPc_TASK_MODULE_EN
+                                                                /* No-Blocking mode: notify app with callback that ...  */
+                                                                /* ... transaction is done.                             */
+                 no_block = DEF_BIT_IS_SET(p_req->Flags, HTTPc_FLAG_REQ_NO_BLOCK);
+                 if ((no_block               == DEF_YES ) &&
+                     (p_req->OnTransComplete != DEF_NULL)) {
+                      p_req->OnTransComplete(p_conn_const, p_req_const, p_req->RespPtr, success);
+                 }
+#endif
+             }
+
+             to_close = HTTPcConn_TransComplete(p_conn);
+             if (to_close == DEF_YES) {
+                 p_conn->State = HTTPc_CONN_STATE_CLOSE;
+             } else {
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+                                                                /* Blocking mode: Signal app that transaction is done.  */
+                 if (p_conn->TransDoneSignal.SemObjPtr != DEF_NULL) {
+                     HTTPcTask_TransDoneSignal(p_conn, &err);
+                     if (err != HTTPc_ERR_NONE) {
+                         CPU_SW_EXCEPTION(;);
+                     }
+                 }
+#endif
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+                 if (p_req != DEF_NULL) {
+                     if (p_req->WebSockPtr != DEF_NULL) {
+                         HTTPc_Mem_WebSockReqRelease (p_req->WebSockPtr);
+                     }
+                 }
+                 is_websocket = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_WEBSOCKET);
+                 if (is_websocket == DEF_YES) {
+                     p_conn->State = HTTPc_CONN_STATE_WEBSOCK_INIT;
+                 } else {
+                     p_conn->State = HTTPc_CONN_STATE_PARAM_VALIDATE;
+                 }
+#else
+                 p_conn->State = HTTPc_CONN_STATE_PARAM_VALIDATE;
+#endif
+             }
+             break;
+
+        case HTTPc_CONN_STATE_CLOSE:                            /* CONNECTION CLOSE STATE                               */
+             HTTPcConn_Close(p_conn, &err);                     /* Close Connection.                                    */
+             HTTPcConn_Remove(p_conn);                          /* Release Connection.                                  */
+
+#ifdef HTTPc_TASK_MODULE_EN
+                                                                /* Call callback function for Conn Close.               */
+             if (p_conn->OnClose != DEF_NULL) {
+                 p_conn->OnClose(p_conn_const, p_conn->CloseStatus, p_conn->ErrCode);
+             }
+
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+                                                                 /* Blocking mode: Signal app that transaction is done.  */
+             if (p_conn->TransDoneSignal.SemObjPtr != DEF_NULL) {
+                 HTTPcTask_TransDoneSignal(p_conn, &err);
+                 if (err != HTTPc_ERR_NONE) {
+                     CPU_SW_EXCEPTION(;);
+                 }
+             }
+                                                                /* Blocking mode: Signal App that Conn was closed.      */
+             if (p_conn->CloseSignal.SemObjPtr != DEF_NULL) {
+                 HTTPcTask_ConnCloseSignal(p_conn, &err);
+                 if (err != HTTPc_ERR_NONE) {
+                     CPU_SW_EXCEPTION(;);
+                 }
+             }
+#endif
+#endif
+             p_conn->State = HTTPc_CONN_STATE_NONE;
+             break;
+
+
+        default:
+             CPU_SW_EXCEPTION(;);
+             break;
+    }
+
+    (void)&p_conn_const;
+    (void)&p_req_const;
+    (void)&no_block;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcConn_TransParamReset()
+*
+* Description : Clear HTTP Connection object members related to internal usage during a HTTP transaction.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ReqSend(),
+*               HTTPcTask_Handle().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcConn_TransParamReset (HTTPc_CONN  *p_conn)
+{
+                                                                /* ------------ INIT CONNECTION PARAMETERS ------------ */
+    p_conn->SockFlags                = DEF_BIT_NONE;
+    p_conn->ErrCode                  = HTTPc_ERR_NONE;
+    p_conn->CloseStatus              = HTTPc_CONN_CLOSE_STATUS_NONE;
+    DEF_BIT_CLR(p_conn->Flags, HTTPc_FLAG_CONN_TO_CLOSE);
+
+                                                                /* ------------- INIT REQUEST PARAMETERS -------------- */
+    p_conn->ReqFlags                 = 0u;
+#if (HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED)
+    p_conn->ReqQueryStrTxIx          = 0u;
+    p_conn->ReqQueryStrTempPtr       = DEF_NULL;
+#endif
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+    p_conn->ReqHdrTxIx               = 0u;
+    p_conn->ReqHdrTempPtr            = DEF_NULL;
+#endif
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+    p_conn->ReqFormDataTxIx          = 0u;
+#endif
+    p_conn->ReqDataOffset            = 0u;
+
+                                                                /* ------------- INIT RESPONSE PARAMETERS ------------- */
+    DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+    DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_BODY_CHUNK_TRANSFER);
+
+
+                                                                /* --------- INIT CONNECTION BUFFER PARAMETERS -------- */
+    p_conn->RxBufPtr                 = p_conn->BufPtr;
+    p_conn->RxDataLenRem             = 0u;
+    p_conn->RxDataLen                = 0u;
+    p_conn->TxBufPtr                 = p_conn->BufPtr;
+    p_conn->TxDataLen                = 0u;
+    p_conn->TxDataPtr                = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcConn_TransComplete()
+*
+* Description : (1) HTTP Transaction complete operations :
+*                   (a) Check if connection must be closed.
+*                   (b) Remove connection from list.
+*
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+* Return(s)   : DEF_YES, if connection must be close.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPcTask_Handle(),
+*               HTTPc_ReqSend().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcConn_TransComplete (HTTPc_CONN  *p_conn)
+{
+    CPU_BOOLEAN   close_hdr;
+    CPU_BOOLEAN   is_connect;
+    CPU_BOOLEAN   to_close;
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    CPU_BOOLEAN   is_websocket;
+#endif
+
+    to_close = DEF_NO;
+
+    close_hdr  = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_TO_CLOSE);
+    is_connect = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_CONNECT);
+    if ((close_hdr  == DEF_YES) &&
+        (is_connect == DEF_YES)) {
+         to_close = DEF_YES;
+    }
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    is_websocket = DEF_BIT_IS_SET(p_conn->Flags,  HTTPc_FLAG_CONN_WEBSOCKET);
+    if (is_websocket == DEF_YES) {
+        to_close = DEF_NO;
+    }
+#endif
+    if (p_conn->CloseStatus != HTTPc_CONN_CLOSE_STATUS_NONE) {
+        to_close = DEF_YES;
+    }
+                                                                /* ----------- REMOVE REQUEST FROM LIST ------------ */
+    HTTPcConn_ReqRemove(p_conn);
+
+    return (to_close);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            HTTPcConn_Add()
+*
+* Description : (1) Add current HTTPc Connection to connection list if the task is enabled.
+*               (2) Tag Connection as being used.
+*
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask(),
+*               HTTPc_ConnOpen().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcConn_Add (HTTPc_CONN  *p_conn)
+{
+
+#ifdef HTTPc_TASK_MODULE_EN
+    HTTPcTask_ConnAdd(p_conn);
+#endif
+    DEF_BIT_SET(p_conn->Flags, HTTPc_FLAG_CONN_IN_USE);
+
+    p_conn->State = HTTPc_CONN_STATE_CONNECT;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcConn_Remove()
+*
+* Description : (1) Remove current HTTPc Connection from connection list if the task is enabled.
+*               (2) Release Connection.
+*
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcConn_Process(),
+*               HTTPcConn_TransProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcConn_Remove (HTTPc_CONN  *p_conn)
+{
+
+#ifdef HTTPc_TASK_MODULE_EN
+    HTTPcTask_ConnRemove(p_conn);
+#endif
+
+    DEF_BIT_CLR(p_conn->Flags, HTTPc_FLAG_CONN_IN_USE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcConn_ReqAdd()
+*
+* Description : Add new Request to the Connection Request list.
+*
+* Argument(s) : p_req       Pointer to the HTTPc Request.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Request added successfully.
+*                               HTTPc_ERR_CONN_IS_RELEASED      Connection is not used.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask(),
+*               HTTPc_ReqSend().
+*
+* Note(s)     : (1) New Request is added at the end of the list.
+*********************************************************************************************************
+*/
+
+void  HTTPcConn_ReqAdd (HTTPc_REQ  *p_req,
+                        HTTPc_ERR  *p_err)
+{
+    HTTPc_CONN   *p_conn;
+    HTTPc_REQ    *p_req_item;
+    CPU_BOOLEAN   in_use;
+
+
+    p_conn = p_req->ConnPtr;
+
+    in_use = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_IN_USE);
+
+    if (in_use == DEF_YES) {
+
+        if (p_conn->ReqListHeadPtr == DEF_NULL) {
+            p_conn->ReqListHeadPtr = p_req;
+            p_conn->ReqListEndPtr  = p_req;
+            p_req->NextPtr         = 0;
+        } else {
+            p_req_item             = p_conn->ReqListEndPtr;
+            p_req_item->NextPtr    = p_req;
+            p_conn->ReqListEndPtr  = p_req;
+            p_req->NextPtr         = 0;
+        }
+
+        DEF_BIT_SET(p_req->Flags, HTTPc_FLAG_REQ_IN_USE);
+
+       *p_err = HTTPc_ERR_NONE;
+
+    } else {
+       *p_err = HTTPc_ERR_CONN_IS_RELEASED;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcConn_ReqRemove()
+*
+* Description : Remove the first Request from the Connection Request list.
+*
+* Argument(s) : p_conn      Pointer to the HTTPc Connection.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcConn_Close(),
+*               HTTPcConn_TransComplete().
+*
+* Note(s)     : (1) The Head of the Request list is removed.
+*********************************************************************************************************
+*/
+
+void  HTTPcConn_ReqRemove (HTTPc_CONN  *p_conn)
+{
+    HTTPc_REQ  *p_req_item;
+
+
+    p_req_item = p_conn->ReqListHeadPtr;
+
+    if (p_req_item == DEF_NULL) {
+        p_conn->ReqListEndPtr  = DEF_NULL;
+    } else if (p_req_item->NextPtr == DEF_NULL) {
+        p_conn->ReqListHeadPtr = DEF_NULL;
+        p_conn->ReqListEndPtr  = DEF_NULL;
+        p_req_item->NextPtr    = 0;
+    } else {
+        p_conn->ReqListHeadPtr = p_req_item->NextPtr;
+        p_req_item->NextPtr    = 0;
+    }
+
+    if (p_req_item != DEF_NULL) {
+        DEF_BIT_CLR(p_req_item->Flags, HTTPc_FLAG_REQ_IN_USE);
+    }
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_conn.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_conn.h
new file mode 100644
index 0000000..d3432e0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_conn.h
@@ -0,0 +1,126 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT CONNECTION MODULE
+*
+* Filename      : http-c_conn.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPc module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_CONN_MODULE_PRESENT                              /* See Note #1.                                         */
+#define  HTTPc_CONN_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+#include  "../../Common/http.h"
+#include  "http-c.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void          HTTPcConn_Process         (HTTPc_CONN  *p_conn);
+
+void          HTTPcConn_Connect         (HTTPc_CONN  *p_conn,
+                                         HTTPc_ERR   *p_err);
+
+void          HTTPcConn_Close           (HTTPc_CONN  *p_conn,
+                                         HTTPc_ERR   *p_err);
+
+void          HTTPcConn_TransProcess    (HTTPc_CONN  *p_conn);
+
+void          HTTPcConn_TransParamReset (HTTPc_CONN  *p_conn);
+
+CPU_BOOLEAN   HTTPcConn_TransComplete   (HTTPc_CONN  *p_conn);
+
+void          HTTPcConn_Add             (HTTPc_CONN  *p_conn);
+
+void          HTTPcConn_Remove          (HTTPc_CONN  *p_conn);
+
+void          HTTPcConn_ReqAdd          (HTTPc_REQ   *p_req,
+                                         HTTPc_ERR   *p_err);
+
+void          HTTPcConn_ReqRemove       (HTTPc_CONN  *p_conn);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_CONN_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_mem.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_mem.c
new file mode 100644
index 0000000..68df9cc
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_mem.c
@@ -0,0 +1,314 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     HTTP CLIENT MEMORY LIBRARY
+*
+* Filename      : http-c_mem.c
+* Version       : V3.00.02
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPc_MEM_MODULE
+#include  "http-c_mem.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static MEM_DYN_POOL HTTPc_MsgPool;
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+static MEM_DYN_POOL HTTPc_WebSockReqPool;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPc_Mem_MsgPoolInit()
+*
+* Description : Initialize the Message object pool for the HTTP client task.
+*
+* Argument(s) : p_cfg  Pointer to the HTTP client configuration.
+*
+*               p_seg  Pointer to segment from which to allocate memory. Will be allocated from
+*                      general-purpose heap if null.
+*
+*               p_err  Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPc_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPc_Mem_TaskMsgPoolInit (const  HTTPc_CFG  *p_cfg,
+                                        MEM_SEG    *p_seg,
+                                        HTTPc_ERR  *p_err)
+{
+    LIB_ERR      err_lib;
+
+
+    Mem_DynPoolCreate("HTTPc Msg Pool",
+                      &HTTPc_MsgPool,
+                       p_seg,
+                       sizeof(HTTPc_TASK_MSG),
+                       sizeof(CPU_SIZE_T),
+                       p_cfg->MsgQ_Size,
+                       LIB_MEM_BLK_QTY_UNLIMITED,
+                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        default:
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPc_ERR_MSG_INIT_POOL_FAULT;
+             return;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPc_Mem_MsgGet()
+*
+* Description : Get a HTTPc Message object.
+*
+* Argument(s) : none.
+*
+* Return(s)   : If operation is successful, Pointer to the allocated Message object.
+*               If operation has failed,    DEF_NULL.
+*
+* Caller(s)   : HTTPcTask_MsgQueue().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+HTTPc_TASK_MSG  *HTTPc_Mem_TaskMsgGet (void)
+{
+
+    LIB_ERR          err_lib;
+    HTTPc_TASK_MSG  *p_msg;
+
+
+    p_msg = (HTTPc_TASK_MSG *) Mem_DynPoolBlkGet(&HTTPc_MsgPool,
+                                            &err_lib);
+
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             Mem_Clr(p_msg, sizeof(HTTPc_TASK_MSG));
+             break;
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+        default:
+             return (DEF_NULL);
+    }
+
+    return (p_msg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPc_Mem_MsgRelease()
+*
+* Description : Release an allocated HTTPc Message object.
+*
+* Argument(s) : p_msg   Pointer to the Message object to free.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcTask().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPc_Mem_TaskMsgRelease (HTTPc_TASK_MSG  *p_msg)
+{
+    LIB_ERR  err_lib;
+
+
+    Mem_DynPoolBlkFree(&HTTPc_MsgPool,
+                        p_msg,
+                       &err_lib);
+    (void)&err_lib;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPc_Mem_WebSockReqPoolInit()
+*
+* Description : Initialize the WebSocket Request object pool.
+*
+* Argument(s) : p_cfg  Pointer to the HTTP client configuration.
+*
+*               p_seg  Pointer to segment from which to allocate memory. Will be allocated from
+*                      general-purpose heap if null.
+*
+*               p_err  Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPc_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+void  HTTPc_Mem_WebSockReqPoolInit (const  HTTPc_CFG  *p_cfg,
+                                           MEM_SEG    *p_seg,
+                                           HTTPc_ERR  *p_err)
+{
+    LIB_ERR      err_lib;
+
+
+    Mem_DynPoolCreate("HTTPc WebSocket Request Pool",
+                      &HTTPc_WebSockReqPool,
+                       p_seg,
+                       sizeof(HTTPc_WEBSOCK_REQ),
+                       sizeof(CPU_SIZE_T),
+                       0,
+                       p_cfg->MsgQ_Size,
+                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        default:
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPc_ERR_WEBSOCK_REQ_INIT_POOL_FAULT;
+             return;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPc_Mem_WebSockReqGet()
+*
+* Description : Get a WebSocket Request object.
+*
+* Argument(s) : none.
+*
+* Return(s)   : If operation is successful, Pointer to the allocated WebSocket Request object.
+*               If operation has failed,    DEF_NULL.
+*
+* Caller(s)   : HTTPcWebSock_InitReqObj().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+HTTPc_WEBSOCK_REQ  *HTTPc_Mem_WebSockReqGet (void)
+{
+    LIB_ERR             err_lib;
+    HTTPc_WEBSOCK_REQ  *p_ws_req;
+
+
+    p_ws_req = (HTTPc_WEBSOCK_REQ *) Mem_DynPoolBlkGet(&HTTPc_WebSockReqPool,
+                                                       &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             Mem_Clr(p_ws_req, sizeof(HTTPc_WEBSOCK_REQ ));
+             break;
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+        default:
+             return (DEF_NULL);
+    }
+
+    return (p_ws_req);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPc_Mem_WebSockReqRelease()
+*
+* Description : Release an allocated WebSocket Request object.
+*
+* Argument(s) : p_ws_req    Pointer to the WebSocket Request object to free.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcConn_TransProcess(),
+*               HTTPcWebSock_InitReqObj().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+void  HTTPc_Mem_WebSockReqRelease (HTTPc_WEBSOCK_REQ  *p_ws_req)
+{
+    LIB_ERR  err_lib;
+
+
+    Mem_DynPoolBlkFree(&HTTPc_WebSockReqPool,
+                        p_ws_req,
+                       &err_lib);
+   (void)&err_lib;
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_mem.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_mem.h
new file mode 100644
index 0000000..c6d6e5f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_mem.h
@@ -0,0 +1,136 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     HTTP CLIENT MEMORY LIBRARY
+*
+* Filename      : http-c_mem.h
+* Version       : V3.00.02
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTP memory module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_MEM_PRESENT                                          /* See Note #1.                                         */
+#define  HTTPc_MEM_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "http-c.h"
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+#include  "http-c_websock.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef enum {
+    HTTPc_MSG_TYPE_CONN_OPEN,
+    HTTPc_MSG_TYPE_CONN_CLOSE,
+    HTTPc_MSG_TYPE_REQ,
+    HTTPc_MSG_TYPE_WEBSOCK_MSG,
+} HTTPc_MSG_TYPE;
+
+typedef struct httpc_task_msg {
+    HTTPc_MSG_TYPE  Type;
+    void           *DataPtr;
+} HTTPc_TASK_MSG;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void               HTTPc_Mem_TaskMsgPoolInit    (const  HTTPc_CFG           *p_cfg,
+                                                        MEM_SEG             *p_seg,
+                                                        HTTPc_ERR           *p_err);
+
+HTTPc_TASK_MSG    *HTTPc_Mem_TaskMsgGet         (void);
+
+void               HTTPc_Mem_TaskMsgRelease     (HTTPc_TASK_MSG      *p_msg);
+
+
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+void               HTTPc_Mem_WebSockReqPoolInit (const HTTPc_CFG           *p_cfg,
+                                                       MEM_SEG             *p_seg,
+                                                       HTTPc_ERR           *p_err);
+
+HTTPc_WEBSOCK_REQ *HTTPc_Mem_WebSockReqGet      (void);
+
+void               HTTPc_Mem_WebSockReqRelease  (HTTPc_WEBSOCK_REQ   *p_ws_req);
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of HTTPc memory module include.                  */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_req.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_req.c
new file mode 100644
index 0000000..e27747d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_req.c
@@ -0,0 +1,3351 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      HTTP CLIENT REQUEST MODULE
+*
+* Filename      : http-c_req.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define    MICRIUM_SOURCE
+#define    HTTPc_REQ_MODULE
+
+#include  
+#include  
+
+#include  "http-c_req.h"
+#include  "http-c_conn.h"
+#include  "http-c_sock.h"
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+#include  "http-c_websock.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_SIZE_T  HTTPcReq_PrepareFormAppLen       (HTTPc_CONN        *p_conn,
+                                                      HTTPc_ERR         *p_err);
+
+static  CPU_SIZE_T  HTTPcReq_PrepareFormMultipartLen (HTTPc_CONN        *p_conn,
+                                                      HTTPc_ERR         *p_err);
+#endif
+
+static  void        HTTPcReq_Line                    (HTTPc_CONN        *p_conn,
+                                                      HTTPc_ERR         *p_err);
+
+#if (HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED)
+static  CPU_CHAR    *HTTPcReq_QueryStrTbl            (HTTPc_CONN        *p_conn,
+                                                      CPU_CHAR          *p_buf,
+                                                      CPU_INT16U         buf_len_rem,
+                                                      HTTPc_ERR         *p_err);
+
+static  CPU_CHAR    *HTTPcReq_QueryStrHook           (HTTPc_CONN        *p_conn,
+                                                      CPU_CHAR          *p_buf,
+                                                      CPU_INT16U         buf_len_rem,
+                                                      HTTPc_ERR         *p_err);
+#endif
+
+static  void         HTTPcReq_Hdr                    (HTTPc_CONN        *p_conn,
+                                                      HTTPc_ERR         *p_err);
+
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+static  CPU_CHAR    *HTTPcReq_HdrExtTbl              (HTTPc_CONN        *p_conn,
+                                                      CPU_CHAR          *p_buf,
+                                                      CPU_INT16U         buf_len_rem,
+                                                      HTTPc_ERR         *p_err);
+
+static  CPU_CHAR    *HTTPcReq_HdrExtHook             (HTTPc_CONN        *p_conn,
+                                                      CPU_CHAR          *p_buf,
+                                                      CPU_INT16U         buf_len_rem,
+                                                      HTTPc_ERR         *p_err);
+
+static  HTTPc_HDR  *HTTPcReq_HdrSearch               (HTTPc_CONN        *p_conn,
+                                                      HTTP_HDR_FIELD     hdr_field);
+#endif
+
+static  void         HTTPcReq_Body                   (HTTPc_CONN        *p_conn,
+                                                      HTTPc_ERR         *p_err);
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+static  void        HTTPcReq_FormApp                 (HTTPc_CONN        *p_conn,
+                                                      HTTPc_ERR         *p_err);
+
+static  void        HTTPcReq_FormMultipart           (HTTPc_CONN        *p_conn,
+                                                      HTTPc_ERR         *p_err);
+#endif
+
+static  void        HTTPcReq_BodyData                (HTTPc_CONN        *p_conn,
+                                                      HTTPc_ERR         *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcReq_Prepare()
+*
+* Description : (1) Additional preparation before request processing. Sets which HTTP mandatory headers to
+*                   include:
+*
+*                   (a) Host
+*                   (b) Connection
+*                   (c) Content-Type
+*                   (d) Content-Length
+*                   (e) Transfer-Encoding
+*
+*               (2) In case form table is present, calculate form size for Content-Length header.
+*
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                          Request preparation successful
+*                               HTTPc_ERR_REQ_HDR_UNAUTHORIZED          Hdr in ext tbl must only be set by core.
+*                               HTTPc_ERR_REQ_BODY_INVALID              Invalid body/form ptr set by app.
+*                               HTTPc_ERR_REQ_TRANSFER_ENCODING_INVALID Invalid transfer-encoding set by app.
+*                               HTTPc_ERR_REQ_CONTENT_TYPE_INVALID      Invalid content-type set by app.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask_Handler().
+*
+* Note(s)     : (1) The following HTTP headers must not be passed inside the extra header table. They
+*                   will be set by the HTTP client core according to the arguments passed by the API
+*                   functions :
+*                       (a) Host
+*                       (b) Connection
+*                       (c) Content-Type
+*                       (d) Content-Length
+*                       (e) Transfer-Encoding
+*
+*               (2) The Host Header is mandatory for HTTP/1.1 protocol version communication.
+*
+*               (3) If a body is present in the request, one of the bellow header MUST be present :
+*                       (a) Transfer-Encoding
+*                       (b) Content-Length
+*
+*               (4) Chunk Transfer-Encoding is only available in HTTP/1.1.
+*********************************************************************************************************
+*/
+
+void  HTTPcReq_Prepare (HTTPc_CONN  *p_conn,
+                        HTTPc_ERR   *p_err)
+{
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+    HTTPc_HDR          *p_hdr;
+#endif
+    HTTPc_REQ          *p_req;
+    HTTP_DICT          *p_entry;
+    CPU_BOOLEAN         persistent;
+    CPU_BOOLEAN         chunk_en;
+    CPU_BOOLEAN         body_present;
+    CPU_BOOLEAN         form_present;
+#ifdef HTTPc_TASK_MODULE_EN
+    CPU_BOOLEAN         no_block;
+#endif
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    CPU_BOOLEAN         websocket;
+#endif
+
+    p_req = p_conn->ReqListHeadPtr;
+
+    persistent   = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_PERSISTENT);
+    chunk_en     = DEF_BIT_IS_SET(p_req->Flags,  HTTPc_FLAG_REQ_BODY_CHUNK_TRANSFER);
+    body_present = DEF_BIT_IS_SET(p_req->Flags,  HTTPc_FLAG_REQ_BODY_PRESENT);
+    form_present = DEF_BIT_IS_SET(p_req->Flags,  HTTPc_FLAG_REQ_FORM_PRESENT);
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    websocket    = DEF_BIT_IS_SET(p_req->Flags, HTTPc_FLAG_REQ_UPGRADE_WEBSOCKET);
+#endif
+                                                                /* -------------- VALIDATE QUERY STRING --------------- */
+#if (HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED)
+
+    if ((p_req->QueryStrNbr  > 0       ) &&
+        (p_req->QueryStrTbl == DEF_NULL)) {
+        *p_err = HTTPc_ERR_REQ_PARAM_QUERY_STR_TBL_INVALID;
+         goto exit;
+    }
+#endif
+
+                                                                /* ----------- VALIDATE ADDITIONAL HEADERS ------------ */
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+    if ((p_req->HdrNbr  > 0       ) &&
+        (p_req->HdrTbl == DEF_NULL)) {
+        *p_err = HTTPc_ERR_REQ_PARAM_HDR_INVALID_TBL_PTR;
+         goto exit;
+    }
+#endif
+
+#if  (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+    if ((p_req->DataPtr      != DEF_NULL) &&                    /* Cannot have a body pointer and a form pointer at ... */
+        (p_req->FormFieldTbl != DEF_NULL)) {                    /* ... same time.                                       */
+        *p_err = HTTPc_ERR_REQ_PARAM_BODY_INVALID;
+         goto exit;
+    }
+#endif
+
+                                                                /* -------------- VALIDATE REQUEST BODY --------------- */
+    if (body_present == DEF_YES) {
+
+        p_entry = HTTP_Dict_EntryGet(HTTP_Dict_ContentType,
+                                     HTTP_Dict_ContentTypeSize,
+                                     p_req->ContentType);
+        if (p_entry == DEF_NULL) {
+           *p_err = HTTPc_ERR_REQ_PARAM_CONTENT_TYPE_INVALID;
+            goto exit;
+        }
+
+        if (form_present == DEF_NO) {
+
+            if ((chunk_en          == DEF_NO) &&
+                (p_req->ContentLen == 0u    )) {
+                *p_err = HTTPc_ERR_REQ_PARAM_CONTENT_LEN_INVALID;
+                 goto exit;
+            }
+        }
+
+    }
+
+                                                                /* -------------- VALIDATE REQUEST FORM --------------- */
+    if (form_present == DEF_YES) {
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+        switch (p_req->ContentType) {
+            case HTTP_CONTENT_TYPE_APP_FORM:
+            case HTTP_CONTENT_TYPE_MULTIPART_FORM:
+                 break;
+
+
+            default:
+                *p_err = HTTPc_ERR_REQ_PARAM_CONTENT_TYPE_INVALID;
+                 goto exit;
+        }
+
+        if ((p_req->FormFieldNbr  > 0       ) &&
+            (p_req->FormFieldTbl == DEF_NULL)) {
+            *p_err = HTTPc_ERR_REQ_PARAM_FORM_FIELD_TBL_INVALID;
+             goto exit;
+        }
+#else
+       *p_err = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+#endif
+    }
+
+                                                                /* ---------------- VALIDATE CALLBACKS ---------------- */
+#ifdef HTTPc_TASK_MODULE_EN
+    no_block = DEF_BIT_IS_SET(p_req->Flags, HTTPc_FLAG_REQ_NO_BLOCK);
+    if (no_block == DEF_YES) {
+        if (p_req->OnTransComplete == DEF_NULL) {
+            *p_err = HTTPc_ERR_REQ_PARAM_TRANS_COMPLETE_CALLBACK_INVALID;
+             goto exit;
+        }
+        if (p_req->OnErr == DEF_NULL) {
+           *p_err = HTTPc_ERR_REQ_PARAM_ERR_CALLBACK_INVALID;
+            goto exit;
+        }
+    }
+#endif
+
+                                                                /* ------ VALIDATE HTTP HEADERS RELATED TO CONN ------- */
+                                                                /* HOST HEADER CASE.                                    */
+                                                                /* See Note #2.                                         */
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+    p_hdr = HTTPcReq_HdrSearch(p_conn,                          /* Search Host header in header list.                   */
+                               HTTP_HDR_FIELD_HOST);
+    if (p_hdr != DEF_NULL) {
+       *p_err = HTTPc_ERR_REQ_PARAM_HDR_UNAUTHORIZED;           /* See Note #1.                                         */
+        goto exit;
+    }
+#endif
+    DEF_BIT_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_HOST_ADD);
+
+                                                                /* WEBSOCKET CASE.                                      */
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    if (websocket == DEF_YES) {
+        p_hdr = HTTPcReq_HdrSearch(p_conn,                      /* Search Connection header in header list.             */
+                                   HTTP_HDR_FIELD_CONN);
+        if (p_hdr != DEF_NULL) {
+           *p_err = HTTPc_ERR_REQ_PARAM_HDR_UNAUTHORIZED;       /* See Note #1.                                         */
+            goto exit;
+        }
+        DEF_BIT_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_CONNECTION_ADD);
+        DEF_BIT_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_UPGRADE_ADD);
+        DEF_BIT_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_WEBSOCKET_ADD);
+    }
+#endif
+
+                                                                /* CONNECTION HEADER CASE.                              */
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    if ((persistent == DEF_NO) && (websocket == DEF_NO)) {
+#else
+    if (persistent == DEF_NO) {
+#endif
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+        p_hdr = HTTPcReq_HdrSearch(p_conn,                      /* Search Connection header in header list.             */
+                                   HTTP_HDR_FIELD_CONN);
+        if (p_hdr != DEF_NULL) {
+           *p_err = HTTPc_ERR_REQ_PARAM_HDR_UNAUTHORIZED;       /* See Note #1.                                         */
+            goto exit;
+        }
+#endif
+        DEF_BIT_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_CONNECTION_ADD);
+        DEF_BIT_SET(p_conn->Flags,   HTTPc_FLAG_CONN_TO_CLOSE);
+        p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_NO_PERSISTENT;
+    }
+
+                                                                /* ------ VALIDATE HTTP HEADERS RELATED TO BODY ------- */
+    if (body_present  == DEF_YES) {
+                                                                /* CONTENT-TYPE HEADER CASE.                            */
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+         p_hdr = HTTPcReq_HdrSearch(p_conn,                     /* Search Content-Type header in header list.           */
+                                    HTTP_HDR_FIELD_CONTENT_TYPE);
+         if (p_hdr != DEF_NULL) {
+            *p_err = HTTPc_ERR_REQ_PARAM_HDR_UNAUTHORIZED;      /* See Note #1.                                         */
+             goto exit;
+         }
+#endif
+
+         DEF_BIT_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_CONTENT_TYPE_ADD);
+
+                                                                /* TRANSFER-ENCODING HEADER CASE.                       */
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+         p_hdr = HTTPcReq_HdrSearch(p_conn,                     /* Search Transfer-Encoding header in header list.      */
+                                    HTTP_HDR_FIELD_TRANSFER_ENCODING);
+         if (p_hdr != DEF_NULL) {
+            *p_err = HTTPc_ERR_REQ_PARAM_HDR_UNAUTHORIZED;      /* See Note #1.                                         */
+             goto exit;
+         }
+#endif
+
+         if (chunk_en == DEF_YES) {
+             DEF_BIT_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_TRANSFER_ENCODE_ADD);
+         }
+
+                                                                /* CONTENT-LENGTH HEADER CASE.                          */
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+         p_hdr = HTTPcReq_HdrSearch(p_conn,                     /* Search Content-Length header in header list.         */
+                                    HTTP_HDR_FIELD_CONTENT_LEN);
+         if (p_hdr != DEF_NULL) {
+            *p_err = HTTPc_ERR_REQ_PARAM_HDR_UNAUTHORIZED;      /* See Note #1.                                         */
+             goto exit;
+         }
+#endif
+
+         if (p_req->ContentLen > 0u) {
+             DEF_BIT_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_CONTENT_LENGTH_ADD);
+         }
+
+
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+                                                                /* - CALCULATE FORM LENGTH FOR CONTENT-LENGTH HEADER -- */
+         if (form_present == DEF_YES) {
+
+              DEF_BIT_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_CONTENT_LENGTH_ADD);
+
+              switch (p_req->ContentType) {
+                  case HTTP_CONTENT_TYPE_APP_FORM:
+                       p_req->ContentLen = HTTPcReq_PrepareFormAppLen(p_conn, p_err);
+                       break;
+
+
+                  case HTTP_CONTENT_TYPE_MULTIPART_FORM:
+                       p_req->ContentLen = HTTPcReq_PrepareFormMultipartLen(p_conn, p_err);
+                       break;
+
+
+                  default:
+                     *p_err = HTTPc_ERR_REQ_PARAM_CONTENT_TYPE_INVALID;
+                      goto exit;
+              }
+
+              DEF_BIT_CLR(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_TRANSFER_ENCODE_ADD);
+         }
+#endif
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+ exit:
+     return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                              HTTPcReq()
+*
+* Description : (1) Send data to TCP-IP stack if data is ready to be sent.
+*               (2) State Machine for the Request processing:
+*                   (a) Prepare Request Line.
+*                   (b) Prepare Headers.
+*                   (c) Prepare Body.
+*
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               ------------ RETURNED BY HTTPcSock_ConnDataTx() ------------
+*                               See HTTPcSock_ConnDataTx() for additional return error codes.
+*
+*                               ------------ RETURNED BY HTTPcReq_Line() ------------
+*                               See HTTPcReq_Line() for additional return error codes.
+*
+*                               ------------ RETURNED BY HTTPcReq_Hdr() ------------
+*                               See HTTPcReq_Hdr() for additional return error codes.
+*
+*                               ------------ RETURNED BY HTTPcReq_Body() ------------
+*                               See HTTPcReq_Body() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask_Handler().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcReq (HTTPc_CONN  *p_conn,
+                       HTTPc_ERR   *p_err)
+{
+    CPU_BOOLEAN   process;
+    CPU_BOOLEAN   done;
+    CPU_BOOLEAN   sock_rdy_wr;
+    CPU_BOOLEAN   sock_rdy_err;
+
+
+    done    = DEF_NO;
+    process = DEF_YES;
+                                                                /* -------- PASS DATA TO SEND TO TCP-IP STACK --------- */
+    if (p_conn->TxDataLen > 0) {
+
+        sock_rdy_wr  = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPc_FLAG_SOCK_RDY_WR);
+        sock_rdy_err = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPc_FLAG_SOCK_RDY_ERR);
+
+        if((sock_rdy_wr  == DEF_YES) ||
+           (sock_rdy_err == DEF_YES)) {
+
+            process = HTTPcSock_ConnDataTx(p_conn, p_err);
+            switch (*p_err) {
+                case HTTPc_ERR_NONE:
+                case HTTPc_ERR_CONN_SOCK_TX:
+                     break;
+
+
+                default:
+                     goto exit;
+            }
+        }
+
+    }
+                                                                /* -------- PROCESS INCOMING REQUEST FROM APP --------- */
+    if (process == DEF_YES) {
+        switch (p_conn->State) {
+            case HTTPc_CONN_STATE_REQ_LINE_METHOD:
+            case HTTPc_CONN_STATE_REQ_LINE_URI:
+            case HTTPc_CONN_STATE_REQ_LINE_QUERY_STR:
+            case HTTPc_CONN_STATE_REQ_LINE_PROTO_VER:
+                 HTTPcReq_Line(p_conn, p_err);                   /* Prepare Request Line.                            */
+                 break;
+
+
+            case HTTPc_CONN_STATE_REQ_HDR_HOST:
+            case HTTPc_CONN_STATE_REQ_HDR_CONTENT_TYPE:
+            case HTTPc_CONN_STATE_REQ_HDR_CONTENT_LEN:
+            case HTTPc_CONN_STATE_REQ_HDR_TRANSFER_ENCODE:
+            case HTTPc_CONN_STATE_REQ_HDR_CONN:
+            case HTTPc_CONN_STATE_REQ_HDR_EXT:
+            case HTTPc_CONN_STATE_REQ_HDR_LAST:
+                 HTTPcReq_Hdr(p_conn, p_err);                   /* Prepare Request Headers.                         */
+                 break;
+
+
+            case HTTPc_CONN_STATE_REQ_BODY:
+            case HTTPc_CONN_STATE_REQ_BODY_DATA:
+            case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_SIZE:
+            case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_DATA:
+            case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_END:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_APP:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_DISPO:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_TYPE:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA_END:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY_END:
+                 HTTPcReq_Body(p_conn, p_err);                  /* Prepare Request Body.                            */
+                 break;
+
+
+            case HTTPc_CONN_STATE_REQ_END:
+                *p_err = HTTPc_ERR_NONE;
+                 if (p_conn->TxDataLen == 0u) {                 /* Validate Tx is completed before switch to Resp.  */
+                     done          = DEF_YES;
+                     p_conn->State = HTTPc_CONN_STATE_RESP_INIT;
+                 }
+                 break;
+
+
+            default:
+                *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+                 break;
+        }
+    }
+
+
+exit:
+    return (done);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcReq_HdrCopyToBuf()
+*
+* Description : Construct and Copy HTTP header to HTTP buffer.
+*
+* Argument(s) : p_buf       Pointer to HTTP buffer.
+*
+*               buf_len     Length remaining in HTTP buffer.
+*
+*               hdr_type    HTTP header type.
+*
+*               p_val       Pointer to HTTP header value.
+*
+*               val_len     HTTP header value length.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Header copy to buffer successfully.
+*                               HTTPc_ERR_REQ_HDR_INVALID       Header field type not found in dictionary.
+*                               HTTPc_ERR_REQ_HDR_CREATE        Fatal error while creating header.
+*                               HTTPc_ERR_TRANS_BUF_LEN_INVALID HTTP buffer length is not enough big.
+*                               HTTPc_ERR_TRANS_TX_BUF_FULL     HTTP buffer is full, data must be Tx.
+*
+* Return(s)   : Pointer to location in HTTP buffer after data written.
+*
+* Caller(s)   : HTTPcReq_Hdr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *HTTPcReq_HdrCopyToBuf (       CPU_CHAR        *p_buf,
+                                         CPU_INT16U       buf_len,
+                                         CPU_SIZE_T       buf_len_rem,
+                                         HTTP_HDR_FIELD   hdr_type,
+                                  const  CPU_CHAR        *p_val,
+                                         CPU_SIZE_T       val_len,
+                                         CPU_BOOLEAN      add_CRLF,
+                                         HTTPc_ERR       *p_err)
+{
+    HTTP_DICT   *p_entry;
+    CPU_CHAR    *p_str;
+    CPU_SIZE_T   len_need;
+
+
+    p_str   = p_buf;
+
+                                                                /* Find Header type in dictionary.                      */
+    p_entry = HTTP_Dict_EntryGet(HTTP_Dict_HdrField,
+                                 HTTP_Dict_HdrFieldSize,
+                                 hdr_type);
+    if (p_entry == DEF_NULL) {
+        p_str = DEF_NULL;
+       *p_err = HTTPc_ERR_REQ_HDR_INVALID;
+        goto exit;
+    }
+
+    len_need = p_entry->StrLen + val_len + 2;                   /* Calculate length needed for header.                  */
+    if (add_CRLF == DEF_YES) {
+        len_need += STR_CR_LF_LEN;
+    }
+
+    if (len_need > buf_len) {                                   /* Total len of hdr must be smaller than HTTP buf size. */
+        p_str = DEF_NULL;
+       *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+        goto exit;
+    }
+
+    if (len_need > buf_len_rem) {                               /* Missing space in HTTP buf. Data must be Tx.          */
+        p_str = DEF_NULL;
+       *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+        goto exit;
+    }
+                                                                /* Copy Header Type to buffer.                          */
+    p_str = Str_Copy_N(p_str, p_entry->StrPtr, p_entry->StrLen);
+    if (p_str == DEF_NULL) {
+       *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+        goto exit;
+    }
+
+    p_str += p_entry->StrLen;
+
+   *p_str = ASCII_CHAR_COLON;                                   /* Copy ":" character to buffer.                        */
+    p_str++;
+   *p_str = ASCII_CHAR_SPACE;                                   /* Copy space character to buffer.                      */
+    p_str++;
+
+    p_str = Str_Copy_N(p_str, p_val, val_len);                  /* Copy header value to buffer.                         */
+    if (p_str == DEF_NULL) {
+       *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+        goto exit;
+    }
+
+    p_str += val_len;
+
+    if (add_CRLF == DEF_YES) {
+                                                                /* Copy end of line CRLN characters to buffer.          */
+        p_str = Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+        if (p_str == DEF_NULL) {
+           *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+            goto exit;
+        }
+
+        p_str += STR_CR_LF_LEN;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return (p_str);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcReq_PrepareFormAppLen()
+*
+* Description : Calculate length of Application form by parsing form table passed by application.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE  Form size successfully calculate.
+*
+* Return(s)   : Length of the application form.
+*               Length 0 in case of error.
+*
+* Caller(s)   : HTTPcReq_Prepare().
+*
+* Note(s)     : (1) In case form table is passed by application and Chunked Transfer is disabled, length
+*                   of form must be calculate to put inside Content-Length header.
+*
+*               (2) Application type Form must be URL-Encode.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_SIZE_T  HTTPcReq_PrepareFormAppLen (HTTPc_CONN  *p_conn,
+                                                HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ             *p_req;
+    HTTPc_FORM_TBL_FIELD  *p_form_tbl;
+    HTTPc_FORM_TBL_FIELD  *p_tbl_entry;
+    HTTPc_KEY_VAL             *p_kvp;
+    CPU_SIZE_T             total_len;
+    CPU_INT16U             char_encode_nbr;
+    CPU_INT16U             i;
+
+
+    p_req = p_conn->ReqListHeadPtr;
+
+    p_form_tbl   = (HTTPc_FORM_TBL_FIELD *)p_req->FormFieldTbl;
+    total_len    = 0;
+
+                                                                /* ----------- PARSE APPLICATION FORM TABLE ----------- */
+    for (i = 0; i < p_req->FormFieldNbr; i++) {
+
+        p_tbl_entry  = &p_form_tbl[i];
+
+        switch (p_tbl_entry->Type) {
+            case HTTPc_FORM_FIELD_TYPE_KEY_VAL:
+                 break;
+
+
+            case HTTPc_FORM_FIELD_TYPE_KEY_VAL_EXT:
+            case HTTPc_FORM_FIELD_TYPE_FILE:
+            default:
+                 total_len = 0;
+                *p_err     = HTTPc_ERR_FORM_TYPE_INVALID;
+                 goto exit;
+        }
+
+        p_kvp = (HTTPc_KEY_VAL *)p_tbl_entry->FieldObjPtr;
+
+        char_encode_nbr = HTTP_URL_CharEncodeNbr(p_kvp->KeyPtr, p_kvp->KeyLen);
+
+        total_len += (p_kvp->KeyLen + char_encode_nbr*HTTP_URL_ENCODING_JUMP);
+
+        char_encode_nbr = HTTP_URL_CharEncodeNbr(p_kvp->ValPtr, p_kvp->ValLen);
+
+        total_len += (p_kvp->ValLen + char_encode_nbr*HTTP_URL_ENCODING_JUMP);
+
+    }
+
+    total_len += 2*p_req->FormFieldNbr - 1;                     /* Add length of all "=" and "&" char to include ... */
+                                                                /* ... in the form.                                     */
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return (total_len);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPcReq_PrepareFormMultipartLen()
+*
+* Description : Calculate length of Multipart form by parsing form table passed by application.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE  Form size successfully calculate.
+*
+* Return(s)   : Length of the application form.
+*               Length 0 in case of error.
+*
+* Caller(s)   : HTTPcReq_Prepare().
+*
+* Note(s)     : (1) In case form table is passed by application and Chunked Transfer is disabled, length
+*                   of form must be calculate to put inside Content-Length header.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_SIZE_T  HTTPcReq_PrepareFormMultipartLen (HTTPc_CONN  *p_conn,
+                                                      HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ             *p_req;
+    HTTPc_FORM_TBL_FIELD  *p_form_tbl;
+    HTTPc_FORM_TBL_FIELD  *p_tbl_entry;
+    HTTPc_KEY_VAL         *p_kvp;
+    HTTPc_KEY_VAL_EXT     *p_kvp_big;
+    HTTPc_MULTIPART_FILE  *p_multipart_file;
+    HTTP_DICT             *p_entry;
+    CPU_SIZE_T             total_len;
+    CPU_INT16U             char_encode_nbr;
+    CPU_INT16U             i;
+
+
+    p_req = p_conn->ReqListHeadPtr;
+
+    p_form_tbl   = p_req->FormFieldTbl;
+
+    total_len    =  0;
+
+    for (i = 0; i < p_req->FormFieldNbr; i++) {
+
+        p_tbl_entry = &p_form_tbl[i];
+
+                                                                /* ----------- ADD LENGTH OF START BOUNDARY ----------- */
+        total_len += HTTPc_STR_BOUNDARY_START_LEN + STR_CR_LF_LEN;
+
+                                                                /* ------ ADD LENGTH OF CONTENT-DISPOSITION HDR ------- */
+        total_len += HTTP_STR_HDR_FIELD_CONTENT_DISPOSITION_LEN +
+                     2 +
+                     HTTP_STR_CONTENT_DISPOSITION_FORM_DATA_LEN +
+                     2 +
+                     HTTP_STR_MULTIPART_FIELD_NAME_LEN +
+                     3 +
+                     STR_CR_LF_LEN;
+
+        switch (p_tbl_entry->Type) {
+            case HTTPc_FORM_FIELD_TYPE_KEY_VAL:
+                 p_kvp            = (HTTPc_KEY_VAL *)p_tbl_entry->FieldObjPtr;
+                                                                /* Add length of Name field.                            */
+                 char_encode_nbr  = HTTP_URL_CharEncodeNbr(p_kvp->KeyPtr, p_kvp->KeyLen);
+                 total_len       += (p_kvp->KeyLen + char_encode_nbr*HTTP_URL_ENCODING_JUMP);
+                                                                /* Add length of data.                                  */
+                 total_len       += p_kvp->ValLen + 2*STR_CR_LF_LEN;
+                 break;
+
+
+            case HTTPc_FORM_FIELD_TYPE_KEY_VAL_EXT:
+                 p_kvp_big        = (HTTPc_KEY_VAL_EXT *)p_tbl_entry->FieldObjPtr;
+                                                                /* Add length of Name field.                            */
+                 char_encode_nbr  = HTTP_URL_CharEncodeNbr(p_kvp_big->KeyPtr, p_kvp_big->KeyLen);
+                 total_len       += (p_kvp_big->KeyLen + char_encode_nbr*HTTP_URL_ENCODING_JUMP);
+                                                                /* Add length of data.                                  */
+                 total_len       += p_kvp_big->ValLen + 2*STR_CR_LF_LEN;
+                 break;
+
+
+            case HTTPc_FORM_FIELD_TYPE_FILE:
+                 p_multipart_file = (HTTPc_MULTIPART_FILE *)p_tbl_entry->FieldObjPtr;
+                                                                /* Add length of Name field.                            */
+                 char_encode_nbr  = HTTP_URL_CharEncodeNbr(p_multipart_file->NamePtr, p_multipart_file->NameLen);
+                 total_len       += (p_multipart_file->NameLen + char_encode_nbr*HTTP_URL_ENCODING_JUMP);
+                                                                /* Add length of File Name field.                       */
+                 char_encode_nbr  = HTTP_URL_CharEncodeNbr(p_multipart_file->FileNamePtr, p_multipart_file->FileNameLen);
+                 total_len       += (p_multipart_file->FileNameLen + char_encode_nbr*HTTP_URL_ENCODING_JUMP);
+                 total_len       += 2 + HTTP_STR_MULTIPART_FIELD_FILE_NAME_LEN + 3;
+                                                                /* Add length of Content-Type Header.                   */
+                 p_entry = HTTP_Dict_EntryGet(HTTP_Dict_ContentType,
+                                              HTTP_Dict_ContentTypeSize,
+                                              p_multipart_file->ContentType);
+                 if (p_entry != DEF_NULL) {
+                     total_len   += HTTP_STR_HDR_FIELD_CONTENT_TYPE_LEN +
+                                    2 +
+                                    p_entry->StrLen +
+                                    STR_CR_LF_LEN;
+                 }
+                                                                /* Add length of data.                                  */
+                 total_len       += p_multipart_file->FileLen + 2*STR_CR_LF_LEN;
+                 break;
+
+
+            default:
+                 total_len = 0;
+                *p_err     = HTTPc_ERR_FORM_TYPE_INVALID;
+                 goto exit;
+        }
+
+    }
+
+                                                                /* ------------ ADD LENGTH OF END BOUNDARY ------------ */
+    total_len += HTTPc_STR_BOUNDARY_END_LEN + STR_CR_LF_LEN;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return (total_len);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPcReq_Line()
+*
+* Description : (1) Prepare and Copy HTTP Request line to HTTP Tx buffer.
+*               (2) An HTTP line consist of :
+*                   (a) Method
+*                   (b) URI
+*                   (c) Query String
+*                   (d) Protocol Version
+*
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Req State successfully processed.
+*                               HTTPc_ERR_REQ_LINE_CREATE       Fatal error in the Req Line process.
+*                               HTTPc_ERR_TRANS_BUF_LEN_INVALID HTTP buffer length is not enough big.
+*                               HTTPc_ERR_TRANS_TX_BUF_FULL     HTTP buffer is full, data must be Tx.
+*
+*                               ------------ RETURNED BY HTTPcReq_QueryStrTbl() ------------
+*                               See HTTPcReq_QueryStrTbl() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcReq().
+*
+* Note(s)     : (3) HTTP Line parameters previously validate in API function HTTPc_SetReqLineParam().
+*
+*               (4) The Request line processing is design as a state machine with 4 different states:
+*                       HTTPc_CONN_STATE_REQ_LINE_METHOD
+*                       HTTPc_CONN_STATE_REQ_LINE_URI
+*                       HTTPc_CONN_STATE_REQ_LINE_QUERY_STR
+*                       HTTPc_CONN_STATE_REQ_LINE_PROTO_VER
+*
+*               (5) The data length of each state MUST be smaller than the configured HTTPc buffer length.
+*                   Else the process is aborted and the err code HTTPc_ERR_TRANS_BUF_LEN_INVALID is returned.
+*                   The buffer length MUST be reconfigured and increased.
+*                   Exception for the URI, see Note #7.
+*                   Exception for the Query String, see Note #8.
+*
+*               (6) The function will not return until all the request line has been copied to the HTTP
+*                   buffer or if the buffer is full before the end of the line processing. In that case,
+*                   the state is saved and the function will exit to allow the data to be transmit.
+*                   Next time around the process will resume at the saved state.
+*
+*               (7) The URI can be bigger than the HTTP buffer length. In that case, the URI is not copied
+*                   into the HTTP buffer, the pointer to the URI will be passed directly to the TCPI-IP
+*                   stack.
+*
+*               (8) See Note #1 of function HTTPcReq_QueryStrTbl() and HTTPcReq_QueryStrHook().
+*********************************************************************************************************
+*/
+
+static  void  HTTPcReq_Line (HTTPc_CONN  *p_conn,
+                             HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ   *p_req;
+    HTTP_DICT   *p_entry;
+    CPU_CHAR    *p_buf;
+    CPU_CHAR    *p_buf_wr_start;
+    CPU_CHAR    *p_buf_wr_end;
+    CPU_SIZE_T   buf_len;
+    CPU_SIZE_T   str_len;
+
+
+    p_req = p_conn->ReqListHeadPtr;
+
+    p_buf          = p_conn->TxBufPtr + p_conn->TxDataLen;
+    buf_len        = p_conn->BufLen   - p_conn->TxDataLen;
+    p_buf_wr_start = p_buf;
+    p_buf_wr_end   = p_buf;
+
+    switch (p_conn->State) {
+        case HTTPc_CONN_STATE_REQ_LINE_METHOD:
+                                                                /* -------------- PREPARE REQ LINE METHOD-------------- */
+                                                                /* Find Method in HTTP dictionary.                      */
+             p_entry = HTTP_Dict_EntryGet(HTTP_Dict_ReqMethod,
+                                          HTTP_Dict_ReqMethodSize,
+                                          p_req->Method);
+             if (p_entry == DEF_NULL) {
+                *p_err = HTTPc_ERR_REQ_LINE_CREATE;             /* Should not occur. See note #1.                       */
+                 goto exit;
+             }
+
+             str_len = p_entry->StrLen + 1;                     /* Length of method + length of space char.             */
+
+             if (str_len > p_conn->BufLen) {
+                *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;       /* Should not occur.                                    */
+                 goto exit;
+             }
+
+             if (str_len > buf_len) {                           /* HTTP buf space not enough, return to Tx data.        */
+                 p_conn->TxDataLen += (p_buf_wr_start - p_buf);
+                 p_conn->TxDataPtr  =  p_conn->TxBufPtr;
+                 p_conn->State      =  HTTPc_CONN_STATE_REQ_LINE_METHOD;
+                *p_err              =  HTTPc_ERR_TRANS_TX_BUF_FULL;
+                 goto exit;
+             }
+                                                                /* Write Request method to buffer.                      */
+             p_buf_wr_end = Str_Copy_N(p_buf_wr_start, p_entry->StrPtr, p_entry->StrLen);
+             if (p_buf_wr_end == DEF_NULL) {
+                *p_err = HTTPc_ERR_REQ_LINE_CREATE;
+                 goto exit;
+             }
+             p_buf_wr_end += p_entry->StrLen;
+
+            *p_buf_wr_end  = ASCII_CHAR_SPACE;                  /* Write space character to buffer.                     */
+             p_buf_wr_end++;
+
+             buf_len       -= (p_buf_wr_end - p_buf_wr_start);  /* Update buffer length remaining.                      */
+             p_buf_wr_start =  p_buf_wr_end;
+                                                                /* 'break' intentionally omitted.                       */
+
+
+        case HTTPc_CONN_STATE_REQ_LINE_URI:
+                                                                /* --------------- PREPARE REQ LINE URI---------------- */
+             str_len = Str_Len_N(p_req->ResourcePathPtr, p_req->ResourcePathLen);
+
+             if (str_len <= buf_len) {
+                                                                 /* IF HTTP buf space is enough, copy Resource path.   */
+                 p_buf_wr_end = Str_Copy_N(p_buf_wr_start, p_req->ResourcePathPtr, str_len);
+                 if (p_buf_wr_end == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_LINE_CREATE;
+                     goto exit;
+                 }
+                 p_buf_wr_end  += str_len;
+
+                 buf_len       -= (p_buf_wr_end - p_buf_wr_start); /* Update buffer length remaining.                   */
+                 p_buf_wr_start =  p_buf_wr_end;
+
+             } else {                                           /* ELSE (buffer space is not enough) ...                */
+                 switch (p_conn->State) {
+                     case HTTPc_CONN_STATE_REQ_LINE_METHOD:     /* Start by exit function to allow remaining data in ...*/
+                                                                /* ... buffer to be transmit.                           */
+                          p_conn->TxDataLen += (p_buf_wr_end - p_buf);
+                          p_conn->TxDataPtr  = p_conn->TxBufPtr;
+                          p_conn->State      = HTTPc_CONN_STATE_REQ_LINE_URI;
+                          break;
+
+
+                     case HTTPc_CONN_STATE_REQ_LINE_URI:        /* Second time around, set TxDataPtr to point to ...    */
+                                                                /* ... Resource Path ptr.                               */
+                          p_conn->TxDataLen = str_len;
+                          p_conn->TxDataPtr = p_req->ResourcePathPtr;
+                          p_conn->State     = HTTPc_CONN_STATE_REQ_LINE_QUERY_STR;
+                          break;
+
+
+                     default:
+                         *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+                          goto exit;
+                 }
+                 break;                                         /* break from upper HTTPc_CONN_STATE_REQ_LINE_URI case. */
+             }
+                                                                /* 'break' intentionally omitted.                       */
+
+
+        case HTTPc_CONN_STATE_REQ_LINE_QUERY_STR:
+            *p_err = HTTPc_ERR_NONE;
+                                                                /* ---------- PREPARE REQ LINE QUERY STRINGS ---------- */
+#if (HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED)
+             if (p_req->QueryStrTbl  != DEF_NULL) {
+                                                                /* Write String Query to buffer.                        */
+                 p_buf_wr_end = HTTPcReq_QueryStrTbl(p_conn,
+                                                     p_buf_wr_start,
+                                                     buf_len,
+                                                     p_err);
+             }
+             if (p_req->OnQueryStrTx != DEF_NULL) {
+                                                                /* Write String Query to buffer.                        */
+                 p_buf_wr_end = HTTPcReq_QueryStrHook(p_conn,
+                                                      p_buf_wr_start,
+                                                      buf_len,
+                                                      p_err);
+             }
+             switch (*p_err) {
+                 case HTTPc_ERR_NONE:                           /* All the Query Strings were copied to the HTTP buf.   */
+                      buf_len        -= (p_buf_wr_end - p_buf_wr_start);
+                      p_buf_wr_start  =  p_buf_wr_end;
+                      break;
+
+
+                 case HTTPc_ERR_TRANS_TX_BUF_FULL:              /* HTTP buf full before all Queries were copied.        */
+                      p_conn->TxDataLen += (p_buf_wr_end - p_buf);
+                      p_conn->TxDataPtr  =  p_conn->TxBufPtr;
+                      p_conn->State      =  HTTPc_CONN_STATE_REQ_LINE_QUERY_STR;
+                      goto exit;
+
+
+                 default:
+                      p_conn->TxDataLen = 0;
+                      goto exit;
+             }
+
+#endif
+             p_conn->TxDataPtr = p_conn->TxBufPtr;              /* Reset TxDataPtr to point to the HTTP buffer.         */
+                                                                /* 'break' intentionally omitted.                       */
+
+
+        case HTTPc_CONN_STATE_REQ_LINE_PROTO_VER:
+                                                                /* -------- PREPARE REQ LINE PROTOCOL VERSION --------- */
+                                                                /* Find HTTP version in dictionary.                     */
+             p_entry = HTTP_Dict_EntryGet(HTTP_Dict_ProtocolVer,
+                                          HTTP_Dict_ProtocolVerSize,
+                                          HTTP_PROTOCOL_VER_1_1);
+             if (p_entry == DEF_NULL) {
+                *p_err = HTTPc_ERR_REQ_LINE_CREATE;             /* Should not occur. See note #1.                       */
+                 goto exit;
+             }
+
+             str_len = p_entry->StrLen + 1 + STR_CR_LF_LEN;     /* total len = len of version + len of space +          */
+                                                                /*             len of end of line.                      */
+
+             if (str_len > p_conn->BufLen) {
+                *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;       /* See Note #5.                                         */
+                 goto exit;
+             }
+
+             if (str_len > buf_len) {                           /* HTTP Buf space remaining not enough.                 */
+                 p_conn->TxDataLen += (p_buf_wr_start - p_buf);
+                 p_conn->TxDataPtr  =  p_conn->TxBufPtr;
+                 p_conn->State      =  HTTPc_CONN_STATE_REQ_LINE_PROTO_VER;
+                *p_err              =  HTTPc_ERR_TRANS_TX_BUF_FULL;
+                 goto exit;
+             }
+
+            *p_buf_wr_end = ASCII_CHAR_SPACE;                   /* Copy Space character.                                */
+             p_buf_wr_end++;
+
+                                                                /* Copy HTTP Protocol version.                          */
+             p_buf_wr_end = Str_Copy_N(p_buf_wr_end, p_entry->StrPtr, p_entry->StrLen);
+             if (p_buf_wr_end == DEF_NULL) {
+                *p_err = HTTPc_ERR_REQ_LINE_CREATE;
+                 goto exit;
+             }
+             p_buf_wr_end += p_entry->StrLen;
+
+                                                                /* Copy end of line CRLF.                               */
+             p_buf_wr_end = Str_Copy_N(p_buf_wr_end, STR_CR_LF, buf_len);
+             if (p_buf_wr_end == DEF_NULL) {
+                *p_err = HTTPc_ERR_REQ_LINE_CREATE;
+                 goto exit;
+             }
+             p_buf_wr_end  += STR_CR_LF_LEN;
+
+             p_conn->TxDataLen = (p_buf_wr_end - p_buf);        /* Update data length to transmit.                      */
+             p_conn->TxDataPtr = p_conn->TxBufPtr;
+             p_conn->State     = HTTPc_CONN_STATE_REQ_HDR_HOST; /* Set next state to prepare request headers.           */
+             break;
+
+
+        default:
+            *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+             goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcReq_QueryStrTbl()
+*
+* Description : Parse Query String table and prepare the query string to be transmitted.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc connection.
+*
+*               p_buf           Pointer to where the data must be copied in the HTTP buffer.
+*
+*               buf_len_rem     Buffer length remaining.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  All query strings prepared and copied to buf.
+*                               HTTPc_ERR_TRANS_BUF_LEN_INVALID HTTP buffer length is not enough big.
+*                               HTTPc_ERR_TRANS_TX_BUF_FULL     HTTP buffer is full, data must be Tx.
+*                               HTTPc_ERR_REQ_QUERY_STR_CREATE  Fatal error occurred in query preparation.
+*
+* Return(s)   : Pointer to location after the end of the data written.
+*
+* Caller(s)   : HTTPcReq_Line().
+*
+* Note(s)     : (1) Since the Query Strings are passed by the App in the form of a table, the process will
+*                   copy as much as queries possible to the HTTP buffer before returning. If not all the
+*                   queries fit inside the buffer, the index of the table will be saved and the function
+*                   will exit to allow transmission of data. Next time around the process will resume
+*                   at the saved index.
+*
+*               (2) Note that each Query (Key-Value Pair) MUST individually fit inside the HTTP buffer
+*                   since a query is not divisible.
+*********************************************************************************************************
+*/
+#if HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED
+static  CPU_CHAR  *HTTPcReq_QueryStrTbl (HTTPc_CONN  *p_conn,
+                                         CPU_CHAR    *p_buf,
+                                         CPU_INT16U   buf_len_rem,
+                                         HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ      *p_req;
+    HTTPc_KEY_VAL      *p_kvp;
+    CPU_CHAR       *p_buf_wr;
+    CPU_SIZE_T      str_len_key;
+    CPU_SIZE_T      str_len_val;
+    CPU_SIZE_T      space_req;
+    CPU_BOOLEAN     first;
+    CPU_BOOLEAN     url_encode;
+    CPU_INT16U      encode_nbr;
+    CPU_INT08U      i;
+
+
+    p_req = p_conn->ReqListHeadPtr;
+                                                                /* ------------- PARSE QUERY STRING TABLE ------------- */
+    p_buf_wr =  p_buf;
+    p_kvp    = &p_req->QueryStrTbl[0];
+    first    =  DEF_BIT_IS_CLR(p_conn->ReqFlags, HTTPc_FLAG_REQ_LINE_QUERY_STR_BEGIN);
+
+    for (i = p_conn->ReqQueryStrTxIx; i < p_req->QueryStrNbr; i++) {
+
+        if (first == DEF_YES) {                                 /* Query String start with a ? after the URI.           */
+           *p_buf_wr = ASCII_CHAR_QUESTION_MARK;
+            p_buf_wr++;
+            buf_len_rem--;
+            DEF_BIT_SET(p_conn->ReqFlags, HTTPc_FLAG_REQ_LINE_QUERY_STR_BEGIN);
+            first = DEF_NO;
+        }
+
+                                                                /* Calculate total length required by one key-val pair. */
+        space_req   = 0;
+        str_len_key = Str_Len_N(p_kvp->KeyPtr, p_kvp->KeyLen);
+        encode_nbr  = HTTP_URL_CharEncodeNbr(p_kvp->KeyPtr, str_len_key);
+        space_req  += (str_len_key + encode_nbr*HTTP_URL_ENCODING_JUMP);
+
+        if (p_kvp->ValPtr != DEF_NULL) {
+            str_len_val = Str_Len_N(p_kvp->ValPtr, p_kvp->ValLen);
+            encode_nbr  = HTTP_URL_CharEncodeNbr(p_kvp->ValPtr, str_len_val);
+            space_req  += (str_len_val + encode_nbr*HTTP_URL_ENCODING_JUMP);
+
+            space_req  += 1;                                    /* Add length of "=" character.                         */
+        }
+
+        space_req  += 1;                                        /* Add length of "&" character.                         */
+
+
+        if (space_req > p_conn->BufLen) {                       /* Return error if HTTP buf is to small for 1 pair.     */
+           *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+            goto exit;
+        }
+
+        if (space_req > buf_len_rem) {                          /* HTTP buf remaining space not enough.                 */
+            p_conn->ReqQueryStrTxIx = i;                        /* Save table index to resume at right place.           */
+           *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+            goto exit;                                          /* Exit to allow data to be transmitted.                */
+        }
+
+        url_encode = HTTP_URL_EncodeStr(p_kvp->KeyPtr,          /* URL-encode and copy the query key.                   */
+                                        p_buf_wr,
+                                       &str_len_key,
+                                        buf_len_rem);
+        if (url_encode == DEF_FAIL) {
+            p_buf_wr = p_buf;
+           *p_err    = HTTPc_ERR_REQ_QUERY_STR_CREATE;
+            goto exit;
+        }
+
+        p_buf_wr     += str_len_key;
+        buf_len_rem  -= str_len_key;
+
+        if (p_kvp->ValPtr != DEF_NULL) {
+           *p_buf_wr = ASCII_CHAR_EQUALS_SIGN;                  /* Copy "=" character between key and value.            */
+            p_buf_wr++;
+            buf_len_rem--;
+
+            url_encode = HTTP_URL_EncodeStr(p_kvp->ValPtr,      /* URL-encode and copy the query value.                 */
+                                            p_buf_wr,
+                                           &str_len_val,
+                                            buf_len_rem);
+            if (url_encode == DEF_FAIL) {
+                p_buf_wr = p_buf;
+               *p_err    = HTTPc_ERR_REQ_QUERY_STR_CREATE;
+                goto exit;
+            }
+
+            p_buf_wr += str_len_val;
+            buf_len_rem  -= str_len_val;
+        }
+
+        if (i < (p_req->QueryStrNbr - 1)) {
+           *p_buf_wr = ASCII_CHAR_AMPERSAND;                    /* Copy "&" character if query pair is not the last.    */
+            p_buf_wr++;
+            buf_len_rem--;
+        } else {
+            p_conn->ReqQueryStrTxIx = 0u;
+        }
+
+        p_buf = p_buf_wr;
+
+        p_kvp++;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return (p_buf_wr);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcReq_QueryStrHook()
+*
+* Description : (1) Call hook function to recover each part of the query string.
+*               (2) Prepare the query string to be transmitted.
+*
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection object.
+*
+*               p_buf           Pointer to where the data must be copied in the HTTP buffer.
+*
+*               buf_len_rem     Buffer length remaining.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  All query strings prepared and copied to buf.
+*                               HTTPc_ERR_TRANS_BUF_LEN_INVALID HTTP buffer length is not enough big.
+*                               HTTPc_ERR_TRANS_TX_BUF_FULL     HTTP buffer is full, data must be Tx.
+*                               HTTPc_ERR_REQ_QUERY_STR_CREATE  Fatal error occurred in query preparation.
+*
+* Return(s)   : Pointer to location after the end of the data written.
+*
+* Caller(s)   : HTTPcReq_Line().
+*
+* Note(s)     : (1) Since the Query Strings are passed by the App hook function, the process will
+*                   copy as much as queries possible to the HTTP buffer before returning. If not all the
+*                   queries fit inside the buffer, a pointer to the last key-value pair will be saved and
+*                   the function will exit to allow transmission of data. Next time around the process will resume
+*                   at the saved pointer before calling the hook.
+*
+*               (2) Note that each Query (Key-Value Pair) MUST individually fit inside the HTTP buffer
+*                   since a query is not divisible.
+*********************************************************************************************************
+*/
+#if HTTPc_CFG_QUERY_STR_EN == DEF_ENABLED
+static  CPU_CHAR  *HTTPcReq_QueryStrHook (HTTPc_CONN  *p_conn,
+                                          CPU_CHAR    *p_buf,
+                                          CPU_INT16U   buf_len_rem,
+                                          HTTPc_ERR   *p_err)
+{
+    HTTPc_CONN_OBJ    *p_conn_const;
+    HTTPc_REQ         *p_req;
+    HTTPc_REQ_OBJ     *p_req_const;
+    HTTPc_KEY_VAL     *p_kvp;
+    CPU_CHAR          *p_buf_wr;
+    CPU_SIZE_T         str_len_key;
+    CPU_SIZE_T         str_len_val;
+    CPU_SIZE_T         space_req;
+    CPU_BOOLEAN        first;
+    CPU_BOOLEAN        done;
+    CPU_BOOLEAN        url_encode;
+    CPU_INT16U         encode_nbr;
+
+
+    p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+
+    p_req        = p_conn->ReqListHeadPtr;
+    p_req_const  = (HTTPc_REQ_OBJ *)p_req;
+
+    p_buf_wr = p_buf;
+    done     = DEF_NO;
+    first    = DEF_BIT_IS_CLR(p_conn->ReqFlags, HTTPc_FLAG_REQ_LINE_QUERY_STR_BEGIN);
+
+    while (done == DEF_NO) {
+
+        if (p_conn->ReqQueryStrTempPtr != DEF_NULL) {
+            p_kvp = p_conn->ReqQueryStrTempPtr;
+            done  = DEF_BIT_IS_SET(p_conn->ReqFlags, HTTPc_FLAG_REQ_LINE_QUERY_STR_DONE);
+            p_conn->ReqQueryStrTempPtr = DEF_NULL;
+        } else {
+            done = p_req->OnQueryStrTx(p_conn_const, p_req_const, &p_kvp);
+            if (p_kvp == DEF_NULL) {
+               *p_err = HTTPc_ERR_REQ_QUERY_STR_INVALID;
+                goto exit;
+            }
+        }
+
+        if (first == DEF_YES) {                                 /* Query String start with a ? after the URI.           */
+           *p_buf_wr = ASCII_CHAR_QUESTION_MARK;
+            p_buf_wr++;
+            buf_len_rem--;
+            DEF_BIT_SET(p_conn->ReqFlags, HTTPc_FLAG_REQ_LINE_QUERY_STR_BEGIN);
+            first = DEF_NO;
+        }
+
+                                                                /* Calculate total length required by one key-val pair. */
+        space_req   = 0;
+        str_len_key = Str_Len_N(p_kvp->KeyPtr, p_kvp->KeyLen);
+        encode_nbr  = HTTP_URL_CharEncodeNbr(p_kvp->KeyPtr, str_len_key);
+        space_req  += (str_len_key + encode_nbr*HTTP_URL_ENCODING_JUMP);
+
+        if (p_kvp->ValPtr != DEF_NULL) {
+            str_len_val = Str_Len_N(p_kvp->ValPtr, p_kvp->ValLen);
+            encode_nbr  = HTTP_URL_CharEncodeNbr(p_kvp->ValPtr, str_len_val);
+            space_req  += (str_len_val + encode_nbr*HTTP_URL_ENCODING_JUMP);
+
+            space_req  += 1;                                    /* Add length of "=" character.                         */
+        }
+
+        space_req  += 1;                                        /* Add length of "&" character.                         */
+
+        if (space_req > p_conn->BufLen) {                       /* Return error if HTTP buf is to small for 1 pair.     */
+           *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+            goto exit;
+        }
+
+        if (space_req > buf_len_rem) {                          /* HTTP buf remaining space not enough.                 */
+            p_conn->ReqQueryStrTempPtr = p_kvp;
+            if (done == DEF_YES) {
+                DEF_BIT_SET(p_conn->ReqFlags, HTTPc_FLAG_REQ_LINE_QUERY_STR_DONE);
+            }
+           *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+            goto exit;                                          /* Exit to allow data to be transmitted.                */
+        }
+
+        url_encode = HTTP_URL_EncodeStr(p_kvp->KeyPtr,          /* URL-encode and copy the query key.                   */
+                                        p_buf_wr,
+                                       &str_len_key,
+                                        buf_len_rem);
+        if (url_encode == DEF_FAIL) {
+            p_buf_wr = p_buf;
+           *p_err    = HTTPc_ERR_REQ_QUERY_STR_CREATE;
+            goto exit;
+        }
+
+        p_buf_wr     += str_len_key;
+        buf_len_rem  -= str_len_key;
+
+        if (p_kvp->ValPtr != DEF_NULL) {
+           *p_buf_wr = ASCII_CHAR_EQUALS_SIGN;                  /* Copy "=" character between key and value.            */
+            p_buf_wr++;
+            buf_len_rem--;
+
+            url_encode = HTTP_URL_EncodeStr(p_kvp->ValPtr,      /* URL-encode and copy the query value.                 */
+                                            p_buf_wr,
+                                           &str_len_val,
+                                            buf_len_rem);
+            if (url_encode == DEF_FAIL) {
+                p_buf_wr = p_buf;
+               *p_err    = HTTPc_ERR_REQ_QUERY_STR_CREATE;
+                goto exit;
+            }
+
+            p_buf_wr     += str_len_val;
+            buf_len_rem  -= str_len_val;
+        }
+
+        if (done == DEF_NO) {
+           *p_buf_wr = ASCII_CHAR_AMPERSAND;                    /* Copy "&" character if query pair is not the last.    */
+            p_buf_wr++;
+            buf_len_rem--;
+        }
+
+        p_buf = p_buf_wr;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+ exit:
+     return (p_buf_wr);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            HTTPcReq_Hdr()
+*
+* Description : (1) Prepare and Copy HTTP Request Headers to HTTP Tx buffer.
+*
+*                   (a) Host, Connection, Content-Type, Content-Length and Transfer-Encoding headers
+*                       are processed by the HTTPc core.
+*
+*                   (b) Extra Headers table given by application is parse to add headers to request.
+*
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  All headers copy to buffer successfully.
+*                               HTTPc_ERR_REQ_HDR_CREATE        Fatal error while creating header.
+*                               HTTPc_ERR_TRANS_BUF_LEN_INVALID HTTP buffer length is not enough big.
+*                               HTTPc_ERR_TRANS_TX_BUF_FULL     HTTP buffer is full, data must be Tx.
+*                               HTTPc_ERR_CONN_INVALID_STATE    Invalid connection state.
+*
+*                               ------------ RETURNED BY HTTPcReq_HdrCopyToBuf() ------------
+*                               See HTTPcReq_HdrCopyToBuf() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcReq().
+*
+* Note(s)     : (2) HTTP Header parameters previously validate in API function HTTPc_SetReqExtHdr()
+*                   and in HTTPcReq_Prepare().
+*
+*               (3) The Request headers processing is design as a state machine with 4 different states:
+*                       HTTPc_CONN_STATE_REQ_HDR_HOST
+*                       HTTPc_CONN_STATE_REQ_HDR_CONN
+*                       HTTPc_CONN_STATE_REQ_HDR_CONTENT_TYPE
+*                       HTTPc_CONN_STATE_REQ_HDR_TRANSFER_ENCODE
+*                       HTTPc_CONN_STATE_REQ_HDR_CONTENT_LEN
+*                       HTTPc_CONN_STATE_REQ_HDR_EXT
+*
+*               (4) The data length of each state MUST be smaller than the configured HTTPc buffer length.
+*                   Else the process is aborted and the err code HTTPc_ERR_TRANS_BUF_LEN_INVALID is returned.
+*                   The buffer length MUST be reconfigured and increased.
+*
+*               (5) The function will not return until all the request headers has been copied to the HTTP
+*                   buffer or if the buffer is full before the end of the header processing. In that case,
+*                   the state is saved and the function will exit to allow the data to be transmit.
+*                   Next time around the process will resume at the saved state.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcReq_Hdr (HTTPc_CONN  *p_conn,
+                            HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ          *p_req;
+    HTTP_DICT          *p_entry;
+    CPU_CHAR           *p_str;
+    CPU_CHAR           *p_buf;
+    CPU_CHAR           *p_buf_wr;
+    CPU_CHAR            content_len_str[DEF_INT_32U_NBR_DIG_MAX +1];
+    CPU_SIZE_T          buf_len;
+    CPU_SIZE_T          len;
+    CPU_BOOLEAN         flag_en;
+    CPU_INT32U          key;
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    HTTPc_WEBSOCK_REQ  *p_ws_req;
+#endif
+
+
+    p_req    = p_conn->ReqListHeadPtr;
+
+    p_buf    = p_conn->TxBufPtr + p_conn->TxDataLen;
+    buf_len  = p_conn->BufLen   - p_conn->TxDataLen;
+    p_buf_wr = p_buf;
+
+                                                                /* --------------- ADD REQUIRED HEADERS --------------- */
+    switch (p_conn->State) {
+        case HTTPc_CONN_STATE_REQ_HDR_HOST:
+                                                                /* --------------- COPY HOST HDR FIELD ---------------- */
+             flag_en = DEF_BIT_IS_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_HOST_ADD);
+             if (flag_en == DEF_YES) {
+                 if ((p_conn->ServerPort == HTTP_DFLT_PORT_NBR       ) ||
+                     (p_conn->ServerPort == HTTP_DFLT_PORT_NBR_SECURE)) {
+                     p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                                   p_conn->BufLen,
+                                                   buf_len,
+                                                   HTTP_HDR_FIELD_HOST,
+                                                   p_conn->HostNamePtr,
+                                                   p_conn->HostNameLen,
+                                                   DEF_YES,
+                                                   p_err);
+                     if (p_str == DEF_NULL) {
+                         goto exit;
+                     }
+
+                     buf_len -= (p_str - p_buf_wr);
+                     p_buf_wr = p_str;
+
+                 } else {
+                                                                /* If not http dflt port, add the port nbr to host hdr. */
+                     p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                                   p_conn->BufLen,
+                                                   buf_len,
+                                                   HTTP_HDR_FIELD_HOST,
+                                                   p_conn->HostNamePtr,
+                                                   p_conn->HostNameLen,
+                                                   DEF_NO,
+                                                   p_err);
+                     if (p_str == DEF_NULL) {
+                         goto exit;
+                     }
+
+                     buf_len -= (p_str - p_buf_wr);
+                     p_buf_wr = p_str;
+
+                     if (buf_len >= 1) {
+                        *p_str = ASCII_CHAR_COLON;
+                         p_str++;
+                     } else {
+                        *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                         goto exit;
+                     }
+
+                     buf_len -= (p_str - p_buf_wr);
+                     p_buf_wr = p_str;
+
+                     p_str = Str_FmtNbr_Int32U (p_conn->ServerPort,
+                                                5u,
+                                                DEF_NBR_BASE_DEC,
+                                                DEF_NULL,
+                                                DEF_NO,
+                                                DEF_YES,
+                                                p_buf_wr);
+                     if (p_str == DEF_NULL) {
+                        *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                         goto exit;
+                     }
+
+                     p_str += Str_Len(p_str);
+
+                     buf_len -= (p_str - p_buf_wr);
+                     p_buf_wr = p_str;
+
+                     p_str = Str_Copy_N(p_str, STR_CR_LF, buf_len);
+                     if (p_str == DEF_NULL) {
+                        *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                         goto exit;
+                     }
+                     p_str   += STR_CR_LF_LEN;
+                     buf_len -= p_str - p_buf_wr;
+                     p_buf_wr = p_str;
+                 }
+             }
+             p_conn->State = HTTPc_CONN_STATE_REQ_HDR_CONN;
+                                                                 /* 'break' intentionally omitted.                       */
+
+
+        case HTTPc_CONN_STATE_REQ_HDR_CONN:
+                                                                /* ------------- COPY CONNECTION HDR FIELD ------------- */
+             key = HTTP_DICT_KEY_INVALID;
+             flag_en = DEF_BIT_IS_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_CONNECTION_ADD);
+             if (flag_en == DEF_YES) {
+                                                                /* Check the value for the connection hdr field.        */
+                 flag_en = DEF_BIT_IS_SET(p_conn->Flags,HTTPc_FLAG_CONN_TO_CLOSE);
+                 if (flag_en == DEF_YES) {
+                     key = HTTP_HDR_FIELD_CONN_CLOSE;
+                 } else {
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+                     flag_en = DEF_BIT_IS_SET(p_req->Flags, HTTPc_FLAG_REQ_UPGRADE_WEBSOCKET);
+                     if (flag_en == DEF_YES) {
+                         key = HTTP_HDR_FIELD_CONN_UPGRADE;
+                     }
+#endif
+                 }
+                 p_entry = HTTP_Dict_EntryGet(HTTP_Dict_HdrFieldConnVal,
+                                              HTTP_Dict_HdrFieldConnValSize,
+                                              key);
+                 if (p_entry == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                     goto exit;
+                 }
+
+                 p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                               p_conn->BufLen,
+                                               buf_len,
+                                               HTTP_HDR_FIELD_CONN,
+                                               p_entry->StrPtr,
+                                               p_entry->StrLen,
+                                               DEF_YES,
+                                               p_err);
+                 if (p_str == DEF_NULL) {
+                     goto exit;
+                 }
+
+                 buf_len -= (p_str - p_buf_wr);
+                 p_buf_wr = p_str;
+             }
+
+             p_conn->State = HTTPc_CONN_STATE_REQ_HDR_CONTENT_TYPE;
+                                                                /* 'break' intentionally omitted.                       */
+
+
+        case HTTPc_CONN_STATE_REQ_HDR_CONTENT_TYPE:
+                                                                /* ----------- COPY CONTENT-TYPE HDR FIELD ------------ */
+             flag_en = DEF_BIT_IS_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_CONTENT_TYPE_ADD);
+             if (flag_en == DEF_YES) {
+                 p_entry = HTTP_Dict_EntryGet(HTTP_Dict_ContentType,
+                                              HTTP_Dict_ContentTypeSize,
+                                              p_req->ContentType);
+                 if (p_entry == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                     goto exit;
+                 }
+
+                 if (p_req->ContentType != HTTP_CONTENT_TYPE_MULTIPART_FORM) {
+                     p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                                   p_conn->BufLen,
+                                                   buf_len,
+                                                   HTTP_HDR_FIELD_CONTENT_TYPE,
+                                                   p_entry->StrPtr,
+                                                   p_entry->StrLen,
+                                                   DEF_YES,
+                                                   p_err);
+                     if (p_str == DEF_NULL) {
+                         goto exit;
+                     }
+
+                 } else {
+
+                     len = HTTP_STR_HDR_FIELD_CONTENT_TYPE_LEN +
+                           2 +
+                           p_entry->StrLen +
+                           2 +
+                           HTTP_STR_MULTIPART_BOUNDARY_LEN +
+                           1 +
+                           HTTPc_STR_BOUNDARY_LEN +
+                           STR_CR_LF_LEN;
+
+                     if (len > p_conn->BufLen) {
+                        *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+                         goto exit;
+                     }
+
+                     if (len > buf_len) {
+                        *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                         goto exit;
+                     }
+
+                     p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                                   p_conn->BufLen,
+                                                   buf_len,
+                                                   HTTP_HDR_FIELD_CONTENT_TYPE,
+                                                   p_entry->StrPtr,
+                                                   p_entry->StrLen,
+                                                   DEF_NO,
+                                                   p_err);
+                     if (p_str == DEF_NULL) {
+                         goto exit;
+                     }
+
+                     buf_len -= (p_str - p_buf_wr);
+                     p_buf_wr = p_str;
+
+                    *p_str = ASCII_CHAR_SEMICOLON;
+                     p_str++;
+                    *p_str = ASCII_CHAR_SPACE;
+                     p_str++;
+
+                     p_str = Str_Copy_N(p_str, HTTP_STR_MULTIPART_BOUNDARY, HTTP_STR_MULTIPART_BOUNDARY_LEN);
+                     if (p_str == DEF_NULL) {
+                        *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                         goto exit;
+                     }
+
+                     p_str += HTTP_STR_MULTIPART_BOUNDARY_LEN;
+                    *p_str  = ASCII_CHAR_EQUALS_SIGN;
+                     p_str++;
+
+                     p_str = Str_Copy_N(p_str, HTTPc_STR_BOUNDARY, HTTPc_STR_BOUNDARY_LEN);
+                     if (p_str == DEF_NULL) {
+                        *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                         goto exit;
+                     }
+
+                     p_str += HTTPc_STR_BOUNDARY_LEN;
+
+                     p_str = Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+                     if (p_str == DEF_NULL) {
+                        *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                         goto exit;
+                     }
+
+                     p_str += STR_CR_LF_LEN;
+                 }
+
+                 buf_len -= (p_str - p_buf_wr);
+                 p_buf_wr = p_str;
+             }
+             p_conn->State = HTTPc_CONN_STATE_REQ_HDR_TRANSFER_ENCODE;
+                                                                /* 'break' intentionally omitted.                       */
+
+
+        case HTTPc_CONN_STATE_REQ_HDR_TRANSFER_ENCODE:
+                                                                /* --------- COPY TRANSFER-ENCODING HDR FIELD --------- */
+             flag_en = DEF_BIT_IS_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_TRANSFER_ENCODE_ADD);
+             if (flag_en == DEF_YES) {
+                 p_entry = HTTP_Dict_EntryGet(HTTP_Dict_HdrFieldTransferTypeVal,
+                                              HTTP_Dict_HdrFieldTransferTypeValSize,
+                                              HTTP_HDR_FIELD_TRANSFER_TYPE_CHUNCKED);
+                 if (p_entry == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                     goto exit;
+                 }
+
+                 p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                               p_conn->BufLen,
+                                               buf_len,
+                                               HTTP_HDR_FIELD_TRANSFER_ENCODING,
+                                               p_entry->StrPtr,
+                                               p_entry->StrLen,
+                                               DEF_YES,
+                                               p_err);
+                 if (p_str == DEF_NULL) {
+                     goto exit;
+                 }
+
+                 buf_len -= (p_str - p_buf_wr);
+                 p_buf_wr = p_str;
+             }
+             p_conn->State = HTTPc_CONN_STATE_REQ_HDR_CONTENT_LEN;
+                                                                /* 'break' intentionally omitted.                       */
+
+
+        case HTTPc_CONN_STATE_REQ_HDR_CONTENT_LEN:
+                                                                /* ---------- COPY CONTENT-LENGTH HDR FIELD ----------- */
+             flag_en = DEF_BIT_IS_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_CONTENT_LENGTH_ADD);
+             if (flag_en == DEF_YES) {
+
+                 p_str = Str_FmtNbr_Int32U(p_req->ContentLen,
+                                           DEF_INT_32U_NBR_DIG_MAX,
+                                           DEF_NBR_BASE_DEC,
+                                           '\0',
+                                           DEF_NO,
+                                           DEF_YES,
+                                           content_len_str);
+                 if (p_str == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                     goto exit;
+                 }
+
+                 len = Str_Len_N(p_str, (DEF_INT_32U_NBR_DIG_MAX + 1));
+
+                 p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                               p_conn->BufLen,
+                                               buf_len,
+                                               HTTP_HDR_FIELD_CONTENT_LEN,
+                                               p_str,
+                                               len,
+                                               DEF_YES,
+                                               p_err);
+                 if (p_str == DEF_NULL) {
+                     goto exit;
+                 }
+
+                 buf_len -= (p_str - p_buf_wr);
+                 p_buf_wr = p_str;
+             }
+             p_conn->State = HTTPc_CONN_STATE_REQ_HDR_UPGRADE;
+                                                                /* 'break' intentionally omitted.                       */
+        case HTTPc_CONN_STATE_REQ_HDR_UPGRADE:
+
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+             flag_en = DEF_BIT_IS_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_UPGRADE_ADD);
+             if (flag_en == DEF_YES) {
+
+                 p_entry = HTTP_Dict_EntryGet(HTTP_Dict_HdrFieldUpgradeVal,
+                                              HTTP_Dict_HdrFieldUpgradeValSize,
+                                              HTTP_HDR_FIELD_UPGRADE_WEBSOCKET);
+                 if (p_entry == DEF_NULL) {
+                     *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                     goto exit;
+                 }
+
+                 p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                               p_conn->BufLen,
+                                               buf_len,
+                                               HTTP_HDR_FIELD_UPGRADE,
+                                               p_entry->StrPtr,
+                                               p_entry->StrLen,
+                                               DEF_YES,
+                                               p_err);
+                 if (p_str == DEF_NULL) {
+                     goto exit;
+                 }
+
+                 buf_len -= (p_str - p_buf_wr);
+                 p_buf_wr = p_str;
+             }
+#endif
+            p_conn->State = HTTPc_CONN_STATE_REQ_HDR_WEBSOCKET;
+                                                                /* 'break' intentionally omitted.                       */
+
+        case HTTPc_CONN_STATE_REQ_HDR_WEBSOCKET:
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+            flag_en = DEF_BIT_IS_SET(p_req->HdrFlags, HTTPc_FLAG_REQ_HDR_UPGRADE_ADD);
+            if (flag_en == DEF_YES) {
+
+                 p_ws_req = p_req->WebSockPtr;
+
+                 p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                               p_conn->BufLen,
+                                               buf_len,
+                                               HTTP_HDR_FIELD_WEBSOCKET_KEY,
+                                               p_ws_req->Key,
+                                               HTTPc_WEBSOCK_KEY_ENCODED_LEN - 1,
+                                               DEF_YES,
+                                               p_err);
+                 if (p_str == DEF_NULL) {
+                     goto exit;
+                 }
+
+                 buf_len -= (p_str - p_buf_wr);
+                 p_buf_wr = p_str;
+
+                 p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                               p_conn->BufLen,
+                                               buf_len,
+                                               HTTP_HDR_FIELD_WEBSOCKET_VERSION,
+                                               HTTPc_WEBSOCK_PROTOCOL_VERSION_13_STR,
+                                               HTTPc_WEBSOCK_PROTOCOL_VERSION_13_STR_LEN,
+                                               DEF_YES,
+                                               p_err);
+                   if (p_str == DEF_NULL) {
+                       goto exit;
+                   }
+
+                   buf_len -= (p_str - p_buf_wr);
+                   p_buf_wr = p_str;
+
+             }
+#endif
+             p_conn->State = HTTPc_CONN_STATE_REQ_HDR_EXT;
+                                                                /* 'break' intentionally omitted.                       */
+        case HTTPc_CONN_STATE_REQ_HDR_EXT:
+                                                                /* -------------- COPY EXTRA HDR FIELDS --------------- */
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+             if (p_req->HdrTbl != DEF_NULL) {
+                 p_buf_wr = HTTPcReq_HdrExtTbl(p_conn, p_buf_wr, buf_len, p_err);
+                 if (*p_err != HTTPc_ERR_NONE) {
+                      goto exit;
+                 }
+             }
+             if (p_req->OnHdrTx != DEF_NULL) {
+                 p_buf_wr = HTTPcReq_HdrExtHook(p_conn, p_buf_wr, buf_len, p_err);
+                 if (*p_err != HTTPc_ERR_NONE) {
+                      goto exit;
+                 }
+             }
+#endif
+             p_conn->State = HTTPc_CONN_STATE_REQ_HDR_LAST;
+                                                                /* 'break' intentionally omitted.                       */
+
+
+        case HTTPc_CONN_STATE_REQ_HDR_LAST:
+                                                                /* ------------- WRITE CRLF AFTER HEADERS ------------- */
+             if (buf_len < STR_CR_LF_LEN) {
+                *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                 goto exit;
+             }
+
+             p_str = Str_Copy_N(p_buf_wr, STR_CR_LF, buf_len);
+             if (p_str == DEF_NULL) {
+                *p_err = HTTPc_ERR_REQ_HDR_CREATE;
+                 goto exit;
+             }
+             p_buf_wr += STR_CR_LF_LEN;
+
+             p_conn->State = HTTPc_CONN_STATE_REQ_BODY;
+             break;
+
+
+        default:
+            *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+             break;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    p_conn->TxDataLen += (p_buf_wr - p_buf);                    /* Update Data Length to transmit.                      */
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcReq_HdrExtTbl()
+*
+* Description : Add Additional headers include in the table to the HTTP Request.
+*
+* Argument(s) : p_conn          Pointer to the current HTTPc Connection.
+*
+*               p_buf           Pointer to where the data must be copied in the HTTP buffer.
+*
+*               buf_len_rem     Buffer length remaining.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   HTTPc_ERR_NONE              Headers successfully added to request.
+*                                   HTTPc_ERR_TRANS_TX_BUF_FULL Buffer is full. Data must be Tx.
+*
+*                                   ------------ RETURNED BY HTTPcReq_HdrCopyToBuf() ------------
+*                                   See HTTPcReq_HdrCopyToBuf() for additional return error codes.
+*
+*
+* Return(s)   : Pointer to location in buffer after the end of the data written.
+*
+* Caller(s)   : HTTPcReq_Hdr().
+*
+* Note(s)     : (1) Since the additional headers are passed by the App in the form of a table, the process will
+*                   copy as much as headers possible to the HTTP buffer before returning. If not all the
+*                   headers fit inside the buffer, the index of the table will be saved and the function
+*                   will exit to allow transmission of data. Next time around the process will resume
+*                   at the saved index.
+*
+*               (2) Note that each header MUST individually fit inside the HTTP buffer
+*                   since a header field is not divisible.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+static  CPU_CHAR  *HTTPcReq_HdrExtTbl (HTTPc_CONN  *p_conn,
+                                       CPU_CHAR    *p_buf,
+                                       CPU_INT16U   buf_len_rem,
+                                       HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ    *p_req;
+    HTTPc_HDR    *p_hdr;
+    CPU_CHAR     *p_str;
+    CPU_INT08U    ix;
+    CPU_INT08U    i;
+
+
+    p_req = p_conn->ReqListHeadPtr;
+
+    ix    =  p_conn->ReqHdrTxIx;
+    p_hdr = &p_req->HdrTbl[ix];
+    for (i = ix; i < p_req->HdrNbr; i++) {
+
+        p_str = HTTPcReq_HdrCopyToBuf(p_buf,
+                                      p_conn->BufLen,
+                                      buf_len_rem,
+                                      p_hdr->HdrField,
+                                      p_hdr->ValPtr,
+                                      p_hdr->ValLen,
+                                      DEF_YES,
+                                      p_err);
+        switch (*p_err) {
+            case HTTPc_ERR_NONE:
+                 break;
+
+
+            case HTTPc_ERR_TRANS_TX_BUF_FULL:
+                 p_conn->ReqHdrTxIx = i;
+                 goto exit;
+
+
+            case HTTPc_ERR_TRANS_BUF_LEN_INVALID:
+            case HTTPc_ERR_REQ_HDR_CREATE:
+            default:
+                 goto exit;
+        }
+
+        buf_len_rem -= (p_str - p_buf);
+        p_buf        = p_str;
+
+        if (i == (p_req->HdrNbr - 1)) {
+            p_conn->ReqHdrTxIx = 0u;
+        }
+
+        p_hdr++;
+    }
+
+
+   *p_err = HTTPc_ERR_NONE;
+
+exit:
+    return (p_buf);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcReq_HdrExtHook()
+*
+* Description : Call request Header hook function to add additional headers to the request.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection.
+*
+*               p_buf           Pointer to where the data must be copied in the HTTP buffer.
+*
+*               buf_len_rem     Buffer length remaining.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   HTTPc_ERR_NONE              Headers successfully added to request.
+*                                   HTTPc_ERR_TRANS_TX_BUF_FULL Buffer is full. Data must be Tx.
+*
+*                                   ------------ RETURNED BY HTTPcReq_HdrCopyToBuf() ------------
+*                                   See HTTPcReq_HdrCopyToBuf() for additional return error codes.
+*
+* Return(s)   : Pointer to location in buffer after the end of the data written.
+*
+* Caller(s)   : HTTPcReq_Hdr().
+*
+* Note(s)     : (1) Since the Additional Headers are passed by the App hook function, the process will
+*                   copy as much as headers possible to the HTTP buffer before returning. If not all the
+*                   headers fit inside the buffer, a pointer to the header field will be saved and
+*                   the function will exit to allow transmission of data. Next time around the process will
+*                   resume at the saved pointer before calling the hook.
+*
+*               (2) Note that each header MUST individually fit inside the HTTP buffer
+*                   since a header field is not divisible.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+static  CPU_CHAR  *HTTPcReq_HdrExtHook (HTTPc_CONN  *p_conn,
+                                        CPU_CHAR    *p_buf,
+                                        CPU_INT16U   buf_len_rem,
+                                        HTTPc_ERR   *p_err)
+{
+    HTTPc_CONN_OBJ    *p_conn_const;
+    HTTPc_REQ         *p_req;
+    HTTPc_REQ_OBJ     *p_req_const;
+    HTTPc_HDR         *p_hdr;
+    CPU_CHAR          *p_str;
+    CPU_BOOLEAN        done;
+
+
+    p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+
+    p_req        = p_conn->ReqListHeadPtr;
+    p_req_const  = (HTTPc_REQ_OBJ *)p_req;
+
+    done = DEF_NO;
+    while (done != DEF_YES) {
+
+        if (p_conn->ReqHdrTempPtr != DEF_NULL) {
+            p_hdr = p_conn->ReqHdrTempPtr;
+            done  = DEF_BIT_IS_SET(p_conn->ReqFlags, HTTPc_FLAG_REQ_HDR_DONE);
+            p_conn->ReqHdrTempPtr = DEF_NULL;
+        } else {
+            done = p_req->OnHdrTx(p_conn_const, p_req_const, &p_hdr);
+            if (p_hdr == DEF_NULL) {
+               *p_err = HTTPc_ERR_REQ_HDR_INVALID;
+                goto exit;
+            }
+        }
+
+        p_str = HTTPcReq_HdrCopyToBuf(p_buf,
+                                      p_conn->BufLen,
+                                      buf_len_rem,
+                                      p_hdr->HdrField,
+                                      p_hdr->ValPtr,
+                                      p_hdr->ValLen,
+                                      DEF_YES,
+                                      p_err);
+        switch (*p_err) {
+            case HTTPc_ERR_NONE:
+                 break;
+
+
+            case HTTPc_ERR_TRANS_TX_BUF_FULL:
+                 p_conn->ReqHdrTempPtr = p_hdr;
+                 if (done == DEF_YES) {
+                     DEF_BIT_SET(p_conn->ReqFlags, HTTPc_FLAG_REQ_HDR_DONE);
+                 }
+                 goto exit;
+
+
+            case HTTPc_ERR_TRANS_BUF_LEN_INVALID:
+            case HTTPc_ERR_REQ_HDR_CREATE:
+            default:
+                 goto exit;
+        }
+
+        buf_len_rem -= (p_str - p_buf);
+        p_buf        = p_str;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return (p_buf);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcReq_HdrSearch()
+*
+* Description : Search for a HTTP header type inside the extra header table passed by the upper application.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               hdr_field   HTTP header type to search for in table.
+*
+* Return(s)   : Pointer to HTTP header object found.
+*               DEF_NULL if no HTTP header found.
+*
+* Caller(s)   : HTTPc_ReqPrepare().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_HDR_TX_EN == DEF_ENABLED)
+static  HTTPc_HDR  *HTTPcReq_HdrSearch (HTTPc_CONN      *p_conn,
+                                        HTTP_HDR_FIELD   hdr_field)
+{
+    HTTPc_REQ    *p_req;
+    HTTPc_HDR    *p_hdr;
+    CPU_BOOLEAN   found;
+    CPU_INT08U    i;
+
+
+    p_req = p_conn->ReqListHeadPtr;
+    p_hdr = p_req->HdrTbl;
+
+    if (p_hdr == DEF_NULL) {
+        return (DEF_NULL);
+    }
+
+    found = DEF_NO;
+    for (i = 0u; i < p_req->HdrNbr; i++) {
+        if (p_hdr->HdrField == hdr_field) {
+            found = DEF_YES;
+            break;
+        }
+
+        p_hdr++;
+    }
+
+    if (found == DEF_YES) {
+        return (p_hdr);
+    } else {
+        return (DEF_NULL);
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcReq_Body()
+*
+* Description : Prepare and Copy/Transmit HTTP Request Body.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                      Body processing successful.
+*                               HTTPc_ERR_REQ_BODY_NOT_PRESENT      No body present for method that requires one.
+*                               HTTPc_ERR_REQ_CONTENT_TYPE_INVALID  Invalid Content-Type with POST method.
+*                               HTTPc_ERR_REQ_METHOD_INVALID        Invalid HTTP method.
+*                               HTTPc_ERR_CONN_INVALID_STATE        Invalid connection state.
+*
+*                               ------------ RETURNED BY HTTPcReq_BodyData() -------------
+*                               See HTTPcReq_BodyData() for additional return error codes.
+*
+*                               ------------ RETURNED BY HTTPcReq_FormApp() -------------
+*                               See HTTPcReq_FormApp() for additional return error codes.
+*
+*                               ------------ RETURNED BY HTTPcReq_FormMultipart() -------------
+*                               See HTTPcReq_FormMultipart() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcReq().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcReq_Body (HTTPc_CONN  *p_conn,
+                             HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ          *p_req;
+    HTTP_METHOD         method;
+    HTTP_CONTENT_TYPE   content_type;
+    CPU_BOOLEAN         body_present;
+
+
+    p_req        = p_conn->ReqListHeadPtr;
+    method       = p_req->Method;
+    content_type = p_req->ContentType;
+
+    body_present = DEF_BIT_IS_SET(p_req->Flags, HTTPc_FLAG_REQ_BODY_PRESENT);
+
+    switch (p_conn->State) {
+        case HTTPc_CONN_STATE_REQ_BODY:
+             switch (method) {
+                 case HTTP_METHOD_GET:
+                 case HTTP_METHOD_HEAD:
+                 case HTTP_METHOD_DELETE:
+                 case HTTP_METHOD_OPTIONS:
+                      if (body_present == DEF_NO) {
+                          p_conn->State = HTTPc_CONN_STATE_REQ_END;
+                      } else {
+                          p_conn->State = HTTPc_CONN_STATE_REQ_BODY_DATA;
+                      }
+                      break;
+
+
+                 case HTTP_METHOD_TRACE:
+                 case HTTP_METHOD_CONNECT:
+                      p_conn->State = HTTPc_CONN_STATE_REQ_END;
+                      break;
+
+
+                 case HTTP_METHOD_POST:
+                      if (body_present == DEF_NO) {
+                          p_conn->State = HTTPc_CONN_STATE_REQ_END;
+                          break;
+                      }
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+                      if (p_req->FormFieldTbl != DEF_NULL) {
+                          switch (content_type) {
+                              case HTTP_CONTENT_TYPE_APP_FORM:
+                                   p_conn->State = HTTPc_CONN_STATE_REQ_BODY_FORM_APP;
+                                   break;
+
+
+                              case HTTP_CONTENT_TYPE_MULTIPART_FORM:
+                                   p_conn->State = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY;
+                                   break;
+
+
+                              default:
+                                  *p_err = HTTPc_ERR_REQ_PARAM_CONTENT_TYPE_INVALID;
+                                   goto exit;
+                          }
+                      } else {
+                          p_conn->State = HTTPc_CONN_STATE_REQ_BODY_DATA;
+                      }
+#else
+                     (void)&content_type;
+                      p_conn->State = HTTPc_CONN_STATE_REQ_BODY_DATA;
+#endif
+                      break;
+
+
+                 case HTTP_METHOD_PUT:
+                      if (body_present == DEF_NO) {
+                          p_conn->State = HTTPc_CONN_STATE_REQ_END;
+                          break;
+                      }
+                      p_conn->State = HTTPc_CONN_STATE_REQ_BODY_DATA;
+                      break;
+
+
+                 case HTTP_METHOD_UNKNOWN:
+                 default:
+                     *p_err = HTTPc_ERR_REQ_PARAM_METHOD_INVALID;
+                      goto exit;
+             }
+             break;
+
+
+        case HTTPc_CONN_STATE_REQ_BODY_DATA:
+        case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_SIZE:
+        case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_DATA:
+        case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_END:
+             HTTPcReq_BodyData(p_conn, p_err);
+             if (*p_err != HTTPc_ERR_NONE) {
+                  goto exit;
+             }
+             break;
+
+
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_APP:
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+             HTTPcReq_FormApp(p_conn, p_err);
+             if (*p_err != HTTPc_ERR_NONE) {
+                  goto exit;
+             }
+             p_conn->State = HTTPc_CONN_STATE_REQ_END;
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_DISPO:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_TYPE:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA_END:
+        case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY_END:
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+             HTTPcReq_FormMultipart(p_conn, p_err);
+             if (*p_err != HTTPc_ERR_NONE) {
+                  goto exit;
+             }
+             break;
+#else
+            *p_err = HTTPc_ERR_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        default:
+            *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+             goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+   return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcReq_FormApp()
+*
+* Description : Prepare the application type form and copy it to HTTP buffer.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Form created and copied to buf successfully.
+*                               HTTPc_ERR_TRANS_BUF_LEN_INVALID HTTP buffer length is not enough big.
+*                               HTTPc_ERR_TRANS_TX_BUF_FULL     HTTP buffer is full, data must be Tx.
+*                               HTTPc_ERR_REQ_FORM_CREATE       Fatal error occurred in form creation.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcReq_Body().
+*
+* Note(s)     : (1) The application-form is created with the table form passed by the upper application.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+static  void  HTTPcReq_FormApp (HTTPc_CONN  *p_conn,
+                                HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ             *p_req;
+    CPU_CHAR              *p_buf;
+    CPU_CHAR              *p_buf_wr;
+    HTTPc_FORM_TBL_FIELD  *p_form_tbl;
+    HTTPc_FORM_TBL_FIELD  *p_tbl_entry;
+    HTTPc_KEY_VAL         *p_form_field;
+    CPU_INT16U             key_char_encode_nbr;
+    CPU_INT16U             val_char_encode_nbr;
+    CPU_SIZE_T             buf_len;
+    CPU_SIZE_T             str_len_key;
+    CPU_SIZE_T             str_len_val;
+    CPU_SIZE_T             data_size = 0;
+    CPU_BOOLEAN            url_encode;
+    CPU_INT16U             i;
+
+
+    p_req = p_conn->ReqListHeadPtr;
+
+    p_buf     = p_conn->TxBufPtr + p_conn->TxDataLen;           /* Point to beginning of free space in Tx buffer.       */
+    buf_len   = p_conn->BufLen   - p_conn->TxDataLen;
+    p_buf_wr  = p_buf;
+
+    p_form_tbl  = (HTTPc_FORM_TBL_FIELD *)p_req->FormFieldTbl;
+
+    for (i = p_conn->ReqFormDataTxIx; i < p_req->FormFieldNbr; i++) {
+
+        p_tbl_entry = &p_form_tbl[i];
+
+        p_form_field = (HTTPc_KEY_VAL *)p_tbl_entry->FieldObjPtr;
+
+                                                                /* Calculate length of key and value without encoding.  */
+        str_len_key = p_form_field->KeyLen;
+        str_len_val = p_form_field->ValLen;
+
+                                                                /* Found number of character needing URL encoding.      */
+        key_char_encode_nbr = HTTP_URL_CharEncodeNbr(p_form_field->KeyPtr, str_len_key);
+        val_char_encode_nbr = HTTP_URL_CharEncodeNbr(p_form_field->ValPtr, str_len_val);
+
+                                                                /* Calculate total size needed for key & value encoded. */
+        data_size = str_len_key +
+                    str_len_val +
+                    HTTP_URL_ENCODING_JUMP * key_char_encode_nbr +
+                    HTTP_URL_ENCODING_JUMP * val_char_encode_nbr +
+                    1;                                          /* + 1 for the "=" between key & value.                 */
+
+        if (i < (p_req->FormFieldNbr - 1)) {
+            data_size++;                                        /* + 1 for the "&" between each key&value pair.         */
+        }
+
+        if (data_size > p_conn->BufLen) {                        /* Return if error if conn buf is to small for 1 pair.  */
+           *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+            goto exit;
+        }
+
+        if (data_size > buf_len) {                              /* Return if no more space in buf. Need to Tx.          */
+            p_conn->ReqFormDataTxIx = i;                        /* Save the tbl index to start from there next time.    */
+           *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+            goto exit;
+        }
+
+        url_encode = HTTP_URL_EncodeStr(p_form_field->KeyPtr,   /* Encode and Write to buffer the Key.                  */
+                                        p_buf_wr,
+                                       &str_len_key,
+                                        buf_len);
+        if (url_encode == DEF_FAIL) {
+           *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+            goto exit;
+        }
+
+        p_buf_wr += str_len_key;
+        buf_len  -= str_len_key;
+
+       *p_buf_wr = ASCII_CHAR_EQUALS_SIGN;                      /* Write the "=" sign.                                  */
+        p_buf_wr++;
+        buf_len--;
+
+        url_encode = HTTP_URL_EncodeStr(p_form_field->ValPtr,   /* Encode and Write to buffer the Value.                */
+                                        p_buf_wr,
+                                       &str_len_val,
+                                        buf_len);
+        if (url_encode == DEF_FAIL) {
+           *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+            goto exit;
+        }
+
+        p_buf_wr += str_len_val;
+        buf_len  -= str_len_val;
+
+        if (i < (p_req->FormFieldNbr - 1)) {
+           *p_buf_wr = ASCII_CHAR_AMPERSAND;                    /* Write the "&" sign between pairs.                    */
+            p_buf_wr++;
+            buf_len--;
+        } else {
+            p_conn->ReqFormDataTxIx = 0;
+        }
+
+        p_form_field++;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    p_conn->TxDataLen += (p_buf_wr - p_buf);                    /* Update Data Length to transmit.                      */
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcReq_FormMultipart()
+*
+* Description : Prepare the multipart type form and copy it to HTTP buffer.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                          Form created and copied to buf successfully.
+*                               HTTPc_ERR_REQ_FORM_FIELD_NULL_PTR       Null pointer in form table.
+*                               HTTPc_ERR_REQ_FORM_FIELD_INVALID_LEN    Invalid value length pass in form table.
+*                               HTTPc_ERR_REQ_FORM_CREATE               Fatal error occurred in form creation.
+*                               HTTPc_ERR_TRANS_BUF_LEN_INVALID         HTTP buffer length is not enough big.
+*                               HTTPc_ERR_TRANS_TX_BUF_FULL             HTTP buffer is full, data must be Tx.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcReq_Body().
+*
+* Note(s)     : (1) Do not support Compression, Encryption and Encoding inside multipart.
+*                   Only header Content-Disposition will be added with parameter "name". For file
+*                   upload, parameter "filename" will be added also.
+*                   Header Content-Type will be added if content-type passed is recognized by client.
+*
+*               (2) Only support 1 level of multipart.
+*********************************************************************************************************
+*/
+#if (HTTPc_CFG_FORM_EN == DEF_ENABLED)
+static  void  HTTPcReq_FormMultipart (HTTPc_CONN  *p_conn,
+                                      HTTPc_ERR   *p_err)
+{
+    HTTPc_CONN_OBJ        *p_conn_const;
+    HTTPc_REQ             *p_req;
+    HTTPc_REQ_OBJ         *p_req_const;
+    CPU_CHAR              *p_buf;
+    CPU_CHAR              *p_buf_wr;
+    CPU_CHAR              *p_str;
+    CPU_CHAR              *p_name;
+    CPU_CHAR              *p_filename;
+    HTTPc_FORM_TBL_FIELD  *p_form_tbl;
+    HTTPc_FORM_TBL_FIELD  *p_tbl_entry;
+    HTTPc_KEY_VAL         *p_kvp;
+    HTTPc_KEY_VAL_EXT     *p_kvp_big;
+    HTTPc_MULTIPART_FILE  *p_multipart_file;
+    HTTP_DICT             *p_entry;
+    CPU_SIZE_T             name_field_len;
+    CPU_SIZE_T             filename_field_len;
+    CPU_SIZE_T             buf_len;
+    CPU_SIZE_T             data_size;
+    CPU_INT16U             data_len_wr;
+    CPU_INT16U             name_char_encode_nbr;
+    CPU_INT16U             filename_char_encode_nbr;
+    CPU_INT16U             i;
+    CPU_BOOLEAN            url_encode;
+    CPU_BOOLEAN            done;
+
+
+    p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+    p_req        =  p_conn->ReqListHeadPtr;
+    p_req_const  = (HTTPc_REQ_OBJ *)p_req;
+
+    p_buf     = p_conn->TxBufPtr + p_conn->TxDataLen;           /* Point to beginning of free space in Tx buffer.       */
+    buf_len   = p_conn->BufLen   - p_conn->TxDataLen;
+    p_buf_wr  = p_buf;
+    data_size = 0;
+
+    p_form_tbl = p_req->FormFieldTbl;
+    for (i = p_conn->ReqFormDataTxIx; i < p_req->FormFieldNbr; i++) {
+
+        p_tbl_entry = &p_form_tbl[i];
+
+        switch (p_conn->State) {
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY:
+                                                                /* Calculate size of needed for data to write.          */
+                 data_size = HTTPc_STR_BOUNDARY_START_LEN + STR_CR_LF_LEN;
+
+                 if (data_size > p_conn->BufLen) {              /* Validate that buffer size is enough big.             */
+                    *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+                     goto exit;
+                 }
+
+                 if (data_size > buf_len) {                        /* Validate that remaining space in buffer is enough.*/
+                     p_conn->TxDataLen       += (p_buf_wr - p_buf);/* Update Data Length to transmit.                   */
+                     p_conn->ReqFormDataTxIx  = i;                 /* Save the tbl index to start from there next time. */
+                     p_conn->State            = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY;
+                    *p_err                    = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                     goto exit;
+                 }
+
+                                                                /* Write start of boundary.                            */
+                 p_str = Str_Copy_N(p_buf_wr, HTTPc_STR_BOUNDARY_START, data_size);
+                 if (p_str == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                     goto exit;
+                 }
+
+                 p_str += HTTPc_STR_BOUNDARY_START_LEN;
+
+                                                                /* Write CRLF after boundary.                           */
+                 p_str = Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+                 if (p_str == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                     goto exit;
+                 }
+
+                 p_str   += STR_CR_LF_LEN;
+                 buf_len -= (p_str - p_buf_wr);
+                 p_buf_wr = p_str;
+                                                                /* 'break' intentionally omitted.                       */
+
+
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_DISPO:
+                 switch (p_tbl_entry->Type) {
+                     case HTTPc_FORM_FIELD_TYPE_KEY_VAL:
+                          p_kvp                = (HTTPc_KEY_VAL *)p_tbl_entry->FieldObjPtr;
+                                                                /* Found nbr of chars to encode in name.                */
+                          name_field_len       = p_kvp->KeyLen;
+                          name_char_encode_nbr = HTTP_URL_CharEncodeNbr(p_kvp->KeyPtr, name_field_len);
+                          p_name               = p_kvp->KeyPtr;
+                          p_filename           = DEF_NULL;
+                          break;
+
+
+                     case HTTPc_FORM_FIELD_TYPE_KEY_VAL_EXT:
+                          p_kvp_big            = (HTTPc_KEY_VAL_EXT *)p_tbl_entry->FieldObjPtr;
+                                                                /* Found nbr of chars to encode in name.                */
+                          name_field_len       = p_kvp_big->KeyLen;
+                          name_char_encode_nbr = HTTP_URL_CharEncodeNbr(p_kvp_big->KeyPtr, name_field_len);
+                          p_name               = p_kvp_big->KeyPtr;
+                          p_filename           = DEF_NULL;
+                          break;
+
+
+                     case HTTPc_FORM_FIELD_TYPE_FILE:
+                          p_multipart_file         = (HTTPc_MULTIPART_FILE *)p_tbl_entry->FieldObjPtr;
+                                                                /* Found nbr of chars to encode in name.                */
+                          name_field_len           = p_multipart_file->NameLen;
+                          name_char_encode_nbr     = HTTP_URL_CharEncodeNbr(p_multipart_file->NamePtr, name_field_len);
+                          p_name                   = p_multipart_file->NamePtr;
+                                                                /* Found nbr of chars to encode in filename.            */
+                          filename_field_len       = p_multipart_file->FileNameLen;
+                          filename_char_encode_nbr = HTTP_URL_CharEncodeNbr(p_multipart_file->FileNamePtr, filename_field_len);
+                          p_filename               = p_multipart_file->FileNamePtr;
+                          data_size += (2 +                                                /* "; "                   */
+                                        HTTP_STR_MULTIPART_FIELD_FILE_NAME_LEN +           /* "filename"             */
+                                        3 +                                                /* "=\"\""                */
+                                        filename_field_len +                               /* "filename_rx_in_form"  */
+                                        HTTP_URL_ENCODING_JUMP * filename_char_encode_nbr);/* nbr of char to encode. */
+                          break;
+
+
+                     default:
+                        *p_err = HTTPc_ERR_FORM_TYPE_INVALID;
+                         goto exit;
+                 }
+
+                                                                /* Calculate size needed for data to write.             */
+                 data_size += HTTP_STR_HDR_FIELD_CONTENT_DISPOSITION_LEN +          /* "Content-Disposition"  */
+                              2 +                                                   /* ": "                   */
+                              HTTP_STR_CONTENT_DISPOSITION_FORM_DATA_LEN +          /* "form-data"            */
+                              2 +                                                   /* "; "                   */
+                              HTTP_STR_MULTIPART_FIELD_NAME_LEN +                   /* "name"                 */
+                              3 +                                                   /* "=\"\""                */
+                              name_field_len +                                      /* "name_rx_in_form"      */
+                              HTTP_URL_ENCODING_JUMP * name_char_encode_nbr +       /* nbr of char to encode. */
+                              STR_CR_LF_LEN;                                        /* "\r\n"                 */
+
+
+                 if (data_size > p_conn->BufLen) {              /* Validate that buffer size is enough big.             */
+                    *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+                     goto exit;
+                 }
+
+                 if (data_size > buf_len) {                     /* Validate that remaining space in buffer is enough.   */
+                     p_conn->TxDataLen   += (p_buf_wr - p_buf); /* Update Data Length to transmit.                      */
+                     p_conn->ReqFormDataTxIx = i;               /* Save the tbl index to start from there next time.    */
+                     p_conn->State        = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_DISPO;
+                    *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                     goto exit;
+                 }
+                                                                /* Write Content-Disposition with name (and filename).  */
+                 p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                               p_conn->BufLen,
+                                               buf_len,
+                                               HTTP_HDR_FIELD_CONTENT_DISPOSITION,
+                                               HTTP_STR_CONTENT_DISPOSITION_FORM_DATA,
+                                               HTTP_STR_CONTENT_DISPOSITION_FORM_DATA_LEN,
+                                               DEF_NO,
+                                               p_err);
+                 if (p_str == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                     goto exit;
+                 }
+
+                *p_str = ASCII_CHAR_SEMICOLON;
+                 p_str++;
+                *p_str = ASCII_CHAR_SPACE;
+                 p_str++;
+
+                 p_str = Str_Copy_N(p_str, HTTP_STR_MULTIPART_FIELD_NAME, HTTP_STR_MULTIPART_FIELD_NAME_LEN);
+                 if (p_str == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                     goto exit;
+                 }
+
+                 p_str += HTTP_STR_MULTIPART_FIELD_NAME_LEN;
+                *p_str = ASCII_CHAR_EQUALS_SIGN;
+                 p_str++;
+                *p_str = ASCII_CHAR_QUOTATION_MARK;
+                 p_str++;
+
+                 url_encode = HTTP_URL_EncodeStr(p_name,
+                                                 p_str,
+                                                &name_field_len,
+                                                 buf_len);
+                 if (url_encode == DEF_FAIL) {
+                    *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                     goto exit;
+                 }
+
+                 p_str += name_field_len;
+                *p_str  = ASCII_CHAR_QUOTATION_MARK;
+                 p_str++;
+
+                 if (p_filename != DEF_NULL) {
+                    *p_str = ASCII_CHAR_SEMICOLON;
+                     p_str++;
+                    *p_str = ASCII_CHAR_SPACE;
+                     p_str++;
+
+                     p_str = Str_Copy_N(p_str, HTTP_STR_MULTIPART_FIELD_FILE_NAME, HTTP_STR_MULTIPART_FIELD_FILE_NAME_LEN);
+                     if (p_str == DEF_NULL) {
+                        *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                         goto exit;
+                     }
+
+                     p_str += HTTP_STR_MULTIPART_FIELD_FILE_NAME_LEN;
+                    *p_str = ASCII_CHAR_EQUALS_SIGN;
+                     p_str++;
+                    *p_str = ASCII_CHAR_QUOTATION_MARK;
+                     p_str++;
+
+                     url_encode = HTTP_URL_EncodeStr(p_filename,
+                                                     p_str,
+                                                    &filename_field_len,
+                                                     buf_len);
+                     if (url_encode == DEF_FAIL) {
+                        *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                         goto exit;
+                     }
+
+                     p_str += filename_field_len;
+                    *p_str  = ASCII_CHAR_QUOTATION_MARK;
+                     p_str++;
+                 }
+
+                 p_str = Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+                 if (p_str == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                     goto exit;
+                 }
+
+                 p_str    += STR_CR_LF_LEN;
+
+                 buf_len  -= (p_str- p_buf_wr);
+                 p_buf_wr  = p_str;
+                                                                    /* 'break' intentionally omitted.                       */
+
+
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_TYPE:
+                 switch (p_tbl_entry->Type) {
+                     case HTTPc_FORM_FIELD_TYPE_KEY_VAL:
+                     case HTTPc_FORM_FIELD_TYPE_KEY_VAL_EXT:
+                          p_multipart_file = DEF_NULL;
+                          break;
+
+                     case HTTPc_FORM_FIELD_TYPE_FILE:
+                          p_multipart_file = (HTTPc_MULTIPART_FILE *)p_tbl_entry->FieldObjPtr;
+                          break;
+
+                     default:
+                        *p_err = HTTPc_ERR_FORM_TYPE_INVALID;
+                         goto exit;
+                 }
+
+                 if (p_multipart_file != DEF_NULL) {
+                     p_entry = HTTP_Dict_EntryGet(HTTP_Dict_ContentType,
+                                                  HTTP_Dict_ContentTypeSize,
+                                                  p_multipart_file->ContentType);
+                     if (p_entry != DEF_NULL) {
+
+                         p_str = HTTPcReq_HdrCopyToBuf(p_buf_wr,
+                                                       p_conn->BufLen,
+                                                       buf_len,
+                                                       HTTP_HDR_FIELD_CONTENT_TYPE,
+                                                       p_entry->StrPtr,
+                                                       p_entry->StrLen,
+                                                       DEF_YES,
+                                                       p_err);
+                         switch (*p_err) {
+                             case HTTPc_ERR_NONE:
+                                  break;
+
+                             case HTTPc_ERR_TRANS_TX_BUF_FULL:
+                                                                /* Update Data Length to transmit.                      */
+                                  p_conn->TxDataLen   += (p_buf_wr - p_buf);
+                                  p_conn->ReqFormDataTxIx = i;  /* Save the tbl index to start from there next time.    */
+                                  p_conn->State        = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_TYPE;
+                                  goto exit;
+
+                             case HTTPc_ERR_TRANS_BUF_LEN_INVALID:
+                             case HTTPc_ERR_REQ_HDR_CREATE:
+                             default:
+                                  goto exit;
+                         }
+                     }
+                 }
+
+                 buf_len  -= (p_str- p_buf_wr);
+                 p_buf_wr  = p_str;
+
+                 if (STR_CR_LF_LEN > p_conn->BufLen) {          /* Validate that buffer size is enough big.             */
+                    *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+                     goto exit;
+                 }
+
+                 if (STR_CR_LF_LEN > buf_len) {                 /* Validate that remaining space in buf is enough.      */
+                     p_conn->TxDataLen        += (p_buf_wr - p_buf); /* Update Data Length to transmit.                 */
+                     p_conn->ReqFormDataTxIx   = i;             /* Save the tbl index to start from there next time.    */
+                     p_conn->State             = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_TYPE;
+                    *p_err                     = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                     goto exit;
+                 }
+
+                 p_str = Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+                 if (p_str == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                     goto exit;
+                 }
+
+                 p_str    += STR_CR_LF_LEN;
+                 buf_len  -= (p_str - p_buf_wr);
+                 p_buf_wr  = p_str;
+                                                                /* 'break' intentionally omitted.                       */
+
+
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA:
+                 switch (p_tbl_entry->Type) {
+                     case HTTPc_FORM_FIELD_TYPE_KEY_VAL:
+                          p_kvp = (HTTPc_KEY_VAL *)p_tbl_entry->FieldObjPtr;
+
+                          if (p_kvp->ValLen > p_conn->BufLen) { /* Validate that buffer size is enough big.             */
+                             *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+                              goto exit;
+                          }
+
+                          if (p_kvp->ValLen > buf_len) {                    /* Validate that remaining space in buf is enough.  */
+                              p_conn->TxDataLen       += (p_buf_wr - p_buf);/* Update Data Length to transmit.                  */
+                              p_conn->ReqFormDataTxIx  = i;                 /* Save the tbl index to start from there next time.*/
+                              p_conn->State            = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA;
+                             *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                              goto exit;
+                          }
+
+                          Mem_Copy(p_buf_wr, p_kvp->ValPtr, p_kvp->ValLen);
+
+                          buf_len  -= p_kvp->ValLen;;
+                          p_buf_wr += p_kvp->ValLen;
+                          break;
+
+
+                     case HTTPc_FORM_FIELD_TYPE_KEY_VAL_EXT:
+                          p_kvp_big = (HTTPc_KEY_VAL_EXT *)p_tbl_entry->FieldObjPtr;
+
+                          done = p_kvp_big->OnValTx(p_conn_const,
+                                                    p_req_const,
+                                                    p_kvp_big,
+                                                    p_buf_wr,
+                                                    buf_len,
+                                                   &data_len_wr);
+
+                          p_conn->ReqDataOffset += data_len_wr;
+
+                          if (data_len_wr > buf_len) {
+                             *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                              goto exit;
+                          }
+
+                          if (p_conn->ReqDataOffset > p_kvp_big->ValLen) {
+                             *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                              goto exit;
+                          }
+
+                          if ((done                  == DEF_YES) &&
+                              (p_conn->ReqDataOffset <  p_kvp_big->ValLen)) {
+                              *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                               goto exit;
+                          }
+
+                          buf_len  -= data_len_wr;
+                          p_buf_wr += data_len_wr;
+
+                          if (done == DEF_NO) {
+                              p_conn->TxDataLen        += (p_buf_wr - p_buf);
+                              p_conn->ReqFormDataTxIx   = i;                /* Save the tbl index to start from there next time.*/
+                              p_conn->State             = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA;
+                             *p_err                     = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                              goto exit;
+                          } else {
+                              p_conn->ReqDataOffset = 0;
+                          }
+                          break;
+
+
+                     case HTTPc_FORM_FIELD_TYPE_FILE:
+                          p_multipart_file = (HTTPc_MULTIPART_FILE *)p_tbl_entry->FieldObjPtr;
+
+                          done = p_multipart_file->OnFileTx(p_conn_const,
+                                                            p_req_const,
+                                                            p_multipart_file,
+                                                            p_buf_wr,
+                                                            buf_len,
+                                                           &data_len_wr);
+
+                          p_conn->ReqDataOffset += data_len_wr;
+
+                          if (data_len_wr > buf_len) {
+                             *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                              goto exit;
+                          }
+
+                          if (p_conn->ReqDataOffset > p_multipart_file->FileLen) {
+                             *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                              goto exit;
+                          }
+
+                          if ((done                  == DEF_YES) &&
+                              (p_conn->ReqDataOffset <  p_multipart_file->FileLen)) {
+                              *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                               goto exit;
+                          }
+
+                          buf_len  -= data_len_wr;
+                          p_buf_wr += data_len_wr;
+
+                          if (done == DEF_NO) {
+                              p_conn->TxDataLen        += (p_buf_wr - p_buf);
+                              p_conn->ReqFormDataTxIx   = i;                /* Save the tbl index to start from there next time.*/
+                              p_conn->State             = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA;
+                             *p_err                     = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                              goto exit;
+                          } else {
+                              p_conn->ReqDataOffset = 0;
+                          }
+                          break;
+
+
+                     default:
+                        *p_err = HTTPc_ERR_FORM_TYPE_INVALID;
+                         goto exit;
+                 }
+                                                                /* 'break' intentionally omitted.                       */
+
+
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA_END:
+
+                p_conn->TxDataPtr = p_conn->TxBufPtr;           /* Reset TxDataPtr to the HTTP buffer pointer.          */
+
+                if (STR_CR_LF_LEN > p_conn->BufLen) {           /* Validate that buffer size is enough big.             */
+                   *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+                    goto exit;
+                }
+
+                if (STR_CR_LF_LEN > buf_len) {                  /* Validate that remaining space in buffer is enough.   */
+                    p_conn->TxDataLen    += (p_buf_wr - p_buf); /* Update Data Length to transmit.                      */
+                    p_conn->ReqFormDataTxIx  = i;               /* Save the tbl index to start from there next time.    */
+                    p_conn->State         = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA_END;
+                   *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                    goto exit;
+                }
+
+                 p_str = Str_Copy_N(p_buf_wr, STR_CR_LF, STR_CR_LF_LEN);
+                 if (p_str == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                     goto exit;
+                 }
+
+                 p_str    += STR_CR_LF_LEN;
+                 buf_len  -= (p_str - p_buf_wr);
+                 p_buf_wr  = p_str;
+                                                                /* 'break' intentionally omitted.                       */
+
+
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY_END:
+                 if (i == (p_req->FormFieldNbr - 1)) {
+                                                                /* ----------- WRITE END OF BOUNDARY + CRLF ----------- */
+                                                                /* Calculate size of needed for data to write.          */
+                     data_size = Str_Len(HTTPc_STR_BOUNDARY_END) + STR_CR_LF_LEN;
+
+                     if (data_size > p_conn->BufLen) {          /* Validate that buffer size is enough big.             */
+                        *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+                         goto exit;
+                     }
+
+                     if (data_size > buf_len) {
+                         p_conn->TxDataLen   += (p_buf_wr - p_buf);
+                         p_conn->ReqFormDataTxIx = i;
+                         p_conn->State = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY_END;
+                        *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                         goto exit;
+                     }
+
+                                                                /* Write end of boundary.                            */
+                     p_str = Str_Copy_N(p_buf_wr, HTTPc_STR_BOUNDARY_END, HTTPc_STR_BOUNDARY_END_LEN);
+                     if (p_str == DEF_NULL) {
+                        *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                         goto exit;
+                     }
+
+                     p_str += HTTPc_STR_BOUNDARY_END_LEN;
+                                                                /* Write CRLF after last boundary.                      */
+                     p_str = Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+                     if (p_str == DEF_NULL) {
+                        *p_err = HTTPc_ERR_REQ_FORM_CREATE;
+                         goto exit;
+                     }
+
+                     p_str    += STR_CR_LF_LEN;
+                     buf_len  -= (p_str - p_buf_wr);
+                     p_buf_wr  = p_str;
+                 }
+                 p_conn->State = HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY;
+                 break;
+
+
+            default:
+                *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+                 goto exit;
+        }
+    }
+
+    p_conn->TxDataLen   += (p_buf_wr - p_buf);
+
+    p_conn->ReqFormDataTxIx = 0;
+    p_conn->State           = HTTPc_CONN_STATE_REQ_END;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcReq_BodyData()
+*
+* Description : Prepare and transmit Data passed by the application.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                      body transfer is taken place successfully.
+*                               HTTPc_ERR_REQ_BODY_CHUNK_PREPARE    Fatal error occurred in chunk preparation.
+*                               HTTPc_ERR_CONN_INVALID_STATE        HTTPc Connection invalid state.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcReq_Body().
+*
+* Note(s)     : (1) Data can be send with the chunked transfer-encoding or with header Content-Length
+*                   when data length is known.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcReq_BodyData (HTTPc_CONN  *p_conn,
+                                 HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ         *p_req;
+    CPU_SIZE_T         buf_len;
+    CPU_BOOLEAN        chunk_en;
+    HTTPc_CONN_OBJ    *p_conn_const;
+    HTTPc_REQ_OBJ     *p_req_const;
+    CPU_CHAR          *p_buf;
+    CPU_CHAR          *p_buf_wr;
+#if (HTTPc_CFG_CHUNK_TX_EN == DEF_ENABLED)
+    CPU_SIZE_T         nbr_dig_max;
+    CPU_SIZE_T         data_size;
+    CPU_CHAR          *p_str;
+    CPU_BOOLEAN        last_chunk;
+#endif
+
+
+    p_req        = p_conn->ReqListHeadPtr;
+    p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+    p_req_const  = (HTTPc_REQ_OBJ *)p_req;
+
+    p_buf    = p_conn->TxBufPtr + p_conn->TxDataLen;            /* Point to beginning of free space in Tx buffer.       */
+    buf_len  = p_conn->BufLen - p_conn->TxDataLen;
+    p_buf_wr = p_buf;
+
+    chunk_en = DEF_BIT_IS_SET(p_req->Flags, HTTPc_FLAG_REQ_BODY_CHUNK_TRANSFER);
+
+    if ((p_conn->TxDataLen != 0u      ) &&
+        (p_req->DataPtr    != DEF_NULL)) {
+        *p_err = HTTPc_ERR_NONE;
+         goto exit;
+    }
+
+                                                                /* -------------- STANDARD TRANSFER MODE -------------- */
+    if (chunk_en == DEF_NO) {
+
+                                                                /* Call hook fnct to setup data pointer.                */
+        (void)p_req->OnBodyTx(p_conn_const,
+                              p_req_const,
+                             &p_req->DataPtr,
+                              p_buf_wr,
+                              buf_len,
+                             &p_conn->ReqDataOffset);
+
+        if (p_conn->ReqDataOffset == 0) {
+            *p_err = HTTPc_ERR_NONE;
+            goto exit;
+        }
+
+
+        if (p_req->DataPtr == DEF_NULL) {                       /* Case 1: Data was copied in Tx buffer.                */
+
+            if (p_conn->ReqDataOffset > buf_len) {
+               *p_err = HTTPc_ERR_REQ_BODY_CHUNK_INVALID;
+                goto exit;
+            }
+            p_conn->TxDataPtr = p_conn->TxBufPtr;              /* Set TxDataPtr to HTTP buffer ptr.                    */
+
+        } else {                                                /* Case 2: Application Data Pointer was passed.         */
+            p_conn->TxDataPtr = p_req->DataPtr;                 /* Set pointer to data to Tx.                           */
+        }
+
+        p_conn->TxDataLen += p_conn->ReqDataOffset;             /* Update Data Length to transmit.                      */
+
+
+        if (p_conn->ReqDataOffset > p_req->ContentLen) {
+           *p_err = HTTPc_ERR_REQ_BODY_CHUNK_INVALID;
+            goto exit;
+        }
+
+        p_req->ContentLen -= p_conn->ReqDataOffset;             /* Calculate size of data remaining to Tx.              */
+
+        if (p_req->ContentLen <= 0) {                           /* Return if all data sent.                             */
+            p_conn->State = HTTPc_CONN_STATE_REQ_END;
+           *p_err         = HTTPc_ERR_NONE;
+            goto exit;
+        }
+
+                                                                /* --------------- CHUNK TRANSFER MODE ---------------- */
+    } else {
+#if (HTTPc_CFG_CHUNK_TX_EN == DEF_ENABLED)
+
+        switch (p_conn->State) {
+            case HTTPc_CONN_STATE_REQ_BODY_DATA:
+                 nbr_dig_max = HTTP_StrSizeHexDigReq(p_conn->BufLen);
+                 data_size   = nbr_dig_max + STR_CR_LF_LEN;
+
+                 if (data_size >= p_conn->BufLen) {
+                    *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+                     goto exit;
+                 }
+
+                 if (data_size >= buf_len) {
+                    *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                     goto exit;
+                 }
+
+                 p_buf_wr += data_size;
+                 buf_len  -= data_size;
+
+                                                                /* Call hook fnct to setup data pointer.                */
+                 last_chunk   = p_req->OnBodyTx(p_conn_const,
+                                                p_req_const,
+                                               &p_req->DataPtr,
+                                                p_buf_wr,
+                                                buf_len,
+                                 (CPU_INT16U *)&p_req->ContentLen); /* Use ContentLen to store length of chunk.         */
+
+                 if ((p_req->ContentLen == 0     ) &&
+                     (last_chunk        == DEF_NO)) {
+                    *p_err = HTTPc_ERR_REQ_BODY_CHUNK_INVALID;
+                     goto exit;
+                 }
+
+                 if (p_req->DataPtr == DEF_NULL) {              /* Case 1: Data was copied in Tx buffer.                */
+
+                     if (p_req->ContentLen > buf_len) {
+                        *p_err = HTTPc_ERR_REQ_BODY_CHUNK_INVALID;
+                         goto exit;
+                     }
+
+                     p_conn->TxDataPtr  = p_conn->TxBufPtr;     /* Set TxDataPtr to HTTP buffer ptr.                    */
+
+                 } else {                                       /* Case 2: Application data pointer was passed.         */
+                     p_conn->TxDataPtr = p_req->DataPtr;
+                 }
+
+                 if(last_chunk == DEF_YES) {
+                     DEF_BIT_SET(p_conn->ReqFlags, HTTPc_FLAG_REQ_BODY_CHUNK_LAST);
+                 } else {
+                     DEF_BIT_CLR(p_conn->ReqFlags, HTTPc_FLAG_REQ_BODY_CHUNK_LAST);
+                 }
+
+                 p_conn->State = HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_SIZE;
+                                                                /* 'break' intentionally omitted.                       */
+
+
+            case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_SIZE:
+                 nbr_dig_max  = HTTP_StrSizeHexDigReq(p_conn->BufLen);
+                 data_size    = nbr_dig_max + STR_CR_LF_LEN;
+                 p_buf_wr    -= data_size;
+                 buf_len      = data_size;
+
+                 p_str = HTTP_ChunkTransferWrSize(p_buf_wr, buf_len, nbr_dig_max, p_req->ContentLen);
+                 if (p_str == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_BODY_CHUNK_PREPARE;
+                     goto exit;
+                 }
+
+                                                                /* Update Data Length to transmit.                      */
+                 if (p_conn->TxDataPtr == p_conn->TxBufPtr) {
+                     p_conn->TxDataLen += (p_str - p_buf_wr) + p_req->ContentLen;
+                     p_conn->State      =  HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_END;
+                 } else {
+                     p_conn->TxDataLen += (p_str - p_buf_wr);
+                     p_conn->State      = HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_DATA;
+                 }
+
+                 p_conn->TxDataPtr  = p_conn->TxBufPtr;         /* Set TxDataPtr to HTTP buffer ptr.                    */
+                 break;
+
+
+            case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_DATA:
+                 p_conn->TxDataLen += p_req->ContentLen;        /* Update Data Length to transmit.                      */
+                 p_conn->TxDataPtr  = p_req->DataPtr;           /* Set TxDataPtr to App data ptr.                       */
+                 p_conn->State      = HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_END;
+                 break;
+
+
+            case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_END:
+                 nbr_dig_max = HTTP_StrSizeHexDigReq(p_conn->BufLen);
+                 data_size   = nbr_dig_max + 3*STR_CR_LF_LEN;
+
+                 if (data_size > p_conn->BufLen) {
+                    *p_err = HTTPc_ERR_TRANS_BUF_LEN_INVALID;
+                     goto exit;
+                 }
+
+                 if (data_size > buf_len) {
+                    *p_err = HTTPc_ERR_TRANS_TX_BUF_FULL;
+                     goto exit;
+                 }
+
+                 p_str = Str_Copy_N(p_buf_wr, STR_CR_LF, STR_CR_LF_LEN);
+                 if (p_str == DEF_NULL) {
+                    *p_err = HTTPc_ERR_REQ_BODY_CHUNK_PREPARE;
+                     goto exit;
+                 }
+
+                 p_str    += STR_CR_LF_LEN;
+                 buf_len  -= STR_CR_LF_LEN;
+                 p_buf_wr  = p_str;
+
+                 p_conn->TxDataPtr  = p_conn->TxBufPtr;         /* Set TxDataPtr to internal buffer.                    */
+
+                 p_conn->TxDataLen += STR_CR_LF_LEN;            /* Update Data Length to transmit.                      */
+
+                 last_chunk = DEF_BIT_IS_SET(p_conn->ReqFlags, HTTPc_FLAG_REQ_BODY_CHUNK_LAST);
+                 if (last_chunk == DEF_YES) {
+
+                     p_str = HTTP_ChunkTransferWrSize(p_buf_wr, buf_len, nbr_dig_max, 0);
+                     if (p_str == DEF_NULL) {
+                        *p_err = HTTPc_ERR_REQ_BODY_CHUNK_PREPARE;
+                         goto exit;
+                     }
+
+                     p_conn->TxDataLen += (p_str - p_buf_wr);   /* Update Data Length to transmit.                      */
+                     p_buf_wr = p_str;
+
+                     p_str = Str_Copy_N(p_buf_wr, STR_CR_LF, STR_CR_LF_LEN);
+                     if (p_str == DEF_NULL) {
+                        *p_err = HTTPc_ERR_REQ_BODY_CHUNK_PREPARE;
+                         goto exit;
+                     }
+
+                     p_str += STR_CR_LF_LEN;
+
+                     p_conn->TxDataLen += (p_str - p_buf_wr);   /* Update Data Length to transmit.                      */
+                     p_conn->State = HTTPc_CONN_STATE_REQ_END;
+
+                 } else {
+                     p_conn->State = HTTPc_CONN_STATE_REQ_BODY_DATA;
+                 }
+                 break;
+
+
+            default:
+                *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+                 goto exit;
+        }
+#else
+       *p_err = HTTPc_ERR_FEATURE_DIS;
+        goto exit;
+#endif
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_req.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_req.h
new file mode 100644
index 0000000..778d9c9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_req.h
@@ -0,0 +1,141 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT REQUEST MODULE
+*
+* Filename      : http-c_req.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPc module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_REQ_MODULE_PRESENT                          /* See Note #1.                                         */
+#define  HTTPc_REQ_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         HTTPc INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+
+#include  
+#include  "../../Common/http.h"
+#include  "http-c.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPc_STR_BOUNDARY                  "rgifovj80325n"
+
+#define  HTTPc_STR_BOUNDARY_LEN              (sizeof(HTTPc_STR_BOUNDARY) -1)
+
+#define  HTTPc_STR_BOUNDARY_START            "--" HTTPc_STR_BOUNDARY
+
+#define  HTTPc_STR_BOUNDARY_END              "--" HTTPc_STR_BOUNDARY "--"
+
+#define  HTTPc_STR_BOUNDARY_START_LEN        (sizeof(HTTPc_STR_BOUNDARY_START) - 1)
+
+#define  HTTPc_STR_BOUNDARY_END_LEN          (sizeof(HTTPc_STR_BOUNDARY_END) - 1)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void          HTTPcReq_Prepare      (       HTTPc_CONN      *p_conn,
+                                            HTTPc_ERR       *p_err);
+
+CPU_BOOLEAN   HTTPcReq              (       HTTPc_CONN      *p_conn,
+                                            HTTPc_ERR       *p_err);
+
+CPU_CHAR     *HTTPcReq_HdrCopyToBuf (       CPU_CHAR        *p_buf,         // TODO put function in HTTP common files ?
+                                            CPU_INT16U       buf_len,
+                                            CPU_SIZE_T       buf_len_rem,
+                                            HTTP_HDR_FIELD   hdr_type,
+                                     const  CPU_CHAR        *p_val,
+                                            CPU_SIZE_T       val_len,
+                                            CPU_BOOLEAN      add_CRLF,
+                                            HTTPc_ERR       *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_REQ_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_resp.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_resp.c
new file mode 100644
index 0000000..3a10ecd
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_resp.c
@@ -0,0 +1,1137 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT RESPONSE MODULE
+*
+* Filename      : http-c_resp.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define    MICRIUM_SOURCE
+#define    HTTPc_RESP_MODULE
+
+#include  
+#include  
+
+#include  "http-c_resp.h"
+#include  "http-c_conn.h"
+#include  "http-c_sock.h"
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+#include  "http-c_websock.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static         void               HTTPcResp_ParseStatusLine    (       HTTPc_CONN        *p_conn,
+                                                                       HTTPc_ERR         *p_err);
+
+static         HTTP_PROTOCOL_VER  HTTPcResp_ParseProtocolVer   (const  CPU_CHAR          *p_resp_line,
+                                                                       CPU_INT32U         str_len);
+
+static         HTTP_STATUS_CODE   HTTPcResp_ParseStatusCode    (const  CPU_CHAR          *p_resp_line,
+                                                                       CPU_INT32U         str_len);
+
+static  const  CPU_CHAR          *HTTPcResp_ParseReasonPhrase  (const  CPU_CHAR          *p_resp_line,
+                                                                       CPU_INT32U         str_len,
+                                                                       HTTP_STATUS_CODE   status_code);
+
+static         void               HTTPcResp_ParseHdr           (       HTTPc_CONN        *p_conn,
+                                                                       HTTPc_ERR         *p_err);
+
+static         void               HTTPcResp_Body               (       HTTPc_CONN        *p_conn,
+                                                                       HTTPc_ERR         *p_err);
+
+static         void               HTTPcResp_BodyStd            (       HTTPc_CONN        *p_conn,
+                                                                       HTTPc_ERR         *p_err);
+
+static         void               HTTPcResp_BodyChunk          (       HTTPc_CONN        *p_conn,
+                                                                       HTTPc_ERR         *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                             HTTPcResp()
+*
+* Description : Main HTTP response processing function.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                          Response processing operation successful.
+*                               HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED   More data required to continue processing.
+*                               HTTPc_ERR_CONN_INVALID_STATE            Invalid Connection state.
+*
+*                               ------------ RETURNED BY HTTPcSock_ConnDataRx() ------------
+*                               See HTTPcSock_ConnDataRx() for additional return error codes.
+*
+*                               ------------ RETURNED BY HTTPcResp_ParseStatusLine() ------------
+*                               See HTTPcResp_ParseStatusLine() for additional return error codes.
+*
+*                               ------------ RETURNED BY HTTPcResp_ParseHdr() ------------
+*                               See HTTPcResp_ParseHdr() for additional return error codes.
+*
+*                               ------------ RETURNED BY HTTPcResp_Body() ------------
+*                               See HTTPcResp_Body() for additional return error codes
+*
+* Return(s)   : DEF_YES, if response processing is complete successfully.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPcTask_Handler().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcResp (HTTPc_CONN  *p_conn,
+                        HTTPc_ERR   *p_err)
+{
+    CPU_BOOLEAN        rx_data;
+    CPU_BOOLEAN        process;
+    CPU_BOOLEAN        sock_rdy_rd;
+    CPU_BOOLEAN        sock_rdy_err;
+    CPU_BOOLEAN        done;
+
+
+    done    = DEF_NO;
+    process = DEF_NO;
+    rx_data = DEF_BIT_IS_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+
+    if (rx_data == DEF_YES) {
+
+        sock_rdy_rd  = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPc_FLAG_SOCK_RDY_RD);
+        sock_rdy_err = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPc_FLAG_SOCK_RDY_ERR);
+
+        if((sock_rdy_rd  == DEF_YES) ||
+           (sock_rdy_err == DEF_YES)) {
+
+            process = HTTPcSock_ConnDataRx(p_conn, DEF_NULL, p_err);
+            switch (*p_err) {
+                case HTTPc_ERR_NONE:
+                case HTTPc_ERR_CONN_SOCK_RX:
+                     break;
+
+
+                default:
+                     goto exit;
+            }
+        }
+    }
+
+    switch (p_conn->State) {
+        case HTTPc_CONN_STATE_RESP_INIT:
+             DEF_BIT_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+             if (process == DEF_YES) {
+                 DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                 p_conn->State = HTTPc_CONN_STATE_RESP_STATUS_LINE;
+             }
+            *p_err = HTTPc_ERR_NONE;
+             break;
+
+
+        case HTTPc_CONN_STATE_RESP_STATUS_LINE:
+             HTTPcResp_ParseStatusLine(p_conn, p_err);
+             switch (*p_err) {
+                 case HTTPc_ERR_NONE:
+                      DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                      p_conn->State = HTTPc_CONN_STATE_RESP_HDR;
+                      break;
+
+
+                 case HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED:
+                      DEF_BIT_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                      break;
+
+
+                 default:
+                      break;
+             }
+             break;
+
+
+        case HTTPc_CONN_STATE_RESP_HDR:
+             HTTPcResp_ParseHdr(p_conn, p_err);
+             switch (*p_err) {
+                 case HTTPc_ERR_NONE:
+                      DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                      p_conn->State = HTTPc_CONN_STATE_RESP_BODY;
+                      break;
+
+
+                 case HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED:
+                      DEF_BIT_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                      break;
+
+
+                 default:
+                      break;
+             }
+             break;
+
+
+        case HTTPc_CONN_STATE_RESP_BODY:
+        case HTTPc_CONN_STATE_RESP_BODY_CHUNK_SIZE:
+        case HTTPc_CONN_STATE_RESP_BODY_CHUNK_DATA:
+        case HTTPc_CONN_STATE_RESP_BODY_CHUNK_LAST:
+             HTTPcResp_Body(p_conn, p_err);
+             switch (*p_err) {
+                case HTTPc_ERR_NONE:
+                     DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                     p_conn->State = HTTPc_CONN_STATE_RESP_COMPLETED;
+                     break;
+
+
+                case HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED:
+                     DEF_BIT_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                     break;
+
+
+                default:
+                     break;
+             }
+             break;
+
+
+        case HTTPc_CONN_STATE_RESP_COMPLETED:
+             done          = DEF_YES;
+             p_conn->State = HTTPc_CONN_STATE_COMPLETED;
+            *p_err         = HTTPc_ERR_NONE;
+             break;
+
+
+        default:
+            *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+             break;
+    }
+
+
+exit:
+    return(done);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcResp_ParseStatusLine()
+*
+* Description : (1) HTTP Response status line processing :
+*                   (a) Parse HTTP protocol version received.
+*                   (b) Parse Status Code received.
+*                   (c) Parse Reason phrase received.
+*
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                          Status Line successfully parsed.
+*                               HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED
+*                               HTTPc_ERR_RESP_INVALID_FORMAT
+*                               HTTPc_ERR_RESP_INVALID_PROTOCOL_VER
+*                               HTTPc_ERR_RESP_INVALID_STATUS_CODE
+*                               HTTPc_ERR_RESP_INVALID_REASON_PHRASE
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcResp_ParseStatusLine (HTTPc_CONN  *p_conn,
+                                         HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ   *p_req;
+    HTTPc_RESP  *p_resp;
+    CPU_CHAR    *p_resp_line_start;
+    CPU_CHAR    *p_resp_line_end;
+    CPU_SIZE_T   len;
+
+
+    p_req  = p_conn->ReqListHeadPtr;
+    p_resp = p_req->RespPtr;
+
+    len = p_conn->RxDataLenRem;
+
+    if (len <= sizeof(HTTP_STR_METHOD_GET)) {
+       *p_err = HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED;
+        return;
+    }
+
+                                                                /* ------------ RETRIEVE RESP STATUS LINE ------------- */
+                                                                /* Search beginning and remove white spaces before Resp.*/
+    p_resp_line_start = HTTP_StrGraphSrchFirst(p_conn->RxBufPtr, len);
+    if (p_resp_line_start == DEF_NULL) {
+       *p_err = HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED;
+        return;
+    }
+
+                                                                /* Find end of resp status line.                        */
+    len -= (p_resp_line_start - p_conn->BufPtr);
+    p_resp_line_end = Str_Str_N(p_resp_line_start, STR_CR_LF, len);
+    if (p_resp_line_end == DEF_NULL) {
+       *p_err = HTTPc_ERR_RESP_FORMAT_INVALID;
+        return;
+    }
+
+    len = p_resp_line_end - p_resp_line_start;
+                                                                /* ---------- PARSE RESPONSE PROTOCOL VERSION --------- */
+    p_resp->ProtocolVer = HTTPcResp_ParseProtocolVer(p_resp_line_start, len);
+    switch(p_resp->ProtocolVer) {
+        case HTTP_PROTOCOL_VER_1_1:
+             break;
+
+
+        case HTTP_PROTOCOL_VER_1_0:
+        case HTTP_PROTOCOL_VER_0_9:
+        case HTTP_PROTOCOL_VER_UNKNOWN:
+        default:
+            *p_err = HTTPc_ERR_RESP_PROTOCOL_VER_INVALID;
+             return;
+    }
+
+                                                                /* ------------ FIND SPACE IN STATUS LINE ------------- */
+    p_resp_line_start = Str_Char_N(p_resp_line_start, len, ASCII_CHAR_SPACE);
+    if (p_resp_line_start == DEF_NULL) {
+       *p_err = HTTPc_ERR_RESP_FORMAT_INVALID;
+        return;
+    }
+    p_resp_line_start++;
+    len = p_resp_line_end - p_resp_line_start;
+                                                                /* ------------ PARSE RESPONSE STATUS CODE ------------ */
+    p_resp->StatusCode = HTTPcResp_ParseStatusCode(p_resp_line_start, len);
+    switch (p_resp->StatusCode) {
+        case  HTTP_STATUS_OK:
+        case  HTTP_STATUS_CREATED:
+        case  HTTP_STATUS_ACCEPTED:
+        case  HTTP_STATUS_NO_CONTENT:
+        case  HTTP_STATUS_RESET_CONTENT:
+        case  HTTP_STATUS_MOVED_PERMANENTLY:
+        case  HTTP_STATUS_FOUND:
+        case  HTTP_STATUS_SEE_OTHER:
+        case  HTTP_STATUS_NOT_MODIFIED:
+        case  HTTP_STATUS_USE_PROXY:
+        case  HTTP_STATUS_TEMPORARY_REDIRECT:
+        case  HTTP_STATUS_BAD_REQUEST:
+        case  HTTP_STATUS_UNAUTHORIZED:
+        case  HTTP_STATUS_FORBIDDEN:
+        case  HTTP_STATUS_NOT_FOUND:
+        case  HTTP_STATUS_METHOD_NOT_ALLOWED:
+        case  HTTP_STATUS_NOT_ACCEPTABLE:
+        case  HTTP_STATUS_REQUEST_TIMEOUT:
+        case  HTTP_STATUS_CONFLICT:
+        case  HTTP_STATUS_GONE:
+        case  HTTP_STATUS_LENGTH_REQUIRED:
+        case  HTTP_STATUS_PRECONDITION_FAILED:
+        case  HTTP_STATUS_REQUEST_ENTITY_TOO_LARGE:
+        case  HTTP_STATUS_REQUEST_URI_TOO_LONG:
+        case  HTTP_STATUS_UNSUPPORTED_MEDIA_TYPE:
+        case  HTTP_STATUS_REQUESTED_RANGE_NOT_SATISFIABLE:
+        case  HTTP_STATUS_EXPECTATION_FAILED:
+        case  HTTP_STATUS_INTERNAL_SERVER_ERR:
+        case  HTTP_STATUS_NOT_IMPLEMENTED:
+        case  HTTP_STATUS_SERVICE_UNAVAILABLE:
+        case  HTTP_STATUS_HTTP_VERSION_NOT_SUPPORTED:
+        case  HTTP_STATUS_SWITCHING_PROTOCOLS:
+              break;
+
+
+        case  HTTP_STATUS_UNKOWN:
+        default:
+            *p_err = HTTPc_ERR_RESP_STATUS_CODE_INVALID;
+             return;
+    }
+
+                                                                /* ------------ FIND SPACE IN STATUS LINE ------------- */
+    p_resp_line_start = Str_Char_N(p_resp_line_start, len, ASCII_CHAR_SPACE);
+    if (p_resp_line_start == DEF_NULL) {
+       *p_err = HTTPc_ERR_RESP_FORMAT_INVALID;
+        return;
+    }
+    p_resp_line_start++;
+    len = p_resp_line_end - p_resp_line_start;
+
+                                                                /* ----------- PARSE RESPONSE REASON PHRASE ----------- */
+    p_resp->ReasonPhrasePtr = HTTPcResp_ParseReasonPhrase(p_resp_line_start, len, p_resp->StatusCode);
+    if (p_resp->ReasonPhrasePtr == DEF_NULL) {
+       *p_err = HTTPc_ERR_RESP_REASON_PHRASE_INVALID;
+        return;
+    }
+
+                                                                /* -------------- UPDATE CONN RX PARAMS --------------- */
+    p_resp_line_end      +=  STR_CR_LF_LEN;
+    p_conn->RxDataLenRem -= (p_resp_line_end - p_conn->RxBufPtr);
+    p_conn->RxBufPtr      =  p_resp_line_end;
+
+   *p_err = HTTPc_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcResp_ParseProtocolVer()
+*
+* Description : Find HTTP Protocol version in the HTTP response received.
+*
+* Argument(s) : p_resp_line     Pointer to Response status line received.
+*
+*               str_len         Length of the response status line.
+*
+* Return(s)   : HTTP protocol version.
+*
+* Caller(s)   : HTTPcResp_ParseStatusLine().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  HTTP_PROTOCOL_VER  HTTPcResp_ParseProtocolVer (const  CPU_CHAR    *p_resp_line,
+                                                              CPU_INT32U   str_len)
+{
+    HTTP_PROTOCOL_VER  ver;
+
+    ver = (HTTP_PROTOCOL_VER)HTTP_Dict_KeyGet(HTTP_Dict_ProtocolVer,
+                                              HTTP_Dict_ProtocolVerSize,
+                                              p_resp_line,
+                                              DEF_YES,
+                                              str_len);
+    switch (ver) {
+        case HTTP_PROTOCOL_VER_0_9:
+        case HTTP_PROTOCOL_VER_1_0:
+        case HTTP_PROTOCOL_VER_1_1:
+             break;
+
+        default:
+            return (HTTP_PROTOCOL_VER_UNKNOWN);
+    }
+
+    return ((HTTP_PROTOCOL_VER)ver);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcResp_ParseStatusCode()
+*
+* Description : Find HTTP Status Code in the HTTP Response received.
+*
+* Argument(s) : p_resp_line     Pointer to the HTTP Response status line received.
+*
+*               str_len         Length of the Response status line.
+*
+* Return(s)   : HTTP status code.
+*
+* Caller(s)   : HTTPcResp_ParseStatusLine().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  HTTP_STATUS_CODE  HTTPcResp_ParseStatusCode (const  CPU_CHAR    *p_resp_line,
+                                                            CPU_INT32U   str_len)
+{
+    HTTP_STATUS_CODE  status_code;
+
+    status_code = (HTTP_STATUS_CODE)HTTP_Dict_KeyGet(HTTP_Dict_StatusCode,
+                                                     HTTP_Dict_StatusCodeSize,
+                                                     p_resp_line,
+                                                     DEF_YES,
+                                                     str_len);
+
+    if (status_code >= HTTP_STATUS_UNKOWN) {
+        return (HTTP_STATUS_UNKOWN);
+    }
+
+    return (status_code);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcResp_ParseReasonPhrase()
+*
+* Description : Find HTTP Reason Phrase in the HTTP Response received.
+*
+* Argument(s) : p_resp_line     Pointer to the HTTP Response status line received.
+*
+*               str_len         Length of the Response status line.
+*
+*               status_code     Status code number received.
+*
+* Return(s)   : Pointer to the Reason phrase associated with the status code saved in the HTTP libraries.
+*
+* Caller(s)   : HTTPcResp_ParseStatusLine().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  const  CPU_CHAR  *HTTPcResp_ParseReasonPhrase (const  CPU_CHAR          *p_resp_line,
+                                                              CPU_INT32U         str_len,
+                                                              HTTP_STATUS_CODE   status_code)
+{
+    HTTP_DICT  *p_entry;
+
+
+    p_entry = HTTP_Dict_EntryGet(            HTTP_Dict_ReasonPhrase,
+                                             HTTP_Dict_ReasonPhraseSize,
+                                 (CPU_INT32U)status_code);
+
+    return (p_entry->StrPtr);
+}
+
+/*
+*********************************************************************************************************
+*                                         HTTPcResp_ParseHdr()
+*
+* Description : Parse all the headers received in the HTTP response.
+*
+* Argument(s) : p_conn      Pointer to the current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                          Headers parsing successful.
+*                               HTTPc_ERR_RESP_HDR_MALFORMED            Malformed header received.
+*                               HTTPc_ERR_RESP_HDR_INVALID              Invalid arguments with header.
+*                               HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED   More data needed.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcResp_ParseHdr (HTTPc_CONN  *p_conn,
+                                  HTTPc_ERR   *p_err)
+{
+    HTTPc_REQ                     *p_req;
+    HTTPc_RESP                    *p_resp;
+    CPU_CHAR                      *p_field_start;
+    CPU_CHAR                      *p_field_end;
+    CPU_CHAR                      *p_val;
+    HTTP_HDR_FIELD                 hdr_field;
+    HTTP_HDR_FIELD_CONN_VAL        hdr_con_val;
+    HTTP_CONTENT_TYPE              content_type;
+    CPU_INT32U                     content_len;
+    HTTP_HDR_FIELD_TRANSFER_TYPE   transfer_type;
+    CPU_INT16U                     len;
+#if (HTTPc_CFG_HDR_RX_EN == DEF_ENABLED)
+    HTTPc_CONN_OBJ                *p_conn_const;
+    HTTPc_REQ_OBJ                 *p_req_const;
+    HTTP_DICT                     *p_entry;
+#endif
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    HTTPc_WEBSOCK_REQ             *p_ws_req;
+    CPU_BOOLEAN                    is_matched;
+    CPU_INT32U                     version;
+#endif
+
+    p_req   = p_conn->ReqListHeadPtr;
+    p_resp  = p_req->RespPtr;
+
+    p_field_start = p_conn->RxBufPtr;
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    p_ws_req      = p_req->WebSockPtr;
+#endif
+    while (DEF_TRUE) {
+
+        p_field_end = Str_Str_N(p_field_start,                  /* Find end of header field.                            */
+                                STR_CR_LF,
+                                p_conn->RxDataLenRem);
+
+        if ((p_field_end != DEF_NULL     ) &&                   /* If the field and value are present.                  */
+            (p_field_end  > p_field_start)) {
+
+            len = p_field_end - p_field_start;
+
+            hdr_field = (HTTP_HDR_FIELD)HTTP_Dict_KeyGet(HTTP_Dict_HdrField,
+                                                         HTTP_Dict_HdrFieldSize,
+                                                         p_field_start,
+                                                         DEF_YES,
+                                                         len);
+
+            switch (hdr_field) {
+                case HTTP_HDR_FIELD_CONN:
+                                                                /* Get field val beginning.                             */
+                     p_val = HTTP_HdrParseFieldValueGet(p_field_start,
+                                                        HTTP_STR_HDR_FIELD_CONN_LEN,
+                                                        p_field_end,
+                                                       &len);
+                     if (p_val == DEF_NULL) {
+                        *p_err = HTTPc_ERR_RESP_HDR_MALFORMED;
+                         goto exit;
+                     }
+
+                     len = p_field_end - p_val;
+
+                     hdr_con_val = (HTTP_HDR_FIELD_CONN_VAL)HTTP_Dict_KeyGet(HTTP_Dict_HdrFieldConnVal,
+                                                                             HTTP_Dict_HdrFieldConnValSize,
+                                                                             p_val,
+                                                                             DEF_NO,
+                                                                             len);
+                     switch (hdr_con_val) {
+                         case HTTP_HDR_FIELD_CONN_CLOSE:
+                              DEF_BIT_SET(p_conn->Flags, HTTPc_FLAG_CONN_TO_CLOSE);
+                              p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_NO_PERSISTENT;
+                              break;
+
+                         case HTTP_HDR_FIELD_CONN_PERSISTENT:
+                              break;
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+                         case HTTP_HDR_FIELD_CONN_UPGRADE:
+                              DEF_BIT_SET(p_ws_req->Flags, HTTPc_FLAG_WEBSOCK_REQ_CONN_UPGRADE);
+                              break;
+#endif
+                         case HTTP_HDR_FIELD_CONN_UNKNOWN:
+                         default:
+                             *p_err = HTTPc_ERR_RESP_HDR_INVALID;
+                              goto exit;
+                     }
+                     break;
+
+
+                case HTTP_HDR_FIELD_CONTENT_TYPE:
+                                                                /* Get field val beginning.                             */
+                     p_val = HTTP_HdrParseFieldValueGet(p_field_start,
+                                                        HTTP_STR_HDR_FIELD_CONTENT_TYPE_LEN,
+                                                        p_field_end,
+                                                       &len);
+                     if (p_val == DEF_NULL) {
+                        *p_err = HTTPc_ERR_RESP_HDR_MALFORMED;
+                         goto exit;
+                     }
+
+                     len = p_field_end - p_val;
+
+                     content_type = (HTTP_CONTENT_TYPE)HTTP_Dict_KeyGet(HTTP_Dict_ContentType,
+                                                                        HTTP_Dict_ContentTypeSize,
+                                                                        p_val,
+                                                                        DEF_NO,
+                                                                        len);
+                     if (content_type == HTTP_CONTENT_TYPE_UNKNOWN) {
+                        *p_err = HTTPc_ERR_RESP_CONTENT_TYPE_INVALID;
+                         goto exit;
+                     }
+
+                     p_resp->ContentType = content_type;
+                     break;
+
+
+                case HTTP_HDR_FIELD_CONTENT_LEN:
+                                                                /* Get field val beginning.                             */
+                     p_val = HTTP_HdrParseFieldValueGet(p_field_start,
+                                                        HTTP_STR_HDR_FIELD_CONTENT_LEN_LEN,
+                                                        p_field_end,
+                                                       &len);
+                     if (p_val == DEF_NULL) {
+                        *p_err = HTTPc_ERR_RESP_HDR_MALFORMED;
+                         goto exit;
+                     }
+
+                     content_len = Str_ParseNbr_Int32U(p_val, 0, DEF_NBR_BASE_DEC);
+
+                     if (content_len <= 0u) {
+                        *p_err = HTTPc_ERR_RESP_CONTENT_LEN_INVALID;
+                         goto exit;
+                     }
+
+                     p_resp->ContentLen = content_len;
+                     break;
+
+
+                case HTTP_HDR_FIELD_TRANSFER_ENCODING:
+                                                                /* Get field val beginning.                             */
+                     p_val = HTTP_HdrParseFieldValueGet(p_field_start,
+                                                        HTTP_STR_HDR_FIELD_TRANSFER_ENCODING_LEN,
+                                                        p_field_end,
+                                                       &len);
+                     if (p_val == DEF_NULL) {
+                        *p_err = HTTPc_ERR_RESP_HDR_MALFORMED;
+                         goto exit;
+                     }
+
+                     len = p_field_end - p_val;
+
+                     transfer_type = (HTTP_HDR_FIELD_TRANSFER_TYPE)HTTP_Dict_KeyGet(HTTP_Dict_HdrFieldTransferTypeVal,
+                                                                                    HTTP_Dict_HdrFieldTransferTypeValSize,
+                                                                                    p_val,
+                                                                                    DEF_NO,
+                                                                                    len);
+                     if (transfer_type != HTTP_HDR_FIELD_TRANSFER_TYPE_CHUNCKED) {
+                        *p_err = HTTPc_ERR_RESP_HDR_INVALID;
+                         goto exit;
+                     }
+                     DEF_BIT_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_BODY_CHUNK_TRANSFER);
+                     break;
+
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+                case HTTP_HDR_FIELD_UPGRADE:
+                                                                /* Get field val beginning.                             */
+                     p_val = HTTP_HdrParseFieldValueGet(p_field_start,
+                                                        HTTP_STR_HDR_FIELD_UPGRADE_LEN,
+                                                        p_field_end,
+                                                       &len);
+                     if (p_val == DEF_NULL) {
+                        *p_err = HTTPc_ERR_RESP_HDR_MALFORMED;
+                         goto exit;
+                     }
+
+                     len = p_field_end - p_val;
+
+                     hdr_con_val = (HTTP_HDR_FIELD_CONN_VAL)HTTP_Dict_KeyGet(HTTP_Dict_HdrFieldUpgradeVal,
+                                                                             HTTP_Dict_HdrFieldUpgradeValSize,
+                                                                             p_val,
+                                                                             DEF_NO,
+                                                                             len);
+                     switch (hdr_con_val) {
+                         case HTTP_HDR_FIELD_UPGRADE_WEBSOCKET:
+                              DEF_BIT_SET(p_ws_req->Flags, HTTPc_FLAG_WEBSOCK_REQ_UPGRADE_WEBSOCKET);
+                              break;
+
+                         default:
+                             *p_err = HTTPc_ERR_RESP_HDR_INVALID;
+                              goto exit;
+                     }
+                     break;
+
+
+              case HTTP_HDR_FIELD_WEBSOCKET_ACCEPT:
+                                                                 /* Get field val beginning.                            */
+                   p_val = HTTP_HdrParseFieldValueGet(p_field_start,
+                                                      HTTP_STR_HDR_FIELD_WEBSOCKET_ACCEPT_LEN,
+                                                      p_field_end,
+                                                     &len);
+                   if (p_val == DEF_NULL) {
+                      *p_err = HTTPc_ERR_RESP_HDR_MALFORMED;
+                       goto exit;
+                   }
+
+                   len = p_field_end - p_val;
+                                                                /* Validate the websocket field.                        */
+
+                   is_matched = Mem_Cmp(p_ws_req->Accept, p_val, HTTPc_WEBSOCK_KEY_HASH_ENCODED_LEN - 1);
+
+                   if (is_matched == DEF_YES) {
+                       DEF_BIT_SET(p_ws_req->Flags, HTTPc_FLAG_WEBSOCK_REQ_ACCEPT_VALIDATED);
+                   }
+                   break;
+
+
+              case HTTP_HDR_FIELD_WEBSOCKET_VERSION:
+                                                               /* Get field val beginning.                              */
+                   p_val = HTTP_HdrParseFieldValueGet( p_field_start,
+                                                       HTTP_STR_HDR_FIELD_WEBSOCKET_VERSION_LEN,
+                                                       p_field_end,
+                                                      &len);
+                   if (p_val == DEF_NULL) {
+                      *p_err = HTTPc_ERR_RESP_HDR_MALFORMED;
+                       goto exit;
+                   }
+                   version = Str_ParseNbr_Int32U (p_val,DEF_NULL,DEF_NBR_BASE_DEC);
+
+                   if (version == HTTPc_WEBSOCK_PROTOCOL_VERSION_13) {
+                       DEF_BIT_SET(p_ws_req->Flags, HTTPc_FLAG_WEBSOCK_REQ_VERSION_VALIDATED);
+                   }
+                   break;
+#endif
+
+                default:
+#if (HTTPc_CFG_HDR_RX_EN == DEF_ENABLED)
+                     p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+                     p_req_const  = (HTTPc_REQ_OBJ *)p_req;
+
+                     p_entry = HTTP_Dict_EntryGet(HTTP_Dict_HdrField,
+                                                  HTTP_Dict_HdrFieldSize,
+                                                  hdr_field);
+                     if (p_entry != DEF_NULL) {
+
+                                                            /* Get field val beginning.                             */
+                         p_val = HTTP_HdrParseFieldValueGet(p_field_start,
+                                                            p_entry->StrLen,
+                                                            p_field_end,
+                                                           &len);
+                         if (p_val == DEF_NULL) {
+                            *p_err = HTTPc_ERR_RESP_HDR_MALFORMED;
+                             goto exit;
+                         }
+
+                         len = p_field_end - p_val;
+
+                         if (p_req->OnHdrRx != DEF_NULL) {
+                             p_req->OnHdrRx(p_conn_const, p_req_const, hdr_field, p_val, len);
+                         }
+                     }
+#endif
+                     break;
+            }
+
+                                                                /* --------------- UPDATE RX CONN PARAM --------------- */
+            p_field_end          += STR_CR_LF_LEN;
+            p_conn->RxDataLenRem -= p_field_end - p_field_start;
+            p_field_start         = p_field_end;
+            p_conn->RxBufPtr      = p_field_start;
+           *p_err = HTTPc_ERR_NONE;
+
+        } else if (p_field_end == p_field_start) {              /* All field processed.                                 */
+            p_conn->RxBufPtr     += STR_CR_LF_LEN;
+            p_conn->RxDataLenRem -= STR_CR_LF_LEN;
+           *p_err = HTTPc_ERR_NONE;
+            goto exit;
+
+        } else {                                                /* More data req'd to complete processing.              */
+           *p_err = HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED;
+            goto exit;
+        }
+
+    }
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPcResp_Body()
+*
+* Description : Process Response body received.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                           ------------ RETURNED BY  HTTPcResp_BodyChunk() ------------
+*                           See HTTPcResp_BodyChunk() for additional return error codes.
+*
+*                           ------------ RETURNED BY HTTPcResp_BodyStd() ------------
+*                           See HTTPcResp_BodyStd() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcResp_Body (HTTPc_CONN  *p_conn,
+                              HTTPc_ERR   *p_err)
+{
+    CPU_BOOLEAN   chunk_transfer;
+
+
+    chunk_transfer = DEF_BIT_IS_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_BODY_CHUNK_TRANSFER);
+
+    if (chunk_transfer == DEF_YES) {
+        HTTPcResp_BodyChunk(p_conn, p_err);
+    } else {
+        HTTPcResp_BodyStd(p_conn, p_err);
+    }
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcResp_BodyStd()
+*
+* Description : Process HTTP response body received with the Content-Length header.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                          Body successfully rx and process.
+*                               HTTPc_ERR_RESP_RX_DATA_LEN_INVALID      Invalid data length received.
+*                               HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED   More data to received.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp_Body().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcResp_BodyStd (HTTPc_CONN  *p_conn,
+                                 HTTPc_ERR   *p_err)
+{
+    HTTPc_CONN_OBJ   *p_conn_const;
+    HTTPc_REQ         *p_req;
+    HTTPc_REQ_OBJ     *p_req_const;
+    HTTPc_RESP        *p_resp;
+    CPU_CHAR          *p_buf;
+    CPU_INT32U         content_len;
+    CPU_INT32U         content_len_rem;
+    CPU_INT32U         content_len_chunk;
+    CPU_INT32U         data_len_read;
+    CPU_BOOLEAN        last_chunk;
+
+
+    p_conn_const     = (HTTPc_CONN_OBJ *)p_conn;
+    p_req            =  p_conn->ReqListHeadPtr;
+    p_req_const      = (HTTPc_REQ_OBJ *)p_req;
+    p_resp           =  p_req->RespPtr;
+    content_len      =  p_resp->ContentLen;
+    p_buf            =  p_conn->RxBufPtr;
+    content_len_rem  =  content_len - p_conn->RxDataLen ;
+
+    if (content_len_rem >= p_conn->RxDataLenRem) {
+        content_len_chunk = p_conn->RxDataLenRem;
+    } else {
+        content_len_chunk = content_len_rem;
+    }
+    p_conn->RxDataLen += content_len_chunk;
+
+
+    last_chunk = DEF_NO;
+    if (p_conn->RxDataLen == content_len) {
+        last_chunk = DEF_YES;
+       *p_err = HTTPc_ERR_NONE;
+    } else {
+       *p_err = HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED;
+    }
+
+
+    if (p_req->OnBodyRx != DEF_NULL) {
+        data_len_read = p_req->OnBodyRx( p_conn_const,
+                                         p_req_const,
+                                         p_resp->ContentType,
+                                         p_buf,
+                                         content_len_chunk,
+                                         last_chunk);
+        p_conn->RxDataLen    -= content_len_chunk - data_len_read;
+        p_conn->RxBufPtr     += data_len_read;
+        p_conn->RxDataLenRem -= data_len_read;
+
+    } else {
+        p_conn->RxBufPtr     += content_len_chunk;
+        p_conn->RxDataLenRem -= content_len_chunk;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcResp_BodyChunk()
+*
+* Description : Process Response body received with the chunked transfer encoding.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                          Body successfully received.
+*                               HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED   More data to received.
+*                               HTTPc_ERR_RESP_CHUNK_INVALID            Invalid chunk received.
+*                               HTTPc_ERR_CONN_INVALID_STATE            Invalid Connection state.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp_Body().
+*
+* Note(s)     : (1) Chunk Extensions located after chunk size are not supported.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcResp_BodyChunk (HTTPc_CONN  *p_conn,
+                                   HTTPc_ERR   *p_err)
+{
+    HTTPc_CONN_OBJ    *p_conn_const;
+    HTTPc_REQ         *p_req;
+    HTTPc_REQ_OBJ     *p_req_const;
+    HTTPc_RESP        *p_resp;
+    CPU_CHAR          *p_size_start;
+    CPU_CHAR          *p_size_end;
+    CPU_CHAR          *p_chunk_start;
+    CPU_CHAR          *p_chunk_end;
+    CPU_CHAR          *p_str;
+    CPU_INT32U         chunk_len;
+    CPU_INT32U         buf_len;
+    CPU_INT32U         data_len;
+    CPU_INT32U         data_len_read = 0;
+
+
+    p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+    p_req        =  p_conn->ReqListHeadPtr;
+    p_req_const  = (HTTPc_REQ_OBJ *)p_req;
+    p_resp       =  p_req->RespPtr;
+
+    buf_len      = p_conn->BufLen - p_conn->RxDataLenRem;
+
+    while (DEF_TRUE) {
+        switch (p_conn->State) {
+            case HTTPc_CONN_STATE_RESP_BODY:
+            case HTTPc_CONN_STATE_RESP_BODY_CHUNK_SIZE:
+                 p_size_start = p_conn->RxBufPtr;
+
+                 p_size_end = Str_Str_N(p_size_start,           /* Find end of size of chunk.                           */
+                                         STR_CR_LF,
+                                         p_conn->RxDataLenRem);
+                 if (p_size_end == DEF_NULL) {
+                    *p_err = HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED;
+                     goto exit;
+                 }
+                                                                /* Convert the hexadecimal string to 32 bits integer.  */
+                 chunk_len = Str_ParseNbr_Int32U(p_size_start, &p_str, 16);
+                 if (p_str == p_size_start) {
+                    *p_err = HTTPc_ERR_RESP_CHUNK_INVALID;
+                     goto exit;
+                 }
+
+                 p_conn->RxDataLen = chunk_len;
+
+                 p_size_end           += STR_CR_LF_LEN;
+                 p_conn->RxDataLenRem -= p_size_end - p_size_start;
+                 p_conn->RxBufPtr      = p_size_end;
+
+                 if (chunk_len == 0) {
+                     p_conn->State = HTTPc_CONN_STATE_RESP_BODY_CHUNK_LAST;
+                 } else {
+                     p_conn->State = HTTPc_CONN_STATE_RESP_BODY_CHUNK_DATA;
+                 }
+                 break;
+
+
+            case HTTPc_CONN_STATE_RESP_BODY_CHUNK_DATA:
+                 p_chunk_start = p_conn->RxBufPtr;
+
+                 p_chunk_end = Str_Str_N(p_chunk_start,         /* Find end of chunk data.                              */
+                                         STR_CR_LF,
+                                         p_conn->RxDataLenRem);
+                 if (p_chunk_end == DEF_NULL) {
+                     if (buf_len > 0) {
+                        *p_err = HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED; /* buf not full, go get more data.              */
+                         goto exit;
+                     } else {
+                         data_len = p_conn->RxDataLenRem;       /* Part of chunk received in buffer.                    */
+                         p_conn->RxDataLen -= data_len;
+                     }
+                 } else {
+                     data_len = p_conn->RxDataLen;              /* End of chunk received in buffer.                     */
+                 }
+
+                 if (p_req->OnBodyRx != DEF_NULL) {
+                                                                /* Pass data rx to application.                         */
+                     data_len_read = p_req->OnBodyRx( p_conn_const,
+                                                      p_req_const,
+                                                      p_resp->ContentType,
+                                                      p_conn->RxBufPtr,
+                                                      data_len,
+                                                      DEF_NO);
+                 } else {
+                     data_len_read = data_len;
+                 }
+
+                 if (p_chunk_end   != DEF_NULL) {
+                     if (data_len_read == data_len) {
+                        p_chunk_end          += STR_CR_LF_LEN;
+                        p_conn->RxDataLenRem -= p_chunk_end - p_chunk_start;
+                        p_conn->RxBufPtr      = p_chunk_end;
+                        p_conn->State         = HTTPc_CONN_STATE_RESP_BODY_CHUNK_SIZE;
+                     } else {
+                         p_conn->RxDataLenRem -= data_len_read;
+                         p_conn->RxBufPtr      = p_chunk_start + data_len_read;
+                     }
+                 } else {
+                     p_conn->RxDataLenRem -= data_len_read;
+                     p_conn->RxBufPtr      = p_chunk_start + data_len_read;
+                    *p_err = HTTPc_ERR_TRANS_RX_MORE_DATA_REQUIRED;
+                     goto exit;
+                 }
+                 break;
+
+
+            case HTTPc_CONN_STATE_RESP_BODY_CHUNK_LAST:
+                 if (p_req->OnBodyRx != DEF_NULL) {
+                     (void)p_req->OnBodyRx( p_conn_const,
+                                            p_req_const,
+                                            p_resp->ContentType,
+                                            DEF_NULL,
+                                            0,
+                                            DEF_YES);
+                 }
+                 p_conn->State = HTTPc_CONN_STATE_RESP_COMPLETED;
+                *p_err = HTTPc_ERR_NONE;
+                 goto exit;
+
+
+            default:
+                *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+                 goto exit;
+        }
+    }
+
+exit:
+    return;
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_resp.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_resp.h
new file mode 100644
index 0000000..34b23c1
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_resp.h
@@ -0,0 +1,109 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT RESPONSE MODULE
+*
+* Filename      : http-c_resp.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPc module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_RESP_MODULE_PRESENT                              /* See Note #1.                                         */
+#define  HTTPc_RESP_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         HTTPc INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+
+#include  
+#include  "../../Common/http.h"
+#include  "http-c.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcResp (HTTPc_CONN  *p_conn,
+                        HTTPc_ERR   *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_RESP_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_sock.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_sock.c
new file mode 100644
index 0000000..eb3f709
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_sock.c
@@ -0,0 +1,733 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      HTTP CLIENT SOCKET MODULE
+*
+* Filename      : http-c_sock.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define    MICRIUM_SOURCE
+#define    HTTPc_SOCK_MODULE
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+#include  
+
+#include  "http-c_sock.h"
+#include  "http-c_conn.h"
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+#include  "http-c_websock.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#define  HTTPc_SOCK_TIMEOUT_CONNECT_MS_DFLT               2000u
+#define  HTTPc_SOCK_TIMEOUT_CONNECT_MS_MAX               10000u
+#define  HTTPc_SOCK_TIMEOUT_CONNECT_MS_MIN                1000u
+
+#define  HTTPc_SOCK_TIMEOUT_INACTIVITY_S_DFLT               60u
+#define  HTTPc_SOCK_TIMEOUT_INACTIVITY_S_MAX               255u
+#define  HTTPc_SOCK_TIMEOUT_INACTIVITY_S_MIN                 1u
+
+#define  HTTPc_SOCK_SEL_TIMEOUT_MS                           1u
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcSock_Connect()
+*
+* Description : (1) Open Socket.
+*               (2) Connect to Server.
+*               (3) Set Inactivity Connection Timeout.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Connection with HTTP server successfully.
+*                               HTTPc_ERR_CONN_SOCK_OPEN        Opening socket error.
+*                               HTTPc_ERR_CONN_SOCK_CONN        Connect with server error.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask_Handler(),
+*               HTTPc_ConnGet().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcSock_Connect (HTTPc_CONN  *p_conn,
+                         HTTPc_ERR   *p_err)
+{
+    NET_APP_SOCK_SECURE_CFG   *p_secure_cfg;
+    NET_CONN_ID                conn_id_tcp;
+    NET_ERR                    err_net;
+    CPU_BOOLEAN                no_delay;
+
+
+#ifdef NET_SECURE_MODULE_EN
+    p_secure_cfg = &p_conn->SockSecureCfg;
+    if (p_secure_cfg->TrustCallback == DEF_NULL) {
+        p_secure_cfg = DEF_NULL;
+    } else {
+        if (p_secure_cfg->CommonName == DEF_NULL) {
+            p_secure_cfg->CommonName = p_conn->HostNamePtr;
+        }
+        if (p_conn->ServerPort == HTTP_DFLT_PORT_NBR) {
+            p_conn->ServerPort = HTTP_DFLT_PORT_NBR_SECURE;
+        }
+    }
+#else
+    p_secure_cfg = DEF_NULL;
+#endif
+
+    if (p_conn->ConnectTimeout_ms <= 0) {
+       *p_err = HTTPc_ERR_CONN_PARAM_CONNECT_TIMEOUT_INVALID;
+        goto exit;
+    }
+
+    if (p_conn->InactivityTimeout_s <= 0) {
+       *p_err = HTTPc_ERR_CONN_PARAM_INACTIVITY_TIMEOUT_INVALID;
+        goto exit;
+    }
+
+                                                                /* ---------------- RESOLVE HOST NAME ----------------- */
+    NetApp_ClientStreamOpenByHostname(&p_conn->SockID,
+                                       p_conn->HostNamePtr,
+                                       p_conn->ServerPort,
+                                      &p_conn->ServerSockAddr,
+                                       p_secure_cfg,
+                                       p_conn->ConnectTimeout_ms,
+                                      &err_net);
+    switch (err_net) {
+        case NET_APP_ERR_NONE:
+        case NET_APP_ERR_CONN_IN_PROGRESS:
+             break;
+
+        default:
+             p_conn->SockID = NET_SOCK_ID_NONE;
+            *p_err = HTTPc_ERR_CONN_SOCK_CONNECT;
+             goto exit;
+    }
+                                                                /* ---------------- CFG SOCK BLOCK OPT ---------------- */
+   (void)NetSock_CfgBlock(p_conn->SockID, NET_SOCK_BLOCK_SEL_NO_BLOCK, &err_net);
+    if (err_net != NET_SOCK_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SOCK_CONNECT;
+        goto exit_close;
+    }
+
+                                                                /* ----- SET SOCKET CONNECTION INACTIVITY TIMEOUT ----- */
+   (void)NetSock_OptSet(         p_conn->SockID,
+                                 NET_SOCK_PROTOCOL_TCP,
+                                 NET_SOCK_OPT_TCP_KEEP_IDLE,
+                        (void *)&p_conn->InactivityTimeout_s,
+                                 sizeof(p_conn->InactivityTimeout_s),
+                                &err_net);
+    if (err_net != NET_SOCK_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SOCK_CONNECT;
+        goto exit_close;
+    }
+
+                                                                /* --------------- SET NO DELAY FEATURE --------------- */
+    no_delay = DEF_FALSE;                                       /* Set to false to disable the naggle algorithm.        */
+   (void)NetSock_OptSet(         p_conn->SockID,
+                                 NET_SOCK_PROTOCOL_TCP,
+                                 NET_SOCK_OPT_TCP_NO_DELAY,
+                        (void *)&no_delay,
+                                 sizeof(no_delay),
+                                &err_net);
+    if (err_net != NET_SOCK_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SOCK_CONNECT;
+        goto exit_close;
+    }
+                                                                /* -------------- SET TCP CONNECTION MSL -------------- */
+    conn_id_tcp = NetSock_GetConnTransportID(p_conn->SockID, &err_net);
+    if (err_net != NET_SOCK_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SOCK_CONNECT;
+        goto exit_close;
+    }
+
+   (void)NetTCP_ConnCfgMSL_Timeout(conn_id_tcp, 0u, &err_net);
+    if (err_net != NET_TCP_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SOCK_CONNECT;
+        goto exit_close;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+    goto exit;
+
+
+exit_close:
+    NetSock_Close(p_conn->SockID, &err_net);
+    p_conn->SockID = NET_SOCK_ID_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcSock_ConnDataRx()
+*
+* Description : Receive data from the network and update connection.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               max_len     Specify the maximum length to get from the socket.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                   Data successfully received.
+*                               HTTPc_ERR_CONN_SOCK_RX           Transitory error.
+*                               HTTPc_ERR_CONN_SOCK_CONN_CLOSED  Connection is fully or half closed.
+*                               HTTPc_ERR_CONN_SOCK_RX_FATAL     Fatal error occurred.
+*
+* Return(s)   : DEF_OK,     if data received successfully.
+*               DEF_FAIL,   otherwise.
+*
+* Caller(s)   : HTTPcResp().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcSock_ConnDataRx (HTTPc_CONN  *p_conn,
+                                   CPU_INT32U   max_len,
+                                   HTTPc_ERR   *p_err)
+{
+    CPU_CHAR              *p_buf;
+    NET_SOCK_ADDR_LEN      addr_len_server;
+    CPU_INT16S             rx_len;
+    CPU_INT32U             buf_len;
+    CPU_BOOLEAN            rtn_val;
+    NET_ERR                err_net;
+
+
+    if (p_conn->RxDataLenRem > 0) {                             /* If data is still present in the rx buf.              */
+                                                                /* Move rem data to the beginning of the rx buf.        */
+        Mem_Copy(p_conn->BufPtr, p_conn->RxBufPtr, p_conn->RxDataLenRem);
+    }
+    p_conn->RxBufPtr = p_conn->BufPtr;
+
+    p_buf   = p_conn->BufPtr + p_conn->RxDataLenRem;
+    buf_len = p_conn->BufLen - (p_conn->RxDataLenRem + p_conn->TxDataLen);
+
+    if (buf_len == 0) {
+        rtn_val = DEF_OK;                                       /* HTTP buffer already full of data rx.                 */
+       *p_err   = HTTPc_ERR_NONE;
+        goto exit;
+    }
+    if (max_len != 0) {
+        buf_len = DEF_MIN(buf_len, max_len);
+    }
+    addr_len_server = sizeof(p_conn->ServerSockAddr);
+
+                                                                /* ------------------ RECEIVED DATA ------------------- */
+    rx_len = NetSock_RxDataFrom(        p_conn->SockID,
+                                (void *)p_buf,
+                                        buf_len,
+                                        NET_SOCK_FLAG_NO_BLOCK,
+                                       &p_conn->ServerSockAddr,
+                                       &addr_len_server,
+                                        DEF_NULL,
+                                        DEF_NULL,
+                                        DEF_NULL,
+                                       &err_net);
+    switch (err_net) {
+        case NET_SOCK_ERR_NONE:                                 /* Data received.                                       */
+        case NET_SOCK_ERR_INVALID_DATA_SIZE:
+             p_conn->RxDataLenRem += rx_len;
+             break;
+
+
+        case NET_ERR_RX:                                        /* Transitory rx err(s).                                */
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_SOCK_ERR_RX_Q_EMPTY:
+        case NET_ERR_FAULT_LOCK_ACQUIRE:
+             rtn_val = DEF_FAIL;
+            *p_err   = HTTPc_ERR_CONN_SOCK_RX;
+             goto exit;
+
+
+        case NET_SOCK_ERR_CLOSED:                               /* Conn closed by peer.                                 */
+        case NET_SOCK_ERR_RX_Q_CLOSED:
+             rtn_val = DEF_FAIL;
+            *p_err   = HTTPc_ERR_CONN_SOCK_CLOSED;
+             goto exit;
+
+
+        default:                                                /* Fatal err.                                           */
+             rtn_val = DEF_FAIL;
+            *p_err   = HTTPc_ERR_CONN_SOCK_RX_FATAL;
+             goto exit;
+
+    }
+
+
+    rtn_val = DEF_OK;
+   *p_err   = HTTPc_ERR_NONE;
+
+
+exit:
+    return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcSock_ConnDataTx()
+*
+* Description : Transmit data on the network and update HTTPc connection parameters.
+*
+* Argument(s) : p_conn      Pointer to the current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Data transmit to TCPIP stack successfully.
+*                               HTTPc_ERR_CONN_SOCK_TX          Transitory error.
+*                               HTTPc_ERR_CONN_SOCK_CLOSED      Connection is fully or half closed.
+*                               HTTPc_ERR_CONN_SOCK_TX_FATAL    Fatal error occurred.
+*
+* Return(s)   : DEF_OK,   if entire data transmitted successfully.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPc_Req().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcSock_ConnDataTx (HTTPc_CONN  *p_conn,
+                                   HTTPc_ERR   *p_err)
+{
+    NET_SOCK_ADDR_LEN      addr_len_server;
+    CPU_INT16U             tx_len;
+    CPU_BOOLEAN            rtn_val;
+    NET_ERR                err_net;
+
+
+    addr_len_server = sizeof(p_conn->ServerSockAddr);
+
+    tx_len = NetSock_TxDataTo(p_conn->SockID,
+                              p_conn->TxDataPtr,
+                              p_conn->TxDataLen,
+                              NET_SOCK_FLAG_NO_BLOCK,
+                             &p_conn->ServerSockAddr,
+                              addr_len_server,
+                             &err_net);
+    switch (err_net) {
+        case NET_SOCK_ERR_NONE:                                 /* Data transmitted.                                    */
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_SOCK_ERR_PORT_NBR_NONE_AVAIL:
+        case NET_CONN_ERR_NONE_AVAIL:
+        case NET_ERR_FAULT_LOCK_ACQUIRE:
+             p_conn->TxDataLen -= tx_len;
+             if (p_conn->TxDataLen > 0u) {                      /* If data is not entirely transmitted.                 */
+                 p_conn->TxDataPtr = (CPU_CHAR *)p_conn->TxDataPtr + tx_len;
+                 rtn_val  = DEF_FAIL;
+                *p_err    = HTTPc_ERR_CONN_SOCK_TX;
+                 goto exit;
+             }
+             break;
+
+        case NET_ERR_TX:
+             rtn_val  = DEF_FAIL;
+            *p_err    = HTTPc_ERR_CONN_SOCK_TX;
+             goto exit;
+
+        case NET_SOCK_ERR_CLOSED:                               /* Conn closed by peer.                                 */
+        case NET_SOCK_ERR_TX_Q_CLOSED:
+            *p_err   = HTTPc_ERR_CONN_SOCK_CLOSED;
+             rtn_val = DEF_FAIL;
+             goto exit;
+
+
+        default:                                                /* Fatal err.                                           */
+             rtn_val = DEF_FAIL;
+            *p_err   = HTTPc_ERR_CONN_SOCK_TX_FATAL;
+             goto exit;
+    }
+
+    rtn_val = DEF_OK;
+   *p_err   = HTTPc_ERR_NONE;
+
+
+exit:
+    return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPcSock_Close()
+*
+* Description : Close Socket Connection with Server.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                      Socket successfully closed.
+*                               HTTPc_ERR_CONN_SOCK_CLOSE_FATAL     Fatal error occurred.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcConn_Close().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcSock_Close (HTTPc_CONN  *p_conn,
+                       HTTPc_ERR   *p_err)
+{
+    CPU_BOOLEAN  done;
+    NET_ERR      err_net;
+
+
+    done  = DEF_NO;
+    while (done != DEF_YES) {
+        NetSock_Close(p_conn->SockID, &err_net);
+        switch (err_net) {
+            case NET_SOCK_ERR_NONE:                             /* Socket successfully closed.                          */
+            case NET_SOCK_ERR_CLOSED:
+            case NET_SOCK_ERR_CONN_CLOSE_IN_PROGRESS:
+            case NET_SOCK_ERR_INVALID_FAMILY:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_STATE:
+            case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+            case NET_SOCK_ERR_CONN_FAIL:
+            case NET_SOCK_ERR_FAULT:
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_CONN_ERR_NOT_USED:
+                 done           = DEF_YES;
+                 p_conn->SockID = NET_SOCK_ID_NONE;
+                 break;
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:                    /* Transitory fault(s); close aborted but MIGHT ...     */
+            case NET_ERR_FAULT_LOCK_ACQUIRE:                    /* ... close in a subsequent attempt.                   */
+                 break;
+
+
+            default:                                            /* Fatal err.                                           */
+               *p_err = HTTPc_ERR_CONN_SOCK_CLOSE_FATAL;
+                goto exit;
+        }
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            HTTPcSock_Sel()
+*
+* Description : (1) Check all HTTPc Connection sockets for available resources &/or operations.
+*               (2) Set each HTTPc Connection descriptors.
+*
+*
+* Argument(s) : p_conn      Pointer to fist item in Connection list or Single Connection pointer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Select Operation successful.
+*                               HTTPc_ERR_CONN_INVALID_STATE    HTTPc Connection invalid state.
+*                               HTTPc_ERR_CONN_SOCK_SEL         Socket Select operation faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask(),
+*               HTTPc_ReqSend().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcSock_Sel (HTTPc_CONN  *p_conn,
+                     HTTPc_ERR   *p_err)
+{
+    HTTPc_CONN        *p_conn_tmp;
+    NET_SOCK_TIMEOUT   sock_timeout;
+    NET_SOCK_TIMEOUT  *p_sock_timeout;
+    NET_SOCK_DESC      sock_desc_rd;
+    NET_SOCK_DESC      sock_desc_wr;
+    NET_SOCK_DESC      sock_desc_err;
+    NET_SOCK_QTY       sock_nbr_max;
+    NET_SOCK_QTY       sock_nbr_rdy;
+    CPU_INT08U         state_family;
+    NET_ERR            err_net;
+    CPU_BOOLEAN        rx_data;
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    HTTPc_WEBSOCK     *p_ws;
+#endif
+
+                                                                /* ---------------- PREPARE SOCK DESC ----------------- */
+    NET_SOCK_DESC_INIT(&sock_desc_rd);
+    NET_SOCK_DESC_INIT(&sock_desc_wr);
+    NET_SOCK_DESC_INIT(&sock_desc_err);
+
+    sock_nbr_max             = 0;
+    p_conn_tmp               = p_conn;
+    p_sock_timeout           = DEF_NULL;
+    sock_timeout.timeout_sec = 0;
+    sock_timeout.timeout_us  = HTTPc_SOCK_SEL_TIMEOUT_MS * DEF_TIME_NBR_uS_PER_SEC / DEF_TIME_NBR_mS_PER_SEC;
+
+    while (p_conn_tmp != DEF_NULL) {
+
+        if (p_conn_tmp->SockID != NET_SOCK_ID_NONE) {
+
+            state_family = HTTPc_CONN_STATE_FAMILY_MASK & p_conn_tmp->State;
+            switch (state_family) {
+                case HTTPc_CONN_STATE_FLOW_FAMILY:
+                     p_sock_timeout = &sock_timeout;
+                     NET_SOCK_DESC_SET(p_conn_tmp->SockID, &sock_desc_err);
+                     break;
+
+                case HTTPc_CONN_STATE_REQ_FAMILY:
+                     NET_SOCK_DESC_SET(p_conn_tmp->SockID, &sock_desc_wr);
+                     NET_SOCK_DESC_SET(p_conn_tmp->SockID, &sock_desc_err);
+                     break;
+
+                case HTTPc_CONN_STATE_RESP_FAMILY:
+                     rx_data = DEF_BIT_IS_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                     if (rx_data == DEF_NO) {
+                         p_sock_timeout = &sock_timeout;
+                     }
+
+                     NET_SOCK_DESC_SET(p_conn_tmp->SockID, &sock_desc_rd);
+                     NET_SOCK_DESC_SET(p_conn_tmp->SockID, &sock_desc_err);
+                     break;
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+                case HTTPc_CONN_STATE_WEBSOCK_FAMILY:
+                     p_ws = p_conn_tmp->WebSockPtr;
+                     if (p_ws->TxMsgListHeadPtr != DEF_NULL) {
+                         NET_SOCK_DESC_SET(p_conn_tmp->SockID, &sock_desc_wr);
+                     }
+
+                     rx_data = DEF_BIT_IS_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                     if (rx_data == DEF_NO) {
+                         p_sock_timeout = &sock_timeout;
+                     }
+
+                     NET_SOCK_DESC_SET(p_conn_tmp->SockID, &sock_desc_rd);
+                     NET_SOCK_DESC_SET(p_conn_tmp->SockID, &sock_desc_err);
+                     break;
+#endif
+                default:
+                    *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+                     goto exit;
+            }
+            p_conn_tmp->SockFlags = HTTPc_FLAG_NONE;
+            if (sock_nbr_max <= p_conn_tmp->SockID) {           /* Update highest sock nbr.                             */
+                 sock_nbr_max = p_conn_tmp->SockID + 1;
+            }
+        }
+        p_conn_tmp = p_conn_tmp->NextPtr;
+    }
+
+    if (sock_nbr_max == 0u) {
+        p_sock_timeout = &sock_timeout;
+    }
+                                                           /* -------------------- SOCK SEL ---------------------- */
+    sock_nbr_rdy = NetSock_Sel( sock_nbr_max,
+                               &sock_desc_rd,
+                               &sock_desc_wr,
+                               &sock_desc_err,
+                                p_sock_timeout,
+                               &err_net);
+    switch (err_net) {
+        case NET_SOCK_ERR_NONE:
+        case NET_SOCK_ERR_TIMEOUT:
+             break;
+
+
+        default:
+            *p_err = HTTPc_ERR_CONN_SOCK_SEL;
+             goto exit;
+    }
+
+    if (sock_nbr_rdy > 0) {
+        p_conn_tmp = p_conn;
+        while (p_conn_tmp != DEF_NULL) {
+
+            if (p_conn_tmp->SockID != NET_SOCK_ID_NONE) {
+
+                state_family = HTTPc_CONN_STATE_FAMILY_MASK & p_conn_tmp->State;
+                switch (state_family) {
+                    case HTTPc_CONN_STATE_FLOW_FAMILY:
+                         if (NET_SOCK_DESC_IS_SET(p_conn_tmp->SockID, &sock_desc_err)) {
+                             DEF_BIT_SET(p_conn_tmp->SockFlags, HTTPc_FLAG_SOCK_RDY_ERR);
+                         }
+                         break;
+
+                    case HTTPc_CONN_STATE_REQ_FAMILY:
+                         if (NET_SOCK_DESC_IS_SET(p_conn_tmp->SockID, &sock_desc_wr)) {
+                             DEF_BIT_SET(p_conn_tmp->SockFlags, HTTPc_FLAG_SOCK_RDY_WR);
+                         }
+                         if (NET_SOCK_DESC_IS_SET(p_conn_tmp->SockID, &sock_desc_err)) {
+                             DEF_BIT_SET(p_conn_tmp->SockFlags, HTTPc_FLAG_SOCK_RDY_ERR);
+                         }
+                         break;
+
+                    case HTTPc_CONN_STATE_RESP_FAMILY:
+                         if (NET_SOCK_DESC_IS_SET(p_conn_tmp->SockID, &sock_desc_rd)) {
+                             DEF_BIT_SET(p_conn_tmp->SockFlags, HTTPc_FLAG_SOCK_RDY_RD);
+                         }
+                         if (NET_SOCK_DESC_IS_SET(p_conn_tmp->SockID, &sock_desc_err)) {
+                             DEF_BIT_SET(p_conn_tmp->SockFlags, HTTPc_FLAG_SOCK_RDY_ERR);
+                         }
+                         break;
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+                    case HTTPc_CONN_STATE_WEBSOCK_FAMILY:
+                         if (NET_SOCK_DESC_IS_SET(p_conn_tmp->SockID, &sock_desc_wr)) {
+                             DEF_BIT_SET(p_conn_tmp->SockFlags, HTTPc_FLAG_SOCK_RDY_WR);
+                         }
+                         if (NET_SOCK_DESC_IS_SET(p_conn_tmp->SockID, &sock_desc_rd)) {
+                             DEF_BIT_SET(p_conn_tmp->SockFlags, HTTPc_FLAG_SOCK_RDY_RD);
+                         }
+                         if (NET_SOCK_DESC_IS_SET(p_conn_tmp->SockID, &sock_desc_err)) {
+                             DEF_BIT_SET(p_conn_tmp->SockFlags, HTTPc_FLAG_SOCK_RDY_ERR);
+                         }
+                         break;
+#endif
+                    default:
+                        *p_err = HTTPc_ERR_CONN_INVALID_STATE;
+                         goto exit;
+                }
+            }
+            p_conn_tmp = p_conn_tmp->NextPtr;
+        }
+     }
+
+   *p_err = HTTPc_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcSock_IsRxClosed()
+*
+* Description : Check if the TCP Connection is half closed (FIN flag was received from Server).
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPc_ERR_NONE                      Close status of socket successfully checked.
+*
+*                           ------------ RETURNED BY NetSock_GetConnTransportID() ------------
+*                           See NetSock_GetConnTransportID() for additional return error codes.
+*
+* Return(s)   : DEF_YES, if TCP connection is half-closed.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPcTask_Handler().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPcSock_IsRxClosed (HTTPc_CONN  *p_conn,
+                                   HTTPc_ERR   *p_err)
+{
+    NET_TCP_CONN_ID      conn_id_tcp;
+    NET_TCP_CONN_STATE   state;
+    CPU_BOOLEAN          result;
+    NET_ERR              err_net;
+
+
+    result = DEF_NO;
+
+    conn_id_tcp =  NetSock_GetConnTransportID(p_conn->SockID, &err_net);
+    if (err_net != NET_SOCK_ERR_NONE) {
+        result = DEF_YES;
+        goto exit;
+    }
+
+    state = NetTCP_ConnStateGet(conn_id_tcp);
+
+    if (state == NET_TCP_CONN_STATE_CLOSE_WAIT) {
+        result = DEF_YES;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return (result);
+}
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_sock.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_sock.h
new file mode 100644
index 0000000..ed4037d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_sock.h
@@ -0,0 +1,121 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT SOCKET MODULE
+*
+* Filename      : http-c_sock.h
+* Version       : V3.00.02
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPc module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_SOCK_MODULE_PRESENT                          /* See Note #1.                                         */
+#define  HTTPc_SOCK_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         HTTPc INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+#include  "../../Common/http.h"
+#include  "http-c.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void          HTTPcSock_Connect              (HTTPc_CONN  *p_conn,
+                                              HTTPc_ERR   *p_err);
+
+CPU_BOOLEAN   HTTPcSock_ConnDataRx           (HTTPc_CONN  *p_conn,
+                                              CPU_INT32U   max_len,
+                                              HTTPc_ERR   *p_err);
+
+CPU_BOOLEAN   HTTPcSock_ConnDataTx           (HTTPc_CONN  *p_conn,
+                                              HTTPc_ERR   *p_err);
+
+void          HTTPcSock_Close                (HTTPc_CONN  *p_conn,
+                                              HTTPc_ERR   *p_err);
+
+void          HTTPcSock_Sel                  (HTTPc_CONN  *p_conn,
+                                              HTTPc_ERR   *p_err);
+
+CPU_BOOLEAN   HTTPcSock_IsRxClosed           (HTTPc_CONN  *p_conn,
+                                              HTTPc_ERR   *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_SOCK_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_task.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_task.c
new file mode 100644
index 0000000..cd6b20c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_task.c
@@ -0,0 +1,1304 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      HTTP CLIENT TASK MODULE
+*
+* Filename      : http-c_task.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define    MICRIUM_SOURCE
+#define    HTTPc_TASK_MODULE
+#include  
+#include  
+#include  
+
+#include  "http-c.h"
+#include  "http-c_mem.h"
+#include  "http-c_task.h"
+#include  "http-c_conn.h"
+#include  "http-c_req.h"
+#include  "http-c_resp.h"
+#include  "http-c_sock.h"
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+#include  "http-c_websock.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  HTTPc_TASK_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPc_TASK_PRIO_MIN                     1u                    /* Minimum task priority.   */
+#define  HTTPc_TASK_STACK_SIZE_MIN               512                   /* Minimum task stack size. */
+#define  HTTPc_TASK_NAME                        "HTTPc Task"           /* Task Name.               */
+
+#define  HTTPc_TASK_DLY_MS_DFLT                  5u                    /* Task delay.              */
+#define  HTTPc_TASK_DLY_MS_MAX                  20u
+#define  HTTPc_TASK_DLY_MS_MIN                   0u
+
+#define  HTTPc_TASK_MSG_Q_NAME                  "HTTPc Msg Q"
+
+#define  HTTPc_TASK_SIGNAL_CONN_CONNECT_DONE     "HTTPc Conn Connect Done"
+#define  HTTPc_TASK_SIGNAL_CONN_CLOSE_DONE       "HTTPc Conn Close Done"
+#define  HTTPc_TASK_SIGNAL_TRANS_DONE            "HTTPc Transaction Done"
+
+#define  HTTPc_TASK_TIMEOUT_MS_CONN_CONNECT_DFLT  10000u
+#define  HTTPc_TASK_TIMEOUT_MS_CONN_CLOSE_DFLT     100u
+#define  HTTPc_TASK_TIMEOUT_MS_TRANS_DFLT         30000u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+static  KAL_Q_HANDLE  HTTPcTask_MsgQ_Handle;
+
+static  CPU_INT16U    HTTcTask_SignalTimeoutConnConnect_ms;
+static  CPU_INT16U    HTTcTask_SignalTimeoutConnClose_ms;
+static  CPU_INT16U    HTTcTask_SignalTimeoutTrans_ms;
+
+static  CPU_INT08U    HTTPcTask_Dly_ms;
+
+static  HTTPc_CONN   *HTTPcTask_ConnFirstPtr;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void             HTTPcTask_Handler               (void);
+
+static  HTTPc_TASK_MSG  *HTTPcTask_MsgDequeue           (HTTPc_ERR   *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPcTask_Init()
+*
+* Description : (1) Initialize signals' timeout.
+*               (2) Create HTTP Client Queues.
+*               (3) Create HTTP Client Task.
+*
+*
+* Argument(s) : p_cfg       Pointer to HTTPc Instance configuration object.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                              Task successfully created.
+*                               HTTPc_ERR_INSTANCE_INIT_TASK_INVALID_ARG    Invalid Task configuration.
+*                               HTTPc_ERR_INSTANCE_INIT_TASK_MEM_ALLOC      Insufficient memory space.
+*                               HTTPc_ERR_INSTANCE_INIT_TASK_CREATE         Error in task creation.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcTask_Init (const  HTTPc_CFG       *p_cfg,
+                      const  HTTP_TASK_CFG   *p_task_cfg,
+                             HTTPc_ERR       *p_err)
+{
+    KAL_TASK_HANDLE   task_handle;
+    RTOS_ERR          err_rtos;
+
+
+                                                                /* ----------- INITIALIZE SIGNALS' TIMEOUT ------------ */
+    HTTcTask_SignalTimeoutConnConnect_ms = HTTPc_TASK_TIMEOUT_MS_CONN_CONNECT_DFLT;
+    HTTcTask_SignalTimeoutConnClose_ms   = HTTPc_TASK_TIMEOUT_MS_CONN_CLOSE_DFLT;
+    HTTcTask_SignalTimeoutTrans_ms       = HTTPc_TASK_TIMEOUT_MS_TRANS_DFLT;
+
+
+    HTTPcTask_MsgQ_Handle = KAL_QCreate(HTTPc_TASK_MSG_Q_NAME,
+                                        p_cfg->MsgQ_Size,
+                                        DEF_NULL,
+                                       &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPc_ERR_INIT_MSG_Q;
+        goto exit;
+    }
+                                                                /* ------- ALLOCATE MEMORY SPACE FOR HTTPc TASK  ------ */
+    task_handle = KAL_TaskAlloc((const  CPU_CHAR *)HTTPc_TASK_NAME,
+                                                   p_task_cfg->StkPtr,
+                                                   p_task_cfg->StkSizeBytes,
+                                                   DEF_NULL,
+                                                  &err_rtos);
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+             break;
+
+        case RTOS_ERR_INVALID_ARG:
+            *p_err = HTTPc_ERR_INIT_TASK_INVALID_ARG;
+             goto exit;
+
+        case RTOS_ERR_ALLOC:
+        default:
+            *p_err = HTTPc_ERR_INIT_TASK_MEM_ALLOC;
+             goto exit;
+    }
+
+                                                                /* ---------------- CREATE HTTPc TASK ----------------- */
+    KAL_TaskCreate(task_handle,
+                   HTTPcTask,
+                   DEF_NULL,
+                   p_task_cfg->Prio,
+                   DEF_NULL,
+                  &err_rtos);
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+             break;
+
+        case RTOS_ERR_INVALID_ARG:
+        case RTOS_ERR_ISR:
+        case RTOS_ERR_OS:
+        default:
+            *p_err = HTTPc_ERR_INIT_TASK_CREATE;
+             goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+   return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcTask()
+*
+* Description : HTTP Client main loop.
+*
+* Argument(s) : p_data      Pointer to task initialization (required by uC/OS-III).
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask_Init().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+void  HTTPcTask (void  *p_data)
+{
+    HTTPc_CONN         *p_conn;
+    HTTPc_REQ          *p_req;
+    HTTPc_CONN_OBJ     *p_conn_const;
+    HTTPc_REQ_OBJ      *p_req_const;
+    HTTPc_ERR           err;
+    HTTPc_TASK_MSG     *p_msg;
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    HTTPc_WEBSOCK_MSG  *p_ws_msg;
+    HTTPc_WEBSOCK      *p_ws;
+#endif
+
+   (void)&p_data;
+
+    while (DEF_ON) {
+                                                                /* --------------- CHECK FOR CONN READY --------------- */
+        p_msg = HTTPcTask_MsgDequeue(&err);
+        switch (err) {
+            case HTTPc_ERR_NONE:
+                 switch (p_msg->Type){
+
+                      case HTTPc_MSG_TYPE_CONN_OPEN:
+                           p_conn = (HTTPc_CONN *)p_msg->DataPtr;
+                           HTTPcConn_Add(p_conn);
+                           break;
+
+                      case HTTPc_MSG_TYPE_CONN_CLOSE:
+                           p_conn              = (HTTPc_CONN *)p_msg->DataPtr;
+                           p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_APP;
+                           p_conn->State       = HTTPc_CONN_STATE_CLOSE;
+                           break;
+
+                      case HTTPc_MSG_TYPE_REQ:
+                           p_req = (HTTPc_REQ *)p_msg->DataPtr;
+                           HTTPcConn_ReqAdd(p_req, &err);
+                           if (err != HTTPc_ERR_NONE) {
+                               p_conn_const = (HTTPc_CONN_OBJ *)p_req->ConnPtr;
+                               p_req_const  = (HTTPc_REQ_OBJ *)p_req;
+                               p_req->OnErr(p_conn_const, p_req_const, err);
+                           }
+                           break;
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+                      case HTTPc_MSG_TYPE_WEBSOCK_MSG:
+                          p_ws_msg = (HTTPc_WEBSOCK_MSG *)p_msg->DataPtr;
+                          HTTPcWebSock_TxMsgAdd(p_ws_msg, &err);
+                          if (err != HTTPc_ERR_NONE) {
+                              p_conn = p_ws_msg->ConnPtr;
+                              p_ws   = p_conn->WebSockPtr;
+                              if (p_ws != DEF_NULL) {
+                                  if (p_ws->OnErr != DEF_NULL) {
+                                      p_conn_const = (HTTPc_CONN_OBJ *)p_ws_msg->ConnPtr;
+                                      p_ws->OnErr(p_conn_const, err);
+                                  }
+                              } else {
+                                  CPU_SW_EXCEPTION(;);
+                              }
+                          }
+                          break;
+#endif
+                      default:
+                          CPU_SW_EXCEPTION(;);
+                          break;
+                 }
+                 HTTPc_Mem_TaskMsgRelease(p_msg);
+                 break;
+
+            case HTTPc_ERR_MSG_Q_EMPTY:
+                 break;
+
+            default:
+                 CPU_SW_EXCEPTION(;);
+                 break;
+        }
+
+                                                                /* -------- SOCKET SELECT ON OPEN CONNECTIONS --------- */
+        p_conn = HTTPcTask_ConnFirstPtr;
+        HTTPcSock_Sel(p_conn, &err);
+        if (err != HTTPc_ERR_NONE) {
+            CPU_SW_EXCEPTION(;);
+        }
+                                                                /* --------------- HTTP CLIENT HANDLER ---------------- */
+        HTTPcTask_Handler();
+
+                                                                /* -------------- DELAY HTTP CLIENT TASK -------------- */
+        if (HTTPcTask_Dly_ms > 0u) {
+            KAL_Dly(HTTPcTask_Dly_ms);
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcTask_SetDly()
+*
+* Description : Set the HTTP Client Task Delay.
+*
+* Argument(s) : dly_ms      Task delay value.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Task delay successfully set-up.
+*                               HTTPc_ERR_CFG_TASK_DLY_INVALID  Invalid delay value.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_Init().
+*
+* Note(s)     : (1) The Task Delay allows other tasks to runs when HTTP client is set in a none blocking
+*                   mode.
+*********************************************************************************************************
+*/
+
+void  HTTPcTask_SetDly (CPU_INT08U   dly_ms,
+                        HTTPc_ERR   *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    if (dly_ms > HTTPc_TASK_DLY_MS_MAX) {
+       *p_err = HTTPc_ERR_CFG_TASK_DLY_INVALID;
+        goto exit;
+    }
+
+    CPU_CRITICAL_ENTER();
+    HTTPcTask_Dly_ms = dly_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcTask_MsgQueue()
+*
+* Description : Signal that a HTTPc message is ready to be process by adding message object to
+*               the message queue.
+*
+* Argument(s) : type    Type of the message obj to queue.
+*
+*               p_data  Pointer to the Message obj to queue.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Message successfully added to queue.
+*                               HTTPc_ERR_MSG_Q_FULL            Error Queue full.
+*                               HTTPc_ERR_MSG_Q_SIGNAL_FAULT    Signal Post faulted.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPc_ConnCloseHandler(),
+*               HTTPc_ConnOpen(),
+*               HTTPc_ReqSend(),
+*               HTTPc_WebSockSend().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcTask_MsgQueue (HTTPc_MSG_TYPE   type,
+                          void            *p_data,
+                          HTTPc_ERR       *p_err)
+{
+    HTTPc_TASK_MSG  *p_msg;
+    RTOS_ERR         err_rtos;
+
+
+    p_msg = HTTPc_Mem_TaskMsgGet();
+    if (p_msg == DEF_NULL) {
+        *p_err = HTTPc_ERR_MSG_Q_SIGNAL_FAULT;
+        goto exit;
+    }
+
+    p_msg->Type    = type;
+    p_msg->DataPtr = p_data;
+
+    KAL_QPost(HTTPcTask_MsgQ_Handle,
+              p_msg,
+              KAL_OPT_NONE,
+             &err_rtos);
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+             break;
+
+        case RTOS_ERR_WOULD_OVF:
+            *p_err = HTTPc_ERR_MSG_Q_FULL;
+             goto exit;
+
+        case RTOS_ERR_NO_MORE_RSRC:
+        case RTOS_ERR_OS:
+        default:
+            *p_err = HTTPc_ERR_MSG_Q_SIGNAL_FAULT;
+             goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPcTask_ConnAdd()
+*
+* Description : Add current HTTPc Connection to connection list.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcConn_Add().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcTask_ConnAdd (HTTPc_CONN  *p_conn)
+{
+    HTTPc_CONN      *p_conn_item;
+
+
+                                                                /* ------------ UPDATE INSTANCE CONN LIST ------------- */
+    if (HTTPcTask_ConnFirstPtr == DEF_NULL) {
+        p_conn->NextPtr        = DEF_NULL;
+        HTTPcTask_ConnFirstPtr = p_conn;
+    } else {
+        p_conn_item            = HTTPcTask_ConnFirstPtr;
+        p_conn->NextPtr        = p_conn_item;
+        HTTPcTask_ConnFirstPtr = p_conn;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcTask_ConnRemove()
+*
+* Description : Remove current HTTPc Connection from connection list.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcConn_Remove().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPcTask_ConnRemove (HTTPc_CONN  *p_conn)
+{
+    HTTPc_CONN      *p_conn_item;
+    HTTPc_CONN      *p_conn_item_prev;
+
+
+    p_conn_item      = HTTPcTask_ConnFirstPtr;
+    p_conn_item_prev = DEF_NULL;
+
+    while (p_conn_item != DEF_NULL) {
+
+        if (p_conn == p_conn_item) {
+
+            if (p_conn == HTTPcTask_ConnFirstPtr) {
+                HTTPcTask_ConnFirstPtr = p_conn->NextPtr;
+            } else {
+                p_conn_item_prev->NextPtr = p_conn->NextPtr;
+            }
+
+        }
+
+        p_conn_item_prev = p_conn_item;
+        p_conn_item      = p_conn_item->NextPtr;
+    }
+
+    p_conn->NextPtr = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcTask_ConnConnectSignalCreate()
+*
+* Description : Create the Connection Connect Signal. The signal is used to inform that the connect
+*               process is complete.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Signal successfully created.
+*                               HTTPc_ERR_CONN_SIGNAL_CREATE    Signal creation faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ConnOpen().
+*
+* Note(s)     : (1) This signal is used when the HTTP Client task is enabled and use in blocking mode
+*                    to advertise that the connect process is done.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_ConnConnectSignalCreate (HTTPc_CONN  *p_conn,
+                                         HTTPc_ERR   *p_err)
+{
+    RTOS_ERR   err_rtos;
+
+
+                                                                /* -------- CREATE SIGNAL FOR CONNECT COMPLETE -------- */
+    p_conn->ConnectSignal = KAL_SemCreate(HTTPc_TASK_SIGNAL_CONN_CONNECT_DONE,
+                                          DEF_NULL,
+                                         &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SIGNAL_CREATE;
+        goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPcTask_ConnConnectSignalDel()
+*
+* Description : Delete Connection Connect Signal.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Signal successfully deleted.
+*                               HTTPc_ERR_CONN_SIGNAL_DEL       Signal deletion faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ConnOpen().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_ConnConnectSignalDel (HTTPc_CONN  *p_conn,
+                                      HTTPc_ERR   *p_err)
+{
+    RTOS_ERR   err_rtos;
+
+
+    KAL_SemDel(p_conn->ConnectSignal, &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SIGNAL_DEL;
+        goto exit;
+    }
+
+    p_conn->ConnectSignal = KAL_SemHandleNull;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPcTask_ConnCloseSignalCreate()
+*
+* Description : Create the Connection Close Signal. The signal is used to inform that the connection close
+*               process is complete.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Signal successfully created.
+*                               HTTPc_ERR_CONN_SIGNAL_CREATE    Signal creation faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ConnCloseHandler().
+*
+* Note(s)     : (1) This signal is used when the HTTP Client task is enabled and use in blocking mode
+*                    to advertise that the close process is done.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_ConnCloseSignalCreate (HTTPc_CONN  *p_conn,
+                                       HTTPc_ERR   *p_err)
+{
+    RTOS_ERR   err_rtos;
+
+
+                                                                /* ------- CREATE SIGNAL FOR CONN HTTP CLOSING -------- */
+    p_conn->CloseSignal = KAL_SemCreate(HTTPc_TASK_SIGNAL_CONN_CLOSE_DONE,
+                                        DEF_NULL,
+                                       &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SIGNAL_CREATE;
+        goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPcTask_ConnCloseSignalDel()
+*
+* Description : Delete Connection Close Signal.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Signal successfully deleted.
+*                               HTTPc_ERR_CONN_SIGNAL_DEL       Signal deletion faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ConnCloseHandler().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_ConnCloseSignalDel (HTTPc_CONN  *p_conn,
+                                    HTTPc_ERR   *p_err)
+{
+    RTOS_ERR   err_rtos;
+
+
+    KAL_SemDel(p_conn->CloseSignal, &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SIGNAL_DEL;
+        goto exit;
+    }
+
+    p_conn->CloseSignal = KAL_SemHandleNull;
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                     HTTPcTask_TransDoneSignalCreate()
+*
+* Description : Create the Transaction Done Signal. The signal is used to inform that the HTTP transaction
+*               is completed.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Signal successfully created.
+*                               HTTPc_ERR_CONN_SIGNAL_CREATE    Signal creation faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ReqSend().
+*
+* Note(s)     : (1) This signal is used when the HTTP Client task is enabled and use in blocking mode
+*                    to advertise that the HTTP transaction is completed.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_TransDoneSignalCreate (HTTPc_CONN  *p_conn,
+                                       HTTPc_ERR   *p_err)
+{
+    RTOS_ERR  err_rtos;
+
+
+    p_conn->TransDoneSignal = KAL_SemCreate(HTTPc_TASK_SIGNAL_TRANS_DONE,
+                                            DEF_NULL,
+                                           &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SIGNAL_CREATE;
+        goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcTask_TransDoneSignalDel()
+*
+* Description : Delete Transaction Done Signal.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Signal successfully deleted.
+*                               HTTPc_ERR_CONN_SIGNAL_DEL       Signal deletion faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ReqSend().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_TransDoneSignalDel (HTTPc_CONN  *p_conn,
+                                    HTTPc_ERR   *p_err)
+{
+    RTOS_ERR  err_rtos;
+
+
+    KAL_SemDel(p_conn->TransDoneSignal, &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPc_ERR_CONN_SIGNAL_DEL;
+        goto exit;
+    }
+
+    p_conn->TransDoneSignal = KAL_SemHandleNull;
+
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPcTask_ConnConnectSignal()
+*
+* Description : Post Connection Connect Signal.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Signal successfully posted.
+*                               HTTPc_ERR_CONN_SIGNAL_FAULT     Signal posting faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask_Handler().
+*
+* Note(s)     : (1) Signal to inform that the connection connect process has been completed.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_ConnConnectSignal (HTTPc_CONN  *p_conn,
+                                   HTTPc_ERR   *p_err)
+{
+    RTOS_ERR  err_rtos;
+
+
+    KAL_SemPost(p_conn->ConnectSignal,
+                KAL_OPT_PEND_NONE,
+               &err_rtos);
+
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+            *p_err = HTTPc_ERR_NONE;
+             break;
+
+        default:
+            *p_err = HTTPc_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcTask_ConnCloseSignal()
+*
+* Description : Post HTTP Connection Close Signal.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPc_ERR_NONE                  Signal posted successfully.
+*                           HTTPc_ERR_CONN_SIGNAL_FAULT     Error occurred during signal posting.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask_Handler().
+*
+* Note(s)     : (1) Signal to inform that the connection close process has been completed.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_ConnCloseSignal (HTTPc_CONN  *p_conn,
+                                 HTTPc_ERR   *p_err)
+{
+    RTOS_ERR  err_rtos;
+
+
+    KAL_SemPost(p_conn->CloseSignal,
+                KAL_OPT_PEND_NONE,
+               &err_rtos);
+
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+            *p_err = HTTPc_ERR_NONE;
+             break;
+
+        default:
+            *p_err = HTTPc_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPcTask_TransDoneSignal()
+*
+* Description : Post HTTP Transaction Done Signal.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPc_ERR_NONE                  Signal posted successfully.
+*                           HTTPc_ERR_CONN_SIGNAL_FAULT     Error occurred during signal posting.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPs_TaskHandler().
+*
+* Note(s)     : (1) Signal to inform that the HTTP Transaction has been completed.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_TransDoneSignal (HTTPc_CONN  *p_conn,
+                                 HTTPc_ERR   *p_err)
+{
+    RTOS_ERR  err_rtos;
+
+
+    KAL_SemPost(p_conn->TransDoneSignal,
+                KAL_OPT_PEND_NONE,
+               &err_rtos);
+
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+            *p_err = HTTPc_ERR_NONE;
+             break;
+
+        default:
+            *p_err = HTTPc_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPcTask_ConnConnectSignalWait()
+*
+* Description : Wait for Connection Connect signal.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  Signal successfully received.
+*                               HTTPc_ERR_CONN_SIGNAL_TIMEOUT   Signal pending timed out.
+*                               HTTPc_ERR_CONN_SIGNAL_FAULT     Signal pending faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ConnOpen().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_ConnConnectSignalWait (HTTPc_CONN  *p_conn,
+                                       HTTPc_ERR   *p_err)
+{
+    RTOS_ERR  err_rtos;
+
+
+    KAL_SemPend(p_conn->ConnectSignal, KAL_OPT_PEND_BLOCKING, HTTcTask_SignalTimeoutConnConnect_ms,  &err_rtos);
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+            *p_err = HTTPc_ERR_NONE;
+             break;
+
+        case RTOS_ERR_TIMEOUT:
+            *p_err = HTTPc_ERR_CONN_SIGNAL_TIMEOUT;
+             break;
+
+        default:
+            *p_err = HTTPc_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcTask_ConnCloseSignalWait()
+*
+* Description : Wait for HTTP Connection Close signal posting.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPc_ERR_NONE                  Signal received.
+*                           HTTPc_ERR_CONN_SIGNAL_TIMEOUT   Signal pending timed out.
+*                           HTTPc_ERR_CONN_SIGNAL_FAULT     Error occurred during signal pending.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ConnClose().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_ConnCloseSignalWait (HTTPc_CONN  *p_conn,
+                                     HTTPc_ERR   *p_err)
+{
+    RTOS_ERR  err_rtos;
+
+
+    KAL_SemPend(p_conn->CloseSignal, KAL_OPT_PEND_BLOCKING, HTTPc_TASK_TIMEOUT_MS_CONN_CLOSE_DFLT,  &err_rtos);
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+            *p_err = HTTPc_ERR_NONE;
+             break;
+
+        case RTOS_ERR_TIMEOUT:
+            *p_err = HTTPc_ERR_CONN_SIGNAL_TIMEOUT;
+             break;
+
+        default:
+            *p_err = HTTPc_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPcTask_TransDoneSignalWait()
+*
+* Description : Wait for HTTP Response Ready Signal.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPc_ERR_NONE                  Signal received.
+*                           HTTPc_ERR_CONN_SIGNAL_TIMEOUT   Signal pending timed out.
+*                           HTTPc_ERR_CONN_SIGNAL_FAULT     Error occurred during signal pending.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPc_ReqSend().
+*
+* Note(s)     : (1) This is a blocking function.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void  HTTPcTask_TransDoneSignalWait (HTTPc_CONN  *p_conn,
+                                     HTTPc_ERR   *p_err)
+{
+    RTOS_ERR  err_rtos;
+
+
+    KAL_SemPend(p_conn->TransDoneSignal, KAL_OPT_PEND_BLOCKING, HTTPc_TASK_TIMEOUT_MS_TRANS_DFLT,  &err_rtos);
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+            *p_err = HTTPc_ERR_NONE;
+             break;
+
+        case RTOS_ERR_TIMEOUT:
+            *p_err = HTTPc_ERR_CONN_SIGNAL_TIMEOUT;
+             break;
+
+        default:
+            *p_err = HTTPc_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPcTask_Wake()
+*
+* Description : Wake HTTPc Task pending in HTTPcSock_Sel.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPc_ConnCloseHandler(),
+*               HTTPc_ConnOpen(),
+*               HTTPc_ReqSend(),
+*               HTTPc_WebSockSend().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcTask_Wake (HTTPc_CONN  *p_conn,
+                      HTTPc_ERR   *p_err)
+{
+    NET_ERR  err;
+
+
+   *p_err = HTTPc_ERR_NONE;
+
+    if (p_conn->SockID != NET_SOCK_ID_NONE) {
+        NetSock_SelAbort(p_conn->SockID, &err);
+        if ((err != NET_SOCK_ERR_NONE      ) &&
+            (err != NET_SOCK_ERR_NONE_AVAIL)) {
+           *p_err = HTTPc_ERR_CONN_SOCK_ABORT_FAILED;
+        }
+    } else {
+        if (HTTPcTask_ConnFirstPtr != DEF_NULL) {
+            NetSock_SelAbort(HTTPcTask_ConnFirstPtr->SockID, &err);
+            if ((err != NET_SOCK_ERR_NONE      ) &&
+                (err != NET_SOCK_ERR_NONE_AVAIL)) {
+               *p_err = HTTPc_ERR_CONN_SOCK_ABORT_FAILED;
+            }
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            HTTPcTask_Handler()
+*
+* Description : HTTP Client main task when HTTPc_CFG_MODE_ASYNC_TASK_EN is enabled.
+*               Proceed through the state machine to process all HTTP transaction on each open connection.
+*
+* Argument(s) : None.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcTask_Handler (void)
+{
+    HTTPc_CONN  *p_conn;
+
+
+    p_conn = HTTPcTask_ConnFirstPtr;
+
+    while (p_conn != DEF_NULL) {
+
+        switch (p_conn->State) {
+            case HTTPc_CONN_STATE_NONE:
+            case HTTPc_CONN_STATE_CONNECT:
+                 HTTPcConn_Process(p_conn);
+                 break;
+
+
+            case HTTPc_CONN_STATE_PARAM_VALIDATE:
+            case HTTPc_CONN_STATE_REQ_LINE_METHOD:
+            case HTTPc_CONN_STATE_REQ_LINE_URI:
+            case HTTPc_CONN_STATE_REQ_LINE_QUERY_STR:
+            case HTTPc_CONN_STATE_REQ_LINE_PROTO_VER:
+            case HTTPc_CONN_STATE_REQ_HDR_HOST:
+            case HTTPc_CONN_STATE_REQ_HDR_CONTENT_TYPE:
+            case HTTPc_CONN_STATE_REQ_HDR_CONTENT_LEN:
+            case HTTPc_CONN_STATE_REQ_HDR_TRANSFER_ENCODE:
+            case HTTPc_CONN_STATE_REQ_HDR_CONN:
+            case HTTPc_CONN_STATE_REQ_HDR_EXT:
+            case HTTPc_CONN_STATE_REQ_HDR_LAST:
+            case HTTPc_CONN_STATE_REQ_BODY:
+            case HTTPc_CONN_STATE_REQ_BODY_DATA:
+            case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_SIZE:
+            case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_DATA:
+            case HTTPc_CONN_STATE_REQ_BODY_DATA_CHUNK_END:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_APP:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_DISPO:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_HDR_CONTENT_TYPE:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_DATA_END:
+            case HTTPc_CONN_STATE_REQ_BODY_FORM_MULTIPART_BOUNDARY_END:
+            case HTTPc_CONN_STATE_REQ_END:
+            case HTTPc_CONN_STATE_RESP_INIT:
+            case HTTPc_CONN_STATE_RESP_STATUS_LINE:
+            case HTTPc_CONN_STATE_RESP_HDR:
+            case HTTPc_CONN_STATE_RESP_BODY:
+            case HTTPc_CONN_STATE_RESP_BODY_CHUNK_SIZE:
+            case HTTPc_CONN_STATE_RESP_BODY_CHUNK_DATA:
+            case HTTPc_CONN_STATE_RESP_BODY_CHUNK_LAST:
+            case HTTPc_CONN_STATE_RESP_COMPLETED:
+            case HTTPc_CONN_STATE_ERR:
+            case HTTPc_CONN_STATE_COMPLETED:
+            case HTTPc_CONN_STATE_CLOSE:
+                 HTTPcConn_TransProcess(p_conn);
+                 break;
+
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+            case HTTPc_CONN_STATE_WEBSOCK_INIT:
+            case HTTPc_CONN_STATE_WEBSOCK_RXTX:
+            case HTTPc_CONN_STATE_WEBSOCK_CLOSE:
+            case HTTPc_CONN_STATE_WEBSOCK_ERR:
+                 HTTPcWebSock_Process(p_conn);
+                 break;
+#endif
+
+            default:
+                 CPU_SW_EXCEPTION(;);
+                 break;
+        }
+
+        p_conn = p_conn->NextPtr;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcTask_ConnOpenDequeue()
+*
+* Description : Check that a HTTPc connection is ready to be connected by looking in the Connection
+*               Connect Queue.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPc_ERR_NONE                  New connection object in queue.
+*                               HTTPc_ERR_CONN_Q_EMPTY          Error Queue empty.
+*                               HTTPc_ERR_CONN_Q_SIGNAL_FAULT   Signal check faulted.
+*
+* Return(s)   : Pointer to new connection received in queue.
+*
+*               DEF_NULL if queue is empty.
+*
+* Caller(s)   : HTTPcTask().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  HTTPc_TASK_MSG  *HTTPcTask_MsgDequeue (HTTPc_ERR   *p_err)
+{
+    HTTPc_TASK_MSG  *p_msg;
+    KAL_OPT          option;
+    RTOS_ERR         err_rtos;
+
+
+    if (HTTPcTask_ConnFirstPtr == DEF_NULL) {
+       option = KAL_OPT_PEND_BLOCKING;
+    } else {
+       option = KAL_OPT_PEND_NON_BLOCKING;
+    }
+
+    p_msg = (HTTPc_TASK_MSG *)KAL_QPend(HTTPcTask_MsgQ_Handle,
+                                        option,
+                                        0,
+                                       &err_rtos);
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+             break;
+
+        case RTOS_ERR_TIMEOUT:
+        case RTOS_ERR_WOULD_BLOCK:
+             p_msg = DEF_NULL;
+            *p_err = HTTPc_ERR_MSG_Q_EMPTY;
+             goto exit;
+
+        case RTOS_ERR_ISR:
+        case RTOS_ERR_ABORT:
+        case RTOS_ERR_OS:
+        default:
+             p_msg = DEF_NULL;
+            *p_err  = HTTPc_ERR_MSG_Q_SIGNAL_FAULT;
+             goto exit;
+    }
+
+   *p_err = HTTPc_ERR_NONE;
+
+
+exit:
+    return (p_msg);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_TASK_MODULE_EN       */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_task.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_task.h
new file mode 100644
index 0000000..e9dbd71
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_task.h
@@ -0,0 +1,168 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT TASK MODULE
+*
+* Filename      : http-c_task.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         HTTPc INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                                 /* CPU Configuration              (see Note #2b)        */
+#include                                            /* CPU Core Library               (see Note #2a)        */
+
+#include                                             /* Standard        Defines        (see Note #3a)        */
+#include                                             /* Standard String Library        (see Note #3a)        */
+#include                                           /* Standard ASCII  Library        (see Note #3a)        */
+
+#include  
+#include  "../../Common/http.h"
+#include  "http-c_mem.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPc module present pre-processor macro definition.
+*
+*           (2) The following HTTPc-Task-module configuration value MUST be pre-#define'd in
+*               'http-c.h' PRIOR to all other HTTPc modules that require the Task Layer configuration:
+*
+*                   HTTPc_TASK_MODULE_EN
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_TASK_MODULE_PRESENT                              /* See Note #1.                                         */
+#define  HTTPc_TASK_MODULE_PRESENT
+
+#ifdef   HTTPc_TASK_MODULE_EN                                   /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void         HTTPcTask_Init                     (const  HTTPc_CFG          *p_cfg,
+                                                 const  HTTP_TASK_CFG   *p_task_cfg,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask                          (       void               *p_data);
+
+void         HTTPcTask_SetDly                   (       CPU_INT08U          dly_ms,
+                                                        HTTPc_ERR          *p_err);
+void         HTTPcTask_MsgQueue                 (       HTTPc_MSG_TYPE      type,
+                                                        void               *p_data,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_ConnAdd                  (       HTTPc_CONN         *p_conn);
+
+void         HTTPcTask_ConnRemove               (       HTTPc_CONN         *p_conn);
+
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+void         HTTPcTask_ConnConnectSignalCreate  (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_ConnConnectSignalDel     (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_ConnCloseSignalCreate    (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_ConnCloseSignalDel       (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_TransDoneSignalCreate    (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_TransDoneSignalDel       (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_ConnConnectSignal        (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_ConnCloseSignal          (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_TransDoneSignal          (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_ConnConnectSignalWait    (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_ConnCloseSignalWait      (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_TransDoneSignalWait      (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+
+void         HTTPcTask_Wake                     (       HTTPc_CONN         *p_conn,
+                                                        HTTPc_ERR          *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_TASK_MODULE_EN       */
+#endif  /* HTTPc_TASK_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_type.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_type.h
new file mode 100644
index 0000000..d5f415f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_type.h
@@ -0,0 +1,123 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             HTTP CLIENT
+*
+* Filename      : http-c_type.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPc module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_TYPE_MODULE_PRESENT                              /* See Note #1.                                         */
+#define  HTTPc_TYPE_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         HTTPc INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  httpc_cfg {
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      TASK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    CPU_INT08U                 TaskDly_ms;                      /* Task Delay in milliseconds.                          */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                   CONNECTION CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+    CPU_INT08U                 MsgQ_Size;                       /* Message Queue Size.                                  */
+    CPU_INT16U                 ConnConnectTimeout_ms;           /* Connection Connect Timeout.                          */
+    CPU_INT16U                 ConnInactivityTimeout_s;         /* Connection Inactivitu Timeout.                       */
+
+
+} HTTPc_CFG;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_TYPE_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_websock.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_websock.c
new file mode 100644
index 0000000..0b39b83
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_websock.c
@@ -0,0 +1,1638 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      HTTP CLIENT WEBSOCKET MODULE
+*
+* Filename      : http-c_websock.c
+* Version       : V3.00.02
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPc_WEBSOCK_MODULE
+#include  
+#include  
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+#include  
+
+#include  "http-c_websock.h"
+#include  "http-c_conn.h"
+#include  "http-c_sock.h"
+#include  "http-c_req.h"
+#include  "http-c_resp.h"
+#ifdef HTTPc_TASK_MODULE_EN
+#include  "http-c_task.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPc_WEBSOCK_TX_REQ_Q_NAME              "WebSocket Tx Req Q name"
+
+#define  HTTPc_WEBSOCK_PROTOCOL_ERR_MSG           "\x03\xEAProtocolError"
+
+#define  HTTPc_WEBSOCK_MIN_HEADER_LEN             2u
+#define  HTTPc_WEBSOCK_MAX_HEADER_LEN             14u
+
+#define  HTTPc_WEBSOCK_FIN_BIT                    DEF_BIT_07
+#define  HTTPc_WEBSOCK_MASK_BIT                   DEF_BIT_07
+#define  HTTPc_WEBSOCK_OPCODE_MASK                DEF_NIBBLE_MASK
+#define  HTTPc_WEBSOCK_PAYLOAD_MASK               0x7F
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPc_WEBSOCK_GET_TX_BUF_SIZE(p_conn)   (p_conn->BufLen - p_conn->TxDataLen - (p_conn->TxBufPtr - p_conn->BufPtr))
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void         HTTPcWebSock_TX                  (HTTPc_CONN             *p_conn);
+
+static  void         HTTPcWebSock_RX                  (HTTPc_CONN             *p_conn);
+
+static  CPU_INT32U   HTTPcWebSock_GetMsgHdr           (HTTPc_CONN             *p_conn,
+                                                       HTTPc_ERR              *p_err);
+
+static  void         HTTPcWebSock_GetPayload          (HTTPc_CONN             *p_conn);
+
+static  void         HTTPcWebSock_SetTxBuf            (HTTPc_WEBSOCK_MSG       *p_msg,
+                                                       CPU_CHAR                *p_dst_buf,
+                                                       CPU_CHAR                *p_src_buf,
+                                                       CPU_INT32U               len);
+
+
+static  void         HTTPcWebSock_SetTxBufHdr         (HTTPc_CONN              *p_conn,
+                                                       HTTPc_WEBSOCK_MSG       *p_tx_msg,
+                                                       CPU_CHAR                *p_tx_buf);
+
+
+static  void         HTTPcWebSock_SetCtrlResponse     (HTTPc_CONN              *p_conn,
+                                                       HTTPc_WEBSOCK_OPCODE     opcode,
+                                                       CPU_CHAR                *p_data,
+                                                       CPU_INT32U               msg_len);
+
+static  void         HTTPcWebSock_TxMsgRemove         (HTTPc_CONN              *p_conn);
+
+static  void         HTTPcWebSock_TxMsgCleanList      (HTTPc_CONN              *p_conn);
+
+static  CPU_INT16U   HTTPcWebSock_ComputeHdrLen       (HTTPc_WEBSOCK_MSG       *p_msg);
+
+static  CPU_BOOLEAN  HTTPcWebSock_IsProtocolError     (HTTPc_ERR                err);
+
+static  CPU_BOOLEAN  HTTPcWebSock_IsStandardCloseCode (HTTPc_WEBSOCK_CLOSE_CODE close_code);
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcWebSock_Process()
+*
+* Description : Process all the states for a HTTP connection that has been upgraded to a WebSocket.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcTask_Handler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcWebSock_Process (HTTPc_CONN  *p_conn)
+{
+    HTTPc_CONN_OBJ    *p_conn_const;
+    HTTPc_WEBSOCK     *p_ws;
+    CPU_BOOLEAN        is_protocol_err;
+
+
+    p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+    p_ws         = p_conn->WebSockPtr;
+
+    switch (p_conn->State) {
+
+        case HTTPc_CONN_STATE_WEBSOCK_INIT:
+                                                                /* WebSocket OnOpen Hook.                               */
+             if (p_ws->OnOpen != DEF_NULL) {
+                 p_ws->OnOpen(p_conn_const);
+             }
+                                                                /* Set the WebSocket initial state.                     */
+             p_ws->TxState = HTTPc_WEBSOCK_TX_STATE_MSG_INIT;
+             p_ws->RxState = HTTPc_WEBSOCK_RX_STATE_WAIT;
+             p_conn->State = HTTPc_CONN_STATE_WEBSOCK_RXTX;
+             break;
+
+
+        case HTTPc_CONN_STATE_WEBSOCK_RXTX:
+
+             HTTPcWebSock_TX(p_conn);                           /* Process Tx states of the WebSocket.                  */
+             HTTPcWebSock_RX(p_conn);                           /* Process Rx states of the WebSocket.                  */
+             break;
+
+
+        case HTTPc_CONN_STATE_WEBSOCK_ERR:
+                                                                /* WebSocket OnErr hook.                                */
+             if (p_ws->OnErr != DEF_NULL) {
+                 p_ws->OnErr(p_conn_const, p_conn->ErrCode);
+             }
+
+             is_protocol_err = HTTPcWebSock_IsProtocolError(p_conn->ErrCode);
+             if (is_protocol_err == DEF_YES) {                  /* Send a Close Frame if the Err Code a Protocol Error. */
+                 p_ws->CloseCode = HTTPc_WEBSOCK_CLOSE_CODE_PROTOCOL_ERR;
+
+                 if (p_ws->Flags.IsTxMsgCtrlUsed == DEF_NO) {
+                     HTTPcWebSock_SetCtrlResponse(p_conn,
+                                                  HTTPc_WEBSOCK_OPCODE_CLOSE,
+                                                  HTTPc_WEBSOCK_PROTOCOL_ERR_MSG,
+                                                  sizeof(HTTPc_WEBSOCK_PROTOCOL_ERR_MSG));
+
+                     p_ws->Flags.IsCloseStarted  = DEF_YES;
+                     p_ws->RxState               = HTTPc_WEBSOCK_RX_STATE_WAIT;
+                     p_conn->State               = HTTPc_CONN_STATE_WEBSOCK_RXTX;
+
+                 } else {                                       /* If the ctrl msg is already used, close the conn.     */
+                     p_conn->State = HTTPc_CONN_STATE_WEBSOCK_CLOSE;
+                 }
+             } else {
+                 p_conn->State = HTTPc_CONN_STATE_WEBSOCK_CLOSE;
+             }
+             break;
+
+
+        case HTTPc_CONN_STATE_WEBSOCK_CLOSE:
+                                                                /* WebSocket OnClose hook.                              */
+             if (p_ws->OnClose != DEF_NULL) {
+                 p_ws->OnClose(p_conn_const, p_ws->CloseCode, &p_ws->CloseReason);
+             }
+
+             HTTPcWebSock_TxMsgCleanList(p_conn);               /* Empty the Tx Msg request pending list.               */
+                                                                /* Change state to remove and close the conn.           */
+             p_conn->State = HTTPc_CONN_STATE_CLOSE;
+             break;
+
+
+        default:
+             CPU_SW_EXCEPTION(;);
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPcWebSock_InitReqObj()
+*
+* Description : Initialize the WebSocket Request object.
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPc_ERR_NONE
+*                           HTTPc_ERR_WEBSOCK_BASE64_ENCODE_FAIL
+*                           HTTPc_ERR_WEBSOCK_SHA1_ENCODE_FAIL
+*                           HTTPc_ERR_WEBSOCK_REQ_MEM_ERR
+*
+* Return(s)   : If the operation is successful, pointer to the WebSocket Request object to initialize.
+*               If the operation has failed, DEF_NULL;
+*
+* Caller(s)   : HTTPcWebSock_Upgrade().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+HTTPc_WEBSOCK_REQ  *HTTPcWebSock_InitReqObj (HTTPc_ERR  *p_err)
+{
+    CPU_INT32U          val;
+    CPU_CHAR            tmp_buf[HTTPc_WEBSOCK_KEY_PRE_HASH_LEN];
+    CPU_INT08U          i;
+    NET_ERR             net_err;
+    NET_SHA1_ERR        sha1_err;
+    NET_SHA1_CTX        sha1_ctx;
+    HTTPc_WEBSOCK_REQ  *p_ws_req;
+
+                                                                /* ------------- CREATE RAMDOM 16 BYTES --------------- */
+                                                                /* Reset the WebSocket handshake obj.                   */
+    p_ws_req = HTTPc_Mem_WebSockReqGet();
+    if (p_ws_req == DEF_NULL) {
+       *p_err = HTTPc_ERR_WEBSOCK_REQ_MEM_ERR;
+        goto exit;
+    }
+                                                                /* Generate a Random Seed.                              */
+
+    val = NetUtil_RandomRangeGet (1u, DEF_INT_32U_MAX_VAL);
+                                                                /* Create the 16-byte random-key.                       */
+    for (i = 0; i < HTTPc_WEBSOCK_KEY_LEN; i += sizeof(CPU_INT32U)) {
+        val = Math_RandSeed(val);
+        Mem_Copy(&tmp_buf[i], &val, sizeof(CPU_INT32U));
+    }
+
+                                                                /* --------- PROCESS SEC-WEBSOCKET-KEY VALUE ---------- */
+    NetBase64_Encode(tmp_buf,
+                     HTTPc_WEBSOCK_KEY_LEN,
+                     p_ws_req->Key,
+                     HTTPc_WEBSOCK_KEY_ENCODED_LEN,
+                    &net_err);
+    if (net_err != NET_ERR_NONE) {
+       *p_err = HTTPc_ERR_WEBSOCK_BASE64_ENCODE_FAIL;
+        goto exit_release;
+    }
+                                                                /* -------- PROCESS SEC-WEBSOCKET-ACCEPT VALUE -------- */
+    Str_Copy(tmp_buf, p_ws_req->Key);
+    Str_Cat(tmp_buf,HTTPc_WEBSOCK_GUID_STRING);
+
+    NetSHA1_Reset(&sha1_ctx,
+                  &sha1_err);
+    if (sha1_err != NET_SHA1_ERR_NONE) {
+       *p_err = HTTPc_ERR_WEBSOCK_SHA1_ENCODE_FAIL;
+        goto exit_release;
+    }
+
+    NetSHA1_Input(&sha1_ctx,
+                   tmp_buf,
+                   HTTPc_WEBSOCK_KEY_PRE_HASH_LEN,
+                   &sha1_err);
+    if (sha1_err != NET_SHA1_ERR_NONE) {
+       *p_err = HTTPc_ERR_WEBSOCK_SHA1_ENCODE_FAIL;
+        goto exit_release;
+    }
+
+    NetSHA1_Result(&sha1_ctx,
+                    tmp_buf ,
+                   &sha1_err);
+    if (sha1_err != NET_SHA1_ERR_NONE) {
+       *p_err = HTTPc_ERR_WEBSOCK_SHA1_ENCODE_FAIL;
+        goto exit_release;
+    }
+
+    NetBase64_Encode(tmp_buf,
+                     HTTPc_WEBSOCK_KEY_HASH_LEN,
+                     p_ws_req->Accept,
+                     HTTPc_WEBSOCK_KEY_HASH_ENCODED_LEN,
+                    &net_err);
+    if (net_err != NET_ERR_NONE) {
+       *p_err = HTTPc_ERR_WEBSOCK_BASE64_ENCODE_FAIL;
+        goto exit_release;
+    }
+
+exit:
+   return p_ws_req;
+
+exit_release:
+   HTTPc_Mem_WebSockReqRelease(p_ws_req);
+   return DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcWebSock_TxMsgAdd()
+*
+* Description : Add a message in the TX message queue.
+*
+* Argument(s) : p_msg   Pointer to the message to queue
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcTask().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPcWebSock_TxMsgAdd (HTTPc_WEBSOCK_MSG  *p_msg,
+                             HTTPc_ERR          *p_err)
+{
+    HTTPc_CONN         *p_conn;
+    HTTPc_WEBSOCK      *p_ws;
+    HTTPc_WEBSOCK_MSG  *p_msg_item;
+    CPU_BOOLEAN         in_use;
+
+
+    p_conn = p_msg->ConnPtr;
+    p_ws   = p_conn->WebSockPtr;
+
+    in_use = DEF_BIT_IS_SET(p_conn->Flags, HTTPc_FLAG_CONN_IN_USE);
+
+    if (in_use == DEF_YES) {
+
+        if (p_ws->TxMsgListHeadPtr == DEF_NULL) {
+            p_ws->TxMsgListHeadPtr = p_msg;
+            p_ws->TxMsgListEndPtr  = p_msg;
+            p_msg->NextPtr         = 0;
+        } else {
+            p_msg_item             = p_ws->TxMsgListEndPtr;
+            p_msg_item->NextPtr    = p_msg;
+            p_ws->TxMsgListEndPtr  = p_msg;
+            p_msg->NextPtr         = 0;
+        }
+
+        p_msg->Flags.IsUsed = DEF_YES;
+
+       *p_err = HTTPc_ERR_NONE;
+
+    } else {
+       *p_err = HTTPc_ERR_CONN_IS_RELEASED;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          HTTPcWebSock_TX()
+*
+* Description : Process the WebSocket states TX.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcConn_WebSocketProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcWebSock_TX (HTTPc_CONN  *p_conn)
+{
+    HTTPc_ERR                  err;
+    HTTPc_WEBSOCK             *p_ws;
+    HTTPc_WEBSOCK_MSG         *p_msg;
+    CPU_BOOLEAN                done;
+    HTTPc_CONN_OBJ            *p_conn_const;
+    HTTPc_WEBSOCK_MSG_OBJ     *p_msg_const;
+    CPU_INT16U                 hdr_len;
+    CPU_INT16U                 buf_size;
+    CPU_INT32U                 len;
+    CPU_INT32U                 len_rem;
+    CPU_CHAR                  *p_src_buf;
+    CPU_BOOLEAN                sock_rdy_wr;
+    CPU_BOOLEAN                sock_rdy_err;
+    CPU_CHAR                  *p_tx_buf;
+    HTTPc_WEBSOCK_CLOSE_CODE  *p_close_code;
+
+                                                                /* ------------------ INITIALIZAITON ------------------ */
+    p_ws  = p_conn->WebSockPtr;
+    p_msg = p_ws->TxMsgListHeadPtr;
+
+    if (p_conn->State != HTTPc_CONN_STATE_WEBSOCK_RXTX) {
+        return;
+    }
+
+    if (p_msg != DEF_NULL) {
+        do {
+            done = DEF_YES;                                     /* Always set to avoid unhandled state.                 */
+            switch (p_ws->TxState) {
+
+                case HTTPc_WEBSOCK_TX_STATE_MSG_INIT:
+                                                                /* On Msg Tx Initialization Hook.                       */
+                     if (p_msg->OnMsgTxInit != DEF_NULL) {
+                         p_conn_const = (HTTPc_CONN_OBJ        *)p_conn;
+                         p_msg_const  = (HTTPc_WEBSOCK_MSG_OBJ *)p_msg;
+                         p_msg->Len   = p_msg->OnMsgTxInit(p_conn_const, p_msg_const);
+                     }
+                     done          = DEF_NO;
+                     p_ws->TxState = HTTPc_WEBSOCK_TX_STATE_SET_BUF;
+                     break;
+
+
+                case HTTPc_WEBSOCK_TX_STATE_SET_BUF:
+                                                                /* Get hdr space needed.                                */
+                     if (p_msg->Flags.IsHdrSet == DEF_NO) {
+                         hdr_len       = HTTPcWebSock_ComputeHdrLen(p_msg);
+                         p_msg->MskKey = NetUtil_RandomRangeGet (1u, DEF_INT_32U_MAX_VAL);
+                     } else {
+                         hdr_len = 0;
+                     }
+                                                                /* Compute buffer space available.                      */
+                     buf_size = HTTPc_WEBSOCK_GET_TX_BUF_SIZE(p_conn);
+                     if (buf_size > hdr_len) {
+                         buf_size -= hdr_len;
+                     } else {
+                         done = DEF_YES;
+                         break;
+                     }
+                                                                /* Check if sock rdy to wr to avoid using the conn...   */
+                                                                /* ...buf unnecessarily.                                */
+                     sock_rdy_wr = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPc_FLAG_SOCK_RDY_WR);
+                     if (sock_rdy_wr == DEF_NO) {
+                         done = DEF_YES;
+                         break;
+                     }
+                                                                /* Check if On Msg Tx Data Hook is initialized.         */
+                     if (p_msg->OnMsgTxData != DEF_NULL) {
+                         p_conn_const   = (HTTPc_CONN_OBJ        *)p_conn;
+                         p_msg_const    = (HTTPc_WEBSOCK_MSG_OBJ *)p_msg;
+                         p_msg->DataLen = p_msg->OnMsgTxData(p_conn_const,
+                                                             p_msg_const,
+                                                             p_conn->TxBufPtr,
+                                                             buf_size);
+
+                         if (p_msg->Len == HTTPc_WEBSOCK_TX_MSG_LEN_NOT_DEFINED) {
+                             if (p_msg->DataLen == 0) {
+                                 p_msg->Flags.IsFin = DEF_YES;
+                             } else {
+                                 p_msg->Flags.IsFin = DEF_NO;
+                             }
+                             p_msg->Len = p_msg->DataLen;
+                         }
+                         p_src_buf = p_conn->TxBufPtr;
+
+                     } else {
+                                                                /* Otherwise, use DataPtr.                              */
+                         p_src_buf = (CPU_CHAR *)p_msg->DataPtr + p_msg->LenSent;
+                     }
+                                                                /* Compute chunk len and TxDataPtr.                     */
+                     len_rem           = p_msg->Len - p_msg->LenSent;
+                     len               = DEF_MIN(len_rem, buf_size);
+                     p_conn->TxDataPtr = p_conn->BufPtr + p_conn->BufLen - len;
+
+                                                                /* Mask data and set Tx Buffer                          */
+                     HTTPcWebSock_SetTxBuf(p_msg, p_conn->TxDataPtr, p_src_buf, len);
+
+                                                                /* Set the Hdr if needed.                               */
+                     if (p_msg->Flags.IsHdrSet == DEF_NO) {
+                         hdr_len   = HTTPcWebSock_ComputeHdrLen(p_msg);
+                         p_tx_buf  = (CPU_CHAR *)p_conn->TxDataPtr;
+                         p_tx_buf -= hdr_len;
+                         HTTPcWebSock_SetTxBufHdr(p_conn,
+                                                  p_msg,
+                                                  p_tx_buf);
+                         p_conn->TxDataPtr     = (void*)p_tx_buf;
+                         p_msg->Flags.IsHdrSet = DEF_YES;
+                     }
+
+                     p_msg->LenSent   += len;
+                     p_conn->TxDataLen = len + hdr_len;
+                     p_ws->TxState     = HTTPc_WEBSOCK_TX_STATE_SEND_BUF;
+                     done = DEF_NO;
+                     break;
+
+
+                case HTTPc_WEBSOCK_TX_STATE_SEND_BUF:
+                                                                /* Send Data available in the buffer.                   */
+                     sock_rdy_wr  = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPc_FLAG_SOCK_RDY_WR);
+                     sock_rdy_err = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPc_FLAG_SOCK_RDY_ERR);
+                     if ((sock_rdy_wr  == DEF_YES) ||
+                         (sock_rdy_err == DEF_YES)) {
+                         (void)HTTPcSock_ConnDataTx(p_conn, &err);
+                         switch (err) {
+                             case HTTPc_ERR_NONE:
+                             case HTTPc_ERR_CONN_SOCK_TX:
+                                  break;
+
+                             default:
+                                  goto exit_err;
+                         }
+                     }
+
+                     if (p_conn->TxDataLen == 0u) {             /* If all the data available in the buf has been sent.  */
+
+                         if (p_msg->LenSent < p_msg->Len) {     /* Rtn to prev state if the frame is not completed.     */
+
+                             p_ws->TxState = HTTPc_WEBSOCK_TX_STATE_SET_BUF;
+
+                         } else if (p_msg->LenSent == p_msg->Len) {
+                                                                /* Validate if it was the last frame of the message.    */
+                             if (p_msg->Flags.IsFin == DEF_YES) {
+                                  p_ws->TxState = HTTPc_WEBSOCK_TX_STATE_COMPLETE;
+                                  done          = DEF_NO;
+                              } else {
+                                  p_msg->OpCode         = HTTPc_WEBSOCK_OPCODE_CONTINUATION_FRAME;
+                                  p_msg->Flags.IsHdrSet = DEF_NO;
+                                  p_msg->Len            = HTTPc_WEBSOCK_TX_MSG_LEN_NOT_DEFINED;
+                                  p_msg->LenSent        = 0;
+                                  p_ws->TxState         = HTTPc_WEBSOCK_TX_STATE_SET_BUF;
+                              }
+                         } else {
+                             err = HTTPc_ERR_WEBSOCK_FAULT;
+                             goto exit_err;
+                         }
+                     }
+                     break;
+
+
+                case HTTPc_WEBSOCK_TX_STATE_COMPLETE:
+
+                     p_ws->TxState            = HTTPc_WEBSOCK_TX_STATE_MSG_INIT;
+                     p_msg->Flags.IsCompleted = DEF_YES;
+
+                     switch (p_msg->OpCode) {                   /* Refresh WebSock states according to the msg types.   */
+
+                         case HTTPc_WEBSOCK_OPCODE_CONTINUATION_FRAME:
+                         case HTTPc_WEBSOCK_OPCODE_TXT_FRAME:
+                         case HTTPc_WEBSOCK_OPCODE_BIN_FRAME:
+                         case HTTPc_WEBSOCK_OPCODE_PING:
+                              break;
+
+                         case HTTPc_WEBSOCK_OPCODE_CLOSE:
+                                                                /* Check if it was initiated by the server.            */
+                              if (p_ws->Flags.IsCloseStarted == DEF_YES) {
+                                                                /* Set Close information.                              */
+                                 if (p_msg->Len >= sizeof(CPU_INT16U)) {
+                                     p_close_code              = (CPU_INT16U *)p_msg->DataPtr;
+                                     p_ws->CloseCode           = MEM_VAL_GET_INT16U_BIG(p_close_code);
+                                     p_ws->CloseReason.DataPtr = ((CPU_CHAR*)p_msg->DataPtr) + sizeof(CPU_INT16U);
+                                     p_ws->CloseReason.Len     = p_msg->Len - HTTPc_WEBSOCK_CLOSE_CODE_LEN;
+                                 } else {
+                                     p_ws->CloseCode           = HTTPc_WEBSOCK_CLOSE_CODE_NONE;
+                                     p_ws->CloseReason.DataPtr = DEF_NULL;
+                                     p_ws->CloseReason.Len     = 0u;
+                                 }
+                                                                /* Restore the Rx msg cached space.                    */
+                                 if (p_ws->Flags.IsRxDataCached == DEF_YES) {
+                                     p_conn->TxBufPtr           = p_conn->BufPtr;
+                                     p_ws->Flags.IsRxDataCached = DEF_NO;
+                                 }
+                                                                /* Closing Handshake is completed.                     */
+                                 p_conn->State              = HTTPc_CONN_STATE_WEBSOCK_CLOSE;
+                                 p_ws->Flags.IsCloseStarted = DEF_NO;
+                             } else {                           /* Otherwise, wait for the close response from server. */
+                                 p_ws->Flags.IsCloseStarted = DEF_YES;
+                             }
+                             break;
+
+                         case HTTPc_WEBSOCK_OPCODE_PONG:
+                                                                /* Check if the Pong msg was initiated by the server.  */
+                              if (p_ws->Flags.IsPongStarted == DEF_YES) {
+                                                                /* Restore the Rx msg cached space.                    */
+                                  if (p_ws->Flags.IsRxDataCached == DEF_YES) {
+                                      p_conn->TxBufPtr           = p_conn->BufPtr;
+                                      p_ws->Flags.IsRxDataCached = DEF_NO;
+                                  }
+                                  p_ws->Flags.IsPongStarted  = DEF_NO;
+                              }
+                              break;
+
+                         default:
+                             err = HTTPc_ERR_WEBSOCK_INVALID_OPCODE;
+                             goto exit_err;
+                     }
+
+                     if (p_msg == &p_ws->TxMsgCtrl) {           /* Check If Tx Msg object is the internal obj for ctrl. */
+                         p_ws->Flags.IsTxMsgCtrlUsed = DEF_NO;
+                         HTTPcWebSock_TxMsgRemove(p_conn);      /* Remove the Tx Msg obj in the list.                   */
+                     } else {
+                                                                /* On Msg Tx Complete Hook.                             */
+                         if (p_msg->OnMsgTxComplete != DEF_NULL) {
+                             p_conn_const = (HTTPc_CONN_OBJ        *)p_conn;
+                             p_msg_const  = (HTTPc_WEBSOCK_MSG_OBJ *)p_msg;
+                             p_msg->OnMsgTxComplete(p_conn_const, p_msg_const, DEF_OK);
+                         }
+
+                         HTTPcWebSock_TxMsgRemove(p_conn);      /* Remove the Tx Msg obj in the list.                   */
+
+#ifdef HTTPc_SIGNAL_TASK_MODULE_EN
+                                                                /* Signal that TX transaction is done.                  */
+                         if (p_conn->TransDoneSignal.SemObjPtr != DEF_NULL) {
+                             HTTPcTask_TransDoneSignal(p_conn, &err);
+                             if (err != HTTPc_ERR_NONE) {
+                                 CPU_SW_EXCEPTION(;);
+                             }
+                         }
+#endif
+                     }
+                     break;
+
+
+                default:
+                     err = HTTPc_ERR_WEBSOCK_INVALID_TX_STATE;
+                     goto exit_err;
+            }
+        } while (done == DEF_NO);
+    }
+    return;
+
+exit_err:
+    p_conn->ErrCode = err;
+    p_conn->State   = HTTPc_CONN_STATE_WEBSOCK_ERR;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcWebSock_RX()
+*
+* Description : Process the WebSocket states for RX.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcConn_WebSocketProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcWebSock_RX (HTTPc_CONN  *p_conn)
+{
+    HTTPc_ERR          err;
+    HTTPc_WEBSOCK     *p_ws;
+    CPU_BOOLEAN        sock_rdy_rd;
+    CPU_BOOLEAN        sock_rdy_err;
+    CPU_BOOLEAN        done;
+    CPU_BOOLEAN        result;
+    CPU_INT32U         rem_rx_len;
+    CPU_INT32U         rx_len;
+    HTTPc_CONN_OBJ    *p_conn_const;
+    CPU_INT32U         msg_len;
+    CPU_BOOLEAN        is_std;
+    CPU_INT16U        *p_close_code;
+
+                                                                /* ------------------ INITIALIZAITON ------------------ */
+    p_ws = p_conn->WebSockPtr;
+
+    if (p_conn->State != HTTPc_CONN_STATE_WEBSOCK_RXTX) {
+        return;
+    }
+
+    do {
+        done       = DEF_YES;                                   /* Always set to avoid unhandled state.                 */
+        rem_rx_len = 0u;
+                                                                /* --------------- RX STATES PROCESSING --------------- */
+        switch (p_ws->RxState) {
+
+            case HTTPc_WEBSOCK_RX_STATE_WAIT:
+
+                 if (p_conn->RxDataLenRem != 0) {               /* If there's data to process...                        */
+                     p_ws->RxState       = HTTPc_WEBSOCK_RX_STATE_HDR;
+                     p_ws->RxMsgLenRead  = 0u;
+                     p_conn->RxDataLen   = 0u;
+                     done                = DEF_NO;
+                     DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                 } else {                                       /* Otherwise, try to rx WebSocket header.               */
+                     DEF_BIT_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                     rem_rx_len = HTTPc_WEBSOCK_MAX_HEADER_LEN;
+                 }
+                 break;
+
+
+            case HTTPc_WEBSOCK_RX_STATE_HDR:                    /* Process the msg header.                              */
+
+                 rem_rx_len = HTTPcWebSock_GetMsgHdr(p_conn, &err);
+                 if (err != HTTPc_ERR_NONE) {
+                     goto exit_err;
+                 }
+
+                 if (rem_rx_len == 0u) {                        /* Proceed to the next step if successful.              */
+                     p_ws->RxState = HTTPc_WEBSOCK_RX_STATE_PREPARE;
+                     done          = DEF_NO;
+                     DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                                                                /* On Msg Rx Initialization Hook.                       */
+                     if (p_ws->OnMsgRxInit != DEF_NULL) {
+
+                         if ((p_ws->RxMsgOpCode == HTTPc_WEBSOCK_OPCODE_TXT_FRAME) ||
+                             (p_ws->RxMsgOpCode == HTTPc_WEBSOCK_OPCODE_BIN_FRAME)) {
+                                                                /* Check if the msg is fragmented.                      */
+                             if (p_ws->RxMsgFlags.IsFin == DEF_NO) {
+                                 msg_len = HTTPc_WEBSOCK_TX_MSG_LEN_NOT_DEFINED;
+                             } else {
+                                 msg_len = p_ws->RxMsgLen;
+                             }
+                             p_conn_const       = (HTTPc_CONN_OBJ *)p_conn;
+                             p_ws->RxMsgDataPtr = DEF_NULL;
+                             p_ws->OnMsgRxInit(p_conn_const, (HTTPc_WEBSOCK_MSG_TYPE)p_ws->RxMsgOpCode, msg_len, (void **)&(p_ws->RxMsgDataPtr));
+                         }
+                     }
+                 } else {                                       /* If there is no enough data rx to process the hdr.    */
+                     DEF_BIT_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                 }
+                 break;
+
+
+            case HTTPc_WEBSOCK_RX_STATE_PREPARE:
+
+                 rx_len = p_ws->RxMsgLenRead + p_conn->RxDataLenRem;
+
+                 if (rx_len < p_ws->RxMsgLen) {                 /* Compute to nb of bytes to rx if needed.             */
+                      rem_rx_len = p_ws->RxMsgLen - rx_len;
+                      DEF_BIT_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                 } else {                                       /* If the msg is already all rxd, process the payload. */
+                      done = DEF_NO;
+                      DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                 }
+                 p_ws->RxState = HTTPc_WEBSOCK_RX_STATE_PAYLOAD;
+                 break;
+
+
+            case HTTPc_WEBSOCK_RX_STATE_PAYLOAD:                /* Process the rxd payload data.                       */
+
+                 HTTPcWebSock_GetPayload(p_conn);
+
+                 DEF_BIT_CLR(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+                 if (p_ws->RxMsgLenRead < p_ws->RxMsgLen) {     /* If the msg is not rxed completely.                   */
+
+                     p_ws->RxState = HTTPc_WEBSOCK_RX_STATE_PREPARE;
+                                                                /* Continue to process if Ctrl msg.                     */
+                     if ((p_ws->RxMsgOpCode == HTTPc_WEBSOCK_OPCODE_CLOSE) ||
+                         (p_ws->RxMsgOpCode == HTTPc_WEBSOCK_OPCODE_PING ) ||
+                         (p_ws->RxMsgOpCode == HTTPc_WEBSOCK_OPCODE_PONG )) {
+                         done = DEF_NO;
+                     } else {                                   /* Otherwise, save the remaining rx data and exit.      */
+                         p_conn->TxBufPtr = p_conn->RxBufPtr + p_conn->RxDataLenRem;
+                         done = DEF_YES;
+                     }
+                                                                /* If the msg is rxed completely.                       */
+                 } else if (p_ws->RxMsgLenRead == p_ws->RxMsgLen) {
+
+                     if (p_ws->Flags.IsRxDataCached == DEF_NO) {
+                         p_conn->TxBufPtr = p_conn->BufPtr;     /* Reset TxBufPtr.                                      */
+                     }
+                     p_ws->RxState = HTTPc_WEBSOCK_RX_STATE_COMPLETE;
+                     done          = DEF_NO;
+                 } else {
+                     err = HTTPc_ERR_WEBSOCK_FAULT;
+                     goto exit_err;
+                 }
+                 break;
+
+
+            case HTTPc_WEBSOCK_RX_STATE_COMPLETE:
+
+                 switch (p_ws->RxMsgOpCode) {
+
+                     case HTTPc_WEBSOCK_OPCODE_CONTINUATION_FRAME:
+                     case HTTPc_WEBSOCK_OPCODE_TXT_FRAME:
+                     case HTTPc_WEBSOCK_OPCODE_BIN_FRAME:
+
+                          if (p_ws->RxMsgFlags.IsFin == DEF_YES) {
+                              p_ws->OrigOpCode  = HTTPc_WEBSOCK_OPCODE_NONE;
+                              p_ws->TotalMsgLen = 0u;
+                                                                /* On Msg Rx Complete Hook.                             */
+                              if (p_ws->OnMsgRxComplete != DEF_NULL) {
+                                  p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+                                  p_ws->OnMsgRxComplete(p_conn_const);
+                              }
+                          }
+                          p_ws->RxState = HTTPc_WEBSOCK_RX_STATE_WAIT;
+                          break;
+
+                     case HTTPc_WEBSOCK_OPCODE_PING:           /* Send a Pong Msg.                                     */
+
+                         if (p_ws->Flags.IsTxMsgCtrlUsed == DEF_NO) {
+                             HTTPcWebSock_SetCtrlResponse(p_conn, HTTPc_WEBSOCK_OPCODE_PONG,p_conn->RxBufPtr,p_ws->RxMsgLen);
+                             p_conn->RxBufPtr          += p_ws->RxMsgLen;
+                             p_ws->Flags.IsPongStarted  = DEF_YES;
+                             p_ws->RxState              = HTTPc_WEBSOCK_RX_STATE_WAIT;
+                         }
+                         break;
+
+                     case HTTPc_WEBSOCK_OPCODE_CLOSE:          /* Process the closing handshake                        */
+
+                          if (p_ws->RxMsgLen >= sizeof(CPU_INT16U)) {
+                              p_close_code              = (CPU_INT16U *)p_conn->RxBufPtr;
+                              p_ws->CloseCode           = MEM_VAL_GET_INT16U_BIG(p_close_code);
+                              p_ws->CloseReason.DataPtr = p_conn->RxBufPtr + HTTPc_WEBSOCK_CLOSE_CODE_LEN;
+                              p_ws->CloseReason.Len     = p_ws->RxMsgLen   - HTTPc_WEBSOCK_CLOSE_CODE_LEN;
+                          } else {
+                              p_ws->CloseCode           = HTTPc_WEBSOCK_CLOSE_CODE_NORMAL;
+                              p_ws->CloseReason.DataPtr = DEF_NULL;
+                              p_ws->CloseReason.Len     = 0u;
+                          }
+                                                                 /* Check if initiated by the application.               */
+                          if (p_ws->Flags.IsCloseStarted == DEF_YES) {
+
+                              p_conn->State              = HTTPc_CONN_STATE_WEBSOCK_CLOSE;
+                              p_ws->RxState              = HTTPc_WEBSOCK_RX_STATE_WAIT;
+                              p_ws->Flags.IsCloseStarted = DEF_NO;
+
+                          } else {
+                                                                 /* Otherwise, initiated by the server.                  */
+                              if (p_ws->Flags.IsTxMsgCtrlUsed == DEF_NO) {
+                                                                 /* Send a close response.                               */
+                                  is_std = HTTPcWebSock_IsStandardCloseCode(p_ws->CloseCode);
+                                  if (is_std == DEF_YES) {
+                                      HTTPcWebSock_SetCtrlResponse(p_conn, HTTPc_WEBSOCK_OPCODE_CLOSE, p_conn->RxBufPtr, p_ws->RxMsgLen);
+                                      p_ws->Flags.IsCloseStarted = DEF_YES;
+                                  } else {
+                                      err = HTTPc_ERR_WEBSOCK_RX_CLOSE_CODE_INVALID;
+                                      goto exit_err;
+                                  }
+                              }
+                              p_conn->RxBufPtr += p_ws->RxMsgLen;
+                              p_ws->RxState     = HTTPc_WEBSOCK_RX_STATE_WAIT;
+                          }
+                          break;
+
+                     case HTTPc_WEBSOCK_OPCODE_PONG:
+
+                                                                /* On Pong Hook.                                        */
+                              if (p_ws->OnPong != DEF_NULL) {
+                                  p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+                                  p_ws->OnPong(p_conn_const, p_conn->RxBufPtr,p_ws->RxMsgLen);
+                              }
+
+                          p_conn->RxBufPtr += p_ws->RxMsgLen;
+                          p_ws->RxState = HTTPc_WEBSOCK_RX_STATE_WAIT;
+                          break;
+
+                     default:
+                         err = HTTPc_ERR_WEBSOCK_INVALID_OPCODE;
+                         goto exit_err;
+                }
+
+                if ((p_conn->RxDataLenRem        == 0u     ) ||
+                    (p_ws->Flags.IsTxMsgCtrlUsed == DEF_YES)) {
+                    done = DEF_YES;
+                } else {
+                    done = DEF_NO;
+                }
+                break;
+
+
+            default:
+                err = HTTPc_ERR_WEBSOCK_INVALID_RX_STATE;
+                goto exit_err;
+        }
+                                                                /* --------------------- RX DATA ---------------------- */
+        result = DEF_BIT_IS_SET(p_conn->RespFlags, HTTPc_FLAG_RESP_RX_MORE_DATA);
+
+        if (result == DEF_YES) {                                /* If more data is needed...                            */
+
+            if (p_ws->Flags.IsRxDataCached == DEF_NO) {         /* ...and If there is no rx data cached for ctrl msg... */
+
+                sock_rdy_rd  = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPc_FLAG_SOCK_RDY_RD);
+                sock_rdy_err = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPc_FLAG_SOCK_RDY_ERR);
+
+                if((sock_rdy_rd  == DEF_YES) ||                 /* ...and if the sock is ready....                      */
+                   (sock_rdy_err == DEF_YES)) {
+                                                                /* ...then Rx data.                                     */
+                    result = HTTPcSock_ConnDataRx(p_conn, rem_rx_len, &err);
+                    switch (err) {
+                        case HTTPc_ERR_NONE:
+                        case HTTPc_ERR_CONN_SOCK_RX:
+                             break;
+
+                        case HTTPc_ERR_CONN_SOCK_CLOSED:
+                             p_conn->ErrCode     = HTTPc_ERR_NONE;
+                             p_conn->CloseStatus = HTTPc_CONN_CLOSE_STATUS_SERVER;
+                             p_conn->State       = HTTPc_CONN_STATE_WEBSOCK_CLOSE;
+                             break;
+
+                        default:
+                             goto exit_err;
+                    }
+
+                    if (result == DEF_OK) {
+                        if (p_conn->RxDataLenRem == 0u) {
+                            done = DEF_YES;
+                        } else {
+                            done = DEF_NO;
+                        }
+                    } else {
+                        if (p_conn->RxDataLenRem == 0u) {
+                            done = DEF_YES;
+                        }
+                    }
+                } else {
+                    done = DEF_YES;
+                }
+            }
+        }
+    } while (done == DEF_NO);
+
+    return;
+
+exit_err:
+    p_conn->ErrCode = err;
+    p_conn->State   = HTTPc_CONN_STATE_WEBSOCK_ERR;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPcWebSock_GetMsgHdr()
+*
+* Description : Process the header of a WebSocket message.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPc_ERR_NONE
+*                           HTTPc_ERR_WEBSOCK_INVALID_RX_LEN
+*
+* Return(s)   : Remaining number of bytes to parse the hdr.
+*
+* Caller(s)   : HTTPcWebSock_ProcessRXTX().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  HTTPcWebSock_GetMsgHdr (HTTPc_CONN  *p_conn,
+                                            HTTPc_ERR   *p_err)
+{
+    CPU_SIZE_T         len;
+    CPU_INT08U         hdr_1;
+    CPU_INT08U         hdr_2;
+    CPU_CHAR          *p_data;
+    CPU_INT64U         payload;
+    CPU_INT64U         rem_hdr;
+    HTTPc_WEBSOCK     *p_ws;
+    CPU_BOOLEAN        rsvd_bit;
+
+
+                                                                /* ------------------ INITIALIZATION ------------------ */
+   *p_err   = HTTPc_ERR_NONE;
+    rem_hdr = 0u;
+
+    len    = p_conn->RxDataLenRem;
+    p_data = p_conn->RxBufPtr;
+    p_ws   = p_conn->WebSockPtr;
+                                                                /* ----------------- PROCESS HDR BYTES ---------------- */
+    if (len < HTTPc_WEBSOCK_MIN_HEADER_LEN) {                   /* Check if enough data to compute the first parts of...*/
+         rem_hdr = HTTPc_WEBSOCK_MIN_HEADER_LEN;                /* ...the message hdr.                                  */
+         goto exit;
+    }
+                                                                /* Get the 2 first bytes.                               */
+    hdr_1   =  p_data[0];
+    hdr_2   =  p_data[1];
+    p_data += 2;
+    len    -= 2;
+                                                                /* Process msg OPCODE field.                            */
+    p_ws->RxMsgOpCode = hdr_1 & HTTPc_WEBSOCK_OPCODE_MASK;
+                                                                /* Process FIN bit.                                     */
+    p_ws->RxMsgFlags.IsFin = DEF_BIT_IS_SET(hdr_1,  HTTPc_WEBSOCK_FIN_BIT);
+
+                                                                /* Process RSVD bits.                                    */
+    rsvd_bit = DEF_BIT_IS_SET(hdr_1, DEF_BIT_06);
+    if (rsvd_bit == DEF_YES) {
+        *p_err = HTTPc_ERR_WEBSOCK_RX_RSVD_BIT_1_SET;
+         goto exit;
+    }
+
+    rsvd_bit = DEF_BIT_IS_SET(hdr_1, DEF_BIT_05);
+    if (rsvd_bit == DEF_YES) {
+        *p_err = HTTPc_ERR_WEBSOCK_RX_RSVD_BIT_2_SET;
+         goto exit;
+    }
+
+    rsvd_bit = DEF_BIT_IS_SET(hdr_1, DEF_BIT_04);
+    if (rsvd_bit == DEF_YES) {
+        *p_err = HTTPc_ERR_WEBSOCK_RX_RSVD_BIT_3_SET;
+         goto exit;
+    }
+                                                                /* Process MASK bit.                                    */
+    p_ws->RxMsgFlags.IsMasked = DEF_BIT_IS_SET(hdr_2, HTTPc_WEBSOCK_MASK_BIT);
+
+                                                                /* ----------------- PROCESS PAYLOAD ------------------ */
+    payload = hdr_2 & HTTPc_WEBSOCK_PAYLOAD_MASK;
+    rem_hdr = 0u;
+                                                                /* According for the 2 first bytes, check the rem...     */
+                                                                /* ...size of the hdr.                                   */
+    if (p_ws->RxMsgFlags.IsMasked == DEF_YES) {
+        rem_hdr += sizeof(CPU_INT32U);
+    }
+
+    if (payload == HTTPc_WEBSOCK_NORMAL_FRAME_CODE) {
+        rem_hdr += sizeof(CPU_INT16U);
+    } else if (payload == HTTPc_WEBSOCK_LONG_FRAME_CODE) {
+        rem_hdr += sizeof(CPU_INT64U);
+    }
+                                                                /* Check if enough data rxd data.                       */
+    if (len < rem_hdr ) {
+        goto exit;
+    }
+                                                                /* Get the msg PAYLOAD length.                          */
+    if (payload <= HTTPc_WEBSOCK_SMALL_FRAME_MAX_LEN) {
+                                                                /* Payload length is <= 125 .                           */
+        p_ws->RxMsgLen = payload;
+
+    } else if (payload == HTTPc_WEBSOCK_NORMAL_FRAME_CODE) {
+                                                                /* Payload length is > 125 and <= 65535.                */
+        p_ws->RxMsgLen = MEM_VAL_GET_INT16U_BIG(p_data);
+        p_data += sizeof(CPU_INT16U);
+
+    } else if (payload == HTTPc_WEBSOCK_LONG_FRAME_CODE) {
+                                                                /* Payload length is > 65535.                           */
+        payload = MEM_VAL_GET_INT32U_BIG(p_data);
+        if (payload != 0u) {
+           *p_err = HTTPc_ERR_WEBSOCK_INVALID_RX_LEN;
+            goto exit;
+        }
+        p_data  += sizeof(CPU_INT32U);
+        payload  = MEM_VAL_GET_INT32U_BIG(p_data);
+        Mem_Copy(&p_ws->RxMsgLen, &payload, sizeof(CPU_INT64U));
+        p_data  += sizeof(CPU_INT32U);
+    }
+                                                                /* ------------------ MSG VALIDATION ------------------ */
+    switch (p_ws->RxMsgOpCode ) {
+
+             case HTTPc_WEBSOCK_OPCODE_TXT_FRAME:
+             case HTTPc_WEBSOCK_OPCODE_BIN_FRAME:
+                                                                /* If not the first frame of a frag msg, must be cont.  */
+                   if (p_ws->TotalMsgLen != 0u) {
+                      *p_err = HTTPc_ERR_WEBSOCK_RX_FRAG_FRAME_SEQUENCE_INVALID;
+                       goto exit;
+                   }
+                   p_ws->OrigOpCode  = p_ws->RxMsgOpCode;
+                   p_ws->TotalMsgLen = p_ws->RxMsgLen;
+                   break;
+
+             case HTTPc_WEBSOCK_OPCODE_CONTINUATION_FRAME:
+
+                  if (p_ws->TotalMsgLen == 0u) {
+                     *p_err = HTTPc_ERR_WEBSOCK_RX_FRAG_FRAME_SEQUENCE_INVALID;
+                      goto exit;
+                  }
+
+                  p_ws->TotalMsgLen += p_ws->RxMsgLen;
+                  break;
+
+             case HTTPc_WEBSOCK_OPCODE_CLOSE:
+             case HTTPc_WEBSOCK_OPCODE_PING:
+             case HTTPc_WEBSOCK_OPCODE_PONG:
+                                                                /* Control message cannot be longer than 125 bytes.     */
+                 if (p_ws->RxMsgLen > HTTPc_WEBSOCK_MAX_CTRL_FRAME_LEN ) {
+                    *p_err = HTTPc_ERR_WEBSOCK_RX_CTRL_FRAME_TOO_LONG;
+                 }
+                                                                /* Control message cannot be fragmented.                */
+                 if (p_ws->RxMsgFlags.IsFin == DEF_NO) {
+                    *p_err = HTTPc_ERR_WEBSOCK_RX_CTRL_FRAME_FRAGMENTED;;
+                 }
+                 break;
+
+             default:
+                *p_err = HTTPc_ERR_WEBSOCK_RX_INVALID_OPCODE;
+         }
+                                                                /* --------------- PROCESS MASKING KEY ---------------- */
+    if (p_ws->RxMsgFlags.IsMasked == DEF_YES) {
+        Mem_Copy(&p_ws->RxMsgMskKey, p_data, sizeof(CPU_INT32U));
+        p_data += sizeof(CPU_INT32U);
+    }
+                                                                /* -------------- UPDATE CONN RX PARAMS --------------- */
+    p_conn->RxDataLenRem -= (p_data - p_conn->RxBufPtr);
+    p_conn->RxBufPtr      =  p_data;
+
+    rem_hdr = 0u;
+
+exit:
+    return rem_hdr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPcWebSock_GetPayload()
+*
+* Description : Get the payload of a WebSocket message.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcWebSock_ProcessRX().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcWebSock_GetPayload (HTTPc_CONN  *p_conn)
+{
+    CPU_CHAR                *p_buf;
+    HTTPc_CONN_OBJ          *p_conn_const;
+    HTTPc_WEBSOCK           *p_ws;
+    CPU_INT32U               content_len;
+    CPU_INT32U               msg_len_rem;
+    CPU_INT32U               chunk_len;
+    HTTPc_WEBSOCK_MSG_TYPE   msg_type;
+    CPU_INT32U               data_len_read;
+
+                                                                /* ------------------ INTIALIZATION ------------------- */
+    p_ws         =  p_conn->WebSockPtr;
+    p_conn_const = (HTTPc_CONN_OBJ *)p_conn;
+    p_buf        =  p_conn->RxBufPtr;
+    content_len  =  p_ws->RxMsgLen;
+
+    msg_len_rem = p_ws->RxMsgLen - p_conn->RxDataLen;
+
+    switch (p_ws->RxMsgOpCode) {
+                                                                /* -------------------- DATA FRAME -------------------- */
+        case HTTPc_WEBSOCK_OPCODE_CONTINUATION_FRAME:
+        case HTTPc_WEBSOCK_OPCODE_TXT_FRAME:
+        case HTTPc_WEBSOCK_OPCODE_BIN_FRAME:
+
+             if (msg_len_rem > p_conn->RxDataLenRem) {
+                 chunk_len = p_conn->RxDataLenRem;
+             } else {
+                 chunk_len = msg_len_rem;
+             }
+             if (p_conn->RxDataLen > content_len) {
+                 return;
+             }
+
+             if (p_ws->RxMsgOpCode == HTTPc_WEBSOCK_OPCODE_CONTINUATION_FRAME) {
+                 msg_type = (HTTPc_WEBSOCK_MSG_TYPE)p_ws->OrigOpCode;
+             } else {
+                 msg_type = (HTTPc_WEBSOCK_MSG_TYPE)p_ws->RxMsgOpCode;
+             }
+             if (p_ws->RxMsgDataPtr != DEF_NULL) {
+                 Mem_Copy(&((p_ws->RxMsgDataPtr)[p_ws->RxMsgLenRead]), p_buf, chunk_len);
+                 data_len_read = chunk_len;
+
+             }else if (p_ws->OnMsgRxData != DEF_NULL) {
+                 data_len_read = p_ws->OnMsgRxData(p_conn_const,
+                                                   msg_type,
+                                                   p_buf,
+                                                   chunk_len);
+             } else {
+                 data_len_read = chunk_len;
+             }
+
+
+             p_conn->RxDataLen    += data_len_read;
+             p_ws->RxMsgLenRead   += data_len_read;
+             p_conn->RxBufPtr     += data_len_read;
+             p_conn->RxDataLenRem -= data_len_read;
+             break;
+                                                                /* -------------------- CTRL FRAME -------------------- */
+        case HTTPc_WEBSOCK_OPCODE_PONG:
+        case HTTPc_WEBSOCK_OPCODE_CLOSE:
+        case HTTPc_WEBSOCK_OPCODE_PING:
+             if (p_ws->RxMsgLen <= p_conn->RxDataLenRem) {
+                 p_conn->TxBufPtr           = p_conn->RxBufPtr + p_conn->RxDataLenRem;
+                 p_conn->RxDataLenRem      -= p_ws->RxMsgLen;
+                 p_ws->Flags.IsRxDataCached = DEF_YES;
+                 p_ws->RxMsgLenRead        += p_ws->RxMsgLen;
+             }
+             break;
+
+        default:
+            break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPcWebSock_SetTxBuf()
+*
+* Description : Mask and copy a message into a buffer.
+*
+* Argument(s) : p_msg       Pointer to the WebSocket message object.
+*
+*               p_dst_buf   Pointer to the destination buffer.
+*
+*               p_src_buf   Pointer to the source buffer.
+*
+*               len         Length of the data to copy.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcWebSock_ProcessTX().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcWebSock_SetTxBuf (HTTPc_WEBSOCK_MSG  *p_msg,
+                                     CPU_CHAR           *p_dst_buf,
+                                     CPU_CHAR           *p_src_buf,
+                                     CPU_INT32U          len)
+{
+    CPU_INT32U  msk_idx;
+    CPU_INT32U  msg_idx;
+    CPU_CHAR    msk_byte[4];
+
+
+    if (len == 0u) {
+        return;
+    }
+
+    msk_byte[3] = (CPU_CHAR) (p_msg->MskKey & 0x000000FF);
+    msk_byte[2] = (CPU_CHAR)((p_msg->MskKey & 0x0000FF00)>>8);
+    msk_byte[1] = (CPU_CHAR)((p_msg->MskKey & 0x00FF0000)>>16);
+    msk_byte[0] = (CPU_CHAR)((p_msg->MskKey & 0xFF000000)>>24);
+
+    p_dst_buf += len;
+    p_src_buf += len;
+    msg_idx    = p_msg->LenSent + len ;
+
+    while (p_msg->LenSent < msg_idx) {
+        msg_idx--;
+        p_src_buf--;
+        p_dst_buf--;
+        msk_idx   = msg_idx % sizeof(CPU_INT32U);
+       *p_dst_buf = *p_src_buf ^ msk_byte[msk_idx];
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPc_WebSock_PrepareTxBufHdr()
+*
+* Description : Set the message header into the TX buffer..
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+*               p_tx_msg    Pointer to the WebSocket message object to send.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcWebSock_ProcessRXTX().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcWebSock_SetTxBufHdr (HTTPc_CONN         *p_conn,
+                                        HTTPc_WEBSOCK_MSG  *p_tx_msg,
+                                        CPU_CHAR           *p_tx_buf)
+{
+    CPU_CHAR       *p_hdr;
+    CPU_INT32U      tmp_len;
+    CPU_INT32U      tmp_mask;
+    CPU_BOOLEAN     fin;
+
+                                                                /* ------------------ INITIALIZATION ------------------ */
+    p_hdr = p_tx_buf;
+                                                                /* Set the first to Byte of the WebSocket hdr.          */
+    fin   = p_tx_msg->Flags.IsFin;
+   *p_hdr = p_tx_msg->OpCode + ((fin == DEF_YES) ? HTTPc_WEBSOCK_FIN_BIT : 0u);
+    p_hdr++;
+                                                                /* Set the Masking Key.                                 */
+   *p_hdr = HTTPc_WEBSOCK_MASK_BIT ;
+                                                                /* ----------------- SET PAYLOAD LEN ------------------ */
+    if (p_tx_msg->Len >= HTTPc_WEBSOCK_LONG_FRAME_MIN_LEN ) {   /* Use the extended 64-bits payload len.                */
+
+       *p_hdr += HTTPc_WEBSOCK_LONG_FRAME_CODE;
+        p_hdr++;
+
+        Mem_Clr(p_hdr, sizeof(CPU_INT32U));                     /* Maximum msg lenght is 32-bit.                        */
+        p_hdr  += sizeof(CPU_INT32U);
+
+        tmp_len = MEM_VAL_GET_INT32U_BIG(&p_tx_msg->Len);
+        Mem_Copy(p_hdr, &tmp_len, sizeof(CPU_INT32U));
+        p_hdr  += sizeof(CPU_INT32U);
+                                                                /* Use the extended 16-bits payload len.                */
+    } else if (p_tx_msg->Len >= HTTPc_WEBSOCK_NORMAL_FRAME_MIN_LEN ) {
+
+       *p_hdr += HTTPc_WEBSOCK_NORMAL_FRAME_CODE;
+        p_hdr++;
+
+        tmp_len = MEM_VAL_GET_INT16U_BIG(&p_tx_msg->Len);
+        Mem_Copy(p_hdr, &tmp_len, sizeof(CPU_INT16U));
+        p_hdr += sizeof(CPU_INT16U);
+    } else {                                                    /* Use the 7-bits payload len.                          */
+        *p_hdr += p_tx_msg->Len;
+         p_hdr++;
+    }
+                                                                /* ----------------- SET MASKING KEY ------------------ */
+    tmp_mask = MEM_VAL_GET_INT32U_BIG(&p_tx_msg->MskKey);
+    Mem_Copy(p_hdr,&tmp_mask,sizeof(CPU_INT32U));
+}
+
+
+/*
+*************************************************************************************************
+*                                    HTTPcWebSock_SetCtrlResponse()
+*
+* Description : Set an internal Control message response using cached Rx Data.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+*               opcode  Type of control frame to send.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcWebSock_ProcessRX().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void HTTPcWebSock_SetCtrlResponse (HTTPc_CONN             *p_conn,
+                                           HTTPc_WEBSOCK_OPCODE    opcode,
+                                           CPU_CHAR               *p_data,
+                                           CPU_INT32U              msg_len)
+{
+    HTTPc_WEBSOCK     *p_ws;
+    HTTPc_WEBSOCK_MSG *p_msg_tx;
+    HTTPc_ERR          err;
+
+                                                                /* ------------------- GET MSG PTR -------------------- */
+    p_ws     = p_conn->WebSockPtr;
+    p_msg_tx = &p_ws->TxMsgCtrl;
+
+                                                                /* --------------- SET TX CTRL MSG OBJ ---------------- */
+    p_msg_tx->Len            = msg_len;
+    p_msg_tx->LenSent        = 0u;
+    p_msg_tx->DataPtr        = p_data;
+    p_msg_tx->OpCode         = opcode;
+    p_msg_tx->ConnPtr        = p_conn;
+    p_msg_tx->Flags.IsFin    = DEF_YES;
+    p_msg_tx->Flags.IsMasked = DEF_YES;
+    p_msg_tx->Flags.IsHdrSet = DEF_NO;
+
+    p_ws->Flags.IsTxMsgCtrlUsed = DEF_YES;
+
+    HTTPcWebSock_TxMsgAdd(p_msg_tx, &err);
+
+    (void)&err;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPcWebSock_TxMsgRemove()
+*
+* Description : Remove the first message in the TX message queue.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcWebSock_TX(),
+*               HTTPcWebSock_TxMsgCleanList().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcWebSock_TxMsgRemove (HTTPc_CONN  *p_conn)
+{
+    HTTPc_WEBSOCK      *p_ws;
+    HTTPc_WEBSOCK_MSG  *p_msg_item;
+
+
+    p_ws       = p_conn->WebSockPtr;
+    p_msg_item = p_ws->TxMsgListHeadPtr;
+
+    if (p_msg_item == DEF_NULL) {
+        p_ws->TxMsgListEndPtr  = DEF_NULL;
+    } else if (p_msg_item->NextPtr == DEF_NULL) {
+        p_ws->TxMsgListHeadPtr = DEF_NULL;
+        p_ws->TxMsgListEndPtr  = DEF_NULL;
+        p_msg_item->NextPtr    = 0;
+    } else {
+        p_ws->TxMsgListHeadPtr = p_msg_item->NextPtr;
+    }
+    if (p_msg_item != DEF_NULL) {
+        p_msg_item->Flags.IsUsed = DEF_NO;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcWebSock_TxMsgCleanList()
+*
+* Description : Remove all the pending WebSocket message.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPcConn_WebSocketProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPcWebSock_TxMsgCleanList (HTTPc_CONN  *p_conn)
+{
+
+    HTTPc_WEBSOCK         *p_ws;
+    HTTPc_CONN_OBJ        *p_conn_const;
+    HTTPc_WEBSOCK_MSG     *p_msg;
+    HTTPc_WEBSOCK_MSG_OBJ *p_msg_const;
+
+
+    p_ws = p_conn->WebSockPtr;
+
+    while (p_ws->TxMsgListHeadPtr != DEF_NULL) {
+        p_msg = (HTTPc_WEBSOCK_MSG *)p_ws->TxMsgListHeadPtr;
+                                                                /* Call On Msg Tx Complete Callback if set.             */
+        if (p_msg->OnMsgTxComplete != DEF_NULL) {
+            p_conn_const = (HTTPc_CONN_OBJ        *)p_conn;
+            p_msg_const  = (HTTPc_WEBSOCK_MSG_OBJ *)p_ws->TxMsgListHeadPtr;
+            p_msg->OnMsgTxComplete(p_conn_const, p_msg_const, DEF_FAIL);
+        }
+        HTTPcWebSock_TxMsgRemove(p_conn);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPcWebSock_ComputeHdrLen()
+*
+* Description : Compute the header length of a WebSocket Msg.
+*
+* Argument(s) : p_msg   Pointer to a WebSocket Msg obj.
+*
+* Return(s)   : Length of the header.
+*
+* Caller(s)   : HTTPcWebSock_TX().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  HTTPcWebSock_ComputeHdrLen (HTTPc_WEBSOCK_MSG  *p_msg)
+{
+    CPU_INT16U hdr_len ;
+
+
+    hdr_len = 2;                                                /* Minimum Header Len.                                  */
+
+    if (p_msg->Len >= HTTPc_WEBSOCK_LONG_FRAME_MIN_LEN ) {
+                                                                /* Use the extended 64-bits payload len.                */
+        hdr_len += sizeof(CPU_INT64U);
+
+    } else if (p_msg->Len >= HTTPc_WEBSOCK_NORMAL_FRAME_MIN_LEN ) {
+                                                                /* Use the extended 16-bits payload len.                */
+        hdr_len += sizeof(CPU_INT16U);
+    }
+
+    if (p_msg->Flags.IsMasked == DEF_YES) {
+        hdr_len += sizeof(CPU_INT32U);
+    }
+
+    return (hdr_len);
+}
+
+/*
+*********************************************************************************************************
+*                                    HTTPcWebSock_IsProtocolError()
+*
+* Description : Check if the error code is related to a WebSocket protocol error.
+*
+* Argument(s) : err     Error code to check.
+*
+* Return(s)   : DEF_YES, if the error code is a protocol error.
+*               DEF_NO,  if the error code is NOT a protocol error.
+*
+* Caller(s)   : HTTPcWebSock_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPcWebSock_IsProtocolError (HTTPc_ERR  err)
+{
+
+
+    switch (err) {
+        case HTTPc_ERR_WEBSOCK_RX_RSVD_BIT_1_SET:
+        case HTTPc_ERR_WEBSOCK_RX_RSVD_BIT_2_SET:
+        case HTTPc_ERR_WEBSOCK_RX_RSVD_BIT_3_SET:
+        case HTTPc_ERR_WEBSOCK_RX_CTRL_FRAME_TOO_LONG:
+        case HTTPc_ERR_WEBSOCK_RX_CTRL_FRAME_FRAGMENTED:
+        case HTTPc_ERR_WEBSOCK_RX_INVALID_OPCODE:
+        case HTTPc_ERR_WEBSOCK_RX_FRAG_FRAME_SEQUENCE_INVALID:
+        case HTTPc_ERR_WEBSOCK_RX_CLOSE_CODE_INVALID:
+             return DEF_YES;
+
+        default:
+             return DEF_NO;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPcWebSock_IsStandardCloseCode()
+*
+* Description : Check if the Close code value is known and standarized.
+*
+* Argument(s) : close_code  Close code value to check.
+*
+* Return(s)   : DEF_YES, if the close code is standard.
+*               DEF_NO,  if the close code is NOT standard.
+*
+* Caller(s)   : HTTPcWebSock_RX().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPcWebSock_IsStandardCloseCode (HTTPc_WEBSOCK_CLOSE_CODE close_code)
+{
+
+
+    switch (close_code) {
+        case HTTPc_WEBSOCK_CLOSE_CODE_NORMAL:
+        case HTTPc_WEBSOCK_CLOSE_CODE_GOING_AWAY:
+        case HTTPc_WEBSOCK_CLOSE_CODE_PROTOCOL_ERR:
+        case HTTPc_WEBSOCK_CLOSE_CODE_DATA_TYPE_NOT_ALLOWED:
+        case HTTPc_WEBSOCK_CLOSE_CODE_DATA_TYPE_ERR:
+        case HTTPc_WEBSOCK_CLOSE_CODE_POLICY_VIOLATION:
+        case HTTPc_WEBSOCK_CLOSE_CODE_MSG_TOO_BIG:
+        case HTTPc_WEBSOCK_CLOSE_CODE_INVALID_EXT:
+        case HTTPc_WEBSOCK_CLOSE_CODE_UNEXPECTED_CONDITION:
+             return DEF_YES;
+
+        default:
+             break;
+    }
+    if ((close_code >= 3000) && (close_code <= 4999)) {
+        return DEF_YES;
+    }
+    return DEF_NO;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPc_WEBSOCK_MODULE_EN */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_websock.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_websock.h
new file mode 100644
index 0000000..030c48f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_websock.h
@@ -0,0 +1,411 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP CLIENT WEBSOCKET MODULE
+*
+* Filename      : http-c_websock.h
+* Version       : V3.00.02
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+#include  "../../Common/http.h"
+#include  "http-c.h"
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPc module present pre-processor macro definition.
+*
+*           (2) The following HTTPc-WebSocket-module configuration value MUST be pre-#define'd in
+*               'http-c.h' PRIOR to all other HTTPc modules that require the WebSocket Layer configuration:
+*
+*                   HTTPc_WEBSOCK_MODULE_EN
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPc_WEBSOCK_MODULE_PRESENT                           /* See Note #1.                                         */
+#define  HTTPc_WEBSOCK_MODULE_PRESENT
+
+#ifdef   HTTPc_WEBSOCK_MODULE_EN                                /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     WEBSOCKET HANDSHAKE DEFINES
+*********************************************************************************************************
+*/
+
+
+#define  HTTPc_WEBSOCK_GUID_STRING                  "258EAFA5-E914-47DA-95CA-C5AB0DC85B11"
+#define  HTTPc_WEBSOCK_GUID_STRING_LEN               sizeof(HTTPc_WEBSOCK_GUID_STRING)
+
+#define  HTTPc_WEBSOCK_PROTOCOL_VERSION_13           13u
+#define  HTTPc_WEBSOCK_PROTOCOL_VERSION_13_STR      "13"
+#define  HTTPc_WEBSOCK_PROTOCOL_VERSION_13_STR_LEN   sizeof(HTTPc_WEBSOCK_PROTOCOL_VERSION_13_STR) - 1
+
+#define  HTTPc_WEBSOCK_KEY_LEN                       16
+#define  HTTPc_WEBSOCK_KEY_ENCODED_LEN               NET_BASE64_ENCODER_OUT_MAX_LEN(HTTPc_WEBSOCK_KEY_LEN)
+#define  HTTPc_WEBSOCK_KEY_PRE_HASH_LEN              (HTTPc_WEBSOCK_KEY_ENCODED_LEN - 1) + (HTTPc_WEBSOCK_GUID_STRING_LEN - 1)
+#define  HTTPc_WEBSOCK_KEY_HASH_LEN                  NET_SHA1_HASH_SIZE
+#define  HTTPc_WEBSOCK_KEY_HASH_ENCODED_LEN          NET_BASE64_ENCODER_OUT_MAX_LEN(NET_SHA1_HASH_SIZE)
+
+
+/*
+*********************************************************************************************************
+*                                   WEBSOCKET FRAME LEN DEFINITION
+*********************************************************************************************************
+*/
+
+#define  HTTPc_WEBSOCK_SMALL_FRAME_MIN_LEN            0u
+#define  HTTPc_WEBSOCK_SMALL_FRAME_MAX_LEN            125u
+
+#define  HTTPc_WEBSOCK_NORMAL_FRAME_MIN_LEN           126u
+#define  HTTPc_WEBSOCK_NORMAL_FRAME_MAX_LEN           DEF_INT_16U_MAX_VAL
+#define  HTTPc_WEBSOCK_NORMAL_FRAME_CODE              126u
+
+#define  HTTPc_WEBSOCK_LONG_FRAME_MIN_LEN             DEF_INT_16U_MAX_VAL + 1
+#define  HTTPc_WEBSOCK_LONG_FRAME_MAX_LEN             DEF_INT_32U_MAX_VAL
+#define  HTTPc_WEBSOCK_LONG_FRAME_CODE                127u
+
+#define  HTTPc_WEBSOCK_MAX_CTRL_FRAME_LEN             HTTPc_WEBSOCK_SMALL_FRAME_MAX_LEN
+
+#define  HTTPc_WEBSOCK_CLOSE_CODE_LEN                 sizeof(CPU_INT16U)
+#define  HTTPc_WEBSOCK_MAX_CLOSE_REASON_LEN           HTTPc_WEBSOCK_MAX_CTRL_FRAME_LEN - HTTPc_WEBSOCK_CLOSE_CODE_LEN
+
+
+/*
+*********************************************************************************************************
+*                                       WEBSOCKET REQUEST FLAGS
+*********************************************************************************************************
+*/
+
+#define  HTTPc_FLAG_WEBSOCK_REQ_CONN_UPGRADE                   DEF_BIT_00
+#define  HTTPc_FLAG_WEBSOCK_REQ_UPGRADE_WEBSOCKET              DEF_BIT_01
+#define  HTTPc_FLAG_WEBSOCK_REQ_ACCEPT_VALIDATED               DEF_BIT_02
+#define  HTTPc_FLAG_WEBSOCK_REQ_VERSION_VALIDATED              DEF_BIT_03
+#define  HTTPc_FLAG_WEBSOCK_REQ_IN_USE                         DEF_BIT_04
+
+
+#define  HTTPc_FLAG_WEBSOCK_ALL       (HTTPc_FLAG_WEBSOCK_REQ_CONN_UPGRADE      | \
+                                       HTTPc_FLAG_WEBSOCK_REQ_UPGRADE_WEBSOCKET | \
+                                       HTTPc_FLAG_WEBSOCK_REQ_ACCEPT_VALIDATED)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  WEBSOCKET CLOSE REASON STRUCTURE
+*********************************************************************************************************
+*/
+
+typedef struct httpc_websock_close_reason {
+    CPU_CHAR     *DataPtr;
+    CPU_INT08U    Len;
+}HTTPc_WEBSOCK_CLOSE_REASON;
+
+
+/*
+*********************************************************************************************************
+*                                            WEBSOCKET FLAGS
+*********************************************************************************************************
+*/
+
+typedef struct httpc_flag_websock_msg {
+    CPU_INT08U  IsUsed          : 1;
+    CPU_INT08U  IsNoBlock       : 1;
+    CPU_INT08U  IsFin           : 1;
+    CPU_INT08U  IsMasked        : 1;
+    CPU_INT08U  IsHdrSet        : 1;
+    CPU_INT08U  IsCompleted     : 1;
+} HTTPc_FLAG_WEBSOCK_MSG;
+
+typedef struct httpc_flag_websock {
+    CPU_INT08U  IsTxMsgCtrlUsed : 1;
+    CPU_INT08U  IsRxDataCached  : 1;
+    CPU_INT08U  IsWebsockUsed   : 1;
+    CPU_INT08U  IsCloseStarted  : 1;
+    CPU_INT08U  IsPongStarted   : 1;
+
+} HTTPc_FLAG_WEBSOCK;
+
+typedef struct httpc_flag_websock_rx  {
+    CPU_INT08U  IsFin    : 1;
+    CPU_INT08U  IsMasked : 1;
+} HTTPc_FLAG_WEBSOCK_RX;
+
+
+/*
+*********************************************************************************************************
+*                                        WEBSOCKET INTERNAL STATES
+*********************************************************************************************************
+*/
+
+typedef enum {
+    HTTPc_WEBSOCK_TX_STATE_MSG_INIT,
+    HTTPc_WEBSOCK_TX_STATE_SET_BUF,
+    HTTPc_WEBSOCK_TX_STATE_SEND_BUF,
+    HTTPc_WEBSOCK_TX_STATE_COMPLETE,
+} HTTPc_WEBSOCK_TX_STATE;
+
+
+typedef enum {
+    HTTPc_WEBSOCK_RX_STATE_WAIT,
+    HTTPc_WEBSOCK_RX_STATE_HDR,
+    HTTPc_WEBSOCK_RX_STATE_PREPARE,
+    HTTPc_WEBSOCK_RX_STATE_PAYLOAD,
+    HTTPc_WEBSOCK_RX_STATE_COMPLETE,
+} HTTPc_WEBSOCK_RX_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                  HOOK & CALLBACK FUNCTIONS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  void         (*HTTPc_WEBSOCK_ON_OPEN)             (HTTPc_CONN_OBJ                *p_conn);
+
+typedef  void         (*HTTPc_WEBSOCK_ON_CLOSE)            (HTTPc_CONN_OBJ                *p_conn,
+                                                            HTTPc_WEBSOCK_CLOSE_CODE       close_code,
+                                                            HTTPc_WEBSOCK_CLOSE_REASON    *p_reason);
+
+typedef  void         (*HTTPc_WEBSOCK_ON_RX_INIT)          (HTTPc_CONN_OBJ                *p_conn,
+                                                            HTTPc_WEBSOCK_MSG_TYPE         msg_type,
+                                                            CPU_INT32U                     msg_len,
+                                                            void                         **p_data);
+
+typedef  CPU_INT32U   (*HTTPc_WEBSOCK_ON_RX_DATA)          (HTTPc_CONN_OBJ                *p_conn,
+                                                            HTTPc_WEBSOCK_MSG_TYPE         msg_type,
+                                                            void                          *p_data,
+                                                            CPU_INT16U                     data_len);
+
+typedef  void         (*HTTPc_WEBSOCK_ON_RX_COMPLETE)      (HTTPc_CONN_OBJ                *p_conn);
+
+
+typedef  CPU_INT32U   (*HTTPc_WEBSOCK_ON_TX_INIT)          (HTTPc_CONN_OBJ                *p_conn,
+                                                            HTTPc_WEBSOCK_MSG_OBJ         *p_ws_msg);
+
+
+typedef  CPU_INT32U   (*HTTPc_WEBSOCK_ON_TX_DATA)          (HTTPc_CONN_OBJ                *p_conn,
+                                                            HTTPc_WEBSOCK_MSG_OBJ         *p_websock_msg,
+                                                            CPU_CHAR                      *p_buf,
+                                                            CPU_INT32U                     buf_len);
+
+typedef  void         (*HTTPc_WEBSOCK_ON_TX_COMPLETE)      (HTTPc_CONN_OBJ                *p_conn,
+                                                            HTTPc_WEBSOCK_MSG_OBJ         *p_websock_msg,
+                                                            CPU_BOOLEAN                    status);
+
+typedef  void         (*HTTPc_WEBSOCK_ON_ERR)              (HTTPc_CONN_OBJ                *p_conn,
+                                                            HTTPc_ERR                      err);
+
+typedef  void         (*HTTPc_WEBSOCK_ON_PONG)             (HTTPc_CONN_OBJ                *p_conn,
+                                                            CPU_CHAR                      *p_data,
+                                                            CPU_INT16U                     data_len);
+
+
+/*
+*********************************************************************************************************
+*                                WEBSOCKET MSG TASK CALLBACK FIELDS MACRO
+*********************************************************************************************************
+*/
+
+#define  TASK_WEBSOCK_MSG_CALLBACK_FIELDS_DEF(prefix, suffix)  FIELD_DEF(prefix,  HTTPc_WEBSOCK_ON_TX_INIT,      OnMsgTxInit,       suffix) \
+                                                               FIELD_DEF(prefix,  HTTPc_WEBSOCK_ON_TX_DATA,      OnMsgTxData,       suffix) \
+                                                               FIELD_DEF(prefix,  HTTPc_WEBSOCK_ON_TX_COMPLETE,  OnMsgTxComplete,   suffix)
+
+
+/*
+*********************************************************************************************************
+*                                WEBSOCKET TASK CALLBACK FIELDS MACRO
+*********************************************************************************************************
+*/
+
+#define  TASK_WEBSOCK_CALLBACK_FIELDS_DEF(prefix, suffix)  FIELD_DEF(prefix,  HTTPc_WEBSOCK_ON_OPEN,         OnOpen,            suffix) \
+                                                           FIELD_DEF(prefix,  HTTPc_WEBSOCK_ON_CLOSE,        OnClose,           suffix) \
+                                                           FIELD_DEF(prefix,  HTTPc_WEBSOCK_ON_ERR,          OnErr,             suffix) \
+                                                           FIELD_DEF(prefix,  HTTPc_WEBSOCK_ON_RX_INIT,      OnMsgRxInit,       suffix) \
+                                                           FIELD_DEF(prefix,  HTTPc_WEBSOCK_ON_RX_DATA,      OnMsgRxData,       suffix) \
+                                                           FIELD_DEF(prefix,  HTTPc_WEBSOCK_ON_RX_COMPLETE,  OnMsgRxComplete,   suffix) \
+                                                           FIELD_DEF(prefix,  HTTPc_WEBSOCK_ON_PONG,         OnPong,            suffix)
+
+
+/*
+*********************************************************************************************************
+*                                     WEBSOCKET REQUEST STRUCTURE
+*********************************************************************************************************
+*/
+
+struct httpc_websock_req {
+    CPU_CHAR       Key[HTTPc_WEBSOCK_KEY_ENCODED_LEN];
+    CPU_CHAR       Accept[HTTPc_WEBSOCK_KEY_HASH_ENCODED_LEN];
+    CPU_INT08U     Flags;
+    HTTPc_WEBSOCK *WebSockObjPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                                  WEBSOCKET MESSAGE STRUCTURE MACRO
+*********************************************************************************************************
+*/
+
+#define  STRUCT_WS_MSG_INIT(prefix, suffix)  \
+    FIELD_DEF(prefix,  HTTPc_FLAG_WEBSOCK_MSG,     Flags,            suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_OPCODE,       OpCode,           suffix) \
+    FIELD_DEF(prefix,  CPU_INT32U,                 Len,              suffix) \
+    FIELD_DEF(prefix,  CPU_INT32U,                 DataLen,          suffix) \
+    FIELD_DEF(prefix,  CPU_INT32U,                 LenSent,          suffix) \
+    FIELD_DEF(prefix,  CPU_INT32U,                 MskKey,           suffix) \
+    FIELD_DEF(prefix,  void,                      *DataPtr,          suffix) \
+    FIELD_DEF(prefix,  HTTPc_CONN,                *ConnPtr,          suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_MSG,         *NextPtr,          suffix) \
+    TASK_WEBSOCK_MSG_CALLBACK_FIELDS_DEF(prefix, suffix)                     \
+    USER_DATA_FIELD_DEF(,)
+
+struct httpc_websock_msg_obj {
+    STRUCT_WS_MSG_INIT(const, _reserved)
+};
+
+struct httpc_websock_msg {
+    STRUCT_WS_MSG_INIT(,)
+};
+
+
+/*
+*********************************************************************************************************
+*                                      WEBSOCKET STRUCTURE MACRO
+*********************************************************************************************************
+*/
+
+#define  STRUCT_WS_INIT(prefix, suffix)  \
+    FIELD_DEF(prefix,  HTTPc_FLAG_WEBSOCK,         Flags,            suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_MSG,         *TxMsgListHeadPtr, suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_MSG,         *TxMsgListEndPtr,  suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_MSG,          TxMsgCtrl,        suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_OPCODE,       RxMsgOpCode,      suffix) \
+    FIELD_DEF(prefix,  HTTPc_FLAG_WEBSOCK_RX,      RxMsgFlags,       suffix) \
+    FIELD_DEF(prefix,  CPU_INT32U,                 RxMsgLen,         suffix) \
+    FIELD_DEF(prefix,  CPU_INT32U,                 RxMsgLenRead,     suffix) \
+    FIELD_DEF(prefix,  CPU_INT32U,                 RxMsgMskKey,      suffix) \
+    FIELD_DEF(prefix,  CPU_CHAR,                  *RxMsgDataPtr,     suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_TX_STATE,     TxState,          suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_RX_STATE,     RxState,          suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_CLOSE_CODE,   CloseCode,        suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_CLOSE_REASON, CloseReason,      suffix) \
+    FIELD_DEF(prefix,  CPU_INT32U,                 TotalMsgLen,      suffix) \
+    FIELD_DEF(prefix,  HTTPc_WEBSOCK_OPCODE,       OrigOpCode,       suffix) \
+    TASK_WEBSOCK_CALLBACK_FIELDS_DEF(prefix, suffix)                         \
+    USER_DATA_FIELD_DEF(,)
+
+struct httpc_websock_obj {
+    STRUCT_WS_INIT(const, _reserved)
+};
+
+struct httpc_websock {
+    STRUCT_WS_INIT(,)
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void               HTTPcWebSock_Process        (HTTPc_CONN         *p_conn);
+
+HTTPc_WEBSOCK_REQ *HTTPcWebSock_InitReqObj     (HTTPc_ERR          *p_err);
+
+void               HTTPcWebSock_TxMsgAdd       (HTTPc_WEBSOCK_MSG  *p_msg,
+                                                HTTPc_ERR          *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#endif  /* HTTPc_WEBSOCK_MODULE_EN       */
+#endif  /* HTTPc_WEBSOCK_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Client/subdir.mk b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/subdir.mk
new file mode 100644
index 0000000..1b93cca
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Client/subdir.mk
@@ -0,0 +1,10 @@
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-HTTP/Common/http.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-HTTP/Common/http_dict.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_conn.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_mem.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_req.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_resp.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_sock.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_task.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-HTTP/Client/Source/http-c_websock.c
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn-c.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn-c.c
new file mode 100644
index 0000000..54d6a2b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn-c.c
@@ -0,0 +1,1461 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                                EXAMPLE
+*
+*                                  HTTP CLIENT APPLICATION FUNCTIONS FILE
+*
+* Filename      : autobahn.c
+* Version       : V1.00.00
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.00.00
+*                       (d) uC/TCP-IP V3.02.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define    MICRIUM_SOURCE
+#define    HTTPc_APP_MODULE
+#include  
+
+#include  "autobahn-c.h"
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define  AUTOBAHNc_DFLT_AGENT_NAME  "DUT_uC/HTTPc"
+#define  AUTOBAHNc_DFLT_URI         "127.0.0.1"
+#define  AUTOBAHNc_DFLT_PORT         9001u
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+                                                                /* ------------------ LOCAL FUNCTION ------------------ */
+
+static CPU_BOOLEAN  AutobahnClient_EchoHandler                    (AUTOBAHNc_OBJ                  *p_ab);
+
+static CPU_BOOLEAN  AutobahnClient_GetCaseCount                   (AUTOBAHNc_OBJ                  *p_ab);
+
+static CPU_BOOLEAN  AutobahnClient_RunCases                       (AUTOBAHNc_OBJ                  *p_ab);
+
+static CPU_BOOLEAN  AutobahnClient_UpdateReports                  (AUTOBAHNc_OBJ                  *p_ab);
+
+static CPU_BOOLEAN  AutobahnClient_OpenWebSocket                  (AUTOBAHNc_OBJ                  *p_ab,
+                                                                   CPU_CHAR                       *p_resource_path,
+                                                                   AUTOBAHNc_CB                   *p_ab_cb);
+
+static void         AutobahnClient_ShellPrintOutStr               (AUTOBAHNc_OBJ                  *p_ab,
+                                                                   CPU_CHAR                       *p_str);
+
+static CPU_BOOLEAN  AutobahnClient_ShellPrintOutNumber            (AUTOBAHNc_OBJ                  *p_ab,
+                                                                   CPU_INT32U                      nb);
+
+                                                                /* -------------------- CALLBACKS --------------------- */
+
+static void         AutobahnClient_ConnCloseCallback              (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_CONN_CLOSE_STATUS         close_status,
+                                                                   HTTPc_ERR                       err);
+
+static void         AutobahnClient_TransErrCallback               (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_REQ_OBJ                  *p_req,
+                                                                   HTTPc_ERR                       err_code);
+
+static void         AutobahnClient_WebsockOnOpenCallback          (HTTPc_CONN_OBJ                 *p_conn);
+
+static void         AutobahnClient_WebsockOnCloseCallback         (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_WEBSOCK_CLOSE_CODE        close_status,
+                                                                   HTTPc_WEBSOCK_CLOSE_REASON     *p_reason);
+
+static CPU_INT32U   AutobahnClient_WebsockOnMsgGetCountCallback   (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_WEBSOCK_MSG_TYPE            opcode,
+                                                                   void                           *p_data,
+                                                                   CPU_INT16U                      data_len);
+
+static CPU_INT32U   AutobahnClient_WebsockOnMsgRunCaseCallback    (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_WEBSOCK_MSG_TYPE            opcode,
+                                                                   void                           *p_data,
+                                                                   CPU_INT16U                      data_len);
+
+
+static void         AutobahnClient_WebsockOnTxCompletedCallback   (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_WEBSOCK_MSG_OBJ          *p_websock_msg,
+                                                                   CPU_BOOLEAN                     status);
+                                                                   
+static void         AutobahnClient_WebSockErrCallback             (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_ERR                       err);
+                                                                   
+void                AutobahnClient_TransCompleteCallback          (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_REQ_OBJ                  *p_req,
+                                                                   HTTPc_RESP_OBJ                 *p_resp,
+                                                                   CPU_BOOLEAN                     status);
+                                                                   
+static CPU_INT32U  AutobahnClient_WebSockOnTxMsgInit              (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_WEBSOCK_MSG_OBJ          *p_msg);
+                                                                   
+static CPU_INT32U  AutobahnClient_WebsockOnMsgTxCallback          (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_WEBSOCK_MSG_OBJ          *p_msg,
+                                                                   CPU_CHAR                       *p_buf,
+                                                                   CPU_INT32U                      buf_len);
+                                                                   
+static void  AutobahnClient_WebsockOnMsgRxInitRunCaseCallback     (HTTPc_CONN_OBJ                 *p_conn,
+                                                                   HTTPc_WEBSOCK_MSG_TYPE          opcode,
+                                                                   CPU_INT32U                      msg_len,
+                                                                   void                          **p_data);
+                                                                   
+static void  AutobahnClient_WebsockOnMsgRxCompleteRunCaseCallback (HTTPc_CONN_OBJ                 *p_conn);
+
+
+/*
+********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+AUTOBAHNc_CB AutobahnClient_CB = { AutobahnClient_ConnCloseCallback,
+                                   AutobahnClient_TransErrCallback,
+                                   AutobahnClient_WebsockOnOpenCallback,
+                                   AutobahnClient_WebsockOnCloseCallback,
+                                   AutobahnClient_WebSockErrCallback,
+                                   DEF_NULL,
+                                   DEF_NULL,
+                                   DEF_NULL,
+                                   AutobahnClient_WebSockOnTxMsgInit,
+                                   AutobahnClient_WebsockOnMsgTxCallback,
+                                   AutobahnClient_WebsockOnTxCompletedCallback,
+                                   DEF_NULL,
+                                   AutobahnClient_TransCompleteCallback,
+                                 };
+
+
+
+/*
+*********************************************************************************************************
+*                                            Autobahn_Init()
+*
+* Description : Initialize the Autobahn module
+*
+* Argument(s) : p_uri           Pointer to a string (URI) to the Host server to connect to.
+*
+*               p_agent_name    Agent name that will be used to generate reports by the server.
+*
+*               port            Port of the server to connect to
+*
+* Return(s)   : If operation successful,   Pointer to the created Autobahn object.
+*               If operation failed,       DEF_NULL.
+*
+* Caller(s)   : Autobahn_Launch().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+//AUTOBAHNc_OBJ GLOBAL_AB;
+AUTOBAHNc_OBJ *AutobahnClient_Init ()
+{
+    KAL_ERR         err_kal;
+    LIB_ERR         lib_err;
+    AUTOBAHNc_OBJ   *p_ab;
+
+                                                                /* Create the Autobahn Object.                          */
+    p_ab = (AUTOBAHNc_OBJ *) Mem_HeapAlloc( sizeof(AUTOBAHNc_OBJ),
+                                            CPU_WORD_SIZE_32,
+                                            DEF_NULL,
+                                            &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        p_ab = DEF_NULL;
+        goto exit;
+    }
+    //p_ab = &GLOBAL_AB;
+                                                                /* Create a Q for received message.                     */
+    p_ab->Q_Handle = KAL_QCreate("AutobahnQ",
+                                  AUTOBAHN_MAX_NB_BUF,
+                                  DEF_NULL,
+                                 &err_kal);
+    if(err_kal != KAL_ERR_NONE) {
+        // Cleanup
+        p_ab = DEF_NULL;
+        goto exit;
+    }
+                                                                /* Create a Pool for the websocket txmsg obj.            */
+    Mem_PoolCreate(&p_ab->TxMsgPool,
+                    NULL,
+                    0u,
+                    AUTOBAHN_MAX_NB_BUF,
+                    sizeof(HTTPc_WEBSOCK_MSG_OBJ),
+                    CPU_WORD_SIZE_32,
+                    DEF_NULL,
+                   &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        // Cleanup
+        p_ab = DEF_NULL;
+        goto exit;
+    }
+
+                                                                /* Create a Pool for the message buffer.                 */
+    Mem_PoolCreate(&p_ab->MsgBufPool,
+                    NULL,
+                    0u,
+                    AUTOBAHN_MAX_NB_BUF,
+                    sizeof(AUTOBAHN_ECHO_BUF),
+                    CPU_WORD_SIZE_32,
+                    DEF_NULL,
+                   &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        // Cleanup
+        p_ab = DEF_NULL;
+        goto exit;
+    }
+                                                             /* Create a semaphore for the Tx msg pool access.          */
+    p_ab->TxMsgCnt = KAL_SemCreate("txmsgcnt",
+                                    DEF_NULL,
+                                    &err_kal);
+    if (err_kal != KAL_ERR_NONE) {
+        // Cleanup
+        p_ab = DEF_NULL;
+        goto exit;
+    }
+                                                             /* Set the number of semaphore to the pool qty.            */
+    KAL_SemSet (p_ab->TxMsgCnt,
+                AUTOBAHN_MAX_NB_BUF,
+                &err_kal);
+    if (err_kal != KAL_ERR_NONE) {
+        // Cleanup
+        p_ab = DEF_NULL;
+        goto exit;
+    }
+                                                            /* Initialize Autobahn obj members.                         */
+    p_ab->CurrentBufPtr    = DEF_NULL;
+    p_ab->Agent            = AUTOBAHNc_DFLT_AGENT_NAME;
+    p_ab->URI              = AUTOBAHNc_DFLT_URI;
+    p_ab->Port             = AUTOBAHNc_DFLT_PORT;
+    p_ab->MaxBufUsage      = 0u;
+    p_ab->Flags.NoBlock    = DEF_NO;
+    p_ab->Flags.TxCallback = DEF_NO;
+    p_ab->Flags.Frag       = DEF_NO;
+    p_ab->CallBacksPtr     = &AutobahnClient_CB;
+    Mem_Clr(&p_ab->Conn,  sizeof(HTTPc_CONN));
+    Mem_Clr(&p_ab->Req,   sizeof(HTTPc_REQ));
+    Mem_Clr(&p_ab->Resp,  sizeof(HTTPc_RESP));
+    Mem_Clr(&p_ab->WS,    sizeof(HTTPc_WEBSOCK));
+
+exit:
+        return p_ab;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Autobahn_Launch()
+*
+* Description : Launch the Autobahn Test suite as a Client
+*
+* Argument(s) : p_uri           Pointer to a string (URI) to the Host server to connect to.
+*
+*               p_agent_name    Agent name that will be used to generate reports by the server.
+*
+*               port            Port of the server to connect to
+*
+* Return(s)   : If the operation is successful,  DEF_OK.
+*               If the operation has failed,     DEF_FAIL.
+*
+* Caller(s)   : AppTaskStart().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN AutobahnClient_Launch (AUTOBAHNc_OBJ *p_ab_client)
+{
+    CPU_BOOLEAN        success;
+
+                                                                /* Get the number of test case available.               */
+    success = AutobahnClient_GetCaseCount(p_ab_client);
+    if (success != DEF_OK) {
+        goto exit;
+    }
+                                                                /* Run all the test available.                          */
+    success = AutobahnClient_RunCases(p_ab_client);
+    if (success != DEF_OK) {
+        goto exit;
+    }
+                                                                /* Send a Update report request.                        */
+    success = AutobahnClient_UpdateReports(p_ab_client);
+
+exit:
+    return success;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Autobahn_GetCaseCount()
+*
+* Description : Get the number of test case available on the server.
+*
+* Argument(s) : p_ab    Pointer to the Autobahn client object
+*
+* Return(s)   : If the operation is successful,  DEF_OK.
+*               If the operation has failed,     DEF_FAIL.
+*
+* Caller(s)   : AutobahnClient_Launch().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static CPU_BOOLEAN AutobahnClient_GetCaseCount (AUTOBAHNc_OBJ *p_ab)
+{
+    CPU_BOOLEAN ret_val;
+    CPU_INT08U  retry;
+
+    AutobahnClient_ShellPrintOutStr(p_ab,"\r\n --- GET CASE COUNT ---\n\r\r\n");
+
+                                                            /* Set the specific OnMsgRx CallBack.                       */
+    AutobahnClient_CB.WSOnMsgRxInit     = DEF_NULL;
+    AutobahnClient_CB.WSOnMsgRxData     = (HTTPc_WEBSOCK_ON_RX_DATA)AutobahnClient_WebsockOnMsgGetCountCallback;
+    AutobahnClient_CB.WSOnMsgRxComplete = DEF_NULL;
+
+                                                            /* There's no Query str in this req.                        */
+    p_ab->ReqQueryStrNb   = 0u;
+
+    for (retry = 0; retry < 5; retry++) {
+                                                            /* Open the Websocket.                                      */
+        ret_val  = AutobahnClient_OpenWebSocket(p_ab, AUTOBAHN_GET_CASE_COUNT_RES,p_ab->CallBacksPtr);
+
+        if (ret_val == DEF_OK) {
+            break;                                          /* Continue if the operation is successful.                 */
+        } else {
+            KAL_Dly(1000);                                  /* Wait and try back if the operation failed.               */
+        }
+    }
+                                                            /* Exit, if the connection has failed.                       */
+    if (retry >= 5) {
+        ret_val = DEF_FAIL;
+        goto exit;
+    }
+                                                            /* Launch the Echo handler and wait for websocket reply.    */
+    ret_val = AutobahnClient_EchoHandler(p_ab);
+
+    KAL_Dly(10);
+
+    AutobahnClient_ShellPrintOutStr(p_ab,"\r\n -> Number of test to run: ");
+    AutobahnClient_ShellPrintOutNumber(p_ab,p_ab->CaseCount);
+    AutobahnClient_ShellPrintOutStr(p_ab,"\r\n");
+exit:
+    return ret_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Autobahn_RunCases()
+*
+* Description : Run all the case available on a Autobahn test suite server.
+*
+* Argument(s) : p_ab    Pointer to the Autobahn client object
+*
+* Return(s)   : If the operation is successful,  DEF_OK.
+*               If the operation has failed,     DEF_FAIL.
+*
+* Caller(s)   : AutobahnClient_Launch().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static CPU_BOOLEAN AutobahnClient_RunCases (AUTOBAHNc_OBJ *p_ab)
+{
+    CPU_BOOLEAN      ret_val;
+    HTTPc_KEY_VAL   *p_key_val_1;
+    HTTPc_KEY_VAL   *p_key_val_2;
+    CPU_INT08U       retry;
+
+                                                            /* Set the specific OnMsgRx CallBack.                       */
+
+    AutobahnClient_CB.WSOnMsgRxInit     = AutobahnClient_WebsockOnMsgRxInitRunCaseCallback;
+    AutobahnClient_CB.WSOnMsgRxData     = (HTTPc_WEBSOCK_ON_RX_DATA)AutobahnClient_WebsockOnMsgRunCaseCallback;
+    AutobahnClient_CB.WSOnMsgRxComplete = AutobahnClient_WebsockOnMsgRxCompleteRunCaseCallback;
+
+
+                                                            /* There is 2 KeyVal Pair to set for this req.              */
+    p_ab->ReqQueryStrNb  = 2u;
+                                                            /* KeyVal 1: "case".                                        */
+    p_key_val_1         = &p_ab->ReqQueryStrTbl[0];
+    p_key_val_1->KeyPtr = &p_ab->ReqQueryStrKeyTbl[0][0];
+    p_key_val_1->ValPtr = &p_ab->ReqQueryStrValTbl[0][0];
+
+    (void)Str_Copy_N(p_key_val_1->KeyPtr, "case", AUTOBAHN_QUERY_STR_KEY_LEN_MAX );
+    p_key_val_1->KeyLen = Str_Len_N(p_key_val_1->KeyPtr, AUTOBAHN_QUERY_STR_KEY_LEN_MAX);
+
+                                                            /* KeyVal 2: "agent".                                        */
+    p_key_val_2         = &p_ab->ReqQueryStrTbl[1];
+    p_key_val_2->KeyPtr = &p_ab->ReqQueryStrKeyTbl[1][0];
+    p_key_val_2->ValPtr = &p_ab->ReqQueryStrValTbl[1][0];
+
+    (void)Str_Copy_N(p_key_val_2->KeyPtr, "agent", AUTOBAHN_QUERY_STR_KEY_LEN_MAX );
+    (void)Str_Copy_N(p_key_val_2->ValPtr, p_ab->Agent,AUTOBAHN_QUERY_STR_VAL_LEN_MAX );
+    p_key_val_2->KeyLen = Str_Len_N(p_key_val_2->KeyPtr, AUTOBAHN_QUERY_STR_KEY_LEN_MAX);
+    p_key_val_2->ValLen = Str_Len_N(p_key_val_2->ValPtr, AUTOBAHN_QUERY_STR_VAL_LEN_MAX);
+
+                                                                /* --------------- START RUN CASE LOOP ---------------- */
+
+    for (p_ab->CurrentCase = 1; p_ab->CurrentCase <= p_ab->CaseCount ; p_ab->CurrentCase++) {
+
+        AutobahnClient_ShellPrintOutStr(p_ab,"\r\n --- RUNNING CASE ");
+        AutobahnClient_ShellPrintOutNumber(p_ab,p_ab->CurrentCase);
+        AutobahnClient_ShellPrintOutStr(p_ab," of ");
+        AutobahnClient_ShellPrintOutNumber(p_ab,p_ab->CaseCount);
+        AutobahnClient_ShellPrintOutStr(p_ab," ---\r\n\r\n");
+
+                                                                /* Set the current "case" value.                        */
+        (void) Str_FmtNbr_Int32U (p_ab->CurrentCase,
+                                  5u,
+                                  DEF_NBR_BASE_DEC,
+                                  DEF_NULL,
+                                  DEF_NO,
+                                  DEF_YES,
+                                  p_key_val_1->ValPtr);
+        p_key_val_1->ValLen = Str_Len_N(p_key_val_1->ValPtr, AUTOBAHN_QUERY_STR_VAL_LEN_MAX);
+        KAL_Dly(100);
+
+
+        for (retry = 0; retry < 5; retry++) {
+                                                               /* Open the Websocket.                                      */
+            ret_val = AutobahnClient_OpenWebSocket (p_ab, AUTOBAHN_RUNCASE_RES ,p_ab->CallBacksPtr);
+
+            if (ret_val == DEF_OK) {
+                break;                                          /* Continue if the operation is successful.                 */
+            } else {
+
+                KAL_Dly(100);                                   /* Wait and try back if the operation failed.               */
+            }
+        }
+                                                                /* Exit, if the connection has failed.                       */
+        if (retry >= 5) {
+            ret_val = DEF_FAIL;
+            goto exit;
+        }
+                                                                        /* Launch the Echo handler and wait for websocket reply.    */
+        ret_val = AutobahnClient_EchoHandler(p_ab);
+        if (ret_val != DEF_OK) {
+            break;
+        }
+
+                                                                /* Wait before launching the next step.                 */
+        KAL_Dly(10);
+    }
+
+exit:
+    return ret_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    AutobahnClient_UpdateReports()
+*
+* Description : Send a request to a Autobahn Test suite server to update HTML reports.
+*
+* Argument(s) : p_ab   Pointer to the Autobahn client object
+*
+* Return(s)   : If the operation is successful,  DEF_OK.
+*               If the operation has failed,     DEF_FAIL.
+*
+* Caller(s)   : AutobahnClient_Launch().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static CPU_BOOLEAN AutobahnClient_UpdateReports(AUTOBAHNc_OBJ *p_ab)
+{
+    CPU_BOOLEAN    ret_val;
+    HTTPc_KEY_VAL *p_key_val_1;
+
+    AutobahnClient_ShellPrintOutStr(p_ab,"\r\n --- UPDATE REPORTS ---\n\r\r\n");
+
+                                                                /* Set the specific OnMsgRx____ CallBack.                   */
+    AutobahnClient_CB.WSOnMsgRxInit     = DEF_NULL;
+    AutobahnClient_CB.WSOnMsgRxData     = (HTTPc_WEBSOCK_ON_RX_DATA)AutobahnClient_WebsockOnMsgGetCountCallback;
+    AutobahnClient_CB.WSOnMsgRxComplete = DEF_NULL;
+
+                                                                /* There is 1 KeyVal Pair to set for this req.              */
+    p_ab->ReqQueryStrNb   = 1u;
+                                                                /* KeyVal 1: "agent".                                       */
+    p_key_val_1         = &p_ab->ReqQueryStrTbl[0];
+    p_key_val_1->KeyPtr = &p_ab->ReqQueryStrKeyTbl[0][0];
+    p_key_val_1->ValPtr = &p_ab->ReqQueryStrValTbl[0][0];
+
+    (void)Str_Copy_N(p_key_val_1->KeyPtr, "agent", AUTOBAHN_QUERY_STR_KEY_LEN_MAX );
+    (void)Str_Copy_N(p_key_val_1->ValPtr, p_ab->Agent,AUTOBAHN_QUERY_STR_VAL_LEN_MAX );
+    p_key_val_1->KeyLen = Str_Len_N(p_key_val_1->KeyPtr, AUTOBAHN_QUERY_STR_KEY_LEN_MAX);
+    p_key_val_1->ValLen = Str_Len_N(p_key_val_1->ValPtr, AUTOBAHN_QUERY_STR_VAL_LEN_MAX);
+
+                                                                /* Wait before launching the update request.                 */
+    KAL_Dly(10);
+                                                                /* Launch the Echo handler and wait for websocket reply.    */
+    ret_val = AutobahnClient_OpenWebSocket( p_ab,
+                                            AUTOBAHN_UPDATE_REPORTS_RES,
+                                            p_ab->CallBacksPtr);
+
+    if (ret_val == DEF_OK) {
+        ret_val = AutobahnClient_EchoHandler(p_ab);
+    }
+
+   return ret_val;
+}
+
+/*
+*********************************************************************************************************
+*                                    AutobahnClient_OpenWebSocket()
+*
+* Description : Open a websocket to a Autobahn Test suite Server.
+*
+* Argument(s) : p_ab                Pointer to the Autobahn client object
+*
+*               p_resource_path     Pointer to a string of the ressource to connect to.
+*
+*               p_ab_cb             Pointer to Call back to use with Autobahn module.
+*
+* Return(s)   : If the operation is successful,  DEF_OK.
+*               If the operation has failed,     DEF_FAIL.
+*
+* Caller(s)   : AutobahnClient_GetCaseCount(),
+*               AutobahnClient_RunCases(),
+*               AutobahnClient_UpdateReports().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AutobahnClient_OpenWebSocket (AUTOBAHNc_OBJ   *p_ab,
+                                           CPU_CHAR        *p_resource_path,
+                                           AUTOBAHNc_CB    *p_ab_cb)
+{
+    HTTPc_CONN_OBJ         *p_conn;
+    HTTPc_REQ_OBJ          *p_req;
+    HTTPc_RESP_OBJ         *p_resp;
+    HTTPc_WEBSOCK_OBJ      *p_ws;
+    CPU_CHAR               *p_buf;
+    HTTPc_FLAGS             flags;
+    CPU_SIZE_T              str_len;
+    CPU_BOOLEAN             result;
+    HTTPc_ERR               err;
+    HTTPc_PARAM_TBL         tbl_obj;
+
+
+    p_conn     = &p_ab->Conn;
+    p_req      = &p_ab->Req;
+    p_resp     = &p_ab->Resp;
+    p_buf      = &p_ab->ConnBuf[0];
+    p_ws       = &p_ab->WS;
+
+#if (HTTPc_CFG_USER_DATA_EN == DEF_ENABLED)
+    p_req->UserDataPtr = p_ab;
+    p_conn->UserDataPtr= p_ab;
+#else
+    return (DEF_FAIL);
+#endif
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqClr(p_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_WebSockClr(p_ws, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- SET CONNECTION CALLBACKS ------------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ConnSetParam(         p_conn,
+                                HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       (void *)p_ab_cb->ConnOnClose,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+    HTTPc_ConnSetParam(         p_conn,
+                                HTTPc_PARAM_TYPE_SERVER_PORT,
+                       (void *)&p_ab->Port,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_ReqSetParam( p_req,
+                       HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                       (void *) p_ab_cb->ReqOnErr,
+                       &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+                                                                /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(p_ab->URI);
+    flags   = HTTPc_FLAG_NONE | HTTPc_FLAG_REQ_HDR_HOST_ADD;
+    result  = HTTPc_ConnOpen( p_conn,
+                              p_buf,
+                              AUTOBAHN_CONN_BUF_SIZE,
+                              p_ab->URI,
+                              str_len,
+                              flags,
+                             &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (result == DEF_OK) {
+        AutobahnClient_ShellPrintOutStr(p_ab,"Connection to server succeeded.\n\r");
+    } else {
+        AutobahnClient_ShellPrintOutStr(p_ab,"Connection to server failed.\n\r");
+        return (DEF_FAIL);
+    }
+
+                                                                /* Set Query str if there's any.                        */
+    if (p_ab->ReqQueryStrNb != 0u) {
+        tbl_obj.EntryNbr = p_ab->ReqQueryStrNb ;
+        tbl_obj.TblPtr   = (void *)p_ab->ReqQueryStrTbl;
+        HTTPc_ReqSetParam(p_req, HTTPc_PARAM_TYPE_REQ_QUERY_STR_TBL, &tbl_obj, &err);
+        if (err != HTTPc_ERR_NONE) {
+            return (DEF_FAIL);
+        }
+    }
+
+
+                                                                /* -------------- SET WEBOCKET CALLBACK --------------- */
+    HTTPc_WebSockSetParam(          p_ws,
+                                    HTTPc_PARAM_TYPE_WEBSOCK_ON_OPEN,
+                          (void *) p_ab_cb->WSOnOpen,
+                                   &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_WebSockSetParam(          p_ws,
+                                    HTTPc_PARAM_TYPE_WEBSOCK_ON_CLOSE,
+                          (void *) p_ab_cb->WSOnClose,
+                                   &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+    if (p_ab_cb->WSOnMsgRxInit != DEF_NULL) {
+        HTTPc_WebSockSetParam(         p_ws,
+                                       HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_INIT,
+                              (void *) p_ab_cb->WSOnMsgRxInit,
+                                      &err);
+        if (err != HTTPc_ERR_NONE) {
+            return (DEF_FAIL);
+        }
+    }
+
+
+    HTTPc_WebSockSetParam(         p_ws,
+                                   HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_DATA,
+                         (void *) p_ab_cb->WSOnMsgRxData,
+                                  &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    if (p_ab_cb->WSOnMsgRxComplete != DEF_NULL) {
+        HTTPc_WebSockSetParam(         p_ws,
+                                       HTTPc_PARAM_TYPE_WEBSOCK_ON_MSG_RX_COMPLETE,
+                              (void *) p_ab_cb->WSOnMsgRxComplete,
+                                      &err);
+        if (err != HTTPc_ERR_NONE) {
+            return (DEF_FAIL);
+        }
+    }
+
+    HTTPc_WebSockSetParam(         p_ws,
+                                    HTTPc_PARAM_TYPE_WEBSOCK_ON_ERR,
+                         (void *) p_ab_cb->WSOnErr,
+                                  &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+    HTTPc_ReqSetParam(         p_req,
+                                HTTPc_PARAM_TYPE_TRANS_COMPLETE_CALLBACK,
+                       (void *) p_ab_cb->TransComplete,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ------- UPGRADE HTTP CONNECTION TO WEBSOCKET ------- */
+    AutobahnClient_ShellPrintOutStr(p_ab,"Send Upgrade Request.\n\r");
+    str_len = Str_Len(p_resource_path);
+    result  = HTTPc_WebSockUpgrade( p_conn,
+                                    p_req,
+                                    p_resp,
+                                    p_ws,
+                                    p_resource_path,
+                                    str_len,
+                                    HTTPc_FLAG_NONE,
+                                   &err);
+    if (result == DEF_OK) {
+        AutobahnClient_ShellPrintOutStr(p_ab,(CPU_CHAR*)p_resp->ReasonPhrasePtr);
+        AutobahnClient_ShellPrintOutStr(p_ab,"\n\r");
+    } else {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+static void AutobahnClient_ShellPrintOutStr (AUTOBAHNc_OBJ *p_ab,
+                                             CPU_CHAR      *p_str)
+{
+    CPU_INT16U len;
+
+
+    if(p_ab->OutFnct != DEF_NULL) {
+        len = Str_Len(p_str);
+        p_ab->OutFnct(p_str,
+                      len,
+                      (p_ab->CmdParamPtr)->pout_opt);
+
+    }
+   // HTTPc_APP_TRACE_INFO((p_str));
+}
+
+static CPU_BOOLEAN AutobahnClient_ShellPrintOutNumber(AUTOBAHNc_OBJ *p_ab,
+                                                      CPU_INT32U     nb)
+{
+    CPU_CHAR str[32];
+
+
+    Str_FmtNbr_Int32U(nb,
+                      DEF_INT_32U_NBR_DIG_MAX,
+                      DEF_NBR_BASE_DEC,
+                      DEF_NULL,
+                      DEF_NO,
+                      DEF_YES,
+                      str);
+
+    AutobahnClient_ShellPrintOutStr (p_ab, str);
+
+    return DEF_OK;
+}
+/*
+*********************************************************************************************************
+*                                     AutobahnClient_EchoHandler()
+*
+* Description : Echo back received websocket message by the Autobahn Server and leave on a Close message.
+*
+* Argument(s) : p_ab   Pointer to the Autobahn client object
+*
+* Return(s)   : If the operation is successful,  DEF_OK.
+*               If the operation has failed,     DEF_FAIL.
+*
+* Caller(s)   : AutobahnClient_GetCaseCount(),
+*               AutobahnClient_RunCases(),
+*               AutobahnClient_UpdateReports().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN AutobahnClient_EchoHandler (AUTOBAHNc_OBJ *p_ab)
+{
+    KAL_ERR                 err_kal;
+    HTTPc_ERR               err;
+    HTTPc_WEBSOCK_MSG_OBJ  *p_msg;
+    AUTOBAHN_ECHO_BUF      *p_buf;
+    LIB_ERR                 lib_err;
+    CPU_BOOLEAN             ret_val;
+    HTTPc_FLAGS             flags;
+
+                                                                /* ----------------- ECHOHANDLER LOOP ----------------- */
+    do {
+                                                                /* Wait for new message.                                */
+
+        p_buf = (AUTOBAHN_ECHO_BUF *)KAL_QPend(p_ab->Q_Handle,
+                                               KAL_OPT_PEND_NONE,
+                                               0,
+                                               &err_kal);
+        if (err_kal != KAL_ERR_NONE) {
+            ret_val = DEF_FAIL;
+            goto exit;
+        }
+                                                                /* Check the message opcode.                            */
+        switch (p_buf->MsgType) {
+            case HTTPc_WEBSOCK_MSG_TYPE_TXT_FRAME:
+            case HTTPc_WEBSOCK_MSG_TYPE_BIN_FRAME:
+                                                                /* Get a a Tx Msg buffer.                               */
+                 KAL_SemPend( p_ab->TxMsgCnt,
+                              KAL_OPT_PEND_NONE,
+                              DEF_NULL,
+                             &err_kal);
+                 if (err_kal != KAL_ERR_NONE) {
+                     ret_val = DEF_FAIL;
+                     goto exit;
+                 }
+
+                 p_msg = (HTTPc_WEBSOCK_MSG_OBJ*)Mem_PoolBlkGet(&p_ab->TxMsgPool,
+                                                                 0,
+                                                                &lib_err);
+                 HTTPc_WebSockMsgClr(p_msg, &err);
+                 if (err != HTTPc_ERR_NONE) {
+                     ret_val = DEF_FAIL;
+                     goto exit;
+                 }
+                                                                 /* Set the message puf in the the Tx msg.               */
+                 p_msg->UserDataPtr = p_buf;
+                 if (p_ab->Flags.NoBlock == DEF_YES) {
+                     flags = HTTPc_FLAG_WEBSOCK_NO_BLOCK;
+                 } else {
+                     flags = HTTPc_FLAG_NONE;
+                 }
+
+                 if ((p_ab->Flags.TxCallback == DEF_YES) ||
+                     (p_ab->Flags.Frag       == DEF_YES)) {
+
+                     HTTPc_WebSockMsgSetParam(         p_msg,
+                                                       HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_INIT,
+                                              (void *) p_ab->CallBacksPtr->WSOnMsgTxInit,
+                                                      &err);
+                     if (err != HTTPc_ERR_NONE) {
+                         return (DEF_FAIL);
+                     }
+                     HTTPc_WebSockMsgSetParam(         p_msg,
+                                                       HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_DATA,
+                                              (void *) p_ab->CallBacksPtr->WSOnMsgTxData,
+                                                      &err);
+                     if (err != HTTPc_ERR_NONE) {
+                         return (DEF_FAIL);
+                     }
+                 }
+
+                 HTTPc_WebSockMsgSetParam(         p_msg,
+                                                   HTTPc_PARAM_TYPE_WEBSOCK_MSG_ON_TX_COMPLETE,
+                                          (void *) p_ab->CallBacksPtr->WSOnMsgTxComplete,
+                                                  &err);
+                 if (err != HTTPc_ERR_NONE) {
+                     return (DEF_FAIL);
+                 }
+
+                 HTTPc_WebSockMsgSetParam(         p_msg,
+                                                   HTTPc_PARAM_TYPE_WEBSOCK_MSG_USER_DATA,
+                                          (void *) p_buf,
+                                                  &err);
+                 if (err != HTTPc_ERR_NONE) {
+                     return (DEF_FAIL);
+                 }
+
+                 p_buf->LenSent = 0;
+                                                                 /* Send the websocket message.                          */
+                 HTTPc_WebSockSend (&p_ab->Conn,
+                                     p_msg,
+                                     p_buf->MsgType,
+                                     p_buf->Data,
+                                     p_buf->Len,
+                                     flags,
+                                     &err);
+                 break;
+
+            case HTTPc_WEBSOCK_MSG_TYPE_CLOSE:
+                                                                /* Free the buffer and leave.                           */
+                 Mem_PoolBlkFree (&p_ab->MsgBufPool,
+                                   p_buf,
+                                  &lib_err);
+                 ret_val = DEF_OK;
+                 goto exit;
+
+            case HTTPc_WEBSOCK_MSG_TYPE_PONG:
+                                                                /* Free the Buffer and continue.                        */
+                 Mem_PoolBlkFree (&p_ab->MsgBufPool,
+                                   p_buf,
+                                  &lib_err);
+
+                 break;
+
+            default:
+            case HTTPc_WEBSOCK_MSG_TYPE_PING:
+                 ret_val = DEF_FAIL;
+                 goto exit;
+        }
+    } while(1);
+
+
+exit:
+    return ret_val;
+}
+
+/*
+*********************************************************************************************************
+*                                           CALLBACKS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                 AutobahnClient_ConnCloseCallback()
+*
+* Description : Callback to notify application that an HTTP connection was closed.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection.
+*
+*               close_status    Status of the connection closing:
+*                                   HTTPc_CONN_CLOSE_STATUS_ERR_INTERNAL
+*                                   HTTPc_CONN_CLOSE_STATUS_SERVER
+*                                   HTTPc_CONN_CLOSE_STATUS_NO_PERSISTENT
+*                                   HTTPc_CONN_CLOSE_STATUS_APP
+*
+*               err             Error Code when connection was closed.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_conn->OnClose()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+static void  AutobahnClient_ConnCloseCallback (HTTPc_CONN_OBJ           *p_conn,
+                                               HTTPc_CONN_CLOSE_STATUS   close_status,
+                                               HTTPc_ERR                 err)
+{
+    KAL_ERR             err_kal;
+    AUTOBAHNc_OBJ       *p_ab;
+    LIB_ERR             lib_err;
+
+
+
+    p_ab = p_conn->UserDataPtr;
+
+    AutobahnClient_ShellPrintOutStr(p_ab,"Connection closed.\n\r");
+                                                                /* The reason may be not null terminated.               */
+    p_ab->CurrentBufPtr = (AUTOBAHN_ECHO_BUF *) Mem_PoolBlkGet(&p_ab->MsgBufPool,
+                                                                0,
+                                                               &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        CPU_SW_EXCEPTION(;);
+    }
+    p_ab->CurrentBufPtr->MsgType = HTTPc_WEBSOCK_MSG_TYPE_CLOSE;
+    p_ab->CurrentBufPtr->Len    = 0;
+
+    KAL_QPost(p_ab->Q_Handle,p_ab->CurrentBufPtr, KAL_OPT_NONE, &err_kal);
+    p_ab->CurrentBufPtr = DEF_NULL;
+
+    (void)&err_kal;
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                   AutobahnClient_TransErrCallback()
+*
+* Description : Callback to notify application that an error occurred during an HTTP transaction.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               err_code    Error Code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnErr()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+static void AutobahnClient_TransErrCallback (HTTPc_CONN_OBJ  *p_conn,
+                                             HTTPc_REQ_OBJ   *p_req,
+                                             HTTPc_ERR        err_code)
+{
+    AUTOBAHNc_OBJ       *p_ab;
+
+
+    p_ab = p_conn->UserDataPtr;
+
+    AutobahnClient_ShellPrintOutStr(p_ab,"Transaction error: ");
+    AutobahnClient_ShellPrintOutNumber(p_ab, err_code);
+    AutobahnClient_ShellPrintOutStr(p_ab,"\r\n");
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         WEBSOCKET CALLBACKS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  AutobahnClient_WebsockOnOpenCallback()
+*
+* Description : Callback on the WebSocket Opening.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+* Return(s)   : none.
+*
+* Caller(s)   :
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static void  AutobahnClient_WebsockOnOpenCallback (HTTPc_CONN_OBJ  *p_conn)
+{
+    AUTOBAHNc_OBJ       *p_ab;
+
+
+    p_ab = p_conn->UserDataPtr;
+
+   AutobahnClient_ShellPrintOutStr(p_ab,"Open Websocket succeeded.\n\r");
+
+}
+
+/*
+*********************************************************************************************************
+*                             AutobahnClient_WebsockOnCloseCallback()
+*
+* Description : Callback on the WebSocket closing event.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+*               close_status    Close code of the WebSocket closing event
+*
+*               p_reason        Pointer to a Close Reason obj of the WebSocket Closing event.
+*
+* Return(s)   : none.
+*
+* Caller(s)   :
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static void  AutobahnClient_WebsockOnCloseCallback (HTTPc_CONN_OBJ              *p_conn,
+                                                    HTTPc_WEBSOCK_CLOSE_CODE     close_code,
+                                                    HTTPc_WEBSOCK_CLOSE_REASON  *p_reason)
+{
+
+    AUTOBAHNc_OBJ       *p_ab;
+    LIB_ERR              lib_err;
+
+    p_ab = p_conn->UserDataPtr;
+
+    if ( p_ab->CurrentBufPtr != DEF_NULL){
+        Mem_PoolBlkFree (&p_ab->MsgBufPool,
+                          p_ab->CurrentBufPtr,
+                         &lib_err);
+        p_ab->CurrentBufPtr = DEF_NULL;
+        if (lib_err != LIB_MEM_ERR_NONE) {
+            CPU_SW_EXCEPTION(;);
+        }
+    }
+
+    AutobahnClient_ShellPrintOutStr(p_ab,"Websock closed with the code: ");
+    AutobahnClient_ShellPrintOutNumber(p_ab, close_code);
+    AutobahnClient_ShellPrintOutStr(p_ab,"\r\n");                                                    /* Print out the close message.                         */
+}
+/*
+*********************************************************************************************************
+*                                   AutobahnClient_WebsockOnMsgCallback()
+*
+* Description : Handle the received data chunk of a message.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+*               opcode          Opcode of the current message.
+*
+*               msg_len         Total length of the current message payload.
+*
+*               offset          Current message offset of the data chunk passed.
+*
+*               p_data          Pointer to data chunk passed
+*
+*               data_len        Length of the data chunk passed
+*
+*               last_chunk      Boolean that indicate if it's either the last data chunk or not of the curent message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   :
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+static  CPU_INT32U  AutobahnClient_WebsockOnMsgGetCountCallback  (HTTPc_CONN_OBJ           *p_conn,
+                                                                 HTTPc_WEBSOCK_MSG_TYPE     msg_type,
+                                                                 void                      *p_data,
+                                                                 CPU_INT16U                 data_len)
+{
+    CPU_CHAR      *p_buf;
+    AUTOBAHNc_OBJ *p_ab;
+    CPU_CHAR       nb_case_str[5];
+
+
+    p_ab  = p_conn->UserDataPtr;
+    p_buf = (CPU_CHAR*)p_data;
+
+    Mem_Copy(nb_case_str, p_buf, data_len);
+
+    nb_case_str[data_len] = 0;
+    p_ab->CaseCount       = Str_ParseNbr_Int32U(nb_case_str,
+                                                0,
+                                                DEF_NBR_BASE_DEC);
+    return data_len;
+}
+/*
+*********************************************************************************************************
+*                             AutobahnClient_WebsockOnMsgRunCaseCallback()
+*
+* Description : Handle the received data chunk of a message.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+*               opcode          Opcode of the current message.
+*
+*               msg_len         Total length of the current message payload.
+*
+*               offset          Current message offset of the data chunk passed.
+*
+*               p_data          Pointer to data chunk passed
+*
+*               data_len        Length of the data chunk passed
+*
+*               last_chunk      Boolean that indicate if it's either the last data chunk or not of the curent message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AutobahnClient_RunCases().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static void  AutobahnClient_WebsockOnMsgRxInitRunCaseCallback (HTTPc_CONN_OBJ            *p_conn,
+                                                               HTTPc_WEBSOCK_MSG_TYPE     opcode,
+                                                               CPU_INT32U                 msg_len,
+                                                               void                     **p_data)
+{
+    LIB_ERR            lib_err;
+    AUTOBAHNc_OBJ     *p_ab;
+    MEM_POOL_BLK_QTY   pool_qty;
+
+    p_ab = p_conn->UserDataPtr;
+
+
+    pool_qty          = Mem_PoolBlkGetNbrAvail (&p_ab->MsgBufPool,&lib_err);
+    p_ab->MaxBufUsage = DEF_MAX((AUTOBAHN_MAX_NB_BUF-pool_qty), p_ab->MaxBufUsage);
+    if(AUTOBAHN_MAX_NB_BUF-pool_qty > 0) {
+        pool_qty =1;
+    }
+
+    p_ab->CurrentBufPtr = (AUTOBAHN_ECHO_BUF *) Mem_PoolBlkGet(&p_ab->MsgBufPool,
+                                                                0,
+                                                               &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        CPU_SW_EXCEPTION(;);
+    }
+    p_ab->CurrentBufPtr->MsgType   = opcode;
+    p_ab->CurrentBufPtr->LenSent   = 0;
+
+    pool_qty          = Mem_PoolBlkGetNbrAvail (&p_ab->MsgBufPool,&lib_err);
+    p_ab->MaxBufUsage = DEF_MAX((AUTOBAHN_MAX_NB_BUF-pool_qty), p_ab->MaxBufUsage);
+    if(p_ab->MaxBufUsage > 1) {
+        pool_qty =1;
+    }
+
+    p_ab->RxMsgOffset = 0;
+
+    if (p_ab->Flags.RxZCopy == DEF_YES) {
+        if (msg_len != HTTPc_WEBSOCK_TX_MSG_LEN_NOT_DEFINED) {
+           *p_data = p_ab->CurrentBufPtr->Data;
+            p_ab->RxMsgOffset = msg_len;
+        }
+    }
+}
+
+
+static CPU_INT32U  AutobahnClient_WebsockOnMsgRunCaseCallback (HTTPc_CONN_OBJ            *p_conn,
+                                                               HTTPc_WEBSOCK_MSG_TYPE     msg_type,
+                                                               void                      *p_data,
+                                                               CPU_INT16U                 data_len)
+{
+    CPU_CHAR          *p_buf;
+    AUTOBAHNc_OBJ     *p_ab;
+
+    p_ab  = p_conn->UserDataPtr;
+    p_buf = p_ab->CurrentBufPtr->Data;
+    if (p_ab->Flags.RxChunk == DEF_YES) {
+        data_len = DEF_MIN(p_ab->LengthRxChunk,data_len);
+    }
+
+    
+    Mem_Copy(&p_buf[p_ab->RxMsgOffset], (CPU_CHAR *)p_data, data_len);
+    
+    p_ab->RxMsgOffset += data_len;
+    return data_len;
+
+}
+static void  AutobahnClient_WebsockOnMsgRxCompleteRunCaseCallback (HTTPc_CONN_OBJ            *p_conn)
+{
+    KAL_ERR            err_kal;
+    AUTOBAHNc_OBJ     *p_ab;
+
+
+    p_ab = p_conn->UserDataPtr;
+    
+    p_ab->CurrentBufPtr->Len = p_ab->RxMsgOffset;
+    KAL_QPost(p_ab->Q_Handle,p_ab->CurrentBufPtr, KAL_OPT_NONE, &err_kal);
+    p_ab->CurrentBufPtr = DEF_NULL;
+}
+/*
+*********************************************************************************************************
+*                                AutobahnClient_WebsockOnMsgTxCallback()
+*
+* Description : Handle the transmission in Asynchronous mode.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+*               p_msg       Pointer to the Websock Msg Object that it currently processed in TX.
+*
+*               p_data      Pointer to a pointer on the data to send.
+*
+*               buf_len     Length of the available in the TX buffer.
+*
+*               offset      Current message offset in the message for TX.
+*
+*               p_data_len  Pointer to the data length to send .
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AutobahnClient_CB.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static CPU_INT32U AutobahnClient_WebsockOnMsgTxCallback (HTTPc_CONN_OBJ                 *p_conn,
+                                                          HTTPc_WEBSOCK_MSG_OBJ          *p_msg,
+                                                          CPU_CHAR                       *p_buf,
+                                                          CPU_INT32U                      buf_len)
+{
+
+    CPU_INT32U         data_len;
+    AUTOBAHN_ECHO_BUF  *p_ab_buf;
+
+
+    p_ab_buf = (AUTOBAHN_ECHO_BUF *) p_msg->UserDataPtr;
+    data_len = p_ab_buf->Len - p_ab_buf->LenSent;
+    data_len = DEF_MIN(buf_len, data_len);
+    Mem_Copy(p_buf,p_ab_buf->Data, data_len);
+    p_ab_buf->LenSent += data_len;
+
+    return data_len;
+}
+
+
+/*
+*********************************************************************************************************
+*                             AutobahnClient_WebsockOnTxCompletedCallback()
+*
+* Description : Notify when a Websocket message is fully transmitted
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+*               p_websock_msg   Pointer to the message obj that has been TXed completely
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AutobahnClient_CB.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static void  AutobahnClient_WebsockOnTxCompletedCallback (HTTPc_CONN_OBJ         *p_conn,
+                                                          HTTPc_WEBSOCK_MSG_OBJ  *p_websock_msg,
+                                                          CPU_BOOLEAN             status)
+{
+    LIB_ERR             lib_err;
+    KAL_ERR             kal_err;
+    AUTOBAHN_ECHO_BUF  *p_buf;
+    AUTOBAHNc_OBJ      *p_ab;
+
+
+    p_ab = p_conn->UserDataPtr;
+
+    Mem_PoolBlkFree(&p_ab->TxMsgPool,
+                      p_websock_msg,
+                     &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    KAL_SemPost( p_ab->TxMsgCnt,
+                 KAL_OPT_POST_NONE,
+                &kal_err);
+
+    p_buf = (AUTOBAHN_ECHO_BUF*) p_websock_msg->UserDataPtr;
+
+    Mem_PoolBlkFree (&p_ab->MsgBufPool,
+                      p_buf,
+                     &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                  AutobahnClient_WebSockErrCallback()
+*
+* Description : Notify that an error occured.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection (WebSocket Upgraded).
+*
+*               err         Error code.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AutobahnClient_CB.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static void AutobahnClient_WebSockErrCallback (HTTPc_CONN_OBJ                *p_conn,
+                                               HTTPc_ERR                      err)
+{
+    AUTOBAHNc_OBJ    *p_ab;
+    LIB_ERR           lib_err;
+
+
+    p_ab = p_conn->UserDataPtr;
+
+    if ( p_ab->CurrentBufPtr != DEF_NULL){
+        Mem_PoolBlkFree (&p_ab->MsgBufPool,
+                          p_ab->CurrentBufPtr,
+                         &lib_err);
+        p_ab->CurrentBufPtr = DEF_NULL;
+        if (lib_err != LIB_MEM_ERR_NONE) {
+            CPU_SW_EXCEPTION(;);
+        }
+    }
+}
+
+void  AutobahnClient_TransCompleteCallback (HTTPc_CONN_OBJ  *p_conn,
+                                            HTTPc_REQ_OBJ   *p_req,
+                                            HTTPc_RESP_OBJ  *p_resp,
+                                            CPU_BOOLEAN      status)
+
+{
+
+}
+static CPU_INT32U AutobahnClient_WebSockOnTxMsgInit (HTTPc_CONN_OBJ               *p_conn,
+                                                     HTTPc_WEBSOCK_MSG_OBJ        *p_msg)
+{
+    CPU_INT32U          data_len;
+    AUTOBAHN_ECHO_BUF  *p_ab_buf;
+    AUTOBAHNc_OBJ       *p_ab;
+
+    p_ab     = (AUTOBAHNc_OBJ     *) p_conn->UserDataPtr;
+    p_ab_buf = (AUTOBAHN_ECHO_BUF *) p_msg->UserDataPtr;
+    if (p_msg->OpCode_reserved == HTTPc_WEBSOCK_OPCODE_CLOSE ) {
+        data_len = p_ab_buf->Len;
+    } else if (p_ab->Flags.Frag == DEF_YES) {
+        data_len = HTTPc_WEBSOCK_TX_MSG_LEN_NOT_DEFINED;
+    } else {
+        data_len = p_ab_buf->Len;
+    }
+
+
+    return data_len;
+
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn-c.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn-c.h
new file mode 100644
index 0000000..95a0a33
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn-c.h
@@ -0,0 +1,280 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                                EXAMPLE
+*
+*                                  HTTP CLIENT APPLICATION FUNCTIONS FILE
+*
+* Filename      : http-c_app.c
+* Version       : V1.00.00
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.00.00
+*                       (d) uC/TCP-IP V3.02.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  AUTOBAHNc_MODULE_PRESENT
+#define  AUTOBAHNc_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*                                             FS MODULE
+*
+* Note(s): If the µC/FS is present in the project, you can enable it for the example application.
+*********************************************************************************************************
+*/
+
+#define  HTTPc_APP_FS_MODULE_PRESENT   DEF_NO
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#include  
+#include  
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+#include  
+
+#if (HTTPc_APP_FS_MODULE_PRESENT == DEF_YES)
+#include  
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef HTTPc_APP_MODULE
+#define  HTTPc_APP_EXT
+#else
+#define  HTTPc_APP_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  AUTOBAHN_GET_CASE_COUNT_RES                "/getCaseCount"
+#define  AUTOBAHN_RUNCASE_RES                       "/runCase"
+#define  AUTOBAHN_UPDATE_REPORTS_RES                "/updateReports"
+
+
+#define  AUTOBAHN_MAX_BUF_LEN       16*1024*1024u
+#define  AUTOBAHN_MAX_NB_BUF        2u
+
+
+#define  AUTOBAHN_CONN_BUF_SIZE                       4096u 
+#define  AUTOBAHN_QUERY_STR_NBR_MAX                     2u
+#define  AUTOBAHN_QUERY_STR_KEY_LEN_MAX                 128u
+#define  AUTOBAHN_QUERY_STR_VAL_LEN_MAX                 128u
+
+
+typedef struct autobahn_flags  {
+    CPU_INT08U  NoBlock    : 1;
+    CPU_INT08U  TxCallback : 1;
+    CPU_INT08U  Frag       : 1;
+    CPU_INT08U  RxChunk    : 1;
+    CPU_INT08U  RxZCopy    : 1;
+} AUTOBAHN_FLAGS;
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          CONNECTION DATA TYPE
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*                                           REQUEST DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef struct httpc_ws_cmd_echo_buf {
+     CPU_INT32U             Len;
+     CPU_INT32U             LenSent;
+     CPU_CHAR               Data[AUTOBAHN_MAX_BUF_LEN];
+     HTTPc_WEBSOCK_MSG_TYPE MsgType;
+}AUTOBAHN_ECHO_BUF;
+
+
+typedef struct autobahnc_cb {
+    HTTPc_CONN_CLOSE_CALLBACK          ConnOnClose;
+    HTTPc_TRANS_ERR_CALLBACK           ReqOnErr;
+    HTTPc_WEBSOCK_ON_OPEN              WSOnOpen;
+    HTTPc_WEBSOCK_ON_CLOSE             WSOnClose;
+    HTTPc_WEBSOCK_ON_ERR               WSOnErr;
+    HTTPc_WEBSOCK_ON_RX_INIT           WSOnMsgRxInit;
+    HTTPc_WEBSOCK_ON_RX_DATA           WSOnMsgRxData;
+    HTTPc_WEBSOCK_ON_RX_COMPLETE       WSOnMsgRxComplete;
+    HTTPc_WEBSOCK_ON_TX_INIT           WSOnMsgTxInit;
+    HTTPc_WEBSOCK_ON_TX_DATA           WSOnMsgTxData;
+    HTTPc_WEBSOCK_ON_TX_COMPLETE       WSOnMsgTxComplete;
+    HTTPc_WEBSOCK_ON_PONG              WSOnPong;
+    HTTPc_COMPLETE_CALLBACK            TransComplete;
+}AUTOBAHNc_CB;
+
+typedef struct autobahnc_obj {
+
+    CPU_INT32U               Port;
+    CPU_CHAR                *URI;
+    CPU_CHAR                *Agent;
+    AUTOBAHN_FLAGS           Flags;
+
+    HTTPc_CONN_OBJ           Conn;
+    CPU_CHAR                 ConnBuf[AUTOBAHN_CONN_BUF_SIZE];
+    HTTPc_REQ_OBJ            Req;
+    HTTPc_RESP_OBJ           Resp;
+    HTTPc_WEBSOCK_OBJ        WS;
+
+    KAL_Q_HANDLE             Q_Handle;
+    MEM_POOL                 MsgBufPool;
+    MEM_POOL                 TxMsgPool;
+    KAL_SEM_HANDLE           TxMsgCnt;
+    KAL_SEM_HANDLE           MsgBufCnt;
+    AUTOBAHN_ECHO_BUF       *CurrentBufPtr;
+    MEM_POOL_BLK_QTY         MaxBufUsage;
+
+    CPU_INT16U               CaseCount;
+    CPU_INT16U               CurrentCase;
+
+    CPU_INT16U               ReqQueryStrNb;
+    HTTPc_KEY_VAL            ReqQueryStrTbl[AUTOBAHN_QUERY_STR_NBR_MAX];
+    CPU_CHAR                 ReqQueryStrKeyTbl[AUTOBAHN_QUERY_STR_NBR_MAX][AUTOBAHN_QUERY_STR_KEY_LEN_MAX];
+    CPU_CHAR                 ReqQueryStrValTbl[AUTOBAHN_QUERY_STR_NBR_MAX][AUTOBAHN_QUERY_STR_VAL_LEN_MAX];
+
+    SHELL_OUT_FNCT           OutFnct;
+    SHELL_CMD_PARAM         *CmdParamPtr;
+    AUTOBAHNc_CB            *CallBacksPtr;
+
+    CPU_INT32U              RxMsgOffset;
+    CPU_INT32U              LengthRxChunk;
+
+}AUTOBAHNc_OBJ;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+AUTOBAHNc_OBJ *AutobahnClient_Init (void);
+
+
+CPU_BOOLEAN AutobahnClient_Launch (AUTOBAHNc_OBJ *p_ab_client);
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     TRACE / DEBUG CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                       0
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                      1
+#endif
+
+#ifndef  TRACE_LEVEL_DEBUG
+#define  TRACE_LEVEL_DEBUG                     2
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                       2
+#endif
+
+#define  HTTPc_APP_TRACE_LEVEL                TRACE_LEVEL_INFO
+#define  HTTPc_APP_TRACE                      printf
+
+#define  HTTPc_APP_TRACE_INFO(x)              ((HTTPc_APP_TRACE_LEVEL >= TRACE_LEVEL_INFO)  ? (void)(HTTPc_APP_TRACE x) : (void)0)
+#define  HTTPc_APP_TRACE_DBG(x)               ((HTTPc_APP_TRACE_LEVEL >= TRACE_LEVEL_DEBUG) ? (void)(HTTPc_APP_TRACE x) : (void)0)
+
+#define  HTTPc_APP_TRACE_DEBUG(x)             HTTPc_APP_TRACE_DBG(x)
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#endif
+#endif  /* AUTOBAHNc_MODULE_PRESENT  */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn_cmd.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn_cmd.c
new file mode 100644
index 0000000..54ef0af
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn_cmd.c
@@ -0,0 +1,463 @@
+/*
+*********************************************************************************************************
+*                                                uC/SNTPc
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/SNTPc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       uC/SNTPc CMD SOURCE CODE
+*
+* Filename      : sntp-c_cmd.c
+* Version       : 2.00.00
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V3.02.00
+*                     (b) uC/SNTPc  V2.00.00
+*
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  SNTPc_CMD_MODULE
+
+#include  "autobahn_cmd.h"
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+typedef enum {
+
+    AUTOBAHN_CMD_TYPE_NONE              = 0u,
+    AUTOBAHN_CMD_TYPE_SERVER            = 1u,
+    AUTOBAHN_CMD_TYPE_CLIENT            = 2u,
+    AUTOBAHN_CMD_TYPE_HELP              = 3u,
+
+} AUTOBAHN_CMD_TYPE;
+
+
+
+
+typedef enum {
+
+    AUTOBAHN_HTTPc_OPTION_NO_BLOCK     = 0u,
+    AUTOBAHN_HTTPc_OPTION_TX_CALLBACK  = 1u,
+    AUTOBAHN_HTTPc_OPTION_FRAG         = 2u,
+    AUTOBAHN_HTTPc_OPTION_RX_Z_COPY   = 3u,
+} AUTOBAHN_HTTPc_OPTION;
+
+#define AUTOBAHN_CMD_OPTION_NO_BLOCK_STR    "no_block"
+#define AUTOBAHN_CMD_OPTION_TX_CALLBACK_STR "tx_callback"
+#define AUTOBAHN_CMD_OPTION_FRAG_STR        "tx_frag"
+#define AUTOBAHN_CMD_OPTION_RX_Z_COPY_STR   "rx_zcopy"
+
+
+static  const  HTTP_DICT Autobahn_CmdOptionDictionnary[] = {
+    { AUTOBAHN_HTTPc_OPTION_NO_BLOCK,    AUTOBAHN_CMD_OPTION_NO_BLOCK_STR   , (sizeof(AUTOBAHN_CMD_OPTION_NO_BLOCK_STR   ) - 1) },
+    { AUTOBAHN_HTTPc_OPTION_TX_CALLBACK, AUTOBAHN_CMD_OPTION_TX_CALLBACK_STR, (sizeof(AUTOBAHN_CMD_OPTION_TX_CALLBACK_STR) - 1) },
+    { AUTOBAHN_HTTPc_OPTION_FRAG,        AUTOBAHN_CMD_OPTION_FRAG_STR       , (sizeof(AUTOBAHN_CMD_OPTION_FRAG_STR       ) - 1) },
+    { AUTOBAHN_HTTPc_OPTION_RX_Z_COPY,   AUTOBAHN_CMD_OPTION_RX_Z_COPY_STR  , (sizeof(AUTOBAHN_CMD_OPTION_RX_Z_COPY_STR  ) - 1) },
+
+};
+
+
+#define AUTOBAHN_CMD_PARSER_CLIENT                         ASCII_CHAR_LATIN_LOWER_C
+#define AUTOBAHN_CMD_PARSER_SERVER                         ASCII_CHAR_LATIN_LOWER_S
+#define AUTOBAHN_CMD_PARSER_PORT                           ASCII_CHAR_LATIN_LOWER_P
+#define AUTOBAHN_CMD_PARSER_AGENT_NAME                     ASCII_CHAR_LATIN_LOWER_N
+#define AUTOBAHN_CMD_PARSER_MODE                           ASCII_CHAR_LATIN_LOWER_M
+#define AUTOBAHN_CMD_PARSER_HELP                           ASCII_CHAR_LATIN_LOWER_H
+#define AUTOBAHN_CMD_PARSER_LENGTH_RX                      ASCII_CHAR_LATIN_LOWER_L
+
+#define AUTOBAHN_CMD_ARG_PARSER_CMD_BEGIN                  ASCII_CHAR_HYPHEN_MINUS
+
+#define AUTOBAHN_CMD_HELP_STR    "\r\nUsage: autobahn [option]\r\n\r\n"\
+                                 "Options:\r\n\r\n" \
+                                 " -c host_name     Autobahn test as a client. Specify the host to connect to.\r\n"\
+                                 " -s               Autobahn test as a server.\r\n"\
+                                 " -p port_nb       Set the TCP port to use.\r\n"\
+                                 " -n name          Set the AgentName use for reports.\r\n"\
+                                 " -h               Show the previous information.\r\n\r\n"\
+                                 " --no_block       Set the test in no blocking mode.\r\n"\
+                                 " --tx_callback    Set the test in callback mode for tx.\r\n"\
+                                 " --tx_frag        Set the test in dynamic/fragmented tx mode.\r\n\r"\
+                                 " --rx_zcopy       Set the test in a rx zero copy mode.\r\n\r\n"\
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_INT16S  AutobahnCmd_Go             (CPU_INT16U          argc,
+                                        CPU_CHAR           *p_argv[],
+                                        SHELL_OUT_FNCT      out_fnct,
+                                        SHELL_CMD_PARAM    *p_cmd0_param);
+
+CPU_INT16S  AutobahnCmd_Help            (CPU_INT16U          argc,
+                                         CPU_CHAR           *p_argv[],
+                                         SHELL_OUT_FNCT      out_fnct,
+                                         SHELL_CMD_PARAM    *p_cmd_param);
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+static  SHELL_CMD Autobahn_CmdTbl[] =
+{
+    {"autobahn"   , AutobahnCmd_Go},
+    {"autobahn_help" , AutobahnCmd_Help},
+    {0, 0 }
+};
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+static AUTOBAHNc_OBJ *AutobahnCmd_ClientPtr;
+#endif
+
+/*
+*********************************************************************************************************
+*                                           AutobahnCmd_Init()
+*
+* Description : Add Autobahn cmd stubs to uC-Shell and initialize the autobahn obj for the .
+*
+* Argument(s) : p_err    is a pointer to an error code which will be returned to your application:
+*
+*                             AUTOBAHN_CMD_ERR_NONE              No error.
+*                             AUTOBAHN_CMD_ERR_SHELL_INIT        Command table not added to uC-Shell
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AppTaskStart().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  AutobahnCmd_Init (AUTOBAHN_CMD_ERR  *p_err)
+{
+    SHELL_ERR  err;
+
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    AutobahnCmd_ClientPtr = AutobahnClient_Init();
+
+    if (AutobahnCmd_ClientPtr != DEF_NULL) {
+
+        Shell_CmdTblAdd("autobahn", Autobahn_CmdTbl, &err);
+
+        if (err == SHELL_ERR_NONE) {
+            *p_err = AUTOBAHN_CMD_ERR_NONE;
+        } else {
+            *p_err = AUTOBAHN_CMD_ERR_SHELL_INIT;
+        }
+    } else {
+        *p_err = AUTOBAHN_CMD_ERR_OBJ_INIT;
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SNTPcCmd_Get()
+*
+* Description : Get NTP timestamp from the server and compute the roundtrip delay.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   :
+*
+* Caller(s)   : AppTaskStart().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S AutobahnCmd_Go  (CPU_INT16U        argc,
+                            CPU_CHAR         *p_argv[],
+                            SHELL_OUT_FNCT    out_fnct,
+                            SHELL_CMD_PARAM  *p_cmd_param)
+{
+#ifdef  HTTPc_WEBSOCK_MODULE_EN
+    CPU_INT08U             i;
+    CPU_INT16U             str_len;
+    CPU_CHAR              *p_msg_fail;
+    AUTOBAHN_CMD_TYPE      type;
+    AUTOBAHN_HTTPc_OPTION option;
+    CPU_INT16U             str_len_option;
+
+
+
+    type        = AUTOBAHN_CMD_TYPE_NONE;
+    p_msg_fail  = DEF_NULL;
+    AutobahnCmd_ClientPtr->Flags.RxChunk    = DEF_NO;
+    AutobahnCmd_ClientPtr->Flags.NoBlock    = DEF_NO;
+    AutobahnCmd_ClientPtr->Flags.TxCallback = DEF_NO;
+    AutobahnCmd_ClientPtr->Flags.Frag       = DEF_NO;
+    AutobahnCmd_ClientPtr->Flags.RxZCopy    = DEF_NO;
+
+                                                                /* ----------------- PARSE ARGUMENTS ------------------ */
+    if (argc > 1) {
+        for (i = 1; i < argc; i++) {
+            if (*p_argv[i] == AUTOBAHN_CMD_ARG_PARSER_CMD_BEGIN) {
+                switch (*(p_argv[i] + 1)) {
+
+                    case AUTOBAHN_CMD_PARSER_CLIENT:
+                         if (type != AUTOBAHN_CMD_TYPE_NONE) {
+                             p_msg_fail = "Invalid Argument";
+                             goto exit_fail;
+                         }
+                         type = AUTOBAHN_CMD_TYPE_CLIENT;
+                         if (argc != i + 1) {
+                             if (*p_argv[i+1] != AUTOBAHN_CMD_ARG_PARSER_CMD_BEGIN) {
+                                 AutobahnCmd_ClientPtr->URI = p_argv[i+1];
+                                 i++;
+                             } else {
+                                 p_msg_fail = "Invalid Client Argument";
+                                 goto exit_fail;
+                             }
+                         }
+                         break;
+
+                    case AUTOBAHN_CMD_PARSER_SERVER:
+                         if (type != AUTOBAHN_CMD_TYPE_NONE) {
+                             p_msg_fail = "Invalid Argument";
+                             goto exit_fail;
+                         }
+                         type = AUTOBAHN_CMD_TYPE_SERVER;
+                         break;
+
+                    case AUTOBAHN_CMD_PARSER_HELP:
+                         if (type != AUTOBAHN_CMD_TYPE_NONE) {
+                             p_msg_fail = "Invalid Argument";
+                             goto exit_fail;
+                         }
+                         type = AUTOBAHN_CMD_TYPE_HELP;
+                         break;
+
+                    case AUTOBAHN_CMD_PARSER_PORT:
+                         if (argc != i + 1) {
+                             if (*p_argv[i+1] != AUTOBAHN_CMD_ARG_PARSER_CMD_BEGIN) {
+                                 AutobahnCmd_ClientPtr->Port =  Str_ParseNbr_Int32U( p_argv[i+1],
+                                                                                     0,
+                                                                                     DEF_NBR_BASE_DEC);
+                                 i++;
+                             } else {
+                                 p_msg_fail = "Invalid Port Argument";
+                                 goto exit_fail;
+                             }
+                         } else {
+                             p_msg_fail = "Invalid Port Argument";
+                             goto exit_fail;
+                         }
+                         break;
+
+                    case AUTOBAHN_CMD_PARSER_AGENT_NAME:
+                         if (argc != i + 1) {
+                             if (*p_argv[i+1] != AUTOBAHN_CMD_ARG_PARSER_CMD_BEGIN) {
+                                 AutobahnCmd_ClientPtr->Agent = p_argv[i+1];
+                                 i++;
+                             }
+                         }
+                         break;
+                    case AUTOBAHN_CMD_PARSER_LENGTH_RX:
+                        if (argc != i + 1) {
+                            if (*p_argv[i+1] != AUTOBAHN_CMD_ARG_PARSER_CMD_BEGIN) {
+                                AutobahnCmd_ClientPtr->Flags.RxChunk = DEF_YES;
+                                AutobahnCmd_ClientPtr->LengthRxChunk =  Str_ParseNbr_Int32U( p_argv[i+1],
+                                                                                             0,
+                                                                                             DEF_NBR_BASE_DEC);
+                                i++;
+                            } else {
+                                p_msg_fail = "Invalid Argument";
+                                goto exit_fail;
+                            }
+                        } else {
+                            p_msg_fail = "Invalid Argument";
+                            goto exit_fail;
+                        }
+                         break;
+
+                    case AUTOBAHN_CMD_ARG_PARSER_CMD_BEGIN:
+                        str_len_option = Str_Len((p_argv[i] + 2));
+                        option = (AUTOBAHN_HTTPc_OPTION)HTTP_Dict_KeyGet( Autobahn_CmdOptionDictionnary,
+                                                                              sizeof(Autobahn_CmdOptionDictionnary),
+                                                                              (p_argv[i] + 2),
+                                                                              DEF_YES,
+                                                                              str_len_option);
+                        switch (option) {
+                        case AUTOBAHN_HTTPc_OPTION_NO_BLOCK:
+                             AutobahnCmd_ClientPtr->Flags.NoBlock = DEF_YES;
+                             break;
+
+                        case AUTOBAHN_HTTPc_OPTION_TX_CALLBACK:
+                             AutobahnCmd_ClientPtr->Flags.TxCallback = DEF_YES;
+                             break;
+
+                        case AUTOBAHN_HTTPc_OPTION_FRAG:
+                             AutobahnCmd_ClientPtr->Flags.Frag = DEF_YES;
+                             break;
+                        case AUTOBAHN_HTTPc_OPTION_RX_Z_COPY:
+                             AutobahnCmd_ClientPtr->Flags.RxZCopy = DEF_YES;
+                             break;
+                             
+                        default: 
+                             p_msg_fail = "Invalid Argument";
+                             goto exit_fail;
+                             break;
+                             
+                        }
+                        break;
+
+                    default:
+                         goto exit_fail;
+                         break;
+                }
+            }
+        }
+    } else {
+        type = AUTOBAHN_CMD_TYPE_HELP;
+    }
+
+    switch (type) {
+        case AUTOBAHN_CMD_TYPE_NONE:
+        case AUTOBAHN_CMD_TYPE_HELP:
+            out_fnct(AUTOBAHN_CMD_HELP_STR,
+                     sizeof(AUTOBAHN_CMD_HELP_STR),
+                     p_cmd_param->pout_opt);
+             break;
+        case AUTOBAHN_CMD_TYPE_SERVER:
+             p_msg_fail = "Server Mode is not Implemented";
+             goto exit_fail;
+
+        case AUTOBAHN_CMD_TYPE_CLIENT:
+
+             AutobahnCmd_ClientPtr->OutFnct     = out_fnct;
+             AutobahnCmd_ClientPtr->CmdParamPtr = p_cmd_param;
+
+             AutobahnClient_Launch(AutobahnCmd_ClientPtr);
+
+             AutobahnCmd_ClientPtr->OutFnct     = DEF_NULL;
+             AutobahnCmd_ClientPtr->CmdParamPtr = DEF_NULL;
+             break;
+
+        default:
+             p_msg_fail = "No Test Mode Specified";
+             goto exit_fail;
+    }
+
+    out_fnct(STR_NEW_LINE,
+             STR_NEW_LINE_LEN,
+             p_cmd_param->pout_opt);
+
+    return (1);
+
+exit_fail:
+   str_len = Str_Len(p_msg_fail);
+   out_fnct(STR_NEW_LINE,
+            STR_NEW_LINE_LEN,
+            p_cmd_param->pout_opt);
+
+   out_fnct(p_msg_fail,
+            str_len,
+            p_cmd_param->pout_opt);
+
+   out_fnct(STR_NEW_LINE,
+            STR_NEW_LINE_LEN,
+            p_cmd_param->pout_opt);
+
+   out_fnct(STR_NEW_LINE,
+            STR_NEW_LINE_LEN,
+            p_cmd_param->pout_opt);
+#endif
+    return (1);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SNTPc_Cmd_Help()
+*
+* Description : Print SNTPc command help.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : AppTaskStart().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S AutobahnCmd_Help (CPU_INT16U        argc,
+                          CPU_CHAR         *p_argv[],
+                          SHELL_OUT_FNCT    out_fnct,
+                          SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S ret_val;
+
+
+    ret_val = 1;
+    return (ret_val);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn_cmd.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn_cmd.h
new file mode 100644
index 0000000..2114c3b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/Autobahn/autobahn_cmd.h
@@ -0,0 +1,124 @@
+/*
+*********************************************************************************************************
+*                                          uC/SNTPc Command
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/SNTPc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       uC/SNTPc CMD SOURCE CODE
+*
+* Filename      : sntp-c_cmd.h
+* Version       : 2.00.00
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V3.02.00
+*                     (b) uC/SNTPc  V2.00.00
+*
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  SNTPc_CMD_MODULE_PRESENT
+#define  SNTPc_CMD_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The following common software files are located in the following directories :
+*
+*               (a) \\lib*.*
+*
+*               (b) (1) \\cpu_def.h
+*
+*                   (2) \\\\cpu*.*
+*
+*                   where
+*                         directory path for custom   library      software
+*                           directory path for common   CPU-compiler software
+*                                              directory name for specific processor (CPU)
+*                                         directory name for specific compiler
+*
+*           (2)
+*
+*           (3) NO compiler-supplied standard library functions SHOULD be used.
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+#include "autobahn-c.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   AUTOBAHN_CMD_MODULE
+#define  AUTOBAHN_CMD_EXT
+#else
+#define  AUTOBAHN_CMD_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef enum sntpc_test_err {
+    AUTOBAHN_CMD_ERR_NONE             = 0,                         /* No errors.                                           */
+
+    AUTOBAHN_CMD_ERR_SHELL_INIT       = 10u,                       /* Command table not added to uC-Shell.                 */
+    AUTOBAHN_CMD_ERR_OBJ_INIT         = 11u,                       /* Command table not added to uC-Shell.                 */
+} AUTOBAHN_CMD_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        AutobahnCmd_Init          (AUTOBAHN_CMD_ERR      *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of template module include.      */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/Script/mc_perf.py b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/Script/mc_perf.py
new file mode 100644
index 0000000..578bead
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/Script/mc_perf.py
@@ -0,0 +1,200 @@
+__author__ = 'alapointe'
+import time
+import tornado.ioloop
+import tornado.web
+import tornado.websocket
+import tornado.httpclient
+import os
+import binascii
+from threading import Timer
+import argparse
+
+
+#ServerSide
+class TestObj :
+    def __init__(self, id) :
+        self.target2pc_finished = False;
+        self.pc2target_finished = False;
+        self.isError            = False;
+        self.id = id
+    def isMe(self,id):
+        if self.id == id:
+            return True
+        else :
+            return False
+
+def findTestObj(test,id):
+    for testobj in test.conn_list:
+        if testobj.isMe(int(id)) == True:
+            return testobj
+
+    return
+
+def checkIfCompleted(test):
+    for testobj in test.conn_list:
+        if testobj.pc2target_finished == False or testobj.target2pc_finished == False:
+            return False
+
+    return True
+
+def printResult(test):
+    total_target2pc = 0
+    total_pc2target = 0
+    print(" ")
+    print("- Nb -  Target to PC                     -  PC to Target                  -")
+    print("---------------------------------------------------------------------------")
+    for testobj in test.conn_list:
+        if testobj.target2pc_finished == True and testobj.isError == False :
+            trougthput_target2pc = ((testobj.len *8) /testobj.target2pc_time)/ (1024*1024)
+            target2pc_result =  "- Passed -" + "{:>8.3f}".format(testobj.target2pc_time) + "s, "  + "{:>8.3f}".format(trougthput_target2pc) + "Mb/s   "
+        else :
+            trougthput_target2pc = 0
+            target2pc_result =  "- Failed -" + "                          "
+
+        if testobj.pc2target_finished == True and testobj.isError == False :
+            trougthput_pc2target = ((testobj.len *8) /testobj.pc2target_time)/ (1024*1024)
+            pc2target_result =  "- Passed -" + "{:>8.3f}".format(testobj.pc2target_time) + "s,"   + "{:>8.3f}".format(trougthput_pc2target) + "Mb/s   "
+        else :
+            trougthput_pc2target =0
+            pc2target_result =  "- Failed -" + "                        "
+
+        total_pc2target = total_pc2target + trougthput_pc2target
+        total_target2pc = total_target2pc + trougthput_target2pc
+
+        print("- " + "{:>2}".format(testobj.id) + " " + target2pc_result + pc2target_result)
+
+
+    print("---------------------------------------------------------------------------")
+    print("                          " + "{:>8.3f}".format(total_target2pc) + "Mb/s                       "+ "{:>8.3f}".format(total_pc2target)+ "Mb/s   ")
+
+
+
+
+class Target2PCHandler(tornado.web.RequestHandler):
+
+    def post(self,id):
+        testobj                      = findTestObj(test,int(id))
+        testobj.target2pc_finished   = True
+        testobj.target2pc_time       = time.time() - self.request._start_time
+        self.write("echo")
+
+    def on_finish(self):
+        isCompleted = checkIfCompleted(test)
+        if isCompleted == True :
+            test.timer.cancel()
+            TestFinishHandler(test)
+
+
+def handle_request(response):
+    testobj = findTestObj(response.request.test, response.request.id)
+    testobj.pc2target_finished = True
+    testobj.pc2target_time     = response.request_time
+    if response.error:
+        testobj.isError = True
+        print ("Error:", response.error)
+
+    isCompleted = checkIfCompleted(response.request.test)
+    if isCompleted == True :
+        test.timer.cancel()
+        TestFinishHandler(response.request.test)
+
+def  TestFinishHandler(test):
+        printResult(test)
+        tester.stop()
+       # input("Press Enter to continue...")
+
+class TestHandler():
+    def __init__(self):
+        self.nb_conn        = 10
+        self.timeout        = 30
+        self.conn_list      = []
+        self.target_addr    = "127.0.0.1"
+        self.target_port    = 8280
+        self.content_len    = 1
+        self.server_port    = 8180
+
+
+if __name__ == "__main__":
+
+    test = TestHandler()
+
+    parser = argparse.ArgumentParser()
+
+    parser.add_argument("target_addr",
+                        help    = 'IP address of the DUT ',
+                        default = "127.0.0.1")
+
+    parser.add_argument('-n',
+                        action  = "store",
+                        dest    = 'nb_conn',
+                        help    = 'Number of simultaneous connection',
+                        type    = int,
+                        default = 10)
+
+    parser.add_argument('-t',
+                        action  = "store",
+                        dest    = 'timeout',
+                        help    = 'Test timeout in second',
+                        type    = int,
+                        default = 30)
+
+    parser.add_argument('-l',
+                        action  = "store",
+                        dest    = 'len',
+                        help    = 'HTTP body length in MBytes (float)',
+                        type    = float,
+                        default = 1)
+
+
+    args = parser.parse_args()
+
+    test.target_addr = args.target_addr
+    test.nb_conn     = args.nb_conn
+    test.content_len = args.len
+    test.timeout     = args.timeout
+
+
+
+    print(" ")
+    print("Lauching test server...")
+    app = tornado.web.Application([(r'/target2PC/([0-9]+)'    , Target2PCHandler)])
+
+    print("Test server listening port: " + str(test.server_port) + "...")
+    app.listen(test.server_port)
+
+
+    print("Generating random request body...")
+    print("Body content length: " + str(test.content_len) + " MBytes...")
+    test.random_body =binascii.b2a_hex(os.urandom(int(((test.content_len)*1024*1024)/2)))
+    print("Request body generated...")
+
+    print("Number of simultaneous connection: " + str(test.nb_conn) + "...")
+    http_client = tornado.httpclient.AsyncHTTPClient()
+    headers     = {'Content-Type': 'application/octet-stream;'}
+    url         = "http://"+ str(test.target_addr) +":"+str(test.target_port)+"/test/"
+    print(url)
+
+
+    for id in range (test.nb_conn):
+        test_url = url + str(id+1)
+        req      = tornado.httpclient.HTTPRequest(test_url,
+                                                  method             = "POST",
+                                                  headers            = {'Content-Type': 'application/octet-stream;'},
+                                                  body               = test.random_body,
+                                                  request_timeout    = test.timeout)
+        req.id   = id+1
+        req.test = test
+        testobj  = TestObj(id+1)
+        testobj.len = len(test.random_body)
+        test.conn_list.append(testobj)
+        http_client.fetch(req, handle_request)
+
+
+    print("Test Started!")
+    test.timer = Timer(test.timeout, TestFinishHandler,[test])
+    test.timer.start()
+    print("Will Timeout after " + str(test.timeout) + " Seconds" )
+    tester = tornado.ioloop.IOLoop.instance()
+    tester.start()
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-c.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-c.c
new file mode 100644
index 0000000..f753cf5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-c.c
@@ -0,0 +1,618 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                                EXAMPLE
+*
+*                                  HTTP CLIENT APPLICATION FUNCTIONS FILE
+*
+* Filename      : http-c_app.c
+* Version       : V1.00.00
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.00.00
+*                       (d) uC/TCP-IP V3.02.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#define    MICRIUM_SOURCE
+#define    MC_PERF_CLIENT_MODULE
+
+#include  "mc_perf-c.h"
+
+
+/*
+********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  MCPerfClient_ReqBodyHook          (HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_REQ_OBJ             *p_req,
+                                                void                     **p_data,
+                                                CPU_CHAR                  *p_buf,
+                                                CPU_INT16U                 buf_len,
+                                                CPU_INT16U                *p_data_len);
+
+void         MCPerfClient_RespBodyHook         (HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_REQ_OBJ             *p_req,
+                                                HTTP_CONTENT_TYPE          content_type,
+                                                void                      *p_data,
+                                                CPU_INT16U                 data_len,
+                                                CPU_INT16U                *data_len_read,
+                                                CPU_BOOLEAN                last_chunk);
+
+#ifdef HTTPc_TASK_MODULE_EN
+void         MCPerfClient_ConnConnectCallback  (HTTPc_CONN_OBJ            *p_conn,
+                                                CPU_BOOLEAN                open_status);
+
+void         MCPerfClient_ConnCloseCallback    (HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_CONN_CLOSE_STATUS    close_status,
+                                                HTTPc_ERR                  err);
+
+void         MCPerfClient_TransDoneCallback    (HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_REQ_OBJ             *p_req,
+                                                HTTPc_RESP_OBJ            *p_resp,
+                                                CPU_BOOLEAN                status);
+
+void         MCPerfClient_TransErrCallback     (HTTPc_CONN_OBJ            *p_conn,
+                                                HTTPc_REQ_OBJ             *p_req,
+                                                HTTPc_ERR                  err_code);
+#endif
+
+/*
+*********************************************************************************************************
+*                                            MCPerfClient_Init()
+*
+* Description : Initialize the µC/HTTP-client stack for the example application.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if initialization was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  MCPerfClient_Init (void)
+{
+    LIB_ERR         lib_err;
+    HTTPc_ERR       httpc_err;
+    CPU_BOOLEAN     success;
+
+
+    HTTPc_Init(&HTTPc_Cfg, &HTTPc_TaskCfg, DEF_NULL, &httpc_err);
+    if (httpc_err != HTTPc_ERR_NONE) {
+        success = DEF_NO;
+        goto exit;
+    }
+
+    Mem_PoolCreate(&MCPerfPool,
+                    DEF_NULL,
+                    0u,
+                    MC_PERF_CLIENT_CFG_CONN_NBR_MAX,
+                    sizeof(MC_PERF),
+                    CPU_WORD_SIZE_32,
+                    DEF_NULL,
+                   &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        success = DEF_NO;
+        goto exit;
+    }
+
+    success = DEF_YES;
+exit:
+    return (success);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        MCPerfClient_ReqSendPost()
+*
+* Description : Send a POST request with a pre-formatted form as body.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if HTTP transaction was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+CPU_BOOLEAN  MCPerf_ClientNewTest (CPU_CHAR   *p_host,
+                                   CPU_INT08U  test_nb,
+                                   CPU_INT32U  req_len)
+{
+    HTTPc_CONN_OBJ        *p_conn;
+    HTTPc_REQ_OBJ         *p_req;
+    HTTPc_RESP_OBJ        *p_resp;
+    CPU_CHAR              *p_buf;
+    HTTPc_FLAGS            flags;
+    CPU_SIZE_T             str_len;
+    HTTP_CONTENT_TYPE      content_type;
+    HTTPc_ERR              err;
+    CPU_INT32U             port;
+    MC_PERF               *p_mc_perf;
+    CPU_ERR                cpu_err;
+    LIB_ERR                lib_err;
+    CPU_BOOLEAN            result;
+    CPU_CHAR               str_buf[10];
+
+    p_mc_perf = (MC_PERF*) Mem_PoolBlkGet(&MCPerfPool,
+                                          0,
+                                          &lib_err);
+    if(lib_err != LIB_MEM_ERR_NONE){
+        CPU_SW_EXCEPTION(;);
+    }
+    Mem_Clr(p_mc_perf,sizeof(MC_PERF));
+    
+    p_conn = (HTTPc_CONN_OBJ*)&p_mc_perf->Conn;
+    p_buf  = &p_mc_perf->ConnBuf[0];
+    p_req  = &p_mc_perf->Req;
+    p_resp = &p_mc_perf->Resp;
+
+    HTTPc_ConnClr(p_conn, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ConnSetParam(         p_conn,
+                                HTTPc_PARAM_TYPE_CONN_CONNECT_CALLBACK,
+                       (void *)&MCPerfClient_ConnConnectCallback,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ConnSetParam(         p_conn,
+                                HTTPc_PARAM_TYPE_CONN_CLOSE_CALLBACK,
+                       (void *)&MCPerfClient_ConnCloseCallback,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+    
+    port = 8180;
+    HTTPc_ConnSetParam(         p_conn,
+                                HTTPc_PARAM_TYPE_SERVER_PORT,
+                       (void *)&port,
+                               &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+    Str_Copy(p_mc_perf->HostBuf,p_host);
+    str_len = Str_Len(p_mc_perf->HostBuf);
+    flags   = HTTPc_FLAG_CONN_NO_BLOCK;
+    result  = HTTPc_ConnOpen(p_conn,
+                             p_buf,
+                             MC_PERF_CLIENT_CFG_CONN_BUF_SIZE,
+                             p_mc_perf->HostBuf,
+                             str_len,
+                             flags,
+                            &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+    p_req->UserDataPtr = (void *)p_mc_perf;
+
+                                                                /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+
+    HTTPc_ReqClr(p_req, &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ----------- SET REQUEST BODY PARAMETERS ------------ */
+    content_type = HTTP_CONTENT_TYPE_OCTET_STREAM;
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_TYPE,
+                     &content_type,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(p_req,
+                      HTTPc_PARAM_TYPE_REQ_BODY_CONTENT_LEN,
+                     &req_len,
+                     &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(         p_req,
+                               HTTPc_PARAM_TYPE_REQ_BODY_HOOK,
+                      (void *)&MCPerfClient_ReqBodyHook,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* --------- SET REQ/RESP CALLBACK FUNCTIONS ---------- */
+
+    HTTPc_ReqSetParam(         p_req,
+                               HTTPc_PARAM_TYPE_TRANS_ERR_CALLBACK,
+                      (void *)&MCPerfClient_TransErrCallback,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPc_ReqSetParam(         p_req,
+                               HTTPc_PARAM_TYPE_TRANS_COMPLETE_CALLBACK,
+                      (void *)&MCPerfClient_TransDoneCallback ,
+                              &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+    p_mc_perf->Freq    = CPU_TS_TmrFreqGet (&cpu_err);
+    p_mc_perf->TsStart = CPU_TS_Get64();
+    p_mc_perf->Payload = req_len * 8;
+
+    Str_Copy (p_mc_perf->ResBuf,"/target2PC/");
+
+    Str_FmtNbr_Int32U(test_nb, 2, DEF_NBR_BASE_DEC, DEF_NULL, DEF_NO, DEF_YES, &str_buf[0]);
+
+    Str_Cat(p_mc_perf->ResBuf,str_buf);
+
+    str_len = Str_Len(p_mc_perf->ResBuf);
+
+    flags   = HTTPc_FLAG_REQ_NO_BLOCK;
+    result  = HTTPc_ReqSend(p_conn,
+                            p_req,
+                            p_resp,
+                            HTTP_METHOD_POST,
+                            p_mc_perf->ResBuf,
+                            str_len,
+                            flags,
+                           &err);
+    if (err != HTTPc_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                              CALLBACKS
+*********************************************************************************************************
+*/
+
+
+CPU_CHAR MCPerfClient_Key [] = {"YMcHL3c1uPcYuEQluOHClC29ZasfBSMu85oIG1mrGDG4yQyCRpwzVSZqjSqApMleYYqWo9tcnMTEZBzO5xYPL3JPdbqK8GRf5SMguR0ktUQdxdJWLmUWtN5jM7zLycZy"\
+                               "lxlxFyDzIKjMEp5J9AR0i0tMdfnYRuPiEBfVWswV1Aw7XbnHIBZ8jkhHihoEy1yO3ogbhJvdTBu22zHT9vm4uQoIDYThxiIJmkgEyRtS7AMcM1LHoNUhWdl4kqZHP8vl"\
+                               "BJLPgXyp2diuoihkfWkSzLsB1ch4ErGGLOa3lQsIIR9gVVCa6y6jujHe7FhMkQrzlzjHCXyP6mjVscKULOoDn2GlvUXsHrLiYL4iTkIRZGkL1XctyifYri5tqQVphTuE"\
+                               "1UMI9lOOUqMTJEmwaqJbYoMbMqjnPivlhBTZeKctHlT2aQhi7KJdC2YichW9UNSNuBb8AibVdK2c1KAAIRlqxLU6CNxPZ9n4zUtdHxLTfkWC3Xla1qTGXpDsp0xJ0nDA"\
+                               "kFEI3nvr2veVsE4wI9ZcPA4kFqnCj4RkqBIhaieOJw1FiONH36yU2RuW5s8moTzI7YtJ13mi4cxiWVt6Qbk7cOcoUN7huwDCatnel6CgjkhubyOdTCGIYCqCn7vwbGjS"\
+                               "hdbUuO0RRdRJFUv3btSZ3i2h8YlIPz4lzGeGG4hIWqIEZvWmv6tViUBkxdlfVY3S7xxf846B1fBShQeeJQUQSGowx5WEriIuLFK7N5A6suPSD8PXMxOhvb9wTuDvaDac"\
+                               "3jTby66lsDW4Mvz9jcwNNDWEvPzlD6K2MLavIu30frV5gJrVsmagVquO7JOsuyEWRTxxoSazkpNx6ii4PfwGvt2KbMu0B0MRetGeSVwxSHU3WHFFYQd30vtmROUpDUFV"\
+                               "0gIj2hed8FrgQHDpMzHClC08pEEFeilO0fVaJFBGwsuew5R8hSaF2zJEsY32sBxmEUDwbILFxLoKNhasHeFGyAHujUR4EiezFZCNypGKf92rb0AY7sYXl1oURY5sZnnO"\
+                               "YMcHL3c1uPcYuEQluOHClC29ZasfBSMu85oIG1mrGDG4yQyCRpwzVSZqjSqApMleYYqWo9tcnMTEZBzO5xYPL3JPdbqK8GRf5SMguR0ktUQdxdJWLmUWtN5jM7zLycZy"\
+                               "lxlxFyDzIKjMEp5J9AR0i0tMdfnYRuPiEBfVWswV1Aw7XbnHIBZ8jkhHihoEy1yO3ogbhJvdTBu22zHT9vm4uQoIDYThxiIJmkgEyRtS7AMcM1LHoNUhWdl4kqZHP8vl"\
+                               "BJLPgXyp2diuoihkfWkSzLsB1ch4ErGGLOa3lQsIIR9gVVCa6y6jujHe7FhMkQrzlzjHCXyP6mjVscKULOoDn2GlvUXsHrLiYL4iTkIRZGkL1XctyifYri5tqQVphTuE"\
+                               "1UMI9lOOUqMTJEmwaqJbYoMbMqjnPivlhBTZeKctHlT2aQhi7KJdC2YichW9UNSNuBb8AibVdK2c1KAAIRlqxLU6CNxPZ9n4zUtdHxLTfkWC3Xla1qTGXpDsp0xJ0nDA"\
+                               "kFEI3nvr2veVsE4wI9ZcPA4kFqnCj4RkqBIhaieOJw1FiONH36yU2RuW5s8moTzI7YtJ13mi4cxiWVt6Qbk7cOcoUN7huwDCatnel6CgjkhubyOdTCGIYCqCn7vwbGjS"\
+                               "hdbUuO0RRdRJFUv3btSZ3i2h8YlIPz4lzGeGG4hIWqIEZvWmv6tViUBkxdlfVY3S7xxf846B1fBShQeeJQUQSGowx5WEriIuLFK7N5A6suPSD8PXMxOhvb9wTuDvaDac"\
+                               "3jTby66lsDW4Mvz9jcwNNDWEvPzlD6K2MLavIu30frV5gJrVsmagVquO7JOsuyEWRTxxoSazkpNx6ii4PfwGvt2KbMu0B0MRetGeSVwxSHU3WHFFYQd30vtmROUpDUFV"\
+                               "0gIj2hed8FrgQHDpMzHClC08pEEFeilO0fVaJFBGwsuew5R8hSaF2zJEsY32sBxmEUDwbILFxLoKNhasHeFGyAHujUR4EiezFZCNypGKf92rb0AY7sYXl1oURY5sZnnO"
+                               "YMcHL3c1uPcYuEQluOHClC29ZasfBSMu85oIG1mrGDG4yQyCRpwzVSZqjSqApMleYYqWo9tcnMTEZBzO5xYPL3JPdbqK8GRf5SMguR0ktUQdxdJWLmUWtN5jM7zLycZy"\
+                               "lxlxFyDzIKjMEp5J9AR0i0tMdfnYRuPiEBfVWswV1Aw7XbnHIBZ8jkhHihoEy1yO3ogbhJvdTBu22zHT9vm4uQoIDYThxiIJmkgEyRtS7AMcM1LHoNUhWdl4kqZHP8vl"\
+                               "BJLPgXyp2diuoihkfWkSzLsB1ch4ErGGLOa3lQsIIR9gVVCa6y6jujHe7FhMkQrzlzjHCXyP6mjVscKULOoDn2GlvUXsHrLiYL4iTkIRZGkL1XctyifYri5tqQVphTuE"\
+                               "1UMI9lOOUqMTJEmwaqJbYoMbMqjnPivlhBTZeKctHlT2aQhi7KJdC2YichW9UNSNuBb8AibVdK2c1KAAIRlqxLU6CNxPZ9n4zUtdHxLTfkWC3Xla1qTGXpDsp0xJ0nDA"\
+                               "kFEI3nvr2veVsE4wI9ZcPA4kFqnCj4RkqBIhaieOJw1FiONH36yU2RuW5s8moTzI7YtJ13mi4cxiWVt6Qbk7cOcoUN7huwDCatnel6CgjkhubyOdTCGIYCqCn7vwbGjS"\
+                               "hdbUuO0RRdRJFUv3btSZ3i2h8YlIPz4lzGeGG4hIWqIEZvWmv6tViUBkxdlfVY3S7xxf846B1fBShQeeJQUQSGowx5WEriIuLFK7N5A6suPSD8PXMxOhvb9wTuDvaDac"\
+                               "3jTby66lsDW4Mvz9jcwNNDWEvPzlD6K2MLavIu30frV5gJrVsmagVquO7JOsuyEWRTxxoSazkpNx6ii4PfwGvt2KbMu0B0MRetGeSVwxSHU3WHFFYQd30vtmROUpDUFV"\
+                               "0gIj2hed8FrgQHDpMzHClC08pEEFeilO0fVaJFBGwsuew5R8hSaF2zJEsY32sBxmEUDwbILFxLoKNhasHeFGyAHujUR4EiezFZCNypGKf92rb0AY7sYXl1oURY5sZnnO"
+                               "YMcHL3c1uPcYuEQluOHClC29ZasfBSMu85oIG1mrGDG4yQyCRpwzVSZqjSqApMleYYqWo9tcnMTEZBzO5xYPL3JPdbqK8GRf5SMguR0ktUQdxdJWLmUWtN5jM7zLycZy"\
+                               "lxlxFyDzIKjMEp5J9AR0i0tMdfnYRuPiEBfVWswV1Aw7XbnHIBZ8jkhHihoEy1yO3ogbhJvdTBu22zHT9vm4uQoIDYThxiIJmkgEyRtS7AMcM1LHoNUhWdl4kqZHP8vl"\
+                               "BJLPgXyp2diuoihkfWkSzLsB1ch4ErGGLOa3lQsIIR9gVVCa6y6jujHe7FhMkQrzlzjHCXyP6mjVscKULOoDn2GlvUXsHrLiYL4iTkIRZGkL1XctyifYri5tqQVphTuE"\
+                               "1UMI9lOOUqMTJEmwaqJbYoMbMqjnPivlhBTZeKctHlT2aQhi7KJdC2YichW9UNSNuBb8AibVdK2c1KAAIRlqxLU6CNxPZ9n4zUtdHxLTfkWC3Xla1qTGXpDsp0xJ0nDA"\
+                               "kFEI3nvr2veVsE4wI9ZcPA4kFqnCj4RkqBIhaieOJw1FiONH36yU2RuW5s8moTzI7YtJ13mi4cxiWVt6Qbk7cOcoUN7huwDCatnel6CgjkhubyOdTCGIYCqCn7vwbGjS"\
+                               "hdbUuO0RRdRJFUv3btSZ3i2h8YlIPz4lzGeGG4hIWqIEZvWmv6tViUBkxdlfVY3S7xxf846B1fBShQeeJQUQSGowx5WEriIuLFK7N5A6suPSD8PXMxOhvb9wTuDvaDac"\
+                               "3jTby66lsDW4Mvz9jcwNNDWEvPzlD6K2MLavIu30frV5gJrVsmagVquO7JOsuyEWRTxxoSazkpNx6ii4PfwGvt2KbMu0B0MRetGeSVwxSHU3WHFFYQd30vtmROUpDUFV"\
+                               "0gIj2hed8FrgQHDpMzHClC08pEEFeilO0fVaJFBGwsuew5R8hSaF2zJEsY32sBxmEUDwbILFxLoKNhasHeFGyAHujUR4EiezFZCNypGKf92rb0AY7sYXl1oURY5sZnnO"
+};
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          MCPerfClient_ReqBodyHook()
+*
+* Description : Specify the data to be sent in the Request body.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               p_data      Variable that will received the pointer to the data to include in the HTTP request.
+*
+*               p_buf       Pointer to HTTP transmit buffer.
+*
+*               buf_len     Length of space remaining in  the HTTP transmit buffer.
+*
+*               p_data_len  Length of the data.
+*
+* Return(s)   : DEF_YES, if all data to transmit was passed by the application
+*               DEF_NO,  if data still remaining to be sent.
+*
+* Caller(s)   : HTTPcReq_BodyData() via 'p_req->OnBodyTx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  MCPerfClient_ReqBodyHook (HTTPc_CONN_OBJ     *p_conn,
+                                       HTTPc_REQ_OBJ      *p_req,
+                                       void              **p_data,
+                                       CPU_CHAR           *p_buf,
+                                       CPU_INT16U          buf_len,
+                                       CPU_INT16U         *p_data_len)
+{
+
+    switch (p_req->Method_reserved) {
+        case HTTP_METHOD_POST:
+            *p_data     = &MCPerfClient_Key[0];
+            *p_data_len = DEF_MIN(buf_len, 4096) ;
+            *p_data_len = DEF_MIN(*p_data_len, p_req->ContentLen_reserved) ;
+             break;
+
+        default:
+            *p_data_len = 0;
+             break;
+    }
+    return (DEF_YES);
+}
+
+/*
+*********************************************************************************************************
+*                                       MCPerfClient_RespBodyHook()
+*
+* Description : Retrieve data in HTTP Response received.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection object.
+*
+*               p_req           Pointer to current HTTPc Request object.
+*
+*               content_type    HTTP Content Type of the HTTP Response body's data.
+*
+*               p_data          Pointer to a data piece of the HTTP Response body.
+*
+*               data_len        Length of the data piece received.
+*
+*               last_chunk      DEF_YES, if this is the last piece of data.
+*
+*                               DEF_NO,  if more data is up coming.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcResp_BodyStd()   via 'p_req->OnBodyRx()'
+*               HTTPcResp_BodyChunk() via 'p_req->OnBodyRx()'
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  MCPerfClient_RespBodyHook (HTTPc_CONN_OBJ     *p_conn,
+                                 HTTPc_REQ_OBJ      *p_req,
+                                 HTTP_CONTENT_TYPE   content_type,
+                                 void               *p_data,
+                                 CPU_INT16U          data_len,
+                                 CPU_INT16U         *data_len_read,
+                                 CPU_BOOLEAN         last_chunk)
+{
+
+   *data_len_read = data_len;
+
+    if (last_chunk == DEF_YES) {
+        MC_PERF_CLIENT_TRACE_INFO(("\n\r"));
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                      MCPerfClient_ConnConnectCallback()
+*
+* Description : Callback to notify application that an HTTP connection connect process was completed.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection.
+*
+*               open_status     Status of the connection:
+*
+*                               DEF_OK,   if the connection with the server was successful.
+*                               DEF_FAIL, otherwise.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPcTask_Handler() via 'p_conn->OnConnect()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+void  MCPerfClient_ConnConnectCallback (HTTPc_CONN_OBJ  *p_conn,
+                                    CPU_BOOLEAN      open_status)
+{
+    if (open_status == DEF_OK) {
+        MC_PERF_CLIENT_TRACE_INFO(("Connection to server succeeded.\n\r"));
+    } else {
+        MC_PERF_CLIENT_TRACE_INFO(("Connection to server failed.\n\r"));
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     MCPerfClient_ConnCloseCallback()
+*
+* Description : Callback to notify application that an HTTP connection was closed.
+*
+* Argument(s) : p_conn          Pointer to current HTTPc Connection.
+*
+*               close_status    Status of the connection closing:
+*                                   HTTPc_CONN_CLOSE_STATUS_ERR_INTERNAL
+*                                   HTTPc_CONN_CLOSE_STATUS_SERVER
+*                                   HTTPc_CONN_CLOSE_STATUS_NO_PERSISTENT
+*                                   HTTPc_CONN_CLOSE_STATUS_APP
+*
+*               err             Error Code when connection was closed.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_conn->OnClose()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+void  MCPerfClient_ConnCloseCallback (HTTPc_CONN_OBJ           *p_conn,
+                                  HTTPc_CONN_CLOSE_STATUS   close_status,
+                                  HTTPc_ERR                 err)
+{
+    MC_PERF_CLIENT_TRACE_INFO(("Connection closed.\n\r"));
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     MCPerfClient_TransDoneCallback()
+*
+* Description : Callback to notify application that an HTTP transaction was completed.
+*
+* Argument(s) : p_conn  Pointer to current HTTPc Connection object.
+*
+*               p_req   Pointer to current HTTPc Request object.
+*
+*               p_resp  Pointer to current HTTPc Response object.
+*
+*               status  Status of the transaction:
+*
+*                           DEF_OK,   transaction was successful.
+*                           DEF_FAIL, otherwise.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnTransComplete()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+void  MCPerfClient_TransDoneCallback (HTTPc_CONN_OBJ  *p_conn,
+                                      HTTPc_REQ_OBJ   *p_req,
+                                      HTTPc_RESP_OBJ  *p_resp,
+                                      CPU_BOOLEAN      status)
+{
+    MC_PERF             *p_mc_perf;
+    LIB_ERR              lib_err;
+    CPU_SR_ALLOC();
+
+
+    if (status == DEF_OK) {
+        p_mc_perf            = (MC_PERF *)p_req->UserDataPtr;
+        p_mc_perf->TsEnd     = CPU_TS_Get64();
+        p_mc_perf->TsDelta   = p_mc_perf->TsEnd - p_mc_perf->TsStart;
+        p_mc_perf->Duration  = (p_mc_perf->TsDelta *1000)/p_mc_perf->Freq;
+        p_mc_perf->Troughput = (p_mc_perf->Payload*1000)/p_mc_perf->Duration;
+
+        MC_PERF_CLIENT_TRACE_INFO(("Duration: %d ms \n\r", p_mc_perf->Duration));
+        MC_PERF_CLIENT_TRACE_INFO(("Troughput: %d kb/s \n\r", (p_mc_perf->Troughput/1024)));
+        MC_PERF_CLIENT_TRACE_INFO(("Transaction Status Code: %s\n\r", p_resp->ReasonPhrasePtr));
+    } else {
+        MC_PERF_CLIENT_TRACE_INFO(("Transaction failed\n\r"));
+    }
+
+
+    Mem_PoolBlkFree (&MCPerfPool,
+                      p_mc_perf,
+                     &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+        CPU_SW_EXCEPTION(;);
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      MCPerfClient_TransErrCallback()
+*
+* Description : Callback to notify application that an error occurred during an HTTP transaction.
+*
+* Argument(s) : p_conn      Pointer to current HTTPc Connection object.
+*
+*               p_req       Pointer to current HTTPc Request object.
+*
+*               err_code    Error Code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Various, via 'p_req->OnErr()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef HTTPc_TASK_MODULE_EN
+void MCPerfClient_TransErrCallback (HTTPc_CONN_OBJ  *p_conn,
+                                HTTPc_REQ_OBJ   *p_req,
+                                HTTPc_ERR        err_code)
+{
+    MC_PERF_CLIENT_TRACE_INFO(("Transaction error: %i\n\r", err_code));
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-c.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-c.h
new file mode 100644
index 0000000..c43575d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-c.h
@@ -0,0 +1,192 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                                EXAMPLE
+*
+*                                  HTTP CLIENT APPLICATION FUNCTIONS FILE
+*
+* Filename      : http-c_app.c
+* Version       : V1.00.00
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.00.00
+*                       (d) uC/TCP-IP V3.02.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  MC_PERF_CLIENT_MODULE_PRESENT
+#define  MC_PERF_CLIENT_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef MC_PERF_CLIENT_MODULE
+#define  MC_PERF_CLIENT_EXT
+#else
+#define  MC_PERF_CLIENT_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#define  MC_PERF_CLIENT_CFG_CONN_NBR_MAX                      10u
+#define  MC_PERF_CLIENT_CFG_REQ_NBR_MAX                       10u
+#define  MC_PERF_CLIENT_CFG_CONN_BUF_SIZE                  3*1460u
+
+#define  MC_PERF_CLIENT_CFG_QUERY_STR_NBR_MAX                  6u
+#define  MC_PERF_CLIENT_CFG_QUERY_STR_KEY_LEN_MAX             20u
+#define  MC_PERF_CLIENT_CFG_QUERY_STR_VAL_LEN_MAX             50u
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef struct mc_perfc {
+
+    CPU_INT32U             TestID;
+
+    CPU_TS64               TsStart;
+    CPU_TS64               TsEnd;
+    CPU_TS64               TsDelta;
+    CPU_TS_TMR_FREQ        Freq;
+    CPU_INT64U             Payload;
+    CPU_INT64U             Troughput;
+    CPU_INT64U             Duration;
+
+    HTTPc_CONN             Conn;
+    HTTPc_REQ_OBJ          Req;
+    HTTPc_RESP_OBJ         Resp;
+    CPU_CHAR               ConnBuf[MC_PERF_CLIENT_CFG_CONN_BUF_SIZE];
+
+    CPU_CHAR               ResBuf[40];
+    CPU_CHAR               HostBuf[40];
+
+} MC_PERF;
+
+
+MC_PERF_CLIENT_EXT MEM_POOL  MCPerfPool;
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+MC_PERF_CLIENT_EXT  CPU_CHAR              MCPerfClient_Buf[4096];
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  MCPerfClient_Init  (void);
+
+CPU_BOOLEAN  MCPerf_ClientNewTest (CPU_CHAR   *p_host,
+                                   CPU_INT08U  test_nb,
+                                   CPU_INT32U  req_len);
+
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                       0
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                      1
+#endif
+
+#ifndef  TRACE_LEVEL_DEBUG
+#define  TRACE_LEVEL_DEBUG                     2
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                       2
+#endif
+
+#define  MC_PERF_CLIENT_TRACE_LEVEL                TRACE_LEVEL_OFF
+#define  MC_PERF_CLIENT_TRACE                      printf
+
+#define  MC_PERF_CLIENT_TRACE_INFO(x)            ((MC_PERF_CLIENT_TRACE_LEVEL >= TRACE_LEVEL_INFO)  ? (void)(MC_PERF_CLIENT_TRACE x) : (void)0)
+#define  MC_PERF_CLIENT_TRACE_DBG(x)             ((MC_PERF_CLIENT_TRACE_LEVEL >= TRACE_LEVEL_DEBUG) ? (void)(MC_PERF_CLIENT_TRACE x) : (void)0)
+
+#define  MC_PERF_CLIENT_TRACE_DEBUG(x)             MC_PERF_CLIENT_TRACE_DBG(x)
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* MC_PERF_CLIENT_MODULE_PRESENT  */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s.c
new file mode 100644
index 0000000..3d54a0d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s.c
@@ -0,0 +1,308 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find information about uC/HTTPs by visiting https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                    HTTP INSTANCE's INITALIZATION
+*
+* Filename      : http-s_init.c
+* Version       : V2.10.01
+* Programmer(s) : AA
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize uC/HTTPs, initialize a web server instance and start it.
+*
+*                 (2) This example is for :
+*
+*                       (a) uC/TCPIP - V3.00.01
+*                       (b) uC/FS    - V4.x
+*
+*                 (3) This file is an example about how to use uC/HTTPs, It may not cover all case needed by a real
+*                     application. Also some modification might be needed, insert the code to perform the stated
+*                     actions wherever 'TODO' comments are found.
+*
+*                     (a) For example this example doesn't manage the link state (plugs and unplugs), this can
+*                         be a problem when switching from a network to another network.
+*
+*                     (b) This example is not fully tested, so it is not guaranteed that all cases are cover
+*                         properly.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) (a) The uC/TCP-IP Network file system abstraction layer folder for traditional file system;
+*
+*                       '$uC-TCPIP/FS//net_.h'
+*
+*
+*               (b) The static file system API is located under uC/HTTPs File system folder;
+*
+*                       '$uc-HTTPs/FS/Static/http-s_fs_static.h'
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+#include  "mc_perf-s_instance_cfg.h"
+
+
+#include  "mc_perf-s.h"
+#include  
+/*
+*********************************************************************************************************
+*                                      REST RESOURCE VARIABLE
+*********************************************************************************************************
+*/
+
+
+HTTPs_REST_HOOK_STATE  MCPerf_TCPIP_GetStats       (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                     const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                     const  HTTPs_REST_STATE          state,
+                                                            void                    **p_data,
+                                                     const  HTTPs_INSTANCE           *p_instance,
+                                                            HTTPs_CONN               *p_conn,
+                                                            void                     *p_buf,
+                                                     const  CPU_SIZE_T                buf_len,
+                                                            CPU_SIZE_T               *p_buf_len_used);
+
+HTTPs_REST_CFG  MCPerfRestCfg = { 0 };                                /* Simply the list index REST is going to use.          */
+
+HTTPs_REST_RESOURCE  MCPerf_TCPIP_Resource = {
+        "/test/{id}",
+        DEF_NULL,
+        0,
+        {
+                DEF_NULL,                   /* Method Delete */
+                DEF_NULL,                   /* Method Get*/
+                DEF_NULL,                   /* Method Head, Not supported */
+                MCPerf_TCPIP_GetStats,     /* Method Post */
+                DEF_NULL                    /* Method Put */
+        }
+};
+/*
+*********************************************************************************************************
+*                                        MCPerfServer_Init()
+*
+* Description : (1) Initialize uC/HTTPs and start a web server instance:
+*
+*                   (a) Initialize uC/HTTPs module.
+*                   (b) Initialize a web server instance.
+*                   (c) Start that web server instance.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK, if successfully initialized and started (can access the web server).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (2) Prerequisite modules must be initialized before calling any uC/HTTPs functions:
+*
+*                   (a) RTOS, such as uCOS-II or uCOS-III
+*                   (b) uC/LIB
+*                   (c) uC/CPU
+*                   (d) uC/TCP-IP
+*                   (e) File system, such as uC/FS.
+*
+*               (3) Obviously before starting or trying to reach web server. The files must loaded in the file system
+*                   to be able to get it using an HTTP client.
+*
+*               (4) Prior to do any call to uC/HTTPs, the module must be initialized. This is done by
+*                   calling HTTPs_Init(). If the process is successful, the Web server internal data structures are
+*                   initialized.
+*
+*               (5) Each web server must be initialized before it can be started or stopped. HTTPs_InstanceInit()
+*                   is responsible to allocate memory for the instance, initialize internal data structure and
+*                   create the web server instance's task.
+*
+*                   (a) The first argument is the instance configuration, which should be modified following you
+*                       requirements. The intance's configuration set the server's port, the number of connection that
+*                       can be accepted, the hooks functions, etc.
+*
+*                   (b) The second argument is the pointer to the File system port API. uC/HTTPs is using the API
+*                       defined by the uC/TCP-IP Network file system abstraction layer to access the File system.
+*                       The API structure can be found in:
+*
+*                       (i)  The uC/TCP-IP Network file system abstraction layer folder for traditional file system;
+*
+*                               '$uC-TCPIP/FS//net_.h'
+*                                NetFS_API_FS_V4
+*
+*                       (ii) The static file system API is located under uC/HTTPs File system folder;
+*
+*                               '$uc-HTTPs/FS/Static/http-s_fs_static.h'
+*                               HTTPs_FS_API_Static
+*
+*               (6) Once a web server instance is initialized, it can be started using HTTPs_InstanceStart() to
+*                   become come accessible. This function start the web server instance's task. Each instance has
+*                   is own task and all accepted connection is processed with this single task.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  MCPerfServer_Init (void)
+{
+    HTTPs_INSTANCE  *p_https_instance;
+    CPU_BOOLEAN      success;
+    HTTPs_ERR        err_https;
+    HTTPs_REST_ERR        err_https_rest;
+
+    															/* ------------ INITALIZE uC/HTTPs MODULE ------------- */
+    HTTPs_Init(DEF_NULL, &err_https);                           /* See Note #4.                                         */
+    if (err_https != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ---------- INITALIZE WEB SERVER INSTANCE ----------- */
+    p_https_instance = HTTPs_InstanceInit(&HTTPs_CfgInstance_MCPerf, /* TODO: Instance configuration. See Note #5a.    */
+                                          &HTTPs_TaskCfgInstance_MCPerf,
+                                          &err_https);
+    if (err_https != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+    HTTPsREST_Publish(&MCPerf_TCPIP_Resource, 0, &err_https_rest);
+                                                                /* ------------ START WEB SERVER INSTANCE ------------- */
+    HTTPs_InstanceStart(p_https_instance,                       /* Instance handle. See Note #6.                        */
+                       &err_https);
+    if (err_https != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                       AppREST_TCPIP_GetStats()
+*
+* Description : Get the TCPIP statistic for the first interface.
+*
+* Argument(s) : p_resource          Pointer to the REST resource.
+*
+*               p_uri               Pointer to the URI of the REST resource.
+*
+*               state               REST state.
+*
+*               p_data              Pointer to the data.
+*
+*               p_instance          Pointer to HTTPs Instance object.
+*
+*               p_conn              Pointer to HTTPs Connection object.
+*
+*               p_buf               Pointer to HTTPs buffer.
+*
+*               p_buf_len           Length of buffer available.
+*
+*               p_buf_len_used      Pointer to variable that will be received the length of the buffer used.
+*
+* Return(s)   : REST hook state.
+*
+* Caller(s)   : AppREST_TCPIP_Resource.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+HTTPs_REST_HOOK_STATE   MCPerf_TCPIP_GetStats (const  HTTPs_REST_RESOURCE      *p_resource,
+                                               const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                               const  HTTPs_REST_STATE          state,
+                                                      void                    **p_data,
+                                               const  HTTPs_INSTANCE           *p_instance,
+                                                      HTTPs_CONN               *p_conn,
+                                                      void                     *p_buf,
+                                               const  CPU_SIZE_T                buf_len,
+                                                      CPU_SIZE_T               *p_buf_len_used)
+{
+    NET_CTR_IF_STATS  *p_if_stats;
+    CPU_CHAR          *p_str;
+    CPU_INT32U         if_nbr;
+    CPU_CHAR           ip_str[40];
+    NET_IPv4_ADDR      ip4;
+    NET_IPv6_ADDR      ip6;
+    NET_ERR            net_err;
+    NET_SOCK_ADDR_IPv4 *p_sock_addr4;
+    NET_SOCK_ADDR_IPv6 *p_sock_addr6;
+
+
+    p_str  = p_buf;
+    if_nbr = 1;
+
+    if (p_uri->WildCardsNbr > 0) {
+        if_nbr = Str_ParseNbr_Int32U(p_uri->WildCards[0].ValPtr,
+                                     DEF_NULL,
+                                     10);
+    }
+
+    switch(state)
+    {
+        case HTTPs_REST_STATE_INIT:
+             p_conn->RespContentType = HTTP_CONTENT_TYPE_HTML;
+             if( p_conn->ClientAddr.AddrFamily == NET_SOCK_ADDR_FAMILY_IP_V4) {
+                 p_sock_addr4 = (NET_SOCK_ADDR_IPv4*)&(p_conn->ClientAddr);
+                 ip4 = NET_UTIL_HOST_TO_NET_32(p_sock_addr4->Addr);
+                 NetASCII_IPv4_to_Str(ip4,
+                                      ip_str,
+                                      DEF_NO,
+                                     &net_err);
+             } else if(p_conn->ClientAddr.AddrFamily == NET_SOCK_ADDR_FAMILY_IP_V6) {
+                 p_sock_addr6 = (NET_SOCK_ADDR_IPv6*)&(p_conn->ClientAddr);
+                 ip6 = p_sock_addr6->Addr;
+                 NetASCII_IPv6_to_Str(&ip6,
+                                      ip_str,
+                                      DEF_NO,
+                                      DEF_NO,
+                                     &net_err);
+             }
+             MCPerf_ClientNewTest(ip_str,if_nbr,p_conn->ReqContentLen);
+             break;
+
+        case HTTPs_REST_STATE_RX:
+            if (p_buf_len_used != DEF_NULL) {
+                *p_buf_len_used = buf_len;
+            }
+             break;
+
+        case HTTPs_REST_STATE_ERROR:
+             break;
+
+        case HTTPs_REST_STATE_TX:
+             Str_Copy(p_buf,"echo");
+             *p_buf_len_used = Str_Len(p_buf) ;
+             break;
+
+        case HTTPs_REST_STATE_CLOSE:
+             break;
+
+        default:
+            break;
+    }
+
+    return HTTPs_REST_HOOK_STATE_CONTINUE;
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s.h
new file mode 100644
index 0000000..7cebf00
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s.h
@@ -0,0 +1,132 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*
+*                                       FILE DESCRIPTION
+*
+* Filename      : app_init.h
+* Version       : V1.00.00
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef MC_PERF_SERVER_MODULE_PRESENT
+#define MC_PERF_SERVER_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+#if 1
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN        MCPerf_ServerInit (void);
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     TRACE / DEBUG CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                       0
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                      1
+#endif
+
+#ifndef  TRACE_LEVEL_DEBUG
+#define  TRACE_LEVEL_DEBUG                     2
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                       2
+#endif
+
+#define  APP_INIT_TRACE_LEVEL                TRACE_LEVEL_DBG
+#define  APP_INIT_TRACE                      printf
+
+#define  APP_INIT_TRACE_INFO(x)            ((APP_INIT_TRACE_LEVEL >= TRACE_LEVEL_INFO)  ? (void)(APP_INIT_TRACE x) : (void)0)
+#define  APP_INIT_TRACE_DBG(x)             ((APP_INIT_TRACE_LEVEL >= TRACE_LEVEL_DEBUG) ? (void)(APP_INIT_TRACE x) : (void)0)
+
+#define  APP_INIT_TRACE_DEBUG(x)             APP_INIT_TRACE_DBG(x)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* APP_INIT_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s_instance_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s_instance_cfg.c
new file mode 100644
index 0000000..ce6efa4
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s_instance_cfg.c
@@ -0,0 +1,404 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find information about uC/HTTPs by visiting https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : app_init_http-s_instance_cfg.c
+* Version       : V2.20.00
+* Programmer(s) : AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) All values that are used in this file and are defined in other header files should be
+*               included in this file. Some values could be located in the same file such as task priority
+*               and stack size. This template file assume that the following values are defined in app_cfg.h:
+*
+*                   HTTPs_OS_CFG_INSTANCE_TASK_PRIO
+*                   HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE
+*
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                             /* See Note #1.                                         */
+#include  "mc_perf-s_instance_cfg.h"
+#include  "mc_perf-s.h"
+#include  
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  HTTPs_HOOK_CFG  HTTPs_REST_HookCfg;
+
+extern HTTPs_REST_CFG  MCPerfRestCfg;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TASK CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  NET_TASK_CFG  HTTPs_TaskCfgInstance_MCPerf = {
+
+    7,                            /* .Prio : Configure Instance Task priority.            */
+
+    1024,                        /* .StkSizeBytes : Configure instance task size.        */
+
+    DEF_NULL                                                    /* .StkPtr : Configure pointer to base of the stack.    */
+
+};
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) Three types of File System are accepted by the uC/HTTP-server and each has its own
+*               configuration structure.
+*                        FS TYPE                FS CFG OBJ
+*                   --------------------    -------------------
+*                   HTTPs_FS_TYPE_NONE   -> HTTPs_CFG_FS_NONE
+*                   HTTPs_FS_TYPE_STATIC -> HTTPS_CFG_FS_STATIC
+*                   HTTPS_FS_TYPE_DYN    -> HTTPS_CFG_FS_DYN
+*
+*               Below are examples for the three File System type.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NO FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) When no File System is present, the uC/HTTP-server needs to know the maximum length a path
+*               to a resource can have so the server can store adequately the URL received in an HTTP
+*               request.
+*********************************************************************************************************
+*/
+
+#if 1
+const  HTTPs_CFG_FS_NONE  HTTPs_CfgFS_None = {
+
+    /* CPU_INT32U  PathLenMax                                                                                           */
+                                                                /* Configure maximum path length (see note #1):         */
+    256,
+                                                                /* MUST be >= 1                                         */
+};
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER RX CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_RX_CFG  HTTPs_HdrRxCfg_MCPerf = {
+
+    15,                                                         /* .NbrPerConnMax                                       */
+
+    128,                                                        /* .DataLenMax                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER TX CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_TX_CFG  HTTPs_HdrTxCfg_MCPerf = {
+
+    15,                                                         /* .NbrPerConnMax                                       */
+
+    128,                                                        /* .DataLenMax                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                           HTTP SERVER INSTANCE QUERY STRING CONFIGURATION
+*
+* Note(s) : See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_QUERY_STR_CFG    HTTPs_QueryStrCfg_MCPerf = {
+
+    5,                                                          /* .NbrPerConnMax                                       */
+
+    15,                                                         /* .KeyLenMax                                           */
+
+    20,                                                         /* .ValLenMax                                           */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE FORM CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_FORM_CFG     HTTPs_FormCfg_MCPerf = {
+
+
+    15,                                                         /* .NbrPerConnMax                                       */
+
+    10,                                                         /* .KeyLenMax                                           */
+
+    48,                                                         /* .ValLenMax                                           */
+
+    DEF_ENABLED,                                                /* .MultipartEn                                         */
+
+    DEF_ENABLED,                                                /* .MultipartFileUploadEn                               */
+
+    DEF_ENABLED,                                                /* .MultipartFileUploadOverwriteEn                      */
+
+    HTTPs_CFG_INSTANCE_STR_FOLDER_UPLOAD,                       /* .MultipartFileUploadFolderPtr                        */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TOKEN CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_TOKEN_CFG   HTTPs_TokenCfg_MCPerf = {
+
+    5,                                                          /* .NbrPerConnMax                                       */
+
+    12,                                                         /* .ValLenMax                                           */
+
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               HTTP SERVER INSTANCE CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_CFG  HTTPs_CfgInstance_MCPerf = {
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      INSTANCE OS CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+        0,                                                     /* .OS_TaskDly_ms : Configure instance task delay.      */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                INSTANCE LISTEN SOCKET CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    HTTPs_SOCK_SEL_IPv4_IPv6,                                        /* .SockSel : Socket type.                              */
+
+    DEF_NULL,                                                   /* .SecurePtr : Secure configuration (SSL) Pointer.     */
+
+    8280,                                        /* .Port : Server port number.                          */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE CONNECTION CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    10,                                                         /* .ConnNbrMax : Maximum number of simultaneous.        */
+
+    15,                                                         /* .ConnInactivityTimeout_s : Conn inactivity timeout.  */
+
+    2*1460,                                                       /* .BufLen : Connection buffer length.                  */
+
+    DEF_ENABLED,                                                /* .ConnPersistentEn : Persistent conn feature.         */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE FILE SYSTEM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+    
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) The parameter 'FS_Type' is used to indicate which type of File System must be used with the HTTP server.
+*               The server supports three type of File System :
+*
+*                   HTTPs_FS_TYPE_NONE   : No File System is present.
+*                   HTTPs_FS_TYPE_STATIC : The Static File System offered with the uC/HTTP-server must be used.
+*                   HTTPs_FS_TYPE_DYN    : A real File System, like uC/FS, must be used.
+*
+*           (2) Each type of File System (see note #1) has it's own File System configuration object.
+*
+*                   HTTPs_CFG_FS_NONE
+*                   HTTPs_CFG_FS_STATIC
+*                   HTTPs_CFG_FS_DYN
+*
+*               See section 'HTTP SERVER FILE SYSTEM CONFIGURATION' for examples for each configuration object type.
+*
+*           (3) The default resource is returned when no resource is specified in the request of the client,
+*               i.e. accessing with only the web server address. Most of the time this resource should be the file
+*               "index.html".
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_FS_TYPE   FS_Type                                                                                          */
+                                                                /* Configure instance FS type (see note #1):            */
+    HTTPs_FS_TYPE_NONE,
+
+
+    /* const  void  *FS_CfgPtr                                                                                          */
+                                                                /* Configure FS configuration pointer (see note #2):    */
+   &HTTPs_CfgFS_None,
+
+    /* CPU_CHAR    *DfltResourceNamePtr                                                                                 */
+                                                                /* Configure instance default page (see note #3):       */
+    HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT,
+                                                                /* MUST be a string pointer                             */
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE PROXY CONFIGURATION
+*
+* Note(s) : (1) (a) When an HTTP Server is behind an HTTP Proxy, the HTTP client must send its requests with an
+*                    absolute Uniform Resource Identifier (URI).
+*                   For example,
+*                       GET http://example.com/index.html HTTP/1.1
+*
+*                   When the absolute URI feature is enabled, the HTTP server will support absolute URI in the first line
+*                   of the http request messages (see example just above).
+*
+*                   The server will also look for the 'Host' header field in the received request messages and save it in
+*                   the 'HostPtr' field of the HTTPs_CONN structure.
+*
+*               (b) 'HTTPs_CFG_ABSOLUTE_URI_EN' must be set as 'DEF_ENABLED' to enable the web server support of
+*                    absolute URI.
+*                    See the http-s_cfg.h section of 'HTTP PROXY CONFIGURATION' for further information.
+*
+*               (c) The maximum host name length is the maximum length the server will allow for the received host name
+*                   in a request message.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   /* CPU_INT16U   HostNameLenMax                                                                                      */
+                                                               /* Configure maximum host name length (see note #1c):   */
+   128,
+                                                               /* SHOULD be > 1  */               
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                        HOOK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_REST_HookCfg,                                        /* .HooksPtr : Pointer to Hooks' Object.                */
+
+    &MCPerfRestCfg,                                                   /* .Hooks_CfgPtr : Pointer to Application Data Hook.    */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     HEADER FIELD CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_HdrRxCfg_MCPerf,                                     /* .HdrRxCfgPtr : Pointer to Request Hdr Cfg Object.    */
+
+   &HTTPs_HdrTxCfg_MCPerf,                                     /* .HdrTxCfgPtr : Pointer to Response Hdr Cfg Object.   */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE QUERY STRING CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_QueryStrCfg_MCPerf,                                  /* .QueryStrCfgPtr : Pointer to Query String Cfg Object.*/
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      INSTANCE FORM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_FormCfg_MCPerf,                                      /* .FormCfgPtr : Pointer to Form Cfg Object.            */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                DYNAMIC TOKEN REPLACEMENT CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_TokenCfg_MCPerf,                                     /* .TokenCfgPtr : Pointer to Token Cfg Ojbect.          */
+
+
+
+};                                                              /* End of configuration structure.                      */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s_instance_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s_instance_cfg.h
new file mode 100644
index 0000000..936c3f5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/McPerf/mc_perf-s_instance_cfg.h
@@ -0,0 +1,67 @@
+/*
+*********************************************************************************************************
+*                                              uC/HTTPs
+*                                 Hypertext Transfer Protocol (server)
+*
+*                          (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/HTTPs is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at: https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+*                                               TEMPLATE
+*
+* Filename      : app_init_http-s_instance_cfg.h
+* Version       : V2.20.00
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   FILES & FOLDERS STRING DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT               "\\"
+
+#define  HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT              "index.html"
+#define  HTTPs_CFG_INSTANCE_STR_FILE_ERR_404              "404.html"
+
+#define  HTTPs_CFG_INSTANCE_STR_FOLDER_UPLOAD             "\\"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   HTTP SERVER INSTANCE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_TASK_CFG   HTTPs_TaskCfgInstance_MCPerf;
+extern  const  HTTPs_CFG      HTTPs_CfgInstance_MCPerf;
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http.c
new file mode 100644
index 0000000..e7c179f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http.c
@@ -0,0 +1,809 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                                HTTP
+*
+* Filename      : http.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) The http.c/h files gather defines, data types, structures and functions that are
+*                     common to HTTP client and server.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTP_MODULE
+#include  "http.h"
+#include  "http_dict.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void         HTTP_CharToStrHex     (       CPU_CHAR     character,
+                                                   CPU_CHAR    *p_str_char);
+
+static  CPU_CHAR     HTTP_StrHexToChar     (const  CPU_CHAR    *p_str_char);
+
+#if 0
+static  CPU_INT08U   HTTP_StrSizeHexDigReq (       CPU_INT32U   nbr);
+#endif
+
+static  CPU_CHAR    *HTTP_StrFileExtGet    (       CPU_CHAR    *p_file_name,
+                                                   CPU_SIZE_T   path_len);
+
+
+/*
+*********************************************************************************************************
+*                                   HTTP_HdrParseFieldValueGet()
+*
+* Description : Get the beginning of a field value.
+*
+* Argument(s) : p_field         Pointer to the beginning of the field line.
+*
+*               field_len       Field length.
+*
+*               p_field_end     Pointer to the end of the field line.
+*
+*               p_len_rem       Pointer to a variable that will receive the remaining length.
+*
+* Return(s)   : Pointer to the beginning of the field value.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : (1) RFC #2616, section "4.2 Message Headers" describe how Header field should be formated.
+*
+*                   (a) HTTP header fields, which include general-header (section 4.5), request-header
+*                       (section 5.3), response-header (section 6.2), and entity-header (section 7.1)
+*                       fields, follow the same generic format as that given in Section 3.1 of RFC 822 [9].
+*                       Each header field consists of a name followed by a colon (":") and the field value.
+*                       Field names are case-insensitive. The field value MAY be preceded by any amount of
+*                       LWS, though a single SP is preferred. Header fields can be extended over multiple
+*                       lines by preceding each extra line with at least one SP or HT. Applications ought
+*                       to follow "common form", where one is known or indicated, when generating HTTP
+*                       constructs, since there might exist some implementations that fail to accept
+*                       anything
+*
+*                       beyond the common forms.
+*
+*                              message-header = field-name ":" [ field-value ]
+*                              field-name     = token
+*                              field-value    = *( field-content | LWS )
+*                              field-content  = 
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *HTTP_HdrParseFieldValueGet (CPU_CHAR    *p_field,
+                                       CPU_INT16U   field_len,
+                                       CPU_CHAR    *p_field_end,
+                                       CPU_INT16U  *p_len_rem)
+{
+    CPU_INT16U   len;
+    CPU_CHAR    *p_val;
+
+
+    p_val     =  p_field + field_len;
+    len       = (p_field_end - p_val);
+
+    p_val     =  Str_Char_N(p_val, len, ASCII_CHAR_COLON);      /* Field val located after ':' (see Note #1a).          */
+    p_val++;
+
+    len       = (p_field_end - p_val);
+    p_val     =  HTTP_StrGraphSrchFirst(p_val, len);            /* Remove blank space before field value.               */
+
+   *p_len_rem = (p_field_end - p_val);
+
+    return (p_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTP_StrGraphSrchFirst()
+*
+* Description : Get pointer to the first graphic character of a string.
+*
+* Argument(s) : p_str       Pointer to the string to search in.
+*
+*               str_len     String length.
+*
+* Return(s)   : Pointer to the first graphic character, if successfully found.
+*
+*               DEF_NULL,                               otherwise.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *HTTP_StrGraphSrchFirst (CPU_CHAR    *p_str,
+                                   CPU_INT32U   str_len)
+{
+    CPU_CHAR    *p_char;
+    CPU_INT32U   len_rem;
+
+
+    len_rem = str_len;
+    p_char  = p_str;
+    while ((ASCII_IS_GRAPH(*p_char) == DEF_NO) &&
+           (len_rem > 0)                      ) {
+        p_char++;
+        len_rem--;
+    }
+
+    if (len_rem == 0) {
+        return ((CPU_CHAR *)0);
+    }
+
+    return (p_char);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTP_URL_EncodeStr()
+*
+* Description : Perform URL encoding on the given string.
+*
+* Argument(s) : p_str_src       Pointer to source string to encode.
+*
+*               p_str_dest      Pointer to destination string where the encoded string will be copied.
+*
+*               p_str_len       Argument used to pass length of the source string and
+*                                   to return length of the encoded destination string.
+*
+*               str_len_max     Maximum length of the encoded string.
+*
+* Return(s)   : DEF_OK,   if encoding succeeded.
+*
+*               DEF_FAIL, otherwise
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTP_URL_EncodeStr (const  CPU_CHAR    *p_str_src,
+                                        CPU_CHAR    *p_str_dest,
+                                        CPU_SIZE_T  *p_str_len,
+                                        CPU_SIZE_T   str_len_max)
+{
+    CPU_BOOLEAN   alpha_num;
+    CPU_BOOLEAN   unreserved;
+    CPU_BOOLEAN   result;
+    CPU_INT16U    len;
+    CPU_INT16U    len_copy;
+    CPU_INT16U    ctr;
+
+
+                                                                /* -------- VALIDATE DESTINATION BUFFER LENGTH -------- */
+    ctr      = 0u;
+    for (len = 0u; len < *p_str_len; len++) {
+
+        alpha_num = ASCII_IsAlphaNum(*p_str_src);               /* Check if char is alphabetic or numeric.              */
+
+        switch (*p_str_src) {                                   /* Check if char is an unreserved character.            */
+            case ASCII_CHAR_FULL_STOP:
+            case ASCII_CHAR_HYPHEN_MINUS:
+            case ASCII_CHAR_TILDE:
+            case ASCII_CHAR_LOW_LINE:
+                 unreserved = DEF_YES;
+                 break;
+
+
+            default:
+                 unreserved = DEF_NO;
+                 break;
+        }
+
+        if ((alpha_num  == DEF_NO) &&
+            (unreserved == DEF_NO)) {
+            ctr++;                                              /* Increment number of char to encode.                  */
+        }
+
+        p_str_src++;
+    }
+
+    len = *p_str_len + HTTP_URL_ENCODING_JUMP*ctr;
+
+    if (len > str_len_max) {
+        len_copy = 0u;
+        result   = DEF_FAIL;
+        goto exit;
+    }
+
+                                                                /* --------- COPY URL ENCODING STRING BUFFER ---------- */
+    p_str_src -= *p_str_len;                                    /* Reset pointer of source string.                      */
+
+    len_copy = 0u;
+    for (len = 0u; len < *p_str_len; len++) {
+
+        alpha_num = ASCII_IsAlphaNum(*p_str_src);               /* Check if char is alphabetic or numeric.              */
+
+        switch (*p_str_src) {                                   /* Check if char is an unreserved character.            */
+            case ASCII_CHAR_FULL_STOP:
+            case ASCII_CHAR_HYPHEN_MINUS:
+            case ASCII_CHAR_TILDE:
+            case ASCII_CHAR_LOW_LINE:
+                 unreserved = DEF_YES;
+                 break;
+
+
+            default:
+                 unreserved = DEF_NO;
+                 break;
+        }
+
+        if ((alpha_num  == DEF_YES) ||
+            (unreserved == DEF_YES)) {
+           *p_str_dest = *p_str_src;
+            len_copy++;
+        } else {
+            HTTP_CharToStrHex(*p_str_src, p_str_dest);          /* Convert char to its %-encoding equivalent.           */
+            if (*p_str_dest != ASCII_CHAR_NULL) {
+                len_copy   += HTTP_URL_ENCODING_LEN;
+                p_str_dest += HTTP_URL_ENCODING_JUMP;
+            } else {
+                result = DEF_FAIL;
+                goto exit;
+            }
+        }
+
+        p_str_src++;
+        p_str_dest++;
+    }
+
+    result = DEF_OK;
+
+
+exit:
+   *p_str_len = len_copy;
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTP_URL_DecodeStr()
+*
+* Description : Perform URL decoding on the given string.
+*
+* Argument(s) : p_str_src   Pointer to source string to decode.
+*
+*               p_str_dest  Pointer to destination string where the decoded string will be copied.
+*
+*               p_str_len   Argument used to pass the length of the source string and
+*                               to return the length of the decoded destination string.
+*
+* Return(s)   : DEF_OK,   if decoding succeeded.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTP_URL_DecodeStr (const  CPU_CHAR    *p_str_src,
+                                        CPU_CHAR    *p_str_dest,
+                                        CPU_SIZE_T  *p_str_len)
+{
+    CPU_CHAR     char_tmp;
+    CPU_INT16U   len;
+    CPU_INT16U   len_copy;
+    CPU_BOOLEAN  result;
+
+
+    len_copy = 0;
+
+    for (len = 0u; len < *p_str_len; len++) {
+        if (*p_str_src == ASCII_CHAR_PERCENTAGE_SIGN) {
+             char_tmp = HTTP_StrHexToChar(p_str_src);
+             if (char_tmp != ASCII_CHAR_NULL) {
+                *p_str_dest = char_tmp;
+                 len_copy++;
+                 p_str_src += HTTP_URL_ENCODING_JUMP;
+                 len       += HTTP_URL_ENCODING_JUMP;
+             } else {
+                  result = DEF_FAIL;
+                  goto exit;
+             }
+        } else if (*p_str_src == ASCII_CHAR_PLUS_SIGN) {
+            *p_str_dest = ASCII_CHAR_SPACE;
+             len_copy++;
+        } else {
+            *p_str_dest = *p_str_src;
+             len_copy++;
+        }
+        p_str_src++;
+        p_str_dest++;
+    }
+
+    result = DEF_OK;
+
+
+exit:
+   *p_str_len = len_copy;
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTP_URL_DecodeReplaceStr()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_str       Pointer to the string to scan and replace characters.
+*
+*               p_str_len   Argument used to pass the length of the source string and
+*                               to return the length of the decoded destination string.
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTP_URL_DecodeReplaceStr (CPU_CHAR    *p_str,
+                                        CPU_INT16U  *p_str_len)
+{
+    CPU_CHAR    *p_str_char;
+    CPU_CHAR    *p_str_copy_src;
+    CPU_CHAR    *p_str_copy_dest;
+    CPU_INT32U   len;
+    CPU_INT32U   len_copy;
+    CPU_BOOLEAN  result;
+
+
+    p_str_char =  p_str;
+    len        = *p_str_len;
+
+    p_str[*p_str_len] = ASCII_CHAR_NULL;                        /* Make a sure to create a str.                         */
+
+    while (*p_str_char != ASCII_CHAR_NULL) {
+
+        if (*p_str_char == ASCII_CHAR_PLUS_SIGN) {              /* See Note #1a.                                        */
+            *p_str_char  = ASCII_CHAR_SPACE;
+
+        } else if (*p_str_char == ASCII_CHAR_PERCENTAGE_SIGN) { /* See Note #1b.                                        */
+
+            *p_str_char      = HTTP_StrHexToChar(p_str_char);   /* Convert Hex str to 1 char.                           */
+             if (*p_str_char == ASCII_CHAR_NULL) {
+                  result = DEF_FAIL;
+                  goto exit;
+             }
+             p_str_copy_dest = p_str_char + 1;                  /* Rem str must be moved after the char.                */
+             p_str_copy_src  = p_str_char + 3;                  /* Rem str is located after hex str (3 char).           */
+
+             len_copy = len - 2;
+
+             Str_Copy_N(p_str_copy_dest,                        /* Copy rem str.                                        */
+                        p_str_copy_src,
+                        len_copy);
+
+            *p_str_len -= 2;                                    /* Str has lost 2 char.                                 */
+
+        }
+
+        p_str_char++;                                           /* Move the next char.                                  */
+        len--;
+    }
+
+    result = DEF_OK;
+
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTP_URL_CharEncodeNbr()
+*
+* Description : Calculate number of characters that would be encoded if an URL encoding is performed on the
+*               given string.
+*
+* Argument(s) : p_str_src   Pointer to string that would be encoded.
+*
+*               str_len     Length of string.
+*
+* Return(s)   : Number of character that would be encoded.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  HTTP_URL_CharEncodeNbr (const  CPU_CHAR    *p_str_src,
+                                           CPU_SIZE_T   str_len)
+{
+    CPU_BOOLEAN  alpha_num;
+    CPU_BOOLEAN  unreserved;
+    CPU_INT16U   ctr;
+    CPU_INT16U   len;
+
+
+    ctr = 0u;
+    for (len = 0u; len < str_len; len++) {
+        alpha_num = ASCII_IsAlphaNum(*p_str_src);               /* Check if char is alphabetic or numeric.              */
+
+        switch (*p_str_src) {                                   /* Check if char is an unreserved character.            */
+            case ASCII_CHAR_FULL_STOP:
+            case ASCII_CHAR_HYPHEN_MINUS:
+            case ASCII_CHAR_TILDE:
+            case ASCII_CHAR_LOW_LINE:
+                 unreserved = DEF_YES;
+                 break;
+
+
+            default:
+                 unreserved = DEF_NO;
+                 break;
+        }
+
+        if ((alpha_num  == DEF_NO) &&
+            (unreserved == DEF_NO)) {
+             ctr++;                                             /* Increment number of char to encode.                  */
+        }
+
+        p_str_src++;
+    }
+
+    return (ctr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTP_ChunkTransferWrSize()
+*
+* Description : Write to buffer the chunk size value in hexadecimal representation, plus the CRLF characters.
+*
+* Argument(s) : p_buf_wr    Pointer to buffer in which to write chunk size value.
+*
+*               buf_len     Buffer length remaining.
+*
+*               buf_len_max Maximum buffer length.
+*
+*               size        Chunk size value to write.
+*
+* Return(s)   : Pointer to end of written data in buffer.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *HTTP_ChunkTransferWrSize (CPU_CHAR    *p_buf_wr,
+                                     CPU_SIZE_T   buf_len,
+                                     CPU_SIZE_T   nbr_dig_max,
+                                     CPU_INT16U   size)
+{
+    CPU_CHAR    *p_str;
+    CPU_SIZE_T   size_max;
+
+
+    size_max = nbr_dig_max + STR_CR_LF_LEN;
+
+    if (buf_len < size_max) {
+        return (DEF_NULL);
+    }
+
+    p_str = Str_FmtNbr_Int32U(size,
+                              nbr_dig_max,
+                              DEF_NBR_BASE_HEX,
+                              '0',
+                              DEF_YES,
+                              DEF_NO,
+                              p_buf_wr);
+    if (p_str == DEF_NULL) {
+        return (DEF_NULL);
+    }
+
+    p_str += nbr_dig_max;
+
+    Str_Copy_N(p_str, STR_CR_LF, STR_CR_LF_LEN);
+    if (p_str == DEF_NULL) {
+        return (DEF_NULL);
+    }
+
+    p_str += STR_CR_LF_LEN;
+
+    return (p_str);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTP_StrSizeHexDigReq()
+*
+* Description : Find the number of digital characters needed to represent in hexadecimal the given number.
+*
+* Argument(s) : nbr     Number to convert in hexadecimal.
+*
+* Return(s)   : Number of characters needed for conversion.
+*
+* Caller(s)   : HTTP_ChunkTransferWrSize().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  HTTP_StrSizeHexDigReq (CPU_INT32U  nbr)
+{
+    if (nbr <= 0x000Fu) {
+        return (1);
+
+    } else if (nbr <= 0x00FFu) {
+        return (2);
+
+    } else if(nbr <= 0x0FFFu) {
+        return (3);
+
+    } else if(nbr <= 0xFFFFu) {
+        return (4);
+
+    } else if (nbr <= 0xFFFFFu) {
+        return (5);
+
+    } else if (nbr <= 0xFFFFFFu) {
+        return (6);
+
+    } else if (nbr <= 0xFFFFFFFu) {
+        return (7);
+
+    } else {
+        return (8);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTP_GetContentTypeFromFileExt()
+*
+* Description : Get the HTTP Content Type from the extension of the given filename string.
+*
+* Argument(s) : p_file_path     Pointer to filename string.
+*
+*               path_len_max    Length of the filename string.
+*
+* Return(s)   : HTTP Content Type.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+HTTP_CONTENT_TYPE  HTTP_GetContentTypeFromFileExt (CPU_CHAR   *p_file_path,
+                                                   CPU_SIZE_T  path_len_max)
+{
+    CPU_CHAR    *p_ext;
+    CPU_INT32U   content_type;
+
+
+    p_ext = HTTP_StrFileExtGet(p_file_path, path_len_max);      /* Srch file ext.                                       */
+    if (p_ext == DEF_NULL) {
+        return (HTTP_CONTENT_TYPE_OCTET_STREAM);
+    }
+
+                                                                /* Get content type based on the file ext.              */
+    content_type = HTTP_Dict_KeyGet(HTTP_Dict_FileExt,
+                                    HTTP_Dict_FileExtSize,
+                                    p_ext,
+                                    DEF_YES,
+                                    path_len_max);
+    if (content_type == HTTP_DICT_KEY_INVALID) {
+        return (HTTP_CONTENT_TYPE_OCTET_STREAM);
+    }
+
+    return ((HTTP_CONTENT_TYPE)content_type);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          HTTP_CharToStrHex()
+*
+* Description : Get the hexadecimal code of a ASCII character in form of a string.
+*
+* Argument(s) : character   Character from which to get the hexadecimal code.
+*
+*               p_str_char  Pointer to string that will received the hexademacimal code.
+*
+*                           String will be ASCII_CHAR_NULL in case of error.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTP_URL_EndodeStr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTP_CharToStrHex (CPU_CHAR   character,
+                                 CPU_CHAR  *p_str_char)
+{
+    CPU_CHAR     char_tmp;
+    CPU_INT08U   shift;
+    CPU_INT08U   i;
+
+
+   *p_str_char = ASCII_CHAR_PERCENTAGE_SIGN;
+    p_str_char++;
+
+    shift = DEF_NIBBLE_NBR_BITS;
+
+    for (i = 0; i < 2; i++) {
+        char_tmp = (character >> shift) & 0x0F;
+
+        if (char_tmp <= 0x09) {
+            char_tmp += 0x30;
+        } else if ((char_tmp >= 0x0A) &&
+                   (char_tmp <= 0x0F)) {
+            char_tmp -= 10;
+            char_tmp += 0x41;
+        } else {
+            p_str_char--;
+            p_str_char = ASCII_CHAR_NULL;
+            return;
+        }
+
+        shift     -= DEF_NIBBLE_NBR_BITS;
+       *p_str_char = char_tmp;
+        p_str_char++;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTP_StrHexToChar()
+*
+* Description : Convert an hexadecimal code string to its related ASCII character.
+*
+* Argument(s) : pstr_char   Pointer to string with hexadecimal code to convert.
+*
+* Return(s)   : The ASCII character, if conversion succeeded.
+*
+*               The Null character,  otherwise.
+*
+* Caller(s)   : HTTP_URL_DecodeStr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_CHAR  HTTP_StrHexToChar (const  CPU_CHAR  *p_str_char)
+{
+           CPU_CHAR     char_rtn;
+    const  CPU_CHAR    *p_char;
+           CPU_INT08U   shift;
+           CPU_INT08U   i;
+
+
+    if (*p_str_char != ASCII_CHAR_PERCENTAGE_SIGN) {            /* First char must be '%', See note #1.                 */
+         return (ASCII_CHAR_NULL);
+    }
+
+    p_char   = p_str_char + 1;
+    char_rtn = ASCII_CHAR_NULL;
+    shift    = DEF_NIBBLE_NBR_BITS;
+    for (i = 0; i < 2; i++) {
+        if ((*p_char >= ASCII_CHAR_DIGIT_ZERO) &&
+            (*p_char <= ASCII_CHAR_DIGIT_NINE)) {
+
+            char_rtn += (*p_char - ASCII_CHAR_DIGIT_ZERO);
+
+        } else if ((*p_char >= ASCII_CHAR_LATIN_UPPER_A) &&
+                   (*p_char <= ASCII_CHAR_LATIN_UPPER_F)) {
+
+            char_rtn += (*p_char - ASCII_CHAR_LATIN_UPPER_A) + 10u;
+
+        } else if ((*p_char >= ASCII_CHAR_LATIN_LOWER_A) &&
+                   (*p_char <= ASCII_CHAR_LATIN_LOWER_F)) {
+
+            char_rtn += (*p_char - ASCII_CHAR_LATIN_LOWER_A) + 10u;
+
+        } else {
+            return (ASCII_CHAR_NULL);
+        }
+
+        p_char++;
+        char_rtn <<= shift;                                     /* First char is the upper part of the conv char.       */
+        shift     -= DEF_NIBBLE_NBR_BITS;                       /* Next char is the lower part.                         */
+    }
+
+    return (char_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTP_StrFileExtGet()
+*
+* Description : Get the file extension characters from the given filename.
+*
+* Argument(s) : p_file_name     Pointer to filename string.
+*
+*               path_len        Length of the filename string.
+*
+* Return(s)   : Pointer to begin of the extension in the given filename string.
+*
+* Caller(s)   : HTTP_GetContentTypeFromFileExt().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_CHAR  *HTTP_StrFileExtGet (CPU_CHAR    *p_file_name,
+                                       CPU_SIZE_T   path_len)
+{
+    CPU_CHAR  *p_last_dot;
+
+
+    p_last_dot = Str_Char_Last_N(p_file_name, path_len, ASCII_CHAR_FULL_STOP);
+    if (p_last_dot != DEF_NULL) {
+        p_last_dot++;
+    }
+
+    return (p_last_dot);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http.h
new file mode 100644
index 0000000..65c0959
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http.h
@@ -0,0 +1,593 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                                HTTP
+*
+* Filename      : http.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) The http.c/h files gather defines, data types, structures and functions that are
+*                     common to HTTP client and server.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTP module present pre-processor macro definition.
+*
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTP_MODULE_PRESENT                                   /* See Note #1.                                         */
+#define  HTTP_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         HTTP INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if ((defined(HTTP_MODULE)) && \
+     (defined(HTTP_GLOBALS_EXT)))
+#define  HTTP_EXT
+#else
+#define  HTTP_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       HTTP DEFAUT PORT DEFINES
+*********************************************************************************************************
+*/
+
+#define  HTTP_DFLT_PORT_NBR                    80
+#define  HTTP_DFLT_PORT_NBR_SECURE            443
+
+
+/*
+*********************************************************************************************************
+*                                         URL ENCODING DEFINES
+*********************************************************************************************************
+*/
+
+#define  HTTP_URL_ENCODING_LEN                  3
+#define  HTTP_URL_ENCODING_JUMP                 2
+
+
+/*
+*********************************************************************************************************
+*                                     HEXADECIMAL STRING DEFINE
+*********************************************************************************************************
+*/
+
+#define  HTTP_INT_16U_HEX_STR_LEN_MAX         4u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     TASK CONFIGURATION DATA TYPE
+*
+* Note(s): (1) When the Stack pointer is defined as null pointer (DEF_NULL), the task's stack should be
+*              automatically allowed on the heap of uC/LIB.
+*********************************************************************************************************
+*/
+
+typedef  struct  http_task_cfg {
+    CPU_INT32U   Prio;                                          /* Task priority.                                       */
+    CPU_INT32U   StkSizeBytes;                                  /* Size of the stack.                                   */
+    void        *StkPtr;                                        /* Pointer to base of the stack (see Note #1).          */
+} HTTP_TASK_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                         METHODS ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef enum http_method {
+    HTTP_METHOD_GET,
+    HTTP_METHOD_POST,
+    HTTP_METHOD_HEAD,
+    HTTP_METHOD_PUT,
+    HTTP_METHOD_DELETE,
+    HTTP_METHOD_OPTIONS,
+    HTTP_METHOD_TRACE,
+    HTTP_METHOD_CONNECT,
+    HTTP_METHOD_UNKNOWN
+} HTTP_METHOD;
+
+
+/*
+*********************************************************************************************************
+*                                      STATUS CODES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef enum http_status_code {
+    HTTP_STATUS_OK,
+    HTTP_STATUS_CREATED,
+    HTTP_STATUS_ACCEPTED,
+    HTTP_STATUS_NO_CONTENT,
+    HTTP_STATUS_RESET_CONTENT,
+    HTTP_STATUS_MOVED_PERMANENTLY,
+    HTTP_STATUS_FOUND,
+    HTTP_STATUS_SEE_OTHER,
+    HTTP_STATUS_NOT_MODIFIED,
+    HTTP_STATUS_USE_PROXY,
+    HTTP_STATUS_TEMPORARY_REDIRECT,
+    HTTP_STATUS_BAD_REQUEST,
+    HTTP_STATUS_UNAUTHORIZED,
+    HTTP_STATUS_FORBIDDEN,
+    HTTP_STATUS_NOT_FOUND,
+    HTTP_STATUS_METHOD_NOT_ALLOWED,
+    HTTP_STATUS_NOT_ACCEPTABLE,             /* With the Accept Req Hdr */
+    HTTP_STATUS_REQUEST_TIMEOUT,
+    HTTP_STATUS_CONFLICT,
+    HTTP_STATUS_GONE,
+    HTTP_STATUS_LENGTH_REQUIRED,
+    HTTP_STATUS_PRECONDITION_FAILED,
+    HTTP_STATUS_REQUEST_ENTITY_TOO_LARGE,
+    HTTP_STATUS_REQUEST_URI_TOO_LONG,
+    HTTP_STATUS_UNSUPPORTED_MEDIA_TYPE,
+    HTTP_STATUS_REQUESTED_RANGE_NOT_SATISFIABLE,
+    HTTP_STATUS_EXPECTATION_FAILED,
+    HTTP_STATUS_INTERNAL_SERVER_ERR,
+    HTTP_STATUS_NOT_IMPLEMENTED,
+    HTTP_STATUS_SERVICE_UNAVAILABLE,
+    HTTP_STATUS_HTTP_VERSION_NOT_SUPPORTED,
+    HTTP_STATUS_SWITCHING_PROTOCOLS,
+    HTTP_STATUS_UNKOWN
+} HTTP_STATUS_CODE;
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPS HEADER ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef  enum http_hdr_field {
+    HTTP_HDR_FIELD_UNKNOWN,
+    HTTP_HDR_FIELD_CONTENT_TYPE,
+    HTTP_HDR_FIELD_CONTENT_LEN,
+    HTTP_HDR_FIELD_CONTENT_DISPOSITION,
+    HTTP_HDR_FIELD_HOST,
+    HTTP_HDR_FIELD_LOCATION,
+    HTTP_HDR_FIELD_CONN,
+    HTTP_HDR_FIELD_TRANSFER_ENCODING,
+    HTTP_HDR_FIELD_ACCEPT,
+    HTTP_HDR_FIELD_ACCEPT_CHARSET,
+    HTTP_HDR_FIELD_ACCEPT_ENCODING,
+    HTTP_HDR_FIELD_ACCEPT_LANGUAGE,
+    HTTP_HDR_FIELD_ACCEPT_RANGES,
+    HTTP_HDR_FIELD_AGE,
+    HTTP_HDR_FIELD_ALLOW,
+    HTTP_HDR_FIELD_AUTHORIZATION,
+    HTTP_HDR_FIELD_CONTENT_ENCODING,
+    HTTP_HDR_FIELD_CONTENT_LANGUAGE,
+    HTTP_HDR_FIELD_CONTENT_LOCATION,
+    HTTP_HDR_FIELD_CONTENT_MD5,
+    HTTP_HDR_FIELD_CONTENT_RANGE,
+    HTTP_HDR_FIELD_COOKIE,
+    HTTP_HDR_FIELD_COOKIE2,
+    HTTP_HDR_FIELD_DATE,
+    HTTP_HDR_FIELD_ETAG,
+    HTTP_HDR_FIELD_EXPECT,
+    HTTP_HDR_FIELD_EXPIRES,
+    HTTP_HDR_FIELD_FROM,
+    HTTP_HDR_FIELD_IF_MODIFIED_SINCE,
+    HTTP_HDR_FIELD_IF_MATCH,
+    HTTP_HDR_FIELD_IF_NONE_MATCH,
+    HTTP_HDR_FIELD_IF_RANGE,
+    HTTP_HDR_FIELD_IF_UNMODIFIED_SINCE,
+    HTTP_HDR_FIELD_LAST_MODIFIED,
+    HTTP_HDR_FIELD_RANGE,
+    HTTP_HDR_FIELD_REFERER,
+    HTTP_HDR_FIELD_RETRY_AFTER,
+    HTTP_HDR_FIELD_SERVER,
+    HTTP_HDR_FIELD_SET_COOKIE,
+    HTTP_HDR_FIELD_SET_COOKIE2,
+    HTTP_HDR_FIELD_TE,
+    HTTP_HDR_FIELD_TRAILER,
+    HTTP_HDR_FIELD_UPGRADE,
+    HTTP_HDR_FIELD_USER_AGENT,
+    HTTP_HDR_FIELD_VARY,
+    HTTP_HDR_FIELD_VIA,
+    HTTP_HDR_FIELD_WARNING,
+    HTTP_HDR_FIELD_WWW_AUTHENTICATE,
+    HTTP_HDR_FIELD_WEBSOCKET_KEY,
+    HTTP_HDR_FIELD_WEBSOCKET_ACCEPT,
+    HTTP_HDR_FIELD_WEBSOCKET_VERSION,
+    HTTP_HDR_FIELD_WEBSOCKET_PROTOCOL,
+    HTTP_HDR_FIELD_WEBSOCKET_EXTENSIONS
+} HTTP_HDR_FIELD;
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPS VERSIONS ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef  enum  http_protocol_ver {
+    HTTP_PROTOCOL_VER_0_9,
+    HTTP_PROTOCOL_VER_1_0,
+    HTTP_PROTOCOL_VER_1_1,
+    HTTP_PROTOCOL_VER_UNKNOWN
+} HTTP_PROTOCOL_VER;
+
+
+/*
+*********************************************************************************************************
+*                                      CONTENT TYPES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef enum http_content_type {
+    HTTP_CONTENT_TYPE_UNKNOWN,
+    HTTP_CONTENT_TYPE_NONE,
+    HTTP_CONTENT_TYPE_HTML,
+    HTTP_CONTENT_TYPE_OCTET_STREAM,
+    HTTP_CONTENT_TYPE_PDF,
+    HTTP_CONTENT_TYPE_ZIP,
+    HTTP_CONTENT_TYPE_GIF,
+    HTTP_CONTENT_TYPE_JPEG,
+    HTTP_CONTENT_TYPE_PNG,
+    HTTP_CONTENT_TYPE_JS,
+    HTTP_CONTENT_TYPE_PLAIN,
+    HTTP_CONTENT_TYPE_CSS,
+    HTTP_CONTENT_TYPE_JSON,
+    HTTP_CONTENT_TYPE_APP_FORM,
+    HTTP_CONTENT_TYPE_MULTIPART_FORM,
+    HTTP_CONTENT_TYPE_WEBSOCK_TXT_DATA,
+    HTTP_CONTENT_TYPE_WEBSOCK_BIN_DATA
+} HTTP_CONTENT_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                             CONTENT DISPOSITION TYPE VALUES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef enum http_content_disposition {
+    HTTP_CONTENT_DISPOSITION_FORM_DATA
+} HTTP_CONTENT_DISPOSITION;
+
+
+/*
+*********************************************************************************************************
+*                             HEADER FIELD CONNECTION VALUES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef enum http_hdr_field_conn_val {
+    HTTP_HDR_FIELD_CONN_CLOSE,
+    HTTP_HDR_FIELD_CONN_PERSISTENT,
+    HTTP_HDR_FIELD_CONN_UPGRADE,
+    HTTP_HDR_FIELD_CONN_UNKNOWN
+} HTTP_HDR_FIELD_CONN_VAL;
+
+
+/*
+*********************************************************************************************************
+*                             HEADER FIELD TRANSFER ENCODING VALUES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef enum http_hdr_field_transfer_type {
+    HTTP_HDR_FIELD_TRANSFER_TYPE_NONE,
+    HTTP_HDR_FIELD_TRANSFER_TYPE_CHUNCKED
+} HTTP_HDR_FIELD_TRANSFER_TYPE;
+
+/*
+*********************************************************************************************************
+*                                  HEADER FIELD UPGRADE VALUES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef enum http_hdr_field_upgrade_val {
+    HTTP_HDR_FIELD_UPGRADE_WEBSOCKET
+} HTTP_HDR_FIELD_UPGRADE_VAL;
+
+
+/*
+*********************************************************************************************************
+*                                       FILE TYPES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef  enum http_file_type {
+    HTTP_FILE_TYPE_FS,
+    HTTP_FILE_TYPE_STATIC_DATA
+} HTTP_FILE_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                       BODY TYPES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef  enum http_body_type {
+    HTTP_BODY_TYPE_FS,
+    HTTP_BODY_TYPE_DATA,
+    HTTP_BODY_TYPE_BUF
+} HTTP_BODY_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                     FORM DATA TYPES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef enum  http_form_data_type {
+    HTTP_FORM_DATA_TYPE_CTRL_VAL_QUERY,
+    HTTP_FORM_DATA_TYPE_CTRL_VAL_FORM,
+    HTTP_FORM_DATA_TYPE_FILE
+} HTTP_FORM_DATA_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                            FORM DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  http_form_data  HTTP_FORM_DATA;
+
+struct  http_form_data {
+    HTTP_FORM_DATA_TYPE   DataType;
+    CPU_CHAR             *CtrlNamePtr;
+    CPU_INT16U            CtrlNameLen;
+    CPU_CHAR             *ValPtr;
+    CPU_INT16U            ValLen;
+    HTTP_FORM_DATA       *DataNextPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                                 HTTP HDR FIELD VALUE TYPE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  http_hdr_val_type {
+    HTTP_HDR_VAL_TYPE_NONE,
+    HTTP_HDR_VAL_TYPE_STR_CONST,
+    HTTP_HDR_VAL_TYPE_STR_DYN
+} HTTP_HDR_VAL_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                     HTTP HDR FIELD BLK DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  http_hdr_blk  HTTP_HDR_BLK;
+
+struct  http_hdr_blk {
+    HTTP_HDR_FIELD      HdrField;
+    HTTP_HDR_VAL_TYPE   ValType;
+    void               *ValPtr;
+    CPU_INT32U          ValLen;
+    HTTP_HDR_BLK       *NextPtr;
+    HTTP_HDR_BLK       *PrevPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                              HTTP FORM MULTIPART CONTENT FIELD DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum http_multipart_field {
+    HTTP_MULTIPART_FIELD_NAME,
+    HTTP_MULTIPART_FIELD_FILE_NAME,
+    HTTP_MULTIPART_FIELD_UNKNOWN
+} HTTP_MULTIPART_FIELD;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                MACROS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        HTTP COUNTER MACRO'S
+*
+* Description : Functionality to set and increment statistic and error counter
+*
+* Argument(s) : Various HTTP counter variable(s) & values.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               These macro's are INTERNAL HTTP suite macro's & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if ((HTTPs_CFG_CTR_STAT_EN == DEF_ENABLED) || \
+     (HTTPc_CFG_CTR_STAT_EN == DEF_ENABLED))
+#define  HTTP_SET_PTR_STATS(p_ctr_stats, p_instance)   {                                           \
+                                                           p_ctr_stats = &p_instance->StatsCtr;    \
+                                                       }
+
+#define  HTTP_STATS_INC(p_ctr)                         {                                           \
+                                                            p_ctr++;                               \
+                                                       }
+
+#define  HTTP_STATS_OCTET_INC(p_ctr, octet)            {                                           \
+                                                            p_ctr += octet;                        \
+                                                       }
+
+#else
+                                                                /* Prevent 'variable unused' compiler warning.          */
+#define  HTTP_SET_PTR_STATS(p_ctr_stats, p_instance)   {                                           \
+                                                          (void)&p_ctr_stats;                      \
+                                                       }
+
+#define  HTTP_STATS_INC(p_ctr)
+
+#define  HTTP_STATS_OCTET_INC(p_ctr, octet)
+
+#endif
+
+
+
+#if ((HTTPs_CFG_CTR_ERR_EN == DEF_ENABLED) || \
+     (HTTPc_CFG_CTR_ERR_EN == DEF_ENABLED))
+
+#define  HTTP_SET_PTR_ERRS(p_ctr_err, p_instance)      {                                           \
+                                                            p_ctr_err = &p_instance->ErrsCtr;      \
+                                                       }
+
+#define  HTTP_ERR_INC(p_ctr)                           {                                           \
+                                                            p_ctr++;                               \
+                                                       }
+
+#else
+                                                                 /* Prevent 'variable unused' compiler warning.          */
+#define  HTTP_SET_PTR_ERRS(p_ctr_err, p_instance)      {                                           \
+                                                          (void)&p_ctr_err;                        \
+                                                       }
+
+#define  HTTP_ERR_INC(p_ctr)
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_CHAR           *HTTP_HdrParseFieldValueGet     (       CPU_CHAR          *p_field,
+                                                           CPU_INT16U         field_len,
+                                                           CPU_CHAR          *p_field_end,
+                                                           CPU_INT16U        *p_len_rem);
+
+CPU_CHAR           *HTTP_StrGraphSrchFirst         (       CPU_CHAR          *p_str,
+                                                           CPU_INT32U         str_len);
+
+CPU_BOOLEAN         HTTP_URL_EncodeStr             (const  CPU_CHAR          *p_str_src,
+                                                           CPU_CHAR          *p_str_dest,
+                                                           CPU_SIZE_T        *p_str_len,
+                                                           CPU_SIZE_T         str_len_max);
+
+CPU_BOOLEAN         HTTP_URL_DecodeStr             (const  CPU_CHAR          *p_str_src,
+                                                           CPU_CHAR          *p_str_dest,
+                                                           CPU_SIZE_T        *p_str_lenn);
+
+CPU_BOOLEAN         HTTP_URL_DecodeReplaceStr      (       CPU_CHAR          *p_str,
+                                                           CPU_INT16U        *p_str_len);
+
+CPU_INT16U          HTTP_URL_CharEncodeNbr         (const  CPU_CHAR          *p_str_src,
+                                                           CPU_SIZE_T         str_len);
+
+CPU_CHAR           *HTTP_ChunkTransferWrSize       (       CPU_CHAR          *p_buf_wr,
+                                                           CPU_SIZE_T         buf_len,
+                                                           CPU_SIZE_T         nbr_dig_max,
+                                                           CPU_INT16U         size);
+
+CPU_INT08U          HTTP_StrSizeHexDigReq          (       CPU_INT32U         nbr);
+
+HTTP_CONTENT_TYPE   HTTP_GetContentTypeFromFileExt (       CPU_CHAR          *p_file_path,
+                                                           CPU_SIZE_T         path_len_max);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTP_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http_dict.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http_dict.c
new file mode 100644
index 0000000..c86c6dd
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http_dict.c
@@ -0,0 +1,603 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            HTTP DICTIONARY
+*
+* Filename      : http_dict.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) The http_dict.c/h files gather defines, data types, structures and functions that are
+*                     common to HTTP client and server.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTP_DICT_MODULE
+#include  "http_dict.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             HTTP METHOD
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_Dict_ReqMethod[] = {
+    { HTTP_METHOD_GET,     HTTP_STR_METHOD_GET,     (sizeof(HTTP_STR_METHOD_GET)     - 1) },
+    { HTTP_METHOD_POST,    HTTP_STR_METHOD_POST,    (sizeof(HTTP_STR_METHOD_POST)    - 1) },
+    { HTTP_METHOD_HEAD,    HTTP_STR_METHOD_HEAD,    (sizeof(HTTP_STR_METHOD_HEAD)    - 1) },
+    { HTTP_METHOD_PUT,     HTTP_STR_METHOD_PUT,     (sizeof(HTTP_STR_METHOD_PUT)     - 1) },
+    { HTTP_METHOD_DELETE,  HTTP_STR_METHOD_DELETE,  (sizeof(HTTP_STR_METHOD_DELETE)  - 1) },
+    { HTTP_METHOD_TRACE,   HTTP_STR_METHOD_TRACE,   (sizeof(HTTP_STR_METHOD_TRACE)   - 1) },
+    { HTTP_METHOD_CONNECT, HTTP_STR_METHOD_CONNECT, (sizeof(HTTP_STR_METHOD_CONNECT) - 1) }
+};
+
+CPU_SIZE_T  HTTP_Dict_ReqMethodSize = sizeof(HTTP_Dict_ReqMethod);
+
+
+/*
+*********************************************************************************************************
+*                                            HTTP VERSION
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT   HTTP_Dict_ProtocolVer[] = {
+    { HTTP_PROTOCOL_VER_0_9, HTTP_STR_PROTOCOL_VER_0_9, (sizeof(HTTP_STR_PROTOCOL_VER_0_9) - 1) },
+    { HTTP_PROTOCOL_VER_1_0, HTTP_STR_PROTOCOL_VER_1_0, (sizeof(HTTP_STR_PROTOCOL_VER_1_0) - 1) },
+    { HTTP_PROTOCOL_VER_1_1, HTTP_STR_PROTOCOL_VER_1_1, (sizeof(HTTP_STR_PROTOCOL_VER_1_1) - 1) }
+};
+
+CPU_SIZE_T  HTTP_Dict_ProtocolVerSize = sizeof(HTTP_Dict_ProtocolVer);
+
+
+/*
+*********************************************************************************************************
+*                                          HTTP STATUS CODE
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_Dict_StatusCode[] = {
+    { HTTP_STATUS_OK,                               HTTP_STR_STATUS_CODE_OK,                               (sizeof(HTTP_STR_STATUS_CODE_OK)                              - 1) },
+    { HTTP_STATUS_CREATED,                          HTTP_STR_STATUS_CODE_CREATED,                          (sizeof(HTTP_STR_STATUS_CODE_CREATED)                         - 1) },
+    { HTTP_STATUS_ACCEPTED,                         HTTP_STR_STATUS_CODE_ACCEPTED,                         (sizeof(HTTP_STR_STATUS_CODE_ACCEPTED)                        - 1) },
+    { HTTP_STATUS_NO_CONTENT,                       HTTP_STR_STATUS_CODE_NO_CONTENT,                       (sizeof(HTTP_STR_STATUS_CODE_NO_CONTENT)                      - 1) },
+    { HTTP_STATUS_RESET_CONTENT,                    HTTP_STR_STATUS_CODE_RESET_CONTENT,                    (sizeof(HTTP_STR_STATUS_CODE_RESET_CONTENT)                   - 1) },
+    { HTTP_STATUS_MOVED_PERMANENTLY,                HTTP_STR_STATUS_CODE_MOVED_PERMANENTLY,                (sizeof(HTTP_STR_STATUS_CODE_MOVED_PERMANENTLY)               - 1) },
+    { HTTP_STATUS_FOUND,                            HTTP_STR_STATUS_CODE_FOUND,                            (sizeof(HTTP_STR_STATUS_CODE_FOUND)                           - 1) },
+    { HTTP_STATUS_SEE_OTHER,                        HTTP_STR_STATUS_CODE_SEE_OTHER,                        (sizeof(HTTP_STR_STATUS_CODE_SEE_OTHER)                       - 1) },
+    { HTTP_STATUS_NOT_MODIFIED,                     HTTP_STR_STATUS_CODE_NOT_MODIFIED,                     (sizeof(HTTP_STR_STATUS_CODE_NOT_MODIFIED)                    - 1) },
+    { HTTP_STATUS_USE_PROXY,                        HTTP_STR_STATUS_CODE_USE_PROXY,                        (sizeof(HTTP_STR_STATUS_CODE_USE_PROXY)                       - 1) },
+    { HTTP_STATUS_TEMPORARY_REDIRECT,               HTTP_STR_STATUS_CODE_TEMPORARY_REDIRECT,               (sizeof(HTTP_STR_STATUS_CODE_TEMPORARY_REDIRECT)              - 1) },
+    { HTTP_STATUS_BAD_REQUEST,                      HTTP_STR_STATUS_CODE_BAD_REQUEST,                      (sizeof(HTTP_STR_STATUS_CODE_BAD_REQUEST)                     - 1) },
+    { HTTP_STATUS_UNAUTHORIZED,                     HTTP_STR_STATUS_CODE_UNAUTHORIZED,                     (sizeof(HTTP_STR_STATUS_CODE_UNAUTHORIZED)                    - 1) },
+    { HTTP_STATUS_FORBIDDEN,                        HTTP_STR_STATUS_CODE_FORBIDDEN,                        (sizeof(HTTP_STR_STATUS_CODE_FORBIDDEN)                       - 1) },
+    { HTTP_STATUS_NOT_FOUND,                        HTTP_STR_STATUS_CODE_NOT_FOUND,                        (sizeof(HTTP_STR_STATUS_CODE_NOT_FOUND)                       - 1) },
+    { HTTP_STATUS_METHOD_NOT_ALLOWED,               HTTP_STR_STATUS_CODE_METHOD_NOT_ALLOWED,               (sizeof(HTTP_STR_STATUS_CODE_METHOD_NOT_ALLOWED)              - 1) },
+    { HTTP_STATUS_NOT_ACCEPTABLE,                   HTTP_STR_STATUS_CODE_NOT_ACCEPTABLE,                   (sizeof(HTTP_STR_STATUS_CODE_NOT_ACCEPTABLE)                  - 1) },
+    { HTTP_STATUS_REQUEST_TIMEOUT,                  HTTP_STR_STATUS_CODE_REQUEST_TIMEOUT,                  (sizeof(HTTP_STR_STATUS_CODE_REQUEST_TIMEOUT)                 - 1) },
+    { HTTP_STATUS_CONFLICT,                         HTTP_STR_STATUS_CODE_CONFLIT,                          (sizeof(HTTP_STR_STATUS_CODE_CONFLIT)                         - 1) },
+    { HTTP_STATUS_GONE,                             HTTP_STR_STATUS_CODE_GONE,                             (sizeof(HTTP_STR_STATUS_CODE_GONE)                            - 1) },
+    { HTTP_STATUS_LENGTH_REQUIRED,                  HTTP_STR_STATUS_CODE_LENGTH_REQUIRED,                  (sizeof(HTTP_STR_STATUS_CODE_LENGTH_REQUIRED)                 - 1) },
+    { HTTP_STATUS_PRECONDITION_FAILED,              HTTP_STR_STATUS_CODE_PRECONDITION_FAILED,              (sizeof(HTTP_STR_STATUS_CODE_PRECONDITION_FAILED)             - 1) },
+    { HTTP_STATUS_REQUEST_ENTITY_TOO_LARGE,         HTTP_STR_STATUS_CODE_REQUEST_ENTITY_TOO_LARGE,         (sizeof(HTTP_STR_STATUS_CODE_REQUEST_ENTITY_TOO_LARGE)        - 1) },
+    { HTTP_STATUS_REQUEST_URI_TOO_LONG,             HTTP_STR_STATUS_CODE_REQUEST_URI_TOO_LONG,             (sizeof(HTTP_STR_STATUS_CODE_REQUEST_URI_TOO_LONG)            - 1) },
+    { HTTP_STATUS_UNSUPPORTED_MEDIA_TYPE,           HTTP_STR_STATUS_CODE_UNSUPPORTED_MEDIA_TYPE,           (sizeof(HTTP_STR_STATUS_CODE_UNSUPPORTED_MEDIA_TYPE)          - 1) },
+    { HTTP_STATUS_REQUESTED_RANGE_NOT_SATISFIABLE,  HTTP_STR_STATUS_CODE_REQUESTED_RANGE_NOT_SATISFIABLE,  (sizeof(HTTP_STR_STATUS_CODE_REQUESTED_RANGE_NOT_SATISFIABLE) - 1) },
+    { HTTP_STATUS_EXPECTATION_FAILED,               HTTP_STR_STATUS_CODE_EXPECTATION_FAILED,               (sizeof(HTTP_STR_STATUS_CODE_EXPECTATION_FAILED)              - 1) },
+    { HTTP_STATUS_INTERNAL_SERVER_ERR,              HTTP_STR_STATUS_CODE_INTERNAL_SERVER_ERR,              (sizeof(HTTP_STR_STATUS_CODE_INTERNAL_SERVER_ERR)             - 1) },
+    { HTTP_STATUS_NOT_IMPLEMENTED,                  HTTP_STR_STATUS_CODE_NOT_IMPLEMENTED,                  (sizeof(HTTP_STR_STATUS_CODE_NOT_IMPLEMENTED)                 - 1) },
+    { HTTP_STATUS_SERVICE_UNAVAILABLE,              HTTP_STR_STATUS_CODE_SERVICE_UNAVAILABLE,              (sizeof(HTTP_STR_STATUS_CODE_SERVICE_UNAVAILABLE)             - 1) },
+    { HTTP_STATUS_HTTP_VERSION_NOT_SUPPORTED,       HTTP_STR_STATUS_CODE_HTTP_VERSION_NOT_SUPPORTED,       (sizeof(HTTP_STR_STATUS_CODE_HTTP_VERSION_NOT_SUPPORTED)      - 1) },
+    { HTTP_STATUS_SWITCHING_PROTOCOLS,              HTTP_STR_STATUS_CODE_SWITCHING_PROTOCOLS,              (sizeof(HTTP_STR_STATUS_CODE_SWITCHING_PROTOCOLS)             - 1) }
+};
+
+CPU_SIZE_T  HTTP_Dict_StatusCodeSize = sizeof(HTTP_Dict_StatusCode);
+
+
+/*
+*********************************************************************************************************
+*                                          HTTP REASON PHRASE
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_Dict_ReasonPhrase[] = {
+    { HTTP_STATUS_OK,                               HTTP_STR_REASON_PHRASE_OK,                               (sizeof(HTTP_STR_REASON_PHRASE_OK)                              - 1) },
+    { HTTP_STATUS_CREATED,                          HTTP_STR_REASON_PHRASE_CREATED,                          (sizeof(HTTP_STR_REASON_PHRASE_CREATED)                         - 1) },
+    { HTTP_STATUS_ACCEPTED,                         HTTP_STR_REASON_PHRASE_ACCEPTED,                         (sizeof(HTTP_STR_REASON_PHRASE_ACCEPTED)                        - 1) },
+    { HTTP_STATUS_NO_CONTENT,                       HTTP_STR_REASON_PHRASE_NO_CONTENT,                       (sizeof(HTTP_STR_REASON_PHRASE_NO_CONTENT)                      - 1) },
+    { HTTP_STATUS_RESET_CONTENT,                    HTTP_STR_REASON_PHRASE_RESET_CONTENT,                    (sizeof(HTTP_STR_REASON_PHRASE_RESET_CONTENT)                   - 1) },
+    { HTTP_STATUS_MOVED_PERMANENTLY,                HTTP_STR_REASON_PHRASE_MOVED_PERMANENTLY,                (sizeof(HTTP_STR_REASON_PHRASE_MOVED_PERMANENTLY)               - 1) },
+    { HTTP_STATUS_FOUND,                            HTTP_STR_REASON_PHRASE_FOUND,                            (sizeof(HTTP_STR_REASON_PHRASE_FOUND)                           - 1) },
+    { HTTP_STATUS_SEE_OTHER,                        HTTP_STR_REASON_PHRASE_SEE_OTHER,                        (sizeof(HTTP_STR_REASON_PHRASE_SEE_OTHER)                       - 1) },
+    { HTTP_STATUS_NOT_MODIFIED,                     HTTP_STR_REASON_PHRASE_NOT_MODIFIED,                     (sizeof(HTTP_STR_REASON_PHRASE_NOT_MODIFIED)                    - 1) },
+    { HTTP_STATUS_USE_PROXY,                        HTTP_STR_REASON_PHRASE_USE_PROXY,                        (sizeof(HTTP_STR_REASON_PHRASE_USE_PROXY)                       - 1) },
+    { HTTP_STATUS_TEMPORARY_REDIRECT,               HTTP_STR_REASON_PHRASE_TEMPORARY_REDIRECT,               (sizeof(HTTP_STR_REASON_PHRASE_TEMPORARY_REDIRECT)              - 1) },
+    { HTTP_STATUS_BAD_REQUEST,                      HTTP_STR_REASON_PHRASE_BAD_REQUEST,                      (sizeof(HTTP_STR_REASON_PHRASE_BAD_REQUEST)                     - 1) },
+    { HTTP_STATUS_UNAUTHORIZED,                     HTTP_STR_REASON_PHRASE_UNAUTHORIZED,                     (sizeof(HTTP_STR_REASON_PHRASE_UNAUTHORIZED)                    - 1) },
+    { HTTP_STATUS_FORBIDDEN,                        HTTP_STR_REASON_PHRASE_FORBIDDEN,                        (sizeof(HTTP_STR_REASON_PHRASE_FORBIDDEN)                       - 1) },
+    { HTTP_STATUS_NOT_FOUND,                        HTTP_STR_REASON_PHRASE_NOT_FOUND,                        (sizeof(HTTP_STR_REASON_PHRASE_NOT_FOUND)                       - 1) },
+    { HTTP_STATUS_METHOD_NOT_ALLOWED,               HTTP_STR_REASON_PHRASE_METHOD_NOT_ALLOWED,               (sizeof(HTTP_STR_REASON_PHRASE_METHOD_NOT_ALLOWED)              - 1) },
+    { HTTP_STATUS_NOT_ACCEPTABLE,                   HTTP_STR_REASON_PHRASE_NOT_ACCEPTABLE,                   (sizeof(HTTP_STR_REASON_PHRASE_NOT_ACCEPTABLE)                  - 1) },
+    { HTTP_STATUS_REQUEST_TIMEOUT,                  HTTP_STR_REASON_PHRASE_REQUEST_TIMEOUT,                  (sizeof(HTTP_STR_REASON_PHRASE_REQUEST_TIMEOUT)                 - 1) },
+    { HTTP_STATUS_CONFLICT,                         HTTP_STR_REASON_PHRASE_CONFLICT,                         (sizeof(HTTP_STR_REASON_PHRASE_CONFLICT)                        - 1) },
+    { HTTP_STATUS_GONE,                             HTTP_STR_REASON_PHRASE_GONE,                             (sizeof(HTTP_STR_REASON_PHRASE_GONE)                            - 1) },
+    { HTTP_STATUS_LENGTH_REQUIRED,                  HTTP_STR_REASON_PHRASE_LENGTH_REQUIRED,                  (sizeof(HTTP_STR_REASON_PHRASE_LENGTH_REQUIRED)                 - 1) },
+    { HTTP_STATUS_PRECONDITION_FAILED,              HTTP_STR_REASON_PHRASE_PRECONDITION_FAILED,              (sizeof(HTTP_STR_REASON_PHRASE_PRECONDITION_FAILED)             - 1) },
+    { HTTP_STATUS_REQUEST_ENTITY_TOO_LARGE,         HTTP_STR_REASON_PHRASE_REQUEST_ENTITY_TOO_LARGE,         (sizeof(HTTP_STR_REASON_PHRASE_REQUEST_ENTITY_TOO_LARGE)        - 1) },
+    { HTTP_STATUS_REQUEST_URI_TOO_LONG,             HTTP_STR_REASON_PHRASE_REQUEST_URI_TOO_LONG,             (sizeof(HTTP_STR_REASON_PHRASE_REQUEST_URI_TOO_LONG)            - 1) },
+    { HTTP_STATUS_UNSUPPORTED_MEDIA_TYPE,           HTTP_STR_REASON_PHRASE_UNSUPPORTED_MEDIA_TYPE,           (sizeof(HTTP_STR_REASON_PHRASE_UNSUPPORTED_MEDIA_TYPE)          - 1) },
+    { HTTP_STATUS_REQUESTED_RANGE_NOT_SATISFIABLE,  HTTP_STR_REASON_PHRASE_REQUESTED_RANGE_NOT_SATISFIABLE,  (sizeof(HTTP_STR_REASON_PHRASE_REQUESTED_RANGE_NOT_SATISFIABLE) - 1) },
+    { HTTP_STATUS_EXPECTATION_FAILED,               HTTP_STR_REASON_PHRASE_EXPECTATION_FAILED,               (sizeof(HTTP_STR_REASON_PHRASE_EXPECTATION_FAILED)              - 1) },
+    { HTTP_STATUS_INTERNAL_SERVER_ERR,              HTTP_STR_REASON_PHRASE_INTERNAL_SERVER_ERR,              (sizeof(HTTP_STR_REASON_PHRASE_INTERNAL_SERVER_ERR)             - 1) },
+    { HTTP_STATUS_NOT_IMPLEMENTED,                  HTTP_STR_REASON_PHRASE_NOT_IMPLEMENTED,                  (sizeof(HTTP_STR_REASON_PHRASE_NOT_IMPLEMENTED)                 - 1) },
+    { HTTP_STATUS_SERVICE_UNAVAILABLE,              HTTP_STR_REASON_PHRASE_SERVICE_UNAVAILABLE,              (sizeof(HTTP_STR_REASON_PHRASE_SERVICE_UNAVAILABLE)             - 1) },
+    { HTTP_STATUS_HTTP_VERSION_NOT_SUPPORTED,       HTTP_STR_REASON_PHRASE_HTTP_VERSION_NOT_SUPPORTED,       (sizeof(HTTP_STR_REASON_PHRASE_HTTP_VERSION_NOT_SUPPORTED)      - 1) },
+    { HTTP_STATUS_SWITCHING_PROTOCOLS,              HTTP_STR_REASON_PHRASE_SWITCHING_PROTOCOLS,              (sizeof(HTTP_STR_REASON_PHRASE_SWITCHING_PROTOCOLS)             - 1) }
+};
+
+CPU_SIZE_T  HTTP_Dict_ReasonPhraseSize = sizeof(HTTP_Dict_ReasonPhrase);
+
+
+/*
+*********************************************************************************************************
+*                                          HTTP FILE EXTENSION
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_Dict_FileExt[] = {
+    { HTTP_CONTENT_TYPE_HTML,         HTTP_STR_FILE_EXT_HTM,      (sizeof(HTTP_STR_FILE_EXT_HTM)      - 1) },
+    { HTTP_CONTENT_TYPE_HTML,         HTTP_STR_FILE_EXT_HTML,     (sizeof(HTTP_STR_FILE_EXT_HTML)     - 1) },
+    { HTTP_CONTENT_TYPE_GIF,          HTTP_STR_FILE_EXT_GIF,      (sizeof(HTTP_STR_FILE_EXT_GIF)      - 1) },
+    { HTTP_CONTENT_TYPE_JPEG,         HTTP_STR_FILE_EXT_JPEG,     (sizeof(HTTP_STR_FILE_EXT_JPEG)     - 1) },
+    { HTTP_CONTENT_TYPE_JPEG,         HTTP_STR_FILE_EXT_JPG,      (sizeof(HTTP_STR_FILE_EXT_JPG)      - 1) },
+    { HTTP_CONTENT_TYPE_PNG,          HTTP_STR_FILE_EXT_PNG,      (sizeof(HTTP_STR_FILE_EXT_PNG)      - 1) },
+    { HTTP_CONTENT_TYPE_JS,           HTTP_STR_FILE_EXT_JS,       (sizeof(HTTP_STR_FILE_EXT_JS)       - 1) },
+    { HTTP_CONTENT_TYPE_PLAIN,        HTTP_STR_FILE_EXT_TXT,      (sizeof(HTTP_STR_FILE_EXT_TXT)      - 1) },
+    { HTTP_CONTENT_TYPE_CSS,          HTTP_STR_FILE_EXT_CSS,      (sizeof(HTTP_STR_FILE_EXT_CSS)      - 1) },
+    { HTTP_CONTENT_TYPE_PDF,          HTTP_STR_FILE_EXT_PDF,      (sizeof(HTTP_STR_FILE_EXT_PDF)      - 1) },
+    { HTTP_CONTENT_TYPE_ZIP,          HTTP_STR_FILE_EXT_ZIP,      (sizeof(HTTP_STR_FILE_EXT_ZIP)      - 1) },
+    { HTTP_CONTENT_TYPE_OCTET_STREAM, HTTP_STR_FILE_EXT_ASTERISK, (sizeof(HTTP_STR_FILE_EXT_ASTERISK) - 1) },
+    { HTTP_CONTENT_TYPE_OCTET_STREAM, HTTP_STR_FILE_EXT_CLASS,    (sizeof(HTTP_STR_FILE_EXT_CLASS)    - 1) }
+};
+
+CPU_SIZE_T  HTTP_Dict_FileExtSize = sizeof(HTTP_Dict_FileExt);
+
+
+/*
+*********************************************************************************************************
+*                                         HTTP MIME CONTENT TYPE
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_Dict_ContentType[] = {
+    { HTTP_CONTENT_TYPE_HTML,            HTTP_STR_CONTENT_TYPE_HTML,            (sizeof(HTTP_STR_CONTENT_TYPE_HTML)           - 1) },
+    { HTTP_CONTENT_TYPE_GIF,             HTTP_STR_CONTENT_TYPE_GIF,             (sizeof(HTTP_STR_CONTENT_TYPE_GIF)            - 1) },
+    { HTTP_CONTENT_TYPE_JPEG,            HTTP_STR_CONTENT_TYPE_JPEG,            (sizeof(HTTP_STR_CONTENT_TYPE_JPEG)           - 1) },
+    { HTTP_CONTENT_TYPE_PNG,             HTTP_STR_CONTENT_TYPE_PNG,             (sizeof(HTTP_STR_CONTENT_TYPE_PNG)            - 1) },
+    { HTTP_CONTENT_TYPE_JS,              HTTP_STR_CONTENT_TYPE_JS,              (sizeof(HTTP_STR_CONTENT_TYPE_JS)             - 1) },
+    { HTTP_CONTENT_TYPE_PLAIN,           HTTP_STR_CONTENT_TYPE_PLAIN,           (sizeof(HTTP_STR_CONTENT_TYPE_PLAIN)          - 1) },
+    { HTTP_CONTENT_TYPE_CSS,             HTTP_STR_CONTENT_TYPE_CSS,             (sizeof(HTTP_STR_CONTENT_TYPE_CSS)            - 1) },
+    { HTTP_CONTENT_TYPE_OCTET_STREAM,    HTTP_STR_CONTENT_TYPE_OCTET_STREAM,    (sizeof(HTTP_STR_CONTENT_TYPE_OCTET_STREAM)   - 1) },
+    { HTTP_CONTENT_TYPE_PDF,             HTTP_STR_CONTENT_TYPE_PDF,             (sizeof(HTTP_STR_CONTENT_TYPE_PDF)            - 1) },
+    { HTTP_CONTENT_TYPE_ZIP,             HTTP_STR_CONTENT_TYPE_ZIP,             (sizeof(HTTP_STR_CONTENT_TYPE_ZIP)            - 1) },
+    { HTTP_CONTENT_TYPE_JSON,            HTTP_STR_CONTENT_TYPE_JSON,            (sizeof(HTTP_STR_CONTENT_TYPE_JSON)           - 1) },
+    { HTTP_CONTENT_TYPE_APP_FORM,        HTTP_STR_CONTENT_TYPE_APP_FORM,        (sizeof(HTTP_STR_CONTENT_TYPE_APP_FORM)       - 1) },
+    { HTTP_CONTENT_TYPE_MULTIPART_FORM,  HTTP_STR_CONTENT_TYPE_MULTIPART_FORM,  (sizeof(HTTP_STR_CONTENT_TYPE_MULTIPART_FORM) - 1) }
+};
+
+CPU_SIZE_T  HTTP_Dict_ContentTypeSize = sizeof(HTTP_Dict_ContentType);
+
+
+/*
+*********************************************************************************************************
+*                                          HTTP HEADER FIELD
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_Dict_HdrField[] = {
+    { HTTP_HDR_FIELD_CONTENT_TYPE,         HTTP_STR_HDR_FIELD_CONTENT_TYPE,         (sizeof(HTTP_STR_HDR_FIELD_CONTENT_TYPE)        - 1) },
+    { HTTP_HDR_FIELD_CONTENT_LEN,          HTTP_STR_HDR_FIELD_CONTENT_LEN,          (sizeof(HTTP_STR_HDR_FIELD_CONTENT_LEN)         - 1) },
+    { HTTP_HDR_FIELD_CONTENT_DISPOSITION,  HTTP_STR_HDR_FIELD_CONTENT_DISPOSITION,  (sizeof(HTTP_STR_HDR_FIELD_CONTENT_DISPOSITION) - 1) },
+    { HTTP_HDR_FIELD_HOST,                 HTTP_STR_HDR_FIELD_HOST,                 (sizeof(HTTP_STR_HDR_FIELD_HOST)                - 1) },
+    { HTTP_HDR_FIELD_LOCATION,             HTTP_STR_HDR_FIELD_LOCATION,             (sizeof(HTTP_STR_HDR_FIELD_LOCATION)            - 1) },
+    { HTTP_HDR_FIELD_CONN,                 HTTP_STR_HDR_FIELD_CONN,                 (sizeof(HTTP_STR_HDR_FIELD_CONN)                - 1) },
+    { HTTP_HDR_FIELD_TRANSFER_ENCODING,    HTTP_STR_HDR_FIELD_TRANSFER_ENCODING,    (sizeof(HTTP_STR_HDR_FIELD_TRANSFER_ENCODING)   - 1) },
+    { HTTP_HDR_FIELD_ACCEPT,               HTTP_STR_HDR_FIELD_ACCEPT,               (sizeof(HTTP_STR_HDR_FIELD_ACCEPT)              - 1) },
+    { HTTP_HDR_FIELD_ACCEPT_CHARSET,       HTTP_STR_HDR_FIELD_ACCEPT_CHARSET,       (sizeof(HTTP_STR_HDR_FIELD_ACCEPT_CHARSET)      - 1) },
+    { HTTP_HDR_FIELD_ACCEPT_ENCODING,      HTTP_STR_HDR_FIELD_ACCEPT_ENCODING,      (sizeof(HTTP_STR_HDR_FIELD_ACCEPT_ENCODING)     - 1) },
+    { HTTP_HDR_FIELD_ACCEPT_LANGUAGE,      HTTP_STR_HDR_FIELD_ACCEPT_LANGUAGE,      (sizeof(HTTP_STR_HDR_FIELD_ACCEPT_LANGUAGE)     - 1) },
+    { HTTP_HDR_FIELD_ACCEPT_RANGES,        HTTP_STR_HDR_FIELD_ACCEPT_RANGES,        (sizeof(HTTP_STR_HDR_FIELD_ACCEPT_RANGES)       - 1) },
+    { HTTP_HDR_FIELD_AGE,                  HTTP_STR_HDR_FIELD_AGE,                  (sizeof(HTTP_STR_HDR_FIELD_AGE)                 - 1) },
+    { HTTP_HDR_FIELD_ALLOW,                HTTP_STR_HDR_FIELD_ALLOW,                (sizeof(HTTP_STR_HDR_FIELD_ALLOW)               - 1) },
+    { HTTP_HDR_FIELD_AUTHORIZATION,        HTTP_STR_HDR_FIELD_AUTHORIZATION,        (sizeof(HTTP_STR_HDR_FIELD_AUTHORIZATION)       - 1) },
+    { HTTP_HDR_FIELD_CONTENT_ENCODING,     HTTP_STR_HDR_FIELD_CONTENT_ENCODING,     (sizeof(HTTP_STR_HDR_FIELD_CONTENT_ENCODING)    - 1) },
+    { HTTP_HDR_FIELD_CONTENT_LANGUAGE,     HTTP_STR_HDR_FIELD_CONTENT_LANGUAGE,     (sizeof(HTTP_STR_HDR_FIELD_CONTENT_LANGUAGE)    - 1) },
+    { HTTP_HDR_FIELD_CONTENT_LOCATION,     HTTP_STR_HDR_FIELD_CONTENT_LOCATION,     (sizeof(HTTP_STR_HDR_FIELD_CONTENT_LOCATION)    - 1) },
+    { HTTP_HDR_FIELD_CONTENT_MD5,          HTTP_STR_HDR_FIELD_CONTENT_MD5,          (sizeof(HTTP_STR_HDR_FIELD_CONTENT_MD5)         - 1) },
+    { HTTP_HDR_FIELD_CONTENT_RANGE,        HTTP_STR_HDR_FIELD_CONTENT_RANGE,        (sizeof(HTTP_STR_HDR_FIELD_CONTENT_RANGE)       - 1) },
+    { HTTP_HDR_FIELD_COOKIE,               HTTP_STR_HDR_FIELD_COOKIE,               (sizeof(HTTP_STR_HDR_FIELD_COOKIE)              - 1) },
+    { HTTP_HDR_FIELD_COOKIE2,              HTTP_STR_HDR_FIELD_COOKIE2,              (sizeof(HTTP_STR_HDR_FIELD_COOKIE2)             - 1) },
+    { HTTP_HDR_FIELD_DATE,                 HTTP_STR_HDR_FIELD_DATE,                 (sizeof(HTTP_STR_HDR_FIELD_DATE)                - 1) },
+    { HTTP_HDR_FIELD_ETAG,                 HTTP_STR_HDR_FIELD_ETAG,                 (sizeof(HTTP_STR_HDR_FIELD_ETAG)                - 1) },
+    { HTTP_HDR_FIELD_EXPECT,               HTTP_STR_HDR_FIELD_EXPECT,               (sizeof(HTTP_STR_HDR_FIELD_EXPECT)              - 1) },
+    { HTTP_HDR_FIELD_EXPIRES,              HTTP_STR_HDR_FIELD_EXPIRES,              (sizeof(HTTP_STR_HDR_FIELD_EXPIRES)             - 1) },
+    { HTTP_HDR_FIELD_FROM,                 HTTP_STR_HDR_FIELD_FROM,                 (sizeof(HTTP_STR_HDR_FIELD_FROM)                - 1) },
+    { HTTP_HDR_FIELD_IF_MODIFIED_SINCE,    HTTP_STR_HDR_FIELD_IF_MODIFIED_SINCE,    (sizeof(HTTP_STR_HDR_FIELD_IF_MODIFIED_SINCE)   - 1) },
+    { HTTP_HDR_FIELD_IF_MATCH,             HTTP_STR_HDR_FIELD_IF_MATCH,             (sizeof(HTTP_STR_HDR_FIELD_IF_MATCH)            - 1) },
+    { HTTP_HDR_FIELD_IF_NONE_MATCH,        HTTP_STR_HDR_FIELD_IF_NONE_MATCH,        (sizeof(HTTP_STR_HDR_FIELD_IF_NONE_MATCH)       - 1) },
+    { HTTP_HDR_FIELD_IF_RANGE,             HTTP_STR_HDR_FIELD_IF_RANGE,             (sizeof(HTTP_STR_HDR_FIELD_IF_RANGE)            - 1) },
+    { HTTP_HDR_FIELD_IF_UNMODIFIED_SINCE,  HTTP_STR_HDR_FIELD_IF_UNMODIFIED_SINCE,  (sizeof(HTTP_STR_HDR_FIELD_IF_UNMODIFIED_SINCE) - 1) },
+    { HTTP_HDR_FIELD_LAST_MODIFIED,        HTTP_STR_HDR_FIELD_LAST_MODIFIED,        (sizeof(HTTP_STR_HDR_FIELD_LAST_MODIFIED)       - 1) },
+    { HTTP_HDR_FIELD_RANGE,                HTTP_STR_HDR_FIELD_RANGE,                (sizeof(HTTP_STR_HDR_FIELD_RANGE)               - 1) },
+    { HTTP_HDR_FIELD_REFERER,              HTTP_STR_HDR_FIELD_REFERER,              (sizeof(HTTP_STR_HDR_FIELD_REFERER)             - 1) },
+    { HTTP_HDR_FIELD_RETRY_AFTER,          HTTP_STR_HDR_FIELD_RETRY_AFTER,          (sizeof(HTTP_STR_HDR_FIELD_RETRY_AFTER)         - 1) },
+    { HTTP_HDR_FIELD_SERVER,               HTTP_STR_HDR_FIELD_SERVER,               (sizeof(HTTP_STR_HDR_FIELD_SERVER)              - 1) },
+    { HTTP_HDR_FIELD_SET_COOKIE,           HTTP_STR_HDR_FIELD_SET_COOKIE,           (sizeof(HTTP_STR_HDR_FIELD_SET_COOKIE)          - 1) },
+    { HTTP_HDR_FIELD_SET_COOKIE2,          HTTP_STR_HDR_FIELD_SET_COOKIE2,          (sizeof(HTTP_STR_HDR_FIELD_SET_COOKIE2)         - 1) },
+    { HTTP_HDR_FIELD_TE,                   HTTP_STR_HDR_FIELD_TE,                   (sizeof(HTTP_STR_HDR_FIELD_TE)                  - 1) },
+    { HTTP_HDR_FIELD_TRAILER,              HTTP_STR_HDR_FIELD_TRAILER,              (sizeof(HTTP_STR_HDR_FIELD_TRAILER)             - 1) },
+    { HTTP_HDR_FIELD_UPGRADE,              HTTP_STR_HDR_FIELD_UPGRADE,              (sizeof(HTTP_STR_HDR_FIELD_UPGRADE)             - 1) },
+    { HTTP_HDR_FIELD_USER_AGENT,           HTTP_STR_HDR_FIELD_USER_AGENT,           (sizeof(HTTP_STR_HDR_FIELD_USER_AGENT)          - 1) },
+    { HTTP_HDR_FIELD_VARY,                 HTTP_STR_HDR_FIELD_VARY,                 (sizeof(HTTP_STR_HDR_FIELD_VARY)                - 1) },
+    { HTTP_HDR_FIELD_VIA,                  HTTP_STR_HDR_FIELD_VIA,                  (sizeof(HTTP_STR_HDR_FIELD_VIA)                 - 1) },
+    { HTTP_HDR_FIELD_WARNING,              HTTP_STR_HDR_FIELD_WARNING,              (sizeof(HTTP_STR_HDR_FIELD_WARNING)             - 1) },
+    { HTTP_HDR_FIELD_WWW_AUTHENTICATE,     HTTP_STR_HDR_FIELD_WWW_AUTHENTICATE,     (sizeof(HTTP_STR_HDR_FIELD_WWW_AUTHENTICATE)    - 1) },
+    { HTTP_HDR_FIELD_WEBSOCKET_KEY,        HTTP_STR_HDR_FIELD_WEBSOCKET_KEY,        (sizeof(HTTP_STR_HDR_FIELD_WEBSOCKET_KEY)       - 1) },
+    { HTTP_HDR_FIELD_WEBSOCKET_ACCEPT,     HTTP_STR_HDR_FIELD_WEBSOCKET_ACCEPT,     (sizeof(HTTP_STR_HDR_FIELD_WEBSOCKET_ACCEPT)    - 1) },
+    { HTTP_HDR_FIELD_WEBSOCKET_VERSION,    HTTP_STR_HDR_FIELD_WEBSOCKET_VERSION,    (sizeof(HTTP_STR_HDR_FIELD_WEBSOCKET_VERSION)   - 1) },
+    { HTTP_HDR_FIELD_WEBSOCKET_PROTOCOL,   HTTP_STR_HDR_FIELD_WEBSOCKET_PROTOCOL,   (sizeof(HTTP_STR_HDR_FIELD_WEBSOCKET_PROTOCOL)  - 1) },
+    { HTTP_HDR_FIELD_WEBSOCKET_EXTENSIONS, HTTP_STR_HDR_FIELD_WEBSOCKET_EXTENSIONS, (sizeof(HTTP_STR_HDR_FIELD_WEBSOCKET_EXTENSIONS)- 1) }
+};
+
+CPU_SIZE_T  HTTP_Dict_HdrFieldSize = sizeof(HTTP_Dict_HdrField);
+
+
+/*
+*********************************************************************************************************
+*                                      HTTP CONTENT DISPOSITION VALUE
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_DictContentDispositionVal[] = {
+    { HTTP_CONTENT_DISPOSITION_FORM_DATA,  HTTP_STR_CONTENT_DISPOSITION_FORM_DATA,  (sizeof(HTTP_STR_CONTENT_DISPOSITION_FORM_DATA)  - 1)}
+};
+
+CPU_SIZE_T  HTTP_Dict_ContentDispositionValSize = sizeof(HTTP_DictContentDispositionVal);
+
+
+/*
+*********************************************************************************************************
+*                                        HTTP CONNECTION VALUE
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_Dict_HdrFieldConnVal[] = {
+    { HTTP_HDR_FIELD_CONN_CLOSE,      HTTP_STR_HDR_FIELD_CONN_CLOSE,      (sizeof(HTTP_STR_HDR_FIELD_CONN_CLOSE)      - 1)},
+    { HTTP_HDR_FIELD_CONN_PERSISTENT, HTTP_STR_HDR_FIELD_CONN_KEEP_ALIVE, (sizeof(HTTP_STR_HDR_FIELD_CONN_KEEP_ALIVE) - 1)},
+    { HTTP_HDR_FIELD_CONN_UPGRADE,    HTTP_STR_HDR_FIELD_CONN_UPGRADE,    (sizeof(HTTP_STR_HDR_FIELD_CONN_UPGRADE)    - 1)}
+};
+
+CPU_SIZE_T  HTTP_Dict_HdrFieldConnValSize = sizeof(HTTP_Dict_HdrFieldConnVal);
+
+
+/*
+*********************************************************************************************************
+*                                   HTTP TRANSFER ENCODING VALUE
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_Dict_HdrFieldTransferTypeVal[] = {
+    { HTTP_HDR_FIELD_TRANSFER_TYPE_CHUNCKED, HTTP_STR_HDR_FIELD_CHUNKED, (sizeof(HTTP_STR_HDR_FIELD_CHUNKED)   - 1) }
+};
+
+CPU_SIZE_T  HTTP_Dict_HdrFieldTransferTypeValSize = sizeof(HTTP_Dict_HdrFieldTransferTypeVal);
+
+
+/*
+*********************************************************************************************************
+*                                  HTTP FORM MULTIPART CONTENT FIELD
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_Dict_MultipartField[] = {
+    { HTTP_MULTIPART_FIELD_NAME,      HTTP_STR_MULTIPART_FIELD_NAME,      (sizeof(HTTP_STR_MULTIPART_FIELD_NAME)      - 1) },
+    { HTTP_MULTIPART_FIELD_FILE_NAME, HTTP_STR_MULTIPART_FIELD_FILE_NAME, (sizeof(HTTP_STR_MULTIPART_FIELD_FILE_NAME) - 1) }
+};
+
+CPU_SIZE_T  HTTP_Dict_MultipartFieldSize = sizeof(HTTP_Dict_MultipartField);
+
+
+/*
+*********************************************************************************************************
+*                                        HTTP UPGRADE VALUE
+*********************************************************************************************************
+*/
+
+const  HTTP_DICT  HTTP_Dict_HdrFieldUpgradeVal[] = {
+    { HTTP_HDR_FIELD_UPGRADE_WEBSOCKET, HTTP_STR_HDR_FIELD_UPGRADE_WEBSOCKET, (sizeof(HTTP_STR_HDR_FIELD_UPGRADE_WEBSOCKET) - 1)},
+};
+
+CPU_SIZE_T  HTTP_Dict_HdrFieldUpgradeValSize = sizeof(HTTP_Dict_HdrFieldUpgradeVal);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         HTTP_Dict_KeyGet()
+*
+* Description : Get the HTTP dictionary key associated with a string entry by comparing given string with
+*               dictionary string entries.
+*
+* Argument(s) : p_dict_tbl    Pointer to the HTTP dictionary.
+*
+*               dict_size     Size of the given HTTP dictionary in octet.
+*
+*               p_str_cmp     Pointer to the string use for comparison.
+*
+*               str_len       String's length.
+*
+* Return(s)   : Key,                if string found within dictionary.
+*               Invalid key number, otherwise.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  HTTP_Dict_KeyGet (const  HTTP_DICT    *p_dict_tbl,
+                                     CPU_INT32U    dict_size,
+                              const  CPU_CHAR     *p_str_cmp,
+                                     CPU_BOOLEAN   case_sensitive,
+                                     CPU_INT32U    str_len)
+{
+    CPU_INT32U   nbr_entry;
+    CPU_INT32U   ix;
+    CPU_INT32U   len;
+    CPU_INT16S   cmp;
+    HTTP_DICT   *p_srch;
+
+
+    nbr_entry =  dict_size / sizeof(HTTP_DICT);
+    p_srch    = (HTTP_DICT *)p_dict_tbl;
+    for (ix = 0; ix < nbr_entry; ix++) {
+        len = DEF_MIN(str_len, p_srch->StrLen);
+        if (case_sensitive == DEF_YES) {
+            cmp = Str_Cmp_N(p_str_cmp, p_srch->StrPtr, len);
+            if (cmp == 0) {
+                return (p_srch->Key);
+            }
+        } else {
+            cmp = Str_CmpIgnoreCase_N(p_str_cmp, p_srch->StrPtr, len);
+            if (cmp == 0) {
+                return (p_srch->Key);
+            }
+        }
+
+        p_srch++;
+    }
+
+    return (HTTP_DICT_KEY_INVALID);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTP_Dict_EntryGet()
+*
+* Description : Get an HTTP dictionary entry object from a dictionary key entry.
+*
+* Argument(s) : p_dict_tbl    Pointer to the HTTP dictionary.
+*
+*               dict_size     Size of the given HTTP dictionary in octet.
+*
+*               key           Dictionary key entry.
+*
+* Return(s)   : Pointer to the dictionary entry object.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+HTTP_DICT  *HTTP_Dict_EntryGet (const  HTTP_DICT   *p_dict_tbl,
+                                       CPU_INT32U   dict_size,
+                                       CPU_INT32U   key)
+{
+    HTTP_DICT  *p_entry;
+    CPU_INT32U        nbr_entry;
+    CPU_INT32U        ix;
+
+
+    nbr_entry =  dict_size / sizeof(HTTP_DICT);
+    p_entry   = (HTTP_DICT *)p_dict_tbl;
+    for (ix = 0; ix < nbr_entry; ix++) {                        /* Srch until last entry is reached.                    */
+        if (p_entry->Key == key) {                              /* If keys match ...                                    */
+            return (p_entry);                                   /* ... the first entry is found.                        */
+        }
+
+        p_entry++;                                              /* Move to next entry.                                  */
+    }
+
+
+    return (DEF_NULL);                                          /* No entry found.                                      */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTP_Dict_ValCopy()
+*
+* Description : Copy dictionary entry string to destination string buffer, up to a maximum number of characters.
+*
+* Argument(s) : p_dict        Pointer to the HTTP dictionary.
+*
+*               dict_size     Size of the given HTTP dictionary in octet.
+*
+*               key           Dictionary key entry.
+*
+*               p_buf         Pointer to destination string buffer where string will be copied.
+*
+*               buf_len       Maximum number of characters to copy.
+*
+* Return(s)   : Pointer to the end of the value copied, if value successfully copied.
+*               Pointer to NULL,                        otherwise.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *HTTP_Dict_ValCopy (const  HTTP_DICT   *p_dict_tbl,
+                                     CPU_INT32U   dict_size,
+                                     CPU_INT32U   key,
+                                     CPU_CHAR    *p_buf,
+                                     CPU_SIZE_T   buf_len)
+{
+    const  HTTP_DICT  *p_entry;
+           CPU_CHAR   *p_str_rtn;
+
+
+    p_entry = &p_dict_tbl[key];
+    if (p_entry->Key != key) {                                  /* If entry key doesn't match dictionary key ...        */
+        p_entry = HTTP_Dict_EntryGet(p_dict_tbl,                /* ... get first entry that match the    key.           */
+                                     dict_size,
+                                     key);
+        if (p_entry == DEF_NULL) {
+            return ((CPU_CHAR *)0);
+        }
+    }
+
+
+    if ((p_entry->StrLen == 0u)       ||                        /* Validate entry value.                                */
+        (p_entry->StrPtr == DEF_NULL)) {
+         return ((CPU_CHAR *)0);
+    }
+
+    if (p_entry->StrLen > buf_len) {                            /* Validate value len and buf len.                      */
+        return ((CPU_CHAR *)0);
+    }
+
+
+   (void)Str_Copy_N(p_buf, p_entry->StrPtr, p_entry->StrLen);   /* Copy string to the buffer.                           */
+
+    p_str_rtn = p_buf + p_entry->StrLen;                        /* Set ptr to return.                                   */
+
+    return (p_str_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTP_Dict_StrKeySrch()
+*
+* Description : (1) Search string for first occurrence of a specific dictionary key, up to a maximum number
+*                   of characters:
+*
+*                   (a) Validate pointers
+*                   (b) Set dictionary entry
+*                   (c) Search for string
+*
+*
+* Argument(s) : p_dict_tbl    Pointer to the HTTP dictionary.
+*
+*               dict_size     Size of the given HTTP dictionary in octet.
+*
+*               key           Dictionary key entry.
+*
+*               p_str         Pointer to string to found in entry.
+*
+*               str_len       Maximum number of characters to search.
+*
+* Return(s)   : Pointer to first occurrence of search string key, if any.
+*               Pointer to NULL,                                  otherwise.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *HTTP_Dict_StrKeySrch (const  HTTP_DICT   *p_dict_tbl,
+                                             CPU_INT32U   dict_size,
+                                             CPU_INT32U   key,
+                                      const  CPU_CHAR    *p_str,
+                                             CPU_SIZE_T   str_len)
+{
+    const  HTTP_DICT  *p_entry;
+           CPU_CHAR   *p_found;
+
+                                                                /* ------------------ VALIDATE PTRS ------------------- */
+    if ((p_str      == DEF_NULL) ||
+        (p_dict_tbl == DEF_NULL)) {
+         return ((CPU_CHAR *)0);
+    }
+
+
+                                                                /* --------------- SET DICTIONARY ENTRY --------------- */
+    p_entry = &p_dict_tbl[key];
+    if (p_entry->Key != key) {                                  /* If entry key doesn't match dictionary key ...        */
+        p_entry  = HTTP_Dict_EntryGet(p_dict_tbl,               /* ... get first entry that match the    key.           */
+                                      dict_size,
+                                      key);
+        if (p_entry == DEF_NULL) {
+            return ((CPU_CHAR *)0);
+        }
+    }
+
+                                                                /* ----------------- SRCH FOR STRING ------------------ */
+    p_found = Str_Str_N(p_str, p_entry->StrPtr, str_len);
+
+
+    return (p_found);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http_dict.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http_dict.h
new file mode 100644
index 0000000..0d16303
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Common/http_dict.h
@@ -0,0 +1,477 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            HTTP DICTIONARY
+*
+* Filename      : http_dict.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) The http_dict.c/h files gather defines, data types, structures and functions that are
+*                     common to HTTP client and server.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTP module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTP_DICT_MODULE_PRESENT                               /* See Note #1.                                         */
+#define  HTTP_DICT_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         HTTP INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "http.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             HTTP METHOD
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_METHOD_GET                               "GET"
+#define  HTTP_STR_METHOD_POST                              "POST"
+#define  HTTP_STR_METHOD_HEAD                              "HEAD"
+#define  HTTP_STR_METHOD_PUT                               "PUT"
+#define  HTTP_STR_METHOD_DELETE                            "DELETE"
+#define  HTTP_STR_METHOD_TRACE                             "TRACE"
+#define  HTTP_STR_METHOD_CONNECT                           "CONNECT"
+
+
+/*
+*********************************************************************************************************
+*                                            HTTP VERSION
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_PROTOCOL_VER_0_9                     "HTTP/0.9"
+#define  HTTP_STR_PROTOCOL_VER_1_0                     "HTTP/1.0"
+#define  HTTP_STR_PROTOCOL_VER_1_1                     "HTTP/1.1"
+
+
+/*
+*********************************************************************************************************
+*                                           HTTP STATUS CODE
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_STATUS_CODE_SWITCHING_PROTOCOLS                "101"
+#define  HTTP_STR_STATUS_CODE_OK                                 "200"
+#define  HTTP_STR_STATUS_CODE_CREATED                            "201"
+#define  HTTP_STR_STATUS_CODE_ACCEPTED                           "202"
+#define  HTTP_STR_STATUS_CODE_NO_CONTENT                         "204"
+#define  HTTP_STR_STATUS_CODE_RESET_CONTENT                      "205"
+#define  HTTP_STR_STATUS_CODE_MOVED_PERMANENTLY                  "301"
+#define  HTTP_STR_STATUS_CODE_FOUND                              "302"
+#define  HTTP_STR_STATUS_CODE_SEE_OTHER                          "303"
+#define  HTTP_STR_STATUS_CODE_NOT_MODIFIED                       "304"
+#define  HTTP_STR_STATUS_CODE_USE_PROXY                          "305"
+#define  HTTP_STR_STATUS_CODE_TEMPORARY_REDIRECT                 "307"
+#define  HTTP_STR_STATUS_CODE_BAD_REQUEST                        "400"
+#define  HTTP_STR_STATUS_CODE_UNAUTHORIZED                       "401"
+#define  HTTP_STR_STATUS_CODE_FORBIDDEN                          "403"
+#define  HTTP_STR_STATUS_CODE_NOT_FOUND                          "404"
+#define  HTTP_STR_STATUS_CODE_METHOD_NOT_ALLOWED                 "405"
+#define  HTTP_STR_STATUS_CODE_NOT_ACCEPTABLE                     "406"
+#define  HTTP_STR_STATUS_CODE_REQUEST_TIMEOUT                    "408"
+#define  HTTP_STR_STATUS_CODE_CONFLIT                            "409"
+#define  HTTP_STR_STATUS_CODE_GONE                               "410"
+#define  HTTP_STR_STATUS_CODE_LENGTH_REQUIRED                    "411"
+#define  HTTP_STR_STATUS_CODE_PRECONDITION_FAILED                "412"
+#define  HTTP_STR_STATUS_CODE_REQUEST_ENTITY_TOO_LARGE           "413"
+#define  HTTP_STR_STATUS_CODE_REQUEST_URI_TOO_LONG               "414"
+#define  HTTP_STR_STATUS_CODE_UNSUPPORTED_MEDIA_TYPE             "415"
+#define  HTTP_STR_STATUS_CODE_REQUESTED_RANGE_NOT_SATISFIABLE    "416"
+#define  HTTP_STR_STATUS_CODE_EXPECTATION_FAILED                 "417"
+#define  HTTP_STR_STATUS_CODE_INTERNAL_SERVER_ERR                "500"
+#define  HTTP_STR_STATUS_CODE_NOT_IMPLEMENTED                    "501"
+#define  HTTP_STR_STATUS_CODE_SERVICE_UNAVAILABLE                "503"
+#define  HTTP_STR_STATUS_CODE_HTTP_VERSION_NOT_SUPPORTED         "505"
+
+/*
+*********************************************************************************************************
+*                                          HTTP REASON PHRASE
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_REASON_PHRASE_OK                               "OK"
+#define  HTTP_STR_REASON_PHRASE_CREATED                          "Created"
+#define  HTTP_STR_REASON_PHRASE_ACCEPTED                         "Accepted"
+#define  HTTP_STR_REASON_PHRASE_NO_CONTENT                       "No Content"
+#define  HTTP_STR_REASON_PHRASE_RESET_CONTENT                    "Reset Content"
+#define  HTTP_STR_REASON_PHRASE_MOVED_PERMANENTLY                "Moved Permanently"
+#define  HTTP_STR_REASON_PHRASE_FOUND                            "Found"
+#define  HTTP_STR_REASON_PHRASE_SEE_OTHER                        "See Other"
+#define  HTTP_STR_REASON_PHRASE_NOT_MODIFIED                     "Not Modified"
+#define  HTTP_STR_REASON_PHRASE_USE_PROXY                        "Use Proxy"
+#define  HTTP_STR_REASON_PHRASE_TEMPORARY_REDIRECT               "Temporary Redirect"
+#define  HTTP_STR_REASON_PHRASE_BAD_REQUEST                      "Bad Request"
+#define  HTTP_STR_REASON_PHRASE_UNAUTHORIZED                     "Unauthorized"
+#define  HTTP_STR_REASON_PHRASE_FORBIDDEN                        "Forbidden"
+#define  HTTP_STR_REASON_PHRASE_NOT_FOUND                        "Not Found"
+#define  HTTP_STR_REASON_PHRASE_METHOD_NOT_ALLOWED               "Method Not Allowed"
+#define  HTTP_STR_REASON_PHRASE_NOT_ACCEPTABLE                   "Not Acceptable"
+#define  HTTP_STR_REASON_PHRASE_REQUEST_TIMEOUT                  "Request Timeout"
+#define  HTTP_STR_REASON_PHRASE_CONFLICT                         "Conflict"
+#define  HTTP_STR_REASON_PHRASE_GONE                             "Gone"
+#define  HTTP_STR_REASON_PHRASE_LENGTH_REQUIRED                  "Length Required"
+#define  HTTP_STR_REASON_PHRASE_PRECONDITION_FAILED              "Precondition Failed"
+#define  HTTP_STR_REASON_PHRASE_REQUEST_ENTITY_TOO_LARGE         "Request Entity Too Large"
+#define  HTTP_STR_REASON_PHRASE_REQUEST_URI_TOO_LONG             "Request URI Too Long"
+#define  HTTP_STR_REASON_PHRASE_UNSUPPORTED_MEDIA_TYPE           "Unsupported Media Type"
+#define  HTTP_STR_REASON_PHRASE_REQUESTED_RANGE_NOT_SATISFIABLE  "Requested Range Not Satisfiable"
+#define  HTTP_STR_REASON_PHRASE_EXPECTATION_FAILED               "Expectation Failed"
+#define  HTTP_STR_REASON_PHRASE_INTERNAL_SERVER_ERR              "Internal Server Error"
+#define  HTTP_STR_REASON_PHRASE_NOT_IMPLEMENTED                  "Not Implemented"
+#define  HTTP_STR_REASON_PHRASE_BAD_GATEWAY                      "Bad Gateway"
+#define  HTTP_STR_REASON_PHRASE_SERVICE_UNAVAILABLE              "Service Unavailable"
+#define  HTTP_STR_REASON_PHRASE_HTTP_VERSION_NOT_SUPPORTED       "HTTP Version Not Supported"
+#define  HTTP_STR_REASON_PHRASE_SWITCHING_PROTOCOLS              "Switching Protocols"
+
+
+/*
+*********************************************************************************************************
+*                                          HTTP FILE EXTENSION
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_FILE_EXT_HTM                             "htm"
+#define  HTTP_STR_FILE_EXT_HTML                            "html"
+#define  HTTP_STR_FILE_EXT_GIF                             "gif"
+#define  HTTP_STR_FILE_EXT_JPEG                            "jpeg"
+#define  HTTP_STR_FILE_EXT_JPG                             "jpg"
+#define  HTTP_STR_FILE_EXT_PNG                             "png"
+#define  HTTP_STR_FILE_EXT_JS                              "js"
+#define  HTTP_STR_FILE_EXT_TXT                             "txt"
+#define  HTTP_STR_FILE_EXT_CSS                             "css"
+#define  HTTP_STR_FILE_EXT_PDF                             "pdf"
+#define  HTTP_STR_FILE_EXT_ZIP                             "zip"
+#define  HTTP_STR_FILE_EXT_ASTERISK                        "*"
+#define  HTTP_STR_FILE_EXT_CLASS                           "class"
+
+
+/*
+*********************************************************************************************************
+*                                         HTTP MIME CONTENT TYPE
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_CONTENT_TYPE_HTML                        "text/html"
+#define  HTTP_STR_CONTENT_TYPE_GIF                         "image/gif"
+#define  HTTP_STR_CONTENT_TYPE_JPEG                        "image/jpeg"
+#define  HTTP_STR_CONTENT_TYPE_PNG                         "image/png"
+#define  HTTP_STR_CONTENT_TYPE_JS                          "text/javascript"
+#define  HTTP_STR_CONTENT_TYPE_PLAIN                       "text/plain"
+#define  HTTP_STR_CONTENT_TYPE_CSS                         "text/css"
+#define  HTTP_STR_CONTENT_TYPE_OCTET_STREAM                "application/octet-stream"
+#define  HTTP_STR_CONTENT_TYPE_PDF                         "application/pdf"
+#define  HTTP_STR_CONTENT_TYPE_ZIP                         "application/zip"
+#define  HTTP_STR_CONTENT_TYPE_JSON                        "application/json"
+#define  HTTP_STR_CONTENT_TYPE_APP_FORM                    "application/x-www-form-urlencoded"
+#define  HTTP_STR_CONTENT_TYPE_MULTIPART_FORM              "multipart/form-data"
+
+
+/*
+*********************************************************************************************************
+*                                          MULTIPART BOUNDARY
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_MULTIPART_BOUNDARY                    "boundary"
+#define  HTTP_STR_MULTIPART_BOUNDARY_LEN                (sizeof(HTTP_STR_MULTIPART_BOUNDARY) - 1)
+
+
+/*
+*********************************************************************************************************
+*                                          HTTP HEADER FIELD
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_HDR_FIELD_CONN                           "Connection"
+#define  HTTP_STR_HDR_FIELD_HOST                           "Host"
+#define  HTTP_STR_HDR_FIELD_LOCATION                       "Location"
+#define  HTTP_STR_HDR_FIELD_CONTENT_TYPE                   "Content-Type"
+#define  HTTP_STR_HDR_FIELD_CONTENT_LEN                    "Content-Length"
+#define  HTTP_STR_HDR_FIELD_CONTENT_DISPOSITION            "Content-Disposition"
+#define  HTTP_STR_HDR_FIELD_TRANSFER_ENCODING              "Transfer-Encoding"
+#define  HTTP_STR_HDR_FIELD_ACCEPT                         "Accept"
+#define  HTTP_STR_HDR_FIELD_ACCEPT_CHARSET                 "Accept-Charset"
+#define  HTTP_STR_HDR_FIELD_ACCEPT_ENCODING                "Accept-Encoding"
+#define  HTTP_STR_HDR_FIELD_ACCEPT_LANGUAGE                "Accept-Language"
+#define  HTTP_STR_HDR_FIELD_ACCEPT_RANGES                  "Accept-Ranges"
+#define  HTTP_STR_HDR_FIELD_AGE                            "Age"
+#define  HTTP_STR_HDR_FIELD_ALLOW                          "Allow"
+#define  HTTP_STR_HDR_FIELD_AUTHORIZATION                  "Authorization"
+#define  HTTP_STR_HDR_FIELD_CONTENT_ENCODING               "Content-Encoding"
+#define  HTTP_STR_HDR_FIELD_CONTENT_LANGUAGE               "Content-Language"
+#define  HTTP_STR_HDR_FIELD_CONTENT_LOCATION               "Content-Location"
+#define  HTTP_STR_HDR_FIELD_CONTENT_MD5                    "Content-MD5"
+#define  HTTP_STR_HDR_FIELD_CONTENT_RANGE                  "Content-Range"
+#define  HTTP_STR_HDR_FIELD_COOKIE                         "Cookie"
+#define  HTTP_STR_HDR_FIELD_COOKIE2                        "Cookie2"
+#define  HTTP_STR_HDR_FIELD_DATE                           "Date"
+#define  HTTP_STR_HDR_FIELD_ETAG                           "ETag"
+#define  HTTP_STR_HDR_FIELD_EXPECT                         "Expect"
+#define  HTTP_STR_HDR_FIELD_EXPIRES                        "Expires"
+#define  HTTP_STR_HDR_FIELD_FROM                           "From"
+#define  HTTP_STR_HDR_FIELD_IF_MODIFIED_SINCE              "If-Modified-Since"
+#define  HTTP_STR_HDR_FIELD_IF_MATCH                       "If-Match"
+#define  HTTP_STR_HDR_FIELD_IF_NONE_MATCH                  "If-None-Match"
+#define  HTTP_STR_HDR_FIELD_IF_RANGE                       "If-Range"
+#define  HTTP_STR_HDR_FIELD_IF_UNMODIFIED_SINCE            "If-Unmodified-Since"
+#define  HTTP_STR_HDR_FIELD_LAST_MODIFIED                  "Last-Modified"
+#define  HTTP_STR_HDR_FIELD_RANGE                          "Range"
+#define  HTTP_STR_HDR_FIELD_REFERER                        "Referer"
+#define  HTTP_STR_HDR_FIELD_RETRY_AFTER                    "Retry-After"
+#define  HTTP_STR_HDR_FIELD_SERVER                         "Server"
+#define  HTTP_STR_HDR_FIELD_SET_COOKIE                     "Set-Cookie"
+#define  HTTP_STR_HDR_FIELD_SET_COOKIE2                    "Set-Cookie2"
+#define  HTTP_STR_HDR_FIELD_TE                             "TE"
+#define  HTTP_STR_HDR_FIELD_TRAILER                        "Trailer"
+#define  HTTP_STR_HDR_FIELD_UPGRADE                        "Upgrade"
+#define  HTTP_STR_HDR_FIELD_USER_AGENT                     "User-Agent"
+#define  HTTP_STR_HDR_FIELD_VARY                           "Vary"
+#define  HTTP_STR_HDR_FIELD_VIA                            "Via"
+#define  HTTP_STR_HDR_FIELD_WARNING                        "Warning"
+#define  HTTP_STR_HDR_FIELD_WWW_AUTHENTICATE               "WWW-Authenticate"
+#define  HTTP_STR_HDR_FIELD_WEBSOCKET_KEY                  "Sec-WebSocket-Key"
+#define  HTTP_STR_HDR_FIELD_WEBSOCKET_ACCEPT               "Sec-WebSocket-Accept"
+#define  HTTP_STR_HDR_FIELD_WEBSOCKET_VERSION              "Sec-WebSocket-Version"
+#define  HTTP_STR_HDR_FIELD_WEBSOCKET_PROTOCOL             "Sec-WebSocket-Protocol"
+#define  HTTP_STR_HDR_FIELD_WEBSOCKET_EXTENSIONS           "Sec-WebSocket-Extensions"
+
+                                                                /* Len of Hdr Field string names in Request messages     */
+#define  HTTP_STR_HDR_FIELD_CONN_LEN                       (sizeof(HTTP_STR_HDR_FIELD_CONN)                - 1)
+#define  HTTP_STR_HDR_FIELD_HOST_LEN                       (sizeof(HTTP_STR_HDR_FIELD_HOST)                - 1)
+#define  HTTP_STR_HDR_FIELD_LOCATION_LEN                   (sizeof(HTTP_STR_HDR_FIELD_LOCATION)            - 1)
+#define  HTTP_STR_HDR_FIELD_CONTENT_TYPE_LEN               (sizeof(HTTP_STR_HDR_FIELD_CONTENT_TYPE)        - 1)
+#define  HTTP_STR_HDR_FIELD_CONTENT_LEN_LEN                (sizeof(HTTP_STR_HDR_FIELD_CONTENT_LEN)         - 1)
+#define  HTTP_STR_HDR_FIELD_CONTENT_DISPOSITION_LEN        (sizeof(HTTP_STR_HDR_FIELD_CONTENT_DISPOSITION) - 1)
+#define  HTTP_STR_HDR_FIELD_TRANSFER_ENCODING_LEN          (sizeof(HTTP_STR_HDR_FIELD_TRANSFER_ENCODING)   - 1)
+#define  HTTP_STR_HDR_FIELD_ACCEPT_LEN                     (sizeof(HTTP_STR_HDR_FIELD_ACCEPT)              - 1)
+#define  HTTP_STR_HDR_FIELD_ACCEPT_CHARSET_LEN             (sizeof(HTTP_STR_HDR_FIELD_ACCEPT_CHARSET)      - 1)
+#define  HTTP_STR_HDR_FIELD_ACCEPT_ENCODING_LEN            (sizeof(HTTP_STR_HDR_FIELD_ACCEPT_ENCODING)     - 1)
+#define  HTTP_STR_HDR_FIELD_ACCEPT_LANGUAGE_LEN            (sizeof(HTTP_STR_HDR_FIELD_ACCEPT_LANGUAGE)     - 1)
+#define  HTTP_STR_HDR_FIELD_AUTHORIZATION_LEN              (sizeof(HTTP_STR_HDR_FIELD_AUTHORIZATION)       - 1)
+#define  HTTP_STR_HDR_FIELD_CLIENT_IP_LEN                  (sizeof(HTTP_STR_HDR_FIELD_CLIENT_IP)           - 1)
+#define  HTTP_STR_HDR_FIELD_COOKIE_LEN                     (sizeof(HTTP_STR_HDR_FIELD_COOKIE)              - 1)
+#define  HTTP_STR_HDR_FIELD_COOKIE2_LEN                    (sizeof(HTTP_STR_HDR_FIELD_COOKIE2)             - 1)
+#define  HTTP_STR_HDR_FIELD_DATE_LEN                       (sizeof(HTTP_STR_HDR_FIELD_DATE)                - 1)
+#define  HTTP_STR_HDR_FIELD_EXPECT_LEN                     (sizeof(HTTP_STR_HDR_FIELD_EXPECT)              - 1)
+#define  HTTP_STR_HDR_FIELD_FROM_LEN                       (sizeof(HTTP_STR_HDR_FIELD_FROM)                - 1)
+#define  HTTP_STR_HDR_FIELD_IF_MODIFIED_SINCE_LEN          (sizeof(HTTP_STR_HDR_FIELD_IF_MODIFIED_SINCE)   - 1)
+#define  HTTP_STR_HDR_FIELD_IF_MATCH_LEN                   (sizeof(HTTP_STR_HDR_FIELD_IF_MATCH)            - 1)
+#define  HTTP_STR_HDR_FIELD_IF_NONE_MATCH_LEN              (sizeof(HTTP_STR_HDR_FIELD_IF_NONE_MATCH)       - 1)
+#define  HTTP_STR_HDR_FIELD_IF_RANGE_LEN                   (sizeof(HTTP_STR_HDR_FIELD_IF_RANGE)            - 1)
+#define  HTTP_STR_HDR_FIELD_IF_UNMODIFIED_SINCE_LEN        (sizeof(HTTP_STR_HDR_FIELD_IF_UNMODIFIED_SINCE) - 1)
+#define  HTTP_STR_HDR_FIELD_RANGE_LEN                      (sizeof(HTTP_STR_HDR_FIELD_RANGE)               - 1)
+#define  HTTP_STR_HDR_FIELD_REFERER_LEN                    (sizeof(HTTP_STR_HDR_FIELD_REFERER)             - 1)
+#define  HTTP_STR_HDR_FIELD_TE_LEN                         (sizeof(HTTP_STR_HDR_FIELD_TE)                  - 1)
+#define  HTTP_STR_HDR_FIELD_UPGRADE_LEN                    (sizeof(HTTP_STR_HDR_FIELD_UPGRADE)             - 1)
+#define  HTTP_STR_HDR_FIELD_USER_AGENT_LEN                 (sizeof(HTTP_STR_HDR_FIELD_USER_AGENT)          - 1)
+#define  HTTP_STR_HDR_FIELD_VIA_LEN                        (sizeof(HTTP_STR_HDR_FIELD_VIA)                 - 1)
+#define  HTTP_STR_HDR_FIELD_WARNING_LEN                    (sizeof(HTTP_STR_HDR_FIELD_WARNING)             - 1)
+#define  HTTP_STR_HDR_FIELD_WWW_AUTHENTICATE_LEN           (sizeof(HTTP_STR_HDR_FIELD_WWW_AUTHENTICATE)    - 1)
+#define  HTTP_STR_HDR_FIELD_WEBSOCKET_KEY_LEN              (sizeof(HTTP_STR_HDR_FIELD_WEBSOCKET_KEY)       - 1)
+#define  HTTP_STR_HDR_FIELD_WEBSOCKET_ACCEPT_LEN           (sizeof(HTTP_STR_HDR_FIELD_WEBSOCKET_ACCEPT)    - 1)
+#define  HTTP_STR_HDR_FIELD_WEBSOCKET_VERSION_LEN          (sizeof(HTTP_STR_HDR_FIELD_WEBSOCKET_VERSION)   - 1)
+#define  HTTP_STR_HDR_FIELD_WEBSOCKET_PROTOCOL_LEN         (sizeof(HTTP_STR_HDR_FIELD_WEBSOCKET_PROTOCOL)  - 1)
+#define  HTTP_STR_HDR_FIELD_WEBSOCKET_EXTENSIONS_LEN       (sizeof(HTTP_STR_HDR_FIELD_WEBSOCKET_EXTENSIONS)- 1)
+
+
+/*
+*********************************************************************************************************
+*                                      HTTP CONTENT DISPOSITION VALUE
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_CONTENT_DISPOSITION_FORM_DATA        "form-data"
+#define  HTTP_STR_CONTENT_DISPOSITION_FORM_DATA_LEN     (sizeof(HTTP_STR_CONTENT_DISPOSITION_FORM_DATA) - 1)
+
+
+/*
+*********************************************************************************************************
+*                                        HTTP CONNECTION VALUE
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_HDR_FIELD_CONN_CLOSE                 "close"
+#define  HTTP_STR_HDR_FIELD_CONN_KEEP_ALIVE            "keep-alive"
+#define  HTTP_STR_HDR_FIELD_CONN_UPGRADE               "Upgrade"
+
+
+/*
+*********************************************************************************************************
+*                                   HTTP TRANSFER ENCODING VALUE
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_HDR_FIELD_CHUNKED                     "chunked"
+#define  HTTP_STR_BUF_TOP_SPACE_REQ_MIN                        6
+#define  HTTP_STR_BUF_END_SPACE_REQ_MIN                        2
+
+
+/*
+*********************************************************************************************************
+*                                  HTTP FORM MULTIPART CONTENT FIELD
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_MULTIPART_FIELD_NAME                     "name"
+#define  HTTP_STR_MULTIPART_FIELD_FILE_NAME                "filename"
+
+#define  HTTP_STR_MULTIPART_FIELD_NAME_LEN                  (sizeof(HTTP_STR_MULTIPART_FIELD_NAME)      - 1)
+#define  HTTP_STR_MULTIPART_FIELD_FILE_NAME_LEN             (sizeof(HTTP_STR_MULTIPART_FIELD_FILE_NAME) - 1)
+
+
+/*
+*********************************************************************************************************
+*                                        HTTP UPGRADE VALUE
+*********************************************************************************************************
+*/
+
+#define  HTTP_STR_HDR_FIELD_UPGRADE_WEBSOCKET              "websocket"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  HTTP_DICT_KEY;
+
+#define  HTTP_DICT_KEY_INVALID                       DEF_INT_32U_MAX_VAL
+
+
+typedef  struct  HTTP_dict {
+    const  HTTP_DICT_KEY   Key;
+    const  CPU_CHAR       *StrPtr;
+    const  CPU_INT32U      StrLen;
+} HTTP_DICT;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  HTTP_DICT     HTTP_Dict_ReqMethod[];
+extern  const  HTTP_DICT     HTTP_Dict_ProtocolVer[];
+extern  const  HTTP_DICT     HTTP_Dict_StatusCode[];
+extern  const  HTTP_DICT     HTTP_Dict_ReasonPhrase[];
+extern  const  HTTP_DICT     HTTP_Dict_FileExt[];
+extern  const  HTTP_DICT     HTTP_Dict_ContentType[];
+extern  const  HTTP_DICT     HTTP_Dict_HdrField[];
+extern  const  HTTP_DICT     HTTP_DictContentDispositionVal[];
+extern  const  HTTP_DICT     HTTP_Dict_HdrFieldConnVal[];
+extern  const  HTTP_DICT     HTTP_Dict_HdrFieldTransferTypeVal[];
+extern  const  HTTP_DICT     HTTP_Dict_MultipartField[];
+extern  const  HTTP_DICT     HTTP_Dict_HdrFieldUpgradeVal[];
+
+extern         CPU_SIZE_T    HTTP_Dict_ReqMethodSize;
+extern         CPU_SIZE_T    HTTP_Dict_ProtocolVerSize;
+extern         CPU_SIZE_T    HTTP_Dict_StatusCodeSize;
+extern         CPU_SIZE_T    HTTP_Dict_ReasonPhraseSize;
+extern         CPU_SIZE_T    HTTP_Dict_FileExtSize;
+extern         CPU_SIZE_T    HTTP_Dict_ContentTypeSize;
+extern         CPU_SIZE_T    HTTP_Dict_HdrFieldSize;
+extern         CPU_SIZE_T    HTTP_Dict_ContentDispositionValSize;
+extern         CPU_SIZE_T    HTTP_Dict_HdrFieldConnValSize;
+extern         CPU_SIZE_T    HTTP_Dict_HdrFieldTransferTypeValSize;
+extern         CPU_SIZE_T    HTTP_Dict_MultipartFieldSize;
+extern         CPU_SIZE_T    HTTP_Dict_HdrFieldUpgradeValSize;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_INT32U   HTTP_Dict_KeyGet      (const  HTTP_DICT   *p_dict_tbl,
+                                           CPU_INT32U   dict_size,
+                                    const  CPU_CHAR    *p_str_cmp,
+                                           CPU_BOOLEAN  case_sensitive,
+                                           CPU_INT32U   str_len);
+
+HTTP_DICT   *HTTP_Dict_EntryGet    (const  HTTP_DICT   *p_dict_tbl,
+                                           CPU_INT32U   dict_size,
+                                           CPU_INT32U   key);
+
+CPU_CHAR    *HTTP_Dict_ValCopy     (const  HTTP_DICT   *p_dict_tbl,
+                                           CPU_INT32U   dict_size,
+                                           CPU_INT32U   key,
+                                           CPU_CHAR    *p_buf,
+                                           CPU_SIZE_T   buf_len);
+
+CPU_CHAR    *HTTP_Dict_StrKeySrch  (const  HTTP_DICT   *p_dict_tbl,
+                                           CPU_INT32U   dict_size,
+                                           CPU_INT32U   key,
+                                    const  CPU_CHAR    *p_str,
+                                           CPU_SIZE_T   str_len);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTP_DICT_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/Auth/http-s_auth.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/Auth/http-s_auth.c
new file mode 100644
index 0000000..6eceef2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/Auth/http-s_auth.c
@@ -0,0 +1,1337 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTPs AUTHENTIFICATION MODULE
+*
+* Filename      : http-s_auth.c
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : None.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+#include "http-s_auth.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_AUTH_SESSION_RELEASE_TIMEOUT_MS           10
+#define  HTTPs_AUTH_SESSION_TIMEOUT_MIN                  1
+#define  HTTPs_AUTH_SESSION_TIMEOUT_SEC             (HTTPs_AUTH_SESSION_TIMEOUT_MIN * DEF_TIME_NBR_SEC_PER_MIN)
+
+#define  HTTPs_AUTH_USER_LOGGED_MAX_NBR                  3
+
+#define  HTTPs_AUTH_COOKIE_TAG_NAME_SESSION_ID           "session_id"
+#define  HTTPs_AUTH_COOKIE_TAG_NAME_MAX_VALUE            "Max-Value"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_AUTH_HOOKS HTTPsAuth_CookieHooksCfg = {
+        DEF_NULL,
+        HTTPsAuth_OnHdrRx,
+        HTTPsAuth_OnAuth,
+        HTTPsAuth_OnHdrTx,
+        HTTPsAuth_OnTransComplete,
+        HTTPsAuth_OnConnClose
+};
+
+
+HTTPs_CTRL_LAYER_APP_HOOKS HTTPsAuth_AppUnprotectedCookieHooksCfg = {
+        HTTPsAuth_InitSessionPool,
+        DEF_NULL,
+        HTTPsAuth_ReqUnprotected,
+        DEF_NULL,
+        HTTPsAuth_ReqRdyUnprotected,
+        DEF_NULL,
+        HTTPsAuth_OnHdrTx,
+        DEF_NULL,
+        DEF_NULL,
+        HTTPsAuth_OnTransComplete,
+        DEF_NULL,
+        HTTPsAuth_OnConnClose
+};
+
+
+HTTPs_CTRL_LAYER_APP_HOOKS HTTPsAuth_AppProtectedCookieHooksCfg = {
+        DEF_NULL,
+        DEF_NULL,
+        HTTPsAuth_ReqProtected,
+        DEF_NULL,
+        HTTPsAuth_ReqRdyProtected,
+        DEF_NULL,
+        HTTPsAuth_OnHdrTx,
+        DEF_NULL,
+        DEF_NULL,
+        HTTPsAuth_OnTransComplete,
+        DEF_NULL,
+        HTTPsAuth_OnConnClose
+};
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef struct https_auth_session HTTPs_AUTH_SESSION;
+
+struct https_auth_session {
+    CPU_INT16U           SessionID;
+    AUTH_USER            User;
+    CLK_TS_SEC           ExpireTS;
+    HTTPs_AUTH_RESULT    Result;
+    HTTPs_AUTH_SESSION  *NextPtr;
+    HTTPs_AUTH_SESSION  *PrevPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  MEM_DYN_POOL         HTTPsAuth_SessionPool;
+static  HTTPs_AUTH_SESSION  *HTTPsAuth_SessionFirstPtr;
+static  KAL_TMR_HANDLE       HTTPsAuth_SesssionTmr;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+static  CPU_INT16U            HTTPsAuth_SetCookieStr           (       CPU_CHAR            *p_cookie_tag,
+                                                                       CPU_CHAR            *p_cookie_value,
+                                                                       CPU_CHAR            *p_buf,
+                                                                       CPU_INT16U           buf_len,
+                                                                       CPU_BOOLEAN          nul);
+#endif
+
+static   void                 HTTPsAuth_Redirect               (const  HTTPs_INSTANCE      *p_instance,
+                                                                       HTTPs_CONN          *p_conn,
+                                                                const  CPU_CHAR            *p_uri);
+
+static   HTTPs_AUTH_SESSION  *HTTPsAuth_SessionRetrieveFromHdr (const  HTTPs_INSTANCE      *p_instance,
+                                                                       HTTPs_CONN          *p_conn);
+
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+static   HTTPs_AUTH_SESSION  *HTTPsAuth_SessionComputeFromHdr  (       HTTPs_HDR_BLK       *p_cookie_blk);
+
+static  HTTPs_AUTH_SESSION   *HTTPsAuth_SessionSrch            (       CPU_INT16U           session_id);
+#endif
+
+
+static  HTTPs_AUTH_SESSION   *HTTPsAuth_SessionGet             (void);
+
+static  void                  HTTPsAuth_SessionRelease         (       HTTPs_AUTH_SESSION  *p_session);
+
+static  void                  HTTPsAuth_SessionReleaseTmr      (       void                *p_arg);
+
+static  CPU_INT32U            HTTPsAuth_SessionGenerateID      (       CPU_INT32U           seed);
+
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPsAuth_InitSessionPool()
+*
+* Description : Initialize the session pool.
+*
+* Argument(s) : p_instance  Pointer to HTTPs Instance object.
+*
+*               p_hook_cfg  Pointer to hook configuration.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsAuth_AppCookieHooksCfg.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsAuth_InitSessionPool (const  HTTPs_INSTANCE  *p_instance,
+                                        const  void            *p_hook_cfg)
+{
+    KAL_TMR_EXT_CFG  tmr_cfg;
+    LIB_ERR          err_lib;
+    RTOS_ERR         err_rtos;
+
+
+                                                                /* Create the session memory pool.                      */
+    Mem_DynPoolCreate("HTTPs Instance Session Pool",
+                      &HTTPsAuth_SessionPool,
+                       DEF_NULL,
+                       sizeof(HTTPs_AUTH_SESSION),
+                       sizeof(CPU_ALIGN),
+                       HTTPs_AUTH_USER_LOGGED_MAX_NBR,
+                       HTTPs_AUTH_USER_LOGGED_MAX_NBR,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* Set the first pointer to NULL which indicate ...     */
+    HTTPsAuth_SessionFirstPtr = DEF_NULL;                       /* there is no active session.                          */
+
+                                                                /* Create and Start the timer which check for ...       */
+                                                                /* releasing expired session.                           */
+
+    tmr_cfg.Opt = KAL_OPT_TMR_NONE | KAL_OPT_TMR_PERIODIC;
+    HTTPsAuth_SesssionTmr = KAL_TmrCreate("HTTPs Auth Session release timer",
+                                           HTTPsAuth_SessionReleaseTmr,
+                                           DEF_NULL,
+                                           HTTPs_AUTH_SESSION_RELEASE_TIMEOUT_MS,
+                                          &tmr_cfg,
+                                          &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    KAL_TmrStart(HTTPsAuth_SesssionTmr, &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsAuth_OnHdrRx()
+*
+* Description : Hook function called when HTTP header is received.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration.
+*
+*               hdr_field   Header field received.
+*
+* Return(s)   : DEF_YES, to keep header.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsAuth_CookieHooksCfg.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsAuth_OnHdrRx (const  HTTPs_INSTANCE   *p_instance,
+                                const  HTTPs_CONN       *p_conn,
+                                const  void             *p_hook_cfg,
+                                       HTTP_HDR_FIELD    hdr_field)
+{
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+    switch (hdr_field) {
+
+       case HTTP_HDR_FIELD_AUTHORIZATION:
+            return (DEF_YES);
+
+       case HTTP_HDR_FIELD_COOKIE:
+       case HTTP_HDR_FIELD_COOKIE2:
+            return (DEF_YES);
+
+       case HTTP_HDR_FIELD_USER_AGENT:
+            return (DEF_YES);
+
+       default:
+            return (DEF_NO);
+    }
+#else
+    return (DEF_NO);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsAuth_OnHdrTx()
+*
+* Description : Hook function called to add HTTP header to HTTP server response.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_cfg       Pointer to hook configuration.
+*
+* Return(s)   : DEF_OK
+*               DEF_FAIL
+*
+* Caller(s)   : HTTPsAuth_AppCookieHooksCfg,
+*               HTTPsAuth_CookieHooksCfg.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsAuth_OnHdrTx (const  HTTPs_INSTANCE  *p_instance,
+                                       HTTPs_CONN      *p_conn,
+                                const  void            *p_cfg)
+{
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+            HTTPs_HDR_BLK       *p_resp_hdr_blk;
+    const   HTTPs_CFG           *p_http_cfg;
+            HTTPs_AUTH_SESSION  *p_session;
+            CLK_TS_SEC           ts_current;
+            CPU_CHAR            *p_str;
+            CPU_SIZE_T           str_len;
+            CPU_SIZE_T           len;
+            HTTPs_ERR            http_err;
+            CPU_CHAR             value_str[DEF_INT_16U_NBR_DIG_MAX + 1];
+
+
+    p_http_cfg = p_instance->CfgPtr;
+
+    switch (p_conn->StatusCode) {
+        case HTTP_STATUS_OK:
+        case HTTP_STATUS_SEE_OTHER:
+
+             if (p_conn->ConnDataPtr != DEF_NULL) {
+                 p_session = (HTTPs_AUTH_SESSION *)p_conn->ConnDataPtr;
+             } else {
+                 p_session = HTTPsAuth_SessionRetrieveFromHdr(p_instance, p_conn);
+             }
+
+                                                                /* Send back the cookie if there is a active session.   */
+             if (p_session != DEF_NULL) {
+                                                                /* Get and add header block to the connection.          */
+                 p_resp_hdr_blk = HTTPs_RespHdrGet((HTTPs_INSTANCE *)p_instance,
+                                                                     p_conn,
+                                                                     HTTP_HDR_FIELD_SET_COOKIE,
+                                                                     HTTPs_HDR_VAL_TYPE_STR_DYN,
+                                                                    &http_err);
+                 if (p_resp_hdr_blk == DEF_NULL) {
+                     return (DEF_FAIL);
+                 }
+
+                                                                /* Get the data buf pointer and the buf_len in...       */
+                                                                /* ...temporary variables.                              */
+                 p_str   = p_resp_hdr_blk->ValPtr;
+                 str_len = p_http_cfg->HdrTxCfgPtr->DataLenMax;
+
+                                                                /* Set the session_id cookie.                           */
+                 Str_FmtNbr_Int32U(p_session->SessionID,
+                                   DEF_INT_16U_NBR_DIG_MAX,
+                                   DEF_NBR_BASE_DEC,
+                                   ASCII_CHAR_DIGIT_ZERO,
+                                   DEF_NO,
+                                   DEF_YES,
+                                   value_str);
+
+                 len = HTTPsAuth_SetCookieStr(HTTPs_AUTH_COOKIE_TAG_NAME_SESSION_ID,
+                                              value_str,
+                                              p_str,
+                                              str_len,
+                                              DEF_NO);
+
+                                                                /* Refresh the pointer and the remaining buf_len.       */
+                 p_str   += len;
+                 str_len -= len;
+
+                                                                /* Set the Max_Value cookie.                            */
+                 Str_FmtNbr_Int32U(HTTPs_AUTH_SESSION_TIMEOUT_SEC,
+                                   DEF_INT_16U_NBR_DIG_MAX,
+                                   DEF_NBR_BASE_DEC,
+                                   DEF_NULL,
+                                   DEF_NO,
+                                   DEF_YES,
+                                   value_str);
+
+                 (void)HTTPsAuth_SetCookieStr(HTTPs_AUTH_COOKIE_TAG_NAME_MAX_VALUE,
+                                              value_str,
+                                              p_str,
+                                              str_len,
+                                              DEF_YES);
+
+                                                                /* Set the total header length.                          */
+                 p_resp_hdr_blk->ValLen = Str_Len(p_resp_hdr_blk->ValPtr);
+
+                                                                /* Refresh the expiration time of the session.           */
+                 ts_current = 0;
+                 Clk_GetTS_Unix(&ts_current);
+                 p_session->ExpireTS = ts_current + HTTPs_AUTH_SESSION_TIMEOUT_SEC;
+             }
+             break;
+
+
+        default:
+             break;
+    }
+#endif
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_Auth_OnAuth()
+*
+* Description : Upon Authorization request (When this module acts as a barrier for content).
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration.
+*
+* Return(s)   : DEF_YES
+*               DEF_NO
+*
+* Caller(s)   : HTTPsAuth_CookieHooksCfg.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsAuth_OnAuth (const  HTTPs_INSTANCE  *p_instance,
+                                      HTTPs_CONN      *p_conn,
+                               const  void            *p_hook_cfg)
+{
+    HTTPs_AUTH_SESSION       *p_session;
+    HTTPs_AUTHORIZATION_CFG  *p_auth_cfg;
+    AUTH_RIGHT                req_rights;
+    AUTH_RIGHT                user_rights;
+    RTOS_ERR                  err_auth;
+
+
+    p_session = HTTPsAuth_SessionRetrieveFromHdr(p_instance, p_conn);
+
+    if (p_session != DEF_NULL) {
+
+        p_auth_cfg = (HTTPs_AUTHORIZATION_CFG *)p_hook_cfg;
+
+        req_rights = p_auth_cfg->GetRequiredRights(p_instance, p_conn);
+
+                                                                /* Refresh the user's data */
+        Auth_GetUser(p_session->User.Name, &p_session->User, &err_auth);
+
+        user_rights = p_session->User.Rights;
+        if (DEF_BIT_IS_SET(user_rights, req_rights)) {
+            return DEF_YES;
+        }
+    }
+
+    return (DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsAuth_OnTransComplete()
+*
+* Description : Called when an HTTP Transaction has been completed.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsAuth_AppCookieHooksCfg,
+*               HTTPsAuth_CookieHooksCfg.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsAuth_OnTransComplete (const  HTTPs_INSTANCE  *p_instance,
+                                        HTTPs_CONN      *p_conn,
+                                 const  void            *p_hook_cfg)
+{
+    p_conn->ConnDataPtr = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPs_Auth_OnConnClose()
+*
+* Description : Called when any connection is closed.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsAuth_AppCookieHooksCfg,
+*               HTTPsAuth_CookieHooksCfg.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsAuth_OnConnClose (const  HTTPs_INSTANCE  *p_instance,
+                                    HTTPs_CONN      *p_conn,
+                             const  void            *p_hook_cfg)
+{
+    p_conn->ConnDataPtr = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsAuth_ReqUnprotected()
+*
+* Description : This function is called when a unprotected request is received, i.e. the request received
+*               is not associated with a session. The upper application is called to ask what to do with
+*               the request, i.e. allow it or redirect it to another page.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration.
+*
+* Return(s)   : DEF_YES
+*               DEF_NO
+*
+* Caller(s)   : HTTPsAuth_AppCookieHooksCfg.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsAuth_ReqUnprotected (const  HTTPs_INSTANCE  *p_instance,
+                                              HTTPs_CONN      *p_conn,
+                                       const  void            *p_hook_cfg)
+{
+    const   HTTPs_AUTH_CFG      *p_cfg = (const HTTPs_AUTH_CFG *)p_hook_cfg;
+            HTTPs_AUTH_RESULT    result;
+
+
+    if (p_cfg->ParseLogin != DEF_NULL) {
+
+        (void)p_cfg->ParseLogin(p_instance, p_conn, HTTPs_AUTH_STATE_REQ_URL, &result);
+
+        if (result.RedirectPathOnNoCredPtr != DEF_NULL) {
+            HTTPsAuth_Redirect(p_instance, p_conn, result.RedirectPathOnNoCredPtr);
+        }
+    }
+
+    return (DEF_YES);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsAuth_ReqProtected()
+*
+* Description : This function is called when a request is received and the authentication and authorization
+*               have been accepted. We ask the upper application if the request has an URL related to the
+*               authentication module, i.e login or logout page, so that the authentication module can
+*               process those requests.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration.
+*
+* Return(s)   : DEF_YES, if the received request must be process by the authentication module.
+*               DEF_NO,  if the request has nothing to do with the authentication module.
+*
+* Caller(s)   : HTTPsAuth_AppProtectedCookieHooksCfg.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsAuth_ReqProtected (const  HTTPs_INSTANCE  *p_instance,
+                                            HTTPs_CONN      *p_conn,
+                                     const  void            *p_hook_cfg)
+{
+            HTTPs_AUTH_SESSION  *p_session;
+    const   HTTPs_AUTH_CFG      *p_cfg = (const HTTPs_AUTH_CFG *)p_hook_cfg;
+            CPU_INT16S           cmp_val;
+            CPU_BOOLEAN          is_login;
+            CPU_BOOLEAN          is_logout;
+            CPU_BOOLEAN          val_return;
+
+
+    p_session = HTTPsAuth_SessionRetrieveFromHdr(p_instance, p_conn);
+    if (p_session == DEF_NULL) {                                /* Case when session timed out.                         */
+        p_conn->ConnDataPtr = DEF_NULL;
+        val_return = HTTPsAuth_ReqUnprotected(p_instance, p_conn, p_hook_cfg);
+        return (val_return);
+    }
+
+    if (p_cfg->ParseLogin != DEF_NULL) {                        /* Check if POST login request received.                */
+
+        is_login = p_cfg->ParseLogin(p_instance, p_conn, HTTPs_AUTH_STATE_REQ_URL, &p_session->Result);
+
+        if (is_login == DEF_YES) {
+            return (DEF_YES);
+        }
+    }
+
+    if (p_cfg->ParseLogout != DEF_NULL) {                       /* Check if POST logout request received.               */
+
+        is_logout = p_cfg->ParseLogout(p_instance, p_conn, HTTPs_AUTH_STATE_REQ_URL);
+
+        if (is_logout == DEF_YES) {
+            return (DEF_YES);
+        }
+    }
+
+                                                                /* Check if request if for login error/redirect pages.  */
+    cmp_val = Str_Cmp(p_conn->PathPtr, p_session->Result.RedirectPathOnNoCredPtr);
+    if (cmp_val != 0) {
+        cmp_val = Str_Cmp(p_conn->PathPtr, p_session->Result.RedirectPathOnInvalidCredPtr);
+    }
+    if (cmp_val == 0) {
+        HTTPsAuth_Redirect(p_instance, p_conn, p_session->Result.RedirectPathOnValidCredPtr);
+        return (DEF_YES);
+    }
+
+                                                                /* Check if request has something to do with login.     */
+    if (p_session->Result.RedirectPathOnNoCredPtr == DEF_NULL) {
+        return (DEF_YES);
+    }
+
+    return (DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPsAuth_ReqRdyUnprotected()
+*
+* Description : This function is called when a unprotected request (not yet login) is being process by the
+*               authentication module. The upper application is called to parse the info received in the
+*               request particularly the form fields, if any, for login/logout info.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration.
+*
+*               p_data      Pointer to Form Key-Val data received in HTTP request if any.
+*
+* Return(s)   : DEF_YES, if the HTTP response can be send.
+*               DEF_NO,  if Poll Hook function must be called.
+*
+* Caller(s)   : HTTPsAuth_AppUnprotectedCookieHooksCfg.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsAuth_ReqRdyUnprotected (const  HTTPs_INSTANCE   *p_instance,
+                                                 HTTPs_CONN       *p_conn,
+                                          const  void             *p_hook_cfg,
+                                          const  HTTPs_KEY_VAL    *p_data)
+{
+            HTTPs_AUTH_SESSION  *p_session;
+    const   HTTPs_AUTH_CFG      *p_cfg           = (const HTTPs_AUTH_CFG *)p_hook_cfg;
+    const   CPU_CHAR            *p_redirect_path = DEF_NULL;
+            HTTPs_AUTH_RESULT    result;
+            RTOS_ERR             err_auth;
+
+
+    if (p_cfg->ParseLogin != DEF_NULL) {
+        (void)p_cfg->ParseLogin(p_instance, p_conn, HTTPs_AUTH_STATE_REQ_COMPLETE, &result);
+
+        if ((result.UsernamePtr != DEF_NULL) &&
+            (result.PasswordPtr != DEF_NULL)    ) {
+
+            p_session = HTTPsAuth_SessionGet();
+            if (p_session == DEF_NULL) {
+                return (DEF_YES);                           /* Internal error.  */
+            }
+
+            Mem_Copy(&p_session->Result, &result, sizeof(HTTPs_AUTH_RESULT));
+
+            (void)Auth_ValidateCredentials(result.UsernamePtr,
+                                           result.PasswordPtr,
+                                          &p_session->User,
+                                          &err_auth);
+            switch (err_auth) {
+                case RTOS_ERR_NONE:                         /* Success.         */
+                     p_conn->ConnDataPtr = p_session;
+                     p_redirect_path = result.RedirectPathOnValidCredPtr;
+                     break;
+
+                case RTOS_ERR_INVALID_CREDENTIALS:          /* Client error.    */
+                     p_redirect_path = result.RedirectPathOnInvalidCredPtr;
+                     HTTPsAuth_SessionRelease(p_session);
+                     break;
+
+                default:                                    /* Internal error.  */
+                     HTTPsAuth_SessionRelease(p_session);
+                     break;
+            }
+        }
+    }
+
+    if (p_redirect_path != DEF_NULL) {
+        HTTPsAuth_Redirect(p_instance, p_conn, p_redirect_path);
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsAuth_ReqRdyProtected()
+*
+* Description : This function is called when a protected request (already log in) is being process by the
+*               authentication module. The upper application is called to parse the info received in the
+*               request particularly the form fields, if any, for login/logout info.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration.
+*
+*               p_data      Pointer to Form Key-Val data received in HTTP request if any.
+*
+* Return(s)   : DEF_YES, if the HTTP response can be send.
+*               DEF_NO,  if Poll Hook function must be called.
+*
+* Caller(s)   : HTTPsAuth_AppProtectedCookieHooksCfg.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsAuth_ReqRdyProtected (const  HTTPs_INSTANCE   *p_instance,
+                                               HTTPs_CONN       *p_conn,
+                                        const  void             *p_hook_cfg,
+                                        const  HTTPs_KEY_VAL    *p_data)
+{
+            HTTPs_AUTH_SESSION  *p_session;
+    const   HTTPs_AUTH_CFG      *p_cfg           = (const HTTPs_AUTH_CFG *)p_hook_cfg;
+    const   CPU_CHAR            *p_redirect_path = DEF_NULL;
+            HTTPs_AUTH_RESULT   *p_result;
+            CPU_BOOLEAN          logout          = DEF_NO;
+            CPU_BOOLEAN          val_return;
+            RTOS_ERR             err_auth;
+
+
+    p_session = HTTPsAuth_SessionRetrieveFromHdr(p_instance, p_conn);
+    if (p_session == DEF_NULL) {                                /* Case when session timed out.                         */
+        p_conn->ConnDataPtr = DEF_NULL;
+        val_return = HTTPsAuth_ReqRdyUnprotected(p_instance, p_conn, p_hook_cfg, p_data);
+        return (val_return);
+    }
+
+    p_result = &p_session->Result;
+
+    if (p_cfg->ParseLogin != DEF_NULL) {
+        (void)p_cfg->ParseLogin(p_instance, p_conn, HTTPs_AUTH_STATE_REQ_COMPLETE, p_result);
+
+        if ((p_result->UsernamePtr != DEF_NULL) &&
+            (p_result->PasswordPtr != DEF_NULL)) {
+            (void)Auth_ValidateCredentials(p_result->UsernamePtr,
+                                           p_result->PasswordPtr,
+                                          &p_session->User,
+                                          &err_auth);
+            switch (err_auth) {
+                case RTOS_ERR_NONE:                 /* Success.         */
+                     p_redirect_path = p_result->RedirectPathOnValidCredPtr;
+                     break;
+
+                case RTOS_ERR_INVALID_CREDENTIALS:  /* Client error.    */
+                     p_redirect_path = p_result->RedirectPathOnInvalidCredPtr;
+                     HTTPsAuth_SessionRelease(p_session);
+                     p_conn->ConnDataPtr = DEF_NULL;
+                     break;
+
+                default:                            /* Internal error.  */
+                     HTTPsAuth_SessionRelease(p_session);
+                     p_conn->ConnDataPtr = DEF_NULL;
+                     break;
+            }
+        }
+    }
+
+    if (p_cfg->ParseLogout != DEF_NULL) {
+        logout = p_cfg->ParseLogout(p_instance, p_conn, HTTPs_AUTH_STATE_REQ_COMPLETE);
+
+        if (logout == DEF_YES) {
+            p_redirect_path = p_session->Result.RedirectPathOnNoCredPtr;
+            HTTPsAuth_SessionRelease(p_session);
+            p_conn->ConnDataPtr = DEF_NULL;
+        }
+    }
+
+    if (p_redirect_path != DEF_NULL) {
+        HTTPsAuth_Redirect(p_instance, p_conn, p_redirect_path);
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL FUNCTIONS
+********************************************************************************************************
+********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     HTTPs_InstanceSetCookieStr()
+*
+* Description : Format the cookie correctly in the transmit buffer.
+*
+* Argument(s) : p_cookie_tag    Pointer of char of the cookie tag (NULL terminated).
+*
+*               p_cookie_value  Pointer of char of the cookie value (NULL terminated).
+*
+*               p_buf           Destination buffer pointer of the formatted cookie.
+*
+*               buf_len         Maximum space available in the destination buffer.
+*
+* Return(s)   : 0 to 65535      Total length used to set the formated cookie.
+*
+* Caller(s)   : HTTPsAuth_OnHdrTx().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+static  CPU_INT16U  HTTPsAuth_SetCookieStr (CPU_CHAR     *p_cookie_tag,
+                                            CPU_CHAR     *p_cookie_value,
+                                            CPU_CHAR     *p_buf,
+                                            CPU_INT16U    buf_len,
+                                            CPU_BOOLEAN   nul)
+{
+    CPU_INT16U  len;
+    CPU_INT16U  total_len;
+
+
+    total_len = 0;
+                                                /* Cookie Tag.                                          */
+    len = Str_Len(p_cookie_tag);
+    if (len < buf_len) {
+        Str_Copy_N(p_buf, p_cookie_tag, buf_len);
+        buf_len   -= len;
+        p_buf     += len;
+        total_len  = len;
+    } else {
+        return (total_len);
+    }
+                                                /* '=' character delimiter.                             */
+    if (len < buf_len) {
+        *p_buf = '=';
+         buf_len--;
+         p_buf++;
+         total_len++;
+    } else {
+        return (total_len);
+    }
+                                                /* Cookie Value.                                        */
+    len = Str_Len(p_cookie_value);
+    if (len < buf_len) {
+        Str_Copy_N(p_buf, p_cookie_value, buf_len);
+        buf_len   -= len;
+        p_buf     += len;
+        total_len += len;
+    } else {
+        return (total_len);
+    }
+                                                /* ';' character delimiter.                             */
+    len = 1;
+    if (len < buf_len) {
+       *p_buf = ';';
+        buf_len--;
+        p_buf++;
+        total_len++;
+    }
+
+                                                /* Add null character at the end if required.           */
+    if (nul == DEF_YES) {
+        if (len < buf_len) {
+           *p_buf = '\0';
+            buf_len--;
+            p_buf++;
+            total_len++;
+        }
+    }
+
+    return (total_len);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            HTTPsAuth_Redirect()
+*
+* Description : Called to redirect the client to a another page.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_uri       URI to the page to be redirected.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsAuth_ProcessSession().
+*
+* Note(s)     : (1) This function modifies the following parameters of the
+*                  HTTPs_CONN provided (p_conn):
+*
+*                  (a) FileNamePtr
+*                  (b) FileType
+*                  (c) HostPtr
+*                  (d) StatusCode
+*
+*              (2) HTTPs_CFG_ABSOLUTE_URI_EN
+*                  Supports            DEF_DISABLED
+*                  Preferred state is  DEF_ENABLED
+*********************************************************************************************************
+*/
+
+static  void  HTTPsAuth_Redirect (const  HTTPs_INSTANCE  *p_instance,
+                                         HTTPs_CONN      *p_conn,
+                                   const CPU_CHAR        *p_uri)
+{
+    HTTPs_ERR  err;
+
+
+    p_conn->StatusCode = HTTP_STATUS_SEE_OTHER;                 /* Redirect the page...                                 */
+
+    HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err);
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+    Str_Copy(p_conn->HostPtr, "");
+    Str_Copy(p_conn->PathPtr, p_uri);
+#else
+    Str_Copy(p_conn->PathPtr, p_uri);
+#endif
+
+    (void)&err;                                                 /* Prevent 'variable unused' compiler warning.          */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsAuth_GetSession()
+*
+* Description : Gets the session from the current HTTPs connection received headers.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+* Return(s)   : Pointer to the Session object.
+*
+* Caller(s)   : HTTPsAuth_ProcessSession(),
+*               HTTPsAuth_OnAuth(),
+*               HTTPsAuth_OnHdrTx().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  HTTPs_AUTH_SESSION  *HTTPsAuth_SessionRetrieveFromHdr (const  HTTPs_INSTANCE  *p_instance,
+                                                                      HTTPs_CONN      *p_conn)
+{
+    HTTPs_HDR_BLK       *p_req_hdr_blk;
+    HTTPs_AUTH_SESSION  *p_session;
+
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+    p_req_hdr_blk = p_conn->HdrListPtr;
+                                                        /* Browse the entire list of header field of the HTTP...    */
+                                                        /* request.                                                 */
+    while (p_req_hdr_blk != (HTTPs_HDR_BLK *) 0) {
+
+        switch (p_req_hdr_blk->HdrField) {
+            case HTTP_HDR_FIELD_COOKIE:
+                 p_session = HTTPsAuth_SessionComputeFromHdr(p_req_hdr_blk);
+                 return (p_session);
+
+            default:
+                 break;
+        }
+
+        p_req_hdr_blk = p_req_hdr_blk->NextPtr;
+    }
+#endif
+
+    (void)&p_req_hdr_blk;
+    (void)&p_session;
+
+    return (DEF_NULL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsAuth_ComputeSession()
+*
+* Description : Computes the session from an header block
+*
+* Argument(s) : p_cookie_blk     Pointer to cookie header block.
+*
+* Return(s)   : Pointer to HTTP session.
+*
+* Caller(s)   : HTTPsAuth_GetSession().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+static  HTTPs_AUTH_SESSION  *HTTPsAuth_SessionComputeFromHdr (HTTPs_HDR_BLK  *p_cookie_blk)
+{
+    HTTPs_AUTH_SESSION  *p_session;
+    CPU_INT16U           session_id;
+    CPU_CHAR            *p_str;
+    CPU_CHAR            *p_end;
+
+
+    p_str = p_cookie_blk->ValPtr;
+    p_end = p_str + p_cookie_blk->ValLen;
+
+    while((p_str != DEF_NULL) &&
+          (p_str < p_end)    ) {
+
+        p_str = Str_Str_N(p_str,
+                          HTTPs_AUTH_COOKIE_TAG_NAME_SESSION_ID,
+                          p_end - p_str);
+
+        if (p_str == DEF_NULL) {
+            return DEF_NULL;
+        }
+
+                                                                /* Skip all the tag name plus the equal char.           */
+        p_str += sizeof(HTTPs_AUTH_COOKIE_TAG_NAME_SESSION_ID);
+
+        p_str[DEF_INT_16U_NBR_DIG_MAX] = ASCII_CHAR_NULL;
+
+        session_id = (CPU_INT16U) Str_ParseNbr_Int32U(p_str,
+                                                      DEF_NULL,
+                                                      DEF_NBR_BASE_DEC);
+
+        p_session = HTTPsAuth_SessionSrch(session_id);
+        if (p_session != DEF_NULL) {
+            return (p_session);
+        } else {
+            p_str += DEF_INT_16U_NBR_DIG_MAX + 1;
+        }
+    }
+
+    return (DEF_NULL);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsAuth_SessionSrch()
+*
+* Description : Find the corresponding session ID in the active session list.
+*
+* Argument(s) : session_id  The desired session ID number to be found in the active session list.
+*
+* Return(s)   : Pointer to the session object, if the session ID is in the session list.
+*               DEF_NULL,                      if the corresponding session ID is not found in the session list,
+*                                              or the session ID asked is invalid (in this case, session id = 0).
+*
+* Caller(s)   : HTTPsAuth_SessionComputeFromHdr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+static  HTTPs_AUTH_SESSION  *HTTPsAuth_SessionSrch (CPU_INT16U  session_id)
+{
+    HTTPs_AUTH_SESSION  *p_session;
+
+
+    if (session_id != 0) {
+                                                        /* If the session id is valid.                          */
+        p_session = HTTPsAuth_SessionFirstPtr;
+        while (p_session != DEF_NULL) {
+                                                        /* Browse the active session list.                      */
+            if (p_session->SessionID == session_id) {
+                break;                                  /* If session ID match, the active session is find.     */
+            }
+
+            p_session = p_session->NextPtr;
+        }
+
+    } else {
+        p_session = DEF_NULL;
+    }
+
+    return (p_session);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsAuth_SessionGet()
+*
+* Description : Get the next session id structure available in the active session list.
+*
+* Argument(s) : None.
+*
+* Return(s)   : Pointer to the next available session ID in the active session list.
+*               DEF_NULL if the list is full and the session cannot be allocated.
+*
+* Caller(s)   : HTTPsAuth_ProcessSession().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  HTTPs_AUTH_SESSION  *HTTPsAuth_SessionGet (void)
+{
+    HTTPs_AUTH_SESSION  *p_session;
+    HTTPs_AUTH_SESSION  *p_last_session;
+    LIB_ERR              err_lib;
+
+
+                                                                /* Get a free session from the Session pool.            */
+    p_session = (HTTPs_AUTH_SESSION *)Mem_DynPoolBlkGet(&HTTPsAuth_SessionPool,
+                                                        &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_NULL);                                       /* If Pool is empty or error no session are available. */
+    }
+
+    if (HTTPsAuth_SessionFirstPtr == DEF_NULL) {
+
+        HTTPsAuth_SessionFirstPtr = p_session;
+        p_session->NextPtr        = DEF_NULL;
+        p_session->PrevPtr       = DEF_NULL;
+
+    } else {
+
+        p_last_session = HTTPsAuth_SessionFirstPtr;
+        while (p_last_session->NextPtr != DEF_NULL) {
+            p_last_session = p_last_session->NextPtr;
+        }
+        p_last_session->NextPtr = p_session;
+        p_session->PrevPtr      = p_last_session;
+        p_session->NextPtr      = DEF_NULL;
+
+    }
+
+    p_session->SessionID = (CPU_INT16U)HTTPsAuth_SessionGenerateID((CPU_ADDR) p_session);
+
+    return (p_session);                                         /* Return the new session.                              */
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPsAuth_SessionRelease()
+*
+* Description : Release the session in the active session list.
+*
+* Argument(s) : p_session   Pointer on the session to be deleted form the active session list.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsAuth_ProcessSession(),
+*               HTTPsAuth_SessionReleaseTmr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsAuth_SessionRelease (HTTPs_AUTH_SESSION  *p_session)
+{
+    HTTPs_AUTH_SESSION  *p_session_next;
+    HTTPs_AUTH_SESSION  *p_session_prev;
+    LIB_ERR              err_lib;
+
+
+                                                /* Update active session list by removing the session.  */
+    if (p_session == HTTPsAuth_SessionFirstPtr) {
+
+        if (p_session->NextPtr == DEF_NULL) {
+
+            HTTPsAuth_SessionFirstPtr = DEF_NULL;
+
+        } else {
+
+            HTTPsAuth_SessionFirstPtr          = p_session->NextPtr;
+            HTTPsAuth_SessionFirstPtr->PrevPtr = DEF_NULL;
+        }
+
+    } else {
+
+        p_session_prev = p_session->PrevPtr;
+        p_session_next = p_session->NextPtr;
+
+        if (p_session_prev != DEF_NULL) {
+            p_session_prev->NextPtr = p_session_next;
+        }
+
+        if (p_session_next != DEF_NULL) {
+            p_session_next->PrevPtr = p_session_prev;
+        }
+    }
+                                                /* Release the session to the pool.                     */
+    Mem_DynPoolBlkFree(&HTTPsAuth_SessionPool,
+                        p_session,
+                       &err_lib);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPsAuth_SessionReleaseTmr()
+*
+* Description : Timer that check the expiration of session and release the expired session
+*               in the active session list.
+*
+* Argument(s) : p_tmr       Pointer to Timer object.
+*
+*               p_arg       Pointer to timer callback arguments.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsAuth_InitSessionPool().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsAuth_SessionReleaseTmr (void   *p_arg)
+{
+    HTTPs_AUTH_SESSION  *p_session;
+    CLK_TS_SEC           time_now;
+
+
+    p_session = HTTPsAuth_SessionFirstPtr;
+
+    Clk_GetTS_Unix(&time_now);
+
+    while (p_session != DEF_NULL) {
+                                                        /* If the session is expired...                         */
+        if (p_session->ExpireTS < time_now) {
+                                                        /* ...release the session from the active session list. */
+            HTTPsAuth_SessionRelease(p_session);
+        }
+                                                        /* Move to the next session in the list.                */
+        p_session = p_session->NextPtr;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsAuth_SessionGenerateID()
+*
+* Description : Generate a random number for the session ID
+*
+* Argument(s) : seed    Seed Value.
+*
+* Return(s)   : Random Session ID Value
+*
+* Caller(s)   : HTTPsAuth_SessionGet().
+*
+* Note(s)     : (1) In this example, the value is simply random, not unique.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  HTTPsAuth_SessionGenerateID (CPU_INT32U seed)
+{
+    CPU_INT32U  rand;
+    CPU_INT32U  diff;
+    CPU_INT32U  val;
+    RTOS_ERR    err;
+
+
+    Math_RandSetSeed(seed);
+    rand = Math_Rand();
+
+#if CPU_CFG_TS_32_EN == DEF_ENABLED
+    rand += (CPU_INT32U)CPU_TS_Get32();
+#else
+    rand += (CPU_INT32U)KAL_TickGet(&err);
+#endif
+
+    Math_RandSetSeed(rand);
+    rand =  Math_Rand();
+
+    diff = (DEF_INT_16U_MAX_VAL - 1) + 1;
+
+    val  = rand % diff + 1;
+
+   (void)&err;
+
+    return (val);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/Auth/http-s_auth.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/Auth/http-s_auth.h
new file mode 100644
index 0000000..f2f3b89
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/Auth/http-s_auth.h
@@ -0,0 +1,186 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  HTTPs AUTHENTIFICATION MODULE
+*
+* Filename      : http-s_auth.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef HTTPS_AUTH_MODULE_PRESENT
+#define HTTPS_AUTH_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../CtrlLayer/http-s_ctrl_layer.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct  https_auth_result {
+    CPU_CHAR   *RedirectPathOnValidCredPtr;
+    CPU_CHAR   *RedirectPathOnInvalidCredPtr;
+    CPU_CHAR   *RedirectPathOnNoCredPtr;
+    CPU_CHAR   *UsernamePtr;
+    CPU_CHAR   *PasswordPtr;
+}  HTTPs_AUTH_RESULT;
+
+
+typedef enum https_auth_state {
+    HTTPs_AUTH_STATE_REQ_URL,
+    HTTPs_AUTH_STATE_REQ_COMPLETE
+} HTTPs_AUTH_STATE;
+
+
+typedef  CPU_BOOLEAN        (*HTTPs_AUTH_PARSE_LOGIN_FNCT)            (const  HTTPs_INSTANCE     *p_inst,
+                                                                       const  HTTPs_CONN         *p_conn,
+                                                                              HTTPs_AUTH_STATE    state,
+                                                                              HTTPs_AUTH_RESULT  *p_result);
+
+typedef  CPU_BOOLEAN        (*HTTPs_AUTH_PARSE_LOGOUT_FNCT)           (const  HTTPs_INSTANCE     *p_inst,
+                                                                       const  HTTPs_CONN         *p_conn,
+                                                                              HTTPs_AUTH_STATE    state);
+
+typedef  AUTH_RIGHT         (*HTTPs_AUTH_GET_REQUIRED_RIGHT_FNCT)     (const  HTTPs_INSTANCE     *p_inst,
+                                                                       const  HTTPs_CONN         *p_conn);
+
+
+typedef  struct  HTTPs_Authentication_Cfg {
+    HTTPs_AUTH_PARSE_LOGIN_FNCT             ParseLogin;
+    HTTPs_AUTH_PARSE_LOGOUT_FNCT            ParseLogout;
+} HTTPs_AUTH_CFG;
+
+
+typedef  struct  HTTPs_Authorization_Cfg {
+    HTTPs_AUTH_GET_REQUIRED_RIGHT_FNCT      GetRequiredRights;
+} HTTPs_AUTHORIZATION_CFG;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  HTTPs_CTRL_LAYER_AUTH_HOOKS  HTTPsAuth_CookieHooksCfg;
+extern  HTTPs_CTRL_LAYER_APP_HOOKS   HTTPsAuth_AppUnprotectedCookieHooksCfg;
+extern  HTTPs_CTRL_LAYER_APP_HOOKS   HTTPsAuth_AppProtectedCookieHooksCfg;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN     HTTPsAuth_InitSessionPool     (const  HTTPs_INSTANCE     *p_instance,
+                                               const  void               *p_hook_cfg);
+
+CPU_BOOLEAN     HTTPsAuth_OnHdrRx             (const  HTTPs_INSTANCE     *p_instance,
+                                               const  HTTPs_CONN         *p_conn,
+                                               const  void               *p_hook_cfg,
+                                                      HTTP_HDR_FIELD      hdr_field);
+
+CPU_BOOLEAN     HTTPsAuth_OnHdrTx             (const  HTTPs_INSTANCE     *p_instance,
+                                                      HTTPs_CONN         *p_conn,
+                                               const  void               *p_cfg);
+
+CPU_BOOLEAN     HTTPsAuth_OnAuth              (const  HTTPs_INSTANCE     *p_instance,
+                                                      HTTPs_CONN         *p_conn,
+                                               const  void               *p_hook_cfg);
+
+void            HTTPsAuth_OnTransComplete     (const  HTTPs_INSTANCE     *p_instance,
+                                                      HTTPs_CONN         *p_conn,
+                                               const  void               *p_hook_cfg);
+
+void            HTTPsAuth_OnConnClose         (const  HTTPs_INSTANCE     *p_instance,
+                                                      HTTPs_CONN         *p_conn,
+                                               const  void               *p_hook_cfg);
+
+CPU_BOOLEAN     HTTPsAuth_ProcessSession      (const  HTTPs_INSTANCE     *p_instance,
+                                                      HTTPs_CONN         *p_conn,
+                                               const  void               *p_hook_cfg,
+                                               const  HTTPs_KEY_VAL      *p_data);
+
+CPU_BOOLEAN     HTTPsAuth_ReqUnprotected      (const  HTTPs_INSTANCE     *p_instance,
+                                                      HTTPs_CONN         *p_conn,
+                                               const  void               *p_hook_cfg);
+
+CPU_BOOLEAN     HTTPsAuth_ReqProtected        (const  HTTPs_INSTANCE     *p_instance,
+                                                      HTTPs_CONN         *p_conn,
+                                               const  void               *p_hook_cfg);
+
+CPU_BOOLEAN     HTTPsAuth_ReqRdyUnprotected   (const  HTTPs_INSTANCE     *p_instance,
+                                                      HTTPs_CONN         *p_conn,
+                                               const  void               *p_hook_cfg,
+                                               const  HTTPs_KEY_VAL      *p_data);
+
+CPU_BOOLEAN     HTTPsAuth_ReqRdyProtected     (const  HTTPs_INSTANCE     *p_instance,
+                                                      HTTPs_CONN         *p_conn,
+                                               const  void               *p_hook_cfg,
+                                               const  HTTPs_KEY_VAL      *p_data);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* HTTPS_AUTH_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer.c
new file mode 100644
index 0000000..4c691a6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer.c
@@ -0,0 +1,1634 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       HTTPs CONTROL LAYER
+*
+* Filename      : http-s_ctrl_layer.c
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define   MICRIUM_SOURCE
+#define   HTTPs_CTRL_LAYER_MODULE
+#include  "http-s_ctrl_layer.h"
+#include  "http-s_ctrl_layer_mem.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HOOK_CFG  HTTPsCtrlLayer_HookCfg = {
+    HTTPsCtrlLayer_OnInstanceInit,
+    HTTPsCtrlLayer_OnReqRxHdr,
+    HTTPsCtrlLayer_OnReq,
+    HTTPsCtrlLayer_OnReqRxBody,
+    HTTPsCtrlLayer_OnReqRdySignal,
+    HTTPsCtrlLayer_OnReqRdyPoll,
+    HTTPsCtrlLayer_OnRespTxHdr,
+    HTTPsCtrlLayer_OnRespToken,
+    HTTPsCtrlLayer_OnRespChunk,
+    HTTPsCtrlLayer_OnTransComplete,
+    HTTPsCtrlLayer_OnErr,
+    HTTPsCtrlLayer_OnErrFileGet,
+    HTTPsCtrlLayer_OnConnClose
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        LOCAL GLOBAL MACROS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  INST_SCOPE_ALLOC()             HTTPs_CTRL_LAYER_INST_DATA  *__M_InstData
+
+#define  INST_SCOPE_ENTER(id, p_instance)                                                                                                   \
+                                        {                                                                                                   \
+                                            __M_InstData = p_instance->DataPtr;                                                             \
+                                            ((HTTPs_INSTANCE*)p_instance)->DataPtr  = HTTPsCtrlLayer_InstDataGet((CPU_INT32U)  id,          \
+                                                                                                                            __M_InstData);
+
+#define  INST_SCOPE_EXIT(id, p_instance)                                                                                                    \
+                                            HTTPsCtrlLayer_InstDataSet((CPU_INT32U)id,                                                      \
+                                                                                __M_InstData,                                               \
+                                                                                p_instance->DataPtr);                                       \
+                                            ((HTTPs_INSTANCE*)p_instance)->DataPtr  = __M_InstData;                                         \
+                                        }
+
+
+
+
+#define  CONN_SCOPE_ALLOC()             INST_SCOPE_ALLOC();                                                                 \
+                                        HTTPs_CTRL_LAYER_CONN_DATA  *__M_ConnData
+
+#define  CONN_SCOPE_ENTER(id, p_instance, p_conn)                                                                           \
+                                        INST_SCOPE_ENTER(id, p_instance)                                                    \
+                                        {                                                                                   \
+                                            __M_ConnData = (HTTPs_CTRL_LAYER_CONN_DATA*)p_conn->ConnDataPtr;                \
+                                            p_conn->ConnDataPtr  = HTTPsCtrlLayer_ConnDataEntryGet((CPU_INT32U)id,          \
+                                                                                                            __M_InstData,   \
+                                                                                                            __M_ConnData);  \
+
+#define  CONN_SCOPE_EXIT(id, p_instance, p_conn)                                                                            \
+                                            HTTPsCtrlLayer_ConnDataEntrySet((CPU_INT32U)   id,                              \
+                                                                                        __M_InstData,                       \
+                                                                                        __M_ConnData,                       \
+                                                                                        p_conn->ConnDataPtr);               \
+                                            p_conn->ConnDataPtr  = __M_ConnData;                                            \
+                                        }                                                                                   \
+                                        INST_SCOPE_EXIT(id, p_instance)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+********************************************************************************************************
+********************************************************************************************************
+*/
+
+static  HTTPs_CTRL_LAYER_CONN_DATA  *HTTPsCtrlLayer_CreateConnDataIfNull (       HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data,
+                                                                                 HTTPs_CONN                  *p_conn);
+
+static  void                         HTTPsCtrlLayer_InstDataSet          (       CPU_INT32U                   id,
+                                                                                 HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data,
+                                                                                 void                        *p_val);
+
+static  void                        *HTTPsCtrlLayer_InstDataGet          (       CPU_INT32U                   id,
+                                                                                 HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data);
+
+static  void                         HTTPsCtrlLayer_ConnDataEntrySet     (       CPU_INT32U                   id,
+                                                                                 HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data,
+                                                                                 HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data,
+                                                                                 void                        *p_val);
+
+static  void                        *HTTPsCtrlLayer_ConnDataEntryGet     (       CPU_INT32U                   id,
+                                                                                 HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data,
+                                                                                 HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data);
+
+static  CPU_BOOLEAN                  HTTPsCtrlLayer_InstanceInit         (       CPU_INT32U                   id,
+                                                                          const  HTTPs_INSTANCE_INIT_HOOK     instance_init_fnct,
+                                                                                 HTTPs_INSTANCE              *p_instance,
+                                                                          const  void                        *p_hook_cfg);
+
+static  CPU_BOOLEAN                  HTTPsCtrlLayer_OnReqRx              (       CPU_INT32U                   id,
+                                                                                 HTTPs_REQ_HOOK               req_fnct,
+                                                                                 HTTPs_INSTANCE              *p_instance,
+                                                                                 HTTPs_CONN                  *p_conn,
+                                                                          const  void                        *p_hook_cfg);
+
+static  CPU_BOOLEAN                  HTTPsCtrlLayer_RxHdr                (       CPU_INT32U                   id,
+                                                                                 HTTPs_REQ_HDR_RX_HOOK        rx_hdr_fnct,
+                                                                                 HTTPs_INSTANCE              *p_instance,
+                                                                                 HTTPs_CONN                  *p_conn,
+                                                                          const  void                        *p_hook_cfg,
+                                                                                 HTTP_HDR_FIELD               hdr_field);
+
+static  CPU_BOOLEAN                  HTTPsCtrlLayer_TxHdr                (       CPU_INT32U                   id,
+                                                                                 HTTPs_RESP_HDR_TX_HOOK       tx_hdr_fnct,
+                                                                                 HTTPs_INSTANCE              *p_instance,
+                                                                                 HTTPs_CONN                  *p_conn,
+                                                                          const  void                        *p_hook_cfg);
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsCtrlLayer_OnInstanceInit()
+*
+* Description : This function is bound to the instance initialization of HTTP server.
+*               It calls the instance initialization function of each sub-modules(auth and app).
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance.
+*
+*               p_cfg       Pointer to Control Layer configuration.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPs_InstanceInit() via p_cfg->HooksPtr->OnInstanceInitHook().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayer_OnInstanceInit (const  HTTPs_INSTANCE  *p_instance,
+                                            const  void            *p_cfg)
+{
+    HTTPs_CTRL_LAYER_CFG_LIST   *p_cfg_list;
+    HTTPs_CTRL_LAYER_AUTH_INST  *p_auth_inst;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    HTTPs_CTRL_LAYER_CFG        *p_ctrl_layer_cfg;
+    HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data;
+    CPU_INT16U                   ctrl_layer_cfg_ix;
+    CPU_INT16U                   cfg_ix;
+    CPU_INT16U                   cfg_nbr;
+    CPU_INT16U                   auth_insts_nbr;
+    CPU_INT16U                   app_insts_nbr;
+    CPU_SIZE_T                   ctrl_insts_def;
+    CPU_BOOLEAN                  result;
+
+
+    p_cfg_list     = (HTTPs_CTRL_LAYER_CFG_LIST *)p_cfg;
+    ctrl_insts_def = 0;
+
+
+    if (p_cfg_list == DEF_NULL) {                               /* If no config has been added to the control layer ... */
+        return (DEF_OK);                                        /* There is nothing to do.                              */
+    }
+
+    cfg_nbr = p_cfg_list->Size;
+
+                                                                /* Count the number of control instances.               */
+    for (ctrl_layer_cfg_ix = 0; ctrl_layer_cfg_ix < cfg_nbr; ++ctrl_layer_cfg_ix) {
+
+        p_ctrl_layer_cfg  = p_cfg_list->CfgsPtr[ctrl_layer_cfg_ix];
+        ctrl_insts_def   += p_ctrl_layer_cfg->AuthInstsNbr + p_ctrl_layer_cfg->AppInstsNbr;
+    }
+
+    p_inst_data = HTTPsCtrlLayerMem_InstDataAlloc();
+    if (p_inst_data == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    p_inst_data->InstDataHeadPtr = DEF_NULL;
+
+                                                                /* Cast p_instance out of const can't be done otherwise.*/
+    ((HTTPs_INSTANCE*)p_instance)->DataPtr = p_inst_data;
+
+                                                                /* Initialize the substitution pool for instance data.  */
+    result = HTTPsCtrlLayerMem_InstDataPoolInit(p_inst_data,
+                                                ctrl_insts_def);
+    if (result != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* Initialize the pool for Ctrl Layer conn data.        */
+    result = HTTPsCtrlLayerMem_ConnDataPoolInit(p_inst_data,
+                                                p_instance->CfgPtr->ConnNbrMax);
+    if (result != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* Initialize the conn data substitution pool.          */
+    result = HTTPsCtrlLayerMem_ConnDataEntryPoolInit(p_inst_data,
+                                                     ctrl_insts_def);
+    if (result != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* For all the configuration of the control layer.      */
+    for (ctrl_layer_cfg_ix = 0; ctrl_layer_cfg_ix < cfg_nbr; ++ctrl_layer_cfg_ix) {
+
+        p_ctrl_layer_cfg = p_cfg_list->CfgsPtr[ctrl_layer_cfg_ix];
+
+        auth_insts_nbr   = p_ctrl_layer_cfg->AuthInstsNbr;
+        app_insts_nbr    = p_ctrl_layer_cfg->AppInstsNbr;
+
+                                                                /* Initialize the authentication services.              */
+        for (cfg_ix = 0; cfg_ix < auth_insts_nbr; ++cfg_ix) {
+
+            p_auth_inst = p_ctrl_layer_cfg->AuthInstsPtr[cfg_ix];
+
+            result = HTTPsCtrlLayer_InstanceInit((CPU_INT32U      )p_auth_inst,
+                                                                   p_auth_inst->HooksPtr->OnInstanceInit,
+                                                 (HTTPs_INSTANCE *)p_instance,
+                                                                   p_auth_inst->HooksCfgPtr);
+            if (result != DEF_OK) {
+                return (DEF_FAIL);
+            }
+        }
+
+                                                                /* Initialize the application services.                 */
+        for (cfg_ix = 0; cfg_ix < app_insts_nbr; ++cfg_ix) {
+
+            p_app_inst = p_ctrl_layer_cfg->AppInstsPtr[cfg_ix];
+
+            result = HTTPsCtrlLayer_InstanceInit((CPU_INT32U)      p_app_inst,
+                                                                   p_app_inst->HooksPtr->OnInstanceInit,
+                                                 (HTTPs_INSTANCE *)p_instance,
+                                                                   p_app_inst->HooksCfgPtr);
+            if (result != DEF_OK) {
+                return (DEF_FAIL);
+            }
+        }
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsCtrlLayer_OnReqRxHdr()
+*
+* Description : Bound to the RxHeader hook of HTTPs.
+*               Tries to determine if a given header is useful for further process.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_cfg       Pointer to Ctrl Layer configuration.
+*
+*               hdr_field   HTTP header to check.
+*
+* Return(s)   : DEF_YES    if the header must be kept.
+*               DEF_NO     otherwise.
+*
+* Caller(s)   : HTTPs_ReqHdrParse() via p_cfg->HooksPtr->OnReqHdrRxFnctPtr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayer_OnReqRxHdr (const  HTTPs_INSTANCE   *p_instance,
+                                        const  HTTPs_CONN       *p_conn,
+                                        const  void             *p_cfg,
+                                               HTTP_HDR_FIELD    hdr_field)
+{
+    HTTPs_CTRL_LAYER_CFG_LIST   *p_cfg_list;
+    HTTPs_CTRL_LAYER_CFG        *p_ctrl_layer_cfg;
+    HTTPs_CTRL_LAYER_AUTH_INST  *p_auth_inst;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    CPU_INT16U                   ctrl_layer_cfg_ix;
+    CPU_INT16U                   cfg_ix;
+    CPU_INT16U                   cfg_nbr;
+    CPU_INT16U                   auth_insts_nbr;
+    CPU_INT16U                   app_insts_nbr;
+    CPU_BOOLEAN                  keep_hdr;
+
+
+    p_cfg_list = (HTTPs_CTRL_LAYER_CFG_LIST *)p_cfg;
+
+    if (p_cfg_list == DEF_NULL) {
+        return (DEF_NO);
+    }
+
+    cfg_nbr  = p_cfg_list->Size;
+    keep_hdr = DEF_NO;
+
+    HTTPsCtrlLayer_CreateConnDataIfNull(p_instance->DataPtr, (HTTPs_CONN*)p_conn);
+
+                                                                /* For all the configurations of the control layer ...  */
+                                                                /* .. find at least one auth or app service whom ...    */
+                                                                /* ... require this header.                             */
+    for (ctrl_layer_cfg_ix = 0; ctrl_layer_cfg_ix < cfg_nbr && keep_hdr == DEF_NO; ++ctrl_layer_cfg_ix) {
+
+        p_ctrl_layer_cfg = p_cfg_list->CfgsPtr[ctrl_layer_cfg_ix];
+
+        auth_insts_nbr   = p_ctrl_layer_cfg->AuthInstsNbr;
+        app_insts_nbr    = p_ctrl_layer_cfg->AppInstsNbr;
+
+        for (cfg_ix = 0; cfg_ix < auth_insts_nbr && keep_hdr == DEF_NO; ++cfg_ix) {
+
+            p_auth_inst = p_ctrl_layer_cfg->AuthInstsPtr[cfg_ix];
+
+            keep_hdr    = HTTPsCtrlLayer_RxHdr((CPU_INT32U      )p_auth_inst,
+                                                                 p_auth_inst->HooksPtr->OnReqHdrRx,
+                                               (HTTPs_INSTANCE *)p_instance,
+                                               (HTTPs_CONN     *)p_conn,
+                                                                 p_cfg,
+                                                                 hdr_field);
+        }
+
+        for (cfg_ix = 0; cfg_ix < app_insts_nbr && keep_hdr == DEF_NO; ++cfg_ix) {
+
+            p_app_inst = p_ctrl_layer_cfg->AppInstsPtr[cfg_ix];
+
+            keep_hdr   = HTTPsCtrlLayer_RxHdr((CPU_INT32U      )p_app_inst,
+                                                                p_app_inst->HooksPtr->OnReqHdrRx,
+                                              (HTTPs_INSTANCE *)p_instance,
+                                              (HTTPs_CONN     *)p_conn,
+                                                                p_cfg,
+                                                                hdr_field);
+        }
+    }
+
+    return (keep_hdr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsCtrlLayer_OnReq()
+*
+* Description : Bound to the ConnRequest hook of HTTPs.
+*               Tries to find the matching authentications and application for the request.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_cfg       Pointer to Control Layer configuration object.
+*
+* Return(s)   : DEF_OK    if an appropriate match has been found.
+*               DEF_FAIL  otherwise
+*
+* Caller(s)   : HTTPs_Req() via p_cfg->HooksPtr->OnReqHook().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayer_OnReq (const  HTTPs_INSTANCE  *p_instance,
+                                          HTTPs_CONN      *p_conn,
+                                   const  void            *p_cfg)
+{
+    HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data;
+    HTTPs_CTRL_LAYER_CFG_LIST   *p_cfg_list;
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    HTTPs_CTRL_LAYER_AUTH_INST  *p_auth_inst;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    HTTPs_CTRL_LAYER_CFG        *p_ctrl_layer_cfg;
+    CPU_INT16U                   ctrl_layer_cfg_ix;
+    CPU_INT16U                   cfg_ix;
+    CPU_INT16U                   cfg_nbr;
+    CPU_INT16U                   auth_insts_nbr;
+    CPU_INT16U                   app_insts_nbr;
+    CPU_BOOLEAN                  auth_succeed;
+    CPU_BOOLEAN                  app_found;
+
+
+    p_inst_data = (HTTPs_CTRL_LAYER_INST_DATA*)p_instance->DataPtr;
+    p_cfg_list  = (HTTPs_CTRL_LAYER_CFG_LIST *)p_cfg;
+
+    if (p_cfg_list == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    cfg_nbr = p_cfg_list->Size;
+
+    p_conn_data = HTTPsCtrlLayer_CreateConnDataIfNull(p_inst_data, p_conn);
+    if (p_conn_data == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    app_found = DEF_NO;
+
+                                                                /* For all the control layer configurations.            */
+    for (ctrl_layer_cfg_ix = 0; (ctrl_layer_cfg_ix < cfg_nbr) && (app_found == DEF_FALSE); ++ctrl_layer_cfg_ix) {
+
+        auth_succeed = DEF_YES;
+
+        p_ctrl_layer_cfg = p_cfg_list->CfgsPtr[ctrl_layer_cfg_ix];
+        auth_insts_nbr   = p_ctrl_layer_cfg->AuthInstsNbr;
+        app_insts_nbr    = p_ctrl_layer_cfg->AppInstsNbr;
+
+                                                                /* Try to pass all the authentication. Exit on a fail.  */
+        for (cfg_ix = 0; cfg_ix < auth_insts_nbr && auth_succeed == DEF_TRUE; ++cfg_ix) {
+
+            p_auth_inst  = p_ctrl_layer_cfg->AuthInstsPtr[cfg_ix];
+
+            auth_succeed = HTTPsCtrlLayer_OnReqRx((CPU_INT32U)      p_auth_inst,
+                                                                    p_auth_inst->HooksPtr->OnReqAuth,
+                                                  (HTTPs_INSTANCE *)p_instance,
+                                                                    p_conn,
+                                                                    p_auth_inst->HooksCfgPtr);
+        }
+
+                                                                /* If all the authentications services succeeded.       */
+        if (auth_succeed == DEF_TRUE) {
+                                                                /* Try to find an app service matching with this req.   */
+            for (cfg_ix = 0; (cfg_ix < app_insts_nbr) && (app_found == DEF_NO); ++cfg_ix) {
+
+                p_app_inst = p_ctrl_layer_cfg->AppInstsPtr[cfg_ix];
+
+                app_found  = HTTPsCtrlLayer_OnReqRx((CPU_INT32U)      p_app_inst,
+                                                                      p_app_inst->HooksPtr->OnReq,
+                                                    (HTTPs_INSTANCE *)p_instance,
+                                                                      p_conn,
+                                                                      p_app_inst->HooksCfgPtr);
+                if (app_found == DEF_YES) {
+                    p_conn_data->TargetCfgPtr     = p_ctrl_layer_cfg;
+                    p_conn_data->TargetAppInstPtr = p_app_inst;
+                }
+            }
+        }
+
+        if (app_found == DEF_NO)  {
+                                                                /* Free the memory used by successful Authentication.   */
+            if (auth_succeed == DEF_NO) {
+
+                for (; cfg_ix > 0; --cfg_ix) {
+
+                    p_auth_inst = p_ctrl_layer_cfg->AuthInstsPtr[cfg_ix - 1];
+
+                    if (p_auth_inst->HooksPtr->OnConnClose != DEF_NULL) {
+                        CONN_SCOPE_ALLOC();
+                        CONN_SCOPE_ENTER(p_auth_inst, p_instance, p_conn);
+                        p_auth_inst->HooksPtr->OnConnClose(p_instance,
+                                                           p_conn,
+                                                           p_auth_inst->HooksCfgPtr);
+                        CONN_SCOPE_EXIT(p_auth_inst, p_instance, p_conn);
+                    }
+                }
+            }
+
+            HTTPsCtrlLayer_ConnDataEntriesFree(p_inst_data, p_conn_data);
+        }
+
+    }
+
+    if (app_found == DEF_NO) {
+        HTTPsCtrlLayer_ConnDataFree(p_inst_data, p_conn_data);
+        p_conn->ConnDataPtr = DEF_NULL;
+    }
+
+    return (app_found);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPsCtrlLayer_OnReqRxBody()
+*
+* Description : Bound to RxBody hook of HTTPs.
+*               Provide the body data to the application associated to the request.
+*
+* Argument(s) : p_instance       Pointer to HTTPs instance object.
+*
+*               p_conn           Pointer to HTTPs connection object.
+*
+*               p_cfg            Pointer to Ctrl Layer configuration.
+*
+*               p_buf            Pointer to the data buffer.
+*
+*               buf_size         Size of the data rx available inside the buffer.
+*
+*               p_buf_size_used  Pointer to the variable that will received the length of the data consumed by the app.
+*
+* Return(s)   : DEF_YES    To continue with the data reception.
+*               DEF_NO     If the application doesn't want to rx data anymore.
+*
+* Caller(s)   : HTTPs_Body() via p_cfg->HooksPtr->OnReqBodyRxPtr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayer_OnReqRxBody (const  HTTPs_INSTANCE  *p_instance,
+                                                HTTPs_CONN      *p_conn,
+                                         const  void            *p_cfg,
+                                                void            *p_buf,
+                                         const  CPU_SIZE_T       buf_size,
+                                                CPU_SIZE_T      *p_buf_size_used)
+{
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    CPU_BOOLEAN                  hook_continue;
+
+
+    p_conn_data = (HTTPs_CTRL_LAYER_CONN_DATA*)p_conn->ConnDataPtr;
+
+    if (p_conn_data == DEF_NULL) {
+        return (DEF_YES);
+    }
+
+    p_app_inst = p_conn_data->TargetAppInstPtr;
+
+    if (p_app_inst->HooksPtr->OnReqBodyRx == DEF_NULL) {
+        return (DEF_YES);
+    }
+
+    CONN_SCOPE_ALLOC();
+
+    CONN_SCOPE_ENTER(p_app_inst, p_instance, p_conn);
+
+    hook_continue = p_app_inst->HooksPtr->OnReqBodyRx(p_instance,
+                                                      p_conn,
+                                                      p_app_inst->HooksCfgPtr,
+                                                      p_conn->RxBufPtr,
+                                                      p_conn->RxBufLenRem,
+                                                      p_buf_size_used);
+
+    CONN_SCOPE_EXIT(p_app_inst, p_instance, p_conn);
+
+    return (hook_continue);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPsCtrlLayer_OnReqRdySignal()
+*
+* Description : Bound to Request Ready Signal hook from HTTPs.
+*               Signals the application that the HTTP request have been fully parsed, it is now the time
+*               to provide a response.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_cfg       Pointer to Ctrl Layer configuration.
+*
+*               p_data      UNUSED
+*
+* Return(s)   : DEF_YES  if the p_conn contains everything necessary to build a response.
+*               DEF_NO   otherwise.
+*
+* Caller(s)   : HTTPsResp_Prepare() via p_cfg->HooksPtr->OnReqRdySignalFnctPtr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayer_OnReqRdySignal (const  HTTPs_INSTANCE  *p_instance,
+                                                   HTTPs_CONN      *p_conn,
+                                            const  void            *p_cfg,
+                                            const  HTTPs_KEY_VAL   *p_data)
+{
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    CPU_BOOLEAN                  done;
+
+
+    p_conn_data = (HTTPs_CTRL_LAYER_CONN_DATA*)p_conn->ConnDataPtr;
+
+    if ((p_conn_data                                    == DEF_NULL) ||
+        (p_conn_data->TargetAppInstPtr->HooksPtr->OnReqSignal == DEF_NULL)) {
+        return (DEF_YES);
+    }
+
+    p_app_inst = p_conn_data->TargetAppInstPtr;
+
+    CONN_SCOPE_ALLOC();
+
+    CONN_SCOPE_ENTER(p_app_inst, p_instance, p_conn);
+
+    done = p_app_inst->HooksPtr->OnReqSignal(p_instance,
+                                             p_conn,
+                                             p_app_inst->HooksCfgPtr,
+                                             p_data);
+
+    CONN_SCOPE_EXIT(p_app_inst, p_instance, p_conn);
+
+    return (done);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsCtrlLayer_OnReqRdyPoll()
+*
+* Description : Bound to Request Ready Poll hook from HTTPs.
+*               Polls the application for a response.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_cfg       Pointer to Control Layer configuration.
+*
+* Return(s)   : DEF_YES    if the p_conn contains everything necessary to build a response.
+*               DEF_NO     otherwise.
+*
+* Caller(s)   : HTTPsResp_Prepare() via p_cfg->HooksPtr->OnReqRdyPollFnctPtr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayer_OnReqRdyPoll (const  HTTPs_INSTANCE  *p_instance,
+                                                 HTTPs_CONN      *p_conn,
+                                          const  void            *p_cfg)
+{
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    CPU_BOOLEAN                  done;
+
+
+    p_conn_data = (HTTPs_CTRL_LAYER_CONN_DATA*)p_conn->ConnDataPtr;
+
+    if ((p_conn_data                                  == DEF_NULL) ||
+        (p_conn_data->TargetAppInstPtr->HooksPtr->OnReqPoll == DEF_NULL)) {
+        return (DEF_YES);
+    }
+
+    p_app_inst = p_conn_data->TargetAppInstPtr;
+
+    CONN_SCOPE_ALLOC();
+
+    CONN_SCOPE_ENTER(p_app_inst, p_instance, p_conn);
+
+    done = p_app_inst->HooksPtr->OnReqPoll(p_instance,
+                                           p_conn,
+                                           p_app_inst->HooksCfgPtr);
+
+    CONN_SCOPE_EXIT(p_app_inst, p_instance, p_conn);
+
+    return (done);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsCtrlLayer_OnTxHdr()
+*
+* Description : Bound to Tx header of HTTPs hook.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_cfg       Pointer to Ctrl Layer configuration
+*
+* Return(s)   : DEF_YES    if all header have been sent.
+*               DEF_NO     otherwise.
+*
+* Caller(s)   : HTTPsResp_Hdr() via p_cfg->HooksPtr->OnRespHdrTxFnctPt().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayer_OnRespTxHdr (const  HTTPs_INSTANCE  *p_instance,
+                                                HTTPs_CONN      *p_conn,
+                                         const  void            *p_cfg)
+{
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    HTTPs_CTRL_LAYER_CFG        *p_ctrl_layer_cfg;
+    HTTPs_CTRL_LAYER_AUTH_INST  *p_auth_inst;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    CPU_INT16U                   cfg_ix;
+    CPU_INT16U                   auth_insts_nbr;
+    CPU_BOOLEAN                  send_hdr = DEF_NO;
+
+
+    p_conn_data = (HTTPs_CTRL_LAYER_CONN_DATA*)p_conn->ConnDataPtr;
+
+    if (p_conn_data == DEF_NULL) {
+        return (send_hdr);
+    }
+
+    p_ctrl_layer_cfg = p_conn_data->TargetCfgPtr;
+    auth_insts_nbr   = p_ctrl_layer_cfg->AuthInstsNbr;
+
+    p_app_inst       = p_conn_data->TargetAppInstPtr;
+
+    send_hdr = HTTPsCtrlLayer_TxHdr((CPU_INT32U      )p_app_inst,
+                                                      p_app_inst->HooksPtr->OnRespHdrTx,
+                                    (HTTPs_INSTANCE *)p_instance,
+                                                      p_conn,
+                                                      p_cfg);
+
+    for (cfg_ix = 0; cfg_ix < auth_insts_nbr; ++cfg_ix) {
+
+        p_auth_inst = p_ctrl_layer_cfg->AuthInstsPtr[cfg_ix];
+
+        send_hdr |= HTTPsCtrlLayer_TxHdr((CPU_INT32U      )p_auth_inst,
+                                                           p_auth_inst->HooksPtr->OnRespHdrTx,
+                                         (HTTPs_INSTANCE *)p_instance,
+                                                           p_conn,
+                                                           p_cfg);
+    }
+
+    return (send_hdr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPsCtrlLayer_OnRespToken()
+*
+* Description : Bound to Token Value Get hook from HTTPs.
+*
+* Argument(s) : p_instance      Pointer to HTTPs instance object.
+*
+*               p_conn          Pointer HTTPs connection object.
+*
+*               p_cfg           Pointer to Ctrl Layer configuration object.
+*
+*               p_token         Pointer to the token name.
+*
+*               token_len       Length of the token name.
+*
+*               p_val           Pointer to the value string.
+*
+*               val_len_max     Max len of the value string.
+*
+* Return(s)   : DEF_YES   if the token has been replaced.
+*               DEF_NO    otherwise
+*
+* Caller(s)   : HTTPsResp_FileTransferChunked() via p_cfg->HooksPtr->OnRespTokenFnctPtr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayer_OnRespToken (const  HTTPs_INSTANCE  *p_instance,
+                                                HTTPs_CONN      *p_conn,
+                                         const  void            *p_cfg,
+                                         const  CPU_CHAR        *p_token,
+                                                CPU_INT16U       token_len,
+                                                CPU_CHAR        *p_val,
+                                                CPU_INT16U       val_len_max)
+{
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    CPU_BOOLEAN                  token_replaced;
+
+
+    p_conn_data = (HTTPs_CTRL_LAYER_CONN_DATA*)p_conn->ConnDataPtr;
+
+    if ((p_conn_data                                           == DEF_NULL) ||
+        (p_conn_data->TargetAppInstPtr->HooksPtr->OnRespToken == DEF_NULL)) {
+         return (DEF_YES);
+    }
+
+    p_app_inst = p_conn_data->TargetAppInstPtr;
+
+    CONN_SCOPE_ALLOC();
+
+    CONN_SCOPE_ENTER(p_app_inst, p_instance, p_conn);
+
+    token_replaced   = p_app_inst->HooksPtr->OnRespToken(p_instance,
+                                                         p_conn,
+                                                         p_app_inst->HooksCfgPtr,
+                                                         p_token,
+                                                         token_len,
+                                                         p_val,
+                                                         val_len_max);
+
+    CONN_SCOPE_EXIT(p_app_inst, p_instance, p_conn);
+
+    return (token_replaced);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsCtrlLayer_OnRespChunk()
+*
+* Description : Bound to Chunked Data Get hook from HTTP-s.
+*
+* Argument(s) : p_instance      Pointer to HTTPs instance object.
+*
+*               p_conn          Pointer HTTPs connection object.
+*
+*               p_cfg           Pointer to Ctrl Layer configuration object.
+*
+*               p_buf           Pointer to the buffer to fill.
+*
+*               buf_len_max     Maximum length the buffer can contain.
+*
+*               p_len_tx        Variable that will received the length written in the buffer.
+*
+* Return(s)   : DEF_YES      if there is no more data to send.
+*               DEF_NO       otherwise.
+*
+* Caller(s)   : HTTPs_RespDataTransferChunked() via p_cfg->HooksPtr->OnRespChunkFnctPtr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayer_OnRespChunk (const  HTTPs_INSTANCE  *p_instance,
+                                                HTTPs_CONN      *p_conn,
+                                         const  void            *p_cfg,
+                                                void            *p_buf,
+                                                CPU_SIZE_T       buf_len_max,
+                                                CPU_SIZE_T      *p_len_tx)
+{
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    CPU_BOOLEAN                  last_chunk = DEF_YES;
+
+
+    p_conn_data = (HTTPs_CTRL_LAYER_CONN_DATA*)p_conn->ConnDataPtr;
+
+    if ((p_conn_data                                          == DEF_NULL) ||
+        (p_conn_data->TargetAppInstPtr->HooksPtr->OnRespChunk == DEF_NULL)) {
+         return (last_chunk);
+    }
+
+    p_app_inst = p_conn_data->TargetAppInstPtr;
+
+    CONN_SCOPE_ALLOC();
+
+    CONN_SCOPE_ENTER(p_app_inst, p_instance, p_conn);
+
+    last_chunk = p_app_inst->HooksPtr->OnRespChunk(p_instance,
+                                                   p_conn,
+                                                   p_app_inst->HooksCfgPtr,
+                                                   p_buf,
+                                                   buf_len_max,
+                                                   p_len_tx);
+
+    CONN_SCOPE_EXIT(p_app_inst, p_instance, p_conn);
+
+    return (last_chunk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsCtrlLayer_OnTransComplete()
+*
+* Description : Bound to TransComplete hook from HTTPs.
+*               Notifies all sub module of an HTTP Transaction completion.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer HTTPs connection object.
+*
+*               p_cfg       Pointer to Ctrl Layer configuration object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsConn_Process() via p_cfg->HooksPtr->OnTransCompleteFnctPtr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsCtrlLayer_OnTransComplete (const  HTTPs_INSTANCE  *p_instance,
+                                             HTTPs_CONN      *p_conn,
+                                      const  void            *p_cfg)
+{
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    HTTPs_CTRL_LAYER_CFG        *p_ctrl_layer_cfg;
+    HTTPs_CTRL_LAYER_AUTH_INST  *p_auth_inst;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    HTTPs_TRANS_COMPLETE_HOOK    trans_compl_fnct;
+    CPU_INT16U                   cfg_ix;
+    CPU_INT16U                   auth_insts_nbr;
+
+
+    p_conn_data = (HTTPs_CTRL_LAYER_CONN_DATA*)p_conn->ConnDataPtr;
+
+    if (p_conn_data == DEF_NULL) {
+        return;
+    }
+
+    p_ctrl_layer_cfg = p_conn_data->TargetCfgPtr;
+
+    auth_insts_nbr = p_ctrl_layer_cfg->AuthInstsNbr;
+
+                                                                /* Call conn close only on the control layer cfg ...    */
+                                                                /* ..  that actually worked on the request.             */
+    for (cfg_ix = 0; cfg_ix < auth_insts_nbr; ++cfg_ix) {
+
+        p_auth_inst = p_ctrl_layer_cfg->AuthInstsPtr[cfg_ix];
+
+        trans_compl_fnct = p_auth_inst->HooksPtr->OnTransComplete;
+        if (trans_compl_fnct != DEF_NULL) {
+            CONN_SCOPE_ALLOC();
+
+            CONN_SCOPE_ENTER(p_auth_inst, p_instance, p_conn);
+
+            trans_compl_fnct(p_instance,
+                             p_conn,
+                             p_auth_inst->HooksCfgPtr);
+
+            CONN_SCOPE_EXIT(p_auth_inst, p_instance, p_conn);
+        }
+    }
+
+    p_app_inst = p_conn_data->TargetAppInstPtr;
+
+    trans_compl_fnct = p_app_inst->HooksPtr->OnTransComplete;
+    if (trans_compl_fnct != DEF_NULL) {
+        CONN_SCOPE_ALLOC();
+
+        CONN_SCOPE_ENTER(p_app_inst, p_instance, p_conn);
+
+        trans_compl_fnct(p_instance,
+                         p_conn,
+                         p_app_inst->HooksCfgPtr);
+
+        CONN_SCOPE_EXIT(p_app_inst, p_instance, p_conn);
+    }
+
+    HTTPsCtrlLayer_ConnDataFree(p_instance->DataPtr, p_conn_data);
+
+    p_conn->ConnDataPtr = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsCtrlLayer_OnErr()
+*
+* Description : Bound to ConnErr hook from HTTPs.
+*               Forwards the error to the application concerned if any.
+*
+* Argument(s) : p_instance      Pointer to HTTPs instance object.
+*
+*               p_conn          Pointer HTTPs connection object.
+*
+*               p_cfg           Pointer to Ctrl Layer configuration object.
+*
+*               err             HTTPs error code.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsConn_ErrInternal() via p_cfg->HooksPtr->OnErrFnctPtr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsCtrlLayer_OnErr (const  HTTPs_INSTANCE  *p_instance,
+                                   HTTPs_CONN      *p_conn,
+                            const  void            *p_cfg,
+                                   HTTPs_ERR        err)
+{
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+
+
+    p_conn_data = (HTTPs_CTRL_LAYER_CONN_DATA*)p_conn->ConnDataPtr;
+
+    if ((p_conn_data                                   == DEF_NULL) ||
+        (p_conn_data->TargetAppInstPtr->HooksPtr->OnError == DEF_NULL)) {
+         return;
+    }
+
+    p_app_inst = p_conn_data->TargetAppInstPtr;
+
+    CONN_SCOPE_ALLOC();
+
+    CONN_SCOPE_ENTER(p_app_inst, p_instance, p_conn);
+
+    p_app_inst->HooksPtr->OnError(p_instance,
+                                  p_conn,
+                                  p_app_inst->HooksCfgPtr,
+                                  err);
+
+    CONN_SCOPE_EXIT(p_app_inst, p_instance, p_conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPsCtrlLayer_OnErrFileGet()
+*
+* Description : Bound to ErrFileGet hook from HTTPs.
+*               Does nothing.
+*
+* Argument(s) : p_cfg           UNUSED
+*
+*               status_code     UNUSED
+*
+*               p_file_str      UNUSED
+*
+*               file_len_max    UNUSED
+*
+*               p_file_type     UNUSED
+*
+*               p_content_type  UNUSED
+*
+*               p_data          UNUSED
+*
+*               p_date_len      UNUSED
+*
+* Return(s)   : None
+*
+* Caller(s)   : HTTPsResp_PrepareStatusCode() via p_cfg->HooksPtr->OnErrFileGetFnctPtr().
+*
+* Note(s)     : (1) This error will not be forwarded. The default page is returned.
+*********************************************************************************************************
+*/
+
+void  HTTPsCtrlLayer_OnErrFileGet (const  void                   *p_cfg,
+                                          HTTP_STATUS_CODE        status_code,
+                                          CPU_CHAR               *p_file_str,
+                                          CPU_INT32U              file_len_max,
+                                          HTTPs_BODY_DATA_TYPE   *p_file_type,
+                                          HTTP_CONTENT_TYPE      *p_content_type,
+                                          void                  **p_data,
+                                          CPU_INT32U             *p_date_len)
+{
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsCtrlLayer_OnConnClose()
+*
+* Description : Bound to ConnClose hook from HTTPs.
+*               Notifies all sub module of a connection close.
+*
+* Argument(s) : p_instance      Pointer to HTTPs instance object.
+*
+*               p_conn          Pointer HTTPs connection object.
+*
+*               p_cfg           Pointer to Ctrl Layer configuration object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsConn_Close() via p_cfg->HooksPtr->OnConnCloseFnctPtr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsCtrlLayer_OnConnClose (const  HTTPs_INSTANCE  *p_instance,
+                                         HTTPs_CONN      *p_conn,
+                                  const  void            *p_cfg)
+{
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    HTTPs_CTRL_LAYER_CFG        *p_ctrl_layer_cfg;
+    HTTPs_CTRL_LAYER_AUTH_INST  *p_auth_inst;
+    HTTPs_CTRL_LAYER_APP_INST   *p_app_inst;
+    HTTPs_CONN_CLOSE_HOOK        conn_close_fnct;
+    CPU_INT16U                   cfg_ix;
+    CPU_INT16U                   auth_insts_nbr;
+
+
+    p_conn_data = (HTTPs_CTRL_LAYER_CONN_DATA*)p_conn->ConnDataPtr;
+
+    if (p_conn_data == DEF_NULL) {
+        return;
+    }
+
+    p_ctrl_layer_cfg = p_conn_data->TargetCfgPtr;
+
+    auth_insts_nbr = p_ctrl_layer_cfg->AuthInstsNbr;
+
+                                                                /* Call conn close only on the control layer cfg ...    */
+                                                                /* ..  that actually worked on the request.             */
+    for (cfg_ix = 0; cfg_ix < auth_insts_nbr; ++cfg_ix) {
+
+        p_auth_inst = p_ctrl_layer_cfg->AuthInstsPtr[cfg_ix];
+
+        conn_close_fnct = p_auth_inst->HooksPtr->OnConnClose;
+        if (conn_close_fnct != DEF_NULL) {
+            CONN_SCOPE_ALLOC();
+
+            CONN_SCOPE_ENTER(p_auth_inst, p_instance, p_conn);
+
+            conn_close_fnct(p_instance,
+                            p_conn,
+                            p_auth_inst->HooksCfgPtr);
+
+            CONN_SCOPE_EXIT(p_auth_inst, p_instance, p_conn);
+        }
+    }
+
+    p_app_inst = p_conn_data->TargetAppInstPtr;
+
+    conn_close_fnct = p_app_inst->HooksPtr->OnConnClose;
+    if (conn_close_fnct != DEF_NULL) {
+        CONN_SCOPE_ALLOC();
+
+        CONN_SCOPE_ENTER(p_app_inst, p_instance, p_conn);
+
+        conn_close_fnct(p_instance,
+                        p_conn,
+                        p_app_inst->HooksCfgPtr);
+
+        CONN_SCOPE_EXIT(p_app_inst, p_instance, p_conn);
+    }
+
+    HTTPsCtrlLayer_ConnDataFree(p_instance->DataPtr, p_conn_data);
+
+    p_conn->ConnDataPtr = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL FUNCTIONS
+********************************************************************************************************
+********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               HTTPsCtrlLayer_CreateConnDataIfNull()
+*
+* Description : Creates a CtrlLayer ConnData if it was null.
+*
+* Argument(s) : p_inst_data     Pointer to Ctrl Layer Instance Data.
+*
+*               p_conn          Pointer to HTTPs Connection object.
+*
+* Return(s)   : Pointer to Ctrl Layer Connection Data object.
+*               DEF_NULL if a ConnData couldn't be created.
+*
+* Caller(s)   : HTTPsCtrlLayer_OnConnReq(),
+*               HTTPsCtrlLayer_OnRxdr().
+*
+* Note(s)     : (1) If not null, it will return the ConnDataPtr from p_conn.
+*********************************************************************************************************
+*/
+
+static  HTTPs_CTRL_LAYER_CONN_DATA  *HTTPsCtrlLayer_CreateConnDataIfNull (HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data,
+                                                                          HTTPs_CONN                  *p_conn)
+{
+    if (p_conn->ConnDataPtr == DEF_NULL) {
+        p_conn->ConnDataPtr = HTTPsCtrlLayerMem_ConnDataAlloc(p_inst_data);
+        if (p_conn->ConnDataPtr == DEF_NULL) {
+            CPU_SW_EXCEPTION(DEF_NULL);                         /* Not suppose to happen.                               */
+        }
+    }
+
+    return ((HTTPs_CTRL_LAYER_CONN_DATA *)p_conn->ConnDataPtr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsCtrlLayer_InstDataSet()
+*
+* Description : Set the value of a substitution.
+*
+* Argument(s) : id              Instance data ID to be set
+*
+*               p_inst_data     Pointer to Ctrl Layer instance data.
+*
+*               p_val           Pointer to value of the instance data pointer.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsCtrlLayer_InstanceInit(),
+*               HTTPsCtrlLayer_OnBody(),
+*               HTTPsCtrlLayer_OnChunkedDataGet(),
+*               HTTPsCtrlLayer_OnConnClose(),
+*               HTTPsCtrlLayer_OnConnErr(),
+*               HTTPsCtrlLayer_OnConnReq(),
+*               HTTPsCtrlLayer_OnReqRdyPoll(),
+*               HTTPsCtrlLayer_OnReqRdySignal(),
+*               HTTPsCtrlLayer_OnReqRx(),
+*               HTTPsCtrlLayer_OnTokenValGet(),
+*               HTTPsCtrlLayer_RxHdr(),
+*               HTTPsCtrlLayer_TxHdr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsCtrlLayer_InstDataSet (CPU_INT32U                   id,
+                                          HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data,
+                                          void                        *p_val)
+{
+    HTTPs_CTRL_LAYER_DATA_ENTRY  *p_current;
+
+
+    p_current = p_inst_data->InstDataHeadPtr;
+
+    while (p_current != DEF_NULL && p_current->OwnerId != id) {
+        p_current = p_current->NextPtr;
+    }
+
+    if (p_current == DEF_NULL) {
+        if (p_val != DEF_NULL) {
+            p_current = HTTPsCtrlLayerMem_InstDataEntryAlloc(p_inst_data);
+            if (p_current == DEF_NULL) {
+                CPU_SW_EXCEPTION(;);                            /* Not suppose to happen.                               */
+            }
+            p_current->DataPtr = p_val;
+            p_current->OwnerId = id;
+        }
+    } else {
+        p_current->DataPtr = p_val;
+    }
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsCtrlLayer_InstDataGet()
+*
+* Description : Get the Control Layer instance data related to the ID.
+*
+* Argument(s) : id              Id of the instance data to get.
+*
+*               p_inst_data     Pointer to Ctrl Layer instance data.
+*
+* Return(s)   : Pointer to instance data object.
+*               DEF_NULL    if the id doesn't exist.
+*
+* Caller(s)   : HTTPsCtrlLayer_InstanceInit(),
+*               HTTPsCtrlLayer_OnBody(),
+*               HTTPsCtrlLayer_OnChunkedDataGet(),
+*               HTTPsCtrlLayer_OnConnClose(),
+*               HTTPsCtrlLayer_OnConnErr(),
+*               HTTPsCtrlLayer_OnConnReq(),
+*               HTTPsCtrlLayer_OnReqRdyPoll(),
+*               HTTPsCtrlLayer_OnReqRdySignal(),
+*               HTTPsCtrlLayer_OnReqRx(),
+*               HTTPsCtrlLayer_OnTokenValGet(),
+*               HTTPsCtrlLayer_RxHdr(),
+*               HTTPsCtrlLayer_TxHdr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  *HTTPsCtrlLayer_InstDataGet (CPU_INT32U                   id,
+                                           HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data)
+{
+    HTTPs_CTRL_LAYER_DATA_ENTRY  *p_current;
+
+
+    p_current = p_inst_data->InstDataHeadPtr;
+
+    while (p_current != DEF_NULL) {
+        if(p_current->OwnerId == id) {
+            return (p_current->DataPtr);
+        } else {
+            p_current = p_current->NextPtr;
+        }
+    }
+
+    return (DEF_NULL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsCtrlLayer_ConnDataEntrySet()
+*
+* Description : Sets the connection data entry value for substitution.
+*
+* Argument(s) : id              id of the connection data entry
+*
+*               p_inst_data     Pointer to Ctrl Layer instance data.
+*
+*               p_conn_data     Pointer to Ctrl Layer connection data.
+*
+*               p_val           Pointer to value to set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsCtrlLayer_OnBody(),
+*               HTTPsCtrlLayer_OnChunkedDataGet(),
+*               HTTPsCtrlLayer_OnConnClose(),
+*               HTTPsCtrlLayer_OnConnErr(),
+*               HTTPsCtrlLayer_OnConnReq(),
+*               HTTPsCtrlLayer_OnReqRdyPoll(),
+*               HTTPsCtrlLayer_OnReqRdySignal(),
+*               HTTPsCtrlLayer_OnReqRx(),
+*               HTTPsCtrlLayer_OnTokenValGet(),
+*               HTTPsCtrlLayer_RxHdr(),
+*               HTTPsCtrlLayer_TxHdr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsCtrlLayer_ConnDataEntrySet (CPU_INT32U                   id,
+                                               HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data,
+                                               HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data,
+                                               void                        *p_val)
+{
+    HTTPs_CTRL_LAYER_DATA_ENTRY  *p_current;
+
+
+    p_current = p_conn_data->ConnDataHeadPtr;
+
+    while ((p_current          != DEF_NULL) &&
+           (p_current->OwnerId != id)      ) {
+        p_current = p_current->NextPtr;
+    }
+
+    if (p_current == DEF_NULL) {
+        if (p_val != DEF_NULL) {
+            p_current = HTTPsCtrlLayer_ConnDataEntryAlloc(p_inst_data, p_conn_data);
+            if (p_current == DEF_NULL) {
+                CPU_SW_EXCEPTION(;);                            /* Not suppose to happen.                               */
+            }
+            p_current->DataPtr = p_val;
+            p_current->OwnerId = id;
+        }
+    } else {
+        p_current->DataPtr = p_val;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPsCtrlLayer_ConnDataEntryGet()
+*
+* Description : Get a saved connection data entry.
+*
+* Argument(s) : id              ID of the saved data.
+*
+*               p_inst_dData    Pointer to Ctrl Layer instance data.
+*
+*               p_conn_data     Pointer to Ctrl Layer connection data.
+*
+* Return(s)   : Pointer to the saved connection data entry.
+*               DEF_NULL if the id doesn't exist.
+*
+* Caller(s)   : HTTPsCtrlLayer_OnBody(),
+*               HTTPsCtrlLayer_OnChunkedDataGet(),
+*               HTTPsCtrlLayer_OnConnClose(),
+*               HTTPsCtrlLayer_OnConnErr(),
+*               HTTPsCtrlLayer_OnConnReq(),
+*               HTTPsCtrlLayer_OnReqRdyPoll(),
+*               HTTPsCtrlLayer_OnReqRdySignal(),
+*               HTTPsCtrlLayer_OnReqRx(),
+*               HTTPsCtrlLayer_OnTokenValGet(),
+*               HTTPsCtrlLayer_RxHdr(),
+*               HTTPsCtrlLayer_TxHdr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  *HTTPsCtrlLayer_ConnDataEntryGet (CPU_INT32U                   id,
+                                                HTTPs_CTRL_LAYER_INST_DATA  *p_inst_data,
+                                                HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data)
+{
+    HTTPs_CTRL_LAYER_DATA_ENTRY  *p_current;
+
+
+    p_current = p_conn_data->ConnDataHeadPtr;
+
+    while (p_current != DEF_NULL) {
+        if (p_current->OwnerId == id) {
+            return (p_current->DataPtr);
+        } else {
+            p_current = p_current->NextPtr;
+        }
+    }
+
+    return (DEF_NULL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsCtrlLayer_InstanceInit()
+*
+* Description : Call the given init function with the appropriate parameters in the appropriate context.
+*
+* Argument(s) : id                      Context ID.
+*
+*               instance_init_fnct      Function pointer for the initialization.
+*
+*               p_instance              Pointer to the HTTPs instance object.
+*
+*               p_hook_cfg              Sub-module hook configuration.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsCtrlLayer_OnInstanceInit().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPsCtrlLayer_InstanceInit (       CPU_INT32U                 id,
+                                                  const  HTTPs_INSTANCE_INIT_HOOK   instance_init_fnct,
+                                                         HTTPs_INSTANCE            *p_instance,
+                                                  const  void                      *p_hook_cfg)
+{
+    CPU_BOOLEAN  result;
+
+
+    if (instance_init_fnct == DEF_NULL) {
+        return (DEF_OK);
+    }
+
+    INST_SCOPE_ALLOC();
+
+    INST_SCOPE_ENTER(id, p_instance);
+
+    result = instance_init_fnct(p_instance, p_hook_cfg);
+
+    INST_SCOPE_EXIT(id, p_instance);
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPsCtrlLayer_OnReqRx()
+*
+* Description : Call the given ConnRequest fnct with the appropriate parameters in the appropriate context.
+*
+* Argument(s) : id              Context ID.
+*
+*               req_fnct     handler function fo the request (can be an auth or an app)
+*
+*               p_instance      HTTP-s instance
+*
+*               p_conn          HTTP-s connection
+*
+*               p_hook_cfg       pointer to the resource config
+*
+* Return(s)   : DEF_OK    if the request follows the resource requirements.
+*               DEF_FAIL  otherwise
+*
+* Caller(s)   : HTTPsCtrlLayer_OnReq().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPsCtrlLayer_OnReqRx (       CPU_INT32U       id,
+                                                    HTTPs_REQ_HOOK   req_fnct,
+                                                    HTTPs_INSTANCE  *p_instance,
+                                                    HTTPs_CONN      *p_conn,
+                                             const  void            *p_hook_cfg)
+{
+    if (req_fnct == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    CPU_BOOLEAN success;
+
+    CONN_SCOPE_ALLOC();
+
+    CONN_SCOPE_ENTER(id, p_instance, p_conn);
+
+    success = req_fnct(p_instance, p_conn, p_hook_cfg);
+
+    CONN_SCOPE_EXIT(id, p_instance, p_conn);
+
+    return (success);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsCtrlLayer_RxHdr()
+*
+* Description : Calls the given RxHeader function with the appropriate parameters in the appropriate
+*               context.
+*
+* Argument(s) : id              ID of the context.
+*
+*               rx_hdr_fnct     Received header function to call.
+*
+*               p_instance      Pointer to HTTPs instance object.
+*
+*               p_conn          Pointer to HTTPs connection object.
+*
+*               p_hook_cfg      Pointer to called module's configuration.
+*
+*               hdr_field       Header field to check.
+*
+* Return(s)   : DEF_YES    if the header must be kept
+*               DEF_NO     otherwise
+*
+* Caller(s)   : HTTPsCtrlLayer_OnRxHdr().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPsCtrlLayer_RxHdr (       CPU_INT32U              id,
+                                                  HTTPs_REQ_HDR_RX_HOOK   rx_hdr_fnct,
+                                                  HTTPs_INSTANCE         *p_instance,
+                                                  HTTPs_CONN             *p_conn,
+                                           const  void                   *p_hook_cfg,
+                                                  HTTP_HDR_FIELD          hdr_field)
+{
+    CPU_BOOLEAN keep_hdr;
+
+
+    if (rx_hdr_fnct == DEF_NULL) {
+        return (DEF_NO);
+    }
+
+    CONN_SCOPE_ALLOC();
+
+    CONN_SCOPE_ENTER(id, p_instance, p_conn);
+
+    keep_hdr = rx_hdr_fnct(p_instance, p_conn, p_hook_cfg, hdr_field);
+
+    CONN_SCOPE_EXIT(id, p_instance, p_conn);
+
+    return (keep_hdr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsCtrlLayer_TxHdr()
+*
+* Description : Calls the given TxHeader function in the appropriate context.
+*
+* Argument(s) : id              ID of the context.
+*
+*               tx_hdr_fnct     Transmit header function to call.
+*
+*               p_instance      Pointer to HTTPs instance object.
+*
+*               p_conn          Pointer to HTTPs connection object.
+*
+*               p_hook_cfg      Pointer to called module's configuration.
+*
+* Return(s)   : DEF_OK    if all headers have been tx'ed.
+*               DEF_FAIL  otherwise.
+*
+* Caller(s)   : HTTPsCtrlLayer_OnTxHdr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPsCtrlLayer_TxHdr (       CPU_INT32U               id,
+                                                  HTTPs_RESP_HDR_TX_HOOK   tx_hdr_fnct,
+                                                  HTTPs_INSTANCE          *p_instance,
+                                                  HTTPs_CONN              *p_conn,
+                                           const  void                    *p_hook_cfg)
+{
+    CPU_BOOLEAN  send_hdr;
+
+
+    if (tx_hdr_fnct == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    CONN_SCOPE_ALLOC();
+
+    CONN_SCOPE_ENTER(id, p_instance, p_conn);
+
+    send_hdr = tx_hdr_fnct(p_instance, p_conn, p_hook_cfg);
+
+    CONN_SCOPE_EXIT(id, p_instance, p_conn);
+
+    return (send_hdr);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer.h
new file mode 100644
index 0000000..7c32800
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer.h
@@ -0,0 +1,299 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       HTTPs CONTROL LAYER
+*
+* Filename      : http-s_ctrl_layer.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : None.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef HTTPs_CTRL_LAYER_MODULE_PRESENT
+#define HTTPs_CTRL_LAYER_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include "../../Source/http-s.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               CTRL LAYER AUTHENTICATION HOOKS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_ctrl_layer_auth_hooks {
+    HTTPs_INSTANCE_INIT_HOOK   OnInstanceInit;
+    HTTPs_REQ_HDR_RX_HOOK      OnReqHdrRx;
+    HTTPs_REQ_HOOK             OnReqAuth;
+    HTTPs_RESP_HDR_TX_HOOK     OnRespHdrTx;
+    HTTPs_TRANS_COMPLETE_HOOK  OnTransComplete;
+    HTTPs_CONN_CLOSE_HOOK      OnConnClose;
+} HTTPs_CTRL_LAYER_AUTH_HOOKS;
+
+
+/*
+*********************************************************************************************************
+*                                CTRL LAYER APPLICATION HOOKS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_ctrl_layer_app_hooks {
+    HTTPs_INSTANCE_INIT_HOOK   OnInstanceInit;
+    HTTPs_REQ_HDR_RX_HOOK      OnReqHdrRx;
+    HTTPs_REQ_HOOK             OnReq;
+    HTTPs_REQ_BODY_RX_HOOK     OnReqBodyRx;
+    HTTPs_REQ_RDY_SIGNAL_HOOK  OnReqSignal;
+    HTTPs_REQ_RDY_POLL_HOOK    OnReqPoll;
+    HTTPs_RESP_HDR_TX_HOOK     OnRespHdrTx;
+    HTTPs_RESP_TOKEN_HOOK      OnRespToken;
+    HTTPs_RESP_CHUNK_HOOK      OnRespChunk;
+    HTTPs_TRANS_COMPLETE_HOOK  OnTransComplete;
+    HTTPs_ERR_HOOK             OnError;
+    HTTPs_CONN_CLOSE_HOOK      OnConnClose;
+} HTTPs_CTRL_LAYER_APP_HOOKS;
+
+
+/*
+*********************************************************************************************************
+*                                CTRL LAYER AUTHENTIFIACTION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_ctrl_layer_auth_inst {
+    HTTPs_CTRL_LAYER_AUTH_HOOKS    *HooksPtr;
+    void                           *HooksCfgPtr;
+} HTTPs_CTRL_LAYER_AUTH_INST;
+
+
+/*
+*********************************************************************************************************
+*                                CTRL LAYER APPLICATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_ctrl_layer_app_inst {
+    HTTPs_CTRL_LAYER_APP_HOOKS     *HooksPtr;
+    void                           *HooksCfgPtr;
+} HTTPs_CTRL_LAYER_APP_INST;
+
+
+/*
+*********************************************************************************************************
+*                                CTRL LAYER CONFIGUATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_ctrl_layer_cfg {
+    HTTPs_CTRL_LAYER_AUTH_INST    **AuthInstsPtr;
+    CPU_SIZE_T                      AuthInstsNbr;
+    HTTPs_CTRL_LAYER_APP_INST     **AppInstsPtr;
+    CPU_SIZE_T                      AppInstsNbr;
+} HTTPs_CTRL_LAYER_CFG;
+
+
+/*
+*********************************************************************************************************
+*                               CTRL LAYER CONFIGURATION LIST DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_ctrl_layer_cfg_List {
+    HTTPs_CTRL_LAYER_CFG  **CfgsPtr;
+    CPU_SIZE_T              Size;
+} HTTPs_CTRL_LAYER_CFG_LIST;
+
+
+/*
+*********************************************************************************************************
+*                                CTRL LAYER DATA ENTRY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_ctrl_layer_data_entry  HTTPs_CTRL_LAYER_DATA_ENTRY;
+
+struct  https_ctrl_layer_data_entry {
+    CPU_INT32U                      OwnerId;
+    void                           *DataPtr;
+    HTTPs_CTRL_LAYER_DATA_ENTRY    *NextPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                                CTRL LAYER INSTANCE DATA TYPE
+*
+* Notes: (1) Structure of the memory management of the control layer.
+*********************************************************************************************************
+*/
+
+typedef  struct  https_ctrl_layer_inst_data {
+    MEM_DYN_POOL                    ConnDataPool;
+    MEM_DYN_POOL                    ConnDataEntryPool;
+    MEM_DYN_POOL                    InstDataEntryPool;
+    HTTPs_CTRL_LAYER_DATA_ENTRY    *InstDataHeadPtr;
+} HTTPs_CTRL_LAYER_INST_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                CTRL LAYER CONNECTION DATA TYPE
+*
+* Notes: (1) Structure for the ConnDataPtr substitution in the HTTPs_CONN
+*********************************************************************************************************
+*/
+
+typedef  struct  https_ctrl_layer_conn_data {
+    HTTPs_CTRL_LAYER_CFG           *TargetCfgPtr;
+    HTTPs_CTRL_LAYER_APP_INST      *TargetAppInstPtr;
+    HTTPs_CTRL_LAYER_DATA_ENTRY    *ConnDataHeadPtr;
+} HTTPs_CTRL_LAYER_CONN_DATA;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  HTTPs_HOOK_CFG  HTTPsCtrlLayer_HookCfg;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN     HTTPsCtrlLayer_OnInstanceInit  (const  HTTPs_INSTANCE         *p_instance,
+                                                const  void                   *p_cfg);
+
+CPU_BOOLEAN     HTTPsCtrlLayer_OnReqRxHdr      (const  HTTPs_INSTANCE         *p_instance,
+                                                const  HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg,
+                                                       HTTP_HDR_FIELD          hdr_field);
+
+CPU_BOOLEAN     HTTPsCtrlLayer_OnReq           (const  HTTPs_INSTANCE         *p_instance,
+                                                       HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg);
+
+CPU_BOOLEAN     HTTPsCtrlLayer_OnReqRxBody     (const  HTTPs_INSTANCE         *p_instance,
+                                                       HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg,
+                                                       void                   *p_buf,
+                                                const  CPU_SIZE_T              buf_size,
+                                                       CPU_SIZE_T             *p_buf_size_used);
+
+CPU_BOOLEAN     HTTPsCtrlLayer_OnReqRdySignal  (const  HTTPs_INSTANCE         *p_instance,
+                                                       HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg,
+                                                const  HTTPs_KEY_VAL         *p_data);
+
+CPU_BOOLEAN     HTTPsCtrlLayer_OnReqRdyPoll    (const  HTTPs_INSTANCE         *p_instance,
+                                                       HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg);
+
+CPU_BOOLEAN     HTTPsCtrlLayer_OnRespTxHdr     (const  HTTPs_INSTANCE         *p_instance,
+                                                       HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg);
+
+CPU_BOOLEAN     HTTPsCtrlLayer_OnRespToken     (const  HTTPs_INSTANCE         *p_instance,
+                                                       HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg,
+                                                const  CPU_CHAR               *p_token,
+                                                       CPU_INT16U              token_len,
+                                                       CPU_CHAR               *p_val,
+                                                       CPU_INT16U              val_len_max);
+
+CPU_BOOLEAN     HTTPsCtrlLayer_OnRespChunk     (const  HTTPs_INSTANCE         *p_instance,
+                                                       HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg,
+                                                       void                   *p_buf,
+                                                       CPU_SIZE_T              buf_len_max,
+                                                       CPU_SIZE_T             *p_tx_len);
+
+void            HTTPsCtrlLayer_OnTransComplete (const  HTTPs_INSTANCE         *p_instance,
+                                                       HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg);
+
+void            HTTPsCtrlLayer_OnErr           (const  HTTPs_INSTANCE         *p_instance,
+                                                       HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg,
+                                                       HTTPs_ERR               err);
+
+void            HTTPsCtrlLayer_OnErrFileGet    (const  void                   *p_cfg,
+                                                       HTTP_STATUS_CODE        status_code,
+                                                       CPU_CHAR               *p_file_str,
+                                                       CPU_INT32U              file_len_max,
+                                                       HTTPs_BODY_DATA_TYPE   *p_file_type,
+                                                       HTTP_CONTENT_TYPE      *p_content_type,
+                                                       void                  **p_data,
+                                                       CPU_INT32U             *p_date_len);
+
+void            HTTPsCtrlLayer_OnConnClose     (const  HTTPs_INSTANCE         *p_instance,
+                                                       HTTPs_CONN             *p_conn,
+                                                const  void                   *p_cfg);
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* HTTPs_CTRL_LAYER_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_mem.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_mem.c
new file mode 100644
index 0000000..28b16b7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_mem.c
@@ -0,0 +1,418 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     HTTPs CONTROL LAYER MEMORY
+*
+* Filename      : http-s_ctrl_layer_mem.c
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : None.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define   MICRIUM_SOURCE
+#define   HTTPs_CTRL_LAYER_MEM_MODULE
+#include "http-s_ctrl_layer_mem.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_CTRL_LAYER_MEM_CACHE_LINE_LEN        32u
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsCtrlLayerMem_InstDataAlloc()
+*
+* Description : Dynamically allocate a control layer's instance data structure.
+*
+* Argument(s) : None.
+*
+* Return(s)   : Pointer to Control Layer instance data object.
+*               DEF_NULL if the structure couldn't be allocated.
+*
+* Caller(s)   : HTTPsCtrlLayer_OnInstanceInit().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_INST_DATA  *HTTPsCtrlLayerMem_InstDataAlloc (void)
+{
+    HTTPs_CTRL_LAYER_INST_DATA  *p_seg;
+    LIB_ERR                      err_lib;
+
+
+    p_seg = Mem_SegAlloc("CtllLayer_MemSeg",
+                          0u,
+                          sizeof(HTTPs_CTRL_LAYER_INST_DATA),
+                         &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    return (p_seg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPsCtrlLayerMem_InstDataPoolInit()
+*
+* Description : Initialize the pool of instance data for substitution.
+*
+* Argument(s) : p_seg           Pointer to the Ctrl Layer instance data previously created.
+*
+*               pool_size_max   Size of the pool to allocate.
+*
+* Return(s)   : DEF_OK, if the pool was initialize successfully.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPsCtrlLayer_OnInstanceInit().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayerMem_InstDataPoolInit (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                                 CPU_SIZE_T                   pool_size_max)
+{
+    LIB_ERR   err_lib;
+
+
+    p_seg->InstDataHeadPtr = DEF_NULL;
+
+    Mem_DynPoolCreate("CtrlL_InstData_DynMemPool",
+                      &p_seg->InstDataEntryPool,
+                       0u,
+                       sizeof(HTTPs_CTRL_LAYER_DATA_ENTRY),
+                       HTTPs_CTRL_LAYER_MEM_CACHE_LINE_LEN,
+                       pool_size_max,
+                       pool_size_max,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsCtrlLayerMem_ConnDataPoolInit()
+*
+* Description : Initialize the connection data pool for Ctrl Layer contextual informations.
+*
+* Argument(s) : p_seg           Pointer to the Ctrl Layer instance data previously allocated.
+*
+*               pool_size_max   Maximum size of the pool to allocate. (Number of connection)
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsCtrlLayer_OnInstanceInit().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayerMem_ConnDataPoolInit (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                                 CPU_SIZE_T                   pool_size_max)
+{
+    LIB_ERR   err_lib;
+
+
+    Mem_DynPoolCreate("CtrlLayer_ConnData_DynMemPool",
+                      &p_seg->ConnDataPool,
+                       0u,
+                       sizeof(HTTPs_CTRL_LAYER_CONN_DATA),
+                       HTTPs_CTRL_LAYER_MEM_CACHE_LINE_LEN,
+                       pool_size_max,
+                       pool_size_max,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPsCtrlLayerMem_ConnDataEntryPoolInit()
+*
+* Description : Initialize the pool of connection data for sub layer substitution.
+*
+* Argument(s) : p_seg             Pointer to Control Layer Instance data previously allocated.
+*
+*               pool_size_max     Maximum size of the pool to allocate. (Nb conn * (Max(nbAuth) + 1))
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsCtrlLayer_OnInstanceInit().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsCtrlLayerMem_ConnDataEntryPoolInit (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                                      CPU_SIZE_T                   pool_size_max)
+{
+    LIB_ERR   err_lib;
+
+
+    Mem_DynPoolCreate("CtrlLayer_ConnDataEntry_DynMemPool",
+                      &p_seg->ConnDataEntryPool,
+                       0u,
+                       sizeof(HTTPs_CTRL_LAYER_DATA_ENTRY),
+                       HTTPs_CTRL_LAYER_MEM_CACHE_LINE_LEN,
+                       pool_size_max,
+                       pool_size_max,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsCtrlLayerMem_InstDataEntryAlloc()
+*
+* Description : Allocates an instance data entry for substitution.
+*
+* Argument(s) : p_seg     Pointer to Control Layer instance data previously allocated.
+*
+* Return(s)   : Pointer to Control Layer data entry object allocated.
+*               DEF_NULL  if no data entry could be allocated.
+*
+* Caller(s)   : HTTPsCtrlLayer_InstDataSet().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_DATA_ENTRY  *HTTPsCtrlLayerMem_InstDataEntryAlloc (HTTPs_CTRL_LAYER_INST_DATA  *p_seg)
+{
+    HTTPs_CTRL_LAYER_DATA_ENTRY  *p_inst_data_entry;
+    LIB_ERR                       err_lib;
+
+
+    p_inst_data_entry = (HTTPs_CTRL_LAYER_DATA_ENTRY *)Mem_DynPoolBlkGet(&p_seg->InstDataEntryPool,
+                                                                         &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             p_inst_data_entry->NextPtr = p_seg->InstDataHeadPtr;
+             p_seg->InstDataHeadPtr     = p_inst_data_entry;
+             break;
+
+        default:
+             return (DEF_NULL);
+    }
+
+    return (p_inst_data_entry);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        CtrlL_Alloc_ConnData()
+*
+* Description : Allocates a connection data for the Ctrl Layer.
+*
+* Argument(s) : p_seg     Pointer to Ctrl Layer instance data previously allocated.
+*
+* Return(s)   : Pointer to Ctrl Layer Connection Data object allocated.
+*               DEF_NULL if no ConnData could be allocated.
+*
+* Caller(s)   : HTTPsCtrlLayer_CreateConnDataIfNull().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_CONN_DATA  *HTTPsCtrlLayerMem_ConnDataAlloc (HTTPs_CTRL_LAYER_INST_DATA  *p_seg)
+{
+    HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data;
+    LIB_ERR                      err_lib;
+
+
+    p_conn_data = (HTTPs_CTRL_LAYER_CONN_DATA *)Mem_DynPoolBlkGet(&p_seg->ConnDataPool,
+                                                                  &err_lib);
+
+    if (p_conn_data != DEF_NULL) {
+        p_conn_data->TargetCfgPtr     = DEF_NULL;
+        p_conn_data->TargetAppInstPtr = DEF_NULL;
+        p_conn_data->ConnDataHeadPtr  = DEF_NULL;
+    }
+
+   (void)&err_lib;
+
+    return (p_conn_data);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsCtrlLayer_ConnDataFree()
+*
+* Description : Frees a given ConnData from the pool.
+*
+* Argument(s) : p_seg           Pointer to Ctrl Layer instance data previously allocated.
+*
+*               p_conn_data     Pointer to Ctrl Layer connection data previously allocated.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsCtrlLayer_OnConnClose(),
+*               HTTPsCtrlLayer_OnConnReq().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsCtrlLayer_ConnDataFree (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                   HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data)
+{
+    LIB_ERR  err_lib;
+
+
+    HTTPsCtrlLayer_ConnDataEntriesFree(p_seg,
+                                       p_conn_data);
+
+    Mem_DynPoolBlkFree(        &p_seg->ConnDataPool,
+                       (void *) p_conn_data,
+                               &err_lib);
+
+    (void)&err_lib;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsCtrlLayer_ConnDataEntryAlloc()
+*
+* Description : Allocates a ConnData for substitution.
+*
+* Argument(s) : p_seg         Pointer to Ctrl Layer instance data previously allocated.
+*
+*               p_conn_data   Pointer to Ctrl Layer connection data previously allocated.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsCtrlLayer_ConnDataEntrySet().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_DATA_ENTRY  *HTTPsCtrlLayer_ConnDataEntryAlloc (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                                                 HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data)
+{
+    HTTPs_CTRL_LAYER_DATA_ENTRY  *p_conn_data_entry;
+    LIB_ERR                       err_lib;
+
+
+    p_conn_data_entry = (HTTPs_CTRL_LAYER_DATA_ENTRY *)Mem_DynPoolBlkGet(&p_seg->ConnDataEntryPool,
+                                                                         &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             p_conn_data_entry->NextPtr   = p_conn_data->ConnDataHeadPtr;
+             p_conn_data->ConnDataHeadPtr = p_conn_data_entry;
+             break;
+
+        default:
+             return (DEF_NULL);
+    }
+
+    return (p_conn_data_entry);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsCtrlLayer_ConnDataEntriesFree()
+*
+* Description : Frees all the ConnDataEntry used for substitution.
+*
+* Argument(s) : p_seg         Pointer to Ctrl Layer instance data previously allocated.
+*
+*               p_conn_data   Pointer to Ctrl Layer connection data previously allocated.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsCtrlLayer_ConnDataFree(),
+*               HTTPsCtrlLayer_OnConnReq().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsCtrlLayer_ConnDataEntriesFree (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                          HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data)
+{
+    HTTPs_CTRL_LAYER_DATA_ENTRY  *p_current;
+    HTTPs_CTRL_LAYER_DATA_ENTRY  *p_entry_to_del;
+    LIB_ERR                       err_lib;
+
+
+    p_current = p_conn_data->ConnDataHeadPtr;
+
+    while (p_current != DEF_NULL) {
+
+        p_entry_to_del = p_current;
+        p_current      = p_current->NextPtr;
+
+        Mem_DynPoolBlkFree(       &p_seg->ConnDataEntryPool,
+                           (void *)p_entry_to_del,
+                                  &err_lib);
+
+    }
+
+    p_conn_data->ConnDataHeadPtr = DEF_NULL;
+
+    (void)&err_lib;
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_mem.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_mem.h
new file mode 100644
index 0000000..98d684d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_mem.h
@@ -0,0 +1,101 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTPs CONTROL LAYER MEMORY
+*
+* Filename      : http-s_ctrl_layer_mem.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef HTTPs_CTRL_LAYER_MEM_MODULE_PRESENT
+#define HTTPs_CTRL_LAYER_MEM_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include "http-s_ctrl_layer.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_INST_DATA   *HTTPsCtrlLayerMem_InstDataAlloc         (void);
+
+CPU_BOOLEAN                   HTTPsCtrlLayerMem_InstDataPoolInit      (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                                                       CPU_SIZE_T                   pool_size_max);
+
+CPU_BOOLEAN                   HTTPsCtrlLayerMem_ConnDataPoolInit      (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                                                       CPU_SIZE_T                   pool_size_max);
+
+CPU_BOOLEAN                   HTTPsCtrlLayerMem_ConnDataEntryPoolInit (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                                                       CPU_SIZE_T                   pool_size_max);
+
+HTTPs_CTRL_LAYER_DATA_ENTRY  *HTTPsCtrlLayerMem_InstDataEntryAlloc    (HTTPs_CTRL_LAYER_INST_DATA  *p_seg);
+
+HTTPs_CTRL_LAYER_CONN_DATA   *HTTPsCtrlLayerMem_ConnDataAlloc         (HTTPs_CTRL_LAYER_INST_DATA  *p_seg);
+
+void                          HTTPsCtrlLayer_ConnDataFree             (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                                                       HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data);
+
+HTTPs_CTRL_LAYER_DATA_ENTRY  *HTTPsCtrlLayer_ConnDataEntryAlloc       (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                                                       HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data);
+
+void                          HTTPsCtrlLayer_ConnDataEntriesFree      (HTTPs_CTRL_LAYER_INST_DATA  *p_seg,
+                                                                       HTTPs_CTRL_LAYER_CONN_DATA  *p_conn_data);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* HTTPs_CTRL_LAYER_MEM_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_rest_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_rest_cfg.c
new file mode 100644
index 0000000..f765525
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_rest_cfg.c
@@ -0,0 +1,74 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTPs CONTROL LAYER REST CONFIGURATION
+*
+* Filename      : http-s_ctrl_layer_rest_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define   MICRIUM_SOURCE
+#define   HTTPs_CTRL_LAYER_REST_CFG_MODULE
+#include "http-s_ctrl_layer_rest_cfg.h"
+#include "../REST/http-s_rest.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_CTRL_LAYER_APP_HOOKS HTTPsCtrlLayer_REST_App = {
+        HTTPsREST_Init,
+        HTTPsREST_RxHeader,
+        HTTPsREST_Authenticate,
+        HTTPsREST_RxBody,
+        HTTPsREST_ReqRdySignal,
+        DEF_NULL,                                               /* Poll not used by REST. Same mechanism replaced by GET_CHUNK and RX_BODY */
+        DEF_NULL,                                               /* Headers will be added before the chunk call */
+        DEF_NULL,                                               /* No token replacement for REST */
+        HTTPsREST_GetChunk,
+        HTTPsREST_OnTransComplete,
+        DEF_NULL,                                               /* If there is a connection error, it is most likely not recoverable. */
+        HTTPsREST_OnConnClosed
+};
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_rest_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_rest_cfg.h
new file mode 100644
index 0000000..6628fcc
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/CtrlLayer/http-s_ctrl_layer_rest_cfg.h
@@ -0,0 +1,79 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 HTTPs CONTROL LAYER REST CONFIGURATION
+*
+* Filename      : http-s_ctrl_layer_rest_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef HTTPs_CTRL_LAYER_REST_CFG_MODULE_PRESENT
+#define HTTPs_CTRL_LAYER_REST_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include "http-s_ctrl_layer.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  HTTPs_CTRL_LAYER_APP_HOOKS  HTTPsCtrlLayer_REST_App;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#endif /* HTTPs_CTRL_LAYER_REST_CFG_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest.c
new file mode 100644
index 0000000..2615f4d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest.c
@@ -0,0 +1,900 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           HTTPs REST
+*
+* Filename      : http-s_rest.c
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : None.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  HTTPs_REST_MODULE
+#include "http-s_rest.h"
+#include "http-s_rest_mem.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_REST_CHAR_PATTERN_END                '\0'
+#define  HTTPs_REST_CHAR_PATTERN_WILDCARD_START     '{'
+#define  HTTPs_REST_CHAR_PATTERN_WILDCARD_END       '}'
+#define  HTTPs_REST_CHAR_PATTERN_SEP                '/'
+#define  HTTPs_REST_CHAR_PATTERN_INVALID            '\\'
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S            HTTPsREST_URI_CmpPattern     (const CPU_CHAR                *p_pattern,
+                                                                  HTTPs_REST_MATCHED_URI  *p_result);
+
+static  CPU_BOOLEAN           HTTPsREST_ValidatePatternStr (const CPU_CHAR                *p_pattern_str);
+
+static  HTTPs_REST_HOOK_FNCT  HTTPsREST_FindMethodHook     (      HTTP_METHOD              method,
+                                                                  HTTPs_REST_METHOD_HOOKS  method_hooks);
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsREST_Publish()
+*
+* Description : This function adds a resource to a list of resources.
+*
+* Argument(s) : p_resource  Pointer to the rest resource to publish.
+*
+*               list_ID     Identification of the list to publish on.
+*
+*               p_err       Error indicator on publish
+*                           It can be :
+*                               REST_ERR_PUBLISH_INVALID_PATTERN_STRING
+*                               REST_ERR_PUBLISH_MEMORY_NOT_INITIALIZED
+*                               REST_ERR_PUBLISH_INSTANCES_NOT_STOPPED
+*                               REST_ERR_NONE
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) It must be called after the HTTP-s initialization and before HTTP-s start.
+*********************************************************************************************************
+*/
+
+void  HTTPsREST_Publish (const HTTPs_REST_RESOURCE  *p_resource,
+                               CPU_INT32U            list_ID,
+                               HTTPs_REST_ERR       *p_err)
+{
+    CPU_BOOLEAN  is_valid;
+    CPU_BOOLEAN  result;
+
+
+    is_valid = HTTPsREST_ValidatePatternStr(p_resource->PatternPtr);
+    if (is_valid != DEF_OK) {
+       *p_err = HTTPs_REST_ERR_PUBLISH_INVALID_PATTERN_STRING;
+    }
+
+    if (HTTPs_InstanceInitializedNbr == 0) {
+       *p_err = HTTPs_REST_ERR_PUBLISH_MEMORY_NOT_INITIALIZED;
+
+    } else if(HTTPs_InstanceRunningNbr != 0) {
+       *p_err = HTTPs_REST_ERR_PUBLISH_INSTANCES_NOT_STOPPED;
+
+    } else {
+        result = HTTPsREST_Mem_AllocResource(list_ID, p_resource);
+        if (result != DEF_OK) {
+            *p_err = HTTPs_REST_ERR_PUBLISH_NOT_ENOUGH_MEMORY;
+             return;
+        }
+       *p_err = HTTPs_REST_ERR_NONE;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                              HTTPsREST_Init()
+*
+* Description : Initialize REST pools.
+*
+* Argument(s) : p_instance  Pointer to HTTPs Instance object.
+*
+*               p_cfg       Pointer to REST configuration object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application's Hooks configuration.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsREST_Init (const  HTTPs_INSTANCE  *p_instance,
+                             const  void            *p_cfg)
+{
+    HTTPs_REST_INST_DATA  *p_inst_data;
+
+
+    p_inst_data = HTTPsREST_Mem_Init_Pools(p_instance->CfgPtr->ConnNbrMax);
+    if (p_inst_data == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    ((HTTPs_INSTANCE*)p_instance)->DataPtr = p_inst_data;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsREST_Authenticate()
+*
+* Description : REST authentication hook function.
+*
+* Argument(s) : p_instance  Pointer to HTTPs Instance object.
+*
+*               p_conn      Pointer to HTTPs Connection object.
+*
+*               p_cfg       Pointer to REST Configuration object.
+*
+* Return(s)   : DEF_OK,   if authentication was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application's Hooks configuration.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsREST_Authenticate(const   HTTPs_INSTANCE  *p_instance,
+                                            HTTPs_CONN      *p_conn,
+                                    const   void            *p_cfg)
+{
+           HTTPs_REST_CFG            *p_rest_cfg;
+    const  HTTPs_REST_RESOURCE       *p_resource;
+           HTTPs_REST_REQUEST        *p_req;
+    const  HTTPs_REST_RESOURCE       *p_r;
+           HTTPs_REST_INST_DATA      *p_inst_data;
+           HTTPs_REST_RESOURCE_LIST  *p_list;
+           SLIST_MEMBER              *p_head;
+           HTTPs_REST_RESOURCE_ENTRY *p_entry;
+           HTTPs_REST_HOOK_FNCT       method_hook;
+           HTTPs_REST_HOOK_STATE      state;
+           CPU_INT16S                 cmp_result;
+
+
+    p_rest_cfg  = (HTTPs_REST_CFG *)p_cfg;
+    p_resource  =  DEF_NULL;
+    p_inst_data = (HTTPs_REST_INST_DATA*)p_instance->DataPtr;
+
+    p_list      =  HTTPsREST_Mem_GetResourceList(p_rest_cfg->listID);
+    if (p_list == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    p_req = HTTPsREST_Mem_AllocRequest(p_inst_data);
+                                                                /* If there is no more memory to alloc ...              */
+                                                                /* ... this request can't be handled.                   */
+    if (p_req == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    p_req->URI.ParsedURI.PathPtr = p_conn->PathPtr;
+    p_req->URI.ParsedURI.PathLen = Str_Len(p_conn->PathPtr);
+
+    p_head     = (SLIST_MEMBER*)p_list->ListHeadPtr;
+
+                                                                /* Find the matching resource.                          */
+    SLIST_FOR_EACH_ENTRY(p_head,
+                         p_entry,
+                         HTTPs_REST_RESOURCE_ENTRY,
+                         ListNode)
+    {
+        p_r = p_entry->ResourcePtr;
+
+        cmp_result = HTTPsREST_URI_CmpPattern(p_r->PatternPtr, &(p_req->URI));
+        if (cmp_result == 0) {
+            p_resource = p_r;
+            break;
+        }
+    }
+                                                                /* If there is no resource matching the given URI, the status is unknown*/
+                                                                /* And should be handled by the caller                  */
+    if (p_resource == DEF_NULL) {
+        HTTPsREST_Mem_FreeRequest(p_inst_data, p_req);
+        return (DEF_FAIL);
+    }
+
+    method_hook = HTTPsREST_FindMethodHook(p_conn->Method,
+                                           p_resource->MethodHooks);
+    if (method_hook == DEF_NULL) {
+        HTTPsREST_Mem_FreeRequest(p_inst_data, p_req);
+        return (DEF_FAIL);
+    }
+
+    state = method_hook(p_resource,
+                       &p_req->URI,
+                        HTTPs_REST_STATE_INIT,
+                       &p_req->DataPtr,
+                        p_instance,
+                        p_conn,
+                        DEF_NULL,
+                        0,
+                        DEF_NULL);
+
+    if (state == HTTPs_REST_HOOK_STATE_ERROR) {
+        HTTPsREST_Mem_FreeRequest(p_inst_data, p_req);
+        return (DEF_FAIL);
+    }
+
+    p_req->ResourcePtr  = p_resource;
+    p_req->Hook         = method_hook;
+
+    p_conn->ConnDataPtr = p_req;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsREST_RxHeader()
+*
+* Description : Called upon HTTP-s header parsing. Determines if an header should be kept or not.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer HTTPs connection object.
+*
+*               p_cfg       Pointer to REST configuration object.
+*
+*               hdr_field   Header field to make the choice on.
+*
+* Return(s)   : DEF_YES  if the header should be saved.
+*               DEF_NO   otherwise.
+*
+* Caller(s)   : Application's Hooks configuration.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsREST_RxHeader (const   HTTPs_INSTANCE   *p_instance,
+                                 const   HTTPs_CONN       *p_conn,
+                                 const   void             *p_cfg,
+                                         HTTP_HDR_FIELD    hdr_field)
+{
+           HTTPs_REST_CFG             *p_rest_cfg;
+           HTTPs_REST_RESOURCE_LIST   *p_list;
+           SLIST_MEMBER               *p_head;
+           HTTPs_REST_RESOURCE_ENTRY  *p_entry;
+    const  HTTPs_REST_RESOURCE        *p_resource;
+           CPU_INT16U                  i;
+
+
+    p_rest_cfg = (HTTPs_REST_CFG*)p_cfg;
+
+    p_list     =  HTTPsREST_Mem_GetResourceList(p_rest_cfg->listID);
+    if (p_list == DEF_NULL) {
+        return (DEF_NO);
+    }
+
+    p_head     = (SLIST_MEMBER*)p_list->ListHeadPtr;
+
+                                                                /* Find the matching resource.                          */
+    SLIST_FOR_EACH_ENTRY(p_head,
+                         p_entry,
+                         HTTPs_REST_RESOURCE_ENTRY,
+                         ListNode)
+    {
+        p_resource = p_entry->ResourcePtr;
+        for (i = 0; i < p_resource->HTTP_HdrsNbr; ++i) {
+            if (p_resource->HTTP_Hdrs[i] == hdr_field) {
+                return (DEF_YES);
+            }
+        }
+    }
+
+    return (DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPsREST_RxBody()
+*
+* Description : Received the body from the HTTP server.
+*
+* Argument(s) : p_instance       Pointer to HTTPs Instance object.
+*
+*               p_conn           Pointer to HTTPs Connection object.
+*
+*               p_cfg            Pointer to REST Configuration object.
+*
+*               p_buf            Pointer to the data buffer.
+*
+*               buf_size         Size of the data rx available inside the buffer.
+*
+*               p_buf_size_used  Pointer to the variable that will received the length of the data consumed by the app.
+*
+* Return(s)   : DEF_YES    To continue with the data reception.
+*               DEF_NO     If the application doesn't want to rx data anymore.
+*
+* Caller(s)   : Application's Hooks configuration.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsREST_RxBody(const  HTTPs_INSTANCE  *p_instance,
+                                     HTTPs_CONN      *p_conn,
+                              const  void            *p_cfg,
+                                     void            *p_buf,
+                              const  CPU_SIZE_T       buf_size,
+                                     CPU_SIZE_T      *p_buf_size_used)
+{
+    HTTPs_REST_REQUEST     *p_req;
+    HTTPs_REST_HOOK_FNCT    method_hook;
+    HTTPs_REST_HOOK_STATE   state;
+
+
+    if (p_conn->ConnDataPtr == DEF_NULL) {
+        return (DEF_OK);
+    }
+
+    p_req       = (HTTPs_REST_REQUEST *)p_conn->ConnDataPtr;
+    method_hook = p_req->Hook;
+
+    state = method_hook(p_req->ResourcePtr,
+                       &p_req->URI,
+                        HTTPs_REST_STATE_RX,
+                       &p_req->DataPtr,
+                        p_instance,
+                        p_conn,
+                        p_buf,
+                        buf_size,
+                        p_buf_size_used);
+
+    switch (state) {
+        case HTTPs_REST_HOOK_STATE_CONTINUE:
+            *p_buf_size_used = buf_size;
+             return (DEF_YES);
+
+        case HTTPs_REST_HOOK_STATE_STAY:
+             return (DEF_YES);
+
+        default:
+             p_conn->StatusCode = HTTP_STATUS_INTERNAL_SERVER_ERR;
+             p_conn->ErrCode    = HTTPs_ERR_STATE_UNKNOWN;
+             return (DEF_NO);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsREST_ReqRdySignal()
+*
+* Description : Called upon request parsing completion by HTTP server.
+*               This function signals the REST resource that it is its last chance to modify the connection.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_cfg       Pointer to REST configuration object.
+*
+*               p_data      UNUSED
+*
+* Return(s)   : DEF_OK    if the response is ready.
+*               DEF_FAIL  otherwise.
+*
+* Caller(s)   : Application's Hooks configuration.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsREST_ReqRdySignal (const  HTTPs_INSTANCE  *p_instance,
+                                            HTTPs_CONN      *p_conn,
+                                     const  void            *p_cfg,
+                                     const  HTTPs_KEY_VAL  *p_data)
+{
+    HTTPs_REST_REQUEST     *p_req;
+    HTTPs_REST_HOOK_STATE   state;
+
+
+    if (p_conn->ConnDataPtr == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    p_req = (HTTPs_REST_REQUEST *)p_conn->ConnDataPtr;
+
+    state = p_req->Hook(p_req->ResourcePtr,
+                       &p_req->URI,
+                        HTTPs_REST_STATE_RX,
+                       &p_req->DataPtr,
+                        p_instance,
+                        p_conn,
+                        DEF_NULL,
+                        0,
+                        DEF_NULL);
+
+    if (state == HTTPs_REST_HOOK_STATE_ERROR) {
+        p_conn->StatusCode = HTTP_STATUS_INTERNAL_SERVER_ERR;
+        p_conn->ErrCode    = HTTPs_ERR_STATE_UNKNOWN;
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsREST_GetChunk()
+*
+* Description : Called after the HTTP response headers have been sent to create the body chunk by chunk.
+*               Only called if the the HTTP-s connection's BODY_DATA_TYPE is set to CHUNKED_DATA.
+*
+* Argument(s) : p_instance      Pointer to HTTPs instance object.
+*
+*               p_conn          Pointer to HTTPs connection object.
+*
+*               p_cfg           Pointer to REST configuration object.
+*
+*               p_buf           Pointer to the data buffer start.
+*
+*               buf_len_max     Maximum length in bytes that can be written from buffer address.
+*
+*               len_tx          Variable that will received the length of bytes written.
+*
+* Return(s)   : DEF_YES        if there is no more data to send on this response.
+*               DEF_NO         otherwise.
+*
+* Caller(s)   : Application's Hooks configuration.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsREST_GetChunk (const  HTTPs_INSTANCE  *p_instance,
+                                        HTTPs_CONN      *p_conn,
+                                 const  void            *p_hook_cfg,
+                                        void            *p_buf,
+                                        CPU_SIZE_T       buf_len_max,
+                                        CPU_SIZE_T      *len_tx)
+{
+    HTTPs_REST_REQUEST    *p_req;
+    HTTPs_REST_HOOK_FNCT   method_hook;
+    HTTPs_REST_HOOK_STATE  state;
+
+
+    if (p_conn->ConnDataPtr == DEF_NULL) {
+        return (DEF_YES);
+    }
+
+    p_req       = (HTTPs_REST_REQUEST *)p_conn->ConnDataPtr;
+    method_hook = p_req->Hook;
+
+    state = method_hook(p_req->ResourcePtr,
+                       &p_req->URI,
+                        HTTPs_REST_STATE_TX,
+                       &p_req->DataPtr,
+                        p_instance,
+                        p_conn,
+                        p_buf,
+                        buf_len_max,
+                        len_tx);
+
+    switch (state) {
+        case HTTPs_REST_HOOK_STATE_CONTINUE:
+             return (DEF_YES);
+
+        case HTTPs_REST_HOOK_STATE_STAY:
+             return (DEF_NO);
+
+        default:
+             return (DEF_YES);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsREST_OnTransComplete()
+*
+* Description : Called when an HTTP Transaction has been completed.
+*               Frees the connection allocated REST memory.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               p_cfg       Pointer to REST configuration object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsCtrlLayer_REST_App.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsREST_OnTransComplete (const  HTTPs_INSTANCE  *p_instance,
+                                        HTTPs_CONN      *p_conn,
+                                 const  void            *p_cfg)
+{
+    HTTPs_REST_INST_DATA  *p_inst_data;
+    HTTPs_REST_REQUEST    *p_req;
+
+
+    if (p_conn->ConnDataPtr == DEF_NULL) {
+        return;
+    }
+
+    p_inst_data = (HTTPs_REST_INST_DATA*)p_instance->DataPtr;
+    p_req       = (HTTPs_REST_REQUEST *)p_conn->ConnDataPtr;
+
+    p_req->Hook(p_req->ResourcePtr,
+               &p_req->URI,
+                HTTPs_REST_STATE_CLOSE,
+               &p_req->DataPtr,
+                p_instance,
+                p_conn,
+                DEF_NULL,
+                0,
+                DEF_NULL);
+
+    HTTPsREST_Mem_FreeRequest(p_inst_data, p_req);
+
+    p_conn->ConnDataPtr = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsREST_OnConnClosed()
+*
+* Description : Called upon HTTP-s connection closed. Frees the connection allocated REST memory.
+*
+* Argument(s) : p_instance      Pointer to HTTPs instance object.
+*
+*               p_conn          Pointer to HTTPs connection object.
+*
+*               p_cfg           Pointer to REST configuration object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application's Hooks configuration.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsREST_OnConnClosed (const  HTTPs_INSTANCE  *p_instance,
+                                     HTTPs_CONN      *p_conn,
+                              const  void            *p_cfg)
+{
+    HTTPs_REST_INST_DATA  *p_inst_data;
+    HTTPs_REST_REQUEST    *p_req;
+
+
+    if (p_conn->ConnDataPtr == DEF_NULL) {
+        return;
+    }
+
+    p_inst_data = (HTTPs_REST_INST_DATA*)p_instance->DataPtr;
+    p_req       = (HTTPs_REST_REQUEST *)p_conn->ConnDataPtr;
+
+    p_req->Hook(p_req->ResourcePtr,
+               &p_req->URI,
+                HTTPs_REST_STATE_CLOSE,
+               &p_req->DataPtr,
+                p_instance,
+                p_conn,
+                DEF_NULL,
+                0,
+                DEF_NULL);
+
+    HTTPsREST_Mem_FreeRequest(p_inst_data, p_req);
+
+    p_conn->ConnDataPtr = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsREST_ResourceListCompare()
+*
+* Description : Compares two Resources of a list.
+*
+* Argument(s) : p_item_l    left REST resource
+*
+*               p_item_r    right REST resource
+*
+* Return(s)   : DEF_TRUE    if right is lesser or equal to right.
+*               DEF_FALSE   otherwise.
+*
+* Caller(s)   : REST_Alloc_Resource().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsREST_ResourceListCompare (SLIST_MEMBER   *p_item_l,
+                                            SLIST_MEMBER   *p_item_r)
+{
+    const  HTTPs_REST_RESOURCE  *p_left;
+    const  HTTPs_REST_RESOURCE  *p_right;
+
+
+    p_left  = (CONTAINER_OF(p_item_l, HTTPs_REST_RESOURCE_ENTRY, ListNode))->ResourcePtr;
+    p_right = (CONTAINER_OF(p_item_r, HTTPs_REST_RESOURCE_ENTRY, ListNode))->ResourcePtr;
+
+    return Str_Cmp(p_left->PatternPtr, p_right->PatternPtr) <= 0;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        HTTPsREST_URI_CmpPattern()
+*
+* Description : Compare URI to a pattern for a match.
+*
+* Argument(s) : p_pattern   Pattern to be matched.
+*
+*               p_result    Result structure with the URI to match.
+*
+* Return(s)   : 0           if it matches.
+*               Not 0       otherwise
+*
+* Caller(s)   : HTTPsREST_Authenticate().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  HTTPsREST_URI_CmpPattern (const CPU_CHAR                *p_pattern,
+                                                    HTTPs_REST_MATCHED_URI  *p_result)
+{
+    HTTPs_REST_KEY_VAL  *p_current_wildcard;
+    CPU_CHAR            *p_path;
+    CPU_SIZE_T           path_len;
+    CPU_SIZE_T           path_char_consumed_nbr;
+
+
+    p_path                 = p_result->ParsedURI.PathPtr;
+    path_len               = p_result->ParsedURI.PathLen;
+    path_char_consumed_nbr = 0;
+    p_result->WildCardsNbr = 0;
+
+                                                                /* Until the end of pattern is found                    */
+    while (*p_pattern != HTTPs_REST_CHAR_PATTERN_END) {
+
+        switch (*p_pattern) {
+                                                                /* If the pattern character is a wild card              */
+                                                                /* Important note: KeyLen != ValLen.                    */
+                                                                /* So, the pattern and the URI aren't consumed equally. */
+            case HTTPs_REST_CHAR_PATTERN_WILDCARD_START:
+
+                 ++p_pattern;                                   /* Consume the wild card opening char                   */
+
+                 p_current_wildcard         = &(p_result->WildCards[p_result->WildCardsNbr]);
+                 p_current_wildcard->KeyPtr = p_pattern;
+
+                                                                /* Find the end of the wild card key                    */
+                 while (*p_pattern != HTTPs_REST_CHAR_PATTERN_WILDCARD_END) {
+                     ++p_pattern;
+                     ++(p_current_wildcard->KeyLen);
+                 }
+
+                 ++p_pattern;                                   /* Consume the wild card closing char                   */
+
+                 p_current_wildcard->ValPtr = p_path;
+
+                 if (*p_pattern != HTTPs_REST_CHAR_PATTERN_END) {
+
+                     while ((*p_path                 != HTTPs_REST_CHAR_PATTERN_SEP) &&
+                            ( path_char_consumed_nbr  < path_len)                   ) {
+                         ++p_path;
+                         ++(p_current_wildcard->ValLen);
+                         ++path_char_consumed_nbr;
+                     }
+
+                     path_char_consumed_nbr += p_current_wildcard->ValLen;
+
+                 } else {
+
+                     p_current_wildcard->ValLen = path_len - path_char_consumed_nbr;
+                     path_char_consumed_nbr = path_len;
+                 }
+
+                 p_result->WildCardsNbr++;                      /* Increment the number of wild cards parsed.           */
+                 break;
+
+
+            default:                                            /* Otherwise,                                           */
+                 if (*p_pattern == *p_path) {                   /* Compare both chars.                                  */
+                                                                /* If they match, increment all the counters.           */
+                     ++p_pattern;
+                     ++p_path;
+                     ++path_char_consumed_nbr;
+
+                 } else if ((*p_path       == HTTPs_REST_CHAR_PATTERN_END)            &&
+                            (*p_pattern    == HTTPs_REST_CHAR_PATTERN_SEP)            &&
+                            ( p_pattern[1] == HTTPs_REST_CHAR_PATTERN_WILDCARD_START)) {
+                                                                     /* if it is a wild card.                                */
+                     ++p_pattern;
+
+                 } else {
+                                                                     /* Otherwise, they are different return the difference. */
+                     return (*p_pattern - *p_path);
+                 }
+                 break;
+        }
+    }
+
+    return (path_len - path_char_consumed_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsREST_ValidatePatternStr()
+*
+* Description : Validates a REST pattern string.
+*
+* Argument(s) : p_pattern_str  The pattern string to validate.
+*
+* Return(s)   : DEF_OK   if the pattern string is valid.
+*               DEF_FAIL otherwise.
+*
+* Caller(s)   : HTTPsREST_Publish().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPsREST_ValidatePatternStr (const  CPU_CHAR  *p_pattern_str)
+{
+    CPU_INT16U   i;
+    CPU_BOOLEAN  wildcard_opened;
+
+
+    wildcard_opened = DEF_FAIL;
+
+    for (i = 0; p_pattern_str[i] != HTTPs_REST_CHAR_PATTERN_END; ++i) {
+
+        switch (p_pattern_str[i]) {
+            case HTTPs_REST_CHAR_PATTERN_WILDCARD_START:
+                 if((wildcard_opened      == DEF_OK)                      ||
+                    (i                    == 0)                           ||
+                    (p_pattern_str[i - 1] != HTTPs_REST_CHAR_PATTERN_SEP)) {
+                     return (DEF_FAIL);
+                 } else {
+                     wildcard_opened = DEF_OK;
+                 }
+                 break;
+
+
+            case HTTPs_REST_CHAR_PATTERN_WILDCARD_END:
+                 if( (wildcard_opened != DEF_OK)                             ||
+                     (i               == 0)                                  ||
+                     ((p_pattern_str[i + 1] != HTTPs_REST_CHAR_PATTERN_SEP)  &&
+                      (p_pattern_str[i + 1] != HTTPs_REST_CHAR_PATTERN_END))) {
+                     return (DEF_FAIL);
+                 } else {
+                     wildcard_opened = DEF_FAIL;
+                 }
+                 break;
+
+
+            case HTTPs_REST_CHAR_PATTERN_INVALID:
+                 return (DEF_FAIL);
+
+
+            default:
+                 break;
+        }
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsREST_FindMethodHook()
+*
+* Description : Finds the hook function associated with the specified method
+*
+* Argument(s) : method          HTTP-s method of the request.
+*
+*               method_hooks    REST hooks of the current resource.
+*
+* Return(s)   : DEF_NULL        if no function is specified for the method provided.
+*               REST_HOOK_FNCT  otherwise.
+*
+* Caller(s)   : HTTPsREST_Authenticate().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_FNCT  HTTPsREST_FindMethodHook (HTTP_METHOD              method,
+                                                        HTTPs_REST_METHOD_HOOKS  method_hooks)
+{
+    switch (method) {
+        case HTTP_METHOD_GET:
+             return (method_hooks.Get);
+
+        case HTTP_METHOD_HEAD:
+             return (method_hooks.Head);
+
+        case HTTP_METHOD_DELETE:
+             return (method_hooks.Delete);
+
+        case HTTP_METHOD_POST:
+             return (method_hooks.Post);
+
+        case HTTP_METHOD_PUT:
+             return (method_hooks.Put);
+
+        default:
+             return (DEF_NULL);
+    }
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest.h
new file mode 100644
index 0000000..127b522
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest.h
@@ -0,0 +1,360 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            HTTPs REST
+*
+* Filename      : http-s_rest.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef HTTPs_REST_MODULE_PRESENT
+#define HTTPs_REST_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+#include 
+
+#include "../../Source/http-s.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define HTTPs_REST_MAX_URI_WILD_CARD           5
+
+#define HTTPs_REST_MAX_PUBLISHED_RESOURCE     50
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            REST STATE TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  https_rest_state {
+    HTTPs_REST_STATE_INIT,
+    HTTPs_REST_STATE_RX,
+    HTTPs_REST_STATE_ERROR,
+    HTTPs_REST_STATE_TX,
+    HTTPs_REST_STATE_CLOSE,
+} HTTPs_REST_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                           REST HOOK STATE TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  https_rest_hook_state {
+    HTTPs_REST_HOOK_STATE_ERROR,
+    HTTPs_REST_HOOK_STATE_CONTINUE,
+    HTTPs_REST_HOOK_STATE_STAY,
+} HTTPs_REST_HOOK_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                             REST ERROR TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  https_rest_err {
+    HTTPs_REST_ERR_NONE,
+    HTTPs_REST_ERR_PUBLISH_INSTANCES_NOT_STOPPED,
+    HTTPs_REST_ERR_PUBLISH_MEMORY_NOT_INITIALIZED,
+    HTTPs_REST_ERR_PUBLISH_NOT_ENOUGH_MEMORY,
+    HTTPs_REST_ERR_PUBLISH_INVALID_PATTERN_STRING
+}  HTTPs_REST_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                       REST KEY-VALUE PAIR TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_rest_key_val {
+    const   CPU_CHAR     *KeyPtr;
+            CPU_SIZE_T    KeyLen;
+    const   CPU_CHAR     *ValPtr;
+            CPU_SIZE_T    ValLen;
+} HTTPs_REST_KEY_VAL;
+
+
+/*
+*********************************************************************************************************
+*                                          REST PARSED URI TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_rest_parsed_uri {
+    CPU_CHAR     *PathPtr;
+    CPU_SIZE_T    PathLen;
+} HTTPs_REST_PARSED_URI;
+
+
+/*
+*********************************************************************************************************
+*                                          REST MATCHED URI TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct https_rest_matched_uri {
+    HTTPs_REST_PARSED_URI  ParsedURI;
+    HTTPs_REST_KEY_VAL     WildCards[HTTPs_REST_MAX_URI_WILD_CARD];
+    CPU_SIZE_T             WildCardsNbr;
+} HTTPs_REST_MATCHED_URI;
+
+
+/*
+*********************************************************************************************************
+*                                          REST HOOK FUNCTION TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_rest_resource  HTTPs_REST_RESOURCE;
+
+typedef  HTTPs_REST_HOOK_STATE  (*HTTPs_REST_HOOK_FNCT)  (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                          const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                          const  HTTPs_REST_STATE          state,
+                                                                 void                    **p_data,
+                                                          const  HTTPs_INSTANCE           *p_instance,
+                                                                 HTTPs_CONN               *p_conn,
+                                                                 void                     *p_buf,
+                                                          const  CPU_SIZE_T                buf_size,
+                                                                 CPU_SIZE_T               *p_buf_size_used);
+
+/*
+*********************************************************************************************************
+*                                             REST METHOD HOOKS TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_rest_method_hooks {
+    HTTPs_REST_HOOK_FNCT  Delete;
+    HTTPs_REST_HOOK_FNCT  Get;
+    HTTPs_REST_HOOK_FNCT  Head;
+    HTTPs_REST_HOOK_FNCT  Post;
+    HTTPs_REST_HOOK_FNCT  Put;
+} HTTPs_REST_METHOD_HOOKS;
+
+
+/*
+*********************************************************************************************************
+*                                              REST RESOURCE TYPE
+*********************************************************************************************************
+*/
+
+struct  https_rest_resource {
+    const   CPU_CHAR                 *PatternPtr;               /* Access path to the resource ending with an EOF char. */
+    const   HTTP_HDR_FIELD           *HTTP_Hdrs;                /* HTTP headers to keep.                                */
+    const   CPU_SIZE_T                HTTP_HdrsNbr;
+    const   HTTPs_REST_METHOD_HOOKS   MethodHooks;
+};
+
+
+/*
+*********************************************************************************************************
+*                                           REST RESOURCE ENTRY TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_rest_resource_entry {
+     const  HTTPs_REST_RESOURCE    *ResourcePtr;
+            SLIST_MEMBER            ListNode;
+} HTTPs_REST_RESOURCE_ENTRY;
+
+
+/*
+*********************************************************************************************************
+*                                          REST CONFIGURATION TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_rest_cfg {
+    const  CPU_INT32U   listID;
+} HTTPs_REST_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                         REST RESOURCE LIST TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_rest_resource_list {
+    CPU_INT32U     Id;
+    SLIST_MEMBER  *ListHeadPtr;
+    SLIST_MEMBER   ListNode;
+} HTTPs_REST_RESOURCE_LIST;
+
+
+/*
+*********************************************************************************************************
+*                                           REST REQUEST TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_rest_request {
+     const  HTTPs_REST_RESOURCE     *ResourcePtr;
+            HTTPs_REST_MATCHED_URI   URI;
+            HTTPs_REST_HOOK_FNCT     Hook;
+            void                    *DataPtr;
+} HTTPs_REST_REQUEST;
+
+
+/*
+*********************************************************************************************************
+*                                    REST HTTP INSTANCE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_rest_inst_data {
+     MEM_DYN_POOL    Pool;
+} HTTPs_REST_INST_DATA;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        API FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void         HTTPsREST_Publish             (const  HTTPs_REST_RESOURCE  *p_resource,
+                                                   CPU_INT32U            list_ID,
+                                                   HTTPs_REST_ERR       *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                      HOOK FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsREST_Init                (const  HTTPs_INSTANCE       *p_instance,
+                                            const  void                 *p_cfg);
+
+CPU_BOOLEAN  HTTPsREST_Authenticate        (const  HTTPs_INSTANCE       *p_instance,
+                                                   HTTPs_CONN           *p_conn,
+                                            const  void                 *p_cfg);
+
+CPU_BOOLEAN  HTTPsREST_RxHeader            (const  HTTPs_INSTANCE       *p_instance,
+                                            const  HTTPs_CONN           *p_conn,
+                                            const  void                 *p_cfg,
+                                                   HTTP_HDR_FIELD        hdr_field);
+
+CPU_BOOLEAN  HTTPsREST_RxBody              (const  HTTPs_INSTANCE       *p_instance,
+                                                   HTTPs_CONN           *p_conn,
+                                            const  void                 *p_cfg,
+                                                   void                 *p_buf,
+                                            const  CPU_SIZE_T            buf_size,
+                                                   CPU_SIZE_T           *p_buf_size_used);
+
+CPU_BOOLEAN  HTTPsREST_ReqRdySignal        (const  HTTPs_INSTANCE       *p_instance,
+                                                   HTTPs_CONN           *p_conn,
+                                            const  void                 *p_cfg,
+                                            const  HTTPs_KEY_VAL       *p_data);
+
+CPU_BOOLEAN  HTTPsREST_GetChunk            (const  HTTPs_INSTANCE       *p_instance,
+                                                   HTTPs_CONN           *p_conn,
+                                            const  void                 *p_cfg,
+                                                   void                 *p_buf,
+                                                   CPU_SIZE_T            buf_len_max,
+                                                   CPU_SIZE_T           *len_tx);
+
+void         HTTPsREST_OnTransComplete     (const  HTTPs_INSTANCE       *p_instance,
+                                                   HTTPs_CONN           *p_conn,
+                                            const  void                 *p_cfg);
+
+void         HTTPsREST_OnConnClosed        (const  HTTPs_INSTANCE       *p_instance,
+                                                   HTTPs_CONN           *p_conn,
+                                            const  void                 *p_cfg);
+
+
+/*
+*********************************************************************************************************
+*                                     INTERNAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsREST_ResourceListCompare (       SLIST_MEMBER         *p_item_l,
+                                                   SLIST_MEMBER         *p_item_r);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* HTTPs_REST_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_hook_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_hook_cfg.c
new file mode 100644
index 0000000..6d8955d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_hook_cfg.c
@@ -0,0 +1,91 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTPs REST HOOK CONFIGURATION
+*
+* Filename      : http-s_rest_hook_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define   MICRIUM_SOURCE
+#define   HTTPs_REST_HOOK_CFG_MODULE
+#include "http-s_rest_hook_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           REST CONFIGURATION
+*
+* Note(s): The REST configuration in the REST resources list ID that the HTTP server will used for the
+*          REST application.
+*********************************************************************************************************
+*/
+
+const  HTTPs_REST_CFG  HTTPs_REST_Cfg = {0};
+
+
+/*
+*********************************************************************************************************
+*                                         REST HOOK CONFIGURATION
+*********************************************************************************************************
+*/
+
+const  HTTPs_HOOK_CFG HTTPs_REST_HookCfg = {
+        HTTPsREST_Init,
+        HTTPsREST_RxHeader,
+        HTTPsREST_Authenticate,
+        HTTPsREST_RxBody,
+        HTTPsREST_ReqRdySignal,
+        DEF_NULL,                                               /* Poll not used by REST. Same mechanism replaced by GET_CHUNK and RX_BODY */
+        DEF_NULL,                                               /* Headers will be added before the chunk call */
+        DEF_NULL,                                               /* No token replacement for REST */
+        HTTPsREST_GetChunk,
+        HTTPsREST_OnTransComplete,
+        DEF_NULL,
+        DEF_NULL,                                               /* If there is a connection error, it is most likely not recoverable. */
+        HTTPsREST_OnConnClosed
+};
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_hook_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_hook_cfg.h
new file mode 100644
index 0000000..478c41a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_hook_cfg.h
@@ -0,0 +1,81 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  HTTPs REST HOOK CONFIGURATION
+*
+* Filename      : http-s_rest_hook_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef HTTPs_REST_HOOK_CFG_MODULE_PRESENT
+#define HTTPs_REST_HOOK_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../../Source/http-s.h"
+#include  "http-s_rest.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  HTTPs_HOOK_CFG  HTTPs_REST_HookCfg;
+extern  const  HTTPs_REST_CFG  HTTPs_REST_Cfg;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#endif /* HTTPs_REST_HOOK_CFG_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_mem.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_mem.c
new file mode 100644
index 0000000..d83976f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_mem.c
@@ -0,0 +1,333 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       HTTPs REST MEMORY
+*
+* Filename      : http-s_rest_mem.c
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : None.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  HTTPs_REST_MEM_MODULE
+#include "http-s_rest_mem.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_REST_MEM_CACHE_LINE_LEN          32u
+#define  HTTPs_REST_MEM_RESOURCE_LIST_MAX       10u
+#define  HTTPs_REST_MEM_RESOURCE_MAX            50u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+static            MEM_DYN_POOL    HTTPsREST_Mem_ResourceListPool;
+static            MEM_DYN_POOL    HTTPsREST_Mem_ResourcePool;
+
+volatile  static  CPU_BOOLEAN     HTTPsREST_Mem_PoolsInitialized = DEF_NO;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       HTTPsREST_Mem_Init_Pools()
+*
+* Description : Initialize the rest memory pools.
+*               This function is called during the initialization of the HTTP-s
+*
+* Argument(s) : max_request     Maximum number of simultaneous request the server can handle
+*
+* Return(s)   : DEF_NULL    if out of memory
+*               OBJ         otherwise
+*
+* Caller(s)   : HTTPsREST_Init().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+HTTPs_REST_INST_DATA  *HTTPsREST_Mem_Init_Pools (CPU_SIZE_T  max_request)
+{
+    HTTPs_REST_INST_DATA  *p_inst_data;
+    LIB_ERR                err_lib;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    if (HTTPsREST_Mem_PoolsInitialized == DEF_NO) {
+
+        Mem_DynPoolCreate("REST_ResourceList_MemPool",
+                          &HTTPsREST_Mem_ResourceListPool,
+                           DEF_NULL,
+                           sizeof(HTTPs_REST_RESOURCE_LIST),
+                           HTTPs_REST_MEM_CACHE_LINE_LEN,
+                           0,                                   /* Min block */
+                           HTTPs_REST_MEM_RESOURCE_LIST_MAX,    /* Max block */
+                          &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+            CPU_CRITICAL_EXIT();
+            return (DEF_NULL);
+        }
+
+        Mem_DynPoolCreate("REST_Resource_MemPool",
+                          &HTTPsREST_Mem_ResourcePool,
+                           DEF_NULL,
+                           sizeof(HTTPs_REST_RESOURCE_ENTRY),
+                           HTTPs_REST_MEM_CACHE_LINE_LEN,
+                           0,                                   /* Min block */
+                           HTTPs_REST_MEM_RESOURCE_MAX,         /* Max block */
+                          &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+            CPU_CRITICAL_EXIT();
+            return (DEF_NULL);
+        }
+
+        SList_Init(&HTTPsREST_Mem_ResourceList);
+    }
+    CPU_CRITICAL_EXIT();
+
+    p_inst_data = Mem_SegAlloc("REST_InstanceSeg",
+                                DEF_NULL,
+                                sizeof(HTTPs_REST_INST_DATA),
+                               &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    Mem_DynPoolCreate("REST_Conn_MemPool",
+                      &p_inst_data->Pool,
+                       DEF_NULL,
+                       sizeof(HTTPs_REST_REQUEST),
+                       HTTPs_REST_MEM_CACHE_LINE_LEN,
+                       0,                               /* Min block */
+                       max_request,                     /* Max block */
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    return (p_inst_data);
+}
+
+/*
+*********************************************************************************************************
+*                                     HTTPsREST_Mem_GetResourceList()
+*
+* Description : Get the resource list associated with an ID.
+*               If the list doesn't exist, the list is created.
+*
+* Argument(s) : list_ID      Differentiate two or more lists
+*
+* Return(s)   : Pointer to resource list object.
+*               DEF_NULL if out of memory.
+*
+* Caller(s)   : REST_Alloc_Resource(),
+*               HTTPsREST_Authenticate(),
+*               HTTPsREST_RxHeader().
+*
+* Note(s)     : (1)  Once a list is created it is never freed.
+*********************************************************************************************************
+*/
+
+HTTPs_REST_RESOURCE_LIST  *HTTPsREST_Mem_GetResourceList (CPU_INT32U  list_ID)
+{
+    CPU_BOOLEAN                found;
+    HTTPs_REST_RESOURCE_LIST  *p_list;
+    LIB_ERR                    err_lib;
+
+
+    found = DEF_NO;
+
+    SLIST_FOR_EACH_ENTRY(HTTPsREST_Mem_ResourceList, p_list, HTTPs_REST_RESOURCE_LIST, ListNode)
+    {
+        if (p_list->Id == list_ID) {
+            found = DEF_TRUE;
+            break;
+        }
+    }
+
+    if (found != DEF_TRUE) {
+        p_list = (HTTPs_REST_RESOURCE_LIST *)Mem_DynPoolBlkGet(&HTTPsREST_Mem_ResourceListPool,
+                                                               &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+            return (DEF_NULL);
+        }
+
+        p_list->Id          = list_ID;
+        p_list->ListHeadPtr = DEF_NULL;
+
+        SList_Push(&HTTPsREST_Mem_ResourceList, &(p_list->ListNode));
+    }
+
+    return (p_list);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsREST_Mem_AllocResource()
+*
+* Description : Allocate a resource token to be chained.
+*
+* Argument(s) : list_ID     ID of the list to chain the resource token.
+*
+*               p_resource  Pointer to the resource to add to the list.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsREST_Publish().
+*
+* Note(s)     : (1) This function must be called after the HTTP-s init but before the HTTP-s start.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsREST_Mem_AllocResource (       CPU_INT32U            list_ID,
+                                          const  HTTPs_REST_RESOURCE  *p_resource)
+{
+    HTTPs_REST_RESOURCE_LIST   *p_list;
+    HTTPs_REST_RESOURCE_ENTRY  *p_entry;
+    LIB_ERR                     err_lib;
+
+
+    p_list  = HTTPsREST_Mem_GetResourceList(list_ID);
+    if (p_list == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    p_entry = (HTTPs_REST_RESOURCE_ENTRY *)Mem_DynPoolBlkGet(&HTTPsREST_Mem_ResourcePool,
+                                                             &err_lib);
+    if (p_entry == DEF_NULL) {
+        return (DEF_FAIL);
+    }
+
+    p_entry->ResourcePtr = p_resource;
+
+    SList_Push(&p_list->ListHeadPtr, &p_entry->ListNode);
+    SList_Sort(&p_list->ListHeadPtr,  HTTPsREST_ResourceListCompare);
+
+    (void)&err_lib;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsREST_Mem_AllocRequest()
+*
+* Description : Allocate a REST request data structure.
+*
+* Argument(s) : p_inst_data     Pointer to REST instance with the pool to allocate on.
+*
+* Return(s)   : DEF_NULL    if out of memory.
+*               OBJ         otherwise
+*
+* Caller(s)   : HTTPsREST_Authenticate().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+HTTPs_REST_REQUEST  *HTTPsREST_Mem_AllocRequest (HTTPs_REST_INST_DATA  *p_inst_data)
+{
+    HTTPs_REST_REQUEST  *p_req;
+    LIB_ERR              err_lib;
+
+
+    p_req = (HTTPs_REST_REQUEST *)Mem_DynPoolBlkGet(&p_inst_data->Pool, &err_lib);
+
+   (void)&err_lib;
+
+    return (p_req);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsREST_Mem_FreeRequest()
+*
+* Description : Frees a previously allocated request.
+*
+* Argument(s) : p_inst_data   Pointer to REST instance data containing the pool to free the request.
+*
+*               p_request     Pointer to REST request to free.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsREST_Authenticate(),
+*               HTTPsREST_OnConnClosed().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsREST_Mem_FreeRequest (HTTPs_REST_INST_DATA  *p_inst_data,
+                                 HTTPs_REST_REQUEST    *p_request)
+{
+    LIB_ERR err_lib;
+
+
+    Mem_DynPoolBlkFree(&p_inst_data->Pool,
+                        p_request,
+                       &err_lib);
+
+    (void)&err_lib;
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_mem.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_mem.h
new file mode 100644
index 0000000..2780990
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Add-on/REST/http-s_rest_mem.h
@@ -0,0 +1,124 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       HTTPs REST MEMORY
+*
+* Filename      : http-s_rest_mem.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : None.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef HTTPs_REST_MEM_MODULE_PRESENT
+#define HTTPs_REST_MEM_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include "http-s_rest.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef HTTPs_REST_MEM_MODULE
+#define  HTTPs_REST_MEM_EXT
+#else
+#define  HTTPs_REST_MEM_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+HTTPs_REST_MEM_EXT  SLIST_MEMBER  *HTTPsREST_Mem_ResourceList;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+HTTPs_REST_INST_DATA      *HTTPsREST_Mem_Init_Pools      (        CPU_SIZE_T             max_request);
+
+HTTPs_REST_RESOURCE_LIST  *HTTPsREST_Mem_GetResourceList (        CPU_INT32U             list_ID);
+
+HTTPs_REST_REQUEST        *HTTPsREST_Mem_AllocRequest    (        HTTPs_REST_INST_DATA  *p_inst_data);
+
+void                       HTTPsREST_Mem_FreeRequest     (        HTTPs_REST_INST_DATA  *p_inst_data,
+                                                                  HTTPs_REST_REQUEST    *p_request);
+
+CPU_BOOLEAN                HTTPsREST_Mem_AllocResource   (        CPU_INT32U             listID,
+                                                          const   HTTPs_REST_RESOURCE   *resource);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#endif /* HTTPs_REST_MEM_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Cfg/Template/http-s_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Cfg/Template/http-s_cfg.h
new file mode 100644
index 0000000..5d1fd61
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Cfg/Template/http-s_cfg.h
@@ -0,0 +1,227 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   HTTP SERVER CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : http-s_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  HTTP SERVER ARGUMENT CHECK CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPs_CFG_ARG_CHK_EXT_EN to enable/disable the HTTP server external argument
+*               check feature :
+*
+*               (a) When ENABLED,  ALL arguments received from any port interface provided by the developer
+*                   are checked/validated.
+*
+*               (b) When DISABLED, NO  arguments received from any port interface provided by the developer
+*                   are checked/validated.
+*
+*           (2) Configure HTTPs_CFG_DBG_INFO_EN to enable/disable network protocol suite debug status
+*               variables.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure external argument check feature ...        */
+#define  HTTPs_CFG_ARG_CHK_EXT_EN                 DEF_ENABLED
+                                                                /*   DEF_DISABLED     External argument check DISABLED  */
+                                                                /*   DEF_ENABLED      External argument check ENABLED   */
+
+
+                                                                /* Configure debug information feature (see Note #2) :  */
+#define  HTTPs_CFG_DBG_INFO_EN                    DEF_ENABLED
+                                                                /*   DEF_DISABLED  Debug information DISABLED           */
+                                                                /*   DEF_ENABLED   Debug information ENABLED            */
+
+
+/*
+*********************************************************************************************************
+*                                HTTP SERVER COUNTER MANAGEMENT CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPs_CFG_CTR_STAT_EN to enable/disable HTTP server suite statistics counters.
+*
+*           (2) Configure HTTPs_CFG_CTR_ERR_EN  to enable/disable HTTP server suite error      counters.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure statistics counter feature (see Note #1) : */
+#define  HTTPs_CFG_CTR_STAT_EN                    DEF_ENABLED
+                                                                /*   DEF_DISABLED     Stat  counters DISABLED           */
+                                                                /*   DEF_ENABLED      Stat  counters ENABLED            */
+
+                                                                /* Configure error      counter feature (see Note #2) : */
+#define  HTTPs_CFG_CTR_ERR_EN                     DEF_ENABLED
+                                                                /*   DEF_DISABLED     Error counters DISABLED           */
+                                                                /*   DEF_ENABLED      Error counters ENABLED            */
+
+
+/*
+*********************************************************************************************************
+*                               HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPs_CFG_FS_PRESENT_EN to enable when a File System is present and must be used
+*               by the HTTP server. Else, if no File System need to be used with the server, the configuration
+*               can be disabled to reduce memory space used by the server.
+*********************************************************************************************************
+*/
+
+#define  HTTPs_CFG_FS_PRESENT_EN                  DEF_ENABLED
+
+
+/*
+*********************************************************************************************************
+*                            HTTP SERVER PERSISTENT CONNECTION CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPs_CFG_PERSISTENT_CONN_EN to enable/disable persistent connection feature
+*               source code.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure Persistent Connection feature ...          */
+                                                                /* ... (see Note #1):                                   */
+#define  HTTPs_CFG_PERSISTENT_CONN_EN             DEF_ENABLED
+                                                                /*   DEF_DISABLED   Persistent Connection DISABLED      */
+                                                                /*   DEF_ENABLED    Persistent Connection ENABLED       */
+
+
+/*
+*********************************************************************************************************
+*                                     HTTP SERVER HEADER FIELD FEATURE
+*
+* Note(s) : (1) Configure HTTPs_CFG_HDR_RX_EN to enable/disable header field processing in reception
+*               (i.e for headers received in the HTTP request).
+*
+*           (2) Configure HTTPs_CFG_HDR_TX_EN to enable/disable header field processing in transmission
+*               (i.e for headers to include in the HTTP response).
+*********************************************************************************************************
+*/
+
+                                                                /* Configure Header fields feature in RX (see Note #1): */
+#define  HTTPs_CFG_HDR_RX_EN                      DEF_ENABLED
+                                                                /*   DEF_DISABLED   Header processing DISABLED          */
+                                                                /*   DEF_ENABLED    Header processing ENABLED           */
+
+                                                                /* Configure Header fields feature in TX (see Note #1): */
+#define  HTTPs_CFG_HDR_TX_EN                      DEF_ENABLED
+                                                                /*   DEF_DISABLED   Header processing DISABLED          */
+                                                                /*   DEF_ENABLED    Header processing ENABLED           */
+
+
+/*
+*********************************************************************************************************
+*                             HTTP SERVER QUERY STRING CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPs_CFG_QUERY_STR_EN to enable/disable Query String feature
+*               source code.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure Query String feature (see Note #1):        */
+#define  HTTPs_CFG_QUERY_STR_EN                   DEF_ENABLED
+                                                                /*   DEF_DISABLED   Query String DISABLED               */
+                                                                /*   DEF_ENABLED    Query String ENABLED                */
+
+
+/*
+*********************************************************************************************************
+*                                     HTTP SERVER FORM CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPs_CFG_FORM_EN             to enable/disable           Form processing source code.
+*
+*           (2) Configure HTTPs_CFG_FORM_MULTIPART_EN   to enable/disable multipart Form processing source code.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure Form processing feature (see Note #1):     */
+#define  HTTPs_CFG_FORM_EN                        DEF_ENABLED
+                                                                /*   DEF_DISABLED   Form processing DISABLED            */
+                                                                /*   DEF_ENABLED    Form processing ENABLED             */
+
+                                                                /* Configure Multipart Form processing feature ...      */
+                                                                /* ... (see Note #2):                                   */
+#define  HTTPs_CFG_FORM_MULTIPART_EN              DEF_ENABLED
+                                                                /*   DEF_DISABLED   Mutlipart Form processing DISABLED  */
+                                                                /*   DEF_ENABLED    Mutlipart Form processing ENABLED   */
+
+
+/*
+*********************************************************************************************************
+*                            HTTP SERVER DYNAMIC TOKEN REPLACEMENT CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPs_CFG_TOKEN_PARSE_EN to enable/disable dynamic token replacement source code.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure Dynamic token replacement feature ...      */
+                                                                /* ... (see Note #1):                                   */
+#define  HTTPs_CFG_TOKEN_PARSE_EN                 DEF_ENABLED
+                                                                /*   DEF_DISABLED   Dynamic token replacement DISABLED  */
+                                                                /*   DEF_ENABLED    Dynamic token replacement ENABLED   */
+
+
+/*
+*********************************************************************************************************
+*                                     HTTP SERVER PROXY CONFIGURATION
+*
+* Note(s) : (1) Configure HTTPs_CFG_ABSOLUTE_URI_EN to enable/disable support of absolute Uniform Resource
+*                                                                                         Indentifier (URI).
+*********************************************************************************************************
+*/
+
+                                                                /* Configure absolute URI support feature ...           */
+                                                                /* ... (see Note #1):                                   */
+#define  HTTPs_CFG_ABSOLUTE_URI_EN                DEF_ENABLED
+                                                                /*   DEF_DISABLED   Absolute URI support DISABLED       */
+                                                                /*   DEF_ENABLED    Absolute URI support ENABLED        */
+
+
+/*
+*********************************************************************************************************
+*                           DEFAULT FATAL ERROR HTML DOCUMENT CONFIGURATION
+*
+* Note(s) : (1) Dynamic token replacement is also supported in default error HTML document.
+*********************************************************************************************************
+*/
+
+                                                                /* Default HTML document returned error.                */
+#define  HTTPs_CFG_HTML_DFLT_ERR_PAGE                                                                       \
+                                                  "\r\n"                                              \
+                                                  "\r\n"                                              \
+                                                  "SYSTEM ERROR\r\n"            \
+                                                  "
#{STATUS_CODE}: #{REASON_PHRASE}
\r\n"           \
+                                                  "The operation cannot be completed.\r\n"                  \
+                                                  "\r\n"                                             \
+                                                  "\r\n"
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Cfg/Template/http-s_instance_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Cfg/Template/http-s_instance_cfg.c
new file mode 100644
index 0000000..c9df118
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Cfg/Template/http-s_instance_cfg.c
@@ -0,0 +1,919 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : http-s_instance_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) All values that are used in this file and are defined in other header files should be
+*               included in this file. Some values could be located in the same file such as task priority
+*               and stack size. This template file assume that the following values are defined in app_cfg.h:
+*
+*                   HTTPs_OS_CFG_INSTANCE_TASK_PRIO
+*                   HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE
+*
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                             /* See Note #1.                                         */
+
+#include  "http-s_instance_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TASK CONFIGURATION
+*
+* Note(s) : (1) We recommend you configure the Network Protocol Stack task priorities & HTTP server Instances'
+*               task priorities as follows:
+*
+*               NET_OS_CFG_IF_TX_DEALLOC_TASK_PRIO  (highest priority)
+*
+*               HTTPs_OS_CFG_INSTANCE_TASK_PRIO
+*
+*               NET_OS_CFG_TMR_TASK_PRIO
+*               NET_OS_CFG_IF_RX_TASK_PRIO          (lowest  priority)
+*
+*               We recommend that the uC/TCP-IP Timer task and network interface Receive task be lower
+*               priority than almost all other application tasks; but we recommend that the network
+*               interface Transmit De-allocation task be higher  priority than all application tasks that use
+*               uC/TCP-IP network services.
+*
+*               However better performance can be observed when the web server instance is set with the lowest priority.
+*               Some experimentation could be required to identify the best task priority configuration.
+*
+*           (2) In general, the size of the uC/HTTP-server task stack will depend on the CPU architecture and compiler
+*               used but also the application due to the multiple hook functions available.
+*               The easiest and best method for calculating the maximum stack usage for any task/function should be
+*               performed statically by the compiler or by a static analysis tool since these can calculate function/task
+*               maximum stack usage based on the compiler s actual code generation and optimization settings. So for optimal
+*               task stack configuration, we recommend to invest in a task stack calculator tool compatible with your build
+*               toolchain.
+*               From experience, a stack size of 4KB SHOULD be enough. Certainly, the stack size may be examined and
+*               reduced accordingly once the run-time behavior of the device has been analyzed and additional stack space
+*               deemed to be unnecessary.
+*
+*           (3) If DEF_NULL is passed as the stack pointer start, the stack will be allocated on the
+*               HEAP memory.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  NET_TASK_CFG  HTTPs_TaskCfgInstance = {
+
+    /* CPU_INT32U    Prio                                                                                               */
+                                                                /* Configure Instance Task priority (See Note #1):      */
+    HTTPs_OS_CFG_INSTANCE_TASK_PRIO,
+                                                                /* MUST be >= Minimum OS Priority                       */
+
+    /* CPU_INT32U    StkSizeBytes                                                                                       */
+                                                                /* Configure instance task size:                        */
+    HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE,
+                                                                /* MUST be >= Minimum stack size allowed by OS.         */
+
+    /* void    *StkPtr                                                                                                  */
+                                                                /* Configure the pointer to base of the stack.          */
+    DEF_NULL
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) Three types of File System are accepted by the uC/HTTP-server and each has its own
+*               configuration structure.
+*                        FS TYPE                FS CFG OBJ
+*                   --------------------    -------------------
+*                   HTTPs_FS_TYPE_NONE   -> HTTPs_CFG_FS_NONE
+*                   HTTPs_FS_TYPE_STATIC -> HTTPS_CFG_FS_STATIC
+*                   HTTPS_FS_TYPE_DYN    -> HTTPS_CFG_FS_DYN
+*
+*               Below are examples for the three File System type.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NO FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) When no File System is present, the uC/HTTP-server needs to know the maximum length a path
+*               to a resource can have so the server can store adequately the URL received in an HTTP
+*               request.
+*********************************************************************************************************
+*/
+
+#if 1
+const  HTTPs_CFG_FS_NONE  HTTPs_CfgFS_None = {
+
+    /* CPU_INT32U  PathLenMax                                                                                           */
+                                                                /* Configure maximum path length (see note #1):         */
+    256,
+                                                                /* MUST be >= 1                                         */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) The pointer to the File System Network API MUST be defined here. See the 'net_fs.h' file
+*               for the FS API structure required for Network Applications.
+*               If HTTP Static File System is used as File System, the port is already available in
+*               uC-HTTP/Server/FS folder and the API structure is defined as 'HTTPs_FS_API_Static'.
+*********************************************************************************************************
+*/
+
+#if 0
+const  HTTPs_CFG_FS_STATIC  HTTPs_CfgFS_Static = {
+
+    /* const  NET_FS_API  *FS_API_Ptr                                                                                   */
+                                                                /* Configure instance FS API pointer (see note #1):     */
+   &HTTPs_FS_API_Static,
+                                                                /* MUST NOT be a NULL                                   */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) The pointer to the File System Network API MUST be defined here. See the 'net_fs.h' file
+*               for the FS API structure required for Network Applications.
+*               If uC/FS is used as File System, the port is already available in uC-TCPIP/FS folder and the
+*               API structure is defined as 'NetFS_API_FS_V4'.
+*
+*           (2) Web server instance uses a working folder where files and sub-folders are located.
+*
+*               (a) It can be set as a null pointer (DEF_NULL), if the file system doesn't support
+*                   'set working folder' functionality but HTML documents and files must be located in the
+*                   default path used by the file system.
+*********************************************************************************************************
+*/
+
+#if 0
+const  HTTPs_CFG_FS_DYN  HTTPs_CfgFS_Dyn = {
+
+    /* const  NET_FS_API  *FS_API_Ptr                                                                                   */
+                                                                /* Configure instance FS API pointer (see note #1):     */
+   &NetFS_API_FS_V4,
+                                                                /* MUST NOT be a NULL                                   */
+
+    /* CPU_CHAR    *WorkingFolderPtr                                                                                    */
+                                                                /* Configure instance working folder (see note #2):     */
+    HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT
+                                                                /* SHOULD be a string pointer                           */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER RX CONFIGURATION
+*
+* Note(s) : (1) (a) The uC-HTTP Server core process, by default, the following header fields :
+*                       Content-Type
+*                       Content-Length
+*                       Transfer-Encoding
+*                       Location
+*                       Connection
+*
+*               (b) Enabling the header feature allows the processing of additional header fields other than the
+*                   the default ones.
+*
+*                   By configuring the right callback functions, the upper application can :
+*
+*                       (1) choose which header field(s) received in an http request message to keep in memory blocks for
+*                           later processing in hook function associated with request received.
+*
+*                       (2) add header field(s) to memory blocks that will be included in http response message by the uC-HTTP
+*                           server core.
+*
+*               (c) To allow the processing of additional header fields in reception, 'HTTPs_CFG_HDR_RX_EN' must be set as 'DEF_ENABLED'.
+*                   See http-s_cfg.h section 'HTTP HEADER FIELD FEATURE' for further informations.
+*
+*           (2) The total number of request header field blocks represents the memory blocks pool available
+*               for all the connections.
+*
+*           (3) Each connection has a maximum number of request header field blocks it can used.
+*
+*               The maximum MUST be equal or less than the total number of request header field blocks (see Note #1).
+*
+*               If no more request header field blocks are available when a connection solicits one, the server will retry at
+*               the next occasion. Therefore, the maximum request header field blocks per connection and the total number
+*               of request header field blocks must be set carefully to optimize performance.
+*
+*           (4) Request header field data length MUST be configured to handle the longest data value the upper application
+*               is expected to receive in an header field.
+*
+*               Only the maximum data length will be kept from a received header field with data longer than the maximum.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_RX_CFG  HTTPs_HdrRxCfg = {
+
+    /* CPU_INT16U    NbrPerConnMax                                                                                      */
+                                                                /* Configure number of request header field blocks ...  */
+                                                                /* ... (see note #2):                                   */
+    LIB_MEM_BLK_QTY_UNLIMITED,
+                                                                /* SHOULD be >= 0                                       */
+
+    /* CPU_INT16U    DataLenMax                                                                                         */
+                                                                /* Configure maximum of request header field data  ...  */
+                                                                /* length (see note #4):                                */
+    128,
+                                                                /* SHOULD be >= 0                                       */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER TX CONFIGURATION
+*
+* Note(s) : (1) (a) The uC-HTTP Server core process, by default, the following header fields :
+*                       Content-Type
+*                       Content-Length
+*                       Transfer-Encoding
+*                       Location
+*                       Connection
+*
+*               (b) Enabling the header feature allows the processing of additional header fields other than the
+*                   the default ones.
+*
+*                   By configuring the right hook functions, the upper application can :
+*
+*                       (1) choose which header field(s) received in an http request message to keep in memory blocks for
+*                           later processing in hook function associated with request received.
+*
+*                       (2) add header field(s) to memory blocks that will be included in http response message by the uC-HTTP
+*                           server core.
+*
+*               (c) To allow the addition of header fields in transmission, 'HTTPs_CFG_HDR_TX_EN' must be set as 'DEF_ENABLED'.
+*                   See http-s_cfg.h section 'HTTP HEADER FIELD FEATURE' for further informations.
+*
+*           (2) The total number of response header field blocks represents the memory block pools available for all the
+*               connections.
+*
+*           (3) Each connection has a maximum of response header field blocks it can used.
+*
+*               The maximum MUST be equal or less than the total number of response header field blocks (see Note #1).
+*
+*               If no more response header field block is available when a connection solicit one, the server will retry at
+*               the next occasion. Therefore, the maximum of response header field blocks per connection and the total number
+*               of response header field blocks must be set careful to optimize performance.
+*
+*           (4) Response header field data length MUST be configured to handle the longest data value the upper application
+*               is ready to send in an header field.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_TX_CFG  HTTPs_HdrTxCfg = {
+
+    /* CPU_INT16U    NbrPerConnMax                                                                                      */
+                                                                /* Configure number of response header field blocks ... */
+                                                                /* ...  (see note #2):                                  */
+    LIB_MEM_BLK_QTY_UNLIMITED,
+                                                                /* SHOULD be >= 0                                       */
+
+    /* CPU_INT16U    DataLenMax                                                                                         */
+                                                                /* Configure maximum string length (see note #4):       */
+    128,
+                                                                /* SHOULD be >= 0                                       */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                           HTTP SERVER INSTANCE QUERY STRING CONFIGURATION
+*
+* Note(s) : (1) A Query String is a set of key-value pairs that comes just after the URL and can be used
+*               by a HTTP client to pass additional information relative to the request.
+*
+*               For the uC/HTTP-server to parse a Query String received, the compile-time configuration
+*               HTTPs_CFG_QUERY_STR_EN must be enabled and the Query String configuration object pointer
+*               (HTTPs_QUERY_STR_CFG) must be set in the Instance runtime configuration (HTTPs_CFG).
+*
+*               When enabled, the server will parse the received Query String and saved each field in a
+*               key-value list accessible in the HTTPs_CONN object.
+*
+*               The server also supports fields that are single value (no key-value pair). The value will
+*               still be saved in a key-value pair block, but only the value parameter will be set.
+*
+*           (2) The first parameter 'NbrPerConnMax' of the Query String configuration structure is the number of
+*               fields in the Query String accepted for one HTTP transaction (connection).
+*
+*           (3) The maximum length of the key part of the field must be defined in the second parameter
+*               'KeyLenMax'.
+*               This is the maximum string length the server can accept for a key.
+*
+*           (4) The maximum length of the value part of the field must be defined in the third parameter
+*               'ValLenMax'.
+*               This is the maximum string length the server can accept for a value.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_QUERY_STR_CFG  HTTPs_QueryStrCfg = {
+    /* CPU_INT16U   NbrPerConnMax                                                                                       */
+                                                                /* Configure number of key value pairs ...              */
+                                                                /* ...  (see note #2):                                  */
+    LIB_MEM_BLK_QTY_UNLIMITED,
+                                                                /* SHOULD be >= 1                                       */
+
+    /* CPU_INT16U   KeyLenMax                                                                                           */
+                                                                /* Configure maximum key length ...                     */
+                                                                /* ... (see note #3):                                   */
+    15,
+                                                                /* SHOULD be > 1                                        */
+
+    /* CPU_INT16U   ValLenMax                                                                                           */
+                                                                /* Configure maximum value length ...                   */
+                                                                /* ... (see note #4):                                   */
+    20,
+                                                                /* SHOULD be > 1                                        */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE FORM CONFIGURATION
+*
+* Note(s) : (1) (a) Forms in HTML documents are allowed. When the form is posted, the web server will process the POST
+*                   action and will invoke the callback with a list of key-value pairs transmitted.
+*
+*                   Assuming we have an HTML page that look like this:
+*
+*                       
+*                           
+*                               

+*                                   Text Box 1: 

+*                                   Text Box 2: 

+*                                   
+*                               

+*                           
+*                       
+*
+*
+*                   When the client sends the request, the web server should call the callback function with the following
+*                   key pair value items:
+*
+*                       Key-Name: "textbox1",  Key-Value: "Text Box 1 value"
+*                       Key-Name: "textbox2",  Key-Value: "Text Box 2 value"
+*                       Key-Name: "submit",    Key-Value: "Submit"*
+*
+*                   For more information see User Manual section 'Form Submissions'.
+*
+*               (b) Only form method 'POST' action is supported.
+*
+*               (c) 'HTTPs_CFG_FORM_EN' must be set as 'DEF_ENABLED' to enable the web server instance token replacement.
+*                   See http-s_cfg.h section 'HTTP FORM CONFIGURATION' for further information.
+*
+*
+*           (2) (a) Number of control key value pairs must be greater than or equal to the maximum number of inputs
+*                   which can be transmitted by one of your forms contained in your HTML documents.
+*
+*               (b) If the feature is not enabled, this value is not used.
+*
+*
+*           (3) (a) Control name length MUST be configured to handle the longest Key-Name contained in your html documents.
+*
+*               (b) Control value length MUST be configured to handle the longest Key-Value which can be entered by the user
+*                   in your html documents.
+*
+*
+*           (4) (a) Multipart forms MUST be used to transmit large messages such as a file or e-mails message body. HTML pages
+*                   that contain mutlipart forms look like this:
+*
+*                       
+*                           
+*                               

+*                                   Browse file: 

+*                                   
+*                               

+*                           
+*                       
+*
+*               (b) If File upload feature is enabled, the web server will store the file received. If the feature is
+*                   not enabled and a file is received the file will be simply dropped.
+*
+*                   (1) File upload is not yet possible with the Static File System.
+*
+*                   (2) File overwrite must be enabled to allow a file to be received if the file already exists in the folder.
+*
+*                   (3) A folder name need to be specified to indicate where the uploaded files will be saved.
+*
+*                       If you wish to save uploaded files directly in the root web directory, the name folder needs
+*                       to be set as "\\".
+*
+*                       If uploaded files need to be saved inside a subfolder of the root web directory, the folder MUST
+*                       already exist when the HTTP server tries to access it.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_FORM_CFG  HTTPs_FormCfg = {
+
+    /* CPU_INT16U   NbrPerConnMax                                                                                       */
+                                                                /* Configure number of control key value pairs ...      */
+                                                                /* ...  (see note #2):                                  */
+    LIB_MEM_BLK_QTY_UNLIMITED,
+                                                                /* SHOULD be >= 1                                       */
+
+    /* CPU_INT16U   KeyLenMax                                                                                           */
+                                                                /* Configure maximum key length ...                     */
+                                                                /* ... (see note #3a):                                  */
+    15,
+                                                                /* SHOULD be > 1                                        */
+
+    /* CPU_INT16U   ValLenMax                                                                                           */
+                                                                /* Configure maximum value length ...                   */
+                                                                /* ... (see note #3b):                                  */
+    48,
+                                                                /* SHOULD be > 1                                        */
+
+    /* CPU_BOOLEAN  MultipartEn                                                                                         */
+                                                                /* Configure instance Multipart form feature ...        */
+                                                                /* ... (see note #4a):                                  */
+    DEF_ENABLED,
+                                                                /*   DEF_DISABLED     multipart form DISABLED           */
+                                                                /*   DEF_ENABLED      multipart form ENABLED            */
+
+    /* CPU_BOOLEAN  MultipartFileUploadEn                                                                               */
+                                                                /* Configure instance file upload feature ...           */
+                                                                /* ... (see note #4b):                                  */
+    DEF_ENABLED,
+                                                                /*   DEF_DISABLED     File upload DISABLED              */
+                                                                /*   DEF_ENABLED      File upload ENABLED               */
+
+    /*CPU_BOOLEAN   MultipartFileUploadOverWrEn                                                                         */
+                                                                /* Configure instance file overwrite feature ...        */
+                                                                /* ... (see note #4b2):                                 */
+    DEF_ENABLED,
+                                                                /*   DEF_DISABLED     File overwrite DISABLED           */
+                                                                /*   DEF_ENABLED      File overwrite ENABLED            */
+
+    /* CPU_CHAR     *MultipartFileUploadFolderPtr                                                                       */
+                                                                /* Configure instance upload folder (see note #4b3):    */
+    HTTPs_CFG_INSTANCE_STR_FOLDER_UPLOAD,
+                                                                /* SHOULD be a string pointer.                          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TOKEN CONFIGURATION
+*
+* Note(s) : (1) (a) Dynamic content can be inserted in HTML web pages (files having the htm or html suffix) by using
+*                   special tokens being substituted when the page is actually sent to the web browser. Those tokens
+*                   are represented in an HTML document as:
+*
+*                       ${TOKEN_NAME}
+*
+*                   Assuming we have an HTML page that look like this:
+*
+*                       
+*                           
+*                               This system's IP address is ${My_IP_Address}
+*                           
+*                       
+*
+*
+*                   When a web client requests this file, the web server will parse the file, find the ${My_IP_Address}
+*                   token, and pass the string " My_IP_Address " into the callback function. That function will then
+*                   substitute the token for its value, sending the following HTML file to the client:
+*
+*                       
+*                           
+*                               This system's IP address is 135.17.115.215
+*                           
+*                       
+*
+*               (b) 'HTTPs_CFG_TOKEN_PARSE_EN' must be set as 'DEF_ENABLED' to enable the web server instance token
+*                   replacement. See http-s_cfg.h section 'HTTP DYNAMIC TOKEN REPLACEMENT CONFIGURATION' for further
+*                   information.
+*
+*           (2) (a) Each connection that transmits an HTML document requires only one token. So to optimize performance, numbers
+*                   of tokens SHOULD be equally configured to the maximum number of HTML documents that can be transmitted
+*                   simultaneously.
+*
+*               (b) If dynamic token replacement feature is enabled, number of tokens must be greater than or equal to
+*                   one.
+*
+*           (3) (a) The web server reserves a value buffer for each token which is passed to the callback function to be
+*                   filled with the replacement value. Therefore, the length of the token value must be configured to handle the
+*                   longest value.
+*
+*               (b) If the dynamic token replacement feature is enabled, token value length must be greater than or equal
+*                   to one.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_TOKEN_CFG  HTTPs_TokenCfg = {
+
+    /* CPU_INT16U   NbrPerConnMax                                                                                       */
+                                                                /* Configure instance number of token (see note #2):    */
+    LIB_MEM_BLK_QTY_UNLIMITED,
+                                                                /* SHOULD be >= 1                                       */
+
+    /* CPU_INT16U   ValLenMax                                                                                           */
+                                                                /* Configure instance token value length (see note #3): */
+    12,
+                                                                /* SHOULD be >= 1                                       */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               HTTP SERVER INSTANCE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_CFG  HTTPs_CfgInstance = {
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     INSTANCE TASK CONFIGURATION
+*
+* Note(s) : (1) The web server can delay this task periodically to allow other tasks with lower priority to run.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* CPU_INT32U    OS_TaskDly_ms                                                                                      */
+                                                                /* Configure instance task delay ...                    */
+    1,
+                                                                /* ... in integer milliseconds (see Note #1).           */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                INSTANCE LISTEN SOCKET CONFIGURATION
+*
+* Note(s) : (1) Configure socket type. Select which kind of IP addresses can be accepted by the web server instance.
+*
+*                   (a) HTTPs_SOCK_SEL_IPv4:      Accept Only IPv4
+*                   (b) HTTPs_SOCK_SEL_IPv6:      Accept Only IPv6
+*                   (c) HTTPs_SOCK_SEL_IPv4_IPv6: Accept IPv4 and IPv6
+*
+*           (2) (a) 'Secure' field is used to enabled or disable the Secure Sockets Layer (SSL):
+*
+*                           DEF_NULL,                                  the web server instance is not secure and doesn't
+*                                                                      use SSL.
+*
+*                           Point to a secure configuration structure, the web server is secure and uses SSL.
+*
+*               (b) The secure web server can be enabled ONLY if the application project contains a secure module
+*                   supported by uC/TCPIP-V2 such as:
+*
+*                   (i)  NanoSSL provided by Mocana.
+*                   (ii) CyaSSL  provided by YaSSL.
+*
+*           (3) (a) Default HTTP port used by all web browsers is 80. The default port number is defined by the following
+*                   value:
+*
+*                        HTTPs_CFG_DFLT_PORT
+*
+*
+*                   When default port is used the web server instance can be accessed using the IP address of the target
+*                   from any web browser:
+*
+*                       http://
+*
+*                   If the web server instance is configured with the non default port, the instance server should be accessed
+*                   via this kind of address:
+*
+*                       http://:
+*
+*                       Where
+*                            must be replaced by the ip address of the target.
+*                                  must be replaced by the configured port number.
+*
+*               (b) Default secure port used by all browsers is 443. The default secure port number is defined by the
+*                   following value:
+*
+*                       HTTPs_CFG_DFLT_PORT_SECURE
+*
+*                   When default port is used the web server instance can be accessed using the IP address of the target
+*                   from any web browser:
+*
+*                       https://
+*
+*                   If the web server instance is configured with the non default port, the instance server should be accessed
+*                   via this kind of address:
+*
+*                       https://:
+*
+*                       Where
+*                            must be replaced by the ip address of the target.
+*                                  must be replaced by the configured port number.
+*
+*               (c) Port number must be unique, i.e. it's not possible to start two instances with the same
+*                   port number.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_SOCK_SEL    SockSel                                                                                        */
+                                                                /* Configure socket type (see note #1) :                */
+    HTTPs_SOCK_SEL_IPv4_IPv6,
+                                                                /* HTTPs_SOCK_SEL_IPv4       Accept Only IPv4.          */
+                                                                /* HTTPs_SOCK_SEL_IPv6       Accept Only IPv6.          */
+                                                                /* HTTPs_SOCK_SEL_IPv4_IPv6  Accept Only Ipv4 & IPv6.   */
+
+    /* HTTPs_SECURE_CFG    *SecurePtr                                                                                   */
+                                                                /* Configure instance secure configuration (SSL) ...    */
+                                                                /* structure (see note #2):                             */
+    DEF_NULL,
+                                                                /* DEF_NULL for a non-secure web server.                */
+                                                                /* Pointer to the secure configuration to be used.      */
+
+    /* CPU_INT16U    Port                                                                                               */
+                                                                /* Configure instance server port (See note #3) :       */
+    HTTPs_CFG_DFLT_PORT,
+                                                                /* HTTPs_CFG_DFLT_PORT         Default HTTP     port.   */
+                                                                /* HTTPs_CFG_DFLT_PORT_SECURE  Default HTTP SSL port.   */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE CONNECTION CONFIGURATION
+*
+* Note(s) : (1) (a) 'ConnNbrMax' is used to configure maximum number of connections that the web server will be able to serve
+*                   simultaneously.
+*
+*               (b) Maximum number of connections must be configured following your requirements about the memory usage and
+*                   the number of connections:
+*
+*                   (1) Each connection requires memory space which is reserved at the instance start up. The memory
+*                       required by the web server is greatly affected by the number of connections configured.
+*
+*                   (2) When a client downloads an items such as an html document, image, css file, javascript file, it
+*                       should open a new connection for each of these items. Also, most common web servers can open up to
+*                       15 simultaneous connections. For example, 1 html document which includes 2 images + 1 css file,
+*                       should have 4 connections simultaneously opened.
+*
+*               (c) The number of connections and uC/TCPIP configurations must be set accordingly. Each connection
+*                   requires 1 socket and 1 TCP connection, so the following configuration values located in 'net_cfg.h'
+*                   MUST be correctly configured:
+*
+*                       NET_SOCK_CFG_SOCK_NBR_TCP
+*
+*           (2) For each connection, when the inactivity timeout occurs, the connection is automatically closed with
+*               whatever the last connection state was.
+*
+*           (3) Each connection has a buffer to receive or transmit data and to read files. If the memory is limited the buffer
+*               size can be reduced, but the performance might be impacted.
+*
+*           (4) (a) Enabling the persistent connection feature allows the connection to stay open for multiple HTTP transactions
+*                   before closing. This allows to reduce the traffic because the 3-way-handshake and the closing are done
+*                   only once instead of after each HTTP transactions.
+*
+*               (b) To allow the connection to stay open after HTTP transactions, 'HTTPs_CFG_PERSISTENT_CONN_EN' must be
+*                   set as 'DEF_ENABLED'.
+*                   See http-s_cfg.h section 'HTTP SERVER PERSISTENT CONNECTION CONFIGURATION' for further informations.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* CPU_INT08U    ConnNbrMax                                                                                         */
+                                                                /* Configure maximum number of simultaneous ...         */
+                                                                /* connections (see Note #1):                           */
+    15,
+                                                                /* MUST be >= 1                                         */
+
+    /* CPU_INT16U    ConnInactivityTimeout_s                                                                            */
+                                                                /* Configure connection maximum inactivity timeout ...  */
+                                                                /* ... in integer seconds (see Note #2).                */
+    10,
+                                                                /* SHOULD be >= 1                                       */
+
+    /* CPU_INT16U    BufLen                                                                                             */
+                                                                /* Configure connection buffer length (see note #3):    */
+    1460,
+                                                                /* MUST be >= 512                                       */
+
+    /* CPU_BOOLEAN    ConnPersistentEn                                                                                  */
+                                                                /* Configure persistent conn feature (see note #4):     */
+    DEF_ENABLED,
+                                                                /*   DEF_DISABLED     Persistent Conn support DISABLED  */
+                                                                /*   DEF_ENABLED      Persistent Conn support ENABLED   */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) The parameter 'FS_Type' is used to indicate which type of File System must be used with the HTTP server.
+*               The server supports three type of File System :
+*
+*                   HTTPs_FS_TYPE_NONE   : No File System is present.
+*                   HTTPs_FS_TYPE_STATIC : The Static File System offered with the uC/HTTP-server must be used.
+*                   HTTPs_FS_TYPE_DYN    : A real File System, like uC/FS, must be used.
+*
+*           (2) Each type of File System (see note #1) has it's own File System configuration object.
+*
+*                   HTTPs_CFG_FS_NONE
+*                   HTTPs_CFG_FS_STATIC
+*                   HTTPs_CFG_FS_DYN
+*
+*               See section 'HTTP SERVER FILE SYSTEM CONFIGURATION' for examples for each configuration object type.
+*
+*           (3) The default resource is returned when no resource is specified in the request of the client,
+*               i.e. accessing with only the web server address. Most of the time this resource should be the file
+*               "index.html".
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_FS_TYPE   FS_Type                                                                                          */
+                                                                /* Configure instance FS type (see note #1):            */
+    HTTPs_FS_TYPE_NONE,
+
+
+    /* const  void  *FS_CfgPtr                                                                                          */
+                                                                /* Configure FS configuration pointer (see note #2):    */
+   &HTTPs_CfgFS_None,
+
+    /* CPU_CHAR    *DfltResourceNamePtr                                                                                 */
+                                                                /* Configure instance default page (see note #3):       */
+    HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT,
+                                                                /* MUST be a string pointer                             */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE PROXY CONFIGURATION
+*
+* Note(s) : (1) (a) When an HTTP Server is behind an HTTP Proxy, the HTTP client must send its requests with an
+*                    absolute Uniform Resource Identifier (URI).
+*                   For example,
+*                       GET http://example.com/index.html HTTP/1.1
+*
+*                   When the absolute URI feature is enabled, the HTTP server will support absolute URI in the first line
+*                   of the http request messages (see example just above).
+*
+*                   The server will also look for the 'Host' header field in the received request messages and save it in
+*                   the 'HostPtr' field of the HTTPs_CONN structure.
+*
+*               (b) 'HTTPs_CFG_ABSOLUTE_URI_EN' must be set as 'DEF_ENABLED' to enable the web server support of
+*                    absolute URI.
+*                    See the http-s_cfg.h section of 'HTTP PROXY CONFIGURATION' for further information.
+*
+*               (c) The maximum host name length is the maximum length the server will allow for the received host name
+*                   in a request message.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   /* CPU_INT16U   HostNameLenMax                                                                                      */
+                                                               /* Configure maximum host name length (see note #1c):   */
+   128,
+                                                               /* SHOULD be > 1                                        */
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                           HOOKS CONFIGURATION
+*
+* Note(s) : (1) Multiple hook functions are offered by the uC/HTTP-server stack at different points of the HTTP
+*               transaction processing to personalize the server behavior. See Example Init for all the details on the
+*               hook functions available or online documentation at https://doc.micrium.com/display/httpdoc.
+*               If the application is using some hook functions, a HTTPs_HOOK_CFG object must be created that will
+*               contained all the pointer to the hook functions.
+*               The pointer to the HTTPs_HOOK_CFG object must after be passed to the HTTP-server configuration here.
+*               The parameter can be set to DEF_NULL if no hook functions are necessary for the upper application.
+*
+*           (2) Additional data or configuration specific to the upper application can be necessary inside hook
+*               functions. Therefore a void pointer is offered as second parameter for the hooks configuration.
+*               The parameter can be set to DEF_NULL if not useful.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* const  HTTPs_HOOK_CFG    *HooksPtr                                                                               */
+                                                                /* Configure Pointer to Hooks' Object (see note #1):    */
+    DEF_NULL,
+
+    /* const  void  *Hooks_CfgPtr                                                                                       */
+                                                                /* Configure Pointer to Application Data Hook.          */
+    DEF_NULL,
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     HEADER FIELD CONFIGURATION
+*
+* Note(s) : (1) To enable the Header feature supports in HTTP request, set the pointer to the Request Header configuration object.
+*               Set to DEF_NULL, if the Request Header feature is not used.
+*
+*               See HTTPs_HdrRxCfg Declaration for more details.
+*
+*           (2) To enable the Header feature supports in HTTP response, set the pointer to the Response Header configuration object.
+*               Set to DEF_NULL, if the Response Header feature is not used.
+*
+*               See HTTPs_HdrTxCfg Declaration for more details.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_HDR_RX_CFG  *HdrRxCfgPtr                                                                                   */
+                                                     /* Pointer to Request header Configuration Object (see note #1):   */
+   &HTTPs_HdrRxCfg,
+
+    /* HTTPs_HDR_TX_CFG  *HdrTxCfgPtr                                                                                   */
+                                                    /* Pointer to Response header Configuration Object (see note #2):   */
+   &HTTPs_HdrTxCfg,
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE QUERY STRING CONFIGURATION
+*
+* Note(s) : (1) To enable the Query String feature supports, set the pointer to the Query String configuration object.
+*               Set to DEF_NULL, if Query String feature is not used.
+*
+*               See HTTPs_QueryStrCfg Declaration for more details.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_QUERY_STR_CFG  *QueryStrCfgPtr                                                                             */
+                                                        /* Pointer to Query String Configuration Object (see note #1):  */
+   &HTTPs_QueryStrCfg,
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE FORM CONFIGURATION
+*
+* Note(s) : (1) To enable the Form feature supports, set the pointer to the Form configuration object.
+*               Set to DEF_NULL, if Form feature is not used.
+*
+*               See HTTPs_Form_Cfg Declaration for more details.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_FORM_CFG  *FormCfgPtr                                                                                      */
+                                                                /* Pointer to Form Configuration Object (see note #1):  */
+   &HTTPs_FormCfg,
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                               DYNAMIC TOKEN REPLACEMENT CONFIGURATION
+*
+* Note(s) : (1) To enable the Token feature supports, set the pointer to the Token configuration object.
+*               Set to DEF_NULL, if the Token feature is not used.
+*
+*               See HTTPs_TokenCfg Declaration for more details.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_TOKEN_CFG  *Token_CfgPtr                                                                                   */
+                                                              /* Pointer to Token Configuration Object (see note #1):   */
+   &HTTPs_TokenCfg,
+
+};                                                              /* End of configuration structure.                      */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Cfg/Template/http-s_instance_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Cfg/Template/http-s_instance_cfg.h
new file mode 100644
index 0000000..9a0256b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Cfg/Template/http-s_instance_cfg.h
@@ -0,0 +1,68 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+*                                               TEMPLATE
+*
+* Filename      : http-s_instance_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   FILES & FOLDERS STRING DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT               "\\"
+
+#define  HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT              "index.html"
+#define  HTTPs_CFG_INSTANCE_STR_FILE_ERR_404              "404.html"
+
+#define  HTTPs_CFG_INSTANCE_STR_FOLDER_UPLOAD             "\\"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   HTTP SERVER INSTANCE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_TASK_CFG  HTTPs_TaskCfgInstance;
+extern  const  HTTPs_CFG     HTTPs_CfgInstance;
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic.c
new file mode 100644
index 0000000..76c4ba5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic.c
@@ -0,0 +1,201 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP INSTANCE BASIC APPLICATION
+*
+* Filename      : app_basic.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize uC/HTTPs, initialize a web server instance and start it.
+*
+*                 (2) This example is for :
+*
+*                       (a) uC/TCPIP - V3.00.01 and up
+*                       (b) uC/FS    - V4.x
+*
+*                 (3) This file is an example about how to use uC/HTTPs, It may not cover all case needed by a real
+*                     application. Also some modification might be needed, insert the code to perform the stated
+*                     actions wherever 'TODO' comments are found.
+*
+*                     (a) For example this example doesn't manage the link state (plugs and unplugs), this can
+*                         be a problem when switching from a network to another network.
+*
+*                     (b) This example is not fully tested, so it is not guaranteed that all cases are cover
+*                         properly.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) (a) The uC/TCP-IP Network file system abstraction layer folder for traditional file system;
+*
+*                       '$uC-TCPIP/FS//net_.h'
+*
+*
+*               (b) The static file system API is located under uC/HTTPs File system folder;
+*
+*                       '$uc-HTTPs/FS/Static/http-s_fs_static.h'
+*********************************************************************************************************
+*/
+#define    MICRIUM_SOURCE
+#define    APP_BASIC_MODULE
+
+#include  "app_basic.h"
+
+#include  
+
+#if (APP_BASIC_FS_DYN_EN == DEF_ENABLED)
+#include                               /* TODO Location of File system port API. See Note 1.   */
+#include  
+#else
+#include                   /* TODO Location of File system port API. See Note 1.   */
+#include  "../Common/StaticFiles/generated_fs.h"
+#endif
+
+#include  "app_basic_http-s_instance_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*                                            AppBasic_Init()
+*
+* Description : (1) Initialize uC/HTTPs and start a web server instance:
+*
+*                   (a) Initialize the File System.
+*                   (b) Initialize uC/HTTPs module.
+*                   (c) Initialize a web server instance.
+*                   (d) Start that web server instance.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK, if successfully initialized and started (can access the web server).*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (2) Prerequisite modules must be initialized before calling any uC/HTTPs functions:
+*
+*                   (a) RTOS, such as uCOS-II or uCOS-III
+*                   (b) uC/LIB
+*                   (c) uC/CPU
+*                   (d) uC/TCP-IP
+*                   (e) File system, such as uC/FS.
+*
+*               (3) Dynamic File System: No files are loaded inside the File System at this point.
+*                                        One way to add files to the FS is to use to send POST request to the HTTP
+*                                        server with HTML form for file upload.
+*
+*                   HTTP Static FS     : The files can be loaded in the file system with the function
+*                                        HTTPs_FS_AddFile().
+*
+*               (4) Prior to do any call to uC/HTTPs, the module must be initialized. This is done by
+*                   calling HTTPs_Init(). If the process is successful, the Web server internal data structures are
+*                   initialized.
+*
+*               (5) Each web server must be initialized before it can be started or stopped. HTTPs_InstanceInit()
+*                   is responsible to allocate memory for the instance, initialize internal data structure and
+*                   create the web server instance's task.
+*
+*                   (a) The first argument is the instance configuration, which should be modified following you
+*                       requirements. The intance's configuration set the server's port, the number of connection that
+*                       can be accepted, the hooks functions, etc.
+*
+*                   (b) The second argument is the pointer to the instance task configuration. It set the task priority,
+*                       the stack size of the task, etc.
+*
+*               (6) Once a web server instance is initialized, it can be started using HTTPs_InstanceStart() to
+*                   become come accessible. This function start the web server instance's task. Each instance has
+*                   is own task and all accepted connection is processed with this single task.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppBasic_Init (void)
+{
+
+    HTTPs_INSTANCE  *p_https_instance;
+    CPU_BOOLEAN      success;
+    HTTPs_ERR        http_err;
+
+
+    /* TODO: Prerequisites modules must be initialized prior calling any of the following functions. See Note #2.       */
+
+
+#if (APP_BASIC_FS_DYN_EN == DEF_ENABLED)                        /* REAL DYNAMIC FILE SYSTEM CASE                        */
+    /* TODO: Make sure File System (such as uC/FS) is initialized before starting the instance. See Note #3.            */
+
+                                                                /* --------------- INITIALIZE FS STACK ---------------- */
+    success = App_FS_Init();
+    if (success != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+#else                                                           /* HTTP STATIC FILE SYSTEM CASE                         */
+    /* TODO: Make sure the HTTP Static File System is initialized before starting the instance. See Note #3.            */
+    /*       Make sure files that must be served by the web server is loaded in the Static file system. See Note #3.    */
+
+                                                                /* -------- INITALIZE HTTP STATIC FILE SYSTEM --------- */
+    success = HTTPs_FS_Init();
+    if (success != DEF_YES) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------- ADD FILES IN THE STATIC FILE SYSTEM -------- */
+                                                                /* TODO change the following call to add only the ...   */
+                                                                /* file required by you web application.                */
+    success = GeneratedFS_FileAdd();
+    if (success != DEF_YES) {
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* -------------- INITALIZE HTTPS MODULE -------------- */
+    HTTPs_Init(DEF_NULL, &http_err);                            /* See Note #4.                                         */
+    if (http_err != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------- INITALIZE WEB SERVER INSTANCE ----------- */
+    p_https_instance = HTTPs_InstanceInit(&HTTPs_CfgInstance_AppBasic,    /* Instance configuration. See Note #5a.      */
+                                          &HTTPs_TaskCfgInstance_AppBasic,/* Instance task configuration. See Note #5b. */
+                                          &http_err);
+    if (http_err != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------ START WEB SERVER INSTANCE ------------- */
+    HTTPs_InstanceStart(p_https_instance,                       /* Instance handle. See Note #6.                        */
+                       &http_err);
+    if (http_err != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    AppBasic_ErrCtr = 0;
+
+    return (DEF_OK);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic.h
new file mode 100644
index 0000000..e75f235
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic.h
@@ -0,0 +1,114 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*
+*                                   HTTP INSTANCE BASIC APPLICATION
+*
+* Filename      : app_basic.h
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef APP_BASIC_MODULE_PRESENT
+#define APP_BASIC_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef APP_BASIC_MODULE
+#define  APP_BASIC_EXT
+#else
+#define  APP_BASIC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  APP_BASIC_FS_DYN_EN          DEF_DISABLED
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+APP_BASIC_EXT  CPU_INT32U  AppBasic_ErrCtr;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppBasic_Init  (void);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* APP_BASIC_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic_http-s_hooks.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic_http-s_hooks.c
new file mode 100644
index 0000000..4ad7b42
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic_http-s_hooks.c
@@ -0,0 +1,1236 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+/*
+*********************************************************************************************************
+*
+*                                 HTTP INSTANCE SERVER HOOKS FILE
+*
+* Filename      : app_basic_http-s_hooks.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "app_basic.h"
+#include  "app_basic_http-s_instance_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  ERR_404_STR_FILE           "404.html"
+
+#define  INDEX_PAGE_URL             "/index.html"
+#define  REST_PAGE_URL              "/list.html"
+#define  FORM_SUBMIT_URL            "/form_submit"
+
+#define  FORM_LOGOUT_FIELD_NAME     "Log out"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        FUNCTIONS PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_InstanceInitHook      (const  HTTPs_INSTANCE         *p_instance,
+                                                  const  void                   *p_hook_cfg);
+
+static  CPU_BOOLEAN  HTTPs_ReqHdrRxHook          (const  HTTPs_INSTANCE         *p_instance,
+                                                  const  HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                         HTTP_HDR_FIELD          hdr_field);
+
+static  CPU_BOOLEAN  HTTPs_ReqHook               (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+static  CPU_BOOLEAN  HTTPs_ReqBodyRxHook         (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                         void                   *p_buf,
+                                                  const  CPU_SIZE_T              buf_size,
+                                                         CPU_SIZE_T             *p_buf_size_used);
+
+static  CPU_BOOLEAN  HTTPs_ReqRdySignalHook      (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                  const  HTTPs_KEY_VAL         *p_data);
+
+static  CPU_BOOLEAN  HTTPs_ReqRdyPollHook        (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+static  CPU_BOOLEAN  HTTPs_RespHdrTxHook         (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+static  CPU_BOOLEAN  HTTPs_RespTokenValGetHook   (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                  const  CPU_CHAR               *p_token,
+                                                         CPU_INT16U              token_len,
+                                                         CPU_CHAR               *p_val,
+                                                         CPU_INT16U              val_len_max);
+
+static  CPU_BOOLEAN  HTTPs_RespChunkDataGetHook  (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                         void                   *p_buf,
+                                                         CPU_SIZE_T              buf_len_max,
+                                                         CPU_SIZE_T             *p_tx_len);
+
+static  void         HTTPs_TransCompleteHook     (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+static void          HTTPs_ErrFileGetHook        (const  void                   *p_hook_cfg,
+                                                         HTTP_STATUS_CODE        status_code,
+                                                         CPU_CHAR               *p_file_str,
+                                                         CPU_INT32U              file_len_max,
+                                                         HTTPs_BODY_DATA_TYPE   *p_file_type,
+                                                         HTTP_CONTENT_TYPE      *p_content_type,
+                                                         void                  **p_data,
+                                                         CPU_INT32U             *p_data_len);
+
+static  void         HTTPs_ErrHook               (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                         HTTPs_ERR               err);
+
+static  void         HTTPs_ConnCloseHook         (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+
+/*
+*********************************************************************************************************
+*                                      HTTP SERVER HOOK CONFIGURATION
+*
+* Note(s): (1)  When the instance is created, an hook function can be called to initialize connection objects used by the instance.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_InstanceInitHook() function for further details.
+*
+*          (2)  Each time a header field other than the default one is received, a hook function is called
+*               allowing to choose which header field(s) to keep for further processing.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqHdrRxHook() function for further details.
+*
+*          (3)  For each new incoming connection request a hook function can be called by the web server to authenticate
+*               the remote connection to accept or reject it. This function can have access to allow stored request header
+*               field.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqHook() function for further details.
+*
+*          (4)  If the upper application want to parse the data received in the request body itself, a hook function is available.
+*               It will be called each time new data are received. The exception is when a POST request with a form is
+*               received. In that case, the HTTP server core will parse the body and saved the data into Key-Value blocks.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqBodyRxHook() function for further details.
+*
+*          (5)  The Signal hook function occurs after the HTTP request has been completely received.
+*               The hook function SHOULD NOT be blocking and SHOULD return quickly. A time consuming function will
+*               block the processing of the other connections and reduce the HTTP server performance.
+*               In case the request processing is time consuming, the Poll hook function SHOULD be enabled to
+*               allow the server to periodically verify if the upper application has finished the request processing.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqRdySignalHook() function for further details.
+*
+*          (6)  The Poll hook function SHOULD be enable in case the request processing require lots of time. It
+*               allows the HTTP server to periodically poll the upper application and verify if the request processing
+*               has finished.
+*               If the Poll feature is not required, this field SHOULD be set as DEF_NULL.
+*               See HTTPs_ReqRdyPollHook() function for further details.
+*
+*          (7)  Before an HTTP response message is transmitted, a hook function is called to enable adding header field(s) to
+*               the message before it is sent.
+*               The Header Module must be enabled for this hook to be called. See HTTPs_CFG_HDR in http-s_cfg.h.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_RespHdrTxHook() function for further details.
+*
+*          (8)  The hook function is called by the web server when a token is found. This means the hook
+*               function must fill a buffer with the value of the instance token to be sent.
+*               If the feature is not enabled, this field is not used and can be set as DEF_NULL.
+*               See 'HTTPs_RespTokenValGetHook' for further information.
+*
+*          (9)  To allow the upper application to transmit data with the Chunked Transfer Encoding, a hook function is
+*               available. If defined, it will be called at the moment of the Response body transfer, and it will be called
+*               until the application has transfer all its data.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_RespChunkDataGetHook() function for further details.
+*
+*          (10) Once an HTTP transaction is completed, a hook function can be called to notify the upper application that the
+*               transaction is done. This hook function could be used to free some previously allocated memory.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_TransCompleteHook() function for further details.
+*
+*          (11) When an internal error occurs during the processing of a connection a hook function can be called to
+*               notify the application of the error and to change the behavior such as the status code and the page returned.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ErrHook() function for further details.
+*
+*          (12) Get error file hook can be called every time an error has occurred when processing a connection.
+*               This function can set the web page that should be transmit instead of the default error page defined
+*               in http-s_cfg.h.
+*               If set to DEF_NULL the default error page will be used for every error.
+*               See HTTPs_ErrFileGetHook() function for further details.
+*
+*          (13) Once a connection is closed a hook function can be called to notify the upper application that a connection
+*               is no more active. This hook function could be used to free some previously allocated memory.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ConnCloseHook() function for further details.
+*********************************************************************************************************
+*/
+
+const  HTTPs_HOOK_CFG  HTTPs_Hooks_AppBasic = {
+        HTTPs_InstanceInitHook,                                 /* .OnInstanceInitHook    See Note #1.     */
+        HTTPs_ReqHdrRxHook,                                     /* .OnReqHdrRxHook        See Note #2.     */
+        HTTPs_ReqHook,                                          /* .OnReqHook             See Note #3.     */
+        HTTPs_ReqBodyRxHook,                                    /* .OnReqBodyRxHook       See Note #4.     */
+        HTTPs_ReqRdySignalHook,                                 /* .OnReqRdySignalHook    See Note #5.     */
+        HTTPs_ReqRdyPollHook,                                   /* .OnReqRdyPollHook      See Note #6.     */
+        HTTPs_RespHdrTxHook,                                    /* .OnRespHdrTxHook       See Note #7.     */
+        HTTPs_RespTokenValGetHook,                              /* .OnRespTokenHook       See Note #8.     */
+        HTTPs_RespChunkDataGetHook,                             /* .OnRespChunkHook       See Note #9.     */
+        HTTPs_TransCompleteHook,                                /* .OnTransCompleteHook   See Note #10.    */
+        HTTPs_ErrHook,                                          /* .OnErrHook             See Note #11.    */
+        HTTPs_ErrFileGetHook,                                   /* .OnErrFileGetHook      See Note #12.    */
+        HTTPs_ConnCloseHook                                     /* .OnConnCloseHook       See Note #13.    */
+};
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_InstanceInitHook()
+*
+* Description : Called to initialized the instance connection objects;
+*               Examples of behaviors that could be implemented :
+*
+*               (a) Session connections handling initialization:
+*
+*                   (1) Initialize the memory pool and chained list for session connection objects.
+*                   (2) Initialize a periodic timer which check for expired session and release them if
+*                       it is the case.
+*
+*               (b) Back-end Application Request processing task initialization.
+*
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceInit() via 'p_cfg->HooksPtr->OnInstanceInitHook()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_InstanceInitHook (const  HTTPs_INSTANCE  *p_instance,
+                                             const  void            *p_hook_cfg)
+{
+    /* Nothing to do for this example. */
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPs_ReqHdrRxHook()
+*
+* Description : Called each time a header field is parsed in a request message. Allows to choose which
+*               additional header field(s) need to be processed by the upper application.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+*               hdr_field   Type of the header field received.
+*                               See the HTTPs_HDR_FIELD declaration in http-s.h file for all the header types supported.
+*
+* Return(s)   : DEF_YES,   If the header field needs to be process.
+*               DEF_NO,    Otherwise.
+*
+* Caller(s)   : HTTPs_ReqHdrParse() via 'p_cfg->HooksPtr->OnReqHdrRxHook()'.
+*
+* Note(s)     : (1) The instance structure is for read-only. It MUST NOT be modified.
+*
+*               (2) The connection structure SHOULD NOT be modified. It should be only read to determine if the header
+*                   type must be stored.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqHdrRxHook (const  HTTPs_INSTANCE   *p_instance,
+                                         const  HTTPs_CONN       *p_conn,
+                                         const  void             *p_hook_cfg,
+                                                HTTP_HDR_FIELD    hdr_field)
+{
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+    switch (hdr_field) {
+        case HTTP_HDR_FIELD_COOKIE:
+        case HTTP_HDR_FIELD_COOKIE2:
+             return(DEF_YES);
+
+        default:
+             return(DEF_NO);
+    }
+#else
+    return (DEF_NO);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_ReqHook()
+*
+* Description : Called after the parsing of an HTTP request message's first line and header(s).
+*               Allows the application to process the information received in the request message.
+*               Examples of behaviors that could be implemented :
+*
+*               (a) Analyze the Request-URI and validate that the client has the permission to access
+*                   the resource. If not, change the Response Status Code to 403 (Forbidden) or 401
+*                   (Unauthorized) if an Authentication technique is implemented. In case of a 401
+*                   Status, a "WWW-Authenticate" header needs to be added to the response message
+*                   (See HTTPs_InstanceRespHdrTx() function)
+*
+*               (b) Depending on whether the header feature is enabled and which header fields have been
+*                   chosen for use (see HTTPs_ReqHdrRxHook() function), different behaviors
+*                   are possible. Here are some examples :
+*
+*                       (1) A "Cookie" header is received. The default html page is modified to include
+*                           personalized features for the client.
+*
+*                       (2) An "Authorization" header is received. This validates that the client login is good and
+*                           changes permanently its' access to the folder/file.
+*
+*                       (3) An "If-Modified-Since" header is received. It then validates whether or not the resource
+*                           has been modified since the 'HTTP-date' received with the header. If it was, continue
+*                           with the request processing normally, else change the Status Code to 304 (Not Modified).
+*
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : DEF_OK    if the application allows the request to be continue.
+*               DEF_FAIL  otherwise.
+*                               Status code will be set automatically to HTTPs_STATUS_UNAUTHORIZED
+*
+* Caller(s)   : HTTPs_Req() via 'p_cfg->HooksPtr->OnReqHook'.
+*
+* Note(s)     : (1) The instance structure is for read-only. It must not be modified at any point in this hook function.
+*
+*               (2) The following connection attributes can be accessed to analyze the connection:
+*
+*                   (a) 'ClientAddr'
+*                           This connection parameter contains the IP address and port used by the remote client to access the
+*                           server instance.
+*
+*                   (b) 'Method'
+*                           HTTPs_METHOD_GET        Get  request
+*                           HTTPs_METHOD_POST       Post request
+*                           HTTPs_METHOD_HEAD       Head request
+*
+*                   (c) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested.
+*
+*                   (d) 'HdrCtr'
+*                           This parameter is a counter of the number of header field that has been stored.
+*
+*                   (e) 'HdrListPtr'
+*                           This parameter is a pointer to the first header field stored. A linked list is created with
+*                           all header field stored.
+*
+*               (3) In this hook function, only the under-mentioned connection parameters are allowed
+*                   to be modified :
+*
+*                   (a) 'StatusCode'
+*
+*                           See HTTPs_STATUS_CODE declaration in http-s.h for all the status code supported.
+*
+*                   (b) 'PathPtr'
+*
+*                           This is a pointer to the string that contains the name of the file requested. You can change
+*                           the name of the requested file to send another file instead without error.
+*
+*                   (c) 'DataPtr'
+*
+*                           This is a pointer to the data file or data to transmit. This parameter should be null when calling
+*                           this function. If data from memory has to be sent instead of a file, this pointer must be set
+*                           to the location of the data.
+*
+*                   (d) 'RespBodyDataType'
+*
+*                           HTTPs_BODY_DATA_TYPE_FILE              Open and transmit a file. Value by default.
+*                           HTTPs_BODY_DATA_TYPE_STATIC_DATA       Transmit data from the memory. Must be set by the hook function.
+*                           HTTPs_BODY_DATA_TYPE_NONE              No body in response.
+*
+*                   (e) 'DataLen'
+*
+*                           0,                              Default value, will be set when the file is opened.
+*                           Data length,                    Must be set by the data length when transmitting data from
+*                                                           the memory
+*
+*                   (f) 'ConnDataPtr'
+*
+*                           This is a pointer available for the upper application when memory block must be allocated
+*                           to process the connection request. If memory is allocated by the upper application, the memory
+*                           space can be deallocated into another hook function.
+*
+*               (4) When the Location of the requested file has changed, besides the Status Code to change (3xx),
+*                   the 'PathPtr' parameter needs to be updated. A "Location" header will be added automatically in
+*                   the response by uC/HTTPs core with the new location.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqHook (const  HTTPs_INSTANCE  *p_instance,
+                                           HTTPs_CONN      *p_conn,
+                                    const  void            *p_hook_cfg)
+{
+    CPU_INT16S  str_cmp;
+    HTTPs_ERR   err;
+
+
+                                                                /* Redirect the REST page example to the default page. */
+    str_cmp = Str_Cmp_N(p_conn->PathPtr, REST_PAGE_URL, p_conn->PathLenMax);
+    if (str_cmp == 0) {
+
+        p_conn->StatusCode = HTTP_STATUS_SEE_OTHER;
+
+        HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err);
+        if (err != HTTPs_ERR_NONE) {
+            return (DEF_FAIL);
+        }
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+        Str_Copy(p_conn->HostPtr, "");
+        Str_Copy(p_conn->PathPtr, INDEX_PAGE_URL);
+#else
+        Str_Copy(p_conn->PathPtr, INDEX_PAGE_URL);
+#endif
+    }
+
+    str_cmp = Str_Cmp_N(p_conn->PathPtr, FORM_SUBMIT_URL, p_conn->PathLenMax);
+    if (str_cmp == 0) {
+                                                                /* Set Parameters to tx response body in chunk.         */
+        HTTPs_RespBodySetParamStaticData(p_instance,
+                                         p_conn,
+                                         HTTP_CONTENT_TYPE_JSON,
+                                         DEF_NULL,
+                                         0,
+                                         DEF_NO,
+                                        &err);
+        if (err != HTTPs_ERR_NONE) {
+            return (DEF_FAIL);
+        }
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_ReqBodyRxHook()
+*
+* Description : Called when body data is received by the HTTPs core. Allows the application to retrieve
+*               body data.
+*
+* Argument(s) : p_instance       Pointer to the HTTPs instance object.
+*
+*               p_conn           Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg       Pointer to hook configuration object.
+*
+*               p_buf            Pointer to the data buffer.
+*
+*               buf_size         Size of the data rx available inside the buffer.
+*
+*               p_buf_size_used  Pointer to the variable that will received the length of the data consumed by the app.
+*
+* Return(s)   : DEF_YES    To continue with the data reception.
+*               DEF_NO     If the application doesn't want to rx data anymore.
+*
+* Caller(s)   : HTTPs_Body() via p_cfg->HooksPtr->OnReqBodyRxHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqBodyRxHook (const  HTTPs_INSTANCE  *p_instance,
+                                                 HTTPs_CONN      *p_conn,
+                                          const  void            *p_hook_cfg,
+                                                 void            *p_buf,
+                                          const  CPU_SIZE_T       buf_size,
+                                                 CPU_SIZE_T      *p_buf_size_used)
+{
+    /* Nothing to do for this example. */
+    return (DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPs_ReqRdySignalHook()
+*
+* Description : If defined, this hook function is called after the request has been completely received and
+*               parse by the HTTP server core.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+*               p_data      Pointer to the first key-value pair received in a form if any.
+*                           DEF_NULL otherwise.
+*
+* Return(s)   : DEF_YES, if the response can be sent.
+*
+*               DEF_NO,  if the response cannot be sent after this call and the Poll function MUST be called before
+*                        sending the response (see note #3).
+*
+* Caller(s)   : HTTPs_MethodPost() via 'p_cfg->HooksPtr->OnReqRdySignalHook()'.
+*
+* Note(s)     : (1) This callback function SHOULD NOT be blocking and SHOULD return quickly. A time consuming
+*                   function will block the processing of other connections and reduce the HTTP server performance.
+*
+*               (2) If the request data received take a while to be processed:
+*
+*                   (a) the processing SHOULD be done in a separate task and not in this callback function to avoid
+*                       blocking other connections.
+*
+*                   (b) the poll callback function SHOULD be used to allow the connection to poll periodically the
+*                       upper application and verify if the request data processing has been completed.
+*
+*                       The 'ConnDataPtr' attribute inside HTTPs_CONN structure can be used to store a
+*                       semaphore pointer related to the completion of the request data processing.
+*
+*                       See 'HTTPs_ReqRdyPollHook()' for more details on poll function.
+*
+*               (3) The following connection attributes can be accessed to analyze the connection:
+*
+*                   (a) 'ClientAddr'
+*                           This connection parameter contains the IP address and port used by the remote client to access the
+*                           server instance.
+*
+*                   (b) 'Method'
+*                           HTTPs_METHOD_GET        Get  request
+*                           HTTPs_METHOD_POST       Post request
+*                           HTTPs_METHOD_HEAD       Head request
+*
+*                   (c) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested.
+*
+*                   (d) 'HdrCtr'
+*                           This parameter is a counter of the number of header field that has been stored.
+*
+*                   (e) 'HdrListPtr'
+*                           This parameter is a pointer to the first header field stored. A linked list is created with
+*                           all header field stored.
+*
+*                   (f) 'ConnDataPtr'
+*                           This is a pointer available for the upper application when memory block must be allocated
+*                           to process the connection request. If memory is allocated by the upper application, the memory
+*                           space can be deallocated into another hook function.
+*
+*               (4) In this hook function, only the under-mentioned connection parameters are allowed
+*                   to be modified :
+*
+*                   (a) 'StatusCode'
+*                           See HTTPs_STATUS_CODE declaration in http-s.h for all the status code supported.
+*
+*                   (b) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested. You can change
+*                           the name of the requested file to send another file instead without error.
+*
+*                   (c) 'DataPtr'
+*                           This is a pointer to the data file or data to transmit. This parameter should be null when calling
+*                           this function. If data from memory has to be sent instead of a file, this pointer must be set
+*                           to the location of the data.
+*
+*                   (d) 'RespBodyDataType'
+*                           HTTPs_BODY_DATA_TYPE_FILE              Open and transmit a file. Value by default.
+*                           HTTPs_BODY_DATA_TYPE_STATIC_DATA       Transmit data from the memory. Must be set by the hook function.
+*                           HTTPs_BODY_DATA_TYPE_NONE              No body in response.
+*
+*                   (e) 'DataLen'
+*                           0,                              Default value, will be set when the file is opened.
+*                           Data length,                    Must be set to the data length when transmitting data from
+*                                                           the memory
+*
+*               (5) When the Location of the requested file has change, besides the Status Code to change (3xx),
+*                   the 'PathPtr' parameter needs to be update. A "Location" header will be added automatically in
+*                   the response by uC/HTTPs core with the new location.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqRdySignalHook (const  HTTPs_INSTANCE  *p_instance,
+                                                    HTTPs_CONN      *p_conn,
+                                             const  void            *p_hook_cfg,
+                                             const  HTTPs_KEY_VAL  *p_data)
+{
+    HTTPs_KEY_VAL  *p_ctrl_var;
+    CPU_INT16S      str_cmp;
+    HTTPs_ERR       err;
+
+
+    p_ctrl_var = (HTTPs_KEY_VAL *)p_data;
+    while (p_ctrl_var != DEF_NULL) {
+
+                                                                /* -------------- RECEIVED KEY-VALUE TYPE ------------- */
+        if (p_ctrl_var->DataType == HTTPs_KEY_VAL_TYPE_PAIR) {
+
+            str_cmp = Str_Cmp_N(p_ctrl_var->KeyPtr, FORM_LOGOUT_FIELD_NAME, p_ctrl_var->KeyLen);
+            if (str_cmp == 0) {
+
+                p_conn->StatusCode = HTTP_STATUS_SEE_OTHER;     /* Redirect the page...                               */
+
+                HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err);
+                if (err != HTTPs_ERR_NONE) {
+                    return (DEF_YES);
+                }
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+                Str_Copy(p_conn->HostPtr, "");
+                Str_Copy(p_conn->PathPtr, INDEX_PAGE_URL);
+#else
+                Str_Copy(p_conn->PathPtr, INDEX_PAGE_URL);
+#endif
+            }
+
+        } else if (p_ctrl_var->DataType == HTTPs_KEY_VAL_TYPE_FILE) {
+                                                                /* Send back in response last file received in post.    */
+            HTTPs_RespBodySetParamFile(p_instance,
+                                       p_conn,
+                                       p_ctrl_var->ValPtr,
+                                       HTTP_CONTENT_TYPE_UNKNOWN,
+                                       DEF_NO,
+                                      &err);
+            if (err != HTTPs_ERR_NONE) {
+                return (DEF_YES);
+            }
+        }
+
+        p_ctrl_var = p_ctrl_var->NextPtr;
+    }
+
+    (void)&p_instance;                                          /* Prevent 'variable unused' compiler warning.          */
+
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_ReqRdyPollHook()
+*
+* Description : Called periodically by a connection waiting for the upper application to complete the
+*               request processing.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : DEF_YES, if the response can be sent.
+*
+*               DEF_NO,  if the response cannot be sent after this call and the Poll function MUST be called again
+*                        before sending the response (see note #2).
+*
+* Caller(s)   : HTTPs_MethodPost() via 'p_cfg->HooksPtr->OnReqRdyPollHook()'.
+*
+* Note(s)     : (1) This callback function SHOULD NOT be blocking and SHOULD return quickly. A time consuming
+*                   function will block the processing of other connections and reduce the HTTP server performance.
+*
+*                   This function will be called periodically by the connection until DEF_YES is returned.
+*
+*               (2) The poll callback function SHOULD be used when the request processing takes a while to
+*                   be completed. It will allow the server to periodically poll the upper application to verify
+*                   if the request processing has finished.
+*
+*                   The 'ConnDataPtr' attribute inside the HTTP_CONN structure can be used to store a
+*                   semaphore pointer related to the completion of the request processing.
+*
+*                   See 'HTTPs_InstanceReqRdySignal()' for more details on post/poll functionality.
+*
+*               (3) The following connection attributes can be accessed to analyze the connection:
+*
+*                   (a) 'ClientAddr'
+*                           This connection parameter contains the IP address and port used by the remote client to access the
+*                           server instance.
+*
+*                   (b) 'Method'
+*                           HTTPs_METHOD_GET        Get  request
+*                           HTTPs_METHOD_POST       Post request
+*                           HTTPs_METHOD_HEAD       Head request
+*
+*                   (c) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested.
+*
+*                   (d) 'HdrCtr'
+*                           This parameter is a counter of the number of header field that has been stored.
+*
+*                   (e) 'HdrListPtr'
+*                           This parameter is a pointer to the first header field stored. A linked list is created with
+*                           all header field stored.
+*
+*                   (f) 'ConnDataPtr'
+*                           This is a pointer available for the upper application when memory block must be allocated
+*                           to process the connection request. If memory is allocated by the upper application, the memory
+*                           space can be deallocated into another hook function.
+*
+*               (4) In this hook function, only the under-mentioned connection parameters are allowed
+*                   to be modified :
+*
+*                   (a) 'StatusCode'
+*                           See HTTPs_STATUS_CODE declaration in http-s.h for all the status code supported.
+*
+*                   (b) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested. You can change
+*                           the name of the requested file to send another file instead without error.
+*
+*                   (c) 'DataPtr'
+*                           This is a pointer to the data file or data to transmit. This parameter should be null when calling
+*                           this function. If data from memory has to be sent instead of a file, this pointer must be set
+*                           to the location of the data.
+*
+*                   (d) 'RespBodyDataType'
+*                           HTTPs_BODY_DATA_TYPE_FILE              Open and transmit a file. Value by default.
+*                           HTTPs_BODY_DATA_TYPE_STATIC_DATA       Transmit data from the memory. Must be set by the hook function.
+*                           HTTPs_BODY_DATA_TYPE_NONE              No body in response.
+*
+*                   (e) 'DataLen'
+*                           0,                              Default value, will be set when the file is opened.
+*                           Data length,                    Must be set to the data length when transmitting data from
+*                                                           the memory
+*
+*               (5) When the Location of the requested file has change, besides the Status Code to change (3xx),
+*                   the 'PathPtr' parameter needs to be update. A "Location" header will be added automatically in
+*                   the response by uC/HTTPs core with the new location.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqRdyPollHook (const  HTTPs_INSTANCE  *p_instance,
+                                                  HTTPs_CONN      *p_conn,
+                                           const  void            *p_hook_cfg)
+{
+    /* Nothing to do for this example. */
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_RespHdrTxHook()
+*
+* Description : Called each time the HTTP server is building a response message. Allows for adding header
+*               fields to the response message according to the application needs.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : DEF_YES,    if the header fields are added without running into a error.
+*
+*               DEF_NO,     otherwise.
+*
+* Caller(s)   : HTTPsResp_Hdr() via 'p_cfg->OnRespHdrTxHook()'.
+*
+* Note(s)     : (1) The instance structure MUST NOT be modified.
+*
+*               (2) The connection structure MUST NOT be modified manually since the response is about to be
+*                   transmitted at this point. The only change to the connection structure should be the
+*                   addition of header fields for the response message through the function HTTPs_RespHdrGet().
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_RespHdrTxHook (const  HTTPs_INSTANCE  *p_instance,
+                                                 HTTPs_CONN      *p_conn,
+                                          const  void            *p_hook_cfg)
+{
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+
+           HTTPs_HDR_BLK  *p_resp_hdr_blk;
+    const  HTTPs_CFG      *p_cfg;
+           CPU_CHAR       *str_data;
+           CPU_SIZE_T      str_len;
+           HTTPs_ERR       http_err;
+
+
+    p_cfg = p_instance->CfgPtr;
+
+    if (p_cfg->HdrTxCfgPtr == DEF_NULL) {
+        return (DEF_NO);
+    }
+
+    switch (p_conn->StatusCode) {
+           case HTTP_STATUS_OK:
+
+                if (p_conn->ReqContentType == HTTP_CONTENT_TYPE_HTML) {
+
+                                                                /* --------------- ADD SERVER HDR FIELD --------------- */
+                                                                /* Get and add header block to the connection.          */
+                    p_resp_hdr_blk = HTTPs_RespHdrGet(p_instance,
+                                                      p_conn,
+                                                      HTTP_HDR_FIELD_SERVER,
+                                                      HTTPs_HDR_VAL_TYPE_STR_DYN,
+                                                     &http_err);
+                    if (p_resp_hdr_blk == DEF_NULL) {
+                        return(DEF_FAIL);
+                    }
+
+                    str_data = "uC-HTTP-server";                /* Build Server string value.                           */
+
+                    str_len = Str_Len_N(str_data, p_cfg->HdrTxCfgPtr->DataLenMax);
+
+                                                                /* update hdr blk parameter.                            */
+                    Str_Copy_N(p_resp_hdr_blk->ValPtr,
+                               str_data,
+                               str_len);
+
+                    p_resp_hdr_blk->ValLen = str_len;
+                }
+                break;
+
+
+           default:
+                break;
+    }
+#endif
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPs_RespTokenValGetHook()
+*
+* Description : Called for each ${TEXT_STRING} embedded variable found in a HTML document.
+*
+* Argument(s) : p_instance   Pointer to the HTTPs instance object.
+*
+*               p_conn       Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg   Pointer to hook configuration object.
+*
+*               p_token      Pointer to the string that contains the value of the HTML embedded token.
+*
+*               token_len    Length of the embedded token.
+*
+*               p_val        Pointer to which buffer token value is copied to.
+*
+*               val_len_max  Maximum buffer length.
+*
+* Return(s)   : DEF_OK,   if token value copied successfully.
+*               DEF_FAIL, otherwise (see Note #3).
+*
+* Caller(s)   : HTTPs_TokenValGet() via 'p_cfg->HooksPtr->OnRespTokenHook()'.
+*
+* Note(s)     : (1) The instance structure MUST NOT be modified.
+*
+*               (2) The connection structure MUST NOT be modified manually since the response is about to be
+*                   transmitted at this point. The only change to the connection structure should be the
+*                   addition of header fields for the response message through the function HTTPs_RespHdrGet().
+*
+*               (3) If the token replacement failed, the token will be replaced by a line of tilde (~) of
+*                   length equal to val_len_max.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_RespTokenValGetHook (const  HTTPs_INSTANCE  *p_instance,
+                                                       HTTPs_CONN      *p_conn,
+                                                const  void            *p_hook_cfg,
+                                                const  CPU_CHAR        *p_token,
+                                                       CPU_INT16U       token_len,
+                                                       CPU_CHAR        *p_val,
+                                                       CPU_INT16U       val_len_max)
+{
+    static  CPU_CHAR    buf[20];
+            CPU_INT32U  ver;
+
+
+    if (Str_Cmp_N(p_token, "NET_VERSION", 11) == 0) {
+#if (NET_VERSION >  205u)
+        ver =  NET_VERSION / 10000;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, ' ', DEF_NO, DEF_NO,  &buf[0]);
+        buf[2] = '.';
+
+        ver = (NET_VERSION /   100) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_NO,  &buf[3]);
+        buf[5] = '.';
+
+        ver = (NET_VERSION /     1) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_YES, &buf[6]);
+        buf[8] = '\0';
+
+#else
+        ver =  NET_VERSION /   100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, ' ', DEF_NO, DEF_NO,  &buf[0]);
+        buf[2] = '.';
+
+        ver = (NET_VERSION /     1) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_YES, &buf[3]);
+        buf[5] = '\0';
+#endif
+
+    } else if (Str_Cmp_N(p_token, "HTTPs_VERSION", 13) == 0) {
+        ver =  HTTPs_VERSION / 10000;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, ' ', DEF_NO, DEF_NO,  &buf[0]);
+        buf[2] = '.';
+
+        ver = (HTTPs_VERSION /   100) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_NO,  &buf[3]);
+        buf[5] = '.';
+
+        ver = (HTTPs_VERSION /     1) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_YES, &buf[6]);
+        buf[8] = '\0';
+    }
+
+    Str_Copy_N(p_val, &buf[0], val_len_max);
+
+
+    (void)&p_instance;                                          /* Prevent 'variable unused' compiler warning.          */
+    (void)&p_conn;
+    (void)&token_len;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPs_RespChunkDataGetHook()
+*
+* Description : Called to get the application data to put in the body when transferring in chunk.
+*
+* Argument(s) : p_instance      Pointer to the HTTPs instance object.
+*
+*               p_conn          Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg      Pointer to hook configuration object.
+*
+*               p_buf           Pointer to the buffer to fill.
+*
+*               buf_len_max     Maximum length the buffer can contain.
+*
+*               p_tx_len        Variable that will received the length written in the buffer.
+*
+* Return(s)   : DEF_YES      if there is no more data to send.
+*               DEF_NO       otherwise.
+*
+* Caller(s)   : HTTPs_RespDataTransferChunked via p_cfg->HooksPtr->OnRespChunkHook.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_RespChunkDataGetHook (const  HTTPs_INSTANCE  *p_instance,
+                                                        HTTPs_CONN      *p_conn,
+                                                 const  void            *p_hook_cfg,
+                                                        void            *p_buf,
+                                                        CPU_SIZE_T       buf_len_max,
+                                                        CPU_SIZE_T      *p_tx_len)
+{
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    const  HTTPs_CFG      *p_cfg = p_instance->CfgPtr;
+           HTTPs_KEY_VAL  *p_key_val;
+           CPU_INT16S      str_cmp;
+
+
+    str_cmp = Str_Cmp_N(p_conn->PathPtr, FORM_SUBMIT_URL, p_conn->PathLenMax);
+    if (str_cmp == 0) {
+                                                                /* Construct JSON for user                              */
+        Str_Copy(p_buf, "{\"user\": {\"first name\": \"");      /* Add First Name field.                                */
+        p_key_val = p_conn->FormDataListPtr;
+        while (p_key_val != DEF_NULL) {
+            str_cmp = Str_Cmp_N(p_key_val->KeyPtr, "firstname", p_cfg->FormCfgPtr->KeyLenMax);
+            if (str_cmp == 0) {
+                Str_Cat_N(p_buf, p_key_val->ValPtr, p_key_val->ValLen);
+                break;
+            }
+            p_key_val = p_key_val->NextPtr;
+        }
+
+        Str_Cat(p_buf, "\", \"last name\":\"");                 /* Add Last Name field.                                 */
+        p_key_val = p_conn->FormDataListPtr;
+        while (p_key_val != DEF_NULL) {
+            str_cmp = Str_Cmp_N(p_key_val->KeyPtr, "lastname", p_cfg->FormCfgPtr->KeyLenMax);
+            if (str_cmp == 0) {
+                Str_Cat_N(p_buf, p_key_val->ValPtr, p_key_val->ValLen);
+                break;
+            }
+            p_key_val = p_key_val->NextPtr;
+        }
+        Str_Cat(p_buf, "\"}}");
+
+    }
+
+   *p_tx_len = Str_Len_N(p_buf, p_cfg->BufLen);
+#else
+    CPU_SW_EXCEPTION(;);
+#endif
+    return (DEF_YES);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPs_TransCompleteHook()
+*
+* Description : Called each time an HTTP Transaction has been completed. Allows the upper application
+*               to free some previously allocated memory associated with a request.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsConn_Process() via 'p_cfg->HooksPtr->OnTransCompleteHook().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPs_TransCompleteHook (const  HTTPs_INSTANCE  *p_instance,
+                                              HTTPs_CONN      *p_conn,
+                                       const  void            *p_hook_cfg)
+{
+    /* Nothing to do for this example. */
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPs_InstanceErrFileGet()
+*
+* Description : (1) Called when the response status code has been changed to an error status code. The
+*                   change could be the result of the request processing in the HTTPs_ReqHook()
+*                   callback function or the result of an internal error in the uC/HTTPs core.
+*
+*               (2) This function is intended to set the name of the file which will be sent with the response message.
+*                   If no file is set, a default status page will be sent including the status code number and the
+*                   reason phrase.
+*
+* Argument(s) : p_hook_cfg      Pointer to hook configuration object.
+*
+*               status_code     Status code, number of the response message.
+*
+*               p_file_str      Pointer to the buffer where the filename string must be copied.
+*
+*               file_len_max    Maximum length of the filename.
+*
+*               p_file_type     Pointer to the variable where the file type must be copied:
+*                                   HTTPs_FILE_TYPE_FS,           when file is include in a File System.
+*                                   HTTPs_FILE_TYPE_STATIC_DATA,  when file is a simple data stream inside a memory
+*                                                                 block.
+*
+*               p_content_type  Content type of the body.
+*                               If the data is a File. the content type doesn't need to be set. It will be
+*                               set according to the file extension.
+*                               If the data is Static Data, the parameter MUST be set.
+*
+*               p_data          Pointer to the data memory block, if file type is HTTPs_FILE_TYPE_STATIC_DATA.
+*                               DEF_NULL,                         otherwise
+*
+*               p_data_len      Pointer to variable holding
+*                               the length of the data,           if file type is HTTPs_FILE_TYPE_STATIC_DATA.
+*                               DEF_NULL,                         otherwise
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsResp_PrepareStatusCode() via 'p_cfg->HooksPtr->OnErrFileGetHook().
+*
+* Note(s)     : (1) If the configured file doesn't exist the instance will transmit the default web page instead,
+*                   defined by HTTPs_CFG_HTML_DFLT_ERR_PAGE in http-s_cfg.h
+*********************************************************************************************************
+*/
+
+static  void  HTTPs_ErrFileGetHook (const  void                   *p_hook_cfg,
+                                           HTTP_STATUS_CODE        status_code,
+                                           CPU_CHAR               *p_file_str,
+                                           CPU_INT32U              file_len_max,
+                                           HTTPs_BODY_DATA_TYPE   *p_file_type,
+                                           HTTP_CONTENT_TYPE      *p_content_type,
+                                           void                  **p_data,
+                                           CPU_INT32U             *p_data_len)
+{
+    switch (status_code) {
+        case HTTP_STATUS_NOT_FOUND:
+             Str_Copy_N(p_file_str, ERR_404_STR_FILE, file_len_max);
+            *p_file_type = HTTPs_BODY_DATA_TYPE_FILE;
+             return;
+
+
+        default:
+             Str_Copy_N(p_file_str, HTTPs_HTML_DLFT_ERR_STR_NAME, file_len_max);
+            *p_data         = HTTPs_CFG_HTML_DFLT_ERR_PAGE;
+            *p_data_len     = HTTPs_HTML_DLFT_ERR_LEN;
+            *p_file_type    = HTTPs_BODY_DATA_TYPE_STATIC_DATA;
+            *p_content_type = HTTP_CONTENT_TYPE_HTML;
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPs_ErrHook()
+*
+* Description : Called each time an internal error occurs.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+*               err         Internal error that occurred:
+*                               See HTTPs_ERR declaration in http-s.h for all the error codes possible.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_ErrInternal() via 'p_cfg->HooksPtr->OnErrHook()'.
+*
+* Note(s)     : (1) The instance structure is for read-only. It must not be modified at any point in this hook function.
+*
+*               (2) The following connection attributes can be accessed to analyze the connection:
+*
+*                   (a) 'ClientAddr'
+*                           This connection parameter contains the IP address and port used by the remote client to access the
+*                           server instance.
+*
+*                   (b) 'Method'
+*                           HTTPs_METHOD_GET        Get  request
+*                           HTTPs_METHOD_POST       Post request
+*                           HTTPs_METHOD_HEAD       Head request
+*
+*                   (c) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested.
+*
+*                   (d) 'HdrCtr'
+*                           This parameter is a counter of the number of header field that has been stored.
+*
+*                   (e) 'HdrListPtr'
+*                           This parameter is a pointer to the first header field stored. A linked list is created with
+*                           all header field stored.
+*
+*               (3) In this hook function, only the under-mentioned connection parameters are allowed
+*                   to be modified :
+*
+*                   (a) 'StatusCode'
+*                           See HTTPs_STATUS_CODE declaration in http-s.h for all the status code supported.
+*
+*                   (b) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested. You can change
+*                           the name of the requested file to send another file instead without error.
+*
+*                   (c) 'DataPtr'
+*                           This is a pointer to the data file or data to transmit. This parameter should be null when calling
+*                           this function. If data from memory has to be sent instead of a file, this pointer must be set
+*                           to the location of the data.
+*
+*                   (d) 'RespBodyDataType'
+*                           HTTPs_BODY_DATA_TYPE_FILE              Open and transmit a file. Value by default.
+*                           HTTPs_BODY_DATA_TYPE_STATIC_DATA       Transmit data from the memory. Must be set by the hook function.
+*                           HTTPs_BODY_DATA_TYPE_NONE              No body in response.
+*
+*                   (e) 'DataLen'
+*                           0,                              Default value, will be set when the file is opened.
+*                           Data length,                    Must be set to the data length when transmitting data from
+*                                                           the memory
+*
+*                   (f) 'ConnDataPtr'
+*                           This is a pointer available for the upper application when memory block must be allocated
+*                           to process the connection request. If memory is allocated by the upper application, the memory
+*                           space can be deallocated into another hook function.
+*********************************************************************************************************
+*/
+
+static  void  HTTPs_ErrHook (const  HTTPs_INSTANCE  *p_instance,
+                                    HTTPs_CONN      *p_conn,
+                             const  void            *p_hook_cfg,
+                                    HTTPs_ERR        err)
+{
+    AppBasic_ErrCtr++;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_ConnCloseHook()
+*
+* Description : Called each time a connection is being closed. Allows the upper application to free some
+*               previously allocated memory.
+*
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_Close() via 'p_cfg->HooksPtr->OnConnCloseHook()'
+*
+* Note(s)     : (1) The instance structure is for read-only. It MUST NOT be modified.
+*********************************************************************************************************
+*/
+
+static  void  HTTPs_ConnCloseHook (const  HTTPs_INSTANCE  *p_instance,
+                                          HTTPs_CONN      *p_conn,
+                                   const  void            *p_hook_cfg)
+{
+    /* Nothing to do for this example. */
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic_http-s_instance_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic_http-s_instance_cfg.c
new file mode 100644
index 0000000..17d8b57
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic_http-s_instance_cfg.c
@@ -0,0 +1,364 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+* Filename      : app_basic_http-s_instance_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) All values that are used in this file and are defined in other header files should be
+*               included in this file. Some values could be located in the same file such as task priority
+*               and stack size. This template file assume that the following values are defined in app_cfg.h:
+*
+*                   HTTPs_OS_CFG_INSTANCE_TASK_PRIO
+*                   HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                             /* See Note #1.                                         */
+
+#include  "app_basic_http-s_instance_cfg.h"
+#include  "app_basic.h"
+
+#if (APP_BASIC_FS_DYN_EN == DEF_ENABLED)
+#include  
+#else
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   FILES & FOLDERS STRING DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT                "\\"
+
+#define  HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT              "index.html"
+#define  HTTPs_CFG_INSTANCE_STR_FILE_ERR_404              "404.html"
+
+#define  HTTPs_CFG_INSTANCE_STR_FOLDER_UPLOAD             "\\"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  HTTPs_HOOK_CFG  HTTPs_Hooks_AppBasic;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TASK CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  NET_TASK_CFG  HTTPs_TaskCfgInstance_AppBasic = {
+
+    HTTPs_OS_CFG_INSTANCE_TASK_PRIO,                            /* .Prio : Configure Instance Task priority.            */
+
+    HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE,                        /* .StkSizeBytes : Configure instance task size.        */
+
+    DEF_NULL                                                    /* .StkPtr : Configure pointer to base of the stack.    */
+
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (APP_BASIC_FS_DYN_EN == DEF_ENABLED)
+const  HTTPs_CFG_FS_DYN  HTTPs_CfgFS_AppBasic = {
+
+   &NetFS_API_FS_V4,                                            /* .FS_API_Ptr : Pointer to FS API.                     */
+
+    HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT                          /* .WorkingFolderNamePtr : FS working folder.           */
+};
+#else
+const  HTTPs_CFG_FS_STATIC  HTTPs_CfgFS_AppBasic = {
+
+   &HTTPs_FS_API_Static,                                        /* .FS_API_Ptr : Pointer to FS API.                     */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER RX CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_RX_CFG  HTTPs_HdrRxCfg_AppBasic = {
+
+    15,                                                         /* .NbrPerConnMax                                       */
+
+    128,                                                        /* .DataLenMax                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER TX CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_TX_CFG  HTTPs_HdrTxCfg_AppBasic = {
+
+    15,                                                         /* .NbrPerConnMax                                       */
+
+    128,                                                        /* .DataLenMax                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                           HTTP SERVER INSTANCE QUERY STRING CONFIGURATION
+*
+* Note(s) : See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_QUERY_STR_CFG    HTTPs_QueryStrCfg_AppBasic = {
+
+    5,                                                          /* .NbrPerConnMax                                       */
+
+    15,                                                         /* .KeyLenMax                                           */
+
+    20,                                                         /* .ValLenMax                                           */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE FORM CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_FORM_CFG     HTTPs_FormCfg_AppBasic = {
+
+
+    15,                                                         /* .NbrPerConnMax                                       */
+
+    10,                                                         /* .KeyLenMax                                           */
+
+    48,                                                         /* .ValLenMax                                           */
+
+    DEF_ENABLED,                                                /* .MultipartEn                                         */
+
+#if (APP_INIT_FS_DYN_EN == DEF_ENABLED)
+    DEF_ENABLED,                                                /* .MultipartFileUploadEn                               */
+#else
+    DEF_DISABLED,
+#endif
+
+    DEF_ENABLED,                                                /* .MultipartFileUploadOverWrEn                         */
+
+    HTTPs_CFG_INSTANCE_STR_FOLDER_UPLOAD,                       /* .MultipartFileUploadFolderPtr                        */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TOKEN CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_TOKEN_CFG   HTTPs_TokenCfg_AppBasic = {
+
+    5,                                                          /* .NbrPerConnMax                                       */
+
+    12,                                                         /* .ValLenMax                                           */
+
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               HTTP SERVER INSTANCE CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_CFG  HTTPs_CfgInstance_AppBasic = {
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      INSTANCE OS CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+        1u,                                                     /* .OS_TaskDly_ms : Configure instance task delay.      */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                INSTANCE LISTEN SOCKET CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    HTTPs_SOCK_SEL_IPv4_IPv6,                                   /* .SockSel : Socket type.                              */
+
+    DEF_NULL,                                                   /* .SecurePtr : Secure configuration (SSL) Pointer.     */
+
+    HTTPs_CFG_DFLT_PORT,                                        /* .Port : Server port number.                          */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE CONNECTION CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    15,                                                         /* .ConnNbrMax : Maximum number of simultaneous.        */
+
+    15,                                                         /* .ConnInactivityTimeout_s : Conn inactivity timeout.  */
+
+    1460,                                                       /* .BufLen : Connection buffer length.                  */
+
+    DEF_ENABLED,                                               /* .ConnPersistentEn : Persistent conn feature.         */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE FILE SYSTEM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+#if (APP_BASIC_FS_DYN_EN == DEF_ENABLED)
+    HTTPs_FS_TYPE_DYN,                                          /* .FS_Type : File System Type.                         */
+#else
+    HTTPs_FS_TYPE_STATIC,                                       /* .FS_Type : File System Type.                         */
+#endif
+
+   &HTTPs_CfgFS_AppBasic,                                       /* .FS_CfgPtr : File System Configuration pointer.      */
+
+    HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT,                        /* .DfltResourceNamePtr : Default page.                 */
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE PROXY CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    128,                                                        /* .HostNameLenMax : Maximum host name length.          */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                        HOOK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_Hooks_AppBasic,                                       /* .HooksPtr : Pointer to Hooks' Object.                */
+
+    DEF_NULL,                                                   /* .Hooks_CfgPtr : Pointer to Application Data Hook.    */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     HEADER FIELD CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_HdrRxCfg_AppBasic,                                    /* .HdrRxCfgPtr : Pointer to Request Hdr Cfg Object.    */
+
+   &HTTPs_HdrTxCfg_AppBasic,                                    /* .HdrTxCfgPtr : Pointer to Response Hdr Cfg Object.   */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE QUERY STRING CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_QueryStrCfg_AppBasic,                                 /* .QueryStrCfgPtr : Pointer to Query String Cfg Object.*/
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      INSTANCE FORM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_FormCfg_AppBasic,                                     /* .FormCfgPtr : Pointer to Form Cfg Object.            */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                DYNAMIC TOKEN REPLACEMENT CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_TokenCfg_AppBasic,                                    /* .TokenCfgPtr : Pointer to Token Cfg Ojbect.          */
+
+};                                                              /* End of configuration structure.                      */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic_http-s_instance_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic_http-s_instance_cfg.h
new file mode 100644
index 0000000..1753471
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Basic/app_basic_http-s_instance_cfg.h
@@ -0,0 +1,45 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+* Filename      : app_basic_http-s_instance_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   HTTP SERVER INSTANCE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_TASK_CFG  HTTPs_TaskCfgInstance_AppBasic;
+extern  const  HTTPs_CFG     HTTPs_CfgInstance_AppBasic;
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/404.html b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/404.html
new file mode 100644
index 0000000..e6179a9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/404.html
@@ -0,0 +1,33 @@
+
+
+
+    µC/HTTPs
+    
+    
+
+
+
+

+
+    

+        
+        
A Member of the µC/TCP-IP Product Family

+    

+
+    

+
+        

+            
ERROR 404: NOT FOUND

+        

+
+        
+
+    

+
+

+
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/form.html b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/form.html
new file mode 100644
index 0000000..e29a07f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/form.html
@@ -0,0 +1,77 @@
+
+
+
+	µC/HTTPs
+	
+                
+
+
+
+
+    

+        

+            
+            
A Member of the µC/TCP-IP Product Family

+        

+
+        

+        
+            

+            
 
+                


+                First name:
+                
+                

+                Last name: 
+                    
+                


+                
+            

+            

+
+            

+            

+            
+            
+        
+            
+        
   
+    

+
+        
+    
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/index.html b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/index.html
new file mode 100644
index 0000000..026243a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/index.html
@@ -0,0 +1,44 @@
+
+
+
+	µC/HTTPs
+	
+    
+
+
+
+

+
+	

+		
+		
A Member of the µC/TCP-IP Product Family

+	

+	
+	

+	
+		

+			
Your HTTP server is working properly.

+			
µC/TCP-IP Version: ${NET_VERSION}

+            
µC/HTTP-server Version: ${HTTPs_VERSION}
      
+		

+         
+        
+        
+		
+    
        
+

+
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/list.html b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/list.html
new file mode 100644
index 0000000..3da0bb6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/list.html
@@ -0,0 +1,328 @@
+
+
+
+	µC/HTTPs
+	
+    
+    
+    
+    
+      
+        
+        
+    
+
+
+
+

+
+	

+		
+		
A Member of the µC/TCP-IP Product Family

+	

+    
+    

+    
+        

+            
USER LIST

+        

+        
+        



    
+        
+        

+        

+            
 First Name:  Last name:   

+        
 
+        

+        
+        

+        

+        
+        
 
+            
  
+        

+        
+        

+        
+        

+        

+        
+        
+    
+        
+    
   
+
+

+
+ 
+    
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/login.html b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/login.html
new file mode 100644
index 0000000..3eb63a1
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/login.html
@@ -0,0 +1,38 @@
+
+
+
+
+	µC/HTTPs
+	
+    
+
+
+
+

+
+	

+		
+		
A Member of the µC/TCP-IP Product Family

+	

+    
+	

+        

+        
Welcome!
	
+        

+            

+                  Enter user ID and password: 
+                

+                 User ID 
+                 Password 
+                        
+            

+        

+        
+        
+    

+

+
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/logo.gif b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/logo.gif
new file mode 100644
index 0000000..da4dd62
Binary files /dev/null and b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/logo.gif differ
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/uc_style.css b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/uc_style.css
new file mode 100644
index 0000000..4bd0c0f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/HTML/uc_style.css
@@ -0,0 +1,61 @@
+		
+html { height:100%; }
+
+body { background:#666666; color:#0a0a0a; font-family:Arial, sans-serif; font-size:14px; line-height:21px; height:100%; }
+   * { font-size:1em; margin:0; padding:0; }
+   
+ul, ol { padding-left:1.6em; }
+
+option { min-width: 1.5em; }
+		
+input                       { font-size:12px; }
+input.bluebutton { background:#dde2e6; border:2px solid #000000; color:#223d50; font-weight:bold; padding:3px 5px 3px 5px;  /*margin:30px 20px 14px 20px;*/ }
+
+button                       { font-size:12px; }
+button.bluebutton { background:#dde2e6; border:2px solid #000000; color:#223d50; font-weight:bold; padding:3px 5px 3px 5px; }
+
+table, td { border:none; margin:0; padding:0; }
+
+p.user { color:#223d50 !important; }
+
+#controls          { float:right; margin:0 30px 0 0; width:370px; }
+#controls .img { float:left; }
+		
+#copyright { clear:both; font-size:10px; padding:30px 0 0 0; text-align:right; }
+
+#refresh { clear:both; text-align:left; margin: 0 0 0 0; }  
+
+#info_form form  { display: table; }
+#info_form p       { display: table-row; color: #223d50; }
+#info_form label  { display: table-cell; padding-top: 5px; padding-bottom: 5px;}
+#info_form input  { width: 90%; padding: 5px; display: table-cell; padding-top: 5px; padding-bottom: 5px;}
+        
+#list                    { float:left; margin:0 30px 0 0; width:500px; }
+#list a:link       { color:#cccccc; }
+#list a:visited { color:#cccccc; }
+#list a:hover     { color:#fa9500; }
+#list a:active   { color:#fa9500; }  
+
+#information                    { float:left; margin:0 30px 0 0; width:370px; }
+#information a:link       { color:#cccccc; }
+#information a:visited { color:#cccccc; }
+#information a:hover     { color:#fa9500; }
+#information a:active   { color:#fa9500; }
+
+#links                    { float:right; margin:0 0 0 0; width:370px; }
+#links a:link       { color:#cccccc; }
+#links a:visited { color:#cccccc; }
+#links a:hover     { color:#fa9500; }
+#links a:active   { color:#fa9500; } 
+
+#return { float:right; margin:0 0 0 0; }
+
+#pagebody                      { background:#223d50; padding:0 0 30px 0; }
+#pagebody h2                 { color:#ffffff; font-size:18px; font-weight:bold; margin:30px 0 14px 30px; }
+#pagebody p                   { color:#ffffff; margin:0 30px 20px 30px; }
+#pagebody p.alertbox { background:#fa9500; margin:30px 20px 20px 20px; padding:5px 10px 5px 10px; }
+
+#pagewrapper { background:#666666; margin:0 auto 0 auto; width:800px; }
+
+#topbanner    { background:#dde2e6; padding:20px; }
+#topbanner p { color:#223d50; }
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/_404_html.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/_404_html.h
new file mode 100644
index 0000000..2e860d9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/_404_html.h
@@ -0,0 +1,46 @@
+#ifndef _404_HTML_H
+#define _404_HTML_H
+
+#define _404_HTML_NAME "404.html"
+#define _404_HTML_CONTENT "\x3c\x21\x44\x4f\x43\x54\x59\x50\x45\x20\x48\x54\x4d\x4c\x20\x50\x55\x42\x4c\x49"\
+"\x43\x20\x22\x2d\x2f\x2f\x57\x33\x43\x2f\x2f\x44\x54\x44\x20\x48\x54\x4d\x4c\x20"\
+"\x34\x2e\x30\x31\x2f\x2f\x45\x4e\x22\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x22"\
+"\x68\x74\x74\x70\x3a\x2f\x2f\x77\x77\x77\x2e\x77\x33\x2e\x6f\x72\x67\x2f\x54\x52"\
+"\x2f\x68\x74\x6d\x6c\x34\x2f\x73\x74\x72\x69\x63\x74\x2e\x64\x74\x64\x22\x3e\x0d"\
+"\x0a\x3c\x68\x74\x6d\x6c\x3e\x0d\x0a\x3c\x68\x65\x61\x64\x3e\x0d\x0a\x20\x20\x20"\
+"\x20\x3c\x74\x69\x74\x6c\x65\x3e\x26\x6d\x69\x63\x72\x6f\x3b\x43\x2f\x48\x54\x54"\
+"\x50\x73\x3c\x2f\x74\x69\x74\x6c\x65\x3e\x0d\x0a\x20\x20\x20\x20\x3c\x6d\x65\x74"\
+"\x61\x20\x6e\x61\x6d\x65\x3d\x22\x67\x65\x6e\x65\x72\x61\x74\x6f\x72\x22\x20\x63"\
+"\x6f\x6e\x74\x65\x6e\x74\x3d\x22\x42\x42\x45\x64\x69\x74\x20\x39\x2e\x33\x22\x3e"\
+"\x0d\x0a\x20\x20\x20\x20\x3c\x6c\x69\x6e\x6b\x20\x72\x65\x6c\x3d\x22\x73\x74\x79"\
+"\x6c\x65\x73\x68\x65\x65\x74\x22\x20\x74\x79\x70\x65\x3d\x22\x74\x65\x78\x74\x2f"\
+"\x63\x73\x73\x22\x20\x68\x72\x65\x66\x3d\x22\x75\x63\x5f\x73\x74\x79\x6c\x65\x2e"\
+"\x63\x73\x73\x22\x3e\x0d\x0a\x3c\x2f\x68\x65\x61\x64\x3e\x0d\x0a\x3c\x62\x6f\x64"\
+"\x79\x3e\x0d\x0a\x0d\x0a\x3c\x64\x69\x76\x20\x69\x64\x3d\x22\x70\x61\x67\x65\x77"\
+"\x72\x61\x70\x70\x65\x72\x22\x3e\x0d\x0a\x0d\x0a\x20\x20\x20\x20\x3c\x64\x69\x76"\
+"\x20\x69\x64\x3d\x22\x74\x6f\x70\x62\x61\x6e\x6e\x65\x72\x22\x3e\x0d\x0a\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x3c\x69\x6d\x67\x20\x73\x72\x63\x3d\x22\x6c\x6f\x67\x6f"\
+"\x2e\x67\x69\x66\x22\x20\x61\x6c\x74\x3d\x22\x22\x20\x77\x69\x64\x74\x68\x3d\x22"\
+"\x32\x31\x32\x22\x20\x68\x65\x69\x67\x68\x74\x3d\x22\x34\x31\x22\x3e\x0d\x0a\x20"\
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+"\x6d\x69\x6c\x79\x3c\x2f\x73\x74\x72\x6f\x6e\x67\x3e\x3c\x2f\x70\x3e\x0d\x0a\x20"\
+"\x20\x20\x20\x3c\x2f\x64\x69\x76\x3e\x0d\x0a\x0d\x0a\x20\x20\x20\x20\x3c\x64\x69"\
+"\x76\x20\x69\x64\x3d\x22\x70\x61\x67\x65\x62\x6f\x64\x79\x22\x3e\x0d\x0a\x0d\x0a"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x64\x69\x76\x20\x69\x64\x3d\x22\x69\x6e\x66"\
+"\x6f\x72\x6d\x61\x74\x69\x6f\x6e\x22\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x3c\x70\x20\x63\x6c\x61\x73\x73\x3d\x22\x61\x6c\x65\x72\x74\x62"\
+"\x6f\x78\x22\x3e\x45\x52\x52\x4f\x52\x20\x34\x30\x34\x3a\x20\x4e\x4f\x54\x20\x46"\
+"\x4f\x55\x4e\x44\x3c\x2f\x70\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x2f"\
+"\x64\x69\x76\x3e\x0d\x0a\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x64\x69\x76"\
+"\x20\x69\x64\x3d\x22\x63\x6f\x70\x79\x72\x69\x67\x68\x74\x22\x3e\x0d\x0a\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x70\x3e\x43\x6f\x70\x79\x72\x69\x67"\
+"\x68\x74\x20\x32\x30\x31\x33\x20\x4d\x69\x63\x72\x69\x26\x6d\x69\x63\x72\x6f\x3b"\
+"\x6d\x20\x49\x6e\x63\x2e\x3c\x2f\x70\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x3c\x2f\x64\x69\x76\x3e\x0d\x0a\x0d\x0a\x20\x20\x20\x20\x3c\x2f\x64\x69\x76\x3e"\
+"\x0d\x0a\x0d\x0a\x3c\x2f\x64\x69\x76\x3e\x0d\x0a\x0d\x0a\x3c\x2f\x62\x6f\x64\x79"\
+"\x3e\x0d\x0a\x3c\x2f\x68\x74\x6d\x6c\x3e\x0d\x0a"
+#define _404_HTML_SIZE (sizeof(_404_HTML_CONTENT)-1)
+
+#endif /* _404_HTML_H */
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/form_html.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/form_html.h
new file mode 100644
index 0000000..766b795
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/form_html.h
@@ -0,0 +1,139 @@
+#ifndef FORM_HTML_H
+#define FORM_HTML_H
+
+#define FORM_HTML_NAME "form.html"
+#define FORM_HTML_CONTENT "\x3c\x21\x44\x4f\x43\x54\x59\x50\x45\x20\x48\x54\x4d\x4c\x20\x50\x55\x42\x4c\x49"\
+"\x43\x20\x22\x2d\x2f\x2f\x57\x33\x43\x2f\x2f\x44\x54\x44\x20\x48\x54\x4d\x4c\x20"\
+"\x34\x2e\x30\x31\x2f\x2f\x45\x4e\x22\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x22"\
+"\x68\x74\x74\x70\x3a\x2f\x2f\x77\x77\x77\x2e\x77\x33\x2e\x6f\x72\x67\x2f\x54\x52"\
+"\x2f\x68\x74\x6d\x6c\x34\x2f\x73\x74\x72\x69\x63\x74\x2e\x64\x74\x64\x22\x3e\x0d"\
+"\x0a\x3c\x68\x74\x6d\x6c\x3e\x0d\x0a\x3c\x68\x65\x61\x64\x3e\x0d\x0a\x09\x3c\x74"\
+"\x69\x74\x6c\x65\x3e\x26\x6d\x69\x63\x72\x6f\x3b\x43\x2f\x48\x54\x54\x50\x73\x3c"\
+"\x2f\x74\x69\x74\x6c\x65\x3e\x0d\x0a\x09\x3c\x6d\x65\x74\x61\x20\x6e\x61\x6d\x65"\
+"\x3d\x22\x67\x65\x6e\x65\x72\x61\x74\x6f\x72\x22\x20\x63\x6f\x6e\x74\x65\x6e\x74"\
+"\x3d\x22\x42\x42\x45\x64\x69\x74\x20\x39\x2e\x33\x22\x3e\x0d\x0a\x20\x20\x20\x20"\
+"\x3c\x6c\x69\x6e\x6b\x20\x72\x65\x6c\x3d\x22\x73\x74\x79\x6c\x65\x73\x68\x65\x65"\
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+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x0d\x0a\x3c\x2f\x68\x65\x61\x64\x3e"\
+"\x0d\x0a\x0d\x0a\x3c\x62\x6f\x64\x79\x3e\x0d\x0a\x0d\x0a\x20\x20\x20\x20\x3c\x64"\
+"\x69\x76\x20\x69\x64\x3d\x22\x70\x61\x67\x65\x77\x72\x61\x70\x70\x65\x72\x22\x3e"\
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+"\x32\x22\x20\x68\x65\x69\x67\x68\x74\x3d\x22\x34\x31\x22\x3e\x0d\x0a\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x70\x3e\x3c\x73\x74\x72\x6f\x6e\x67\x3e"\
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+"\x72\x6f\x3b\x43\x2f\x54\x43\x50\x2d\x49\x50\x20\x50\x72\x6f\x64\x75\x63\x74\x20"\
+"\x46\x61\x6d\x69\x6c\x79\x3c\x2f\x73\x74\x72\x6f\x6e\x67\x3e\x3c\x2f\x70\x3e\x0d"\
+"\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x2f\x64\x69\x76\x3e\x0d\x0a\x0d\x0a\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x3c\x64\x69\x76\x20\x69\x64\x3d\x22\x70\x61\x67\x65"\
+"\x62\x6f\x64\x79\x22\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x0d\x0a\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x66\x6f\x72\x6d\x20\x69\x64\x3d\x22"\
+"\x68\x74\x6d\x6c\x46\x6f\x72\x6d\x22\x20\x61\x63\x74\x69\x6f\x6e\x3d\x22\x66\x6f"\
+"\x72\x6d\x5f\x73\x75\x62\x6d\x69\x74\x22\x20\x6d\x65\x74\x68\x6f\x64\x3d\x22\x50"\
+"\x4f\x53\x54\x22\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x3c"\
+"\x70\x3e\x20\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x3c\x62\x72\x3e\x3c\x62\x72\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x46\x69\x72\x73\x74\x20\x6e\x61\x6d\x65\x3a\x0d\x0a"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x69\x6e\x70"\
+"\x75\x74\x20\x74\x79\x70\x65\x3d\x22\x74\x65\x78\x74\x22\x20\x6e\x61\x6d\x65\x3d"\
+"\x22\x66\x69\x72\x73\x74\x6e\x61\x6d\x65\x22\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x62\x72\x3e\x0d\x0a\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x4c\x61\x73\x74\x20\x6e\x61\x6d"\
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+"\x74\x28\x29\x3b\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x7d\x2c\x20\x66\x61\x6c"\
+"\x73\x65\x29\x3b\x0d\x0a\x20\x20\x20\x20\x7d\x2c\x20\x66\x61\x6c\x73\x65\x29\x3b"\
+"\x20\x20\x20\x20\x0d\x0a\x20\x20\x20\x20\x3c\x2f\x73\x63\x72\x69\x70\x74\x3e\x20"\
+"\x20\x20\x20\x0d\x0a\x20\x20\x20\x20\x0d\x0a\x3c\x2f\x62\x6f\x64\x79\x3e\x0d\x0a"\
+"\x3c\x2f\x68\x74\x6d\x6c\x3e\x0d\x0a"
+#define FORM_HTML_SIZE (sizeof(FORM_HTML_CONTENT)-1)
+
+#endif /* FORM_HTML_H */
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/generated_fs.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/generated_fs.c
new file mode 100644
index 0000000..ea4b7fc
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/generated_fs.c
@@ -0,0 +1,34 @@
+
+#include  
+#include  "generated_fs.h"
+#include  
+
+typedef  struct  gen_file_desc {
+    CPU_CHAR    *Name;
+    CPU_CHAR    *Content;
+    CPU_INT32U   Size;
+} GEN_FILE_DESC;
+
+static  const  GEN_FILE_DESC  FileTbl[] = {
+    {_404_HTML_NAME,    _404_HTML_CONTENT,    _404_HTML_SIZE},
+    {FORM_HTML_NAME,    FORM_HTML_CONTENT,    FORM_HTML_SIZE},
+    {INDEX_HTML_NAME,   INDEX_HTML_CONTENT,   INDEX_HTML_SIZE},
+    {LIST_HTML_NAME,    LIST_HTML_CONTENT,    LIST_HTML_SIZE},
+    {LOGIN_HTML_NAME,   LOGIN_HTML_CONTENT,   LOGIN_HTML_SIZE},
+    {LOGO_GIF_NAME,     LOGO_GIF_CONTENT,     LOGO_GIF_SIZE},
+    {UC_STYLE_CSS_NAME, UC_STYLE_CSS_CONTENT, UC_STYLE_CSS_SIZE},
+    {0, 0, 0}
+};
+
+CPU_BOOLEAN GeneratedFS_FileAdd() {
+    const  GEN_FILE_DESC  *p_file_desc = &FileTbl[0];
+           CPU_BOOLEAN     result      = DEF_OK;
+
+
+    while ((p_file_desc->Name != 0) && (result == DEF_OK)) {
+        result = HTTPs_FS_AddFile(p_file_desc->Name, p_file_desc->Content, p_file_desc->Size);
+        p_file_desc++;
+    }
+
+    return (result);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/generated_fs.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/generated_fs.h
new file mode 100644
index 0000000..c4ba1ea
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/generated_fs.h
@@ -0,0 +1,14 @@
+#ifndef GENERATED_FS_H
+#define GENERATED_FS_H
+
+#include "_404_html.h"
+#include "form_html.h"
+#include "index_html.h"
+#include "list_html.h"
+#include "login_html.h"
+#include "logo_gif.h"
+#include "uc_style_css.h"
+
+CPU_BOOLEAN GeneratedFS_FileAdd();
+
+#endif /* GENERATED_FS_H */
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/index_html.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/index_html.h
new file mode 100644
index 0000000..faa2eb8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/index_html.h
@@ -0,0 +1,83 @@
+#ifndef INDEX_HTML_H
+#define INDEX_HTML_H
+
+#define INDEX_HTML_NAME "index.html"
+#define INDEX_HTML_CONTENT "\x3c\x21\x44\x4f\x43\x54\x59\x50\x45\x20\x48\x54\x4d\x4c\x20\x50\x55\x42\x4c\x49"\
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+"\x34\x2e\x30\x31\x2f\x2f\x45\x4e\x22\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x22"\
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+"\x09\x09\x3c\x2f\x64\x69\x76\x3e\x0d\x0a\x20\x20\x20\x20\x3c\x2f\x64\x69\x76\x3e"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x0d\x0a\x3c\x2f\x64\x69\x76\x3e\x0d\x0a\x0d\x0a"\
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+#define INDEX_HTML_SIZE (sizeof(INDEX_HTML_CONTENT)-1)
+
+#endif /* INDEX_HTML_H */
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/list_html.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/list_html.h
new file mode 100644
index 0000000..55dd0af
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/list_html.h
@@ -0,0 +1,665 @@
+#ifndef LIST_HTML_H
+#define LIST_HTML_H
+
+#define LIST_HTML_NAME "list.html"
+#define LIST_HTML_CONTENT "\x3c\x21\x44\x4f\x43\x54\x59\x50\x45\x20\x48\x54\x4d\x4c\x20\x50\x55\x42\x4c\x49"\
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+"\x20\x28\x6b\x65\x79\x20\x3d\x3d\x20\x22\x4c\x69\x6e\x6b\x22\x29\x20\x7b\x0d\x0a"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x6c\x69\x6e\x6b\x20\x3d\x20\x76"\
+"\x61\x6c\x75\x65\x3b\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x7d\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x0d\x0a\x20\x20\x20\x20\x7d"\
+"\x29\x3b\x0d\x0a\x20\x20\x20\x20\x24\x28\x27\x23\x6c\x69\x73\x74\x3a\x6e\x6f\x74"\
+"\x28\x3a\x68\x61\x73\x28\x64\x69\x76\x29\x29\x27\x29\x2e\x65\x6d\x70\x74\x79\x28"\
+"\x29\x3b\x0d\x0a\x20\x20\x20\x20\x24\x28\x27\x23\x6c\x69\x73\x74\x27\x29\x2e\x61"\
+"\x70\x70\x65\x6e\x64\x28\x22\x3c\x64\x69\x76\x20\x63\x6c\x61\x73\x73\x3d\x5c\x22"\
+"\x75\x73\x65\x72\x5c\x22\x20\x69\x64\x3d\x5c\x22\x22\x20\x2b\x20\x75\x73\x65\x72"\
+"\x5f\x69\x64\x20\x2b\x22\x5c\x22\x3e\x22\x20\x2b\x0d\x0a\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x22\x3c\x70\x20\x63\x6c\x61\x73"\
+"\x73\x3d\x5c\x22\x75\x73\x65\x72\x5c\x22\x3e\x3c\x61\x20\x63\x6c\x61\x73\x73\x3d"\
+"\x5c\x22\x75\x73\x65\x72\x5c\x22\x20\x68\x72\x65\x66\x3d\x5c\x22\x22\x20\x2b\x20"\
+"\x6c\x69\x6e\x6b\x20\x2b\x20\x22\x5c\x22\x3e\x22\x20\x2b\x20\x6e\x61\x6d\x65\x20"\
+"\x2b\x20\x22\x20\x22\x20\x2b\x20\x6c\x61\x73\x74\x6e\x61\x6d\x65\x20\x2b\x20\x22"\
+"\x3c\x2f\x61\x3e\x20\x22\x20\x2b\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x22\x3c\x69\x6e\x70\x75\x74\x20\x74\x79\x70\x65"\
+"\x3d\x5c\x22\x73\x75\x62\x6d\x69\x74\x5c\x22\x20\x76\x61\x6c\x75\x65\x3d\x5c\x22"\
+"\x53\x65\x74\x20\x49\x6e\x66\x6f\x5c\x22\x20\x63\x6c\x61\x73\x73\x3d\x5c\x22\x62"\
+"\x6c\x75\x65\x62\x75\x74\x74\x6f\x6e\x5c\x22\x3e\x20\x22\x20\x2b\x0d\x0a\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x22\x3c\x69\x6e"\
+"\x70\x75\x74\x20\x74\x79\x70\x65\x3d\x5c\x22\x73\x75\x62\x6d\x69\x74\x5c\x22\x20"\
+"\x76\x61\x6c\x75\x65\x3d\x5c\x22\x44\x65\x6c\x65\x74\x65\x5c\x22\x20\x63\x6c\x61"\
+"\x73\x73\x3d\x5c\x22\x62\x6c\x75\x65\x62\x75\x74\x74\x6f\x6e\x5c\x22\x3e\x3c\x2f"\
+"\x70\x3e\x22\x20\x2b\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x22\x3c\x64\x69\x76\x20\x63\x6c\x61\x73\x73\x3d\x5c\x22\x64"\
+"\x69\x61\x6c\x6f\x67\x5c\x22\x20\x74\x69\x74\x6c\x65\x3d\x5c\x22\x55\x73\x65\x72"\
+"\x20\x49\x6e\x66\x6f\x5c\x22\x3e\x20\x3c\x2f\x64\x69\x76\x3e\x20\x3c\x2f\x64\x69"\
+"\x76\x3e\x22\x29\x3b\x0d\x0a\x7d\x0d\x0a\x0d\x0a\x3c\x2f\x73\x63\x72\x69\x70\x74"\
+"\x3e\x20\x0d\x0a\x20\x20\x20\x20\x0d\x0a\x3c\x2f\x62\x6f\x64\x79\x3e\x0d\x0a\x3c"\
+"\x2f\x68\x74\x6d\x6c\x3e\x0d\x0a"
+#define LIST_HTML_SIZE (sizeof(LIST_HTML_CONTENT)-1)
+
+#endif /* LIST_HTML_H */
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/login_html.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/login_html.h
new file mode 100644
index 0000000..bfa3cce
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/login_html.h
@@ -0,0 +1,65 @@
+#ifndef LOGIN_HTML_H
+#define LOGIN_HTML_H
+
+#define LOGIN_HTML_NAME "login.html"
+#define LOGIN_HTML_CONTENT "\x3c\x21\x44\x4f\x43\x54\x59\x50\x45\x20\x48\x54\x4d\x4c\x20\x50\x55\x42\x4c\x49"\
+"\x43\x20\x22\x2d\x2f\x2f\x57\x33\x43\x2f\x2f\x44\x54\x44\x20\x48\x54\x4d\x4c\x20"\
+"\x34\x2e\x30\x31\x2f\x2f\x45\x4e\x22\x20\x22\x68\x74\x74\x70\x3a\x2f\x2f\x77\x77"\
+"\x77\x2e\x77\x33\x2e\x6f\x72\x67\x2f\x54\x52\x2f\x68\x74\x6d\x6c\x34\x2f\x73\x74"\
+"\x72\x69\x63\x74\x2e\x64\x74\x64\x22\x3e\x0d\x0a\x3c\x68\x74\x6d\x6c\x3e\x0d\x0a"\
+"\x0d\x0a\x3c\x68\x65\x61\x64\x3e\x0d\x0a\x09\x3c\x74\x69\x74\x6c\x65\x3e\x26\x6d"\
+"\x69\x63\x72\x6f\x3b\x43\x2f\x48\x54\x54\x50\x73\x3c\x2f\x74\x69\x74\x6c\x65\x3e"\
+"\x0d\x0a\x09\x3c\x6d\x65\x74\x61\x20\x6e\x61\x6d\x65\x3d\x22\x67\x65\x6e\x65\x72"\
+"\x61\x74\x6f\x72\x22\x20\x63\x6f\x6e\x74\x65\x6e\x74\x3d\x22\x42\x42\x45\x64\x69"\
+"\x74\x20\x39\x2e\x33\x22\x3e\x0d\x0a\x20\x20\x20\x20\x3c\x6c\x69\x6e\x6b\x20\x72"\
+"\x65\x6c\x3d\x22\x73\x74\x79\x6c\x65\x73\x68\x65\x65\x74\x22\x20\x74\x79\x70\x65"\
+"\x3d\x22\x74\x65\x78\x74\x2f\x63\x73\x73\x22\x20\x68\x72\x65\x66\x3d\x22\x75\x63"\
+"\x5f\x73\x74\x79\x6c\x65\x2e\x63\x73\x73\x22\x3e\x0d\x0a\x3c\x2f\x68\x65\x61\x64"\
+"\x3e\x0d\x0a\x0d\x0a\x3c\x62\x6f\x64\x79\x3e\x0d\x0a\x3c\x64\x69\x76\x20\x69\x64"\
+"\x3d\x22\x70\x61\x67\x65\x77\x72\x61\x70\x70\x65\x72\x22\x3e\x0d\x0a\x0d\x0a\x09"\
+"\x3c\x64\x69\x76\x20\x69\x64\x3d\x22\x74\x6f\x70\x62\x61\x6e\x6e\x65\x72\x22\x3e"\
+"\x0d\x0a\x09\x09\x3c\x69\x6d\x67\x20\x73\x72\x63\x3d\x22\x6c\x6f\x67\x6f\x2e\x67"\
+"\x69\x66\x22\x20\x61\x6c\x74\x3d\x22\x22\x20\x77\x69\x64\x74\x68\x3d\x22\x32\x31"\
+"\x32\x22\x20\x68\x65\x69\x67\x68\x74\x3d\x22\x34\x31\x22\x3e\x0d\x0a\x09\x09\x3c"\
+"\x70\x3e\x3c\x73\x74\x72\x6f\x6e\x67\x3e\x41\x20\x4d\x65\x6d\x62\x65\x72\x20\x6f"\
+"\x66\x20\x74\x68\x65\x20\x26\x6d\x69\x63\x72\x6f\x3b\x43\x2f\x54\x43\x50\x2d\x49"\
+"\x50\x20\x50\x72\x6f\x64\x75\x63\x74\x20\x46\x61\x6d\x69\x6c\x79\x3c\x2f\x73\x74"\
+"\x72\x6f\x6e\x67\x3e\x3c\x2f\x70\x3e\x0d\x0a\x09\x3c\x2f\x64\x69\x76\x3e\x0d\x0a"\
+"\x20\x20\x20\x20\x0d\x0a\x09\x3c\x64\x69\x76\x20\x69\x64\x3d\x22\x70\x61\x67\x65"\
+"\x62\x6f\x64\x79\x22\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x62\x72\x3e"\
+"\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x70\x20\x63\x6c\x61\x73\x73\x3d\x22"\
+"\x61\x6c\x65\x72\x74\x62\x6f\x78\x22\x3e\x57\x65\x6c\x63\x6f\x6d\x65\x21\x3c\x2f"\
+"\x70\x3e\x09\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x66\x6f\x72\x6d\x20\x4d"\
+"\x45\x54\x48\x4f\x44\x3d\x50\x4f\x53\x54\x20\x41\x43\x54\x49\x4f\x4e\x3d\x22\x6c"\
+"\x6f\x67\x6d\x65\x22\x20\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x3c\x70\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x3c\x66\x6f\x6e\x74\x20\x73\x69\x7a\x65\x3d\x22\x32\x22\x3e\x20\x3c\x73"\
+"\x74\x72\x6f\x6e\x67\x3e\x20\x45\x6e\x74\x65\x72\x20\x75\x73\x65\x72\x20\x49\x44"\
+"\x20\x61\x6e\x64\x20\x70\x61\x73\x73\x77\x6f\x72\x64\x3a\x20\x3c\x2f\x73\x74\x72"\
+"\x6f\x6e\x67\x3e\x3c\x2f\x66\x6f\x6e\x74\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x62\x72\x3e\x0d\x0a\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x55\x73\x65\x72\x20\x49\x44\x20"\
+"\x3c\x69\x6e\x70\x75\x74\x20\x74\x79\x70\x65\x3d\x22\x74\x65\x78\x74\x22\x20\x73"\
+"\x69\x7a\x65\x3d\x22\x32\x30\x22\x20\x6e\x61\x6d\x65\x3d\x22\x75\x73\x65\x72\x6e"\
+"\x61\x6d\x65\x22\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x50\x61\x73\x73\x77\x6f\x72\x64\x20\x3c\x69\x6e\x70\x75\x74\x20"\
+"\x74\x79\x70\x65\x3d\x22\x70\x61\x73\x73\x77\x6f\x72\x64\x22\x20\x73\x69\x7a\x65"\
+"\x3d\x22\x32\x30\x22\x20\x6e\x61\x6d\x65\x3d\x22\x70\x61\x73\x73\x77\x6f\x72\x64"\
+"\x22\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x3c\x69\x6e\x70\x75\x74\x20\x74\x79\x70\x65\x3d\x22\x73\x75\x62\x6d\x69\x74\x22"\
+"\x20\x6e\x61\x6d\x65\x3d\x22\x6c\x6f\x67\x69\x6e\x22\x20\x76\x61\x6c\x75\x65\x3d"\
+"\x22\x4c\x6f\x67\x69\x6e\x22\x20\x63\x6c\x61\x73\x73\x3d\x22\x62\x6c\x75\x65\x62"\
+"\x75\x74\x74\x6f\x6e\x22\x3e\x20\x20\x20\x20\x20\x20\x20\x20\x0d\x0a\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x2f\x70\x3e\x0d\x0a\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x3c\x2f\x66\x6f\x72\x6d\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x64\x69\x76\x20\x69\x64\x3d\x22\x63"\
+"\x6f\x70\x79\x72\x69\x67\x68\x74\x22\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x3c\x70\x3e\x43\x6f\x70\x79\x72\x69\x67\x68\x74\x20\x32\x30\x31"\
+"\x34\x20\x4d\x69\x63\x72\x69\x26\x6d\x69\x63\x72\x6f\x3b\x6d\x20\x49\x6e\x63\x2e"\
+"\x3c\x2f\x70\x3e\x0d\x0a\x20\x20\x20\x20\x20\x20\x20\x20\x3c\x2f\x64\x69\x76\x3e"\
+"\x0d\x0a\x20\x20\x20\x20\x3c\x2f\x64\x69\x76\x3e\x0d\x0a\x3c\x2f\x64\x69\x76\x3e"\
+"\x0d\x0a\x3c\x2f\x62\x6f\x64\x79\x3e\x0d\x0a\x0d\x0a\x3c\x2f\x68\x74\x6d\x6c\x3e"\
+"\x0d\x0a"
+#define LOGIN_HTML_SIZE (sizeof(LOGIN_HTML_CONTENT)-1)
+
+#endif /* LOGIN_HTML_H */
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/logo_gif.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/logo_gif.h
new file mode 100644
index 0000000..9a303f2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/logo_gif.h
@@ -0,0 +1,111 @@
+#ifndef LOGO_GIF_H
+#define LOGO_GIF_H
+
+#define LOGO_GIF_NAME "logo.gif"
+#define LOGO_GIF_CONTENT "\x47\x49\x46\x38\x39\x61\xd4\x00\x29\x00\xc4\x00\x00\x29\x49\x5b\x77\x8b\x97\x35"\
+"\x53\x64\xcd\xd5\xd9\xa4\xb1\xb9\x63\x7a\x88\xae\xba\xc1\xc3\xcc\xd2\x9b\xaa\xb3"\
+"\xd0\xd7\xdc\xbb\xc5\xcb\x95\xa5\xae\x49\x64\x74\x8a\x9b\xa6\xd6\xdc\xe0\x84\x96"\
+"\xa1\x52\x6c\x7b\x1f\x40\x53\xc9\xd1\xd7\x40\x5c\x6c\x7b\x8e\x9a\xbe\xc8\xce\xb7"\
+"\xc2\xc8\x71\x86\x92\x8e\x9f\xa9\x87\x99\xa3\x69\x7f\x8c\x59\x71\x80\x7f\x92\x9e"\
+"\xb4\xbf\xc6\x18\x3a\x4e\xff\xff\xff\x21\xf9\x04\x01\x00\x00\x1f\x00\x2c\x00\x00"\
+"\x00\x00\xd4\x00\x29\x00\x00\x05\xff\xe0\x27\x8e\x64\x69\x9e\x68\x3a\x10\xc1\xc6"\
+"\x4c\x13\x54\x34\x4a\x3a\x62\xc2\xb4\x39\x63\x82\x65\x8d\x60\x23\x53\x31\x39\x16"\
+"\x40\xe1\xc3\x22\x32\x3c\x84\xd0\xa8\xb4\xf1\xe8\x7c\x7e\xd3\x2c\x14\x93\x10\x21"\
+"\x92\xda\x85\x41\x62\x2b\x1b\x1d\xe8\xb4\x1a\xfd\x51\x9b\xdf\x70\xd2\x20\x00\xf0"\
+"\xd8\xef\x78\x88\x35\x05\xb1\x6f\x48\x12\x75\x78\x1e\x08\x46\x02\x83\x1e\x0f\x22"\
+"\x17\x88\x8d\x8e\x14\x1f\x82\x8e\x93\x1e\x11\x07\x22\x0c\x94\x78\x00\x05\x45\x71"\
+"\x29\x08\x00\x02\xa3\xa3\x13\x07\x10\x02\x00\x0b\x1f\x04\xa5\x9f\xaf\x29\x06\x87"\
+"\x9a\x95\x0d\x28\x09\xb3\x19\x80\x92\x77\x85\x25\x0e\xb3\x78\x8a\x1f\x01\xb4\x93"\
+"\x90\xbc\xc6\x77\x96\x98\xca\x76\x00\x06\xb0\x26\x18\x88\x00\x15\xb3\x7f\x8c\x1e"\
+"\x00\xd2\xdd\x22\x04\x11\xce\x1e\x18\x27\x06\x77\xd1\x23\x81\x88\xbe\x24\xc0\x88"\
+"\xc3\xc5\xe2\x78\xc8\xf2\xcb\x97\x1f\x99\xe2\x00\xf7\xde\x03\x0a\x1d\x75\x0a\x1c"\
+"\xa8\x80\x6b\x9b\x80\x04\x13\x22\x28\xf4\x26\xad\x42\x32\x5a\x11\x98\x94\x78\x60"\
+"\xe7\xe0\xae\x75\x86\xde\x89\x88\x57\xcf\x03\xbd\x8e\xcc\xf0\xd5\x0b\xc0\xb0\xc7"\
+"\xa1\x0b\x22\x80\xff\x45\xd8\xe0\x61\x41\x04\x06\x02\x22\x94\x7c\xc5\xb2\xd1\x84"\
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+"\x48\xa0\x70\xdc\xc8\xc0\x09\xb9\x8a\x53\xe8\xa8\x07\xc6\x21\xab\xff\xae\x64\x3a"\
+"\xb3\xc1\x7d\x22\x35\xf2\xda\x04\x1a\x20\xc0\x2d\x9d\x07\x04\x33\x54\xb1\x24\x8a"\
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+"\xf9\xee\x27\x38\x6d\xe0\xb0\xc3\x6d\x72\x55\x29\xba\xd9\x29\x8b\xac\x03\x11\xdb"\
+"\x91\x21\x71\x00\x40\x40\x83\x59\x0a\xb4\x55\xe5\xbd\xbd\x64\x64\x54\xab\xa4\x0a"\
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+"\x01\x80\x90\xe8\xd6\xd0\x04\x22\x73\x5e\x3b\xc1\xaf\x22\x50\x34\x48\x86\xa7\x02"\
+"\x30\xb3\xaa\x42\x99\x2c\x0c\xca\xd5\x36\x3b\x70\x83\x83\x50\xf7\x46\x05\x01\x4c"\
+"\x90\xf3\xa4\xe3\xc6\x11\x81\x00\x0a\x28\x60\x81\x05\x07\x18\x3d\x2b\x09\xc5\xb6"\
+"\x04\x2f\xd0\x23\x20\xd0\x08\x96\x5d\x3e\x44\xce\x07\xce\xa2\xe0\xae\xd3\x77\xf8"\
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+"\x12\x01\x55\xed\x5c\x10\x0e\x03\xfc\x58\x8a\x88\x00\x04\xac\xf0\xd0\x9c\x18\x37"\
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+"\xaf\x4c\x35\x1e\x56\xa7\x90\xa4\x04\x9c\x23\x30\x94\x02\x7c\xad\x22\xcd\xe2\x27"\
+"\x0c\x44\x74\xda\x6e\x3e\x42\x82\xdb\xf5\xb8\x67\x71\xe2\x4c\xe3\xf1\x6e\x51\x4f"\
+"\x9f\x1e\x75\x82\x53\x3b\xea\x20\x1c\xfc\x72\x37\x72\xc6\xcc\x7a\xcd\xf8\x1b\xbc"\
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+"\xaa\x3c\x26\xcb\x55\xc3\x71\xea\x26\x14\x10\xb0\x80\x54\x77\x58\x74\xfb\xf5\x66"\
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+"\xeb\x5b\x1d\x61\xe0\xe0\x80\x82\x21\xc2\x76\xf7\x3b\x8f\x3c\xb6\xd7\x06\x0a\xd4"\
+"\x6c\x10\x90\x23\x81\x9a\x5a\x57\xbc\x92\x19\xa7\x80\x27\xd8\x9b\xfa\x18\x95\x2d"\
+"\xd6\xc5\x41\x02\x0e\x74\xd3\xdc\xba\x81\x3b\x38\x14\x0b\x00\x8e\xb3\x03\x4e\x6a"\
+"\x03\x80\x69\x55\x20\x4d\x7c\x02\x00\x03\x10\xf0\xab\x90\x95\x4f\x05\x5a\xa3\x21"\
+"\xf1\x1a\x48\x43\x00\xac\x50\x3e\x45\x04\x5b\x1c\xf8\x45\xc3\x02\xb0\xa8\x88\x70"\
+"\x83\x43\x02\x1a\x90\x90\x46\x08\x40\x03\x3e\xf3\x46\x0b\xb1\x97\x9e\x23\x89\x21"\
+"\x49\x03\x48\x80\x18\x07\x40\xb4\xff\x5f\x6c\x06\x01\x0b\x58\x00\x68\x96\xd6\xae"\
+"\x34\x2e\x20\x55\xbf\x10\xa3\x1c\xc5\x58\x46\xab\xcc\x31\x01\x64\x74\xdd\x1d\xe9"\
+"\x18\x07\x3c\xce\x31\x8c\x36\xf0\xa3\x1c\xf3\xf8\x0a\x07\x48\xa0\x03\xf2\x53\x23"\
+"\x01\x14\xd0\xb5\x08\xba\xf0\x49\xc0\x8a\xa4\x24\x27\x49\xc9\x4a\x92\x60\x8b\xf9"\
+"\x83\xa4\x25\x37\xc9\xc9\x4e\x7a\xd2\x04\x98\xac\x93\x26\x3f\x49\xca\x52\x9a\xb2"\
+"\x24\xa1\xb4\x01\xc5\x4e\xc9\xca\x56\xba\x32\x05\xa9\x4c\xc1\x2a\x5f\x49\xcb\x5a"\
+"\x9a\x32\x96\xc9\xc1\x80\x1b\xd3\xd8\xc8\x0f\x0c\x00\x8e\x28\x60\x43\x1b\xd6\x40"\
+"\xcc\x62\x96\xd1\x01\x80\xb4\xa5\x32\x23\x89\xcb\x92\xc8\x62\x01\x75\x1c\xc1\x35"\
+"\x7c\x01\x81\x0b\x00\x24\x07\xa9\x30\x9c\x28\x52\xc1\x00\x0b\x4c\x20\x15\x02\x80"\
+"\x60\xb2\x32\xa1\x8a\x65\x9a\xb3\x2a\xcd\x64\x88\x70\x3c\xc0\x80\xea\x8d\x20\x61"\
+"\xd1\x18\x40\x04\x02\xd0\x01\x08\x64\x22\x06\x19\x28\x00\x04\xbe\x06\x81\xf8\xb1"\
+"\x73\x03\xb0\x99\xd7\x3e\x35\xd0\x15\xbe\x9d\xf3\xa0\xb0\xc4\x5f\xa7\xd6\x29\xc3"\
+"\xf1\x89\x80\x03\x1e\x20\x83\x72\x6c\x17\x3e\xe6\x1c\xc0\x2b\x22\x40\x0f\x19\xc2"\
+"\xb7\x87\x04\x70\xff\x22\x59\xe1\xfc\x40\x07\x34\xc0\x81\x2e\x18\x60\x01\x2c\x20"\
+"\xc2\x07\x38\xa4\x00\x07\x14\x2e\x1a\x3e\xe8\x00\x05\x98\x83\x50\x56\x7e\x6d\x97"\
+"\x38\xcd\xa9\x4e\x77\x8a\x80\x17\x96\xb4\x6f\xb7\xc1\x40\x6f\xf6\xe0\x38\x21\x99"\
+"\x03\x38\x39\x11\x41\x01\x22\x30\xaf\xae\x34\xc0\x2c\x06\xf8\x5a\x04\x9c\xb8\xd4"\
+"\x97\x44\x00\x4b\x8c\x50\xc0\x06\xa4\x7a\x00\xe5\xac\x26\x8b\x35\x3d\xe5\xd6\x56"\
+"\x45\x09\x0b\x8d\x20\x62\xa0\xc3\x07\xfe\xb6\xe2\x89\xae\xa4\x62\x3a\x24\x38\x0d"\
+"\x57\x6a\x00\x93\x0f\x34\x20\x02\x08\xf1\x00\x01\x80\xa1\x81\x04\x44\xe0\x02\x47"\
+"\x8d\x44\x03\x12\x56\x80\x5e\x86\xd5\x93\x54\x78\x80\x62\x17\xcb\xd8\xc6\x3a\xf6"\
+"\xb1\x8a\xcd\x40\xf7\x22\xa0\x01\x7e\xc8\x53\x20\x07\xa8\x6b\x56\xa0\xf3\x01\x0d"\
+"\x00\xa0\x0b\x81\x10\x00\x03\x20\x90\x01\xa2\xcd\x81\x9d\x1e\xed\x98\xd6\x14\xf0"\
+"\x51\x7c\x40\x80\x22\x12\x40\xcf\x68\x13\x01\x51\x87\x1e\xf6\xb6\x6f\x60\xe8\xac"\
+"\xc0\xfa\x01\x05\x8c\x43\x04\x02\x88\xcf\x45\xa3\xa8\xd6\xb5\xa8\xcd\x04\x1b\xc0"\
+"\x4a\x01\xf6\xb1\x92\x05\x3c\x60\x53\xbf\xe5\x1e\x6c\x9c\xa8\x81\x08\x60\x80\x0a"\
+"\x8f\xa7\x10\x00\x6e\xb7\xfb\x09\x86\x4e\x80\x78\x1f\x70\x5b\x34\x24\x30\xcf\x9f"\
+"\x55\xc9\xa3\x4e\xfc\x00\x47\x4f\xb0\xcf\x06\x2c\xa0\x63\x1f\x08\xae\x04\x26\xf0"\
+"\x80\x84\xed\x21\x7c\x11\xb9\x42\x9f\xa8\x28\x01\x01\x70\x96\xbb\x00\x46\x81\x70"\
+"\x00\x50\x5a\x14\x58\x90\x0c\xc2\xf1\x05\x35\x2a\x16\x01\x5b\x10\x63\x67\x21\x9c"\
+"\x85\x00\x8a\x00\x8e\x49\x49\x80\x03\x4c\xfd\x59\x7a\x1d\x20\x95\x0c\xc8\x93\xb8"\
+"\x01\x0e\x31\x09\x46\xca\x46\x40\x20\xc9\x2a\x04\x69\x97\xaf\x7a\x90\xe2\x95\x9e"\
+"\xf8\x3b\x1d\xb0\x4f\x89\x42\xe3\x62\xb3\x38\x60\x49\x44\x31\x40\x0d\x6e\x6c\x58"\
+"\x11\x4b\x32\x04\x00\x3b"
+#define LOGO_GIF_SIZE (sizeof(LOGO_GIF_CONTENT)-1)
+
+#endif /* LOGO_GIF_H */
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/uc_style_css.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/uc_style_css.h
new file mode 100644
index 0000000..5eb6014
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/Common/StaticFiles/uc_style_css.h
@@ -0,0 +1,137 @@
+#ifndef UC_STYLE_CSS_H
+#define UC_STYLE_CSS_H
+
+#define UC_STYLE_CSS_NAME "uc_style.css"
+#define UC_STYLE_CSS_CONTENT "\x09\x09\x0d\x0a\x68\x74\x6d\x6c\x20\x7b\x20\x68\x65\x69\x67\x68\x74\x3a\x31\x30"\
+"\x30\x25\x3b\x20\x7d\x0d\x0a\x0d\x0a\x62\x6f\x64\x79\x20\x7b\x20\x62\x61\x63\x6b"\
+"\x67\x72\x6f\x75\x6e\x64\x3a\x23\x36\x36\x36\x36\x36\x36\x3b\x20\x63\x6f\x6c\x6f"\
+"\x72\x3a\x23\x30\x61\x30\x61\x30\x61\x3b\x20\x66\x6f\x6e\x74\x2d\x66\x61\x6d\x69"\
+"\x6c\x79\x3a\x41\x72\x69\x61\x6c\x2c\x20\x73\x61\x6e\x73\x2d\x73\x65\x72\x69\x66"\
+"\x3b\x20\x66\x6f\x6e\x74\x2d\x73\x69\x7a\x65\x3a\x31\x34\x70\x78\x3b\x20\x6c\x69"\
+"\x6e\x65\x2d\x68\x65\x69\x67\x68\x74\x3a\x32\x31\x70\x78\x3b\x20\x68\x65\x69\x67"\
+"\x68\x74\x3a\x31\x30\x30\x25\x3b\x20\x7d\x0d\x0a\x20\x20\x20\x2a\x20\x7b\x20\x66"\
+"\x6f\x6e\x74\x2d\x73\x69\x7a\x65\x3a\x31\x65\x6d\x3b\x20\x6d\x61\x72\x67\x69\x6e"\
+"\x3a\x30\x3b\x20\x70\x61\x64\x64\x69\x6e\x67\x3a\x30\x3b\x20\x7d\x0d\x0a\x20\x20"\
+"\x20\x0d\x0a\x75\x6c\x2c\x20\x6f\x6c\x20\x7b\x20\x70\x61\x64\x64\x69\x6e\x67\x2d"\
+"\x6c\x65\x66\x74\x3a\x31\x2e\x36\x65\x6d\x3b\x20\x7d\x0d\x0a\x0d\x0a\x6f\x70\x74"\
+"\x69\x6f\x6e\x20\x7b\x20\x6d\x69\x6e\x2d\x77\x69\x64\x74\x68\x3a\x20\x31\x2e\x35"\
+"\x65\x6d\x3b\x20\x7d\x0d\x0a\x09\x09\x0d\x0a\x69\x6e\x70\x75\x74\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x7b"\
+"\x20\x66\x6f\x6e\x74\x2d\x73\x69\x7a\x65\x3a\x31\x32\x70\x78\x3b\x20\x7d\x0d\x0a"\
+"\x69\x6e\x70\x75\x74\x2e\x62\x6c\x75\x65\x62\x75\x74\x74\x6f\x6e\x20\x7b\x20\x62"\
+"\x61\x63\x6b\x67\x72\x6f\x75\x6e\x64\x3a\x23\x64\x64\x65\x32\x65\x36\x3b\x20\x62"\
+"\x6f\x72\x64\x65\x72\x3a\x32\x70\x78\x20\x73\x6f\x6c\x69\x64\x20\x23\x30\x30\x30"\
+"\x30\x30\x30\x3b\x20\x63\x6f\x6c\x6f\x72\x3a\x23\x32\x32\x33\x64\x35\x30\x3b\x20"\
+"\x66\x6f\x6e\x74\x2d\x77\x65\x69\x67\x68\x74\x3a\x62\x6f\x6c\x64\x3b\x20\x70\x61"\
+"\x64\x64\x69\x6e\x67\x3a\x33\x70\x78\x20\x35\x70\x78\x20\x33\x70\x78\x20\x35\x70"\
+"\x78\x3b\x20\x20\x2f\x2a\x6d\x61\x72\x67\x69\x6e\x3a\x33\x30\x70\x78\x20\x32\x30"\
+"\x70\x78\x20\x31\x34\x70\x78\x20\x32\x30\x70\x78\x3b\x2a\x2f\x20\x7d\x0d\x0a\x0d"\
+"\x0a\x62\x75\x74\x74\x6f\x6e\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20"\
+"\x20\x20\x20\x20\x20\x20\x20\x20\x20\x20\x7b\x20\x66\x6f\x6e\x74\x2d\x73\x69\x7a"\
+"\x65\x3a\x31\x32\x70\x78\x3b\x20\x7d\x0d\x0a\x62\x75\x74\x74\x6f\x6e\x2e\x62\x6c"\
+"\x75\x65\x62\x75\x74\x74\x6f\x6e\x20\x7b\x20\x62\x61\x63\x6b\x67\x72\x6f\x75\x6e"\
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+"\x3b\x20\x6d\x61\x72\x67\x69\x6e\x3a\x30\x20\x61\x75\x74\x6f\x20\x30\x20\x61\x75"\
+"\x74\x6f\x3b\x20\x77\x69\x64\x74\x68\x3a\x38\x30\x30\x70\x78\x3b\x20\x7d\x0d\x0a"\
+"\x0d\x0a\x23\x74\x6f\x70\x62\x61\x6e\x6e\x65\x72\x20\x20\x20\x20\x7b\x20\x62\x61"\
+"\x63\x6b\x67\x72\x6f\x75\x6e\x64\x3a\x23\x64\x64\x65\x32\x65\x36\x3b\x20\x70\x61"\
+"\x64\x64\x69\x6e\x67\x3a\x32\x30\x70\x78\x3b\x20\x7d\x0d\x0a\x23\x74\x6f\x70\x62"\
+"\x61\x6e\x6e\x65\x72\x20\x70\x20\x7b\x20\x63\x6f\x6c\x6f\x72\x3a\x23\x32\x32\x33"\
+"\x64\x35\x30\x3b\x20\x7d"
+#define UC_STYLE_CSS_SIZE (sizeof(UC_STYLE_CSS_CONTENT)-1)
+
+#endif /* UC_STYLE_CSS_H */
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global.c
new file mode 100644
index 0000000..8b08038
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global.c
@@ -0,0 +1,827 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP APPLICATION WITH CONTROL LAYER
+*
+* Filename      : app_global.c
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : (1) This application regroup with the control layer a login layer, a default page app layer
+*                     and a REST app layer.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    APP_GLOBAL_MODULE
+
+#include "app_global_auth_rights_cfg.h"    /* This include defines new rights, it must be before the authentication includes. */
+
+#include  "app_global.h"
+#include  "../REST/app_rest.h"
+#include  "../Common/StaticFiles/generated_fs.h"
+
+#include  
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  LOGIN_PAGE_URL             "/login.html"
+#define  MICRIUM_LOGO_URL           "/logo.gif"
+#define  MICRIUM_CSS_URL            "/uc_style.css"
+#define  INDEX_PAGE_URL             "/index.html"
+
+#define  LOGIN_PAGE_CMD             "/logme"
+#define  LOGOUT_PAGE_CMD            "/logout"
+#define  FORM_PAGE_CMD              "/form_submit"
+
+#define  FORM_USERNAME_FIELD_NAME   "username"
+#define  FORM_PASSWORD_FIELD_NAME   "password"
+
+#define  FORM_LOGOUT_FIELD_NAME     "Log out"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      CONTROL LAYER VARIABLES
+*********************************************************************************************************
+*/
+
+                                                                /* ----------- AUTHENTICATION CONFIGURATION ----------- */
+                                                                /* Set Authorization Configuration (Access Right).      */
+HTTPs_AUTHORIZATION_CFG  AppGlobal_AuthInst_Cfg = {
+        AppGlobal_Auth_GetRequiredRightsHook                    /* .GetRequiredRights: Authorization check function.    */
+};
+
+                                                                /* Set the Authentication Configuration.                */
+HTTPs_AUTH_CFG  AppGlobal_AppInst_AuthCfg = {
+        AppGlobal_Auth_ParseLoginHook,                          /* .ParseLogin: Fnct to parse rx credentials in login.  */
+        AppGlobal_Auth_ParseLogoutHook                          /* .ParseLogout: Fnct to check for rx logout.           */
+};
+
+                                                                /* ------------- CTRL LAYER AUTH INSTANCE ------------- */
+                                                                /* Set Authentication Instance.                         */
+HTTPs_CTRL_LAYER_AUTH_INST  AppGlobal_AuthInst = {
+        &HTTPsAuth_CookieHooksCfg,                              /* .HooksPtr: Authentication with Cookie Hooks Cfg.     */
+        &AppGlobal_AuthInst_Cfg                                 /* .HooksCfgPtr: Pass the Authorization function.       */
+};
+
+                                                                /* --- CTRL LAYER APP INSTANCE FOR AUTH UNPROTECTED --- */
+                                                                /* Set the App Instance for the Login part (Unprotected).*/
+HTTPs_CTRL_LAYER_APP_INST  AppGlobal_AppInst_AuthUnprotected = {
+        &HTTPsAuth_AppUnprotectedCookieHooksCfg,                /* .HooksPtr: Login App with Cookie Hooks Cfg.          */
+        &AppGlobal_AppInst_AuthCfg                              /* .HooksCfgPtr: Pass the Application Authentication Cfg*/
+};
+
+                                                                /* ---- CTRL LAYER APP INSTANCE FOR AUTH PROTECTED ---- */
+                                                                /* Set the App Instance for the Login part (Protected). */
+HTTPs_CTRL_LAYER_APP_INST  AppGlobal_AppInst_AuthProtected = {
+       &HTTPsAuth_AppProtectedCookieHooksCfg,                   /* .HooksPtr: Login App with Cookie Hooks Cfg.          */
+       &AppGlobal_AppInst_AuthCfg                               /* .HooksCfgPtr: Pass the Application Authentication Cfg*/
+};
+
+                                                                /* --------- CTRL LAYER APP INSTANCE FOR REST --------- */
+HTTPs_REST_CFG  RestCfg = { 0 };                                /* Simply the list index REST is going to use.          */
+
+                                                                /* Set the Application Instance for the REST part.      */
+HTTPs_CTRL_LAYER_APP_INST  AppGlobal_AppInst_REST = {
+       (HTTPs_CTRL_LAYER_APP_HOOKS *)&HTTPsCtrlLayer_REST_App,  /* .HooksPtr: REST Application Hooks Cfg.               */
+        &RestCfg                                                /* .HooksCfgPtr: Pass the REST  Cfg.                    */
+};
+
+                                                                /* --------- CTRL LAYER APP INSTANCE FOR BASIC -------- */
+                                                                /* Set Hooks for Basic Application.                     */
+HTTPs_CTRL_LAYER_APP_HOOKS  AppGlobal_BasicHooks = {
+        DEF_NULL,
+        DEF_NULL,
+        AppGlobal_Basic_ReqHook,
+        DEF_NULL,
+        DEF_NULL,
+        DEF_NULL,
+        DEF_NULL,
+        AppGlobal_Basic_TokenValGetHook,
+        AppGlobal_Basic_RespChunkDataGetHook,
+        DEF_NULL,
+        DEF_NULL,
+        DEF_NULL
+};
+
+                                                                /* Set the Application Instance for the other features. */
+HTTPs_CTRL_LAYER_APP_INST  AppGlobal_AppInst_Basic = {
+       &AppGlobal_BasicHooks,
+        DEF_NULL
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  AppGlobal_UsersInit  (void);
+
+
+/*
+*********************************************************************************************************
+*                                           AppGlobal_Init()
+*
+* Description : Initialize HTTPs REST Example application.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if initialization was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppGlobal_Init (void)
+{
+    HTTPs_INSTANCE  *p_instance;
+    CPU_BOOLEAN      result;
+    HTTPs_ERR        err_https;
+
+
+                                                                /* Initialize HTTPs Static File System.                 */
+    HTTPs_FS_Init();
+
+                                                                /* Add required files to the Static FS.                 */
+    result = GeneratedFS_FileAdd();
+    if (result != DEF_YES) {
+        return (DEF_FAIL);
+    }
+
+    HTTPs_Init(DEF_NULL, &err_https);                           /* Initialize HTTPs suite.                              */
+    if (err_https != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* Initialize HTTP Server users.                        */
+    result = AppGlobal_UsersInit();
+    if (result != DEF_YES) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* Initialize HTTPs Instance.                           */
+    p_instance = HTTPs_InstanceInit(&HTTPs_CfgInstance_AppGlobal,
+                                    &HTTPs_TaskCfgInstance_AppGlobal,
+                                    &err_https);
+    if (err_https != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    result = AppREST_MemInit();
+    if (result != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    result = AppGlobal_REST_ResourcesInit();
+    if (result != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* Start HTTPs Instance.                                */
+    HTTPs_InstanceStart(p_instance, &err_https);
+    if (err_https != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           AppGlobal_REST_ResourcesInit()
+*
+* Description : Initialize HTTPs REST resources for the global application.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if initialization was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : AppGlobal_Init().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppGlobal_REST_ResourcesInit (void)
+{
+    HTTPs_REST_ERR  err;
+
+
+    HTTPsREST_Publish(&AppREST_List_Resource, 0, &err);
+    if (err != HTTPs_REST_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPsREST_Publish(&AppREST_User_Resource, 0, &err);
+    if (err != HTTPs_REST_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    AppGlobal_Auth_GetRequiredRightsHook()
+*
+* Description : Returns the rights required to fulfill the needs of a given request.
+*
+* Argument(s) : p_instance  Pointer to the HTTP server instance object.
+*
+*               p_conn      Pointer to the HTTP connection object.
+*
+* Return(s)   : returns the authorization right level for this example application.
+*
+* Caller(s)   : HTTPsAuth_OnAuth() via p_auth_cfg->GetRequiredRights()
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+AUTH_RIGHT  AppGlobal_Auth_GetRequiredRightsHook (const  HTTPs_INSTANCE  *p_instance,
+                                                  const  HTTPs_CONN      *p_conn)
+{
+    return (HTTP_USER_ACCESS);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppGlobal_Auth_ParseLoginHook()
+*
+* Description : (1) Check all the HTTP requests received to see if they are related to resources of the login page.
+*                   (a) Check if the POST login is received.
+*                   (b) For each request set the redirect paths on no, invalid & valid credentials.
+*                   (c) Parse the form fields received in the body for the user and password.
+*
+*
+* Argument(s) : p_instance  Pointer to the HTTP server instance object.
+*
+*               p_conn      Pointer to the HTTP connection object.
+*
+*               state       State of the Authentication module:
+*                               HTTPs_AUTH_STATE_REQ_URL:      The url and the headers were received and parse.
+*                               HTTPs_AUTH_STATE_REQ_COMPLETE: All the request (url + headers + body) was received and parse.
+*
+*               p_result    Pointer to the authentication result structure to fill.
+*
+* Return(s)   : DEF_YES, if the request is the POST login.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : AppGlobal_AppInst_AuthCfg.
+*
+* Note(s)     : (2) This hook will be called twice for a request processed by the Authentication module:
+*                   (a) When the Start line of the request (with the url) and the headers have been
+*                       received and parse -> HTTPs_AUTH_STATE_REQ_URL state.
+*                   (b) When all the request has been completely received and parse including the body
+*                       -> HTTPs_AUTH_STATE_REQ_COMPLETE state.
+*
+*               (3) for each request received the redirect paths is set as follow:
+*                   (a) RedirectPath_OnValidCred    INDEX_PAGE_URL
+*                   (b) RedirectPath_OnInvalidCred  LOGIN_PAGE_URL
+*                   (c) RedirectPath_OnNoCred
+*                       (1) if the path is an unprotected path, let it go. (DEF_NULL) (i.e. the logo)
+*                       (2) otherwise               LOGIN_PAGE_URL
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppGlobal_Auth_ParseLoginHook (const  HTTPs_INSTANCE     *p_instance,
+                                            const  HTTPs_CONN         *p_conn,
+                                                   HTTPs_AUTH_STATE    state,
+                                                   HTTPs_AUTH_RESULT  *p_result)
+{
+    CPU_INT16S      cmp_val;
+    CPU_BOOLEAN     is_login = DEF_NO;
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    HTTPs_KEY_VAL  *p_current;
+    CPU_INT16S      cmp_val_username;
+    CPU_INT16S      cmp_val_password;
+#endif
+
+
+    p_result->UsernamePtr = DEF_NULL;
+    p_result->PasswordPtr = DEF_NULL;
+                                                                /* Set redirect paths for each requests.                */
+    p_result->RedirectPathOnInvalidCredPtr = LOGIN_PAGE_URL;
+    p_result->RedirectPathOnValidCredPtr   = INDEX_PAGE_URL;
+
+    switch (state) {
+                                                                /* --------------- REQUEST URL RECEIVED --------------- */
+        case HTTPs_AUTH_STATE_REQ_URL:
+                                                                /* Set redirect paths for each requests.                */
+             cmp_val = Str_Cmp(p_conn->PathPtr, LOGIN_PAGE_URL);
+             if (cmp_val != 0) {
+                 cmp_val = Str_Cmp(p_conn->PathPtr, MICRIUM_LOGO_URL);
+                 if (cmp_val != 0) {
+                     cmp_val = Str_Cmp(p_conn->PathPtr, MICRIUM_CSS_URL);
+                 }
+             }
+             p_result->RedirectPathOnNoCredPtr = (cmp_val == 0) ? DEF_NULL : LOGIN_PAGE_URL;
+                                                                /* Check if POST login received.                        */
+             cmp_val = Str_Cmp(p_conn->PathPtr, LOGIN_PAGE_CMD);
+             if (cmp_val == 0) {
+                 is_login = DEF_YES;
+             }
+             break;
+
+                                                                /* -------------- REQUEST BODY RECEIVED --------------- */
+        case HTTPs_AUTH_STATE_REQ_COMPLETE:
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+                                                                /* Parse form fields received for user/password.        */
+             p_current = p_conn->FormDataListPtr;
+
+             while ((p_current              != DEF_NULL)  &&
+                    ((p_result->UsernamePtr == DEF_NULL)  ||
+                     (p_result->PasswordPtr == DEF_NULL))) {
+
+                 if (p_current->DataType == HTTPs_KEY_VAL_TYPE_PAIR) {
+                     cmp_val_username = Str_CmpIgnoreCase_N(p_current->KeyPtr,
+                                                            FORM_USERNAME_FIELD_NAME,
+                                                            p_current->KeyLen);
+
+                     cmp_val_password = Str_CmpIgnoreCase_N(p_current->KeyPtr,
+                                                            FORM_PASSWORD_FIELD_NAME,
+                                                            p_current->KeyLen);
+
+                     if (cmp_val_username == 0) {
+                         p_result->UsernamePtr = p_current->ValPtr;
+                         is_login = DEF_YES;
+                     } else if (cmp_val_password == 0) {
+                         p_result->PasswordPtr = p_current->ValPtr;
+                     }
+                 }
+
+                 p_current = p_current->NextPtr;
+             }
+#endif
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (is_login);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppGlobal_Auth_ParseLogoutHook()
+*
+* Description : Parse requests received for logout URL and form data logout info.
+*
+* Argument(s) : p_instance  Pointer to HTTPs instance object.
+*
+*               p_conn      Pointer to HTTPs connection object.
+*
+*               state       State of the Authentication module:
+*                               HTTPs_AUTH_STATE_REQ_URL:      The url and the headers were received and parse.
+*                               HTTPs_AUTH_STATE_REQ_COMPLETE: All the request (url + headers + body) was received and parse.
+*
+* Return(s)   : DEF_YES, if Logout received.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : AppGlobal_AppInst_AuthCfg.
+*
+* Note(s)     : (1) This hook will be called twice for a request processed by the Authentication module:
+*                   (a) When the Start line of the request (with the url) and the headers have been
+*                       received and parse -> HTTPs_AUTH_STATE_REQ_URL state.
+*                   (b) When all the request has been completely received and parse including the body
+*                       -> HTTPs_AUTH_STATE_REQ_COMPLETE state.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppGlobal_Auth_ParseLogoutHook (const  HTTPs_INSTANCE    *p_instance,
+                                             const  HTTPs_CONN        *p_conn,
+                                                    HTTPs_AUTH_STATE   state)
+{
+    CPU_BOOLEAN     is_logout = DEF_NO;
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    HTTPs_KEY_VAL  *p_current;
+    CPU_INT16S       cmp_val;
+#endif
+
+
+    switch (state) {
+                                                                /* --------------- REQUEST URL RECEIVED --------------- */
+        case HTTPs_AUTH_STATE_REQ_URL:
+                                                                /* Check if POST logout received.                       */
+             cmp_val = Str_Cmp(p_conn->PathPtr, LOGOUT_PAGE_CMD);
+             if (cmp_val == 0) {
+                 is_logout = DEF_YES;
+             }
+             break;
+
+                                                                /* -------------- REQUEST BODY RECEIVED --------------- */
+        case HTTPs_AUTH_STATE_REQ_COMPLETE:
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+                                                                /* Parse form fields received for logout.               */
+             p_current = p_conn->FormDataListPtr;
+
+             while (p_current != DEF_NULL) {
+                 if (p_current->DataType == HTTPs_KEY_VAL_TYPE_PAIR) {
+                     cmp_val = Str_CmpIgnoreCase_N(p_current->KeyPtr,
+                                                   FORM_LOGOUT_FIELD_NAME,
+                                                   p_current->KeyLen);
+                     if (cmp_val == 0) {
+                         is_logout = DEF_YES;
+                         break;
+                     }
+                 }
+
+                 p_current = p_current->NextPtr;
+             }
+#endif
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (is_logout);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppGlobal_Basic_ReqHook()
+*
+* Description : Called when a HTTP request is received.
+*               Allows to authorized/denied the request based on the URL.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : DEF_OK,   if the request is allowed.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : AppGlobal_BasicHooks.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppGlobal_Basic_ReqHook (const  HTTPs_INSTANCE  *p_instance,
+                                             HTTPs_CONN      *p_conn,
+                                      const  void            *p_hook_cfg)
+{
+    CPU_INT16S  str_cmp;
+    HTTPs_ERR   err;
+
+
+    str_cmp = Str_Cmp_N(p_conn->PathPtr, FORM_PAGE_CMD, p_conn->PathLenMax);
+    if (str_cmp == 0) {
+                                                                /* Set Parameters to tx response body in chunk.         */
+        HTTPs_RespBodySetParamStaticData(p_instance,
+                                         p_conn,
+                                         HTTP_CONTENT_TYPE_JSON,
+                                         DEF_NULL,
+                                         0,
+                                         DEF_NO,
+                                        &err);
+        if (err != HTTPs_ERR_NONE) {
+            return (DEF_FAIL);
+        }
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   AppGlobal_Basic_TokenValGetHook()
+*
+* Description : Called for each ${TEXT_STRING} embedded variable found in a HTML document.
+*
+* Argument(s) : p_instance      Pointer to the HTTPs instance object.
+*
+*               p_conn          Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg      Pointer to hook configuration object.
+*
+*               p_token         Pointer to the string that contains the value of the HTML embedded token.
+*
+*               token_len       Length of the embedded token.
+*
+*               p_val           Pointer to which buffer token value is copied to.
+*
+*               val_len_max     Maximum buffer length.
+*
+* Return(s)   : DEF_OK,   if token value copied successfully.
+*               DEF_FAIL, otherwise (see Note #3).
+*
+* Caller(s)   : AppGlobal_BasicHooks.
+*
+* Note(s)     : (1) The instance structure MUST NOT be modified.
+*
+*               (2) The connection structure MUST NOT be modified manually since the response is about to be
+*                   transmitted at this point. The only change to the connection structure should be the
+*                   addition of header fields for the response message through the function HTTPs_RespHdrGet().
+*
+*               (3) If the token replacement failed, the token will be replaced by a line of tilde (~) of
+*                   length equal to val_len_max.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppGlobal_Basic_TokenValGetHook (const  HTTPs_INSTANCE  *p_instance,
+                                                     HTTPs_CONN      *p_conn,
+                                              const  void            *p_hook_cfg,
+                                              const  CPU_CHAR        *p_token,
+                                                     CPU_INT16U       token_len,
+                                                     CPU_CHAR        *p_val,
+                                                     CPU_INT16U       val_len_max)
+{
+    static  CPU_CHAR    buf[20];
+            CPU_INT32U  ver;
+
+
+    if (Str_Cmp_N(p_token, "NET_VERSION", 11) == 0) {
+#if (NET_VERSION >  205u)
+        ver =  NET_VERSION / 10000;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, ' ', DEF_NO, DEF_NO,  &buf[0]);
+        buf[2] = '.';
+
+        ver = (NET_VERSION /   100) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_NO,  &buf[3]);
+        buf[5] = '.';
+
+        ver = (NET_VERSION /     1) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_YES, &buf[6]);
+        buf[8] = '\0';
+
+#else
+        ver =  NET_VERSION /   100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, ' ', DEF_NO, DEF_NO,  &buf[0]);
+        buf[2] = '.';
+
+        ver = (NET_VERSION /     1) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_YES, &buf[3]);
+        buf[5] = '\0';
+#endif
+
+    } else if (Str_Cmp_N(p_token, "HTTPs_VERSION", 13) == 0) {
+        ver =  HTTPs_VERSION / 10000;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, ' ', DEF_NO, DEF_NO,  &buf[0]);
+        buf[2] = '.';
+
+        ver = (HTTPs_VERSION /   100) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_NO,  &buf[3]);
+        buf[5] = '.';
+
+        ver = (HTTPs_VERSION /     1) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_YES, &buf[6]);
+        buf[8] = '\0';
+    }
+
+    Str_Copy_N(p_val, &buf[0], val_len_max);
+
+
+    (void)&p_instance;                                          /* Prevent 'variable unused' compiler warning.          */
+    (void)&p_conn;
+    (void)&token_len;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  AppGlobal_Basic_RespChunkDataGetHook()
+*
+* Description : Called to get the application data to put in the body when transferring in chunk.
+*
+* Argument(s) : p_instance      Pointer to the HTTPs instance object.
+*
+*               p_conn          Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg      Pointer to hook configuration object.
+*
+*               p_buf           Pointer to the buffer to fill.
+*
+*               buf_len_max     Maximum length the buffer can contain.
+*
+*               p_tx_len        Variable that will received the length written in the buffer.
+*
+* Return(s)   : DEF_YES      if there is no more data to send.
+*               DEF_NO       otherwise.
+*
+* Caller(s)   : AppGlobal_BasicHooks.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppGlobal_Basic_RespChunkDataGetHook (const  HTTPs_INSTANCE  *p_instance,
+                                                          HTTPs_CONN      *p_conn,
+                                                   const  void            *p_hook_cfg,
+                                                          void            *p_buf,
+                                                          CPU_SIZE_T       buf_len_max,
+                                                          CPU_SIZE_T      *p_tx_len)
+{
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    const  HTTPs_CFG      *p_cfg = p_instance->CfgPtr;
+           HTTPs_KEY_VAL  *p_key_val;
+           CPU_INT16S      str_cmp;
+
+
+    str_cmp = Str_Cmp_N(p_conn->PathPtr, FORM_PAGE_CMD, p_conn->PathLenMax);
+    if (str_cmp == 0) {
+                                                                /* Construct JSON for user                              */
+        Str_Copy(p_buf, "{\"user\":{\"first name\":\"");        /* Add First Name field.                                */
+        p_key_val = p_conn->FormDataListPtr;
+        while (p_key_val != DEF_NULL) {
+            str_cmp = Str_Cmp_N(p_key_val->KeyPtr, "firstname", p_cfg->FormCfgPtr->KeyLenMax);
+            if(str_cmp == 0) {
+                Str_Cat_N(p_buf, p_key_val->ValPtr, p_key_val->ValLen);
+                break;
+            }
+            p_key_val = p_key_val->NextPtr;
+        }
+
+        Str_Cat(p_buf, "\", \"last name\":\"");                 /* Add Last Name field.                                 */
+        p_key_val = p_conn->FormDataListPtr;
+        while (p_key_val != DEF_NULL) {
+            str_cmp = Str_Cmp_N(p_key_val->KeyPtr, "lastname", p_cfg->FormCfgPtr->KeyLenMax);
+            if(str_cmp == 0) {
+                Str_Cat_N(p_buf, p_key_val->ValPtr, p_key_val->ValLen);
+                break;
+            }
+            p_key_val = p_key_val->NextPtr;
+        }
+        Str_Cat(p_buf, "\"}}");
+    }
+
+   *p_tx_len = Str_Len_N(p_buf, p_cfg->BufLen);
+
+#else
+    CPU_SW_EXCEPTION(;);
+#endif
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         AppGlobal_UsersInit()
+*
+* Description : Adds three users to the authentication system.
+*               (1) Username:   admin
+*                   Password:   password
+*                   Rights:     Manager of HTTP user access right
+*
+*               (2) Username:   user0
+*                   Password:
+*                   Rights:     HTTP user
+*
+*               (3) Username:   user1
+*                   Password:   user1
+*                   Rights:     HTTP user
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK,   if users initialization was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  AppGlobal_UsersInit (void)
+{
+    AUTH_USER    admin;
+    AUTH_USER    user;
+    AUTH_RIGHT   right;
+    RTOS_ERR     err_auth;
+    CPU_BOOLEAN  result;
+
+
+    result = Auth_Init(&err_auth);
+    if (result != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    result = Auth_CreateUser("admin",
+                             "password",
+                             &admin,
+                             &err_auth);
+    if (result != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    right = (HTTP_USER_ACCESS | AUTH_RIGHT_MNG);
+    result = Auth_GrantRight(right,
+                            &admin,
+                            &Auth_RootUser,
+                            &err_auth);
+    if (result != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    result = Auth_CreateUser("user0",
+                             "",
+                             &user,
+                             &err_auth);
+    if (result != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    result = Auth_GrantRight(HTTP_USER_ACCESS,
+                            &user,
+                            &admin,
+                            &err_auth);
+    if (result != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    result = Auth_CreateUser("user1",
+                             "user1",
+                             &user,
+                             &err_auth);
+    if (result != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    result = Auth_GrantRight(HTTP_USER_ACCESS,
+                            &user,
+                            &admin,
+                            &err_auth);
+    if (result != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global.h
new file mode 100644
index 0000000..9894d8f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global.h
@@ -0,0 +1,135 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*
+*                                     HTTP APPLICATION WITH CONTROL LAYER
+*
+* Filename      : app_global.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : (1) This application regroup with the control layer a login layer, a default page app layer
+*                     and a REST app layer.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef APP_GLOBAL_MODULE_PRESENT
+#define APP_GLOBAL_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+#include "app_global_ctrl_layer_cfg.h"
+#include "app_global_http-s_instance_cfg.h"
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  HTTPs_CTRL_LAYER_AUTH_INST  AppGlobal_AuthInst;
+
+extern  HTTPs_CTRL_LAYER_APP_INST   AppGlobal_AppInst_AuthUnprotected;
+extern  HTTPs_CTRL_LAYER_APP_INST   AppGlobal_AppInst_AuthProtected;
+
+extern  HTTPs_CTRL_LAYER_APP_INST   AppGlobal_AppInst_REST;
+
+extern  HTTPs_CTRL_LAYER_APP_INST   AppGlobal_AppInst_Basic;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN            AppGlobal_Init                       (void);
+
+CPU_BOOLEAN            AppGlobal_REST_ResourcesInit         (void);
+
+AUTH_RIGHT             AppGlobal_Auth_GetRequiredRightsHook (const  HTTPs_INSTANCE     *p_instance,
+                                                             const  HTTPs_CONN         *p_conn);
+
+CPU_BOOLEAN            AppGlobal_Auth_ParseLoginHook        (const  HTTPs_INSTANCE     *p_instance,
+                                                             const  HTTPs_CONN         *p_conn,
+                                                                    HTTPs_AUTH_STATE    state,
+                                                                    HTTPs_AUTH_RESULT  *p_result);
+
+CPU_BOOLEAN            AppGlobal_Auth_ParseLogoutHook       (const  HTTPs_INSTANCE     *p_instance,
+                                                             const  HTTPs_CONN         *p_conn,
+                                                                    HTTPs_AUTH_STATE    state);
+
+CPU_BOOLEAN            AppGlobal_Basic_ReqHook              (const  HTTPs_INSTANCE     *p_instance,
+                                                                    HTTPs_CONN         *p_conn,
+                                                             const  void               *p_hook_cfg);
+
+CPU_BOOLEAN            AppGlobal_Basic_TokenValGetHook      (const  HTTPs_INSTANCE     *p_instance,
+                                                                    HTTPs_CONN         *p_conn,
+                                                             const  void               *p_hook_cfg,
+                                                             const  CPU_CHAR           *p_token,
+                                                                    CPU_INT16U          token_len,
+                                                                    CPU_CHAR           *p_val,
+                                                                    CPU_INT16U          val_len_max);
+
+CPU_BOOLEAN            AppGlobal_Basic_RespChunkDataGetHook (const  HTTPs_INSTANCE     *p_instance,
+                                                                    HTTPs_CONN         *p_conn,
+                                                             const  void               *p_hook_cfg,
+                                                                    void               *p_buf,
+                                                                    CPU_SIZE_T          buf_len_max,
+                                                                    CPU_SIZE_T         *p_tx_len);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* APP_GLOBAL_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_auth_rights_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_auth_rights_cfg.h
new file mode 100644
index 0000000..b73c84a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_auth_rights_cfg.h
@@ -0,0 +1,78 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 HTTP APPLICATION AUTHORIZATION RIGHTS
+*
+* Filename      : app_global_auth_rights_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef APP_GLOBAL_AUTH_RIGHTS_CFG_MODULE_PRESENT
+#define APP_GLOBAL_AUTH_RIGHTS_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               INCLUDES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*
+* Notes: (1) This is the definition of different authentication rights.
+*            The are 28 AUTH_RIGHTs available to be mapped.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTP_USER_ACCESS  AUTH_RIGHT_2
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#endif /* APP_GLOBAL_AUTH_RIGHTS_CFG_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_ctrl_layer_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_ctrl_layer_cfg.c
new file mode 100644
index 0000000..c814b75
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_ctrl_layer_cfg.c
@@ -0,0 +1,138 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                              HTTP APPLICATION CONTROL LAYER CONFIGURATION
+*
+* Filename      : app_global_ctrl_layer_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include "app_global.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                 Create a list of all authentications a user has to go through
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_AUTH_INST  *AppGlobal_AuthFilters[] = {
+        &AppGlobal_AuthInst
+};
+
+
+/*
+*********************************************************************************************************
+*              Create a list of all the application an logged user can use.
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_APP_INST  *AppGlobal_AuthentifiedServices[] = {
+        &AppGlobal_AppInst_AuthProtected,
+        &AppGlobal_AppInst_REST,
+        &AppGlobal_AppInst_Basic
+};
+
+
+/*
+*********************************************************************************************************
+*              Create a list of all the application an unlogged user can use.
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_APP_INST *AppGlobal_AuthApps[] = {
+        &AppGlobal_AppInst_AuthUnprotected
+};
+
+
+/*
+*********************************************************************************************************
+*                    Create the configuration for the control layer.
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_CFG AppGlobal_ProtectedServices = {
+        AppGlobal_AuthFilters,
+        sizeof(AppGlobal_AuthFilters) / sizeof(HTTPs_CTRL_LAYER_AUTH_INST *),
+        AppGlobal_AuthentifiedServices,
+        sizeof(AppGlobal_AuthentifiedServices) / sizeof(HTTPs_CTRL_LAYER_AUTH_INST *),
+};
+
+
+/*
+*********************************************************************************************************
+*                    Create the configuration for the control layer
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_CFG AppGlobal_UnprotectedServices = {
+        DEF_NULL,
+        0,
+        AppGlobal_AuthApps,
+        sizeof(AppGlobal_AuthApps) / sizeof(HTTPs_CTRL_LAYER_APP_INST *),
+};
+
+
+/*
+*********************************************************************************************************
+*                    List the configurations in a priority order.
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_CFG  *AppGlobal_CtrlLayerCfgs[] = {
+        &AppGlobal_ProtectedServices,
+        &AppGlobal_UnprotectedServices
+};
+
+
+/*
+*********************************************************************************************************
+*                      Create the control layer configuration list.
+*********************************************************************************************************
+*/
+
+HTTPs_CTRL_LAYER_CFG_LIST AppGlobal_CtrlLayerCfgList = {
+        AppGlobal_CtrlLayerCfgs,
+        sizeof(AppGlobal_CtrlLayerCfgs) / sizeof(HTTPs_CTRL_LAYER_CFG *)
+};
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_ctrl_layer_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_ctrl_layer_cfg.h
new file mode 100644
index 0000000..c752dcb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_ctrl_layer_cfg.h
@@ -0,0 +1,76 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                             HTTP APPLICATION CONTROL LAYER CONFIGURATION
+*
+* Filename      : app_global_ctrl_layer_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef APP_GLOBAL_CTRL_LAYER_CFG_MODULE_PRESENT
+#define APP_GLOBAL_CTRL_LAYER_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  HTTPs_CTRL_LAYER_CFG_LIST  AppGlobal_CtrlLayerCfgList;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* APP_GLOBAL_CTRL_LAYER_CFG_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_http-s_instance_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_http-s_instance_cfg.c
new file mode 100644
index 0000000..13e10bf
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_http-s_instance_cfg.c
@@ -0,0 +1,350 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+* Filename      : app_global_http-s_instance_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 AL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) All values that are used in this file and that are defined in other header files should
+*               be included by this file. Some values could be located in the same file such as task priority
+*               and
+size. This template file assume that the following values are defined in app_cfg.h:
+*
+*                   HTTPs_OS_CFG_INSTANCE_TASK_PRIO
+*                   HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE
+*
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include "app_global_ctrl_layer_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   FILES & FOLDERS STRING DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_OS_CFG_INSTANCE_TASK_PRIO                  17
+#define  HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE             (4*1024u)
+
+#define  HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT               "\\"
+#define  HTTPs_CFG_INSTANCE_STR_FOLDER_UPLOAD             HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT
+
+#define  HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT              "index.html"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TASK CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  NET_TASK_CFG  HTTPs_TaskCfgInstance_AppGlobal = {
+
+        HTTPs_OS_CFG_INSTANCE_TASK_PRIO,                        /* .Prio : Configure Instance Task priority.            */
+
+        HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE,                    /* .StkSizeBytes : Configure instance task size.        */
+
+        DEF_NULL                                                /* .StkPtr : Configure pointer to base of the stack.    */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if 0
+const  HTTPs_CFG_FS_NONE  HTTPs_CfgFS_None_AppGlobal = {
+
+    256,                                                        /* .PathLenMax : Maximum path length.                   */
+};
+#endif
+
+#if 1
+const  HTTPs_CFG_FS_STATIC  HTTPs_CfgFS_Static_AppGlobal = {
+
+   &HTTPs_FS_API_Static,                                        /* .FS_API_Ptr : Pointer to FS API.                     */
+};
+#endif
+
+#if 0
+const  HTTPs_CFG_FS_DYN  HTTPs_CfgFS_Dyn_AppGlobal = {
+
+   &NetFS_API_FS_V4,                                            /* .FS_API_Ptr : Pointer to FS API.                     */
+
+    HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT                          /* .WorkingFolderPtr : FS working folder.               */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER RX CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_RX_CFG  HTTPs_HdrRxCfg_AppGlobal = {
+
+    15,                                                         /* .NbrPerConnMax                                       */
+
+    128,                                                        /* .DataLenMax                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER TX CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_TX_CFG  HTTPs_HdrTxCfg_AppGlobal = {
+
+    15,                                                         /* .NbrPerConnMax                                       */
+
+    128,                                                        /* .DataLenMax                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                           HTTP SERVER INSTANCE QUERY STRING CONFIGURATION
+*
+* Note(s) : See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_QUERY_STR_CFG    HTTPs_QueryStrCfg_AppGlobal = {
+
+    5,                                                          /* .NbrPerConnMax                                       */
+
+    15,                                                         /* .KeyLenMax                                           */
+
+    20,                                                         /* .ValLenMax                                           */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE FORM CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_FORM_CFG     HTTPs_FormCfg_AppGlobal = {
+
+
+    15,                                                         /* .NbrPerConnMax                                       */
+
+    10,                                                         /* .KeyLenMax                                           */
+
+    48,                                                         /* .ValLenMax                                           */
+
+    DEF_ENABLED,                                                /* .MultipartEn                                         */
+
+    DEF_DISABLED,                                               /* .MultipartFileUploadEn                               */
+
+    DEF_DISABLED,                                               /* .MultipartFileUploadOverWrEn                         */
+
+    HTTPs_CFG_INSTANCE_STR_FOLDER_UPLOAD,                       /* .MultipartFileUploadFolderPtr                        */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TOKEN CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_TOKEN_CFG   HTTPs_TokenCfg_AppGlobal = {
+
+    5,                                                          /* .NbrPerConnMax                                       */
+
+    12,                                                         /* .ValLenMax                                           */
+
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                            HTTP INSTANCE SERVER CONFIGURATION STRUCTURE
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_CFG  HTTPs_CfgInstance_AppGlobal = {
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      INSTANCE TASK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    0u,                                                         /* .OS_TaskDly_ms : Configure instance task delay.      */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                INSTANCE LISTEN SOCKET CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    HTTPs_SOCK_SEL_IPv4_IPv6,                                   /* .SockSel : Socket type.                              */
+
+    DEF_NULL,                                                   /* .SecurePtr : Secure configuration (SSL) Pointer.     */
+
+    HTTPs_CFG_DFLT_PORT,                                        /* .Port : Server port number.                          */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE CONNECTION CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    6,                                                          /* .ConnNbrMax : Maximum number of simultaneous.        */
+
+    10,                                                         /* .ConnInactivityTimeout_s : Conn inactivity timeout.  */
+
+    1460,                                                       /* .BufLen : Connection buffer length.                  */
+
+    DEF_ENABLED,                                                /* .ConnPersistentEn : Persistent conn feature.         */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE FILE SYSTEM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    HTTPs_FS_TYPE_STATIC,                                       /* .FS_Type : File System Type.                         */
+
+   &HTTPs_CfgFS_Static_AppGlobal,                               /* .FS_CfgPtr : File System Configuration pointer.      */
+
+    HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT,                        /* .DfltResourceNamePtr : default web page.             */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE PROXY CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    128,                                                        /* .HostNameLenMax : Maximum host name length.          */
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                        HOOK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    &HTTPsCtrlLayer_HookCfg,                                    /* .HooksPtr : Pointer to Hooks' Object.                */
+
+    &AppGlobal_CtrlLayerCfgList,                                /* .Hooks_CfgPtr : Pointer to Application Data Hook.    */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     HEADER FIELD CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_HdrRxCfg_AppGlobal,                                   /* .HdrRxCfgPtr : Pointer to Request Hdr Cfg Object.    */
+
+   &HTTPs_HdrTxCfg_AppGlobal,                                   /* .HdrTxCfgPtr : Pointer to Response Hdr Cfg Object.   */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE QUERY STRING CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_QueryStrCfg_AppGlobal,                                /* .QueryStrCfgPtr : Pointer to Query String Cfg Object.*/
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE FORM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_FormCfg_AppGlobal,                                    /* .FormCfgPtr : Pointer to Form Cfg Object.            */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                               DYNAMIC TOKEN REPLACEMENT CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_TokenCfg_AppGlobal,                                   /* .TokenCfgPtr : Pointer to Token Cfg Ojbect.          */
+
+};                                                              /* End of configuration structure.                      */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_http-s_instance_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_http-s_instance_cfg.h
new file mode 100644
index 0000000..48f1ec9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/CtrlLayer/app_global_http-s_instance_cfg.h
@@ -0,0 +1,47 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+*                                               TEMPLATE
+*
+* Filename      : app_global_http-s_instance_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 AL
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NETWORK DEVICE CONFIGURATION
+*********************************************************************************************************
+*/
+
+#include  
+
+
+extern  const  NET_TASK_CFG  HTTPs_TaskCfgInstance_AppGlobal;
+extern  const  HTTPs_CFG     HTTPs_CfgInstance_AppGlobal;
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs.c
new file mode 100644
index 0000000..7ad80fd
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs.c
@@ -0,0 +1,138 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                HTTP INSTANCE INITALIZATION WITH NO FS APPLICATION
+*
+* Filename      : app_no_fs.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize uC/HTTPs without the need of a File System,
+*                      initialize a web server instance and start it.
+*
+*                 (2) This example is for :
+*
+*                       (a) uC/TCPIP - V3.00.01 and up
+*
+*                 (3) This file is an example about how to use uC/HTTPs, It may not cover all case needed by a real
+*                     application. Also some modification might be needed, insert the code to perform the stated
+*                     actions wherever 'TODO' comments are found.
+*
+*                     (a) For example this example doesn't manage the link state (plugs and unplugs), this can
+*                         be a problem when switching from a network to another network.
+*
+*                     (b) This example is not fully tested, so it is not guaranteed that all cases are cover
+*                         properly.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "app_no_fs.h"
+#include  "app_no_fs_http-s_instance_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*                                            AppNoFS_Init()
+*
+* Description : (1) Initialize uC/HTTPs and start a web server instance:
+*
+*                   (a) Initialize uC/HTTPs module.
+*                   (b) Initialize a web server instance.
+*                   (c) Start that web server instance.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK, if successfully initialized and started (can access the web server).*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (2) Prerequisite modules must be initialized before calling any uC/HTTPs functions:
+*
+*                   (a) RTOS, such as uCOS-II or uCOS-III
+*                   (b) uC/LIB
+*                   (c) uC/CPU
+*                   (d) uC/TCP-IP
+*
+*               (3) Prior to do any call to uC/HTTPs, the module must be initialized. This is done by
+*                   calling HTTPs_Init(). If the process is successful, the Web server internal data structures are
+*                   initialized.
+*
+*               (4) Each web server must be initialized before it can be started or stopped. HTTPs_InstanceInit()
+*                   is responsible to allocate memory for the instance, initialize internal data structure and
+*                   create the web server instance's task.
+*
+*                   (a) The first argument is the instance configuration, which should be modified following you
+*                       requirements. The intance's configuration set the server's port, the number of connection that
+*                       can be accepted, the hooks functions, etc.
+*
+*                   (b) The second argument is the instance task configuration. It set the task priority, the task
+*                       stack size, etc.
+*
+*               (5) Once a web server instance is initialized, it can be started using HTTPs_InstanceStart() to
+*                   become come accessible. This function start the web server instance's task. Each instance has
+*                   is own task and all accepted connection is processed with this single task.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppNoFS_Init (void)
+{
+    HTTPs_INSTANCE  *p_https_instance;
+    HTTPs_ERR        http_err;
+
+
+    /* TODO: Prerequisites modules must be initialized prior calling any of the following functions. See Note #2.       */
+
+                                                                /* -------------- INITALIZE HTTPS MODULE -------------- */
+    HTTPs_Init(DEF_NULL, &http_err);                            /* See Note #3.                                         */
+    if (http_err != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ---------- INITALIZE WEB SERVER INSTANCE ----------- */
+    p_https_instance = HTTPs_InstanceInit(&HTTPs_CfgInstance_NoFS,     /* Instance configuration. See Note #4a.         */
+                                          &HTTPs_TaskCfgInstance_NoFS, /* Instance Task Configuration. See Note #4b.    */
+                                          &http_err);
+    if (http_err != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------ START WEB SERVER INSTANCE ------------- */
+    HTTPs_InstanceStart(p_https_instance,                       /* Instance handle. See Note #5.                        */
+                       &http_err);
+    if (http_err != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs.h
new file mode 100644
index 0000000..87eef01
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs.h
@@ -0,0 +1,80 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                              HTTP INSTANCE INITALIZATION WITH NO FS APPLICATION
+*
+* Filename      : app_no_fs.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef APP_NO_FS_MODULE_PRESENT
+#define APP_NO_FS_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+#if 1
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppNoFS_Init  (void);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* APP_NO_FS_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs_http-s_hooks.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs_http-s_hooks.c
new file mode 100644
index 0000000..1c3c771
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs_http-s_hooks.c
@@ -0,0 +1,385 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+/*
+*********************************************************************************************************
+*
+*                                   HTTP INSTANCE SERVER HOOKS FILE
+*
+* Filename      : app_no_fs_http-s_hooks.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "app_no_fs.h"
+#include  "app_no_fs_http-s_instance_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  DFLT_PAGE_URL             "/hello_world"
+#define  DFLT_PAGE_DATA            "hello world!"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        FUNCTIONS PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqHook               (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+
+static  CPU_BOOLEAN  HTTPs_RespHdrTxHook         (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+
+/*
+*********************************************************************************************************
+*                                      HTTP SERVER HOOK CONFIGURATION
+*
+* Note(s): (1)  When the instance is created, an hook function can be called to initialize connection objects used by the instance.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_InstanceInitHook() function for further details.
+*
+*          (2)  Each time a header field other than the default one is received, a hook function is called
+*               allowing to choose which header field(s) to keep for further processing.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqHdrRxHook() function for further details.
+*
+*          (3)  For each new incoming connection request a hook function can be called by the web server to authenticate
+*               the remote connection to accept or reject it. This function can have access to allow stored request header
+*               field.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqHook() function for further details.
+*
+*          (4)  If the upper application want to parse the data received in the request body itself, a hook function is available.
+*               It will be called each time new data are received. The exception is when a POST request with a form is
+*               received. In that case, the HTTP server core will parse the body and saved the data into Key-Value blocks.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqBodyRxHook() function for further details.
+*
+*          (5)  The Signal hook function occurs after the HTTP request has been completely received.
+*               The hook function SHOULD NOT be blocking and SHOULD return quickly. A time consuming function will
+*               block the processing of the other connections and reduce the HTTP server performance.
+*               In case the request processing is time consuming, the Poll hook function SHOULD be enabled to
+*               allow the server to periodically verify if the upper application has finished the request processing.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqRdySignalHook() function for further details.
+*
+*          (6)  The Poll hook function SHOULD be enable in case the request processing require lots of time. It
+*               allows the HTTP server to periodically poll the upper application and verify if the request processing
+*               has finished.
+*               If the Poll feature is not required, this field SHOULD be set as DEF_NULL.
+*               See HTTPs_ReqRdyPollHook() function for further details.
+*
+*          (7)  Before an HTTP response message is transmitted, a hook function is called to enable adding header field(s) to
+*               the message before it is sent.
+*               The Header Module must be enabled for this hook to be called. See HTTPs_CFG_HDR in http-s_cfg.h.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_RespHdrTxHook() function for further details.
+*
+*          (8)  The hook function is called by the web server when a token is found. This means the hook
+*               function must fill a buffer with the value of the instance token to be sent.
+*               If the feature is not enabled, this field is not used and can be set as DEF_NULL.
+*               See 'HTTPs_RespTokenValGetHook' for further information.
+*
+*          (9)  To allow the upper application to transmit data with the Chunked Transfer Encoding, a hook function is
+*               available. If defined, it will be called at the moment of the Response body transfer, and it will be called
+*               until the application has transfer all its data.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_RespChunkDataGetHook() function for further details.
+*
+*          (10) Once an HTTP transaction is completed, a hook function can be called to notify the upper application that the
+*               transaction is done. This hook function could be used to free some previously allocated memory.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_TransCompleteHook() function for further details.
+*
+*          (11) When an internal error occurs during the processing of a connection a hook function can be called to
+*               notify the application of the error and to change the behavior such as the status code and the page returned.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ErrHook() function for further details.
+*
+*          (12) Get error file hook can be called every time an error has occurred when processing a connection.
+*               This function can set the web page that should be transmit instead of the default error page defined
+*               in http-s_cfg.h.
+*               If set to DEF_NULL the default error page will be used for every error.
+*               See HTTPs_ErrFileGetHook() function for further details.
+*
+*          (13) Once a connection is closed a hook function can be called to notify the upper application that a connection
+*               is no more active. This hook function could be used to free some previously allocated memory.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ConnCloseHook() function for further details.
+*********************************************************************************************************
+*/
+
+const  HTTPs_HOOK_CFG  HTTPs_Hooks_NoFS = {
+        DEF_NULL,                                   /* .OnInstanceInitHook     See Note #1.     */
+        DEF_NULL,                                   /* .OnReqHdrRxHook         See Note #2.     */
+        HTTPs_ReqHook,                              /* .OnReqHook              See Note #3.     */
+        DEF_NULL,                                   /* .OnReqBodyRxHook        See Note #4.     */
+        DEF_NULL,                                   /* .OnReqRdySignalHook     See Note #5.     */
+        DEF_NULL,                                   /* .OnReqRdyPollHook       See Note #6.     */
+        HTTPs_RespHdrTxHook,                        /* .OnRespHdrTxHook        See Note #7.     */
+        DEF_NULL,                                   /* .OnRespTokenHook        See Note #8.     */
+        DEF_NULL,                                   /* .OnRespChunkHook        See Note #9.     */
+        DEF_NULL,                                   /* .OnTransCompleteHook    See Note #10.    */
+        DEF_NULL,                                   /* .OnErrHook              See Note #11.    */
+        DEF_NULL,                                   /* .OnErrFileGetHook       See Note #12.    */
+        DEF_NULL                                    /* .OnConnCloseHook        See Note #13.    */
+};
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_ReqHook()
+*
+* Description : Called after the parsing of an HTTP request message's first line and header(s).
+*               Allows the application to process the information received in the request message.
+*               Examples of behaviors that could be implemented :
+*
+*               (a) Analyze the Request-URI and validate that the client has the permission to access
+*                   the resource. If not, change the Response Status Code to 403 (Forbidden) or 401
+*                   (Unauthorized) if an Authentication technique is implemented. In case of a 401
+*                   Status, a "WWW-Authenticate" header needs to be added to the response message
+*                   (See HTTPs_InstanceRespHdrTx() function)
+*
+*               (b) Depending on whether the header feature is enabled and which header fields have been
+*                   chosen for use (see HTTPs_ReqHdrRxHook() function), different behaviors
+*                   are possible. Here are some examples :
+*
+*                       (1) A "Cookie" header is received. The default html page is modified to include
+*                           personalized features for the client.
+*
+*                       (2) An "Authorization" header is received. This validates that the client login is good and
+*                           changes permanently its' access to the folder/file.
+*
+*                       (3) An "If-Modified-Since" header is received. It then validates whether or not the resource
+*                           has been modified since the 'HTTP-date' received with the header. If it was, continue
+*                           with the request processing normally, else change the Status Code to 304 (Not Modified).
+*
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : DEF_OK    if the application allows the request to be continue.
+*               DEF_FAIL  otherwise.
+*                               Status code will be set automatically to HTTPs_STATUS_UNAUTHORIZED
+*
+* Caller(s)   : HTTPs_Req() via 'p_cfg->HooksPtr->OnReqHook'.
+*
+* Note(s)     : (1) The instance structure is for read-only. It must not be modified at any point in this hook function.
+*
+*               (2) The following connection attributes can be accessed to analyze the connection:
+*
+*                   (a) 'ClientAddr'
+*                           This connection parameter contains the IP address and port used by the remote client to access the
+*                           server instance.
+*
+*                   (b) 'Method'
+*                           HTTPs_METHOD_GET        Get  request
+*                           HTTPs_METHOD_POST       Post request
+*                           HTTPs_METHOD_HEAD       Head request
+*
+*                   (c) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested.
+*
+*                   (d) 'HdrCtr'
+*                           This parameter is a counter of the number of header field that has been stored.
+*
+*                   (e) 'HdrListPtr'
+*                           This parameter is a pointer to the first header field stored. A linked list is created with
+*                           all header field stored.
+*
+*               (3) In this hook function, only the under-mentioned connection parameters are allowed
+*                   to be modified :
+*
+*                   (a) 'StatusCode'
+*
+*                           See HTTPs_STATUS_CODE declaration in http-s.h for all the status code supported.
+*
+*                   (b) 'PathPtr'
+*
+*                           This is a pointer to the string that contains the name of the file requested. You can change
+*                           the name of the requested file to send another file instead without error.
+*
+*                   (c) 'DataPtr'
+*
+*                           This is a pointer to the data file or data to transmit. This parameter should be null when calling
+*                           this function. If data from memory has to be sent instead of a file, this pointer must be set
+*                           to the location of the data.
+*
+*                   (d) 'RespBodyDataType'
+*
+*                           HTTPs_BODY_DATA_TYPE_FILE              Open and transmit a file. Value by default.
+*                           HTTPs_BODY_DATA_TYPE_STATIC_DATA       Transmit data from the memory. Must be set by the hook function.
+*                           HTTPs_BODY_DATA_TYPE_NONE              No body in response.
+*
+*                   (e) 'DataLen'
+*
+*                           0,                              Default value, will be set when the file is opened.
+*                           Data length,                    Must be set by the data length when transmitting data from
+*                                                           the memory
+*
+*                   (f) 'ConnDataPtr'
+*
+*                           This is a pointer available for the upper application when memory block must be allocated
+*                           to process the connection request. If memory is allocated by the upper application, the memory
+*                           space can be deallocated into another hook function.
+*
+*               (4) When the Location of the requested file has changed, besides the Status Code to change (3xx),
+*                   the 'PathPtr' parameter needs to be updated. A "Location" header will be added automatically in
+*                   the response by uC/HTTPs core with the new location.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqHook (const  HTTPs_INSTANCE  *p_instance,
+                                           HTTPs_CONN      *p_conn,
+                                    const  void            *p_hook_cfg)
+{
+    CPU_INT16S  str_cmp;
+    HTTPs_ERR   err;
+
+                                                                /* Set the HTTP response body.                          */
+    str_cmp = Str_Cmp_N(p_conn->PathPtr, DFLT_PAGE_URL, p_conn->PathLenMax);
+    if (str_cmp == 0) {
+
+        HTTPs_RespBodySetParamStaticData(p_instance,
+                                         p_conn,
+                                         HTTP_CONTENT_TYPE_HTML,
+                                         DFLT_PAGE_DATA,
+                                         sizeof(DFLT_PAGE_DATA),
+                                         DEF_NO,
+                                        &err);
+        if (err != HTTPs_ERR_NONE) {
+            return (DEF_FAIL);
+        }
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_RespHdrTxHook()
+*
+* Description : Called each time the HTTP server is building a response message. Allows for adding header
+*               fields to the response message according to the application needs.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : DEF_YES,    if the header fields are added without running into a error.
+*
+*               DEF_NO,     otherwise.
+*
+* Caller(s)   : HTTPsResp_Hdr() via 'p_cfg->OnRespHdrTxHook()'.
+*
+* Note(s)     : (1) The instance structure MUST NOT be modified.
+*
+*               (2) The connection structure MUST NOT be modified manually since the response is about to be
+*                   transmitted at this point. The only change to the connection structure should be the
+*                   addition of header fields for the response message through the function HTTPs_RespHdrGet().
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_RespHdrTxHook (const  HTTPs_INSTANCE  *p_instance,
+                                                 HTTPs_CONN      *p_conn,
+                                          const  void            *p_hook_cfg)
+{
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+
+           HTTPs_HDR_BLK  *p_resp_hdr_blk;
+    const  HTTPs_CFG      *p_cfg;
+           CPU_CHAR       *str_data;
+           CPU_SIZE_T      str_len;
+           HTTPs_ERR       http_err;
+
+
+    p_cfg = p_instance->CfgPtr;
+
+    if (p_cfg->HdrTxCfgPtr == DEF_NULL) {
+        return (DEF_NO);
+    }
+
+    switch (p_conn->StatusCode) {
+           case HTTP_STATUS_OK:
+
+                if (p_conn->ReqContentType == HTTP_CONTENT_TYPE_HTML) {
+
+                                                                /* --------------- ADD SERVER HDR FIELD --------------- */
+                                                                /* Get and add header block to the connection.          */
+                    p_resp_hdr_blk = HTTPs_RespHdrGet(p_instance,
+                                                      p_conn,
+                                                      HTTP_HDR_FIELD_SERVER,
+                                                      HTTPs_HDR_VAL_TYPE_STR_DYN,
+                                                     &http_err);
+                    if (p_resp_hdr_blk == DEF_NULL) {
+                        return(DEF_FAIL);
+                    }
+
+                    str_data = "uC-HTTP-server";                /* Build Server string value.                           */
+
+                    str_len = Str_Len_N(str_data, p_cfg->HdrTxCfgPtr->DataLenMax);
+
+                                                                /* update hdr blk parameter.                            */
+                    Str_Copy_N(p_resp_hdr_blk->ValPtr,
+                               str_data,
+                               str_len);
+
+                    p_resp_hdr_blk->ValLen = str_len;
+                }
+                break;
+
+
+           default:
+                break;
+    }
+#endif
+
+    return (DEF_YES);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs_http-s_instance_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs_http-s_instance_cfg.c
new file mode 100644
index 0000000..f8ca487
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs_http-s_instance_cfg.c
@@ -0,0 +1,254 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+* Filename      : app_no_fs_http-s_instance_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) All values that are used in this file and are defined in other header files should be
+*               included in this file. Some values could be located in the same file such as task priority
+*               and stack size. This template file assume that the following values are defined in app_cfg.h:
+*
+*                   HTTPs_OS_CFG_INSTANCE_TASK_PRIO
+*                   HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE
+*
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                             /* See Note #1.                                         */
+
+#include  "app_no_fs_http-s_instance_cfg.h"
+#include  "app_no_fs.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   FILES & FOLDERS STRING DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT              "/hello_world"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  HTTPs_HOOK_CFG  HTTPs_Hooks_NoFS;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TASK CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  NET_TASK_CFG  HTTPs_TaskCfgInstance_NoFS = {
+
+    HTTPs_OS_CFG_INSTANCE_TASK_PRIO,                            /* .Prio : Configure Instance Task priority.            */
+
+    HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE,                        /* .StkSizeBytes : Configure instance task size.        */
+
+    DEF_NULL                                                    /* .StkPtr : Configure pointer to base of the stack.    */
+
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_CFG_FS_NONE  HTTPs_CfgFS_NoFS = {
+
+    256,                                                        /* .PathLenMax : Maximum path length.                   */
+};
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER TX CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_TX_CFG  HTTPs_HdrTxCfg_NoFS = {
+
+    2,                                                          /* .NbrPerConnMax                                       */
+
+    128,                                                        /* .DataLenMax                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               HTTP SERVER INSTANCE CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_CFG  HTTPs_CfgInstance_NoFS = {
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      INSTANCE OS CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    2,                                                          /* .OS_TaskDly_ms : Configure instance task delay.      */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                INSTANCE LISTEN SOCKET CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    HTTPs_SOCK_SEL_IPv4_IPv6,                                   /* .SockSel : Socket type.                              */
+
+    DEF_NULL,                                                   /* .SecurePtr : Secure configuration (SSL) Pointer.     */
+
+    HTTPs_CFG_DFLT_PORT,                                        /* .Port : Server port number.                          */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE CONNECTION CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    15,                                                         /* .ConnNbrMax : Maximum number of simultaneous.        */
+
+    15,                                                         /* .ConnInactivityTimeout_s : Conn inactivity timeout.  */
+
+    1460,                                                       /* .BufLen : Connection buffer length.                  */
+
+    DEF_ENABLED,                                                /* .ConnPersistentEn : Persistent conn feature.         */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE FILE SYSTEM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    HTTPs_FS_TYPE_NONE,                                          /* .FS_Type : File System Type.                         */
+
+
+   &HTTPs_CfgFS_NoFS,                                           /* .FS_CfgPtr : File System Configuration pointer.      */
+
+    HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT,                        /* .DfltResourceNamePtr : Default page.                 */
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE PROXY CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    128,                                                        /* .HostNameLenMax : Maximum host name length.          */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                        HOOK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_Hooks_NoFS,                                           /* .HooksPtr : Pointer to Hooks' Object.                */
+
+    DEF_NULL,                                                   /* .Hooks_CfgPtr : Pointer to Application Data Hook.    */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     HEADER FIELD CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    DEF_NULL,                                                   /* .HdrRxCfgPtr : Pointer to Request Hdr Cfg Object.    */
+
+   &HTTPs_HdrTxCfg_NoFS,                                        /* .HdrTxCfgPtr : Pointer to Response Hdr Cfg Object.   */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE QUERY STRING CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    DEF_NULL,                                                   /* .QueryStrCfgPtr : Pointer to Query String Cfg Object.*/
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      INSTANCE FORM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    DEF_NULL,                                                   /* .FormCfgPtr : Pointer to Form Cfg Object.            */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                DYNAMIC TOKEN REPLACEMENT CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    DEF_NULL,                                                   /* .TokenCfgPtr : Pointer to Token Cfg Ojbect.          */
+
+};                                                              /* End of configuration structure.                      */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs_http-s_instance_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs_http-s_instance_cfg.h
new file mode 100644
index 0000000..9e0eede
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/NoFS/app_no_fs_http-s_instance_cfg.h
@@ -0,0 +1,45 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+* Filename      : app_no_fs_http-s_instance_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   HTTP SERVER INSTANCE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_TASK_CFG  HTTPs_TaskCfgInstance_NoFS;
+extern  const  HTTPs_CFG     HTTPs_CfgInstance_NoFS;
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest.c
new file mode 100644
index 0000000..a8dcfab
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest.c
@@ -0,0 +1,2536 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        HTTP REST APPLICATION
+*
+* Filename      : app_rest.c
+* Version       : V3.00.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : none
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    APP_REST_MODULE
+#include  "app_rest.h"
+
+#include  
+
+#include  
+#include  
+#include  "../Common/StaticFiles/generated_fs.h"
+
+#include  "app_rest_http-s_instance_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        APP CONFIGURATION DEFINES - CAN BE MODIFIED
+*********************************************************************************************************
+*/
+
+#define  APP_REST_USER_MAX_NBR                       10u
+
+#define  APP_REST_LINK_STR_MAX_LEN                  100u
+#define  APP_REST_FIRST_NAME_STR_MAX_LEN             50u
+#define  APP_REST_LAST_NAME_STR_MAX_LEN              50u
+#define  APP_REST_JOB_TITLE_STR_MAX_LEN             100u
+
+
+/*
+*********************************************************************************************************
+*                                             OTHER DEFINES
+*********************************************************************************************************
+*/
+
+#define  APP_REST_GENDER_STR_MAX_LEN             7u
+#define  APP_REST_AGE_STR_MAX_LEN                4u
+
+
+/*
+*********************************************************************************************************
+*                                            JSON DEFINES
+*********************************************************************************************************
+*/
+
+#define  APP_REST_JSON_OBJ_CHARS_NBR                2u
+#define  APP_REST_JSON_TBL_CHARS_NBR                2u
+#define  APP_REST_JSON_FIELD_MIN_CHARS_NBR          6u
+#define  APP_REST_JSON_FIELD_MAX_CHARS_NBR          8u
+
+#define  APP_REST_JSON_LIST_USER_START_STR          "{\"Users\":["
+#define  APP_REST_JSON_LIST_USER_END_STR            "]}"
+
+#define  APP_REST_JSON_KEY_ID_STR_NAME              "User ID"
+#define  APP_REST_JSON_KEY_LINK_STR_NAME            "Link"
+#define  APP_REST_JSON_KEY_FIRST_NAME_STR_NAME      "First Name"
+#define  APP_REST_JSON_KEY_LAST_NAME_STR_NAME       "Last Name"
+#define  APP_REST_JSON_KEY_GENDER_STR_NAME          "Gender"
+#define  APP_REST_JSON_KEY_AGE_STR_NAME             "Age"
+#define  APP_REST_JSON_KEY_JOB_STR_NAME             "Job Title"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       USER INFO FIELD DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  AppREST_UserField {
+    APP_REST_USER_FIELD_ID,
+    APP_REST_USER_FIELD_LINK,
+    APP_REST_USER_FIELD_FIRST_NAME,
+    APP_REST_USER_FIELD_LAST_NAME,
+    APP_REST_USER_FIELD_GENDER,
+    APP_REST_USER_FIELD_AGE,
+    APP_REST_USER_FIELD_JOB
+} APP_REST_USER_FIELD;
+
+
+/*
+*********************************************************************************************************
+*                                           USER DATA TYPE
+*
+* Note(s): (1) The user data type will be use to create a double chain list of users.
+*********************************************************************************************************
+*/
+
+typedef  struct  AppREST_User APP_REST_USER;
+
+struct  AppREST_User {
+    CPU_INT32U      ID;
+    CPU_CHAR        Link[APP_REST_LINK_STR_MAX_LEN];
+    CPU_CHAR        FirstName[APP_REST_FIRST_NAME_STR_MAX_LEN];
+    CPU_CHAR        LastName[APP_REST_LAST_NAME_STR_MAX_LEN];
+    CPU_CHAR        Gender[APP_REST_GENDER_STR_MAX_LEN];
+    CPU_INT08U      Age;
+    CPU_CHAR        JobTitle[APP_REST_JOB_TITLE_STR_MAX_LEN];
+    CPU_INT32U      RdRefCtr;
+    CPU_INT32U      WrRefCtr;
+    APP_REST_USER  *PrevPtr;
+    APP_REST_USER  *NextPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                                       FREE USER ID DATA TYPE
+*
+* Note(s): (1) The free user ID data type will be use to create a simple chain list of Free ID.
+*
+*          (2) Free ID are ID that have already been used but are now free because the user was deleted.
+*
+*          (3) This allows to reuse ID from deleted user.
+*********************************************************************************************************
+*/
+
+typedef  struct  AppREST_FreeUserID  APP_REST_FREE_USER_ID;
+
+struct  AppREST_FreeUserID {
+    CPU_INT32U              ID;
+    APP_REST_FREE_USER_ID  *NextPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                                     APPLICATION DATA DATA TYPE
+*
+* Notes(s): (1) The application data structure is used to store some information relative to one HTTP
+*               transaction that must be accessible through all the calls to the same hook function.
+*
+*               For example, when a request is received to get a specific user infos, in the Init state,
+*               we will try to found that user and store a the user pointer in the app data so that when
+*               we fall in the TX state we can retrive the user pointer.
+*********************************************************************************************************
+*/
+
+typedef  struct  AppREST_Data  APP_REST_DATA;
+
+struct  AppREST_Data {
+    APP_REST_USER        *UserPtr;          /* Current user being process by the request.                   */
+    APP_REST_USER_FIELD   FieldType;        /* Store the current user info field that must be transmitted.  */
+    APP_REST_DATA        *NextPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE   AppREST_GetPage               (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                               const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                               const  HTTPs_REST_STATE          state,
+                                                                      void                    **p_data,
+                                                               const  HTTPs_INSTANCE           *p_instance,
+                                                                      HTTPs_CONN               *p_conn,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                buf_len,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  HTTPs_REST_HOOK_STATE   AppREST_GetUserListHook       (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                               const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                               const  HTTPs_REST_STATE          state,
+                                                                      void                    **p_data,
+                                                               const  HTTPs_INSTANCE           *p_instance,
+                                                                      HTTPs_CONN               *p_conn,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                buf_len,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  HTTPs_REST_HOOK_STATE   AppREST_GetUserInfoHook       (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                               const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                               const  HTTPs_REST_STATE          state,
+                                                                      void                    **p_data,
+                                                               const  HTTPs_INSTANCE           *p_instance,
+                                                                      HTTPs_CONN               *p_conn,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                buf_len,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  HTTPs_REST_HOOK_STATE   AppREST_SetUserInfoHook       (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                               const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                               const  HTTPs_REST_STATE          state,
+                                                                      void                    **p_data,
+                                                               const  HTTPs_INSTANCE           *p_instance,
+                                                                      HTTPs_CONN               *p_conn,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                buf_len,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  HTTPs_REST_HOOK_STATE   AppREST_CreateUserHook        (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                               const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                               const  HTTPs_REST_STATE          state,
+                                                                      void                    **p_data,
+                                                               const  HTTPs_INSTANCE           *p_instance,
+                                                                      HTTPs_CONN               *p_conn,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                buf_len,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  HTTPs_REST_HOOK_STATE   AppREST_DeleteUserHook        (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                               const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                               const  HTTPs_REST_STATE          state,
+                                                                      void                    **p_data,
+                                                               const  HTTPs_INSTANCE           *p_instance,
+                                                                      HTTPs_CONN               *p_conn,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                buf_len,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  CPU_SIZE_T              AppREST_JSON_GetUserFieldSize (       APP_REST_USER            *p_user);
+
+static  CPU_SIZE_T              AppREST_JSON_GetUserInfoSize  (       APP_REST_USER            *p_user);
+
+static  HTTPs_REST_HOOK_STATE   AppREST_JSON_WrUserToBuf      (       APP_REST_USER            *p_user,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                buf_len,
+                                                               const  CPU_SIZE_T                buf_len_max,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  HTTPs_REST_HOOK_STATE   AppREST_JSON_WrUserListToBuf  (       APP_REST_DATA            *p_app_data,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                buf_len,
+                                                               const  CPU_SIZE_T                buf_len_max,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  HTTPs_REST_HOOK_STATE   AppREST_JSON_WrUserInfoToBuf  (       APP_REST_USER            *p_user,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                buf_len,
+                                                               const  CPU_SIZE_T                buf_len_max,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  HTTPs_REST_HOOK_STATE   AppREST_JSON_ParseUser        (       APP_REST_DATA            *p_app_data,
+                                                                      APP_REST_USER            *p_user,
+                                                               const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                buf_len,
+                                                               const  CPU_SIZE_T                buf_len_max,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  HTTPs_REST_HOOK_STATE   AppREST_JSON_ParseUserInfo    (       APP_REST_DATA            *p_app_data,
+                                                                      APP_REST_USER            *p_user,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                data_len,
+                                                               const  CPU_SIZE_T                buf_len_max,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+
+static  HTTPs_REST_HOOK_STATE   AppREST_JSON_ParseField       (       APP_REST_USER_FIELD       field_type,
+                                                                      CPU_CHAR                **p_val_found,
+                                                                      CPU_SIZE_T               *p_val_len,
+                                                                      void                     *p_buf,
+                                                               const  CPU_SIZE_T                data_len,
+                                                               const  CPU_SIZE_T                buf_len_max,
+                                                                      CPU_SIZE_T               *p_buf_len_used);
+
+static  APP_REST_USER          *AppREST_FindUser             (       CPU_INT08U                user_id);
+
+static  APP_REST_USER          *AppREST_GetUser               (void);
+
+static  void                    AppREST_RemoveUser            (       APP_REST_USER            *p_user);
+
+static  CPU_INT08U              AppREST_GetUserID             (void);
+
+static  APP_REST_FREE_USER_ID  *AppREST_GetFreeUserID         (       CPU_INT08U                user_id);
+
+static  void                    AppREST_RemoveFreeUserID      (void);
+
+static  APP_REST_DATA          *AppREST_GetDataBlk            (void);
+
+static  void                    AppREST_RemoveDataBlk         (       APP_REST_DATA            *p_app_data);
+
+static  CPU_SIZE_T              AppREST_GetStrLenOfIntDec     (       CPU_INT32U                i);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      REST RESOURCE VARIABLES
+*********************************************************************************************************
+*/
+
+                                            /* Resource associated with the User List.      */
+HTTPs_REST_RESOURCE AppREST_List_Resource = {
+        "/users",                           /* Resource URI                 */
+        DEF_NULL,                           /* No HTTP headers to keep.     */
+        0,                                  /* No HTTP headers to keep.     */
+        {
+                DEF_NULL,                   /* Method Delete                */
+               &AppREST_GetUserListHook,    /* Method Get                   */
+                DEF_NULL,                   /* Method Head, Not supported   */
+               &AppREST_CreateUserHook,     /* Method Post                  */
+                DEF_NULL                    /* Method Put                   */
+        }
+};
+
+                                            /* Resource associated with a specific user.    */
+HTTPs_REST_RESOURCE AppREST_User_Resource = {
+        "/users/{user_id}",
+        DEF_NULL,
+        0,
+        {
+               &AppREST_DeleteUserHook,     /* Method Delete                */
+               &AppREST_GetUserInfoHook,    /* Method Get                   */
+                DEF_NULL,                   /* Method Head, Not supported   */
+                DEF_NULL,                   /* Method Post                  */
+               &AppREST_SetUserInfoHook     /* Method Put                   */
+        }
+};
+
+
+                                            /* Resource associated with files.              */
+HTTPs_REST_RESOURCE AppREST_File_Resource = {
+        "/{file}",
+        DEF_NULL,
+        0,
+        {
+                DEF_NULL,                   /* Method Delete                */
+               &AppREST_GetPage,            /* Method Get                   */
+                DEF_NULL,                   /* Method Head, Not supported   */
+                DEF_NULL,                   /* Method Post                  */
+                DEF_NULL                    /* Method Put                   */
+        }
+};
+
+
+/*
+*********************************************************************************************************
+*                                       APP DATA VARIABLES
+*********************************************************************************************************
+*/
+
+static  MEM_DYN_POOL            AppREST_UserPool;               /* Pool of user objects.                                */
+static  MEM_DYN_POOL            AppREST_FreeUserID_Pool;        /* Pool of Free User ID objects.                        */
+static  MEM_DYN_POOL            AppREST_DataPool;               /* Pool of app data objects.                            */
+
+static  CPU_INT32U              AppREST_UserCtr;                /* Counter of the current number of users.              */
+
+static  APP_REST_USER          *AppREST_UserFirstPtr;           /* Pointer to the Head of the user list.                */
+static  APP_REST_USER          *AppREST_UserLastPtr;            /* Pointer to the End of the user list.                 */
+static  APP_REST_FREE_USER_ID  *AppREST_FreeUserID_ListPtr;     /* Pointer to the Head of the Free user ID list.        */
+static  APP_REST_DATA          *AppREST_DataListPtr;            /* Pointer to the Head of the app data object list.     */
+
+static  CPU_CHAR               *AppREST_UserID_Str;             /* Pointer to the mem seg to temp copy the ID to str.   */
+
+static  CPU_INT32U              AppREST_ListRdRefCtr;           /* Counter for the nbr of req accessing the list in rd. */
+
+static  CPU_INT32U              AppREST_ListWrRefCtr;           /* Counter for the nbr of req accessing the list in wr. */
+
+
+/*
+*********************************************************************************************************
+*                                            AppREST_Init()
+*
+* Description : Initialize HTTPs REST Example application.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK,   if initialization was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppREST_Init (void)
+{
+    HTTPs_INSTANCE  *p_instance;
+    CPU_BOOLEAN      result;
+    HTTPs_ERR        err_https;
+
+
+                                                                /* Initialize HTTPs Static File System.                 */
+    HTTPs_FS_Init();
+
+                                                                /* Add required files to the Static FS.                 */
+    result = GeneratedFS_FileAdd();
+    if (result != DEF_YES) {
+        return (DEF_FAIL);
+    }
+
+    HTTPs_Init(DEF_NULL, &err_https);                           /* Initialize HTTPs suite.                              */
+    if (err_https != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* Initialize HTTPs Instance.                           */
+    p_instance = HTTPs_InstanceInit(&HTTPs_CfgInstance_REST,
+                                    &HTTPs_TaskCfgInstance_REST,
+                                    &err_https);
+    if (err_https != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    result = AppREST_MemInit();
+    if (result != DEF_YES) {
+        return (DEF_FAIL);
+    }
+
+    result = AppREST_ResourcesInit();
+    if (result != DEF_YES) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* Start HTTPs Instance.                                */
+    HTTPs_InstanceStart(p_instance, &err_https);
+    if (err_https != HTTPs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           AppREST_MemInit()
+*
+* Description : Allocate the necessary memory for the REST application.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK,   if initialization was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : AppREST_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppREST_MemInit (void)
+{
+    CPU_SIZE_T      char_nbr;
+    LIB_ERR         err_lib;
+
+
+    AppREST_UserCtr            = 0;
+    AppREST_UserFirstPtr       = DEF_NULL;
+    AppREST_UserLastPtr        = DEF_NULL;
+    AppREST_FreeUserID_ListPtr = DEF_NULL;
+    AppREST_DataListPtr        = DEF_NULL;
+
+    char_nbr           = AppREST_GetStrLenOfIntDec(APP_REST_USER_MAX_NBR);
+    AppREST_UserID_Str = Mem_SegAlloc("User ID String", DEF_NULL, char_nbr, &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    Mem_DynPoolCreate("User Pool",
+                      &AppREST_UserPool,
+                       DEF_NULL,
+                       sizeof(APP_REST_USER),
+                       sizeof(CPU_SIZE_T),
+                       1,
+                       APP_REST_USER_MAX_NBR,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    Mem_DynPoolCreate("Free User ID Pool",
+                      &AppREST_FreeUserID_Pool,
+                       DEF_NULL,
+                       sizeof(APP_REST_FREE_USER_ID),
+                       sizeof(CPU_SIZE_T),
+                       1,
+                       APP_REST_USER_MAX_NBR,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    Mem_DynPoolCreate("App Data Pool",
+                      &AppREST_DataPool,
+                       DEF_NULL,
+                       sizeof(APP_REST_DATA),
+                       sizeof(CPU_SIZE_T),
+                       1,
+                       APP_REST_HTTPs_CONN_NBR_MAX,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          AppREST_ResourcesInit()
+*
+* Description : Initialize the REST application resources.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK,   if initialization was successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : AppREST_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppREST_ResourcesInit (void)
+{
+    HTTPs_REST_ERR  err;
+
+
+    HTTPsREST_Publish(&AppREST_List_Resource, 0, &err);
+    if (err != HTTPs_REST_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPsREST_Publish(&AppREST_User_Resource, 0, &err);
+    if (err != HTTPs_REST_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    HTTPsREST_Publish(&AppREST_File_Resource, 0, &err);
+    if (err != HTTPs_REST_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           AppREST_GetPage()
+*
+* Description : Hook function that will be called when GET request is received with the any URI that is not
+*               "/users" or /users/{user_id}.
+*               Therefore, this hook function is to catch all the HTTP requests that are not specific to REST
+*               but are related to the web page browsing, for example get html/js/image files for the view in
+*               the web browser.
+*
+* Argument(s) : p_resource      Pointer to REST resource.
+*
+*               p_uri           Pointer to the REST URI of the resource.
+*
+*               state           REST State :
+*                                   HTTPs_REST_STATE_INIT:  Bound to the initialize hook of the HTTP server (OnInstanceInitHook).
+*                                   HTTPs_REST_STATE_RX:    Bound to the RX hook of the HTTP server (OnReqBodyRxHook).
+*                                   HTTPs_REST_STATE_TX:    Bound to the ready hook (OnReqRdySignalHook) and the TX chunk hook (OnRespChunkHook).
+*                                   HTTPs_REST_STATE_CLOSE: Bound to the 'OnTransCompleteHook' and 'OnConnCloseHook'.
+*                                   HTTPs_REST_STATE_ERROR: Should not occur.
+*
+*               p_data          Pointer to the connection application data pointer.
+*
+*               p_instance      Pointer to the HTTP server instance object.
+*
+*               p_conn          Pointer to the HTTP connection object.
+*
+*               p_buf           Pointer to the connection buffer to read/write data.
+*
+*               buf_len         RX state: Data length available to be read.
+*                               TX state: Buffer length available to write.
+*
+*               p_buf_len_used  RX state: Must be updated by the hook to indicate the length of the data read by the app.
+*                               TX state: Must be updated by the hook to indicate the length of the data written by the app.
+*
+* Return(s)   : REST hook state:
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : HTTP server core.
+*
+* Note(s)     : (1) Since the default behavior of the HTTP core is to serve web pages, this hook function
+*                   does not do anything and let the server core process the request.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_GetPage (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                const  HTTPs_REST_STATE          state,
+                                                       void                    **p_data,
+                                                const  HTTPs_INSTANCE           *p_instance,
+                                                       HTTPs_CONN               *p_conn,
+                                                       void                     *p_buf,
+                                                const  CPU_SIZE_T                buf_len,
+                                                       CPU_SIZE_T               *p_buf_len_used)
+{
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);                    /* See note #1.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                       AppREST_GetUserListHook()
+*
+* Description : Hook function that will be called when GET request is received with the "/users" URI.
+*               This function, will set the response body data to a JSON with the user list.
+*
+* Argument(s) : p_resource      Pointer to REST resource.
+*
+*               p_uri           Pointer to the REST URI of the resource.
+*
+*               state           REST State :
+*                                   HTTPs_REST_STATE_INIT:  Bound to the initialize hook of the HTTP server (OnInstanceInitHook).
+*                                   HTTPs_REST_STATE_RX:    Bound to the RX hook of the HTTP server (OnReqBodyRxHook).
+*                                   HTTPs_REST_STATE_TX:    Bound to the ready hook (OnReqRdySignalHook) and the TX chunk hook (OnRespChunkHook).
+*                                   HTTPs_REST_STATE_CLOSE: Bound to the 'OnTransCompleteHook' and 'OnConnCloseHook'.
+*                                   HTTPs_REST_STATE_ERROR: Should not occur.
+*
+*               p_data          Pointer to the connection application data pointer.
+*
+*               p_instance      Pointer to the HTTP server instance object.
+*
+*               p_conn          Pointer to the HTTP connection object.
+*
+*               p_buf           Pointer to the connection buffer to read/write data.
+*
+*               buf_len         RX state: Data length available to be read.
+*                               TX state: Buffer length available to write.
+*
+*               p_buf_len_used  RX state: Must be updated by the hook to indicate the length of the data read by the app.
+*                               TX state: Must be updated by the hook to indicate the length of the data written by the app.
+*
+* Return(s)   : REST hook state:
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : HTTP server core.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_GetUserListHook (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                        const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                        const  HTTPs_REST_STATE          state,
+                                                               void                    **p_data,
+                                                        const  HTTPs_INSTANCE           *p_instance,
+                                                               HTTPs_CONN               *p_conn,
+                                                               void                     *p_buf,
+                                                        const  CPU_SIZE_T                buf_len,
+                                                               CPU_SIZE_T               *p_buf_len_used)
+{
+    APP_REST_DATA          *p_app_data;
+    HTTPs_REST_HOOK_STATE   result;
+    HTTPs_ERR               err_https;
+
+
+    switch (state) {
+        case HTTPs_REST_STATE_INIT:
+                                                                /* Increment read reference counter of list.            */
+             if (AppREST_ListWrRefCtr == 0) {
+                 AppREST_ListRdRefCtr++;
+             } else {
+                 return (HTTPs_REST_HOOK_STATE_STAY);
+             }
+                                                                /* Get application data blk for the transaction.        */
+             p_app_data = AppREST_GetDataBlk();
+             if (p_app_data == DEF_NULL) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+            *p_data = (void *)p_app_data;
+                                                                /* Set Response body parameters to use Chunk hook.      */
+             HTTPs_RespBodySetParamStaticData(p_instance,
+                                              p_conn,
+                                              HTTP_CONTENT_TYPE_JSON,
+                                              DEF_NULL,
+                                              0,
+                                              DEF_NO,
+                                             &err_https);
+             if (err_https != HTTPs_ERR_NONE) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+             break;
+
+
+        case HTTPs_REST_STATE_RX:
+             /* Nothing to do. It's a GET request, so no body.  */
+             break;
+
+
+        case HTTPs_REST_STATE_TX:
+             p_app_data = (APP_REST_DATA *)*p_data;             /* Retrieve application data blk.                       */
+                                                                /* Write the user list to the connection buffer.        */
+             result     = AppREST_JSON_WrUserListToBuf(p_app_data, p_buf, buf_len, p_conn->BufLen, p_buf_len_used);
+             if (result != HTTPs_REST_HOOK_STATE_CONTINUE) {
+                 return (result);
+             }
+             break;
+
+
+        case HTTPs_REST_STATE_CLOSE:
+                                                                /* Free the application data blk.                       */
+             p_app_data = (APP_REST_DATA *)*p_data;
+             AppREST_RemoveDataBlk(p_app_data);
+            *p_data = DEF_NULL;
+             AppREST_ListRdRefCtr--;
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      AppREST_GetUserInfoHook()
+*
+* Description : Hook function that will be called when GET request is received with the "/users/{user_id}" URI.
+*               This function, will set the response body data to a JSON with the user info specified by the
+*               user ID.
+*
+* Argument(s) : p_resource      Pointer to REST resource.
+*
+*               p_uri           Pointer to the REST URI of the resource.
+*
+*               state           REST State :
+*                                   HTTPs_REST_STATE_INIT:  Bound to the initialize hook of the HTTP server (OnInstanceInitHook).
+*                                   HTTPs_REST_STATE_RX:    Bound to the RX hook of the HTTP server (OnReqBodyRxHook).
+*                                   HTTPs_REST_STATE_TX:    Bound to the ready hook (OnReqRdySignalHook) and the TX chunk hook (OnRespChunkHook).
+*                                   HTTPs_REST_STATE_CLOSE: Bound to the 'OnTransCompleteHook' and 'OnConnCloseHook'.
+*                                   HTTPs_REST_STATE_ERROR: Should not occur.
+*
+*               p_data          Pointer to the connection application data pointer.
+*
+*               p_instance      Pointer to the HTTP server instance object.
+*
+*               p_conn          Pointer to the HTTP connection object.
+*
+*               p_buf           Pointer to the connection buffer to read/write data.
+*
+*               buf_len         RX state: Data length available to be read.
+*                               TX state: Buffer length available to write.
+*
+*               p_buf_len_used  RX state: Must be updated by the hook to indicate the length of the data read by the app.
+*                               TX state: Must be updated by the hook to indicate the length of the data written by the app.
+*
+* Return(s)   : REST hook state:
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : HTTP server core.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_GetUserInfoHook (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                        const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                        const  HTTPs_REST_STATE          state,
+                                                               void                    **p_data,
+                                                        const  HTTPs_INSTANCE           *p_instance,
+                                                               HTTPs_CONN               *p_conn,
+                                                               void                     *p_buf,
+                                                        const  CPU_SIZE_T                buf_len,
+                                                               CPU_SIZE_T               *p_buf_len_used)
+{
+    APP_REST_DATA          *p_app_data;
+    APP_REST_USER          *p_user;
+    CPU_INT08U              user_id = DEF_INT_08U_MAX_VAL;
+    HTTPs_REST_HOOK_STATE   result;
+    HTTPs_ERR               err_https;
+
+
+    switch (state) {
+        case HTTPs_REST_STATE_INIT:
+                                                                /* Get application data blk for the transaction.        */
+             p_app_data = AppREST_GetDataBlk();
+             if (p_app_data == DEF_NULL) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+            *p_data = (void *)p_app_data;
+                                                                /* Retrieve User ID from Rx URI.                        */
+             if (p_uri->WildCardsNbr > 0) {
+                 user_id = Str_ParseNbr_Int32U(p_uri->WildCards[0].ValPtr,
+                                               DEF_NULL,
+                                               10);
+             }
+                                                                /* Retrieve User with user ID.                          */
+             p_user = AppREST_FindUser(user_id);
+             if (p_user == DEF_NULL) {
+                 p_conn->StatusCode = HTTP_STATUS_NOT_FOUND;
+                 HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err_https);
+                 if (err_https != HTTPs_ERR_NONE) {
+                     return (HTTPs_REST_HOOK_STATE_ERROR);
+                 }
+                 return (HTTPs_REST_HOOK_STATE_CONTINUE);
+             }
+                                                                /* Check if user is reference by a written transaction. */
+             if (p_user->WrRefCtr != 0) {
+                 p_conn->StatusCode = HTTP_STATUS_CONFLICT;
+                 HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err_https);
+                 if (err_https != HTTPs_ERR_NONE) {
+                     return (HTTPs_REST_HOOK_STATE_ERROR);
+                 }
+                 return (HTTPs_REST_HOOK_STATE_CONTINUE);
+             } else {
+                 p_user->RdRefCtr++;                            /* Increment read reference counter of user.            */
+             }
+
+             p_app_data->UserPtr = p_user;
+
+                                                                /* Set Response body parameters to use Chunk hook.      */
+             HTTPs_RespBodySetParamStaticData(p_instance,
+                                              p_conn,
+                                              HTTP_CONTENT_TYPE_JSON,
+                                              DEF_NULL,
+                                              0,
+                                              DEF_NO,
+                                             &err_https);
+             if (err_https != HTTPs_ERR_NONE) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+             break;
+
+
+        case HTTPs_REST_STATE_RX:
+             /* Nothing to do. It's a GET request, so no body.  */
+             break;
+
+
+        case HTTPs_REST_STATE_TX:
+             p_app_data = (APP_REST_DATA *)*p_data;             /* Retrieve application data blk.                       */
+             p_user     = p_app_data->UserPtr;
+                                                                /* Write User Info to response body.                    */
+             result = AppREST_JSON_WrUserInfoToBuf(p_user, p_buf, buf_len, p_conn->BufLen, p_buf_len_used);
+             if (result != HTTPs_REST_HOOK_STATE_CONTINUE) {
+                 return (result);
+             }
+             break;
+
+
+        case HTTPs_REST_STATE_CLOSE:
+                                                                /* Decrement the Read Reference Counter of the user.    */
+             p_app_data = (APP_REST_DATA *)*p_data;
+             p_user = p_app_data->UserPtr;
+             if (p_user != DEF_NULL) {
+                 p_user->RdRefCtr--;
+             }
+             p_app_data->UserPtr = DEF_NULL;
+                                                                /* Free the application data blk.                       */
+             AppREST_RemoveDataBlk(p_app_data);
+            *p_data = DEF_NULL;
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       AppREST_SetUserInfoHook()
+*
+* Description : Hook function that will be called when PUT request is received with the "/users/{user_id}" URI.
+*               This function, will parse the JSON with the new user info received in the request body and set
+*               the new user info.
+*               The hook will also set the response body data to a JSON with the user first name and last name
+*               to update the list preview.
+*
+* Argument(s) : p_resource      Pointer to REST resource.
+*
+*               p_uri           Pointer to the REST URI of the resource.
+*
+*               state           REST State :
+*                                   HTTPs_REST_STATE_INIT:  Bound to the initialize hook of the HTTP server (OnInstanceInitHook).
+*                                   HTTPs_REST_STATE_RX:    Bound to the RX hook of the HTTP server (OnReqBodyRxHook).
+*                                   HTTPs_REST_STATE_TX:    Bound to the ready hook (OnReqRdySignalHook) and the TX chunk hook (OnRespChunkHook).
+*                                   HTTPs_REST_STATE_CLOSE: Bound to the 'OnTransCompleteHook' and 'OnConnCloseHook'.
+*                                   HTTPs_REST_STATE_ERROR: Should not occur.
+*
+*               p_data          Pointer to the connection application data pointer.
+*
+*               p_instance      Pointer to the HTTP server instance object.
+*
+*               p_conn          Pointer to the HTTP connection object.
+*
+*               p_buf           Pointer to the connection buffer to read/write data.
+*
+*               buf_len         RX state: Data length available to be read.
+*                               TX state: Buffer length available to write.
+*
+*               p_buf_len_used  RX state: Must be updated by the hook to indicate the length of the data read by the app.
+*                               TX state: Must be updated by the hook to indicate the length of the data written by the app.
+*
+* Return(s)   : REST hook state:
+*
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : HTTP server core.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_SetUserInfoHook (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                        const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                        const  HTTPs_REST_STATE          state,
+                                                               void                    **p_data,
+                                                        const  HTTPs_INSTANCE           *p_instance,
+                                                               HTTPs_CONN               *p_conn,
+                                                               void                     *p_buf,
+                                                        const  CPU_SIZE_T                buf_len,
+                                                               CPU_SIZE_T               *p_buf_len_used)
+{
+    APP_REST_DATA          *p_app_data;
+    APP_REST_USER          *p_user;
+    CPU_INT08U              user_id = DEF_INT_08U_MAX_VAL;
+    HTTPs_REST_HOOK_STATE   result;
+    HTTPs_ERR               err_https;
+
+
+    switch (state) {
+        case HTTPs_REST_STATE_INIT:
+                                                                /* Get application data blk for the transaction.        */
+             p_app_data = AppREST_GetDataBlk();
+             if (p_app_data == DEF_NULL) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+            *p_data = (void *)p_app_data;
+                                                                /* Retrieve User ID from Rx URI.                        */
+             if (p_uri->WildCardsNbr > 0) {
+                 user_id = Str_ParseNbr_Int32U(p_uri->WildCards[0].ValPtr,
+                                               DEF_NULL,
+                                               10);
+             }
+                                                                /* Retrieve User with user ID.                          */
+             p_user = AppREST_FindUser(user_id);
+             if (p_user == DEF_NULL) {
+                 p_conn->StatusCode  = HTTP_STATUS_NOT_FOUND;
+                 HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err_https);
+                 if (err_https != HTTPs_ERR_NONE) {
+                     return (HTTPs_REST_HOOK_STATE_ERROR);
+                 }
+                 return (HTTPs_REST_HOOK_STATE_CONTINUE);
+             }
+                                                                /* Check if user is already reference elsewhere.        */
+             if ((AppREST_ListRdRefCtr != 0) ||
+                 (p_user->WrRefCtr     != 0) ||
+                 (p_user->RdRefCtr     != 0)) {
+                 p_conn->StatusCode  = HTTP_STATUS_CONFLICT;
+                 HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err_https);
+                 if (err_https != HTTPs_ERR_NONE) {
+                     return (HTTPs_REST_HOOK_STATE_ERROR);
+                 }
+                 return (HTTPs_REST_HOOK_STATE_CONTINUE);
+             } else {
+                 p_user->WrRefCtr++;                            /* Increment write reference counter of user.           */
+                 AppREST_ListWrRefCtr++;                        /* Increment write reference counter of list.           */
+             }
+
+             p_app_data->UserPtr   = p_user;
+             p_app_data->FieldType = APP_REST_USER_FIELD_FIRST_NAME;
+                                                                /* Set Response body parameters to use Chunk hook.      */
+             HTTPs_RespBodySetParamStaticData(p_instance,
+                                              p_conn,
+                                              HTTP_CONTENT_TYPE_JSON,
+                                              DEF_NULL,
+                                              0,
+                                              DEF_NO,
+                                             &err_https);
+             if (err_https != HTTPs_ERR_NONE) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+             break;
+
+
+        case HTTPs_REST_STATE_RX:
+             p_app_data = (APP_REST_DATA *)*p_data;             /* Retrieve application data blk.                       */
+             p_user     = p_app_data->UserPtr;
+                                                                /* If no user was found, just continue to send a 404.   */
+             if (p_user == DEF_NULL) {
+                 return (HTTPs_REST_HOOK_STATE_CONTINUE);
+             }
+                                                                /* If no data available to read yet, just continue.     */
+             if (buf_len == 0) {
+                 return (HTTPs_REST_HOOK_STATE_CONTINUE);
+             }
+                                                                /* Parse the user info contain in the request body.     */
+             result = AppREST_JSON_ParseUserInfo(p_app_data, p_user, p_buf, buf_len, p_conn->BufLen, p_buf_len_used);
+             if (result != HTTPs_REST_HOOK_STATE_CONTINUE) {
+                 return (result);
+             }
+            *p_buf_len_used = buf_len;
+             break;
+
+
+        case HTTPs_REST_STATE_TX:
+             p_app_data = (APP_REST_DATA *)*p_data;             /* Retrieve application data blk.                       */
+             p_user     = p_app_data->UserPtr;
+                                                                /*  Write User name to response body.                   */
+             result     = AppREST_JSON_WrUserToBuf(p_user, p_buf, buf_len, p_conn->BufLen, p_buf_len_used);
+             if (result != HTTPs_REST_HOOK_STATE_CONTINUE) {
+                 return (result);
+             }
+             break;
+
+
+        case HTTPs_REST_STATE_CLOSE:
+             p_app_data = (APP_REST_DATA *)*p_data;             /* Retrieve application data blk.                       */
+             p_user = p_app_data->UserPtr;
+             if (p_user != DEF_NULL) {
+                 p_user->WrRefCtr--;                            /* Decrement the Write Reference Counter of the user.   */
+                 AppREST_ListWrRefCtr--;                        /* Decrement the Write Reference Counter of the list.   */
+             }
+             p_app_data->UserPtr = DEF_NULL;
+                                                                /* Free the application data blk.                       */
+             AppREST_RemoveDataBlk(p_app_data);
+            *p_data = DEF_NULL;
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       AppREST_CreateUserHook()
+*
+* Description : Hook function that will be called when POST request is received with the "/users" URI.
+*               This function, will parse the JSON with the new user name received in the request body and create
+*               a new user to add to the list.
+*               The hook will also set the response body data to a JSON with the user first name and last name
+*               to update the list preview.
+*
+* Argument(s) : p_resource      Pointer to REST resource.
+*
+*               p_uri           Pointer to the REST URI of the resource.
+*
+*               state           REST State :
+*                                   HTTPs_REST_STATE_INIT:  Bound to the initialize hook of the HTTP server (OnInstanceInitHook).
+*                                   HTTPs_REST_STATE_RX:    Bound to the RX hook of the HTTP server (OnReqBodyRxHook).
+*                                   HTTPs_REST_STATE_TX:    Bound to the ready hook (OnReqRdySignalHook) and the TX chunk hook (OnRespChunkHook).
+*                                   HTTPs_REST_STATE_CLOSE: Bound to the 'OnTransCompleteHook' and 'OnConnCloseHook'.
+*                                   HTTPs_REST_STATE_ERROR: Should not occur.
+*
+*               p_data          Pointer to the connection application data pointer.
+*
+*               p_instance      Pointer to the HTTP server instance object.
+*
+*               p_conn          Pointer to the HTTP connection object.
+*
+*               p_buf           Pointer to the connection buffer to read/write data.
+*
+*               buf_len         RX state: Data length available to be read.
+*                               TX state: Buffer length available to write.
+*
+*               p_buf_len_used  RX state: Must be updated by the hook to indicate the length of the data read by the app.
+*                               TX state: Must be updated by the hook to indicate the length of the data written by the app.
+*
+* Return(s)   : REST hook state:
+*
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : HTTP server core.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_CreateUserHook (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                       const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                       const  HTTPs_REST_STATE          state,
+                                                              void                    **p_data,
+                                                       const  HTTPs_INSTANCE           *p_instance,
+                                                              HTTPs_CONN               *p_conn,
+                                                              void                     *p_buf,
+                                                       const  CPU_SIZE_T                buf_len,
+                                                              CPU_SIZE_T               *p_buf_len_used)
+{
+    APP_REST_DATA          *p_app_data;
+    APP_REST_USER          *p_user;
+    HTTPs_REST_HOOK_STATE   result;
+    HTTPs_ERR               err_https;
+
+
+    switch (state) {
+        case HTTPs_REST_STATE_INIT:
+                                                                /* Get application data blk for the transaction.        */
+             p_app_data = AppREST_GetDataBlk();
+             if (p_app_data == DEF_NULL) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+            *p_data = (void *)p_app_data;
+                                                                /* Check if the user list is reference elsewhere.       */
+             if (AppREST_ListRdRefCtr != 0) {
+                 p_conn->StatusCode  = HTTP_STATUS_CONFLICT;
+                 HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err_https);
+                 if (err_https != HTTPs_ERR_NONE) {
+                     return (HTTPs_REST_HOOK_STATE_ERROR);
+                 }
+                 return (HTTPs_REST_HOOK_STATE_CONTINUE);
+             }
+                                                                /* Create and add new user.                             */
+             p_user = AppREST_GetUser();
+             if (p_user == DEF_NULL) {
+                 p_conn->StatusCode = HTTP_STATUS_FORBIDDEN;
+                 HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err_https);
+                 if (err_https != HTTPs_ERR_NONE) {
+                     return (HTTPs_REST_HOOK_STATE_ERROR);
+                 }
+                 return(HTTPs_REST_HOOK_STATE_CONTINUE);
+             }
+
+             AppREST_UserCtr++;
+             p_user->WrRefCtr++;
+             AppREST_ListWrRefCtr++;
+
+             p_app_data->UserPtr   = p_user;
+             p_app_data->FieldType = APP_REST_USER_FIELD_FIRST_NAME;
+
+                                                                /* Set Response body parameters to use Chunk hook. */
+             HTTPs_RespBodySetParamStaticData(p_instance,
+                                              p_conn,
+                                              HTTP_CONTENT_TYPE_JSON,
+                                              DEF_NULL,
+                                              0,
+                                              DEF_NO,
+                                             &err_https);
+             if (err_https != HTTPs_ERR_NONE) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+             break;
+
+
+        case HTTPs_REST_STATE_RX:
+             p_app_data = (APP_REST_DATA *)*p_data;             /* Retrieve application data blk.                       */
+             p_user     = p_app_data->UserPtr;
+                                                                /* If no user was created, just continue.               */
+             if (p_user == DEF_NULL) {
+                 return (HTTPs_REST_HOOK_STATE_CONTINUE);
+             }
+                                                                /* If no data available to read yet, just continue.     */
+             if (buf_len == 0) {
+                 return (HTTPs_REST_HOOK_STATE_CONTINUE);
+             }
+                                                                /* Parse the user name contain in the request body.     */
+             result     = AppREST_JSON_ParseUser(p_app_data, p_user, p_uri, p_buf, buf_len, p_conn->BufLen, p_buf_len_used);
+             if (result != HTTPs_REST_HOOK_STATE_CONTINUE) {
+                 return (result);
+             }
+            *p_buf_len_used      = buf_len;
+             p_conn->StatusCode  = HTTP_STATUS_CREATED;
+             break;
+
+
+        case HTTPs_REST_STATE_TX:
+             p_app_data = (APP_REST_DATA *)*p_data;             /* Retrieve application data blk.                       */
+             p_user     = p_app_data->UserPtr;
+                                                                /*  Write User name to response body.                   */
+             result     = AppREST_JSON_WrUserToBuf(p_user, p_buf, buf_len, p_conn->BufLen, p_buf_len_used);
+             if (result != HTTPs_REST_HOOK_STATE_CONTINUE) {
+                 return (result);
+             }
+             break;
+
+
+        case HTTPs_REST_STATE_CLOSE:
+             p_app_data = (APP_REST_DATA *)*p_data;             /* Retrieve application data blk.                       */
+             p_user     = p_app_data->UserPtr;
+             if (p_user != DEF_NULL) {
+                 p_user->WrRefCtr--;                            /* Decrement the Write Reference Counter of the user.   */
+                 AppREST_ListWrRefCtr--;                        /* Decrement the Write Reference Counter of the list.   */
+             }
+             p_app_data->UserPtr = DEF_NULL;
+                                                                /* Free the application data blk.                       */
+             AppREST_RemoveDataBlk(p_app_data);
+            *p_data = DEF_NULL;
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       AppREST_DeleteUserHook()
+*
+* Description : Hook function that will be called when DELETE request is received with the "/users/{user_id}" URI.
+*               This function, will simply remove the user specified by the user id of the URI from the list.
+*
+* Argument(s) : p_resource      Pointer to REST resource.
+*
+*               p_uri           Pointer to the REST URI of the resource.
+*
+*               state           REST State :
+*                                   HTTPs_REST_STATE_INIT:  Bound to the initialize hook of the HTTP server (OnInstanceInitHook).
+*                                   HTTPs_REST_STATE_RX:    Bound to the RX hook of the HTTP server (OnReqBodyRxHook).
+*                                   HTTPs_REST_STATE_TX:    Bound to the ready hook (OnReqRdySignalHook) and the TX chunk hook (OnRespChunkHook).
+*                                   HTTPs_REST_STATE_CLOSE: Bound to the 'OnTransCompleteHook' and 'OnConnCloseHook'.
+*                                   HTTPs_REST_STATE_ERROR: Should not occur.
+*
+*               p_data          Pointer to the connection application data pointer.
+*
+*               p_instance      Pointer to the HTTP server instance object.
+*
+*               p_conn          Pointer to the HTTP connection object.
+*
+*               p_buf           Pointer to the connection buffer to read/write data.
+*
+*               buf_len         RX state: Data length available to be read.
+*                               TX state: Buffer length available to write.
+*
+*               p_buf_len_used  RX state: Must be updated by the hook to indicate the length of the data read by the app.
+*                               TX state: Must be updated by the hook to indicate the length of the data written by the app.
+*
+* Return(s)   : REST hook state:
+*
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : HTTP server core.
+*
+* Note(s)     : (1) If the user specify by the user ID of the URL is not found a 404 (Not Found) status code
+*                   will be send back.
+*
+*               (2) If the user is already used by another transaction, a 409 (Conflict) status code will
+*                   be send back.
+*
+*               (3) If the delete is successful, a 204 (No Content) status code will be send back.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_DeleteUserHook (const  HTTPs_REST_RESOURCE      *p_resource,
+                                                       const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                       const  HTTPs_REST_STATE          state,
+                                                              void                    **p_data,
+                                                       const  HTTPs_INSTANCE           *p_instance,
+                                                              HTTPs_CONN               *p_conn,
+                                                              void                     *p_buf,
+                                                       const  CPU_SIZE_T                buf_len,
+                                                              CPU_SIZE_T               *p_buf_len_used)
+{
+    APP_REST_DATA  *p_app_data;
+    APP_REST_USER  *p_user;
+    CPU_INT08U      user_id = DEF_INT_08U_MAX_VAL;
+    HTTPs_ERR       err_https;
+
+
+    switch (state) {
+        case HTTPs_REST_STATE_INIT:
+                                                                /* Get application data blk for the transaction.        */
+             p_app_data = AppREST_GetDataBlk();
+             if (p_app_data == DEF_NULL) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+            *p_data = (void *)p_app_data;
+                                                                /* Retrieve User ID from Rx URI.                        */
+             if (p_uri->WildCardsNbr > 0) {
+                 user_id = Str_ParseNbr_Int32U(p_uri->WildCards[0].ValPtr,
+                                               DEF_NULL,
+                                               10);
+             }
+                                                                /* Retrieve User with user ID.                          */
+             p_user = AppREST_FindUser(user_id);
+             if (p_user == DEF_NULL) {
+                 p_conn->StatusCode = HTTP_STATUS_NOT_FOUND;
+                 HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err_https);
+                 if (err_https != HTTPs_ERR_NONE) {
+                     return (HTTPs_REST_HOOK_STATE_ERROR);
+                 }
+                 return(HTTPs_REST_HOOK_STATE_CONTINUE);
+             }
+                                                                /* Check if the user is already reference elsewhere.    */
+             if ((AppREST_ListRdRefCtr != 0) ||
+                 (p_user->WrRefCtr     != 0) ||
+                 (p_user->RdRefCtr     != 0)) {
+                 p_conn->StatusCode  = HTTP_STATUS_CONFLICT;
+                 HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err_https);
+                 if (err_https != HTTPs_ERR_NONE) {
+                     return (HTTPs_REST_HOOK_STATE_ERROR);
+                 }
+                 return (HTTPs_REST_HOOK_STATE_CONTINUE);
+             }
+                                                                /* Remove User from list.                               */
+             AppREST_RemoveUser(p_user);
+             AppREST_UserCtr--;
+                                                                /* Set Response body parameters to no body.             */
+             HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err_https);
+             if (err_https != HTTPs_ERR_NONE) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+             if (err_https != HTTPs_ERR_NONE) {
+                 return (HTTPs_REST_HOOK_STATE_ERROR);
+             }
+             p_conn->StatusCode = HTTP_STATUS_NO_CONTENT;
+             break;
+
+
+        case HTTPs_REST_STATE_RX:
+             /* Nothing to do. It's a DELETE request with no body.  */
+             break;
+
+
+        case HTTPs_REST_STATE_TX:
+             /* Nothing to do. The response will not have a body.   */
+             break;
+
+
+        case HTTPs_REST_STATE_CLOSE:
+                                                                /* Free the application data blk.                       */
+             p_app_data          = (APP_REST_DATA *)*p_data;
+             p_app_data->UserPtr = DEF_NULL;
+             AppREST_RemoveDataBlk(p_app_data);
+            *p_data = DEF_NULL;
+             break;
+
+
+        default:
+             break;
+    }
+
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    AppREST_JSON_GetUserFieldSize()
+*
+* Description : Calculate the necessary buffer size to write a User Field from the user list for a
+*               specific user.
+*
+* Argument(s) : p_user     Pointer to the user object.
+*
+* Return(s)   : size of data to write.
+*
+* Caller(s)   : AppREST_GetUserListHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_SIZE_T  AppREST_JSON_GetUserFieldSize (APP_REST_USER  *p_user)
+{
+    CPU_SIZE_T  char_nbr;
+    CPU_SIZE_T  tot_size = 0;
+
+
+                                                                /* Size of all JSON specific characters { } , : "       */
+    tot_size +=   APP_REST_JSON_OBJ_CHARS_NBR
+                + APP_REST_JSON_FIELD_MAX_CHARS_NBR * 3
+                + APP_REST_JSON_FIELD_MIN_CHARS_NBR;
+
+                                                                /* Size of all the field keys.                          */
+    tot_size += sizeof(APP_REST_JSON_KEY_ID_STR_NAME)         +
+                sizeof(APP_REST_JSON_KEY_FIRST_NAME_STR_NAME) +
+                sizeof(APP_REST_JSON_KEY_LAST_NAME_STR_NAME)  +
+                sizeof(APP_REST_JSON_KEY_LINK_STR_NAME);
+
+                                                                /* Size of all the field values.                        */
+    tot_size +=   Str_Len_N(p_user->FirstName, APP_REST_FIRST_NAME_STR_MAX_LEN)
+                + Str_Len_N(p_user->LastName, APP_REST_LAST_NAME_STR_MAX_LEN)
+                + Str_Len_N(p_user->Link, APP_REST_LINK_STR_MAX_LEN);
+
+    char_nbr = AppREST_GetStrLenOfIntDec(p_user->ID);
+    Str_FmtNbr_Int32U(p_user->ID, char_nbr, 10, '\0', DEF_NO, DEF_YES, AppREST_UserID_Str);
+    tot_size += Str_Len_N(AppREST_UserID_Str, char_nbr);
+
+    return (tot_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    AppREST_JSON_GetUserInfoSize()
+*
+* Description : Calculate the necessary buffer size to write user info fields for a specific user.
+*
+* Argument(s) : p_user     Pointer to the user object.
+*
+* Return(s)   : size of data to write.
+*
+* Caller(s)   : AppREST_GetUserInfoHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_SIZE_T  AppREST_JSON_GetUserInfoSize (APP_REST_USER  *p_user)
+{
+    CPU_CHAR    str[APP_REST_AGE_STR_MAX_LEN];
+    CPU_SIZE_T  char_nbr;
+    CPU_SIZE_T  tot_size = 0;
+
+
+                                                                /* Size of all JSON specific characters { } , : "       */
+    tot_size += APP_REST_JSON_OBJ_CHARS_NBR
+              + APP_REST_JSON_FIELD_MAX_CHARS_NBR * 5
+              + APP_REST_JSON_FIELD_MIN_CHARS_NBR;
+
+                                                                /* Size of all the field keys.                          */
+    tot_size += sizeof(APP_REST_JSON_KEY_ID_STR_NAME)
+              + sizeof(APP_REST_JSON_KEY_FIRST_NAME_STR_NAME)
+              + sizeof(APP_REST_JSON_KEY_LAST_NAME_STR_NAME)
+              + sizeof(APP_REST_JSON_KEY_GENDER_STR_NAME)
+              + sizeof(APP_REST_JSON_KEY_AGE_STR_NAME)
+              + sizeof(APP_REST_JSON_KEY_JOB_STR_NAME);
+
+                                                                /* Size of all the field values.                        */
+    tot_size += Str_Len_N(p_user->FirstName, APP_REST_FIRST_NAME_STR_MAX_LEN)
+              + Str_Len_N(p_user->LastName, APP_REST_LAST_NAME_STR_MAX_LEN)
+              + Str_Len_N(p_user->Gender, APP_REST_GENDER_STR_MAX_LEN)
+              + Str_Len_N(p_user->JobTitle, APP_REST_JOB_TITLE_STR_MAX_LEN);
+
+    char_nbr = AppREST_GetStrLenOfIntDec(p_user->ID);
+    Str_FmtNbr_Int32U(p_user->ID, char_nbr, 10, '\0', DEF_NO, DEF_YES, AppREST_UserID_Str);
+    tot_size += Str_Len_N(AppREST_UserID_Str, char_nbr);
+
+    Str_FmtNbr_Int32U(p_user->Age, APP_REST_AGE_STR_MAX_LEN, 10, '\0', DEF_NO, DEF_YES, &str[0]);
+    tot_size += Str_Len_N(&str[0], APP_REST_AGE_STR_MAX_LEN);
+
+    return (tot_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      AppREST_JSON_WrUserToBuf()
+*
+* Description : Write JSON response with the following user fields : user ID, first name, last name and link.
+*
+* Argument(s) : p_user          Pointer to user object.
+*
+*               p_buf           Pointer to connection buffer where to write data.
+*
+*               buf_len         Length available in buffer to write data.
+*
+*               buf_len_max     The maximum size of the connection buffer.
+*
+*               p_buf_len_used  Variable that will received the length of data written to the buffer.
+*
+* Return(s)   : REST hook state:
+*
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : AppREST_CreateUserHook(),
+*               AppREST_JSON_WrUserListToBuf(),
+*               AppREST_SetUserInfoHook().
+*
+* Note(s)     : (1) The connection buffer must be enough big to fit all the fields of one user.
+*                   Else the process will fail.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_JSON_WrUserToBuf (       APP_REST_USER  *p_user,
+                                                                void           *p_buf,
+                                                         const  CPU_SIZE_T      buf_len,
+                                                         const  CPU_SIZE_T      buf_len_max,
+                                                                CPU_SIZE_T     *p_buf_len_used)
+{
+    CPU_CHAR       *p_str;
+    CPU_SIZE_T      char_nbr;
+    CPU_SIZE_T      data_len = 0;
+
+
+    p_str = p_buf;
+
+                                                                /* Calculate the data length to write.                  */
+    data_len = AppREST_JSON_GetUserFieldSize(p_user);
+
+    if (data_len > buf_len_max) {
+        return (HTTPs_REST_HOOK_STATE_ERROR);                   /* The configured buffer size is not enough.            */
+    }
+    if (data_len > buf_len) {
+        return (HTTPs_REST_HOOK_STATE_STAY);                    /* not enough space in the buffer, so try next time.    */
+    }
+
+                                                                /* Write JSON data to buffer.                           */
+    char_nbr = AppREST_GetStrLenOfIntDec(p_user->ID);
+    Str_FmtNbr_Int32U(p_user->ID, char_nbr, 10, '\0', DEF_NO, DEF_YES, AppREST_UserID_Str);
+    Str_Copy(p_str, "{\"User ID\": \"");
+    Str_Cat(p_str, AppREST_UserID_Str);
+    Str_Cat(p_str, "\", \"First Name\": \"");
+    Str_Cat(p_str, p_user->FirstName);
+    Str_Cat(p_str, "\", \"Last Name\": \"");
+    Str_Cat(p_str, p_user->LastName);
+    Str_Cat(p_str, "\", \"Link\":\"");
+    Str_Cat(p_str, p_user->Link);
+    Str_Cat(p_str, "\"}");
+
+   *p_buf_len_used = Str_Len_N(p_str, buf_len);
+
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+/*
+*********************************************************************************************************
+*                                    AppREST_JSON_WrUserListToBuf()
+*
+* Description : Write the JSON user list to the connection buffer.
+*
+* Argument(s) : p_app_data      Pointer to application data object for the current transaction.
+*
+*               p_buf           Pointer to connection buffer where to write data.
+*
+*               buf_len         Length available in buffer to write data.
+*
+*               buf_len_max     The maximum size of the connection buffer.
+*
+*               p_buf_len_used  Variable that will received the length of data written to the buffer.
+*
+* Return(s)   : REST hook state:
+*
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : AppREST_GetUserListHook().
+*
+* Note(s)     : (1) The connection buffer must be enough big to fit all the fields of one user.
+*                   Else the process will fail.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_JSON_WrUserListToBuf (       APP_REST_DATA  *p_app_data,
+                                                                    void           *p_buf,
+                                                             const  CPU_SIZE_T      buf_len,
+                                                             const  CPU_SIZE_T      buf_len_max,
+                                                                    CPU_SIZE_T     *p_buf_len_used)
+{
+    APP_REST_USER          *p_user;
+    CPU_CHAR               *p_str;
+    HTTPs_REST_HOOK_STATE   state;
+    CPU_SIZE_T              buf_len_rem;
+
+
+    p_str       = p_buf;
+    buf_len_rem = buf_len;
+
+                                                                /* Write start of JSON list if not already done.        */
+    if (p_app_data->UserPtr == DEF_NULL) {
+        if (sizeof(APP_REST_JSON_LIST_USER_START_STR) > buf_len) {
+            return (HTTPs_REST_HOOK_STATE_STAY);
+        }
+        Str_Copy(p_str, APP_REST_JSON_LIST_USER_START_STR);
+        p_str  += Str_Len(p_str);
+        p_user  = AppREST_UserFirstPtr;
+    } else {
+        p_user = p_app_data->UserPtr;
+    }
+
+                                                                /* Write all users of list until buffer is full.        */
+    while (p_user != DEF_NULL) {
+
+                                                                /* Write user fields to buffer.                         */
+        state = AppREST_JSON_WrUserToBuf(p_user, p_str, buf_len_rem, buf_len_max, p_buf_len_used);
+        switch (state) {
+            case HTTPs_REST_HOOK_STATE_CONTINUE:
+                 break;
+
+            case HTTPs_REST_HOOK_STATE_STAY:                    /* Buffer is full, save the index user for next time.   */
+                 p_app_data->UserPtr = p_user;
+                *p_buf_len_used      = p_str - (CPU_CHAR* )p_buf;
+                 return (state);
+
+            case HTTPs_REST_HOOK_STATE_ERROR:
+            default:
+                 return (state);
+        }
+
+        if (p_user != AppREST_UserLastPtr) {                    /* Write comma if user is not the last of the list.     */
+            Str_Cat(p_str, ",");
+            p_str++;
+        }
+
+        p_str       += *p_buf_len_used;
+        buf_len_rem -= *p_buf_len_used;
+
+        p_user = p_user->NextPtr;
+    }
+
+    Str_Cat(p_str, "]}");                                       /* Write end of table list in JSON.                     */
+    p_str += 2;
+    p_app_data->UserPtr = DEF_NULL;
+   *p_buf_len_used      = (p_str - (CPU_CHAR* )p_buf);
+
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    AppREST_JSON_WrUserInfoToBuf()
+*
+* Description : Write the JSON with the user info fields.
+*
+* Argument(s) : p_user          Pointer to user object.
+*
+*               p_buf           Pointer to connection buffer where to write data.
+*
+*               buf_len         Length available in buffer to write data.
+*
+*               buf_len_max     The maximum size of the connection buffer.
+*
+*               p_buf_len_used  Variable that will received the length of data written to the buffer.
+*
+* Return(s)   : REST hook state:
+*
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : AppREST_GetUserInfoHook().
+*
+* Note(s)     : (1) The connection buffer must be enough big to fit all the info fields of the user.
+*                   Else the process will fail.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_JSON_WrUserInfoToBuf (       APP_REST_USER  *p_user,
+                                                                    void           *p_buf,
+                                                             const  CPU_SIZE_T      buf_len,
+                                                             const  CPU_SIZE_T      buf_len_max,
+                                                                    CPU_SIZE_T     *p_buf_len_used)
+{
+    CPU_CHAR    *p_str;
+    CPU_CHAR     str[3];
+    CPU_SIZE_T   data_len = 0;
+    CPU_SIZE_T   char_nbr;
+
+
+    p_str = p_buf;
+
+                                                                /* Calculate data length to write.                      */
+    data_len = AppREST_JSON_GetUserInfoSize(p_user);
+    if (data_len > buf_len_max) {
+        return (HTTPs_REST_HOOK_STATE_ERROR);
+    }
+    if (data_len > buf_len) {
+       *p_buf_len_used = 0;
+        return (HTTPs_REST_HOOK_STATE_STAY);
+    }
+
+                                                                /* Write JSON data with User Info to the buffer.        */
+    Str_Copy(p_str, "{\"User ID\": \"");
+    char_nbr = AppREST_GetStrLenOfIntDec(p_user->ID);
+    Str_FmtNbr_Int32U(p_user->ID, char_nbr, 10, '\0', DEF_NO, DEF_YES, AppREST_UserID_Str);
+    Str_Cat(p_str, AppREST_UserID_Str);
+    Str_Cat(p_str, "\", \"First Name\": \"");
+    Str_Cat(p_str, p_user->FirstName);
+    Str_Cat(p_str, "\", \"Last Name\": \"");
+    Str_Cat(p_str, p_user->LastName);
+    Str_Cat(p_str, "\", \"Gender\": \"");
+    Str_Cat(p_str, p_user->Gender);
+    Str_Cat(p_str, "\", \"Age\": \"");
+    if (p_user->Age != 0) {
+        Str_FmtNbr_Int32U(p_user->Age, APP_REST_AGE_STR_MAX_LEN, 10, '\0', DEF_NO, DEF_YES, &str[0]);
+        Str_Cat(p_str, &str[0]);
+    }
+    Str_Cat(p_str, "\", \"Job Title\": \"");
+    Str_Cat(p_str, p_user->JobTitle);
+    Str_Cat(p_str, "\"}");
+
+   *p_buf_len_used = Str_Len(p_str);
+
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       AppREST_JSON_ParseUser()
+*
+* Description : Parse JSON data to retrieve the new user first name and last name.
+*
+* Argument(s) : p_app_data      Pointer to application data block.
+*
+*               p_user          Pointer to user object.
+*
+*               p_uri           Pointer to REST URI received in the request.
+*
+*               p_buf           Pointer to the connection buffer with the received data.
+*
+*               data_len        Length of the data received inside the buffer.
+*
+*               buf_len_max     Maximum size of the connection buffer.
+*
+*               p_buf_len_used  Variable that will received the length of the data read.
+*
+* Return(s)   : REST hook state:
+*
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : AppREST_CreateUserHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_JSON_ParseUser (       APP_REST_DATA            *p_app_data,
+                                                              APP_REST_USER            *p_user,
+                                                       const  HTTPs_REST_MATCHED_URI   *p_uri,
+                                                              void                     *p_buf,
+                                                       const  CPU_SIZE_T                data_len,
+                                                       const  CPU_SIZE_T                buf_len_max,
+                                                              CPU_SIZE_T               *p_buf_len_used)
+{
+    CPU_CHAR              *p_str_val;
+    APP_REST_USER_FIELD    field_type;
+    HTTPs_REST_HOOK_STATE  state;
+    CPU_SIZE_T             str_len;
+    CPU_SIZE_T             val_len;
+    CPU_SIZE_T             min_len;
+    CPU_SIZE_T             char_nbr;
+    CPU_SIZE_T             data_rd_len = 0;
+
+
+   *p_buf_len_used = 0;
+                                                                /* ------- PARSE RECEIVED JSON TO RETRIEVE USER ------- */
+    field_type = p_app_data->FieldType;
+    while (field_type <= APP_REST_USER_FIELD_LAST_NAME) {
+        state = AppREST_JSON_ParseField(field_type,
+                                       &p_str_val,
+                                       &val_len,
+                                        p_buf,
+                                        data_len,
+                                        buf_len_max,
+                                       &data_rd_len);
+        if (state != HTTPs_REST_HOOK_STATE_CONTINUE) {
+            p_app_data->FieldType = field_type;
+            return (state);
+        }
+
+        switch (field_type) {
+            case APP_REST_USER_FIELD_FIRST_NAME:
+                 min_len = DEF_MIN(val_len, (APP_REST_FIRST_NAME_STR_MAX_LEN - 1));
+                 Str_Copy_N(p_user->FirstName, p_str_val, min_len);
+                 Str_Copy(p_user->FirstName + min_len, "\0");
+                 break;
+
+            case APP_REST_USER_FIELD_LAST_NAME:
+                 min_len = DEF_MIN(val_len, (APP_REST_LAST_NAME_STR_MAX_LEN - 1));
+                 Str_Copy_N(p_user->LastName, p_str_val, min_len);
+                 Str_Copy(p_user->LastName + min_len, "\0");
+                 break;
+
+            case APP_REST_USER_FIELD_GENDER:
+            case APP_REST_USER_FIELD_AGE:
+            case APP_REST_USER_FIELD_JOB:
+            default:
+                 break;
+        }
+
+       *p_buf_len_used += data_rd_len;
+
+        field_type++;
+    }
+
+    Str_Copy_N(p_user->Link, p_uri->ParsedURI.PathPtr, APP_REST_LINK_STR_MAX_LEN);
+    Str_Cat_N(p_user->Link, "/", APP_REST_LINK_STR_MAX_LEN);
+    str_len = Str_Len_N(p_user->Link, APP_REST_LINK_STR_MAX_LEN);
+    char_nbr = AppREST_GetStrLenOfIntDec(p_user->ID);
+    Str_FmtNbr_Int32U(p_user->ID, char_nbr, 10, '\0', DEF_NO, DEF_YES, p_user->Link + str_len);
+
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppREST_JSON_ParseUserInfo()
+*
+* Description : Parse JSON data to retrieve the user new info.
+*
+* Argument(s) : p_app_data      Pointer to application data block.
+*
+*               p_user          Pointer to user object.
+*
+*               p_buf           Pointer to the connection buffer with the received data.
+*
+*               data_len        Length of the data received inside the buffer.
+*
+*               buf_len_max     Maximum size of the connection buffer.
+*
+*               p_buf_len_used  Variable that will received the length of the data read.
+*
+* Return(s)   : REST hook state:
+*
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : AppREST_SetUserInfoHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_JSON_ParseUserInfo (       APP_REST_DATA  *p_app_data,
+                                                                  APP_REST_USER  *p_user,
+                                                                  void           *p_buf,
+                                                           const  CPU_SIZE_T      data_len,
+                                                           const  CPU_SIZE_T      buf_len_max,
+                                                                  CPU_SIZE_T     *p_buf_len_used)
+{
+    CPU_CHAR              *p_str_val;
+    APP_REST_USER_FIELD    field_type;
+    HTTPs_REST_HOOK_STATE  state;
+    CPU_SIZE_T             val_len;
+    CPU_SIZE_T             min_len;
+    CPU_SIZE_T             data_rd_len = 0;
+
+
+   *p_buf_len_used = 0;
+                                                                /* ----- PARSE RECEIVED JSON TO RETRIEVE USER INFO ---- */
+    field_type = p_app_data->FieldType;
+    while (field_type <= APP_REST_USER_FIELD_JOB) {
+        state = AppREST_JSON_ParseField(field_type,
+                                       &p_str_val,
+                                       &val_len,
+                                        p_buf,
+                                        data_len,
+                                        buf_len_max,
+                                       &data_rd_len);
+        if (state != HTTPs_REST_HOOK_STATE_CONTINUE) {
+            p_app_data->FieldType = field_type;
+            return (state);
+        }
+
+        switch (field_type) {
+            case APP_REST_USER_FIELD_FIRST_NAME:
+                 min_len = DEF_MIN(val_len, (APP_REST_FIRST_NAME_STR_MAX_LEN - 1));
+                 Str_Copy_N(p_user->FirstName, p_str_val, min_len);
+                 Str_Copy(p_user->FirstName + min_len, "\0");
+                 break;
+
+            case APP_REST_USER_FIELD_LAST_NAME:
+                 min_len = DEF_MIN(val_len, (APP_REST_LAST_NAME_STR_MAX_LEN - 1));
+                 Str_Copy_N(p_user->LastName, p_str_val, min_len);
+                 Str_Copy(p_user->LastName + min_len, "\0");
+                 break;
+
+            case APP_REST_USER_FIELD_GENDER:
+                 min_len = DEF_MIN(val_len, (APP_REST_GENDER_STR_MAX_LEN - 1));
+                 Str_Copy_N(p_user->Gender, p_str_val, min_len);
+                 Str_Copy(p_user->Gender + min_len, "\0");
+                 break;
+
+            case APP_REST_USER_FIELD_AGE:
+                 p_user->Age = Str_ParseNbr_Int32U(p_str_val, DEF_NULL, 10);
+                 break;
+
+            case APP_REST_USER_FIELD_JOB:
+                 min_len = DEF_MIN(val_len, (APP_REST_JOB_TITLE_STR_MAX_LEN - 1));
+                 Str_Copy_N(p_user->JobTitle, p_str_val, min_len);
+                 Str_Copy(p_user->JobTitle + min_len, "\0");
+                 break;
+
+            default:
+                 break;
+        }
+
+       *p_buf_len_used = data_rd_len;
+        field_type++;
+    }
+
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       AppREST_JSON_ParseField()
+*
+* Description : Parse a JSON to retrieve the value of a given user field.
+*
+* Argument(s) : field_type      User field type to look for in the JSON:
+*                                   APP_REST_USER_FIELD_ID
+*                                   APP_REST_USER_FIELD_LINK
+*                                   APP_REST_USER_FIELD_FIRST_NAME
+*                                   APP_REST_USER_FIELD_lAST_NAME
+*                                   APP_REST_USER_FIELD_GENDER
+*                                   APP_REST_USER_FIELD_AGE
+*                                   APP_REST_USER_FIELD_JOB
+*
+*               p_val_found     Variable that will received the pointer to the value found.
+*
+*               p_val_len       Length of the value found.
+*
+*               p_buf           Pointer to the connection buffer with the received data.
+*
+*               data_len        Length of the data received inside the buffer.
+*
+*               buf_len_max     Maximum size of the connection buffer.
+*
+*               p_buf_len_used  Variable that will received the length of the data read.
+*
+* Return(s)   : REST hook state:
+*
+*                   HTTPs_REST_HOOK_STATE_CONTINUE, to continue the transaction processing.
+*                   HTTPs_REST_HOOK_STATE_STAY,     to fall back at the same stage the next time the hook is called.
+*                   HTTPs_REST_HOOK_STATE_ERROR,    when an error occurred in the hook processing.
+*
+* Caller(s)   : AppREST_JSON_ParseUser(),
+*               AppREST_JSON_ParseUserInfo().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  HTTPs_REST_HOOK_STATE  AppREST_JSON_ParseField (       APP_REST_USER_FIELD    field_type,
+                                                               CPU_CHAR             **p_val_found,
+                                                               CPU_SIZE_T            *p_val_len,
+                                                               void                  *p_buf,
+                                                        const  CPU_SIZE_T             data_len,
+                                                        const  CPU_SIZE_T             buf_len_max,
+                                                               CPU_SIZE_T            *p_buf_len_used)
+{
+    CPU_CHAR    *p_str;
+    CPU_CHAR    *p_str_tmp;
+    CPU_CHAR    *p_field_name;
+    CPU_SIZE_T   field_max_len;
+    CPU_SIZE_T   data_len_max;
+    CPU_SIZE_T   str_len;
+
+
+    switch (field_type) {
+        case APP_REST_USER_FIELD_ID:
+             p_field_name  = APP_REST_JSON_KEY_ID_STR_NAME;
+             field_max_len = 3;
+             break;
+
+        case APP_REST_USER_FIELD_LINK:
+             p_field_name  = APP_REST_JSON_KEY_LINK_STR_NAME;
+             field_max_len = APP_REST_LINK_STR_MAX_LEN;
+             break;
+
+        case APP_REST_USER_FIELD_FIRST_NAME:
+             p_field_name  = APP_REST_JSON_KEY_FIRST_NAME_STR_NAME;
+             field_max_len = APP_REST_FIRST_NAME_STR_MAX_LEN;
+             break;
+
+        case APP_REST_USER_FIELD_LAST_NAME:
+             p_field_name  = APP_REST_JSON_KEY_LAST_NAME_STR_NAME;
+             field_max_len = APP_REST_LAST_NAME_STR_MAX_LEN;
+             break;
+
+        case APP_REST_USER_FIELD_GENDER:
+             p_field_name  = APP_REST_JSON_KEY_GENDER_STR_NAME;
+             field_max_len = 7;
+             break;
+
+        case APP_REST_USER_FIELD_AGE:
+             p_field_name  = APP_REST_JSON_KEY_AGE_STR_NAME;
+             field_max_len = 3;
+             break;
+
+        case APP_REST_USER_FIELD_JOB:
+             p_field_name  = APP_REST_JSON_KEY_JOB_STR_NAME;
+             field_max_len = APP_REST_JOB_TITLE_STR_MAX_LEN;
+             break;
+
+        default:
+            goto exit_error;
+    }
+
+    data_len_max = APP_REST_JSON_FIELD_MAX_CHARS_NBR +
+                   sizeof(p_field_name)              +
+                   field_max_len;
+
+    if (data_len_max > buf_len_max) {
+        goto exit_error;
+    }
+
+    p_str   = p_buf;
+    str_len = Str_Len_N(p_str, data_len);
+
+                                                                /* Found field key.                                     */
+    p_str_tmp = Str_Str_N(p_str, p_field_name, str_len);
+    if (p_str_tmp == DEF_NULL) {
+        goto exit_stay;
+    }
+    str_len -= p_str_tmp - p_str;
+    p_str    = p_str_tmp;
+                                                                /* Found " char to found end of field key.              */
+    p_str_tmp = Str_Char_N(p_str, str_len, ASCII_CHAR_QUOTATION_MARK);
+    if (p_str_tmp == DEF_NULL) {
+        goto exit_stay;
+    }
+    str_len -= p_str_tmp - p_str;
+    if (str_len <= 0) {
+        goto exit_stay;
+    }
+    p_str_tmp++;
+    str_len--;
+    p_str = p_str_tmp;
+                                                                /* Found " char to found start of field value.          */
+    p_str_tmp = Str_Char_N(p_str, str_len, ASCII_CHAR_QUOTATION_MARK);
+    if (p_str_tmp == DEF_NULL) {
+        goto exit_stay;
+    }
+    str_len -= p_str_tmp - p_str;
+    if (str_len <= 0) {
+        goto exit_stay;
+    }
+    p_str_tmp++;
+    str_len--;
+    p_str = p_str_tmp;
+                                                                /* Found " char to found end of field value.            */
+    p_str_tmp = Str_Char_N(p_str, str_len, ASCII_CHAR_QUOTATION_MARK);
+    if (p_str_tmp == DEF_NULL) {
+        goto exit_stay;
+    }
+    str_len -= p_str_tmp - p_str;
+
+   *p_val_found = p_str;
+   *p_val_len = p_str_tmp - p_str;
+
+    goto exit_continue;
+
+
+exit_error:
+    return (HTTPs_REST_HOOK_STATE_ERROR);
+
+exit_stay:
+   *p_buf_len_used = 0;
+    return (HTTPs_REST_HOOK_STATE_STAY);
+
+exit_continue:
+   *p_buf_len_used = data_len - str_len;
+    return (HTTPs_REST_HOOK_STATE_CONTINUE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          AppREST_FindUser()
+*
+* Description : Find an already existing user in the user list based on the given user ID.
+*
+* Argument(s) : user_id     User ID of the user to look for.
+*
+* Return(s)   : Pointer to the user object found.
+*               DEF_NULL, if no user is found.
+*
+* Caller(s)   : AppREST_DeleteUserHook(),
+*               AppREST_GetUserInfoHook(),
+*               AppREST_SetUserInfoHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  APP_REST_USER  *AppREST_FindUser (CPU_INT08U  user_id)
+{
+    APP_REST_USER  *p_user;
+
+
+    p_user = AppREST_UserFirstPtr;
+    while (p_user != DEF_NULL) {
+
+        if (p_user->ID == user_id) {
+            break;
+        }
+        p_user = p_user->NextPtr;
+    }
+
+    return (p_user);
+}
+
+/*
+*********************************************************************************************************
+*                                           AppREST_GetUser()
+*
+* Description : Get a user object from the user pool and add it to the user list.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Pointer to the user object retrieved.
+*               DEF_NULL, if no block available or in case of an error.
+*
+* Caller(s)   : AppREST_CreateUserHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  APP_REST_USER  *AppREST_GetUser (void)
+{
+    APP_REST_USER  *p_user;
+    LIB_ERR         err_lib;
+
+
+    p_user = (APP_REST_USER *)Mem_DynPoolBlkGet(&AppREST_UserPool,
+                                                &err_lib);
+    if (p_user == DEF_NULL) {
+        return (DEF_NULL);
+    }
+
+    if (AppREST_UserFirstPtr == DEF_NULL) {
+        p_user->PrevPtr = DEF_NULL;
+        p_user->NextPtr = DEF_NULL;
+        AppREST_UserFirstPtr = p_user;
+        AppREST_UserLastPtr = p_user;
+    } else {
+        p_user->NextPtr = DEF_NULL;
+        p_user->PrevPtr = AppREST_UserLastPtr;
+        AppREST_UserLastPtr->NextPtr = p_user;
+        AppREST_UserLastPtr = p_user;
+    }
+
+    p_user->ID       = AppREST_GetUserID();
+    p_user->Age      = 0;
+    Str_Copy_N(p_user->FirstName, "", APP_REST_FIRST_NAME_STR_MAX_LEN);
+    Str_Copy_N(p_user->LastName, "", APP_REST_LAST_NAME_STR_MAX_LEN);
+    Str_Copy_N(p_user->Gender, "", APP_REST_GENDER_STR_MAX_LEN);
+    Str_Copy_N(p_user->JobTitle, "", APP_REST_JOB_TITLE_STR_MAX_LEN);
+    p_user->RdRefCtr = 0;
+    p_user->WrRefCtr = 0;
+
+    (void)&err_lib;
+
+    return (p_user);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         AppREST_RemoveUser()
+*
+* Description : Remove a user object from the user list and free it to the user pool.
+*
+* Argument(s) : p_user  Pointer to the user object to remove and free.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AppREST_DeleteUserHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppREST_RemoveUser (APP_REST_USER  *p_user)
+{
+    LIB_ERR  err_lib;
+
+
+    if (AppREST_UserFirstPtr == DEF_NULL) {
+        return;
+    }
+
+    if (p_user == AppREST_UserFirstPtr) {
+
+        if (p_user->NextPtr != DEF_NULL) {
+            AppREST_UserFirstPtr          = p_user->NextPtr;
+            AppREST_UserFirstPtr->PrevPtr = DEF_NULL;
+            p_user->NextPtr               = DEF_NULL;
+        } else {
+            AppREST_UserFirstPtr = DEF_NULL;
+            AppREST_UserLastPtr  = DEF_NULL;
+        }
+    } else if (p_user == AppREST_UserLastPtr) {
+        AppREST_UserLastPtr          = p_user->PrevPtr;
+        AppREST_UserLastPtr->NextPtr = DEF_NULL;
+        p_user->PrevPtr              = DEF_NULL;
+    } else {
+        (p_user->PrevPtr)->NextPtr = p_user->NextPtr;
+        (p_user->NextPtr)->PrevPtr = p_user->PrevPtr;
+         p_user->NextPtr           = DEF_NULL;
+         p_user->PrevPtr           = DEF_NULL;
+    }
+
+    (void)AppREST_GetFreeUserID(p_user->ID);
+
+    Mem_DynPoolBlkFree(&AppREST_UserPool,
+                        p_user,
+                       &err_lib);
+
+    (void)&err_lib;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          AppREST_GetUserID()
+*
+* Description : Get a new user ID from the free user ID list or create a new ID.
+*
+* Argument(s) : none.
+*
+* Return(s)   : The new user ID number.
+*
+* Caller(s)   : AppREST_GetUser().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  AppREST_GetUserID (void)
+{
+    CPU_INT08U  user_id;
+
+    if (AppREST_FreeUserID_ListPtr != DEF_NULL) {
+        user_id = AppREST_FreeUserID_ListPtr->ID;
+        AppREST_RemoveFreeUserID();
+    } else {
+        user_id = AppREST_UserCtr + 1;
+    }
+
+    return (user_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        AppREST_GetFreeUserID()
+*
+* Description : Get from the pool a free user ID object.
+*
+* Argument(s) : user_id     User ID number.
+*
+* Return(s)   : Pointer to the free user ID object.
+*
+* Caller(s)   : AppREST_RemoveUser().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  APP_REST_FREE_USER_ID  *AppREST_GetFreeUserID (CPU_INT08U  user_id)
+{
+    APP_REST_FREE_USER_ID  *p_free_user_id;
+    LIB_ERR                 err_lib;
+
+
+    p_free_user_id = (APP_REST_FREE_USER_ID *)Mem_DynPoolBlkGet(&AppREST_FreeUserID_Pool,
+                                                                &err_lib);
+    if (p_free_user_id == DEF_NULL) {
+        return (DEF_NULL);
+    }
+
+    p_free_user_id->ID = user_id;
+
+    if (AppREST_FreeUserID_ListPtr == DEF_NULL) {
+        AppREST_FreeUserID_ListPtr = p_free_user_id;
+        p_free_user_id->NextPtr    = DEF_NULL;
+    } else {
+        p_free_user_id->NextPtr    = AppREST_FreeUserID_ListPtr;
+        AppREST_FreeUserID_ListPtr = p_free_user_id;
+    }
+
+    (void)&err_lib;
+
+    return (p_free_user_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      AppREST_RemoveFreeUserID()
+*
+* Description : Remove from the free user ID list a block to put it back in the pool.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AppREST_GetUserID().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppREST_RemoveFreeUserID (void)
+{
+    APP_REST_FREE_USER_ID  *p_free_user_id;
+    LIB_ERR                 err_lib;
+
+
+    p_free_user_id             = AppREST_FreeUserID_ListPtr;
+    AppREST_FreeUserID_ListPtr = p_free_user_id->NextPtr;
+    p_free_user_id->NextPtr    = DEF_NULL;
+
+    Mem_DynPoolBlkFree(&AppREST_FreeUserID_Pool,
+                        p_free_user_id,
+                       &err_lib);
+
+    (void)&err_lib;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         AppREST_GetDataBlk()
+*
+* Description : Get an application data block from the pool.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Pointer to the retrieved application data block.
+*               DEF_NULL if no block available or in case of an error.
+*
+* Caller(s)   : AppREST_CreateUserHook(),
+*               AppREST_DeleteUserHook(),
+*               AppREST_GetUserInfoHook(),
+*               AppREST_GetUserListHook(),
+*               AppREST_SetUserInfoHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  APP_REST_DATA  *AppREST_GetDataBlk (void)
+{
+    APP_REST_DATA  *p_app_data;
+    LIB_ERR         err_lib;
+
+
+    p_app_data = (APP_REST_DATA *)Mem_DynPoolBlkGet(&AppREST_DataPool,
+                                                    &err_lib);
+    if (p_app_data == DEF_NULL) {
+        return (DEF_NULL);
+    }
+
+    if (AppREST_DataListPtr == DEF_NULL) {
+        AppREST_DataListPtr = p_app_data;
+        p_app_data->NextPtr = DEF_NULL;
+    } else {
+        p_app_data->NextPtr = AppREST_DataListPtr;
+        AppREST_DataListPtr = p_app_data;
+    }
+
+    p_app_data->UserPtr   = DEF_NULL;
+    p_app_data->FieldType = APP_REST_USER_FIELD_FIRST_NAME;
+
+    (void)&err_lib;
+
+    return (p_app_data);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        AppREST_RemoveDataBlk()
+*
+* Description : Remove an application data block from the list and put it back in the free pool.
+*
+* Argument(s) : p_app_data  Pointer to the application data block to free.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AppREST_CreateUserHook(),
+*               AppREST_DeleteUserHook(),
+*               AppREST_GetUserInfoHook(),
+*               AppREST_GetUserListHook(),
+*               AppREST_SetUserInfoHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppREST_RemoveDataBlk (APP_REST_DATA  *p_app_data)
+{
+    APP_REST_DATA  *p_item;
+    APP_REST_DATA  *p_item_prev;
+    LIB_ERR         err_lib;
+
+
+    p_item      = AppREST_DataListPtr;
+    p_item_prev = DEF_NULL;
+    while (p_item != DEF_NULL) {
+
+        if (p_app_data == AppREST_DataListPtr) {
+            AppREST_DataListPtr = p_app_data->NextPtr;
+        }
+
+        if (p_item == p_app_data) {
+            if (p_item_prev != DEF_NULL) {
+                p_item_prev->NextPtr = p_item->NextPtr;
+            }
+            p_item->NextPtr = DEF_NULL;
+            break;
+        }
+
+        p_item_prev = p_item;
+        p_item      = p_item->NextPtr;
+    }
+
+    Mem_DynPoolBlkFree(&AppREST_DataPool,
+                        p_app_data,
+                       &err_lib);
+
+    (void)&err_lib;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      AppREST_GetStrLenOfIntDec()
+*
+* Description : Get the number of decimals of a integer number.
+*
+* Argument(s) : i       Integer number.
+*
+* Return(s)   : Number of decimals.
+*
+* Caller(s)   : AppREST_JSON_GetUserFieldSize(),
+*               AppREST_JSON_GetUserInfoSize(),
+*               AppREST_JSON_ParseUser(),
+*               AppREST_JSON_WrUserInfoToBuf(),
+*               AppREST_JSON_WrUserToBuf(),
+*               AppREST_ResourcesInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_SIZE_T  AppREST_GetStrLenOfIntDec (CPU_INT32U  i)
+{
+    if(i < 10) {
+        return 1;
+    } else if(i < 100) {
+        return 2;
+    } else if(i < 1000) {
+        return 3;
+    } else if(i < 10000) {
+        return 4;
+    } else if(i < 100000) {
+        return 5;
+    } else if(i < 1000000) {
+        return 6;
+    } else if(i < 10000000) {
+        return 7;
+    } else if(i < 100000000) {
+        return 8;
+    } else {
+        return 9;
+    }
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest.h
new file mode 100644
index 0000000..665bc04
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest.h
@@ -0,0 +1,93 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*
+*                                         HTTP LOGIN APPLICATION
+*
+* Filename      : app_rest.h
+* Version       : V3.00.02
+* Programmer(s) : FG
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef APP_REST_MODULE_PRESENT
+#define APP_REST_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  HTTPs_REST_RESOURCE  AppREST_List_Resource;
+extern  HTTPs_REST_RESOURCE  AppREST_User_Resource;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppREST_Init           (void);
+
+CPU_BOOLEAN  AppREST_MemInit        (void);
+
+CPU_BOOLEAN  AppREST_ResourcesInit  (void);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* APP_REST_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest_http-s_instance_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest_http-s_instance_cfg.c
new file mode 100644
index 0000000..788811e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest_http-s_instance_cfg.c
@@ -0,0 +1,266 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+* Filename      : app_rest_http-s_instance_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 AL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) All values that are used in this file and that are defined in other header files should
+*               be included by this file. Some values could be located in the same file such as task priority
+*               and
+size. This template file assume that the following values are defined in app_cfg.h:
+*
+*                   HTTPs_OS_CFG_INSTANCE_TASK_PRIO
+*                   HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE
+*
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
+#include  "app_rest_http-s_instance_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   FILES & FOLDERS STRING DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_OS_CFG_INSTANCE_TASK_PRIO                  17
+#define  HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE             (4*1024u)
+
+#define  HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT               "\\"
+#define  HTTPs_CFG_INSTANCE_STR_FOLDER_UPLOAD             HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT
+
+#define  HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT              "/list.html"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TASK CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  NET_TASK_CFG  HTTPs_TaskCfgInstance_REST = {
+
+        HTTPs_OS_CFG_INSTANCE_TASK_PRIO,                        /* .Prio : Configure Instance Task priority.            */
+
+        HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE,                    /* .StkSizeBytes : Configure instance task size.        */
+
+        DEF_NULL                                                /* .StkPtr : Configure pointer to base of the stack.    */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if 0
+const  HTTPs_CFG_FS_NONE  HTTPs_CfgFS_None_REST = {
+
+    256,                                                        /* .PathLenMax : Maximum path length.                   */
+};
+#endif
+
+#if 1
+const  HTTPs_CFG_FS_STATIC  HTTPs_CfgFS_Static_REST = {
+
+   &HTTPs_FS_API_Static,                                        /* .FS_API_Ptr : Pointer to FS API.                     */
+};
+#endif
+
+#if 0
+const  HTTPs_CFG_FS_DYN  HTTPs_CfgFS_Dyn_REST = {
+
+   &NetFS_API_FS_V4,                                            /* .FS_API_Ptr : Pointer to FS API.                     */
+
+    HTTPs_CFG_INSTANCE_STR_FOLDER_ROOT                          /* .WorkingFolderPtr : FS working folder.               */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER RX CONFIGURATION
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_RX_CFG  HTTPs_HdrRxCfg_REST = {
+
+    15,                                                         /* .NbrPerConnMax                                       */
+
+    128,                                                        /* .DataLenMax                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                            HTTP INSTANCE SERVER CONFIGURATION STRUCTURE
+*
+* Note(s): See Template file http-s_instance_cfg.c for details on structure parameters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_CFG  HTTPs_CfgInstance_REST = {
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      INSTANCE TASK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    2u,                                                         /* .OS_TaskDly_ms : Configure instance task delay.      */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                INSTANCE LISTEN SOCKET CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    HTTPs_SOCK_SEL_IPv4_IPv6,                                   /* .SockSel : Socket type.                              */
+
+    DEF_NULL,                                                   /* .SecurePtr : Secure configuration (SSL) Pointer.     */
+
+    HTTPs_CFG_DFLT_PORT,                                        /* .Port : Server port number.                          */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE CONNECTION CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    APP_REST_HTTPs_CONN_NBR_MAX,                                /* .ConnNbrMax : Maximum number of simultaneous.        */
+
+    10,                                                         /* .ConnInactivityTimeout_s : Conn inactivity timeout.  */
+
+    1460,                                                       /* .BufLen : Connection buffer length.                  */
+
+    DEF_ENABLED,                                                /* .ConnPersistentEn : Persistent conn feature.         */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE FILE SYSTEM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    HTTPs_FS_TYPE_STATIC,                                       /* .FS_Type : File System Type.                         */
+
+   &HTTPs_CfgFS_Static_REST,                                    /* .FS_CfgPtr : File System Configuration pointer.      */
+
+    HTTPs_CFG_INSTANCE_STR_FILE_DEFAULT,                        /* .DfltResourceNamePtr : default web page.             */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE PROXY CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    128,                                                        /* .HostNameLenMax : Maximum host name length.          */
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                        HOOK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    &HTTPs_REST_HookCfg,                                        /* .HooksPtr : Pointer to Hooks' Object.                */
+
+    &HTTPs_REST_Cfg,                                            /* .Hooks_CfgPtr : Pointer to Application Data Hook.    */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     HEADER FIELD CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+   &HTTPs_HdrRxCfg_REST,                                        /* .HdrRxCfgPtr : Pointer to Request Hdr Cfg Object.    */
+
+    DEF_NULL,                                                   /* .HdrTxCfgPtr : Pointer to Response Hdr Cfg Object.   */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE QUERY STRING CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    DEF_NULL,                                                   /* .QueryStrCfgPtr : Pointer to Query String Cfg Object.*/
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE FORM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    DEF_NULL,                                                   /* .FormCfgPtr : Pointer to Form Cfg Object.            */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                               DYNAMIC TOKEN REPLACEMENT CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    DEF_NULL,                                                   /* .TokenCfgPtr : Pointer to Token Cfg Ojbect.          */
+
+};                                                              /* End of configuration structure.                      */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest_http-s_instance_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest_http-s_instance_cfg.h
new file mode 100644
index 0000000..f67b40f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/REST/app_rest_http-s_instance_cfg.h
@@ -0,0 +1,59 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+*                                               TEMPLATE
+*
+* Filename      : app_rest_http-s_instance_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 AL
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  APP_REST_HTTPs_CONN_NBR_MAX        6
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                    HTTP SERVER INSTANCE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+extern  const  NET_TASK_CFG  HTTPs_TaskCfgInstance_REST;
+extern  const  HTTPs_CFG     HTTPs_CfgInstance_REST;
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/ReadMe.txt b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/ReadMe.txt
new file mode 100644
index 0000000..3349ae3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/ReadMe.txt
@@ -0,0 +1,47 @@
+Common Folder:
+**************
+This folder contain the web resources (HTML, css, images, etc) used for most of the example applications.
+
+
+Example Folders:
+****************
+
+Basic:
+------ 
+This example is a basic web server application. An introduction page can be fetch from a web browser. The hook
+functions in this example are used to do dynamic content with token replacement, do redirecting, parse form data
+and construct custom response body in JSON. 
+No add-ons are used in this example.
+
+NoFS:
+-----
+This simple example shows how to configure and start an HTTP server instance with no File System. When the default
+page is fetch from a web browser, the server stack will answer with a simple "hello word".
+
+REST:
+-----
+This example is a RESTful application to view, add, modify and delete resources (simply a users list in this
+example). It uses the REST add-on module. All the information passed between the HTTP client and server are 
+constructed in JSON.
+
+CtrlLayer:
+----------
+This example combine a login barrier (using the Auth module) with the Basic and REST applications all in one 
+example through the Control Layer module.
+
+SSL-TLS:
+-------- 
+This folder is not an example application but only an example of HTTP server instance configuration and hook
+functions for a secure HTTP application. 
+
+
+Notes:
+******
+1) The REST example make use of the JQuery librairies. Therefore the host used as the HTTP client most also have
+   access to the internet to fetch those librairy files.
+
+2) To further test your HTTP server application or to simply upload files to your server, we recommand the POSTMAN
+   addon of Chrome. It allows to construct your custom HTTP requests.
+
+3) Those examples have been tested with Firefox and Chrome. There is no guarantee that they will work with other 
+   web browsers since some Javascript codes included have not been check to be all platform supporting. 
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/Certificate-Key/cert.pem b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/Certificate-Key/cert.pem
new file mode 100644
index 0000000..b5b5bc9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/Certificate-Key/cert.pem
@@ -0,0 +1,24 @@
+-----BEGIN CERTIFICATE-----
+MIIEEjCCAvqgAwIBAgIBBzANBgkqhkiG9w0BAQUFADAaMRgwFgYDVQQDEw9WYWxp
+Y29yZS1EQzEtQ0EwHhcNMTEwMzE4MTcwMTQyWhcNMjEwMzE1MTcwMTQyWjCBkDEL
+MAkGA1UEBhMCVVMxCzAJBgNVBAgTAkNBMQ8wDQYDVQQHEwZJcnZpbmUxHjAcBgNV
+BAoTFVZhbGljb3JlIFRlY2hub2xvZ2llczEhMB8GA1UEAxMYbGFuLWZ3LTAxLnZh
+bGljb3JlLmxvY2FsMSAwHgYJKoZIhvcNAQkBFhFhZG1pbkBsb2NhbGRvbWFpbjCC
+ASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBALwGOahytiwshzz1s/ngxy1+
++VrXZYjKSEzMYbJCUhK9xA5fz8pGtOZIXI+CasZPSbXv+ZDLGpSpeFnOL49plYRs
+vmTxg2n3AlZbP6pD9OPU8rmufsTvXAmQGxxIkdmWiXYJk0pbj+U698me6DKMV/sy
+3ekQaQC2I2nr8uQw8RhuNhhlkWyjBWdXnS2mLNLSan2Jnt8rumtAi3B+vF5Vf0Fa
+kLJNt45R0f5jjuab+qw4PKMZEQbqe0XTNzkxdD0XNRBdKlajffoZPBJ7xkfuKUA3
+cMjXKzetABoKvsv+ElfvqlrI9RXvTXy52EaQmVhiOyBHrScq4RbwtDQsd59Qmk0C
+AwEAAaOB6zCB6DAJBgNVHRMEAjAAMBEGCWCGSAGG+EIBAQQEAwIGQDA0BglghkgB
+hvhCAQ0EJxYlRWFzeS1SU0EgR2VuZXJhdGVkIFNlcnZlciBDZXJ0aWZpY2F0ZTAd
+BgNVHQ4EFgQUrq5KF11M9rpKm75nAs+MaiK0niYwUQYDVR0jBEowSIAU2Q9eGjzS
+LZhvlRRKO6c4Q5ATtuChHqQcMBoxGDAWBgNVBAMTD1ZhbGljb3JlLURDMS1DQYIQ
+T9aBcT0uXoxJmC0ohp7oSTATBgNVHSUEDDAKBggrBgEFBQcDATALBgNVHQ8EBAMC
+BaAwDQYJKoZIhvcNAQEFBQADggEBAAUMm/9G+mhxVIYK4anc34FMqu88NQy8lrh0
+loNfHhIEKnerzMz+nQGidf+KBg5K5U2Jo8e9gVnrzz1gh2RtUFvDjgosGIrgYZMN
+yreNUD2I7sWtuWFQyEuewbs8h2MECs2xVktkqp5KPmJGCYGhXbi+zuqi/19cIsly
+yS01kmexwcFMXyX4YOVbG+JFHy1b4zFvWgSDULj14AuKfc8RiZNvMRMWR/Jqlpr5
+xWQRSmkjuzQMFavs7soZ+kHp9vnFtY2D6gF2cailk0sdG0uuyPBVxEJ2meifG6eb
+o3FQzdtIrB6oMFHEU00P38SJq+mrDItPDRXNLa2Nrtc1EJtmjws=
+-----END CERTIFICATE-----
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/Certificate-Key/key.pem b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/Certificate-Key/key.pem
new file mode 100644
index 0000000..9528d6f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/Certificate-Key/key.pem
@@ -0,0 +1,27 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIEogIBAAKCAQEAvAY5qHK2LCyHPPWz+eDHLX75WtdliMpITMxhskJSEr3EDl/P
+yka05khcj4Jqxk9Jte/5kMsalKl4Wc4vj2mVhGy+ZPGDafcCVls/qkP049Tyua5+
+xO9cCZAbHEiR2ZaJdgmTSluP5Tr3yZ7oMoxX+zLd6RBpALYjaevy5DDxGG42GGWR
+bKMFZ1edLaYs0tJqfYme3yu6a0CLcH68XlV/QVqQsk23jlHR/mOO5pv6rDg8oxkR
+Bup7RdM3OTF0PRc1EF0qVqN9+hk8EnvGR+4pQDdwyNcrN60AGgq+y/4SV++qWsj1
+Fe9NfLnYRpCZWGI7IEetJyrhFvC0NCx3n1CaTQIDAQABAoIBAEbbqbr7j//RwB2P
+EwZmWWmh4mMDrbYBVYHrvB2rtLZvYYVxQiOexenK92b15TtbAhJYn5qbkCbaPwrJ
+E09eoQRI3u+3vKigd/cHaFTIS2/Y/qhPRGL/OZY5Ap6EEsMHYkJjlWh+XRosQNlw
+01zJWxbFsq90ib3E5k+ypdStRQ7JQ9ntvDAP6MDp3DF2RYf22Tpr9t3Oi2mUirOl
+piOEB55wydSyIhSHusbms3sp2uvQBYJjZP7eENEQz55PebTzl9UF2dgJ0wJFS073
+rvp46fibcch1L7U6v8iUNaS47GTs3MMyO4zda73ufhYwZLU5gL8oEDY3tf/J8zuC
+mNurr0ECgYEA8i1GgstYBFSCH4bhd2mLu39UVsIvHaD38mpJE6avCNOUq3Cyz9qr
+NzewG7RyqR43HsrVqUSQKzlAGWqG7sf+jkiam3v6VW0y05yqDjs+SVW+ZN5CKyn3
+sMZV0ei4MLrfxWneQaKy/EUTJMlz3rLSDM/hpJoA/gOo9BIFRf2HPkkCgYEAxsGq
+LYU+ZEKXKehVesh8rIic4QXwzeDmpMF2wTq6GnFq2D4vWPyVGDWdORcIO2BojDWV
+EZ8e7F2SghbmeTjXGADldYXQiQyt4Wtm+oJ6d+/juKSrQ1HIPzn1qgXDNLPfjd9o
+9lX5lGlRn49Jrx/kKQAPTcnCa1IirIcsmcdiy+UCgYBEbOBwUi3zQ0Fk0QJhb/Po
+LSjSPpl7YKDN4JP3NnBcKRPngLc1HU6lElny6gA/ombmj17hLZsia1GeHMg1LVLS
+NtdgOR5ZBrqGqcwuqzSFGfHqpBXEBl6SludmoL9yHUreh3QhzWuO9aFcEoNnl9Tb
+g9z4Wf8Pxk71byYISYLt6QKBgERActjo3ZD+UPyCHQBp4m45B246ZQO9zFYdXVNj
+gE7eTatuR0IOkoBawN++6gPByoUDTWpcsvjF9S6ZAJH2E97ZR/KAfijh4r/66sTx
+k26mQRPB8FHQvqv/kj3NdsgdUJJeeqPEyEzPkcjyIoJxuB7gN2El/I5wCRon3Qf9
+sQ6FAoGAfVOaROSAtq/bq9JIL60kkhA9sr3KmX52PnOR2hW0caWi96j+2jlmPT93
+4A2LIVUo6hCsHLSCFoWWiyX9pIqyYTn5L1EmeBO0+E8BH9F/te9+ZZ53U+quwc/X
+AZ6Pseyhj7S9wkI5hZ9SO1gcK4rWrAK/UFOIzzlACr5INr723vw=
+-----END RSA PRIVATE KEY-----
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/http-s_hooks.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/http-s_hooks.c
new file mode 100644
index 0000000..926e7d6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/http-s_hooks.c
@@ -0,0 +1,1182 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+/*
+*********************************************************************************************************
+*
+*                                   HTTP INSTANCE SERVER HOOKS FILE
+*
+* Filename      : http-s_hooks.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "http-s_instance_secure_cfg.h"
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#define  INDEX_PAGE_URL             "/index.html"
+#define  TCPIP_PAGE_URL             "/tcpip.html"
+
+#define  FORM_LOGOUT_FIELD_NAME     "Log out"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        FUNCTIONS PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_InstanceInitHook      (const  HTTPs_INSTANCE         *p_instance,
+                                                  const  void                   *p_hook_cfg);
+
+static  CPU_BOOLEAN  HTTPs_ReqHdrRxHook          (const  HTTPs_INSTANCE         *p_instance,
+                                                  const  HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                         HTTP_HDR_FIELD          hdr_field);
+
+static  CPU_BOOLEAN  HTTPs_ReqHook               (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+static  CPU_BOOLEAN  HTTPs_ReqBodyRxHook         (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                         void                   *p_buf,
+                                                  const  CPU_SIZE_T              buf_size,
+                                                         CPU_SIZE_T             *p_buf_size_used);
+
+static  CPU_BOOLEAN  HTTPs_ReqRdySignalHook      (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                  const  HTTPs_KEY_VAL         *p_data);
+
+static  CPU_BOOLEAN  HTTPs_ReqRdyPollHook        (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+static  CPU_BOOLEAN  HTTPs_RespHdrTxHook         (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+static  CPU_BOOLEAN  HTTPs_RespTokenValGetHook   (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                  const  CPU_CHAR               *p_token,
+                                                         CPU_INT16U              token_len,
+                                                         CPU_CHAR               *p_val,
+                                                         CPU_INT16U              val_len_max);
+
+static  CPU_BOOLEAN  HTTPs_RespChunkDataGetHook  (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                         void                   *p_buf,
+                                                         CPU_SIZE_T              buf_len_max,
+                                                         CPU_SIZE_T             *p_tx_len);
+
+static  void         HTTPs_TransCompleteHook     (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+static void          HTTPs_ErrFileGetHook        (const  void                   *p_hook_cfg,
+                                                         HTTP_STATUS_CODE        status_code,
+                                                         CPU_CHAR               *p_file_str,
+                                                         CPU_INT32U              file_len_max,
+                                                         HTTPs_BODY_DATA_TYPE   *p_file_type,
+                                                         HTTP_CONTENT_TYPE      *p_content_type,
+                                                         void                  **p_data,
+                                                         CPU_INT32U             *p_data_len);
+
+static  void         HTTPs_ErrHook               (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg,
+                                                         HTTPs_ERR               err);
+
+static  void         HTTPs_ConnCloseHook         (const  HTTPs_INSTANCE         *p_instance,
+                                                         HTTPs_CONN             *p_conn,
+                                                  const  void                   *p_hook_cfg);
+
+
+/*
+*********************************************************************************************************
+*                                      HTTP SERVER HOOK CONFIGURATION
+*
+* Note(s): (1)  When the instance is created, an hook function can be called to initialize connection objects used by the instance.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_InstanceInitHook() function for further details.
+*
+*          (2)  Each time a header field other than the default one is received, a hook function is called
+*               allowing to choose which header field(s) to keep for further processing.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqHdrRxHook() function for further details.
+*
+*          (3)  For each new incoming connection request a hook function can be called by the web server to authenticate
+*               the remote connection to accept or reject it. This function can have access to allow stored request header
+*               field.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqHook() function for further details.
+*
+*          (4)  If the upper application want to parse the data received in the request body, a hook function is available.
+*               It will be called each time new data are received. The exception is when a POST request with a form is
+*               received. In that case, the HTTP server core will parse the body and saved the data into Key-Value data blocks.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqBodyRxHook() function for further details.
+*
+*          (5)  The Signal hook function occurs after the HTTP request has been completely received.
+*               The hook function SHOULD NOT be blocking and SHOULD return quickly. A time consuming function will
+*               block the processing of the other connections and reduce the HTTP server performance.
+*               In case the request processing is time consuming, the Poll hook function SHOULD be enabled to
+*               allow the server to periodically verify if the upper application has finished the request processing.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ReqRdySignalHook() function for further details.
+*
+*          (6)  The Poll hook function SHOULD be enable in case the request processing require lots of time. It
+*               allows the HTTP server to periodically poll the upper application and verify if the request processing
+*               has finished.
+*               If the Poll feature is not required, this field SHOULD be set as DEF_NULL.
+*               See HTTPs_ReqRdyPollHook() function for further details.
+*
+*          (7)  Before an HTTP response message is transmitted, a hook function is called to enable adding header field(s) to
+*               the message before it is sent.
+*               The Header Module must be enabled for this hook to be called. See HTTPs_CFG_HDR in http-s_cfg.h.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_RespHdrTxHook() function for further details.
+*
+*          (8)  The hook function is called by the web server when a token is found. This means the hook
+*               function must fill a buffer with the value of the instance token to be sent.
+*               If the feature is not enabled, this field is not used and can be set as DEF_NULL.
+*               See 'HTTPs_RespTokenValGetHook' for further information.
+*
+*          (9)  To allow the upper application to transmit data with the Chunked Transfer Encoding, a hook function is
+*               available. If defined, it will be called at the moment of the Response body transfer, and it will be called
+*               until the application has transfer all its data.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_RespChunkDataGetHook() function for further details.
+*
+*          (10) Once an HTTP transaction is completed, a hook function can be called to notify the upper application that the
+*               transaction is done. This hook function could be used to free some previously allocated memory.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_TransCompleteHook() function for further details.
+*
+*          (11) When an internal error occurs during the processing of a connection a hook function can be called to
+*               notify the application of the error and to change the behavior such as the status code and the page returned.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ErrHook() function for further details.
+*
+*          (12) Get error file hook can be called every time an error has occurred when processing a connection.
+*               This function can set the web page that should be transmit instead of the default error page defined
+*               in http-s_cfg.h.
+*               If set to DEF_NULL the default error page will be used for every error.
+*               See HTTPs_ErrFileGetHook() function for further details.
+*
+*          (13) Once a connection is closed a hook function can be called to notify the upper application that a connection
+*               is no more active. This hook function could be used to free some previously allocated memory.
+*               If the hook is not required by the upper application, it can be set as DEF_NULL and no function will be called.
+*               See HTTPs_ConnCloseHook() function for further details.
+*********************************************************************************************************
+*/
+
+const  HTTPs_HOOK_CFG  HTTPs_Hooks = {
+        HTTPs_InstanceInitHook,                                 /* .OnInstanceInitHook      See Note #1.     */
+        HTTPs_ReqHdrRxHook,                                     /* .OnReqHdrRxHook          See Note #2.     */
+        HTTPs_ReqHook,                                          /* .OnReqHook               See Note #3.     */
+        HTTPs_ReqBodyRxHook,                                    /* .OnReqBodyRxHook         See Note #4.     */
+        HTTPs_ReqRdySignalHook,                                 /* .OnReqRdySignalHook      See Note #5.     */
+        HTTPs_ReqRdyPollHook,                                   /* .OnReqRdyPollHook        See Note #6.     */
+        HTTPs_RespHdrTxHook,                                    /* .OnRespHdrTxHook         See Note #7.     */
+        HTTPs_RespTokenValGetHook,                              /* .OnRespTokenHook         See Note #8.     */
+        HTTPs_RespChunkDataGetHook,                             /* .OnRespChunkHook         See Note #9.     */
+        HTTPs_TransCompleteHook,                                /* .OnTransCompleteHook     See Note #10.    */
+        HTTPs_ErrHook,                                          /* .OnErrHook               See Note #11.    */
+        HTTPs_ErrFileGetHook,                                   /* .OnErrFileGetHook        See Note #12.    */
+        HTTPs_ConnCloseHook                                     /* .OnConnCloseHook         See Note #13.    */
+};
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_InstanceInitHook()
+*
+* Description : Called to initialized the instance connection objects;
+*               Examples of behaviors that could be implemented :
+*
+*               (a) Session connections handling initialization:
+*
+*                   (1) Initialize the memory pool and chained list for session connection objects.
+*                   (2) Initialize a periodic timer which check for expired session and release them if
+*                       it is the case.
+*
+*               (b) Back-end Application Request processing task initialization.
+*
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceInit() via 'p_cfg->HooksPtr->OnInstanceInitHook()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_InstanceInitHook (const  HTTPs_INSTANCE  *p_instance,
+                                             const  void            *p_hook_cfg)
+{
+    /* Nothing to do for this example. */
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPs_ReqHdrRxHook()
+*
+* Description : Called each time a header field is parsed in a request message. Allows to choose which
+*               additional header field(s) need to be processed by the upper application.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+*               hdr_field   Type of the header field received.
+*                               See the HTTPs_HDR_FIELD declaration in http-s.h file for all the header types supported.
+*
+* Return(s)   : DEF_YES,   If the header field needs to be process.
+*               DEF_NO,    Otherwise.
+*
+* Caller(s)   : HTTPs_ReqHdrParse() via 'p_cfg->HooksPtr->OnReqHdrRxHook()'.
+*
+* Note(s)     : (1) The instance structure is for read-only. It MUST NOT be modified.
+*
+*               (2) The connection structure SHOULD NOT be modified. It should be only read to determine if the header
+*                   type must be stored.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqHdrRxHook (const  HTTPs_INSTANCE   *p_instance,
+                                         const  HTTPs_CONN       *p_conn,
+                                         const  void             *p_hook_cfg,
+                                                HTTP_HDR_FIELD    hdr_field)
+{
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+    switch (hdr_field) {
+        case HTTP_HDR_FIELD_COOKIE:
+        case HTTP_HDR_FIELD_COOKIE2:
+             return(DEF_YES);
+
+        default:
+             return(DEF_NO);
+    }
+#else
+    return (DEF_NO);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_ReqHook()
+*
+* Description : Called after the parsing of an HTTP request message's first line and header(s).
+*               Allows the application to process the information received in the request message.
+*               Examples of behaviors that could be implemented :
+*
+*               (a) Analyze the Request-URI and validate that the client has the permission to access
+*                   the resource. If not, change the Response Status Code to 403 (Forbidden) or 401
+*                   (Unauthorized) if an Authentication technique is implemented. In case of a 401
+*                   Status, a "WWW-Authenticate" header needs to be added to the response message
+*                   (See HTTPs_InstanceRespHdrTx() function)
+*
+*               (b) Depending on whether the header feature is enabled and which header fields have been
+*                   chosen for use (see HTTPs_ReqHdrRxHook() function), different behaviors
+*                   are possible. Here are some examples :
+*
+*                       (1) A "Cookie" header is received. The default html page is modified to include
+*                           personalized features for the client.
+*
+*                       (2) An "Authorization" header is received. This validates that the client login is good and
+*                           changes permanently its' access to the folder/file.
+*
+*                       (3) An "If-Modified-Since" header is received. It then validates whether or not the resource
+*                           has been modified since the 'HTTP-date' received with the header. If it was, continue
+*                           with the request processing normally, else change the Status Code to 304 (Not Modified).
+*
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : DEF_OK    if the application allows the request to be continue.
+*               DEF_FAIL  otherwise.
+*                               Status code will be set automatically to HTTPs_STATUS_UNAUTHORIZED
+*
+* Caller(s)   : HTTPs_Req() via 'p_cfg->HooksPtr->OnReqHook'.
+*
+* Note(s)     : (1) The instance structure is for read-only. It must not be modified at any point in this hook function.
+*
+*               (2) The following connection attributes can be accessed to analyze the connection:
+*
+*                   (a) 'ClientAddr'
+*                           This connection parameter contains the IP address and port used by the remote client to access the
+*                           server instance.
+*
+*                   (b) 'Method'
+*                           HTTPs_METHOD_GET        Get  request
+*                           HTTPs_METHOD_POST       Post request
+*                           HTTPs_METHOD_HEAD       Head request
+*
+*                   (c) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested.
+*
+*                   (d) 'HdrCtr'
+*                           This parameter is a counter of the number of header field that has been stored.
+*
+*                   (e) 'HdrListPtr'
+*                           This parameter is a pointer to the first header field stored. A linked list is created with
+*                           all header field stored.
+*
+*               (3) In this hook function, only the under-mentioned connection parameters are allowed
+*                   to be modified :
+*
+*                   (a) 'StatusCode'
+*
+*                           See HTTPs_STATUS_CODE declaration in http-s.h for all the status code supported.
+*
+*                   (b) 'PathPtr'
+*
+*                           This is a pointer to the string that contains the name of the file requested. You can change
+*                           the name of the requested file to send another file instead without error.
+*
+*                   (c) 'DataPtr'
+*
+*                           This is a pointer to the data file or data to transmit. This parameter should be null when calling
+*                           this function. If data from memory has to be sent instead of a file, this pointer must be set
+*                           to the location of the data.
+*
+*                   (d) 'RespBodyDataType'
+*
+*                           HTTPs_BODY_DATA_TYPE_FILE              Open and transmit a file. Value by default.
+*                           HTTPs_BODY_DATA_TYPE_STATIC_DATA       Transmit data from the memory. Must be set by the hook function.
+*                           HTTPs_BODY_DATA_TYPE_NONE              No body in response
+*
+*                   (e) 'DataLen'
+*
+*                           0,                              Default value, will be set when the file is opened.
+*                           Data length,                    Must be set by the data length when transmitting data from
+*                                                           the memory
+*
+*                   (f) 'ConnDataPtr'
+*
+*                           This is a pointer available for the upper application when memory block must be allocated
+*                           to process the connection request. If memory is allocated by the upper application, the memory
+*                           space can be deallocated into another hook function.
+*
+*               (4) When the Location of the requested file has changed, besides the Status Code to change (3xx),
+*                   the 'PathPtr' parameter needs to be updated. A "Location" header will be added automatically in
+*                   the response by uC/HTTPs core with the new location.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqHook (const  HTTPs_INSTANCE  *p_instance,
+                                           HTTPs_CONN      *p_conn,
+                                    const  void            *p_hook_cfg)
+{
+    CPU_INT16S  str_cmp;
+    HTTPs_ERR   err;
+
+                                                                /* Redirect the TCPIP page example to the default page. */
+    str_cmp = Str_Cmp_N(p_conn->PathPtr, TCPIP_PAGE_URL, p_conn->PathLenMax);
+    if (str_cmp == 0) {
+
+        p_conn->StatusCode = HTTP_STATUS_SEE_OTHER;
+
+        HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err);
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+        Str_Copy(p_conn->HostPtr, "");
+        Str_Copy(p_conn->PathPtr, INDEX_PAGE_URL);
+#else
+        Str_Copy(p_conn->PathPtr, INDEX_PAGE_URL);
+#endif
+    }
+
+    (void)&err;                                                 /* Prevent 'variable unused' compiler warning.          */
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_ReqBodyRxHook()
+*
+* Description : Called when body data is received by the HTTPs core. Allows the application to retrieve
+*               body data.
+*
+* Argument(s) : p_instance       Pointer to the HTTPs instance object.
+*
+*               p_conn           Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg       Pointer to hook configuration object.
+*
+*               p_buf            Pointer to the data buffer.
+*
+*               buf_size         Size of the data rx available inside the buffer.
+*
+*               p_buf_size_used  Pointer to the variable that will received the length of the data consumed by the app.
+*
+* Return(s)   : DEF_YES    To continue with the data reception.
+*               DEF_NO     If the application doesn't want to rx data anymore.
+*
+* Caller(s)   : HTTPs_Body() via p_cfg->HooksPtr->OnReqBodyRxHook().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqBodyRxHook (const  HTTPs_INSTANCE  *p_instance,
+                                                 HTTPs_CONN      *p_conn,
+                                          const  void            *p_hook_cfg,
+                                                 void            *p_buf,
+                                          const  CPU_SIZE_T       buf_size,
+                                                 CPU_SIZE_T      *p_buf_size_used)
+{
+    /* Nothing to do for this example. */
+    return (DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPs_ReqRdySignalHook()
+*
+* Description : If defined, this hook function is called after the request has been completely received and
+*               parse by the HTTP server core.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+*               p_data      Pointer to the first key-value pair received in a form if any.
+*                           DEF_NULL otherwise.
+*
+* Return(s)   : DEF_YES, if the response can be sent.
+*
+*               DEF_NO,  if the response cannot be sent after this call and the Poll function MUST be called before
+*                        sending the response (see note #3).
+*
+* Caller(s)   : HTTPs_MethodPost() via 'p_cfg->HooksPtr->OnReqRdySignalHook()'.
+*
+* Note(s)     : (1) This callback function SHOULD NOT be blocking and SHOULD return quickly. A time consuming
+*                   function will block the processing of other connections and reduce the HTTP server performance.
+*
+*               (2) If the request data received take a while to be processed:
+*
+*                   (a) the processing SHOULD be done in a separate task and not in this callback function to avoid
+*                       blocking other connections.
+*
+*                   (b) the poll callback function SHOULD be used to allow the connection to poll periodically the
+*                       upper application and verify if the request data processing has been completed.
+*
+*                       The 'ConnDataPtr' attribute inside HTTP_CONN structure can be used to store a
+*                       semaphore pointer related to the completion of the request data processing.
+*
+*                       See 'HTTPs_ReqRdyPollHook()' for more details on poll function.
+*
+*               (3) The following connection attributes can be accessed to analyze the connection:
+*
+*                   (a) 'ClientAddr'
+*                           This connection parameter contains the IP address and port used by the remote client to access the
+*                           server instance.
+*
+*                   (b) 'Method'
+*                           HTTPs_METHOD_GET        Get  request
+*                           HTTPs_METHOD_POST       Post request
+*                           HTTPs_METHOD_HEAD       Head request
+*
+*                   (c) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested.
+*
+*                   (d) 'ReqHdrCtr'
+*                           This parameter is a counter of the number of header field that has been stored.
+*
+*                   (e) 'ReqHdrFirstPtr'
+*                           This parameter is a pointer to the first header field stored. A linked list is created with
+*                           all header field stored.
+*
+*                   (f) 'ConnDataPtr'
+*                           This is a pointer available for the upper application when memory block must be allocated
+*                           to process the connection request. If memory is allocated by the upper application, the memory
+*                           space can be deallocated into another hook function.
+*
+*               (4) In this hook function, only the under-mentioned connection parameters are allowed
+*                   to be modified :
+*
+*                   (a) 'StatusCode'
+*                           See HTTPs_STATUS_CODE declaration in http-s.h for all the status code supported.
+*
+*                   (b) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested. You can change
+*                           the name of the requested file to send another file instead without error.
+*
+*                   (c) 'FilePtr'
+*                           This is a pointer to the data file or data to transmit. This parameter should be null when calling
+*                           this function. If data from memory has to be sent instead of a file, this pointer must be set
+*                           to the location of the data.
+*
+*                   (d) 'RespBodyDataType'
+*                           HTTPs_BODY_DATA_TYPE_FILE              Open and transmit a file. Value by default.
+*                           HTTPs_BODY_DATA_TYPE_STATIC_DATA       Transmit data from the memory. Must be set by the hook function.
+*                           HTTPs_BODY_DATA_TYPE_NONE              No body in response.
+*
+*                   (e) 'FileLen'
+*                           0,                              Default value, will be set when the file is opened.
+*                           Data length,                    Must be set to the data length when transmitting data from
+*                                                           the memory
+*
+*               (5) When the Location of the requested file has change, besides the Status Code to change (3xx),
+*                   the FileNamePtr parameter needs to be update. A "Location" header will be added automatically in
+*                   the response by uC/HTTPs core with the new location.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqRdySignalHook (const  HTTPs_INSTANCE  *p_instance,
+                                                    HTTPs_CONN      *p_conn,
+                                             const  void            *p_hook_cfg,
+                                             const  HTTPs_KEY_VAL  *p_data)
+{
+    HTTPs_KEY_VAL  *p_ctrl_var;
+    CPU_INT16S      str_cmp;
+    HTTPs_ERR       err;
+
+
+    p_ctrl_var = (HTTPs_KEY_VAL *)p_data;
+    while (p_ctrl_var != DEF_NULL) {
+
+                                                                /* **************** RECEIVED CTRL TYPE **************** */
+        if (p_ctrl_var->DataType == HTTPs_KEY_VAL_TYPE_PAIR) {
+
+            str_cmp = Str_Cmp_N(p_ctrl_var->KeyPtr, FORM_LOGOUT_FIELD_NAME, p_ctrl_var->KeyLen);
+            if (str_cmp == 0) {
+
+                p_conn->StatusCode = HTTP_STATUS_SEE_OTHER;     /* Redirect the page...                                 */
+
+                HTTPs_RespBodySetParamNoBody(p_instance, p_conn, &err);
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+                Str_Copy(p_conn->HostPtr, "");
+                Str_Copy(p_conn->PathPtr, INDEX_PAGE_URL);
+#else
+                Str_Copy(p_conn->PathPtr, INDEX_PAGE_URL);
+#endif
+            }
+
+        } else if (p_ctrl_var->DataType == HTTPs_KEY_VAL_TYPE_FILE) {
+                                                                /* Send back in response last file received in post.    */
+            HTTPs_RespBodySetParamFile(p_instance,
+                                       p_conn,
+                                       p_ctrl_var->ValPtr,
+                                       HTTP_CONTENT_TYPE_UNKNOWN,
+                                       DEF_NO,
+                                      &err);
+        }
+
+        p_ctrl_var = p_ctrl_var->NextPtr;
+    }
+
+    (void)&p_instance;                                          /* Prevent 'variable unused' compiler warning.          */
+    (void)&err;
+
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_ReqRdyPollHook()
+*
+* Description : Called periodically by a connection waiting for the upper application to complete the
+*               request processing.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : DEF_YES, if the response can be sent.
+*
+*               DEF_NO,  if the response cannot be sent after this call and the Poll function MUST be called again
+*                        before sending the response (see note #2).
+*
+* Caller(s)   : HTTPs_MethodPost() via 'p_cfg->HooksPtr->OnReqRdyPollHook()'.
+*
+* Note(s)     : (1) This callback function SHOULD NOT be blocking and SHOULD return quickly. A time consuming
+*                   function will block the processing of other connections and reduce the HTTP server performance.
+*
+*                   This function will be called periodically by the connection until DEF_YES is returned.
+*
+*               (2) The poll callback function SHOULD be used when the request processing takes a while to
+*                   be completed. It will allow the server to periodically poll the upper application to verify
+*                   if the request processing has finished.
+*
+*                   The 'ConnDataPtr' attribute inside the HTTP_CONN structure can be used to store a
+*                   semaphore pointer related to the completion of the request processing.
+*
+*                   See 'HTTPs_InstanceReqRdySignal()' for more details on post/poll functionality.
+*
+*               (3) The following connection attributes can be accessed to analyze the connection:
+*
+*                   (a) 'ClientAddr'
+*                           This connection parameter contains the IP address and port used by the remote client to access the
+*                           server instance.
+*
+*                   (b) 'Method'
+*                           HTTPs_METHOD_GET        Get  request
+*                           HTTPs_METHOD_POST       Post request
+*                           HTTPs_METHOD_HEAD       Head request
+*
+*                   (c) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested.
+*
+*                   (d) 'HdrCtr'
+*                           This parameter is a counter of the number of header field that has been stored.
+*
+*                   (e) 'HdrListPtr'
+*                           This parameter is a pointer to the first header field stored. A linked list is created with
+*                           all header field stored.
+*
+*                   (f) 'ConnDataPtr'
+*                           This is a pointer available for the upper application when memory block must be allocated
+*                           to process the connection request. If memory is allocated by the upper application, the memory
+*                           space can be deallocated into another hook function.
+*
+*               (4) In this hook function, only the under-mentioned connection parameters are allowed
+*                   to be modified :
+*
+*                   (a) 'StatusCode'
+*                           See HTTPs_STATUS_CODE declaration in http-s.h for all the status code supported.
+*
+*                   (b) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested. You can change
+*                           the name of the requested file to send another file instead without error.
+*
+*                   (c) 'DataPtr'
+*                           This is a pointer to the data file or data to transmit. This parameter should be null when calling
+*                           this function. If data from memory has to be sent instead of a file, this pointer must be set
+*                           to the location of the data.
+*
+*                   (d) 'RespBodyDataType'
+*                           HTTPs_BODY_DATA_TYPE_FILE              Open and transmit a file. Value by default.
+*                           HTTPs_BODY_DATA_TYPE_STATIC_DATA       Transmit data from the memory. Must be set by the hook function.
+*                           HTTPs_BODY_DATA_TYPE_NONE              No body in response.
+*
+*                   (e) 'DataLen'
+*                           0,                              Default value, will be set when the file is opened.
+*                           Data length,                    Must be set to the data length when transmitting data from
+*                                                           the memory
+*
+*               (5) When the Location of the requested file has change, besides the Status Code to change (3xx),
+*                   the 'PathPtr' parameter needs to be update. A "Location" header will be added automatically in
+*                   the response by uC/HTTPs core with the new location.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_ReqRdyPollHook (const  HTTPs_INSTANCE  *p_instance,
+                                                  HTTPs_CONN      *p_conn,
+                                           const  void            *p_hook_cfg)
+{
+    /* Nothing to do for this example. */
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_RespHdrTxHook()
+*
+* Description : Called each time the HTTP server is building a response message. Allows for adding header
+*               fields to the response message according to the application needs.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : DEF_YES,    if the header fields are added without running into a error.
+*               DEF_NO,     otherwise.
+*
+* Caller(s)   : HTTPs_RespPrepareHdr() via 'p_cfg->OnRespHdrTxHook()'.
+*
+* Note(s)     : (1) The instance structure MUST NOT be modified.
+*
+*               (2) The connection structure MUST NOT be modified manually since the response is about to be
+*                   transmitted at this point. The only change to the connection structure should be the
+*                   addition of header fields for the response message through the function HTTPs_RespHdrGet().
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_RespHdrTxHook (const  HTTPs_INSTANCE  *p_instance,
+                                                 HTTPs_CONN      *p_conn,
+                                          const  void            *p_hook_cfg)
+{
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+
+           HTTPs_HDR_BLK  *p_resp_hdr_blk;
+    const  HTTPs_CFG      *p_cfg;
+           CPU_CHAR       *str_data;
+           CPU_SIZE_T      str_len;
+           HTTPs_ERR       http_err;
+
+
+    p_cfg = p_instance->CfgPtr;
+
+    if (p_cfg->HdrTxCfgPtr == DEF_NULL) {
+        return (DEF_NO);
+    }
+
+    switch (p_conn->StatusCode) {
+           case HTTP_STATUS_OK:
+
+                if (p_conn->ReqContentType == HTTP_CONTENT_TYPE_HTML) {
+
+                                                                /* --------------- ADD SERVER HDR FIELD --------------- */
+                                                                /* Get and add header block to the connection.          */
+                    p_resp_hdr_blk = HTTPs_RespHdrGet((HTTPs_INSTANCE *)p_instance,
+                                                                        p_conn,
+                                                                        HTTP_HDR_FIELD_SERVER,
+                                                                        HTTPs_HDR_VAL_TYPE_STR_DYN,
+                                                                       &http_err);
+                    if (p_resp_hdr_blk == (HTTPs_HDR_BLK *)0) {
+                        return(DEF_FAIL);
+                    }
+
+                    str_data = "uC-HTTP-server";                /* Build Server string value.                           */
+
+                    str_len = Str_Len_N(str_data, p_cfg->HdrTxCfgPtr->DataLenMax);
+
+                                                                /* update hdr blk parameter.                            */
+                    Str_Copy_N(p_resp_hdr_blk->ValPtr,
+                               str_data,
+                               str_len);
+
+                    p_resp_hdr_blk->ValLen = str_len;
+                }
+                break;
+
+
+           default:
+                break;
+    }
+#endif
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPs_RespTokenValGetHook()
+*
+* Description : Called for each ${TEXT_STRING} embedded variable found in a HTML document.
+*
+* Argument(s) : p_instance   Pointer to the HTTPs instance object.
+*
+*               p_conn       Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg   Pointer to hook configuration object.
+*
+*               p_token      Pointer to the string that contains the value of the HTML embedded token.
+*
+*               token_len    Length of the embedded token.
+*
+*               p_val        Pointer to which buffer token value is copied to.
+*
+*               val_len_max  Maximum buffer length.
+*
+* Return(s)   : DEF_OK,   if token value copied successfully.
+*               DEF_FAIL, otherwise (see Note #3).
+*
+* Caller(s)   : HTTPs_TokenValGet() via 'p_cfg->HooksPtr->OnRespTokenHook()'.
+*
+* Note(s)     : (1) The instance structure MUST NOT be modified.
+*
+*               (2) The connection structure MUST NOT be modified manually since the response is about to be
+*                   transmitted at this point. The only change to the connection structure should be the
+*                   addition of header fields for the response message through the function HTTPs_RespHdrGet().
+*
+*               (3) If the token replacement failed, the token will be replaced by a line of tilde (~) of
+*                   length equal to val_len_max.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_RespTokenValGetHook (const  HTTPs_INSTANCE  *p_instance,
+                                                       HTTPs_CONN      *p_conn,
+                                                const  void            *p_hook_cfg,
+                                                const  CPU_CHAR        *p_token,
+                                                       CPU_INT16U       token_len,
+                                                       CPU_CHAR        *p_val,
+                                                       CPU_INT16U       val_len_max)
+{
+    static  CPU_CHAR    buf[20];
+            CPU_INT32U  ver;
+
+
+    if (Str_Cmp_N(p_token, "NET_VERSION", 11) == 0) {
+#if (NET_VERSION >  205u)
+        ver =  NET_VERSION / 10000;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, ' ', DEF_NO, DEF_NO,  &buf[0]);
+        buf[2] = '.';
+
+        ver = (NET_VERSION /   100) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_NO,  &buf[3]);
+        buf[5] = '.';
+
+        ver = (NET_VERSION /     1) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_YES, &buf[6]);
+        buf[8] = '\0';
+
+#else
+        ver =  NET_VERSION /   100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, ' ', DEF_NO, DEF_NO,  &buf[0]);
+        buf[2] = '.';
+
+        ver = (NET_VERSION /     1) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_YES, &buf[3]);
+        buf[5] = '\0';
+#endif
+
+    } else if (Str_Cmp_N(p_token, "HTTPs_VERSION", 13) == 0) {
+        ver =  HTTPs_VERSION / 10000;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, ' ', DEF_NO, DEF_NO,  &buf[0]);
+        buf[2] = '.';
+
+        ver = (HTTPs_VERSION /   100) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_NO,  &buf[3]);
+        buf[5] = '.';
+
+        ver = (HTTPs_VERSION /     1) % 100;
+       (void)Str_FmtNbr_Int32U(ver,  2, DEF_NBR_BASE_DEC, '0', DEF_NO, DEF_YES, &buf[6]);
+        buf[8] = '\0';
+    }
+
+    Str_Copy_N(p_val, &buf[0], val_len_max);
+
+
+    (void)&p_instance;                                          /* Prevent 'variable unused' compiler warning.          */
+    (void)&p_conn;
+    (void)&token_len;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPs_RespChunkDataGetHook()
+*
+* Description : Called to get the application data to put in the body when transferring in chunk.
+*
+* Argument(s) : p_instance      Pointer to the HTTPs instance object.
+*
+*               p_conn          Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg      Pointer to hook configuration object.
+*
+*               p_buf           Pointer to the buffer to fill.
+*
+*               buf_len_max     Maximum length the buffer can contain.
+*
+*               p_tx_len        Variable that will received the length written in the buffer.
+*
+* Return(s)   : DEF_YES      if there is no more data to send.
+*               DEF_NO       otherwise.
+*
+* Caller(s)   : HTTPs_RespDataTransferChunked via p_cfg->HooksPtr->OnRespChunkHook.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_RespChunkDataGetHook (const  HTTPs_INSTANCE  *p_instance,
+                                                        HTTPs_CONN      *p_conn,
+                                                 const  void            *p_hook_cfg,
+                                                        void            *p_buf,
+                                                        CPU_SIZE_T       buf_len_max,
+                                                        CPU_SIZE_T      *p_tx_len)
+{
+    /* Nothing to do for this example. */
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPs_TransCompleteHook()
+*
+* Description : Called each time an HTTP Transaction has been completed. Allows the upper application
+*               to free some previously allocated memory associated with a request.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsConn_Process() via 'p_cfg->HooksPtr->OnTransCompleteHook().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  HTTPs_TransCompleteHook (const  HTTPs_INSTANCE  *p_instance,
+                                              HTTPs_CONN      *p_conn,
+                                       const  void            *p_hook_cfg)
+{
+    /* Nothing to do for this example. */
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPs_InstanceErrFileGet()
+*
+* Description : (1) Called when the response status code has been changed to an error status code. The
+*                   change could be the result of the request processing in the HTTPs_ReqHook()
+*                   callback function or the result of an internal error in the uC/HTTPs core.
+*
+*               (2) This function is intended to set the name of the file which will be sent with the response message.
+*                   If no file is set, a default status page will be sent including the status code number and the
+*                   reason phrase.
+*
+* Argument(s) : p_hook_cfg      Pointer to hook configuration object.
+*
+*               status_code     Status code, number of the response message.
+*
+*               p_file_str      Pointer to the buffer where the filename string must be copied.
+*
+*               file_len_max    Maximum length of the filename.
+*
+*               p_file_type     Pointer to the variable where the file type must be copied:
+*                                   HTTPs_FILE_TYPE_FILE,         when file is include in a File System.
+*                                   HTTPs_FILE_TYPE_STATIC_DATA,  when file is a simple data stream inside a memory
+*                                                                 block.
+*
+*               p_content_type  Content type of the body.
+*                               If the data is a File. the content type doesn't need to be set. It will be
+*                               set according to the file extension.
+*                               If the data is Static Data, the parameter MUST be set.
+*
+*               p_data          Pointer to the data memory block, if file type is HTTPs_FILE_TYPE_STATIC_DATA.
+*                               DEF_NULL,                         otherwise
+*
+*               p_data_len      Pointer to variable holding
+*                               the length of the data,           if file type is HTTPs_FILE_TYPE_STATIC_DATA.
+*                               DEF_NULL,                         otherwise
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsResp_PrepareStatusCode() via 'p_cfg->HooksPtr->OnErrFileGetHook().
+*
+* Note(s)     : (1) If the configured file doesn't exist the instance will transmit the default web page instead,
+*                   defined by HTTPs_CFG_HTML_DFLT_ERR_PAGE in http-s_cfg.h
+*********************************************************************************************************
+*/
+
+static  void  HTTPs_ErrFileGetHook (const  void                   *p_hook_cfg,
+                                           HTTP_STATUS_CODE        status_code,
+                                           CPU_CHAR               *p_file_str,
+                                           CPU_INT32U              file_len_max,
+                                           HTTPs_BODY_DATA_TYPE   *p_file_type,
+                                           HTTP_CONTENT_TYPE      *p_content_type,
+                                           void                  **p_data,
+                                           CPU_INT32U             *p_data_len)
+{
+    switch (status_code) {
+        case HTTP_STATUS_NOT_FOUND:
+             Str_Copy_N(p_file_str, HTTPs_CFG_INSTANCE_SECURE_STR_FILE_ERR_404, file_len_max);
+            *p_file_type = HTTPs_BODY_DATA_TYPE_FILE;
+             return;
+
+
+        default:
+             Str_Copy_N(p_file_str, HTTPs_HTML_DLFT_ERR_STR_NAME, file_len_max);
+            *p_data         = HTTPs_CFG_HTML_DFLT_ERR_PAGE;
+            *p_data_len     = HTTPs_HTML_DLFT_ERR_LEN;
+            *p_file_type    = HTTPs_BODY_DATA_TYPE_STATIC_DATA;
+            *p_content_type = HTTP_CONTENT_TYPE_HTML;
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPs_ErrHook()
+*
+* Description : Called each time an internal error occurs.
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+*               err         Internal error that occurred:
+*                               See HTTPs_ERR declaration in http-s.h for all the error codes possible.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_ErrInternal() via 'p_cfg->HooksPtr->OnErrHook()'.
+*
+* Note(s)     : (1) The instance structure is for read-only. It must not be modified at any point in this hook function.
+*
+*               (2) The following connection attributes can be accessed to analyze the connection:
+*
+*                   (a) 'ClientAddr'
+*                           This connection parameter contains the IP address and port used by the remote client to access the
+*                           server instance.
+*
+*                   (b) 'Method'
+*                           HTTPs_METHOD_GET        Get  request
+*                           HTTPs_METHOD_POST       Post request
+*                           HTTPs_METHOD_HEAD       Head request
+*
+*                   (c) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested.
+*
+*                   (d) 'HdrCtr'
+*                           This parameter is a counter of the number of header field that has been stored.
+*
+*                   (e) 'HdrListPtr'
+*                           This parameter is a pointer to the first header field stored. A linked list is created with
+*                           all header field stored.
+*
+*               (3) In this hook function, only the under-mentioned connection parameters are allowed
+*                   to be modified :
+*
+*                   (a) 'StatusCode'
+*                           See HTTPs_STATUS_CODE declaration in http-s.h for all the status code supported.
+*
+*                   (b) 'PathPtr'
+*                           This is a pointer to the string that contains the name of the file requested. You can change
+*                           the name of the requested file to send another file instead without error.
+*
+*                   (c) 'DataPtr'
+*                           This is a pointer to the data file or data to transmit. This parameter should be null when calling
+*                           this function. If data from memory has to be sent instead of a file, this pointer must be set
+*                           to the location of the data.
+*
+*                   (d) 'RespBodyDataType'
+*                           HTTPs_BODY_DATA_TYPE_FILE              Open and transmit a file. Value by default.
+*                           HTTPs_BODY_DATA_TYPE_STATIC_DATA       Transmit data from the memory. Must be set by the hook function.
+*                           HTTPs_BODY_DATA_TYPE_NONE              No body in response.
+*
+*                   (e) 'DataLen'
+*                           0,                              Default value, will be set when the file is opened.
+*                           Data length,                    Must be set to the data length when transmitting data from
+*                                                           the memory
+*
+*                   (f) 'ConnDataPtr'
+*                           This is a pointer available for the upper application when memory block must be allocated
+*                           to process the connection request. If memory is allocated by the upper application, the memory
+*                           space can be deallocated into another hook function.
+*********************************************************************************************************
+*/
+
+static  void  HTTPs_ErrHook (const  HTTPs_INSTANCE  *p_instance,
+                                    HTTPs_CONN      *p_conn,
+                             const  void            *p_hook_cfg,
+                                    HTTPs_ERR        err)
+{
+
+    switch (err) {
+        case HTTPs_ERR_FILE_NOT_FOUND:
+             printf("Resource not found: %s.\n\r", p_conn->PathPtr);
+             return;
+
+        default:
+            break;
+    }
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_ConnCloseHook()
+*
+* Description : Called each time a connection is being closed. Allows the upper application to free some
+*               previously allocated memory.
+*
+*
+* Argument(s) : p_instance  Pointer to the HTTPs instance object.
+*
+*               p_conn      Pointer to the HTTPs connection object.
+*
+*               p_hook_cfg  Pointer to hook configuration object.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_Close() via 'p_cfg->HooksPtr->OnConnCloseHook()'
+*
+* Note(s)     : (1) The instance structure is for read-only. It MUST NOT be modified.
+*********************************************************************************************************
+*/
+
+static  void  HTTPs_ConnCloseHook (const  HTTPs_INSTANCE  *p_instance,
+                                          HTTPs_CONN      *p_conn,
+                                   const  void            *p_hook_cfg)
+{
+    /* Nothing to do for this example. */
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/http-s_instance_secure_cfg.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/http-s_instance_secure_cfg.c
new file mode 100644
index 0000000..bb4ccbe
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/http-s_instance_secure_cfg.c
@@ -0,0 +1,1019 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+* Filename      : http-s_instance_secure_cfg.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) All values that are used in this file and are defined in other header files should be
+*               included in this file. Some values could be located in the same file such as task priority
+*               and stack size. This template file assume that the following values are defined in app_cfg.h:
+*
+*                   HTTPs_OS_CFG_INSTANCE_SECURE_TASK_PRIO
+*                   HTTPs_OS_CFG_INSTANCE_SECURE_TASK_STK_SIZE
+*
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                             /* See Note #1.                                         */
+#include  
+
+#include  "http-s_instance_secure_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  HTTPs_HOOK_CFG  HTTPs_Hooks;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        SECURE CONFIGURATION
+* Note(s) : (1) SSL/TLS certificate and key can be acquired either:
+*
+*               (a) From a certificate authority. Acquiring the certificate from an authority should ensure to
+*                   avoid the untrusted warning message to be displayed when accessing the web server.
+*
+*               (b) Generated from a SSL tool such as OpenSSL. This kind of tool generate self-signed certificate
+*                   and the untrusted warning message will be displayed every time the web server is accessed.
+*
+*           (2) Format of the key and certificate. Supported formats are PEM and DER. The value can either be:
+*                   NET_SOCK_SECURE_CERT_KEY_FMT_PEM
+*                   NET_SOCK_SECURE_CERT_KEY_FMT_DER
+*
+*               Note that if the PEM format is used, do not include the  -----BEGIN CERTIFICATE----- ,  -----END
+*               CERTIFICATE----- ,  -----BEGIN RSA PRIVATE KEY-----  or  -----END RSA PRIVATE KEY-----
+*               sections.
+*
+*           (3) The HTTPs_SECURE_CFG structure referenced in argument must exist throughout the lifetime of the
+*               HTTPs server since the certificate and the key are not copied internally and are directly
+*               referenced throughout the HTTPs_SECURE_CFG pointer.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                        /* See Note #1.                                 */
+#define HTTPs_CFG_SECURE_CERT                                    \
+"MIIEEjCCAvqgAwIBAgIBBzANBgkqhkiG9w0BAQUFADAaMRgwFgYDVQQDEw9WYWxp\
+Y29yZS1EQzEtQ0EwHhcNMTEwMzE4MTcwMTQyWhcNMjEwMzE1MTcwMTQyWjCBkDEL\
+MAkGA1UEBhMCVVMxCzAJBgNVBAgTAkNBMQ8wDQYDVQQHEwZJcnZpbmUxHjAcBgNV\
+BAoTFVZhbGljb3JlIFRlY2hub2xvZ2llczEhMB8GA1UEAxMYbGFuLWZ3LTAxLnZh\
+bGljb3JlLmxvY2FsMSAwHgYJKoZIhvcNAQkBFhFhZG1pbkBsb2NhbGRvbWFpbjCC\
+ASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBALwGOahytiwshzz1s/ngxy1+\
++VrXZYjKSEzMYbJCUhK9xA5fz8pGtOZIXI+CasZPSbXv+ZDLGpSpeFnOL49plYRs\
+vmTxg2n3AlZbP6pD9OPU8rmufsTvXAmQGxxIkdmWiXYJk0pbj+U698me6DKMV/sy\
+3ekQaQC2I2nr8uQw8RhuNhhlkWyjBWdXnS2mLNLSan2Jnt8rumtAi3B+vF5Vf0Fa\
+kLJNt45R0f5jjuab+qw4PKMZEQbqe0XTNzkxdD0XNRBdKlajffoZPBJ7xkfuKUA3\
+cMjXKzetABoKvsv+ElfvqlrI9RXvTXy52EaQmVhiOyBHrScq4RbwtDQsd59Qmk0C\
+AwEAAaOB6zCB6DAJBgNVHRMEAjAAMBEGCWCGSAGG+EIBAQQEAwIGQDA0BglghkgB\
+hvhCAQ0EJxYlRWFzeS1SU0EgR2VuZXJhdGVkIFNlcnZlciBDZXJ0aWZpY2F0ZTAd\
+BgNVHQ4EFgQUrq5KF11M9rpKm75nAs+MaiK0niYwUQYDVR0jBEowSIAU2Q9eGjzS\
+LZhvlRRKO6c4Q5ATtuChHqQcMBoxGDAWBgNVBAMTD1ZhbGljb3JlLURDMS1DQYIQ\
+T9aBcT0uXoxJmC0ohp7oSTATBgNVHSUEDDAKBggrBgEFBQcDATALBgNVHQ8EBAMC\
+BaAwDQYJKoZIhvcNAQEFBQADggEBAAUMm/9G+mhxVIYK4anc34FMqu88NQy8lrh0\
+loNfHhIEKnerzMz+nQGidf+KBg5K5U2Jo8e9gVnrzz1gh2RtUFvDjgosGIrgYZMN\
+yreNUD2I7sWtuWFQyEuewbs8h2MECs2xVktkqp5KPmJGCYGhXbi+zuqi/19cIsly\
+yS01kmexwcFMXyX4YOVbG+JFHy1b4zFvWgSDULj14AuKfc8RiZNvMRMWR/Jqlpr5\
+xWQRSmkjuzQMFavs7soZ+kHp9vnFtY2D6gF2cailk0sdG0uuyPBVxEJ2meifG6eb\
+o3FQzdtIrB6oMFHEU00P38SJq+mrDItPDRXNLa2Nrtc1EJtmjws="
+
+                                                                        /* See Note #1.                                 */
+#define HTTPs_CFG_SECURE_KEY                                     \
+"MIIEogIBAAKCAQEAvAY5qHK2LCyHPPWz+eDHLX75WtdliMpITMxhskJSEr3EDl/P\
+yka05khcj4Jqxk9Jte/5kMsalKl4Wc4vj2mVhGy+ZPGDafcCVls/qkP049Tyua5+\
+xO9cCZAbHEiR2ZaJdgmTSluP5Tr3yZ7oMoxX+zLd6RBpALYjaevy5DDxGG42GGWR\
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+AZ6Pseyhj7S9wkI5hZ9SO1gcK4rWrAK/UFOIzzlACr5INr723vw="
+
+
+#define  HTTPs_CFG_SECURE_CERT_LEN      (sizeof(HTTPs_CFG_SECURE_CERT) - 1)
+#define  HTTPs_CFG_SECURE_KEY_LEN       (sizeof(HTTPs_CFG_SECURE_KEY)  - 1)
+
+
+HTTPs_SECURE_CFG  HTTPs_Cfg_InstanceSecure = {
+                                                HTTPs_CFG_SECURE_CERT,              /* Pointer to cert's string.        */
+                                                HTTPs_CFG_SECURE_CERT_LEN,          /* Length of the public cert.       */
+                                                HTTPs_CFG_SECURE_KEY,               /* Pointer to key's string.         */
+                                                HTTPs_CFG_SECURE_KEY_LEN,           /* Length of the key.               */
+                                                NET_SOCK_SECURE_CERT_KEY_FMT_PEM,   /* Format (see note #2):            */
+                                                DEF_NO,                             /* Chained certificate.             */
+                                             };
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TASK CONFIGURATION
+*
+* Note(s) : (1) We recommend you configure the Network Protocol Stack task priorities & HTTP server Instances'
+*               task priorities as follows:
+*
+*               NET_OS_CFG_IF_TX_DEALLOC_TASK_PRIO  (highest priority)
+*
+*               HTTPs_OS_CFG_INSTANCE_TASK_PRIO
+*
+*               NET_OS_CFG_TMR_TASK_PRIO
+*               NET_OS_CFG_IF_RX_TASK_PRIO          (lowest  priority)
+*
+*               We recommend that the uC/TCP-IP Timer task and network interface Receive task be lower
+*               priority than almost all other application tasks; but we recommend that the network
+*               interface Transmit De-allocation task be higher  priority than all application tasks that use
+*               uC/TCP-IP network services.
+*
+*               However better performance can be observed when the web server instance is set with the lowest priority.
+*               Some experimentation could be required to identify the best task priority configuration.
+*
+*           (2) In general, the size of the uC/HTTP-server task stack will depend on the CPU architecture and compiler
+*               used but also the application due to the multiple hook functions available.
+*               The easiest and best method for calculating the maximum stack usage for any task/function should be
+*               performed statically by the compiler or by a static analysis tool since these can calculate function/task
+*               maximum stack usage based on the compiler s actual code generation and optimization settings. So for optimal
+*               task stack configuration, we recommend to invest in a task stack calculator tool compatible with your build
+*               toolchain.
+*               From experience, a stack size of 4KB SHOULD be enough. Certainly, the stack size may be examined and
+*               reduced accordingly once the run-time behavior of the device has been analyzed and additional stack space
+*               deemed to be unnecessary.
+*
+*           (3) If DEF_NULL is passed as the stack pointer start, the stack will be allocated on the
+*               HEAP memory.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  NET_TASK_CFG  HTTPs_TaskCfgInstance_Secure = {
+
+        /* CPU_INT32U    Prio                                                                                           */
+                                                                /* Configure Instance Task priority (See Note #1):      */
+        HTTPs_OS_CFG_INSTANCE_TASK_PRIO,
+                                                                /* MUST be >= Minimum OS Priority                       */
+
+        /* CPU_INT32U    StkSizeBytes                                                                                   */
+                                                                /* Configure instance task size:                        */
+        HTTPs_OS_CFG_INSTANCE_TASK_STK_SIZE,
+                                                                /* MUST be >= Minimum stack size allowed by OS.         */
+
+        /* void    *StkPtr                                                                                              */
+                                                                /* Configure the pointer to base of the stack.          */
+        DEF_NULL
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) Three types of File System are accepted by the uC/HTTP-server and each has its own
+*               configuration structure.
+*
+*                         FS TYPE                FS CFG OBJ
+*                   --------------------    -------------------
+*                   HTTPs_FS_TYPE_NONE   -> HTTPs_CFG_FS_NONE
+*                   HTTPs_FS_TYPE_STATIC -> HTTPS_CFG_FS_STATIC
+*                   HTTPS_FS_TYPE_DYN    -> HTTPS_CFG_FS_DYN
+*
+*               Below are examples for the three File System type.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NO FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) When no File System is present, the uC/HTTP-server needs to know the maximum length a path
+*               to a resource can have so the server can store adequately the URL received in an HTTP
+*               request.
+*********************************************************************************************************
+*/
+
+#if 1
+const  HTTPs_CFG_FS_NONE  HTTPs_CfgFS_None_Secure = {
+
+    /* CPU_INT32U  PathLenMax                                                                                           */
+                                                                /* Configure maximum path length (see note #1):         */
+    256,
+                                                                /* MUST be >= 1                                         */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) The pointer to the File System Network API MUST be defined here. See the 'net_fs.h' file
+*               for the FS API structure required for Network Applications.
+*               If HTTP Static File System is used as File System, the port is already available in
+*               uC-HTTP/Server/FS folder and the API structure is defined as 'HTTPs_FS_API_Static'.
+*********************************************************************************************************
+*/
+
+#if 0
+const  HTTPs_CFG_FS_STATIC  HTTPs_CfgFS_Static_Secure = {
+    /* const  NET_FS_API  *FS_API_Ptr                                                                                   */
+                                                                /* Configure instance FS API pointer (see note #1):     */
+   &HTTPs_FS_API_Static,
+                                                                /* MUST NOT be a NULL                                   */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                              HTTP SERVER FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) The pointer to the File System Network API MUST be defined here. See the 'net_fs.h' file
+*               for the FS API structure required for Network Applications.
+*               If uC/FS is used as File System, the port is already available in uC-TCPIP/FS folder and the
+*               API structure is defined as 'NetFS_API_FS_V4'.
+*
+*           (2) Web server instance uses a working folder where files and sub-folders are located.
+*
+*               (a) It can be set as a null pointer (DEF_NULL), if the file system doesn't support
+*                   'set working folder' functionality but HTML documents and files must be located in the
+*                   default path used by the file system.
+*********************************************************************************************************
+*/
+
+#if 0
+const  HTTPs_CFG_FS_DYN  HTTPs_CfgFS_Dyn_Secure = {
+
+    /* const  NET_FS_API  *FS_API_Ptr                                                                                   */
+                                                                /* Configure instance FS API pointer (see note #1):     */
+   &NetFS_API_FS_V4,
+                                                                /* MUST NOT be a NULL                                   */
+
+    /* CPU_CHAR    *WorkingFolderPtr                                                                                    */
+                                                                /* Configure instance working folder (see note #2):     */
+    HTTPs_CFG_INSTANCE_SECURE_STR_FOLDER_ROOT
+                                                                /* SHOULD be a string pointer                           */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER RX CONFIGURATION
+*
+* Note(s) : (1) (a) The uC-HTTP Server core process, by default, the following header fields :
+*                       Content-Type
+*                       Content-Length
+*                       Transfer-Encoding
+*                       Location
+*                       Connection
+*
+*               (b) Enabling the header feature allows the processing of additional header fields other than the
+*                   the default ones.
+*
+*                   By configuring the right callback functions, the upper application can :
+*
+*                       (1) choose which header field(s) received in an http request message to keep in memory blocks for
+*                           later processing in hook function associated with request received.
+*
+*                       (2) add header field(s) to memory blocks that will be included in http response message by the uC-HTTP
+*                           server core.
+*
+*               (c) To allow the processing of additional header fields in reception, 'HTTPs_CFG_HDR_RX_EN' must be set as 'DEF_ENABLED'.
+*                   See http-s_cfg.h section 'HTTP HEADER FIELD FEATURE' for further informations.
+*
+*           (2) The total number of request header field blocks represents the memory blocks pool available
+*               for all the connections.
+*
+*           (3) Each connection has a maximum number of request header field blocks it can used.
+*
+*               The maximum MUST be equal or less than the total number of request header field blocks (see Note #1).
+*
+*               If no more request header field blocks are available when a connection solicits one, the server will retry at
+*               the next occasion. Therefore, the maximum request header field blocks per connection and the total number
+*               of request header field blocks must be set carefully to optimize performance.
+*
+*           (4) Request header field data length MUST be configured to handle the longest data value the upper application
+*               is expected to receive in an header field.
+*
+*               Only the maximum data length will be kept from a received header field with data longer than the maximum.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_RX_CFG  HTTPs_HdrRxCfg_Secure = {
+
+    /* CPU_INT16U    NbrPerConnMax                                                                                     */
+                                                                /* Configure number of request header field blocks ...  */
+                                                                /* ... (see note #2):                                   */
+    15,
+                                                                /* SHOULD be >= 0                                       */
+
+    /* CPU_INT16U    DataLenMax                                                                                         */
+                                                                /* Configure maximum of request header field data  ...  */
+                                                                /* length (see note #4):                                */
+    128,
+                                                                /* SHOULD be >= 0                                       */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE HEADER TX CONFIGURATION
+*
+* Note(s) : (1) (a) The uC-HTTP Server core process, by default, the following header fields :
+*                       Content-Type
+*                       Content-Length
+*                       Transfer-Encoding
+*                       Location
+*                       Connection
+*
+*               (b) Enabling the header feature allows the processing of additional header fields other than the
+*                   the default ones.
+*
+*                   By configuring the right callback functions, the upper application can :
+*
+*                       (1) choose which header field(s) received in an http request message to keep in memory blocks for
+*                           later processing in hook function associated with request received.
+*
+*                       (2) add header field(s) to memory blocks that will be included in http response message by the uC-HTTP
+*                           server core.
+*
+*               (c) To allow the addition of header fields in transmission, 'HTTPs_CFG_HDR_TX_EN' must be set as 'DEF_ENABLED'.
+*                   See http-s_cfg.h section 'HTTP HEADER FIELD FEATURE' for further informations.
+*
+*           (2) The total number of response header field blocks represents the memory block pools available for all the
+*               connections.
+*
+*           (3) Each connection has a maximum of response header field blocks it can used.
+*
+*               The maximum MUST be equal or less than the total number of response header field blocks (see Note #1).
+*
+*               If no more response header field block is available when a connection solicit one, the server will retry at
+*               the next occasion. Therefore, the maximum of response header field blocks per connection and the total number
+*               of response header field blocks must be set careful to optimize performance.
+*
+*           (4) Response header field data length MUST be configured to handle the longest data value the upper application
+*               is ready to send in an header field.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_HDR_TX_CFG  HTTPs_HdrTxCfg_Secure = {
+
+    /* CPU_INT16U    NbrPerConnMax                                                                                      */
+                                                                /* Configure number of response header field blocks ... */
+                                                                /* ...  (see note #2):                                  */
+    15,
+                                                                /* SHOULD be >= 0                                       */
+
+    /* CPU_INT16U    DataLenMax                                                                                         */
+                                                                /* Configure maximum string length (see note #4):       */
+    128,
+                                                                /* SHOULD be >= 0                                       */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                           HTTP SERVER INSTANCE QUERY STRING CONFIGURATION
+*
+* Note(s) : (1) A Query String is a set of key-value pairs that comes just after the URL and can be used
+*               by a HTTP client to pass additional information relative to the request.
+*
+*               For the uC/HTTP-server to parse a Query String received, the compile-time configuration
+*               HTTPs_CFG_QUERY_STR_EN must be enabled and the Query String configuration object pointer
+*               (HTTPs_QUERY_STR_CFG) must be set in the Instance runtime configuration (HTTPs_CFG).
+*
+*               When enabled, the server will parse the received Query String and saved each field in a
+*               key-value list accessible in the HTTPs_CONN object.
+*
+*               The server also supports fields that are single value (no key-value pair). The value will
+*               still be saved in a key-value pair block, but only the value parameter will be set.
+*
+*           (2) The first parameter 'NbrPerConnMax' of the Query String configuration structure is the number of
+*               fields in the Query String accepted for one HTTP transaction (connection).
+*
+*           (3) The maximum length of the key part of the field must be defined in the second parameter
+*               'KeyLenMax'.
+*               This is the maximum string length the server can accept for a key.
+*
+*           (4) The maximum length of the value part of the field must be defined in the third parameter
+*               'ValLenMax'.
+*               This is the maximum string length the server can accept for a value.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_QUERY_STR_CFG    HTTPs_QueryStrCfg_Secure = {
+    /* CPU_INT16U   NbrPerConnMax                                                                                       */
+                                                                /* Configure number of key value pairs ...              */
+                                                                /* ...  (see note #2):                                  */
+    5,
+                                                                /* SHOULD be >= 1                                       */
+
+    /* CPU_INT16U   KeyLenMax                                                                                           */
+                                                                /* Configure maximum key length ...                     */
+                                                                /* ... (see note #3a):                                  */
+    15,
+                                                                /* SHOULD be > 1                                        */
+
+    /* CPU_INT16U   ValLenMax                                                                                           */
+                                                                /* Configure maximum value length ...                   */
+                                                                /* ... (see note #3b):                                  */
+    20,
+                                                                /* SHOULD be > 1                                        */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE FORM CONFIGURATION
+*
+* Note(s) : (1) (a) Forms in HTML documents are allowed. When the form is posted, the web server will process the POST
+*                   action and will invoke the callback with a list of key-value pairs transmitted.
+*
+*                   Assuming we have an HTML page that look like this:
+*
+*                       
+*                           
+*                               

+*                                   Text Box 1: 

+*                                   Text Box 2: 

+*                                   
+*                               

+*                           
+*                       
+*
+*
+*                   When the client sends the request, the web server should call the callback function with the following
+*                   key pair value items:
+*
+*                       Key-Name: "textbox1",  Key-Value: "Text Box 1 value"
+*                       Key-Name: "textbox2",  Key-Value: "Text Box 2 value"
+*                       Key-Name: "submit",    Key-Value: "Submit"*
+*
+*                   For more information see User Manual section 'Form Submissions'.
+*
+*               (b) Only form method 'POST' action is supported.
+*
+*               (c) 'HTTPs_CFG_FORM_EN' must be set as 'DEF_ENABLED' to enable the web server instance token replacement.
+*                   See http-s_cfg.h section 'HTTP FORM CONFIGURATION' for further information.
+*
+*
+*           (2) (a) Number of control key value pairs must be greater than or equal to the maximum number of inputs
+*                   which can be transmitted by one of your forms contained in your HTML documents.
+*
+*               (b) If the feature is not enabled, this value is not used.
+*
+*
+*           (3) (a) Control name length MUST be configured to handle the longest Key-Name contained in your html documents.
+*
+*               (b) Control value length MUST be configured to handle the longest Key-Value which can be entered by the user
+*                   in your html documents.
+*
+*
+*           (4) (a) Multipart forms MUST be used to transmit large messages such as a file or e-mails message body. HTML pages
+*                   that contain mutlipart forms look like this:
+*
+*                       
+*                           
+*                               

+*                                   Browse file: 

+*                                   
+*                               

+*                           
+*                       
+*
+*               (b) If File upload feature is enabled, the web server will store the file received. If the feature is
+*                   not enabled and a file is received the file will be simply dropped.
+*
+*                   (1) File upload is not yet possible with the Static File System.
+*
+*                   (2) File overwrite must be enabled to allow a file to be received if the file already exists in the folder.
+*
+*                   (3) A folder name need to be specified to indicate where the uploaded files will be saved.
+*
+*                       If you wish to save uploaded files directly in the root web directory, the name folder needs
+*                       to be set as "\\".
+*
+*                       If uploaded files need to be saved inside a subfolder of the root web directory, the folder MUST
+*                       already exist when the HTTP server tries to access it.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_FORM_CFG     HTTPs_FormCfg_Secure = {
+
+    /* CPU_INT16U   NbrPerConnMax                                                                                       */
+                                                                /* Configure number of control key value pairs ...      */
+                                                                /* ...  (see note #2):                                  */
+    15,
+                                                                /* SHOULD be >= 1                                       */
+
+    /* CPU_INT16U   KeyLenMax                                                                                           */
+                                                                /* Configure maximum control name length ...            */
+                                                                /* ... (see note #3a):                                  */
+    10,
+                                                                /* SHOULD be > 1                                        */
+
+    /* CPU_INT16U   ValLenMax                                                                                           */
+                                                                /* Configure maximum control value length ...           */
+                                                                /* ... (see note #3b):                                  */
+    48,
+                                                                /* SHOULD be > 1                                        */
+
+    /* CPU_BOOLEAN  MultipartEn                                                                                         */
+                                                                /* Configure instance Multipart form feature ...        */
+                                                                /* ... (see note #4a):                                  */
+    DEF_ENABLED,
+                                                                /*   DEF_DISABLED     multipart form DISABLED           */
+                                                                /*   DEF_ENABLED      multipart form ENABLED            */
+
+    /* CPU_BOOLEAN  MultipartFileUploadEn                                                                               */
+                                                                /* Configure instance file upload feature ...           */
+                                                                /* ... (see note #4b):                                  */
+    DEF_ENABLED,
+                                                                /*   DEF_DISABLED     File upload DISABLED              */
+                                                                /*   DEF_ENABLED      File upload ENABLED               */
+
+    /*CPU_BOOLEAN   MultipartFileUploadOverWrEn                                                                         */
+                                                                /* Configure instance file overwrite feature ...        */
+                                                                /* ... (see note #4b2):                                 */
+    DEF_ENABLED,
+                                                                /*   DEF_DISABLED     File overwrite DISABLED           */
+                                                                /*   DEF_ENABLED      File overwrite ENABLED            */
+
+    /* CPU_CHAR     *MultipartFileUploadFolderPtr                                                                       */
+                                                                /* Configure instance upload folder (see note #4b3):    */
+    HTTPs_CFG_INSTANCE_SECURE_STR_FOLDER_UPLOAD,
+                                                                /* SHOULD be a string pointer.                          */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             HTTP SERVER INSTANCE TOKEN CONFIGURATION
+*
+* Note(s) : (1) (a) Dynamic content can be inserted in HTML web pages (files having the htm or html suffix) by using
+*                   special tokens being substituted when the page is actually sent to the web browser. Those tokens
+*                   are represented in an HTML document as:
+*
+*                       ${TOKEN_NAME}
+*
+*                   Assuming we have an HTML page that look like this:
+*
+*                       
+*                           
+*                               This system's IP address is ${My_IP_Address}
+*                           
+*                       
+*
+*
+*                   When a web client requests this file, the web server will parse the file, find the ${My_IP_Address}
+*                   token, and pass the string " My_IP_Address " into the callback function. That function will then
+*                   substitute the token for its value, sending the following HTML file to the client:
+*
+*                       
+*                           
+*                               This system's IP address is 135.17.115.215
+*                           
+*                       
+*
+*               (b) 'HTTPs_CFG_TOKEN_PARSE_EN' must be set as 'DEF_ENABLED' to enable the web server instance token
+*                   replacement. See http-s_cfg.h section 'HTTP DYNAMIC TOKEN REPLACEMENT CONFIGURATION' for further
+*                   information.
+*
+*           (2) (a) Each connection that transmits an HTML document requires only one token. So to optimize performance, numbers
+*                   of tokens SHOULD be equally configured to the maximum number of HTML documents that can be transmitted
+*                   simultaneously.
+*
+*               (b) If dynamic token replacement feature is enabled, number of tokens must be greater than or equal to
+*                   one.
+*
+*           (3) (a) The web server reserves a value buffer for each token which is passed to the callback function to be
+*                   filled with the replacement value. Therefore, the length of the token value must be configured to handle the
+*                   longest value.
+*
+*               (b) If the dynamic token replacement feature is enabled, token value length must be greater than or equal
+*                   to one.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_TOKEN_CFG   HTTPs_TokenCfg_Secure = {
+
+    /* CPU_INT16U   PoolSize                                                                                            */
+                                                                /* Configure instance number of token (see note #2):    */
+    5,
+                                                                /* SHOULD be >= 1                                       */
+
+    /* CPU_INT16U   ValLenMax                                                                                           */
+                                                                /* Configure instance token value length (see note #3): */
+    12,
+                                                                /* SHOULD be >= 1                                       */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               HTTP SERVER INSTANCE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPs_CFG  HTTPs_CfgInstance_Secure = {
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     INSTANCE TASK CONFIGURATION
+*
+* Note(s) : (1) The web server can delay this task periodically to allow other tasks with lower priority to run.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* CPU_INT32U    OS_TaskDly_ms                                                                                      */
+                                                                /* Configure instance task delay ...                    */
+    10,
+                                                                /* ... in integer milliseconds (see Note #1).           */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                INSTANCE LISTEN SOCKET CONFIGURATION
+*
+* Note(s) : (1) Configure socket type. Select which kind of IP addresses can be accepted by the web server instance.
+*
+*                   (a) HTTPs_SOCK_SEL_IPv4:      Accept Only IPv4
+*                   (b) HTTPs_SOCK_SEL_IPv6:      Accept Only IPv6
+*                   (c) HTTPs_SOCK_SEL_IPv4_IPv6: Accept IPv4 and IPv6
+*
+*           (2) (a) 'Secure' field is used to enabled or disable the Secure Sockets Layer (SSL):
+*
+*                           DEF_NULL,                                  the web server instance is not secure and doesn't
+*                                                                      use SSL.
+*
+*                           Point to a secure configuration structure, the web server is secure and uses SSL.
+*
+*               (b) The secure web server can be enabled ONLY if the application project contains a secure module
+*                   supported by uC/TCPIP-V2 such as:
+*
+*                   (i)  NanoSSL provided by Mocana.
+*                   (ii) CyaSSL  provided by YaSSL.
+*
+*           (3) (a) Default HTTP port used by all web browsers is 80. The default port number is defined by the following
+*                   value:
+*
+*                        HTTPs_CFG_DFLT_PORT
+*
+*
+*                   When default port is used the web server instance can be accessed using the IP address of the target
+*                   from any web browser:
+*
+*                       http://
+*
+*                   If the web server instance is configured with the non default port, the instance server should be accessed
+*                   via this kind of address:
+*
+*                       http://:
+*
+*                       Where
+*                            must be replaced by the ip address of the target.
+*                                  must be replaced by the configured port number.
+*
+*               (b) Default secure port used by all browsers is 443. The default secure port number is defined by the
+*                   following value:
+*
+*                       HTTPs_CFG_DFLT_PORT_SECURE
+*
+*                   When default port is used the web server instance can be accessed using the IP address of the target
+*                   from any web browser:
+*
+*                       https://
+*
+*                   If the web server instance is configured with the non default port, the instance server should be accessed
+*                   via this kind of address:
+*
+*                       https://:
+*
+*                       Where
+*                            must be replaced by the ip address of the target.
+*                                  must be replaced by the configured port number.
+*
+*               (c) Port number must be unique, i.e. it's not possible to start two instances with the same
+*                   port number.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_SOCK_SEL    SockSel                                                                                        */
+                                                                /* Configure socket type (see note #1) :                */
+    HTTPs_SOCK_SEL_IPv4_IPv6,
+                                                                /* HTTPs_SOCK_SEL_IPv4       Accept Only IPv4.          */
+                                                                /* HTTPs_SOCK_SEL_IPv6       Accept Only IPv6.          */
+                                                                /* HTTPs_SOCK_SEL_IPv4_IPv6  Accept Only Ipv4 & IPv6.   */
+
+    /* HTTPs_SECURE_CFG    *SecurePtr                                                                                   */
+                                                                /* Configure instance secure configuration (SSL) ...    */
+                                                                /* structure (see note #2):                             */
+   &HTTPs_Cfg_InstanceSecure,
+                                                                /*   DEF_NULL for a non-secure web server.              */
+                                                                /*   Pointer to the secure configuration to be used.    */
+
+    /* CPU_INT16U    Port                                                                                               */
+                                                                /* Configure instance server port (See note #3) :       */
+    HTTPs_CFG_DFLT_PORT_SECURE,
+                                                                /* HTTPs_CFG_DFLT_PORT         Default HTTP     port.   */
+                                                                /* HTTPs_CFG_DFLT_PORT_SECURE  Default HTTP SSL port.   */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE CONNECTION CONFIGURATION
+*
+* Note(s) : (1) (a) 'ConnNbrMax' is used to configure maximum number of connections that the web server will be able to serve
+*                   simultaneously.
+*
+*               (b) Maximum number of connections must be configured following your requirements about the memory usage and
+*                   the number of connections:
+*
+*                   (1) Each connection requires memory space which is reserved at the instance start up. The memory
+*                       required by the web server is greatly affected by the number of connections configured.
+*
+*                   (2) When a client downloads an items such as an html document, image, css file, javascript file, it
+*                       should open a new connection for each of these items. Also, most common web servers can open up to
+*                       15 simultaneous connections. For example, 1 html document which includes 2 images + 1 css file,
+*                       should have 4 connections simultaneously opened.
+*
+*               (c) The number of connections and uC/TCPIP configurations must be set accordingly. Each connection
+*                   requires 1 socket and 1 TCP connection, so the following configuration values located in 'net_cfg.h'
+*                   MUST be correctly configured:
+*
+*                       NET_SOCK_CFG_SOCK_NBR_TCP
+*
+*           (2) For each connection, when the inactivity timeout occurs, the connection is automatically closed with
+*               whatever the last connection state was.
+*
+*           (3) Each connection has a buffer to receive or transmit data and to read files. If the memory is limited the buffer
+*               size can be reduced, but the performance might be impacted.
+*
+*           (4) (a) Enabling the persistent connection feature allows the connection to stay open for multiple HTTP transactions
+*                   before closing. This allows to reduce the traffic because the 3-way-handshake and the closing are done
+*                   only once instead of after each HTTP transactions.
+*
+*               (b) To allow the connection to stay open after HTTP transactions, 'HTTPs_CFG_PERSISTENT_CONN_EN' must be
+*                   set as 'DEF_ENABLED'.
+*                   See http-s_cfg.h section 'HTTP SERVER PERSISTENT CONNECTION CONFIGURATION' for further informations.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* CPU_INT08U    ConnNbrMax                                                                                         */
+                                                                /* Configure maximum number of simultaneous ...         */
+                                                                /* connections (see Note #1):                           */
+    15,
+                                                                /* MUST be >= 1                                         */
+
+    /* CPU_INT16U    ConnInactivityTimeout_s                                                                            */
+                                                                /* Configure connection maximum inactivity timeout ...  */
+                                                                /* ... in integer seconds (see Note #2).                */
+    10,
+                                                                /* SHOULD be >= 1                                       */
+
+    /* CPU_INT16U    BufLen                                                                                             */
+                                                                /* Configure connection buffer length (see note #3):    */
+    1460,
+                                                                /* MUST be >= 512                                       */
+
+    /* CPU_BOOLEAN    ConnPersistentEn                                                                                  */
+                                                                /* Configure persistent conn feature (see note #4):     */
+    DEF_ENABLED,
+                                                                /*   DEF_DISABLED     Persistent Conn support DISABLED  */
+                                                                /*   DEF_ENABLED      Persistent Conn support ENABLED   */
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE FILE SYSTEM CONFIGURATION
+*
+* Note(s) : (1) The parameter 'FS_Type' is used to indicate which type of File System must be used with the HTTP server.
+*               The server supports three type of File System :
+*
+*                   HTTPs_FS_TYPE_NONE   : No File System is present.
+*                   HTTPs_FS_TYPE_STATIC : The Static File System offered with the uC/HTTP-server must be used.
+*                   HTTPs_FS_TYPE_DYN    : A real File System, like uC/FS, must be used.
+*
+*           (2) Each type of File System (see note #1) has it's own File System configuration object.
+*
+*                   HTTPs_CFG_FS_NONE
+*                   HTTPs_CFG_FS_STATIC
+*                   HTTPs_CFG_FS_DYN
+*
+*               See section 'HTTP SERVER FILE SYSTEM CONFIGURATION' for examples for each configuration object type.
+*
+*           (3) The default resource is returned when no resource is specified in the request of the client,
+*               i.e. accessing with only the web server address. Most of the time this resource should be the file
+*               "index.html".
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_FS_TYPE   FS_Type                                                                                          */
+                                                                /* Configure instance FS type (see note #1):            */
+    HTTPs_FS_TYPE_NONE,
+
+    /* const  void  *FS_CfgPtr                                                                                          */
+                                                                /* Configure FS configuration pointer (see note #2):    */
+   &HTTPs_CfgFS_None_Secure,
+
+    /* CPU_CHAR    *DfltResourceNamePtr                                                                                 */
+                                                                /* Configure instance default page (see note #2):       */
+    HTTPs_CFG_INSTANCE_SECURE_STR_FILE_DEFAULT,
+                                                                /* MUST be a string pointer                             */
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE PROXY CONFIGURATION
+*
+* Note(s) : (1) (a) When an HTTP Server is behind an HTTP Proxy, the HTTP client must send its requests with an
+*                    absolute Uniform Resource Identifier (URI).
+*                   For example,
+*                       GET http://example.com/index.html HTTP/1.1
+*
+*                   When the absolute URI feature is enabled, the HTTP server will support absolute URI in the first line
+*                   of the http request messages (see example just above).
+*
+*                   The server will also look for the 'Host' header field in the received request messages and save it in
+*                   the 'HostPtr' field of the HTTPs_CONN structure.
+*
+*               (b) 'HTTPs_CFG_ABSOLUTE_URI_EN' must be set as 'DEF_ENABLED' to enable the web server support of
+*                    absolute URI.
+*                    See the http-s_cfg.h section of 'HTTP PROXY CONFIGURATION' for further information.
+*
+*               (c) The maximum host name length is the maximum length the server will allow for the received host name
+*                   in a request message.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* CPU_INT16U   HostNameLenMax                                                                                      */
+                                                                /* Configure maximum host name length (see note #1c):   */
+    128,
+                                                                /* SHOULD be > 1                                        */
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                           HOOKS CONFIGURATION
+*
+* Note(s) : (1) Multiple hook functions are offered by the uC/HTTP-server stack at different points of the HTTP
+*               transaction processing to personalize the server behavior. See Example Init for all the details on the
+*               hook functions available or online documentation at https://doc.micrium.com/display/httpdoc.
+*               If the application is using some hook functions, a HTTPs_HOOK_CFG object must be created that will
+*               contained all the pointer to the hook functions.
+*               The pointer to the HTTPs_HOOK_CFG object must after be passed to the HTTP-server configuration here.
+*               The parameter can be set to DEF_NULL if no hook functions are necessary for the upper application.
+*
+*           (2) Additional data or configuration specific to the upper application can be necessary inside hook
+*               functions. Therefore a void pointer is offered as second parameter for the hooks configuration.
+*               The parameter can be set to DEF_NULL if not useful.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* const  HTTPs_HOOK_CFG    *HooksPtr                                                                               */
+                                                                /* Configure Pointer to Hooks' Object (see note #1):    */
+   &HTTPs_Hooks,
+
+    /* const  void    *Hooks_CfgPtr                                                                                     */
+                                                                /* Configure Pointer to Application Data Hook.          */
+    DEF_NULL,
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     HEADER FIELD CONFIGURATION
+*
+* Note(s) : (1) To enable the Header feature supports in HTTP request, set the pointer to the Request Header configuration object.
+*               Set to DEF_NULL, if the Request Header feature is not used.
+*
+*               See HTTPs_HdrRxCfg Declaration for more details.
+*
+*           (3) To enable the Header feature supports in HTTP response, set the pointer to the Response Header configuration object.
+*               Set to DEF_NULL, if the Response Header feature is not used.
+*
+*               See HTTPs_HdrTxCfg Declaration for more details.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_HDR_RX_CFG  *HdrRxCfgPtr                                                                                   */
+                                                     /* Pointer to Request header Configuration Object (see note #1):   */
+   &HTTPs_HdrRxCfg_Secure,
+
+    /* HTTPs_HDR_TX_CFG  *HdrTxCfgPtr                                                                                   */
+                                                    /* Pointer to Response header Configuration Object (see note #2):   */
+   &HTTPs_HdrTxCfg_Secure,
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE QUERY STRING CONFIGURATION
+*
+* Note(s) : (1) To enable the Query String feature supports, set the pointer to the Query String configuration object.
+*               Set to DEF_NULL, if Query String feature is not used.
+*
+*               See HTTPs_QueryStrCfg Declaration for more details.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_QUERY_STR_CFG  *QueryStrCfgPtr                                                                             */
+                                                        /* Pointer to Query String Configuration Object (see note #1):  */
+   &HTTPs_QueryStrCfg_Secure,
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE FORM CONFIGURATION
+*
+* Note(s) : (1) To enable the Form feature supports, set the pointer to the Form configuration object.
+*               Set to DEF_NULL, if Form feature is not used.
+*
+*               See HTTPs_FormCfg Declaration for more details.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_FORM_CFG  *FormCfgPtr                                                                                      */
+                                                                /* Pointer to Form Configuration Object (see note #1):  */
+   &HTTPs_FormCfg_Secure,
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                               DYNAMIC TOKEN REPLACEMENT CONFIGURATION
+*
+* Note(s) : (1) To enable the Token feature supports, set the pointer to the Token configuration object.
+*               Set to DEF_NULL, if the Token feature is not used.
+*
+*               See HTTPs_TokenCfg Declaration for more details.
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    /* HTTPs_TOKEN_CFG  *Token_CfgPtr                                                                                   */
+                                                              /* Pointer to Token Configuration Object (see note #1):   */
+   &HTTPs_TokenCfg_Secure,
+
+};                                                              /* End of configuration structure.                      */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/http-s_instance_secure_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/http-s_instance_secure_cfg.h
new file mode 100644
index 0000000..fe56ee6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Examples/SSL-TLS/http-s_instance_secure_cfg.h
@@ -0,0 +1,64 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               HTTP INSTANCE SERVER CONFIGURATION FILE
+*
+* Filename      : http-s_instance_secure_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   FILES & FOLDERS STRING DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_CFG_INSTANCE_SECURE_STR_FOLDER_ROOT               "\\"
+
+#define  HTTPs_CFG_INSTANCE_SECURE_STR_FILE_DEFAULT              "index.html"
+#define  HTTPs_CFG_INSTANCE_SECURE_STR_FILE_ERR_404              "404.html"
+
+#define  HTTPs_CFG_INSTANCE_SECURE_STR_FOLDER_UPLOAD             "\\"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                   HTTP SERVER INSTANCE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_TASK_CFG  HTTPs_TaskCfgInstance_Secure;
+extern  const  HTTPs_CFG     HTTPs_CfgInstance_Secure;
+
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Script/GenerateFS.py b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Script/GenerateFS.py
new file mode 100644
index 0000000..ba9ca24
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Script/GenerateFS.py
@@ -0,0 +1,313 @@
+#! /usr/bin/env python
+
+#    General imports
+import re
+import os
+import io
+import sys
+import logging
+import argparse
+
+#    Specific imports
+from itertools import islice
+from collections import namedtuple
+from string import Template
+
+FORMAT = '%(message)s'
+logging.basicConfig(format=FORMAT, level=logging.ERROR)
+
+TEMPLATE_FUNCTION_NAME = 'GeneratedFS_FileAdd'
+
+#    This section defines the working material for the generation section
+
+#    Define the working structure of the generator
+Header        = namedtuple("Header",         "macro name data")
+#    Define a lighter version of the structure above.
+#    This version allows the garbage collector to dispose of the used
+#    file binary data
+LightHeader = namedtuple("LightHeader", "macro name")
+
+#    Template of the include guard. (Mostly wraps the content of a header file)
+includeGuardTemplate     = "#ifndef {macro}_H\n#define {macro}_H\n\n{content}\n\n#endif /* {macro}_H */"
+
+#    Template of a file's constants definitions. (_NAME, CONTENT, _SIZE)
+headerTemplate           = "#define {macro}_NAME \"{name}\"\n#define {macro}_CONTENT \"{content}\"\n#define {macro}_SIZE (sizeof({macro}_CONTENT)-1)"
+guardedHeaderTemplate    = includeGuardTemplate.format(macro="{macro}", content=headerTemplate)
+
+#    Template of the globale include file definition.
+addToFSHeaderTemplate    = "{content}\n\nCPU_BOOLEAN %s();" % TEMPLATE_FUNCTION_NAME
+guardedFSHeaderTemplate    = includeGuardTemplate.format(macro="{macro}", content=addToFSHeaderTemplate)
+
+#    Template of a single include.
+includeTemplate      = "#include \"{name}.h\""
+#    Template of the name of the header files
+headerNameTemplate   = "{name}.h"
+
+#    Template of the add to DYNAMIC file system.
+addToFSTemplate      = "#include \n#include \n#include \n#include \"generated_fs.h\"\n\nCPU_BOOLEAN %s() {{\n    FS_ERR  err;\n    FS_FILE *file;\n\n{create_dirs}\n{create_files}\n    return (DEF_TRUE);\n}}" % TEMPLATE_FUNCTION_NAME
+#    Templates to create the file and the folders in the DYNAMIC file system
+createFileTemplate   = "    file = FSFile_Open({macro}_NAME, FS_FILE_ACCESS_MODE_WR | FS_FILE_ACCESS_MODE_CREATE, &err);\n    if(err != FS_ERR_NONE) {{\n        return (DEF_FALSE);\n    }}\n    FSFile_Wr(file, {macro}_CONTENT, {macro}_SIZE, &err);\n    FSFile_Close(file, &err);\n    if(err != FS_ERR_NONE) {{\n        return (DEF_FALSE);\n    }}"
+createDirTemplate     = "    FSEntry_Create(\"{name}\", FS_ENTRY_TYPE_DIR, DEF_YES, &err);\n    if(err != FS_ERR_NONE) {{\n        return (DEF_FALSE);\n    }}"
+
+#    Template of the add to STATIC file system.
+#buildStaticFSTemplate= "#include  \n#include \"generated_fs.h\"\n\nCPU_BOOLEAN %s() {{\n{create_files}\n    return (DEF_TRUE);\n}}" % TEMPLATE_FUNCTION_NAME
+
+buildStaticFSTemplate='''
+#include  
+#include  "generated_fs.h"
+#include  
+
+typedef  struct  gen_file_desc {{
+    CPU_CHAR    *Name;
+    CPU_CHAR    *Content;
+    CPU_INT32U   Size;
+}} GEN_FILE_DESC;
+
+static  const  GEN_FILE_DESC  FileTbl[] = {{
+{create_files}
+    {{0, 0, 0}}
+}};
+
+CPU_BOOLEAN GeneratedFS_FileAdd() {{
+    const  GEN_FILE_DESC  *p_file_desc = &FileTbl[0];
+           CPU_BOOLEAN     result      = DEF_OK;
+
+
+    while ((p_file_desc->Name != 0) && (result == DEF_OK)) {{
+        result = HTTPs_FS_AddFile(p_file_desc->Name, p_file_desc->Content, p_file_desc->Size);
+        p_file_desc++;
+    }}
+
+    return (result);
+}}
+'''
+
+#    Template to add a file to the STATIC file system.
+createStaticFile     = "    {{{macro}_NAME, {name_gap}{macro}_CONTENT, {content_gap}{macro}_SIZE}},"
+
+#    This function reads a file by "n" bytes
+def readBytes(filename, n):
+    with open(filename, "rb") as file:
+        l = file.read(n)
+        while len(l) == n:
+            yield l
+            l = file.read(n)
+        yield l
+    # end with
+#end readBytes()
+
+#    This function formats the content string of the file.
+def buildData(filename, n):
+    return '\"\\\n\"'.join([''.join(["\\x{0:02x}".format(b) for b in chunk]) for chunk in readBytes(filename, n)])
+# end buildData()
+
+def FinalFileNameGet(destinationPath):
+    m    = re.search(r'[^\\/]',      destinationPath)
+    name = re.sub(r'[. \\/-]+', "_", destinationPath[m.start():]);
+
+    if re.match(r'[^a-zA-Z_]',name[:1]) != None:
+        name = "_"+name
+    # end if
+
+    return (name)
+# end destinationPath()
+
+#    Builds and header structure from a given file and a destination folder.
+def buildHeaderFromFile(filename, destinationPath, relativePath):
+    logging.debug('filename        = %s' % filename)
+    logging.debug('destinationPath = %s' % destinationPath)
+    logging.debug('relativePath    = %s' % relativePath)
+
+    name = FinalFileNameGet(destinationPath)
+
+    logging.debug('name            = %s' % name)
+
+    macro           = name.upper()
+    formattedData   = buildData(filename, 20)
+    formattedHeader = guardedHeaderTemplate.format(macro=macro, name=relativePath, content=formattedData)
+    return Header(macro=macro, name=name, data=formattedHeader)
+# end buildHeaderFromFile()
+
+#    Formats path char to escape the backslashes
+def formatPathChar(c):
+    if c == '\\' or c == '/':
+        return '\\\\'
+    else:
+        return c
+    # end if
+# end formatPathChar()
+
+#    Translate a given rooted path into a relative path and escape the backslashes.
+def createFSPath(path):
+    logging.debug('path = %s' % path)
+    return ''.join([formatPathChar(c) for c in path])
+# end createFSPath()
+
+#    Enumerates the sub directories of a given path
+def getSubDirs(file_list):
+    logging.debug('path = %s' % file_list)
+
+    directory_dict = {}
+
+    for relative_path, source_path, destination_path in file_list:
+        path_list = relative_path.split(os.sep)
+
+        logging.debug('len(path_list) = %d' % len(path_list))
+        if (len(path_list) > 0):
+
+            for ix in range(0, len(path_list) - 1):
+                directory = os.sep.join(path_list[0:ix+1])
+
+                if (directory not in directory_dict):
+                    directory_dict[directory] = createFSPath(directory)
+                # end if
+            # end ofr
+        # end if
+    # end for
+
+    key_list = list(directory_dict.keys())
+    key_list.sort()
+
+    for key in key_list:
+        yield directory_dict[key]
+    # end for
+# end getSubDirs()
+
+#    Writes the given string at the given file path
+def writeFile(p, s):
+    with open(p, "w+") as f:
+        f.write(s)
+    # end with
+# end writeFile
+
+
+
+def Generate(sourceDir, generateDir, fsType, exclude_template=False, force=False):
+    #    List of the generated headers
+    generatedHeaders = []
+
+    #    GENERATION SECTION
+
+    #    Create the generated directory if it doesn't exist
+    try:
+        os.makedirs(generateDir)
+    except OSError as exc:
+        #    the directory already exists.
+        pass
+    # end try
+
+    # Get file list
+    file_list = []
+
+    if (os.path.isdir(sourceDir)):
+        source_dir_real = os.path.realpath(sourceDir)
+        logging.debug('source_dir_real = %s' % source_dir_real)
+        for path, subdirs, files in os.walk(sourceDir):
+            for name in files:
+                source_path      = os.path.realpath(os.path.join(path, name))
+                relative_path    = os.path.relpath(source_path, source_dir_real)
+                destination_path = FinalFileNameGet(createFSPath(relative_path))
+
+                logging.debug('%s : %s' % (relative_path, source_path))
+                file_list.append((relative_path, source_path, destination_path))
+            # end for
+        #end for
+    else:
+        source_path      = os.path.realpath(sourceDir)
+        relative_path    = os.path.basename(sourceDir)
+        destination_path = FinalFileNameGet(createFSPath(relative_path))
+        file_list.append((relative_path, source_path, destination_path))
+    # end if
+
+    logging.debug('\n%s' % str(file_list))
+
+    # Check for existing files. Do not overwrite file unless --force is specified.
+    existing_file_list = []
+    for relative_path, source_path, destination_path in file_list:
+        dest_file_path = os.path.join(generateDir, destination_path + '.h')
+        if (os.path.exists(dest_file_path)):
+            existing_file_list.append(dest_file_path)
+            logging.debug('Adding %s to existing_file_list.' % dest_file_path)
+        else:
+            logging.debug('%s does not exists' % dest_file_path)
+        # end if
+    # end for
+
+
+    if (len(existing_file_list) > 0) and (force == False):
+        if (len(existing_file_list) == 1):
+            file_plurial  = ''
+            verb_plurial  = 'it'
+            exist_plurial = 's'
+        else:
+            file_plurial  = 's'
+            verb_plurial  = 'they'
+            exist_plurial = ''
+        # end if
+
+        logging.error("fatal: Can't generate the following file%s since %s already exist%s:" % (file_plurial, verb_plurial, exist_plurial))
+        logging.error('  ' + '\n  '.join(existing_file_list))
+        logging.error('\nUse --force to overwrite files.')
+
+        sys.exit(1)
+    # end if
+
+    #    generate the header files
+    for relative_path, source_path, destination_path in file_list:
+        #    remove destination files from the generated directory
+
+        if (os.path.exists(destination_path)):
+            os.remove(destination_path)
+        # end if
+
+        h = buildHeaderFromFile(source_path, destination_path, relative_path)
+
+        generatedHeaders.append(LightHeader(macro=h.macro, name=h.name))
+        headerpath = os.path.join(generateDir, headerNameTemplate.format(name=h.name))
+        writeFile(headerpath, h.data)
+        print(headerpath)
+    #end for
+
+    if (exclude_template == False):
+        #    Generate the appropriate add to fs function content.
+        if fsType == "dynamic":
+            dirCreateBlock  = "\n".join([createDirTemplate.format(name=dir) for dir in sorted(set(getSubDirs(file_list)))]);
+            fileCreateBlock = "\n".join([createFileTemplate.format(macro=h.macro) for h in generatedHeaders])
+            writeFile(os.path.join(generateDir, "generated_fs.c"), addToFSTemplate.format(create_dirs=dirCreateBlock, create_files=fileCreateBlock))
+        elif fsType == "static":
+            max_name_len    = 0
+
+            for h in generatedHeaders:
+                if (len(h.macro) > max_name_len):
+                    max_name_len = len(h.macro)
+                # end if
+            # end for
+
+            fileCreateBlock = "\n".join([createStaticFile.format(macro      =h.macro,
+                                                                 name_gap   =' '*(max_name_len - len(h.macro)),
+                                                                 content_gap=' '*(max_name_len - len(h.macro))) for h in generatedHeaders])
+
+            writeFile(os.path.join(generateDir, "generated_fs.c"), buildStaticFSTemplate.format(create_files=fileCreateBlock))
+        # end if
+
+
+        #    Include all the generated headers files in the generated files header.
+        includeBlock = '\n'.join([includeTemplate.format(name=h.name) for h in generatedHeaders])
+        writeFile(os.path.join(generateDir, "generated_fs.h"), guardedFSHeaderTemplate.format(macro="GENERATED_FS", content=includeBlock));
+    # end if
+# end Generate()
+
+# If called from command line
+if __name__ == '__main__':
+    #    This section parses the input arguments
+    parser = argparse.ArgumentParser()
+    parser.add_argument("source",   metavar='source',          help="Source Folder or File.")
+    parser.add_argument("generateDir", metavar='target_folder',          help="Destination for generated files.")
+    #parser.add_argument("fsType",      choices=['static', 'dynamic'],    help="Type of file-system to be used.")
+    parser.add_argument("--exclude-template", "-x", action='store_true', help="Exclude Static and Dynamic FS %s()." % TEMPLATE_FUNCTION_NAME)
+    parser.add_argument("--force", "-f",            action='store_true', help="Overwrite generated files.")
+    args = parser.parse_args()
+
+    #Generate(args.source, args.generateDir, args.fsType, args.exclude_template, args.force)
+    Generate(args.source, args.generateDir, 'static', args.exclude_template, args.force)
+# end if
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/Cfg/Template/http-s_fs_static_cfg.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/Cfg/Template/http-s_fs_static_cfg.h
new file mode 100644
index 0000000..666a1ae
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/Cfg/Template/http-s_fs_static_cfg.h
@@ -0,0 +1,56 @@
+/*
+*********************************************************************************************************
+*                                              uC/HTTPs
+*                                 Hypertext Transfer Protocol (server)
+*
+*                          (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/HTTPs is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at: https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+/*
+*********************************************************************************************************
+*
+*                                     NET FS STATIC CONFIGURATION
+*
+* Filename      : http-s_fs_static_cfg.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*********************************************************************************************************
+*/
+
+#ifndef HTTPs_FS_STATIC_CFG_MODULE_PRESENT
+#define HTTPs_FS_STATIC_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             NET FS CFG
+*********************************************************************************************************
+*/
+
+                                                                /* Configure external argument check feature ...        */
+#define  HTTPs_FS_CFG_ARG_CHK_EXT_EN                     DEF_ENABLED
+                                                                /*   DEF_DISABLED     External argument check DISABLED  */
+                                                                /*   DEF_ENABLED      External argument check ENABLED   */
+
+
+#define  HTTPs_FS_CFG_MAX_FILE_NAME_LEN                  256    /* Configure maximum file name length.                  */
+#define  HTTPs_FS_CFG_NBR_FILES                           15    /* Configure number of files.                           */
+#define  HTTPs_FS_CFG_NBR_DIRS                             1    /* Configure number of directories.                     */
+
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/http-s_fs_static.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/http-s_fs_static.c
new file mode 100644
index 0000000..ae7c0a7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/http-s_fs_static.c
@@ -0,0 +1,1571 @@
+/*
+*********************************************************************************************************
+*                                              uC/HTTPs
+*                                 Hypertext Transfer Protocol (server)
+*
+*                          (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/HTTPs is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at: https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NET FILE SYSTEM PORT
+*
+*                                        HTTPs STATIC FILE SYSTEM
+*
+* Filename      : http-s_fs_static.c
+* Version       : V3.00.02
+* Programmer(s) : SR
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) All files MUST be added prior to the first file or directory access.
+*
+*                 (2) The application is responsible for validating file name compatibility with external
+*                     code modules, if additional restrictions must be imposed (e.g., certain characters
+*                     are not allowed).
+*
+*                     (a) Importantly, file names should use ONLY the selected path separator character,
+*                         ASCII_CHAR_REVERSE_SOLIDUS (= '\\'), to separate path components.  This software
+*                         does not check for the common alternative, ASCII_CHAR_SOLIDUS (= '/'), when
+*                         parsing file names, so any ASCII_CHAR_SOLIDUS character will be considered part
+*                         of the file name component in which it is embedded.  This may break external
+*                         code modules that convert names from this module's convention to the other.
+*
+*                 (3) Should be compatible with the following TCP/IP application versions (or more recent):
+*
+*                     (a) uC/HTTPs V2.00.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    HTTPs_FS_STATIC_MODULE
+
+#include  "http-s_fs_static.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_FS_PATH_SEP_CHAR                 ASCII_CHAR_REVERSE_SOLIDUS
+
+#define  HTTPs_FS_SEEK_ORIGIN_START                        1u     /* Origin is beginning of file.                         */
+#define  HTTPs_FS_SEEK_ORIGIN_CUR                          2u     /* Origin is current file position.                     */
+#define  HTTPs_FS_SEEK_ORIGIN_END                          3u     /* Origin is end of file.                               */
+
+#define  NET_FS_ENTRY_ATTRIB_RD                 DEF_BIT_00      /* Entry is readable.                                   */
+#define  NET_FS_ENTRY_ATTRIB_WR                 DEF_BIT_01      /* Entry is writeable.                                  */
+#define  NET_FS_ENTRY_ATTRIB_HIDDEN             DEF_BIT_02      /* Entry is hidden from user-level processes.           */
+#define  NET_FS_ENTRY_ATTRIB_DIR                DEF_BIT_03      /* Entry is a directory.                                */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         FILE DATA DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_fs_file_data {
+    CPU_CHAR           *NamePtr;                                /* Ptr to file name.                                    */
+    void               *DataPtr;                                /* Ptr to file data.                                    */
+    CPU_INT32S          Size;                                   /* Size of file, in octets.                             */
+    CPU_SIZE_T          NameSimilarity;                         /* Max similarity between name & prev file name.        */
+} HTTPs_FS_FILE_DATA;
+
+/*
+*********************************************************************************************************
+*                                           FILE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_fs_file {
+    HTTPs_FS_FILE_DATA  *FileDataPtr;                           /* Ptr to file info.                                    */
+    CPU_INT32S           Pos;                                   /* File pos, in octets.                                 */
+} HTTPs_FS_FILE;
+
+
+/*
+*********************************************************************************************************
+*                                         DIRECTORY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_fs_dir {
+    CPU_INT16U          FileDataIxFirst;                        /* File info ix first.                                  */
+    CPU_INT16U          FileDataIxNext;                         /* File info ix next.                                   */
+    CPU_SIZE_T          DirNameLen;                             /* Len of dir name.                                     */
+} HTTPs_FS_DIR;
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  HTTPs_FS_FILE       HTTPs_FS_FileTbl[HTTPs_FS_CFG_NBR_FILES];       /* Info about open files.                   */
+
+static  HTTPs_FS_FILE_DATA  HTTPs_FS_FileDataTbl[HTTPs_FS_CFG_NBR_FILES];   /* Data about files on file system.         */
+
+static  HTTPs_FS_DIR        HTTPs_FS_DirTbl[HTTPs_FS_CFG_NBR_DIRS];         /* Info about open dirs.                    */
+
+static  CPU_INT16U          HTTPs_FS_FileAddedCnt;                          /* Nbr of files added.                      */
+
+static  NET_FS_DATE_TIME    HTTPs_FS_Time;                                  /* Date/time of files and directories.      */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void         *HTTPs_FS_DirOpen              (CPU_CHAR            *p_name);
+
+static  void          HTTPs_FS_DirClose             (void                *p_dir);
+
+static  CPU_BOOLEAN   HTTPs_FS_DirRd                (void                *p_dir,
+                                                     NET_FS_ENTRY        *p_entry);
+
+static  CPU_BOOLEAN   HTTPs_FS_EntryCreate          (CPU_CHAR            *p_name,
+                                                     CPU_BOOLEAN          dir);
+
+static  CPU_BOOLEAN   HTTPs_FS_EntryDel             (CPU_CHAR            *p_name,
+                                                     CPU_BOOLEAN          file);
+
+static  CPU_BOOLEAN   HTTPs_FS_EntryRename          (CPU_CHAR            *p_name_old,
+                                                     CPU_CHAR            *p_name_new);
+
+static  CPU_BOOLEAN   HTTPs_FS_EntryTimeSet         (CPU_CHAR            *p_name,
+                                                     NET_FS_DATE_TIME    *p_time);
+
+static  CPU_BOOLEAN   HTTPs_WorkingFolderGet        (CPU_CHAR            *p_path,
+                                                     CPU_SIZE_T           path_len_max);
+
+static  CPU_BOOLEAN   HTTPs_WorkingFolderSet        (CPU_CHAR            *p_path);
+
+static  CPU_INT32U    HTTPs_FS_CfgPathGetLenMax     (void);
+
+static  CPU_CHAR      HTTPs_FS_CfgPathGetSepChar    (void);
+
+static  void         *HTTPs_FS_FileOpen             (CPU_CHAR            *p_name,
+                                                     NET_FS_FILE_MODE     mode,
+                                                     NET_FS_FILE_ACCESS   access);
+
+static  void          HTTPs_FS_FileClose            (void                *p_file);
+
+static  CPU_BOOLEAN   HTTPs_FS_FileRd               (void                *p_file,
+                                                     void                *p_dest,
+                                                     CPU_SIZE_T           size,
+                                                     CPU_SIZE_T          *p_size_rd);
+
+static  CPU_BOOLEAN   HTTPs_FS_FileWr               (void                *p_file,
+                                                     void                *p_src,
+                                                     CPU_SIZE_T           size,
+                                                     CPU_SIZE_T          *p_size_wr);
+
+static  CPU_BOOLEAN   HTTPs_FS_FilePosSet           (void                *p_file,
+                                                     CPU_INT32S           offset,
+                                                     CPU_INT08U           origin);
+
+static  CPU_BOOLEAN   HTTPs_FS_FileSizeGet          (void                *p_file,
+                                                     CPU_INT32U          *p_size);
+
+static  CPU_BOOLEAN   HTTPs_FS_FileDateTimeCreateGet(void                *p_file,
+                                                     NET_FS_DATE_TIME    *p_time);
+
+static  CPU_SIZE_T    HTTPs_FS_CalcSimilarity      (CPU_CHAR             *p_name_1,
+                                                    CPU_CHAR             *p_name_2);
+
+
+/*
+*********************************************************************************************************
+*                                           FILE SYSTEM API
+*
+* Note(s) : (1) File system API structures are used by network applications during calls.  This API structure
+*               allows network application to call specific file system functions via function pointer instead
+*               of by name.  This enables the network application suite to compile & operate with multiple
+*               file system.
+*
+*           (2) In most cases, the API structure provided below SHOULD suffice for most network application
+*               exactly as is with the exception that the API structure's name which MUST be unique &
+*               SHOULD clearly identify the file system being implemented.  For example, the Micrium file system
+*               V4's API structure should be named HTTPs_FS_API_FS_V4[].
+*
+*               The API structure MUST also be externally declared in the File system port header file
+*               ('net_fs_&&&.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+                                                                            /* Net FS static API fnct ptrs :               */
+const  NET_FS_API  HTTPs_FS_API_Static = {
+                                           HTTPs_FS_CfgPathGetLenMax,       /*   Path max len.                             */
+                                           HTTPs_FS_CfgPathGetSepChar,      /*   Path sep char.                            */
+                                           HTTPs_FS_FileOpen,               /*   Open                                      */
+                                           HTTPs_FS_FileClose,              /*   Close                                     */
+                                           HTTPs_FS_FileRd,                 /*   Rd                                        */
+                                           HTTPs_FS_FileWr,                 /*   Wr                                        */
+                                           HTTPs_FS_FilePosSet,             /*   Set Position                              */
+                                           HTTPs_FS_FileSizeGet,            /*   Get Size                                  */
+                                           HTTPs_FS_DirOpen,                /*   Open directory.                           */
+                                           HTTPs_FS_DirClose,               /*   Close directory.                          */
+                                           HTTPs_FS_DirRd,                  /*   Read directory.                           */
+                                           HTTPs_FS_EntryCreate,            /*   Entry create.                             */
+                                           HTTPs_FS_EntryDel,               /*   Entry delete.                             */
+                                           HTTPs_FS_EntryRename,            /*   Entry rename.                             */
+                                           HTTPs_FS_EntryTimeSet,           /*   Entry time set.                           */
+                                           HTTPs_FS_FileDateTimeCreateGet,  /*   Create a date time.                       */
+                                           HTTPs_WorkingFolderGet,          /*   Get working folder.                       */
+                                           HTTPs_WorkingFolderSet,          /*   Set working folder.                       */
+                                         };
+
+
+
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPs_WorkingFolderGet()
+*
+* Description : Get current working folder.
+*
+* Argument(s) : p_path          Pointer to string that will receive the working folder.
+*
+*               path_len_max    Maximum length of the string.
+*
+* Return(s)   : DEF_OK,   if p_path successfully copied.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_WorkingFolderGet (CPU_CHAR    *p_path,
+                                             CPU_SIZE_T   path_len_max)
+{
+   *p_path = ASCII_CHAR_NULL;
+
+   return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPs_WorkingFolderSet()
+*
+* Description : Set current working folder.
+*
+* Argument(s) : p_path  Pointer to string that contains the working path to use.
+*
+* Return(s)   : DEF_OK,   if p_path successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_WorkingFolderSet (CPU_CHAR  *p_path)
+{
+    if (p_path[0] != ASCII_CHAR_NULL) {
+        return (DEF_FAIL);
+    }
+
+   return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPs_FS_CfgPathGetLenMax()
+*
+* Description : Get maximum path length
+*
+* Argument(s) : none.
+*
+* Return(s)   : maximum path length.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  HTTPs_FS_CfgPathGetLenMax (void)
+{
+    return ((CPU_INT32U)HTTPs_FS_CFG_MAX_FILE_NAME_LEN);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPs_FS_CfgPathGetSepChar()
+*
+* Description : Get path separator character
+*
+* Argument(s) : none.
+*
+* Return(s)   : separator character.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_CHAR  HTTPs_FS_CfgPathGetSepChar (void)
+{
+    return ((CPU_CHAR)HTTPs_FS_PATH_SEP_CHAR);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            HTTPs_FS_Init()
+*
+* Description : Initialize the static file system.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK,   if file system initialized.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a HTTPs server application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Notes       : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPs_FS_Init (void)
+{
+    HTTPs_FS_DIR        *p_dir;
+    HTTPs_FS_FILE       *p_file;
+    HTTPs_FS_FILE_DATA  *p_file_data;
+    CPU_INT16U           i;
+
+
+                                                                /* -------------------- INIT FILES -------------------- */
+    for (i = 0u; i < HTTPs_FS_CFG_NBR_FILES; i++) {
+        p_file = &HTTPs_FS_FileTbl[i];
+
+        p_file->FileDataPtr = (HTTPs_FS_FILE_DATA *)0;
+        p_file->Pos         =  0u;
+    }
+
+    HTTPs_FS_FileAddedCnt = 0u;
+
+
+
+                                                                /* ------------------ INIT FILE INFO ------------------ */
+    for (i = 0u; i < HTTPs_FS_CFG_NBR_FILES; i++) {
+        p_file_data = &HTTPs_FS_FileDataTbl[i];
+
+        p_file_data->NamePtr        = (CPU_CHAR *)0;
+        p_file_data->DataPtr        = (void     *)0;
+        p_file_data->Size           =  0u;
+        p_file_data->NameSimilarity =  0u;
+    }
+
+
+
+                                                                /* --------------------- INIT DIRS -------------------- */
+    for (i = 0u; i < HTTPs_FS_CFG_NBR_DIRS; i++) {
+        p_dir                  = &HTTPs_FS_DirTbl[i];
+
+        p_dir->FileDataIxFirst =  DEF_INT_16U_MAX_VAL;
+        p_dir->FileDataIxNext  =  DEF_INT_16U_MAX_VAL;
+        p_dir->DirNameLen      =  0u;
+    }
+
+
+
+                                                                /* --------------------- INIT TIME -------------------- */
+    HTTPs_FS_Time.Sec   = 0u;
+    HTTPs_FS_Time.Min   = 0u;
+    HTTPs_FS_Time.Hr    = 0u;
+    HTTPs_FS_Time.Day   = 0u;
+    HTTPs_FS_Time.Month = 0u;
+    HTTPs_FS_Time.Yr    = 0u;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_FS_AddFile()
+*
+* Description : Add a file to the static file system.
+*
+* Argument(s) : p_name  Name of the file.
+*
+*               p_data  Pointer to buffer holding file data.
+*
+*               size    Size of file, in octets.
+*
+* Return(s)   : DEF_OK,   if file added.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a HTTPs server application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) The file name ...
+*                   (a) MUST begin with a path separator character.
+*                   (b) MUST be no longer than HTTPs_FS_MAX_PATH_NAME_LEN.
+*                   (c) MUST not end with a path separator character.
+*                   (d) MUST not duplicate the parent directory of a file already added.
+*                   (e) MUST not duplicate a file already added.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPs_FS_AddFile (CPU_CHAR    *p_name,
+                               void        *p_data,
+                               CPU_INT32U   size)
+
+{
+    CPU_CHAR            *p_filename;
+    CPU_INT16S           cmp_val;
+    HTTPs_FS_FILE_DATA  *p_file_data;
+    CPU_INT16U           i;
+    CPU_SIZE_T           len;
+    CPU_SIZE_T           similarity;
+    CPU_SIZE_T           similarity_max;
+
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_name == (CPU_CHAR *)0) {                              /* Validate NULL name.                                  */
+        return (DEF_FAIL);
+    }
+    if (p_data == (void *)0) {                                  /* Validate NULL buf.                                   */
+        return (DEF_FAIL);
+    }
+#endif
+
+    p_filename = p_name;
+    if (p_filename[0] == HTTPs_FS_PATH_SEP_CHAR) {              /* Require init path sep char (see Note #1a).           */
+        p_filename++;
+    }
+
+                                                                /* Validate name len (see Note #1b).                    */
+    len = Str_Len_N(p_filename, HTTPs_FS_CFG_MAX_FILE_NAME_LEN + 1u);
+    if (len > HTTPs_FS_CFG_MAX_FILE_NAME_LEN) {
+        return (DEF_FAIL);
+    }
+
+    if (p_filename[len - 1u] == HTTPs_FS_PATH_SEP_CHAR) {       /* Require final char NOT path sep char (see Note #1c). */
+        return (DEF_FAIL);
+    }
+
+
+
+                                                                /* ----------------- CHK FOR DUP FILE ----------------- */
+    similarity_max =  0u;
+    p_file_data    = &HTTPs_FS_FileDataTbl[0];
+    for (i = 0u; i < HTTPs_FS_FileAddedCnt; i++) {              /* For each file ...                                    */
+                                                                /*               ... chk if name begins with file name..*/
+        cmp_val = Str_CmpIgnoreCase_N(p_file_data->NamePtr, p_filename, len);
+        if (cmp_val == 0) {
+                                                                /*               ... & following char is path sep char..*/
+            if (p_file_data->NamePtr[len] == HTTPs_FS_PATH_SEP_CHAR) {
+                return (DEF_FAIL);                              /* (see Note #1d)       ... file is name of parent dir. */
+
+                                                                /*               ... if following char is NULL        ..*/
+            } else if (p_file_data->NamePtr[len] == ASCII_CHAR_NULL) {
+                return (DEF_FAIL);                              /* (see Note #1e)       ... file dup's file name.       */
+            }
+        }
+
+        similarity = HTTPs_FS_CalcSimilarity(p_filename, p_file_data->NamePtr);
+        if (similarity_max < similarity) {
+            similarity_max = similarity;
+        }
+
+        p_file_data++;
+    }
+
+
+
+                                                                /* ---------------- FIND FREE FILE DATA --------------- */
+    if (HTTPs_FS_FileAddedCnt >= HTTPs_FS_CFG_NBR_FILES) {
+        return (DEF_FAIL);
+    }
+
+    p_file_data = &HTTPs_FS_FileDataTbl[HTTPs_FS_FileAddedCnt];
+    HTTPs_FS_FileAddedCnt++;
+
+
+
+                                                                /* --------------------- ADD FILE --------------------- */
+    p_file_data->NamePtr        = p_filename;                   /* Populate file data.                                  */
+    p_file_data->DataPtr        = p_data;
+    p_file_data->Size           = size;
+    p_file_data->NameSimilarity = similarity_max;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_FS_SetTime()
+*
+* Description : Set date/time of files and directories.
+*
+* Argument(s) : p_time  Pointer to date/time to set.
+*
+* Return(s)   : DEF_OK,   if time set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : (1) This time will be returned in the directory entry for ALL files and directories.
+*
+*               (2) #### Validate date/time members.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPs_FS_SetTime (NET_FS_DATE_TIME  *p_time)
+{
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE DATE/TIME PTR -------------- */
+    if (p_time == (NET_FS_DATE_TIME *)0) {                     /* Validate NULL date/time.                             */
+        return (DEF_FAIL);
+    }
+#endif
+
+
+
+                                                                /* --------------------- SET TIME --------------------- */
+    HTTPs_FS_Time.Sec   = p_time->Sec;
+    HTTPs_FS_Time.Min   = p_time->Min;
+    HTTPs_FS_Time.Hr    = p_time->Hr;
+    HTTPs_FS_Time.Day   = p_time->Day;
+    HTTPs_FS_Time.Month = p_time->Month;
+    HTTPs_FS_Time.Yr    = p_time->Yr;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         DIRECTORY FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_FS_DirOpen()
+*
+* Description : Open a directory.
+*
+* Argument(s) : p_name  Name of the directory.
+*
+* Return(s)   : Pointer to a directory, if NO errors.
+*
+*               Pointer to NULL,        otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) The file search ends when :
+*                   (a) A file lying in the directory 'pname' is found.
+*                   (b) A file with name 'pname' is found.
+*                   (c) All files have been examined.
+*********************************************************************************************************
+*/
+
+void  *HTTPs_FS_DirOpen (CPU_CHAR  *p_name)
+{
+    CPU_INT16S         cmp_val;
+    HTTPs_FS_DIR        *p_dir;
+    CPU_SIZE_T         dir_name_len;
+    HTTPs_FS_FILE_DATA  *p_file_data;
+    CPU_INT16U         file_data_ix;
+    CPU_BOOLEAN        found;
+    CPU_INT16U         i;
+    CPU_CHAR          *p_path_sep;
+    CPU_SR_ALLOC();
+
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE DIR NAME ----------------- */
+    if (p_name == (CPU_CHAR *)0) {                              /* Validate NULL name.                                  */
+        return ((void *)0);
+    }
+#endif
+
+                                                                /* Validate name len.                                   */
+    dir_name_len = Str_Len_N(p_name, HTTPs_FS_CFG_MAX_FILE_NAME_LEN + 1u);
+    if (dir_name_len > HTTPs_FS_CFG_MAX_FILE_NAME_LEN) {
+        return (DEF_FAIL);
+    }
+    if (dir_name_len == 0u) {
+        return (DEF_FAIL);
+    }
+
+    p_path_sep = Str_Char_Last(p_name, HTTPs_FS_PATH_SEP_CHAR);
+    if (p_path_sep != (CPU_CHAR *)0) {
+        if (p_name + dir_name_len - 1u == p_path_sep) {         /* If final dir name char is path sep char ...          */
+            dir_name_len--;                                     /* ... dec dir name len to ignore path sep char.        */
+        }
+    }
+
+
+
+                                                                /* --------------------- OPEN DIR --------------------- */
+    found       =  DEF_NO;
+    p_file_data = &HTTPs_FS_FileDataTbl[0];
+                                                                /* For each file ...                                    */
+    for (file_data_ix = 0u; file_data_ix < HTTPs_FS_FileAddedCnt; file_data_ix++) {
+                                                                /*               ... if name begins with dir name     ..*/
+        cmp_val = Str_CmpIgnoreCase_N(p_file_data->NamePtr, p_name, dir_name_len);
+        if (cmp_val == 0) {
+                                                                /*               ... & following char is path sep char..*/
+            if (p_file_data->NamePtr[dir_name_len] == HTTPs_FS_PATH_SEP_CHAR) {
+                found = DEF_YES;                                /* (see Note #1b)       ... file lies in dir.           */
+                break;
+
+                                                                /*              ... if following char is NULL ...       */
+            } else if (p_file_data->NamePtr[dir_name_len] == ASCII_CHAR_NULL) {
+                return ((void *)0);                             /* (see Note #1c)       ... dir name is file name.      */
+            }
+        }
+
+        p_file_data++;
+    }
+
+    if (found == DEF_NO) {                                      /* If file data NOT found (see Note #1d) ...            */
+        return ((void *)0);                                     /* ... rtn NULL ptr.                                    */
+    }
+
+
+
+                                                                /* ------------------- FIND FREE DIR ------------------ */
+    found =  DEF_NO;
+    p_dir  = &HTTPs_FS_DirTbl[0];
+
+    CPU_CRITICAL_ENTER();
+    for (i = 0u; i < HTTPs_FS_CFG_NBR_FILES; i++) {
+        if (p_dir->FileDataIxFirst == DEF_INT_16U_MAX_VAL) {
+            found = DEF_YES;
+            break;
+        }
+
+        p_dir++;
+    }
+
+    if (found == DEF_NO) {                                      /* If no free dir found ...                             */
+        CPU_CRITICAL_EXIT();
+        return ((void *)0);                                     /* ... rtn NULL ptr.                                    */
+    }
+
+
+
+    p_dir->FileDataIxFirst = file_data_ix;                      /* Populate dir data.                                   */
+    p_dir->FileDataIxNext  = file_data_ix;
+    p_dir->DirNameLen      = dir_name_len;
+    CPU_CRITICAL_EXIT();
+
+    return ((void *)p_dir);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_FS_DirClose()
+*
+* Description : Close a directory.
+*
+* Argument(s) : p_dir   Pointer to a directory.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPs_FS_DirClose (void  *p_dir)
+{
+    HTTPs_FS_DIR  *pdir_fs;
+    CPU_SR_ALLOC();
+
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------ VALIDATE DIR -------------------- */
+    if (p_dir == (void *)0) {                                    /* Validate NULL dir ptr.                               */
+        return;
+    }
+#endif
+
+
+
+                                                                /* --------------------- CLOSE DIR -------------------- */
+    pdir_fs = (HTTPs_FS_DIR *)p_dir;
+
+    CPU_CRITICAL_ENTER();
+    pdir_fs->FileDataIxFirst = DEF_INT_16U_MAX_VAL;
+    pdir_fs->FileDataIxNext  = DEF_INT_16U_MAX_VAL;
+    pdir_fs->DirNameLen      = 0u;
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPs_FS_DirRd()
+*
+* Description : Read a directory entry from a directory.
+*
+* Argument(s) : p_dir       Pointer to a directory.
+*
+*               p_entry     Pointer to variable that will receive directory entry information.
+*
+* Return(s)   : DEF_OK,   if directory entry read.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) If the entry name contains a path separator character after the path separator
+*                   character immediately following directory name, the entry is a directory.
+*
+*               (2) The maximum similarity between the file name & previous file names is a measure of
+*                   the number of shared path components.  If the similarity is greater than the
+*                   directory name length, then either :
+*                   (a) ... the next path component in the file name (a directory name) was returned
+*                           in a previous directory read operation.
+*                   (b) ... the portion of the file name shared with a previous file name was examined
+*                           in a previous directory read operation, but failed to match the directory
+8                           name.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_FS_DirRd (void          *p_dir,
+                                     NET_FS_ENTRY  *p_entry)
+{
+    CPU_INT16S          cmp_val;
+    HTTPs_FS_DIR        *p_dir_fs;
+    HTTPs_FS_FILE_DATA  *p_file_data;
+    CPU_INT16U          file_data_ix;
+    CPU_BOOLEAN         found;
+    CPU_SIZE_T          len;
+    CPU_CHAR           *p_name_entry;
+    CPU_CHAR           *p_name_first;
+    CPU_CHAR           *p_path_sep;
+
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_dir == (void *)0) {                                   /* Validate NULL dir   ptr.                             */
+        return (DEF_FAIL);
+    }
+    if (p_entry == (NET_FS_ENTRY *)0) {                        /* Validate NULL entry ptr.                             */
+        return (DEF_FAIL);
+    }
+#endif
+
+    p_dir_fs     = (HTTPs_FS_DIR *)p_dir;
+    p_name_first =  HTTPs_FS_FileDataTbl[p_dir_fs->FileDataIxFirst].NamePtr;
+
+
+
+                                                                /* --------------- FIND NEXT FILE IN DIR -------------- */
+    found       =  DEF_NO;
+    p_file_data = &HTTPs_FS_FileDataTbl[p_dir_fs->FileDataIxNext];
+                                                                /* For each file ...                                    */
+    for (file_data_ix = p_dir_fs->FileDataIxNext; file_data_ix < HTTPs_FS_FileAddedCnt; file_data_ix++) {
+
+                                                                /*        ... w/ name NOT found prev'ly (see Note #2) ..*/
+        if (p_file_data->NameSimilarity <= p_dir_fs->DirNameLen) {
+
+                                                                /*               ... if name begins with dir name     ..*/
+            cmp_val = Str_CmpIgnoreCase_N(p_file_data->NamePtr, p_name_first, p_dir_fs->DirNameLen);
+            if (cmp_val == 0) {
+                                                                /*               ... & following char is path sep char..*/
+                if (p_file_data->NamePtr[p_dir_fs->DirNameLen] == HTTPs_FS_PATH_SEP_CHAR) {
+                    found = DEF_YES;                            /*                      ... file lies in dir.           */
+                    break;
+                }
+            }
+        }
+
+        p_file_data++;
+    }
+
+    if (found == DEF_NO) {                                      /* If file data NOT found ...                           */
+        return (DEF_FAIL);                                      /* ... end of dir.                                      */
+    }
+
+
+
+                                                                /* ------------------ GET ENTRY INFO ------------------ */
+    p_name_entry = p_file_data->NamePtr + p_dir_fs->DirNameLen + 1u;
+    p_path_sep   = Str_Char_N(p_name_entry, HTTPs_FS_CFG_MAX_FILE_NAME_LEN, HTTPs_FS_PATH_SEP_CHAR);
+    if (p_path_sep == (CPU_CHAR *)0) {                          /* Chk if entry is file ...                             */
+        Str_Copy_N(p_entry->NamePtr, p_name_entry, HTTPs_FS_CFG_MAX_FILE_NAME_LEN);
+        p_entry->Attrib = NET_FS_ENTRY_ATTRIB_RD;
+        p_entry->Size   = p_file_data->Size;
+
+    } else {                                                    /*                      ... or dir (see Note #1).       */
+        len = (CPU_SIZE_T)(p_path_sep - p_name_entry);
+        Str_Copy_N(p_entry->NamePtr, p_name_entry, len);
+        p_entry->Attrib = NET_FS_ENTRY_ATTRIB_RD | NET_FS_ENTRY_ATTRIB_DIR;
+        p_entry->Size   = 0u;
+    }
+
+    p_entry->DateTimeCreate.Sec   = HTTPs_FS_Time.Sec;
+    p_entry->DateTimeCreate.Min   = HTTPs_FS_Time.Min;
+    p_entry->DateTimeCreate.Hr    = HTTPs_FS_Time.Hr;
+    p_entry->DateTimeCreate.Day   = HTTPs_FS_Time.Day;
+    p_entry->DateTimeCreate.Month = HTTPs_FS_Time.Month;
+    p_entry->DateTimeCreate.Yr    = HTTPs_FS_Time.Yr;
+
+
+
+                                                                /* -------------------- UPDATE DIR -------------------- */
+    p_dir_fs->FileDataIxNext = file_data_ix + 1u;
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           ENTRY FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_FS_EntryCreate()
+*
+* Description : Create a file or directory.
+*
+* Argument(s) : p_name  Name of the entry.
+*
+*               dir     Indicates whether the new entry shall be a directory :
+*
+* Return(s)   : DEF_OK,   if entry created.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) Read operations ONLY supported; entry CANNOT be created.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_FS_EntryCreate (CPU_CHAR     *p_name,
+                                           CPU_BOOLEAN   dir)
+{
+   (void)&p_name;                                               /* Prevent 'variable unused' compiler warning.          */
+   (void)&dir;
+
+    return (DEF_FAIL);                                          /* See Note #1.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_FS_EntryDel()
+*
+* Description : Delete a file or directory.
+*
+* Argument(s) : p_name  Name of the entry.
+*
+*               file    Indicates whether the entry MAY be a file :
+*
+* Return(s)   : DEF_OK,   if entry created.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) Read operations ONLY supported; entry CANNOT be deleted.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_FS_EntryDel (CPU_CHAR     *p_name,
+                                        CPU_BOOLEAN   file)
+{
+   (void)&p_name;                                               /* Prevent 'variable unused' compiler warning.          */
+   (void)&file;
+
+                                                                /* #### NET-451                                         */
+
+    return (DEF_FAIL);                                          /* See Note #1.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_FS_EntryRename()
+*
+* Description : Rename a file or directory.
+*
+* Argument(s) : p_name_old  Old path of the entry.
+*
+*               p_name_new  New path of the entry.
+*
+* Return(s)   : DEF_OK,   if entry renamed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) Read operations ONLY supported; entry CANNOT be renamed.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_FS_EntryRename (CPU_CHAR  *p_name_old,
+                                           CPU_CHAR  *p_name_new)
+{
+   (void)&p_name_old;                                           /* Prevent 'variable unused' compiler warning.          */
+   (void)&p_name_new;
+
+    return (DEF_FAIL);                                          /* See Note #1.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_FS_EntryTimeSet()
+*
+* Description : Set a file or directory's date/time.
+*
+* Argument(s) : p_name  Name of the entry.
+*
+*               p_time  Pointer to date/time.
+*
+* Return(s)   : DEF_OK,   if date/time set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) Read operations ONLY supported; entry date/time CANNOT be set.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_FS_EntryTimeSet (CPU_CHAR          *p_name,
+                                            NET_FS_DATE_TIME  *p_time)
+{
+   (void)&p_name;                                               /* Prevent 'variable unused' compiler warning.          */
+   (void)&p_time;
+
+    return (DEF_FAIL);                                          /* See Note #1.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           FILE FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_FS_FileOpen()
+*
+* Description : Open a file.
+*
+* Argument(s) : p_name  Name of the file.
+*
+*               mode    Mode of the file :
+*
+*               access  Access rights of the file :
+*
+* Return(s)   : Pointer to a file, if NO errors.
+*
+*               Pointer to NULL,   otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) Read operations ONLY supported; file can ONLY be opened in a read mode.
+*********************************************************************************************************
+*/
+
+static  void  *HTTPs_FS_FileOpen (CPU_CHAR            *p_name,
+                                  NET_FS_FILE_MODE     mode,
+                                  NET_FS_FILE_ACCESS   access)
+{
+    CPU_INT16S          cmp_val;
+    HTTPs_FS_FILE       *p_file;
+    HTTPs_FS_FILE_DATA  *p_file_data;
+    CPU_BOOLEAN         found;
+    CPU_INT32U          i;
+    CPU_SR_ALLOC();
+
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_name     == (CPU_CHAR *)0) {                          /* Validate NULL name.                                  */
+        return ((void *)0);
+    }
+#endif
+
+
+                                                                /* ------------------- VALIDATE MODE ------------------ */
+    switch (mode) {                                             /* Validate mode (see Note #1).                         */
+        case NET_FS_FILE_MODE_OPEN:
+             break;
+
+
+        case NET_FS_FILE_MODE_APPEND:
+        case NET_FS_FILE_MODE_CREATE:
+        case NET_FS_FILE_MODE_CREATE_NEW:
+        case NET_FS_FILE_MODE_TRUNCATE:
+        default:
+             return (DEF_NULL);
+    }
+
+
+    switch (access) {
+
+        case NET_FS_FILE_ACCESS_RD:
+             break;
+
+
+        case NET_FS_FILE_ACCESS_RD_WR:
+        case NET_FS_FILE_ACCESS_WR:
+        default:
+                                                                /* #### NET-451                                         */
+             return (DEF_NULL);
+    }
+
+
+
+                                                                /* ------------------- FIND FILE DATA ----------------- */
+    found      =  DEF_NO;
+    p_file_data = &HTTPs_FS_FileDataTbl[0];
+    for (i = 0u; i < HTTPs_FS_FileAddedCnt; i++) {
+        cmp_val = Str_CmpIgnoreCase(p_file_data->NamePtr, p_name);
+        if (cmp_val == 0) {
+            found = DEF_YES;
+            break;
+        }
+
+        p_file_data++;
+    }
+
+    if (found == DEF_NO) {                                      /* If file data NOT found ...                           */
+        return ((void *)0);                                     /* ... rtn NULL ptr.                                    */
+    }
+
+
+
+                                                                /* ------------------ FIND FREE FILE ------------------ */
+    found =  DEF_NO;
+    p_file = &HTTPs_FS_FileTbl[0];
+
+    CPU_CRITICAL_ENTER();
+    for (i = 0u; i < HTTPs_FS_CFG_NBR_FILES; i++) {
+        if (p_file->FileDataPtr == (HTTPs_FS_FILE_DATA *)0) {
+            found = DEF_YES;
+            break;
+        }
+
+        p_file++;
+    }
+
+    if (found == DEF_NO) {                                      /* If no free file found ...                            */
+        CPU_CRITICAL_EXIT();
+        return ((void *)0);                                     /* ... rtn NULL ptr.                                    */
+    }
+
+
+
+                                                                /* -------------------- OPEN FILE --------------------- */
+    p_file->FileDataPtr = p_file_data;
+    p_file->Pos         = 0u;
+    CPU_CRITICAL_EXIT();
+
+    return ((void *)p_file);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_FS_FileClose()
+*
+* Description : Close a file.
+*
+* Argument(s) : p_file  Pointer to a file.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPs_FS_FileClose (void  *p_file)
+{
+    HTTPs_FS_FILE  *p_file_fs;
+    CPU_SR_ALLOC();
+
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE FILE PTR ----------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return;
+    }
+#endif
+
+    p_file_fs = (HTTPs_FS_FILE *)p_file;
+
+
+
+                                                                /* -------------------- CLOSE FILE -------------------- */
+    CPU_CRITICAL_ENTER();
+    p_file_fs->FileDataPtr = (HTTPs_FS_FILE_DATA *)0;
+    p_file_fs->Pos         =  0u;
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPs_FS_FileRd()
+*
+* Description : Read from a file.
+*
+* Argument(s) : p_file      Pointer to a file.
+*
+*               p_dest      Pointer to destination buffer.
+*
+*               size        Number of octets to read.
+*
+*               p_size_rd   Pointer to variable that will receive the number of octets read.
+*
+* Return(s)   : DEF_OK,   if no error occurred during read (see Note #2).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*               (2) If the read request could not be fulfilled because the EOF was reached, the return
+*                   value should be 'DEF_OK'.  The application should compare the value in 'psize_rd' to
+*                   the value passed to 'size' to detect an EOF reached condition.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_FS_FileRd (void        *p_file,
+                                      void        *p_dest,
+                                      CPU_SIZE_T   size,
+                                      CPU_SIZE_T  *p_size_rd)
+{
+    CPU_INT08U          *p_data_cur;
+    HTTPs_FS_FILE_DATA  *p_file_data;
+    HTTPs_FS_FILE       *p_file_fs;
+    CPU_INT32S           size_rd;
+
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SIZE PTR ----------------- */
+    if (p_size_rd == (CPU_SIZE_T *)0) {                         /* Validate NULL size ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_size_rd = 0u;                                             /* Init to dflt size for err (see Note #1).             */
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return (DEF_FAIL);
+    }
+    if (p_dest == (void *)0) {                                  /* Validate NULL dest ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+    p_file_fs   = (HTTPs_FS_FILE *)p_file;
+    p_file_data =  p_file_fs->FileDataPtr;
+
+
+
+                                                                /* --------------------- RD FILE ---------------------- */
+    if (p_file_fs->Pos >= p_file_data->Size) {                  /* If pos beyond EOF ...                                */
+        return (DEF_OK);                                        /* ... NO data rd.                                      */
+    }
+
+    size_rd = size;                                             /* Calculate rd size.                                   */
+    if (size_rd > (p_file_data->Size - p_file_fs->Pos)) {
+        size_rd = (p_file_data->Size - p_file_fs->Pos);
+    }
+
+    p_data_cur = (CPU_INT08U *)p_file_data->DataPtr + p_file_fs->Pos;
+    Mem_Copy(p_dest, (void *)p_data_cur, size_rd);              /* 'Rd' data.                                           */
+
+    p_file_fs->Pos += size_rd;                                  /* Advance file pos.                                    */
+   *p_size_rd       = size_rd;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPs_FS_FileWr()
+*
+* Description : Write to a file.
+*
+* Argument(s) : p_file      Pointer to a file.
+*
+*               p_src       Pointer to source buffer.
+*
+*               size        Number of octets to write.
+*
+*               p_size_wr   Pointer to variable that will receive the number of octets written.
+*
+* Return(s)   : DEF_OK,   if no error occurred during write.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) Write operations are NOT permitted.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_FS_FileWr (void        *p_file,
+                                      void        *p_src,
+                                      CPU_SIZE_T   size,
+                                      CPU_SIZE_T  *p_size_wr)
+{
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                /* ---------------- VALIDATE SIZE PTR ----------------- */
+    if (p_size_wr == (CPU_SIZE_T *)0) {                         /* Validate NULL size ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_size_wr = 0u;                                             /* Init to dflt size (see Note #1).                     */
+
+   (void)&p_file;                                               /* Prevent 'variable unused' compiler warning.          */
+   (void)&p_src;
+   (void)&size;
+
+                                                                /* #### NET-451                                         */
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_FS_FilePosSet()
+*
+* Description : Set file position indicator.
+*
+* Argument(s) : p_file  Pointer to a file.
+*
+*               offset  Offset from the file position specified by 'origin'.
+*
+*               origin  Reference position for offset :
+*
+* Return(s)   : DEF_OK,   if file position set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) File position NOT checked for overflow.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_FS_FilePosSet (void        *p_file,
+                                          CPU_INT32S   offset,
+                                          CPU_INT08U   origin)
+{
+    HTTPs_FS_FILE_DATA  *p_file_data;
+    HTTPs_FS_FILE       *p_file_fs;
+    CPU_BOOLEAN         ok;
+    CPU_INT32U          pos_new;
+
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE FILE PTR ----------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+    p_file_fs   = (HTTPs_FS_FILE *)p_file;
+    p_file_data =  p_file_fs->FileDataPtr;
+
+
+
+                                                                /* ------------------- SET FILE POS ------------------- */
+    ok = DEF_FAIL;
+    switch (origin) {
+        case HTTPs_FS_SEEK_ORIGIN_START:
+             if (offset >= 0) {
+                 pos_new = (CPU_INT32U)offset;
+                 ok      =  DEF_OK;
+             }
+             break;
+
+        case HTTPs_FS_SEEK_ORIGIN_CUR:
+             if (offset < 0) {
+                 if (-offset <= p_file_fs->Pos) {
+                     pos_new  = p_file_fs->Pos - (CPU_INT32U)-offset;
+                     ok       = DEF_OK;
+                 }
+             } else {
+                 pos_new = p_file_fs->Pos + (CPU_INT32U)offset;
+                 ok      = DEF_OK;
+             }
+             break;
+
+        case HTTPs_FS_SEEK_ORIGIN_END:
+             if (offset < 0) {
+                 if (-offset <= p_file_data->Size) {
+                     pos_new  = p_file_data->Size - (CPU_INT32U)-offset;
+                     ok       = DEF_OK;
+                 }
+             } else {
+                 pos_new = p_file_data->Size + (CPU_INT32U)offset;
+                 ok      = DEF_OK;
+             }
+             break;
+
+        default:
+             break;
+    }
+    if (ok != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    if (pos_new > p_file_data->Size) {                          /* Chk for pos beyond EOF.                              */
+        return (DEF_FAIL);
+    }
+
+    p_file_fs->Pos = pos_new;                                   /* Set pos.                                             */
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_FS_FileSizeGet()
+*
+* Description : Get file size.
+*
+* Argument(s) : p_file  Pointer to a file.
+*
+*               p_size  Pointer to variable that will receive the file size.
+*
+* Return(s)   : DEF_OK,   if file size gotten.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_FS_FileSizeGet (void        *p_file,
+                                           CPU_INT32U  *p_size)
+{
+    HTTPs_FS_FILE_DATA  *p_file_data;
+    HTTPs_FS_FILE       *p_file_fs;
+
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SIZE PTR ----------------- */
+    if (p_size == (CPU_INT32U *)0) {                            /* Validate NULL size ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_size = 0u;                                                /* Init to dflt size for err (see Note #1).             */
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE FILE PTR ----------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------------ GET FILE SIZE ------------------- */
+    p_file_fs   = (HTTPs_FS_FILE *)p_file;
+    p_file_data =  p_file_fs->FileDataPtr;
+   *p_size      =  p_file_data->Size;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       HTTPs_FS_CalcSimilarity()
+*
+* Description : Calculate 'similarity' between two file names.
+*
+* Argument(s) : p_name_1    Pointer to first  file name.
+*
+*               p_name_2    Pointer to second file name.
+*
+* Return(s)   : Similarity, in characters.
+*
+* Caller(s)   : HTTPs_FS_AddFile().
+*
+* Note(s)     : (1) The similarity between two file names is the length of the initial path components
+*                   (including leading & embedded path separator characters) shared by the file names.
+*********************************************************************************************************
+*/
+
+static  CPU_SIZE_T  HTTPs_FS_CalcSimilarity (CPU_CHAR  *p_name_1,
+                                             CPU_CHAR  *p_name_2)
+{
+    CPU_SIZE_T  similarity;
+    CPU_SIZE_T  cmp_len;
+
+                                                                /* ---------------- VALIDATE STR PTRS ----------------- */
+    if ((p_name_1 == (CPU_CHAR *)0) ||
+        (p_name_2 == (CPU_CHAR *)0)) {
+         return (0u);
+    }
+
+
+    similarity = 0u;
+    cmp_len    = 0u;
+    while ((*p_name_1 == *p_name_2) &&                          /* Cmp strs until non-matching chars ...                */
+           (*p_name_1 !=  ASCII_CHAR_NULL)) {                   /* ... or NULL chars found.                             */
+        if (*p_name_1 == HTTPs_FS_PATH_SEP_CHAR) {
+            similarity = cmp_len;
+        }
+        cmp_len++;
+        p_name_1++;
+        p_name_2++;
+    }
+
+                                                                /* Chk whether one file is ancestor of other.           */
+    if (((*p_name_1 == ASCII_CHAR_NULL) && (*p_name_2 == HTTPs_FS_PATH_SEP_CHAR)) ||
+        ((*p_name_2 == ASCII_CHAR_NULL) && (*p_name_1 == HTTPs_FS_PATH_SEP_CHAR))) {
+        similarity = cmp_len;
+    }
+
+    return (similarity);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPs_FS_FileDateTimeCreateGet()
+*
+* Description : Get file creation date/time.
+*
+* Argument(s) : p_file  Pointer to a file.
+*
+*               p_time  Pointer to variable that will receive the date/time :
+*
+* Return(s)   : DEF_OK,   if file creation date/time gotten.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPs_FS_API_Static.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_FS_FileDateTimeCreateGet (void              *p_file,
+                                                     NET_FS_DATE_TIME  *p_time)
+{
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE DATE/TIME PTR ------------ */
+    if (p_time == (NET_FS_DATE_TIME *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+
+#if (HTTPs_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE FILE PTR ----------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* Set each creation date/time field to be rtn'd.       */
+    p_time->Yr    = HTTPs_FS_Time.Yr;
+    p_time->Month = HTTPs_FS_Time.Month;
+    p_time->Day   = HTTPs_FS_Time.Day;
+    p_time->Hr    = HTTPs_FS_Time.Hr;
+    p_time->Min   = HTTPs_FS_Time.Min;
+    p_time->Sec   = HTTPs_FS_Time.Sec;
+
+    return (DEF_OK);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/http-s_fs_static.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/http-s_fs_static.h
new file mode 100644
index 0000000..9796bba
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/http-s_fs_static.h
@@ -0,0 +1,109 @@
+/*
+*********************************************************************************************************
+*                                              uC/HTTPs
+*                                 Hypertext Transfer Protocol (server)
+*
+*                          (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/HTTPs is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at: https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NET FILE SYSTEM PORT
+*
+*                                        HTTPs STATIC FILE SYSTEM
+*
+* Filename      : http-s_fs_static.h
+* Version       : V3.00.02
+* Programmer(s) : FBJ
+* *               AA
+*                 SL
+*                 BAN
+*********************************************************************************************************
+* Note(s)       : (1) Should be compatible with the following TCP/IP application versions (or more recent):
+*
+*                     (a) uC/HTTPs V2.00.00
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPs_FS_STATIC_MODULE_PRESENT
+#define  HTTPs_FS_STATIC_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_FS_API  HTTPs_FS_API_Static;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPs_FS_Init     (void);
+
+CPU_BOOLEAN  HTTPs_FS_AddFile  (CPU_CHAR          *p_name,
+                                void              *p_data,
+                                CPU_INT32U         size);
+
+CPU_BOOLEAN  HTTPs_FS_SetTime  (NET_FS_DATE_TIME  *p_time);
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPs_FS_STATIC_MODULE_PRESENT  */
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/static_files.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/static_files.h
new file mode 100644
index 0000000..d6fb164
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/FS/Static/static_files.h
@@ -0,0 +1,669 @@
+/*
+*********************************************************************************************************
+*                                              uC/HTTPs
+*                                 Hypertext Transfer Protocol (server)
+*
+*                          (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/HTTPs is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            NO FILE SYSTEM
+*
+* Filename      : static_files.h
+* Version       : V3.00.02
+* Programmer(s) : SR
+*********************************************************************************************************
+* Note(s)       : (1) This file defines the various arrays' content being used as file.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* File names                                           */
+#define  STATIC_INDEX_HTML_NAME                 "\\index.html"
+#define  STATIC_LOGO_GIF_NAME                   "\\logo.gif"
+#define  STATIC_404_HTML_NAME                   "\\404.html"
+
+                                                                /* Size of files in bytes on file system                */
+#define  STATIC_INDEX_HTML_LEN                          4108u
+#define  STATIC_LOGO_GIF_LEN                            2066u
+#define  STATIC_404_HTML_LEN                            2085u
+
+
+/*
+*********************************************************************************************************
+*                                         FILES IN FILE SYSTEM
+*********************************************************************************************************
+*/
+
+                                                                /* index.html file                                      */
+const unsigned char index_html[] =
+{
+    0x3C,0x21,0x44,0x4F,0x43,0x54,0x59,0x50,0x45,0x20,0x48,0x54,0x4D,0x4C,  \
+    0x20,0x50,0x55,0x42,0x4C,0x49,0x43,0x20,0x22,0x2D,0x2F,0x2F,0x57,0x33,  \
+    0x43,0x2F,0x2F,0x44,0x54,0x44,0x20,0x48,0x54,0x4D,0x4C,0x20,0x34,0x2E,  \
+    0x30,0x31,0x2F,0x2F,0x45,0x4E,0x22,0x0A,0x20,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x22,0x68,0x74,0x74,0x70,0x3A,0x2F,0x2F,0x77,0x77,0x77,0x2E,  \
+    0x77,0x33,0x2E,0x6F,0x72,0x67,0x2F,0x54,0x52,0x2F,0x68,0x74,0x6D,0x6C,  \
+    0x34,0x2F,0x73,0x74,0x72,0x69,0x63,0x74,0x2E,0x64,0x74,0x64,0x22,0x3E,  \
+    0x0A,0x3C,0x68,0x74,0x6D,0x6C,0x3E,0x0A,0x3C,0x68,0x65,0x61,0x64,0x3E,  \
+    0x0A,0x20,0x20,0x20,0x20,0x3C,0x73,0x63,0x72,0x69,0x70,0x74,0x20,0x73,  \
+    0x72,0x63,0x3D,0x22,0x68,0x74,0x74,0x70,0x3A,0x2F,0x2F,0x61,0x6A,0x61,  \
+    0x78,0x2E,0x67,0x6F,0x6F,0x67,0x6C,0x65,0x61,0x70,0x69,0x73,0x2E,0x63,  \
+    0x6F,0x6D,0x2F,0x61,0x6A,0x61,0x78,0x2F,0x6C,0x69,0x62,0x73,0x2F,0x6A,  \
+    0x71,0x75,0x65,0x72,0x79,0x2F,0x31,0x2E,0x37,0x2F,0x6A,0x71,0x75,0x65,  \
+    0x72,0x79,0x2E,0x6A,0x73,0x22,0x3E,0x3C,0x2F,0x73,0x63,0x72,0x69,0x70,  \
+    0x74,0x3E,0x20,0x0A,0x20,0x20,0x20,0x20,0x3C,0x73,0x63,0x72,0x69,0x70,  \
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+    0x20,0x4C,0x45,0x44,0x20,0x32,0x22,0x20,0x63,0x6C,0x61,0x73,0x73,0x3D,  \
+    0x22,0x62,0x6C,0x75,0x65,0x62,0x75,0x74,0x74,0x6F,0x6E,0x22,0x20,0x2F,  \
+    0x3E,0x0A,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x3C,0x2F,0x70,0x3E,0x0A,  \
+    0x09,0x09,0x09,0x09,0x09,0x09,0x3C,0x2F,0x66,0x6F,0x72,0x6D,0x3E,0x20,  \
+    0x0A,0x09,0x09,0x09,0x09,0x09,0x3C,0x2F,0x74,0x64,0x3E,0x0A,0x09,0x09,  \
+    0x09,0x09,0x3C,0x2F,0x74,0x72,0x3E,0x0A,0x20,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x3C,0x74,0x72,0x3E,  \
+    0x0A,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x3C,0x74,0x64,0x3E,0x0A,0x20,0x20,  \
+    0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x3C,0x70,0x20,0x69,0x64,0x3D,  \
+    0x22,0x4C,0x45,0x44,0x31,0x22,0x3E,0x20,0x3C,0x2F,0x70,0x3E,0x0A,0x20,  \
+    0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x20,0x20,0x20,0x3C,0x2F,0x74,0x64,0x3E,0x0A,0x20,0x20,0x20,  \
+    0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x20,0x3C,0x74,0x64,0x3E,0x0A,0x20,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x20,0x20,0x3C,0x70,0x20,0x69,0x64,0x3D,0x22,0x4C,0x45,0x44,  \
+    0x32,0x22,0x3E,0x20,0x3C,0x2F,0x70,0x3E,0x0A,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x3C,0x2F,0x74,0x64,0x3E,0x0A,0x20,0x20,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x3C,0x2F,0x74,0x72,0x3E,  \
+    0x0A,0x09,0x09,0x09,0x3C,0x2F,0x74,0x61,0x62,0x6C,0x65,0x3E,0x09,0x09,  \
+    0x0A,0x09,0x09,0x3C,0x2F,0x64,0x69,0x76,0x3E,0x20,0x20,0x20,0x20,0x20,  \
+    0x20,0x20,0x0A,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x0A,0x09,  \
+    0x09,0x3C,0x64,0x69,0x76,0x20,0x69,0x64,0x3D,0x22,0x63,0x6F,0x70,0x79,  \
+    0x72,0x69,0x67,0x68,0x74,0x22,0x3E,0x0A,0x09,0x09,0x09,0x3C,0x70,0x3E,  \
+    0x43,0x6F,0x70,0x79,0x72,0x69,0x67,0x68,0x74,0x20,0x32,0x30,0x31,0x33,  \
+    0x20,0x4D,0x69,0x63,0x72,0x69,0x26,0x6D,0x69,0x63,0x72,0x6F,0x3B,0x6D,  \
+    0x20,0x49,0x6E,0x63,0x2E,0x3C,0x2F,0x70,0x3E,0x0A,0x09,0x09,0x3C,0x2F,  \
+    0x64,0x69,0x76,0x3E,0x0A,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x0A,  \
+    0x0A,0x09,0x3C,0x2F,0x64,0x69,0x76,0x3E,0x0A,0x0A,0x3C,0x2F,0x64,0x69,  \
+    0x76,0x3E,0x0A,0x0A,0x3C,0x2F,0x62,0x6F,0x64,0x79,0x3E,0x0A,0x3C,0x2F,  \
+    0x68,0x74,0x6D,0x6C,0x3E,0x0A,  \
+};
+
+                                                                /* logo.gif file                                        */
+const unsigned char logo_gif[] =
+{                                                                         \
+  0x47,0x49,0x46,0x38,0x39,0x61,0xD4,0x00,0x29,0x00,0xC4,0x00,0x00,0x29,  \
+  0x49,0x5B,0x77,0x8B,0x97,0x35,0x53,0x64,0xCD,0xD5,0xD9,0xA4,0xB1,0xB9,  \
+  0x63,0x7A,0x88,0xAE,0xBA,0xC1,0xC3,0xCC,0xD2,0x9B,0xAA,0xB3,0xD0,0xD7,  \
+  0xDC,0xBB,0xC5,0xCB,0x95,0xA5,0xAE,0x49,0x64,0x74,0x8A,0x9B,0xA6,0xD6,  \
+  0xDC,0xE0,0x84,0x96,0xA1,0x52,0x6C,0x7B,0x1F,0x40,0x53,0xC9,0xD1,0xD7,  \
+  0x40,0x5C,0x6C,0x7B,0x8E,0x9A,0xBE,0xC8,0xCE,0xB7,0xC2,0xC8,0x71,0x86,  \
+  0x92,0x8E,0x9F,0xA9,0x87,0x99,0xA3,0x69,0x7F,0x8C,0x59,0x71,0x80,0x7F,  \
+  0x92,0x9E,0xB4,0xBF,0xC6,0x18,0x3A,0x4E,0xFF,0xFF,0xFF,0x21,0xF9,0x04,  \
+  0x01,0x00,0x00,0x1F,0x00,0x2C,0x00,0x00,0x00,0x00,0xD4,0x00,0x29,0x00,  \
+  0x00,0x05,0xFF,0xE0,0x27,0x8E,0x64,0x69,0x9E,0x68,0x3A,0x10,0xC1,0xC6,  \
+  0x4C,0x13,0x54,0x34,0x4A,0x3A,0x62,0xC2,0xB4,0x39,0x63,0x82,0x65,0x8D,  \
+  0x60,0x23,0x53,0x31,0x39,0x16,0x40,0xE1,0xC3,0x22,0x32,0x3C,0x84,0xD0,  \
+  0xA8,0xB4,0xF1,0xE8,0x7C,0x7E,0xD3,0x2C,0x14,0x93,0x10,0x21,0x92,0xDA,  \
+  0x85,0x41,0x62,0x2B,0x1B,0x1D,0xE8,0xB4,0x1A,0xFD,0x51,0x9B,0xDF,0x70,  \
+  0xD2,0x20,0x00,0xF0,0xD8,0xEF,0x78,0x88,0x35,0x05,0xB1,0x6F,0x48,0x12,  \
+  0x75,0x78,0x1E,0x08,0x46,0x02,0x83,0x1E,0x0F,0x22,0x17,0x88,0x8D,0x8E,  \
+  0x14,0x1F,0x82,0x8E,0x93,0x1E,0x11,0x07,0x22,0x0C,0x94,0x78,0x00,0x05,  \
+  0x45,0x71,0x29,0x08,0x00,0x02,0xA3,0xA3,0x13,0x07,0x10,0x02,0x00,0x0B,  \
+  0x1F,0x04,0xA5,0x9F,0xAF,0x29,0x06,0x87,0x9A,0x95,0x0D,0x28,0x09,0xB3,  \
+  0x19,0x80,0x92,0x77,0x85,0x25,0x0E,0xB3,0x78,0x8A,0x1F,0x01,0xB4,0x93,  \
+  0x90,0xBC,0xC6,0x77,0x96,0x98,0xCA,0x76,0x00,0x06,0xB0,0x26,0x18,0x88,  \
+  0x00,0x15,0xB3,0x7F,0x8C,0x1E,0x00,0xD2,0xDD,0x22,0x04,0x11,0xCE,0x1E,  \
+  0x18,0x27,0x06,0x77,0xD1,0x23,0x81,0x88,0xBE,0x24,0xC0,0x88,0xC3,0xC5,  \
+  0xE2,0x78,0xC8,0xF2,0xCB,0x97,0x1F,0x99,0xE2,0x00,0xF7,0xDE,0x03,0x0A,  \
+  0x1D,0x75,0x0A,0x1C,0xA8,0x80,0x6B,0x9B,0x80,0x04,0x13,0x22,0x28,0xF4,  \
+  0x26,0xAD,0x42,0x32,0x5A,0x11,0x98,0x94,0x78,0x60,0xE7,0xE0,0xAE,0x75,  \
+  0x86,0xDE,0x89,0x88,0x57,0xCF,0x03,0xBD,0x8E,0xCC,0xF0,0xD5,0x0B,0xC0,  \
+  0xB0,0xC7,0xA1,0x0B,0x22,0x80,0xFF,0x45,0xD8,0xE0,0x61,0x41,0x04,0x06,  \
+  0x02,0x22,0x94,0x7C,0xC5,0xB2,0xD1,0x84,0x02,0x1B,0x82,0xE1,0xF9,0x53,  \
+  0xA2,0x26,0x84,0x12,0xEA,0x06,0xB1,0x1B,0xE1,0x6E,0xD0,0x30,0x6D,0x1D,  \
+  0x3F,0xD6,0x0B,0x99,0x0F,0x0F,0x83,0x21,0x14,0xFA,0x20,0x9A,0x30,0xF3,  \
+  0x43,0x41,0x94,0x6D,0x62,0x36,0xF0,0x30,0xC1,0x03,0x87,0x98,0xAF,0x12,  \
+  0x48,0x18,0x4B,0x96,0x47,0x4A,0xB2,0x64,0xBB,0x88,0xE8,0x10,0x6E,0x10,  \
+  0x00,0x76,0x09,0x38,0xE2,0x41,0x27,0xA2,0x60,0x22,0xA0,0x0F,0x87,0xA6,  \
+  0xD4,0x69,0x67,0x98,0x93,0x0C,0x80,0x81,0xC8,0xBD,0x73,0x61,0x48,0xE0,  \
+  0x2A,0x57,0x02,0x03,0xC6,0xD0,0xF4,0xCE,0x84,0x1F,0x8A,0x1B,0xA8,0x6D,  \
+  0x6C,0x07,0xEB,0xC6,0x6A,0x64,0x4A,0x1C,0x30,0x80,0x00,0x83,0x67,0x04,  \
+  0x06,0x06,0xA4,0xB8,0xBA,0xD7,0x83,0x81,0x3A,0x11,0x08,0x00,0x90,0xF9,  \
+  0xE9,0x41,0x04,0x00,0xB0,0x45,0xF1,0x3B,0x10,0x1B,0x76,0x84,0x61,0xC4,  \
+  0x1A,0x11,0x30,0xA1,0x61,0x13,0x83,0xDD,0x23,0x3A,0x9C,0xC3,0x8B,0xF1,  \
+  0x17,0xDF,0xBB,0x28,0x2C,0x34,0x92,0xF8,0xA6,0xF7,0x20,0x9E,0x28,0x28,  \
+  0x7B,0xB0,0xFC,0xE1,0x40,0xDB,0x65,0x9E,0xBE,0x31,0xB8,0xBE,0xA9,0xD3,  \
+  0x09,0xD2,0x56,0x0F,0x9D,0xE2,0x1A,0x88,0x75,0x1C,0x0A,0x83,0x22,0x64,  \
+  0xB7,0x3E,0x08,0x52,0xB3,0x41,0x3F,0x4D,0x28,0xB8,0x89,0xA1,0x83,0x5A,  \
+  0x12,0x19,0x9E,0x89,0xBE,0x38,0x88,0x43,0x07,0x03,0x00,0x06,0x78,0x1C,  \
+  0x6E,0x26,0x28,0x87,0xC8,0x1E,0x6F,0x14,0x80,0x48,0xFF,0x7C,0xD1,0x21,  \
+  0x42,0x5D,0x05,0xDC,0x55,0xC2,0x0F,0x52,0x93,0x40,0x63,0x42,0x41,0x24,  \
+  0xB5,0x91,0x90,0x04,0x14,0x69,0xE0,0x00,0x6C,0xAF,0xA0,0x87,0x87,0x7A,  \
+  0x23,0xB0,0x37,0x4F,0x5D,0x0F,0xE9,0x72,0x86,0x0D,0x3E,0x99,0x10,0x54,  \
+  0x47,0x04,0x96,0x60,0xE0,0x20,0x08,0x9A,0xA1,0x20,0x7C,0x36,0x48,0x47,  \
+  0x9D,0x73,0x9B,0xA8,0xB5,0x95,0x31,0x02,0xEC,0x47,0xD4,0x40,0xFB,0x39,  \
+  0x70,0xC0,0x01,0x0E,0x24,0x50,0x81,0x68,0x47,0x86,0x98,0xDE,0x7A,0x11,  \
+  0xBA,0x67,0x22,0x1E,0xC0,0x7D,0x52,0x14,0x07,0x2E,0x3E,0xE4,0x4C,0x8C,  \
+  0x24,0xCC,0x88,0x47,0x8D,0x65,0xDC,0x98,0x47,0x8E,0x88,0x30,0xC0,0x01,  \
+  0x05,0x17,0x74,0xB5,0x60,0x4A,0x6A,0xDA,0x71,0xDB,0x3F,0x14,0xDA,0xE1,  \
+  0x5E,0x55,0x65,0x88,0x88,0x5D,0x89,0x51,0x8A,0x60,0x41,0x84,0x1E,0x80,  \
+  0xF9,0xC6,0x8C,0x74,0xA5,0xA3,0xA5,0x32,0x5C,0x8E,0xE0,0xE5,0x1D,0x7E,  \
+  0xA6,0x20,0xE6,0x1D,0x0C,0x9E,0x20,0x1D,0x2D,0xBE,0xBC,0xE8,0x81,0x00,  \
+  0x66,0x7D,0x10,0x95,0x06,0x14,0x60,0x80,0x40,0xA2,0x74,0x96,0x60,0xA7,  \
+  0x9B,0x50,0xB6,0xA7,0x67,0x23,0x9C,0xDA,0x40,0xCD,0x36,0x42,0x0A,0xDA,  \
+  0x51,0x5F,0x29,0x1C,0x6A,0x47,0xA9,0x26,0x2C,0x6A,0x47,0xA3,0x26,0x3C,  \
+  0x4A,0x09,0x74,0x92,0x7A,0x00,0x01,0x06,0x06,0x54,0x50,0x69,0xA7,0x40,  \
+  0x35,0x40,0x01,0x98,0x9F,0x56,0x12,0xEA,0x89,0x1F,0x40,0x88,0x48,0xA0,  \
+  0x70,0xDC,0xC8,0xC0,0x09,0xB9,0x8A,0x53,0xE8,0xA8,0x07,0xC6,0x21,0xAB,  \
+  0xFF,0xAE,0x64,0x3A,0xB3,0xC1,0x7D,0x22,0x35,0xF2,0xDA,0x04,0x1A,0x20,  \
+  0xC0,0x2D,0x9D,0x07,0x04,0x33,0x54,0xB1,0x24,0x8A,0x30,0xA5,0x9C,0x22,  \
+  0x44,0xAB,0xD7,0x08,0x0F,0x2C,0x90,0x59,0x3B,0xB3,0xCC,0xC9,0x5F,0x1E,  \
+  0x17,0xE4,0xAB,0xEF,0x05,0x0F,0x4D,0xFB,0x81,0xAB,0x7D,0x5A,0xBB,0x66,  \
+  0x0A,0xB6,0xBA,0x05,0xC1,0xBB,0x04,0x00,0xF9,0xEE,0x27,0x38,0x6D,0xE0,  \
+  0xB0,0xC3,0x6D,0x72,0x55,0x29,0xBA,0xD9,0x29,0x8B,0xAC,0x03,0x11,0xDB,  \
+  0x91,0x21,0x71,0x00,0x40,0x40,0x83,0x59,0x0A,0xB4,0x55,0xE5,0xBD,0xBD,  \
+  0x64,0x64,0x54,0xAB,0xA4,0x0A,0x8C,0x23,0xC1,0x88,0x6C,0x40,0xC0,0xCB,  \
+  0x2F,0x77,0x30,0xEF,0x34,0x7C,0x36,0xB2,0x30,0x1C,0x83,0xDE,0x01,0x80,  \
+  0x90,0xE8,0xD6,0xD0,0x04,0x22,0x73,0x5E,0x3B,0xC1,0xAF,0x22,0x50,0x34,  \
+  0x48,0x86,0xA7,0x02,0x30,0xB3,0xAA,0x42,0x99,0x2C,0x0C,0xCA,0xD5,0x36,  \
+  0x3B,0x70,0x83,0x83,0x50,0xF7,0x46,0x05,0x01,0x4C,0x90,0xF3,0xA4,0xE3,  \
+  0xC6,0x11,0x81,0x00,0x0A,0x28,0x60,0x81,0x05,0x07,0x18,0x3D,0x2B,0x09,  \
+  0xC5,0xB6,0x04,0x2F,0xD0,0x23,0x20,0xD0,0x08,0x96,0x5D,0x3E,0x44,0xCE,  \
+  0x07,0xCE,0xA2,0xE0,0xAE,0xD3,0x77,0xF8,0x0B,0x30,0xAC,0x25,0x5C,0x4B,  \
+  0x6B,0x09,0x3A,0x76,0x93,0x80,0x01,0x0D,0x68,0xB0,0x1D,0x22,0x23,0x7F,  \
+  0x12,0x01,0x55,0xED,0x5C,0x10,0x0E,0x03,0xFC,0x58,0x8A,0x88,0x00,0x04,  \
+  0xAC,0xF0,0xD0,0x9C,0x18,0x37,0xE2,0xB2,0x05,0x06,0x70,0xF0,0x90,0xD2,  \
+  0x59,0x69,0x6C,0x77,0xFF,0x5E,0x78,0xB3,0x9A,0x5C,0xCA,0x52,0xAF,0x4C,  \
+  0x35,0x1E,0x56,0xA7,0x90,0xA4,0x04,0x9C,0x23,0x30,0x94,0x02,0x7C,0xAD,  \
+  0x22,0xCD,0xE2,0x27,0x0C,0x44,0x74,0xDA,0x6E,0x3E,0x42,0x82,0xDB,0xF5,  \
+  0xB8,0x67,0x71,0xE2,0x4C,0xE3,0xF1,0x6E,0x51,0x4F,0x9F,0x1E,0x75,0x82,  \
+  0x53,0x3B,0xEA,0x20,0x1C,0xFC,0x72,0x37,0x72,0xC6,0xCC,0x7A,0xCD,0xF8,  \
+  0x1B,0xBC,0x53,0x62,0xEF,0x07,0x71,0xD2,0x32,0x81,0x5A,0x0B,0x3C,0x13,  \
+  0x39,0xC9,0x76,0x1C,0x3F,0x20,0xD4,0x34,0xAA,0x3C,0x26,0xCB,0x55,0xC3,  \
+  0x71,0xEA,0x26,0x14,0x10,0xB0,0x80,0x54,0x77,0x58,0x74,0xFB,0xF5,0x66,  \
+  0x64,0x7F,0xCC,0x2F,0x35,0x01,0x99,0x9D,0x73,0xCF,0x1A,0x5D,0x71,0xE8,  \
+  0xA5,0x11,0xE5,0xA5,0x2F,0x75,0xEB,0x5B,0x1D,0x61,0xE0,0xE0,0x80,0x82,  \
+  0x21,0xC2,0x76,0xF7,0x3B,0x8F,0x3C,0xB6,0xD7,0x06,0x0A,0xD4,0x6C,0x10,  \
+  0x90,0x23,0x81,0x9A,0x5A,0x57,0xBC,0x92,0x19,0xA7,0x80,0x27,0xD8,0x9B,  \
+  0xFA,0x18,0x95,0x2D,0xD6,0xC5,0x41,0x02,0x0E,0x74,0xD3,0xDC,0xBA,0x81,  \
+  0x3B,0x38,0x14,0x0B,0x00,0x8E,0xB3,0x03,0x4E,0x6A,0x03,0x80,0x69,0x55,  \
+  0x20,0x4D,0x7C,0x02,0x00,0x03,0x10,0xF0,0xAB,0x90,0x95,0x4F,0x05,0x5A,  \
+  0xA3,0x21,0xF1,0x1A,0x48,0x43,0x00,0xAC,0x50,0x3E,0x45,0x04,0x5B,0x1C,  \
+  0xF8,0x45,0xC3,0x02,0xB0,0xA8,0x88,0x70,0x83,0x43,0x02,0x1A,0x90,0x90,  \
+  0x46,0x08,0x40,0x03,0x3E,0xF3,0x46,0x0B,0xB1,0x97,0x9E,0x23,0x89,0x21,  \
+  0x49,0x03,0x48,0x80,0x18,0x07,0x40,0xB4,0xFF,0x5F,0x6C,0x06,0x01,0x0B,  \
+  0x58,0x00,0x68,0x96,0xD6,0xAE,0x34,0x2E,0x20,0x55,0xBF,0x10,0xA3,0x1C,  \
+  0xC5,0x58,0x46,0xAB,0xCC,0x31,0x01,0x64,0x74,0xDD,0x1D,0xE9,0x18,0x07,  \
+  0x3C,0xCE,0x31,0x8C,0x36,0xF0,0xA3,0x1C,0xF3,0xF8,0x0A,0x07,0x48,0xA0,  \
+  0x03,0xF2,0x53,0x23,0x01,0x14,0xD0,0xB5,0x08,0xBA,0xF0,0x49,0xC0,0x8A,  \
+  0xA4,0x24,0x27,0x49,0xC9,0x4A,0x92,0x60,0x8B,0xF9,0x83,0xA4,0x25,0x37,  \
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+  0x29,0xC3,0xF1,0x89,0x80,0x03,0x1E,0x20,0x83,0x72,0x6C,0x17,0x3E,0xE6,  \
+  0x1C,0xC0,0x2B,0x22,0x40,0x0F,0x19,0xC2,0xB7,0x87,0x04,0x70,0xFF,0x22,  \
+  0x59,0xE1,0xFC,0x40,0x07,0x34,0xC0,0x81,0x2E,0x18,0x60,0x01,0x2C,0x20,  \
+  0xC2,0x07,0x38,0xA4,0x00,0x07,0x14,0x2E,0x1A,0x3E,0xE8,0x00,0x05,0x98,  \
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+  0x96,0xB4,0x6F,0xB7,0xC1,0x40,0x6F,0xF6,0xE0,0x38,0x21,0x99,0x03,0x38,  \
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+  0x80,0xA1,0x81,0x04,0x44,0xE0,0x02,0x47,0x8D,0x44,0x03,0x12,0x56,0x80,  \
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+  0x40,0x80,0x22,0x12,0x40,0xCF,0x68,0x13,0x01,0x51,0x87,0x1E,0xF6,0xB6,  \
+  0x6F,0x60,0xE8,0xAC,0xC0,0xFA,0x01,0x05,0x8C,0x43,0x04,0x02,0x88,0xCF,  \
+  0x45,0xA3,0xA8,0xD6,0xB5,0xA8,0xCD,0x04,0x1B,0xC0,0x4A,0x01,0xF6,0xB1,  \
+  0x92,0x05,0x3C,0x60,0x53,0xBF,0xE5,0x1E,0x6C,0x9C,0xA8,0x81,0x08,0x60,  \
+  0x80,0x0A,0x8F,0xA7,0x10,0x00,0x6E,0xB7,0xFB,0x09,0x86,0x4E,0x80,0x78,  \
+  0x1F,0x70,0x5B,0x34,0x24,0x30,0xCF,0x9F,0x55,0xC9,0xA3,0x4E,0xFC,0x00,  \
+  0x47,0x4F,0xB0,0xCF,0x06,0x2C,0xA0,0x63,0x1F,0x08,0xAE,0x04,0x26,0xF0,  \
+  0x80,0x84,0xED,0x21,0x7C,0x11,0xB9,0x42,0x9F,0xA8,0x28,0x01,0x01,0x70,  \
+  0x96,0xBB,0x00,0x46,0x81,0x70,0x00,0x50,0x5A,0x14,0x58,0x90,0x0C,0xC2,  \
+  0xF1,0x05,0x35,0x2A,0x16,0x01,0x5B,0x10,0x63,0x67,0x21,0x9C,0x85,0x00,  \
+  0x8A,0x00,0x8E,0x49,0x49,0x80,0x03,0x4C,0xFD,0x59,0x7A,0x1D,0x20,0x95,  \
+  0x0C,0xC8,0x93,0xB8,0x01,0x0E,0x31,0x09,0x46,0xCA,0x46,0x40,0x20,0xC9,  \
+  0x2A,0x04,0x69,0x97,0xAF,0x7A,0x90,0xE2,0x95,0x9E,0xF8,0x3B,0x1D,0xB0,  \
+  0x4F,0x89,0x42,0xE3,0x62,0xB3,0x38,0x60,0x49,0x44,0x31,0x40,0x0D,0x6E,  \
+  0x6C,0x58,0x11,0x4B,0x32,0x04,0x00,0x3B,  \
+};
+
+                                                                /* 404.html file                                        */
+const unsigned char not_found_html[] =
+{                                                                         \
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+};
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s.c
new file mode 100644
index 0000000..5f7df48
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s.c
@@ -0,0 +1,1312 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             HTTP SERVER
+*
+* Filename      : http-s.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                         (a) uC/CPU    V1.30.00
+*                         (b) uC/LIB    V1.38.00
+*                         (c) uC/Common V1.01.00
+*                         (d) uC/TCP-IP V3.03.00
+*
+*                         See also 'HTTPs INCLUDE FILES  Notes #1, #2 & #3' in http-s.h.
+*
+*                 (2) For additional details on the features available with uC/HTTP-server, the API, the
+*                     installation, etc. Please refer to the uC/HTTP-server documentation available at
+*                     https://doc.micrium.com/display/httpdoc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPs_MODULE
+#include  "http-s.h"
+#include  "http-s_mem.h"
+#include  "http-s_task.h"
+#include  "http-s_str.h"
+#include  "http-s_sock.h"
+#include  "http-s_req.h"
+#include  "http-s_resp.h"
+#include  
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  
+#endif
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPs_InitActive = DEF_ACTIVE;
+
+const  HTTP_DICT  HTTPs_DictionaryTokenInternal[] = {
+    { HTTPs_TOKEN_INTERNAL_STATUS_CODE,   HTTPs_STR_TOKEN_INTERNAL_STATUS_CODE,   (sizeof(HTTPs_STR_TOKEN_INTERNAL_STATUS_CODE)   - 1) },
+    { HTTPs_TOKEN_INTERNAL_REASON_PHRASE, HTTPs_STR_TOKEN_INTERNAL_REASON_PHRASE, (sizeof(HTTPs_STR_TOKEN_INTERNAL_REASON_PHRASE) - 1) },
+};
+
+CPU_SIZE_T  HTTPs_DictionarySizeTokenInternal = sizeof(HTTPs_DictionaryTokenInternal);
+
+
+/*
+*********************************************************************************************************
+*                                             HTTPs_Init()
+*
+* Description : (1) Initialize HTTP server suite:
+*
+*                   (a) Validate error file length.
+*                   (b) Initialize instance pool
+*
+* Argument(s) : p_mem_seg   Pointer to the memory segment to use to allocate necessary objects.
+*                           Set to DEF_NULL to allocate objects on the HEAP configured in uC/LIB.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE
+*                               HTTPs_ERR_CFG_INVALID_FILE_LEN
+*                               HTTPs_ERR_INIT
+*
+*                               ------------ RETURNED BY HTTPsMem_InstanceInit() -------------
+*                               See HTTPsMem_InstanceInit() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Your Product's Application.
+*
+*               This function is a HTTPs server initialization function & MUST be called by
+*               application/initialization function(s).
+*
+* Note(s)     : (1) 'HTTPs_InitActive' MUST be accessed exclusively in critical sections during initialization.
+*********************************************************************************************************
+*/
+
+void  HTTPs_Init (MEM_SEG    *p_mem_seg,
+                  HTTPs_ERR  *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* -------------- VALIDATE ERR PAGE LEN --------------- */
+    if (HTTPs_HTML_DLFT_ERR_LEN == 0) {
+       *p_err = HTTPs_ERR_CFG_INVALID_ERR_PAGE_LEN;
+        return;
+    }
+#endif
+
+
+                                                                /* ------------- INIT HTTPs INSTANCE POOL ------------- */
+    CPU_CRITICAL_ENTER();                                       /* See Note #1.                                         */
+    if (HTTPs_InitActive == DEF_INACTIVE) {
+        CPU_CRITICAL_EXIT();
+       *p_err = HTTPs_ERR_INIT;
+        return;
+    }
+    CPU_CRITICAL_EXIT();
+
+    HTTPsMem_InstanceInit(p_mem_seg, p_err);
+    if (*p_err != HTTPs_ERR_NONE) {
+         return;
+    }
+
+    CPU_CRITICAL_ENTER();                                       /* See Note #1.                                         */
+    HTTPs_InitActive = DEF_INACTIVE;                            /* Block http-s fncts/tasks until init complete.        */
+    CPU_CRITICAL_EXIT();
+
+   *p_err = HTTPs_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_InstanceInit()
+*
+* Description : (1) Initialize a HTTP server instance :
+*
+*                   (a) Validate return err pointer.
+*                   (b) Validate pointers (configuration & file system api).
+*                   (c) Validate HTTP server configuration.
+*                   (d) Get HTTPs server instance.
+*                   (f) Initialize instance OS object.
+*                   (g) Initialize connection pool.
+*
+*
+* Argument(s) : p_cfg       Pointer to the instance configuration object.
+*
+*               p_task_cfg  Pointer to the instance task configuration object.
+*
+*               p_fs_api    Pointer to specific file system API.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE                          HTTPs instance server successfully
+*                                                                           initialized and started.
+*
+*                               HTTPs_ERR_INIT                          HTTP server suite not initialized.
+*
+*                               HTTPs_ERR_NULL_PTR                      Argument 'p_cfg'/'p_fs_api' passed a
+*                                                                           NULL pointer.
+*
+*                               HTTPs_ERR_CFG_INVALID_NBR_CONN          Invalid number of connection.
+*                               HTTPs_ERR_CFG_INVALID_DFLT_FILE         Default file is a null pointer.
+*                               HTTPs_ERR_CFG_INVALID_SECURE_EN         Invalid secure configuration.
+*                               HTTPs_ERR_CFG_INVALID_HOST_LEN          Invalid host length.
+*                               HTTPs_ERR_CFG_INVALID_FS_PATH_LEN       Invalid file system path length.
+*                               HTTPs_ERR_CFG_INVALID_FS_SEP_CHAR       Invalid file system separator character.
+*                               HTTPs_ERR_CFG_INVALID_TOKEN_EN          Invalid token configuration.
+*                               HTTPs_ERR_CFG_INVALID_TOKEN_PARAM       Invalid token parameter.
+*                               HTTPs_ERR_CFG_INVALID_QUERY_STR_EN      Invalid Query String configuration.
+*                               HTTPs_ERR_CFG_INVALID_QUERY_STR_PARAM   Invalid Query String parameter.
+*                               HTTPs_ERR_CFG_INVALID_FORM_EN           Invalid Form configuration.
+*                               HTTPs_ERR_CFG_INVALID_FORM_PARAM        Invalid Form parameter.
+*                               HTTPs_ERR_CFG_INVALID_HDR_EN            Invalid header configuration.
+*                               HTTPs_ERR_CFG_INVALID_HDR_PARAM         Invalid header parameter.
+*                               HTTPs_ERR_CFG_INVALID_BUF_LEN           Invalid connection buffer length.
+*                               HTTPs_ERR_CFG_INVALID_FILE_LEN          Invalid static error file configuration.
+*
+*                               ---------------------- RETURNED BY HTTPsMem_InstanceGet() ------------------------
+*                               See HTTPsMem_InstanceGet() for additional return error codes.
+*
+*                               ----------------------- RETURNED BY HTTPsTask_LockCreate() -----------------------
+*                               See HTTPsTask_LockCreate() for additional return error codes.
+*
+*                               --------------------- RETURNED BY HTTPsTask_InstanceObjInit() --------------------
+*                               See HTTPsTask_InstanceObjInit() for additional return error codes.
+*
+*                               ---------------------- RETURNED BY HTTPsMem_ConnPoolInit() -----------------------
+*                               See HTTPsMem_ConnPoolInit() for additional return error codes.
+*
+* Return(s)   : Pointer to the instance handler, if NO error(s).
+*
+*               NULL pointer,                    otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a HTTPs server application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+HTTPs_INSTANCE  *HTTPs_InstanceInit (const  HTTPs_CFG      *p_cfg,
+                                     const  NET_TASK_CFG   *p_task_cfg,
+                                            HTTPs_ERR      *p_err)
+{
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+    const  NET_FS_API      *p_fs_api;
+#endif
+           HTTPs_INSTANCE  *p_instance;
+           CPU_BOOLEAN      init_active;
+           CPU_BOOLEAN      hook_def;
+           CPU_BOOLEAN      result;
+#if ((HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) && \
+     (HTTPs_CFG_FS_PRESENT_EN  == DEF_ENABLED))
+           CPU_INT32U       path_len_max;
+           CPU_CHAR         path_sep_char;
+#endif
+    CPU_SR_ALLOC();
+
+
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    init_active = HTTPs_InitActive;
+    CPU_CRITICAL_EXIT();
+
+
+    if (init_active == DEF_INACTIVE) {
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ------------------- VALIDATE PTR ------------------- */
+        if (p_cfg == DEF_NULL) {                                /* Validate cfg ptr.                                    */
+           *p_err = HTTPs_ERR_NULL_PTR;
+            return (DEF_NULL);
+        }
+
+        if (p_task_cfg == DEF_NULL) {                           /* Validate task cfg ptr.                               */
+           *p_err = HTTPs_ERR_NULL_PTR;
+            return (DEF_NULL);
+        }
+
+        switch (p_cfg->SockSel) {
+            case HTTPs_SOCK_SEL_IPv4:
+#ifndef   NET_IPv4_MODULE_EN
+                *p_err = HTTPs_ERR_CFG_INVALID_SOCK_SEL;
+                 return (DEF_NULL);
+#else
+                 break;
+#endif  /* NET_IPv4_MODULE_EN */
+
+
+            case HTTPs_SOCK_SEL_IPv6:
+#ifndef   NET_IPv6_MODULE_EN
+                *p_err = HTTPs_ERR_CFG_INVALID_SOCK_SEL;
+                 return (DEF_NULL);
+#else
+                 break;
+#endif  /* NET_IPv6_MODULE_EN */
+
+
+            case HTTPs_SOCK_SEL_IPv4_IPv6:
+#ifndef   NET_IPv4_MODULE_EN
+                *p_err = HTTPs_ERR_CFG_INVALID_SOCK_SEL;
+                 return (DEF_NULL);
+#endif  /* NET_IPv4_MODULE_EN */
+
+#ifndef   NET_IPv6_MODULE_EN
+                *p_err = HTTPs_ERR_CFG_INVALID_SOCK_SEL;
+                 return (DEF_NULL);
+#else
+                 break;
+#endif  /* NET_IPv6_MODULE_EN */
+
+
+            default:
+                *p_err = HTTPs_ERR_CFG_INVALID_SOCK_SEL;
+                 return (DEF_NULL);
+        }
+
+                                                                /* ------------------- VALIDATE CFG ------------------- */
+
+        if (p_cfg->SecurePtr != DEF_NULL) {                     /* Validate secure cfg.                                 */
+#ifndef  NET_SECURE_MODULE_EN
+           *p_err = HTTPs_ERR_CFG_INVALID_SECURE_EN;
+            return (DEF_NULL);
+#else
+            if (p_cfg->SecurePtr->CertPtr == DEF_NULL) {
+                *p_err = HTTPs_ERR_CFG_INVALID_SECURE_CERT_INVALID;
+                 return (DEF_NULL);
+            }
+
+            if (p_cfg->SecurePtr->CertLen == 0u) {
+                *p_err = HTTPs_ERR_CFG_INVALID_SECURE_CERT_INVALID;
+                 return (DEF_NULL);
+            }
+
+            if (p_cfg->SecurePtr->KeyPtr == DEF_NULL) {
+                *p_err = HTTPs_ERR_CFG_INVALID_SECURE_KEY_INVALID;
+                 return (DEF_NULL);
+            }
+
+            if (p_cfg->SecurePtr->KeyLen == 0u) {
+                *p_err = HTTPs_ERR_CFG_INVALID_SECURE_KEY_INVALID;
+                 return (DEF_NULL);
+            }
+
+            switch (p_cfg->SecurePtr->Fmt) {
+                case NET_SOCK_SECURE_CERT_KEY_FMT_PEM:
+                case NET_SOCK_SECURE_CERT_KEY_FMT_DER:
+                     break;
+
+
+                case NET_SOCK_SECURE_CERT_KEY_FMT_NONE:
+                default:
+                    *p_err = HTTPs_ERR_CFG_INVALID_SECURE_CERT_INVALID;
+                     return (DEF_NULL);
+            }
+#endif  /* NET_SECURE_MODULE_EN */
+        }
+
+        if (p_cfg->ConnNbrMax <= 0u) {                          /* Validate nbr conn.                                   */
+           *p_err = HTTPs_ERR_CFG_INVALID_NBR_CONN;
+            return (DEF_NULL);
+        }
+
+        if (p_cfg->BufLen < HTTPs_BUF_LEN_MIN) {                /* Validate buf len.                                    */
+           *p_err = HTTPs_ERR_CFG_INVALID_BUF_LEN;
+            return (DEF_NULL);
+        }
+
+        if (p_cfg->FS_CfgPtr == DEF_NULL) {                     /* Validate FS configuration pointer.                   */
+           *p_err = HTTPs_ERR_CFG_NULL_PTR_FS;
+            return (DEF_NULL);
+        }
+
+        if (p_cfg->DfltResourceNamePtr == DEF_NULL) {
+           *p_err = HTTPs_ERR_CFG_INVALID_DFLT_RESOURCE;
+            return (DEF_NULL);
+        }
+
+        switch (p_cfg->FS_Type) {
+            case HTTPs_FS_TYPE_NONE:
+                                                                /* Validate path len max.                               */
+                 if (((HTTPs_CFG_FS_NONE *)p_cfg->FS_CfgPtr)->PathLenMax <= 0) {
+                    *p_err = HTTPs_ERR_CFG_INVALID_PATH_LEN;
+                     return (DEF_NULL);
+                 }
+                 break;
+
+
+            case HTTPs_FS_TYPE_STATIC:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+                 p_fs_api = ((HTTPs_CFG_FS_STATIC *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+                 if (p_fs_api == DEF_NULL) {
+                    *p_err = HTTPs_ERR_CFG_INVALID_FS_API;
+                     return (DEF_NULL);
+                 }
+
+                 path_len_max = p_fs_api->CfgPathGetLenMax();
+                 if (path_len_max <= 0) {                       /* Validate FS path len max.                            */
+                    *p_err = HTTPs_ERR_CFG_INVALID_FS_PATH_LEN;
+                     return (DEF_NULL);
+                 }
+
+                 path_sep_char = p_fs_api->CfgPathGetSepChar();
+                 if (path_sep_char == ASCII_CHAR_NULL) {        /* Validate path sep char.                              */
+                    *p_err = HTTPs_ERR_CFG_INVALID_FS_SEP_CHAR;
+                     return (DEF_NULL);
+                 }
+#else
+                *p_err = HTTPs_ERR_CFG_INVALID_FS_EN;
+                 return (DEF_NULL);
+#endif
+                 break;
+
+            case HTTPs_FS_TYPE_DYN:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+                 p_fs_api = ((HTTPs_CFG_FS_DYN *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+                 if (p_fs_api == DEF_NULL) {
+                    *p_err = HTTPs_ERR_CFG_INVALID_FS_API;
+                     return (DEF_NULL);
+                 }
+
+                 path_len_max = p_fs_api->CfgPathGetLenMax();
+                 if (path_len_max <= 0) {                       /* Validate FS path len max.                            */
+                    *p_err = HTTPs_ERR_CFG_INVALID_FS_PATH_LEN;
+                     return (DEF_NULL);
+                 }
+
+                 path_sep_char = p_fs_api->CfgPathGetSepChar();
+                 if (path_sep_char == ASCII_CHAR_NULL) {        /* Validate path sep char.                              */
+                    *p_err = HTTPs_ERR_CFG_INVALID_FS_SEP_CHAR;
+                     return (DEF_NULL);
+                 }
+#else
+                *p_err = HTTPs_ERR_CFG_INVALID_FS_EN;
+                 return (DEF_NULL);
+#endif
+                 break;
+
+            default:
+                *p_err = HTTPs_ERR_CFG_INVALID_FS_TYPE;
+                 return (DEF_NULL);
+        }
+
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+        if (p_cfg->HostNameLenMax <= 0) {                       /* Validate host len max.                               */
+           *p_err = HTTPs_ERR_CFG_INVALID_HOST_LEN;
+            return (DEF_NULL);
+        }
+#endif  /* HTTPs_CFG_ABSOLUTE_URI_EN */
+
+                                                                /* Validate hdr field param.                            */
+        if (p_cfg->HdrRxCfgPtr != DEF_NULL) {
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+
+            if (p_cfg->HdrRxCfgPtr->DataLenMax <= 0) {          /* Validate Req hdr field val len.                      */
+               *p_err = HTTPs_ERR_CFG_INVALID_HDR_PARAM;
+                return (DEF_NULL);
+            }
+
+            if (p_cfg->HooksPtr == DEF_NULL) {                  /* The Header Rx hook must be defined.                  */
+               *p_err = HTTPs_ERR_CFG_INVALID_HDR_PARAM;
+                return (DEF_NULL);
+            } else {
+                if (p_cfg->HooksPtr->OnReqHdrRxHook == DEF_NULL) {
+                   *p_err = HTTPs_ERR_CFG_INVALID_HDR_PARAM;
+                    return (DEF_NULL);
+                }
+            }
+
+#else
+           *p_err = HTTPs_ERR_CFG_INVALID_HDR_EN;               /* Validate hdr field en param.                         */
+            return (DEF_NULL);
+#endif  /* HTTPs_CFG_HDR_RX_EN */
+        }
+
+        if (p_cfg->HdrTxCfgPtr != DEF_NULL) {
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+
+            if (p_cfg->HdrTxCfgPtr->DataLenMax <= 0) {          /* Validate Resp hdr field val len.                     */
+               *p_err = HTTPs_ERR_CFG_INVALID_HDR_PARAM;
+                return (DEF_NULL);
+            }
+
+            if (p_cfg->HooksPtr == DEF_NULL) {                  /* The Header Tx hook must be defined.                  */
+               *p_err = HTTPs_ERR_CFG_INVALID_HDR_PARAM;
+                return (DEF_NULL);
+            } else {
+                if (p_cfg->HooksPtr->OnRespHdrTxHook == DEF_NULL) {
+                   *p_err = HTTPs_ERR_CFG_INVALID_HDR_PARAM;
+                    return (DEF_NULL);
+                }
+            }
+
+#else
+           *p_err = HTTPs_ERR_CFG_INVALID_HDR_EN;               /* Validate hdr field en param.                         */
+            return (DEF_NULL);
+#endif  /* HTTPs_CFG_HDR_TX_EN */
+        }
+
+        if (p_cfg->TokenCfgPtr != DEF_NULL) {                   /* Validate token param.                                */
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+
+            if (p_cfg->TokenCfgPtr->ValLenMax <= 0u) {          /* Validate token val len max.                          */
+               *p_err = HTTPs_ERR_CFG_INVALID_TOKEN_PARAM;
+                return (DEF_NULL);
+            }
+
+            if (p_cfg->HooksPtr == DEF_NULL) {                  /* Validate token hook function.                        */
+               *p_err = HTTPs_ERR_CFG_INVALID_TOKEN_PARAM;
+                return (DEF_NULL);
+            } else {
+                if (p_cfg->HooksPtr->OnRespTokenHook == DEF_NULL) {
+                   *p_err = HTTPs_ERR_CFG_INVALID_TOKEN_PARAM;
+                    return (DEF_NULL);
+                }
+            }
+#else
+           *p_err = HTTPs_ERR_CFG_INVALID_TOKEN_EN;             /* Validate token en param.                             */
+            return (DEF_NULL);
+#endif  /* HTTPs_CFG_TOKEN_PARSE_EN */
+        }
+
+        if (p_cfg->QueryStrCfgPtr != DEF_NULL) {
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+
+            if (p_cfg->QueryStrCfgPtr->KeyLenMax <= 0u) {       /* Validate Key length max.                             */
+               *p_err = HTTPs_ERR_CFG_INVALID_FORM_PARAM;
+                return (DEF_NULL);
+            }
+
+            if (p_cfg->QueryStrCfgPtr->ValLenMax <= 0u) {       /* Validate Value length max.                           */
+               *p_err = HTTPs_ERR_CFG_INVALID_FORM_PARAM;
+                return (DEF_NULL);
+            }
+#else
+            *p_err = HTTPs_ERR_CFG_INVALID_QUERY_STR_EN;        /* Validate Query String en param.                      */
+             return (DEF_NULL);
+#endif
+        }
+
+        if (p_cfg->FormCfgPtr != DEF_NULL) {                    /* Validate Form param.                                 */
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+
+            if (p_cfg->FormCfgPtr->KeyLenMax <= 0u) {           /* Validate Key length max.                             */
+               *p_err = HTTPs_ERR_CFG_INVALID_FORM_PARAM;
+                return (DEF_NULL);
+            }
+
+            if (p_cfg->FormCfgPtr->ValLenMax <= 0u) {           /* Validate Value length max.                           */
+               *p_err = HTTPs_ERR_CFG_INVALID_FORM_PARAM;
+                return (DEF_NULL);
+            }
+
+                                                                /* Validate multipart param.                            */
+            if ((p_cfg->FormCfgPtr->MultipartEn                  == DEF_ENABLED) &&
+                (p_cfg->FormCfgPtr->MultipartFileUploadEn        == DEF_ENABLED) &&
+                (p_cfg->FormCfgPtr->MultipartFileUploadFolderPtr == DEF_NULL)  ) {
+                *p_err = HTTPs_ERR_CFG_INVALID_FORM_PARAM;
+                 return (DEF_NULL);
+            }
+
+            if ((p_cfg->FormCfgPtr->MultipartFileUploadEn == DEF_ENABLED)        &&
+                (p_cfg->FS_Type                           != HTTPs_FS_TYPE_DYN)) {
+                *p_err = HTTPs_ERR_CFG_INVALID_FS_API;
+                 return (DEF_NULL);
+            }
+
+            if (p_cfg->HooksPtr == DEF_NULL) {                  /* Validate Form hook function.                         */
+               *p_err = HTTPs_ERR_CFG_INVALID_FORM_PARAM;
+                return (DEF_NULL);
+            } else {
+                if (p_cfg->HooksPtr->OnReqRdySignalHook == DEF_NULL) {
+                   *p_err = HTTPs_ERR_CFG_INVALID_FORM_PARAM;
+                    return (DEF_NULL);
+                }
+            }
+                                                                /* Validate buf len for Form.                           */
+            if (p_cfg->BufLen < (p_cfg->FormCfgPtr->KeyLenMax + p_cfg->FormCfgPtr->ValLenMax)) {
+               *p_err = HTTPs_ERR_CFG_INVALID_BUF_LEN;
+                return (DEF_NULL);
+            }
+#else
+           *p_err = HTTPs_ERR_CFG_INVALID_FORM_EN;              /* Validate Form en param.                              */
+            return (DEF_NULL);
+#endif  /* HTTPs_CFG_FORM_EN */
+        }
+#endif  /* HTTPs_CFG_ARG_CHK_EXT_EN */
+
+
+                                                                /* ------------------- GET INSTANCE ------------------- */
+        p_instance = HTTPsMem_InstanceGet(p_err);
+        if ((*p_err      != HTTPs_ERR_NONE) ||
+            ( p_instance == DEF_NULL)      ) {
+            return (DEF_NULL);
+        }
+
+                                                                /* ---------- INITIALIZE INSTANCE PARAMETERS ---------- */
+        p_instance->CfgPtr         = p_cfg;
+        p_instance->TaskCfgPtr     = p_task_cfg;
+        p_instance->Started        = DEF_NO;
+
+
+        switch (p_cfg->FS_Type) {
+            case HTTPs_FS_TYPE_NONE:
+                 break;
+
+            case HTTPs_FS_TYPE_STATIC:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+                 p_fs_api = ((HTTPs_CFG_FS_STATIC *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+                 p_instance->FS_PathLenMax  = p_fs_api->CfgPathGetLenMax();
+                 p_instance->FS_PathSepChar = p_fs_api->CfgPathGetSepChar();
+#endif
+                 break;
+
+
+            case HTTPs_FS_TYPE_DYN:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+                 p_fs_api = ((HTTPs_CFG_FS_DYN *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+                 p_instance->FS_PathLenMax  = p_fs_api->CfgPathGetLenMax();
+                 p_instance->FS_PathSepChar = p_fs_api->CfgPathGetSepChar();
+#endif
+                 break;
+
+            default:
+                *p_err = HTTPs_ERR_CFG_INVALID_FS_TYPE;
+                 return (DEF_NULL);
+        }
+
+
+        p_instance->OS_LockObj = HTTPsTask_LockCreate(p_err);
+        if (*p_err != HTTPs_ERR_NONE){
+             p_instance->OS_TaskObjPtr = (HTTPs_OS_TASK_OBJ *)DEF_NULL;
+             HTTPsMem_InstanceRelease(p_instance);
+             return (DEF_NULL);
+        }
+
+
+                                                                /* ------------------- INIT OS OBJ -------------------- */
+        HTTPsTask_InstanceObjInit(p_instance, p_err);
+        if (*p_err != HTTPs_ERR_NONE) {
+             HTTPsMem_InstanceRelease(p_instance);
+             return (DEF_NULL);
+        }
+
+
+                                                                /* ------------------ INIT CONN POOL ------------------ */
+        HTTPsMem_ConnPoolInit(p_instance,
+                               p_err);
+        if (*p_err != HTTPs_ERR_NONE) {
+             HTTPsMem_InstanceRelease(p_instance);
+             return (DEF_NULL);
+        }
+
+        hook_def = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnInstanceInitHook);
+        if (hook_def == DEF_YES) {
+                                                                /* If Instance conn objs init handler is not null ...   */
+                                                                /* ... call Instance conn objs init handler.            */
+            result = p_cfg->HooksPtr->OnInstanceInitHook(p_instance,
+                                                         p_cfg->Hooks_CfgPtr);
+            if (result != DEF_OK) {
+                HTTPsMem_InstanceRelease(p_instance);
+               *p_err = HTTPs_ERR_INIT_INSTANCE_HOOK_FAULT;
+                return (DEF_NULL);
+            }
+        }
+
+
+    } else {                                                    /* HTTPs_InitActive != DEF_INACTIVE                     */
+       *p_err = HTTPs_ERR_INIT;
+        return (DEF_NULL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    ++HTTPs_InstanceInitializedNbr;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = HTTPs_ERR_NONE;
+
+    return (p_instance);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_InstanceStart()
+*
+* Description : (1) Start a specific HTTPs server instance which has been previously initialized:
+*
+*                   (a) Validate return error pointer.
+*                   (b) Initialize instance listen socket.
+*                   (c) Create and start HTTP server instance task.
+*
+* Argument(s) : p_instance  Pointer to specific HTTP server instance handler.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE      Instance HTTPs server is started.
+*
+*                           --------------- RETURNED BY HTTPsTask_LockCreate() ------------------
+*                           See HTTPsTask_LockCreate() for additional return error codes.
+*
+*                           --------------- RETURNED BY HTTPsSock_ListenInit() ------------------
+*                           See HTTPsSock_ListenInit() for additional return error codes.
+*
+*                           ----------- RETURNED BY HTTPsTask_InstanceTaskCreate() --------------
+*                           See HTTPsTask_InstanceTaskCreate() for additional return error codes.
+*
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a HTTPs server application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPs_InstanceStart (HTTPs_INSTANCE  *p_instance,
+                           HTTPs_ERR       *p_err)
+{
+    const  HTTPs_CFG    *p_cfg;
+#ifdef   NET_IPv4_MODULE_EN
+           NET_SOCK_ID   sock_listen_ipv4;
+#endif
+#ifdef   NET_IPv6_MODULE_EN
+           NET_SOCK_ID   sock_listen_ipv6;
+#endif
+           NET_ERR       err;
+           CPU_SR_ALLOC();
+
+
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+                                                                /* Acquire Instance lock.                               */
+    HTTPsTask_LockAcquire(p_instance->OS_LockObj, p_err);
+    if (*p_err != HTTPs_ERR_NONE) {
+         return;
+    }
+
+    if (p_instance->Started == DEF_YES) {
+        HTTPsTask_LockRelease(p_instance->OS_LockObj);
+       *p_err = HTTPs_ERR_NONE;
+        return;
+    }
+
+    p_cfg = p_instance->CfgPtr;
+
+                                                                /* ----------------- INIT LISTEN SOCK ----------------- */
+    switch (p_cfg->SockSel) {
+        case HTTPs_SOCK_SEL_IPv4:
+#ifdef   NET_IPv4_MODULE_EN
+             sock_listen_ipv4 = HTTPsSock_ListenInit(p_cfg, NET_SOCK_PROTOCOL_FAMILY_IP_V4, p_err);
+             if (*p_err != HTTPs_ERR_NONE){
+                  return;
+             }
+             p_instance->SockListenID_IPv4 = sock_listen_ipv4;
+#else
+            *p_err = HTTPs_ERR_CFG_INVALID_SOCK_SEL;
+#endif
+             break;
+
+
+
+        case HTTPs_SOCK_SEL_IPv6:
+#ifdef   NET_IPv6_MODULE_EN
+             sock_listen_ipv6 = HTTPsSock_ListenInit(p_cfg, NET_SOCK_PROTOCOL_FAMILY_IP_V6, p_err);
+             if (*p_err != HTTPs_ERR_NONE){
+                  return;
+             }
+
+             p_instance->SockListenID_IPv6 = sock_listen_ipv6;
+             break;
+#else
+            *p_err = HTTPs_ERR_CFG_INVALID_SOCK_SEL;
+             return;
+#endif
+
+
+        case HTTPs_SOCK_SEL_IPv4_IPv6:
+#ifndef  NET_IPv4_MODULE_EN
+            *p_err = HTTPs_ERR_CFG_INVALID_SOCK_SEL;
+             return;
+#elif (!defined(NET_IPv6_MODULE_EN))
+             *p_err = HTTPs_ERR_CFG_INVALID_SOCK_SEL;
+              return;
+#else
+              sock_listen_ipv4 = HTTPsSock_ListenInit(p_cfg, NET_SOCK_PROTOCOL_FAMILY_IP_V4, p_err);
+              if (*p_err != HTTPs_ERR_NONE){
+                   return;
+              }
+
+              p_instance->SockListenID_IPv4 = sock_listen_ipv4;
+
+              sock_listen_ipv6 = HTTPsSock_ListenInit(p_cfg, NET_SOCK_PROTOCOL_FAMILY_IP_V6, p_err);
+
+              if (*p_err != HTTPs_ERR_NONE){
+                  (void)NetSock_Close(sock_listen_ipv4, &err);  /* Close IPv4 sock.                                     */
+                  return;
+              }
+
+              p_instance->SockListenID_IPv6 = sock_listen_ipv6;
+              break;
+#endif
+
+
+        default:
+            *p_err = HTTPs_ERR_CFG_INVALID_SOCK_SEL;
+             return;
+    }
+
+   (void)&err;
+
+
+                                                                /* -------------- CREATE & START OS TASK -------------- */
+    HTTPsTask_InstanceTaskCreate(p_instance, p_err);            /* return err of sub-fcnts.                             */
+    if (*p_err != HTTPs_ERR_NONE) {
+         HTTPsTask_LockRelease(p_instance->OS_LockObj);         /* Release instance lock.                               */
+         return;
+    }
+
+    CPU_CRITICAL_ENTER();
+    ++HTTPs_InstanceRunningNbr;
+    CPU_CRITICAL_EXIT();
+
+    HTTPsTask_LockRelease(p_instance->OS_LockObj);              /* Release instance lock.                               */
+
+   *p_err = HTTPs_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_InstanceStop()
+*
+* Description : (1) Stop a specific HTTPs server instance:
+*
+*                   (a) Validate return error pointer.
+*                   (b) Search instance structure.
+*                   (c) Signal instance to stop the task.
+*                   (d) Wait for stop completed.
+*
+* Argument(s) : p_instance  Pointer to Instance handler.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE      Instance HTTPs server is started.
+*
+*                               --------------------- RETURNED BY HTTPsTask_LockCreate() ----------------------
+*                               See HTTPsTask_LockCreate() for additional return error codes.
+*
+*                               ---------------- RETURNED BY HTTPsTask_InstanceStopReqSignal() ----------------
+*                               See HTTPsTask_InstanceStopReqSignal() for additional return error codes.
+*
+*                               ----------- RETURNED BY HTTPsTask_InstanceStopCompletedPending() --------------
+*                               See HTTPsTask_InstanceStopCompletedPending() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is an application interface (API) function & MAY be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPs_InstanceStop (HTTPs_INSTANCE  *p_instance,
+                          HTTPs_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+                                                                /* Acquire Instance lock.                               */
+    HTTPsTask_LockAcquire(p_instance->OS_LockObj, p_err);
+    if (*p_err != HTTPs_ERR_NONE) {
+         return;
+    }
+
+
+    if (p_instance->Started != DEF_YES) {
+        HTTPsTask_LockRelease(p_instance->OS_LockObj);
+       *p_err = HTTPs_ERR_NONE;
+        return;
+    }
+
+
+                                                                /* ------------- SIGNAL INSTANCE TO STOP -------------- */
+    HTTPsTask_InstanceStopReqSignal(p_instance, p_err);
+    if (*p_err != HTTPs_ERR_NONE) {
+         HTTPsTask_LockRelease(p_instance->OS_LockObj);
+         return;
+    }
+
+    HTTPsTask_LockRelease(p_instance->OS_LockObj);              /* Release Instance lock before pending.                */
+
+                                                                /* --------------- WAIT STOP COMPLETED ---------------- */
+    HTTPsTask_InstanceStopCompletedPending(p_instance, p_err);
+    if (*p_err != HTTPs_ERR_NONE) {
+         return;
+    }
+
+                                                                /* Re-acquire Instance lock.                            */
+    HTTPsTask_LockAcquire(p_instance->OS_LockObj, p_err);
+    if (*p_err != HTTPs_ERR_NONE) {
+         return;
+    }
+                                                                /* ---------------- DEL INSTANCE TASK ----------------- */
+    HTTPsTask_InstanceTaskDel(p_instance);
+
+    CPU_CRITICAL_ENTER();
+    --HTTPs_InstanceRunningNbr;
+    CPU_CRITICAL_EXIT();
+
+    HTTPsTask_LockRelease(p_instance->OS_LockObj);              /* Release Instance lock.                               */
+
+   *p_err = HTTPs_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_RespHdrGet()
+*
+* Description : Acquire a new response header block.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               hdr_field   Type of the response header value :
+*
+*                               See enumeration HTTPs_HDR_FIELD.
+*
+*               val_type    Data type of the response header field value :
+*
+*                               HTTPs_HDR_VAL_TYPE_NONE     Header field doesn't require value.
+*                               HTTPs_HDR_VAL_TYPE_STR      Header value type is a string.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE                  If returned a valid block.
+*
+*                               ------------- RETURNED BY HTTPsMem_RespHdrGet() -------------
+*                               See HTTPsMem_RespHdrGet() for additional return error codes.
+*
+* Return(s)   : Pointer to the response header block that can be filled with data, if no error(s).
+*
+*               Null pointer, otherwise
+*
+* Caller(s)   : Application. (Inside Hooks)
+*
+*               This function is a HTTPs server application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Must be called from a callback function only. Should be called by the function pointed by
+*                   RespHdrTxFnctPtr in the instance configuration.
+*
+*                   (a) The instance lock must be acquired before calling this function. It's why this function
+*                       must be called from a callback function.
+*
+*               (2) The header block is automatically added to the header blocks list. Thus the caller has not to
+*                   add the block to the list. Only filling the value and value length should be required by the
+*                   caller.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+HTTPs_HDR_BLK *HTTPs_RespHdrGet (const HTTPs_INSTANCE      *p_instance,
+                                       HTTPs_CONN          *p_conn,
+                                       HTTP_HDR_FIELD       hdr_field,
+                                       HTTPs_HDR_VAL_TYPE   val_type,
+                                       HTTPs_ERR           *p_err)
+{
+    HTTPs_HDR_BLK  *p_blk;
+
+
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_instance == DEF_NULL) {
+       *p_err = HTTPs_ERR_NULL_PTR;
+        p_blk = DEF_NULL;
+        goto exit;
+    }
+
+    if (p_conn == DEF_NULL) {
+       *p_err = HTTPs_ERR_NULL_PTR;
+        p_blk = DEF_NULL;
+        goto exit;
+    }
+#endif
+
+    p_blk = HTTPsMem_RespHdrGet((HTTPs_INSTANCE *)p_instance,
+                                                  p_conn,
+                                                  hdr_field,
+                                                  val_type,
+                                                  p_err);
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit:
+#endif
+    return (p_blk);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPs_RespBodySetParamFile()
+*
+* Description : Set the parameters for the response body when the body's data is a file inside a File System
+*               infrastructure.
+*
+* Argument(s) : p_instance      Pointer to the instance.
+*               ----------       Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn          Pointer to the connection.
+*               ------           Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_path          Pointer to the string file path.
+*
+*               content_type    Content type of the file.
+*                                   If unknown, can be set to HTTP_CONTENT_TYPE_UNKNOWN. The server core
+*                                   will found it with the file extension.
+*                                   See HTTP_CONTENT_TYPE enum in http.h for possible content types.
+*
+*               token_en        DEF_YES, if the file contents tokens the server needs to replace.
+*                               DEF_NO, otherwise.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application. (Inside Hooks)
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPs_RespBodySetParamFile (const  HTTPs_INSTANCE        *p_instance,
+                                         HTTPs_CONN            *p_conn,
+                                         CPU_CHAR              *p_path,
+                                         HTTP_CONTENT_TYPE      content_type,
+                                         CPU_BOOLEAN            token_en,
+                                         HTTPs_ERR             *p_err)
+{
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    const  HTTPs_CFG  *p_cfg = p_instance->CfgPtr;
+#endif
+
+
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_instance == DEF_NULL) {
+       *p_err = HTTPs_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_conn == DEF_NULL) {
+       *p_err = HTTPs_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_conn->RespBodyDataType = HTTPs_BODY_DATA_TYPE_FILE;
+
+    if (p_path != DEF_NULL) {
+        Mem_Copy(p_conn->PathPtr, p_path, p_conn->PathLenMax);
+    } else {
+        *p_err = HTTPs_ERR_RESP_PATH_PTR_INVALID;
+         goto exit;
+    }
+
+    if (content_type != HTTP_CONTENT_TYPE_UNKNOWN) {
+        p_conn->RespContentType = content_type;
+    }
+
+    if (token_en == DEF_YES) {
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+        if (p_cfg->TokenCfgPtr != DEF_NULL) {
+            DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+        } else {
+            DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+           *p_err = HTTPs_ERR_CFG_INVALID_TOKEN_EN;
+            goto exit;
+         }
+#else
+        DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+       *p_err = HTTPs_ERR_CFG_INVALID_TOKEN_EN;
+        goto exit;
+#endif
+    } else {
+        DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPs_RespBodySetParamStaticData()
+*
+* Description : Set the parameters for the response body when the body's data is a static data contains in
+*               a memory space.
+*
+* Argument(s) : p_instance      Pointer to the instance.
+*               ----------       Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn          Pointer to the connection.
+*               ------           Argument validated in HTTPsSock_ConnAccept().
+*
+*               content_type    Content type of the file.
+*                                   See HTTP_CONTENT_TYPE enum in http.h for possible content types.
+*
+*               p_data          Pointer to memory section containing data.
+*                               DEF_NULL, if data will added to the response with the 'OnRespChunkHook' Hook.
+*
+*               data_len        Data length.
+*
+*               token_en        DEF_YES, if the data contents tokens the server needs to replace.
+*                               DEF_NO, otherwise.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   HTTPs_ERR_NONE
+*                                   HTTPs_ERR_NULL_PTR
+*                                   HTTPs_ERR_RESP_BODY_DATA_LEN_INVALID
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application. (Inside Hooks)
+*
+* Note(s)     : (1) This function can be used when the data to put in the response body is not inside a file
+*                   within a File System.
+*
+*               (2) If all the data to send is inside a memory space, the 'p_data' parameter can be set
+*                   to point to the memory space and the 'data_len' must be set since the data length is
+*                   known.
+*
+*               (3) When the data to send is a stream of unknown size, the Chunked Transfer Encoding must be
+*                   used. In that case, the function can be used with the parameter 'p_data' set to DEF_NULL.
+*                   This will tell the server to use the hook function 'p_cfg->p_hooks->OnRespChunkHook' to
+*                   retrieve the data to put in the HTTP response.
+*********************************************************************************************************
+*/
+
+void  HTTPs_RespBodySetParamStaticData (const  HTTPs_INSTANCE        *p_instance,
+                                               HTTPs_CONN            *p_conn,
+                                               HTTP_CONTENT_TYPE      content_type,
+                                               void                  *p_data,
+                                               CPU_INT32U             data_len,
+                                               CPU_BOOLEAN            token_en,
+                                               HTTPs_ERR             *p_err)
+{
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    const  HTTPs_CFG  *p_cfg = p_instance->CfgPtr;
+#endif
+
+
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_instance == DEF_NULL) {
+       *p_err = HTTPs_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_conn == DEF_NULL) {
+       *p_err = HTTPs_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_conn->RespBodyDataType = HTTPs_BODY_DATA_TYPE_STATIC_DATA;
+
+#if 0
+    if (content_type == HTTP_CONTENT_TYPE_UNKNOWN) {
+       *p_err = HTTPs_ERR_RESP_CONTENT_TYPE_INVALID;
+        goto exit;
+    }
+#endif
+
+    p_conn->RespContentType  = content_type;
+
+    if (p_data != DEF_NULL) {
+        if (data_len <= 0) {
+           *p_err = HTTPs_ERR_RESP_BODY_DATA_LEN_INVALID;
+            goto exit;
+        }
+        p_conn->DataPtr = p_data;
+        p_conn->DataLen = data_len;
+        DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED_HOOK);
+    } else {
+        DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED_HOOK);
+    }
+
+    if (token_en == DEF_YES) {
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+        if (p_cfg->TokenCfgPtr != DEF_NULL) {
+            DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+        } else {
+            DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+           *p_err = HTTPs_ERR_CFG_INVALID_TOKEN_EN;
+            goto exit;
+         }
+#else
+        DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+       *p_err = HTTPs_ERR_CFG_INVALID_TOKEN_EN;
+        goto exit;
+#endif
+    } else {
+        DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPs_RespBodySetParamNoBody()
+*
+* Description : Set the parameters to let the server know that no body is necessary in the response.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------   Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------       Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE                  Parameter successfully set.
+*                               HTTPs_ERR_NULL_PTR              NULL argument(s) was passed.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application. (Inside Hooks)
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPs_RespBodySetParamNoBody (const HTTPs_INSTANCE  *p_instance,
+                                          HTTPs_CONN      *p_conn,
+                                          HTTPs_ERR       *p_err)
+{
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_instance == DEF_NULL) {
+       *p_err = HTTPs_ERR_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_conn == DEF_NULL) {
+       *p_err = HTTPs_ERR_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_conn->RespBodyDataType = HTTPs_BODY_DATA_TYPE_NONE;
+    p_conn->RespContentType  = HTTP_CONTENT_TYPE_UNKNOWN;
+    p_conn->DataPtr = DEF_NULL;
+    p_conn->DataLen = 0;
+
+    DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+    DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED_HOOK);
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit:
+#endif
+    return;
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s.h
new file mode 100644
index 0000000..688ab06
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s.h
@@ -0,0 +1,1704 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             HTTP SERVER
+*
+* Filename      : http-s.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                         (a) uC/CPU    V1.30.0
+*                         (b) uC/LIB    V1.38.00
+*                         (c) uC/Common V1.01.00
+*                         (d) uC/TCP-IP V3.03.00
+*
+*                         See also 'HTTPs INCLUDE FILES  Notes #1, #2 & #3' in http-s.h.
+*
+*                 (2) For additional details on the features available with uC/HTTP-server, the API, the
+*                     installation, etc. Please refer to the uC/HTTP-server documentation available at
+*                     https://doc.micrium.com/display/httpdoc.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTP module present pre-processor macro definition.
+*
+*               See also 'HTTPs INCLUDE FILES  Note #5'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPs_MODULE_PRESENT                                   /* See Note #1.                                         */
+#define  HTTPs_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        HTTPs VERSION NUMBER
+*
+* Note(s) : (1) (a) The HTTPs module software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The HTTPs software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_VERSION                                 30002u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         HTTPs INCLUDE FILES
+*
+* Note(s) : (1) The HTTPs module files are located in the following directories :
+*
+*               (a) (1) \\http-s_cfg.h
+*                   (2)                            \http-s_instance_cfg.*
+*
+*               (b) (1) \\Source\net_*.*
+*
+*                   (2) If a dynamic file system is used:
+*
+*                       (A) \\FS\\net_fs_.*
+*
+*                   (3) If network security manager is to be used:
+*
+*                       (A) \\Secure\\net_secure.*
+*
+*               (c) (1) \\Source\http-s.*
+*                                      \http-s_mem.*
+*
+*                   (2) If a dynamic file system is not used:
+*
+*                       (A) \\FS\Static\http-s_fs_static.*
+*
+*               where
+*                         directory path for Your Product's Application
+*                           directory path for network protocol suite
+*                                            directory path for HTTPs module
+*
+*           (2) CPU-configuration software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) NO compiler-supplied standard library functions SHOULD be used.
+*
+*               (a) Standard library functions are implemented in the custom library module(s) :
+*
+*                       \\lib_*.*
+*
+*                           where
+*                                         directory path for custom library software
+*
+*           (4) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\'                                          See Note #1a
+*
+*               (b) (1) '\\                                         See Note #1b1
+*
+*                   (2) '\\Secure\\'        See Note #1b2A
+*
+*               (c) '\\' directories                                                 See Note #1c
+*
+*               (d) (1) '\\'                                        See Note #2a
+*                   (2) '\\\\'                       See Note #2b
+*
+*               (e) '\\'                                          See Note #3a
+*
+*           (5) An application pre-processor MUST include ONLY this main HTTPs server header file, 'net.h'.
+*               All other network protocol suite files are included via this main HTTP server header file.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                                 /* CPU Configuration              (see Note #2b)        */
+#include                                            /* CPU Core Library               (see Note #2a)        */
+
+#include                                             /* Standard        Defines        (see Note #3a)        */
+#include                                             /* Standard String Library        (see Note #3a)        */
+#include                                           /* Standard ASCII  Library        (see Note #3a)        */
+
+#include  
+#include                                           /* File System Interface          (see Note #1c3)       */
+
+#include                                          /* Network Protocol Suite         (see Note #1b)        */
+#include  
+#include  
+#include  
+#include  
+
+#include  "../../Common/http.h"
+#include  "../../Common/http_dict.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef HTTPs_MODULE
+#define  HTTPs_EXT
+#else
+#define  HTTPs_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       PRE CONFIGURATION ERROR
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPs_CFG_ARG_CHK_EXT_EN
+    #error  "HTTPs_CFG_ARG_CHK_EXT_EN not #define'd in 'http-s_cfg.h'"
+#elif  ((HTTPs_CFG_ARG_CHK_EXT_EN != DEF_ENABLED ) && \
+        (HTTPs_CFG_ARG_CHK_EXT_EN != DEF_DISABLED))
+    #error  "HTTPs_CFG_ARG_CHK_EXT_EN illegally #define'd in 'http-s_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+
+#ifndef  HTTPs_CFG_CTR_STAT_EN
+    #error  "HTTPs_CFG_CTR_STAT_EN not #define'd in 'http-s_cfg.h'"
+#elif  ((HTTPs_CFG_CTR_STAT_EN != DEF_ENABLED ) && \
+        (HTTPs_CFG_CTR_STAT_EN != DEF_DISABLED))
+    #error  "HTTPs_CFG_CTR_STAT_EN illegally #define'd in 'http-s_cfg.h'. MUST be  DEF_DISABLED or DEF_ENABLED"
+#endif
+
+
+#ifndef  HTTPs_CFG_CTR_ERR_EN
+    #error  "HTTPs_CFG_CTR_ERR_EN not #define'd in 'http-s_cfg.h'"
+#elif  ((HTTPs_CFG_CTR_ERR_EN != DEF_ENABLED ) && \
+        (HTTPs_CFG_CTR_ERR_EN != DEF_DISABLED))
+    #error  "HTTPs_CFG_CTR_ERR_EN illegally #define'd in 'http-s_cfg.h'. MUST be  DEF_DISABLED or DEF_ENABLED"
+#endif
+
+
+#ifndef  HTTPs_CFG_PERSISTENT_CONN_EN
+    #error  "HTTPs_CFG_PERSISTENT_CONN_EN not #define'd in 'http-s_cfg.h'"
+#elif  ((HTTPs_CFG_PERSISTENT_CONN_EN != DEF_ENABLED ) && \
+        (HTTPs_CFG_PERSISTENT_CONN_EN != DEF_DISABLED))
+    #error  "HTTPs_CFG_PERSISTENT_CONN_EN illegally #define'd in 'http-s_cfg.h'. MUST be  DEF_DISABLED or DEF_ENABLED"
+#endif
+
+
+#ifndef  HTTPs_CFG_TOKEN_PARSE_EN
+    #error  "HTTPs_CFG_TOKEN_PARSE_EN not #define'd in 'http-s_cfg.h'"
+#elif  ((HTTPs_CFG_TOKEN_PARSE_EN != DEF_ENABLED ) && \
+        (HTTPs_CFG_TOKEN_PARSE_EN != DEF_DISABLED))
+    #error  "HTTPs_CFG_TOKEN_PARSE_EN illegally #define'd in 'http-s_cfg.h'. MUST be  DEF_DISABLED or DEF_ENABLED"
+#endif
+
+
+#ifndef  HTTPs_CFG_ABSOLUTE_URI_EN
+    #error  "HTTPs_CFG_ABSOLUTE_URI_EN not #define'd in 'http-s_cfg.h'"
+#elif  ((HTTPs_CFG_ABSOLUTE_URI_EN != DEF_ENABLED ) && \
+        (HTTPs_CFG_ABSOLUTE_URI_EN != DEF_DISABLED))
+    #error  "HTTPs_CFG_ABSOLUTE_URI_EN illegally #define'd in 'http-s_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+
+#ifndef  HTTPs_CFG_QUERY_STR_EN
+    #error  "HTTPs_CFG_QUERY_STR_EN not #define'd in 'http-s_cfg.h'"
+#elif  ((HTTPs_CFG_QUERY_STR_EN != DEF_ENABLED ) && \
+        (HTTPs_CFG_QUERY_STR_EN != DEF_DISABLED))
+    #error  "HTTPs_CFG_QUERY_STR_EN illegally #define'd in 'http-s_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+
+#ifndef  HTTPs_CFG_FORM_EN
+    #error  "HTTPs_CFG_FORM_EN not #define'd in 'http-s_cfg.h'"
+#elif ((HTTPs_CFG_FORM_EN != DEF_ENABLED ) && \
+       (HTTPs_CFG_FORM_EN != DEF_DISABLED))
+    #error  "HTTPs_CFG_FORM_EN illegally #define'd in 'http-s_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+
+#elif (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    #ifndef  HTTPs_CFG_FORM_MULTIPART_EN
+        #error  "HTTPs_CFG_FORM_MULTIPART_EN not #define'd in 'http-s_cfg.h'"
+    #elif  ((HTTPs_CFG_FORM_MULTIPART_EN != DEF_ENABLED ) && \
+            (HTTPs_CFG_FORM_MULTIPART_EN != DEF_DISABLED))
+        #error  "HTTPs_CFG_FORM_MULTIPART_EN illegally #define'd in 'http-s_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+    #endif
+#endif
+
+
+#ifndef HTTPs_CFG_HDR_RX_EN
+    #error  "HTTPs_CFG_RX_HDR_EN not #define'd in 'http-s_cfg.h'"
+#elif  ((HTTPs_CFG_HDR_RX_EN != DEF_ENABLED ) && \
+        (HTTPs_CFG_HDR_RX_EN != DEF_DISABLED))
+    #error  "HTTPs_CFG_HDR_RX_EN illegally #define'd in 'http-s_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+
+#ifndef HTTPs_CFG_HDR_TX_EN
+    #error  "HTTPs_CFG_TX_HDR_EN not #define'd in 'http-s_cfg.h'"
+#elif  ((HTTPs_CFG_HDR_TX_EN != DEF_ENABLED ) && \
+        (HTTPs_CFG_HDR_TX_EN != DEF_DISABLED))
+    #error  "HTTPs_CFG_HDR_TX_EN illegally #define'd in 'http-s_cfg.h'. MUST be DEF_DISABLED or DEF_ENABLED"
+#endif
+
+
+#ifndef  HTTPs_CFG_HTML_DFLT_ERR_PAGE
+    #error  "HTTPs_CFG_HTML_DFLT_ERR_PAGE not #define'd in 'http-s_cfg.h'. MUST be defined as a string"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if     (NET_VERSION < 30300u)
+#error  "NET_VERSION: Invalid network protocol suite version. MUST be >= 3.03.00"
+#endif
+
+
+#if     (NET_SOCK_CFG_SEL_EN != DEF_ENABLED)
+#error  "NET_SOCK_CFG_SEL_EN: illegally #define'd in 'net_cfg.h'. MUST be DEF_ENABLED"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      LIB CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if     (LIB_VERSION < 13701u)
+#error  "LIB_VERSION: Invalid library suite version. MUST be >= 1.37.01"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      GENERAL HTTPs DEFINES
+*********************************************************************************************************
+*/
+
+#define  HTTPs_CFG_DFLT_PORT                                 80u
+#define  HTTPs_CFG_DFLT_PORT_SECURE                         443u
+
+#define  HTTPs_BUF_LEN_MIN                                  256u
+
+#define  HTTPs_PATH_SEP_CHAR_DFLT                           '/'
+
+
+/*
+*********************************************************************************************************
+*                                     STATIC ERR FILE LEN DEFINES
+*********************************************************************************************************
+*/
+
+#define  HTTPs_HTML_DLFT_ERR_LEN                            sizeof(HTTPs_CFG_HTML_DFLT_ERR_PAGE)
+#define  HTTPs_HTML_DLFT_ERR_STR_NAME                       "default.html"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            ENUMERATIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         ERRORS ENUMERATIONS
+*********************************************************************************************************
+*/
+
+typedef enum https_err {
+    HTTPs_ERR_NONE = 1,
+
+    HTTPs_ERR_NULL_PTR,
+
+    HTTPs_ERR_INIT,
+
+    HTTPs_ERR_MEM_NO_SPACE,
+
+    HTTPs_ERR_INIT_POOL_MEM_NO_SPACE,
+    HTTPs_ERR_INIT_POOL_INSTANCE,
+    HTTPs_ERR_INIT_POOL_CONN,
+    HTTPs_ERR_INIT_POOL_BUF,
+    HTTPs_ERR_INIT_POOL_PATH,
+    HTTPs_ERR_INIT_POOL_HOST,
+    HTTPs_ERR_INIT_POOL_TOKEN,
+    HTTPs_ERR_INIT_POOL_TOKEN_VAL,
+    HTTPs_ERR_INIT_POOL_KEY_VAL,
+    HTTPs_ERR_INIT_POOL_QUERY_STR_KEY,
+    HTTPs_ERR_INIT_POOL_QUERY_STR_VAL,
+    HTTPs_ERR_INIT_POOL_FORM_KEY,
+    HTTPs_ERR_INIT_POOL_FORM_VAL,
+    HTTPs_ERR_INIT_POOL_FORM_BOUNDARY,
+    HTTPs_ERR_INIT_POOL_REQ_HDR,
+    HTTPs_ERR_INIT_POOL_REQ_HDR_STR,
+    HTTPs_ERR_INIT_POOL_RESP_HDR,
+    HTTPs_ERR_INIT_POOL_RESP_HDR_STR,
+    HTTPs_ERR_INIT_INSTANCE_HOOK_FAULT,
+
+    HTTPs_ERR_POOL_BLK_FREE_FAULT,
+
+    HTTPs_ERR_INSTANCE_LIST_NULL_ITEM,
+
+    HTTPs_ERR_SOCK_OPEN,
+    HTTPs_ERR_SOCK_BIND,
+    HTTPs_ERR_SOCK_LISTEN,
+    HTTPs_ERR_SOCK_SET_OPT_BLOCK,
+    HTTPs_ERR_SOCK_SET_OPT_SECURE,
+
+    HTTPs_ERR_CFG_INVALID_NBR_CONN,
+    HTTPs_ERR_CFG_INVALID_DFLT_RESOURCE,
+    HTTPs_ERR_CFG_INVALID_DFLT_FILE,
+    HTTPs_ERR_CFG_INVALID_SOCK_SEL,
+    HTTPs_ERR_CFG_INVALID_SECURE_EN,
+    HTTPs_ERR_CFG_INVALID_SECURE_CERT_INVALID,
+    HTTPs_ERR_CFG_INVALID_SECURE_KEY_INVALID,
+    HTTPs_ERR_CFG_INVALID_HOST_LEN,
+    HTTPs_ERR_CFG_INVALID_PATH_LEN,
+    HTTPs_ERR_CFG_INVALID_FS_TYPE,
+    HTTPs_ERR_CFG_INVALID_FS_EN,
+    HTTPs_ERR_CFG_INVALID_FS_API,
+    HTTPs_ERR_CFG_INVALID_FS_PATH_LEN,
+    HTTPs_ERR_CFG_INVALID_FS_SEP_CHAR,
+    HTTPs_ERR_CFG_INVALID_FS_WORKING_FOLDER,
+    HTTPs_ERR_CFG_INVALID_HDR_EN,
+    HTTPs_ERR_CFG_INVALID_HDR_PARAM,
+    HTTPs_ERR_CFG_INVALID_TOKEN_EN,
+    HTTPs_ERR_CFG_INVALID_TOKEN_PARAM,
+    HTTPs_ERR_CFG_INVALID_QUERY_STR_EN,
+    HTTPs_ERR_CFG_INVALID_QUERY_STR_PARAM,
+    HTTPs_ERR_CFG_INVALID_FORM_EN,
+    HTTPs_ERR_CFG_INVALID_FORM_MULTIPART_EN,
+    HTTPs_ERR_CFG_INVALID_FORM_PARAM,
+    HTTPs_ERR_CFG_INVALID_BUF_LEN,
+    HTTPs_ERR_CFG_INVALID_ERR_PAGE_LEN,
+
+    HTTPs_ERR_CFG_NULL_PTR_FS,
+    HTTPs_ERR_CFG_NULL_PTR_REQ_HDR,
+    HTTPs_ERR_CFG_NULL_PTR_RESP_HDR,
+    HTTPs_ERR_CFG_NULL_PTR_TOKEN,
+    HTTPs_ERR_CFG_NULL_PTR_QUERY_STR,
+    HTTPs_ERR_CFG_NULL_PTR_FORM,
+
+    HTTPs_ERR_TASK_INIT_REM_MEM,
+    HTTPs_ERR_TASK_OBJ_CREATE,
+    HTTPs_ERR_TASK_CREATE,
+    HTTPs_ERR_TASK_LOCK_CREATE,
+    HTTPs_ERR_TASK_LOCK_ACQUIRE,
+    HTTPs_ERR_TASK_SEM_CREATE,
+    HTTPs_ERR_TASK_STOP_REQ_SIGNAL,
+    HTTPs_ERR_TASK_STOP_COMPLETED_PEND,
+
+    HTTPs_ERR_STATE_UNKNOWN,
+
+    HTTPs_ERR_REQ_MORE_DATA_REQUIRED,
+    HTTPs_ERR_REQ_FORMAT_INVALID,
+    HTTPs_ERR_REQ_METHOD_NOT_SUPPORTED,
+    HTTPs_ERR_REQ_PROTOCOL_VER_NOT_SUPPORTED,
+    HTTPs_ERR_REQ_URI_LEN,
+    HTTPs_ERR_REQ_HDR_BLK_GET_FAULT,
+    HTTPS_ERR_REQ_HDR_INVALID_VAL_LEN,
+    HTTPs_ERR_REQ_HDR_OVERFLOW,
+    HTTPs_ERR_REQ_HDR_POOL_EMPTY,
+    HTTPs_ERR_REQ_HDR_POOL_LIB_FAULT,
+    HTTPs_ERR_REQ_HDR_DATA_TYPE_UNKNOWN,
+    HTTPs_ERR_REQ_BODY_FAULT,
+
+    HTTPs_ERR_KEY_VAL_CFG_POOL_SIZE_INV,
+
+    HTTPs_ERR_QUERY_STR_POOL_LIB_FAULT,
+    HTTPs_ERR_QUERY_STR_PARSE_FAULT,
+
+    HTTPs_ERR_FORM_POOL_LIB_FAULT,
+    HTTPs_ERR_FORM_APP_PARSE_FAULT,
+    HTTPs_ERR_FORM_FILE_UPLOAD_OPEN,
+    HTTPs_ERR_FORM_FORMAT_INV,
+
+    HTTPs_ERR_TOKEN_POOL_EMPTY,
+    HTTPs_ERR_TOKEN_POOL_LIB_FAULT,
+    HTTPs_ERR_TOKEN_NO_TOKEN_FOUND,
+    HTTPs_ERR_TOKEN_MORE_DATA_REQ,
+
+    HTTPs_ERR_HDR_FIELD_TYPE_UNKNOWN,
+    HTTPs_ERR_HDR_FIELD_VAL_UNKNOWN,
+
+    HTTPs_ERR_FILE_NOT_FOUND,
+    HTTPs_ERR_FILE_WR_FAULT,
+
+    HTTPs_ERR_RESP_CONTENT_TYPE_INVALID,
+    HTTPs_ERR_RESP_BUF_NO_MORE_SPACE,
+    HTTPs_ERR_RESP_STATUS_LINE,
+    HTTPs_ERR_RESP_HDR_OVERFLOW,
+    HTTPs_ERR_RESP_HDR_POOL_EMPTY,
+    HTTPs_ERR_RESP_HDR_POOL_LIB_FAULT,
+    HTTPs_ERR_RESP_HDR_DATA_TYPE_UNKNOWN,
+    HTTPs_ERR_RESP_PATH_PTR_INVALID,
+    HTTPs_ERR_RESP_BODY_DATA_TYPE_UNKNOWN,
+    HTTPs_ERR_RESP_BODY_DATA_LEN_INVALID,
+    HTTPs_ERR_RESP_BODY_PTR_INVALID,
+    HTTPs_ERR_RESP_DATA_CHUNKED_HOOK_UNDEFINED,
+    HTTPs_ERR_RESP_DATA_CHUNKED_LENGTH_INVALID
+} HTTPs_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                         IP TYPE ENUMERATION
+*********************************************************************************************************
+*/
+
+typedef enum https_sock_sel {
+    HTTPs_SOCK_SEL_IPv4,
+    HTTPs_SOCK_SEL_IPv6,
+    HTTPs_SOCK_SEL_IPv4_IPv6
+} HTTPs_SOCK_SEL;
+
+
+/*
+*********************************************************************************************************
+*                                    CONNECTION STATES ENUMERATION
+*********************************************************************************************************
+*/
+
+typedef enum https_conn_state {
+    HTTPs_CONN_STATE_UNKNOWN,
+
+    HTTPs_CONN_STATE_REQ_INIT,
+    HTTPs_CONN_STATE_REQ_PARSE_METHOD,
+    HTTPs_CONN_STATE_REQ_PARSE_URI,
+    HTTPs_CONN_STATE_REQ_PARSE_QUERY_STRING,
+    HTTPs_CONN_STATE_REQ_PARSE_PROTOCOL_VERSION,
+    HTTPs_CONN_STATE_REQ_PARSE_HDR,
+    HTTPs_CONN_STATE_REQ_LINE_HDR_HOOK,
+    HTTPs_CONN_STATE_REQ_BODY_INIT,
+    HTTPs_CONN_STATE_REQ_BODY_FLUSH_DATA,
+    HTTPs_CONN_STATE_REQ_BODY_DATA,
+    HTTPs_CONN_STATE_REQ_BODY_FORM_APP_PARSE,
+    HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_INIT,
+    HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_PARSE,
+    HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_OPEN,
+    HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_WR,
+    HTTPs_CONN_STATE_REQ_READY_SIGNAL,
+    HTTPs_CONN_STATE_REQ_READY_POLL,
+
+    HTTPs_CONN_STATE_RESP_PREPARE,
+    HTTPs_CONN_STATE_RESP_INIT,
+    HTTPs_CONN_STATE_RESP_TOKEN,
+    HTTPs_CONN_STATE_RESP_STATUS_LINE,
+    HTTPs_CONN_STATE_RESP_HDR,
+    HTTPs_CONN_STATE_RESP_HDR_CONTENT_TYPE,
+    HTTPs_CONN_STATE_RESP_HDR_FILE_TRANSFER,
+    HTTPs_CONN_STATE_RESP_HDR_LOCATION,
+    HTTPs_CONN_STATE_RESP_HDR_CONN,
+    HTTPs_CONN_STATE_RESP_HDR_LIST,
+    HTTPs_CONN_STATE_RESP_HDR_TX,
+    HTTPs_CONN_STATE_RESP_HDR_END,
+    HTTPs_CONN_STATE_RESP_FILE_STD,
+    HTTPs_CONN_STATE_RESP_DATA_CHUNCKED,
+    HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_TX_TOKEN,
+    HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_TX_LAST_CHUNK,
+    HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_HOOK,
+    HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_FINALIZE,
+    HTTPs_CONN_STATE_RESP_COMPLETED,
+
+    HTTPs_CONN_STATE_COMPLETED,
+
+    HTTPs_CONN_STATE_ERR_INTERNAL,
+    HTTPs_CONN_STATE_ERR_FATAL
+} HTTPs_CONN_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                      SOCKET STATES ENUMERATION
+*********************************************************************************************************
+*/
+
+typedef enum https_sock_state {
+    HTTPs_SOCK_STATE_NONE,
+    HTTPs_SOCK_STATE_RX,
+    HTTPs_SOCK_STATE_TX,
+    HTTPs_SOCK_STATE_CLOSE,
+    HTTPs_SOCK_STATE_ERR
+} HTTPs_SOCK_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                       FILE TYPES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef  enum https_body_data_type {
+    HTTPs_BODY_DATA_TYPE_NONE,
+    HTTPs_BODY_DATA_TYPE_FILE,
+    HTTPs_BODY_DATA_TYPE_STATIC_DATA
+} HTTPs_BODY_DATA_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                     TOKEN TYPES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef enum  HTTPs_token_type {
+    HTTPs_TOKEN_TYPE_EXTERNAL,
+    HTTPs_TOKEN_TYPE_INTERNAL,
+    HTTPs_TOKEN_TYPE_NONE
+} HTTPs_TOKEN_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                 KEY-VALUE PAIR DATA TYPES ENUMARATION
+*********************************************************************************************************
+*/
+
+typedef enum  https_key_val_type {
+    HTTPs_KEY_VAL_TYPE_PAIR,
+    HTTPs_KEY_VAL_TYPE_VAL,
+    HTTPs_KEY_VAL_TYPE_FILE
+} HTTPs_KEY_VAL_TYPE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    HTTP SERVER FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  HTTPs_FLAGS;
+
+#define  HTTPs_FLAG_NONE                            DEF_BIT_NONE
+
+#define  HTTPs_FLAG_INIT                           (DEF_BIT_NONE | HTTPs_FLAG_RESP_CHUNKED)
+
+                                                                /* SOCKET FLAGS             */
+#define  HTTPs_FLAG_SOCK_RDY_RD                     DEF_BIT_00
+#define  HTTPs_FLAG_SOCK_RDY_WR                     DEF_BIT_01
+#define  HTTPs_FLAG_SOCK_RDY_ERR                    DEF_BIT_02
+
+                                                                /* CONN & TRANSACTION FLAGS */
+#define  HTTPs_FLAG_CONN_PERSISTENT                 DEF_BIT_00  /* Flag indicating if Connection is persistent.         */
+#define  HTTPs_FLAG_REQ_FLUSH                       DEF_BIT_01
+#define  HTTPs_FLAG_RESP_BODY_PRESENT               DEF_BIT_02
+#define  HTTPs_FLAG_RESP_LOCATION                   DEF_BIT_03  /* Flag indicating Location hdr requirement in resp.    */
+#define  HTTPs_FLAG_RESP_CHUNKED                    DEF_BIT_04
+#define  HTTPs_FLAG_RESP_CHUNKED_HOOK               DEF_BIT_05
+
+
+/*
+*********************************************************************************************************
+*                                     HTTP SERVER TASK DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_os_task_obj {
+    KAL_TASK_HANDLE  TaskHandle;
+    KAL_SEM_HANDLE   SemStopReq;
+    KAL_SEM_HANDLE   SemStopCompleted;
+} HTTPs_OS_TASK_OBJ;
+
+
+/*
+*********************************************************************************************************
+*                                           SECURE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  HTTPs_SecureCfg {
+    CPU_CHAR                      *CertPtr;
+    CPU_INT32U                     CertLen;
+    CPU_CHAR                      *KeyPtr;
+    CPU_INT32U                     KeyLen;
+    NET_SOCK_SECURE_CERT_KEY_FMT   Fmt;
+    CPU_BOOLEAN                    CertChain;
+} HTTPs_SECURE_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                           TOKEN DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_token_ctrl {
+    CPU_CHAR    *ValPtr;
+    CPU_INT16U   ValLen;
+    CPU_CHAR    *TxPtr;
+    CPU_INT16U   TxLen;
+} HTTPs_TOKEN_CTRL;
+
+/*
+*********************************************************************************************************
+*                                      HTTP INTERNAL TOKEN DATA TYPE
+*********************************************************************************************************
+*/
+
+#define  HTTPs_STR_TOKEN_INTERNAL_STATUS_CODE                "STATUS_CODE"
+#define  HTTPs_STR_TOKEN_INTERNAL_REASON_PHRASE              "REASON_PHRASE"
+
+typedef  enum  https_token_int {
+    HTTPs_TOKEN_INTERNAL_STATUS_CODE,
+    HTTPs_TOKEN_INTERNAL_REASON_PHRASE
+} HTTPs_TOKEN_INTERNAL;
+
+
+/*
+*********************************************************************************************************
+*                                            FORM DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_key_val  HTTPs_KEY_VAL;
+
+struct  https_key_val {
+    HTTPs_KEY_VAL_TYPE   DataType;
+    CPU_CHAR            *KeyPtr;
+    CPU_INT16U           KeyLen;
+    CPU_CHAR            *ValPtr;
+    CPU_INT16U           ValLen;
+    HTTPs_KEY_VAL       *NextPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                                       HTTP RESP/REQ HDR FIELD BLK
+*********************************************************************************************************
+*/
+
+typedef  enum  HTTPs_hdr_type {
+    HTTPs_HDR_TYPE_NONE,
+    HTTPs_HDR_TYPE_REQ,
+    HTTPs_HDR_TYPE_RESP
+} HTTPs_HDR_TYPE;
+
+typedef  enum  HTTPs_hdr_val_type {
+    HTTPs_HDR_VAL_TYPE_NONE,
+    HTTPs_HDR_VAL_TYPE_STR_CONST,
+    HTTPs_HDR_VAL_TYPE_STR_DYN
+} HTTPs_HDR_VAL_TYPE;
+
+
+typedef  struct  HTTPs_hdr_blk  HTTPs_HDR_BLK;
+
+struct  HTTPs_hdr_blk {
+    HTTP_HDR_FIELD       HdrField;
+    HTTPs_HDR_VAL_TYPE   ValType;
+    void                *ValPtr;
+    CPU_INT32U           ValLen;
+    HTTPs_HDR_BLK       *NextPtr;
+    HTTPs_HDR_BLK       *PrevPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                                        CONNECTIONS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  HTTPs_Conn  HTTPs_CONN;
+
+struct  HTTPs_Conn {
+
+    NET_SOCK_ID               SockID;                           /* Connection's Socket ID.                              */
+    HTTPs_SOCK_STATE          SockState;                        /* Connection's Socket State.                           */
+    HTTPs_FLAGS               SockFlags;                        /* Connection's Socket Ready flags.                     */
+
+    NET_SOCK_ADDR             ClientAddr;                       /* Client socket information.                           */
+
+    HTTPs_ERR                 ErrCode;                          /* Error code when internal error occurs.               */
+
+    HTTPs_CONN_STATE          State;                            /* Connection State.                                    */
+
+    HTTPs_FLAGS               Flags;                            /* Connection and Transaction flags.                    */
+
+    HTTP_METHOD               Method;                           /* HTTP method received in request message.             */
+    HTTP_CONTENT_TYPE         ReqContentType;                   /* Content-Type received in request message.            */
+    CPU_INT32U                ReqContentLen;                    /* Content-Length received in request message.          */
+    CPU_INT32U                ReqContentLenRxd;                 /* Length of Content-Length read.                       */
+
+    HTTP_PROTOCOL_VER         ProtocolVer;                      /* HTTP version received in request message.            */
+
+    CPU_CHAR                 *PathPtr;                          /* Pointer to the URI requested by client               */
+    CPU_SIZE_T                PathLenMax;                       /* Maximum file name length.                            */
+
+    void                     *DataPtr;                          /* Pointer to file rx or data to send.                  */
+    CPU_INT32U                DataLen;                          /* Data length.                                         */
+    CPU_INT32U                DataTxdLen;                       /* The current Length of data sent.                     */
+    CPU_INT32U                DataFixPosCur;                    /* Current position in the fixed data.                  */
+
+    HTTP_STATUS_CODE          StatusCode;                       /* Status code of the resp after parsing of the req.    */
+    HTTP_CONTENT_TYPE         RespContentType;                  /* Content-Type of file to send                         */
+    HTTPs_BODY_DATA_TYPE      RespBodyDataType;                 /* Type of the data of the body (FS, Static, None).     */
+
+#if ((HTTPs_CFG_HDR_RX_EN == DEF_ENABLED) || \
+     (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED))
+    HTTPs_HDR_BLK            *HdrListPtr;                       /* Pointer to list of additional headers.               */
+    CPU_INT08U                HdrCtr;                           /* Number of headers in list.                           */
+    HTTPs_HDR_TYPE            HdrType;                          /* Type of headers in list : req or resp.               */
+#endif
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+    CPU_CHAR                 *HostPtr;                          /* Ptr to host name received in the request.            */
+#endif
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    HTTPs_TOKEN_CTRL         *TokenCtrlPtr;                     /* Ptr to the ctrl token structure.                     */
+    CPU_CHAR                 *TokenPtr;                         /* Ptr to the token name.                               */
+    CPU_INT16U                TokenLen;                         /* Length of the token name.                            */
+    CPU_INT16U                TokenBufRemLen;                   /* Remaining data len in the buf.                       */
+#endif
+
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+    CPU_INT16U                QueryStrBlkAcquiredCtr;           /* Counter for Query String Key-Val block acquired.     */
+    HTTPs_KEY_VAL            *QueryStrListPtr;                  /* Ptr to the list of key pair-value rxd in query str.  */
+#endif
+
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    CPU_INT16U                FormBlkAcquiredCtr;               /* Counter for Form Key-Val block acquired.             */
+    HTTPs_KEY_VAL            *FormDataListPtr;                  /* Ptr to list of Form key pair-value rxd in POST.      */
+
+#if (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED)
+    CPU_CHAR                 *FormBoundaryPtr;                  /* Ptr to the boundary for Multipart Form parsing.      */
+    CPU_INT08U                FormBoundaryLen;
+#endif
+#endif
+
+    CPU_CHAR                 *BufPtr;                           /* Ptr to conn buf.                                     */
+    CPU_INT16U                BufLen;                           /* Conn buf len.                                        */
+
+    CPU_CHAR                 *RxBufPtr;                         /* Ptr where to receive buf.                            */
+    CPU_INT16U                RxBufLenRem;                      /* Rem data in the rx buffer.                           */
+    CPU_INT32U                RxDataLen;                        /* Len of data rxd.                                     */
+
+    CPU_CHAR                 *TxBufPtr;                         /* Ptr to buf to tx.                                    */
+    CPU_INT16U                TxDataLen;                        /* Data len to tx.                                      */
+
+    void                     *ConnDataPtr;                      /* Ptr for user conn data.                              */
+    CPU_INT32U                ConnDataType;                     /* Type for user conn data.                             */
+
+    HTTPs_CONN               *ConnPrevPtr;                      /* Pointer to previous connection.                      */
+    HTTPs_CONN               *ConnNextPtr;                      /* Pointer to next connection.                          */
+};
+
+
+/*
+*********************************************************************************************************
+*                                     HOOK CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  HTTPs_Instance     HTTPs_INSTANCE;
+
+
+typedef  CPU_BOOLEAN     (*HTTPs_INSTANCE_INIT_HOOK)      (const  HTTPs_INSTANCE         *p_instance,
+                                                           const  void                   *p_hook_cfg);
+
+typedef  CPU_BOOLEAN     (*HTTPs_REQ_HDR_RX_HOOK)         (const  HTTPs_INSTANCE         *p_instance,
+                                                           const  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg,
+                                                                  HTTP_HDR_FIELD          hdr_field);
+
+typedef  CPU_BOOLEAN     (*HTTPs_REQ_HOOK)                (const  HTTPs_INSTANCE         *p_instance,
+                                                                  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg);
+
+typedef  CPU_BOOLEAN     (*HTTPs_REQ_BODY_RX_HOOK)        (const  HTTPs_INSTANCE         *p_instance,
+                                                                  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg,
+                                                                  void                   *p_buf,
+                                                           const  CPU_SIZE_T              buf_size,
+                                                                  CPU_SIZE_T             *p_buf_size_used);
+
+typedef  CPU_BOOLEAN     (*HTTPs_REQ_RDY_SIGNAL_HOOK)     (const  HTTPs_INSTANCE         *p_instance,
+                                                                  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg,
+                                                           const  HTTPs_KEY_VAL          *p_data);
+
+typedef  CPU_BOOLEAN     (*HTTPs_REQ_RDY_POLL_HOOK)       (const  HTTPs_INSTANCE         *p_instance,
+                                                                  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg);
+
+typedef  CPU_BOOLEAN     (*HTTPs_RESP_HDR_TX_HOOK)        (const  HTTPs_INSTANCE         *p_instance,
+                                                                  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg);
+
+typedef  CPU_BOOLEAN     (*HTTPs_RESP_TOKEN_HOOK)         (const  HTTPs_INSTANCE         *p_instance,
+                                                                  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg,
+                                                           const  CPU_CHAR               *p_token,
+                                                                  CPU_INT16U              token_len,
+                                                                  CPU_CHAR               *p_val,
+                                                                  CPU_INT16U              val_len_max);
+
+typedef  CPU_BOOLEAN     (*HTTPs_RESP_CHUNK_HOOK)         (const  HTTPs_INSTANCE         *p_instance,
+                                                                  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg,
+                                                                  void                   *p_buf,
+                                                                  CPU_SIZE_T              buf_len_max,
+                                                                  CPU_SIZE_T             *p_tx_len);
+
+typedef  void            (*HTTPs_TRANS_COMPLETE_HOOK)     (const  HTTPs_INSTANCE         *p_instance,
+                                                                  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg);
+
+typedef  void            (*HTTPs_ERR_HOOK)                (const  HTTPs_INSTANCE         *p_instance,
+                                                                  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg,
+                                                                  HTTPs_ERR               err);
+
+typedef  void            (*HTTPs_ERR_FILE_GET_HOOK)       (const  void                   *p_hook_cfg,
+                                                                  HTTP_STATUS_CODE        status_code,
+                                                                  CPU_CHAR               *p_file_str,
+                                                                  CPU_INT32U              file_len_max,
+                                                                  HTTPs_BODY_DATA_TYPE   *p_file_type,
+                                                                  HTTP_CONTENT_TYPE      *p_content_type,
+                                                                  void                  **p_data,
+                                                                  CPU_INT32U             *p_date_len);
+
+typedef  void            (*HTTPs_CONN_CLOSE_HOOK)         (const  HTTPs_INSTANCE         *p_instance,
+                                                                  HTTPs_CONN             *p_conn,
+                                                           const  void                   *p_hook_cfg);
+
+
+typedef  struct  https_Hook_Cfg {
+    HTTPs_INSTANCE_INIT_HOOK    OnInstanceInitHook;
+    HTTPs_REQ_HDR_RX_HOOK       OnReqHdrRxHook;
+    HTTPs_REQ_HOOK              OnReqHook;
+    HTTPs_REQ_BODY_RX_HOOK      OnReqBodyRxHook;
+    HTTPs_REQ_RDY_SIGNAL_HOOK   OnReqRdySignalHook;
+    HTTPs_REQ_RDY_POLL_HOOK     OnReqRdyPollHook;
+    HTTPs_RESP_HDR_TX_HOOK      OnRespHdrTxHook;
+    HTTPs_RESP_TOKEN_HOOK       OnRespTokenHook;
+    HTTPs_RESP_CHUNK_HOOK       OnRespChunkHook;
+    HTTPs_TRANS_COMPLETE_HOOK   OnTransCompleteHook;
+    HTTPs_ERR_HOOK              OnErrHook;
+    HTTPs_ERR_FILE_GET_HOOK     OnErrFileGetHook;
+    HTTPs_CONN_CLOSE_HOOK       OnConnCloseHook;
+} HTTPs_HOOK_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                     HEADER CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_hdr_rx_cfg {
+    CPU_INT16U    NbrPerConnMax;
+    CPU_INT16U    DataLenMax;
+} HTTPs_HDR_RX_CFG;
+
+
+typedef  struct  https_hdr_tx_cfg {
+    CPU_INT16U    NbrPerConnMax;
+    CPU_INT16U    DataLenMax;
+} HTTPs_HDR_TX_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                     QUERY STRING CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_query_str_cfg {
+    CPU_INT16U    NbrPerConnMax;
+    CPU_INT16U    KeyLenMax;
+    CPU_INT16U    ValLenMax;
+} HTTPs_QUERY_STR_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                     FORM CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_form_cfg {
+    CPU_INT16U    NbrPerConnMax;
+    CPU_INT16U    KeyLenMax;
+    CPU_INT16U    ValLenMax;
+
+    CPU_BOOLEAN   MultipartEn;
+    CPU_BOOLEAN   MultipartFileUploadEn;
+    CPU_BOOLEAN   MultipartFileUploadOverWrEn;
+    CPU_CHAR     *MultipartFileUploadFolderPtr;
+} HTTPs_FORM_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                     TOKEN CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_token_cfg {
+    CPU_INT16U    NbrPerConnMax;
+    CPU_INT16U    ValLenMax;
+} HTTPs_TOKEN_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                        FS CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  https_fs_type {
+    HTTPs_FS_TYPE_NONE,
+    HTTPs_FS_TYPE_STATIC,
+    HTTPs_FS_TYPE_DYN
+} HTTPs_FS_TYPE;
+
+typedef  struct  https_cfg_fs_none {
+    CPU_INT32U   PathLenMax;
+} HTTPs_CFG_FS_NONE;
+
+typedef  struct  https_cfg_fs_static {
+    const  NET_FS_API  *FS_API_Ptr;
+} HTTPs_CFG_FS_STATIC;
+
+typedef  struct  https_cfg_fs_dyn {
+    const  NET_FS_API  *FS_API_Ptr;
+           CPU_CHAR    *WorkingFolderNamePtr;
+} HTTPs_CFG_FS_DYN;
+
+
+/*
+*********************************************************************************************************
+*                                     INSTANCE CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  https_cfg {
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      INSTANCE OS CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+           CPU_INT32U            OS_TaskDly_ms;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                INSTANCE LISTEN SOCKET CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+           HTTPs_SOCK_SEL        SockSel;
+           HTTPs_SECURE_CFG     *SecurePtr;
+           CPU_INT16U            Port;
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE CONNECTION CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+           CPU_INT08U            ConnNbrMax;
+           CPU_INT16U            ConnInactivityTimeout_s;
+           CPU_INT16U            BufLen;
+           CPU_BOOLEAN           ConnPersistentEn;
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INSTANCE FILE SYSTEM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+           HTTPs_FS_TYPE         FS_Type;
+    const  void                 *FS_CfgPtr;
+           CPU_CHAR             *DfltResourceNamePtr;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE PROXY CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+           CPU_INT16U            HostNameLenMax;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         HOOK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    const  HTTPs_HOOK_CFG       *HooksPtr;
+    const  void                 *Hooks_CfgPtr;
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     HEADER FIELD CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    const  HTTPs_HDR_RX_CFG     *HdrRxCfgPtr;
+    const  HTTPs_HDR_TX_CFG     *HdrTxCfgPtr;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                     QUERY STRING CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    const  HTTPs_QUERY_STR_CFG  *QueryStrCfgPtr;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INSTANCE FORM CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    const  HTTPs_FORM_CFG       *FormCfgPtr;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                               DYNAMIC TOKEN REPLACEMENT CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+    const  HTTPs_TOKEN_CFG      *TokenCfgPtr;
+
+
+} HTTPs_CFG;                                                    /* End of configuration structure.                      */
+
+
+/*
+*********************************************************************************************************
+*                                INSTANCE STATISTIC COUNTERS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  HTTPs_InstanceStats {
+    CPU_INT32U  Conn_StatAcceptedCtr;
+    CPU_INT32U  Conn_StatClosedCtr;
+    CPU_INT32U  Conn_StatAcquiredCtr;
+    CPU_INT32U  Conn_StatReleasedCtr;
+
+    CPU_INT32U  Sock_StatListenCloseCtr;
+    CPU_INT32U  Sock_StatOctetRxdCtr;
+    CPU_INT32U  Sock_StatOctetTxdCtr;
+
+    CPU_INT32U  FS_StatOpenedCtr;
+    CPU_INT32U  FS_StatClosedCtr;
+
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+    CPU_INT32U  Req_StatHdrAcquiredCtr;
+    CPU_INT32U  Req_StatHdrReleaseCtr;
+#endif
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+    CPU_INT32U  Resp_StatHdrAcquiredCtr;
+    CPU_INT32U  Resp_StatHdrReleaseCtr;
+#endif
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    CPU_INT32U  Resp_StatTokenAcquiredCtr;
+    CPU_INT32U  Resp_StatTokenReleaseCtr;
+    CPU_INT32U  Resp_StatTokenFoundCtr;
+#endif
+
+#if ((HTTPs_CFG_FORM_EN      == DEF_ENABLED) || \
+     (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED))
+    CPU_INT32U  Req_StatKeyValAcquiredCtr;
+    CPU_INT32U  Req_StatKeyValReleaseCtr;
+#endif
+
+#if ((HTTPs_CFG_FORM_EN            == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN  == DEF_ENABLED))
+    CPU_INT32U  Req_StatFormFileUploadOpenedCtr;
+    CPU_INT32U  Req_StatFormFileUploadClosedCtr;
+    CPU_INT32U  Req_StatFormFileUploadNoFS_Ctr;
+#endif
+
+    CPU_INT32U  Req_StatContentTypeFormAppRxdCtr;
+    CPU_INT32U  Req_StatContentTypeFormMultipartRxdCtr;
+    CPU_INT32U  Req_StatContentTypeOtherRxdCtr;
+    CPU_INT32U  Req_StatContentTypeUnknownRxdCtr;
+
+    CPU_INT32U  Req_StatRxdCtr;
+    CPU_INT32U  Req_StatProcessedCtr;
+    CPU_INT32U  Req_StatMethodGetRxdCtr;
+    CPU_INT32U  Req_StatMethodHeadRxdCtr;
+    CPU_INT32U  Req_StatMethodPostRxdCtr;
+    CPU_INT32U  Req_StatMethodDeleteRxdCtr;
+    CPU_INT32U  Req_StatMethodPutRxdCtr;
+    CPU_INT32U  Req_StatMethodUnsupportedRxdCtr;
+    CPU_INT32U  Req_StatProtocolVer0_9Ctr;
+    CPU_INT32U  Req_StatProtocolVer1_0Ctr;
+    CPU_INT32U  Req_StatProtocolVer1_1Ctr;
+    CPU_INT32U  Req_StatProtocolVerUnsupportedCtr;
+
+    CPU_INT32U  Req_StatMethodGetProcessedCtr;
+    CPU_INT32U  Req_StatMethodHeadProcessedCtr;
+    CPU_INT32U  Req_StatMethodPostProcessedCtr;
+    CPU_INT32U  Req_StatMethodDeleteProcessedCtr;
+    CPU_INT32U  Req_StatMethodPutProcessedCtr;
+    CPU_INT32U  Req_StatMethodUnsupportedProcessedCtr;
+
+    CPU_INT32U  Resp_StatTxdCtr;
+    CPU_INT32U  Resp_StatBodyTxdCtr;
+
+    CPU_INT32U  Resp_StatStatusCodeOKCtr;
+    CPU_INT32U  Resp_StatStatusCodeMovedPermanentlyCtr;
+    CPU_INT32U  Resp_StatStatusCodeFoundCtr;
+    CPU_INT32U  Resp_StatStatusCodeSeeOtherCtr;
+    CPU_INT32U  Resp_StatStatusCodeNotModifiedCtr;
+    CPU_INT32U  Resp_StatStatusCodeUseProxyCtr;
+    CPU_INT32U  Resp_StatStatusCodeTemporaryredirectCtr;
+    CPU_INT32U  Resp_StatStatusCodeCreatedCtr;
+    CPU_INT32U  Resp_StatStatusCodeAcceptedCtr;
+    CPU_INT32U  Resp_StatStatusCodeNoContentCtr;
+    CPU_INT32U  Resp_StatStatusCodeResetContentCtr;
+    CPU_INT32U  Resp_StatStatusCodeBadRequestCtr;
+    CPU_INT32U  Resp_StatStatusCodeUnauthorizedCtr;
+    CPU_INT32U  Resp_StatStatusCodeForbiddenCtr;
+    CPU_INT32U  Resp_StatStatusCodeNotFoundCtr;
+    CPU_INT32U  Resp_StatStatusCodeMethodNotAllowedCtr;
+    CPU_INT32U  Resp_StatStatusCodeNotAcceptableCtr;
+    CPU_INT32U  Resp_StatStatusCodeRequestTimeoutCtr;
+    CPU_INT32U  Resp_StatStatusCodeConflitCtr;
+    CPU_INT32U  Resp_StatStatusCodeGoneCtr;
+    CPU_INT32U  Resp_StatStatusCodeLenRequiredCtr;
+    CPU_INT32U  Resp_StatStatusCodeConditionFailedCtr;
+    CPU_INT32U  Resp_StatStatusCodeEntityTooLongCtr;
+    CPU_INT32U  Resp_StatStatusCodeURI_TooLongCtr;
+    CPU_INT32U  Resp_StatStatusCodeUnsupportedTypeCtr;
+    CPU_INT32U  Resp_StatStatusCodeNotSatisfiableCtr;
+    CPU_INT32U  Resp_StatStatusCodeExpectationFailedCtr;
+    CPU_INT32U  Resp_StatStatusCodeInternalServerErrCtr;
+    CPU_INT32U  Resp_StatStatusCodeNotImplementedCtr;
+    CPU_INT32U  Resp_StatStatusCodeSerUnavailableCtr;
+    CPU_INT32U  Resp_StatStatusCodeVerNotSupportedCtr;
+    CPU_INT32U  Resp_StatStatusCodeUnknownCtr;
+} HTTPs_INSTANCE_STATS;
+
+
+/*
+*********************************************************************************************************
+*                                  INSTANCE ERROR COUNTERS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  HTTPs_InstanceErrs {
+    CPU_INT32U  Conn_ErrFreePtrNullCtr;
+
+    CPU_INT32U  Conn_ErrPoolMemSpaceCtr;
+    CPU_INT32U  Conn_ErrPoolEmptyCtr;
+    CPU_INT32U  Conn_ErrPoolLibGetCtr;
+    CPU_INT32U  Conn_ErrPoolLibFreeCtr;
+
+    CPU_INT32U  Conn_ErrBufPoolMemSpaceCtr;
+    CPU_INT32U  Conn_ErrBufPoolEmptyCtr;
+    CPU_INT32U  Conn_ErrBufPoolLibGetCtr;
+    CPU_INT32U  Conn_ErrBufPoolLibFreeCtr;
+
+    CPU_INT32U  Conn_ErrPathPoolMemSpaceCtr;
+    CPU_INT32U  Conn_ErrPathPoolEmptyCtr;
+    CPU_INT32U  Conn_ErrPathPoolLibGetCtr;
+    CPU_INT32U  Conn_ErrPathPoolLibFreeCtr;
+
+    CPU_INT32U  Conn_ErrHdrTypeInvalidCtr;
+
+    CPU_INT32U  Conn_ErrNoneAvailCtr;
+    CPU_INT32U  Conn_ErrTmrStartCtr;
+
+    CPU_INT32U  Sock_ErrListenCloseCtr;
+    CPU_INT32U  Sock_ErrAcceptCtr;
+    CPU_INT32U  Sock_ErrSelCtr;
+    CPU_INT32U  Sock_ErrCloseCtr;
+    CPU_INT32U  Sock_ErrRxCtr;
+    CPU_INT32U  Sock_ErrRxConnClosedCtr;
+    CPU_INT32U  Sock_ErrRxFaultCtr;
+    CPU_INT32U  Sock_ErrTxConnClosedCtr;
+    CPU_INT32U  Sock_ErrTxFaultCtr;
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+    CPU_INT32U  Host_ErrPoolMemSpaceCtr;
+    CPU_INT32U  Host_ErrPoolEmptyCtr;
+    CPU_INT32U  Host_ErrPoolLibGetCtr;
+    CPU_INT32U  Host_ErrPoolLibFreeCtr;
+#endif
+
+    CPU_INT32U  Req_ErrInvalidCtr;
+    CPU_INT32U  Req_ErrStateUnkownCtr;
+    CPU_INT32U  Req_ErrBodyStateUnknownCtr;
+    CPU_INT32U  Req_ErrBodyPostFormCtr;
+    CPU_INT32U  Req_ErrBodyFormNotEn;
+    CPU_INT32U  Req_ErrBodyFormMultipartNotEn;
+
+#if ((HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED) || \
+     (HTTPs_CFG_FORM_EN      == DEF_ENABLED))
+    CPU_INT32U  Req_ErrKeyValPoolMemSpaceCtr;
+    CPU_INT32U  Req_ErrKeyValPoolLibGetCtr;
+    CPU_INT32U  Req_ErrKeyValPoolLibFreeCtr;
+#endif
+
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+    CPU_INT32U  Req_ErrQueryStrKeyPoolMemSpaceCtr;
+    CPU_INT32U  Req_ErrQueryStrKeyPoolLibGetCtr;
+    CPU_INT32U  Req_ErrQueryStrKeyPoolLibFreeCtr;
+    CPU_INT32U  Req_ErrQueryStrValPoolMemSpaceCtr;
+    CPU_INT32U  Req_ErrQueryStrValPoolLibGetCtr;
+    CPU_INT32U  Req_ErrQueryStrValPoolLibFreeCtr;
+#endif
+
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    CPU_INT32U  Req_ErrFormKeyPoolMemSpaceCtr;
+    CPU_INT32U  Req_ErrFormKeyPoolLibGetCtr;
+    CPU_INT32U  Req_ErrFormKeyPoolLibFreeCtr;
+    CPU_INT32U  Req_ErrFormValPoolMemSpaceCtr;
+    CPU_INT32U  Req_ErrFormValPoolLibGetCtr;
+    CPU_INT32U  Req_ErrFormValPoolLibFreeCtr;
+
+#if (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED)
+    CPU_INT32U  Req_ErrFormBoundaryPoolMemSpaceCtr;
+    CPU_INT32U  Req_ErrFormBoundaryPoolEmptyCtr;
+    CPU_INT32U  Req_ErrFormBoundaryPoolLibGetCtr;
+    CPU_INT32U  Req_ErrFormBoundaryPoolLibFreeCtr;
+#endif
+#endif
+
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+    CPU_INT32U  Req_ErrHdrPtrNullCtr;
+
+    CPU_INT32U  Req_ErrHdrPoolMemSpaceCtr;
+    CPU_INT32U  Req_ErrHdrPoolEmptyCtr;
+    CPU_INT32U  Req_ErrHdrPoolLibGetCtr;
+    CPU_INT32U  Req_ErrHdrPoolLibFreeCtr;
+
+    CPU_INT32U  Req_ErrHdrBufPoolMemSpaceCtr;
+    CPU_INT32U  Req_ErrHdrBufPoolEmptyCtr;
+    CPU_INT32U  Req_ErrHdrBufPoolLibGetCtr;
+    CPU_INT32U  Req_ErrHdrBufPoolLibFreeCtr;
+
+    CPU_INT32U  Req_ErrHdrValTypeUnknown;
+
+    CPU_INT32U  Req_ErrHdrDataLenInv;
+#endif
+
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+    CPU_INT32U  Resp_ErrHdrPtrNullCtr;
+
+    CPU_INT32U  Resp_ErrHdrPoolMemSpaceCtr;
+    CPU_INT32U  Resp_ErrHdrPoolEmptyCtr;
+    CPU_INT32U  Resp_ErrHdrPoolLibGetCtr;
+    CPU_INT32U  Resp_ErrHdrPoolLibFreeCtr;
+
+    CPU_INT32U  Resp_ErrHdrBufPoolMemSpaceCtr;
+    CPU_INT32U  Resp_ErrHdrBufPoolEmptyCtr;
+    CPU_INT32U  Resp_ErrHdrBufPoolLibGetCtr;
+    CPU_INT32U  Resp_ErrHdrBufPoolLibFreeCtr;
+
+    CPU_INT32U  Resp_ErrHdrValTypeUnknown;
+
+    CPU_INT32U  Resp_ErrHdrCloseNotEmptyCtr;
+#endif
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    CPU_INT32U  Resp_ErrTokenPtrNullCtr;
+
+    CPU_INT32U  Resp_ErrTokenPoolMemSpaceCtr;
+    CPU_INT32U  Resp_ErrTokenPoolEmptyCtr;
+    CPU_INT32U  Resp_ErrTokenPoolLibGetCtr;
+    CPU_INT32U  Resp_ErrTokenPoolLibFreeCtr;
+
+    CPU_INT32U  Resp_ErrTokenValPoolMemSpaceCtr;
+    CPU_INT32U  Resp_ErrTokenValPoolEmptyCtr;
+    CPU_INT32U  Resp_ErrTokenValPoolLibGetCtr;
+    CPU_INT32U  Resp_ErrTokenValPoolLibFreeCtr;
+
+    CPU_INT32U  Resp_ErrTokenCloseNotEmptyCtr;
+    CPU_INT32U  Resp_ErrTokenClrNotEmptyCtr;
+
+    CPU_INT32U  Resp_ErrTokenInternalInvalidCtr;
+    CPU_INT32U  Resp_ErrTokenInternalStatusCodeInvalidCtr;
+    CPU_INT32U  Resp_ErrTokenInternalReasonPhraseInvalidCtr;
+
+    CPU_INT32U  Resp_ErrTokenTypeInvalidCtr;
+#endif
+
+    CPU_INT32U  Resp_ErrBodyTypeInvalidCtr;
+    CPU_INT32U  Resp_ErrPathInvalidCtr;
+    CPU_INT32U  Resp_ErrContentTypeInvalidCtr;
+    CPU_INT32U  Resp_ErrPrepareCtr;
+    CPU_INT32U  Resp_ErrPrepareErrPageCtr;
+    CPU_INT32U  Resp_ErrStatusLineCtr;
+    CPU_INT32U  Resp_ErrHdrCtr;
+    CPU_INT32U  Resp_ErrTransferStdCtr;
+    CPU_INT32U  Resp_ErrTransferChunkedCtr;
+    CPU_INT32U  Resp_ErrTransferChunckedStateInvCtr;
+    CPU_INT32U  Resp_ErrTransferChunkedHookCtr;
+    CPU_INT32U  Resp_ErrTransferChunckedHookStateInvCtr;
+    CPU_INT32U  Resp_ErrStateUnknownCtr;
+
+    CPU_INT32U  FS_ErrNoEnCtr;
+    CPU_INT32U  FS_ErrTypeInvalidCtr;
+    CPU_INT32U  FS_ErrWorkingFolderInvalidCtr;
+
+    CPU_INT32U  File_ErrOpenNoFS_Ctr;
+    CPU_INT32U  File_ErrCloseNoFS_Ctr;
+    CPU_INT32U  File_ErrRdNoFS_Ctr;
+    CPU_INT32U  File_ErrSetPosNoFS_Ctr;
+
+    CPU_INT32U  ErrInternal_ReqMethodNotSupported;
+    CPU_INT32U  ErrInternal_ReqFormatInvalid;
+    CPU_INT32U  ErrInternal_ReqURI_Len;
+    CPU_INT32U  ErrInternal_ReqProtocolNotSupported;
+    CPU_INT32U  ErrInternal_ReqMoreDataRequired;
+    CPU_INT32U  ErrInternal_ReqHdrOverflow;
+
+    CPU_INT32U  ErrInternal_ReqBodyFormFormatInvalid;
+    CPU_INT32U  ErrInternal_ReqBodyFormFileUploadOpen;
+
+    CPU_INT32U  ErrInternal_ReqKeyValPoolSizeInvalid;
+
+    CPU_INT32U  ErrInternal_StateUnknown;
+    CPU_INT32U  ErrInternal_Unknown;
+
+} HTTPs_INSTANCE_ERRS;
+
+
+/*
+*********************************************************************************************************
+*                                         INSTANCE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U                 HTTPs_INSTANCE_ID;
+#define  HTTPs_INSTANCE_ID_NONE     0
+
+struct  HTTPs_Instance {
+           HTTPs_INSTANCE_ID      ID;
+           HTTPs_OS_TASK_OBJ     *OS_TaskObjPtr;
+           KAL_LOCK_HANDLE        OS_LockObj;
+           CPU_BOOLEAN            Started;
+
+    const  HTTPs_CFG             *CfgPtr;
+
+    const  NET_TASK_CFG          *TaskCfgPtr;
+
+           void                  *DataPtr;
+
+#ifdef   NET_IPv4_MODULE_EN
+           NET_SOCK_ID            SockListenID_IPv4;
+#endif
+
+#ifdef   NET_IPv6_MODULE_EN
+           NET_SOCK_ID            SockListenID_IPv6;
+#endif
+
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+           CPU_INT32U             FS_PathLenMax;
+           CPU_CHAR               FS_PathSepChar;
+#endif
+
+           MEM_DYN_POOL           PoolConn;
+           MEM_DYN_POOL           PoolBuf;
+           MEM_DYN_POOL           PoolPath;
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+           MEM_DYN_POOL           PoolHost;
+#endif
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+           MEM_DYN_POOL           PoolTokenCtrl;
+           MEM_DYN_POOL           PoolTokenVal;
+#endif
+
+
+#if ((HTTPs_CFG_FORM_EN      == DEF_ENABLED) || \
+     (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED))
+           MEM_DYN_POOL           PoolKeyVal;
+#endif
+
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+           MEM_DYN_POOL           PoolFormKeyStr;
+           MEM_DYN_POOL           PoolFormValStr;
+#endif
+
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+           MEM_DYN_POOL           PoolQueryStrKeyStr;
+           MEM_DYN_POOL           PoolQueryStrValStr;
+#endif
+
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) || \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+           MEM_DYN_POOL           PoolFormBoundary;
+#endif
+
+
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+           MEM_DYN_POOL           PoolReqHdr;
+           MEM_DYN_POOL           PoolReqHdrStr;
+#endif
+
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+           MEM_DYN_POOL           PoolRespHdr;
+           MEM_DYN_POOL           PoolRespHdrStr;
+#endif
+
+           HTTPs_CONN            *ConnFirstPtr;
+           HTTPs_CONN            *ConnLastPtr;
+
+           CPU_INT08U             ConnActiveCtr;
+
+#if (HTTPs_CFG_DBG_INFO_EN == DEF_ENABLED)
+           HTTPs_INSTANCE        *InstancePrevPtr;
+           HTTPs_INSTANCE        *InstanceNextPtr;
+#endif
+
+#if (HTTPs_CFG_CTR_STAT_EN == DEF_ENABLED)
+           HTTPs_INSTANCE_STATS   StatsCtr;
+#endif
+
+#if (HTTPs_CFG_CTR_ERR_EN  == DEF_ENABLED)
+           HTTPs_INSTANCE_ERRS    ErrsCtr;
+#endif
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+HTTPs_EXT  CPU_INT16U  HTTPs_InstanceRunningNbr;
+HTTPs_EXT  CPU_INT16U  HTTPs_InstanceInitializedNbr;
+
+extern const  HTTP_DICT        HTTPs_DictionaryTokenInternal[];
+extern        CPU_SIZE_T       HTTPs_DictionarySizeTokenInternal;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            HOOK MACRO
+*********************************************************************************************************
+*/
+
+#define  HTTPs_HOOK_DEFINED(hookCfg, hookName)              ((hookCfg != DEF_NULL) && (hookCfg->hookName != DEF_NULL))
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs COUNTER MACRO'S
+*
+* Description : Functionality to set and increment statistic and error counter
+*
+* Argument(s) : Various HTTP server counter variable(s) & values.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               These macro's are INTERNAL HTTP server suite macro's & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (HTTPs_CFG_CTR_STAT_EN == DEF_ENABLED)
+    #define  HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance)   {                                           \
+                                                                p_ctr_stats = &p_instance->StatsCtr;    \
+                                                            }
+
+    #define  HTTPs_STATS_INC(p_ctr)                         {                                           \
+                                                                 p_ctr++;                               \
+                                                            }
+
+    #define  HTTPs_STATS_OCTET_INC(p_ctr, octet)            {                                           \
+                                                                 p_ctr += octet;                        \
+                                                            }
+
+#else
+                                                                /* Prevent 'variable unused' compiler warning.          */
+    #define  HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance)   {                                           \
+                                                               (void)&p_ctr_stats;                      \
+                                                            }
+
+    #define  HTTPs_STATS_INC(p_ctr)
+
+    #define  HTTPs_STATS_OCTET_INC(p_ctr, octet)
+#endif
+
+
+
+#if (HTTPs_CFG_CTR_ERR_EN == DEF_ENABLED)
+    #define  HTTPs_SET_PTR_ERRS(p_ctr_err, p_instance)      {                                           \
+                                                                 p_ctr_err = &p_instance->ErrsCtr;      \
+                                                            }
+
+    #define  HTTPs_ERR_INC(p_ctr)                           {                                           \
+                                                                 p_ctr++;                               \
+                                                            }
+
+#else
+                                                                 /* Prevent 'variable unused' compiler warning.          */
+    #define  HTTPs_SET_PTR_ERRS(p_ctr_err, p_instance)      {                                           \
+                                                               (void)&p_ctr_err;                        \
+                                                            }
+
+    #define  HTTPs_ERR_INC(p_ctr)
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void             HTTPs_Init                       (       MEM_SEG               *p_mem_seg,
+                                                          HTTPs_ERR             *p_err);
+
+HTTPs_INSTANCE  *HTTPs_InstanceInit               (const  HTTPs_CFG             *p_cfg,
+                                                   const  NET_TASK_CFG          *p_task_cfg,
+                                                          HTTPs_ERR             *p_err);
+
+void             HTTPs_InstanceStart              (       HTTPs_INSTANCE        *p_instance,
+                                                          HTTPs_ERR             *p_err);
+
+void             HTTPs_InstanceStop               (       HTTPs_INSTANCE        *p_instance,
+                                                          HTTPs_ERR             *p_err);
+
+
+HTTPs_HDR_BLK   *HTTPs_RespHdrGet                 (const  HTTPs_INSTANCE        *p_instance,
+                                                          HTTPs_CONN            *p_conn,
+                                                          HTTP_HDR_FIELD         hdr_field,
+                                                          HTTPs_HDR_VAL_TYPE     val_type,
+                                                          HTTPs_ERR             *p_err);
+
+void             HTTPs_RespBodySetParamFile       (const  HTTPs_INSTANCE        *p_instance,
+                                                          HTTPs_CONN            *p_conn,
+                                                          CPU_CHAR              *p_path,
+                                                          HTTP_CONTENT_TYPE      content_type,
+                                                          CPU_BOOLEAN            token_en,
+                                                          HTTPs_ERR             *p_err);
+
+void             HTTPs_RespBodySetParamStaticData (const  HTTPs_INSTANCE        *p_instance,
+                                                          HTTPs_CONN            *p_conn,
+                                                          HTTP_CONTENT_TYPE      content_type,
+                                                          void                  *p_data,
+                                                          CPU_INT32U             data_len,
+                                                          CPU_BOOLEAN            token_en,
+                                                          HTTPs_ERR             *p_err);
+
+void             HTTPs_RespBodySetParamNoBody     (const  HTTPs_INSTANCE        *p_instance,
+                                                          HTTPs_CONN            *p_conn,
+                                                          HTTPs_ERR             *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of HTTPs module include.                         */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_conn.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_conn.c
new file mode 100644
index 0000000..436eed7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_conn.c
@@ -0,0 +1,505 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP SERVER CONNECTION MODULE
+*
+* Filename      : http-s_conn.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPs_CONN_MODULE
+
+#include  "http-s_conn.h"
+#include  "http-s_mem.h"
+#include  "http-s_sock.h"
+#include  "http-s_req.h"
+#include  "http-s_resp.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void  HTTPsConn_Close       (HTTPs_INSTANCE  *p_instance,
+                                     HTTPs_CONN      *p_conn);
+
+static  void  HTTPsConn_ErrInternal (HTTPs_INSTANCE  *p_instance,
+                                     HTTPs_CONN      *p_conn);
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsConn_Process()
+*
+* Description : (1) Process each accepted connection:
+*
+*                   (a) Receive, transmit, process data or close connection, if the connection is ready.
+*                   (b) Update connection state, parse received data or prepare data to transmit.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceTaskHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsConn_Process (HTTPs_INSTANCE  *p_instance)
+{
+    const  HTTPs_CFG    *p_cfg;
+           HTTPs_CONN   *p_conn;
+           HTTPs_CONN   *p_conn_next;
+           CPU_BOOLEAN   done;
+           CPU_BOOLEAN   hook_def;
+           CPU_BOOLEAN   process;
+           CPU_BOOLEAN   rdy_rd;
+           CPU_BOOLEAN   rdy_wr;
+           CPU_BOOLEAN   rdy_err;
+#if (HTTPs_CFG_PERSISTENT_CONN_EN == DEF_ENABLED)
+           CPU_BOOLEAN   persistent;
+#endif
+
+
+    p_cfg  = p_instance->CfgPtr;
+    p_conn = p_instance->ConnFirstPtr;
+
+
+
+    while (p_conn != DEF_NULL) {                                /* For each accepted conn.                              */
+
+        rdy_rd  = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPs_FLAG_SOCK_RDY_RD);
+        rdy_wr  = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPs_FLAG_SOCK_RDY_WR);
+        rdy_err = DEF_BIT_IS_SET(p_conn->SockFlags, HTTPs_FLAG_SOCK_RDY_ERR);
+
+        p_conn_next = p_conn->ConnNextPtr;                      /* Req'd since cur conn can be closed.                  */
+
+        if ((rdy_rd  == DEF_YES) ||                             /* If conn sock rdy.                                    */
+            (rdy_wr  == DEF_YES) ||
+            (rdy_err == DEF_YES)) {
+
+
+                                                                /* ---------------- CONN SOCK PROCESS ----------------- */
+            switch (p_conn->SockState) {
+                case HTTPs_SOCK_STATE_NONE:                     /* No data to rx or tx.                                 */
+                     process = DEF_YES;
+                     break;
+
+
+                case HTTPs_SOCK_STATE_RX:                       /* Rx data.                                             */
+                     process = HTTPsSock_ConnDataRx(p_instance, p_conn);
+                     break;
+
+
+                case HTTPs_SOCK_STATE_TX:                       /* Tx data from buf.                                    */
+                     process = HTTPsSock_ConnDataTx(p_instance, p_conn);
+                     break;
+
+
+                case HTTPs_SOCK_STATE_ERR:                      /* Fatal err.                                           */
+                case HTTPs_SOCK_STATE_CLOSE:                    /* Transaction completed.                               */
+                default:
+                     HTTPsConn_Close(p_instance, p_conn);
+                     process = DEF_NO;
+                     break;
+            }
+
+
+                                                                /* ------------ UPDATE CONN & PREPARE DATA ------------ */
+            if (process == DEF_YES) {
+                switch (p_conn->State) {
+                    case HTTPs_CONN_STATE_REQ_INIT:             /* Receive and parse request.                           */
+                    case HTTPs_CONN_STATE_REQ_PARSE_METHOD:
+                    case HTTPs_CONN_STATE_REQ_PARSE_URI:
+                    case HTTPs_CONN_STATE_REQ_PARSE_QUERY_STRING:
+                    case HTTPs_CONN_STATE_REQ_PARSE_PROTOCOL_VERSION:
+                    case HTTPs_CONN_STATE_REQ_PARSE_HDR:
+                    case HTTPs_CONN_STATE_REQ_LINE_HDR_HOOK:
+                         HTTPsReq_Handle(p_instance, p_conn);
+                         break;
+
+
+                    case HTTPs_CONN_STATE_REQ_BODY_INIT:        /* Process request body.                                */
+                    case HTTPs_CONN_STATE_REQ_BODY_DATA:
+                    case HTTPs_CONN_STATE_REQ_BODY_FLUSH_DATA:
+                    case HTTPs_CONN_STATE_REQ_BODY_FORM_APP_PARSE:
+                    case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_INIT:
+                    case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_PARSE:
+                    case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_OPEN:
+                    case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_WR:
+                         HTTPsReq_Body(p_instance, p_conn);
+                         break;
+
+                                                                /* Prepare response.                                    */
+                    case HTTPs_CONN_STATE_REQ_READY_SIGNAL:
+                    case HTTPs_CONN_STATE_REQ_READY_POLL:
+                         done = HTTPsReq_RdySignal(p_instance, p_conn);
+                         if (done == DEF_YES) {
+                             p_conn->State = HTTPs_CONN_STATE_RESP_PREPARE;
+                         }
+                         break;
+
+
+                    case HTTPs_CONN_STATE_RESP_PREPARE:
+                         done = HTTPsResp_Prepare(p_instance, p_conn);
+                         if (done == DEF_YES) {
+                             p_conn->State = HTTPs_CONN_STATE_RESP_INIT;
+                         }
+                         break;
+
+
+                    case HTTPs_CONN_STATE_RESP_INIT:            /* Build and transmit response.                         */
+                    case HTTPs_CONN_STATE_RESP_TOKEN:
+                    case HTTPs_CONN_STATE_RESP_STATUS_LINE:
+                    case HTTPs_CONN_STATE_RESP_HDR:
+                    case HTTPs_CONN_STATE_RESP_HDR_CONTENT_TYPE:
+                    case HTTPs_CONN_STATE_RESP_HDR_FILE_TRANSFER:
+                    case HTTPs_CONN_STATE_RESP_HDR_LOCATION:
+                    case HTTPs_CONN_STATE_RESP_HDR_CONN:
+                    case HTTPs_CONN_STATE_RESP_HDR_LIST:
+                    case HTTPs_CONN_STATE_RESP_HDR_TX:
+                    case HTTPs_CONN_STATE_RESP_HDR_END:
+                    case HTTPs_CONN_STATE_RESP_FILE_STD:
+                    case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED:
+                    case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_TX_TOKEN:
+                    case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_TX_LAST_CHUNK:
+                    case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_HOOK:
+                    case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_FINALIZE:
+                    case HTTPs_CONN_STATE_RESP_COMPLETED:
+                         done = HTTPsResp_Handle(p_instance, p_conn);
+                         if (done == DEF_YES) {
+                             p_conn->State = HTTPs_CONN_STATE_COMPLETED;
+                         }
+                         break;
+
+
+                    case HTTPs_CONN_STATE_COMPLETED:            /* Transaction completed.                               */
+#if (HTTPs_CFG_PERSISTENT_CONN_EN == DEF_ENABLED)
+                         persistent = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_CONN_PERSISTENT);
+                         if ((p_cfg->ConnPersistentEn == DEF_ENABLED) &&
+                             (persistent              == DEF_YES)    ) {
+                              HTTPsMem_ConnClr(p_instance, p_conn);
+                              p_conn->SockState = HTTPs_SOCK_STATE_RX;
+                              p_conn->State     = HTTPs_CONN_STATE_REQ_INIT;
+                         } else {
+                              p_conn->SockState = HTTPs_SOCK_STATE_CLOSE;
+                         }
+#else
+                         p_conn->SockState = HTTPs_SOCK_STATE_CLOSE;
+#endif
+                         hook_def = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnTransCompleteHook);
+                         if (hook_def == DEF_YES) {
+                             p_cfg->HooksPtr->OnTransCompleteHook(p_instance, p_conn, p_cfg->Hooks_CfgPtr);
+                         }
+                         break;
+
+
+                    case HTTPs_CONN_STATE_ERR_INTERNAL:
+                         HTTPsConn_ErrInternal(p_instance, p_conn);
+                         p_conn->SockState = HTTPs_SOCK_STATE_CLOSE;
+                         break;
+
+
+                    case HTTPs_CONN_STATE_UNKNOWN:
+                         p_conn->State   = HTTPs_CONN_STATE_ERR_FATAL;
+                         p_conn->ErrCode = HTTPs_ERR_STATE_UNKNOWN;
+                         break;
+
+
+                    case HTTPs_CONN_STATE_ERR_FATAL:            /* Fatal err.                                           */
+                    default:
+                         p_conn->SockState = HTTPs_SOCK_STATE_CLOSE;
+                         break;
+                }
+            }
+        }
+
+        p_conn = p_conn_next;                                   /* Move to next accepted conn.                          */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPsConn_Close()
+*
+* Description : (1) Close connection.
+*
+*                   (a) Close socket.
+*                   (b) Close timer
+*                   (c) Release connection structure.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsConn_Close (HTTPs_INSTANCE  *p_instance,
+                               HTTPs_CONN      *p_conn)
+{
+    const  HTTPs_CFG            *p_cfg;
+           CPU_BOOLEAN           hook_def;
+           HTTPs_INSTANCE_ERRS  *p_ctr_err;
+
+
+    HTTPs_SET_PTR_ERRS(p_ctr_err, p_instance);
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    if (p_conn->TokenCtrlPtr != DEF_NULL) {
+        HTTPsMem_TokenRelease(p_instance, p_conn);
+        HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenCloseNotEmptyCtr);
+    }
+#endif
+
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+    HTTPsMem_QueryStrKeyValBlkReleaseAll(p_instance, p_conn);
+#endif
+
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    HTTPsMem_FormKeyValBlkReleaseAll(p_instance, p_conn);
+#endif
+
+    p_cfg = p_instance->CfgPtr;
+
+    hook_def = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnConnCloseHook);
+    if (hook_def == DEF_YES) {
+        p_cfg->HooksPtr->OnConnCloseHook(p_instance,
+                                         p_conn,
+                                         p_cfg->Hooks_CfgPtr);
+    }
+
+                                                                /* -------------------- CLOSE SOCK -------------------- */
+    HTTPsSock_ConnClose(p_instance, p_conn);
+
+                                                                /* ------------------ CLOSE FS FILE ------------------- */
+    HTTPsResp_DataComplete(p_instance, p_conn);
+
+
+#if ((HTTPs_CFG_HDR_RX_EN == DEF_ENABLED) || \
+     (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED))
+
+    switch (p_conn->HdrType) {
+        case HTTPs_HDR_TYPE_REQ:
+                                                                /* ---------- VALIDATE REQ HDR POOL IS EMPTY ---------- */
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+             while (p_conn->HdrListPtr != DEF_NULL) {
+                 HTTPsMem_ReqHdrRelease(p_instance,
+                                        p_conn);
+             }
+#endif
+             break;
+
+        case HTTPs_HDR_TYPE_RESP:
+                                                                /* --------- VALIDATE RESP HDR POOL IS EMPTY ---------- */
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+             while (p_conn->HdrListPtr != DEF_NULL) {
+                 HTTPsMem_RespHdrRelease(p_instance,
+                                         p_conn);
+             }
+#endif
+             break;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrHdrTypeInvalidCtr);
+             break;
+    }
+
+#endif
+
+    (void)&p_ctr_err;
+
+                                                                /* ------------------- RELEASE CONN ------------------- */
+    HTTPsMem_ConnRelease(p_instance, p_conn);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsConn_ErrInternal()
+*
+* Description : (1) Internal error handler
+*
+*                   (a) Make sure that all data has been read
+*                   (b) Update connection states and status code
+*                   (c) Notify application about the internal error.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsConn_ErrInternal (HTTPs_INSTANCE  *p_instance,
+                                     HTTPs_CONN      *p_conn)
+{
+    const  HTTPs_CFG             *p_cfg;
+           HTTPs_INSTANCE_ERRS   *p_ctr_err;
+           CPU_BOOLEAN            result;
+
+
+    HTTPs_SET_PTR_ERRS(p_ctr_err, p_instance);
+
+    p_cfg = p_instance->CfgPtr;
+
+
+    if (p_conn->ReqContentLen > 0) {
+                                                                /* -------------- READ ALL RECEIVED DATA -------------- */
+        p_conn->ReqContentLenRxd += p_conn->RxBufLenRem;
+        p_conn->RxBufLenRem       = 0u;
+
+        if (p_conn->ReqContentLenRxd < p_conn->ReqContentLen) { /* If not received all data.                            */
+            p_conn->SockState = HTTPs_SOCK_STATE_RX;
+            return;
+        }
+    }
+
+                                                                /* ----------------- SET CONN STATES ------------------ */
+    p_conn->State     = HTTPs_CONN_STATE_RESP_PREPARE;
+    p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+
+    switch (p_conn->ErrCode) {
+        case HTTPs_ERR_REQ_METHOD_NOT_SUPPORTED:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_ReqMethodNotSupported);
+             p_conn->StatusCode = HTTP_STATUS_NOT_IMPLEMENTED;
+             break;
+
+        case HTTPs_ERR_REQ_FORMAT_INVALID:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_ReqFormatInvalid);
+             p_conn->StatusCode = HTTP_STATUS_BAD_REQUEST;
+             break;
+
+        case HTTPs_ERR_REQ_URI_LEN:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_ReqURI_Len);
+             p_conn->StatusCode = HTTP_STATUS_REQUEST_URI_TOO_LONG;
+             break;
+
+        case HTTPs_ERR_REQ_PROTOCOL_VER_NOT_SUPPORTED:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_ReqProtocolNotSupported);
+             p_conn->StatusCode = HTTP_STATUS_HTTP_VERSION_NOT_SUPPORTED;
+             break;
+
+        case HTTPs_ERR_REQ_MORE_DATA_REQUIRED:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_ReqMoreDataRequired);
+             p_conn->StatusCode = HTTP_STATUS_BAD_REQUEST;
+             break;
+
+        case HTTPs_ERR_REQ_HDR_OVERFLOW:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_ReqHdrOverflow);
+             p_conn->StatusCode = HTTP_STATUS_INTERNAL_SERVER_ERR;
+             break;
+
+        case HTTPs_ERR_FORM_FORMAT_INV:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_ReqBodyFormFormatInvalid);
+             p_conn->StatusCode = HTTP_STATUS_INTERNAL_SERVER_ERR;
+             break;
+
+        case HTTPs_ERR_FORM_FILE_UPLOAD_OPEN:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_ReqBodyFormFileUploadOpen);
+             p_conn->StatusCode = HTTP_STATUS_INTERNAL_SERVER_ERR;
+             break;
+
+        case HTTPs_ERR_KEY_VAL_CFG_POOL_SIZE_INV:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_ReqKeyValPoolSizeInvalid);
+             p_conn->StatusCode = HTTP_STATUS_INTERNAL_SERVER_ERR;
+             break;
+
+        case HTTPs_ERR_STATE_UNKNOWN:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_StateUnknown);
+             p_conn->StatusCode = HTTP_STATUS_INTERNAL_SERVER_ERR;
+             break;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->ErrInternal_Unknown);
+             p_conn->StatusCode = HTTP_STATUS_INTERNAL_SERVER_ERR;
+             break;
+    }
+
+                                                                /* --------------- NOTIFY APP ABOUT ERR --------------- */
+    result = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnErrHook);
+    if (result == DEF_TRUE) {                                   /* If err handler fnct is not null ...                  */
+        p_cfg->HooksPtr->OnErrHook(p_instance,                  /* ... call cfg err fnct handler.                       */
+                                   p_conn,
+                                   p_cfg->Hooks_CfgPtr,
+                                   p_conn->ErrCode);
+    }
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_conn.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_conn.h
new file mode 100644
index 0000000..d77ecb9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_conn.h
@@ -0,0 +1,86 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP SERVER CONNECTION MODULE
+*
+* Filename      : http-s_conn.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPs module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPs_CONN_MODULE_PRESENT                          /* See Note #1.                                         */
+#define  HTTPs_CONN_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  "http-s.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void  HTTPsConn_Process (HTTPs_INSTANCE  *p_instance);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPs_CONN_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_mem.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_mem.c
new file mode 100644
index 0000000..c162bf7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_mem.c
@@ -0,0 +1,2847 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     HTTP SERVER MEMORY LIBRARY
+*
+* Filename      : http-s_mem.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPs_MEM_MODULE
+#include  "http-s.h"
+#include  "http-s_mem.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_CFG_POOLS_INIT_NBR       1
+
+
+/*
+*********************************************************************************************************
+*                                             FORM DEFINES
+*********************************************************************************************************
+*/
+
+#define  HTTPs_FORM_BOUNDARY_STR_LEN_MAX                     72u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  MEM_SEG         *HTTPs_MemSegPtr;
+static  MEM_DYN_POOL    *HTTPs_InstancesPoolPtr;
+
+#if (HTTPs_CFG_DBG_INFO_EN == DEF_ENABLED)
+static  HTTPs_INSTANCE  *HTTPsMem_InstancesListPtr;
+#endif
+
+static  CPU_INT32U       HTTPsMem_InstanceNbrNext;
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+static  void  HTTPsMem_ReqHdrPoolInit  (HTTPs_INSTANCE  *p_instance,
+                                        HTTPs_ERR       *p_err);
+#endif
+
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+static  void  HTTPsMem_RespHdrPoolInit (HTTPs_INSTANCE  *p_instance,
+                                        HTTPs_ERR       *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsMem_InstanceInit()
+*
+* Description : Initialize HTTP server instance list variables.
+*
+* Argument(s) : p_mem_seg   Pointer to the memory segment to use to allocate necessary objects.
+*                           Set to DEF_NULL to allocate objects on the HEAP configured in uC/LIB.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE
+*                               HTTPs_ERR_INSTANCE_INIT_POOL_REM_MEM
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_Init().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (1) In order for HTTP server initialization complete to be able to be verified from
+*                   interrupt service routines, following variables MUST be accessed exclusively in
+*                   critical sections during initialization:
+*
+*                   (a) HTTPs_InstanceNbrMax
+*                   (b) HTTPs_InstanceNbrNext
+*                   (c) HTTPs_InstancesListPtr
+*********************************************************************************************************
+*/
+
+void  HTTPsMem_InstanceInit (MEM_SEG    *p_mem_seg,
+                             HTTPs_ERR  *p_err)
+{
+    LIB_ERR  err_lib;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();                                       /* See Note #1.                                         */
+    HTTPsMem_InstanceNbrNext      = 0u;
+#if (HTTPs_CFG_DBG_INFO_EN == DEF_ENABLED)
+    HTTPsMem_InstancesListPtr     = DEF_NULL;
+#endif
+    CPU_CRITICAL_EXIT();
+
+    HTTPs_MemSegPtr = p_mem_seg;
+
+    HTTPs_InstancesPoolPtr = (MEM_DYN_POOL *)Mem_SegAlloc("HTTPs Instances Pool Object",
+                                                          p_mem_seg,
+                                                          sizeof(MEM_DYN_POOL),
+                                                         &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+        goto exit;
+    }
+
+
+    Mem_Clr(HTTPs_InstancesPoolPtr, sizeof(MEM_DYN_POOL));
+
+
+    Mem_DynPoolCreate("HTTPs Instance Pools",
+                       HTTPs_InstancesPoolPtr,
+                       p_mem_seg,
+                       sizeof(HTTPs_INSTANCE),
+                       sizeof(CPU_ALIGN),
+                       HTTPs_CFG_POOLS_INIT_NBR,
+                       LIB_MEM_BLK_QTY_UNLIMITED,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+        goto exit;
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsMem_InstanceTaskInit()
+*
+* Description : Initialize the Memory segment required by the HTTP server instance task.
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE
+*                           HTTPs_ERR_OS_INIT_REM_MEM
+*                           HTTPs_ERR_OS_OBJ_CREATE
+*
+* Return(s)   : Pointer to HTTP server instance task object.
+*
+* Caller(s)   : HTTPsTask_InstanceObjInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+HTTPs_OS_TASK_OBJ  *HTTPsMem_InstanceTaskInit (HTTPs_ERR  *p_err)
+{
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+           CPU_SIZE_T          octets_rem;
+           CPU_SIZE_T          octets_reqd;
+#endif
+           HTTPs_OS_TASK_OBJ  *p_os_task_obj;
+           LIB_ERR             err_lib;
+
+
+    p_os_task_obj = DEF_NULL;
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* -------------- VALIDATE REM MEM AVAIL -------------- */
+    octets_reqd  = sizeof(HTTPs_OS_TASK_OBJ);
+
+    octets_rem   = Mem_SegRemSizeGet(HTTPs_MemSegPtr,
+                                     sizeof(CPU_SIZE_T),
+                                     DEF_NULL,
+                                    &err_lib);
+    if (octets_rem < octets_reqd) {
+       *p_err = HTTPs_ERR_TASK_INIT_REM_MEM;
+        goto exit;
+    }
+#endif
+
+                                                                /* ----- ACQUIRE TASK HTTPs_OS_TASK_OBJ MEM SPACE ----- */
+    p_os_task_obj = (HTTPs_OS_TASK_OBJ *)Mem_SegAlloc("HTTPs Task object",
+                                                       HTTPs_MemSegPtr,
+                                                       sizeof(HTTPs_OS_TASK_OBJ),
+                                                      &err_lib);
+    if (p_os_task_obj == DEF_NULL) {
+       *p_err = HTTPs_ERR_TASK_OBJ_CREATE;
+        goto exit;
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit:
+    return (p_os_task_obj);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsMem_InstanceGet()
+*
+* Description : (1) Get an HTTP server instance:
+*
+*                   (a) Validate next HTTP server instance available
+*                   (b) Acquire HTTP server instance block
+*                   (c) Update instances list
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*               -----   Argument validated in HTTPs_InstanceStart().
+*
+*                           HTTPs_ERR_NONE                      HTTP server instance      successfully acquired.
+*                           HTTPs_ERR_INSTANCES_POOL_EMPTY      HTTP server instances pool is empty.
+*                           HTTPs_ERR_INSTANCES_POOL_ERR        HTTP server instance  NOT successfully acquired.
+*
+* Return(s)   : Pointer to the HTTP server instance acquired, if NO error(s).
+*
+*               NULL pointer,                                 otherwise.
+*
+* Caller(s)   : HTTPs_InstanceInit().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) In order for HTTP server initialization complete to be able to be verified from
+*                   interrupt service routines,'HTTPs_InstanceNbrNext' MUST be accessed exclusively
+*                   in critical sections during initialization.
+*
+*               (3) Next available HTTP server instance MUST be configured PRIOR to initializing
+*                   the specific HTTP server instance so that the initialized HTTP server instance
+*                   is valid.
+*********************************************************************************************************
+*/
+
+HTTPs_INSTANCE  *HTTPsMem_InstanceGet (HTTPs_ERR  *p_err)
+{
+    HTTPs_INSTANCE  *p_instance;
+    CPU_INT32U       instance_nbr;
+    LIB_ERR          err_lib;
+#if (HTTPs_CFG_DBG_INFO_EN == DEF_ENABLED)
+    HTTPs_INSTANCE  *p_instance_item;
+#endif
+    CPU_SR_ALLOC();
+
+
+                                                                /* ---------- VALIDATE HTTPS INSTANCE AVAIL ----------- */
+    CPU_CRITICAL_ENTER();                                       /* See Note #2.                                         */
+    instance_nbr = HTTPsMem_InstanceNbrNext;
+    CPU_CRITICAL_EXIT();
+
+
+    CPU_CRITICAL_ENTER();                                       /* See Note #2.                                         */
+    HTTPsMem_InstanceNbrNext++;                                /* Inc to next avail HTTPs instance (see Note #2).      */
+    CPU_CRITICAL_EXIT();
+
+
+                                                                /* --------------- ACQUIRE INSTANCE BLK --------------- */
+    p_instance = (HTTPs_INSTANCE *)Mem_DynPoolBlkGet(HTTPs_InstancesPoolPtr,
+                                                    &err_lib);
+    if (p_instance == DEF_NULL) {
+        CPU_CRITICAL_ENTER();                                   /* See Note #2.                                         */
+        HTTPsMem_InstanceNbrNext--;                            /* Dec next avail HTTPs instance (see Note #3).         */
+        CPU_CRITICAL_EXIT();
+       *p_err = HTTPs_ERR_INIT_POOL_INSTANCE;
+        return(DEF_NULL);
+    }
+
+    Mem_Clr(p_instance, sizeof(HTTPs_INSTANCE));
+
+
+#if (HTTPs_CFG_DBG_INFO_EN == DEF_ENABLED)
+                                                                /* -------------- UPDATE INSTANCES LIST --------------- */
+    p_instance->InstanceNextPtr = DEF_NULL;
+    if (HTTPsMem_InstancesListPtr == DEF_NULL) {                /* If            instances list is  empty ...           */
+        p_instance->InstancePrevPtr = DEF_NULL;
+        HTTPsMem_InstancesListPtr  = p_instance;                /* .. first      instance  item is this cur instance.   */
+
+    } else {                                                    /* If            instances list not empty ...           */
+        p_instance_item = HTTPsMem_InstancesListPtr;
+                                                                /* ... find last instance  item.                        */
+        while (p_instance_item->InstanceNextPtr != DEF_NULL) {
+            p_instance_item = p_instance_item->InstanceNextPtr;
+        }
+
+        p_instance->InstancePrevPtr      = p_instance_item;     /* Prev instance of the cur instance is the last item.  */
+        p_instance_item->InstanceNextPtr = p_instance;          /* Next instance item is the current instance.          */
+    }
+#endif
+
+    p_instance->ID = instance_nbr;
+
+   *p_err = HTTPs_ERR_NONE;
+
+    return (p_instance);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsMem_InstanceRelease()
+*
+* Description : (1) Release HTTP server instance:
+*
+*                   (a) Update  instances list
+*                   (b) Release instance block
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*               -----   Argument validated in HTTPs_InstanceStart().
+*
+*                           HTTPs_ERR_NONE                          Instance          successfully released.
+*                           HTTPs_ERR_INSTANCES_POOL_BLK_FREE       Instance block already         released.
+*                           HTTPs_ERR_INSTANCES_POOL_ERR            Instance NOT      successfully released.
+*                           HTTPs_ERR_INSTANCE_LIST_NULL_ITEM       Instance list NOT successfully released.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceInit().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) In order for HTTP server initialization complete to be able to be verified from
+*                   interrupt service routines, following variables MUST be accessed exclusively in
+*                   critical sections during initialization.
+*
+*                   (a) HTTPs_InstanceNbrMax
+*                   (b) HTTPs_InstanceNbrNext
+*                   (c) HTTPs_InstancesListPtr
+*
+*               (3) All opened sockets MUST be closed before calling this function.
+*********************************************************************************************************
+*/
+
+void  HTTPsMem_InstanceRelease (HTTPs_INSTANCE  *p_instance)
+{
+#if (HTTPs_CFG_DBG_INFO_EN == DEF_ENABLED)
+    HTTPs_INSTANCE  *p_instance_item;
+#endif
+    LIB_ERR          err_lib;
+    CPU_SR_ALLOC();
+
+
+#if (HTTPs_CFG_DBG_INFO_EN == DEF_ENABLED)
+                                                                /* -------------- UPDATE INSTANCES LIST --------------- */
+    CPU_CRITICAL_ENTER();                                       /* See Note #2.                                         */
+    p_instance_item = HTTPsMem_InstancesListPtr;
+    CPU_CRITICAL_EXIT();
+
+    if (p_instance == p_instance_item) {                        /* If instance is the first item in instances list.     */
+        if (p_instance->InstanceNextPtr == DEF_NULL) {          /* If no other item in instances list.                  */
+            CPU_CRITICAL_ENTER();                               /* See Note #2.                                         */
+            HTTPsMem_InstancesListPtr = DEF_NULL;
+            CPU_CRITICAL_EXIT();
+
+        } else {
+            CPU_CRITICAL_ENTER();                               /* See Note #2.                                         */
+            HTTPsMem_InstancesListPtr                  = p_instance->InstanceNextPtr;
+            HTTPsMem_InstancesListPtr->InstancePrevPtr = DEF_NULL;
+            CPU_CRITICAL_EXIT();
+        }
+
+    } else {
+                                                                /* Find cur instance in instances list.                 */
+        while ((p_instance_item != p_instance) &&
+               (p_instance_item != DEF_NULL)  ) {
+                p_instance_item  = p_instance_item->InstanceNextPtr;
+        }
+
+        if (p_instance_item == DEF_NULL) {                      /* Should not be null.                                  */
+            return;
+        }
+
+        if (p_instance_item->InstancePrevPtr == DEF_NULL) {     /* Should not be null.                                  */
+            return;
+        }
+
+        p_instance_item                  = p_instance->InstancePrevPtr; /* Set next item of the prev list item ...      */
+        p_instance_item->InstanceNextPtr = p_instance->InstanceNextPtr; /* ... to the next element to the current item. */
+    }
+
+#else
+   (void)&p_instance;                                           /* Prevent 'variable unused' compiler warnings.         */
+#endif
+
+                                                                /* -------------- RELEASE INSTANCE BLOCK -------------- */
+    Mem_DynPoolBlkFree(HTTPs_InstancesPoolPtr, p_instance, &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();                                       /* See Note #2.                                         */
+    HTTPsMem_InstanceNbrNext--;
+    CPU_CRITICAL_EXIT();
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsMem_ConnPoolInit()
+*
+* Description :(1) Initialize the HTTP server instance connection pool :
+*
+*                   (a) Validate remaining memory available
+*                   (b) Create connections pool
+*                   (c) Create buffers     pool
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*               -----   Argument validated in HTTPs_InstanceStart().
+*
+*                           HTTPs_ERR_NONE                          Connection pool successfully initialized.
+*                           HTTPs_ERR_INSTANCE_INIT_POOL_REM_MEM    Not enough remaining memory.
+*                           HTTPs_ERR_INSTANCE_INIT_POOL_CONN       Initialization of connections pool failed.
+*                           HTTPs_ERR_INSTANCE_INIT_POOL_BUF        Initialization of buffers     pool failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceInit().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) Validate that the remaining memory available on the heap before creating the connection &
+*                   buffer pools is required to avoid wasting heap in the case there is enough memory to create
+*                   the connection pool but not enough to create the buffer pool.
+*********************************************************************************************************
+*/
+
+void  HTTPsMem_ConnPoolInit (HTTPs_INSTANCE  *p_instance,
+                             HTTPs_ERR       *p_err)
+{
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+           CPU_SIZE_T   octets_rem;
+#endif
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+           CPU_INT16U   val_len;
+#endif
+    const  HTTPs_CFG   *p_cfg;
+           CPU_SIZE_T   octets_reqd;
+           CPU_SIZE_T   pool_size_max;
+           CPU_INT32U   path_len_max;
+           LIB_ERR      err_lib;
+
+
+    p_cfg = p_instance->CfgPtr;
+
+    switch (p_cfg->FS_Type) {
+        case HTTPs_FS_TYPE_NONE:
+             path_len_max = ((HTTPs_CFG_FS_NONE *)p_cfg->FS_CfgPtr)->PathLenMax;
+             break;
+
+        case HTTPs_FS_TYPE_STATIC:
+        case HTTPs_FS_TYPE_DYN:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+             path_len_max = p_instance->FS_PathLenMax;
+#else
+            *p_err = HTTPs_ERR_CFG_INVALID_FS_EN;
+             return;
+#endif
+             break;
+
+        default:
+            *p_err = HTTPs_ERR_CFG_INVALID_FS_TYPE;
+             return;
+    }
+
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* -------------- VALIDATE REM MEM AVAIL -------------- */
+    octets_reqd = (HTTPs_CFG_POOLS_INIT_NBR * sizeof(HTTPs_CONN))
+                + (HTTPs_CFG_POOLS_INIT_NBR * p_cfg->BufLen)
+                + (HTTPs_CFG_POOLS_INIT_NBR * path_len_max);
+
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+    octets_reqd += (HTTPs_CFG_POOLS_INIT_NBR * p_cfg->HostNameLenMax);
+#endif
+
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    if (p_cfg->TokenCfgPtr != DEF_NULL) {                       /* If token parse is enabled, add space for token.      */
+
+
+        octets_reqd += ((HTTPs_CFG_POOLS_INIT_NBR * sizeof(HTTPs_TOKEN_CTRL))
+                    +   (HTTPs_CFG_POOLS_INIT_NBR * (p_cfg->TokenCfgPtr->ValLenMax
+                                                     + HTTP_STR_BUF_TOP_SPACE_REQ_MIN
+                                                     + HTTP_STR_BUF_END_SPACE_REQ_MIN)));
+    }
+#endif
+
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+    if (p_cfg->QueryStrCfgPtr != DEF_NULL) {
+        octets_reqd += ((HTTPs_CFG_POOLS_INIT_NBR * sizeof(HTTPs_KEY_VAL))
+                    +   (HTTPs_CFG_POOLS_INIT_NBR * p_cfg->QueryStrCfgPtr->KeyLenMax)
+                    +   (HTTPs_CFG_POOLS_INIT_NBR * p_cfg->QueryStrCfgPtr->ValLenMax));
+    }
+#endif
+
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    if (p_cfg->FormCfgPtr != DEF_NULL) {                        /* If Form is enabled, add space for key/value pair.    */
+        octets_reqd += ((HTTPs_CFG_POOLS_INIT_NBR * sizeof(HTTPs_KEY_VAL))
+                    +   (HTTPs_CFG_POOLS_INIT_NBR * p_cfg->FormCfgPtr->KeyLenMax)
+                    +   (HTTPs_CFG_POOLS_INIT_NBR * p_cfg->FormCfgPtr->ValLenMax));
+
+#if (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED)
+        if (p_cfg->FormCfgPtr->MultipartEn == DEF_ENABLED) {    /* If multipart is enabled, add boundary space.         */
+            octets_reqd += (HTTPs_CFG_POOLS_INIT_NBR * HTTPs_FORM_BOUNDARY_STR_LEN_MAX);
+        }
+#endif
+    }
+#endif
+
+                                                                /* Get and validate rem space avail on heap.            */
+    octets_rem = Mem_SegRemSizeGet(HTTPs_MemSegPtr,
+                                   sizeof(CPU_SIZE_T),
+                                   DEF_NULL,
+                                  &err_lib);
+
+    if (octets_rem < octets_reqd) {
+       *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+        return;
+    }
+#endif
+
+                                                                /* ----------------- CREATE CONN POOL ----------------- */
+    Mem_DynPoolCreate("HTTPs Conn Pool",
+                      &p_instance->PoolConn,
+                       HTTPs_MemSegPtr,
+                       sizeof(HTTPs_CONN),
+                       sizeof(CPU_SIZE_T),
+                       HTTPs_CFG_POOLS_INIT_NBR,
+                       p_cfg->ConnNbrMax,
+                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+             return;
+
+        default:
+            *p_err = HTTPs_ERR_INIT_POOL_CONN;
+             return;
+    }
+
+                                                                /* ----------------- CREATE BUF POOL ------------------ */
+    Mem_DynPoolCreate("HTTPs Conn Buffer Pool",
+                      &p_instance->PoolBuf,
+                       HTTPs_MemSegPtr,
+                       p_cfg->BufLen,
+                       sizeof(CPU_SIZE_T),
+                       HTTPs_CFG_POOLS_INIT_NBR,
+                       p_cfg->ConnNbrMax,
+                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+             return;
+
+        default:
+            *p_err = HTTPs_ERR_INIT_POOL_BUF;
+             return;
+    }
+
+                                                                /* --------------- CREATE PATH POOL --------------- */
+    Mem_DynPoolCreate("HTTPs Conn Path Pool",
+                      &p_instance->PoolPath,
+                       HTTPs_MemSegPtr,
+                       path_len_max,
+                       sizeof(CPU_SIZE_T),
+                       HTTPs_CFG_POOLS_INIT_NBR,
+                       p_cfg->ConnNbrMax,
+                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+             return;
+
+        default:
+            *p_err = HTTPs_ERR_INIT_POOL_PATH;
+             return;
+    }
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+                                                                /* ----------------- CREATE HOST POOL ----------------- */
+    Mem_DynPoolCreate("HTTPs Conn Host Pool",
+                      &p_instance->PoolHost,
+                       HTTPs_MemSegPtr,
+                       p_cfg->HostNameLenMax,
+                       sizeof(CPU_SIZE_T),
+                       HTTPs_CFG_POOLS_INIT_NBR,
+                       p_cfg->ConnNbrMax,
+                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+             return;
+
+        default:
+            *p_err = HTTPs_ERR_INIT_POOL_HOST;
+             return;
+    }
+#endif
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    if (p_cfg->TokenCfgPtr != DEF_NULL) {
+
+        if (p_cfg->TokenCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+            pool_size_max = p_cfg->ConnNbrMax * p_cfg->TokenCfgPtr->NbrPerConnMax;
+        } else {
+            pool_size_max = LIB_MEM_BLK_QTY_UNLIMITED;
+        }
+
+                                                                /* ---------------- CREATE TOKEN POOL ----------------- */
+        Mem_DynPoolCreate("HTTPs Token Ctrl Pool",
+                          &p_instance->PoolTokenCtrl,
+                           HTTPs_MemSegPtr,
+                           sizeof(HTTPs_TOKEN_CTRL),
+                           sizeof(CPU_SIZE_T),
+                           HTTPs_CFG_POOLS_INIT_NBR,
+                           pool_size_max,
+                          &err_lib);
+        switch (err_lib) {
+            case LIB_MEM_ERR_NONE:
+                 break;
+
+            case LIB_MEM_ERR_SEG_OVF:
+                *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+                 return;
+
+            default:
+                *p_err = HTTPs_ERR_INIT_POOL_TOKEN;
+                 return;
+        }
+
+                                                                /* -------------- CREATE TOKEN VAL POOL --------------- */
+        val_len = p_cfg->TokenCfgPtr->ValLenMax + HTTP_STR_BUF_TOP_SPACE_REQ_MIN + HTTP_STR_BUF_END_SPACE_REQ_MIN;
+
+        Mem_DynPoolCreate("HTTPs Token Val Pool",
+                          &p_instance->PoolTokenVal,
+                           HTTPs_MemSegPtr,
+                           val_len,
+                           sizeof(CPU_SIZE_T),
+                           HTTPs_CFG_POOLS_INIT_NBR,
+                           pool_size_max,
+                          &err_lib);
+        switch (err_lib) {
+            case LIB_MEM_ERR_NONE:
+                 break;
+
+            case LIB_MEM_ERR_SEG_OVF:
+                *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+                 return;
+
+            default:
+                *p_err = HTTPs_ERR_INIT_POOL_TOKEN_VAL;
+                 return;
+        }
+    }
+#endif
+
+#if ((HTTPs_CFG_FORM_EN      == DEF_ENABLED) || \
+     (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED))
+
+    pool_size_max = 0;
+
+    if (p_cfg->FormCfgPtr != DEF_NULL) {
+        if (p_cfg->FormCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+            pool_size_max = p_cfg->ConnNbrMax * p_cfg->FormCfgPtr->NbrPerConnMax;
+        } else {
+            pool_size_max = LIB_MEM_BLK_QTY_UNLIMITED;
+        }
+    }
+
+    if (p_cfg->QueryStrCfgPtr != DEF_NULL) {
+        if ((p_cfg->QueryStrCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) &&
+            (pool_size_max                        != LIB_MEM_BLK_QTY_UNLIMITED)){
+            pool_size_max += p_cfg->ConnNbrMax * p_cfg->QueryStrCfgPtr->NbrPerConnMax;
+        } else {
+            pool_size_max = LIB_MEM_BLK_QTY_UNLIMITED;
+        }
+    }
+
+    if ((p_cfg->FormCfgPtr     != DEF_NULL) ||
+        (p_cfg->QueryStrCfgPtr != DEF_NULL)) {
+                                                                /* ------------- CREATE KEY-VALUE BLK POOL ------------ */
+        Mem_DynPoolCreate("HTTPs Key-Val Blk Pool",
+                          &p_instance->PoolKeyVal,
+                           HTTPs_MemSegPtr,
+                           sizeof(HTTPs_KEY_VAL),
+                           sizeof(CPU_SIZE_T),
+                           HTTPs_CFG_POOLS_INIT_NBR,
+                           pool_size_max,
+                          &err_lib);
+        switch (err_lib) {
+            case LIB_MEM_ERR_NONE:
+                 break;
+
+            case LIB_MEM_ERR_SEG_OVF:
+                *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+                 return;
+
+            default:
+                *p_err = HTTPs_ERR_INIT_POOL_KEY_VAL;
+                 return;
+        }
+    }
+#endif
+
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+    if (p_cfg->QueryStrCfgPtr != DEF_NULL) {
+
+        if (p_cfg->QueryStrCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+            pool_size_max = p_cfg->ConnNbrMax * p_cfg->QueryStrCfgPtr->NbrPerConnMax;
+        } else {
+            pool_size_max = LIB_MEM_BLK_QTY_UNLIMITED;
+        }
+                                                                /* -------- CREATE QUERY STRING KEY STRING POOL ------- */
+        Mem_DynPoolCreate("HTTPs Query Str Key Pool",
+                          &p_instance->PoolQueryStrKeyStr,
+                           HTTPs_MemSegPtr,
+                           p_cfg->QueryStrCfgPtr->KeyLenMax,
+                           sizeof(CPU_SIZE_T),
+                           HTTPs_CFG_POOLS_INIT_NBR,
+                           pool_size_max,
+                          &err_lib);
+        switch (err_lib) {
+            case LIB_MEM_ERR_NONE:
+                 break;
+
+            case LIB_MEM_ERR_SEG_OVF:
+                *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+                 return;
+
+            default:
+                *p_err = HTTPs_ERR_INIT_POOL_QUERY_STR_KEY;
+                 return;
+        }
+
+                                                                /* ------- CREATE QUERY STRING VAL STRING POOL -------- */
+        Mem_DynPoolCreate("HTTPs Query String Val Pool",
+                          &p_instance->PoolQueryStrValStr,
+                           HTTPs_MemSegPtr,
+                           p_cfg->QueryStrCfgPtr->ValLenMax,
+                           sizeof(CPU_SIZE_T),
+                           HTTPs_CFG_POOLS_INIT_NBR,
+                           pool_size_max,
+                          &err_lib);
+        switch (err_lib) {
+            case LIB_MEM_ERR_NONE:
+                 break;
+
+            case LIB_MEM_ERR_SEG_OVF:
+                *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+                 return;
+
+            default:
+                *p_err = HTTPs_ERR_INIT_POOL_QUERY_STR_VAL;
+                 return;
+        }
+    }
+#endif
+
+
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    if (p_cfg->FormCfgPtr != DEF_NULL) {
+
+        if (p_cfg->FormCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+            pool_size_max = p_cfg->ConnNbrMax * p_cfg->FormCfgPtr->NbrPerConnMax;
+        } else {
+            pool_size_max = LIB_MEM_BLK_QTY_UNLIMITED;
+        }
+
+                                                                /* ------------ CREATE FORM KEY STRING POOL ----------- */
+        Mem_DynPoolCreate("HTTPs Form Key Pool",
+                          &p_instance->PoolFormKeyStr,
+                           HTTPs_MemSegPtr,
+                           p_cfg->FormCfgPtr->KeyLenMax,
+                           sizeof(CPU_SIZE_T),
+                           HTTPs_CFG_POOLS_INIT_NBR,
+                           pool_size_max,
+                          &err_lib);
+        switch (err_lib) {
+            case LIB_MEM_ERR_NONE:
+                 break;
+
+            case LIB_MEM_ERR_SEG_OVF:
+                *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+                 return;
+
+            default:
+                *p_err = HTTPs_ERR_INIT_POOL_FORM_KEY;
+                 return;
+        }
+
+                                                                /* ----------- CREATE FORM VAL STRING POOL ------------ */
+        Mem_DynPoolCreate("HTTPs Form Val Pool",
+                          &p_instance->PoolFormValStr,
+                           HTTPs_MemSegPtr,
+                           p_cfg->FormCfgPtr->ValLenMax,
+                           sizeof(CPU_SIZE_T),
+                           HTTPs_CFG_POOLS_INIT_NBR,
+                           pool_size_max,
+                          &err_lib);
+        switch (err_lib) {
+            case LIB_MEM_ERR_NONE:
+                 break;
+
+            case LIB_MEM_ERR_SEG_OVF:
+                *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+                 return;
+
+            default:
+                *p_err = HTTPs_ERR_INIT_POOL_FORM_VAL;
+                 return;
+        }
+
+#if (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED)
+        if (p_cfg->FormCfgPtr->MultipartEn == DEF_ENABLED) {
+                                                                /* ------------- CREATE FORM BOUNDARY POOL ------------ */
+            Mem_DynPoolCreate("HTTPs Form Boundary Pool",
+                              &p_instance->PoolFormBoundary,
+                               HTTPs_MemSegPtr,
+                               HTTPs_FORM_BOUNDARY_STR_LEN_MAX,
+                               sizeof(CPU_SIZE_T),
+                               HTTPs_CFG_POOLS_INIT_NBR,
+                               p_cfg->ConnNbrMax,
+                              &err_lib);
+            switch (err_lib) {
+                case LIB_MEM_ERR_NONE:
+                     break;
+
+                case LIB_MEM_ERR_SEG_OVF:
+                    *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+                     return;
+
+                default:
+                    *p_err = HTTPs_ERR_INIT_POOL_FORM_BOUNDARY;
+                     return;
+            }
+        }
+#endif
+
+    }
+#endif
+
+
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+    if (p_cfg->HdrRxCfgPtr != DEF_NULL) {
+                                                                /* ------------- INIT REQ HDR FIELD POOL -------------- */
+        HTTPsMem_ReqHdrPoolInit(p_instance,
+                                p_err);
+        if (*p_err != HTTPs_ERR_NONE) {
+             return;
+        }
+    }
+#endif
+
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+    if (p_cfg->HdrTxCfgPtr != DEF_NULL) {
+                                                                /* -------------- INIT RESP HDR FIELD POOL ------------ */
+        HTTPsMem_RespHdrPoolInit(p_instance,
+                                 p_err);
+        if (*p_err != HTTPs_ERR_NONE) {
+             return;
+        }
+    }
+#endif
+
+   (void)&octets_reqd;
+   (void)&pool_size_max;
+
+   *p_err = HTTPs_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsMem_ConnGet()
+*
+* Description : (1) Acquire a new connection:
+*
+*                   (a) Acquire connection block
+*                   (b) Acquire buffer block
+*                   (c) Update connections list
+*                   (d) Initialize connection parameters
+*
+* Argument(s) : p_instance      Pointer to the instance used to acquire a connection.
+*               ----------      Argument validated in HTTPs_InstanceStart().
+*
+*               sock_id         Socket ID accepted.
+*
+*               client_addr     Client address accepted.
+*
+* Return(s)   : Pointer to the connection, if no error(s).
+*
+*               Null pointer,              otherwise.
+*
+* Caller(s)   : HTTPsSock_ConnAccept().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+HTTPs_CONN  *HTTPsMem_ConnGet (HTTPs_INSTANCE  *p_instance,
+                               NET_SOCK_ID      sock_id,
+                               NET_SOCK_ADDR    client_addr)
+{
+    const  HTTPs_CFG             *p_cfg;
+           HTTPs_CONN            *p_conn;
+           HTTPs_CONN            *p_conn_item;
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+           HTTPs_INSTANCE_ERRS   *p_ctr_err;
+           LIB_ERR                err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    p_cfg = p_instance->CfgPtr;
+
+                                                                /* ----------------- ACQUIRE CONN BLK ----------------- */
+    p_conn = (HTTPs_CONN *)Mem_DynPoolBlkGet(&p_instance->PoolConn,
+                                             &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             Mem_Clr(p_conn, sizeof(HTTPs_CONN));               /* Invalidate pre-used memory                           */
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrPoolMemSpaceCtr);
+             goto exit;
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrPoolEmptyCtr);
+             goto exit;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrPoolLibGetCtr);
+             goto exit;
+    }
+
+                                                                /* ----------------- ACQUIRE BUF BLK ------------------ */
+    p_conn->BufPtr = (CPU_CHAR *)Mem_DynPoolBlkGet(&p_instance->PoolBuf,
+                                                   &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrBufPoolMemSpaceCtr);
+             goto exit_release_conn;
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrBufPoolEmptyCtr);
+             goto exit_release_conn;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrBufPoolLibGetCtr);
+             goto exit_release_conn;
+    }
+
+                                                                /* ----------------- ACQUIRE PATH BLK ----------------- */
+    p_conn->PathPtr = (CPU_CHAR *)Mem_DynPoolBlkGet(&p_instance->PoolPath,
+                                                    &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrPathPoolMemSpaceCtr);
+             goto exit_release_buf;
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrPathPoolEmptyCtr);
+             goto exit_release_buf;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrPathPoolLibGetCtr);
+             goto exit_release_buf;
+    }
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+                                                                /* ----------------- ACQUIRE HOST BLK ----------------- */
+    p_conn->HostPtr = (CPU_CHAR *)Mem_DynPoolBlkGet(&p_instance->PoolHost,
+                                                    &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+             HTTPs_ERR_INC(p_ctr_err->Host_ErrPoolMemSpaceCtr);
+             goto exit_release_path;
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             HTTPs_ERR_INC(p_ctr_err->Host_ErrPoolEmptyCtr);
+             goto exit_release_path;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Host_ErrPoolLibGetCtr);
+             goto exit_release_path;
+    }
+#endif
+
+
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+    if (p_cfg->FormCfgPtr != DEF_NULL) {
+
+        if (p_cfg->FormCfgPtr->MultipartEn == DEF_ENABLED) {
+                                                                /* ------------- ACQUIRE FORM BOUNDARY BLK ------------ */
+            p_conn->FormBoundaryPtr = (CPU_CHAR *)Mem_DynPoolBlkGet(&p_instance->PoolFormBoundary,
+                                                                    &err_lib);
+            switch (err_lib) {
+                case LIB_MEM_ERR_NONE:
+                     break;
+
+                case LIB_MEM_ERR_SEG_OVF:
+                    HTTPs_ERR_INC(p_ctr_err->Req_ErrFormBoundaryPoolMemSpaceCtr);
+                     goto exit_release_host;
+
+                case LIB_MEM_ERR_POOL_EMPTY:
+                     HTTPs_ERR_INC(p_ctr_err->Req_ErrFormBoundaryPoolEmptyCtr);
+                     goto exit_release_host;
+
+                default:
+                     HTTPs_ERR_INC(p_ctr_err->Req_ErrFormBoundaryPoolLibGetCtr);
+                     goto exit_release_host;
+            }
+        }
+    }
+#endif
+
+                                                                /* ------------ UPDATE INSTANCE CONN LIST ------------- */
+    if (p_instance->ConnFirstPtr == DEF_NULL) {
+        p_instance->ConnFirstPtr = p_conn;
+        p_instance->ConnLastPtr  = p_conn;
+
+    } else if (p_instance->ConnFirstPtr == p_instance->ConnLastPtr) {
+        p_conn_item              = p_instance->ConnFirstPtr;
+        p_conn_item->ConnNextPtr = p_conn;
+        p_conn->ConnPrevPtr      = p_conn_item;
+        p_instance->ConnLastPtr  = p_conn;
+
+    } else {
+        p_conn_item = p_instance->ConnLastPtr;
+        p_conn_item->ConnNextPtr = p_conn;
+        p_conn->ConnPrevPtr      = p_conn_item;
+        p_instance->ConnLastPtr  = p_conn;
+    }
+
+                                                                /* ----------------- INIT CONN PARAM ------------------ */
+    p_conn->SockID             =  sock_id;
+    p_conn->SockState          =  HTTPs_SOCK_STATE_RX;
+    p_conn->SockFlags          =  HTTPs_FLAG_NONE;
+    p_conn->ClientAddr         =  client_addr;
+
+    p_conn->ErrCode            =  HTTPs_ERR_NONE;
+    p_conn->State              =  HTTPs_CONN_STATE_UNKNOWN;
+    p_conn->Flags              =  HTTPs_FLAG_INIT;
+
+    p_conn->Method             =  HTTP_METHOD_UNKNOWN;
+    p_conn->ReqContentType     =  HTTP_CONTENT_TYPE_UNKNOWN;
+    p_conn->ReqContentLen      =  0;
+    p_conn->ReqContentLenRxd   =  0;
+
+    p_conn->ProtocolVer        =  HTTP_PROTOCOL_VER_1_1;
+    p_conn->DataPtr            =  DEF_NULL;
+    p_conn->DataLen            =  0u;
+    p_conn->DataTxdLen         =  0u;
+    p_conn->DataFixPosCur      =  0u;
+
+    switch (p_cfg->FS_Type) {
+        case HTTPs_FS_TYPE_NONE:
+             p_conn->PathLenMax = ((HTTPs_CFG_FS_NONE *)p_cfg->FS_CfgPtr)->PathLenMax;
+             break;
+
+        case HTTPs_FS_TYPE_STATIC:
+        case HTTPs_FS_TYPE_DYN:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+             p_conn->PathLenMax = p_instance->FS_PathLenMax;
+#else
+             HTTPs_ERR_INC(p_ctr_err->FS_ErrNoEnCtr);
+             goto exit_release_host;
+#endif
+             break;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->FS_ErrTypeInvalidCtr);
+             goto exit_release_host;
+    }
+
+    p_conn->StatusCode         =  HTTP_STATUS_OK;
+    p_conn->RespBodyDataType   =  HTTPs_BODY_DATA_TYPE_NONE;
+    p_conn->RespContentType    =  HTTP_CONTENT_TYPE_UNKNOWN;
+
+    p_conn->BufLen             =  p_cfg->BufLen;
+    p_conn->RxBufPtr           =  p_conn->BufPtr;
+    p_conn->TxBufPtr           =  p_conn->BufPtr;
+
+    p_conn->RxBufLenRem        =  0u;
+    p_conn->RxDataLen          =  0u;
+    p_conn->TxDataLen          =  0u;
+
+    p_conn->ConnDataPtr        =  DEF_NULL;
+
+    p_conn->ConnNextPtr        =  DEF_NULL;
+
+    p_instance->ConnActiveCtr++;
+
+    HTTPs_STATS_INC(p_ctr_stats->Conn_StatAcquiredCtr);
+
+    goto exit;
+
+exit_release_host:
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+    Mem_DynPoolBlkFree(&p_instance->PoolHost,                   /* Release host previously acquired.                    */
+                        p_conn->HostPtr,
+                       &err_lib);
+    p_conn->HostPtr = DEF_NULL;
+
+exit_release_path:
+#endif
+    Mem_DynPoolBlkFree(&p_instance->PoolPath,                   /* Release path previously acquired.                    */
+                        p_conn->PathPtr,
+                       &err_lib);
+    p_conn->PathPtr = DEF_NULL;
+
+exit_release_buf:
+    Mem_DynPoolBlkFree(&p_instance->PoolBuf,                    /* Release buf previously acquired.                     */
+                        p_conn->BufPtr,
+                       &err_lib);
+    p_conn->BufPtr = DEF_NULL;
+
+exit_release_conn:
+    Mem_DynPoolBlkFree(&p_instance->PoolConn,                   /* Release conn previously acquired.                    */
+                        p_conn,
+                       &err_lib);
+    p_conn = DEF_NULL;
+
+exit:
+    return (p_conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsMem_ConnRelease()
+*
+* Description : (1) Release connection:
+*
+*                   (a) Update instance connection list
+*                   (b) Release buffer     block
+*                   (c) Release connection block
+*
+* Argument(s) : p_instance  Pointer to the instance structure variable.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ----------  Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsSock_ConnAccept(),
+*               HTTPsConn_Close().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : (2) Opened socket MUST be closed before calling this function.
+*********************************************************************************************************
+*/
+
+void  HTTPsMem_ConnRelease (HTTPs_INSTANCE  *p_instance,
+                            HTTPs_CONN      *p_conn)
+{
+           HTTPs_CONN            *p_conn_item_prev;
+           HTTPs_CONN            *p_conn_item_next;
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+           HTTPs_INSTANCE_ERRS   *p_ctr_err;
+           LIB_ERR                err_lib;
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+    const  HTTPs_CFG             *p_cfg;
+
+
+    p_cfg = p_instance->CfgPtr;
+#endif
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+                                                                /* ------------ UPDATE INSTANCE CONN LIST ------------- */
+    if (p_instance->ConnFirstPtr == DEF_NULL) {
+        HTTPs_STATS_INC(p_ctr_err->Conn_ErrFreePtrNullCtr);
+
+    } else if (p_conn == p_instance->ConnFirstPtr) {
+        if (p_conn->ConnNextPtr != DEF_NULL) {
+            p_conn_item_next              = p_conn->ConnNextPtr;
+            p_instance->ConnFirstPtr      = p_conn_item_next;
+            p_conn_item_next->ConnPrevPtr = DEF_NULL;
+
+        } else {
+            p_instance->ConnFirstPtr = DEF_NULL;
+            p_instance->ConnLastPtr  = DEF_NULL;
+        }
+
+    } else if (p_conn == p_instance->ConnLastPtr) {
+        p_instance->ConnLastPtr              = p_conn->ConnPrevPtr;
+        p_instance->ConnLastPtr->ConnNextPtr = DEF_NULL;
+
+    } else {
+        p_conn_item_next = p_conn->ConnNextPtr;
+        p_conn_item_prev = p_conn->ConnPrevPtr;
+        if (p_conn_item_prev != DEF_NULL) {
+            p_conn_item_prev->ConnNextPtr = p_conn_item_next;
+        }
+
+        if (p_conn_item_next != DEF_NULL) {
+            p_conn_item_next->ConnPrevPtr = p_conn_item_prev;
+        }
+    }
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+                                                                /* ----------------- RELEASE HOST BLK ----------------- */
+    Mem_DynPoolBlkFree(&p_instance->PoolHost,
+                        p_conn->HostPtr,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        HTTPs_ERR_INC(p_ctr_err->Host_ErrPoolLibFreeCtr);
+    }
+
+    p_conn->HostPtr = DEF_NULL;
+#endif
+
+                                                                /* ----------------- RELEASE PATH BLK ----------------- */
+    Mem_DynPoolBlkFree(&p_instance->PoolPath,
+                        p_conn->PathPtr,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        HTTPs_ERR_INC(p_ctr_err->Conn_ErrPathPoolLibFreeCtr);
+    }
+
+    p_conn->PathPtr = DEF_NULL;
+
+                                                                /* ----------------- RELEASE BUF BLK ------------------ */
+    Mem_DynPoolBlkFree(&p_instance->PoolBuf,
+                        p_conn->BufPtr,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        HTTPs_ERR_INC(p_ctr_err->Conn_ErrBufPoolLibFreeCtr);
+    }
+
+    p_conn->BufPtr = DEF_NULL;
+
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+    if (p_cfg->FormCfgPtr         != DEF_NULL) {
+
+        if (p_cfg->FormCfgPtr->MultipartEn == DEF_ENABLED) {
+                                                                /* ------------- RELEASE FORM BOUDNARY BLK ------------ */
+            Mem_DynPoolBlkFree(&p_instance->PoolFormBoundary,
+                                p_conn->FormBoundaryPtr,
+                               &err_lib);
+            if (err_lib != LIB_MEM_ERR_NONE) {
+                HTTPs_ERR_INC(p_ctr_err->Req_ErrFormBoundaryPoolLibFreeCtr);
+            }
+
+            p_conn->FormBoundaryPtr = DEF_NULL;
+        }
+    }
+#endif
+
+                                                                /* ----------------- RELEASE CONN BLK ----------------- */
+    Mem_DynPoolBlkFree(&p_instance->PoolConn,
+                        p_conn,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        HTTPs_ERR_INC(p_ctr_err->Conn_ErrPoolLibFreeCtr);
+    }
+
+
+    HTTPs_STATS_INC(p_ctr_stats->Conn_StatReleasedCtr);
+
+    p_instance->ConnActiveCtr--;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsMem_ConnClr()
+*
+* Description : (1) Clear objects related to an HTTP request on the given connection.
+*
+*                   (a) Release Token blocks
+*                   (b) Release Key-Value blocks
+*                   (c) Release Header blocks
+*
+*
+* Argument(s) : p_instance  Pointer to the instance structure variable.
+*
+*               p_conn      Pointer to the connection.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsConn_Process().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  HTTPsMem_ConnClr (HTTPs_INSTANCE  *p_instance,
+                        HTTPs_CONN      *p_conn)
+{
+    const  HTTPs_CFG            *p_cfg = p_instance->CfgPtr;
+           HTTPs_INSTANCE_ERRS  *p_ctr_err;
+
+
+    HTTPs_SET_PTR_ERRS(p_ctr_err, p_instance);
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    if (p_conn->TokenCtrlPtr != DEF_NULL) {
+        HTTPsMem_TokenRelease(p_instance, p_conn);
+        HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenClrNotEmptyCtr);
+    }
+#endif
+
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+    HTTPsMem_QueryStrKeyValBlkReleaseAll(p_instance, p_conn);
+#endif
+
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    HTTPsMem_FormKeyValBlkReleaseAll(p_instance, p_conn);
+#endif
+
+#if ((HTTPs_CFG_HDR_RX_EN == DEF_ENABLED) || \
+     (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED))
+
+    switch (p_conn->HdrType) {
+        case HTTPs_HDR_TYPE_REQ:
+                                                                /* ---------- VALIDATE REQ HDR POOL IS EMPTY ---------- */
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+             while (p_conn->HdrListPtr != DEF_NULL) {
+                 HTTPsMem_ReqHdrRelease(p_instance,
+                                        p_conn);
+             }
+#endif
+             break;
+
+        case HTTPs_HDR_TYPE_RESP:
+                                                                /* --------- VALIDATE RESP HDR POOL IS EMPTY ---------- */
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+             while (p_conn->HdrListPtr != DEF_NULL) {
+                 HTTPsMem_RespHdrRelease(p_instance,
+                                         p_conn);
+             }
+#endif
+             break;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Conn_ErrHdrTypeInvalidCtr);
+             break;
+    }
+
+#endif
+
+                                                                /* ----------------- INIT CONN PARAM ------------------ */
+    p_conn->SockState          =  HTTPs_SOCK_STATE_RX;
+    p_conn->SockFlags          =  HTTPs_FLAG_NONE;
+
+    p_conn->ErrCode            =  HTTPs_ERR_NONE;
+    p_conn->State              =  HTTPs_CONN_STATE_UNKNOWN;
+    p_conn->Flags              =  HTTPs_FLAG_INIT;
+
+    p_conn->Method             =  HTTP_METHOD_UNKNOWN;
+    p_conn->ReqContentType     =  HTTP_CONTENT_TYPE_UNKNOWN;
+    p_conn->ReqContentLen      =  0;
+    p_conn->ReqContentLenRxd   =  0;
+
+    p_conn->ProtocolVer        =  HTTP_PROTOCOL_VER_1_1;
+    p_conn->DataPtr            =  DEF_NULL;
+    p_conn->DataLen            =  0u;
+    p_conn->DataTxdLen         =  0u;
+    p_conn->DataFixPosCur      =  0u;
+
+    switch (p_cfg->FS_Type) {
+        case HTTPs_FS_TYPE_NONE:
+             p_conn->PathLenMax = ((HTTPs_CFG_FS_NONE *)p_cfg->FS_CfgPtr)->PathLenMax;
+             break;
+
+        case HTTPs_FS_TYPE_STATIC:
+        case HTTPs_FS_TYPE_DYN:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+             p_conn->PathLenMax = p_instance->FS_PathLenMax;
+#else
+             HTTPs_ERR_INC(p_ctr_err->FS_ErrNoEnCtr);
+#endif
+             break;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->FS_ErrTypeInvalidCtr);
+             break;
+    }
+
+    p_conn->StatusCode         =  HTTP_STATUS_OK;
+    p_conn->RespBodyDataType   =  HTTPs_BODY_DATA_TYPE_NONE;
+    p_conn->RespContentType    =  HTTP_CONTENT_TYPE_UNKNOWN;
+
+    p_conn->RxBufPtr           =  p_conn->BufPtr;
+    p_conn->TxBufPtr           =  p_conn->BufPtr;
+
+    p_conn->RxBufLenRem        =  0u;
+    p_conn->RxDataLen          =  0u;
+    p_conn->TxDataLen          =  0u;
+
+   (void)&p_ctr_err;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsMem_TokenGet()
+*
+* Description : (1) Acquire a new token block:
+*
+*                   (a) Acquire token block
+*                   (b) Acquire token value block
+*                   (c) Update connection token list
+*
+* Argument(s) : p_instance  Pointer to the instance used to acquire a connection.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : Pointer to token, if no error(s).
+*
+*               Null pointer,     otherwise.
+*
+* Caller(s)   : HTTPs_RespFileTransferChunked().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+CPU_BOOLEAN  HTTPsMem_TokenGet (HTTPs_INSTANCE  *p_instance,
+                                HTTPs_CONN      *p_conn,
+                                HTTPs_ERR       *p_err)
+{
+    HTTPs_TOKEN_CTRL       *p_token;
+    HTTPs_INSTANCE_STATS   *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS    *p_ctr_err;
+    CPU_BOOLEAN             result;
+    LIB_ERR                 err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+                                                                /* ---------------- ACQUIRE TOKEN BLK ----------------- */
+    p_token = (HTTPs_TOKEN_CTRL *)Mem_DynPoolBlkGet(&p_instance->PoolTokenCtrl,
+                                                    &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+             result = DEF_FAIL;
+            *p_err  = HTTPs_ERR_MEM_NO_SPACE;
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenPoolMemSpaceCtr);
+             goto exit;
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             result = DEF_FAIL;
+            *p_err  = HTTPs_ERR_TOKEN_POOL_EMPTY;
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenPoolEmptyCtr);
+             goto exit;
+
+        default:
+             result = DEF_FAIL;
+            *p_err  = HTTPs_ERR_TOKEN_POOL_LIB_FAULT;
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenPoolLibGetCtr);
+             goto exit;
+    }
+
+                                                                /* -------------- ACQUIRE TOKEN VAL BLK --------------- */
+    p_token->ValPtr = (CPU_CHAR *)Mem_DynPoolBlkGet(&p_instance->PoolTokenVal,
+                                                    &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+             result = DEF_FAIL;
+            *p_err  = HTTPs_ERR_MEM_NO_SPACE;
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenValPoolMemSpaceCtr);
+             goto exit_release_blk;
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             result = DEF_FAIL;
+            *p_err  = HTTPs_ERR_TOKEN_POOL_EMPTY;
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenValPoolEmptyCtr);
+             goto exit_release_blk;
+
+        default:
+             result = DEF_FAIL;
+            *p_err  = HTTPs_ERR_TOKEN_POOL_LIB_FAULT;
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenValPoolLibGetCtr);
+             goto exit_release_blk;
+    }
+
+                                                                /* -------------- UPDATE CONN TOKEN LIST -------------- */
+    p_conn->TokenCtrlPtr = p_token;
+
+    HTTPs_STATS_INC(p_ctr_stats->Resp_StatTokenAcquiredCtr);
+
+    result = DEF_OK;
+   *p_err  = HTTPs_ERR_NONE;
+
+    goto exit;
+
+
+exit_release_blk:
+    Mem_DynPoolBlkFree(&p_instance->PoolTokenCtrl,              /* Release token previously acquired.                   */
+                        p_token,
+                       &err_lib);
+
+exit:
+    return (result);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsMem_TokenRelease()
+*
+* Description : (1) Release token block:
+*
+*                   (a) Update connection token list
+*                   (b) Release token value
+*                   (c) Release token block
+*
+* Argument(s) : p_instance  Pointer to the instance used to acquire a connection.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_Close(),
+*               HTTPsResp_Handle().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+void  HTTPsMem_TokenRelease (HTTPs_INSTANCE  *p_instance,
+                             HTTPs_CONN      *p_conn)
+{
+    HTTPs_INSTANCE_STATS   *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS    *p_ctr_err;
+    LIB_ERR                 err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+                                                                /* -------------- RELEASE TOKEN VAL BLK --------------- */
+    Mem_DynPoolBlkFree(&p_instance->PoolTokenVal,
+                        p_conn->TokenCtrlPtr->ValPtr,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenValPoolLibFreeCtr);
+    }
+
+    p_conn->TokenCtrlPtr->ValPtr = DEF_NULL;
+
+                                                                /* ---------------- RELEASE TOKEN BLK ----------------- */
+    Mem_DynPoolBlkFree(&p_instance->PoolTokenCtrl,
+                        p_conn->TokenCtrlPtr,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenPoolLibFreeCtr);
+    }
+
+    p_conn->TokenCtrlPtr = DEF_NULL;
+
+    HTTPs_STATS_INC(p_ctr_stats->Resp_StatTokenReleaseCtr);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsMem_QueryStrKeyValBlkGet()
+*
+* Description : (1) Acquire a new Key-Value Pair block for an HTTP Query String received:
+*
+*                   (a) Acquire Key-Value block
+*                   (b) Acquire Key string block
+*                   (c) Acquire Value string block
+
+*
+* Argument(s) : p_instance  Pointer to the instance used to acquire a connection.
+*                           Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*                           Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : Pointer to the Key-Value block, if no error(s).
+*               Null pointer,                   otherwise.
+*
+* Caller(s)   : HTTPsReq_QueryStrKeyValBlkAdd().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+HTTPs_KEY_VAL  *HTTPsMem_QueryStrKeyValBlkGet (HTTPs_INSTANCE  *p_instance,
+                                               HTTPs_CONN      *p_conn,
+                                               HTTPs_ERR       *p_err)
+{
+    HTTPs_KEY_VAL         *p_key_val;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    LIB_ERR                err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+                                                                /* --------------- ACQUIRE KEY-VAL BLK ---------------- */
+    p_key_val = (HTTPs_KEY_VAL *)Mem_DynPoolBlkGet(&p_instance->PoolKeyVal,
+                                                   &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_MEM_NO_SPACE;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrKeyValPoolMemSpaceCtr);
+             goto exit;
+
+        default:
+            *p_err = HTTPs_ERR_QUERY_STR_POOL_LIB_FAULT;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrKeyValPoolLibGetCtr);
+             goto exit;
+    }
+
+                                                                /* -------------- ACQUIRE KEY STRING BLK -------------- */
+    p_key_val->KeyPtr = (CPU_CHAR *)Mem_DynPoolBlkGet(&p_instance->PoolQueryStrKeyStr,
+                                                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_MEM_NO_SPACE;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrQueryStrKeyPoolMemSpaceCtr);
+             goto exit_release_blk;
+
+        default:
+            *p_err = HTTPs_ERR_QUERY_STR_POOL_LIB_FAULT;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrQueryStrKeyPoolLibGetCtr);
+             goto exit_release_blk;
+    }
+
+                                                                /* -------------- ACQUIRE VAL STRING BLK -------------- */
+    p_key_val->ValPtr = (CPU_CHAR *)Mem_DynPoolBlkGet(&p_instance->PoolQueryStrValStr,
+                                                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_MEM_NO_SPACE;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrQueryStrValPoolMemSpaceCtr);
+             goto exit_release_key;
+
+        default:
+            *p_err = HTTPs_ERR_QUERY_STR_POOL_LIB_FAULT;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrQueryStrValPoolLibGetCtr);
+             goto exit_release_key;
+    }
+
+    p_conn->QueryStrBlkAcquiredCtr++;
+
+    HTTPs_STATS_INC(p_ctr_stats->Req_StatKeyValAcquiredCtr);
+
+   *p_err = HTTPs_ERR_NONE;
+
+    goto exit;
+
+
+exit_release_key:
+    Mem_DynPoolBlkFree(&p_instance->PoolQueryStrKeyStr,         /* Key String block previously acquired.                */
+                        p_key_val->KeyPtr,
+                       &err_lib);
+    p_key_val->KeyPtr = DEF_NULL;
+
+exit_release_blk:
+    Mem_DynPoolBlkFree(&p_instance->PoolKeyVal,                 /* Key-Val block previously acquired.                   */
+                        p_key_val,
+                       &err_lib);
+    p_key_val = DEF_NULL;
+
+exit:
+    return (p_key_val);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                HTTPsMem_QueryStrKeyValBlkReleaseAll()
+*
+* Description : (1) Release the entire Key-Value pairs list associated with Query String received:
+*
+*                   (a) Release Key-value value block
+*                   (b) Release Key-value key block
+*                   (c) Release Key-value block
+*
+*
+* Argument(s) : p_instance  Pointer to the instance used to acquire a connection.
+*                           Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*                           Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsConn_Close(),
+*               HTTPsMem_ConnClr().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+void  HTTPsMem_QueryStrKeyValBlkReleaseAll (HTTPs_INSTANCE  *p_instance,
+                                            HTTPs_CONN      *p_conn)
+{
+    HTTPs_KEY_VAL         *p_key_val;
+    HTTPs_KEY_VAL         *p_key_val_next;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    LIB_ERR                err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    p_key_val = p_conn->QueryStrListPtr;
+    while (p_key_val != DEF_NULL) {
+
+        p_key_val_next     = p_key_val->NextPtr;
+        p_key_val->NextPtr = DEF_NULL;
+
+                                                                /* ----------------- RELEASE VAL BLK ------------------ */
+        Mem_DynPoolBlkFree(&p_instance->PoolQueryStrValStr,
+                            p_key_val->ValPtr,
+                           &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+            HTTPs_ERR_INC(p_ctr_err->Req_ErrQueryStrValPoolLibFreeCtr);
+        }
+
+        p_key_val->ValPtr = DEF_NULL;
+
+                                                                /* ----------------- RELEASE KEY BLK ------------------ */
+        Mem_DynPoolBlkFree(&p_instance->PoolQueryStrKeyStr,
+                            p_key_val->KeyPtr,
+                           &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+            HTTPs_ERR_INC(p_ctr_err->Req_ErrQueryStrKeyPoolLibFreeCtr);
+        }
+
+        p_key_val->KeyPtr = DEF_NULL;
+
+                                                                /* --------------- RELEASE KEY-VAL BLK ---------------- */
+        Mem_DynPoolBlkFree(&p_instance->PoolKeyVal,
+                            p_key_val,
+                           &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+            HTTPs_ERR_INC(p_ctr_err->Req_ErrKeyValPoolLibFreeCtr);
+        }
+
+        p_key_val = p_key_val_next;
+
+        p_conn->QueryStrBlkAcquiredCtr--;
+
+        HTTPs_STATS_INC(p_ctr_stats->Req_StatKeyValReleaseCtr);
+    }
+
+    p_conn->QueryStrListPtr = DEF_NULL;
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsMem_FormKeyValBlkGet()
+*
+* Description : (1) Acquire a new Key-Value Pair block for an HTTP Form received:
+*
+*                   (a) Acquire Key-Value block
+*                   (b) Acquire Key string block
+*                   (c) Acquire Value string block
+*
+* Argument(s) : p_instance  Pointer to the instance used to acquire a connection.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ----------  Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : Pointer to the Key-Value block, if no error(s).
+*               Null pointer,                   otherwise.
+*
+* Caller(s)   : HTTPsReq_BodyFormAppKeyValBlkAdd(),
+*               HTTPsReq_BodyFormMultipartCtrlParse().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+HTTPs_KEY_VAL  *HTTPsMem_FormKeyValBlkGet (HTTPs_INSTANCE  *p_instance,
+                                           HTTPs_CONN      *p_conn,
+                                           HTTPs_ERR       *p_err)
+{
+    HTTPs_KEY_VAL         *p_key_val;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    LIB_ERR                err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+                                                                /* --------------- ACQUIRE KEY-VAL BLK ---------------- */
+    p_key_val = (HTTPs_KEY_VAL *)Mem_DynPoolBlkGet(&p_instance->PoolKeyVal,
+                                                   &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_MEM_NO_SPACE;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrKeyValPoolMemSpaceCtr);
+             goto exit;
+
+        default:
+            *p_err = HTTPs_ERR_FORM_POOL_LIB_FAULT;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrKeyValPoolLibGetCtr);
+             goto exit;
+    }
+
+                                                                /* -------------- ACQUIRE KEY STRING BLK -------------- */
+    p_key_val->KeyPtr = (CPU_CHAR *)Mem_DynPoolBlkGet(&p_instance->PoolFormKeyStr,
+                                                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_MEM_NO_SPACE;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrFormKeyPoolMemSpaceCtr);
+             goto exit_release_blk;
+
+        default:
+            *p_err = HTTPs_ERR_FORM_POOL_LIB_FAULT;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrFormKeyPoolLibGetCtr);
+             goto exit_release_blk;
+    }
+
+                                                                /* -------------- ACQUIRE VAL STRING BLK -------------- */
+    p_key_val->ValPtr = (CPU_CHAR *)Mem_DynPoolBlkGet(&p_instance->PoolFormValStr,
+                                                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_MEM_NO_SPACE;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrFormValPoolMemSpaceCtr);
+             goto exit_release_key;
+
+        default:
+            *p_err = HTTPs_ERR_FORM_POOL_LIB_FAULT;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrFormValPoolLibGetCtr);
+             goto exit_release_key;
+    }
+
+    p_conn->FormBlkAcquiredCtr++;
+
+    HTTPs_STATS_INC(p_ctr_stats->Req_StatKeyValAcquiredCtr);
+
+   *p_err = HTTPs_ERR_NONE;
+
+    goto exit;
+
+
+exit_release_key:
+    Mem_DynPoolBlkFree(&p_instance->PoolFormKeyStr,             /* Key String block previously acquired.                */
+                        p_key_val->KeyPtr,
+                       &err_lib);
+    p_key_val->KeyPtr = DEF_NULL;
+
+exit_release_blk:
+    Mem_DynPoolBlkFree(&p_instance->PoolKeyVal,                 /* Key-Val block previously acquired.                   */
+                        p_key_val,
+                       &err_lib);
+    p_key_val = DEF_NULL;
+
+exit:
+    return (p_key_val);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPsMem_FormKeyValBlkReleaseAll()
+*
+* Description : (1) Release the entire Key-Value pairs list associated with Form received:
+*
+*                   (a) Release Key-value value block
+*                   (b) Release Key-value key block
+*                   (c) Release Key-value block
+*
+* Argument(s) : p_instance  Pointer to the instance used to acquire a connection.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ----------  Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_Close(),
+*               HTTPsMem_ConnClr().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+void  HTTPsMem_FormKeyValBlkReleaseAll (HTTPs_INSTANCE  *p_instance,
+                                        HTTPs_CONN      *p_conn)
+{
+    HTTPs_KEY_VAL         *p_key_val;
+    HTTPs_KEY_VAL         *p_key_val_next;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    LIB_ERR                err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    p_key_val = p_conn->FormDataListPtr;
+    while (p_key_val != DEF_NULL) {
+
+        p_key_val_next     = p_key_val->NextPtr;
+        p_key_val->NextPtr = DEF_NULL;
+
+                                                                /* ----------------- RELEASE VAL BLK ------------------ */
+        Mem_DynPoolBlkFree(&p_instance->PoolFormValStr,
+                            p_key_val->ValPtr,
+                           &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+            HTTPs_ERR_INC(p_ctr_err->Req_ErrFormValPoolLibFreeCtr);
+        }
+
+        p_key_val->ValPtr = DEF_NULL;
+
+                                                                /* ----------------- RELEASE KEY BLK ------------------ */
+        Mem_DynPoolBlkFree(&p_instance->PoolFormKeyStr,
+                            p_key_val->KeyPtr,
+                           &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+            HTTPs_ERR_INC(p_ctr_err->Req_ErrFormKeyPoolLibFreeCtr);
+        }
+
+        p_key_val->KeyPtr = DEF_NULL;
+
+                                                                /* --------------- RELEASE KEY-VAL BLK ---------------- */
+        Mem_DynPoolBlkFree(&p_instance->PoolKeyVal,
+                            p_key_val,
+                           &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+            HTTPs_ERR_INC(p_ctr_err->Req_ErrKeyValPoolLibFreeCtr);
+        }
+
+        p_key_val = p_key_val_next;
+
+        p_conn->FormBlkAcquiredCtr--;
+
+        HTTPs_STATS_INC(p_ctr_stats->Req_StatKeyValReleaseCtr);
+    }
+
+    p_conn->FormDataListPtr = DEF_NULL;
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsMem_ReqHdrGet()
+*
+* Description : (1) Acquire a new request header block :
+*
+*                   (a) Acquire request header block
+*                   (b) Acquire the buffer block depending of the value data type
+*                   (c) Update request header block
+*                   (d) Initialize header block parameters
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               hdr_field   Type of the request header
+*
+*               val_type    Data type of the request header value
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                            HTTPs_ERR_NONE                         Request header block successfully acquired.
+*
+*                           HTTPs_ERR_REQ_HDR_POOL_EMPTY            Request header pool is empty
+*                           HTTPs_ERR_REQ_HDR_POOL_LIB_ERR          Memory lib error occurred, when acquiring header block.
+*
+*                           HTTPs_ERR_REQ_HDR_BUF_POOL_EMPTY        Request data buffer pool is empty
+*                           HTTPs_ERR_REQ_HDR_BUF_POOL_LIB_ERR      Memory lib error occurred, when acquiring data buffer.
+*
+*                           HTTPs_ERR_REQ_HDR_TYPE_NOT_SUPPORTED    Data type not yet supported.
+*                           HTTPs_ERR_REQ_HDR_TYPE_UNKNOWN          Data type is unknown.
+*
+* Return(s)   : Pointer to the request header block, if no error(s).
+*
+*               Null pointer,                        otherwise.
+*
+* Caller(s)   : HTTPsReq_HdrParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+HTTPs_HDR_BLK  *HTTPsMem_ReqHdrGet(HTTPs_INSTANCE      *p_instance,
+                                   HTTPs_CONN          *p_conn,
+                                   HTTP_HDR_FIELD       hdr_field,
+                                   HTTPs_HDR_VAL_TYPE   val_type,
+                                   HTTPs_ERR           *p_err)
+{
+    HTTPs_HDR_BLK         *p_req_hdr_blk;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    LIB_ERR                err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+                                                                /* ------------ ACQUIRE RESP HDR FIELD BLK ------------ */
+    p_req_hdr_blk = (HTTPs_HDR_BLK *)Mem_DynPoolBlkGet(&p_instance->PoolReqHdr,
+                                                       &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+            *p_err = HTTPs_ERR_REQ_HDR_POOL_EMPTY;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrHdrPoolEmptyCtr);
+             return (DEF_NULL);
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_MEM_NO_SPACE;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrHdrPoolMemSpaceCtr);
+             return (DEF_NULL);
+
+        default:
+            *p_err = HTTPs_ERR_REQ_HDR_POOL_LIB_FAULT;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrHdrPoolLibGetCtr);
+             return (DEF_NULL);
+    }
+
+
+    switch (val_type) {
+        case HTTPs_HDR_VAL_TYPE_NONE:
+             p_req_hdr_blk->ValPtr = DEF_NULL;
+             break;
+
+
+        case HTTPs_HDR_VAL_TYPE_STR_DYN:
+             p_req_hdr_blk->ValPtr = Mem_DynPoolBlkGet(&p_instance->PoolReqHdrStr,
+                                                       &err_lib);
+             switch (err_lib) {
+                 case LIB_MEM_ERR_NONE:
+                      break;
+
+                 case LIB_MEM_ERR_POOL_EMPTY:
+                     *p_err = HTTPs_ERR_REQ_HDR_POOL_EMPTY;
+                      HTTPs_ERR_INC(p_ctr_err->Req_ErrHdrBufPoolEmptyCtr);
+                      break;
+
+                 case LIB_MEM_ERR_SEG_OVF:
+                     *p_err = HTTPs_ERR_MEM_NO_SPACE;
+                      HTTPs_ERR_INC(p_ctr_err->Req_ErrHdrBufPoolMemSpaceCtr);
+                      return (DEF_NULL);
+
+                 default:
+                     *p_err = HTTPs_ERR_REQ_HDR_POOL_LIB_FAULT;
+                      HTTPs_ERR_INC(p_ctr_err->Req_ErrHdrBufPoolLibGetCtr);
+                      break;
+             }
+
+             if (err_lib != LIB_MEM_ERR_NONE) {
+                 Mem_DynPoolBlkFree(&p_instance->PoolReqHdr,    /* Release hdr previously acquired.                    */
+                                     p_req_hdr_blk,
+                                    &err_lib);
+                 return (DEF_NULL);
+             }
+             break;
+
+
+        default:
+            *p_err = HTTPs_ERR_REQ_HDR_DATA_TYPE_UNKNOWN;
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrHdrValTypeUnknown);
+             Mem_DynPoolBlkFree(&p_instance->PoolReqHdr,
+                                 p_req_hdr_blk,
+                                &err_lib);
+             return (DEF_NULL);
+    }
+
+
+                                                                /* ----------- UPDATE RESP HDR FIELD LIST ------------- */
+    if (p_conn->HdrListPtr == DEF_NULL) {
+        p_req_hdr_blk->NextPtr = DEF_NULL;
+    } else {
+        p_req_hdr_blk->NextPtr = p_conn->HdrListPtr;
+    }
+    p_conn->HdrListPtr = p_req_hdr_blk;
+
+                                                                /* ----------- UPDATE RESP HDR FIELD PARAM ------------ */
+    p_req_hdr_blk->HdrField = hdr_field;
+    p_req_hdr_blk->ValType  = val_type;
+    p_req_hdr_blk->ValLen   = 0;
+
+    p_conn->HdrCtr++;
+
+    HTTPs_STATS_INC(p_ctr_stats->Req_StatHdrAcquiredCtr);
+
+
+   *p_err = HTTPs_ERR_NONE;
+
+    return (p_req_hdr_blk);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsMem_ReqHdrRelease()
+*
+* Description : (1) Release a request header block
+*
+*                   (a) Update  request header block  list
+*                   (b) Release header  value  buffer block
+*                   (c) Release request header block
+*
+* Argument(s) : p_instance              Pointer to the instance.
+*               ----------              Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn                  Pointer to the connection.
+*               ------                  Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_Close(),
+*               HTTPsReq_Handle().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+void  HTTPsMem_ReqHdrRelease (HTTPs_INSTANCE  *p_instance,
+                              HTTPs_CONN      *p_conn)
+{
+    HTTPs_HDR_BLK         *p_req_hdr_blk;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    LIB_ERR                err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+                                                                /* ----------- UPDATE REQ HDR FIELD LIST -------------- */
+    p_req_hdr_blk = p_conn->HdrListPtr;
+
+    if (p_req_hdr_blk == DEF_NULL) {
+        HTTPs_ERR_INC(p_ctr_err->Req_ErrHdrPtrNullCtr);
+        return;
+    } else {
+        p_conn->HdrListPtr     = p_req_hdr_blk->NextPtr;
+        p_req_hdr_blk->NextPtr = DEF_NULL;
+    }
+
+    switch(p_req_hdr_blk->ValType) {
+        case HTTPs_HDR_VAL_TYPE_STR_DYN:
+                                                                /* -------------- RELEASE STR DATA BLK ---------------- */
+             Mem_DynPoolBlkFree(&p_instance->PoolReqHdrStr,
+                                 p_req_hdr_blk->ValPtr,
+                                &err_lib);
+             if (err_lib != LIB_MEM_ERR_NONE) {
+                 HTTPs_ERR_INC(p_ctr_err->Req_ErrHdrBufPoolLibFreeCtr);
+                 return;
+             }
+             p_req_hdr_blk->ValPtr = DEF_NULL;
+             break;
+
+
+        case HTTPs_HDR_VAL_TYPE_NONE:
+        case HTTPs_HDR_VAL_TYPE_STR_CONST:
+        default:
+             return;
+    }
+
+                                                                /* ----------- RELEASE RESP HDR FIELD BLK ------------- */
+    Mem_DynPoolBlkFree(&p_instance->PoolReqHdr,
+                        p_req_hdr_blk,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        HTTPs_ERR_INC(p_ctr_err->Req_ErrHdrPoolLibFreeCtr);
+        return;
+    }
+
+    p_conn->HdrCtr--;
+
+    HTTPs_STATS_INC(p_ctr_stats->Req_StatHdrReleaseCtr);
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsMem_RespHdrGet()
+*
+* Description : (1) Acquire a new Response Header Field block :
+*
+*                   (a) Acquire response header block
+*                   (b) Acquire the buffer block depending on the value data type
+*                   (c) Update response header block list
+*                   (d) Initialize header block parameters
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               hdr_field   Type of the response header field
+*
+*               val_type    Data type of the response header field value
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE                          Response header block successfully acquired.
+*
+*                           HTTPs_ERR_RESP_HDR_OVERFLOW             Exceeded maximum authorized block per connection.
+*
+*                           HTTPs_ERR_RESP_HDR_POOL_EMPTY           Response header pool is empty
+*                           HTTPs_ERR_RESP_HDR_POOL_LIB_ERR         Memory lib error occurred, when acquiring header block.
+*
+*                           HTTPs_ERR_RESP_HDR_BUF_POOL_EMPTY       Response data buffer pool is empty
+*                           HTTPs_ERR_RESP_HDR_BUF_POOL_LIB_ERR     Memory lib error occurred, when acquiring data buffer.
+*
+*                           HTTPs_ERR_RESP_HDR_TYPE_NOT_SUPPORTED   Data type not yet supported.
+*                           HTTPs_ERR_RESP_HDR_TYPE_UNKNOWN         Data type is unknown.
+*
+* Return(s)   : pointer to the response header block, if no error(s).
+*
+*               Null pointer,                         otherwise.
+*
+* Caller(s)   : HTTPs_RespHdrGet().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+HTTPs_HDR_BLK  *HTTPsMem_RespHdrGet(HTTPs_INSTANCE      *p_instance,
+                                    HTTPs_CONN          *p_conn,
+                                    HTTP_HDR_FIELD       hdr_field,
+                                    HTTPs_HDR_VAL_TYPE   val_type,
+                                    HTTPs_ERR           *p_err)
+{
+    const  HTTPs_CFG             *p_cfg;
+           HTTPs_HDR_BLK         *p_resp_hdr_blk;
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+           HTTPs_INSTANCE_ERRS   *p_ctr_err;
+           LIB_ERR                err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    p_cfg = p_instance->CfgPtr;
+
+    if (p_cfg->HdrTxCfgPtr == DEF_NULL) {
+       *p_err = HTTPs_ERR_CFG_NULL_PTR_RESP_HDR;
+        return (DEF_NULL);
+    }
+
+    if (p_cfg->HdrTxCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+        if (p_conn->HdrCtr >= p_cfg->HdrTxCfgPtr->NbrPerConnMax) {
+           *p_err = HTTPs_ERR_RESP_HDR_OVERFLOW;
+            return (DEF_NULL);
+        }
+    }
+
+                                                                /* ------------ ACQUIRE RESP HDR FIELD BLK ------------ */
+    p_resp_hdr_blk = (HTTPs_HDR_BLK *)Mem_DynPoolBlkGet(&p_instance->PoolRespHdr,
+                                                        &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_POOL_EMPTY:
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrPoolEmptyCtr);
+            *p_err = HTTPs_ERR_RESP_HDR_POOL_EMPTY;
+             return (DEF_NULL);
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_MEM_NO_SPACE;
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrPoolMemSpaceCtr);
+             return (DEF_NULL);
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrPoolLibGetCtr);
+            *p_err = HTTPs_ERR_RESP_HDR_POOL_LIB_FAULT;
+             return (DEF_NULL);
+    }
+
+
+    switch (val_type) {
+        case HTTPs_HDR_VAL_TYPE_NONE:
+        case HTTPs_HDR_VAL_TYPE_STR_CONST:
+             p_resp_hdr_blk->ValPtr = DEF_NULL;
+             break;
+
+
+        case HTTPs_HDR_VAL_TYPE_STR_DYN:
+             p_resp_hdr_blk->ValPtr = Mem_DynPoolBlkGet(&p_instance->PoolRespHdrStr,
+                                                        &err_lib);
+             switch (err_lib) {
+                 case LIB_MEM_ERR_NONE:
+                      break;
+
+                 case LIB_MEM_ERR_POOL_EMPTY:
+                     *p_err = HTTPs_ERR_RESP_HDR_POOL_EMPTY;
+                      HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrBufPoolEmptyCtr);
+                      break;
+
+                 case LIB_MEM_ERR_SEG_OVF:
+                     *p_err = HTTPs_ERR_MEM_NO_SPACE;
+                      HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrBufPoolMemSpaceCtr);
+                      return (DEF_NULL);
+
+                default:
+                     *p_err = HTTPs_ERR_RESP_HDR_POOL_LIB_FAULT;
+                      HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrBufPoolLibGetCtr);
+                      break;
+             }
+
+             if (err_lib != LIB_MEM_ERR_NONE) {
+                 Mem_DynPoolBlkFree(&p_instance->PoolRespHdr,   /* Release block previously acquired.                   */
+                                     p_resp_hdr_blk,
+                                    &err_lib);
+                 return (DEF_NULL);
+             }
+             break;
+
+
+        default :
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrValTypeUnknown);
+            *p_err = HTTPs_ERR_RESP_HDR_DATA_TYPE_UNKNOWN;
+             Mem_DynPoolBlkFree(&p_instance->PoolRespHdr,
+                                 p_resp_hdr_blk,
+                                &err_lib);
+             return (DEF_NULL);
+
+    }
+
+
+                                                                /* ----------- UPDATE RESP HDR FIELD LIST ------------- */
+    if (p_conn->HdrListPtr == DEF_NULL) {
+        p_resp_hdr_blk->NextPtr = DEF_NULL;
+    } else {
+        p_resp_hdr_blk->NextPtr = p_conn->HdrListPtr;
+    }
+    p_conn->HdrListPtr = p_resp_hdr_blk;
+
+
+                                                                /* ----------- UPDATE RESP HDR FIELD PARAM ------------ */
+    p_resp_hdr_blk->HdrField = hdr_field;
+    p_resp_hdr_blk->ValType  = val_type;
+    p_resp_hdr_blk->ValLen   = 0;
+
+    p_conn->HdrCtr++;
+
+    HTTPs_STATS_INC(p_ctr_stats->Resp_StatHdrAcquiredCtr);
+
+   *p_err = HTTPs_ERR_NONE;
+
+    return (p_resp_hdr_blk);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsMem_RespHdrRelease()
+*
+* Description : (1) Release a Response Header Field block
+*
+*                   (a) Update response header block list
+*                   (b) Release header field value buffer block
+*                   (c) Release response header Field block
+*
+* Argument(s) : p_instance      Pointer to the instance.
+*               ----------      Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn          Pointer to the connection.
+*               ------          Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_Close(),
+*               HTTPsResp_HdrFieldAdd().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+void  HTTPsMem_RespHdrRelease(HTTPs_INSTANCE  *p_instance,
+                              HTTPs_CONN      *p_conn)
+{
+
+    HTTPs_HDR_BLK         *p_resp_hdr_blk;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    LIB_ERR                err_lib;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+                                                                /* ----------- UPDATE RESP HDR FIELD LIST ------------- */
+    p_resp_hdr_blk = p_conn->HdrListPtr;
+
+    if (p_resp_hdr_blk == DEF_NULL) {
+        HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrPtrNullCtr);
+        return;
+    } else {
+        p_conn->HdrListPtr      = p_resp_hdr_blk->NextPtr;
+        p_resp_hdr_blk->NextPtr = DEF_NULL;
+    }
+
+
+    switch(p_resp_hdr_blk->ValType) {
+        case HTTPs_HDR_VAL_TYPE_STR_DYN:
+                                                                /* -------------- RELEASE STR DATA BLK ---------------- */
+             Mem_DynPoolBlkFree(&p_instance->PoolRespHdrStr,
+                                 p_resp_hdr_blk->ValPtr,
+                                &err_lib);
+             if (err_lib != LIB_MEM_ERR_NONE) {
+                 HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrBufPoolLibFreeCtr);
+                 return;
+             }
+             p_resp_hdr_blk->ValPtr = DEF_NULL;
+             break;
+
+        case HTTPs_HDR_VAL_TYPE_NONE:
+        case HTTPs_HDR_VAL_TYPE_STR_CONST:
+        default:
+            return;
+    }
+
+                                                                /* ----------- RELEASE RESP HDR FIELD BLK ------------- */
+    Mem_DynPoolBlkFree(&p_instance->PoolRespHdr,
+                        p_resp_hdr_blk,
+                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrPoolLibFreeCtr);
+        return;
+    }
+
+    p_conn->HdrCtr--;
+
+    HTTPs_STATS_INC(p_ctr_stats->Resp_StatHdrReleaseCtr);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsMem_ReqHdrPoolInit()
+*
+* Description : (1) Initialize the HTTP server connection request header block pool :
+*
+*                   (a) Validate remaining memory available
+*                   (b) Create request header block pool
+*                   (c) Create header value buffers  pool(s)
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                            HTTPs_ERR_NONE                             Request header pool(s) successfully initialized.
+*
+*                            HTTPs_ERR_INSTANCE_INIT_POOL_REM_MEM       Not enough remaining memory space
+*                            HTTPs_ERR_INSTANCE_INIT_POOL_HDR_REQ       Memory lib error occurred,
+*                                                                           when initializing request pool
+*                            HTTPs_ERR_INSTANCE_INIT_POOL_REQ_HDR_STR   Memory lib error occurred,
+*                                                                           when initializing request string pool
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsMem_ConnPoolInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+static  void  HTTPsMem_ReqHdrPoolInit (HTTPs_INSTANCE  *p_instance,
+                                       HTTPs_ERR       *p_err)
+{
+    const  HTTPs_CFG   *p_cfg;
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+           CPU_SIZE_T   octets_rem;
+#endif
+           CPU_SIZE_T   octets_reqd;
+           CPU_SIZE_T   pool_size_max;
+           LIB_ERR      err_lib;
+
+
+    p_cfg = p_instance->CfgPtr;
+
+    if (p_cfg->HdrRxCfgPtr == DEF_NULL) {
+       *p_err = HTTPs_ERR_CFG_NULL_PTR_REQ_HDR;
+        return;
+    }
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    octets_reqd = (HTTPs_CFG_POOLS_INIT_NBR * sizeof(HTTPs_HDR_BLK))
+                + (HTTPs_CFG_POOLS_INIT_NBR * p_cfg->HdrRxCfgPtr->DataLenMax);
+
+                                                                /* Get and validate rem space avail on heap.            */
+    octets_rem = Mem_SegRemSizeGet(HTTPs_MemSegPtr,
+                                   sizeof(CPU_SIZE_T),
+                                   DEF_NULL,
+                                  &err_lib);
+
+    if (octets_rem < octets_reqd) {
+       *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+        return;
+    }
+#endif
+
+    if (p_cfg->HdrRxCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+        pool_size_max = p_cfg->ConnNbrMax * p_cfg->HdrRxCfgPtr->NbrPerConnMax;
+    } else {
+        pool_size_max = LIB_MEM_BLK_QTY_UNLIMITED;
+    }
+
+                                                                /* ------------ CREATE REQ HDR FIELD POOL ------------- */
+    Mem_DynPoolCreate("HTTPs Req Hdr Pool",
+                      &p_instance->PoolReqHdr,
+                       HTTPs_MemSegPtr,
+                       sizeof(HTTPs_HDR_BLK),
+                       sizeof(CPU_SIZE_T),
+                       HTTPs_CFG_POOLS_INIT_NBR,
+                       pool_size_max,
+                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+             return;
+
+        default:
+            *p_err = HTTPs_ERR_INIT_POOL_REQ_HDR;
+             return;
+    }
+
+                                                                /* ---------- CREATE STR POOL FOR HDR FIELD ----------- */
+    Mem_DynPoolCreate("HTTPs Req Hdr Str Pool",
+                      &p_instance->PoolReqHdrStr,
+                       HTTPs_MemSegPtr,
+                       p_cfg->HdrRxCfgPtr->DataLenMax,
+                       sizeof(CPU_SIZE_T),
+                       HTTPs_CFG_POOLS_INIT_NBR,
+                       pool_size_max,
+                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+             return;
+
+        default:
+            *p_err = HTTPs_ERR_INIT_POOL_REQ_HDR_STR;
+             return;
+    }
+
+   (void)&octets_reqd;
+
+   *p_err = HTTPs_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsMem_RespHdrPoolInit()
+*
+* Description : (1) Initialize the HTTP server connection response header block pool :
+*
+*                   (a) Validate remaining memory available
+*                   (b) Create response header field block pool
+*                   (c) Create header value buffers pool
+*
+* Argument(s) : p_instance      Pointer to the instance.
+*               ----------      Argument validated in HTTPs_InstanceStart().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                            HTTPs_ERR_NONE                             Response header pool(s) successfully initialized.
+*
+*                            HTTPs_ERR_INSTANCE_INIT_POOL_REM_MEM       Not enough remaining memory space
+*                            HTTPs_ERR_INSTANCE_INIT_POOL_HDR_RESP      Memory lib error occurred,
+*                                                                           when initializing response pool
+*                            HTTPs_ERR_INSTANCE_INIT_POOL_HDR_RESP_STR  Memory lib error occurred,
+*                                                                            when initializing response string pool
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsMem_ConnPoolInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+static  void  HTTPsMem_RespHdrPoolInit(HTTPs_INSTANCE  *p_instance,
+                                       HTTPs_ERR       *p_err)
+{
+     const  HTTPs_CFG   *p_cfg;
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+            CPU_SIZE_T   octets_rem;
+#endif
+            CPU_SIZE_T   octets_reqd;
+            CPU_SIZE_T   pool_size_max;
+            LIB_ERR      err_lib;
+
+
+    p_cfg = p_instance->CfgPtr;
+
+    if (p_cfg->HdrTxCfgPtr == DEF_NULL) {
+       *p_err = HTTPs_ERR_CFG_NULL_PTR_RESP_HDR;
+        return;
+    }
+
+#if (HTTPs_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    octets_reqd = (HTTPs_CFG_POOLS_INIT_NBR * sizeof(HTTPs_HDR_BLK))
+                + (HTTPs_CFG_POOLS_INIT_NBR * p_cfg->HdrTxCfgPtr->DataLenMax);
+
+                                                                /* Get and validate rem space avail on heap.            */
+    octets_rem = Mem_SegRemSizeGet(HTTPs_MemSegPtr,
+                                   sizeof(CPU_SIZE_T),
+                                   DEF_NULL,
+                                  &err_lib);
+
+    if (octets_rem < octets_reqd) {
+       *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+        return;
+    }
+#endif
+
+    if (p_cfg->HdrTxCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+        pool_size_max = p_cfg->ConnNbrMax * p_cfg->HdrTxCfgPtr->NbrPerConnMax;
+    } else {
+        pool_size_max = LIB_MEM_BLK_QTY_UNLIMITED;
+    }
+
+                                                                /* ------------ CREATE RESP HDR FIELD POOL ------------ */
+    Mem_DynPoolCreate("HTTPs Resp Hdr Pool",
+                      &p_instance->PoolRespHdr,
+                       HTTPs_MemSegPtr,
+                       sizeof(HTTPs_HDR_BLK),
+                       sizeof(CPU_SIZE_T),
+                       HTTPs_CFG_POOLS_INIT_NBR,
+                       pool_size_max,
+                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+             return;
+
+        default:
+            *p_err = HTTPs_ERR_INIT_POOL_RESP_HDR;
+             return;
+    }
+
+                                                                /* ---------- CREATE STR POOL FOR HDR FIELD ----------- */
+    Mem_DynPoolCreate("HTTPs Resp Hdr Str Pool",
+                      &p_instance->PoolRespHdrStr,
+                       HTTPs_MemSegPtr,
+                       p_cfg->HdrTxCfgPtr->DataLenMax,
+                       sizeof(CPU_SIZE_T),
+                       HTTPs_CFG_POOLS_INIT_NBR,
+                       pool_size_max,
+                      &err_lib);
+    switch (err_lib) {
+        case LIB_MEM_ERR_NONE:
+             break;
+
+        case LIB_MEM_ERR_SEG_OVF:
+            *p_err = HTTPs_ERR_INIT_POOL_MEM_NO_SPACE;
+             return;
+
+        default:
+            *p_err = HTTPs_ERR_INIT_POOL_RESP_HDR_STR;
+             return;
+    }
+
+
+   (void)&octets_reqd;
+
+   *p_err = HTTPs_ERR_NONE;
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_mem.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_mem.h
new file mode 100644
index 0000000..a60588d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_mem.h
@@ -0,0 +1,169 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     HTTP SERVER MEMORY LIBRARY
+*
+* Filename      : http-s_mem.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTP memory module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPs_MEM_PRESENT                                          /* See Note #1.                                         */
+#define  HTTPs_MEM_PRESENT
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         HTTPs INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "http-s.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef   HTTPs_MEM_MODULE
+#define  HTTPs_MEM_EXT
+#else
+#define  HTTPs_MEM_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* Instance functionalities.            */
+void                 HTTPsMem_InstanceInit                (MEM_SEG             *p_mem_seg,
+                                                           HTTPs_ERR           *p_err);
+
+HTTPs_OS_TASK_OBJ   *HTTPsMem_InstanceTaskInit            (HTTPs_ERR           *p_err);
+
+HTTPs_INSTANCE      *HTTPsMem_InstanceGet                 (HTTPs_ERR           *p_err);
+
+void                 HTTPsMem_InstanceRelease             (HTTPs_INSTANCE      *p_instance);
+
+                                                                /* Conn functionalities.                */
+void                 HTTPsMem_ConnPoolInit                (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_ERR           *p_err);
+
+HTTPs_CONN          *HTTPsMem_ConnGet                     (HTTPs_INSTANCE      *p_instance,
+                                                           NET_SOCK_ID          sock_id,
+                                                           NET_SOCK_ADDR        client_addr);
+
+void                 HTTPsMem_ConnRelease                 (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn);
+
+void                 HTTPsMem_ConnClr                     (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn);
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+CPU_BOOLEAN          HTTPsMem_TokenGet                    (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn,
+                                                           HTTPs_ERR           *p_err);
+
+void                 HTTPsMem_TokenRelease                (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn);
+#endif
+
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+HTTPs_KEY_VAL       *HTTPsMem_QueryStrKeyValBlkGet        (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn,
+                                                           HTTPs_ERR           *p_err);
+
+void                 HTTPsMem_QueryStrKeyValBlkReleaseAll (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn);
+#endif
+
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+HTTPs_KEY_VAL       *HTTPsMem_FormKeyValBlkGet            (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn,
+                                                           HTTPs_ERR           *p_err);
+
+void                 HTTPsMem_FormKeyValBlkReleaseAll     (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn);
+#endif
+
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+HTTPs_HDR_BLK       *HTTPsMem_ReqHdrGet                   (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn,
+                                                           HTTP_HDR_FIELD       hdr_fied,
+                                                           HTTPs_HDR_VAL_TYPE   val_type,
+                                                           HTTPs_ERR           *p_err);
+
+void                 HTTPsMem_ReqHdrRelease               (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn);
+#endif
+
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+HTTPs_HDR_BLK       *HTTPsMem_RespHdrGet                  (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn,
+                                                           HTTP_HDR_FIELD       hdr_fied,
+                                                           HTTPs_HDR_VAL_TYPE   val_type,
+                                                           HTTPs_ERR           *p_err);
+
+void                 HTTPsMem_RespHdrRelease              (HTTPs_INSTANCE      *p_instance,
+                                                           HTTPs_CONN          *p_conn);
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of HTTPs mem module include.                     */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_req.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_req.c
new file mode 100644
index 0000000..393b9ee
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_req.c
@@ -0,0 +1,3103 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP SERVER REQUEST MODULE
+*
+* Filename      : http-s_req.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPs_REQ_MODULE
+
+#include  "http-s_req.h"
+#include  "http-s_mem.h"
+#include  "http-s_str.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             FORM DEFINES
+*********************************************************************************************************
+*/
+
+#define  HTTPs_STR_MULTIPART_CTRL_END_SEC                   STR_CR_LF STR_CR_LF
+#define  HTTPs_STR_MULTIPART_CTRL_END_SEC_LEN               (sizeof(HTTPs_STR_MULTIPART_CTRL_END_SEC) - 1)
+
+#define  HTTPs_STR_MULTIPART_DATA_START                     "--"
+#define  HTTPs_STR_MULTIPART_DATA_START_LEN                 (sizeof(HTTPs_STR_MULTIPART_DATA_START) - 1)
+
+#define  HTTPs_STR_MULTIPART_DATA_END                       STR_CR_LF "--"
+#define  HTTPs_STR_MULTIPART_DATA_END_LEN                   (sizeof(HTTPs_STR_MULTIPART_DATA_END) - 1)
+
+#define  HTTPs_STR_MULTIPART_LAST                           "--" STR_CR_LF
+#define  HTTPs_STR_MULTIPART_LAST_LEN                       (sizeof(HTTPs_STR_MULTIPART_LAST) - 1)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void                 HTTPsReq_MethodParse                    (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      HTTPs_ERR        *p_err);
+
+static  CPU_BOOLEAN          HTTPsReq_URI_Parse                      (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      HTTPs_ERR        *p_err);
+
+static  void                 HTTPsReq_QueryStrParse                  (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      HTTPs_ERR        *p_err);
+
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+static  CPU_BOOLEAN          HTTPsReq_QueryStrKeyValBlkAdd           (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      CPU_CHAR         *p_str,
+                                                                      CPU_SIZE_T        str_len,
+                                                                      HTTPs_ERR        *p_err);
+#endif
+
+static  void                 HTTPsReq_ProtocolVerParse               (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      HTTPs_ERR        *p_err);
+
+static  void                 HTTPsReq_HdrParse                       (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      HTTPs_ERR        *p_err);
+
+static  CPU_CHAR            *HTTPsReq_HdrParseValGet                 (CPU_CHAR         *p_field,
+                                                                      CPU_INT16U        field_len,
+                                                                      CPU_CHAR         *p_field_end,
+                                                                      CPU_INT16U       *p_len_rem);
+
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_BOOLEAN          HTTPsReq_BodyForm                       (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      HTTPs_ERR        *p_err);
+
+static  CPU_BOOLEAN          HTTPsReq_BodyFormAppParse               (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_connn,
+                                                                      HTTPs_ERR        *p_err);
+
+static  CPU_BOOLEAN          HTTPsReq_BodyFormAppKeyValBlkAdd        (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      CPU_CHAR         *p_str,
+                                                                      CPU_SIZE_T        str_len,
+                                                                      HTTPs_ERR        *p_err);
+
+#if (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED)
+static  CPU_BOOLEAN          HTTPsReq_BodyFormMultipartParse         (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      HTTPs_ERR        *p_err);
+
+static  CPU_CHAR            *HTTPsReq_BodyFormMultipartBoundarySrch  (CPU_CHAR         *p_boundary,
+                                                                      CPU_INT08U        boundary_len,
+                                                                      CPU_CHAR         *p_buf,
+                                                                      CPU_INT16U        buf_len,
+                                                                      CPU_CHAR        **p_boundary_sep);
+
+static  CPU_BOOLEAN          HTTPsReq_BodyFormMultipartCtrlParse     (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      HTTPs_ERR        *p_err);
+
+static  CPU_BOOLEAN          HTTPsReq_BodyFormMultipartFileWr        (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      HTTPs_ERR        *p_err);
+#endif
+#endif
+
+#if ((HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED) || \
+     ((HTTPs_CFG_FORM_EN     == DEF_ENABLED)))
+static  CPU_BOOLEAN          HTTPsReq_URL_EncodeStrParse             (HTTPs_INSTANCE   *p_instance,
+                                                                      HTTPs_CONN       *p_conn,
+                                                                      HTTPs_KEY_VAL   *p_key_val,
+                                                                      CPU_BOOLEAN      from_query,
+                                                                      CPU_CHAR         *p_str,
+                                                                      CPU_SIZE_T        str_len);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPsReq_Handle()
+*
+* Description : (1) Parse request:
+*
+*                   (a) Parse request method
+*                   (b) Parse request URI
+*                   (c) Parse request query string (if necessary)
+*                   (d) Parse request protocol version
+*                   (e) Parse request headers
+*                   (f) (HOOK) Authentication
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : HTTPs_CONN_PROCESS_CONTINUE, connection successfully updated and the process can continue.
+*               HTTPs_CONN_PROCESS_RX_TX,    connection requires more data to complete the parse process.
+*
+* Caller(s)   : HTTPsConn_Process().
+*
+* Note(s)     : (2) RFC #2616, Section 5 'Request' specifies how a request message must be structured:
+*
+*                       A request message from a client to a server includes, within the first line of that message,
+*                       the method to be applied to the resource, the identifier of the resource, and the protocol
+*                       version in use.
+*
+*                           Request = Request-Line
+*                                      *(( general-header
+*                                      | request-header
+*                                      | entity-header ) CRLF)
+*                                     CRLF
+*                                     [ message-body ]
+*
+*********************************************************************************************************
+*/
+
+void  HTTPsReq_Handle (HTTPs_INSTANCE  *p_instance,
+                       HTTPs_CONN      *p_conn)
+{
+    const  HTTPs_CFG             *p_cfg;
+           CPU_BOOLEAN            accepted;
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+           HTTPs_INSTANCE_ERRS   *p_ctr_err;
+           HTTPs_ERR              err;
+           CPU_BOOLEAN            done;
+           CPU_BOOLEAN            hook_def;
+           CPU_BOOLEAN            is_query_str_found;
+
+
+    p_cfg = (HTTPs_CFG *)p_instance->CfgPtr;
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    done = DEF_NO;
+    while (done != DEF_YES) {
+        switch (p_conn->State) {
+
+            case HTTPs_CONN_STATE_REQ_INIT:
+                 HTTPs_STATS_INC(p_ctr_stats->Req_StatRxdCtr);
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+                 p_conn->HdrType = HTTPs_HDR_TYPE_REQ;
+#endif
+                 p_conn->State   = HTTPs_CONN_STATE_REQ_PARSE_METHOD;
+                 break;
+
+                                                                /* ---------------- PARSE REQ METHOD ------------------ */
+            case HTTPs_CONN_STATE_REQ_PARSE_METHOD:
+                 HTTPsReq_MethodParse(p_instance, p_conn, &err);
+                 switch (err) {
+                     case HTTPs_ERR_NONE:                                    /* If the Method parsing is successful...   */
+                          p_conn->State = HTTPs_CONN_STATE_REQ_PARSE_URI;    /* ...go to the next step.                  */
+                          break;
+
+                     default:                                                /* If the Method parsing has failed...      */
+                          HTTPs_ERR_INC(p_ctr_err->Req_ErrInvalidCtr);       /* ...generate an error...                  */
+                          p_conn->ErrCode   = err;
+                          p_conn->State     = HTTPs_CONN_STATE_ERR_INTERNAL;
+                          p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                          done              = DEF_YES;                       /* ...and exit the state machine.           */
+                          break;
+                 }
+                 break;
+
+                                                                /* ------------------ PARSE REQ URI ------------------- */
+            case HTTPs_CONN_STATE_REQ_PARSE_URI:
+                 is_query_str_found = HTTPsReq_URI_Parse(p_instance, p_conn, &err);
+                 switch (err) {
+                     case HTTPs_ERR_NONE:                            /* If the URI parsing is successful...              */
+                          if (is_query_str_found == DEF_YES) {       /* ...check if query string need to be parse.       */
+                              p_conn->State = HTTPs_CONN_STATE_REQ_PARSE_QUERY_STRING;
+                          } else {
+                              p_conn->State = HTTPs_CONN_STATE_REQ_PARSE_PROTOCOL_VERSION;
+                          }
+                          break;
+
+                     case HTTPs_ERR_REQ_MORE_DATA_REQUIRED:          /* If more data is required to complete the...      */
+                          p_conn->SockState = HTTPs_SOCK_STATE_RX;   /* ...URI Parsing, exit the state machine.          */
+                          done                = DEF_YES;
+                          break;
+
+                     default:                                        /* If the URI parsing has failed...                 */
+                          HTTPs_ERR_INC(p_ctr_err->Req_ErrInvalidCtr); /* ...generate an error...                        */
+                          p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                          p_conn->ErrCode   = err;
+                          p_conn->State     = HTTPs_CONN_STATE_ERR_INTERNAL;
+                          done              = DEF_YES;               /* ...and exit the state machine.                   */
+                          break;
+                 }
+                 break;
+
+                                                                /* --------------- PARSE REQ QUERY STR ---------------- */
+            case HTTPs_CONN_STATE_REQ_PARSE_QUERY_STRING:
+                 HTTPsReq_QueryStrParse(p_instance, p_conn, &err);
+                 switch (err) {
+                     case HTTPs_ERR_NONE:                            /* If the Query Str parsing is successful...        */
+                                                                     /* ...go to the next step.                          */
+                          p_conn->State = HTTPs_CONN_STATE_REQ_PARSE_PROTOCOL_VERSION;
+                          break;
+
+                     case HTTPs_ERR_REQ_MORE_DATA_REQUIRED:          /* If more data is required to complete the...      */
+                          p_conn->SockState = HTTPs_SOCK_STATE_RX;   /* ...Query Str Parsing, exit the state machine.    */
+                          done              = DEF_YES;
+                          break;
+
+                     default:                                        /* If the Query Str parsing has failed...           */
+                          HTTPs_ERR_INC(p_ctr_err->Req_ErrInvalidCtr); /* ...generate an error...                        */
+                          p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                          p_conn->ErrCode   = err;
+                          p_conn->State     = HTTPs_CONN_STATE_ERR_INTERNAL;
+                          done              = DEF_YES;               /* ...and exit the state machine.                   */
+                          break;
+                 }
+                 break;
+
+                                                                /* -------------- PARSE REQ PROTOCOL VER -------------- */
+            case HTTPs_CONN_STATE_REQ_PARSE_PROTOCOL_VERSION:
+                 HTTPsReq_ProtocolVerParse(p_instance, p_conn, &err);
+                    switch (err) {
+                        case HTTPs_ERR_NONE:                            /* If the Protocol Ver parsing is successful... */
+                                                                        /* ...go to the next step.                      */
+                             p_conn->State        = HTTPs_CONN_STATE_REQ_PARSE_HDR;
+                             p_conn->SockState    = HTTPs_SOCK_STATE_NONE;
+                             DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_LOCATION);
+                             break;
+
+                        case HTTPs_ERR_REQ_MORE_DATA_REQUIRED:          /* If more data is required to complete the...  */
+                             p_conn->SockState = HTTPs_SOCK_STATE_RX;   /* ...Protocol Ver parsing, exit the state...   */
+                             done              = DEF_YES;               /* ...machine.                                  */
+                             break;
+
+                        default:                                      /* If the Protocol Ver parsing has failed...      */
+                             HTTPs_ERR_INC(p_ctr_err->Req_ErrInvalidCtr); /* ...generate an error...                    */
+                             p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                             p_conn->ErrCode   = err;
+                             p_conn->State     = HTTPs_CONN_STATE_ERR_INTERNAL;
+                             done                = DEF_YES;             /* ...and exit the state machine.               */
+                             break;
+                    }
+                    break;
+
+                                                                /* ------------------ PARSE REQ HDR ------------------- */
+            case HTTPs_CONN_STATE_REQ_PARSE_HDR:
+                 HTTPsReq_HdrParse(p_instance, p_conn, &err);   /* See Note #2.                                         */
+                 switch (err) {
+                     case HTTPs_ERR_NONE:                       /* If the Protocol Ver parsing is successful...         */
+                                                                /* ...go to the next step.                              */
+                          p_conn->State     = HTTPs_CONN_STATE_REQ_LINE_HDR_HOOK;
+                          p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                          HTTPs_STATS_INC(p_ctr_stats->Req_StatProcessedCtr);
+                          break;
+
+                     case HTTPs_ERR_REQ_MORE_DATA_REQUIRED:     /* If more data is required to complete the...          */
+                          p_conn->SockState = HTTPs_SOCK_STATE_RX; /* ...Protocol Ver parsing, exit the state...        */
+                          done              = DEF_YES;          /* ...machine.                                          */
+                          break;
+
+                     default:                                    /* If the Header parsing has failed...                  */
+                         HTTPs_ERR_INC(p_ctr_err->Req_ErrInvalidCtr); /* ...generate an error...                         */
+                         p_conn->ErrCode = err;
+                         p_conn->State   = HTTPs_CONN_STATE_ERR_INTERNAL;
+                         done            = DEF_YES;              /* ...and exit the state machine.                       */
+                         break;
+                 }
+                 break;
+
+                                                                /* --------------- CONN REQ EXT PROCESS --------------- */
+            case HTTPs_CONN_STATE_REQ_LINE_HDR_HOOK:
+                 hook_def = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnReqHook);
+                 if (hook_def == DEF_YES) {
+                     accepted = p_cfg->HooksPtr->OnReqHook(p_instance,
+                                                           p_conn,
+                                                           p_cfg->Hooks_CfgPtr);
+                     if (accepted != DEF_YES) {
+                                                                /* If the connection is not authorized ...              */
+                         if (p_conn->StatusCode == HTTP_STATUS_OK) {
+                             p_conn->StatusCode = HTTP_STATUS_UNAUTHORIZED;
+                         }
+                         DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_REQ_FLUSH);
+                         p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FLUSH_DATA;
+                     }
+                 }
+                                                                /* Otherwise, receive the body.                         */
+                 p_conn->State     = HTTPs_CONN_STATE_REQ_BODY_INIT;
+                 done              = DEF_YES;                   /* ... exit the state machine.                          */
+                 break;
+
+
+            default:
+                HTTPs_ERR_INC(p_ctr_err->Req_ErrStateUnkownCtr);
+                p_conn->ErrCode = HTTPs_ERR_STATE_UNKNOWN;
+                p_conn->State   = HTTPs_CONN_STATE_ERR_INTERNAL;
+                done            = DEF_YES;
+                break;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPsReq_Body()
+*
+* Description : Process Body received in HTTP request.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_Process().
+*
+* Note(s)     : (2) RFC #2616, Section 9 'Method Definitions' describes methods for HTTP/1.1:
+*
+*                   (a) RFC #2616, Section 9.3 'GET' describes GET method:
+*
+*                           The GET method means retrieve whatever information (in the form of an
+*                           entity) is identified by the Request-URI. If the Request-URI refers
+*                           to a data-producing process, it is the produced data which shall be
+*                           returned as the entity in the response and not the source text of the
+*                           process, unless that text happens to be the output of the process.
+*
+*                           The semantics of the GET method change to a "conditional GET" if the
+*                           request message includes an If-Modified-Since, If-Unmodified-Since,
+*                           If-Match, If-None-Match, or If-Range header field. A conditional GET
+*                           method requests that the entity be transferred only under the
+*                           circumstances described by the conditional header field(s). The
+*                           conditional GET method is intended to reduce unnecessary network
+*                           usage by allowing cached entities to be refreshed without requiring
+*                           multiple requests or transferring data already held by the client.
+*
+*                           The semantics of the GET method change to a "partial GET" if the
+*                           request message includes a Range header field. A partial GET requests
+*                           that only part of the entity be transferred, as described in section
+*                           14.35. The partial GET method is intended to reduce unnecessary
+*                           network usage by allowing partially-retrieved entities to be
+*                           completed without transferring data already held by the client.
+*
+*                           The response to a GET request is cacheable if and only if it meets
+*                           the requirements for HTTP caching described in section 13.
+*
+*                           See section 15.1.3 for security considerations when used for forms.
+*
+*                   (b) RFC #2616, Section 9.4 'HEAD' describes HEAD method:
+*
+*                           The HEAD method is identical to GET except that the server MUST NOT
+*                           return a message-body in the response. The metainformation contained
+*                           in the HTTP headers in response to a HEAD request SHOULD be identical
+*                           to the information sent in response to a GET request. This method can
+*                           be used for obtaining metainformation about the entity implied by the
+*                           request without transferring the entity-body itself. This method is
+*                           often used for testing hypertext links for validity, accessibility,
+*                           and recent modification.
+*
+*                   (c) RFC #2616, Section 9.5 'POST' describes POST method:
+*
+*                           The POST method is used to request that the origin server accept the entity
+*                           enclosed in the request as a new subordinate of the resource identified by
+*                           the Request-URI in the Request-Line. POST is designed to allow a uniform
+*                           method to cover the following functions:
+*
+*                                 - Annotation of existing resources;
+*                                 - Posting a message to a bulletin board, newsgroup, mailing list,
+*                                   or similar group of articles;
+*                                 - Providing a block of data, such as the result of submitting a
+*                                   form, to a data-handling process;
+*                                 - Extending a database through an append operation.
+*
+*                           The actual function performed by the POST method is determined by the server
+*                           and is usually dependent on the Request-URI. The posted entity is subordinate
+*                           to that URI in the same way that a file is subordinate to a directory
+*                           containing it, a news article is subordinate to a newsgroup to which it is
+*                           posted, or a record is subordinate to a database.
+*
+*                           The action performed by the POST method might not result in a resource that
+*                           can be identified by a URI. In this case, either 200 (OK) or 204 (No Content)
+*                           is the appropriate response status, depending on whether or not the response
+*                           includes an entity that describes the result.
+*
+*                           If a resource has been created on the origin server, the response SHOULD be 201
+*                           (Created) and contain an entity which describes the status of the request and
+*                           refers to the new resource, and a Location header (see section 14.30).
+*
+*                           Responses to this method are not cacheable, unless the response includes
+*                           appropriate Cache-Control or Expires header fields. However, the 303 (See Other)
+*                           response can be used to direct the user agent to retrieve a cacheable resource.
+*
+*                           POST requests MUST obey the message transmission requirements set out in
+*                           section 8.2.
+*
+*                           See section 15.1.3 for security considerations.
+*********************************************************************************************************
+*/
+
+void  HTTPsReq_Body (HTTPs_INSTANCE  *p_instance,
+                     HTTPs_CONN      *p_conn)
+{
+    const  HTTPs_CFG             *p_cfg;
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+           HTTPs_INSTANCE_ERRS   *p_ctr_err;
+           CPU_SIZE_T             data_len_rd;
+           CPU_BOOLEAN            hook_continue;
+           CPU_BOOLEAN            done;
+           CPU_BOOLEAN            body_hook_def;
+           CPU_BOOLEAN            req_flushed;
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+           CPU_BOOLEAN            parse_done;
+           HTTPs_ERR              err;
+#endif
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS (p_ctr_err, p_instance);
+
+    p_cfg = p_instance->CfgPtr;
+
+    done = DEF_NO;
+    while (done == DEF_NO) {
+        switch (p_conn->State) {
+                                                                /* ------------- PREPARE FOR BODY PARSING ------------- */
+            case HTTPs_CONN_STATE_REQ_BODY_INIT:
+
+                 p_conn->ReqContentLenRxd = 0u;                 /* Clear the length of data received variable.          */
+
+                                                                /* SET CONN STATE AND SOCKET STATE FOR BODY PARSING.    */
+                 if (p_conn->ReqContentLen == 0) {              /* If all data received (no body) ...                   */
+                                                                /* ... jump to response preparation.                    */
+                     p_conn->SockState   = HTTPs_SOCK_STATE_NONE;
+                     p_conn->State       = HTTPs_CONN_STATE_REQ_READY_SIGNAL;
+                     p_conn->RxBufLenRem = 0;
+                     done                = DEF_YES;
+
+                 } else {                                       /* If a body is present in the request received:        */
+
+                     switch (p_conn->Method) {                  /* (1) Set the conn state for the parsing.              */
+                        case HTTP_METHOD_GET:
+                             p_conn->State = HTTPs_CONN_STATE_REQ_BODY_DATA;
+                             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodGetProcessedCtr);
+                             break;
+
+                        case HTTP_METHOD_HEAD:
+                             p_conn->State = HTTPs_CONN_STATE_REQ_BODY_DATA;
+                             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodHeadProcessedCtr);
+                             break;
+
+                        case HTTP_METHOD_DELETE:
+                             p_conn->State = HTTPs_CONN_STATE_REQ_BODY_DATA;
+                             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodDeleteProcessedCtr);
+                             break;
+
+                        case HTTP_METHOD_PUT:
+                             p_conn->State = HTTPs_CONN_STATE_REQ_BODY_DATA;
+                             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodPutProcessedCtr);
+                             break;
+
+                        case HTTP_METHOD_POST:
+                                                                /* Check if the POST Content-Type matches with those ...*/
+                                                                /* ... the server core can parse.                       */
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+                             if (p_conn->ReqContentType == HTTP_CONTENT_TYPE_APP_FORM) {
+                                 p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_APP_PARSE;
+                             } else if (p_conn->ReqContentType == HTTP_CONTENT_TYPE_MULTIPART_FORM) {
+                                 p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_INIT;
+                             } else {
+                                 p_conn->State = HTTPs_CONN_STATE_REQ_BODY_DATA;
+                             }
+#else
+                             HTTPs_ERR_INC(p_ctr_err->Req_ErrBodyFormNotEn);
+                             p_conn->State = HTTPs_CONN_STATE_REQ_BODY_DATA;
+#endif
+                             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodPostProcessedCtr);
+                             break;
+
+                        default:
+                             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodUnsupportedProcessedCtr);
+                             p_conn->ErrCode = HTTPs_ERR_REQ_METHOD_NOT_SUPPORTED;
+                             p_conn->State   = HTTPs_CONN_STATE_ERR_INTERNAL;
+                             goto exit;
+                     }
+
+                     if (p_conn->RxBufLenRem == 0) {            /* (2) Set the socket state.                            */
+                         p_conn->SockState = HTTPs_SOCK_STATE_RX;  /* Need to Rx more data for parsing step.            */
+                         done              = DEF_YES;
+                     } else {
+                         p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                     }
+                 }
+                 break;
+
+                                                                /* ----- NOTIFY UPPER APP THAT DATA IS AVAILABLE ------ */
+            case HTTPs_CONN_STATE_REQ_BODY_DATA:
+                 body_hook_def = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnReqBodyRxHook);
+                                                                /* If the hook for the body is defined.                 */
+                 if (body_hook_def == DEF_TRUE) {
+                                                                /* Call the hook function.                              */
+                     hook_continue = p_cfg->HooksPtr->OnReqBodyRxHook(p_instance,
+                                                                      p_conn,
+                                                                      p_cfg->Hooks_CfgPtr,
+                                                                      p_conn->RxBufPtr,
+                                                                      p_conn->RxBufLenRem,
+                                                                     &data_len_rd);
+
+                     if ((data_len_rd         > p_conn->RxBufLenRem) &&
+                         (p_conn->RxBufLenRem > 0)                   ){   /* Fatal error.                               */
+                         p_conn->ErrCode = HTTPs_ERR_REQ_BODY_FAULT;
+                         p_conn->State   = HTTPs_CONN_STATE_ERR_INTERNAL;
+                         goto exit;
+                     }
+
+                                                                /* Update length of data consumed.                      */
+                     p_conn->RxBufLenRem      -= data_len_rd;
+                     p_conn->ReqContentLenRxd += data_len_rd;
+                     p_conn->RxBufPtr         += data_len_rd;
+
+                     if (hook_continue == DEF_NO) {             /* Case when the App doesn't want to rx more data.      */
+                                                                /* While there is data to receive, flush it.            */
+                         p_conn->State     = HTTPs_CONN_STATE_REQ_BODY_FLUSH_DATA;
+                         p_conn->SockState = HTTPs_SOCK_STATE_RX;
+
+                     } else {
+                                                                /* If there is more data to read                        */
+                         if (p_conn->ReqContentLenRxd < p_conn->ReqContentLen) {
+                                                                /* Ask for more data.                                   */
+                             p_conn->State     = HTTPs_CONN_STATE_REQ_BODY_DATA;
+                             p_conn->SockState = HTTPs_SOCK_STATE_RX;
+                         } else {
+                                                                /* Otherwise, prepare the request response body.        */
+                             p_conn->State     = HTTPs_CONN_STATE_REQ_READY_SIGNAL;
+                             p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                         }
+                     }
+                 } else {                                       /* Case hook is not defined: flush data rx.             */
+                    p_conn->State     = HTTPs_CONN_STATE_REQ_BODY_FLUSH_DATA;
+                    p_conn->SockState = HTTPs_SOCK_STATE_RX;
+                 }
+                 done = DEF_YES;
+                 break;
+
+                                                                /* ----------- PARSE FORM RECEIVED IN POST ------------ */
+            case HTTPs_CONN_STATE_REQ_BODY_FORM_APP_PARSE:
+            case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_INIT:
+            case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_PARSE:
+            case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_OPEN:
+            case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_WR:
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+                 parse_done = HTTPsReq_BodyForm(p_instance, p_conn, &err);
+                 switch (err) {
+                     case HTTPs_ERR_NONE:
+                          if (parse_done == DEF_YES) {
+                              p_conn->State     = HTTPs_CONN_STATE_REQ_READY_SIGNAL;
+                              p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                              done = DEF_YES;
+                          }
+                          break;
+
+                     case HTTPs_ERR_REQ_MORE_DATA_REQUIRED:
+                          done              = DEF_YES;
+                          p_conn->SockState = HTTPs_SOCK_STATE_RX;
+                          break;
+
+                     default:
+                         done              = DEF_YES;
+                         p_conn->ErrCode   = err;
+                         p_conn->State     = HTTPs_CONN_STATE_ERR_INTERNAL;
+                         p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                         HTTPs_ERR_INC(p_ctr_err->Req_ErrBodyPostFormCtr);
+                         break;
+                 }
+#else
+                 HTTPs_ERR_INC(p_ctr_err->Req_ErrBodyFormNotEn);
+                 p_conn->ErrCode   = HTTPs_ERR_CFG_INVALID_FORM_EN;
+                 p_conn->State     = HTTPs_CONN_STATE_ERR_INTERNAL;
+                 p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+#endif
+                 break;
+
+                                                                /* ---------- FLUSH ALL REMAINING BODY DATA ----------- */
+            case HTTPs_CONN_STATE_REQ_BODY_FLUSH_DATA:
+                 p_conn->ReqContentLenRxd += p_conn->RxBufLenRem;
+                 p_conn->RxBufLenRem       = 0;
+
+                 if ((p_conn->ReqContentLen    == 0                    ) ||
+                     (p_conn->ReqContentLenRxd >= p_conn->ReqContentLen)) {
+
+                                                                /* If there is no more data to receive. Process status. */
+                     req_flushed = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_REQ_FLUSH);
+                     if (req_flushed == DEF_YES) {
+                         p_conn->State = HTTPs_CONN_STATE_RESP_PREPARE;
+                     } else {
+                         p_conn->State = HTTPs_CONN_STATE_REQ_READY_SIGNAL;
+                     }
+                     p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                 } else {
+                                                                /* While there is data to receive, flush it.            */
+                     p_conn->State     = HTTPs_CONN_STATE_REQ_BODY_FLUSH_DATA;
+                     p_conn->SockState = HTTPs_SOCK_STATE_RX;
+                 }
+                 done = DEF_YES;
+                 break;
+
+
+            default:
+                 HTTPs_ERR_INC(p_ctr_err->Req_ErrBodyStateUnknownCtr);
+                 p_conn->ErrCode = HTTPs_ERR_STATE_UNKNOWN;
+                 p_conn->State   = HTTPs_CONN_STATE_ERR_INTERNAL;
+                 goto exit;
+            }
+    }
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsReq_RdySignal()
+*
+* Description : Signal the upper application that the request was received completely and that it can
+*               start the request processing.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : DEF_YES, if upper application has finish the request processing.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsConn_Process().
+*
+* Note(s)     : (1) If the request processing by the application is not completed the poll hook will be called
+*                   until it's done.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsReq_RdySignal (HTTPs_INSTANCE  *p_instance,
+                                 HTTPs_CONN      *p_conn)
+{
+    const  HTTPs_CFG      *p_cfg        = p_instance->CfgPtr;
+           HTTPs_KEY_VAL  *p_key_val    = DEF_NULL;
+           CPU_BOOLEAN     hook_def     = DEF_NO;
+           CPU_BOOLEAN     process_done = DEF_NO;
+
+
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+    p_key_val = p_conn->FormDataListPtr;
+#endif
+
+    switch (p_conn->State) {
+                                                                /* ------------ POST DATA RX TO USER APP -------------- */
+        case HTTPs_CONN_STATE_REQ_READY_SIGNAL:
+             hook_def = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnReqRdySignalHook);
+             if (hook_def == DEF_YES) {
+                                                                /* Callback fnct process data.                          */
+                 process_done = p_cfg->HooksPtr->OnReqRdySignalHook(p_instance,
+                                                                    p_conn,
+                                                                    p_cfg->Hooks_CfgPtr,
+                                             (const HTTPs_KEY_VAL *)p_key_val);
+
+                 if (process_done != DEF_YES) {
+                     p_conn->State = HTTPs_CONN_STATE_REQ_READY_POLL;
+                 }
+
+             } else {
+                 process_done = DEF_YES;
+             }
+             break;
+
+
+                                                                /* ----------- WAIT END OF DATA PROCESSING ------------ */
+        case HTTPs_CONN_STATE_REQ_READY_POLL:
+             hook_def = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnReqRdyPollHook);
+             if (hook_def == DEF_YES) {
+                                                                /* Wait until data processing is completed.             */
+                 process_done = p_cfg->HooksPtr->OnReqRdyPollHook(p_instance,
+                                                                  p_conn,
+                                                                  p_cfg->Hooks_CfgPtr);
+
+             } else {
+                 process_done = DEF_YES;
+             }
+             break;
+
+
+        default:
+             process_done    = DEF_YES;
+             p_conn->ErrCode = HTTPs_ERR_STATE_UNKNOWN;
+             p_conn->State   = HTTPs_CONN_STATE_ERR_INTERNAL;
+    }
+
+    return (process_done);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsReq_MethodParse()
+*
+* Description : Parse request Method
+*
+* Argument(s) : p_instance      Pointer to the instance.
+*               ----------      Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn          Pointer to the connection.
+*               -----           Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE                          Headers successfully parsed.
+*
+*                           HTTPs_ERR_REQ_FORMAT_INV                Impossible to parse request headers.
+*                            HTTPs_ERR_REQ_METHOD_NOT_SUPPORTED      Method not supported.
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsReq_Handle().
+*
+* Note(s)     : (2) RFC #2616, Section 5.1.1 'Method' defines request line methods:
+*
+*                       The Method token indicates the method to be performed on the resource identified by the
+*                       Request-URI. The method is case-sensitive.
+*
+*                           Method         = "OPTIONS"                ; Section 9.2
+*                                          | "GET"                    ; Section 9.3
+*                                          | "HEAD"                   ; Section 9.4
+*                                          | "POST"                   ; Section 9.5
+*                                          | "PUT"                    ; Section 9.6
+*                                          | "DELETE"                 ; Section 9.7
+*                                          | "TRACE"                  ; Section 9.8
+*                                          | "CONNECT"                ; Section 9.9
+*                                          | extension-method
+*                           extension-method = token
+*
+*                       The list of methods allowed by a resource can be specified in an Allow header field
+*                       (section 14.7). The return code of the response always notifies the client whether a
+*                       method is currently allowed on a resource, since the set of allowed methods can change
+*                       dynamically. An origin server SHOULD return the status code 405 (Method Not Allowed)
+*                       if the method is known by the origin server but not allowed for the requested resource,
+*                       and 501 (Not Implemented) if the method is unrecognized or not implemented by the origin
+*                       server. The methods GET and HEAD MUST be supported by all general-purpose servers. All
+*                       other methods are OPTIONAL; however, if the above methods are implemented, they MUST be
+*                       implemented with the same semantics as those specified in section 9.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsReq_MethodParse (HTTPs_INSTANCE  *p_instance,
+                                    HTTPs_CONN      *p_conn,
+                                    HTTPs_ERR       *p_err)
+{
+    CPU_CHAR              *p_request_method_start;
+    CPU_CHAR              *p_request_method_end;
+    CPU_SIZE_T             len;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    CPU_INT32U             method;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+
+    len = p_conn->RxBufLenRem;
+
+    if (len <= sizeof(HTTP_STR_METHOD_GET)) {                   /* Check minimum length of RxBuf.                       */
+       *p_err = HTTPs_ERR_REQ_FORMAT_INVALID;
+        return;
+    }
+                                                                /* Move the start ptr to the first meanningful char.    */
+    p_request_method_start = HTTP_StrGraphSrchFirst(p_conn->RxBufPtr, len);
+    if (p_request_method_start == DEF_NULL) {
+       *p_err = HTTPs_ERR_REQ_FORMAT_INVALID;
+        return;
+    }
+    len -= p_request_method_start - p_conn->RxBufPtr ;
+                                                                /* Find the end of method string.                       */
+    p_request_method_end =  Str_Char_N(p_request_method_start, len, ASCII_CHAR_SPACE);
+    if (p_request_method_end == DEF_NULL) {
+       *p_err = HTTPs_ERR_REQ_FORMAT_INVALID;
+        return;
+    }
+    len = p_request_method_end - p_request_method_start;
+                                                                /* Try to match the Method str received.                */
+    method = HTTP_Dict_KeyGet(HTTP_Dict_ReqMethod,
+                              HTTP_Dict_ReqMethodSize,
+                              p_request_method_start,
+                              DEF_YES,
+                              len);
+                                                                /* Validate the DictionaryKey search results            */
+    if (method == HTTP_DICT_KEY_INVALID) {
+        p_conn->Method = HTTP_METHOD_UNKNOWN;
+    } else {
+        p_conn->Method = (HTTP_METHOD)method;
+    }
+
+    switch (p_conn->Method) {
+        case HTTP_METHOD_GET:
+             p_conn->RespBodyDataType = HTTPs_BODY_DATA_TYPE_FILE;
+             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodGetRxdCtr);
+             break;
+
+        case HTTP_METHOD_HEAD:
+             p_conn->RespBodyDataType = HTTPs_BODY_DATA_TYPE_FILE;
+             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodHeadRxdCtr);
+             break;
+
+        case HTTP_METHOD_POST:
+             p_conn->RespBodyDataType = HTTPs_BODY_DATA_TYPE_NONE;
+             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodPostRxdCtr);
+             break;
+
+        case HTTP_METHOD_DELETE:
+             p_conn->RespBodyDataType = HTTPs_BODY_DATA_TYPE_NONE;
+             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodDeleteRxdCtr);
+             break;
+
+        case HTTP_METHOD_PUT:
+             p_conn->RespBodyDataType = HTTPs_BODY_DATA_TYPE_NONE;
+             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodPutRxdCtr);
+             break;
+
+        case HTTP_METHOD_TRACE:
+        case HTTP_METHOD_CONNECT:
+        case HTTP_METHOD_UNKNOWN:
+        default:
+             HTTPs_STATS_INC(p_ctr_stats->Req_StatMethodUnsupportedRxdCtr);
+            *p_err = HTTPs_ERR_REQ_METHOD_NOT_SUPPORTED;
+             return;
+    }
+                                                                /* Update the RxBuf ptr.                                */
+    p_conn->RxBufLenRem -= len;
+    p_conn->RxBufPtr     = p_request_method_end;
+
+   *p_err = HTTPs_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                          HTTPsReq_URI_Parse()
+*
+* Description : Parse request URI and check for potential query string.
+*
+* Argument(s) : p_instance      Pointer to the instance.
+*               ----------      Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn          Pointer to the connection.
+*               -----           Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE                          Headers successfully parsed.
+*
+*                           HTTPs_ERR_REQ_MORE_DATA_REQUIRED        More data are required to parse the request line.
+*                           HTTPs_ERR_REQ_FORMAT_INV                Impossible to parse request headers.
+*                            HTTPs_ERR_REQ_URI_LEN                   URI path to long to be handled.
+*
+* Return(s)   : DEF_YES,       if potential query string is found.
+*
+*               DEF_NO,     if NO potential query string is found.
+*
+* Caller(s)   : HTTPs_Req().
+*
+* Note(s)     : (1) The Request-URI is a Uniform Resource Identifier (section 3.2) and identifies the resource
+*                   upon which to apply the request.
+*
+*                       Request-URI = "*" | absoluteURI | abs_path | authority
+*
+*                   (a) The asterisk "*" means that the request does not apply to a particular resource, but to
+*                       the server itself, and is only allowed when the method used does not necessarily apply
+*                       to a resource. One example would be
+*
+*                           OPTIONS * HTTP/1.1
+*
+*                   (b) The absoluteURI form is REQUIRED when the request is being made to a proxy. The proxy is
+*                       requested to forward the request or service it from a valid cache, and return the response.
+*                       Note that the proxy MAY forward the request on to another proxy or directly to the server
+*                       specified by the absoluteURI. In order to avoid request loops, a proxy MUST be able to
+*                       recognize all of its server names, including any aliases, local variations, and the numeric
+*                       IP address. An example Request-Line would be:
+*
+*                           GET http://www.w3.org/pub/WWW/TheProject.html HTTP/1.1
+*
+*                       To allow for transition to absoluteURIs in all requests in future versions of HTTP, all
+*                       HTTP/1.1 servers MUST accept the absoluteURI form in requests, even though HTTP/1.1 clients
+*                       will only generate them in requests to proxies.
+*
+*                   (c) The authority form is only used by the CONNECT method (section 9.9).
+*
+*                   (d) The most common form of Request-URI is that used to identify a resource on an origin server or
+*                       gateway. In this case the absolute path of the URI MUST be transmitted (see section 3.2.1,
+*                       abs_path) as the Request-URI, and the network location of the URI (authority) MUST be transmitted
+*                       in a Host header field. For example, a client wishing to retrieve the resource above directly
+*                       from the origin server would create a TCP connection to port 80 of the host "www.w3.org" and send
+*                       the lines:
+*
+*                           GET /pub/WWW/TheProject.html HTTP/1.1
+*                           Host: www.w3.org
+*
+*                       followed by the remainder of the Request. Note that the absolute path cannot be empty; if none
+*                       is present in the original URI, it MUST be given as "/" (the server root).
+*
+*                   (e) The Request-URI is transmitted in the format specified in section 3.2.1. If the Request-URI is
+*                       encoded using the "% HEX HEX" encoding [42], the origin server MUST decode the Request-URI in
+*                       order to properly interpret the request. Servers SHOULD respond to invalid Request-URIs with an
+*                       appropriate status code.
+*
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPsReq_URI_Parse (HTTPs_INSTANCE  *p_instance,
+                                         HTTPs_CONN      *p_conn,
+                                         HTTPs_ERR       *p_err)
+{
+    const  HTTPs_CFG   *p_cfg;
+           CPU_CHAR    *p_request_uri_start;
+           CPU_CHAR    *p_request_uri_end;
+           CPU_CHAR    *p_request_uri_separator;
+           CPU_INT32U   len;
+           CPU_SIZE_T   len_decoded;
+           CPU_BOOLEAN  is_query_found;
+
+
+    p_cfg          = p_instance->CfgPtr;
+    is_query_found = DEF_NO;
+    len            = p_conn->RxBufLenRem;
+                                                                /* Move the start ptr to the first meanningful char.    */
+    p_request_uri_start = HTTP_StrGraphSrchFirst(p_conn->RxBufPtr, len);
+    if (p_request_uri_start == DEF_NULL) {
+       *p_err = HTTPs_ERR_REQ_FORMAT_INVALID;
+        return (is_query_found);
+    }
+                                                                /* Find the end of the URI including the potential...   */
+                                                                /* ...query str.                                        */
+    len -= p_request_uri_start - p_conn->RxBufPtr ;
+    p_request_uri_end =  Str_Char_N(p_request_uri_start, len, ASCII_CHAR_SPACE);
+    if (p_request_uri_end != DEF_NULL) {
+        len = p_request_uri_end - p_request_uri_start;          /* Recalculate the len to narrow the search.            */
+    }
+                                                                /* Try to find a '?' for query string.                  */
+    p_request_uri_separator = Str_Char_N(p_request_uri_start, len, ASCII_CHAR_QUESTION_MARK);
+    if (p_request_uri_separator == DEF_NULL) {                  /* If no query string or a full    URI is found...      */
+        if (p_request_uri_end == DEF_NULL) {
+            if (p_conn->RxBufPtr != p_conn->BufPtr) {           /* ...and if the buffer is not full...                  */
+                                                                /* ... get more data.                                   */
+               *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+            } else {
+                                                                /* ... but if the buffer is full, generate an error.    */
+               *p_err = HTTPs_ERR_REQ_FORMAT_INVALID;
+            }
+            return (is_query_found);
+        }
+
+    } else {
+        is_query_found = DEF_YES;
+        len            = p_request_uri_separator - p_request_uri_start;
+    }
+
+    if (len > p_conn->PathLenMax) {                             /* If unable to store req'd URI.                        */
+       *p_err = HTTPs_ERR_REQ_URI_LEN;                          /* Resp with internal err page.                         */
+        return (is_query_found);
+    }
+
+    p_request_uri_start[len] = ASCII_CHAR_NULL;                 /* Replace the char at the end of the URI by NULL.      */
+
+
+
+    if (len > 1) {                                              /* Req'd URI is not the default.                        */
+                                                                /* Copy req'd URI.                                      */
+        len_decoded = len;
+
+        HTTP_URL_DecodeStr(p_request_uri_start,
+                           p_conn->PathPtr,
+                          &len_decoded);
+
+        p_conn->PathPtr[len_decoded] = ASCII_CHAR_NULL;
+
+    } else {                                                    /* Default page req'd.                                  */
+                                                                /* Copy dflt file path.                                 */
+        Str_Copy_N(p_conn->PathPtr,
+                   p_cfg->DfltResourceNamePtr,
+                   p_conn->PathLenMax);
+    }
+                                                                /* Update rem len avail in the rx buf.                  */
+    p_conn->RxBufLenRem -= (&p_request_uri_start[len] - p_conn->RxBufPtr) + 1;
+    p_conn->RxBufPtr     =  &p_request_uri_start[len] + 1;
+
+   *p_err = HTTPs_ERR_NONE;
+
+    return (is_query_found);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsReq_QueryStrParse()
+*
+* Description : Parse request query string.
+*
+* Argument(s) :  p_instance      Pointer to the instance.
+*               ----------      Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn          Pointer to the connection.
+*               -----           Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE                          Headers successfully parsed.
+*
+*                           HTTPs_ERR_REQ_MORE_DATA_REQUIRED        More data are required to parse the request line.
+*                           HTTPs_ERR_REQ_FORMAT_INV                Impossible to parse request headers.
+*
+*                           ------------ RETURNED BY HTTPsReq_QueryStrKeyValBlkAdd() -------------
+*                           See HTTPsReq_QueryStrKeyValBlkAdd() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HTTPsReq_Handle().
+*
+* Note(s)     : (1) RFC #3986, Section 3.4 "Query" state:
+*
+*                         The query component contains non-hierarchical data that, along with
+*                                   data in the path component (Section 3.3), serves to identify a
+*                                       resource within the scope of the URI's scheme and naming authority
+*                                   (if any).  The query component is indicated by the first question
+*                                   mark ("?") character and terminated by a number sign ("#") character
+*                                   or by the end of the URI.
+*
+*                           (2) W3C Recommendations :
+*
+*
+*                           http://www.w3.org/Addressing/URL/4_URI_Recommentations.html
+*
+*                        (2) Each query must be Key-Value Pair separated by a equals sign ('=').
+*
+*                        (3) Control names and values are escaped. Space characters are replaced by `+', and then
+*                   reserved characters are escaped as described in [RFC1738], section 2.2: Non-alphanumeric
+*                   characters are replaced by '%HH', a percent sign and two hexadecimal digits representing
+*                   the ASCII code of the character. Line breaks are represented as "CR LF" pairs
+*                   (i.e., '%0D%0A').
+*********************************************************************************************************
+*/
+
+static  void  HTTPsReq_QueryStrParse (HTTPs_INSTANCE  *p_instance,
+                                      HTTPs_CONN      *p_conn,
+                                      HTTPs_ERR       *p_err)
+{
+    CPU_CHAR     *p_req_line_end   = DEF_NULL;
+    CPU_CHAR     *p_query_str_end  = DEF_NULL;
+    CPU_CHAR     *p_field_start    = DEF_NULL;
+    CPU_CHAR     *p_field_end      = DEF_NULL;
+    CPU_INT32U    len              = p_conn->RxBufLenRem;
+    CPU_INT32U    len_rd           = 0;
+    CPU_INT32U    key_val_pair_len = 0;
+    CPU_BOOLEAN   done             = DEF_NO;
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+    CPU_BOOLEAN   success          = DEF_NO;
+#endif
+
+
+                                                                /* Check for the end of the request line.               */
+    p_req_line_end = Str_Str_N(p_conn->RxBufPtr, STR_CR_LF, len);
+    if (p_req_line_end != DEF_NULL) {
+        len = p_req_line_end - p_conn->RxBufPtr;
+    }
+
+                                                                /* Check for the end of the query string.               */
+    p_query_str_end = Str_Char_N(p_conn->RxBufPtr, len, ASCII_CHAR_SPACE);
+    if (p_query_str_end != DEF_NULL) {
+        len = p_query_str_end - p_conn->RxBufPtr + 1;           /* If found, set the query length.                      */
+    }
+
+    p_field_start = p_conn->RxBufPtr;
+
+    while (done == DEF_NO) {
+                                                                /* Search for the query string char separator (&).      */
+        p_field_end = Str_Char_N(p_field_start, len, ASCII_CHAR_AMPERSAND);
+        if (p_field_end == DEF_NULL) {                          /* If not found, check if it's the last query string.   */
+            if (p_query_str_end == DEF_NULL) {
+                if (len == p_conn->BufLen) {
+                   *p_err = HTTPs_ERR_CFG_INVALID_BUF_LEN;
+                } else {
+                   *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+                }
+                goto exit_update;
+            } else {
+                done        = DEF_YES;                          /* Last field of query string.                          */
+                p_field_end = p_query_str_end;
+            }
+        }
+
+                                                                /* Get the length of the key-value pair found.          */
+        key_val_pair_len = p_field_end - p_field_start;
+        if (key_val_pair_len == 0u){                            /* In the case it's null, the query has been fully ...  */
+           *p_err = HTTPs_ERR_NONE;                             /* ...parsed and it has finished by a '&'.              */
+            goto exit_update;
+        }
+
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+        success = HTTPsReq_QueryStrKeyValBlkAdd(p_instance,
+                                                p_conn,
+                                                p_field_start,
+                                                key_val_pair_len,
+                                                p_err);
+        if (success == DEF_FAIL) {
+            goto exit_update;
+        }
+#endif
+
+        p_field_start += (key_val_pair_len + 1);
+        len           -= (key_val_pair_len + 1);
+        len_rd        += (key_val_pair_len + 1);
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit_update:
+    p_conn->RxBufLenRem -= len_rd;
+    p_conn->RxBufPtr    += len_rd;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPsReq_QueryStrKeyValBlkAdd()
+*
+* Description : Add query field received in the Query String to the query list.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*
+*               p_conn      Pointer to the connection.
+*
+*               p_str       Pointer to start of query field string.
+*
+*               str_len     Length of query field.
+*
+* Return(s)   : DEF_OK,   if query field successfully added to the list.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPsReq_QueryStrParse().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  HTTPsReq_QueryStrKeyValBlkAdd (HTTPs_INSTANCE  *p_instance,
+                                                    HTTPs_CONN      *p_conn,
+                                                    CPU_CHAR        *p_str,
+                                                    CPU_SIZE_T       str_len,
+                                                    HTTPs_ERR       *p_err)
+{
+    const  HTTPs_CFG       *p_cfg;
+           HTTPs_KEY_VAL   *p_key_val;
+           CPU_BOOLEAN      result;
+
+
+    p_cfg = p_instance->CfgPtr;
+
+    if (p_cfg->QueryStrCfgPtr != DEF_NULL) {
+
+        if (p_cfg->QueryStrCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+            if (p_conn->QueryStrBlkAcquiredCtr >= p_cfg->QueryStrCfgPtr->NbrPerConnMax) {
+               *p_err = HTTPs_ERR_KEY_VAL_CFG_POOL_SIZE_INV;
+                return (DEF_FAIL);
+            }
+        }
+
+        p_key_val = HTTPsMem_QueryStrKeyValBlkGet(p_instance,   /* Acquire Key-Value block.                             */
+                                                  p_conn,
+                                                  p_err);
+        if (p_key_val == DEF_NULL) {                            /* If no Key-Value block available.                     */
+            return (DEF_FAIL);
+        }
+
+        result = HTTPsReq_URL_EncodeStrParse(p_instance,
+                                             p_conn,
+                                             p_key_val,
+                                             DEF_YES,
+                                             p_str,
+                                             str_len);
+        if (result == DEF_FAIL) {
+           *p_err = HTTPs_ERR_QUERY_STR_PARSE_FAULT;
+            return (DEF_FAIL);
+        }
+
+        if (p_conn->QueryStrListPtr == DEF_NULL) {
+            p_key_val->NextPtr = DEF_NULL;
+        } else {
+            p_key_val->NextPtr = p_conn->QueryStrListPtr;
+        }
+
+        p_conn->QueryStrListPtr = p_key_val;
+
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsReq_ProtocolVerParse()
+*
+* Description : Parse request protocol version
+*
+* Argument(s) : p_instance      Pointer to the instance.
+*               ----------      Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn          Pointer to the connection.
+*               -----           Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE                              Headers successfully parsed.
+*
+*                           HTTPs_ERR_REQ_MORE_DATA_REQUIRED            More data are required to parse the request line.
+*                           HTTPs_ERR_REQ_FORMAT_INV                    Impossible to parse request headers.
+*                            HTTPs_ERR_REQ_PROTOCOL_VER_NOT_SUPPORTED    Protocol version not supported.
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_Req().
+*
+* Note(s)     : (1) At the time of implementing this HTTP server version, only the following HTTP version
+*                   are known:
+*
+*                       (a) HTTP/0.9
+*                       (b) HTTP/1.0
+*                       (c) HTTP/1.1
+*
+*               (2) RFC #2616, Section 19.6 "Compatibility with Previous Versions" state:
+*
+*                       It is beyond the scope of a protocol specification to mandate
+*                       compliance with previous versions. HTTP/1.1 was deliberately
+*                       designed, however, to make supporting previous versions easy. It is
+*                       worth noting that, at the time of composing this specification
+*                       (1996), we would expect commercial HTTP/1.1 servers to:
+*
+*                          - recognize the format of the Request-Line for HTTP/0.9, 1.0, and
+*                            1.1 requests;
+*                          - understand any valid request in the format of HTTP/0.9, 1.0, or
+*                            1.1;
+*                       And we would expect HTTP/1.1 clients to:
+*
+*                          - recognize the format of the Status-Line for HTTP/1.0 and 1.1
+*                            responses;
+*
+*                          - understand any valid response in the format of HTTP/0.9, 1.0, or
+*                            1.1.
+*
+*                       For most implementations of HTTP/1.0, each connection is established
+*                       by the client prior to the request and closed by the server after
+*                       sending the response. Some implementations implement the Keep-Alive
+*                       version of persistent connections described in section 19.7.1 of RFC
+*                       2068 [33].
+*********************************************************************************************************
+*/
+
+static  void  HTTPsReq_ProtocolVerParse (HTTPs_INSTANCE  *p_instance,
+                                         HTTPs_CONN      *p_conn,
+                                         HTTPs_ERR       *p_err)
+{
+#if (HTTPs_CFG_PERSISTENT_CONN_EN == DEF_ENABLED)
+    const  HTTPs_CFG             *p_cfg = p_instance->CfgPtr;
+#endif
+           CPU_CHAR              *p_protocol_ver_start;
+           CPU_CHAR              *p_protocol_ver_end;
+           CPU_INT32U             len;
+           CPU_INT32U             protocol_ver;
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+
+    len = p_conn->RxBufLenRem;
+    if (len == 0) {                                             /* If there's no more remaining char and the last...    */
+       *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+        return;
+    }
+                                                                /* Move the pointer to the next meaningful char.        */
+    p_protocol_ver_start = HTTP_StrGraphSrchFirst(p_conn->RxBufPtr, len);
+    if (p_protocol_ver_start == DEF_NULL) {
+       *p_err               = HTTPs_ERR_REQ_FORMAT_INVALID;
+        return;
+    }
+                                                                /* Find the end of the request line.                    */
+    p_protocol_ver_end = Str_Str_N(p_protocol_ver_start, STR_CR_LF, len);
+    if (p_protocol_ver_end == DEF_NULL) {                       /* If not found, check to get more data.                */
+        if (p_conn->RxBufPtr != p_conn->BufPtr) {
+           *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+        } else {
+           *p_err = HTTPs_ERR_REQ_FORMAT_INVALID;
+        }
+        return;
+    }
+
+    len          = p_protocol_ver_end - p_protocol_ver_start;
+                                                                /* Try to match the Protocol version string.            */
+    protocol_ver = HTTP_Dict_KeyGet(HTTP_Dict_ProtocolVer,
+                                    HTTP_Dict_ProtocolVerSize,
+                                    p_protocol_ver_start,
+                                    DEF_YES,
+                                    len);
+
+                                                                /* Validate the DictionaryKey search results            */
+    if (protocol_ver == HTTP_DICT_KEY_INVALID) {
+         p_conn->ProtocolVer =  HTTP_PROTOCOL_VER_UNKNOWN;
+    } else {
+         p_conn->ProtocolVer = (HTTP_PROTOCOL_VER)protocol_ver;
+    }
+
+    switch (p_conn->ProtocolVer) {
+        case HTTP_PROTOCOL_VER_0_9:
+             HTTPs_STATS_INC(p_ctr_stats->Req_StatProtocolVer0_9Ctr);
+             break;
+
+        case HTTP_PROTOCOL_VER_1_0:
+             HTTPs_STATS_INC(p_ctr_stats->Req_StatProtocolVer1_0Ctr);
+             break;
+
+        case HTTP_PROTOCOL_VER_1_1:
+#if (HTTPs_CFG_PERSISTENT_CONN_EN == DEF_ENABLED)
+             if (p_cfg->ConnPersistentEn == DEF_ENABLED)
+             DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_CONN_PERSISTENT);
+#endif
+             HTTPs_STATS_INC(p_ctr_stats->Req_StatProtocolVer1_1Ctr);
+             break;
+
+        case HTTP_PROTOCOL_VER_UNKNOWN:
+        default:
+             HTTPs_STATS_INC(p_ctr_stats->Req_StatProtocolVerUnsupportedCtr);
+             p_conn->ProtocolVer = HTTP_PROTOCOL_VER_1_1;
+            *p_err               = HTTPs_ERR_REQ_PROTOCOL_VER_NOT_SUPPORTED;
+             return;
+    }
+                                                                /* Update the RxBuf ptr.                                */
+    p_conn->RxBufLenRem      -= (p_protocol_ver_end - p_conn->RxBufPtr) + 2;
+    p_conn->RxBufPtr          =  p_protocol_ver_end + 2;
+
+   *p_err = HTTPs_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsReq_HdrParse()
+*
+* Description : (1) Parse request headers:
+*
+*                   (a) Analyze fields contained in the field header section
+*                   (b) Store field value:
+*
+*                       (1) Store Content type field
+*                           (a) Content type application
+*                           (b) Content type multipart
+*
+*                       (2) Content length*
+*                       (3) Host
+*
+*                   (c) Update receive connection parameters
+*
+* Argument(s) : p_instance      Pointer to the instance.
+*               ----------      Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn          Pointer to the connection.
+*               -----           Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE                          Headers successfully parsed.
+*
+*                           HTTPs_ERR_REQ_MORE_DATA_REQUIRED        More data are required to parse the request line.
+*                           HTTPs_ERR_REQ_FORMAT_INV                Impossible to parse request headers.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsReq_Handle().
+*
+* Note(s)     : (2) RFC #2616, Section "5.3 Request Header Fields" describe the request header field definitions
+*
+*                   (a) The request-header fields allow the client to pass additional information about the
+*                       request, and about the client itself, to the server. These fields act as request
+*                       modifiers, with semantics equivalent to the parameters on a programming language
+*                       method invocation.
+*
+*                           request-header = Accept
+*                                          | Accept-Charset
+*                                          | Accept-Encoding
+*                                          | Accept-Language
+*                                          | Authorization
+*                                          | Expect
+*                                          | From
+*                                          | Host
+*                                          | If-Match
+*                                          | If-Modified-Since
+*                                          | If-None-Match
+*                                          | If-Range
+*                                          | If-Unmodified-Since
+*                                          | Max-Forwards
+*                                          | Proxy-Authorization
+*                                          | Range
+*                                          | Referer
+*                                          | TE
+*                                          | User-Agent
+*
+*                       Request-header field names can be extended reliably only in combination with a change
+*                       in the protocol version. However, new or experimental header fields MAY be given the
+*                       semantics of request- header fields if all parties in the communication recognize
+*                       them to be request-header fields. Unrecognized header fields are treated as
+*                       entity-header fields.
+*
+*               (3) HTML 4.01 Specification section "17.13 Form submission" explain how user agents submit
+*                   form data to form processing agents:
+*
+*                   (a) The content type "application/x-www-form-urlencoded" is the default content type.
+*
+*                   (b) The content type "multipart/form-data" should be used for submitting forms that contain files,
+*                       non-ASCII data, and binary data.
+*
+*                       The content "multipart/form-data" follows the rules of all multipart MIME data streams as
+*                       outlined in [RFC2045]. The definition of "multipart/form-data" is available at the [IANA]
+*                       registry.
+*
+*                       If the user selected a second (image) file "file2.gif", the user agent might construct the parts as follows:
+*
+*                           Content-Type: multipart/form-data; boundary=AaB03x
+*********************************************************************************************************
+*/
+
+static  void  HTTPsReq_HdrParse (HTTPs_INSTANCE  *p_instance,
+                                 HTTPs_CONN      *p_conn,
+                                 HTTPs_ERR       *p_err)
+{
+           CPU_CHAR              *p_field;
+           CPU_CHAR              *p_field_end;
+           CPU_CHAR              *p_val;
+           CPU_INT32U             field_key;
+           HTTP_HDR_FIELD         field;
+           CPU_INT16U             len;
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+           CPU_CHAR              *p_str;
+           HTTPs_INSTANCE_ERRS   *p_ctr_errs;
+           HTTP_DICT       *p_field_dict_entry;
+           HTTPs_HDR_BLK         *p_req_hdr_blk;
+           HTTPs_HDR_VAL_TYPE     val_type;
+           CPU_BOOLEAN            keep;
+#endif
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+    const  HTTP_DICT       *p_dictionary;
+#endif
+#if ((HTTPs_CFG_HDR_RX_EN       == DEF_ENABLED) || \
+     (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED))
+    const  HTTPs_CFG             *p_cfg;
+#endif
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+    HTTPs_SET_PTR_ERRS( p_ctr_errs,  p_instance);
+#endif
+
+#if ((HTTPs_CFG_HDR_RX_EN       == DEF_ENABLED) || \
+     (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED))
+    p_cfg = p_instance->CfgPtr;
+#endif
+
+                                                                /* ------------------- #### NET-35. ------------------- */
+
+    p_field = p_conn->RxBufPtr;                                 /* Ptr should be prev moved to beginning of req hdr.    */
+    while (p_field  != DEF_NULL) {                              /* Analyze each field in the req hdr section.           */
+        p_field_end  = Str_Str_N(p_field,                       /* Find end of the field.                               */
+                                 STR_CR_LF,
+                                 p_conn->RxBufLenRem);
+
+
+                                                                /* ------------------ ANALYZE FIELD ------------------- */
+        if ((p_field_end != DEF_NULL) &&                        /* If the field and val are present.                    */
+            (p_field_end  > p_field) ) {
+            len = p_field_end - p_field;
+                                                                /* Get field key by comparing field name.               */
+            field_key = HTTP_Dict_KeyGet(HTTP_Dict_HdrField,
+                                         HTTP_Dict_HdrFieldSize,
+                                         p_field,
+                                         DEF_NO,
+                                         len);
+            if (field_key != HTTP_DICT_KEY_INVALID) {
+                field = (HTTP_HDR_FIELD)field_key;
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+                                                                /* Get field dictionary entry.                          */
+                p_field_dict_entry = HTTP_Dict_EntryGet(HTTP_Dict_HdrField,
+                                                        HTTP_Dict_HdrFieldSize,
+                                                        field);
+#endif
+
+                                                                /* ----------------- STO FIELD VALUE ------------------ */
+                switch (field) {
+
+
+                                                                /* ------------------- CONTENT TYPE ------------------- */
+                    case HTTP_HDR_FIELD_CONTENT_TYPE:
+                                                                /* Get field val beginning.                             */
+                         p_val = HTTPsReq_HdrParseValGet(p_field,
+                                                         HTTP_STR_HDR_FIELD_CONTENT_TYPE_LEN,
+                                                         p_field_end,
+                                                        &len);
+                         if (p_val != DEF_NULL) {
+                             len   = p_field_end - p_val;
+                                                                /* Get content type key by comparing field val name.    */
+                             field_key = HTTP_Dict_KeyGet(HTTP_Dict_ContentType,
+                                                          HTTP_Dict_ContentTypeSize,
+                                                          p_val,
+                                                          DEF_YES,
+                                                          len);
+                             if (field_key != HTTP_DICT_KEY_INVALID) {
+                                 field = (HTTP_HDR_FIELD)field_key;
+                                 p_conn->ReqContentType = (HTTP_CONTENT_TYPE)field;
+                                 switch (field) {
+
+                                                                /* ----------------- CONTENT TYPE APP ----------------- */
+                                     case HTTP_CONTENT_TYPE_APP_FORM:
+                                          HTTPs_STATS_INC(p_ctr_stats->Req_StatContentTypeFormAppRxdCtr);
+                                                                /* Add content-type to Conn struct.                     */
+                                          break;
+
+
+                                                                /* -------------- CONTENT TYPE MULTIPART -------------- */
+                                     case HTTP_CONTENT_TYPE_MULTIPART_FORM:
+                                          HTTPs_STATS_INC(p_ctr_stats->Req_StatContentTypeFormMultipartRxdCtr);
+                                                                /* Add content-type value to Conn struct.               */
+
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+                                                                /* ----------------- STO BOUNDARY VAL ----------------- */
+                                                                /* Boundary should be located after content type ...    */
+                                                                /* val (see Note #3b).                                  */
+                                                                /* Find end of content type val.                        */
+                                          p_dictionary =  HTTP_Dict_EntryGet(HTTP_Dict_ContentType,
+                                                                             HTTP_Dict_ContentTypeSize,
+                                                                             HTTP_CONTENT_TYPE_MULTIPART_FORM);
+                                          p_val        =  p_val + p_dictionary->StrLen + 1;
+                                          p_val        =  HTTP_StrGraphSrchFirst(p_val, len);
+                                          len          =  len - (p_val - p_field);
+
+                                                                /* Find beginning of boundary token.                    */
+                                          p_val        =  Str_Str_N(p_val,
+                                                                    HTTP_STR_MULTIPART_BOUNDARY,
+                                                                    sizeof(HTTP_STR_MULTIPART_BOUNDARY));
+
+                                          if (p_val == DEF_NULL) {
+                                              *p_err = HTTPs_ERR_REQ_FORMAT_INVALID;
+                                               return;
+                                          }
+
+                                                                /* Boundary located after '='.                          */
+                                          p_val = Str_Char_N(p_val, len, ASCII_CHAR_EQUALS_SIGN);
+                                          p_val++;              /* Remove space before boundary val.                    */
+                                          p_val = HTTP_StrGraphSrchFirst(p_val,
+                                                                         len);
+                                          len   = p_field_end - p_val;
+
+                                                                /* Copy boundary val to Conn struct.                    */
+                                          Str_Copy_N(p_conn->FormBoundaryPtr,
+                                                     p_val,
+                                                     len);
+                                                                /* Make sure to create a string.                        */
+                                          p_conn->FormBoundaryPtr[len] = ASCII_CHAR_NULL;
+
+                                          p_conn->FormBoundaryLen      = len;
+    #endif
+                                          break;
+
+                                     case HTTP_CONTENT_TYPE_UNKNOWN:
+                                         HTTPs_STATS_INC(p_ctr_stats->Req_StatContentTypeUnknownRxdCtr);
+                                         break;
+
+                                     default:
+                                         HTTPs_STATS_INC(p_ctr_stats->Req_StatContentTypeOtherRxdCtr);
+                                         break;
+                                 }
+                             }
+
+                         } else {                               /* Should not occurs.                                   */
+                            *p_err   = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+                             return;
+                         }
+                         break;
+
+
+                                                                /* ------------------- CONTENT LEN -------------------- */
+                    case HTTP_HDR_FIELD_CONTENT_LEN:
+                                                                /* Find content len strg val.                           */
+                         p_val = HTTPsReq_HdrParseValGet(p_field,
+                                                         HTTP_STR_HDR_FIELD_CONTENT_LEN_LEN,
+                                                         p_field_end,
+                                                        &len);
+
+                                                                /* Convert and copy val to Conn struct.                 */
+                         p_conn->ReqContentLen = Str_ParseNbr_Int32U(p_val, 0, DEF_NBR_BASE_DEC);
+                         break;
+
+
+                                                                /* ----------------------- HOST ----------------------- */
+                    case HTTP_HDR_FIELD_HOST:
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+                                                                /* Find beginning of host string val.                   */
+                         p_val = HTTPsReq_HdrParseValGet(p_field,
+                                                         HTTP_STR_HDR_FIELD_HOST_LEN,
+                                                         p_field_end,
+                                                        &len);
+
+                         len   = DEF_MIN(len, p_cfg->HostNameLenMax);
+
+                                                                /* Copy host name val in Conn struct.                   */
+                         (void)Str_Copy_N(p_conn->HostPtr, p_val, len);
+                                                                /* Make sure to create a string.                        */
+                         p_conn->HostPtr[len] = ASCII_CHAR_NULL;
+#endif
+                         break;
+
+
+                                                                /* -------------------- CONNECTION -------------------- */
+                    case HTTP_HDR_FIELD_CONN:
+                                                                /* Find beginning of connection hdr string val.         */
+                         p_val = HTTPsReq_HdrParseValGet(p_field,
+                                                         HTTP_STR_HDR_FIELD_CONN_LEN,
+                                                         p_field_end,
+                                                        &len);
+                         if (p_val != DEF_NULL) {
+                             len = p_field_end - p_val;
+                                                                /* Get connection key by comparing field val name.      */
+                             field_key = HTTP_Dict_KeyGet(HTTP_Dict_HdrFieldConnVal,
+                                                          HTTP_Dict_HdrFieldConnValSize,
+                                                          p_val,
+                                                          DEF_NO,
+                                                          len);
+                             if (field_key != HTTP_DICT_KEY_INVALID) {
+                                 switch (field_key) {
+                                     case HTTP_HDR_FIELD_CONN_CLOSE:
+                                          DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_CONN_PERSISTENT);
+                                          break;
+
+                                     case HTTP_HDR_FIELD_CONN_PERSISTENT:
+                                     default:
+                                          break;
+                                 }
+                             }
+                         }
+                         break;
+
+
+                    default:
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+                         if ((p_cfg->HdrRxCfgPtr != DEF_NULL) &&
+                             (p_cfg->HooksPtr    != DEF_NULL)) {
+                             keep = p_cfg->HooksPtr->OnReqHdrRxHook(p_instance,
+                                                                    p_conn,
+                                                                    p_cfg->Hooks_CfgPtr,
+                                                                    field);
+
+                             if ((keep                              == DEF_YES                  ) &&
+                                 (p_cfg->HdrRxCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED)) {
+                                 if (p_conn->HdrCtr >= p_cfg->HdrRxCfgPtr->NbrPerConnMax) {
+                                    *p_err = HTTPs_ERR_REQ_HDR_OVERFLOW;
+                                     return;
+                                 }
+                             }
+
+                             if (keep == DEF_YES) {
+                                 switch(field) {
+                                    default:
+                                        val_type = HTTPs_HDR_VAL_TYPE_STR_DYN; /* Only string data type supported.      */
+                                        break;
+                                }
+
+                                                                /* -------------- GET REQ HDR FIELD BLK --------------- */
+                                p_req_hdr_blk = HTTPsMem_ReqHdrGet(                p_instance,
+                                                                                   p_conn,
+                                                                   (HTTP_HDR_FIELD)field,
+                                                                                   val_type,
+                                                                                   p_err);
+                                if (p_req_hdr_blk == DEF_NULL) {
+                                    return;
+                                }
+
+                                p_val = HTTPsReq_HdrParseValGet(p_field,
+                                                                p_field_dict_entry->StrLen,
+                                                                p_field_end,
+                                                               &len);
+                                if (p_val != DEF_NULL) {
+                                    len = p_field_end - p_val;
+
+                                    if (len > p_cfg->HdrRxCfgPtr->DataLenMax) {
+                                        HTTPs_ERR_INC(p_ctr_errs->Req_ErrHdrDataLenInv);
+                                       *p_err = HTTPS_ERR_REQ_HDR_INVALID_VAL_LEN;
+                                        return;
+                                    }
+
+                                                                /* ------------ UPDATE REQ HDR FIELD PARAM ------------ */
+                                    Mem_Copy((void       *) p_req_hdr_blk->ValPtr,
+                                             (const void *) p_val,
+                                             (CPU_SIZE_T  ) len);
+                                                                /* Store only string.                                   */
+                                    p_str                 = (CPU_CHAR *)p_req_hdr_blk->ValPtr + len;
+                                   *p_str                 =  ASCII_CHAR_NULL;
+                                    p_req_hdr_blk->ValLen =  len + 1;
+
+                                } else {
+                                   *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+                                    return;
+                                }
+                            }
+                         }
+#endif
+                         break;
+                }
+            }
+
+                                                                /* --------------- UPDATE RX CONN PARAM --------------- */
+            p_field_end         += STR_CR_LF_LEN;
+            p_conn->RxBufLenRem -= p_field_end - p_field;
+            p_field              = p_field_end;
+            p_conn->RxBufPtr     = p_field;
+
+        } else if (p_field_end  == p_field) {                   /* All field processed.                                 */
+            p_conn->RxBufPtr    += STR_CR_LF_LEN;
+            p_conn->RxBufLenRem -= STR_CR_LF_LEN;
+           *p_err = HTTPs_ERR_NONE;
+            return;
+
+        } else {                                                /* More data req'd to complete processing.              */
+            if (p_conn->RxBufPtr != p_conn->BufPtr) {           /* Check if the buffer is not full.                     */
+               *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+            } else {
+               *p_err = HTTPs_ERR_REQ_FORMAT_INVALID;
+            }
+            return;
+        }
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                   HTTPsReq_HdrParseFieldValGet()
+*
+* Description : Get the beginning of a field value.
+*
+* Argument(s) : p_field         Pointer to the beginning of the field line.
+*               -------         Argument validated in HTTPsReq_HdrParse().
+*
+*               field_len       Field length.
+*
+*               p_field_end     Pointer to the end of the field line.
+*               -----------     Argument validated in HTTPsReq_HdrParse().
+*
+*               p_len_rem       Pointer to a variable that will receive the remaining length.
+*               ---------       Argument validated in HTTPsReq_HdrParse().
+*
+* Return(s)   : Pointer to the beginning of the field value.
+*
+* Caller(s)   : HTTPsReq_HdrParse().
+*
+* Note(s)     : (1) RFC #2616, section "4.2 Message Headers" describe how Header field should be formated.
+*
+*                   (a) HTTP header fields, which include general-header (section 4.5), request-header
+*                       (section 5.3), response-header (section 6.2), and entity-header (section 7.1)
+*                       fields, follow the same generic format as that given in Section 3.1 of RFC 822 [9].
+*                       Each header field consists of a name followed by a colon (":") and the field value.
+*                       Field names are case-insensitive. The field value MAY be preceded by any amount of
+*                       LWS, though a single SP is preferred. Header fields can be extended over multiple
+*                       lines by preceding each extra line with at least one SP or HT. Applications ought
+*                       to follow "common form", where one is known or indicated, when generating HTTP
+*                       constructs, since there might exist some implementations that fail to accept
+*                       anything
+*
+*                       beyond the common forms.
+*
+*                              message-header = field-name ":" [ field-value ]
+*                              field-name     = token
+*                              field-value    = *( field-content | LWS )
+*                              field-content  = 
+*********************************************************************************************************
+*/
+
+static  CPU_CHAR  *HTTPsReq_HdrParseValGet (CPU_CHAR    *p_field,
+                                                 CPU_INT16U   field_len,
+                                                 CPU_CHAR    *p_field_end,
+                                                 CPU_INT16U  *p_len_rem)
+{
+    CPU_INT16U   len;
+    CPU_CHAR    *p_val;
+
+
+    p_val     =  p_field + field_len;
+    len       = (p_field_end - p_val);
+
+    p_val     =  Str_Char_N(p_val, len, ASCII_CHAR_COLON);      /* Field val located after ':' (see Note #1a).          */
+    p_val++;
+
+    len       = (p_field_end - p_val);
+    p_val     =  HTTP_StrGraphSrchFirst(p_val, len);            /* Remove blank space before field value.               */
+
+   *p_len_rem = (p_field_end - p_val);
+
+    return (p_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsReq_BodyForm()
+*
+* Description : (1) Receive and process post data inside received form:
+*
+*                   (a) Initialize connection parameters to parse post data.
+*                   (b) Parse received data.
+*
+*                       (1) Parse application post data.
+*                       (2) Parse multipart   post data.
+*
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE
+*                               HTTPs_ERR_METHOD_POST_STATE_UNKNOWN
+*
+*                               --------------- RETURNED BY HTTPsReq_BodyFormAppParse() ----------------
+*                               See HTTPsReq_BodyFormAppParse() for additional return error codes.
+*
+*                               ------------ RETURNED BY HTTPsReq_BodyFormMultipartParse() -------------
+*                               See HTTPsReq_BodyFormMultipartParse() for additional return error codes.
+*
+* Return(s)   : DEF_YES, if Form processing is done.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsReq_Body().
+*
+* Note(s)     : (1) The ReqContentType should be validated before this function. Otherwise, an INTERNAL_ERROR
+*                   will be triggered.
+*                   Valid Content-Type(s) are:
+*                       HTTPs_CONTENT_TYPE_REQ_APP ||
+*                       HTTPs_CONTENT_TYPE_REQ_MULTIPART
+*
+*               (2) Receive all post data is required before returning response since network buffers are not
+*                   freed before reading it and the stack could come locked if it run out of free buffer.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  HTTPsReq_BodyForm (HTTPs_INSTANCE  *p_instance,
+                                        HTTPs_CONN      *p_conn,
+                                        HTTPs_ERR       *p_err)
+{
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    CPU_BOOLEAN            done;
+
+
+    HTTPs_SET_PTR_ERRS (p_ctr_err, p_instance);
+
+    done = DEF_YES;
+
+    switch (p_conn->State) {
+                                                                /* ----------------- PARSE DATA RX'D ------------------ */
+        case HTTPs_CONN_STATE_REQ_BODY_FORM_APP_PARSE:
+                                                                /* --------------- PARSE APP POST DATA ---------------- */
+             done = HTTPsReq_BodyFormAppParse(p_instance, p_conn, p_err);
+             break;
+
+        case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_INIT:
+        case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_PARSE:
+        case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_OPEN:
+        case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_WR:
+                                                                /* ------------ PARSE MULTIPART POST DATA ------------- */
+#if (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED)
+             done = HTTPsReq_BodyFormMultipartParse(p_instance, p_conn, p_err);
+#else
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrBodyFormMultipartNotEn);
+            *p_err = HTTPs_ERR_CFG_INVALID_FORM_MULTIPART_EN;
+#endif
+             break;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Req_ErrBodyStateUnknownCtr);
+            *p_err = HTTPs_ERR_STATE_UNKNOWN;
+             break;
+    }
+
+    return (done);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsReq_BodyFormAppParse()
+*
+* Description : (1) Parse form content types application:
+*
+*                   (a) Remove undesirable charters
+*                   (b) Validate that the key pair value is completely present.
+*                   (c) Parse control key pair value.
+*                   (d) Update connection control parameters and state.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE
+*                               HTTPs_ERR_REQ_MORE_DATA_REQUIRED
+*
+*                               ------------ RETURNED BY HTTPsReq_BodyFormAppKeyValBlkAdd() -------------
+*                               See HTTPsReq_BodyFormAppKeyValBlkAdd() for additional return error codes.
+*
+* Return(s)   : DEF_YES, if Form parsing is finished.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsReq_BodyForm().
+*
+* Note(s)     : (2) HTML 4.01 Specification section "17.13.4 Form content types" describes the application Form
+*                   content types:
+*
+*                   application/x-www-form-urlencoded
+*
+*                   This is the default content type. Forms submitted with this content type must be encoded
+*                   as follows:
+*
+*                   (a) Control names and values are escaped. Space characters are replaced by `+', and then
+*                       reserved characters are escaped as described in [RFC1738], section 2.2: Non-alphanumeric
+*                       characters are replaced by '%HH', a percent sign and two hexadecimal digits representing
+*                       the ASCII code of the character. Line breaks are represented as "CR LF" pairs
+*                       (i.e., '%0D%0A').
+*
+*                   (b) The control names/values are listed in the order they appear in the document. The name
+*                       is separated from the value by '=' and name/value pairs are separated from each other
+*                       by '&'.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  HTTPsReq_BodyFormAppParse (HTTPs_INSTANCE  *p_instance,
+                                                HTTPs_CONN      *p_conn,
+                                                HTTPs_ERR       *p_err)
+{
+    CPU_CHAR     *p_key_name;
+    CPU_CHAR     *p_key_next;
+    CPU_INT32U    len_content_rxd;
+    CPU_INT16U    len_str;
+    CPU_BOOLEAN   done;
+    CPU_BOOLEAN   result;
+
+
+    done = DEF_NO;
+                                                                /* ------------- REMOVE UNDESIRABLE CHAR -------------- */
+                                                                /* Remove possible blank char before first ctrl name.   */
+    p_key_name =  HTTP_StrGraphSrchFirst(p_conn->RxBufPtr,
+                                         p_conn->RxBufLenRem);
+    if (p_key_name == DEF_NULL) {
+       *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+        goto exit;
+    }
+
+    p_conn->RxBufLenRem      -= (p_key_name - p_conn->RxBufPtr); /* Update rem len avail in the rx buf.                 */
+    p_conn->ReqContentLenRxd += (p_key_name - p_conn->RxBufPtr); /* Update content len received.                        */
+    p_conn->RxBufPtr          =  p_key_name;                     /* Move rx buf ptr.                                    */
+
+    while (done != DEF_YES) {
+                                                                /* ----------- VALIDATE CUR KEY/VAL PAIRS ------------- */
+        p_key_next = Str_Char_N(p_key_name,                     /* Srch beginning of next key/val pairs.                */
+                                p_conn->RxBufLenRem,
+                                ASCII_CHAR_AMPERSAND);
+
+        if (p_key_next == DEF_NULL) {                           /* If next key/val pairs not found ...                  */
+                                                                /* ... determine if all data are received or next ...   */
+                                                                /* ... key/val pairs are missing.                       */
+            len_content_rxd = p_conn->ReqContentLenRxd
+                            + p_conn->RxBufLenRem;
+
+            if (len_content_rxd < p_conn->ReqContentLen) {      /* If data are missing ...                              */
+               *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;       /* ... receive more data.                               */
+                goto exit;
+
+            } else {                                            /* If all data received ...                             */
+                len_str = p_conn->RxBufLenRem;                  /* ... last key/val pairs to parse.                     */
+            }
+
+        } else {                                                /* Next key/val pairs found ...                         */
+            len_str = (p_key_next - p_key_name);                /* ... parse key/val pairs.                             */
+        }
+
+                                                                /* Add key-Value block to list.                         */
+        result = HTTPsReq_BodyFormAppKeyValBlkAdd(p_instance,
+                                                  p_conn,
+                                                  p_key_name,
+                                                  len_str,
+                                                  p_err);
+        if (result == DEF_FAIL) {
+            goto exit;
+        }
+
+                                                                /* ------------ UPDATE CONN CTRLS & STATE ------------- */
+        if (p_key_next != DEF_NULL) {                           /* If not the last key/val pairs.                       */
+
+            len_str = p_key_next                                /* Calculate data parsed ...                            */
+                    - p_key_name                                /* ... include key/val pairs separator.                 */
+                    + 1;
+
+            p_conn->ReqContentLenRxd += len_str;                /* Inc content len processed.                           */
+            p_conn->RxBufLenRem      -= len_str;                /* Dev rem len available in rx buffer.                  */
+            p_key_name                = p_key_next + 1;         /* Set cur key name to next key found.                  */
+            p_conn->RxBufPtr          = p_key_name;             /* Update Rx buf ptr (i.e. if next key/val not found.)  */
+
+        } else {                                                /* If last key/val pairs.                               */
+            p_conn->ReqContentLenRxd += p_conn->RxBufLenRem;    /* Inc content len processed.                           */
+            p_conn->RxBufLenRem       = 0u;                     /* No rem data avail in rx buffer.                      */
+
+            if (p_conn->ReqContentLenRxd >= p_conn->ReqContentLen) {
+                                                                /* If all data received and processed ...               */
+                done = DEF_YES;
+
+            } else {                                            /* If data are missing ...                              */
+               *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;       /* ... receive more data.                               */
+                goto exit;
+            }
+        }
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit:
+    return (done);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsReq_BodyFormAppKeyValBlkAdd()
+*
+* Description : Add received Application form entry to the Key-Value Form list.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*
+*               p_conn      Pointer to the connection.
+*
+*               p_str       Pointer to start of string containing the key-value data.
+*
+*               str_len     Length of the string.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE
+*                               HTTPs_ERR_KEY_VAL_CFG_POOL_SIZE_INV
+*                               HTTPs_ERR_FORM_APP_PARSE_FAULT
+*
+*                               ------------ RETURNED BY HTTPsMem_FormKeyValBlkGet() -------------
+*                               See HTTPsMem_FormKeyValBlkGet() for additional return error codes.
+*
+* Return(s)   : DEF_OK,   if key-value block successfully added to list.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPsReq_BodyFormAppParse().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_FORM_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  HTTPsReq_BodyFormAppKeyValBlkAdd (HTTPs_INSTANCE  *p_instance,
+                                                       HTTPs_CONN      *p_conn,
+                                                       CPU_CHAR        *p_str,
+                                                       CPU_SIZE_T       str_len,
+                                                       HTTPs_ERR       *p_err)
+{
+    const  HTTPs_CFG       *p_cfg;
+           HTTPs_KEY_VAL   *p_key_val;
+           CPU_BOOLEAN      result;
+
+
+    p_cfg = p_instance->CfgPtr;
+
+    if (p_cfg->FormCfgPtr != DEF_NULL) {
+
+                                                                /* Get the next key-value block available.              */
+        if (p_cfg->FormCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+            if (p_conn->FormBlkAcquiredCtr >= p_cfg->FormCfgPtr->NbrPerConnMax) {
+               *p_err = HTTPs_ERR_KEY_VAL_CFG_POOL_SIZE_INV;
+                return (DEF_FAIL);
+            }
+        }
+
+        p_key_val = HTTPsMem_FormKeyValBlkGet(p_instance, p_conn, p_err);
+        if (p_key_val == DEF_NULL) {                            /* If no key-value block available.                     */
+            return (DEF_FAIL);
+        }
+
+        result = HTTPsReq_URL_EncodeStrParse(p_instance,
+                                             p_conn,
+                                             p_key_val,
+                                             DEF_NO,
+                                             p_str,
+                                             str_len);
+        if (result == DEF_FAIL) {
+           *p_err = HTTPs_ERR_FORM_APP_PARSE_FAULT;
+            return (DEF_FAIL);
+        }
+
+        if (p_conn->FormDataListPtr == DEF_NULL) {
+            p_key_val->NextPtr  = DEF_NULL;
+        } else {
+            p_key_val->NextPtr  = p_conn->FormDataListPtr;
+        }
+        p_conn->FormDataListPtr = p_key_val;
+
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsReq_BodyFormMultipartParse()
+*
+* Description : Parse form content types multipart.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE
+*                               HTTPs_ERR_STATE_UNKNOWN
+*
+*                               ------------ RETURNED BY HTTPsReq_BodyFormMultipartCtrlParse() -------------
+*                               See HTTPsReq_BodyFormMultipartCtrlParse() for additional return error codes.
+*
+*                               -------------- RETURNED BY HTTPsReq_BodyFormMultipartFileWr() --------------
+*                               See HTTPsReq_BodyFormMultipartFileWr() for additional return error codes.
+*
+* Return(s)   : DEF_YES, if Form parsing is finished.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsReq_BodyForm().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+static  CPU_BOOLEAN  HTTPsReq_BodyFormMultipartParse (HTTPs_INSTANCE  *p_instance,
+                                                      HTTPs_CONN      *p_conn,
+                                                      HTTPs_ERR       *p_err)
+{
+    CPU_BOOLEAN  done;
+    CPU_BOOLEAN  file_done;
+    CPU_BOOLEAN  is_file;
+
+
+    done = DEF_NO;
+    while (done != DEF_YES) {
+
+        switch (p_conn->State) {
+            case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_INIT:
+            case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_PARSE:
+                                                                /* Parse buffer for key-value pairs.                    */
+                 is_file =  HTTPsReq_BodyFormMultipartCtrlParse(p_instance,
+                                                                p_conn,
+                                                                p_err);
+                 switch (*p_err) {
+                     case HTTPs_ERR_NONE:
+                          if (is_file == DEF_YES) {
+                              p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_OPEN;
+                          } else {
+                              if (p_conn->ReqContentLenRxd >= p_conn->ReqContentLen) {
+                                  done = DEF_YES;
+                              }
+                          }
+                          break;
+
+                     case HTTPs_ERR_REQ_MORE_DATA_REQUIRED:
+                          goto exit;
+
+                     default:
+                          goto exit;
+                 }
+                 break;
+
+
+            case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_OPEN:
+            case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_WR:
+                 file_done = HTTPsReq_BodyFormMultipartFileWr(p_instance,
+                                                              p_conn,
+                                                              p_err);
+                 switch (*p_err) {
+                     case HTTPs_ERR_NONE:
+                          if (file_done == DEF_YES) {
+                              p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_INIT;
+                          } else {
+                              p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_WR;
+                          }
+                          break;
+
+                     case HTTPs_ERR_REQ_MORE_DATA_REQUIRED:
+                          p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_WR;
+                          goto exit;
+
+                     default:
+                          goto exit;
+                 }
+                 break;
+
+
+            default:
+               *p_err = HTTPs_ERR_STATE_UNKNOWN;
+                goto exit;
+        }
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit:
+    return (done);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                               HTTPsReq_BodyFormMultipartBoundarySrch()
+*
+* Description : Search for first boundary in data buffer.
+*
+* Argument(s) : p_boundary      Pointer to string that contains the boundary to search for.
+*
+*               boundary_len    Boundary length.
+*
+*               p_buf           Pointer to buffer where to start to search in.
+*
+*               buf_len         Buffer length.
+*
+*               p_boundary_sep  Pointer that will be set if the buffer end with possible beginning of a boundary.
+*
+* Return(s)   : Pointer to the boundary, if successfully found.
+*
+*               Null pointer, otherwise.
+*
+* Caller(s)   : HTTPsReq_BodyFormMultipartParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+static  CPU_CHAR  *HTTPsReq_BodyFormMultipartBoundarySrch (CPU_CHAR     *p_boundary,
+                                                           CPU_INT08U    boundary_len,
+                                                           CPU_CHAR     *p_buf,
+                                                           CPU_INT16U    buf_len,
+                                                           CPU_CHAR    **p_boundary_sep)
+{
+    CPU_CHAR    *p_boundary_found;
+    CPU_CHAR    *p_str;
+    CPU_INT16U   len;
+
+
+   (void)&p_boundary_sep;
+
+    if (buf_len <= 0)  {
+       *p_boundary_sep = DEF_NULL;
+        p_boundary_found = DEF_NULL;
+        goto exit;
+    }
+
+    p_str = DEF_NULL;
+    len   = HTTPs_STR_MULTIPART_DATA_START_LEN;
+
+    p_str = HTTPs_StrMemSrch(p_buf,                             /* Search for boundary separator in the buffer.         */
+                             buf_len,
+                             HTTPs_STR_MULTIPART_DATA_START,
+                             len);
+    if (p_str == DEF_NULL) {
+        if ((p_buf[buf_len - 1] == ASCII_CHAR_CARRIAGE_RETURN) ||
+            (p_buf[buf_len - 1] == ASCII_CHAR_LINE_FEED)       ||
+            (p_buf[buf_len - 1] == ASCII_CHAR_HYPHEN_MINUS)   ) {
+            *p_boundary_sep   = p_buf + buf_len - 1;
+             p_boundary_found = DEF_NULL;
+             goto exit;
+        } else {
+            *p_boundary_sep   = DEF_NULL;
+             p_boundary_found = DEF_NULL;
+             goto exit;
+        }
+    }
+
+   *p_boundary_sep = p_str;
+
+    len = buf_len - (p_str - p_buf);
+    if (len > boundary_len) {
+        p_boundary_found = HTTPs_StrMemSrch(p_str,              /* Search for boundary in the buffer.                   */
+                                            len,
+                                            p_boundary,
+                                            boundary_len);
+
+        p_str = p_buf + buf_len - boundary_len - HTTPs_STR_MULTIPART_DATA_START_LEN;
+
+                                                                /* Boundary is not found :                              */
+        if (( p_boundary_found == DEF_NULL) &&                  /* Case when separator "--" is found inside data, ...   */
+            (*p_boundary_sep    <  p_str)  ) {                  /* ... set separator before end of buffer in case ...   */
+                                                                /* ... start of boundary is at the end of buffer.       */
+             *p_boundary_sep = p_str;
+        }
+                                                                /* Boundary is found :                                  */
+        if (p_boundary_found != DEF_NULL) {                     /* Insure that separator "--" is just before boundary...*/
+           *p_boundary_sep = p_boundary_found - 2;              /* ... and not in data.                                 */
+        }
+
+    } else {
+        p_boundary_found = DEF_NULL;
+        goto exit;
+    }
+
+
+exit:
+    return (p_boundary_found);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 HTTPsReq_BodyFormMultipartCtrlParse()
+*
+* Description : (1) Parse and store multipart key-value pair data:
+*
+*                   (a) Found Boundary in buffer.
+*                   (b) Found if multipart field is a file.
+*                   (c) Found the filename if it's a file or the key string if it's a key-value pair.
+*                   (d) Acquire Form Key-Value block.
+*                   (c) Store key string or filename string.
+*                   (d) Store value string.
+*
+*
+* Argument(s) : p_instance  Pointer to current HTTP server instance.
+*
+*               p_conn      Pointer to HTTP server current connection object.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE
+*                               HTTPs_ERR_CFG_NULL_PTR_FORM
+*                               HTTPs_ERR_CFG_INVALID_BUF_LEN
+*                               HTTPs_ERR_REQ_MORE_DATA_REQUIRED
+*                               HTTPs_ERR_FORM_FORMAT_INV
+*                               HTTPs_ERR_KEY_VAL_CFG_POOL_SIZE_INV
+*                               HTTPs_ERR_STATE_UNKNOWN
+*
+*                               ------------ RETURNED BY HTTPsMem_FormKeyValBlkGet() -------------
+*                               See HTTPsMem_FormKeyValBlkGet() for additional return error codes.
+*
+* Return(s)   : DEF_YES, if the current multipart field contains a file.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsReq_BodyFormMultipartParse().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+static  CPU_BOOLEAN  HTTPsReq_BodyFormMultipartCtrlParse (HTTPs_INSTANCE  *p_instance,
+                                                          HTTPs_CONN      *p_conn,
+                                                          HTTPs_ERR       *p_err)
+{
+    const  HTTPs_CFG      *p_cfg          = p_instance->CfgPtr;
+           CPU_CHAR       *p_buf          = p_conn->RxBufPtr;
+           CPU_CHAR       *p_boundary     = DEF_NULL;
+           CPU_CHAR       *p_boundary_sep = DEF_NULL;
+           CPU_CHAR       *p_key          = DEF_NULL;
+           CPU_CHAR       *p_filename     = DEF_NULL;
+           CPU_CHAR       *p_filename_end = DEF_NULL;
+           CPU_CHAR       *p_end          = DEF_NULL;
+           CPU_CHAR       *p_str          = DEF_NULL;
+           CPU_CHAR       *p_data         = DEF_NULL;
+           HTTPs_KEY_VAL  *p_key_val      = DEF_NULL;
+           CPU_CHAR        path_sep;
+           CPU_SIZE_T      len            = 0;
+           CPU_BOOLEAN     is_file        = DEF_NO;
+
+
+    if (p_cfg->FormCfgPtr == DEF_NULL) {
+       *p_err = HTTPs_ERR_CFG_NULL_PTR_FORM;
+        return (DEF_YES);
+    }
+
+    switch (p_conn->State) {
+                                                                /* ---- FOUND BOUNDARY IN DATA RECEIVED IN BUFFER ----- */
+        case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_INIT:
+
+                                                                /* Search for boundary token in the buffer.             */
+             p_boundary = HTTPsReq_BodyFormMultipartBoundarySrch(p_conn->FormBoundaryPtr,
+                                                                 p_conn->FormBoundaryLen,
+                                                                 p_conn->RxBufPtr,
+                                                                 p_conn->RxBufLenRem,
+                                                                &p_boundary_sep);
+             if (p_boundary == DEF_NULL) {
+                 if (p_conn->RxBufLenRem == p_conn->BufLen) {
+                    *p_err = HTTPs_ERR_CFG_INVALID_BUF_LEN;
+                 } else {
+                    *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+                 }
+                 goto exit;
+             }
+
+             if ((p_conn->FormDataListPtr != DEF_NULL) &&       /* Copy previous value to last key-val block.           */
+                 (p_boundary_sep          != p_buf)   ) {
+                 p_key_val = p_conn->FormDataListPtr;
+                 if (p_key_val->DataType != HTTPs_KEY_VAL_TYPE_FILE) {
+                     len = (p_boundary - p_buf) - HTTPs_STR_MULTIPART_DATA_START_LEN - STR_CR_LF_LEN;
+                     len = DEF_MIN(len, p_cfg->FormCfgPtr->ValLenMax - 1);
+                     Str_Copy_N(p_key_val->ValPtr, p_buf, len);
+                     p_key_val->ValPtr[len] = ASCII_CHAR_NULL;
+                     p_key_val->ValLen      = len;
+                 }
+             }
+
+                                                                /* Check if there is data after boundary in buffer.     */
+             len = (p_conn->RxBufPtr + p_conn->RxBufLenRem) - p_boundary;
+             if (len < (p_conn->FormBoundaryLen + HTTPs_STR_MULTIPART_LAST_LEN)) {
+                 p_conn->ReqContentLenRxd += (p_boundary_sep - p_buf);
+                 p_conn->RxBufLenRem      -= (p_boundary_sep - p_buf);
+                 p_conn->RxBufPtr         += (p_boundary_sep - p_buf);
+                *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+                 goto exit;
+             }
+
+             p_str = p_boundary + p_conn->FormBoundaryLen;
+
+             p_str = Str_Str_N(p_str,                           /* Find last boundary of multipart section.             */
+                               HTTPs_STR_MULTIPART_LAST,
+                               p_conn->RxBufLenRem);
+             if ((p_str != DEF_NULL) &&
+                 (p_str == (p_boundary + p_conn->FormBoundaryLen))) {
+                 p_conn->ReqContentLenRxd += p_conn->RxBufLenRem;
+                 p_conn->RxBufPtr         += p_conn->RxBufLenRem;
+                 p_conn->RxBufLenRem       = 0;
+                *p_err = HTTPs_ERR_NONE;
+                 goto exit;
+             }
+
+             p_str = p_boundary + p_conn->FormBoundaryLen;
+
+             p_str = Str_Str_N(p_str,                           /* Find end of boundary (CRLF).                         */
+                               STR_CR_LF,                       /* CRLF found must be just after the boundary.          */
+                               p_conn->RxBufLenRem);
+             if ((p_str == DEF_NULL)                               ||
+                 (p_str != (p_boundary + p_conn->FormBoundaryLen))) {
+                *p_err = HTTPs_ERR_FORM_FORMAT_INV;
+                 goto exit;
+             }
+
+             p_str +=  STR_CR_LF_LEN;
+
+                                                                /* Update Connection parameters.                        */
+             p_conn->ReqContentLenRxd += (p_str - p_buf);
+             p_conn->RxBufLenRem      -= (p_str - p_buf);
+             p_conn->RxBufPtr         += (p_str - p_buf);
+
+             p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_PARSE;
+             break;
+
+
+                                                                /* -------- FOUND KEY STRING IN DATA RECEIVED --------- */
+        case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_PARSE:
+             p_data = Str_Str_N(p_buf,                          /* Find end of key section.                             */
+                                HTTPs_STR_MULTIPART_CTRL_END_SEC,
+                                p_conn->RxBufLenRem);
+             if (p_data == DEF_NULL) {
+                if (p_conn->RxBufLenRem == p_conn->BufLen) {
+                   *p_err = HTTPs_ERR_CFG_INVALID_BUF_LEN;
+                } else {
+                   *p_err = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+                }
+                goto exit;
+             }
+
+             p_data += HTTPs_STR_MULTIPART_CTRL_END_SEC_LEN;    /* Beginning of data.                                   */
+
+             len = p_data - p_buf;
+
+                                                                /* Determine if it's a file.                            */
+             p_filename = HTTP_Dict_StrKeySrch(HTTP_Dict_MultipartField,
+                                               HTTP_Dict_MultipartFieldSize,
+                                               HTTP_MULTIPART_FIELD_FILE_NAME,
+                                               p_conn->RxBufPtr,
+                                               len);
+             if (p_filename != DEF_NULL) {
+                 is_file = DEF_YES;
+
+                 len = p_data - p_filename;
+                                                                /* Find beginning of filename.                          */
+                 p_filename = Str_Char_N(p_filename, len, ASCII_CHAR_QUOTATION_MARK);
+                 if (p_filename == DEF_NULL) {
+                    *p_err = HTTPs_ERR_FORM_FORMAT_INV;
+                     goto exit;
+                 }
+                 p_filename++;
+                                                                /* Find end of filename.                                */
+                 p_filename_end = Str_Char_N(p_filename, len, ASCII_CHAR_QUOTATION_MARK);
+                 if (p_filename_end == DEF_NULL) {
+                    *p_err = HTTPs_ERR_FORM_FORMAT_INV;
+                     goto exit;
+                 }
+                *p_filename_end = ASCII_CHAR_NULL;
+
+             }
+
+                                                            /* Find key name.                                       */
+             p_key = HTTP_Dict_StrKeySrch(HTTP_Dict_MultipartField,
+                                          HTTP_Dict_MultipartFieldSize,
+                                          HTTP_MULTIPART_FIELD_NAME,
+                                          p_conn->RxBufPtr,
+                                          p_conn->RxBufLenRem);
+             if (p_key != DEF_NULL) {
+                 len = p_data - p_key;
+                                                             /* Find beginning of key.                               */
+                 p_key = Str_Char_N(p_key, len, ASCII_CHAR_QUOTATION_MARK);
+                 if (p_key == DEF_NULL) {
+                    *p_err = HTTPs_ERR_FORM_FORMAT_INV;
+                     goto exit;
+                 }
+                 p_key++;
+                                                             /* Find end of key name.                                */
+                 p_end = Str_Char_N(p_key, len, ASCII_CHAR_QUOTATION_MARK);
+                 if (p_end == DEF_NULL) {
+                    *p_err = HTTPs_ERR_FORM_FORMAT_INV;
+                     goto exit;
+                 }
+             }
+
+
+             if ((p_filename == DEF_NULL) &&                    /* 'filename' or 'name' string MUST be found.           */
+                 (p_key      == DEF_NULL)) {
+                 *p_err = HTTPs_ERR_FORM_FORMAT_INV;
+                  goto exit;
+             }
+
+                                                                /* --------------- ACQUIRE KEY-VALUE BLK -------------- */
+             if (p_cfg->FormCfgPtr->NbrPerConnMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+                 if (p_conn->FormBlkAcquiredCtr >= p_cfg->FormCfgPtr->NbrPerConnMax) {
+                    *p_err = HTTPs_ERR_KEY_VAL_CFG_POOL_SIZE_INV;
+                     goto exit;
+                 }
+             }
+
+             p_key_val = HTTPsMem_FormKeyValBlkGet(p_instance,
+                                                   p_conn,
+                                                   p_err);
+             if (p_key_val == DEF_NULL) {                       /* If no Key-Value block available.                     */
+                 goto exit;                                     /* Returns with p_err from previous fnct call.          */
+             } else {
+                 if (p_conn->FormDataListPtr == DEF_NULL) {
+                     p_key_val->NextPtr = DEF_NULL;
+                 } else {
+                     p_key_val->NextPtr = p_conn->FormDataListPtr;
+                 }
+                 p_conn->FormDataListPtr = p_key_val;
+             }
+
+             if (p_key != DEF_NULL) {                           /* Copy Key string found to key-value block.            */
+                 len = p_end - p_key;
+                 len = DEF_MIN(len, p_cfg->FormCfgPtr->KeyLenMax - 1);
+                 Str_Copy_N(p_key_val->KeyPtr, p_key, len);
+                 p_key_val->KeyPtr[len] = ASCII_CHAR_NULL;
+                 p_key_val->KeyLen      = len;
+
+                 if (p_filename == DEF_NULL) {
+                     p_key_val->DataType = HTTPs_KEY_VAL_TYPE_PAIR;
+                 }
+
+                 p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_INIT;
+
+             }
+
+             if (p_filename != DEF_NULL) {
+                 p_key_val->DataType = HTTPs_KEY_VAL_TYPE_FILE;
+
+                 if (p_key == DEF_NULL) {
+                     p_key_val->KeyPtr[0] = ASCII_CHAR_NULL;
+                 }
+
+                 switch (p_cfg->FS_Type) {
+                     case HTTPs_FS_TYPE_NONE:
+                          path_sep = HTTPs_PATH_SEP_CHAR_DFLT;
+                          break;
+
+                     case HTTPs_FS_TYPE_STATIC:
+                     case HTTPs_FS_TYPE_DYN:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+                          path_sep = p_instance->FS_PathSepChar;
+#else
+                         *p_err = HTTPs_ERR_CFG_INVALID_FS_EN;
+                          goto exit;
+#endif
+                          break;
+
+                     default:
+                         *p_err = HTTPs_ERR_CFG_INVALID_FS_TYPE;
+                          goto exit;
+                 }
+
+                 HTTPs_StrPathFormat(p_filename,                /* Format file path and store in value string.          */
+                                     p_cfg->FormCfgPtr->MultipartFileUploadFolderPtr,
+                                     p_key_val->ValPtr,
+                                     p_cfg->FormCfgPtr->ValLenMax,
+                                     path_sep);
+
+                 len = Str_Len_N(p_key_val->ValPtr, p_cfg->FormCfgPtr->ValLenMax);
+
+                 p_key_val->ValLen = len;
+
+                 p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_OPEN;
+             }
+
+             p_conn->ReqContentLenRxd += (p_data - p_buf);
+             p_conn->RxBufPtr         += (p_data - p_buf);
+             p_conn->RxBufLenRem      -= (p_data - p_buf);
+             break;
+
+
+        default:
+            *p_err = HTTPs_ERR_STATE_UNKNOWN;
+             goto exit;
+
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit:
+    return (is_file);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  HTTPsReq_BodyFormMultipartFileWr()
+*
+* Description : (1) File received in multipart form processing:
+*
+*                   (a) Open file
+*                   (b) Write data to file until boundary is found in buffer.
+*                   (c) Close file, if all file data is received or in case of an error.
+*
+* Argument(s) : p_instance  Pointer to current HTTP server instance.
+*
+*               p_conn      Pointer to HTTP server current connection object.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               HTTPs_ERR_NONE
+*                               HTTPs_ERR_FORM_FILE_UPLOAD_OPEN
+*                               HTTPs_ERR_FILE_WR_FAULT
+*                               HTTPs_ERR_REQ_MORE_DATA_REQUIRED
+*                               HTTPs_ERR_STATE_UNKNOWN
+*
+* Return(s)   : DEF_YES, if file file writing is done and file is closed.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsReq_BodyFormMultipartParse().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if ((HTTPs_CFG_FORM_EN             == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN   == DEF_ENABLED))
+static  CPU_BOOLEAN  HTTPsReq_BodyFormMultipartFileWr (HTTPs_INSTANCE  *p_instance,
+                                                       HTTPs_CONN      *p_conn,
+                                                       HTTPs_ERR       *p_err)
+{
+    const  HTTPs_CFG             *p_cfg = p_instance->CfgPtr;
+    const  NET_FS_API            *p_fs_api;
+           CPU_CHAR              *p_boundary;
+           CPU_CHAR              *p_boundary_sep;
+           CPU_SIZE_T             len;
+           CPU_SIZE_T             tmp;
+           CPU_SIZE_T             len_wr;
+           CPU_SIZE_T             len_wr_tot;
+           CPU_BOOLEAN            fs_op;
+           CPU_BOOLEAN            done;
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+
+    switch (p_cfg->FS_Type) {
+        case HTTPs_FS_TYPE_NONE:
+             p_fs_api = DEF_NULL;
+             break;
+
+        case HTTPs_FS_TYPE_STATIC:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+            p_fs_api = ((HTTPs_CFG_FS_STATIC *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+#else
+            p_fs_api = DEF_NULL;
+#endif
+            break;
+
+        case HTTPs_FS_TYPE_DYN:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+            p_fs_api = ((HTTPs_CFG_FS_DYN *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+#else
+            p_fs_api = DEF_NULL;
+#endif
+            break;
+
+        default:
+           *p_err = HTTPs_ERR_CFG_INVALID_FS_TYPE;
+            goto exit;
+    }
+
+    done = DEF_NO;
+
+    if (p_fs_api == DEF_NULL) {
+        HTTPs_STATS_INC(p_ctr_stats->Req_StatFormFileUploadNoFS_Ctr);
+    }
+
+    switch (p_conn->State) {
+        case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_OPEN:
+             if ((p_fs_api                                 != DEF_NULL)    &&
+                 (p_cfg->FormCfgPtr->MultipartFileUploadEn == DEF_ENABLED)) {
+
+                 if (p_cfg->FormCfgPtr->MultipartFileUploadOverWrEn == DEF_ENABLED) {
+
+                     p_conn->DataPtr = p_fs_api->Open(p_conn->FormDataListPtr->ValPtr,
+                                                      NET_FS_FILE_MODE_CREATE,
+                                                      NET_FS_FILE_ACCESS_WR);
+                     if (p_conn->DataPtr == DEF_NULL) {
+                        *p_err = HTTPs_ERR_FORM_FILE_UPLOAD_OPEN;
+                         goto exit;
+                     }
+                     HTTPs_STATS_INC(p_ctr_stats->Req_StatFormFileUploadOpenedCtr);
+
+                 } else {
+
+                     p_conn->DataPtr = p_fs_api->Open(p_conn->FormDataListPtr->ValPtr,
+                                                      NET_FS_FILE_MODE_CREATE_NEW,
+                                                      NET_FS_FILE_ACCESS_WR);
+
+                 }
+
+             }
+             p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_WR;
+             break;
+
+
+        case HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_WR:
+             p_boundary_sep = DEF_NULL;
+                                                               /* Search for boundary token in the buffer.             */
+             p_boundary = HTTPsReq_BodyFormMultipartBoundarySrch(p_conn->FormBoundaryPtr,
+                                                                 p_conn->FormBoundaryLen,
+                                                                 p_conn->RxBufPtr,
+                                                                 p_conn->RxBufLenRem,
+                                                                &p_boundary_sep);
+
+             if (p_boundary_sep == DEF_NULL) {                  /* Calculate length of data to write in file.           */
+                 len = p_conn->RxBufLenRem;
+             } else {
+                 tmp = p_boundary_sep - p_conn->RxBufPtr;
+                 if (tmp < STR_CR_LF_LEN) {
+                     len = 0;
+                 } else {
+                     len = tmp - STR_CR_LF_LEN;
+                 }
+             }
+                                                                /* Write data to the file.                              */
+             if ((p_fs_api                                 != DEF_NULL)    &&
+                 (p_cfg->FormCfgPtr->MultipartFileUploadEn == DEF_ENABLED) &&
+                 (p_conn->DataPtr                          != DEF_NULL)   ) {
+                 len_wr_tot = 0;
+                 fs_op      = DEF_OK;
+                 while ((fs_op      != DEF_FAIL) &&
+                        (len_wr_tot  < len)     ) {
+                     fs_op = p_fs_api->Wr(              p_conn->DataPtr,
+                                          (CPU_INT08U *)p_conn->RxBufPtr,
+                                                        len,
+                                                       &len_wr);
+
+                     len_wr_tot += len_wr;
+                 }
+
+                 if (fs_op == DEF_FAIL) {                       /* If write operation fault exit with error.            */
+                     p_conn->ReqContentLenRxd += p_conn->RxBufLenRem;
+                     p_conn->RxBufPtr         += p_conn->RxBufLenRem;
+                     p_conn->RxBufLenRem       = 0;
+
+                     HTTPs_STATS_INC(p_ctr_stats->Req_StatFormFileUploadClosedCtr);
+                     p_fs_api->Close(p_conn->DataPtr);
+                     p_conn->DataPtr = DEF_NULL;
+
+                     done  = DEF_YES;
+                    *p_err = HTTPs_ERR_FILE_WR_FAULT;
+                     goto exit;
+                 }
+             } else {
+                 len_wr_tot = len;
+             }
+
+                                                                /* Update Connection parameters.                        */
+             p_conn->RxBufPtr         += len_wr_tot;
+             p_conn->RxBufLenRem      -= len_wr_tot;
+             p_conn->ReqContentLenRxd += len_wr_tot;
+
+             if (p_boundary == DEF_NULL) {
+                 p_conn->State = HTTPs_CONN_STATE_REQ_BODY_FORM_MULTIPART_FILE_WR;
+                *p_err         = HTTPs_ERR_REQ_MORE_DATA_REQUIRED;
+                 goto exit;
+
+             } else {
+                 p_conn->RxBufPtr         += STR_CR_LF_LEN;
+                 p_conn->RxBufLenRem      -= STR_CR_LF_LEN;
+                 p_conn->ReqContentLenRxd += STR_CR_LF_LEN;
+
+                 if ((p_fs_api                                 != DEF_NULL)    &&
+                     (p_cfg->FormCfgPtr->MultipartFileUploadEn == DEF_ENABLED) &&
+                     (p_conn->DataPtr                          != DEF_NULL)   ) {
+                     HTTPs_STATS_INC(p_ctr_stats->Req_StatFormFileUploadClosedCtr);
+                     p_fs_api->Close(p_conn->DataPtr);
+                 }
+                 p_conn->DataPtr = DEF_NULL;
+
+                 done            = DEF_YES;
+             }
+             break;
+
+
+        default:
+            *p_err = HTTPs_ERR_STATE_UNKNOWN;
+             goto exit;
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit:
+   return (done);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 HTTPsReq_URL_EncodeStrParse()
+*
+* Description : Populate a new Key-Value block from a URL Encoded String.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*
+*               p_conn      Pointer to the connection.
+*
+*               p_key_val   Pointer to the Key-Value block to populate.
+*
+*               from_query  DEF_YES, if parsing a Query String.
+*                           DEF_NO,  if parsing a HTTP Form.
+*
+*               p_str       Pointer to start of the URL encoded string.
+*
+*               str_len     Length of the URL encoded string.
+*
+* Return(s)   : DEF_OK,   if parsing is successful.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPsReq_BodyFormAppKeyValBlkAdd(),
+*               HTTPsReq_QueryStrKeyValBlkAdd().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if ((HTTPs_CFG_QUERY_STR_EN == DEF_ENABLED) || \
+     ((HTTPs_CFG_FORM_EN     == DEF_ENABLED)))
+static  CPU_BOOLEAN  HTTPsReq_URL_EncodeStrParse (HTTPs_INSTANCE  *p_instance,
+                                                  HTTPs_CONN      *p_conn,
+                                                  HTTPs_KEY_VAL   *p_key_val,
+                                                  CPU_BOOLEAN      from_query,
+                                                  CPU_CHAR        *p_str,
+                                                  CPU_SIZE_T       str_len)
+{
+    const  HTTPs_CFG       *p_cfg;
+           CPU_CHAR        *p_key;
+           CPU_CHAR        *p_val;
+           CPU_CHAR        *p_str_sep;
+           CPU_SIZE_T       key_len;
+           CPU_SIZE_T       val_len;
+           CPU_SIZE_T       key_len_cfg;
+           CPU_SIZE_T       val_len_cfg;
+           CPU_BOOLEAN      result;
+
+
+    p_cfg = p_instance->CfgPtr;
+
+    if (from_query == DEF_YES) {
+        if (p_cfg->QueryStrCfgPtr != DEF_NULL) {
+            key_len_cfg = p_cfg->QueryStrCfgPtr->KeyLenMax - 1;
+            val_len_cfg = p_cfg->QueryStrCfgPtr->ValLenMax - 1;
+        } else {
+            p_conn->ErrCode = HTTPs_ERR_CFG_NULL_PTR_QUERY_STR;
+            return (DEF_FAIL);
+        }
+    } else {
+        if (p_cfg->FormCfgPtr != DEF_NULL) {
+            key_len_cfg = p_cfg->FormCfgPtr->KeyLenMax - 1;
+            val_len_cfg = p_cfg->FormCfgPtr->ValLenMax - 1;
+        } else {
+            p_conn->ErrCode = HTTPs_ERR_CFG_NULL_PTR_FORM;
+            return (DEF_FAIL);
+        }
+    }
+
+                                                                /* Find separator "=".                                  */
+    p_str_sep = Str_Char_N(p_str, str_len, ASCII_CHAR_EQUALS_SIGN);
+
+    p_str[str_len] = ASCII_CHAR_NULL;
+
+    if (p_str_sep != DEF_NULL) {
+        p_val = p_str_sep + 1;
+        p_key = p_str;
+    } else {
+        p_val = p_str_sep;
+        p_key = DEF_NULL;
+    }
+
+                                                                /* --------------- COPY CTRL NAME & VAL --------------- */
+                                                                /* Get and copy the ctrl name.                          */
+    if (p_key != DEF_NULL) {
+
+        key_len = p_str_sep - p_key;
+        key_len = DEF_MIN(key_len, key_len_cfg);
+
+        Str_Copy_N(p_key_val->KeyPtr,
+                   p_key,
+                   key_len);
+
+        p_key_val->DataType = HTTPs_KEY_VAL_TYPE_PAIR;
+
+    } else {
+
+        key_len = 0;
+        p_key_val->DataType = HTTPs_KEY_VAL_TYPE_VAL;
+    }
+
+    p_key_val->KeyPtr[key_len] = ASCII_CHAR_NULL;
+    p_key_val->KeyLen          = key_len;
+
+                                                                /* Get and copy the value.                              */
+    val_len = p_str + str_len - p_val;
+    val_len = DEF_MIN(val_len, val_len_cfg);
+
+    Str_Copy_N(p_key_val->ValPtr,
+               p_val,
+               val_len);
+
+    p_key_val->ValPtr[val_len] = ASCII_CHAR_NULL;
+    p_key_val->ValLen          = val_len;
+
+    result = HTTP_URL_DecodeReplaceStr(p_key_val->KeyPtr,
+                                      &p_key_val->KeyLen);
+    if (result == DEF_FAIL) {
+        return (DEF_FAIL);
+    }
+
+    result = HTTP_URL_DecodeReplaceStr(p_key_val->ValPtr,
+                                      &p_key_val->ValLen);
+    if (result == DEF_FAIL) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_req.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_req.h
new file mode 100644
index 0000000..b99dcad
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_req.h
@@ -0,0 +1,94 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP SERVER REQUEST MODULE
+*
+* Filename      : http-s_req.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPs module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPs_REQ_MODULE_PRESENT                          /* See Note #1.                                         */
+#define  HTTPs_REQ_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  "http-s.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void         HTTPsReq_Handle    (HTTPs_INSTANCE  *p_instance,
+                                 HTTPs_CONN      *p_conn);
+
+void         HTTPsReq_Body      (HTTPs_INSTANCE  *p_instance,
+                                 HTTPs_CONN      *p_conn);
+
+CPU_BOOLEAN  HTTPsReq_RdySignal (HTTPs_INSTANCE  *p_instance,
+                                 HTTPs_CONN      *p_conn);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPs_REQ_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_resp.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_resp.c
new file mode 100644
index 0000000..e16a1f2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_resp.c
@@ -0,0 +1,2883 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP SERVER RESPONSE MODULE
+*
+* Filename      : http-s_resp.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPs_RESP_MODULE
+
+#include  "http-s_resp.h"
+#include  "http-s_mem.h"
+#include  "http-s_str.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            TOKEN DEFINES
+*********************************************************************************************************
+*/
+
+#define  HTTPs_TOKEN_EXTENAL_CHAR_START                     ASCII_CHAR_DOLLAR_SIGN
+#define  HTTPs_TOKEN_INTERNAL_CHAR_START                    ASCII_CHAR_NUMBER_SIGN
+#define  HTTPs_TOKEN_CHAR_VAR_SEP_START                     ASCII_CHAR_LEFT_CURLY_BRACKET
+#define  HTTPs_TOKEN_CHAR_VAR_SEP_END                       ASCII_CHAR_RIGHT_CURLY_BRACKET
+#define  HTTPs_TOKEN_CHAR_OFFSET_LEN                        2u                              /* Length of '${'.          */
+#define  HTTPs_TOKEN_CHAR_DFLT_VAL                          ASCII_CHAR_TILDE
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN          HTTPsResp_PrepareStatusCode          (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn);
+
+static  CPU_BOOLEAN          HTTPsResp_PrepareBodyData            (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn);
+
+static  void                 HTTPsResp_StatusLine                 (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn,
+                                                                          HTTPs_ERR                 *p_err);
+
+static  void                 HTTPsResp_Hdr                        (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn,
+                                                                          HTTPs_ERR                 *p_err);
+
+static  CPU_CHAR            *HTTPsResp_HdrFieldAdd                (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn,
+                                                                          CPU_CHAR                  *p_buf,
+                                                                          CPU_SIZE_T                 buf_len,
+                                                                          HTTP_HDR_FIELD             field_type,
+                                                                          CPU_CHAR                  *p_val,
+                                                                          CPU_SIZE_T                 val_len,
+                                                                          HTTPs_ERR                 *p_err);
+
+static  CPU_BOOLEAN          HTTPsResp_DataTransferStd            (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn,
+                                                                          HTTPs_ERR                 *p_err);
+
+static  CPU_BOOLEAN          HTTPsResp_DataTransferChunkedWithHook(       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn,
+                                                                          HTTPs_ERR                 *p_err);
+
+static  CPU_SIZE_T           HTTPsResp_WrChunkedToBuf             (       CPU_CHAR                  *p_buf,
+                                                                          CPU_SIZE_T                 buf_len,
+                                                                          CPU_SIZE_T                 data_len,
+                                                                          CPU_SIZE_T                 len_dig_str_len);
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+static  CPU_BOOLEAN          HTTPsResp_DataTransferChunked        (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn,
+                                                                          HTTPs_ERR                 *p_err);
+
+static  CPU_INT16U           HTTPsResp_TokenFinder                (       CPU_CHAR                  *p_buf,
+                                                                          CPU_INT16U                 buf_len,
+                                                                          CPU_CHAR                 **p_str_token,
+                                                                          HTTPs_TOKEN_TYPE          *p_token_type,
+                                                                          HTTPs_ERR                 *p_err);
+
+static  CPU_BOOLEAN          HTTPsResp_TokenValSet                (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn,
+                                                                   const  CPU_CHAR                  *p_token,
+                                                                          CPU_INT16U                 token_len,
+                                                                          CPU_CHAR                  *p_val,
+                                                                          CPU_INT16U                 val_len_max);
+#endif
+
+static  void                 HTTPsResp_DfltErrPageSet             (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn);
+
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+static  CPU_BOOLEAN          HTTPsResp_FileOpen                   (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn);
+#endif
+
+static  CPU_SIZE_T           HTTPsResp_DataRd                     (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn,
+                                                                          CPU_CHAR                  *p_dst,
+                                                                          CPU_SIZE_T                 dst_len_max);
+
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+static  void                 HTTPsResp_DataSetPos                 (       HTTPs_INSTANCE            *p_instance,
+                                                                          HTTPs_CONN                *p_conn,
+                                                                          CPU_INT32S                 offset,
+                                                                          CPU_INT08U                 origin);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsResp_Prepare()
+*
+* Description : (1) Prepare server response
+*                   (a) (HOOK) Signal Request Ready to be answered.
+*                   (b) (HOOK) Poll for an answer to the request.
+*                   (c) Prepare the status code.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : DEF_YES, if preparation is done.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsConn_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsResp_Prepare (HTTPs_INSTANCE  *p_instance,
+                                HTTPs_CONN      *p_conn)
+{
+    const  HTTPs_CFG            *p_cfg  = p_instance->CfgPtr;
+           HTTPs_INSTANCE_ERRS  *p_ctr_err;
+           CPU_BOOLEAN           is_err = DEF_NO;
+           CPU_BOOLEAN           result = DEF_NO;
+           CPU_BOOLEAN           done   = DEF_NO;
+
+
+    HTTPs_SET_PTR_ERRS(p_ctr_err, p_instance);
+
+                                                                /* --------------- VALIDATE STATUS CODE --------------- */
+    is_err = HTTPsResp_PrepareStatusCode(p_instance, p_conn);
+
+    if (is_err == DEF_NO) {
+
+        result = HTTPsResp_PrepareBodyData(p_instance, p_conn);
+        if (result == DEF_FAIL) {
+            HTTPs_ERR_INC(p_ctr_err->Resp_ErrPrepareCtr);
+            p_conn->State = HTTPs_CONN_STATE_RESP_PREPARE;
+            goto exit;
+        }
+
+    } else {
+
+        result = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnErrFileGetHook);
+        if (result == DEF_YES) {
+            p_cfg->HooksPtr->OnErrFileGetHook(p_cfg->Hooks_CfgPtr,
+                                              p_conn->StatusCode,
+                                              p_conn->PathPtr,
+                                              p_conn->PathLenMax,
+                                             &p_conn->RespBodyDataType,
+                                             &p_conn->RespContentType,
+                                             &p_conn->DataPtr,
+                                             &p_conn->DataLen);
+
+            result = HTTPsResp_PrepareBodyData(p_instance, p_conn);
+            if (result == DEF_FAIL) {
+                HTTPs_ERR_INC(p_ctr_err->Resp_ErrPrepareErrPageCtr);
+                HTTPsResp_DfltErrPageSet(p_instance, p_conn);
+            }
+        } else {
+            HTTPsResp_DfltErrPageSet(p_instance, p_conn);
+        }
+    }
+
+                                                                /* ------------ RELEASE HDR USE BY REQUEST ------------ */
+#if (HTTPs_CFG_HDR_RX_EN == DEF_ENABLED)
+    while (p_conn->HdrListPtr != DEF_NULL) {
+        HTTPsMem_ReqHdrRelease(p_instance,
+                               p_conn);
+    }
+#endif
+
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+    p_conn->HdrType = HTTPs_HDR_TYPE_RESP;
+#endif
+
+                                                                /* ---------- INITIALIZE RESPONSE PARAMETERS ---------- */
+    p_conn->DataTxdLen = 0u;
+
+    if ((p_conn->Method           != HTTP_METHOD_HEAD         ) &&
+        (p_conn->RespBodyDataType != HTTPs_BODY_DATA_TYPE_NONE)) {
+        DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_RESP_BODY_PRESENT);
+    } else {
+        DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_BODY_PRESENT);
+    }
+
+    done = DEF_YES;
+
+
+exit:
+    return (done);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           HTTPsResp_Handle()
+*
+* Description : (1) Prepare connection to transmit the request response:
+*
+*                   (a) Get file content type and update response state accordingly.
+*                   (b) Parse file token and get their values.
+*                   (b) Prepare response:
+*                       (i)   Prepare response line.
+*                       (ii)  Prepare response header section.
+*                       (iii) Update connection parameters to transmit response.
+*                       (iv)  Update response state to transmit file or to close the connection.
+*
+*                   (c) Transmit file:
+*                       (i)   Read file.
+*                       (ii)  Parse and replace token from the connection buffer.
+*                       (iii) Validate that the file is completely transmitted.
+*
+*                   (d) Close file.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : DEF_YES, if response handling is completed.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsConn_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsResp_Handle (HTTPs_INSTANCE  *p_instance,
+                               HTTPs_CONN      *p_conn)
+{
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    CPU_BOOLEAN            done          = DEF_NO;
+    CPU_BOOLEAN            body_done     = DEF_NO;
+    CPU_BOOLEAN            body_present  = DEF_NO;
+    CPU_BOOLEAN            chunk_en      = DEF_NO;
+    CPU_BOOLEAN            chunk_hook_en = DEF_NO;
+    HTTPs_ERR              err;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    switch (p_conn->State) {
+        case HTTPs_CONN_STATE_RESP_INIT:
+        case HTTPs_CONN_STATE_RESP_STATUS_LINE:
+                                                                /* ------------- PREPARE RESP STATUS LINE ------------- */
+             HTTPsResp_StatusLine(p_instance, p_conn, &err);
+             if (err != HTTPs_ERR_NONE) {
+                 HTTPs_ERR_INC(p_ctr_err->Resp_ErrStatusLineCtr);
+                 p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                 p_conn->State     = HTTPs_CONN_STATE_ERR_FATAL;
+                 p_conn->ErrCode   = err;
+                 break;
+             }
+             p_conn->State = HTTPs_CONN_STATE_RESP_HDR;
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case :                            ...  */
+                                                                /* ... 'HTTPs_CONN_STATE_RESP_HDR'.                     */
+                                                                /* no break                                             */
+        case HTTPs_CONN_STATE_RESP_HDR:
+        case HTTPs_CONN_STATE_RESP_HDR_CONTENT_TYPE:
+        case HTTPs_CONN_STATE_RESP_HDR_FILE_TRANSFER:
+        case HTTPs_CONN_STATE_RESP_HDR_LOCATION:
+        case HTTPs_CONN_STATE_RESP_HDR_CONN:
+        case HTTPs_CONN_STATE_RESP_HDR_LIST:
+        case HTTPs_CONN_STATE_RESP_HDR_TX:
+        case HTTPs_CONN_STATE_RESP_HDR_END:
+                                                                /* ----------------- PREPARE RESP HDR ----------------- */
+             HTTPsResp_Hdr(p_instance, p_conn, &err);
+             switch (err) {
+                 case HTTPs_ERR_NONE:
+                      body_present  = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_RESP_BODY_PRESENT);
+                      chunk_en      = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+                      chunk_hook_en = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED_HOOK);
+                      if (body_present == DEF_NO) {
+                          p_conn->State = HTTPs_CONN_STATE_RESP_COMPLETED;
+                      } else {
+                          if (chunk_hook_en == DEF_YES) {
+                              p_conn->State = HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_HOOK;
+                          } else {
+                              if (chunk_en == DEF_YES) {
+                                  p_conn->State = HTTPs_CONN_STATE_RESP_DATA_CHUNCKED;
+                              } else {
+                                  p_conn->State = HTTPs_CONN_STATE_RESP_FILE_STD;
+                              }
+                          }
+                      }
+                      p_conn->SockState = HTTPs_SOCK_STATE_TX;
+                      break;
+
+                 case HTTPs_ERR_RESP_BUF_NO_MORE_SPACE:
+                      p_conn->SockState = HTTPs_SOCK_STATE_TX;
+                      break;
+
+                 default:
+                      HTTPs_ERR_INC(p_ctr_err->Resp_ErrHdrCtr);
+                      p_conn->ErrCode   = err;
+                      p_conn->State     = HTTPs_CONN_STATE_ERR_FATAL;
+                      p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                      goto exit;
+             }
+             break;
+
+
+        case HTTPs_CONN_STATE_RESP_FILE_STD:
+                                                                /* ---------------- STANDARD TRANSFER ----------------- */
+             body_done = HTTPsResp_DataTransferStd(p_instance, p_conn, &err);
+             switch (err) {
+                 case HTTPs_ERR_NONE:
+                      if (body_done == DEF_YES) {
+                          p_conn->State = HTTPs_CONN_STATE_RESP_COMPLETED;
+                      }
+                      if (p_conn->TxDataLen > 0) {
+                          p_conn->SockState = HTTPs_SOCK_STATE_TX;
+                      } else {
+                          p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                      }
+                      break;
+
+                 default:
+                      HTTPsResp_DataComplete(p_instance, p_conn);
+                      HTTPs_ERR_INC(p_ctr_err->Resp_ErrTransferStdCtr);
+                      p_conn->ErrCode   = err;
+                      p_conn->State     = HTTPs_CONN_STATE_ERR_FATAL;
+                      p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                      goto exit;
+             }
+             break;
+
+
+        case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED:
+        case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_TX_TOKEN:
+        case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_TX_LAST_CHUNK:
+                                                                /* ----------------- CHUNKED TRANSFER ----------------- */
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+             body_done = HTTPsResp_DataTransferChunked(p_instance, p_conn, &err);
+             switch (err) {
+                 case HTTPs_ERR_NONE:
+                      if (body_done == DEF_YES) {
+                          p_conn->State = HTTPs_CONN_STATE_RESP_COMPLETED;
+                      }
+                      if (p_conn->TxDataLen > 0) {
+                          p_conn->SockState = HTTPs_SOCK_STATE_TX;
+                      } else {
+                          p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                      }
+                      break;
+
+                 case HTTPs_ERR_TOKEN_POOL_EMPTY:
+                      p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                      break;
+
+                 default:
+                      HTTPsResp_DataComplete(p_instance, p_conn);
+                      HTTPs_ERR_INC(p_ctr_err->Resp_ErrTransferChunkedCtr);
+                      p_conn->ErrCode   = err;
+                      p_conn->State     = HTTPs_CONN_STATE_ERR_FATAL;
+                      p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                      goto exit;
+             }
+#endif
+             break;
+
+
+        case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_HOOK:
+        case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_FINALIZE:
+                                                                /* ------------- CHUNK TRANSFER WITH HOOK ------------- */
+             body_done = HTTPsResp_DataTransferChunkedWithHook(p_instance, p_conn, &err);
+             switch (err) {
+                 case HTTPs_ERR_NONE:
+                      if (body_done == DEF_YES) {
+                          p_conn->State = HTTPs_CONN_STATE_RESP_COMPLETED;
+                      }
+                      p_conn->SockState = HTTPs_SOCK_STATE_TX;
+                      break;
+
+                 default:
+                      HTTPs_ERR_INC(p_ctr_err->Resp_ErrTransferChunkedHookCtr);
+                      p_conn->ErrCode   = err;
+                      p_conn->State     = HTTPs_CONN_STATE_ERR_FATAL;
+                      p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                      goto exit;
+             }
+             break;
+
+
+        case HTTPs_CONN_STATE_RESP_COMPLETED:
+                                                                /* -------------------- CLOSE FILE -------------------- */
+             if (p_conn->TxDataLen == 0) {                      /* No more data to tx.                                  */
+                 HTTPsResp_DataComplete(p_instance, p_conn);    /* Close file.                                          */
+                                                                /* Update conn state to close the conn.                 */
+                 p_conn->SockState = HTTPs_SOCK_STATE_NONE;
+                 p_conn->State     = HTTPs_CONN_STATE_COMPLETED;
+                 done              = DEF_YES;
+
+                 if ((p_conn->Method           != HTTP_METHOD_HEAD         ) &&
+                     (p_conn->RespBodyDataType != HTTPs_BODY_DATA_TYPE_NONE)) {
+                     HTTPs_STATS_INC(p_ctr_stats->Resp_StatBodyTxdCtr);
+                 }
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+                 if (p_conn->TokenCtrlPtr != DEF_NULL) {
+                     HTTPsMem_TokenRelease(p_instance, p_conn);
+                 }
+#endif
+             } else {                                           /* Complete tx before closing.                          */
+                 p_conn->SockState = HTTPs_SOCK_STATE_TX;
+             }
+             break;
+
+
+        default:
+            HTTPs_ERR_INC(p_ctr_err->Resp_ErrStateUnknownCtr);
+            p_conn->State     = HTTPs_CONN_STATE_ERR_FATAL;
+            p_conn->SockState = HTTPs_SOCK_STATE_NONE;          /* Conn must be closed.                                 */
+            p_conn->ErrCode   = HTTPs_ERR_STATE_UNKNOWN;
+            break;
+    }
+
+
+exit:
+    return (done);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsResp_DataComplete()
+*
+* Description : (1) Terminate the body data stage:
+*                   (a) Close a file if FS is present.
+*
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsResp_Handle().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsResp_DataComplete (HTTPs_INSTANCE  *p_instance,
+                              HTTPs_CONN      *p_conn)
+{
+    const  HTTPs_CFG             *p_cfg = p_instance->CfgPtr;
+    const  NET_FS_API            *p_fs_api;
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+           HTTPs_INSTANCE_ERRS   *p_ctr_errs;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_errs,  p_instance);
+
+    switch (p_cfg->FS_Type) {
+        case HTTPs_FS_TYPE_STATIC:
+             p_fs_api = ((HTTPs_CFG_FS_STATIC *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+             break;
+
+        case HTTPs_FS_TYPE_DYN:
+             p_fs_api = ((HTTPs_CFG_FS_DYN *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+             break;
+
+        case HTTPs_FS_TYPE_NONE:
+             p_fs_api = DEF_NULL;
+             break;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_errs->FS_ErrTypeInvalidCtr);
+             return;
+    }
+
+    if (p_conn->DataPtr == DEF_NULL) {
+        return;
+    }
+
+    switch (p_conn->RespBodyDataType) {
+        case HTTPs_BODY_DATA_TYPE_FILE:                         /* File type is from FS.                                */
+             HTTPs_STATS_INC(p_ctr_stats->FS_StatClosedCtr);
+
+             if (p_fs_api != DEF_NULL) {
+                 p_fs_api->Close(p_conn->DataPtr);
+             } else {
+                 HTTPs_ERR_INC(p_ctr_errs->File_ErrCloseNoFS_Ctr);
+             }
+             p_conn->DataPtr = DEF_NULL;
+             break;
+
+        case HTTPs_BODY_DATA_TYPE_NONE:
+        case HTTPs_BODY_DATA_TYPE_STATIC_DATA:
+        default:
+            break;
+     }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    HTTPsResp_PrepareStatusCode()
+*
+* Description : (1) Prepare connection following the status code
+*                   (a) (HOOK) Get error page, if required.
+*                   (b) Validate file presence, if required.
+*                   (c) Increment the appropriate status code processed counter.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : DEF_YES, if status code is related to an error.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsResp_Prepare().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPsResp_PrepareStatusCode (HTTPs_INSTANCE  *p_instance,
+                                                  HTTPs_CONN      *p_conn)
+{
+    CPU_BOOLEAN            is_err;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+
+    switch (p_conn->StatusCode) {
+                                                                /* Success status codes.                                */
+        case HTTP_STATUS_OK:                                    /* 200 */
+        case HTTP_STATUS_CREATED:                               /* 201 */
+        case HTTP_STATUS_ACCEPTED:                              /* 202 */
+        case HTTP_STATUS_NO_CONTENT:                            /* 204 */
+        case HTTP_STATUS_RESET_CONTENT:                         /* 205 */
+             DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_LOCATION);
+             is_err = DEF_NO;
+             break;
+
+                                                                /* Relocation status codes.                             */
+        case HTTP_STATUS_MOVED_PERMANENTLY:                     /* 301 */
+        case HTTP_STATUS_FOUND:                                 /* 302 */
+        case HTTP_STATUS_SEE_OTHER:                             /* 303 */
+        case HTTP_STATUS_NOT_MODIFIED:                          /* 304 */
+        case HTTP_STATUS_USE_PROXY:                             /* 305 */
+        case HTTP_STATUS_TEMPORARY_REDIRECT:                    /* 307 */
+             DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_CONN_PERSISTENT);
+             DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_RESP_LOCATION);
+             is_err = DEF_NO;
+             break;
+
+                                                                /* Error status codes.                                  */
+        case HTTP_STATUS_BAD_REQUEST:                           /* 400 */
+        case HTTP_STATUS_UNAUTHORIZED:                          /* 401 */
+        case HTTP_STATUS_FORBIDDEN:                             /* 403 */
+        case HTTP_STATUS_NOT_FOUND:                             /* 404 */
+        case HTTP_STATUS_METHOD_NOT_ALLOWED:                    /* 405 */
+        case HTTP_STATUS_NOT_ACCEPTABLE:                        /* 406 */
+        case HTTP_STATUS_REQUEST_TIMEOUT:                       /* 408 */
+        case HTTP_STATUS_CONFLICT:                              /* 409 */
+        case HTTP_STATUS_GONE:                                  /* 410 */
+        case HTTP_STATUS_LENGTH_REQUIRED:                       /* 411 */
+        case HTTP_STATUS_PRECONDITION_FAILED:                   /* 412 */
+        case HTTP_STATUS_REQUEST_ENTITY_TOO_LARGE:              /* 413 */
+        case HTTP_STATUS_REQUEST_URI_TOO_LONG:                  /* 414 */
+        case HTTP_STATUS_UNSUPPORTED_MEDIA_TYPE:                /* 415 */
+        case HTTP_STATUS_REQUESTED_RANGE_NOT_SATISFIABLE:       /* 416 */
+        case HTTP_STATUS_EXPECTATION_FAILED:                    /* 417 */
+
+                                                                /* Server failed status codes.                          */
+        case HTTP_STATUS_INTERNAL_SERVER_ERR:                   /* 500 */
+        case HTTP_STATUS_NOT_IMPLEMENTED:                       /* 501 */
+        case HTTP_STATUS_SERVICE_UNAVAILABLE:                   /* 503 */
+        case HTTP_STATUS_HTTP_VERSION_NOT_SUPPORTED:            /* 505 */
+        default:
+             DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_LOCATION);
+             is_err = DEF_YES;
+             break;
+    }
+
+    switch (p_conn->StatusCode) {
+        case HTTP_STATUS_OK:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeOKCtr);
+             break;
+
+        case HTTP_STATUS_MOVED_PERMANENTLY:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeMovedPermanentlyCtr);
+             break;
+
+        case HTTP_STATUS_FOUND:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeFoundCtr);
+             break;
+
+        case HTTP_STATUS_SEE_OTHER:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeSeeOtherCtr);
+             break;
+
+        case HTTP_STATUS_NOT_MODIFIED:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeNotModifiedCtr);
+             break;
+
+        case HTTP_STATUS_USE_PROXY:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeUseProxyCtr);
+             break;
+
+        case HTTP_STATUS_TEMPORARY_REDIRECT:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeTemporaryredirectCtr);
+             break;
+
+        case HTTP_STATUS_CREATED:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeCreatedCtr);
+             break;
+
+        case HTTP_STATUS_ACCEPTED:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeAcceptedCtr);
+             break;
+
+        case HTTP_STATUS_NO_CONTENT:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeNoContentCtr);
+             break;
+
+        case HTTP_STATUS_RESET_CONTENT:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeResetContentCtr);
+             break;
+
+        case HTTP_STATUS_BAD_REQUEST:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeBadRequestCtr);
+             break;
+
+        case HTTP_STATUS_UNAUTHORIZED:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeUnauthorizedCtr);
+             break;
+
+        case HTTP_STATUS_FORBIDDEN:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeForbiddenCtr);
+             break;
+
+        case HTTP_STATUS_NOT_FOUND:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeNotFoundCtr);
+             break;
+
+        case HTTP_STATUS_METHOD_NOT_ALLOWED:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeMethodNotAllowedCtr);
+             break;
+
+        case HTTP_STATUS_NOT_ACCEPTABLE:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeNotAcceptableCtr);
+             break;
+
+        case HTTP_STATUS_REQUEST_TIMEOUT:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeRequestTimeoutCtr);
+             break;
+
+        case HTTP_STATUS_CONFLICT:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeConflitCtr);
+             break;
+
+        case HTTP_STATUS_GONE:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeGoneCtr);
+             break;
+
+        case HTTP_STATUS_LENGTH_REQUIRED:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeLenRequiredCtr);
+             break;
+
+        case HTTP_STATUS_PRECONDITION_FAILED:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeConditionFailedCtr);
+             break;
+
+        case HTTP_STATUS_REQUEST_ENTITY_TOO_LARGE:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeEntityTooLongCtr);
+             break;
+
+        case HTTP_STATUS_REQUEST_URI_TOO_LONG:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeURI_TooLongCtr);
+             break;
+
+        case HTTP_STATUS_UNSUPPORTED_MEDIA_TYPE:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeUnsupportedTypeCtr);
+             break;
+
+        case HTTP_STATUS_REQUESTED_RANGE_NOT_SATISFIABLE:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeNotSatisfiableCtr);
+             break;
+
+        case HTTP_STATUS_EXPECTATION_FAILED:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeExpectationFailedCtr);
+             break;
+
+        case HTTP_STATUS_INTERNAL_SERVER_ERR:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeInternalServerErrCtr);
+             break;
+
+        case HTTP_STATUS_NOT_IMPLEMENTED:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeNotImplementedCtr);
+             break;
+
+        case HTTP_STATUS_SERVICE_UNAVAILABLE:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeSerUnavailableCtr);
+             break;
+
+        case HTTP_STATUS_HTTP_VERSION_NOT_SUPPORTED:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeVerNotSupportedCtr);
+             break;
+
+        default:
+             HTTPs_STATS_INC(p_ctr_stats->Resp_StatStatusCodeUnknownCtr);
+             break;
+    }
+
+    return (is_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsResp_PrepareBodyData()
+*
+* Description : Open file for the connection, if required.
+*               Validate null file pointer.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : DEF_OK    if the Body Data is ready to be processed.
+*               DEF_FAIL  otherwise.
+*
+* Caller(s)   : HTTPsResp_Prepare().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPsResp_PrepareBodyData (HTTPs_INSTANCE  *p_instance,
+                                                HTTPs_CONN      *p_conn)
+{
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    const  HTTPs_CFG            *p_cfg            = p_instance->CfgPtr;
+           CPU_BOOLEAN           chunk_en         = DEF_NO;
+#endif
+           CPU_BOOLEAN           is_body_data_rdy = DEF_NO;
+           HTTPs_INSTANCE_ERRS  *p_ctr_err;
+
+
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    switch (p_conn->RespBodyDataType) {
+                                                                /* ------------------ BODY IS A FILE ------------------ */
+        case HTTPs_BODY_DATA_TYPE_FILE:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+             if (p_conn->PathPtr == DEF_NULL) {                 /* Check that path is valid.                            */
+                 HTTPs_ERR_INC(p_ctr_err->Resp_ErrPathInvalidCtr);
+                 is_body_data_rdy = DEF_NO;
+                 goto exit;
+             }
+
+             is_body_data_rdy = HTTPsResp_FileOpen(p_instance,  /* Open file.                                           */
+                                                   p_conn);
+             if (is_body_data_rdy != DEF_YES) {
+                 goto exit;
+             }
+                                                                /* Get Content Type from file extension.                */
+             if (p_conn->RespContentType == HTTP_CONTENT_TYPE_UNKNOWN) {
+                 p_conn->RespContentType = HTTP_GetContentTypeFromFileExt(p_conn->PathPtr,
+                                                                          p_conn->PathLenMax);
+                 if (p_conn->RespContentType == HTTP_CONTENT_TYPE_UNKNOWN) {
+                     HTTPs_ERR_INC(p_ctr_err->Resp_ErrContentTypeInvalidCtr);
+                     is_body_data_rdy = DEF_NO;
+                     goto exit;
+                 }
+             }
+                                                                /* Check if Chunked Transfer Encoding is needed.        */
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+             chunk_en = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+             if ( (p_conn->ProtocolVer     == HTTP_PROTOCOL_VER_1_1)     &&  /* If protocol ver is 1.1 ...    */
+                  (p_cfg->TokenCfgPtr      != DEF_NULL)                  &&  /* ..token parsing is enabled .. */
+                  (chunk_en                == DEF_YES)                   &&
+                 ((p_conn->RespContentType == HTTP_CONTENT_TYPE_HTML)    || /* ..content type is : html  ..  */
+                  (p_conn->RespContentType == HTTP_CONTENT_TYPE_PLAIN)))  { /* ..                  plain ..  */
+                 DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+             } else {
+                 DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+             }
+#else
+             DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+#endif
+#else
+             HTTPs_ERR_INC(p_ctr_err->File_ErrOpenNoFS_Ctr);
+             is_body_data_rdy = DEF_NO;
+             goto exit;
+#endif
+             break;
+
+
+                                                                /* --------------- BODY IS STATIC DATA ---------------- */
+        case HTTPs_BODY_DATA_TYPE_STATIC_DATA:
+                                                                /* Validate Content Type of data.                       */
+             if (p_conn->RespContentType == HTTP_CONTENT_TYPE_UNKNOWN) {
+                 HTTPs_ERR_INC(p_ctr_err->Resp_ErrContentTypeInvalidCtr);
+                 is_body_data_rdy = DEF_NO;
+                 goto exit;
+             }
+                                                                /* Check if data pointer is defined.                    */
+             if (p_conn->DataPtr == DEF_NULL) {
+                 DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED_HOOK);
+                 is_body_data_rdy = DEF_YES;
+             } else {
+                 DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED_HOOK);
+                 is_body_data_rdy = (p_conn->DataLen > 0) ? DEF_YES : DEF_NO;
+             }
+
+                                                                /* Check if Chunked Transfer Encoding is needed.        */
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+             chunk_en = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+             if ( (p_conn->ProtocolVer     == HTTP_PROTOCOL_VER_1_1)     &&  /* If protocol ver is 1.1 ...    */
+                  (p_cfg->TokenCfgPtr      != DEF_NULL)                  &&  /* ..token parsing is enabled .. */
+                  (chunk_en                == DEF_YES)                   &&
+                 ((p_conn->RespContentType == HTTP_CONTENT_TYPE_HTML)    ||  /* ..content type is : html  ..  */
+                  (p_conn->RespContentType == HTTP_CONTENT_TYPE_PLAIN)))  {  /* ..                  plain ..  */
+                 DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+             } else {
+                 DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+             }
+#else
+             DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+#endif
+             break;
+
+
+                                                                /* ---------------- NO BODY IS PRESENT ---------------- */
+        case HTTPs_BODY_DATA_TYPE_NONE:
+             is_body_data_rdy = DEF_YES;
+             break;
+
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrBodyTypeInvalidCtr);
+             is_body_data_rdy = DEF_NO;
+             p_conn->ErrCode  = HTTPs_ERR_RESP_BODY_DATA_TYPE_UNKNOWN;
+             break;
+    }
+
+
+exit:
+    if (is_body_data_rdy == DEF_NO) {
+        p_conn->StatusCode = HTTP_STATUS_NOT_FOUND;
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsResp_StatusLine()
+*
+* Description : (1) Prepare response status line:
+*
+*                   (a) Copy protocol version
+*                   (b) Copy status code
+*                   (c) Copy Reason phrase
+*                   (d) Copy end of status line
+*                   (e) Update connection parameters
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE                          Status line     successfully prepared.
+*                           HTTPs_ERR_RESP_STATUS_LINE              Status line NOT successfully prepared.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_Resp().
+*
+* Note(s)     : (2) Connection buffer size must be configured to handle at least the entire status line.
+*
+*               (3) RFC #2616, Section 6 'Response' specifies how a response message must be structured:
+*
+*                   (a) After receiving and interpreting a request message, a server responds with an HTTP
+*                       response message.
+*
+*                           Response      = Status-Line               ; Section 6.1
+*                                           *(( general-header        ; Section 4.5
+*                                            | response-header        ; Section 6.2
+*                                            | entity-header ) CRLF)  ; Section 7.1
+*                                           CRLF
+*                                           [ message-body ]          ; Section 7.2
+*
+*               (4) RFC #2616, Section 6.1 'Status Line' specifies how the response status line message must be
+*                   structured:
+*
+*                   (a) 6.1 Status-Line
+*
+*                       The first line of a Response message is the Status-Line, consisting of the protocol
+*                       version followed by a numeric status code and its associated textual phrase, with each
+*                       element separated by SP characters. No CR or LF is allowed except in the final CRLF
+*                       sequence.
+*
+*                           Status-Line = HTTP-Version SP Status-Code SP Reason-Phrase CRLF
+*
+*                   (b) 6.1.1 Status Code and Reason Phrase
+*
+*                       The Status-Code element is a 3-digit integer result code of the attempt to understand
+*                       and satisfy the request. These codes are fully defined in section 10. The Reason-Phrase
+*                       is intended to give a short textual description of the Status-Code. The Status-Code is
+*                       intended for use by automata and the Reason-Phrase is intended for the human user. The
+*                       client is not required to examine or display the Reason- Phrase.
+*
+*                       The first digit of the Status-Code defines the class of response. The last two digits
+*                       do not have any categorization role. There are 5 values for the first digit:
+*
+*                           - 1xx: Informational - Request received, continuing process
+*
+*                           - 2xx: Success - The action was successfully received,
+*                             understood, and accepted
+*
+*                           - 3xx: Redirection - Further action must be taken in order to
+*                             complete the request
+*
+*                           - 4xx: Client Error - The request contains bad syntax or cannot
+*                             be fulfilled
+*
+*                           - 5xx: Server Error - The server failed to fulfill an apparently
+*                             valid request
+*********************************************************************************************************
+*/
+
+static  void  HTTPsResp_StatusLine (HTTPs_INSTANCE  *p_instance,
+                                    HTTPs_CONN      *p_conn,
+                                    HTTPs_ERR       *p_err)
+{
+    CPU_CHAR    *p_buf;
+    CPU_CHAR    *p_buf_wr;
+    CPU_SIZE_T   buf_len;
+
+
+   (void)&p_instance;                                           /* Prevent possible 'variable unused' warnings.         */
+
+    p_buf     = p_conn->TxBufPtr;
+    p_buf    += p_conn->TxDataLen;
+    p_buf_wr  = p_buf;
+    buf_len   = p_conn->BufLen - p_conn->TxDataLen;
+
+
+                                                                /* ---------------- COPY PROTOCOL VER ----------------- */
+    p_buf_wr = HTTP_Dict_ValCopy(HTTP_Dict_ProtocolVer,          /* See Note #2a.                            */
+                                 HTTP_Dict_ProtocolVerSize,
+                                 p_conn->ProtocolVer,
+                                 p_buf_wr,
+                                 buf_len);
+    if (p_buf_wr == DEF_NULL) {
+       *p_err = HTTPs_ERR_RESP_STATUS_LINE;
+        return;
+    }
+
+   *p_buf_wr = ASCII_CHAR_SPACE;
+    p_buf_wr++;
+
+                                                                /* ----------------- COPY STATUS CODE ----------------- */
+    buf_len  = p_conn->BufLen - (p_buf_wr - p_buf);
+    p_buf_wr = HTTP_Dict_ValCopy(HTTP_Dict_StatusCode,       /* See Note #2b.                                */
+                                 HTTP_Dict_StatusCodeSize,
+                                 p_conn->StatusCode,
+                                 p_buf_wr,
+                                 buf_len);
+    if (p_buf_wr == DEF_NULL) {
+        *p_err = HTTPs_ERR_RESP_STATUS_LINE;
+         return;
+    }
+
+   *p_buf_wr = ASCII_CHAR_SPACE;
+    p_buf_wr++;
+
+
+                                                                /* ---------------- COPY REASON PHRASE ---------------- */
+    buf_len  = p_conn->BufLen - (p_buf_wr - p_buf);
+    p_buf_wr = HTTP_Dict_ValCopy(HTTP_Dict_ReasonPhrase,     /* See Note #2b.                                */
+                                 HTTP_Dict_ReasonPhraseSize,
+                                 p_conn->StatusCode,
+                                 p_buf_wr,
+                                 buf_len);
+    if (p_buf_wr == DEF_NULL) {
+        *p_err = HTTPs_ERR_RESP_STATUS_LINE;
+         return;
+    }
+
+
+                                                                /* ------------- COPY END OF STATUS LINE -------------- */
+    buf_len = p_conn->BufLen - (p_buf_wr - p_buf);
+   (void)Str_Copy_N(p_buf_wr, STR_CR_LF, buf_len);
+
+
+                                                                /* ---------------- UPDATE CONN PARAM ----------------- */
+    p_conn->TxDataLen += (p_buf_wr - p_buf) + STR_CR_LF_LEN;
+
+   *p_err = HTTPs_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsResp_Hdr()
+*
+* Description : (1) Prepare response headers:
+*
+*                   (a) Add content type   header field
+*                   (b) Add content transfer header field
+*                       (i)  Content length
+*                       (ii) Transfer Encoding
+*
+*                   (c) Add location       header field
+*                   (d) Add connection     header field
+*                   (3) Copy end of response section
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsResp_Handle().
+*
+* Note(s)     : (2) RFC #2616, Section 6 'Response' specifies how a response message must be structured:
+*
+*                   (a) After receiving and interpreting a request message, a server responds with an HTTP
+*                       response message.
+*
+*                           Response      = Status-Line               ; Section 6.1
+*                                           *(( general-header        ; Section 4.5
+*                                            | response-header        ; Section 6.2
+*                                            | entity-header ) CRLF)  ; Section 7.1
+*                                           CRLF
+*                                           [ message-body ]          ; Section 7.2
+*
+*               (3) RFC #2616, Section 6.2 'Response Header Fields' specifies how the response header fields
+*                   message must be structured:
+*
+*                   (a) 6.2 Response Header Fields
+*
+*                       The response-header fields allow the server to pass additional information about the
+*                       response which cannot be placed in the Status- Line. These header fields give
+*                       information about the server and about further access to the resource identified by
+*                       the Request-URI.
+*
+*                           response-header = Accept-Ranges           ; Section 14.5
+*                                           | Age                     ; Section 14.6
+*                                           | ETag                    ; Section 14.19
+*                                           | Location                ; Section 14.30
+*                                           | Proxy-Authenticate      ; Section 14.33
+*                                           | Retry-After             ; Section 14.37
+*                                           | Server                  ; Section 14.38
+*                                           | Vary                    ; Section 14.44
+*                                           | WWW-Authenticate        ; Section 14.47
+*
+*                       Response-header field names can be extended reliably only in combination with a change
+*                       in the protocol version. However, new or experimental header fields MAY be given the
+*                       semantics of response- header fields if all parties in the communication recognize them
+*                       to be response-header fields. Unrecognized header fields are treated as entity-header
+*                       fields.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsResp_Hdr (HTTPs_INSTANCE  *p_instance,
+                             HTTPs_CONN      *p_conn,
+                             HTTPs_ERR       *p_err)
+{
+           CPU_CHAR              *p_buf           = p_conn->BufPtr + p_conn->TxDataLen;
+           CPU_CHAR              *p_buf_wr        = p_buf;
+           CPU_CHAR              *p_str           = DEF_NULL;
+           CPU_SIZE_T             buf_len         = 0;
+           CPU_BOOLEAN            chunk_en        = DEF_NO;
+           CPU_BOOLEAN            chunk_hook_en   = DEF_NO;
+           CPU_BOOLEAN            chuncked        = DEF_NO;
+           CPU_BOOLEAN            done            = DEF_NO;
+           CPU_BOOLEAN            location_needed = DEF_NO;
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+    const  HTTPs_CFG             *p_cfg           = p_instance->CfgPtr;
+           CPU_BOOLEAN            hook_done       = DEF_NO;
+           CPU_BOOLEAN            hook_def        = DEF_NO;
+#endif
+#if (HTTPs_CFG_PERSISTENT_CONN_EN == DEF_ENABLED)
+           CPU_BOOLEAN            persistent      = DEF_NO;
+#endif
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+
+
+    while (done != DEF_YES) {
+        switch (p_conn->State) {
+            case HTTPs_CONN_STATE_RESP_HDR:
+                 if (p_conn->RespBodyDataType == HTTPs_BODY_DATA_TYPE_NONE) {
+                     p_conn->State = HTTPs_CONN_STATE_RESP_HDR_LOCATION;
+                 } else {
+                     p_conn->State = HTTPs_CONN_STATE_RESP_HDR_CONTENT_TYPE;
+                 }
+                 break;
+
+
+            case HTTPs_CONN_STATE_RESP_HDR_CONTENT_TYPE:
+                 buf_len = p_conn->BufLen - p_conn->TxDataLen - (p_buf_wr - p_buf);
+                 p_str = HTTPsResp_HdrFieldAdd(p_instance,
+                                               p_conn,
+                                               p_buf_wr,
+                                               buf_len,
+                                               HTTP_HDR_FIELD_CONTENT_TYPE,
+                                               DEF_NULL,
+                                               0,
+                                               p_err);
+                 switch (*p_err) {
+                     case HTTPs_ERR_NONE:
+                          break;
+
+                     case HTTPs_ERR_RESP_BUF_NO_MORE_SPACE:
+                          p_conn->State = HTTPs_CONN_STATE_RESP_HDR_CONTENT_TYPE;
+                          goto exit;
+
+                     default:
+                          goto exit;
+                 }
+
+                 p_buf_wr      = p_str;
+                 p_conn->State = HTTPs_CONN_STATE_RESP_HDR_FILE_TRANSFER;
+                 break;
+
+
+            case HTTPs_CONN_STATE_RESP_HDR_FILE_TRANSFER:
+                                                                    /* ---------- ADD CONTENT TRANSFER HDR FIELD ---------- */
+                 buf_len = p_conn->BufLen - p_conn->TxDataLen - (p_buf_wr - p_buf);
+
+                 chunk_en      = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+                 chunk_hook_en = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED_HOOK);
+
+                 if ((chunk_en      == DEF_YES) ||
+                     (chunk_hook_en == DEF_YES)) {
+                      chuncked = DEF_YES;
+                 }
+
+                 if (chuncked == DEF_YES) {
+
+                                                                    /* --------- ADD TRANSFER ENCODING HDR FIELD ---------- */
+                     p_str = HTTPsResp_HdrFieldAdd(p_instance,
+                                                   p_conn,
+                                                   p_buf_wr,
+                                                   buf_len,
+                                                   HTTP_HDR_FIELD_TRANSFER_ENCODING,
+                                                   DEF_NULL,
+                                                   0,
+                                                   p_err);
+                     switch (*p_err) {
+                         case HTTPs_ERR_NONE:
+                              break;
+
+                         case HTTPs_ERR_RESP_BUF_NO_MORE_SPACE:
+                              p_conn->State = HTTPs_CONN_STATE_RESP_HDR_FILE_TRANSFER;
+                              goto exit;
+
+                         default:
+                              goto exit;
+                     }
+
+                 } else {
+
+                                                                    /* ------------ ADD CONTENT LEN HDR FIELD ------------- */
+                     p_str = HTTPsResp_HdrFieldAdd(p_instance,
+                                                   p_conn,
+                                                   p_buf_wr,
+                                                   buf_len,
+                                                   HTTP_HDR_FIELD_CONTENT_LEN,
+                                                   DEF_NULL,
+                                                   0,
+                                                   p_err);
+                     switch (*p_err) {
+                         case HTTPs_ERR_NONE:
+                              break;
+
+                         case HTTPs_ERR_RESP_BUF_NO_MORE_SPACE:
+                              p_conn->State = HTTPs_CONN_STATE_RESP_HDR_FILE_TRANSFER;
+                              goto exit;
+
+                         default:
+                              goto exit;
+                     }
+                 }
+                 p_buf_wr = p_str;
+                 p_conn->State = HTTPs_CONN_STATE_RESP_HDR_LOCATION;
+                 break;
+
+
+            case HTTPs_CONN_STATE_RESP_HDR_LOCATION:
+                                                                    /* -------------- ADD LOCATION HDR FIELD -------------- */
+                 location_needed = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_RESP_LOCATION);
+                 if (location_needed == DEF_YES) {
+                     buf_len  = p_conn->BufLen - p_conn->TxDataLen - (p_buf_wr - p_buf);
+                     p_str = HTTPsResp_HdrFieldAdd(p_instance,
+                                                   p_conn,
+                                                   p_buf_wr,
+                                                   buf_len,
+                                                   HTTP_HDR_FIELD_LOCATION,
+                                                   DEF_NULL,
+                                                   0,
+                                                   p_err);
+                     switch (*p_err) {
+                         case HTTPs_ERR_NONE:
+                              break;
+
+                         case HTTPs_ERR_RESP_BUF_NO_MORE_SPACE:
+                              p_conn->State = HTTPs_CONN_STATE_RESP_HDR_LOCATION;
+                              goto exit;
+
+                         default:
+                              goto exit;
+                     }
+
+                     p_buf_wr = p_str;
+                 }
+                 p_conn->State = HTTPs_CONN_STATE_RESP_HDR_CONN;
+                 break;
+
+
+            case HTTPs_CONN_STATE_RESP_HDR_CONN:
+#if (HTTPs_CFG_PERSISTENT_CONN_EN == DEF_ENABLED)
+                 persistent = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_CONN_PERSISTENT);
+                 if (persistent == DEF_NO) {
+#endif
+                                                                    /* ---------------- ADD CONN HDR FIELD ---------------- */
+                     buf_len  = p_conn->BufLen - p_conn->TxDataLen - (p_buf_wr - p_buf);
+                     p_str = HTTPsResp_HdrFieldAdd(p_instance,
+                                                   p_conn,
+                                                   p_buf_wr,
+                                                   buf_len,
+                                                   HTTP_HDR_FIELD_CONN,
+                                                   DEF_NULL,
+                                                   0,
+                                                   p_err);
+                     switch (*p_err) {
+                         case HTTPs_ERR_NONE:
+                              break;
+
+                         case HTTPs_ERR_RESP_BUF_NO_MORE_SPACE:
+                              p_conn->State = HTTPs_CONN_STATE_RESP_HDR_CONN;
+                              goto exit;
+
+                         default:
+                              goto exit;
+                     }
+
+                     p_buf_wr = p_str;
+#if (HTTPs_CFG_PERSISTENT_CONN_EN == DEF_ENABLED)
+                 }
+#endif
+                 p_conn->State = HTTPs_CONN_STATE_RESP_HDR_LIST;
+                 break;
+
+
+            case HTTPs_CONN_STATE_RESP_HDR_LIST:
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+                 hook_def = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnRespHdrTxHook);
+                 if ((p_cfg->HdrTxCfgPtr != DEF_NULL) &&
+                     (hook_def           == DEF_YES)) {
+
+                     hook_done = p_cfg->HooksPtr->OnRespHdrTxHook(p_instance,
+                                                                  p_conn,
+                                                                  p_cfg->Hooks_CfgPtr);
+                     if (hook_done != DEF_YES) {
+                        *p_err         = HTTPs_ERR_RESP_BUF_NO_MORE_SPACE;
+                         p_conn->State = HTTPs_CONN_STATE_RESP_HDR_LIST;
+                         goto exit;
+                     }
+                     p_conn->State = HTTPs_CONN_STATE_RESP_HDR_TX;
+                 } else {
+                     p_conn->State = HTTPs_CONN_STATE_RESP_HDR_END;
+                 }
+#else
+                 p_conn->State = HTTPs_CONN_STATE_RESP_HDR_END;
+#endif
+                 break;
+
+
+            case HTTPs_CONN_STATE_RESP_HDR_TX:
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+                 while (p_conn->HdrListPtr != DEF_NULL) {
+                     buf_len  = p_conn->BufLen - p_conn->TxDataLen - (p_buf_wr - p_buf);
+
+                     p_str = HTTPsResp_HdrFieldAdd(p_instance,
+                                                   p_conn,
+                                                   p_buf_wr,
+                                                   buf_len,
+                                                   p_conn->HdrListPtr->HdrField,
+                                                   p_conn->HdrListPtr->ValPtr,
+                                                   p_conn->HdrListPtr->ValLen,
+                                                   p_err);
+                     switch (*p_err) {
+                         case HTTPs_ERR_NONE:
+                              break;
+
+                         case HTTPs_ERR_RESP_BUF_NO_MORE_SPACE:
+                              p_conn->State = HTTPs_CONN_STATE_RESP_HDR_TX;
+                              goto exit;
+
+                         default:
+                              goto exit;
+                     }
+
+                     p_buf_wr = p_str;
+
+                     HTTPsMem_RespHdrRelease(p_instance,        /* Release hdr blk once copied in conn buff.            */
+                                             p_conn);
+
+                 }
+#endif
+                 p_conn->State = HTTPs_CONN_STATE_RESP_HDR_END;
+                 break;
+
+
+            case HTTPs_CONN_STATE_RESP_HDR_END:
+                                                                /* --------------- COPY END OF RESP SEC --------------- */
+                 buf_len   = p_conn->BufLen - p_conn->TxDataLen - (p_buf_wr - p_buf);
+                 if (buf_len < STR_CR_LF_LEN) {
+                     p_conn->State = HTTPs_CONN_STATE_RESP_HDR_END;
+                    *p_err         = HTTPs_ERR_RESP_BUF_NO_MORE_SPACE;
+                     goto exit;
+                 }
+
+                 (void)Str_Copy_N(p_buf_wr, STR_CR_LF, buf_len);
+                 p_buf_wr += STR_CR_LF_LEN;
+                *p_buf_wr  = ASCII_CHAR_NULL;
+
+                 done = DEF_YES;
+                 break;
+
+
+            default:
+                *p_err = HTTPs_ERR_STATE_UNKNOWN;
+                 goto exit;
+        }
+
+    }
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_STATS_INC(p_ctr_stats->Resp_StatTxdCtr);
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit:
+    p_conn->TxDataLen += (p_buf_wr - p_buf);
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsResp_HdrFieldAdd()
+*
+* Description : (1) Add response header field:
+*
+*                   (a) Copy header field title
+*                   (b) Copy header field value
+*                   (c) Copy end of header field
+*
+* Argument(s) : p_instance      Pointer to the instance.
+*               ----------      Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn          Pointer to the connection.
+*               ------          Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_buf           Pointer to the buffer where to copy header field.
+*               -----           Argument validated in HTTPsResp_Hdr().
+*
+*               buf_len         Remaining length available in the buffer.
+*
+*               field_type      Header field type to add.
+*
+*               p_val           Pointer to value of header when an Hdr Fields list is present.
+*
+*               val_len         Length of the value.
+*
+* Return(s)   : Pointer to the end of the header field added, if field successfully copied.
+*
+*               DEF_NULL,                                     otherwise.
+*
+* Caller(s)   : HTTPsResp_Hdr().
+*
+* Note(s)     : (2) RFC #2616, Section 6 'Response' specifies how a response message must be structured:
+*
+*                   (a) After receiving and interpreting a request message, a server responds with an HTTP
+*                       response message.
+*
+*                           Response      = Status-Line               ; Section 6.1
+*                                           *(( general-header        ; Section 4.5
+*                                            | response-header        ; Section 6.2
+*                                            | entity-header ) CRLF)  ; Section 7.1
+*                                           CRLF
+*                                           [ message-body ]          ; Section 7.2
+*********************************************************************************************************
+*/
+
+static  CPU_CHAR  *HTTPsResp_HdrFieldAdd (HTTPs_INSTANCE   *p_instance,
+                                          HTTPs_CONN       *p_conn,
+                                          CPU_CHAR         *p_buf,
+                                          CPU_SIZE_T        buf_len,
+                                          HTTP_HDR_FIELD    field_type,
+                                          CPU_CHAR         *p_val,
+                                          CPU_SIZE_T        val_len,
+                                          HTTPs_ERR        *p_err)
+{
+           HTTP_DICT        *p_entry;
+           CPU_SIZE_T        len;
+           CPU_SIZE_T        len_value;
+           CPU_CHAR         *p_str;
+           CPU_CHAR         *p_path;
+           CPU_BOOLEAN       add_end_field;
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+           CPU_SIZE_T        len_host;
+           CPU_SIZE_T        len_tot;
+#endif
+#if ((HTTPs_CFG_HDR_TX_EN       == DEF_ENABLED) || \
+     (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED))
+    const  HTTPs_CFG        *p_cfg = p_instance->CfgPtr;
+#endif
+
+
+    add_end_field = DEF_YES;
+
+                                                                /* --------------- COPY HDR FIELD TITLE --------------- */
+    p_entry = HTTP_Dict_EntryGet(HTTP_Dict_HdrField,
+                                 HTTP_Dict_HdrFieldSize,
+                                 field_type);
+    if (p_entry == DEF_NULL) {
+       *p_err = HTTPs_ERR_HDR_FIELD_TYPE_UNKNOWN;
+        return (DEF_NULL);
+    }
+
+    if (p_entry->StrLen > buf_len) {                            /* Validate value len and buf len.                      */
+        if (buf_len == p_conn->BufLen) {
+           *p_err = HTTPs_ERR_CFG_INVALID_BUF_LEN;
+        } else {
+           *p_err = HTTPs_ERR_RESP_BUF_NO_MORE_SPACE;
+        }
+        return (DEF_NULL);
+    }
+
+   (void)Str_Copy_N(p_buf, p_entry->StrPtr, p_entry->StrLen);   /* Copy string to the buffer.                           */
+    p_str = p_buf + p_entry->StrLen;                            /* Increment buffer pointer.                            */
+
+   *p_str = ASCII_CHAR_COLON;
+    p_str++;
+   *p_str = ASCII_CHAR_SPACE;
+    p_str++;
+
+    buf_len -= (p_buf - p_str);
+
+
+                                                                /* ---------------- COPY HDR FIELD VAL ---------------- */
+    switch (field_type) {
+        case HTTP_HDR_FIELD_CONTENT_TYPE:
+             p_entry = HTTP_Dict_EntryGet(HTTP_Dict_ContentType,
+                                          HTTP_Dict_ContentTypeSize,
+                                          p_conn->RespContentType);
+             if (p_entry == DEF_NULL) {
+                *p_err = HTTPs_ERR_HDR_FIELD_VAL_UNKNOWN;
+                 return (DEF_NULL);
+             }
+
+             if (p_entry->StrLen > buf_len) {                   /* Validate value len and buf len.                      */
+                 if (buf_len == p_conn->BufLen) {
+                    *p_err = HTTPs_ERR_CFG_INVALID_BUF_LEN;
+                 } else {
+                    *p_err = HTTPs_ERR_RESP_BUF_NO_MORE_SPACE;
+                 }
+                 return (DEF_NULL);
+             }
+
+            (void)Str_Copy_N(p_str, p_entry->StrPtr, p_entry->StrLen); /* Copy string to the buffer.                    */
+             p_str += p_entry->StrLen;                                 /* Increment buffer pointer.                     */
+             break;
+
+
+        case HTTP_HDR_FIELD_TRANSFER_ENCODING:
+             p_entry = HTTP_Dict_EntryGet(HTTP_Dict_HdrFieldTransferTypeVal,
+                                          HTTP_Dict_HdrFieldTransferTypeValSize,
+                                          HTTP_HDR_FIELD_TRANSFER_TYPE_CHUNCKED);
+             if (p_entry == DEF_NULL) {
+                *p_err = HTTPs_ERR_HDR_FIELD_VAL_UNKNOWN;
+                 return (DEF_NULL);
+             }
+
+             if (p_entry->StrLen > buf_len) {                   /* Validate value len and buf len.                      */
+                 if (buf_len == p_conn->BufLen) {
+                    *p_err = HTTPs_ERR_CFG_INVALID_BUF_LEN;
+                 } else {
+                    *p_err = HTTPs_ERR_RESP_BUF_NO_MORE_SPACE;
+                 }
+                 return (DEF_NULL);
+             }
+
+            (void)Str_Copy_N(p_str, p_entry->StrPtr, p_entry->StrLen); /* Copy string to the buffer.                    */
+             p_str += p_entry->StrLen;                                 /* Increment buffer pointer.                     */
+             break;
+
+
+        case HTTP_HDR_FIELD_CONN:
+             p_entry = HTTP_Dict_EntryGet(HTTP_Dict_HdrFieldConnVal,
+                                          HTTP_Dict_HdrFieldConnValSize,
+                                          HTTP_HDR_FIELD_CONN_CLOSE);
+             if (p_entry == DEF_NULL) {
+                *p_err = HTTPs_ERR_HDR_FIELD_VAL_UNKNOWN;
+                 return (DEF_NULL);
+             }
+
+             if (p_entry->StrLen > buf_len) {                   /* Validate value len and buf len.                      */
+                 if (buf_len == p_conn->BufLen) {
+                    *p_err = HTTPs_ERR_CFG_INVALID_BUF_LEN;
+                 } else {
+                    *p_err = HTTPs_ERR_RESP_BUF_NO_MORE_SPACE;
+                 }
+                 return (DEF_NULL);
+             }
+
+            (void)Str_Copy_N(p_str, p_entry->StrPtr, p_entry->StrLen); /* Copy string to the buffer.                    */
+             p_str += p_entry->StrLen;                                 /* Increment buffer pointer.                     */
+             break;
+
+
+        case HTTP_HDR_FIELD_CONTENT_LEN:
+             p_str = Str_FmtNbr_Int32U(p_conn->DataLen,
+                                       DEF_INT_32U_NBR_DIG_MAX,
+                                       DEF_NBR_BASE_DEC,
+                                       ASCII_CHAR_NULL,
+                                       DEF_NO,
+                                       DEF_YES,
+                                       p_str);
+             if (p_str == DEF_NULL) {
+                 return (DEF_NULL);
+             }
+
+             len    = Str_Len_N(p_str, buf_len);
+             p_str += len;
+             break;
+
+
+        case HTTP_HDR_FIELD_LOCATION:
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+             p_path = HTTPs_StrPathGet(p_conn->PathPtr,
+                                       p_conn->PathLenMax,
+                                       p_conn->HostPtr,
+                                       p_cfg->HostNameLenMax,
+                                       DEF_NO);
+#else
+             p_path = p_conn->PathPtr;
+#endif
+
+             len_value = Str_Len_N(p_path, p_conn->PathLenMax);
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+             len_host    = Str_Len_N(p_conn->HostPtr, p_cfg->HostNameLenMax);
+             len_tot     = len_value + len_host;
+             if (len_tot > buf_len) {
+                 return (DEF_NULL);
+             }
+
+            (void)Str_Copy_N(p_str, p_conn->HostPtr, len_host);
+             p_str += len_host;
+#else
+             if (len_value > buf_len) {
+                 return (DEF_NULL);
+             }
+#endif
+
+             Str_Copy_N(p_str, p_path, len_value);
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+             if (p_instance->FS_PathSepChar != HTTPs_PATH_SEP_CHAR_DFLT) {
+                 (void)Str_Char_Replace_N(p_str,
+                                          p_instance->FS_PathSepChar,
+                                          HTTPs_PATH_SEP_CHAR_DFLT,
+                                          buf_len);
+             }
+#endif
+
+             p_str += len_value;
+             break;
+
+
+        default:
+#if (HTTPs_CFG_HDR_TX_EN == DEF_ENABLED)
+             if (p_cfg->HdrTxCfgPtr != DEF_NULL) {
+
+                                                                /* Validate that hdr len value has been set ...         */
+                                                                /* ... correctly in callback fnct RespHdrListFnctPtr.   */
+                 if (val_len <= 0 ||
+                     val_len > p_cfg->HdrTxCfgPtr->DataLenMax) {
+                     break;
+                 }
+                                                                /* Validate that conn buffer remaining len is enough ...*/
+                                                                /* ... for the hdr field value.                         */
+                 if (val_len > buf_len) {
+                     break;
+                 }
+
+                 Mem_Copy ((void *)        p_str,               /* Copy hdr value in conn buff.                         */
+                           (const  void *) p_val,
+                           (CPU_SIZE_T   ) val_len);
+
+
+                 p_str += val_len;                              /* Update conn buf ptr to end of data.                  */
+
+
+             }
+             break;
+#else
+             add_end_field = DEF_NO;
+             p_str         = p_buf;
+#endif
+    }
+
+
+                                                                /* -------------- COPY END OF HDR FIELD --------------- */
+    if (add_end_field == DEF_YES) {
+        len = buf_len - (p_str - p_buf);
+       (void)Str_Copy_N(p_str, STR_CR_LF, len);
+
+        p_str += STR_CR_LF_LEN;
+    }
+
+    return (p_str);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsResp_DataTransferStd()
+*
+* Description : Transfer message-body data with the standard way i.e with the Content-Length header and
+*               no body encoding.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : DEF_YES, if all data has been read.
+*               DEF_NO,  if data still need to be read.
+*
+* Caller(s)   : HTTPsResp_Handle().
+*
+* Note(s)     : (1) RFC #2616, Section 6 'Response' specifies how a response message must be structured:
+*
+*                   (a) After receiving and interpreting a request message, a server responds with an HTTP
+*                       response message.
+*
+*                           Response      = Status-Line               ; Section 6.1
+*                                           *(( general-header        ; Section 4.5
+*                                            | response-header        ; Section 6.2
+*                                            | entity-header ) CRLF)  ; Section 7.1
+*                                           CRLF
+*                                           [ message-body ]          ; Section 7.2
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPsResp_DataTransferStd (HTTPs_INSTANCE  *p_instance,
+                                                HTTPs_CONN      *p_conn,
+                                                HTTPs_ERR       *p_err)
+{
+    void         *p_buf    = p_conn->TxBufPtr + p_conn->TxDataLen;
+    CPU_SIZE_T    buf_size = p_conn->BufLen   - p_conn->TxDataLen;
+    CPU_SIZE_T    size     = 0;
+    CPU_BOOLEAN   done     = DEF_NO;
+
+
+                                                                /* ------------------- RD FILE DATA ------------------- */
+    size = HTTPsResp_DataRd (      p_instance,
+                                   p_conn,
+                       (CPU_CHAR *)p_buf,
+                                   buf_size);
+    if (size > 0) {                                             /* File read successfully.                              */
+
+        p_conn->TxDataLen  += size;
+        p_conn->DataTxdLen += size;
+
+    }
+                                                                /* ------------ VALIDATE FILE RD COMPLETED ------------ */
+    if (p_conn->DataTxdLen >= p_conn->DataLen) {                /* If file is completely read.                          */
+        done = DEF_YES;
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+    return (done);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsResp_DataTransferChunked()
+*
+* Description : Transfers the message-body using chunked transfer coding.
+*               Calls the hook to get the data.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsResp_Handle().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  HTTPsResp_DataTransferChunkedWithHook (HTTPs_INSTANCE  *p_instance,
+                                                            HTTPs_CONN      *p_conn,
+                                                            HTTPs_ERR       *p_err)
+{
+    const  HTTPs_CFG            *p_cfg           = p_instance->CfgPtr;
+           HTTPs_INSTANCE_ERRS  *p_ctr_err;
+           CPU_SIZE_T            len_to_tx       = 0;
+           CPU_SIZE_T            max_dig_str_len;
+           CPU_SIZE_T            max_hdr_size;
+           CPU_SIZE_T            max_buf_free;
+           CPU_BOOLEAN           chunk_hook_def  = DEF_NO;
+           CPU_BOOLEAN           is_last_chunk   = DEF_NO;
+           CPU_BOOLEAN           done            = DEF_NO;
+
+
+    HTTPs_SET_PTR_ERRS( p_ctr_err, p_instance);
+
+    if (p_conn->TxDataLen > 0u) {                               /* All data must be transmitted before processing.      */
+       *p_err = HTTPs_ERR_NONE;
+        goto exit;
+    }
+
+    max_dig_str_len = HTTP_StrSizeHexDigReq(p_conn->BufLen);
+    max_hdr_size    = max_dig_str_len + STR_CR_LF_LEN;
+    max_buf_free    = p_conn->BufLen - max_hdr_size - STR_CR_LF_LEN;
+
+    switch (p_conn->State) {
+        case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_HOOK:
+             chunk_hook_def = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnRespChunkHook);
+             if (chunk_hook_def != DEF_YES) {
+                *p_err = HTTPs_ERR_RESP_DATA_CHUNKED_HOOK_UNDEFINED;
+                 goto exit;
+             }
+                                                                /* If the hook for the chunk is defined ...             */
+                                                                /* ... call the hook function.                          */
+             is_last_chunk = p_cfg->HooksPtr->OnRespChunkHook(p_instance,
+                                                              p_conn,
+                                                              p_cfg->Hooks_CfgPtr,
+                                                              p_conn->TxBufPtr + max_hdr_size,
+                                                              max_buf_free,
+                                                             &len_to_tx);
+             if (len_to_tx > max_buf_free) {
+                *p_err = HTTPs_ERR_RESP_DATA_CHUNKED_LENGTH_INVALID;
+                 goto exit;
+             }
+
+                                                                /* If the length is within limits ...                   */
+             if (is_last_chunk == DEF_TRUE) {                   /* ... if it is the last chunk ...                      */
+                                                                /* .. set the state so the last chunk can be sent.      */
+                 p_conn->State = HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_FINALIZE;
+             } else {                                           /* ... else insure the state didn't changed in the hook.*/
+                 p_conn->State = HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_HOOK;
+             }
+
+             p_conn->TxDataLen = HTTPsResp_WrChunkedToBuf(p_conn->TxBufPtr,
+                                                          p_conn->BufLen,
+                                                          len_to_tx,
+                                                          max_dig_str_len);
+             break;
+
+
+        case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_FINALIZE:
+                                                                /* 1 is for the str length taken by a 0u in hex          */
+             p_conn->TxDataLen = HTTPsResp_WrChunkedToBuf(p_conn->TxBufPtr,
+                                                          p_conn->BufLen,
+                                                          0u,
+                                                          1);
+             done = DEF_YES;
+             break;
+
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrTransferChunckedHookStateInvCtr);
+            *p_err = HTTPs_ERR_STATE_UNKNOWN;
+             goto exit;
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+
+exit:
+    return (done);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsResp_WrChunkedToBuf()
+*
+* Description : Encapsulate the data into the chunked encoding format.
+*               In order to avoid memcopies, this function assumes that the following requirement
+*               have been fulfilled:
+*
+*               (1) The data in the buffer must be placed from bufStart + lenDigitStrLen + STR_CR_LF_LEN.
+*               (2) The buffer size must be at least lenDigitStrLen + 2 * STR_CR_LF_LEN + dataLen.
+*
+*               The data can be place before or after the function call.
+*
+*
+* Argument(s) : p_buf           Pointer to start of buffer.
+*
+*               data_len        Length of the data inside the buffer
+*
+*               len_dig_str_len Length of the hex formatted string length.
+*
+* Return(s)   : Return the length of the the encoded data.
+*
+* Caller(s)   : HTTPsResp_DataTransferChunkedWithHook().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  CPU_SIZE_T  HTTPsResp_WrChunkedToBuf (CPU_CHAR   *p_buf,
+                                              CPU_SIZE_T  buf_len,
+                                              CPU_SIZE_T  data_len,
+                                              CPU_SIZE_T  len_dig_str_len)
+{
+                                                                /* Write the length of the data.                        */
+    HTTP_ChunkTransferWrSize(p_buf, buf_len, len_dig_str_len, data_len);
+
+                                                                /* Skip the data.                                       */
+    data_len += len_dig_str_len + STR_CR_LF_LEN;
+
+                                                                /* Write the end of the data.                           */
+    Str_Copy_N(p_buf + data_len,
+               STR_CR_LF,
+               STR_CR_LF_LEN);
+
+    data_len += STR_CR_LF_LEN;
+
+    return (data_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsResp_FileTransferChunked()
+*
+* Description : Transfer message-body (html & text document) using chunked transfer encoding.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : DEF_YES, if all data has been read.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPsResp_Handle().
+*
+* Note(s)     : (1) RFC #2616, Section 6 'Response' specifies how a response message must be structured:
+*
+*                   (a) After receiving and interpreting a request message, a server responds with an HTTP
+*                       response message.
+*
+*                           Response      = Status-Line               ; Section 6.1
+*                                           *(( general-header        ; Section 4.5
+*                                            | response-header        ; Section 6.2
+*                                            | entity-header ) CRLF)  ; Section 7.1
+*                                           CRLF
+*                                           [ message-body ]          ; Section 7.2
+*
+*               (2) RFC #2616, Section 3.631 'Chunked Transfer Coding' specifies how a message-body must
+*                   be structured:
+*
+*                   (a) The chunked encoding modifies the body of a message in order to transfer it as a series of chunks,
+*                       each with its own size indicator, followed by an OPTIONAL trailer containing entity-header fields.
+*                       This allows dynamically produced content to be transferred along with the information necessary
+*                       for the recipient to verify that it has received the full message.
+*
+*                           Chunked-Body   = *chunk
+*                                            last-chunk
+*                                            trailer
+*                                            CRLF
+*
+*                           chunk          = chunk-size [ chunk-extension ] CRLF
+*                                            chunk-data CRLF
+*                           chunk-size     = 1*HEX
+*                           last-chunk     = 1*("0") [ chunk-extension ] CRLF
+*
+*                           chunk-extension= *( ";" chunk-ext-name [ "=" chunk-ext-val ] )
+*                           chunk-ext-name = token
+*                           chunk-ext-val  = token | quoted-string
+*                           chunk-data     = chunk-size(OCTET)
+*                           trailer        = *(entity-header CRLF)
+*
+*                       The chunk-size field is a string of hex digits indicating the size of the chunk. The chunked
+*                       encoding is ended by any chunk whose size is zero, followed by the trailer, which is terminated
+*                       by an empty line.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  HTTPsResp_DataTransferChunked (HTTPs_INSTANCE  *p_instance,
+                                                    HTTPs_CONN      *p_conn,
+                                                    HTTPs_ERR       *p_err)
+{
+    const  HTTPs_CFG             *p_cfg;
+           CPU_CHAR              *p_buf_hdr_start;
+           CPU_CHAR              *p_buf_hdr_end;
+           CPU_CHAR              *p_buf_data;
+           CPU_CHAR              *p_token_str;
+           CPU_CHAR              *p_token_val_start;
+           CPU_CHAR              *p_token_val_end;
+           CPU_CHAR              *p_token_val_data;
+           CPU_CHAR              *p_wr;
+           HTTPs_INSTANCE_ERRS   *p_ctr_err;
+           HTTPs_INSTANCE_STATS  *p_ctr_stat;
+           CPU_SIZE_T             size_buf_data;
+           CPU_SIZE_T             size_rd;
+           CPU_INT08U             nbr_dig;
+           CPU_INT32S             offset;
+           CPU_BOOLEAN            tx_buf;
+           CPU_BOOLEAN            tx_token;
+           CPU_BOOLEAN            result;
+           CPU_BOOLEAN            chunk_hook_def;
+           CPU_BOOLEAN            done = DEF_NO;
+           HTTPs_TOKEN_TYPE       token_type;
+           HTTPs_ERR              err;
+
+
+    HTTPs_SET_PTR_ERRS(  p_ctr_err,  p_instance);
+    HTTPs_SET_PTR_STATS( p_ctr_stat, p_instance);
+
+    p_cfg = p_instance->CfgPtr;
+
+    if (p_cfg->TokenCfgPtr == DEF_NULL) {
+       *p_err = HTTPs_ERR_CFG_NULL_PTR_TOKEN;
+        goto exit;
+    }
+
+    if (p_conn->TxDataLen > 0u) {                               /* All data must be transmitted before processing.      */
+       *p_err = HTTPs_ERR_NONE;
+        goto exit;
+    }
+
+    token_type = HTTPs_TOKEN_TYPE_NONE;
+
+    switch (p_conn->State) {
+        case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED:
+             tx_token = DEF_NO;
+             tx_buf   = DEF_YES;
+
+                                                                /* ------------------- RD FILE DATA ------------------- */
+             if (p_conn->TokenBufRemLen == 0u) {
+                 p_buf_hdr_start = p_conn->TxBufPtr;
+                 p_buf_data      = p_buf_hdr_start + HTTP_STR_BUF_TOP_SPACE_REQ_MIN;
+                 size_buf_data   = p_conn->BufLen - (HTTP_STR_BUF_TOP_SPACE_REQ_MIN + HTTP_STR_BUF_END_SPACE_REQ_MIN);
+
+                 size_rd         = HTTPsResp_DataRd(p_instance,
+                                              p_conn,
+                                              p_buf_data,
+                                              size_buf_data);
+
+                 size_buf_data   = size_rd;
+
+                 if (size_buf_data == 0u) {
+                     tx_buf = DEF_NO;
+                 }
+
+                 p_conn->TokenBufRemLen  = size_buf_data;
+
+                                                                /* ---------------- AQUIRING TOKEN BLK ---------------- */
+             } else if (p_conn->TokenCtrlPtr == DEF_NULL) {
+
+                 (void)HTTPsMem_TokenGet(p_instance, p_conn, p_err);
+                 switch (*p_err) {
+                     case HTTPs_ERR_NONE:
+                          break;
+
+                     case HTTPs_ERR_TOKEN_POOL_EMPTY:
+                     default:
+                          goto exit;
+                 }
+
+                 p_buf_hdr_start = p_conn->TxBufPtr;
+                 p_buf_data      = p_buf_hdr_start + HTTP_STR_BUF_TOP_SPACE_REQ_MIN;
+                 size_buf_data   = p_conn->TokenBufRemLen;
+                 tx_token        = DEF_YES;
+
+                                                                /* --------------- PROCESSING REM DATA ---------------- */
+             } else {
+
+                 p_buf_data      = p_conn->TokenPtr + p_conn->TokenLen;
+                 size_buf_data   = p_conn->TokenBufRemLen;
+                 p_buf_hdr_start = p_buf_data - HTTP_STR_BUF_TOP_SPACE_REQ_MIN;
+             }
+
+
+                                                                /* -------------------- FIND TOKEN -------------------- */
+             if ((tx_token      == DEF_NO) &&
+                 (size_buf_data  > 0u)    ) {
+
+                 p_conn->TokenLen = HTTPsResp_TokenFinder(p_buf_data,
+                                                          size_buf_data,
+                                                         &p_conn->TokenPtr,
+                                                         &token_type,
+                                                         &err);
+                 switch (err) {
+                     case HTTPs_ERR_NONE:                       /* Token found.                                         */
+                                                                /* If token blk not already aquired...                  */
+                          if (p_conn->TokenCtrlPtr == DEF_NULL) {
+                                                                /* ... acquire token blk.                               */
+                              (void)HTTPsMem_TokenGet(p_instance, p_conn, p_err);
+                              switch (*p_err) {
+                                  case HTTPs_ERR_NONE:
+                                       break;
+
+                                  case HTTPs_ERR_TOKEN_POOL_EMPTY:
+                                  default:
+                                       goto exit;
+                              }
+                          }
+                          HTTPs_STATS_INC(p_ctr_stat->Resp_StatTokenFoundCtr);
+                          tx_token = DEF_YES;                   /* Let prepare token chunk.                             */
+                          break;
+
+
+                     case HTTPs_ERR_TOKEN_MORE_DATA_REQ:        /* Half of token found.                                 */
+                          offset                  = 0 - (size_buf_data - (p_conn->TokenPtr - p_buf_data));
+                          size_buf_data          += offset;
+                          p_conn->TokenBufRemLen  = 0;
+                          HTTPsResp_DataSetPos(p_instance,
+                                          p_conn,
+                                          offset,
+                                          NET_FS_SEEK_ORIGIN_CUR);
+                          break;
+
+
+                     case HTTPs_ERR_TOKEN_NO_TOKEN_FOUND:
+                     default:
+                          p_conn->TokenBufRemLen = 0;
+                          break;
+                 }
+             }
+
+
+                                                                /* --------------- PREPARE TOKEN CHUNK ---------------- */
+             if (tx_token == DEF_YES) {
+                 p_token_str       = p_conn->TokenPtr             + HTTPs_TOKEN_CHAR_OFFSET_LEN;
+                 p_token_val_start = p_conn->TokenCtrlPtr->ValPtr;
+                 p_token_val_data  = p_conn->TokenCtrlPtr->ValPtr + HTTP_STR_BUF_TOP_SPACE_REQ_MIN;
+
+                 switch (token_type) {
+                     case HTTPs_TOKEN_TYPE_EXTERNAL:
+                          chunk_hook_def = HTTPs_HOOK_DEFINED(p_cfg->HooksPtr, OnRespTokenHook);
+                          if (chunk_hook_def == DEF_YES) {
+                              result  = p_cfg->HooksPtr->OnRespTokenHook(p_instance,
+                                                                         p_conn,
+                                                                         p_cfg->Hooks_CfgPtr,
+                                                                         p_token_str,
+                                                                         p_conn->TokenLen,
+                                                                         p_token_val_data,
+                                                                         p_cfg->TokenCfgPtr->ValLenMax);
+                          } else {
+                              HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenPtrNullCtr);
+                              result = DEF_FAIL;
+                          }
+                          break;
+
+                     case HTTPs_TOKEN_TYPE_INTERNAL:
+                          result = HTTPsResp_TokenValSet(p_instance,
+                                                         p_conn,
+                                                         p_token_str,
+                                                         p_conn->TokenLen,
+                                                         p_token_val_data,
+                                                         p_cfg->TokenCfgPtr->ValLenMax);
+                          break;
+
+                     default:
+                         HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenTypeInvalidCtr);
+                         result = DEF_FAIL;
+                         break;
+                 }
+
+
+                 if (result == DEF_OK) {
+                     p_conn->TokenCtrlPtr->ValLen = Str_Len_N(p_token_val_data, p_cfg->TokenCfgPtr->ValLenMax);
+                     if (p_conn->TokenCtrlPtr->ValLen == 0u) {
+                         tx_token = DEF_NO;
+                     }
+
+                 } else {
+                     Mem_Set(p_token_val_data, HTTPs_TOKEN_CHAR_DFLT_VAL, p_cfg->TokenCfgPtr->ValLenMax);
+                     p_conn->TokenCtrlPtr->ValLen = p_cfg->TokenCfgPtr->ValLenMax;
+                 }
+
+                 if (p_buf_data != p_conn->TokenPtr) {
+                     size_buf_data           =  p_conn->TokenPtr - p_buf_data;
+                     p_conn->TokenBufRemLen -= (size_buf_data    + p_conn->TokenLen);
+                 } else {
+                     tx_buf                  = DEF_NO;
+                     p_conn->TokenBufRemLen -= p_conn->TokenLen;
+
+                     if (tx_token == DEF_NO) {                  /* Check if token at beginning of sector is empty       */
+                        *p_err = HTTPs_ERR_NONE;
+                         goto exit;
+                     }
+                 }
+
+                 p_conn->DataTxdLen          += p_conn->TokenCtrlPtr->ValLen;
+                 nbr_dig                      = HTTP_StrSizeHexDigReq(p_conn->TokenCtrlPtr->ValLen);
+                 p_token_val_start           += HTTP_STR_BUF_TOP_SPACE_REQ_MIN - nbr_dig - STR_CR_LF_LEN;
+                 p_wr                         = p_token_val_start;
+                 p_conn->TokenCtrlPtr->TxPtr  = p_wr;
+
+                 Str_FmtNbr_Int32U(p_conn->TokenCtrlPtr->ValLen, nbr_dig, DEF_NBR_BASE_HEX, DEF_NO, DEF_YES, DEF_NO, p_wr);
+                 p_wr += nbr_dig;
+                 Str_Copy_N(p_wr, STR_CR_LF, STR_CR_LF_LEN);
+
+                 p_token_val_end = p_token_val_data + p_conn->TokenCtrlPtr->ValLen;
+                 Str_Copy_N(p_token_val_end, STR_CR_LF, STR_CR_LF_LEN);
+
+                 p_conn->TokenCtrlPtr->TxLen = (p_token_val_end + STR_CR_LF_LEN) - p_token_val_start;
+             }
+
+
+                                                                /* ------------- PREPARE FILE DATA CHUNK -------------- */
+             if (tx_buf == DEF_YES) {
+                 nbr_dig           = HTTP_StrSizeHexDigReq(size_buf_data);
+                 p_buf_hdr_end     = p_buf_data + size_buf_data;
+                 p_buf_hdr_start  += HTTP_STR_BUF_TOP_SPACE_REQ_MIN - nbr_dig - STR_CR_LF_LEN;
+                 p_wr              = p_buf_hdr_start;
+                 p_conn->TxBufPtr  = p_wr;
+
+                 Str_FmtNbr_Int32U(size_buf_data, nbr_dig, DEF_NBR_BASE_HEX, DEF_NO, DEF_YES, DEF_NO, p_wr);
+                 p_wr += nbr_dig;
+                 Str_Copy_N(p_wr, STR_CR_LF, STR_CR_LF_LEN);
+
+                 Str_Copy_N(p_buf_hdr_end, STR_CR_LF, STR_CR_LF_LEN);
+
+                 p_conn->TxDataLen = (p_buf_hdr_end + STR_CR_LF_LEN) - p_buf_hdr_start;
+
+                 p_conn->DataTxdLen += size_buf_data;
+             }
+
+                                                                /* ---------------- UPDATE CONN STATES ---------------- */
+             p_conn->SockState = HTTPs_SOCK_STATE_TX;
+
+
+             if ((tx_buf   == DEF_YES) &&                       /* Tx only file data chunk.                             */
+                 (tx_token == DEF_NO) ) {
+                 p_conn->State = HTTPs_CONN_STATE_RESP_DATA_CHUNCKED;
+
+             } else if ((tx_buf   == DEF_YES) &&                /* Tx file data chunk & token data chunk.               */
+                        (tx_token == DEF_YES)) {
+                 p_conn->State     = HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_TX_TOKEN;
+
+             } else if ((tx_buf   == DEF_NO) &&                 /* Tx only token data chunk.                            */
+                        (tx_token == DEF_YES)) {
+                 p_conn->TxBufPtr  = p_conn->TokenCtrlPtr->TxPtr;
+                 p_conn->TxDataLen = p_conn->TokenCtrlPtr->TxLen;
+                 p_conn->State     = HTTPs_CONN_STATE_RESP_DATA_CHUNCKED;
+
+             } else {                                           /* Tx last chunk.                                       */
+                 p_conn->State = HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_TX_LAST_CHUNK;
+                 p_wr          = p_conn->TxBufPtr;
+                 Str_FmtNbr_Int32U(0, 1, DEF_NBR_BASE_HEX, DEF_NO, DEF_YES, DEF_NO, p_wr);
+                 p_wr++;
+                 Str_Copy_N(p_wr, STR_CR_LF, STR_CR_LF_LEN);
+
+                 p_wr +=2;
+                 Str_Copy_N(p_wr, STR_CR_LF, STR_CR_LF_LEN);
+                 p_conn->TxDataLen = 5;
+             }
+             break;
+
+                                                                /* ---------- UPDATE CONN STATES TO TX TOKEN ---------- */
+        case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_TX_TOKEN:
+             p_conn->TxBufPtr  = p_conn->TokenCtrlPtr->TxPtr;
+             p_conn->TxDataLen = p_conn->TokenCtrlPtr->TxLen;
+             p_conn->State     = HTTPs_CONN_STATE_RESP_DATA_CHUNCKED;
+             break;
+
+
+                                                                /* ------- UPDATE CONN STATES TO COMPLETE RESP -------- */
+        case HTTPs_CONN_STATE_RESP_DATA_CHUNCKED_TX_LAST_CHUNK:
+             done = DEF_YES;
+             break;
+
+
+        default:                                                /* Inv state.                                           */
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrTransferChunckedStateInvCtr);
+            *p_err = HTTPs_ERR_STATE_UNKNOWN;
+             goto exit;
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+exit:
+    return (done);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsResp_TokenFinder()
+*
+* Description : Search for token to be parsed or replaced in a sting buffer.
+*
+* Argument(s) : p_buf               Pointer to the buffer that contains the string to search within.
+*
+*               buf_len             Length of the buffer.
+*
+*               p_str_token         Pointer to pointer that will set to the beginning of the token found.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE                              Token successfully found.
+*
+*                           HTTPs_ERR_TOKEN_NO_TOKEN_FOUND              No token found in the buffer.
+*                           HTTPs_ERR_TOKEN_MORE_DATA_REQ               A token may be found but can not be validated,
+*                                                                           more data is required to complete the search.
+*
+* Return(s)   : Length of token found (including start char and end char of the token), if token found and validated.
+*
+*               0,                                                                      otherwise.
+*
+* Caller(s)   : HTTPsResp_FileTransferChunked().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+static  CPU_INT16U  HTTPsResp_TokenFinder (CPU_CHAR           *p_buf,
+                                           CPU_INT16U          buf_len,
+                                           CPU_CHAR          **p_str_token,
+                                           HTTPs_TOKEN_TYPE   *p_token_type,
+                                           HTTPs_ERR          *p_err)
+{
+    CPU_CHAR     *p_srch;
+    CPU_CHAR     *p_token_start;
+    CPU_CHAR     *p_token_external_start;
+    CPU_CHAR     *p_token_internal_start;
+    CPU_CHAR     *p_token_end;
+    CPU_INT16U    len;
+    CPU_BOOLEAN   done;
+
+
+    p_srch = p_buf;
+    len    = buf_len;
+    done   = DEF_NO;
+
+    while (done != DEF_YES) {
+        p_token_external_start = Str_Char_N(p_srch,             /* Srch External token start char in the buf            */
+                                            len,
+                                            HTTPs_TOKEN_EXTENAL_CHAR_START);
+
+        p_token_internal_start = Str_Char_N(p_srch,             /* Srch Internal token start char in the buf            */
+                                            len,
+                                            HTTPs_TOKEN_INTERNAL_CHAR_START);
+
+                                                                /* Determine which type of token is the first find.     */
+        if ((p_token_external_start != DEF_NULL)              &&
+            (p_token_internal_start != DEF_NULL)              &&
+            (p_token_external_start  < p_token_internal_start)) {
+
+            *p_token_type  = HTTPs_TOKEN_TYPE_EXTERNAL;
+             p_token_start = p_token_external_start;
+
+        } else if (p_token_external_start != DEF_NULL) {
+
+            *p_token_type  = HTTPs_TOKEN_TYPE_EXTERNAL;
+             p_token_start = p_token_external_start;
+
+        } else if (p_token_internal_start != DEF_NULL){
+
+            *p_token_type  = HTTPs_TOKEN_TYPE_INTERNAL;
+             p_token_start = p_token_internal_start;
+
+        } else {                                                /* If token start char not found ...                    */
+            *p_token_type  = HTTPs_TOKEN_TYPE_NONE;
+            *p_err         = HTTPs_ERR_TOKEN_NO_TOKEN_FOUND;    /* ... buf doesn't contains token.                      */
+             return (0u);                                       /* ... not token validated.                             */
+        }
+
+
+        len = len - (p_token_start - p_buf) - 1;                /* Calculate remaining space after start token char.    */
+        if (len == 0) {                                         /* If start token char is the last char of the buf ...  */
+           *p_str_token = p_token_start;                        /* ... set the token start pointer ...                  */
+           *p_err = HTTPs_ERR_TOKEN_MORE_DATA_REQ;              /* ... more data is required to process the token.      */
+            return (0u);                                        /* ... token can not be validated.                      */
+        }
+
+       *p_str_token = p_token_start;
+        p_srch      = p_token_start + 1;                        /* Move to the next buf char.                           */
+
+
+        if (*p_srch == HTTPs_TOKEN_CHAR_VAR_SEP_START) {        /* Is it a char token start var sep ...                 */
+                                                                /* ... real token found ...                             */
+             p_token_end = Str_Char_N(p_srch,                   /* ... srch the end of the token...                     */
+                                      len,
+                                      HTTPs_TOKEN_CHAR_VAR_SEP_END);
+             if (p_token_end == DEF_NULL) {                     /* If end of token not found ...                        */
+                *p_err = HTTPs_ERR_TOKEN_MORE_DATA_REQ;         /* ... more data is required to process the token.      */
+                 return (0u);                                   /* ... token can not be validated.                      */
+             }
+
+             done        = DEF_YES;                             /* Token found and validated, can return it.            */
+            *p_token_end = ASCII_CHAR_NULL;                     /* Create a string.                                     */
+        }
+    }
+
+    len   = (p_token_end - p_token_start) + 1;                  /* Calculate the length of the token validated.         */
+
+   *p_err =  HTTPs_ERR_NONE;                                    /* No err, token can be processed.                      */
+
+    return (len);
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsResp_TokenValSet()
+*
+* Description : Called for each token (${TEXT_STRING}) found in a HTML document.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_val        Pointer to buffer where to copy token value.
+*
+*               val_len_max  Value buffer length.
+*
+* Return(s)   : DEF_OK,   if token value copied successfully.
+*
+*               DEF_FAIL, otherwise (see Note #2).
+*
+* Caller(s)   : HTTPsResp_DataTransferChunked().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  HTTPsResp_TokenValSet (       HTTPs_INSTANCE  *p_instance,
+                                                   HTTPs_CONN      *p_conn,
+                                            const  CPU_CHAR        *p_token,
+                                                   CPU_INT16U       token_len,
+                                                   CPU_CHAR        *p_val,
+                                                   CPU_INT16U       val_len_max)
+{
+    CPU_INT32U             token_key;
+    HTTPs_TOKEN_INTERNAL   token;
+    HTTP_DICT       *p_entry;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+
+
+    HTTPs_SET_PTR_ERRS(p_ctr_err, p_instance);
+
+
+    token_key = HTTP_Dict_KeyGet(HTTPs_DictionaryTokenInternal,
+                                 HTTPs_DictionarySizeTokenInternal,
+                                 p_token,
+                                 DEF_YES,
+                                 token_len);
+    if (token_key == HTTP_DICT_KEY_INVALID) {
+        HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenInternalInvalidCtr);
+        return (DEF_FAIL);
+    }
+
+    token = (HTTPs_TOKEN_INTERNAL)token_key;
+
+    switch (token) {
+        case HTTPs_TOKEN_INTERNAL_STATUS_CODE:
+             p_entry = HTTP_Dict_EntryGet(HTTP_Dict_StatusCode,
+                                          HTTP_Dict_StatusCodeSize,
+                                          p_conn->StatusCode);
+             if (p_entry != DEF_NULL) {
+                 Str_Copy_N(p_val, p_entry->StrPtr, val_len_max);
+                 return (DEF_OK);
+             }
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenInternalStatusCodeInvalidCtr);
+             break;
+
+
+        case HTTPs_TOKEN_INTERNAL_REASON_PHRASE:
+             p_entry = HTTP_Dict_EntryGet(HTTP_Dict_ReasonPhrase,
+                                          HTTP_Dict_ReasonPhraseSize,
+                                          p_conn->StatusCode);
+
+             if (p_entry != DEF_NULL) {
+                 Str_Copy_N(p_val, p_entry->StrPtr, val_len_max);
+                 return (DEF_OK);
+             }
+             HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenInternalReasonPhraseInvalidCtr);
+             break;
+
+
+        default:
+            HTTPs_ERR_INC(p_ctr_err->Resp_ErrTokenInternalInvalidCtr);
+            break;
+
+    }
+
+    return (DEF_FAIL);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsResp_DfltErrPageSet()
+*
+* Description : Configure the connection to transmit the static error page.
+*
+* Argument(s) : p_conn  Pointer to the connection.
+*               ------  Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsResp_PrepareStatusCode().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsResp_DfltErrPageSet (HTTPs_INSTANCE  *p_instance,
+                                        HTTPs_CONN      *p_conn)
+{
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    const  HTTPs_CFG    *p_cfg = p_instance->CfgPtr;
+           CPU_BOOLEAN   chunk_en;
+#endif
+
+
+    p_conn->RespBodyDataType = HTTPs_BODY_DATA_TYPE_STATIC_DATA;
+    p_conn->RespContentType  = HTTP_CONTENT_TYPE_HTML;
+    p_conn->DataLen          = HTTPs_HTML_DLFT_ERR_LEN;
+    p_conn->DataPtr          = HTTPs_CFG_HTML_DFLT_ERR_PAGE;
+
+                                                                /* Check if Chunked Transfer Encoding is needed.        */
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+    chunk_en = DEF_BIT_IS_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+    if ((p_conn->ProtocolVer == HTTP_PROTOCOL_VER_1_1)  &&      /* If protocol ver is 1.1 ...    */
+        (p_cfg->TokenCfgPtr  != DEF_NULL)               &&      /* ..token parsing is enabled .. */
+        (chunk_en            == DEF_YES)              )  {
+        DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+    } else {
+        DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+    }
+#else
+    DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_CHUNKED);
+#endif
+
+    Str_Copy_N(p_conn->PathPtr,
+               HTTPs_HTML_DLFT_ERR_STR_NAME,
+               p_conn->PathLenMax);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsResp_FileOpen()
+*
+* Description : Open file from the file system and the size.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsResp_PrepareBodyData().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  HTTPsResp_FileOpen (HTTPs_INSTANCE  *p_instance,
+                                         HTTPs_CONN      *p_conn)
+{
+    const  HTTPs_CFG             *p_cfg;
+    const  NET_FS_API            *p_fs_api;
+           CPU_CHAR              *p_file_path;
+           CPU_BOOLEAN            valid;
+           HTTPs_INSTANCE_ERRS   *p_ctr_errs;
+           HTTPs_INSTANCE_STATS  *p_ctr_stats;
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+           CPU_BOOLEAN            location_needed;
+#endif
+
+
+    HTTPs_SET_PTR_ERRS( p_ctr_errs,  p_instance);
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+
+    p_cfg    = p_instance->CfgPtr;
+
+    switch (p_cfg->FS_Type) {
+        case HTTPs_FS_TYPE_STATIC:
+             p_fs_api = ((HTTPs_CFG_FS_STATIC *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+             break;
+
+        case HTTPs_FS_TYPE_DYN:
+             p_fs_api = ((HTTPs_CFG_FS_DYN *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+             break;
+
+        case HTTPs_FS_TYPE_NONE:
+        default:
+            HTTPs_ERR_INC(p_ctr_errs->File_ErrOpenNoFS_Ctr);
+            return (DEF_FAIL);
+    }
+
+                                                                /* Body is not a file: exit.                            */
+    if ((p_conn->RespBodyDataType == HTTPs_BODY_DATA_TYPE_STATIC_DATA) ||
+        (p_conn->RespBodyDataType == HTTPs_BODY_DATA_TYPE_NONE)       ) {
+         return (DEF_OK);
+    }
+
+    if (p_fs_api == DEF_NULL) {
+        HTTPs_ERR_INC(p_ctr_errs->File_ErrOpenNoFS_Ctr);
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------------ SET FILE PATH ------------------- */
+                                                                /* Translate the HTTP path into FS compatible path */
+    if (p_instance->FS_PathSepChar != HTTPs_PATH_SEP_CHAR_DFLT) {
+        Str_Char_Replace_N(p_conn->PathPtr,
+                           HTTPs_PATH_SEP_CHAR_DFLT,
+                           p_instance->FS_PathSepChar,
+                           p_conn->PathLenMax);
+    }
+
+    p_file_path = p_conn->PathPtr;
+
+    while (*p_file_path == p_instance->FS_PathSepChar) {        /* Skip the leading path separator.                     */
+        p_file_path++;
+    }
+
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+    p_file_path = HTTPs_StrPathGet(p_file_path,
+                                   p_conn->PathLenMax - (p_file_path - p_conn->PathPtr),
+                                   p_conn->HostPtr,
+                                   p_cfg->HostNameLenMax,
+                                  &location_needed);
+    if (location_needed == DEF_YES) {
+        DEF_BIT_SET(p_conn->Flags, HTTPs_FLAG_RESP_LOCATION);
+    } else {
+        DEF_BIT_CLR(p_conn->Flags, HTTPs_FLAG_RESP_LOCATION);
+    }
+#endif
+
+                                                                /* -------------------- OPEN FILE --------------------- */
+    p_conn->DataPtr = p_fs_api->Open(p_file_path,
+                                     NET_FS_FILE_MODE_OPEN,
+                                     NET_FS_FILE_ACCESS_RD);
+    if (p_conn->DataPtr != DEF_NULL) {                          /* If file opened successfully...                       */
+        HTTPs_STATS_INC(p_ctr_stats->FS_StatOpenedCtr);
+
+                                                                /* ------------ GET FILE SIZE FOR THE RESP ------------ */
+        valid = p_fs_api->GetSize(p_conn->DataPtr, &p_conn->DataLen);
+        if (valid != DEF_YES) {                                 /* If unable to get a valid size...                     */
+            HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+            HTTPs_STATS_INC(p_ctr_stats->FS_StatClosedCtr);
+            p_fs_api->Close(p_conn->DataPtr);                   /* ... Close the file ...                               */
+            p_conn->DataPtr = DEF_NULL;
+
+            return (DEF_FAIL);
+        }
+
+    } else {                                                    /* If file not opened successfully.                     */
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPsResp_DataRd()
+*
+* Description : Read file data.
+*
+* Argument(s) : p_instance      Pointer to the instance.
+*               ----------      Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn          Pointer to the connection.
+*               ------          Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_dst           Pointer to buffer where to store read data.
+*               ----            Argument validated in HTTPs_Resp(),
+*                                                     HTTPs_TokenValGet().
+*
+*               dst_len_max     Maximum data that can be put in the destination.
+*
+* Return(s)   : Length of data read.
+*
+* Caller(s)   : HTTPsResp_DataTransferChunked(),
+*               HTTPsResp_DataTransferStd().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_SIZE_T  HTTPsResp_DataRd (HTTPs_INSTANCE  *p_instance,
+                                      HTTPs_CONN      *p_conn,
+                                      CPU_CHAR        *p_dst,
+                                      CPU_SIZE_T       dst_len_max)
+{
+    const  HTTPs_CFG            *p_cfg = p_instance->CfgPtr;
+    const  NET_FS_API           *p_fs_api;
+           HTTPs_INSTANCE_ERRS  *p_ctr_errs;
+           CPU_CHAR             *p_src;
+           CPU_SIZE_T            size;
+
+
+    HTTPs_SET_PTR_ERRS( p_ctr_errs,  p_instance);
+
+    switch (p_cfg->FS_Type) {
+        case HTTPs_FS_TYPE_STATIC:
+             p_fs_api = ((HTTPs_CFG_FS_STATIC *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+             break;
+
+        case HTTPs_FS_TYPE_DYN:
+             p_fs_api = ((HTTPs_CFG_FS_DYN *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+             break;
+
+        case HTTPs_FS_TYPE_NONE:
+             p_fs_api = DEF_NULL;
+             break;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_errs->FS_ErrTypeInvalidCtr);
+             return (0);
+    }
+
+
+                                                                /* ------------------- RD FILE DATA ------------------- */
+    switch (p_conn->RespBodyDataType) {
+        case HTTPs_BODY_DATA_TYPE_STATIC_DATA:                  /* File type is fixed, internal err page.               */
+             p_src = (CPU_CHAR *)p_conn->DataPtr + p_conn->DataFixPosCur;
+             size  =  p_conn->DataLen - p_conn->DataFixPosCur;
+             size  =  DEF_MIN(size, dst_len_max);
+             Mem_Copy(p_dst, p_src, size);                      /* Copy file data to the buf.                           */
+             p_conn->DataFixPosCur += size;
+             break;
+
+        case HTTPs_BODY_DATA_TYPE_NONE:
+             size = 0;
+             break;
+
+        case HTTPs_BODY_DATA_TYPE_FILE:                         /* File type is from FS.                                */
+             if (p_fs_api != DEF_NULL) {
+                 (void)p_fs_api->Rd(p_conn->DataPtr,            /* Read file from the FS.                               */
+                                    p_dst,
+                                    dst_len_max,
+                                   &size);
+             } else {
+                 HTTPs_ERR_INC(p_ctr_errs->File_ErrRdNoFS_Ctr);
+                 size = 0;
+             }
+             break;
+
+        default:
+             size = 0;
+             break;
+     }
+
+    return (size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsResp_DataSetPos()
+*
+* Description : Set file position indicator.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               offset      Offset from the file position specified by 'origin'.
+*
+*               origin      Reference position for offset:
+*
+*                           NET_FS_SEEK_ORIGIN_START    Offset is from the beginning of the file.
+*                           NET_FS_SEEK_ORIGIN_CUR      Offset is from current file position.
+*                           NET_FS_SEEK_ORIGIN_END      Offset is from the end       of the file.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsResp_DataTransferChunked().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_TOKEN_PARSE_EN == DEF_ENABLED)
+static  void  HTTPsResp_DataSetPos (HTTPs_INSTANCE  *p_instance,
+                                    HTTPs_CONN      *p_conn,
+                                    CPU_INT32S       offset,
+                                    CPU_INT08U       origin)
+{
+    const  HTTPs_CFG            *p_cfg = p_instance->CfgPtr;
+    const  NET_FS_API           *p_fs_api;
+           HTTPs_INSTANCE_ERRS  *p_ctr_errs;
+
+
+    HTTPs_SET_PTR_ERRS( p_ctr_errs,  p_instance);
+
+    switch (p_cfg->FS_Type) {
+        case HTTPs_FS_TYPE_STATIC:
+             p_fs_api = ((HTTPs_CFG_FS_STATIC *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+             break;
+
+        case HTTPs_FS_TYPE_DYN:
+             p_fs_api = ((HTTPs_CFG_FS_DYN *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+             break;
+
+        case HTTPs_FS_TYPE_NONE:
+             p_fs_api = DEF_NULL;
+             break;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_errs->FS_ErrTypeInvalidCtr);
+             return;
+    }
+
+    switch (p_conn->RespBodyDataType) {
+        case HTTPs_BODY_DATA_TYPE_STATIC_DATA:                  /* File type is fixed (err page).                       */
+             switch (origin) {
+                 case NET_FS_SEEK_ORIGIN_START:
+                      if (offset >= 0) {
+                          p_conn->DataFixPosCur = offset;
+                      }
+                      break;
+
+                 case NET_FS_SEEK_ORIGIN_CUR:
+                      p_conn->DataFixPosCur += offset;
+                      break;
+
+                 case NET_FS_SEEK_ORIGIN_END:
+                      if (offset <= 0) {
+                          p_conn->DataFixPosCur = p_conn->DataLen + offset;
+                      } else {
+                          p_conn->DataFixPosCur = p_conn->DataLen;
+                      }
+                      break;
+
+
+                 default:
+                     break;
+             }
+             break;
+
+
+        case HTTPs_BODY_DATA_TYPE_FILE:                           /* File type is from FS.                                */
+             if (p_fs_api != DEF_NULL) {
+                 (void)p_fs_api->SetPos(p_conn->DataPtr,
+                                        offset,
+                                        origin);
+             } else {
+                 HTTPs_ERR_INC(p_ctr_errs->File_ErrSetPosNoFS_Ctr);
+             }
+             break;
+
+
+        case HTTPs_BODY_DATA_TYPE_NONE:
+        default:
+             break;
+     }
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_resp.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_resp.h
new file mode 100644
index 0000000..7f0ae51
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_resp.h
@@ -0,0 +1,93 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP SERVER RESPONSE MODULE
+*
+* Filename      : http-s_resp.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPs module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPs_RESP_MODULE_PRESENT                          /* See Note #1.                                         */
+#define  HTTPs_RESP_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  "http-s.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsResp_Prepare      (HTTPs_INSTANCE  *p_instance,
+                                     HTTPs_CONN      *p_conn);
+
+CPU_BOOLEAN  HTTPsResp_Handle       (HTTPs_INSTANCE  *p_instance,
+                                     HTTPs_CONN      *p_conn);
+
+void         HTTPsResp_DataComplete (HTTPs_INSTANCE  *p_instance,
+                                     HTTPs_CONN      *p_conn);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPs_RESP_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_sock.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_sock.c
new file mode 100644
index 0000000..3c848bb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_sock.c
@@ -0,0 +1,1007 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP SERVER SOCKET MODULE
+*
+* Filename      : http-s_sock.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPs_SOCK_MODULE
+
+#include  "http-s_sock.h"
+#include  "http-s_mem.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_SOCK_SEL_TIMEOUT_MS                          1u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void  HTTPsSock_ConnAccept (HTTPs_INSTANCE  *p_instance,
+                                    NET_SOCK_ID      sock_listen_id);
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsSock_ListenInit()
+*
+* Description : (1) Initialize listen socket:
+*
+*                   (a) Open socket.
+*                   (b) Configure socket secure option.
+*                   (c) Bind socket.
+*                   (d) Configure socket for listen.
+*                   (e) Configure socket blocking option.
+*
+* Argument(s) : p_cfg   Pointer to the instance configuration structure.
+*               -----   Argument validated in HTTPs_InstanceStart().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE                      Listen socket successfully initialized.
+*                           HTTPs_ERR_SOCK_OPEN                 Socket open   failed.
+*                           HTTPs_ERR_SOCK_BIND                 Socket bind   failed.
+*                           HTTPs_ERR_SOCK_LISTEN               Socket listen failed.
+*
+*                           HTTPs_ERR_SOCK_SET_OPT_SECURE       Set socket option secure failed.
+*                           HTTPs_ERR_SOCK_SET_OPT_BLOCK        Set socket option block  failed
+*
+*                           HTTPs_ERR_CFG_INVALID_SECURE_EN     Socket secure module not present.
+*
+* Return(s)   : Socket descriptor/handle identifier for the listen, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_OPEN,                              otherwise.
+*
+* Caller(s)   : HTTPs_InstanceStart().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_SOCK_ID  HTTPsSock_ListenInit (const  HTTPs_CFG                 *p_cfg,
+                                          NET_SOCK_PROTOCOL_FAMILY   family,
+                                          HTTPs_ERR                 *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR         net_ipv4_addr_any;
+#endif
+    NET_SOCK_ID           sock_id;
+    NET_SOCK_ADDR         sock_addr;
+    NET_SOCK_ADDR_LEN     sock_addr_len;
+    CPU_INT08U           *p_addr;
+    NET_SOCK_ADDR_LEN     addr_len;
+    NET_ERR               err;
+
+
+                                                                /* -------------------- OPEN SOCK --------------------- */
+    sock_id = NetSock_Open(family,
+                           NET_SOCK_TYPE_STREAM,
+                           NET_SOCK_PROTOCOL_TCP,
+                          &err);
+    if (err != NET_SOCK_ERR_NONE) {
+       *p_err = HTTPs_ERR_SOCK_OPEN;
+        return (NET_SOCK_BSD_ERR_OPEN);
+    }
+
+
+                                                                /* --------------- CFG SOCK SECURE OPT----------------- */
+    if (p_cfg->SecurePtr != DEF_NULL) {
+#ifndef NET_SECURE_MODULE_EN                                    /* Set or clear socket secure mode.                     */
+       *p_err = HTTPs_ERR_CFG_INVALID_SECURE_EN;
+        (void)NetSock_Close(sock_id, &err);
+        return (NET_SOCK_BSD_ERR_OPEN);
+#else
+
+       (void)NetSock_CfgSecure(sock_id,
+                               DEF_YES,
+                              &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 break;
+
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_ARG:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_STATE:
+            case NET_SOCK_ERR_INVALID_OP:
+            case NET_ERR_FAULT_FEATURE_DIS:
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_SECURE_ERR_NOT_AVAIL:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+            default:
+                 (void)NetSock_Close(sock_id, &err);
+                *p_err = HTTPs_ERR_SOCK_SET_OPT_SECURE;
+                 return (NET_SOCK_BSD_ERR_OPEN);
+        }
+
+
+       (void)NetSock_CfgSecureServerCertKeyInstall(sock_id,
+                                                   p_cfg->SecurePtr->CertPtr,
+                                                   p_cfg->SecurePtr->CertLen,
+                                                   p_cfg->SecurePtr->KeyPtr,
+                                                   p_cfg->SecurePtr->KeyLen,
+                                                   p_cfg->SecurePtr->Fmt,
+                                                   p_cfg->SecurePtr->CertChain,
+                                                  &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 break;
+
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_ARG:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_STATE:
+            case NET_SOCK_ERR_INVALID_OP:
+            case NET_ERR_FAULT_FEATURE_DIS:
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_SECURE_ERR_NOT_AVAIL:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+            default:
+                 (void)NetSock_Close(sock_id, &err);
+                *p_err = HTTPs_ERR_SOCK_SET_OPT_SECURE;
+                 return (NET_SOCK_BSD_ERR_OPEN);
+        }
+#endif
+    }
+
+                                                                /* -------------------- BIND SOCK --------------------- */
+    switch (family) {
+        case NET_SOCK_ADDR_FAMILY_IP_V4:
+#ifdef  NET_IPv4_MODULE_EN
+             net_ipv4_addr_any =  NET_IPv4_ADDR_ANY;
+             p_addr            = (CPU_INT08U *)&net_ipv4_addr_any;
+             addr_len          =  NET_IPv4_ADDR_SIZE;
+             sock_addr_len     =  sizeof(sock_addr);
+#else
+             (void)NetSock_Close(sock_id, &err);
+            *p_err = HTTPs_ERR_SOCK_BIND;
+             return (NET_SOCK_BSD_ERR_OPEN);
+#endif
+             break;
+
+
+        case NET_SOCK_ADDR_FAMILY_IP_V6:
+#ifdef  NET_IPv6_MODULE_EN
+             p_addr        = (CPU_INT08U *)&NET_IPv6_ADDR_ANY;
+             addr_len      =  NET_IPv6_ADDR_SIZE;
+             sock_addr_len =  sizeof(sock_addr);
+#else
+             (void)NetSock_Close(sock_id, &err);
+            *p_err = HTTPs_ERR_SOCK_BIND;
+             return (NET_SOCK_BSD_ERR_OPEN);
+#endif
+             break;
+
+
+        default:
+            (void)NetSock_Close(sock_id, &err);
+           *p_err = HTTPs_ERR_SOCK_BIND;
+            return (NET_SOCK_BSD_ERR_OPEN);
+    }
+
+
+    NetApp_SetSockAddr(&sock_addr,
+                       family,
+                       p_cfg->Port,
+                       p_addr,
+                       addr_len,
+                      &err);
+    switch (err) {
+        case NET_APP_ERR_NONE:
+            break;
+
+        case NET_APP_ERR_FAULT:
+        case NET_APP_ERR_NONE_AVAIL:
+        case NET_APP_ERR_INVALID_ARG:
+        default:
+             (void)NetSock_Close(sock_id, &err);
+            *p_err = HTTPs_ERR_SOCK_BIND;
+             return (NET_SOCK_BSD_ERR_OPEN);
+    }
+
+
+    (void)NetSock_Bind(sock_id,
+                      &sock_addr,
+                       sock_addr_len,
+                      &err);
+    if (err != NET_SOCK_ERR_NONE) {
+       (void)NetSock_Close(sock_id, &err);
+       *p_err = HTTPs_ERR_SOCK_BIND;
+        return (NET_SOCK_BSD_ERR_OPEN);
+    }
+
+
+                                                                /* ------------------- LISTEN SOCK -------------------- */
+   (void)NetSock_Listen(sock_id, p_cfg->ConnNbrMax, &err);
+    if (err != NET_SOCK_ERR_NONE) {
+       (void)NetSock_Close(sock_id, &err);
+       *p_err = HTTPs_ERR_SOCK_LISTEN;
+        return (NET_SOCK_BSD_ERR_OPEN);
+    }
+
+
+                                                                /* ---------------- CFG SOCK BLOCK OPT ---------------- */
+   (void)NetSock_CfgBlock(sock_id, NET_SOCK_BLOCK_SEL_NO_BLOCK, &err);
+    switch(err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+        case NET_SOCK_ERR_INVALID_ARG:
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_SOCK_ERR_INVALID_SOCK:
+        case NET_SOCK_ERR_NOT_USED:
+        case NET_ERR_FAULT_LOCK_ACQUIRE:
+        default:
+             (void)NetSock_Close(sock_id, &err);
+            *p_err = HTTPs_ERR_SOCK_SET_OPT_BLOCK;
+             return (NET_SOCK_BSD_ERR_OPEN);
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+    return (sock_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsSock_ListenClose()
+*
+* Description : (1) Close listen socket.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceTaskHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsSock_ListenClose(HTTPs_INSTANCE  *p_instance,
+                            NET_SOCK_ID      sock_listen_id)
+{
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    CPU_BOOLEAN            done;
+    NET_ERR                err;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    done = DEF_NO;
+    while (done != DEF_YES) {
+       (void)NetSock_Close(sock_listen_id, &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+            case NET_SOCK_ERR_CLOSED:
+            case NET_SOCK_ERR_CONN_CLOSE_IN_PROGRESS:
+            case NET_SOCK_ERR_INVALID_FAMILY:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_STATE:
+            case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+            case NET_SOCK_ERR_CONN_FAIL:
+            case NET_SOCK_ERR_FAULT:
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_CONN_ERR_NOT_USED:
+                 done = DEF_YES;
+                 HTTPs_STATS_INC(p_ctr_stats->Sock_StatListenCloseCtr);
+                 break;
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:                    /* Transitory fault(s); close aborted but MIGHT ...     */
+                 break;                                         /* ... close in a subsequent attempt.                   */
+
+
+            default:
+                 done = DEF_YES;
+                 HTTPs_ERR_INC(p_ctr_err->Sock_ErrListenCloseCtr);
+                 break;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            HTTPsSock_ConnSel()
+*
+* Description : (1) Update connections that are ready to be processed.
+*
+*                   (a) Prepare socket descriptor
+*                   (b) Socket select
+*                   (c) Update connection states
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+* Return(s)   : Number of connection ready to be processed.
+*
+* Caller(s)   : HTTPsTask_InstanceTaskHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_SOCK_QTY  HTTPsSock_ConnSel (HTTPs_INSTANCE  *p_instance,
+                                 CPU_BOOLEAN      accept)
+{
+    const  HTTPs_CFG            *p_cfg;
+           HTTPs_CONN           *p_conn;
+           HTTPs_INSTANCE_ERRS  *p_ctr_err;
+           NET_SOCK_TIMEOUT     *p_sock_timeout;
+           NET_SOCK_TIMEOUT      sock_timeout;
+           NET_SOCK_QTY          sock_nbr_rdy;
+           NET_SOCK_DESC         sock_desc_rd;
+           NET_SOCK_DESC         sock_desc_wr;
+           NET_SOCK_DESC         sock_desc_err;
+           NET_SOCK_QTY          sock_nbr_max;
+           NET_SOCK_RTN_CODE     sel_rtn_code;
+           CPU_BOOLEAN           child_present;
+           NET_ERR               err;
+
+
+    HTTPs_SET_PTR_ERRS(p_ctr_err, p_instance);
+    p_cfg = p_instance->CfgPtr;
+
+    child_present = DEF_NO;
+
+                                                                /* ---------------- PREPARE SOCK DESC ----------------- */
+    NET_SOCK_DESC_INIT(&sock_desc_rd);
+    NET_SOCK_DESC_INIT(&sock_desc_wr);
+    NET_SOCK_DESC_INIT(&sock_desc_err);
+
+    sock_nbr_rdy = 0;
+    sock_nbr_max = 0;
+
+    if (accept == DEF_YES) {
+        switch (p_cfg->SockSel) {
+            case HTTPs_SOCK_SEL_IPv4:
+#ifdef NET_IPv4_MODULE_EN
+                 NET_SOCK_DESC_SET(p_instance->SockListenID_IPv4, &sock_desc_rd);
+                 sock_nbr_max = p_instance->SockListenID_IPv4 + 1;
+#endif
+                 break;
+
+
+            case HTTPs_SOCK_SEL_IPv6:
+#ifdef NET_IPv6_MODULE_EN
+                 NET_SOCK_DESC_SET(p_instance->SockListenID_IPv6, &sock_desc_rd);
+                 sock_nbr_max = p_instance->SockListenID_IPv6 + 1;
+#endif
+                 break;
+
+
+            case HTTPs_SOCK_SEL_IPv4_IPv6:
+#ifdef NET_IPv4_MODULE_EN
+                 NET_SOCK_DESC_SET(p_instance->SockListenID_IPv4, &sock_desc_rd);
+                 sock_nbr_max = p_instance->SockListenID_IPv4 + 1;
+#endif
+#ifdef NET_IPv6_MODULE_EN
+                 NET_SOCK_DESC_SET(p_instance->SockListenID_IPv6, &sock_desc_rd);
+                 if (sock_nbr_max < p_instance->SockListenID_IPv6) {
+                     sock_nbr_max = p_instance->SockListenID_IPv6 + 1;
+                 } else if ((sock_nbr_max                  == p_instance->SockListenID_IPv6) &&
+                            (p_instance->SockListenID_IPv6 == 0)                            ) {
+                     sock_nbr_max = p_instance->SockListenID_IPv6 + 1;
+                 }
+#endif
+                 break;
+
+
+            default:
+                 break;
+        }
+    }
+
+    p_conn = p_instance->ConnFirstPtr;
+    while (p_conn != DEF_NULL) {
+        child_present = DEF_YES;
+        switch (p_conn->SockState) {
+            case HTTPs_SOCK_STATE_RX:                           /* Conn rdy to receive data.                            */
+                 NET_SOCK_DESC_SET(p_conn->SockID, &sock_desc_rd);
+                 NET_SOCK_DESC_SET(p_conn->SockID, &sock_desc_err);
+                 break;
+
+
+            case HTTPs_SOCK_STATE_TX:                           /* Conn rdy to tx data.                                 */
+                 NET_SOCK_DESC_SET(p_conn->SockID, &sock_desc_wr);
+                 NET_SOCK_DESC_SET(p_conn->SockID, &sock_desc_err);
+                 break;
+
+
+            case HTTPs_SOCK_STATE_ERR:                          /* Conn is wainting for sock err.                       */
+            case HTTPs_SOCK_STATE_CLOSE:
+            case HTTPs_SOCK_STATE_NONE:
+                 NET_SOCK_DESC_SET(p_conn->SockID, &sock_desc_err);
+                 sock_nbr_rdy++;                                /* Socket close completed in HTTPsConn_Close().         */
+                 break;
+
+
+            default:
+                 break;
+        }
+
+        if (sock_nbr_max <= p_conn->SockID) {                   /* Update highest sock nbr.                             */
+            sock_nbr_max = p_conn->SockID + 1;
+        } else if ((sock_nbr_max   == p_conn->SockID) &&
+                   (p_conn->SockID == 0)             ) {
+            sock_nbr_max = p_conn->SockID + 1;
+        }
+
+        p_conn = p_conn->ConnNextPtr;
+    }
+
+
+                                                                /* -------------------- SOCK SEL ---------------------- */
+    if ((accept        == DEF_YES) &&
+        (child_present == DEF_NO) ) {
+        p_sock_timeout = DEF_NULL;
+    } else {
+        sock_timeout.timeout_sec =  0;
+        sock_timeout.timeout_us  =  HTTPs_SOCK_SEL_TIMEOUT_MS * DEF_TIME_NBR_uS_PER_SEC / DEF_TIME_NBR_mS_PER_SEC;
+        p_sock_timeout           = &sock_timeout;
+    }
+
+
+    sel_rtn_code = NetSock_Sel(sock_nbr_max,
+                              &sock_desc_rd,
+                              &sock_desc_wr,
+                              &sock_desc_err,
+                               p_sock_timeout,
+                              &err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:
+        case NET_SOCK_ERR_TIMEOUT:
+             sock_nbr_rdy += sel_rtn_code;
+             break;
+
+
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_SOCK_ERR_INVALID_DESC:
+        case NET_SOCK_ERR_INVALID_TIMEOUT:
+        case NET_SOCK_ERR_INVALID_SOCK:
+        case NET_SOCK_ERR_INVALID_TYPE:
+        case NET_SOCK_ERR_NOT_USED:
+        case NET_ERR_FAULT_LOCK_ACQUIRE:
+        default:
+             HTTPs_ERR_INC(p_ctr_err->Sock_ErrSelCtr);
+             return (sock_nbr_rdy);
+    }
+
+                                                                /* -------------- ACCEPT NEW CONNECTIONS -------------- */
+    if (accept == DEF_YES) {
+        switch (p_cfg->SockSel) {
+            case HTTPs_SOCK_SEL_IPv4:
+#ifdef NET_IPv4_MODULE_EN
+                 if (NET_SOCK_DESC_IS_SET(p_instance->SockListenID_IPv4, &sock_desc_rd)) {
+                     HTTPsSock_ConnAccept(p_instance, p_instance->SockListenID_IPv4);
+                 }
+#endif
+                 break;
+
+
+            case HTTPs_SOCK_SEL_IPv6:
+#ifdef NET_IPv6_MODULE_EN
+                 if (NET_SOCK_DESC_IS_SET(p_instance->SockListenID_IPv6, &sock_desc_rd)) {
+                     HTTPsSock_ConnAccept(p_instance, p_instance->SockListenID_IPv6);
+                 }
+#endif
+                 break;
+
+
+            case HTTPs_SOCK_SEL_IPv4_IPv6:
+#ifdef NET_IPv4_MODULE_EN
+                 if (NET_SOCK_DESC_IS_SET(p_instance->SockListenID_IPv4, &sock_desc_rd)) {
+                     HTTPsSock_ConnAccept(p_instance, p_instance->SockListenID_IPv4);
+                 }
+#endif
+#ifdef NET_IPv6_MODULE_EN
+                 if (NET_SOCK_DESC_IS_SET(p_instance->SockListenID_IPv6, &sock_desc_rd)) {
+                     HTTPsSock_ConnAccept(p_instance, p_instance->SockListenID_IPv6);
+                 }
+#endif
+                 break;
+
+
+            default:
+                 break;
+        }
+    }
+
+
+                                                                /* ------------ UPDATE CONN SOCK STATE  --------------- */
+    p_conn = p_instance->ConnFirstPtr;
+    while (p_conn != DEF_NULL) {
+
+        switch (p_conn->SockState) {
+            case HTTPs_SOCK_STATE_RX:                           /* Conn rdy to receive data.                            */
+                 if (NET_SOCK_DESC_IS_SET(p_conn->SockID, &sock_desc_rd)) {
+                     DEF_BIT_SET(p_conn->SockFlags, HTTPs_FLAG_SOCK_RDY_RD);    /* Sock rdy.                            */
+                 }
+
+                 if (NET_SOCK_DESC_IS_SET(p_conn->SockID, &sock_desc_err)) {
+                     DEF_BIT_SET(p_conn->SockFlags, HTTPs_FLAG_SOCK_RDY_ERR);   /* Sock Err is pending.                 */
+                     p_conn->SockState  = HTTPs_SOCK_STATE_ERR;
+                 }
+                 break;
+
+
+            case HTTPs_SOCK_STATE_TX:
+                 if (NET_SOCK_DESC_IS_SET(p_conn->SockID, &sock_desc_wr)) {
+                     DEF_BIT_SET(p_conn->SockFlags, HTTPs_FLAG_SOCK_RDY_WR);    /* Sock rdy.                            */
+                 }
+
+                 if (NET_SOCK_DESC_IS_SET(p_conn->SockID, &sock_desc_err)) {
+                     DEF_BIT_SET(p_conn->SockFlags, HTTPs_FLAG_SOCK_RDY_ERR);   /* Sock Err is pending.                 */
+                     p_conn->SockState  = HTTPs_SOCK_STATE_ERR;
+                 }
+                 break;
+
+
+            case HTTPs_SOCK_STATE_ERR:
+            case HTTPs_SOCK_STATE_NONE:                         /* Conn needs to be processed.                          */
+                 if (NET_SOCK_DESC_IS_SET(p_conn->SockID, &sock_desc_err)) {
+                     DEF_BIT_SET(p_conn->SockFlags, HTTPs_FLAG_SOCK_RDY_ERR);   /* Sock Err is pending.                 */
+                     p_conn->SockState  = HTTPs_SOCK_STATE_ERR;
+                 }
+                 sock_nbr_rdy++;
+                 break;
+
+
+            default:
+                 break;
+        }
+
+        p_conn = p_conn->ConnNextPtr;
+    }
+
+    return (sock_nbr_rdy);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsSock_ConnDataRx()
+*
+* Description : Receive data from the network and update connection.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : DEF_OK,   if data received successfully.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPsConn_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsSock_ConnDataRx (HTTPs_INSTANCE  *p_instance,
+                                   HTTPs_CONN      *p_conn)
+{
+    CPU_CHAR              *p_buf;
+    NET_SOCK_ADDR_LEN      addr_len_client;
+    CPU_INT16U             rx_len;
+    CPU_INT32U             buf_len;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    CPU_BOOLEAN            rtn_val;
+    NET_ERR                err;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    if ((p_conn->RxBufLenRem > 0) &&
+        (p_conn->RxBufPtr   != p_conn->BufPtr)) {               /* If data is still present in the rx buf.              */
+                                                                /* Move rem data to the beginning of the rx buf.        */
+        Mem_Copy(p_conn->BufPtr, p_conn->RxBufPtr, p_conn->RxBufLenRem);
+    }
+
+    p_buf   = p_conn->BufPtr + p_conn->RxBufLenRem;
+    buf_len = p_conn->BufLen - p_conn->RxBufLenRem;
+
+    if (buf_len == 0) {
+        rtn_val = DEF_OK;
+        goto exit;
+    }
+
+    addr_len_client = sizeof(p_conn->ClientAddr);
+    rx_len = (CPU_INT16U)NetSock_RxDataFrom(        p_conn->SockID,
+                                            (void *)p_buf,
+                                                    buf_len,
+                                                    NET_SOCK_FLAG_NO_BLOCK,
+                                                   &p_conn->ClientAddr,
+                                                   &addr_len_client,
+                                                    DEF_NULL,
+                                                    DEF_NULL,
+                                                    DEF_NULL,
+                                                   &err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:                                 /* Data received.                                       */
+        case NET_SOCK_ERR_INVALID_DATA_SIZE:
+             p_conn->RxBufPtr      = p_conn->BufPtr;
+             p_conn->RxBufLenRem  += rx_len;
+             HTTPs_STATS_OCTET_INC(p_ctr_stats->Sock_StatOctetRxdCtr, rx_len);
+             break;
+
+
+        case NET_ERR_RX:                                        /* Transitory rx err(s).                                */
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_SOCK_ERR_RX_Q_EMPTY:
+        case NET_ERR_FAULT_LOCK_ACQUIRE:
+             p_conn->RxBufPtr = p_conn->BufPtr;
+             HTTPs_ERR_INC(p_ctr_err->Sock_ErrRxCtr);
+             rtn_val = DEF_FAIL;
+             goto exit;
+
+
+        case NET_SOCK_ERR_CLOSED:                               /* Conn closed by peer.                                 */
+        case NET_SOCK_ERR_RX_Q_CLOSED:
+             HTTPs_ERR_INC(p_ctr_err->Sock_ErrRxConnClosedCtr);
+             p_conn->SockState = HTTPs_SOCK_STATE_CLOSE;
+             rtn_val = DEF_FAIL;
+             goto exit;
+
+
+        default:                                                /* Fatal err.                                           */
+             HTTPs_ERR_INC(p_ctr_err->Sock_ErrRxFaultCtr);
+             p_conn->SockState = HTTPs_SOCK_STATE_ERR;
+             rtn_val = DEF_FAIL;
+             goto exit;
+
+    }
+
+    rtn_val = DEF_OK;
+
+
+exit:
+    return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsSock_ConnDataTx()
+*
+* Description : Transmit data on the network and update connection parameters.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : DEF_OK,   if data transmitted successfully.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPsConn_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN HTTPsSock_ConnDataTx (HTTPs_INSTANCE  *p_instance,
+                                  HTTPs_CONN      *p_conn)
+{
+    NET_SOCK_ADDR_LEN      addr_len_client;
+    NET_SOCK_RTN_CODE      tx_len;
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    NET_ERR                err;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    addr_len_client = sizeof(p_conn->ClientAddr);
+
+    tx_len = NetSock_TxDataTo(p_conn->SockID,
+                              p_conn->TxBufPtr,
+                              p_conn->TxDataLen,
+                              NET_SOCK_FLAG_NO_BLOCK,
+                             &p_conn->ClientAddr,
+                              addr_len_client,
+                             &err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:                                 /* Data transmitted.                                    */
+        case NET_ERR_TX:
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_SOCK_ERR_PORT_NBR_NONE_AVAIL:
+        case NET_CONN_ERR_NONE_AVAIL:
+        case NET_ERR_FAULT_LOCK_ACQUIRE:
+             if (tx_len != NET_SOCK_BSD_ERR_DFLT) {
+                 HTTPs_STATS_OCTET_INC(p_ctr_stats->Sock_StatOctetTxdCtr, tx_len);
+                 p_conn->TxDataLen -= tx_len;
+                 if (p_conn->TxDataLen > 0u) {                      /* If data is not entirely transmitted.                 */
+                     p_conn->TxBufPtr = (CPU_CHAR *)p_conn->TxBufPtr + tx_len;
+                     return (DEF_FAIL);
+                 } else {
+                     p_conn->TxBufPtr = p_conn->BufPtr;
+                 }
+             } else {
+                 return (DEF_FAIL);
+             }
+             break;
+
+
+        case NET_SOCK_ERR_CLOSED:                               /* Conn closed by peer.                                 */
+        case NET_SOCK_ERR_TX_Q_CLOSED:
+             HTTPs_ERR_INC(p_ctr_err->Sock_ErrTxConnClosedCtr);
+             p_conn->SockState = HTTPs_SOCK_STATE_CLOSE;
+             return (DEF_FAIL);
+
+
+        default:                                                /* Fatal err.                                           */
+             HTTPs_ERR_INC(p_ctr_err->Sock_ErrTxFaultCtr);
+             p_conn->SockState = HTTPs_SOCK_STATE_ERR;
+             return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsSock_ConnClose()
+*
+* Description : Close connection socket.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_conn      Pointer to the connection.
+*               ------      Argument validated in HTTPsSock_ConnAccept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsConn_Close().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsSock_ConnClose (HTTPs_INSTANCE  *p_instance,
+                           HTTPs_CONN      *p_conn)
+{
+    HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    HTTPs_INSTANCE_ERRS   *p_ctr_err;
+    CPU_BOOLEAN            done;
+    NET_ERR                err;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+    done  = DEF_NO;
+    while (done != DEF_YES) {
+
+        (void)NetSock_Close(p_conn->SockID, &err);
+         switch (err) {
+             case NET_SOCK_ERR_NONE:
+             case NET_SOCK_ERR_CLOSED:
+             case NET_SOCK_ERR_CONN_CLOSE_IN_PROGRESS:
+             case NET_SOCK_ERR_INVALID_FAMILY:
+             case NET_SOCK_ERR_INVALID_TYPE:
+             case NET_SOCK_ERR_INVALID_STATE:
+             case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+             case NET_SOCK_ERR_CONN_FAIL:
+             case NET_SOCK_ERR_FAULT:
+             case NET_CONN_ERR_INVALID_CONN:
+             case NET_CONN_ERR_NOT_USED:
+                  done = DEF_YES;
+                  HTTPs_STATS_INC(p_ctr_stats->Conn_StatClosedCtr);
+                  break;
+
+             case NET_INIT_ERR_NOT_COMPLETED:
+             case NET_ERR_FAULT_LOCK_ACQUIRE:                    /* Transitory fault(s); close aborted but MIGHT ...     */
+                  break;                                         /* ... close in a subsequent attempt.                   */
+
+             default:
+                  done = DEF_YES;
+                  HTTPs_ERR_INC(p_ctr_err->Sock_ErrCloseCtr);
+                  break;
+         }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          HTTPsSock_ConnAccept()
+*
+* Description : (1) Accept new incoming connection:
+*
+*                   (a) Accept incoming connection.
+*                   (b) Configure TCP   connection MSL timeout.
+*                   (b) Acquire free    connection structure for the new accepted connection request.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPsSock_ConnSel().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsSock_ConnAccept (HTTPs_INSTANCE  *p_instance,
+                                    NET_SOCK_ID      sock_listen_id)
+{
+        HTTPs_CONN            *p_conn;
+        HTTPs_INSTANCE_ERRS   *p_ctr_err;
+        HTTPs_INSTANCE_STATS  *p_ctr_stats;
+    const  HTTPs_CFG             *p_cfg = p_instance->CfgPtr;
+        NET_SOCK_ID            sock_id;
+        NET_SOCK_ADDR          client_addr;
+        NET_SOCK_ADDR_LEN      addr_len;
+        CPU_BOOLEAN            done;
+        NET_TCP_CONN_ID        conn_id_tcp;
+        NET_ERR                err_net;
+
+
+    HTTPs_SET_PTR_STATS(p_ctr_stats, p_instance);
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+
+
+    done = DEF_NO;
+    while (done != DEF_YES) {
+        CPU_BOOLEAN  close_sock = DEF_NO;
+        CPU_BOOLEAN  flag       = DEF_DISABLED;
+
+                                                                /* ---------------- ACCEPT INCOMING REQ --------------- */
+        addr_len = sizeof(client_addr);
+
+        sock_id = NetSock_Accept(sock_listen_id,
+                                &client_addr,
+                                &addr_len,
+                                &err_net);
+        switch (err_net) {
+            case NET_SOCK_ERR_NONE:                             /* New conn accepted.                                   */
+                 HTTPs_STATS_INC(p_ctr_stats->Conn_StatAcceptedCtr);
+
+                (void)NetSock_OptSet(sock_id,                   /* Set inactivity timeout.                              */
+                                     NET_SOCK_PROTOCOL_TCP,
+                                     NET_SOCK_OPT_TCP_KEEP_IDLE,
+                            (void *)&p_cfg->ConnInactivityTimeout_s,
+                                     sizeof(p_cfg->ConnInactivityTimeout_s),
+                                    &err_net);
+                 if (err_net != NET_SOCK_ERR_NONE) {
+                     HTTPs_ERR_INC(p_ctr_err->Conn_ErrTmrStartCtr);
+                     close_sock = DEF_YES;
+                     break;
+                 }
+
+
+                (void)NetSock_OptSet(sock_id,                   /* Set NO DELAY option.                                 */
+                                     NET_SOCK_PROTOCOL_TCP,
+                                     NET_SOCK_OPT_TCP_NO_DELAY,
+                            (void *)&flag,
+                                     sizeof(flag),
+                                    &err_net);
+                 if (err_net != NET_SOCK_ERR_NONE) {
+                     close_sock = DEF_YES;
+                     break;
+                 }
+
+                                                                /* ----------------- CFG TCP CONN MSL ----------------- */
+                 conn_id_tcp = NetSock_GetConnTransportID(sock_id, &err_net);
+
+                (void)NetTCP_ConnCfgMSL_Timeout(conn_id_tcp, 0u, &err_net);
+                 if (err_net != NET_TCP_ERR_NONE) {
+                     close_sock = DEF_YES;
+                     break;
+                 }
+
+                                                                /* --------------- ACQUIRE CONN STRUCT ---------------- */
+                 p_conn = HTTPsMem_ConnGet(p_instance,
+                                            sock_id,
+                                            client_addr);
+                 if (p_conn != DEF_NULL) {
+                     p_conn->State = HTTPs_CONN_STATE_REQ_INIT;
+
+                 } else {                                       /* If no free conn struct avail...                      */
+                                                                /* ... close sock.                                      */
+                     HTTPs_ERR_INC(p_ctr_err->Conn_ErrNoneAvailCtr);
+                     close_sock = DEF_YES;
+                     break;
+                 }
+                 break;
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_SOCK_ERR_NONE_AVAIL:
+            case NET_SOCK_ERR_CONN_ACCEPT_Q_NONE_AVAIL:
+            case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 done = DEF_YES;
+                 break;
+
+            default:
+                 HTTPs_ERR_INC(p_ctr_err->Sock_ErrAcceptCtr);
+                 close_sock = DEF_YES;
+                 break;
+        }
+
+        if ((close_sock == DEF_YES) &&
+            (sock_id != NET_SOCK_ID_NONE)) {
+            (void)NetSock_Close(sock_id, &err_net);
+        }
+    }
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_sock.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_sock.h
new file mode 100644
index 0000000..83a196f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_sock.h
@@ -0,0 +1,103 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP SERVER SOCKET MODULE
+*
+* Filename      : http-s_sock.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPs module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPs_SOCK_MODULE_PRESENT                          /* See Note #1.                                         */
+#define  HTTPs_SOCK_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  "http-s.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+NET_SOCK_ID   HTTPsSock_ListenInit   (const  HTTPs_CFG                 *p_cfg,
+                                             NET_SOCK_PROTOCOL_FAMILY   family,
+                                             HTTPs_ERR                 *p_err);
+
+void          HTTPsSock_ListenClose  (       HTTPs_INSTANCE            *p_instance,
+                                             NET_SOCK_ID                sock_listen_id);
+
+NET_SOCK_QTY  HTTPsSock_ConnSel      (       HTTPs_INSTANCE            *p_instance,
+                                             CPU_BOOLEAN                accept);
+
+CPU_BOOLEAN   HTTPsSock_ConnDataRx   (       HTTPs_INSTANCE            *p_instance,
+                                             HTTPs_CONN                *p_conn);
+
+CPU_BOOLEAN   HTTPsSock_ConnDataTx   (       HTTPs_INSTANCE            *p_instance,
+                                             HTTPs_CONN                *p_conn);
+
+void          HTTPsSock_ConnClose    (       HTTPs_INSTANCE            *p_instance,
+                                             HTTPs_CONN                *p_conn);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPs_SOCK_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_str.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_str.c
new file mode 100644
index 0000000..4018dfd
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_str.c
@@ -0,0 +1,305 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP SERVER STRING MODULE
+*
+* Filename      : http-s_str.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPs_STR_MODULE
+
+#include  "http-s_str.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_StrPathFormat()
+*
+* Description : (1) Format file path:
+*
+*                   (a) Copy folder    in path destination buffer.
+*                   (b) Copy file name in path destination buffer.
+*                   (c) Replace path separator character.
+*
+* Argument(s) : p_filename      Pointer to file name string.
+*               ----------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               p_folder        Pointer to the folder string.
+*               --------        Argument validated in HTTPs_InstanceStart().
+*
+*               p_path_dst      Pointer to string buffer where to format the path.
+*               ----------      Argument validated in HTTPsSock_ConnAccept().
+*
+*               path_len_max    Maximum length of the path.
+*
+*               path_sep        Path character separator.
+*
+* Return(s)   : DEF_OK,   path successfully formated.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : HTTPsReq_BodyFormMultipartCtrlParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+CPU_BOOLEAN  HTTPs_StrPathFormat (CPU_CHAR    *p_filename,
+                                  CPU_CHAR    *p_folder,
+                                  CPU_CHAR    *p_path_dst,
+                                  CPU_SIZE_T   path_len_max,
+                                  CPU_CHAR     path_sep)
+{
+    CPU_CHAR    *p_str_file;
+    CPU_CHAR    *p_str_folder;
+    CPU_CHAR    *p_str;
+    CPU_CHAR    *p_dst;
+    CPU_SIZE_T   len_folder;
+    CPU_SIZE_T   len;
+
+
+    p_str_file = p_filename;
+    p_dst      = p_path_dst;
+    len        = path_len_max;
+
+                                                                /* ----------- COPY FOLDER IN PATH DST BUF ------------ */
+    if (p_folder != DEF_NULL) {                                 /* Only if folder is not null.                          */
+        p_str_folder = p_folder;
+        while ((*p_str_folder == ASCII_CHAR_SOLIDUS)         || /* Must NOT start with a path sep.                      */
+              (*p_str_folder == ASCII_CHAR_REVERSE_SOLIDUS)) {
+            p_str_folder++;
+        }
+
+        (void)Str_Copy_N(p_dst, p_str_folder, path_len_max);    /* Copy folder to the dst.                              */
+        len_folder = Str_Len_N(p_str_folder, path_len_max);
+
+        if (len_folder > 0) {                                   /* Verify that folder name is not empty.                */
+            p_dst     += (len_folder - 1);                      /* Verify if folder name end with path sep.             */
+            len       -= (len_folder - 1);
+                                                                /* Must have a path sep before filename.                */
+            if ((*p_dst == ASCII_CHAR_SOLIDUS)          ||      /* Verify if folder name end with path sep.             */
+                (*p_dst == ASCII_CHAR_REVERSE_SOLIDUS)) {
+                  if (len_folder > 1) {
+                      p_dst++;
+                      len--;
+                  }
+
+            } else {                                            /* Add a path sep. at end of folder name.               */
+                p_dst++;
+               *p_dst = ASCII_CHAR_REVERSE_SOLIDUS;
+                p_dst++;
+                len -= 2;
+            }
+        }
+    }
+
+                                                                /* ---------- COPY FILE NAME IN PATH DST BUF ---------- */
+    while ((*p_str_file == ASCII_CHAR_SOLIDUS)         ||       /* Must NOT start with a path sep.                      */
+           (*p_str_file == ASCII_CHAR_REVERSE_SOLIDUS)) {
+        p_str_file++;
+    }
+
+    (void)Str_Copy_N(p_dst, p_str_file, path_len_max);          /* Copy file name.                                      */
+
+
+                                                                /* --------- REPLACE PATH SEP IN PATH DST BUF --------- */
+    if (path_sep != ASCII_CHAR_SOLIDUS) {
+        p_str = Str_Char_Replace_N(p_dst,
+                                   ASCII_CHAR_SOLIDUS,
+                                   path_sep,
+                                   len);
+        if (p_str == DEF_NULL) {
+            return (DEF_FAIL);
+        }
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPs_StrFilePathGet()
+*
+* Description : Retrieve file path in a file path that contains the host in the path.
+*
+* Argument(s) : p_path              Pointer to the path that can contains the host.
+*
+*               path_len_max        Path length maximum.
+*
+*               p_host              Pointer to a string that contains the host name.
+*
+*               host_len_max        Host string length maximum.
+*
+*               p_resp_location     Pointer to a variable that will be set if the location field header should be send.
+*
+* Return(s)   : Pointer to the file path.
+*
+* Caller(s)   : HTTPsFS_Open(),
+*               HTTPsResp_HdrFieldAdd().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+CPU_CHAR  *HTTPs_StrPathGet (CPU_CHAR     *p_path,
+                             CPU_INT16U    path_len_max,
+                             CPU_CHAR     *p_host,
+                             CPU_INT16U    host_len_max,
+                             CPU_BOOLEAN  *p_resp_location)
+{
+    CPU_CHAR    *p_file_path;
+    CPU_INT32U   host_len;
+
+
+    p_file_path = Str_Str_N(p_path, p_host, path_len_max);
+    if (p_file_path != DEF_NULL) {
+        host_len         = Str_Len_N(p_host, host_len_max);
+        p_file_path     += host_len;
+        if (p_resp_location != DEF_NULL) {
+           *p_resp_location  = DEF_YES;
+        }
+
+    } else {
+        p_file_path = p_path;
+    }
+
+    return (p_file_path);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          HTTPs_StrMemSrch()
+*
+* Description : Search for a string into a memory section.
+*
+* Argument(s) : p_data      Pointer to a buffer that may contain the boundary token.
+*
+*               data_len    Length of the buffer.
+*
+*               p_str       Pointer to string.
+*
+*               str_len     String length.
+*
+* Return(s)   : Pointer to the beginning of boundary token, if found,
+*
+*               DEF_NULL                                  , otherwise.
+*
+* Caller(s)   : HTTPsReq_BodyFormMultipartBoundarySrch().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+CPU_CHAR  *HTTPs_StrMemSrch (const  CPU_CHAR    *p_data,
+                                    CPU_INT32U   data_len,
+                             const  CPU_CHAR    *p_str,
+                                    CPU_INT32U   str_len)
+{
+    CPU_CHAR    *p_search;
+    CPU_INT32S   search_len;
+    CPU_INT32S   i;
+    CPU_BOOLEAN  cmp_identical;
+
+
+                                                                /* ----------------- INPUT ARG CHECK ------------------ */
+    if (p_data == DEF_NULL) {
+        return (DEF_NULL);
+    }
+
+    if (p_str == DEF_NULL) {
+        return (DEF_NULL);
+    }
+
+    if (data_len < 1) {
+        return (DEF_NULL);
+    }
+
+    if (str_len < 1) {
+        return (DEF_NULL);
+    }
+
+    if (data_len < str_len) {
+        return (DEF_NULL);
+    }
+
+                                                                /* ------------------ MEM SEARCH-CMP ------------------ */
+    p_search   = (CPU_CHAR *)p_data;
+    search_len = (CPU_INT32S)(data_len - str_len);
+    for (i = search_len; i >= 0; i--) {
+        cmp_identical = Mem_Cmp(p_search, p_str, str_len);
+        if (cmp_identical == DEF_YES) {
+            return (p_search);
+        }
+
+        p_search++;
+    }
+
+    return (DEF_NULL);
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_str.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_str.h
new file mode 100644
index 0000000..d9928de
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_str.h
@@ -0,0 +1,109 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HTTP SERVER STRING MODULE
+*
+* Filename      : http-s_str.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPs module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPs_STR_MODULE_PRESENT                          /* See Note #1.                                         */
+#define  HTTPs_STR_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  "http-s.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+CPU_BOOLEAN   HTTPs_StrPathFormat  (       CPU_CHAR     *p_filename,
+                                           CPU_CHAR     *p_folder,
+                                           CPU_CHAR     *p_path_dst,
+                                           CPU_SIZE_T    path_len_max,
+                                           CPU_CHAR      path_sep);
+#endif
+
+#if (HTTPs_CFG_ABSOLUTE_URI_EN == DEF_ENABLED)
+CPU_CHAR     *HTTPs_StrPathGet     (       CPU_CHAR     *p_path,
+                                           CPU_INT16U    path_len_max,
+                                           CPU_CHAR     *p_host,
+                                           CPU_INT16U    host_len_max,
+                                           CPU_BOOLEAN  *p_resp_location);
+#endif
+
+#if ((HTTPs_CFG_FORM_EN           == DEF_ENABLED) && \
+     (HTTPs_CFG_FORM_MULTIPART_EN == DEF_ENABLED))
+CPU_CHAR     *HTTPs_StrMemSrch     (const  CPU_CHAR     *p_data,
+                                           CPU_INT32U    data_len,
+                                    const  CPU_CHAR     *p_str,
+                                           CPU_INT32U    str_len);
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPs_STR_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_task.c b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_task.c
new file mode 100644
index 0000000..e851c08
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_task.c
@@ -0,0 +1,805 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           HTTP SERVER TASK MODULE
+*
+* Filename      : http-s_task.c
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    HTTPs_TASK_MODULE
+
+#include  "http-s_task.h"
+#include  "http-s_sock.h"
+#include  "http-s_conn.h"
+#include  "http-s_mem.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  HTTPs_TASK_STR_NAME_TASK                  "HTTP Instance"
+#define  HTTPs_TASK_STR_NAME_LOCK                  "HTTP Instance Lock"
+#define  HTTPs_TASK_STR_NAME_SEM_STOP_REQ          "HTTP Instance Stop req"
+#define  HTTPs_TASK_STR_NAME_SEM_STOP_COMPLETED    "HTTP Instance Stop compl"
+#define  HTTPs_TASK_STR_NAME_TMR                   "HTTP Conn Timeout"
+
+#define  HTTPs_OS_LOCK_ACQUIRE_FAIL_DLY_MS                    5u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void  HTTPsTask_InstanceTask    (void            *p_data);
+
+static  void  HTTPsTask_InstanceTaskHandler (HTTPs_INSTANCE  *p_start_cfg);
+
+
+/*
+*********************************************************************************************************
+*                                       HTTPsTask_LockCreate()
+*
+* Description : Create OS lock object.
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE              Lock object successfully created.
+*                           HTTPs_ERR_OS_OBJ_CREATE     Lock object allocation failed.
+*
+* Return(s)   : Pointer to the OS lock object, if no error(s)
+*
+*               Null pointer,                  otherwise.
+*
+* Caller(s)   : HTTPs_InstanceInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+KAL_LOCK_HANDLE  HTTPsTask_LockCreate (HTTPs_ERR  *p_err)
+{
+    KAL_LOCK_HANDLE  lock_handle;
+    RTOS_ERR         err_rtos;
+
+                                                                /* ---------- ACQUIRE OS_LOCK_OBJ MEM SPACE ----------- */
+    lock_handle = KAL_LockCreate((const CPU_CHAR *)HTTPs_TASK_STR_NAME_LOCK,
+                                                   DEF_NULL,
+                                                  &err_rtos);
+
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPs_ERR_TASK_LOCK_CREATE;
+        goto exit;
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+
+exit:
+    return (lock_handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        HTTPsTask_LockAcquire()
+*
+* Description : Acquire exclusive resource access.
+*
+* Argument(s) : p_lock_obj  Pointer to OS lock object.
+*               ----------  Argument validated in HTTPs_InstanceInit().
+**
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                           HTTPs_ERR_NONE              Exclusive lock access successfully acquired
+*                           HTTPs_ERR_OS_LOCK_ACQUIRE   Exclusive lock access failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceStart(),
+*               HTTPs_InstanceStop(),
+*               HTTPs_InstanceTaskHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsTask_LockAcquire (KAL_LOCK_HANDLE  os_lock_obj,
+                             HTTPs_ERR       *p_err)
+{
+    RTOS_ERR  err_rtos;
+
+
+    KAL_LockAcquire(os_lock_obj,
+                    KAL_OPT_PEND_BLOCKING,
+                    0u,
+                   &err_rtos);
+    switch (err_rtos) {
+        case RTOS_ERR_NONE:
+            *p_err = HTTPs_ERR_NONE;
+             break;
+
+        default:
+            *p_err = HTTPs_ERR_TASK_LOCK_ACQUIRE;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsTask_LockRelease()
+*
+* Description : Release exclusive resource access.
+*
+* Argument(s) : p_lock_obj  Pointer to OS lock object.
+*               ----------  Argument validated in HTTPs_InstanceInit().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_ConnTimeout(),
+*               HTTPs_InstanceStart(),
+*               HTTPs_InstanceStop(),
+*               HTTPs_InstanceTaskHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsTask_LockRelease (KAL_LOCK_HANDLE  os_lock_obj)
+{
+    RTOS_ERR  err_rtos;
+
+
+    KAL_LockRelease(os_lock_obj,
+                   &err_rtos);
+
+   (void)&err_rtos;                                               /* Prevent 'variable unused' compiler warning.          */
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsTask_InstanceObjInit()
+*
+* Description : (1) Initialize OS objects:
+*
+*                   (a) Validate remaining memory available
+*                   (b) Acquire memory space for task control block
+*                   (c) Acquire memory space for task stack
+*                   (d) Create semaphore for instance stop request
+*                   (e) Create semaphore for instance stop request completed
+*
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*               -----       Argument validated in HTTPs_InstanceStart().
+*
+*                               HTTPs_ERR_NONE                      Instance object successfully initialized.
+*                               HTTPs_ERR_OS_INIT_POOL_REM_MEM      Not enough remaining memory on the heap.
+*                               HTTPs_ERR_OS_OBJ_CREATE             Failed to create instance pool.
+*                               HTTPs_ERR_OS_SEM_CREATE             Failed to create semaphore object.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceInit().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsTask_InstanceObjInit (HTTPs_INSTANCE  *p_instance,
+                                 HTTPs_ERR       *p_err)
+{
+           HTTPs_OS_TASK_OBJ  *p_os_task_obj;
+    const  NET_TASK_CFG       *p_task_cfg;
+           RTOS_ERR            err_rtos;
+
+
+    p_task_cfg = p_instance->TaskCfgPtr;
+
+    p_os_task_obj = HTTPsMem_InstanceTaskInit(p_err);
+    if (p_os_task_obj == DEF_NULL) {
+        goto exit;
+    }
+
+    p_instance->OS_TaskObjPtr = p_os_task_obj;
+
+                                                                /* ------- ACQUIRE TASK AND TASK STACK MEM SPACE ------ */
+    p_os_task_obj->TaskHandle = KAL_TaskAlloc(HTTPs_TASK_STR_NAME_TASK,
+                                              p_task_cfg->StkPtr,
+                                              p_task_cfg->StkSizeBytes * sizeof(CPU_STK),
+                                              DEF_NULL,
+                                             &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPs_ERR_TASK_OBJ_CREATE;
+        goto exit;
+    }
+
+
+                                                                /* --------------- CREATE STOP REQ SEM ---------------- */
+    p_os_task_obj->SemStopReq = KAL_SemCreate(HTTPs_TASK_STR_NAME_SEM_STOP_REQ,
+                                              DEF_NULL,
+                                             &err_rtos);
+
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPs_ERR_TASK_SEM_CREATE;
+        goto exit;
+    }
+
+
+                                                                /* ------------- CREATE STOP COMPLETE SEM ------------- */
+    p_os_task_obj->SemStopCompleted = KAL_SemCreate(HTTPs_TASK_STR_NAME_SEM_STOP_COMPLETED,
+                                                    DEF_NULL,
+                                                   &err_rtos);
+
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPs_ERR_TASK_SEM_CREATE;
+        goto exit;
+    }
+
+
+   *p_err = HTTPs_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     HTTPsTask_InstanceTaskCreate()
+*
+* Description : Create and start instance HTTP server task.
+*
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*               -----       Argument validated in HTTPs_InstanceStart().
+*
+*                               HTTPs_ERR_NONE                      Task successfully created and started.
+*                               HTTPs_ERR_OS_TASK_CREATE            Task create failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceStart().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsTask_InstanceTaskCreate (HTTPs_INSTANCE  *p_instance,
+                                    HTTPs_ERR       *p_err)
+{
+           HTTPs_OS_TASK_OBJ  *p_os_task_obj;
+    const  NET_TASK_CFG       *p_task_cfg;
+           RTOS_ERR            err_rtos;
+
+
+    p_os_task_obj = (HTTPs_OS_TASK_OBJ *)p_instance->OS_TaskObjPtr;
+    p_task_cfg    =  p_instance->TaskCfgPtr;
+
+                                                                /* Create HTTP server task.                             */
+    KAL_TaskCreate(              p_os_task_obj->TaskHandle,
+                                 HTTPsTask_InstanceTask,
+                   (void       *)p_instance,
+                   (CPU_INT08U  )p_task_cfg->Prio,
+                                 DEF_NULL,
+                                &err_rtos);
+    if (err_rtos != RTOS_ERR_NONE) {
+        p_instance->Started = DEF_NO;
+       *p_err               = HTTPs_ERR_TASK_CREATE;
+        return;
+    }
+
+    p_instance->Started = DEF_YES;
+
+   *p_err = HTTPs_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      HTTPsTask_InstanceTaskDel()
+*
+* Description : Stop and delete instance task.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+* Return(s)   : none.
+*
+* Created by  : HTTPs_InstanceTaskHandler().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsTask_InstanceTaskDel (HTTPs_INSTANCE  *p_instance)
+{
+    RTOS_ERR             err_rtos;
+    HTTPs_OS_TASK_OBJ  *p_os_task_obj;
+
+
+    p_instance->Started = DEF_NO;                               /* Stop Instance.                                       */
+
+    p_os_task_obj = (HTTPs_OS_TASK_OBJ *)p_instance->OS_TaskObjPtr;
+
+    KAL_TaskDel(p_os_task_obj->TaskHandle,
+               &err_rtos);
+
+   (void)&err_rtos;                                             /* Ignore err(s).                                       */
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsTask_InstanceStopReqSignal()
+*
+* Description : Signal that the instance must be stopped.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStop().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*               -----       Argument validated in HTTPs_InstanceStop().
+*
+*                               HTTPs_ERR_NONE          Stop request successfully signaled.
+*                               HTTPs_ERR_OS_STOP_REQ   Stop request failed.
+*
+* Return(s)   : none
+*
+* Caller(s)   : HTTPs_InstanceStop().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsTask_InstanceStopReqSignal (HTTPs_INSTANCE  *p_instance,
+                                       HTTPs_ERR       *p_err)
+{
+    HTTPs_OS_TASK_OBJ  *p_os_task_obj;
+    RTOS_ERR            err_rtos;
+
+
+    p_os_task_obj = (HTTPs_OS_TASK_OBJ *)p_instance->OS_TaskObjPtr;
+
+
+
+    KAL_SemPost(p_os_task_obj->SemStopReq,                      /* Signal instance that stop is requested.              */
+                KAL_OPT_POST_NONE,
+               &err_rtos);
+
+    if (err_rtos != RTOS_ERR_NONE) {
+       *p_err = HTTPs_ERR_TASK_STOP_REQ_SIGNAL;
+        return;
+    }
+
+   *p_err = HTTPs_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   HTTPsTask_InstanceStopReqPending()
+*
+* Description : Get stop request.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+* Return(s)   : DEF_YES, if stop is requested or a fatal error occurred.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : HTTPs_InstanceTaskHandler().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  HTTPsTask_InstanceStopReqPending (HTTPs_INSTANCE  *p_instance)
+{
+    HTTPs_OS_TASK_OBJ  *p_os_task_obj;
+    RTOS_ERR            err_rtos;
+
+
+    p_os_task_obj = (HTTPs_OS_TASK_OBJ *)p_instance->OS_TaskObjPtr;
+
+    KAL_SemPend(p_os_task_obj->SemStopReq,
+                KAL_OPT_PEND_NON_BLOCKING,
+                1u,
+               &err_rtos);
+
+    switch (err_rtos) {
+        case RTOS_ERR_WOULD_BLOCK:
+        case RTOS_ERR_OS:
+        case RTOS_ERR_TIMEOUT:
+             return (DEF_NO);
+
+
+        case RTOS_ERR_NONE:                                     /* Event occurred.                                      */
+        case RTOS_ERR_NULL_PTR:                                 /* Should not be null.                                  */
+        case RTOS_ERR_NOT_AVAIL:
+        case RTOS_ERR_INVALID_ARG:
+        case RTOS_ERR_ABORT:
+        case RTOS_ERR_ISR:
+        default:
+             return DEF_YES;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                HTTPsTask_InstanceStopCompletedSignal()
+*
+* Description : Signal that the stop request has been completed.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceTaskHandler().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsTask_InstanceStopCompletedSignal (HTTPs_INSTANCE  *p_instance)
+{
+    HTTPs_OS_TASK_OBJ  *p_os_task_obj;
+    RTOS_ERR            err_rtos;
+
+
+    p_os_task_obj = (HTTPs_OS_TASK_OBJ *)p_instance->OS_TaskObjPtr;
+
+    KAL_SemPost(p_os_task_obj->SemStopCompleted,
+                KAL_OPT_POST_NONE,
+               &err_rtos);
+}
+
+
+/*
+*********************************************************************************************************
+*                                HTTPsTask_InstanceStopCompletedPending()
+*
+* Description : Wait until the stop request has been completed.
+*
+* Argument(s) : p_instance  Pointer to the instance structure variable.
+*               ----------  Argument validated in HTTPs_InstanceStop().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*               -----       Argument validated in HTTPs_InstanceStop().
+*
+*                               HTTPs_ERR_NONE               Stop request successfully completed.
+*                               HTTPs_ERR_OS_STOP_COMPLETED  Complete pending failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceStop().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsTask_InstanceStopCompletedPending (HTTPs_INSTANCE  *p_instance,
+                                              HTTPs_ERR       *p_err)
+{
+    HTTPs_OS_TASK_OBJ  *p_os_task_obj;
+    RTOS_ERR            err_rtos;
+
+
+    p_os_task_obj = (HTTPs_OS_TASK_OBJ *)p_instance->OS_TaskObjPtr;
+
+    KAL_SemPend(p_os_task_obj->SemStopCompleted,
+                KAL_OPT_PEND_BLOCKING,
+                0u,                                             /* Infinite timeout.                                    */
+               &err_rtos);
+
+    switch (err_rtos) {
+        case RTOS_ERR_WOULD_BLOCK:
+        case RTOS_ERR_OS:
+        case RTOS_ERR_TIMEOUT:
+            *p_err = HTTPs_ERR_TASK_STOP_COMPLETED_PEND;
+             return;
+
+        case RTOS_ERR_NONE:                                     /* Event occurred.                                      */
+        case RTOS_ERR_NULL_PTR:                                 /* Should not be null.                                  */
+        case RTOS_ERR_INVALID_ARG:
+        case RTOS_ERR_ABORT:
+        case RTOS_ERR_ISR:
+        default:
+             break;
+    }
+
+
+   *p_err = HTTPs_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         HTTPsTask_TimeDly_ms()
+*
+* Description : Delay for specified time, in milliseconds.
+*
+* Argument(s) : time_dly_ms     Time delay value, in millisecond.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceTaskHandler().
+*
+*               This function is an INTERNAL HTTP server function & SHOULD NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  HTTPsTask_TimeDly_ms (CPU_INT32U  time_dly_ms)
+{
+    KAL_Dly(time_dly_ms);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         HTTPs_InstanceTask()
+*
+* Description : Shell task to schedule & run HTTP instance task handler.
+*
+*               (1) Shell task's primary purpose is to schedule & run HTTPs_InstanceTaskHandler() forever.
+*
+* Argument(s) : p_data  Pointer to task initialization (required by uC/OS-III).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceTaskCreate().
+*
+*               This function is an INTERNAL HTTP server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsTask_InstanceTask (void  *p_data)
+{
+    HTTPs_INSTANCE  *p_instance;
+
+
+    p_instance = (HTTPs_INSTANCE *)p_data;
+
+    while (DEF_ON) {
+        HTTPsTask_InstanceTaskHandler(p_instance);              /* Call HTTP server task handler.                       */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                    HTTPsTask_InstanceTaskHandler()
+*
+* Description : HTTP server main loop.
+*
+* Argument(s) : p_instance  Pointer to the instance.
+*               ----------  Argument validated in HTTPs_InstanceStart().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : HTTPs_InstanceTask().
+*
+*               This function is an INTERNAL HTTPs server function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  HTTPsTask_InstanceTaskHandler (HTTPs_INSTANCE  *p_instance)
+{
+    const  HTTPs_CFG             *p_cfg         = p_instance->CfgPtr;
+           NET_SOCK_QTY           sock_nbr_rdy  = 0;
+           CPU_BOOLEAN            close_pending = DEF_NO;
+           CPU_BOOLEAN            closed        = DEF_NO;
+           CPU_BOOLEAN            accept;
+           HTTPs_ERR              err;
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+    const  NET_FS_API            *p_fs_api;
+           CPU_CHAR              *p_working_folder;
+           CPU_BOOLEAN            result;
+#endif
+           HTTPs_INSTANCE_ERRS   *p_ctr_err;
+
+
+    HTTPs_SET_PTR_ERRS( p_ctr_err,   p_instance);
+                                                                /* ---------------- SET WORKING FOLDER ---------------- */
+    switch (p_cfg->FS_Type) {
+        case HTTPs_FS_TYPE_NONE:
+             break;
+
+        case HTTPs_FS_TYPE_STATIC:
+             break;
+
+        case HTTPs_FS_TYPE_DYN:
+#if (HTTPs_CFG_FS_PRESENT_EN == DEF_ENABLED)
+             p_fs_api = ((HTTPs_CFG_FS_DYN *)p_cfg->FS_CfgPtr)->FS_API_Ptr;
+             p_working_folder = ((HTTPs_CFG_FS_DYN *)p_cfg->FS_CfgPtr)->WorkingFolderNamePtr;
+             if (p_fs_api != DEF_NULL) {
+                 if ((p_fs_api->WorkingFolderSet != DEF_NULL) &&
+                     (p_working_folder    != DEF_NULL)) {
+                     result = p_fs_api->WorkingFolderSet(p_working_folder);
+                     if (result != DEF_OK) {
+                         HTTPs_ERR_INC(p_ctr_err->FS_ErrWorkingFolderInvalidCtr);
+                         CPU_SW_EXCEPTION(;);
+                     }
+                 }
+             }
+#else
+             HTTPs_ERR_INC(p_ctr_err->FS_ErrNoEnCtr);
+             CPU_SW_EXCEPTION(HTTPs_ERR_CFG_INVALID_FS_EN);
+#endif
+             break;
+
+        default:
+             HTTPs_ERR_INC(p_ctr_err->FS_ErrTypeInvalidCtr);
+             CPU_SW_EXCEPTION(;);
+             break;
+    }
+
+   (void)&p_ctr_err;
+
+    while (DEF_ON) {
+
+                                                                /* -------------------- DELAY TASK -------------------- */
+        if (p_cfg->OS_TaskDly_ms > 0) {
+            HTTPsTask_TimeDly_ms(p_cfg->OS_TaskDly_ms);
+        }
+
+                                                                /* ------------------- SEL CONN RDY ------------------- */
+        accept       = !closed;
+        sock_nbr_rdy = HTTPsSock_ConnSel(p_instance, accept);
+
+                                                                /* -------------- ACQUIRE INSTANCE LOCK --------------- */
+        do {
+            HTTPsTask_LockAcquire(p_instance->OS_LockObj, &err);
+            if (err != HTTPs_ERR_NONE) {                        /* If failed to acquire instance lock ...               */
+                                                                /* ... Delay the task ...                               */
+                HTTPsTask_TimeDly_ms(HTTPs_OS_LOCK_ACQUIRE_FAIL_DLY_MS);
+            }
+        } while (err != HTTPs_ERR_NONE);
+
+                                                                /* -------------- CHECK FOR ASYNC CLOSE --------------- */
+        if (close_pending == DEF_NO) {                          /* If close NOT already signaled.                       */
+            close_pending  = HTTPsTask_InstanceStopReqPending(p_instance);
+        }
+
+        if (close_pending == DEF_YES) {                         /* If stop is requested.                                */
+
+            if (closed == DEF_NO) {                             /* If not closed.                                       */
+
+                                                                /* ---------------- CLOSE LISTEN SOCK ----------------- */
+                switch (p_cfg->SockSel) {
+                    case HTTPs_SOCK_SEL_IPv4:
+#ifdef   NET_IPv4_MODULE_EN
+                         HTTPsSock_ListenClose(p_instance, p_instance->SockListenID_IPv4);
+#endif
+                         break;
+
+                    case HTTPs_SOCK_SEL_IPv6:
+#ifdef   NET_IPv6_MODULE_EN
+                         HTTPsSock_ListenClose(p_instance, p_instance->SockListenID_IPv6);
+#endif
+                         break;
+
+                    case HTTPs_SOCK_SEL_IPv4_IPv6:
+#ifdef   NET_IPv4_MODULE_EN
+                         HTTPsSock_ListenClose(p_instance, p_instance->SockListenID_IPv4);
+#endif
+#ifdef   NET_IPv6_MODULE_EN
+                         HTTPsSock_ListenClose(p_instance, p_instance->SockListenID_IPv6);
+#endif
+                         break;
+
+                    default:
+                        break;
+                }
+                                                                    /* Close listen sock: discard incoming conn.        */
+                closed = DEF_YES;
+
+            } else if (p_instance->ConnActiveCtr == 0) {            /* If no more active connection:                    */
+
+                HTTPsTask_InstanceStopCompletedSignal(p_instance);  /* Signal that the stop is completed.               */
+                HTTPsTask_LockRelease(p_instance->OS_LockObj);      /* Release instance lock.                           */
+                HTTPsTask_TimeDly_ms(500);                          /* Add delay to permit context switch.              */
+                return;
+            }
+        }
+
+                                                                /* ----------------- PROCESS CONN RDY ----------------- */
+        if (sock_nbr_rdy > 0) {
+            HTTPsConn_Process(p_instance);
+        }
+
+                                                                /* -------------- RELEASE INSTANCE LOCK --------------- */
+        HTTPsTask_LockRelease(p_instance->OS_LockObj);
+    }
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_task.h b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_task.h
new file mode 100644
index 0000000..f989573
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-HTTP/Server/Source/http-s_task.h
@@ -0,0 +1,113 @@
+/*
+*********************************************************************************************************
+*                                               uC/HTTP
+*                                      Hypertext Transfer Protocol
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/HTTP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           HTTP SERVER TASK MODULE
+*
+* Filename      : http-s_task.h
+* Version       : V3.00.02
+* Programmer(s) : AA
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) See http-s.h file header.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the HTTPs module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  HTTPs_TASK_MODULE_PRESENT                          /* See Note #1.                                         */
+#define  HTTPs_TASK_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+#include  "http-s.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+KAL_LOCK_HANDLE      HTTPsTask_LockCreate                   (HTTPs_ERR                 *p_err);
+
+void                 HTTPsTask_LockAcquire                  (KAL_LOCK_HANDLE            os_lock_obj,
+                                                             HTTPs_ERR                 *p_err);
+
+void                 HTTPsTask_LockRelease                  (KAL_LOCK_HANDLE            os_lock_obj);
+
+void                 HTTPsTask_InstanceObjInit              (HTTPs_INSTANCE            *p_instance,
+                                                             HTTPs_ERR                 *p_err);
+
+void                 HTTPsTask_InstanceTaskCreate           (HTTPs_INSTANCE            *p_instance,
+                                                             HTTPs_ERR                 *p_err);
+
+void                 HTTPsTask_InstanceTaskDel              (HTTPs_INSTANCE            *p_instance);
+
+void                 HTTPsTask_InstanceStopReqSignal        (HTTPs_INSTANCE            *p_instance,
+                                                             HTTPs_ERR                 *p_err);
+
+CPU_BOOLEAN          HTTPsTask_InstanceStopReqPending       (HTTPs_INSTANCE            *p_instance);
+
+void                 HTTPsTask_InstanceStopCompletedSignal  (HTTPs_INSTANCE            *p_instance);
+
+void                 HTTPsTask_InstanceStopCompletedPending (HTTPs_INSTANCE            *p_instance,
+                                                             HTTPs_ERR                 *p_err);
+
+void                 HTTPsTask_TimeDly_ms                   (CPU_INT32U                 time_dly_ms);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* HTTPs_TASK_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/Cfg/Template/lib_cfg.h b/src/ucos_v1_42/micrium_source/uC-LIB/Cfg/Template/lib_cfg.h
new file mode 100644
index 0000000..9b6201f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/Cfg/Template/lib_cfg.h
@@ -0,0 +1,171 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find information about uC/LIB by visiting doc.micrium.com.
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  CUSTOM LIBRARY CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : lib_cfg.h
+* Version       : V1.38.01.00
+* Programmer(s) : FBJ
+*                 JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  LIB_CFG_MODULE_PRESENT
+#define  LIB_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                    MEMORY LIBRARY CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                             MEMORY LIBRARY ARGUMENT CHECK CONFIGURATION
+*
+* Note(s) : (1) Configure LIB_MEM_CFG_ARG_CHK_EXT_EN to enable/disable the memory library suite external
+*               argument check feature :
+*
+*               (a) When ENABLED,     arguments received from any port interface provided by the developer
+*                   or application are checked/validated.
+*
+*               (b) When DISABLED, NO arguments received from any port interface provided by the developer
+*                   or application are checked/validated.
+*********************************************************************************************************
+*/
+
+                                                                /* External argument check.                             */
+                                                                /* Indicates if arguments received from any port ...    */
+                                                                /* ... interface provided by the developer or ...       */
+                                                                /* ... application are checked/validated.               */
+#define  LIB_MEM_CFG_ARG_CHK_EXT_EN     DEF_DISABLED
+
+
+/*
+*********************************************************************************************************
+*                         MEMORY LIBRARY ASSEMBLY OPTIMIZATION CONFIGURATION
+*
+* Note(s) : (1) Configure LIB_MEM_CFG_OPTIMIZE_ASM_EN to enable/disable assembly-optimized memory function(s).
+*********************************************************************************************************
+*/
+
+                                                                /* Assembly-optimized function(s).                      */
+                                                                /* Enable/disable assembly-optimized memory ...         */
+                                                                /* ... function(s). [see Note #1]                       */
+#define  LIB_MEM_CFG_OPTIMIZE_ASM_EN    DEF_DISABLED
+
+
+/*
+*********************************************************************************************************
+*                                   MEMORY ALLOCATION CONFIGURATION
+*
+* Note(s) : (1) Configure LIB_MEM_CFG_DBG_INFO_EN to enable/disable memory allocation usage tracking
+*               that associates a name with each segment or dynamic pool allocated.
+*
+*           (2) (a) Configure LIB_MEM_CFG_HEAP_SIZE with the desired size of heap memory (in octets).
+*
+*               (b) Configure LIB_MEM_CFG_HEAP_BASE_ADDR to specify a base address for heap memory :
+*
+*                   (1) Heap initialized to specified application memory, if LIB_MEM_CFG_HEAP_BASE_ADDR
+*                                                                                #define'd in 'lib_cfg.h';
+*                                                                         CANNOT #define to address 0x0
+*
+*                   (2) Heap declared to Mem_Heap[] in 'lib_mem.c',       if LIB_MEM_CFG_HEAP_BASE_ADDR
+*                                                                            NOT #define'd in 'lib_cfg.h'
+*********************************************************************************************************
+*/
+
+                                                                /* Allocation debugging information.                    */
+                                                                /* Enable/disable allocation of debug information ...   */
+                                                                /* ... associated to each memory allocation.            */
+#define  LIB_MEM_CFG_DBG_INFO_EN        DEF_DISABLED
+
+
+                                                                /* Heap memory size (in bytes).                         */
+                                                                /* Configure the desired size of the heap memory. ...   */
+                                                                /* ... Set to 0 to disable heap allocation features.    */
+#define  LIB_MEM_CFG_HEAP_SIZE                  1024u
+
+
+                                                                /* Heap memory padding alignment (in bytes).            */
+                                                                /* Configure the desired size of padding alignment ...  */
+                                                                /* ... of each buffer allocated from the heap.          */
+#define  LIB_MEM_CFG_HEAP_PADDING_ALIGN    LIB_MEM_PADDING_ALIGN_NONE
+
+#if 0                                                           /* Remove this to have heap alloc at specified addr.    */
+#define  LIB_MEM_CFG_HEAP_BASE_ADDR       0x00000000            /* Configure heap memory base address (see Note #2b).   */
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                    STRING LIBRARY CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                 STRING FLOATING POINT CONFIGURATION
+*
+* Note(s) : (1) Configure LIB_STR_CFG_FP_EN to enable/disable floating point string function(s).
+*
+*           (2) Configure LIB_STR_CFG_FP_MAX_NBR_DIG_SIG to configure the maximum number of significant
+*               digits to calculate &/or display for floating point string function(s).
+*
+*               See also 'lib_str.h  STRING FLOATING POINT DEFINES  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                                /* Floating point feature(s).                           */
+                                                                /* Enable/disable floating point to string functions.   */
+#define  LIB_STR_CFG_FP_EN                      DEF_DISABLED
+
+
+                                                                /* Floating point number of significant digits.         */
+                                                                /* Configure the maximum number of significant ...      */
+                                                                /* ... digits to calculate &/or display for ...         */
+                                                                /* ... floating point string function(s).               */
+#define  LIB_STR_CFG_FP_MAX_NBR_DIG_SIG         LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of lib cfg module include.                       */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.c b/src/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.c
new file mode 100644
index 0000000..3cfedc8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.c
@@ -0,0 +1,655 @@
+/*
+*********************************************************************************************************
+*                                                uC/LIB
+*                                        CUSTOM LIBRARY MODULES
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/LIB is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     ASCII CHARACTER OPERATIONS
+*
+* Filename      : lib_ascii.c
+* Version       : V1.38.01
+* Programmer(s) : BAN
+*                 ITJ
+*********************************************************************************************************
+* Note(s)       : (1) NO compiler-supplied standard library functions are used in library or product software.
+*
+*                     (a) ALL standard library functions are implemented in the custom library modules :
+*
+*                         (1) \\lib_*.*
+*
+*                         (2) \\Ports\\\lib*_a.*
+*
+*                               where
+*                                             directory path for custom library software
+*                                                                  directory name for specific processor (CPU)
+*                                                             directory name for specific compiler
+*
+*                     (b) Product-specific library functions are implemented in individual products.
+*
+*
+*                 (2) (a) ECMA-6 '7-Bit coded Character Set' (6th edition), which corresponds to the
+*                         3rd edition of ISO 646, specifies several versions of a 7-bit character set :
+*
+*                         (1) THE GENERAL VERSION, which allows characters at 0x23 and 0x24 to be given a
+*                             set alternate form and allows the characters 0x40, 0x5B, 0x5D, 0x60, 0x7B &
+*                             0x7D to be assigned a "unique graphic character" or to be declared as unused.
+*                             All other characters are explicitly specified.
+*
+*                         (2) THE INTERNATIONAL REFERENCE VERSION, which explicitly specifies all characters
+*                             in the 7-bit character set.
+*
+*                         (3) NATIONAL & APPLICATION-ORIENTED VERSIONS, which may be derived from the
+*                             standard in specified ways.
+*
+*                     (b) The character set represented in this file reproduces the Internation Reference
+*                         Version.  This is identical to the 7-bit character set which occupies Unicode
+*                         characters 0x0000 through 0x007F.  The character names are taken from v5.0 of the
+*                         Unicode specification, with certain abbreviations so that the resulting #define
+*                         names will not violate ANSI C naming restriction :
+*
+*                         (1) For the Latin capital & lowercase letters, the name components 'LETTER_CAPITAL'
+*                             & 'LETTER_SMALL' are replaced by 'UPPER' & 'LOWER', respectively.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    LIB_ASCII_MODULE
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IsAlpha()
+*
+* Description : Determine whether a character is an alphabetic character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     an alphabetic character.
+*
+*               DEF_NO,     if character is NOT an alphabetic character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.2.(2) states that "isalpha() returns true only for the
+*                   characters for which isupper() or islower() is true".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsAlpha (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  alpha;
+
+
+    alpha = ASCII_IS_ALPHA(c);
+
+    return (alpha);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         ASCII_IsAlphaNum()
+*
+* Description : Determine whether a character is an alphanumeric character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     an alphanumeric character.
+*
+*               DEF_NO,     if character is NOT an alphanumeric character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.1.(2) states that "isalnum() ... tests for any character
+*                   for which isalpha() or isdigit() is true".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsAlphaNum (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  alpha_num;
+
+
+    alpha_num = ASCII_IS_ALPHA_NUM(c);
+
+    return (alpha_num);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IsLower()
+*
+* Description : Determine whether a character is a lowercase alphabetic character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a lowercase alphabetic character.
+*
+*               DEF_NO,     if character is NOT a lowercase alphabetic character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.7.(2)  states that "islower() returns true only for
+*                   the lowercase letters".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsLower (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  lower;
+
+
+    lower = ASCII_IS_LOWER(c);
+
+    return (lower);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IsUpper()
+*
+* Description : Determine whether a character is an uppercase alphabetic character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     an uppercase alphabetic character.
+*
+*               DEF_NO,     if character is NOT an uppercase alphabetic character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.11.(2) states that "isupper() returns true only for
+*                   the uppercase letters".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsUpper (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  upper;
+
+
+    upper = ASCII_IS_UPPER(c);
+
+    return (upper);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            ASCII_IsDig()
+*
+* Description : Determine whether a character is a decimal-digit character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a decimal-digit character.
+*
+*               DEF_NO,     if character is NOT a decimal-digit character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.5.(2)  states that "isdigit()  ... tests for any
+*                   decimal-digit character".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsDig (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  dig;
+
+
+    dig = ASCII_IS_DIG(c);
+
+    return (dig);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_IsDigOct()
+*
+* Description : Determine whether a character is an octal-digit character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     an octal-digit character.
+*
+*               DEF_NO,     if character is NOT an octal-digit character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsDigOct (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  dig_oct;
+
+
+    dig_oct = ASCII_IS_DIG_OCT(c);
+
+    return (dig_oct);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_IsDigHex()
+*
+* Description : Determine whether a character is a hexadecimal-digit character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a hexadecimal-digit character.
+*
+*               DEF_NO,     if character is NOT a hexadecimal-digit character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.12.(2) states that "isxdigit() ... tests for any
+*                   hexadecimal-digit character".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsDigHex (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  dig_hex;
+
+
+    dig_hex = ASCII_IS_DIG_HEX(c);
+
+    return (dig_hex);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IsBlank()
+*
+* Description : Determine whether a character is a standard blank character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a standard blank character.
+*
+*               DEF_NO,     if character is NOT a standard blank character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.1.3.(2) states that "isblank() returns true only for
+*                       the standard blank characters".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.1.3.(2) defines "the standard blank characters" as
+*                       the "space (' '), and horizontal tab ('\t')".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsBlank (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  blank;
+
+
+    blank = ASCII_IS_BLANK(c);
+
+    return (blank);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IsSpace()
+*
+* Description : Determine whether a character is a white-space character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a white-space character.
+*
+*               DEF_NO,     if character is NOT a white-space character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.1.10.(2) states that "isspace() returns true only
+*                       for the standard white-space characters".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.1.10.(2) defines "the standard white-space characters"
+*                       as the "space (' '), form feed ('\f'), new-line ('\n'), carriage return ('\r'),
+*                       horizontal tab ('\t'), and vertical tab ('\v')".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsSpace (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  space;
+
+
+    space = ASCII_IS_SPACE(c);
+
+    return (space);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IsPrint()
+*
+* Description : Determine whether a character is a printing character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a printing character.
+*
+*               DEF_NO,     if character is NOT a printing character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.1.8.(2) states that "isprint() ... tests for any
+*                       printing character including space (' ')".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.(3), Note 169, states that in "the seven-bit US
+*                       ASCII character set, the printing characters are those whose values lie from
+*                       0x20 (space) through 0x7E (tilde)".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsPrint (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  print;
+
+
+    print = ASCII_IS_PRINT(c);
+
+    return (print);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IsGraph()
+*
+* Description : Determine whether a character is any printing character except a space character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a graphic character.
+*
+*               DEF_NO,     if character is NOT a graphic character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.1.6.(2) states that "isgraph() ... tests for any
+*                       printing character except space (' ')".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.(3), Note 169, states that in "the seven-bit US
+*                       ASCII character set, the printing characters are those whose values lie from
+*                       0x20 (space) through 0x7E (tilde)".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsGraph (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  graph;
+
+
+    graph = ASCII_IS_GRAPH(c);
+
+    return (graph);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IsPunct()
+*
+* Description : Determine whether a character is a punctuation character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a punctuation character.
+*
+*               DEF_NO,     if character is NOT a punctuation character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.9.(2) states that "ispunct() returns true for every
+*                   printing character for which neither isspace() nor isalnum() is true".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsPunct (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  punct;
+
+
+    punct = ASCII_IS_PUNCT(c);
+
+    return (punct);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IsCtrl()
+*
+* Description : Determine whether a character is a control character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a control character.
+*
+*               DEF_NO,     if character is NOT a control character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.1.4.(2) states that "iscntrl() ... tests for any
+*                       control character".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.(3), Note 169, states that in "the seven-bit US
+*                       ASCII character set, ... the control characters are those whose values lie from
+*                       0 (NUL) through 0x1F (US), and the character 0x7F (DEL)".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsCtrl (CPU_CHAR  c)
+{
+    CPU_BOOLEAN  ctrl;
+
+
+    ctrl = ASCII_IS_CTRL(c);
+
+    return (ctrl);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_ToLower()
+*
+* Description : Convert uppercase alphabetic character to its corresponding lowercase alphabetic character.
+*
+* Argument(s) : c           Character to convert.
+*
+* Return(s)   : Lowercase equivalent of 'c', if character 'c' is an uppercase character (see Note #1b1).
+*
+*               Character 'c',               otherwise                                  (see Note #1b2).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.2.1.(2) states that "tolower() ... converts an
+*                       uppercase letter to a corresponding lowercase letter".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.2.1.(3) states that :
+*
+*                       (1) (A) "if the argument is a character for which isupper() is true and there are
+*                                one or more corresponding characters ... for which islower() is true," ...
+*                           (B) "tolower() ... returns one of the corresponding characters;" ...
+*
+*                       (2) "otherwise, the argument is returned unchanged."
+*********************************************************************************************************
+*/
+
+CPU_CHAR  ASCII_ToLower (CPU_CHAR  c)
+{
+    CPU_CHAR  lower;
+
+
+    lower = ASCII_TO_LOWER(c);
+
+    return (lower);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_ToUpper()
+*
+* Description : Convert lowercase alphabetic character to its corresponding uppercase alphabetic character.
+*
+* Argument(s) : c           Character to convert.
+*
+* Return(s)   : Uppercase equivalent of 'c', if character 'c' is a lowercase character (see Note #1b1).
+*
+*               Character 'c',               otherwise                                 (see Note #1b2).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.2.2.(2) states that "toupper() ... converts a
+*                       lowercase letter to a corresponding uppercase letter".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.2.2.(3) states that :
+*
+*                       (1) (A) "if the argument is a character for which islower() is true and there are
+*                                one or more corresponding characters ... for which isupper() is true," ...
+*                           (B) "toupper() ... returns one of the corresponding characters;" ...
+*
+*                       (2) "otherwise, the argument is returned unchanged."
+*********************************************************************************************************
+*/
+
+CPU_CHAR  ASCII_ToUpper (CPU_CHAR  c)
+{
+    CPU_CHAR  upper;
+
+
+    upper = ASCII_TO_UPPER(c);
+
+    return (upper);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             ASCII_Cmp()
+*
+* Description : Determine if two characters are identical (case-insensitive).
+*
+* Argument(s) : c1          First  character.
+*
+*               c2          Second character.
+*
+* Return(s)   : DEF_YES, if the characters are     identical.
+*
+*               DEF_NO,  if the characters are NOT identical.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_Cmp (CPU_CHAR  c1,
+                        CPU_CHAR  c2)
+{
+    CPU_CHAR     c1_upper;
+    CPU_CHAR     c2_upper;
+    CPU_BOOLEAN  cmp;
+
+
+    c1_upper =  ASCII_ToUpper(c1);
+    c2_upper =  ASCII_ToUpper(c2);
+    cmp      = (c1_upper == c2_upper) ? (DEF_YES) : (DEF_NO);
+
+    return (cmp);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.h b/src/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.h
new file mode 100644
index 0000000..8e60864
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.h
@@ -0,0 +1,843 @@
+/*
+*********************************************************************************************************
+*                                                uC/LIB
+*                                        CUSTOM LIBRARY MODULES
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/LIB is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     ASCII CHARACTER OPERATIONS
+*
+* Filename      : lib_ascii.h
+* Version       : V1.38.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) NO compiler-supplied standard library functions are used in library or product software.
+*
+*                     (a) ALL standard library functions are implemented in the custom library modules :
+*
+*                         (1) \\lib_*.*
+*
+*                         (2) \\Ports\\\lib*_a.*
+*
+*                               where
+*                                             directory path for custom library software
+*                                                                  directory name for specific processor (CPU)
+*                                                             directory name for specific compiler
+*
+*                     (b) Product-specific library functions are implemented in individual products.
+*
+*
+*                 (2) (a) ECMA-6 '7-Bit coded Character Set' (6th edition), which corresponds to the
+*                         3rd edition of ISO 646, specifies several versions of a 7-bit character set :
+*
+*                         (1) THE GENERAL VERSION, which allows characters at 0x23 and 0x24 to be given a
+*                             set alternate form and allows the characters 0x40, 0x5B, 0x5D, 0x60, 0x7B &
+*                             0x7D to be assigned a "unique graphic character" or to be declared as unused.
+*                             All other characters are explicitly specified.
+*
+*                         (2) THE INTERNATIONAL REFERENCE VERSION, which explicitly specifies all characters
+*                             in the 7-bit character set.
+*
+*                         (3) NATIONAL & APPLICATION-ORIENTED VERSIONS, which may be derived from the
+*                             standard in specified ways.
+*
+*                     (b) The character set represented in this file reproduces the Internation Reference
+*                         Version.  This is identical to the 7-bit character set which occupies Unicode
+*                         characters 0x0000 through 0x007F.  The character names are taken from v5.0 of the
+*                         Unicode specification, with certain abbreviations so that the resulting #define
+*                         names will not violate ANSI C naming restriction :
+*
+*                         (1) For the Latin capital & lowercase letters, the name components 'LETTER_CAPITAL'
+*                             & 'LETTER_SMALL' are replaced by 'UPPER' & 'LOWER', respectively.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This ASCII library header file is protected from multiple pre-processor inclusion through
+*               use of the ASCII library module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  LIB_ASCII_MODULE_PRESENT                               /* See Note #1.                                         */
+#define  LIB_ASCII_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The custom library software files are located in the following directories :
+*
+*               (a) \\lib_*.*
+*
+*                       where
+*                                     directory path for custom library software
+*
+*           (2) CPU-configuration  software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) (1) '\\'                  directory         See Note #2a
+*                   (2) '\\\\' directory         See Note #2b
+*
+*           (4) NO compiler-supplied standard library functions SHOULD be used.
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   LIB_ASCII_MODULE
+#define  LIB_ASCII_EXT
+#else
+#define  LIB_ASCII_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         ASCII CHARACTER DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- C0 CONTROLS ------------------- */
+#define  ASCII_CHAR_NULL                                0x00    /* '\0'                                                 */
+#define  ASCII_CHAR_START_OF_HEADING                    0x01
+#define  ASCII_CHAR_START_OF_TEXT                       0x02
+#define  ASCII_CHAR_END_OF_TEXT                         0x03
+#define  ASCII_CHAR_END_OF_TRANSMISSION                 0x04
+#define  ASCII_CHAR_ENQUIRY                             0x05
+#define  ASCII_CHAR_ACKNOWLEDGE                         0x06
+#define  ASCII_CHAR_BELL                                0x07    /* '\a'                                                 */
+#define  ASCII_CHAR_BACKSPACE                           0x08    /* '\b'                                                 */
+#define  ASCII_CHAR_CHARACTER_TABULATION                0x09    /* '\t'                                                 */
+#define  ASCII_CHAR_LINE_FEED                           0x0A    /* '\n'                                                 */
+#define  ASCII_CHAR_LINE_TABULATION                     0x0B    /* '\v'                                                 */
+#define  ASCII_CHAR_FORM_FEED                           0x0C    /* '\f'                                                 */
+#define  ASCII_CHAR_CARRIAGE_RETURN                     0x0D    /* '\r'                                                 */
+#define  ASCII_CHAR_SHIFT_OUT                           0x0E
+#define  ASCII_CHAR_SHIFT_IN                            0x0F
+#define  ASCII_CHAR_DATA_LINK_ESCAPE                    0x10
+#define  ASCII_CHAR_DEVICE_CONTROL_ONE                  0x11
+#define  ASCII_CHAR_DEVICE_CONTROL_TWO                  0x12
+#define  ASCII_CHAR_DEVICE_CONTROL_THREE                0x13
+#define  ASCII_CHAR_DEVICE_CONTROL_FOUR                 0x14
+#define  ASCII_CHAR_NEGATIVE_ACKNOWLEDGE                0x15
+#define  ASCII_CHAR_SYNCHRONOUS_IDLE                    0x16
+#define  ASCII_CHAR_END_OF_TRANSMISSION_BLOCK           0x17
+#define  ASCII_CHAR_CANCEL                              0x18
+#define  ASCII_CHAR_END_OF_MEDIUM                       0x19
+#define  ASCII_CHAR_SUBSITUTE                           0x1A
+#define  ASCII_CHAR_ESCAPE                              0x1B
+#define  ASCII_CHAR_INFO_SEPARATOR_FOUR                 0x1C
+#define  ASCII_CHAR_INFO_SEPARATOR_THREE                0x1D
+#define  ASCII_CHAR_INFO_SEPARATOR_TWO                  0x1E
+#define  ASCII_CHAR_INFO_SEPARATOR_ONE                  0x1F
+
+#define  ASCII_CHAR_NUL                                 ASCII_CHAR_NULL
+#define  ASCII_CHAR_SOH                                 ASCII_CHAR_START_OF_HEADING
+#define  ASCII_CHAR_START_HEADING                       ASCII_CHAR_START_OF_HEADING
+#define  ASCII_CHAR_STX                                 ASCII_CHAR_START_OF_TEXT
+#define  ASCII_CHAR_START_TEXT                          ASCII_CHAR_START_OF_TEXT
+#define  ASCII_CHAR_ETX                                 ASCII_CHAR_END_OF_TEXT
+#define  ASCII_CHAR_END_TEXT                            ASCII_CHAR_END_OF_TEXT
+#define  ASCII_CHAR_EOT                                 ASCII_CHAR_END_OF_TRANSMISSION
+#define  ASCII_CHAR_END_TRANSMISSION                    ASCII_CHAR_END_OF_TRANSMISSION
+#define  ASCII_CHAR_ENQ                                 ASCII_CHAR_ENQUIRY
+#define  ASCII_CHAR_ACK                                 ASCII_CHAR_ACKNOWLEDGE
+#define  ASCII_CHAR_BEL                                 ASCII_CHAR_BELL
+#define  ASCII_CHAR_BS                                  ASCII_CHAR_BACKSPACE
+#define  ASCII_CHAR_HT                                  ASCII_CHAR_CHARACTER_TABULATION
+#define  ASCII_CHAR_TAB                                 ASCII_CHAR_CHARACTER_TABULATION
+#define  ASCII_CHAR_LF                                  ASCII_CHAR_LINE_FEED
+#define  ASCII_CHAR_VT                                  ASCII_CHAR_LINE_TABULATION
+#define  ASCII_CHAR_FF                                  ASCII_CHAR_FORM_FEED
+#define  ASCII_CHAR_CR                                  ASCII_CHAR_CARRIAGE_RETURN
+#define  ASCII_CHAR_SO                                  ASCII_CHAR_SHIFT_OUT
+#define  ASCII_CHAR_SI                                  ASCII_CHAR_SHIFT_IN
+#define  ASCII_CHAR_DLE                                 ASCII_CHAR_DATA_LINK_ESCAPE
+#define  ASCII_CHAR_DC1                                 ASCII_CHAR_DEVICE_CONTROL_ONE
+#define  ASCII_CHAR_DC2                                 ASCII_CHAR_DEVICE_CONTROL_TWO
+#define  ASCII_CHAR_DC3                                 ASCII_CHAR_DEVICE_CONTROL_THREE
+#define  ASCII_CHAR_DC4                                 ASCII_CHAR_DEVICE_CONTROL_FOUR
+#define  ASCII_CHAR_DEV_CTRL_ONE                        ASCII_CHAR_DEVICE_CONTROL_ONE
+#define  ASCII_CHAR_DEV_CTRL_TWO                        ASCII_CHAR_DEVICE_CONTROL_TWO
+#define  ASCII_CHAR_DEV_CTRL_THREE                      ASCII_CHAR_DEVICE_CONTROL_THREE
+#define  ASCII_CHAR_DEV_CTRL_FOUR                       ASCII_CHAR_DEVICE_CONTROL_FOUR
+#define  ASCII_CHAR_NAK                                 ASCII_CHAR_NEGATIVE_ACKNOWLEDGE
+#define  ASCII_CHAR_NEG_ACK                             ASCII_CHAR_NEGATIVE_ACKNOWLEDGE
+#define  ASCII_CHAR_SYN                                 ASCII_CHAR_SYNCHRONOUS_IDLE
+#define  ASCII_CHAR_SYNC_IDLE                           ASCII_CHAR_SYNCHRONOUS_IDLE
+#define  ASCII_CHAR_ETB                                 ASCII_CHAR_END_OF_TRANSMISSION_BLOCK
+#define  ASCII_CHAR_END_TRANSMISSION_BLK                ASCII_CHAR_END_OF_TRANSMISSION_BLOCK
+#define  ASCII_CHAR_CAN                                 ASCII_CHAR_CANCEL
+#define  ASCII_CHAR_EM                                  ASCII_CHAR_END_OF_MEDIUM
+#define  ASCII_CHAR_END_MEDIUM                          ASCII_CHAR_END_OF_MEDIUM
+#define  ASCII_CHAR_SUB                                 ASCII_CHAR_SUBSITUTE
+#define  ASCII_CHAR_ESC                                 ASCII_CHAR_ESCAPE
+#define  ASCII_CHAR_IS1                                 ASCII_CHAR_INFO_SEPARATOR_ONE
+#define  ASCII_CHAR_IS2                                 ASCII_CHAR_INFO_SEPARATOR_TWO
+#define  ASCII_CHAR_IS3                                 ASCII_CHAR_INFO_SEPARATOR_THREE
+#define  ASCII_CHAR_IS4                                 ASCII_CHAR_INFO_SEPARATOR_FOUR
+
+
+                                                                /* ------------ ASCII PUNCTUATION & SYMBOLS ----------- */
+#define  ASCII_CHAR_SPACE                               0x20    /* ' '                                                  */
+#define  ASCII_CHAR_EXCLAMATION_MARK                    0x21    /* '!'                                                  */
+#define  ASCII_CHAR_QUOTATION_MARK                      0x22    /* '\"'                                                 */
+#define  ASCII_CHAR_NUMBER_SIGN                         0x23    /* '#'                                                  */
+#define  ASCII_CHAR_DOLLAR_SIGN                         0x24    /* '$'                                                  */
+#define  ASCII_CHAR_PERCENTAGE_SIGN                     0x25    /* '%'                                                  */
+#define  ASCII_CHAR_AMPERSAND                           0x26    /* '&'                                                  */
+#define  ASCII_CHAR_APOSTROPHE                          0x27    /* '\''                                                 */
+#define  ASCII_CHAR_LEFT_PARENTHESIS                    0x28    /* '('                                                  */
+#define  ASCII_CHAR_RIGHT_PARENTHESIS                   0x29    /* ')'                                                  */
+#define  ASCII_CHAR_ASTERISK                            0x2A    /* '*'                                                  */
+#define  ASCII_CHAR_PLUS_SIGN                           0x2B    /* '+'                                                  */
+#define  ASCII_CHAR_COMMA                               0x2C    /* ','                                                  */
+#define  ASCII_CHAR_HYPHEN_MINUS                        0x2D    /* '-'                                                  */
+#define  ASCII_CHAR_FULL_STOP                           0x2E    /* '.'                                                  */
+#define  ASCII_CHAR_SOLIDUS                             0x2F    /* '/'                                                  */
+
+#define  ASCII_CHAR_PAREN_LEFT                          ASCII_CHAR_LEFT_PARENTHESIS
+#define  ASCII_CHAR_PAREN_RIGHT                         ASCII_CHAR_RIGHT_PARENTHESIS
+
+
+                                                                /* ------------------- ASCII DIGITS ------------------- */
+#define  ASCII_CHAR_DIGIT_ZERO                          0x30    /* '0'                                                  */
+#define  ASCII_CHAR_DIGIT_ONE                           0x31    /* '1'                                                  */
+#define  ASCII_CHAR_DIGIT_TWO                           0x32    /* '2'                                                  */
+#define  ASCII_CHAR_DIGIT_THREE                         0x33    /* '3'                                                  */
+#define  ASCII_CHAR_DIGIT_FOUR                          0x34    /* '4'                                                  */
+#define  ASCII_CHAR_DIGIT_FIVE                          0x35    /* '5'                                                  */
+#define  ASCII_CHAR_DIGIT_SIX                           0x36    /* '6'                                                  */
+#define  ASCII_CHAR_DIGIT_SEVEN                         0x37    /* '7'                                                  */
+#define  ASCII_CHAR_DIGIT_EIGHT                         0x38    /* '8'                                                  */
+#define  ASCII_CHAR_DIGIT_NINE                          0x39    /* '9'                                                  */
+
+#define  ASCII_CHAR_DIG_ZERO                            ASCII_CHAR_DIGIT_ZERO
+#define  ASCII_CHAR_DIG_ONE                             ASCII_CHAR_DIGIT_ONE
+#define  ASCII_CHAR_DIG_TWO                             ASCII_CHAR_DIGIT_TWO
+#define  ASCII_CHAR_DIG_THREE                           ASCII_CHAR_DIGIT_THREE
+#define  ASCII_CHAR_DIG_FOUR                            ASCII_CHAR_DIGIT_FOUR
+#define  ASCII_CHAR_DIG_FIVE                            ASCII_CHAR_DIGIT_FIVE
+#define  ASCII_CHAR_DIG_SIX                             ASCII_CHAR_DIGIT_SIX
+#define  ASCII_CHAR_DIG_SEVEN                           ASCII_CHAR_DIGIT_SEVEN
+#define  ASCII_CHAR_DIG_EIGHT                           ASCII_CHAR_DIGIT_EIGHT
+#define  ASCII_CHAR_DIG_NINE                            ASCII_CHAR_DIGIT_NINE
+
+
+                                                                /* ------------ ASCII PUNCTUATION & SYMBOLS ----------- */
+#define  ASCII_CHAR_COLON                               0x3A    /* ':'                                                  */
+#define  ASCII_CHAR_SEMICOLON                           0x3B    /* ';'                                                  */
+#define  ASCII_CHAR_LESS_THAN_SIGN                      0x3C    /* '<'                                                  */
+#define  ASCII_CHAR_EQUALS_SIGN                         0x3D    /* '='                                                  */
+#define  ASCII_CHAR_GREATER_THAN_SIGN                   0x3E    /* '>'                                                  */
+#define  ASCII_CHAR_QUESTION_MARK                       0x3F    /* '\?'                                                 */
+#define  ASCII_CHAR_COMMERCIAL_AT                       0x40    /* '@'                                                  */
+
+#define  ASCII_CHAR_AT_SIGN                             ASCII_CHAR_COMMERCIAL_AT
+
+
+                                                                /* ------------- UPPERCASE LATIN ALPHABET ------------- */
+#define  ASCII_CHAR_LATIN_UPPER_A                       0x41    /* 'A'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_B                       0x42    /* 'B'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_C                       0x43    /* 'C'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_D                       0x44    /* 'D'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_E                       0x45    /* 'E'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_F                       0x46    /* 'F'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_G                       0x47    /* 'G'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_H                       0x48    /* 'H'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_I                       0x49    /* 'I'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_J                       0x4A    /* 'J'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_K                       0x4B    /* 'K'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_L                       0x4C    /* 'L'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_M                       0x4D    /* 'M'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_N                       0x4E    /* 'N'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_O                       0x4F    /* 'O'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_P                       0x50    /* 'P'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_Q                       0x51    /* 'Q'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_R                       0x52    /* 'R'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_S                       0x53    /* 'S'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_T                       0x54    /* 'T'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_U                       0x55    /* 'U'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_V                       0x56    /* 'V'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_W                       0x57    /* 'W'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_X                       0x58    /* 'X'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_Y                       0x59    /* 'Y'                                                  */
+#define  ASCII_CHAR_LATIN_UPPER_Z                       0x5A    /* 'Z'                                                  */
+
+
+                                                                /* ------------ ASCII PUNCTUATION & SYMBOLS ----------- */
+#define  ASCII_CHAR_LEFT_SQUARE_BRACKET                 0x5B    /* '['                                                  */
+#define  ASCII_CHAR_REVERSE_SOLIDUS                     0x5C    /* '\\'                                                 */
+#define  ASCII_CHAR_RIGHT_SQUARE_BRACKET                0x5D    /* ']'                                                  */
+#define  ASCII_CHAR_CIRCUMFLEX_ACCENT                   0x5E    /* '^'                                                  */
+#define  ASCII_CHAR_LOW_LINE                            0x5F    /* '_'                                                  */
+#define  ASCII_CHAR_GRAVE_ACCENT                        0x60    /* '`'                                                  */
+
+#define  ASCII_CHAR_BRACKET_SQUARE_LEFT                 ASCII_CHAR_LEFT_SQUARE_BRACKET
+#define  ASCII_CHAR_BRACKET_SQUARE_RIGHT                ASCII_CHAR_RIGHT_SQUARE_BRACKET
+
+
+                                                                /* ------------- LOWERCASE LATIN ALPHABET ------------- */
+#define  ASCII_CHAR_LATIN_LOWER_A                       0x61    /* 'a'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_B                       0x62    /* 'b'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_C                       0x63    /* 'c'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_D                       0x64    /* 'd'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_E                       0x65    /* 'e'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_F                       0x66    /* 'f'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_G                       0x67    /* 'g'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_H                       0x68    /* 'h'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_I                       0x69    /* 'i'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_J                       0x6A    /* 'j'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_K                       0x6B    /* 'k'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_L                       0x6C    /* 'l'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_M                       0x6D    /* 'm'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_N                       0x6E    /* 'n'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_O                       0x6F    /* 'o'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_P                       0x70    /* 'p'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_Q                       0x71    /* 'q'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_R                       0x72    /* 'r'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_S                       0x73    /* 's'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_T                       0x74    /* 't'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_U                       0x75    /* 'u'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_V                       0x76    /* 'v'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_W                       0x77    /* 'w'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_X                       0x78    /* 'x'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_Y                       0x79    /* 'y'                                                  */
+#define  ASCII_CHAR_LATIN_LOWER_Z                       0x7A    /* 'z'                                                  */
+
+
+                                                                /* ------------ ASCII PUNCTUATION & SYMBOLS ----------- */
+#define  ASCII_CHAR_LEFT_CURLY_BRACKET                  0x7B    /* '{'                                                  */
+#define  ASCII_CHAR_VERTICAL_LINE                       0x7C    /* '|'                                                  */
+#define  ASCII_CHAR_RIGHT_CURLY_BRACKET                 0x7D    /* '}'                                                  */
+#define  ASCII_CHAR_TILDE                               0x7E    /* '~'                                                  */
+
+#define  ASCII_CHAR_BRACKET_CURLY_LEFT                  ASCII_CHAR_LEFT_CURLY_BRACKET
+#define  ASCII_CHAR_BRACKET_CURLY_RIGHT                 ASCII_CHAR_RIGHT_CURLY_BRACKET
+
+
+                                                                /* ---------------- CONTROL CHARACTERS ---------------- */
+#define  ASCII_CHAR_DELETE                              0x7F
+
+#define  ASCII_CHAR_DEL                                 ASCII_CHAR_DELETE
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               ASCII CHARACTER CLASSIFICATION MACRO's
+*
+* Note(s) : (1) ISO/IEC 9899:TC2, Section 7.4.1.(1) states that "character classification functions ...
+*               return nonzero (true) if and only if the value of the argument 'c' conforms to ... the
+*               description of the function."
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IS_DIG()
+*
+* Description : Determine whether a character is a decimal-digit character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a decimal-digit character.
+*
+*               DEF_NO,     if character is NOT a decimal-digit character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.5.(2)  states that "isdigit()  ... tests for any
+*                   decimal-digit character".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_DIG(c)               ((((c) >= ASCII_CHAR_DIG_ZERO) && ((c) <= ASCII_CHAR_DIG_NINE)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                         ASCII_IS_DIG_OCT()
+*
+* Description : Determine whether a character is an octal-digit character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     an octal-digit character.
+*
+*               DEF_NO,     if character is NOT an octal-digit character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_DIG_OCT(c)          ((((c) >= ASCII_CHAR_DIG_ZERO) && ((c) <= ASCII_CHAR_DIG_SEVEN)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                         ASCII_IS_DIG_HEX()
+*
+* Description : Determine whether a character is a hexadecimal-digit character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a hexadecimal-digit character.
+*
+*               DEF_NO,     if character is NOT a hexadecimal-digit character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.12.(2) states that "isxdigit() ... tests for any
+*                   hexadecimal-digit character".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_DIG_HEX(c)          (((((c) >= ASCII_CHAR_DIG_ZERO     ) && ((c) <= ASCII_CHAR_DIG_NINE     )) || \
+                                        (((c) >= ASCII_CHAR_LATIN_UPPER_A) && ((c) <= ASCII_CHAR_LATIN_UPPER_F)) || \
+                                        (((c) >= ASCII_CHAR_LATIN_LOWER_A) && ((c) <= ASCII_CHAR_LATIN_LOWER_F))) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_IS_LOWER()
+*
+* Description : Determine whether a character is a lowercase alphabetic character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a lowercase alphabetic character.
+*
+*               DEF_NO,     if character is NOT a lowercase alphabetic character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.7.(2)  states that "islower() returns true only for
+*                   the lowercase letters".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_LOWER(c)             ((((c) >= ASCII_CHAR_LATIN_LOWER_A) && ((c) <= ASCII_CHAR_LATIN_LOWER_Z)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_IS_UPPER()
+*
+* Description : Determine whether a character is an uppercase alphabetic character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     an uppercase alphabetic character.
+*
+*               DEF_NO,     if character is NOT an uppercase alphabetic character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.11.(2) states that "isupper() returns true only for
+*                   the uppercase letters".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_UPPER(c)             ((((c) >= ASCII_CHAR_LATIN_UPPER_A) && ((c) <= ASCII_CHAR_LATIN_UPPER_Z)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_IS_ALPHA()
+*
+* Description : Determine whether a character is an alphabetic character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     an alphabetic character.
+*
+*               DEF_NO,     if character is NOT an alphabetic character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.2.(2) states that "isalpha() returns true only for the
+*                   characters for which isupper() or islower() is true".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_ALPHA(c)             ((((ASCII_IS_UPPER(c)) == DEF_YES) || \
+                                         ((ASCII_IS_LOWER(c)) == DEF_YES)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                        ASCII_IS_ALPHA_NUM()
+*
+* Description : Determine whether a character is an alphanumeric character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     an alphanumeric character.
+*
+*               DEF_NO,     if character is NOT an alphanumeric character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.1.(2) states that "isalnum() ... tests for any character
+*                   for which isalpha() or isdigit() is true".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_ALPHA_NUM(c)         ((((ASCII_IS_ALPHA(c)) == DEF_YES) || \
+                                         ((ASCII_IS_DIG  (c)) == DEF_YES)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_IS_BLANK()
+*
+* Description : Determine whether a character is a standard blank character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a standard blank character.
+*
+*               DEF_NO,     if character is NOT a standard blank character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.1.3.(2) states that "isblank() returns true only for
+*                       the standard blank characters".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.1.3.(2) defines "the standard blank characters" as
+*                       the "space (' '), and horizontal tab ('\t')".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_BLANK(c)             ((((c) == ASCII_CHAR_SPACE) || ((c) == ASCII_CHAR_HT)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_IS_SPACE()
+*
+* Description : Determine whether a character is a white-space character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a white-space character.
+*
+*               DEF_NO,     if character is NOT a white-space character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.1.10.(2) states that "isspace() returns true only
+*                       for the standard white-space characters".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.1.10.(2) defines "the standard white-space characters"
+*                       as the "space (' '), form feed ('\f'), new-line ('\n'), carriage return ('\r'),
+*                       horizontal tab ('\t'), and vertical tab ('\v')".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_SPACE(c)             ((((c) == ASCII_CHAR_SPACE) || ((c) == ASCII_CHAR_CR) || \
+                                         ((c) == ASCII_CHAR_LF   ) || ((c) == ASCII_CHAR_FF) || \
+                                         ((c) == ASCII_CHAR_HT   ) || ((c) == ASCII_CHAR_VT)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_IS_PRINT()
+*
+* Description : Determine whether a character is a printing character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a printing character.
+*
+*               DEF_NO,     if character is NOT a printing character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.1.8.(2) states that "isprint() ... tests for any
+*                       printing character including space (' ')".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.(3), Note 169, states that in "the seven-bit US
+*                       ASCII character set, the printing characters are those whose values lie from
+*                       0x20 (space) through 0x7E (tilde)".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_PRINT(c)             ((((c) >= ASCII_CHAR_SPACE) && ((c) <= ASCII_CHAR_TILDE)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_IS_GRAPH()
+*
+* Description : Determine whether a character is any printing character except a space character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a graphic character.
+*
+*               DEF_NO,     if character is NOT a graphic character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.1.6.(2) states that "isgraph() ... tests for any
+*                       printing character except space (' ')".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.(3), Note 169, states that in "the seven-bit US
+*                       ASCII character set, the printing characters are those whose values lie from
+*                       0x20 (space) through 0x7E (tilde)".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_GRAPH(c)             ((((c) >= ASCII_CHAR_EXCLAMATION_MARK) && ((c) <= ASCII_CHAR_TILDE)) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_IS_PUNCT()
+*
+* Description : Determine whether a character is a punctuation character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a punctuation character.
+*
+*               DEF_NO,  if character is NOT a punctuation character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) ISO/IEC 9899:TC2, Section 7.4.1.9.(2) states that "ispunct() returns true for every
+*                   printing character for which neither isspace() nor isalnum() is true".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_PUNCT(c)              ((((c > ASCII_CHAR_SPACE)         && (c < ASCII_CHAR_DIGIT_ZERO))    || \
+                                          ((c > ASCII_CHAR_DIGIT_NINE)    && (c < ASCII_CHAR_LATIN_UPPER_A)) || \
+                                          ((c > ASCII_CHAR_LATIN_UPPER_Z) && (c < ASCII_CHAR_LATIN_LOWER_A)) || \
+                                          ((c > ASCII_CHAR_LATIN_LOWER_Z) && (c < ASCII_CHAR_DELETE))) ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                           ASCII_IS_CTRL()
+*
+* Description : Determine whether a character is a control character.
+*
+* Argument(s) : c           Character to examine.
+*
+* Return(s)   : DEF_YES, if character is     a control character.
+*
+*               DEF_NO,     if character is NOT a control character.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.1.4.(2) states that "iscntrl() ... tests for any
+*                       control character".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.(3), Note 169, states that in "the seven-bit US
+*                       ASCII character set, ... the control characters are those whose values lie from
+*                       0 (NUL) through 0x1F (US), and the character 0x7F (DEL)".
+*********************************************************************************************************
+*/
+
+#define  ASCII_IS_CTRL(c)             (((((CPU_INT08S)(c) >= ASCII_CHAR_NULL  ) && ((c) <= ASCII_CHAR_IS1)) || \
+                                                                                   ((c) == ASCII_CHAR_DEL))  ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                ASCII CHARACTER CASE MAPPING MACRO's
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          ASCII_TO_LOWER()
+*
+* Description : Convert uppercase alphabetic character to its corresponding lowercase alphabetic character.
+*
+* Argument(s) : c           Character to convert.
+*
+* Return(s)   : Lowercase equivalent of 'c', if character 'c' is an uppercase character (see Note #1b1).
+*
+*               Character 'c',               otherwise                                  (see Note #1b2).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.2.1.(2) states that "tolower() ... converts an
+*                       uppercase letter to a corresponding lowercase letter".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.2.1.(3) states that :
+*
+*                       (1) (A) "if the argument is a character for which isupper() is true and there are
+*                                one or more corresponding characters ... for which islower() is true," ...
+*                           (B) "tolower() ... returns one of the corresponding characters;" ...
+*
+*                       (2) "otherwise, the argument is returned unchanged."
+*********************************************************************************************************
+*/
+
+#define  ASCII_TO_LOWER(c)              (((ASCII_IS_UPPER(c)) == DEF_YES) ? ((c) + (ASCII_CHAR_LATIN_LOWER_A - ASCII_CHAR_LATIN_UPPER_A)) : (c))
+
+
+/*
+*********************************************************************************************************
+*                                          ASCII_TO_UPPER()
+*
+* Description : Convert lowercase alphabetic character to its corresponding uppercase alphabetic character.
+*
+* Argument(s) : c           Character to convert.
+*
+* Return(s)   : Uppercase equivalent of 'c', if character 'c' is a lowercase character (see Note #1b1).
+*
+*               Character 'c',               otherwise                                 (see Note #1b2).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) ISO/IEC 9899:TC2, Section 7.4.2.2.(2) states that "toupper() ... converts a
+*                       lowercase letter to a corresponding uppercase letter".
+*
+*                   (b) ISO/IEC 9899:TC2, Section 7.4.2.2.(3) states that :
+*
+*                       (1) (A) "if the argument is a character for which islower() is true and there are
+*                                one or more corresponding characters ... for which isupper() is true," ...
+*                           (B) "toupper() ... returns one of the corresponding characters;" ...
+*
+*                       (2) "otherwise, the argument is returned unchanged."
+*********************************************************************************************************
+*/
+
+#define  ASCII_TO_UPPER(c)              (((ASCII_IS_LOWER(c)) == DEF_YES) ? ((c) - (ASCII_CHAR_LATIN_LOWER_A - ASCII_CHAR_LATIN_UPPER_A)) : (c))
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ASCII_IsAlpha   (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsAlphaNum(CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsLower   (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsUpper   (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsDig     (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsDigOct  (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsDigHex  (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsBlank   (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsSpace   (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsPrint   (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsGraph   (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsPunct   (CPU_CHAR  c);
+
+CPU_BOOLEAN  ASCII_IsCtrl    (CPU_CHAR  c);
+
+
+CPU_CHAR     ASCII_ToLower   (CPU_CHAR  c);
+
+CPU_CHAR     ASCII_ToUpper   (CPU_CHAR  c);
+
+
+CPU_BOOLEAN  ASCII_Cmp       (CPU_CHAR  c1,
+                              CPU_CHAR  c2);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'lib_ascii.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of lib ascii module include.                     */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/lib_def.h b/src/ucos_v1_42/micrium_source/uC-LIB/lib_def.h
new file mode 100644
index 0000000..cbca5d5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/lib_def.h
@@ -0,0 +1,1372 @@
+/*
+*********************************************************************************************************
+*                                                uC/LIB
+*                                        CUSTOM LIBRARY MODULES
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/LIB is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     CORE CUSTOM LIBRARY MODULE
+*
+* Filename      : lib_def.h
+* Version       : V1.38.01
+* Programmer(s) : ITJ
+*                 FBJ
+*                 JFD
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/CPU V1.29.00
+*
+*
+*                 (2) NO compiler-supplied standard library functions are used in library or product software.
+*
+*                     (a) ALL standard library functions are implemented in the custom library modules :
+*
+*                         (1) \\lib_*.*
+*
+*                         (2) \\Ports\\\lib*_a.*
+*
+*                               where
+*                                             directory path for custom library software
+*                                                                  directory name for specific processor (CPU)
+*                                                             directory name for specific compiler
+*
+*                     (b) Product-specific library functions are implemented in individual products.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This library definition header file is protected from multiple pre-processor inclusion
+*               through use of the library definition module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  LIB_DEF_MODULE_PRESENT
+#define  LIB_DEF_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                CUSTOM LIBRARY MODULE VERSION NUMBER
+*
+* Note(s) : (1) (a) The custom library module software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*/
+
+#define  LIB_VERSION                                   13801u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The custom library software files are located in the following directories :
+*
+*               (a) \\lib_*.*
+*
+*                       where
+*                                     directory path for custom library software
+*
+*           (2) CPU-configuration  software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) (1) '\\'                  directory         See Note #2a
+*                   (2) '\\\\' directory         See Note #2b
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                          STANDARD DEFINES
+*********************************************************************************************************
+*/
+
+#define  DEF_NULL                                          0
+
+
+                                                                /* ----------------- BOOLEAN DEFINES ------------------ */
+#define  DEF_FALSE                                         0u
+#define  DEF_TRUE                                          1u
+
+#define  DEF_NO                                            0u
+#define  DEF_YES                                           1u
+
+#define  DEF_DISABLED                                      0u
+#define  DEF_ENABLED                                       1u
+
+#define  DEF_INACTIVE                                      0u
+#define  DEF_ACTIVE                                        1u
+
+#define  DEF_INVALID                                       0u
+#define  DEF_VALID                                         1u
+
+#define  DEF_OFF                                           0u
+#define  DEF_ON                                            1u
+
+#define  DEF_CLR                                           0u
+#define  DEF_SET                                           1u
+
+#define  DEF_FAIL                                          0u
+#define  DEF_OK                                            1u
+
+
+                                                                /* ------------------- BIT DEFINES -------------------- */
+#define  DEF_BIT_NONE                                   0x00u
+
+#define  DEF_BIT_00                                     0x01u
+#define  DEF_BIT_01                                     0x02u
+#define  DEF_BIT_02                                     0x04u
+#define  DEF_BIT_03                                     0x08u
+#define  DEF_BIT_04                                     0x10u
+#define  DEF_BIT_05                                     0x20u
+#define  DEF_BIT_06                                     0x40u
+#define  DEF_BIT_07                                     0x80u
+
+#define  DEF_BIT_08                                   0x0100u
+#define  DEF_BIT_09                                   0x0200u
+#define  DEF_BIT_10                                   0x0400u
+#define  DEF_BIT_11                                   0x0800u
+#define  DEF_BIT_12                                   0x1000u
+#define  DEF_BIT_13                                   0x2000u
+#define  DEF_BIT_14                                   0x4000u
+#define  DEF_BIT_15                                   0x8000u
+
+#define  DEF_BIT_16                               0x00010000u
+#define  DEF_BIT_17                               0x00020000u
+#define  DEF_BIT_18                               0x00040000u
+#define  DEF_BIT_19                               0x00080000u
+#define  DEF_BIT_20                               0x00100000u
+#define  DEF_BIT_21                               0x00200000u
+#define  DEF_BIT_22                               0x00400000u
+#define  DEF_BIT_23                               0x00800000u
+
+#define  DEF_BIT_24                               0x01000000u
+#define  DEF_BIT_25                               0x02000000u
+#define  DEF_BIT_26                               0x04000000u
+#define  DEF_BIT_27                               0x08000000u
+#define  DEF_BIT_28                               0x10000000u
+#define  DEF_BIT_29                               0x20000000u
+#define  DEF_BIT_30                               0x40000000u
+#define  DEF_BIT_31                               0x80000000u
+#define  DEF_BIT_32                       0x0000000100000000u
+#define  DEF_BIT_33                       0x0000000200000000u
+#define  DEF_BIT_34                       0x0000000400000000u
+#define  DEF_BIT_35                       0x0000000800000000u
+#define  DEF_BIT_36                       0x0000001000000000u
+#define  DEF_BIT_37                       0x0000002000000000u
+#define  DEF_BIT_38                       0x0000004000000000u
+#define  DEF_BIT_39                       0x0000008000000000u
+
+#define  DEF_BIT_40                       0x0000010000000000u
+#define  DEF_BIT_41                       0x0000020000000000u
+#define  DEF_BIT_42                       0x0000040000000000u
+#define  DEF_BIT_43                       0x0000080000000000u
+#define  DEF_BIT_44                       0x0000100000000000u
+#define  DEF_BIT_45                       0x0000200000000000u
+#define  DEF_BIT_46                       0x0000400000000000u
+#define  DEF_BIT_47                       0x0000800000000000u
+
+#define  DEF_BIT_48                       0x0001000000000000u
+#define  DEF_BIT_49                       0x0002000000000000u
+#define  DEF_BIT_50                       0x0004000000000000u
+#define  DEF_BIT_51                       0x0008000000000000u
+#define  DEF_BIT_52                       0x0010000000000000u
+#define  DEF_BIT_53                       0x0020000000000000u
+#define  DEF_BIT_54                       0x0040000000000000u
+#define  DEF_BIT_55                       0x0080000000000000u
+
+#define  DEF_BIT_56                       0x0100000000000000u
+#define  DEF_BIT_57                       0x0200000000000000u
+#define  DEF_BIT_58                       0x0400000000000000u
+#define  DEF_BIT_59                       0x0800000000000000u
+#define  DEF_BIT_60                       0x1000000000000000u
+#define  DEF_BIT_61                       0x2000000000000000u
+#define  DEF_BIT_62                       0x4000000000000000u
+#define  DEF_BIT_63                       0x8000000000000000u
+
+
+                                                                /* ------------------ ALIGN DEFINES ------------------- */
+#define  DEF_ALIGN_MAX_NBR_OCTETS                       4096u
+
+
+                                                                /* ------------------ OCTET DEFINES ------------------- */
+#define  DEF_OCTET_NBR_BITS                                8u
+#define  DEF_OCTET_MASK                                 0xFFu
+
+#define  DEF_OCTET_TO_BIT_NBR_BITS                         3u
+#define  DEF_OCTET_TO_BIT_SHIFT                          DEF_OCTET_TO_BIT_NBR_BITS
+#define  DEF_OCTET_TO_BIT_MASK                          0x07u
+
+
+#define  DEF_NIBBLE_NBR_BITS                               4u
+#define  DEF_NIBBLE_MASK                                0x0Fu
+
+
+                                                                /* --------------- NUMBER BASE DEFINES ---------------- */
+#define  DEF_NBR_BASE_BIN                                  2u
+#define  DEF_NBR_BASE_OCT                                  8u
+#define  DEF_NBR_BASE_DEC                                 10u
+#define  DEF_NBR_BASE_HEX                                 16u
+
+
+                                                                /* ----------------- INTEGER DEFINES ------------------ */
+#define  DEF_INT_08_NBR_BITS                               8u
+#define  DEF_INT_08_MASK                                0xFFu
+
+#define  DEF_INT_08U_MIN_VAL                               0u
+#define  DEF_INT_08U_MAX_VAL                             255u
+
+#define  DEF_INT_08S_MIN_VAL_ONES_CPL                  (-127)
+#define  DEF_INT_08S_MAX_VAL_ONES_CPL                    127
+
+#define  DEF_INT_08S_MIN_VAL                            (DEF_INT_08S_MIN_VAL_ONES_CPL - 1)
+#define  DEF_INT_08S_MAX_VAL                             DEF_INT_08S_MAX_VAL_ONES_CPL
+
+#define  DEF_INT_08U_NBR_DIG_MIN                           1u
+#define  DEF_INT_08U_NBR_DIG_MAX                           3u
+
+#define  DEF_INT_08S_NBR_DIG_MIN                           3u
+#define  DEF_INT_08S_NBR_DIG_MAX                           3u
+
+
+
+#define  DEF_INT_16_NBR_BITS                              16u
+#define  DEF_INT_16_MASK                              0xFFFFu
+
+#define  DEF_INT_16U_MIN_VAL                               0u
+#define  DEF_INT_16U_MAX_VAL                           65535u
+
+#define  DEF_INT_16S_MIN_VAL_ONES_CPL                (-32767)
+#define  DEF_INT_16S_MAX_VAL_ONES_CPL                  32767
+
+#define  DEF_INT_16S_MIN_VAL                            (DEF_INT_16S_MIN_VAL_ONES_CPL - 1)
+#define  DEF_INT_16S_MAX_VAL                             DEF_INT_16S_MAX_VAL_ONES_CPL
+
+#define  DEF_INT_16U_NBR_DIG_MIN                           1u
+#define  DEF_INT_16U_NBR_DIG_MAX                           5u
+
+#define  DEF_INT_16S_NBR_DIG_MIN                           5u
+#define  DEF_INT_16S_NBR_DIG_MAX                           5u
+
+
+
+#define  DEF_INT_32_NBR_BITS                              32u
+#define  DEF_INT_32_MASK                          0xFFFFFFFFu
+
+#define  DEF_INT_32U_MIN_VAL                               0u
+#define  DEF_INT_32U_MAX_VAL                      4294967295u
+
+#define  DEF_INT_32S_MIN_VAL_ONES_CPL           (-2147483647)
+#define  DEF_INT_32S_MAX_VAL_ONES_CPL             2147483647
+
+#define  DEF_INT_32S_MIN_VAL                            (DEF_INT_32S_MIN_VAL_ONES_CPL - 1)
+#define  DEF_INT_32S_MAX_VAL                             DEF_INT_32S_MAX_VAL_ONES_CPL
+
+#define  DEF_INT_32U_NBR_DIG_MIN                           1u
+#define  DEF_INT_32U_NBR_DIG_MAX                          10u
+
+#define  DEF_INT_32S_NBR_DIG_MIN                          10u
+#define  DEF_INT_32S_NBR_DIG_MAX                          10u
+
+
+
+#define  DEF_INT_64_NBR_BITS                              64u
+#define  DEF_INT_64_MASK                  0xFFFFFFFFFFFFFFFFu
+
+#define  DEF_INT_64U_MIN_VAL                               0u
+#define  DEF_INT_64U_MAX_VAL            18446744073709551615u
+
+#define  DEF_INT_64S_MIN_VAL_ONES_CPL  (-9223372036854775807)
+#define  DEF_INT_64S_MAX_VAL_ONES_CPL    9223372036854775807
+
+#define  DEF_INT_64S_MIN_VAL                            (DEF_INT_64S_MIN_VAL_ONES_CPL - 1)
+#define  DEF_INT_64S_MAX_VAL                             DEF_INT_64S_MAX_VAL_ONES_CPL
+
+#define  DEF_INT_64U_NBR_DIG_MIN                           1u
+#define  DEF_INT_64U_NBR_DIG_MAX                          20u
+
+#define  DEF_INT_64S_NBR_DIG_MIN                          19u
+#define  DEF_INT_64S_NBR_DIG_MAX                          19u
+
+
+                                                                /* --------------- CPU INTEGER DEFINES ---------------- */
+#define  DEF_INT_CPU_NBR_BITS                           (CPU_CFG_DATA_SIZE     * DEF_OCTET_NBR_BITS)
+#define  DEF_INT_CPU_NBR_BITS_MAX                       (CPU_CFG_DATA_SIZE_MAX * DEF_OCTET_NBR_BITS)
+
+
+
+#if     (DEF_INT_CPU_NBR_BITS == DEF_INT_08_NBR_BITS)
+
+
+#define  DEF_INT_CPU_MASK                                DEF_INT_08_MASK
+
+#define  DEF_INT_CPU_U_MIN_VAL                           DEF_INT_08U_MIN_VAL
+#define  DEF_INT_CPU_U_MAX_VAL                           DEF_INT_08U_MAX_VAL
+
+#define  DEF_INT_CPU_S_MIN_VAL                           DEF_INT_08S_MIN_VAL
+#define  DEF_INT_CPU_S_MAX_VAL                           DEF_INT_08S_MAX_VAL
+
+#define  DEF_INT_CPU_S_MIN_VAL_ONES_CPL                  DEF_INT_08S_MIN_VAL_ONES_CPL
+#define  DEF_INT_CPU_S_MAX_VAL_ONES_CPL                  DEF_INT_08S_MAX_VAL_ONES_CPL
+
+
+
+#elif   (DEF_INT_CPU_NBR_BITS == DEF_INT_16_NBR_BITS)
+
+
+#define  DEF_INT_CPU_MASK                                DEF_INT_16_MASK
+
+#define  DEF_INT_CPU_U_MIN_VAL                           DEF_INT_16U_MIN_VAL
+#define  DEF_INT_CPU_U_MAX_VAL                           DEF_INT_16U_MAX_VAL
+
+#define  DEF_INT_CPU_S_MIN_VAL                           DEF_INT_16S_MIN_VAL
+#define  DEF_INT_CPU_S_MAX_VAL                           DEF_INT_16S_MAX_VAL
+
+#define  DEF_INT_CPU_S_MIN_VAL_ONES_CPL                  DEF_INT_16S_MIN_VAL_ONES_CPL
+#define  DEF_INT_CPU_S_MAX_VAL_ONES_CPL                  DEF_INT_16S_MAX_VAL_ONES_CPL
+
+
+
+#elif   (DEF_INT_CPU_NBR_BITS == DEF_INT_32_NBR_BITS)
+
+
+#define  DEF_INT_CPU_MASK                                DEF_INT_32_MASK
+
+#define  DEF_INT_CPU_U_MIN_VAL                           DEF_INT_32U_MIN_VAL
+#define  DEF_INT_CPU_U_MAX_VAL                           DEF_INT_32U_MAX_VAL
+
+#define  DEF_INT_CPU_S_MIN_VAL                           DEF_INT_32S_MIN_VAL
+#define  DEF_INT_CPU_S_MAX_VAL                           DEF_INT_32S_MAX_VAL
+
+#define  DEF_INT_CPU_S_MIN_VAL_ONES_CPL                  DEF_INT_32S_MIN_VAL_ONES_CPL
+#define  DEF_INT_CPU_S_MAX_VAL_ONES_CPL                  DEF_INT_32S_MAX_VAL_ONES_CPL
+
+
+
+#elif   (DEF_INT_CPU_NBR_BITS == DEF_INT_64_NBR_BITS)
+
+
+#define  DEF_INT_CPU_MASK                                DEF_INT_64_MASK
+
+#define  DEF_INT_CPU_U_MIN_VAL                           DEF_INT_64U_MIN_VAL
+#define  DEF_INT_CPU_U_MAX_VAL                           DEF_INT_64U_MAX_VAL
+
+#define  DEF_INT_CPU_S_MIN_VAL                           DEF_INT_64S_MIN_VAL
+#define  DEF_INT_CPU_S_MAX_VAL                           DEF_INT_64S_MAX_VAL
+
+#define  DEF_INT_CPU_S_MIN_VAL_ONES_CPL                  DEF_INT_64S_MIN_VAL_ONES_CPL
+#define  DEF_INT_CPU_S_MAX_VAL_ONES_CPL                  DEF_INT_64S_MAX_VAL_ONES_CPL
+
+
+
+#else
+
+#error  "CPU_CFG_DATA_SIZE  illegally #defined in 'cpu.h'      "
+#error  "                   [See 'cpu.h  CONFIGURATION ERRORS']"
+
+#endif
+
+
+                                                                /* ------------------- TIME DEFINES ------------------- */
+#define  DEF_TIME_NBR_DAY_PER_WK                           7u
+#define  DEF_TIME_NBR_DAY_PER_YR                         365u
+#define  DEF_TIME_NBR_DAY_PER_YR_LEAP                    366u
+
+#define  DEF_TIME_NBR_HR_PER_DAY                          24u
+#define  DEF_TIME_NBR_HR_PER_WK                         (DEF_TIME_NBR_HR_PER_DAY  * DEF_TIME_NBR_DAY_PER_WK     )
+#define  DEF_TIME_NBR_HR_PER_YR                         (DEF_TIME_NBR_HR_PER_DAY  * DEF_TIME_NBR_DAY_PER_YR     )
+#define  DEF_TIME_NBR_HR_PER_YR_LEAP                    (DEF_TIME_NBR_HR_PER_DAY  * DEF_TIME_NBR_DAY_PER_YR_LEAP)
+
+#define  DEF_TIME_NBR_MIN_PER_HR                          60u
+#define  DEF_TIME_NBR_MIN_PER_DAY                       (DEF_TIME_NBR_MIN_PER_HR  * DEF_TIME_NBR_HR_PER_DAY     )
+#define  DEF_TIME_NBR_MIN_PER_WK                        (DEF_TIME_NBR_MIN_PER_DAY * DEF_TIME_NBR_DAY_PER_WK     )
+#define  DEF_TIME_NBR_MIN_PER_YR                        (DEF_TIME_NBR_MIN_PER_DAY * DEF_TIME_NBR_DAY_PER_YR     )
+#define  DEF_TIME_NBR_MIN_PER_YR_LEAP                   (DEF_TIME_NBR_MIN_PER_DAY * DEF_TIME_NBR_DAY_PER_YR_LEAP)
+
+#define  DEF_TIME_NBR_SEC_PER_MIN                         60u
+#define  DEF_TIME_NBR_SEC_PER_HR                        (DEF_TIME_NBR_SEC_PER_MIN * DEF_TIME_NBR_MIN_PER_HR     )
+#define  DEF_TIME_NBR_SEC_PER_DAY                       (DEF_TIME_NBR_SEC_PER_HR  * DEF_TIME_NBR_HR_PER_DAY     )
+#define  DEF_TIME_NBR_SEC_PER_WK                        (DEF_TIME_NBR_SEC_PER_DAY * DEF_TIME_NBR_DAY_PER_WK     )
+#define  DEF_TIME_NBR_SEC_PER_YR                        (DEF_TIME_NBR_SEC_PER_DAY * DEF_TIME_NBR_DAY_PER_YR     )
+#define  DEF_TIME_NBR_SEC_PER_YR_LEAP                   (DEF_TIME_NBR_SEC_PER_DAY * DEF_TIME_NBR_DAY_PER_YR_LEAP)
+
+#define  DEF_TIME_NBR_mS_PER_SEC                        1000u
+#define  DEF_TIME_NBR_uS_PER_SEC                     1000000u
+#define  DEF_TIME_NBR_nS_PER_SEC                  1000000000u
+
+
+/*
+*********************************************************************************************************
+*                                             ERROR CODES
+*
+* Note(s) : (1) All library error codes are #define'd in 'lib_def.h';
+*********************************************************************************************************
+*/
+
+typedef enum lib_err {
+
+    LIB_ERR_NONE                            =         0u,
+
+    LIB_MEM_ERR_NONE                        =     10000u,
+    LIB_MEM_ERR_NULL_PTR                    =     10001u,       /* Ptr arg(s) passed NULL ptr(s).                       */
+
+    LIB_MEM_ERR_INVALID_MEM_SIZE            =     10100u,       /* Invalid mem     size.                                */
+    LIB_MEM_ERR_INVALID_MEM_ALIGN           =     10101u,       /* Invalid mem     align.                               */
+    LIB_MEM_ERR_INVALID_SEG_SIZE            =     10110u,       /* Invalid mem seg size.                                */
+    LIB_MEM_ERR_INVALID_SEG_OVERLAP         =     10111u,       /* Invalid mem seg overlaps other mem seg(s).           */
+    LIB_MEM_ERR_INVALID_SEG_EXISTS          =     10112u,       /* Invalid mem seg already exists.                      */
+    LIB_MEM_ERR_INVALID_POOL                =     10120u,       /* Invalid mem pool.                                    */
+    LIB_MEM_ERR_INVALID_BLK_NBR             =     10130u,       /* Invalid mem pool blk nbr.                            */
+    LIB_MEM_ERR_INVALID_BLK_SIZE            =     10131u,       /* Invalid mem pool blk size.                           */
+    LIB_MEM_ERR_INVALID_BLK_ALIGN           =     10132u,       /* Invalid mem pool blk align.                          */
+    LIB_MEM_ERR_INVALID_BLK_IX              =     10133u,       /* Invalid mem pool ix.                                 */
+    LIB_MEM_ERR_INVALID_BLK_ADDR            =     10135u,       /* Invalid mem pool blk addr.                           */
+    LIB_MEM_ERR_INVALID_BLK_ADDR_IN_POOL    =     10136u,       /* Mem pool blk addr already in mem pool.               */
+
+    LIB_MEM_ERR_SEG_EMPTY                   =     10200u,       /* Mem seg  empty; i.e. NO avail mem in seg.            */
+    LIB_MEM_ERR_SEG_OVF                     =     10201u,       /* Mem seg  ovf;   i.e. req'd mem ovfs rem mem in seg.  */
+    LIB_MEM_ERR_POOL_FULL                   =     10205u,       /* Mem pool full;  i.e. all mem blks avail in mem pool. */
+    LIB_MEM_ERR_POOL_EMPTY                  =     10206u,       /* Mem pool empty; i.e. NO  mem blks avail in mem pool. */
+    LIB_MEM_ERR_POOL_UNLIMITED              =     10207u,       /* Mem pool is unlimited.                               */
+
+    LIB_MEM_ERR_HEAP_EMPTY                  =     10210u,       /* Heap seg empty; i.e. NO avail mem in heap.           */
+    LIB_MEM_ERR_HEAP_OVF                    =     10211u,       /* Heap seg ovf;   i.e. req'd mem ovfs rem mem in heap. */
+    LIB_MEM_ERR_HEAP_NOT_FOUND              =     10215u        /* Heap seg NOT found.                                  */
+
+} LIB_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               TRACING
+*********************************************************************************************************
+*/
+
+                                                                /* Trace level, default to TRACE_LEVEL_OFF.             */
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                                   0u
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                                  1u
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                                   2u
+#endif
+
+#ifndef  TRACE_LEVEL_LOG
+#define  TRACE_LEVEL_LOG                                   3u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             BIT MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              DEF_BIT()
+*
+* Description : Create bit mask with single, specified bit set.
+*
+* Argument(s) : bit         Bit number of bit to set.
+*
+* Return(s)   : Bit mask with single, specified bit set.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'bit' SHOULD be a non-negative integer.
+*
+*               (2) (a) 'bit' values that overflow the target CPU &/or compiler environment (e.g. negative
+*                       or greater-than-CPU-data-size values) MAY generate compiler warnings &/or errors.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT(bit)                                                   (1u << (bit))
+
+
+/*
+*********************************************************************************************************
+*                                             DEF_BITxx()
+*
+* Description : Create bit mask of specified bit size with single, specified bit set.
+*
+* Argument(s) : bit         Bit number of bit to set.
+*
+* Return(s)   : Bit mask with single, specified bit set.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'bit' SHOULD be a non-negative integer.
+*
+*               (2) (a) 'bit' values that overflow the target CPU &/or compiler environment (e.g. negative
+*                       or greater-than-CPU-data-size values) MAY generate compiler warnings &/or errors.
+*
+*                   (b) To avoid overflowing any target CPU &/or compiler's integer data type, unsigned
+*                       bit constant '1' is cast to specified integer data type size.
+*
+*               (3) Ideally, DEF_BITxx() macro's should be named DEF_BIT_xx(); however, these names already
+*                   previously-released for bit constant #define's (see 'STANDARD DEFINES  BIT DEFINES').
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT08(bit)                        ((CPU_INT08U)((CPU_INT08U)1u  << (bit)))
+
+#define  DEF_BIT16(bit)                        ((CPU_INT16U)((CPU_INT16U)1u  << (bit)))
+
+#define  DEF_BIT32(bit)                        ((CPU_INT32U)((CPU_INT32U)1u  << (bit)))
+
+#define  DEF_BIT64(bit)                        ((CPU_INT64U)((CPU_INT64U)1u  << (bit)))
+
+
+/*
+*********************************************************************************************************
+*                                           DEF_BIT_MASK()
+*
+* Description : Shift a bit mask.
+*
+* Argument(s) : bit_mask    Bit mask to shift.
+*
+*               bit_shift   Number of bit positions to left-shift bit mask.
+*
+* Return(s)   : Shifted bit mask.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) 'bit_mask'  SHOULD be an unsigned    integer.
+*
+*                   (b) 'bit_shift' SHOULD be a non-negative integer.
+*
+*               (2) 'bit_shift' values that overflow the target CPU &/or compiler environment (e.g. negative
+*                   or greater-than-CPU-data-size values) MAY generate compiler warnings &/or errors.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_MASK(bit_mask, bit_shift)                                     ((bit_mask) << (bit_shift))
+
+
+/*
+*********************************************************************************************************
+*                                          DEF_BIT_MASK_xx()
+*
+* Description : Shift a bit mask of specified bit size.
+*
+* Argument(s) : bit_mask    Bit mask to shift.
+*
+*               bit_shift   Number of bit positions to left-shift bit mask.
+*
+* Return(s)   : Shifted bit mask.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) 'bit_mask'  SHOULD be an unsigned    integer.
+*
+*                   (b) 'bit_shift' SHOULD be a non-negative integer.
+*
+*               (2) 'bit_shift' values that overflow the target CPU &/or compiler environment (e.g. negative
+*                   or greater-than-CPU-data-size values) MAY generate compiler warnings &/or errors.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_MASK_08(bit_mask, bit_shift)         ((CPU_INT08U)((CPU_INT08U)(bit_mask) << (bit_shift)))
+
+#define  DEF_BIT_MASK_16(bit_mask, bit_shift)         ((CPU_INT16U)((CPU_INT16U)(bit_mask) << (bit_shift)))
+
+#define  DEF_BIT_MASK_32(bit_mask, bit_shift)         ((CPU_INT32U)((CPU_INT32U)(bit_mask) << (bit_shift)))
+
+#define  DEF_BIT_MASK_64(bit_mask, bit_shift)         ((CPU_INT64U)((CPU_INT64U)(bit_mask) << (bit_shift)))
+
+
+/*
+*********************************************************************************************************
+*                                           DEF_BIT_FIELD()
+*
+* Description : Create & shift a contiguous bit field.
+*
+* Argument(s) : bit_field   Number of contiguous bits to set in the bit field.
+*
+*               bit_shift   Number of bit positions   to left-shift bit field.
+*
+* Return(s)   : Shifted bit field.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'bit_field' & 'bit_shift' SHOULD be non-negative integers.
+*
+*               (2) (a) 'bit_field'/'bit_shift' values that overflow the target CPU &/or compiler
+*                       environment (e.g. negative or greater-than-CPU-data-size values) MAY generate
+*                       compiler warnings &/or errors.
+*
+*                   (b) To avoid overflowing any target CPU &/or compiler's integer data type, unsigned
+*                       bit constant '1' is suffixed with 'L'ong integer modifier.
+*
+*                       This may still be insufficient for CPUs &/or compilers that support 'long long'
+*                       integer data types, in which case 'LL' integer modifier should be suffixed.
+*                       However, since almost all 16- & 32-bit CPUs & compilers support 'long' integer
+*                       data types but many may NOT support 'long long' integer data types, only 'long'
+*                       integer data types & modifiers are supported.
+*
+*                       See also 'DEF_BIT_FIELD_xx()  Note #1b'.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_FIELD(bit_field, bit_shift)                                 ((((bit_field) >= DEF_INT_CPU_NBR_BITS) ? (DEF_INT_CPU_U_MAX_VAL)     \
+                                                                                                                     : (DEF_BIT(bit_field) - 1uL)) \
+                                                                                                                            << (bit_shift))
+
+/*
+*********************************************************************************************************
+*                                         DEF_BIT_FIELD_xx()
+*
+* Description : Create & shift a contiguous bit field of specified bit size.
+*
+* Argument(s) : bit_field   Number of contiguous bits to set in the bit field.
+*
+*               bit_shift   Number of bit positions   to left-shift bit field.
+*
+* Return(s)   : Shifted bit field.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'bit_field' & 'bit_shift' SHOULD be non-negative integers.
+*
+*               (2) (a) 'bit_field'/'bit_shift' values that overflow the target CPU &/or compiler
+*                       environment (e.g. negative or greater-than-CPU-data-size values) MAY generate
+*                       compiler warnings &/or errors.
+*
+*                   (b) To avoid overflowing any target CPU &/or compiler's integer data type, unsigned
+*                       bit constant '1' is cast to specified integer data type size.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_FIELD_08(bit_field, bit_shift)     ((CPU_INT08U)((((CPU_INT08U)(bit_field) >= (CPU_INT08U)DEF_INT_08_NBR_BITS) ? (CPU_INT08U)(DEF_INT_08U_MAX_VAL)                    \
+                                                                                                                                : (CPU_INT08U)(DEF_BIT08(bit_field) - (CPU_INT08U)1u)) \
+                                                                                                                                                     << (bit_shift)))
+
+#define  DEF_BIT_FIELD_16(bit_field, bit_shift)     ((CPU_INT16U)((((CPU_INT16U)(bit_field) >= (CPU_INT16U)DEF_INT_16_NBR_BITS) ? (CPU_INT16U)(DEF_INT_16U_MAX_VAL)                    \
+                                                                                                                                : (CPU_INT16U)(DEF_BIT16(bit_field) - (CPU_INT16U)1u)) \
+                                                                                                                                                     << (bit_shift)))
+
+#define  DEF_BIT_FIELD_32(bit_field, bit_shift)     ((CPU_INT32U)((((CPU_INT32U)(bit_field) >= (CPU_INT32U)DEF_INT_32_NBR_BITS) ? (CPU_INT32U)(DEF_INT_32U_MAX_VAL)                    \
+                                                                                                                                : (CPU_INT32U)(DEF_BIT32(bit_field) - (CPU_INT32U)1u)) \
+                                                                                                                                                     << (bit_shift)))
+
+#define  DEF_BIT_FIELD_64(bit_field, bit_shift)     ((CPU_INT64U)((((CPU_INT64U)(bit_field) >= (CPU_INT64U)DEF_INT_64_NBR_BITS) ? (CPU_INT64U)(DEF_INT_64U_MAX_VAL)                    \
+                                                                                                                                : (CPU_INT64U)(DEF_BIT64(bit_field) - (CPU_INT64U)1u)) \
+                                                                                                                                                     << (bit_shift)))
+
+
+/*
+*********************************************************************************************************
+*                                            DEF_BIT_SET()
+*
+* Description : Set specified bit(s) in a value.
+*
+* Argument(s) : val         Value to modify by setting specified bit(s).
+*
+*               mask        Mask of bits to set.
+*
+* Return(s)   : Modified value with specified bit(s) set.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'val' & 'mask' SHOULD be unsigned integers.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_SET(val, mask)                        ((val) = ((val) | (mask)))
+
+
+/*
+*********************************************************************************************************
+*                                          DEF_BIT_SET_xx()
+*
+* Description : Set specified bit(s) in a value of specified bit size.
+*
+* Argument(s) : val         Value to modify by setting specified bit(s).
+*
+*               mask        Mask of bits to set.
+*
+* Return(s)   : Modified value with specified bit(s) set.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'val' & 'mask' SHOULD be unsigned integers.
+*
+*               (2) These macros are deprecated and should be replaced by the DEF_BIT_SET macro.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_SET_08(val, mask)                     (CPU_INT08U)DEF_BIT_SET((val), (CPU_INT08U)(mask))
+
+#define  DEF_BIT_SET_16(val, mask)                     (CPU_INT16U)DEF_BIT_SET((val), (CPU_INT16U)(mask))
+
+#define  DEF_BIT_SET_32(val, mask)                     (CPU_INT32U)DEF_BIT_SET((val), (CPU_INT32U)(mask))
+
+#define  DEF_BIT_SET_64(val, mask)                     (CPU_INT64U)DEF_BIT_SET((val), (CPU_INT64U)(mask))
+
+
+/*
+*********************************************************************************************************
+*                                          DEF_BIT_CLR_xx()
+*
+* Description : Clear specified bit(s) in a value of specified bit size.
+*
+* Argument(s) : val         Value to modify by clearing specified bit(s).
+*
+*               mask        Mask of bits to clear.
+*
+* Return(s)   : Modified value with specified bit(s) clear.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'val' & 'mask' SHOULD be unsigned integers.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_CLR_08(val, mask)                     (CPU_INT08U)((val) = (((CPU_INT08U)val) & (~((CPU_INT08U)mask))))
+
+#define  DEF_BIT_CLR_16(val, mask)                     (CPU_INT16U)((val) = (((CPU_INT16U)val) & (~((CPU_INT16U)mask))))
+
+#define  DEF_BIT_CLR_32(val, mask)                     (CPU_INT32U)((val) = (((CPU_INT32U)val) & (~((CPU_INT32U)mask))))
+
+#define  DEF_BIT_CLR_64(val, mask)                     (CPU_INT64U)((val) = (((CPU_INT64U)val) & (~((CPU_INT64U)mask))))
+
+
+/*
+*********************************************************************************************************
+*                                            DEF_BIT_CLR()
+*
+* Description : Clear specified bit(s) in a value.
+*
+* Argument(s) : val         Value to modify by clearing specified bit(s).
+*
+*               mask        Mask of bits to clear.
+*
+* Return(s)   : Modified value with specified bit(s) clear.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'val' & 'mask' SHOULD be unsigned integers.
+*********************************************************************************************************
+*/
+
+#if     (CPU_CFG_DATA_SIZE_MAX == CPU_WORD_SIZE_08)
+
+#define  DEF_BIT_CLR(val, mask)                 ((sizeof(val) == CPU_WORD_SIZE_08) ? DEF_BIT_CLR_08(val, mask) : 0)
+
+
+#elif   (CPU_CFG_DATA_SIZE_MAX == CPU_WORD_SIZE_16)
+
+#define  DEF_BIT_CLR(val, mask)                 ((sizeof(val) == CPU_WORD_SIZE_08) ? DEF_BIT_CLR_08(val, mask) :   \
+                                                ((sizeof(val) == CPU_WORD_SIZE_16) ? DEF_BIT_CLR_16(val, mask) : 0))
+
+
+#elif   (CPU_CFG_DATA_SIZE_MAX == CPU_WORD_SIZE_32)
+
+#define  DEF_BIT_CLR(val, mask)                 ((sizeof(val) == CPU_WORD_SIZE_08) ? DEF_BIT_CLR_08(val, mask) :    \
+                                                ((sizeof(val) == CPU_WORD_SIZE_16) ? DEF_BIT_CLR_16(val, mask) :    \
+                                                ((sizeof(val) == CPU_WORD_SIZE_32) ? DEF_BIT_CLR_32(val, mask) : 0)))
+
+
+#elif   (CPU_CFG_DATA_SIZE_MAX == CPU_WORD_SIZE_64)
+
+#define  DEF_BIT_CLR(val, mask)                 ((sizeof(val) == CPU_WORD_SIZE_08) ? DEF_BIT_CLR_08(val, mask) :     \
+                                                ((sizeof(val) == CPU_WORD_SIZE_16) ? DEF_BIT_CLR_16(val, mask) :     \
+                                                ((sizeof(val) == CPU_WORD_SIZE_32) ? DEF_BIT_CLR_32(val, mask) :     \
+                                                ((sizeof(val) == CPU_WORD_SIZE_64) ? DEF_BIT_CLR_64(val, mask) : 0))))
+
+#else
+
+#error  "CPU_CFG_DATA_SIZE_MAX  illegally #defined in 'cpu.h'      "
+#error  "                       [See 'cpu.h  CONFIGURATION ERRORS']"
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            DEF_BIT_TOGGLE()
+*
+* Description : Toggles specified bit(s) in a value.
+*
+* Argument(s) : val         Value to modify by toggling specified bit(s).
+*
+*               mask        Mask of bits to toggle.
+*
+* Return(s)   : Modified value with specified bit(s) toggled.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'val' & 'mask' SHOULD be unsigned integers.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_TOGGLE(val, mask)                      ((val) ^= (mask))
+
+
+/*
+*********************************************************************************************************
+*                                           DEF_BIT_FIELD_RD()
+*
+* Description : Reads a 'val' field, masked and shifted, given by mask 'field_mask'.
+*
+* Argument(s) : val         Value to read from.
+*
+*               field_mask  Mask of field to read. See note #1, #2 and #3.
+*
+* Return(s)   : Field value, masked and right-shifted to bit position 0.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'field_mask' argument must NOT be 0.
+*
+*               (2) 'field_mask' argument must contain a mask with contiguous set bits.
+*
+*               (3) 'val' & 'field_mask' SHOULD be unsigned integers.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_FIELD_RD(val, field_mask)              (((val) & (field_mask)) / ((field_mask) & ((~(field_mask)) + 1u)))
+
+
+/*
+*********************************************************************************************************
+*                                          DEF_BIT_FIELD_ENC()
+*
+* Description : Encodes given 'field_val' at position given by mask 'field_mask'.
+*
+* Argument(s) : field_val   Value to encode.
+*
+*               field_mask  Mask of field to read. See note #1 and #2.
+*
+* Return(s)   : Field value, masked and left-shifted to field position.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'field_mask' argument must contain a mask with contiguous set bits.
+*
+*               (2) 'field_val' & 'field_mask' SHOULD be unsigned integers.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_FIELD_ENC(field_val, field_mask)       (((field_val) * ((field_mask) & ((~(field_mask)) + 1u))) & (field_mask))
+
+
+/*
+*********************************************************************************************************
+*                                           DEF_BIT_FIELD_WR()
+*
+* Description : Writes 'field_val' field at position given by mask 'field_mask' in variable 'var'.
+*
+* Argument(s) : var         Variable to write field to. See note #2.
+*
+*               field_val   Desired value for field. See note #2.
+*
+*               field_mask  Mask of field to write to. See note #1 and #2.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'field_mask' argument must contain a mask with contiguous set bits.
+*
+*               (2) 'var', 'field_val' & 'field_mask' SHOULD be unsigned integers.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_FIELD_WR(var, field_val, field_mask)   (var) = (((var) & ~(field_mask)) | DEF_BIT_FIELD_ENC((field_val), (field_mask)))
+
+
+/*
+*********************************************************************************************************
+*                                          DEF_BIT_IS_SET()
+*
+* Description : Determine if specified bit(s) in a value are set.
+*
+* Argument(s) : val         Value to check for specified bit(s) set.
+*
+*               mask        Mask of bits to check if set (see Note #2).
+*
+* Return(s)   : DEF_YES, if ALL specified bit(s) are     set in value.
+*
+*               DEF_NO,  if ALL specified bit(s) are NOT set in value.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'val' & 'mask' SHOULD be unsigned integers.
+*
+*               (2) NULL 'mask' allowed; returns 'DEF_NO' since NO mask bits specified.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_IS_SET(val, mask)                    (((((val) & (mask)) == (mask)) && \
+                                                         ((mask)          !=  0u))    ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                          DEF_BIT_IS_CLR()
+*
+* Description : Determine if specified bit(s) in a value are clear.
+*
+* Argument(s) : val         Value to check for specified bit(s) clear.
+*
+*               mask        Mask of bits to check if clear (see Note #2).
+*
+* Return(s)   : DEF_YES, if ALL specified bit(s) are     clear in value.
+*
+*               DEF_NO,  if ALL specified bit(s) are NOT clear in value.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'val' & 'mask' SHOULD be unsigned integers.
+*
+*               (2) NULL 'mask' allowed; returns 'DEF_NO' since NO mask bits specified.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_IS_CLR(val, mask)                    (((((val) & (mask)) ==  0u)  && \
+                                                         ((mask)          !=  0u))  ? (DEF_YES) : (DEF_NO))
+
+
+/*
+*********************************************************************************************************
+*                                        DEF_BIT_IS_SET_ANY()
+*
+* Description : Determine if any specified bit(s) in a value are set.
+*
+* Argument(s) : val         Value to check for specified bit(s) set.
+*
+*               mask        Mask of bits to check if set (see Note #2).
+*
+* Return(s)   : DEF_YES, if ANY specified bit(s) are     set in value.
+*
+*               DEF_NO,  if ALL specified bit(s) are NOT set in value.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'val' & 'mask' SHOULD be unsigned integers.
+*
+*               (2) NULL 'mask' allowed; returns 'DEF_NO' since NO mask bits specified.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_IS_SET_ANY(val, mask)               ((((val) & (mask)) ==  0u)     ? (DEF_NO ) : (DEF_YES))
+
+
+/*
+*********************************************************************************************************
+*                                        DEF_BIT_IS_CLR_ANY()
+*
+* Description : Determine if any specified bit(s) in a value are clear.
+*
+* Argument(s) : val         Value to check for specified bit(s) clear.
+*
+*               mask        Mask of bits to check if clear (see Note #2).
+*
+* Return(s)   : DEF_YES, if ANY specified bit(s) are     clear in value.
+*
+*               DEF_NO,  if ALL specified bit(s) are NOT clear in value.
+*
+* Note(s)     : (1) 'val' & 'mask' SHOULD be unsigned integers.
+*
+*               (2) NULL 'mask' allowed; returns 'DEF_NO' since NO mask bits specified.
+*********************************************************************************************************
+*/
+
+#define  DEF_BIT_IS_CLR_ANY(val, mask)               ((((val) & (mask)) == (mask))  ? (DEF_NO ) : (DEF_YES))
+
+
+/*
+*********************************************************************************************************
+*                                            VALUE MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          DEF_CHK_VAL_MIN()
+*
+* Description : Validate a value as greater than or equal to a specified minimum value.
+*
+* Argument(s) : val        Value to validate.
+*
+*               val_min    Minimum value to test.
+*
+* Return(s)   : DEF_OK,    Value is greater than or equal to minimum value.
+*
+*               DEF_FAIL,  otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) DEF_CHK_VAL_MIN() avoids directly comparing any two values if only one of the values
+*                   is negative since the negative value might be incorrectly promoted to an arbitrary
+*                   unsigned value if the other value to compare is unsigned.
+*
+*               (2) Validation of values is limited to the range supported by the compiler &/or target
+*                   environment.  All other values that underflow/overflow the supported range will
+*                   modulo/wrap into the supported range as arbitrary signed or unsigned values.
+*
+*                   Therefore, any values that underflow the most negative signed value or overflow
+*                   the most positive unsigned value supported by the compiler &/or target environment
+*                   cannot be validated :
+*
+*                           (    N-1       N     ]
+*                           ( -(2   )  ,  2  - 1 ]
+*                           (                    ]
+*
+*                               where
+*                                       N       Number of data word bits supported by the compiler
+*                                                   &/or target environment
+*
+*                   (a) Note that the most negative value, -2^(N-1), is NOT included in the supported
+*                       range since many compilers do NOT always correctly handle this value.
+*
+*               (3) 'val' and 'val_min' are compared to 1 instead of 0 to avoid warning generated for
+*                   unsigned numbers.
+*********************************************************************************************************
+*/
+
+#define  DEF_CHK_VAL_MIN(val, val_min)            (((!(((val)     >= 1) && ((val_min) < 1))) && \
+                                                     ((((val_min) >= 1) && ((val)     < 1))  || \
+                                                       ((val) < (val_min)))) ? DEF_FAIL : DEF_OK)
+
+
+/*
+*********************************************************************************************************
+*                                          DEF_CHK_VAL_MAX()
+*
+* Description : Validate a value as less than or equal to a specified maximum value.
+*
+* Argument(s) : val        Value to validate.
+*
+*               val_max    Maximum value to test.
+*
+* Return(s)   : DEF_OK,    Value is less than or equal to maximum value.
+*
+*               DEF_FAIL,  otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) DEF_CHK_VAL_MAX() avoids directly comparing any two values if only one of the values
+*                   is negative since the negative value might be incorrectly promoted to an arbitrary
+*                   unsigned value if the other value to compare is unsigned.
+*
+*               (2) Validation of values is limited to the range supported by the compiler &/or target
+*                   environment.  All other values that underflow/overflow the supported range will
+*                   modulo/wrap into the supported range as arbitrary signed or unsigned values.
+*
+*                   Therefore, any values that underflow the most negative signed value or overflow
+*                   the most positive unsigned value supported by the compiler &/or target environment
+*                   cannot be validated :
+*
+*                           (    N-1       N     ]
+*                           ( -(2   )  ,  2  - 1 ]
+*                           (                    ]
+*
+*                               where
+*                                       N       Number of data word bits supported by the compiler
+*                                                   &/or target environment
+*
+*                   (a) Note that the most negative value, -2^(N-1), is NOT included in the supported
+*                       range since many compilers do NOT always correctly handle this value.
+*
+*               (3) 'val' and 'val_max' are compared to 1 instead of 0 to avoid warning generated for
+*                   unsigned numbers.
+*********************************************************************************************************
+*/
+
+#define  DEF_CHK_VAL_MAX(val, val_max)            (((!(((val_max) >= 1) && ((val)     < 1))) && \
+                                                     ((((val)     >= 1) && ((val_max) < 1))  || \
+                                                       ((val) > (val_max)))) ? DEF_FAIL : DEF_OK)
+
+
+/*
+*********************************************************************************************************
+*                                            DEF_CHK_VAL()
+*
+* Description : Validate a value as greater than or equal to a specified minimum value & less than or
+*                   equal to a specified maximum value.
+*
+* Argument(s) : val        Value to validate.
+*
+*               val_min    Minimum value to test.
+*
+*               val_max    Maximum value to test.
+*
+* Return(s)   : DEF_OK,    Value is greater than or equal to minimum value AND
+*                                   less    than or equal to maximum value.
+*
+*               DEF_FAIL,  otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) DEF_CHK_VAL() avoids directly comparing any two values if only one of the values
+*                   is negative since the negative value might be incorrectly promoted to an arbitrary
+*                   unsigned value if the other value to compare is unsigned.
+*
+*               (2) Validation of values is limited to the range supported by the compiler &/or target
+*                   environment.  All other values that underflow/overflow the supported range will
+*                   modulo/wrap into the supported range as arbitrary signed or unsigned values.
+*
+*                   Therefore, any values that underflow the most negative signed value or overflow
+*                   the most positive unsigned value supported by the compiler &/or target environment
+*                   cannot be validated :
+*
+*                           (    N-1       N     ]
+*                           ( -(2   )  ,  2  - 1 ]
+*                           (                    ]
+*
+*                               where
+*                                       N       Number of data word bits supported by the compiler
+*                                                   &/or target environment
+*
+*                   (a) Note that the most negative value, -2^(N-1), is NOT included in the supported
+*                       range since many compilers do NOT always correctly handle this value.
+*
+*               (3) DEF_CHK_VAL() does NOT validate that the maximum value ('val_max') is greater than
+*                   or equal to the minimum value ('val_min').
+*********************************************************************************************************
+*/
+
+#define  DEF_CHK_VAL(val, val_min, val_max)          (((DEF_CHK_VAL_MIN((val), (val_min)) == DEF_FAIL) ||                  \
+                                                       (DEF_CHK_VAL_MAX((val), (val_max)) == DEF_FAIL)) ? DEF_FAIL : DEF_OK)
+
+
+/*
+*********************************************************************************************************
+*                                         DEF_GET_U_MAX_VAL()
+*
+* Description : Get the maximum unsigned value that can be represented in an unsigned integer variable
+*                   of the same data type size as an object.
+*
+* Argument(s) : obj         Object or data type to return maximum unsigned value (see Note #1).
+*
+* Return(s)   : Maximum unsigned integer value that can be represented by the object, if NO error(s).
+*
+*               0,                                                                    otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'obj' SHOULD be an integer object or data type but COULD also be a character or
+*                   pointer object or data type.
+*********************************************************************************************************
+*/
+
+#if     (CPU_CFG_DATA_SIZE_MAX == CPU_WORD_SIZE_08)
+
+#define  DEF_GET_U_MAX_VAL(obj)                 ((sizeof(obj) == CPU_WORD_SIZE_08) ? DEF_INT_08U_MAX_VAL : 0)
+
+
+#elif   (CPU_CFG_DATA_SIZE_MAX == CPU_WORD_SIZE_16)
+
+#define  DEF_GET_U_MAX_VAL(obj)                 ((sizeof(obj) == CPU_WORD_SIZE_08) ? DEF_INT_08U_MAX_VAL :   \
+                                                ((sizeof(obj) == CPU_WORD_SIZE_16) ? DEF_INT_16U_MAX_VAL : 0))
+
+
+#elif   (CPU_CFG_DATA_SIZE_MAX == CPU_WORD_SIZE_32)
+
+#define  DEF_GET_U_MAX_VAL(obj)                 ((sizeof(obj) == CPU_WORD_SIZE_08) ? DEF_INT_08U_MAX_VAL :    \
+                                                ((sizeof(obj) == CPU_WORD_SIZE_16) ? DEF_INT_16U_MAX_VAL :    \
+                                                ((sizeof(obj) == CPU_WORD_SIZE_32) ? DEF_INT_32U_MAX_VAL : 0)))
+
+
+#elif   (CPU_CFG_DATA_SIZE_MAX == CPU_WORD_SIZE_64)
+
+#define  DEF_GET_U_MAX_VAL(obj)                 ((sizeof(obj) == CPU_WORD_SIZE_08) ? DEF_INT_08U_MAX_VAL :     \
+                                                ((sizeof(obj) == CPU_WORD_SIZE_16) ? DEF_INT_16U_MAX_VAL :     \
+                                                ((sizeof(obj) == CPU_WORD_SIZE_32) ? DEF_INT_32U_MAX_VAL :     \
+                                                ((sizeof(obj) == CPU_WORD_SIZE_64) ? DEF_INT_64U_MAX_VAL : 0))))
+
+#else
+
+#error  "CPU_CFG_DATA_SIZE_MAX  illegally #defined in 'cpu.h'      "
+#error  "                       [See 'cpu.h  CONFIGURATION ERRORS']"
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            MATH MACRO'S
+*
+* Note(s) : (1) Ideally, ALL mathematical macro's & functions SHOULD be defined in the custom mathematics
+*               library ('lib_math.*').  #### However, to maintain backwards compatibility with previously-
+*               released modules, mathematical macro & function definitions should only be moved to the
+*               custom mathematics library once all previously-released modules are updated to include the
+*               custom mathematics library.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              DEF_MIN()
+*
+* Description : Determine the minimum of two values.
+*
+* Argument(s) : a           First  value.
+*
+*               b           Second value.
+*
+* Return(s)   : Minimum of the two values.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  DEF_MIN(a, b)                                  (((a) < (b)) ? (a) : (b))
+
+
+/*
+*********************************************************************************************************
+*                                              DEF_MAX()
+*
+* Description : Determine the maximum of two values.
+*
+* Argument(s) : a           First  value.
+*
+*               b           Second value.
+*
+* Return(s)   : Maximum of the two values.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  DEF_MAX(a, b)                                  (((a) > (b)) ? (a) : (b))
+
+
+/*
+*********************************************************************************************************
+*                                              DEF_ABS()
+*
+* Description : Determine the absolute value of a value.
+*
+* Argument(s) : a           Value to calculate absolute value.
+*
+* Return(s)   : Absolute value of the value.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  DEF_ABS(a)                                     (((a) < 0) ? (-(a)) : (a))
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                    LIBRARY CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* See 'lib_def.h  Note #1a'.                           */
+#if     (CPU_CORE_VERSION < 12900u)
+#error  "CPU_CORE_VERSION  [SHOULD be >= V1.29.00]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'lib_def.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of lib def module include.                       */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/lib_math.c b/src/ucos_v1_42/micrium_source/uC-LIB/lib_math.c
new file mode 100644
index 0000000..539d7a7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/lib_math.c
@@ -0,0 +1,281 @@
+/*
+*********************************************************************************************************
+*                                                uC/LIB
+*                                        CUSTOM LIBRARY MODULES
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/LIB is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        MATHEMATIC OPERATIONS
+*
+* Filename      : lib_math.c
+* Version       : V1.38.01
+* Programmer(s) : SR
+*                 ITJ
+*********************************************************************************************************
+* Note(s)       : (1) NO compiler-supplied standard library functions are used in library or product software.
+*
+*                     (a) ALL standard library functions are implemented in the custom library modules :
+*
+*                         (1) \\lib_*.*
+*
+*                         (2) \\Ports\\\lib*_a.*
+*
+*                               where
+*                                             directory path for custom library software
+*                                                                  directory name for specific processor (CPU)
+*                                                             directory name for specific compiler
+*
+*                     (b) Product-specific library functions are implemented in individual products.
+*
+*********************************************************************************************************
+* Notice(s)     : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given
+*                     us permission to reprint portions of their documentation.  Portions of this text are
+*                     reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition,
+*                     Standard for Information Technology -- Portable Operating System Interface (POSIX),
+*                     The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute
+*                     of Electrical and Electronics Engineers, Inc and The Open Group.  In the event of any
+*                     discrepancy between these versions and the original IEEE and The Open Group Standard,
+*                     the original IEEE and The Open Group Standard is the referee document.  The original
+*                     Standard can be obtained online at http://www.opengroup.org/unix/online.html.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    LIB_MATH_MODULE
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+RAND_NBR  Math_RandSeedCur;                                     /* Cur rand nbr seed.                                   */
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             Math_Init()
+*
+* Description : (1) Initialize Mathematic Module :
+*
+*                   (a) Initialize random number seed value
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that "if rand()
+*                   is called before any calls to srand() are made, the same sequence shall be generated
+*                   as when srand() is first called with a seed value of 1".
+*********************************************************************************************************
+*/
+
+void  Math_Init (void)
+{
+    Math_RandSetSeed((RAND_NBR)RAND_SEED_INIT_VAL);             /* See Note #2.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Math_RandSetSeed()
+*
+* Description : Set the current pseudo-random number generator seed.
+*
+* Argument(s) : seed        Initial (or current) value to set for the pseudo-random number sequence.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that "srand()
+*                   ... uses the argument as a seed for a new sequence of pseudo-random numbers to be
+*                   returned by subsequent calls to rand()".
+*
+*               (2) 'Math_RandSeedCur' MUST always be accessed exclusively in critical sections.
+*
+*                   See also 'Math_Rand()  Note #1b'.
+*********************************************************************************************************
+*/
+
+void  Math_RandSetSeed (RAND_NBR  seed)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    Math_RandSeedCur = seed;
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Math_Rand()
+*
+* Description : Calculate the next pseudo-random number.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Next pseudo-random number in the sequence after 'Math_RandSeedCur'.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) The pseudo-random number generator is implemented as a Linear Congruential
+*                       Generator (LCG).
+*
+*                   (b) The pseudo-random number generated is in the range [0, RAND_LCG_PARAM_M].
+*
+*                   See also 'Math_RandSeed()  Note #1'.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that "rand()
+*                       ... need not be reentrant ... [and] is not required to be thread-safe".
+*
+*                   (b) However, in order to implement Math_Rand() as re-entrant; 'Math_RandSeedCur' MUST
+*                       always be accessed & updated exclusively in critical sections.
+*
+*                   See also 'Math_RandSeed()  Note #2'.
+*********************************************************************************************************
+*/
+
+RAND_NBR  Math_Rand (void)
+{
+    RAND_NBR  seed;
+    RAND_NBR  rand_nbr;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    seed             = Math_RandSeedCur;
+    rand_nbr         = Math_RandSeed(seed);
+    Math_RandSeedCur = rand_nbr;
+    CPU_CRITICAL_EXIT();
+
+    return (rand_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Math_RandSeed()
+*
+* Description : Calculate the next pseudo-random number.
+*
+* Argument(s) : seed        Initial (or current) value for the pseudo-random number sequence.
+*
+* Return(s)   : Next pseudo-random number in the sequence after 'seed'.
+*
+* Caller(s)   : Math_Rand(),
+*               Application.
+*
+* Note(s)     : (1) (a) BSD/ANSI-C implements rand() as a Linear Congruential Generator (LCG) :
+*
+*                       (A) random_number       =  [(a * random_number ) + b]  modulo m
+*                                        n + 1                        n
+*
+*                               where
+*                                       (1) (a) random_number           Next     random number to generate
+*                                                            n+1
+*                                           (b) random_number           Previous random number    generated
+*                                                            n
+*
+*                                       (2) a = RAND_LCG_PARAM_A        LCG multiplier
+*                                       (3) b = RAND_LCG_PARAM_B        LCG incrementor
+*                                       (4) m = RAND_LCG_PARAM_M + 1    LCG modulus
+*
+*                   (b) The pseudo-random number generated is in the range [0, RAND_LCG_PARAM_M].
+*
+                    See also 'lib_math.h  RANDOM NUMBER DEFINES  Note #1b'.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that "rand()
+*                       ... need not be reentrant ... [and] is not required to be thread-safe".
+*
+*                   (b) However, Math_RandSeed() is re-entrant since it calculates the next random number
+*                       using ONLY local variables.
+*********************************************************************************************************
+*/
+
+RAND_NBR  Math_RandSeed (RAND_NBR  seed)
+{
+    RAND_NBR  rand_nbr;
+
+
+    rand_nbr = (((RAND_NBR)RAND_LCG_PARAM_A * seed) + (RAND_NBR)RAND_LCG_PARAM_B)  %  ((RAND_NBR)RAND_LCG_PARAM_M + 1u);
+
+    return (rand_nbr);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/lib_math.h b/src/ucos_v1_42/micrium_source/uC-LIB/lib_math.h
new file mode 100644
index 0000000..e4c5d17
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/lib_math.h
@@ -0,0 +1,298 @@
+/*
+*********************************************************************************************************
+*                                                uC/LIB
+*                                        CUSTOM LIBRARY MODULES
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/LIB is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        MATHEMATIC OPERATIONS
+*
+* Filename      : lib_math.h
+* Version       : V1.38.01
+* Programmer(s) : SR
+*                 ITJ
+*********************************************************************************************************
+* Note(s)       : (1) NO compiler-supplied standard library functions are used in library or product software.
+*
+*                     (a) ALL standard library functions are implemented in the custom library modules :
+*
+*                         (1) \\lib_*.*
+*
+*                         (2) \\Ports\\\lib*_a.*
+*
+*                               where
+*                                             directory path for custom library software
+*                                                                  directory name for specific processor (CPU)
+*                                                             directory name for specific compiler
+*
+*                     (b) Product-specific library functions are implemented in individual products.
+*
+*********************************************************************************************************
+* Notice(s)     : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given
+*                     us permission to reprint portions of their documentation.  Portions of this text are
+*                     reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition,
+*                     Standard for Information Technology -- Portable Operating System Interface (POSIX),
+*                     The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute
+*                     of Electrical and Electronics Engineers, Inc and The Open Group.  In the event of any
+*                     discrepancy between these versions and the original IEEE and The Open Group Standard,
+*                     the original IEEE and The Open Group Standard is the referee document.  The original
+*                     Standard can be obtained online at http://www.opengroup.org/unix/online.html.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This mathematics library header file is protected from multiple pre-processor inclusion
+*               through use of the mathematics library module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  LIB_MATH_MODULE_PRESENT                                /* See Note #1.                                         */
+#define  LIB_MATH_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The custom library software files are located in the following directories :
+*
+*               (a) \\lib_*.*
+*
+*                       where
+*                                     directory path for custom library software
+*
+*           (2) CPU-configuration  software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) (1) '\\'                  directory         See Note #2a
+*                   (2) '\\\\' directory         See Note #2b
+*
+*           (4) NO compiler-supplied standard library functions SHOULD be used.
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   LIB_MATH_MODULE
+#define  LIB_MATH_EXT
+#else
+#define  LIB_MATH_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        RANDOM NUMBER DEFINES
+*
+* Note(s) : (1) (a) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that "if rand()
+*                   is called before any calls to srand() are made, the same sequence shall be generated
+*                   as when srand() is first called with a seed value of 1".
+*
+*               (b) (1) BSD/ANSI-C implements rand() as a Linear Congruential Generator (LCG) :
+*
+*                       (A) random_number       =  [(a * random_number ) + b]  modulo m
+*                                        n + 1                        n
+*
+*                               where
+*                                       (1) (a) random_number       Next     random number to generate
+*                                                            n+1
+*                                           (b) random_number       Previous random number    generated
+*                                                            n
+*                                           (c) random_number       Initial  random number seed
+*                                                            0                      See also Note #1a
+*
+*                                       (2) a =   1103515245        LCG multiplier
+*                                       (3) b =        12345        LCG incrementor
+*                                       (4) m = RAND_MAX + 1        LCG modulus     See also Note #1b2
+*
+*                   (2) (A) IEEE Std 1003.1, 2004 Edition, Section 'rand() : DESCRIPTION' states that
+*                           "rand() ... shall compute a sequence of pseudo-random integers in the range
+*                           [0, {RAND_MAX}] with a period of at least 2^32".
+*
+*                       (B) However, BSD/ANSI-C 'stdlib.h' defines "RAND_MAX" as "0x7fffffff", or 2^31;
+*                           which therefore limits the range AND period to no more than 2^31.
+*********************************************************************************************************
+*/
+
+#define  RAND_SEED_INIT_VAL                                1u   /* See Note #1a.                                        */
+
+#define  RAND_LCG_PARAM_M                         0x7FFFFFFFu   /* See Note #1b2B.                                      */
+#define  RAND_LCG_PARAM_A                         1103515245u   /* See Note #1b1A2.                                     */
+#define  RAND_LCG_PARAM_B                              12345u   /* See Note #1b1A3.                                     */
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       RANDOM NUMBER DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  RAND_NBR;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            MATH_IS_PWR2()
+*
+* Description : Determine if a value is a power of 2.
+*
+* Argument(s) : nbr           Value.
+*
+* Return(s)   : DEF_YES, 'nbr' is a power of 2.
+*
+*               DEF_NO,  'nbr' is not a power of 2.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  MATH_IS_PWR2(nbr)                                 ((((nbr) != 0u) && (((nbr) & ((nbr) - 1u)) == 0u)) ? DEF_YES : DEF_NO)
+
+
+/*
+*********************************************************************************************************
+*                                        MATH_ROUND_INC_UP_PWR2()
+*
+* Description : Round value up to the next (power of 2) increment.
+*
+* Argument(s) : nbr           Value to round.
+*
+*               inc           Increment to use. MUST be a power of 2.
+*
+* Return(s)   : Rounded up value.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  MATH_ROUND_INC_UP_PWR2(nbr, inc)                  (((nbr) & ~((inc) - 1)) + (((nbr) & ((inc) - 1)) == 0 ? 0 : (inc)))
+
+
+/*
+*********************************************************************************************************
+*                                          MATH_ROUND_INC_UP()
+*
+* Description : Round value up to the next increment.
+*
+* Argument(s) : nbr           Value to round.
+*
+*               inc           Increment to use.
+*
+* Return(s)   : Rounded up value.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  MATH_ROUND_INC_UP(nbr, inc)                       (((nbr) + ((inc) - 1)) / (inc) * (inc))
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void      Math_Init       (void);
+
+                                                                /* ------------------ RAND NBR FNCTS ------------------ */
+void      Math_RandSetSeed(RAND_NBR  seed);
+
+RAND_NBR  Math_Rand       (void);
+
+RAND_NBR  Math_RandSeed   (RAND_NBR  seed);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'lib_math.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of lib math module include.                      */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/lib_mem.c b/src/ucos_v1_42/micrium_source/uC-LIB/lib_mem.c
new file mode 100644
index 0000000..445f58c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/lib_mem.c
@@ -0,0 +1,2850 @@
+/*
+*********************************************************************************************************
+*                                                uC/LIB
+*                                        CUSTOM LIBRARY MODULES
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/LIB is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     STANDARD MEMORY OPERATIONS
+*
+* Filename      : lib_mem.c
+* Version       : V1.38.01
+* Programmer(s) : ITJ
+*                 FGK
+*                 JFD
+*                 FBJ
+*                 EJ
+*********************************************************************************************************
+* Note(s)       : (1) NO compiler-supplied standard library functions are used in library or product software.
+*
+*                     (a) ALL standard library functions are implemented in the custom library modules :
+*
+*                         (1) \\lib_*.*
+*
+*                         (2) \\Ports\\\lib*_a.*
+*
+*                               where
+*                                             directory path for custom library software
+*                                                                  directory name for specific processor (CPU)
+*                                                             directory name for specific compiler
+*
+*                     (b) Product-specific library functions are implemented in individual products.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    LIB_MEM_MODULE
+#include  "lib_mem.h"
+#include  "lib_math.h"
+#include  "lib_str.h"
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+#ifndef  LIB_MEM_CFG_HEAP_BASE_ADDR
+CPU_INT08U   Mem_Heap[LIB_MEM_CFG_HEAP_SIZE];                   /* Mem heap.                                            */
+#endif
+
+MEM_SEG      Mem_SegHeap;                                       /* Heap mem seg.                                        */
+#endif
+
+MEM_SEG     *Mem_SegHeadPtr;                                    /* Ptr to head of seg list.                             */
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void          Mem_SegCreateCritical    (const  CPU_CHAR      *p_name,
+                                                       MEM_SEG       *p_seg,
+                                                       CPU_ADDR       seg_base_addr,
+                                                       CPU_SIZE_T     padding_align,
+                                                       CPU_SIZE_T     size);
+
+#if  (LIB_MEM_CFG_HEAP_SIZE > 0u)
+static  MEM_SEG      *Mem_SegOverlapChkCritical(       CPU_ADDR       seg_base_addr,
+                                                       CPU_SIZE_T     size,
+                                                       LIB_ERR       *p_err);
+#endif
+
+static  void         *Mem_SegAllocInternal     (const  CPU_CHAR      *p_name,
+                                                       MEM_SEG       *p_seg,
+                                                       CPU_SIZE_T     size,
+                                                       CPU_SIZE_T     align,
+                                                       CPU_SIZE_T     padding_align,
+                                                       CPU_SIZE_T    *p_bytes_reqd,
+                                                       LIB_ERR       *p_err);
+
+static  void         *Mem_SegAllocExtCritical  (       MEM_SEG       *p_seg,
+                                                       CPU_SIZE_T     size,
+                                                       CPU_SIZE_T     align,
+                                                       CPU_SIZE_T     padding_align,
+                                                       CPU_SIZE_T    *p_bytes_reqd,
+                                                       LIB_ERR       *p_err);
+
+static  void          Mem_DynPoolCreateInternal(const  CPU_CHAR      *p_name,
+                                                       MEM_DYN_POOL  *p_pool,
+                                                       MEM_SEG       *p_seg,
+                                                       CPU_SIZE_T     blk_size,
+                                                       CPU_SIZE_T     blk_align,
+                                                       CPU_SIZE_T     blk_padding_align,
+                                                       CPU_SIZE_T     blk_qty_init,
+                                                       CPU_SIZE_T     blk_qty_max,
+                                                       LIB_ERR       *p_err);
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
+static  void          Mem_SegAllocTrackCritical(const  CPU_CHAR      *p_name,
+                                                       MEM_SEG       *p_seg,
+                                                       CPU_SIZE_T     size,
+                                                       LIB_ERR       *p_err);
+#endif
+
+#if ((LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) && \
+     (LIB_MEM_CFG_HEAP_SIZE      >  0u))
+static  CPU_BOOLEAN   Mem_PoolBlkIsValidAddr   (       MEM_POOL      *p_pool,
+                                                       void          *p_mem);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             Mem_Init()
+*
+* Description : (1) Initializes Memory Management Module :
+*
+*                   (a) Initialize heap memory pool
+*                   (b) Initialize      memory pool table
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (2) Mem_Init() MUST be called ... :
+*
+*                   (a) ONLY ONCE from a product's application; ...
+*                   (b) BEFORE product's application calls any memory library module function(s)
+*********************************************************************************************************
+*/
+
+void  Mem_Init (void)
+{
+
+                                                                /* ------------------ INIT SEG LIST ------------------- */
+    Mem_SegHeadPtr = DEF_NULL;
+
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+    {
+        LIB_ERR   err;
+        CPU_ADDR  heap_base_addr;
+
+
+                                                                /* ------------------ INIT HEAP SEG ------------------- */
+#ifdef  LIB_MEM_CFG_HEAP_BASE_ADDR
+        heap_base_addr = LIB_MEM_CFG_HEAP_BASE_ADDR;
+#else
+        heap_base_addr = (CPU_ADDR)&Mem_Heap[0u];
+#endif
+
+        Mem_SegCreate("Heap",
+                      &Mem_SegHeap,                             /* Create heap seg.                                     */
+                       heap_base_addr,
+                       LIB_MEM_CFG_HEAP_SIZE,
+                       LIB_MEM_PADDING_ALIGN_NONE,
+                      &err);
+        if (err != LIB_MEM_ERR_NONE) {
+            CPU_SW_EXCEPTION(;);
+        }
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                              Mem_Clr()
+*
+* Description : Clears data buffer (see Note #2).
+*
+* Argument(s) : pmem        Pointer to memory buffer to clear.
+*
+*               size        Number of data buffer octets to clear (see Note #1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Null clears allowed (i.e. zero-length clears).
+*
+*                   See also 'Mem_Set()  Note #1'.
+*
+*               (2) Clear data by setting each data octet to 0.
+*********************************************************************************************************
+*/
+
+void  Mem_Clr (void        *pmem,
+               CPU_SIZE_T   size)
+{
+    Mem_Set(pmem,
+            0u,                                                 /* See Note #2.                                         */
+            size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              Mem_Set()
+*
+* Description : Fills data buffer with specified data octet.
+*
+* Argument(s) : pmem        Pointer to memory buffer to fill with specified data octet.
+*
+*               data_val    Data fill octet value.
+*
+*               size        Number of data buffer octets to fill (see Note #1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Null sets allowed (i.e. zero-length sets).
+*
+*               (2) For best CPU performance, optimized to fill data buffer using 'CPU_ALIGN'-sized data
+*                   words. Since many word-aligned processors REQUIRE that multi-octet words be accessed on
+*                   word-aligned addresses, 'CPU_ALIGN'-sized words MUST be accessed on 'CPU_ALIGN'd
+*                   addresses.
+*
+*               (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN'
+*                   address boundary.
+*
+*                   Modulo arithmetic in ANSI-C REQUIREs operations performed on integer values.  Thus
+*                   address values MUST be cast to an appropriately-sized integer value PRIOR to any
+*                  'mem_align_mod' arithmetic operation.
+*********************************************************************************************************
+*/
+
+void  Mem_Set (void        *pmem,
+               CPU_INT08U   data_val,
+               CPU_SIZE_T   size)
+{
+    CPU_SIZE_T   size_rem;
+    CPU_ALIGN    data_align;
+    CPU_ALIGN   *pmem_align;
+    CPU_INT08U  *pmem_08;
+    CPU_DATA     mem_align_mod;
+    CPU_DATA     i;
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (size < 1) {                                             /* See Note #1.                                         */
+        return;
+    }
+    if (pmem == (void *)0) {
+        return;
+    }
+#endif
+
+
+    data_align = 0u;
+    for (i = 0u; i < sizeof(CPU_ALIGN); i++) {                  /* Fill each data_align octet with data val.            */
+        data_align <<=  DEF_OCTET_NBR_BITS;
+        data_align  |= (CPU_ALIGN)data_val;
+    }
+
+    size_rem      =  size;
+    mem_align_mod = (CPU_INT08U)((CPU_ADDR)pmem % sizeof(CPU_ALIGN));   /* See Note #3.                                 */
+
+    pmem_08 = (CPU_INT08U *)pmem;
+    if (mem_align_mod != 0u) {                                  /* If leading octets avail,                   ...       */
+        i = mem_align_mod;
+        while ((size_rem > 0) &&                                /* ... start mem buf fill with leading octets ...       */
+               (i        < sizeof(CPU_ALIGN ))) {               /* ... until next CPU_ALIGN word boundary.              */
+           *pmem_08++ = data_val;
+            size_rem -= sizeof(CPU_INT08U);
+            i++;
+        }
+    }
+
+    pmem_align = (CPU_ALIGN *)pmem_08;                          /* See Note #2.                                         */
+    while (size_rem >= sizeof(CPU_ALIGN)) {                     /* While mem buf aligned on CPU_ALIGN word boundaries,  */
+       *pmem_align++ = data_align;                              /* ... fill mem buf with    CPU_ALIGN-sized data.       */
+        size_rem    -= sizeof(CPU_ALIGN);
+    }
+
+    pmem_08 = (CPU_INT08U *)pmem_align;
+    while (size_rem > 0) {                                      /* Finish mem buf fill with trailing octets.            */
+       *pmem_08++   = data_val;
+        size_rem   -= sizeof(CPU_INT08U);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Mem_Copy()
+*
+* Description : Copies data octets from one memory buffer to another memory buffer.
+*
+* Argument(s) : pdest       Pointer to destination memory buffer.
+*
+*               psrc        Pointer to source      memory buffer.
+*
+*               size        Number of octets to copy (see Note #1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Null copies allowed (i.e. zero-length copies).
+*
+*               (2) Memory buffers NOT checked for overlapping.
+*
+*                   (a) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that "if
+*                       copying takes place between objects that overlap, the behavior is undefined".
+*
+*                   (b) However, data octets from a source memory buffer at a higher address value SHOULD
+*                       successfully copy to a destination memory buffer at a lower  address value even
+*                       if any octets of the memory buffers overlap as long as no individual, atomic CPU
+*                       word copy overlaps.
+*
+*                       Since Mem_Copy() performs the data octet copy via 'CPU_ALIGN'-sized words &/or
+*                       octets; & since 'CPU_ALIGN'-sized words MUST be accessed on word-aligned addresses
+*                       (see Note #3b), neither 'CPU_ALIGN'-sized words nor octets at unique addresses can
+*                       ever overlap.
+*
+*                       Therefore, Mem_Copy() SHOULD be able to successfully copy overlapping memory
+*                       buffers as long as the source memory buffer is at a higher address value than the
+*                       destination memory buffer.
+*
+*               (3) For best CPU performance, optimized to copy data buffer using 'CPU_ALIGN'-sized data
+*                   words. Since many word-aligned processors REQUIRE that multi-octet words be accessed on
+*                   word-aligned addresses, 'CPU_ALIGN'-sized words MUST be accessed on 'CPU_ALIGN'd
+*                   addresses.
+*
+*               (4) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN'
+*                   address boundary.
+*
+*                   Modulo arithmetic in ANSI-C REQUIREs operations performed on integer values.  Thus
+*                   address values MUST be cast to an appropriately-sized integer value PRIOR to any
+*                  'mem_align_mod' arithmetic operation.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_OPTIMIZE_ASM_EN != DEF_ENABLED)
+void  Mem_Copy (       void        *pdest,
+                const  void        *psrc,
+                       CPU_SIZE_T   size)
+{
+           CPU_SIZE_T    size_rem;
+           CPU_SIZE_T    mem_gap_octets;
+           CPU_ALIGN    *pmem_align_dest;
+    const  CPU_ALIGN    *pmem_align_src;
+           CPU_INT08U   *pmem_08_dest;
+    const  CPU_INT08U   *pmem_08_src;
+           CPU_DATA      i;
+           CPU_DATA      mem_align_mod_dest;
+           CPU_DATA      mem_align_mod_src;
+           CPU_BOOLEAN   mem_aligned;
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (size < 1) {                                             /* See Note #1.                                         */
+        return;
+    }
+    if (pdest == (void *)0) {
+        return;
+    }
+    if (psrc  == (void *)0) {
+        return;
+    }
+#endif
+
+
+    size_rem           =  size;
+
+    pmem_08_dest       = (      CPU_INT08U *)pdest;
+    pmem_08_src        = (const CPU_INT08U *)psrc;
+
+    mem_gap_octets     = (CPU_SIZE_T)(pmem_08_src - pmem_08_dest);
+
+
+    if (mem_gap_octets >= sizeof(CPU_ALIGN)) {                  /* Avoid bufs overlap.                                  */
+                                                                /* See Note #4.                                         */
+        mem_align_mod_dest = (CPU_INT08U)((CPU_ADDR)pmem_08_dest % sizeof(CPU_ALIGN));
+        mem_align_mod_src  = (CPU_INT08U)((CPU_ADDR)pmem_08_src  % sizeof(CPU_ALIGN));
+
+        mem_aligned        = (mem_align_mod_dest == mem_align_mod_src) ? DEF_YES : DEF_NO;
+
+        if (mem_aligned == DEF_YES) {                           /* If mem bufs' alignment offset equal, ...             */
+                                                                /* ... optimize copy for mem buf alignment.             */
+            if (mem_align_mod_dest != 0u) {                     /* If leading octets avail,                   ...       */
+                i = mem_align_mod_dest;
+                while ((size_rem   >  0) &&                     /* ... start mem buf copy with leading octets ...       */
+                       (i          <  sizeof(CPU_ALIGN ))) {    /* ... until next CPU_ALIGN word boundary.              */
+                   *pmem_08_dest++ = *pmem_08_src++;
+                    size_rem      -=  sizeof(CPU_INT08U);
+                    i++;
+                }
+            }
+
+            pmem_align_dest = (      CPU_ALIGN *)pmem_08_dest;  /* See Note #3.                                         */
+            pmem_align_src  = (const CPU_ALIGN *)pmem_08_src;
+            while (size_rem      >=  sizeof(CPU_ALIGN)) {       /* While mem bufs aligned on CPU_ALIGN word boundaries, */
+               *pmem_align_dest++ = *pmem_align_src++;          /* ... copy psrc to pdest with CPU_ALIGN-sized words.   */
+                size_rem         -=  sizeof(CPU_ALIGN);
+            }
+
+            pmem_08_dest = (      CPU_INT08U *)pmem_align_dest;
+            pmem_08_src  = (const CPU_INT08U *)pmem_align_src;
+        }
+    }
+
+    while (size_rem > 0) {                                      /* For unaligned mem bufs or trailing octets, ...       */
+       *pmem_08_dest++ = *pmem_08_src++;                        /* ... copy psrc to pdest by octets.                    */
+        size_rem      -=  sizeof(CPU_INT08U);
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             Mem_Move()
+*
+* Description : Moves data octets from one memory buffer to another memory buffer, or within the same
+*               memory buffer. Overlapping is correctly handled for all move operations.
+*
+* Argument(s) : pdest       Pointer to destination memory buffer.
+*
+*               psrc        Pointer to source      memory buffer.
+*
+*               size        Number of octets to move (see Note #1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Null move operations allowed (i.e. zero-length).
+*
+*               (2) Memory buffers checked for overlapping.
+*
+*               (3) For best CPU performance, optimized to copy data buffer using 'CPU_ALIGN'-sized data
+*                   words. Since many word-aligned processors REQUIRE that multi-octet words be accessed on
+*                   word-aligned addresses, 'CPU_ALIGN'-sized words MUST be accessed on 'CPU_ALIGN'd
+*                   addresses.
+*
+*               (4) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN'
+*                   address boundary.
+*
+*                   Modulo arithmetic in ANSI-C REQUIREs operations performed on integer values.  Thus
+*                   address values MUST be cast to an appropriately-sized integer value PRIOR to any
+*                  'mem_align_mod' arithmetic operation.
+*********************************************************************************************************
+*/
+
+void  Mem_Move (       void        *pdest,
+                const  void        *psrc,
+                       CPU_SIZE_T   size)
+{
+           CPU_SIZE_T    size_rem;
+           CPU_SIZE_T    mem_gap_octets;
+           CPU_ALIGN    *pmem_align_dest;
+    const  CPU_ALIGN    *pmem_align_src;
+           CPU_INT08U   *pmem_08_dest;
+    const  CPU_INT08U   *pmem_08_src;
+           CPU_INT08S    i;
+           CPU_DATA      mem_align_mod_dest;
+           CPU_DATA      mem_align_mod_src;
+           CPU_BOOLEAN   mem_aligned;
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (size < 1) {
+        return;
+    }
+    if (pdest == (void *)0) {
+        return;
+    }
+    if (psrc  == (void *)0) {
+        return;
+    }
+#endif
+
+    pmem_08_src  = (const CPU_INT08U *)psrc;
+    pmem_08_dest = (      CPU_INT08U *)pdest;
+    if (pmem_08_src > pmem_08_dest) {
+        Mem_Copy(pdest, psrc, size);
+        return;
+    }
+
+    size_rem           =  size;
+
+    pmem_08_dest       = (      CPU_INT08U *)pdest + size - 1;
+    pmem_08_src        = (const CPU_INT08U *)psrc  + size - 1;
+
+    mem_gap_octets     = (CPU_SIZE_T)(pmem_08_dest - pmem_08_src);
+
+
+    if (mem_gap_octets >= sizeof(CPU_ALIGN)) {                  /* Avoid bufs overlap.                                  */
+
+                                                                /* See Note #4.                                         */
+        mem_align_mod_dest = (CPU_INT08U)((CPU_ADDR)pmem_08_dest % sizeof(CPU_ALIGN));
+        mem_align_mod_src  = (CPU_INT08U)((CPU_ADDR)pmem_08_src  % sizeof(CPU_ALIGN));
+
+        mem_aligned        = (mem_align_mod_dest == mem_align_mod_src) ? DEF_YES : DEF_NO;
+
+        if (mem_aligned == DEF_YES) {                           /* If mem bufs' alignment offset equal, ...             */
+                                                                /* ... optimize copy for mem buf alignment.             */
+            if (mem_align_mod_dest != (sizeof(CPU_ALIGN) - 1)) {/* If leading octets avail,                   ...       */
+                i = (CPU_INT08S)mem_align_mod_dest;
+                while ((size_rem   >  0) &&                     /* ... start mem buf copy with leading octets ...       */
+                       (i          >= 0)) {                     /* ... until next CPU_ALIGN word boundary.              */
+                   *pmem_08_dest-- = *pmem_08_src--;
+                    size_rem      -=  sizeof(CPU_INT08U);
+                    i--;
+                }
+            }
+
+                                                                /* See Note #3.                                         */
+            pmem_align_dest = (      CPU_ALIGN *)(((CPU_INT08U *)pmem_08_dest - sizeof(CPU_ALIGN)) + 1);
+            pmem_align_src  = (const CPU_ALIGN *)(((CPU_INT08U *)pmem_08_src  - sizeof(CPU_ALIGN)) + 1);
+            while (size_rem      >=  sizeof(CPU_ALIGN)) {       /* While mem bufs aligned on CPU_ALIGN word boundaries, */
+               *pmem_align_dest-- = *pmem_align_src--;          /* ... copy psrc to pdest with CPU_ALIGN-sized words.   */
+                size_rem         -=  sizeof(CPU_ALIGN);
+            }
+
+            pmem_08_dest = (      CPU_INT08U *)pmem_align_dest + sizeof(CPU_ALIGN) - 1;
+            pmem_08_src  = (const CPU_INT08U *)pmem_align_src  + sizeof(CPU_ALIGN) - 1;
+
+        }
+    }
+
+    while (size_rem > 0) {                                      /* For unaligned mem bufs or trailing octets, ...       */
+       *pmem_08_dest-- = *pmem_08_src--;                        /* ... copy psrc to pdest by octets.                    */
+        size_rem      -=  sizeof(CPU_INT08U);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                              Mem_Cmp()
+*
+* Description : Verifies that ALL data octets in two memory buffers are identical in sequence.
+*
+* Argument(s) : p1_mem      Pointer to first  memory buffer.
+*
+*               p2_mem      Pointer to second memory buffer.
+*
+*               size        Number of data buffer octets to compare (see Note #1).
+*
+* Return(s)   : DEF_YES, if 'size' number of data octets are identical in both memory buffers.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Null compares allowed (i.e. zero-length compares); 'DEF_YES' returned to indicate
+*                   identical null compare.
+*
+*               (2) Many memory buffer comparisons vary ONLY in the least significant octets -- e.g.
+*                   network address buffers.  Consequently, memory buffer comparison is more efficient
+*                   if the comparison starts from the end of the memory buffers which will abort sooner
+*                   on dissimilar memory buffers that vary only in the least significant octets.
+*
+*               (3) For best CPU performance, optimized to compare data buffers using 'CPU_ALIGN'-sized
+*                   data words. Since many word-aligned processors REQUIRE that multi-octet words be accessed on
+*                   word-aligned addresses, 'CPU_ALIGN'-sized words MUST be accessed on 'CPU_ALIGN'd
+*                   addresses.
+*
+*               (4) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN'
+*                   address boundary.
+*
+*                   Modulo arithmetic in ANSI-C REQUIREs operations performed on integer values.  Thus
+*                   address values MUST be cast to an appropriately-sized integer value PRIOR to any
+*                  'mem_align_mod' arithmetic operation.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Mem_Cmp (const  void        *p1_mem,
+                      const  void        *p2_mem,
+                             CPU_SIZE_T   size)
+{
+           CPU_SIZE_T    size_rem;
+           CPU_ALIGN    *p1_mem_align;
+           CPU_ALIGN    *p2_mem_align;
+    const  CPU_INT08U   *p1_mem_08;
+    const  CPU_INT08U   *p2_mem_08;
+           CPU_DATA      i;
+           CPU_DATA      mem_align_mod_1;
+           CPU_DATA      mem_align_mod_2;
+           CPU_BOOLEAN   mem_aligned;
+           CPU_BOOLEAN   mem_cmp;
+
+
+    if (size < 1) {                                             /* See Note #1.                                         */
+        return (DEF_YES);
+    }
+    if (p1_mem == (void *)0) {
+        return (DEF_NO);
+    }
+    if (p2_mem == (void *)0) {
+        return (DEF_NO);
+    }
+
+
+    mem_cmp         =  DEF_YES;                                 /* Assume mem bufs are identical until cmp fails.       */
+    size_rem        =  size;
+                                                                /* Start @ end of mem bufs (see Note #2).               */
+    p1_mem_08       = (const CPU_INT08U *)p1_mem + size;
+    p2_mem_08       = (const CPU_INT08U *)p2_mem + size;
+                                                                /* See Note #4.                                         */
+    mem_align_mod_1 = (CPU_INT08U)((CPU_ADDR)p1_mem_08 % sizeof(CPU_ALIGN));
+    mem_align_mod_2 = (CPU_INT08U)((CPU_ADDR)p2_mem_08 % sizeof(CPU_ALIGN));
+
+    mem_aligned     = (mem_align_mod_1 == mem_align_mod_2) ? DEF_YES : DEF_NO;
+
+    if (mem_aligned == DEF_YES) {                               /* If mem bufs' alignment offset equal, ...             */
+                                                                /* ... optimize cmp for mem buf alignment.              */
+        if (mem_align_mod_1 != 0u) {                            /* If trailing octets avail,                  ...       */
+            i = mem_align_mod_1;
+            while ((mem_cmp == DEF_YES) &&                      /* ... cmp mem bufs while identical &         ...       */
+                   (size_rem > 0)       &&                      /* ... start mem buf cmp with trailing octets ...       */
+                   (i        > 0)) {                            /* ... until next CPU_ALIGN word boundary.              */
+                p1_mem_08--;
+                p2_mem_08--;
+                if (*p1_mem_08 != *p2_mem_08) {                 /* If ANY data octet(s) NOT identical, cmp fails.       */
+                     mem_cmp = DEF_NO;
+                }
+                size_rem -= sizeof(CPU_INT08U);
+                i--;
+            }
+        }
+
+        if (mem_cmp == DEF_YES) {                               /* If cmp still identical, cmp aligned mem bufs.        */
+            p1_mem_align = (CPU_ALIGN *)p1_mem_08;              /* See Note #3.                                         */
+            p2_mem_align = (CPU_ALIGN *)p2_mem_08;
+
+            while ((mem_cmp  == DEF_YES) &&                     /* Cmp mem bufs while identical & ...                   */
+                   (size_rem >= sizeof(CPU_ALIGN))) {           /* ... mem bufs aligned on CPU_ALIGN word boundaries.   */
+                p1_mem_align--;
+                p2_mem_align--;
+                if (*p1_mem_align != *p2_mem_align) {           /* If ANY data octet(s) NOT identical, cmp fails.       */
+                     mem_cmp = DEF_NO;
+                }
+                size_rem -= sizeof(CPU_ALIGN);
+            }
+
+            p1_mem_08 = (CPU_INT08U *)p1_mem_align;
+            p2_mem_08 = (CPU_INT08U *)p2_mem_align;
+        }
+    }
+
+    while ((mem_cmp == DEF_YES) &&                              /* Cmp mem bufs while identical ...                     */
+           (size_rem > 0)) {                                    /* ... for unaligned mem bufs or trailing octets.       */
+        p1_mem_08--;
+        p2_mem_08--;
+        if (*p1_mem_08 != *p2_mem_08) {                         /* If ANY data octet(s) NOT identical, cmp fails.       */
+             mem_cmp = DEF_NO;
+        }
+        size_rem -= sizeof(CPU_INT08U);
+    }
+
+    return (mem_cmp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Mem_HeapAlloc()
+*
+* Description : Allocates a memory block from the heap memory segment.
+*
+* Argument(s) : size            Size      of memory block to allocate (in bytes).
+*
+*               align           Alignment of memory block to specific word boundary (in bytes).
+*
+*               p_bytes_reqd    Optional pointer to a variable to ... :
+*
+*                                   (a) Return the number of bytes required to successfully
+*                                           allocate the memory block, if any error(s);
+*                                   (b) Return 0, otherwise.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_NONE                Operation was successful.
+*                                   LIB_MEM_ERR_HEAP_EMPTY          No more memory available on heap.
+*
+*                                   ---------------------RETURNED BY Mem_SegAllocInternal()---------------------
+*                                   LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory block alignment requested.
+*                                   LIB_MEM_ERR_INVALID_MEM_SIZE    Invalid memory block size specified.
+*                                   LIB_MEM_ERR_NULL_PTR            Error or segment data pointer NULL.
+*
+* Return(s)   : Pointer to memory block, if NO error(s).
+*
+*               Pointer to NULL,         otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*               (2) This function is DEPRECATED and will be removed in a future version of this product.
+*                   Mem_SegAlloc(), Mem_SegAllocExt() or Mem_SegAllocHW() should be used instead.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+void  *Mem_HeapAlloc (CPU_SIZE_T   size,
+                      CPU_SIZE_T   align,
+                      CPU_SIZE_T  *p_bytes_reqd,
+                      LIB_ERR     *p_err)
+{
+    void  *p_mem;
+
+
+    p_mem = Mem_SegAllocInternal(DEF_NULL,
+                                &Mem_SegHeap,
+                                 size,
+                                 align,
+                                 LIB_MEM_CFG_HEAP_PADDING_ALIGN,
+                                 p_bytes_reqd,
+                                 p_err);
+    if (*p_err == LIB_MEM_ERR_SEG_OVF) {
+       *p_err = LIB_MEM_ERR_HEAP_OVF;
+    }
+
+    return (p_mem);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        Mem_HeapGetSizeRem()
+*
+* Description : Gets remaining heap memory size available to allocate.
+*
+* Argument(s) : align       Desired word boundary alignment (in bytes) to return remaining memory size from.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function
+*
+*                               LIB_MEM_ERR_NONE                Operation was successful.
+*
+*                               --------------------RETURNED BY Mem_SegRemSizeGet()--------------------
+*                               LIB_MEM_ERR_NULL_PTR            Segment data pointer NULL.
+*                               LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory alignment.
+*
+* Return(s)   : Remaining heap memory size (in bytes), if NO error(s).
+*
+*               0,                                     otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) This function is DEPRECATED and will be removed in a future version of this product.
+*                   Mem_SegRemSizeGet() should be used instead.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+CPU_SIZE_T  Mem_HeapGetSizeRem (CPU_SIZE_T   align,
+                                LIB_ERR     *p_err)
+{
+    CPU_SIZE_T  rem_size;
+
+
+    rem_size = Mem_SegRemSizeGet(&Mem_SegHeap,
+                                  align,
+                                  DEF_NULL,
+                                  p_err);
+    if (*p_err != LIB_MEM_ERR_NONE) {
+        return (0u);
+    }
+
+    return (rem_size);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            Mem_SegCreate()
+*
+* Description : Creates a new memory segment to be used for runtime memory allocation.
+*
+* Argument(s) : p_name          Pointer to segment name.
+*
+*               p_seg           Pointer to segment data. Must be allocated by caller.
+*
+*               seg_base_addr   Address of segment's first byte.
+*
+*               size            Total size of segment, in bytes.
+*
+*               padding_align   Padding alignment, in bytes, that will be added to any allocated buffer from
+*                               this memory segment. MUST be a power of 2. LIB_MEM_PADDING_ALIGN_NONE
+*                               means no padding.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_NONE                    Operation was successful.
+*                                   LIB_MEM_ERR_INVALID_SEG_SIZE        Invalid segment size specified.
+*                                   LIB_MEM_ERR_INVALID_MEM_ALIGN       Invalid padding alignment.
+*                                   LIB_MEM_ERR_NULL_PTR                Error or segment data pointer NULL.
+*
+*                                   -------------------RETURNED BY Mem_SegOverlapChkCritical()-------------------
+*                                   LIB_MEM_ERR_INVALID_SEG_OVERLAP     Segment overlaps another existing segment.
+*                                   LIB_MEM_ERR_INVALID_SEG_EXISTS      Segment already exists.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) New segments are checked for overlap with existing segments. A critical section needs
+*                   to be maintained during the whole list search and add procedure to prevent a reentrant
+*                   call from creating another segment overlapping with the one being added.
+*********************************************************************************************************
+*/
+
+void  Mem_SegCreate (const  CPU_CHAR    *p_name,
+                            MEM_SEG     *p_seg,
+                            CPU_ADDR     seg_base_addr,
+                            CPU_SIZE_T   size,
+                            CPU_SIZE_T   padding_align,
+                            LIB_ERR     *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {                                    /* Chk for null err ptr.                                */
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_seg == DEF_NULL) {                                    /* Chk for null seg ptr.                                */
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+    }
+
+    if (size < 1u) {                                            /* Chk for invalid sized seg.                           */
+       *p_err = LIB_MEM_ERR_INVALID_SEG_SIZE;
+        return;
+    }
+                                                                /* Chk for addr space ovf.                              */
+    if (seg_base_addr + (size - 1u) < seg_base_addr) {
+       *p_err = LIB_MEM_ERR_INVALID_SEG_SIZE;
+        return;
+    }
+
+    if ((padding_align               != LIB_MEM_PADDING_ALIGN_NONE) &&
+        (MATH_IS_PWR2(padding_align) != DEF_YES)) {
+       *p_err = LIB_MEM_ERR_INVALID_MEM_ALIGN;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    (void)Mem_SegOverlapChkCritical(seg_base_addr,              /* Chk for overlap.                                     */
+                                    size,
+                                    p_err);
+    if (*p_err != LIB_MEM_ERR_NONE) {
+        CPU_CRITICAL_EXIT();
+        return;
+    }
+#endif
+
+    Mem_SegCreateCritical(p_name,                               /* Create seg.                                          */
+                          p_seg,
+                          seg_base_addr,
+                          padding_align,
+                          size);
+    CPU_CRITICAL_EXIT();
+
+   *p_err = LIB_MEM_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            Mem_SegClr()
+*
+* Description : Clears a memory segment.
+*
+* Argument(s) : p_seg           Pointer to segment data. Must be allocated by caller.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                               LIB_MEM_ERR_NONE                Operation was successful.
+*                               LIB_MEM_ERR_NULL_PTR            Segment data pointer NULL.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) This function must be used with extreme caution. It must only be called on memory
+*                   segments that are no longer used.
+*
+*               (2) This function is disabled when debug mode is enabled to avoid heap memory leaks.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_DISABLED)
+void  Mem_SegClr (MEM_SEG  *p_seg,
+                  LIB_ERR  *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {                                    /* Chk for null err ptr.                                */
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_seg == DEF_NULL) {                                    /* Chk for null seg ptr.                                */
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    p_seg->AddrNext = p_seg->AddrBase;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = LIB_MEM_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         Mem_SegRemSizeGet()
+*
+* Description : Gets free space of memory segment.
+*
+* Argument(s) : p_seg       Pointer to segment data.
+*
+*               align       Alignment in bytes to assume for calculation of free space.
+*
+*               p_seg_info  Pointer to structure that will receive further segment info data (used size,
+*                           total size, base address and next allocation address).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                           LIB_MEM_ERR_NONE                Operation was successful.
+*                           LIB_MEM_ERR_NULL_PTR            Segment data pointer NULL.
+*                           LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory alignment.
+*
+* Return(s)   : Memory segment remaining size in bytes,     if successful.
+*               0,                                          otherwise or if memory segment empty.
+*
+* Caller(s)   : Application,
+*               Mem_HeapGetSizeRem(),
+*               Mem_OutputUsage().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  Mem_SegRemSizeGet (MEM_SEG       *p_seg,
+                               CPU_SIZE_T     align,
+                               MEM_SEG_INFO  *p_seg_info,
+                               LIB_ERR       *p_err)
+{
+    CPU_SIZE_T  rem_size;
+    CPU_SIZE_T  total_size;
+    CPU_SIZE_T  used_size;
+    CPU_ADDR    next_addr_align;
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {                                    /* Chk for null err ptr.                                */
+        CPU_SW_EXCEPTION(0);
+    }
+
+    if (MATH_IS_PWR2(align) != DEF_YES) {                       /* Chk for invalid align val.                           */
+       *p_err = LIB_MEM_ERR_INVALID_MEM_ALIGN;
+        return (0u);
+    }
+#endif
+
+    if (p_seg == DEF_NULL) {                                    /* Dflt to heap in case p_seg is null.                  */
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+        p_seg = &Mem_SegHeap;
+#else
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return (0u);
+#endif
+    }
+
+    CPU_CRITICAL_ENTER();                                       /* Calc seg stats.                                      */
+    next_addr_align = MATH_ROUND_INC_UP_PWR2(p_seg->AddrNext, align);
+    CPU_CRITICAL_EXIT();
+
+    total_size = (p_seg->AddrEnd  - p_seg->AddrBase) + 1u;
+    used_size  =  p_seg->AddrNext - p_seg->AddrBase;
+
+    if (next_addr_align > p_seg->AddrEnd){
+        next_addr_align = 0u;
+        rem_size        = 0u;
+    } else {
+        rem_size        = total_size - (next_addr_align - p_seg->AddrBase);
+    }
+
+    if (p_seg_info != DEF_NULL) {
+        p_seg_info->TotalSize     = total_size;
+        p_seg_info->UsedSize      = used_size;
+        p_seg_info->AddrBase      = p_seg->AddrBase;
+        p_seg_info->AddrNextAlloc = next_addr_align;
+    }
+
+   *p_err = LIB_MEM_ERR_NONE;
+
+    return (rem_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            Mem_SegAlloc()
+*
+* Description : Allocates memory from specified segment. Returned memory block will be aligned on a CPU
+*               word boundary.
+*
+* Argument(s) : p_name  Pointer to allocated object name. Used for allocations tracking. May be DEF_NULL.
+*
+*               p_seg   Pointer to segment from which to allocate memory. Will be allocated from
+*                       general-purpose heap if null.
+*
+*               size    Size of memory block to allocate, in bytes.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           LIB_MEM_ERR_NONE                Operation was successful.
+*
+*                           ------------------RETURNED BY Mem_SegAllocInternal()-------------------
+*                           LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory block alignment requested.
+*                           LIB_MEM_ERR_INVALID_MEM_SIZE    Invalid memory block size specified.
+*                           LIB_MEM_ERR_NULL_PTR            Error or segment data pointer NULL.
+*                           LIB_MEM_ERR_SEG_OVF             Allocation would overflow memory segment.
+*
+* Return(s)   : Pointer to allocated memory block, if successful.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) The memory block returned  by this function will be aligned on a word boundary. In
+*                   order to specify a specific alignment value, use either Mem_SegAllocExt() or
+*                   Mem_SegAllocHW().
+*********************************************************************************************************
+*/
+
+void  *Mem_SegAlloc (const  CPU_CHAR    *p_name,
+                            MEM_SEG     *p_seg,
+                            CPU_SIZE_T   size,
+                            LIB_ERR     *p_err)
+{
+    void  *p_blk;
+
+
+    if (p_seg == DEF_NULL) {                                    /* Alloc from heap if p_seg is null.                    */
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+        p_seg = &Mem_SegHeap;
+#else
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return (DEF_NULL);
+#endif
+    }
+
+    p_blk = Mem_SegAllocInternal(p_name,
+                                 p_seg,
+                                 size,
+                                 sizeof(CPU_ALIGN),
+                                 LIB_MEM_PADDING_ALIGN_NONE,
+                                 DEF_NULL,
+                                 p_err);
+
+    return (p_blk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Mem_SegAllocExt()
+*
+* Description : Allocates memory from specified memory segment.
+*
+* Argument(s) : p_name          Pointer to allocated object name. Used for allocations tracking. May be DEF_NULL.
+*
+*               p_seg           Pointer to segment from which to allocate memory. Will be allocated from
+*                               general-purpose heap if null.
+*
+*               size            Size of memory block to allocate, in bytes.
+*
+*               align           Required alignment of memory block, in bytes. MUST be a power of 2.
+*
+*               p_bytes_reqd    Pointer to variable that will receive the number of free bytes missing for
+*                               the allocation to succeed. Set to DEF_NULL to skip calculation.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_NONE                Operation was successful.
+*
+*                                   ------------------RETURNED BY Mem_SegAllocInternal()-------------------
+*                                   LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory block alignment requested.
+*                                   LIB_MEM_ERR_INVALID_MEM_SIZE    Invalid memory block size specified.
+*                                   LIB_MEM_ERR_NULL_PTR            Error or segment data pointer NULL.
+*                                   LIB_MEM_ERR_SEG_OVF             Allocation would overflow memory segment.
+*
+* Return(s)   : Pointer to allocated memory block, if successful.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *Mem_SegAllocExt (const  CPU_CHAR    *p_name,
+                               MEM_SEG     *p_seg,
+                               CPU_SIZE_T   size,
+                               CPU_SIZE_T   align,
+                               CPU_SIZE_T  *p_bytes_reqd,
+                               LIB_ERR     *p_err)
+{
+    void  *p_blk;
+
+
+    if (p_seg == DEF_NULL) {                                    /* Alloc from heap if p_seg is null.                    */
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+        p_seg = &Mem_SegHeap;
+#else
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return (DEF_NULL);
+#endif
+    }
+
+    p_blk = Mem_SegAllocInternal(p_name,
+                                 p_seg,
+                                 size,
+                                 align,
+                                 LIB_MEM_PADDING_ALIGN_NONE,
+                                 p_bytes_reqd,
+                                 p_err);
+
+    return (p_blk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Mem_SegAllocHW()
+*
+* Description : Allocates memory from specified segment. The returned buffer will be padded in function
+*               of memory segment's properties.
+*
+* Argument(s) : p_name          Pointer to allocated object name. Used for allocations tracking. May be DEF_NULL.
+*
+*               p_seg           Pointer to segment from which to allocate memory. Will be allocated from
+*                               general-purpose heap if null.
+*
+*               size            Size of memory block to allocate, in bytes.
+*
+*               align           Required alignment of memory block, in bytes. MUST be a power of 2.
+*
+*               p_bytes_reqd    Pointer to variable that will receive the number of free bytes missing for
+*                               the allocation to succeed. Set to DEF_NULL to skip calculation.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_NONE                Operation was successful.
+*
+*                                   ------------------RETURNED BY Mem_SegAllocInternal()-------------------
+*                                   LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory block alignment requested.
+*                                   LIB_MEM_ERR_INVALID_MEM_SIZE    Invalid memory block size specified.
+*                                   LIB_MEM_ERR_NULL_PTR            Error or segment data pointer NULL.
+*                                   LIB_MEM_ERR_SEG_OVF             Allocation would overflow memory segment.
+*
+* Return(s)   : Pointer to allocated memory block, if successful.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *Mem_SegAllocHW (const  CPU_CHAR    *p_name,
+                              MEM_SEG     *p_seg,
+                              CPU_SIZE_T   size,
+                              CPU_SIZE_T   align,
+                              CPU_SIZE_T  *p_bytes_reqd,
+                              LIB_ERR     *p_err)
+{
+    void  *p_blk;
+
+
+    if (p_seg == DEF_NULL) {                                    /* Alloc from heap if p_seg is null.                    */
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+        p_seg = &Mem_SegHeap;
+#else
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return (DEF_NULL);
+#endif
+    }
+
+    p_blk = Mem_SegAllocInternal(p_name,
+                                 p_seg,
+                                 size,
+                                 align,
+                                 p_seg->PaddingAlign,
+                                 p_bytes_reqd,
+                                 p_err);
+
+    return (p_blk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Mem_PoolCreate()
+*
+* Description : (1) Creates a memory pool :
+*
+*                   (a) Create    memory pool from heap or dedicated memory
+*                   (b) Allocate  memory pool memory blocks
+*                   (c) Configure memory pool
+*
+*
+* Argument(s) : p_pool          Pointer to a memory pool structure to create (see Note #1).
+*
+*               p_mem_base      Memory pool segment base address :
+*
+*                                       (a)     Null address    Memory pool allocated from general-purpose heap.
+*                                       (b) Non-null address    Memory pool allocated from dedicated memory
+*                                                                   specified by its base address.
+*
+*               mem_size        Size      of memory pool segment          (in bytes).
+*
+*               blk_nbr         Number    of memory pool blocks to create.
+*
+*               blk_size        Size      of memory pool blocks to create (in bytes).
+*
+*               blk_align       Alignment of memory pool blocks to specific word boundary (in bytes).
+*
+*               p_bytes_reqd    Optional pointer to a variable to ... :
+*
+*                                   (a) Return the number of bytes required to successfully
+*                                               allocate the memory pool, if any error(s);
+*                                   (b) Return 0, otherwise.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_NONE                    Operation was successful.
+*                                   LIB_MEM_ERR_NULL_PTR                Pointer to memory pool is null.
+*                                   LIB_MEM_ERR_INVALID_BLK_ALIGN       Invalid block alignment requested.
+*                                   LIB_MEM_ERR_INVALID_BLK_NBR         Invalid number of blocks specified.
+*                                   LIB_MEM_ERR_INVALID_BLK_SIZE        Invalid block size specified.
+*                                   LIB_MEM_ERR_INVALID_SEG_SIZE        Invalid segment size.
+*                                   LIB_MEM_ERR_HEAP_EMPTY              No more memory available on heap.
+*
+*                                   ---------------RETURNED BY Mem_SegOverlapChkCritical()----------------
+*                                   LIB_MEM_ERR_INVALID_SEG_EXISTS      Segment already exists.
+*                                   LIB_MEM_ERR_INVALID_SEG_OVERLAP     Segment overlaps another existing segment.
+*
+*                                   -----------------RETURNED BY Mem_SegAllocExtCritical()-----------------
+*                                   LIB_MEM_ERR_SEG_OVF                 Allocation would overflow memory segment.
+*
+*                                   ------------------RETURNED BY Mem_SegAllocInternal()-------------------
+*                                   LIB_MEM_ERR_INVALID_MEM_ALIGN       Invalid memory block alignment requested.
+*                                   LIB_MEM_ERR_INVALID_MEM_SIZE        Invalid memory block size specified.
+*                                   LIB_MEM_ERR_NULL_PTR                Error or segment data pointer NULL.
+*                                   LIB_MEM_ERR_SEG_OVF                 Allocation would overflow memory segment.
+*
+*                                   -----------------------RETURNED BY Mem_PoolClr()-----------------------
+*                                   LIB_MEM_ERR_NULL_PTR                Argument 'p_pool' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) This function is DEPRECATED and will be removed in a future version of this product.
+*                   Mem_DynPoolCreate() or Mem_DynPoolCreateHW() should be used instead.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+void  Mem_PoolCreate (MEM_POOL          *p_pool,
+                      void              *p_mem_base,
+                      CPU_SIZE_T         mem_size,
+                      MEM_POOL_BLK_QTY   blk_nbr,
+                      CPU_SIZE_T         blk_size,
+                      CPU_SIZE_T         blk_align,
+                      CPU_SIZE_T        *p_bytes_reqd,
+                      LIB_ERR           *p_err)
+{
+    MEM_SEG           *p_seg;
+    void              *p_pool_mem;
+    CPU_SIZE_T         pool_size;
+    CPU_SIZE_T         blk_size_align;
+    CPU_ADDR           pool_addr_end;
+    MEM_POOL_BLK_QTY   blk_ix;
+    CPU_INT08U        *p_blk;
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+                                                                /* ------------- VALIDATE MEM POOL CREATE ------------- */
+    if (p_pool == DEF_NULL) {
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+    }
+
+    if (p_mem_base != DEF_NULL) {
+        if (mem_size < 1u) {
+           *p_err = LIB_MEM_ERR_INVALID_SEG_SIZE;
+            return;
+        }
+    }
+
+    if (blk_nbr < 1u) {
+       *p_err = LIB_MEM_ERR_INVALID_BLK_NBR;
+        return;
+    }
+
+    if (blk_size < 1u) {
+       *p_err = LIB_MEM_ERR_INVALID_BLK_SIZE;
+        return;
+    }
+
+    if (MATH_IS_PWR2(blk_align) != DEF_YES) {                   /* Chk that req alignment is a pwr of 2.                */
+       *p_err = LIB_MEM_ERR_INVALID_BLK_ALIGN;
+        return;
+    }
+#endif
+
+    Mem_PoolClr(p_pool, p_err);                                 /* Init mem pool.                                       */
+    if (*p_err != LIB_MEM_ERR_NONE) {
+         return;
+    }
+
+                                                                /* -------- DETERMINE AND/OR ALLOC SEG TO USE --------- */
+    if (p_mem_base == DEF_NULL) {                               /* Use heap seg.                                        */
+        p_seg = &Mem_SegHeap;
+    } else {                                                    /* Use other seg.                                       */
+        CPU_CRITICAL_ENTER();
+        p_seg = Mem_SegOverlapChkCritical((CPU_ADDR)p_mem_base,
+                                                    mem_size,
+                                                    p_err);
+        switch (*p_err) {
+            case LIB_MEM_ERR_INVALID_SEG_EXISTS:                /* Seg already exists.                                  */
+                 break;
+
+            case LIB_MEM_ERR_NONE:                              /* Seg must be created.                                 */
+                 p_seg = (MEM_SEG *)Mem_SegAllocExtCritical(&Mem_SegHeap,
+                                                             sizeof(MEM_SEG),
+                                                             sizeof(CPU_ALIGN),
+                                                             LIB_MEM_PADDING_ALIGN_NONE,
+                                                             p_bytes_reqd,
+                                                             p_err);
+                 if (*p_err != LIB_MEM_ERR_NONE) {
+                     CPU_CRITICAL_EXIT();
+                     return;
+                 }
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)                    /* Track alloc if req'd.                                */
+                 Mem_SegAllocTrackCritical("Unknown segment data",
+                                           &Mem_SegHeap,
+                                            sizeof(MEM_SEG),
+                                            p_err);
+                 if (*p_err != LIB_MEM_ERR_NONE) {
+                     CPU_CRITICAL_EXIT();
+                     return;
+                 }
+#endif
+
+                 Mem_SegCreateCritical(          DEF_NULL,
+                                                 p_seg,
+                                       (CPU_ADDR)p_mem_base,
+                                                 LIB_MEM_PADDING_ALIGN_NONE,
+                                                 mem_size);
+                 break;
+
+
+            case LIB_MEM_ERR_INVALID_SEG_OVERLAP:
+            default:
+                 CPU_CRITICAL_EXIT();
+                 return;                                        /* Prevent 'break NOT reachable' compiler warning.      */
+        }
+
+        CPU_CRITICAL_EXIT();
+    }
+
+
+                                                                /* ---------------- ALLOC MEM FOR POOL ---------------- */
+                                                                /* Calc blk size with align.                            */
+    blk_size_align =  MATH_ROUND_INC_UP_PWR2(blk_size, blk_align);
+    pool_size      =  blk_size_align * blk_nbr;                 /* Calc required size for pool.                         */
+
+                                                                /* Alloc mem for pool.                                  */
+    p_pool_mem = (void *)Mem_SegAllocInternal("Unnamed static pool",
+                                               p_seg,
+                                               pool_size,
+                                               blk_align,
+                                               LIB_MEM_PADDING_ALIGN_NONE,
+                                               p_bytes_reqd,
+                                               p_err);
+    if (*p_err != LIB_MEM_ERR_NONE) {
+        return;
+    }
+
+                                                                /* ------------ ALLOC MEM FOR FREE BLK TBL ------------ */
+    p_pool->BlkFreeTbl = (void **)Mem_SegAllocInternal("Unnamed static pool free blk tbl",
+                                                       &Mem_SegHeap,
+                                                        blk_nbr * sizeof(void *),
+                                                        sizeof(CPU_ALIGN),
+                                                        LIB_MEM_PADDING_ALIGN_NONE,
+                                                        p_bytes_reqd,
+                                                        p_err);
+    if (*p_err != LIB_MEM_ERR_NONE) {
+        return;
+    }
+
+                                                                /* ------------------ INIT BLK LIST ------------------- */
+    p_blk = (CPU_INT08U *)p_pool_mem;
+    for (blk_ix = 0; blk_ix < blk_nbr; blk_ix++) {
+        p_pool->BlkFreeTbl[blk_ix]  = p_blk;
+        p_blk                      += blk_size_align;
+    }
+
+
+                                                                /* ------------------ INIT POOL DATA ------------------ */
+    pool_addr_end         = (CPU_ADDR)p_pool_mem + (pool_size - 1u);
+    p_pool->PoolAddrStart =  p_pool_mem;
+    p_pool->PoolAddrEnd   = (void *)pool_addr_end;
+    p_pool->BlkNbr        =  blk_nbr;
+    p_pool->BlkSize       =  blk_size_align;
+    p_pool->BlkFreeTblIx  =  blk_nbr;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            Mem_PoolClr()
+*
+* Description : Clears a memory pool (see Note #1).
+*
+* Argument(s) : p_pool   Pointer to a memory pool structure to clear (see Note #2).
+*
+*               p_err    Pointer to variable that will receive the return error code from this function :
+*
+*                               LIB_MEM_ERR_NONE                Operation was successful.
+*                               LIB_MEM_ERR_NULL_PTR            Argument 'p_pool' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application,
+*               Mem_PoolCreate().
+*
+* Note(s)     : (1) (a) Mem_PoolClr() ONLY clears a memory pool structure's variables & should ONLY be
+*                       called to initialize a memory pool structure prior to calling Mem_PoolCreate().
+*
+*                   (b) Mem_PoolClr() does NOT deallocate memory from the memory pool or deallocate the
+*                       memory pool itself & MUST NOT be called after calling Mem_PoolCreate() since
+*                       this will likely corrupt the memory pool management.
+*
+*               (2) Assumes 'p_pool' points to a valid memory pool (if non-NULL).
+*
+*               (3) This function is DEPRECATED and will be removed in a future version of this product.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+void  Mem_PoolClr (MEM_POOL  *p_pool,
+                   LIB_ERR   *p_err)
+{
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE RTN ERR  PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+                                                                /* -------------- VALIDATE MEM POOL PTR --------------- */
+    if (p_pool == DEF_NULL) {
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+    p_pool->PoolAddrStart = DEF_NULL;
+    p_pool->PoolAddrEnd   = DEF_NULL;
+    p_pool->BlkSize       = 0u;
+    p_pool->BlkNbr        = 0u;
+    p_pool->BlkFreeTbl    = DEF_NULL;
+    p_pool->BlkFreeTblIx  = 0u;
+
+   *p_err = LIB_MEM_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          Mem_PoolBlkGet()
+*
+* Description : Gets a memory block from memory pool.
+*
+* Argument(s) : p_pool  Pointer to  memory pool to get memory block from.
+*
+*               size    Size of requested memory (in bytes).
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           LIB_MEM_ERR_NONE                Operation was successful.
+*                           LIB_MEM_ERR_INVALID_BLK_SIZE    Invalid memory pool block size requested.
+*                           LIB_MEM_ERR_NULL_PTR            Argument 'p_pool' passed a NULL pointer.
+*                           LIB_MEM_ERR_POOL_EMPTY          NO memory blocks available in memory pool.
+*
+* Return(s)   : Pointer to memory block, if NO error(s).
+*
+*               Pointer to NULL,         otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) This function is DEPRECATED and will be removed in a future version of this product.
+*                   Mem_DynPoolBlkGet() should be used instead.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+void  *Mem_PoolBlkGet (MEM_POOL    *p_pool,
+                       CPU_SIZE_T   size,
+                       LIB_ERR     *p_err)
+{
+    CPU_INT08U  *p_blk;
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE MEM POOL GET --------------- */
+    if (p_err == DEF_NULL) {                                    /* Validate err ptr.                                    */
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (p_pool == DEF_NULL) {                                   /* Validate pool ptr.                                   */
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return (DEF_NULL);
+    }
+
+    if (size < 1u) {                                            /* Validate req'd size as non-NULL.                     */
+       *p_err = LIB_MEM_ERR_INVALID_BLK_SIZE;
+        return (DEF_NULL);
+    }
+
+    if (size > p_pool->BlkSize) {                               /* Validate req'd size <= mem pool blk size.            */
+       *p_err = LIB_MEM_ERR_INVALID_BLK_SIZE;
+        return (DEF_NULL);
+    }
+#else
+    (void)size;                                                 /* Prevent possible 'variable unused' warning.          */
+#endif
+
+
+                                                                /* -------------- GET MEM BLK FROM POOL --------------- */
+    p_blk = DEF_NULL;
+    CPU_CRITICAL_ENTER();
+    if (p_pool->BlkFreeTblIx > 0u) {
+        p_pool->BlkFreeTblIx                     -=  1u;
+        p_blk                                     = (CPU_INT08U *)p_pool->BlkFreeTbl[p_pool->BlkFreeTblIx];
+        p_pool->BlkFreeTbl[p_pool->BlkFreeTblIx]  =  DEF_NULL;
+    }
+    CPU_CRITICAL_EXIT();
+
+    if (p_blk == DEF_NULL) {
+       *p_err = LIB_MEM_ERR_POOL_EMPTY;
+    } else {
+       *p_err = LIB_MEM_ERR_NONE;
+    }
+
+    return (p_blk);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          Mem_PoolBlkFree()
+*
+* Description : Free a memory block to memory pool.
+*
+* Argument(s) : p_pool  Pointer to memory pool to free memory block.
+*
+*               p_blk   Pointer to memory block address to free.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           LIB_MEM_ERR_NONE                        Operation was successful.
+*                           LIB_MEM_ERR_NULL_PTR                    Argument 'p_pool'/'p_blk' passed
+*                                                                       a NULL pointer.
+*                           LIB_MEM_ERR_INVALID_BLK_ADDR            Invalid memory block address.
+*                           LIB_MEM_ERR_INVALID_BLK_ADDR_IN_POOL            Memory block address already
+*                                                                        in memory pool.
+*                           LIB_MEM_ERR_POOL_FULL                   Pool is full.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) This function is DEPRECATED and will be removed in a future version of this product.
+*                   Mem_DynPoolBlkFree() should be used instead.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+void  Mem_PoolBlkFree (MEM_POOL  *p_pool,
+                       void      *p_blk,
+                       LIB_ERR   *p_err)
+{
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_SIZE_T   tbl_ix;
+    CPU_BOOLEAN  addr_valid;
+#endif
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE MEM POOL FREE -------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_pool == DEF_NULL) {                                   /* Validate mem ptrs.                                   */
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+    }
+
+    if (p_blk == DEF_NULL) {
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+    }
+
+    addr_valid = Mem_PoolBlkIsValidAddr(p_pool, p_blk);         /* Validate mem blk as valid pool blk addr.             */
+    if (addr_valid != DEF_OK) {
+       *p_err = LIB_MEM_ERR_INVALID_BLK_ADDR;
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();                                       /* Make sure blk isn't already in free list.            */
+    for (tbl_ix = 0u; tbl_ix < p_pool->BlkNbr; tbl_ix++) {
+        if (p_pool->BlkFreeTbl[tbl_ix] == p_blk) {
+            CPU_CRITICAL_EXIT();
+           *p_err = LIB_MEM_ERR_INVALID_BLK_ADDR_IN_POOL;
+            return;
+        }
+    }
+#else                                                           /* Double-free possibility if not in critical section.  */
+    CPU_CRITICAL_ENTER();
+#endif
+                                                                /* --------------- FREE MEM BLK TO POOL --------------- */
+    if (p_pool->BlkFreeTblIx >= p_pool->BlkNbr) {
+        CPU_CRITICAL_EXIT();
+       *p_err = LIB_MEM_ERR_POOL_FULL;
+        return;
+    }
+
+    p_pool->BlkFreeTbl[p_pool->BlkFreeTblIx]  = p_blk;
+    p_pool->BlkFreeTblIx                     += 1u;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = LIB_MEM_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      Mem_PoolBlkGetNbrAvail()
+*
+* Description : Get memory pool's remaining number of blocks available to allocate.
+*
+* Argument(s) : p_pool   Pointer to a memory pool structure.
+*
+*               p_err    Pointer to variable that will receive the return error code from this function :
+*
+*                               LIB_MEM_ERR_NONE                Operation was successful.
+*                               LIB_MEM_ERR_NULL_PTR            Argument 'p_pool' passed a NULL pointer.
+*
+* Return(s)   : Remaining memory pool blocks,   if NO error(s).
+*
+*               0,                              otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) This function is DEPRECATED and will be removed in a future version of this product.
+*                   Mem_DynPoolBlkNbrAvailGet() should be used instead.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+MEM_POOL_BLK_QTY  Mem_PoolBlkGetNbrAvail (MEM_POOL  *p_pool,
+                                          LIB_ERR   *p_err)
+{
+    CPU_SIZE_T  nbr_avail;
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(0u);
+    }
+                                                                /* ---------------- VALIDATE MEM POOL ----------------- */
+    if (p_pool == DEF_NULL) {                                   /* Validate mem ptr.                                    */
+       *p_err =  LIB_MEM_ERR_NULL_PTR;
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    nbr_avail = p_pool->BlkFreeTblIx;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = LIB_MEM_ERR_NONE;
+
+    return (nbr_avail);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          Mem_DynPoolCreate()
+*
+* Description : Creates a dynamic memory pool.
+*
+* Argument(s) : p_name          Pointer to pool name.
+*
+*               p_pool          Pointer to pool data.
+*
+*               p_seg           Pointer to segment from which to allocate memory. Will be allocated from
+*                               general-purpose heap if null.
+*
+*               blk_size        Size of memory block to allocate from pool, in bytes. See Note #1.
+*
+*               blk_align       Required alignment of memory block, in bytes. MUST be a power of 2.
+*
+*               blk_qty_init    Initial number of elements to be allocated in pool.
+*
+*               blk_qty_max     Maximum number of elements that can be allocated from this pool. Set to
+*                               LIB_MEM_BLK_QTY_UNLIMITED if no limit.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_NONE                Operation was successful.
+*
+*                                   --------------------RETURNED BY Mem_DynPoolCreateInternal()-------------------
+*                                   LIB_MEM_ERR_INVALID_BLK_ALIGN   Invalid requested block alignment.
+*                                   LIB_MEM_ERR_INVALID_BLK_SIZE    Invalid requested block size.
+*                                   LIB_MEM_ERR_INVALID_BLK_NBR     Invalid requested block quantity max.
+*                                   LIB_MEM_ERR_NULL_PTR            Pool data pointer NULL.
+*                                   LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory block alignment requested.
+*                                   LIB_MEM_ERR_INVALID_MEM_SIZE    Invalid memory block size specified.
+*                                   LIB_MEM_ERR_NULL_PTR            Error or segment data pointer NULL.
+*                                   LIB_MEM_ERR_SEG_OVF             Allocation would overflow memory segment.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'blk_size' must be big enough to fit a pointer since the pointer to the next free
+*                   block is stored in the block itself (only when free/unused).
+*********************************************************************************************************
+*/
+
+void  Mem_DynPoolCreate (const  CPU_CHAR      *p_name,
+                                MEM_DYN_POOL  *p_pool,
+                                MEM_SEG       *p_seg,
+                                CPU_SIZE_T     blk_size,
+                                CPU_SIZE_T     blk_align,
+                                CPU_SIZE_T     blk_qty_init,
+                                CPU_SIZE_T     blk_qty_max,
+                                LIB_ERR       *p_err)
+{
+    if (p_seg == DEF_NULL) {                                    /* Alloc from heap if p_seg is null.                    */
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+        p_seg = &Mem_SegHeap;
+#else
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+#endif
+    }
+
+    Mem_DynPoolCreateInternal(p_name,
+                              p_pool,
+                              p_seg,
+                              blk_size,
+                              blk_align,
+                              LIB_MEM_PADDING_ALIGN_NONE,
+                              blk_qty_init,
+                              blk_qty_max,
+                              p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Mem_DynPoolCreateHW()
+*
+* Description : Creates a dynamic memory pool. Memory blocks will be padded according to memory segment's
+*               properties.
+*
+* Argument(s) : p_name          Pointer to pool name.
+*
+*               p_pool          Pointer to pool data.
+*
+*               p_seg           Pointer to segment from which to allocate memory. Will allocate from
+*                               general-purpose heap if null.
+*
+*               blk_size        Size of memory block to allocate from pool, in bytes. See Note #1.
+*
+*               blk_align       Required alignment of memory block, in bytes. MUST be a power of 2.
+*
+*               blk_qty_init    Initial number of elements to be allocated in pool.
+*
+*               blk_qty_max     Maximum number of elements that can be allocated from this pool. Set to
+*                               LIB_MEM_BLK_QTY_UNLIMITED if no limit.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_NONE                Operation was successful.
+*
+*                                   -------------------RETURNED BY Mem_DynPoolCreateInternal()-------------------
+*                                   LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory block alignment requested.
+*                                   LIB_MEM_ERR_INVALID_MEM_SIZE    Invalid memory block size specified.
+*                                   LIB_MEM_ERR_NULL_PTR            Error or segment data pointer NULL.
+*                                   LIB_MEM_ERR_SEG_OVF             Allocation would overflow memory segment.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) 'blk_size' must be big enough to fit a pointer since the pointer to the next free
+*                   block is stored in the block itself (only when free/unused).
+*********************************************************************************************************
+*/
+
+void  Mem_DynPoolCreateHW (const  CPU_CHAR      *p_name,
+                                  MEM_DYN_POOL  *p_pool,
+                                  MEM_SEG       *p_seg,
+                                  CPU_SIZE_T     blk_size,
+                                  CPU_SIZE_T     blk_align,
+                                  CPU_SIZE_T     blk_qty_init,
+                                  CPU_SIZE_T     blk_qty_max,
+                                  LIB_ERR       *p_err)
+{
+    if (p_seg == DEF_NULL) {                                    /* Alloc from heap if p_seg is null.                    */
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+        p_seg = &Mem_SegHeap;
+#else
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+#endif
+    }
+
+    Mem_DynPoolCreateInternal(p_name,
+                              p_pool,
+                              p_seg,
+                              blk_size,
+                              blk_align,
+                              p_seg->PaddingAlign,
+                              blk_qty_init,
+                              blk_qty_max,
+                              p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Mem_DynPoolBlkGet()
+*
+* Description : Gets a memory block from specified pool, growing it if needed.
+*
+* Argument(s) : p_pool  Pointer to pool data.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           LIB_MEM_ERR_NONE                    Operation was successful.
+*                           LIB_MEM_ERR_NULL_PTR                Pool data pointer NULL.
+*                           LIB_MEM_ERR_POOL_EMPTY              Pools is empty.
+*
+*                           ----------------------RETURNED BY Mem_SegAllocInternal()-----------------------
+*                           LIB_MEM_ERR_INVALID_MEM_ALIGN       Invalid memory block alignment requested.
+*                           LIB_MEM_ERR_INVALID_MEM_SIZE        Invalid memory block size specified.
+*                           LIB_MEM_ERR_NULL_PTR                Error or segment data pointer NULL.
+*                           LIB_MEM_ERR_SEG_OVF                 Allocation would overflow memory segment.
+*
+* Return(s)   : Pointer to memory block, if successful.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *Mem_DynPoolBlkGet (MEM_DYN_POOL  *p_pool,
+                          LIB_ERR       *p_err)
+{
+           void      *p_blk;
+    const  CPU_CHAR  *p_pool_name;
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {                                    /* Chk for NULL err ptr.                                */
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (p_pool == DEF_NULL) {                                   /* Chk for NULL pool data ptr.                          */
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return (DEF_NULL);
+    }
+#endif
+
+                                                                /* Ensure pool is not empty if qty is limited.          */
+    if (p_pool->BlkQtyMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+        CPU_CRITICAL_ENTER();
+        if (p_pool->BlkAllocCnt >= p_pool->BlkQtyMax) {
+            CPU_CRITICAL_EXIT();
+
+           *p_err = LIB_MEM_ERR_POOL_EMPTY;
+            return (DEF_NULL);
+        }
+
+        p_pool->BlkAllocCnt++;
+        CPU_CRITICAL_EXIT();
+    }
+
+                                                                /* --------------- ALLOC FROM FREE LIST --------------- */
+    CPU_CRITICAL_ENTER();
+    if (p_pool->BlkFreePtr != DEF_NULL) {
+        p_blk              = p_pool->BlkFreePtr;
+        p_pool->BlkFreePtr = *((void **)p_blk);
+        CPU_CRITICAL_EXIT();
+
+       *p_err = LIB_MEM_ERR_NONE;
+
+        return (p_blk);
+    }
+    CPU_CRITICAL_EXIT();
+
+                                                                /* ------------------ ALLOC NEW BLK ------------------- */
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
+    p_pool_name = p_pool->NamePtr;
+#else
+    p_pool_name = DEF_NULL;
+#endif
+    p_blk = Mem_SegAllocInternal(p_pool_name,
+                                 p_pool->PoolSegPtr,
+                                 p_pool->BlkSize,
+                                 p_pool->BlkAlign,
+                                 p_pool->BlkPaddingAlign,
+                                 DEF_NULL,
+                                 p_err);
+    if (*p_err != LIB_MEM_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    return (p_blk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Mem_DynPoolBlkFree()
+*
+* Description : Frees memory block, making it available for future use.
+*
+* Argument(s) : p_pool  Pointer to pool data.
+*
+*               p_blk   Pointer to first byte of memory block.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           LIB_MEM_ERR_NONE        Operation was successful.
+*                           LIB_MEM_ERR_NULL_PTR    'p_pool' or 'p_blk' pointer passed is NULL.
+*                           LIB_MEM_ERR_POOL_FULL   Pool is full.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  Mem_DynPoolBlkFree (MEM_DYN_POOL  *p_pool,
+                          void          *p_blk,
+                          LIB_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {                                    /* Chk for NULL err ptr.                                */
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_pool == DEF_NULL) {                                   /* Chk for NULL pool data ptr.                          */
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+    }
+
+    if (p_blk == DEF_NULL) {
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+    if (p_pool->BlkQtyMax != LIB_MEM_BLK_QTY_UNLIMITED) {       /* Ensure pool is not full.                             */
+        CPU_CRITICAL_ENTER();
+        if (p_pool->BlkAllocCnt == 0u) {
+            CPU_CRITICAL_EXIT();
+
+           *p_err = LIB_MEM_ERR_POOL_FULL;
+            return;
+        }
+
+        p_pool->BlkAllocCnt--;
+        CPU_CRITICAL_EXIT();
+    }
+
+    CPU_CRITICAL_ENTER();
+   *((void **)p_blk)   = p_pool->BlkFreePtr;
+    p_pool->BlkFreePtr = p_blk;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = LIB_MEM_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     Mem_DynPoolBlkNbrAvailGet()
+*
+* Description : Gets number of available blocks in dynamic memory pool. This call will fail with a
+*               dynamic memory pool for which no limit was set at creation.
+*
+* Argument(s) : p_pool  Pointer to pool data.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           LIB_MEM_ERR_NONE                Operation was successful.
+*                           LIB_MEM_ERR_NULL_PTR            'p_pool' pointer passed is NULL.
+*                           LIB_MEM_ERR_POOL_UNLIMITED      Pool has no specified limit.
+*
+* Return(s)   : Number of blocks available in dynamic memory pool, if successful.
+*
+*               0, if pool is empty or if an error occurred.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  Mem_DynPoolBlkNbrAvailGet (MEM_DYN_POOL  *p_pool,
+                                       LIB_ERR       *p_err)
+{
+    CPU_SIZE_T  blk_nbr_avail;
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {                                    /* Chk for NULL err ptr.                                */
+        CPU_SW_EXCEPTION(0);
+    }
+
+    if (p_pool == DEF_NULL) {                                   /* Chk for NULL pool data ptr.                          */
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return (0u);
+    }
+#endif
+
+    if (p_pool->BlkQtyMax != LIB_MEM_BLK_QTY_UNLIMITED) {
+        CPU_CRITICAL_ENTER();
+        blk_nbr_avail = p_pool->BlkQtyMax - p_pool->BlkAllocCnt;
+        CPU_CRITICAL_EXIT();
+
+       *p_err = LIB_MEM_ERR_NONE;
+    } else {
+        blk_nbr_avail = 0u;
+       *p_err         = LIB_MEM_ERR_POOL_UNLIMITED;
+    }
+
+    return (blk_nbr_avail);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Mem_OutputUsage()
+*
+* Description : Outputs memory usage report through 'out_fnct'.
+*
+* Argument(s) : out_fnct        Pointer to output function.
+*
+*               print_details   DEF_YES, if the size of each allocation should be printed.
+*                               DEF_NO,  otherwise.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_NONE                Operation was successful.
+*                                   LIB_MEM_ERR_NULL_PTR            'out_fnct' pointer passed is NULL.
+*
+*                                   ---------------------RETURNED BY Mem_SegRemSizeGet()--------------------
+*                                   LIB_MEM_ERR_NULL_PTR            Segment data pointer NULL.
+*                                   LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory alignment.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
+void  Mem_OutputUsage(void     (*out_fnct) (CPU_CHAR *),
+                      LIB_ERR   *p_err)
+{
+    CPU_CHAR   str[DEF_INT_32U_NBR_DIG_MAX];
+    MEM_SEG   *p_seg;
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {                                    /* Chk for NULL err ptr.                                */
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (out_fnct == DEF_NULL) {                                 /* Chk for NULL out fnct ptr.                           */
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+    out_fnct((CPU_CHAR *)"---------------- Memory allocation info ----------------\r\n");
+    out_fnct((CPU_CHAR *)"| Type    | Size       | Free size  | Name\r\n");
+    out_fnct((CPU_CHAR *)"|---------|------------|------------|-------------------\r\n");
+
+    CPU_CRITICAL_ENTER();
+    p_seg = Mem_SegHeadPtr;
+    while (p_seg != DEF_NULL) {
+        CPU_SIZE_T       rem_size;
+        MEM_SEG_INFO     seg_info;
+        MEM_ALLOC_INFO  *p_alloc;
+
+
+        rem_size = Mem_SegRemSizeGet(p_seg, 1u, &seg_info, p_err);
+        if (*p_err != LIB_MEM_ERR_NONE) {
+            return;
+        }
+
+        out_fnct((CPU_CHAR *)"| Section | ");
+
+        (void)Str_FmtNbr_Int32U(seg_info.TotalSize,
+                                10u,
+                                DEF_NBR_BASE_DEC,
+                                ' ',
+                                DEF_NO,
+                                DEF_YES,
+                               &str[0u]);
+
+        out_fnct(str);
+        out_fnct((CPU_CHAR *)" | ");
+
+        (void)Str_FmtNbr_Int32U(rem_size,
+                                10u,
+                                DEF_NBR_BASE_DEC,
+                                ' ',
+                                DEF_NO,
+                                DEF_YES,
+                               &str[0u]);
+
+        out_fnct(str);
+        out_fnct((CPU_CHAR *)" | ");
+        out_fnct((p_seg->NamePtr != DEF_NULL) ? (CPU_CHAR *)p_seg->NamePtr : (CPU_CHAR *)"Unknown");
+        out_fnct((CPU_CHAR *)"\r\n");
+
+        p_alloc = p_seg->AllocInfoHeadPtr;
+        while (p_alloc != DEF_NULL) {
+            out_fnct((CPU_CHAR *)"| -> Obj  | ");
+
+            (void)Str_FmtNbr_Int32U(p_alloc->Size,
+                                    10u,
+                                    DEF_NBR_BASE_DEC,
+                                    ' ',
+                                    DEF_NO,
+                                    DEF_YES,
+                                   &str[0u]);
+
+            out_fnct(str);
+            out_fnct((CPU_CHAR *)" |            | ");
+
+            out_fnct((p_alloc->NamePtr != DEF_NULL) ? (CPU_CHAR *)p_alloc->NamePtr : (CPU_CHAR *)"Unknown");
+            out_fnct((CPU_CHAR *)"\r\n");
+
+            p_alloc = p_alloc->NextPtr;
+        }
+
+        p_seg = p_seg->NextPtr;
+    }
+    CPU_CRITICAL_EXIT();
+
+   *p_err = LIB_MEM_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       Mem_SegCreateCritical()
+*
+* Description : Creates a new memory segment to be used for runtime memory allocation or dynamic pools.
+*
+* Argument(s) : p_name          Pointer to segment name.
+*
+*               p_seg           Pointer to segment data. Must be allocated by caller.
+*               -----           Argument validated by caller.
+*
+*               seg_base_addr   Segment's first byte address.
+*
+*               padding_align   Padding alignment, in bytes, that will be added to any allocated buffer
+*                               from this memory segment. MUST be a power of 2.
+*                               LIB_MEM_PADDING_ALIGN_NONE means no padding.
+*               -------------   Argument validated by caller.
+*
+*               size            Total size of segment, in bytes.
+*               ----            Argument validated by caller.
+*
+* Return(s)   : Pointer to segment data, if successful.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : Mem_PoolCreate(),
+*               Mem_SegCreate().
+*
+* Note(s)     : (1) This function MUST be called within a CRITICAL_SECTION.
+*********************************************************************************************************
+*/
+
+static  void  Mem_SegCreateCritical(const  CPU_CHAR    *p_name,
+                                           MEM_SEG     *p_seg,
+                                           CPU_ADDR     seg_base_addr,
+                                           CPU_SIZE_T   padding_align,
+                                           CPU_SIZE_T   size)
+{
+    p_seg->AddrBase         =  seg_base_addr;
+    p_seg->AddrEnd          = (seg_base_addr + (size - 1u));
+    p_seg->AddrNext         =  seg_base_addr;
+    p_seg->NextPtr          =  Mem_SegHeadPtr;
+    p_seg->PaddingAlign     =  padding_align;
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
+    p_seg->NamePtr          = p_name;
+    p_seg->AllocInfoHeadPtr = DEF_NULL;
+#else
+    (void)p_name;
+#endif
+
+    Mem_SegHeadPtr = p_seg;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      Mem_SegOverlapChkCritical()
+*
+* Description : Checks if existing memory segment exists or overlaps with specified memory area.
+*
+* Argument(s) : seg_base_addr   Address of first byte of memory area.
+*
+*               size            Size of memory area, in bytes.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               LIB_MEM_ERR_INVALID_SEG_OVERLAP     Segment overlaps another existing segment.
+*                               LIB_MEM_ERR_INVALID_SEG_EXISTS      Segment already exists.
+*
+* Return(s)   : Pointer to memory segment that overlaps.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : Mem_PoolCreate(),
+*               Mem_SegCreate().
+*
+* Note(s)     : (1) This function MUST be called within a CRITICAL_SECTION.
+*********************************************************************************************************
+*/
+
+#if  (LIB_MEM_CFG_HEAP_SIZE      >  0u)
+static  MEM_SEG  *Mem_SegOverlapChkCritical (CPU_ADDR     seg_base_addr,
+                                             CPU_SIZE_T   size,
+                                             LIB_ERR     *p_err)
+{
+    MEM_SEG   *p_seg_chk;
+    CPU_ADDR   seg_new_end;
+    CPU_ADDR   seg_chk_start;
+    CPU_ADDR   seg_chk_end;
+
+
+    seg_new_end = seg_base_addr + (size - 1u);
+    p_seg_chk   = Mem_SegHeadPtr;
+
+    while (p_seg_chk != DEF_NULL) {
+        seg_chk_start = (CPU_ADDR)p_seg_chk->AddrBase;
+        seg_chk_end   = (CPU_ADDR)p_seg_chk->AddrEnd;
+
+        if ((seg_base_addr == seg_chk_start) && (seg_new_end == seg_chk_end)) {
+           *p_err = LIB_MEM_ERR_INVALID_SEG_EXISTS;
+            return (p_seg_chk);
+        } else if (((seg_base_addr >= seg_chk_start) && (seg_base_addr <= seg_chk_end)) ||
+                   ((seg_base_addr <= seg_chk_start) && (seg_new_end   >= seg_chk_start))) {
+           *p_err = LIB_MEM_ERR_INVALID_SEG_OVERLAP;
+            return (p_seg_chk);
+        }
+
+        p_seg_chk = p_seg_chk->NextPtr;
+    }
+
+   *p_err = LIB_MEM_ERR_NONE;
+
+    return (DEF_NULL);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       Mem_SegAllocInternal()
+*
+* Description : Allocates memory from specified segment.
+*
+* Argument(s) : p_name  Pointer to allocated object name. Used for allocations tracking. May be DEF_NULL.
+*
+*               p_seg           Pointer to segment from which to allocate memory.
+*               -----           Argument validated by caller.
+*
+*               size            Size of memory block to allocate, in bytes.
+*
+*               align           Required alignment of memory block, in bytes. MUST be a power of 2.
+*
+*               padding_align   Padding alignment, in bytes, that will be added to any allocated buffer from
+*                               this memory segment. MUST be a power of 2. LIB_MEM_PADDING_ALIGN_NONE
+*                               means no padding.
+*
+*               p_bytes_reqd    Pointer to variable that will receive the number of free bytes missing for
+*                               the allocation to succeed. Set to DEF_NULL to skip calculation.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory block alignment requested.
+*                                   LIB_MEM_ERR_INVALID_MEM_SIZE    Invalid memory block size specified.
+*                                   LIB_MEM_ERR_NULL_PTR            Error or segment data pointer NULL.
+*
+*                                   ------------------RETURNED BY Mem_SegAllocExtCritical()------------------
+*                                   LIB_MEM_ERR_SEG_OVF             Allocation would overflow memory segment.
+*
+* Return(s)   : Pointer to allocated memory block, if successful.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : Mem_DynPoolBlkGet(),
+*               Mem_DynPoolCreateInternal(),
+*               Mem_HeapAlloc(),
+*               Mem_PoolCreate(),
+*               Mem_SegAlloc(),
+*               Mem_SegAllocExt(),
+*               Mem_SegAllocHW().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  *Mem_SegAllocInternal (const  CPU_CHAR    *p_name,
+                                            MEM_SEG     *p_seg,
+                                            CPU_SIZE_T   size,
+                                            CPU_SIZE_T   align,
+                                            CPU_SIZE_T   padding_align,
+                                            CPU_SIZE_T  *p_bytes_reqd,
+                                            LIB_ERR     *p_err)
+{
+    void  *p_blk;
+    CPU_SR_ALLOC();
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {                                    /* Chk for null err ptr.                                */
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+
+    if (size < 1u) {                                            /* Chk for invalid sized mem req.                       */
+       *p_err = LIB_MEM_ERR_INVALID_MEM_SIZE;
+    }
+
+    if (MATH_IS_PWR2(align) != DEF_YES) {                       /* Chk that align is a pwr of 2.                        */
+       *p_err = LIB_MEM_ERR_INVALID_MEM_ALIGN;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    p_blk = Mem_SegAllocExtCritical(p_seg,
+                                    size,
+                                    align,
+                                    padding_align,
+                                    p_bytes_reqd,
+                                    p_err);
+    if (*p_err != LIB_MEM_ERR_NONE) {
+        CPU_CRITICAL_EXIT();
+        return (DEF_NULL);
+    }
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)                    /* Track alloc if req'd.                                */
+    Mem_SegAllocTrackCritical(p_name,
+                              p_seg,
+                              size,
+                              p_err);
+    if (*p_err != LIB_MEM_ERR_NONE) {
+        CPU_CRITICAL_EXIT();
+        return (DEF_NULL);
+    }
+#else
+    (void)p_name;
+#endif
+    CPU_CRITICAL_EXIT();
+
+    return (p_blk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      Mem_SegAllocExtCritical()
+*
+* Description : Allocates memory from specified segment.
+*
+* Argument(s) : p_seg           Pointer to segment from which to allocate memory.
+*
+*               size            Size of memory block to allocate, in bytes.
+*
+*               align           Required alignment of memory block, in bytes. MUST be a power of 2.
+*
+*               padding_align   Padding alignment, in bytes, that will be added to any allocated buffer from
+*                               this memory segment. MUST be a power of 2. LIB_MEM_PADDING_ALIGN_NONE
+*                               means no padding.
+*
+*               p_bytes_reqd    Pointer to variable that will receive the number of free bytes missing for
+*                               the allocation to succeed. Set to DEF_NULL to skip calculation.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_SEG_OVF     Allocation would overflow memory segment.
+*
+* Return(s)   : Pointer to allocated memory block, if successful.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : Mem_PoolCreate(),
+*               Mem_SegAllocInternal(),
+*               Mem_SegAllocTrackCritical().
+*
+* Note(s)     : (1) This function MUST be called within a CRITICAL_SECTION.
+*********************************************************************************************************
+*/
+
+static  void  *Mem_SegAllocExtCritical (MEM_SEG     *p_seg,
+                                        CPU_SIZE_T   size,
+                                        CPU_SIZE_T   align,
+                                        CPU_SIZE_T   padding_align,
+                                        CPU_SIZE_T  *p_bytes_reqd,
+                                        LIB_ERR     *p_err)
+{
+    CPU_ADDR    blk_addr;
+    CPU_ADDR    addr_next;
+    CPU_SIZE_T  size_rem_seg;
+    CPU_SIZE_T  size_tot_blk;
+    CPU_SIZE_T  blk_align = DEF_MAX(align, padding_align);
+
+
+    blk_addr     = MATH_ROUND_INC_UP_PWR2(p_seg->AddrNext,      /* Compute align'ed blk addr.                           */
+                                          blk_align);
+    addr_next    = MATH_ROUND_INC_UP_PWR2(blk_addr + size,      /* Compute addr of next alloc.                          */
+                                          padding_align);
+    size_rem_seg = (p_seg->AddrEnd - p_seg->AddrNext) + 1u;
+    size_tot_blk =  addr_next      - p_seg->AddrNext;           /* Compute tot blk size including align and padding.    */
+    if (size_rem_seg < size_tot_blk) {                          /* If seg doesn't have enough space ...                 */
+        if (p_bytes_reqd != DEF_NULL) {                         /* ... calc nbr of req'd bytes.                         */
+           *p_bytes_reqd = size_tot_blk - size_rem_seg;
+        }
+
+       *p_err = LIB_MEM_ERR_SEG_OVF;
+        return (DEF_NULL);
+    }
+
+    p_seg->AddrNext = addr_next;
+
+   *p_err = LIB_MEM_ERR_NONE;
+
+    return ((void *)blk_addr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     Mem_SegAllocTrackCritical()
+*
+* Description : Tracks segment allocation, adding the 'size' of the allocation under the 'p_name' entry.
+*
+* Argument(s) : p_name  Pointer to the name of the object. This string is not copied and its memory should
+*                       remain accessible at all times.
+*
+*               p_seg   Pointer to segment data.
+*
+*               size    Allocation size, in bytes.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           LIB_MEM_ERR_HEAP_EMPTY      No more memory available on heap
+*
+*                           --------------RETURNED BY Mem_SegAllocExtCritical()---------------
+*                           LIB_MEM_ERR_SEG_OVF         Allocation would overflow memory segment.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Mem_PoolCreate(),
+*               Mem_SegAllocInternal().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
+static  void  Mem_SegAllocTrackCritical (const  CPU_CHAR    *p_name,
+                                                MEM_SEG     *p_seg,
+                                                CPU_SIZE_T   size,
+                                                LIB_ERR     *p_err)
+{
+    MEM_ALLOC_INFO  *p_alloc;
+
+
+                                                                /* ------- UPDATE ALLOC INFO LIST, IF POSSIBLE -------- */
+    p_alloc = p_seg->AllocInfoHeadPtr;
+    while (p_alloc != DEF_NULL) {
+        if (p_alloc->NamePtr == p_name) {
+            p_alloc->Size += size;
+           *p_err = LIB_MEM_ERR_NONE;
+            return;
+        }
+
+        p_alloc = p_alloc->NextPtr;
+    }
+
+                                                                /* --------- ADD NEW ALLOC INFO ENTRY IN LIST --------- */
+    p_alloc = (MEM_ALLOC_INFO *)Mem_SegAllocExtCritical(&Mem_SegHeap,             /* Alloc new alloc info struct on heap.                 */
+                                                         sizeof(MEM_ALLOC_INFO),
+                                                         sizeof(CPU_ALIGN),
+                                                         LIB_MEM_PADDING_ALIGN_NONE,
+                                                         DEF_NULL,
+                                                         p_err);
+    if (*p_err != LIB_MEM_ERR_NONE) {
+        return;
+    }
+
+    p_alloc->NamePtr = p_name;                                  /* Populate alloc info.                                 */
+    p_alloc->Size    = size;
+
+    p_alloc->NextPtr        = p_seg->AllocInfoHeadPtr;          /* Prepend new item in list.                            */
+    p_seg->AllocInfoHeadPtr = p_alloc;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     Mem_DynPoolCreateInternal()
+*
+* Description : Creates a dynamic memory pool.
+*
+* Argument(s) : p_name              Pointer to pool name.
+*
+*               p_pool              Pointer to pool data.
+*
+*               p_seg               Pointer to segment from which to allocate memory.
+*
+*               blk_size            Size of memory block to allocate from pool, in bytes. See Note #1.
+*
+*               blk_align           Required alignment of memory block, in bytes. MUST be a power of 2.
+*
+*               blk_padding_align   Block's padding alignment, in bytes, that will be added at the end
+*                                   of block's buffer. MUST be a power of 2. LIB_MEM_PADDING_ALIGN_NONE
+*                                   means no padding.
+*
+*               blk_qty_init        Initial number of elements to be allocated in pool.
+*
+*               blk_qty_max         Maximum number of elements that can be allocated from this pool. Set to
+*                                   LIB_MEM_BLK_QTY_UNLIMITED if no limit.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   LIB_MEM_ERR_INVALID_BLK_ALIGN   Invalid requested block alignment.
+*                                   LIB_MEM_ERR_INVALID_BLK_SIZE    Invalid requested block size.
+*                                   LIB_MEM_ERR_INVALID_BLK_NBR     Invalid requested block quantity max.
+*                                   LIB_MEM_ERR_NULL_PTR            Pool data pointer NULL.
+*
+*                                   ------------------RETURNED BY Mem_SegAllocInternal()-------------------
+*                                   LIB_MEM_ERR_INVALID_MEM_ALIGN   Invalid memory block alignment requested.
+*                                   LIB_MEM_ERR_INVALID_MEM_SIZE    Invalid memory block size specified.
+*                                   LIB_MEM_ERR_NULL_PTR            Error or segment data pointer NULL.
+*                                   LIB_MEM_ERR_SEG_OVF             Allocation would overflow memory segment.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Mem_DynPoolCreate(),
+*               Mem_DynPoolCreateHW().
+*
+* Note(s)     : (1) 'blk_size' must be big enough to fit a pointer since the pointer to the next free
+*                   block is stored in the block itself (only when free/unused).
+*********************************************************************************************************
+*/
+
+static  void  Mem_DynPoolCreateInternal (const  CPU_CHAR      *p_name,
+                                                MEM_DYN_POOL  *p_pool,
+                                                MEM_SEG       *p_seg,
+                                                CPU_SIZE_T     blk_size,
+                                                CPU_SIZE_T     blk_align,
+                                                CPU_SIZE_T     blk_padding_align,
+                                                CPU_SIZE_T     blk_qty_init,
+                                                CPU_SIZE_T     blk_qty_max,
+                                                LIB_ERR       *p_err)
+{
+    CPU_INT08U  *p_blks          = DEF_NULL;
+    CPU_SIZE_T   blk_size_align;
+    CPU_SIZE_T   blk_align_worst = DEF_MAX(blk_align, blk_padding_align);
+
+
+#if (LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {                                    /* Chk for NULL err ptr.                                */
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_pool == DEF_NULL) {                                   /* Chk for NULL pool data ptr.                          */
+       *p_err = LIB_MEM_ERR_NULL_PTR;
+        return;
+    }
+
+    if (blk_size < 1u) {                                        /* Chk for inv blk size.                                */
+       *p_err = LIB_MEM_ERR_INVALID_BLK_SIZE;
+        return;
+    }
+
+    if ((blk_qty_max  != LIB_MEM_BLK_QTY_UNLIMITED) &&          /* Chk for invalid blk qty.                             */
+        (blk_qty_init >  blk_qty_max)) {
+       *p_err = LIB_MEM_ERR_INVALID_BLK_NBR;
+        return;
+    }
+
+    if (MATH_IS_PWR2(blk_align) != DEF_YES) {                   /* Chk for illegal align spec.                          */
+       *p_err = LIB_MEM_ERR_INVALID_BLK_ALIGN;
+        return;
+    }
+#endif
+
+                                                                /* Calc blk size with align.                            */
+    if (blk_size < sizeof(void *)) {                            /* If size if smaller than ptr ...                      */
+                                                                /* ... inc size to ptr size.                            */
+        blk_size_align = MATH_ROUND_INC_UP_PWR2(sizeof(void *), blk_align_worst);
+    } else {
+        blk_size_align = MATH_ROUND_INC_UP_PWR2(blk_size, blk_align_worst);
+    }
+
+    if (blk_qty_init != 0u) {                                   /* Alloc init blks.                                     */
+        CPU_SIZE_T  i;
+        p_blks = (CPU_INT08U *)Mem_SegAllocInternal(p_name,
+                                                    p_seg,
+                                                    blk_size_align * blk_qty_init,
+                                                    DEF_MAX(blk_align, sizeof(void *)),
+                                                    LIB_MEM_PADDING_ALIGN_NONE,
+                                                    DEF_NULL,
+                                                    p_err);
+        if (*p_err != LIB_MEM_ERR_NONE) {
+            return;
+        }
+
+                                                                /* ----------------- CREATE POOL DATA ----------------- */
+                                                                /* Init free list.                                      */
+        p_pool->BlkFreePtr = (void *)p_blks;
+        for (i = 0u; i < blk_qty_init - 1u; i++) {
+           *((void **)p_blks)  = p_blks + blk_size_align;
+            p_blks            += blk_size_align;
+        }
+       *((void **)p_blks) = DEF_NULL;
+    } else {
+        p_pool->BlkFreePtr = DEF_NULL;
+    }
+
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+    p_pool->PoolSegPtr      = ((p_seg != DEF_NULL) ? p_seg : &Mem_SegHeap);
+#else
+    p_pool->PoolSegPtr      =   p_seg;
+#endif
+    p_pool->BlkSize         =   blk_size;
+    p_pool->BlkAlign        =   blk_align_worst;
+    p_pool->BlkPaddingAlign =   blk_padding_align;
+    p_pool->BlkQtyMax       =   blk_qty_max;
+    p_pool->BlkAllocCnt     =   0u;
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
+    p_pool->NamePtr = p_name;
+#endif
+
+   *p_err = LIB_MEM_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      Mem_PoolBlkIsValidAddr()
+*
+* Description : Calculates if a given memory block address is valid for the memory pool.
+*
+* Argument(s) : p_pool   Pointer to memory pool structure to validate memory block address.
+*               ------   Argument validated by caller.
+*
+*               p_mem    Pointer to memory block address to validate.
+*               -----    Argument validated by caller.
+*
+* Return(s)   : DEF_YES, if valid memory pool block address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Mem_PoolBlkFree().
+*
+* Note(s)     : (1) This function is DEPRECATED and will be removed in a future version of this product.
+*********************************************************************************************************
+*/
+
+#if ((LIB_MEM_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) && \
+     (LIB_MEM_CFG_HEAP_SIZE      >  0u))
+static  CPU_BOOLEAN  Mem_PoolBlkIsValidAddr (MEM_POOL  *p_pool,
+                                             void      *p_mem)
+{
+    CPU_ADDR  pool_offset;
+
+
+    if ((p_mem < p_pool->PoolAddrStart) ||
+        (p_mem > p_pool->PoolAddrEnd)) {
+        return (DEF_FALSE);
+    }
+
+    pool_offset = (CPU_ADDR)p_mem - (CPU_ADDR)p_pool->PoolAddrStart;
+    if (pool_offset % p_pool->BlkSize != 0u) {
+        return (DEF_FALSE);
+    } else {
+        return (DEF_TRUE);
+    }
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/lib_mem.h b/src/ucos_v1_42/micrium_source/uC-LIB/lib_mem.h
new file mode 100644
index 0000000..852b4d0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/lib_mem.h
@@ -0,0 +1,1412 @@
+/*
+*********************************************************************************************************
+*                                                uC/LIB
+*                                        CUSTOM LIBRARY MODULES
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/LIB is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     STANDARD MEMORY OPERATIONS
+*
+* Filename      : lib_mem.h
+* Version       : V1.38.01
+* Programmer(s) : ITJ
+*                 FBJ
+*                 EJ
+*                 JFD
+*********************************************************************************************************
+* Note(s)       : (1) NO compiler-supplied standard library functions are used in library or product software.
+*
+*                     (a) ALL standard library functions are implemented in the custom library modules :
+*
+*                         (1) \\lib_*.*
+*
+*                         (2) \\Ports\\\lib*_a.*
+*
+*                               where
+*                                             directory path for custom library software
+*                                                                  directory name for specific processor (CPU)
+*                                                             directory name for specific compiler
+*
+*                     (b) Product-specific library functions are implemented in individual products.
+*
+*                 (2) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/CPU V1.27
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This memory library header file is protected from multiple pre-processor inclusion through
+*               use of the memory library module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  LIB_MEM_MODULE_PRESENT                                 /* See Note #1.                                         */
+#define  LIB_MEM_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The custom library software files are located in the following directories :
+*
+*               (a) \\lib_cfg.h
+*
+*               (b) \\lib_*.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                     directory path for custom library software
+*
+*           (2) CPU-configuration  software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) '\\' directory                            See Note #1b
+*
+*               (c) (1) '\\'                  directory         See Note #2a
+*                   (2) '\\\\' directory         See Note #2b
+*
+*           (4) NO compiler-supplied standard library functions SHOULD be used.
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   LIB_MEM_MODULE
+#define  LIB_MEM_EXT
+#else
+#define  LIB_MEM_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  LIB_MEM_PADDING_ALIGN_NONE                       1u
+
+#define  LIB_MEM_BLK_QTY_UNLIMITED                        0u
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                             MEMORY LIBRARY ARGUMENT CHECK CONFIGURATION
+*
+* Note(s) : (1) Configure LIB_MEM_CFG_ARG_CHK_EXT_EN to enable/disable the memory library suite external
+*               argument check feature :
+*
+*               (a) When ENABLED,      arguments received from any port interface provided by the developer
+*                   or application are checked/validated.
+*
+*               (b) When DISABLED, NO  arguments received from any port interface provided by the developer
+*                   or application are checked/validated.
+*********************************************************************************************************
+*/
+
+                                                                /* Cfg external argument check feature (see Note #1) :  */
+#ifndef  LIB_MEM_CFG_ARG_CHK_EXT_EN
+#define  LIB_MEM_CFG_ARG_CHK_EXT_EN     DEF_DISABLED
+                                                                /* DEF_DISABLED     Argument check DISABLED             */
+                                                                /* DEF_ENABLED      Argument check ENABLED              */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                         MEMORY LIBRARY ASSEMBLY OPTIMIZATION CONFIGURATION
+*
+* Note(s) : (1) Configure LIB_MEM_CFG_OPTIMIZE_ASM_EN to enable/disable assembly-optimized memory
+*               functions.
+*********************************************************************************************************
+*/
+
+                                                                /* Cfg assembly-optimized function(s) [see Note #1] :   */
+#ifndef  LIB_MEM_CFG_OPTIMIZE_ASM_EN
+#define  LIB_MEM_CFG_OPTIMIZE_ASM_EN    DEF_DISABLED
+                                                                /* DEF_DISABLED     Assembly-optimized fnct(s) DISABLED */
+                                                                /* DEF_ENABLED      Assembly-optimized fnct(s) ENABLED  */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                          MEMORY ALLOCATION DEBUG INFORMATION CONFIGURATION
+*
+* Note(s) : (1) Configure LIB_MEM_CFG_DBG_INFO_EN to enable/disable debug information associated to each
+*               segment allocation.
+*********************************************************************************************************
+*/
+
+#ifndef  LIB_MEM_CFG_DBG_INFO_EN
+#define  LIB_MEM_CFG_DBG_INFO_EN         DEF_DISABLED
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  HEAP PADDING ALIGN CONFIGURATION
+*
+* Note(s) : (1) Configure LIB_MEM_CFG_HEAP_PADDING_ALIGN to set the padding alignment of any buffer
+*               allocated from the heap.
+*********************************************************************************************************
+*/
+
+#ifndef  LIB_MEM_CFG_HEAP_PADDING_ALIGN
+#define  LIB_MEM_CFG_HEAP_PADDING_ALIGN  LIB_MEM_PADDING_ALIGN_NONE
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            LIB MEM TYPE
+*
+* Note(s) : (1) 'LIB_MEM_TYPE' declared as 'CPU_INT32U' & all 'LIB_MEM_TYPE's #define'd with large, non-trivial
+*               values to trap & discard invalid/corrupted library memory objects based on 'LIB_MEM_TYPE'.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  LIB_MEM_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                MEMORY POOL BLOCK QUANTITY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_SIZE_T  MEM_POOL_BLK_QTY;
+
+
+/*
+*********************************************************************************************************
+*                                      MEMORY POOL TABLE IX TYPE
+*********************************************************************************************************
+*/
+
+typedef  MEM_POOL_BLK_QTY  MEM_POOL_IX;
+
+
+/*
+*********************************************************************************************************
+*                              MEMORY ALLOCATION TRACKING INFO DATA TYPE
+*********************************************************************************************************
+*/
+
+#if (LIB_MEM_CFG_DBG_INFO_EN  == DEF_ENABLED)
+typedef  struct  mem_alloc_info  MEM_ALLOC_INFO;
+
+struct  mem_alloc_info  {                                       /* ------------------ MEM ALLOC INFO ------------------ */
+    const  CPU_CHAR        *NamePtr;                            /* Ptr to name.                                         */
+           CPU_SIZE_T       Size;                               /* Total alloc'd size, in bytes.                        */
+           MEM_ALLOC_INFO  *NextPtr;                            /* Ptr to next alloc info in list.                      */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     MEMORY SEGMENTS DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  struct  mem_seg  MEM_SEG;                              /* --------------------- SEG DATA --------------------- */
+
+struct mem_seg {
+           CPU_ADDR         AddrBase;                           /* Seg start addr.                                      */
+           CPU_ADDR         AddrEnd;                            /* Seg end addr (last addr).                            */
+           CPU_ADDR         AddrNext;                           /* Next free addr.                                      */
+
+           MEM_SEG         *NextPtr;                            /* Ptr to next seg.                                     */
+
+           CPU_SIZE_T       PaddingAlign;                       /* Padding alignment in byte.                           */
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
+    const  CPU_CHAR        *NamePtr;                            /* Ptr to seg name.                                     */
+           MEM_ALLOC_INFO  *AllocInfoHeadPtr;                   /* Ptr to head of alloc info struct list.               */
+#endif
+};
+
+typedef  struct  mem_seg_info {                                 /* --------------------- SEG INFO --------------------- */
+    CPU_SIZE_T  UsedSize;                                       /* Used size, independently of alignment.               */
+    CPU_SIZE_T  TotalSize;                                      /* Total seg capacity, in octets.                       */
+
+    CPU_ADDR    AddrBase;
+    CPU_ADDR    AddrNextAlloc;                                  /* Next aligned address, 0 if none available.           */
+} MEM_SEG_INFO;
+
+
+/*
+*********************************************************************************************************
+*                                    (STATIC) MEMORY POOL DATA TYPES
+*
+* Note(s) : (1) Free static memory pool blocks are indexed in the 'BlkFreeTbl' table. Newly freed blocks
+*               are added at the first available position in the table and blocks are retrieved from the
+*               last occupied position, in a LIFO fashion.
+*
+*                                 /-------------------------------\
+*                                 |/------------\                 |
+*                    BlkFreeTbl   ||  Start     v                 v              End
+*                    /--------\   ||  /--------------------------------------------\
+*                    |p_free_1|---/|  |        |        |        |        |        |
+*                    |--------|    |  \--------------------------------------------/
+*                    |p_free_2|----/   ^                                  |        |
+*                    |--------|        |                                  |__Blk___|
+*                    |p_free_3|--------/ (Next block to be retrieved.)       Size
+*                    |--------|
+*                    |        |<-------- (Next block to be freed.)
+*                    \--------/
+*
+*********************************************************************************************************
+*/
+
+                                                                /* --------------------- MEM POOL --------------------- */
+typedef  struct  mem_pool {
+    void               *PoolAddrStart;                          /* Ptr   to start of mem seg for mem pool blks.         */
+    void               *PoolAddrEnd;                            /* Ptr   to end   of mem seg for mem pool blks.         */
+    MEM_POOL_BLK_QTY    BlkNbr;                                 /* Nbr   of mem pool   blks.                            */
+    CPU_SIZE_T          BlkSize;                                /* Size  of mem pool   blks (in octets).                */
+    void              **BlkFreeTbl;                             /* Tbl of free mem pool blks.                           */
+    CPU_SIZE_T          BlkFreeTblIx;                           /* Ix of next free blk free tbl entry.                  */
+} MEM_POOL;
+
+
+/*
+*********************************************************************************************************
+*                                     DYNAMIC MEMORY POOL DATA TYPE
+*
+* Note(s) : (1) Dynamic memory pool blocks are not indexed in a table. Only freed blocks are linked using
+*               a singly linked list, in a LIFO fashion; newly freed blocks are inserted at the head of the
+*               list and blocks are also retrieved from the head of the list.
+*
+*           (2) Pointers to the next block are only present when a block is free, using the first location
+*               in the allocated memory block. The user of dynamic memory pool must not assume his data
+*               will not be overwritten when a block is freed.
+*
+*                                   /----------------\
+*                    /----------\   |  /----------\  |    /----------\   /----------\
+*       BlkFreePtr-->|(NextPtr) |---/  |          |  \--->|(NextPtr) |-->|(NextPtr) |--> DEF_NULL
+*                    |----------|      |  Blk in  |       |----------|   |----------|
+*                    |          |      |   use    |       |          |   |          |
+*                    |          |      |          |       |          |   |          |
+*                    \----------/      \----------/       \----------/   \----------/
+*
+*********************************************************************************************************
+*/
+
+typedef  struct  mem_dyn_pool {                                 /* ---------------- DYN MEM POOL DATA ----------------- */
+           MEM_SEG     *PoolSegPtr;                             /* Mem pool from which blks are alloc'd.                */
+           CPU_SIZE_T   BlkSize;                                /* Size of pool blks, in octets.                        */
+           CPU_SIZE_T   BlkAlign;                               /* Align req'd for blks, in octets.                     */
+           CPU_SIZE_T   BlkPaddingAlign;                        /* Padding alignment in bytes for this mem seg.         */
+           void        *BlkFreePtr;                             /* Ptr to first free blk.                               */
+
+           CPU_SIZE_T   BlkQtyMax;                              /* Max qty of blk in dyn mem pool. 0 = unlimited.       */
+           CPU_SIZE_T   BlkAllocCnt;                            /* Cnt of alloc blk.                                    */
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
+    const  CPU_CHAR    *NamePtr;                                /* Ptr to mem pool name.                                */
+#endif
+} MEM_DYN_POOL;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      MEMORY DATA VALUE MACRO'S
+*
+* Note(s) : (1) (a) Some variables & variable buffers to pass & receive data values MUST start on appropriate
+*                   CPU word-aligned addresses.  This is required because most word-aligned processors are more
+*                   efficient & may even REQUIRE that multi-octet words start on CPU word-aligned addresses.
+*
+*                   (1) For 16-bit word-aligned processors, this means that
+*
+*                           all 16- & 32-bit words MUST start on addresses that are multiples of 2 octets
+*
+*                   (2) For 32-bit word-aligned processors, this means that
+*
+*                           all 16-bit       words MUST start on addresses that are multiples of 2 octets
+*                           all 32-bit       words MUST start on addresses that are multiples of 4 octets
+*
+*               (b) However, some data values macro's appropriately access data values from any CPU addresses,
+*                   word-aligned or not.  Thus for processors that require data word alignment, data words can
+*                   be accessed to/from any CPU address, word-aligned or not, without generating data-word-
+*                   alignment exceptions/faults.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      ENDIAN WORD ORDER MACRO'S
+*
+* Description : Convert data values to & from big-, little, or host-endian CPU word order.
+*
+* Argument(s) : val       Data value to convert (see Notes #1 & #2).
+*
+* Return(s)   : Converted data value (see Notes #1 & #2).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Convert data values to the desired data-word order :
+*
+*                       MEM_VAL_BIG_TO_LITTLE_xx()      Convert big-        endian data values
+*                                                            to little-     endian data values
+*                       MEM_VAL_LITTLE_TO_BIG_xx()      Convert little-     endian data values
+*                                                            to big-        endian data values
+*                       MEM_VAL_xxx_TO_HOST_xx()        Convert big-/little-endian data values
+*                                                            to host-       endian data values
+*                       MEM_VAL_HOST_TO_xxx_xx()        Convert host-       endian data values
+*                                                            to big-/little-endian data values
+*
+*                   See also 'cpu.h  CPU WORD CONFIGURATION  Note #2'.
+*
+*               (2) 'val' data value to convert & any variable to receive the returned conversion MUST
+*                   start on appropriate CPU word-aligned addresses.
+*
+*                   See also 'MEMORY DATA VALUE MACRO'S  Note #1a'.
+*
+*               (3) MEM_VAL_COPY_xxx() macro's are more efficient than generic endian word order macro's &
+*                   are also independent of CPU data-word-alignment & SHOULD be used whenever possible.
+*
+*                   See also 'MEM_VAL_COPY_GET_xxx()  Note #4'
+*                          & 'MEM_VAL_COPY_SET_xxx()  Note #4'.
+*
+*               (4) Generic endian word order macro's are NOT atomic operations & MUST NOT be used on any
+*                   non-static (i.e. volatile) variables, registers, hardware, etc.; without the caller of
+*                   the macro's providing some form of additional protection (e.g. mutual exclusion).
+*
+*               (5) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
+*                   linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
+*                   constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
+*                   value (see 'cpu.h  CPU WORD CONFIGURATION  Note #2').  The 'else'-conditional code is
+*                   included as an extra precaution in case 'cpu.h' is incorrectly configured.
+*********************************************************************************************************
+*/
+
+#if    ((CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_64) || \
+        (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32))
+
+#define  MEM_VAL_BIG_TO_LITTLE_16(val)        ((CPU_INT16U)(((CPU_INT16U)((((CPU_INT16U)(val)) & (CPU_INT16U)    0xFF00u) >> (1u * DEF_OCTET_NBR_BITS))) | \
+                                                            ((CPU_INT16U)((((CPU_INT16U)(val)) & (CPU_INT16U)    0x00FFu) << (1u * DEF_OCTET_NBR_BITS)))))
+
+#define  MEM_VAL_BIG_TO_LITTLE_32(val)        ((CPU_INT32U)(((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0xFF000000u) >> (3u * DEF_OCTET_NBR_BITS))) | \
+                                                            ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x00FF0000u) >> (1u * DEF_OCTET_NBR_BITS))) | \
+                                                            ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x0000FF00u) << (1u * DEF_OCTET_NBR_BITS))) | \
+                                                            ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x000000FFu) << (3u * DEF_OCTET_NBR_BITS)))))
+
+#elif   (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16)
+
+#define  MEM_VAL_BIG_TO_LITTLE_16(val)        ((CPU_INT16U)(((CPU_INT16U)((((CPU_INT16U)(val)) & (CPU_INT16U)    0xFF00u) >> (1u * DEF_OCTET_NBR_BITS))) | \
+                                                            ((CPU_INT16U)((((CPU_INT16U)(val)) & (CPU_INT16U)    0x00FFu) << (1u * DEF_OCTET_NBR_BITS)))))
+
+#define  MEM_VAL_BIG_TO_LITTLE_32(val)        ((CPU_INT32U)(((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0xFF000000u) >> (1u * DEF_OCTET_NBR_BITS))) | \
+                                                            ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x00FF0000u) << (1u * DEF_OCTET_NBR_BITS))) | \
+                                                            ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x0000FF00u) >> (1u * DEF_OCTET_NBR_BITS))) | \
+                                                            ((CPU_INT32U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x000000FFu) << (1u * DEF_OCTET_NBR_BITS)))))
+
+#else
+
+#define  MEM_VAL_BIG_TO_LITTLE_16(val)                                                  (val)
+#define  MEM_VAL_BIG_TO_LITTLE_32(val)                                                  (val)
+
+#endif
+
+
+#define  MEM_VAL_LITTLE_TO_BIG_16(val)                          MEM_VAL_BIG_TO_LITTLE_16(val)
+#define  MEM_VAL_LITTLE_TO_BIG_32(val)                          MEM_VAL_BIG_TO_LITTLE_32(val)
+
+
+
+#if     (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
+
+#define  MEM_VAL_BIG_TO_HOST_16(val)                                                    (val)
+#define  MEM_VAL_BIG_TO_HOST_32(val)                                                    (val)
+#define  MEM_VAL_LITTLE_TO_HOST_16(val)                         MEM_VAL_LITTLE_TO_BIG_16(val)
+#define  MEM_VAL_LITTLE_TO_HOST_32(val)                         MEM_VAL_LITTLE_TO_BIG_32(val)
+
+#elif   (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
+
+#define  MEM_VAL_BIG_TO_HOST_16(val)                            MEM_VAL_BIG_TO_LITTLE_16(val)
+#define  MEM_VAL_BIG_TO_HOST_32(val)                            MEM_VAL_BIG_TO_LITTLE_32(val)
+#define  MEM_VAL_LITTLE_TO_HOST_16(val)                                                 (val)
+#define  MEM_VAL_LITTLE_TO_HOST_32(val)                                                 (val)
+
+#else                                                           /* See Note #5.                                         */
+
+#error  "CPU_CFG_ENDIAN_TYPE  illegally #defined in 'cpu.h'      "
+#error  "                     [See 'cpu.h  CONFIGURATION ERRORS']"
+
+#endif
+
+
+#define  MEM_VAL_HOST_TO_BIG_16(val)                            MEM_VAL_BIG_TO_HOST_16(val)
+#define  MEM_VAL_HOST_TO_BIG_32(val)                            MEM_VAL_BIG_TO_HOST_32(val)
+#define  MEM_VAL_HOST_TO_LITTLE_16(val)                         MEM_VAL_LITTLE_TO_HOST_16(val)
+#define  MEM_VAL_HOST_TO_LITTLE_32(val)                         MEM_VAL_LITTLE_TO_HOST_32(val)
+
+
+/*
+*********************************************************************************************************
+*                                          MEM_VAL_GET_xxx()
+*
+* Description : Decode data values from any CPU memory address.
+*
+* Argument(s) : addr        Lowest CPU memory address of data value to decode (see Notes #2 & #3a).
+*
+* Return(s)   : Decoded data value from CPU memory address (see Notes #1 & #3b).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Decode data values based on the values' data-word order in CPU memory :
+*
+*                       MEM_VAL_GET_xxx_BIG()           Decode big-   endian data values -- data words' most
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_GET_xxx_LITTLE()        Decode little-endian data values -- data words' least
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_GET_xxx()               Decode data values using CPU's native or configured
+*                                                           data-word order
+*
+*                   See also 'cpu.h  CPU WORD CONFIGURATION  Note #2'.
+*
+*               (2) CPU memory addresses/pointers NOT checked for NULL.
+*
+*               (3) (a) MEM_VAL_GET_xxx() macro's decode data values without regard to CPU word-aligned addresses.
+*                       Thus for processors that require data word alignment, data words can be decoded from any
+*                       CPU address, word-aligned or not, without generating data-word-alignment exceptions/faults.
+*
+*                   (b) However, any variable to receive the returned data value MUST start on an appropriate CPU
+*                       word-aligned address.
+*
+*                   See also 'MEMORY DATA VALUE MACRO'S  Note #1'.
+*
+*               (4) MEM_VAL_COPY_GET_xxx() macro's are more efficient than MEM_VAL_GET_xxx() macro's & are
+*                   also independent of CPU data-word-alignment & SHOULD be used whenever possible.
+*
+*                   See also 'MEM_VAL_COPY_GET_xxx()  Note #4'.
+*
+*               (5) MEM_VAL_GET_xxx() macro's are NOT atomic operations & MUST NOT be used on any non-static
+*                   (i.e. volatile) variables, registers, hardware, etc.; without the caller of the macro's
+*                   providing some form of additional protection (e.g. mutual exclusion).
+*
+*               (6) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
+*                   linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
+*                   constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
+*                   value (see 'cpu.h  CPU WORD CONFIGURATION  Note #2').  The 'else'-conditional code is
+*                   included as an extra precaution in case 'cpu.h' is incorrectly configured.
+*********************************************************************************************************
+*/
+
+#define  MEM_VAL_GET_INT08U_BIG(addr)           ((CPU_INT08U) ((CPU_INT08U)(((CPU_INT08U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS))))
+
+#define  MEM_VAL_GET_INT16U_BIG(addr)           ((CPU_INT16U)(((CPU_INT16U)(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 0))) << (1u * DEF_OCTET_NBR_BITS))) + \
+                                                              ((CPU_INT16U)(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 1))) << (0u * DEF_OCTET_NBR_BITS)))))
+
+#define  MEM_VAL_GET_INT32U_BIG(addr)           ((CPU_INT32U)(((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 0))) << (3u * DEF_OCTET_NBR_BITS))) + \
+                                                              ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 1))) << (2u * DEF_OCTET_NBR_BITS))) + \
+                                                              ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 2))) << (1u * DEF_OCTET_NBR_BITS))) + \
+                                                              ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 3))) << (0u * DEF_OCTET_NBR_BITS)))))
+
+
+
+#define  MEM_VAL_GET_INT08U_LITTLE(addr)        ((CPU_INT08U) ((CPU_INT08U)(((CPU_INT08U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS))))
+
+#define  MEM_VAL_GET_INT16U_LITTLE(addr)        ((CPU_INT16U)(((CPU_INT16U)(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS))) + \
+                                                              ((CPU_INT16U)(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 1))) << (1u * DEF_OCTET_NBR_BITS)))))
+
+#define  MEM_VAL_GET_INT32U_LITTLE(addr)        ((CPU_INT32U)(((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 0))) << (0u * DEF_OCTET_NBR_BITS))) + \
+                                                              ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 1))) << (1u * DEF_OCTET_NBR_BITS))) + \
+                                                              ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 2))) << (2u * DEF_OCTET_NBR_BITS))) + \
+                                                              ((CPU_INT32U)(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 3))) << (3u * DEF_OCTET_NBR_BITS)))))
+
+
+
+#if     (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
+
+#define  MEM_VAL_GET_INT08U(addr)                               MEM_VAL_GET_INT08U_BIG(addr)
+#define  MEM_VAL_GET_INT16U(addr)                               MEM_VAL_GET_INT16U_BIG(addr)
+#define  MEM_VAL_GET_INT32U(addr)                               MEM_VAL_GET_INT32U_BIG(addr)
+
+#elif   (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
+
+#define  MEM_VAL_GET_INT08U(addr)                               MEM_VAL_GET_INT08U_LITTLE(addr)
+#define  MEM_VAL_GET_INT16U(addr)                               MEM_VAL_GET_INT16U_LITTLE(addr)
+#define  MEM_VAL_GET_INT32U(addr)                               MEM_VAL_GET_INT32U_LITTLE(addr)
+
+#else                                                           /* See Note #6.                                         */
+
+#error  "CPU_CFG_ENDIAN_TYPE  illegally #defined in 'cpu.h'      "
+#error  "                     [See 'cpu.h  CONFIGURATION ERRORS']"
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          MEM_VAL_SET_xxx()
+*
+* Description : Encode data values to any CPU memory address.
+*
+* Argument(s) : addr        Lowest CPU memory address to encode data value (see Notes #2 & #3a).
+*
+*               val         Data value to encode (see Notes #1 & #3b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Encode data values into CPU memory based on the values' data-word order :
+*
+*                       MEM_VAL_SET_xxx_BIG()           Encode big-   endian data values -- data words' most
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_SET_xxx_LITTLE()        Encode little-endian data values -- data words' least
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_SET_xxx()               Encode data values using CPU's native or configured
+*                                                           data-word order
+*
+*                   See also 'cpu.h  CPU WORD CONFIGURATION  Note #2'.
+*
+*               (2) CPU memory addresses/pointers NOT checked for NULL.
+*
+*               (3) (a) MEM_VAL_SET_xxx() macro's encode data values without regard to CPU word-aligned addresses.
+*                       Thus for processors that require data word alignment, data words can be encoded to any
+*                       CPU address, word-aligned or not, without generating data-word-alignment exceptions/faults.
+*
+*                   (b) However, 'val' data value to encode MUST start on an appropriate CPU word-aligned address.
+*
+*                   See also 'MEMORY DATA VALUE MACRO'S  Note #1'.
+*
+*               (4) MEM_VAL_COPY_SET_xxx() macro's are more efficient than MEM_VAL_SET_xxx() macro's & are
+*                   also independent of CPU data-word-alignment & SHOULD be used whenever possible.
+*
+*                   See also 'MEM_VAL_COPY_SET_xxx()  Note #4'.
+*
+*               (5) MEM_VAL_SET_xxx() macro's are NOT atomic operations & MUST NOT be used on any non-static
+*                   (i.e. volatile) variables, registers, hardware, etc.; without the caller of the macro's
+*                   providing some form of additional protection (e.g. mutual exclusion).
+*
+*               (6) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
+*                   linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
+*                   constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
+*                   value (see 'cpu.h  CPU WORD CONFIGURATION  Note #2').  The 'else'-conditional code is
+*                   included as an extra precaution in case 'cpu.h' is incorrectly configured.
+*********************************************************************************************************
+*/
+
+#define  MEM_VAL_SET_INT08U_BIG(addr, val)                     do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT08U)(val)) & (CPU_INT08U)      0xFFu) >> (0u * DEF_OCTET_NBR_BITS))); } while (0)
+
+#define  MEM_VAL_SET_INT16U_BIG(addr, val)                     do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT16U)(val)) & (CPU_INT16U)    0xFF00u) >> (1u * DEF_OCTET_NBR_BITS))); \
+                                                                    (*(((CPU_INT08U *)(addr)) + 1)) = ((CPU_INT08U)((((CPU_INT16U)(val)) & (CPU_INT16U)    0x00FFu) >> (0u * DEF_OCTET_NBR_BITS))); } while (0)
+
+#define  MEM_VAL_SET_INT32U_BIG(addr, val)                     do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0xFF000000u) >> (3u * DEF_OCTET_NBR_BITS))); \
+                                                                    (*(((CPU_INT08U *)(addr)) + 1)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x00FF0000u) >> (2u * DEF_OCTET_NBR_BITS))); \
+                                                                    (*(((CPU_INT08U *)(addr)) + 2)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x0000FF00u) >> (1u * DEF_OCTET_NBR_BITS))); \
+                                                                    (*(((CPU_INT08U *)(addr)) + 3)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x000000FFu) >> (0u * DEF_OCTET_NBR_BITS))); } while (0)
+
+
+
+#define  MEM_VAL_SET_INT08U_LITTLE(addr, val)                  do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT08U)(val)) & (CPU_INT08U)      0xFFu) >> (0u * DEF_OCTET_NBR_BITS))); } while (0)
+
+#define  MEM_VAL_SET_INT16U_LITTLE(addr, val)                  do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT16U)(val)) & (CPU_INT16U)    0x00FFu) >> (0u * DEF_OCTET_NBR_BITS))); \
+                                                                    (*(((CPU_INT08U *)(addr)) + 1)) = ((CPU_INT08U)((((CPU_INT16U)(val)) & (CPU_INT16U)    0xFF00u) >> (1u * DEF_OCTET_NBR_BITS))); } while (0)
+
+#define  MEM_VAL_SET_INT32U_LITTLE(addr, val)                  do { (*(((CPU_INT08U *)(addr)) + 0)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x000000FFu) >> (0u * DEF_OCTET_NBR_BITS))); \
+                                                                    (*(((CPU_INT08U *)(addr)) + 1)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x0000FF00u) >> (1u * DEF_OCTET_NBR_BITS))); \
+                                                                    (*(((CPU_INT08U *)(addr)) + 2)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0x00FF0000u) >> (2u * DEF_OCTET_NBR_BITS))); \
+                                                                    (*(((CPU_INT08U *)(addr)) + 3)) = ((CPU_INT08U)((((CPU_INT32U)(val)) & (CPU_INT32U)0xFF000000u) >> (3u * DEF_OCTET_NBR_BITS))); } while (0)
+
+
+
+#if     (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
+
+#define  MEM_VAL_SET_INT08U(addr, val)                          MEM_VAL_SET_INT08U_BIG(addr, val)
+#define  MEM_VAL_SET_INT16U(addr, val)                          MEM_VAL_SET_INT16U_BIG(addr, val)
+#define  MEM_VAL_SET_INT32U(addr, val)                          MEM_VAL_SET_INT32U_BIG(addr, val)
+
+#elif   (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
+
+#define  MEM_VAL_SET_INT08U(addr, val)                          MEM_VAL_SET_INT08U_LITTLE(addr, val)
+#define  MEM_VAL_SET_INT16U(addr, val)                          MEM_VAL_SET_INT16U_LITTLE(addr, val)
+#define  MEM_VAL_SET_INT32U(addr, val)                          MEM_VAL_SET_INT32U_LITTLE(addr, val)
+
+#else                                                           /* See Note #6.                                         */
+
+#error  "CPU_CFG_ENDIAN_TYPE  illegally #defined in 'cpu.h'      "
+#error  "                     [See 'cpu.h  CONFIGURATION ERRORS']"
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       MEM_VAL_COPY_GET_xxx()
+*
+* Description : Copy & decode data values from any CPU memory address to any CPU memory address.
+*
+* Argument(s) : addr_dest       Lowest CPU memory address to copy/decode source address's data value
+*                                   (see Notes #2 & #3).
+*
+*               addr_src        Lowest CPU memory address of data value to copy/decode
+*                                   (see Notes #2 & #3).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Copy/decode data values based on the values' data-word order :
+*
+*                       MEM_VAL_COPY_GET_xxx_BIG()      Decode big-   endian data values -- data words' most
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_COPY_GET_xxx_LITTLE()   Decode little-endian data values -- data words' least
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_COPY_GET_xxx()          Decode data values using CPU's native or configured
+*                                                           data-word order
+*
+*                   See also 'cpu.h  CPU WORD CONFIGURATION  Note #2'.
+*
+*               (2) (a) CPU memory addresses/pointers NOT checked for NULL.
+*
+*                   (b) CPU memory addresses/buffers  NOT checked for overlapping.
+*
+*                       (1) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that
+*                           "copying ... between objects that overlap ... is undefined".
+*
+*               (3) MEM_VAL_COPY_GET_xxx() macro's copy/decode data values without regard to CPU word-aligned
+*                   addresses.  Thus for processors that require data word alignment, data words can be copied/
+*                   decoded to/from any CPU address, word-aligned or not, without generating data-word-alignment
+*                   exceptions/faults.
+*
+*               (4) MEM_VAL_COPY_GET_xxx() macro's are more efficient than MEM_VAL_GET_xxx() macro's & are
+*                   also independent of CPU data-word-alignment & SHOULD be used whenever possible.
+*
+*                   See also 'MEM_VAL_GET_xxx()  Note #4'.
+*
+*               (5) Since octet-order copy/conversion are inverse operations, MEM_VAL_COPY_GET_xxx() &
+*                   MEM_VAL_COPY_SET_xxx() macros are inverse, but identical, operations & are provided
+*                   in both forms for semantics & consistency.
+*
+*                   See also 'MEM_VAL_COPY_SET_xxx()  Note #5'.
+*
+*               (6) MEM_VAL_COPY_GET_xxx() macro's are NOT atomic operations & MUST NOT be used on any non-
+*                   static (i.e. volatile) variables, registers, hardware, etc.; without the caller of the
+*                   macro's providing some form of additional protection (e.g. mutual exclusion).
+*
+*               (7) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
+*                   linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
+*                   constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
+*                   value (see 'cpu.h  CPU WORD CONFIGURATION  Note #2').  The 'else'-conditional code is
+*                   included as an extra precaution in case 'cpu.h' is incorrectly configured.
+*********************************************************************************************************
+*/
+
+#if     (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
+
+
+#define  MEM_VAL_COPY_GET_INT08U_BIG(addr_dest, addr_src)      do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); } while (0)
+
+#define  MEM_VAL_COPY_GET_INT16U_BIG(addr_dest, addr_src)      do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 1)) = (*(((CPU_INT08U *)(addr_src)) + 1)); } while (0)
+
+#define  MEM_VAL_COPY_GET_INT32U_BIG(addr_dest, addr_src)      do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 1)) = (*(((CPU_INT08U *)(addr_src)) + 1)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 2)) = (*(((CPU_INT08U *)(addr_src)) + 2)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 3)) = (*(((CPU_INT08U *)(addr_src)) + 3)); } while (0)
+
+
+
+#define  MEM_VAL_COPY_GET_INT08U_LITTLE(addr_dest, addr_src)   do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); } while (0)
+
+#define  MEM_VAL_COPY_GET_INT16U_LITTLE(addr_dest, addr_src)   do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 1)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 1)) = (*(((CPU_INT08U *)(addr_src)) + 0)); } while (0)
+
+#define  MEM_VAL_COPY_GET_INT32U_LITTLE(addr_dest, addr_src)   do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 3)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 1)) = (*(((CPU_INT08U *)(addr_src)) + 2)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 2)) = (*(((CPU_INT08U *)(addr_src)) + 1)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 3)) = (*(((CPU_INT08U *)(addr_src)) + 0)); } while (0)
+
+
+
+#define  MEM_VAL_COPY_GET_INT08U(addr_dest, addr_src)               MEM_VAL_COPY_GET_INT08U_BIG(addr_dest, addr_src)
+#define  MEM_VAL_COPY_GET_INT16U(addr_dest, addr_src)               MEM_VAL_COPY_GET_INT16U_BIG(addr_dest, addr_src)
+#define  MEM_VAL_COPY_GET_INT32U(addr_dest, addr_src)               MEM_VAL_COPY_GET_INT32U_BIG(addr_dest, addr_src)
+
+
+
+
+#elif   (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
+
+
+#define  MEM_VAL_COPY_GET_INT08U_BIG(addr_dest, addr_src)      do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); } while (0)
+
+#define  MEM_VAL_COPY_GET_INT16U_BIG(addr_dest, addr_src)      do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 1)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 1)) = (*(((CPU_INT08U *)(addr_src)) + 0)); } while (0)
+
+#define  MEM_VAL_COPY_GET_INT32U_BIG(addr_dest, addr_src)      do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 3)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 1)) = (*(((CPU_INT08U *)(addr_src)) + 2)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 2)) = (*(((CPU_INT08U *)(addr_src)) + 1)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 3)) = (*(((CPU_INT08U *)(addr_src)) + 0)); } while (0)
+
+
+
+#define  MEM_VAL_COPY_GET_INT08U_LITTLE(addr_dest, addr_src)   do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); } while (0)
+
+#define  MEM_VAL_COPY_GET_INT16U_LITTLE(addr_dest, addr_src)   do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 1)) = (*(((CPU_INT08U *)(addr_src)) + 1)); } while (0)
+
+#define  MEM_VAL_COPY_GET_INT32U_LITTLE(addr_dest, addr_src)   do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 1)) = (*(((CPU_INT08U *)(addr_src)) + 1)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 2)) = (*(((CPU_INT08U *)(addr_src)) + 2)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 3)) = (*(((CPU_INT08U *)(addr_src)) + 3)); } while (0)
+
+
+
+#define  MEM_VAL_COPY_GET_INT08U(addr_dest, addr_src)               MEM_VAL_COPY_GET_INT08U_LITTLE(addr_dest, addr_src)
+#define  MEM_VAL_COPY_GET_INT16U(addr_dest, addr_src)               MEM_VAL_COPY_GET_INT16U_LITTLE(addr_dest, addr_src)
+#define  MEM_VAL_COPY_GET_INT32U(addr_dest, addr_src)               MEM_VAL_COPY_GET_INT32U_LITTLE(addr_dest, addr_src)
+
+
+
+
+#else                                                           /* See Note #7.                                         */
+
+#error  "CPU_CFG_ENDIAN_TYPE  illegally #defined in 'cpu.h'      "
+#error  "                     [See 'cpu.h  CONFIGURATION ERRORS']"
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     MEM_VAL_COPY_GET_INTU_xxx()
+*
+* Description : Copy & decode data values from any CPU memory address to any CPU memory address for
+*                   any sized data values.
+*
+* Argument(s) : addr_dest       Lowest CPU memory address to copy/decode source address's data value
+*                                   (see Notes #2 & #3).
+*
+*               addr_src        Lowest CPU memory address of data value to copy/decode
+*                                   (see Notes #2 & #3).
+*
+*               val_size        Number of data value octets to copy/decode.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Copy/decode data values based on the values' data-word order :
+*
+*                       MEM_VAL_COPY_GET_INTU_BIG()     Decode big-   endian data values -- data words' most
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_COPY_GET_INTU_LITTLE()  Decode little-endian data values -- data words' least
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_COPY_GET_INTU()         Decode data values using CPU's native or configured
+*                                                           data-word order
+*
+*                   See also 'cpu.h  CPU WORD CONFIGURATION  Note #2'.
+*
+*               (2) (a) CPU memory addresses/pointers NOT checked for NULL.
+*
+*                   (b) CPU memory addresses/buffers  NOT checked for overlapping.
+*
+*                       (1) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that
+*                           "copying ... between objects that overlap ... is undefined".
+*
+*               (3) MEM_VAL_COPY_GET_INTU_xxx() macro's copy/decode data values without regard to CPU word-
+*                   aligned addresses.  Thus for processors that require data word alignment, data words
+*                   can be copied/decoded to/from any CPU address, word-aligned or not, without generating
+*                   data-word-alignment exceptions/faults.
+*
+*               (4) MEM_VAL_COPY_GET_xxx() macro's are more efficient than MEM_VAL_COPY_GET_INTU_xxx()
+*                   macro's & SHOULD be used whenever possible.
+*
+*                   See also 'MEM_VAL_COPY_GET_xxx()  Note #4'.
+*
+*               (5) Since octet-order copy/conversion are inverse operations, MEM_VAL_COPY_GET_INTU_xxx() &
+*                   MEM_VAL_COPY_SET_INTU_xxx() macros are inverse, but identical, operations & are provided
+*                   in both forms for semantics & consistency.
+*
+*                   See also 'MEM_VAL_COPY_SET_INTU_xxx()  Note #5'.
+*
+*               (6) MEM_VAL_COPY_GET_INTU_xxx() macro's are NOT atomic operations & MUST NOT be used on any
+*                   non-static (i.e. volatile) variables, registers, hardware, etc.; without the caller of
+*                   the macro's providing some form of additional protection (e.g. mutual exclusion).
+*
+*               (7) MISRA-C 2004 Rule 5.2 states that "identifiers in an inner scope shall not use the same
+*                   name as an indentifier in an outer scope, and therefore hide that identifier".
+*
+*                   Therefore, to avoid possible redeclaration of commonly-used loop counter identifier names,
+*                   'i' & 'j', MEM_VAL_COPY_GET_INTU_xxx() loop counter identifier names are prefixed with a
+*                   single underscore.
+*
+*               (8) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
+*                   linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
+*                   constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
+*                   value (see 'cpu.h  CPU WORD CONFIGURATION  Note #2').  The 'else'-conditional code is
+*                   included as an extra precaution in case 'cpu.h' is incorrectly configured.
+*********************************************************************************************************
+*/
+
+#if     (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
+
+
+#define  MEM_VAL_COPY_GET_INTU_BIG(addr_dest, addr_src, val_size)       do {                                                                                  \
+                                                                            CPU_SIZE_T  _i;                                                                   \
+                                                                                                                                                              \
+                                                                            for (_i = 0; _i < (val_size); _i++) {                                             \
+                                                                                (*(((CPU_INT08U *)(addr_dest)) + _i)) = (*(((CPU_INT08U *)(addr_src)) + _i)); \
+                                                                            }                                                                                 \
+                                                                        } while (0)
+
+
+#define  MEM_VAL_COPY_GET_INTU_LITTLE(addr_dest, addr_src, val_size)    do {                                                                                  \
+                                                                            CPU_SIZE_T  _i;                                                                   \
+                                                                            CPU_SIZE_T  _j;                                                                   \
+                                                                                                                                                              \
+                                                                                                                                                              \
+                                                                            _j = (val_size) - 1;                                                              \
+                                                                                                                                                              \
+                                                                            for (_i = 0; _i < (val_size); _i++) {                                             \
+                                                                                (*(((CPU_INT08U *)(addr_dest)) + _i)) = (*(((CPU_INT08U *)(addr_src)) + _j)); \
+                                                                                _j--;                                                                         \
+                                                                            }                                                                                 \
+                                                                        } while (0)
+
+
+#define  MEM_VAL_COPY_GET_INTU(addr_dest, addr_src, val_size)           MEM_VAL_COPY_GET_INTU_BIG(addr_dest, addr_src, val_size)
+
+
+
+
+#elif   (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
+
+
+#define  MEM_VAL_COPY_GET_INTU_BIG(addr_dest, addr_src, val_size)       do {                                                                                  \
+                                                                            CPU_SIZE_T  _i;                                                                   \
+                                                                            CPU_SIZE_T  _j;                                                                   \
+                                                                                                                                                              \
+                                                                                                                                                              \
+                                                                            _j = (val_size) - 1;                                                              \
+                                                                                                                                                              \
+                                                                            for (_i = 0; _i < (val_size); _i++) {                                             \
+                                                                                (*(((CPU_INT08U *)(addr_dest)) + _i)) = (*(((CPU_INT08U *)(addr_src)) + _j)); \
+                                                                                _j--;                                                                         \
+                                                                            }                                                                                 \
+                                                                        } while (0)
+
+
+#define  MEM_VAL_COPY_GET_INTU_LITTLE(addr_dest, addr_src, val_size)    do {                                                                                  \
+                                                                            CPU_SIZE_T  _i;                                                                   \
+                                                                                                                                                              \
+                                                                            for (_i = 0; _i < (val_size); _i++) {                                             \
+                                                                                (*(((CPU_INT08U *)(addr_dest)) + _i)) = (*(((CPU_INT08U *)(addr_src)) + _i)); \
+                                                                            }                                                                                 \
+                                                                        } while (0)
+
+
+#define  MEM_VAL_COPY_GET_INTU(addr_dest, addr_src, val_size)           MEM_VAL_COPY_GET_INTU_LITTLE(addr_dest, addr_src, val_size)
+
+
+
+
+#else                                                           /* See Note #8.                                         */
+
+#error  "CPU_CFG_ENDIAN_TYPE  illegally #defined in 'cpu.h'      "
+#error  "                     [See 'cpu.h  CONFIGURATION ERRORS']"
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       MEM_VAL_COPY_SET_xxx()
+*
+* Description : Copy & encode data values from any CPU memory address to any CPU memory address.
+*
+* Argument(s) : addr_dest       Lowest CPU memory address to copy/encode source address's data value
+*                                   (see Notes #2 & #3).
+*
+*               addr_src        Lowest CPU memory address of data value to copy/encode
+*                                   (see Notes #2 & #3).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Copy/encode data values based on the values' data-word order :
+*
+*                       MEM_VAL_COPY_SET_xxx_BIG()      Encode big-   endian data values -- data words' most
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_COPY_SET_xxx_LITTLE()   Encode little-endian data values -- data words' least
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_COPY_SET_xxx()          Encode data values using CPU's native or configured
+*                                                           data-word order
+*
+*                   See also 'cpu.h  CPU WORD CONFIGURATION  Note #2'.
+*
+*               (2) (a) CPU memory addresses/pointers NOT checked for NULL.
+*
+*                   (b) CPU memory addresses/buffers  NOT checked for overlapping.
+*
+*                       (1) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that
+*                           "copying ... between objects that overlap ... is undefined".
+*
+*               (3) MEM_VAL_COPY_SET_xxx() macro's copy/encode data values without regard to CPU word-aligned
+*                   addresses.  Thus for processors that require data word alignment, data words can be copied/
+*                   encoded to/from any CPU address, word-aligned or not, without generating data-word-alignment
+*                   exceptions/faults.
+*
+*               (4) MEM_VAL_COPY_SET_xxx() macro's are more efficient than MEM_VAL_SET_xxx() macro's & are
+*                   also independent of CPU data-word-alignment & SHOULD be used whenever possible.
+*
+*                   See also 'MEM_VAL_SET_xxx()  Note #4'.
+*
+*               (5) Since octet-order copy/conversion are inverse operations, MEM_VAL_COPY_GET_xxx() &
+*                   MEM_VAL_COPY_SET_xxx() macros are inverse, but identical, operations & are provided
+*                   in both forms for semantics & consistency.
+*
+*                   See also 'MEM_VAL_COPY_GET_xxx()  Note #5'.
+*
+*               (6) MEM_VAL_COPY_SET_xxx() macro's are NOT atomic operations & MUST NOT be used on any
+*                   non-static (i.e. volatile) variables, registers, hardware, etc.; without the caller
+*                   of the  macro's providing some form of additional protection (e.g. mutual exclusion).
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #5.                                         */
+#define  MEM_VAL_COPY_SET_INT08U_BIG(addr_dest, addr_src)               MEM_VAL_COPY_GET_INT08U_BIG(addr_dest, addr_src)
+#define  MEM_VAL_COPY_SET_INT16U_BIG(addr_dest, addr_src)               MEM_VAL_COPY_GET_INT16U_BIG(addr_dest, addr_src)
+#define  MEM_VAL_COPY_SET_INT32U_BIG(addr_dest, addr_src)               MEM_VAL_COPY_GET_INT32U_BIG(addr_dest, addr_src)
+
+#define  MEM_VAL_COPY_SET_INT08U_LITTLE(addr_dest, addr_src)            MEM_VAL_COPY_GET_INT08U_LITTLE(addr_dest, addr_src)
+#define  MEM_VAL_COPY_SET_INT16U_LITTLE(addr_dest, addr_src)            MEM_VAL_COPY_GET_INT16U_LITTLE(addr_dest, addr_src)
+#define  MEM_VAL_COPY_SET_INT32U_LITTLE(addr_dest, addr_src)            MEM_VAL_COPY_GET_INT32U_LITTLE(addr_dest, addr_src)
+
+
+#define  MEM_VAL_COPY_SET_INT08U(addr_dest, addr_src)                   MEM_VAL_COPY_GET_INT08U(addr_dest, addr_src)
+#define  MEM_VAL_COPY_SET_INT16U(addr_dest, addr_src)                   MEM_VAL_COPY_GET_INT16U(addr_dest, addr_src)
+#define  MEM_VAL_COPY_SET_INT32U(addr_dest, addr_src)                   MEM_VAL_COPY_GET_INT32U(addr_dest, addr_src)
+
+
+/*
+*********************************************************************************************************
+*                                     MEM_VAL_COPY_SET_INTU_xxx()
+*
+* Description : Copy & encode data values from any CPU memory address to any CPU memory address for
+*                   any sized data values.
+*
+* Argument(s) : addr_dest       Lowest CPU memory address to copy/encode source address's data value
+*                                   (see Notes #2 & #3).
+*
+*               addr_src        Lowest CPU memory address of data value to copy/encode
+*                                   (see Notes #2 & #3).
+*
+*               val_size        Number of data value octets to copy/encode.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Copy/encode data values based on the values' data-word order :
+*
+*                       MEM_VAL_COPY_SET_INTU_BIG()     Encode big-   endian data values -- data words' most
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_COPY_SET_INTU_LITTLE()  Encode little-endian data values -- data words' least
+*                                                           significant octet @ lowest memory address
+*                       MEM_VAL_COPY_SET_INTU()         Encode data values using CPU's native or configured
+*                                                           data-word order
+*
+*                   See also 'cpu.h  CPU WORD CONFIGURATION  Note #2'.
+*
+*               (2) (a) CPU memory addresses/pointers NOT checked for NULL.
+*
+*                   (b) CPU memory addresses/buffers  NOT checked for overlapping.
+*
+*                       (1) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that
+*                           "copying ... between objects that overlap ... is undefined".
+*
+*               (3) MEM_VAL_COPY_SET_INTU_xxx() macro's copy/encode data values without regard to CPU word-
+*                   aligned addresses.  Thus for processors that require data word alignment, data words
+*                   can be copied/encoded to/from any CPU address, word-aligned or not, without generating
+*                   data-word-alignment exceptions/faults.
+*
+*               (4) MEM_VAL_COPY_SET_xxx() macro's are more efficient than MEM_VAL_COPY_SET_INTU_xxx()
+*                   macro's & SHOULD be used whenever possible.
+*
+*                   See also 'MEM_VAL_COPY_SET_xxx()  Note #4'.
+*
+*               (5) Since octet-order copy/conversion are inverse operations, MEM_VAL_COPY_GET_INTU_xxx() &
+*                   MEM_VAL_COPY_SET_INTU_xxx() macros are inverse, but identical, operations & are provided
+*                   in both forms for semantics & consistency.
+*
+*                   See also 'MEM_VAL_COPY_GET_INTU_xxx()  Note #5'.
+*
+*               (6) MEM_VAL_COPY_SET_INTU_xxx() macro's are NOT atomic operations & MUST NOT be used on any
+*                   non-static (i.e. volatile) variables, registers, hardware, etc.; without the caller of
+*                   the macro's providing some form of additional protection (e.g. mutual exclusion).
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #5.                                         */
+#define  MEM_VAL_COPY_SET_INTU_BIG(addr_dest, addr_src, val_size)       MEM_VAL_COPY_GET_INTU_BIG(addr_dest, addr_src, val_size)
+#define  MEM_VAL_COPY_SET_INTU_LITTLE(addr_dest, addr_src, val_size)    MEM_VAL_COPY_GET_INTU_LITTLE(addr_dest, addr_src, val_size)
+#define  MEM_VAL_COPY_SET_INTU(addr_dest, addr_src, val_size)           MEM_VAL_COPY_GET_INTU(addr_dest, addr_src, val_size)
+
+
+/*
+*********************************************************************************************************
+*                                         MEM_VAL_COPY_xxx()
+*
+* Description : Copy data values from any CPU memory address to any CPU memory address.
+*
+* Argument(s) : addr_dest       Lowest CPU memory address to copy source address's data value
+*                                   (see Notes #2 & #3).
+*
+*               addr_src        Lowest CPU memory address of data value to copy
+*                                   (see Notes #2 & #3).
+*
+*               val_size        Number of data value octets to copy.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) MEM_VAL_COPY_xxx() macro's copy data values based on CPU's native data-word order.
+*
+*                   See also 'cpu.h  CPU WORD CONFIGURATION  Note #2'.
+*
+*               (2) (a) CPU memory addresses/pointers NOT checked for NULL.
+*
+*                   (b) CPU memory addresses/buffers  NOT checked for overlapping.
+*
+*                       (1) IEEE Std 1003.1, 2004 Edition, Section 'memcpy() : DESCRIPTION' states that
+*                           "copying ... between objects that overlap ... is undefined".
+*
+*               (3) MEM_VAL_COPY_xxx() macro's copy data values without regard to CPU word-aligned addresses.
+*                   Thus for processors that require data word alignment, data words can be copied to/from any
+*                   CPU address, word-aligned or not, without generating data-word-alignment exceptions/faults.
+*
+*               (4) MEM_VAL_COPY_xxx() macro's are more efficient than MEM_VAL_COPY() macro & SHOULD be
+*                   used whenever possible.
+*
+*               (5) MEM_VAL_COPY_xxx() macro's are NOT atomic operations & MUST NOT be used on any non-static
+*                   (i.e. volatile) variables, registers, hardware, etc.; without the caller of the macro's
+*                   providing some form of additional protection (e.g. mutual exclusion).
+*
+*               (6) MISRA-C 2004 Rule 5.2 states that "identifiers in an inner scope shall not use the same
+*                   name as an indentifier in an outer scope, and therefore hide that identifier".
+*
+*                   Therefore, to avoid possible redeclaration of commonly-used loop counter identifier name,
+*                   'i', MEM_VAL_COPY() loop counter identifier name is prefixed with a single underscore.
+*********************************************************************************************************
+*/
+
+#define  MEM_VAL_COPY_08(addr_dest, addr_src)                  do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); } while (0)
+
+#define  MEM_VAL_COPY_16(addr_dest, addr_src)                  do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 1)) = (*(((CPU_INT08U *)(addr_src)) + 1)); } while (0)
+
+#define  MEM_VAL_COPY_32(addr_dest, addr_src)                  do { (*(((CPU_INT08U *)(addr_dest)) + 0)) = (*(((CPU_INT08U *)(addr_src)) + 0)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 1)) = (*(((CPU_INT08U *)(addr_src)) + 1)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 2)) = (*(((CPU_INT08U *)(addr_src)) + 2)); \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) + 3)) = (*(((CPU_INT08U *)(addr_src)) + 3)); } while (0)
+
+
+#define  MEM_VAL_COPY(addr_dest, addr_src, val_size)        do {                                                                                \
+                                                                CPU_SIZE_T  _i;                                                                 \
+                                                                                                                                                \
+                                                                for (_i = 0; _i < (val_size); _i++) {                                           \
+                                                                    (*(((CPU_INT08U *)(addr_dest)) +_i)) = (*(((CPU_INT08U *)(addr_src)) +_i)); \
+                                                                }                                                                               \
+                                                            } while (0)
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void               Mem_Init                 (       void);
+
+                                                                /* ------------------ MEM API  FNCTS ------------------ */
+void               Mem_Clr                  (       void              *pmem,
+                                                    CPU_SIZE_T         size);
+
+void               Mem_Set                  (       void              *pmem,
+                                                    CPU_INT08U         data_val,
+                                                    CPU_SIZE_T         size);
+
+void               Mem_Copy                 (       void              *pdest,
+                                             const  void              *psrc,
+                                                    CPU_SIZE_T         size);
+
+void               Mem_Move                 (       void              *pdest,
+                                             const  void              *psrc,
+                                                    CPU_SIZE_T         size);
+
+CPU_BOOLEAN        Mem_Cmp                  (const  void              *p1_mem,
+                                             const  void              *p2_mem,
+                                                    CPU_SIZE_T         size);
+
+
+                                                                /* ----------- MEM HEAP FNCTS (DEPRECATED) ------------ */
+#if (LIB_MEM_CFG_HEAP_SIZE > 0u)
+void              *Mem_HeapAlloc            (       CPU_SIZE_T         size,
+                                                    CPU_SIZE_T         align,
+                                                    CPU_SIZE_T        *p_bytes_reqd,
+                                                    LIB_ERR           *p_err);
+
+CPU_SIZE_T         Mem_HeapGetSizeRem       (       CPU_SIZE_T         align,
+                                                    LIB_ERR           *p_err);
+#endif
+
+                                                                /* ------------------ MEM SEG FNCTS ------------------- */
+void               Mem_SegCreate            (const  CPU_CHAR          *p_name,
+                                                    MEM_SEG           *p_seg,
+                                                    CPU_ADDR           seg_base_addr,
+                                                    CPU_SIZE_T         size,
+                                                    CPU_SIZE_T         padding_align,
+                                                    LIB_ERR           *p_err);
+
+void               Mem_SegClr               (       MEM_SEG           *p_seg,
+                                                    LIB_ERR           *p_err);
+
+void              *Mem_SegAlloc             (const  CPU_CHAR          *p_name,
+                                                    MEM_SEG           *p_seg,
+                                                    CPU_SIZE_T         size,
+                                                    LIB_ERR           *p_err);
+
+void              *Mem_SegAllocExt          (const  CPU_CHAR          *p_name,
+                                                    MEM_SEG           *p_seg,
+                                                    CPU_SIZE_T         size,
+                                                    CPU_SIZE_T         align,
+                                                    CPU_SIZE_T        *p_bytes_reqd,
+                                                    LIB_ERR           *p_err);
+
+void              *Mem_SegAllocHW           (const  CPU_CHAR          *p_name,
+                                                    MEM_SEG           *p_seg,
+                                                    CPU_SIZE_T         size,
+                                                    CPU_SIZE_T         align,
+                                                    CPU_SIZE_T        *p_bytes_reqd,
+                                                    LIB_ERR           *p_err);
+
+CPU_SIZE_T         Mem_SegRemSizeGet        (       MEM_SEG           *p_seg,
+                                                    CPU_SIZE_T         align,
+                                                    MEM_SEG_INFO      *p_seg_info,
+                                                    LIB_ERR           *p_err);
+
+#if (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED)
+void               Mem_OutputUsage          (       void             (*out_fnct) (CPU_CHAR *),
+                                                    LIB_ERR           *p_err);
+#endif
+
+                                                                /* -------- STATIC MEM POOL FNCTS (DEPRECATED) -------- */
+void               Mem_PoolCreate           (       MEM_POOL          *p_pool,
+                                                    void              *p_mem_base,
+                                                    CPU_SIZE_T         mem_size,
+                                                    MEM_POOL_BLK_QTY   blk_nbr,
+                                                    CPU_SIZE_T         blk_size,
+                                                    CPU_SIZE_T         blk_align,
+                                                    CPU_SIZE_T        *p_bytes_reqd,
+                                                    LIB_ERR           *p_err);
+
+void               Mem_PoolClr              (       MEM_POOL          *p_pool,
+                                                    LIB_ERR           *p_err);
+
+void              *Mem_PoolBlkGet           (       MEM_POOL          *p_pool,
+                                                    CPU_SIZE_T         size,
+                                                    LIB_ERR           *p_err);
+
+void               Mem_PoolBlkFree          (       MEM_POOL          *p_pool,
+                                                    void              *p_blk,
+                                                    LIB_ERR           *p_err);
+
+MEM_POOL_BLK_QTY   Mem_PoolBlkGetNbrAvail   (       MEM_POOL          *p_pool,
+                                                    LIB_ERR           *p_err);
+
+                                                                /* -------------- DYNAMIC MEM POOL FNCTS -------------- */
+void               Mem_DynPoolCreate        (const  CPU_CHAR          *p_name,
+                                                    MEM_DYN_POOL      *p_pool,
+                                                    MEM_SEG           *p_seg,
+                                                    CPU_SIZE_T         blk_size,
+                                                    CPU_SIZE_T         blk_align,
+                                                    CPU_SIZE_T         blk_qty_init,
+                                                    CPU_SIZE_T         blk_qty_max,
+                                                    LIB_ERR           *p_err);
+
+void               Mem_DynPoolCreateHW      (const  CPU_CHAR          *p_name,
+                                                    MEM_DYN_POOL      *p_pool,
+                                                    MEM_SEG           *p_seg,
+                                                    CPU_SIZE_T         blk_size,
+                                                    CPU_SIZE_T         blk_align,
+                                                    CPU_SIZE_T         blk_qty_init,
+                                                    CPU_SIZE_T         blk_qty_max,
+                                                    LIB_ERR           *p_err);
+
+void              *Mem_DynPoolBlkGet        (       MEM_DYN_POOL      *p_pool,
+                                                    LIB_ERR           *p_err);
+
+void               Mem_DynPoolBlkFree       (       MEM_DYN_POOL      *p_pool,
+                                                    void              *p_blk,
+                                                    LIB_ERR           *p_err);
+
+CPU_SIZE_T         Mem_DynPoolBlkNbrAvailGet(       MEM_DYN_POOL      *p_pool,
+                                                    LIB_ERR           *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  LIB_MEM_CFG_ARG_CHK_EXT_EN
+#error  "LIB_MEM_CFG_ARG_CHK_EXT_EN         not #define'd in 'lib_cfg.h'"
+#error  "                             [MUST be  DEF_DISABLED]           "
+#error  "                             [     ||  DEF_ENABLED ]           "
+
+#elif  ((LIB_MEM_CFG_ARG_CHK_EXT_EN != DEF_DISABLED) && \
+        (LIB_MEM_CFG_ARG_CHK_EXT_EN != DEF_ENABLED ))
+#error  "LIB_MEM_CFG_ARG_CHK_EXT_EN   illegally #define'd in 'lib_cfg.h'"
+#error  "                             [MUST be  DEF_DISABLED]           "
+#error  "                             [     ||  DEF_ENABLED ]           "
+#endif
+
+
+
+#ifndef  LIB_MEM_CFG_OPTIMIZE_ASM_EN
+#error  "LIB_MEM_CFG_OPTIMIZE_ASM_EN        not #define'd in 'lib_cfg.h'"
+#error  "                             [MUST be  DEF_DISABLED]           "
+#error  "                             [     ||  DEF_ENABLED ]           "
+
+#elif  ((LIB_MEM_CFG_OPTIMIZE_ASM_EN != DEF_DISABLED) && \
+        (LIB_MEM_CFG_OPTIMIZE_ASM_EN != DEF_ENABLED ))
+#error  "LIB_MEM_CFG_OPTIMIZE_ASM_EN  illegally #define'd in 'lib_cfg.h'"
+#error  "                             [MUST be  DEF_DISABLED]           "
+#error  "                             [     ||  DEF_ENABLED ]           "
+#endif
+
+
+#ifndef  LIB_MEM_CFG_HEAP_SIZE
+#error  "LIB_MEM_CFG_HEAP_SIZE              not #define'd in 'lib_cfg.h'"
+#error  "                                   [MUST be  >= 0]             "
+#endif
+
+
+#ifdef   LIB_MEM_CFG_HEAP_BASE_ADDR
+#if     (LIB_MEM_CFG_HEAP_BASE_ADDR == 0x0)
+#error  "LIB_MEM_CFG_HEAP_BASE_ADDR   illegally #define'd in 'lib_cfg.h'"
+#error  "                             [MUST be  > 0x0]                  "
+#endif
+#endif
+
+
+#if    ((LIB_MEM_CFG_DBG_INFO_EN != DEF_DISABLED) && \
+        (LIB_MEM_CFG_DBG_INFO_EN != DEF_ENABLED ))
+#error  "LIB_MEM_CFG_DBG_INFO_EN illegally defined in 'lib_cfg.h'"
+#error  "                        [MUST be  DEF_DISABLED]         "
+#error  "                        [     ||  DEF_ENABLED ]         "
+
+#elif  ((LIB_MEM_CFG_HEAP_SIZE   == 0u) &&           \
+        (LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED))
+#error  "LIB_MEM_CFG_HEAP_SIZE illegally defined in 'lib_cfg.h'                         "
+#error  "                      [MUST be > 0 when LIB_MEM_CFG_DBG_INFO_EN == DEF_ENABLED]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    LIBRARY CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* See 'lib_mem.h  Note #2a'.                           */
+#if     (CPU_CORE_VERSION < 127u)
+#error  "CPU_CORE_VERSION  [SHOULD be >= V1.27]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'lib_mem.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of lib mem module include.                       */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/lib_str.c b/src/ucos_v1_42/micrium_source/uC-LIB/lib_str.c
new file mode 100644
index 0000000..0c66ab6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/lib_str.c
@@ -0,0 +1,4039 @@
+/*
+*********************************************************************************************************
+*                                                uC/LIB
+*                                        CUSTOM LIBRARY MODULES
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/LIB is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       ASCII STRING MANAGEMENT
+*
+* Filename      : lib_str.c
+* Version       : V1.38.01
+* Programmer(s) : ITJ
+*                 BAN
+*                 JDH
+*********************************************************************************************************
+* Note(s)       : (1) NO compiler-supplied standard library functions are used in library or product software.
+*
+*                     (a) ALL standard library functions are implemented in the custom library modules :
+*
+*                         (1) \\lib_*.*
+*
+*                         (2) \\Ports\\\lib*_a.*
+*
+*                               where
+*                                             directory path for custom library software
+*                                                                  directory name for specific processor (CPU)
+*                                                             directory name for specific compiler
+*
+*                     (b) Product-specific library functions are implemented in individual products.
+*
+*********************************************************************************************************
+* Notice(s)     : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given
+*                     us permission to reprint portions of their documentation.  Portions of this text are
+*                     reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition,
+*                     Standard for Information Technology -- Portable Operating System Interface (POSIX),
+*                     The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute
+*                     of Electrical and Electronics Engineers, Inc and The Open Group.  In the event of any
+*                     discrepancy between these versions and the original IEEE and The Open Group Standard,
+*                     the original IEEE and The Open Group Standard is the referee document.  The original
+*                     Standard can be obtained online at http://www.opengroup.org/unix/online.html.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    LIB_STR_MODULE
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+static  const  CPU_INT32U  Str_MultOvfThTbl_Int32U[] = {
+   (CPU_INT32U) DEF_INT_32U_MAX_VAL,                /*                Invalid base  0.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL /  1u),         /*                Invalid base  1.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL /  2u),         /* 32-bit mult ovf th for base  2.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL /  3u),         /* 32-bit mult ovf th for base  3.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL /  4u),         /* 32-bit mult ovf th for base  4.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL /  5u),         /* 32-bit mult ovf th for base  5.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL /  6u),         /* 32-bit mult ovf th for base  6.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL /  7u),         /* 32-bit mult ovf th for base  7.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL /  8u),         /* 32-bit mult ovf th for base  8.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL /  9u),         /* 32-bit mult ovf th for base  9.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 10u),         /* 32-bit mult ovf th for base 10.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 11u),         /* 32-bit mult ovf th for base 11.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 12u),         /* 32-bit mult ovf th for base 12.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 13u),         /* 32-bit mult ovf th for base 13.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 14u),         /* 32-bit mult ovf th for base 14.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 15u),         /* 32-bit mult ovf th for base 15.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 16u),         /* 32-bit mult ovf th for base 16.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 17u),         /* 32-bit mult ovf th for base 17.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 18u),         /* 32-bit mult ovf th for base 18.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 19u),         /* 32-bit mult ovf th for base 19.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 20u),         /* 32-bit mult ovf th for base 20.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 21u),         /* 32-bit mult ovf th for base 21.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 22u),         /* 32-bit mult ovf th for base 22.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 23u),         /* 32-bit mult ovf th for base 23.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 24u),         /* 32-bit mult ovf th for base 24.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 25u),         /* 32-bit mult ovf th for base 25.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 26u),         /* 32-bit mult ovf th for base 26.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 27u),         /* 32-bit mult ovf th for base 27.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 28u),         /* 32-bit mult ovf th for base 28.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 29u),         /* 32-bit mult ovf th for base 29.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 30u),         /* 32-bit mult ovf th for base 30.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 31u),         /* 32-bit mult ovf th for base 31.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 32u),         /* 32-bit mult ovf th for base 32.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 33u),         /* 32-bit mult ovf th for base 33.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 34u),         /* 32-bit mult ovf th for base 34.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 35u),         /* 32-bit mult ovf th for base 35.  */
+   (CPU_INT32U)(DEF_INT_32U_MAX_VAL / 36u)          /* 32-bit mult ovf th for base 36.  */
+};
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  CPU_CHAR    *Str_FmtNbr_Int32  (       CPU_INT32U     nbr,
+                                               CPU_INT08U     nbr_dig,
+                                               CPU_INT08U     nbr_base,
+                                               CPU_BOOLEAN    nbr_neg,
+                                               CPU_CHAR       lead_char,
+                                               CPU_BOOLEAN    lower_case,
+                                               CPU_BOOLEAN    nul,
+                                               CPU_CHAR      *pstr);
+
+static  CPU_INT32U   Str_ParseNbr_Int32(const  CPU_CHAR      *pstr,
+                                               CPU_CHAR     **pstr_next,
+                                               CPU_INT08U     nbr_base,
+                                               CPU_BOOLEAN    nbr_signed,
+                                               CPU_BOOLEAN   *pnbr_neg);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              Str_Len()
+*
+* Description : Calculate length of a string.
+*
+* Argument(s) : pstr        Pointer to string (see Note #1).
+*
+* Return(s)   : Length of string; number of characters in string before terminating NULL character
+*                   (see Note #2b1).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strlen() : DESCRIPTION' states that :
+*
+*                       (1) "The strlen() function shall compute the number of bytes in the string to
+*                            which 's' ('pstr') points," ...
+*                       (2) "not including the terminating null byte."
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strlen() : RETURN VALUE' states that :
+*
+*                       (1) "The strlen() function shall return the length of 's' ('pstr');" ...
+*                       (2) "no return value shall be reserved to indicate an error."
+*
+*               (3) String length calculation terminates when :
+*
+*                   (a) String pointer points to NULL.
+*                       (1) String buffer overlaps with NULL address.
+*                       (2) String length calculated for string up to but NOT beyond or including
+*                           the NULL address.
+*
+*                   (b) Terminating NULL character found.
+*                       (1) String length calculated for string up to but NOT           including
+*                           the NULL character (see Note #2a2).
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  Str_Len (const  CPU_CHAR  *pstr)
+{
+    CPU_SIZE_T  len;
+
+
+    len = Str_Len_N(pstr,
+                    DEF_INT_CPU_U_MAX_VAL);
+
+    return (len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Str_Len_N()
+*
+* Description : Calculate length of a string, up to a maximum number of characters.
+*
+* Argument(s) : pstr        Pointer to string (see Note #1).
+*
+*               len_max     Maximum number of characters to search (see Note #3c).
+*
+* Return(s)   : Length of string; number of characters in string before terminating NULL character,
+*                   if terminating NULL character     found (see Note #2b1).
+*
+*               Requested maximum number of characters to search,
+*                   if terminating NULL character NOT found (see Note #3c).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strlen() : DESCRIPTION' states that :
+*
+*                       (1) "The strlen() function shall compute the number of bytes in the string to
+*                            which 's' ('pstr') points," ...
+*                       (2) "not including the terminating null byte."
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strlen() : RETURN VALUE' states that :
+*
+*                       (1) "The strlen() function shall return the length of 's' ('pstr');" ...
+*                       (2) "no return value shall be reserved to indicate an error."
+*
+*               (3) String length calculation terminates when :
+*
+*                   (a) String pointer points to NULL.
+*                       (1) String buffer overlaps with NULL address.
+*                       (2) String length calculated for string up to but NOT beyond or including
+*                           the NULL address.
+*
+*                   (b) Terminating NULL character found.
+*                       (1) String length calculated for string up to but NOT           including
+*                           the NULL character (see Note #2a2).
+*
+*                   (c) 'len_max' number of characters searched.
+*                       (1) 'len_max' number of characters does NOT include the terminating NULL character.
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  Str_Len_N (const  CPU_CHAR    *pstr,
+                              CPU_SIZE_T   len_max)
+{
+    const  CPU_CHAR    *pstr_len;
+           CPU_SIZE_T   len;
+
+
+    pstr_len = pstr;
+    len      = 0u;
+    while (( pstr_len != (const CPU_CHAR *)  0 ) &&             /* Calc str len until NULL ptr (see Note #3a) ...       */
+           (*pstr_len != (      CPU_CHAR  )'\0') &&             /* ... or NULL char found      (see Note #3b) ...       */
+           ( len      <  (      CPU_SIZE_T)len_max)) {          /* ... or max nbr chars srch'd (see Note #3c).          */
+        pstr_len++;
+        len++;
+    }
+
+    return (len);                                               /* Rtn str len (see Note #3b1).                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Str_Copy()
+*
+* Description : Copy source string to destination string buffer.
+*
+* Argument(s) : pstr_dest   Pointer to destination string buffer to receive source string copy   (see Note #1a).
+*
+*               pstr_src    Pointer to source      string to copy into destination string buffer (see Note #1b).
+*
+* Return(s)   : Pointer to destination string, if NO error(s) [see Note #2b1].
+*
+*               Pointer to NULL,               otherwise      (see Note #2b2A).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) Destination buffer size NOT validated; buffer overruns MUST be prevented by caller.
+*
+*                       (1) Destination buffer size MUST be large enough to accommodate the entire source
+*                           string size including the terminating NULL character.
+*
+*                   (b) Source buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strcpy() : DESCRIPTION' states that :
+*
+*                       (1) "The strcpy() function shall copy the string pointed to by 's2' ('pstr_src')
+*                            ... into the array pointed to by 's1' ('pstr_dest')" ...
+*                       (2) "(including the terminating null byte)."
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strcpy() : RETURN VALUE' states that :
+*
+*                       (1) "The strcpy() function shall return 's1' ('pstr_dest');" ...
+*                       (2) "no return value is reserved to indicate an error."
+*                           (A) #### This requirement is intentionally NOT implemented in order to return
+*                               NULL for any error(s).
+*
+*                   (c) IEEE Std 1003.1, 2004 Edition, Section 'strcpy() : DESCRIPTION' states that "if
+*                       copying takes place between objects that overlap, the behavior is undefined".
+*
+*               (3) String copy terminates when :
+*
+*                   (a) Destination/Source string pointer(s) are passed NULL pointers.
+*                       (1) No string copy performed; NULL pointer returned.
+*
+*                   (b) Destination/Source string pointer(s) point to NULL.
+*                       (1) String buffer(s) overlap with NULL address; NULL pointer returned.
+*
+*                   (c) Source string's terminating NULL character found.
+*                       (1) Entire source string copied into destination string buffer (see Note #2a).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Copy (       CPU_CHAR  *pstr_dest,
+                     const  CPU_CHAR  *pstr_src)
+{
+    CPU_CHAR  *pstr_rtn;
+
+
+    pstr_rtn = Str_Copy_N(pstr_dest,
+                          pstr_src,
+                          DEF_INT_CPU_U_MAX_VAL);
+
+    return (pstr_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            Str_Copy_N()
+*
+* Description : Copy source string to destination string buffer, up to a maximum number of characters.
+*
+* Argument(s) : pstr_dest   Pointer to destination string buffer to receive source string copy   (see Note #1a).
+*
+*               pstr_src    Pointer to source      string to copy into destination string buffer (see Note #1b).
+*
+*               len_max     Maximum number of characters  to copy (see Notes #2a2 & #3d).
+*
+* Return(s)   : Pointer to destination string, if NO error(s) [see Note #2b1].
+*
+*               Pointer to NULL,               otherwise      (see Note #2b2A).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) Destination buffer size NOT validated; buffer overruns MUST be prevented by caller.
+*
+*                       (1) Destination buffer size MUST be large enough to accommodate the entire source
+*                           string size including the terminating NULL character.
+*
+*                   (b) Source string buffer NOT modified.
+*
+*               (2) (a) (1) IEEE Std 1003.1, 2004 Edition, Section 'strncpy() : DESCRIPTION' states that :
+*
+*                           (A) "The strncpy() function shall copy ... the array pointed to by 's2'
+*                               ('pstr_src') to the array pointed to by 's1' ('pstr_dest')"; ...
+*                           (B)  but "not more than 'n' ('len_max') bytes"                   ...
+*                           (C)  &   "(bytes that follow a null byte are not copied)".
+*
+*                       (2) (A) IEEE Std 1003.1, 2004 Edition, Section 'strncpy() : DESCRIPTION' adds that
+*                              "if the array pointed to by 's2' ('pstr_src') is a string that is shorter
+*                               than 'n' ('len_max') bytes, null bytes shall be appended to the copy in
+*                               the array pointed to by 's1' ('pstr_dest'), until 'n' ('len_max') bytes
+*                               in all are written."
+*
+*                               (1) #### Since Str_Copy() limits the maximum number of characters to copy
+*                                   via Str_Copy_N() by the CPU's maximum number of addressable characters,
+*                                   this requirement is intentionally NOT implemented to avoid appending
+*                                   a potentially large number of unnecessary terminating NULL characters.
+*
+*                           (B) IEEE Std 1003.1, 2004 Edition, Section 'strncpy() : APPLICATION USAGE' also
+*                               states that "if there is no null byte in the first 'n' ('len_max') bytes of
+*                               the array pointed to by 's2' ('pstr_src'), the result is not null-terminated".
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strncpy() : RETURN VALUE' states that :
+*
+*                       (1) "The strncpy() function shall return 's1' ('pstr_dest');" ...
+*                       (2) "no return value is reserved to indicate an error."
+*                           (A) #### This requirement is intentionally ignored in order to return NULL
+*                               for any error(s).
+*
+*                   (c) IEEE Std 1003.1, 2004 Edition, Section 'strncpy() : DESCRIPTION' states that "if
+*                       copying takes place between objects that overlap, the behavior is undefined".
+*
+*               (3) String copy terminates when :
+*
+*                   (a) Destination/Source string pointer(s) are passed NULL pointers.
+*                       (1) No string copy performed; NULL pointer returned.
+*
+*                   (b) Destination/Source string pointer(s) point to NULL.
+*                       (1) String buffer(s) overlap with NULL address; NULL pointer returned.
+*
+*                   (c) Source string's terminating NULL character found.
+*                       (1) Entire source string copied into destination string buffer (see Note #2a1A).
+*
+*                   (d) 'len_max' number of characters copied.
+*                       (1) 'len_max' number of characters MAY include the terminating NULL character
+*                           (see Note #2a1C).
+*                       (2) Null copies allowed (i.e. zero-length copies).
+*                           (A) No string copy performed; destination string returned  (see Note #2b1).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Copy_N (       CPU_CHAR    *pstr_dest,
+                       const  CPU_CHAR    *pstr_src,
+                              CPU_SIZE_T   len_max)
+{
+           CPU_CHAR    *pstr_copy_dest;
+    const  CPU_CHAR    *pstr_copy_src;
+           CPU_SIZE_T   len_copy;
+
+                                                                /* Rtn NULL if str ptr(s) NULL (see Note #3a1).         */
+    if (pstr_dest == (CPU_CHAR *)0) {
+        return ((CPU_CHAR *)0);
+    }
+    if (pstr_src  == (const CPU_CHAR *)0) {
+        return ((CPU_CHAR *)0);
+    }
+
+
+    pstr_copy_dest = pstr_dest;
+    pstr_copy_src  = pstr_src;
+    len_copy       = 0u;
+
+    while (( pstr_copy_dest != (      CPU_CHAR *)  0 ) &&       /* Copy str until NULL ptr(s)  [see Note #3b]  ...      */
+           ( pstr_copy_src  != (const CPU_CHAR *)  0 ) &&
+           (*pstr_copy_src  != (      CPU_CHAR  )'\0') &&       /* ... or NULL char found      (see Note #3c); ...      */
+           ( len_copy       <  (      CPU_SIZE_T)len_max)) {    /* ... or max nbr chars copied (see Note #3d).          */
+       *pstr_copy_dest = *pstr_copy_src;
+        pstr_copy_dest++;
+        pstr_copy_src++;
+        len_copy++;
+    }
+
+                                                                /* Rtn NULL if NULL ptr(s) found  (see Note #3b1).      */
+    if ((pstr_copy_dest == (      CPU_CHAR *)0) ||
+        (pstr_copy_src  == (const CPU_CHAR *)0)) {
+         return ((CPU_CHAR *)0);
+    }
+
+    if (len_copy < len_max) {                                   /* If  copy str len < max buf len (see Note #2a2A), ... */
+       *pstr_copy_dest = (CPU_CHAR)'\0';                        /* ... copy NULL char  (see Note #3c1).                 */
+    }
+
+
+    return (pstr_dest);                                         /* Rtn ptr to dest str (see Note #2b1).                 */
+}
+
+
+/*
+*********************************************************************************************************
+*                                              Str_Cat()
+*
+* Description : Append concatenation string to destination string.
+*
+* Argument(s) : pstr_dest   Pointer to destination   string to append concatenation  string (see Note #1a).
+*
+*               pstr_cat    Pointer to concatenation string to append to destination string (see Note #1b).
+*
+* Return(s)   : Pointer to destination string, if NO error(s) [see Note #2b1].
+*
+*               Pointer to NULL,               otherwise      (see Note #2b2A).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) Destination buffer size NOT validated; buffer overruns MUST be prevented by caller.
+*
+*                       (1) Destination buffer size MUST be large enough to accommodate the entire
+*                           concatenated string size including the terminating NULL character.
+*
+*                   (b) Concatenation string buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strcat() : DESCRIPTION' states that :
+*
+*                       (1) "The strcat() function shall append a copy of the string pointed to by 's2'
+*                           ('pstr_cat') ... to the end of the string pointed to by 's1' ('pstr_dest')."
+*
+*                       (2) (A) "The initial byte of 's2' ('pstr_cat') overwrites the null byte at the
+*                                end of 's1' ('pstr_dest')."
+*                           (B)  A "terminating null byte" is appended at the end of the concatenated
+*                                destination strings.
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strcat() : RETURN VALUE' states that :
+*
+*                       (1) "The strcat() function shall return 's1' ('pstr_dest');" ...
+*                       (2) "no return value shall be reserved to indicate an error."
+*                           (A) #### This requirement is intentionally NOT implemented in order to return
+*                               NULL for any error(s).
+*
+*                   (c) IEEE Std 1003.1, 2004 Edition, Section 'strcat() : DESCRIPTION' states that "if
+*                       copying takes place between objects that overlap, the behavior is undefined."
+*
+*               (3) String concatenation terminates when :
+*
+*                   (a) Destination/Concatenation string pointer(s) are passed NULL pointers.
+*                       (1) No string concatenation performed; NULL pointer returned.
+*
+*                   (b) Destination/Concatenation string pointer(s) point to NULL.
+*                       (1) String buffer(s) overlap with NULL address; NULL pointer returned.
+*
+*                   (c) Concatenation string's terminating NULL character found.
+*                       (1) Entire concatenation string appended to destination string (see Note #2a1).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Cat (       CPU_CHAR  *pstr_dest,
+                    const  CPU_CHAR  *pstr_cat)
+{
+    CPU_CHAR  *pstr_rtn;
+
+
+    pstr_rtn = Str_Cat_N(pstr_dest,
+                         pstr_cat,
+                         DEF_INT_CPU_U_MAX_VAL);
+
+    return (pstr_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Str_Cat_N()
+*
+* Description : Append concatenation string to destination string, up to a maximum number of characters.
+*
+* Argument(s) : pstr_dest   Pointer to destination   string to append concatenation  string (see Note #1a).
+*
+*               pstr_cat    Pointer to concatenation string to append to destination string (see Note #1b).
+*
+*               len_max     Maximum number of characters to concatenate (see Notes #2a1B & #3d).
+*
+* Return(s)   : Pointer to destination string, if NO error(s) [see Note #2b1].
+*
+*               Pointer to NULL,               otherwise      (see Note #2b2A).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) Destination buffer size NOT validated; buffer overruns MUST be prevented by caller.
+*
+*                       (1) Destination buffer size MUST be large enough to accommodate the entire
+*                           concatenated string size including the terminating NULL character.
+*
+*                   (b) Concatenation string buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strncat() : DESCRIPTION' states that :
+*
+*                       (1) (A) "The strncat() function shall append ... the array pointed to by 's2'
+*                               ('pstr_cat') to the end of the string pointed to by 's1' ('pstr_dest')" ...
+*                           (B)  but "not more than 'n' ('len_max') bytes".
+*
+*                       (2) (A) "The initial byte of 's2' ('pstr_cat') overwrites the null byte at the
+*                                end of 's1' ('pstr_dest')."
+*                           (B) "(a null byte and bytes that follow it are not appended)."
+*                           (C) "A terminating null byte is always appended to the result."
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strncat() : RETURN VALUE' states that :
+*
+*                       (1) "The strncat() function shall return 's1' ('pstr_dest');" ...
+*                       (2) "no return value shall be reserved to indicate an error."
+*                           (A) #### This requirement is intentionally NOT implemented in order to return
+*                               NULL for any error(s).
+*
+*                   (c) IEEE Std 1003.1, 2004 Edition, Section 'strncat() : DESCRIPTION' states that "if
+*                       copying takes place between objects that overlap, the behavior is undefined."
+*
+*               (3) String concatenation terminates when :
+*
+*                   (a) Destination/Concatenation string pointer(s) are passed NULL pointers.
+*                       (1) No string concatenation performed; NULL pointer returned.
+*
+*                   (b) Destination/Concatenation string pointer(s) point to NULL.
+*                       (1) String buffer(s) overlap with NULL address; NULL pointer returned.
+*
+*                   (c) Concatenation string's terminating NULL character found.
+*                       (1) Entire concatenation string appended to destination string (see Note #2a1A).
+*
+*                   (d) 'len_max' number of characters concatenated.
+*
+*                       (1) 'len_max' number of characters does NOT include the terminating NULL character
+*                           (see Note #2a2).
+*
+*                       (2) Null concatenations allowed (i.e. zero-length concatenations).
+*                           (A) No string concatenation performed; destination string returned
+*                               (see Note #2b1).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Cat_N (       CPU_CHAR    *pstr_dest,
+                      const  CPU_CHAR    *pstr_cat,
+                             CPU_SIZE_T   len_max)
+{
+           CPU_CHAR    *pstr_cat_dest;
+    const  CPU_CHAR    *pstr_cat_src;
+           CPU_SIZE_T   len_cat;
+
+                                                                /* Rtn NULL if str ptr(s) NULL (see Note #3a1).         */
+    if (pstr_dest == (CPU_CHAR *)0) {
+        return ((CPU_CHAR *)0);
+    }
+    if (pstr_cat  == (const CPU_CHAR *)0) {
+        return ((CPU_CHAR *)0);
+    }
+
+    if (len_max < 1) {                                          /* Rtn dest str if cat len = 0 (see Note #3d2A).        */
+        return ((CPU_CHAR *)pstr_dest);
+    }
+
+
+    pstr_cat_dest = pstr_dest;
+    while (( pstr_cat_dest != (CPU_CHAR *)  0 ) &&              /* Adv to end of cur dest str until NULL ptr ...        */
+           (*pstr_cat_dest != (CPU_CHAR  )'\0')) {              /* ... or NULL char found..                             */
+        pstr_cat_dest++;
+    }
+
+    if (pstr_cat_dest == (CPU_CHAR *)0) {                       /* Rtn NULL if NULL ptr found (see Note #3b1).          */
+        return ((CPU_CHAR *)0);
+    }
+
+    pstr_cat_src = pstr_cat;
+    len_cat      = 0u;
+
+    while (( pstr_cat_dest != (      CPU_CHAR *)  0 ) &&        /* Cat str until NULL ptr(s)  [see Note #3b]  ...       */
+           ( pstr_cat_src  != (const CPU_CHAR *)  0 ) &&
+           (*pstr_cat_src  != (      CPU_CHAR  )'\0') &&        /* ... or NULL char found     (see Note #3c); ...       */
+           ( len_cat       <  (      CPU_SIZE_T)len_max)) {     /* ... or max nbr chars cat'd (see Note #3d).           */
+       *pstr_cat_dest = *pstr_cat_src;
+        pstr_cat_dest++;
+        pstr_cat_src++;
+        len_cat++;
+    }
+
+                                                                /* Rtn NULL if NULL ptr(s) found (see Note #3b1).       */
+    if ((pstr_cat_dest == (      CPU_CHAR *)0) ||
+        (pstr_cat_src  == (const CPU_CHAR *)0)) {
+         return ((CPU_CHAR *)0);
+    }
+
+   *pstr_cat_dest = (CPU_CHAR)'\0';                             /* Append NULL char    (see Note #2a2C).                */
+
+
+    return (pstr_dest);                                         /* Rtn ptr to dest str (see Note #2b1).                 */
+}
+
+
+/*
+*********************************************************************************************************
+*                                              Str_Cmp()
+*
+* Description : Determine if two strings are identical.
+*
+* Argument(s) : p1_str      Pointer to first  string (see Note #1).
+*
+*               p2_str      Pointer to second string (see Note #1).
+*
+* Return(s)   : 0,              if strings are identical             (see Notes #3a1A, #3a2A, & #3b).
+*
+*               Negative value, if 'p1_str' is less    than 'p2_str' (see Notes #3a1B1, #3a2B1, & #3c).
+*
+*               Positive value, if 'p1_str' is greater than 'p2_str' (see Notes #3a1B2, #3a2B2, & #3c).
+*
+*               See also Note #2b.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffers NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strcmp() : DESCRIPTION' states that "the
+*                       strcmp() function shall compare the string pointed to by 's1' ('p1_str') to the
+*                       string pointed to by 's2' ('p2_str)".
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'strcmp() : RETURN VALUE' states that
+*                          "upon successful completion, strcmp() shall return an integer greater than,
+*                           equal to, or less than 0".
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'strcmp() : DESCRIPTION' adds that "the
+*                           sign of a non-zero return value shall be determined by the sign of the difference
+*                           between the values of the first pair of bytes ... that differ in the strings
+*                           being compared".
+*
+*               (3) String comparison terminates when :
+*
+*                   (a) (1) (A) BOTH string pointer(s) are passed NULL pointers.
+*                               (1) NULL strings identical; 0 returned.
+*
+*                           (B) (1) 'p1_str' passed a NULL pointer.
+*                                   (a) Return negative value of character pointed to by 'p2_str'.
+*
+*                               (2) 'p2_str' passed a NULL pointer.
+*                                   (a) Return positive value of character pointed to by 'p1_str'.
+*
+*                       (2) (A) BOTH strings point to NULL.
+*                               (1) Strings overlap with NULL address.
+*                               (2) Strings identical up to but NOT beyond or including the NULL address;
+*                                   0 returned.
+*
+*                           (B) (1) 'p1_str_cmp_next' points to NULL.
+*                                   (a) 'p1_str' overlaps with NULL address.
+*                                   (b) Strings compared up to but NOT beyond or including the NULL address.
+*                                   (c) Return negative value of character pointed to by 'p2_str_cmp_next'.
+*
+*                               (2) 'p2_str_cmp_next' points to NULL.
+*                                   (a) 'p2_str' overlaps with NULL address.
+*                                   (b) Strings compared up to but NOT beyond or including the NULL address.
+*                                   (c) Return positive value of character pointed to by 'p1_str_cmp_next'.
+*
+*                   (b) Terminating NULL character found in both strings.
+*                       (1) Strings identical; 0 returned.
+*                       (2) Only one NULL character test required in conditional since previous condition
+*                           tested character equality.
+*
+*                   (c) Non-matching characters found.
+*                       (1) Return signed-integer difference of the character pointed to by 'p2_str'
+*                           from the character pointed to by 'p1_str'.
+*
+*               (4) Since 16-bit signed arithmetic is performed to calculate a non-identical comparison
+*                   return value, 'CPU_CHAR' native data type size MUST be 8-bit.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  Str_Cmp (const  CPU_CHAR  *p1_str,
+                     const  CPU_CHAR  *p2_str)
+{
+    CPU_INT16S  cmp_val;
+
+
+    cmp_val = Str_Cmp_N(p1_str,
+                        p2_str,
+                        DEF_INT_CPU_U_MAX_VAL);
+
+    return (cmp_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Str_Cmp_N()
+*
+* Description : Determine if two strings are identical for up to a maximum number of characters.
+*
+* Argument(s) : p1_str      Pointer to first  string (see Note #1).
+*
+*               p2_str      Pointer to second string (see Note #1).
+*
+*               len_max     Maximum number of characters to compare  (see Note  #3d).
+*
+* Return(s)   : 0,              if strings are identical             (see Notes #3a1A, #3a2A, #3b, & #3d).
+*
+*               Negative value, if 'p1_str' is less    than 'p2_str' (see Notes #3a1B1, #3a2B1, & #3c).
+*
+*               Positive value, if 'p1_str' is greater than 'p2_str' (see Notes #3a1B2, #3a2B2, & #3c).
+*
+*               See also Note #2b.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffers NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strncmp() : DESCRIPTION' states that :
+*
+*                       (1) "The strncmp() function shall compare ... the array pointed to by 's1' ('p1_str')
+*                            to the array pointed to by 's2' ('p2_str)" ...
+*                       (2)  but "not more than 'n' ('len_max') bytes" of either array.
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'strncmp() : RETURN VALUE' states that
+*                          "upon successful completion, strncmp() shall return an integer greater than,
+*                           equal to, or less than 0".
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'strncmp() : DESCRIPTION' adds that
+*                          "the sign of a non-zero return value is determined by the sign of the difference
+*                           between the values of the first pair of bytes ... that differ in the strings
+*                           being compared".
+*
+*               (3) String comparison terminates when :
+*
+*                   (a) (1) (A) BOTH string pointer(s) are passed NULL pointers.
+*                               (1) NULL strings identical; 0 returned.
+*
+*                           (B) (1) 'p1_str' passed a NULL pointer.
+*                                   (a) Return negative value of character pointed to by 'p2_str'.
+*
+*                               (2) 'p2_str' passed a NULL pointer.
+*                                   (a) Return positive value of character pointed to by 'p1_str'.
+*
+*                       (2) (A) BOTH strings point to NULL.
+*                               (1) Strings overlap with NULL address.
+*                               (2) Strings identical up to but NOT beyond or including the NULL address;
+*                                   0 returned.
+*
+*                           (B) (1) 'p1_str_cmp_next' points to NULL.
+*                                   (a) 'p1_str' overlaps with NULL address.
+*                                   (b) Strings compared up to but NOT beyond or including the NULL address.
+*                                   (c) Return negative value of character pointed to by 'p2_str_cmp_next'.
+*
+*                               (2) 'p2_str_cmp_next' points to NULL.
+*                                   (a) 'p2_str' overlaps with NULL address.
+*                                   (b) Strings compared up to but NOT beyond or including the NULL address.
+*                                   (c) Return positive value of character pointed to by 'p1_str_cmp_next'.
+*
+*                   (b) Terminating NULL character found in both strings.
+*                       (1) Strings identical; 0 returned.
+*                       (2) Only one NULL character test required in conditional since previous condition
+*                           tested character equality.
+*
+*                   (c) Non-matching characters found.
+*                       (1) Return signed-integer difference of the character pointed to by 'p2_str'
+*                           from the character pointed to by 'p1_str'.
+*
+*                   (d) (1) 'len_max' passed a zero length.
+*                           (A) Zero-length strings identical; 0 returned.
+*
+*                       (2) First 'len_max' number of characters identical.
+*                           (A) Strings identical; 0 returned.
+*
+*                       See also Note #2a2.
+*
+*               (4) Since 16-bit signed arithmetic is performed to calculate a non-identical comparison
+*                   return value, 'CPU_CHAR' native data type size MUST be 8-bit.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  Str_Cmp_N (const  CPU_CHAR    *p1_str,
+                       const  CPU_CHAR    *p2_str,
+                              CPU_SIZE_T   len_max)
+{
+    const  CPU_CHAR    *p1_str_cmp;
+    const  CPU_CHAR    *p2_str_cmp;
+    const  CPU_CHAR    *p1_str_cmp_next;
+    const  CPU_CHAR    *p2_str_cmp_next;
+           CPU_INT16S   cmp_val;
+           CPU_SIZE_T   cmp_len;
+
+
+    if (len_max < 1) {                                          /* If cmp len = 0,        rtn 0       (see Note #3d1A). */
+        return (0);
+    }
+
+    if (p1_str == (const CPU_CHAR *)0) {
+        if (p2_str == (const CPU_CHAR *)0) {
+            return (0);                                         /* If BOTH str ptrs NULL, rtn 0       (see Note #3a1A). */
+        }
+        cmp_val = (CPU_INT16S)((CPU_INT16S)0 - (CPU_INT16S)(*p2_str));
+        return (cmp_val);                                       /* If p1_str NULL, rtn neg p2_str val (see Note #3a1B1).*/
+    }
+    if (p2_str == (const CPU_CHAR *)0) {
+        cmp_val = (CPU_INT16S)(*p1_str);
+        return (cmp_val);                                       /* If p2_str NULL, rtn pos p1_str val (see Note #3a1B2).*/
+    }
+
+
+    p1_str_cmp      = p1_str;
+    p2_str_cmp      = p2_str;
+    p1_str_cmp_next = p1_str_cmp;
+    p2_str_cmp_next = p2_str_cmp;
+    p1_str_cmp_next++;
+    p2_str_cmp_next++;
+    cmp_len         = 0u;
+
+    while ((*p1_str_cmp      == *p2_str_cmp)            &&      /* Cmp strs until non-matching chars (see Note #3c) ... */
+           (*p1_str_cmp      != (      CPU_CHAR  )'\0') &&      /* ... or NULL chars                 (see Note #3b) ... */
+           ( p1_str_cmp_next != (const CPU_CHAR *)  0 ) &&      /* ... or NULL ptr(s) found          (see Note #3a2).   */
+           ( p2_str_cmp_next != (const CPU_CHAR *)  0 ) &&
+           ( cmp_len         <  (      CPU_SIZE_T)len_max)) {   /* ... or max nbr chars cmp'd        (see Note #3d2).   */
+        p1_str_cmp++;
+        p2_str_cmp++;
+        p1_str_cmp_next++;
+        p2_str_cmp_next++;
+        cmp_len++;
+    }
+
+
+    if (cmp_len == len_max) {                                   /* If strs     identical for max len nbr of chars, ...  */
+        return (0);                                             /* ... rtn 0                 (see Note #3d2A).          */
+    }
+
+    if (*p1_str_cmp != *p2_str_cmp) {                           /* If strs NOT identical, ...                           */
+                                                                /* ... calc & rtn char diff  (see Note #3c1).           */
+         cmp_val = (CPU_INT16S)((CPU_INT16S)(*p1_str_cmp) - (CPU_INT16S)(*p2_str_cmp));
+
+    } else if (*p1_str_cmp  == (CPU_CHAR)'\0') {                /* If NULL char(s) found, ...                           */
+         cmp_val = (CPU_INT16S)0;                               /* ... strs identical; rtn 0 (see Note #3b).            */
+
+    } else {
+        if (p1_str_cmp_next == (const CPU_CHAR *)0) {
+            if (p2_str_cmp_next == (const CPU_CHAR *)0) {       /* If BOTH next str ptrs NULL, ...                      */
+                cmp_val = (CPU_INT16S)0;                        /* ... rtn 0                       (see Note #3a2A).    */
+            } else {                                            /* If p1_str_cmp_next NULL, ...                         */
+                                                                /* ... rtn neg p2_str_cmp_next val (see Note #3a2B1).   */
+                cmp_val = (CPU_INT16S)((CPU_INT16S)0 - (CPU_INT16S)(*p2_str_cmp_next));
+            }
+        } else {                                                /* If p2_str_cmp_next NULL, ...                         */
+            cmp_val = (CPU_INT16S)(*p1_str_cmp_next);           /* ... rtn pos p1_str_cmp_next val (see Note #3a2B2).   */
+        }
+    }
+
+
+    return (cmp_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Str_CmpIgnoreCase()
+*
+* Description : Determine if two strings are identical, ignoring case.
+*
+* Argument(s) : p1_str      Pointer to first  string (see Note #1).
+*
+*               p2_str      Pointer to second string (see Note #1).
+*
+* Return(s)   : 0,              if strings are identical             (see Notes #3a1A, #3a2A, & #3b).
+*
+*               Negative value, if 'p1_str' is less    than 'p2_str' (see Notes #3a1B1, #3a2B1, & #3c).
+*
+*               Positive value, if 'p1_str' is greater than 'p2_str' (see Notes #3a1B2, #3a2B2, & #3c).
+*
+*               See also Note #2b.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffers NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strcasecmp() : DESCRIPTION' states that :
+*
+*                       (1) (A) "The strcasecmp() function shall compare ... the string pointed to by 's1'
+*                                ('p1_str') to the string pointed to by 's2' ('p2_str')" ...
+*                           (B) "ignoring differences in case".
+*
+*                       (2) "strcasecmp() ... shall behave as if the strings had been converted to lowercase
+*                            and then a byte comparison performed."
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'strcasecmp() : RETURN VALUE' states that
+*                          "upon successful completion, strcasecmp() shall return an integer greater than,
+*                           equal to, or less than 0".
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'strcmp() : DESCRIPTION' adds that "the
+*                           sign of a non-zero return value shall be determined by the sign of the difference
+*                           between the values of the first pair of bytes ... that differ in the strings
+*                           being compared".
+*
+*               (3) String comparison terminates when :
+*
+*                   (a) (1) (A) BOTH string pointer(s) are passed NULL pointers.
+*                               (1) NULL strings identical; 0 returned.
+*
+*                           (B) (1) 'p1_str' passed a NULL pointer.
+*                                   (a) Return negative value of character pointed to by 'p2_str', converted
+*                                       to lower case (see Note #2a2).
+*
+*                               (2) 'p2_str' passed a NULL pointer.
+*                                   (a) Return positive value of character pointed to by 'p1_str', converted
+*                                       to lower case (see Note #2a2).
+*
+*                       (2) (A) BOTH strings point to NULL.
+*                               (1) Strings overlap with NULL address.
+*                               (2) Strings identical up to but NOT beyond or including the NULL address;
+*                                   0 returned.
+*
+*                           (B) (1) 'p1_str_cmp_next' points to NULL.
+*                                   (a) 'p1_str' overlaps with NULL address.
+*                                   (b) Strings compared up to but NOT beyond or including the NULL address.
+*                                   (c) Return negative value of character pointed to by 'p2_str_cmp_next',
+*                                       converted to lower case (see Note #2a2).
+*
+*                               (2) 'p2_str_cmp_next' points to NULL.
+*                                   (a) 'p2_str' overlaps with NULL address.
+*                                   (b) Strings compared up to but NOT beyond or including the NULL address.
+*                                   (c) Return positive value of character pointed to by 'p1_str_cmp_next',
+*                                       converted to lower case (see Note #2a2).
+*
+*                   (b) Terminating NULL character found in both strings.
+*                       (1) Strings identical; 0 returned.
+*                       (2) Only one NULL character test required in conditional since previous condition
+*                           tested character equality.
+*
+*                   (c) Non-matching characters found.
+*                       (1) Return signed-integer difference of the character pointed to by 'p2_str',
+*                           converted to lower case, from the character pointed to by 'p1_str', converted
+*                           to lower case.
+*
+*               (4) Since 16-bit signed arithmetic is performed to calculate a non-identical comparison
+*                   return value, 'CPU_CHAR' native data type size MUST be 8-bit.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  Str_CmpIgnoreCase (const  CPU_CHAR  *p1_str,
+                               const  CPU_CHAR  *p2_str)
+{
+    CPU_INT16S  cmp_val;
+
+
+    cmp_val = Str_CmpIgnoreCase_N(p1_str,
+                                  p2_str,
+                                  DEF_INT_CPU_U_MAX_VAL);
+
+    return (cmp_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Str_CmpIgnoreCase_N()
+*
+* Description : Determine if two strings are identical for up to a maximum number of characters,
+*                   ignoring case.
+*
+* Argument(s) : p1_str      Pointer to first  string (see Note #1).
+*
+*               p2_str      Pointer to second string (see Note #1).
+*
+*               len_max     Maximum number of characters to compare  (see Note  #3d).
+*
+* Return(s)   : 0,              if strings are identical             (see Notes #3a1A, #3a2A, #3b, & #3d).
+*
+*               Negative value, if 'p1_str' is less    than 'p2_str' (see Notes #3a1B1, #3a2B1, & #3c).
+*
+*               Positive value, if 'p1_str' is greater than 'p2_str' (see Notes #3a1B2, #3a2B2, & #3c).
+*
+*               See also Note #2b.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffers NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strncasecmp() : DESCRIPTION' states that :
+*
+*                       (1) (A) "The strncasecmp() function shall compare ... the string pointed to by 's1'
+*                                ('p1_str') to the string pointed to by 's2' ('p2_str')" ...
+*                           (B) "ignoring differences in case"                           ...
+*                           (C)  but "not more than 'n' ('len_max') bytes" of either string.
+*
+*                       (2) "strncasecmp() shall behave as if the strings had been converted to lowercase
+*                            and then a byte comparison performed."
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'strncasecmp() : RETURN VALUE' states that
+*                          "upon successful completion, strncasecmp() shall return an integer greater than,
+*                           equal to, or less than 0".
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'strcmp() : DESCRIPTION' adds that "the
+*                           sign of a non-zero return value shall be determined by the sign of the difference
+*                           between the values of the first pair of bytes ... that differ in the strings
+*                           being compared".
+*
+*               (3) String comparison terminates when :
+*
+*                   (a) (1) (A) BOTH string pointer(s) are passed NULL pointers.
+*                               (1) NULL strings identical; 0 returned.
+*
+*                           (B) (1) 'p1_str' passed a NULL pointer.
+*                                   (a) Return negative value of character pointed to by 'p2_str', converted
+*                                       to lower case (see Note #2a2).
+*
+*                               (2) 'p2_str' passed a NULL pointer.
+*                                   (a) Return positive value of character pointed to by 'p1_str', converted
+*                                       to lower case (see Note #2a2).
+*
+*                       (2) (A) BOTH strings point to NULL.
+*                               (1) Strings overlap with NULL address.
+*                               (2) Strings identical up to but NOT beyond or including the NULL address;
+*                                   0 returned.
+*
+*                           (B) (1) 'p1_str_cmp_next' points to NULL.
+*                                   (a) 'p1_str' overlaps with NULL address.
+*                                   (b) Strings compared up to but NOT beyond or including the NULL address.
+*                                   (c) Return negative value of character pointed to by 'p2_str_cmp_next',
+*                                       converted to lower case (see Note #2a2).
+*
+*                               (2) 'p2_str_cmp_next' points to NULL.
+*                                   (a) 'p2_str' overlaps with NULL address.
+*                                   (b) Strings compared up to but NOT beyond or including the NULL address.
+*                                   (c) Return positive value of character pointed to by 'p1_str_cmp_next',
+*                                       converted to lower case (see Note #2a2).
+*
+*                   (b) Terminating NULL character found in both strings.
+*                       (1) Strings identical; 0 returned.
+*                       (2) Only one NULL character test required in conditional since previous condition
+*                           tested character equality.
+*
+*                   (c) Non-matching characters found.
+*                       (1) Return signed-integer difference of the character pointed to by 'p2_str',
+*                           converted to lower case, from the character pointed to by 'p1_str', converted
+*                           to lower case.
+*
+*                   (d) (1) 'len_max' passed a zero length.
+*                           (A) Zero-length strings identical; 0 returned.
+*
+*                       (2) First 'len_max' number of characters identical.
+*                           (A) Strings identical; 0 returned.
+*
+*                       See also Note #2a1C.
+*
+*               (4) Since 16-bit signed arithmetic is performed to calculate a non-identical comparison
+*                   return value, 'CPU_CHAR' native data type size MUST be 8-bit.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  Str_CmpIgnoreCase_N (const  CPU_CHAR    *p1_str,
+                                 const  CPU_CHAR    *p2_str,
+                                        CPU_SIZE_T   len_max)
+{
+    const  CPU_CHAR    *p1_str_cmp;
+    const  CPU_CHAR    *p2_str_cmp;
+    const  CPU_CHAR    *p1_str_cmp_next;
+    const  CPU_CHAR    *p2_str_cmp_next;
+           CPU_CHAR     char_1;
+           CPU_CHAR     char_2;
+           CPU_INT16S   cmp_val;
+           CPU_SIZE_T   cmp_len;
+
+
+    if (len_max < 1) {                                          /* If cmp len = 0,        rtn 0       (see Note #3d1A). */
+        return (0);
+    }
+
+    if (p1_str == (const CPU_CHAR *)0) {
+        if (p2_str == (const CPU_CHAR *)0) {
+            return (0);                                         /* If BOTH str ptrs NULL, rtn 0       (see Note #3a1A). */
+        }
+        char_2  =  ASCII_ToLower(*p2_str);
+        cmp_val = (CPU_INT16S)((CPU_INT16S)0 - (CPU_INT16S)char_2);
+        return (cmp_val);                                       /* If p1_str NULL, rtn neg p2_str val (see Note #3a1B1).*/
+    }
+    if (p2_str == (const CPU_CHAR *)0) {
+        char_1  =  ASCII_ToLower(*p1_str);
+        cmp_val = (CPU_INT16S)char_1;
+        return (cmp_val);                                       /* If p2_str NULL, rtn pos p1_str val (see Note #3a1B2).*/
+    }
+
+
+    p1_str_cmp      = p1_str;
+    p2_str_cmp      = p2_str;
+    p1_str_cmp_next = p1_str_cmp;
+    p2_str_cmp_next = p2_str_cmp;
+    p1_str_cmp_next++;
+    p2_str_cmp_next++;
+    char_1          = ASCII_ToLower(*p1_str_cmp);
+    char_2          = ASCII_ToLower(*p2_str_cmp);
+    cmp_len         = 0u;
+
+    while (( char_1          ==  char_2)                &&      /* Cmp strs until non-matching chars (see Note #3c) ... */
+           (*p1_str_cmp      != (      CPU_CHAR  )'\0') &&      /* ... or NULL chars                 (see Note #3b) ... */
+           ( p1_str_cmp_next != (const CPU_CHAR *)  0 ) &&      /* ... or NULL ptr(s) found          (see Note #3a2).   */
+           ( p2_str_cmp_next != (const CPU_CHAR *)  0 ) &&
+           ( cmp_len         <  (      CPU_SIZE_T)len_max)) {   /* ... or max nbr chars cmp'd        (see Note #3d2).   */
+        p1_str_cmp++;
+        p2_str_cmp++;
+        p1_str_cmp_next++;
+        p2_str_cmp_next++;
+        cmp_len++;
+        char_1 = ASCII_ToLower(*p1_str_cmp);
+        char_2 = ASCII_ToLower(*p2_str_cmp);
+    }
+
+
+    if (cmp_len == len_max) {                                   /* If strs     identical for max len nbr of chars, ...  */
+        return (0);                                             /* ... rtn 0                 (see Note #3d2A).          */
+    }
+
+    if (char_1 != char_2) {                                     /* If strs NOT identical, ...                           */
+                                                                /* ... calc & rtn char diff  (see Note #3c1).           */
+         cmp_val = (CPU_INT16S)((CPU_INT16S)char_1 - (CPU_INT16S)char_2);
+
+    } else if (char_1 == (CPU_CHAR)'\0') {                      /* If NULL char(s) found, ...                           */
+         cmp_val = (CPU_INT16S)0;                               /* ... strs identical; rtn 0 (see Note #3b).            */
+
+    } else {
+        if (p1_str_cmp_next == (const CPU_CHAR *)0) {
+            if (p2_str_cmp_next == (const CPU_CHAR *)0) {       /* If BOTH next str ptrs NULL, ...                      */
+                cmp_val = (CPU_INT16S)0;                        /* ... rtn 0                       (see Note #3a2A).    */
+            } else {                                            /* If p1_str_cmp_next NULL, ...                         */
+                char_2  =  ASCII_ToLower(*p2_str_cmp_next);
+                                                                /* ... rtn neg p2_str_cmp_next val (see Note #3a2B1).   */
+                cmp_val = (CPU_INT16S)((CPU_INT16S)0 - (CPU_INT16S)char_2);
+            }
+        } else {                                                /* If p2_str_cmp_next NULL, ...                         */
+            char_1  =  ASCII_ToLower(*p1_str_cmp_next);
+            cmp_val = (CPU_INT16S)char_1;                       /* ... rtn pos p1_str_cmp_next val (see Note #3a2B2).   */
+        }
+    }
+
+
+    return (cmp_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Str_Char()
+*
+* Description : Search string for first occurrence of specific character.
+*
+* Argument(s) : pstr            Pointer to string (see Note #1).
+*
+*               srch_char       Search character.
+*
+* Return(s)   : Pointer to first occurrence of search character in string, if any    (see Note #2b1).
+*
+*               Pointer to NULL,                                           otherwise (see Note #2b2).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strchr() : DESCRIPTION' states that :
+*
+*                       (1) "The strchr() function shall locate the first occurrence of 'c' ('srch_char')
+*                            ... in the string pointed to by 's' ('pstr')."
+*                       (2) "The terminating null byte is considered to be part of the string."
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strchr() : RETURN VALUE' states that
+*                       "upon completion, strchr() shall return" :
+*
+*                       (1) "a pointer to the byte," ...
+*                       (2) "or a null pointer if the byte was not found."
+*                           (A) #### Although NO strchr() specification states to return NULL for
+*                               any other reason(s), NULL is also returned for any error(s).
+*
+*               (3) String search terminates when :
+*
+*                   (a) String pointer passed a NULL pointer.
+*                       (1) No string search performed; NULL pointer returned.
+*
+*                   (b) String pointer points to NULL.
+*                       (1) String overlaps with NULL address; NULL pointer returned.
+*
+*                   (c) String's terminating NULL character found.
+*                       (1) Search character NOT found in search string; NULL pointer returned
+*                           (see Note #2b2).
+*                       (2) Applicable even if search character is the terminating NULL character
+*                           (see Note #2a2).
+*
+*                   (d) Search character found.
+*                       (1) Return pointer to first occurrence of search character in search string
+*                           (see Note #2a1).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Char (const  CPU_CHAR  *pstr,
+                            CPU_CHAR   srch_char)
+{
+    CPU_CHAR  *pstr_rtn;
+
+
+    pstr_rtn = Str_Char_N(pstr,
+                          DEF_INT_CPU_U_MAX_VAL,
+                          srch_char);
+
+    return (pstr_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            Str_Char_N()
+*
+* Description : Search string for first occurrence of specific character, up to a maximum number
+*                   of characters.
+*
+* Argument(s) : pstr            Pointer to string (see Note #1).
+*
+*               len_max         Maximum number of characters to search (see Notes #2c & #3e).
+*
+*               srch_char       Search character.
+*
+* Return(s)   : Pointer to first occurrence of search character in string, if any    (see Note #2b1).
+*
+*               Pointer to NULL,                                           otherwise (see Note #2b2).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strchr() : DESCRIPTION' states that :
+*
+*                       (1) "The strchr() function shall locate the first occurrence of 'c' ('srch_char')
+*                            ... in the string pointed to by 's' ('pstr')."
+*                       (2) "The terminating null byte is considered to be part of the string."
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strchr() : RETURN VALUE' states that
+*                       "upon completion, strchr() shall return" :
+*
+*                       (1) "a pointer to the byte," ...
+*                       (2) "or a null pointer if the byte was not found."
+*                           (A) #### Although NO strchr() specification states to return NULL for
+*                               any other reason(s), NULL is also returned for any error(s).
+*
+*                   (c) Ideally, the 'len_max' argument would be the last argument in this function's
+*                       argument list for consistency with all other custom string library functions.
+*                       However, the 'len_max' argument is sequentially ordered as the second argument
+*                       to comply with most standard library's strnchr() argument list.
+*
+*               (3) String search terminates when :
+*
+*                   (a) String pointer passed a NULL pointer.
+*                       (1) No string search performed; NULL pointer returned.
+*
+*                   (b) String pointer points to NULL.
+*                       (1) String overlaps with NULL address; NULL pointer returned.
+*
+*                   (c) String's terminating NULL character found.
+*                       (1) Search character NOT found in search string; NULL pointer returned
+*                           (see Note #2b2).
+*                       (2) Applicable even if search character is the terminating NULL character
+*                           (see Note #2a2).
+*
+*                   (d) Search character found.
+*                       (1) Return pointer to first occurrence of search character in search string
+*                           (see Note #2a1).
+*
+*                   (e) 'len_max' number of characters searched.
+*                       (1) Search character NOT found in search string within first 'len_max' number
+*                           of characters; NULL pointer returned.
+*                       (2) 'len_max' number of characters MAY include terminating NULL character
+*                           (see Note #2a2).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Char_N (const  CPU_CHAR    *pstr,
+                              CPU_SIZE_T   len_max,
+                              CPU_CHAR     srch_char)
+{
+    const  CPU_CHAR    *pstr_char;
+           CPU_SIZE_T   len_srch;
+
+
+    if (pstr == (const CPU_CHAR *)0) {                          /* Rtn NULL if srch str ptr NULL (see Note #3a1).       */
+        return ((CPU_CHAR *)0);
+    }
+
+    if (len_max < 1) {                                          /* Rtn NULL if srch len = 0      (see Note #3e1).       */
+        return ((CPU_CHAR *)0);
+    }
+
+
+    pstr_char = pstr;
+    len_srch  = 0u;
+
+    while (( pstr_char != (const CPU_CHAR *)  0 )      &&       /* Srch str until NULL ptr     [see Note #3b]  ...      */
+           (*pstr_char != (      CPU_CHAR  )'\0')      &&       /* ... or NULL char            (see Note #3c)  ...      */
+           (*pstr_char != (      CPU_CHAR  )srch_char) &&       /* ... or srch char found      (see Note #3d); ...      */
+           ( len_srch  <  (      CPU_SIZE_T)len_max)) {         /* ... or max nbr chars srch'd (see Note #3e).          */
+        pstr_char++;
+        len_srch++;
+    }
+
+    if (pstr_char == (const CPU_CHAR *)0) {                     /* Rtn NULL if NULL ptr found      (see Note #3b1).     */
+        return ((CPU_CHAR *)0);
+    }
+
+    if (len_srch >= len_max) {                                  /* Rtn NULL if srch char NOT found ...                  */
+        return ((CPU_CHAR *)0);                                 /* ... within max nbr of chars     (see Note #3e1).     */
+    }
+
+    if (*pstr_char != srch_char) {                              /* Rtn NULL if srch char NOT found (see Note #3c1).     */
+         return ((CPU_CHAR *)0);
+    }
+
+
+    return ((CPU_CHAR *)pstr_char);                             /* Else rtn ptr to found srch char (see Note #3d1).     */
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Str_Char_Last()
+*
+* Description : Search string for last occurrence of specific character.
+*
+* Argument(s) : pstr            Pointer to string (see Note #1).
+*
+*               srch_char       Search character.
+*
+* Return(s)   : Pointer to last occurrence of search character in string, if any    (see Note #2b1).
+*
+*               Pointer to NULL,                                          otherwise (see Note #2b2).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strrchr() : DESCRIPTION' states that :
+*
+*                       (1) "The strrchr() function shall locate the last occurrence of 'c' ('srch_char')
+*                            ... in the string pointed to by 's' ('pstr')."
+*                       (2) "The terminating null byte is considered to be part of the string."
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strrchr() : RETURN VALUE' states that
+*                       "upon successful completion, strrchr() shall return" :
+*
+*                       (1) "a pointer to the byte" ...
+*                       (2) "or a null pointer if 'c' ('srch_char') does not occur in the string."
+*                           (A) #### Although NO strrchr() specification states to return NULL for
+*                               any other reason(s), NULL is also returned for any error(s).
+*
+*               (3) String search terminates when :
+*
+*                   (a) String pointer passed a NULL pointer.
+*                       (1) No string search performed; NULL pointer returned.
+*
+*                   (b) String pointer points to NULL.
+*                       (1) String overlaps with NULL address; NULL pointer returned.
+*
+*                   (c) String searched from end to beginning.
+*                       (1) Search character NOT found in search string; NULL pointer returned.
+*                       (2) Applicable even if search character is the terminating NULL character
+*                           (see Note #2a2).
+*
+*                   (d) Search character found.
+*                       (1) Return pointer to last occurrence of search character in search string
+*                           (see Note #2a1).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Char_Last (const  CPU_CHAR  *pstr,
+                                 CPU_CHAR   srch_char)
+{
+    CPU_CHAR  *pstr_rtn;
+
+
+    pstr_rtn = Str_Char_Last_N(pstr,
+                               DEF_INT_CPU_U_MAX_VAL,
+                               srch_char);
+
+    return (pstr_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Str_Char_Last_N()
+*
+* Description : Search string for last occurrence of specific character, up to a maximum number
+*                   of characters.
+*
+* Argument(s) : pstr            Pointer to string (see Note #1).
+*
+*               len_max         Maximum number of characters to search (see Notes #2c & #3e).
+*
+*               srch_char       Search character.
+*
+* Return(s)   : Pointer to last occurrence of search character in string, if any    (see Note #2b1).
+*
+*               Pointer to NULL,                                          otherwise (see Note #2b2).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strrchr() : DESCRIPTION' states that :
+*
+*                       (1) "The strrchr() function shall locate the last occurrence of 'c' ('srch_char')
+*                            ... in the string pointed to by 's' ('pstr')."
+*                       (2) "The terminating null byte is considered to be part of the string."
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strrchr() : RETURN VALUE' states that
+*                       "upon successful completion, strrchr() shall return" :
+*
+*                       (1) "a pointer to the byte" ...
+*                       (2) "or a null pointer if 'c' ('srch_char') does not occur in the string."
+*                           (A) #### Although NO strrchr() specification states to return NULL for
+*                               any other reason(s), NULL is also returned for any error(s).
+*
+*                   (c) Ideally, the 'len_max' argument would be the last argument in this function's
+*                       argument list for consistency with all other custom string library functions.
+*                       However, the 'len_max' argument is sequentially ordered as the second argument
+*                       to comply with most standard library's strnrchr() argument list.
+*
+*                       See also 'Str_Char_N()  Note #2c'.
+*
+*               (3) String search terminates when :
+*
+*                   (a) String pointer passed a NULL pointer.
+*                       (1) No string search performed; NULL pointer returned.
+*
+*                   (b) String pointer points to NULL.
+*                       (1) String overlaps with NULL address; NULL pointer returned.
+*
+*                   (c) String searched from end to beginning.
+*                       (1) Search character NOT found in search string; NULL pointer returned
+*                           (see Note #2b2).
+*                       (2) Applicable even if search character is the terminating NULL character
+*                           (see Note #2a2).
+*
+*                   (d) Search character found.
+*                       (1) Return pointer to last occurrence of search character in search string
+*                           (see Note #2a1).
+*
+*                   (e) 'len_max' number of characters searched.
+*                       (1) Search character NOT found in search string within last 'len_max' number
+*                           of characters; NULL pointer returned.
+*                       (2) 'len_max' number of characters MAY include terminating NULL character
+*                           (see Note #2a2).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Char_Last_N (const  CPU_CHAR    *pstr,
+                                   CPU_SIZE_T   len_max,
+                                   CPU_CHAR     srch_char)
+{
+    const  CPU_CHAR    *pstr_char;
+           CPU_SIZE_T   str_len_max;
+           CPU_SIZE_T   str_len;
+
+
+    if (pstr == (const CPU_CHAR *)0) {                          /* Rtn NULL if srch str ptr NULL (see Note #3a1).       */
+        return ((CPU_CHAR *)0);
+    }
+
+    if (len_max < 1) {                                          /* Rtn NULL if srch len = 0      (see Note #3e1).       */
+        return ((CPU_CHAR *)0);
+    }
+
+
+    pstr_char    = pstr;
+     str_len_max = len_max - sizeof("");                        /* Str len adj'd for NULL char len.                     */
+     str_len     = Str_Len_N(pstr_char, str_len_max);
+    pstr_char   += str_len;
+
+    if (pstr_char == (const CPU_CHAR *)0) {                     /* Rtn NULL if NULL ptr found        (see Note #3b1).   */
+        return ((CPU_CHAR *)0);
+    }
+
+    while (( pstr_char != pstr) &&                              /* Srch str from end until beginning (see Note #3c) ... */
+           (*pstr_char != srch_char)) {                         /* ... until srch char found         (see Note #3d).    */
+        pstr_char--;
+    }
+
+
+    if (*pstr_char != srch_char) {                              /* Rtn NULL if srch char NOT found   (see Note #3c1).   */
+         return ((CPU_CHAR *)0);
+    }
+
+
+    return ((CPU_CHAR *)pstr_char);                             /* Else rtn ptr to found srch char   (see Note #3d1).   */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Str_Char_Replace()
+*
+* Description : Search string for specific character and replace it by another specific character.
+*
+* Argument(s) : pstr            Pointer to string (see Note #1).
+*
+*               char_srch       Search character.
+*
+*               char_replace    Replace character.
+*
+* Return(s)   : Pointer to string, if NO error(s).
+*
+*               Pointer to NULL,   otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffer modified.
+*
+*               (2) String search terminates when :
+*
+*                   (a) String pointer passed a NULL pointer.
+*                       (1) No string search performed; NULL pointer returned.
+*
+*                   (b) String pointer points to NULL.
+*                       (1) String overlaps with NULL address; NULL pointer returned.
+*
+*                   (c) String's terminating NULL character found.
+*                       (1) Search character NOT found in search string; NULL pointer returned
+*                       (2) Applicable even if search character is the terminating NULL character
+*
+*                   (d) Search character found.
+*                       (1) Replace character found by the specified character.
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Char_Replace (CPU_CHAR  *pstr,
+                             CPU_CHAR   char_srch,
+                             CPU_CHAR   char_replace)
+{
+    CPU_CHAR  *pstr_rtn;
+
+
+    pstr_rtn = Str_Char_Replace_N(pstr,
+                                  char_srch,
+                                  char_replace,
+                                  DEF_INT_CPU_U_MAX_VAL);
+
+    return (pstr_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Str_Char_Replace_N()
+*
+* Description : Search string for specific character and replace it by another specific character, up to
+*               a maximum number of characters.
+*
+* Argument(s) : pstr            Pointer to string (see Note #1).
+*
+*               char_srch       Search character.
+*
+*               char_replace    Replace character.
+*
+*               len_max         Maximum number of characters to search (see Notes #2c & #3e).
+*
+* Return(s)   : Pointer to string, if NO error(s).
+*
+*               Pointer to NULL,   otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffer modified.
+*
+*               (2) String search terminates when :
+*
+*                   (a) String pointer passed a NULL pointer.
+*                       (1) No string search performed; NULL pointer returned.
+*
+*                   (b) String pointer points to NULL.
+*                       (1) String overlaps with NULL address; NULL pointer returned.
+*
+*                   (c) String's terminating NULL character found.
+*                       (1) Search character NOT found in search string; NULL pointer returned
+*                       (2) Applicable even if search character is the terminating NULL character
+*
+*                   (d) Search character found.
+*                       (1) Replace character found by the specified character.
+*
+*                   (e) 'len_max' number of characters searched.
+*                       (1) Search character NOT found in search string within first 'len_max' number
+*                           of characters; NULL pointer returned.
+*                       (2) 'len_max' number of characters MAY include terminating NULL character
+*                           (see Note #2a2).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Char_Replace_N (CPU_CHAR    *pstr,
+                               CPU_CHAR     char_srch,
+                               CPU_CHAR     char_replace,
+                               CPU_SIZE_T   len_max)
+{
+    CPU_CHAR    *pstr_char;
+    CPU_SIZE_T   len;
+
+
+    if (pstr == (const CPU_CHAR *)0) {                          /* Rtn NULL if srch str ptr NULL (see Note #2a1).       */
+        return ((CPU_CHAR *)0);
+    }
+
+    if (len_max < 1) {                                          /* Rtn NULL if srch len = 0      (see Note #2e1).       */
+        return ((CPU_CHAR *)0);
+    }
+
+    pstr_char = pstr;
+    len       = len_max;
+
+    while (( pstr_char != (const CPU_CHAR *)0) &&               /* Srch str until NULL ptr     [see Note #2b]  ...      */
+           (*pstr_char !=  ASCII_CHAR_NULL   ) &&               /* ... or NULL char            (see Note #2c)  ...      */
+           ( len        >                   0)) {               /* ... or max nbr chars srch'd (see Note #2e).          */
+
+        if (*pstr_char == char_srch) {
+            *pstr_char  = char_replace;                         /* Replace char if srch char is found.                  */
+        }
+
+        pstr_char++;
+        len--;
+    }
+
+    return (pstr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              Str_Str()
+*
+* Description : Search string for first occurence of a specific search string.
+*
+* Argument(s) : pstr            Pointer to        string (see Note #1).
+*
+*               pstr_srch       Pointer to search string (see Note #1).
+*
+* Return(s)   : Pointer to first occurrence of search string in string, if any                (see Note #2b1A).
+*
+*               Pointer to string,                                      if NULL search string (see Note #2b2).
+*
+*               Pointer to NULL,                                        otherwise             (see Note #2b1B).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffers NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strstr() : DESCRIPTION' states that :
+*
+*                       (1) "The strstr() function shall locate the first occurrence  in the string
+*                            pointed to by 's1' ('pstr') of the sequence of bytes ... in the string
+*                            pointed to by 's2' ('pstr_srch')" ...
+*                       (2) "(excluding the terminating null byte)."
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strstr() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, strstr() shall return" :
+*                           (A) "a pointer to the located string" ...
+*                           (B) "or a null pointer if the string is not found."
+*                               (1) #### Although NO strstr() specification states to return NULL for
+*                                   any other reason(s), NULL is also returned for any error(s).
+*
+*                       (2) "If 's2' ('pstr_srch') points to a string with zero length, the function
+*                            shall return 's1' ('pstr')."
+*
+*               (3) String search terminates when :
+*
+*                   (a) String pointer(s) are passed NULL pointers.
+*                       (1) No string search performed; NULL pointer returned.
+*
+*                   (b) String pointer(s) point to NULL.
+*                       (1) String buffer(s) overlap with NULL address; NULL pointer returned.
+*
+*                   (c) Search string length equal to zero.
+*                       (1) No string search performed; string pointer returned (see Note #2b2).
+*
+*                   (d) Search string length greater than string length.
+*                       (1) No string search performed; NULL   pointer returned (see Note #2b1B).
+*
+*                   (e) Entire string has been searched.
+*                       (1) Search string not found; NULL pointer returned (see Note #2b1B).
+*
+*                   (f) Search string found.
+*                       (1) Return pointer to first occurrence of search string in string (see Note #2b1A).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Str (const  CPU_CHAR  *pstr,
+                    const  CPU_CHAR  *pstr_srch)
+{
+    CPU_CHAR  *pstr_rtn;
+
+
+    pstr_rtn = Str_Str_N(pstr,
+                         pstr_srch,
+                         DEF_INT_CPU_U_MAX_VAL);
+
+    return (pstr_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Str_Str_N()
+*
+* Description : Search string for first occurence of a specific search string, up to a maximum number
+*                   of characters.
+*
+* Argument(s) : pstr            Pointer to        string (see Note #1).
+*
+*               pstr_srch       Pointer to search string (see Note #1).
+*
+*               len_max         Maximum number of characters to search (see Note #3g).
+*
+* Return(s)   : Pointer to first occurrence of search string in string, if any                (see Note #2b1A).
+*
+*               Pointer to string,                                      if NULL search string (see Note #2b2).
+*
+*               Pointer to NULL,                                        otherwise             (see Note #2b1B).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffers NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strstr() : DESCRIPTION' states that :
+*
+*                       (1) "The strstr() function shall locate the first occurrence  in the string
+*                            pointed to by 's1' ('pstr') of the sequence of bytes ... in the string
+*                            pointed to by 's2' ('pstr_srch')" ...
+*                       (2) "(excluding the terminating null byte)."
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'strstr() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, strstr() shall return" :
+*                           (A) "a pointer to the located string" ...
+*                           (B) "or a null pointer if the string is not found."
+*                               (1) #### Although NO strstr() specification states to return NULL for
+*                                   any other reason(s), NULL is also returned for any error(s).
+*
+*                       (2) "If 's2' ('pstr_srch') points to a string with zero length, the function
+*                            shall return 's1' ('pstr')."
+*
+*               (3) String search terminates when :
+*
+*                   (a) String pointer(s) are passed NULL pointers.
+*                       (1) No string search performed; NULL pointer returned.
+*
+*                   (b) String pointer(s) point to NULL.
+*                       (1) String buffer(s) overlap with NULL address; NULL pointer returned.
+*
+*                   (c) Search string length equal to zero.
+*                       (1) No string search performed; string pointer returned (see Note #2b2).
+*
+*                   (d) Search string length greater than string length.
+*                       (1) No string search performed; NULL   pointer returned (see Note #2b1B).
+*
+*                   (e) Entire string has been searched.
+*                       (1) Search string not found; NULL pointer returned (see Note #2b1B).
+*                       (2) Maximum size of the search is defined as the subtraction of the
+*                           search string length from the string length.
+*
+*                   (f) Search string found.
+*                       (1) Return pointer to first occurrence of search string in string (see Note #2b1A).
+*                       (2) Search string found via Str_Cmp_N().
+*
+*                   (g) 'len_max' number of characters searched.
+*                       (1) 'len_max' number of characters does NOT include terminating NULL character
+*                           (see Note #2a2).
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_Str_N (const  CPU_CHAR    *pstr,
+                      const  CPU_CHAR    *pstr_srch,
+                             CPU_SIZE_T   len_max)
+{
+           CPU_SIZE_T    str_len;
+           CPU_SIZE_T    str_len_srch;
+           CPU_SIZE_T    len_max_srch;
+           CPU_SIZE_T    srch_len;
+           CPU_SIZE_T    srch_ix;
+           CPU_BOOLEAN   srch_done;
+           CPU_INT16S    srch_cmp;
+    const  CPU_CHAR     *pstr_str;
+    const  CPU_CHAR     *pstr_srch_ix;
+
+                                                                /* Rtn NULL if str ptr(s) NULL (see Note #3a).          */
+    if (pstr == (const CPU_CHAR *)0) {
+        return ((CPU_CHAR *)0);
+    }
+    if (pstr_srch == (const CPU_CHAR *)0) {
+        return ((CPU_CHAR *)0);
+    }
+
+    if (len_max < 1) {                                          /* Rtn NULL if srch len = 0    (see Note #3g).          */
+        return ((CPU_CHAR *)0);
+    }
+
+                                                                /* Lim max srch str len (to chk > str len).             */
+    len_max_srch = (len_max <       DEF_INT_CPU_U_MAX_VAL)
+                 ? (len_max + 1u) : DEF_INT_CPU_U_MAX_VAL;
+
+    str_len      = Str_Len_N(pstr,      len_max);
+    str_len_srch = Str_Len_N(pstr_srch, len_max_srch);
+    if (str_len_srch < 1) {                                     /* Rtn ptr to str if srch str len = 0 (see Note #2b2).  */
+        return ((CPU_CHAR *)pstr);
+    }
+    if (str_len_srch > str_len) {                               /* Rtn NULL if srch str len > str len (see Note #3d).   */
+        return ((CPU_CHAR *)0);
+    }
+
+                                                                /* Rtn NULL if NULL ptr found         (see Note #3b1).  */
+    pstr_str = pstr      + str_len;
+    if (pstr_str == (const CPU_CHAR *)0) {
+        return ((CPU_CHAR *)0);
+    }
+    pstr_str = pstr_srch + str_len_srch;
+    if (pstr_str == (const CPU_CHAR *)0) {
+        return ((CPU_CHAR *)0);
+    }
+
+    srch_len  = str_len - str_len_srch;                         /* Calc srch len (see Note #3e2).                       */
+    srch_ix   = 0u;
+
+    do {
+        pstr_srch_ix = (const CPU_CHAR *)(pstr + srch_ix);
+        srch_cmp     =  Str_Cmp_N(pstr_srch_ix, pstr_srch, str_len_srch);
+        srch_done    = (srch_cmp == 0) ? DEF_YES : DEF_NO;
+        srch_ix++;
+    } while ((srch_done == DEF_NO) && (srch_ix <= srch_len));
+
+
+    if (srch_cmp != 0) {                                        /* Rtn NULL if srch str NOT found (see Note #3e2).      */
+        return ((CPU_CHAR *)0);
+    }
+
+    return ((CPU_CHAR *)pstr_srch_ix);                          /* Else rtn ptr to found srch str (see Note #3f1).      */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Str_FmtNbr_Int32U()
+*
+* Description : Format 32-bit unsigned integer into a multi-digit character string.
+*
+* Argument(s) : nbr             Number           to format.
+*
+*               nbr_dig         Number of digits to format (see Note #1).
+*
+*                               The following may be used to specify the number of digits to format :
+*
+*                                   DEF_INT_32U_NBR_DIG_MIN     Minimum number of 32-bit unsigned digits
+*                                   DEF_INT_32U_NBR_DIG_MAX     Maximum number of 32-bit unsigned digits
+*
+*               nbr_base        Base   of number to format (see Note #2).
+*
+*                               The following may be used to specify the number base :
+*
+*                                   DEF_NBR_BASE_BIN            Base  2
+*                                   DEF_NBR_BASE_OCT            Base  8
+*                                   DEF_NBR_BASE_DEC            Base 10
+*                                   DEF_NBR_BASE_HEX            Base 16
+*
+*               lead_char       Prepend leading character  (see Note #3) :
+*
+*                                   '\0'                    Do NOT prepend leading character to string.
+*                                     Printable character          Prepend leading character to string.
+*                                   Unprintable character   Format invalid string (see Note #6).
+*
+*               lower_case      Format alphabetic characters (if any) in lower case :
+*
+*                                   DEF_NO          Format alphabetic characters in upper case.
+*                                   DEF_YES         Format alphabetic characters in lower case.
+*
+*               nul             Append terminating NULL-character (see Note #4) :
+*
+*                                   DEF_NO          Do NOT append terminating NULL-character to string.
+*                                   DEF_YES                Append terminating NULL-character to string.
+*
+*               pstr            Pointer to character array to return formatted number string (see Note #5).
+*
+* Return(s)   : Pointer to formatted string, if NO error(s).
+*
+*               Pointer to NULL,             otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) If the number of digits to format ('nbr_dig') is zero; then NO formatting
+*                       is performed except possible NULL-termination of the string (see Note #4).
+*
+*                           Example :
+*
+*                               nbr      = 23456
+*                               nbr_dig  = 0
+*                               nbr_base = 10
+*
+*                               pstr     = ""                   See Note #6a
+*
+*                   (b) If the number of digits to format ('nbr_dig') is less than the number of
+*                       significant integer digits of the number to format ('nbr'); then an invalid
+*                       string is formatted instead of truncating any significant integer digits.
+*
+*                           Example :
+*
+*                               nbr      = 23456
+*                               nbr_dig  = 3
+*                               nbr_base = 10
+*
+*                               pstr     = "???"                See Note #6b
+*
+*               (2) The number's base MUST be between 2 & 36, inclusive.
+*
+*               (3) Leading character option prepends leading characters prior to the first non-zero digit.
+*
+*                   (a) (1) Leading character MUST be a printable ASCII character.
+*
+*                       (2) (A) Leading character MUST NOT be a number base digit, ...
+*                           (B) with the exception of '0'.
+*
+*                   (b) The number of leading characters is such that the total number of significant
+*                       integer digits plus the number of leading characters is equal to the requested
+*                       number of integer digits to format ('nbr_dig').
+*
+*                           Example :
+*
+*                               nbr       = 23456
+*                               nbr_dig   = 7
+*                               nbr_base  = 10
+*                               lead_char = ' '
+*
+*                               pstr      = "  23456"
+*
+*                   (c) (1) If the value of the number to format is     zero  ...
+*                       (2) ... & the number of digits to format is non-zero, ...
+*                       (3) ... but NO leading character available;           ...
+*                       (4) ... then one digit of '0' value is formatted.
+*
+*                           This is NOT a leading character; but a single integer digit of '0' value.
+*
+*               (4) (a) NULL-character terminate option DISABLED prevents overwriting previous character
+*                       array formatting.
+*
+*                   (b) WARNING: Unless 'pstr' character array is pre-/post-terminated, NULL-character
+*                       terminate option DISABLED will cause character string run-on.
+*
+*               (5) (a) Format buffer size NOT validated; buffer overruns MUST be prevented by caller.
+*
+*                   (b) To prevent character buffer overrun :
+*
+*                           Character array size MUST be  >=  ('nbr_dig'          +
+*                                                               1 'NUL' terminator)  characters
+*
+*               (6) For any unsuccessful string format or error(s), an invalid string of question marks
+*                   ('?') will be formatted, where the number of question marks is determined by the
+*                   number of digits to format ('nbr_dig') :
+*
+*                      Invalid string's     {  (a)   0 (NULL string)  ,  if 'nbr_dig' = 0
+*                          number of     =  {
+*                       question marks      {  (b)  'nbr_dig'         ,  if 'nbr_dig' > 0
+*
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_FmtNbr_Int32U (CPU_INT32U    nbr,
+                              CPU_INT08U    nbr_dig,
+                              CPU_INT08U    nbr_base,
+                              CPU_CHAR      lead_char,
+                              CPU_BOOLEAN   lower_case,
+                              CPU_BOOLEAN   nul,
+                              CPU_CHAR     *pstr)
+{
+    CPU_CHAR  *pstr_fmt;
+
+
+    pstr_fmt = Str_FmtNbr_Int32(nbr,                            /* Fmt unsigned int into str.                           */
+                                nbr_dig,
+                                nbr_base,
+                                DEF_NO,
+                                lead_char,
+                                lower_case,
+                                nul,
+                                pstr);
+
+    return (pstr_fmt);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Str_FmtNbr_Int32S()
+*
+* Description : Format 32-bit signed integer into a multi-digit character string.
+*
+* Argument(s) : nbr             Number           to format.
+*
+*               nbr_dig         Number of digits to format (see Note #1).
+*
+*                               The following may be used to specify the number of digits to format :
+*
+*                                   DEF_INT_32S_NBR_DIG_MIN + 1     Minimum number of 32-bit signed digits
+*                                   DEF_INT_32S_NBR_DIG_MAX + 1     Maximum number of 32-bit signed digits
+*                                                                   (plus 1 digit for possible negative sign)
+*
+*               nbr_base        Base   of number to format (see Note #2).
+*
+*                               The following may be used to specify the number base :
+*
+*                                   DEF_NBR_BASE_BIN            Base  2
+*                                   DEF_NBR_BASE_OCT            Base  8
+*                                   DEF_NBR_BASE_DEC            Base 10
+*                                   DEF_NBR_BASE_HEX            Base 16
+*
+*               lead_char       Prepend leading character  (see Note #3) :
+*
+*                                   '\0'                    Do NOT prepend leading character to string.
+*                                     Printable character          Prepend leading character to string.
+*                                   Unprintable character   Format invalid string (see Note #6).
+*
+*               lower_case      Format alphabetic characters (if any) in lower case :
+*
+*                                   DEF_NO          Format alphabetic characters in upper case.
+*                                   DEF_YES         Format alphabetic characters in lower case.
+*
+*               nul             Append terminating NULL-character (see Note #4) :
+*
+*                                   DEF_NO          Do NOT append terminating NULL-character to string.
+*                                   DEF_YES                Append terminating NULL-character to string.
+*
+*               pstr            Pointer to character array to return formatted number string (see Note #5).
+*
+* Return(s)   : Pointer to formatted string, if NO error(s).
+*
+*               Pointer to NULL,             otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) If the number of digits to format ('nbr_dig') is zero; then NO formatting
+*                       is performed except possible NULL-termination of the string (see Note #4).
+*
+*                           Example :
+*
+*                               nbr      = -23456
+*                               nbr_dig  =  0
+*                               nbr_base = 10
+*
+*                               pstr     = ""                   See Note #6a
+*
+*                   (b) If the number of digits to format ('nbr_dig') is less than the number of
+*                       significant integer digits of the number to format ('nbr'); then an invalid
+*                       string is formatted instead of truncating any significant integer digits.
+*
+*                           Example :
+*
+*                               nbr      = 23456
+*                               nbr_dig  = 3
+*                               nbr_base = 10
+*
+*                               pstr     = "???"                See Note #6b
+*
+*                   (c) If the number to format ('nbr') is negative but the number of digits to format
+*                       ('nbr_dig') is equal to the number of significant integer digits of the number
+*                       to format ('nbr'); then an invalid string is formatted instead of truncating
+*                       the negative sign.
+*
+*                           Example :
+*
+*                               nbr      = -23456
+*                               nbr_dig  =  5
+*                               nbr_base = 10
+*
+*                               pstr     = "?????"              See Note #6b
+*
+*               (2) The number's base MUST be between 2 & 36, inclusive.
+*
+*               (3) Leading character option prepends leading characters prior to the first non-zero digit.
+*
+*                   (a) (1) Leading character MUST be a printable ASCII character.
+*
+*                       (2) (A) Leading character MUST NOT be a number base digit, ...
+*                           (B) with the exception of '0'.
+*
+*                   (b) (1) The number of leading characters is such that the total number of significant
+*                           integer digits plus the number of leading characters plus possible negative
+*                           sign character is equal to the requested number of integer digits to format
+*                           ('nbr_dig').
+*
+*                               Examples :
+*
+*                                   nbr       = 23456
+*                                   nbr_dig   = 7
+*                                   nbr_base  = 10
+*                                   lead_char = ' '
+*
+*                                   pstr      = "  23456"
+*
+*
+*                                   nbr       = -23456
+*                                   nbr_dig   =  7
+*                                   nbr_base  = 10
+*                                   lead_char = ' '
+*
+*                                   pstr      = " -23456"
+*
+*                       (2) (A) If the number to format ('nbr') is negative AND the leading character
+*                               ('lead_char') is     a '0' digit; then the negative sign character
+*                               prefixes all leading characters prior to the formatted number.
+*
+*                                   Examples :
+*
+*                                       nbr        = -23456
+*                                       nbr_dig    =  8
+*                                       nbr_base   = 10
+*                                       lead_char  = '0'
+*
+*                                       pstr       = "-0023456"
+*
+*
+*                                       nbr        = -43981
+*                                       nbr_dig    =  8
+*                                       nbr_base   = 16
+*                                       lead_char  = '0'
+*                                       lower_case = DEF_NO
+*
+*                                       pstr       = "-000ABCD"
+*
+*                           (B) If the number to format ('nbr') is negative AND the leading character
+*                               ('lead_char') is NOT a '0' digit; then the negative sign character
+*                               immediately prefixes the most significant digit of the formatted number.
+*
+*                                   Examples :
+*
+*                                       nbr        = -23456
+*                                       nbr_dig    =  8
+*                                       nbr_base   = 10
+*                                       lead_char  = '#'
+*
+*                                       pstr       = "##-23456"
+*
+*
+*                                       nbr        = -43981
+*                                       nbr_dig    =  8
+*                                       nbr_base   = 16
+*                                       lead_char  = '#'
+*                                       lower_case = DEF_YES
+*
+*                                       pstr       = "###-abcd"
+*
+*                   (c) (1) If the value of the number to format is     zero  ...
+*                       (2) ... & the number of digits to format is non-zero, ...
+*                       (3) ... but NO leading character available;           ...
+*                       (4) ... then one digit of '0' value is formatted.
+*
+*                           This is NOT a leading character; but a single integer digit of '0' value.
+*
+*               (4) (a) NULL-character terminate option DISABLED prevents overwriting previous character
+*                       array formatting.
+*
+*                   (b) WARNING: Unless 'pstr' character array is pre-/post-terminated, NULL-character
+*                       terminate option DISABLED will cause character string run-on.
+*
+*               (5) (a) Format buffer size NOT validated; buffer overruns MUST be prevented by caller.
+*
+*                   (b) To prevent character buffer overrun :
+*
+*                           Character array size MUST be  >=  ('nbr_dig'          +
+*                                                               1 negative sign   +
+*                                                               1 'NUL' terminator)  characters
+*
+*               (6) For any unsuccessful string format or error(s), an invalid string of question marks
+*                   ('?') will be formatted, where the number of question marks is determined by the
+*                   number of digits to format ('nbr_dig') :
+*
+*                      Invalid string's     {  (a)   0 (NULL string)  ,  if 'nbr_dig' = 0
+*                          number of     =  {
+*                       question marks      {  (b)  'nbr_dig'         ,  if 'nbr_dig' > 0
+*
+*********************************************************************************************************
+*/
+
+CPU_CHAR  *Str_FmtNbr_Int32S (CPU_INT32S    nbr,
+                              CPU_INT08U    nbr_dig,
+                              CPU_INT08U    nbr_base,
+                              CPU_CHAR      lead_char,
+                              CPU_BOOLEAN   lower_case,
+                              CPU_BOOLEAN   nul,
+                              CPU_CHAR     *pstr)
+{
+    CPU_CHAR     *pstr_fmt;
+    CPU_INT32S    nbr_fmt;
+    CPU_BOOLEAN   nbr_neg;
+
+
+    if (nbr < 0) {                                              /* If nbr neg, ...                                      */
+        nbr_fmt = -nbr;                                         /* ... negate nbr.                                      */
+        nbr_neg =  DEF_YES;
+    } else {
+        nbr_fmt =  nbr;
+        nbr_neg =  DEF_NO;
+    }
+
+    pstr_fmt = Str_FmtNbr_Int32((CPU_INT32U)nbr_fmt,            /* Fmt signed int into str.                             */
+                                            nbr_dig,
+                                            nbr_base,
+                                            nbr_neg,
+                                            lead_char,
+                                            lower_case,
+                                            nul,
+                                            pstr);
+
+    return (pstr_fmt);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Str_FmtNbr_32()
+*
+* Description : Format number into a multi-digit character string.
+*
+* Argument(s) : nbr             Number                         to format (see Note #1).
+*
+*               nbr_dig         Number of decimal       digits to format (see Note #2).
+*
+*               nbr_dp          Number of decimal point digits to format.
+*
+*               lead_char       Prepend leading character (see Note #3) :
+*
+*                                   '\0'                    Do NOT prepend leading character to string.
+*                                     Printable character          Prepend leading character to string.
+*                                   Unprintable character   Format invalid string (see Note #6d).
+*
+*               nul             Append terminating NULL-character (see Note #4) :
+*
+*                                   DEF_NO          Do NOT append terminating NULL-character to string.
+*                                   DEF_YES                Append terminating NULL-character to string.
+*
+*               pstr            Pointer to character array to return formatted number string (see Note #5).
+*
+* Return(s)   : Pointer to formatted string, if NO error(s) [see Note #6c].
+*
+*               Pointer to NULL,             otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) (a) The maximum accuracy for 32-bit floating-point numbers :
+*
+*
+*                                 Maximum Accuracy            log [Internal-Base ^ (Number-Internal-Base-Digits)]
+*                           32-bit Floating-point Number  =  -----------------------------------------------------
+*                                                                             log [External-Base]
+*
+*                                                             log [2 ^ 24]
+*                                                         =  --------------
+*                                                               log [10]
+*
+*                                                         <  7.225  Base-10 Digits
+*
+*                               where
+*                                       Internal-Base                   Internal number base of floating-
+*                                                                           point numbers (i.e.  2)
+*                                       External-Base                   External number base of floating-
+*                                                                           point numbers (i.e. 10)
+*                                       Number-Internal-Base-Digits     Number of internal number base
+*                                                                           significant digits (i.e. 24)
+*
+*                   (b) Some CPUs' &/or compilers' floating-point implementations MAY further reduce the
+*                       maximum accuracy.
+*
+*               (2) (a) If the total number of digits to format ('nbr_dig + nbr_dp') is zero; then NO
+*                       formatting is performed except possible NULL-termination of the string (see Note #4).
+*
+*                           Example :
+*
+*                               nbr     = -23456.789
+*                               nbr_dig =  0
+*                               nbr_dp  =  0
+*
+*                               pstr    = ""                        See Note #7a
+*
+*                   (b) (1) If the number of digits to format ('nbr_dig') is less than the number of
+*                           significant integer digits of the number to format ('nbr'); then an invalid
+*                           string is formatted instead of truncating any significant integer digits.
+*
+*                               Example :
+*
+*                                   nbr     = 23456.789
+*                                   nbr_dig = 3
+*                                   nbr_dp  = 2
+*
+*                                   pstr    = "??????"              See Note #7d
+*
+*                       (2) If the number to format ('nbr') is negative but the number of digits to format
+*                           ('nbr_dig') is equal to the number of significant integer digits of the number
+*                           to format ('nbr'); then an invalid string is formatted instead of truncating
+*                           the negative sign.
+*
+*                               Example :
+*
+*                                   nbr     = -23456.789
+*                                   nbr_dig =  5
+*                                   nbr_dp  =  2
+*
+*                                   pstr    = "????????"            See Note #7d
+*
+*                       (3) If the number to format ('nbr') is negative but the number of significant
+*                           integer digits is zero, & the number of digits to format ('nbr_dig') is one
+*                           but the number of decimal point digits to format ('nbr_dp') is zero; then
+*                           an invalid string is formatted instead of truncating the negative sign.
+*
+*                               Example :
+*
+*                                   nbr     = -0.7895
+*                                   nbr_dig =  1
+*                                   nbr_dp  =  0
+*
+*                                   pstr    = "?"                   See Note #7d
+*
+*                       (4) (A) If the number to format ('nbr') is negative but the number of significant
+*                               integer digits is zero, & the number of digits to format ('nbr_dig') is
+*                               zero but the number of decimal point digits to format ('nbr_dp') is non-
+*                               zero; then the negative sign immediately prefixes the decimal point --
+*                               with NO decimal digits formatted, NOT even a single decimal digit of '0'.
+*
+*                                   Example :
+*
+*                                       nbr     = -0.7895
+*                                       nbr_dig =  0
+*                                       nbr_dp  =  2
+*
+*                                       pstr    = "-.78"
+*
+*                           (B) If the number to format ('nbr') is positive but the number of significant
+*                               integer digits is zero, & the number of digits to format ('nbr_dig') is
+*                               zero but the number of decimal point digits to format ('nbr_dp') is non-
+*                               zero; then a single decimal digit of '0' prefixes the decimal point.
+*
+*                               This '0' digit is used whenever a negative sign is not formatted (see
+*                               Note #2b4A) so that the formatted string's decimal point is not floating,
+*                               but fixed in the string as the 2nd character.
+*
+*                                   Example :
+*
+*                                       nbr     =  0.7895
+*                                       nbr_dig =  0
+*                                       nbr_dp  =  2
+*
+*                                       pstr    = "0.78"
+*
+*                   (c) (1) If the total number of digits to format ('nbr_dig + nbr_dp') is greater than ... :
+*
+*                           (A) ... the maximum accuracy of the CPU's &/or compiler's 32-bit floating-point
+*                               numbers, digits following all significantly-accurate digits of the number to
+*                               format ('nbr') will be inaccurate; ...
+*                           (B) ... the configured maximum accuracy ('LIB_STR_CFG_FP_MAX_NBR_DIG_SIG'), all
+*                               digits or decimal places following all significantly-accurate digits of the
+*                               number to format ('nbr') will be replaced & formatted with zeros ('0').
+*
+*                                   Example :
+*
+*                                       nbr                            = 123456789.012345
+*                                       nbr_dig                        = 9
+*                                       nbr_dp                         = 6
+*                                       LIB_STR_CFG_FP_MAX_NBR_DIG_SIG = 7
+*
+*                                       pstr                           = "123456700.000000"
+*
+*                       (2) Therefore, one or more least-significant digit(s) of the number to format ('nbr')
+*                           MAY be rounded & not necessarily truncated due to the inaccuracy of the CPU's
+*                           &/or compiler's floating-point implementation.
+*
+*                       See also Note #1.
+*
+*               (3) Leading character option prepends leading characters prior to the first non-zero digit.
+*
+*                   (a) (1) Leading character MUST be a printable ASCII character.
+*
+*                       (2) (A) Leading character MUST NOT be a base-10 digit, ...
+*                           (B) with the exception of '0'.
+*
+*                   (b) (1) The number of leading characters is such that the total number of significant
+*                           integer digits plus the number of leading characters plus possible negative
+*                           sign character is equal to the requested number of integer digits to format
+*                           ('nbr_dig').
+*
+*                               Examples :
+*
+*                                   nbr       = 23456.789
+*                                   nbr_dig   = 7
+*                                   nbr_dp    = 2
+*                                   lead_char = ' '
+*
+*                                   pstr      = "  23456.78"
+*
+*
+*                                   nbr       = -23456.789
+*                                   nbr_dig   =  7
+*                                   nbr_dp    =  2
+*                                   lead_char = ' '
+*
+*                                   pstr      = " -23456.78"
+*
+*                       (2) (A) If the number to format ('nbr') is negative AND the leading character
+*                               ('lead_char') is     a '0' digit; then the negative sign character
+*                               prefixes all leading characters prior to the formatted number.
+*
+*                                   Example :
+*
+*                                       nbr       = -23456.789
+*                                       nbr_dig   =  8
+*                                       nbr_dp    =  2
+*                                       lead_char = '0'
+*
+*                                       pstr      = "-0023456.78"
+*
+*                           (B) If the number to format ('nbr') is negative AND the leading character
+*                               ('lead_char') is NOT a '0' digit; then the negative sign character
+*                               immediately prefixes the most significant digit of the formatted number.
+*
+*                                   Examples :
+*
+*                                       nbr       = -23456.789
+*                                       nbr_dig   =  8
+*                                       nbr_dp    =  2
+*                                       lead_char = '#'
+*
+*                                       pstr      = "##-23456.78"
+*
+*                   (c) (1) If the integer value of the number to format is zero & ...
+*                       (2) ... the number of digits to format is greater than one ...
+*                       (3) ... OR  the number is NOT negative,                    ...
+*                       (4) ... but NO leading character available;                ...
+*                       (5) ... then one digit of '0' value is formatted.
+*
+*                           This is NOT a leading character; but a single integer digit of '0' value.
+*
+*                       See also Note #2b4B.
+*
+*               (4) (a) NULL-character terminate option DISABLED prevents overwriting previous character
+*                       array formatting.
+*
+*                   (b) WARNING: Unless 'pstr' character array is pre-/post-terminated, NULL-character
+*                       terminate option DISABLED will cause character string run-on.
+*
+*               (5) (a) Format buffer size NOT validated; buffer overruns MUST be prevented by caller.
+*
+*                   (b) To prevent character buffer overrun :
+*
+*                           Character array size MUST be  >=  ('nbr_dig'          +
+*                                                              'nbr_dp'           +
+*                                                               1 negative sign   +
+*                                                               1 decimal point   +
+*                                                               1 'NUL' terminator)  characters
+*
+*               (6) String format terminates when :
+*
+*                   (a) Format string pointer is passed a NULL pointer.
+*                       (1) No      string formatted;                NULL pointer returned.
+*
+*                   (b) Total number of digits to format ('nbr_dig + nbr_dp') is zero.
+*                       (1) NULL    string formatted (see Note #7a); NULL pointer returned.
+*
+*                   (c) Number of digits to format ('nbr_dig') is less than number of significant
+*                           integer digits of the number to format ('nbr'), including possible
+*                           negative sign.
+*                       (1) Invalid string formatted (see Note #7);  NULL pointer returned.
+*
+*                   (d) Lead character is NOT a valid, printable character (see Note #3a).
+*                       (1) Invalid string formatted (see Note #7);  NULL pointer returned.
+*
+*                   (e) Number successfully formatted into character string array.
+*
+*               (7) For any unsuccessful string format or error(s), an invalid string of question marks
+*                   ('?') will be formatted, where the number of question marks is determined by the
+*                   number of digits ('nbr_dig') & number of decimal point digits ('nbr_dp') to format :
+*
+*                                           {  (a)    0 (NULL string)          ,  if 'nbr_dig' = 0  AND
+*                                           {                                        'nbr_dp'  = 0
+*                                           {
+*                                           {  (b)   'nbr_dig'                 ,  if 'nbr_dig' > 0  AND
+*                                           {                                        'nbr_dp'  = 0
+*                      Invalid string's     {
+*                          number of     =  {  (c)  ['nbr_dp'               +  ,  if 'nbr_dig' = 0  AND
+*                       question marks      {         1 (for decimal point) +        'nbr_dp'  > 0
+*                                           {         1 (for negative sign) ]
+*                                           {
+*                                           {  (d)  ['nbr_dig'              +  ,  if 'nbr_dig' > 0  AND
+*                                           {        'nbr_dp'               +        'nbr_dp'  > 0
+*                                           {         1 (for decimal point) ]
+*
+*********************************************************************************************************
+*/
+
+#if (LIB_STR_CFG_FP_EN == DEF_ENABLED)
+CPU_CHAR  *Str_FmtNbr_32 (CPU_FP32      nbr,
+                          CPU_INT08U    nbr_dig,
+                          CPU_INT08U    nbr_dp,
+                          CPU_CHAR      lead_char,
+                          CPU_BOOLEAN   nul,
+                          CPU_CHAR     *pstr)
+{
+    CPU_CHAR     *pstr_fmt;
+    CPU_DATA      i;
+    CPU_FP32      nbr_fmt;
+    CPU_FP32      nbr_log;
+    CPU_INT32U    nbr_shiftd;
+    CPU_INT16U    nbr_dig_max;
+    CPU_INT16U    nbr_dig_sig    = 0;
+    CPU_INT08U    nbr_neg_sign;
+    CPU_INT08U    dig_val;
+    CPU_FP32      dig_exp;
+    CPU_FP32      dp_exp;
+    CPU_BOOLEAN   lead_char_dig;
+    CPU_BOOLEAN   lead_char_fmtd = DEF_NO;
+    CPU_BOOLEAN   lead_char_0;
+    CPU_BOOLEAN   fmt_invalid;
+    CPU_BOOLEAN   print_char;
+    CPU_BOOLEAN   nbr_neg;
+    CPU_BOOLEAN   nbr_neg_fmtd   = DEF_NO;
+
+
+                                                                /* ---------------- VALIDATE FMT ARGS ----------------- */
+    if (pstr == (CPU_CHAR *)0) {                                /* Rtn NULL if str ptr NULL (see Note #6a).             */
+        return ((CPU_CHAR *)0);
+    }
+
+    dig_exp     =  1.0f;
+    fmt_invalid =  DEF_NO;
+    lead_char_0 = (lead_char == '0') ? DEF_YES : DEF_NO;        /* Chk if lead char a '0' dig (see Note #3b2).          */
+    nbr_fmt     =  0.0f;
+    nbr_neg     =  DEF_NO;
+
+    if ((nbr_dig < 1) && (nbr_dp < 1)) {                        /* If nbr digs/dps = 0, ...                             */
+        fmt_invalid = DEF_YES;                                  /* ... fmt invalid str (see Note #6b).                  */
+    }
+
+    if (lead_char != (CPU_CHAR)'\0') {
+        print_char =  ASCII_IsPrint(lead_char);
+        if (print_char != DEF_YES) {                            /* If lead char non-printable  (see Note #3a1), ...     */
+            fmt_invalid = DEF_YES;                              /* ... fmt invalid str         (see Note #6d).          */
+
+        } else if (lead_char != '0') {                          /* Chk lead char for non-0 dig.                         */
+            lead_char_dig = ASCII_IsDig(lead_char);
+            if (lead_char_dig == DEF_YES) {                     /* If  lead char     non-0 dig (see Note #3a2A), ...    */
+                fmt_invalid = DEF_YES;                          /* ... fmt invalid str         (see Note #6d).          */
+            }
+        }
+    }
+
+
+                                                                /* ----------------- PREPARE NBR FMT ------------------ */
+    pstr_fmt = pstr;
+
+    if (fmt_invalid == DEF_NO) {
+        if (nbr < 0.0f) {                                       /* If nbr neg, ...                                      */
+            nbr_fmt      = -nbr;                                /* ... negate nbr.                                      */
+            nbr_neg_sign =  1u;
+            nbr_neg      =  DEF_YES;
+        } else {
+            nbr_fmt      =  nbr;
+            nbr_neg_sign =  0u;
+            nbr_neg      =  DEF_NO;
+        }
+
+        nbr_log     = nbr_fmt;
+        nbr_dig_max = 0u;
+        while (nbr_log >= 1.0f) {                               /* While base-10 digs avail, ...                        */
+            nbr_dig_max++;                                      /* ... calc max nbr digs.                               */
+            nbr_log /= 10.0f;
+        }
+
+        if (((nbr_dig >= (nbr_dig_max + nbr_neg_sign)) ||       /* If req'd nbr digs >= (max nbr digs + neg sign)    .. */
+             (nbr_dig_max < 1))                        &&       /* .. or NO nbr digs,                                .. */
+            ((nbr_dig     > 1) ||                               /* .. but NOT [(req'd nbr dig = 1) AND               .. */
+             (nbr_dp      > 0) ||                               /* ..          (req'd nbr dp  = 0) AND               .. */
+             (nbr_neg == DEF_NO))) {                            /* ..          (      nbr neg    )]   (see Note #2b3).  */
+                                                                /* .. prepare nbr digs to fmt.                          */
+            for (i = 1u; i < nbr_dig; i++) {
+                dig_exp *= 10.0f;
+            }
+
+            nbr_neg_fmtd   =  DEF_NO;
+            nbr_dig_sig    =  0u;
+            lead_char_fmtd =  DEF_NO;
+        } else {                                                /* Else if nbr trunc'd, ...                             */
+            fmt_invalid = DEF_YES;                              /* ... fmt invalid str (see Note #6c).                  */
+        }
+    }
+
+
+                                                                /* ------------------- FMT NBR STR -------------------- */
+    for (i = nbr_dig; i > 0; i--) {                             /* Fmt str for desired nbr digs :                       */
+        if (fmt_invalid == DEF_NO) {
+            if (nbr_dig_sig < LIB_STR_CFG_FP_MAX_NBR_DIG_SIG) { /* If nbr sig digs < max, fmt str digs;           ...   */
+                nbr_shiftd = (CPU_INT32U)(nbr_fmt / dig_exp);
+                if ((nbr_shiftd > 0) ||                         /* If shifted nbr > 0                          ...      */
+                    (i == 1u)) {                                /* ... OR on one's dig to fmt (see Note #3c1), ...      */
+                                                                /* ... calc & fmt dig val;                     ...      */
+                    if ((nbr_neg      == DEF_YES) &&            /* If  nbr neg                     ...                  */
+                        (nbr_neg_fmtd == DEF_NO )) {            /* ... but neg sign NOT yet fmt'd; ...                  */
+
+                        if (lead_char_fmtd == DEF_YES) {        /* ... & if lead char(s) fmt'd,    ...                  */
+                            pstr_fmt--;                         /* ... replace last lead char w/   ...                  */
+                        }
+                       *pstr_fmt++   = '-';                     /* ... prepend neg sign (see Notes #2b & #3b).          */
+                        nbr_neg_fmtd = DEF_YES;
+                    }
+
+                    if (nbr_shiftd > 0) {                       /* If shifted nbr > 0,        ...                       */
+                        dig_val    = (CPU_INT08U)(nbr_shiftd % 10u);
+                       *pstr_fmt++ = (CPU_CHAR  )(dig_val    + '0');
+
+                        nbr_dig_sig++;                          /* ... inc nbr sig digs;      ...                       */
+
+                    } else if ((nbr_dig > 1) ||                 /* ... else if req'd digs > 1 ...                       */
+                               (nbr_neg == DEF_NO)) {           /* ... or non-neg nbr,        ...                       */
+                       *pstr_fmt++ = '0';                       /* ... fmt one '0' char (see Note #3c5).                */
+                    }
+
+                } else if ((nbr_neg      == DEF_YES) &&         /* ... else if nbr neg                         ...      */
+                           (lead_char_0  == DEF_YES) &&         /* ... & lead char a '0' dig                   ...      */
+                           (nbr_neg_fmtd == DEF_NO )) {         /* ... but neg sign NOT yet fmt'd,             ...      */
+
+                   *pstr_fmt++   = '-';                         /* ... prepend neg sign (see Note #3b);        ...      */
+                    nbr_neg_fmtd = DEF_YES;
+
+                } else if (lead_char != (CPU_CHAR)'\0') {       /* ... else if avail,                          ...      */
+                   *pstr_fmt++     = lead_char;                 /* ... fmt lead char.                                   */
+                    lead_char_fmtd = DEF_YES;
+                }
+
+                dig_exp /= 10.0f;                               /* Shift to next least-sig dig.                         */
+
+            } else {                                            /* ... else append non-sig 0's (see Note #2c2).         */
+               *pstr_fmt++ = '0';
+            }
+
+        } else {                                                /* Else fmt '?' for invalid str (see Note #7).          */
+           *pstr_fmt++ = '?';
+        }
+    }
+
+
+    if (nbr_dp > 0) {                                           /* Fmt str for desired nbr dp :                         */
+        if (nbr_dig < 1) {                                      /* If NO digs fmt'd;                             ...    */
+            if (fmt_invalid == DEF_NO) {                        /* ... nbr fmt valid,                            ...    */
+                if ((nbr_neg      == DEF_YES) &&                /* ... nbr neg                                   ...    */
+                    (nbr_neg_fmtd == DEF_NO )) {                /* ... but neg sign NOT yet fmt'd,               ...    */
+                    *pstr_fmt++ = '-';                          /* ... prepend neg sign (see Notes #2b & #3b);   ...    */
+                } else {                                        /* ... else prepend 1 dig of '0' (see Note #3c5) ...    */
+                    *pstr_fmt++ = '0';
+                }
+            } else {                                            /* ... else fmt '?' for invalid str (see Note #7).      */
+                *pstr_fmt++ = '?';
+            }
+        }
+
+        if (fmt_invalid == DEF_NO) {                            /* If nbr fmt valid, ...                                */
+           *pstr_fmt++ = '.';                                   /* ... append dp prior to dp conversion.                */
+        } else {                                                /* Else fmt '?' for invalid str (see Note #7).          */
+           *pstr_fmt++ = '?';
+        }
+
+        dp_exp = 10.0f;
+        for (i = 0u; i < nbr_dp; i++) {
+            if (fmt_invalid == DEF_NO) {
+                                                                /* If nbr sig digs < max, fmt str dps;    ...           */
+                if (nbr_dig_sig <  LIB_STR_CFG_FP_MAX_NBR_DIG_SIG) {
+                    nbr_shiftd  = (CPU_INT32U)(nbr_fmt * dp_exp);
+                    dig_val     = (CPU_INT08U)(nbr_shiftd % 10u);
+                   *pstr_fmt++  = (CPU_CHAR  )(dig_val    + '0');
+                    dp_exp     *=  10.0f;                       /* Shift to next least-sig dp.                          */
+
+                    if ((nbr_shiftd  > 0) ||                    /* If shifted nbr > 0                  ...              */
+                        (nbr_dig_sig > 0)) {                    /* ... OR  > 0 sig digs already fmt'd, ...              */
+                         nbr_dig_sig++;                         /* ... inc nbr sig digs.                                */
+                    }
+
+                } else {                                        /* ... else append non-sig 0's (see Note #2c2).         */
+                   *pstr_fmt++ = '0';
+                }
+
+            } else {                                            /* Else fmt '?' for invalid str (see Note #7).          */
+               *pstr_fmt++ = '?';
+            }
+        }
+    }
+
+
+    if (nul != DEF_NO) {                                        /* If NOT DISABLED, append NULL char (see Note #4).     */
+       *pstr_fmt = (CPU_CHAR)'\0';
+    }
+
+
+    if (fmt_invalid != DEF_NO) {                                /* Rtn NULL for invalid str fmt (see Notes #6a - #6d).  */
+        return ((CPU_CHAR *)0);
+    }
+
+
+    return (pstr);                                              /* Rtn ptr to fmt'd str (see Note #6e).                 */
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        Str_ParseNbr_Int32U()
+*
+* Description : Parse 32-bit unsigned integer from string.
+*
+* Argument(s) : pstr        Pointer to string (see Notes #1 & #2a).
+*
+*               pstr_next   Optional pointer to a variable to ... :
+*
+*                               (a) Return a pointer to first character following the integer string,
+*                                       if NO error(s) [see Note #2a2B2];
+*                               (b) Return a pointer to 'pstr',
+*                                       otherwise      (see Note #2a2A2).
+*
+*               nbr_base    Base of number to parse (see Notes #2a1B1 & #2a2B1).
+*
+* Return(s)   : Parsed integer,      if integer parsed with NO overflow   (see Note #2a3A).
+*
+*               DEF_INT_32U_MAX_VAL, if integer parsed but     overflowed (see Note #2a3A1).
+*
+*               0,                   otherwise                            (see Note #2a3B).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strtoul() : DESCRIPTION' states that "these
+*                       functions shall convert the initial portion of the string pointed to by 'str' ('pstr')
+*                       to a type unsigned long ... representation" :
+*
+*                       (1) "First, they decompose the input string into three parts" :
+*
+*                           (A) "An initial, possibly empty, sequence of white-space characters [as specified
+*                                by isspace()]."
+*
+*                               (1) "The subject sequence is defined as the longest initial subsequence of the
+*                                    input string, starting with the first non-white-space character that is of
+*                                    the expected form.  The subject sequence shall contain no characters if the
+*                                    input string is empty or consists entirely of white-space characters."
+*
+*                           (B) (1) "A subject sequence interpreted as an integer represented in some radix
+*                                    determined by the value of 'base' ('nbr_base')" :
+*
+*                                   (a) "If the value of 'base' ('nbr_base') is 0, the expected form of the
+*                                        subject sequence is that of a decimal constant, octal constant, or
+*                                        hexadecimal constant" :
+*
+*                                       (1) "A decimal constant begins with a non-zero digit, and consists of a
+*                                            sequence of decimal digits."
+*
+*                                       (2) "An octal constant consists of the prefix '0' optionally followed by
+*                                            a sequence of the digits '0' to '7' only."
+*
+*                                       (3) "A hexadecimal constant consists of the prefix '0x' or '0X' followed
+*                                            by a sequence of the decimal digits and letters 'a' (or 'A') to 'f'
+*                                            (or 'F') with values 10 to 15 respectively."
+*
+*                                   (b) "If the value of 'base' ('nbr_base') is between 2 and 36, the expected form
+*                                        of the subject sequence is a sequence of letters and digits representing
+*                                        an integer with the radix specified by 'base' ('nbr_base')" :
+*
+*                                       (1) (A) "The letters from 'a' (or 'A') to 'z' (or 'Z') inclusive are
+*                                                ascribed the values 10 to 35"; ...
+*                                           (B) "only letters whose ascribed values are less than that of base
+*                                                are permitted."
+*
+*                                       (2) (A) "If the value of 'base' ('nbr_base') is 16, the characters '0x' or
+*                                                '0X' may optionally precede the sequence of letters and digits."
+*
+*                                           (B) Although NO specification states that "if the value of 'base'
+*                                               ('nbr_base') is" 8, the '0' character "may optionally precede
+*                                               the sequence of letters and digits"; it seems reasonable to
+*                                               allow the '0' character to be optionally parsed.
+*
+*                               (2) "A subject sequence .... may be preceded by a '+' or '-' sign."
+*
+*                                   (a) However, it does NOT seem reasonable to parse & convert a negative number
+*                                       integer string into an unsigned integer.
+*
+*                           (C) (1) (a) "A final string of one or more unrecognized characters,"  ...
+*                                   (b) "including the terminating null byte of the input string" ...
+*                               (2) "other than a sign or a permissible letter or digit."
+*
+*                       (2) Second, "they shall attempt to convert the subject sequence to an unsigned integer" :
+*
+*                           (A) "If the subject sequence is empty or does not have the expected form" :
+*
+*                               (1) "no conversion [is] performed"; ...
+*                               (2) "the value of 'str' ('pstr') [is] stored in the object pointed to by 'endptr'
+*                                    ('pstr_next'), provided that 'endptr' ('pstr_next') is not a null pointer."
+*
+*                           (B) "If the subject sequence has the expected form" :
+*
+*                               (1) (a) "and the value of 'base' ('nbr_base') is 0, the sequence of characters
+*                                        starting with the first digit shall be interpreted as an integer constant."
+*
+*                                   (b) "and the value of 'base' ('nbr_base') is between 2 and 36, it shall be
+*                                        used as the base for conversion, ascribing to each letter its value as
+*                                        given above" (see Note #2a1B1b1A).
+*
+*                               (2) "A pointer to the final string shall be stored in the object pointed to by
+*                                   'endptr' ('pstr_next'), provided that 'endptr' ('pstr_next') is not a null
+*                                   pointer."
+*
+*                       (3) Lastly, IEEE Std 1003.1, 2004 Edition, Section 'strtoul() : RETURN VALUE' states that :
+*
+*                           (A) "Upon successful completion, these functions shall return the converted value."
+*                               (1) "If the correct value is outside the range of representable values, {ULONG_MAX}
+*                                    ... shall be returned."
+*
+*                           (B) "If no conversion could be performed, 0 shall be returned."
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'strtoul() : ERRORS' states that "these functions
+*                           shall fail if" :
+*
+*                           (A) "[EINVAL] - The value of 'base' ('nbr_base') is not supported."
+*
+*                           (B) "[ERANGE] - The value to be returned is not representable."
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'strtoul() : ERRORS' states that "these functions
+*                           may fail if" :
+*
+*                           (A) "[EINVAL] - No conversion could be performed."
+*
+*               (3) Return integer value & next string pointer should be used to diagnose parse success or failure :
+*
+*                   (a) Valid parse string integer :
+*
+*                           pstr      = "     ABCDE xyz"
+*                           nbr_base  = 16
+*
+*                           nbr       = 703710
+*                           pstr_next = " xyz"
+*
+*
+*                   (b) Invalid parse string integer :
+*
+*                           pstr      = "     ABCDE"
+*                           nbr_base  = 10
+*
+*                           nbr       =  0
+*                           pstr_next = pstr = "     ABCDE"
+*
+*
+*                   (c) Valid hexadecimal parse string integer :
+*
+*                           pstr      = "     0xGABCDE"
+*                           nbr_base  = 16
+*
+*                           nbr       =  0
+*                           pstr_next = "xGABCDE"
+*
+*
+*                   (d) Valid decimal parse string integer ('0x' prefix ignored
+*                               following invalid hexadecimal characters) :
+*
+*                           pstr      = "     0xGABCDE"
+*                           nbr_base  =  0
+*
+*                           nbr       =  0
+*                           pstr_next = "xGABCDE"
+*
+*
+*                   (e) Valid decimal parse string integer ('0'  prefix ignored
+*                               following invalid octal       characters) :
+*
+*                           pstr      = "     0GABCDE"
+*                           nbr_base  =  0
+*
+*                           nbr       =  0
+*                           pstr_next = "GABCDE"
+*
+*
+*                   (f) Parse string integer overflow :
+*
+*                           pstr      = "   12345678901234567890*123456"
+*                           nbr_base  = 10
+*
+*                           nbr       = DEF_INT_32U_MAX_VAL
+*                           pstr_next = "*123456"
+*
+*
+*                   (g) Invalid negative unsigned parse string :
+*
+*                           pstr      = "  -12345678901234567890*123456"
+*                           nbr_base  = 10
+*
+*                           nbr       = 0
+*                           pstr_next = pstr = "  -12345678901234567890*123456"
+*
+*********************************************************************************************************
+*/
+
+CPU_INT32U  Str_ParseNbr_Int32U (const  CPU_CHAR     *pstr,
+                                        CPU_CHAR    **pstr_next,
+                                        CPU_INT08U    nbr_base)
+{
+    CPU_INT32U  nbr;
+
+
+    nbr = Str_ParseNbr_Int32(               pstr,               /* Parse/convert str ...                                */
+                                            pstr_next,
+                                            nbr_base,
+                                            DEF_NO,             /* ... as unsigned int (see Note #2a2).                 */
+                             (CPU_BOOLEAN *)0);
+
+    return (nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Str_ParseNbr_Int32S()
+*
+* Description : Parse 32-bit signed integer from string.
+*
+* Argument(s) : pstr        Pointer to string (see Notes #1 & #2a).
+*
+*               pstr_next   Optional pointer to a variable to ... :
+*
+*                               (a) Return a pointer to first character following the integer string,
+*                                       if NO error(s) [see Note #2a2B2];
+*                               (b) Return a pointer to 'pstr',
+*                                       otherwise      (see Note #2a2A2).
+*
+*               nbr_base    Base of number to parse (see Notes #2a1B1 & #2a2B1).
+*
+* Return(s)   : Parsed integer,      if integer parsed with NO over- or underflow (see Note #2a3A).
+*
+*               DEF_INT_32S_MIN_VAL, if integer parsed but negatively underflowed (see Note #2a3A1a).
+*
+*               DEF_INT_32U_MAX_VAL, if integer parsed but positively overflowed  (see Note #2a3A1b).
+*
+*               0,                   otherwise                                    (see Note #2a3B).
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) String buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strtol() : DESCRIPTION' states that "these
+*                       functions shall convert the initial portion of the string pointed to by 'str' ('pstr')
+*                       to a type long ... representation" :
+*
+*                       (1) "First, they decompose the input string into three parts" :
+*
+*                           (A) "An initial, possibly empty, sequence of white-space characters [as specified
+*                                by isspace()]."
+*
+*                               (1) "The subject sequence is defined as the longest initial subsequence of the
+*                                    input string, starting with the first non-white-space character that is of
+*                                    the expected form.  The subject sequence shall contain no characters if the
+*                                    input string is empty or consists entirely of white-space characters."
+*
+*                           (B) (1) "A subject sequence interpreted as an integer represented in some radix
+*                                    determined by the value of 'base' ('nbr_base')" :
+*
+*                                   (a) "If the value of 'base' ('nbr_base') is 0, the expected form of the
+*                                        subject sequence is that of a decimal constant, octal constant, or
+*                                        hexadecimal constant" :
+*
+*                                       (1) "A decimal constant begins with a non-zero digit, and consists of a
+*                                            sequence of decimal digits."
+*
+*                                       (2) "An octal constant consists of the prefix '0' optionally followed by
+*                                            a sequence of the digits '0' to '7' only."
+*
+*                                       (3) "A hexadecimal constant consists of the prefix '0x' or '0X' followed
+*                                            by a sequence of the decimal digits and letters 'a' (or 'A') to 'f'
+*                                            (or 'F') with values 10 to 15 respectively."
+*
+*                                   (b) "If the value of 'base' ('nbr_base') is between 2 and 36, the expected form
+*                                        of the subject sequence is a sequence of letters and digits representing
+*                                        an integer with the radix specified by 'base' ('nbr_base')" :
+*
+*                                       (1) (A) "The letters from 'a' (or 'A') to 'z' (or 'Z') inclusive are
+*                                                ascribed the values 10 to 35"; ...
+*                                           (B) "only letters whose ascribed values are less than that of base
+*                                                are permitted."
+*
+*                                       (2) (A) "If the value of 'base' ('nbr_base') is 16, the characters '0x' or
+*                                                '0X' may optionally precede the sequence of letters and digits."
+*
+*                                           (B) Although NO specification states that "if the value of 'base'
+*                                               ('nbr_base') is" 8, the '0' character "may optionally precede
+*                                               the sequence of letters and digits"; it seems reasonable to
+*                                               allow the '0' character to be optionally parsed.
+*
+*                               (2) "A subject sequence .... may be preceded by a '+' or '-' sign."
+*
+*                                   (a) However, it does NOT seem reasonable to parse & convert a negative number
+*                                       integer string into an unsigned integer.
+*
+*                           (C) (1) (a) "A final string of one or more unrecognized characters,"  ...
+*                                   (b) "including the terminating null byte of the input string" ...
+*                               (2) "other than a sign or a permissible letter or digit."
+*
+*                       (2) Second, "they shall attempt to convert the subject sequence to an integer" :
+*
+*                           (A) "If the subject sequence is empty or does not have the expected form" :
+*
+*                               (1) "no conversion is performed"; ...
+*                               (2) "the value of 'str' ('pstr') is stored in the object pointed to by 'endptr'
+*                                    ('pstr_next'), provided that 'endptr' ('pstr_next') is not a null pointer."
+*
+*                           (B) "If the subject sequence has the expected form" :
+*
+*                               (1) (a) "and the value of 'base' ('nbr_base') is 0, the sequence of characters
+*                                        starting with the first digit shall be interpreted as an integer constant."
+*
+*                                   (b) "and the value of 'base' ('nbr_base') is between 2 and 36, it shall be
+*                                        used as the base for conversion, ascribing to each letter its value as
+*                                        given above" (see Note #2a1B1b1A).
+*
+*                               (2) "A pointer to the final string shall be stored in the object pointed to by
+*                                   'endptr' ('pstr_next'), provided that 'endptr' ('pstr_next') is not a null
+*                                   pointer."
+*
+*                       (3) Lastly, IEEE Std 1003.1, 2004 Edition, Section 'strtol() : RETURN VALUE' states that :
+*
+*                           (A) "Upon successful completion, these functions shall return the converted value."
+*
+*                               (1) "If the correct value is outside the range of representable values", either
+*                                    of the following "shall be returned" :
+*                                   (a) "{LONG_MIN}" or ...
+*                                   (b) "{LONG_MAX}"
+*
+*                           (B) "If no conversion could be performed, 0 shall be returned."
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'strtoul() : ERRORS' states that "these functions
+*                           shall fail if" :
+*
+*                           (A) "[EINVAL] - The value of 'base' ('nbr_base') is not supported."
+*
+*                           (B) "[ERANGE] - The value to be returned is not representable."
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'strtoul() : ERRORS' states that "these functions
+*                           may fail if" :
+*
+*                           (A) "[EINVAL] - No conversion could be performed."
+*
+*               (3) Return integer value & next string pointer should be used to diagnose parse success or failure :
+*
+*                   (a) Valid parse string integer :
+*
+*                           pstr      = "     ABCDE xyz"
+*                           nbr_base  = 16
+*
+*                           nbr       = 703710
+*                           pstr_next = " xyz"
+*
+*
+*                   (b) Invalid parse string integer :
+*
+*                           pstr      = "     ABCDE"
+*                           nbr_base  = 10
+*
+*                           nbr       =  0
+*                           pstr_next = pstr = "     ABCDE"
+*
+*
+*                   (c) Valid hexadecimal parse string integer :
+*
+*                           pstr      = "     0xGABCDE"
+*                           nbr_base  = 16
+*
+*                           nbr       =  0
+*                           pstr_next = "xGABCDE"
+*
+*
+*                   (d) Valid decimal parse string integer ('0x' prefix ignored
+*                               following invalid hexadecimal characters) :
+*
+*                           pstr      = "     0xGABCDE"
+*                           nbr_base  =  0
+*
+*                           nbr       =  0
+*                           pstr_next = "xGABCDE"
+*
+*
+*                   (e) Valid decimal parse string integer ('0'  prefix ignored
+*                               following invalid octal       characters) :
+*
+*                           pstr      = "     0GABCDE"
+*                           nbr_base  =  0
+*
+*                           nbr       =  0
+*                           pstr_next = "GABCDE"
+*
+*
+*                   (f) Parse string integer overflow :
+*
+*                           pstr      = "   12345678901234567890*123456"
+*                           nbr_base  = 10
+*
+*                           nbr       = DEF_INT_32S_MAX_VAL
+*                           pstr_next = "*123456"
+*
+*
+*                   (g) Parse string integer underflow :
+*
+*                           pstr      = "  -12345678901234567890*123456"
+*                           nbr_base  = 10
+*
+*                           nbr       = DEF_INT_32S_MIN_VAL
+*                           pstr_next = "*123456"
+*
+*********************************************************************************************************
+*/
+
+CPU_INT32S  Str_ParseNbr_Int32S (const  CPU_CHAR     *pstr,
+                                        CPU_CHAR    **pstr_next,
+                                        CPU_INT08U    nbr_base)
+{
+    CPU_INT32S   nbr;
+    CPU_INT32U   nbr_abs;
+    CPU_BOOLEAN  nbr_neg;
+
+
+    nbr_abs = Str_ParseNbr_Int32(pstr,                          /* Parse/convert str ...                                */
+                                 pstr_next,
+                                 nbr_base,
+                                 DEF_YES,                       /* ... as signed int (see Note #2a2).                   */
+                                &nbr_neg);
+
+    if (nbr_neg == DEF_NO) {                                    /* Chk for neg nbr & ovf/undf (see Note #2a3A1).        */
+        nbr = (nbr_abs > (CPU_INT32U) DEF_INT_32S_MAX_VAL)          ?  (CPU_INT32S)DEF_INT_32S_MAX_VAL
+                                                                    :  (CPU_INT32S)nbr_abs;
+    } else {
+        nbr = (nbr_abs > (CPU_INT32U)-DEF_INT_32S_MIN_VAL_ONES_CPL) ?  (CPU_INT32S)DEF_INT_32S_MIN_VAL
+                                                                    : -(CPU_INT32S)nbr_abs;
+    }
+
+    return (nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         Str_FmtNbr_Int32()
+*
+* Description : Format 32-bit integer into a multi-digit character string.
+*
+* Argument(s) : nbr             Number           to format.
+*
+*               nbr_dig         Number of digits to format (see Note #1).
+*
+*               nbr_base        Base   of number to format (see Note #2).
+*
+*               nbr_neg         Indicates whether number to format is negative :
+*               -------
+*                                   DEF_NO          Number is non-negative.
+*                                   DEF_YES         Number is     negative.
+*
+*                               Argument validated in Str_FmtNbr_Int32U(),
+*                                                     Str_FmtNbr_Int32S().
+*
+*               lead_char       Prepend leading character  (see Note #3) :
+*
+*                                   '\0'                    Do NOT prepend leading character to string.
+*                                     Printable character          Prepend leading character to string.
+*                                   Unprintable character   Format invalid string (see Note #6e).
+*
+*               lower_case      Format alphabetic characters (if any) in lower case :
+*
+*                                   DEF_NO          Format alphabetic characters in upper case.
+*                                   DEF_YES         Format alphabetic characters in lower case.
+*
+*               nul             Append terminating NULL-character (see Note #4) :
+*
+*                                   DEF_NO          Do NOT append terminating NULL-character to string.
+*                                   DEF_YES                Append terminating NULL-character to string.
+*
+*               pstr            Pointer to character array to return formatted number string (see Note #5).
+*
+* Return(s)   : Pointer to formatted string, if NO error(s) [see Note #6f].
+*
+*               Pointer to NULL,             otherwise.
+*
+* Caller(s)   : Str_FmtNbr_Int32U(),
+*               Str_FmtNbr_Int32S().
+*
+* Note(s)     : (1) (a) The maximum number of digits to format for 32-bit integer numbers :
+*
+*
+*                               Maximum Number of             [  log (Number)      ]
+*                             32-bit Integer Digits  =  floor [ -------------- + 1 ]
+*                                   to Format                 [   log (Base)       ]
+*
+*                               where
+*                                       Number                  Number to format
+*                                       Base            Base of number to format
+*
+*                   (b) (1) If the number of digits to format ('nbr_dig') is zero; then NO formatting
+*                           is performed except possible NULL-termination of the string (see Note #4).
+*
+*                               Example :
+*
+*                                   nbr      = -23456
+*                                   nbr_dig  =  0
+*                                   nbr_base = 10
+*
+*                                   pstr     = ""                   See Note #7a
+*
+*                       (2) If the number of digits to format ('nbr_dig') is less than the number of
+*                           significant integer digits of the number to format ('nbr'); then an invalid
+*                           string is formatted instead of truncating any significant integer digits.
+*
+*                               Example :
+*
+*                                   nbr      = 23456
+*                                   nbr_dig  = 3
+*                                   nbr_base = 10
+*
+*                                   pstr     = "???"                See Note #7b
+*
+*                       (3) If the number to format ('nbr') is negative but the number of digits to format
+*                           ('nbr_dig') is equal to the number of significant integer digits of the number
+*                           to format ('nbr'); then an invalid string is formatted instead of truncating
+*                           the negative sign.
+*
+*                               Example :
+*
+*                                   nbr      = -23456
+*                                   nbr_dig  =  5
+*                                   nbr_base = 10
+*
+*                                   pstr     = "?????"              See Note #7b
+*
+*               (2) The number's base MUST be between 2 & 36, inclusive.
+*
+*               (3) Leading character option prepends leading characters prior to the first non-zero digit.
+*
+*                   (a) (1) Leading character MUST be a printable ASCII character.
+*
+*                       (2) (A) Leading character MUST NOT be a number base digit, ...
+*                           (B) with the exception of '0'.
+*
+*                   (b) (1) The number of leading characters is such that the total number of significant
+*                           integer digits plus the number of leading characters plus possible negative
+*                           sign character is equal to the requested number of integer digits to format
+*                           ('nbr_dig').
+*
+*                               Examples :
+*
+*                                   nbr       = 23456
+*                                   nbr_dig   = 7
+*                                   nbr_base  = 10
+*                                   lead_char = ' '
+*
+*                                   pstr      = "  23456"
+*
+*
+*                                   nbr       = -23456
+*                                   nbr_dig   = 7
+*                                   nbr_base  = 10
+*                                   lead_char = ' '
+*
+*                                   pstr      = " -23456"
+*
+*                       (2) (A) If the number to format ('nbr') is negative AND the leading character
+*                               ('lead_char') is     a '0' digit; then the negative sign character
+*                               prefixes all leading characters prior to the formatted number.
+*
+*                                   Examples :
+*
+*                                       nbr        = -23456
+*                                       nbr_dig    =  8
+*                                       nbr_base   = 10
+*                                       lead_char  = '0'
+*
+*                                       pstr       = "-0023456"
+*
+*
+*                                       nbr        = -43981
+*                                       nbr_dig    =  8
+*                                       nbr_base   = 16
+*                                       lead_char  = '0'
+*                                       lower_case = DEF_NO
+*
+*                                       pstr       = "-000ABCD"
+*
+*                           (B) If the number to format ('nbr') is negative AND the leading character
+*                               ('lead_char') is NOT a '0' digit; then the negative sign character
+*                               immediately prefixes the most significant digit of the formatted number.
+*
+*                                   Examples :
+*
+*                                       nbr        = -23456
+*                                       nbr_dig    =  8
+*                                       nbr_base   = 10
+*                                       lead_char  = '#'
+*
+*                                       pstr       = "##-23456"
+*
+*
+*                                       nbr        = -43981
+*                                       nbr_dig    =  8
+*                                       nbr_base   = 16
+*                                       lead_char  = '#'
+*                                       lower_case = DEF_YES
+*
+*                                       pstr       = "###-abcd"
+*
+*                   (c) (1) If the value of the number to format is     zero  ...
+*                       (2) ... & the number of digits to format is non-zero, ...
+*                       (3) ... but NO leading character available;           ...
+*                       (4) ... then one digit of '0' value is formatted.
+*
+*                           This is NOT a leading character; but a single integer digit of '0' value.
+*
+*               (4) (a) NULL-character terminate option DISABLED prevents overwriting previous character
+*                       array formatting.
+*
+*                   (b) WARNING: Unless 'pstr' character array is pre-/post-terminated, NULL-character
+*                       terminate option DISABLED will cause character string run-on.
+*
+*               (5) (a) Format buffer size NOT validated; buffer overruns MUST be prevented by caller.
+*
+*                   (b) To prevent character buffer overrun :
+*
+*                           Character array size MUST be  >=  ('nbr_dig'          +
+*                                                               1 negative sign   +
+*                                                               1 'NUL' terminator)  characters
+*
+*               (6) String format terminates when :
+*
+*                   (a) Format string pointer is passed a NULL pointer.
+*                       (1) No      string formatted;                NULL pointer returned.
+*
+*                   (b) Number of digits to format ('nbr_dig') is zero.
+*                       (1) NULL    string formatted (see Note #7a); NULL pointer returned.
+*
+*                   (c) Number of digits to format ('nbr_dig') is less than number of significant
+*                           integer digits of the number to format ('nbr'), including possible
+*                           negative sign.
+*                       (1) Invalid string formatted (see Note #7);  NULL pointer returned.
+*
+*                   (d) Base is passed an invalid base (see Note #2).
+*                       (1) Invalid string format performed; NULL pointer returned.
+*
+*                   (e) Lead character is NOT a valid, printable character (see Note #3a).
+*                       (1) Invalid string formatted (see Note #7);  NULL pointer returned.
+*
+*                   (f) Number successfully formatted into character string array.
+*
+*               (7) For any unsuccessful string format or error(s), an invalid string of question marks
+*                   ('?') will be formatted, where the number of question marks is determined by the
+*                   number of digits to format ('nbr_dig') :
+*
+*                      Invalid string's     {  (a)   0 (NULL string)  ,  if 'nbr_dig' = 0
+*                          number of     =  {
+*                       question marks      {  (b)  'nbr_dig'         ,  if 'nbr_dig' > 0
+*
+*********************************************************************************************************
+*/
+
+static  CPU_CHAR  *Str_FmtNbr_Int32 (CPU_INT32U    nbr,
+                                     CPU_INT08U    nbr_dig,
+                                     CPU_INT08U    nbr_base,
+                                     CPU_BOOLEAN   nbr_neg,
+                                     CPU_CHAR      lead_char,
+                                     CPU_BOOLEAN   lower_case,
+                                     CPU_BOOLEAN   nul,
+                                     CPU_CHAR     *pstr)
+{
+    CPU_CHAR     *pstr_fmt;
+    CPU_DATA      i;
+    CPU_INT32U    nbr_fmt            = 0;
+    CPU_INT32U    nbr_log;
+    CPU_INT08U    nbr_dig_max;
+    CPU_INT08U    nbr_dig_min;
+    CPU_INT08U    nbr_dig_fmtd       = 0;
+    CPU_INT08U    nbr_neg_sign;
+    CPU_INT08U    nbr_lead_char;
+    CPU_INT08U    dig_val;
+    CPU_INT08U    lead_char_delta_0;
+    CPU_INT08U    lead_char_delta_a;
+    CPU_BOOLEAN   lead_char_dig;
+    CPU_BOOLEAN   lead_char_0;
+    CPU_BOOLEAN   fmt_valid          = DEF_YES;
+    CPU_BOOLEAN   print_char;
+    CPU_BOOLEAN   nbr_neg_fmtd       = DEF_NO;
+
+
+                                                                /* ---------------- VALIDATE FMT ARGS ----------------- */
+    if (pstr == (CPU_CHAR *)0) {                                /* Rtn NULL if str ptr NULL (see Note #6a).             */
+        return ((CPU_CHAR *)0);
+    }
+
+    if (nbr_dig < 1) {                                          /* If nbr digs = 0, ...                                 */
+        fmt_valid = DEF_NO;                                     /* ... fmt valid str (see Note #6b).                    */
+    }
+                                                                /* If invalid base, ...                                 */
+    if ((nbr_base <  2u) ||
+        (nbr_base > 36u)) {
+        fmt_valid = DEF_NO;                                     /* ... fmt valid str (see Note #6d).                  */
+    }
+
+    if (lead_char != (CPU_CHAR)'\0') {
+        print_char =  ASCII_IsPrint(lead_char);
+        if (print_char != DEF_YES) {                            /* If lead char non-printable (see Note #3a1), ...      */
+            fmt_valid = DEF_NO;                                 /* ... fmt valid str          (see Note #6e).           */
+
+        } else if (lead_char != '0') {                          /* Chk lead char for non-0 nbr base dig.                */
+            lead_char_delta_0 = (CPU_INT08U)(lead_char - '0');
+            if (lower_case != DEF_YES) {
+                lead_char_delta_a = (CPU_INT08U)(lead_char - 'A');
+            } else {
+                lead_char_delta_a = (CPU_INT08U)(lead_char - 'a');
+            }
+
+            lead_char_dig = (((nbr_base <= 10u) &&  (lead_char_delta_0 <  nbr_base))      ||
+                             ((nbr_base >  10u) && ((lead_char_delta_0 <             10u) ||
+                                                    (lead_char_delta_a < (nbr_base - 10u))))) ? DEF_YES : DEF_NO;
+
+            if (lead_char_dig == DEF_YES) {                     /* If lead char non-0 nbr base dig (see Note #3a2A), ...*/
+                fmt_valid = DEF_NO;                             /* ... fmt valid str               (see Note #6e).      */
+            }
+        }
+    }
+
+
+                                                                /* ----------------- PREPARE NBR FMT ------------------ */
+    pstr_fmt    = pstr;
+    lead_char_0 = DEF_NO;
+
+    if (fmt_valid == DEF_YES) {
+        nbr_fmt     = nbr;
+        nbr_log     = nbr;
+        nbr_dig_max = 1u;
+        while (nbr_log >= nbr_base) {                           /* While nbr base digs avail, ...                       */
+            nbr_dig_max++;                                      /* ... calc max nbr digs.                               */
+            nbr_log /= nbr_base;
+        }
+
+        nbr_neg_sign = (nbr_neg == DEF_YES) ? 1u : 0u;
+        if (nbr_dig >= (nbr_dig_max + nbr_neg_sign)) {          /* If req'd nbr digs >= (max nbr digs + neg sign), ...  */
+            nbr_neg_fmtd = DEF_NO;
+            nbr_dig_min  = DEF_MIN(nbr_dig_max, nbr_dig);
+                                                                /* ... calc nbr digs to fmt & nbr lead chars.           */
+            if (lead_char != (CPU_CHAR)'\0') {
+                nbr_dig_fmtd  = nbr_dig;
+                nbr_lead_char = nbr_dig     -
+                               (nbr_dig_min + nbr_neg_sign);
+            } else {
+                nbr_dig_fmtd  = nbr_dig_min + nbr_neg_sign;
+                nbr_lead_char = 0u;
+            }
+
+            if (nbr_lead_char > 0) {                            /* If lead chars to fmt, ...                            */
+                lead_char_0 = (lead_char == '0')                /* ... chk if lead char a '0' dig (see Note #3a2B).     */
+                            ?  DEF_YES : DEF_NO;
+            }
+
+        } else {                                                /* Else if nbr trunc'd, ...                             */
+            fmt_valid = DEF_NO;                                 /* ... fmt valid str (see Note #6c).                    */
+        }
+    }
+
+    if (fmt_valid == DEF_NO) {
+        nbr_dig_fmtd = nbr_dig;
+    }
+
+
+                                                                /* ------------------- FMT NBR STR -------------------- */
+    pstr_fmt += nbr_dig_fmtd;                                   /* Start fmt @ least-sig dig.                           */
+
+    if (nul != DEF_NO) {                                        /* If NOT DISABLED, append NULL char (see Note #4).     */
+       *pstr_fmt = (CPU_CHAR)'\0';
+    }
+    pstr_fmt--;
+
+
+    for (i = 0u; i < nbr_dig_fmtd; i++) {                       /* Fmt str for desired nbr digs :                       */
+        if (fmt_valid == DEF_YES) {
+            if ((nbr_fmt > 0) ||                                /* If fmt nbr > 0                               ...     */
+                (i == 0u)) {                                    /* ... OR on one's  dig to fmt (see Note #3c1), ...     */
+                                                                /* ... calc & fmt dig val;                      ...     */
+                dig_val = (CPU_INT08U)(nbr_fmt % nbr_base);
+                if (dig_val < 10u) {
+                   *pstr_fmt-- = (CPU_CHAR)(dig_val + '0');
+                } else {
+                    if (lower_case !=  DEF_YES) {
+                       *pstr_fmt--  = (CPU_CHAR)((dig_val - 10u) + 'A');
+                    } else {
+                       *pstr_fmt--  = (CPU_CHAR)((dig_val - 10u) + 'a');
+                    }
+                }
+
+                nbr_fmt /= nbr_base;                            /* Shift to next more-sig dig.                          */
+
+            } else if ((nbr_neg      == DEF_YES)  &&            /* ... else if nbr neg             AND          ...     */
+                     (((lead_char_0  == DEF_NO )  &&            /* ... lead char NOT a '0' dig                  ...     */
+                       (nbr_neg_fmtd == DEF_NO )) ||            /* ... but neg sign NOT yet fmt'd  OR           ...     */
+                      ((lead_char_0  != DEF_NO )  &&            /* ... lead char is  a '0' dig                  ...     */
+                       (i == (nbr_dig_fmtd - 1u))))) {          /* ... & on most-sig dig to fmt,                ...     */
+
+               *pstr_fmt--   = '-';                             /* ... prepend neg sign (see Note #3b);         ...     */
+                nbr_neg_fmtd = DEF_YES;
+
+            } else if (lead_char != (CPU_CHAR)'\0') {           /* ... else if avail,                           ...     */
+               *pstr_fmt-- = lead_char;                         /* ... fmt lead char.                                   */
+            }
+
+        } else {                                                /* Else fmt '?' for invalid str (see Note #7).          */
+           *pstr_fmt-- = '?';
+        }
+    }
+
+
+    if (fmt_valid == DEF_NO) {                                /* Rtn NULL for invalid str fmt (see Notes #6a - #6e).  */
+        return ((CPU_CHAR *)0);
+    }
+
+
+    return (pstr);                                              /* Rtn ptr to fmt'd str (see Note #6f).                 */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Str_ParseNbr_Int32()
+*
+* Description : Parse 32-bit integer from string.
+*
+* Argument(s) : pstr            Pointer to string (see Notes #1 & #2a).
+*
+*               pstr_next       Optional pointer to a variable to ... :
+*
+*                                   (a) Return a pointer to first character following the integer string,
+*                                           if NO error(s) [see Note #2a2B2];
+*                                   (b) Return a pointer to 'pstr',
+*                                           otherwise      (see Note #2a2A2).
+*
+*               nbr_base        Base of number to parse (see Notes #2a1B1 & #2a2B1).
+*
+*               nbr_signed      Indicates whether number to parse is signed :
+*
+*                                   DEF_NO                  Number is unsigned.
+*                                   DEF_YES                 Number is   signed.
+*
+*               pnbr_neg        Pointer to a variable to return if the parsed (signed) number is negative :
+*
+*                                   DEF_NO                  Number is non-negative.
+*                                   DEF_YES                 Number is     negative.
+*
+* Return(s)   : Parsed integer,      if integer parsed with NO overflow   (see Note #2a3A).
+*
+*               DEF_INT_32U_MAX_VAL, if integer parsed but     overflowed (see Note #2a3A1).
+*
+*               0,                   otherwise                            (see Note #2a3B).
+*
+* Caller(s)   : Str_ParseNbr_Int32U(),
+*               Str_ParseNbr_Int32S().
+*
+* Note(s)     : (1) String buffer NOT modified.
+*
+*               (2) (a) IEEE Std 1003.1, 2004 Edition, Section 'strtol() : DESCRIPTION' states that "these
+*                       functions shall convert the initial portion of the string pointed to by 'str' ('pstr')
+*                       to a type long ... representation" :
+*
+*                       (1) "First, they decompose the input string into three parts" :
+*
+*                           (A) "An initial, possibly empty, sequence of white-space characters [as specified
+*                                by isspace()]."
+*
+*                               (1) "The subject sequence is defined as the longest initial subsequence of the
+*                                    input string, starting with the first non-white-space character that is of
+*                                    the expected form.  The subject sequence shall contain no characters if the
+*                                    input string is empty or consists entirely of white-space characters."
+*
+*                           (B) (1) "A subject sequence interpreted as an integer represented in some radix
+*                                    determined by the value of 'base' ('nbr_base')" :
+*
+*                                   (a) "If the value of 'base' ('nbr_base') is 0, the expected form of the
+*                                        subject sequence is that of a decimal constant, octal constant, or
+*                                        hexadecimal constant" :
+*
+*                                       (1) "A decimal constant begins with a non-zero digit, and consists of a
+*                                            sequence of decimal digits."
+*
+*                                       (2) "An octal constant consists of the prefix '0' optionally followed by
+*                                            a sequence of the digits '0' to '7' only."
+*
+*                                       (3) "A hexadecimal constant consists of the prefix '0x' or '0X' followed
+*                                            by a sequence of the decimal digits and letters 'a' (or 'A') to 'f'
+*                                            (or 'F') with values 10 to 15 respectively."
+*
+*                                   (b) "If the value of 'base' ('nbr_base') is between 2 and 36, the expected form
+*                                        of the subject sequence is a sequence of letters and digits representing
+*                                        an integer with the radix specified by 'base' ('nbr_base')" :
+*
+*                                       (1) (A) "The letters from 'a' (or 'A') to 'z' (or 'Z') inclusive are
+*                                                ascribed the values 10 to 35"; ...
+*                                           (B) "only letters whose ascribed values are less than that of base
+*                                                are permitted."
+*
+*                                       (2) (A) "If the value of 'base' ('nbr_base') is 16, the characters '0x' or
+*                                               '0X' may optionally precede the sequence of letters and digits."
+*
+*                                           (B) Although NO specification states that "if the value of 'base'
+*                                               ('nbr_base') is" 8, the '0' character "may optionally precede
+*                                               the sequence of letters and digits"; it seems reasonable to
+*                                               allow the '0' character to be optionally parsed.
+*
+*                               (2) "A subject sequence .... may be preceded by a '+' or '-' sign."
+*
+*                                   (a) It does NOT seem reasonable to parse & convert a negative number
+*                                       integer string into an unsigned integer.  However, a negative sign
+*                                       for an unsigned integer will automatically be parsed as an invalid
+*                                       character (see Note #2aC1).
+*
+*                           (C) (1) (a) "A final string of one or more unrecognized characters,"  ...
+*                                   (b) "including the terminating null byte of the input string" ...
+*                               (2) "other than a sign or a permissible letter or digit."
+*
+*                       (2) Second, "they shall attempt to convert the subject sequence to an integer" :
+*
+*                           (A) "If the subject sequence is empty or does not have the expected form" :
+*
+*                               (1) "no conversion is performed"; ...
+*                               (2) "the value of 'str' ('pstr') is stored in the object pointed to by 'endptr'
+*                                    ('pstr_next'), provided that 'endptr' ('pstr_next') is not a null pointer."
+*
+*                           (B) "If the subject sequence has the expected form" :
+*
+*                               (1) (a) "and the value of 'base' ('nbr_base') is 0, the sequence of characters
+*                                        starting with the first digit shall be interpreted as an integer constant."
+*
+*                                   (b) "and the value of 'base' ('nbr_base') is between 2 and 36, it shall be
+*                                        used as the base for conversion, ascribing to each letter its value as
+*                                        given above" (see Note #2a1B1b1A).
+*
+*                               (2) "A pointer to the final string shall be stored in the object pointed to by
+*                                   'endptr' ('pstr_next'), provided that 'endptr' ('pstr_next') is not a null
+*                                   pointer."
+*
+*                       (3) Lastly, IEEE Std 1003.1, 2004 Edition, Section 'strtol() : RETURN VALUE' states that :
+*
+*                           (A) "Upon successful completion, these functions shall return the converted value."
+*                               (1) "If the correct value is outside the range of representable values, {LONG_MIN}
+*                                    [or] {LONG_MAX} ... shall be returned."
+*
+*                           (B) "If no conversion could be performed, 0 shall be returned."
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'strtoul() : ERRORS' states that "these functions
+*                           shall fail if" :
+*
+*                           (A) "[EINVAL] - The value of 'base' ('nbr_base') is not supported."
+*
+*                           (B) "[ERANGE] - The value to be returned is not representable."
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'strtoul() : ERRORS' states that "these functions
+*                           may fail if" :
+*
+*                           (A) "[EINVAL] - No conversion could be performed."
+*
+*               (3) Return integer value & next string pointer should be used to diagnose parse success or failure :
+*
+*                   (a) Valid parse string integer :
+*
+*                           pstr      = "     ABCDE xyz"
+*                           nbr_base  = 16
+*
+*                           nbr       = 703710
+*                           pstr_next = " xyz"
+*
+*
+*                   (b) Invalid parse string integer :
+*
+*                           pstr      = "     ABCDE"
+*                           nbr_base  = 10
+*
+*                           nbr       =  0
+*                           pstr_next = pstr = "     ABCDE"
+*
+*
+*                   (c) Valid hexadecimal parse string integer :
+*
+*                           pstr      = "     0xGABCDE"
+*                           nbr_base  = 16
+*
+*                           nbr       =  0
+*                           pstr_next = "xGABCDE"
+*
+*
+*                   (d) Valid decimal parse string integer ('0x' prefix ignored
+*                               following invalid hexadecimal characters) :
+*
+*                           pstr      = "     0xGABCDE"
+*                           nbr_base  =  0
+*
+*                           nbr       =  0
+*                           pstr_next = "xGABCDE"
+*
+*
+*                   (e) Valid decimal parse string integer ('0'  prefix ignored
+*                               following invalid octal       characters) :
+*
+*                           pstr      = "     0GABCDE"
+*                           nbr_base  =  0
+*
+*                           nbr       =  0
+*                           pstr_next = "GABCDE"
+*
+*
+*                   (f) Parse string integer overflow :
+*
+*                           pstr      = "   12345678901234567890*123456"
+*                           nbr_base  = 10
+*
+*                           nbr       = DEF_INT_32U_MAX_VAL
+*                           pstr_next = "*123456"
+*
+*
+*                   (g) Parse string integer underflow :
+*
+*                           pstr      = "  -12345678901234567890*123456"
+*                           nbr_base  = 10
+*
+*                           nbr       = DEF_INT_32S_MIN_VAL
+*                           pstr_next = "*123456"
+*
+*
+*               (4) String parse terminates when :
+*
+*                   (a) Base passed an invalid base (see Note #2a1B1b).
+*                       (1) No conversion performed; 0 returned.
+*
+*                   (b) (1) Parse string passed a NULL pointer OR empty integer sequence (see Note #2a2A).
+*                           (A) No conversion performed; 0 returned.
+*
+*                       (2) Invalid parse string character found (see Note #2a1C).
+*                           (A) Parsed integer returned.
+*                           (B) 'pstr_next' points to invalid character.
+*
+*                       (3) Entire  parse string converted (see Note #2a2B).
+*                           (A) Parsed integer returned.
+*                           (B) 'pstr_next' points to terminating NULL character.
+*
+*               (5) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  Str_ParseNbr_Int32 (const  CPU_CHAR      *pstr,
+                                               CPU_CHAR     **pstr_next,
+                                               CPU_INT08U     nbr_base,
+                                               CPU_BOOLEAN    nbr_signed,
+                                               CPU_BOOLEAN   *pnbr_neg)
+{
+    const  CPU_CHAR     *pstr_parse;
+    const  CPU_CHAR     *pstr_parse_nbr;
+           CPU_CHAR     *pstr_parse_unused;
+           CPU_CHAR      parse_char;
+           CPU_INT08U    parse_dig;
+           CPU_INT32U    nbr;
+           CPU_BOOLEAN   nbr_neg_unused;
+           CPU_BOOLEAN   nbr_dig;
+           CPU_BOOLEAN   nbr_alpha;
+           CPU_BOOLEAN   nbr_hex;
+           CPU_BOOLEAN   nbr_hex_lower;
+           CPU_BOOLEAN   whitespace;
+           CPU_BOOLEAN   neg;
+           CPU_BOOLEAN   ovf;
+           CPU_BOOLEAN   done;
+
+                                                                /* --------------- VALIDATE PARSE ARGS ---------------- */
+    if (pstr_next == (CPU_CHAR **) 0) {                         /* If NOT avail, ...                                    */
+        pstr_next  = (CPU_CHAR **)&pstr_parse_unused;           /* ... re-cfg NULL rtn ptr to unused local var.         */
+       (void)&pstr_parse_unused;                                /* Prevent possible 'variable unused' warning.          */
+    }
+   *pstr_next = (CPU_CHAR *)pstr;                               /* Init rtn str for err (see Note #5).                  */
+
+    if (pnbr_neg == (CPU_BOOLEAN *) 0) {                        /* If NOT avail, ...                                    */
+        pnbr_neg  = (CPU_BOOLEAN *)&nbr_neg_unused;             /* ... re-cfg NULL rtn ptr to unused local var.         */
+       (void)&nbr_neg_unused;                                   /* Prevent possible 'variable unused' warning.          */
+    }
+   *pnbr_neg = DEF_NO;                                          /* Init nbr neg for err (see Note #5).                  */
+
+
+    if (pstr == (CPU_CHAR *)0) {                                /* Rtn zero if str ptr NULL (see Note #4b1).            */
+        return (0u);
+    }
+                                                                /* Rtn zero if invalid base (see Note #4a).             */
+    if ((nbr_base == 1u) ||
+        (nbr_base > 36u)) {
+        return (0u);
+    }
+
+
+                                                                /* ------------- IGNORE PRECEDING CHAR(S) ------------- */
+    pstr_parse = pstr;                                          /* Save ptr to init'l str for err (see Note #2a2A2).    */
+
+    whitespace = ASCII_IsSpace(*pstr_parse);
+    while (whitespace == DEF_YES) {                             /* Ignore initial white-space char(s) [see Note #2a1A]. */
+        pstr_parse++;
+        whitespace = ASCII_IsSpace(*pstr_parse);
+    }
+
+    switch (*pstr_parse) {
+        case '+':                                               /* Ignore   pos sign (see Note #2a1B2).                 */
+             pstr_parse++;
+             neg = DEF_NO;
+             break;
+
+
+        case '-':                                               /* Validate neg sign (see Note #2a1B2a).                */
+             if (nbr_signed == DEF_YES) {
+                 pstr_parse++;
+             }
+             neg = DEF_YES;
+             break;
+
+
+        default:
+             neg = DEF_NO;
+             break;
+    }
+
+
+                                                                /* --------- IGNORE NBR BASE PRECEDING CHAR(S) -------- */
+    pstr_parse_nbr = pstr_parse;                                /* Save ptr to str's nbr (see Note #2a1A1).             */
+
+    switch (nbr_base) {
+        case  0u:                                               /* Determine unspecified nbr base (see Notes #2a1B1a).  */
+             if (*pstr_parse == '0') {                          /* If avail, ...                                        */
+                  pstr_parse++;                                 /* ... adv past '0'  prefix (see Note #2a1B1b2).        */
+                  switch (*pstr_parse) {
+                      case 'x':                                 /* For '0x' prefix, ...                                 */
+                      case 'X':
+                           nbr_base   = 16u;                    /* ... set nbr base = 16    (see Note #2a1B1a3).        */
+                           parse_char = (CPU_CHAR)(*(pstr_parse + 1));
+                           nbr_hex    =  ASCII_IsDigHex(parse_char);
+                           if (nbr_hex == DEF_YES) {            /* If next char is valid hex dig, ...                   */
+                               pstr_parse++;                    /* ... adv past '0x' prefix (see Note #2a1B1b2A).       */
+                           }
+                           break;
+
+
+                      default:                                  /* For '0'  prefix, ...                                 */
+                           nbr_base =  8u;                      /* ... set nbr base =  8    (see Note #2a1B1a2).        */
+                           break;
+                  }
+
+             } else {                                           /* For non-'0' prefix, ...                              */
+                 nbr_base = 10u;                                /* ... set nbr base = 10    (see Note #2a1B1a1).        */
+             }
+             break;
+
+
+        case  8u:                                               /* See Note #2a1B1a2.                                   */
+             if (*pstr_parse == '0') {                          /* If avail, ...                                        */
+                  pstr_parse++;                                 /* ... adv past '0'  prefix (see Note #2a1B1b2B).       */
+             }
+             break;
+
+
+        case 16u:                                               /* See Note #2a1B1a3.                                   */
+             if (*pstr_parse == '0') {                          /* If avail, ...                                        */
+                  pstr_parse++;                                 /* ... adv past '0'  prefix (see Note #2a1B1b2).        */
+                  switch (*pstr_parse) {
+                      case 'x':
+                      case 'X':
+                           parse_char = (CPU_CHAR)(*(pstr_parse + 1));
+                           nbr_hex    =  ASCII_IsDigHex(parse_char);
+                           if (nbr_hex == DEF_YES) {            /* If next char is valid hex dig, ...                   */
+                               pstr_parse++;                    /* ... adv past '0x' prefix (see Note #2a1B1b2A).       */
+                           }
+                           break;
+
+
+                      default:
+                           break;
+                  }
+             }
+             break;
+
+
+        default:                                                /* See Note #2a1B1b.                                    */
+             break;
+    }
+
+
+                                                                /* ------------------ PARSE INT STR ------------------- */
+    nbr  = 0u;
+    ovf  = DEF_NO;
+    done = DEF_NO;
+
+    while (done == DEF_NO) {                                    /* Parse str for desired nbr base digs (see Note #2a2). */
+        parse_char = (CPU_CHAR)*pstr_parse;
+        nbr_alpha  =  ASCII_IsAlphaNum(parse_char);
+        if (nbr_alpha == DEF_YES) {                             /* If valid alpha num nbr dig avail, ...                */
+                                                                /* ... convert parse char into nbr dig.                 */
+            nbr_dig = ASCII_IsDig(parse_char);
+            if (nbr_dig == DEF_YES) {
+                parse_dig = (CPU_INT08U)(parse_char - '0');
+            } else {
+                nbr_hex_lower = ASCII_IsLower(parse_char);
+                if (nbr_hex_lower == DEF_YES) {
+                    parse_dig = ((CPU_INT08U)(parse_char - 'a') + 10u);
+                } else {
+                    parse_dig = ((CPU_INT08U)(parse_char - 'A') + 10u);
+                }
+            }
+
+            if (parse_dig < nbr_base) {                         /* If parse char valid for nbr base ...                 */
+                if (ovf == DEF_NO) {                            /* ... & nbr NOT yet ovf'd,         ...                 */
+                    if (nbr <= Str_MultOvfThTbl_Int32U[nbr_base]) {
+                                                                /* ... merge parse char dig into nbr.                   */
+                        nbr *= nbr_base;
+                        nbr += parse_dig;
+                        if (nbr < parse_dig) {
+                            ovf = DEF_YES;
+                        }
+                    } else {
+                        ovf = DEF_YES;
+                    }
+                }
+                pstr_parse++;
+
+            } else {                                            /* Invalid         char parsed (see Note #2a1C1a).      */
+                done = DEF_YES;
+            }
+
+        } else {                                                /* Invalid OR NULL char parsed (see Note #2a1C1).       */
+            done = DEF_YES;
+        }
+    }
+
+    if (ovf == DEF_YES) {                                       /* If nbr ovf'd, ...                                    */
+        nbr  = DEF_INT_32U_MAX_VAL;                             /* ... rtn max int val (see Note #2a3A1).               */
+    }
+
+
+    if (pstr_parse !=             pstr_parse_nbr) {             /* If final parse str != init'l parse nbr str,       .. */
+       *pstr_next   = (CPU_CHAR *)pstr_parse;                   /* .. rtn   parse str's next char (see Note #2a2B2); .. */
+    } else {
+       *pstr_next   = (CPU_CHAR *)pstr;                         /* .. else rtn initial parse str  (see Note #2a2A2).    */
+    }
+
+   *pnbr_neg = neg;                                             /* Rtn neg nbr status.                                  */
+
+
+    return (nbr);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/lib_str.h b/src/ucos_v1_42/micrium_source/uC-LIB/lib_str.h
new file mode 100644
index 0000000..538b67b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/lib_str.h
@@ -0,0 +1,429 @@
+/*
+*********************************************************************************************************
+*                                                uC/LIB
+*                                        CUSTOM LIBRARY MODULES
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/LIB is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       ASCII STRING MANAGEMENT
+*
+* Filename      : lib_str.h
+* Version       : V1.38.01
+* Programmer(s) : ITJ
+*                 JDH
+*********************************************************************************************************
+* Note(s)       : (1) NO compiler-supplied standard library functions are used in library or product software.
+*
+*                     (a) ALL standard library functions are implemented in the custom library modules :
+*
+*                         (1) \\lib_*.*
+*
+*                         (2) \\Ports\\\lib*_a.*
+*
+*                               where
+*                                             directory path for custom library software
+*                                                                  directory name for specific processor (CPU)
+*                                                             directory name for specific compiler
+*
+*                     (b) Product-specific library functions are implemented in individual products.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This string library header file is protected from multiple pre-processor inclusion through
+*               use of the string library module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  LIB_STR_MODULE_PRESENT                                 /* See Note #1.                                         */
+#define  LIB_STR_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                 ASCII STRING CONFIGURATION DEFINES
+*
+* Note(s) : (1) Some ASCII string configuration #define's MUST be available PRIOR to including any
+*               application configuration (see 'INCLUDE FILES  Note #1a').
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    STRING FLOATING POINT DEFINES
+*
+* Note(s) : (1) (a) (1) The maximum accuracy for 32-bit floating-point numbers :
+*
+*
+*                             Maximum Accuracy            log [Internal-Base ^ (Number-Internal-Base-Digits)]
+*                       32-bit Floating-point Number  =  -----------------------------------------------------
+*                                                                         log [External-Base]
+*
+*                                                         log [2 ^ 24]
+*                                                     =  --------------
+*                                                           log [10]
+*
+*                                                     <  7.225  Base-10 Digits
+*
+*                           where
+*                                   Internal-Base                   Internal number base of floating-
+*                                                                       point numbers (i.e.  2)
+*                                   External-Base                   External number base of floating-
+*                                                                       point numbers (i.e. 10)
+*                                   Number-Internal-Base-Digits     Number of internal number base
+*                                                                       significant digits (i.e. 24)
+*
+*                   (2) Also, since some 32-bit floating-point calculations are converted to 32-bit
+*                       unsigned numbers, the maximum accuracy is limited to the maximum accuracy
+*                       for 32-bit unsigned numbers of 9 digits.
+*
+*               (b) Some CPUs' &/or compilers' floating-point implementations MAY further reduce the
+*                   maximum accuracy.
+*********************************************************************************************************
+*/
+
+#define  LIB_STR_FP_MAX_NBR_DIG_SIG_MIN                    1u
+#define  LIB_STR_FP_MAX_NBR_DIG_SIG_MAX                    9u   /* See Note #1a2.                                       */
+#define  LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT                   7u   /* See Note #1a1.                                       */
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The custom library software files are located in the following directories :
+*
+*               (a) \\lib_cfg.h
+*
+*               (b) \\lib_*.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                     directory path for custom library software
+*
+*           (2) CPU-configuration  software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) '\\' directory                            See Note #1b
+*
+*               (c) (1) '\\'                  directory         See Note #2a
+*                   (2) '\\\\' directory         See Note #2b
+*
+*           (4) NO compiler-supplied standard library functions SHOULD be used.
+*
+*               #### The reference to standard library header files SHOULD be removed once all custom
+*               library functions are implemented WITHOUT reference to ANY standard library function(s).
+*
+*               See also 'STANDARD LIBRARY MACRO'S  Note #1'.
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  
+
+#if 0                                                           /* See Note #4.                                         */
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   LIB_STR_MODULE
+#define  LIB_STR_EXT
+#else
+#define  LIB_STR_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                 STRING FLOATING POINT CONFIGURATION
+*
+* Note(s) : (1) Configure LIB_STR_CFG_FP_EN to enable/disable floating point string function(s).
+*
+*           (2) Configure LIB_STR_CFG_FP_MAX_NBR_DIG_SIG to configure the maximum number of significant
+*               digits to calculate &/or display for floating point string function(s).
+*
+*               See also 'STRING FLOATING POINT DEFINES  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                                /* Configure floating point feature(s) [see Note #1] :  */
+#ifndef  LIB_STR_CFG_FP_EN
+#define  LIB_STR_CFG_FP_EN                      DEF_DISABLED
+                                                                /*   DEF_DISABLED     Floating point functions DISABLED */
+                                                                /*   DEF_ENABLED      Floating point functions ENABLED  */
+#endif
+
+                                                                /* Configure floating point feature(s)' number of ...   */
+                                                                /* ... significant digits (see Note #2).                */
+#ifndef  LIB_STR_CFG_FP_MAX_NBR_DIG_SIG
+#define  LIB_STR_CFG_FP_MAX_NBR_DIG_SIG         LIB_STR_FP_MAX_NBR_DIG_SIG_DFLT
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  STR_CR_LF                     "\r\n"
+#define  STR_LF_CR                     "\n\r"
+#define  STR_NEW_LINE                   STR_CR_LF
+#define  STR_PARENT_PATH               ".."
+
+#define  STR_CR_LF_LEN                 (sizeof(STR_CR_LF)       - 1)
+#define  STR_LF_CR_LEN                 (sizeof(STR_LF_CR)       - 1)
+#define  STR_NEW_LINE_LEN              (sizeof(STR_NEW_LINE)    - 1)
+#define  STR_PARENT_PATH_LEN           (sizeof(STR_PARENT_PATH) - 1)
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      STANDARD LIBRARY MACRO'S
+*
+* Note(s) : (1) NO compiler-supplied standard library functions SHOULD be used.
+*
+*               #### The reference to standard memory functions SHOULD be removed once all custom library
+*               functions are implemented WITHOUT reference to ANY standard library function(s).
+*
+*               See also 'INCLUDE FILES  Note #3'.
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #1.                                         */
+#define  Str_FmtPrint                   snprintf
+#define  Str_FmtScan                    sscanf
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ STR LEN  FNCTS ------------------ */
+CPU_SIZE_T   Str_Len            (const  CPU_CHAR      *pstr);
+
+CPU_SIZE_T   Str_Len_N          (const  CPU_CHAR      *pstr,
+                                        CPU_SIZE_T     len_max);
+
+
+                                                                       /* ------------------ STR COPY FNCTS ------------------ */
+CPU_CHAR    *Str_Copy           (       CPU_CHAR      *pstr_dest,
+                                 const  CPU_CHAR      *pstr_src);
+
+CPU_CHAR    *Str_Copy_N         (       CPU_CHAR      *pstr_dest,
+                                 const  CPU_CHAR      *pstr_src,
+                                        CPU_SIZE_T     len_max);
+
+
+CPU_CHAR    *Str_Cat            (       CPU_CHAR      *pstr_dest,
+                                 const  CPU_CHAR      *pstr_cat);
+
+CPU_CHAR    *Str_Cat_N          (       CPU_CHAR      *pstr_dest,
+                                 const  CPU_CHAR      *pstr_cat,
+                                        CPU_SIZE_T     len_max);
+
+
+                                                                       /* ------------------ STR CMP  FNCTS ------------------ */
+CPU_INT16S   Str_Cmp            (const  CPU_CHAR      *p1_str,
+                                 const  CPU_CHAR      *p2_str);
+
+CPU_INT16S   Str_Cmp_N          (const  CPU_CHAR      *p1_str,
+                                 const  CPU_CHAR      *p2_str,
+                                        CPU_SIZE_T     len_max);
+
+CPU_INT16S   Str_CmpIgnoreCase  (const  CPU_CHAR      *p1_str,
+                                 const  CPU_CHAR      *p2_str);
+
+CPU_INT16S   Str_CmpIgnoreCase_N(const  CPU_CHAR      *p1_str,
+                                 const  CPU_CHAR      *p2_str,
+                                        CPU_SIZE_T     len_max);
+
+
+                                                                       /* ------------------ STR SRCH FNCTS ------------------ */
+CPU_CHAR    *Str_Char           (const  CPU_CHAR      *pstr,
+                                        CPU_CHAR       srch_char);
+
+CPU_CHAR    *Str_Char_N         (const  CPU_CHAR      *pstr,
+                                        CPU_SIZE_T     len_max,
+                                        CPU_CHAR       srch_char);
+
+CPU_CHAR    *Str_Char_Last      (const  CPU_CHAR      *pstr,
+                                        CPU_CHAR       srch_char);
+
+CPU_CHAR    *Str_Char_Last_N    (const  CPU_CHAR      *pstr,
+                                        CPU_SIZE_T     len_max,
+                                        CPU_CHAR       srch_char);
+
+CPU_CHAR    *Str_Char_Replace   (       CPU_CHAR      *pstr,
+                                        CPU_CHAR       char_srch,
+                                        CPU_CHAR       char_replace);
+
+CPU_CHAR    *Str_Char_Replace_N (       CPU_CHAR      *pstr,
+                                        CPU_CHAR       char_srch,
+                                        CPU_CHAR       char_replace,
+                                        CPU_SIZE_T     len_max);
+
+CPU_CHAR    *Str_Str            (const  CPU_CHAR      *pstr,
+                                 const  CPU_CHAR      *pstr_srch);
+
+CPU_CHAR    *Str_Str_N          (const  CPU_CHAR      *pstr,
+                                 const  CPU_CHAR      *pstr_srch,
+                                        CPU_SIZE_T     len_max);
+
+
+                                                                       /* ------------------ STR FMT  FNCTS ------------------ */
+CPU_CHAR    *Str_FmtNbr_Int32U  (       CPU_INT32U     nbr,
+                                        CPU_INT08U     nbr_dig,
+                                        CPU_INT08U     nbr_base,
+                                        CPU_CHAR       lead_char,
+                                        CPU_BOOLEAN    lower_case,
+                                        CPU_BOOLEAN    nul,
+                                        CPU_CHAR      *pstr);
+
+CPU_CHAR    *Str_FmtNbr_Int32S  (       CPU_INT32S     nbr,
+                                        CPU_INT08U     nbr_dig,
+                                        CPU_INT08U     nbr_base,
+                                        CPU_CHAR       lead_char,
+                                        CPU_BOOLEAN    lower_case,
+                                        CPU_BOOLEAN    nul,
+                                        CPU_CHAR      *pstr);
+
+#if (LIB_STR_CFG_FP_EN == DEF_ENABLED)
+CPU_CHAR    *Str_FmtNbr_32      (       CPU_FP32       nbr,
+                                        CPU_INT08U     nbr_dig,
+                                        CPU_INT08U     nbr_dp,
+                                        CPU_CHAR       lead_char,
+                                        CPU_BOOLEAN    nul,
+                                        CPU_CHAR      *pstr);
+#endif
+
+
+                                                                       /* ----------------- STR PARSE FNCTS ------------------ */
+CPU_INT32U   Str_ParseNbr_Int32U(const  CPU_CHAR      *pstr,
+                                        CPU_CHAR     **pstr_next,
+                                        CPU_INT08U     nbr_base);
+
+CPU_INT32S   Str_ParseNbr_Int32S(const  CPU_CHAR      *pstr,
+                                        CPU_CHAR     **pstr_next,
+                                        CPU_INT08U     nbr_base);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  LIB_STR_CFG_FP_EN
+#error  "LIB_STR_CFG_FP_EN                     not #define'd in 'lib_cfg.h'"
+#error  "                                [MUST be  DEF_DISABLED]           "
+#error  "                                [     ||  DEF_ENABLED ]           "
+
+#elif  ((LIB_STR_CFG_FP_EN != DEF_DISABLED) && \
+        (LIB_STR_CFG_FP_EN != DEF_ENABLED ))
+#error  "LIB_STR_CFG_FP_EN               illegally #define'd in 'lib_cfg.h'"
+#error  "                                [MUST be  DEF_DISABLED]           "
+#error  "                                [     ||  DEF_ENABLED ]           "
+
+
+#elif   (LIB_STR_CFG_FP_EN == DEF_ENABLED)
+
+#ifndef  LIB_STR_CFG_FP_MAX_NBR_DIG_SIG
+#error  "LIB_STR_CFG_FP_MAX_NBR_DIG_SIG        not #define'd in 'lib_cfg.h'          "
+#error  "                                [MUST be  >= LIB_STR_FP_MAX_NBR_DIG_SIG_MIN]"
+#error  "                                [     &&  <= LIB_STR_FP_MAX_NBR_DIG_SIG_MAX]"
+
+#elif   (DEF_CHK_VAL(LIB_STR_CFG_FP_MAX_NBR_DIG_SIG,          \
+                     LIB_STR_FP_MAX_NBR_DIG_SIG_MIN,          \
+                     LIB_STR_FP_MAX_NBR_DIG_SIG_MAX) != DEF_OK)
+#error  "LIB_STR_CFG_FP_MAX_NBR_DIG_SIG  illegally #define'd in 'lib_cfg.h'          "
+#error  "                                [MUST be  >= LIB_STR_FP_MAX_NBR_DIG_SIG_MIN]"
+#error  "                                [     &&  <= LIB_STR_FP_MAX_NBR_DIG_SIG_MAX]"
+#endif
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'lib_str.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of lib str module include.                       */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-LIB/subdir.mk b/src/ucos_v1_42/micrium_source/uC-LIB/subdir.mk
new file mode 100644
index 0000000..ff9834f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-LIB/subdir.mk
@@ -0,0 +1,4 @@
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_ascii.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_math.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_mem.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-LIB/lib_str.c
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Cfg/Template/mqtt-c_cfg.h b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Cfg/Template/mqtt-c_cfg.h
new file mode 100644
index 0000000..715bf35
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Cfg/Template/mqtt-c_cfg.h
@@ -0,0 +1,83 @@
+/*
+*********************************************************************************************************
+*                                               uC/MQTTc
+*                                Message Queue Telemetry Transport Client
+*
+*                         (c) Copyright 2014-2016; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/MQTTc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MQTT CLIENT CONFIGURATION FILE
+*
+*                                               TEMPLATE
+*
+* Filename      : mqtt-c_cfg.h
+* Version       : V1.00.01
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         CONFIGURATION DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            ARG CHK DEFINE
+*********************************************************************************************************
+*/
+                                                                /* Enable to add extra checks on ext vars.              */
+#define  MQTTc_CFG_ARG_CHK_EXT_EN               DEF_DISABLED
+
+
+/*
+*********************************************************************************************************
+*                                              DBG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- TRACE DEFINES ------------------ */
+                                                                /* Set trace to function to output trace data.          */
+#define  MQTTc_CFG_DBG_TRACE                    /*printf*/
+                                                                /* Set trace level to higher than OFF, to obtain data.  */
+#define  MQTTc_CFG_DBG_TRACE_LEVEL              TRACE_LEVEL_OFF
+
+                                                                /* -------------- GLOBAL DBG BUF DEFINES -------------- */
+                                                                /* Enables dbg buf where data is copied at checkpoints. */
+#define  MQTTc_CFG_DBG_GLOBAL_BUF_EN            DEF_DISABLED
+                                                                /* Size of dbg buf.                                     */
+#define  MQTTc_CFG_DBG_GLOBAL_BUF_LEN                   512u
+
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c.h b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c.h
new file mode 100644
index 0000000..9590478
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c.h
@@ -0,0 +1,124 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           MQTTc APPLICATION
+*
+* Filename      : app_mqtt-c.h
+* Version       : V1.00
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  MQTTc_APP_MODULE_PRESENT
+#define  MQTTc_APP_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            BROKER DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* Broker's host name or IP address.                    */
+                                                                /* TODO : Specifiy address/name of the broker.          */
+#define  APP_MQTTc_BROKER_NAME                      "broker.mqttdashboard.com"
+
+                                                                /* Username from MQTT server portal, if any.            */
+                                                                /* TODO : Specify your own username.                    */
+#define  APP_MQTTc_USERNAME                         "user@domain.org"
+                                                                /* Password or MD5 hash of your password.               */
+#define  APP_MQTTc_PASSWORD                         "password"  /* TODO : Specify your own password.                    */
+
+#define  APP_MQTTc_CLIENT_ID_NAME                   "App_MQTT_TestClientID"
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL TASK DEFINES
+*********************************************************************************************************
+*/
+
+#define  APP_MQTTc_TASK_STK_SIZE                2048u
+#define  APP_MQTTc_TASK_PRIO                       8u
+
+#define  APP_MQTTc_INTERNAL_TASK_DLY               0u
+
+
+/*
+*********************************************************************************************************
+*                                            SOCKET DEFINES
+*********************************************************************************************************
+*/
+
+#define  APP_MQTTc_INACTIVITY_TIMEOUT_s           30u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppMQTTc_Init (void);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* MQTTc_APP_MODULE_PRESENT  */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_echo.c b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_echo.c
new file mode 100644
index 0000000..fc78039
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_echo.c
@@ -0,0 +1,584 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           MQTTc APPLICATION
+*
+* Filename      : app_mqtt-c_echo.c
+* Version       : V1.00
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    APP_MQTTc_ECHO_MODULE
+
+#include  
+#include  
+
+#include  "app_mqtt-c.h"
+
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  APP_MQTTc_MSG_QTY                         3u
+#define  APP_MQTTc_MSG_LEN_MAX                  1024u
+
+#define  APP_MQTTc_DOMAIN_PUBLISH_STATUS            "domain/status"
+#define  APP_MQTTc_DOMAIN_PUBLISH_STATUS_QoS       2u
+
+#define  APP_MQTTc_DOMAIN_PUBLISH_ECHO              "domain/echo"
+#define  APP_MQTTc_DOMAIN_PUBLISH_ECHO_QoS         0u
+
+#define  APP_MQTTc_DOMAIN_SUBSCRIBE_LISTEN          "domain/listen"
+#define  APP_MQTTc_DOMAIN_SUBSCRIBE_LISTEN_QoS     1u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U   AppMQTTc_TaskStk[APP_MQTTc_TASK_STK_SIZE];
+
+static  MQTTc_CONN   AppMQTTc_Conn;
+static  MQTTc_MSG    AppMQTTc_StatusMsg;
+static  MQTTc_MSG    AppMQTTc_EchoMsg;
+static  MQTTc_MSG    AppMQTTc_ListenRxMsg;
+static  CPU_INT08U   AppMQTTc_BufTbl[APP_MQTTc_MSG_QTY][APP_MQTTc_MSG_LEN_MAX];
+
+static  CPU_BOOLEAN  App_MQTTc_StatusMsgIsAvail;
+static  CPU_BOOLEAN  App_MQTTc_EchoMsgIsAvail;
+
+
+const  NET_TASK_CFG  AppMQTTc_TaskCfg = {                       /* Cfg for MQTTc internal task.                         */
+    APP_MQTTc_TASK_PRIO,                                        /* MQTTc internal task prio.                            */
+    APP_MQTTc_TASK_STK_SIZE,                                    /* MQTTc internal task stack size.                      */
+    AppMQTTc_TaskStk                                            /* Ptr to start of MQTTc internal stack.                */
+};
+
+
+const  MQTTc_CFG     AppMQTTc_Cfg = {
+    APP_MQTTc_MSG_QTY,
+    APP_MQTTc_INACTIVITY_TIMEOUT_s,
+    APP_MQTTc_INTERNAL_TASK_DLY
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnCmplCallbackFnct         (       MQTTc_CONN  *p_conn,
+                                                          MQTTc_MSG   *p_msg,
+                                                          void        *p_arg,
+                                                          MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnConnectCmplCallbackFnct  (       MQTTc_CONN  *p_conn,
+                                                          MQTTc_MSG   *p_msg,
+                                                          void        *p_arg,
+                                                          MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnPublishCmplCallbackFnct  (       MQTTc_CONN  *p_conn,
+                                                          MQTTc_MSG   *p_msg,
+                                                          void        *p_arg,
+                                                          MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnSubscribeCmplCallbackFnct(       MQTTc_CONN  *p_conn,
+                                                             MQTTc_MSG   *p_msg,
+                                                             void        *p_arg,
+                                                             MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnPublishRxCallbackFnct    (       MQTTc_CONN  *p_conn,
+                                                   const  CPU_CHAR    *topic_name_str,
+                                                          CPU_INT32U   topic_len,
+                                                   const  CPU_CHAR    *message_str,
+                                                          void        *p_arg,
+                                                          MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnErrCallbackFnct          (       MQTTc_CONN  *p_conn,
+                                                          void        *p_arg,
+                                                          MQTTc_ERR    err);
+
+
+/*
+*********************************************************************************************************
+*                                            AppMQTTc_Init()
+*
+* Description : Initialize the MQTT-client module.
+*
+* Arguments   : none.
+*
+* Return(s)   : DEF_OK,   if NO error(s),
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppMQTTc_Init (void)
+{
+    MQTTc_ERR  err_mqttc;
+
+
+    App_MQTTc_StatusMsgIsAvail = DEF_YES;
+    App_MQTTc_EchoMsgIsAvail   = DEF_YES;
+
+    MQTTc_Init(&AppMQTTc_Cfg,
+               &AppMQTTc_TaskCfg,
+                DEF_NULL,
+               &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Failed to init MQTTc module. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgClr(&AppMQTTc_StatusMsg, &err_mqttc);
+    MQTTc_MsgSetParam(&AppMQTTc_StatusMsg, MQTTc_PARAM_TYPE_MSG_BUF_PTR, (void *)&AppMQTTc_BufTbl[0u],   &err_mqttc);
+    MQTTc_MsgSetParam(&AppMQTTc_StatusMsg, MQTTc_PARAM_TYPE_MSG_BUF_LEN, (void *) APP_MQTTc_MSG_LEN_MAX, &err_mqttc);
+
+    MQTTc_MsgClr(&AppMQTTc_EchoMsg, &err_mqttc);
+    MQTTc_MsgSetParam(&AppMQTTc_EchoMsg, MQTTc_PARAM_TYPE_MSG_BUF_PTR, (void *)&AppMQTTc_BufTbl[1u],   &err_mqttc);
+    MQTTc_MsgSetParam(&AppMQTTc_EchoMsg, MQTTc_PARAM_TYPE_MSG_BUF_LEN, (void *) APP_MQTTc_MSG_LEN_MAX, &err_mqttc);
+
+    MQTTc_MsgClr(&AppMQTTc_ListenRxMsg, &err_mqttc);
+    MQTTc_MsgSetParam(&AppMQTTc_ListenRxMsg, MQTTc_PARAM_TYPE_MSG_BUF_PTR, (void *)&AppMQTTc_BufTbl[2u],   &err_mqttc);
+    MQTTc_MsgSetParam(&AppMQTTc_ListenRxMsg, MQTTc_PARAM_TYPE_MSG_BUF_LEN, (void *) APP_MQTTc_MSG_LEN_MAX, &err_mqttc);
+
+
+    MQTTc_ConnClr(&AppMQTTc_Conn,
+                  &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Failed to clr MQTTc connection object. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+                                                                /* Err handling should be done, in your application.    */
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_BROKER_NAME,                  (void *) APP_MQTTc_BROKER_NAME,                  &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CLIENT_ID_STR,                (void *)"App_MQTT_TestClientID",                 &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_USERNAME_STR,                 (void *) APP_MQTTc_USERNAME,                     &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_PASSWORD_STR,                 (void *) APP_MQTTc_PASSWORD,                     &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_KEEP_ALIVE_TMR_SEC,           (void *) 1000u,                                  &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_COMPL,            (void *) AppMQTTc_OnCmplCallbackFnct,            &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_CONNECT_CMPL,     (void *) AppMQTTc_OnConnectCmplCallbackFnct,     &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_PUBLISH_CMPL,     (void *) AppMQTTc_OnPublishCmplCallbackFnct,     &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_SUBSCRIBE_CMPL,   (void *) AppMQTTc_OnSubscribeCmplCallbackFnct,   &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_PUBLISH_RX,       (void *) AppMQTTc_OnPublishRxCallbackFnct,       &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_ERR_CALLBACK,     (void *) AppMQTTc_OnErrCallbackFnct,             &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_TIMEOUT_MS,                   (void *) 30000u,                                 &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_PUBLISH_RX_MSG_PTR,           (void *)&AppMQTTc_ListenRxMsg,                   &err_mqttc);
+
+    printf("Done setting params.\r\n");
+
+    MQTTc_ConnOpen(&AppMQTTc_Conn,                              /* Open conn to MQTT server with parameters set in Conn.*/
+                    MQTTc_FLAGS_NONE,
+                   &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Failed to open TCP connection to MQTT server. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);                                      /* Failed to open TCP connection to MQTT server.        */
+    }
+    printf("Done opening conn.\r\n");
+
+    App_MQTTc_StatusMsgIsAvail = DEF_NO;
+    MQTTc_Connect(&AppMQTTc_Conn,                               /* Send CONNECT msg to MQTT server.                     */
+                  &AppMQTTc_StatusMsg,
+                  &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Failed to process Connect msg req. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);                                      /* Failed to process MQTT CONNECT msg.                  */
+    }
+    printf("Done calling MQTTc_Connect().\r\n");
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppMQTTc_OnCmplCallbackFnct()
+*
+* Description : Generic callback function for MQTTc module.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                           MQTTc_MSG   *p_msg,
+                                           void        *p_arg,
+                                           MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("Operation completed with err (%i). ", err);
+    }
+
+    switch (p_msg->Type) {
+        case MQTTc_MSG_TYPE_CONNECT:                            /* Gen callback called for event type: Connect Cmpl.    */
+             printf("Gen callback called for event type: Connect Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_PUBLISH:                            /* Gen callback called for event type: Publish Cmpl.    */
+             printf("Gen callback called for event type: Publish Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_SUBSCRIBE:                          /* Gen callback called for event type: Subscribe Cmpl.  */
+             printf("Gen callback called for event type: Subscribe Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_UNSUBSCRIBE:                        /* Gen callback called for event type: Unsubscribe Cmpl.*/
+             printf("Gen callback called for event type: Unsubscribe Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_PINGREQ:                            /* Gen callback called for event type: PingReq Cmpl.    */
+             printf("Gen callback called for event type: PingReq Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_DISCONNECT:                         /* Gen callback called for event type: Disconnect Cmpl. */
+             printf("Gen callback called for event type: Disconnect Cmpl.\n\r");
+             break;
+
+
+        default:
+             printf("Gen callback called for event type: default. !!! ERROR !!! %i\n\r", p_msg->Type);
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                 AppMQTTc_OnConnectCmplCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when a CONNECT operation has completed.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing CONNECT message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnConnectCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                                  MQTTc_MSG   *p_msg,
+                                                  void        *p_arg,
+                                                  MQTTc_ERR    err)
+{
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("ConnectCmpl callback called with err (%i).\n\r", err);
+    } else {
+        printf("ConnectCmpl callback called without err, ready to send/receive messages.\n\r");
+
+        MQTTc_Subscribe(p_conn,
+                        p_msg,                                  /* Re-using msg used by completed CONNECT msg.          */
+                        APP_MQTTc_DOMAIN_SUBSCRIBE_LISTEN,
+                        APP_MQTTc_DOMAIN_SUBSCRIBE_LISTEN_QoS,
+                       &err);
+        if (err != MQTTc_ERR_NONE) {
+            printf("!!! APP ERROR !!! Subscribe failed. Err: %i\n\r.", err);
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                 AppMQTTc_OnPublishCmplCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when a PUBLISH operation has completed.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing PUBLISH message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnPublishCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                                  MQTTc_MSG   *p_msg,
+                                                  void        *p_arg,
+                                                  MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("PublishCmpl callback called with error (%i). CANNOT continue.\n\r", err);
+    } else {
+        if (p_msg == &AppMQTTc_StatusMsg) {
+            printf("PublishCmpl callback called for status. Marking message as available.\n\r");
+            App_MQTTc_StatusMsgIsAvail = DEF_YES;               /* Mark msg as re-available.                            */
+        } else {
+            printf("PublishCmpl callback called for status. Marking message as available.\n\r");
+            App_MQTTc_EchoMsgIsAvail = DEF_YES;                 /* Mark msg as re-available.                            */
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                AppMQTTc_OnSubscribeCmplCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when a SUBSCRIBE operation has completed.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing SUBSCRIBE message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnSubscribeCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                                    MQTTc_MSG   *p_msg,
+                                                    void        *p_arg,
+                                                    MQTTc_ERR    err)
+{
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("SubscribeCmpl callback called with error (%i). CANNOT continue.\n\r", err);
+    } else {
+        printf("SubscribeCmpl callback called. Publishing status.\n\r");
+
+        MQTTc_Publish(p_conn,
+                      p_msg,                                    /* Re-using msg used by completed SUBSCRIBE msg.        */
+                      APP_MQTTc_DOMAIN_PUBLISH_STATUS,
+                      APP_MQTTc_DOMAIN_PUBLISH_STATUS_QoS,
+                      DEF_NO,
+                     "Now listening on specified topic.",
+                     &err);
+        if (err != MQTTc_ERR_NONE) {
+            printf("!!! APP ERROR !!! Failed to Publish Status. Err: %i\n\r.", err);
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                  AppMQTTc_OnPublishRxCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when a PUBLISH message has been received.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               topic_name_str  String containing the topic of the message received. NOT NULL-terminated.
+*
+*               topic_len       Length of the topic.
+*
+*               message_str     NULL-terminated string containing the message received.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnPublishRxCallbackFnct (       MQTTc_CONN  *p_conn,
+                                                const  CPU_CHAR    *topic_name_str,
+                                                       CPU_INT32U   topic_len,
+                                                const  CPU_CHAR    *message_str,
+                                                       void        *p_arg,
+                                                       MQTTc_ERR    err)
+{
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Err detected when receiving a PUBLISH message (%i). NOT echoing.\n\r", err);
+        return;
+    }
+
+    printf("Received PUBLISH message from server. Topic is %.*s.", topic_len, topic_name_str);
+    printf(" Message is %s.\n\r", message_str);
+
+    if (App_MQTTc_EchoMsgIsAvail == DEF_YES) {
+        App_MQTTc_EchoMsgIsAvail = DEF_NO;
+        MQTTc_Publish(p_conn,
+                     &AppMQTTc_EchoMsg,
+                      APP_MQTTc_DOMAIN_PUBLISH_STATUS,
+                      APP_MQTTc_DOMAIN_PUBLISH_STATUS_QoS,
+                      DEF_NO,
+                      message_str,
+                     &err);
+        if (err != MQTTc_ERR_NONE) {
+            printf("!!! APP ERROR !!! Failed to Echo received message. Err: %i\n\r.", err);
+        }
+    } else if (App_MQTTc_StatusMsgIsAvail == DEF_YES) {
+        App_MQTTc_StatusMsgIsAvail = DEF_NO;
+        MQTTc_Publish(p_conn,
+                     &AppMQTTc_StatusMsg,
+                      APP_MQTTc_DOMAIN_PUBLISH_STATUS,
+                      APP_MQTTc_DOMAIN_PUBLISH_STATUS_QoS,
+                      DEF_NO,
+                     "Unable to send echo msg: msg unavailable.",
+                     &err);
+        if (err != MQTTc_ERR_NONE) {
+            printf("!!! APP ERROR !!! Failed to Publish Status. Err: %i\n\r.", err);
+        }
+    } else {
+        printf("!!! APP ERROR !!! Echo and Status messages are both unavailable. Cannot send either Echo or Status to broker.\r\n");
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppMQTTc_OnErrCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when an error occurs.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object on which error occurred.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnErrCallbackFnct (MQTTc_CONN  *p_conn,
+                                          void        *p_arg,
+                                          MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_arg;
+
+    printf("!!! APP ERROR !!! Err detected via OnErr callback. Err = %i.", err);
+
+    if (App_MQTTc_StatusMsgIsAvail == DEF_YES) {
+        App_MQTTc_StatusMsgIsAvail = DEF_NO;
+
+        printf("Sending status.\r\n");
+        MQTTc_Publish(p_conn,
+                     &AppMQTTc_StatusMsg,
+                      APP_MQTTc_DOMAIN_PUBLISH_STATUS,
+                      APP_MQTTc_DOMAIN_PUBLISH_STATUS_QoS,
+                      DEF_NO,
+                     "Err detected.",
+                     &err);
+        if (err != MQTTc_ERR_NONE) {
+            printf("!!! APP ERROR !!! Failed to Publish Status. Err: %i\n\r.", err);
+        }
+    } else {
+        printf("Unable to send status, message is not available.\r\n");
+    }
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_init.c b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_init.c
new file mode 100644
index 0000000..d0cb0c7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_init.c
@@ -0,0 +1,382 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           MQTTc APPLICATION
+*
+* Filename      : app_mqtt-c_init.c
+* Version       : V1.00
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    APP_MQTTc_INIT_MODULE
+
+#include  
+#include  
+
+#include  "app_mqtt-c.h"
+
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  APP_MQTTc_MSG_QTY                         2u
+
+#define  APP_MQTTc_MSG_LEN_MAX                   128u
+#define  APP_MQTTc_PUBLISH_RX_MSG_LEN_MAX        128u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U   AppMQTTc_TaskStk[APP_MQTTc_TASK_STK_SIZE];
+
+static  MQTTc_CONN   AppMQTTc_Conn;
+
+static  MQTTc_MSG    AppMQTTc_Msg;
+static  CPU_INT08U   AppMQTTc_MsgBuf[APP_MQTTc_MSG_LEN_MAX];
+
+static  MQTTc_MSG    AppMQTTc_MsgPublishRx;
+static  MQTTc_MSG    AppMQTTc_MsgPublishRxBuf[APP_MQTTc_PUBLISH_RX_MSG_LEN_MAX];
+
+
+const  NET_TASK_CFG  AppMQTTc_TaskCfg = {                       /* Cfg for MQTTc internal task.                         */
+    APP_MQTTc_TASK_PRIO,                                        /* MQTTc internal task prio.                            */
+    APP_MQTTc_TASK_STK_SIZE,                                    /* MQTTc internal task stack size.                      */
+    AppMQTTc_TaskStk                                            /* Ptr to start of MQTTc internal stack.                */
+};
+
+
+const  MQTTc_CFG     AppMQTTc_Cfg = {
+    APP_MQTTc_MSG_QTY,
+    APP_MQTTc_INACTIVITY_TIMEOUT_s,
+    APP_MQTTc_INTERNAL_TASK_DLY
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnCmplCallbackFnct       (MQTTc_CONN  *p_conn,
+                                                 MQTTc_MSG   *p_msg,
+                                                 void        *p_arg,
+                                                 MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnConnectCmplCallbackFnct(MQTTc_CONN  *p_conn,
+                                                 MQTTc_MSG   *p_msg,
+                                                 void        *p_arg,
+                                                 MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnErrCallbackFnct        (MQTTc_CONN  *p_conn,
+                                                 void        *p_arg,
+                                                 MQTTc_ERR    err);
+
+
+/*
+*********************************************************************************************************
+*                                            AppMQTTc_Init()
+*
+* Description : Initialize the application MQTT-client module.
+*
+* Arguments   : none.
+*
+* Return(s)   : DEF_OK,   if NO error(s),
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppMQTTc_Init (void)
+{
+    MQTTc_ERR  err_mqttc;
+
+
+    MQTTc_Init(&AppMQTTc_Cfg,
+               &AppMQTTc_TaskCfg,
+                DEF_NULL,
+               &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to init MQTTc module. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgClr(&AppMQTTc_Msg, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to clr msg object. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_Msg, MQTTc_PARAM_TYPE_MSG_BUF_PTR, (void *)&AppMQTTc_MsgBuf[0u], &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf ptr param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_Msg, MQTTc_PARAM_TYPE_MSG_BUF_LEN, (void *)APP_MQTTc_MSG_LEN_MAX, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf len param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgClr(&AppMQTTc_MsgPublishRx, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to clr msg object. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_MsgPublishRx, MQTTc_PARAM_TYPE_MSG_BUF_PTR, (void *)&AppMQTTc_MsgPublishRxBuf[0u], &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf ptr param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_MsgPublishRx, MQTTc_PARAM_TYPE_MSG_BUF_LEN, (void *)APP_MQTTc_PUBLISH_RX_MSG_LEN_MAX, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf len param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_ConnClr(&AppMQTTc_Conn,
+                  &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to clr MQTTc connection object. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+                                                                /* Err handling should be done in your application.     */
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_BROKER_NAME,              (void *) APP_MQTTc_BROKER_NAME,              &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CLIENT_ID_STR,            (void *) APP_MQTTc_CLIENT_ID_NAME,           &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_USERNAME_STR,             (void *) APP_MQTTc_USERNAME,                 &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_PASSWORD_STR,             (void *) APP_MQTTc_PASSWORD,                 &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_KEEP_ALIVE_TMR_SEC,       (void *) 1000u,                              &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_COMPL,        (void *) AppMQTTc_OnCmplCallbackFnct,        &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_CONNECT_CMPL, (void *) AppMQTTc_OnConnectCmplCallbackFnct, &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_ERR_CALLBACK, (void *) AppMQTTc_OnErrCallbackFnct,         &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_PUBLISH_RX_MSG_PTR,       (void *)&AppMQTTc_MsgPublishRx,              &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_TIMEOUT_MS,               (void *) 30000u,                             &err_mqttc);
+
+    MQTTc_ConnOpen(&AppMQTTc_Conn,                              /* Open conn to MQTT server with parameters set in Conn.*/
+                    MQTTc_FLAGS_NONE,
+                   &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Failed to open TCP connection to MQTT server. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);                                      /* Failed to open TCP connection to MQTT server.        */
+    }
+
+    MQTTc_Connect(&AppMQTTc_Conn,                               /* Send CONNECT msg to MQTT server.                     */
+                  &AppMQTTc_Msg,
+                  &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Failed to process Connect msg req. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);                                      /* Failed to process MQTT CONNECT msg.                  */
+    }
+
+    printf("Initialization and CONNECT to server successful.\r\n");
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppMQTTc_OnCmplCallbackFnct()
+*
+* Description : Generic callback function for MQTTc module.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                           MQTTc_MSG   *p_msg,
+                                           void        *p_arg,
+                                           MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("Operation completed with err (%i). ", err);
+    }
+
+    switch (p_msg->Type) {
+        case MQTTc_MSG_TYPE_CONNECT:                            /* Gen callback called for event type: Connect Cmpl.    */
+             printf("Gen callback called for event type: Connect Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_PUBLISH:                            /* Gen callback called for event type: Publish Cmpl.    */
+             printf("Gen callback called for event type: Publish Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_SUBSCRIBE:                          /* Gen callback called for event type: Subscribe Cmpl.  */
+             printf("Gen callback called for event type: Subscribe Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_UNSUBSCRIBE:                        /* Gen callback called for event type: Unsubscribe Cmpl.*/
+             printf("Gen callback called for event type: Unsubscribe Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_PINGREQ:                            /* Gen callback called for event type: PingReq Cmpl.    */
+             printf("Gen callback called for event type: PingReq Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_DISCONNECT:                         /* Gen callback called for event type: Disconnect Cmpl. */
+             printf("Gen callback called for event type: Disconnect Cmpl.\n\r");
+             break;
+
+
+        default:
+             printf("Gen callback called for event type: default. !!! ERROR !!! %i\n\r", p_msg->Type);
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                 AppMQTTc_OnConnectCmplCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when a CONNECT operation has completed.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing CONNECT message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnConnectCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                                  MQTTc_MSG   *p_msg,
+                                                  void        *p_arg,
+                                                  MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_msg;
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("ConnectCmpl callback called with err (%i).\n\r", err);
+    } else {
+        printf("ConnectCmpl callback called without err, ready to send/receive messages.\n\r");
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppMQTTc_OnErrCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when an error occurs.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object on which error occurred.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnErrCallbackFnct (MQTTc_CONN  *p_conn,
+                                          void        *p_arg,
+                                          MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_arg;
+
+    printf("!!! APP ERROR !!! Err detected via OnErr callback. Err = %i.\n\r", err);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_publish.c b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_publish.c
new file mode 100644
index 0000000..b0ab9ba
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_publish.c
@@ -0,0 +1,455 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           MQTTc APPLICATION
+*
+* Filename      : app_mqtt-c_publish.c
+* Version       : V1.00
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    APP_MQTTc_MODULE
+
+#include  
+#include  
+
+#include  "app_mqtt-c.h"
+
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  APP_MQTTc_MSG_QTY                         1u
+
+#define  APP_MQTTc_MSG_LEN_MAX                   128u
+#define  APP_MQTTc_PUBLISH_RX_MSG_LEN_MAX        512u
+
+                                                                /* Domain to which to publish.                          */
+#define  APP_MQTTc_DOMAIN_PUBLISH                   "domain/publish_topic"
+
+#define  APP_MQTTc_PUBLISH_TEST_MSG                 "test publish"
+#define  APP_MQTTc_PUBLISH_TEST_QoS                2u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U   AppMQTTc_TaskStk[APP_MQTTc_TASK_STK_SIZE];
+
+static  MQTTc_CONN   AppMQTTc_Conn;
+
+static  MQTTc_MSG    AppMQTTc_Msg;
+static  CPU_INT08U   AppMQTTc_MsgBuf[APP_MQTTc_MSG_LEN_MAX];
+static  MQTTc_MSG    AppMQTTc_MsgPublishRx;
+static  CPU_INT08U   AppMQTTc_MsgPublishRxBuf[APP_MQTTc_PUBLISH_RX_MSG_LEN_MAX];
+
+const  NET_TASK_CFG  AppMQTTc_TaskCfg = {                       /* Cfg for MQTTc internal task.                         */
+    APP_MQTTc_TASK_PRIO,                                        /* MQTTc internal task prio.                            */
+    APP_MQTTc_TASK_STK_SIZE,                                    /* MQTTc internal task stack size.                      */
+    AppMQTTc_TaskStk                                            /* Ptr to start of MQTTc internal stack.                */
+};
+
+
+const  MQTTc_CFG     AppMQTTc_Cfg = {
+    APP_MQTTc_MSG_QTY,
+    APP_MQTTc_INACTIVITY_TIMEOUT_s,
+    APP_MQTTc_INTERNAL_TASK_DLY
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnCmplCallbackFnct       (MQTTc_CONN  *p_conn,
+                                                 MQTTc_MSG   *p_msg,
+                                                 void        *p_arg,
+                                                 MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnConnectCmplCallbackFnct(MQTTc_CONN  *p_conn,
+                                                 MQTTc_MSG   *p_msg,
+                                                 void        *p_arg,
+                                                 MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnPublishCmplCallbackFnct(MQTTc_CONN  *p_conn,
+                                                 MQTTc_MSG   *p_msg,
+                                                 void        *p_arg,
+                                                 MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnErrCallbackFnct        (MQTTc_CONN  *p_conn,
+                                                 void        *p_arg,
+                                                 MQTTc_ERR    err);
+
+
+/*
+*********************************************************************************************************
+*                                            AppMQTTc_Init()
+*
+* Description : Initialize the application MQTT-client module.
+*
+* Arguments   : none.
+*
+* Return(s)   : DEF_OK,   if NO error(s),
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppMQTTc_Init (void)
+{
+    MQTTc_ERR  err_mqttc;
+
+
+    MQTTc_Init(&AppMQTTc_Cfg,
+               &AppMQTTc_TaskCfg,
+                DEF_NULL,
+               &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to init MQTTc module. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgClr(&AppMQTTc_Msg, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to clr msg object. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_Msg, MQTTc_PARAM_TYPE_MSG_BUF_PTR, (void *)&AppMQTTc_MsgBuf[0u], &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf ptr param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_Msg, MQTTc_PARAM_TYPE_MSG_BUF_LEN, (void *)APP_MQTTc_MSG_LEN_MAX, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf len param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgClr(&AppMQTTc_MsgPublishRx, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to clr msg object. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_MsgPublishRx, MQTTc_PARAM_TYPE_MSG_BUF_PTR, (void *)&AppMQTTc_MsgPublishRxBuf[0u], &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf ptr param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_MsgPublishRx, MQTTc_PARAM_TYPE_MSG_BUF_LEN, (void *)APP_MQTTc_PUBLISH_RX_MSG_LEN_MAX, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf len param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_ConnClr(&AppMQTTc_Conn,
+                  &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to clr MQTTc connection object. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+                                                                /* Err handling should be done in your application.     */
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_BROKER_NAME,              (void *) APP_MQTTc_BROKER_NAME,              &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CLIENT_ID_STR,            (void *) APP_MQTTc_CLIENT_ID_NAME,           &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_USERNAME_STR,             (void *) APP_MQTTc_USERNAME,                 &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_KEEP_ALIVE_TMR_SEC,       (void *) 1000u,                              &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_COMPL,        (void *) AppMQTTc_OnCmplCallbackFnct,        &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_CONNECT_CMPL, (void *) AppMQTTc_OnConnectCmplCallbackFnct, &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_PUBLISH_CMPL, (void *) AppMQTTc_OnPublishCmplCallbackFnct, &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_ERR_CALLBACK, (void *) AppMQTTc_OnErrCallbackFnct,         &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_PUBLISH_RX_MSG_PTR,       (void *)&AppMQTTc_MsgPublishRx,              &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_TIMEOUT_MS,               (void *) 30000u,                             &err_mqttc);
+
+    MQTTc_ConnOpen(&AppMQTTc_Conn,                              /* Open conn to MQTT server with parameters set in Conn.*/
+                    MQTTc_FLAGS_NONE,
+                   &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Failed to open TCP connection to MQTT server. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);                                      /* Failed to open TCP connection to MQTT server.        */
+    }
+
+    MQTTc_Connect(&AppMQTTc_Conn,                               /* Send CONNECT msg to MQTT server.                     */
+                  &AppMQTTc_Msg,
+                  &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Failed to process Connect msg req. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);                                      /* Failed to process MQTT CONNECT msg.                  */
+    }
+
+    printf("Initialization and CONNECT to server successful.\r\n");
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppMQTTc_OnCmplCallbackFnct()
+*
+* Description : Generic callback function for MQTTc module.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                           MQTTc_MSG   *p_msg,
+                                           void        *p_arg,
+                                           MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("Operation completed with err (%i). ", err);
+    }
+
+    switch (p_msg->Type) {
+        case MQTTc_MSG_TYPE_CONNECT:                            /* Gen callback called for event type: Connect Cmpl.    */
+             printf("Gen callback called for event type: Connect Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_PUBLISH:                            /* Gen callback called for event type: Publish Cmpl.    */
+             printf("Gen callback called for event type: Publish Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_SUBSCRIBE:                          /* Gen callback called for event type: Subscribe Cmpl.  */
+             printf("Gen callback called for event type: Subscribe Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_UNSUBSCRIBE:                        /* Gen callback called for event type: Unsubscribe Cmpl.*/
+             printf("Gen callback called for event type: Unsubscribe Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_PINGREQ:                            /* Gen callback called for event type: PingReq Cmpl.    */
+             printf("Gen callback called for event type: PingReq Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_DISCONNECT:                         /* Gen callback called for event type: Disconnect Cmpl. */
+             printf("Gen callback called for event type: Disconnect Cmpl.\n\r");
+             break;
+
+
+        default:
+             printf("Gen callback called for event type: default. !!! ERROR !!! %i\n\r", p_msg->Type);
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                 AppMQTTc_OnConnectCmplCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when a CONNECT operation has completed.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing CONNECT message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnConnectCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                                  MQTTc_MSG   *p_msg,
+                                                  void        *p_arg,
+                                                  MQTTc_ERR    err)
+{
+    MQTTc_ERR  err_mqttc;
+
+
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("ConnectCmpl callback called with err (%i). NOT sending PUBLISH message.\n\r", err);
+    } else {
+        printf("ConnectCmpl callback called. Sending PUBLISH message.\n\r");
+
+        MQTTc_Publish(p_conn,
+                      p_msg,
+                      APP_MQTTc_DOMAIN_PUBLISH,
+                      APP_MQTTc_PUBLISH_TEST_QoS,
+                      DEF_YES,
+                      APP_MQTTc_PUBLISH_TEST_MSG,
+                     &err_mqttc);
+        if (err_mqttc != MQTTc_ERR_NONE) {
+            printf("!!! APP ERROR !!! Failed to Publish test string. Err: %i\n\r.", err_mqttc);
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                 AppMQTTc_OnPublishCmplCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when a PUBLISH operation has completed.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing PUBLISH message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnPublishCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                                  MQTTc_MSG   *p_msg,
+                                                  void        *p_arg,
+                                                  MQTTc_ERR    err)
+{
+    MQTTc_ERR  err_mqttc;
+
+
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("PublishCmpl callback called with error (%i). CANNOT re-send message.\n\r", err);
+    } else {
+        printf("PublishCmpl callback called. Re-sending same message.\n\r");
+
+        MQTTc_Publish(p_conn,
+                      p_msg,
+                      APP_MQTTc_DOMAIN_PUBLISH,
+                      APP_MQTTc_PUBLISH_TEST_QoS,
+                      DEF_YES,
+                      APP_MQTTc_PUBLISH_TEST_MSG,
+                     &err_mqttc);
+        if (err_mqttc != MQTTc_ERR_NONE) {
+            printf("!!! APP ERROR !!! Failed to Publish test string. Err: %i\n\r.", err_mqttc);
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppMQTTc_OnErrCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when an error occurs.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object on which error occurred.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnErrCallbackFnct (MQTTc_CONN  *p_conn,
+                                          void        *p_arg,
+                                          MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_arg;
+
+    printf("!!! APP ERROR !!! Err detected via OnErr callback. Err = %i.\n\r", err);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_subscribe.c b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_subscribe.c
new file mode 100644
index 0000000..6690720
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Examples/app_mqtt-c_subscribe.c
@@ -0,0 +1,455 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           MQTTc APPLICATION
+*
+* Filename      : app_mqtt-c_subscribe.c
+* Version       : V1.00
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    APP_MQTTc_MODULE
+
+#include  
+#include  
+
+#include  "app_mqtt-c.h"
+
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  APP_MQTTc_MSG_QTY                         2u
+
+#define  APP_MQTTc_MSG_LEN_MAX                   128u
+#define  APP_MQTTc_PUBLISH_RX_MSG_LEN_MAX        512u
+
+                                                                /* Domain to which to subscribe.                        */
+#define  APP_MQTTc_DOMAIN_SUBSCRIBE                 "domain/subscribe_topic"
+#define  APP_MQTTc_DOMAIN_SUBSCRIBE_QoS            2u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U   AppMQTTc_TaskStk[APP_MQTTc_TASK_STK_SIZE];
+
+static  MQTTc_CONN   AppMQTTc_Conn;
+
+static  MQTTc_MSG    AppMQTTc_Msg;
+static  CPU_INT08U   AppMQTTc_MsgBuf[APP_MQTTc_MSG_LEN_MAX];
+
+static  MQTTc_MSG    AppMQTTc_MsgPublishRx;
+static  MQTTc_MSG    AppMQTTc_MsgPublishRxBuf[APP_MQTTc_PUBLISH_RX_MSG_LEN_MAX];
+
+
+const  NET_TASK_CFG  AppMQTTc_TaskCfg = {                       /* Cfg for MQTTc internal task.                         */
+    APP_MQTTc_TASK_PRIO,                                        /* MQTTc internal task prio.                            */
+    APP_MQTTc_TASK_STK_SIZE,                                    /* MQTTc internal task stack size.                      */
+    AppMQTTc_TaskStk                                            /* Ptr to start of MQTTc internal stack.                */
+};
+
+
+const  MQTTc_CFG     AppMQTTc_Cfg = {
+    APP_MQTTc_MSG_QTY,
+    APP_MQTTc_INACTIVITY_TIMEOUT_s,
+    APP_MQTTc_INTERNAL_TASK_DLY
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnCmplCallbackFnct         (       MQTTc_CONN  *p_conn,
+                                                          MQTTc_MSG   *p_msg,
+                                                          void        *p_arg,
+                                                          MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnConnectCmplCallbackFnct  (       MQTTc_CONN  *p_conn,
+                                                          MQTTc_MSG   *p_msg,
+                                                          void        *p_arg,
+                                                          MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnSubscribeCmplCallbackFnct(       MQTTc_CONN  *p_conn,
+                                                          MQTTc_MSG   *p_msg,
+                                                          void        *p_arg,
+                                                          MQTTc_ERR    err);
+
+static  void  AppMQTTc_OnPublishRxCallbackFnct    (       MQTTc_CONN  *p_conn,
+                                                   const  CPU_CHAR    *topic_name_str,
+                                                          CPU_INT32U   topic_len,
+                                                   const  CPU_CHAR    *message_str,
+                                                          void        *p_arg,
+                                                          MQTTc_ERR    err);
+
+
+/*
+*********************************************************************************************************
+*                                            AppMQTTc_Init()
+*
+* Description : Initialize the MQTT-client module.
+*
+* Arguments   : none.
+*
+* Return(s)   : DEF_OK,   if NO error(s),
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppMQTTc_Init (void)
+{
+    MQTTc_ERR  err_mqttc;
+
+
+    MQTTc_Init(&AppMQTTc_Cfg,
+               &AppMQTTc_TaskCfg,
+                DEF_NULL,
+               &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to init MQTTc module. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgClr(&AppMQTTc_Msg, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to clr msg object. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_Msg, MQTTc_PARAM_TYPE_MSG_BUF_PTR, (void *)&AppMQTTc_MsgBuf[0u], &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf ptr param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_Msg, MQTTc_PARAM_TYPE_MSG_BUF_LEN, (void *)APP_MQTTc_MSG_LEN_MAX, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf len param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgClr(&AppMQTTc_MsgPublishRx, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to clr msg object. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_MsgPublishRx, MQTTc_PARAM_TYPE_MSG_BUF_PTR, (void *)&AppMQTTc_MsgPublishRxBuf[0u], &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf ptr param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_MsgSetParam(&AppMQTTc_MsgPublishRx, MQTTc_PARAM_TYPE_MSG_BUF_LEN, (void *)APP_MQTTc_PUBLISH_RX_MSG_LEN_MAX, &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to set buf len param. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+    MQTTc_ConnClr(&AppMQTTc_Conn,
+                  &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("ERROR - Failed to clr MQTTc connection object. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);
+    }
+
+                                                                /* Err handling should be done in your application.     */
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_BROKER_NAME,                  (void *) APP_MQTTc_BROKER_NAME,                  &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CLIENT_ID_STR,                (void *) APP_MQTTc_CLIENT_ID_NAME,               &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_USERNAME_STR,                 (void *) APP_MQTTc_USERNAME,                     &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_PASSWORD_STR,                 (void *) APP_MQTTc_PASSWORD,                     &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_KEEP_ALIVE_TMR_SEC,           (void *) 1000u,                                  &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_COMPL,            (void *) AppMQTTc_OnCmplCallbackFnct,            &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_CONNECT_CMPL,     (void *) AppMQTTc_OnConnectCmplCallbackFnct,     &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_SUBSCRIBE_CMPL,   (void *) AppMQTTc_OnSubscribeCmplCallbackFnct,   &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_PUBLISH_RX_MSG_PTR,           (void *)&AppMQTTc_MsgPublishRx,                  &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_CALLBACK_ON_PUBLISH_RX,       (void *) AppMQTTc_OnPublishRxCallbackFnct,       &err_mqttc);
+    MQTTc_ConnSetParam(&AppMQTTc_Conn, MQTTc_PARAM_TYPE_TIMEOUT_MS,                   (void *) 30000u,                                 &err_mqttc);
+
+    MQTTc_ConnOpen(&AppMQTTc_Conn,                              /* Open conn to MQTT server with parameters set in Conn.*/
+                    MQTTc_FLAGS_NONE,
+                   &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Failed to open TCP connection to MQTT server. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);                                      /* Failed to open TCP connection to MQTT server.        */
+    }
+
+    MQTTc_Connect(&AppMQTTc_Conn,                               /* Send CONNECT msg to MQTT server.                     */
+                  &AppMQTTc_Msg,
+                  &err_mqttc);
+    if (err_mqttc != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Failed to process Connect msg req. Err: %i\n\r.", err_mqttc);
+        return (DEF_FAIL);                                      /* Failed to process MQTT CONNECT msg.                  */
+    }
+
+    printf("Initialization and CONNECT to server successful.\r\n");
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     AppMQTTc_OnCmplCallbackFnct()
+*
+* Description : Generic callback function for MQTTc module.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                           MQTTc_MSG   *p_msg,
+                                           void        *p_arg,
+                                           MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("Operation completed with err (%i). ", err);
+    }
+
+    switch (p_msg->Type) {
+        case MQTTc_MSG_TYPE_CONNECT:                            /* Gen callback called for event type: Connect Cmpl.    */
+             printf("Gen callback called for event type: Connect Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_PUBLISH:                            /* Gen callback called for event type: Publish Cmpl.    */
+             printf("Gen callback called for event type: Publish Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_SUBSCRIBE:                          /* Gen callback called for event type: Subscribe Cmpl.  */
+             printf("Gen callback called for event type: Subscribe Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_UNSUBSCRIBE:                        /* Gen callback called for event type: Unsubscribe Cmpl.*/
+             printf("Gen callback called for event type: Unsubscribe Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_PINGREQ:                            /* Gen callback called for event type: PingReq Cmpl.    */
+             printf("Gen callback called for event type: PingReq Cmpl.\n\r");
+             break;
+
+
+        case MQTTc_MSG_TYPE_DISCONNECT:                         /* Gen callback called for event type: Disconnect Cmpl. */
+             printf("Gen callback called for event type: Disconnect Cmpl.\n\r");
+             break;
+
+
+        default:
+             printf("Gen callback called for event type: default. !!! ERROR !!! %i\n\r", p_msg->Type);
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                 AppMQTTc_OnConnectCmplCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when a CONNECT operation has completed.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing CONNECT message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnConnectCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                                  MQTTc_MSG   *p_msg,
+                                                  void        *p_arg,
+                                                  MQTTc_ERR    err)
+{
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("ConnectCmpl callback called with err (%i).\n\r", err);
+    } else {
+        printf("ConnectCmpl callback called without err, sending SUBSCRIBE message.\n\r");
+
+
+        MQTTc_Subscribe(p_conn,
+                        p_msg,
+                        APP_MQTTc_DOMAIN_SUBSCRIBE,
+                        APP_MQTTc_DOMAIN_SUBSCRIBE_QoS,
+                       &err);
+        if (err != MQTTc_ERR_NONE) {
+            printf("!!! APP ERROR !!! Subscribe failed. Err: %i\n\r.", err);
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                AppMQTTc_OnSubscribeCmplCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when a SUBSCRIBE operation has completed.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               p_msg           Pointer to MQTTc Message object used for operation.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+*               err             Error code from processing SUBSCRIBE message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnSubscribeCmplCallbackFnct (MQTTc_CONN  *p_conn,
+                                                    MQTTc_MSG   *p_msg,
+                                                    void        *p_arg,
+                                                    MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_msg;
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("SubscribeCmpl callback called with error (%i). CANNOT continue.\n\r", err);
+    } else {
+        printf("SubscribeCmpl callback called. Can now receive PUBLISHed messages from server.\n\r");
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                  AppMQTTc_OnPublishRxCallbackFnct()
+*
+* Description : Callback function for MQTTc module called when a PUBLISH message has been received.
+*
+* Arguments   : p_conn          Pointer to MQTTc Connection object for which operation has completed.
+*
+*               topic_name_str  String containing the topic of the message received. NOT NULL-terminated.
+*
+*               topic_len       Length of the topic.
+*
+*               message_str     NULL-terminated string containing the message received.
+*
+*               p_arg           Pointer to argument set in MQTTc Connection using the parameter type
+*                               MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc module.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  AppMQTTc_OnPublishRxCallbackFnct (       MQTTc_CONN  *p_conn,
+                                                const  CPU_CHAR    *topic_name_str,
+                                                       CPU_INT32U   topic_len,
+                                                const  CPU_CHAR    *message_str,
+                                                       void        *p_arg,
+                                                       MQTTc_ERR    err)
+{
+    (void)&p_conn;
+    (void)&p_arg;
+
+    if (err != MQTTc_ERR_NONE) {
+        printf("!!! APP ERROR !!! Err detected when receiving a PUBLISH message (%i).\n\r", err);
+    }
+
+    printf("Received PUBLISH message from server. Topic is %.*s.", topic_len, topic_name_str);
+    printf(" Message is %s.\n\r", message_str);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c.c b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c.c
new file mode 100644
index 0000000..b3c9a87
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c.c
@@ -0,0 +1,3642 @@
+/*
+*********************************************************************************************************
+*                                               uC/MQTTc
+*                                Message Queue Telemetry Transport Client
+*
+*                         (c) Copyright 2014-2016; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/MQTTc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             MQTT CLIENT
+*
+* Filename      : mqtt-c.c
+* Version       : V1.00.01
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    MQTTc_MODULE
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+#include  
+
+#include  "mqtt-c.h"
+#include  "mqtt-c_sock.h"
+#include  "../../Common/mqtt.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* Offset in Rx publish buf to provide room to send ... */
+                                                                /* a potential ACK without copying the whole buf.       */
+#define MQTTc_PUBLISH_RX_MSG_BUF_OFFSET                             4u
+
+
+/*
+*********************************************************************************************************
+*                                          DFLT VALUES DEFINES
+*********************************************************************************************************
+*/
+
+#define  MQTTc_TIMEOUT_MS_DFLT_VAL                             10000u
+#define  MQTTc_BROKER_PORT_NBR_DFLT_VAL                         1883u
+#define  MQTTc_KEEP_ALIVE_TIMER_SEC_DFLT_VAL                       0u
+
+
+/*
+*********************************************************************************************************
+*                                                  DBG
+*********************************************************************************************************
+*/
+
+#if (MQTTc_CFG_DBG_GLOBAL_BUF_EN == DEF_ENABLED)
+#define  MQTTc_DBG_GLOBAL_BUF_COPY(p_buf, len)       Mem_Copy(MQTTc_Dbg_GlobalBuf,  \
+                                                             (p_buf),               \
+                                                              DEF_MIN((len), MQTTc_CFG_DBG_GLOBAL_BUF_LEN))
+#else
+#define  MQTTc_DBG_GLOBAL_BUF_COPY(p_buf, len)
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct  mqttc_data {
+           MQTTc_CONN    *ConnHeadPtr;                          /* Ptr to head of conn list.                            */
+
+           CPU_INT16U     MsgID_BitmapTblMax;                   /* Max msg ID.                                          */
+    const  MQTTc_CFG     *CfgPtr;                               /* Ptr to cfg passed at init.                           */
+           CPU_INT32U    *MsgID_BitmapTbl;                      /* Bitmap tbl for msg IDs.                              */
+           MQTTc_MSG     *MsgListHeadPtr;                       /* Ptr to head of msg list to process.                  */
+           MQTTc_MSG     *MsgListTailPtr;                       /* Ptr to tail of msg list to process.                  */
+} MQTTc_DATA;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  MQTTc_DATA  *MQTTc_Ptr = DEF_NULL;
+#if (MQTTc_CFG_DBG_GLOBAL_BUF_EN == DEF_ENABLED)
+        CPU_CHAR     MQTTc_Dbg_GlobalBuf[MQTTc_CFG_DBG_GLOBAL_BUF_LEN];
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   MSG AND TASK PROCESSING FUNCTIONS
+*********************************************************************************************************
+*/
+
+static  void         MQTTc_Task                      (void            *p_arg);
+
+static  void         MQTTc_WrSockProcess             (MQTTc_MSG       *p_msg);
+
+static  void         MQTTc_RdSockProcess             (MQTTc_CONN      *p_conn);
+
+static  void         MQTTc_MsgProcess                (void);
+
+static  void         MQTTc_MsgCallbackExec           (MQTTc_MSG       *p_msg);
+
+
+/*
+*********************************************************************************************************
+*                                            MSG Q FUNCTIONS
+*********************************************************************************************************
+*/
+
+static  MQTTc_MSG   *MQTTc_MsgCheck                  (void);
+
+static  void         MQTTc_MsgPost                   (MQTTc_CONN      *p_conn,
+                                                      MQTTc_MSG       *p_msg,
+                                                      MQTTc_MSG_TYPE   type,
+                                                      CPU_INT32U       xfer_len,
+                                                      CPU_INT08U       qos_lvl,
+                                                      CPU_INT16U       msg_id,
+                                                      MQTTc_ERR       *p_err);
+
+static  void         MQTTc_MsgListClosedCallbackExec (MQTTc_MSG       *p_head_msg);
+
+
+/*
+*********************************************************************************************************
+*                                             BUF FUNCTIONS
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  *MQTTc_FixedHdrBufCfg            (CPU_INT08U      *p_buf,
+                                                      MQTTc_MSG_TYPE   msg_type,
+                                                      CPU_BOOLEAN      dup_flag,
+                                                      CPU_INT08U       qos_lvl,
+                                                      CPU_BOOLEAN      retain_flag,
+                                                      CPU_INT32U       rem_len,
+                                                      MQTTc_ERR       *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                           MSG ID FUNCTIONS
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U   MQTTc_MsgID_Get                 (void);
+
+static  void         MQTTc_MsgID_Free                (CPU_INT16U       msg_id);
+
+
+/*
+*********************************************************************************************************
+*                                            OTHER FUNCTIONS
+*********************************************************************************************************
+*/
+
+static  void         MQTTc_ConnNextMsgClr            (MQTTc_CONN      *p_conn);
+
+static  void         MQTTc_ConnCloseProc             (MQTTc_CONN      *p_conn,
+                                                      MQTTc_ERR       *p_err);
+
+static  void         MQTTc_ConnRemove                (MQTTc_CONN      *p_conn);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              MQTTc_Init()
+*
+* Description : Initializes the MQTTc module.
+*
+* Argument(s) : p_cfg           Pointer to MQTT Client Configuration Object.
+*
+*               p_task_cfg      Pointer to task configuration structure.
+*
+*               p_mem_seg       Memory segment from which internal data will be allocated. If DEF_NULL,
+*                               will be allocated from the global heap.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to 'type'.
+*                                   MQTTc_ERR_ALLOC             Failed to allocate data.
+*                                   MQTTc_ERR_OS_FAIL           OS operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_Init (const  MQTTc_CFG     *p_cfg,
+                  const  NET_TASK_CFG  *p_task_cfg,
+                         MEM_SEG       *p_mem_seg,
+                         MQTTc_ERR     *p_err)
+{
+    MQTTc_DATA      *p_temp_mqttc_data;
+    KAL_TASK_HANDLE  task_handle;
+    CPU_BOOLEAN      kal_feat_is_ok;
+    KAL_ERR          err_kal;
+    LIB_ERR          err_lib;
+    CPU_SR_ALLOC();
+
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_cfg == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_cfg->MaxMsgNbr == 0u) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (p_task_cfg == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    if (MQTTc_Ptr != DEF_NULL) {                                /* Make sure MQTTc module is not already init.          */
+       *p_err = MQTTc_ERR_NONE;
+        return;
+    }
+
+    KAL_Init(DEF_NULL,
+            &err_kal);
+    if (err_kal != KAL_ERR_NONE) {
+       *p_err = MQTTc_ERR_OS_FAIL;
+        return;
+    }
+
+    kal_feat_is_ok  = KAL_FeatureQuery(KAL_FEATURE_TASK_CREATE, KAL_OPT_CREATE_NONE);
+    kal_feat_is_ok  = KAL_FeatureQuery(KAL_FEATURE_SEM_CREATE,  KAL_OPT_CREATE_NONE);
+    kal_feat_is_ok  = KAL_FeatureQuery(KAL_FEATURE_SEM_PEND,    KAL_OPT_PEND_NONE);
+    kal_feat_is_ok  = KAL_FeatureQuery(KAL_FEATURE_SEM_POST,    KAL_OPT_POST_NONE);
+    kal_feat_is_ok  = KAL_FeatureQuery(KAL_FEATURE_SEM_DEL,     KAL_OPT_DEL_NONE);
+    kal_feat_is_ok &= KAL_FeatureQuery(KAL_FEATURE_DLY,         KAL_OPT_DLY_NONE);
+    if (kal_feat_is_ok != DEF_OK) {
+       *p_err = MQTTc_ERR_OS_FAIL;
+        return;
+    }
+
+                                                                /* Allocate data needed by MQTTc.                       */
+    p_temp_mqttc_data = (MQTTc_DATA *)Mem_SegAlloc("MQTTc - Data",
+                                                    p_mem_seg,
+                                                    sizeof(MQTTc_DATA),
+                                                   &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = MQTTc_ERR_ALLOC;
+        return;
+    }
+
+    p_temp_mqttc_data->ConnHeadPtr = DEF_NULL;
+    p_temp_mqttc_data->CfgPtr      = p_cfg;
+
+                                                                /* Allocate msg ID bitmap tbl and calculate max ix.     */
+    p_temp_mqttc_data->MsgID_BitmapTblMax = (p_cfg->MaxMsgNbr + (DEF_INT_32_NBR_BITS - 1u)) / DEF_INT_32_NBR_BITS;
+    p_temp_mqttc_data->MsgID_BitmapTbl    = (CPU_INT32U *)Mem_SegAlloc("MQTTc - Msg ID Bitmap Tbl",
+                                                                        p_mem_seg,
+                                                                        sizeof(CPU_INT32U) * p_temp_mqttc_data->MsgID_BitmapTblMax,
+                                                                       &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = MQTTc_ERR_ALLOC;
+        return;
+    }
+
+    p_temp_mqttc_data->MsgListHeadPtr = DEF_NULL;               /* Init head of msg list.                               */
+    p_temp_mqttc_data->MsgListTailPtr = DEF_NULL;               /* Init tail of msg list.                               */
+
+                                                                /* Create task.                                         */
+    task_handle = KAL_TaskAlloc("MQTTc Task",
+                                 p_task_cfg->StkPtr,
+                                 p_task_cfg->StkSizeBytes,
+                                 DEF_NULL,
+                                &err_kal);
+    if (err_kal != KAL_ERR_NONE) {
+       *p_err = MQTTc_ERR_OS_FAIL;
+        return;
+    }
+
+    KAL_TaskCreate(task_handle,
+                   MQTTc_Task,
+                   DEF_NULL,
+                   p_task_cfg->Prio,
+                   DEF_NULL,
+                  &err_kal);
+    if (err_kal != KAL_ERR_NONE) {
+       *p_err = MQTTc_ERR_OS_FAIL;
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();
+    MQTTc_Ptr = p_temp_mqttc_data;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = MQTTc_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           MQTTc_ConnClr()
+*
+* Description : Clear an MQTTc Connection before the first usage.
+*
+* Argument(s) : p_conn          Pointer to the MQTTc Connection.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NOT_INIT          MQTTc module has not yet been initialized.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application,
+*               MQTTc_ConnRemove().
+*
+* Note(s)     : (1) This function MUST be called before the MQTTc_CONN object is used for the first time.
+*********************************************************************************************************
+*/
+
+void  MQTTc_ConnClr (MQTTc_CONN  *p_conn,
+                     MQTTc_ERR   *p_err)
+{
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    {
+        MQTTc_CONN  *p_conn_temp;
+
+
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (MQTTc_Ptr == DEF_NULL) {                            /* Make sure MQTTc module is init.                      */
+           *p_err = MQTTc_ERR_NOT_INIT;
+            return;
+        }
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+                                                                /* Check if the Conn Obj is already used.               */
+        p_conn_temp = MQTTc_Ptr->ConnHeadPtr;
+        while (p_conn_temp != DEF_NULL) {
+            if (p_conn_temp == p_conn) {
+               *p_err = MQTTc_ERR_INVALID_ARG;
+                return;
+            }
+            p_conn_temp = p_conn_temp->NextPtr;
+        }
+    }
+    #endif
+
+    p_conn->SockId              = NET_SOCK_ID_NONE;
+    p_conn->SockSelFlags        = DEF_BIT_NONE;
+
+    p_conn->BrokerNamePtr       = DEF_NULL;
+    p_conn->BrokerPortNbr       = MQTTc_BROKER_PORT_NBR_DFLT_VAL;
+    p_conn->InactivityTimeout_s = MQTTc_Ptr->CfgPtr->InactivityTimeout_s;
+
+    p_conn->ClientID_Str        = DEF_NULL;
+    p_conn->UsernameStr         = DEF_NULL;
+    p_conn->PasswordStr         = DEF_NULL;
+
+    p_conn->KeepAliveTimerSec   = MQTTc_KEEP_ALIVE_TIMER_SEC_DFLT_VAL;
+    p_conn->WillCfgPtr          = DEF_NULL;
+
+    p_conn->SecureCfgPtr        = DEF_NULL;
+
+    p_conn->OnCmpl              = DEF_NULL;
+    p_conn->OnConnectCmpl       = DEF_NULL;
+    p_conn->OnPublishCmpl       = DEF_NULL;
+    p_conn->OnSubscribeCmpl     = DEF_NULL;
+    p_conn->OnUnsubscribeCmpl   = DEF_NULL;
+    p_conn->OnPingReqCmpl       = DEF_NULL;
+    p_conn->OnDisconnectCmpl    = DEF_NULL;
+    p_conn->OnErrCallback       = DEF_NULL;
+    p_conn->OnPublishRx         = DEF_NULL;
+    p_conn->ArgPtr              = DEF_NULL;
+
+    p_conn->TimeoutMs           = MQTTc_TIMEOUT_MS_DFLT_VAL;
+
+    p_conn->PublishRxMsgPtr     = DEF_NULL;
+
+    p_conn->TxMsgHeadPtr        = DEF_NULL;
+    p_conn->NextTxMsgTxLen      = 0u;
+
+    p_conn->NextPtr             = DEF_NULL;
+
+    MQTTc_ConnNextMsgClr(p_conn);                               /* Clr all the NextMsg fields.                          */
+
+   *p_err = MQTTc_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         MQTTc_ConnSetParam()
+*
+* Description : Set parameters related to the TCP and MQTT Client Connection.
+*
+* Argument(s) : p_conn          Pointer to the current MQTTc Connection.
+*
+*               type            Parameter type :
+*                                   MQTTc_PARAM_TYPE_BROKER_IP_ADDR                 Broker's IP addr.
+*                                   MQTTc_PARAM_TYPE_BROKER_NAME                    Broker's name.
+*                                   MQTTc_PARAM_TYPE_BROKER_PORT_NBR                Broker's port nbr.
+*                                   MQTTc_PARAM_TYPE_INACTIVITY_TIMEOUT_S           Inactivity timeout, in seconds.
+*                                   MQTTc_PARAM_TYPE_CLIENT_ID_STR                  Client ID str.
+*                                   MQTTc_PARAM_TYPE_USERNAME_STR                   Client username str.
+*                                   MQTTc_PARAM_TYPE_PASSWORD_STR                   Client password str.
+*                                   MQTTc_PARAM_TYPE_KEEP_ALIVE_TMR_SEC             Keep alive tmr, in seconds.
+*                                   MQTTc_PARAM_TYPE_WILL_CFG_PTR                   Will cfg ptr, if any.
+*                                   MQTTc_PARAM_TYPE_CALLBACK_ON_COMPL              Generic on     cmpl callback.
+*                                   MQTTc_PARAM_TYPE_CALLBACK_ON_CONNECT_CMPL       On connect     cmpl callback.
+*                                   MQTTc_PARAM_TYPE_CALLBACK_ON_PUBLISH_CMPL       On publish     cmpl callback.
+*                                   MQTTc_PARAM_TYPE_CALLBACK_ON_SUBSCRIBE_CMPL     On subscribe   cmpl callback.
+*                                   MQTTc_PARAM_TYPE_CALLBACK_ON_UNSUBSCRIBE_CMPL   On unsubscribe cmpl callback.
+*                                   MQTTc_PARAM_TYPE_CALLBACK_ON_PINGREQ_CMPL       On pingreq     cmpl callback.
+*                                   MQTTc_PARAM_TYPE_CALLBACK_ON_DISCONNECT_CMPL    On disconnect  cmpl callback.
+*                                   MQTTc_PARAM_TYPE_CALLBACK_ON_PUBLISH_RX         On publish rx'd callback.
+*                                   MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR               Ptr on arg passed to callback.
+*                                   MQTTc_PARAM_TYPE_TIMEOUT_MS                     'Open' timeout, in milliseconds.
+*                                   MQTTc_PARAM_TYPE_PUBLISH_RX_MSG_PTR             Ptr on msg that is used to rx publish.
+*
+*               p_param         Parameter's value.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to 'type'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_ConnSetParam (MQTTc_CONN        *p_conn,
+                          MQTTc_PARAM_TYPE   type,
+                          void              *p_param,
+                          MQTTc_ERR         *p_err)
+{
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_param == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    switch (type) {
+        case MQTTc_PARAM_TYPE_BROKER_IP_ADDR:
+        case MQTTc_PARAM_TYPE_BROKER_NAME:
+             p_conn->BrokerNamePtr = (CPU_CHAR *)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_BROKER_PORT_NBR:
+             p_conn->BrokerPortNbr = (CPU_INT16U)(CPU_INT32U)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_INACTIVITY_TIMEOUT_S:
+             p_conn->InactivityTimeout_s = (CPU_INT16U)(CPU_INT32U)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_CLIENT_ID_STR:
+             p_conn->ClientID_Str = (CPU_CHAR *)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_USERNAME_STR:
+             p_conn->UsernameStr = (CPU_CHAR *)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_PASSWORD_STR:
+             p_conn->PasswordStr = (CPU_CHAR *)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_KEEP_ALIVE_TMR_SEC:
+             p_conn->KeepAliveTimerSec = (CPU_INT16U)(CPU_INT32U)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_WILL_CFG_PTR:
+             p_conn->WillCfgPtr = (MQTTc_WILL_CFG *)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_SECURE_CFG_PTR:
+             p_conn->SecureCfgPtr = (NET_APP_SOCK_SECURE_CFG *)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_CALLBACK_ON_COMPL:
+             p_conn->OnCmpl = (MQTTc_CMPL_CALLBACK)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_CALLBACK_ON_CONNECT_CMPL:
+             p_conn->OnConnectCmpl = (MQTTc_CMPL_CALLBACK)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_CALLBACK_ON_PUBLISH_CMPL:
+            p_conn->OnPublishCmpl = (MQTTc_CMPL_CALLBACK)p_param;
+            break;
+
+
+        case MQTTc_PARAM_TYPE_CALLBACK_ON_SUBSCRIBE_CMPL:
+            p_conn->OnSubscribeCmpl = (MQTTc_CMPL_CALLBACK)p_param;
+            break;
+
+
+        case MQTTc_PARAM_TYPE_CALLBACK_ON_UNSUBSCRIBE_CMPL:
+            p_conn->OnUnsubscribeCmpl = (MQTTc_CMPL_CALLBACK)p_param;
+            break;
+
+
+        case MQTTc_PARAM_TYPE_CALLBACK_ON_PINGREQ_CMPL:
+            p_conn->OnPingReqCmpl = (MQTTc_CMPL_CALLBACK)p_param;
+            break;
+
+
+        case MQTTc_PARAM_TYPE_CALLBACK_ON_DISCONNECT_CMPL:
+            p_conn->OnDisconnectCmpl = (MQTTc_CMPL_CALLBACK)p_param;
+            break;
+
+        case MQTTc_PARAM_TYPE_CALLBACK_ON_ERR_CALLBACK:
+            p_conn->OnErrCallback = (MQTTc_ERR_CALLBACK)p_param;
+            break;
+
+
+        case MQTTc_PARAM_TYPE_CALLBACK_ON_PUBLISH_RX:
+            p_conn->OnPublishRx = (MQTTc_PUBLISH_RX_CALLBACK)p_param;
+            break;
+
+
+        case MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR:
+             p_conn->ArgPtr = p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_TIMEOUT_MS:
+             p_conn->TimeoutMs = (CPU_INT32U)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_PUBLISH_RX_MSG_PTR:               /* Init msg to be use as RX publish msg.                */
+             p_conn->PublishRxMsgPtr          = (MQTTc_MSG *)p_param;
+             p_conn->PublishRxMsgPtr->ConnPtr =  p_conn;
+             p_conn->PublishRxMsgPtr->Type    =  MQTTc_MSG_TYPE_PUBLISH;
+             p_conn->PublishRxMsgPtr->State   =  MQTTc_MSG_STATE_WAIT_RX;
+             p_conn->PublishRxMsgPtr->Err     =  MQTTc_ERR_NONE;
+             p_conn->PublishRxMsgPtr->NextPtr =  DEF_NULL;
+             break;
+
+
+        default:
+            *p_err = MQTTc_ERR_INVALID_ARG;
+             return;
+    }
+
+   *p_err = MQTTc_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc_ConnOpen()
+*
+* Description : Open a new MQTT Client connection.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object to open.
+*
+*               flags           Configuration flags, reserved for future usage.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_ConnOpen (MQTTc_CONN     *p_conn,
+                      MQTTc_FLAGS     flags,
+                      MQTTc_ERR      *p_err)
+{
+    (void)&flags;
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    MQTTc_SockConnOpen(p_conn,
+                       p_err);
+
+    p_conn->TxMsgHeadPtr = DEF_NULL;
+    p_conn->NextPtr      = DEF_NULL;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          MQTTc_ConnClose()
+*
+* Description : Request a close for a MQTTc Connection.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection to close.
+*
+*               flags           Configuration flags, reserved for future usage.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Passed argument is invalid.
+*                                   MQTTc_ERR_OS_FAIL           Problem occurred with signaling, in the OS.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) A local message can be used only because the buffer is not referenced, in the case of
+*                   a close request message. If the close request needs a valid buffer, the message will
+*                   need to be allocated and configured by the caller of this funtion.
+*********************************************************************************************************
+*/
+
+void  MQTTc_ConnClose (MQTTc_CONN   *p_conn,
+                       MQTTc_FLAGS   flags,
+                       MQTTc_ERR    *p_err)
+{
+    KAL_SEM_HANDLE  sem_handle;
+    MQTTc_MSG       local_mqtt_msg;                             /* See Note #1.                                         */
+    KAL_ERR         err_kal;
+
+
+    (void)&flags;
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_conn->SockId == NET_SOCK_ID_NONE) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    sem_handle = KAL_SemCreate("MQTTc Close Sem",
+                                DEF_NULL,
+                               &err_kal);
+    if (err_kal != KAL_ERR_NONE) {
+       *p_err = MQTTc_ERR_ALLOC;
+        return;
+    }
+
+    local_mqtt_msg.ArgPtr = (void *)&sem_handle;                /* Pass sem instead of buf, since it's a close req.     */
+
+    MQTTc_MsgPost(p_conn,
+                 &local_mqtt_msg,
+                  MQTTc_MSG_TYPE_REQ_CLOSE,                     /* Indicate this msg is used to req a close.            */
+                  0u,
+                  0u,
+                  MQTT_MSG_ID_NONE,
+                  p_err);
+    if (*p_err != MQTTc_ERR_NONE) {
+        goto end_err;                                           /* Do not pend if there was an err in msg posting.      */
+    }
+
+    KAL_SemPend(sem_handle,
+                KAL_OPT_PEND_NONE,
+                KAL_TIMEOUT_INFINITE,
+               &err_kal);
+    if (err_kal != KAL_ERR_NONE) {
+       *p_err = MQTTc_ERR_OS_FAIL;
+    } else {
+       *p_err = local_mqtt_msg.Err;
+    }
+
+end_err:
+    KAL_SemDel(sem_handle,
+               &err_kal);
+    (void)err_kal;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc_MsgClr()
+*
+* Description : Clear Message object members.
+*
+* Argument(s) : p_msg           Pointer to message object to clear.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_MsgClr (MQTTc_MSG  *p_msg,
+                    MQTTc_ERR  *p_err)
+{
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_msg == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    p_msg->ConnPtr = DEF_NULL;
+
+    p_msg->Type    = MQTTc_MSG_TYPE_NONE;
+    p_msg->State   = MQTTc_MSG_STATE_NONE;
+
+    p_msg->QoS     = 0u;
+
+    p_msg->MsgID   = MQTT_MSG_ID_NONE;
+
+    p_msg->ArgPtr  = DEF_NULL;
+    p_msg->BufLen  = 0u;
+    p_msg->XferLen = 0u;
+
+    p_msg->Err     = MQTTc_ERR_NONE;
+
+    p_msg->NextPtr = DEF_NULL;
+
+   *p_err = MQTTc_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          MQTTc_MsgSetParam()
+*
+* Description : Set parameter related to a given MQTT Message.
+*
+* Argument(s) : p_msg           Pointer to message object.
+*
+*               type            Parameter type :
+*                                   MQTTc_PARAM_TYPE_MSG_BUF_PTR        Msg's buf ptr.
+*                                   MQTTc_PARAM_TYPE_MSG_BUF_LEN        Msg's buf len.
+*
+*               p_param         Parameter's value.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to 'type'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_MsgSetParam (MQTTc_MSG         *p_msg,
+                         MQTTc_PARAM_TYPE   type,
+                         void              *p_param,
+                         MQTTc_ERR         *p_err)
+{
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_msg == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_param == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    switch (type) {
+        case MQTTc_PARAM_TYPE_MSG_BUF_PTR:
+             p_msg->ArgPtr = (void *)p_param;
+             break;
+
+
+        case MQTTc_PARAM_TYPE_MSG_BUF_LEN:
+             p_msg->BufLen = (CPU_INT32U)p_param;
+             break;
+
+
+        default:
+            *p_err = MQTTc_ERR_INVALID_ARG;
+             return;
+    }
+
+   *p_err = MQTTc_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc_Connect()
+*
+* Description : Send a 'Connect' message to MQTT server.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection to use.
+*
+*               p_msg           Pointer to MQTTc Message object to use.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NOT_INIT          MQTTc module has not yet been initialized.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to function.
+*                                   MQTTc_ERR_INVALID_BUF_SIZE  Invalid buf size passed to function.
+*                                   MQTTc_ERR_FAIL              Operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_Connect (MQTTc_CONN  *p_conn,
+                     MQTTc_MSG   *p_msg,
+                     MQTTc_ERR   *p_err)
+{
+    MQTTc_WILL_CFG  *p_will_cfg;
+    CPU_INT08U      *p_buf_start;
+    CPU_INT08U      *p_buf;
+    CPU_INT32U       xfer_len;
+    CPU_INT32U       rem_len;
+    CPU_INT16U       str_len;
+    CPU_INT08U       conn_flags = 0u;
+
+
+                                                                /* --------------- ARGUMENTS VALIDATION --------------- */
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    {
+        CPU_INT08U  client_id_len;
+
+
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (MQTTc_Ptr == DEF_NULL) {                            /* Make sure MQTTc module is init.                      */
+           *p_err = MQTTc_ERR_NOT_INIT;
+            return;
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_conn->PublishRxMsgPtr == DEF_NULL) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (p_conn->SockId == NET_SOCK_ID_NONE) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (p_conn->ClientID_Str == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        client_id_len = Str_Len(p_conn->ClientID_Str);          /* Make sure client ID is within spec limit.            */
+        if (client_id_len > MQTT_MSG_VAR_HDR_CONNECT_CLIENT_ID_MAX_STR_LEN) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (p_conn->WillCfgPtr != DEF_NULL) {                   /* Confirm will cfg contains what is needed.            */
+            if ((p_conn->WillCfgPtr->WillMessage == DEF_NULL) ||
+                (p_conn->WillCfgPtr->WillTopic   == DEF_NULL)) {
+               *p_err = MQTTc_ERR_NULL_PTR;
+                return;
+            }
+        }
+
+        if (p_msg == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_msg->ArgPtr == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_msg->BufLen < MQTT_MSG_BASE_LEN) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+    }
+    #endif
+
+    if (p_conn->PublishRxMsgPtr == DEF_NULL) {
+       *p_err = MQTTc_ERR_NULL_PTR;
+        return;
+    }
+
+    p_will_cfg = p_conn->WillCfgPtr;
+
+    p_buf_start = (CPU_INT08U *)p_msg->ArgPtr;
+
+    rem_len  = MQTT_MSG_VAR_HDR_CONNECT_LEN;                    /* Calculate len of msg.                                */
+    rem_len += Str_Len(p_conn->ClientID_Str) + MQTT_MSG_UTF8_LEN_SIZE;
+    if (p_will_cfg != DEF_NULL) {
+        rem_len += Str_Len(p_will_cfg->WillTopic)   + MQTT_MSG_UTF8_LEN_SIZE;
+        rem_len += Str_Len(p_will_cfg->WillMessage) + MQTT_MSG_UTF8_LEN_SIZE;
+    }
+    if (p_conn->UsernameStr != DEF_NULL) {
+        rem_len += Str_Len(p_conn->UsernameStr) + MQTT_MSG_UTF8_LEN_SIZE;
+    }
+    if (p_conn->PasswordStr != DEF_NULL) {
+        rem_len += Str_Len(p_conn->PasswordStr) + MQTT_MSG_UTF8_LEN_SIZE;
+    }
+
+    p_buf = MQTTc_FixedHdrBufCfg(p_buf_start,                   /* Cfg fixed hdr section of msg.                        */
+                                 MQTTc_MSG_TYPE_CONNECT,
+                                 DEF_NO,
+                                 0u,
+                                 DEF_NO,
+                                 rem_len,
+                                 p_err);
+    if (*p_err != MQTTc_ERR_NONE) {
+        return;
+    }
+
+    if ((rem_len + (p_buf - p_buf_start)) > p_msg->BufLen) {    /* Confirm that buf can hold msg len.                   */
+       *p_err = MQTTc_ERR_INVALID_BUF_SIZE;
+        return;
+    }
+
+   *p_buf = 0x00;
+    p_buf++;
+   *p_buf = MQTT_MSG_VAR_HDR_PROTOCOL_NAME_LEN;
+    p_buf++;
+
+    Str_Copy_N((CPU_CHAR *)p_buf, MQTT_MSG_VAR_HDR_PROTOCOL_NAME_STR, MQTT_MSG_VAR_HDR_PROTOCOL_NAME_LEN);
+    p_buf += MQTT_MSG_VAR_HDR_PROTOCOL_NAME_LEN;
+
+   *p_buf = MQTT_MSG_VAR_HDR_PROTOCOL_VERSION;
+    p_buf++;
+                                                                /* Set CONNECT msg flags.                               */
+    if (p_conn->UsernameStr != DEF_NULL) {
+        DEF_BIT_SET(conn_flags, MQTT_MSG_VAR_HDR_CONNECT_FLAG_USER_NAME_FLAG);
+    }
+
+    if (p_conn->PasswordStr != DEF_NULL) {
+        DEF_BIT_SET(conn_flags, MQTT_MSG_VAR_HDR_CONNECT_FLAG_PSWD_FLAG);
+    }
+
+    if (p_will_cfg != DEF_NULL) {
+        DEF_BIT_SET(conn_flags, MQTT_MSG_VAR_HDR_CONNECT_FLAG_WILL_FLAG);
+        DEF_BIT_SET(conn_flags, p_will_cfg->WillQoS << MQTT_MSG_VAR_HDR_CONNECT_FLAG_WILL_QOS_BIT_SHIFT);
+        if (p_will_cfg->WillRetain == DEF_YES) {
+            DEF_BIT_SET(conn_flags, MQTT_MSG_VAR_HDR_CONNECT_FLAG_WILL_RETAIN);
+        }
+    }
+
+    DEF_BIT_SET(conn_flags, MQTT_MSG_VAR_HDR_CONNECT_FLAG_CLEAN_SESSION);
+
+   *p_buf = conn_flags;
+    p_buf++;
+
+   *p_buf = (CPU_INT08U)(p_conn->KeepAliveTimerSec >> 8u);
+    p_buf++;
+   *p_buf = (CPU_INT08U)(p_conn->KeepAliveTimerSec & 0xFFu);
+    p_buf++;
+
+    str_len = Str_Len(p_conn->ClientID_Str);                    /* Copy client ID str.                                  */
+   *p_buf = (CPU_INT08U)(str_len >> 8u);
+    p_buf++;
+   *p_buf = (CPU_INT08U)(str_len & 0xFFu);
+    p_buf++;
+    Str_Copy((CPU_CHAR *)p_buf, p_conn->ClientID_Str);
+    p_buf += str_len;
+
+    if (p_will_cfg != DEF_NULL) {                               /* Copy will infos, if any.                             */
+        str_len = Str_Len(p_will_cfg->WillTopic);
+       *p_buf = (CPU_INT08U)(str_len >> 8u);
+        p_buf++;
+       *p_buf = (CPU_INT08U)(str_len & 0xFFu);
+        p_buf++;
+        Str_Copy((CPU_CHAR *)p_buf, p_will_cfg->WillTopic);
+        p_buf += str_len;
+
+        str_len = Str_Len(p_will_cfg->WillMessage);
+       *p_buf = (CPU_INT08U)(str_len >> 8u);
+        p_buf++;
+       *p_buf = (CPU_INT08U)(str_len & 0xFFu);
+        p_buf++;
+        Str_Copy((CPU_CHAR *)p_buf, p_will_cfg->WillMessage);
+        p_buf += str_len;
+    }
+
+    if (p_conn->UsernameStr != DEF_NULL) {                      /* Copy username str, if any.                           */
+        str_len = Str_Len(p_conn->UsernameStr);
+       *p_buf = (CPU_INT08U)(str_len >> 8u);
+        p_buf++;
+       *p_buf = (CPU_INT08U)(str_len & 0xFFu);
+        p_buf++;
+        Str_Copy((CPU_CHAR *)p_buf, p_conn->UsernameStr);
+        p_buf += str_len;
+    }
+
+    if (p_conn->PasswordStr != DEF_NULL) {                      /* Copy password str, if any.                           */
+        str_len = Str_Len(p_conn->PasswordStr);
+       *p_buf = (CPU_INT08U)(str_len >> 8u);
+        p_buf++;
+       *p_buf = (CPU_INT08U)(str_len & 0xFFu);
+        p_buf++;
+        Str_Copy((CPU_CHAR *)p_buf, p_conn->PasswordStr);
+        p_buf += str_len;
+    }
+
+    MQTTc_DBG_GLOBAL_BUF_COPY(p_buf_start, 150u);
+
+    xfer_len = p_buf - p_buf_start;
+
+    MQTTc_MsgPost(p_conn,                                       /* Add msg to Q for task to process.                    */
+                  p_msg,
+                  MQTTc_MSG_TYPE_CONNECT,
+                  xfer_len,
+                  0u,
+                  MQTT_MSG_ID_NONE,
+                  p_err);
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc_Publish()
+*
+* Description : Send a 'Publish' message to MQTT server.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object to use.
+*
+*               p_msg           Pointer to MQTTc Message object to use.
+*
+*               topic_str       String containing the topic on which to publish.  Must stay valid until
+*                               the message has been completely sent.
+*
+*               qos_lvl         Level of QoS at which to publish.
+*
+*               retain_flag     Flag indicating if the retain flag in the PUBLISH header needs to be set.
+*
+*               payload_str     String containing the payload to publish.  Must stay valid until the
+*                               message has been completely sent.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NOT_INIT          MQTTc module has not yet been initialized.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to function.
+*                                   MQTTc_ERR_INVALID_BUF_SIZE  Invalid buf size passed to function.
+*                                   MQTTc_ERR_FAIL              Operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_Publish (       MQTTc_CONN    *p_conn,
+                            MQTTc_MSG     *p_msg,
+                     const  CPU_CHAR      *topic_str,
+                            CPU_INT08U     qos_lvl,
+                            CPU_BOOLEAN    retain_flag,
+                     const  CPU_CHAR      *payload_str,
+                            MQTTc_ERR     *p_err)
+{
+    CPU_INT08U  *p_buf_start;
+    CPU_INT08U  *p_buf;
+    CPU_INT32U   xfer_len;
+    CPU_INT16U   rem_len;
+    CPU_INT16U   str_len;
+    CPU_INT16U   msg_id      = MQTT_MSG_ID_NONE;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (MQTTc_Ptr == DEF_NULL) {                            /* Make sure MQTTc module is init.                      */
+           *p_err = MQTTc_ERR_NOT_INIT;
+            return;
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_conn->SockId == NET_SOCK_ID_NONE) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (p_msg == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_msg->ArgPtr == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if ((qos_lvl       != 0u) &&                            /* Make sure buf can at leasy hold reply from server.   */
+            (p_msg->BufLen <  MQTT_MSG_BASE_LEN)) {
+           *p_err = MQTTc_ERR_INVALID_BUF_SIZE;
+            return;
+        }
+
+        if ((topic_str   == DEF_NULL) ||
+            (payload_str == DEF_NULL)) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (qos_lvl > MQTT_MSG_QOS_LVL_MAX) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        str_len =  Str_Len(topic_str);
+        p_buf   = (CPU_INT08U *)Str_Char_N(topic_str,           /* # sign not allowed in topic.                         */
+                                           str_len,
+                                           ASCII_CHAR_NUMBER_SIGN);
+        if (p_buf != DEF_NULL) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        p_buf = (CPU_INT08U *)Str_Char_N(topic_str,             /* + sign not allowed in topic.                         */
+                                         str_len,
+                                         ASCII_CHAR_PLUS_SIGN);
+        if (p_buf != DEF_NULL) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    p_buf_start = (CPU_INT08U *)p_msg->ArgPtr;
+
+    rem_len = Str_Len(topic_str) + MQTT_MSG_UTF8_LEN_SIZE;
+    if (qos_lvl > 0u) {
+        rem_len += MQTT_MSG_ID_SIZE;
+    }
+    rem_len += Str_Len(payload_str);
+
+    p_buf = MQTTc_FixedHdrBufCfg(p_buf_start,                   /* Cfg fixed section of hdr.                            */
+                                 MQTTc_MSG_TYPE_PUBLISH,
+                                 DEF_NO,
+                                 qos_lvl,
+                                 retain_flag,
+                                 rem_len,
+                                 p_err);
+    if (*p_err != MQTTc_ERR_NONE) {
+        return;
+    }
+
+    if ((rem_len + ((CPU_INT16U)(p_buf - p_buf_start))) > p_msg->BufLen) {
+                                                                /* Confirm msg fits in provided buf.                    */
+       *p_err = MQTTc_ERR_INVALID_BUF_SIZE;
+        return;
+    }
+
+    str_len = Str_Len(topic_str);                               /* Copy topic str.                                      */
+   *p_buf = (CPU_INT08U)(str_len >> 8u);
+    p_buf++;
+   *p_buf = (CPU_INT08U)(str_len & 0xFFu);
+    p_buf++;
+    Str_Copy((CPU_CHAR *)p_buf, topic_str);
+
+    p_buf += str_len;
+
+    if (qos_lvl > 0u) {                                         /* Obtain msg ID if QoS > 0.                            */
+        msg_id = MQTTc_MsgID_Get();
+
+       *p_buf = (CPU_INT08U)(msg_id >> 8u);
+        p_buf++;
+       *p_buf = (CPU_INT08U)(msg_id & 0xFFu);
+        p_buf++;
+    }
+
+    str_len = Str_Len(payload_str);                             /* Copy payload.                                        */
+    Str_Copy((CPU_CHAR *)p_buf, payload_str);
+
+    p_buf += str_len;
+
+    xfer_len = p_buf - p_buf_start;
+
+    MQTTc_DBG_GLOBAL_BUF_COPY(p_buf, 150u);
+
+    MQTTc_MsgPost(p_conn,                                       /* Post msg to Q for task to process.                   */
+                  p_msg,
+                  MQTTc_MSG_TYPE_PUBLISH,
+                  xfer_len,
+                  qos_lvl,
+                  msg_id,
+                  p_err);
+    if (*p_err != MQTTc_ERR_NONE) {
+        MQTTc_MsgID_Free(msg_id);
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           MQTTc_Subscribe()
+*
+* Description : Send a 'Subscribe' message to MQTT server.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object to use.
+*
+*               p_msg           Pointer to MQTTc Message object to use.
+*
+*               topic_str       String containing the topic at which to subscribe. Must stay valid until
+*                               the message has been completely sent.
+*
+*               req_qos         Requested level of QoS for this subscription.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NOT_INIT          MQTTc module has not yet been initialized.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to function.
+*                                   MQTTc_ERR_INVALID_BUF_SIZE  Invalid buf size passed to function.
+*                                   MQTTc_ERR_FAIL              Operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_Subscribe (       MQTTc_CONN  *p_conn,
+                              MQTTc_MSG   *p_msg,
+                       const  CPU_CHAR    *topic_str,
+                              CPU_INT08U   req_qos,
+                              MQTTc_ERR   *p_err)
+{
+    MQTTc_SubscribeMult(p_conn,
+                        p_msg,
+                       &topic_str,
+                       &req_qos,
+                        1u,
+                        p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         MQTTc_SubscribeMult()
+*
+* Description : Send a 'Subscribe' message containing multiple topics to MQTT server.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object to use.
+*
+*               p_msg           Pointer to MQTTc Message object to use.
+*
+*               topic_str_tbl   Table containing string of all the topic(s) at which to subscribe. Must
+*                               all stay valid until the message has been completely sent.
+*
+*               req_qos_tbl     Table of the requested level of QoS for each subscription.
+*
+*               topic_nbr       Number of topic and QoS contained in tables.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NOT_INIT          MQTTc module has not yet been initialized.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to function.
+*                                   MQTTc_ERR_INVALID_BUF_SIZE  Invalid buf size passed to function.
+*                                   MQTTc_ERR_FAIL              Operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) To compare with the granted QoS returned by the server with the SUBACK message, the
+*                   number of topics and their QoSes are kept before the actual content to send to the
+*                   server. For 3 topics, the buffer would look like this:
+*
+*                   Original p_msg->BufPtr           Modified p_msg->BufPtr
+*                                   |               |   Start of msg sent to server.
+*                                   |               |  |
+*                                   V               V  V
+*                                   ------------------------------
+*                                   | 2 | 0 | 1 | 3 | 0x82 | ... |
+*                                   ------------------------------
+*                                    ^    ^   ^   ^
+*                                    |    |   |   |
+*                          QoS Topic 3    |   |   |
+*                               QoS Topic 2   |   |
+*                                   QoS Topic 1   |
+*                                          Topic Nbr
+*********************************************************************************************************
+*/
+
+void  MQTTc_SubscribeMult (       MQTTc_CONN   *p_conn,
+                                  MQTTc_MSG    *p_msg,
+                           const  CPU_CHAR    **topic_str_tbl,
+                                  CPU_INT08U   *req_qos_tbl,
+                                  CPU_INT08U    topic_nbr,
+                                  MQTTc_ERR    *p_err)
+{
+    CPU_INT08U  *p_buf_base;
+    CPU_INT08U  *p_buf_start;
+    CPU_INT08U  *p_buf;
+    CPU_INT32U   xfer_len;
+    CPU_INT16U   str_len;
+    CPU_INT16U   rem_len;
+    CPU_INT16U   msg_id;
+    CPU_INT08U   topic_ix;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (MQTTc_Ptr == DEF_NULL) {                            /* Make sure MQTTc module is init.                      */
+           *p_err = MQTTc_ERR_NOT_INIT;
+            return;
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_conn->SockId == NET_SOCK_ID_NONE) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (p_msg == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_msg->ArgPtr == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+                                                                /* Make sure buf can hold topics of 1 byte and its QoS. */
+        if (p_msg->BufLen < (MQTT_MSG_BASE_LEN + 1u + (topic_nbr * (MQTT_MSG_UTF8_LEN_SIZE + 1u)))) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (topic_str_tbl == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (req_qos_tbl == DEF_NULL) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    p_buf_start = (CPU_INT08U *)p_msg->ArgPtr;
+    p_buf_base  = (CPU_INT08U *)p_msg->ArgPtr;
+    rem_len     =  MQTT_MSG_ID_SIZE;
+
+    for (topic_ix = 0u; topic_ix < topic_nbr; topic_ix++) {     /* Calculate len of all topics and their QoS.           */
+        #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* Make sure each ix contains a valid str and QoS.      */
+            if (topic_str_tbl[topic_ix] == DEF_NULL) {
+               *p_err = MQTTc_ERR_NULL_PTR;
+                return;
+            }
+
+            if (req_qos_tbl[topic_ix] > MQTT_MSG_QOS_LVL_MAX) {
+               *p_err = MQTTc_ERR_INVALID_ARG;
+                return;
+            }
+        #endif
+
+        str_len = Str_Len(topic_str_tbl[topic_ix]);
+
+        #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+            p_buf = (CPU_INT08U *)Str_Char_N(topic_str_tbl[topic_ix],
+                                             str_len,
+                                             ASCII_CHAR_NUMBER_SIGN);
+            if (p_buf != DEF_NULL) {
+                if (str_len != 1u) {                            /* If topic is '#' by itself, no err.                   */
+                    if (*(p_buf - 1u) != ASCII_CHAR_SOLIDUS) {  /* '#' must be preceded by a '/'.                       */
+                       *p_err = MQTTc_ERR_INVALID_ARG;
+                        return;
+                    }
+                                                                /* '#' must be the last character in topic.             */
+                    if (p_buf != (CPU_INT08U *)&topic_str_tbl[topic_ix][str_len - 1u]) {
+                       *p_err = MQTTc_ERR_INVALID_ARG;
+                        return;
+                    }
+                }
+            }
+
+            p_buf = (CPU_INT08U *)Str_Char_N(topic_str_tbl[topic_ix],
+                                             str_len,
+                                             ASCII_CHAR_PLUS_SIGN);
+            if (p_buf != DEF_NULL) {
+                if (str_len != 1u) {                            /* If topic is '+' by itself, no err.                   */
+                    if (*(p_buf - 1u) != ASCII_CHAR_SOLIDUS) {  /* '+' must be preceded by a '/'.                       */
+                       *p_err = MQTTc_ERR_INVALID_ARG;
+                        return;
+                    }
+                                                                /* If '+' is not last char, it must be followed by '/'. */
+                    if ((  p_buf       != (CPU_INT08U *)&topic_str_tbl[topic_ix][str_len - 1u]) &&
+                        (*(p_buf + 1u) !=  ASCII_CHAR_SOLIDUS)) {
+                       *p_err = MQTTc_ERR_INVALID_ARG;
+                        return;
+                    }
+                }
+            }
+        #endif
+
+        rem_len += str_len + MQTT_MSG_UTF8_LEN_SIZE;
+        rem_len += 1u;
+    }
+
+                                                                /* Write topics QoS and nbr of topics before ...        */
+                                                                /* content. See Note #1.                                */
+    for (topic_ix = topic_nbr; topic_ix > 0u; topic_ix--) {
+       *p_buf_start = req_qos_tbl[topic_ix - 1u];
+        p_buf_start++;
+    }
+   *p_buf_start = topic_nbr;
+    p_buf_start++;
+
+    MQTTc_DBG_GLOBAL_BUF_COPY(p_buf_base, 10u);
+
+    p_buf = MQTTc_FixedHdrBufCfg(p_buf_start,                   /* Cfg fixed hdr section of msg.                        */
+                                 MQTTc_MSG_TYPE_SUBSCRIBE,
+                                 DEF_NO,
+                                 1u,
+                                 DEF_NO,
+                                 rem_len,
+                                 p_err);
+    if (*p_err != MQTTc_ERR_NONE) {
+        return;
+    }
+
+    if ((rem_len + ((CPU_INT16U)(p_buf - p_buf_base))) > p_msg->BufLen) {
+                                                                /* Confirm msg fits in provided buf.                    */
+       *p_err = MQTTc_ERR_INVALID_BUF_SIZE;
+        return;
+    }
+
+    msg_id = MQTTc_MsgID_Get();
+   *p_buf = (CPU_INT08U)(msg_id >> 8u);
+    p_buf++;
+   *p_buf = (CPU_INT08U)(msg_id & 0xFFu);
+    p_buf++;
+
+    for (topic_ix = 0u; topic_ix < topic_nbr; topic_ix++) {     /* Calculate len of all topics and their QoS.           */
+
+        str_len = Str_Len(topic_str_tbl[topic_ix]);
+
+       *p_buf = (CPU_INT08U)(str_len >> 8u);
+        p_buf++;
+       *p_buf = (CPU_INT08U)(str_len & 0xFFu);
+        p_buf++;
+
+        Str_Copy((CPU_CHAR *)p_buf, topic_str_tbl[topic_ix]);
+
+        p_buf += str_len;
+
+       *p_buf = req_qos_tbl[topic_ix];
+        p_buf++;
+    }
+
+    xfer_len = p_buf - p_buf_start;
+
+    MQTTc_DBG_GLOBAL_BUF_COPY(p_buf_start, 150u);
+
+    p_msg->ArgPtr  = (void *)p_buf_start;                       /* Adjust BufPtr to start of content to send.           */
+    p_msg->BufLen -= (topic_nbr + 1u);                          /* Adjust BufLen to account for topics Qos.             */
+
+    MQTTc_MsgPost(p_conn,                                       /* Post msg to Q for task to process.                   */
+                  p_msg,
+                  MQTTc_MSG_TYPE_SUBSCRIBE,
+                  xfer_len,
+                  1u,
+                  msg_id,
+                  p_err);
+    if (*p_err != MQTTc_ERR_NONE) {
+        MQTTc_MsgID_Free(msg_id);
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          MQTTc_Unsubscribe()
+*
+* Description : Send a 'Unsubscribe' message to MQTT server.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object to use.
+*
+*               p_msg           Pointer to MQTTc Message object to use.
+*
+*               topic_str       String containing the topic at which to unsubscribe. Must stay valid
+*                               until the message has been completely sent.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NOT_INIT          MQTTc module has not yet been initialized.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to function.
+*                                   MQTTc_ERR_INVALID_BUF_SIZE  Invalid buf size passed to function.
+*                                   MQTTc_ERR_FAIL              Operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_Unsubscribe (       MQTTc_CONN  *p_conn,
+                                MQTTc_MSG   *p_msg,
+                         const  CPU_CHAR    *topic_str,
+                                MQTTc_ERR   *p_err)
+{
+    MQTTc_UnsubscribeMult(p_conn,
+                          p_msg,
+                         &topic_str,
+                          1u,
+                          p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        MQTTc_UnsubscribeMult()
+*
+* Description : Send a 'Unsubscribe' message for multiple topics to MQTT server.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object to use.
+*
+*               p_msg           Pointer to MQTTc Message object to use.
+*
+*               topic_str_tbl   Table containing string of all the topic(s) at which to unsubscribe. Must
+*                               all stay valid until the message has been completely sent.
+*
+*               topic_nbr       Number of topic contained in tables.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NOT_INIT          MQTTc module has not yet been initialized.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to function.
+*                                   MQTTc_ERR_INVALID_BUF_SIZE  Invalid buf size passed to function.
+*                                   MQTTc_ERR_FAIL              Operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_UnsubscribeMult (       MQTTc_CONN   *p_conn,
+                                    MQTTc_MSG    *p_msg,
+                             const  CPU_CHAR    **topic_str_tbl,
+                                    CPU_INT08U    topic_nbr,
+                                    MQTTc_ERR    *p_err)
+{
+    CPU_INT08U  *p_buf_start;
+    CPU_INT08U  *p_buf;
+    CPU_INT32U   xfer_len;
+    CPU_INT16U   str_len;
+    CPU_INT16U   rem_len;
+    CPU_INT16U   msg_id;
+    CPU_INT08U   topic_ix;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (MQTTc_Ptr == DEF_NULL) {                            /* Make sure MQTTc module is init.                      */
+           *p_err = MQTTc_ERR_NOT_INIT;
+            return;
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_conn->SockId == NET_SOCK_ID_NONE) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (p_msg == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_msg->ArgPtr == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_msg->BufLen < MQTT_MSG_BASE_LEN) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (topic_str_tbl == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    p_buf_start = (CPU_INT08U *)p_msg->ArgPtr;
+    rem_len     =  MQTT_MSG_ID_SIZE;
+
+    for (topic_ix = 0u; topic_ix < topic_nbr; topic_ix++) {     /* Calculate len of all topics.                         */
+        #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+            if (topic_str_tbl[topic_ix] == DEF_NULL) {          /* Make sure each ix contains a valid str.              */
+               *p_err = MQTTc_ERR_NULL_PTR;
+                return;
+            }
+        #endif
+
+        str_len  = Str_Len(topic_str_tbl[topic_ix]);
+        rem_len += str_len + MQTT_MSG_UTF8_LEN_SIZE;
+    }
+
+    p_buf = MQTTc_FixedHdrBufCfg(p_buf_start,                   /* Cfg fixed hdr section of msg.                        */
+                                 MQTTc_MSG_TYPE_UNSUBSCRIBE,
+                                 DEF_NO,
+                                 1u,
+                                 DEF_NO,
+                                 rem_len,
+                                 p_err);
+    if (*p_err != MQTTc_ERR_NONE) {
+        return;
+    }
+
+    if ((rem_len + ((CPU_INT16U)(p_buf - p_buf_start))) > p_msg->BufLen) {
+                                                                /* Confirm msg fits in provided buf.                    */
+       *p_err = MQTTc_ERR_INVALID_BUF_SIZE;
+        return;
+    }
+
+    msg_id = MQTTc_MsgID_Get();                                 /* Obtain msg ID.                                       */
+   *p_buf = (CPU_INT08U)(msg_id >> 8u);
+    p_buf++;
+   *p_buf = (CPU_INT08U)(msg_id & 0xFFu);
+    p_buf++;
+
+    for (topic_ix = 0u; topic_ix < topic_nbr; topic_ix++) {
+        str_len = Str_Len(topic_str_tbl[topic_ix]);
+
+       *p_buf = (CPU_INT08U)(str_len >> 8u);
+        p_buf++;
+       *p_buf = (CPU_INT08U)(str_len & 0xFFu);
+        p_buf++;
+
+        Str_Copy((CPU_CHAR *)p_buf, topic_str_tbl[topic_ix]);
+
+        p_buf += str_len;
+    }
+
+    xfer_len = p_buf - p_buf_start;
+
+    MQTTc_DBG_GLOBAL_BUF_COPY(p_buf_start, 150u);
+
+    MQTTc_MsgPost(p_conn,                                       /* Post msg in Q for task to process.                   */
+                  p_msg,
+                  MQTTc_MSG_TYPE_UNSUBSCRIBE,
+                  xfer_len,
+                  1u,
+                  msg_id,
+                  p_err);
+    if (*p_err != MQTTc_ERR_NONE) {
+        MQTTc_MsgID_Free(msg_id);
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc_PingReq()
+*
+* Description : Send a 'PingReq' message to MQTT server.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object to use.
+*
+*               p_msg           Pointer to MQTTc Message object to use.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NOT_INIT          MQTTc module has not yet been initialized.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to function.
+*                                   MQTTc_ERR_FAIL              Operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_PingReq (MQTTc_CONN  *p_conn,
+                     MQTTc_MSG   *p_msg,
+                     MQTTc_ERR   *p_err)
+{
+    CPU_INT08U  *p_buf_start;
+    CPU_INT08U  *p_buf;
+    CPU_INT32U   xfer_len;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (MQTTc_Ptr == DEF_NULL) {                            /* Make sure MQTTc module is init.                      */
+           *p_err = MQTTc_ERR_NOT_INIT;
+            return;
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_conn->SockId == NET_SOCK_ID_NONE) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (p_msg == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_msg->ArgPtr == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_msg->BufLen < MQTT_MSG_PING_DISCONN_LEN) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    p_buf_start = (CPU_INT08U *)p_msg->ArgPtr;
+
+    p_buf = MQTTc_FixedHdrBufCfg(p_buf_start,                   /* Cfg fixed hdr section of msg.                        */
+                                 MQTTc_MSG_TYPE_PINGREQ,
+                                 DEF_NO,
+                                 0u,
+                                 DEF_NO,
+                                 0u,
+                                 p_err);
+    if (*p_err != MQTTc_ERR_NONE) {
+        return;
+    }
+
+    xfer_len = p_buf - p_buf_start;
+
+    MQTTc_DBG_GLOBAL_BUF_COPY(p_buf, 150u);
+
+    MQTTc_MsgPost(p_conn,                                       /* Post msg in Q for task to process.                   */
+                  p_msg,
+                  MQTTc_MSG_TYPE_PINGREQ,
+                  xfer_len,
+                  0u,
+                  MQTT_MSG_ID_NONE,
+                  p_err);
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          MQTTc_Disconnect()
+*
+* Description : Send a 'Disconnect' message to MQTT server.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object to use.
+*
+*               p_msg           Pointer to MQTTc Message object to use.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NOT_INIT          MQTTc module has not yet been initialized.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to function.
+*                                   MQTTc_ERR_FAIL              Operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_Disconnect (MQTTc_CONN  *p_conn,
+                        MQTTc_MSG   *p_msg,
+                        MQTTc_ERR   *p_err)
+{
+    CPU_INT08U  *p_buf;
+    CPU_INT08U  *p_buf_start;
+    CPU_INT32U   xfer_len;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (MQTTc_Ptr == DEF_NULL) {                            /* Make sure MQTTc module is init.                      */
+           *p_err = MQTTc_ERR_NOT_INIT;
+            return;
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_conn->SockId == NET_SOCK_ID_NONE) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+
+        if (p_msg == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_msg->BufLen < MQTT_MSG_PING_DISCONN_LEN) {
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return;
+        }
+    #endif
+
+    p_buf_start = (CPU_INT08U *)p_msg->ArgPtr;
+
+    p_buf = MQTTc_FixedHdrBufCfg(p_buf_start,                   /* Cfg fixed hdr section of msg.                        */
+                                 MQTTc_MSG_TYPE_DISCONNECT,
+                                 DEF_NO,
+                                 0u,
+                                 DEF_NO,
+                                 0u,
+                                 p_err);
+    if (*p_err != MQTTc_ERR_NONE) {
+        return;
+    }
+
+    xfer_len = p_buf - p_buf_start;
+
+    MQTTc_DBG_GLOBAL_BUF_COPY(p_buf, 150u);
+
+    MQTTc_MsgPost(p_conn,                                       /* Post msg in Q for task to process.                   */
+                  p_msg,
+                  MQTTc_MSG_TYPE_DISCONNECT,
+                  xfer_len,
+                  0u,
+                  MQTT_MSG_ID_NONE,
+                  p_err);
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             MQTTc_Task()
+*
+* Description : Task for MQTTc. Process select, read, write and msg Q.
+*
+* Argument(s) : p_arg           Unused argument.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : This is a task.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_Task (void  *p_arg)
+{
+    MQTTc_CONN    *p_conn;
+    CPU_BOOLEAN    proc_rd;
+    CPU_BOOLEAN    proc_wr;
+    CPU_BOOLEAN    proc_err;
+    CPU_BOOLEAN    is_init   = DEF_NO;
+    CPU_INT32U     dly;
+    MQTTc_ERR      err_mqttc;
+
+
+    (void)&p_arg;
+
+    while (is_init != DEF_YES) {                                /* Wait for MQTTc module to be init.                    */
+        CPU_SR_ALLOC();
+
+
+        KAL_Dly(1u);
+        CPU_CRITICAL_ENTER();
+        is_init = (MQTTc_Ptr != DEF_NULL) ? DEF_YES : DEF_NO;
+        CPU_CRITICAL_EXIT();
+    }
+
+    while (DEF_TRUE) {
+
+        if (MQTTc_Ptr->ConnHeadPtr != DEF_NULL) {
+            dly = MQTTc_Ptr->CfgPtr->TaskDly;
+
+            MQTTc_SockSel(MQTTc_Ptr->ConnHeadPtr,
+                         &err_mqttc);
+
+            if (err_mqttc == MQTTc_ERR_NONE) {
+
+                p_conn = MQTTc_Ptr->ConnHeadPtr;
+
+                while (p_conn != DEF_NULL) {
+                    MQTTc_CONN  *p_conn_next = p_conn->NextPtr;
+
+
+                    proc_rd  = MQTTc_SockSelDescProc(p_conn, MQTTc_SEL_DESC_TYPE_RD);
+                    proc_wr  = MQTTc_SockSelDescProc(p_conn, MQTTc_SEL_DESC_TYPE_WR);
+                    proc_err = MQTTc_SockSelDescProc(p_conn, MQTTc_SEL_DESC_TYPE_ERR);
+
+
+                    if (proc_err == DEF_YES) {
+                        MQTTc_ERR_CALLBACK   on_err_callback;
+                        void                *p_callback_arg;
+
+
+                        on_err_callback = p_conn->OnErrCallback;
+                        p_callback_arg  = p_conn->ArgPtr;
+
+                        MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! Sock sel error for sock ID %i. Closing it.\r\n", p_conn->SockId));
+
+                        MQTTc_ConnCloseProc(p_conn,
+                                           &err_mqttc);
+
+                        if (on_err_callback != DEF_NULL) {
+                            on_err_callback(p_conn,
+                                            p_callback_arg,
+                                            MQTTc_ERR_SOCK_FAIL);
+                        }
+
+                    } else if (proc_rd == DEF_YES) {
+                        MQTTc_RdSockProcess(p_conn);
+                    } else if (proc_wr == DEF_YES) {
+                        MQTTc_MSG  *p_msg = DEF_NULL;
+
+
+                        if (p_conn->PublishRxMsgPtr->State == MQTTc_MSG_STATE_WAIT_TX_CMPL) {
+                            p_msg = p_conn->PublishRxMsgPtr;
+                        } else if ((p_conn->TxMsgHeadPtr        != DEF_NULL) &&
+                                   (p_conn->TxMsgHeadPtr->State == MQTTc_MSG_STATE_WAIT_TX_CMPL)) {
+                            p_msg = p_conn->TxMsgHeadPtr;
+                        } else if (p_conn->PublishRxMsgPtr->State == MQTTc_MSG_STATE_MUST_TX) {
+                            p_msg = p_conn->PublishRxMsgPtr;
+                        } else if ((p_conn->TxMsgHeadPtr        != DEF_NULL) &&
+                                   (p_conn->TxMsgHeadPtr->State == MQTTc_MSG_STATE_MUST_TX)) {
+                            p_msg = p_conn->TxMsgHeadPtr;
+                        } else {
+                            MQTTc_SockSelDescClr(p_conn, MQTTc_SEL_DESC_TYPE_WR);
+                        }
+
+                        if (p_msg != DEF_NULL) {
+                            MQTTc_WrSockProcess(p_msg);
+                        }
+                    }
+
+                    if ((p_conn->TxMsgHeadPtr        != DEF_NULL) &&
+                        (p_conn->TxMsgHeadPtr->State == MQTTc_MSG_STATE_MUST_TX)) {
+                        MQTTc_SockSelDescSet(p_conn, MQTTc_SEL_DESC_TYPE_WR);
+                    }
+                    p_conn = p_conn_next;
+                }
+            }
+        } else {
+            dly = DEF_MAX(1u, MQTTc_Ptr->CfgPtr->TaskDly);      /* In this case the task must absolutely dly.           */
+        }
+
+        MQTTc_MsgProcess();
+
+        KAL_Dly(dly);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         MQTTc_WrSockProcess()
+*
+* Description : Process write operations required for given MQTTc message.
+*
+* Argument(s) : p_msg           Pointer to MQTTc Message object for which to process write operation.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_WrSockProcess (MQTTc_MSG  *p_msg)
+{
+    MQTTc_CONN  *p_conn = p_msg->ConnPtr;
+    CPU_INT32U   buf_len;
+
+
+    if (p_msg->State == MQTTc_MSG_STATE_MUST_TX) {              /* If msg needs to be tx'd, tx it.                      */
+
+        switch (p_msg->Type) {
+            case MQTTc_MSG_TYPE_CONNECT:
+                                                                /* Set Rd and Err sel desc, to be able to rx CONNACK.   */
+                 MQTTc_SockSelDescSet(p_conn, MQTTc_SEL_DESC_TYPE_RD);
+                 MQTTc_SockSelDescSet(p_conn, MQTTc_SEL_DESC_TYPE_ERR);
+                                                                /* break intentionally omitted.                         */
+            case MQTTc_MSG_TYPE_PUBLISH:
+            case MQTTc_MSG_TYPE_PUBACK:
+            case MQTTc_MSG_TYPE_PUBREC:
+            case MQTTc_MSG_TYPE_PUBREL:
+            case MQTTc_MSG_TYPE_PUBCOMP:
+            case MQTTc_MSG_TYPE_SUBSCRIBE:
+            case MQTTc_MSG_TYPE_UNSUBSCRIBE:
+            case MQTTc_MSG_TYPE_PINGREQ:
+            case MQTTc_MSG_TYPE_DISCONNECT:
+                 buf_len = DEF_MIN((p_msg->XferLen - p_conn->NextTxMsgTxLen), DEF_INT_16U_MAX_VAL);
+                 MQTTc_DBG_TRACE_DBG(("Transmitting %i bytes on sock ID %i. Msg Type: %i\r\n",
+                                       p_msg->XferLen,
+                                       p_conn->SockId,
+                                       p_msg->Type));
+                 p_conn->NextTxMsgTxLen += MQTTc_SockTx(   p_conn,
+                                                       &(((CPU_INT08U *)p_msg->ArgPtr)[p_conn->NextTxMsgTxLen]),
+													       buf_len,
+                                                          &p_msg->Err);
+                 if (p_msg->Err != MQTTc_ERR_NONE) {            /* If err, exec callback and return.                    */
+                     MQTTc_MsgCallbackExec(p_msg);
+                 }
+                 if (p_conn->NextTxMsgTxLen == p_msg->XferLen) {
+                     p_msg->State           = MQTTc_MSG_STATE_WAIT_TX_CMPL;
+                     p_conn->NextTxMsgTxLen = 0u;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_CONNACK:                        /* These cases should never happen.                     */
+            case MQTTc_MSG_TYPE_SUBACK:
+            case MQTTc_MSG_TYPE_UNSUBACK:
+            case MQTTc_MSG_TYPE_PINGRESP:
+            default:
+                 MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! In must Tx switch default case.\n\r"));
+                 break;
+        }
+    } else if (p_msg->State == MQTTc_MSG_STATE_WAIT_TX_CMPL) {
+        CPU_INT08U  *p_buf_topic_nbr;
+        CPU_INT08U   topic_nbr;
+
+
+                                                                /* Tx operation has finished. Go to next step of msg.   */
+        switch (p_msg->Type) {
+            case MQTTc_MSG_TYPE_CONNECT:                        /* Finished sending a CONNECT, wait to rx CONNACK reply.*/
+                 MQTTc_DBG_TRACE_LOG(("Finished sending Connect. Waiting to Rx Connack.\r\n"));
+
+                 p_msg->Type    = MQTTc_MSG_TYPE_CONNACK;
+                 p_msg->State   = MQTTc_MSG_STATE_WAIT_RX;
+                 p_msg->XferLen = 2u;
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PUBLISH:
+                 if (p_msg->QoS == 0u) {                        /* If QoS is 0, xfer is cmpl.                           */
+                     MQTTc_DBG_TRACE_LOG(("Finished sending Publish QoS 0. Executing callback.\r\n"));
+                     p_msg->Err = MQTTc_ERR_NONE;
+                     MQTTc_MsgCallbackExec(p_msg);
+                 } else if (p_msg->QoS == 1u) {                 /* If QoS is 1, send PUBACK reply.                      */
+                     MQTTc_DBG_TRACE_LOG(("Finished sending Publish QoS 1. Waiting to Rx Puback.\r\n"));
+                     p_msg->Type    = MQTTc_MSG_TYPE_PUBACK;
+                     p_msg->State   = MQTTc_MSG_STATE_WAIT_RX;
+                     p_msg->XferLen = 0u;
+                 } else {                                       /* If QoS is 2, send PUBREC reply.                      */
+                     MQTTc_DBG_TRACE_LOG(("Finished sending Publish QoS 2. Waiting to Rx Pubrec.\r\n"));
+                     p_msg->Type    = MQTTc_MSG_TYPE_PUBREC;
+                     p_msg->State   = MQTTc_MSG_STATE_WAIT_RX;
+                     p_msg->XferLen = 0u;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PUBACK:                         /* Finished sending a PUBACK, xfer is cmpl.             */
+                 MQTTc_DBG_TRACE_LOG(("Finished sending a Puback. Removing msg from list.\r\n"));
+                 p_msg->Type  = MQTTc_MSG_TYPE_PUBLISH;
+                 p_msg->State = MQTTc_MSG_STATE_WAIT_RX;
+                 p_msg->Err   = MQTTc_ERR_NONE;
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PUBREC:                         /* Finished sending a PUBREC, wait to rx PUBREL.        */
+                 MQTTc_DBG_TRACE_LOG(("Finished sending a Pubrec. Waiting to Rx a Pubrel.\r\n"));
+                 p_msg->Type    = MQTTc_MSG_TYPE_PUBREL;
+                 p_msg->State   = MQTTc_MSG_STATE_WAIT_RX;
+                 p_msg->XferLen = 0u;
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PUBREL:                         /* Finished sending a PUBREL, wait to rx PUBCOMP.       */
+                 MQTTc_DBG_TRACE_LOG(("Finished sending Pubrel. Waiting to Rx Pubcomp.\r\n"));
+                 p_msg->Type    = MQTTc_MSG_TYPE_PUBCOMP;
+                 p_msg->State   = MQTTc_MSG_STATE_WAIT_RX;
+                 p_msg->XferLen = 0u;
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PUBCOMP:                        /* Finished sending a PUBCOMP, xfer is cmpl.            */
+                 MQTTc_DBG_TRACE_LOG(("Finished sending a Pubcomp. Removing msg from list.\r\n"));
+                 p_msg->Type  = MQTTc_MSG_TYPE_PUBLISH;
+                 p_msg->State = MQTTc_MSG_STATE_WAIT_RX;
+                 p_msg->Err   = MQTTc_ERR_NONE;
+                 break;
+
+
+            case MQTTc_MSG_TYPE_SUBSCRIBE:                      /* Finished sending a SUBSCRIBE, wait to rx SUBACK.     */
+                                                                /* Re-obtain nbr of topics in Subscribe msg. See ...    */
+                                                                /* Note #1 in MQTTc_SubscribeMult().                    */
+                 MQTTc_DBG_TRACE_LOG(("Finished sending Subscribe. Waiting to Rx Suback.\r\n"));
+
+
+                 p_buf_topic_nbr = ((CPU_INT08U *)p_msg->ArgPtr) - 1u;
+                 topic_nbr       =  p_buf_topic_nbr[0u];
+
+                 p_msg->Type    = MQTTc_MSG_TYPE_SUBACK;
+                 p_msg->State   = MQTTc_MSG_STATE_WAIT_RX;
+                 p_msg->XferLen = topic_nbr;
+                 break;
+
+
+            case MQTTc_MSG_TYPE_UNSUBSCRIBE:                    /* Finished sending a UNSUBSCRIBE, wait to rx UNSUBACK. */
+                 MQTTc_DBG_TRACE_LOG(("Finished sending Unsubscribe. Waiting to Rx Unsuback.\r\n"));
+
+                 p_msg->Type    = MQTTc_MSG_TYPE_UNSUBACK;
+                 p_msg->State   = MQTTc_MSG_STATE_WAIT_RX;
+                 p_msg->XferLen = 0u;
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PINGREQ:                        /* Finished sending a PINGREQ, wait to rx PINGRESP.     */
+                 p_msg->Type    = MQTTc_MSG_TYPE_PINGRESP;
+                 p_msg->State   = MQTTc_MSG_STATE_WAIT_RX;
+                 p_msg->XferLen = 0u;
+                 break;
+
+
+            case MQTTc_MSG_TYPE_DISCONNECT:                     /* Finished sending a DISCONNECT, clear sel descs.      */
+                 MQTTc_MsgCallbackExec(p_msg);
+
+                 MQTTc_ConnRemove(p_conn);
+                                                                /* Exec callbacks for msgs q'd under this conn.         */
+                 MQTTc_MsgListClosedCallbackExec(p_conn->TxMsgHeadPtr);
+                 p_conn->TxMsgHeadPtr = DEF_NULL;               /* Mark list as empty.                                  */
+                 break;
+
+
+            default:
+                 MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! Wait Tx Cmpl switch, in default case.\n\r"));
+                 break;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         MQTTc_RdSockProcess()
+*
+* Description : Process read operations required for given MQTTc Connection.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object for which to process read operations.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_RdSockProcess (MQTTc_CONN  *p_conn)
+{
+    MQTTc_MSG   *p_next_msg;
+    CPU_INT08U  *p_buf;
+    CPU_INT32U   rx_len;
+    MQTTc_ERR    err_mqttc;
+
+
+    if (p_conn->NextMsgPtr == DEF_NULL) {                       /* If next msg is already known, skip this step.        */
+        if (p_conn->NextMsgHeader == DEF_BIT_NONE) {
+
+            (void)MQTTc_SockRx(p_conn,                          /* Read header (type, DUP, QoS and retain) of rx'd msg. */
+                              &p_conn->NextMsgHeader,
+                               1u,
+                              &err_mqttc);
+            if (err_mqttc == MQTTc_ERR_FATAL) {
+                goto err_remove_conn_close_sock;
+            } else if (err_mqttc != MQTTc_ERR_NONE) {           /* Wait for more data to be avail to continue.          */
+                return;
+            }
+
+            MQTTc_DBG_TRACE_DBG(("Rx'd msg type %i.\r\n", ((CPU_INT08U)(p_conn->NextMsgHeader & MQTT_MSG_TYPE_MSK) >> 4u)));
+                                                                /* Convert msg type to enum type.                       */
+            switch (p_conn->NextMsgHeader & MQTT_MSG_TYPE_MSK) {
+                case MQTT_MSG_TYPE_CONNACK:
+                     p_conn->NextMsgType = MQTTc_MSG_TYPE_CONNACK;
+                     MQTTc_DBG_TRACE_LOG(("Connack event rx'd on sock ID %i.\n\r", p_conn->SockId));
+                     break;
+
+                case MQTT_MSG_TYPE_PUBLISH:
+                     p_conn->NextMsgType = MQTTc_MSG_TYPE_PUBLISH;
+                     MQTTc_DBG_TRACE_LOG(("Publish event rx'd on sock ID %i.\n\r", p_conn->SockId));
+                     break;
+
+                case MQTT_MSG_TYPE_PUBACK:
+                     p_conn->NextMsgType = MQTTc_MSG_TYPE_PUBACK;
+                     MQTTc_DBG_TRACE_LOG(("Puback event rx'd on sock ID %i.\n\r", p_conn->SockId));
+                     break;
+
+                case MQTT_MSG_TYPE_PUBREC:
+                     p_conn->NextMsgType = MQTTc_MSG_TYPE_PUBREC;
+                     MQTTc_DBG_TRACE_LOG(("Pubrec event rx'd on sock ID %i.\n\r", p_conn->SockId));
+                     break;
+
+                case MQTT_MSG_TYPE_PUBREL:
+                     p_conn->NextMsgType = MQTTc_MSG_TYPE_PUBREL;
+                     MQTTc_DBG_TRACE_LOG(("Pubrel event rx'd on sock ID %i.\n\r", p_conn->SockId));
+                     break;
+
+                case MQTT_MSG_TYPE_PUBCOMP:
+                     p_conn->NextMsgType = MQTTc_MSG_TYPE_PUBCOMP;
+                     MQTTc_DBG_TRACE_LOG(("Pubcomp event rx'd on sock ID %i.\n\r", p_conn->SockId));
+                     break;
+
+                case MQTT_MSG_TYPE_SUBACK:
+                     p_conn->NextMsgType = MQTTc_MSG_TYPE_SUBACK;
+                     MQTTc_DBG_TRACE_LOG(("Suback event rx'd on sock ID %i.\n\r", p_conn->SockId));
+                     break;
+
+                case MQTT_MSG_TYPE_UNSUBACK:
+                     p_conn->NextMsgType = MQTTc_MSG_TYPE_UNSUBACK;
+                     MQTTc_DBG_TRACE_LOG(("Unsuback event rx'd on sock ID %i.\n\r", p_conn->SockId));
+                     break;
+
+                case MQTT_MSG_TYPE_PINGRESP:
+                     p_conn->NextMsgType = MQTTc_MSG_TYPE_PINGRESP;
+                     break;
+
+
+                case MQTT_MSG_TYPE_CONNECT:
+                case MQTT_MSG_TYPE_SUBSCRIBE:
+                case MQTT_MSG_TYPE_UNSUBSCRIBE:
+                case MQTT_MSG_TYPE_PINGREQ:
+                case MQTT_MSG_TYPE_DISCONNECT:
+                default:
+                     MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! Received wrong message type: %i\r\n", p_conn->NextMsgHeader));
+                     p_conn->NextMsgHeader = 0u;
+                     goto err_restart;                          /* These msg types cannot be rx'd. Flush rx buf.        */
+            }
+            p_conn->NextMsgRxLen = 0u;
+        }
+                                                                /* Make sure msg being rx'd is expected.                */
+        if (p_conn->NextMsgType != p_conn->PublishRxMsgPtr->Type) {
+            if (p_conn->TxMsgHeadPtr != DEF_NULL) {
+                if (p_conn->NextMsgType != p_conn->TxMsgHeadPtr->Type) {
+                    goto err_restart;
+                }
+            } else {
+                goto err_restart;
+            }
+        }
+
+        if (p_conn->NextMsgLenIsCmpl == DEF_NO) {
+            CPU_INT08U  rem_len;
+            CPU_INT32U  rx_len;
+
+
+            do {                                                /* Read rem len of msg. This can be a multi-byte field. */
+                rx_len = MQTTc_SockRx(p_conn,
+                                     &rem_len,
+                                      1u,
+                                     &err_mqttc);
+                if (err_mqttc == MQTTc_ERR_FATAL) {
+                    goto err_remove_conn_close_sock;
+                } else if (err_mqttc != MQTTc_ERR_NONE) {       /* Wait for more data to be avail to continue.          */
+                    return;
+                }
+                p_conn->NextMsgRxLen += rx_len;
+
+                p_conn->NextMsgLen += (rem_len & MQTT_MSG_FIXED_HDR_REM_LEN_MSK);
+
+                                                                /* Read msg as long as continuation bit is set, max 4x. */
+            }  while ((DEF_BIT_IS_SET(rem_len, MQTT_MSG_FIXED_HDR_REM_LEN_CONTINUATION_BIT) == DEF_YES) &&
+                      (p_conn->NextMsgRxLen                                                 <  MQTT_MSG_FIXED_HDR_REM_LEN_NBR_BYTES_MAX));
+
+            p_conn->NextMsgLenIsCmpl = DEF_YES;
+            p_conn->NextMsgRxLen     = 0u;
+
+            MQTTc_DBG_TRACE_DBG(("Finished reading msg len: %i on sock ID %i.\n\r", p_conn->NextMsgLen, p_conn->SockId));
+        }
+
+        if ( (p_conn->NextMsgMsgID_IsCmpl == DEF_NO) &&
+            ((p_conn->NextMsgType         == MQTTc_MSG_TYPE_PUBACK)  ||
+             (p_conn->NextMsgType         == MQTTc_MSG_TYPE_PUBREC)  ||
+             (p_conn->NextMsgType         == MQTTc_MSG_TYPE_PUBREL)  ||
+             (p_conn->NextMsgType         == MQTTc_MSG_TYPE_PUBCOMP) ||
+             (p_conn->NextMsgType         == MQTTc_MSG_TYPE_SUBACK)  ||
+             (p_conn->NextMsgType         == MQTTc_MSG_TYPE_UNSUBACK))) {
+            CPU_INT08U  msg_id_rx[MQTT_MSG_ID_SIZE];
+
+
+            if (p_conn->NextMsgRxLen == 1u) {                   /* If already rx'd 1 byte of MsgID, re-put in msg_id_rx.*/
+                msg_id_rx[0u] = (p_conn->NextMsgMsgID & 0xFF00u) >> 8u;
+            }
+
+            rx_len = MQTTc_SockRx(p_conn,                       /* Rx msg ID if msg has one.                            */
+                                 &msg_id_rx[p_conn->NextMsgRxLen],
+                                 (MQTT_MSG_ID_SIZE - p_conn->NextMsgRxLen),
+                                &err_mqttc);
+            if (err_mqttc == MQTTc_ERR_NONE) {
+                p_conn->NextMsgRxLen += rx_len;
+            } else if (err_mqttc == MQTTc_ERR_FATAL) {
+                goto err_remove_conn_close_sock;
+            } else {                                            /* Wait to be able to rx data to continue.              */
+                if ((err_mqttc == MQTTc_ERR_RX_BUF_EMPTY) &&
+                    (rx_len    == 1u)) {                        /* Keep first part of msg ID rx'd.                      */
+                    p_conn->NextMsgMsgID = (msg_id_rx[0u] << 8u);
+                    p_conn->NextMsgRxLen += 1u;
+                }
+                return;
+            }
+
+            p_conn->NextMsgMsgID         = ((msg_id_rx[0u] << 8u) | msg_id_rx[1u]);
+            p_conn->NextMsgLen          -=   MQTT_MSG_ID_SIZE;
+            p_conn->NextMsgMsgID_IsCmpl  =   DEF_YES;
+            p_conn->NextMsgRxLen         =   0u;
+
+            MQTTc_DBG_TRACE_LOG(("Finished reading next msg msg ID.\n\r"));
+        }
+
+        if (p_conn->NextMsgType == p_conn->PublishRxMsgPtr->Type) {
+            p_conn->NextMsgPtr   = p_conn->PublishRxMsgPtr;
+                                                                /* Account for header that may need to be sent.         */
+                                                                /* Start rx'ing useful data at offset, to leave room.   */
+            p_conn->NextMsgRxLen = MQTTc_PUBLISH_RX_MSG_BUF_OFFSET;
+            if ((p_conn->NextMsgLen + MQTTc_PUBLISH_RX_MSG_BUF_OFFSET) > p_conn->NextMsgPtr->BufLen) {
+                MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! Next msg len of Publish Msg (%i (+4 from header)) too big for msg buf (%i).\n\r",
+                                       p_conn->NextMsgLen,
+                                       p_conn->NextMsgPtr->BufLen));
+                p_conn->NextMsgPtr->Err = MQTTc_ERR_BUF_OVERFLOW;
+                goto err_callback_restart;
+            }
+        } else {
+            p_conn->NextMsgPtr = p_conn->TxMsgHeadPtr;
+
+            if (p_conn->NextMsgLen != p_conn->NextMsgPtr->XferLen) {
+                MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! Next msg len (%i) not equal to expected xfer len (%i).\n\r",
+                                       p_conn->NextMsgLen,
+                                       p_conn->NextMsgPtr->XferLen));
+                p_conn->NextMsgPtr->Err = MQTTc_ERR_BUF_OVERFLOW;
+                goto err_callback_restart;
+            }
+            if (p_conn->NextMsgLen > p_conn->NextMsgPtr->BufLen) {
+                MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! Next msg len (%i) too big for msg buf (%i).\n\r",
+                                       p_conn->NextMsgLen,
+                                       p_conn->NextMsgPtr->BufLen));
+                p_conn->NextMsgPtr->Err = MQTTc_ERR_BUF_OVERFLOW;
+                goto err_callback_restart;
+            }
+        }
+    }
+
+                                                                /* At this point, p_conn->NextMsgPtr contains the ...   */
+                                                                /* next msg to process and all its infos have been ...  */
+                                                                /* rx'd. Only the payload still needs to be rx'd.       */
+    p_next_msg = p_conn->NextMsgPtr;
+
+    if (p_conn->NextMsgLen != 0u) {                             /* If there is more than the hdr to rx, rx it.          */
+        MQTTc_DBG_TRACE_DBG(("Rx'ing payload. Trying to read %i bytes. Already rx'd %i bytes.\n\r", p_conn->NextMsgLen, p_conn->NextMsgRxLen));
+
+        rx_len = MQTTc_SockRx(    p_conn,
+                              &(((CPU_INT08U *)p_next_msg->ArgPtr)[p_conn->NextMsgRxLen]),
+                                  p_conn->NextMsgLen,
+                                 &err_mqttc);
+        p_conn->NextMsgLen   -= rx_len;
+        p_conn->NextMsgRxLen += rx_len;
+        if (err_mqttc == MQTTc_ERR_FATAL) {
+            goto err_remove_conn_close_sock;
+        } else if (err_mqttc != MQTTc_ERR_NONE) {               /* Wait for more data to be avail to continue.          */
+            return;
+        }
+    }
+
+    MQTTc_DBG_TRACE_DBG(("Finished rx'ing msg payload. Rx'd %i bytes.\n\r", p_conn->NextMsgRxLen));
+
+                                                                /* At this point, the payload has been completely rx'd. */
+    MQTTc_DBG_GLOBAL_BUF_COPY((CPU_INT08U *)p_next_msg->ArgPtr, p_conn->NextMsgRxLen);
+
+
+    if (p_next_msg->Type == MQTTc_MSG_TYPE_PUBLISH) {           /* Rx'd a Publish msg from broker.                      */
+                                                                /* 'p_next_msg' points to p_conn->PublishRxMsgPtr.      */
+        p_next_msg->QoS = (p_conn->NextMsgHeader & MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_MSK) >> MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_BIT_SHIFT;
+
+
+                                                                /* Null-terminate rx'd msg payload.                     */
+        ((CPU_INT08U*)(p_next_msg->ArgPtr))[p_conn->NextMsgRxLen] = '\0';
+
+        if (p_next_msg->QoS == 0u) {                            /* If QoS is 0, msg is cmpl'd. Exec callback.           */
+            MQTTc_DBG_TRACE_LOG(("MQTTc - Read a Publish (QoS=0) successfully. Executing callback.\n\r"));
+            p_next_msg->Err = MQTTc_ERR_NONE;
+            MQTTc_MsgCallbackExec(p_next_msg);
+        } else {
+            MQTTc_MSG_TYPE  type   = MQTTc_MSG_TYPE_PUBREC;
+            CPU_INT16U      msg_id;
+            CPU_INT16U      len;
+
+
+            len    = MQTT_MSG_UTF8_LEN_RD(&(((CPU_INT08U *)p_next_msg->ArgPtr)[MQTTc_PUBLISH_RX_MSG_BUF_OFFSET])) + MQTT_MSG_UTF8_LEN_SIZE;
+            msg_id = MQTT_MSG_UTF8_LEN_RD(&(((CPU_INT08U *)p_next_msg->ArgPtr)[len + MQTTc_PUBLISH_RX_MSG_BUF_OFFSET]));
+
+            if (p_next_msg->QoS == 1u) {                        /* Callback must be called now only for QoS 1.          */
+                p_next_msg->Err = MQTTc_ERR_NONE;
+                MQTTc_MsgCallbackExec(p_next_msg);
+
+                type = MQTTc_MSG_TYPE_PUBACK;
+            }
+
+                                                                /* Cfg fixed hdr section of msg for reply.              */
+            p_buf = MQTTc_FixedHdrBufCfg((CPU_INT08U *)p_next_msg->ArgPtr,
+                                                       type,
+                                                       DEF_NO,
+                                                       0u,
+                                                       DEF_NO,
+                                                       MQTT_MSG_ID_SIZE,
+                                                      &p_next_msg->Err);
+
+            p_buf[0u] = (msg_id >>    8u);
+            p_buf[1u] = (msg_id &  0xFFu);
+
+            MQTTc_DBG_TRACE_LOG(("MQTTc - Read a Publish (QoS=%i) successfully. Sending a Puback/Pubrec with Msg ID: %i.\n\r", p_next_msg->QoS, msg_id));
+
+            MQTTc_SockSelDescSet(p_conn, MQTTc_SEL_DESC_TYPE_WR);
+
+            p_next_msg->Type    = type;
+            p_next_msg->State   = MQTTc_MSG_STATE_MUST_TX;
+            p_next_msg->XferLen = MQTT_MSG_BASE_LEN;
+            p_next_msg->MsgID   = msg_id;
+            p_next_msg->Err     = MQTTc_ERR_NONE;
+        }
+
+        MQTTc_ConnNextMsgClr(p_conn);                           /* Clr NextMsg fields.                                  */
+
+        return;
+    } else {
+        CPU_INT08U  *p_buf_topic_nbr;
+        CPU_INT08U   topic_nbr;
+        CPU_INT08U   topic_ix;
+
+
+        switch (p_next_msg->Type) {
+            case MQTTc_MSG_TYPE_CONNACK:
+                 if ((p_conn->NextMsgRxLen                   != 2u) ||
+                     (((CPU_INT08U *)p_next_msg->ArgPtr)[1u] != MQTT_MSG_VAR_HDR_CONNACK_RET_CODE_ACCEPTED)) {
+                     MQTTc_DBG_TRACE_DBG(("MQTTc - Connack code not OK.\n\r"));
+                     p_next_msg->Err = MQTTc_ERR_CONNACK_FAIL;
+                 } else {
+                     MQTTc_DBG_TRACE_DBG(("MQTTc - Connack code OK.\n\r"));
+                     p_next_msg->Err = MQTTc_ERR_NONE;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PUBACK:
+                 if (p_conn->NextMsgRxLen != 0u) {
+                     MQTTc_DBG_TRACE_DBG(("MQTTc - Puback rx'd code not OK.\n\r"));
+                     p_next_msg->Err = MQTTc_ERR_FAIL;
+                 } else {
+                     p_next_msg->Err = MQTTc_ERR_NONE;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_SUBACK:
+                 p_next_msg->Err = MQTTc_ERR_NONE;
+
+                 p_buf_topic_nbr = ((CPU_INT08U *)p_next_msg->ArgPtr) - 1u;
+                 topic_nbr       =   p_buf_topic_nbr[0u];
+
+                 for (topic_ix = 0u; topic_ix < topic_nbr; topic_ix++) {
+                     p_buf_topic_nbr--;
+                     if ((*p_buf_topic_nbr) != ((CPU_INT08U *)p_next_msg->ArgPtr)[topic_ix]) {
+                         p_next_msg->Err = MQTTc_ERR_QoS_LEVEL_NOT_GRANTED;
+                         MQTTc_DBG_TRACE_DBG(("!!! ERROR !!! QoS Level not granted by server. Asked %i, got %i\n\r",
+                                               *p_buf_topic_nbr,
+                                                p_next_msg->BufPtr[topic_ix]));
+                         break;
+                     }
+                 }
+
+                 if (p_conn->NextMsgRxLen == 0u) {
+                     MQTTc_DBG_TRACE_DBG(("MQTTc - Suback rx'd len not OK.\n\r"));
+                     p_next_msg->Err = MQTTc_ERR_FAIL;
+                 }
+                 p_next_msg->ArgPtr = (void *)p_buf_topic_nbr;
+                 break;
+
+
+            case MQTTc_MSG_TYPE_UNSUBACK:
+                 if (p_conn->NextMsgRxLen != 0u) {
+                     MQTTc_DBG_TRACE_DBG(("MQTTc - Suback rx'd len not OK.\n\r"));
+                     p_next_msg->Err = MQTTc_ERR_FAIL;
+                 } else {
+                     p_next_msg->Err = MQTTc_ERR_NONE;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PINGRESP:
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PUBREC:
+                 MQTTc_DBG_TRACE_LOG(("Pubrec event rx'd, removing msg from list."));
+
+                 p_buf = MQTTc_FixedHdrBufCfg((CPU_INT08U *)p_next_msg->ArgPtr,
+                                                            MQTTc_MSG_TYPE_PUBREL,
+                                                            DEF_NO,
+                                                            1u,
+                                                            DEF_NO,
+                                                            MQTT_MSG_ID_SIZE,
+                                                           &p_next_msg->Err);
+
+                 p_buf[0u] = (p_next_msg->MsgID >>    8u);
+                 p_buf[1u] = (p_next_msg->MsgID &  0xFFu);
+
+                 MQTTc_SockSelDescSet(p_conn, MQTTc_SEL_DESC_TYPE_WR);
+
+                 p_next_msg->Type    = MQTTc_MSG_TYPE_PUBREL;
+                 p_next_msg->State   = MQTTc_MSG_STATE_MUST_TX;
+                 p_next_msg->XferLen = MQTT_MSG_BASE_LEN;
+                 p_next_msg->Err     = MQTTc_ERR_NONE;
+
+                 MQTTc_ConnNextMsgClr(p_conn);                  /* Clr NextMsg fields.                                  */
+                 return;
+
+
+            case MQTTc_MSG_TYPE_PUBREL:
+                 MQTTc_DBG_TRACE_LOG(("Pubrel event rx'd, removing msg from list."));
+
+                 MQTTc_MsgCallbackExec(p_next_msg);
+
+                 p_buf = MQTTc_FixedHdrBufCfg((CPU_INT08U *)p_next_msg->ArgPtr,
+                                                            MQTTc_MSG_TYPE_PUBCOMP,
+                                                            DEF_NO,
+                                                            1u,
+                                                            DEF_NO,
+                                                            MQTT_MSG_ID_SIZE,
+                                                           &p_next_msg->Err);
+
+                 p_buf[0u] = (p_next_msg->MsgID >>    8u);
+                 p_buf[1u] = (p_next_msg->MsgID &  0xFFu);
+
+                 MQTTc_SockSelDescSet(p_conn, MQTTc_SEL_DESC_TYPE_WR);
+
+                 p_next_msg->Type    = MQTTc_MSG_TYPE_PUBCOMP;
+                 p_next_msg->State   = MQTTc_MSG_STATE_MUST_TX;
+                 p_next_msg->XferLen = MQTT_MSG_BASE_LEN;
+                 p_next_msg->Err     = MQTTc_ERR_NONE;
+
+                 MQTTc_ConnNextMsgClr(p_conn);                  /* Clr NextMsg fields.                                  */
+                 return;
+
+
+            case MQTTc_MSG_TYPE_PUBCOMP:
+                 if (p_conn->NextMsgRxLen != 0u) {
+                     MQTTc_DBG_TRACE_DBG(("MQTTc - Pubcomp rx'd len not OK.\n\r"));
+                     p_next_msg->Err = MQTTc_ERR_FAIL;
+                 } else {
+                     p_next_msg->Err = MQTTc_ERR_NONE;
+                 }
+                 break;
+
+
+            default:
+                 MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! In Rx switch default case.\n\r"));
+                 break;
+        }
+
+        MQTTc_ConnNextMsgClr(p_conn);                           /* Clr NextMsg fields.                                  */
+
+        MQTTc_MsgCallbackExec(p_next_msg);
+    }
+
+    return;
+
+err_callback_restart:
+    MQTTc_MsgCallbackExec(p_conn->NextMsgPtr);
+    MQTTc_ConnNextMsgClr(p_conn);                               /* Clr NextMsg fields.                                  */
+
+    return;
+
+err_restart:
+    MQTTc_ConnNextMsgClr(p_conn);                               /* Clr NextMsg fields.                                  */
+    err_mqttc = MQTTc_ERR_UNEXPECTED_MSG;
+
+err_remove_conn_close_sock:
+    {
+        MQTTc_ERR_CALLBACK   on_err_callback;
+        void                *p_arg;
+        MQTTc_ERR            close_err;
+
+
+        on_err_callback = p_conn->OnErrCallback;
+        p_arg           = p_conn->ArgPtr;
+
+        MQTTc_ConnCloseProc(p_conn,
+                           &close_err);
+        (void)close_err;
+
+        if (on_err_callback != DEF_NULL) {
+            on_err_callback(p_conn,
+                            p_arg,
+                            err_mqttc);
+        }
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          MQTTc_MsgProcess()
+*
+* Description : Process message pending and enqueuing for MQTTc task.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_MsgProcess (void)
+{
+    MQTTc_MSG  *p_msg;
+
+
+    p_msg = MQTTc_MsgCheck();
+    if (p_msg != DEF_NULL) {
+        if (p_msg->Type != MQTTc_MSG_TYPE_REQ_CLOSE) {
+            MQTTc_CONN      *p_conn = p_msg->ConnPtr;
+            MQTTc_MSG_TYPE   type   = p_msg->Type;
+
+
+            if (p_conn->TxMsgHeadPtr == DEF_NULL) {                 /* Enqueue msg to appropriate MQTTc conn.               */
+                p_conn->TxMsgHeadPtr = p_msg;
+            } else {
+                MQTTc_MSG  *p_iter_msg = p_conn->TxMsgHeadPtr;
+
+
+                while (p_iter_msg->NextPtr != DEF_NULL) {
+                    p_iter_msg = p_iter_msg->NextPtr;
+                }
+                p_iter_msg->NextPtr = p_msg;
+            }
+
+            switch (type) {
+                case MQTTc_MSG_TYPE_CONNECT:
+                     if (MQTTc_Ptr->ConnHeadPtr == DEF_NULL) {       /* Enqueue conn in MQTTc conn list.                     */
+                         MQTTc_Ptr->ConnHeadPtr = p_conn;
+                     } else {
+                         MQTTc_CONN  *p_iter_conn = MQTTc_Ptr->ConnHeadPtr;
+
+
+                         while (p_iter_conn->NextPtr != DEF_NULL) {
+                             p_iter_conn = p_iter_conn->NextPtr;
+                         }
+                         p_iter_conn->NextPtr = p_conn;
+                     }
+                                                                    /* break intentionally omitted.                         */
+                case MQTTc_MSG_TYPE_PUBLISH:
+                case MQTTc_MSG_TYPE_PUBREL:
+                case MQTTc_MSG_TYPE_SUBSCRIBE:
+                case MQTTc_MSG_TYPE_UNSUBSCRIBE:
+                case MQTTc_MSG_TYPE_PINGREQ:
+                case MQTTc_MSG_TYPE_DISCONNECT:
+                     MQTTc_SockSelDescSet(p_conn, MQTTc_SEL_DESC_TYPE_WR);
+                     break;
+
+
+                case MQTTc_MSG_TYPE_PUBACK:
+                case MQTTc_MSG_TYPE_PUBREC:
+                case MQTTc_MSG_TYPE_PUBCOMP:
+                case MQTTc_MSG_TYPE_CONNACK:
+                case MQTTc_MSG_TYPE_SUBACK:
+                case MQTTc_MSG_TYPE_UNSUBACK:
+                case MQTTc_MSG_TYPE_PINGRESP:
+                default:
+                     MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! In default case for event type:%i\n\r", type));
+                     break;
+            }
+        } else {                                                /* Handle special close req msg.                        */
+            KAL_ERR  err_kal;
+
+
+            MQTTc_ConnCloseProc(p_msg->ConnPtr,
+                               &p_msg->Err);
+
+            KAL_SemPost((*(KAL_SEM_HANDLE *)p_msg->ArgPtr),
+                        KAL_OPT_POST_NONE,
+                       &err_kal);
+            (void)&err_kal;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        MQTTc_MsgCallbackExec()
+*
+* Description : Frees msg if provided by user and execute application callback(s).
+*
+* Argument(s) : p_msg           Pointer to message for which the callback must be called.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_RdSockProcess(),
+*               MQTTc_WrSockProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_MsgCallbackExec (MQTTc_MSG  *p_msg)
+{
+    MQTTc_CMPL_CALLBACK   callback_fnct = DEF_NULL;
+    MQTTc_CONN           *p_conn        = p_msg->ConnPtr;
+    MQTTc_ERR             err           = MQTTc_ERR_NONE;
+
+
+    if (p_msg != p_conn->PublishRxMsgPtr) {
+        switch (p_msg->Type) {                                  /* Find type of msg and if ok to call callback for it.  */
+            case MQTTc_MSG_TYPE_CONNECT:
+                 err = MQTTc_ERR_FAIL;
+                                                                /* break intentionally omitted.                         */
+            case MQTTc_MSG_TYPE_CONNACK:
+                 p_msg->Type   = MQTTc_MSG_TYPE_CONNECT;
+                 callback_fnct = p_conn->OnConnectCmpl;
+                 if (p_msg->State != MQTTc_MSG_STATE_WAIT_RX) {
+                     err = MQTTc_ERR_FAIL;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PUBLISH:
+                 callback_fnct = p_conn->OnPublishCmpl;
+                 if ((p_msg->QoS   != 0u) ||
+                     (p_msg->State != MQTTc_MSG_STATE_WAIT_TX_CMPL)) {
+                     err = MQTTc_ERR_FAIL;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PUBACK:
+            case MQTTc_MSG_TYPE_PUBCOMP:
+                 p_msg->Type   = MQTTc_MSG_TYPE_PUBLISH;
+                 callback_fnct = p_conn->OnPublishCmpl;
+                 if (p_msg->State != MQTTc_MSG_STATE_WAIT_RX) {
+                     err = MQTTc_ERR_FAIL;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PUBREC:
+            case MQTTc_MSG_TYPE_PUBREL:
+                 p_msg->Type   = MQTTc_MSG_TYPE_PUBLISH;
+                 callback_fnct = p_conn->OnPublishCmpl;
+                 err = MQTTc_ERR_FAIL;
+                 break;
+
+
+            case MQTTc_MSG_TYPE_SUBSCRIBE:
+                 err = MQTTc_ERR_FAIL;
+                                                                /* break intentionally omitted.                         */
+            case MQTTc_MSG_TYPE_SUBACK:
+                 p_msg->Type   = MQTTc_MSG_TYPE_SUBSCRIBE;
+                 callback_fnct = p_conn->OnSubscribeCmpl;
+                 if (p_msg->State != MQTTc_MSG_STATE_WAIT_RX) {
+                     err = MQTTc_ERR_FAIL;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_UNSUBSCRIBE:
+                 err = MQTTc_ERR_FAIL;
+                                                                /* break intentionally omitted.                         */
+            case MQTTc_MSG_TYPE_UNSUBACK:
+                 p_msg->Type   = MQTTc_MSG_TYPE_UNSUBSCRIBE;
+                 callback_fnct = p_conn->OnUnsubscribeCmpl;
+                 if (p_msg->State != MQTTc_MSG_STATE_WAIT_RX) {
+                     err = MQTTc_ERR_FAIL;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_PINGREQ:
+                 err = MQTTc_ERR_FAIL;
+            case MQTTc_MSG_TYPE_PINGRESP:
+                 p_msg->Type   = MQTTc_MSG_TYPE_PINGREQ;
+                 callback_fnct = p_conn->OnPingReqCmpl;
+                 if (p_msg->State != MQTTc_MSG_STATE_WAIT_RX) {
+                     err = MQTTc_ERR_FAIL;
+                 }
+                 break;
+
+
+            case MQTTc_MSG_TYPE_DISCONNECT:
+                 p_msg->Type   = MQTTc_MSG_TYPE_DISCONNECT;
+                 callback_fnct = p_conn->OnDisconnectCmpl;
+                 if (p_msg->State != MQTTc_MSG_STATE_WAIT_TX_CMPL) {
+                     err = MQTTc_ERR_FAIL;
+                 }
+                 break;
+
+
+            default:
+                 MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! In default case for p_event->Type when executing callback:%i\n\r", p_msg->Type));
+                 return;
+        }
+
+        if (err != MQTTc_ERR_NONE) {
+            MQTTc_DBG_TRACE_DBG(("!!! ERROR !!! Detected error when executing callback: %i\n\r", err));
+        }
+
+        if (p_msg->Err == MQTTc_ERR_NONE) {
+            p_msg->Err = err;
+        } else  {
+            MQTTc_DBG_TRACE_DBG(("MQTTc - Callback executed for Msg with error: %i\n\r", p_msg->Err));
+        }
+
+        p_msg->State = MQTTc_MSG_STATE_CMPL;
+
+        MQTTc_MsgID_Free(p_msg->MsgID);                         /* Free msg ID, if any.                                 */
+
+                                                                /* Remove msg from conn's msg list.                     */
+                                                                /* Msg is necessarily located at head of list.          */
+        p_msg->ConnPtr->TxMsgHeadPtr = p_msg->NextPtr;
+        p_msg->NextPtr               = DEF_NULL;
+
+        if (p_conn->OnCmpl != DEF_NULL) {                       /* Call generic callback, if not NULL.                  */
+            p_conn->OnCmpl(p_conn,
+                           p_msg,
+                           p_conn->ArgPtr,
+                           p_msg->Err);
+        }
+
+        if (callback_fnct != DEF_NULL) {                        /* Call action-specific callback, if not NULL.          */
+            callback_fnct(p_conn,
+                          p_msg,
+                          p_conn->ArgPtr,
+                          p_msg->Err);
+        }
+    } else if (p_conn->OnPublishRx != DEF_NULL) {               /* Call OnPublishRx callback, if not NULL.              */
+        CPU_INT08U  *p_buf_start   = &(((CPU_INT08U *)p_msg->ArgPtr)[MQTTc_PUBLISH_RX_MSG_BUF_OFFSET]);
+        CPU_INT08U  *p_buf_topic   = &p_buf_start[MQTT_MSG_UTF8_LEN_SIZE];
+        CPU_INT08U  *p_buf_payload;
+        CPU_INT32U   topic_len;
+        CPU_INT32U   len;
+
+
+        MQTTc_DBG_GLOBAL_BUF_COPY(p_buf_start, 512u);
+
+        topic_len = MQTT_MSG_UTF8_LEN_RD(p_buf_start);
+        len       = topic_len + MQTT_MSG_UTF8_LEN_SIZE;         /* Account for length.                                  */
+
+        if (p_msg->QoS != 0u) {                                 /* Account for msg ID size if needed.                   */
+            len += MQTT_MSG_ID_SIZE;
+        }
+
+        p_buf_payload = &p_buf_start[len];
+
+        p_conn->OnPublishRx(                  p_conn,
+                            (const CPU_CHAR *)p_buf_topic,
+                                              topic_len,
+                            (const CPU_CHAR *)p_buf_payload,
+                                              p_conn->ArgPtr,
+                                              p_msg->Err);
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           MQTTc_MsgCheck()
+*
+* Description : See if a message is available in the message queue.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Pointer to obtained message, if any,
+*               DEF_NULL,                    otherwise.
+*
+* Caller(s)   : MQTTc_MsgProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  MQTTc_MSG  *MQTTc_MsgCheck (void)
+{
+    MQTTc_MSG  *p_msg = DEF_NULL;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    if (MQTTc_Ptr->MsgListHeadPtr != DEF_NULL) {
+        p_msg                     = MQTTc_Ptr->MsgListHeadPtr;
+        MQTTc_Ptr->MsgListHeadPtr = p_msg->NextPtr;
+        p_msg->NextPtr            = DEF_NULL;
+    }
+    CPU_CRITICAL_EXIT();
+
+    return (p_msg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc_MsgPost()
+*
+* Description : Add a message in the MQTT message queue for the task to process.
+*
+* Argument(s) : p_conn          Pointer to MQTT Connection object associated with message.
+*
+*               p_msg           Pointer to MQTT Message object to add to queue.
+*
+*               type            Type of MQTT message.
+*
+*               xfer_len        Required len to xfer.
+*
+*               qos_lvl         QoS level of the message, if any.
+*
+*               msg_id          Message ID of the message, if any.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_OS_FAIL           OS operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various MQTTc functions.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_MsgPost (MQTTc_CONN      *p_conn,
+                             MQTTc_MSG       *p_msg,
+                             MQTTc_MSG_TYPE   type,
+                             CPU_INT32U       xfer_len,
+                             CPU_INT08U       qos_lvl,
+                             CPU_INT16U       msg_id,
+                             MQTTc_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    p_msg->ConnPtr = p_conn;                                    /* Set values in msg fields.                            */
+    p_msg->Type    = type;
+    p_msg->State   = MQTTc_MSG_STATE_MUST_TX;
+    p_msg->MsgID   = msg_id;
+    p_msg->XferLen = xfer_len;
+    p_msg->QoS     = qos_lvl;
+    p_msg->Err     = MQTTc_ERR_NONE;
+    p_msg->NextPtr = DEF_NULL;
+
+    CPU_CRITICAL_ENTER();
+    if (p_conn->SockId != NET_SOCK_ID_NONE) {
+
+        if (MQTTc_Ptr->MsgListHeadPtr != DEF_NULL) {
+            MQTTc_Ptr->MsgListTailPtr->NextPtr = p_msg;
+        } else {
+            MQTTc_Ptr->MsgListHeadPtr = p_msg;
+        }
+        MQTTc_Ptr->MsgListTailPtr = p_msg;
+
+        CPU_CRITICAL_EXIT();
+
+        MQTTc_SockSelDescSet(p_conn, MQTTc_SEL_DESC_TYPE_WR);
+
+       *p_err = MQTTc_ERR_NONE;
+    } else {
+        CPU_CRITICAL_EXIT();
+
+       *p_err = MQTTc_ERR_CONN_IS_CLOSED;
+    }
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   MQTTc_MsgListClosedCallbackExec()
+*
+* Description : Execute callback with error MQTTc_ERR_CONN_IS_CLOSED on every message in linked list.
+*
+* Argument(s) : p_head_msg      Pointer to head of list of messages to execute callback on.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_ConnCloseProc(),
+*               MQTTc_WrSockProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_MsgListClosedCallbackExec (MQTTc_MSG  *p_head_msg)
+{
+    MQTTc_MSG  *p_iter_msg;
+    MQTTc_MSG  *p_next_iter_msg;
+
+
+    p_iter_msg = p_head_msg;                                    /* Exec callback for every msg in list passed.          */
+    while (p_iter_msg != DEF_NULL) {
+
+        p_next_iter_msg = p_iter_msg->NextPtr;
+        p_iter_msg->Err = MQTTc_ERR_CONN_IS_CLOSED;             /* Indicate conn is closed.                             */
+        MQTTc_MsgCallbackExec(p_iter_msg);
+
+        p_iter_msg = p_next_iter_msg;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        MQTTc_FixedHdrBufCfg()
+*
+* Description : Fill buffer with correct fields of fixed header.
+*
+* Argument(s) : p_buf           Pointer to beginning of the buffer to fill.
+*
+*               msg_type        Type of message.
+*
+*               dup_flag        DUP flag.
+*
+*               qos_lvl         QoS level of the message.
+*
+*               retain_flag     Retain flag.
+*
+*               rem_len         Remaining length of the message.
+*
+*               p_err           Pointer to variable that will receive the return error code.
+*               -----           Argument validated by caller.
+*                                   MQTTc_ERR_NONE              Operation successful.
+*                                   MQTTc_ERR_NULL_PTR          Null ptr was passed as argument.
+*                                   MQTTc_ERR_INVALID_ARG       Invalid arg passed to function.
+*
+* Return(s)   : Pointer to next location in buffer, if NO error(s),
+*               DEF_NULL,                           otherwise.
+*
+* Caller(s)   : Various MQTTc functions.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  *MQTTc_FixedHdrBufCfg (CPU_INT08U      *p_buf,
+                                           MQTTc_MSG_TYPE   msg_type,
+                                           CPU_BOOLEAN      dup_flag,
+                                           CPU_INT08U       qos_lvl,
+                                           CPU_BOOLEAN      retain_flag,
+                                           CPU_INT32U       rem_len,
+                                           MQTTc_ERR       *p_err)
+{
+    CPU_INT08U  *p_cur_buf;
+    CPU_INT32U   encoded_len;
+    CPU_INT32U   val;
+    CPU_INT32U   len            = rem_len;
+    CPU_INT08U   byte_bit_shift = 0u;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_buf == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return (0u);
+        }
+
+        if (rem_len > MQTT_MSG_FIXED_HDR_REM_LEN_MAX) {         /* Make sure len can be encoded.                        */
+           *p_err = MQTTc_ERR_INVALID_ARG;
+            return (0u);
+        }
+    #endif
+
+    p_cur_buf = p_buf;
+
+    switch (msg_type) {                                         /* Convert msg type.                                    */
+        case MQTTc_MSG_TYPE_CONNECT:
+            *p_cur_buf = MQTT_MSG_TYPE_CONNECT;
+             break;
+
+        case MQTTc_MSG_TYPE_CONNACK:
+            *p_cur_buf = MQTT_MSG_TYPE_CONNACK;
+             break;
+
+        case MQTTc_MSG_TYPE_PUBLISH:
+            *p_cur_buf = MQTT_MSG_TYPE_PUBLISH;
+             break;
+
+        case MQTTc_MSG_TYPE_PUBACK:
+            *p_cur_buf = MQTT_MSG_TYPE_PUBACK;
+             break;
+
+        case MQTTc_MSG_TYPE_PUBREC:
+            *p_cur_buf = MQTT_MSG_TYPE_PUBREC;
+             break;
+
+        case MQTTc_MSG_TYPE_PUBREL:
+            *p_cur_buf = MQTT_MSG_TYPE_PUBREL;
+             break;
+
+        case MQTTc_MSG_TYPE_PUBCOMP:
+            *p_cur_buf = MQTT_MSG_TYPE_PUBCOMP;
+             break;
+
+        case MQTTc_MSG_TYPE_SUBSCRIBE:
+            *p_cur_buf = MQTT_MSG_TYPE_SUBSCRIBE;
+             break;
+
+        case MQTTc_MSG_TYPE_SUBACK:
+            *p_cur_buf = MQTT_MSG_TYPE_SUBACK;
+             break;
+
+        case MQTTc_MSG_TYPE_UNSUBSCRIBE:
+            *p_cur_buf = MQTT_MSG_TYPE_UNSUBSCRIBE;
+             break;
+
+        case MQTTc_MSG_TYPE_UNSUBACK:
+            *p_cur_buf = MQTT_MSG_TYPE_UNSUBACK;
+             break;
+
+        case MQTTc_MSG_TYPE_PINGREQ:
+            *p_cur_buf = MQTT_MSG_TYPE_PINGREQ;
+             break;
+
+        case MQTTc_MSG_TYPE_PINGRESP:
+            *p_cur_buf = MQTT_MSG_TYPE_PINGRESP;
+             break;
+
+        case MQTTc_MSG_TYPE_DISCONNECT:
+            *p_cur_buf = MQTT_MSG_TYPE_DISCONNECT;
+             break;
+
+        default:
+             break;
+    }
+
+
+    switch (msg_type) {
+        case MQTTc_MSG_TYPE_PUBLISH:                            /* Set every val.                                       */
+             if (retain_flag == DEF_YES) {
+                 DEF_BIT_SET(*p_cur_buf, MQTT_MSG_FIXED_HDR_FLAGS_RETAIN_MSK);
+             } else {
+                 DEF_BIT_CLR(*p_cur_buf, MQTT_MSG_FIXED_HDR_FLAGS_RETAIN_MSK);
+             }
+                                                                /* break intentionnally omitted.                        */
+        case MQTTc_MSG_TYPE_PUBREL:                             /* Set everything except 'retain'.                      */
+        case MQTTc_MSG_TYPE_SUBSCRIBE:
+        case MQTTc_MSG_TYPE_UNSUBSCRIBE:
+             if (dup_flag == DEF_YES) {
+                 DEF_BIT_SET(*p_cur_buf, MQTT_MSG_FIXED_HDR_FLAGS_DUP_MSK);
+             } else {
+                 DEF_BIT_CLR(*p_cur_buf, MQTT_MSG_FIXED_HDR_FLAGS_DUP_MSK);
+             }
+             DEF_BIT_SET(*p_cur_buf, (qos_lvl << MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_BIT_SHIFT));
+                                                                /* break intentionnally omitted.                        */
+        case MQTTc_MSG_TYPE_CONNECT:                            /* Set only the msg_type.                               */
+        case MQTTc_MSG_TYPE_PUBACK:
+        case MQTTc_MSG_TYPE_PUBREC:
+        case MQTTc_MSG_TYPE_PUBCOMP:
+        case MQTTc_MSG_TYPE_PINGREQ:
+        case MQTTc_MSG_TYPE_DISCONNECT:
+             break;
+
+
+        case MQTTc_MSG_TYPE_CONNACK:                            /* Err cases.                                           */
+        case MQTTc_MSG_TYPE_SUBACK:
+        case MQTTc_MSG_TYPE_UNSUBACK:
+        case MQTTc_MSG_TYPE_PINGRESP:
+        default:
+             MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! In default case for msg_type:%i\n\r", msg_type));
+             break;
+    }
+
+    encoded_len = 0u;                                       /* Encode rem_len with Continuation Bit, if needed.     */
+    do {
+        val          = (len) % (MQTT_MSG_FIXED_HDR_REM_LEN_MAX_LEN << byte_bit_shift);
+        len         -=  val;
+        encoded_len +=  val;
+
+        if ((len) > 0u) {
+            DEF_BIT_SET((encoded_len), (MQTT_MSG_FIXED_HDR_REM_LEN_CONTINUATION_BIT << byte_bit_shift));
+        }
+        byte_bit_shift += 8u;
+    } while ((len) > 0u);
+
+    do  {                                                   /* Write encoded len in buf.                            */
+        p_cur_buf++;
+       *p_cur_buf   = (encoded_len & 0xFFu);
+        encoded_len =  encoded_len >> 8u;
+    } while (encoded_len != 0u);
+
+    p_cur_buf++;
+
+   *p_err = MQTTc_ERR_NONE;
+
+    return (p_cur_buf);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           MQTTc_MsgID_Get()
+*
+* Description : Obtain a msg ID to use for a message requiring one.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Message ID,          if NO error(s),
+*               MQTT_MSG_ID_INVALID, otherwise.
+*
+* Caller(s)   : MQTTc_Publish(),
+*               MQTTc_SubscribeMult(),
+*               MQTTc_UnsubscribeMult().
+*
+* Note(s)     : (1) Once the message has been completed, MQTTc_MsgID_Free() must be called to release the
+*                   msg ID so that other messages can use it.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U   MQTTc_MsgID_Get (void)
+{
+    CPU_INT16U  msg_id    = MQTT_MSG_ID_INVALID;
+    CPU_INT08U  bitmap_ix;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    for (bitmap_ix = 0u; bitmap_ix < MQTTc_Ptr->MsgID_BitmapTblMax; bitmap_ix++) {
+        if (DEF_BIT_IS_CLR_ANY(MQTTc_Ptr->MsgID_BitmapTbl[bitmap_ix], DEF_INT_32_MASK) == DEF_YES) {
+
+            msg_id = DEF_INT_32_NBR_BITS - 1u - CPU_CntLeadZeros(~MQTTc_Ptr->MsgID_BitmapTbl[bitmap_ix]);
+
+            DEF_BIT_SET(MQTTc_Ptr->MsgID_BitmapTbl[bitmap_ix], DEF_BIT(msg_id));
+            msg_id += (DEF_INT_32_NBR_BITS * bitmap_ix) + 1u;
+            break;
+        }
+    }
+    CPU_CRITICAL_EXIT();
+
+    return (msg_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          MQTTc_MsgID_Free()
+*
+* Description : Free message ID, allowing other messages to use it.
+*
+* Argument(s) : msg_id          Message ID to release.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_MsgCallbackExec().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_MsgID_Free (CPU_INT16U  msg_id)
+{
+    CPU_SR_ALLOC();
+
+
+    if (msg_id != MQTT_MSG_ID_NONE) {
+        CPU_CRITICAL_ENTER();
+        DEF_BIT_CLR(MQTTc_Ptr->MsgID_BitmapTbl[(msg_id - 1u) / 32u], DEF_BIT((msg_id - 1u) % DEF_INT_32_NBR_BITS));
+        CPU_CRITICAL_EXIT();
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        MQTTc_ConnNextMsgClr()
+*
+* Description : Clear next message fields in MQTTc Connection object.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object for which to clear the NextMsg fields.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_ConnClr(),
+*               MQTTc_RdSockProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_ConnNextMsgClr (MQTTc_CONN  *p_conn)
+{
+    p_conn->NextMsgHeader       = DEF_BIT_NONE;                 /* Clr NextMsg fields.                                  */
+    p_conn->NextMsgRxLen        = 0u;
+    p_conn->NextMsgType         = MQTTc_MSG_TYPE_NONE;
+    p_conn->NextMsgLen          = 0u;
+    p_conn->NextMsgLenIsCmpl    = DEF_NO;
+    p_conn->NextMsgMsgID        = MQTT_MSG_ID_NONE;
+    p_conn->NextMsgMsgID_IsCmpl = DEF_NO;
+    p_conn->NextMsgPtr          = DEF_NULL;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         MQTTc_ConnCloseProc()
+*
+* Description : Process the close operation for a given MQTTc Connection object.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object to close.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*                                   MQTTc_ERR_NONE               Operation successful.
+*
+*                               --------------- See NetSock_Close() for more error codes. ---------------
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_MsgProcess(),
+*               MQTTc_RdSockProcess(),
+*               MQTTc_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_ConnCloseProc (MQTTc_CONN  *p_conn,
+                                   MQTTc_ERR   *p_err)
+{
+    MQTTc_MSG  *p_head_callback_msg = DEF_NULL;
+    MQTTc_MSG  *p_tail_callback_msg = DEF_NULL;
+    MQTTc_MSG  *p_iter_msg;
+    MQTTc_MSG  *p_next_iter_msg;
+    MQTTc_MSG  *p_prev_iter_msg     = DEF_NULL;
+    CPU_SR_ALLOC();
+
+
+    MQTTc_SockConnClose(p_conn,
+                        p_err);
+
+    MQTTc_ConnRemove(p_conn);
+
+    CPU_CRITICAL_ENTER();
+    p_conn->SockId = NET_SOCK_ID_NONE;                          /* Mark the conn as unusable.                           */
+
+    p_iter_msg = MQTTc_Ptr->MsgListHeadPtr;
+    while (p_iter_msg != DEF_NULL) {                            /* Iterate in list of posted msg.                       */
+        p_next_iter_msg = p_iter_msg->NextPtr;
+
+        if (p_iter_msg->ConnPtr == p_conn) {                    /* See if msg was posted on same conn that is closing.  */
+            if (p_head_callback_msg == DEF_NULL) {              /* Append msg at list of msg to free.                   */
+                p_head_callback_msg = p_iter_msg;
+                p_tail_callback_msg = p_iter_msg;
+            } else {
+                p_tail_callback_msg->NextPtr = p_iter_msg;
+                p_tail_callback_msg          = p_iter_msg;
+            }
+
+            if (p_prev_iter_msg != DEF_NULL) {                  /* Make sure prev msg is point at correct next msg.     */
+                p_prev_iter_msg->NextPtr = p_next_iter_msg;
+            } else {
+                MQTTc_Ptr->MsgListHeadPtr = p_next_iter_msg;
+            }
+        } else {
+            p_prev_iter_msg = p_iter_msg;
+        }
+
+        p_iter_msg = p_next_iter_msg;
+    }
+    CPU_CRITICAL_EXIT();
+
+    MQTTc_MsgListClosedCallbackExec(p_conn->TxMsgHeadPtr);      /* Exec callbacks for msgs q'd under this conn.         */
+    p_conn->TxMsgHeadPtr = DEF_NULL;                            /* Mark list as empty.                                  */
+
+                                                                /* Exec callback, in order, for each msg that had ...   */
+    MQTTc_MsgListClosedCallbackExec(p_head_callback_msg);       /* been posted but not processed, for that conn.        */
+}
+
+
+/*
+*********************************************************************************************************
+*                                          MQTTc_ConnRemove()
+*
+* Description : Remove MQTTc Connection object from global connection list.
+*
+* Argument(s) : p_conn          Pointer to MQTTc Connection object to remove from list.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_ConnCloseProc(),
+*               MQTTc_WrSockProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  MQTTc_ConnRemove (MQTTc_CONN  *p_conn)
+{
+    MQTTc_SockSelDescClr(p_conn, MQTTc_SEL_DESC_TYPE_RD);
+    MQTTc_SockSelDescClr(p_conn, MQTTc_SEL_DESC_TYPE_WR);
+    MQTTc_SockSelDescClr(p_conn, MQTTc_SEL_DESC_TYPE_ERR);
+
+    if (MQTTc_Ptr->ConnHeadPtr == p_conn) {                     /* If conn is located at head of list.                  */
+        MQTTc_Ptr->ConnHeadPtr = p_conn->NextPtr;
+    } else {
+        MQTTc_CONN  *p_iter_conn = MQTTc_Ptr->ConnHeadPtr;
+
+
+                                                                /* Loop to find good conn.                              */
+        while ((p_iter_conn->NextPtr != p_conn) &&
+               (p_iter_conn->NextPtr != DEF_NULL)) {
+            p_iter_conn = p_iter_conn->NextPtr;
+        }
+        if (p_iter_conn->NextPtr != DEF_NULL) {
+            p_iter_conn->NextPtr = p_conn->NextPtr;
+        } else {
+            MQTTc_DBG_TRACE_INFO(("!!! ERROR !!! Could not find conn in conn list.\r\n"));
+        }
+    }
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c.h b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c.h
new file mode 100644
index 0000000..ebeeff9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c.h
@@ -0,0 +1,549 @@
+/*
+*********************************************************************************************************
+*                                               uC/MQTTc
+*                                Message Queue Telemetry Transport Client
+*
+*                         (c) Copyright 2014-2016; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/MQTTc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             MQTT CLIENT
+*
+* Filename      : mqtt-c.h
+* Version       : V1.00.01
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the MQTTc module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  MQTTc_MODULE_PRESENT
+#define  MQTTc_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        MQTTc VERSION NUMBER
+*
+* Note(s) : (1) (a) The MQTTc module software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The MQTTc software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MQTTc_VERSION                                 10000u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MQTTc_FLAGS_NONE                       DEF_BIT_NONE    /* Reserved for future usage.                           */
+
+
+/*
+*********************************************************************************************************
+*                                               TRACING
+*********************************************************************************************************
+*/
+
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                                   0u
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                                  1u
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                                   2u
+#endif
+
+#ifndef  MQTTc_CFG_DBG_TRACE_LEVEL
+#define  MQTTc_CFG_DBG_TRACE_LEVEL                          TRACE_LEVEL_OFF
+#endif
+
+#ifndef  MQTTc_CFG_DBG_TRACE
+#define  MQTTc_CFG_DBG_TRACE                                printf
+#endif
+
+#if ((defined(MQTTc_CFG_DBG_TRACE))       && \
+     (defined(MQTTc_CFG_DBG_TRACE_LEVEL)) && \
+     (MQTTc_CFG_DBG_TRACE_LEVEL >= TRACE_LEVEL_INFO))
+
+    #if (MQTTc_CFG_DBG_TRACE_LEVEL >= TRACE_LEVEL_LOG)
+        #define  MQTTc_DBG_TRACE_LOG(msg)     MQTTc_CFG_DBG_TRACE  msg
+    #else
+        #define  MQTTc_DBG_TRACE_LOG(msg)
+    #endif
+
+    #if (MQTTc_CFG_DBG_TRACE_LEVEL >= TRACE_LEVEL_DBG)
+        #define  MQTTc_DBG_TRACE_DBG(msg)     MQTTc_CFG_DBG_TRACE  msg
+    #else
+        #define  MQTTc_DBG_TRACE_DBG(msg)
+    #endif
+
+    #define  MQTTc_DBG_TRACE_INFO(msg)        MQTTc_CFG_DBG_TRACE  msg
+#else
+    #define  MQTTc_DBG_TRACE_LOG(msg)
+    #define  MQTTc_DBG_TRACE_DBG(msg)
+    #define  MQTTc_DBG_TRACE_INFO(msg)
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct  mqttc_conn  MQTTc_CONN;                        /* Forward declaration of MQTTc_CONN.                   */
+typedef  struct  mqttc_msg   MQTTc_MSG;                         /* Forward declaration of MQTTc_MSG.                    */
+
+
+/*
+*********************************************************************************************************
+*                                           MQTTc PARAM TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  mqttc_param_type {
+    MQTTc_PARAM_TYPE_BROKER_IP_ADDR,                            /* Conn's broker's IP addr.                             */
+    MQTTc_PARAM_TYPE_BROKER_NAME,                               /* Conn's broker's name.                                */
+    MQTTc_PARAM_TYPE_BROKER_PORT_NBR,                           /* Conn's broker's port nbr.                            */
+    MQTTc_PARAM_TYPE_INACTIVITY_TIMEOUT_S,                      /* Conn's inactivity timeout, in seconds.               */
+    MQTTc_PARAM_TYPE_CLIENT_ID_STR,                             /* Conn's client ID str.                                */
+    MQTTc_PARAM_TYPE_USERNAME_STR,                              /* Conn's client username str.                          */
+    MQTTc_PARAM_TYPE_PASSWORD_STR,                              /* Conn's client password str.                          */
+    MQTTc_PARAM_TYPE_KEEP_ALIVE_TMR_SEC,                        /* Conn's keep alive tmr, in seconds.                   */
+    MQTTc_PARAM_TYPE_WILL_CFG_PTR,                              /* Conn's will cfg ptr, if any.                         */
+    MQTTc_PARAM_TYPE_SECURE_CFG_PTR,                            /* Conn's ptr to secure cfg struct.                     */
+
+    MQTTc_PARAM_TYPE_CALLBACK_ON_COMPL,                         /* Conn's generic on     cmpl callback.                 */
+    MQTTc_PARAM_TYPE_CALLBACK_ON_CONNECT_CMPL,                  /* Conn's on connect     cmpl callback.                 */
+    MQTTc_PARAM_TYPE_CALLBACK_ON_PUBLISH_CMPL,                  /* Conn's on publish     cmpl callback.                 */
+    MQTTc_PARAM_TYPE_CALLBACK_ON_SUBSCRIBE_CMPL,                /* Conn's on subscribe   cmpl callback.                 */
+    MQTTc_PARAM_TYPE_CALLBACK_ON_UNSUBSCRIBE_CMPL,              /* Conn's on unsubscribe cmpl callback.                 */
+    MQTTc_PARAM_TYPE_CALLBACK_ON_PINGREQ_CMPL,                  /* Conn's on pingreq     cmpl callback.                 */
+    MQTTc_PARAM_TYPE_CALLBACK_ON_DISCONNECT_CMPL,               /* Conn's on disconnect  cmpl callback.                 */
+    MQTTc_PARAM_TYPE_CALLBACK_ON_ERR_CALLBACK,                  /* Conn's on err              callback.                 */
+
+    MQTTc_PARAM_TYPE_CALLBACK_ON_PUBLISH_RX,                    /* Conn's on publish rx'd callback.                     */
+
+    MQTTc_PARAM_TYPE_CALLBACK_ARG_PTR,                          /* Conn's ptr on arg passed to callback.                */
+
+    MQTTc_PARAM_TYPE_TIMEOUT_MS,                                /* Conn's 'Open' timeout, in milliseconds.              */
+
+    MQTTc_PARAM_TYPE_PUBLISH_RX_MSG_PTR,                        /* Conn's ptr on msg that is used to rx publish msg.    */
+
+    MQTTc_PARAM_TYPE_MSG_BUF_PTR,                               /* Msg's buf ptr.                                       */
+    MQTTc_PARAM_TYPE_MSG_BUF_LEN                                /* Msg's buf len.                                       */
+} MQTTc_PARAM_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                               MQTTc ERR
+*********************************************************************************************************
+*/
+
+typedef  enum  mqttc_err {
+    MQTTc_ERR_NONE,                                             /* No err.                                              */
+    MQTTc_ERR_FATAL,                                            /* Fatal err. Sock must be closed.                      */
+    MQTTc_ERR_FAIL,                                             /* Generic fail.                                        */
+    MQTTc_ERR_NOT_INIT,                                         /* MQTTc module not init yet.                           */
+    MQTTc_ERR_ALLOC,                                            /* Allocation of resource failed.                       */
+    MQTTc_ERR_OS_FAIL,                                          /* OS/KAL operation failed.                             */
+    MQTTc_ERR_CONN_IS_CLOSED,                                   /* Connection used is/has been closed.                  */
+    MQTTc_ERR_CONNACK_FAIL,                                     /* CONNACK msg rx'd was not successful.                 */
+    MQTTc_ERR_INVALID_ARG,                                      /* Invalid arg passed to function.                      */
+    MQTTc_ERR_NULL_PTR,                                         /* Unexpected null ptr passed to function.              */
+    MQTTc_ERR_INVALID_BUF_SIZE,                                 /* Invalid size of buf passed to function.              */
+    MQTTc_ERR_BUF_OVERFLOW,                                     /* Operation would overflow buf.                        */
+    MQTTc_ERR_QoS_LEVEL_NOT_GRANTED,                            /* QoS level requested was not granted by server.       */
+    MQTTc_ERR_UNEXPECTED_MSG,                                   /* Rx'd unexpected message. No need to re-open conn.    */
+
+    MQTTc_ERR_RX,                                               /* Generic Rx err.                                      */
+    MQTTc_ERR_RX_BUF_EMPTY,                                     /* No more bytes can be read at the moment.             */
+    MQTTc_ERR_TX,                                               /* Generic Tx err.                                      */
+    MQTTc_ERR_SEL,                                              /* Generic Sel err.                                     */
+    MQTTc_ERR_TIMEOUT,                                          /* Operation timed out.                                 */
+    MQTTc_ERR_SOCK_FAIL,                                        /* Operation on sock failed.                            */
+} MQTTc_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc MSG TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  mqttc_msg_type {
+    MQTTc_MSG_TYPE_NONE,
+    MQTTc_MSG_TYPE_CONNECT,
+    MQTTc_MSG_TYPE_CONNACK,
+    MQTTc_MSG_TYPE_PUBLISH,
+    MQTTc_MSG_TYPE_PUBACK,
+    MQTTc_MSG_TYPE_PUBREC,
+    MQTTc_MSG_TYPE_PUBREL,
+    MQTTc_MSG_TYPE_PUBCOMP,
+    MQTTc_MSG_TYPE_SUBSCRIBE,
+    MQTTc_MSG_TYPE_SUBACK,
+    MQTTc_MSG_TYPE_UNSUBSCRIBE,
+    MQTTc_MSG_TYPE_UNSUBACK,
+    MQTTc_MSG_TYPE_PINGREQ,
+    MQTTc_MSG_TYPE_PINGRESP,
+    MQTTc_MSG_TYPE_DISCONNECT,
+
+    MQTTc_MSG_TYPE_REQ_CLOSE
+} MQTTc_MSG_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc MSG STATE
+*********************************************************************************************************
+*/
+
+typedef  enum  mqttc_msg_state {
+    MQTTc_MSG_STATE_NONE,                                       /* Msg is in 'Idle'/'No' state.                         */
+    MQTTc_MSG_STATE_CMPL,                                       /* Msg has cmpl'd.                                      */
+
+    MQTTc_MSG_STATE_MUST_TX,                                    /* Msg must be tx'd.                                    */
+    MQTTc_MSG_STATE_WAIT_TX_CMPL,                               /* Msg is waiting for tx to cmpl.                       */
+
+    MQTTc_MSG_STATE_WAIT_RX                                     /* Msg is waiting to rx.                                */
+} MQTTc_MSG_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                         MQTTc CALLBACK TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* Type of callback exec'd when user-req'd oper cmpl.   */
+typedef  void  (*MQTTc_CMPL_CALLBACK)           (      MQTTc_CONN    *p_conn,
+                                                       MQTTc_MSG     *p_msg,
+                                                       void          *p_arg,
+                                                       MQTTc_ERR      err);
+
+                                                                /* Type of callback exec'd when err occurs/conn closes. */
+typedef  void  (*MQTTc_ERR_CALLBACK)            (      MQTTc_CONN    *p_conn,
+                                                       void          *p_arg,
+                                                       MQTTc_ERR      err);
+
+                                                                /* Type of callback exec'd when a publish is rx'd.      */
+typedef  void  (*MQTTc_PUBLISH_RX_CALLBACK)     (       MQTTc_CONN   *p_conn,
+                                                 const  CPU_CHAR     *topic_name_str,
+                                                        CPU_INT32U    topic_len,
+                                                 const  CPU_CHAR     *message_str,
+                                                        void         *p_arg,
+                                                        MQTTc_ERR     err);
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc FLAG TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  MQTTc_FLAGS;                               /* No flags implemented, reserved for future usage.     */
+
+
+/*
+*********************************************************************************************************
+*                                          MQTTc WILL CFG TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  mqttc_will_cfg {
+    CPU_CHAR     *WillTopic;                                    /* Will's topic.                                        */
+    CPU_CHAR     *WillMessage;                                  /* Will's msg.                                          */
+    CPU_BOOLEAN   WillRetain;                                   /* Flag indicating if will must be retained.            */
+    CPU_INT08U    WillQoS;                                      /* Will's QoS level.                                    */
+} MQTTc_WILL_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc MSG TYPE
+*********************************************************************************************************
+*/
+
+struct  mqttc_msg {
+    MQTTc_CONN       *ConnPtr;                                  /* Ptr to MQTTc_CONN associated.                        */
+    MQTTc_MSG_TYPE    Type;                                     /* Msg's type.                                          */
+    MQTTc_MSG_STATE   State;                                    /* Msg's state.                                         */
+    CPU_INT08U        QoS;                                      /* Msg's QoS.                                           */
+
+    CPU_INT16U        MsgID;                                    /* Msg ID used by msg.                                  */
+
+                                                                /* Ptr to rx/tx buf in case of mqttc msg, ptr to sem ... */
+    void             *ArgPtr;                                   /* to post, in case of 'close' msg.                     */
+    CPU_INT32U        BufLen;                                   /* Avail buf len for msg.                               */
+    CPU_INT32U        XferLen;                                  /* Len of xfer.                                         */
+
+    MQTTc_ERR         Err;                                      /* Err associated to processing of msg.                 */
+
+    MQTTc_MSG        *NextPtr;                                  /* Ptr to next msg.                                     */
+};
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc CONN TYPE
+*********************************************************************************************************
+*/
+
+struct  mqttc_conn {
+    NET_SOCK_ID                 SockId;                         /* Connection's socket ID.                              */
+    CPU_INT08U                  SockSelFlags;                   /* Flags to identify which oper must be checked in Sel. */
+
+    CPU_CHAR                   *BrokerNamePtr;                  /* MQTT broker's name.                                  */
+    CPU_INT16U                  BrokerPortNbr;                  /* MQTT broker's port nbr.                              */
+    CPU_INT16U                  InactivityTimeout_s;            /* Inactivity timeout, in seconds.                      */
+
+    CPU_CHAR                   *ClientID_Str;                   /* Client ID str.                                       */
+    CPU_CHAR                   *UsernameStr;                    /* Username str.                                        */
+    CPU_CHAR                   *PasswordStr;                    /* Password str.                                        */
+
+    CPU_INT16U                  KeepAliveTimerSec;              /* Keep alive timer duration, in seconds.               */
+    MQTTc_WILL_CFG             *WillCfgPtr;                     /* Ptr to will cfg, if any.                             */
+
+    NET_APP_SOCK_SECURE_CFG    *SecureCfgPtr;                   /* Ptr to secure will cfg, if any.                      */
+
+                                                                /* -------------------- CALLBACKS --------------------- */
+    MQTTc_CMPL_CALLBACK         OnCmpl;                         /* Generic, on cmpl callback.                           */
+    MQTTc_CMPL_CALLBACK         OnConnectCmpl;                  /* On connect cmpl callback.                            */
+    MQTTc_CMPL_CALLBACK         OnPublishCmpl;                  /* On publish cmpl callback.                            */
+    MQTTc_CMPL_CALLBACK         OnSubscribeCmpl;                /* On subscribe cmpl callback.                          */
+    MQTTc_CMPL_CALLBACK         OnUnsubscribeCmpl;              /* On unsubscribe cmpl callback.                        */
+    MQTTc_CMPL_CALLBACK         OnPingReqCmpl;                  /* On ping req cmpl callback.                           */
+    MQTTc_CMPL_CALLBACK         OnDisconnectCmpl;               /* On disconnect cmpl callback.                         */
+    MQTTc_ERR_CALLBACK          OnErrCallback;                  /* On err or conn lost callback. Conn must be re-opened.*/
+    MQTTc_PUBLISH_RX_CALLBACK   OnPublishRx;                    /* On publish rx'd cmpl callback.                       */
+    void                       *ArgPtr;                         /* Ptr to arg that will be provided to callbacks.       */
+
+    CPU_INT32U                  TimeoutMs;                      /* Timeout for 'Open' operation, in milliseconds.       */
+
+                                                                /* ----------------- NEXT MSG VALUES ------------------ */
+    CPU_INT08U                  NextMsgHeader;                  /* Header of next msg to parse.                         */
+    CPU_INT32U                  NextMsgRxLen;                   /* Rx len of next msg.                                  */
+    MQTTc_MSG_TYPE              NextMsgType;                    /* Next msg's type.                                     */
+    CPU_INT32U                  NextMsgLen;                     /* Len remaining to rx for next msg.                    */
+    CPU_BOOLEAN                 NextMsgLenIsCmpl;               /* Flag indicating if next msg's len value is rx'd.     */
+    CPU_INT16U                  NextMsgMsgID;                   /* ID of next msg, if any.                              */
+    CPU_BOOLEAN                 NextMsgMsgID_IsCmpl;            /* Flag indicating if next msg's ID has been rx'd.      */
+    MQTTc_MSG                  *NextMsgPtr;                     /* Ptr to next msg, if known.                           */
+
+    MQTTc_MSG                  *PublishRxMsgPtr;                /* Ptr to msg that is used to rx publish from server.   */
+
+    MQTTc_MSG                  *TxMsgHeadPtr;                   /* Ptr to head of msg needing to tx or waiting reply.   */
+    CPU_INT32U                  NextTxMsgTxLen;                 /* Len of already xfer'd data.                          */
+
+    MQTTc_CONN                 *NextPtr;                        /* Ptr to next conn.                                    */
+};
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc CFG TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  mqttc_cfg {
+                                                                /* Max nbr of msgs that will need to be processed ...   */
+    CPU_INT16U     MaxMsgNbr;                                   /* at any given time.                                   */
+    CPU_INT16U     InactivityTimeout_s;                         /* Inactivity timeout of sock, in seconds.              */
+    CPU_INT32U     TaskDly;                                     /* Optional internal task dly.                          */
+} MQTTc_CFG;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      PUBLIC FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void  MQTTc_Init            (const  MQTTc_CFG          *p_cfg,
+                             const  NET_TASK_CFG       *p_task_cfg,
+                                    MEM_SEG            *p_mem_seg,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_ConnClr         (       MQTTc_CONN         *p_conn,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_ConnSetParam    (       MQTTc_CONN         *p_conn,
+                                    MQTTc_PARAM_TYPE    type,
+                                    void               *p_param,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_ConnOpen        (       MQTTc_CONN         *p_conn,
+                                    MQTTc_FLAGS         flags,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_ConnClose       (       MQTTc_CONN         *p_conn,
+                                    MQTTc_FLAGS         flags,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_MsgClr          (       MQTTc_MSG          *p_msg,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_MsgSetParam     (       MQTTc_MSG          *p_msg,
+                                    MQTTc_PARAM_TYPE    type,
+                                    void               *p_param,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_Connect         (       MQTTc_CONN         *p_conn,
+                                    MQTTc_MSG          *p_msg,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_Publish         (       MQTTc_CONN         *p_conn,
+                                    MQTTc_MSG          *p_msg,
+                             const  CPU_CHAR           *topic_str,
+                                    CPU_INT08U          qos_lvl,
+                                    CPU_BOOLEAN         retain_flag,
+                             const  CPU_CHAR           *payload_str,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_Subscribe       (       MQTTc_CONN         *p_conn,
+                                    MQTTc_MSG          *p_msg,
+                             const  CPU_CHAR           *topic_str,
+                                    CPU_INT08U          topic_req_qos,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_SubscribeMult   (       MQTTc_CONN         *p_conn,
+                                    MQTTc_MSG          *p_msg,
+                             const  CPU_CHAR          **topic_str_tbl,
+                                    CPU_INT08U         *topic_req_qos_tbl,
+                                    CPU_INT08U          topic_nbr,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_Unsubscribe     (       MQTTc_CONN         *p_conn,
+                                    MQTTc_MSG          *p_msg,
+                             const  CPU_CHAR           *topic_str,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_UnsubscribeMult (       MQTTc_CONN         *p_conn,
+                                    MQTTc_MSG          *p_msg,
+                             const  CPU_CHAR          **topic_str_tbl,
+                                    CPU_INT08U          topic_nbr,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_PingReq         (       MQTTc_CONN         *p_conn,
+                                    MQTTc_MSG          *p_msg,
+                                    MQTTc_ERR          *p_err);
+
+void  MQTTc_Disconnect      (       MQTTc_CONN         *p_conn,
+                                    MQTTc_MSG          *p_msg,
+                                    MQTTc_ERR          *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  MQTTc_CFG_ARG_CHK_EXT_EN
+#error  "MQTTc_CFG_ARG_CHK_EXT_EN not #define'd in 'mqtt-c_cfg.h'. Must be [DEF_DISABLED] or [DEF_ENABLED]."
+#elif  ((MQTTc_CFG_ARG_CHK_EXT_EN != DEF_DISABLED) && \
+        (MQTTc_CFG_ARG_CHK_EXT_EN != DEF_ENABLED ))
+#error  "MQTTc_CFG_ARG_CHK_EXT_EN illegally #define'd in 'mqtt-c_cfg.h'. MUST be [DEF_DISABLED] or [DEF_ENABLED]."
+#endif
+
+#ifndef  MQTTc_CFG_DBG_GLOBAL_BUF_EN
+#error  "MQTTc_CFG_DBG_GLOBAL_BUF_EN not #define'd in 'mqtt-c_cfg.h'. Must be [DEF_DISABLED] or [DEF_ENABLED]."
+#elif  ((MQTTc_CFG_DBG_GLOBAL_BUF_EN != DEF_DISABLED) && \
+        (MQTTc_CFG_DBG_GLOBAL_BUF_EN != DEF_ENABLED ))
+#error  "MQTTc_CFG_DBG_GLOBAL_BUF_EN illegally #define'd in 'mqtt-c_cfg.h'. MUST be [DEF_DISABLED] or [DEF_ENABLED]."
+#elif   (MQTTc_CFG_DBG_GLOBAL_BUF_EN == DEF_ENABLED)
+#ifndef MQTTc_CFG_DBG_GLOBAL_BUF_LEN
+#error  "MQTTc_CFG_DBG_GLOBAL_BUF_LEN not #define'd in 'mqtt-c_cfg.h'. Must be >= 0u."
+#elif  (MQTTc_CFG_DBG_GLOBAL_BUF_LEN == 0u)
+#error  "MQTTc_CFG_DBG_GLOBAL_BUF_LEN illegally #define'd in 'mqtt-c_cfg.h'. Must be >= 0u."
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c_sock.c b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c_sock.c
new file mode 100644
index 0000000..66aff17
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c_sock.c
@@ -0,0 +1,613 @@
+/*
+*********************************************************************************************************
+*                                               uC/MQTTc
+*                                Message Queue Telemetry Transport Client
+*
+*                         (c) Copyright 2014-2016; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/MQTTc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             MQTT CLIENT
+*
+* Filename      : mqtt-c_sock.c
+* Version       : V1.00.01
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#include  
+#include  
+#include  
+#include  "mqtt-c_sock.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MQTTc_SOCK_SEL_FLAG_DESC_MSK              (DEF_BIT_00 | DEF_BIT_01 | DEF_BIT_02)
+#define  MQTTc_SOCK_SEL_FLAG_DESC_RD                DEF_BIT_00
+#define  MQTTc_SOCK_SEL_FLAG_DESC_WR                DEF_BIT_01
+#define  MQTTc_SOCK_SEL_FLAG_DESC_ERR               DEF_BIT_02
+
+#define  MQTTc_NET_SOCK_SEL_TIMEOUT_us                    1000u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_SOCK_DESC  MQTTc_NetSockDescRd;
+static  NET_SOCK_DESC  MQTTc_NetSockDescWr;
+static  NET_SOCK_DESC  MQTTc_NetSockDescErr;
+
+static  NET_SOCK_TIMEOUT  MQTTc_NetSockSelTimeout = {
+    0u,
+    MQTTc_NET_SOCK_SEL_TIMEOUT_us
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         MQTTc_SockConnOpen()
+*
+* Description : Open socket for MQTTc module.
+*
+* Argument(s) : p_conn      Pointer to MQTTc_CONN to open.
+*
+*               p_err       Pointer to variable that will receive error code from this function:
+*                               MQTTc_ERR_NONE          Socket operation completed successfully.
+*                               MQTTc_ERR_NULL_PTR      Parameter was null.
+*                               MQTTc_ERR_SOCK_FAIL     Socket operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_SockConnOpen().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_SockConnOpen (MQTTc_CONN  *p_conn,
+                          MQTTc_ERR   *p_err)
+{
+    NET_ERR      err_net;
+    CPU_BOOLEAN  flag    = DEF_TRUE;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+
+        if (p_conn->BrokerNamePtr == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    NetApp_ClientStreamOpenByHostname(&p_conn->SockId,
+                                       p_conn->BrokerNamePtr,
+                                       p_conn->BrokerPortNbr,
+                                       DEF_NULL,
+                                       p_conn->SecureCfgPtr,
+                                       p_conn->TimeoutMs,
+                                      &err_net);
+    switch (err_net) {
+        case NET_APP_ERR_NONE:
+             break;
+
+        default:
+             p_conn->SockId = NET_SOCK_ID_NONE;
+            *p_err = MQTTc_ERR_SOCK_FAIL;
+             return;
+    }
+
+    NetSock_CfgBlock(p_conn->SockId, NET_SOCK_BLOCK_SEL_NO_BLOCK, &err_net);
+    if (err_net != NET_SOCK_ERR_NONE) {
+        goto end_err;
+    }
+
+    (void)NetSock_OptSet(         p_conn->SockId,               /* Set NO DELAY option.                                 */
+                                  NET_SOCK_PROTOCOL_TCP,
+                                  NET_SOCK_OPT_TCP_NO_DELAY,
+                         (void *)&flag,
+                                  sizeof(flag),
+                                 &err_net);
+    if (err_net != NET_SOCK_ERR_NONE) {
+        goto end_err;
+    }
+
+                                                                /* Set sock conn inactivity timeout.                    */
+    (void)NetSock_OptSet(         p_conn->SockId,
+                                  NET_SOCK_PROTOCOL_TCP,
+                                  NET_SOCK_OPT_TCP_KEEP_IDLE,
+                         (void *)&p_conn->InactivityTimeout_s,
+                                  sizeof(p_conn->InactivityTimeout_s),
+                                 &err_net);
+    if (err_net != NET_SOCK_ERR_NONE) {
+        goto end_err;
+    }
+
+   *p_err = MQTTc_ERR_NONE;
+
+    return;
+
+end_err:
+   *p_err = MQTTc_ERR_SOCK_FAIL;
+
+    NetSock_Close(p_conn->SockId, &err_net);
+    (void)&err_net;
+
+    p_conn->SockId = NET_SOCK_ID_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         MQTTc_SockConnClose()
+*
+* Description : Close socket for MQTTc module.
+*
+* Argument(s) : p_conn      Pointer to MQTTc_CONN to close.
+*
+*               p_err       Pointer to variable that will receive error code from this function:
+*                               MQTTc_ERR_NONE          Socket operation completed successfully.
+*                               MQTTc_ERR_NULL_PTR      Parameter was null.
+*                               MQTTc_ERR_SOCK_FAIL     Socket operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_SockConnClose().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_SockConnClose (MQTTc_CONN  *p_conn,
+                           MQTTc_ERR   *p_err)
+{
+    NET_ERR  err_net;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return;
+        }
+    #endif
+
+    NetSock_Close(p_conn->SockId, &err_net);
+    if (err_net == NET_SOCK_ERR_NONE) {
+       *p_err = MQTTc_ERR_NONE;
+    } else {
+        *p_err = MQTTc_ERR_FAIL;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc_SockTx()
+*
+* Description : Transmit data on given connection's socket.
+*
+* Argument(s) : p_conn      Pointer to MQTTc_CONN that needs to transmit.
+*
+*               p_buf       Pointer to start of buffer to transmit.
+*
+*               buf_len     Length, in bytes, to transmit.
+*
+*               p_err       Pointer to variable that will receive error code from this function:
+*                               MQTTc_ERR_NONE          Socket operation completed successfully.
+*                               MQTTc_ERR_NULL_PTR      Parameter was null.
+*                               MQTTc_ERR_TX            Transmit operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_WrSockProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  MQTTc_SockTx (MQTTc_CONN  *p_conn,
+                          CPU_INT08U  *p_buf,
+                          CPU_INT32U   buf_len,
+                          MQTTc_ERR   *p_err)
+{
+    NET_SOCK_RTN_CODE  ret_val;
+    NET_ERR            err_net;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return (0u);
+        }
+
+        if (p_buf == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return (0u);
+        }
+    #endif
+
+    ret_val = NetSock_TxData(        p_conn->SockId,
+                             (void *)p_buf,
+                                     buf_len,
+                                     NET_SOCK_FLAG_TX_NO_BLOCK,
+                                    &err_net);
+    if (err_net == NET_SOCK_ERR_NONE) {
+       *p_err = MQTTc_ERR_NONE;
+    } else {
+       *p_err   = MQTTc_ERR_TX;
+        ret_val = 0u;
+    }
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc_SockRx()
+*
+* Description : Receive data on given connection's socket.
+*
+* Argument(s) : p_conn      Pointer to MQTTc_CONN that needs to receive.
+*
+*               p_buf       Pointer to start of buffer in which received data will be put.
+*
+*               buf_len     Length, in bytes, of receive buffer.
+*
+*               p_err       Pointer to variable that will receive error code from this function:
+*                               MQTTc_ERR_NONE          Socket operation completed successfully.
+*                               MQTTc_ERR_NULL_PTR      Parameter was null.
+*                               MQTTc_ERR_RX_BUF_EMPTY  No more bytes available to receive at the moment.
+*                               MQTTc_ERR_RX            Receive operation failed.
+*                               MQTTc_ERR_FATAL         Fatal err reported.
+*
+* Return(s)   : Number of bytes received, if NO error(s),
+*               0,                        otherwise.
+*
+* Caller(s)   : MQTTc_RdSockProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  MQTTc_SockRx (MQTTc_CONN  *p_conn,
+                          CPU_INT08U  *p_buf,
+                          CPU_INT32U   buf_len,
+                          MQTTc_ERR   *p_err)
+{
+    NET_SOCK_RTN_CODE  ret_val;
+    NET_ERR            err_net;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+
+        if (p_conn == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return (0u);
+        }
+
+        if (p_buf == DEF_NULL) {
+           *p_err = MQTTc_ERR_NULL_PTR;
+            return (0u);
+        }
+    #endif
+
+    ret_val = NetSock_RxData(p_conn->SockId,
+                             p_buf,
+                             buf_len,
+                             NET_SOCK_FLAG_NONE,
+                            &err_net);
+    switch (err_net) {
+        case NET_SOCK_ERR_NONE:
+            *p_err = MQTTc_ERR_NONE;
+             break;
+
+        case NET_SOCK_ERR_RX_Q_EMPTY:
+            *p_err = MQTTc_ERR_RX_BUF_EMPTY;
+             break;
+
+        case NET_ERR_RX:
+            *p_err   = MQTTc_ERR_RX;
+             ret_val = 0u;
+             break;
+
+        default:
+            *p_err   = MQTTc_ERR_FATAL;
+             ret_val = 0u;
+             break;
+    }
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        MQTTc_SockSelDescSet()
+*
+* Description : Set select descriptor type for given connection.
+*
+* Argument(s) : p_conn          Pointer to MQTTc_CONN for which to set its descriptor.
+*
+*               sel_desc_type   Select descriptor type to set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_MsgProcess(),
+*               MQTTc_WrSockProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_SockSelDescSet (MQTTc_CONN           *p_conn,
+                            MQTTc_SEL_DESC_TYPE   sel_desc_type)
+{
+    NET_ERR  err_net;
+
+
+    switch (sel_desc_type) {
+        case MQTTc_SEL_DESC_TYPE_RD:
+             DEF_BIT_SET(p_conn->SockSelFlags, MQTTc_SOCK_SEL_FLAG_DESC_RD);
+             break;
+
+        case MQTTc_SEL_DESC_TYPE_WR:
+             DEF_BIT_SET(p_conn->SockSelFlags, MQTTc_SOCK_SEL_FLAG_DESC_WR);
+             break;
+
+        case MQTTc_SEL_DESC_TYPE_ERR:
+        default:
+             DEF_BIT_SET(p_conn->SockSelFlags, MQTTc_SOCK_SEL_FLAG_DESC_ERR);
+             break;
+    }
+
+    NetSock_SelAbort(p_conn->SockId, &err_net);
+    (void)&err_net;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        MQTTc_SockSelDescClr()
+*
+* Description : Clear select descriptor type for given connection.
+*
+* Argument(s) : p_conn          Pointer to MQTTc_CONN for which to clear its descriptor.
+*
+*               sel_desc_type   Select descriptor type to clear.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_WrSockProcess().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_SockSelDescClr (MQTTc_CONN           *p_conn,
+                            MQTTc_SEL_DESC_TYPE   sel_desc_type)
+{
+    NET_ERR  err_net;
+
+
+    switch (sel_desc_type) {
+        case MQTTc_SEL_DESC_TYPE_RD:
+             DEF_BIT_CLR(p_conn->SockSelFlags, MQTTc_SOCK_SEL_FLAG_DESC_RD);
+             break;
+
+        case MQTTc_SEL_DESC_TYPE_WR:
+             DEF_BIT_CLR(p_conn->SockSelFlags, MQTTc_SOCK_SEL_FLAG_DESC_WR);
+             break;
+
+        case MQTTc_SEL_DESC_TYPE_ERR:
+        default:
+             DEF_BIT_CLR(p_conn->SockSelFlags, MQTTc_SOCK_SEL_FLAG_DESC_ERR);
+             break;
+    }
+
+    NetSock_SelAbort(p_conn->SockId, &err_net);
+    (void)&err_net;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        MQTTc_SockSelDescProc()
+*
+* Description : Process select descriptor type for given connection.
+*
+* Argument(s) : p_conn          Pointer to MQTTc_CONN on which to process select descriptor.
+*
+*               sel_desc_type   Select descriptor type to process.
+*
+* Return(s)   : DEF_YES, if given descriptor is set,
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : MQTTc_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  MQTTc_SockSelDescProc (MQTTc_CONN           *p_conn,
+                                    MQTTc_SEL_DESC_TYPE   sel_desc_type)
+{
+    NET_SOCK_DESC  *p_net_sock_desc;
+    CPU_BOOLEAN     ret_val         = DEF_NO;
+
+
+    switch (sel_desc_type) {
+        case MQTTc_SEL_DESC_TYPE_RD:
+             p_net_sock_desc = &MQTTc_NetSockDescRd;
+             break;
+
+        case MQTTc_SEL_DESC_TYPE_WR:
+             p_net_sock_desc = &MQTTc_NetSockDescWr;
+             break;
+
+        case MQTTc_SEL_DESC_TYPE_ERR:
+        default:
+             p_net_sock_desc = &MQTTc_NetSockDescErr;
+             break;
+    }
+
+    ret_val = NET_SOCK_DESC_IS_SET(p_conn->SockId, p_net_sock_desc);
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            MQTTc_SockSel()
+*
+* Description : Execute select operation for selected connections.
+*
+* Argument(s) : p_head_conn Pointer to head of MQTTc Connection object list.
+*
+*               p_err       Pointer to variable that will receive error code from this function:
+*                               MQTTc_ERR_NONE          Socket operation completed successfully.
+*                               MQTTc_ERR_TIMEOUT       Operation timed-out.
+*                               MQTTc_ERR_SOCK_FAIL     Socket operation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : MQTTc_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  MQTTc_SockSel (MQTTc_CONN  *p_head_conn,
+                     MQTTc_ERR   *p_err)
+{
+    MQTTc_CONN   *p_conn_iter;
+    CPU_BOOLEAN   must_call_sel = DEF_NO;
+    NET_ERR       err_net;
+
+
+    #if (MQTTc_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+        if (p_err == DEF_NULL) {
+            CPU_SW_EXCEPTION(;);
+        }
+    #endif
+
+    NET_SOCK_DESC_INIT(&MQTTc_NetSockDescRd);
+    NET_SOCK_DESC_INIT(&MQTTc_NetSockDescWr);
+    NET_SOCK_DESC_INIT(&MQTTc_NetSockDescErr);
+
+    p_conn_iter = p_head_conn;
+    while (p_conn_iter != DEF_NULL) {
+        if ((p_conn_iter->SockId                                                         != NET_SOCK_ID_NONE) &&
+            (DEF_BIT_IS_SET_ANY(p_conn_iter->SockSelFlags, MQTTc_SOCK_SEL_FLAG_DESC_MSK) == DEF_YES)) {
+            must_call_sel = DEF_YES;
+            if (DEF_BIT_IS_SET(p_conn_iter->SockSelFlags, MQTTc_SOCK_SEL_FLAG_DESC_RD) == DEF_YES) {
+                NET_SOCK_DESC_SET(p_conn_iter->SockId, &MQTTc_NetSockDescRd);
+            }
+            if (DEF_BIT_IS_SET(p_conn_iter->SockSelFlags, MQTTc_SOCK_SEL_FLAG_DESC_WR) == DEF_YES) {
+                NET_SOCK_DESC_SET(p_conn_iter->SockId, &MQTTc_NetSockDescWr);
+            }
+            if (DEF_BIT_IS_SET(p_conn_iter->SockSelFlags, MQTTc_SOCK_SEL_FLAG_DESC_ERR) == DEF_YES) {
+                NET_SOCK_DESC_SET(p_conn_iter->SockId, &MQTTc_NetSockDescErr);
+            }
+        }
+        p_conn_iter = p_conn_iter->NextPtr;
+    }
+
+    if (must_call_sel == DEF_YES) {
+        (void)NetSock_Sel(NET_SOCK_NBR_SOCK,
+                         &MQTTc_NetSockDescRd,
+                         &MQTTc_NetSockDescWr,
+                         &MQTTc_NetSockDescErr,
+                         &MQTTc_NetSockSelTimeout,
+                         &err_net);
+        switch (err_net) {
+            case NET_SOCK_ERR_NONE:
+                *p_err = MQTTc_ERR_NONE;
+                 break;
+
+            case NET_SOCK_ERR_TIMEOUT:
+                *p_err = MQTTc_ERR_TIMEOUT;
+                 break;
+
+            default:
+                *p_err = MQTTc_ERR_SOCK_FAIL;
+                 break;
+        }
+    } else {
+       *p_err = MQTTc_ERR_NONE;
+    }
+
+    return;
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c_sock.h b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c_sock.h
new file mode 100644
index 0000000..1084549
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Client/Source/mqtt-c_sock.h
@@ -0,0 +1,123 @@
+/*
+*********************************************************************************************************
+*                                               uC/MQTTc
+*                                Message Queue Telemetry Transport Client
+*
+*                         (c) Copyright 2014-2016; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/MQTTc is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             MQTT CLIENT
+*
+* Filename      : mqtt-c_sock.h
+* Version       : V1.00.01
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the MQTTc module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  MQTTc_CONN_MODULE_PRESENT
+#define  MQTTc_CONN_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "mqtt-c.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  enum  mqttc_sel_desc_type {
+    MQTTc_SEL_DESC_TYPE_RD,
+    MQTTc_SEL_DESC_TYPE_WR,
+    MQTTc_SEL_DESC_TYPE_ERR
+} MQTTc_SEL_DESC_TYPE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void         MQTTc_SockConnOpen   (MQTTc_CONN           *p_conn,
+                                   MQTTc_ERR            *p_err);
+
+void         MQTTc_SockConnClose  (MQTTc_CONN           *p_conn,
+                                   MQTTc_ERR            *p_err);
+
+CPU_INT32U   MQTTc_SockTx         (MQTTc_CONN           *p_conn,
+                                   CPU_INT08U           *p_buf,
+                                   CPU_INT32U            buf_len,
+                                   MQTTc_ERR            *p_err);
+
+CPU_INT32U   MQTTc_SockRx         (MQTTc_CONN           *p_conn,
+                                   CPU_INT08U           *p_buf,
+                                   CPU_INT32U            buf_len,
+                                   MQTTc_ERR            *p_err);
+
+void         MQTTc_SockSelDescSet (MQTTc_CONN           *p_conn,
+                                   MQTTc_SEL_DESC_TYPE   sel_desc_type);
+
+void         MQTTc_SockSelDescClr (MQTTc_CONN           *p_conn,
+                                   MQTTc_SEL_DESC_TYPE   sel_desc_type);
+
+CPU_BOOLEAN  MQTTc_SockSelDescProc(MQTTc_CONN           *p_conn,
+                                   MQTTc_SEL_DESC_TYPE   sel_desc_type);
+
+void         MQTTc_SockSel        (MQTTc_CONN           *p_head_conn,
+                                   MQTTc_ERR            *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-MQTT/Common/mqtt.h b/src/ucos_v1_42/micrium_source/uC-MQTT/Common/mqtt.h
new file mode 100644
index 0000000..9f1e056
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-MQTT/Common/mqtt.h
@@ -0,0 +1,217 @@
+/*
+*********************************************************************************************************
+*                                               uC/MQTT
+*                                Message Queue Telemetry Transport Client
+*
+*                         (c) Copyright 2014-2016; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/MQTT is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                             MQTT DEF
+*
+* Filename      : mqtt.h
+* Version       : V1.00.01
+* Programmer(s) : OD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the MQTTc module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  MQTT_DEF_MODULE_PRESENT
+#define  MQTT_DEF_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    MQTT_DEF_MODULE
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            MSG LEN DEFINES
+*********************************************************************************************************
+*/
+
+#define  MQTT_MSG_BASE_LEN                                         4u
+#define  MQTT_MSG_PING_DISCONN_LEN                                 2u
+
+
+/*
+*********************************************************************************************************
+*                                           MSG TYPE DEFINES
+*********************************************************************************************************
+*/
+
+#define  MQTT_MSG_TYPE_BIT_SHIFT                                   4u
+#define  MQTT_MSG_TYPE_MSK                                          DEF_BIT_FIELD( 4u, MQTT_MSG_TYPE_BIT_SHIFT)
+#define  MQTT_MSG_TYPE_CONNECT                                   ( 1u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Tx only. */
+#define  MQTT_MSG_TYPE_CONNACK                                   ( 2u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Rx only. */
+#define  MQTT_MSG_TYPE_PUBLISH                                   ( 3u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Both.    */
+#define  MQTT_MSG_TYPE_PUBACK                                    ( 4u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Both.    */
+#define  MQTT_MSG_TYPE_PUBREC                                    ( 5u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Both.    */
+#define  MQTT_MSG_TYPE_PUBREL                                    ( 6u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Both.    */
+#define  MQTT_MSG_TYPE_PUBCOMP                                   ( 7u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Both.    */
+#define  MQTT_MSG_TYPE_SUBSCRIBE                                 ( 8u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Tx only. */
+#define  MQTT_MSG_TYPE_SUBACK                                    ( 9u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Rx only. */
+#define  MQTT_MSG_TYPE_UNSUBSCRIBE                               (10u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Tx only. */
+#define  MQTT_MSG_TYPE_UNSUBACK                                  (11u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Rx only. */
+#define  MQTT_MSG_TYPE_PINGREQ                                   (12u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Tx only. */
+#define  MQTT_MSG_TYPE_PINGRESP                                  (13u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Rx only. */
+#define  MQTT_MSG_TYPE_DISCONNECT                                (14u << MQTT_MSG_TYPE_BIT_SHIFT)           /* Tx only. */
+
+
+/*
+*********************************************************************************************************
+*                                         MSG FIXED HDR DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------------- DUP ------------------------ */
+#define  MQTT_MSG_FIXED_HDR_FLAGS_DUP_BIT_SHIFT                    3u
+#define  MQTT_MSG_FIXED_HDR_FLAGS_DUP_MSK                           DEF_BIT(MQTT_MSG_FIXED_HDR_FLAGS_DUP_BIT_SHIFT)
+
+                                                                /* ----------------------- QoS ------------------------ */
+#define  MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_BIT_SHIFT                1u
+#define  MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_MSK                       DEF_BIT_FIELD( 2u, MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_BIT_SHIFT)
+#define  MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_0                    (0x00u << MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_BIT_SHIFT)
+#define  MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_1                    (0x01u << MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_BIT_SHIFT)
+#define  MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_2                    (0x02u << MQTT_MSG_FIXED_HDR_FLAGS_QOS_LVL_BIT_SHIFT)
+#define  MQTT_MSG_QOS_LVL_MAX                                      2u
+
+                                                                /* ---------------------- RETAIN ---------------------- */
+#define  MQTT_MSG_FIXED_HDR_FLAGS_RETAIN_BIT_SHIFT                 0u
+#define  MQTT_MSG_FIXED_HDR_FLAGS_RETAIN_MSK                        DEF_BIT(MQTT_MSG_FIXED_HDR_FLAGS_RETAIN_BIT_SHIFT)
+
+                                                                /* --------------------- REM LEN ---------------------- */
+#define  MQTT_MSG_FIXED_HDR_REM_LEN_MSK                             DEF_BIT_FIELD( 7u, 0u)
+#define  MQTT_MSG_FIXED_HDR_REM_LEN_MAX_LEN                      128u
+#define  MQTT_MSG_FIXED_HDR_REM_LEN_CONTINUATION_BIT                DEF_BIT_07
+#define  MQTT_MSG_FIXED_HDR_REM_LEN_NBR_BYTES_MAX                  4u
+#define  MQTT_MSG_FIXED_HDR_REM_LEN_MAX                    268435455u
+
+                                                                /* --------------- FIXED HDR TOTAL LEN ---------------- */
+#define  MQTT_MSG_FIXED_HDR_MAX_LEN_BYTES                          5u
+
+
+/*
+*********************************************************************************************************
+*                                          MSG VAR HDR DEFINES
+*********************************************************************************************************
+*/
+
+#define  MQTT_MSG_VAR_HDR_PROTOCOL_NAME_STR                        "MQTT"
+#define  MQTT_MSG_VAR_HDR_PROTOCOL_NAME_LEN                        4u
+#define  MQTT_MSG_VAR_HDR_PROTOCOL_VERSION                         4u
+
+
+/*
+*********************************************************************************************************
+*                                    VAR HDR FOR CONNECT MSG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- VAR HDR LEN -------------------- */
+#define  MQTT_MSG_VAR_HDR_CONNECT_LEN                               MQTT_MSG_VAR_HDR_PROTOCOL_NAME_LEN + 6u
+
+                                                                /* -------------- VAR HDR CONNECT FLAGS --------------- */
+#define  MQTT_MSG_VAR_HDR_CONNECT_FLAG_CLEAN_SESSION                DEF_BIT_01
+#define  MQTT_MSG_VAR_HDR_CONNECT_FLAG_WILL_FLAG                    DEF_BIT_02
+#define  MQTT_MSG_VAR_HDR_CONNECT_FLAG_WILL_QOS_BIT_SHIFT          3u
+#define  MQTT_MSG_VAR_HDR_CONNECT_FLAG_WILL_QOS                    (DEF_BIT_04 | DEF_BIT_03)
+#define  MQTT_MSG_VAR_HDR_CONNECT_FLAG_WILL_RETAIN                  DEF_BIT_05
+#define  MQTT_MSG_VAR_HDR_CONNECT_FLAG_PSWD_FLAG                    DEF_BIT_06
+#define  MQTT_MSG_VAR_HDR_CONNECT_FLAG_USER_NAME_FLAG               DEF_BIT_07
+
+                                                                /* -------------- VAR HDR CLIENT ID LEN --------------- */
+#define  MQTT_MSG_VAR_HDR_CONNECT_CLIENT_ID_MAX_STR_LEN           23u
+
+
+/*
+*********************************************************************************************************
+*                                    VAR HDR FOR CONNACK MSG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------ VAR HDR CONNACK RET CODES ------------- */
+#define  MQTT_MSG_VAR_HDR_CONNACK_RET_CODE_ACCEPTED                0u
+#define  MQTT_MSG_VAR_HDR_CONNACK_RET_CODE_UNACCEPTABLE_VERSION    1u
+#define  MQTT_MSG_VAR_HDR_CONNACK_RET_CODE_ID_REJECTED             2u
+#define  MQTT_MSG_VAR_HDR_CONNACK_RET_CODE_SERVER_UNAVAIL          3u
+#define  MQTT_MSG_VAR_HDR_CONNACK_RET_CODE_BAD_USER_NAME_PSWD      4u
+#define  MQTT_MSG_VAR_HDR_CONNACK_RET_CODE_NOT_AUTHORIZED          5u
+#define  MQTT_MSG_VAR_HDR_CONNACK_RET_CODE_MAX                     5u
+
+
+/*
+*********************************************************************************************************
+*                                            MSG ID DEFINES
+*********************************************************************************************************
+*/
+
+#define  MQTT_MSG_ID_SIZE                                          2u
+#define  MQTT_MSG_ID_INVALID                                       0u
+#define  MQTT_MSG_ID_NONE                                          0u
+
+
+/*
+*********************************************************************************************************
+*                                         UTF-8 UTILITY DEFINES
+*********************************************************************************************************
+*/
+
+#define  MQTT_MSG_UTF8_LEN_RD(p_buf)                             (((p_buf)[0u] << 8u) | (p_buf)[1u])
+#define  MQTT_MSG_UTF8_LEN_SIZE                                    2u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Cfg/Template/shell_cfg.h b/src/ucos_v1_42/micrium_source/uC-Shell/Cfg/Template/shell_cfg.h
new file mode 100644
index 0000000..15e41af
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Cfg/Template/shell_cfg.h
@@ -0,0 +1,96 @@
+/*
+*********************************************************************************************************
+*                                              uC/Shell
+*                                            Shell Utility
+*
+*                          (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Shell is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  SHELL UTILITY CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : shell_cfg.h
+* Version       : V1.03.01
+* Programmer(s) : SR
+*                 FBJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                 MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  SHELL_CFG_H
+#define  SHELL_CFG_H
+
+
+/*
+*********************************************************************************************************
+*                                                 SHELL
+*
+* Note(s) : (1) Defines the size of the table used to hold the various modules' command tables.  Command
+*               tables are added using the Shell_CmdTblAdd() function.  Once the table is full, it is not
+*               possible to add any more unless Shell_CmdTblRem() is first called.
+*
+*           (2) Defines the maximum number or argument(s) a command may pass on the string holding the
+*               complete command.  The minimum value is 1.
+*
+*           (3) Defines the maximum length for module command name, including the NULL character.
+*********************************************************************************************************
+*/
+
+#define  SHELL_CFG_CMD_TBL_SIZE                            3    /* Cfg Shell cmd tbl size  (see Note #1).               */
+#define  SHELL_CFG_CMD_ARG_NBR_MAX                         5    /* Cfg cmd max nbr of arg  (see Note #2).               */
+
+#define  SHELL_CFG_MODULE_CMD_NAME_LEN_MAX                 6    /* Cfg module cmd name len (See Note #3).               */
+
+
+/*
+*********************************************************************************************************
+*                                                TRACING
+*********************************************************************************************************
+*/
+
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                                  0u
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                                 1u
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                                  2u
+#endif
+
+#define  SHELL_TRACE_LEVEL                   TRACE_LEVEL_OFF
+#define  SHELL_TRACE                                  printf
+
+
+/*
+*********************************************************************************************************
+*                                          MODULE END
+*********************************************************************************************************
+*/
+
+#endif
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Cmd/General/sh_shell.c b/src/ucos_v1_42/micrium_source/uC-Shell/Cmd/General/sh_shell.c
new file mode 100644
index 0000000..b687058
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Cmd/General/sh_shell.c
@@ -0,0 +1,245 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                           (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         GENERAL SHELL COMMANDS
+*
+* Filename      : sh_shell.c
+* Version       : V1.03.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define   SH_SHELL_MODULE
+#include 
+
+
+/*
+*********************************************************************************************************
+*                                              LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  SH_SHELL_NEW_LINE                      (CPU_CHAR *)"\r\n"
+#define  SH_SHELL_BLANK_LINE                    (CPU_CHAR *)"\r\n\r\n"
+#define  SH_SHELL_STR_HELP                      (CPU_CHAR *)"-h"
+
+/*
+*********************************************************************************************************
+*                                        ARGUMENT ERROR MESSAGES
+*********************************************************************************************************
+*/
+
+#define  SH_SHELL_ARG_ERR_HELP                  (CPU_CHAR *)"Sh_help: usage: Sh_help\r\n                Sh_help [command]"
+
+/*
+*********************************************************************************************************
+*                                      COMMAND EXPLANATION MESSAGES
+*********************************************************************************************************
+*/
+
+#define  SH_SHELL_CMD_EXP_HELP                  (CPU_CHAR *)"                Get list of commands, or information about a command."
+
+
+/*
+*********************************************************************************************************
+*                                             LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+static  CPU_INT16S  ShShell_help(CPU_INT16U        argc,
+                                 CPU_CHAR         *argv[],
+                                 SHELL_OUT_FNCT    out_fnct,
+                                 SHELL_CMD_PARAM  *pcmd_param);
+
+static  SHELL_CMD  ShShell_CmdTbl [] =
+{
+    {"Sh_help", ShShell_help},
+    {0,         0           }
+};
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             ShShell_Init()
+*
+* Description : Initialize Shell for general shell commands.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK,   if general shell commands were added.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ShShell_Init (void)
+{
+    SHELL_ERR    err;
+    CPU_BOOLEAN  ok;
+
+
+    Shell_CmdTblAdd((CPU_CHAR *)"Sh", ShShell_CmdTbl, &err);
+
+    ok = (err == SHELL_ERR_NONE) ? DEF_OK : DEF_FAIL;
+    return (ok);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           COMMAND FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             ShShell_help()
+*
+* Description : List all commands or invoke '--help' for another command.
+*
+* Argument(s) : argc            The number of arguments.
+*
+*               argv            Array of arguments.
+*
+*               out_fnct        The output function.
+*
+*               pcmd_param      Pointer to the command parameters.
+*
+* Return(s)   : SHELL_EXEC_ERR, if an error is encountered.
+*               SHELL_ERR_NONE, otherwise.
+*
+* Caller(s)   : Shell, in response to command execution.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  ShShell_help (CPU_INT16U        argc,
+                                  CPU_CHAR         *argv[],
+                                  SHELL_OUT_FNCT    out_fnct,
+                                  SHELL_CMD_PARAM  *pcmd_param)
+{
+    CPU_CHAR           cmd_str[SHELL_CFG_MODULE_CMD_NAME_LEN_MAX + 4];
+    SHELL_ERR          err;
+    SHELL_CMD         *pcmd;
+    SHELL_MODULE_CMD  *pmodule_cmd;
+
+
+    if (argc == 2) {
+        if (Str_Cmp(argv[1], SH_SHELL_STR_HELP) == 0) {
+            (void)out_fnct(SH_SHELL_ARG_ERR_HELP, (CPU_INT16U)Str_Len(SH_SHELL_ARG_ERR_HELP), pcmd_param->pout_opt);
+            (void)out_fnct(SH_SHELL_NEW_LINE,     2,                                          pcmd_param->pout_opt);
+            (void)out_fnct(SH_SHELL_CMD_EXP_HELP, (CPU_INT16U)Str_Len(SH_SHELL_CMD_EXP_HELP), pcmd_param->pout_opt);
+            (void)out_fnct(SH_SHELL_NEW_LINE,     2,                                          pcmd_param->pout_opt);
+            return (SHELL_ERR_NONE);
+        }
+    }
+
+    if ((argc != 1) && (argc != 2)) {
+        (void)out_fnct(SH_SHELL_ARG_ERR_HELP, (CPU_INT16U)Str_Len(SH_SHELL_ARG_ERR_HELP), pcmd_param->pout_opt);
+        (void)out_fnct(SH_SHELL_NEW_LINE,     2,                                          pcmd_param->pout_opt);
+        return (SHELL_EXEC_ERR);
+    }
+
+    switch (argc) {
+        case 1:
+             pmodule_cmd = Shell_ModuleCmdUsedPoolPtr;
+             while (pmodule_cmd != (SHELL_MODULE_CMD *)0) {
+                 pcmd = pmodule_cmd->CmdTblPtr;
+                 if (pcmd != (SHELL_CMD *)0) {
+                     while (pcmd->Fnct != (SHELL_CMD_FNCT)0) {
+                         (void)out_fnct((CPU_CHAR *)pcmd->Name,
+                                        (CPU_INT16U)Str_Len(pcmd->Name),
+                                                    pcmd_param->pout_opt);
+                         (void)out_fnct(SH_SHELL_NEW_LINE, 2,                               pcmd_param->pout_opt);
+                         pcmd++;
+                     }
+                 }
+                 pmodule_cmd = pmodule_cmd->NextModuleCmdPtr;
+             }
+             break;
+
+        case 2:
+             Str_Copy(cmd_str, argv[1]);
+             Str_Cat(cmd_str, (CPU_CHAR *)" ");
+             Str_Cat(cmd_str, SH_SHELL_STR_HELP);
+
+             Shell_Exec(cmd_str, out_fnct, pcmd_param, &err);
+
+             switch (err) {
+                case SHELL_ERR_CMD_NOT_FOUND:
+                case SHELL_ERR_CMD_SEARCH:
+                case SHELL_ERR_ARG_TBL_FULL:
+                     (void)out_fnct((CPU_CHAR *)"Command not recognized: ", 25,                           pcmd_param->pout_opt);
+                     (void)out_fnct(argv[1],                                (CPU_INT16U)Str_Len(argv[1]), pcmd_param->pout_opt);
+                     (void)out_fnct(SH_SHELL_NEW_LINE,                      2,                            pcmd_param->pout_opt);
+                     break;
+
+                case SHELL_ERR_NONE:
+                case SHELL_ERR_NULL_PTR:
+                case SHELL_ERR_CMD_EXEC:
+                default:
+                     break;
+             }
+             break;
+
+        default:
+             break;
+    }
+
+    return (SHELL_ERR_NONE);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Cmd/General/sh_shell.h b/src/ucos_v1_42/micrium_source/uC-Shell/Cmd/General/sh_shell.h
new file mode 100644
index 0000000..3ea6e88
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Cmd/General/sh_shell.h
@@ -0,0 +1,144 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                           (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         GENERAL SHELL COMMANDS
+*
+* Filename      : sh_shell.h
+* Version       : V1.03.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                                 MODULE
+*
+* Note(s) : (1) This header file is protected from multiple pre-processor inclusion through use of the
+*               SH_SHELL present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  SH_SHELL_PRESENT                                       /* See Note #1.                                         */
+#define  SH_SHELL_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                  GENERAL SHELL COMMANDS VERSION NUMBER
+*
+* Note(s) : (1) (a) The General Shell Commands software version is denoted as follows :
+*
+*                       Vx.yy
+*
+*                           where
+*                                  V     denotes 'Version' label
+*                                  x     denotes major software version revision number
+*                                  yy    denotes minor software version revision number
+*
+*               (b) The General Shell Commands software version label #define is formatted as follows :
+*
+*                       ver = x.yy * 100
+*
+*                           where
+*                                  ver   denotes software version number scaled as
+*                                        an integer value
+*                                  x.yy  denotes software version number
+*********************************************************************************************************
+*/
+
+#define  SH_SHELL_VERSION          100u                         /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   SH_SHELL_MODULE
+#define  SH_SHELL_EXT
+#else
+#define  SH_SHELL_EXT  extern
+#endif
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                                 DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                 MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ShShell_Init(void);
+
+
+/*
+*********************************************************************************************************
+*                                         CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              MODULE END
+*
+* Note(s) : See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of SH_SHELL module include (see Note #1).        */
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Source/dbg/readme.txt b/src/ucos_v1_42/micrium_source/uC-Shell/Source/dbg/readme.txt
new file mode 100644
index 0000000..9eeccd5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Source/dbg/readme.txt
@@ -0,0 +1,2 @@
+These files should not be part of the official release.  They are intended
+for internal tests.
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Source/dbg/shell_test.c b/src/ucos_v1_42/micrium_source/uC-Shell/Source/dbg/shell_test.c
new file mode 100644
index 0000000..4a6b1f5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Source/dbg/shell_test.c
@@ -0,0 +1,950 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                             (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           SHELL TEST SUITE
+*
+* Filename      : shell_test.c
+* Version       : V1.03.01
+* Programmer(s) : SR
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    SHELL_TEST_MODULE
+#include  
+#include  
+#include  
+
+#if APP_FS_EN
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Shell_Test_Init();
+static  CPU_BOOLEAN  Shell_Test_AddTbl();
+static  CPU_BOOLEAN  Shell_Test_Exec();
+static  CPU_BOOLEAN  Shell_Test_RemTbl();
+
+
+static  CPU_INT16S  Shell_Test_Cmd (CPU_INT16U        argc,
+                                    CPU_CHAR         *argv[],
+                                    SHELL_OUT_FNCT    out_fnct,
+                                    SHELL_CMD_PARAM  *pcmd_param);
+
+static  CPU_INT16S  Shell_Test_Cmd_Err (CPU_INT16U        argc,
+                                        CPU_CHAR         *argv[],
+                                        SHELL_OUT_FNCT    out_fnct,
+                                        SHELL_CMD_PARAM  *pcmd_param);
+
+static  CPU_INT16S  Shell_Test_Out (CPU_CHAR         *pbuf,
+                                    CPU_INT16U        buf_len,
+                                    void             *popt);
+
+static  CPU_INT16S  Shell_Test_Out_Err (CPU_CHAR         *pbuf,
+                                        CPU_INT16U        buf_len,
+                                        void             *popt);
+
+
+static  CPU_INT16S  Shell_Test_GetPoolSize (SHELL_MODULE_CMD  *pool);
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  SHELL_TEST_EXT  SHELL_CMD    Shell_Test_CmdTbl_1[] = {
+    {SHELL_TEST_CMD_1_1, Shell_Test_Cmd},
+    {SHELL_TEST_CMD_1_2, Shell_Test_Cmd},
+    {0,            0}
+};
+
+static  SHELL_TEST_EXT  SHELL_CMD    Shell_Test_CmdTbl_2[] = {
+    {SHELL_TEST_CMD_2_1, Shell_Test_Cmd},
+    {SHELL_TEST_CMD_2_2, Shell_Test_Cmd},
+    {0,            0}
+};
+
+static  SHELL_TEST_EXT  SHELL_CMD    Shell_Test_CmdTbl_3[] = {
+    {SHELL_TEST_CMD_3_1, Shell_Test_Cmd},
+    {SHELL_TEST_CMD_3_2, Shell_Test_Cmd},
+    {0,            0}
+};
+
+static  SHELL_TEST_EXT  SHELL_CMD    Shell_Test_CmdTbl_4[] = {
+    {SHELL_TEST_CMD_4_1, Shell_Test_Cmd},
+    {SHELL_TEST_CMD_4_2, Shell_Test_Cmd},
+    {0,            0}
+};
+
+static  SHELL_TEST_EXT  SHELL_CMD    Shell_Test_CmdTbl_5[] = {
+    {SHELL_TEST_CMD_5_1, Shell_Test_Cmd_Err},
+    {SHELL_TEST_CMD_5_2, Shell_Test_Cmd_Err},
+    {0,            0}
+};
+
+static  SHELL_TEST_EXT  SHELL_CMD    Shell_Test_CmdTbl_6[] = {
+    {SHELL_TEST_CMD_6_1, Shell_Test_Cmd},
+    {SHELL_TEST_CMD_6_2, Shell_Test_Cmd},
+    {0,            0}
+};
+
+static  SHELL_TEST_EXT  SHELL_CMD    Shell_Test_CmdTbl_7[] = {
+    {0,            0}
+};
+
+
+/*
+*********************************************************************************************************
+*                                           INITIALIZED DATA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           Shell_Test()
+*
+* Description : Test Shell.
+*
+* Arguments   : none.
+*
+* Returns     : none.
+*
+* Caller(s)   : Your Product's Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  Shell_Test (void)
+{
+    CPU_BOOLEAN  ret_val;
+  
+  
+    SHELL_TEST_TRACE_DEBUG(("Testing Shell... "));
+  
+    
+    ret_val = Shell_Test_Init();
+    if (ret_val != DEF_OK) {
+        return;
+    }
+    
+    ret_val = Shell_Test_AddTbl();
+    if (ret_val != DEF_OK) {
+        return;
+    }
+    
+    ret_val = Shell_Test_Exec();
+    if (ret_val != DEF_OK) {
+        return;
+    }
+    
+    ret_val = Shell_Test_RemTbl();
+    if (ret_val != DEF_OK) {
+        return;
+    }    
+    
+    
+    SHELL_TEST_TRACE_DEBUG(("done.\n\r"));    
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          Shell_Test_Init()
+*
+* Description : Test Shell - Init.
+*
+* Arguments   : none.
+*
+* Returns     : DEF_OK,   if no error.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Shell_Test().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Shell_Test_Init ()
+{
+    CPU_BOOLEAN  ret_val;
+    
+
+    ret_val = Shell_Init();
+    if (ret_val != DEF_OK) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Init (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+    
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Shell_Test_AddTbl()
+*
+* Description : Test Shell - Add tables
+*
+* Arguments   : none.
+*
+* Returns     : DEF_OK,   if no error.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Shell_Test().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Shell_Test_AddTbl()
+{
+    SHELL_ERR    err;
+    CPU_INT16S   size;
+
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdFreePoolPtr);
+    if (size != 5) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdUsedPoolPtr);
+    if (size != 0) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+    
+    
+                                                                /* Adding NULL tbl.                                     */     
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_1, (SHELL_CMD *)0, &err);
+    if (err != SHELL_ERR_NULL_PTR) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }    
+    
+                                                                /* Adding tbl with too long name.                       */
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_TOO_LONG, Shell_Test_CmdTbl_1, &err);
+    if (err != SHELL_ERR_MODULE_CMD_NAME_TOO_LONG) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    } 
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdFreePoolPtr);
+    if (size != 5) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdUsedPoolPtr);
+    if (size != 0) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_1, Shell_Test_CmdTbl_1, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+    
+                                                                /* Trying to add existing tbl name.                     */
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_1, Shell_Test_CmdTbl_2, &err);
+    if (err != SHELL_ERR_MODULE_CMD_ALREADY_IN) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+    
+                                                                /* Trying to add existing tbl, new name.                */
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_2, Shell_Test_CmdTbl_1, &err);
+    if (err != SHELL_ERR_MODULE_CMD_ALREADY_IN) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+    
+                                                                /* Trying to add existing tbl and name.                 */
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_1, Shell_Test_CmdTbl_1, &err);
+    if (err != SHELL_ERR_MODULE_CMD_ALREADY_IN) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }   
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdFreePoolPtr);
+    if (size != 4) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdUsedPoolPtr);
+    if (size != 1) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Adding tbl without name.                             */
+    Shell_CmdTblAdd((CPU_CHAR *)0, Shell_Test_CmdTbl_2, &err);    
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Adding tbl with name len of 0.                       */
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_NO, Shell_Test_CmdTbl_3, &err);    
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Trying to add existing tbl and name.                 */
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_3, Shell_Test_CmdTbl_3, &err);
+    if (err != SHELL_ERR_MODULE_CMD_ALREADY_IN) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdFreePoolPtr);
+    if (size != 2) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdUsedPoolPtr);
+    if (size != 3) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_4, Shell_Test_CmdTbl_4, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Trying to add empty cmd tbl.                         */
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_7, Shell_Test_CmdTbl_7, &err);
+    if (err != SHELL_ERR_MODULE_CMD_EMPTY) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+                                                                /* Trying to add empty cmd tbl with empty name.         */
+    Shell_CmdTblAdd((CPU_CHAR *)0, Shell_Test_CmdTbl_7, &err);
+    if (err != SHELL_ERR_MODULE_CMD_EMPTY) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_5, Shell_Test_CmdTbl_5, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdFreePoolPtr);
+    if (size != 0) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdUsedPoolPtr);
+    if (size != 5) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+    
+                                                                /* Trying to add a tbl when there is no entry left.     */
+    Shell_CmdTblAdd(SHELL_TEST_CMD_TBL_NAME_6, Shell_Test_CmdTbl_6, &err);
+    if (err != SHELL_ERR_MODULE_CMD_NONE_AVAIL) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    } 
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdFreePoolPtr);
+    if (size != 0) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdUsedPoolPtr);
+    if (size != 5) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+    
+    return (DEF_OK);    
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Shell_Test_Exec()
+*
+* Description : Test Shell - Add tables
+*
+* Arguments   : none.
+*
+* Returns     : DEF_OK,   if no error.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Shell_Test().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Shell_Test_Exec()
+{
+    SHELL_ERR        err;
+    SHELL_CMD_PARAM  cmd_param;
+    CPU_CHAR         cmd_line[SHELL_TEST_CMD_LINE_LENGTH_MAX];
+    CPU_BOOLEAN      session_active;
+
+
+    cmd_param.pcur_working_dir = (void *)        0;
+    cmd_param.pout_opt         = (void *)        0;
+    cmd_param.psession_active  = (CPU_BOOLEAN *)&session_active;
+    
+
+                                                                /* Passing cmd line NULL ptr.                           */
+    Shell_Exec((CPU_CHAR *)0, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NULL_PTR) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Passing out funct NULL ptr.                          */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_1);
+    Shell_Exec(cmd_line, (SHELL_OUT_FNCT)0, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Passing cmd param NULL ptr.                         */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_1);
+    Shell_Exec(cmd_line, &Shell_Test_Out, (SHELL_CMD_PARAM *)0, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+    
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_1);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_2);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Passing unknown cmd.                                 */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_3);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_CMD_NOT_FOUND) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Passing unknown cmd in unknown tbl.                  */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_4);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_CMD_NOT_FOUND) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_5);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Passing too many arguments.                          */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_6);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_ARG_TBL_FULL) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Cmd with err.                                        */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_7);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_CMD_EXEC) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Out fnct with err.                                   */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_2);
+    Shell_Exec(cmd_line, &Shell_Test_Out_Err, &cmd_param, &err);
+    if (err != SHELL_ERR_CMD_EXEC) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* No module cmd name.                                  */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_8);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_CMD_NOT_FOUND) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Module cmd name too long.                            */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_9);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_CMD_NOT_FOUND) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_10);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_11);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_12);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* String and too many arg.                             */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_13);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_ARG_TBL_FULL) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_14);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_15);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_16);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_17);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* String and too many arg.                             */
+    Str_Copy(cmd_line, SHELL_TEST_CMD_LINE_18);
+    Shell_Exec(cmd_line, &Shell_Test_Out, &cmd_param, &err);
+    if (err != SHELL_ERR_ARG_TBL_FULL) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_Exec (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Shell_Test_RemTbl()
+*
+* Description : Test Shell - Add tables
+*
+* Arguments   : none.
+*
+* Returns     : DEF_OK,   if no error.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Shell_Test().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  Shell_Test_RemTbl()
+{
+    SHELL_ERR   err;
+    CPU_INT16S  size;
+
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdFreePoolPtr);
+    if (size != 0) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdUsedPoolPtr);
+    if (size != 5) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Shell_CmdTblRem(SHELL_TEST_CMD_TBL_NAME_1, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_RemTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Rem previously rem'd tbl.                            */
+    Shell_CmdTblRem(SHELL_TEST_CMD_TBL_NAME_1, &err);
+    if (err != SHELL_ERR_MODULE_CMD_NOT_FOUND) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_RemTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdFreePoolPtr);
+    if (size != 1) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdUsedPoolPtr);
+    if (size != 4) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Rem NULL tbl name.                                   */
+    Shell_CmdTblRem((CPU_CHAR *)0, &err);
+    if (err != SHELL_ERR_NULL_PTR) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_RemTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Shell_CmdTblRem(SHELL_TEST_CMD_TBL_NAME_2, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_RemTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Shell_CmdTblRem(SHELL_TEST_CMD_TBL_NAME_3, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_RemTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Shell_CmdTblRem(SHELL_TEST_CMD_TBL_NAME_4, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_RemTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    Shell_CmdTblRem(SHELL_TEST_CMD_TBL_NAME_5, &err);
+    if (err != SHELL_ERR_NONE) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_RemTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdFreePoolPtr);
+    if (size != 5) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdUsedPoolPtr);
+    if (size != 0) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+                                                                /* Rem non inserted tbl.                                */
+    Shell_CmdTblRem(SHELL_TEST_CMD_TBL_NAME_6, &err);
+    if (err != SHELL_ERR_MODULE_CMD_NOT_FOUND) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_RemTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdFreePoolPtr);
+    if (size != 5) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+
+    size = Shell_Test_GetPoolSize(Shell_ModuleCmdUsedPoolPtr);
+    if (size != 0) {
+        SHELL_TEST_TRACE_DEBUG(("Error Shell_Test_AddTbl (line %d)\n\r", __LINE__));
+        return (DEF_FAIL);
+    }
+    
+    return (DEF_OK);    
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Shell_Test_Cmd()
+*
+* Description : Test command.
+*
+* Arguments   : argc        Argument count supplied to the function via argv.
+*               argv        Array of pointer to the strings which are those arguments.
+*               out_fnct    Pointer to 'output' function.
+*               pcmd_param  Pointer to command additional parameters.
+*
+* Returns     : Number of positive octets output, if no error.
+*
+*               SHELL_EXEC_ERR,                   otherwise.
+*
+* Caller(s)   : Shell_Exec().
+*
+* Note(s)     : (1) This function is called by its pointer from Shell_Exec().
+*********************************************************************************************************
+*/
+
+CPU_INT16S  Shell_Test_Cmd (CPU_INT16U        argc,
+                           CPU_CHAR         *argv[],
+                           SHELL_OUT_FNCT    out_fnct,
+                           SHELL_CMD_PARAM  *pcmd_param)
+{
+    CPU_INT16U  cmd_name_len;
+    CPU_INT16S  output;
+    CPU_INT16S  ret_val;
+
+
+    cmd_name_len = Str_Len(argv[0]);
+    
+    if (out_fnct != (SHELL_OUT_FNCT)0) {
+    
+        output       = out_fnct(argv[0],
+                                cmd_name_len,
+                                pcmd_param->pout_opt);
+
+        switch(output) {
+            case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+            case SHELL_OUT_ERR:
+                  ret_val = SHELL_EXEC_ERR;
+                  break;
+
+            default:
+                 ret_val = output;
+        }
+    
+    } else {
+      ret_val = cmd_name_len;
+    }
+    
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Shell_Test_Cmd_Err()
+*
+* Description : Test command with error.
+*
+* Arguments   : argc        Argument count supplied to the function via argv.
+*               argv        Array of pointer to the strings which are those arguments.
+*               out_fnct    Pointer to 'output' function.
+*               pcmd_param  Pointer to command additional parameters.
+*
+* Returns     : SHELL_EXEC_ERR
+*
+* Caller(s)   : Shell_Exec().
+*
+* Note(s)     : (1) This function is called by its pointer from Shell_Exec().
+*********************************************************************************************************
+*/
+
+CPU_INT16S  Shell_Test_Cmd_Err (CPU_INT16U        argc,
+                               CPU_CHAR         *argv[],
+                               SHELL_OUT_FNCT    out_fnct,
+                               SHELL_CMD_PARAM  *pcmd_param)
+{
+    return (SHELL_EXEC_ERR);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Shell_Test_Out()
+*
+* Description : Test output function.
+*
+* Arguments   : pbuf        Pointer to buffer to output.
+*               buf_len     Length of buffer.
+*               popt        Pointer to implementation specific additional parameter.
+*
+* Returns     : Length of pbuf (See Note #2).
+*
+* Caller(s)   : Shell_Test_Cmd().
+*
+* Note(s)     : (1) This function is called by its pointer from Shell_Test_Cmd().
+*
+*               (2) The return value of this function is implementation specific.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  Shell_Test_Out (CPU_CHAR   *pbuf,
+                            CPU_INT16U  buf_len,
+                            void       *popt)
+{
+    return (buf_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Shell_Test_Out_Err()
+*
+* Description : Test output function.
+*
+* Arguments   : pbuf        Pointer to buffer to output.
+*               buf_len     Length of buffer.
+*               popt        Pointer to implementation specific additional parameter.
+*
+* Returns     : SHELL_OUT_ERR.
+*
+* Caller(s)   : Shell_Test_Cmd().
+*
+* Note(s)     : (1) This function is called by its pointer from Shell_Test_Cmd().
+*********************************************************************************************************
+*/
+
+CPU_INT16S  Shell_Test_Out_Err (CPU_CHAR   *pbuf,
+                                CPU_INT16U  buf_len,
+                                void       *popt)
+{
+    return (SHELL_OUT_ERR);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Shell_Test_GetPoolSize()
+*
+* Description : Get size of pool
+*
+* Arguments   : pool        Pointer to pool of interest.
+*
+* Returns     : Size of pool.
+*
+* Caller(s)   : Shell_Test_AddTbl(),
+*               Shell_Test_RemTbl().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  Shell_Test_GetPoolSize (SHELL_MODULE_CMD  *pool)
+{
+    CPU_INT16S         size;
+    SHELL_MODULE_CMD  *cur_tbl;
+
+
+    size    = 0;
+    cur_tbl = pool;
+    
+    while (cur_tbl != (SHELL_MODULE_CMD *)0) {
+        size ++;
+        cur_tbl = cur_tbl->NextModuleCmdPtr;
+    }
+
+    return (size);
+}
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Source/dbg/shell_test.h b/src/ucos_v1_42/micrium_source/uC-Shell/Source/dbg/shell_test.h
new file mode 100644
index 0000000..7dad2c9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Source/dbg/shell_test.h
@@ -0,0 +1,253 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                             (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           SHELL TEST SUITE
+*
+* Filename      : shell_test.h
+* Version       : V1.03.01
+* Programmer(s) : SR
+*********************************************************************************************************
+* 
+*
+*
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                 MODULE
+*
+* Note(s) : (1) This header file is protected from multiple pre-processor inclusion through use of the
+*               SHELL_TEST present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  SHELL_TEST_PRESENT                                     /* See Note #1.                                         */
+#define  SHELL_TEST_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                          SHELL VERSION NUMBER
+*
+* Note(s) : (1) (a) The Shell software version is denoted as follows :
+*
+*                       Vx.yy
+*
+*                           where
+*                                  V     denotes 'Version' label
+*                                  x     denotes major software version revision number
+*                                  yy    denotes minor software version revision number
+*
+*               (b) The Shell software version label #define is formatted as follows :
+*
+*                       ver = x.yy * 100
+*
+*                           where
+*                                  ver   denotes software version number scaled as 
+*                                        an integer value
+*                                  x.yy  denotes software version number
+*********************************************************************************************************
+*/
+
+#define  SHELL_TEST_VERSION             100u                    /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   SHELL_TEST_MODULE
+#define  SHELL_TEST_EXT
+#else
+#define  SHELL_TEST_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*/
+
+#define  SHELL_TEST_CMD_LINE_LENGTH_MAX        100
+
+/*
+*********************************************************************************************************
+*                                           TBL NAME DEFINES
+*********************************************************************************************************
+*/
+
+#define  SHELL_TEST_CMD_TBL_NAME_1          "Test1"
+#define  SHELL_TEST_CMD_TBL_NAME_2          "Test2"
+#define  SHELL_TEST_CMD_TBL_NAME_3          "Test3"
+#define  SHELL_TEST_CMD_TBL_NAME_4          "Test4"
+#define  SHELL_TEST_CMD_TBL_NAME_5          "Test5"
+#define  SHELL_TEST_CMD_TBL_NAME_6          "Test6"
+#define  SHELL_TEST_CMD_TBL_NAME_7          "Test7"
+#define  SHELL_TEST_CMD_TBL_NAME_NO         ""
+#define  SHELL_TEST_CMD_TBL_NAME_TOO_LONG   "NameTooLong"
+
+
+/*
+*********************************************************************************************************
+*                                           CMD NAME DEFINES
+*********************************************************************************************************
+*/
+
+#define  SHELL_TEST_CMD_1_1                 "Test1_1"
+#define  SHELL_TEST_CMD_1_2                 "Test1_2"
+#define  SHELL_TEST_CMD_2_1                 "Test2_1"
+#define  SHELL_TEST_CMD_2_2                 "Test2_2"
+#define  SHELL_TEST_CMD_3_1                 "Test3_1"
+#define  SHELL_TEST_CMD_3_2                 "Test3_2"
+#define  SHELL_TEST_CMD_4_1                 "Test4_1"
+#define  SHELL_TEST_CMD_4_2                 "Test4_2"
+#define  SHELL_TEST_CMD_5_1                 "Test5_1"
+#define  SHELL_TEST_CMD_5_2                 "Test5_2"
+#define  SHELL_TEST_CMD_6_1                 "Test6_1"
+#define  SHELL_TEST_CMD_6_2                 "Test6_2"
+
+
+/*
+*********************************************************************************************************
+*                                           CMD LINE DEFINES
+*********************************************************************************************************
+*/
+
+#define  SHELL_TEST_CMD_LINE_1              "Test1_1"
+#define  SHELL_TEST_CMD_LINE_2              "Test2_2"
+#define  SHELL_TEST_CMD_LINE_3              "Test2_3"
+#define  SHELL_TEST_CMD_LINE_4              "Test7_3"
+#define  SHELL_TEST_CMD_LINE_5              "Test3_1 -a -b -c -d"
+#define  SHELL_TEST_CMD_LINE_6              "Test3_1 -a -b -c -d -e"
+#define  SHELL_TEST_CMD_LINE_7              "Test5_1 -a"
+#define  SHELL_TEST_CMD_LINE_8              "1"
+#define  SHELL_TEST_CMD_LINE_9              "TestTestTest"
+#define  SHELL_TEST_CMD_LINE_10             "Test1_1 \"a string\""
+#define  SHELL_TEST_CMD_LINE_11             "Test1_1 \"a string with many words\""
+#define  SHELL_TEST_CMD_LINE_12             "Test1_1 \"a string with many words\" -b -c -d"
+#define  SHELL_TEST_CMD_LINE_13             "Test1_1 \"a string with many words\" -b -c -d -e"
+#define  SHELL_TEST_CMD_LINE_14             "Test1_1 \"a string with many words\" \"another string\" -c -d"
+#define  SHELL_TEST_CMD_LINE_15             "Test1_1 \"a string with many words\" \"another string -c -d"
+#define  SHELL_TEST_CMD_LINE_16             "Test1_1 \"a string\"concanated"
+#define  SHELL_TEST_CMD_LINE_17             "Test1_1 \"a string\"\"a\"\"b\"\"c\""
+#define  SHELL_TEST_CMD_LINE_18             "Test1_1 \"a string\"\"a\"\"b\"\"c\"\"d\""
+
+
+/*
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  Shell_Test (void);
+
+
+/*
+*********************************************************************************************************
+*                                              TRACING
+*********************************************************************************************************
+*/
+
+                                                                /* Trace level, default to TRACE_LEVEL_OFF              */
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                                 0
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                                1
+#endif
+
+#ifndef  TRACE_LEVEL_DEBUG
+#define  TRACE_LEVEL_DEBUG                               2
+#endif
+
+#ifndef  SHELL_TEST_TRACE_LEVEL
+#define  SHELL_TEST_TRACE_LEVEL          TRACE_LEVEL_DEBUG
+#endif
+
+#ifndef  SHELL_TEST_TRACE
+#define  SHELL_TEST_TRACE                           printf
+#endif
+
+#define  SHELL_TEST_TRACE_INFO(x)        ((SHELL_TEST_TRACE_LEVEL >= TRACE_LEVEL_INFO)  ? (void)(SHELL_TEST_TRACE x) : (void)0)
+#define  SHELL_TEST_TRACE_DEBUG(x)       ((SHELL_TEST_TRACE_LEVEL >= TRACE_LEVEL_DEBUG) ? (void)(SHELL_TEST_TRACE x) : (void)0)
+
+
+/*
+*********************************************************************************************************
+*                                         CONFIGURATION ERRORS
+*
+* Note(s) : The configuration have to be set to some particular values in order for the tests to be
+*           effective.  Hence, some error checking is performed here to enforce the use of those values.
+*********************************************************************************************************
+*/
+
+#if    ((SHELL_CFG_CMD_TBL_SIZE             !=                  5))
+#error  "SHELL_CFG_CMD_TBL_SIZE                 illegally #define'd in 'app_cfg.h'"
+#error  "                                       [MUST be ==     5]                "
+#endif
+
+
+#if    ((SHELL_CFG_CMD_ARG_NBR_MAX          !=                  5))
+#error  "SHELL_CFG_CMD_ARG_NBR_MAX              illegally #define'd in 'app_cfg.h'"
+#error  "                                       [MUST be ==     5]                "
+#endif
+
+
+#if    ((SHELL_CFG_MODULE_CMD_NAME_LEN_MAX  !=                  6))
+#error  "SHELL_CFG_MODULE_CMD_NAME_LEN_MAX      illegally #define'd in 'app_cfg.h'"
+#error  "                                       [MUST be ==     6]                "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                              MODULE END
+*
+* Note(s) : See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of SHELL_TEST module include (see Note #1).      */
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Source/shell.c b/src/ucos_v1_42/micrium_source/uC-Shell/Source/shell.c
new file mode 100644
index 0000000..1376669
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Source/shell.c
@@ -0,0 +1,873 @@
+/*
+*********************************************************************************************************
+*                                              uC/Shell
+*                                            Shell Utility
+*
+*                          (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Shell is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            SHELL UTILITY
+*
+* Filename      : shell.c
+* Version       : V1.03.01
+* Programmer(s) : SR
+*                 FBJ
+*********************************************************************************************************
+* 
+*
+*
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    SHELL_MODULE
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           INITIALIZED DATA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U      Shell_Scanner          (CPU_CHAR           *in,
+                                                CPU_CHAR           *arg_tbl[],
+                                                CPU_INT16U          arg_tbl_size,
+                                                SHELL_ERR          *perr);
+
+static  SHELL_CMD_FNCT  Shell_CmdSearch        (CPU_CHAR           *cmd_name,
+                                                SHELL_ERR          *perr);
+
+static  void            Shell_ModuleCmdNameGet (CPU_CHAR           *cmd_name,
+                                                CPU_CHAR            module_cmd_name[],
+                                                CPU_INT16U          len,
+                                                SHELL_ERR          *perr);
+
+static  void            Shell_ModuleCmdClr      (SHELL_MODULE_CMD  *pmodule_cmd);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             Shell_Init()
+*
+* Description : Initialize the shell.
+*
+* Arguments   : none.
+*
+* Returns     : DEF_OK          Shell initialization successful.
+*               DEF_FAIL        Shell server initialization failed.
+*
+* Caller(s)   : Your Product's Application.
+*
+*               This function is a Shell initialization function & MAY be called by
+*               application/initialization function(s).
+*
+* Note(s)     : (1) Shell_Init() MUST be called ...
+*
+*                   (a) BEFORE the other Shell function are invoked.
+*
+*               (2) Shell_Init() MUST ONLY be called ONCE from product's application.
+*
+*               (3) Module command pools MUST be initialized PRIOR to initializing the pool with 
+*                   pointers to module commands.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Shell_Init (void)
+{
+    CPU_INT16U         i;
+    SHELL_MODULE_CMD  *pmodule_cmd;
+
+
+                                                                /* ---------------- INIT SHELL CMD TBL ---------------- */
+    Shell_ModuleCmdUsedPoolPtr = DEF_NULL;                      /* Init-clr module cmd pools    (see Note #3).          */
+    Shell_ModuleCmdFreePoolPtr = DEF_NULL;
+    
+    pmodule_cmd = &Shell_ModuleCmdTbl[0];
+    for (i = 0; i < SHELL_CFG_CMD_TBL_SIZE; i++) {              /* Free each module cmd to pool (see Note #3).          */
+        Shell_ModuleCmdClr(pmodule_cmd);
+
+                                                                /* Init doubly-linked list.                             */
+        pmodule_cmd->PrevModuleCmdPtr = DEF_NULL;
+        pmodule_cmd->NextModuleCmdPtr = Shell_ModuleCmdFreePoolPtr;
+
+        if (Shell_ModuleCmdFreePoolPtr != DEF_NULL) {
+            Shell_ModuleCmdFreePoolPtr->PrevModuleCmdPtr = pmodule_cmd;
+        }
+
+        Shell_ModuleCmdFreePoolPtr = pmodule_cmd;
+
+
+        pmodule_cmd++;
+    }
+    
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             Shell_Exec()
+*
+* Description : (1) Parse and execute command passed in parameter :
+*
+*                   (a) Parse input string
+*                   (b) Search  command
+*                   (c) Execute command
+*
+*
+* Argument(s) : in              Pointer to a CPU_CHAR string holding a complete command and its argument(s).
+*               out_funt        Pointer to 'output' function used by command (see Note #1).
+*               pcmd_param      Pointer to command additional parameters.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               SHELL_ERR_NONE              No error. 
+*                               SHELL_ERR_NULL_PTR          Argument 'in'       passed a NULL pointer.
+*                               SHELL_ERR_CMD_NOT_FOUND     Command NOT found.
+*                               SHELL_ERR_CMD_SEARCH        Error searching for command.
+*                               SHELL_ERR_CMD_EXEC          Error executing     command.
+*
+*                                                                       ----- RETURNED BY Shell_Scanner() : -----
+*                               SHELL_ERR_ARG_TBL_FULL      Argument table full and token still to be parsed.
+*
+* Return(s)   : Command specific return value.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) The command may generate some output that should be transmitted to some device (socket,
+*                   RS-232 link, ...).  The caller of this function is hence responsible for the
+*                   implementation of such function, if output is desired.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  Shell_Exec (CPU_CHAR         *in,
+                        SHELL_OUT_FNCT    out_fnct,
+                        SHELL_CMD_PARAM  *pcmd_param,
+                        SHELL_ERR        *perr)
+{
+    CPU_INT16U      argc;    
+    CPU_CHAR       *argv[SHELL_CFG_CMD_ARG_NBR_MAX];
+    SHELL_CMD_FNCT  cmd_fnct;
+    CPU_INT16S      ret_val;
+
+
+                                                                /* ------------------- VALIDATE PTR ------------------- */
+    if (in == DEF_NULL) {
+       *perr = SHELL_ERR_NULL_PTR;
+        return (0);
+    }
+
+
+                                                                /* ------------------ PARSE INPUT STR ----------------- */
+    argc = Shell_Scanner(in,
+                         argv,
+                         SHELL_CFG_CMD_ARG_NBR_MAX,
+                         perr);
+
+    if (*perr != SHELL_ERR_NONE) {
+        return (0);
+    } else if (argc == 0) {
+       *perr = SHELL_ERR_MODULE_CMD_EMPTY;
+        return (0);
+    }
+
+
+                                                                /* -------------------- SEARCH CMD -------------------- */
+    cmd_fnct = Shell_CmdSearch(argv[0], perr);
+    switch (*perr) {
+        case SHELL_ERR_NONE:
+             break;
+
+        case SHELL_ERR_MODULE_CMD_NOT_FOUND:
+        case SHELL_ERR_CMD_NOT_FOUND:
+        case SHELL_ERR_MODULE_CMD_NAME_NONE:
+        case SHELL_ERR_MODULE_CMD_NAME_TOO_LONG:
+            *perr = SHELL_ERR_CMD_NOT_FOUND;
+             return (0);
+
+        case SHELL_ERR_MODULE_CMD_NAME_COPY:
+        default:
+            *perr = SHELL_ERR_CMD_SEARCH;
+             return (0);
+    }
+
+
+                                                                /* -------------------- EXECUTE CMD ------------------- */
+    ret_val = cmd_fnct(argc, argv, out_fnct, pcmd_param);
+    
+    if (ret_val == SHELL_EXEC_ERR) {
+       *perr = SHELL_ERR_CMD_EXEC;
+    }
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Shell_CmdTblAdd()
+*
+* Description : (1) Allocate & initialize a module command :
+*
+*                   (a) Validate   module command
+*                   (b) Get a free module command
+*                   (c) Initialize module command
+*                   (d) Add to     module command used pool.
+*
+*               (2) The module command pools are implemented as doubly-linked lists :
+*
+*                   (a) 'Shell_ModuleCmdUsedPoolPtr' and 'Shell_ModuleCmdFreePoolPtr' point to the head
+*                       their module command pool.
+*
+*                   (b) Module command NextModuleCmdPtr's and PrevModuleCmdPtr's link each command to form
+*                       the module command pool doubly-linked list.
+*
+*                   (c) Module command are inserted & removed at the head of the module command pool lists.
+*
+*
+*                                    Module commands are
+*                                    inserted & removed
+*                                        at the head
+*                                      (see Note #2c)
+*
+*                                             |            NextModuleCmdPtr
+*                                             |             (see Note #2b)
+*                                             v                    |
+*                                                                  |
+*                                          -------       -------   v   -------       -------
+*                 Module command Pool ---->|     |------>|     |------>|     |------>|     |
+*                      Pointer             |     |       |     |       |     |       |     |
+*                                          |     |<------|     |<------|     |<------|     |
+*                   (see Note #2a)         -------       -------       -------   ^    -------
+*                                                                                |
+*                                                                                |
+*                                                                         PrevModuleCmdPtr
+*                                                                          (see Note #2b)
+*
+*                                          |                                               |
+*                                          |<-----Pool of Free/Used Module Commands ------>|
+*                                          |                (see Note #2)                  |
+*
+*
+*
+* Argument(s) : cmd_tbl_name    Pointer to character string representing the name of the command table.
+*               cmd_tbl         Command table to add.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               SHELL_ERR_NONE                      No error.
+*                               SHELL_ERR_NULL_PTR                  Argument 'cmd_tbl' passed a NULL pointer.
+*                               SHELL_ERR_MODULE_CMD_EMPTY          Command table empty.
+*                               SHELL_ERR_MODULE_CMD_ALREADY_IN     Command table already added, or command
+*                                                                   table name already used.
+*                               SHELL_ERR_MODULE_CMD_NONE_AVAIL     NO available module command to allocate.
+*
+*                                                                       ----- RETURNED BY Shell_ModuleCmdNameGet() : -----
+*                               SHELL_ERR_MODULE_CMD_NAME_NONE      NO module command name found.
+*                               SHELL_ERR_MODULE_CMD_NAME_TOO_LONG  Module command name too long.
+*                               SHELL_ERR_MODULE_CMD_NAME_COPY      Copy error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (3) The 'name' argument is the prefix of the commands in 'cmd_tbl'.  In order to speed up
+*                   the command search, the shell first locate the appropriate table based on the prefix
+*                   of the command.  Hence, it is mandatory that all commands in a table be named with
+*                   the same prefix.  For instance, uC/TCP-IP related command displaying statistics should
+*                   look like :
+*
+*                       Net_stats
+*
+*                   while a file system command listing the current directory would be :
+*
+*                       FS_ls
+*
+*                   The names of those module commands are respectively 'Net' and 'FS'.
+*
+*               (4) #### The 'cmd_tbl_name' parameter is not mandatory in the current implementation.
+*                   Although you could pass a 'NULL' value for this parameter, it is recommended to provide
+*                   the prefix of the commands in 'cmd_tbl' for future compatibility.
+*
+*                   However, passing NULL for this parameter will result in the first command prefix to
+*                   be extracted and used as the command table name.
+*
+*               (5) If an empty character array is passed in the cmd_tbl_name parameter, the function
+*                   will extract the first command prefix to use as the command table name.
+*********************************************************************************************************
+*/
+
+void  Shell_CmdTblAdd (CPU_CHAR   *cmd_tbl_name,
+                       SHELL_CMD   cmd_tbl[],
+                       SHELL_ERR  *perr)
+{
+    SHELL_CMD         *pcmd;
+    CPU_SIZE_T         name_len;
+    CPU_CHAR           tbl_name[SHELL_CFG_MODULE_CMD_NAME_LEN_MAX];
+    CPU_CHAR          *ptbl_name;
+    SHELL_MODULE_CMD  *pmodule_cmd;
+    CPU_INT16S         name_compare;
+
+
+                                                                /* ------------------- VALIDATE PTR ------------------- */
+    if (cmd_tbl == DEF_NULL) {
+       *perr = SHELL_ERR_NULL_PTR;
+        return;
+    }
+
+    if (cmd_tbl[0].Fnct == (SHELL_CMD_FNCT)0) {                 /* If cmd tbl empty ...                                 */
+       *perr = SHELL_ERR_MODULE_CMD_EMPTY;                      /* ... rtn err.                                         */
+        return;
+    }
+
+
+    ptbl_name = DEF_NULL;
+
+    if (cmd_tbl_name != DEF_NULL) {                        /* If cmd_tbl_name not null ...                         */
+        name_len = Str_Len(cmd_tbl_name);
+        if (name_len >= SHELL_CFG_MODULE_CMD_NAME_LEN_MAX) {    /* ... If name too long ...                             */
+           *perr = SHELL_ERR_MODULE_CMD_NAME_TOO_LONG;          /*     ... rtn err.                                     */
+            return;
+        
+        } else if (name_len > 0) {                              /*     ... else if name greater of 0 ...                */
+            ptbl_name = cmd_tbl_name;                           /*     ... use as tbl name.                             */
+        }
+    }
+
+    if (ptbl_name == DEF_NULL) {                           /* If cmd tbl name not gotten from param ...            */
+        pcmd = &cmd_tbl[0];
+        Shell_ModuleCmdNameGet((CPU_CHAR *)pcmd->Name,          /* ... get name from first command.                     */
+                                           tbl_name,
+                                           SHELL_CFG_MODULE_CMD_NAME_LEN_MAX,
+                                           perr);
+
+        if (*perr != SHELL_ERR_NONE) {
+            return;
+        }
+        ptbl_name = tbl_name;
+    }
+
+
+                                                                /* -------------- CHK FOR DUPLICATE ENTRY ------------- */
+    pmodule_cmd = Shell_ModuleCmdUsedPoolPtr;
+    while (pmodule_cmd != DEF_NULL) {
+        name_compare = Str_Cmp(pmodule_cmd->Name, ptbl_name);
+
+        if ((pmodule_cmd->CmdTblPtr == cmd_tbl) ||              /* If module name already used ...                      */
+            (name_compare           == 0      )) {
+
+           *perr = SHELL_ERR_MODULE_CMD_ALREADY_IN;             /* ... rtn err.                                         */
+            return;
+        } 
+
+        pmodule_cmd = pmodule_cmd->NextModuleCmdPtr;
+    }
+
+
+                                                                /* ------------------ GET MODULE CMD ------------------ */
+    if (Shell_ModuleCmdFreePoolPtr != DEF_NULL) {               /* If module cmd pool NOT empty ...                     */
+                                                                /* ... get one from pool.                               */
+        pmodule_cmd                 = Shell_ModuleCmdFreePoolPtr;
+        Shell_ModuleCmdFreePoolPtr  = pmodule_cmd->NextModuleCmdPtr;
+
+    } else {                                                    /* If none avail ...                                    */
+       *perr =  SHELL_ERR_MODULE_CMD_NONE_AVAIL;                /* ... rtn err.                                         */
+        return;
+    }
+
+
+                                                                /* ----------------- INIT MODULE CMD ------------------ */
+    Str_Copy(pmodule_cmd->Name, ptbl_name);
+    pmodule_cmd->CmdTblPtr = cmd_tbl;
+
+
+                                                                /* ---------- ADD TO MODULE CMD TBL USED POOL --------- */
+                                                                /* Update doubly-linked list.                           */
+    pmodule_cmd->PrevModuleCmdPtr = DEF_NULL;
+    pmodule_cmd->NextModuleCmdPtr = Shell_ModuleCmdUsedPoolPtr;
+
+    if (Shell_ModuleCmdUsedPoolPtr != DEF_NULL) {
+        Shell_ModuleCmdUsedPoolPtr->PrevModuleCmdPtr = pmodule_cmd;
+    }
+
+    Shell_ModuleCmdUsedPoolPtr = pmodule_cmd;
+
+
+   *perr = SHELL_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Shell_CmdTblRem()
+*
+* Description : (1) Remove a module command  :
+*
+*                   (a) Search module command
+*                   (b) Remove module command
+*                   (c) Update module command pools
+*
+*
+* Argument(s) : cmd_tbl_name    Pointer to character string representing the name of the command table.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               SHELL_ERR_NONE                  No error.
+*                               SHELL_ERR_NULL_PTR              Argument 'cmd_tbl_name' passed a NULL pointer.
+*                               SHELL_ERR_MODULE_CMD_NOT_FOUND  Module command NOT found.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  Shell_CmdTblRem (CPU_CHAR   *cmd_tbl_name,
+                       SHELL_ERR  *perr)
+{
+    SHELL_MODULE_CMD  *pmodule_cmd_list;
+    SHELL_MODULE_CMD  *pmodule_cmd;
+    CPU_INT16S         name_compare;
+
+
+                                                                /* ------------------- VALIDATE PTR ------------------- */
+    if (cmd_tbl_name == DEF_NULL) {
+       *perr = SHELL_ERR_NULL_PTR;
+        return;
+    }
+
+                                                                /* ----------------- SEARCH MODULE CMD ---------------- */  
+    pmodule_cmd_list = Shell_ModuleCmdUsedPoolPtr;
+    pmodule_cmd      = DEF_NULL;
+
+    while (pmodule_cmd_list != DEF_NULL) {
+        name_compare = Str_Cmp(cmd_tbl_name, pmodule_cmd_list->Name);
+        if (name_compare == 0) {
+            pmodule_cmd = pmodule_cmd_list;
+            break;
+        }
+        pmodule_cmd_list = pmodule_cmd_list->NextModuleCmdPtr;
+    }
+
+    if (pmodule_cmd == DEF_NULL) {
+       *perr = SHELL_ERR_MODULE_CMD_NOT_FOUND;
+        return;
+    }
+
+
+                                                                /* ----------- REM MODULE CMD & UPDATE POOLS ---------- */
+                                                                /* Update used module cmd pool.                         */
+    if (pmodule_cmd->PrevModuleCmdPtr != DEF_NULL) {           /* If prev NOT NULL ... set prev's next to next.        */
+        (pmodule_cmd->PrevModuleCmdPtr)->NextModuleCmdPtr = pmodule_cmd->NextModuleCmdPtr;
+    } else {                                                    /* Else ...             set used pool ptr to next.      */
+        Shell_ModuleCmdUsedPoolPtr = pmodule_cmd->NextModuleCmdPtr;
+    }
+
+    if (pmodule_cmd->NextModuleCmdPtr != DEF_NULL) {           /* If next NOT NULL ... set next's prev to prev.        */
+        (pmodule_cmd->NextModuleCmdPtr)->PrevModuleCmdPtr = pmodule_cmd->PrevModuleCmdPtr;
+    }
+
+                                                                /* Update free module cmd pool.                         */
+    Shell_ModuleCmdClr(pmodule_cmd);
+    pmodule_cmd->NextModuleCmdPtr = Shell_ModuleCmdFreePoolPtr;
+
+    if (Shell_ModuleCmdFreePoolPtr != DEF_NULL) {
+        Shell_ModuleCmdFreePoolPtr->PrevModuleCmdPtr = pmodule_cmd;
+    }
+
+    Shell_ModuleCmdFreePoolPtr = pmodule_cmd;
+
+
+   *perr = SHELL_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           Shell_Scanner()
+*
+* Description : Scan and parse the command line.
+*
+* Argument(s) : in              Pointer to a NUL terminated string holding a complete command and its
+*                               argument(s).
+*               arg_tbl         Array of pointer that will receive pointers to token.
+*               arg_tbl_size    Size of arg_tbl array.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               SHELL_ERR_NONE              No error. 
+*                               SHELL_ERR_ARG_TBL_FULL      Argument table full and token still to be parsed.
+*
+* Return(s)   : Number of token(s) (command name and argument(s)).
+*
+* Caller(s)   : Shell_Exec().
+*
+* Note(s)     : (1) The first token is always the command name itself.
+*
+*               (2) This function modify the 'in' arguments by replacing token's delimiter characters by
+*                   termination character ('\0').
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  Shell_Scanner (CPU_CHAR   *in,
+                                   CPU_CHAR   *arg_tbl[],
+                                   CPU_INT16U  arg_tbl_size,
+                                   SHELL_ERR  *perr)
+{
+    CPU_CHAR    *in_rd;
+    CPU_INT16U   tok_ix;
+    CPU_BOOLEAN  end_tok_found;
+    CPU_BOOLEAN  quote_opened;
+
+
+    in_rd            = in;
+    tok_ix           = 0;
+    end_tok_found    = DEF_YES;
+    quote_opened     = DEF_NO;    
+
+                                                                /* ------------------ SCAN CMD LINE  ------------------ */
+    while (*in_rd) {
+        switch (*in_rd) {
+            case SHELL_ASCII_QUOTE:                             /* Quote char found.                                    */
+                 if (quote_opened == DEF_YES) {
+                      quote_opened  = DEF_NO;
+                     *in_rd         = (CPU_CHAR)0;
+                      end_tok_found = DEF_YES;
+                 } else {
+                      quote_opened   = DEF_YES;
+                 }
+                 
+                 break;
+
+            case SHELL_ASCII_SPACE:                             /* Space char found.                                    */
+                 if ((end_tok_found == DEF_NO) &&               /* If first space between tok && quote NOT opened ...   */
+                     (quote_opened  == DEF_NO)) {                           
+                     *in_rd         =  SHELL_ASCII_ARG_END;   /* ... put termination char.                            */    
+                      end_tok_found =  DEF_YES;   
+                 }
+
+                 break;
+
+            default:                                            /* Other char found ...                                 */
+                 if (end_tok_found == DEF_YES) {
+                     if (tok_ix < arg_tbl_size) {
+                         arg_tbl[tok_ix] = in_rd;               /* Set arg_tbl ptr to tok location.                     */
+                         tok_ix++;
+                         end_tok_found = DEF_NO;
+                     } else {
+                        *perr = SHELL_ERR_ARG_TBL_FULL;
+                         return (0);
+                     }
+                 }
+
+                 break;
+        }
+        in_rd++;
+    }
+
+
+   *perr = SHELL_ERR_NONE;
+    
+    return (tok_ix);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Shell_CmdSearch()
+*
+* Description : (1) Search for specified command :
+*
+*                   (a) Extract module command name
+*                   (b) Search  module command
+*                   (c) Search  command in table
+*
+*
+* Argument(s) : cmd_name        Pointer to command name.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               SHELL_ERR_NONE                      No error. 
+*                               SHELL_ERR_MODULE_CMD_NOT_FOUND      Module command NOT found.
+*                               SHELL_ERR_CMD_NOT_FOUND             Command        NOT found.
+*
+*                                                                       ----- RETURNED BY Shell_ModuleCmdNameGet() : -----
+*                               SHELL_ERR_MODULE_CMD_NAME_NONE      No module command name found.
+*                               SHELL_ERR_MODULE_CMD_NAME_TOO_LONG  Module command name too long.
+*                               SHELL_ERR_MODULE_CMD_NAME_COPY      Copy error.
+*
+* Return(s)   : Pointer to command function.
+*
+* Caller(s)   : Shell_Exec().
+*
+* Note(s)     : none. 
+*********************************************************************************************************
+*/
+
+static  SHELL_CMD_FNCT  Shell_CmdSearch (CPU_CHAR   *cmd_name,
+                                         SHELL_ERR  *perr)
+{
+    CPU_CHAR           module_cmd_name[SHELL_CFG_MODULE_CMD_NAME_LEN_MAX];    
+    SHELL_MODULE_CMD  *pmodule_cmd_list;
+    SHELL_MODULE_CMD  *pmodule_cmd;
+    SHELL_CMD         *pcmd_list;
+    SHELL_CMD         *pcmd;
+    CPU_INT16S         name_compare;
+    CPU_INT16U         i; 
+    SHELL_CMD_FNCT     fnct;
+
+                                                                /* ------------- INIT RECEIVE CMD NAME TBL ------------ */
+    for (i = 0; i < SHELL_CFG_MODULE_CMD_NAME_LEN_MAX; i++) {
+        module_cmd_name[i] = SHELL_ASCII_ARG_END;   
+    }
+
+                                                                /* -------------- EXTRACT MODULE CMD NAME ------------- */
+    Shell_ModuleCmdNameGet(cmd_name,
+                           module_cmd_name,
+                           SHELL_CFG_MODULE_CMD_NAME_LEN_MAX,
+                           perr);
+
+    if (*perr !=  SHELL_ERR_NONE) {
+         return ((SHELL_CMD_FNCT)0);
+    }
+
+                                                                /* ----------------- SEARCH MODULE CMD ---------------- */  
+    pmodule_cmd_list = Shell_ModuleCmdUsedPoolPtr;
+    pmodule_cmd      = DEF_NULL;
+
+    while (pmodule_cmd_list != DEF_NULL) {
+        name_compare = Str_Cmp(module_cmd_name, pmodule_cmd_list->Name);
+        if (name_compare == 0) {
+            pmodule_cmd = pmodule_cmd_list;
+            break;
+        }
+        pmodule_cmd_list = pmodule_cmd_list->NextModuleCmdPtr;
+    }
+
+    if (pmodule_cmd == DEF_NULL) {
+       *perr = SHELL_ERR_MODULE_CMD_NOT_FOUND;
+        return ((SHELL_CMD_FNCT)0);
+    }
+
+
+                                                                /* -------------------- SEARCH CMD -------------------- */
+    pcmd_list = pmodule_cmd->CmdTblPtr;
+    pcmd      = DEF_NULL;
+
+    while (pcmd_list->Fnct != (SHELL_CMD_FNCT)0) {
+        name_compare = Str_Cmp(cmd_name, pcmd_list->Name);
+        if (name_compare == 0) {
+            pcmd  = pcmd_list;
+            break;
+        }
+        pcmd_list++;
+    }
+
+    if (pcmd == DEF_NULL) {
+       *perr = SHELL_ERR_CMD_NOT_FOUND;
+        return ((SHELL_CMD_FNCT)0);
+    }
+
+                                                                /* ---------------------- RTN CMD --------------------- */
+   *perr =  SHELL_ERR_NONE;
+    fnct = (SHELL_CMD_FNCT)pcmd->Fnct;
+
+    return (fnct);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Shell_ModuleCmdNameGet()
+*
+* Description : (1) Get the command module name (prefix) from a command string :
+*
+*                   (a) Search for module command name delimiter
+*                   (b) Copy       module command name
+*
+*
+* Argument(s) : cmd_str          Pointer to command string holding the command module name.
+*               module_cmd_name  Pointer to a preallocated variable that will receive the module
+*                                command name.
+*               len              Length of the array pointed by 'module_cmd_name'.
+*               perr             Pointer to variable that will receive the return error code from this
+*                                function :
+*
+*                                SHELL_ERR_NONE                      No error. 
+*                                SHELL_ERR_MODULE_CMD_NAME_NONE      No module command name found.
+*                                SHELL_ERR_MODULE_CMD_NAME_TOO_LONG  Module command name too long.
+*                                SHELL_ERR_MODULE_CMD_NAME_COPY      Copy error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Shell_CmdTblAdd(),
+*               Shell_CmdSearch().
+*
+* Note(s)     : (2) The command module name consists in the first part of a command part, that is the
+*                   part preceding the underscore ('_') character. If there is no underscored character,
+*                   the command name is interpreted as the commande module name.
+*********************************************************************************************************
+*/
+
+static  void  Shell_ModuleCmdNameGet (CPU_CHAR    *cmd_str,
+                                      CPU_CHAR     module_cmd_name[],
+                                      CPU_INT16U   len,
+                                      SHELL_ERR   *perr)
+{
+    CPU_CHAR     *pcmd;
+    CPU_BOOLEAN   found;
+    CPU_INT16U    name_len;
+    CPU_CHAR     *copy_ret_val;
+
+
+    pcmd  = cmd_str;
+    found = DEF_NO;
+
+                                                                /* --------- SEARCH MODULE CMD NAME DELIMITER --------- */
+    while ((pcmd  != DEF_NULL) &&
+           (found ==  DEF_NO)) {
+
+        if (*pcmd ==  SHELL_ASCII_CDM_NAME_DELIMITER) {
+             found =  DEF_YES;
+             break;
+        } else if (*pcmd == SHELL_ASCII_ARG_END) {
+             found =  DEF_YES;
+             break;
+        }
+        pcmd++;
+    }
+
+    if (found == DEF_NO) {
+       *perr = SHELL_ERR_MODULE_CMD_NAME_NONE;
+        return;
+    }
+
+ 
+                                                                /* --------------- COPY MODULE CMD NAME --------------- */
+    name_len = (pcmd - cmd_str);
+    if (name_len >= len) {                                      /* If module cmd name too long ...                      */
+       *perr = SHELL_ERR_MODULE_CMD_NAME_TOO_LONG;              /* ... rtn with error.                                  */
+        return;
+    }
+
+    copy_ret_val = Str_Copy_N(module_cmd_name, cmd_str, name_len);
+    if (copy_ret_val == (CPU_CHAR)0) {
+       *perr = SHELL_ERR_MODULE_CMD_NAME_COPY;
+        return;
+    }
+
+
+   *perr = SHELL_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            Shell_ModuleCmdClr()
+*
+* Description : Clear module command.
+*
+* Argument(s) : pmodule_cmd      Pointer to module command.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Shell_Init(),
+*               Shell_CmdTblRem().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  Shell_ModuleCmdClr (SHELL_MODULE_CMD  *pmodule_cmd)
+{
+    Str_Copy(pmodule_cmd->Name, "");
+
+    pmodule_cmd->PrevModuleCmdPtr = DEF_NULL;
+    pmodule_cmd->NextModuleCmdPtr = DEF_NULL;
+
+    pmodule_cmd->CmdTblPtr        = DEF_NULL;
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Source/shell.h b/src/ucos_v1_42/micrium_source/uC-Shell/Source/shell.h
new file mode 100644
index 0000000..ef0e723
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Source/shell.h
@@ -0,0 +1,433 @@
+/*
+*********************************************************************************************************
+*                                              uC/Shell
+*                                            Shell Utility
+*
+*                          (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/Shell is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            SHELL UTILITY
+*
+* Filename      : shell.h
+* Version       : V1.03.01
+* Programmer(s) : SR
+*                 FBJ
+*********************************************************************************************************
+* 
+*
+*
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This header file is protected from multiple pre-processor inclusion through use of the
+*               SHELL present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  SHELL_PRESENT                                          /* See Note #1.                                         */
+#define  SHELL_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                        SHELL VERSION NUMBER
+*
+* Note(s) : (1) (a) The Shell module software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The Shell software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer 
+*                                                       portion denotes the major version number & the unscaled 
+*                                                       fractional portion denotes the (concatenated) minor 
+*                                                       version numbers
+*********************************************************************************************************
+*/
+
+#define  SHELL_VERSION                                 10301u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   SHELL_MODULE
+#define  SHELL_EXT
+#else
+#define  SHELL_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The Shell module files are located in the following directories :
+*
+*               (a) \\shell_cfg.h
+*
+*               (b) \\Source\shell.h
+*                                  \shell.c
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                                        directory path for Shell module
+*
+*           (2) CPU-configuration software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) NO compiler-supplied standard library functions SHOULD be used.
+*
+*               (a) Standard library functions are implemented in the custom library module(s) :
+*
+*                       \\lib_*.*
+*
+*                           where
+*                                         directory path for custom library software
+*
+*           (4) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\' directory                            See Note #1a
+*
+*               (b) '\\' directory                                               See Note #1b
+*
+*               (c) (1) '\\'                  directory         See Note #2a
+*                   (2) '\\\\' directory         See Note #2b
+*
+*               (d) '\\' directory                            See Note #3a
+*********************************************************************************************************
+*/
+
+#include                                                 /* CPU Configuration              (see Note #2b)        */
+#include                                            /* CPU Core Library               (see Note #2a)        */
+
+#include                                             /* Standard        Defines        (see Note #3a)        */
+#include                                             /* Standard String Library        (see Note #3a)        */
+
+#include                                           /* Application Configuration File (see Note #1a)        */
+
+
+/*
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*/
+
+#define  SHELL_ASCII_SPACE                                ' '   /* ASCII value for space                                */
+#define  SHELL_ASCII_QUOTE                                '\"'  /* ASCII value for quote                                */
+#define  SHELL_ASCII_ARG_END                              '\0'
+#define  SHELL_ASCII_CDM_NAME_DELIMITER                   '_'
+
+
+/*
+*********************************************************************************************************
+*                                      SHELL ERROR CODES DEFINES
+*
+* Note(s) : (1) Command function MUST return SHELL_EXEC_ERR when an error occurred at execution time.
+*               Any other return value is command specific.
+*
+*           (2) Output function MUST return :
+*
+*               (a) The number of positive data octets transmitted, if NO errors
+*
+*               (b) SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               (c) SHELL_OUT_ERR,                                  otherwise 
+*********************************************************************************************************
+*/
+
+#define  SHELL_EXEC_ERR                                   -1    /* See Note #1.                                         */
+
+#define  SHELL_OUT_RTN_CODE_CONN_CLOSED                    0    /* See Note #2.                                         */
+#define  SHELL_OUT_ERR                                    -1
+
+#define  SHELL_ERR_NONE                                    0
+#define  SHELL_ERR_NULL_PTR                                1
+#define  SHELL_ERR_MODULE_CMD_EMPTY                        2
+#define  SHELL_ERR_MODULE_CMD_NAME_TOO_LONG                3
+#define  SHELL_ERR_MODULE_CMD_NAME_NONE                    4
+#define  SHELL_ERR_MODULE_CMD_NAME_COPY                    5
+#define  SHELL_ERR_MODULE_CMD_NONE_AVAIL                   6
+#define  SHELL_ERR_MODULE_CMD_ALREADY_IN                   7
+#define  SHELL_ERR_MODULE_CMD_NOT_FOUND                    8
+#define  SHELL_ERR_CMD_EXEC                                9
+#define  SHELL_ERR_CMD_NOT_FOUND                          10
+#define  SHELL_ERR_ARG_TBL_FULL                           11
+#define  SHELL_ERR_CMD_SEARCH                             12
+
+
+/*
+*********************************************************************************************************
+*                                        ERROR CODES DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  SHELL_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                        SHELL COMMAND PARAMETER
+*
+* Note(s) : (1) This structure is used to pass additional parameters to the command.  Future implementation
+*               of this module could add fields to that structure.
+*
+*           (2) This variable is used to let the shell commands to control the session status.  For
+*               instance, a command interacting with uC/TELNETs could used this variable to terminate
+*               the current session.
+*********************************************************************************************************
+*/
+
+typedef  struct  shell_cmd_param {
+    void         *pcur_working_dir;                             /* Cur working dir ptr.                                 */
+    void         *pout_opt;                                     /* Output opt      ptr.                                 */
+    CPU_BOOLEAN  *psession_active;                              /* Session status flag (see Note #2).                   */
+} SHELL_CMD_PARAM;
+
+
+/*
+*********************************************************************************************************
+*                                SHELL COMMAND FUNCTION POINTER DATA TYPE
+*
+* Note(s) : (1) (a) 'SHELL_OUT_FNCT' data type defined to replace the commonly-used function pointer
+*                   to the output facility.
+*
+*               (b)     CPU_INT16U        ret_val;
+*                       SHELL_CMD_FNCT    FnctName;
+*                       CPU_CHAR         *pbuf;
+*                       CPU_INT16U        buf_len;
+*                       void             *popt;
+*
+*                       ret_val = FnctName(pbuf, buf_len, popt);
+*
+*               (c) Shell output function MUST return : 
+*
+*                   (1) The number of positive data octets transmitted, if NO error
+*
+*                   (2) SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if link connection closed
+*
+*                   (3) SHELL_OUT_ERR,                                  otherwise 
+*
+*           (2) (a) 'SHELL_CMD_FNCT' data type defined to replace the commonly-used function pointer
+*                   to a shell command.  The last parameter is a pointer to an 'out' function having
+*                   the prototype specified in #1.
+*
+*               (b) Example function pointer usage :
+*
+*                       CPU_INT16U        ret_val
+*                       SHELL_CMD_FNCT    FnctName;
+*                       CPU_INT16U        argc;
+*                       CPU_CHAR         *argv[];
+*                       SHELL_OUT_FNCT    pout_fnct;
+*                       SHELL_CMD_PARAM  *pcmd_param
+*
+*                       ret_val = FnctName(argc, argv, pout_fnct, pcmd_param);
+*
+*               (c) Shell commands MUST return SHELL_EXEC_ERR when an error occured at execution
+*                   time.  Any other return value is command specific.
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #1.                                         */
+typedef  CPU_INT16S  (*SHELL_OUT_FNCT)(CPU_CHAR          *p_buf,
+                                       CPU_INT16U         buf_len,
+                                       void              *p_opt);
+
+                                                                /* See Note #2.                                         */
+typedef  CPU_INT16S  (*SHELL_CMD_FNCT)(CPU_INT16U         argc,
+                                       CPU_CHAR          *argv[],
+                                       SHELL_OUT_FNCT     out_fnct,
+                                       SHELL_CMD_PARAM   *p_cmd_param);
+
+
+/*
+*********************************************************************************************************
+*                                       SHELL COMMAND DATA TYPE
+*
+* Note(s) : This structure is used to store a command (function pointer) along with a character string
+*           representing its name.
+*********************************************************************************************************
+*/
+
+typedef  struct  shell_cmd {
+    const  CPU_CHAR  *Name;                                     /* Ptr to cmd name.                                     */
+    SHELL_CMD_FNCT    Fnct;                                     /* Ptr to cmd fnct.                                     */
+} SHELL_CMD;
+
+
+/*
+*********************************************************************************************************
+*                                    SHELL MODULE COMMAND DATA TYPE
+*
+* Note(s) : 'Name' is a NULL terminated character string representing the name of the module command.
+*           See Shell_CmdTblAdd(), Note #2, for more details.
+*********************************************************************************************************
+*/
+
+typedef  struct  shell_module_cmd  SHELL_MODULE_CMD;
+
+struct  shell_module_cmd {
+    CPU_CHAR           Name[SHELL_CFG_MODULE_CMD_NAME_LEN_MAX]; /* Name (prefix) of module cmd (see Note #1).           */
+    SHELL_MODULE_CMD  *PrevModuleCmdPtr;                        /* Ptr to PREV      module cmd.                         */
+    SHELL_MODULE_CMD  *NextModuleCmdPtr;                        /* Ptr to NEXT      module cmd.                         */
+    SHELL_CMD         *CmdTblPtr;                               /* Ptr to cmd tbl.                                      */
+} ;
+
+
+/*
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+SHELL_EXT  SHELL_MODULE_CMD   Shell_ModuleCmdTbl[SHELL_CFG_CMD_TBL_SIZE];
+
+SHELL_EXT  SHELL_MODULE_CMD  *Shell_ModuleCmdUsedPoolPtr;       /* Ptr to pool of used module cmd.                      */
+SHELL_EXT  SHELL_MODULE_CMD  *Shell_ModuleCmdFreePoolPtr;       /* Ptr to pool of free module cmd.                      */
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Shell_Init     (void);
+
+CPU_INT16S   Shell_Exec     (CPU_CHAR         *in,
+                             SHELL_OUT_FNCT    out_fnct,
+                             SHELL_CMD_PARAM  *pcmd_param,
+                             SHELL_ERR        *perr);
+
+void         Shell_CmdTblAdd(CPU_CHAR         *cmd_tbl_name,
+                             SHELL_CMD         cmd_tbl[],
+                             SHELL_ERR        *perr);
+
+void         Shell_CmdTblRem(CPU_CHAR         *cmd_tbl_name,
+                             SHELL_ERR        *perr);
+
+
+/*
+*********************************************************************************************************
+*                                              TRACING
+*********************************************************************************************************
+*/
+
+                                                                /* Trace level, default to TRACE_LEVEL_OFF              */
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                                 0
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                                1
+#endif
+
+#ifndef  TRACE_LEVEL_DEBUG
+#define  TRACE_LEVEL_DEBUG                               2
+#endif
+
+#ifndef  SHELL_TRACE_LEVEL
+#define  SHELL_TRACE_LEVEL                 TRACE_LEVEL_OFF
+#endif
+
+#ifndef  SHELL_TRACE
+#define  SHELL_TRACE                                printf
+#endif
+
+#define  SHELL_TRACE_INFO(x)                  ((SHELL_TRACE_LEVEL >= TRACE_LEVEL_INFO)  ? (void)(SHELL_TRACE x) : (void)0)
+#define  SHELL_TRACE_DEBUG(x)                 ((SHELL_TRACE_LEVEL >= TRACE_LEVEL_DEBUG) ? (void)(SHELL_TRACE x) : (void)0)
+
+
+/*
+*********************************************************************************************************
+*                                         CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  SHELL_CFG_CMD_TBL_SIZE
+#error  "SHELL_CFG_CMD_TBL_SIZE                   not #define'd in 'shell_cfg.h'"
+
+#elif  ((SHELL_CFG_CMD_TBL_SIZE <                   1) || \
+        (SHELL_CFG_CMD_TBL_SIZE > DEF_INT_16U_MAX_VAL))
+#error  "SHELL_CFG_CMD_TBL_SIZE             illegally #define'd in 'shell_cfg.h'"
+#error  "                                   [MUST be >=     1]                "
+#error  "                                   [     && <= 65535]                "
+#endif
+
+#ifndef  SHELL_CFG_CMD_ARG_NBR_MAX
+#error  "SHELL_CFG_CMD_ARG_NBR_MAX                not #define'd in 'shell_cfg.h'"
+
+#elif  ((SHELL_CFG_CMD_ARG_NBR_MAX <                   1) || \
+        (SHELL_CFG_CMD_ARG_NBR_MAX > DEF_INT_16U_MAX_VAL))
+#error  "SHELL_CFG_CMD_ARG_NBR_MAX          illegally #define'd in 'shell_cfg.h'"
+#error  "                                   [MUST be >=     1]                "
+#error  "                                   [     && <= 65535]                "
+#endif
+
+#ifndef  SHELL_CFG_MODULE_CMD_NAME_LEN_MAX
+#error  "SHELL_CFG_MODULE_CMD_NAME_LEN_MAX        not #define'd in 'shell_cfg.h'"
+
+#elif  ((SHELL_CFG_MODULE_CMD_NAME_LEN_MAX <                   1) || \
+        (SHELL_CFG_MODULE_CMD_NAME_LEN_MAX > DEF_INT_16U_MAX_VAL))
+#error  "SHELL_CFG_MODULE_CMD_NAME_LEN_MAX  illegally #define'd in 'shell_cfg.h'"
+#error  "                                   [MUST be >=     1]                "
+#error  "                                   [     && <= 65535]                "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                              MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of SHELL module include.                         */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Cfg/Template/terminal_cfg.h b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Cfg/Template/terminal_cfg.h
new file mode 100644
index 0000000..6d35076
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Cfg/Template/terminal_cfg.h
@@ -0,0 +1,70 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                             (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               TERMINAL
+*
+*                                      CONFIGURATION TEMPLATE FILE
+*
+* Filename      : terminal_cfg.h
+* Version       : V1.03.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           TASKS PRIORITIES
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_OS_CFG_TASK_PRIO                        16u
+
+
+/*
+*********************************************************************************************************
+*                                              STACK SIZES
+*                             Size of the task stacks (# of OS_STK entries)
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_OS_CFG_TASK_STK_SIZE                  1024u
+
+
+/*
+*********************************************************************************************************
+*                                               TERMINAL
+*
+* Note(s) : (1) Defines the maximum length of a command entered on the terminal, in characters.
+*
+*           (2) Defines the maximum path length of the Current Working Directory (CWD).
+*
+*           (3) Enables/disables command history.
+*
+*           (4) Defines the number of items to hold in the command history.
+*
+*           (5) Defines the length of a item in the command history.  If a command is entered into the
+*               terminal that exceeds this length, then only the first characters, up to this number of
+*               characters, will be copied into the command history.
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_CFG_MAX_CMD_LEN                        260u   /* Cfg max cmd  len         (see Note #1).              */
+#define  TERMINAL_CFG_MAX_PATH_LEN                       260u   /* Cfg max path len         (see Note #2).              */
+
+#define  TERMINAL_CFG_HISTORY_EN                 DEF_ENABLED    /* En/dis history           (see Note #3).              */
+#define  TERMINAL_CFG_HISTORY_ITEMS_NBR                   16u   /* Cfg nbr history items    (see Note #4).              */
+#define  TERMINAL_CFG_HISTORY_ITEM_LEN                    64u   /* Cfg history item len     (see Note #5).              */
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Mode/VT100/terminal_mode.c b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Mode/VT100/terminal_mode.c
new file mode 100644
index 0000000..e6db797
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Mode/VT100/terminal_mode.c
@@ -0,0 +1,503 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                           (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                              TERMINAL
+*
+*                                           VT100 MODE PORT
+*
+* Filename      : terminal_mode.c
+* Version       : V1.03.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+* Note(s)       : (1) ECMA-48 'Control Functions for Coded Character Sets' (5th edition), standardizes
+*                     a set of terminal emulation commands.  The ISO/IEC and ANSI issued corresponding
+*                     standards, ISO/IEC 6429 and ANSI X3.64, respectively.  The DEC VT100 video terminal
+*                     implemented a command set which conformed to ANSI X3.64, so this type of terminal
+*                     emulation is often known as VT100.
+*
+*                 (2) To use this terminal mode, the terminal program employed (Hyperterminal, puTTY,
+*                     etc.) should be setup in VT100 mode and character echo should be disabled.
+*                     Depending on the command set used, it may be necessary to generate a CR ('\r') on
+*                     each LF ('\n').
+*
+*                 (3) Only the several ECMA-48 commands relevant to terminal operation are supported.
+*                     These are :
+*
+*                     (a) Cursor Up.
+*                     (b) Cursor Down.
+*                     (c) Cursor Left.
+*                     (d) Cursor Right.
+*
+*                     In addition, several editing keys are supported :
+*
+*                     (a) Insert.
+*                     (b) Delete.
+*                     (c) End.
+*                     (d) Home.
+*
+*                     ($$$$ Where is this functionality specified?)
+*
+*                 (4) Only 7-bit mode is supported.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_VT100_ESC_CHAR                        0x1Bu
+
+/*
+*********************************************************************************************************
+*                                           C0 COMMAND SET
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_VT100_C0_BS                           0x08u   /* Backspace.                                           */
+#define  TERMINAL_VT100_C0_LF                           0x0Au   /* Line feed.                                           */
+#define  TERMINAL_VT100_C0_CR                           0x0Du   /* Carriage return.                                     */
+
+#define  TERMINAL_VT100_C0_ESC                          0x1Bu   /* Escape.                                              */
+
+/*
+*********************************************************************************************************
+*                                           C1 COMMAND SET
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_VT100_C1_CSI                          0x5Bu   /* Control sequence  introducer.                        */
+
+/*
+*********************************************************************************************************
+*                                 CONTROL SEQUENCE BYTE VALUE LIMITS
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_VT100_PB_MIN                          0x30
+#define  TERMINAL_VT100_PB_MAX                          0x3F
+#define  TERMINAL_VT100_IB_MIN                          0x20
+#define  TERMINAL_VT100_IB_MAX                          0x2F
+#define  TERMINAL_VT100_FB_MIN                          0x40
+#define  TERMINAL_VT100_FB_MAX                          0x7E
+
+/*
+*********************************************************************************************************
+*                              NO PARAMETER CONTROL SEQUENCE FINAL BYTE
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_VT100_NP_CUU                          0x41u   /* Cursor up.                                           */
+#define  TERMINAL_VT100_NP_CUD                          0x42u   /* Cursor down.                                         */
+#define  TERMINAL_VT100_NP_CUF                          0x43u   /* Cursor right.                                        */
+#define  TERMINAL_VT100_NP_CUB                          0x44u   /* Cursor left.                                         */
+
+/*
+*********************************************************************************************************
+*                                    CONTROL & FUNCTION KEY VALUES
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_VT100_KEY_HOME                        0x31u
+#define  TERMINAL_VT100_KEY_INSERT                      0x32u
+#define  TERMINAL_VT100_KEY_DELETE                      0x33u
+#define  TERMINAL_VT100_KEY_END                         0x34u
+#define  TERMINAL_VT100_KEY_PAGEDOWN                    0x35u
+#define  TERMINAL_VT100_KEY_PAGEUP                      0x36u
+
+#define  TERMINAL_VT100_P1_KEY                          0x7Eu
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  Terminal_VT100_EscStrLeft[]  = {TERMINAL_VT100_ESC_CHAR,
+                                                    TERMINAL_VT100_C1_CSI,
+                                                    TERMINAL_VT100_NP_CUB};
+
+static  CPU_INT08U  Terminal_VT100_EscStrRight[] = {TERMINAL_VT100_ESC_CHAR,
+                                                    TERMINAL_VT100_C1_CSI,
+                                                    TERMINAL_VT100_NP_CUF};
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL MACRO'S
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_VT100_IS_PARAMETER_BYTE(b)        ((((b) >= TERMINAL_VT100_PB_MIN) && ((b) <= TERMINAL_VT100_PB_MAX)) ? DEF_YES : DEF_NO)
+
+#define  TERMINAL_VT100_IS_INTERMEDIATE_BYTE(b)     ((((b) >= TERMINAL_VT100_IB_MIN) && ((b) <= TERMINAL_VT100_IB_MAX)) ? DEF_YES : DEF_NO)
+
+#define  TERMINAL_VT100_IS_FINAL_BYTE(b)            ((((b) >= TERMINAL_VT100_FB_MIN) && ((b) <= TERMINAL_VT100_FB_MAX)) ? DEF_YES : DEF_NO)
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        TerminalMode_RdLine()
+*
+* Description : Read a line from the serial interface.
+*
+* Argument(s) : pstr            Pointer to a buffer at which the string can be stored.
+*
+*               len_max         Size of the string that will be read.
+*
+*               pcursor_pos     Pointer to variable that specifies    the current cursor position
+*                                   AND
+*                               Pointer to variable that will receive the final   cursor position.
+*
+*               ins             Indicates insertion mode :
+*
+*                                   DEF_YES,  insert on.
+*                                   DEF_NO, insert off.
+*
+* Return(s)   : Type of escape sequence encountered :
+*
+*                   TERMINAL_ESC_TYPE_NONE  No escape sequence.
+*                   TERMINAL_ESC_TYPE_UP    'Up'   arrow key sequence (move to previous history element).
+*                   TERMINAL_ESC_TYPE_DOWN  'Down' arrow key sequence (move to next history element).
+*                   TERMINAL_ESC_TYPE_INS   Insert mode toggled.
+*
+* Caller(s)   : Terminal_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  TerminalMode_RdLine (CPU_CHAR     *pstr,
+                                 CPU_SIZE_T    len_max,
+                                 CPU_SIZE_T   *pcursor_pos,
+                                 CPU_BOOLEAN   ins)
+{
+    CPU_CHAR    cmd[10];
+    CPU_CHAR    cmd_end;
+    CPU_SIZE_T  cmd_ix;
+    CPU_CHAR    cursor_char;
+    CPU_SIZE_T  cursor_pos;
+    CPU_CHAR    in_char;
+    CPU_INT08U  rtn_val;
+    CPU_SIZE_T  str_len;
+    CPU_SIZE_T  str_ix;
+
+
+    rtn_val    =  TERMINAL_ESC_TYPE_NONE;
+    cursor_pos = *pcursor_pos;
+
+    while (DEF_TRUE) {
+        in_char = TerminalSerial_RdByte();
+
+        switch (in_char) {
+            case TERMINAL_VT100_C0_CR:                          /* ------------------- NEW LINE CHAR ------------------ */
+            case TERMINAL_VT100_C0_LF:
+                 str_len       = Str_Len(pstr);
+                 pstr[str_len] = ASCII_CHAR_NULL;
+                *pcursor_pos   = str_len;
+                 rtn_val       = TERMINAL_ESC_TYPE_NONE;
+                 return (rtn_val);
+
+
+
+            case TERMINAL_VT100_C0_BS:                          /* ------------------ BACKSPACE CHAR ------------------ */
+                 if (cursor_pos > 0u) {
+                     if (ins == DEF_FALSE) {                    /* Clr prev char.                                       */
+                         Terminal_WrStr((CPU_CHAR *)"\b \b", 3u);
+                         if (pstr[cursor_pos] == ASCII_CHAR_NULL) {
+                             pstr[cursor_pos - 1u] = ASCII_CHAR_NULL;
+                         } else {
+                             pstr[cursor_pos - 1u] = ASCII_CHAR_SPACE;
+                         }
+                         cursor_pos--;
+                     } else {                                   /* Del prev char.                                       */
+                         str_len = Str_Len(pstr);
+                         Terminal_WrChar(TERMINAL_VT100_C0_BS);
+                         if (str_len > cursor_pos) {
+                             Terminal_WrStr(&pstr[cursor_pos], str_len - cursor_pos);
+                         }
+                         Terminal_WrChar(ASCII_CHAR_SPACE);
+                         for (str_ix = cursor_pos; str_ix <= str_len; str_ix++) {
+                             Terminal_WrChar(TERMINAL_VT100_C0_BS);
+                             pstr[str_ix - 1u] = pstr[str_ix];
+                         }
+                         cursor_pos--;
+                     }
+                 }
+                 break;
+
+
+
+            case TERMINAL_VT100_C0_ESC:                         /* -------------------- ESCAPE CHAR ------------------- */
+                 in_char = TerminalSerial_RdByte();             /* Rd esc'd char.                                       */
+                 if (in_char == TERMINAL_VT100_C1_CSI) {        /* Cmd seq intro.                                       */
+                     cmd_ix = 0u;
+                                                                /* Rd param byte's.                                     */
+                     in_char  = TerminalSerial_RdByte();
+                     while ((TERMINAL_VT100_IS_PARAMETER_BYTE(in_char) == DEF_YES) && (cmd_ix < sizeof(cmd))) {
+                         cmd[cmd_ix] = in_char;
+                         cmd_ix++;
+                         in_char     = TerminalSerial_RdByte();
+                     }
+                                                                /* Rd intermediate byte's.                              */
+                     while ((TERMINAL_VT100_IS_INTERMEDIATE_BYTE(in_char) == DEF_YES) && (cmd_ix < sizeof(cmd))) {
+                         cmd[cmd_ix] = in_char;
+                         cmd_ix++;
+                         in_char     = TerminalSerial_RdByte();
+                     }
+
+                     cmd_end = in_char;                         /* Cmd end byte.                                        */
+
+
+
+                     switch (cmd_end) {
+                         case TERMINAL_VT100_NP_CUU:            /* --------------------- CURSOR UP -------------------- */
+                             *pcursor_pos = cursor_pos;
+                              rtn_val     = TERMINAL_ESC_TYPE_UP;
+                              return (rtn_val);                 /* Terminal history will handle cmd.                    */
+
+
+
+                         case TERMINAL_VT100_NP_CUD:            /* -------------------- CURSOR DOWN ------------------- */
+                             *pcursor_pos = cursor_pos;
+                              rtn_val     = TERMINAL_ESC_TYPE_DOWN;
+                              return (rtn_val);                 /* Terminal history will handle cmd.                    */
+
+
+
+                         case TERMINAL_VT100_NP_CUF:            /* ------------------- CURSOR RIGHT ------------------- */
+                              if (cursor_pos < Str_Len(pstr)) { /* Move cursor right one pos.                           */
+                                  cursor_pos++;
+                                  Terminal_WrStr((CPU_CHAR *)Terminal_VT100_EscStrRight, 3u);
+                              }
+                              break;
+
+
+
+                         case TERMINAL_VT100_NP_CUB:            /* ------------------- CURSOR LEFT -------------------- */
+                              if (cursor_pos > 0u) {            /* Move cursor left one pos.                            */
+                                  cursor_pos--;
+                                  Terminal_WrStr((CPU_CHAR *)Terminal_VT100_EscStrLeft, 3u);
+                              }
+                              break;
+
+                         case TERMINAL_VT100_P1_KEY:
+                              if (cmd_ix == 1u) {
+                                  switch (cmd[0]) {
+                                      case TERMINAL_VT100_KEY_INSERT:   /* ------------------ INSERT ------------------ */
+                                          *pcursor_pos = cursor_pos;
+                                           rtn_val     = TERMINAL_ESC_TYPE_INS;
+                                           return (rtn_val);            /* Terminal will handle cmd.                    */
+
+
+
+                                      case TERMINAL_VT100_KEY_HOME:     /* ------------------- HOME ------------------- */
+                                           while (cursor_pos > 0u) {    /* Move cursor to first char on line.           */
+                                               Terminal_WrStr((CPU_CHAR *)Terminal_VT100_EscStrLeft, 3u);
+                                               cursor_pos--;
+                                           }
+                                           break;
+
+
+
+                                      case TERMINAL_VT100_KEY_DELETE:   /* ------------------ DELETE ------------------ */
+                                           str_len = Str_Len(pstr);     /* Delete char at cursor.                       */
+                                           if (str_len > cursor_pos) {
+                                               Terminal_WrStr(&pstr[cursor_pos + 1u], str_len - cursor_pos);
+                                               Terminal_WrStr((CPU_CHAR *)" \b", 2u);
+                                               for (str_ix = cursor_pos + 1; str_ix < str_len; str_ix++) {
+                                                  pstr[str_ix - 1u] = pstr[str_ix];
+                                                  Terminal_WrStr((CPU_CHAR *)Terminal_VT100_EscStrLeft, 3u);
+                                               }
+                                               pstr[str_len - 1u] = (CPU_CHAR)0;
+                                               if (str_len == cursor_pos) {
+                                                   cursor_pos--;
+                                               }
+                                           }
+                                           break;
+
+
+
+                                      case TERMINAL_VT100_KEY_END:      /* -------------------- END ------------------- */
+                                           str_len = Str_Len(pstr);     /* Move cursor to last char on line.            */
+                                           while (cursor_pos < str_len) {
+                                               Terminal_WrStr((CPU_CHAR *)Terminal_VT100_EscStrRight, 3u);
+                                               cursor_pos++;
+                                           }
+                                           break;
+
+                                      default:
+                                           break;
+                                  }
+                              }
+                              break;
+
+                         default:
+                              break;
+                     }
+                 }
+                 break;
+
+
+            default:                                            /* -------------------- OTHER CHAR -------------------- */
+                 if (ASCII_IsPrint(in_char) == DEF_YES){        /* Print printable char.                                */
+                                                                /* Ovwr char at cursor's pos.                           */
+                     if (cursor_pos < len_max) {
+                         if (ins == DEF_NO) {
+                             Terminal_WrChar(in_char);
+                             cursor_char      = pstr[cursor_pos];
+                             pstr[cursor_pos] = in_char;
+                             if (cursor_char == ASCII_CHAR_NULL) {  /* If char at cursor was NULL, wr new NULL.         */
+                                 pstr[cursor_pos + 1u] = ASCII_CHAR_NULL;
+                             }
+                             cursor_pos++;
+
+                         } else {                                   /* Ins char at cursor's pos.                        */
+                             str_len = Str_Len(pstr);               /* Shift str right.                                 */
+                             if (str_len == len_max) {              /* Handle buf ovf.                                  */
+                                 str_len =  len_max - 1u;
+                             }
+                             for (str_ix = str_len; str_ix > cursor_pos; str_ix--) {
+                                 pstr[str_ix] = pstr[str_ix - 1u];
+                             }
+                             pstr[cursor_pos]   = in_char;          /* Ins new char.                                    */
+                             pstr[str_len + 1u] = ASCII_CHAR_NULL;
+
+                             if (str_len > cursor_pos) {            /* Wr str to terminal.                              */
+                                 Terminal_WrStr(&pstr[cursor_pos], str_len - cursor_pos);
+                             }
+                                                                    /* Place cursor at old pos.                         */
+                             for (str_ix = cursor_pos; str_ix < str_len; str_ix++)  {
+                                 Terminal_WrChar(ASCII_CHAR_BACKSPACE);
+                             }
+                             cursor_pos++;
+                         }
+                     }
+                 }
+                 break;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         TerminalMode_Clr()
+*
+* Description : Clear the terminal line.
+*
+* Argument(s) : nbr_char    Number of characters on line.
+*
+*               cursor_pos  Current cursor position.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Terminal_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  TerminalMode_Clr (CPU_SIZE_T  nbr_char,
+                        CPU_SIZE_T  cursor_pos)
+{
+    CPU_SIZE_T  ix;
+
+
+    for (ix = cursor_pos; ix < nbr_char; ix++) {
+        Terminal_WrStr((CPU_CHAR *)" ", 1u);
+    }
+    for (ix = 0; ix < nbr_char; ix++) {
+        Terminal_WrStr((CPU_CHAR *)"\b \b", 3u);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TerminalMode_NewLine()
+*
+* Description : Move terminal to new line.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Terminal_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  TerminalMode_NewLine (void)
+{
+    Terminal_WrStr((CPU_CHAR *)"\r\n", 2u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        TerminalMode_Prompt()
+*
+* Description : Show prompt.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Terminal_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  TerminalMode_Prompt (void)
+{
+    Terminal_WrStr((CPU_CHAR *)"\r\n> ", 4u);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/OS/uCOS-II/terminal_os.c b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/OS/uCOS-II/terminal_os.c
new file mode 100644
index 0000000..749b3ba
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/OS/uCOS-II/terminal_os.c
@@ -0,0 +1,157 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                           (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                              TERMINAL
+*
+*                                         uC/OS-II RTOS PORT
+*
+* Filename      : terminal_os.c
+* Version       : V1.03.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  OS_STK  Terminal_OS_TaskStk[TERMINAL_OS_CFG_TASK_STK_SIZE];
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void  Terminal_OS_Task(void  *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                         Terminal_OS_Task()
+*
+* Description : RTOS interface for terminal main loop.
+*
+* Argument(s) : p_arg       Argument to pass to the task.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : RTOS.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  Terminal_OS_Task (void  *p_arg)
+{
+    Terminal_Task(p_arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Terminal_OS_Init()
+*
+* Description : Initialize the terminal task.
+*
+* Argument(s) : p_arg       Argument to pass to the task.
+*
+* Return(s)   : DEF_FAIL    Initialize task failed.
+*               DEF_OK      Initialize task successful.
+*
+* Caller(s)   : Terminal_Init()
+*
+* Note(s)     : The RTOS needs to create Terminal_OS_Task().
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Terminal_OS_Init (void *p_arg)
+{
+    CPU_INT08U  err;
+
+
+#if (OS_TASK_CREATE_EXT_EN > 0)
+    #if (OS_STK_GROWTH == 1)
+    err = OSTaskCreateExt( Terminal_OS_Task,
+                           p_arg,
+                                                                /* Set Top-Of-Stack.                                    */
+                          &Terminal_OS_TaskStk[TERMINAL_OS_CFG_TASK_STK_SIZE - 1],
+                           TERMINAL_OS_CFG_TASK_PRIO,
+                           TERMINAL_OS_CFG_TASK_PRIO,
+                          &Terminal_OS_TaskStk[0],              /* Set Bottom-Of-Stack.                                 */
+                           TERMINAL_OS_CFG_TASK_STK_SIZE,
+                          (void *)0,                            /* No TCB extension.                                    */
+                                                                /* Enable stack checking + clear stack.                 */
+                           OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);
+    #else
+    err = OSTaskCreateExt( Terminal_OS_Task,
+                           p_arg,
+                          &Terminal_OS_TaskStk[0],              /* Set Top-Of-Stack.                                    */
+                           TERMINAL_OS_CFG_TASK_PRIO,
+                           TERMINAL_OS_CFG_TASK_PRIO,
+                                                                /* Set Bottom-Of-Stack.                                 */
+                          &Terminal_OS_TaskStk[TERMINAL_OS_CFG_TASK_STK_SIZE - 1],
+                           TERMINAL_OS_CFG_TASK_STK_SIZE,
+                          (void *)0,                            /* No TCB extension.                                    */
+                                                                /* Enable stack checking + clear stack.                 */
+                           OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);
+    #endif
+#else
+    #if (OS_STK_GROWTH == 1)
+    err = OSTaskCreate( Terminal_OS_Task,
+                        p_arg,
+                       &Terminal_OS_TaskStk[TERMINAL_OS_CFG_TASK_STK_SIZE - 1],
+                        TERMINAL_OS_CFG_TASK_PRIO);
+    #else
+    err = OSTaskCreate( Terminal_OS_Task,
+                        p_arg,
+                       &Terminal_OS_TaskStk[0],
+                        TERMINAL_OS_CFG_TASK_PRIO);
+    #endif
+#endif
+
+    if (err != OS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+#if (OS_TASK_NAME_EN > 0)
+    OSTaskNameSet(TERMINAL_OS_CFG_TASK_PRIO, (INT8U *)"Terminal", &err);
+#endif
+
+    return (DEF_OK);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/OS/uCOS-III/terminal_os.c b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/OS/uCOS-III/terminal_os.c
new file mode 100644
index 0000000..f499ad2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/OS/uCOS-III/terminal_os.c
@@ -0,0 +1,128 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                           (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                              TERMINAL
+*
+*                                         uC/OS-II RTOS PORT
+*
+* Filename      : terminal_os.c
+* Version       : V1.03.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  CPU_STK  Terminal_OS_TaskStk[TERMINAL_OS_CFG_TASK_STK_SIZE];
+static  OS_TCB   Terminal_OS_TaskTCB;
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void  Terminal_OS_Task(void  *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                         Terminal_OS_Task()
+*
+* Description : RTOS interface for terminal main loop.
+*
+* Argument(s) : p_arg       Argument to pass to the task.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : RTOS.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  Terminal_OS_Task (void  *p_arg)
+{
+    Terminal_Task(p_arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         Terminal_OS_Init()
+*
+* Description : Initialize the terminal task.
+*
+* Argument(s) : p_arg       Argument to pass to the task.
+*
+* Return(s)   : DEF_FAIL    Initialize task failed.
+*               DEF_OK      Initialize task successful.
+*
+* Caller(s)   : Terminal_Init()
+*
+* Note(s)     : The RTOS needs to create Terminal_OS_Task().
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Terminal_OS_Init (void *p_arg)
+{
+    OS_ERR  os_err;
+
+
+    OSTaskCreate((OS_TCB     *)&Terminal_OS_TaskTCB,
+                 (CPU_CHAR   *)"Terminal",
+				 (OS_TASK_PTR )Terminal_OS_Task,
+				 (void       *)0,
+				 (OS_PRIO     )TERMINAL_OS_CFG_TASK_PRIO,
+				 (CPU_STK    *)&Terminal_OS_TaskStk[0], 
+				 (CPU_STK_SIZE)TERMINAL_OS_CFG_TASK_STK_SIZE / 10u,
+				 (CPU_STK_SIZE)TERMINAL_OS_CFG_TASK_STK_SIZE,
+                 (OS_MSG_QTY  )0,
+                 (OS_TICK     )0,
+                 (void       *)0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    if (os_err != OS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Serial/Template/terminal_serial.c b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Serial/Template/terminal_serial.c
new file mode 100644
index 0000000..6401e5a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Serial/Template/terminal_serial.c
@@ -0,0 +1,177 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                           (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                              TERMINAL
+*
+*                                    TEMPLATE COMMUNICATIONS PORT
+*
+* Filename      : terminal_serial.c
+* Version       : V1.03.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        TerminalSerial_Init()
+*
+* Description : Initialize serial communications.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK,   if interface was opened.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Terminal_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TerminalSerial_Init (void)
+{
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        TerminalSerial_Exit()
+*
+* Description : Uninitialize serial communications.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Terminal_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  TerminalSerial_Exit (void)
+{
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                         TerminalSerial_Wr()
+*
+* Description : Serial output.
+*
+* Argument(s) : pbuf        Pointer to the buffer to transmit.
+*
+*               buf_len     Number of bytes in the buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Terminal_Out().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  TerminalSerial_Wr (void        *pbuf,
+                               CPU_SIZE_T   buf_len)
+{
+    return (-1);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TerminalSerial_RdByte()
+*
+* Description : Serial byte input.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Byte read from port.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  TerminalSerial_RdByte (void)
+{
+    return (0u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TerminalSerial_WrByte()
+*
+* Description : Serial byte output.
+*
+* Argument(s) : c           Byte to write.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  TerminalSerial_WrByte (CPU_INT08U  c)
+{
+
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Source/terminal.c b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Source/terminal.c
new file mode 100644
index 0000000..e365c58
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Source/terminal.c
@@ -0,0 +1,785 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                           (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                              TERMINAL
+*
+* Filename      : terminal.c
+* Version       : V1.03.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    TERMINAL_MODULE
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+#define  TERMINAL_NEW_LINE              (CPU_CHAR *)"\r\n"
+#define  TERMINAL_BLANK_LINE            (CPU_CHAR *)"\r\n\r\n"
+#define  TERMINAL_STR_HELP              (CPU_CHAR *)"-h"
+
+/*
+*********************************************************************************************************
+*                                       ARGUMENT ERROR MESSAGES
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_ARG_ERR_FC            (CPU_CHAR *)"Term_fc: usage: Term_fc"
+
+/*
+*********************************************************************************************************
+*                                    COMMAND EXPLANATION MESSAGES
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_CMD_EXP_FC            (CPU_CHAR *)"                List terminal history items."
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+static  CPU_CHAR     Terminal_History[TERMINAL_CFG_HISTORY_ITEMS_NBR][TERMINAL_CFG_HISTORY_ITEM_LEN];
+static  CPU_INT16U   Terminal_HistoryIxFirst;
+static  CPU_INT16U   Terminal_HistoryIxLast;
+static  CPU_INT16U   Terminal_HistoryIxShown;
+static  CPU_BOOLEAN  Terminal_HistoryShown;
+static  CPU_BOOLEAN  Terminal_HistoryEmpty;
+static  CPU_INT16U   Terminal_HistoryCnt;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  Terminal_OutFnct       (CPU_CHAR         *pbuf,
+                                            CPU_INT16U        buf_len,
+                                            void             *popt);
+
+static  CPU_INT16S  Terminal_Help          (SHELL_OUT_FNCT    out_fnct,
+                                            SHELL_CMD_PARAM  *pcmd_param);
+
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+static  void        Terminal_HistoryInit   (void);
+
+static  void        Terminal_HistoryNextGet(CPU_CHAR         *pstr);
+
+static  void        Terminal_HistoryPrevGet(CPU_CHAR         *pstr);
+
+static  void        Terminal_HistoryPut    (CPU_CHAR         *pstr);
+
+static  CPU_INT16S  Terminal_fc            (CPU_INT16U        argc,
+                                            CPU_CHAR         *argv[],
+                                            SHELL_OUT_FNCT    out_fnct,
+                                            SHELL_CMD_PARAM  *pcmd_param);
+#endif
+
+/*
+*********************************************************************************************************
+*                                         SHELL COMMAND TABLE
+*********************************************************************************************************
+*/
+
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+static  SHELL_CMD  Terminal_CmdTbl [] = {
+    {"Term_fc", Terminal_fc},
+    {0,         0          }
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           Terminal_Init()
+*
+* Description : Initialize terminal.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK,   if terminal was initialized.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Terminal_Init (void)
+{
+    CPU_BOOLEAN  ok;
+
+
+                                                                /* ------------------- INIT SERIAL IF ----------------- */
+    ok = TerminalSerial_Init();
+    if (ok == DEF_OK) {
+
+
+
+                                                                /* ------------------ INIT OS SERVICES ---------------- */
+        ok = Terminal_OS_Init((void *)0);
+        if (ok != DEF_OK) {                                     /* If OS not init'd ...                                 */
+            TerminalSerial_Exit();                              /* ... exit serial if.                                  */
+        }
+    }
+
+    return (ok);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Terminal_Task()
+*
+* Description : Terminal task.
+*
+* Argument(s) : p_arg       Argument passed to the task (ignored).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Terminal OS port.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  Terminal_Task (void *p_arg)
+{
+    CPU_CHAR         cmd[TERMINAL_CFG_MAX_CMD_LEN + 1u];
+    CPU_SIZE_T       cmd_len;
+    SHELL_CMD_PARAM  cmd_param;
+    CPU_INT16S       cmp_val;
+    CPU_SIZE_T       cursor_pos;
+    CPU_CHAR         cwd_path[TERMINAL_CFG_MAX_PATH_LEN + 1u];
+    SHELL_ERR        err;
+    CPU_INT08U       esc_type;
+    CPU_BOOLEAN      ins;
+
+
+    (void)p_arg;
+
+                                                                /* --------------------- INIT VARS -------------------- */
+    Mem_Set((void     *)&cwd_path[0],                           /* Clr cur working dir path.                            */
+            (CPU_INT08U) 0x00u,
+            (CPU_SIZE_T) TERMINAL_CFG_MAX_PATH_LEN);
+
+    Str_Copy(cwd_path, (CPU_CHAR *)"\\");
+
+    Mem_Set((void     *)&cmd[0],                                /* Clr cur line.                                        */
+            (CPU_INT08U) 0x00u,
+            (CPU_SIZE_T) TERMINAL_CFG_MAX_CMD_LEN);
+
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+    Terminal_HistoryInit();
+    Shell_CmdTblAdd((CPU_CHAR *)"Term", Terminal_CmdTbl, &err);
+#endif
+
+    cursor_pos                 = 0u;
+    cmd_len                    = 0u;
+    ins                        = DEF_NO;
+
+    cmd_param.pcur_working_dir = (void *)cwd_path;
+    cmd_param.pout_opt         = (void *)0;
+
+    TerminalMode_Prompt();                                      /* Show first prompt.                                   */
+
+
+
+
+    while (DEF_TRUE) {
+                                                                /* -------------------- RD NEW LINE ------------------- */
+        esc_type = TerminalMode_RdLine(&cmd[0],
+                                        TERMINAL_CFG_MAX_CMD_LEN,
+                                       &cursor_pos,
+                                        ins);
+        cmd_len  = Str_Len(&cmd[0]);
+
+
+        switch (esc_type) {
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+            case TERMINAL_ESC_TYPE_UP:                          /* ------------- MOVE TO PREV HISTORY ITEM ------------ */
+                 TerminalMode_Clr(cmd_len, cursor_pos);         /* Clr terminal line.                                   */
+                 Terminal_HistoryPrevGet(cmd);                  /* Get prev history item.                               */
+                 cmd_len    = Str_Len(cmd);
+                 cursor_pos = cmd_len;                          /* Cursor at end of line.                               */
+                 Terminal_WrStr(cmd, cmd_len);                  /* Wr  prev history item to terminal.                   */
+                 break;
+
+
+
+            case TERMINAL_ESC_TYPE_DOWN:                        /* ------------- MOVE TO NEXT HISTORY ITEM ------------ */
+                 TerminalMode_Clr(cmd_len, cursor_pos);         /* Clr terminal line.                                   */
+                 Terminal_HistoryNextGet(cmd);                  /* Get next history item.                               */
+                 cmd_len    = Str_Len(cmd);
+                 cursor_pos = cmd_len;                          /* Cursor at end of line.                               */
+                 Terminal_WrStr(cmd, cmd_len);                  /* Wr  next history item to terminal.                   */
+                 break;
+#else
+
+
+
+
+            case TERMINAL_ESC_TYPE_UP:                          /* ---------------- UNSUPPORTED UP/DOWN --------------- */
+            case TERMINAL_ESC_TYPE_DOWN:
+                 TerminalMode_Clr(cmd_len, cursor_pos);         /* Clear line.                                          */
+                 Str_Copy(cmd, (CPU_CHAR *)"");
+                 break;
+#endif
+
+
+
+            case TERMINAL_ESC_TYPE_INS:                         /* ---------------- TOGGLE INSERT MODE ---------------- */
+                 if (ins == DEF_YES) {
+                     ins = DEF_NO;
+                 } else {
+                     ins = DEF_YES;
+                 }
+                 break;
+
+
+
+            case TERMINAL_ESC_TYPE_NONE:                        /* --------------------- EXEC CMD --------------------- */
+            default:
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+                 Terminal_HistoryPut(cmd);                      /* Put line into history.                               */
+#endif
+
+                 cmp_val = Str_Cmp(cmd, (CPU_CHAR *)"");
+                 if (cmp_val != 0) {
+                     TerminalMode_NewLine();                    /* Move to new line.                                    */
+
+                     cmp_val = Str_Cmp(cmd, (CPU_CHAR *)"?");
+                     if (cmp_val == 0) {
+                        (void)Terminal_Help( Terminal_OutFnct,  /* List all cmds ...                                    */
+                                            &cmd_param);
+
+
+                     } else {
+                        (void)Shell_Exec( cmd,                  /* ... OR exec cmd.                                     */
+                                          Terminal_OutFnct,
+                                         &cmd_param,
+                                         &err);
+
+                         switch (err) {
+                             case SHELL_ERR_CMD_NOT_FOUND:
+                             case SHELL_ERR_CMD_SEARCH:
+                             case SHELL_ERR_ARG_TBL_FULL:
+                                  Terminal_WrStr((CPU_CHAR *)"Command not found\r\n", 19);
+                                  break;
+
+                             case SHELL_ERR_NONE:
+                             case SHELL_ERR_NULL_PTR:
+                             case SHELL_ERR_CMD_EXEC:
+                             default:
+                                  break;
+                         }
+                     }
+                 }
+
+
+
+                                                                /* ------------------ DISP NEW PROMPT ----------------- */
+                 TerminalMode_Prompt();                         /* Show new prompt.                                     */
+                 Str_Copy(cmd, (CPU_CHAR *)"");                 /* Clear cmd.                                           */
+                 cursor_pos = 0u;                               /* Cursor pos'd at beginning of line.                   */
+                 break;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Terminal_WrStr()
+*
+* Description : Write string to terminal.
+*
+* Argument(s) : pbuf        Pointer to the buffer to transmit.
+*
+*               buf_len     Number of bytes in the buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  Terminal_WrStr (CPU_CHAR    *pbuf,
+                      CPU_SIZE_T   buf_len)
+{
+    TerminalSerial_Wr((void     *)pbuf,
+                      (CPU_SIZE_T)buf_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Terminal_WrChar()
+*
+* Description : Write character to terminal.
+*
+* Argument(s) : c           Character to transmit.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  Terminal_WrChar (CPU_CHAR  c)
+{
+    TerminalSerial_WrByte((CPU_INT08U)c);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          Terminal_OutFnct()
+*
+* Description : Out function used by Shell.
+*
+* Argument(s) : pbuf        Pointer to the buffer contianing data to send.
+*
+*               buf_len     Length of buffer.
+*
+*               popt        Pointer to options (unused).
+*
+* Return(s)   : Number of positive data octets transmitted.
+*
+* Caller(s)   : Shell, as a result of command execution in Terminal_Task().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  Terminal_OutFnct (CPU_CHAR    *pbuf,
+                                      CPU_INT16U   buf_len,
+                                      void        *popt)
+{
+    (void)popt;
+
+    TerminalSerial_Wr((void     *)pbuf,
+                      (CPU_SIZE_T)buf_len);
+
+    return ((CPU_INT16S)buf_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Terminal_Help()
+*
+* Description : List all commands.
+*
+* Argument(s) : out_fnct    The output function.
+*
+*               pcmd_param  Pointer to the command parameters.
+*
+* Return(s)   : SHELL_EXEC_ERR, if an error is encountered.
+*               SHELL_ERR_NONE, otherwise.
+*
+* Caller(s)   : Shell, in response to command execution.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  Terminal_Help (SHELL_OUT_FNCT    out_fnct,
+                                   SHELL_CMD_PARAM  *pcmd_param)
+{
+    SHELL_CMD         *pcmd;
+    SHELL_MODULE_CMD  *pmodule_cmd;
+
+
+    pmodule_cmd = Shell_ModuleCmdUsedPoolPtr;
+    while (pmodule_cmd != (SHELL_MODULE_CMD *)0) {
+        pcmd = pmodule_cmd->CmdTblPtr;
+        if (pcmd != (SHELL_CMD *)0) {
+            while (pcmd->Fnct != (SHELL_CMD_FNCT)0) {
+                (void)out_fnct((CPU_CHAR *)pcmd->Name,
+                               (CPU_INT16U)Str_Len(pcmd->Name),
+                                           pcmd_param->pout_opt);
+                (void)out_fnct(TERMINAL_NEW_LINE, 2,                               pcmd_param->pout_opt);
+                pcmd++;
+            }
+        }
+        pmodule_cmd = pmodule_cmd->NextModuleCmdPtr;
+    }
+
+    return (SHELL_ERR_NONE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       Terminal_HistoryInit()
+*
+* Description : Initialize terminal history.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Terminal_Task().
+*
+* Note(s)     : (1) The history is implemented as a circular buffer of strings.  Three indices and two
+*                   flags are used to track the state of the history buffer :
+*
+*                   (a) (1) If 'Terminal_HistoryShown' is DEF_YES, then the terminal displays a
+*                           (potentially modified) item from the history.  This is the case after the up
+*                           key is pressed once the history buffer is no longer empty, until a command
+*                           is executed.
+*
+*                       (2) If 'Terminal_HistoryShown' is DEF_NO, then the terminal displays a bare
+*                           terminal, or text that the user typed on a bare terminal.  This is the case
+*                           upon terminal startup or after execution of a command until the up key is
+*                           pressed.
+*
+*                   (b) If 'Terminal_HistoryEmpty' is DEF_YES, then the terminal history is empty.
+*                       This is used in two ways :
+*
+*                       (1) The 'up' key will not produce a change in the history state when the history
+*                           is empty.
+*
+*                       (2) The values of 'Terminal_HistoryIxFirst' and 'Terminal_HistoryIxLast' are
+*                           ignored when the first item is put into the buffer.  Only when the terminal
+*                           history is non-empty are these valid indices.
+*
+*                   (c) 'Terminal_HistoryIxFirst' is the index of the first item in the history.  The
+*                       index of the first item is ONLY changed once the user has logged more history
+*                       items than can be held in the history buffer, whereupon the index is incremented
+*                       to point to the next item in the buffer (since the old first item will have been
+*                       overwritten with the new last element).
+*
+*                   (d) 'Terminal_HistoryIxLast' is the index of the last item in the history.  The
+*                       index of the last item is ONLY changed when elements are added to the history
+*                       buffer, whereupon the index is incremented to point to the new last item in the
+*                       buffer.
+*
+*                   (e) 'Terminal_HistoryIxShown' is the index of the history item shown on the terminal
+*                       (if 'Terminal_HistoryShown' is DEF_YES).
+*********************************************************************************************************
+*/
+
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+static  void  Terminal_HistoryInit (void)
+{
+    CPU_INT16U  history_ix;
+
+
+                                                                /* Clr history lines.                                   */
+    for (history_ix = 0u; history_ix < TERMINAL_CFG_HISTORY_ITEMS_NBR; history_ix++) {
+        Str_Copy(Terminal_History[history_ix], (CPU_CHAR *)"");
+    }
+
+    Terminal_HistoryIxFirst = 0u;                               /* See Notes #1b2.                                      */
+    Terminal_HistoryIxLast  = 0u;                               /* See Notes #1b2.                                      */
+    Terminal_HistoryIxShown = 0u;
+    Terminal_HistoryEmpty   = DEF_YES;                          /* History empty (see Notes #1b).                       */
+    Terminal_HistoryShown   = DEF_NO;                           /* History item NOT shown (see Notes #1a).              */
+
+    Terminal_HistoryCnt     = 0u;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      Terminal_HistoryPrevGet()
+*
+* Description : Copy previous history line into buffer.
+*
+* Argument(s) : pstr        String buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Terminal_Task().
+*
+* Note(s)     : See 'Terminal_HistoryInit()  Note #1'.
+*********************************************************************************************************
+*/
+
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+static  void  Terminal_HistoryPrevGet (CPU_CHAR  *pstr)
+{
+    if (Terminal_HistoryShown == DEF_YES) {                     /* ---------- HISTORY ITEM DISP'D ON TERMINAL --------- */
+                                                                /* If first item NOT shown ... show prev item.          */
+        if (Terminal_HistoryIxShown != Terminal_HistoryIxFirst) {
+            if (Terminal_HistoryIxShown == 0u) {
+                Terminal_HistoryIxShown = TERMINAL_CFG_HISTORY_ITEMS_NBR - 1u;
+            } else {
+                Terminal_HistoryIxShown--;
+            }
+        }
+        Str_Copy(pstr, Terminal_History[Terminal_HistoryIxShown]);
+
+
+
+
+    } else {                                                    /* -------- HISTORY ITEM NOT DISP'D ON TERMINAL ------- */
+        if (Terminal_HistoryEmpty == DEF_NO) {                  /* If history buf NOT empty ... disp last item.         */
+            Terminal_HistoryShown   = DEF_YES;
+            Terminal_HistoryIxShown = Terminal_HistoryIxLast;
+            Str_Copy(pstr, Terminal_History[Terminal_HistoryIxShown]);
+        } else {                                                /* If history buf empty ... clr str buf.                */
+            Str_Copy(pstr, (CPU_CHAR *)"");
+        }
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      Terminal_HistoryNextGet()
+*
+* Description : Copy next history line into buffer.
+*
+* Argument(s) : pstr        String buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Terminal_Task().
+*
+* Note(s)     : See 'Terminal_HistoryInit()  Note #1'.
+*********************************************************************************************************
+*/
+
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+static  void  Terminal_HistoryNextGet (CPU_CHAR  *pstr)
+{
+    if (Terminal_HistoryShown == DEF_YES) {                     /* ---------- HISTORY ITEM DISP'D ON TERMINAL --------- */
+                                                                /* If last item is NOT being shown ... use next.        */
+        if (Terminal_HistoryIxShown != Terminal_HistoryIxLast) {
+            if (Terminal_HistoryIxShown == TERMINAL_CFG_HISTORY_ITEMS_NBR - 1u) {
+                Terminal_HistoryIxShown = 0u;
+            } else {
+                Terminal_HistoryIxShown++;
+            }
+        }
+        Str_Copy(pstr, Terminal_History[Terminal_HistoryIxShown]);
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        Terminal_HistoryPut()
+*
+* Description : Copy buffer into history.
+*
+* Argument(s) : pstr        String buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Terminal_Task().
+*
+* Note(s)     : See 'Terminal_HistoryInit()  Note #1'.
+*********************************************************************************************************
+*/
+
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+static  void  Terminal_HistoryPut (CPU_CHAR  *pstr)
+{
+    CPU_INT16U  cmp_val;
+
+
+    Terminal_HistoryShown   = DEF_NO;
+    Terminal_HistoryIxShown = 0u;
+
+    cmp_val = Str_Cmp(pstr, (CPU_CHAR *)"");
+    if (cmp_val != 0) {
+        Terminal_HistoryCnt++;
+
+        if (Terminal_HistoryEmpty == DEF_YES) {
+            Str_Copy_N(Terminal_History[0], pstr, TERMINAL_CFG_HISTORY_ITEM_LEN - 1u);
+            Terminal_History[0][TERMINAL_CFG_HISTORY_ITEM_LEN - 1u] = (CPU_CHAR)0;
+            Terminal_HistoryEmpty = DEF_NO;
+        } else {
+                                                                /* Update ix of last item in history.                   */
+            if (Terminal_HistoryIxLast == TERMINAL_CFG_HISTORY_ITEMS_NBR - 1) {
+                Terminal_HistoryIxLast =  0u;
+            } else {
+                Terminal_HistoryIxLast++;
+            }
+
+                                                                /* Copy line into history.                              */
+            Str_Copy_N(Terminal_History[Terminal_HistoryIxLast], pstr, TERMINAL_CFG_HISTORY_ITEM_LEN - 1u);
+            Terminal_History[Terminal_HistoryIxLast][TERMINAL_CFG_HISTORY_ITEM_LEN - 1u] = (CPU_CHAR)0;
+
+                                                                /* If last now first ... item overwr'n.                 */
+            if (Terminal_HistoryIxFirst == Terminal_HistoryIxLast) {
+                if (Terminal_HistoryIxFirst == TERMINAL_CFG_HISTORY_ITEMS_NBR - 1u) {
+                    Terminal_HistoryIxFirst =  0u;
+                } else {
+                    Terminal_HistoryIxFirst++;
+                }
+            }
+        }
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            Terminal_fc()
+*
+* Description : Process the command history list.
+*
+* Argument(s) : argc        The number of arguments.
+*
+*               argv        Array of arguments.
+*
+*               out_fnct    The output function.
+*
+*               pcmd_param  Pointer to the command parameters.
+*
+* Return(s)   : SHELL_EXEC_ERR, if an error is encountered.
+*               SHELL_ERR_NONE, otherwise.
+*
+* Caller(s)   : Shell, in response to command execution.
+*
+* Note(s)     : (1) (a) Usage(s)    : Term_fc
+*
+*                   (b) Argument(s) : none.
+*
+*                   (c) Output      : List of terminal history items.
+*********************************************************************************************************
+*/
+
+#if (TERMINAL_CFG_HISTORY_EN == DEF_ENABLED)
+static  CPU_INT16S  Terminal_fc (CPU_INT16U        argc,
+                                 CPU_CHAR         *argv[],
+                                 SHELL_OUT_FNCT    out_fnct,
+                                 SHELL_CMD_PARAM  *pcmd_param)
+{
+    CPU_INT16U  history_cnt;
+    CPU_INT16U  history_qty;
+    CPU_INT16U  history_item_len;
+    CPU_INT16U  history_ix;
+    CPU_INT16U  i;
+    CPU_CHAR    nbr_str[8];
+
+
+                                                                /* ---------------- RESPOND TO HELP CMD --------------- */
+    if (argc == 2u) {
+        if (Str_Cmp(argv[1], TERMINAL_STR_HELP) == 0) {
+            (void)out_fnct(TERMINAL_ARG_ERR_FC, (CPU_INT16U)Str_Len(TERMINAL_ARG_ERR_FC), pcmd_param->pout_opt);
+            (void)out_fnct(TERMINAL_NEW_LINE,   2u,                                       pcmd_param->pout_opt);
+            (void)out_fnct(TERMINAL_CMD_EXP_FC, (CPU_INT16U)Str_Len(TERMINAL_CMD_EXP_FC), pcmd_param->pout_opt);
+            (void)out_fnct(TERMINAL_NEW_LINE,   2u,                                       pcmd_param->pout_opt);
+            return (SHELL_ERR_NONE);
+        }
+    }
+
+
+
+                                                                /* ----------------- HANDLE ARG QTY ERR --------------- */
+    if (argc != 1u) {
+        (void)out_fnct(TERMINAL_ARG_ERR_FC, (CPU_INT16U)Str_Len(TERMINAL_ARG_ERR_FC), pcmd_param->pout_opt);
+        (void)out_fnct(TERMINAL_NEW_LINE,   2u,                                       pcmd_param->pout_opt);
+        return (SHELL_EXEC_ERR);
+    }
+
+
+
+                                                                /* --------------- LIST TERMINAL HISTORY -------------- */
+    if (Terminal_HistoryEmpty == DEF_YES) {                     /* If history empty ... rtn.                            */
+        return (SHELL_ERR_NONE);
+    }
+
+                                                                /* Calc nbr of items in history.                        */
+    if (Terminal_HistoryIxLast >= Terminal_HistoryIxFirst) {
+        history_qty = Terminal_HistoryIxLast - Terminal_HistoryIxFirst + 1u;
+    } else {
+        history_qty = TERMINAL_CFG_HISTORY_ITEMS_NBR;
+    }
+
+    history_cnt = Terminal_HistoryCnt - history_qty;
+    history_ix  = Terminal_HistoryIxFirst;
+    for (i = 0u; i < history_qty; i++) {                        /* List each history item & item cnt.                   */
+        (void)Str_FmtNbr_Int32U(history_cnt,
+                                7u,
+                                DEF_NBR_BASE_DEC,
+                                ASCII_CHAR_SPACE,
+                                DEF_NO,
+                                DEF_YES,
+                                nbr_str);
+
+        history_item_len = (CPU_INT16U)Str_Len(Terminal_History[history_ix]);
+        (void)out_fnct(nbr_str,                      7u,               pcmd_param->pout_opt);
+        (void)out_fnct((CPU_CHAR *)"     ",          5u,               pcmd_param->pout_opt);
+        (void)out_fnct(Terminal_History[history_ix], history_item_len, pcmd_param->pout_opt);
+        (void)out_fnct(TERMINAL_NEW_LINE,            2u,               pcmd_param->pout_opt);
+
+        history_cnt++;
+        history_ix++;
+        if (history_ix == TERMINAL_CFG_HISTORY_ITEMS_NBR) {
+            history_ix =  0u;
+        }
+    }
+
+    return (SHELL_ERR_NONE);
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Source/terminal.h b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Source/terminal.h
new file mode 100644
index 0000000..f6ca654
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/Terminal/Source/terminal.h
@@ -0,0 +1,301 @@
+/*
+*********************************************************************************************************
+*                                               uC/Shell
+*                                            Shell utility
+*
+*                           (c) Copyright 2007-2013; Micrium, Inc.; Weston, FL
+*
+*                   All rights reserved.  Protected by international copyright laws.
+*                   Knowledge of the source code may not be used to write a similar
+*                   product.  This file may only be used in accordance with a license
+*                   and should not be redistributed in any way.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                              TERMINAL
+*
+* Filename      : terminal.h
+* Version       : V1.03.01
+* Programmer(s) : BAN
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This header file is protected from multiple pre-processor inclusion through use of the
+*               TERMINAL present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  TERMINAL_PRESENT                                       /* See Note #1.                                         */
+#define  TERMINAL_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                       TERMINAL VERSION NUMBER
+*
+* Note(s) : (1) (a) The Terminal software version is denoted as follows :
+*
+*                       Vx.yy
+*
+*                           where
+*                                  V     denotes 'Version' label
+*                                  x     denotes major software version revision number
+*                                  yy    denotes minor software version revision number
+*
+*               (b) The Terminal software version label #define is formatted as follows :
+*
+*                       ver = x.yy * 100
+*
+*                           where
+*                                  ver   denotes software version number scaled as
+*                                        an integer value
+*                                  x.yy  denotes software version number
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_VERSION          100u                         /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   TERMINAL_MODULE
+#define  TERMINAL_EXT
+#else
+#define  TERMINAL_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  TERMINAL_ESC_TYPE_NONE                            0u
+#define  TERMINAL_ESC_TYPE_UP                              1u
+#define  TERMINAL_ESC_TYPE_DOWN                            2u
+#define  TERMINAL_ESC_TYPE_INS                             3u
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Terminal_Init        (void);
+
+void         Terminal_Task        (void         *p_arg);
+
+void         Terminal_WrStr       (CPU_CHAR     *pbuf,
+                                   CPU_SIZE_T    buf_len);
+
+void         Terminal_WrChar      (CPU_CHAR      c);
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                   DEFINED in OS's 'terminal_os.c'
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  Terminal_OS_Init     (void         *p_arg);
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                               DEFINED in SERIAL's 'terminal_serial.c'
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TerminalSerial_Init  (void);
+
+void         TerminalSerial_Exit  (void);
+
+CPU_INT08U   TerminalSerial_RdByte(void);
+
+CPU_INT16S   TerminalSerial_Wr    (void         *pbuf,
+                                   CPU_SIZE_T    buf_len);
+
+void         TerminalSerial_WrByte(CPU_INT08U    c);
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                 DEFINED in MODE's 'terminal_mode.c'
+*********************************************************************************************************
+*/
+
+CPU_INT08U   TerminalMode_RdLine  (CPU_CHAR     *pstr,
+                                   CPU_SIZE_T    len_max,
+                                   CPU_SIZE_T   *pcursor_pos,
+                                   CPU_BOOLEAN   ins);
+
+void         TerminalMode_Clr     (CPU_SIZE_T    nbr_char,
+                                   CPU_SIZE_T    cursor_pos);
+
+void         TerminalMode_NewLine (void);
+
+void         TerminalMode_Prompt  (void);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* Task priority.                                       */
+#ifndef  TERMINAL_OS_CFG_TASK_PRIO
+#error  "TERMINAL_OS_CFG_TASK_PRIO                    not #define'd in 'terminal_cfg.h'"
+#endif
+
+
+
+                                                                /* Task stack size.                                     */
+#ifndef  TERMINAL_OS_CFG_TASK_STK_SIZE
+#error  "TERMINAL_OS_CFG_TASK_STK_SIZE                not #define'd in 'terminal_cfg.h'"
+#endif
+
+
+
+                                                                /* Maximum working directory path length.               */
+#ifndef  TERMINAL_CFG_MAX_PATH_LEN
+#error  "TERMINAL_CFG_MAX_PATH_LEN                    not #define'd in 'terminal_cfg.h'"
+#error  "                                       [MUST be >=     1]                "
+#error  "                                       [     && <= 65535]                "
+
+#elif  ((TERMINAL_CFG_MAX_PATH_LEN           <                   1) || \
+        (TERMINAL_CFG_MAX_PATH_LEN           > DEF_INT_16U_MAX_VAL))
+#error  "TERMINAL_CFG_MAX_PATH_LEN              illegally #define'd in 'terminal_cfg.h'"
+#error  "                                       [MUST be >=     1]                "
+#error  "                                       [     && <= 65535]                "
+#endif
+
+
+
+                                                                /* Maximum input line length length.                    */
+#ifndef  TERMINAL_CFG_MAX_CMD_LEN
+#error  "TERMINAL_CFG_MAX_CMD_LEN                     not #define'd in 'terminal_cfg.h'"
+#error  "                                       [MUST be >=     1]                "
+#error  "                                       [     && <= 65535]                "
+
+
+#elif  ((TERMINAL_CFG_MAX_CMD_LEN            <                   1) || \
+        (TERMINAL_CFG_MAX_CMD_LEN            > DEF_INT_16U_MAX_VAL))
+#error  "TERMINAL_CFG_MAX_CMD_LEN               illegally #define'd in 'terminal_cfg.h'"
+#error  "                                       [MUST be >=     1]                "
+#error  "                                       [     && <= 65535]                "
+#endif
+
+
+
+
+                                                                /* History enable.                                      */
+#ifndef  TERMINAL_CFG_HISTORY_EN
+#error  "TERMINAL_CFG_HISTORY_EN                      not #define'd in 'terminal_cfg.h'"
+#error  "                                       [MUST be    DEF_ENABLED ]         "
+#error  "                                       [     && || DEF_DISABLED]         "
+
+
+
+#elif  ((TERMINAL_CFG_HISTORY_EN             != DEF_ENABLED) && \
+        (TERMINAL_CFG_HISTORY_EN             != DEF_DISABLED))
+#error  "TERMINAL_CFG_HISTORY_EN                illegally #define'd in 'terminal_cfg.h'"
+#error  "                                       [MUST be    DEF_ENABLED ]         "
+#error  "                                       [     && || DEF_DISABLED]         "
+
+
+
+#elif   (TERMINAL_CFG_HISTORY_EN             == DEF_ENABLED)
+                                                                /* Number of items to keep in history.                  */
+#ifndef  TERMINAL_CFG_HISTORY_ITEMS_NBR
+#error  "TERMINAL_CFG_HISTORY_ITEMS_NBR               not #define'd in 'terminal_cfg.h'"
+#error  "                                       [MUST be >=     4]                "
+#error  "                                       [     && <= 65535]                "
+
+#elif  ((TERMINAL_CFG_HISTORY_ITEMS_NBR      <                   4) || \
+        (TERMINAL_CFG_HISTORY_ITEMS_NBR      > DEF_INT_16U_MAX_VAL))
+#error  "TERMINAL_CFG_HISTORY_ITEMS_NBR         illegally #define'd in 'terminal_cfg.h'"
+#error  "                                       [MUST be >=     4]                "
+#error  "                                       [     && <= 65535]                "
+#endif
+
+
+
+                                                                /* Maximum length of items in history.                  */
+#ifndef  TERMINAL_CFG_HISTORY_ITEM_LEN
+#error  "TERMINAL_CFG_HISTORY_ITEM_LEN                not #define'd in 'terminal_cfg.h'"
+#error  "                    [MUST be >=                        1]                "
+#error  "                    [     && <= TERMINAL_CFG_MAX_CMD_LEN]                "
+
+#elif  ((TERMINAL_CFG_HISTORY_ITEM_LEN <                        1) || \
+        (TERMINAL_CFG_HISTORY_ITEM_LEN > TERMINAL_CFG_MAX_CMD_LEN))
+#error  "TERMINAL_CFG_HISTORY_ITEM_LEN          illegally #define'd in 'terminal_cfg.h'"
+#error  "                    [MUST be >=                        1]                "
+#error  "                    [     && <= TERMINAL_CFG_MAX_CMD_LEN]                "
+#endif
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                              MODULE END
+*
+* Note(s) : See 'MODULE  Note #1'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of TERMINAL module include (see Note #1).        */
diff --git a/src/ucos_v1_42/micrium_source/uC-Shell/subdir.mk b/src/ucos_v1_42/micrium_source/uC-Shell/subdir.mk
new file mode 100644
index 0000000..07a035e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-Shell/subdir.mk
@@ -0,0 +1,6 @@
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Shell/Terminal/Source/terminal.c
+#SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Shell/Terminal/Serial/Template/terminal_serial.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Shell/Terminal/OS/uCOS-II/terminal_os.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Shell/Terminal/Mode/VT100/terminal_mode.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Shell/Source/shell.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-Shell/Cmd/General/sh_shell.c
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_ether.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_ether.c
new file mode 100644
index 0000000..5c63fee
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_ether.c
@@ -0,0 +1,444 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*
+*                                              TEMPLATE
+*
+* Filename      : net_bsp_ether.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) To provide the required Board Support Package functionality, insert the appropriate
+*                     board-specific code to perform the stated actions wherever 'TODO' comments are found.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    NET_BSP_MODULE
+#include  
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  NETWORK DEVICE INTERFACE NUMBERS
+*
+* Note(s) : (1) (a) Each network device maps to a unique network interface number.
+*
+*               (b) Instances of network devices' interface number SHOULD be named using the following
+*                   convention :
+*
+*                       [Number]_IF_Nbr
+*
+*                           where
+*                                            Development board name
+*                                           Network device name (or type)
+*                                   [Number]        Network device number for each specific instance
+*                                                       of device (optional if the development board
+*                                                       does NOT support multiple instances of the
+*                                                       specific device)
+*
+*                   For example, the network device interface number variable for the #2 MACB Ethernet
+*                   controller on an Atmel AT91SAM92xx should be named 'AT91SAM92xx_MACB_2_IF_Nbr'.
+*
+*               (c) Network device interface number variables SHOULD be initialized to 'NET_IF_NBR_NONE'.
+*********************************************************************************************************
+*/
+
+static  NET_IF_NBR  BoardDevNbr_IF_Nbr = NET_IF_NBR_NONE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               NETWORK DEVICE BSP FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Device driver BSP functions may be arbitrarily named.  However, it is recommended that
+*               device BSP functions be named using the suggested names/conventions provided below.
+*
+*               (a) (1) Network device BSP functions SHOULD be named using the following convention :
+*
+*                           NetDev_[Device][Number]()
+*
+*                               where
+*                                   (A) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (B)       Network device BSP function
+*                                   (C) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*                       For example, the NetDev_CfgClk() function for the #2 MACB Ethernet controller
+*                       on an Atmel AT91SAM92xx should be named NetDev_MACB_CfgClk2().
+*
+*                   (2) BSP-level device ISR handlers SHOULD be named using the following convention :
+*
+*                           NetDev_[Device]ISR_Handler[Type][Number]()
+*
+*                               where
+*                                   (A) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (B) [Type]          Network device interrupt type (optional if
+*                                                           interrupt type is generic or unknown)
+*                                   (C) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*               (b) All BSP function prototypes SHOULD be located within the development board's network
+*                   BSP C source file ('net_bsp.c') & be declared as static functions to prevent name
+*                   clashes with other network protocol suite BSP functions/files.
+*********************************************************************************************************
+*/
+
+                                                                /* -- IF #1 : GENERIC ETHER BSP FUNCTION PROTOTYPES -- */
+static  void        NetDev_CfgClk             (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_CfgIntCtrl         (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_CfgGPIO            (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  CPU_INT32U  NetDev_ClkFreqGet         (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+       void        NetDev_ISR_Handler        (void);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NETWORK DEVICE BSP INTERFACE
+*
+* Note(s) : (1) Device board-support package (BSP) interface structures are used by the device driver to
+*               call specific devices' BSP functions via function pointer instead of by name.  This enables
+*               the network protocol suite to compile & operate with multiple instances of multiple devices
+*               & drivers.
+*
+*           (2) In most cases, the BSP interface structure provided below SHOULD suffice for most devices'
+*               BSP functions exactly as is with the exception that BSP interface structures' names MUST be
+*               unique & SHOULD clearly identify the development board, device name, & possibly the specific
+*               device number (if the development board supports multiple instances of any given device).
+*
+*               (a) BSP interface structures SHOULD be named using the following convention :
+*
+*                       NetDev_BSP_[Number]{}
+*
+*                           where
+*                               (1)          Development board name
+*                               (2)         Network device name (or type)
+*                               (3) [Number]        Network device number for each specific instance
+*                                                       of device (optional if the development board
+*                                                       does NOT support multiple instances of the
+*                                                       specific device)
+*
+*                   For example, the BSP interface structure for the #2 MACB Ethernet controller on
+*                   an Atmel AT91SAM92xx should be named NetDev_BSP_AT91SAM92xx_MACB_2{}.
+*
+*               (b) The BSP interface structure MUST also be externally declared in the development
+*                   board's network BSP header file ('net_bsp.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+
+const  NET_DEV_BSP_ETHER     NetDev_BSP_BoardDev_Nbr = {                        /* Board-/device-specific BSP fnct ptrs : */
+                                                         &NetDev_CfgClk,        /*   Cfg clk(s)                           */
+                                                         &NetDev_CfgIntCtrl,    /*   Cfg int ctrl(s)                      */
+                                                         &NetDev_CfgGPIO,       /*   Cfg GPIO                             */
+                                                         &NetDev_ClkFreqGet     /*   Get clk freq                         */
+                                                       };
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              NETWORK ETHERNET DEVICE DRIVER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           NetDev_CfgClk()
+*
+* Description : Configure clocks for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device clock(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device clock(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgClk (NET_IF   *p_if,
+                             NET_ERR  *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+    /* TODO Insert code to configure each network interface's/device's clocks.  */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_CfgIntCtrl()
+*
+* Description : Configure interrupts &/or interrupt controller for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device interrupt(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device interrupt(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgIntCtrl (NET_IF   *p_if,
+                                 NET_ERR  *p_err)
+{
+    BoardDevNbr_IF_Nbr = p_if->Nbr;             /* Configure this device's BSP instance with specific interface number. */
+
+    /* TODO Insert code to configure each network interface's/device's interrupt(s)/controller. */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_CfgGPIO()
+*
+* Description : Configure general-purpose I/O (GPIO) for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device GPIO     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device GPIO NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgGPIO (NET_IF   *p_if,
+                              NET_ERR  *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+    /* TODO Insert code to configure each network interface's/device's GPIO.  */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_ClkFreqGet()
+*
+* Description : Get device clock frequency.
+*
+* Argument(s) : p_if         Pointer to network interface to get clock frequency.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device clock frequency     successfully
+*                                                                   returned.
+*                               NET_DEV_ERR_FAULT               Device clock frequency NOT successfully
+*                                                                   returned.
+*
+* Return(s)   : Device clock frequency (in Hz).
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetDev_ClkFreqGet (NET_IF   *p_if,
+                                       NET_ERR  *p_err)
+{
+    CPU_INT32U  clk_freq;
+
+
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+    clk_freq = /* TODO Insert code to return each network interface's/device's clock frequency. */
+   *p_err     = NET_DEV_ERR_NONE;
+
+    return (clk_freq);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetDev_ISR_Handler()
+*
+* Description : BSP-level ISR handler(s) for device interrupts.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU &/or device interrupts.
+*
+* Note(s)     : (1) (a) Each device interrupt, or set of device interrupts, MUST be handled by a
+*                       unique BSP-level ISR handler which maps each specific device interrupt to
+*                       its corresponding network interface ISR handler.
+*
+*                   (b) BSP-level device ISR handlers SHOULD be named using the following convention :
+*
+*                           NetDev_[Device]ISR_Handler[Type][Number]()
+*
+*                               where
+*                                   (1) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (2) [Type]          Network device interrupt type (optional if
+*                                                           interrupt type is generic or unknown)
+*                                   (3) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*                       See also 'NETWORK DEVICE BSP FUNCTION PROTOTYPES  Note #2a2'.
+*********************************************************************************************************
+*/
+
+void  NetDev_ISR_Handler (void)
+{
+    NET_ERR           err;
+
+
+    /* TODO Insert code to handle each network interface's/device's interrupt(s) [see Note #1a] :   */
+
+    NetIF_ISR_Handler(BoardDevNbr_IF_Nbr, NET_DEV_ISR_TYPE_UNKNOWN, &err);
+
+   (void)&err;
+
+    /* TODO Insert code to clear  each network interface's/device's interrupt(s), if necessary.     */
+}
+
+#endif  /* NET_IF_ETHER_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_ether.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_ether.h
new file mode 100644
index 0000000..b75485a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_ether.h
@@ -0,0 +1,69 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*
+*                                              TEMPLATE
+*
+* Filename      : net_bsp_ether.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) To provide the required Board Support Package functionality, insert the appropriate
+*                     board-specific code to perform the stated actions wherever 'TODO' comments are found.
+*
+*                     #### This note MAY be entirely removed for specific board support packages.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                           NETWORK BOARD SUPPORT PACKAGE (BSP) ERROR CODES
+*
+* Note(s) : (1) ALL BSP-independent error codes #define'd in      'net_err.h';
+*               ALL BSP-specific    error codes #define'd in this 'net_bsp.h'.
+*
+*           (2) Network error code '10,000' series reserved for network BSP errors.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_BSP_ETHER     NetDev_BSP_BoardDev_Nbr;
+
+
+#endif  /* NET_IF_ETHER_MODULE_EN */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_wifi.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_wifi.c
new file mode 100644
index 0000000..6d971ce
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_wifi.c
@@ -0,0 +1,745 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*
+*                                              TEMPLATE
+*
+* Filename      : net_bsp_wifi.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) To provide the required Board Support Package functionality, insert the appropriate
+*                     board-specific code to perform the stated actions wherever 'TODO' comments are found.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    NET_BSP_MODULE
+#include  
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+
+/*
+*********************************************************************************************************
+*                                  NETWORK DEVICE INTERFACE NUMBERS
+*
+* Note(s) : (1) (a) Each network device maps to a unique network interface number.
+*
+*               (b) Instances of network devices' interface number SHOULD be named using the following
+*                   convention :
+*
+*                       [Number]_IF_Nbr
+*
+*                           where
+*                                            Development board name
+*                                           Network device name (or type)
+*                                   [Number]        Network device number for each specific instance
+*                                                       of device (optional if the development board
+*                                                       does NOT support multiple instances of the
+*                                                       specific device)
+*
+*                   For example, the network device interface number variable for the #2 MACB Ethernet
+*                   controller on an Atmel AT91SAM92xx should be named 'AT91SAM92xx_MACB_2_IF_Nbr'.
+*
+*               (c) Network device interface number variables SHOULD be initialized to 'NET_IF_NBR_NONE'.
+*********************************************************************************************************
+*/
+
+static  NET_IF_NBR  WiFi_SPI_IF_Nbr = NET_IF_NBR_NONE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               NETWORK DEVICE BSP FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Device driver BSP functions may be arbitrarily named.  However, it is recommended that
+*               device BSP functions be named using the suggested names/conventions provided below.
+*
+*               (a) (1) Network device BSP functions SHOULD be named using the following convention :
+*
+*                           NetDev_[Device][Number]()
+*
+*                               where
+*                                   (A) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (B)       Network device BSP function
+*                                   (C) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*                       For example, the NetDev_CfgClk() function for the #2 MACB Ethernet controller
+*                       on an Atmel AT91SAM92xx should be named NetDev_MACB_CfgClk2().
+*
+*                   (2) BSP-level device ISR handlers SHOULD be named using the following convention :
+*
+*                           NetDev_[Device]ISR_Handler[Type][Number]()
+*
+*                               where
+*                                   (A) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (B) [Type]          Network device interrupt type (optional if
+*                                                           interrupt type is generic or unknown)
+*                                   (C) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*               (b) All BSP function prototypes SHOULD be located within the development board's network
+*                   BSP C source file ('net_bsp.c') & be declared as static functions to prevent name
+*                   clashes with other network protocol suite BSP functions/files.
+*********************************************************************************************************
+*/
+
+                                                                /* ----------- WIFI BSP FUNCTION PROTOTYPES ----------- */
+static  void        NetDev_WiFi_Start         (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_WiFi_Stop          (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_WiFi_CfgGPIO       (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_WiFi_CfgIntCtrl    (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_WiFi_IntCtrl       (NET_IF                          *p_if,
+                                               CPU_BOOLEAN                      en,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_WiFi_SPI_Init      (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_WiFi_SPI_Lock      (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_WiFi_SPI_Unlock    (NET_IF                          *p_if);
+
+static  void        NetDev_WiFi_SPI_WrRd      (NET_IF                          *p_if,
+                                               CPU_INT08U                      *p_buf_wr,
+                                               CPU_INT08U                      *p_buf_rd,
+                                               CPU_INT16U                       len,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_WiFi_SPI_ChipSelEn (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_WiFi_SPI_ChipSelDis(NET_IF                          *p_if);
+
+static  void        NetDev_WiFi_SPI_Cfg       (NET_IF                          *p_if,
+                                               NET_DEV_CFG_SPI_CLK_FREQ         freq,
+                                               NET_DEV_CFG_SPI_CLK_POL          pol,
+                                               NET_DEV_CFG_SPI_CLK_PHASE        phase,
+                                               NET_DEV_CFG_SPI_XFER_UNIT_LEN    xfer_unit_len,
+                                               NET_DEV_CFG_SPI_XFER_SHIFT_DIR   xfer_shift_dir,
+                                               NET_ERR                         *p_err);
+
+        void        NetDev_WiFi_ISR_Handler   (void);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NETWORK DEVICE BSP INTERFACE
+*
+* Note(s) : (1) Device board-support package (BSP) interface structures are used by the device driver to
+*               call specific devices' BSP functions via function pointer instead of by name.  This enables
+*               the network protocol suite to compile & operate with multiple instances of multiple devices
+*               & drivers.
+*
+*           (2) In most cases, the BSP interface structure provided below SHOULD suffice for most devices'
+*               BSP functions exactly as is with the exception that BSP interface structures' names MUST be
+*               unique & SHOULD clearly identify the development board, device name, & possibly the specific
+*               device number (if the development board supports multiple instances of any given device).
+*
+*               (a) BSP interface structures SHOULD be named using the following convention :
+*
+*                       NetDev_BSP_[Number]{}
+*
+*                           where
+*                               (1)          Development board name
+*                               (2)         Network device name (or type)
+*                               (3) [Number]        Network device number for each specific instance
+*                                                       of device (optional if the development board
+*                                                       does NOT support multiple instances of the
+*                                                       specific device)
+*
+*                   For example, the BSP interface structure for the #2 MACB Ethernet controller on
+*                   an Atmel AT91SAM92xx should be named NetDev_BSP_AT91SAM92xx_MACB_2{}.
+*
+*               (b) The BSP interface structure MUST also be externally declared in the development
+*                   board's network BSP header file ('net_bsp.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+
+const  NET_DEV_BSP_WIFI_SPI  NetDev_BSP_WiFi       = {                                  /* WIRELESS #3's  SPI BSP fnct ptrs :     */
+                                                        &NetDev_WiFi_Start,             /* Start Device (Power up).               */
+                                                        &NetDev_WiFi_Stop,              /* Stop  Device (Power down).             */
+                                                        &NetDev_WiFi_CfgGPIO,           /* Cfg   GPIO.                            */
+                                                        &NetDev_WiFi_CfgIntCtrl,        /* Cfg   external int.                    */
+                                                        &NetDev_WiFi_IntCtrl,           /* Ctrl  external int.                    */
+                                                        &NetDev_WiFi_SPI_Init,          /* Init         SPI.                      */
+                                                        &NetDev_WiFi_SPI_Lock,          /* Acquire      SPI lock.                 */
+                                                        &NetDev_WiFi_SPI_Unlock,        /* Release      SPI lock.                 */
+                                                        &NetDev_WiFi_SPI_WrRd,          /* Wr and Rd to SPI.                      */
+                                                        &NetDev_WiFi_SPI_ChipSelEn,     /* En           SPI chip sel.             */
+                                                        &NetDev_WiFi_SPI_ChipSelDis,    /* Dis          SPI chip sel.             */
+                                                        &NetDev_WiFi_SPI_Cfg,           /* Cfg          SPI controller.           */
+                                                      };
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                            NETWORK WIRELESS SPI DEVICE DRIVER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*******************************************************************************************************
+*                                         NetDev_WiFi_Start()
+*
+* Description : Start (power up) interface's/device's.
+*
+* Argument(s) : p_if        Pointer to interface to start the hardware.
+*               ----        Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device     successfully started.
+*                               NET_DEV_ERR_FAULT               Device NOT successfully started.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->Start()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_WiFi_Start (NET_IF   *p_if,
+                                 NET_ERR  *p_err)
+{
+    /* TODO Insert code to start (power up) wireless spi device.   */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_WiFi_Stop()
+*
+* Description : Stop (power down) interface's/device's.
+*
+* Argument(s) : p_if    Pointer to interface to start the hardware.
+*               ----    Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device     successfully stopped.
+*                               NET_DEV_ERR_FAULT               Device NOT successfully stopped.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->Stop()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s)
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+static  void  NetDev_WiFi_Stop (NET_IF   *p_if,
+                                NET_ERR  *p_err)
+{
+    /* TODO Insert code to stop (power down) wireless spi device.   */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_WiFi_CfgGPIO()
+*
+* Description : Configure general-purpose I/O (GPIO) for the specified interface/device. (SPI, External Interrupt,
+*               Power, Reset, etc.)
+*
+* Argument(s) : p_if        Pointer to interface to start the hardware.
+*               ----        Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device GPIO     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device GPIO NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->Stop()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s)
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+static  void  NetDev_WiFi_CfgGPIO (NET_IF   *p_if,
+                                   NET_ERR  *p_err)
+{
+    /* TODO Insert code to configure each network interface's/device's GPIO.  */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetDev_WiFi_CfgIntCtrl()
+*
+* Description : Configure interrupts &/or interrupt controller for the specified interface/device.
+*
+* Argument(s) : p_if        Pointer to interface to start the hardware.
+*               ----        Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device interrupt(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device interrupt(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->CfgIntCtrl()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s)
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_WiFi_CfgIntCtrl (NET_IF   *p_if,
+                                      NET_ERR  *p_err)
+{
+    WiFi_SPI_IF_Nbr = p_if->Nbr;
+
+    /* TODO Insert code to configure each network interface's/device's interrupt(s)/controller. */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_IntCtrl()
+*
+* Description : Enable or diable interface's/device's interrupt.
+*
+* Argument(s) : p_if    Pointer to interface to start the hardware.
+*               ----    Argument validated in NetIF_Add().
+*
+*               en      Enable or diable the interrupt.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device interrupt(s)     successfully enabled or disabled.
+*                               NET_DEV_ERR_FAULT               Device interrupt(s) NOT successfully enabled or disabled.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->IntCtrl()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s)
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_WiFi_IntCtrl (NET_IF       *p_if,
+                                   CPU_BOOLEAN   en,
+                                   NET_ERR      *p_err)
+{
+    if (en == DEF_YES) {
+        /* TODO Insert code to enable  the interface's/device's interrupt(s).    */
+    } else if (en == DEF_NO) {
+        /* TODO Insert code to disable the interface's/device's interrupt(s).    */
+    }
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetDev_WiFi_SPI_Init()
+*
+* Description : Initialize SPI controller.
+*
+* Argument(s) : p_if        Pointer to interface to start the hardware.
+*               ----        Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                SPI controller     successfully initialized.
+*                               NET_DEV_ERR_FAULT               SPI controller NOT successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->SPI_Init()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s)
+*
+* Note(s)     : (1) This function is called only when the wireless network interface is added.
+*
+*               (2) The CS (Chip Select) MUST be configured as a GPIO output; it could not be controlled
+*                   by the CPU's SPI peripheral.  The functions 'NetDev_SPI_ChipSelEn()' and
+*                  'NetDev_SPI_ChipSelDis()' should manually enable and disable the CS.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_WiFi_SPI_Init (NET_IF   *p_if,
+                                    NET_ERR  *p_err)
+{
+
+    /* TODO Insert code to initialize SPI interface's/device's controller & lock.   */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetDev_WiFi_SPI_Lock()
+*
+* Description : Acquire SPI lock.
+*
+* Argument(s) : p_if        Pointer to interface to start the hardware.
+*               ----        Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                SPI lock     successfully acquired.
+*                               NET_DEV_ERR_FAULT               SPI lock NOT successfully acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->SPI_Lock()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s)
+*
+* Note(s)     : (1) This function will be called before the device driver begins to access the SPI.  The
+*                   application should NOT use the same bus to access another device until the matching
+*                   call to 'NetDev_SPI_Unlock()' has been made.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_WiFi_SPI_Lock (NET_IF   *p_if,
+                                    NET_ERR  *p_err)
+{
+    /* TODO Insert code to lock the SPI controller.     */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                         NetDev_WiFi_SPI_Unlock()
+*
+* Description : Release SPI lock.
+*
+* Argument(s) : p_if    Pointer to interface to start the hardware.
+*               ----    Argument validated in NetIF_Add().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->SPI_Unlock()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s)
+*
+* Note(s)     : (1) 'NetDev_SPI_Lock()' will be called before the device driver begins to access the SPI.
+*                   The application should NOT use the same bus to access another device until the
+*                   matching call to this function has been made.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_WiFi_SPI_Unlock (NET_IF  *p_if)
+{
+    /* TODO Insert code to unlock the SPI controller.   */
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetDev_WiFi_SPI_WrRd()
+*
+* Description : Write and read to SPI bus.
+*
+* Argument(s) : p_if        Pointer to interface to write and read from.
+*               ----        Argument validated in NetIF_Add().
+*
+*               p_buf_wr    Pointer to buffer to write.
+*               --------    Argument validated by caller(s).
+*
+*               p_buf_rd    Pointer to buffer for data read.
+*               --------    Argument validated by caller(s).
+*
+*               wr_rd_len   Number of octets to write and read.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Network buffers     successfully wrote and read.
+*                               NET_DEV_ERR_FAULT               Network buffers NOT successfully wrote and read.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->SPI_WrRd()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_WiFi_SPI_WrRd (NET_IF      *p_if,
+                                    CPU_INT08U  *p_buf_wr,
+                                    CPU_INT08U  *p_buf_rd,
+                                    CPU_INT16U   wr_rd_len,
+                                    NET_ERR     *p_err)
+{
+    /* TODO Insert code to write and read on the SPI controller.    */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetDev_WiFi_SPI_ChipSelEn()
+*
+* Description : Enable device chip select.
+*
+* Argument(s) : p_if    Pointer to interface to enable the chip select.
+*               ----    Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device chip select     successfully enabled.
+*                               NET_DEV_ERR_FAULT               Device chip select NOT successfully enabled.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->SPI_ChipSelEn()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s)
+*
+* Note(s)     : (1) 'NetDev_SPI_ChipSelEn()' will be called before the device driver begins to access
+*                   the SPI.
+*
+*               (2) The chip select is typically 'active low'; to enable the card, the chip select pin
+*                   should be cleared.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_WiFi_SPI_ChipSelEn (NET_IF   *p_if,
+                                         NET_ERR  *p_err)
+{
+    /* TODO Insert code to enable the device chip select.    */
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetDev_WiFi_SPI_ChipSelDis()
+*
+* Description : Disable device chip select.
+*
+* Argument(s) : p_if    Pointer to interface to disable the chip select.
+*               ----    Argument validated in NetIF_Add().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->SPI_ChipSelDis()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s)
+*
+* Note(s)     : (1) 'NetDev_SPI_ChipSelDis()' will be called when the device driver finished to access
+*                   the SPI.
+*
+*               (1) The chip select is typically 'active low'; to disable the card, the chip select pin
+*                   should be set.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_WiFi_SPI_ChipSelDis (NET_IF  *p_if)
+{
+    /* TODO Insert code to disable the device chip select.    */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetDev_WiFi_SPI_Cfg()
+*
+* Description : Configure the SPI controller following the device configuration.
+*
+* Argument(s) : p_if            Pointer to interface to configure the spi.
+*               ----            Argument validated in NetIF_Add().
+*
+*               freq            Clock frequency, in Hz.
+*
+*               pol             Clock polarity:
+*                                   NET_DEV_SPI_CLK_POL_INACTIVE_LOW        The clk is low  when inactive.
+*                                   NET_DEV_SPI_CLK_POL_INACTIVE_HIGH       The clk is high when inactive.
+*
+*               phase           Clock Phase:
+*                                   NET_DEV_SPI_CLK_PHASE_FALLING_EDGE      Data is 'read'    on the leading   edge &
+*                                                                                   'changed' on the following edge
+*
+*                                   NET_DEV_SPI_CLK_PHASE_RAISING_EDGE      Data is 'changed' on the following edge &
+*                                                                                   'read'    on the leading   edge.
+*
+*               xfer_unit_len   Transfer unit length:
+*                                   NET_DEV_SPI_XFER_UNIT_LEN_8_BITS        Unit length is  8 bits.
+*                                   NET_DEV_SPI_XFER_UNIT_LEN_16_BITS       Unit length is 16 bits.
+*                                   NET_DEV_SPI_XFER_UNIT_LEN_32_BITS       Unit length is 32 bits.
+*                                   NET_DEV_SPI_XFER_UNIT_LEN_64_BITS       Unit length is 64 bits.
+*
+*               xfer_shift_dir  Transfer Shift direction:
+*                                   NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_MSB    MSB first.
+*                                   NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_LSB    LSB First
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                SPI controller     successfully configured.
+*                               NET_DEV_ERR_FAULT               SPI controller NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_dev_bsp->SPI_SetCfg()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s)
+*
+* Note(s)     : (1) 'NetDev_SPI_SetCfg()' will be called before the device driver begins to access
+*                   the SPI and after 'NetDev_SPI_Lock()' has been called.
+*
+*               (2) The effective clock frequency MUST be no more than 'freq'.  If the frequency cannot be
+*                   configured equal to 'freq', it should be configured less than 'freq'.
+*********************************************************************************************************
+*/
+
+void  NetDev_WiFi_SPI_Cfg(NET_IF                          *p_if,
+                          NET_DEV_CFG_SPI_CLK_FREQ         freq,
+                          NET_DEV_CFG_SPI_CLK_POL          pol,
+                          NET_DEV_CFG_SPI_CLK_PHASE        phase,
+                          NET_DEV_CFG_SPI_XFER_UNIT_LEN    xfer_unit_len,
+                          NET_DEV_CFG_SPI_XFER_SHIFT_DIR   xfer_shift_dir,
+                          NET_ERR                         *p_err)
+{
+
+    /* TODO Insert code to configure correctly the SPI Bus.    */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetDev_WiFi_ISR_Handler()
+*
+* Description : BSP-level ISR handler(s) for WiFi device interrupt.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU &/or WiFi device interrupt.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetDev_WiFi_ISR_Handler (void)
+{
+    NET_ERR  err;
+
+
+    NetIF_ISR_Handler(WiFi_SPI_IF_Nbr, NET_DEV_ISR_TYPE_UNKNOWN, &err);
+
+    /* TODO Insert code to clear WiFi device interrupt(s), if necessary.    */
+}
+
+#endif /* NET_IF_WIFI_MODULE_EN */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_wifi.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_wifi.h
new file mode 100644
index 0000000..0662a6b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_wifi.h
@@ -0,0 +1,56 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*
+*                                              TEMPLATE
+*
+* Filename      : net_bsp_wifi.h
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) To provide the required Board Support Package functionality, insert the appropriate
+*                     board-specific code to perform the stated actions wherever 'TODO' comments are found.
+*********************************************************************************************************
+*/
+
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_BSP_WIFI_SPI  NetDev_BSP_WiFi;
+
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_cfg.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_cfg.c
new file mode 100644
index 0000000..91eb345
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_cfg.c
@@ -0,0 +1,146 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+**                                     NETWORK CONFIGURATION FILE
+*
+*                                          TEMPLATE-EXAMPLE
+*
+* Filename : net_cfg.c
+* Version  : V3.04.02
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_CFG_MODULE
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     EXAMPLE TASKS CONFIGURATION
+*
+* Notes: (1) (a) Task priorities can be defined either in this configuration file 'net_cfg.c' or in a global
+*                OS tasks priorities configuration header file which must be included in 'net_cfg.c' and
+*                used within task's configuration structures:
+*
+*                   in app_cfg.h:
+*                       #define  NET_TASK_PRIO_RX           30u
+*                       #define  NET_TASK_PRIO_TX_DEALLOC    6u
+*                       #define  NET_TASK_PRIO_TMR          18u
+*
+*                   in net_cfg.c:
+*                       #include  
+*
+*                       NET_TASK_CFG  NetRxTaskCfg        = {
+*                                                              NET_TASK_PRIO_RX,
+*                                                              2048,
+*                                                              DEF_NULL,
+*                                                           };
+*
+*                       NET_TASK_CFG  NetTxDeallocTaskCfg = {
+*                                                              NET_TASK_PRIO_TX_DEALLOC,
+*                                                              512,
+*                                                              DEF_NULL,
+*                                                           };
+*
+*                       NET_TASK_CFG  NetTmrTaskCfg       = {
+*                                                              NET_TASK_PRIO_TMR,
+*                                                              1024,
+*                                                              DEF_NULL,
+*                                                           };
+*
+*
+*            (b) We recommend you configure the Network Protocol Stack task priorities & Network application
+*                task priorities as follows:
+*
+*                   Network TX Dealloc task   (highest priority)
+*
+*                   Network application tasks, such as HTTPs instance.
+*
+*                   Network timer task
+*                   Network RX task           (lowest  priority)
+*
+*                We recommend that the uC/TCP-IP Timer task and network interface Receive task be lower
+*                priority than almost all other application tasks; but we recommend that the network
+*                interface Transmit De-allocation task be higher  priority than all application tasks that use
+*                uC/TCP-IP network services.
+*
+*                However better performance can be observed when the network application task is set with the
+*                lowest priority. Some experimentation could be required to identify the best task priority
+*                configuration.
+*
+*        (2)  The only guaranteed method of determining the required task stack sizes is to calculate the maximum
+*             stack usage for each task. Obviously, the maximum stack usage for a task is the total stack usage
+*             along the task's most-stack-greedy function path plus the (maximum) stack usage for interrupts.
+*             Note that the most-stack-greedy function path is not necessarily the longest or deepest function path.
+*             Micrium cannot provide any recommended stack size values since it's specific to each compiler and
+*             processor.
+*
+*             Although Micrium does NOT officially recommend any specific tools to calculate task/function stack usage.
+*             However Wikipedia maintains a list of static code analysis tools for various languages including C:
+*
+*                 http://en.wikipedia.org/wiki/List_of_tools_for_static_code_analysis
+*
+*        (3)  When the stack pointer is defined as null (DEF_NULL), the task's stack is allocated automatically on the
+*             heap of uC/LIB. If for some reason you would like to allocate the stack somewhere else and by yourself,
+*             you can just specify the memory location of the stack to use.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  NET_TASK_CFG  NetRxTaskCfg = {
+        30u,                                                    /* RX task priority                    (see Note #1).   */
+        2048,                                                   /* RX task stack size in bytes         (see Note #2).   */
+        DEF_NULL,                                               /* RX task stack pointer               (See Note #3).   */
+};
+
+
+const  NET_TASK_CFG  NetTxDeallocTaskCfg = {
+        6u,                                                     /* TX Dealloc task priority            (see Note #1).   */
+        512,                                                    /* TX Dealloc task stack size in bytes (see Note #2).   */
+        DEF_NULL,                                               /* TX Dealloc task stack pointer       (See Note #3).   */
+};
+
+
+const  NET_TASK_CFG  NetTmrTaskCfg = {
+        18u,                                                    /* Timer task priority                 (see Note #1).   */
+        1024,                                                   /* Timer task stack size in bytes      (see Note #2).   */
+        DEF_NULL,                                               /* Timer task stack pointer            (See Note #3).   */
+};
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_cfg.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_cfg.h
new file mode 100644
index 0000000..16024aa
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_cfg.h
@@ -0,0 +1,668 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     NETWORK CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename : net_cfg.h
+* Version  : V3.04.02
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_CFG_MODULE_PRESENT
+#define  NET_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             NETWORK EXTERNAL APPLICATION CONFIGURATION
+*
+* Note(s) : (1) When uC/DNS-Client is present in the project some high level functions can resolve hostname.
+*               So uC/TCPIP should know that uC/DNS-Client is present to call the proper API.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* Configure DNS Client feature  (see Note #1) :        */
+#define  NET_EXT_MODULE_CFG_DNS_EN                                 DEF_DISABLED
+                                                                /*   DEF_DISABLED       DNS Client is DISABLED          */
+                                                                /*   DEF_ENABLED        DNS Client is  ENABLED          */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        TASKS CONFIGURATION
+*
+* Note(s) : (1) (a) Each network task maps to a unique, developer-configured task configuration that
+*                   MUST be defined in application files, typically 'net_cfg.c', & SHOULD be forward-
+*                   declared with the exact same name & type in order to be used by the application during
+*                   calls to Net_Init().
+*
+*               (b) Since these task configuration structures are referenced ONLY by application files,
+*                   there is NO required naming convention for these configuration structures.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_TASK_CFG  NetRxTaskCfg;
+extern  const  NET_TASK_CFG  NetTxDeallocTaskCfg;
+extern  const  NET_TASK_CFG  NetTmrTaskCfg;
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        TASKS Q CONFIGURATION
+*
+* Note(s) : (1) Rx queue size should be configured such that it reflects the total number of DMA receive descriptors on all
+*               devices. If DMA is not available, or a combination of DMA and I/O based interfaces are configured then this
+*               number reflects the maximum number of packets that can be acknowledged and signalled during a single receive
+*               interrupt event for all interfaces.
+*
+*           (2) Tx queue size should be defined to be the total number of small and large transmit buffers declared for
+*               all interfaces.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_CFG_IF_RX_Q_SIZE                   50u             /*Configure RX queue size (See Note #1).                */
+#define  NET_CFG_IF_TX_DEALLOC_Q_SIZE           50u             /*Configure TX queue size (See Note #2).                */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        NETWORK CONFIGURATION
+*
+* Note(s) : (1) uC/TCP-IP code may call optimized assembly functions. Optimized assembly files/functions must be included
+*               in the project to be enabled. Optimized functions are located in files under folders:
+*
+*                   $uC-TCPIP/Ports//
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+                                                                /* Configure network protocol suite's assembly ...      */
+                                                                /* ... optimization (see Note #1) :                     */
+#define  NET_CFG_OPTIMIZE_ASM_EN                DEF_DISABLED
+                                                                /*   DEF_DISABLED       Assembly optimization DISABLED  */
+                                                                /*   DEF_ENABLED        Assembly optimization ENABLED   */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     NETWORK DEBUG CONFIGURATION
+*
+* Note(s) : (1) Configure NET_DBG_CFG_MEM_CLR_EN to enable/disable the network protocol suite from clearing
+*               internal data structure memory buffers; a convenient feature while debugging.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* Configure memory clear feature  (see Note #1) :      */
+#define  NET_DBG_CFG_MEM_CLR_EN                 DEF_DISABLED
+                                                                /*   DEF_DISABLED  Data structure clears DISABLED       */
+                                                                /*   DEF_ENABLED   Data structure clears ENABLED        */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                NETWORK ARGUMENT CHECK CONFIGURATION
+*
+* Note(s) : (1) Configure NET_ERR_CFG_ARG_CHK_EXT_EN to enable/disable the network protocol suite external
+*               argument check feature :
+*
+*               (a) When ENABLED,  ALL arguments received from any port interface provided by the developer
+*                   or application are checked/validated.
+*
+*               (b) When DISABLED, NO  arguments received from any port interface provided by the developer
+*                   or application are checked/validated.
+*
+*           (2) Configure NET_ERR_CFG_ARG_CHK_DBG_EN to enable/disable the network protocol suite internal,
+*               debug argument check feature :
+*
+*               (a) When ENABLED,     internal arguments are checked/validated to debug the network protocol
+*                   suite.
+*
+*               (b) When DISABLED, NO internal arguments are checked/validated to debug the network protocol
+*                   suite.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+                                                                /* Configure external argument check feature ...        */
+                                                                /* ... (see Note #1) :                                  */
+#define  NET_ERR_CFG_ARG_CHK_EXT_EN             DEF_ENABLED
+                                                                /*   DEF_DISABLED     Argument check DISABLED           */
+                                                                /*   DEF_ENABLED      Argument check ENABLED            */
+
+                                                                /* Configure internal argument check feature ...        */
+                                                                /* ... (see Note #2) :                                  */
+#define  NET_ERR_CFG_ARG_CHK_DBG_EN             DEF_DISABLED
+                                                                /*   DEF_DISABLED     Argument check DISABLED           */
+                                                                /*   DEF_ENABLED      Argument check ENABLED            */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               NETWORK COUNTER MANAGEMENT CONFIGURATION
+*
+* Note(s) : (1) Configure NET_CTR_CFG_STAT_EN to enable/disable network protocol suite statistics counters.
+*
+*           (2) Configure NET_CTR_CFG_ERR_EN  to enable/disable network protocol suite error      counters.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* Configure statistics counter feature (see Note #1) : */
+#define  NET_CTR_CFG_STAT_EN                    DEF_ENABLED
+                                                                /*   DEF_DISABLED     Stat  counters DISABLED           */
+                                                                /*   DEF_ENABLED      Stat  counters ENABLED            */
+
+                                                                /* Configure error      counter feature (see Note #2) : */
+#define  NET_CTR_CFG_ERR_EN                     DEF_ENABLED
+                                                                /*   DEF_DISABLED     Error counters DISABLED           */
+                                                                /*   DEF_ENABLED      Error counters ENABLED            */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               NETWORK TIMER MANAGEMENT CONFIGURATION
+*
+* Note(s) : (1) Configure NET_TMR_CFG_NBR_TMR with the desired number of network TIMER objects.
+*
+*               Timers are required for :
+*
+*               (a) ARP & NDP cache entries
+*               (b) IP        fragment reassembly
+*               (c) TCP       state machine connections
+*               (d) IF        Link status check-up
+*
+*           (2) Configure NET_TMR_CFG_TASK_FREQ to schedule the execution frequency of the network timer
+*               task -- how often NetTmr_TaskHandler() is scheduled to run per second as implemented in
+*               NetTmr_Task().
+*
+*               (a) NET_TMR_CFG_TASK_FREQ  MUST NOT be configured as a floating-point frequency.
+*
+*               See also 'net_tmr.h  NETWORK TIMER TASK TIME DEFINES  Notes #1 & #2'
+*                      & 'net_tmr.c  NetTmr_Task()  Notes #1 & #2'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_TMR_CFG_NBR_TMR                    100u            /* Configure total number of TIMERs (see Note #1).      */
+#define  NET_TMR_CFG_TASK_FREQ                  10u             /* Configure Timer Task frequency   (see Note #2).      */
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                NETWORK INTERFACE LAYER CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_IF_CFG_MAX_NBR_IF                  1u              /* Configure maximum number of network interfaces.      */
+
+                                                                /* Configure specific interface(s) :                    */
+#define  NET_IF_CFG_LOOPBACK_EN                 DEF_DISABLED
+
+#define  NET_IF_CFG_ETHER_EN                    DEF_ENABLED
+
+#define  NET_IF_CFG_WIFI_EN                     DEF_DISABLED
+                                                                /*   DEF_DISABLED      Interface type DISABLED          */
+                                                                /*   DEF_ENABLED       interface type ENABLED           */
+
+#define  NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS       1u              /* Configure interface transmit suspend timeout in ms.  */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                           ADDRESS RESOLUTION PROTOCOL LAYER CONFIGURATION
+*
+* Note(s) : (1) Address resolution protocol ONLY required for IPv4.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_ARP_CFG_CACHE_NBR                  3u              /* Configure ARP cache size.                            */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                           NEIGHBOR DISCOVERY PROTOCOL LAYER CONFIGURATION
+*
+* Note(s) : (1) Neighbor Discovery Protocol ONLY required for IPv6.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_NDP_CFG_CACHE_NBR                  5u              /* Configures number of NDP Neighbor cache entries.     */
+#define  NET_NDP_CFG_DEST_NBR                   5u              /* Configures number of NDP Destination cache entries.  */
+#define  NET_NDP_CFG_PREFIX_NBR                 5u              /* Configures number of NDP Prefix entries.             */
+#define  NET_NDP_CFG_ROUTER_NBR                 1u              /* Configures number of NDP Router entries.             */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                            INTERNET PROTOCOL LAYER VERSION CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                                IPv4
+*********************************************************************************************************
+*/
+                                                                /* Configure IPv4.                                      */
+#define  NET_IPv4_CFG_EN                        DEF_ENABLED
+                                                                /*   DEF_DISABLED    IPv4 disabled.                     */
+                                                                /*   DEF_ENABLED     IPv4 enabled.                      */
+
+
+#define  NET_IPv4_CFG_IF_MAX_NBR_ADDR           1u              /* Configure maximum number of addresses per interface. */
+
+/*
+*********************************************************************************************************
+*                                                IPv6
+*********************************************************************************************************
+*/
+
+                                                                /* Configure IPv6.                                      */
+#define  NET_IPv6_CFG_EN                        DEF_DISABLED
+                                                                /*   DEF_DISABLED    IPv6 disabled.                     */
+                                                                /*   DEF_ENABLED     IPv6 enabled.                      */
+
+                                                                /* Configure IPv6 Stateless Address Auto-Configuration. */
+#define  NET_IPv6_CFG_ADDR_AUTO_CFG_EN          DEF_ENABLED
+                                                                /*   DEF_DISABLED    IPv6 Auto-Cfg disabled.            */
+                                                                /*   DEF_ENABLED     IPv6 Auto-Cfg enabled.             */
+
+                                                                /* Configure IPv6 Duplication Address Detection (DAD).  */
+#define  NET_IPv6_CFG_DAD_EN                    DEF_ENABLED
+                                                                /*   DEF_DISABLED    IPv6 DAD disabled.                 */
+                                                                /*   DEF_ENABLED     IPv6 DAD enabled.                  */
+
+#define  NET_IPv6_CFG_IF_MAX_NBR_ADDR           2u              /* Configure maximum number of addresses per interface. */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                  INTERNET GROUP MANAGEMENT PROTOCOL(MULTICAST) LAYER CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* Configure IPv4 multicast support :                   */
+#define  NET_MCAST_CFG_IPv4_RX_EN               DEF_ENABLED
+#define  NET_MCAST_CFG_IPv4_TX_EN               DEF_ENABLED
+                                                                /*   DEF_DISABLED    Multicast rx or tx disabled.       */
+                                                                /*   DEF_ENABLED     Multicast rx or tx enabled.        */
+
+#define  NET_MCAST_CFG_HOST_GRP_NBR_MAX         2u              /* Configure maximum number of Multicast groups.        */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                 NETWORK SOCKET LAYER CONFIGURATION
+*
+* Note(s) : (1) The maximum accept queue size represents the number of connection that can be queued by
+*               the stack before being accepted. For a TCP server when a connection is queued, it means
+*               that the SYN, ACK packet has been sent back, so the remote host can start transmitting
+*               data once the connection is queued and the stack will queue up all data received until
+*               the connection is accepted and the data is read.
+*
+*           (2) Receive and transmit queue size MUST be properly configured to optimize performance.
+*
+*               (a) It represents the number of bytes that can be queued by one socket. It's important
+*                   that all socket are not able to queue more data than what the device can hold in its
+*                   buffers.
+*
+*               (b) The size should be also a multiple of the maximum segment size (MSS) to optimize
+*                   performance. UDP MSS is 1470 and TCP MSS is 1460.
+*
+*               (c) RX and TX queue size can be reduce at runtime using socket option API.
+*
+*               (d) Window calculation example:
+*
+*                       Number of TCP connection  : 2
+*                       Number of UDP connection  : 0
+*                       Number of RX large buffer : 10
+*                       Number of TX Large buffer : 6
+*                       Number of TX small buffer : 2
+*                       Size of RX large buffer   : 1518
+*                       Size of TX large buffer   : 1518
+*                       Size of TX small buffer   : 60
+*
+*                       TCP MSS RX                = 1460
+*                       TCP MSS TX large buffer   = 1460
+*                       TCP MSS TX small buffer   = 0
+*
+*                       Maximum receive  window   = (10 * 1460)           = 14600 bytes
+*                       Maximum transmit window   = (6  * 1460) + (2 * 0) = 8760  bytes
+*
+*                       RX window size per socket = (14600 / 2)           =  7300 bytes
+*                       TX window size per socket = (8760  / 2)           =  4380 bytes
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_SOCK_CFG_SOCK_NBR_TCP              5u              /* Configure number of TCP connections.                 */
+#define  NET_SOCK_CFG_SOCK_NBR_UDP              2u              /* Configure number of UDP connections.                 */
+
+                                                                /* Configure socket select functionality :              */
+#define  NET_SOCK_CFG_SEL_EN                    DEF_ENABLED
+                                                                /*   DEF_DISABLED  Socket select  DISABLED              */
+                                                                /*   DEF_ENABLED   Socket select  ENABLED               */
+
+                                                                /* Configure stream-type sockets' accept queue          */
+#define  NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX    2u              /* maximum size. (See Note # 1)                         */
+
+
+                                                                /* Configure sockets' buffer sizes in number of octets  */
+                                                                /* (see Note #2):                                       */
+#define  NET_SOCK_CFG_RX_Q_SIZE_OCTET           4096u           /* Configure socket receive  queue buffer size.         */
+#define  NET_SOCK_CFG_TX_Q_SIZE_OCTET           4096u           /* Configure socket transmit queue buffer size.         */
+
+
+/* ==================================  ADVANCED SOCKET CONFIGURATION: DEFAULT VALUES ================================== */
+/* By default sockets are set to block. Add the following define to set all sockets as non-blocking. Note that it's     */
+/* possible to change socket's blocking mode at runtime using socket option API.                                        */
+/*                                                                                                                      */
+/*     #define  NET_SOCK_DFLT_NO_BLOCK_EN                     DEF_ENABLED                                               */
+/*                                                                                                                      */
+/* By default random port start at 65000, redefine the following define to modify where random port start:              */
+/*                                                                                                                      */
+/*     #define  NET_SOCK_DFLT_PORT_NBR_RANDOM_BASE            65000u                                                    */
+/*                                                                                                                      */
+/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to    */
+/* change default timeouts. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE,    */
+/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API.          */
+/*                                                                                                                      */
+/*     #define  NET_SOCK_DFLT_TIMEOUT_RX_Q_MS                 10000u                                                    */
+/*     #define  NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS             10000u                                                    */
+/*     #define  NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS          10000u                                                    */
+/*     #define  NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS           10000u                                                    */
+/* ==================================================================================================================== */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                          TRANSMISSION CONTROL PROTOCOL LAYER CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* Configure TCP support :                              */
+#define  NET_TCP_CFG_EN                         DEF_ENABLED
+                                                                /*   DEF_DISABLED  TCP layer  DISABLED                  */
+                                                                /*   DEF_ENABLED   TCP layer  ENABLED                   */
+
+/* ========================================= ADVANCED TCP LAYER CONFIGURATION ========================================= */
+/* By default TCP RX and TX windows are set to equal the socket RX and TX queue sizes. Default values can be changed by */
+/* redefining the following defines. TCP windows must be properly configured to optimize performance (see note about    */
+/* Socket TX and RX windows). Note that it's possible to decrease window size at run time using Socket option API.      */
+/*                                                                                                                      */
+/*     #define  NET_TCP_DFLT_RX_WIN_SIZE_OCTET      NET_SOCK_CFG_RX_Q_SIZE_OCTET                                        */
+/*     #define  NET_TCP_DFLT_TX_WIN_SIZE_OCTET      NET_SOCK_CFG_TX_Q_SIZE_OCTET                                        */
+/*                                                                                                                      */
+/* As shown in the TCP state diagram (see RFC #793), before moving from 'TIME-WAIT' state to 'CLOSED' state a timeout   */
+/* (2MSL) must expire. This means that the TCP connection cannot be made available for subsequent TCP connections until */
+/* this timeout. It can be a problem for embedded systems with low resources especially when many TCP connections are   */
+/* made in a small period of time since it is possible to run out of free TCP connections quickly. Therefore this       */
+/* timeout is set to 0 by default to avoid this kind of problem and the connection is made available as soon as the     */
+/* 'TIME-WAIT' state is reached. However, it's possible to set the default MSL timeout to something else by redefining  */
+/* the following define. Note that it is possible to change the MSL timeout for a specific TCP connection using Socket  */
+/* option API.                                                                                                          */
+/*                                                                                                                      */
+/*     #define  NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC       0u                                                          */
+/*                                                                                                                      */
+/* To avoid leaving a connection in the FIN_WAIT_2 state forever when a connection moves from the 'FIN_WAIT_1' state to */
+/* the FIN_WAIT_2, the TCP connection's timer is set to 15 second, and when it expires the connection is dropped. Thus, */
+/* if the other host doesn't response to the close request, the connection will still be closed after the timeout.      */
+/* This default timeout can be change by redefining the following define.                                               */
+/*                                                                                                                      */
+/*     #define  NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC    15u                                                         */
+/*                                                                                                                      */
+/* The number of TCP connections is configured following the number of TCP sockets and the accept queue size when the   */
+/* MSL is set to 0 ms. However, since the default MSL can be modified, it might be needed to increase the number of TCP */
+/* connections to establish more connections when waiting for the MSL expiration. It is possible to add more TCP        */
+/* connections by defining the following define.                                                                        */
+/*                                                                                                                      */
+/*     #define  NET_TCP_CFG_NBR_CONN                        0u                                                          */
+/*                                                                                                                      */
+/* By default an 'ACK' is generated within 500 ms of the arrival of the first unacknowledged packet, as specified in    */
+/* RFC #2581, Section 4.2. However it's possible to modify this value by defining the following define.                 */
+/*                                                                                                                      */
+/*     #define  NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS        500u                                                        */
+/*                                                                                                                      */
+/* When a socket is set as blocking the following default timeout values are used. Redefine the following defines to    */
+/* change default timeout. Timeout values may also be configured with network time constant, NET_TMR_TIME_INFINITE,     */
+/* to never time out. Note that it's possible to change at runtime any timeout values using Socket option API.          */
+/*     #define  NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS           1000u                                                       */
+/*     #define  NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS           1000u                                                       */
+/* ==================================================================================================================== */
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                             USER DATAGRAM PROTOCOL LAYER CONFIGURATION
+*
+* Note(s) : (1) Configure NET_UDP_CFG_APP_API_SEL with the desired configuration for demultiplexing
+*               UDP datagrams to application connections :
+*
+*                   NET_UDP_APP_API_SEL_SOCK        Demultiplex UDP datagrams to BSD sockets ONLY.
+*                   NET_UDP_APP_API_SEL_APP         Demultiplex UDP datagrams to application-specific
+*                                                       connections ONLY.
+*                   NET_UDP_APP_API_SEL_SOCK_APP    Demultiplex UDP datagrams to BSD sockets first;
+*                                                       if NO socket connection found to demultiplex
+*                                                       a UDP datagram, demultiplex to application-
+*                                                       specific connection.
+*
+*               See also 'net_udp.c  NetUDP_RxPktDemuxDatagram()  Note #1'
+*                      & 'net_udp.c  NetUDP_RxPktDemuxAppData()   Note #1'.
+*
+*           (2) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally ... discard
+*                   ... [or allow] ... received ... UDP datagrams without checksums".
+*
+*               (b) Configure NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN to enable/disable discarding of UDP
+*                   datagrams received with NO computed check-sum :
+*
+*                   (1) When ENABLED,  ALL UDP datagrams received without a check-sum are discarded.
+*
+*                   (2) When DISABLED, ALL UDP datagrams received without a check-sum are flagged so
+*                       that application(s) may handle &/or discard.
+*
+*               See also 'net_udp.c  NetUDP_RxPktValidate()  Note #4d3A'.
+*
+*           (3) (a) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally be able to
+*                   control whether a UDP checksum will be generated".
+*
+*               (b) Configure NET_UDP_CFG_TX_CHK_SUM_EN to enable/disable transmitting UDP datagrams
+*                   with check-sums :
+*
+*                   (1) When ENABLED,  ALL UDP datagrams are transmitted with    a computed check-sum.
+*
+*                   (2) When DISABLED, ALL UDP datagrams are transmitted without a computed check-sum.
+*
+*               See also 'net_udp.c  NetUDP_TxPktPrepareHdr()  Note #3b'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+                                                                /* Configure UDP Receive Check-Sum Discard feature ...  */
+                                                                /* ... (see Note #2b) :                                 */
+#define  NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN      DEF_DISABLED
+                                                                /*   DEF_DISABLED  UDP Check-Sums  Received without ... */
+                                                                /*                     Check-Sums Validated             */
+                                                                /*   DEF_ENABLED   UDP Datagrams  Received without ...  */
+                                                                /*                     Check-Sums Discarded             */
+
+                                                                /* Configure UDP Transmit Check-Sum feature ...         */
+                                                                /* ... (see Note #3b) :                                 */
+#define  NET_UDP_CFG_TX_CHK_SUM_EN              DEF_ENABLED
+                                                                /*   DEF_DISABLED  Transmit Check-Sums  DISABLED        */
+                                                                /*   DEF_ENABLED   Transmit Check-Sums  ENABLED         */
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               NETWORK SECURITY MANAGER CONFIGURATION
+*
+* Note(s): (1) The network security layer can be enabled ONLY if the application project contains a secure module
+*              supported by uC/TCPIP such as:
+*
+*              (a) NanoSSL provided by Mocana.
+*              (b) CyaSSL  provided by YaSSL.
+*
+*          (2) The network security port must be also added to the project. Security port can be found under the folder:
+*
+*                 $uC-TCPIP/Secure/
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+                                                                /* Configure network security layer (See Note #1 & #2): */
+#define  NET_SECURE_CFG_EN                      DEF_DISABLED
+                                                                /*   DEF_DISABLED  Security layer  DISABLED             */
+                                                                /*   DEF_ENABLED   Security layer  ENABLED              */
+
+#define  NET_SECURE_CFG_MAX_NBR_SOCK_SERVER     2u              /* Configure total number of server secure sockets.     */
+#define  NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT     2u              /* Configure total number of client secure sockets.     */
+
+#define  NET_SECURE_CFG_MAX_CERT_LEN            1500u           /* Configure servers certificate maximum length (bytes) */
+#define  NET_SECURE_CFG_MAX_KEY_LEN             1500u           /* Configure servers key maximum length (bytes)         */
+
+                                                                /* Configure maximum number of certificate authorities  */
+#define  NET_SECURE_CFG_MAX_NBR_CA              1u              /* that can be installed.                               */
+
+#define  NET_SECURE_CFG_MAX_CA_CERT_LEN         1500u           /* Configure CA certificate maximum length (bytes)      */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               INTERFACE CHECKSUM OFFLOAD CONFIGURATION
+*
+* Note(s): (1) These configuration can be enabled only if all your interfaces support specific checksum offload
+*              option.
+*
+*          (2) By default a driver should enabled the all checksum offload option.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+/* ========================================== ADVANCED OFFLOAD CONFIGURATION ========================================== */
+/* By default all checksum are validated by the stack however it is possible to enable or disable specific checksum     */
+/* validate and calculation if the interface controller is able to achieve it. You can add the following define in this */
+/* file to change the default behavior.                                                                                 */
+/*                                                                                                                      */
+/* -------------------------------------------------- IPv4 CHECKSUM --------------------------------------------------- */
+/*                                                  Configure validation in reception.                                  */
+/* #define  NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN  DEF_DISABLED                                                            */
+/*                                                                                                                      */
+/*                                                  Configure calculation in transmission.                              */
+/* #define  NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN  DEF_DISABLED                                                            */
+/*                                                                                                                      */
+/*                                                                                                                      */
+/* -------------------------------------------------- ICMP CHECKSUM --------------------------------------------------- */
+/*                                                  Configure validation in reception.                                  */
+/* #define  NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN  DEF_DISABLED                                                            */
+/*                                                                                                                      */
+/*                                                  Configure calculation in transmission.                              */
+/* #define  NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN  DEF_DISABLED                                                            */
+/*                                                                                                                      */
+/*                                                                                                                      */
+/* --------------------------------------------------- UDP CHECKSUM --------------------------------------------------- */
+/*                                                  Configure validation in reception.                                  */
+/* #define  NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN   DEF_DISABLED                                                            */
+/*                                                                                                                      */
+/*                                                  Configure calculation in transmission.                              */
+/* #define  NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN   DEF_DISABLED                                                            */
+/*                                                                                                                      */
+/*                                                                                                                      */
+/* --------------------------------------------------- TCP CHECKSUM --------------------------------------------------- */
+/*                                                  Configure validation in reception.                                  */
+/* #define  NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN   DEF_DISABLED                                                            */
+/*                                                                                                                      */
+/*                                                  Configure calculation in transmission.                              */
+/* #define  NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN   DEF_DISABLED                                                            */
+/* ==================================================================================================================== */
+
+
+/* ======================================================= END ======================================================== */
+#endif  /* NET_CFG_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_dev_cfg.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_dev_cfg.c
new file mode 100644
index 0000000..b8d79e3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_dev_cfg.c
@@ -0,0 +1,319 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  NETWORK DEVICE CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename : net_dev_cfg.c
+* Version  : V3.04.02
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_DEV_CFG_MODULE
+#include   
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+#include   
+#endif
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+#include   
+#endif
+
+#ifdef  NET_IF_LOOPBACK_MODULE_EN
+#include   
+#endif
+
+
+/*
+*********************************************************************************************************
+*                           EXAMPLE NETWORK INTERFACE / DEVICE CONFIGURATION
+*
+* Note(s) : (1) (a) Buffer & memory sizes & alignments configured in number of octets.
+*               (b) Data bus size                      configured in number of bits.
+*
+*           (2) (a) All   network  buffer data area sizes MUST be configured greater than or equal to
+*                   NET_BUF_DATA_SIZE_MIN.
+*               (b) Large transmit buffer data area sizes MUST be configured greater than or equal to
+*                   small transmit buffer data area sizes.
+*               (c) Small transmit buffer data area sizes MAY need to be configured greater than or
+*                   equal to the specific interface's minimum packet size.
+*
+*               See also 'net_buf.c       NetBuf_PoolCfgValidate()          Note #3'
+*                      & 'net_if_ether.c  NetIF_Ether_BufPoolCfgValidate()  Note #2'.
+*
+*           (3) (a) MUST configure at least one (1) large receive  buffer.
+*               (b) MUST configure at least one (1)       transmit buffer, however, zero (0) large OR
+*                       zero (0) small transmit buffers MAY be configured.
+*
+*               See also 'net_buf.c  NetBuf_PoolCfgValidate()  Note #2'.
+*
+*           (4) Some processors or devices may be more efficient & may even REQUIRE that buffer data areas
+*               align to specific CPU-word/octet address boundaries in order to successfully read/write
+*               data from/to devices.  Therefore, it is recommended to align devices' buffer data areas to
+*               the processor's or device's data bus width.
+*
+*               See also 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #2b'.
+*
+*           (5) Positive offset from base receive/transmit index, if required by device (or driver) :
+*
+*               (a) (1) Some device's may receive or buffer additional octets prior to the actual  received
+*                       packet.  Thus an offset may be required to ignore these additional octets :
+*
+*                       (A) If a device does NOT receive or buffer any  additional octets prior to received
+*                           packets, then the default offset of '0' SHOULD be configured.
+*
+*                       (B) However, if a device does receive or buffer additional octets prior to received
+*                           packets, then configure the device's receive  offset with the number of
+*                           additional octets.
+*
+*                       See also 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #2b1A'.
+*
+*                   (2) Some device's/driver's may require additional octets prior to the actual transmit
+*                       packet.  Thus an offset may be required to reserve additional octets :
+*
+*                       (A) If a device/driver does NOT require any  additional octets prior to  transmit
+*                           packets, then the default offset of '0' SHOULD be configured.
+*
+*                       (B) However, if a device/driver does require additional octets prior to  transmit
+*                           packets, then configure the device's transmit offset with the number of
+*                           additional octets.
+*
+*                       See also 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #2b1B'.
+*
+*               (b) Since each network buffer data area allocates additional octets for its configured
+*                   offset(s) [see 'net_if.c  NetIF_BufPoolInit()  Note #3'], the network buffer data
+*                   area size does NOT need to be increased by the number of additional offset octets.
+*
+*           (6) Flags to configure (optional) device features; bit-field flags logically OR'd :
+*
+*               (a) NET_DEV_CFG_FLAG_NONE           No device configuration flags selected.
+*
+*               (b) NET_DEV_CFG_FLAG_SWAP_OCTETS    Swap data octets [i.e. swap data words' high-order
+*                                                       octet(s) with data words' low-order octet(s),
+*                                                       & vice-versa] if required by device-to-CPU data
+*                                                       bus wiring &/or CPU endian word order.
+*
+*           (7) Network devices with receive descriptors MUST configure the number of receive buffers
+*               greater than the number of receive descriptors.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                EXAMPLE ETHERNET DEVICE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+                                    /* ----------------- EXAMPLE ETHERNET DEVICE A, #1 CONFIGURATION ------------------ */
+
+const  NET_DEV_CFG_ETHER  NetDev_Cfg_Ether_1 = {
+
+    NET_IF_MEM_TYPE_MAIN,           /* Desired receive  buffer memory pool type :                                       */
+                                    /*   NET_IF_MEM_TYPE_MAIN        buffers allocated from main memory                 */
+                                    /*   NET_IF_MEM_TYPE_DEDICATED   buffers allocated from (device's) dedicated memory */
+    1518u,                          /* Desired size      of device's large receive  buffers (in octets) [see Note #2].  */
+      10u,                          /* Desired number    of device's large receive  buffers             [see Note #3a]. */
+       4u,                          /* Desired alignment of device's       receive  buffers (in octets) [see Note #4].  */
+       0u,                          /* Desired offset from base receive  index, if needed   (in octets) [see Note #5a1].*/
+
+
+    NET_IF_MEM_TYPE_MAIN,           /* Desired transmit buffer memory pool type :                                       */
+                                    /*   NET_IF_MEM_TYPE_MAIN        buffers allocated from main memory                 */
+                                    /*   NET_IF_MEM_TYPE_DEDICATED   buffers allocated from (device's) dedicated memory */
+    1518u,                          /* Desired size      of device's large transmit buffers (in octets) [see Note #2].  */
+       5u,                          /* Desired number    of device's large transmit buffers             [see Note #3b]. */
+      60u,                          /* Desired size      of device's small transmit buffers (in octets) [see Note #2].  */
+       5u,                          /* Desired number    of device's small transmit buffers             [see Note #3b]. */
+       4u,                          /* Desired alignment of device's       transmit buffers (in octets) [see Note #4].  */
+       0u,                          /* Desired offset from base transmit index, if needed   (in octets) [see Note #5a2].*/
+
+
+    0x00000000u,                    /* Base address   of dedicated memory, if available.                                */
+             0u,                    /* Size           of dedicated memory, if available (in octets).                    */
+
+
+    NET_DEV_CFG_FLAG_NONE,          /* Desired option flags, if any (see Note #6).                                      */
+
+
+             1u,                    /* Desired number of device's receive  descriptors (see Note #7).                   */
+             1u,                    /* Desired number of device's transmit descriptors.                                 */
+
+
+    0xFFFFFFFFu,                    /* Base address   of device's hardware/registers.                                   */
+
+             0u,                    /* Size           of device's data bus (in bits), if available.                     */
+
+
+   "00:AB:CD:EF:80:01",             /* Desired device hardware address; may be NULL address or string ...               */
+                                    /* ... if  device hardware address configured or set at run-time.                   */
+};
+
+
+const  NET_PHY_CFG_ETHER  NetPhy_Cfg_Ether_1 = {
+    1u,                             /* Phy bus address.                                                                 */
+    NET_PHY_BUS_MODE_MII,           /* Phy bus mode.                                                                    */
+    NET_PHY_TYPE_INT,               /* Phy type.                                                                        */
+    NET_PHY_SPD_AUTO,               /* Auto-Negotiation determines link speed.                                          */
+    NET_PHY_DUPLEX_AUTO,            /* Auto-Negotiation determines link duplex.                                         */
+};
+
+
+#endif                              /* End of Ethernet device configuration.                                            */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                  EXAMPLE WIFI DEVICE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+
+                                    /* -------------------- EXAMPLE WIFI DEVICE B, #1 CONFIGURATION -------------------- */
+
+const  NET_DEV_CFG_WIFI  NetDev_Cfg_WiFi_1 = {
+
+    NET_IF_MEM_TYPE_MAIN,           /* Desired receive  buffer memory pool type :                                       */
+                                    /*   NET_IF_MEM_TYPE_MAIN        buffers allocated from main memory                 */
+                                    /*   NET_IF_MEM_TYPE_DEDICATED   buffers allocated from (device's) dedicated memory */
+    1518u,                          /* Desired size      of device's large receive  buffers (in octets) [see Note #2].  */
+       4u,                          /* Desired number    of device's large receive  buffers             [see Note #3a]. */
+       4u,                          /* Desired alignment of device's       receive  buffers (in octets) [see Note #4].  */
+       4u,                          /* Desired offset from base receive  index, if needed   (in octets) [see Note #5a1].*/
+
+
+    NET_IF_MEM_TYPE_MAIN,           /* Desired transmit buffer memory pool type :                                       */
+                                    /*   NET_IF_MEM_TYPE_MAIN        buffers allocated from main memory                 */
+                                    /*   NET_IF_MEM_TYPE_DEDICATED   buffers allocated from (device's) dedicated memory */
+    1518u,                          /* Desired size      of device's large transmit buffers (in octets) [see Note #2].  */
+       2u,                          /* Desired number    of device's large transmit buffers             [see Note #3b]. */
+      60u,                          /* Desired size      of device's small transmit buffers (in octets) [see Note #2].  */
+       1u,                          /* Desired number    of device's small transmit buffers             [see Note #3b]. */
+       4u,                          /* Desired alignment of device's       transmit buffers (in octets) [see Note #4].  */
+       0u,                          /* Desired offset from base transmit index, if needed   (in octets) [see Note #5a2].*/
+
+
+    0x00000000u,                    /* Base address   of dedicated memory, if available.                                */
+             0u,                    /* Size           of dedicated memory, if available (in octets).                    */
+
+
+    NET_DEV_CFG_FLAG_NONE,          /* Desired option flags, if any (see Note #6).                                      */
+
+    NET_DEV_BAND_DUAL,                      /* Wireless band:                                                           */
+                                            /*   NET_DEV_BAND_2_4_GHZ     the wireless band to use is 2.4         Ghz.  */
+                                            /*   NET_DEV_BAND_5_0_GHZ     the wireless band to use is 5.0         Ghz.  */
+                                            /*   NET_DEV_BAND_DUAL        the wireless band to use is 2.4 and 5.0 Ghz.  */
+
+      25000000L,                            /* SPI Clock frequency (in Hertz).                                          */
+
+    NET_DEV_SPI_CLK_POL_INACTIVE_HIGH,      /* SPI Clock polarity:                                                      */
+                                            /*   NET_DEV_SPI_CLK_POL_INACTIVE_LOW     the clock is low  when inactive.  */
+                                            /*   NET_DEV_SPI_CLK_POL_INACTIVE_HIGH    the clock is high when inactive.  */
+
+    NET_DEV_SPI_CLK_PHASE_FALLING_EDGE,     /* SPI Clock phase:                                                         */
+                                            /*   NET_DEV_SPI_CLK_PHASE_FALLING_EDGE  Data availables on failling edge.  */
+                                            /*   NET_DEV_SPI_CLK_PHASE_RASING_EDGE   Data availables on rasing   edge.  */
+
+    NET_DEV_SPI_XFER_UNIT_LEN_8_BITS,       /* SPI transfert unit length:                                               */
+                                            /*   NET_DEV_SPI_XFER_UNIT_LEN_8_BITS    Unit length of  8 bits.            */
+                                            /*   NET_DEV_SPI_XFER_UNIT_LEN_16_BITS   Unit length of 16 bits.            */
+                                            /*   NET_DEV_SPI_XFER_UNIT_LEN_32_BITS   Unit length of 32 bits.            */
+                                            /*   NET_DEV_SPI_XFER_UNIT_LEN_64_BITS   Unit length of 64 bits.            */
+
+    NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_MSB,   /* SPI transfer shift direction:                                            */
+                                            /*   NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_MSB   Transfer MSB first.             */
+                                            /*   NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_LSB   Transfer LSB first.             */
+
+   "00:50:C2:25:60:02",                     /* Desired device hardware address; may be NULL address or string ...       */
+                                            /* ... if  device hardware address configured or set at run-time.           */
+};
+
+
+#endif                                      /* End of Wireless device configuration.                                    */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                          EXAMPLE NETWORK LOOPBACK INTERFACE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef NET_IF_LOOPBACK_MODULE_EN
+
+const  NET_IF_CFG_LOOPBACK  NetIF_Cfg_Loopback = {
+
+    NET_IF_MEM_TYPE_MAIN,       /* Desired receive  buffer memory pool type :                                           */
+                                /*   NET_IF_MEM_TYPE_MAIN        buffers allocated from main memory                     */
+                                /*   NET_IF_MEM_TYPE_DEDICATED   buffers allocated from (loopback's) dedicated memory   */
+    1500u,                      /* Desired size      of interface's large receive  buffers (in octets) [see Note #2].   */
+      10u,                      /* Desired number    of interface's large receive  buffers             [see Note #3a].  */
+       4u,                      /* Desired alignment of interface's       receive  buffers (in octets) [see Note #4].   */
+       0u,                      /* Desired offset from base receive  index, if needed      (in octets) [see Note #5a1]. */
+
+
+    NET_IF_MEM_TYPE_MAIN,       /* Desired transmit buffer memory pool type :                                           */
+                                /*   NET_IF_MEM_TYPE_MAIN        buffers allocated from main memory                     */
+                                /*   NET_IF_MEM_TYPE_DEDICATED   buffers allocated from (loopback's) dedicated memory   */
+    1500u,                      /* Desired size      of interface's large transmit buffers (in octets) [see Note #2].   */
+      10u,                      /* Desired number    of interface's large transmit buffers             [see Note #3b].  */
+      60u,                      /* Desired size      of interface's small transmit buffers (in octets) [see Note #2].   */
+      10u,                      /* Desired number    of interface's small transmit buffers             [see Note #3b].  */
+       4u,                      /* Desired alignment of interface's       transmit buffers (in octets) [see Note #4].   */
+       0u,                      /* Desired offset from base transmit index, if needed      (in octets) [see Note #5a2]. */
+
+
+    0x00000000u,                /* Base address   of dedicated memory, if available.                                    */
+             0u,                /* Size           of dedicated memory, if available (in octets).                        */
+
+
+    NET_DEV_CFG_FLAG_NONE,      /* Desired option flags, if any (see Note #6).                                          */
+};
+
+
+#endif                          /* End of network loopback configuration.                                               */
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_dev_cfg.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_dev_cfg.h
new file mode 100644
index 0000000..9dea7b2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cfg/Template/net_dev_cfg.h
@@ -0,0 +1,124 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  NETWORK DEVICE CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename : net_dev_cfg.h
+* Version  : V3.04.02
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This network device configuration header file is protected from multiple pre-processor
+*               inclusion through use of the network module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DEV_CFG_MODULE_PRESENT                             /* See Note #1.                                         */
+#define  NET_DEV_CFG_MODULE_PRESENT
+
+#include   
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+#include   
+#endif
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+#include   
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                    NETWORK DEVICE CONFIGURATION
+*
+* Note(s) : (1) (a) Each network device maps to a unique, developer-configured device configuration that
+*                   MUST be defined in application files, typically 'net_dev_cfg.c', & SHOULD be forward-
+*                   declared with the exact same name & type in order to be used by the application during
+*                   calls to NetIF_Add().
+*
+*               (b) Since these device configuration structures are referenced ONLY by application files,
+*                   there is NO required naming convention for these configuration structures.  However,
+*                   the following naming convention is suggested for all developer-configured network
+*                   device configuration structures :
+*
+*                       NetDev_Cfg_[_Number]
+*
+*                           where
+*                                           Name of device or device driver
+*                                   [Number]        Network device number for each specific instance of
+*                                                       device (optional if the development board does NOT
+*                                                       support multiple instances of the specific device)
+*
+*                       Examples :
+*
+*                           NET_DEV_CFG_ETHER  NetDev_Cfg_MACB;         Ethernet configuration for MACB
+*
+*                           NET_DEV_CFG_ETHER  NetDev_Cfg_FEC_0;        Ethernet configuration for FEC #0
+*                           NET_DEV_CFG_ETHER  NetDev_Cfg_FEC_1;        Ethernet configuration for FEC #1
+*
+*                           NET_DEV_CFG_WIFI   NetDev_Cfg_RS9110N21_0;  Wireless configuration for RS9110-N-21
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                        /* Declare each specific devices' configuration (see Note #1) : */
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+extern  const  NET_DEV_CFG_ETHER  NetDev_Cfg_Ether_1;   /*   Example Ethernet     configuration for device A, #1        */
+extern  const  NET_PHY_CFG_ETHER  NetPhy_Cfg_Ether_1;   /*   Example Ethernet Phy configuration for device A, #1        */
+
+#endif  /* NET_IF_ETHER_MODULE_EN */
+
+
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+
+extern  const  NET_DEV_CFG_WIFI   NetDev_Cfg_WiFi_1;    /*   Example Wireless     configuration for device B, #1        */
+
+#endif  /* NET_IF_WIFI_MODULE_EN */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_DEV_CFG_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/Script/Python/net_cmd.py b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/Script/Python/net_cmd.py
new file mode 100644
index 0000000..925c0c6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/Script/Python/net_cmd.py
@@ -0,0 +1,216 @@
+'''
+Created on Sep 24, 2014
+
+@author: Alexandre
+'''
+from _pytest.runner import fail
+
+def enum(**enums):
+    return type('Enum', (), enums)
+#end enum
+
+
+SockType = enum(
+    Stream   = 's',
+    Datagram = 'd'
+)
+
+
+AddrFamily = enum(
+    IPv4 = '4',
+    IPv6 = '6'
+)   
+    
+class netcmd:        
+    
+    def  __init__ (self, io):
+        self.io = io
+        #end __init__()  
+    
+    
+    def RouteAdd (self, if_nbr, addr, mask, gateway, addr_family):        
+        
+        family = self._getAddrFamily(addr_family)
+        if (family == None):
+            return (False, "Invalid address Family")
+        
+        result, rd = self._IO_ExecCmd("net_route_add -i " + if_nbr + " -" + family + " " + addr + " " + mask + " " + gateway)    
+        
+        return (result, rd)
+    #end RouteAdd()
+    
+    
+    
+    def RouteRemove (self, if_nbr, addr, mask, gateway, addr_family):   
+        family = self._getAddrFamily(addr_family)
+        if (family == None):
+            return (False, "Invalid address Family")
+        
+        result, rd = self._IO_ExecCmd("net_route_remove -i " + if_nbr + " -" + family + " " + addr + " " + mask + " " + gateway)    
+        
+        return (result)    
+    #end RouteRemove()
+    
+    
+    
+    def SockOpen (self, sock_type, addr_family):
+        
+        sock_id = "0"
+        
+        
+        family = self._getAddrFamily(addr_family)
+        if (family == None):
+            return (False, "Invalid address Family")
+        
+        type = self._getSockType(sock_type)
+        if (type == None):
+            return (False, "Invalid Socket Type")
+            
+            
+        family = AddrFamily.IPv4
+        addr_family = addr_family.lower()
+        if addr_family.find("ipv4") > -1:
+           family = AddrFamily.IPv4
+        elif addr_family.find("ipv6") > -1:
+            family = AddrFamily.IPv6
+        else: 
+            return (False, "Invalid address Family", sock_id)
+                     
+             
+        result, rd = self._IO_ExecCmd("net_sock_open -t " + type + " -f " + family)    
+        if (result == True):
+            sock_id = self._extractSockID(rd)
+            
+            
+        return (result, sock_id, rd)
+    #end sockOpen()
+    
+        
+        
+    def SockClose (self, sock_id):        
+        
+        result, rd = self._IO_ExecCmd("net_sock_close -i " +  sock_id)
+        
+        return (result, rd)    
+    #end sockClose()
+    
+    
+    
+    def SockBind (self, sock_id, port):
+        
+        
+        result, rd = self._IO_ExecCmd("net_sock_bind -i " +  sock_id + " -f 4 -p " + str(port))
+        
+        return (result, rd)    
+    #end sockBind()
+    
+    
+    
+    def SockListen (self, sock_id, queue_size):
+        
+        result, rd = self._IO_ExecCmd("net_sock_listen -i " +  sock_id + " -q " + str(queue_size)) 
+        
+        return (result, rd) 
+    #end sockListen()
+    
+    
+    
+    def SockAccept (self, sock_id):
+        
+        result, rd = self._IO_ExecCmd("net_sock_accept -i " +  sock_id)
+        if (result == True):
+            sock_id = self._extractSockID(rd)
+        
+        return (result, sock_id, rd)
+    #end sockAccept()
+    
+    
+    
+    def SockConnect (self, sock_id, addr, port):
+        
+        result, rd = self._IO_ExecCmd("net_sock_connect -i " +  sock_id + " -a " + addr + " -p " + str(port))
+
+        
+        return (result, rd)
+    #end netCmdSockConnect()
+    
+    
+    def SockOptSetChild (self, sock_id, child_count):    
+        result, rd = self._IO_ExecCmd("net_sock_opt_set_child -i " +  sock_id + " -v " + str(child_count))
+
+        
+        return (result, rd)
+    #end netCmdSockConnect()
+    
+    
+    
+    def Ping (self, addr):
+        
+        result, val = self._IO_ExecCmd("net_ping " +  addr)
+        
+        return (result)
+    #end netCmdSockConnect()    
+    
+    
+    
+    def _IO_ExecCmd (self, cmd_str):        
+        cmd_list = list()
+        cmd_list.append(cmd_str)
+        line_list = self.io.Command(cmd_list)
+        
+        for line in line_list:
+            val = line.replace('\r\n','\n').replace('\r','\n')
+            print (val)
+            
+            if val.find("Error") > -1: 
+                return (False, val)            
+        #end for
+                
+        return (True, val)
+    #end _IO_ExecCmd()    
+    
+    
+    
+    def _extractSockID(self, str_val):
+        sock_ix = str_val.find("Socket ID = \n")
+        sock_ix += len("Socket ID = \n")
+        sock_id = str_val[sock_ix:]
+        end = sock_id.find('\n')
+        sock_id = sock_id[: end]
+        return sock_id
+    #end _extractSockID()    
+    
+    
+    
+    def _getSockType (self, sock_type_str):
+        type = SockType.Stream
+        
+        sock_type = sock_type_str.lower()
+        if sock_type.find("stream") > -1:
+           type = SockType.Stream
+        elif sock_type.find("datagram") > -1:
+            type = SockType.Datagram
+        else:
+            return None
+        
+        
+        return type
+    #end _getAddrFamily()
+    
+    
+    
+    def _getAddrFamily (self, family_str):
+        family = AddrFamily.IPv4
+        
+        addr_family = family_str.lower()
+        if addr_family.find("ipv4") > -1:
+           family = AddrFamily.IPv4
+        elif addr_family.find("ipv6") > -1:
+            family = AddrFamily.IPv6
+        else: 
+            return (None)
+        
+        return family
+    #end _getAddrFamily()
+    
+#end  class NetCmd
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd.c
new file mode 100644
index 0000000..09fad7d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd.c
@@ -0,0 +1,5689 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK SHELL COMMAND
+*
+* Filename      : net_cmd.c
+* Version       : V3.03.01
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V3.01.00
+*                     (b) uC/OS-II  V2.90.00 or
+*                         uC/OS-III V3.03.01
+*                     (c) uC/Shell  V1.03.01
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  NET_CMD_MODULE
+
+
+#include  "net_cmd.h"
+#include  "../Source/net_cfg_net.h"
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_ipv4.h"
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ipv6.h"
+#include  "../IP/IPv6/net_ndp.h"
+#endif
+
+
+#include  "net_cmd_args_parser.h"
+
+#include  "../Source/net_sock.h"
+#include  "../Source/net_app.h"
+#include  "../Source/net_ascii.h"
+#include  "../Source/net_icmp.h"
+#include  "../Source/net_err.h"
+#include  "../Source/net.h"
+
+
+#include  "../IF/net_if.h"
+#include  "../IF/net_if_ether.h"
+#include  "../IF/net_if_wifi.h"
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_CMD_ARG_BEGIN                  ASCII_CHAR_HYPHEN_MINUS
+
+
+#define  NET_CMD_ARG_IPv4                   ASCII_CHAR_DIGIT_FOUR
+#define  NET_CMD_ARG_IPv6                   ASCII_CHAR_DIGIT_SIX
+
+#define  NET_CMD_ARG_IF                     ASCII_CHAR_LATIN_LOWER_I
+#define  NET_CMD_ARG_SOCK_ID                ASCII_CHAR_LATIN_LOWER_I
+#define  NET_CMD_ARG_LEN                    ASCII_CHAR_LATIN_LOWER_L
+#define  NET_CMD_ARG_CNT                    ASCII_CHAR_LATIN_LOWER_C
+#define  NET_CMD_ARG_HW_ADDR                ASCII_CHAR_LATIN_LOWER_H
+#define  NET_CMD_ARG_ADDR                   ASCII_CHAR_LATIN_LOWER_A
+#define  NET_CMD_ARG_MASK                   ASCII_CHAR_LATIN_LOWER_M
+#define  NET_CMD_ARG_FMT                    ASCII_CHAR_LATIN_LOWER_F
+#define  NET_CMD_ARG_DATA                   ASCII_CHAR_LATIN_LOWER_D
+#define  NET_CMD_ARG_VAL                    ASCII_CHAR_LATIN_LOWER_V
+
+#define  NET_CMD_ARG_WIFI_CHANNEL           ASCII_CHAR_LATIN_LOWER_C
+#define  NET_CMD_ARG_WIFI_SSID              ASCII_CHAR_LATIN_LOWER_S
+#define  NET_CMD_ARG_WIFI_PSK               ASCII_CHAR_LATIN_LOWER_P
+#define  NET_CMD_ARG_WIFI_NET_TYPE          ASCII_CHAR_LATIN_LOWER_T
+#define  NET_CMD_ARG_WIFI_SECURITY_TYPE     ASCII_CHAR_LATIN_LOWER_S
+
+
+#define  NET_CMD_ARG_MTU                    ASCII_CHAR_LATIN_UPPER_M
+#define  NET_CMD_ARG_SOCK_FAMILY            ASCII_CHAR_LATIN_LOWER_F
+#define  NET_CMD_ARG_SOCK_TYPE              ASCII_CHAR_LATIN_LOWER_T
+#define  NET_CMD_ARG_SOCK_PORT              ASCII_CHAR_LATIN_LOWER_P
+#define  NET_CMD_ARG_SOCK_Q_SIZE            ASCII_CHAR_LATIN_LOWER_Q
+
+#define  NET_CMD_ARG_SOCK_SEL_RD            ASCII_CHAR_LATIN_LOWER_R
+#define  NET_CMD_ARG_SOCK_SEL_WR            ASCII_CHAR_LATIN_LOWER_W
+#define  NET_CMD_ARG_SOCK_SEL_ERR           ASCII_CHAR_LATIN_LOWER_E
+#define  NET_CMD_ARG_SOCK_SEL_TIMEOUT       ASCII_CHAR_LATIN_LOWER_T
+
+
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef struct net_cmd_reset_cmd_arg {
+    CPU_CHAR     *IF_NbrPtr;
+    CPU_BOOLEAN   IPv4_En;
+    CPU_BOOLEAN   IPv6_En;
+} NET_CMD_RESET_CMD_ARG;
+
+typedef  struct net_cmd_reset_arg {
+    NET_IF_NBR         IF_Nbr;
+    CPU_BOOLEAN        IPv4_En;
+    CPU_BOOLEAN        IPv6_En;
+} NET_CMD_RESET_ARG;
+
+
+typedef  struct net_cmd_route_cmd_arg {
+    CPU_CHAR                 *IF_NbrPtr;
+    NET_CMD_IPv4_ASCII_CFG    IPv4;
+    NET_CMD_IPv6_ASCII_CFG    IPv6;
+} NET_CMD_ROUTE_CMD_ARG;
+
+typedef  struct net_cmd_route_arg {
+    NET_IF_NBR         IF_Nbr;
+    CPU_BOOLEAN        IPv4_En;
+    NET_CMD_IPv4_CFG   IPv4Cfg;
+    CPU_BOOLEAN        IPv6_En;
+    NET_CMD_IPv6_CFG   IPv6Cfg;
+} NET_CMD_ROUTE_ARG;
+
+
+
+typedef struct net_cmd_mtu_cmd_arg {
+    CPU_CHAR  *IF_NbrPtr;
+    CPU_CHAR  *MTU_Ptr;
+} NET_CMD_MTU_CMD_ARG;
+
+typedef struct net_cmd_mtu_arg {
+    NET_IF_NBR  IF_Nbr;
+    CPU_INT16U  MTU;
+} NET_CMD_MTU_ARG;
+
+
+
+typedef  struct  net_cmd_sock_open_cmd_arg {
+    CPU_CHAR                 *FamilyPtr;
+    CPU_CHAR                 *TypePtr;
+} NET_CMD_SOCK_OPEN_CMD_ARG;
+
+typedef  struct  net_cmd_sock_open_arg {
+    NET_SOCK_PROTOCOL_FAMILY  Family;
+    NET_SOCK_TYPE             Type;
+} NET_CMD_SOCK_OPEN_ARG;
+
+
+
+typedef  struct  net_cmd_sock_id_cmd_arg {
+    CPU_CHAR                 *SockIDPtr;
+} NET_CMD_SOCK_ID_CMD_ARG;
+
+typedef  struct  net_cmd_sock_id_arg {
+    NET_SOCK_ID              SockID;
+} NET_CMD_SOCK_ID_ARG;
+
+
+
+typedef  struct  net_cmd_sock_bind_cmd_arg {
+    CPU_CHAR                 *SockIDPtr;
+    CPU_CHAR                 *PortPtr;
+    CPU_CHAR                 *FamilyPtr;
+} NET_CMD_SOCK_BIND_CMD_ARG;
+
+
+typedef  struct  net_cmd_sock_bind_arg {
+    NET_SOCK_ID               SockID;
+    NET_PORT_NBR              Port;
+    NET_SOCK_PROTOCOL_FAMILY  Family;
+} NET_CMD_SOCK_BIND_ARG;
+
+
+
+typedef  struct  net_cmd_sock_listen_cmd_arg {
+    CPU_CHAR                 *SockIDPtr;
+    CPU_CHAR                 *QueueSizePtr;
+} NET_CMD_SOCK_LISTEN_CMD_ARG;
+
+typedef  struct  net_cmd_sock_listen_arg {
+    NET_SOCK_ID               SockID;
+    CPU_INT16U                QueueSize;
+} NET_CMD_SOCK_LISTEN_ARG;
+
+
+
+typedef  struct  net_cmd_sock_conn_cmd_arg {
+    CPU_CHAR                 *SockIDPtr;
+    CPU_CHAR                 *AddrPtr;
+    CPU_CHAR                 *PortPtr;
+} NET_CMD_SOCK_CONN_CMD_ARG;
+
+typedef  struct  net_cmd_sock_conn_arg {
+    NET_SOCK_ID               SockID;
+    NET_PORT_NBR              Port;
+    CPU_INT08U                Addr[NET_IP_MAX_ADDR_SIZE];
+    CPU_INT08U                AddrLen;
+} NET_CMD_SOCK_CONN_ARG;
+
+
+
+typedef  struct  net_cmd_sock_rx_cmd_arg {
+    CPU_CHAR                 *SockIDPtr;
+    CPU_CHAR                 *DataLenPtr;
+    CPU_CHAR                 *OutputFmtPtr;
+} NET_CMD_SOCK_RX_CMD_ARG;
+
+typedef  struct  net_cmd_sock_rx_arg {
+    NET_SOCK_ID               SockID;
+    CPU_INT16U                DataLen;
+    NET_CMD_OUTPUT_FMT        OutputFmt;
+} NET_CMD_SOCK_RX_ARG;
+
+
+
+typedef  struct  net_cmd_sock_tx_cmd_arg {
+    CPU_CHAR                 *SockIDPtr;
+    CPU_CHAR                 *DataLenPtr;
+    CPU_CHAR                 *DataPtr;
+} NET_CMD_SOCK_TX_CMD_ARG;
+
+typedef  struct  net_cmd_sock_tx_arg {
+    NET_SOCK_ID               SockID;
+    CPU_INT16U                DataLen;
+    CPU_INT08U               *DataPtr;
+} NET_CMD_SOCK_TX_ARG;
+
+
+
+typedef  struct  net_cmd_sock_sel_cmd_arg {
+    CPU_CHAR                 *RdListPtr;
+    CPU_CHAR                 *WrListPtr;
+    CPU_CHAR                 *ErrListPtr;
+    CPU_CHAR                 *Timeout_sec_Ptr;
+} NET_CMD_SOCK_SEL_CMD_ARG;
+
+typedef  struct  net_cmd_sock_sel_arg {
+    CPU_INT16S                SockNbrMax;
+    NET_SOCK_DESC             DescRd;
+    NET_SOCK_DESC             DescWr;
+    NET_SOCK_DESC             DescErr;
+    NET_SOCK_TIMEOUT          Timeout;
+} NET_CMD_SOCK_SEL_ARG;
+
+
+typedef  struct  net_cmd_sock_opt_cmd_arg {
+    CPU_CHAR                 *SockIDPtr;
+    CPU_CHAR                 *ValPtr;
+} NET_CMD_SOCK_OPT_CMD_ARG;
+
+typedef  struct  net_cmd_sock_opt_arg {
+    NET_SOCK_ID               SockID;
+    CPU_INT32U                Value;
+} NET_CMD_SOCK_OPT_ARG;
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+static  SHELL_CMD NetCmdTbl[] =
+{
+    {"net_help",         NetCmd_Help},
+    {"net_ifconfig",     NetCmd_IF_Config},
+    {"net_if_reset",     NetCmd_IF_Reset},
+    {"net_if_set_mtu",   NetCmd_IF_SetMTU},
+    {"net_route_add",    NetCmd_IF_RouteAdd},
+    {"net_route_remove", NetCmd_IF_RouteRemove},
+    {"net_ping",         NetCmd_Ping},
+    {"net_if_start",     NetCmd_IF_Start},
+    {"net_if_stop",      NetCmd_IF_Stop},
+
+#ifdef  NET_IPv4_MODULE_EN
+    {"net_ip_setup",     NetCmd_IP_Config},
+#endif
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+    {"net_wifi_scan",    NetCmd_WiFi_Scan},
+    {"net_wifi_join",    NetCmd_WiFi_Join},
+    {"net_wifi_create",  NetCmd_WiFi_Create},
+    {"net_wifi_leave",   NetCmd_WiFi_Leave},
+    {"net_wifi_peer",    NetCmd_WiFi_GetPeerInfo},
+#endif
+
+    {"net_sock_open",          NetCmd_Sock_Open},
+    {"net_sock_close",         NetCmd_Sock_Close},
+    {"net_sock_bind",          NetCmd_Sock_Bind},
+    {"net_sock_listen",        NetCmd_Sock_Listen},
+    {"net_sock_accept",        NetCmd_Sock_Accept},
+    {"net_sock_connect",       NetCmd_Sock_Conn},
+    {"net_sock_rx",            NetCmd_Sock_Rx},
+    {"net_sock_tx",            NetCmd_Sock_Tx},
+    /*{"net_sock_sel",     NetCmd_Sock_Sel},*/
+    {"net_sock_opt_set_child", NetCmd_SockOptSetChild},
+    {0, 0 }
+};
+
+/*
+*********************************************************************************************************
+*                                          NET CMD DICTIONARY
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  NET_CMD_DICTIONARY_KEY;
+
+#define  NET_CMD_DICTIONARY_KEY_INVALID            DEF_INT_32U_MAX_VAL
+
+typedef  struct  net_cmd_dictionary {
+    const  NET_CMD_DICTIONARY_KEY   Key;
+    const  CPU_CHAR                *StrPtr;
+    const  CPU_INT32U               StrLen;
+} NET_CMD_DICTIONARY;
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+
+#define NET_CMD_NET_TYPE_STR_INFRA                 "infra"
+#define NET_CMD_NET_TYPE_STR_ADHOC                 "adhoc"
+#define NET_CMD_NET_TYPE_STR_LEN                   5u
+
+static  const  NET_CMD_DICTIONARY  NetCmd_DictionaryNetType[] = {
+    { NET_IF_WIFI_NET_TYPE_INFRASTRUCTURE,    NET_CMD_NET_TYPE_STR_INFRA,     NET_CMD_NET_TYPE_STR_LEN   },
+    { NET_IF_WIFI_NET_TYPE_ADHOC,             NET_CMD_NET_TYPE_STR_ADHOC,     NET_CMD_NET_TYPE_STR_LEN   },
+};
+
+#define NET_CMD_SECURITY_TYPE_STR_OPEN             "open"
+#define NET_CMD_SECURITY_TYPE_STR_WEP              "wep"
+#define NET_CMD_SECURITY_TYPE_STR_WPA              "wpa"
+#define NET_CMD_SECURITY_TYPE_STR_WPA2             "wpa2"
+#define NET_CMD_SECURITY_TYPE_STR_WPS              "wps"
+
+#define NET_CMD_SECURITY_TYPE_STR_LEN              4u
+
+static  const  NET_CMD_DICTIONARY  NetCmd_DictionarySecurityType[] = {
+    { NET_IF_WIFI_SECURITY_OPEN, NET_CMD_SECURITY_TYPE_STR_OPEN , (sizeof(NET_CMD_SECURITY_TYPE_STR_OPEN) - 1)},
+    { NET_IF_WIFI_SECURITY_WEP,  NET_CMD_SECURITY_TYPE_STR_WEP ,  (sizeof(NET_CMD_SECURITY_TYPE_STR_WEP)  - 1)},
+    { NET_IF_WIFI_SECURITY_WPA2, NET_CMD_SECURITY_TYPE_STR_WPA2,  (sizeof(NET_CMD_SECURITY_TYPE_STR_WPA2) - 1)},
+    { NET_IF_WIFI_SECURITY_WPA,  NET_CMD_SECURITY_TYPE_STR_WPA,   (sizeof(NET_CMD_SECURITY_TYPE_STR_WPA)  - 1)},
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetCmd_InitDone;
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  NET_CMD_RESET_CMD_ARG        NetCmd_ResetCmdArgParse       (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_RESET_ARG            NetCmd_ResetTranslate         (       NET_CMD_RESET_CMD_ARG         cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_MTU_CMD_ARG          NetCmd_MTU_CmdArgParse        (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_MTU_ARG              NetCmd_MTU_Translate          (       NET_CMD_MTU_CMD_ARG           cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_ROUTE_CMD_ARG        NetCmd_RouteCmdArgParse       (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_ROUTE_ARG            NetCmd_RouteTranslate         (       NET_CMD_ROUTE_CMD_ARG         cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  CPU_INT16S                   NetCmd_Ping4                  (       NET_IPv4_ADDR                *p_addr_remote,
+                                                                           void                         *p_data,
+                                                                           CPU_INT16U                    data_len,
+                                                                           CPU_INT32U                    cnt,
+                                                                           SHELL_OUT_FNCT                out_fnct,
+                                                                           SHELL_CMD_PARAM              *p_cmd_param);
+
+static  CPU_INT16S                   NetCmd_Ping6                  (       NET_IPv6_ADDR                *p_addr_remote,
+                                                                           void                         *p_data,
+                                                                           CPU_INT16U                    data_len,
+                                                                           SHELL_OUT_FNCT                out_fnct,
+                                                                           SHELL_CMD_PARAM              *p_cmd_param);
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+static  void                         NetCmd_AutoCfgResult          (       NET_IF_NBR                    if_nbr,
+                                                                    const  NET_IPv6_ADDR                *p_addr_local,
+                                                                    const  NET_IPv6_ADDR                *p_addr_global,
+                                                                           NET_IPv6_AUTO_CFG_STATUS      autocfg_result);
+#endif
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+static  NET_CMD_WIFI_SCAN_ARG        NetCmd_WiFiScanCmdArgParse    (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_WIFI_JOIN_ARG        NetCmd_WiFiJoinCmdArgParse    (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+static  NET_CMD_WIFI_CREATE_ARG      NetCmd_WiFiCreateCmdArgParse  (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+#endif
+
+
+static  NET_CMD_SOCK_OPEN_CMD_ARG    NetCmd_Sock_OpenCmdParse      (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_OPEN_ARG        NetCmd_Sock_OpenCmdTranslate  (       NET_CMD_SOCK_OPEN_CMD_ARG     cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_ID_CMD_ARG      NetCmd_Sock_ID_CmdParse       (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_ID_ARG          NetCmd_Sock_ID_CmdTranslate   (       NET_CMD_SOCK_ID_CMD_ARG       cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_BIND_CMD_ARG    NetCmd_Sock_BindCmdParse      (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_BIND_ARG        NetCmd_Sock_BindCmdTranslate  (       NET_CMD_SOCK_BIND_CMD_ARG     cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+
+static  NET_CMD_SOCK_LISTEN_CMD_ARG  NetCmd_Sock_ListenCmdParse    (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_LISTEN_ARG      NetCmd_Sock_ListenCmdTranslate(       NET_CMD_SOCK_LISTEN_CMD_ARG   cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_CONN_CMD_ARG    NetCmd_Sock_ConnCmdParse      (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_CONN_ARG        NetCmd_Sock_ConnCmdTranslate  (       NET_CMD_SOCK_CONN_CMD_ARG     cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_RX_CMD_ARG      NetCmd_Sock_RxCmdParse        (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_RX_ARG          NetCmd_Sock_RxCmdTranslate    (       NET_CMD_SOCK_RX_CMD_ARG       cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_TX_CMD_ARG      NetCmd_Sock_TxCmdParse        (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_TX_ARG          NetCmd_Sock_TxCmdTranslate    (       NET_CMD_SOCK_TX_CMD_ARG       cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_OPT_CMD_ARG     NetCmd_Sock_OptCmdParse       (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_OPT_ARG         NetCmd_Sock_OptCmdTranslate   (       NET_CMD_SOCK_OPT_CMD_ARG      cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+#if 0
+static  NET_CMD_SOCK_SEL_CMD_ARG     NetCmd_Sock_SelCmdParse       (       CPU_INT16U                    argc,
+                                                                           CPU_CHAR                     *p_argv[],
+                                                                           NET_CMD_ERR                  *p_err);
+
+static  NET_CMD_SOCK_SEL_ARG         NetCmd_Sock_SelCmdTranslate   (       NET_CMD_SOCK_SEL_CMD_ARG      cmd_args,
+                                                                           NET_CMD_ERR                  *p_err);
+
+
+static  NET_SOCK_ID                  NetCmd_Sock_SelGetSockID      (       CPU_CHAR                     *p_str,
+                                                                           CPU_CHAR                     *p_str_next);
+#endif
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+
+static  CPU_INT32U                   NetCmd_DictionaryGet          (const  NET_CMD_DICTIONARY           *p_dictionary_tbl,
+                                                                           CPU_INT32U                    dictionary_size,
+                                                                    const  CPU_CHAR                     *p_str_cmp,
+                                                                           CPU_INT32U                    str_len);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             NetCmd_Init()
+*
+* Description : Add Network commands to uC-Shell.
+*
+* Argument(s) : p_err    is a pointer to an error code which will be returned to your application:
+*
+*                             NET_CMD_ERR_NONE            No error.
+*
+*                             NET_CMD_ERR_SHELL_INIT    Command table not added to uC-Shell
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AppTaskStart().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetCmd_Init (NET_CMD_ERR  *p_err)
+{
+    SHELL_ERR  shell_err;
+
+
+    NetCmd_InitDone = DEF_NO;
+
+    Shell_CmdTblAdd("net", NetCmdTbl, &shell_err);
+
+    if (shell_err == SHELL_ERR_NONE) {
+        *p_err = NET_CMD_ERR_NONE;
+    } else {
+        *p_err = NET_CMD_ERR_SHELL_INIT;
+         return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetCmd_Start()
+*
+* Description : (1) Initialize Network stack and Network command:
+*
+*                   (a) Initialize uC/TCP-IP.
+*                   (b) Add the specified interface.
+*                   (c) Configure the interface following command argument (IP addresses, MAC address, MTU, etc.).
+*                   (d) Start the interface.
+*
+* Argument(s) : p_if_api    Pointer to specific network interface API.
+*
+*               p_dev_api   Pointer to specific network device driver API.
+*
+*               p_dev_bsp   Pointer to specific network device board-specific API.
+*
+*               p_dev_cfg   Pointer to specific network device hardware configuration.
+*
+*               p_ext_api   Pointer to specific network extension layer API
+*
+*               p_ext_cfg   Pointer to specific network extension layer configuration
+*
+*               p_test_arg  Pointer to configuration arguments.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetCmd_Start (NET_TASK_CFG   *p_rx_task_cfg,
+                    NET_TASK_CFG   *p_tx_task_cfg,
+                    NET_TASK_CFG   *p_tmr_task_cfg,
+                    void           *p_if_api,
+                    void           *p_dev_api,
+                    void           *p_dev_bsp,
+                    void           *p_dev_cfg,
+                    void           *p_ext_api,
+                    void           *p_ext_cfg,
+                    NET_CMD_ARGS   *p_cmd_args,
+                    NET_CMD_ERR    *p_err)
+{
+    NET_IF_NBR          if_nbr;
+    CPU_BOOLEAN         link_status;
+    NET_ERR             err;
+#ifdef  NET_IF_ETHER_MODULE_EN
+    NET_DEV_CFG_ETHER  *p_ether_dev_cfg;
+#endif
+
+
+    err = Net_Init(p_rx_task_cfg,                               /* Init uC/TCP-IP.                                      */
+                   p_tx_task_cfg,
+                   p_tmr_task_cfg);
+
+    if (err != NET_ERR_NONE) {
+       *p_err = NET_CMD_ERR_TCPIP_INIT;
+        return;
+    }
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+    if (p_cmd_args->WindowsIF_Nbr != 0) {
+
+        p_ether_dev_cfg           = (NET_DEV_CFG_ETHER *)p_dev_cfg;
+        p_ether_dev_cfg->BaseAddr = p_cmd_args->WindowsIF_Nbr;
+    }
+#endif
+
+    if_nbr  = NetIF_Add(p_if_api,                               /* Ethernet  interface API.                         */
+                        p_dev_api,                              /* Device API.                                      */
+                        p_dev_bsp,                              /* Device BSP.                                      */
+                        p_dev_cfg,                              /* Device configuration.                            */
+                        p_ext_api,                              /* No Phy API.                                      */
+                        p_ext_cfg,                              /* No PHY configuration.                            */
+                       &err);
+    if (err != NET_IF_ERR_NONE) {
+       *p_err = NET_CMD_ERR_TCPIP_IF_ADD;
+        return;
+    }
+
+    if (p_cmd_args->MAC_CfgEn == DEF_YES) {
+        NetIF_AddrHW_Set(if_nbr, &p_cmd_args->MAC_Addr.MAC_Addr[0], sizeof(p_cmd_args->MAC_Addr), &err);
+        if (err != NET_IF_ERR_NONE) {
+            *p_err = NET_CMD_ERR_TCPIP_MAC_CFG;
+             return;
+        }
+    }
+
+
+    NetIF_Start(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+       *p_err = NET_CMD_ERR_TCPIP_IF_START;
+        return;
+    }
+
+    link_status = NetIF_LinkStateWaitUntilUp(if_nbr, 3, 1000, &err);
+    if (link_status == NET_IF_LINK_DOWN) {
+       *p_err = NET_CMD_ERR_LINK_DOWN;
+        return;
+    }
+
+#ifdef  NET_IPv4_MODULE_EN
+    if (p_cmd_args->IPv4_CfgEn == DEF_YES) {
+        NetCmd_IF_IPv4AddrCfgStatic(if_nbr, &p_cmd_args->IPv4, p_err);
+    }
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    if (p_cmd_args->IPv6_CfgEn == DEF_YES) {
+        NetCmd_IF_IPv6AddrCfgStatic(if_nbr, &p_cmd_args->IPv6, p_err);
+    }
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    NetIPv6_AddrAutoCfgHookSet(if_nbr, &NetCmd_AutoCfgResult, &err); /* Ignore error.                                   */
+    /* NetIPv6_AddrAutoCfgEn(if_nbr, DEF_YES, &err); */
+#endif
+
+#endif
+
+    *p_err = NET_CMD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             NetCmd_Help()
+*
+* Description : Command function to print out Net Commands help.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S NetCmd_Help (CPU_INT16U        argc,
+                        CPU_CHAR         *p_argv[],
+                        SHELL_OUT_FNCT    out_fnct,
+                        SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S  ret_val;
+
+
+    ret_val = NetCmd_OutputCmdTbl(NetCmdTbl, out_fnct, p_cmd_param);
+
+    (void)&argc;
+    (void)&p_argv;
+
+    return (ret_val);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_IF_Config()
+*
+* Description : Command function to print out interfaces information.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S NetCmd_IF_Config (CPU_INT16U        argc,
+                             CPU_CHAR         *p_argv[],
+                             SHELL_OUT_FNCT    out_fnct,
+                             SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT08U         if_nbr;
+    CPU_INT08U         addr_ix;
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_IF_CFG   *p_ipv4_if_cfg;
+    NET_IPv4_ADDRS    *p_addrs_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_IF_CFG   *p_ipv6_if_cfg;
+    NET_IPv6_ADDRS    *p_addrs_ipv6;
+#endif
+    CPU_CHAR           addr_ip_str[NET_ASCII_LEN_MAX_ADDR_IP];
+    CPU_CHAR           str_output[DEF_INT_32U_NBR_DIG_MAX + 1];
+    CPU_INT16S         ret_val;
+    NET_ERR            err_net;
+
+
+    if (argc > 1) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    for (if_nbr = 1; if_nbr <= NET_IF_CFG_MAX_NBR_IF; if_nbr++) {
+
+        ret_val = NetCmd_OutputMsg("Interface ID : ", DEF_YES, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+        (void)Str_FmtNbr_Int32U(if_nbr,
+                                DEF_INT_32U_NBR_DIG_MAX,
+                                DEF_NBR_BASE_DEC,
+                                DEF_NULL,
+                                DEF_NO,
+                                DEF_YES,
+                                str_output);
+        ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+
+#ifdef  NET_IPv4_MODULE_EN
+        p_ipv4_if_cfg  = &NetIPv4_IF_CfgTbl[if_nbr];
+        p_addrs_ipv4   =  p_ipv4_if_cfg->AddrsTbl;
+        addr_ix        =  0u;
+        while (addr_ix < p_ipv4_if_cfg->AddrsNbrCfgd) {
+            ret_val = NetCmd_OutputMsg("Host Address : ", DEF_YES, DEF_NO,  DEF_YES, out_fnct, p_cmd_param);
+            NetASCII_IPv4_to_Str(p_addrs_ipv4->AddrHost, addr_ip_str, DEF_NO, &err_net);
+            ret_val = NetCmd_OutputMsg(addr_ip_str, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+            ret_val = NetCmd_OutputMsg("Mask         : ", DEF_YES, DEF_NO,  DEF_YES, out_fnct, p_cmd_param);
+            NetASCII_IPv4_to_Str(p_addrs_ipv4->AddrHostSubnetMask, addr_ip_str, DEF_NO, &err_net);
+            ret_val = NetCmd_OutputMsg(addr_ip_str, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+            ret_val = NetCmd_OutputMsg("Gateway      : ", DEF_YES, DEF_NO,  DEF_YES, out_fnct, p_cmd_param);
+            NetASCII_IPv4_to_Str(p_addrs_ipv4->AddrDfltGateway, addr_ip_str, DEF_NO, &err_net);
+            ret_val = NetCmd_OutputMsg(addr_ip_str, DEF_NO, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+
+            p_addrs_ipv4++;
+            addr_ix++;
+        }
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        p_ipv6_if_cfg  = NetIPv6_GetIF_CfgObj(if_nbr, &err_net);
+        p_addrs_ipv6   = p_ipv6_if_cfg->AddrsTbl;
+        addr_ix        = 0u;
+
+        while (addr_ix < p_ipv6_if_cfg->AddrsNbrCfgd) {
+            ret_val = NetCmd_OutputMsg("Host Address : ", DEF_YES, DEF_NO,  DEF_YES, out_fnct, p_cmd_param);
+            NetASCII_IPv6_to_Str(&p_addrs_ipv6->AddrHost, addr_ip_str, DEF_NO, DEF_NO, &err_net);
+            ret_val = NetCmd_OutputMsg(addr_ip_str, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+            ret_val = NetCmd_OutputMsg("%", DEF_NO, DEF_NO,  DEF_NO, out_fnct, p_cmd_param);
+            (void)Str_FmtNbr_Int32U(p_addrs_ipv6->AddrHostPrefixLen,
+                                    DEF_INT_32U_NBR_DIG_MAX,
+                                    DEF_NBR_BASE_DEC,
+                                    DEF_NULL,
+                                    DEF_NO,
+                                    DEF_YES,
+                                    str_output);
+            ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+
+            p_addrs_ipv6++;
+            addr_ix++;
+        }
+#endif
+    }
+
+    ret_val = NetCmd_OutputMsg(" ", DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+
+    (void)&p_argv;
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetCmd_IF_Reset()
+*
+* Description : Command function to reset interface(s) : remove all configured addresses, IPv4 or IPv6 or both,
+*               on specified interface. If no interface is specified, all existing interfaces will be reset.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments. (see Note #1)
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : (1) This function takes as arguments :
+*                       -i if_nbr     Specified on which interface the reset will occur.
+*                       -4            Specified to clear only the IPv4 addresses of the interface.
+*                       -6            Specified to clear only the IPv6 addresses of the interface.
+*
+*                   If no arguments are passed, the function will reset all interfaces and both IPv4 and IPv6
+*                   addresses.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_IF_Reset (CPU_INT16U                argc,
+                             CPU_CHAR                 *p_argv[],
+                             SHELL_OUT_FNCT            out_fnct,
+                             SHELL_CMD_PARAM          *p_cmd_param)
+{
+    CPU_INT08U             if_nbr;
+    CPU_INT16S             ret_val;
+    CPU_BOOLEAN            result;
+    NET_CMD_RESET_CMD_ARG  cmd_args;
+    NET_CMD_RESET_ARG      args;
+    NET_CMD_ERR            err;
+    NET_ERR                err_net;
+
+
+    cmd_args = NetCmd_ResetCmdArgParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    args = NetCmd_ResetTranslate(cmd_args, &err);
+
+#ifdef  NET_IPv4_MODULE_EN
+    if (args.IPv4_En == DEF_YES) {
+        if (args.IF_Nbr != NET_IF_NBR_NONE) {
+            result = NetIPv4_CfgAddrRemoveAll(args.IF_Nbr, &err_net);
+        } else {
+            for (if_nbr = 1; if_nbr <= NET_IF_CFG_MAX_NBR_IF; if_nbr++) {
+                result = NetIPv4_CfgAddrRemoveAll(if_nbr, &err_net);
+                if (result != DEF_OK) {
+                    break;
+                }
+            }
+        }
+        if (result != DEF_OK) {
+            ret_val = NetCmd_OutputError("Failed to reset Interface for IPv4", out_fnct, p_cmd_param);
+            return (ret_val);
+        } else {
+            ret_val = NetCmd_OutputMsg("Reset Interface for IPv4", DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+        }
+
+    }
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    if (args.IPv6_En == DEF_YES) {
+        if (args.IF_Nbr != NET_IF_NBR_NONE) {
+            result = NetIPv6_CfgAddrRemoveAll(args.IF_Nbr, &err_net);
+        } else {
+            for (if_nbr = 1; if_nbr <= NET_IF_CFG_MAX_NBR_IF; if_nbr++) {
+                result = NetIPv6_CfgAddrRemoveAll(if_nbr, &err_net);
+                if (result != DEF_OK) {
+                    break;
+                }
+            }
+        }
+        if (result != DEF_OK) {
+            ret_val = NetCmd_OutputError("Failed to reset Interface for IPv6", out_fnct, p_cmd_param);
+            return (ret_val);
+        } else {
+            ret_val = NetCmd_OutputMsg("Reset Interface for IPv6", DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+        }
+    }
+#endif
+
+    ret_val = NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+    return (ret_val);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_IF_SetMTU()
+*
+* Description : Command function to configure MTU of given Interface.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments. (see Note #1)
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : (1) This function takes as arguments :
+*                       -i if_nbr     Specified on which interface the reset will occur.
+*                       -M mtu        Specified the new MTU to configure.
+*********************************************************************************************************
+*/
+
+CPU_INT16S   NetCmd_IF_SetMTU (CPU_INT16U        argc,
+                               CPU_CHAR         *p_argv[],
+                               SHELL_OUT_FNCT    out_fnct,
+                               SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_MTU_CMD_ARG  cmd_args;
+    NET_CMD_MTU_ARG      args;
+    CPU_INT16S           ret_val;
+    NET_CMD_ERR          err;
+    NET_ERR              net_err;
+
+
+    ret_val    = 0u;
+
+    cmd_args = NetCmd_MTU_CmdArgParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    args = NetCmd_MTU_Translate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    NetIF_MTU_Set (args.IF_Nbr,
+                   args.MTU,
+                  &net_err);
+    if (net_err != NET_IF_ERR_NONE) {
+        ret_val = NetCmd_OutputError("Failed to configure Interface MTU", out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    ret_val = NetCmd_OutputMsg("Configured Interface MTU", DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+
+    ret_val = NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetCmd_IF_RouteAdd()
+*
+* Description : Command function to add IP address route.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S NetCmd_IF_RouteAdd (CPU_INT16U        argc,
+                               CPU_CHAR         *p_argv[],
+                               SHELL_OUT_FNCT    out_fnct,
+                               SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_ROUTE_CMD_ARG  cmd_args;
+    NET_CMD_ROUTE_ARG      args;
+    CPU_INT16S             ret_val;
+    CPU_BOOLEAN            addr_added;
+    NET_CMD_ERR            err;
+
+
+    ret_val    = 0u;
+    addr_added = DEF_NO;
+
+
+    if (argc < 6) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+
+    cmd_args = NetCmd_RouteCmdArgParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    args = NetCmd_RouteTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    if (args.IF_Nbr == NET_IF_NBR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+#ifdef  NET_IPv4_MODULE_EN
+    if (args.IPv4_En == DEF_YES) {
+        NetCmd_IF_IPv4AddrCfgStatic(args.IF_Nbr, &args.IPv4Cfg, &err);
+        if (err != NET_CMD_ERR_NONE) {
+            ret_val  = NetCmd_OutputError("Failed to configure IPv4 static address", out_fnct, p_cmd_param);
+            ret_val += NetCmd_OutputErrorNetNbr((NET_ERR)err, out_fnct,p_cmd_param);
+            return (ret_val);
+        }
+        ret_val    = NetCmd_OutputMsg("Added IPv4 static address", DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+        addr_added = DEF_YES;
+    }
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    if (args.IPv6_En == DEF_YES) {
+        NetCmd_IF_IPv6AddrCfgStatic(args.IF_Nbr, &args.IPv6Cfg, &err);
+        if (err != NET_CMD_ERR_NONE) {
+            ret_val  = NetCmd_OutputError("Failed to configure IPv6 static address", out_fnct, p_cmd_param);
+            ret_val += NetCmd_OutputErrorNetNbr((NET_ERR)err, out_fnct, p_cmd_param);
+            return (ret_val);
+        }
+        ret_val    = NetCmd_OutputMsg("Added IPv6 static address", DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+        addr_added = DEF_YES;
+    }
+#endif
+
+    if (addr_added == DEF_NO) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+
+    ret_val = NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetCmd_IF_RouteRemove()
+*
+* Description : Command function to remove a route (previously added using NetCmd_IF_RouteAdd()).
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S NetCmd_IF_RouteRemove (CPU_INT16U        argc,
+                                  CPU_CHAR         *p_argv[],
+                                  SHELL_OUT_FNCT    out_fnct,
+                                  SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_ROUTE_CMD_ARG  cmd_args;
+    NET_CMD_ROUTE_ARG      args;
+    CPU_INT16S             ret_val;
+    CPU_BOOLEAN            addr_removed;
+    NET_CMD_ERR            err;
+
+
+    ret_val      = 0u;
+    addr_removed = DEF_NO;
+
+
+    cmd_args = NetCmd_RouteCmdArgParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    args = NetCmd_RouteTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    if (args.IF_Nbr == NET_IF_NBR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+#ifdef  NET_IPv4_MODULE_EN
+    if (args.IPv4_En == DEF_YES) {
+        NetCmd_IF_IPv4AddrRemove(args.IF_Nbr, &args.IPv4Cfg, &err);
+        if (err != NET_CMD_ERR_NONE) {
+            ret_val = NetCmd_OutputError("Failed to remove IPv4 static address", out_fnct, p_cmd_param);
+            return (ret_val);
+        }
+        ret_val    = NetCmd_OutputMsg("Removed IPv4 static address", DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+        addr_removed = DEF_YES;
+    }
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    if (args.IPv6_En == DEF_YES) {
+        NetCmd_IF_IPv6AddrRemove(args.IF_Nbr, &args.IPv6Cfg, &err);
+        if (err != NET_CMD_ERR_NONE) {
+            ret_val = NetCmd_OutputError("Failed to remove IPv6 static address", out_fnct, p_cmd_param);
+            return (ret_val);
+        }
+        ret_val      = NetCmd_OutputMsg("Removed IPv6 static address", DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+        addr_removed = DEF_YES;
+    }
+#endif
+
+    if (addr_removed == DEF_NO) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+
+    ret_val = NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+    return (ret_val);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_IF_IPv4AddrCfgStatic()
+*
+* Description : Add a static IPv4 address on an interface.
+*
+* Argument(s) : if_id       Network interface number.
+*
+*               p_ip_cfg    Pointer to IPv4 address configuration structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*               NetCmd_IF_RouteAdd(),
+*               NetCmd_IP_Config(),
+*               NetCmd_Start().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+void  NetCmd_IF_IPv4AddrCfgStatic (NET_IF_NBR         if_id,
+                                   NET_CMD_IPv4_CFG  *p_ip_cfg,
+                                   NET_CMD_ERR       *p_err)
+{
+    NET_ERR  err;
+
+
+    (void)NetIPv4_CfgAddrAdd(if_id,
+                             p_ip_cfg->Host,
+                             p_ip_cfg->Mask,
+                             p_ip_cfg->Gateway,
+                            &err);
+    switch (err) {
+        case NET_IPv4_ERR_NONE:
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+            *p_err = NET_CMD_ERR_IF_INVALID;
+             return;
+
+
+        case NET_IPv4_ERR_ADDR_TBL_FULL:
+            *p_err = NET_CMD_ERR_IPv4_ADDR_TBL_FULL;
+             return;
+
+
+        case NET_IPv4_ERR_ADDR_CFG_STATE:
+            *p_err = NET_CMD_ERR_IPv4_ADDR_CFGD;
+             return;
+
+
+        case NET_IPv4_ERR_ADDR_CFG_IN_USE:
+            *p_err = NET_CMD_ERR_IPv4_ADDR_IN_USE;
+             return;
+
+
+        case NET_IPv4_ERR_INVALID_ADDR_HOST:
+        case NET_IPv4_ERR_INVALID_ADDR_GATEWAY:
+            *p_err = NET_CMD_ERR_IPv4_ADDR_INVALID;
+             return;
+
+
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_ERR_FAULT_LOCK_ACQUIRE:
+        default:
+            *p_err = NET_CMD_ERR_FAULT;
+             return;
+    }
+
+
+    *p_err = NET_CMD_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_IF_IPv6AddrCfgStatic()
+*
+* Description : Add a static IPv6 address on an interface.
+*
+* Argument(s) : if_id       Network interface number.
+*
+*               p_ip_cfg    Pointer to IPv6 address configuration structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application,
+*               NetCmd_IF_RouteAdd(),
+*               NetCmd_Start().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+void  NetCmd_IF_IPv6AddrCfgStatic (NET_IF_NBR          if_id,
+                                   NET_CMD_IPv6_CFG  *p_ip_cfg,
+                                   NET_CMD_ERR       *p_err)
+{
+    NET_IPv6_ADDR  prefix;
+    NET_FLAGS      ipv6_flags;
+    NET_ERR        err;
+
+
+    NetIPv6_AddrMaskByPrefixLen(&p_ip_cfg->Host, p_ip_cfg->PrefixLen, &prefix, &err);
+
+#ifdef  NET_NDP_MODULE_EN
+    NetNDP_PrefixAddCfg(if_id, &prefix, p_ip_cfg->PrefixLen, DEF_NO, DEF_NULL, 0, &err);
+#endif
+    ipv6_flags = 0;
+    DEF_BIT_CLR(ipv6_flags, NET_IPv6_FLAG_BLOCK_EN);
+    DEF_BIT_SET(ipv6_flags, NET_IPv6_FLAG_DAD_EN);
+
+    (void)NetIPv6_CfgAddrAdd(if_id,
+                            &p_ip_cfg->Host,
+                             p_ip_cfg->PrefixLen,
+                             ipv6_flags,
+                            &err);
+    switch (err) {
+        case NET_IPv6_ERR_NONE:
+        case NET_ERR_FAULT_FEATURE_DIS:
+        case NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS:
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+            *p_err = NET_CMD_ERR_IF_INVALID;
+             return;
+
+
+        case NET_IPv6_ERR_ADDR_TBL_FULL:
+            *p_err = NET_CMD_ERR_IPv6_ADDR_TBL_FULL;
+             return;
+
+
+        case NET_IPv6_ERR_ADDR_CFG_STATE:
+        case NET_IPv6_ERR_ADDR_CFG_IN_USE:
+            *p_err = NET_CMD_ERR_IPv6_ADDR_CFGD;
+             return;
+
+
+        case NET_IPv6_ERR_INVALID_ADDR_HOST:
+            *p_err = NET_CMD_ERR_IPv6_ADDR_INVALID;
+             return;
+
+
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_ERR_FAULT_LOCK_ACQUIRE:
+        default:
+            *p_err = NET_CMD_ERR_FAULT;
+             return;
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetCmd_IF_IPv4AddrRemove()
+*
+* Description : Remove an IPv4 address.
+*
+* Argument(s) : if_id       Network interface number.
+*
+*               p_ip_cfg    Pointer to IPv4 address configuration structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application,
+*               NetCmd_IF_RouteRemove().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+void  NetCmd_IF_IPv4AddrRemove (NET_IF_NBR          if_id,
+                                NET_CMD_IPv4_CFG  *p_ip_cfg,
+                                NET_CMD_ERR       *p_err)
+{
+    NET_ERR  err;
+
+
+    (void)NetIPv4_CfgAddrRemove(if_id,
+                                p_ip_cfg->Host,
+                               &err);
+
+    switch (err) {
+    case NET_IPv4_ERR_NONE:
+         break;
+
+    case NET_IF_ERR_INVALID_IF:
+        *p_err = NET_CMD_ERR_IF_INVALID;
+         return;
+
+    case NET_IPv4_ERR_INVALID_ADDR_HOST:
+        *p_err = NET_CMD_ERR_IPv4_ADDR_INVALID;
+         return;
+
+
+    case NET_IPv4_ERR_ADDR_CFG_STATE:
+        *p_err = NET_CMD_ERR_IPv4_ADDR_CFGD;
+         return;
+
+    case NET_IPv4_ERR_ADDR_TBL_EMPTY:
+        *p_err = NET_CMD_ERR_IPv4_ADDR_TBL_EMPTY;
+         return;
+
+
+    case NET_IPv4_ERR_ADDR_NOT_FOUND:
+        *p_err = NET_CMD_ERR_IPv4_ADDR_NOT_FOUND;
+         return;
+
+
+    case NET_INIT_ERR_NOT_COMPLETED:
+    case NET_ERR_FAULT_LOCK_ACQUIRE:
+    default:
+        *p_err = NET_CMD_ERR_FAULT;
+         return;
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetCmd_IF_IPv6AddrRemove()
+*
+* Description : Remove an IPv6 address.
+*
+* Argument(s) : if_id       Network interface number.
+*
+*               p_ip_cfg    Pointer to IPv6 address configuration structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application,
+*               NetCmd_IF_RouteRemove().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+void  NetCmd_IF_IPv6AddrRemove (NET_IF_NBR          if_id,
+                                NET_CMD_IPv6_CFG  *p_ip_cfg,
+                                NET_CMD_ERR       *p_err)
+{
+    NET_ERR  err;
+
+
+    (void)NetIPv6_CfgAddrRemove(if_id,
+                               &p_ip_cfg->Host,
+                               &err);
+
+    switch (err) {
+    case NET_IPv6_ERR_NONE:
+         break;
+
+    case NET_IF_ERR_INVALID_IF:
+        *p_err = NET_CMD_ERR_IF_INVALID;
+         return;
+
+    case NET_IPv6_ERR_INVALID_ADDR_HOST:
+        *p_err = NET_CMD_ERR_IPv6_ADDR_INVALID;
+         return;
+
+
+    case NET_IPv6_ERR_ADDR_CFG_STATE:
+        *p_err = NET_CMD_ERR_IPv6_ADDR_CFGD;
+         return;
+
+    case NET_IPv6_ERR_ADDR_TBL_EMPTY:
+        *p_err = NET_CMD_ERR_IPv6_ADDR_TBL_EMPTY;
+         return;
+
+
+    case NET_IPv6_ERR_ADDR_NOT_FOUND:
+        *p_err = NET_CMD_ERR_IPv6_ADDR_NOT_FOUND;
+         return;
+
+
+    case NET_INIT_ERR_NOT_COMPLETED:
+    case NET_ERR_FAULT_LOCK_ACQUIRE:
+    default:
+        *p_err = NET_CMD_ERR_FAULT;
+         return;
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                             NetCmd_Ping()
+*
+* Description : Function command to ping another host.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S NetCmd_Ping (CPU_INT16U        argc,
+                        CPU_CHAR         *p_argv[],
+                        SHELL_OUT_FNCT    out_fnct,
+                        SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_CHAR              *p_data;
+    CPU_INT16S             ret_val;
+    NET_CMD_PING_CMD_ARG   cmd_arg;
+    NET_CMD_PING_ARG       args;
+    CPU_INT16U             data_len;
+    CPU_INT32U             cnt;
+    CPU_SIZE_T             octets_reqd;
+    LIB_ERR                err_lib;
+    NET_CMD_ERR            err;
+
+
+    ret_val = 0u;
+    cmd_arg = NetCmd_PingCmdArgParse(argc, p_argv, &err);
+
+    switch (err) {
+        case NET_CMD_ERR_NONE:
+             break;
+
+        case NET_CMD_ERR_CMD_ARG_INVALID:
+        default:
+             ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+             return (ret_val);
+    }
+
+
+    args = NetCmd_PingCmdArgTranslate(&cmd_arg, &err);
+    switch (err) {
+        case NET_CMD_ERR_NONE:
+             break;
+
+        case NET_CMD_ERR_CMD_ARG_INVALID:
+        default:
+             ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+             return (ret_val);
+    }
+
+
+    if (args.DataLen == 0) {
+        data_len = Str_Len(cmd_arg.AddrPtr);
+        p_data   = cmd_arg.AddrPtr;
+    } else {
+        data_len = args.DataLen;
+        p_data   = (CPU_CHAR *) Mem_HeapAlloc (               data_len,
+                                               (CPU_SIZE_T  ) sizeof(void *),
+                                               (CPU_SIZE_T *)&octets_reqd,
+                                                             &err_lib);
+    }
+
+    if (args.Cnt == 0) {
+        cnt = 1u;
+    } else {
+        cnt = args.Cnt;
+    }
+
+
+    switch (args.family) {
+        case NET_IP_ADDR_FAMILY_IPv4:
+             ret_val = NetCmd_Ping4((NET_IPv4_ADDR *)&args.Addr,
+                                                       p_data,
+                                                       data_len,
+                                                       cnt,
+                                                       out_fnct,
+                                                       p_cmd_param);
+             break;
+
+
+        case NET_IP_ADDR_FAMILY_IPv6:
+             ret_val = NetCmd_Ping6((NET_IPv6_ADDR *)&args.Addr,
+                                                       p_data,
+                                                       data_len,
+                                                       out_fnct,
+                                                       p_cmd_param);
+             break;
+
+
+        default:
+            ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+            return (ret_val);
+    }
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_PingCmdArgParse()
+*
+* Description : Parse ping command line.
+*
+* Argument(s) : argc    is a count of the arguments supplied.
+*
+*               p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : Ping arguments parsed.
+*
+* Caller(s)   : NetIxANVL_BkgndPing(),
+*               NetCmd_Ping().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_CMD_PING_CMD_ARG  NetCmd_PingCmdArgParse (CPU_INT16U    argc,
+                                              CPU_CHAR     *p_argv[],
+                                              NET_CMD_ERR  *p_err)
+{
+    NET_CMD_PING_CMD_ARG  cmd_args;
+    CPU_BOOLEAN            dig_hex;
+    CPU_INT16U             i;
+
+
+    cmd_args.IF_NbrPtr  = DEF_NULL;
+    cmd_args.AddrPtr    = DEF_NULL;
+    cmd_args.DataLenPtr = DEF_NULL;
+    cmd_args.CntPtr     = DEF_NULL;
+
+    if (argc > 10) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_IF:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.IF_NbrPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_LEN:
+                     i += NetCmd_ArgsParserParseDataLen(&p_argv[i], &cmd_args.DataLenPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_CNT:
+                     i += NetCmd_ArgsParserParseDataLen(&p_argv[i], &cmd_args.CntPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                default:
+                    *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                     return (cmd_args);
+            }
+
+        } else {
+            dig_hex = ASCII_IS_DIG_HEX(*p_argv[i]);
+            if (dig_hex == DEF_NO) {
+               *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                return (cmd_args);
+            }
+
+            cmd_args.AddrPtr = p_argv[i];
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_PingCmdArgTranslate()
+*
+* Description : Translate ping arguments.
+*
+* Argument(s) : cmd_arg     Pointer to the ping argument to translate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Ping argument converted.
+*
+* Caller(s)   : NetIxANVL_BkgndPing(),
+*               NetCmd_Ping().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_CMD_PING_ARG  NetCmd_PingCmdArgTranslate (NET_CMD_PING_CMD_ARG  *p_cmd_args,
+                                              NET_CMD_ERR           *p_err)
+{
+    NET_CMD_PING_ARG  args;
+    NET_ERR            err;
+
+
+    if (p_cmd_args->IF_NbrPtr != DEF_NULL) {
+        args.IF_Nbr = NetCmd_ArgsParserTranslateID_Nbr(p_cmd_args->IF_NbrPtr, p_err);
+            if (*p_err != NET_CMD_ERR_NONE) {
+                 return (args);
+        }
+    } else {
+        args.IF_Nbr = NET_IF_NBR_NONE;
+    }
+
+    if (p_cmd_args->DataLenPtr != DEF_NULL) {
+        args.DataLen = NetCmd_ArgsParserTranslateDataLen(p_cmd_args->DataLenPtr, p_err);
+        if (*p_err != NET_CMD_ERR_NONE) {
+             return (args);
+        }
+    } else {
+        args.DataLen = 0;
+    }
+
+    if (p_cmd_args->CntPtr != DEF_NULL) {
+        args.Cnt = NetCmd_ArgsParserTranslateDataLen(p_cmd_args->CntPtr, p_err);
+        if (*p_err != NET_CMD_ERR_NONE) {
+             return (args);
+        }
+    } else {
+        args.Cnt = 0;
+    }
+
+
+    args.family = NetASCII_Str_to_IP((void *)p_cmd_args->AddrPtr,
+                                            &args.Addr,
+                                             sizeof(args.Addr),
+                                            &err);
+    switch (err) {
+        case NET_ASCII_ERR_NONE:
+             break;
+
+
+        default:
+            *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+             return (args);
+    }
+
+#if 0
+    args.Background = p_cmd_args->Background;
+#endif
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (args);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_IP_Config()
+*
+* Description : Command function to configure an IPv4 address.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+CPU_INT16S NetCmd_IP_Config (CPU_INT16U        argc,
+                             CPU_CHAR         *p_argv[],
+                             SHELL_OUT_FNCT    out_fnct,
+                             SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_IF_NBR              if_nbr;
+    NET_CMD_IPv4_ASCII_CFG  ip_str_cfg;
+    NET_CMD_IPv4_CFG        ip_cfg;
+    CPU_INT16S              ret_val;
+    CPU_INT32U              arg_ix;
+    NET_CMD_ERR             cmd_err;
+    NET_ERR                 net_err;
+
+
+                                                                /* Initializing address configuration parameters.       */
+    if_nbr                = NET_IF_NBR_NONE;
+    ret_val               = 0u;
+
+    ip_str_cfg.HostPtr    = DEF_NULL;
+    ip_str_cfg.MaskPtr    = DEF_NULL;
+    ip_str_cfg.GatewayPtr = DEF_NULL;
+
+    for (arg_ix = 1; arg_ix < argc; arg_ix++) {
+        if (*p_argv[arg_ix] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[arg_ix] + 1)) {
+                case NET_CMD_ARG_IF:
+                     arg_ix++;
+                     if_nbr = (NET_IF_NBR)Str_ParseNbr_Int32U(p_argv[arg_ix],
+                                                              DEF_NULL,
+                                                              10);
+                     break;
+
+
+                case NET_CMD_ARG_ADDR:
+                     arg_ix++;
+                     ip_str_cfg.HostPtr = p_argv[arg_ix];
+                     break;
+
+
+                case NET_CMD_ARG_MASK:
+                     arg_ix++;
+                     ip_str_cfg.MaskPtr = p_argv[arg_ix];
+                     break;
+
+
+                default:
+                     cmd_err = NET_CMD_ERR_PARSER_ARG_INVALID;
+                     return (0);
+            }
+        }
+    }
+
+    ip_cfg.Host = NetASCII_Str_to_IPv4(ip_str_cfg.HostPtr, &net_err);
+    if (net_err != NET_ASCII_ERR_NONE) {
+        ret_val = NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    ip_cfg.Mask = NetASCII_Str_to_IPv4(ip_str_cfg.MaskPtr, &net_err);
+
+    if (net_err != NET_ASCII_ERR_NONE) {
+        ret_val = NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+        return (ret_val);
+    }
+
+    ip_cfg.Gateway = NET_IPv4_ADDR_NONE;
+
+    NetCmd_IF_IPv4AddrCfgStatic(if_nbr, &ip_cfg, &cmd_err);
+
+    if ((cmd_err == NET_CMD_ERR_NONE) ||
+        (cmd_err == NET_CMD_ERR_IPv4_ADDR_IN_USE)) {
+        ret_val = NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+    } else {
+        ret_val = NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+    }
+
+    return (ret_val);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_IF_Start()
+*
+* Description : Command function to start an Network interface.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S NetCmd_IF_Start (CPU_INT16U        argc,
+                           CPU_CHAR         *p_argv[],
+                           SHELL_OUT_FNCT    out_fnct,
+                           SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S              ret_val;
+    NET_ERR                 net_err;
+    NET_CMD_ERR             cmd_err;
+    NET_IF_NBR              if_nbr;
+    CPU_INT08U              i;
+    CPU_CHAR               *p_if_str;
+
+
+    ret_val = 0u;
+
+     if (argc == 3u) {
+
+        for (i = 1u; i < argc; i++) {
+
+            if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+
+                if (*(p_argv[i] + 1) == NET_CMD_ARG_IF) {
+
+                    i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &p_if_str, &cmd_err);
+
+                    if (cmd_err != NET_CMD_ERR_NONE) {
+                        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+                        return (ret_val);
+                    }
+                    if_nbr = NetCmd_ArgsParserTranslateID_Nbr(p_if_str, &cmd_err);
+                    if (cmd_err != NET_CMD_ERR_NONE) {
+                        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+                        return (ret_val);
+                    }
+                }
+            }
+        }
+
+
+        NetIF_Start(if_nbr, &net_err);
+
+        if (net_err == NET_IF_ERR_NONE) {
+            NetCmd_OutputSuccess(out_fnct,
+                                 p_cmd_param);
+
+        } else if (net_err == NET_IF_ERR_INVALID_STATE) {
+            ret_val = NetCmd_OutputError("The interface is already started.",
+                                            out_fnct,
+                                           p_cmd_param);
+
+        } else {
+            ret_val = NetCmd_OutputError("Interface cannot be started.",
+                                           out_fnct,
+                                           p_cmd_param);
+        }
+
+    } else {
+        ret_val = NetCmd_OutputMsg("Usage: net_if_start [-i interface_nbr]",
+                                  DEF_YES,
+                                  DEF_YES,
+                                  DEF_NO,
+                                  out_fnct,
+                                  p_cmd_param);
+    }
+    return ret_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_IF_Stop()
+*
+* Description : Command function to stop an Network interface.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S NetCmd_IF_Stop (CPU_INT16U        argc,
+                           CPU_CHAR         *p_argv[],
+                           SHELL_OUT_FNCT    out_fnct,
+                           SHELL_CMD_PARAM  *p_cmd_param)
+
+{
+    CPU_INT16S              ret_val;
+    NET_ERR                 net_err;
+    NET_CMD_ERR             cmd_err;
+    NET_IF_NBR              if_nbr;
+    CPU_INT08U              i;
+    CPU_CHAR               *p_if_str;
+
+    ret_val = 0u;
+
+    if (argc == 3u) {
+
+        for (i = 1u; i < argc; i++) {
+
+            if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+
+                if (*(p_argv[i] + 1) == NET_CMD_ARG_IF) {
+
+                    i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &p_if_str, &cmd_err);
+
+                    if (cmd_err != NET_CMD_ERR_NONE) {
+                        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+                        return (ret_val);
+                    }
+                    if_nbr = NetCmd_ArgsParserTranslateID_Nbr(p_if_str, &cmd_err);
+                    if (cmd_err != NET_CMD_ERR_NONE) {
+                        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+                        return (ret_val);
+                    }
+                }
+            }
+        }
+
+        NetIF_Stop(if_nbr, &net_err);
+
+        if (net_err == NET_IF_ERR_NONE) {
+             NetCmd_OutputSuccess(out_fnct,
+                               p_cmd_param);
+        } else if (net_err == NET_IF_ERR_INVALID_STATE) {
+            ret_val = NetCmd_OutputError("The interface is already stopped.",
+                                           out_fnct,
+                                           p_cmd_param);
+        } else {
+            ret_val = NetCmd_OutputError("Interface cannot be stopped.",
+                                         out_fnct,
+                                         p_cmd_param);
+       }
+
+    } else {
+        ret_val = NetCmd_OutputMsg("Usage: net_if_stop [-i interface_nbr]",
+                                   DEF_YES,
+                                   DEF_YES,
+                                   DEF_NO,
+                                   out_fnct,
+                                   p_cmd_param);
+    }
+    return ret_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetCmd_WiFi_Scan()
+*
+* Description : Command function to Scan for available WiFi SSID.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+CPU_INT16S NetCmd_WiFi_Scan (CPU_INT16U        argc,
+                             CPU_CHAR         *p_argv[],
+                             SHELL_OUT_FNCT    out_fnct,
+                             SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S              ret_val;
+    NET_CMD_WIFI_SCAN_ARG   args;
+    NET_CMD_ERR             err;
+    NET_IF_WIFI_AP          ap[30];
+    CPU_INT16U              ctn;
+    CPU_INT16U              i;
+    NET_ERR                 net_err;
+    CPU_CHAR                str_output[NET_IF_WIFI_STR_LEN_MAX_SSID + 1];
+    CPU_INT08U              ssid_len;
+
+
+    ret_val = 0u;
+    if (argc >= 3u) {
+
+        args = NetCmd_WiFiScanCmdArgParse(argc, p_argv, &err);
+        switch (err) {
+            case NET_CMD_ERR_NONE:
+                 break;
+
+            case NET_CMD_ERR_CMD_ARG_INVALID:
+            default:
+                 ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+                 return (ret_val);
+        }
+    } else {
+        ret_val = NetCmd_OutputMsg("Usage: net_wifi_scan wanted_SSID [-i interface_nbr] [-c channel] ",
+                                   DEF_YES,
+                                   DEF_YES,
+                                   DEF_NO,
+                                   out_fnct,
+                                   p_cmd_param);
+       return (ret_val);
+    }
+                                                                /* ------------ SCAN FOR WIRELESS NETWORKS ------------ */
+    ctn = NetIF_WiFi_Scan( args.IF_Nbr,
+                           ap,                                   /* Access point table location.                         */
+                           30,                                   /* Access point table size.                             */
+                          &args.SSID,
+                           args.Ch,
+                          &net_err);
+
+    if (net_err != NET_IF_WIFI_ERR_NONE) {
+          ret_val = NetCmd_OutputError("The Scan has failed.",
+                                        out_fnct,
+                                        p_cmd_param);
+          return (ret_val);
+    }
+
+    ret_val = NetCmd_OutputMsg("Number of Access point found: ", DEF_YES, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+    (void)Str_FmtNbr_Int32U(ctn,
+                            DEF_INT_32U_NBR_DIG_MAX,
+                            DEF_NBR_BASE_DEC,
+                            DEF_NULL,
+                            DEF_NO,
+                            DEF_YES,
+                            str_output);
+
+     ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+
+        if (ctn == 0) {
+            return (ret_val);
+        }
+     ret_val = NetCmd_OutputMsg("    SSID                             BSSID              Ch  Si   Type   Security",
+                                DEF_YES,
+                                DEF_YES,
+                                DEF_NO,
+                                out_fnct,
+                                p_cmd_param);
+     ret_val = NetCmd_OutputMsg(" -------------------------------------------------------------------------------",
+                                DEF_NO,
+                                DEF_YES,
+                                DEF_NO,
+                                out_fnct,
+                                p_cmd_param);
+
+                                                                /* --------- ANALYSE WIRELESS NETWORKS FOUND ---------- */
+
+    for (i = 0u; i < ctn ; i++) {
+
+        (void)Str_FmtNbr_Int32U(i + 1,
+                                2u,
+                                DEF_NBR_BASE_DEC,
+                                ' ',
+                                DEF_NO,
+                                DEF_YES,
+                                str_output);
+        ret_val  = NetCmd_OutputMsg(str_output, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+        ret_val  = NetCmd_OutputMsg("- ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+
+
+        ssid_len = Str_Len(ap[i].SSID.SSID);
+        Mem_Copy(str_output, ap[i].SSID.SSID ,ssid_len);
+        Mem_Set(&str_output[ssid_len],' ',NET_IF_WIFI_STR_LEN_MAX_SSID - ssid_len);
+        str_output[NET_IF_WIFI_STR_LEN_MAX_SSID] = 0u;
+        ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+        ret_val = NetCmd_OutputMsg(" ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+        NetASCII_MAC_to_Str(ap[i].BSSID.BSSID,
+                            str_output,
+                            DEF_YES,
+                            DEF_YES,
+                           &net_err);
+        ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+        ret_val = NetCmd_OutputMsg(", ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+        (void)Str_FmtNbr_Int32U(ap[i].Ch,
+                                2u,
+                                DEF_NBR_BASE_DEC,
+                                ' ',
+                                DEF_NO,
+                                DEF_YES,
+                                str_output);
+        ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+        ret_val = NetCmd_OutputMsg(", -", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+        (void)Str_FmtNbr_Int32U(ap[i].SignalStrength,
+                                2u,
+                                DEF_NBR_BASE_DEC,
+                                ' ',
+                                DEF_NO,
+                                DEF_YES,
+                                str_output);
+        ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+        ret_val = NetCmd_OutputMsg(", ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+
+        if (ap[i].NetType == NET_IF_WIFI_NET_TYPE_INFRASTRUCTURE) {
+            Str_Copy(str_output,"INFRA");
+        } else if (ap[i].NetType == NET_IF_WIFI_NET_TYPE_ADHOC){
+            Str_Copy(str_output,"ADHOC");
+        } else {
+            Str_Copy(str_output,"UNKWN");
+        }
+        ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+        ret_val = NetCmd_OutputMsg(", ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+        switch(ap[i].SecurityType){
+           case NET_IF_WIFI_SECURITY_OPEN:
+                Str_Copy(str_output,"OPEN");
+                break;
+
+           case NET_IF_WIFI_SECURITY_WEP:
+                Str_Copy(str_output,"WEP");
+                 break;
+
+           case NET_IF_WIFI_SECURITY_WPA:
+                Str_Copy(str_output,"WPA");
+                break;
+
+           case NET_IF_WIFI_SECURITY_WPA2:
+                Str_Copy(str_output,"WPA2");
+                break;
+
+           default:
+                Str_Copy(str_output,"UNKNOWN");
+                break;
+        }
+
+        ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+    }
+
+    return ret_val;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetCmd_WiFi_Join()
+*
+* Description : Command function to Join an WiFi Access Point.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+CPU_INT16S NetCmd_WiFi_Join (CPU_INT16U        argc,
+                             CPU_CHAR         *p_argv[],
+                             SHELL_OUT_FNCT    out_fnct,
+                             SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S              ret_val;
+    NET_CMD_WIFI_JOIN_ARG   cmd_args;
+    NET_CMD_ERR             err;
+    NET_ERR                 net_err;
+
+
+    cmd_args = NetCmd_WiFiJoinCmdArgParse (argc, p_argv, &err);
+    switch (err) {
+        case NET_CMD_ERR_NONE:
+             break;
+
+        case NET_CMD_ERR_CMD_ARG_INVALID:
+        default:
+            ret_val = NetCmd_OutputMsg("Usage: net_if_join SSID [-p password] [-i interface_nbr] [-t net_type] [-s security_type]",
+                                        DEF_YES,
+                                        DEF_YES,
+                                        DEF_NO,
+                                        out_fnct,
+                                        p_cmd_param);
+             return (ret_val);
+    }
+
+
+    NetIF_WiFi_Join( cmd_args.IF_Nbr,
+                     cmd_args.NetType,
+                     NET_IF_WIFI_DATA_RATE_AUTO,
+                     cmd_args.SecurityType,
+                     NET_IF_WIFI_PWR_LEVEL_HI,
+                     cmd_args.SSID,
+                     cmd_args.PSK,
+                    &net_err);
+    if (net_err == NET_IF_WIFI_ERR_NONE) {
+         NetCmd_OutputSuccess(out_fnct,
+                              p_cmd_param);
+
+    } else {
+        ret_val = NetCmd_OutputError("Impossible to Join the specified Access Point.",
+                                     out_fnct,
+                                     p_cmd_param);
+    }
+
+    return ret_val;
+}
+#endif
+
+
+
+
+/*
+*********************************************************************************************************
+*                                        NetCmd_WiFi_Create()
+*
+* Description : Command function to Create an WiFi Access point.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+CPU_INT16S NetCmd_WiFi_Create (CPU_INT16U        argc,
+                               CPU_CHAR         *p_argv[],
+                               SHELL_OUT_FNCT    out_fnct,
+                               SHELL_CMD_PARAM  *p_cmd_param)
+{
+
+    CPU_INT16S               ret_val;
+    NET_CMD_WIFI_CREATE_ARG  cmd_args;
+    NET_CMD_ERR              err;
+    NET_ERR                  net_err;
+
+
+    cmd_args = NetCmd_WiFiCreateCmdArgParse (argc, p_argv, &err);
+    switch (err) {
+        case NET_CMD_ERR_NONE:
+             break;
+
+        case NET_CMD_ERR_CMD_ARG_INVALID:
+        default:
+            ret_val = NetCmd_OutputMsg("Usage: net_if_create SSID [-p password] [-c channel] [-i interface_nbr] [-t net_type] [-s security_type]",
+                                        DEF_YES,
+                                        DEF_YES,
+                                        DEF_NO,
+                                        out_fnct,
+                                        p_cmd_param);
+             return (ret_val);
+    }
+
+    NetIF_WiFi_CreateAP( cmd_args.IF_Nbr,
+                       cmd_args.NetType,
+                       NET_IF_WIFI_DATA_RATE_AUTO,
+                       cmd_args.SecurityType,
+                       NET_IF_WIFI_PWR_LEVEL_HI,
+                       cmd_args.Ch,
+                       cmd_args.SSID,
+                       cmd_args.PSK,
+                      &net_err);
+
+    if (net_err == NET_IF_WIFI_ERR_NONE) {
+         NetCmd_OutputSuccess(out_fnct,
+                              p_cmd_param);
+
+    } else {
+        ret_val  = NetCmd_OutputError("Impossible to Create the specified Access Point.",
+                                         out_fnct,
+                                       p_cmd_param);
+        ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+    }
+
+    return ret_val;
+
+}
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                        NetCmd_WiFi_Leave()
+*
+* Description : Command function to Leave an WiFi Access point.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+CPU_INT16S  NetCmd_WiFi_Leave (CPU_INT16U        argc,
+                               CPU_CHAR         *p_argv[],
+                               SHELL_OUT_FNCT    out_fnct,
+                               SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S                  ret_val;
+    CPU_INT16U                  i;
+    CPU_CHAR                   *p_if_str;
+    NET_ERR                     net_err;
+    NET_CMD_ERR                 err;
+    NET_IF_NBR                  if_nbr;
+
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_IF:
+
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &p_if_str, &err);
+                     if (err != NET_CMD_ERR_NONE) {
+                        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+                        return (ret_val);
+                     }
+
+                     if_nbr = NetCmd_ArgsParserTranslateID_Nbr(p_if_str, &err);
+                     if (err != NET_CMD_ERR_NONE) {
+                        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+                        return (ret_val);
+                     }
+                     break;
+            }
+        }
+    }
+
+    NetIF_WiFi_Leave(if_nbr,&net_err);
+    if (net_err == NET_IF_WIFI_ERR_NONE) {
+         NetCmd_OutputSuccess(out_fnct,
+                              p_cmd_param);
+
+    } else {
+        ret_val = NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+    }
+
+    return ret_val;
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_WiFi_GetPeerInfo()
+*
+* Description : Command function to output the peer information when acting as an WiFi Access point.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+CPU_INT16S  NetCmd_WiFi_GetPeerInfo (CPU_INT16U        argc,
+                                     CPU_CHAR         *p_argv[],
+                                     SHELL_OUT_FNCT    out_fnct,
+                                     SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S         ret_val;
+    CPU_INT16U         i;
+    CPU_CHAR          *p_if_str;
+    NET_ERR            net_err;
+    NET_CMD_ERR        err;
+    NET_IF_NBR         if_nbr;
+    NET_IF_WIFI_PEER   buf_peer_info[5];
+    CPU_INT16U         ctn;
+    CPU_CHAR           str_output[32];
+
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_IF:
+
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &p_if_str, &err);
+                     if (err != NET_CMD_ERR_NONE) {
+                        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+                        return (ret_val);
+                     }
+
+                     if_nbr = NetCmd_ArgsParserTranslateID_Nbr(p_if_str, &err);
+                     if (err != NET_CMD_ERR_NONE) {
+                        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+                        return (ret_val);
+                     }
+                     break;
+            }
+        }
+    }
+
+    ctn = NetIF_WiFi_GetPeerInfo( if_nbr,
+                                  buf_peer_info,
+                                  10,
+                                 &net_err);
+    if (net_err == NET_IF_WIFI_ERR_NONE) {
+        (void)Str_FmtNbr_Int32U(ctn,
+                                2u,
+                                DEF_NBR_BASE_DEC,
+                                ' ',
+                                DEF_NO,
+                                DEF_YES,
+                                str_output);
+        ret_val = NetCmd_OutputMsg("Nb of Peer : ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+        ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+        for(i = 0 ; i < ctn; i++) {
+
+           (void)Str_FmtNbr_Int32U(i+1,
+                                   2u,
+                                   DEF_NBR_BASE_DEC,
+                                   ' ',
+                                   DEF_NO,
+                                   DEF_YES,
+                                   str_output);
+            ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+            ret_val = NetCmd_OutputMsg(" - ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+            NetASCII_MAC_to_Str((CPU_INT08U *) buf_peer_info[i].HW_Addr,
+                                               str_output,
+                                               DEF_NO,
+                                               DEF_YES,
+                                             &net_err);
+            ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+        }
+
+    } else {
+        ret_val = NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+    }
+
+    return (ret_val);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_Sock_Open()
+*
+* Description : Open a socket
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_Sock_Open (CPU_INT16U        argc,
+                              CPU_CHAR         *p_argv[],
+                              SHELL_OUT_FNCT    out_fnct,
+                              SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_SOCK_OPEN_CMD_ARG   cmd_args;
+    NET_CMD_SOCK_OPEN_ARG       args;
+    NET_SOCK_ID                 sock_id;
+    CPU_INT16S                  ret_val = 0;
+    NET_CMD_ERR                 err;
+    NET_ERR                     net_err;
+
+
+    NetCmd_OutputBeginning(out_fnct, p_cmd_param);
+
+    cmd_args = NetCmd_Sock_OpenCmdParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val += NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    args = NetCmd_Sock_OpenCmdTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val += NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+
+    sock_id = NetSock_Open(args.Family, args.Type, NET_SOCK_PROTOCOL_DFLT, &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+        ret_val += NetCmd_OutputMsg("Unable to open a socket ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+        goto exit;
+
+    } else {
+
+        ret_val += NetCmd_OutputMsg("Socket opened: ", DEF_YES, DEF_YES, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputSockID(sock_id, out_fnct, p_cmd_param);
+    }
+
+    ret_val += NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+exit:
+    NetCmd_OutputEnd(out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_Sock_Close()
+*
+* Description : Close a socket
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_Sock_Close (CPU_INT16U        argc,
+                               CPU_CHAR         *p_argv[],
+                               SHELL_OUT_FNCT    out_fnct,
+                               SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_SOCK_ID_CMD_ARG  cmd_args;
+    NET_CMD_SOCK_ID_ARG      args;
+    CPU_INT16S               ret_val = 0;
+    NET_CMD_ERR              err;
+    NET_ERR                  net_err;
+
+
+
+    NetCmd_OutputBeginning(out_fnct, p_cmd_param);
+
+    cmd_args = NetCmd_Sock_ID_CmdParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    args = NetCmd_Sock_ID_CmdTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+
+    NetSock_Close(args.SockID, &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+        ret_val  = NetCmd_OutputMsg("Unable to close the socket ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+
+    } else {
+        ret_val  = NetCmd_OutputMsg("Socket Closed", DEF_YES, DEF_YES, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+    }
+
+
+exit:
+    NetCmd_OutputEnd(out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_Sock_Bind()
+*
+* Description : Bind a socket.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_Sock_Bind (CPU_INT16U        argc,
+                              CPU_CHAR         *p_argv[],
+                              SHELL_OUT_FNCT    out_fnct,
+                              SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_SOCK_ADDR               sock_addr;
+    NET_SOCK_ADDR_FAMILY        addr_family;
+    NET_SOCK_ADDR_LEN           sock_addr_len = sizeof(sock_addr);
+    CPU_INT08U                 *p_addr;
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR               addr;
+#endif
+    NET_IP_ADDR_LEN             addr_len;
+    NET_CMD_SOCK_BIND_CMD_ARG   cmd_args;
+    NET_CMD_SOCK_BIND_ARG       args;
+    CPU_INT16S                  ret_val = 0;
+    NET_CMD_ERR                 err;
+    NET_ERR                     net_err;
+
+
+
+    NetCmd_OutputBeginning(out_fnct, p_cmd_param);
+
+    cmd_args = NetCmd_Sock_BindCmdParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    args = NetCmd_Sock_BindCmdTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+
+    switch (args.Family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+             addr_family =  NET_SOCK_ADDR_FAMILY_IP_V4;
+             addr        =  NET_IPv4_ADDR_ANY;
+             p_addr      = (CPU_INT08U *)&addr;
+             addr_len    =  NET_IPv4_ADDR_SIZE;
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+             addr_family =  NET_SOCK_ADDR_FAMILY_IP_V6;
+             p_addr      = (CPU_INT08U *)&NET_IPv6_ADDR_ANY;
+             addr_len    =  NET_IPv6_ADDR_SIZE;
+             break;
+#endif
+
+        default:
+             ret_val += NetCmd_OutputError("Fault", out_fnct, p_cmd_param);
+             goto exit;
+    }
+
+    NetApp_SetSockAddr(&sock_addr,
+                        addr_family,
+                        args.Port,
+                        p_addr,
+                        addr_len,
+                       &net_err);
+    if (net_err != NET_APP_ERR_NONE) {
+        ret_val  = NetCmd_OutputMsg("Unable to set the address ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+
+    NetSock_Bind(args.SockID, &sock_addr, sock_addr_len, &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+        ret_val  = NetCmd_OutputMsg("Unable to Bind the socket ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+        goto exit;
+
+    } else {
+        ret_val  = NetCmd_OutputMsg("Socket Binded", DEF_YES, DEF_YES, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+    }
+
+exit:
+    NetCmd_OutputEnd(out_fnct, p_cmd_param);
+
+    return ret_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetCmd_Sock_Listen()
+*
+* Description : Listen on a socket.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_Sock_Listen (CPU_INT16U        argc,
+                                CPU_CHAR         *p_argv[],
+                                SHELL_OUT_FNCT    out_fnct,
+                                SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_SOCK_LISTEN_CMD_ARG  cmd_args;
+    NET_CMD_SOCK_LISTEN_ARG      args;
+    CPU_INT16S                   ret_val = 0;
+    NET_CMD_ERR                  err;
+    NET_ERR                      net_err;
+
+
+    NetCmd_OutputBeginning(out_fnct, p_cmd_param);
+
+    cmd_args = NetCmd_Sock_ListenCmdParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    args = NetCmd_Sock_ListenCmdTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+    NetSock_Listen(args.SockID, args.QueueSize, &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+        ret_val  = NetCmd_OutputMsg("Unable to listen on the socket ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+
+    } else {
+        ret_val  = NetCmd_OutputMsg("Listening", DEF_YES, DEF_YES, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+    }
+
+
+exit:
+    NetCmd_OutputEnd(out_fnct, p_cmd_param);
+    return ret_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetCmd_Sock_Accept()
+*
+* Description : Accept connection from a socket.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_Sock_Accept (CPU_INT16U        argc,
+                                CPU_CHAR         *p_argv[],
+                                SHELL_OUT_FNCT    out_fnct,
+                                SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_SOCK_ID_CMD_ARG  cmd_args;
+    NET_CMD_SOCK_ID_ARG      args;
+    NET_SOCK_ADDR            sock_addr;
+    NET_SOCK_ADDR_LEN        addr_len;
+    NET_SOCK_ID              sock_id;
+    CPU_INT16S               ret_val = 0;
+    NET_CMD_ERR              err;
+    NET_ERR                  net_err;
+
+
+
+    NetCmd_OutputBeginning(out_fnct, p_cmd_param);
+
+    cmd_args = NetCmd_Sock_ID_CmdParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    args = NetCmd_Sock_ID_CmdTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+    addr_len = sizeof(sock_addr);
+    sock_id = NetSock_Accept(args.SockID, &sock_addr, &addr_len, &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+        ret_val  = NetCmd_OutputMsg("Unable to accept connection ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+        goto exit;
+
+    } else {
+        ret_val  = NetCmd_OutputMsg("Connection accepted: ", DEF_YES, DEF_YES, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputSockID(sock_id, out_fnct, p_cmd_param);
+    }
+
+    ret_val += NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+exit:
+    NetCmd_OutputEnd(out_fnct, p_cmd_param);
+    return ret_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_Sock_Conn()
+*
+* Description : Connect a socket.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_Sock_Conn (CPU_INT16U        argc,
+                              CPU_CHAR         *p_argv[],
+                              SHELL_OUT_FNCT    out_fnct,
+                              SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_SOCK_CONN_CMD_ARG  cmd_args;
+    NET_CMD_SOCK_CONN_ARG      args;
+    NET_SOCK_ADDR              sock_addr;
+    NET_SOCK_ADDR_FAMILY       addr_family;
+    CPU_INT16S                 ret_val = 0;
+    NET_CMD_ERR                err;
+    NET_ERR                    net_err;
+
+
+
+    NetCmd_OutputBeginning(out_fnct, p_cmd_param);
+
+    cmd_args = NetCmd_Sock_ConnCmdParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    args = NetCmd_Sock_ConnCmdTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+
+    switch (args.AddrLen) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_IPv4_ADDR_SIZE:
+             addr_family =  NET_SOCK_ADDR_FAMILY_IP_V4;
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_IPv6_ADDR_SIZE:
+             addr_family =  NET_SOCK_ADDR_FAMILY_IP_V6;
+             break;
+#endif
+
+        default:
+             ret_val += NetCmd_OutputError("Fault", out_fnct, p_cmd_param);
+             goto exit;
+    }
+
+    NetApp_SetSockAddr(&sock_addr,
+                        addr_family,
+                        args.Port,
+          (CPU_INT08U *)args.Addr,
+                        args.AddrLen,
+                       &net_err);
+    if (net_err != NET_APP_ERR_NONE) {
+        ret_val  = NetCmd_OutputMsg("Unable to set the address ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+    NetSock_Conn(args.SockID, &sock_addr, sizeof(sock_addr), &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+        ret_val  = NetCmd_OutputMsg("Unable to accept connection ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+        ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+        goto exit;
+
+    } else {
+        ret_val  = NetCmd_OutputMsg("Connected", DEF_YES, DEF_YES, DEF_YES, out_fnct, p_cmd_param);
+    }
+
+    ret_val += NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+exit:
+    NetCmd_OutputEnd(out_fnct, p_cmd_param);
+    return ret_val;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                           NetCmd_Sock_Rx()
+*
+* Description : Receive from a socket.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_Sock_Rx (CPU_INT16U        argc,
+                            CPU_CHAR         *p_argv[],
+                            SHELL_OUT_FNCT    out_fnct,
+                            SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_SOCK_RX_CMD_ARG  cmd_args;
+    NET_CMD_SOCK_RX_ARG      args;
+    CPU_INT08U               rx_buf[1472];
+    CPU_INT16U               rx_len     = 1472u;
+    CPU_INT16U               rx_len_tot = 0u;
+    CPU_INT16S               ret_val    = 0;
+    NET_CMD_ERR              err;
+    NET_ERR                  net_err;
+
+
+    NetCmd_OutputBeginning(out_fnct, p_cmd_param);
+
+    cmd_args = NetCmd_Sock_RxCmdParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    args = NetCmd_Sock_RxCmdTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+
+    while (rx_len_tot < args.DataLen) {
+        CPU_INT16U  len_rem = args.DataLen - rx_len_tot;
+        CPU_INT32S  len     = 0;
+
+
+        if (len_rem > 1472u) {
+            rx_len = 1472u;
+        } else {
+            rx_len = len_rem;
+        }
+
+        len = NetSock_RxData(args.SockID, rx_buf, rx_len, NET_SOCK_FLAG_NONE, &net_err);
+        switch (net_err) {
+            case NET_SOCK_ERR_NONE:
+                 ret_val    += NetCmd_OutputData(rx_buf, len, args.OutputFmt, out_fnct, p_cmd_param);
+                 rx_len_tot += len;
+                 break;
+
+            case NET_SOCK_ERR_RX_Q_EMPTY:
+                 KAL_Dly(1);
+                 break;
+
+            default:
+                ret_val  = NetCmd_OutputMsg("Receive error ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+                ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+                goto exit;
+        }
+    }
+
+
+    NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+exit:
+    NetCmd_OutputEnd(out_fnct, p_cmd_param);
+    return (ret_val);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                           NetCmd_Sock_Tx()
+*
+* Description : Transmit on a socket.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_Sock_Tx (CPU_INT16U        argc,
+                            CPU_CHAR         *p_argv[],
+                            SHELL_OUT_FNCT    out_fnct,
+                            SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_SOCK_TX_CMD_ARG  cmd_args;
+    NET_CMD_SOCK_TX_ARG      args;
+    CPU_INT16U               tx_len_tot = 0u;
+    CPU_INT16S               ret_val    = 0;
+    NET_CMD_ERR              err;
+    NET_ERR                  net_err;
+
+
+    NetCmd_OutputBeginning(out_fnct, p_cmd_param);
+
+    cmd_args = NetCmd_Sock_TxCmdParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    args = NetCmd_Sock_TxCmdTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+
+    while (tx_len_tot < args.DataLen) {
+        CPU_INT16U   len_rem = args.DataLen - tx_len_tot;
+        CPU_INT08U  *p_data  = args.DataPtr + tx_len_tot;
+
+
+
+        tx_len_tot += NetSock_TxData(args.SockID, p_data, len_rem, NET_SOCK_FLAG_NONE, &net_err);
+        switch (net_err) {
+            case NET_SOCK_ERR_NONE:
+                 break;
+
+            case NET_SOCK_ERR_RX_Q_EMPTY:
+                 KAL_Dly(1);
+                 break;
+
+            default:
+                ret_val  = NetCmd_OutputMsg("Receive error ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+                ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+                goto exit;
+        }
+    }
+
+    ret_val += NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+exit:
+    NetCmd_OutputEnd(out_fnct, p_cmd_param);
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetCmd_Sock_Sel()
+*
+* Description : Do a select on many socket.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : Shell.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if 0
+CPU_INT16S  NetCmd_Sock_Sel (CPU_INT16U        argc,
+                             CPU_CHAR         *p_argv[],
+                             SHELL_OUT_FNCT    out_fnct,
+                             SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_SOCK_SEL_CMD_ARG  cmd_args;
+    NET_CMD_SOCK_SEL_ARG      args;
+    CPU_INT16S                ret_val = 0;
+    CPU_INT16S                sock_ready_ctr;
+    CPU_INT16U                i;
+    NET_CMD_ERR               err;
+    NET_ERR                   net_err;
+
+
+    NetCmd_OutputBeginning(out_fnct, p_cmd_param);
+
+    cmd_args = NetCmd_Sock_SelCmdParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    args = NetCmd_Sock_SelCmdTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+
+    sock_ready_ctr = NetSock_Sel(args.SockNbrMax, &args.DescRd, &args.DescWr, &args.DescErr, &args.Timeout, &net_err);
+    switch (net_err) {
+        case NET_SOCK_ERR_NONE:
+             ret_val += NetCmd_OutputMsg("No Error,  Number of ready socket = ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+             ret_val += NetCmd_OutputInt32U(sock_ready_ctr, out_fnct, p_cmd_param);
+
+             ret_val += NetCmd_OutputMsg("Read Sockets: ", DEF_YES, DEF_YES, DEF_YES, out_fnct, p_cmd_param);
+             for (i = 0; i <= args.SockNbrMax; i++) {
+                 if (NET_SOCK_DESC_IS_SET(i, (NET_SOCK_DESC *)&args.DescRd)) {
+                     ret_val += NetCmd_OutputInt32U(sock_ready_ctr, out_fnct, p_cmd_param);
+                     ret_val += NetCmd_OutputMsg(", ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+                 }
+             }
+
+             ret_val += NetCmd_OutputMsg("Write Sockets: ", DEF_YES, DEF_YES, DEF_YES, out_fnct, p_cmd_param);
+             for (i = 0; i <= args.SockNbrMax; i++) {
+                 if (NET_SOCK_DESC_IS_SET(i, &args.DescWr)) {
+                     ret_val += NetCmd_OutputInt32U(sock_ready_ctr, out_fnct, p_cmd_param);
+                     ret_val += NetCmd_OutputMsg(", ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+                 }
+             }
+
+             ret_val += NetCmd_OutputMsg("Error Sockets: ", DEF_YES, DEF_YES, DEF_YES, out_fnct, p_cmd_param);
+             for (i = 0; i <= args.SockNbrMax; i++) {
+                 if (NET_SOCK_DESC_IS_SET(i, &args.DescErr)) {
+                     ret_val += NetCmd_OutputInt32U(sock_ready_ctr, out_fnct, p_cmd_param);
+                     ret_val += NetCmd_OutputMsg(", ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+                 }
+             }
+             break;
+
+        default:
+            ret_val  = NetCmd_OutputMsg("Select error ", DEF_YES, DEF_NO, DEF_YES, out_fnct, p_cmd_param);
+            ret_val += NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+            goto exit;
+    }
+
+
+    ret_val += NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+exit:
+    NetCmd_OutputEnd(out_fnct, p_cmd_param);
+    return (ret_val);
+}
+#endif
+
+
+CPU_INT16S  NetCmd_SockOptSetChild (CPU_INT16U        argc,
+                                    CPU_CHAR         *p_argv[],
+                                    SHELL_OUT_FNCT    out_fnct,
+                                    SHELL_CMD_PARAM  *p_cmd_param)
+{
+    NET_CMD_ERR               err;
+    NET_CMD_SOCK_OPT_CMD_ARG  cmd_args;
+    NET_CMD_SOCK_OPT_ARG      args;
+    CPU_INT16S                ret_val = 0;
+    NET_ERR                   err_net;
+
+    NetCmd_OutputBeginning(out_fnct, p_cmd_param);
+
+    cmd_args = NetCmd_Sock_OptCmdParse(argc, p_argv, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    args = NetCmd_Sock_OptCmdTranslate(cmd_args, &err);
+    if (err != NET_CMD_ERR_NONE) {
+        ret_val = NetCmd_OutputCmdArgInvalid(out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+
+    NetSock_CfgConnChildQ_SizeSet(args.SockID, args.Value, &err_net);
+    if (err_net != NET_SOCK_ERR_NONE) {
+        ret_val += NetCmd_OutputErrorNetNbr(err_net, out_fnct, p_cmd_param);
+        goto exit;
+    }
+
+    ret_val += NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+
+exit:
+    return (ret_val);
+}
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_ResetCmdArgParse()
+*
+* Description : Parse Reset command arguments.
+*
+* Argument(s) : argc    is a count of the arguments supplied.
+*
+*               p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : Reset argument parsed.
+*
+* Caller(s)   : NetCmd_IF_Reset().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_RESET_CMD_ARG  NetCmd_ResetCmdArgParse (CPU_INT16U    argc,
+                                                        CPU_CHAR     *p_argv[],
+                                                        NET_CMD_ERR  *p_err)
+{
+    NET_CMD_RESET_CMD_ARG  cmd_args;
+    CPU_INT16U              i;
+
+
+    cmd_args.IF_NbrPtr = DEF_NULL;
+    cmd_args.IPv4_En   = DEF_NO;
+    cmd_args.IPv6_En   = DEF_NO;
+
+    if (argc > 5) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_IF:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.IF_NbrPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_IPv4:
+                     cmd_args.IPv4_En = DEF_YES;
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                         return (cmd_args);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_IPv6:
+                     cmd_args.IPv6_En = DEF_YES;
+                     break;
+
+
+                default:
+                    *p_err = NET_CMD_ERR_PARSER_ARG_INVALID;
+                     return (cmd_args);
+            }
+        }
+    }
+
+    if ((cmd_args.IPv4_En == DEF_NO) &&
+        (cmd_args.IPv6_En == DEF_NO)) {
+         cmd_args.IPv4_En = DEF_YES;
+         cmd_args.IPv6_En = DEF_YES;
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetCmd_ResetTranslate()
+*
+* Description : Translate reset argument.
+*
+* Argument(s) : cmd_arg     Pointer to the reset argument to translate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Reset argument converted.
+*
+* Caller(s)   : NetCmd_IF_Reset().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_RESET_ARG  NetCmd_ResetTranslate (NET_CMD_RESET_CMD_ARG   cmd_args,
+                                                  NET_CMD_ERR            *p_err)
+{
+    NET_CMD_RESET_ARG  args;
+
+
+    args.IF_Nbr = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.IF_NbrPtr, p_err);
+
+    if (cmd_args.IPv4_En == DEF_YES) {
+        args.IPv4_En = DEF_YES;
+    } else {
+        args.IPv4_En = DEF_NO;
+    }
+
+
+    if (cmd_args.IPv6_En == DEF_YES) {
+        args.IPv6_En = DEF_YES;
+    } else {
+        args.IPv6_En = DEF_NO;
+    }
+
+
+    return (args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetCmd_MTU_CmdArgParse()
+*
+* Description : Parse set MTU command arguments.
+*
+* Argument(s) : argc    is a count of the arguments supplied.
+*
+*               p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : Set MTU argument parsed.
+*
+* Caller(s)   : NetCmd_IF_SetMTU().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_MTU_CMD_ARG  NetCmd_MTU_CmdArgParse (CPU_INT16U    argc,
+                                                     CPU_CHAR     *p_argv[],
+                                                     NET_CMD_ERR  *p_err)
+{
+    NET_CMD_MTU_CMD_ARG  cmd_args;
+    CPU_INT16U              i;
+
+
+       cmd_args.IF_NbrPtr = DEF_NULL;
+       cmd_args.MTU_Ptr   = DEF_NULL;
+
+
+       for (i = 1; i < argc; i++) {
+           if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+               switch (*(p_argv[i] + 1)) {
+                   case NET_CMD_ARG_IF:
+                        i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.IF_NbrPtr, p_err);
+                        if (*p_err != NET_CMD_ERR_NONE) {
+                             return (cmd_args);
+                        }
+                        break;
+
+
+                   case NET_CMD_ARG_MTU:
+                        i += NetCmd_ArgsParserParseMTU(&p_argv[i], &cmd_args.MTU_Ptr, p_err);
+                        if (*p_err != NET_CMD_ERR_NONE) {
+                            return (cmd_args);
+                        }
+                        break;
+
+
+                   default:
+                       *p_err = NET_CMD_ERR_PARSER_ARG_INVALID;
+                        return (cmd_args);
+               }
+           }
+       }
+
+
+      *p_err = NET_CMD_ERR_NONE;
+
+       return (cmd_args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetCmd_MTU_Translate()
+*
+* Description : Translate set MTU argument.
+*
+* Argument(s) : cmd_arg     Pointer to the set MTU argument to translate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Set MTU argument converted.
+*
+* Caller(s)   : NetCmd_IF_SetMTU().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_MTU_ARG  NetCmd_MTU_Translate (NET_CMD_MTU_CMD_ARG   cmd_args,
+                                               NET_CMD_ERR          *p_err)
+{
+    NET_CMD_MTU_ARG  args;
+
+
+        args.IF_Nbr = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.IF_NbrPtr, p_err);
+        if (*p_err != NET_CMD_ERR_NONE) {
+             return (args);
+        }
+
+        args.MTU = NetCmd_ArgsParserTranslateMTU(cmd_args.MTU_Ptr, p_err);
+        if (*p_err != NET_CMD_ERR_NONE) {
+             return (args);
+        }
+
+        return (args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_RouteCmdArgParse()
+*
+* Description : Parse Route command arguments.
+*
+* Argument(s) : argc    is a count of the arguments supplied.
+*
+*               p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : Route argument parsed.
+*
+* Caller(s)   : NetCmd_IF_RouteAdd(),
+*               NetCmd_IF_RouteRemove().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_ROUTE_CMD_ARG  NetCmd_RouteCmdArgParse (CPU_INT16U    argc,
+                                                        CPU_CHAR     *p_argv[],
+                                                        NET_CMD_ERR  *p_err)
+{
+    NET_CMD_ROUTE_CMD_ARG  cmd_arg;
+    CPU_INT16U              i;
+
+
+    cmd_arg.IF_NbrPtr         = DEF_NULL;
+    cmd_arg.IPv4.HostPtr      = DEF_NULL;
+    cmd_arg.IPv4.MaskPtr      = DEF_NULL;
+    cmd_arg.IPv4.GatewayPtr   = DEF_NULL;
+    cmd_arg.IPv6.HostPtr      = DEF_NULL;
+    cmd_arg.IPv6.PrefixLenPtr = DEF_NULL;
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_IF:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_arg.IF_NbrPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_arg);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_IPv4:
+                     i += NetCmd_ArgsParserParseIPv4(&p_argv[i], &cmd_arg.IPv4, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                         return (cmd_arg);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_IPv6:
+                     i += NetCmd_ArgsParserParseIPv6(&p_argv[i], &cmd_arg.IPv6, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                         return (cmd_arg);
+                     }
+                     break;
+
+
+                default:
+                    *p_err = NET_CMD_ERR_PARSER_ARG_INVALID;
+                     return (cmd_arg);
+            }
+        }
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_arg);
+}
+
+/*
+*********************************************************************************************************
+*                                        NetCmd_RouteTranslate()
+*
+* Description : Translate route argument.
+*
+* Argument(s) : cmd_arg     Pointer to the set MTU argument to translate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : ROUTE argument converted.
+*
+* Caller(s)   : NetCmd_IF_RouteAdd(),
+*               NetCmd_IF_RouteRemove().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_ROUTE_ARG  NetCmd_RouteTranslate (NET_CMD_ROUTE_CMD_ARG   cmd_args,
+                                                  NET_CMD_ERR            *p_err)
+{
+    NET_CMD_ROUTE_ARG  args;
+
+
+    args.IF_Nbr = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.IF_NbrPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         return (args);
+    }
+
+#ifdef  NET_IPv4_MODULE_EN
+    if (cmd_args.IPv4.HostPtr != DEF_NULL) {
+        args.IPv4Cfg = NetCmd_ArgsParserTranslateIPv4(&cmd_args.IPv4, p_err);
+        if (*p_err != NET_CMD_ERR_NONE) {
+            return (args);
+        }
+
+        args.IPv4_En = DEF_YES;
+
+    } else {
+        args.IPv4_En = DEF_NO;
+    }
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    if (cmd_args.IPv6.HostPtr != DEF_NULL) {
+        args.IPv6Cfg = NetCmd_ArgsParserTranslateIPv6(&cmd_args.IPv6, p_err);
+        if (*p_err != NET_CMD_ERR_NONE) {
+            return (args);
+        }
+
+        args.IPv6_En = DEF_YES;
+
+    } else {
+        args.IPv6_En = DEF_NO;
+    }
+#endif
+
+    return (args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetCmd_Ping4()
+*
+* Description : Ping using an IPv4 address.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : NetCmd_Ping().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  NetCmd_Ping4 (NET_IPv4_ADDR    *p_addr_remote,
+                                  void             *p_data,
+                                  CPU_INT16U        data_len,
+                                  CPU_INT32U        cnt,
+                                  SHELL_OUT_FNCT    out_fnct,
+                                  SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S          ret_val;
+#ifdef  NET_IPv4_MODULE_EN
+    CPU_INT32U          ix;
+    NET_ERR             net_err;
+
+
+    for (ix = 0 ; ix < cnt ; ix++) {
+        (void)NetICMP_TxEchoReq((void *) p_addr_remote,
+                                         sizeof(NET_IPv4_ADDR),
+                                         1000,
+                                (void *) p_data,
+                                         data_len,
+                                        &net_err);
+    }
+
+    switch(net_err) {
+        case NET_ICMP_ERR_NONE:
+             ret_val = NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+             break;
+
+        case NET_ICMP_ERR_SIGNAL_TIMEOUT:
+             ret_val = NetCmd_OutputError("Timeout", out_fnct, p_cmd_param);
+             return (ret_val);
+
+        case NET_ERR_IF_LINK_DOWN:
+             ret_val = NetCmd_OutputError("Link down", out_fnct, p_cmd_param);
+             return (ret_val);
+
+        default:
+             ret_val = NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+             return (ret_val);
+    }
+
+
+    return (ret_val);
+#else
+    ret_val = out_fnct("IXANVL ping: IPv4 not present\n\rFAILED\n\r\n\r",
+                        43,
+                        p_cmd_param->pout_opt);
+    return (ret_val);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetCmd_Ping6()
+*
+* Description : Ping using an IPv6 address.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED,                 if implemented connection closed
+*
+*               SHELL_OUT_ERR,                                  otherwise
+*
+* Caller(s)   : NetCmd_Ping().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  NetCmd_Ping6 (NET_IPv6_ADDR    *p_addr_remote,
+                                  void             *p_data,
+                                  CPU_INT16U        data_len,
+                                  SHELL_OUT_FNCT    out_fnct,
+                                  SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S          ret_val;
+#ifdef  NET_IPv6_MODULE_EN
+    NET_ERR             net_err;
+
+
+    (void)NetICMP_TxEchoReq((CPU_INT08U *)p_addr_remote,
+                                          sizeof(NET_IPv6_ADDR),
+                                          1000u,
+                                          p_data,
+                                          data_len,
+                                         &net_err);
+    switch(net_err) {
+        case NET_ICMP_ERR_NONE:
+             ret_val = NetCmd_OutputSuccess(out_fnct, p_cmd_param);
+             break;
+
+        case NET_ICMP_ERR_SIGNAL_TIMEOUT:
+             ret_val = NetCmd_OutputError("Timeout", out_fnct, p_cmd_param);
+             return (ret_val);
+
+        case NET_ERR_IF_LINK_DOWN:
+             ret_val = NetCmd_OutputError("Link down", out_fnct, p_cmd_param);
+             return (ret_val);
+
+        default:
+             ret_val = NetCmd_OutputErrorNetNbr(net_err, out_fnct, p_cmd_param);
+             return (ret_val);
+    }
+
+
+#else
+    ret_val = NetCmd_OutputError("IPv6 not present", out_fnct, p_cmd_param);
+#endif
+
+    (void)&p_addr_remote;
+    (void)&p_data;
+    (void)&data_len;
+
+    return (ret_val);
+}
+
+/*
+*********************************************************************************************************
+*                                        NetCmd_AutoCfgResult()
+*
+* Description : Hook function called when auto-config is completed.
+*
+* Argument(s) : if_nbr          Interface number.
+*
+*               autocfg_result  Auto configuration result.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Referenced by NetCmd_Start().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+static  void  NetCmd_AutoCfgResult (       NET_IF_NBR                 if_nbr,
+                                    const  NET_IPv6_ADDR             *p_addr_local,
+                                    const  NET_IPv6_ADDR             *p_addr_global,
+                                           NET_IPv6_AUTO_CFG_STATUS   autocfg_result)
+{
+    CPU_BOOLEAN   check;
+
+
+    if (p_addr_local != DEF_NULL) {
+        check = NetIPv6_IsAddrCfgdValidHandler(p_addr_local);
+        if (check != DEF_OK) {
+            NET_CMD_TRACE_INFO(("ERROR!"));
+        }
+    }
+
+    if (p_addr_global != DEF_NULL) {
+        check = NetIPv6_IsAddrCfgdValidHandler(p_addr_global);
+        if (check != DEF_OK) {
+            NET_CMD_TRACE_INFO(("ERROR!"));
+        }
+    }
+
+    switch (autocfg_result) {
+        case NET_IPv6_AUTO_CFG_STATUS_FAILED:
+             NET_CMD_TRACE_INFO(("Auto-Configuration failed.\n"));
+             break;
+
+        case NET_IPv6_AUTO_CFG_STATUS_SUCCEEDED:
+             NET_CMD_TRACE_INFO(("Auto-Configuration succeeded.\n"));
+             break;
+
+        case NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL:
+             NET_CMD_TRACE_INFO(("Auto-Configuration with Link-Local address only.\n"));
+             break;
+
+        default:
+             NET_CMD_TRACE_INFO(("Unknown Auto-Configuration result.\n"));
+             break;
+    }
+
+   (void)&if_nbr;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_WiFiScanCmdArgParse ()
+*
+* Description : Parse WiFi Scan command arguments.
+*
+* Argument(s) : argc    is a count of the arguments supplied.
+*
+*               p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : WiFi Scan argument parsed.
+*
+* Caller(s)   : NetCmd_WiFiScanCmdArgParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+static  NET_CMD_WIFI_SCAN_ARG  NetCmd_WiFiScanCmdArgParse (CPU_INT16U    argc,
+                                                           CPU_CHAR     *p_argv[],
+                                                           NET_CMD_ERR  *p_err)
+{
+    NET_CMD_WIFI_SCAN_ARG  cmd_args;
+    CPU_BOOLEAN            is_graph;
+    CPU_INT16U             i;
+    CPU_CHAR              *p_if_str;
+    CPU_INT32U             ch;
+    CPU_INT08U             j;
+
+    cmd_args.Ch     = NET_IF_WIFI_CH_ALL;
+    cmd_args.IF_Nbr = 0u;
+    Mem_Set(cmd_args.SSID.SSID, 0x00, NET_IF_WIFI_STR_LEN_MAX_SSID);
+
+    if (argc > 10) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_IF:
+
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &p_if_str, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+
+                     cmd_args.IF_Nbr = NetCmd_ArgsParserTranslateID_Nbr(p_if_str, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                case NET_CMD_ARG_WIFI_CHANNEL:
+                     ch = Str_ParseNbr_Int32U(p_argv[i + 1] , DEF_NULL, DEF_NBR_BASE_DEC);
+                     if ((ch > 0u) && (ch < 14u)){
+                        cmd_args.Ch = ch;
+                     } else {
+                        cmd_args.Ch = 0u;
+                       *p_err       = NET_CMD_ERR_CMD_ARG_INVALID;
+                        return (cmd_args);
+
+                     }
+                     i++;
+                     break;
+             }
+
+        } else {
+
+            if (cmd_args.SSID.SSID[0] != DEF_NULL) {
+               *p_err       = NET_CMD_ERR_CMD_ARG_INVALID;
+                return (cmd_args);
+            }
+
+
+            j = 0;
+            while (j < NET_IF_WIFI_STR_LEN_MAX_SSID +1) {
+                is_graph = ASCII_IS_GRAPH(*(p_argv[i] + j));
+                if (is_graph == DEF_FALSE){
+                    break;
+                }
+                j++;
+            }
+
+
+            if (j < NET_IF_WIFI_STR_LEN_MAX_SSID ) {
+                Mem_Copy(cmd_args.SSID.SSID, p_argv[i], j );
+            } else {
+               *p_err       = NET_CMD_ERR_CMD_ARG_INVALID;
+                return (cmd_args);
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_WiFiJoinCmdArgParse()
+*
+* Description : Parse WiFi Join command arguments.
+*
+* Argument(s) : argc    is a count of the arguments supplied.
+*
+*               p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : WiFi Join argument parsed.
+*
+* Caller(s)   : NetCmd_WiFi_Join ().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+static  NET_CMD_WIFI_JOIN_ARG  NetCmd_WiFiJoinCmdArgParse (CPU_INT16U    argc,
+                                                           CPU_CHAR     *p_argv[],
+                                                           NET_CMD_ERR  *p_err)
+{
+    NET_CMD_WIFI_JOIN_ARG       cmd_args;
+    CPU_BOOLEAN                 is_graph;
+    CPU_INT16U                  i;
+    CPU_CHAR                   *p_if_str;
+    CPU_INT08U                  j;
+    CPU_INT32U                  net_type_result;
+    CPU_INT32U                  security_type_result;
+
+    cmd_args.IF_Nbr = 0u;
+    Mem_Set(cmd_args.SSID.SSID, 0x00, NET_IF_WIFI_STR_LEN_MAX_SSID);
+
+    if ((argc > 10) || (argc <= 3)) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_IF:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &p_if_str, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+
+                     cmd_args.IF_Nbr = NetCmd_ArgsParserTranslateID_Nbr(p_if_str, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_WIFI_PSK:
+                     while (j < NET_IF_WIFI_STR_LEN_MAX_PSK +1) {
+                        is_graph = ASCII_IS_GRAPH(*(p_argv[i+1] + j));
+                        if (is_graph == DEF_FALSE){
+                            break;
+                        }
+                        j++;
+                     }
+                     if (j < NET_IF_WIFI_STR_LEN_MAX_PSK ) {
+                        Mem_Copy(cmd_args.PSK.PSK, p_argv[i+1], j );
+                     } else {
+                       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                        return (cmd_args);
+                     }
+                     i++;
+                     break;
+
+
+                case NET_CMD_ARG_WIFI_NET_TYPE:
+                     net_type_result = NetCmd_DictionaryGet(                   NetCmd_DictionaryNetType,
+                                                                               sizeof(NetCmd_DictionaryNetType),
+                                                            (const CPU_CHAR *) p_argv[i+1],
+                                                                               NET_CMD_NET_TYPE_STR_LEN  );
+
+                    if (net_type_result != NET_CMD_DICTIONARY_KEY_INVALID) {
+                        cmd_args.NetType = net_type_result;
+                    } else {
+                       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                        return (cmd_args);
+                    }
+                    i++;
+                    break;
+
+
+                case NET_CMD_ARG_WIFI_SECURITY_TYPE:
+                     security_type_result = NetCmd_DictionaryGet(                   NetCmd_DictionarySecurityType,
+                                                                                    sizeof(NetCmd_DictionarySecurityType),
+                                                                 (const CPU_CHAR *) p_argv[i+1],
+                                                                                    NET_CMD_SECURITY_TYPE_STR_LEN  );
+
+                    if (security_type_result != NET_CMD_DICTIONARY_KEY_INVALID) {
+                        cmd_args.SecurityType = security_type_result;
+                    } else {
+                        *p_err       = NET_CMD_ERR_CMD_ARG_INVALID;
+                        return (cmd_args);
+                    }
+                    i++;
+                     break;
+             }
+
+        } else {
+            if (cmd_args.SSID.SSID[0] != DEF_NULL) {
+               *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                return (cmd_args);
+            }
+            j = 0;
+            while (j < NET_IF_WIFI_STR_LEN_MAX_SSID +1) {
+                is_graph = ASCII_IS_GRAPH(*(p_argv[i] + j));
+                if (is_graph == DEF_FALSE) {
+                    break;
+                }
+                j++;
+            }
+            if (j < NET_IF_WIFI_STR_LEN_MAX_SSID ) {
+                Mem_Copy(cmd_args.SSID.SSID, p_argv[i], j );
+            } else {
+               *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                return (cmd_args);
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                    NetCmd_WiFiCreateCmdArgParse()
+*
+* Description : Parse WiFi Create command arguments.
+*
+* Argument(s) : argc    is a count of the arguments supplied.
+*
+*               p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : WiFi Create argument parsed.
+*
+* Caller(s)   : NetCmd_WiFi_Create().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+static  NET_CMD_WIFI_CREATE_ARG  NetCmd_WiFiCreateCmdArgParse (CPU_INT16U    argc,
+                                                               CPU_CHAR     *p_argv[],
+                                                               NET_CMD_ERR  *p_err)
+{
+    NET_CMD_WIFI_CREATE_ARG     cmd_args;
+    CPU_BOOLEAN                 is_graph;
+    CPU_INT16U                  i;
+    CPU_CHAR                   *p_if_str;
+    CPU_INT08U                  j;
+    CPU_INT32U                  net_type_result;
+    CPU_INT32U                  security_type_result;
+    CPU_INT32U                  ch;
+
+    cmd_args.IF_Nbr = 0u;
+    Mem_Set(cmd_args.SSID.SSID, 0x00, NET_IF_WIFI_STR_LEN_MAX_SSID);
+
+    if ((argc > 15) || (argc <= 3)) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_IF:
+
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &p_if_str, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+
+                     cmd_args.IF_Nbr = NetCmd_ArgsParserTranslateID_Nbr(p_if_str, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                case NET_CMD_ARG_WIFI_PSK:
+                     while (j < NET_IF_WIFI_STR_LEN_MAX_PSK +1) {
+                        is_graph = ASCII_IS_GRAPH(*(p_argv[i+1] + j));
+                        if (is_graph == DEF_FALSE){
+                            break;
+                        }
+                        j++;
+                     }
+                     if (j < NET_IF_WIFI_STR_LEN_MAX_PSK ) {
+                         Mem_Copy(cmd_args.PSK.PSK, p_argv[i+1], j );
+                         cmd_args.PSK.PSK[j] = 0;
+                     } else {
+                        *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                         return (cmd_args);
+                     }
+                     i++;
+                     break;
+
+                case NET_CMD_ARG_WIFI_NET_TYPE:
+                     net_type_result = NetCmd_DictionaryGet(                   NetCmd_DictionaryNetType,
+                                                                               sizeof(NetCmd_DictionaryNetType),
+                                                            (const CPU_CHAR *) p_argv[i+1],
+                                                                               NET_CMD_NET_TYPE_STR_LEN  );
+
+                    if (net_type_result != NET_CMD_DICTIONARY_KEY_INVALID) {
+                        cmd_args.NetType = net_type_result;
+                    } else {
+                       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                        return (cmd_args);
+                    }
+                    i++;
+                    break;
+
+                case NET_CMD_ARG_WIFI_SECURITY_TYPE:
+                     security_type_result = NetCmd_DictionaryGet(                   NetCmd_DictionarySecurityType,
+                                                                                    sizeof(NetCmd_DictionarySecurityType),
+                                                                 (const CPU_CHAR *) p_argv[i+1],
+                                                                                    NET_CMD_SECURITY_TYPE_STR_LEN  );
+
+                    if (security_type_result != NET_CMD_DICTIONARY_KEY_INVALID) {
+                        cmd_args.SecurityType = security_type_result;
+                    } else {
+                        *p_err       = NET_CMD_ERR_CMD_ARG_INVALID;
+                        return (cmd_args);
+                    }
+                    i++;
+                     break;
+
+                case NET_CMD_ARG_WIFI_CHANNEL:
+                     ch = Str_ParseNbr_Int32U(p_argv[i + 1] , DEF_NULL, DEF_NBR_BASE_DEC);
+                     if ((ch > 0u) && (ch < 14u)){
+                         cmd_args.Ch = ch;
+                     } else {
+                         cmd_args.Ch = 0u;
+                        *p_err       = NET_CMD_ERR_CMD_ARG_INVALID;
+                         return (cmd_args);
+
+                     }
+                     i++;
+                     break;
+             }
+
+        } else {
+
+            if (cmd_args.SSID.SSID[0] != DEF_NULL) {
+               *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                return (cmd_args);
+            }
+
+
+            j = 0;
+            while (j < NET_IF_WIFI_STR_LEN_MAX_SSID +1) {
+                is_graph = ASCII_IS_GRAPH(*(p_argv[i] + j));
+                if (is_graph == DEF_FALSE) {
+                    break;
+                }
+                j++;
+            }
+
+
+            if (j < NET_IF_WIFI_STR_LEN_MAX_SSID ) {
+                Mem_Copy(cmd_args.SSID.SSID, p_argv[i], j );
+            } else {
+               *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                return (cmd_args);
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetCmd_Sock_OpenCmdParse()
+*
+* Description : Parse sock open command arguments
+*
+* Argument(s) : argc    is a count of the arguments supplied.
+*
+*               p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : Socket open argument parsed
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_OPEN_CMD_ARG  NetCmd_Sock_OpenCmdParse (CPU_INT16U        argc,
+                                                             CPU_CHAR         *p_argv[],
+                                                             NET_CMD_ERR      *p_err)
+{
+    NET_CMD_SOCK_OPEN_CMD_ARG  cmd_args;
+    CPU_INT16U             i;
+
+
+
+    Mem_Clr(&cmd_args, sizeof(cmd_args));
+
+    if (argc > 10) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+
+
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            CPU_CHAR  *p_letter = p_argv[i];
+
+            p_letter++;
+            i++;
+            switch (*p_letter) {
+                case NET_CMD_ARG_SOCK_FAMILY:
+                     NetCmd_ArgsParserParseSockFamily(&p_argv[i], &cmd_args.FamilyPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                case NET_CMD_ARG_SOCK_TYPE:
+                     NetCmd_ArgsParserParseSockType(&p_argv[i], &cmd_args.TypePtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                default:
+                     break;
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+
+    return (cmd_args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetCmd_Sock_OpenCmdTranslate()
+*
+* Description : Translate socket open command argument
+*
+* Argument(s) : cmd_args    $$$$ Add description for 'cmd_args'
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_OPEN_ARG  NetCmd_Sock_OpenCmdTranslate (NET_CMD_SOCK_OPEN_CMD_ARG   cmd_args,
+                                                             NET_CMD_ERR                *p_err)
+{
+    NET_CMD_SOCK_OPEN_ARG  arg;
+
+
+    arg.Family = NetCmd_ArgsParserTranslateSockFamily(cmd_args.FamilyPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+        goto exit;
+    }
+
+
+    arg.Type = NetCmd_ArgsParserTranslateSockType(cmd_args.TypePtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+        goto exit;
+    }
+
+exit:
+    return (arg);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_Sock_ID_CmdParse()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : argc    $$$$ Add description for 'argc'
+*
+*               p_argv  $$$$ Add description for 'p_argv'
+*
+*               p_err   $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_ID_CMD_ARG  NetCmd_Sock_ID_CmdParse (CPU_INT16U        argc,
+                                                          CPU_CHAR         *p_argv[],
+                                                          NET_CMD_ERR      *p_err)
+{
+    NET_CMD_SOCK_ID_CMD_ARG  cmd_args;
+    CPU_INT16U               i;
+
+
+
+    Mem_Clr(&cmd_args, sizeof(cmd_args));
+
+    if (argc > 3) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_SOCK_ID:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.SockIDPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                default:
+                    *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                     return (cmd_args);
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_Sock_ID_CmdTranslate()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : cmd_args    $$$$ Add description for 'cmd_args'
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_ID_ARG  NetCmd_Sock_ID_CmdTranslate (NET_CMD_SOCK_ID_CMD_ARG   cmd_args,
+                                                          NET_CMD_ERR              *p_err)
+{
+    NET_CMD_SOCK_ID_ARG  arg;
+
+
+    arg.SockID = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.SockIDPtr, p_err);
+
+
+    return (arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetCmd_Sock_BindCmdParse()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : argc    $$$$ Add description for 'argc'
+*
+*               p_argv  $$$$ Add description for 'p_argv'
+*
+*               p_err   $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_BIND_CMD_ARG  NetCmd_Sock_BindCmdParse (CPU_INT16U        argc,
+                                                             CPU_CHAR         *p_argv[],
+                                                             NET_CMD_ERR      *p_err)
+{
+    NET_CMD_SOCK_BIND_CMD_ARG  cmd_args;
+    CPU_INT16U                  i;
+
+
+
+    Mem_Clr(&cmd_args, sizeof(cmd_args));
+    if (argc > 7) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_SOCK_ID:
+                     NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.SockIDPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     i++;
+                     break;
+
+                case NET_CMD_ARG_SOCK_FAMILY:
+                     i++;
+                     NetCmd_ArgsParserParseSockFamily(&p_argv[i], &cmd_args.FamilyPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                case NET_CMD_ARG_SOCK_PORT:
+                     NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.PortPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     i++;
+                     break;
+
+
+                default:
+                    *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                     return (cmd_args);
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetCmd_Sock_BindCmdTranslate()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : cmd_args    $$$$ Add description for 'cmd_args'
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_BIND_ARG  NetCmd_Sock_BindCmdTranslate (NET_CMD_SOCK_BIND_CMD_ARG   cmd_args,
+                                                             NET_CMD_ERR                *p_err)
+{
+    NET_CMD_SOCK_BIND_ARG  arg;
+
+
+    arg.SockID = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.SockIDPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+
+    arg.Family = NetCmd_ArgsParserTranslateSockFamily(cmd_args.FamilyPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+        goto exit;
+    }
+
+
+    arg.Port = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.PortPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+
+exit:
+    return (arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_Sock_ListenCmdParse()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : argc    $$$$ Add description for 'argc'
+*
+*               p_argv  $$$$ Add description for 'p_argv'
+*
+*               p_err   $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_LISTEN_CMD_ARG  NetCmd_Sock_ListenCmdParse (CPU_INT16U    argc,
+                                                                 CPU_CHAR     *p_argv[],
+                                                                 NET_CMD_ERR  *p_err)
+{
+    NET_CMD_SOCK_LISTEN_CMD_ARG  cmd_args;
+    CPU_INT16U                   i;
+
+
+
+    Mem_Clr(&cmd_args, sizeof(cmd_args));
+
+    if (argc > 6) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_SOCK_ID:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.SockIDPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                case NET_CMD_ARG_SOCK_Q_SIZE:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.QueueSizePtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+
+                default:
+                    *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                     return (cmd_args);
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetCmd_Sock_ListenCmdTranslate()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : cmd_args    $$$$ Add description for 'cmd_args'
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_LISTEN_ARG  NetCmd_Sock_ListenCmdTranslate (NET_CMD_SOCK_LISTEN_CMD_ARG   cmd_args,
+                                                                 NET_CMD_ERR                  *p_err)
+{
+    NET_CMD_SOCK_LISTEN_ARG  arg;
+
+
+    arg.SockID = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.SockIDPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+
+    arg.QueueSize = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.QueueSizePtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+
+exit:
+    return (arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetCmd_Sock_ConnCmdParse()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : argc    $$$$ Add description for 'argc'
+*
+*               p_argv  $$$$ Add description for 'p_argv'
+*
+*               p_err   $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_CONN_CMD_ARG  NetCmd_Sock_ConnCmdParse (CPU_INT16U    argc,
+                                                             CPU_CHAR     *p_argv[],
+                                                             NET_CMD_ERR  *p_err)
+{
+    NET_CMD_SOCK_CONN_CMD_ARG  cmd_arg;
+    CPU_INT16U                 i;
+
+
+
+    Mem_Clr(&cmd_arg, sizeof(cmd_arg));
+
+    if (argc > 7) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_arg);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_SOCK_ID:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_arg.SockIDPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_arg);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_SOCK_PORT:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_arg.PortPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_arg);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_ADDR:
+                     i++;
+                     cmd_arg.AddrPtr = p_argv[i];
+                     break;
+
+
+                default:
+                    *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                     return (cmd_arg);
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetCmd_Sock_ConnCmdTranslate()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : cmd_args    $$$$ Add description for 'cmd_args'
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_CONN_ARG  NetCmd_Sock_ConnCmdTranslate (NET_CMD_SOCK_CONN_CMD_ARG   cmd_args,
+                                                             NET_CMD_ERR                *p_err)
+{
+    NET_CMD_SOCK_CONN_ARG  arg;
+    NET_IP_ADDR_FAMILY     family;
+    NET_ERR                err;
+
+
+    arg.SockID = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.SockIDPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+    arg.Port = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.PortPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+    family = NetASCII_Str_to_IP(cmd_args.AddrPtr, &arg.Addr, sizeof(arg.Addr), &err);
+    switch (family) {
+        case NET_IP_ADDR_FAMILY_IPv4:
+             arg.AddrLen = NET_IPv4_ADDR_SIZE;
+             break;
+
+        case NET_IP_ADDR_FAMILY_IPv6:
+             arg.AddrLen = NET_IPv4_ADDR_SIZE;
+             break;
+
+        default:
+            *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+             goto exit;
+    }
+
+exit:
+    return (arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_Sock_RxCmdParse()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : argc    $$$$ Add description for 'argc'
+*
+*               p_argv  $$$$ Add description for 'p_argv'
+*
+*               p_err   $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_RX_CMD_ARG  NetCmd_Sock_RxCmdParse (CPU_INT16U        argc,
+                                                         CPU_CHAR         *p_argv[],
+                                                         NET_CMD_ERR      *p_err)
+{
+    NET_CMD_SOCK_RX_CMD_ARG  cmd_args;
+    CPU_INT16U               i;
+
+
+    Mem_Clr(&cmd_args, sizeof(cmd_args));
+
+
+    if (argc > 6) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_SOCK_ID:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.SockIDPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                case NET_CMD_ARG_LEN:
+                     i += NetCmd_ArgsParserParseDataLen(&p_argv[i], &cmd_args.DataLenPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                case NET_CMD_ARG_FMT:
+                     i += NetCmd_ArgsParserParseFmt(&p_argv[i], &cmd_args.OutputFmtPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+
+                default:
+                    *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                     return (cmd_args);
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_Sock_RxCmdTranslate()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : cmd_args    $$$$ Add description for 'cmd_args'
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_RX_ARG  NetCmd_Sock_RxCmdTranslate (NET_CMD_SOCK_RX_CMD_ARG   cmd_args,
+                                                         NET_CMD_ERR              *p_err)
+{
+    NET_CMD_SOCK_RX_ARG  arg;
+
+
+    arg.SockID = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.SockIDPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+    arg.DataLen = NetCmd_ArgsParserTranslateDataLen(cmd_args.DataLenPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+    arg.OutputFmt = NetCmd_ArgsParserTranslateFmt(cmd_args.OutputFmtPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+
+exit:
+    return (arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_Sock_TxCmdParse()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : argc    $$$$ Add description for 'argc'
+*
+*               p_argv  $$$$ Add description for 'p_argv'
+*
+*               p_err   $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_TX_CMD_ARG  NetCmd_Sock_TxCmdParse (CPU_INT16U    argc,
+                                                         CPU_CHAR     *p_argv[],
+                                                         NET_CMD_ERR  *p_err)
+{
+    NET_CMD_SOCK_TX_CMD_ARG  cmd_args;
+    CPU_INT16U               i;
+
+
+
+    Mem_Clr(&cmd_args, sizeof(cmd_args));
+
+    if (argc > 6) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_SOCK_ID:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.SockIDPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                case NET_CMD_ARG_LEN:
+                     i += NetCmd_ArgsParserParseDataLen(&p_argv[i], &cmd_args.DataLenPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                case NET_CMD_ARG_DATA:
+                     cmd_args.DataPtr = p_argv[i];
+                     break;
+
+
+                default:
+                    *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                     return (cmd_args);
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_Sock_TxCmdTranslate()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : cmd_args    $$$$ Add description for 'cmd_args'
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_TX_ARG  NetCmd_Sock_TxCmdTranslate (NET_CMD_SOCK_TX_CMD_ARG   cmd_args,
+                                                         NET_CMD_ERR              *p_err)
+{
+    NET_CMD_SOCK_TX_ARG  arg;
+
+
+    arg.SockID = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.SockIDPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+    arg.DataLen = NetCmd_ArgsParserTranslateDataLen(cmd_args.DataLenPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+exit:
+    return (arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_Sock_TxCmdParse()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : argc    $$$$ Add description for 'argc'
+*
+*               p_argv  $$$$ Add description for 'p_argv'
+*
+*               p_err   $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_OPT_CMD_ARG  NetCmd_Sock_OptCmdParse (CPU_INT16U    argc,
+                                                           CPU_CHAR     *p_argv[],
+                                                           NET_CMD_ERR  *p_err)
+{
+    NET_CMD_SOCK_OPT_CMD_ARG  cmd_args;
+    CPU_INT16U                i;
+
+
+
+    Mem_Clr(&cmd_args, sizeof(cmd_args));
+
+    if (argc > 6) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_SOCK_ID:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_args.SockIDPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+                case NET_CMD_ARG_VAL:
+                     i += NetCmd_ArgsParserParseDataLen(&p_argv[i], &cmd_args.ValPtr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_args);
+                     }
+                     break;
+
+
+                default:
+                    *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                     return (cmd_args);
+            }
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_Sock_TxCmdTranslate()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : cmd_args    $$$$ Add description for 'cmd_args'
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_SOCK_OPT_ARG  NetCmd_Sock_OptCmdTranslate (NET_CMD_SOCK_OPT_CMD_ARG   cmd_args,
+                                                           NET_CMD_ERR               *p_err)
+{
+    NET_CMD_SOCK_OPT_ARG  arg;
+
+
+    arg.SockID = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.SockIDPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+    arg.Value = NetCmd_ArgsParserTranslateVal32U(cmd_args.ValPtr, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+         goto exit;
+    }
+
+exit:
+    return (arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_Sock_SelCmdParse()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : argc    $$$$ Add description for 'argc'
+*
+*               p_argv  $$$$ Add description for 'p_argv'
+*
+*               p_err   $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+#if 0
+static  NET_CMD_SOCK_SEL_CMD_ARG  NetCmd_Sock_SelCmdParse (CPU_INT16U    argc,
+                                                           CPU_CHAR     *p_argv[],
+                                                           NET_CMD_ERR  *p_err)
+{
+    NET_CMD_SOCK_SEL_CMD_ARG  cmd_args;
+    CPU_INT16U                i;
+
+
+    Mem_Clr(&cmd_args, sizeof(cmd_args));
+
+    if (argc > 6) {
+       *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+        return (cmd_args);
+    }
+
+    cmd_args.RdListPtr      = DEF_NULL;
+    cmd_args.WrListPtr      = DEF_NULL;
+    cmd_args.ErrListPtr     = DEF_NULL;
+    cmd_args.Timeout_sec_Ptr = DEF_NULL;
+
+    for (i = 1; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_BEGIN) {
+
+            i++;
+            switch (*(p_argv[i])) {
+                case NET_CMD_ARG_SOCK_SEL_RD:
+                     cmd_args.RdListPtr = p_argv[i] + 1;
+                     break;
+
+                case NET_CMD_ARG_SOCK_SEL_WR:
+                     cmd_args.WrListPtr = p_argv[i] + 1;
+                     break;
+
+                case NET_CMD_ARG_SOCK_SEL_ERR:
+                     cmd_args.ErrListPtr = p_argv[i] + 1;
+                     break;
+
+                case NET_CMD_ARG_SOCK_SEL_TIMEOUT:
+                     cmd_args.Timeout_sec_Ptr = p_argv[i];
+                     break;
+
+                default:
+                    *p_err = NET_CMD_ERR_CMD_ARG_INVALID;
+                     return (cmd_args);
+            }
+
+        }
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_args);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_Sock_SelCmdTranslate()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : cmd_args    $$$$ Add description for 'cmd_args'
+*
+*               p_err       $$$$ Add description for 'p_err'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_Open().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if 0
+static  NET_CMD_SOCK_SEL_ARG  NetCmd_Sock_SelCmdTranslate (NET_CMD_SOCK_SEL_CMD_ARG   cmd_args,
+                                                           NET_CMD_ERR               *p_err)
+{
+    NET_CMD_SOCK_SEL_ARG   arg;
+    CPU_CHAR              *p_str;
+    NET_SOCK_ID            sock_id;
+
+
+
+    NET_SOCK_DESC_INIT(&arg.DescRd);
+    NET_SOCK_DESC_INIT(&arg.DescWr);
+    NET_SOCK_DESC_INIT(&arg.DescErr);
+
+
+    p_str = cmd_args.RdListPtr;
+    while (p_str != DEF_NULL) {
+         sock_id = NetCmd_Sock_SelGetSockID(p_str, p_str);
+         if (sock_id != NET_SOCK_ID_NONE) {
+             NET_SOCK_DESC_SET(sock_id, &arg.DescRd);
+         }
+    }
+
+
+    p_str = cmd_args.WrListPtr;
+    while (p_str != DEF_NULL) {
+         sock_id = NetCmd_Sock_SelGetSockID(p_str, p_str);
+         if (sock_id != NET_SOCK_ID_NONE) {
+             NET_SOCK_DESC_SET(sock_id, &arg.DescWr);
+         }
+    }
+
+
+    p_str = cmd_args.ErrListPtr;
+    while (p_str != DEF_NULL) {
+         sock_id = NetCmd_Sock_SelGetSockID(p_str, p_str);
+         if (sock_id != NET_SOCK_ID_NONE) {
+             NET_SOCK_DESC_SET(sock_id, &arg.DescErr);
+         }
+    }
+
+
+    if (cmd_args.Timeout_sec_Ptr != DEF_NULL) {
+        CPU_INT32U   timeout;
+        NET_CMD_ERR  err;
+
+
+        timeout = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.Timeout_sec_Ptr , &err);
+        arg.Timeout.timeout_us  = 0u;
+        arg.Timeout.timeout_sec = timeout;
+
+    } else {
+        arg.Timeout.timeout_us  = 0u;
+        arg.Timeout.timeout_sec = 0u;
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (arg);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetCmd_Sock_SelGetSockID()
+*
+* Description : $$$$ Add function description.
+*
+* Argument(s) : p_str       $$$$ Add description for 'p_str'
+*
+*               p_str_next  $$$$ Add description for 'p_str_next'
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : NetCmd_Sock_SelCmdTranslate().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+#if 0
+static  NET_SOCK_ID  NetCmd_Sock_SelGetSockID (CPU_CHAR  *p_str,
+                                               CPU_CHAR  *p_str_next)
+{
+    NET_SOCK_ID    val = NET_SOCK_ID_NONE;
+    CPU_CHAR      *p_str_copy = p_str;
+    NET_CMD_ERR    err;
+
+    if (p_str == DEF_NULL) {
+        goto exit;
+    }
+
+   (void)&p_str_next;
+
+    p_str_next = DEF_NULL;
+
+
+    while (p_str_copy != DEF_NULL) {
+        switch (*p_str_copy) {
+            case ASCII_CHAR_SPACE:
+                *p_str_copy = ASCII_CHAR_NULL;
+                 val        = NetCmd_ArgsParserTranslateID_Nbr(p_str, &err);
+                *p_str_copy = ASCII_CHAR_SPACE;
+                 p_str_next = p_str_copy + 1;
+                 goto exit;
+
+
+            case NET_CMD_ARG_BEGIN:
+                 goto exit;
+
+            default:
+                p_str_copy++;
+                break;
+        }
+    }
+
+exit:
+    return (val);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetCmd_DictionaryGet()
+*
+* Description : Find dictionary key by comparing string with dictionary string entries.
+*
+* Argument(s) : p_dictionary_tbl    Pointer on the dictionary table.
+*
+*               dictionary_size     Size of the dictionary in octet.
+*
+*               p_str_cmp           Pointer to string to find key.
+*               ---------           Argument validated by callers.
+*
+*               str_len             Length of the string.
+*
+* Return(s)   :
+*
+* Caller(s)   : NetDev_MgmtProcessRespScan().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+static CPU_INT32U  NetCmd_DictionaryGet  (const  NET_CMD_DICTIONARY *p_dictionary_tbl,
+                                                 CPU_INT32U          dictionary_size,
+                                          const  CPU_CHAR           *p_str_cmp,
+                                                 CPU_INT32U          str_len)
+{
+    CPU_INT32U           nbr_entry;
+    CPU_INT32U           ix;
+    CPU_INT32U           len;
+    CPU_INT16S           cmp;
+    NET_CMD_DICTIONARY  *p_srch;
+
+
+    nbr_entry =  dictionary_size / sizeof(NET_CMD_DICTIONARY);
+    p_srch    = (NET_CMD_DICTIONARY *)p_dictionary_tbl;
+    for (ix = 0; ix < nbr_entry; ix++) {
+        len = DEF_MIN(str_len, p_srch->StrLen);
+        cmp = Str_Cmp_N(p_str_cmp, p_srch->StrPtr, len);
+        if (cmp == 0) {
+            return (p_srch->Key);
+        }
+        p_srch++;
+    }
+
+    return (NET_CMD_DICTIONARY_KEY_INVALID);
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd.h
new file mode 100644
index 0000000..aea62f7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd.h
@@ -0,0 +1,495 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK SHELL COMMAND
+*
+* Filename      : net_cmd.h
+* Version       : V3.03.01
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V3.01.00
+*                     (b) uC/OS-II  V2.90.00 or
+*                         uC/OS-III V3.03.01
+*                     (c) uC/Shell  V1.03.01
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_CMD_MODULE_PRESENT
+#define  NET_CMD_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The following common software files are located in the following directories :
+*
+*               (a) \\lib*.*
+*
+*               (b) (1) \\cpu_def.h
+*
+*                   (2) \\\\cpu*.*
+*
+*                   where
+*                         directory path for custom   library      software
+*                           directory path for common   CPU-compiler software
+*                                              directory name for specific processor (CPU)
+*                                         directory name for specific compiler
+*
+*           (2)
+*
+*           (3) NO compiler-supplied standard library functions SHOULD be used.
+*********************************************************************************************************
+*/
+
+#include  "Source/net_cfg_net.h"
+#include  "../Source/net_type.h"
+#include  "net_cmd_output.h"
+#include  "../IF/net_if_802x.h"
+#include  "../IF/net_if_wifi.h"
+
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ipv6.h"
+#include  "../IP/IPv6/net_ndp.h"
+#endif
+
+#include 
+#include 
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_CMD_STR_USER_MAX_LEN          256
+#define  NET_CMD_STR_PASSWORD_MAX_LEN      256
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  enum net_cmd_type {
+    NET_CMD_TYPE_HELP,
+    NET_CMD_TYPE_IF_CONFIG,
+    NET_CMD_TYPE_IF_RESET,
+    NET_CMD_TYPE_ROUTE_ADD,
+    NET_CMD_TYPE_ROUTE_REMOVE,
+    NET_CMD_TYPE_PING,
+    NET_CMD_TYPE_IP_SETUP,
+    NET_CMD_TYPE_IPV6_AUTOCFG,
+    NET_CMD_TYPE_NDP_CLR_CACHE,
+    NET_CMD_TYPE_NDP_CACHE_STATE,
+    NET_CMD_TYPE_NDP_CACHE_IS_ROUTER,
+} NET_CMD_TYPE;
+
+typedef enum net_cmd_err {
+    NET_CMD_ERR_NONE                       =   0,              /* No errors.                                            */
+    NET_CMD_ERR_FAULT                      =   1,
+    NET_CMD_ERR_LINK_DOWN                  =   2,
+
+
+    NET_CMD_ERR_TCPIP_INIT                 =  10,
+    NET_CMD_ERR_TCPIP_IF_ADD               =  11,
+    NET_CMD_ERR_TCPIP_IF_START             =  12,
+    NET_CMD_ERR_TCPIP_MAC_CFG              =  13,
+    NET_CMD_ERR_TCPIP_MISSING_MODULE       =  14,
+
+
+    NET_CMD_ERR_SHELL_INIT                 =  20,              /* Command table not added to uC-Shell.                    */
+
+    NET_CMD_ERR_CMD_ARG_INVALID            =  30,
+
+
+    NET_CMD_ERR_IF_INVALID                 =  40,
+
+    NET_CMD_ERR_IPv4_ADDR_CFGD             =  50,
+    NET_CMD_ERR_IPv4_ADDR_TBL_FULL         =  51,
+    NET_CMD_ERR_IPv4_ADDR_TBL_EMPTY        =  52,
+    NET_CMD_ERR_IPv4_ADDR_INVALID          =  53,
+    NET_CMD_ERR_IPv4_ADDR_NOT_FOUND        =  54,
+    NET_CMD_ERR_IPv4_ADDR_IN_USE           =  55,
+
+    NET_CMD_ERR_IPv6_ADDR_CFGD             =  60,
+    NET_CMD_ERR_IPv6_ADDR_TBL_FULL         =  61,
+    NET_CMD_ERR_IPv6_ADDR_TBL_EMPTY        =  62,
+    NET_CMD_ERR_IPv6_ADDR_INVALID          =  63,
+    NET_CMD_ERR_IPv6_ADDR_NOT_FOUND        =  64,
+
+
+    NET_CMD_ERR_PARSER_ARG_NOT_EN          =  70,
+    NET_CMD_ERR_PARSER_ARG_INVALID         =  71,
+    NET_CMD_ERR_PARSER_ARG_VALUE_INVALID   =  72,
+
+    NET_CMD_ERR_RX_Q_EMPTY                 =  80,
+    NET_CMD_ERR_RX_Q_SIGNAL_FAULT          =  81,
+
+    NET_CMD_ERR_MEM_POOL_CREATE            =  90,
+
+} NET_CMD_ERR;
+
+
+typedef  struct  net_cmd_ipv4_ascii_cfg {
+    CPU_CHAR           *HostPtr;
+    CPU_CHAR           *MaskPtr;
+    CPU_CHAR           *GatewayPtr;
+} NET_CMD_IPv4_ASCII_CFG;
+
+typedef  struct  net_cmd_ipv4_cfg {
+    NET_IPv4_ADDR       Host;
+    NET_IPv4_ADDR       Mask;
+    NET_IPv4_ADDR       Gateway;
+} NET_CMD_IPv4_CFG;
+
+typedef  struct  net_cmd_ipv6_ascii_cfg {
+    CPU_CHAR           *HostPtr;
+    CPU_CHAR           *PrefixLenPtr;
+} NET_CMD_IPv6_ASCII_CFG;
+
+typedef  struct  net_cmd_ipv6_cfg {
+    NET_IPv6_ADDR       Host;
+    CPU_INT08U          PrefixLen;
+} NET_CMD_IPv6_CFG;
+
+typedef  struct  net_cmd_mac_arg {
+    CPU_INT08U          MAC_Addr[NET_IF_802x_HW_ADDR_LEN];
+} NET_CMD_MAC_CFG;
+
+
+typedef  struct  net_cmd_credential_ascii_cfg {
+    CPU_CHAR           *User_Ptr;
+    CPU_CHAR           *Password_Ptr;
+} NET_CMD_CREDENTIAL_ASCII_CFG;
+
+typedef  struct  net_cmd_credential {
+    CPU_CHAR            User[NET_CMD_STR_USER_MAX_LEN];
+    CPU_CHAR            Password[NET_CMD_STR_PASSWORD_MAX_LEN];
+} NET_CMD_CREDENTIAL_CFG;
+
+typedef  struct net_cmd_ping_arg {
+    NET_IF_NBR          IF_Nbr;
+    NET_IP_ADDR_FAMILY  family;
+    CPU_INT08U          Addr[16];
+    CPU_INT16U          DataLen;
+    CPU_INT32U          Cnt;
+#if 0
+    CPU_BOOLEAN         Background;
+#endif
+} NET_CMD_PING_ARG;
+
+
+typedef  struct net_cmd_ping_cmd_arg {
+    CPU_CHAR           *IF_NbrPtr;
+    CPU_CHAR           *AddrPtr;
+    CPU_CHAR           *DataLenPtr;
+    CPU_CHAR           *CntPtr;
+} NET_CMD_PING_CMD_ARG;
+#ifdef  NET_IF_WIFI_MODULE_EN
+typedef  struct net_cmd_wifi_scan_arg {
+    NET_IF_NBR          IF_Nbr;
+    NET_IF_WIFI_SSID    SSID;
+    NET_IF_WIFI_CH      Ch;
+} NET_CMD_WIFI_SCAN_ARG;
+
+typedef  struct net_cmd_wifi_join_arg {
+    NET_IF_NBR                   IF_Nbr;
+    NET_IF_WIFI_SSID             SSID;
+    NET_IF_WIFI_PSK              PSK;
+    NET_IF_WIFI_NET_TYPE         NetType;                               /* Wifi AP net type.                            */
+    NET_IF_WIFI_SECURITY_TYPE    SecurityType;                          /* WiFi AP security type.                       */
+} NET_CMD_WIFI_JOIN_ARG;
+
+typedef  struct net_cmd_wifi_create_arg {
+    NET_IF_NBR                   IF_Nbr;
+    NET_IF_WIFI_SSID             SSID;
+    NET_IF_WIFI_PSK              PSK;
+    NET_IF_WIFI_CH               Ch;
+    NET_IF_WIFI_NET_TYPE         NetType;                               /* Wifi AP net type.                            */
+    NET_IF_WIFI_SECURITY_TYPE    SecurityType;                          /* WiFi AP security type.                       */
+} NET_CMD_WIFI_CREATE_ARG;
+
+#endif
+
+typedef  struct  net_cmd_args {
+    CPU_INT08U              WindowsIF_Nbr;
+
+    CPU_BOOLEAN             IPv4_CfgEn;
+    NET_CMD_IPv4_CFG        IPv4;
+
+    CPU_BOOLEAN             IPv6_CfgEn;
+    NET_CMD_IPv6_CFG        IPv6;
+
+    CPU_BOOLEAN             MAC_CfgEn;
+    NET_CMD_MAC_CFG         MAC_Addr;
+
+    CPU_BOOLEAN             Credential_CfgEn;
+    NET_CMD_CREDENTIAL_CFG  Credential;
+
+    CPU_BOOLEAN             Telnet_Reqd;
+} NET_CMD_ARGS;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  CPU_BOOLEAN  NetCmd_InitDone;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void                  NetCmd_Init                 (NET_CMD_ERR           *p_err);
+
+void                  NetCmd_Start                (NET_TASK_CFG          *p_rx_task_cfg,
+                                                   NET_TASK_CFG          *p_tx_task_cfg,
+                                                   NET_TASK_CFG          *p_tmr_task_cfg,
+                                                   void                  *p_if_api,
+                                                   void                  *p_dev_api,
+                                                   void                  *p_dev_bsp,
+                                                   void                  *p_dev_cfg,
+                                                   void                  *p_ext_api,
+                                                   void                  *p_ext_cfg,
+                                                   NET_CMD_ARGS          *p_cmd_args,
+                                                   NET_CMD_ERR           *p_err);
+
+
+CPU_INT16S            NetCmd_Help                 (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_IF_Config            (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_IF_Reset             (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_IF_SetMTU            (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_IF_RouteAdd          (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_IF_RouteRemove       (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+void                  NetCmd_IF_IPv4AddrCfgStatic (NET_IF_NBR             if_id,
+                                                   NET_CMD_IPv4_CFG      *p_ip_cfg,
+                                                   NET_CMD_ERR           *p_err);
+
+void                  NetCmd_IF_IPv6AddrCfgStatic (NET_IF_NBR             if_id,
+                                                   NET_CMD_IPv6_CFG      *p_ip_cfg,
+                                                   NET_CMD_ERR           *p_err);
+
+void                  NetCmd_IF_IPv4AddrRemove    (NET_IF_NBR              if_id,
+                                                   NET_CMD_IPv4_CFG      *p_ip_cfg,
+                                                   NET_CMD_ERR           *p_err);
+
+void                  NetCmd_IF_IPv6AddrRemove    (NET_IF_NBR              if_id,
+                                                   NET_CMD_IPv6_CFG      *p_ip_cfg,
+                                                   NET_CMD_ERR           *p_err);
+
+CPU_INT16S            NetCmd_Ping                 (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+#ifdef  NET_IPv4_MODULE_EN
+CPU_INT16S            NetCmd_IP_Config            (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+#endif
+
+CPU_INT16S            NetCmd_IF_Start             (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_IF_Stop              (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+#ifdef  NET_IF_WIFI_MODULE_EN
+CPU_INT16S            NetCmd_WiFi_Scan            (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_WiFi_Join            (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_WiFi_Create          (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_WiFi_Leave           (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_WiFi_GetPeerInfo     (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_WiFi_Status          (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+#endif
+
+
+CPU_INT16S            NetCmd_Sock_Open            (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_Sock_Close           (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_Sock_Bind            (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_Sock_Listen          (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_Sock_Accept          (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_Sock_Conn            (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_Sock_Rx              (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+CPU_INT16S            NetCmd_Sock_Tx              (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+#if 0
+CPU_INT16S            NetCmd_Sock_Sel             (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+#endif
+
+CPU_INT16S            NetCmd_SockOptSetChild      (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   SHELL_OUT_FNCT         out_fnct,
+                                                   SHELL_CMD_PARAM       *p_cmd_param);
+
+NET_CMD_PING_CMD_ARG  NetCmd_PingCmdArgParse      (CPU_INT16U             argc,
+                                                   CPU_CHAR              *p_argv[],
+                                                   NET_CMD_ERR           *p_err);
+
+NET_CMD_PING_ARG      NetCmd_PingCmdArgTranslate  (NET_CMD_PING_CMD_ARG  *p_cmd_args,
+                                                   NET_CMD_ERR           *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                     TRACE / DEBUG CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                       0
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                      1
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                       2
+#endif
+
+#ifndef  NET_CMD_TRACE_LEVEL
+#define  NET_CMD_TRACE_LEVEL             TRACE_LEVEL_OFF
+#endif
+
+
+#ifndef  NET_CMD_TRACE
+#define  NET_CMD_TRACE                   printf
+#endif
+
+#define  NET_CMD_TRACE_INFO(x)           ((NET_CMD_TRACE_LEVEL >= TRACE_LEVEL_INFO)  ? (void)(NET_CMD_TRACE x) : (void)0)
+#define  NET_CMD_TRACE_DBG(x)            ((NET_CMD_TRACE_LEVEL >= TRACE_LEVEL_DBG)   ? (void)(NET_CMD_TRACE x) : (void)0)
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_args_parser.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_args_parser.c
new file mode 100644
index 0000000..bb1f289
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_args_parser.c
@@ -0,0 +1,1279 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                             NETWORK COMMAND ARGUMENT PARSING UTILITIES
+*
+* Filename      : net_cmd_args_parser.c
+* Version       : V3.03.01
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V3.01.00
+*                     (b) uC/OS-II  V2.90.00 or
+*                         uC/OS-III V3.03.01
+*                     (c) uC/Shell  V1.03.01
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  NET_CMD_ARGS_PARSER_MODULE
+
+#include  "net_cmd_args_parser.h"
+#include  "../IF/net_if.h"
+
+
+
+
+
+#define  NET_CMD_ARG_PARSER_CMD_BEGIN              ASCII_CHAR_HYPHEN_MINUS
+
+#define  NET_CMD_ARG_PARSER_CMD_WINDOWS_IF_NBR     ASCII_CHAR_LATIN_LOWER_W
+#define  NET_CMD_ARG_PARSER_CMD_IPv4_ADDR_CFG      ASCII_CHAR_DIGIT_FOUR
+#define  NET_CMD_ARG_PARSER_CMD_IPv6_ADDR_CFG      ASCII_CHAR_DIGIT_SIX
+#define  NET_CMD_ARG_PARSER_CMD_MAC_ADDR_CFG       ASCII_CHAR_LATIN_LOWER_M
+#define  NET_CMD_ARG_PARSER_CMD_ID_CFG             ASCII_CHAR_LATIN_LOWER_I
+#define  NET_CMD_ARG_PARSER_CMD_TELNET_CFG         ASCII_CHAR_LATIN_LOWER_T
+
+
+static  NET_CMD_STR_ARGS  NetCmd_ArgsParserParse (CPU_INT16U    argc,
+                                                  CPU_CHAR     *p_argv[],
+                                                  NET_CMD_ERR  *p_err);
+
+static  NET_CMD_ARGS  NetCmd_ArgsParserTranslate (NET_CMD_STR_ARGS   cmd_args,
+                                                  NET_CMD_ERR       *p_err);
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_ArgsParserCmdParse()
+*
+* Description : Parse command line arguments.
+*
+* Argument(s) : argc    is a count of the arguments supplied.
+*
+*               p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : Return Network command arguments parsed.
+*
+* Caller(s)   : main().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_CMD_ARGS  NetCmd_ArgsParserCmdParse (CPU_INT16U    argc,
+                                         CPU_CHAR     *p_argv[],
+                                         NET_CMD_ERR  *p_err)
+{
+    NET_CMD_ARGS      args;
+    NET_CMD_STR_ARGS  cmd_args;
+
+
+    args.IPv4_CfgEn = DEF_NO;
+    args.IPv6_CfgEn = DEF_NO;
+
+    cmd_args = NetCmd_ArgsParserParse(argc, p_argv, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+        return (args);
+    }
+
+
+
+    args = NetCmd_ArgsParserTranslate(cmd_args, p_err);
+    if (*p_err != NET_CMD_ERR_NONE) {
+        return (args);
+    }
+
+
+    return (args);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetCmd_ArgsParserParseID_Nbr()
+*
+* Description : Validate that the argument value is an interface number.
+*
+* Argument(s) : p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_str_if_nbr    Pointer wich will receive the location of the Interface values to convert.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : DEF_OK, Argument is an interface number.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetCmd_ArgsParserParse(),
+*               NetCmd_MTU_CmdArgParse(),
+*               NetCmd_PingCmdArgParse(),
+*               NetCmd_ResetCmdArgParse(),
+*               NetCmd_RouteCmdArgParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetCmd_ArgsParserParseID_Nbr (CPU_CHAR      *p_argv[],
+                                          CPU_CHAR     **p_str_if_nbr,
+                                          NET_CMD_ERR   *p_err)
+{
+    CPU_BOOLEAN  dig;
+
+
+   *p_str_if_nbr = p_argv[1];
+    dig = ASCII_IS_DIG(**p_str_if_nbr);
+    if (dig == DEF_NO) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (DEF_FAIL);
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetCmd_ArgsParserTranslateID_Nbr()
+*
+* Description : Translate Interface number argument.
+*
+* Argument(s) : p_str_if_nbr    String that contains the interface number.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Interface number translated, if successfully converted,
+*
+*               NET_IF_NBR_NONE, otherwise.
+*
+* Caller(s)   : NetCmd_ArgsParserTranslate(),
+*               NetCmd_MTU_Translate(),
+*               NetCmd_PingCmdArgTranslate(),
+*               NetCmd_ResetTranslate(),
+*               NetCmd_RouteTranslate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetCmd_ArgsParserTranslateID_Nbr (CPU_CHAR     *p_str_if_nbr,
+                                              NET_CMD_ERR  *p_err)
+{
+    CPU_INT16U  id;
+
+
+    id = NET_IF_NBR_NONE;
+
+    if (p_str_if_nbr != DEF_NULL) {
+        id = Str_ParseNbr_Int32U(p_str_if_nbr, DEF_NULL, DEF_NBR_BASE_DEC);
+
+    } else {
+        id = NET_IF_NBR_NONE;
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_ArgsParserParseIPv4()
+*
+* Description : Validate and local argument values of an IPv4 address configuration structure.
+*
+* Argument(s) : p_argv    an array of pointers to the strings which are those arguments
+*
+*               p_ip_cfg  Pointer to a variable that will receive the location of each IPv4 configuration field
+*                         to be converted.
+*
+*               p_err     Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : 3, if no error.
+*
+*               0, otherwise.
+*
+* Caller(s)   : NetCmd_ArgsParserParse(),
+*               NetCmd_RouteCmdArgParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetCmd_ArgsParserParseIPv4 (CPU_CHAR                *p_argv[],
+                                        NET_CMD_IPv4_ASCII_CFG  *p_ip_cfg,
+                                        NET_CMD_ERR             *p_err)
+{
+#ifdef NET_IPv4_MODULE_EN
+    CPU_BOOLEAN  dig;
+
+
+    dig = ASCII_IS_DIG_HEX(*p_argv[1]);
+    if (dig == DEF_YES) {
+        p_ip_cfg->HostPtr = p_argv[1];
+    } else {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+        return (0);
+    }
+
+    dig = ASCII_IS_DIG_HEX(*p_argv[2]);
+    if (dig == DEF_YES) {
+        p_ip_cfg->MaskPtr = p_argv[2];
+    } else {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+        return (0);
+    }
+
+    dig = ASCII_IS_DIG_HEX(*p_argv[3]);
+    if (dig == DEF_YES) {
+        p_ip_cfg->GatewayPtr = p_argv[3];
+    } else {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (0);
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+    return (3);
+
+#else
+   *p_err = NET_CMD_ERR_PARSER_ARG_NOT_EN;
+    return (0);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetCmd_ArgsParserTranslateIPv4()
+*
+* Description : Translate IPv4 argument value to an IPv4 address configuration structure.
+*
+* Argument(s) : p_ip_cfg    Structure that contains IPv4 addresses to convert.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Address configuration structure.
+*
+* Caller(s)   : NetCmd_ArgsParserTranslate(),
+*               NetCmd_RouteTranslate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+NET_CMD_IPv4_CFG  NetCmd_ArgsParserTranslateIPv4 (NET_CMD_IPv4_ASCII_CFG  *p_ip_cfg,
+                                                  NET_CMD_ERR             *p_err)
+{
+    NET_CMD_IPv4_CFG  ip_cfg;
+    NET_ERR           err;
+
+
+    ip_cfg.Host = NetASCII_Str_to_IPv4(p_ip_cfg->HostPtr, &err);
+    if (err != NET_ASCII_ERR_NONE) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (ip_cfg);
+    }
+
+
+    ip_cfg.Mask = NetASCII_Str_to_IPv4(p_ip_cfg->MaskPtr, &err);
+    if (err != NET_ASCII_ERR_NONE) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (ip_cfg);
+    }
+
+
+    ip_cfg.Gateway = NetASCII_Str_to_IPv4(p_ip_cfg->GatewayPtr, &err);
+    if (err != NET_ASCII_ERR_NONE) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (ip_cfg);
+    }
+
+    *p_err = NET_CMD_ERR_NONE;
+
+
+    return (ip_cfg);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_ArgsParserParseIPv6()
+*
+* Description : Validate and local argument values of an IPv6 address configuration structure.
+*
+* Argument(s) : p_argv    an array of pointers to the strings which are those arguments
+*
+*               p_ip_cfg  Pointer to a variable that will receive the location of each IPv6 configuration field
+*                         to be converted.
+*
+*               p_err     Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : 2, if no error.
+*
+*               0, otherwise.
+*
+* Caller(s)   : NetCmd_ArgsParserParse(),
+*               NetCmd_RouteCmdArgParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetCmd_ArgsParserParseIPv6 (CPU_CHAR                *p_argv[],
+                                        NET_CMD_IPv6_ASCII_CFG  *p_ip_cfg,
+                                        NET_CMD_ERR             *p_err)
+{
+#ifdef NET_IPv6_MODULE_EN
+    CPU_BOOLEAN  dig_hex;
+
+
+    dig_hex = ASCII_IS_DIG_HEX(*p_argv[1]);
+    if (dig_hex == DEF_YES) {
+        p_ip_cfg->HostPtr = p_argv[1];
+    } else {
+       *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+        return (0);
+    }
+
+    dig_hex = ASCII_IS_DIG_HEX(*p_argv[2]);
+    if (dig_hex == DEF_YES) {
+        p_ip_cfg->PrefixLenPtr = p_argv[2];
+    } else {
+       *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+        return (0);
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+    return (2);
+
+#else
+    (void)&p_argv;
+    (void)&p_ip_cfg;
+
+    *p_err = NET_CMD_ERR_PARSER_ARG_NOT_EN;
+     return (0);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetCmd_ArgsParserTranslateIPv6()
+*
+* Description : Translate IPv6 argument value to an IPv6 address configuration structure.
+*
+* Argument(s) : p_ip_cfg    Structure that contains IPv4 addresses to convert.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Address configuration structure.
+*
+* Caller(s)   : NetCmd_ArgsParserTranslate(),
+*               NetCmd_RouteTranslate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+NET_CMD_IPv6_CFG  NetCmd_ArgsParserTranslateIPv6 (NET_CMD_IPv6_ASCII_CFG  *p_ip_cfg,
+                                                    NET_CMD_ERR             *p_err)
+{
+    NET_CMD_IPv6_CFG  ip_cfg;
+    NET_ERR            err;
+
+
+    ip_cfg.Host = NetASCII_Str_to_IPv6(p_ip_cfg->HostPtr, &err);
+    if (err != NET_ASCII_ERR_NONE) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (ip_cfg);
+    }
+
+
+    ip_cfg.PrefixLen = Str_ParseNbr_Int32U(p_ip_cfg->PrefixLenPtr, DEF_NULL, DEF_NBR_BASE_DEC);
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (ip_cfg);
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_ArgsParserParseMAC()
+*
+* Description : Validate and local argument values of an MAC address configuration structure.
+*
+* Argument(s) : p_argv    an array of pointers to the strings which are those arguments
+*
+*               p_ip_cfg  Pointer to a variable that will receive the location of each IPv6 configuration field
+*                         to be converted.
+*
+*               p_err     Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : 1, if no error.
+*
+*               0, otherwise.
+*
+* Caller(s)   : NetCmd_ArgsParserParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetCmd_ArgsParserParseMAC (CPU_CHAR      *p_argv[],
+                                       CPU_CHAR     **p_str_mac,
+                                       NET_CMD_ERR   *p_err)
+{
+    CPU_BOOLEAN  dig_hex;
+
+
+    dig_hex = ASCII_IS_DIG_HEX(*p_argv[1]);
+    if (dig_hex == DEF_YES) {
+       *p_str_mac = p_argv[1];
+    } else {
+       *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+        return (0);
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (1);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetCmd_ArgsParserTranslateMAC()
+*
+* Description : Translate MAC address argument value to a MAC address configuration structure.
+*
+* Argument(s) : p_str_mac    String that contains MAC address to convert.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : MAC Address configuration structure.
+*
+* Caller(s)   : NetCmd_ArgsParserTranslate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_CMD_MAC_CFG  NetCmd_ArgsParserTranslateMAC (CPU_CHAR     *p_str_mac,
+                                                NET_CMD_ERR  *p_err)
+{
+    NET_CMD_MAC_CFG  mac_cfg;
+    NET_ERR           net_err;
+
+    NetASCII_Str_to_MAC(                p_str_mac,
+                        (CPU_INT08U  *)&mac_cfg.MAC_Addr,
+                                       &net_err);
+    if (net_err != NET_ASCII_ERR_NONE) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (mac_cfg);
+    }
+
+    *p_err = NET_CMD_ERR_NONE;
+
+    return (mac_cfg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetCmd_ArgsParserParseDataLen()
+*
+* Description : Validate and local argument values of data length.
+*
+* Argument(s) : p_argv    an array of pointers to the strings which are those arguments
+*
+*               p_ip_cfg  Pointer to a string will receive the location of the argument value.
+*
+*               p_err     Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : 1, if no error.
+*
+*               0, otherwise.
+*
+* Caller(s)   : NetCmd_PingCmdArgParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetCmd_ArgsParserParseDataLen (CPU_CHAR      *p_argv[],
+                                           CPU_CHAR     **p_str_len,
+                                           NET_CMD_ERR   *p_err)
+{
+    CPU_BOOLEAN  dig;
+
+
+   *p_str_len = p_argv[1];
+    dig = ASCII_IS_DIG(**p_str_len);
+    if (dig == DEF_NO) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (0);
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (1);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetCmd_ArgsParserTranslateDataLen()
+*
+* Description : Translate MAC address argument value to a MAC address configuration structure.
+*
+* Argument(s) : p_str_mac    String that contains MAC length to convert.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Length converted.
+*
+* Caller(s)   : NetCmd_PingCmdArgTranslate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetCmd_ArgsParserTranslateDataLen (CPU_CHAR     *p_str_len,
+                                               NET_CMD_ERR  *p_err)
+{
+    CPU_INT16U  data_len;
+
+
+    if (p_str_len != DEF_NULL) {
+        data_len = Str_ParseNbr_Int32U(p_str_len, DEF_NULL, DEF_NBR_BASE_DEC);
+
+    } else {
+        data_len = 0;
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (data_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetCmd_ArgsParserParseDataLen()
+*
+* Description : Validate and local argument values of data length.
+*
+* Argument(s) : p_argv    an array of pointers to the strings which are those arguments
+*
+*               p_ip_cfg  Pointer to a string will receive the location of the argument value.
+*
+*               p_err     Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : 1, if no error.
+*
+*               0, otherwise.
+*
+* Caller(s)   : NetCmd_PingCmdArgParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetCmd_ArgsParserTranslateVal32U (CPU_CHAR     *p_str_len,
+                                              NET_CMD_ERR  *p_err)
+{
+    CPU_INT32U  val;
+
+
+    if (p_str_len != DEF_NULL) {
+        val = Str_ParseNbr_Int32U(p_str_len, DEF_NULL, DEF_NBR_BASE_DEC);
+
+    } else {
+        val = 0;
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (val);
+}
+
+/*
+*********************************************************************************************************
+*                                    NetCmd_ArgsParserParseDataLen()
+*
+* Description : Validate and local argument values of data length.
+*
+* Argument(s) : p_argv    an array of pointers to the strings which are those arguments
+*
+*               p_ip_cfg  Pointer to a string will receive the location of the argument value.
+*
+*               p_err     Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : 1, if no error.
+*
+*               0, otherwise.
+*
+* Caller(s)   : NetCmd_PingCmdArgParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetCmd_ArgsParserParseFmt (CPU_CHAR      *p_argv[],
+                                       CPU_CHAR     **p_str_len,
+                                       NET_CMD_ERR   *p_err)
+{
+    CPU_BOOLEAN  char_val;
+
+
+   *p_str_len = p_argv[1];
+
+   char_val = ASCII_IS_PRINT(**p_str_len);
+    if (char_val == DEF_NO) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (0);
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (1);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetCmd_ArgsParserTranslateSockFamily()
+*
+* Description : Translate Interface number argument.
+*
+* Argument(s) : p_str_if_nbr    String that contains the interface number.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Interface number translated, if successfully converted,
+*
+*               NET_IF_NBR_NONE, otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_CMD_OUTPUT_FMT  NetCmd_ArgsParserTranslateFmt (CPU_CHAR     *p_char_type,
+                                                   NET_CMD_ERR  *p_err)
+{
+    NET_CMD_OUTPUT_FMT  fmt;
+
+
+    switch (*p_char_type) {
+        case 'h':
+        default:
+             fmt = NET_CMD_OUTPUT_FMT_HEX;
+             break;
+
+        case 's':
+             fmt = NET_CMD_OUTPUT_FMT_STRING;
+             break;
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (fmt);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetCmd_ArgsParserParseCredential()
+*
+* Description : Validate and local argument values of credential structure.
+*
+* Argument(s) : p_argv          an array of pointers to the strings which are those arguments.
+*
+*               p_credential    Pointer to a credential arguments values.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : 2, if no error.
+*
+*               0, otherwise.
+*
+* Caller(s)   : NetCmd_ArgsParserParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetCmd_ArgsParserParseCredential (CPU_CHAR                      *p_argv[],
+                                              NET_CMD_CREDENTIAL_ASCII_CFG  *p_credential,
+                                              NET_CMD_ERR                   *p_err)
+{
+    p_credential->User_Ptr     = p_argv[1];
+    p_credential->Password_Ptr = p_argv[2];
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (2);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetCmd_ArgsParserTranslateCredential()
+*
+* Description : Translate credential argument values to a Credential configuration structure.
+*
+* Argument(s) : p_credential    Structure that contains credential values.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Length converted.
+*
+* Caller(s)   : NetCmd_ArgsParserTranslate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_CMD_CREDENTIAL_CFG  NetCmd_ArgsParserTranslateCredential (NET_CMD_CREDENTIAL_ASCII_CFG  *p_credential,
+                                                              NET_CMD_ERR                   *p_err)
+{
+    NET_CMD_CREDENTIAL_CFG  credential_cfg;
+
+    if ((p_credential->User_Ptr     != DEF_NULL) &&
+        (p_credential->Password_Ptr != DEF_NULL)) {
+        Str_Copy_N(credential_cfg.User,     p_credential->User_Ptr,     NET_CMD_STR_USER_MAX_LEN);
+        Str_Copy_N(credential_cfg.Password, p_credential->Password_Ptr, NET_CMD_STR_PASSWORD_MAX_LEN);
+
+    } else {
+        credential_cfg.User[0]     = ASCII_CHAR_NULL;
+        credential_cfg.Password[0] = ASCII_CHAR_NULL;
+       *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+        return (credential_cfg);
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (credential_cfg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetCmd_ArgsParserParseMTU()
+*
+* Description : Validate and local argument values of MTU.
+*
+* Argument(s) : p_argv     an array of pointers to the strings which are those arguments
+*
+*               p_str_len  Pointer to a string will receive the location of the argument value.
+*
+*               p_err      Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : 1, if no error.
+*
+*               0, otherwise.
+*
+* Caller(s)   : NetCmd_MTU_CmdArgParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetCmd_ArgsParserParseMTU (CPU_CHAR      *p_argv[],
+                                       CPU_CHAR     **p_str_len,
+                                       NET_CMD_ERR   *p_err)
+{
+    CPU_BOOLEAN  dig;
+
+
+   *p_str_len = p_argv[1];
+    dig = ASCII_IS_DIG(**p_str_len);
+    if (dig == DEF_NO) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (0);
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (1);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetCmd_ArgsParserTranslateMTU()
+*
+* Description : Translate MTU argument value.
+*
+* Argument(s) : p_str_mac    String that contains MTU value to convert.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : MTU converted.
+*
+* Caller(s)   : NetCmd_MTU_Translate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetCmd_ArgsParserTranslateMTU (CPU_CHAR     *p_str_len,
+                                           NET_CMD_ERR  *p_err)
+{
+    CPU_INT16U  mtu;
+
+
+    if (p_str_len != DEF_NULL) {
+        mtu = Str_ParseNbr_Int32U(p_str_len, DEF_NULL, DEF_NBR_BASE_DEC);
+
+    } else {
+        mtu = NET_IF_MTU_ETHER;
+    }
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (mtu);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetCmd_ArgsParserParseMTU()
+*
+* Description : Validate and convert argument values of MTU.
+*
+* Argument(s) : p_argv     an array of pointers to the strings which are those arguments
+*
+*               p_str_len  Pointer to a string will receive the location of the argument value.
+*
+*               p_err      Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : 1, if no error.
+*
+*               0, otherwise.
+*
+* Caller(s)   : NetCmd_MTU_CmdArgParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetCmd_ArgsParserParseSockFamily (CPU_CHAR      *p_argv[],
+                                              CPU_CHAR     **p_str_family,
+                                              NET_CMD_ERR   *p_err)
+{
+    CPU_BOOLEAN  dig;
+
+
+   *p_str_family = p_argv[0];
+    dig = ASCII_IS_DIG(**p_str_family);
+    if (dig == DEF_NO) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (0);
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (1);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetCmd_ArgsParserTranslateSockFamily()
+*
+* Description : Translate Interface number argument.
+*
+* Argument(s) : p_str_if_nbr    String that contains the interface number.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Interface number translated, if successfully converted,
+*
+*               NET_IF_NBR_NONE, otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_SOCK_PROTOCOL_FAMILY  NetCmd_ArgsParserTranslateSockFamily (CPU_CHAR     *p_char_family,
+                                                                NET_CMD_ERR  *p_err)
+{
+    NET_SOCK_PROTOCOL_FAMILY  family = NET_SOCK_PROTOCOL_FAMILY_NONE;
+
+
+    switch (*p_char_family) {
+        case '4':
+             family = NET_SOCK_PROTOCOL_FAMILY_IP_V4;
+             break;
+
+        case '6':
+            family = NET_SOCK_PROTOCOL_FAMILY_IP_V6;
+            break;
+
+        default:
+           *p_err = NET_CMD_ERR_PARSER_ARG_INVALID;
+            goto exit;
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+exit:
+    return (family);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetCmd_ArgsParserParseSockType()
+*
+* Description : Validate and convert argument values of sokcet type.
+*
+* Argument(s) : p_argv     an array of pointers to the strings which are those arguments
+*
+*               p_str_len  Pointer to a string will receive the location of the argument value.
+*
+*               p_err      Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : Socket type
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetCmd_ArgsParserParseSockType (CPU_CHAR      *p_argv[],
+                                            CPU_CHAR     **p_str_len,
+                                            NET_CMD_ERR   *p_err)
+{
+    CPU_BOOLEAN  char_val;
+
+
+   *p_str_len = p_argv[0];
+
+   char_val = ASCII_IS_PRINT(**p_str_len);
+    if (char_val == DEF_NO) {
+        *p_err = NET_CMD_ERR_PARSER_ARG_VALUE_INVALID;
+         return (0);
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (1);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetCmd_ArgsParserTranslateSockFamily()
+*
+* Description : Translate Interface number argument.
+*
+* Argument(s) : p_str_if_nbr    String that contains the interface number.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Interface number translated, if successfully converted,
+*
+*               NET_IF_NBR_NONE, otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_SOCK_TYPE  NetCmd_ArgsParserTranslateSockType (CPU_CHAR      *p_char_type,
+                                                    NET_CMD_ERR  *p_err)
+{
+    NET_SOCK_TYPE  type = NET_SOCK_TYPE_NONE;
+
+
+    switch (*p_char_type) {
+        case 's':
+             type = NET_SOCK_TYPE_STREAM;
+             break;
+
+        case 'd':
+             type = NET_SOCK_TYPE_DATAGRAM;
+             break;
+
+        default:
+            *p_err = NET_CMD_ERR_PARSER_ARG_INVALID;
+             goto exit;
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+exit:
+    return (type);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       NetCmd_ArgsParserParse()
+*
+* Description : Parse command line arguments.
+*
+* Argument(s) : argc    is a count of the arguments supplied.
+*
+*               p_argv  an array of pointers to the strings which are those arguments.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function
+*
+* Return(s)   : Network configuration structure.
+*
+* Caller(s)   : NetCmd_ArgsParserCmdParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_STR_ARGS  NetCmd_ArgsParserParse (CPU_INT16U    argc,
+                                                  CPU_CHAR     *p_argv[],
+                                                  NET_CMD_ERR  *p_err)
+{
+    NET_CMD_STR_ARGS   cmd_arg;
+    CPU_INT16U         i;
+    CPU_INT16U         ix_start;
+
+    NET_CMD_ARGS_PARSER_CMD_ARGS_INIT(cmd_arg);
+    if (*p_argv[0] == NET_CMD_ARG_PARSER_CMD_BEGIN) {
+         ix_start = 0;
+    } else {
+         ix_start = 1;
+    }
+
+
+    for (i = ix_start; i < argc; i++) {
+        if (*p_argv[i] == NET_CMD_ARG_PARSER_CMD_BEGIN) {
+            switch (*(p_argv[i] + 1)) {
+                case NET_CMD_ARG_PARSER_CMD_WINDOWS_IF_NBR:
+                     i += NetCmd_ArgsParserParseID_Nbr(&p_argv[i], &cmd_arg.WindowsIF_Nbr_Ptr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                          return (cmd_arg);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_PARSER_CMD_IPv4_ADDR_CFG:
+                     i += NetCmd_ArgsParserParseIPv4(&p_argv[i], &cmd_arg.AddrIPv4, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                         return (cmd_arg);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_PARSER_CMD_IPv6_ADDR_CFG:
+                     i += NetCmd_ArgsParserParseIPv6(&p_argv[i], &cmd_arg.AddrIPv6, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                         return (cmd_arg);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_PARSER_CMD_MAC_ADDR_CFG:
+                     i += NetCmd_ArgsParserParseMAC(&p_argv[i], &cmd_arg.MAC_Addr_Ptr, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                         return (cmd_arg);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_PARSER_CMD_ID_CFG:
+                     i += NetCmd_ArgsParserParseCredential(&p_argv[i], &cmd_arg.Credential, p_err);
+                     if (*p_err != NET_CMD_ERR_NONE) {
+                         return (cmd_arg);
+                     }
+                     break;
+
+
+                case NET_CMD_ARG_PARSER_CMD_TELNET_CFG:
+                     cmd_arg.Telnet = DEF_YES;
+                     break;
+
+
+                default:
+                    *p_err = NET_CMD_ERR_PARSER_ARG_INVALID;
+                     return (cmd_arg);
+            }
+        } else {
+            *p_err = NET_CMD_ERR_PARSER_ARG_INVALID;
+             return (cmd_arg);
+        }
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (cmd_arg);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_ArgsParserTranslate()
+*
+* Description : Translate argument values.
+*
+* Argument(s) : cmd_args    Argument string values structure.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Network configuration structure.
+*
+* Caller(s)   : NetCmd_ArgsParserCmdParse().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CMD_ARGS  NetCmd_ArgsParserTranslate (NET_CMD_STR_ARGS   cmd_args,
+                                                  NET_CMD_ERR       *p_err)
+{
+    NET_CMD_ARGS  args;
+    NET_CMD_ERR   err;
+
+
+    if (cmd_args.WindowsIF_Nbr_Ptr != DEF_NULL) {
+        args.WindowsIF_Nbr = NetCmd_ArgsParserTranslateID_Nbr(cmd_args.WindowsIF_Nbr_Ptr, p_err);
+        if (*p_err != NET_CMD_ERR_NONE) {
+            return (args);
+        }
+
+    } else {
+        args.WindowsIF_Nbr = 0;
+    }
+
+#ifdef  NET_IPv4_MODULE_EN
+    if (cmd_args.AddrIPv4.HostPtr != DEF_NULL) {
+        args.IPv4 = NetCmd_ArgsParserTranslateIPv4(&cmd_args.AddrIPv4, &err);
+        if (err != NET_CMD_ERR_NONE) {
+            return (args);
+        }
+
+        args.IPv4_CfgEn = DEF_YES;
+
+    } else {
+        args.IPv4_CfgEn = DEF_NO;
+    }
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    if (cmd_args.AddrIPv6.HostPtr != DEF_NULL) {
+        args.IPv6 = NetCmd_ArgsParserTranslateIPv6(&cmd_args.AddrIPv6, &err);
+        if (err != NET_CMD_ERR_NONE) {
+            return (args);
+        }
+        args.IPv6_CfgEn = DEF_YES;
+
+    } else {
+        args.IPv6_CfgEn = DEF_NO;
+    }
+#endif
+
+
+    if (cmd_args.MAC_Addr_Ptr != DEF_NULL) {
+        args.MAC_CfgEn = DEF_YES;
+        args.MAC_Addr = NetCmd_ArgsParserTranslateMAC(cmd_args.MAC_Addr_Ptr, p_err);
+        if (*p_err != NET_CMD_ERR_NONE) {
+             return (args);
+        }
+    } else {
+        args.MAC_CfgEn = DEF_NO;
+    }
+
+
+
+    if (cmd_args.Credential.User_Ptr != DEF_NULL) {
+        args.Credential_CfgEn = DEF_YES;
+        args.Credential = NetCmd_ArgsParserTranslateCredential(&cmd_args.Credential, p_err);
+        if (*p_err != NET_CMD_ERR_NONE) {
+            return (args);
+        }
+
+    } else {
+        args.Credential_CfgEn       = DEF_NO;
+        args.Credential.User[0]     = DEF_NULL;
+        args.Credential.Password[0] = DEF_NULL;
+    }
+
+
+
+    if (cmd_args.Telnet == DEF_YES) {
+        args.Telnet_Reqd = DEF_YES;
+
+    } else {
+        args.Telnet_Reqd = DEF_NO;
+    }
+
+
+   *p_err = NET_CMD_ERR_NONE;
+
+    return (args);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_args_parser.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_args_parser.h
new file mode 100644
index 0000000..c751393
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_args_parser.h
@@ -0,0 +1,233 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                             NETWORK COMMAND ARGUMENT PARSING UTILITIES
+*
+* Filename      : net_cmd_args_parser.h
+* Version       : V3.03.01
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V3.01.00
+*                     (b) uC/OS-II  V2.90.00 or
+*                         uC/OS-III V3.03.01
+*                     (c) uC/Shell  V1.03.01
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../Source/net_cfg_net.h"
+#include  "../Source/net_sock.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_CMD_ARGS_PARSER_MODULE_PRESENT
+#define  NET_CMD_ARGS_PARSER_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The following common software files are located in the following directories :
+*
+*               (a) \\lib*.*
+*
+*               (b) (1) \\cpu_def.h
+*
+*                   (2) \\\\cpu*.*
+*
+*                   where
+*                         directory path for custom   library      software
+*                           directory path for common   CPU-compiler software
+*                                              directory name for specific processor (CPU)
+*                                         directory name for specific compiler
+*
+*           (2)
+*
+*           (3) NO compiler-supplied standard library functions SHOULD be used.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include 
+#include "net_cmd.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+typedef  struct  net_cmd_cmd_args {
+    CPU_CHAR                       *WindowsIF_Nbr_Ptr;
+    NET_CMD_IPv4_ASCII_CFG          AddrIPv4;
+    NET_CMD_IPv6_ASCII_CFG          AddrIPv6;
+    CPU_CHAR                       *MAC_Addr_Ptr;
+    NET_CMD_CREDENTIAL_ASCII_CFG    Credential;
+    CPU_BOOLEAN                     Telnet;
+} NET_CMD_STR_ARGS;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              MACROS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_CMD_ARGS_PARSER_CMD_ARGS_INIT(cmd_args)   {                                                \
+                                                            cmd_args.WindowsIF_Nbr_Ptr       = DEF_NULL; \
+                                                            cmd_args.AddrIPv4.HostPtr        = DEF_NULL; \
+                                                            cmd_args.AddrIPv4.MaskPtr        = DEF_NULL; \
+                                                            cmd_args.AddrIPv4.GatewayPtr     = DEF_NULL; \
+                                                            cmd_args.AddrIPv6.HostPtr        = DEF_NULL; \
+                                                            cmd_args.AddrIPv6.PrefixLenPtr   = DEF_NULL; \
+                                                            cmd_args.MAC_Addr_Ptr            = DEF_NULL; \
+                                                            cmd_args.Credential.User_Ptr     = DEF_NULL; \
+                                                            cmd_args.Credential.Password_Ptr = DEF_NULL; \
+                                                            cmd_args.Telnet                  = DEF_NO;   \
+                                                        }
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+NET_CMD_ARGS              NetCmd_ArgsParserCmdParse           (CPU_INT16U                      argc,
+                                                               CPU_CHAR                       *p_argv[],
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT08U                NetCmd_ArgsParserParseID_Nbr        (CPU_CHAR                       *p_argv[],
+                                                               CPU_CHAR                      **p_str_if_nbr,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT16U                NetCmd_ArgsParserTranslateID_Nbr    (CPU_CHAR                       *p_str_if_nbr,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT08U                NetCmd_ArgsParserParseIPv4          (CPU_CHAR                       *p_argv[],
+                                                               NET_CMD_IPv4_ASCII_CFG         *p_ip_cfg,
+                                                               NET_CMD_ERR                    *p_err);
+
+NET_CMD_IPv4_CFG          NetCmd_ArgsParserTranslateIPv4      (NET_CMD_IPv4_ASCII_CFG         *p_ip_cfg,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT08U                NetCmd_ArgsParserParseIPv6          (CPU_CHAR                       *p_argv[],
+                                                               NET_CMD_IPv6_ASCII_CFG         *p_ip_cfg,
+                                                               NET_CMD_ERR                    *p_err);
+
+NET_CMD_IPv6_CFG          NetCmd_ArgsParserTranslateIPv6      (NET_CMD_IPv6_ASCII_CFG         *p_ip_cfg,
+                                                               NET_CMD_ERR                    *p_err);
+
+
+CPU_INT08U                NetCmd_ArgsParserParseMAC           (CPU_CHAR                       *p_argv[],
+                                                               CPU_CHAR                      **p_str_mac,
+                                                               NET_CMD_ERR                    *p_err);
+
+NET_CMD_MAC_CFG           NetCmd_ArgsParserTranslateMAC       (CPU_CHAR                       *p_str_mac,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT08U                NetCmd_ArgsParserParseDataLen       (CPU_CHAR                       *p_argv[],
+                                                               CPU_CHAR                      **p_str_len,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT08U                NetCmd_ArgsParserParseFmt           (CPU_CHAR                       *p_argv[],
+                                                               CPU_CHAR                      **p_str_len,
+                                                               NET_CMD_ERR                    *p_err);
+
+NET_CMD_OUTPUT_FMT        NetCmd_ArgsParserTranslateFmt       (CPU_CHAR                       *p_char_type,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT16U                NetCmd_ArgsParserTranslateDataLen   (CPU_CHAR                       *p_str_len,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT32U                NetCmd_ArgsParserTranslateVal32U    (CPU_CHAR                       *p_str_len,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT08U                NetCmd_ArgsParserParseCredential    (CPU_CHAR                       *p_argv[],
+                                                               NET_CMD_CREDENTIAL_ASCII_CFG   *p_credential,
+                                                               NET_CMD_ERR                    *p_err);
+
+NET_CMD_CREDENTIAL_CFG    NetCmd_ArgsParserTranslateCredential(NET_CMD_CREDENTIAL_ASCII_CFG   *p_credential,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT08U                NetCmd_ArgsParserParseMTU           (CPU_CHAR                       *p_argv[],
+                                                               CPU_CHAR                      **p_str_len,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT16U                NetCmd_ArgsParserTranslateMTU       (CPU_CHAR                       *p_str_len,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT08U                NetCmd_ArgsParserParseSockFamily    (CPU_CHAR                       *p_argv[],
+                                                               CPU_CHAR                      **p_str_family,
+                                                               NET_CMD_ERR                    *p_err);
+
+NET_SOCK_PROTOCOL_FAMILY  NetCmd_ArgsParserTranslateSockFamily(CPU_CHAR                       *p_char_family,
+                                                               NET_CMD_ERR                    *p_err);
+
+CPU_INT08U                NetCmd_ArgsParserParseSockType      (CPU_CHAR                       *p_argv[],
+                                                               CPU_CHAR                      **p_str_len,
+                                                               NET_CMD_ERR                    *p_err);
+
+NET_SOCK_TYPE             NetCmd_ArgsParserTranslateSockType  (CPU_CHAR                       *p_char_family,
+                                                               NET_CMD_ERR                    *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_output.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_output.c
new file mode 100644
index 0000000..07f33ab
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_output.c
@@ -0,0 +1,759 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               NETWORK SHELL COMMAND OUTPUT UTILITIES
+*
+* Filename      : net_cmd_output.c
+* Version       : V3.03.01
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V3.01.00
+*                     (b) uC/OS-II  V2.90.00 or
+*                         uC/OS-III V3.03.01
+*                     (c) uC/Shell  V1.03.01
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  NET_CMD_OUTPUT_MODULE
+
+#include  "net_cmd_output.h"
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+#define  NET_CMD_OUTPUT_USAGE                         ("Usage: ")
+#define  NET_CMD_OUTPUT_ERR                           ("Error: ")
+#define  NET_CMD_OUTPUT_SUCCESS                       ("Completed successfully")
+#define  NET_CMD_OUTPUT_TABULATION                    ("\t")
+
+#define  NET_CMD_OUTPUT_ERR_CMD_ARG_INVALID           ("Invalid Arguments")
+#define  NET_CMD_OUTPUT_ERR_CMD_NOT_IMPLEMENTED       ("This command is not yet implemented")
+#define  NET_CMD_OUTPUT_ERR_CMD_BEGINNING             ("---")
+#define  NET_CMD_OUTPUT_ERR_CMD_END                   ("---------------------------------------------")
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_OutputBeginning()
+*
+* Description : Print command not yet implemented message.
+*
+* Argument(s) : out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputBeginning (SHELL_OUT_FNCT    out_fnct,
+                                    SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S ret_val;
+
+    ret_val = NetCmd_OutputMsg(NET_CMD_OUTPUT_ERR_CMD_BEGINNING, DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_OutputBeginning()
+*
+* Description : Print command not yet implemented message.
+*
+* Argument(s) : out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputEnd (SHELL_OUT_FNCT    out_fnct,
+                              SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S ret_val;
+
+    ret_val = NetCmd_OutputMsg(NET_CMD_OUTPUT_ERR_CMD_END, DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
+/*
+*********************************************************************************************************
+*                                         NetCmd_OutputCmdTbl()
+*
+* Description : Print out command tables.
+*
+* Argument(s) : argc            is a count of the arguments supplied.
+*
+*               p_argv          an array of pointers to the strings which are those arguments.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : NetCmd_Help(),
+*               TELNETsCmd_Help().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S NetCmd_OutputCmdTbl (SHELL_CMD        *p_cmd_tbl,
+                                SHELL_OUT_FNCT    out_fnct,
+                                SHELL_CMD_PARAM  *p_cmd_param)
+{
+    SHELL_CMD   *p_shell_cmd;
+    CPU_INT16S   ret_val;
+
+
+    ret_val = NetCmd_OutputMsg(NET_CMD_OUTPUT_USAGE, DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+    switch (ret_val) {
+        case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+        case SHELL_OUT_ERR:
+             return (SHELL_EXEC_ERR);
+
+        default:
+             break;
+    }
+
+
+    p_shell_cmd = p_cmd_tbl;
+
+    while (p_shell_cmd->Fnct != 0) {
+        ret_val = NetCmd_OutputMsg((CPU_CHAR *)p_shell_cmd->Name, DEF_NO, DEF_YES, DEF_YES, out_fnct, p_cmd_param);
+        switch (ret_val) {
+            case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+            case SHELL_OUT_ERR:
+                 return (SHELL_EXEC_ERR);
+
+            default:
+                 break;
+        }
+
+        p_shell_cmd++;
+    }
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_OutputNotImplemented()
+*
+* Description : Print command not yet implemented message.
+*
+* Argument(s) : out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputNotImplemented (SHELL_OUT_FNCT    out_fnct,
+                                         SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S ret_val;
+
+    ret_val = NetCmd_OutputError(NET_CMD_OUTPUT_ERR_CMD_NOT_IMPLEMENTED, out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetCmd_OutputCmdArgInvalid()
+*
+* Description : Print Invalid argument error.
+*
+* Argument(s) : out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : NetCmd_IF_Config(),
+*               NetCmd_IF_Reset(),
+*               NetCmd_IF_RouteAdd(),
+*               NetCmd_IF_RouteRemove(),
+*               NetCmd_IF_SetMTU(),
+*               NetCmd_Ping(),
+*               NetIxANVL_BkgndPing(),
+*               NetIxANVL_IPv6_AutoCfg(),
+*               NetIxANVL_MLD_JoinMcastGroup(),
+*               NetIxANVL_MLD_LeaveMcastGroup(),
+*               NetIxANVL_NDP_CacheAddDestEntry(),
+*               NetIxANVL_NDP_CacheAddPrefixEntry(),
+*               NetIxANVL_NDP_CacheClr(),
+*               NetIxANVL_NDP_CacheDeleteDestEntry(),
+*               NetIxANVL_NDP_CacheGetIsRouterFlag(),
+*               NetIxANVL_NDP_CacheGetState(),
+*               NetIxANVL_UDP_RouteAdd(),
+*               NetIxANVL_UDP_RouteRem().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputCmdArgInvalid (SHELL_OUT_FNCT    out_fnct,
+                                         SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S ret_val;
+
+    ret_val = NetCmd_OutputError(NET_CMD_OUTPUT_ERR_CMD_ARG_INVALID, out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetCmd_OutputError()
+*
+* Description : Print out error message.
+*
+* Argument(s) : p_msg           String that contains the error message.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : NetCmd_IF_Reset(),
+*               NetCmd_IF_RouteAdd(),
+*               NetCmd_IF_RouteRemove(),
+*               NetCmd_IF_SetMTU(),
+*               NetCmd_IP_Config(),
+*               NetCmd_OutputCmdArgInvalid(),
+*               NetCmd_OutputNotImplemented(),
+*               NetCmd_Ping4(),
+*               NetCmd_Ping6(),
+*               NetIxANVL_BkgndPing(),
+*               NetIxANVL_IPv6_AutoCfg(),
+*               NetIxANVL_MLD_JoinMcastGroup(),
+*               NetIxANVL_MLD_LeaveMcastGroup(),
+*               NetIxANVL_NDP_CacheAddDestEntry(),
+*               NetIxANVL_NDP_CacheAddPrefixEntry(),
+*               NetIxANVL_UDP_RouteAdd(),
+*               NetIxANVL_UDP_RouteRem().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputError (CPU_CHAR         *p_error,
+                                SHELL_OUT_FNCT    out_fnct,
+                                SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S ret_val;
+
+
+    ret_val = NetCmd_OutputMsg(NET_CMD_OUTPUT_ERR, DEF_YES, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+    switch (ret_val) {
+        case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+        case SHELL_OUT_ERR:
+             return (SHELL_EXEC_ERR);
+
+        default:
+             break;
+    }
+
+
+    ret_val = NetCmd_OutputMsg(p_error, DEF_NO, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+    switch (ret_val) {
+        case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+        case SHELL_OUT_ERR:
+             return (SHELL_EXEC_ERR);
+
+        default:
+             break;
+    }
+
+    return (ret_val);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                      NetCmd_OutputErrorNetNbr()
+*
+* Description : Print out error message using the net error code.
+*
+* Argument(s) : err             Net error code.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputErrorNetNbr (NET_ERR           err,
+                                      SHELL_OUT_FNCT    out_fnct,
+                                      SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S  ret_val;
+    CPU_CHAR    str_output[DEF_INT_32U_NBR_DIG_MAX + 1];
+
+
+     ret_val = NetCmd_OutputMsg(NET_CMD_OUTPUT_ERR, DEF_YES, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+     switch (ret_val) {
+         case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+         case SHELL_OUT_ERR:
+              return (SHELL_EXEC_ERR);
+
+         default:
+              break;
+     }
+
+     ret_val += NetCmd_OutputMsg("Net error code = ", DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+
+    (void)Str_FmtNbr_Int32U(err,
+                            DEF_INT_32U_NBR_DIG_MAX,
+                            DEF_NBR_BASE_DEC,
+                            DEF_NULL,
+                            DEF_NO,
+                            DEF_YES,
+                            str_output);
+
+     ret_val += NetCmd_OutputMsg(str_output, DEF_NO, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+
+
+     return (ret_val);
+}
+
+/*
+*********************************************************************************************************
+*                                        NetCmd_OutputSuccess()
+*
+* Description : Output a success message in the console.
+*
+* Argument(s) : p_msg           String that contains the message to output.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : NetCmd_IF_Reset(),
+*               NetCmd_IF_RouteAdd(),
+*               NetCmd_IF_RouteRemove(),
+*               NetCmd_IF_SetMTU(),
+*               NetCmd_IP_Config(),
+*               NetCmd_Ping4(),
+*               NetCmd_Ping6(),
+*               NetIxANVL_BkgndPing(),
+*               NetIxANVL_IPv6_AutoCfg(),
+*               NetIxANVL_MLD_JoinMcastGroup(),
+*               NetIxANVL_MLD_LeaveMcastGroup(),
+*               NetIxANVL_NDP_CacheAddDestEntry(),
+*               NetIxANVL_NDP_CacheAddPrefixEntry(),
+*               NetIxANVL_NDP_CacheClr(),
+*               NetIxANVL_NDP_CacheDeleteDestEntry(),
+*               NetIxANVL_TCP_Reset(),
+*               NetIxANVL_TCP_Setup(),
+*               NetIxANVL_UDP_Reset(),
+*               NetIxANVL_UDP_Setup(),
+*               NetIxANVL_UDP_StubStart(),
+*               NetIxANVL_UDP_StubStop().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputSuccess (SHELL_OUT_FNCT    out_fnct,
+                                  SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S ret_val;
+
+
+    ret_val = NetCmd_OutputMsg(NET_CMD_OUTPUT_SUCCESS, DEF_YES, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+    switch (ret_val) {
+        case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+        case SHELL_OUT_ERR:
+             return (SHELL_EXEC_ERR);
+
+        default:
+             break;
+    }
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetCmd_OutputInt32U()
+*
+* Description : Output a integer of 32 bits unsigned
+*
+* Argument(s) : nbr             Number
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputInt32U (CPU_INT32U        nbr,
+                                 SHELL_OUT_FNCT    out_fnct,
+                                 SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_CHAR    str_output[DEF_INT_32U_NBR_DIG_MAX + 1];
+    CPU_INT16S  ret_val = 0;
+
+
+    (void)Str_FmtNbr_Int32U(nbr,
+                            DEF_INT_32U_NBR_DIG_MAX,
+                            DEF_NBR_BASE_DEC,
+                            DEF_NULL,
+                            DEF_NO,
+                            DEF_YES,
+                            str_output);
+
+    ret_val = NetCmd_OutputMsg(str_output, DEF_NO, DEF_NO, DEF_NO, out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetCmd_OutputSockID()
+*
+* Description : Print out socket ID.
+*
+* Argument(s) : sock_id         Socket ID.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputSockID (CPU_INT16S        sock_id,
+                                 SHELL_OUT_FNCT    out_fnct,
+                                 SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16S  ret_val = 0;
+
+
+    ret_val  = NetCmd_OutputMsg("Socket ID = ", DEF_NO, DEF_YES, DEF_NO, out_fnct, p_cmd_param);
+    ret_val += NetCmd_OutputInt32U(sock_id, out_fnct, p_cmd_param);
+
+    return (ret_val);
+}
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_OutputMsg()
+*
+* Description : Output a message in the console.
+*
+* Argument(s) : p_msg           String that contains the message to output.
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputMsg (CPU_CHAR         *p_msg,
+                              CPU_BOOLEAN       new_line_start,
+                              CPU_BOOLEAN       new_line_end,
+                              CPU_BOOLEAN       tab_start,
+                              SHELL_OUT_FNCT    out_fnct,
+                              SHELL_CMD_PARAM  *p_cmd_param)
+{
+    CPU_INT16U output_len;
+    CPU_INT16S output;
+
+
+    if (new_line_start == DEF_YES) {
+        output = out_fnct(STR_NEW_LINE,
+                          STR_NEW_LINE_LEN,
+                          p_cmd_param->pout_opt);
+        switch (output) {
+            case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+            case SHELL_OUT_ERR:
+                 return (SHELL_EXEC_ERR);
+
+            default:
+                 break;
+        }
+    }
+
+
+    if (tab_start == DEF_YES) {
+        output = out_fnct(NET_CMD_OUTPUT_TABULATION,
+                          1,
+                          p_cmd_param->pout_opt);
+        switch (output) {
+            case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+            case SHELL_OUT_ERR:
+                 return (SHELL_EXEC_ERR);
+
+           default:
+                break;
+        }
+    }
+
+    output_len = Str_Len(p_msg);
+    output     = out_fnct(p_msg,
+                          output_len,
+                          p_cmd_param->pout_opt);
+    switch (output) {
+        case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+        case SHELL_OUT_ERR:
+             return (SHELL_EXEC_ERR);
+
+        default:
+             break;
+    }
+
+
+    if (new_line_end == DEF_YES) {
+        output = out_fnct(STR_NEW_LINE,
+                          STR_NEW_LINE_LEN,
+                          p_cmd_param->pout_opt);
+        switch (output) {
+            case SHELL_OUT_RTN_CODE_CONN_CLOSED:
+            case SHELL_OUT_ERR:
+                 return (SHELL_EXEC_ERR);
+
+            default:
+                 break;
+        }
+    }
+
+    return (output);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetCmd_OutputData()
+*
+* Description : Output data
+*
+* Argument(s) : p_buf           Pointer to a buffer that contains the data to output.
+*
+*               len             Data len contained in the buffer
+*
+*               out_fmt         Output format
+*
+*               out_fnct        is a callback to a respond to the requester.
+*
+*               p_cmd_param     is a pointer to additional information to pass to the command.
+*
+* Return(s)   : The number of positive data octets transmitted, if NO errors
+*
+*               SHELL_OUT_RTN_CODE_CONN_CLOSED, if implemented connection closed
+*
+*               SHELL_OUT_ERR,                  otherwise.
+*
+* Caller(s)   : NetCmd_Sock_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  NetCmd_OutputData (CPU_INT08U          *p_buf,
+                               CPU_INT16U           len,
+                               NET_CMD_OUTPUT_FMT   out_fmt,
+                               SHELL_OUT_FNCT       out_fnct,
+                               SHELL_CMD_PARAM     *p_cmd_param)
+{
+    CPU_INT16S  output = 0;
+    CPU_INT16U  i;
+
+
+    output += out_fnct(STR_NEW_LINE,
+                       STR_NEW_LINE_LEN,
+                       p_cmd_param->pout_opt);
+
+
+    switch (out_fmt) {
+        case NET_CMD_OUTPUT_FMT_STRING:
+             output += out_fnct((CPU_CHAR *)p_buf,
+                                            len,
+                                            p_cmd_param->pout_opt);
+             break;
+
+        case NET_CMD_OUTPUT_FMT_HEX:
+             for (i = 0; i < len; i++) {
+                 CPU_INT08U  *p_val = &p_buf[i];
+                 CPU_INT08U   str_len;
+                 CPU_CHAR     str_output[DEF_INT_08U_NBR_DIG_MAX + 1];
+
+
+                 (void)Str_FmtNbr_Int32U(*p_val,
+                                          DEF_INT_08U_NBR_DIG_MAX,
+                                          DEF_NBR_BASE_HEX,
+                                          DEF_NULL,
+                                          DEF_NO,
+                                          DEF_YES,
+                                          str_output);
+
+                 output += out_fnct("0x",
+                                    2,
+                                    p_cmd_param->pout_opt);
+
+                 str_len  = Str_Len_N(str_output, DEF_INT_08U_NBR_DIG_MAX);
+                 output  += out_fnct(str_output,
+                                     str_len,
+                                     p_cmd_param->pout_opt);
+
+                 if (i < (len - 1)) {
+                     output += out_fnct(", ",
+                                         2,
+                                         p_cmd_param->pout_opt);
+                 }
+             }
+             break;
+
+        default:
+            break;
+    }
+
+
+    return (output);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_output.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_output.h
new file mode 100644
index 0000000..66089ea
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_output.h
@@ -0,0 +1,151 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               NETWORK SHELL COMMAND OUTPUT UTILITIES
+*
+* Filename      : net_cmd_output.h
+* Version       : V3.03.01
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V3.01.00
+*                     (b) uC/OS-II  V2.90.00 or
+*                         uC/OS-III V3.03.01
+*                     (c) uC/Shell  V1.03.01
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_CMD_OUTPUT_MODULE_PRESENT
+#define  NET_CMD_OUTPUT_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The following common software files are located in the following directories :
+*
+*               (a) \\lib*.*
+*
+*               (b) (1) \\cpu_def.h
+*
+*                   (2) \\\\cpu*.*
+*
+*                   where
+*                         directory path for custom   library      software
+*                           directory path for common   CPU-compiler software
+*                                              directory name for specific processor (CPU)
+*                                         directory name for specific compiler
+*
+*           (2)
+*
+*           (3) NO compiler-supplied standard library functions SHOULD be used.
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include "../Source/net_err.h"
+
+
+typedef  enum  net_cmd_output_fmt {
+    NET_CMD_OUTPUT_FMT_STRING,
+    NET_CMD_OUTPUT_FMT_HEX
+} NET_CMD_OUTPUT_FMT;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+CPU_INT16S  NetCmd_OutputBeginning     (SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+CPU_INT16S  NetCmd_OutputEnd           (SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+CPU_INT16S  NetCmd_OutputCmdTbl        (SHELL_CMD           *p_cmd_tbl,
+                                        SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+CPU_INT16S  NetCmd_OutputNotImplemented(SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+CPU_INT16S  NetCmd_OutputCmdArgInvalid (SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+CPU_INT16S  NetCmd_OutputError         (CPU_CHAR            *p_error,
+                                        SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+CPU_INT16S  NetCmd_OutputErrorNetNbr   (NET_ERR              err,
+                                        SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+CPU_INT16S  NetCmd_OutputSuccess       (SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+CPU_INT16S  NetCmd_OutputInt32U        (CPU_INT32U           nbr,
+                                        SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+CPU_INT16S  NetCmd_OutputSockID        (CPU_INT16S           sock_id,
+                                        SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+
+CPU_INT16S  NetCmd_OutputMsg           (CPU_CHAR            *p_msg,
+                                        CPU_BOOLEAN          new_line_start,
+                                        CPU_BOOLEAN          new_line_end,
+                                        CPU_BOOLEAN          tab_start,
+                                        SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+CPU_INT16S  NetCmd_OutputData          (CPU_INT08U          *p_buf,
+                                        CPU_INT16U           len,
+                                        NET_CMD_OUTPUT_FMT   out_fmt,
+                                        SHELL_OUT_FNCT       out_fnct,
+                                        SHELL_CMD_PARAM     *p_cmd_param);
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem.c
new file mode 100644
index 0000000..7d89176
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem.c
@@ -0,0 +1,2225 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                                 CADENCE GIGABIT ETHERNET MAC (GEM)
+*
+* Filename      : net_dev_gem.c
+* Version       : V3.04.02
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.20 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_DEV_GEM_MODULE
+
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  "net_dev_gem.h"
+
+#ifdef NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*
+* Note(s) : (1) Receive buffers usually MUST be aligned to some octet boundary.  However, adjusting
+*               receive buffer alignment MUST be performed from within 'net_dev_cfg.h'.  Do not adjust
+*               the value below as it is used for configuration checking only.
+*********************************************************************************************************
+*/
+
+#define  MII_REG_RD_WR_TO                              10000    /* MII read write timeout.                              */
+#define  RX_BUF_ALIGN_OCTETS                              32    /* See Note #1.                                         */
+
+#define  DEV_RX_CRC_DIS                                    0
+#define  DEV_RX_CRC_EN                                     1
+#define  DEV_RX_CRC_OPT                                    2
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*
+* Note(s) : (1) Instance specific data area structures should be defined below.  The data area
+*               structure typically includes error counters and variables used to track the
+*               state of the device.  Variables required for correct operation of the device
+*               MUST NOT be defined globally and should instead be included within the instance
+*               specific data area structure and referenced as pif->Dev_Data structure members.
+*
+*           (2) DMA based devices may require more than one type of descriptor.  Each descriptor
+*               type should be defined below.  An example descriptor has been provided.
+*
+*           (3) All device drivers MUST track the addresses of ALL buffers that have been
+*               transmitted and not yet acknowledged through transmit complete interrupts.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------- DMA DESCRIPTOR DATA TYPE ------------- */
+typedef  struct  dev_desc {                                     /* See Note #2.                                         */
+    CPU_REG32    Addr;                                          /* Start Address Register.                              */
+    CPU_REG32    Status;                                        /* Packet Status and Control Register.                  */
+} DEV_DESC;
+
+                                                                /* --------------- DEVICE INSTANCE DATA --------------- */
+typedef  struct  net_dev_data {
+    MEM_POOL     RxDescPool;
+    MEM_POOL     TxDescPool;
+    DEV_DESC    *RxBufDescPtrStart;
+    DEV_DESC    *RxBufDescPtrCur;
+    DEV_DESC    *RxBufDescPtrEnd;
+    DEV_DESC    *TxBufDescPtrStart;
+    DEV_DESC    *TxBufDescPtrCur;
+    DEV_DESC    *TxBufDescPtrEnd;
+    DEV_DESC    *TxBufDescCompPtr;                              /* See Note #3.                                         */
+    CPU_INT16U   RxNRdyCtr;
+#ifdef  NET_MCAST_MODULE_EN
+    CPU_INT08U   MulticastAddrHashBitCtr[64];
+#endif
+} NET_DEV_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*
+* Note(s) : (1) Device register definitions SHOULD NOT be absolute & SHOULD use the provided base address
+*               within the device configuration structure (see 'net_dev_cfg.c'), as well as each device's
+*               register definition structure in order to properly resolve register addresses at run-time
+*               by mapping the device register definition structure onto an interface's base address.
+*
+*           (2) The device register definition structure MUST take into account appropriate register
+*               offsets & apply reserved space as required.  The registers listed within the register
+*               definition structure MUST reflect the exact ordering and data sizes illustrated in the
+*               device user guide.
+*
+*           (3) Device registers SHOULD be declared as volatile variables so that compilers do NOT cache
+*               register values but MUST perform the steps to read or write each register value for every
+*               register read or write access.
+*********************************************************************************************************
+*/
+
+typedef  struct  net_dev {
+    CPU_REG32  NET_CTRL;                                        /* Network Control.                                     */
+    CPU_REG32  NET_CFG;                                         /* Network Configuration.                               */
+    CPU_REG32  NET_STATUS;                                      /* Network Status.                                      */
+    CPU_REG32  USER_IO;                                         /* User Input/Output.                                   */
+    CPU_REG32  DMA_CFG;                                         /* DMA configuration.                                   */
+    CPU_REG32  TX_STATUS;                                       /* Transmit Status.                                     */
+    CPU_REG32  RX_QBAR;                                         /* Receive Buffer Queue Base Address.                   */
+    CPU_REG32  TX_QBAR;                                         /* Transmit Buffer Queue Base Address.                  */
+    CPU_REG32  RX_STATUS;                                       /* Receive Status.                                      */
+    CPU_REG32  INTR_STATUS;                                     /* Interrupt Status.                                    */
+    CPU_REG32  INTR_EN;                                         /* Interrupt Enable.                                    */
+    CPU_REG32  INTR_DIS;                                        /* Interrupt Disable.                                   */
+    CPU_REG32  INTR_MASK;                                       /* Interrupt Mask Status.                               */
+    CPU_REG32  PHY_MAINT;                                       /* PHY Maintenance.                                     */
+    CPU_REG32  RX_PAUSEQ;                                       /* Receive Pause Quantum.                               */
+    CPU_REG32  TX_PAUSEQ;                                       /* Transmit Pause Quantum.                              */
+    CPU_REG32  RESERVED1[16];
+    CPU_REG32  HASH_BOT;                                        /* Hash Register Bottom.                                */
+    CPU_REG32  HASH_TOP;                                        /* Hash Register Top.                                   */
+    CPU_REG32  SPEC_ADDR1_BOT;                                  /* Specific Address 1 Bottom.                           */
+    CPU_REG32  SPEC_ADDR1_TOP;                                  /* Specific Address 1 Top.                              */
+    CPU_REG32  SPEC_ADDR2_BOT;                                  /* Specific Address 2 Bottom.                           */
+    CPU_REG32  SPEC_ADDR2_TOP;                                  /* Specific Address 2 Top.                              */
+    CPU_REG32  SPEC_ADDR3_BOT;                                  /* Specific Address 3 Bottom.                           */
+    CPU_REG32  SPEC_ADDR3_TOP;                                  /* Specific Address 3 Top.                              */
+    CPU_REG32  SPEC_ADDR4_BOT;                                  /* Specific Address 4 Bottom.                           */
+    CPU_REG32  SPEC_ADDR4_TOP;                                  /* Specific Address 4 Top.                              */
+    CPU_REG32  TYPE_ID_MATCH1;                                  /* Type ID Match 1.                                     */
+    CPU_REG32  TYPE_ID_MATCH2;                                  /* Type ID Match 2.                                     */
+    CPU_REG32  TYPE_ID_MATCH3;                                  /* Type ID Match 3.                                     */
+    CPU_REG32  TYPE_ID_MATCH4;                                  /* Type ID Match 4.                                     */
+    CPU_REG32  WAKE_ON_LAN;                                     /* Wake on LAN.                                         */
+    CPU_REG32  IPG_STRETCH;                                     /* IPG Stretch.                                         */
+    CPU_REG32  STACKED_VLAN;                                    /* Stacked VLAN Register.                               */
+    CPU_REG32  TX_PFC_PAUSE;                                    /* Transmit PFC Pause Register.                         */
+    CPU_REG32  SPEC_ADDR1_MASK_BOT;                             /* Specific Address Mask 1 Bottom.                      */
+    CPU_REG32  SPEC_ADDR1_MASK_TOP;                             /* Specific Address Mask 1 Top.                         */
+    CPU_REG32  RESERVED2[12];
+    CPU_REG32  MODULE_ID;                                       /* Module ID.                                           */
+    CPU_REG32  OCTETS_TX_BOT;                                   /* Octets transmitted bottom.                           */
+    CPU_REG32  OCTETS_TX_TOP;                                   /* Octets transmitted top.                              */
+    CPU_REG32  FRAMES_TX;                                       /* Frames Transmitted.                                  */
+    CPU_REG32  BROADCAST_FRAMES_TX;                             /* Broadcast Frames Transmitted.                        */
+    CPU_REG32  MULTI_FRAMES_TX;                                 /* Multicast Frames Transmitted.                        */
+    CPU_REG32  PAUSE_FRAMES_TX;                                 /* Pause Frames Transmitted.                            */
+    CPU_REG32  FRAMES_64B_TX;                                   /* Frames Transmitted. 64 bytes.                        */
+    CPU_REG32  FRAMES_65TO127B_TX;                              /* Frames Transmitted. 65 to 127 bytes.                 */
+    CPU_REG32  FRAMES_128TO511B_TX;                             /* Frames Transmitted. 128 to 511 bytes.                */
+    CPU_REG32  FRAMES_512BTO1023B_TX;                           /* Frames Transmitted. 512 to 1023 bytes.               */
+    CPU_REG32  FRAMES_1024TO1518B_TX;                           /* Frames Transmitted. 1024 ti 1518 bytes.              */
+    CPU_REG32  RESERVED3;
+    CPU_REG32  TX_UNDER_RUNS;                                   /* Transmit under runs.                                 */
+    CPU_REG32  SINGLE_COLLISN_FRAMES;                           /* Single Collision Frames.                             */
+    CPU_REG32  MULTI_COLLISN_FRAMES;                            /* Multi Collision Frames.                              */
+    CPU_REG32  EXCESSIVE_COLLISNS;                              /* Excesive Collisions.                                 */
+    CPU_REG32  LATE_COLLISNS;                                   /* Late Collisions.                                     */
+    CPU_REG32  DEFFERED_TX_FRAMES;                              /* Deffered Transmission Frames.                        */
+    CPU_REG32  CARRIER_SENSE_ERRS;                              /* Carrier Sense Errors.                                */
+    CPU_REG32  OCTETS_RX_BOT;                                   /* Octets Received Bottom.                              */
+    CPU_REG32  OCTETS_RX_TOP;                                   /* Octets Received Top.                                 */
+    CPU_REG32  FRAMES_RX;                                       /* Frames Received.                                     */
+} NET_DEV;
+
+
+/*
+*********************************************************************************************************
+*                                     REGISTER BIT DEFINITIONS
+*
+* Note(s) : (1) All necessary register bit definitions should be defined within this section.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ RX DESCRIPTORS ------------------ */
+#define  GEM_RXBUF_ADDR_MASK              (0xFFFFFFFC)          /* RX buffer address.                                   */
+#define  GEM_RXBUF_ADDR_WRAP              DEF_BIT_01            /* Wrap flag.                                           */
+#define  GEM_RXBUF_ADDR_OWN               DEF_BIT_00            /* Ownership flag.                                      */
+
+#define  GEM_RXBUF_STATUS_GBC             DEF_BIT_31            /* Global broadcast detected.                           */
+#define  GEM_RXBUF_STATUS_MULTI_MATCH     DEF_BIT_30            /* Multicast hash match.                                */
+#define  GEM_RXBUF_STATUS_UNI_MATCH       DEF_BIT_29            /* Unicast hash match.                                  */
+#define  GEM_RXBUF_STATUS_EXT_MATCH       DEF_BIT_28            /* External address match.                              */
+
+#define  GEM_RXBUF_STATUS_EOF             DEF_BIT_15            /* End of frame.                                        */
+#define  GEM_RXBUF_STATUS_SOF             DEF_BIT_14            /* Start of frame.                                      */
+#define  GEM_RXBUF_SIZE_MASK              (0x1FFFu)             /* Size of frame.                                       */
+
+
+                                                                /* ------------------ TX DESCRIPTORS ------------------ */
+#define  GEM_TXBUF_ADDR_MASK              (0xFFFFFFFC)          /* TX Buffer address.                                   */
+
+#define  GEM_TXBUF_USED                   DEF_BIT_31            /* Used flag.                                           */
+#define  GEM_TXBUF_WRAP                   DEF_BIT_30            /* Wrap flag.                                           */
+#define  GEM_TXBUF_RETRY_EXCED            DEF_BIT_29            /* Retry limit exceeded.                                */
+#define  GEM_TXBUF_AHB_ERR                DEF_BIT_27            /* Frame corruption due to AHB error.                   */
+#define  GEM_TXBUF_LATE_COLL              DEF_BIT_26            /* Late collision.                                      */
+
+#define  GEM_TXBUF_NO_CRC                 DEF_BIT_16            /* No CRC to be appended.                               */
+#define  GEM_TXBUF_LAST                   DEF_BIT_15            /* Last buffer.                                         */
+#define  GEM_TXBUF_LENGTH_MASK            (0x3FFF)              /* Buffer length.                                       */
+
+
+                                                                /* ----------------- NETWORK CONTROL ------------------ */
+#define  GEM_BIT_CTRL_FLUSH_NEXT_RX_DPRAM_PKT  DEF_BIT_18       /* Flush next packet from the external DPRAM.           */
+#define  GEM_BIT_CTRL_TX_PFC_PRI_PAUSE_FRAME   DEF_BIT_17       /* Transmit PFC priority baste pause frame.             */
+#define  GEM_BIT_CTRL_EN_PFC_PRI_PAUSE_RX      DEF_BIT_16       /* Enable PFS priority based pause reception.           */
+#define  GEM_BIT_CTRL_STR_RX_TIMESTAMP         DEF_BIT_15       /* Store timestamps to memory.                          */
+#define  GEM_BIT_CTRL_TX_ZEROQ_PAUSE_FRAME     DEF_BIT_12       /* Transmit zero quantum pause frame.                   */
+#define  GEM_BIT_CTRL_TX_PAUSE_FRAME           DEF_BIT_11       /* Transmit pause frame.                                */
+#define  GEM_BIT_CTRL_TX_HALT                  DEF_BIT_10       /* Transmit halt.                                       */
+#define  GEM_BIT_CTRL_START_TX                 DEF_BIT_09       /* Start transmission.                                  */
+#define  GEM_BIT_CTRL_BACK_PRESSURE            DEF_BIT_08       /* Back pressure.                                       */
+#define  GEM_BIT_CTRL_WREN_STAT_REGS           DEF_BIT_07       /* Write enable for stats registers.                    */
+#define  GEM_BIT_CTRL_INCR_STATS_REGS          DEF_BIT_06       /* Increment statistics registers.                      */
+#define  GEM_BIT_CTRL_CLEAR_STATS_REGS         DEF_BIT_05       /* Clear statistics registers.                          */
+#define  GEM_BIT_CTRL_MGMT_PORT_EN             DEF_BIT_04       /* Management port enable.                              */
+#define  GEM_BIT_CTRL_TX_EN                    DEF_BIT_03       /* Tramsit enable.                                      */
+#define  GEM_BIT_CTRL_RX_EN                    DEF_BIT_02       /* Receive enable.                                      */
+#define  GEM_BIT_CTRL_LOOPBACK_LOCAL           DEF_BIT_01       /* Loop back local.                                     */
+
+
+                                                                /* -------------- NETWORK CONFIGURATION --------------- */
+#define  GEM_BIT_CFG_UNIDIR_EN                 DEF_BIT_31       /* Uni-drection enable.                                 */
+#define  GEM_BIT_CFG_IGNORE_IPG_RX_ER          DEF_BIT_30       /* Ignore IPG rx_er.                                    */
+#define  GEM_BIT_CFG_RX_BAD_PREAMBLE           DEF_BIT_29       /* Receive bad preamble.                                */
+#define  GEM_BIT_CFG_IPG_STRETCH_EN            DEF_BIT_28       /* IPG stretch enable.                                  */
+#define  GEM_BIT_CFG_SGMII_EN                  DEF_BIT_27       /* SGMII mode enable.                                   */
+#define  GEM_BIT_CFG_IGNORE_RX_FCS             DEF_BIT_26       /* Ingore RX FCS.                                       */
+#define  GEM_BIT_CFG_RX_HD_WHILE_TX            DEF_BIT_25       /* RX half duplex while TX.                             */
+#define  GEM_BIT_CFG_RX_CHKSUM_OFFLD_EN        DEF_BIT_24       /* Receive checksum offloading enable.                  */
+#define  GEM_BIT_CFG_DIS_CP_PAUSE_FRAME        DEF_BIT_23       /* Disable copy of pause frame.                         */
+#define  GEM_BIT_CFG_DBUS_WIDTH_MSK (DEF_BIT_FIELD(2, 21))      /* Data bus width.                                      */
+#define  GEM_BIT_CFG_DBUS_WIDTH(cfg) (DEF_BIT_MASK(cfg, 21) & GEM_BIT_CFG_DBUS_WIDTH_MSK)
+#define  GEM_BIT_CFG_MDC_CLK_DIV_MSK (DEF_BIT_FIELD(3, 18))     /* MDC clock division.                                  */
+#define  GEM_BIT_CFG_MDC_CLK_DIV(cfg) (DEF_BIT_MASK(cfg, 18) & GEM_BIT_CFG_MDC_CLK_DIV_MSK)
+#define  GEM_BIT_CFG_FCS_REMOVE               DEF_BIT_17        /* FCS remove.                                          */
+#define  GEM_BIT_CFG_LEN_ERR_FRAME_DISC       DEF_BIT_16        /* Length field error frame discard.                    */
+#define  GEM_BIT_CFG_RX_BUF_OFF_MSK (DEF_BIT_FIELD(2, 14))      /* Receive buffer offset.                               */
+#define  GEM_BIT_CFG_RX_BUF_OFF(cfg) (DEF_BIT_MASK(cfg, 14) & GEM_BIT_CFG_RX_BUF_OFF_MSK)
+#define  GEM_BIT_CFG_PAUSE_EN                 DEF_BIT_13        /* Pause enable.                                        */
+#define  GEM_BIT_CFG_RETRY_TEST               DEF_BIT_12        /* Retry test.                                          */
+#define  GEM_BIT_CFG_PCS_SEL                  DEF_BIT_11        /* PCS select.                                          */
+#define  GEM_BIT_CFG_GIGE_EN                  DEF_BIT_10        /* Gigabit mode enable.                                 */
+#define  GEM_BIT_CFG_EXT_ADDR_MATCH_EN        DEF_BIT_09        /* External address match enable.                       */
+#define  GEM_BIT_CFG_UNI_HASH_EN              DEF_BIT_07        /* Unicast hash enable.                                 */
+#define  GEM_BIT_CFG_MULTI_HASH_EN            DEF_BIT_06        /* Multicast hash enable.                               */
+#define  GEM_BIT_CFG_NO_BROADCAST             DEF_BIT_05        /* No broadcast.                                        */
+#define  GEM_BIT_CFG_COPY_ALL                 DEF_BIT_04        /* Copy all frames.                                     */
+#define  GEM_BIT_CFG_DISC_NON_VLAN            DEF_BIT_02        /* Discard non VLAN frames.                             */
+#define  GEM_BIT_CFG_FULL_DUPLEX              DEF_BIT_01        /* Full duplex.                                         */
+#define  GEM_BIT_CFG_SPEED                    DEF_BIT_00        /* Speed.                                               */
+
+
+                                                                /* ------------------ NETWORK STATUS ------------------ */
+#define  GEM_BIT_STATUS_PFC_PRI_PAUSE_NEG     DEF_BIT_06        /* PFC pause negociated.                                */
+#define  GEM_BIT_STATUS_PCS_AUTONEG_TX_RES    DEF_BIT_05        /* PCS pause tx resolution.                             */
+#define  GEM_BIT_STATUS_PCS_AUTONEG_RX_RES    DEF_BIT_04        /* PCS pause rx resultion.                              */
+#define  GEM_BIT_STATUS_PCS_AUTONEG_DUP_RES   DEF_BIT_03        /* PCS duplex resolution.                               */
+#define  GEM_BIT_STATUS_PHY_MGMT_IDLE         DEF_BIT_02        /* PHY MGMT logic idle.                                 */
+#define  GEM_BIT_STATUS_MDIO_IN_PIN_STATUS    DEF_BIT_01        /* MDIO in pin status.                                  */
+#define  GEM_BIT_STATUS_PCS_LINK_STATE        DEF_BIT_00        /* PCS link state.                                      */
+
+                                                                /* ---------------- DMA CONFIGURATION ----------------- */
+#define  GEM_BIT_DMACFG_DISC_WHEN_NO_AHB      DEF_BIT_24        /* Discard packet when no AHB resource                  */
+#define  GEM_BIT_DMACFG_AHB_RX_SIZE_MSK (DEF_BIT_FIELD(8, 16))  /* Receive buffer offset.                               */
+#define  GEM_BIT_DMACFG_AHB_RX_SIZE(cfg) (DEF_BIT_MASK(cfg, 16) & GEM_BIT_DMACFG_AHB_RX_SIZE_MSK)
+#define  GEM_BIT_DMACFG_CSUM_GEN_OFFLOAD_EN   DEF_BIT_11        /* Checksum generation offload enable.                  */
+#define  GEM_BIT_DMACFG_TX_PKTBUF_MEMSZ_SEL   DEF_BIT_10        /* Transmit packet buffer memory size.                  */
+#define  GEM_BIT_DMACFG_RX_PKTBUF_SZ_MSK (DEF_BIT_FIELD(2, 8))  /* Receive packet buffer memory size.                   */
+#define  GEM_BIT_DMACFG_RX_PKTBUF_SZ(cfg) (DEF_BIT_MASK(cfg, 8) & GEM_BIT_DMACFG_RX_PKTBUF_SZ_MSK)
+#define  GEM_BIT_DMACFG_AHB_PKT_SWAP_EN       DEF_BIT_07        /* AHB endian swap enable for packets.                  */
+#define  GEM_BIT_DMACFG_AHC_MGMT_SWAP_EN      DEF_BIT_06        /* AHB endian swap enable for management descriptors    */
+#define  GEM_BIT_DMACFG_RX_AHB_BURST_MSK (DEF_BIT_FIELD(5, 0))  /* AHB fixed burst length.                              */
+#define  GEM_BIT_DMACFG_RX_AHB_BURST(cfg) (DEF_BIT_MASK(cfg, 0) & GEM_BIT_DMACFG_RX_AHB_BURST_MSK)
+
+                                                                /* ----------------- TRANSMIT STATUS ------------------ */
+#define  GEM_BIT_TXSTATUS_HRESP_NOT_OK        DEF_BIT_08        /* Hresp not OK.                                        */
+#define  GEM_BIT_TXSTATUS_LATE_COLLISION      DEF_BIT_07        /* Late collision occurred.                             */
+#define  GEM_BIT_TXSTATUS_TX_UNDER_RUN        DEF_BIT_06        /* Transmit under run.                                  */
+#define  GEM_BIT_TXSTATUS_TX_COMPLETE         DEF_BIT_05        /* Transmit complete.                                   */
+#define  GEM_BIT_TXSTATUS_TX_CORR_AHB_ERR     DEF_BIT_04        /* Transmit frame corruption due to AHB error.          */
+#define  GEM_BIT_TXSTATUS_TX_GO               DEF_BIT_03        /* Transmit go.                                         */
+#define  GEM_BIT_TXSTATUS_RETRY_EXCEEDED      DEF_BIT_02        /* Retry limit exceeded.                                */
+#define  GEM_BIT_TXSTATUS_COLLISION           DEF_BIT_01        /* Collision occurred.                                  */
+#define  GEM_BIT_TXSTATUS_USED_BIT_READ       DEF_BIT_00        /* Used bit read.                                       */
+
+                                                                /* ------------------ RECEIVE STATUS ------------------ */
+#define  GEM_BIT_RXSTATUS_HRESP_NOT_OK        DEF_BIT_03        /* Hresp not OK.                                        */
+#define  GEM_BIT_RXSTATUS_RX_OVERRUN          DEF_BIT_02        /* Receive overrun.                                     */
+#define  GEM_BIT_RXSTATUS_FRAME_RECD          DEF_BIT_01        /* Frame received.                                      */
+#define  GEM_BIT_RXSTATUS_BUFFER_NOT_AVAIL    DEF_BIT_00        /* Buffer not available.                                */
+
+                                                                /* ----------------- INTERRUPT STATUS ----------------- */
+#define  GEM_BIT_INT_TSU_SEC_INCR             DEF_BIT_26        /* TSE seconds register increment.                      */
+#define  GEM_BIT_INT_PDELAY_RESP_TX           DEF_BIT_25        /* PTP pdelay_resp frame transmitted.                   */
+#define  GEM_BIT_INT_PDELAY_REQ_TX            DEF_BIT_24        /* PTP pdelay_req frame transmitted.                    */
+#define  GEM_BIT_INT_PDELAY_RESP_RX           DEF_BIT_23        /* PTP pdelay_resp frame received.                      */
+#define  GEM_BIT_INT_PDELAY_REQ_RX            DEF_BIT_22        /* PTP pdelay_req frame received.                       */
+#define  GEM_BIT_INT_SYNC_TX                  DEF_BIT_21        /* PTP sync frame transmitted.                          */
+#define  GEM_BIT_INT_DELAY_REQ_TX             DEF_BIT_20        /* PTP delay_req frame transmitted.                     */
+#define  GEM_BIT_INT_SYNC_RX                  DEF_BIT_19        /* PTP sync frame received.                             */
+#define  GEM_BIT_INT_DELAY_REQ_RX             DEF_BIT_18        /* PTP delay_req frame received.                        */
+#define  GEM_BIT_INT_PARTNER_PG_RX            DEF_BIT_17        /* PCS link partner page received.                      */
+#define  GEM_BIT_INT_AUTONEG_COMPLETE         DEF_BIT_16        /* PCS auto-negotiation complete.                       */
+#define  GEM_BIT_INT_EXT_INTR                 DEF_BIT_15        /* External interrupt.                                  */
+#define  GEM_BIT_INT_PAUSE_TX                 DEF_BIT_14        /* Pause frame transmitted.                             */
+#define  GEM_BIT_INT_PAUSE_ZERO               DEF_BIT_13        /* Pause time zero.                                     */
+#define  GEM_BIT_INT_PAUSE_NONZERO_RX         DEF_BIT_12        /* Pause frame with non-zero pause quantum received.    */
+#define  GEM_BIT_INT_HRESP_NOT_OK             DEF_BIT_11        /* Hresp not OK.                                        */
+#define  GEM_BIT_INT_RX_OVERRUN               DEF_BIT_10        /* Receive overrun.                                     */
+#define  GEM_BIT_INT_LINK_CHNG                DEF_BIT_09        /* Link state change.                                   */
+#define  GEM_BIT_INT_TX_COMPLETE              DEF_BIT_07        /* Transmit complete.                                   */
+#define  GEM_BIT_INT_TX_CORRUPT_AHB           DEF_BIT_06        /* Transmit frame corruption due to AHB error.          */
+#define  GEM_BIT_INT_RETRY_EX_LATE            DEF_BIT_05        /* Retry limit exceeded or late collision.              */
+#define  GEM_BIT_INT_TX_USED_READ             DEF_BIT_03        /* TX used bit read.                                    */
+#define  GEM_BIT_INT_RX_USED_READ             DEF_BIT_02        /* RX used bit read.                                    */
+#define  GEM_BIT_INT_RX_COMPLETE              DEF_BIT_01        /* Receive complete.                                    */
+#define  GEM_BIT_INT_MGMT_SENT                DEF_BIT_00        /* Management frame sent.                               */
+
+                                                                /* ----------------- PHY MAINTENANCE ------------------ */
+#define  GEM_BIT_PHYMGMT_CLAUSE_22            DEF_BIT_30        /* Clause 22 operation.                                 */
+#define  GEM_BIT_PHYMGMT_OPERATION_MSK (DEF_BIT_FIELD(2, 28))   /* Operation.                                           */
+#define  GEM_BIT_PHYMGMT_OPERATION(cfg) (DEF_BIT_MASK(cfg, 28) & GEM_BIT_PHYMGMT_OPERATION_MSK)
+#define  GEM_BIT_PHYMGMT_PHYADDR_MSK (DEF_BIT_FIELD(5, 23))     /* PHY address.                                         */
+#define  GEM_BIT_PHYMGMT_PHYADDR(cfg) (DEF_BIT_MASK(cfg, 23) & GEM_BIT_PHYMGMT_PHYADDR_MSK)
+#define  GEM_BIT_PHYMGMT_REGADDR_MSK (DEF_BIT_FIELD(5, 18))     /* Register address.                                    */
+#define  GEM_BIT_PHYMGMT_REGADDR(cfg) (DEF_BIT_MASK(cfg, 18) & GEM_BIT_PHYMGMT_REGADDR_MSK)
+#define  GEM_BIT_PHYMGMT_MUST10_MSK (DEF_BIT_FIELD(2, 16))      /* Must be 10.                                          */
+#define  GEM_BIT_PHYMGMT_MUST10(cfg) (DEF_BIT_MASK(cfg, 16) & GEM_BIT_PHYMGMT_MUST10_MSK)
+#define  GEM_BIT_PHYMGMT_DATA_MSK (DEF_BIT_FIELD(16, 0))        /* Data.                                                */
+#define  GEM_BIT_PHYMGMT_DATA(cfg) (DEF_BIT_MASK(cfg, 0) & GEM_BIT_PHYMGMT_DATA_MSK)
+
+
+
+#define  INT_STATUS_MASK_ALL                      0xFFFFFFFF
+#define  INT_STATUS_MASK_SUPPORTED                GEM_BIT_INT_RX_COMPLETE | GEM_BIT_INT_TX_COMPLETE;
+#define  CTRL_TX_EN                               DEF_BIT_00
+#define  CTRL_RX_EN                               DEF_BIT_00
+#define  CTRL_RX_CRC_EN                           DEF_BIT_00
+
+#define  RX_ISR_EVENT_MSK                         GEM_BIT_INT_RX_COMPLETE
+#define  TX_ISR_EVENT_MSK                         GEM_BIT_INT_TX_COMPLETE
+#define  UNHANDLED_ISR_EVENT_MASK                 DEF_BIT_00
+
+
+/*
+*********************************************************************************************************
+*                                     DESCRIPTOR BIT DEFINITIONS
+*********************************************************************************************************
+*/
+
+#define  DESC_VALID_MSK                           DEF_BIT_00
+#define  DESC_WRAP_BIT_MASK                       DEF_BIT_00
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*
+* Note(s) : (1) Global variables are highly discouraged and should only be used for storing NON-instance
+*               specific data and the array of instance specific data.  Global variables, those that are
+*               not declared within the NET_DEV_DATA area, are not multiple-instance safe and could lead
+*               to incorrect driver operation if used to store device state information.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Device driver functions may be arbitrarily named.  However, it is recommended that device
+*               driver functions be named using the names provided below.  All driver function prototypes
+*               should be located within the driver C source file ('net_dev_&&&.c') & be declared as
+*               static functions to prevent name clashes with other network protocol suite device drivers.
+*********************************************************************************************************
+*/
+
+                                                                        /* -------- FNCT'S COMMON TO ALL DEV'S -------- */
+static  void  NetDev_Init               (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_Start              (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_Stop               (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_Rx                 (NET_IF             *pif,
+                                         CPU_INT08U        **p_data,
+                                         CPU_INT16U         *size,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_Tx                 (NET_IF             *pif,
+                                         CPU_INT08U         *p_data,
+                                         CPU_INT16U          size,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_AddrMulticastAdd   (NET_IF             *pif,
+                                         CPU_INT08U         *paddr_hw,
+                                         CPU_INT08U          addr_hw_len,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_AddrMulticastRemove(NET_IF             *pif,
+                                         CPU_INT08U         *paddr_hw,
+                                         CPU_INT08U          addr_hw_len,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_ISR_Handler        (NET_IF             *pif,
+                                         NET_DEV_ISR_TYPE    type);
+
+
+static  void  NetDev_IO_Ctrl            (NET_IF             *pif,
+                                         CPU_INT08U          opt,
+                                         void               *p_data,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_MII_Rd             (NET_IF             *pif,
+                                         CPU_INT08U          phy_addr,
+                                         CPU_INT08U          reg_addr,
+                                         CPU_INT16U         *p_data,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_MII_Wr             (NET_IF             *pif,
+                                         CPU_INT08U          phy_addr,
+                                         CPU_INT08U          reg_addr,
+                                         CPU_INT16U          data,
+                                         NET_ERR            *perr);
+
+
+                                                                        /* ----- FNCT'S COMMON TO DMA-BASED DEV'S ----- */
+static  void  NetDev_RxDescInit         (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_TxDescInit         (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_RxDescFreeAll      (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_RxDescPtrCurInc    (NET_IF             *pif);
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NETWORK DEVICE DRIVER API
+*
+* Note(s) : (1) Device driver API structures are used by applications during calls to NetIF_Add().  This
+*               API structure allows higher layers to call specific device driver functions via function
+*               pointer instead of by name.  This enables the network protocol suite to compile & operate
+*               with multiple device drivers.
+*
+*           (2) In most cases, the API structure provided below SHOULD suffice for most device drivers
+*               exactly as is with the exception that the API structure's name which MUST be unique &
+*               SHOULD clearly identify the device being implemented.  For example, the Cirrus Logic
+*               CS8900A Ethernet controller's API structure should be named NetDev_API_CS8900A[].
+*
+*               The API structure MUST also be externally declared in the device driver header file
+*               ('net_dev_&&&.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+
+const  NET_DEV_API_ETHER  NetDev_API_GEM = {                                            /* Ether DMA dev API fnct ptrs :*/
+                                                          &NetDev_Init,                 /*   Init/add                   */
+                                                          &NetDev_Start,                /*   Start                      */
+                                                          &NetDev_Stop,                 /*   Stop                       */
+                                                          &NetDev_Rx,                   /*   Rx                         */
+                                                          &NetDev_Tx,                   /*   Tx                         */
+                                                          &NetDev_AddrMulticastAdd,     /*   Multicast addr add         */
+                                                          &NetDev_AddrMulticastRemove,  /*   Multicast addr remove      */
+                                                          &NetDev_ISR_Handler,          /*   ISR handler                */
+                                                          &NetDev_IO_Ctrl,              /*   I/O ctrl                   */
+                                                          &NetDev_MII_Rd,               /*   Phy reg rd                 */
+                                                          &NetDev_MII_Wr                /*   Phy reg wr                 */
+                                                        };
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Init()
+*
+* Description : (1) Initialize Network Driver Layer :
+*
+*                   (a) Initialize required clock sources
+*                   (b) Initialize external interrupt controller
+*                   (c) Initialize external GPIO controller
+*                   (d) Initialize driver state variables
+*                   (e) Allocate memory for device DMA descriptors
+*                   (f) Initialize additional device registers
+*                       (1) (R)MII mode / Phy bus type
+*                       (2) Disable device interrupts
+*                       (3) Disable device receiver and transmitter
+*                       (4) Other necessary device initialization
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE            No Error.
+*                           NET_DEV_ERR_INIT            General initialization error.
+*                           NET_BUF_ERR_POOL_MEM_ALLOC  Memory allocation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Add() via 'pdev_api->Init()'.
+*
+* Note(s)     : (2) The application developer SHOULD define NetDev_CfgClk() within net_bsp.c
+*                   in order to properly enable clocks for specified network interface.  In
+*                   some cases, a device may require clocks to be enabled for BOTH the device
+*                   and accessory peripheral modules such as GPIO.  A call to this function
+*                   MAY need to occur BEFORE any device register accesses are made.  In the
+*                   event that a device does NOT require any external clocks to be enabled,
+*                   it is recommended that the device driver still call the NetBSP fuction
+*                   which may in turn leave the section for the specific interface number
+*                   empty.
+*
+*               (3) The application developer SHOULD define NetDev_CfgGPIO() within net_bsp.c
+*                   in order to properly configure any necessary GPIO necessary for the device
+*                   to operate properly.  Micrium recommends defining and calling this NetBSP
+*                   function even if no additional GPIO initialization is required.
+*
+*               (4) The application developer SHOULD define NetDev_CfgIntCtrl() within net_bsp.c
+*                   in order to properly enable interrupts on an external or CPU integrated
+*                   interrupt controller.  Interrupt sources that are specific to the DEVICE
+*                   hardware MUST NOT be initialized from within NetDev_CfgIntCtrl() and
+*                   SHOULD only be modified from within the device driver.
+*
+*                   (a) External interrupt sources are cleared within the NetBSP first level
+*                       ISR handler either before or after the call to the device driver ISR
+*                       handler function.  The device driver ISR handler function SHOULD only
+*                       clear the device specific interrupts and NOT external or CPU interrupt
+*                       controller interrupt sources.
+*
+*               (5) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (6) All device drivers that store instance specific data MUST declare all
+*                   instance specific variables within the device data area defined above.
+*
+*               (7) Drivers SHOULD validate device configuration values and set *perr to
+*                   NET_DEV_ERR_INVALID_CFG if unacceptible values have been specified. Fields
+*                   of interest generally include, but are not limited to :
+*
+*                   (a) pdev_cfg->RxBufPoolType :
+*
+*                       (1) NET_IF_MEM_TYPE_MAIN
+*                       (2) NET_IF_MEM_TYPE_DEDICATED
+*
+*                   (b) pdev_cfg->TxBufPoolType :
+*
+*                       (1) NET_IF_MEM_TYPE_MAIN
+*                       (2) NET_IF_MEM_TYPE_DEDICATED
+*
+*                   (c) pdev_cfg->RxBufAlignOctets
+*                   (d) pdev_cfg->TxBufAlignOctets
+*                   (e) pdev_cfg->RxBufDescNbr
+*                   (f) pdev_cfg->TxBufDescnbr
+*
+*               (8) Descriptors are typically required to be contiguous in memory.  Allocation of
+*                   descriptors MUST occur as a single contigous block of memory.  The driver may
+*                   use pointer arithmetic to sub-divide and traverse the descriptor list.
+*
+*               (9) NetDev_Init() should exit with :
+*
+*                   (a) All device interrupt source disabled. External interrupt controllers
+*                       should however be ready to accept interrupt requests.
+*                   (b) All device interrupt sources cleared.
+*                   (c) Both the receiver and transmitter disabled.
+*
+*              (10) Some drivers MAY require knowledge of the Phy configuration in order
+*                   to properly configure the MAC with the correct Phy bus mode, speed and
+*                   duplex settings.  If a driver requires access to the Phy configuration,
+*                   then the driver MUST validate the pif->Phy_Cfg pointer by checking for
+*                   a NULL pointer BEFORE attempting to access members of the Phy
+*                   configuration structure.  Phy configuration fields of interest generally
+*                   include, but are  not limited to :
+*
+*                   (a) pphy_cfg->Type :
+*
+*                       (1) NET_PHY_TYPE_INT            Phy integrated with MAC.
+*                       (2) NET_PHY_TYPE_EXT            Phy externally attached to MAC.
+*
+*                   (b) pphy_cfg->BusMode :
+*
+*                       (1) NET_PHY_BUS_MODE_MII        Phy bus mode configured to MII.
+*                       (2) NET_PHY_BUS_MODE_RMII       Phy bus mode configured to RMII.
+*                       (3) NET_PHY_BUS_MODE_SMII       Phy bus mode configured to SMII.
+*
+*                   (c) pphy_cfg->Spd :
+*
+*                       (1) NET_PHY_SPD_0               Phy link speed unknown or NOT linked.
+*                       (2) NET_PHY_SPD_10              Phy link speed configured to  10   mbit/s.
+*                       (3) NET_PHY_SPD_100             Phy link speed configured to  100  mbit/s.
+*                       (4) NET_PHY_SPD_1000            Phy link speed configured to  1000 mbit/s.
+*                       (5) NET_PHY_SPD_AUTO            Phy link speed configured for auto-negotiation.
+*
+*                   (d) pphy_cfg->Duplex :
+*
+*                       (1) NET_PHY_DUPLEX_UNKNOWN      Phy link duplex unknown or link not established.
+*                       (2) NET_PHY_DUPLEX_HALF         Phy link duplex configured to  half duplex.
+*                       (3) NET_PHY_DUPLEX_FULL         Phy link duplex configured to  full duplex.
+*                       (4) NET_PHY_DUPLEX_AUTO         Phy link duplex configured for auto-negotiation.
+*********************************************************************************************************
+*/
+
+
+static  void  NetDev_Init (NET_IF   *pif,
+                           NET_ERR  *perr)
+{
+    NET_DEV_BSP_ETHER  *pdev_bsp;
+    NET_PHY_CFG_ETHER  *pphy_cfg;
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_BUF_SIZE        buf_size_max;
+    NET_BUF_SIZE        buf_ix;
+    CPU_SIZE_T          reqd_octets;
+    CPU_SIZE_T          nbytes;
+    LIB_ERR             lib_err;
+
+                                                                /* -------- OBTAIN REFERENCE TO CFGs/REGs/BSP --------- */
+    pphy_cfg = (NET_PHY_CFG_ETHER *)pif->Ext_Cfg;
+    pdev_cfg = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;
+    pdev_bsp = (NET_DEV_BSP_ETHER *)pif->Dev_BSP;
+                                                                /* --------------- VALIDATE DEVICE CFG ---------------- */
+                                                                /* See Note #7.                                         */
+                                                                /* Validate Rx buf alignment.                           */
+    if ((pdev_cfg->RxBufAlignOctets & (RX_BUF_ALIGN_OCTETS - 1u)) != 0u) {
+        *perr = NET_DEV_ERR_INVALID_CFG;
+         return;
+    }
+
+                                                                /* Validate Rx buf ix offset.                           */
+    if (pdev_cfg->RxBufIxOffset != 0u) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+                                                                /* Validate Rx buf size.                                */
+    buf_ix       = NET_IF_IX_RX;
+
+    buf_size_max = NetBuf_GetMaxSize((NET_IF_NBR     )pif->Nbr,
+                                     (NET_TRANSACTION)NET_TRANSACTION_RX,
+                                     (NET_BUF       *)0,
+                                     (NET_BUF_SIZE   )buf_ix);
+    if (buf_size_max < NET_IF_ETHER_FRAME_MAX_SIZE) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+                                                                /* Validate Tx buf ix offset.                           */
+    if (pdev_cfg->TxBufIxOffset != 0u) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+
+    if (pphy_cfg == (void *)0) {
+       *perr = NET_PHY_ERR_INVALID_CFG;
+        return;
+    }
+                                                                /* Validate phy bus mode.                               */
+    if (pphy_cfg->BusMode != NET_PHY_BUS_MODE_GMII) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+
+                                                                /* -------------- ALLOCATE DEV DATA AREA -------------- */
+    pif->Dev_Data = Mem_HeapAlloc((CPU_SIZE_T  ) sizeof(NET_DEV_DATA),
+                                  (CPU_SIZE_T  ) 32u,
+                                  (CPU_SIZE_T *)&reqd_octets,
+                                  (LIB_ERR    *)&lib_err);
+    if (pif->Dev_Data == (void *)0) {
+       *perr = NET_DEV_ERR_MEM_ALLOC;
+        return;
+    }
+
+    pdev_data = (NET_DEV_DATA *)pif->Dev_Data;
+
+
+
+                                                                /* ------------- ENABLE NECESSARY CLOCKS -------------- */
+                                                                /* Enable module clks (see Note #2).                    */
+    pdev_bsp->CfgClk(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------- INITIALIZE EXTERNAL GPIO CONTROLLER -------- */
+                                                                /* Configure Ethernet Controller GPIO (see Note #4).    */
+    pdev_bsp->CfgGPIO(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ----- INITIALIZE EXTERNAL INTERRUPT CONTROLLER ------ */
+                                                                /* Configure ext int ctrl'r (see Note #3).              */
+    pdev_bsp->CfgIntCtrl(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* ------- ALLOCATE MEMORY FOR DMA DESCRIPTORS -------- */
+    nbytes = pdev_cfg->RxDescNbr * sizeof(DEV_DESC);            /* Determine block size.                                */
+    Mem_PoolCreate ((MEM_POOL   *)&pdev_data->RxDescPool,       /* Pass a pointer to the mem pool to create.            */
+                    (void       *) pdev_cfg->MemAddr,           /* From the dedicated memory.                           */
+                    (CPU_SIZE_T  ) pdev_cfg->MemSize,           /* Dedicated area size.                                 */
+                    (CPU_SIZE_T  ) 1,                           /* Allocate 1 block.                                    */
+                    (CPU_SIZE_T  ) nbytes,                      /* Block size large enough to hold all Rx descriptors.  */
+                    (CPU_SIZE_T  ) 32u,                         /* Block alignment (see Note #8).                       */
+                    (CPU_SIZE_T *)&reqd_octets,                 /* Optional, ptr to variable to store rem nbr bytes.    */
+                    (LIB_ERR    *)&lib_err);                    /* Ptr to variable to return an error code.             */
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = NET_BUF_ERR_POOL_MEM_ALLOC;
+        return;
+    }
+
+
+    nbytes = pdev_cfg->TxDescNbr * sizeof(DEV_DESC);            /* Determine block size.                                */
+    Mem_PoolCreate ((MEM_POOL   *)&pdev_data->TxDescPool,       /* Pass a pointer to the mem pool to create.            */
+                    (void       *) pdev_cfg->MemAddr,           /* From the dedicated memory.                           */
+                    (CPU_SIZE_T  ) pdev_cfg->MemSize,           /* Dedicated area size.                                 */
+                    (CPU_SIZE_T  ) 1,                           /* Allocate 1 block.                                    */
+                    (CPU_SIZE_T  ) nbytes,                      /* Block size large enough to hold all Tx descriptors.  */
+                    (CPU_SIZE_T  ) 32u,                         /* Block alignment (see Note #8).                       */
+                    (CPU_SIZE_T *)&reqd_octets,                 /* Optional, ptr to variable to store rem nbr bytes.    */
+                    (LIB_ERR    *)&lib_err);                    /* Ptr to variable to return an error code.             */
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = NET_BUF_ERR_POOL_MEM_ALLOC;
+        return;
+    }
+
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Start()
+*
+* Description : (1) Start network interface hardware :
+*
+*                   (a) Initialize transmit semaphore count
+*                   (b) Initialize hardware address registers
+*                   (c) Initialize receive and transmit descriptors
+*                   (d) Clear all pending interrupt sources
+*                   (e) Enable supported interrupts
+*                   (f) Enable the transmitter and receiver
+*                   (g) Start / Enable DMA if required
+*
+*
+* Argument(s) : pif         Pointer to a network interface.
+*               ---         Argument validated in NetIF_Start().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Ethernet device successfully started.
+*
+*                                                               - RETURNED BY NetIF_AddrHW_SetHandler() : --
+*                               NET_IF_ERR_NULL_PTR             Argument(s) passed a NULL pointer.
+*                               NET_IF_ERR_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_IF_ERR_INVALID_STATE        Invalid network interface state.
+*                               NET_IF_ERR_INVALID_ADDR         Invalid hardware address.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+*                                                               - RETURNED BY NetOS_Dev_CfgTxRdySignal() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_OS_ERR_INIT_DEV_TX_RDY_VAL  Invalid device transmit ready signal.
+*
+*                                                               ---- RETURNED BY NetDev_RxDescInit() : -----
+*                          !!!!
+*
+*                                                               ---- RETURNED BY NetDev_TxDescInit() : -----
+*                          !!!!
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Start() via 'pdev_api->Start()'.
+*
+* Note(s)     : (2) Many DMA devices may generate only one interrupt for several ready receive
+*                   descriptors.  In order to accommodate this, it is recommended that all DMA
+*                   based drivers count the number of ready receive descriptors during the
+*                   receive event and signal the receive task accordingly ONLY for those
+*                   NEW descriptors which have not yet been accounted for.  Each time a
+*                   descriptor is processed (or discarded) the count for acknowledged and
+*                   unprocessed frames should be decremented by 1.  This function initializes the
+*                   acknowledged receive descriptor count to 0.
+
+*               (3) Setting the maximum number of frames queued for transmission is optional.  By
+*                   default, all network interfaces are configured to block until the previous frame
+*                   has completed transmission.  However, DMA based interfaces may have several
+*                   frames configured for transmission before blocking is required. The number
+*                   of queued transmit frames depends on the number of configured transmit
+*                   descriptors.
+*
+*               (4) The physical hardware address should not be configured from NetDev_Init(). Instead,
+*                   it should be configured from within NetDev_Start() to allow for the proper use
+*                   of NetIF_Ether_HW_AddrSet(), hard coded hardware addresses from the device
+*                   configuration structure, or auto-loading EEPROM's. Changes to the physical address
+*                   only take effect when the device transitions from the DOWN to UP state.
+*
+*               (5) The device hardware address is set from one of the data sources below. Each source
+*                   is listed in the order of precedence.
+*
+*                   (a) Device Configuration Structure       Configure a valid HW address during
+*                                                                compile time.
+*
+*                                                            Configure either "00:00:00:00:00:00" or
+*                                                                an empty string, "", in order to
+*                                                                configure the HW address using using
+*                                                                method (b).
+*
+*                   (b) NetIF_Ether_HW_AddrSet()             Call NetIF_Ether_HW_AddrSet() if the HW
+*                                                                address needs to be configured via
+*                                                                run-time from a different data
+*                                                                source. E.g. Non auto-loading
+*                                                                memory such as I2C or SPI EEPROM.
+*                                                               (see Note #3).
+*
+*                   (c) Auto-Loading via EEPROM.             If neither options a) or b) are used,
+*                                                                the IF layer will use the HW address
+*                                                                obtained from the network hardware
+*                                                                address registers.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Start (NET_IF   *pif,
+                            NET_ERR  *perr)
+{
+    NET_DEV_BSP_ETHER  *pdev_bsp;
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    CPU_INT08U          hw_addr[NET_IF_ETHER_ADDR_SIZE];
+    CPU_INT08U          hw_addr_len;
+    CPU_BOOLEAN         hw_addr_cfg;
+    NET_ERR             err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev_bsp  = (NET_DEV_BSP_ETHER *)pif->Dev_BSP;              /* Obtain ptr to dev BSP.                               */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ---------------- CFG TX RDY SIGNAL ----------------- */
+    NetIF_DevCfgTxRdySignal(pif,                                /* See Note #3.                                         */
+                            pdev_cfg->TxDescNbr,
+                            perr);
+    if (*perr != NET_IF_ERR_NONE) {
+         return;
+    }
+
+    *perr = NET_DEV_ERR_NONE;
+                                                                /* ------------------- CFG HW ADDR -------------------- */
+    hw_addr_cfg = DEF_NO;                                       /* See Notes #4 & #5.                                   */
+
+    NetASCII_Str_to_MAC(pdev_cfg->HW_AddrStr,                   /* Get configured HW MAC address string, if any ...     */
+                       &hw_addr[0],                             /* ... (see Note #5a).                                  */
+                       &err);
+    if (err == NET_ASCII_ERR_NONE) {
+        NetIF_AddrHW_SetHandler((NET_IF_NBR  ) pif->Nbr,
+                                (CPU_INT08U *)&hw_addr[0],
+                                (CPU_INT08U  ) sizeof(hw_addr),
+                                (NET_ERR    *)&err);
+    }
+
+    if (err == NET_IF_ERR_NONE) {                               /* If no errors, configure device    HW MAC address.    */
+        hw_addr_cfg = DEF_YES;
+
+    } else {                                                    /* Else get  app-configured IF layer HW MAC address, ...*/
+                                                                /* ... if any (see Note #5b).                           */
+        hw_addr_len = sizeof(hw_addr);
+        NetIF_AddrHW_GetHandler(pif->Nbr, &hw_addr[0], &hw_addr_len, &err);
+        if (err == NET_IF_ERR_NONE) {
+            hw_addr_cfg  = NetIF_AddrHW_IsValidHandler(pif->Nbr, &hw_addr[0], &err);
+        } else {
+            hw_addr_cfg  = DEF_NO;
+        }
+
+        if (hw_addr_cfg != DEF_YES) {                           /* Else attempt to get device's automatically loaded ...*/
+            if (*perr != NET_IF_ERR_NONE) {                     /* No valid HW MAC address configured, return error.    */
+                 return;
+            }
+        }
+    }
+
+    if (hw_addr_cfg == DEF_YES) {                               /* If necessary, set device HW MAC address.             */
+        pdev->SPEC_ADDR1_BOT = (((CPU_INT32U)hw_addr[0] << (0 * DEF_INT_08_NBR_BITS)) |
+                                ((CPU_INT32U)hw_addr[1] << (1 * DEF_INT_08_NBR_BITS)) |
+                                ((CPU_INT32U)hw_addr[2] << (2 * DEF_INT_08_NBR_BITS)) |
+                                ((CPU_INT32U)hw_addr[3] << (3 * DEF_INT_08_NBR_BITS)));
+
+        pdev->SPEC_ADDR1_TOP = (((CPU_INT32U)hw_addr[4] << (0 * DEF_INT_08_NBR_BITS)) |
+                                ((CPU_INT32U)hw_addr[5] << (1 * DEF_INT_08_NBR_BITS)));
+    }
+
+
+                                                                /* --------------- INIT DMA DESCRIPTORS --------------- */
+    NetDev_RxDescInit(pif, perr);                               /* Initialize Rx descriptors.                           */
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+    pdev_data->RxNRdyCtr = 0;                                   /* No pending frames to process (see Note #3).          */
+
+
+    NetDev_TxDescInit(pif, perr);                               /* Initialize Tx descriptors.                           */
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+
+
+                                                                /* -------------------- CFG INT'S --------------------- */
+    pdev->INTR_STATUS |= INT_STATUS_MASK_ALL;                   /* Clear all pending int. sources.                      */
+    pdev->RX_STATUS    = 0xFFFFFFFF;
+    pdev->TX_STATUS    = 0xFFFFFFFF;
+    pdev->INTR_EN      = INT_STATUS_MASK_SUPPORTED;             /* Enable Rx, Tx and other supported int. sources.      */
+
+    pdev->USER_IO      = DEF_BIT_00;
+
+    pdev->NET_CFG |= GEM_BIT_CFG_FCS_REMOVE  |                  /* Remove check seq, enable uni/multi hash.             */
+                     GEM_BIT_CFG_UNI_HASH_EN |
+                     GEM_BIT_CFG_MULTI_HASH_EN;
+
+    pdev->NET_CFG |= GEM_BIT_CFG_FULL_DUPLEX |                  /* Full speed by default.                               */
+                     GEM_BIT_CFG_GIGE_EN     |
+                     GEM_BIT_CFG_SPEED;
+
+    pdev->DMA_CFG |= GEM_BIT_DMACFG_AHB_RX_SIZE(0x18u)  |       /* Max fifo depth.                                      */
+                     GEM_BIT_DMACFG_CSUM_GEN_OFFLOAD_EN |       /* Checksum offloading.                                 */
+                     GEM_BIT_DMACFG_RX_AHB_BURST(0x1F)  |       /* Max AHB burst length.                                */
+                     GEM_BIT_DMACFG_DISC_WHEN_NO_AHB;           /* Discard frame on overflow.                           */
+
+    pdev->DMA_CFG &= ~GEM_BIT_DMACFG_AHB_PKT_SWAP_EN;
+
+    CPU_MB();
+                                                                /* ------------------ ENABLE RX & TX ------------------ */
+    pdev->NET_CTRL |= GEM_BIT_CTRL_TX_EN  |                     /* Enable transmitter & receiver.                       */
+                      GEM_BIT_CTRL_RX_EN  |
+                      GEM_BIT_CTRL_MGMT_PORT_EN;
+
+    CPU_MB();
+
+    pdev_bsp->CfgClk(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Stop()
+*
+* Description : (1) Shutdown network interface hardware :
+*
+*                   (a) Disable the receiver and transmitter
+*                   (b) Disable receive and transmit interrupts
+*                   (c) Clear pending interrupt requests
+*                   (d) Free ALL receive descriptors (Return ownership to hardware)
+*                   (e) Deallocate ALL transmit buffers
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE    No Error
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Stop() via 'pdev_api->Stop()'.
+*
+* Note(s)     : (2) (a) (1) It is recommended that a device driver should only post all currently-used,
+*                           i.e. not-fully-transmitted, transmit buffers to the network interface transmit
+*                           deallocation queue.
+*
+*                       (2) However, a driver MAY attempt to post all queued &/or transmitted buffers.
+*                           The network interface transmit deallocation task will silently ignore any
+*                           unknown or duplicate transmit buffers.  This allows device drivers to
+*                           indiscriminately & easily post all transmit buffers without determining
+*                           which buffers have NOT yet been transmitted.
+*
+*                   (b) (1) Device drivers should assume that the network interface transmit deallocation
+*                           queue is large enough to post all currently-used transmit buffers.
+*
+*                       (2) If the transmit deallocation queue is NOT large enough to post all transmit
+*                           buffers, some transmit buffers may/will be leaked/lost.
+*
+*               (3) All functions that require device register access MUST obtain reference to the
+*                   device hardware register space PRIOR to attempting to access any registers.
+*                   Register definitions SHOULD NOT be absolute & SHOULD use the provided base
+*                   address within the device configuration structure, as well as the device
+*                   register definition structure in order to properly resolve register addresses
+*                   during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Stop (NET_IF   *pif,
+                           NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_INT08U          i;
+    NET_ERR             err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ----------------- DISABLE RX & TX ------------------ */
+    pdev->NET_CTRL &= ~(GEM_BIT_CTRL_TX_EN  |                   /* Disable transmitter & receiver.                      */
+                        GEM_BIT_CTRL_RX_EN);
+
+                                                                /* -------------- DISABLE & CLEAR INT'S --------------- */
+    pdev->INTR_DIS    |=  INT_STATUS_MASK_SUPPORTED;            /* Disable Rx, Tx and other supported int. sources.     */
+    pdev->INTR_STATUS |=  INT_STATUS_MASK_ALL;                  /* Clear all pending int. sources.                      */
+
+
+                                                                /* --------------- FREE RX DESCRIPTORS ---------------- */
+    NetDev_RxDescFreeAll(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------- FREE USED TX DESCRIPTORS ------------- */
+    *perr = NET_DEV_ERR_NONE;
+    pdesc = &pdev_data->TxBufDescPtrStart[0];
+    for (i = 0; i < pdev_cfg->TxDescNbr; i++) {
+        if (DEF_BIT_IS_SET(pdesc->Status, GEM_TXBUF_USED)) {    /* If NOT yet  tx'd, ...                                */
+                                                                /* ... dealloc tx buf (see Note #2a1).                  */
+            NetIF_TxDeallocTaskPost((CPU_INT08U *)(pdesc->Addr & GEM_TXBUF_ADDR_MASK ), &err);
+           (void)&err;                                          /* Ignore possible dealloc err (see Note #2b2).         */
+        }
+        pdesc++;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Rx()
+*
+* Description : (1) This function returns a pointer to the received data to the caller :
+*                   (a) Decrement frame counter
+*                   (b) Determine which receive descriptor caused the interrupt
+*                   (c) Obtain pointer to data area to replace existing data area
+*                   (d) Reconfigure descriptor with pointer to new data area
+*                   (e) Set return values.  Pointer to received data area and size
+*                   (f) Update current receive descriptor pointer
+*                   (g) Increment statistic counters
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               p_data  Pointer to pointer to received DMA data area. The received data
+*                       area address should be returned to the stack by dereferencing
+*                       p_data as *p_data = (address of receive data area).
+*
+*               size    Pointer to size. The number of bytes received should be returned
+*                       to the stack by dereferencing size as *size = (number of bytes).
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE            No Error
+*                           NET_DEV_ERR_RX              Generic Rx error.
+*                           NET_DEV_ERR_INVALID_SIZE    Invalid Rx frame size.
+*                           NET_BUF error codes         Potential NET_BUF error codes
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt() via 'pdev_api->Rx()'.
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) If a receive error occurs and the descriptor is invalid then the function
+*                   SHOULD return 0 for the size, a NULL pointer to the data area AND an
+*                   error equal to NET_DEV_ERR_RX.
+*
+*                   (a) If the next expected ready / valid descriptor is NOT owned by
+*                       software, then there is descriptor pointer corruption and the
+*                       driver should NOT increment the current receive descriptor
+*                       pointer.
+*                   (b) If the descriptor IS valid, but an error is indicated within
+*                       the descriptor status bits, or length field, then the driver
+*                       MUST increment the current receive descriptor pointer and discard
+*                       the received frame.
+*                   (c) If a new data area is unavailable, the driver MUST increment
+*                       the current receive descriptor pointer and discard the received
+*                       frame.  This will invoke the DMA to re-use the existing configured
+*                       data area.
+*
+*               (4) Some devices optionally include each receive packet's CRC in the received
+*                   packet data & size.
+*
+*                   (a) CRCs might optionally be included at run-time or at build time. Each
+*                       driver doesn't necessarily need to conditionally include or exclude
+*                       the CRC at build time.  Instead, a device may include/exclude the code
+*                       to subtract the CRC size from the packet size.
+*
+*                   (b) The CRC size should be subtracted from the receive packet size ONLY if
+*                       the CRC was included in the received packet data.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Rx (NET_IF       *pif,
+                         CPU_INT08U  **p_data,
+                         CPU_INT16U   *size,
+                         NET_ERR      *perr)
+{
+    NET_DEV_DATA       *pdev_data;
+    DEV_DESC           *pdesc;
+    CPU_INT08U         *pbuf_new;
+    CPU_INT32U          rx_len;
+    CPU_INT32U          addr;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE CFG/DATA -------- */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdesc     = (DEV_DESC          *)pdev_data->RxBufDescPtrCur;/* Obtain ptr to next ready descriptor.                 */
+
+    addr = pdesc->Addr;
+
+                                                                /* ------------- CHECK FOR RECEIVE ERRORS ------------- */
+    if ((addr & 1u) == 0) {                                     /* See Note #3a.                                        */
+        *size   = (CPU_INT16U  )0;
+        *p_data = (CPU_INT08U *)0;
+        *perr   = (NET_ERR     )NET_DEV_ERR_RX;
+         return;
+    }
+                                                                /* --------------- OBTAIN FRAME LENGTH ---------------- */
+    rx_len = (pdesc->Status & GEM_RXBUF_SIZE_MASK);
+
+    if (rx_len <  NET_IF_ETHER_FRAME_MIN_SIZE) {                /* If frame is a runt, ...                              */
+        NetDev_RxDescPtrCurInc(pif);                            /* ... discard rx'd frame    (see Note #3b).            */
+       *size   = (CPU_INT16U  )0;
+       *p_data = (CPU_INT08U *)0;
+       *perr   = (NET_ERR     )NET_DEV_ERR_INVALID_SIZE;
+        return;
+    }
+
+                                                                /* --------- OBTAIN PTR TO NEW DMA DATA AREA ---------- */
+                                                                /* Request an empty buffer.                             */
+    pbuf_new = NetBuf_GetDataPtr((NET_IF        *)pif,
+                                 (NET_TRANSACTION)NET_TRANSACTION_RX,
+                                 (NET_BUF_SIZE   )NET_IF_ETHER_FRAME_MAX_SIZE,
+                                 (NET_BUF_SIZE   )NET_IF_IX_RX,
+                                 (NET_BUF_SIZE  *)0,
+                                 (NET_BUF_SIZE  *)0,
+                                 (NET_BUF_TYPE  *)0,
+                                 (NET_ERR       *)perr);
+    if (*perr != NET_BUF_ERR_NONE) {                            /* If unable to get a buffer (see Note #3c).            */
+         NetDev_RxDescPtrCurInc(pif);                           /* Free the current descriptor.                         */
+        *size   = (CPU_INT16U  )0;
+        *p_data = (CPU_INT08U *)0;
+         return;
+    }
+
+   *size   =  rx_len;                                           /* Return the size of the received frame.               */
+   *p_data = (CPU_INT08U *)(addr & GEM_RXBUF_ADDR_MASK);        /* Return a pointer to the newly received data area.    */
+
+   CPU_DCACHE_RANGE_INV(*p_data, *size);                        /* Invalidate received buffer.                          */
+
+   if(pdesc == pdev_data->RxBufDescPtrEnd) {                    /* Update the descriptor to point to a new data area    */
+       pdesc->Addr = ((CPU_INT32U)pbuf_new & GEM_RXBUF_ADDR_MASK) | GEM_RXBUF_ADDR_OWN | GEM_RXBUF_ADDR_WRAP;
+   } else {
+       pdesc->Addr = ((CPU_INT32U)pbuf_new & GEM_RXBUF_ADDR_MASK) | GEM_RXBUF_ADDR_OWN;
+   }
+
+   *perr = NET_DEV_ERR_NONE;
+    NetDev_RxDescPtrCurInc(pif);                                /* Free the current descriptor.                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Tx()
+*
+* Description : (1) This function transmits the specified data :
+*
+*                   (a) Check if the transmitter is ready.
+*                   (b) Configure the next transmit descriptor for pointer to data and data size.
+*                   (c) Issue the transmit command.
+*                   (d) Increment pointer to next transmit descriptor
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               p_data  Pointer to data to transmit.
+*
+*               size    Size    of data to transmit.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No Error
+*                           NET_DEV_ERR_TX_BUSY     No Tx descriptors available
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPkt() via 'pdev_api->Tx()'.
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) Care should be taken to avoid skipping transmit descriptors while selecting
+*                   the next available descriptor.  Software MUST track the descriptor which
+*                   is expected to generate the next transmit complete interrupt.  Skipping
+*                   descriptors, unless carefully accounted for, may make it difficult to
+*                   know which descriptor will complete transmission next.  Some device
+*                   drivers may find it useful to adjust pdev_data->TxBufDescCompPtr after
+*                   having selected the next available transmit descriptor.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Tx (NET_IF      *pif,
+                         CPU_INT08U  *p_data,
+                         CPU_INT16U   size,
+                         NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_INT32U          desc_status;
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+    pdesc     = (DEV_DESC          *)pdev_data->TxBufDescPtrCur;/* Obtain ptr to next available Tx descriptor.          */
+
+
+    desc_status = pdesc->Status;
+
+    if (desc_status & GEM_TXBUF_USED) {                         /* Find next available Tx descriptor (see Note #3).     */
+        pdesc->Addr = (CPU_INT32U)p_data & GEM_TXBUF_ADDR_MASK; /* Configure descriptor with Tx data area address.      */
+
+        CPU_DCACHE_RANGE_FLUSH(p_data, size);                   /* Flush/Clean buffer to send.                          */
+
+        if(pdev_data->TxBufDescPtrCur == pdev_data->TxBufDescPtrEnd) {
+            pdesc->Status = GEM_TXBUF_WRAP | (((size) & GEM_TXBUF_LENGTH_MASK) | GEM_TXBUF_LAST);
+        } else {
+            pdesc->Status = (((size) & GEM_TXBUF_LENGTH_MASK) | GEM_TXBUF_LAST);
+        }
+
+                                                                /* Update curr desc ptr to point to next desc.          */
+        if (pdev_data->TxBufDescPtrCur != pdev_data->TxBufDescPtrEnd) {
+            pdev_data->TxBufDescPtrCur++;
+        } else {
+            pdev_data->TxBufDescPtrCur = pdev_data->TxBufDescPtrStart;
+        }
+
+        CPU_MB();                                                /* Force writes to buf & desc to be visible to the MAC.*/
+
+        pdev->NET_CTRL |= GEM_BIT_CTRL_START_TX;
+
+        pdesc = pdev_data->TxBufDescCompPtr;
+        pdev->INTR_EN = GEM_BIT_INT_TX_COMPLETE;
+
+       *perr = NET_DEV_ERR_NONE;
+    } else {
+       *perr = NET_DEV_ERR_TX_BUSY;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetDev_AddrMulticastAdd()
+*
+* Description : Configure hardware address filtering to accept specified hardware address.
+*
+* Argument(s) : pif         Pointer to an Ethernet network interface.
+*               ---         Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               paddr_hw    Pointer to hardware address.
+*               --------    Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_len    Length  of hardware address.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Hardware address successfully configured.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'len' passed equal to 0.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_AddrMulticastAdd() via 'pdev_api->AddrMulticastAdd()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_AddrMulticastAdd (NET_IF      *pif,
+                                       CPU_INT08U  *paddr_hw,
+                                       CPU_INT08U   addr_hw_len,
+                                       NET_ERR     *perr)
+{
+#ifdef  NET_MCAST_MODULE_EN
+    NET_DEV            *pdev;
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    CPU_INT08U          bit_nbr;
+    CPU_INT08U         *paddr_hash_ctrs;
+    CPU_SR_ALLOC();
+
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* Calculate the 6-bit hash value.                      */
+    bit_nbr =   ((paddr_hw[0]       & 0x3F)                              & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[0] >> 6) & 0x3) | ((paddr_hw[1] & 0xF) << 2)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[1] >> 4) & 0xF) | ((paddr_hw[2] & 0x3) << 4)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[2] >> 2) & 0x3F))                             & DEF_BIT_FIELD(6, 0u))
+            ^   ((paddr_hw[3]       & 0x3F)                              & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[3] >> 6) & 0x3) | ((paddr_hw[4] & 0xF) << 2)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[4] >> 4) & 0xF) | ((paddr_hw[5] & 0x3) << 4)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[5] >> 2) & 0x3F))                             & DEF_BIT_FIELD(6, 0u));
+
+
+    CPU_CRITICAL_ENTER();
+    paddr_hash_ctrs = &pdev_data->MulticastAddrHashBitCtr[bit_nbr];
+    (*paddr_hash_ctrs)++;                                       /* Increment hash bit reference ctr.                    */
+
+    if (*paddr_hash_ctrs == 1u) {
+        if (bit_nbr > 31u) {
+            DEF_BIT_SET(pdev->HASH_TOP, DEF_BIT(bit_nbr - 32u));
+        } else {
+            DEF_BIT_SET(pdev->HASH_BOT, DEF_BIT(bit_nbr));
+        }
+    }
+    CPU_CRITICAL_EXIT();
+
+#else
+   (void)&pif;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&paddr_hw;
+#endif
+
+   (void)&addr_hw_len;                                          /* Prevent 'variable unused' compiler warning.          */
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                     NetDev_AddrMulticastRemove()
+*
+* Description : Configure hardware address filtering to reject specified hardware address.
+*
+* Argument(s) : pif         Pointer to an Ethernet network interface.
+*               ---         Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               paddr_hw    Pointer to hardware address.
+*               --------    Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_len    Length  of hardware address.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Hardware address successfully removed.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'len' passed equal to 0.
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_AddrMulticastAdd() via 'pdev_api->AddrMulticastRemove()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_AddrMulticastRemove (NET_IF      *pif,
+                                          CPU_INT08U  *paddr_hw,
+                                          CPU_INT08U   addr_hw_len,
+                                          NET_ERR     *perr)
+{
+#ifdef  NET_MCAST_MODULE_EN
+    NET_DEV            *pdev;
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    CPU_INT08U          bit_nbr;
+    CPU_INT08U         *paddr_hash_ctrs;
+    CPU_SR_ALLOC();
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+    bit_nbr =   ((paddr_hw[0]       & 0x3F)                              & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[0] >> 6) & 0x3) | ((paddr_hw[1] & 0xF) << 2)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[1] >> 4) & 0xF) | ((paddr_hw[2] & 0x3) << 4)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[2] >> 2) & 0x3F))                             & DEF_BIT_FIELD(6, 0u))
+            ^   ((paddr_hw[3]       & 0x3F)                              & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[3] >> 6) & 0x3) | ((paddr_hw[4] & 0xF) << 2)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[4] >> 4) & 0xF) | ((paddr_hw[5] & 0x3) << 4)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[5] >> 2) & 0x3F))                             & DEF_BIT_FIELD(6, 0u));
+
+    CPU_CRITICAL_ENTER();
+    paddr_hash_ctrs = &pdev_data->MulticastAddrHashBitCtr[bit_nbr];
+
+    if (*paddr_hash_ctrs > 1u) {
+       (*paddr_hash_ctrs)--;                                    /* Decrement hash bit reference ctr.                    */
+       CPU_CRITICAL_EXIT();
+       *perr = NET_DEV_ERR_NONE;
+    }
+
+    *paddr_hash_ctrs = 0u;
+
+    if (bit_nbr > 31u) {
+        DEF_BIT_CLR(pdev->HASH_TOP, DEF_BIT(bit_nbr - 32u));
+    } else {
+        DEF_BIT_CLR(pdev->HASH_BOT, DEF_BIT(bit_nbr));
+    }
+
+    CPU_CRITICAL_EXIT();
+
+#else
+   (void)&pif;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&paddr_hw;
+#endif
+
+   (void)&addr_hw_len;                                          /* Prevent 'variable unused' compiler warning.          */
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_ISR_Handler()
+*
+* Description : This function serves as the device Interrupt Service Routine Handler. This ISR
+*               handler MUST service and clear all necessary and enabled interrupt events for
+*               the device.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*               ---
+*
+*               type    Network Interface defined argument representing the type of ISR in progress. Codes
+*                       for Rx, Tx, Overrun, Jabber, etc... are defined within net_if.h and are passed
+*                       into this function by the corresponding Net BSP ISR handler function. The Net
+*                       BSP ISR handler function may be called by a specific ISR vector and therefore
+*                       know which ISR type code to pass.  Otherwise, the Net BSP may pass
+*                       NET_DEV_ISR_TYPE_UNKNOWN and the device driver MAY ignore the parameter when
+*                       the ISR type can be deduced by reading an available interrupt status register.
+*
+*                       Type codes that are defined within net_if.c include but are not limited to :
+*                           NET_DEV_ISR_TYPE_RX
+*                           NET_DEV_ISR_TYPE_TX_COMPLETE
+*                           NET_DEV_ISR_TYPE_UNKNOWN
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Specific first- or second-level BSP ISR handler.
+*
+* Note(s)     : (1) This function is called via function pointer from the context of an ISR.
+*
+*               (2) In the case of an interrupt occurring prior to Network Protocol Stack initialization,
+*                   the device driver should ensure that the interrupt source is cleared in order
+*                   to prevent the potential for an infinite interrupt loop during system initialization.
+*
+*               (3) Many DMA devices generate only one interrupt event for several ready receive
+*                   descriptors.  In order to accommodate this, it is recommended that all DMA based
+*                   drivers count the number of ready receive descriptors during the receive event
+*                   and signal the receive task for ONLY newly received descriptors which have not
+*                   yet been signaled for during the last receive interrupt event.
+*
+*               (4) Many DMA devices generate only one interrupt event for several transmit
+*                   complete descriptors.  In this case, the driver MUST determine which descriptors
+*                   have completed transmission and post each descriptor data area address to
+*                   the transmit deallocation task.  The code provided below assumes one
+*                   interrupt per transmit event which may not necessarily be the case for all
+*                   devices.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_ISR_Handler (NET_IF            *pif,
+                                  NET_DEV_ISR_TYPE   type)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_DATA            reg_val;
+    CPU_INT32U          int_clr;
+    CPU_INT08U         *p_data;
+    NET_ERR             err;
+
+
+   (void)&type;                                                 /* Prevent 'variable unused' compiler warning.          */
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ---------------- DETERMINE ISR TYPE ---------------- */
+    reg_val = pdev->INTR_STATUS;
+    int_clr = 0u;
+
+                                                                /* HANDLE RX ISRs                                       */
+    if ((reg_val & RX_ISR_EVENT_MSK) > 0) {
+
+        NetIF_RxTaskSignal(pif->Nbr, &err);                     /* Signal Net IF RxQ Task.                              */
+
+
+        pdev->INTR_DIS    = GEM_BIT_INT_RX_COMPLETE;
+        int_clr = RX_ISR_EVENT_MSK;                             /* Clear device Rx interrupt event flag.                */
+    }
+
+
+                                                                /* HANDLE TX ISRs                                       */
+    if ((reg_val & TX_ISR_EVENT_MSK) > 0) {
+         pdesc = pdev_data->TxBufDescCompPtr;
+         p_data = (CPU_INT08U *)pdesc->Addr;
+         NetIF_TxDeallocTaskPost(p_data, &err);
+         NetIF_DevTxRdySignal(pif);                             /* Signal Net IF that Tx resources are available.       */
+         if (pdev_data->TxBufDescCompPtr != pdev_data->TxBufDescPtrEnd) {
+             pdev_data->TxBufDescCompPtr++;
+         } else {
+             pdev_data->TxBufDescCompPtr = pdev_data->TxBufDescPtrStart;
+         }
+
+         int_clr |= TX_ISR_EVENT_MSK;                           /* Clear device Tx interrupt event flag.                */
+    }
+
+                                                                /* HANDLE MISC ISRs                                     */
+    int_clr |= UNHANDLED_ISR_EVENT_MASK;
+    pdev->INTR_STATUS = int_clr;                                /* Clear unhandled interrupt event flag.                */
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_IO_Ctrl()
+*
+* Description : This function provides a mechanism for the Phy driver to update the MAC link
+*               and duplex settings, as well as a method for the application and link state
+*               timer to obtain the current link status.  Additional user specified driver
+*               functionality MAY be added if necessary.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*
+*               opt     Option code representing desired function to perform. The Network Protocol Suite
+*                       specifies the option codes below. Additional option codes may be defined by the
+*                       driver developer in the driver's header file.
+*                           NET_IF_IO_CTRL_LINK_STATE_GET
+*                           NET_IF_IO_CTRL_LINK_STATE_UPDATE
+*
+*                       Driver defined operation codes MUST be defined starting from 20 or higher
+*                       to prevent clashing with the pre-defined operation code types. See the
+*                       device driver header file for more details.
+*
+*               data    Pointer to optional data for either sending or receiving additional function
+*                       arguments or return data.
+*
+*               perr    Pointer to return error code.
+*                           NET_IF_ERR_INVALID_IO_CTRL_OPT      Invalid option number specified.
+*                           NET_IF_ERR_NULL_FNCT                Null interface function pointer encountered.
+*
+*                           NET_DEV_ERR_NONE                    IO Ctrl operation completed successfully.
+*                           NET_DEV_ERR_NULL_PTR                Null argument pointer passed.
+*
+*                           NET_PHY_ERR_NULL_PTR                Pointer argument(s) passed NULL pointer(s).
+*                           NET_PHY_ERR_TIMEOUT_RESET           Phy reset          time-out.
+*                           NET_PHY_ERR_TIMEOUT_AUTO_NEG        Auto-Negotiation   time-out.
+*                           NET_PHY_ERR_TIMEOUT_REG_RD          Phy register read  time-out.
+*                           NET_PHY_ERR_TIMEOUT_REG_WR          Phy register write time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IO_CtrlHandler() via 'pdev_api->IO_Ctrl()',
+*               NetPhy_LinkStateGet()        via 'pdev_api->IO_Ctrl()'.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_IO_Ctrl (NET_IF      *pif,
+                              CPU_INT08U   opt,
+                              void        *p_data,
+                              NET_ERR     *perr)
+{
+    NET_DEV_BSP_ETHER   *pdev_bsp;
+    NET_DEV_LINK_ETHER  *plink_state;
+    NET_DEV_CFG_ETHER   *pdev_cfg;
+    NET_DEV             *pdev;
+    NET_PHY_API_ETHER   *pphy_api;
+    CPU_INT16U           duplex;
+    CPU_INT16U           spd;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_bsp =  (NET_DEV_BSP_ETHER *)pif->Dev_BSP;
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* ----------- PERFORM SPECIFIED OPERATION ------------ */
+    switch (opt) {
+        case NET_IF_IO_CTRL_LINK_STATE_GET_INFO:
+             plink_state = (NET_DEV_LINK_ETHER *)p_data;
+             if (plink_state == (NET_DEV_LINK_ETHER *)0) {
+                *perr = NET_DEV_ERR_NULL_PTR;
+                 return;
+             }
+             pphy_api = (NET_PHY_API_ETHER *)pif->Ext_API;
+             if (pphy_api == (void *)0) {
+                *perr = NET_ERR_FAULT_NULL_FNCT;
+                 return;
+             }
+             pphy_api->LinkStateGet(pif, plink_state, perr);
+             if (*perr != NET_PHY_ERR_NONE) {
+                  return;
+             }
+            *perr = NET_DEV_ERR_NONE;
+             break;
+
+
+        case NET_IF_IO_CTRL_LINK_STATE_UPDATE:
+             plink_state = (NET_DEV_LINK_ETHER *)p_data;
+
+             duplex = NET_PHY_DUPLEX_UNKNOWN;
+             if (plink_state->Duplex != duplex) {
+                 switch (plink_state->Duplex) {
+                    case NET_PHY_DUPLEX_FULL:
+                         pdev->NET_CFG |=  GEM_BIT_CFG_FULL_DUPLEX;
+                         break;
+
+                    case NET_PHY_DUPLEX_HALF:
+                         pdev->NET_CFG &=  ~GEM_BIT_CFG_FULL_DUPLEX;
+                         break;
+
+                    default:
+                         break;
+                 }
+             }
+
+             spd = NET_PHY_SPD_0;
+             if (plink_state->Spd != spd) {
+                 switch (plink_state->Spd) {
+                     case NET_PHY_SPD_10:
+                          pdev->NET_CFG &= ~GEM_BIT_CFG_SPEED;
+                          pdev->NET_CFG &= ~GEM_BIT_CFG_GIGE_EN;
+                          break;
+
+                     case NET_PHY_SPD_100:
+                          pdev->NET_CFG |= GEM_BIT_CFG_SPEED;
+                          pdev->NET_CFG &= ~GEM_BIT_CFG_GIGE_EN;
+                          break;
+
+                     case NET_PHY_SPD_1000:
+                          pdev->NET_CFG |= GEM_BIT_CFG_GIGE_EN | GEM_BIT_CFG_SPEED;
+                          break;
+
+                     default:
+                          break;
+                 }
+             }
+            *perr = NET_DEV_ERR_NONE;
+             break;
+
+
+        default:
+            *perr = NET_IF_ERR_INVALID_IO_CTRL_OPT;
+             break;
+    }
+
+    if (opt == NET_IF_IO_CTRL_LINK_STATE_UPDATE) {
+        pdev_bsp->CfgClk(pif, perr);
+        if (*perr != NET_DEV_ERR_NONE) {
+             return;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_MII_Rd()
+*
+* Description : Write data over the (R)MII bus to the specified Phy register.
+*
+* Argument(s) : pif         Pointer to the interface requiring service.
+*
+*               phy_addr   (R)MII bus address of the Phy requiring service.
+*
+*               reg_addr    Phy register number to write to.
+*
+*               p_data      Pointer to variable to store returned register data.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NULL_PTR            Pointer argument(s) passed NULL pointer(s).
+*                           NET_PHY_ERR_NONE                MII write completed successfully.
+*                           NET_PHY_ERR_TIMEOUT_REG_RD      Register read time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various Phy functions.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_MII_Rd (NET_IF      *pif,
+                             CPU_INT08U   phy_addr,
+                             CPU_INT08U   reg_addr,
+                             CPU_INT16U  *p_data,
+                             NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV            *pdev;
+    CPU_INT32U          timeout;
+    CPU_INT32U          phy_word;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_data == (CPU_INT16U *)0) {
+       *perr    =  NET_DEV_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ------------ PERFORM MII READ OPERATION ------------ */
+
+    phy_word = GEM_BIT_PHYMGMT_OPERATION(2u)     |
+               GEM_BIT_PHYMGMT_CLAUSE_22         |
+               GEM_BIT_PHYMGMT_MUST10(2u)        |
+               GEM_BIT_PHYMGMT_PHYADDR(phy_addr) |
+               GEM_BIT_PHYMGMT_REGADDR(reg_addr) |
+               GEM_BIT_PHYMGMT_DATA(0u);
+
+    pdev->PHY_MAINT = phy_word;
+
+    for(timeout = 0; timeout < 10000u; timeout++) {
+        if(DEF_BIT_IS_SET(pdev->NET_STATUS, GEM_BIT_STATUS_PHY_MGMT_IDLE)) {
+            break;
+        }
+    }
+
+    *p_data = pdev->PHY_MAINT & GEM_BIT_PHYMGMT_DATA_MSK;
+
+    *perr = NET_PHY_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_MII_Wr()
+*
+* Description : Write data over the (R)MII bus to the specified Phy register.
+*
+* Argument(s) : pif         Pointer to the interface requiring service.
+*
+*               phy_addr   (R)MII bus address of the Phy requiring service.
+*
+*               reg_addr    Phy register number to write to.
+*
+*               data        Data to write to the specified Phy register.
+*
+*               perr    Pointer to return error code.
+*                           NET_PHY_ERR_NONE                MII write completed successfully.
+*                           NET_PHY_ERR_TIMEOUT_REG_WR      Register write time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various Phy functions.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_MII_Wr (NET_IF      *pif,
+                             CPU_INT08U   phy_addr,
+                             CPU_INT08U   reg_addr,
+                             CPU_INT16U   data,
+                             NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV            *pdev;
+    CPU_INT32U          timeout;
+    CPU_INT32U          phy_word;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ------------ PERFORM MII READ OPERATION ------------ */
+
+    phy_word = GEM_BIT_PHYMGMT_OPERATION(1u)     |
+               GEM_BIT_PHYMGMT_CLAUSE_22         |
+               GEM_BIT_PHYMGMT_MUST10(2u)        |
+               GEM_BIT_PHYMGMT_PHYADDR(phy_addr) |
+               GEM_BIT_PHYMGMT_REGADDR(reg_addr) |
+               GEM_BIT_PHYMGMT_DATA(data);
+
+    pdev->PHY_MAINT = phy_word;
+
+    for(timeout = 0; timeout < 10000u; timeout++) {
+        if(DEF_BIT_IS_SET(pdev->NET_STATUS, GEM_BIT_STATUS_PHY_MGMT_IDLE)) {
+            break;
+        }
+    }
+
+   *perr = NET_PHY_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_RxDescInit()
+*
+* Description : (1) This function initializes the Rx descriptor list for the specified interface :
+*                   (a) Obtain reference to the Rx descriptor(s) memory block
+*                   (b) Initialize Rx descriptor pointers
+*                   (c) Obtain Rx descriptor data areas
+*                   (d) Initialize hardware registers
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No error
+*                           NET_IF_MGR_ERR_nnnn     Various Network Interface management error codes
+*                           NET_BUF_ERR_nnn         Various Network buffer error codes
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Start().
+*
+* Note(s)     : (2) Memory allocation for the descriptors MUST be performed BEFORE calling this
+*                   function. This ensures that multiple calls to this function do NOT allocate
+*                   additional memory to the interface and that the Rx descriptors may be safely
+*                   re-initialized by calling this function.
+*
+*               (3) All Rx descriptors are allocated as ONE memory block.  This removes the
+*                   necessity to ensure that descriptor blocks are returned to the descriptor
+*                   pool in the opposite order in which they were allocated; doing so would
+*                   ensure that each memory block address was contiguous to the one before
+*                   and after it.  If the descriptors are NOT contiguous, then software
+*                   MUST NOT assign a pointer to the pool start address and use pointer
+*                   arithmetic to navigate the descriptor list.  Since pointer arithmetic
+*                   is a convenient way to navigate the descriptor list, ONE block is allocated
+*                   and the driver uses pointer arithmetic to slice the block into descriptor
+*                   sized units.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_RxDescInit (NET_IF   *pif,
+                                 NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_INT16U          i;
+    void               *p_buf;
+    MEM_POOL           *pmem_pool;
+    CPU_SIZE_T          nbr_octets;
+    LIB_ERR             lib_err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* -------------- ALLOCATE DESCRIPTORS  --------------- */
+                                                                /* See Note #3.                                         */
+
+    pmem_pool  = &pdev_data->RxDescPool;
+    nbr_octets =  pdev_cfg->RxDescNbr * sizeof(DEV_DESC);
+    pdesc      = (DEV_DESC *)Mem_PoolBlkGet((MEM_POOL *) pmem_pool,
+                                            (CPU_SIZE_T) nbr_octets,
+                                            (LIB_ERR  *)&lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = lib_err;
+        return;
+    }
+
+                                                                /* -------------- INIT DESCRIPTOR PTRS  --------------- */
+    pdev_data->RxBufDescPtrStart = (DEV_DESC *)pdesc;
+    pdev_data->RxBufDescPtrCur   = (DEV_DESC *)pdesc;
+    pdev_data->RxBufDescPtrEnd   = (DEV_DESC *)pdesc + (pdev_cfg->RxDescNbr - 1);
+
+                                                                /* --------------- INIT RX DESCRIPTORS ---------------- */
+    for (i = 0; i < pdev_cfg->RxDescNbr; i++) {
+        pdesc->Status =  0;
+        p_buf  =                (void *)NetBuf_GetDataPtr((NET_IF        *)pif,
+                                                         (NET_TRANSACTION)NET_TRANSACTION_RX,
+                                                         (NET_BUF_SIZE   )NET_IF_ETHER_FRAME_MAX_SIZE,
+                                                         (NET_BUF_SIZE   )NET_IF_IX_RX,
+                                                         (NET_BUF_SIZE  *)0,
+                                                         (NET_BUF_SIZE  *)0,
+                                                         (NET_BUF_TYPE  *)0,
+                                                         (NET_ERR       *)perr);
+        if (*perr != NET_BUF_ERR_NONE) {
+             return;
+        }
+
+        CPU_DCACHE_RANGE_FLUSH(p_buf, pdev_cfg->RxBufLargeSize);
+
+        pdesc->Addr = (CPU_INT32U)p_buf;
+
+        pdesc->Addr &= ~GEM_RXBUF_ADDR_OWN;
+
+        if (pdesc == (pdev_data->RxBufDescPtrEnd)) {            /* Set WRAP bit on last descriptor in list.             */
+            pdesc->Addr |= GEM_RXBUF_ADDR_WRAP;
+        }
+
+        pdesc++;                                                /* Point to next descriptor in list.                    */
+    }
+
+                                                                /* ------------- INIT HARDWARE REGISTERS -------------- */
+                                                                /* Configure the DMA with the Rx desc start address.    */
+    pdev->RX_QBAR = (CPU_INT32U)pdev_data->RxBufDescPtrStart;
+
+    *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetDev_RxDescFreeAll()
+*
+* Description : (1) This function returns the descriptor memory block and descriptor data area
+*                   memory blocks back to their respective memory pools :
+*
+*                   (a) Free Rx descriptor data areas
+*                   (b) Free Rx descriptor memory block
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No error
+*                           NET_IF_MGR_ERR_nnnn     Various Network Interface management error codes
+*                           NET_BUF_ERR_nnn         Various Network buffer error codes
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Stop().
+*
+* Note(s)     : (2) No mechanism exists to free a memory pool.  However, ALL receive buffers
+*                   and the Rx descriptor blocks MUST be returned to their respective pools.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_RxDescFreeAll(NET_IF   *pif,
+                                   NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    DEV_DESC           *pdesc;
+    CPU_INT16U          i;
+    CPU_INT08U         *pdesc_data;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE CFG/DATA -------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+
+
+                                                                /* ------------- FREE RX DESC DATA AREAS -------------- */
+    pdesc = pdev_data->RxBufDescPtrStart;
+    for (i = 0; i < pdev_cfg->RxDescNbr; i++) {                 /* Free Rx descriptor ring.                             */
+        pdesc_data = (CPU_INT08U *)(pdesc->Addr & GEM_RXBUF_ADDR_MASK);
+        NetBuf_FreeBufDataAreaRx(pif->Nbr, pdesc_data);         /* Return data area to Rx data area pool.               */
+        pdesc++;
+    }
+
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetDev_RxDescPtrCurInc()
+*
+* Description : (1) Increment current descriptor pointer to next receive descriptor :
+*
+*                   (a) Return ownership of current descriptor back to DMA.
+*                   (b) Point to the next descriptor.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*               ---
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_RxDescPtrCurInc (NET_IF *pif)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    DEV_DESC           *pdesc;
+    NET_DEV            *pdev;
+    NET_ERR             err;
+
+                                                                /* --------- OBTAIN REFERENCE TO DEVICE DATA ---------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdesc     = (DEV_DESC          *)pdev_data->RxBufDescPtrCur;/* Obtain ptr to next ready descriptor.                 */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+    pdesc = pdev_data->RxBufDescPtrCur;                         /* Obtain pointer to current Rx descriptor.             */
+    pdesc->Addr &= ~GEM_RXBUF_ADDR_OWN;
+
+    if (pdev_data->RxBufDescPtrCur != pdev_data->RxBufDescPtrEnd) {
+        pdev_data->RxBufDescPtrCur++;                           /* Point to next Buffer Descriptor.                     */
+    } else {                                                    /* Wrap around end of descriptor list if necessary.     */
+        pdev_data->RxBufDescPtrCur  = pdev_data->RxBufDescPtrStart;
+    }
+
+    pdesc = pdev_data->RxBufDescPtrCur;
+    if (pdesc->Addr & GEM_RXBUF_ADDR_OWN) {
+        NetIF_RxTaskSignal(pif->Nbr, &err);
+    } else {
+        CPU_MB();
+        pdev->INTR_EN = GEM_BIT_INT_RX_COMPLETE;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_TxDescInit()
+*
+* Description : (1) This function initializes the Tx descriptor list for the specified interface :
+*
+*                   (a) Obtain reference to the Rx descriptor(s) memory block
+*                   (b) Initialize Tx descriptor pointers
+*                   (c) Obtain Rx descriptor data areas
+*                   (d) Initialize hardware registers
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No error
+*                           NET_IF_MGR_ERR_nnnn     Various Network Interface management error codes
+*                           NET_BUF_ERR_nnn         Various Network buffer error codes
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Start().
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) All Tx descriptors are allocated as ONE memory block.  This removes the
+*                   necessity to ensure that descriptor blocks are returned to the descriptor
+*                   pool in the opposite order in which they were allocated; doing so would
+*                   ensure that each memory block address was contiguous to the one before
+*                   and after it.  If the descriptors are NOT contiguous, then software
+*                   MUST NOT assign a pointer to the pool start address and use pointer
+*                   arithmetic to navigate the descriptor list.  Since pointer arithmetic
+*                   is a convenient way to navigate the descriptor list, ONE block is allocated
+*                   and the driver uses pointer arithmetic to slice the block into descriptor
+*                   sized units.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_TxDescInit (NET_IF  *pif,
+                                 NET_ERR *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_INT16U          i;
+    MEM_POOL           *pmem_pool;
+    CPU_SIZE_T          nbr_octets;
+    LIB_ERR             lib_err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* -------------- ALLOCATE DESCRIPTORS  --------------- */
+                                                                /* See Note #3.                                         */
+    pmem_pool  = &pdev_data->TxDescPool;
+    nbr_octets =  pdev_cfg->TxDescNbr * sizeof(DEV_DESC);
+    pdesc      = (DEV_DESC *)Mem_PoolBlkGet((MEM_POOL *) pmem_pool,
+                                            (CPU_SIZE_T) nbr_octets,
+                                            (LIB_ERR  *)&lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = lib_err;
+        return;
+    }
+
+                                                                /* -------------- INIT DESCRIPTOR PTRS  --------------- */
+    pdev_data->TxBufDescPtrStart = (DEV_DESC *)pdesc;
+    pdev_data->TxBufDescPtrCur   = (DEV_DESC *)pdesc;
+    pdev_data->TxBufDescCompPtr  = (DEV_DESC *)pdesc;
+    pdev_data->TxBufDescPtrEnd   = (DEV_DESC *)pdesc + (pdev_cfg->TxDescNbr - 1u);
+
+                                                                /* --------------- INIT TX DESCRIPTORS ---------------- */
+    for (i = 0; i < pdev_cfg->TxDescNbr; i++) {                 /* Initialize Tx descriptor ring                        */
+        pdesc->Status = GEM_TXBUF_USED;
+
+        if (pdesc == (pdev_data->TxBufDescPtrEnd)) {            /* Set WRAP bit on last descriptor in list.             */
+            pdesc->Status |= GEM_TXBUF_WRAP;
+        }
+        pdesc++;                                                /* Point to next descriptor in list.                    */
+    }
+
+                                                                /* ------------- INIT HARDWARE REGISTERS -------------- */
+                                                                /* Configure the DMA with the Tx desc start address.    */
+    pdev->TX_QBAR = (CPU_INT32U)pdev_data->TxBufDescPtrStart;
+
+    *perr = NET_DEV_ERR_NONE;
+}
+
+
+#endif /* NET_IF_ETHER_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem.h
new file mode 100644
index 0000000..7687450
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem.h
@@ -0,0 +1,73 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                                 CADENCE GIGABIT ETHERNET MAC (GEM)
+*
+* Filename      : net_dev_gem.h
+* Version       : V3.04.02
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.02 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DEV_GEM_MODULE_PRESENT
+#define  NET_DEV_GEM_MODULE_PRESENT
+
+#include  
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_API_ETHER  NetDev_API_GEM;
+extern  const  NET_DEV_API_ETHER  NetDev_API_GEM64;
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_ETHER_MODULE_EN     */
+#endif  /* NET_DEV_GEM_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem64.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem64.c
new file mode 100644
index 0000000..60f38b3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem64.c
@@ -0,0 +1,2372 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                                 CADENCE GIGABIT ETHERNET MAC (GEM)
+*                                               64-bit
+*
+* Filename      : net_dev_gem.c
+* Version       : V3.04.02
+* Programmer(s) : JBL
+*                 SB
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.20 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_DEV_GEM_MODULE
+
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  "net_dev_gem.h"
+
+#ifdef NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*
+* Note(s) : (1) Receive buffers usually MUST be aligned to some octet boundary.  However, adjusting
+*               receive buffer alignment MUST be performed from within 'net_dev_cfg.h'.  Do not adjust
+*               the value below as it is used for configuration checking only.
+*********************************************************************************************************
+*/
+
+#define  MII_REG_RD_WR_TO                              10000    /* MII read write timeout.                              */
+#define  RX_BUF_ALIGN_OCTETS                              32    /* See Note #1.                                         */
+
+#define  DEV_RX_CRC_DIS                                    0
+#define  DEV_RX_CRC_EN                                     1
+#define  DEV_RX_CRC_OPT                                    2
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*
+* Note(s) : (1) Instance specific data area structures should be defined below.  The data area
+*               structure typically includes error counters and variables used to track the
+*               state of the device.  Variables required for correct operation of the device
+*               MUST NOT be defined globally and should instead be included within the instance
+*               specific data area structure and referenced as pif->Dev_Data structure members.
+*
+*           (2) DMA based devices may require more than one type of descriptor.  Each descriptor
+*               type should be defined below.  An example descriptor has been provided.
+*
+*           (3) All device drivers MUST track the addresses of ALL buffers that have been
+*               transmitted and not yet acknowledged through transmit complete interrupts.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------- DMA DESCRIPTOR DATA TYPE ------------- */
+typedef  struct  dev_desc {                                     /* See Note #2.                                         */
+    CPU_REG32    Addr;                                          /* Start Address Register.                              */
+    CPU_REG32    Status;                                        /* Packet Status and Control Register.                  */
+    CPU_REG32    AddrHigh;                                      /* Upper Address Register.                              */
+    CPU_REG32    Reserved;
+} DEV_DESC;
+
+                                                                /* --------------- DEVICE INSTANCE DATA --------------- */
+typedef  struct  net_dev_data {
+    MEM_POOL     RxDescPool;
+    MEM_POOL     TxDescPool;
+    DEV_DESC    *RxBufDescPtrStart;
+    DEV_DESC    *RxBufDescPtrCur;
+    DEV_DESC    *RxBufDescPtrEnd;
+    DEV_DESC    *TxBufDescPtrStart;
+    DEV_DESC    *TxBufDescPtrCur;
+    DEV_DESC    *TxBufDescPtrEnd;
+    DEV_DESC    *TxBufDescCompPtr;                              /* See Note #3.                                         */
+    CPU_INT16U   RxNRdyCtr;
+#ifdef  NET_MCAST_MODULE_EN
+    CPU_INT08U   MulticastAddrHashBitCtr[64];
+#endif
+} NET_DEV_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*
+* Note(s) : (1) Device register definitions SHOULD NOT be absolute & SHOULD use the provided base address
+*               within the device configuration structure (see 'net_dev_cfg.c'), as well as each device's
+*               register definition structure in order to properly resolve register addresses at run-time
+*               by mapping the device register definition structure onto an interface's base address.
+*
+*           (2) The device register definition structure MUST take into account appropriate register
+*               offsets & apply reserved space as required.  The registers listed within the register
+*               definition structure MUST reflect the exact ordering and data sizes illustrated in the
+*               device user guide.
+*
+*           (3) Device registers SHOULD be declared as volatile variables so that compilers do NOT cache
+*               register values but MUST perform the steps to read or write each register value for every
+*               register read or write access.
+*********************************************************************************************************
+*/
+
+typedef  struct  net_dev {
+    CPU_REG32  NET_CTRL;                                        /* Network Control.                                     */
+    CPU_REG32  NET_CFG;                                         /* Network Configuration.                               */
+    CPU_REG32  NET_STATUS;                                      /* Network Status.                                      */
+    CPU_REG32  USER_IO;                                         /* User Input/Output.                                   */
+    CPU_REG32  DMA_CFG;                                         /* DMA configuration.                                   */
+    CPU_REG32  TX_STATUS;                                       /* Transmit Status.                                     */
+    CPU_REG32  RX_QBAR;                                         /* Receive Buffer Queue Base Address.                   */
+    CPU_REG32  TX_QBAR;                                         /* Transmit Buffer Queue Base Address.                  */
+    CPU_REG32  RX_STATUS;                                       /* Receive Status.                                      */
+    CPU_REG32  INTR_STATUS;                                     /* Interrupt Status.                                    */
+    CPU_REG32  INTR_EN;                                         /* Interrupt Enable.                                    */
+    CPU_REG32  INTR_DIS;                                        /* Interrupt Disable.                                   */
+    CPU_REG32  INTR_MASK;                                       /* Interrupt Mask Status.                               */
+    CPU_REG32  PHY_MAINT;                                       /* PHY Maintenance.                                     */
+    CPU_REG32  RX_PAUSEQ;                                       /* Receive Pause Quantum.                               */
+    CPU_REG32  TX_PAUSEQ;                                       /* Transmit Pause Quantum.                              */
+    CPU_REG32  PBUF_TX_CUTTHRU;                                 /* Transmit Partial Store and Forward.                  */
+    CPU_REG32  PBUF_RX_CUTTHRU;                                 /* Receive Partial Store and Forward.                   */
+    CPU_REG32  JUMBO_MAX_LENGTH;                                /* Maximum Jumbo Frame Size.                            */
+    CPU_REG32  EXTERNAL_FIFO_INTERFACE;                         /* External FIFO Interface enable.                      */
+    CPU_REG32  RESERVED1;
+    CPU_REG32  AXI_MAX_PIPELINE;                                /* Size of the AXI bus pipeline.                        */
+    CPU_REG32  RESERVED2[10];
+    CPU_REG32  HASH_BOT;                                        /* Hash Register Bottom.                                */
+    CPU_REG32  HASH_TOP;                                        /* Hash Register Top.                                   */
+    CPU_REG32  SPEC_ADDR1_BOT;                                  /* Specific Address 1 Bottom.                           */
+    CPU_REG32  SPEC_ADDR1_TOP;                                  /* Specific Address 1 Top.                              */
+    CPU_REG32  SPEC_ADDR2_BOT;                                  /* Specific Address 2 Bottom.                           */
+    CPU_REG32  SPEC_ADDR2_TOP;                                  /* Specific Address 2 Top.                              */
+    CPU_REG32  SPEC_ADDR3_BOT;                                  /* Specific Address 3 Bottom.                           */
+    CPU_REG32  SPEC_ADDR3_TOP;                                  /* Specific Address 3 Top.                              */
+    CPU_REG32  SPEC_ADDR4_BOT;                                  /* Specific Address 4 Bottom.                           */
+    CPU_REG32  SPEC_ADDR4_TOP;                                  /* Specific Address 4 Top.                              */
+    CPU_REG32  TYPE_ID_MATCH1;                                  /* Type ID Match 1.                                     */
+    CPU_REG32  TYPE_ID_MATCH2;                                  /* Type ID Match 2.                                     */
+    CPU_REG32  TYPE_ID_MATCH3;                                  /* Type ID Match 3.                                     */
+    CPU_REG32  TYPE_ID_MATCH4;                                  /* Type ID Match 4.                                     */
+    CPU_REG32  WAKE_ON_LAN;                                     /* Wake on LAN.                                         */
+    CPU_REG32  IPG_STRETCH;                                     /* IPG Stretch.                                         */
+    CPU_REG32  STACKED_VLAN;                                    /* Stacked VLAN Register.                               */
+    CPU_REG32  TX_PFC_PAUSE;                                    /* Transmit PFC Pause Register.                         */
+    CPU_REG32  SPEC_ADDR1_MASK_BOT;                             /* Specific Address Mask 1 Bottom.                      */
+    CPU_REG32  SPEC_ADDR1_MASK_TOP;                             /* Specific Address Mask 1 Top.                         */
+    CPU_REG32  DMA_ADDR_OR_MASK;                                /* Receive DMA Data Buffer Address Mask.                */
+    CPU_REG32  RX_PTP_UNICAST;                                  /* PTP RX unicast IP destination address.               */
+    CPU_REG32  TX_PTP_UNICAST;                                  /* PTP TX unicast IP destination address.               */
+    CPU_REG32  TSU_NSEC_CMP;                                    /* TSU timer comparison value nanoseconds.              */
+    CPU_REG32  TSU_SEC_CMP;                                     /* TSU timer comparison value seconds 31:0.             */
+    CPU_REG32  TSU_MSB_SEC_CMP;                                 /* TSU timer comparison value seconds 47:32.            */
+    CPU_REG32  TSU_PTP_TX_MSB_SEC;                              /* PTP Event Frame Transmitted Seconds Register 47:32.  */
+    CPU_REG32  TSU_PTP_RX_MSB_SEC;                              /* PTP Event Frame Received Seconds Register 47:32.     */
+    CPU_REG32  TSU_PEER_TX_MSB_SEC;                             /* PTP Peer Event Frame Transmitted Seconds Register 47:32. */
+    CPU_REG32  TSU_PEER_RX_MSB_SEC;                             /* PTP Peer Event Frame Received Seconds Register 47:32. */
+    CPU_REG32  DPRAM_FILL_DBG;                                  /* TX/RX Packet buffer fill levels.                     */
+    CPU_REG32  MODULE_ID;                                       /* Module ID.                                           */
+    CPU_REG32  OCTETS_TX_BOT;                                   /* Octets transmitted bottom.                           */
+    CPU_REG32  OCTETS_TX_TOP;                                   /* Octets transmitted top.                              */
+    CPU_REG32  FRAMES_TX;                                       /* Frames Transmitted.                                  */
+    CPU_REG32  BROADCAST_FRAMES_TX;                             /* Broadcast Frames Transmitted.                        */
+    CPU_REG32  MULTI_FRAMES_TX;                                 /* Multicast Frames Transmitted.                        */
+    CPU_REG32  PAUSE_FRAMES_TX;                                 /* Pause Frames Transmitted.                            */
+    CPU_REG32  FRAMES_TXED_64;                                  /* Frames Transmitted. 64 bytes.                        */
+    CPU_REG32  FRAMES_TXED_65;                                  /* Frames Transmitted. 65 to 127 bytes.                 */
+    CPU_REG32  FRAMES_TXED_128;                                 /* Frames Transmitted. 128 to 255 bytes.                */
+    CPU_REG32  FRAMES_TXED_256;                                 /* Frames Transmitted. 256 to 511 bytes.                */
+    CPU_REG32  FRAMES_TXED_512;                                 /* Frames Transmitted. 512 to 1023 bytes.               */
+    CPU_REG32  FRAMES_TXED_1024;                                /* Frames Transmitted. 1024 to 1518 bytes.              */
+    CPU_REG32  FRAMES_TXED_1519;                                /* Frames Transmitted. Greater than 1518 bytes.         */
+    CPU_REG32  TX_UNDER_RUNS;                                   /* Transmit under runs.                                 */
+    CPU_REG32  SINGLE_COLLISN_FRAMES;                           /* Single Collision Frames.                             */
+    CPU_REG32  MULTI_COLLISN_FRAMES;                            /* Multi Collision Frames.                              */
+    CPU_REG32  EXCESSIVE_COLLISNS;                              /* Excesive Collisions.                                 */
+    CPU_REG32  LATE_COLLISNS;                                   /* Late Collisions.                                     */
+    CPU_REG32  DEFFERED_TX_FRAMES;                              /* Deffered Transmission Frames.                        */
+    CPU_REG32  CARRIER_SENSE_ERRS;                              /* Carrier Sense Errors.                                */
+    CPU_REG32  OCTETS_RX_BOT;                                   /* Octets Received Bottom.                              */
+    CPU_REG32  OCTETS_RX_TOP;                                   /* Octets Received Top.                                 */
+    CPU_REG32  FRAMES_RX;                                       /* Frames Received.                                     */
+    CPU_REG32  BROADCAST_TXED;
+    CPU_REG32  MULTICAST_TXED;
+    CPU_REG32  PAUSE_FRAMES_TXED;
+    CPU_REG32  FRAMES_RXED_64;
+    CPU_REG32  FRAMES_RXED_65;
+    CPU_REG32  FRAMES_RXED_128;
+    CPU_REG32  FRAMES_RXED_256;
+    CPU_REG32  FRAMES_RXED_512;
+    CPU_REG32  FRAMES_RXED_1024;
+    CPU_REG32  FRAMES_RXED_1519;
+    CPU_REG32  UNDERSIZE_FRAMES;
+    CPU_REG32  EXCESSIVE_RX_LENGTH;
+    CPU_REG32  RX_JABBERS;
+    CPU_REG32  FCS_ERRORS;
+    CPU_REG32  RX_LENGTH_ERRORS;
+    CPU_REG32  RX_SYMBOL_ERRORS;
+    CPU_REG32  ALIGNMENT_ERRORS;
+    CPU_REG32  RX_RESOURCE_ERRORS;
+    CPU_REG32  RX_OVERRUNS;
+    CPU_REG32  RX_IP_CK_ERRORS;
+    CPU_REG32  RX_TCP_CK_ERRORS;
+    CPU_REG32  RX_UDP_CK_ERRORS;
+    CPU_REG32  AUTO_FLUSHED_PKTS;
+    CPU_REG32  RESERVED3;
+    CPU_REG32  TSU_TIMER_INCR_SUB_NSEC;
+    CPU_REG32  TSU_TIMER_MSB_SEC;
+    CPU_REG32  TSU_STROBE_MSB_SEC;
+    CPU_REG32  TSU_STROBE_SEC;
+    CPU_REG32  TSU_STROBE_NSEC;
+    CPU_REG32  TSU_TIMER_SEC;
+    CPU_REG32  TSU_TIMER_NSEC;
+    CPU_REG32  TSU_TIMER_ADJUST;
+    CPU_REG32  TSU_TIMER_INCR;
+    CPU_REG32  TSU_PTP_TX_SEC;
+    CPU_REG32  TSU_PTP_TX_NSEC;
+    CPU_REG32  TSU_PTP_RX_SEC;
+    CPU_REG32  TSU_PTP_RX_NSEC;
+    CPU_REG32  TSU_PEER_TX_SEC;
+    CPU_REG32  TSU_PEER_TX_NSEC;
+    CPU_REG32  TSU_PEER_RX_SEC;
+    CPU_REG32  TSU_PEER_RX_NSEC;
+    CPU_REG32  PCS_CONTROL;
+    CPU_REG32  PCS_STATUS;
+    CPU_REG32  PCS_PHY_TOP_ID;
+    CPU_REG32  PCS_PHY_BOT_ID;
+    CPU_REG32  PCS_AN_ADV;
+    CPU_REG32  PCS_AN_LP_BASE;
+    CPU_REG32  PCS_AN_EXP;
+    CPU_REG32  PCS_AN_NP_TX;
+    CPU_REG32  PCS_AN_LP_NP;
+    CPU_REG32  RESERVED4[6];
+    CPU_REG32  PCS_AN_EXT_STATUS;
+    CPU_REG32  RESERVED5[12];
+    CPU_REG32  RX_LPI;
+    CPU_REG32  RX_LPI_TIME;
+    CPU_REG32  TX_LPI;
+    CPU_REG32  TX_LPI_TIME;
+    CPU_REG32  DESIGNCFG_DEBUG1;
+    CPU_REG32  DESIGNCFG_DEBUG2;
+    CPU_REG32  DESIGNCFG_DEBUG3;
+    CPU_REG32  DESIGNCFG_DEBUG4;
+    CPU_REG32  DESIGNCFG_DEBUG5;
+    CPU_REG32  DESIGNCFG_DEBUG6;
+    CPU_REG32  DESIGNCFG_DEBUG7;
+    CPU_REG32  DESIGNCFG_DEBUG8;
+    CPU_REG32  DESIGNCFG_DEBUG9;
+    CPU_REG32  DESIGNCFG_DEBUG10;
+    CPU_REG32  RESERVED6[86];
+    CPU_REG32  INT_Q1_STATUS;
+    CPU_REG32  RESERVED7[15];
+    CPU_REG32  TRANSMIT_Q1_PTR;
+    CPU_REG32  RESERVED8[15];
+    CPU_REG32  RECEIVE_Q1_PTR;
+    CPU_REG32  RESERVED9[7];
+    CPU_REG32  DMA_RXBUF_SIZE_Q1;
+    CPU_REG32  RESERVED10[6];
+    CPU_REG32  CBS_CONTROL;
+    CPU_REG32  CBS_IDLESLOPE_Q_A;
+    CPU_REG32  CBS_IDLESLOPE_Q_B;
+    CPU_REG32  UPPER_TX_Q_BASE_ADDR;
+    CPU_REG32  TX_BD_CONTROL;
+    CPU_REG32  RX_BD_CONTROL;
+    CPU_REG32  UPPER_RX_Q_BASE_ADDR;
+    CPU_REG32  RESERVED11[10];
+    CPU_REG32  SCREENING_TYPE_1_REGISTER_0;
+    CPU_REG32  SCREENING_TYPE_1_REGISTER_1;
+    CPU_REG32  SCREENING_TYPE_1_REGISTER_2;
+    CPU_REG32  SCREENING_TYPE_1_REGISTER_3;
+    CPU_REG32  RESERVED12[12];
+    CPU_REG32  SCREENING_TYPE_2_REGISTER_0;
+    CPU_REG32  SCREENING_TYPE_2_REGISTER_1;
+    CPU_REG32  SCREENING_TYPE_2_REGISTER_2;
+    CPU_REG32  SCREENING_TYPE_2_REGISTER_3;
+    CPU_REG32  RESERVED13[44];
+    CPU_REG32  INT_Q1_ENABLE;
+    CPU_REG32  RESERVED14[7];
+    CPU_REG32  INT_Q1_DISABLE;
+    CPU_REG32  RESERVED15[7];
+    CPU_REG32  INT_Q1_MASK;
+    CPU_REG32  RESERVED16[39];
+    CPU_REG32  SCREENING_TYPE_2_ETHERTYPE_REG_0;
+    CPU_REG32  SCREENING_TYPE_2_ETHERTYPE_REG_1;
+    CPU_REG32  SCREENING_TYPE_2_ETHERTYPE_REG_2;
+    CPU_REG32  SCREENING_TYPE_2_ETHERTYPE_REG_3;
+    CPU_REG32  RESERVED17[4];
+    CPU_REG32  TYPE_2_COMPARE_0_WORD_0;
+    CPU_REG32  TYPE_2_COMPARE_0_WORD_1;
+    CPU_REG32  TYPE_2_COMPARE_1_WORD_0;
+    CPU_REG32  TYPE_2_COMPARE_1_WORD_1;
+    CPU_REG32  TYPE_2_COMPARE_2_WORD_0;
+    CPU_REG32  TYPE_2_COMPARE_2_WORD_1;
+    CPU_REG32  TYPE_2_COMPARE_3_WORD_0;
+    CPU_REG32  TYPE_2_COMPARE_3_WORD_1;
+} NET_DEV;
+
+
+/*
+*********************************************************************************************************
+*                                     REGISTER BIT DEFINITIONS
+*
+* Note(s) : (1) All necessary register bit definitions should be defined within this section.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ RX DESCRIPTORS ------------------ */
+#define  GEM_RXBUF_ADDR_MASK     (0xFFFFFFFFFFFFFFFCu)          /* RX buffer address.                                   */
+
+#define  GEM_RXBUF_ADDR_WRAP              DEF_BIT_01            /* Wrap flag.                                           */
+#define  GEM_RXBUF_ADDR_OWN               DEF_BIT_00            /* Ownership flag.                                      */
+
+#define  GEM_RXBUF_STATUS_GBC             DEF_BIT_31            /* Global broadcast detected.                           */
+#define  GEM_RXBUF_STATUS_MULTI_MATCH     DEF_BIT_30            /* Multicast hash match.                                */
+#define  GEM_RXBUF_STATUS_UNI_MATCH       DEF_BIT_29            /* Unicast hash match.                                  */
+#define  GEM_RXBUF_STATUS_EXT_MATCH       DEF_BIT_28            /* External address match.                              */
+
+#define  GEM_RXBUF_STATUS_EOF             DEF_BIT_15            /* End of frame.                                        */
+#define  GEM_RXBUF_STATUS_SOF             DEF_BIT_14            /* Start of frame.                                      */
+#define  GEM_RXBUF_SIZE_MASK              (0x1FFFu)             /* Size of frame.                                       */
+
+
+                                                                /* ------------------ TX DESCRIPTORS ------------------ */
+#define  GEM_TXBUF_ADDR_MASK     (0xFFFFFFFFFFFFFFFCu)          /* TX Buffer address.                                   */
+
+#define  GEM_TXBUF_USED                   DEF_BIT_31            /* Used flag.                                           */
+#define  GEM_TXBUF_WRAP                   DEF_BIT_30            /* Wrap flag.                                           */
+#define  GEM_TXBUF_RETRY_EXCED            DEF_BIT_29            /* Retry limit exceeded.                                */
+#define  GEM_TXBUF_AHB_ERR                DEF_BIT_27            /* Frame corruption due to AHB error.                   */
+#define  GEM_TXBUF_LATE_COLL              DEF_BIT_26            /* Late collision.                                      */
+
+#define  GEM_TXBUF_NO_CRC                 DEF_BIT_16            /* No CRC to be appended.                               */
+#define  GEM_TXBUF_LAST                   DEF_BIT_15            /* Last buffer.                                         */
+#define  GEM_TXBUF_LENGTH_MASK            (0x3FFF)              /* Buffer length.                                       */
+
+
+                                                                /* ----------------- NETWORK CONTROL ------------------ */
+#define  GEM_BIT_CTRL_FLUSH_NEXT_RX_DPRAM_PKT  DEF_BIT_18       /* Flush next packet from the external DPRAM.           */
+#define  GEM_BIT_CTRL_TX_PFC_PRI_PAUSE_FRAME   DEF_BIT_17       /* Transmit PFC priority baste pause frame.             */
+#define  GEM_BIT_CTRL_EN_PFC_PRI_PAUSE_RX      DEF_BIT_16       /* Enable PFS priority based pause reception.           */
+#define  GEM_BIT_CTRL_STR_RX_TIMESTAMP         DEF_BIT_15       /* Store timestamps to memory.                          */
+#define  GEM_BIT_CTRL_TX_ZEROQ_PAUSE_FRAME     DEF_BIT_12       /* Transmit zero quantum pause frame.                   */
+#define  GEM_BIT_CTRL_TX_PAUSE_FRAME           DEF_BIT_11       /* Transmit pause frame.                                */
+#define  GEM_BIT_CTRL_TX_HALT                  DEF_BIT_10       /* Transmit halt.                                       */
+#define  GEM_BIT_CTRL_START_TX                 DEF_BIT_09       /* Start transmission.                                  */
+#define  GEM_BIT_CTRL_BACK_PRESSURE            DEF_BIT_08       /* Back pressure.                                       */
+#define  GEM_BIT_CTRL_WREN_STAT_REGS           DEF_BIT_07       /* Write enable for stats registers.                    */
+#define  GEM_BIT_CTRL_INCR_STATS_REGS          DEF_BIT_06       /* Increment statistics registers.                      */
+#define  GEM_BIT_CTRL_CLEAR_STATS_REGS         DEF_BIT_05       /* Clear statistics registers.                          */
+#define  GEM_BIT_CTRL_MGMT_PORT_EN             DEF_BIT_04       /* Management port enable.                              */
+#define  GEM_BIT_CTRL_TX_EN                    DEF_BIT_03       /* Tramsit enable.                                      */
+#define  GEM_BIT_CTRL_RX_EN                    DEF_BIT_02       /* Receive enable.                                      */
+#define  GEM_BIT_CTRL_LOOPBACK_LOCAL           DEF_BIT_01       /* Loop back local.                                     */
+
+
+                                                                /* -------------- NETWORK CONFIGURATION --------------- */
+#define  GEM_BIT_CFG_UNIDIR_EN                 DEF_BIT_31       /* Uni-drection enable.                                 */
+#define  GEM_BIT_CFG_IGNORE_IPG_RX_ER          DEF_BIT_30       /* Ignore IPG rx_er.                                    */
+#define  GEM_BIT_CFG_RX_BAD_PREAMBLE           DEF_BIT_29       /* Receive bad preamble.                                */
+#define  GEM_BIT_CFG_IPG_STRETCH_EN            DEF_BIT_28       /* IPG stretch enable.                                  */
+#define  GEM_BIT_CFG_SGMII_EN                  DEF_BIT_27       /* SGMII mode enable.                                   */
+#define  GEM_BIT_CFG_IGNORE_RX_FCS             DEF_BIT_26       /* Ingore RX FCS.                                       */
+#define  GEM_BIT_CFG_RX_HD_WHILE_TX            DEF_BIT_25       /* RX half duplex while TX.                             */
+#define  GEM_BIT_CFG_RX_CHKSUM_OFFLD_EN        DEF_BIT_24       /* Receive checksum offloading enable.                  */
+#define  GEM_BIT_CFG_DIS_CP_PAUSE_FRAME        DEF_BIT_23       /* Disable copy of pause frame.                         */
+#define  GEM_BIT_CFG_DBUS_WIDTH_MSK (DEF_BIT_FIELD(2, 21))      /* Data bus width.                                      */
+#define  GEM_BIT_CFG_DBUS_WIDTH(cfg) (DEF_BIT_MASK(cfg, 21) & GEM_BIT_CFG_DBUS_WIDTH_MSK)
+#define  GEM_BIT_CFG_MDC_CLK_DIV_MSK (DEF_BIT_FIELD(3, 18))     /* MDC clock division.                                  */
+#define  GEM_BIT_CFG_MDC_CLK_DIV(cfg) (DEF_BIT_MASK(cfg, 18) & GEM_BIT_CFG_MDC_CLK_DIV_MSK)
+#define  GEM_BIT_CFG_FCS_REMOVE               DEF_BIT_17        /* FCS remove.                                          */
+#define  GEM_BIT_CFG_LEN_ERR_FRAME_DISC       DEF_BIT_16        /* Length field error frame discard.                    */
+#define  GEM_BIT_CFG_RX_BUF_OFF_MSK (DEF_BIT_FIELD(2, 14))      /* Receive buffer offset.                               */
+#define  GEM_BIT_CFG_RX_BUF_OFF(cfg) (DEF_BIT_MASK(cfg, 14) & GEM_BIT_CFG_RX_BUF_OFF_MSK)
+#define  GEM_BIT_CFG_PAUSE_EN                 DEF_BIT_13        /* Pause enable.                                        */
+#define  GEM_BIT_CFG_RETRY_TEST               DEF_BIT_12        /* Retry test.                                          */
+#define  GEM_BIT_CFG_PCS_SEL                  DEF_BIT_11        /* PCS select.                                          */
+#define  GEM_BIT_CFG_GIGE_EN                  DEF_BIT_10        /* Gigabit mode enable.                                 */
+#define  GEM_BIT_CFG_EXT_ADDR_MATCH_EN        DEF_BIT_09        /* External address match enable.                       */
+#define  GEM_BIT_CFG_UNI_HASH_EN              DEF_BIT_07        /* Unicast hash enable.                                 */
+#define  GEM_BIT_CFG_MULTI_HASH_EN            DEF_BIT_06        /* Multicast hash enable.                               */
+#define  GEM_BIT_CFG_NO_BROADCAST             DEF_BIT_05        /* No broadcast.                                        */
+#define  GEM_BIT_CFG_COPY_ALL                 DEF_BIT_04        /* Copy all frames.                                     */
+#define  GEM_BIT_CFG_DISC_NON_VLAN            DEF_BIT_02        /* Discard non VLAN frames.                             */
+#define  GEM_BIT_CFG_FULL_DUPLEX              DEF_BIT_01        /* Full duplex.                                         */
+#define  GEM_BIT_CFG_SPEED                    DEF_BIT_00        /* Speed.                                               */
+
+
+                                                                /* ------------------ NETWORK STATUS ------------------ */
+#define  GEM_BIT_STATUS_PFC_PRI_PAUSE_NEG     DEF_BIT_06        /* PFC pause negociated.                                */
+#define  GEM_BIT_STATUS_PCS_AUTONEG_TX_RES    DEF_BIT_05        /* PCS pause tx resolution.                             */
+#define  GEM_BIT_STATUS_PCS_AUTONEG_RX_RES    DEF_BIT_04        /* PCS pause rx resultion.                              */
+#define  GEM_BIT_STATUS_PCS_AUTONEG_DUP_RES   DEF_BIT_03        /* PCS duplex resolution.                               */
+#define  GEM_BIT_STATUS_PHY_MGMT_IDLE         DEF_BIT_02        /* PHY MGMT logic idle.                                 */
+#define  GEM_BIT_STATUS_MDIO_IN_PIN_STATUS    DEF_BIT_01        /* MDIO in pin status.                                  */
+#define  GEM_BIT_STATUS_PCS_LINK_STATE        DEF_BIT_00        /* PCS link state.                                      */
+
+                                                                /* ---------------- DMA CONFIGURATION ----------------- */
+#define  GEM_BIT_DMACFG_ADDR_BUS_WIDTH        DEF_BIT_30        /* DMA address bus width.                               */
+#define  GEM_BIT_DMACFG_TX_EXT_BD_MODE        DEF_BIT_29        /* Enable TX extended BD mode.                          */
+#define  GEM_BIT_DMACFG_RX_EXT_BD_MODE        DEF_BIT_28        /* Enable RX extended BD mode.                          */
+#define  GEM_BIT_DMACFG_MAX_AMBA_BURST_TX     DEF_BIT_26        /* Force maximum length bursts on TX.                   */
+#define  GEM_BIT_DMACFG_MAX_AMBA_BURST_RX     DEF_BIT_25        /* Force maximum length bursts on RX.                   */
+#define  GEM_BIT_DMACFG_DISC_WHEN_NO_AHB      DEF_BIT_24        /* Discard packet when no AHB resource                  */
+#define  GEM_BIT_DMACFG_AHB_RX_SIZE_MSK (DEF_BIT_FIELD(8, 16))  /* Receive buffer offset.                               */
+#define  GEM_BIT_DMACFG_AHB_RX_SIZE(cfg) (DEF_BIT_MASK(cfg, 16) & GEM_BIT_DMACFG_AHB_RX_SIZE_MSK)
+#define  GEM_BIT_DMACFG_CSUM_GEN_OFFLOAD_EN   DEF_BIT_11        /* Checksum generation offload enable.                  */
+#define  GEM_BIT_DMACFG_TX_PKTBUF_MEMSZ_SEL   DEF_BIT_10        /* Transmit packet buffer memory size.                  */
+#define  GEM_BIT_DMACFG_RX_PKTBUF_SZ_MSK (DEF_BIT_FIELD(2, 8))  /* Receive packet buffer memory size.                   */
+#define  GEM_BIT_DMACFG_RX_PKTBUF_SZ(cfg) (DEF_BIT_MASK(cfg, 8) & GEM_BIT_DMACFG_RX_PKTBUF_SZ_MSK)
+#define  GEM_BIT_DMACFG_AHB_PKT_SWAP_EN       DEF_BIT_07        /* AHB endian swap enable for packets.                  */
+#define  GEM_BIT_DMACFG_AHC_MGMT_SWAP_EN      DEF_BIT_06        /* AHB endian swap enable for management descriptors    */
+#define  GEM_BIT_DMACFG_RX_AHB_BURST_MSK (DEF_BIT_FIELD(5, 0))  /* AHB fixed burst length.                              */
+#define  GEM_BIT_DMACFG_RX_AHB_BURST(cfg) (DEF_BIT_MASK(cfg, 0) & GEM_BIT_DMACFG_RX_AHB_BURST_MSK)
+
+                                                                /* ----------------- TRANSMIT STATUS ------------------ */
+#define  GEM_BIT_TXSTATUS_HRESP_NOT_OK        DEF_BIT_08        /* Hresp not OK.                                        */
+#define  GEM_BIT_TXSTATUS_LATE_COLLISION      DEF_BIT_07        /* Late collision occurred.                             */
+#define  GEM_BIT_TXSTATUS_TX_UNDER_RUN        DEF_BIT_06        /* Transmit under run.                                  */
+#define  GEM_BIT_TXSTATUS_TX_COMPLETE         DEF_BIT_05        /* Transmit complete.                                   */
+#define  GEM_BIT_TXSTATUS_TX_CORR_AHB_ERR     DEF_BIT_04        /* Transmit frame corruption due to AHB error.          */
+#define  GEM_BIT_TXSTATUS_TX_GO               DEF_BIT_03        /* Transmit go.                                         */
+#define  GEM_BIT_TXSTATUS_RETRY_EXCEEDED      DEF_BIT_02        /* Retry limit exceeded.                                */
+#define  GEM_BIT_TXSTATUS_COLLISION           DEF_BIT_01        /* Collision occurred.                                  */
+#define  GEM_BIT_TXSTATUS_USED_BIT_READ       DEF_BIT_00        /* Used bit read.                                       */
+
+                                                                /* ------------------ RECEIVE STATUS ------------------ */
+#define  GEM_BIT_RXSTATUS_HRESP_NOT_OK        DEF_BIT_03        /* Hresp not OK.                                        */
+#define  GEM_BIT_RXSTATUS_RX_OVERRUN          DEF_BIT_02        /* Receive overrun.                                     */
+#define  GEM_BIT_RXSTATUS_FRAME_RECD          DEF_BIT_01        /* Frame received.                                      */
+#define  GEM_BIT_RXSTATUS_BUFFER_NOT_AVAIL    DEF_BIT_00        /* Buffer not available.                                */
+
+                                                                /* ----------------- INTERRUPT STATUS ----------------- */
+#define  GEM_BIT_INT_TSU_SEC_INCR             DEF_BIT_26        /* TSE seconds register increment.                      */
+#define  GEM_BIT_INT_PDELAY_RESP_TX           DEF_BIT_25        /* PTP pdelay_resp frame transmitted.                   */
+#define  GEM_BIT_INT_PDELAY_REQ_TX            DEF_BIT_24        /* PTP pdelay_req frame transmitted.                    */
+#define  GEM_BIT_INT_PDELAY_RESP_RX           DEF_BIT_23        /* PTP pdelay_resp frame received.                      */
+#define  GEM_BIT_INT_PDELAY_REQ_RX            DEF_BIT_22        /* PTP pdelay_req frame received.                       */
+#define  GEM_BIT_INT_SYNC_TX                  DEF_BIT_21        /* PTP sync frame transmitted.                          */
+#define  GEM_BIT_INT_DELAY_REQ_TX             DEF_BIT_20        /* PTP delay_req frame transmitted.                     */
+#define  GEM_BIT_INT_SYNC_RX                  DEF_BIT_19        /* PTP sync frame received.                             */
+#define  GEM_BIT_INT_DELAY_REQ_RX             DEF_BIT_18        /* PTP delay_req frame received.                        */
+#define  GEM_BIT_INT_PARTNER_PG_RX            DEF_BIT_17        /* PCS link partner page received.                      */
+#define  GEM_BIT_INT_AUTONEG_COMPLETE         DEF_BIT_16        /* PCS auto-negotiation complete.                       */
+#define  GEM_BIT_INT_EXT_INTR                 DEF_BIT_15        /* External interrupt.                                  */
+#define  GEM_BIT_INT_PAUSE_TX                 DEF_BIT_14        /* Pause frame transmitted.                             */
+#define  GEM_BIT_INT_PAUSE_ZERO               DEF_BIT_13        /* Pause time zero.                                     */
+#define  GEM_BIT_INT_PAUSE_NONZERO_RX         DEF_BIT_12        /* Pause frame with non-zero pause quantum received.    */
+#define  GEM_BIT_INT_HRESP_NOT_OK             DEF_BIT_11        /* Hresp not OK.                                        */
+#define  GEM_BIT_INT_RX_OVERRUN               DEF_BIT_10        /* Receive overrun.                                     */
+#define  GEM_BIT_INT_LINK_CHNG                DEF_BIT_09        /* Link state change.                                   */
+#define  GEM_BIT_INT_TX_COMPLETE              DEF_BIT_07        /* Transmit complete.                                   */
+#define  GEM_BIT_INT_TX_CORRUPT_AHB           DEF_BIT_06        /* Transmit frame corruption due to AHB error.          */
+#define  GEM_BIT_INT_RETRY_EX_LATE            DEF_BIT_05        /* Retry limit exceeded or late collision.              */
+#define  GEM_BIT_INT_TX_USED_READ             DEF_BIT_03        /* TX used bit read.                                    */
+#define  GEM_BIT_INT_RX_USED_READ             DEF_BIT_02        /* RX used bit read.                                    */
+#define  GEM_BIT_INT_RX_COMPLETE              DEF_BIT_01        /* Receive complete.                                    */
+#define  GEM_BIT_INT_MGMT_SENT                DEF_BIT_00        /* Management frame sent.                               */
+
+                                                                /* ----------------- PHY MAINTENANCE ------------------ */
+#define  GEM_BIT_PHYMGMT_CLAUSE_22            DEF_BIT_30        /* Clause 22 operation.                                 */
+#define  GEM_BIT_PHYMGMT_OPERATION_MSK (DEF_BIT_FIELD(2, 28))   /* Operation.                                           */
+#define  GEM_BIT_PHYMGMT_OPERATION(cfg) (DEF_BIT_MASK(cfg, 28) & GEM_BIT_PHYMGMT_OPERATION_MSK)
+#define  GEM_BIT_PHYMGMT_PHYADDR_MSK (DEF_BIT_FIELD(5, 23))     /* PHY address.                                         */
+#define  GEM_BIT_PHYMGMT_PHYADDR(cfg) (DEF_BIT_MASK(cfg, 23) & GEM_BIT_PHYMGMT_PHYADDR_MSK)
+#define  GEM_BIT_PHYMGMT_REGADDR_MSK (DEF_BIT_FIELD(5, 18))     /* Register address.                                    */
+#define  GEM_BIT_PHYMGMT_REGADDR(cfg) (DEF_BIT_MASK(cfg, 18) & GEM_BIT_PHYMGMT_REGADDR_MSK)
+#define  GEM_BIT_PHYMGMT_MUST10_MSK (DEF_BIT_FIELD(2, 16))      /* Must be 10.                                          */
+#define  GEM_BIT_PHYMGMT_MUST10(cfg) (DEF_BIT_MASK(cfg, 16) & GEM_BIT_PHYMGMT_MUST10_MSK)
+#define  GEM_BIT_PHYMGMT_DATA_MSK (DEF_BIT_FIELD(16, 0))        /* Data.                                                */
+#define  GEM_BIT_PHYMGMT_DATA(cfg) (DEF_BIT_MASK(cfg, 0) & GEM_BIT_PHYMGMT_DATA_MSK)
+
+
+
+#define  INT_STATUS_MASK_ALL                      0xFFFFFFFF
+#define  INT_STATUS_MASK_SUPPORTED                GEM_BIT_INT_RX_COMPLETE | GEM_BIT_INT_TX_COMPLETE;
+#define  CTRL_TX_EN                               DEF_BIT_00
+#define  CTRL_RX_EN                               DEF_BIT_00
+#define  CTRL_RX_CRC_EN                           DEF_BIT_00
+
+#define  RX_ISR_EVENT_MSK                         GEM_BIT_INT_RX_COMPLETE
+#define  TX_ISR_EVENT_MSK                         GEM_BIT_INT_TX_COMPLETE
+#define  UNHANDLED_ISR_EVENT_MASK                 DEF_BIT_00
+
+
+/*
+*********************************************************************************************************
+*                                     DESCRIPTOR BIT DEFINITIONS
+*********************************************************************************************************
+*/
+
+#define  DESC_VALID_MSK                           DEF_BIT_00
+#define  DESC_WRAP_BIT_MASK                       DEF_BIT_00
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*
+* Note(s) : (1) Global variables are highly discouraged and should only be used for storing NON-instance
+*               specific data and the array of instance specific data.  Global variables, those that are
+*               not declared within the NET_DEV_DATA area, are not multiple-instance safe and could lead
+*               to incorrect driver operation if used to store device state information.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Device driver functions may be arbitrarily named.  However, it is recommended that device
+*               driver functions be named using the names provided below.  All driver function prototypes
+*               should be located within the driver C source file ('net_dev_&&&.c') & be declared as
+*               static functions to prevent name clashes with other network protocol suite device drivers.
+*********************************************************************************************************
+*/
+
+                                                                        /* -------- FNCT'S COMMON TO ALL DEV'S -------- */
+static  void  NetDev_Init               (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_Start              (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_Stop               (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_Rx                 (NET_IF             *pif,
+                                         CPU_INT08U        **p_data,
+                                         CPU_INT16U         *size,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_Tx                 (NET_IF             *pif,
+                                         CPU_INT08U         *p_data,
+                                         CPU_INT16U          size,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_AddrMulticastAdd   (NET_IF             *pif,
+                                         CPU_INT08U         *paddr_hw,
+                                         CPU_INT08U          addr_hw_len,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_AddrMulticastRemove(NET_IF             *pif,
+                                         CPU_INT08U         *paddr_hw,
+                                         CPU_INT08U          addr_hw_len,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_ISR_Handler        (NET_IF             *pif,
+                                         NET_DEV_ISR_TYPE    type);
+
+
+static  void  NetDev_IO_Ctrl            (NET_IF             *pif,
+                                         CPU_INT08U          opt,
+                                         void               *p_data,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_MII_Rd             (NET_IF             *pif,
+                                         CPU_INT08U          phy_addr,
+                                         CPU_INT08U          reg_addr,
+                                         CPU_INT16U         *p_data,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_MII_Wr             (NET_IF             *pif,
+                                         CPU_INT08U          phy_addr,
+                                         CPU_INT08U          reg_addr,
+                                         CPU_INT16U          data,
+                                         NET_ERR            *perr);
+
+
+                                                                        /* ----- FNCT'S COMMON TO DMA-BASED DEV'S ----- */
+static  void  NetDev_RxDescInit         (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_TxDescInit         (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_RxDescFreeAll      (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_RxDescPtrCurInc    (NET_IF             *pif);
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NETWORK DEVICE DRIVER API
+*
+* Note(s) : (1) Device driver API structures are used by applications during calls to NetIF_Add().  This
+*               API structure allows higher layers to call specific device driver functions via function
+*               pointer instead of by name.  This enables the network protocol suite to compile & operate
+*               with multiple device drivers.
+*
+*           (2) In most cases, the API structure provided below SHOULD suffice for most device drivers
+*               exactly as is with the exception that the API structure's name which MUST be unique &
+*               SHOULD clearly identify the device being implemented.  For example, the Cirrus Logic
+*               CS8900A Ethernet controller's API structure should be named NetDev_API_CS8900A[].
+*
+*               The API structure MUST also be externally declared in the device driver header file
+*               ('net_dev_&&&.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+
+const  NET_DEV_API_ETHER  NetDev_API_GEM64 = {                              /* Ether DMA dev API fnct ptrs :*/
+                                              &NetDev_Init,                 /*   Init/add                   */
+                                              &NetDev_Start,                /*   Start                      */
+                                              &NetDev_Stop,                 /*   Stop                       */
+                                              &NetDev_Rx,                   /*   Rx                         */
+                                              &NetDev_Tx,                   /*   Tx                         */
+                                              &NetDev_AddrMulticastAdd,     /*   Multicast addr add         */
+                                              &NetDev_AddrMulticastRemove,  /*   Multicast addr remove      */
+                                              &NetDev_ISR_Handler,          /*   ISR handler                */
+                                              &NetDev_IO_Ctrl,              /*   I/O ctrl                   */
+                                              &NetDev_MII_Rd,               /*   Phy reg rd                 */
+                                              &NetDev_MII_Wr                /*   Phy reg wr                 */
+                                             };
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Init()
+*
+* Description : (1) Initialize Network Driver Layer :
+*
+*                   (a) Initialize required clock sources
+*                   (b) Initialize external interrupt controller
+*                   (c) Initialize external GPIO controller
+*                   (d) Initialize driver state variables
+*                   (e) Allocate memory for device DMA descriptors
+*                   (f) Initialize additional device registers
+*                       (1) (R)MII mode / Phy bus type
+*                       (2) Disable device interrupts
+*                       (3) Disable device receiver and transmitter
+*                       (4) Other necessary device initialization
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE            No Error.
+*                           NET_DEV_ERR_INIT            General initialization error.
+*                           NET_BUF_ERR_POOL_MEM_ALLOC  Memory allocation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Add() via 'pdev_api->Init()'.
+*
+* Note(s)     : (2) The application developer SHOULD define NetDev_CfgClk() within net_bsp.c
+*                   in order to properly enable clocks for specified network interface.  In
+*                   some cases, a device may require clocks to be enabled for BOTH the device
+*                   and accessory peripheral modules such as GPIO.  A call to this function
+*                   MAY need to occur BEFORE any device register accesses are made.  In the
+*                   event that a device does NOT require any external clocks to be enabled,
+*                   it is recommended that the device driver still call the NetBSP fuction
+*                   which may in turn leave the section for the specific interface number
+*                   empty.
+*
+*               (3) The application developer SHOULD define NetDev_CfgGPIO() within net_bsp.c
+*                   in order to properly configure any necessary GPIO necessary for the device
+*                   to operate properly.  Micrium recommends defining and calling this NetBSP
+*                   function even if no additional GPIO initialization is required.
+*
+*               (4) The application developer SHOULD define NetDev_CfgIntCtrl() within net_bsp.c
+*                   in order to properly enable interrupts on an external or CPU integrated
+*                   interrupt controller.  Interrupt sources that are specific to the DEVICE
+*                   hardware MUST NOT be initialized from within NetDev_CfgIntCtrl() and
+*                   SHOULD only be modified from within the device driver.
+*
+*                   (a) External interrupt sources are cleared within the NetBSP first level
+*                       ISR handler either before or after the call to the device driver ISR
+*                       handler function.  The device driver ISR handler function SHOULD only
+*                       clear the device specific interrupts and NOT external or CPU interrupt
+*                       controller interrupt sources.
+*
+*               (5) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (6) All device drivers that store instance specific data MUST declare all
+*                   instance specific variables within the device data area defined above.
+*
+*               (7) Drivers SHOULD validate device configuration values and set *perr to
+*                   NET_DEV_ERR_INVALID_CFG if unacceptible values have been specified. Fields
+*                   of interest generally include, but are not limited to :
+*
+*                   (a) pdev_cfg->RxBufPoolType :
+*
+*                       (1) NET_IF_MEM_TYPE_MAIN
+*                       (2) NET_IF_MEM_TYPE_DEDICATED
+*
+*                   (b) pdev_cfg->TxBufPoolType :
+*
+*                       (1) NET_IF_MEM_TYPE_MAIN
+*                       (2) NET_IF_MEM_TYPE_DEDICATED
+*
+*                   (c) pdev_cfg->RxBufAlignOctets
+*                   (d) pdev_cfg->TxBufAlignOctets
+*                   (e) pdev_cfg->RxBufDescNbr
+*                   (f) pdev_cfg->TxBufDescnbr
+*
+*               (8) Descriptors are typically required to be contiguous in memory.  Allocation of
+*                   descriptors MUST occur as a single contigous block of memory.  The driver may
+*                   use pointer arithmetic to sub-divide and traverse the descriptor list.
+*
+*               (9) NetDev_Init() should exit with :
+*
+*                   (a) All device interrupt source disabled. External interrupt controllers
+*                       should however be ready to accept interrupt requests.
+*                   (b) All device interrupt sources cleared.
+*                   (c) Both the receiver and transmitter disabled.
+*
+*              (10) Some drivers MAY require knowledge of the Phy configuration in order
+*                   to properly configure the MAC with the correct Phy bus mode, speed and
+*                   duplex settings.  If a driver requires access to the Phy configuration,
+*                   then the driver MUST validate the pif->Phy_Cfg pointer by checking for
+*                   a NULL pointer BEFORE attempting to access members of the Phy
+*                   configuration structure.  Phy configuration fields of interest generally
+*                   include, but are  not limited to :
+*
+*                   (a) pphy_cfg->Type :
+*
+*                       (1) NET_PHY_TYPE_INT            Phy integrated with MAC.
+*                       (2) NET_PHY_TYPE_EXT            Phy externally attached to MAC.
+*
+*                   (b) pphy_cfg->BusMode :
+*
+*                       (1) NET_PHY_BUS_MODE_MII        Phy bus mode configured to MII.
+*                       (2) NET_PHY_BUS_MODE_RMII       Phy bus mode configured to RMII.
+*                       (3) NET_PHY_BUS_MODE_SMII       Phy bus mode configured to SMII.
+*
+*                   (c) pphy_cfg->Spd :
+*
+*                       (1) NET_PHY_SPD_0               Phy link speed unknown or NOT linked.
+*                       (2) NET_PHY_SPD_10              Phy link speed configured to  10   mbit/s.
+*                       (3) NET_PHY_SPD_100             Phy link speed configured to  100  mbit/s.
+*                       (4) NET_PHY_SPD_1000            Phy link speed configured to  1000 mbit/s.
+*                       (5) NET_PHY_SPD_AUTO            Phy link speed configured for auto-negotiation.
+*
+*                   (d) pphy_cfg->Duplex :
+*
+*                       (1) NET_PHY_DUPLEX_UNKNOWN      Phy link duplex unknown or link not established.
+*                       (2) NET_PHY_DUPLEX_HALF         Phy link duplex configured to  half duplex.
+*                       (3) NET_PHY_DUPLEX_FULL         Phy link duplex configured to  full duplex.
+*                       (4) NET_PHY_DUPLEX_AUTO         Phy link duplex configured for auto-negotiation.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Init (NET_IF   *pif,
+                           NET_ERR  *perr)
+{
+    NET_DEV_BSP_ETHER  *pdev_bsp;
+    NET_PHY_CFG_ETHER  *pphy_cfg;
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_BUF_SIZE        buf_size_max;
+    NET_BUF_SIZE        buf_ix;
+    CPU_SIZE_T          reqd_octets;
+    CPU_SIZE_T          nbytes;
+    LIB_ERR             lib_err;
+
+                                                                /* -------- OBTAIN REFERENCE TO CFGs/REGs/BSP --------- */
+    pphy_cfg = (NET_PHY_CFG_ETHER *)pif->Ext_Cfg;
+    pdev_cfg = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;
+    pdev_bsp = (NET_DEV_BSP_ETHER *)pif->Dev_BSP;
+                                                                /* --------------- VALIDATE DEVICE CFG ---------------- */
+                                                                /* See Note #7.                                         */
+                                                                /* Validate Rx buf alignment.                           */
+    if ((pdev_cfg->RxBufAlignOctets & (RX_BUF_ALIGN_OCTETS - 1u)) != 0u) {
+        *perr = NET_DEV_ERR_INVALID_CFG;
+         return;
+    }
+
+                                                                /* Validate Rx buf ix offset.                           */
+    if (pdev_cfg->RxBufIxOffset != 0u) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+                                                                /* Validate Rx buf size.                                */
+    buf_ix       = NET_IF_IX_RX;
+
+    buf_size_max = NetBuf_GetMaxSize((NET_IF_NBR     )pif->Nbr,
+                                     (NET_TRANSACTION)NET_TRANSACTION_RX,
+                                     (NET_BUF       *)0,
+                                     (NET_BUF_SIZE   )buf_ix);
+    if (buf_size_max < NET_IF_ETHER_FRAME_MAX_SIZE) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+                                                                /* Validate Tx buf ix offset.                           */
+    if (pdev_cfg->TxBufIxOffset != 0u) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+
+    if (pphy_cfg == (void *)0) {
+       *perr = NET_PHY_ERR_INVALID_CFG;
+        return;
+    }
+                                                                /* Validate phy bus mode.                               */
+    if (pphy_cfg->BusMode != NET_PHY_BUS_MODE_GMII) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+
+                                                                /* -------------- ALLOCATE DEV DATA AREA -------------- */
+    pif->Dev_Data = Mem_HeapAlloc((CPU_SIZE_T  ) sizeof(NET_DEV_DATA),
+                                  (CPU_SIZE_T  ) 64u,
+                                  (CPU_SIZE_T *)&reqd_octets,
+                                  (LIB_ERR    *)&lib_err);
+    if (pif->Dev_Data == (void *)0) {
+       *perr = NET_DEV_ERR_MEM_ALLOC;
+        return;
+    }
+
+    pdev_data = (NET_DEV_DATA *)pif->Dev_Data;
+
+
+
+                                                                /* ------------- ENABLE NECESSARY CLOCKS -------------- */
+                                                                /* Enable module clks (see Note #2).                    */
+    pdev_bsp->CfgClk(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------- INITIALIZE EXTERNAL GPIO CONTROLLER -------- */
+                                                                /* Configure Ethernet Controller GPIO (see Note #4).    */
+    pdev_bsp->CfgGPIO(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ----- INITIALIZE EXTERNAL INTERRUPT CONTROLLER ------ */
+                                                                /* Configure ext int ctrl'r (see Note #3).              */
+    pdev_bsp->CfgIntCtrl(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* ------- ALLOCATE MEMORY FOR DMA DESCRIPTORS -------- */
+    nbytes = pdev_cfg->RxDescNbr * sizeof(DEV_DESC);            /* Determine block size.                                */
+    Mem_PoolCreate ((MEM_POOL   *)&pdev_data->RxDescPool,       /* Pass a pointer to the mem pool to create.            */
+                    (void       *) pdev_cfg->MemAddr,           /* From the dedicated memory.                           */
+                    (CPU_SIZE_T  ) pdev_cfg->MemSize,           /* Dedicated area size.                                 */
+                    (CPU_SIZE_T  ) 1,                           /* Allocate 1 block.                                    */
+                    (CPU_SIZE_T  ) nbytes,                      /* Block size large enough to hold all Rx descriptors.  */
+                    (CPU_SIZE_T  ) 64u,                         /* Block alignment (see Note #8).                       */
+                    (CPU_SIZE_T *)&reqd_octets,                 /* Optional, ptr to variable to store rem nbr bytes.    */
+                    (LIB_ERR    *)&lib_err);                    /* Ptr to variable to return an error code.             */
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = NET_BUF_ERR_POOL_MEM_ALLOC;
+        return;
+    }
+
+
+    nbytes = pdev_cfg->TxDescNbr * sizeof(DEV_DESC);            /* Determine block size.                                */
+    Mem_PoolCreate ((MEM_POOL   *)&pdev_data->TxDescPool,       /* Pass a pointer to the mem pool to create.            */
+                    (void       *) pdev_cfg->MemAddr,           /* From the dedicated memory.                           */
+                    (CPU_SIZE_T  ) pdev_cfg->MemSize,           /* Dedicated area size.                                 */
+                    (CPU_SIZE_T  ) 1,                           /* Allocate 1 block.                                    */
+                    (CPU_SIZE_T  ) nbytes,                      /* Block size large enough to hold all Tx descriptors.  */
+                    (CPU_SIZE_T  ) 64u,                         /* Block alignment (see Note #8).                       */
+                    (CPU_SIZE_T *)&reqd_octets,                 /* Optional, ptr to variable to store rem nbr bytes.    */
+                    (LIB_ERR    *)&lib_err);                    /* Ptr to variable to return an error code.             */
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = NET_BUF_ERR_POOL_MEM_ALLOC;
+        return;
+    }
+
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Start()
+*
+* Description : (1) Start network interface hardware :
+*
+*                   (a) Initialize transmit semaphore count
+*                   (b) Initialize hardware address registers
+*                   (c) Initialize receive and transmit descriptors
+*                   (d) Clear all pending interrupt sources
+*                   (e) Enable supported interrupts
+*                   (f) Enable the transmitter and receiver
+*                   (g) Start / Enable DMA if required
+*
+*
+* Argument(s) : pif         Pointer to a network interface.
+*               ---         Argument validated in NetIF_Start().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Ethernet device successfully started.
+*
+*                                                               - RETURNED BY NetIF_AddrHW_SetHandler() : --
+*                               NET_IF_ERR_NULL_PTR             Argument(s) passed a NULL pointer.
+*                               NET_IF_ERR_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_IF_ERR_INVALID_STATE        Invalid network interface state.
+*                               NET_IF_ERR_INVALID_ADDR         Invalid hardware address.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+*                                                               - RETURNED BY NetOS_Dev_CfgTxRdySignal() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_OS_ERR_INIT_DEV_TX_RDY_VAL  Invalid device transmit ready signal.
+*
+*                                                               ---- RETURNED BY NetDev_RxDescInit() : -----
+*                          !!!!
+*
+*                                                               ---- RETURNED BY NetDev_TxDescInit() : -----
+*                          !!!!
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Start() via 'pdev_api->Start()'.
+*
+* Note(s)     : (2) Many DMA devices may generate only one interrupt for several ready receive
+*                   descriptors.  In order to accommodate this, it is recommended that all DMA
+*                   based drivers count the number of ready receive descriptors during the
+*                   receive event and signal the receive task accordingly ONLY for those
+*                   NEW descriptors which have not yet been accounted for.  Each time a
+*                   descriptor is processed (or discarded) the count for acknowledged and
+*                   unprocessed frames should be decremented by 1.  This function initializes the
+*                   acknowledged receive descriptor count to 0.
+
+*               (3) Setting the maximum number of frames queued for transmission is optional.  By
+*                   default, all network interfaces are configured to block until the previous frame
+*                   has completed transmission.  However, DMA based interfaces may have several
+*                   frames configured for transmission before blocking is required. The number
+*                   of queued transmit frames depends on the number of configured transmit
+*                   descriptors.
+*
+*               (4) The physical hardware address should not be configured from NetDev_Init(). Instead,
+*                   it should be configured from within NetDev_Start() to allow for the proper use
+*                   of NetIF_Ether_HW_AddrSet(), hard coded hardware addresses from the device
+*                   configuration structure, or auto-loading EEPROM's. Changes to the physical address
+*                   only take effect when the device transitions from the DOWN to UP state.
+*
+*               (5) The device hardware address is set from one of the data sources below. Each source
+*                   is listed in the order of precedence.
+*
+*                   (a) Device Configuration Structure       Configure a valid HW address during
+*                                                                compile time.
+*
+*                                                            Configure either "00:00:00:00:00:00" or
+*                                                                an empty string, "", in order to
+*                                                                configure the HW address using using
+*                                                                method (b).
+*
+*                   (b) NetIF_Ether_HW_AddrSet()             Call NetIF_Ether_HW_AddrSet() if the HW
+*                                                                address needs to be configured via
+*                                                                run-time from a different data
+*                                                                source. E.g. Non auto-loading
+*                                                                memory such as I2C or SPI EEPROM.
+*                                                               (see Note #3).
+*
+*                   (c) Auto-Loading via EEPROM.             If neither options a) or b) are used,
+*                                                                the IF layer will use the HW address
+*                                                                obtained from the network hardware
+*                                                                address registers.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Start (NET_IF   *pif,
+                            NET_ERR  *perr)
+{
+    NET_DEV_BSP_ETHER  *pdev_bsp;
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    CPU_INT08U          hw_addr[NET_IF_ETHER_ADDR_SIZE];
+    CPU_INT08U          hw_addr_len;
+    CPU_BOOLEAN         hw_addr_cfg;
+    NET_ERR             err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev_bsp  = (NET_DEV_BSP_ETHER *)pif->Dev_BSP;              /* Obtain ptr to dev BSP.                               */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ---------------- CFG TX RDY SIGNAL ----------------- */
+    NetIF_DevCfgTxRdySignal(pif,                                /* See Note #3.                                         */
+                            pdev_cfg->TxDescNbr,
+                            perr);
+    if (*perr != NET_IF_ERR_NONE) {
+         return;
+    }
+
+    *perr = NET_DEV_ERR_NONE;
+                                                                /* ------------------- CFG HW ADDR -------------------- */
+    hw_addr_cfg = DEF_NO;                                       /* See Notes #4 & #5.                                   */
+
+    NetASCII_Str_to_MAC(pdev_cfg->HW_AddrStr,                   /* Get configured HW MAC address string, if any ...     */
+                       &hw_addr[0],                             /* ... (see Note #5a).                                  */
+                       &err);
+    if (err == NET_ASCII_ERR_NONE) {
+        NetIF_AddrHW_SetHandler((NET_IF_NBR  ) pif->Nbr,
+                                (CPU_INT08U *)&hw_addr[0],
+                                (CPU_INT08U  ) sizeof(hw_addr),
+                                (NET_ERR    *)&err);
+    }
+
+    if (err == NET_IF_ERR_NONE) {                               /* If no errors, configure device    HW MAC address.    */
+        hw_addr_cfg = DEF_YES;
+
+    } else {                                                    /* Else get  app-configured IF layer HW MAC address, ...*/
+                                                                /* ... if any (see Note #5b).                           */
+        hw_addr_len = sizeof(hw_addr);
+        NetIF_AddrHW_GetHandler(pif->Nbr, &hw_addr[0], &hw_addr_len, &err);
+        if (err == NET_IF_ERR_NONE) {
+            hw_addr_cfg  = NetIF_AddrHW_IsValidHandler(pif->Nbr, &hw_addr[0], &err);
+        } else {
+            hw_addr_cfg  = DEF_NO;
+        }
+
+        if (hw_addr_cfg != DEF_YES) {                           /* Else attempt to get device's automatically loaded ...*/
+            if (*perr != NET_IF_ERR_NONE) {                     /* No valid HW MAC address configured, return error.    */
+                 return;
+            }
+        }
+    }
+
+    if (hw_addr_cfg == DEF_YES) {                               /* If necessary, set device HW MAC address.             */
+        pdev->SPEC_ADDR1_BOT = (((CPU_INT32U)hw_addr[0] << (0 * DEF_INT_08_NBR_BITS)) |
+                                ((CPU_INT32U)hw_addr[1] << (1 * DEF_INT_08_NBR_BITS)) |
+                                ((CPU_INT32U)hw_addr[2] << (2 * DEF_INT_08_NBR_BITS)) |
+                                ((CPU_INT32U)hw_addr[3] << (3 * DEF_INT_08_NBR_BITS)));
+
+        pdev->SPEC_ADDR1_TOP = (((CPU_INT32U)hw_addr[4] << (0 * DEF_INT_08_NBR_BITS)) |
+                                ((CPU_INT32U)hw_addr[5] << (1 * DEF_INT_08_NBR_BITS)));
+    }
+
+
+                                                                /* --------------- INIT DMA DESCRIPTORS --------------- */
+    NetDev_RxDescInit(pif, perr);                               /* Initialize Rx descriptors.                           */
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+    pdev_data->RxNRdyCtr = 0;                                   /* No pending frames to process (see Note #3).          */
+
+
+    NetDev_TxDescInit(pif, perr);                               /* Initialize Tx descriptors.                           */
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+
+
+                                                                /* -------------------- CFG INT'S --------------------- */
+    pdev->INTR_STATUS |= INT_STATUS_MASK_ALL;                   /* Clear all pending int. sources.                      */
+    pdev->RX_STATUS    = 0xFFFFFFFF;
+    pdev->TX_STATUS    = 0xFFFFFFFF;
+    pdev->INTR_EN      = INT_STATUS_MASK_SUPPORTED;             /* Enable Rx, Tx and other supported int. sources.      */
+
+    pdev->NET_CFG =
+        GEM_BIT_CFG_DBUS_WIDTH(0x1)     |
+        GEM_BIT_CFG_MDC_CLK_DIV(0x5)    |
+        GEM_BIT_CFG_FCS_REMOVE          |
+        GEM_BIT_CFG_GIGE_EN             |
+        GEM_BIT_CFG_UNI_HASH_EN         |
+        GEM_BIT_CFG_MULTI_HASH_EN       |
+        GEM_BIT_CFG_FULL_DUPLEX         |
+        GEM_BIT_CFG_SPEED;
+
+    pdev->DMA_CFG =
+        GEM_BIT_DMACFG_ADDR_BUS_WIDTH       |
+        GEM_BIT_DMACFG_DISC_WHEN_NO_AHB     |
+        GEM_BIT_DMACFG_AHB_RX_SIZE(0x18u)   |
+        GEM_BIT_DMACFG_CSUM_GEN_OFFLOAD_EN  |
+        GEM_BIT_DMACFG_TX_PKTBUF_MEMSZ_SEL  |
+        GEM_BIT_DMACFG_RX_PKTBUF_SZ(0x3)    |
+        GEM_BIT_DMACFG_RX_AHB_BURST(0x1F);
+
+    CPU_MB();
+                                                                /* ------------------ ENABLE RX & TX ------------------ */
+    pdev->NET_CTRL |= GEM_BIT_CTRL_TX_EN  |                     /* Enable transmitter & receiver.                       */
+                      GEM_BIT_CTRL_RX_EN  |
+                      GEM_BIT_CTRL_MGMT_PORT_EN;
+
+    CPU_MB();
+
+    pdev_bsp->CfgClk(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Stop()
+*
+* Description : (1) Shutdown network interface hardware :
+*
+*                   (a) Disable the receiver and transmitter
+*                   (b) Disable receive and transmit interrupts
+*                   (c) Clear pending interrupt requests
+*                   (d) Free ALL receive descriptors (Return ownership to hardware)
+*                   (e) Deallocate ALL transmit buffers
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE    No Error
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Stop() via 'pdev_api->Stop()'.
+*
+* Note(s)     : (2) (a) (1) It is recommended that a device driver should only post all currently-used,
+*                           i.e. not-fully-transmitted, transmit buffers to the network interface transmit
+*                           deallocation queue.
+*
+*                       (2) However, a driver MAY attempt to post all queued &/or transmitted buffers.
+*                           The network interface transmit deallocation task will silently ignore any
+*                           unknown or duplicate transmit buffers.  This allows device drivers to
+*                           indiscriminately & easily post all transmit buffers without determining
+*                           which buffers have NOT yet been transmitted.
+*
+*                   (b) (1) Device drivers should assume that the network interface transmit deallocation
+*                           queue is large enough to post all currently-used transmit buffers.
+*
+*                       (2) If the transmit deallocation queue is NOT large enough to post all transmit
+*                           buffers, some transmit buffers may/will be leaked/lost.
+*
+*               (3) All functions that require device register access MUST obtain reference to the
+*                   device hardware register space PRIOR to attempting to access any registers.
+*                   Register definitions SHOULD NOT be absolute & SHOULD use the provided base
+*                   address within the device configuration structure, as well as the device
+*                   register definition structure in order to properly resolve register addresses
+*                   during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Stop (NET_IF   *pif,
+                           NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_INT08U          i;
+    NET_ERR             err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ----------------- DISABLE RX & TX ------------------ */
+    pdev->NET_CTRL &= ~(GEM_BIT_CTRL_TX_EN  |                   /* Disable transmitter & receiver.                      */
+                        GEM_BIT_CTRL_RX_EN);
+
+                                                                /* -------------- DISABLE & CLEAR INT'S --------------- */
+    pdev->INTR_DIS    |=  INT_STATUS_MASK_SUPPORTED;            /* Disable Rx, Tx and other supported int. sources.     */
+    pdev->INTR_STATUS |=  INT_STATUS_MASK_ALL;                  /* Clear all pending int. sources.                      */
+
+
+                                                                /* --------------- FREE RX DESCRIPTORS ---------------- */
+    NetDev_RxDescFreeAll(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------- FREE USED TX DESCRIPTORS ------------- */
+    *perr = NET_DEV_ERR_NONE;
+    pdesc = &pdev_data->TxBufDescPtrStart[0];
+    for (i = 0; i < pdev_cfg->TxDescNbr; i++) {
+        if (DEF_BIT_IS_SET(pdesc->Status, GEM_TXBUF_USED)) {    /* If NOT yet  tx'd, ...                                */
+                                                                /* ... dealloc tx buf (see Note #2a1).                  */
+            NetIF_TxDeallocTaskPost((CPU_INT08U *)(((CPU_INT64U)pdesc->AddrHigh << 32u) | (pdesc->Addr & GEM_TXBUF_ADDR_MASK)), &err);
+           (void)&err;                                          /* Ignore possible dealloc err (see Note #2b2).         */
+        }
+        pdesc++;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Rx()
+*
+* Description : (1) This function returns a pointer to the received data to the caller :
+*                   (a) Decrement frame counter
+*                   (b) Determine which receive descriptor caused the interrupt
+*                   (c) Obtain pointer to data area to replace existing data area
+*                   (d) Reconfigure descriptor with pointer to new data area
+*                   (e) Set return values.  Pointer to received data area and size
+*                   (f) Update current receive descriptor pointer
+*                   (g) Increment statistic counters
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               p_data  Pointer to pointer to received DMA data area. The received data
+*                       area address should be returned to the stack by dereferencing
+*                       p_data as *p_data = (address of receive data area).
+*
+*               size    Pointer to size. The number of bytes received should be returned
+*                       to the stack by dereferencing size as *size = (number of bytes).
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE            No Error
+*                           NET_DEV_ERR_RX              Generic Rx error.
+*                           NET_DEV_ERR_INVALID_SIZE    Invalid Rx frame size.
+*                           NET_BUF error codes         Potential NET_BUF error codes
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt() via 'pdev_api->Rx()'.
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) If a receive error occurs and the descriptor is invalid then the function
+*                   SHOULD return 0 for the size, a NULL pointer to the data area AND an
+*                   error equal to NET_DEV_ERR_RX.
+*
+*                   (a) If the next expected ready / valid descriptor is NOT owned by
+*                       software, then there is descriptor pointer corruption and the
+*                       driver should NOT increment the current receive descriptor
+*                       pointer.
+*                   (b) If the descriptor IS valid, but an error is indicated within
+*                       the descriptor status bits, or length field, then the driver
+*                       MUST increment the current receive descriptor pointer and discard
+*                       the received frame.
+*                   (c) If a new data area is unavailable, the driver MUST increment
+*                       the current receive descriptor pointer and discard the received
+*                       frame.  This will invoke the DMA to re-use the existing configured
+*                       data area.
+*
+*               (4) Some devices optionally include each receive packet's CRC in the received
+*                   packet data & size.
+*
+*                   (a) CRCs might optionally be included at run-time or at build time. Each
+*                       driver doesn't necessarily need to conditionally include or exclude
+*                       the CRC at build time.  Instead, a device may include/exclude the code
+*                       to subtract the CRC size from the packet size.
+*
+*                   (b) The CRC size should be subtracted from the receive packet size ONLY if
+*                       the CRC was included in the received packet data.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Rx (NET_IF       *pif,
+                         CPU_INT08U  **p_data,
+                         CPU_INT16U   *size,
+                         NET_ERR      *perr)
+{
+    NET_DEV_DATA       *pdev_data;
+    DEV_DESC           *pdesc;
+    CPU_INT08U         *pbuf_new;
+    CPU_INT32U          rx_len;
+    CPU_INT64U          addr;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE CFG/DATA -------- */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdesc     = (DEV_DESC          *)pdev_data->RxBufDescPtrCur;/* Obtain ptr to next ready descriptor.                 */
+
+    addr = ((CPU_INT64U)pdesc->AddrHigh << 32u) | pdesc->Addr;
+
+                                                                /* ------------- CHECK FOR RECEIVE ERRORS ------------- */
+    if ((addr & 1u) == 0) {                                     /* See Note #3a.                                        */
+        *size   = (CPU_INT16U  )0;
+        *p_data = (CPU_INT08U *)0;
+        *perr   = (NET_ERR     )NET_DEV_ERR_RX;
+         return;
+    }
+                                                                /* --------------- OBTAIN FRAME LENGTH ---------------- */
+    rx_len = (pdesc->Status & GEM_RXBUF_SIZE_MASK);
+
+    if (rx_len <  NET_IF_ETHER_FRAME_MIN_SIZE) {                /* If frame is a runt, ...                              */
+        NetDev_RxDescPtrCurInc(pif);                            /* ... discard rx'd frame    (see Note #3b).            */
+       *size   = (CPU_INT16U  )0;
+       *p_data = (CPU_INT08U *)0;
+       *perr   = (NET_ERR     )NET_DEV_ERR_INVALID_SIZE;
+        return;
+    }
+
+                                                                /* --------- OBTAIN PTR TO NEW DMA DATA AREA ---------- */
+                                                                /* Request an empty buffer.                             */
+    pbuf_new = NetBuf_GetDataPtr((NET_IF        *)pif,
+                                 (NET_TRANSACTION)NET_TRANSACTION_RX,
+                                 (NET_BUF_SIZE   )NET_IF_ETHER_FRAME_MAX_SIZE,
+                                 (NET_BUF_SIZE   )NET_IF_IX_RX,
+                                 (NET_BUF_SIZE  *)0,
+                                 (NET_BUF_SIZE  *)0,
+                                 (NET_BUF_TYPE  *)0,
+                                 (NET_ERR       *)perr);
+    if (*perr != NET_BUF_ERR_NONE) {                            /* If unable to get a buffer (see Note #3c).            */
+         NetDev_RxDescPtrCurInc(pif);                           /* Free the current descriptor.                         */
+        *size   = (CPU_INT16U  )0;
+        *p_data = (CPU_INT08U *)0;
+         return;
+    }
+
+    *size   =  rx_len;                                          /* Return the size of the received frame.               */
+    *p_data = (CPU_INT08U *)(addr & GEM_RXBUF_ADDR_MASK);       /* Return a pointer to the newly received data area.    */
+
+    CPU_DCACHE_RANGE_INV(*p_data, *size);                       /* Invalidate received buffer.                          */
+
+    if(pdesc == pdev_data->RxBufDescPtrEnd) {                   /* Update the descriptor to point to a new data area    */
+        pdesc->Addr = (CPU_INT32U)((CPU_INT64U)(void *)pbuf_new & GEM_RXBUF_ADDR_MASK) | GEM_RXBUF_ADDR_OWN | GEM_RXBUF_ADDR_WRAP;
+    } else {
+        pdesc->Addr = (CPU_INT32U)((CPU_INT64U)(void *)pbuf_new & GEM_RXBUF_ADDR_MASK) | GEM_RXBUF_ADDR_OWN;
+    }
+    pdesc->AddrHigh = (CPU_INT32U)((CPU_INT64U)(void *)pbuf_new >> 32u); /* Update the high-order address word.                  */
+
+   *perr = NET_DEV_ERR_NONE;
+    NetDev_RxDescPtrCurInc(pif);                                /* Free the current descriptor.                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Tx()
+*
+* Description : (1) This function transmits the specified data :
+*
+*                   (a) Check if the transmitter is ready.
+*                   (b) Configure the next transmit descriptor for pointer to data and data size.
+*                   (c) Issue the transmit command.
+*                   (d) Increment pointer to next transmit descriptor
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               p_data  Pointer to data to transmit.
+*
+*               size    Size    of data to transmit.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No Error
+*                           NET_DEV_ERR_TX_BUSY     No Tx descriptors available
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPkt() via 'pdev_api->Tx()'.
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) Care should be taken to avoid skipping transmit descriptors while selecting
+*                   the next available descriptor.  Software MUST track the descriptor which
+*                   is expected to generate the next transmit complete interrupt.  Skipping
+*                   descriptors, unless carefully accounted for, may make it difficult to
+*                   know which descriptor will complete transmission next.  Some device
+*                   drivers may find it useful to adjust pdev_data->TxBufDescCompPtr after
+*                   having selected the next available transmit descriptor.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Tx (NET_IF      *pif,
+                         CPU_INT08U  *p_data,
+                         CPU_INT16U   size,
+                         NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_INT32U          desc_status;
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+    pdesc     = (DEV_DESC          *)pdev_data->TxBufDescPtrCur;/* Obtain ptr to next available Tx descriptor.          */
+
+
+    desc_status = pdesc->Status;
+
+    if (desc_status & GEM_TXBUF_USED) {                         /* Find next available Tx descriptor (see Note #3).     */
+        pdesc->Addr     = (CPU_INT32U)(CPU_INT64U)(void *)p_data & GEM_TXBUF_ADDR_MASK; /* Configure descriptor with Tx data area address.      */
+        pdesc->AddrHigh = (CPU_INT32U)((CPU_INT64U)(void *)p_data >> 32u);
+
+        CPU_DCACHE_RANGE_FLUSH(p_data, size);                   /* Flush/Clean buffer to send.                          */
+
+        if(pdev_data->TxBufDescPtrCur == pdev_data->TxBufDescPtrEnd) {
+            pdesc->Status = GEM_TXBUF_WRAP | (((size) & GEM_TXBUF_LENGTH_MASK) | GEM_TXBUF_LAST);
+        } else {
+            pdesc->Status = (((size) & GEM_TXBUF_LENGTH_MASK) | GEM_TXBUF_LAST);
+        }
+
+                                                                /* Update curr desc ptr to point to next desc.          */
+        if (pdev_data->TxBufDescPtrCur != pdev_data->TxBufDescPtrEnd) {
+            pdev_data->TxBufDescPtrCur++;
+        } else {
+            pdev_data->TxBufDescPtrCur = pdev_data->TxBufDescPtrStart;
+        }
+
+        CPU_MB();                                                /* Force writes to buf & desc to be visible to the MAC.*/
+
+        pdev->NET_CTRL |= GEM_BIT_CTRL_START_TX;
+
+        pdesc = pdev_data->TxBufDescCompPtr;
+        pdev->INTR_EN = GEM_BIT_INT_TX_COMPLETE;
+
+       *perr = NET_DEV_ERR_NONE;
+    } else {
+       *perr = NET_DEV_ERR_TX_BUSY;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetDev_AddrMulticastAdd()
+*
+* Description : Configure hardware address filtering to accept specified hardware address.
+*
+* Argument(s) : pif         Pointer to an Ethernet network interface.
+*               ---         Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               paddr_hw    Pointer to hardware address.
+*               --------    Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_len    Length  of hardware address.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Hardware address successfully configured.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'len' passed equal to 0.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_AddrMulticastAdd() via 'pdev_api->AddrMulticastAdd()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_AddrMulticastAdd (NET_IF      *pif,
+                                       CPU_INT08U  *paddr_hw,
+                                       CPU_INT08U   addr_hw_len,
+                                       NET_ERR     *perr)
+{
+#ifdef  NET_MCAST_MODULE_EN
+    NET_DEV            *pdev;
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    CPU_INT08U          bit_nbr;
+    CPU_INT08U         *paddr_hash_ctrs;
+    CPU_SR_ALLOC();
+
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* Calculate the 6-bit hash value.                      */
+    bit_nbr =   ((paddr_hw[0]       & 0x3F)                              & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[0] >> 6) & 0x3) | ((paddr_hw[1] & 0xF) << 2)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[1] >> 4) & 0xF) | ((paddr_hw[2] & 0x3) << 4)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[2] >> 2) & 0x3F))                             & DEF_BIT_FIELD(6, 0u))
+            ^   ((paddr_hw[3]       & 0x3F)                              & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[3] >> 6) & 0x3) | ((paddr_hw[4] & 0xF) << 2)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[4] >> 4) & 0xF) | ((paddr_hw[5] & 0x3) << 4)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[5] >> 2) & 0x3F))                             & DEF_BIT_FIELD(6, 0u));
+
+
+    CPU_CRITICAL_ENTER();
+    paddr_hash_ctrs = &pdev_data->MulticastAddrHashBitCtr[bit_nbr];
+    (*paddr_hash_ctrs)++;                                       /* Increment hash bit reference ctr.                    */
+
+    if (*paddr_hash_ctrs == 1u) {
+        if (bit_nbr > 31u) {
+            DEF_BIT_SET(pdev->HASH_TOP, DEF_BIT(bit_nbr - 32u));
+        } else {
+            DEF_BIT_SET(pdev->HASH_BOT, DEF_BIT(bit_nbr));
+        }
+    }
+    CPU_CRITICAL_EXIT();
+
+#else
+   (void)&pif;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&paddr_hw;
+#endif
+
+   (void)&addr_hw_len;                                          /* Prevent 'variable unused' compiler warning.          */
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                     NetDev_AddrMulticastRemove()
+*
+* Description : Configure hardware address filtering to reject specified hardware address.
+*
+* Argument(s) : pif         Pointer to an Ethernet network interface.
+*               ---         Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               paddr_hw    Pointer to hardware address.
+*               --------    Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_len    Length  of hardware address.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Hardware address successfully removed.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'len' passed equal to 0.
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_AddrMulticastAdd() via 'pdev_api->AddrMulticastRemove()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_AddrMulticastRemove (NET_IF      *pif,
+                                          CPU_INT08U  *paddr_hw,
+                                          CPU_INT08U   addr_hw_len,
+                                          NET_ERR     *perr)
+{
+#ifdef  NET_MCAST_MODULE_EN
+    NET_DEV            *pdev;
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    CPU_INT08U          bit_nbr;
+    CPU_INT08U         *paddr_hash_ctrs;
+    CPU_SR_ALLOC();
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+    bit_nbr =   ((paddr_hw[0]       & 0x3F)                              & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[0] >> 6) & 0x3) | ((paddr_hw[1] & 0xF) << 2)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[1] >> 4) & 0xF) | ((paddr_hw[2] & 0x3) << 4)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[2] >> 2) & 0x3F))                             & DEF_BIT_FIELD(6, 0u))
+            ^   ((paddr_hw[3]       & 0x3F)                              & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[3] >> 6) & 0x3) | ((paddr_hw[4] & 0xF) << 2)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[4] >> 4) & 0xF) | ((paddr_hw[5] & 0x3) << 4)) & DEF_BIT_FIELD(6, 0u))
+            ^ ((((paddr_hw[5] >> 2) & 0x3F))                             & DEF_BIT_FIELD(6, 0u));
+
+    CPU_CRITICAL_ENTER();
+    paddr_hash_ctrs = &pdev_data->MulticastAddrHashBitCtr[bit_nbr];
+
+    if (*paddr_hash_ctrs > 1u) {
+       (*paddr_hash_ctrs)--;                                    /* Decrement hash bit reference ctr.                    */
+       CPU_CRITICAL_EXIT();
+       *perr = NET_DEV_ERR_NONE;
+    }
+
+    *paddr_hash_ctrs = 0u;
+
+    if (bit_nbr > 31u) {
+        DEF_BIT_CLR(pdev->HASH_TOP, DEF_BIT(bit_nbr - 32u));
+    } else {
+        DEF_BIT_CLR(pdev->HASH_BOT, DEF_BIT(bit_nbr));
+    }
+
+    CPU_CRITICAL_EXIT();
+
+#else
+   (void)&pif;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&paddr_hw;
+#endif
+
+   (void)&addr_hw_len;                                          /* Prevent 'variable unused' compiler warning.          */
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_ISR_Handler()
+*
+* Description : This function serves as the device Interrupt Service Routine Handler. This ISR
+*               handler MUST service and clear all necessary and enabled interrupt events for
+*               the device.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*               ---
+*
+*               type    Network Interface defined argument representing the type of ISR in progress. Codes
+*                       for Rx, Tx, Overrun, Jabber, etc... are defined within net_if.h and are passed
+*                       into this function by the corresponding Net BSP ISR handler function. The Net
+*                       BSP ISR handler function may be called by a specific ISR vector and therefore
+*                       know which ISR type code to pass.  Otherwise, the Net BSP may pass
+*                       NET_DEV_ISR_TYPE_UNKNOWN and the device driver MAY ignore the parameter when
+*                       the ISR type can be deduced by reading an available interrupt status register.
+*
+*                       Type codes that are defined within net_if.c include but are not limited to :
+*                           NET_DEV_ISR_TYPE_RX
+*                           NET_DEV_ISR_TYPE_TX_COMPLETE
+*                           NET_DEV_ISR_TYPE_UNKNOWN
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Specific first- or second-level BSP ISR handler.
+*
+* Note(s)     : (1) This function is called via function pointer from the context of an ISR.
+*
+*               (2) In the case of an interrupt occurring prior to Network Protocol Stack initialization,
+*                   the device driver should ensure that the interrupt source is cleared in order
+*                   to prevent the potential for an infinite interrupt loop during system initialization.
+*
+*               (3) Many DMA devices generate only one interrupt event for several ready receive
+*                   descriptors.  In order to accommodate this, it is recommended that all DMA based
+*                   drivers count the number of ready receive descriptors during the receive event
+*                   and signal the receive task for ONLY newly received descriptors which have not
+*                   yet been signaled for during the last receive interrupt event.
+*
+*               (4) Many DMA devices generate only one interrupt event for several transmit
+*                   complete descriptors.  In this case, the driver MUST determine which descriptors
+*                   have completed transmission and post each descriptor data area address to
+*                   the transmit deallocation task.  The code provided below assumes one
+*                   interrupt per transmit event which may not necessarily be the case for all
+*                   devices.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_ISR_Handler (NET_IF            *pif,
+                                  NET_DEV_ISR_TYPE   type)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_DATA            reg_val;
+    CPU_INT32U          int_clr;
+    CPU_INT08U         *p_data;
+    NET_ERR             err;
+
+
+   (void)&type;                                                 /* Prevent 'variable unused' compiler warning.          */
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ---------------- DETERMINE ISR TYPE ---------------- */
+    reg_val = pdev->INTR_STATUS;
+    int_clr = 0u;
+
+                                                                /* HANDLE RX ISRs                                       */
+    if ((reg_val & RX_ISR_EVENT_MSK) > 0) {
+
+        NetIF_RxTaskSignal(pif->Nbr, &err);                     /* Signal Net IF RxQ Task.                              */
+
+
+        pdev->INTR_DIS    = GEM_BIT_INT_RX_COMPLETE;
+        int_clr = RX_ISR_EVENT_MSK;                             /* Clear device Rx interrupt event flag.                */
+    }
+
+
+                                                                /* HANDLE TX ISRs                                       */
+    if ((reg_val & TX_ISR_EVENT_MSK) > 0) {
+         pdesc = pdev_data->TxBufDescCompPtr;
+         p_data = (CPU_INT08U *)(((CPU_INT64U)pdesc->AddrHigh << 32u) | pdesc->Addr);
+         NetIF_TxDeallocTaskPost(p_data, &err);
+         NetIF_DevTxRdySignal(pif);                             /* Signal Net IF that Tx resources are available.       */
+         if (pdev_data->TxBufDescCompPtr != pdev_data->TxBufDescPtrEnd) {
+             pdev_data->TxBufDescCompPtr++;
+         } else {
+             pdev_data->TxBufDescCompPtr = pdev_data->TxBufDescPtrStart;
+         }
+
+         int_clr |= TX_ISR_EVENT_MSK;                           /* Clear device Tx interrupt event flag.                */
+    }
+
+                                                                /* HANDLE MISC ISRs                                     */
+    int_clr |= UNHANDLED_ISR_EVENT_MASK;
+    pdev->INTR_STATUS = int_clr;                                /* Clear unhandled interrupt event flag.                */
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_IO_Ctrl()
+*
+* Description : This function provides a mechanism for the Phy driver to update the MAC link
+*               and duplex settings, as well as a method for the application and link state
+*               timer to obtain the current link status.  Additional user specified driver
+*               functionality MAY be added if necessary.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*
+*               opt     Option code representing desired function to perform. The Network Protocol Suite
+*                       specifies the option codes below. Additional option codes may be defined by the
+*                       driver developer in the driver's header file.
+*                           NET_IF_IO_CTRL_LINK_STATE_GET
+*                           NET_IF_IO_CTRL_LINK_STATE_UPDATE
+*
+*                       Driver defined operation codes MUST be defined starting from 20 or higher
+*                       to prevent clashing with the pre-defined operation code types. See the
+*                       device driver header file for more details.
+*
+*               data    Pointer to optional data for either sending or receiving additional function
+*                       arguments or return data.
+*
+*               perr    Pointer to return error code.
+*                           NET_IF_ERR_INVALID_IO_CTRL_OPT      Invalid option number specified.
+*                           NET_IF_ERR_NULL_FNCT                Null interface function pointer encountered.
+*
+*                           NET_DEV_ERR_NONE                    IO Ctrl operation completed successfully.
+*                           NET_DEV_ERR_NULL_PTR                Null argument pointer passed.
+*
+*                           NET_PHY_ERR_NULL_PTR                Pointer argument(s) passed NULL pointer(s).
+*                           NET_PHY_ERR_TIMEOUT_RESET           Phy reset          time-out.
+*                           NET_PHY_ERR_TIMEOUT_AUTO_NEG        Auto-Negotiation   time-out.
+*                           NET_PHY_ERR_TIMEOUT_REG_RD          Phy register read  time-out.
+*                           NET_PHY_ERR_TIMEOUT_REG_WR          Phy register write time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IO_CtrlHandler() via 'pdev_api->IO_Ctrl()',
+*               NetPhy_LinkStateGet()        via 'pdev_api->IO_Ctrl()'.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_IO_Ctrl (NET_IF      *pif,
+                              CPU_INT08U   opt,
+                              void        *p_data,
+                              NET_ERR     *perr)
+{
+    NET_DEV_BSP_ETHER   *pdev_bsp;
+    NET_DEV_LINK_ETHER  *plink_state;
+    NET_DEV_CFG_ETHER   *pdev_cfg;
+    NET_DEV             *pdev;
+    NET_PHY_API_ETHER   *pphy_api;
+    CPU_INT16U           duplex;
+    CPU_INT16U           spd;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_bsp =  (NET_DEV_BSP_ETHER *)pif->Dev_BSP;
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* ----------- PERFORM SPECIFIED OPERATION ------------ */
+    switch (opt) {
+        case NET_IF_IO_CTRL_LINK_STATE_GET_INFO:
+             plink_state = (NET_DEV_LINK_ETHER *)p_data;
+             if (plink_state == (NET_DEV_LINK_ETHER *)0) {
+                *perr = NET_DEV_ERR_NULL_PTR;
+                 return;
+             }
+             pphy_api = (NET_PHY_API_ETHER *)pif->Ext_API;
+             if (pphy_api == (void *)0) {
+                *perr = NET_ERR_FAULT_NULL_FNCT;
+                 return;
+             }
+             pphy_api->LinkStateGet(pif, plink_state, perr);
+             if (*perr != NET_PHY_ERR_NONE) {
+                  return;
+             }
+            *perr = NET_DEV_ERR_NONE;
+             break;
+
+
+        case NET_IF_IO_CTRL_LINK_STATE_UPDATE:
+             plink_state = (NET_DEV_LINK_ETHER *)p_data;
+
+             duplex = NET_PHY_DUPLEX_UNKNOWN;
+             if (plink_state->Duplex != duplex) {
+                 switch (plink_state->Duplex) {
+                    case NET_PHY_DUPLEX_FULL:
+                         pdev->NET_CFG |=  GEM_BIT_CFG_FULL_DUPLEX;
+                         break;
+
+                    case NET_PHY_DUPLEX_HALF:
+                         pdev->NET_CFG &=  ~GEM_BIT_CFG_FULL_DUPLEX;
+                         break;
+
+                    default:
+                         break;
+                 }
+             }
+
+             spd = NET_PHY_SPD_0;
+             if (plink_state->Spd != spd) {
+                 switch (plink_state->Spd) {
+                     case NET_PHY_SPD_10:
+                          pdev->NET_CFG &= ~GEM_BIT_CFG_SPEED;
+                          pdev->NET_CFG &= ~GEM_BIT_CFG_GIGE_EN;
+                          break;
+
+                     case NET_PHY_SPD_100:
+                          pdev->NET_CFG |=  GEM_BIT_CFG_SPEED;
+                          pdev->NET_CFG &= ~GEM_BIT_CFG_GIGE_EN;
+                          break;
+
+                     case NET_PHY_SPD_1000:
+                          pdev->NET_CFG &= ~GEM_BIT_CFG_SPEED;
+                          pdev->NET_CFG |=  GEM_BIT_CFG_GIGE_EN;
+                          break;
+
+                     default:
+                          break;
+                 }
+             }
+            *perr = NET_DEV_ERR_NONE;
+             break;
+
+
+        default:
+            *perr = NET_IF_ERR_INVALID_IO_CTRL_OPT;
+             break;
+    }
+
+    if (opt == NET_IF_IO_CTRL_LINK_STATE_UPDATE) {
+        pdev_bsp->CfgClk(pif, perr);
+        if (*perr != NET_DEV_ERR_NONE) {
+             return;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_MII_Rd()
+*
+* Description : Write data over the (R)MII bus to the specified Phy register.
+*
+* Argument(s) : pif         Pointer to the interface requiring service.
+*
+*               phy_addr   (R)MII bus address of the Phy requiring service.
+*
+*               reg_addr    Phy register number to write to.
+*
+*               p_data      Pointer to variable to store returned register data.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NULL_PTR            Pointer argument(s) passed NULL pointer(s).
+*                           NET_PHY_ERR_NONE                MII write completed successfully.
+*                           NET_PHY_ERR_TIMEOUT_REG_RD      Register read time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various Phy functions.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_MII_Rd (NET_IF      *pif,
+                             CPU_INT08U   phy_addr,
+                             CPU_INT08U   reg_addr,
+                             CPU_INT16U  *p_data,
+                             NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV            *pdev;
+    CPU_INT32U          timeout;
+    CPU_INT32U          phy_word;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_data == (CPU_INT16U *)0) {
+       *perr    =  NET_DEV_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ------------ PERFORM MII READ OPERATION ------------ */
+
+    phy_word = GEM_BIT_PHYMGMT_OPERATION(2u)     |
+               GEM_BIT_PHYMGMT_CLAUSE_22         |
+               GEM_BIT_PHYMGMT_MUST10(2u)        |
+               GEM_BIT_PHYMGMT_PHYADDR(phy_addr) |
+               GEM_BIT_PHYMGMT_REGADDR(reg_addr) |
+               GEM_BIT_PHYMGMT_DATA(0u);
+
+    pdev->PHY_MAINT = phy_word;
+
+    for(timeout = 0; timeout < 10000u; timeout++) {
+        if(DEF_BIT_IS_SET(pdev->NET_STATUS, GEM_BIT_STATUS_PHY_MGMT_IDLE)) {
+            break;
+        }
+    }
+
+    *p_data = pdev->PHY_MAINT & GEM_BIT_PHYMGMT_DATA_MSK;
+
+    *perr = NET_PHY_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_MII_Wr()
+*
+* Description : Write data over the (R)MII bus to the specified Phy register.
+*
+* Argument(s) : pif         Pointer to the interface requiring service.
+*
+*               phy_addr   (R)MII bus address of the Phy requiring service.
+*
+*               reg_addr    Phy register number to write to.
+*
+*               data        Data to write to the specified Phy register.
+*
+*               perr    Pointer to return error code.
+*                           NET_PHY_ERR_NONE                MII write completed successfully.
+*                           NET_PHY_ERR_TIMEOUT_REG_WR      Register write time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various Phy functions.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_MII_Wr (NET_IF      *pif,
+                             CPU_INT08U   phy_addr,
+                             CPU_INT08U   reg_addr,
+                             CPU_INT16U   data,
+                             NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV            *pdev;
+    CPU_INT32U          timeout;
+    CPU_INT32U          phy_word;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ------------ PERFORM MII READ OPERATION ------------ */
+
+    phy_word = GEM_BIT_PHYMGMT_OPERATION(1u)     |
+               GEM_BIT_PHYMGMT_CLAUSE_22         |
+               GEM_BIT_PHYMGMT_MUST10(2u)        |
+               GEM_BIT_PHYMGMT_PHYADDR(phy_addr) |
+               GEM_BIT_PHYMGMT_REGADDR(reg_addr) |
+               GEM_BIT_PHYMGMT_DATA(data);
+
+    pdev->PHY_MAINT = phy_word;
+
+    for(timeout = 0; timeout < 10000u; timeout++) {
+        if(DEF_BIT_IS_SET(pdev->NET_STATUS, GEM_BIT_STATUS_PHY_MGMT_IDLE)) {
+            break;
+        }
+    }
+
+   *perr = NET_PHY_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_RxDescInit()
+*
+* Description : (1) This function initializes the Rx descriptor list for the specified interface :
+*                   (a) Obtain reference to the Rx descriptor(s) memory block
+*                   (b) Initialize Rx descriptor pointers
+*                   (c) Obtain Rx descriptor data areas
+*                   (d) Initialize hardware registers
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No error
+*                           NET_IF_MGR_ERR_nnnn     Various Network Interface management error codes
+*                           NET_BUF_ERR_nnn         Various Network buffer error codes
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Start().
+*
+* Note(s)     : (2) Memory allocation for the descriptors MUST be performed BEFORE calling this
+*                   function. This ensures that multiple calls to this function do NOT allocate
+*                   additional memory to the interface and that the Rx descriptors may be safely
+*                   re-initialized by calling this function.
+*
+*               (3) All Rx descriptors are allocated as ONE memory block.  This removes the
+*                   necessity to ensure that descriptor blocks are returned to the descriptor
+*                   pool in the opposite order in which they were allocated; doing so would
+*                   ensure that each memory block address was contiguous to the one before
+*                   and after it.  If the descriptors are NOT contiguous, then software
+*                   MUST NOT assign a pointer to the pool start address and use pointer
+*                   arithmetic to navigate the descriptor list.  Since pointer arithmetic
+*                   is a convenient way to navigate the descriptor list, ONE block is allocated
+*                   and the driver uses pointer arithmetic to slice the block into descriptor
+*                   sized units.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_RxDescInit (NET_IF   *pif,
+                                 NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_INT16U          i;
+    void               *p_buf;
+    MEM_POOL           *pmem_pool;
+    CPU_SIZE_T          nbr_octets;
+    LIB_ERR             lib_err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* -------------- ALLOCATE DESCRIPTORS  --------------- */
+                                                                /* See Note #3.                                         */
+
+    pmem_pool  = &pdev_data->RxDescPool;
+    nbr_octets = pdev_cfg->RxDescNbr * sizeof(DEV_DESC);
+
+    pdesc = (DEV_DESC *)Mem_PoolBlkGet((MEM_POOL *) pmem_pool,
+                                       (CPU_SIZE_T) nbr_octets,
+                                       (LIB_ERR  *)&lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = lib_err;
+        return;
+    }
+
+                                                                /* -------------- INIT DESCRIPTOR PTRS  --------------- */
+    pdev_data->RxBufDescPtrStart = (DEV_DESC *)pdesc;
+    pdev_data->RxBufDescPtrCur   = (DEV_DESC *)pdesc;
+    pdev_data->RxBufDescPtrEnd   = (DEV_DESC *)pdesc + (pdev_cfg->RxDescNbr - 1);
+
+                                                                /* --------------- INIT RX DESCRIPTORS ---------------- */
+    for (i = 0; i < pdev_cfg->RxDescNbr; i++) {
+        pdesc->Status =  0;
+        p_buf  = (void *)NetBuf_GetDataPtr((NET_IF        *)pif,
+                                           (NET_TRANSACTION)NET_TRANSACTION_RX,
+                                           (NET_BUF_SIZE   )NET_IF_ETHER_FRAME_MAX_SIZE,
+                                           (NET_BUF_SIZE   )NET_IF_IX_RX,
+                                           (NET_BUF_SIZE  *)0,
+                                           (NET_BUF_SIZE  *)0,
+                                           (NET_BUF_TYPE  *)0,
+                                           (NET_ERR       *)perr);
+        if (*perr != NET_BUF_ERR_NONE) {
+             return;
+        }
+
+        CPU_DCACHE_RANGE_FLUSH(p_buf, pdev_cfg->RxBufLargeSize);
+
+        pdesc->Addr     = (CPU_INT32U)(CPU_INT64U)p_buf & ~GEM_RXBUF_ADDR_OWN;
+        pdesc->AddrHigh = (CPU_INT32U)((CPU_INT64U)p_buf >> 32u);
+
+
+        if (pdesc == (pdev_data->RxBufDescPtrEnd)) {            /* Set WRAP bit on last descriptor in list.             */
+            pdesc->Addr |= GEM_RXBUF_ADDR_WRAP;
+        }
+
+        pdesc++;                                                /* Point to next descriptor in list.                    */
+    }
+
+                                                                /* ------------- INIT HARDWARE REGISTERS -------------- */
+                                                                /* Configure the DMA with the Rx desc start address.    */
+    pdev->RX_QBAR              = (CPU_INT32U)(CPU_INT64U)(void *)pdev_data->RxBufDescPtrStart;
+    pdev->UPPER_RX_Q_BASE_ADDR = (CPU_INT32U)((CPU_INT64U)(void *)pdev_data->RxBufDescPtrStart >> 32u);
+
+    *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetDev_RxDescFreeAll()
+*
+* Description : (1) This function returns the descriptor memory block and descriptor data area
+*                   memory blocks back to their respective memory pools :
+*
+*                   (a) Free Rx descriptor data areas
+*                   (b) Free Rx descriptor memory block
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No error
+*                           NET_IF_MGR_ERR_nnnn     Various Network Interface management error codes
+*                           NET_BUF_ERR_nnn         Various Network buffer error codes
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Stop().
+*
+* Note(s)     : (2) No mechanism exists to free a memory pool.  However, ALL receive buffers
+*                   and the Rx descriptor blocks MUST be returned to their respective pools.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_RxDescFreeAll(NET_IF   *pif,
+                                   NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    DEV_DESC           *pdesc;
+    CPU_INT16U          i;
+    CPU_INT08U         *pdesc_data;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE CFG/DATA -------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+
+
+                                                                /* ------------- FREE RX DESC DATA AREAS -------------- */
+    pdesc = pdev_data->RxBufDescPtrStart;
+    for (i = 0; i < pdev_cfg->RxDescNbr; i++) {                 /* Free Rx descriptor ring.                             */
+        pdesc_data = (CPU_INT08U *)(((CPU_INT64U)pdesc->AddrHigh << 32u) | (pdesc->Addr & GEM_RXBUF_ADDR_MASK));
+        NetBuf_FreeBufDataAreaRx(pif->Nbr, pdesc_data);         /* Return data area to Rx data area pool.               */
+        pdesc++;
+    }
+
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetDev_RxDescPtrCurInc()
+*
+* Description : (1) Increment current descriptor pointer to next receive descriptor :
+*
+*                   (a) Return ownership of current descriptor back to DMA.
+*                   (b) Point to the next descriptor.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*               ---
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_RxDescPtrCurInc (NET_IF *pif)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    DEV_DESC           *pdesc;
+    NET_DEV            *pdev;
+    NET_ERR             err;
+
+                                                                /* --------- OBTAIN REFERENCE TO DEVICE DATA ---------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdesc     = (DEV_DESC          *)pdev_data->RxBufDescPtrCur;/* Obtain ptr to next ready descriptor.                 */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+    pdesc = pdev_data->RxBufDescPtrCur;                         /* Obtain pointer to current Rx descriptor.             */
+    pdesc->Addr &= ~GEM_RXBUF_ADDR_OWN;
+
+    if (pdev_data->RxBufDescPtrCur != pdev_data->RxBufDescPtrEnd) {
+        pdev_data->RxBufDescPtrCur++;                           /* Point to next Buffer Descriptor.                     */
+    } else {                                                    /* Wrap around end of descriptor list if necessary.     */
+        pdev_data->RxBufDescPtrCur  = pdev_data->RxBufDescPtrStart;
+    }
+
+    pdesc = pdev_data->RxBufDescPtrCur;
+    if (pdesc->Addr & GEM_RXBUF_ADDR_OWN) {
+        NetIF_RxTaskSignal(pif->Nbr, &err);
+    } else {
+        CPU_MB();
+        pdev->INTR_EN = GEM_BIT_INT_RX_COMPLETE;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_TxDescInit()
+*
+* Description : (1) This function initializes the Tx descriptor list for the specified interface :
+*
+*                   (a) Obtain reference to the Rx descriptor(s) memory block
+*                   (b) Initialize Tx descriptor pointers
+*                   (c) Obtain Rx descriptor data areas
+*                   (d) Initialize hardware registers
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No error
+*                           NET_IF_MGR_ERR_nnnn     Various Network Interface management error codes
+*                           NET_BUF_ERR_nnn         Various Network buffer error codes
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Start().
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) All Tx descriptors are allocated as ONE memory block.  This removes the
+*                   necessity to ensure that descriptor blocks are returned to the descriptor
+*                   pool in the opposite order in which they were allocated; doing so would
+*                   ensure that each memory block address was contiguous to the one before
+*                   and after it.  If the descriptors are NOT contiguous, then software
+*                   MUST NOT assign a pointer to the pool start address and use pointer
+*                   arithmetic to navigate the descriptor list.  Since pointer arithmetic
+*                   is a convenient way to navigate the descriptor list, ONE block is allocated
+*                   and the driver uses pointer arithmetic to slice the block into descriptor
+*                   sized units.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_TxDescInit (NET_IF  *pif,
+                                 NET_ERR *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_INT16U          i;
+    MEM_POOL           *pmem_pool;
+    CPU_SIZE_T          nbr_octets;
+    LIB_ERR             lib_err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* -------------- ALLOCATE DESCRIPTORS  --------------- */
+                                                                /* See Note #3.                                         */
+    pmem_pool  = &pdev_data->TxDescPool;
+    nbr_octets =  pdev_cfg->TxDescNbr * sizeof(DEV_DESC);
+    pdesc      = (DEV_DESC *)Mem_PoolBlkGet((MEM_POOL *) pmem_pool,
+                                            (CPU_SIZE_T) nbr_octets,
+                                            (LIB_ERR  *)&lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = lib_err;
+        return;
+    }
+
+                                                                /* -------------- INIT DESCRIPTOR PTRS  --------------- */
+    pdev_data->TxBufDescPtrStart = (DEV_DESC *)pdesc;
+    pdev_data->TxBufDescPtrCur   = (DEV_DESC *)pdesc;
+    pdev_data->TxBufDescCompPtr  = (DEV_DESC *)pdesc;
+    pdev_data->TxBufDescPtrEnd   = (DEV_DESC *)pdesc + (pdev_cfg->TxDescNbr - 1u);
+
+                                                                /* --------------- INIT TX DESCRIPTORS ---------------- */
+    for (i = 0; i < pdev_cfg->TxDescNbr; i++) {                 /* Initialize Tx descriptor ring                        */
+        pdesc->Status = GEM_TXBUF_USED;
+
+        if (pdesc == (pdev_data->TxBufDescPtrEnd)) {            /* Set WRAP bit on last descriptor in list.             */
+            pdesc->Status |= GEM_TXBUF_WRAP;
+        }
+        pdesc++;                                                /* Point to next descriptor in list.                    */
+    }
+
+                                                                /* ------------- INIT HARDWARE REGISTERS -------------- */
+                                                                /* Configure the DMA with the Tx desc start address.    */
+    pdev->TX_QBAR              = (CPU_INT32U)(CPU_INT64U)(void *)pdev_data->TxBufDescPtrStart;
+    pdev->UPPER_TX_Q_BASE_ADDR = (CPU_INT32U)((CPU_INT64U)(void *)pdev_data->TxBufDescPtrStart >> 32u);
+
+    *perr = NET_DEV_ERR_NONE;
+}
+
+
+#endif /* NET_IF_ETHER_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/88E1111/net_phy_88e1111.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/88E1111/net_phy_88e1111.c
new file mode 100644
index 0000000..5e8295b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/88E1111/net_phy_88e1111.c
@@ -0,0 +1,851 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NETWORK PHYSICAL LAYER DRIVER
+*
+*                              10/100/1000 Gigabit Ethernet Transceiver
+*                                          Marvell 88E1111
+*
+* Filename      : net_phy_88e1111.c
+* Version       : V3.04.02
+* Programmer(s) : AF
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.06 (or more recent version) is included in the project build.
+*
+*                 (2) The (R)MII interface port is assumed to be part of the host EMAC.  Therefore, (R)MII
+*                     reads/writes MUST be performed through the network device API interface via calls to
+*                     function pointers 'Phy_RegRd()' & 'Phy_RegWr()'.
+*
+*                 (3) Interrupt support is Phy specific, therefore the generic Phy driver does NOT support
+*                     interrupts.  However, interrupt support is easily added to the generic Phy driver &
+*                     thus the ISR handler has been prototyped and & populated within the function pointer
+*                     structure for example purposes.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_PHY_88E1111_MODULE
+#include  
+#include  
+#include  "net_phy_88e1111.h"
+
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_PHY_ADDR_MAX                     31                /* 5 bit Phy address max value.                                 */
+#define  NET_PHY_INIT_RESET_RETRIES            3                /* Check for successful reset x times                           */
+#define  NET_PHY_INIT_AUTO_NEG_RETRIES        64                /* Attempt Auto-Negotiation x times                             */
+
+/*
+*********************************************************************************************************
+*                                       REGISTER DEFINES
+*********************************************************************************************************
+*/
+
+#define  PHY_BMCR                           0x00                /* Basic mode Control register                              */
+#define  PHY_BMSR                           0x01                /* Basic Status register                                    */
+#define  PHY_PHYSID1                        0x02                /* PHY Identifier Register #1                               */
+#define  PHY_PHYSID2                        0x03                /* PHY Identifier Register #2                               */
+#define  PHY_ANAR                           0x04                /* Auto-Negotiation Advertisement control reg.              */
+#define  PHY_ANLPAR                         0x05                /* Auto-Negotiation Link partner ability reg.               */
+#define  PHY_ANER                           0x06                /* Auto-Negotiation Expansion reg.                          */
+#define  PHY_ANNPTR                         0x07                /* Auto-Negotiation Next page transmit reg.                 */
+#define  PHY_SSR                            0x11                /* Specific status register                                 */
+
+#define  PHY_1000Base_T_CTL_REG             0x09                /* 1000Base-T Control Register (Register 9 )                */
+
+
+/*
+*********************************************************************************************************
+*                                         REGISTER BITS
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ PHY_BMCR Register Bits -------------- */
+#define  BMCR_RESV                        0x003F                /* Unused...                                                */
+#define  BMCR__MSB_SPEED1000          DEF_BIT_06                /* Select 1000Mbps. RO bit, bit 6,13 =10 for 1000 MBit/s    */
+#define  BMCR_CTST                    DEF_BIT_07                /* Collision test.                                          */
+#define  BMCR_FULLDPLX                DEF_BIT_08                /* Full duplex.                                             */
+#define  BMCR_ANRESTART               DEF_BIT_09                /* Auto negotiation restart.                                */
+#define  BMCR_ISOLATE                 DEF_BIT_10                /* Disconnect Phy from MII.                                 */
+#define  BMCR_PDOWN                   DEF_BIT_11                /* Power down.                                              */
+#define  BMCR_ANENABLE                DEF_BIT_12                /* Enable auto negotiation.                                 */
+#define  BMCR__LSB_SPEED1000          DEF_BIT_13                /* Select 1000Mbps. RO bit, bit 6,13 =10 for 1000 MBit/s    */
+#define  BMCR_LOOPBACK                DEF_BIT_14                /* TXD loopback bits.                                       */
+#define  BMCR_RESET                   DEF_BIT_15                /* Reset.                                                   */
+
+#define  BMCR_SPEED_MASK             (DEF_BIT_06 | DEF_BIT_13)
+#define  BMCR_SPEED10_MASK                0x0000
+#define  BMCR_SPEED100_MASK           DEF_BIT_13
+#define  BMCR_SPEED1000_MASK          DEF_BIT_06
+
+                                                                /* ---------------- PHY_BMSR Register Bits ---------------- */
+#define  BMSR_ERCAP                   DEF_BIT_00                /* Ext-reg capability.                                      */
+#define  BMSR_JCD                     DEF_BIT_01                /* Jabber detected.                                         */
+#define  BMSR_LSTATUS                 DEF_BIT_02                /* Link status.                                             */
+#define  BMSR_ANEGCAPABLE             DEF_BIT_03                /* Able to do auto-negotiation.                             */
+#define  BMSR_RFAULT                  DEF_BIT_04                /* Remote fault detected.                                   */
+#define  BMSR_ANEGCOMPLETE            DEF_BIT_05                /* Auto-negotiation complete.                               */
+#define  BMSR_10HALF                  DEF_BIT_11                /* Can do 10mbps, half-duplex.                              */
+#define  BMSR_10FULL                  DEF_BIT_12                /* Can do 10mbps, full-duplex.                              */
+#define  BMSR_100HALF                 DEF_BIT_13                /* Can do 100mbps, half-duplex.                             */
+#define  BMSR_100FULL                 DEF_BIT_14                /* Can do 100mbps, full-duplex.                             */
+#define  BMSR_100BASE4                DEF_BIT_15                /* Can do 100mbps, 4k packets.                              */
+
+                                                                /* --------------- PHY_ANAR Register Bits ----------------- */
+#define  ANAR_SLCT                        0x001F                /* Selector bits.                                           */
+#define  ANAR_10HALF                  DEF_BIT_05                /* Try for 10mbps half-duplex.                              */
+#define  ANAR_10FULL                  DEF_BIT_06                /* Try for 10mbps full-duplex.                              */
+#define  ANAR_100HALF                 DEF_BIT_07                /* Try for 100mbps half-duplex.                             */
+#define  ANAR_100FULL                 DEF_BIT_08                /* Try for 100mbps full-duplex.                             */
+#define  ANAR_100BASE4                DEF_BIT_09                /* Try for 100mbps 4k packets.                              */
+#define  ANAR_PAUSE                   DEF_BIT_10                /* Pause.                                                   */
+#define  ANAR_ASYM_PAUSE              DEF_BIT_11                /* Asymetric Pause.                                         */
+#define  ANAR_RFAULT                  DEF_BIT_13                /* Remote fault.                                            */
+#define  ANAR_LPACK                   DEF_BIT_14                /* Ack link partners response.                              */
+#define  ANAR_NPAGE                   DEF_BIT_15                /* Next page bit.                                           */
+
+                                                                /* -------------- PHY_ANLPAR Register Bits ---------------- */
+#define  ANLPAR_SLCT                      0x001F                /* Same as advertise selector.                              */
+#define  ANLPAR_10HALF                DEF_BIT_05                /* Can do 10mbps half-duplex.                               */
+#define  ANLPAR_10FULL                DEF_BIT_06                /* Can do 10mbps full-duplex.                               */
+#define  ANLPAR_100HALF               DEF_BIT_07                /* Can do 100mbps half-duplex.                              */
+#define  ANLPAR_100FULL               DEF_BIT_08                /* Can do 100mbps full-duplex.                              */
+#define  ANLPAR_100BASE4              DEF_BIT_09                /* Can do 100mbps 4k packets.                               */
+#define  ANLPAR_RFAULT                DEF_BIT_13                /* Link partner faulted.                                    */
+#define  ANLPAR_LPACK                 DEF_BIT_14                /* Link partner acked us.                                   */
+#define  ANLPAR_NPAGE                 DEF_BIT_15                /* Next page bit.                                           */
+
+
+                                                                /* ---------- Specific status register bit masks ---------- */
+#define  SSR_LINK                     DEF_BIT_10                /* Link state mask                                          */
+                                                                /* Speed mask                                               */
+#define  SSR_SPD_MASK            (DEF_BIT_15 | DEF_BIT_14)
+#define  SSR_SPD_1000                 DEF_BIT_15                /* Speed 1000 MBit/s mask                                   */
+#define  SSR_SPD_100                  DEF_BIT_14                /* Speed 100 MBit/s mask                                    */
+#define  SSR_SPD_10                       0x0000                /* Speed 1000 MBit/s mask                                   */
+#define  SSR_FD                       DEF_BIT_13                /* Full duplex mode mask                                    */
+
+
+#define  PHY_ADV_1000_BASE_T_FD       DEF_BIT_09                /* 1000-BaseT Full duplex                                   */
+
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Physical layer driver functions may be arbitrarily named.  However, it is recommended that
+*               physical layer driver functions be named using the names provided below.  All driver function
+*               prototypes should be located within the driver C source file ('net_phy_&&&.c') & be declared
+*               as static functions to prevent name clashes with other network protocol suite physical layer
+*               drivers.
+*********************************************************************************************************
+*/
+
+static  void  NetPhy_Init        (NET_IF              *pif,
+                                  NET_ERR             *perr);
+
+static  void  NetPhy_EnDis       (NET_IF              *pif,
+                                  CPU_BOOLEAN          en,
+                                  NET_ERR             *perr);
+
+
+static  void  NetPhy_LinkStateGet(NET_IF              *pif,
+                                  NET_DEV_LINK_ETHER  *plink_state,
+                                  NET_ERR             *perr);
+
+static  void  NetPhy_LinkStateSet(NET_IF              *pif,
+                                  NET_DEV_LINK_ETHER  *plink_state,
+                                  NET_ERR             *perr);
+
+
+static  void  NetPhy_AutoNegStart(NET_IF              *pif,
+                                  NET_ERR             *perr);
+
+static  void  NetPhy_AddrProbe   (NET_IF              *pif,
+                                  NET_ERR             *perr);
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  NETWORK PHYSICAL LAYER DRIVER API
+*
+* Note(s) : (1) Physical layer driver API structures are used by applications during calls to NetIF_Add().
+*               This API structure allows higher layers to call specific physical layer driver functions
+*               via function pointer instead of by name.  This enables the network protocol suite to
+*               compile & operate with multiple physical layer drivers.
+*
+*           (2) In most cases, the API structure provided below SHOULD suffice for most physical layer
+*               drivers exactly as is with the exception that the API structure's name which MUST be
+*               unique & SHOULD clearly identify the physical layer being implemented.  For example,
+*               the AMD 79C874's API structure should be named NetPhy_API_AM79C874[].
+*
+*               The API structure MUST also be externally declared in the physical layer driver header
+*               file ('net_phy_&&&.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+                                                                                    /* 88E1111 phy API fnct ptrs :      */
+const  NET_PHY_API_ETHER  NetPhy_API_88E1111 = { NetPhy_Init,                       /*   Init                           */
+                                                 NetPhy_EnDis,                      /*   En/dis                         */
+                                                 NetPhy_LinkStateGet,               /*   Link get                       */
+                                                 NetPhy_LinkStateSet,               /*   Link set                       */
+                                                 0                                  /*   ISR handler                    */
+                                               };
+
+
+
+/*
+*********************************************************************************************************
+*                                            NetPhy_Init()
+*
+* Description : Initialize Ethernet physical layer.
+*
+* Argument(s) : pif         Pointer to interface to initialize Phy.
+*               ---         Argument checked in NetIF_Ether_IF_Start().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_PHY_ERR_NONE                Ethernet physical layer successfully
+*                                                                   initialized.
+*                               NET_PHY_ERR_TIMEOUT_RESET       Phy reset          time-out.
+*                               NET_PHY_ERR_TIMEOUT_AUTO_NEG    Auto-Negotiation   time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_RD      Phy register read  time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_WR      Phy register write time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Interface &/or device start handler(s).
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #3].
+*
+* Note(s)     : (1) Assumes the MDI port as already been enabled for the Phy.
+*
+*               (2) Phy initialization occurs each time the interface is started.
+*                   See 'net_if.c  NetIF_Start()'.
+*********************************************************************************************************
+*/
+
+static  void  NetPhy_Init (NET_IF   *pif,
+                           NET_ERR  *perr)
+{
+    NET_DEV_API_ETHER  *pdev_api;
+    NET_PHY_CFG_ETHER  *pphy_cfg;
+    NET_IF_DATA_ETHER  *pif_data;
+    CPU_INT16U          reg_val;
+    CPU_INT16U          retries;
+    CPU_INT08U          phy_addr;
+
+
+    pdev_api  =  pif->Dev_API;
+    pphy_cfg  = (NET_PHY_CFG_ETHER *)pif->Ext_Cfg;
+    pif_data  = (NET_IF_DATA_ETHER *)pif->IF_Data;
+
+    phy_addr  =  pphy_cfg->BusAddr;                             /* Obtain user cfg'd Phy addr.                              */
+
+    if (phy_addr == NET_PHY_ADDR_AUTO) {                        /* Automatic detection of Phy address enabled.              */
+        NetPhy_AddrProbe(pif, perr);                            /* Attempt to automatically determine Phy addr.             */
+        if (*perr != NET_PHY_ERR_NONE) {
+             return;
+        }
+        phy_addr           = pif_data->Phy_Addr;
+    } else {
+        pif_data->Phy_Addr = phy_addr;                          /* Set Phy addr to cfg'd val.                               */
+    }
+
+                                                                /* ---------------------- RESET PHY ----------------------- */
+    pdev_api->Phy_RegWr(pif, phy_addr, PHY_BMCR, BMCR_RESET, perr);
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+
+
+    pdev_api->Phy_RegRd(pif,                                    /* Rd ctrl reg, get reset bit.                              */
+                        phy_addr,
+                        PHY_BMCR,
+                       ®_val,
+                        perr);
+
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+
+    reg_val &= BMCR_RESET;                                      /* Mask out reset status bit.                               */
+
+
+    retries = NET_PHY_INIT_RESET_RETRIES;
+    while ((reg_val == BMCR_RESET) && (retries > 0)) {          /* Wait for reset to complete.                              */
+        KAL_Dly(200);
+
+        pdev_api->Phy_RegRd(pif,
+                            phy_addr,
+                            PHY_BMCR,
+                           ®_val,
+                            perr);
+        if (*perr != NET_PHY_ERR_NONE) {
+             return;
+        }
+
+        reg_val &= BMCR_RESET;
+        retries--;
+    }
+
+    if (retries == 0) {
+       *perr = NET_PHY_ERR_TIMEOUT_RESET;
+        return;
+    }
+
+
+    *perr = NET_PHY_ERR_NONE;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                           NetPhy_EnDis()
+*
+* Description : Enable/disable the Phy.
+*
+* Argument(s) : pif         Pointer to interface to enable/disable Phy.
+*               ---
+*
+*               en          Enable option :
+*
+*                               DEF_ENABLED                     Enable  Phy
+*                               DEF_DISABLED                    Disable Phy
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_PHY_ERR_NONE                Physical layer successfully enabled/disabled.
+*                               NET_PHY_ERR_TIMEOUT_RESET       Phy reset          time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_RD      Phy register read  time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_WR      Phy register write time-out.
+*
+* Caller(s)   : NetIF_Ether_IF_Start() via 'pphy_api->EnDis()',
+*               NetIF_Ether_IF_Stop()  via 'pphy_api->EnDis()'.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetPhy_EnDis (NET_IF       *pif,
+                            CPU_BOOLEAN   en,
+                            NET_ERR      *perr)
+{
+    NET_DEV_API_ETHER  *pdev_api;
+    NET_IF_DATA_ETHER  *pif_data;
+    CPU_INT16U          reg_val;
+    CPU_INT08U          phy_addr;
+
+
+    pdev_api = pif->Dev_API;
+    pif_data = pif->IF_Data;
+    phy_addr = pif_data->Phy_Addr;                              /* Obtain Phy addr.                                         */
+
+    pdev_api->Phy_RegRd(pif,                                    /* Obtain current control register value.                   */
+                        phy_addr,
+                        PHY_BMCR,
+                       ®_val,
+                        perr);
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+
+    switch (en) {
+        case DEF_DISABLED:
+             reg_val |=  BMCR_PDOWN;                            /* Disable.                                                 */
+             break;
+
+        case DEF_ENABLED:
+        default:
+             reg_val &= ~BMCR_PDOWN;                            /* Enable.                                                  */
+             break;
+    }
+
+    pdev_api->Phy_RegWr(pif,                                    /* Power up / down the Phy.                                 */
+                        phy_addr,
+                        PHY_BMCR,
+                        reg_val,
+                        perr);
+
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+
+   *perr = NET_PHY_ERR_NONE;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                     NetPhy_LinkStateGet()
+*
+* Description : Get current Phy link state (speed & duplex).
+*
+* Argument(s) : pif             Pointer to interface to get link state.
+*               ---             Argument validated in NetIF_IO_CtrlHandler().
+*
+*               plink_state     Pointer to structure that will receive the link state.
+*
+*               perr            Pointer to variable  that will receive the return error code from this function :
+*
+*                               NET_PHY_ERR_NONE            No  error.
+*                               NET_PHY_ERR_NULL_PTR        Pointer argument(s) passed NULL pointer(s).
+*                               NET_PHY_ERR_TIMEOUT_RESET   Phy reset          time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_RD  Phy register read  time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_WR  Phy register write time-out.
+*
+* Caller(s)   : Device driver(s)' link state &/or I/O control handler(s).
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Return(s)   : none.
+*
+* Note(s)     : (1) Some Phy's have the link status field latched in the BMSR register.  The link status
+*                   remains low after a temporary link failure until it is read. To retrieve the current
+*                   link status, BMSR must be read twice.
+*
+*               (2) Current link state should be obtained by calling this function through the NetIF layer.
+*                   See 'net_if.c  NetIF_IO_Ctrl()'.
+*********************************************************************************************************
+*/
+
+static  void  NetPhy_LinkStateGet (NET_IF              *pif,
+                                   NET_DEV_LINK_ETHER  *plink_state,
+                                   NET_ERR             *perr)
+{
+    NET_DEV_API_ETHER  *pdev_api;
+    NET_IF_DATA_ETHER  *pif_data;
+    CPU_INT16U          reg_val;
+    CPU_INT16U          link_self;
+    CPU_INT08U          phy_addr;
+    NET_ERR             err;
+    CPU_INT16U          speed_res;
+
+
+    pdev_api = pif->Dev_API;
+    pif_data = pif->IF_Data;
+    phy_addr = pif_data->Phy_Addr;                              /* Obtain Phy addr.                                         */
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (plink_state == (NET_DEV_LINK_ETHER *)0) {
+       *perr = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+    plink_state->Spd    = NET_PHY_SPD_0;
+    plink_state->Duplex = NET_PHY_DUPLEX_UNKNOWN;
+
+                                                                /* --------------- OBTAIN CUR LINK STATUS  ---------------- */
+    pdev_api->Phy_RegRd(pif, phy_addr, PHY_BMSR, &link_self, perr);
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+                                                                /* Rd BMSR twice (see Note #1).                             */
+    pdev_api->Phy_RegRd(pif, phy_addr, PHY_BMSR, &link_self, perr);
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+
+    if ((link_self & BMSR_LSTATUS) == 0) {                      /* Chk if link down.                                        */
+        *perr = NET_PHY_ERR_NONE;
+         return;
+    }
+
+
+                                                                /* --------------- DETERMINE SPD AND DUPLEX --------------- */
+                                                                /* Obtain AN settings.                                      */
+    pdev_api->Phy_RegRd(pif, phy_addr, PHY_BMCR, ®_val, perr);
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+
+    if ((reg_val & BMCR_ANENABLE) == 0) {                       /* IF AN disabled.                                          */
+                                                                /* Determine spd.                                           */
+        speed_res = reg_val & BMCR_SPEED_MASK;
+        switch (speed_res) {
+            case BMCR_SPEED10_MASK:
+                 plink_state->Spd = NET_PHY_SPD_10;
+                 break;
+
+            case BMCR_SPEED100_MASK:
+                 plink_state->Spd = NET_PHY_SPD_100;
+                 break;
+
+            case BMCR_SPEED1000_MASK:
+                 plink_state->Spd = NET_PHY_SPD_1000;
+                 break;
+
+            default:
+                 break;
+        }
+
+        if ((reg_val & BMCR_FULLDPLX) == 0) {                   /* Determine duplex.                                        */
+            plink_state->Duplex = NET_PHY_DUPLEX_HALF;
+        } else {
+            plink_state->Duplex = NET_PHY_DUPLEX_FULL;
+        }
+    } else {
+                                                                /* Obtain current link state from the Special status reg.   */
+        pdev_api->Phy_RegRd(pif,
+                            phy_addr,
+                            PHY_SSR,
+                            ®_val,
+                            &err);
+        if (err != NET_PHY_ERR_NONE) {
+            return;
+        }
+
+
+        switch(reg_val & SSR_SPD_MASK) {
+            case SSR_SPD_1000 :                                 /* 1000 MBit/s                                              */
+                 plink_state->Spd = NET_PHY_SPD_1000;
+                 break;
+
+            case SSR_SPD_100 :                                  /* 100 MBit/s                                               */
+                 plink_state->Spd = NET_PHY_SPD_100;
+                 break;
+
+            case SSR_SPD_10 :                                   /* 10 MBit/s                                                */
+                 plink_state->Spd = NET_PHY_SPD_10;
+                 break;
+
+        }
+        if ((reg_val & SSR_FD)) {                               /* Full duplex?                                             */
+            plink_state->Duplex = NET_PHY_DUPLEX_FULL;
+
+        } else {
+            plink_state->Duplex = NET_PHY_DUPLEX_HALF;
+        }
+    }
+
+                                                                 /* Link established, update MAC settings.                  */
+    pdev_api->IO_Ctrl((NET_IF   *) pif,
+                      (CPU_INT08U) NET_IF_IO_CTRL_LINK_STATE_UPDATE,
+                      (void     *) plink_state,
+                      (NET_ERR  *)&err);
+
+    *perr = NET_PHY_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetPhy_LinkStateSet()
+*
+* Description : Set current Phy link state (speed & duplex).
+*
+* Argument(s) : pif             Pointer to interface to get link state.
+*               ---             Argument validated in NetIF_Start().
+*
+*               plink_state     Pointer to structure that will contain the desired link state.
+*
+*               perr            Pointer to variable  that will receive the return error code from this function :
+*
+*                               NET_PHY_ERR_NONE            No  error.
+*                               NET_PHY_ERR_NULL_PTR        Pointer argument(s) passed NULL pointer(s).
+*                               NET_PHY_ERR_TIMEOUT_RESET   Phy reset          time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_RD  Phy register read  time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_WR  Phy register write time-out.
+*
+* Caller(s)   : NetIF_Ether_IF_Start() via 'pphy_api->LinkStateSet()'.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetPhy_LinkStateSet (NET_IF              *pif,
+                                   NET_DEV_LINK_ETHER  *plink_state,
+                                   NET_ERR             *perr)
+{
+    NET_DEV_API_ETHER  *pdev_api;
+    NET_IF_DATA_ETHER  *pif_data;
+    CPU_INT16U          reg_val;
+    CPU_INT16U          spd;
+    CPU_INT08U          duplex;
+    CPU_INT08U          phy_addr;
+
+
+    pdev_api =  pif->Dev_API;
+    pif_data = (NET_IF_DATA_ETHER *)pif->IF_Data;
+    phy_addr =  pif_data->Phy_Addr;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (plink_state == (NET_DEV_LINK_ETHER *)0) {
+       *perr = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+    spd    = plink_state->Spd;
+    duplex = plink_state->Duplex;
+
+    if (((spd    != NET_PHY_SPD_10)      &&                     /* Enable AN if cfg invalid or any member set to AUTO.      */
+         (spd    != NET_PHY_SPD_100)     &&
+         (spd    != NET_PHY_SPD_1000))   ||
+        ((duplex != NET_PHY_DUPLEX_HALF) &&
+         (duplex != NET_PHY_DUPLEX_FULL))) {
+
+        NetPhy_AutoNegStart(pif, perr);
+        return;
+    }
+
+    pdev_api->Phy_RegRd(pif, phy_addr, PHY_BMCR, ®_val, perr);
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+
+    reg_val &= ~BMCR_ANENABLE;                                  /* Clr AN enable bit.                                       */
+
+    switch (spd) {                                              /* Set spd.                                                 */
+        case NET_PHY_SPD_10:
+             reg_val &= ~(DEF_BIT_06 | DEF_BIT_13);
+             break;
+
+        case NET_PHY_SPD_100:
+             reg_val |=  DEF_BIT_13;
+             reg_val &= ~DEF_BIT_06;
+             break;
+
+        case NET_PHY_SPD_1000:
+             reg_val |=  DEF_BIT_06;
+             reg_val &= ~DEF_BIT_13;
+             break;
+
+        default:
+             break;
+    }
+
+    switch (duplex) {                                           /* Set duplex.                                              */
+        case NET_PHY_DUPLEX_HALF:
+             reg_val &= ~BMCR_FULLDPLX;
+             break;
+
+        case NET_PHY_DUPLEX_FULL:
+             reg_val |=  BMCR_FULLDPLX;
+             break;
+
+        default:
+             break;
+    }
+                                                                /* Cfg Phy.                                                 */
+    pdev_api->Phy_RegWr(pif, phy_addr, PHY_BMCR, reg_val | BMCR_RESET , perr);
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+
+   *perr = NET_PHY_ERR_NONE;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                        NetPhy_AutoNegStart()
+*
+* Description : Start the Auto-Negotiation processs.
+*
+* Argument(s) : pif         Pointer to interface to start auto-negotiation.
+*               ---         Argument validated in NetPhy_Init().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_PHY_ERR_NONE                Physical layer successfully started.
+*                               NET_PHY_ERR_TIMEOUT_REG_RD      Phy register read  time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_WR      Phy register write time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetPhy_LinkStateSet().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetPhy_AutoNegStart (NET_IF   *pif,
+                                   NET_ERR  *perr)
+{
+    NET_DEV_API_ETHER  *pdev_api;
+    NET_IF_DATA_ETHER  *pif_data;
+    CPU_INT16U          reg_val;
+    CPU_INT08U          phy_addr;
+    CPU_INT16U          retries;
+
+
+    pif_data = (NET_IF_DATA_ETHER *)pif->IF_Data;
+    phy_addr =  pif_data->Phy_Addr;
+    pdev_api =  pif->Dev_API;
+
+    pdev_api->Phy_RegRd(pif, phy_addr, PHY_BMCR, ®_val, perr);
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+
+    reg_val |= BMCR_ANENABLE |
+               BMCR_ANRESTART;
+                                                                /* Restart Auto-Negotiation.                                */
+    pdev_api->Phy_RegWr(pif, phy_addr, PHY_BMCR, reg_val, perr);
+    if (*perr != NET_PHY_ERR_NONE) {
+         return;
+    }
+
+    retries = NET_PHY_INIT_AUTO_NEG_RETRIES;
+
+    do {                                                       /* Wait until the autonegotiation will be completed         */
+        retries--;
+        pdev_api->Phy_RegRd (pif, phy_addr, PHY_BMSR, ®_val, perr);
+        if(*perr != NET_PHY_ERR_NONE) {
+            return;
+        }
+
+        if (reg_val & BMSR_ANEGCOMPLETE) {
+            break;
+        }
+
+        KAL_Dly(200);
+
+    } while (retries > 0);
+
+    if(retries == 0) {
+        *perr = NET_PHY_ERR_TIMEOUT_AUTO_NEG;
+        return;
+    }
+
+   *perr = NET_PHY_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetPhy_AddrProbe()
+*
+* Description : Automatically detect Phy bus address.
+*
+* Argument(s) : pif         Pointer to interface to probe.
+*               ---         Argument validated in NetPhy_Init().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_PHY_ERR_NONE                Physical layer's address successfully
+*                                                                   detected.
+*                               NET_PHY_ERR_ADDR_PROBE          Unable to determine Phy address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetPhy_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Assumes the MDI port has already been initialized for the Phy.
+*********************************************************************************************************
+*/
+
+static  void  NetPhy_AddrProbe (NET_IF   *pif,
+                                NET_ERR  *perr)
+{
+    NET_DEV_API_ETHER  *pdev_api;
+    NET_IF_DATA_ETHER  *pif_data;
+    CPU_INT16U          reg_id1;
+    CPU_INT16U          reg_id2;
+    CPU_INT08U          i;
+
+
+    pdev_api = pif->Dev_API;
+    for (i = 0; i <= NET_PHY_ADDR_MAX; i++) {
+        pdev_api->Phy_RegRd(pif,                                /* Obtain Phy ID 1 register value.                          */
+                            i,
+                            PHY_PHYSID1,
+                           ®_id1,
+                            perr);
+        if (*perr != NET_PHY_ERR_NONE) {
+             continue;
+        }
+
+        pdev_api->Phy_RegRd(pif,                                /* Obtain Phy ID 2 register value.                          */
+                            i,
+                            PHY_PHYSID2,
+                           ®_id2,
+                            perr);
+        if (*perr != NET_PHY_ERR_NONE) {
+             continue;
+        }
+
+        if (((reg_id1 == 0)      && (reg_id2 == 0)) ||
+            ((reg_id1 == 0xFFFF) && (reg_id2 == 0xFFFF))) {
+            continue;
+        } else {
+            break;
+        }
+    }
+
+    if (i > NET_PHY_ADDR_MAX) {
+       *perr = NET_PHY_ERR_ADDR_PROBE;
+        return;
+    }
+
+    pif_data = pif->IF_Data;
+    pif_data->Phy_Addr = i;                                     /* Store discovered Phy addr.                               */
+
+   *perr = NET_PHY_ERR_NONE;
+}
+
+#endif
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/88E1111/net_phy_88e1111.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/88E1111/net_phy_88e1111.h
new file mode 100644
index 0000000..8c54527
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/88E1111/net_phy_88e1111.h
@@ -0,0 +1,84 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NETWORK PHYSICAL LAYER DRIVER
+*
+*                              10/100/1000 Gigabit Ethernet Transceiver
+*                                          Marvell 88E1111
+*
+* Filename      : net_phy_88e1111.h
+* Version       : V3.04.02
+* Programmer(s) : AF
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.06 (or more recent version) is included in the project build.
+*
+*                 (2) The (R)MII interface port is assumed to be part of the host EMAC.  Therefore, (R)MII
+*                     reads/writes MUST be performed through the network device API interface via calls to
+*                     function pointers 'Phy_RegRd()' & 'Phy_RegWr()'.
+*
+*                 (3) Interrupt support is Phy specific, therefore the generic Phy driver does NOT support
+*                     interrupts.  However, interrupt support is easily added to the generic Phy driver &
+*                     thus the ISR handler has been prototyped and & populated within the function pointer
+*                     structure for example purposes.
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_PHY_88E1111_MODULE_PRESENT
+#define  NET_PHY_88E1111_MODULE_PRESENT
+
+#include  
+#include  
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_PHY_API_ETHER  NetPhy_API_88E1111;
+
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif /* NET_IF_ETHER_MODULE_EN         */
+#endif /* NET_PHY_88E1111_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/AM79C874/net_phy_am79c874.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/AM79C874/net_phy_am79c874.h
new file mode 100644
index 0000000..8a1c7c0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/AM79C874/net_phy_am79c874.h
@@ -0,0 +1,80 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NETWORK PHYSICAL LAYER DRIVER
+*
+*                                            AMD AM79C874
+*
+* Filename      : net_phy_am79c874.h
+* Version       : V3.03.01.00
+* Programmer(s) : EHS
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.02 (or more recent version) is included in the project build.
+*
+*                 (2) The (R)MII interface port is assumed to be part of the host EMAC.  Therefore, (R)MII
+*                     reads/writes MUST be performed through the network device API interface via calls to
+*                     function pointers 'Phy_RegRd()' & 'Phy_RegWr()'.
+*
+*                 (3) Interrupt support is Phy specific, therefore the generic Phy driver does NOT support
+*                     interrupts.  However, interrupt support is easily added to the generic Phy driver &
+*                     thus the ISR handler has been prototyped and & populated within the function pointer
+*                     structure for example purposes.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_PHY_AM79C874_MODULE_PRESENT
+#define  NET_PHY_AM79C874_MODULE_PRESENT
+
+#include  
+#include  
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_PHY_API_ETHER  NetPhy_API_AM79C874;
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_ETHER_MODULE_EN          */
+#endif  /* NET_PHY_AM79C874_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/DP83640/net_phy_dp83640.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/DP83640/net_phy_dp83640.h
new file mode 100644
index 0000000..74a3738
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/DP83640/net_phy_dp83640.h
@@ -0,0 +1,87 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NETWORK PHYSICAL LAYER DRIVER
+*
+*                                        DP83640 ETHERNET PHY
+*
+* Filename      : net_phy_dp83640.h
+* Version       : V3.03.01.00
+* Programmer(s) : EHS
+*                 HMS
+*                 FGK
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.02 (or more recent version) is included in the project build.
+*
+*                 (2) The (R)MII interface port is assumed to be part of the host EMAC.  Therefore, (R)MII
+*                     reads/writes MUST be performed through the network device API interface via calls to
+*                     function pointers 'Phy_RegRd()' & 'Phy_RegWr()'.
+*
+*                 (3) Interrupt support is Phy specific, therefore the generic Phy driver does NOT support
+*                     interrupts.  However, interrupt support is easily added to the generic Phy driver &
+*                     thus the ISR handler has been prototyped and & populated within the function pointer
+*                     structure for example purposes.
+*
+*                 (4) Does NOT support 1000Mbps Phy.
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_PHY_DP83640_MODULE_PRESENT                         /* See Note #1.                                         */
+#define  NET_PHY_DP83640_MODULE_PRESENT
+
+#include  
+#include  
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_PHY_API_ETHER  NetPhy_API_DP83640;
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_ETHER_MODULE_EN           */
+#endif  /* NET_PHY_DP83640_MODULE_PRESENT   */
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/DP83867IR/net_phy_dp83867ir.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/DP83867IR/net_phy_dp83867ir.h
new file mode 100644
index 0000000..830a9e0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/DP83867IR/net_phy_dp83867ir.h
@@ -0,0 +1,132 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NETWORK PHYSICAL LAYER DRIVER
+*
+*                                             TI DP83867IR
+*
+* Filename      : net_phy_dp83867ir.h
+* Version       : V3.04.01.00
+* Programmer(s) : EHS
+*                 HMS
+*                 SB
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V3.00 (or more recent version) is included in the project build.
+*
+*                 (2) The (R)MII interface port is assumed to be part of the host EMAC.  Therefore, (R)MII
+*                     reads/writes MUST be performed through the network device API interface via calls to
+*                     function pointers 'Phy_RegRd()' & 'Phy_RegWr()'.
+*
+*                 (3) Interrupt support is Phy specific, therefore the generic Phy driver does NOT support
+*                     interrupts.  However, interrupt support is easily added to the generic Phy driver &
+*                     thus the ISR handler has been prototyped and & populated within the function pointer
+*                     structure for example purposes.
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This network physical layer header file is protected from multiple pre-processor inclusion
+*               through use of the network physical layer module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  NET_PHY_MODULE_PRESENT                                 /* See Note #1.                                         */
+#define  NET_PHY_MODULE_PRESENT
+#ifdef   NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                 NETWORK PHYSICAL LAYER ERROR CODES
+*
+* Note(s) : (1) ALL physical layer-independent error codes #define'd in      'net_err.h';
+*               ALL physical layer-specific    error codes #define'd in this 'net_phy_&&&.h'.
+*
+*           (2) Network error code '12,000' series reserved for network physical layer drivers.
+*               See 'net_err.h  NETWORK PHYSICAL LAYER ERROR CODES' to ensure that physical layer-
+*               specific error codes do NOT conflict with physical layer-independent error codes.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_PHY_API_ETHER  NetPhy_API_DP83867IR;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  NetPhy_DP83867IR_DelayCfg(NET_IF_NBR    if_nbr,
+                                CPU_BOOLEAN   tx_en,
+                                CPU_INT08U    tx_dly,
+                                CPU_BOOLEAN   rx_en,
+                                CPU_INT08U    rx_dly,
+                                NET_ERR      *perr);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_ETHER_MODULE_EN */
+#endif  /* NET_PHY_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/Generic/net_phy.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/Generic/net_phy.h
new file mode 100644
index 0000000..4411df3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/Generic/net_phy.h
@@ -0,0 +1,126 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NETWORK PHYSICAL LAYER DRIVER
+*
+*                                        GENERIC ETHERNET PHY
+*
+* Filename      : net_phy.h
+* Version       : V3.03.01.00
+* Programmer(s) : EHS
+*                 HMS
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.02 (or more recent version) is included in the project build.
+*
+*                 (2) The (R)MII interface port is assumed to be part of the host EMAC.  Therefore, (R)MII
+*                     reads/writes MUST be performed through the network device API interface via calls to
+*                     function pointers 'Phy_RegRd()' & 'Phy_RegWr()'.
+*
+*                 (3) Interrupt support is Phy specific, therefore the generic Phy driver does NOT support
+*                     interrupts.  However, interrupt support is easily added to the generic Phy driver &
+*                     thus the ISR handler has been prototyped and & populated within the function pointer
+*                     structure for example purposes.
+*
+*                 (4) Does NOT support 1000Mbps Phy.
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This network physical layer header file is protected from multiple pre-processor inclusion
+*               through use of the network physical layer module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  NET_PHY_MODULE_PRESENT                                 /* See Note #1.                                         */
+#define  NET_PHY_MODULE_PRESENT
+#ifdef   NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                 NETWORK PHYSICAL LAYER ERROR CODES
+*
+* Note(s) : (1) ALL physical layer-independent error codes #define'd in      'net_err.h';
+*               ALL physical layer-specific    error codes #define'd in this 'net_phy_&&&.h'.
+*
+*           (2) Network error code '12,000' series reserved for network physical layer drivers.
+*               See 'net_err.h  NETWORK PHYSICAL LAYER ERROR CODES' to ensure that physical layer-
+*               specific error codes do NOT conflict with physical layer-independent error codes.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_PHY_API_ETHER  NetPhy_API_Generic;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_ETHER_MODULE_EN */
+#endif  /* NET_PHY_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/SP83848C/net_phy_dp83848c.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/SP83848C/net_phy_dp83848c.h
new file mode 100644
index 0000000..7bd50eb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/SP83848C/net_phy_dp83848c.h
@@ -0,0 +1,79 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK PHYSICAL LAYER
+*
+*                                        DP83848C ETHERNET PHY
+*
+* Filename      : net_phy_dp83848c.h
+* Version       : V3.03.01.00
+* Programmer(s) : ahfai
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.05 (or more recent version) is included in the project build.
+*
+*                 (2) The (R)MII interface port is assumed to be part of the host EMAC.  Therefore, (R)MII
+*                     reads/writes MUST be performed through the network device API interface via calls to
+*                     function pointers 'Phy_RegRd()' & 'Phy_RegWr()'.
+*
+*                 (3) Interrupt support is Phy specific, therefore the generic Phy driver does NOT support
+*                     interrupts.  However, interrupt support is easily added to the generic Phy driver &
+*                     thus the ISR handler has been prototyped and & populated within the function pointer
+*                     structure for example purposes.
+*
+*                 (4) Does NOT support 1000Mbps Phy.
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_PHY_DP83848C_MODULE_PRESENT
+#define  NET_PHY_DP83848C_MODULE_PRESENT
+
+
+#include  
+#include  
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_PHY_API_ETHER   NetPhy_API_DP83848C;
+
+
+#endif  /* NET_PHY_DP83848C_MODULE_PRESENT  */
+#endif  /* NET_IF_ETHER_MODULE_EN           */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_dma.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_dma.c
new file mode 100644
index 0000000..627b7ca
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_dma.c
@@ -0,0 +1,1919 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                                        ETHERNET DMA TEMPLATE
+*
+* Filename      : net_dev_ether_template_dma.c
+* Version       : V3.04.02
+* Programmer(s) : EHS
+*                 FGK
+*                 ITJ
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.20.00 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_DEV_TEMPLATE_ETHER_DMA_MODULE
+#include  
+#include  
+#include  
+#include  "net_dev_ether_template_dma.h"
+
+
+#ifdef NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*
+* Note(s) : (1) Receive buffers usually MUST be aligned to some octet boundary.  However, adjusting
+*               receive buffer alignment MUST be performed from within 'net_dev_cfg.h'.  Do not adjust
+*               the value below as it is used for configuration checking only.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MII_REG_RD_WR_TO                              10000    /* MII read write timeout.                              */
+#define  RX_BUF_ALIGN_OCTETS                               4    /* See Note #1.                                         */
+
+#define  DEV_RX_CRC_DIS                                    0
+#define  DEV_RX_CRC_EN                                     1
+#define  DEV_RX_CRC_OPT                                    2
+
+#define  TX_BUF_STATUS                                     1
+#define  USED                                              1
+
+
+/*
+*********************************************************************************************************
+*                                     REGISTER BIT DEFINITIONS
+*
+* Note(s) : (1) All necessary register bit definitions should be defined within this section.
+*********************************************************************************************************
+*/
+
+#define  INT_STATUS_MASK_ALL                      0x00000000
+#define  INT_STATUS_MASK_SUPPORTED                0x00000000
+#define  CTRL_TX_EN                               DEF_BIT_00
+#define  CTRL_RX_EN                               DEF_BIT_00
+#define  CTRL_RX_CRC_EN                           DEF_BIT_00
+
+#define  RX_ISR_EVENT_MSK                         DEF_BIT_00
+#define  TX_ISR_EVENT_MSK                         DEF_BIT_00
+#define  UNHANDLED_ISR_EVENT_MASK                 DEF_BIT_00
+
+
+/*
+*********************************************************************************************************
+*                                     DESCRIPTOR BIT DEFINITIONS
+*********************************************************************************************************
+*/
+
+#define  DESC_VALID_MSK                           DEF_BIT_00
+#define  DESC_OWNED_BY_SW_MASK                    DEF_BIT_00
+#define  DESC_WRAP_BIT_MASK                       DEF_BIT_00
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*
+* Note(s) : (1) Instance specific data area structures should be defined below.  The data area
+*               structure typically includes error counters and variables used to track the
+*               state of the device.  Variables required for correct operation of the device
+*               MUST NOT be defined globally and should instead be included within the instance
+*               specific data area structure and referenced as pif->Dev_Data structure members.
+*
+*           (2) DMA based devices may require more than one type of descriptor.  Each descriptor
+*               type should be defined below.  An example descriptor has been provided.
+*
+*           (3) All device drivers MUST track the addresses of ALL buffers that have been
+*               transmitted and not yet acknowledged through transmit complete interrupts.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* ------------- DMA DESCRIPTOR DATA TYPE ------------- */
+typedef  struct  dev_desc {                                     /* See Note #2.                                         */
+    CPU_REG32    DMA_Ctrl;                                      /* DMA Control Register.                                */
+    CPU_REG32    DMA_Addr;                                      /* DMA Start Address Register.                          */
+    CPU_REG32    DMA_Status;                                    /* DMA Packet Status and Control Register.              */
+} DEV_DESC;
+
+                                                                /* --------------- DEVICE INSTANCE DATA --------------- */
+typedef  struct  net_dev_data {
+    MEM_POOL     RxDescPool;
+    MEM_POOL     TxDescPool;
+    DEV_DESC    *RxBufDescPtrStart;
+    DEV_DESC    *RxBufDescPtrCur;
+    DEV_DESC    *RxBufDescPtrEnd;
+    DEV_DESC    *TxBufDescPtrStart;
+    DEV_DESC    *TxBufDescPtrCur;
+    DEV_DESC    *TxBufDescCompPtr;                              /* See Note #3.                                         */
+    DEV_DESC    *TxBufDescPtrEnd;
+    CPU_INT16U   RxNRdyCtr;
+    NET_CTR      ErrRxPktDiscardedCtr;
+#ifdef  NET_MCAST_MODULE_EN
+    CPU_INT08U   MulticastAddrHashBitCtr[64];
+#endif
+} NET_DEV_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*
+* Note(s) : (1) Device register definitions SHOULD NOT be absolute & SHOULD use the provided base address
+*               within the device configuration structure (see 'net_dev_cfg.c'), as well as each device's
+*               register definition structure in order to properly resolve register addresses at run-time
+*               by mapping the device register definition structure onto an interface's base address.
+*
+*           (2) The device register definition structure MUST take into account appropriate register
+*               offsets & apply reserved space as required.  The registers listed within the register
+*               definition structure MUST reflect the exact ordering and data sizes illustrated in the
+*               device user guide.
+*
+*           (3) Device registers SHOULD be declared as volatile variables so that compilers do NOT cache
+*               register values but MUST perform the steps to read or write each register value for every
+*               register read or write access.
+*
+*               An example device register structure is provided below.
+*********************************************************************************************************
+*/
+
+typedef  struct  net_dev {
+    CPU_REG32  CTRL;
+    CPU_REG32  DMA_RX_START_ADDR;
+    CPU_REG32  DMA_TX_START_ADDR;
+    CPU_REG32  IAH;
+    CPU_REG32  IAL;
+    CPU_REG32  RESERVED1;
+    CPU_REG32  RESERVED2;
+    CPU_REG32  IER;
+    CPU_REG32  ISR;
+    CPU_REG32  RESERVED3;
+} NET_DEV;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*
+* Note(s) : (1) Global variables are highly discouraged and should only be used for storing NON-instance
+*               specific data and the array of instance specific data.  Global variables, those that are
+*               not declared within the NET_DEV_DATA area, are not multiple-instance safe and could lead
+*               to incorrect driver operation if used to store device state information.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Device driver functions may be arbitrarily named.  However, it is recommended that device
+*               driver functions be named using the names provided below.  All driver function prototypes
+*               should be located within the driver C source file ('net_dev_&&&.c') & be declared as
+*               static functions to prevent name clashes with other network protocol suite device drivers.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                        /* -------- FNCT'S COMMON TO ALL DEV'S -------- */
+static  void  NetDev_Init               (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_Start              (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_Stop               (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_Rx                 (NET_IF             *pif,
+                                         CPU_INT08U        **p_data,
+                                         CPU_INT16U         *size,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_Tx                 (NET_IF             *pif,
+                                         CPU_INT08U         *p_data,
+                                         CPU_INT16U          size,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_AddrMulticastAdd   (NET_IF             *pif,
+                                         CPU_INT08U         *paddr_hw,
+                                         CPU_INT08U          addr_hw_len,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_AddrMulticastRemove(NET_IF             *pif,
+                                         CPU_INT08U         *paddr_hw,
+                                         CPU_INT08U          addr_hw_len,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_ISR_Handler        (NET_IF             *pif,
+                                         NET_DEV_ISR_TYPE    type);
+
+
+static  void  NetDev_IO_Ctrl            (NET_IF             *pif,
+                                         CPU_INT08U          opt,
+                                         void               *p_data,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_MII_Rd             (NET_IF             *pif,
+                                         CPU_INT08U          phy_addr,
+                                         CPU_INT08U          reg_addr,
+                                         CPU_INT16U         *p_data,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_MII_Wr             (NET_IF             *pif,
+                                         CPU_INT08U          phy_addr,
+                                         CPU_INT08U          reg_addr,
+                                         CPU_INT16U          data,
+                                         NET_ERR            *perr);
+
+
+                                                                        /* ----- FNCT'S COMMON TO DMA-BASED DEV'S ----- */
+static  void  NetDev_RxDescInit         (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_RxDescFreeAll      (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_RxDescPtrCurInc    (NET_IF             *pif);
+
+
+static  void  NetDev_TxDescInit         (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NETWORK DEVICE DRIVER API
+*
+* Note(s) : (1) Device driver API structures are used by applications during calls to NetIF_Add().  This
+*               API structure allows higher layers to call specific device driver functions via function
+*               pointer instead of by name.  This enables the network protocol suite to compile & operate
+*               with multiple device drivers.
+*
+*           (2) In most cases, the API structure provided below SHOULD suffice for most device drivers
+*               exactly as is with the exception that the API structure's name which MUST be unique &
+*               SHOULD clearly identify the device being implemented.  For example, the Cirrus Logic
+*               CS8900A Ethernet controller's API structure should be named NetDev_API_CS8900A[].
+*
+*               The API structure MUST also be externally declared in the device driver header file
+*               ('net_dev_&&&.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+
+const  NET_DEV_API_ETHER  NetDev_API_TemplateEtherDMA = {                               /* Ether DMA dev API fnct ptrs :*/
+                                                          &NetDev_Init,                 /*   Init/add                   */
+                                                          &NetDev_Start,                /*   Start                      */
+                                                          &NetDev_Stop,                 /*   Stop                       */
+                                                          &NetDev_Rx,                   /*   Rx                         */
+                                                          &NetDev_Tx,                   /*   Tx                         */
+                                                          &NetDev_AddrMulticastAdd,     /*   Multicast addr add         */
+                                                          &NetDev_AddrMulticastRemove,  /*   Multicast addr remove      */
+                                                          &NetDev_ISR_Handler,          /*   ISR handler                */
+                                                          &NetDev_IO_Ctrl,              /*   I/O ctrl                   */
+                                                          &NetDev_MII_Rd,               /*   Phy reg rd                 */
+                                                          &NetDev_MII_Wr                /*   Phy reg wr                 */
+                                                        };
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Init()
+*
+* Description : (1) Initialize Network Driver Layer :
+*
+*                   (a) Initialize required clock sources
+*                   (b) Initialize external interrupt controller
+*                   (c) Initialize external GPIO controller
+*                   (d) Initialize driver state variables
+*                   (e) Allocate memory for device DMA descriptors
+*                   (f) Initialize additional device registers
+*                       (1) (R)MII mode / Phy bus type
+*                       (2) Disable device interrupts
+*                       (3) Disable device receiver and transmitter
+*                       (4) Other necessary device initialization
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE            No Error.
+*                           NET_DEV_ERR_INIT            General initialization error.
+*                           NET_BUF_ERR_POOL_MEM_ALLOC  Memory allocation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Add() via 'pdev_api->Init()'.
+*
+* Note(s)     : (2) The application developer SHOULD define NetDev_CfgClk() within net_bsp.c
+*                   in order to properly enable clocks for specified network interface.  In
+*                   some cases, a device may require clocks to be enabled for BOTH the device
+*                   and accessory peripheral modules such as GPIO.  A call to this function
+*                   MAY need to occur BEFORE any device register accesses are made.  In the
+*                   event that a device does NOT require any external clocks to be enabled,
+*                   it is recommended that the device driver still call the NetBSP fuction
+*                   which may in turn leave the section for the specific interface number
+*                   empty.
+*
+*               (3) The application developer SHOULD define NetDev_CfgGPIO() within net_bsp.c
+*                   in order to properly configure any necessary GPIO necessary for the device
+*                   to operate properly.  Micrium recommends defining and calling this NetBSP
+*                   function even if no additional GPIO initialization is required.
+*
+*               (4) The application developer SHOULD define NetDev_CfgIntCtrl() within net_bsp.c
+*                   in order to properly enable interrupts on an external or CPU integrated
+*                   interrupt controller.  Interrupt sources that are specific to the DEVICE
+*                   hardware MUST NOT be initialized from within NetDev_CfgIntCtrl() and
+*                   SHOULD only be modified from within the device driver.
+*
+*                   (a) External interrupt sources are cleared within the NetBSP first level
+*                       ISR handler either before or after the call to the device driver ISR
+*                       handler function.  The device driver ISR handler function SHOULD only
+*                       clear the device specific interrupts and NOT external or CPU interrupt
+*                       controller interrupt sources.
+*
+*               (5) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (6) All device drivers that store instance specific data MUST declare all
+*                   instance specific variables within the device data area defined above.
+*
+*               (7) Drivers SHOULD validate device configuration values and set *perr to
+*                   NET_DEV_ERR_INVALID_CFG if unacceptible values have been specified. Fields
+*                   of interest generally include, but are not limited to :
+*
+*                   (a) pdev_cfg->RxBufPoolType :
+*
+*                       (1) NET_IF_MEM_TYPE_MAIN
+*                       (2) NET_IF_MEM_TYPE_DEDICATED
+*
+*                   (b) pdev_cfg->TxBufPoolType :
+*
+*                       (1) NET_IF_MEM_TYPE_MAIN
+*                       (2) NET_IF_MEM_TYPE_DEDICATED
+*
+*                   (c) pdev_cfg->RxBufAlignOctets
+*                   (d) pdev_cfg->TxBufAlignOctets
+*                   (e) pdev_cfg->RxBufDescNbr
+*                   (f) pdev_cfg->TxBufDescnbr
+*
+*               (8) Descriptors are typically required to be contiguous in memory.  Allocation of
+*                   descriptors MUST occur as a single contigous block of memory.  The driver may
+*                   use pointer arithmetic to sub-divide and traverse the descriptor list.
+*
+*               (9) NetDev_Init() should exit with :
+*
+*                   (a) All device interrupt source disabled. External interrupt controllers
+*                       should however be ready to accept interrupt requests.
+*                   (b) All device interrupt sources cleared.
+*                   (c) Both the receiver and transmitter disabled.
+*
+*              (10) Some drivers MAY require knowledge of the Phy configuration in order
+*                   to properly configure the MAC with the correct Phy bus mode, speed and
+*                   duplex settings.  If a driver requires access to the Phy configuration,
+*                   then the driver MUST validate the pif->Phy_Cfg pointer by checking for
+*                   a NULL pointer BEFORE attempting to access members of the Phy
+*                   configuration structure.  Phy configuration fields of interest generally
+*                   include, but are  not limited to :
+*
+*                   (a) pphy_cfg->Type :
+*
+*                       (1) NET_PHY_TYPE_INT            Phy integrated with MAC.
+*                       (2) NET_PHY_TYPE_EXT            Phy externally attached to MAC.
+*
+*                   (b) pphy_cfg->BusMode :
+*
+*                       (1) NET_PHY_BUS_MODE_MII        Phy bus mode configured to MII.
+*                       (2) NET_PHY_BUS_MODE_RMII       Phy bus mode configured to RMII.
+*                       (3) NET_PHY_BUS_MODE_SMII       Phy bus mode configured to SMII.
+*
+*                   (c) pphy_cfg->Spd :
+*
+*                       (1) NET_PHY_SPD_0               Phy link speed unknown or NOT linked.
+*                       (2) NET_PHY_SPD_10              Phy link speed configured to  10   mbit/s.
+*                       (3) NET_PHY_SPD_100             Phy link speed configured to  100  mbit/s.
+*                       (4) NET_PHY_SPD_1000            Phy link speed configured to  1000 mbit/s.
+*                       (5) NET_PHY_SPD_AUTO            Phy link speed configured for auto-negotiation.
+*
+*                   (d) pphy_cfg->Duplex :
+*
+*                       (1) NET_PHY_DUPLEX_UNKNOWN      Phy link duplex unknown or link not established.
+*                       (2) NET_PHY_DUPLEX_HALF         Phy link duplex configured to  half duplex.
+*                       (3) NET_PHY_DUPLEX_FULL         Phy link duplex configured to  full duplex.
+*                       (4) NET_PHY_DUPLEX_AUTO         Phy link duplex configured for auto-negotiation.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Init (NET_IF   *pif,
+                           NET_ERR  *perr)
+{
+    NET_DEV_BSP_ETHER  *pdev_bsp;
+    NET_PHY_CFG_ETHER  *pphy_cfg;
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    NET_BUF_SIZE        buf_size_max;
+    NET_BUF_SIZE        buf_ix;
+    CPU_SIZE_T          reqd_octets;
+    CPU_SIZE_T          nbytes;
+    LIB_ERR             lib_err;
+
+
+                                                                /* -------- OBTAIN REFERENCE TO CFGs/REGs/BSP --------- */
+    pphy_cfg = (NET_PHY_CFG_ETHER *)pif->Ext_Cfg;
+    pdev_cfg = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;
+    pdev     = (NET_DEV           *)pdev_cfg->BaseAddr;         /* Overlay dev reg struct on top of dev base addr.      */
+    pdev_bsp = (NET_DEV_BSP_ETHER *)pif->Dev_BSP;
+                                                                /* --------------- VALIDATE DEVICE CFG ---------------- */
+                                                                /* See Note #7.                                         */
+                                                                /* Validate Rx buf alignment.                           */
+    if ((pdev_cfg->RxBufAlignOctets % RX_BUF_ALIGN_OCTETS) != 0u) {
+        *perr = NET_DEV_ERR_INVALID_CFG;
+         return;
+    }
+
+                                                                /* Validate Rx buf ix offset.                           */
+    if (pdev_cfg->RxBufIxOffset != 0u) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+                                                                /* Validate Rx buf size.                                */
+    buf_ix       = NET_IF_IX_RX;
+    buf_size_max = NetBuf_GetMaxSize((NET_IF_NBR     )pif->Nbr,
+                                     (NET_TRANSACTION)NET_TRANSACTION_RX,
+                                     (NET_BUF       *)0,
+                                     (NET_BUF_SIZE   )buf_ix);
+    if (buf_size_max < NET_IF_ETHER_FRAME_MAX_SIZE) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+
+                                                                /* Validate Tx buf ix offset.                           */
+    if (pdev_cfg->TxBufIxOffset != 0u) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+
+    if (pphy_cfg == (void *)0) {
+       *perr = NET_PHY_ERR_INVALID_CFG;
+        return;
+    }
+                                                                /* Validate phy bus mode.                               */
+    if (pphy_cfg->BusMode != NET_PHY_BUS_MODE_RMII) {
+       *perr = NET_PHY_ERR_INVALID_CFG;
+        return;
+    }
+
+
+                                                                /* -------------- ALLOCATE DEV DATA AREA -------------- */
+    pif->Dev_Data = Mem_HeapAlloc((CPU_SIZE_T  ) sizeof(NET_DEV_DATA),
+                                  (CPU_SIZE_T  ) 4,
+                                  (CPU_SIZE_T *)&reqd_octets,
+                                  (LIB_ERR    *)&lib_err);
+    if (pif->Dev_Data == (void *)0) {
+       *perr = NET_DEV_ERR_MEM_ALLOC;
+        return;
+    }
+
+    pdev_data = (NET_DEV_DATA *)pif->Dev_Data;
+
+
+
+                                                                /* ------------- ENABLE NECESSARY CLOCKS -------------- */
+                                                                /* Enable module clks (see Note #2).                    */
+    pdev_bsp->CfgClk(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------- INITIALIZE EXTERNAL GPIO CONTROLLER -------- */
+                                                                /* Configure Ethernet Controller GPIO (see Note #4).    */
+    pdev_bsp->CfgGPIO(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ----- INITIALIZE EXTERNAL INTERRUPT CONTROLLER ------ */
+                                                                /* Configure ext int ctrl'r (see Note #3).              */
+    pdev_bsp->CfgIntCtrl(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* ------- ALLOCATE MEMORY FOR DMA DESCRIPTORS -------- */
+    nbytes = pdev_cfg->RxDescNbr * sizeof(DEV_DESC);            /* Determine block size.                                */
+    Mem_PoolCreate ((MEM_POOL   *)&pdev_data->RxDescPool,       /* Pass a pointer to the mem pool to create.            */
+                    (void       *) 0,                           /* From the uC/LIB Mem generic pool.                    */
+                    (CPU_SIZE_T  ) 0,                           /* Generic pool is of unknown size.                     */
+                    (CPU_SIZE_T  ) 1,                           /* Allocate 1 block.                                    */
+                    (CPU_SIZE_T  ) nbytes,                      /* Block size large enough to hold all Rx descriptors.  */
+                    (CPU_SIZE_T  ) 4,                           /* Block alignment (see Note #8).                       */
+                    (CPU_SIZE_T *)&reqd_octets,                 /* Optional, ptr to variable to store rem nbr bytes.    */
+                    (LIB_ERR    *)&lib_err);                    /* Ptr to variable to return an error code.             */
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = NET_BUF_ERR_POOL_MEM_ALLOC;
+        return;
+    }
+
+
+    nbytes = pdev_cfg->TxDescNbr * sizeof(DEV_DESC);            /* Determine block size.                                */
+    Mem_PoolCreate ((MEM_POOL   *)&pdev_data->TxDescPool,       /* Pass a pointer to the mem pool to create.            */
+                    (void       *) 0,                           /* From the uC/LIB Mem generic pool.                    */
+                    (CPU_SIZE_T  ) 0,                           /* Generic pool is of unknown size.                     */
+                    (CPU_SIZE_T  ) 1,                           /* Allocate 1 block.                                    */
+                    (CPU_SIZE_T  ) nbytes,                      /* Block size large enough to hold all Tx descriptors.  */
+                    (CPU_SIZE_T  ) 4,                           /* Block alignment (see Note #8).                       */
+                    (CPU_SIZE_T *)&reqd_octets,                 /* Optional, ptr to variable to store rem nbr bytes.    */
+                    (LIB_ERR    *)&lib_err);                    /* Ptr to variable to return an error code.             */
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = NET_BUF_ERR_POOL_MEM_ALLOC;
+        return;
+    }
+
+                                                                /* ------------- INITIALIZE DEV REGISTERS ------------- */
+    pdev->CTRL = 0;                                             /* See Note #9.                                         */
+
+
+                                                                /* ------ OPTIONALLY OBTAIN REFERENCE TO PHY CFG ------ */
+    pphy_cfg = (NET_PHY_CFG_ETHER *)pif->Ext_Cfg;               /* Obtain ptr to the phy cfg struct.                    */
+    if (pphy_cfg != (void *)0) {                                /* Cfg MAC w/ initial Phy settings.                     */
+        ;
+    }
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Start()
+*
+* Description : (1) Start network interface hardware :
+*
+*                   (a) Initialize transmit semaphore count
+*                   (b) Initialize hardware address registers
+*                   (c) Initialize receive and transmit descriptors
+*                   (d) Clear all pending interrupt sources
+*                   (e) Enable supported interrupts
+*                   (f) Enable the transmitter and receiver
+*                   (g) Start / Enable DMA if required
+*
+*
+* Argument(s) : pif         Pointer to a network interface.
+*               ---         Argument validated in NetIF_Start().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Ethernet device successfully started.
+*
+*                                                               - RETURNED BY NetIF_AddrHW_SetHandler() : --
+*                               NET_IF_ERR_NULL_PTR             Argument(s) passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT         Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_IF_ERR_INVALID_STATE        Invalid network interface state.
+*                               NET_IF_ERR_INVALID_ADDR         Invalid hardware address.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+*                                                               - RETURNED BY NetIF_DevCfgTxRdySignal() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_OS_ERR_INIT_DEV_TX_RDY_VAL  Invalid device transmit ready signal.
+*
+*                                                               ---- RETURNED BY NetDev_RxDescInit() : -----
+*
+*                                                               ---- RETURNED BY NetDev_TxDescInit() : -----
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Start() via 'pdev_api->Start()'.
+*
+* Note(s)     : (2) Many DMA devices may generate only one interrupt for several ready receive
+*                   descriptors.  In order to accommodate this, it is recommended that all DMA
+*                   based drivers count the number of ready receive descriptors during the
+*                   receive event and signal the receive task accordingly ONLY for those
+*                   NEW descriptors which have not yet been accounted for.  Each time a
+*                   descriptor is processed (or discarded) the count for acknowledged and
+*                   unprocessed frames should be decremented by 1.  This function initializes the
+*                   acknowledged receive descriptor count to 0.
+
+*               (3) Setting the maximum number of frames queued for transmission is optional.  By
+*                   default, all network interfaces are configured to block until the previous frame
+*                   has completed transmission.  However, DMA based interfaces may have several
+*                   frames configured for transmission before blocking is required. The number
+*                   of queued transmit frames depends on the number of configured transmit
+*                   descriptors.
+*
+*               (4) The physical hardware address should not be configured from NetDev_Init(). Instead,
+*                   it should be configured from within NetDev_Start() to allow for the proper use
+*                   of NetIF_Ether_HW_AddrSet(), hard coded hardware addresses from the device
+*                   configuration structure, or auto-loading EEPROM's. Changes to the physical address
+*                   only take effect when the device transitions from the DOWN to UP state.
+*
+*               (5) The device hardware address is set from one of the data sources below. Each source
+*                   is listed in the order of precedence.
+*
+*                   (a) Device Configuration Structure       Configure a valid HW address during
+*                                                                compile time.
+*
+*                                                            Configure either "00:00:00:00:00:00" or
+*                                                                an empty string, "", in order to
+*                                                                configure the HW address using using
+*                                                                method (b).
+*
+*                   (b) NetIF_Ether_HW_AddrSet()             Call NetIF_Ether_HW_AddrSet() if the HW
+*                                                                address needs to be configured via
+*                                                                run-time from a different data
+*                                                                source. E.g. Non auto-loading
+*                                                                memory such as I2C or SPI EEPROM.
+*                                                               (see Note #3).
+*
+*                   (c) Auto-Loading via EEPROM.             If neither options a) or b) are used,
+*                                                                the IF layer will use the HW address
+*                                                                obtained from the network hardware
+*                                                                address registers.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Start (NET_IF   *pif,
+                            NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    CPU_INT08U          hw_addr[NET_IF_ETHER_ADDR_SIZE];
+    CPU_INT08U          hw_addr_len;
+    CPU_BOOLEAN         hw_addr_cfg;
+    NET_ERR             err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ---------------- CFG TX RDY SIGNAL ----------------- */
+    NetIF_DevCfgTxRdySignal(pif,                                /* See Note #3.                                         */
+                            pdev_cfg->TxDescNbr,
+                            perr);
+    if (*perr != NET_IF_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* ------------------- CFG HW ADDR -------------------- */
+    hw_addr_cfg = DEF_NO;                                       /* See Notes #4 & #5.                                   */
+
+    NetASCII_Str_to_MAC(pdev_cfg->HW_AddrStr,                   /* Get configured HW MAC address string, if any ...     */
+                       &hw_addr[0],                             /* ... (see Note #5a).                                  */
+                       &err);
+    if (err == NET_ASCII_ERR_NONE) {
+        NetIF_AddrHW_SetHandler((NET_IF_NBR  ) pif->Nbr,
+                                (CPU_INT08U *)&hw_addr[0],
+                                (CPU_INT08U  ) sizeof(hw_addr),
+                                (NET_ERR    *)&err);
+    }
+
+    if (err == NET_IF_ERR_NONE) {                               /* If no errors, configure device    HW MAC address.    */
+        hw_addr_cfg = DEF_YES;
+
+    } else {                                                    /* Else get  app-configured IF layer HW MAC address, ...*/
+                                                                /* ... if any (see Note #5b).                           */
+        hw_addr_len = sizeof(hw_addr);
+        NetIF_AddrHW_GetHandler(pif->Nbr, &hw_addr[0], &hw_addr_len, &err);
+        if (err == NET_IF_ERR_NONE) {
+            hw_addr_cfg  = NetIF_AddrHW_IsValidHandler(pif->Nbr, &hw_addr[0], &err);
+        } else {
+            hw_addr_cfg  = DEF_NO;
+        }
+
+        if (hw_addr_cfg != DEF_YES) {                           /* Else attempt to get device's automatically loaded ...*/
+                                                                /* ... HW MAC address, if any (see Note #5c).           */
+            hw_addr[0] = (pdev->IAL >> (0 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+            hw_addr[1] = (pdev->IAL >> (1 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+            hw_addr[2] = (pdev->IAL >> (2 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+            hw_addr[3] = (pdev->IAL >> (3 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+
+            hw_addr[4] = (pdev->IAH >> (0 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+            hw_addr[5] = (pdev->IAH >> (1 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+
+            NetIF_AddrHW_SetHandler((NET_IF_NBR  ) pif->Nbr,    /* Configure IF layer to use automatically-loaded ...   */
+                                    (CPU_INT08U *)&hw_addr[0],  /* ... HW MAC address.                                  */
+                                    (CPU_INT08U  ) sizeof(hw_addr),
+                                    (NET_ERR    *) perr);
+            if (*perr != NET_IF_ERR_NONE) {                     /* No valid HW MAC address configured, return error.    */
+                 return;
+            }
+        }
+    }
+
+    if (hw_addr_cfg == DEF_YES) {                               /* If necessary, set device HW MAC address.             */
+        pdev->IAL = (((CPU_INT32U)hw_addr[0] << (0 * DEF_INT_08_NBR_BITS)) |
+                     ((CPU_INT32U)hw_addr[1] << (1 * DEF_INT_08_NBR_BITS)) |
+                     ((CPU_INT32U)hw_addr[2] << (2 * DEF_INT_08_NBR_BITS)) |
+                     ((CPU_INT32U)hw_addr[3] << (3 * DEF_INT_08_NBR_BITS)));
+
+        pdev->IAH = (((CPU_INT32U)hw_addr[4] << (0 * DEF_INT_08_NBR_BITS)) |
+                     ((CPU_INT32U)hw_addr[5] << (1 * DEF_INT_08_NBR_BITS)));
+    }
+
+
+                                                                /* --------------- INIT DMA DESCRIPTORS --------------- */
+    NetDev_RxDescInit(pif, perr);                               /* Initialize Rx descriptors.                           */
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+    pdev_data->RxNRdyCtr = 0;                                   /* No pending frames to process (see Note #3).          */
+
+
+    NetDev_TxDescInit(pif, perr);                               /* Initialize Tx descriptors.                           */
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* -------------------- CFG INT'S --------------------- */
+    pdev->ISR  |= INT_STATUS_MASK_ALL;                          /* Clear all pending int. sources.                      */
+    pdev->IER  |= INT_STATUS_MASK_SUPPORTED;                    /* Enable Rx, Tx and other supported int. sources.      */
+
+
+                                                                /* ------------------ ENABLE RX & TX ------------------ */
+    pdev->CTRL |= CTRL_TX_EN  |                                 /* Enable transmitter & receiver.                       */
+                  CTRL_RX_EN;
+
+                                                                /* ----------------- START DMA FETCH ------------------ */
+                                                                /* Start DMA if required.                               */
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Stop()
+*
+* Description : (1) Shutdown network interface hardware :
+*
+*                   (a) Disable the receiver and transmitter
+*                   (b) Disable receive and transmit interrupts
+*                   (c) Clear pending interrupt requests
+*                   (d) Free ALL receive descriptors (Return ownership to hardware)
+*                   (e) Deallocate ALL transmit buffers
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE    No Error
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Stop() via 'pdev_api->Stop()'.
+*
+* Note(s)     : (2) (a) (1) It is recommended that a device driver should only post all currently-used,
+*                           i.e. not-fully-transmitted, transmit buffers to the network interface transmit
+*                           deallocation queue.
+*
+*                       (2) However, a driver MAY attempt to post all queued &/or transmitted buffers.
+*                           The network interface transmit deallocation task will silently ignore any
+*                           unknown or duplicate transmit buffers.  This allows device drivers to
+*                           indiscriminately & easily post all transmit buffers without determining
+*                           which buffers have NOT yet been transmitted.
+*
+*                   (b) (1) Device drivers should assume that the network interface transmit deallocation
+*                           queue is large enough to post all currently-used transmit buffers.
+*
+*                       (2) If the transmit deallocation queue is NOT large enough to post all transmit
+*                           buffers, some transmit buffers may/will be leaked/lost.
+*
+*               (3) All functions that require device register access MUST obtain reference to the
+*                   device hardware register space PRIOR to attempting to access any registers.
+*                   Register definitions SHOULD NOT be absolute & SHOULD use the provided base
+*                   address within the device configuration structure, as well as the device
+*                   register definition structure in order to properly resolve register addresses
+*                   during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Stop (NET_IF   *pif,
+                           NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_INT08U          i;
+    NET_ERR             err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ----------------- DISABLE RX & TX ------------------ */
+    pdev->CTRL &= ~(CTRL_TX_EN  |                               /* Disable transmitter & receiver.                      */
+                    CTRL_RX_EN);
+
+                                                                /* -------------- DISABLE & CLEAR INT'S --------------- */
+    pdev->IER  &=  ~INT_STATUS_MASK_SUPPORTED;                  /* Disable Rx, Tx and other supported int. sources.     */
+    pdev->ISR  &=  ~INT_STATUS_MASK_ALL;                        /* Clear all pending int. sources.                      */
+
+
+                                                                /* --------------- FREE RX DESCRIPTORS ---------------- */
+    NetDev_RxDescFreeAll(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------- FREE USED TX DESCRIPTORS ------------- */
+    pdesc = &pdev_data->TxBufDescPtrStart[0];
+    for (i = 0; i < pdev_cfg->TxDescNbr; i++) {
+        if ((pdesc->DMA_Status & TX_BUF_STATUS) == USED) {      /* If NOT yet  tx'd, ...                                */
+                                                                /* ... dealloc tx buf (see Note #2a1).                  */
+            NetIF_TxDeallocTaskPost((CPU_INT08U *)pdesc->DMA_Addr, &err);
+           (void)&err;                                          /* Ignore possible dealloc err (see Note #2b2).         */
+        }
+        pdesc++;
+    }
+
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Rx()
+*
+* Description : (1) This function returns a pointer to the received data to the caller :
+*                   (a) Decrement frame counter
+*                   (b) Determine which receive descriptor caused the interrupt
+*                   (c) Obtain pointer to data area to replace existing data area
+*                   (d) Reconfigure descriptor with pointer to new data area
+*                   (e) Set return values.  Pointer to received data area and size
+*                   (f) Update current receive descriptor pointer
+*                   (g) Increment statistic counters
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               p_data  Pointer to pointer to received DMA data area. The received data
+*                       area address should be returned to the stack by dereferencing
+*                       p_data as *p_data = (address of receive data area).
+*
+*               size    Pointer to size. The number of bytes received should be returned
+*                       to the stack by dereferencing size as *size = (number of bytes).
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE            No Error
+*                           NET_DEV_ERR_RX              Generic Rx error.
+*                           NET_DEV_ERR_INVALID_SIZE    Invalid Rx frame size.
+*                           NET_BUF error codes         Potential NET_BUF error codes
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt() via 'pdev_api->Rx()'.
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) If a receive error occurs and the descriptor is invalid then the function
+*                   SHOULD return 0 for the size, a NULL pointer to the data area AND an
+*                   error equal to NET_DEV_ERR_RX.
+*
+*                   (a) If the next expected ready / valid descriptor is NOT owned by
+*                       software, then there is descriptor pointer corruption and the
+*                       driver should NOT increment the current receive descriptor
+*                       pointer.
+*                   (b) If the descriptor IS valid, but an error is indicated within
+*                       the descriptor status bits, or length field, then the driver
+*                       MUST increment the current receive descriptor pointer and discard
+*                       the received frame.
+*                   (c) If a new data area is unavailable, the driver MUST increment
+*                       the current receive descriptor pointer and discard the received
+*                       frame.  This will invoke the DMA to re-use the existing configured
+*                       data area.
+*
+*               (4) Some devices optionally include each receive packet's CRC in the received
+*                   packet data & size.
+*
+*                   (a) CRCs might optionally be included at run-time or at build time. Each
+*                       driver doesn't necessarily need to conditionally include or exclude
+*                       the CRC at build time.  Instead, a device may include/exclude the code
+*                       to subtract the CRC size from the packet size.
+*
+*                   (b) The CRC size should be subtracted from the receive packet size ONLY if
+*                       the CRC was included in the received packet data.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Rx (NET_IF       *pif,
+                         CPU_INT08U  **p_data,
+                         CPU_INT16U   *size,
+                         NET_ERR      *perr)
+{
+    NET_DEV_DATA       *pdev_data;
+    DEV_DESC           *pdesc;
+    CPU_INT08U         *pbuf_new;
+    CPU_BOOLEAN         rx_crc;
+    CPU_INT16U          rx_len;
+    CPU_SR_ALLOC();
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE CFG/DATA -------- */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdesc     = (DEV_DESC          *)pdev_data->RxBufDescPtrCur;/* Obtain ptr to next ready descriptor.                 */
+
+
+                                                                /* --------------- DECREMENT FRAME CNT ---------------- */
+    CPU_CRITICAL_ENTER();                                       /* Disable interrupts to alter shared data.             */
+    if (pdev_data->RxNRdyCtr > 0) {                             /* One less frame to process.                           */
+        pdev_data->RxNRdyCtr--;
+    }
+    CPU_CRITICAL_EXIT();
+
+                                                                /* ------------- CHECK FOR RECEIVE ERRORS ------------- */
+    if ((pdesc->DMA_Status & DESC_VALID_MSK) > 0) {             /* See Note #3a.                                        */
+        *size   = (CPU_INT16U  )0;
+        *p_data = (CPU_INT08U *)0;
+        *perr   = (NET_ERR     )NET_DEV_ERR_RX;
+         return;
+    }
+
+                                                                /* --------------- OBTAIN FRAME LENGTH ---------------- */
+    rx_len = (CPU_INT16U)pdesc->DMA_Status & 0x07FF;
+#if   (DEV_CFG_RX_CRC_EN == DEV_RX_CRC_OPT)                     /* See Note #4.                                         */
+    rx_crc =  DEF_BIT_IS_SET(pdesc->DMA_Ctrl CTRL_RX_CRC_EN, CTRL_RX_CRC_EN);
+#elif (DEV_CFG_RX_CRC_EN == DEV_RX_CRC_EN)
+    rx_crc =  DEF_YES;
+#else
+    rx_crc =  DEF_NO;
+#endif
+    if (rx_crc == DEF_YES) {                                    /* If opt to rx CRC into pkt en'd, ...                  */
+        rx_len -= NET_IF_ETHER_FRAME_CRC_SIZE;                  /* ... sub CRC size from pkt (see Note #4b).            */
+    }
+    if (rx_len <  NET_IF_ETHER_FRAME_MIN_SIZE) {                /* If frame is a runt, ...                              */
+        NetDev_RxDescPtrCurInc(pif);                            /* ... discard rx'd frame    (see Note #3b).            */
+        NET_CTR_ERR_INC(pdev_data->ErrRxPktDiscardedCtr);
+       *size   = (CPU_INT16U  )0;
+       *p_data = (CPU_INT08U *)0;
+       *perr   = (NET_ERR     )NET_DEV_ERR_INVALID_SIZE;
+        return;
+    }
+
+
+                                                                /* --------- OBTAIN PTR TO NEW DMA DATA AREA ---------- */
+                                                                /* Request an empty buffer.                             */
+    pbuf_new = NetBuf_GetDataPtr(pif,
+                                 NET_TRANSACTION_RX,
+                                 NET_IF_ETHER_FRAME_MAX_SIZE,
+                                 NET_IF_IX_RX,
+                                 0,
+                                 0,
+                                 DEF_NULL,
+                                 perr);
+
+    if (*perr != NET_BUF_ERR_NONE) {                            /* If unable to get a buffer (see Note #3c).            */
+         NetDev_RxDescPtrCurInc(pif);                           /* Free the current descriptor.                         */
+        *size   = (CPU_INT16U  )0;
+        *p_data = (CPU_INT08U *)0;
+         return;
+    }
+
+   *size   =  rx_len;                                           /* Return the size of the received frame.               */
+   *p_data = (CPU_INT08U *)pdesc->DMA_Addr;                     /* Return a pointer to the newly received data area.    */
+
+    pdesc->DMA_Addr = (CPU_INT32U)pbuf_new;                     /* Update the descriptor to point to a new data area    */
+
+    NetDev_RxDescPtrCurInc(pif);                                /* Free the current descriptor.                         */
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Tx()
+*
+* Description : (1) This function transmits the specified data :
+*
+*                   (a) Check if the transmitter is ready.
+*                   (b) Configure the next transmit descriptor for pointer to data and data size.
+*                   (c) Issue the transmit command.
+*                   (d) Increment pointer to next transmit descriptor
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               p_data  Pointer to data to transmit.
+*
+*               size    Size    of data to transmit.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No Error
+*                           NET_DEV_ERR_TX_BUSY     No Tx descriptors available
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPkt() via 'pdev_api->Tx()'.
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) Care should be taken to avoid skipping transmit descriptors while selecting
+*                   the next available descriptor.  Software MUST track the descriptor which
+*                   is expected to generate the next transmit complete interrupt.  Skipping
+*                   descriptors, unless carefully accounted for, may make it difficult to
+*                   know which descriptor will complete transmission next.  Some device
+*                   drivers may find it useful to adjust pdev_data->TxBufDescCompPtr after
+*                   having selected the next available transmit descriptor.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Tx (NET_IF      *pif,
+                         CPU_INT08U  *p_data,
+                         CPU_INT16U   size,
+                         NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_INT32U          desc_status;
+    CPU_SR_ALLOC();
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+    pdesc     = (DEV_DESC          *)pdev_data->TxBufDescPtrCur;/* Obtain ptr to next available Tx descriptor.          */
+
+    CPU_CRITICAL_ENTER();                                       /* This routine reads shared data. Disable interrupts!  */
+    desc_status = pdesc->DMA_Status;
+    CPU_CRITICAL_EXIT();                                        /* Enable interrupts.                                   */
+
+    if (desc_status & DESC_OWNED_BY_SW_MASK) {                  /* Find next available Tx descriptor (see Note #3).     */
+        pdesc->DMA_Addr   = (CPU_INT32U)p_data;                 /* Configure descriptor with Tx data area address.      */
+        pdesc->DMA_Status =  size;                              /* Configure descriptor with Tx data size.              */
+
+        pdev->CTRL = 1;                                         /* Instruct DMA to transmit descriptor data.            */
+
+                                                                /* Update curr desc ptr to point to next desc.          */
+        if (pdev_data->TxBufDescPtrCur != pdev_data->TxBufDescPtrEnd) {
+            pdev_data->TxBufDescPtrCur++;
+        } else {
+            pdev_data->TxBufDescPtrCur  = pdev_data->TxBufDescPtrStart;
+        }
+
+       *perr = NET_DEV_ERR_NONE;
+    } else {
+       *perr = NET_DEV_ERR_TX_BUSY;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetDev_AddrMulticastAdd()
+*
+* Description : Configure hardware address filtering to accept specified hardware address.
+*
+* Argument(s) : pif         Pointer to an Ethernet network interface.
+*               ---         Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               paddr_hw    Pointer to hardware address.
+*               --------    Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_len    Length  of hardware address.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Hardware address successfully configured.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'len' passed equal to 0.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_AddrMulticastAdd() via 'pdev_api->AddrMulticastAdd()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_AddrMulticastAdd (NET_IF      *pif,
+                                       CPU_INT08U  *paddr_hw,
+                                       CPU_INT08U   addr_hw_len,
+                                       NET_ERR     *perr)
+{
+#ifdef  NET_MCAST_MODULE_EN
+#endif
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetDev_AddrMulticastRemove()
+*
+* Description : Configure hardware address filtering to reject specified hardware address.
+*
+* Argument(s) : pif         Pointer to an Ethernet network interface.
+*               ---         Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               paddr_hw    Pointer to hardware address.
+*               --------    Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_len    Length  of hardware address.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Hardware address successfully removed.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'len' passed equal to 0.
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_AddrMulticastAdd() via 'pdev_api->AddrMulticastRemove()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_AddrMulticastRemove (NET_IF      *pif,
+                                          CPU_INT08U  *paddr_hw,
+                                          CPU_INT08U   addr_hw_len,
+                                          NET_ERR     *perr)
+{
+#ifdef  NET_MCAST_MODULE_EN
+#endif
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_ISR_Handler()
+*
+* Description : This function serves as the device Interrupt Service Routine Handler. This ISR
+*               handler MUST service and clear all necessary and enabled interrupt events for
+*               the device.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*               ---
+*
+*               type    Network Interface defined argument representing the type of ISR in progress. Codes
+*                       for Rx, Tx, Overrun, Jabber, etc... are defined within net_if.h and are passed
+*                       into this function by the corresponding Net BSP ISR handler function. The Net
+*                       BSP ISR handler function may be called by a specific ISR vector and therefore
+*                       know which ISR type code to pass.  Otherwise, the Net BSP may pass
+*                       NET_DEV_ISR_TYPE_UNKNOWN and the device driver MAY ignore the parameter when
+*                       the ISR type can be deduced by reading an available interrupt status register.
+*
+*                       Type codes that are defined within net_if.c include but are not limited to :
+*                           NET_DEV_ISR_TYPE_RX
+*                           NET_DEV_ISR_TYPE_TX_COMPLETE
+*                           NET_DEV_ISR_TYPE_UNKNOWN
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Specific first- or second-level BSP ISR handler.
+*
+* Note(s)     : (1) This function is called via function pointer from the context of an ISR.
+*
+*               (2) In the case of an interrupt occurring prior to Network Protocol Stack initialization,
+*                   the device driver should ensure that the interrupt source is cleared in order
+*                   to prevent the potential for an infinite interrupt loop during system initialization.
+*
+*               (3) Many DMA devices generate only one interrupt event for several ready receive
+*                   descriptors.  In order to accommodate this, it is recommended that all DMA based
+*                   drivers count the number of ready receive descriptors during the receive event
+*                   and signal the receive task for ONLY newly received descriptors which have not
+*                   yet been signaled for during the last receive interrupt event.
+*
+*               (4) Many DMA devices generate only one interrupt event for several transmit
+*                   complete descriptors.  In this case, the driver MUST determine which descriptors
+*                   have completed transmission and post each descriptor data area address to
+*                   the transmit deallocation task.  The code provided below assumes one
+*                   interrupt per transmit event which may not necessarily be the case for all
+*                   devices.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_ISR_Handler (NET_IF            *pif,
+                                  NET_DEV_ISR_TYPE   type)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    CPU_DATA            reg_val;
+    CPU_INT16U          n_rdy;
+    CPU_INT16U          n_new;
+    CPU_INT16U          i;
+    CPU_INT08U         *p_data;
+    NET_ERR             err;
+
+
+   (void)&type;                                                 /* Prevent 'variable unused' compiler warning.          */
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* --------------- DETERMINE ISR TYPE ----------------- */
+    reg_val = pdev->ISR;
+
+                                                                /* ------------------ HANDLE RX ISRs ------------------ */
+    if ((reg_val & RX_ISR_EVENT_MSK) > 0) {
+        n_rdy = 0;
+        pdesc = pdev_data->RxBufDescPtrStart;
+        for (i = 0; i < pdev_cfg->RxDescNbr; i++) {             /* Count nbr of ready descriptors.                      */
+            if (pdesc->DMA_Status & DESC_OWNED_BY_SW_MASK) {
+                n_rdy++;
+            }
+
+            pdesc++;
+        }
+
+        n_new = n_rdy - pdev_data->RxNRdyCtr;                   /* Determine how many descriptors have become ready ... */
+                                                                /* ... since last count of ready descriptors        ... */
+                                                                /* ... (see Note #3).                                   */
+
+        while (n_new > 0) {
+            NetIF_RxTaskSignal(pif->Nbr, &err);                 /* Signal Net IF RxQ Task for each new rdy descriptor.  */
+            switch (err) {
+                case NET_IF_ERR_NONE:
+                     if (pdev_data->RxNRdyCtr < pdev_cfg->RxBufLargeNbr) {
+                         pdev_data->RxNRdyCtr++;
+                     }
+                     n_new--;
+                     break;
+
+                case NET_IF_ERR_RX_Q_FULL:
+                case NET_IF_ERR_RX_Q_SIGNAL_FAULT:
+                default:
+                     n_new = 0;                                 /* Break loop to prevent further posting when Q full.   */
+                     break;
+            }
+        }
+
+        pdev->ISR |= RX_ISR_EVENT_MSK;                          /* Clear device Rx interrupt event flag.                */
+    }
+
+
+                                                                /* ------------------ HANDLE TX ISRs ------------------ */
+    if ((reg_val & TX_ISR_EVENT_MSK) > 0) {
+         pdesc = pdev_data->TxBufDescCompPtr;
+         p_data = (CPU_INT08U *)pdesc->DMA_Addr;
+         NetIF_TxDeallocTaskPost(p_data, &err);
+         NetIF_DevTxRdySignal(pif);                             /* Signal Net IF that Tx resources are available.       */
+         if (pdev_data->TxBufDescCompPtr != pdev_data->TxBufDescPtrEnd) {
+             pdev_data->TxBufDescCompPtr++;
+         } else {
+             pdev_data->TxBufDescCompPtr = pdev_data->TxBufDescPtrStart;
+         }
+
+         pdev->ISR |= TX_ISR_EVENT_MSK;                         /* Clear device Tx interrupt event flag.                */
+    }
+
+
+                                                                /* ---------------- HANDLE MISC ISRs ------------------ */
+    pdev->ISR |= UNHANDLED_ISR_EVENT_MASK;                      /* Clear unhandled interrupt event flag.                */
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_IO_Ctrl()
+*
+* Description : This function provides a mechanism for the Phy driver to update the MAC link
+*               and duplex settings, as well as a method for the application and link state
+*               timer to obtain the current link status.  Additional user specified driver
+*               functionality MAY be added if necessary.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*
+*               opt     Option code representing desired function to perform. The Network Protocol Suite
+*                       specifies the option codes below. Additional option codes may be defined by the
+*                       driver developer in the driver's header file.
+*                           NET_IF_IO_CTRL_LINK_STATE_GET
+*                           NET_IF_IO_CTRL_LINK_STATE_UPDATE
+*
+*                       Driver defined operation codes MUST be defined starting from 20 or higher
+*                       to prevent clashing with the pre-defined operation code types. See the
+*                       device driver header file for more details.
+*
+*               data    Pointer to optional data for either sending or receiving additional function
+*                       arguments or return data.
+*
+*               perr    Pointer to return error code.
+*                           NET_IF_ERR_INVALID_IO_CTRL_OPT      Invalid option number specified.
+*                           NET_ERR_FAULT_NULL_FNCT             Null interface function pointer encountered.
+*
+*                           NET_DEV_ERR_NONE                    IO Ctrl operation completed successfully.
+*                           NET_DEV_ERR_NULL_PTR                Null argument pointer passed.
+*
+*                           NET_PHY_ERR_NULL_PTR                Pointer argument(s) passed NULL pointer(s).
+*                           NET_PHY_ERR_TIMEOUT_RESET           Phy reset          time-out.
+*                           NET_PHY_ERR_TIMEOUT_AUTO_NEG        Auto-Negotiation   time-out.
+*                           NET_PHY_ERR_TIMEOUT_REG_RD          Phy register read  time-out.
+*                           NET_PHY_ERR_TIMEOUT_REG_WR          Phy register write time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IO_CtrlHandler() via 'pdev_api->IO_Ctrl()',
+*               NetPhy_LinkStateGet()        via 'pdev_api->IO_Ctrl()'.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_IO_Ctrl (NET_IF      *pif,
+                              CPU_INT08U   opt,
+                              void        *p_data,
+                              NET_ERR     *perr)
+{
+    NET_DEV_LINK_ETHER  *plink_state;
+    NET_DEV_CFG_ETHER   *pdev_cfg;
+    NET_DEV             *pdev;
+    NET_PHY_API_ETHER   *pphy_api;
+    CPU_INT16U           duplex;
+    CPU_INT16U           spd;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* ----------- PERFORM SPECIFIED OPERATION ------------ */
+    switch (opt) {
+        case NET_IF_IO_CTRL_LINK_STATE_GET_INFO:
+             plink_state = (NET_DEV_LINK_ETHER *)p_data;
+             if (plink_state == (NET_DEV_LINK_ETHER *)0) {
+                *perr = NET_DEV_ERR_NULL_PTR;
+                 return;
+             }
+             pphy_api = (NET_PHY_API_ETHER *)pif->Ext_API;
+             if (pphy_api == (void *)0) {
+                *perr = NET_ERR_FAULT_NULL_FNCT;
+                 return;
+             }
+             pphy_api->LinkStateGet(pif, plink_state, perr);
+             if (*perr != NET_PHY_ERR_NONE) {
+                  return;
+             }
+            *perr = NET_DEV_ERR_NONE;
+             break;
+
+
+        case NET_IF_IO_CTRL_LINK_STATE_UPDATE:
+             plink_state = (NET_DEV_LINK_ETHER *)p_data;
+
+             duplex = NET_PHY_DUPLEX_UNKNOWN;
+             if (plink_state->Duplex != duplex) {
+                 switch (plink_state->Duplex) {                 /* TODO Update duplex register setting on device.       */
+                    case NET_PHY_DUPLEX_FULL:
+                         pdev->CTRL |=  0x01;                   /* Example device reg write to update link duplex.      */
+                         break;
+
+                    case NET_PHY_DUPLEX_HALF:
+                         pdev->CTRL &= ~0x01;                   /* Example device reg write to update link duplex.      */
+                         break;
+
+                    default:
+                         break;
+                 }
+             }
+
+             spd = NET_PHY_SPD_0;
+             if (plink_state->Spd != spd) {
+                 switch (plink_state->Spd) {                    /* TODO Update speed register setting on device.        */
+                    case NET_PHY_SPD_10:
+                         pdev->CTRL &= ~0x10;                   /* Example device reg write to update MAC link spd.     */
+                         break;
+
+                    case NET_PHY_SPD_100:
+                         pdev->CTRL |=  0x10;                   /* Example device reg write to update MAC link spd.     */
+                         break;
+
+                    case NET_PHY_SPD_1000:
+                         break;
+
+                    default:
+                         break;
+                 }
+             }
+            *perr = NET_DEV_ERR_NONE;
+             break;
+
+
+        default:
+            *perr = NET_IF_ERR_INVALID_IO_CTRL_OPT;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_MII_Rd()
+*
+* Description : Write data over the (R)MII bus to the specified Phy register.
+*
+* Argument(s) : pif         Pointer to the interface requiring service.
+*
+*               phy_addr   (R)MII bus address of the Phy requiring service.
+*
+*               reg_addr    Phy register number to write to.
+*
+*               p_data      Pointer to variable to store returned register data.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NULL_PTR            Pointer argument(s) passed NULL pointer(s).
+*                           NET_PHY_ERR_NONE                MII write completed successfully.
+*                           NET_PHY_ERR_TIMEOUT_REG_RD      Register read time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various Phy functions.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_MII_Rd (NET_IF      *pif,
+                             CPU_INT08U   phy_addr,
+                             CPU_INT08U   reg_addr,
+                             CPU_INT16U  *p_data,
+                             NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV            *pdev;
+    CPU_INT32U          timeout;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_data == (CPU_INT16U *)0) {
+       *perr    =  NET_DEV_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ------------ PERFORM MII READ OPERATION ------------ */
+   (void)&pdev;                                                 /* Prevent possible 'variable unused' warnings.         */
+   (void)&timeout;
+
+   *perr = NET_PHY_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_MII_Wr()
+*
+* Description : Write data over the (R)MII bus to the specified Phy register.
+*
+* Argument(s) : pif         Pointer to the interface requiring service.
+*
+*               phy_addr   (R)MII bus address of the Phy requiring service.
+*
+*               reg_addr    Phy register number to write to.
+*
+*               data        Data to write to the specified Phy register.
+*
+*               perr    Pointer to return error code.
+*                           NET_PHY_ERR_NONE                MII write completed successfully.
+*                           NET_PHY_ERR_TIMEOUT_REG_WR      Register write time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various Phy functions.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_MII_Wr (NET_IF      *pif,
+                             CPU_INT08U   phy_addr,
+                             CPU_INT08U   reg_addr,
+                             CPU_INT16U   data,
+                             NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV            *pdev;
+    CPU_INT32U          timeout;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ------------ PERFORM MII READ OPERATION ------------ */
+   (void)&pdev;                                                 /* Prevent possible 'variable unused' warnings.         */
+   (void)&timeout;
+
+   *perr = NET_PHY_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_RxDescInit()
+*
+* Description : (1) This function initializes the Rx descriptor list for the specified interface :
+*                   (a) Obtain reference to the Rx descriptor(s) memory block
+*                   (b) Initialize Rx descriptor pointers
+*                   (c) Obtain Rx descriptor data areas
+*                   (d) Initialize hardware registers
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No error
+*                           NET_IF_MGR_ERR_nnnn     Various Network Interface management error codes
+*                           NET_BUF_ERR_nnn         Various Network buffer error codes
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Start().
+*
+* Note(s)     : (2) Memory allocation for the descriptors MUST be performed BEFORE calling this
+*                   function. This ensures that multiple calls to this function do NOT allocate
+*                   additional memory to the interface and that the Rx descriptors may be safely
+*                   re-initialized by calling this function.
+*
+*               (3) All Rx descriptors are allocated as ONE memory block.  This removes the
+*                   necessity to ensure that descriptor blocks are returned to the descriptor
+*                   pool in the opposite order in which they were allocated; doing so would
+*                   ensure that each memory block address was contiguous to the one before
+*                   and after it.  If the descriptors are NOT contiguous, then software
+*                   MUST NOT assign a pointer to the pool start address and use pointer
+*                   arithmetic to navigate the descriptor list.  Since pointer arithmetic
+*                   is a convenient way to navigate the descriptor list, ONE block is allocated
+*                   and the driver uses pointer arithmetic to slice the block into descriptor
+*                   sized units.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_RxDescInit (NET_IF   *pif,
+                                 NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    MEM_POOL           *pmem_pool;
+    DEV_DESC           *pdesc;
+    LIB_ERR             lib_err;
+    CPU_SIZE_T          nbytes;
+    CPU_INT16U          i;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* -------------- ALLOCATE DESCRIPTORS  --------------- */
+                                                                /* See Note #3.                                         */
+    pmem_pool = &pdev_data->RxDescPool;
+    nbytes    =  pdev_cfg->RxDescNbr * sizeof(DEV_DESC);
+    pdesc     = (DEV_DESC *)Mem_PoolBlkGet((MEM_POOL *) pmem_pool,
+                                           (CPU_SIZE_T) nbytes,
+                                           (LIB_ERR  *)&lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = NET_ERR_FAULT_MEM_ALLOC;
+        return;
+    }
+                                                                /* -------------- INIT DESCRIPTOR PTRS  --------------- */
+    pdev_data->RxBufDescPtrStart = (DEV_DESC *)pdesc;
+    pdev_data->RxBufDescPtrCur   = (DEV_DESC *)pdesc;
+    pdev_data->RxBufDescPtrEnd   = (DEV_DESC *)pdesc + (pdev_cfg->RxDescNbr - 1);
+
+                                                                /* --------------- INIT RX DESCRIPTORS ---------------- */
+    for (i = 0; i < pdev_cfg->RxDescNbr; i++) {
+        pdesc->DMA_Status =  0;
+        pdesc->DMA_Addr   = (CPU_REG32)NetBuf_GetDataPtr(pif,
+                                                         NET_TRANSACTION_RX,
+                                                         NET_IF_ETHER_FRAME_MAX_SIZE,
+                                                         NET_IF_IX_RX,
+                                                         0,
+                                                         0,
+                                                         DEF_NULL,
+                                                         perr);
+        if (*perr != NET_BUF_ERR_NONE) {
+             return;
+        }
+
+        if (pdesc == (pdev_data->RxBufDescPtrEnd)) {            /* Set WRAP bit on last descriptor in list.             */
+            pdesc->DMA_Addr |= DESC_WRAP_BIT_MASK;
+        }
+
+        pdesc++;                                                /* Point to next descriptor in list.                    */
+    }
+
+                                                                /* ------------- INIT HARDWARE REGISTERS -------------- */
+                                                                /* Configure the DMA with the Rx desc start address.    */
+    pdev->DMA_RX_START_ADDR = (CPU_INT32U)pdev_data->RxBufDescPtrStart;
+
+    *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetDev_RxDescFreeAll()
+*
+* Description : (1) This function returns the descriptor memory block and descriptor data area
+*                   memory blocks back to their respective memory pools :
+*
+*                   (a) Free Rx descriptor data areas
+*                   (b) Free Rx descriptor memory block
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No error
+*                           NET_IF_MGR_ERR_nnnn     Various Network Interface management error codes
+*                           NET_BUF_ERR_nnn         Various Network buffer error codes
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Stop().
+*
+* Note(s)     : (2) No mechanism exists to free a memory pool.  However, ALL receive buffers
+*                   and the Rx descriptor blocks MUST be returned to their respective pools.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_RxDescFreeAll(NET_IF   *pif,
+                                   NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    MEM_POOL           *pmem_pool;
+    DEV_DESC           *pdesc;
+    LIB_ERR             lib_err;
+    CPU_INT16U          i;
+    CPU_INT08U         *pdesc_data;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE CFG/DATA -------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+
+
+                                                                /* ------------- FREE RX DESC DATA AREAS -------------- */
+    pmem_pool = &pdev_data->RxDescPool;
+    pdesc     =  pdev_data->RxBufDescPtrStart;
+    for (i = 0; i < pdev_cfg->RxDescNbr; i++) {                 /* Free Rx descriptor ring.                             */
+        pdesc_data = (CPU_INT08U *)(pdesc->DMA_Addr);
+        NetBuf_FreeBufDataAreaRx(pif->Nbr, pdesc_data);         /* Return data area to Rx data area pool.               */
+        pdesc++;
+    }
+
+                                                                /* ---------------- FREE RX DESC BLOCK ---------------- */
+    Mem_PoolBlkFree( pmem_pool,                                 /* Return Rx descriptor block to Rx descriptor pool.    */
+                     pdev_data->RxBufDescPtrStart,
+                    &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = NET_ERR_FAULT_MEM_ALLOC;
+        return;
+    }
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetDev_RxDescPtrCurInc()
+*
+* Description : (1) Increment current descriptor pointer to next receive descriptor :
+*
+*                   (a) Return ownership of current descriptor back to DMA.
+*                   (b) Point to the next descriptor.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*               ---
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_RxDescPtrCurInc (NET_IF *pif)
+{
+    NET_DEV_DATA  *pdev_data;
+    DEV_DESC      *pdesc;
+
+                                                                /* --------- OBTAIN REFERENCE TO DEVICE DATA ---------- */
+    pdev_data = (NET_DEV_DATA *)pif->Dev_Data;                  /* Obtain ptr to dev data area.                         */
+
+
+    pdesc = pdev_data->RxBufDescPtrCur;                         /* Obtain pointer to current Rx descriptor.             */
+    pdesc->DMA_Status = 0;                                      /* Free the descriptor.                                 */
+
+    if (pdev_data->RxBufDescPtrCur != pdev_data->RxBufDescPtrEnd) {
+        pdev_data->RxBufDescPtrCur++;                           /* Point to next Buffer Descriptor.                     */
+    } else {                                                    /* Wrap around end of descriptor list if necessary.     */
+        pdev_data->RxBufDescPtrCur  = pdev_data->RxBufDescPtrStart;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_TxDescInit()
+*
+* Description : (1) This function initializes the Tx descriptor list for the specified interface :
+*
+*                   (a) Obtain reference to the Rx descriptor(s) memory block
+*                   (b) Initialize Tx descriptor pointers
+*                   (c) Obtain Rx descriptor data areas
+*                   (d) Initialize hardware registers
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No error
+*                           NET_IF_MGR_ERR_nnnn     Various Network Interface management error codes
+*                           NET_BUF_ERR_nnn         Various Network buffer error codes
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Start().
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) All Tx descriptors are allocated as ONE memory block.  This removes the
+*                   necessity to ensure that descriptor blocks are returned to the descriptor
+*                   pool in the opposite order in which they were allocated; doing so would
+*                   ensure that each memory block address was contiguous to the one before
+*                   and after it.  If the descriptors are NOT contiguous, then software
+*                   MUST NOT assign a pointer to the pool start address and use pointer
+*                   arithmetic to navigate the descriptor list.  Since pointer arithmetic
+*                   is a convenient way to navigate the descriptor list, ONE block is allocated
+*                   and the driver uses pointer arithmetic to slice the block into descriptor
+*                   sized units.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_TxDescInit (NET_IF  *pif,
+                                 NET_ERR *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    DEV_DESC           *pdesc;
+    MEM_POOL           *pmem_pool;
+    CPU_SIZE_T          nbytes;
+    CPU_INT16U          i;
+    LIB_ERR             lib_err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* -------------- ALLOCATE DESCRIPTORS  --------------- */
+                                                                /* See Note #3.                                         */
+    pmem_pool = &pdev_data->TxDescPool;
+    nbytes    =  pdev_cfg->TxDescNbr * sizeof(DEV_DESC);
+    pdesc     = (DEV_DESC *)Mem_PoolBlkGet((MEM_POOL *) pmem_pool,
+                                           (CPU_SIZE_T) nbytes,
+                                           (LIB_ERR  *)&lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *perr = NET_ERR_FAULT_MEM_ALLOC;
+        return;
+    }
+
+                                                                /* -------------- INIT DESCRIPTOR PTRS  --------------- */
+    pdev_data->TxBufDescPtrStart = (DEV_DESC *)pdesc;
+    pdev_data->TxBufDescPtrCur   = (DEV_DESC *)pdesc;
+    pdev_data->TxBufDescCompPtr  = (DEV_DESC *)pdesc;
+    pdev_data->TxBufDescPtrEnd   = (DEV_DESC *)pdesc + (pdev_cfg->TxDescNbr - 1);
+
+                                                                /* --------------- INIT TX DESCRIPTORS ---------------- */
+    for (i = 0; i < pdev_cfg->TxDescNbr; i++) {                 /* Initialize Tx descriptor ring                        */
+        pdesc->DMA_Ctrl   = 0;
+        pdesc->DMA_Status = 0;
+
+        if (pdesc == (pdev_data->TxBufDescPtrEnd)) {            /* Set WRAP bit on last descriptor in list.             */
+            pdesc->DMA_Addr |= DESC_WRAP_BIT_MASK;
+        }
+
+        pdesc++;                                                /* Point to next descriptor in list.                    */
+    }
+
+                                                                /* ------------- INIT HARDWARE REGISTERS -------------- */
+                                                                /* Configure the DMA with the Tx desc start address.    */
+    pdev->DMA_TX_START_ADDR = (CPU_INT32U)pdev_data->TxBufDescPtrStart;
+
+    *perr = NET_DEV_ERR_NONE;
+}
+
+#endif  /* NET_IF_ETHER_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_dma.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_dma.h
new file mode 100644
index 0000000..e4002eb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_dma.h
@@ -0,0 +1,85 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                                        ETHERNET DMA TEMPLATE
+*
+* Filename      : net_dev_ether_template_dma.h
+* Version       : V3.04.02
+* Programmer(s) : EHS
+*                 FGK
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.20.00 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DEV_TEMPLATE_ETHER_DMA_MODULE_PRESENT
+#define  NET_DEV_TEMPLATE_ETHER_DMA_MODULE_PRESENT
+
+#include  
+#ifdef   NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_API_ETHER  NetDev_API_TemplateEtherDMA;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#endif  /* NET_IF_ETHER_MODULE_EN                       */
+#endif  /* NET_DEV_TEMPLATE_ETHER_DMA_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_pio.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_pio.c
new file mode 100644
index 0000000..bffcd0a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_pio.c
@@ -0,0 +1,1520 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                                   ETHERNET PARALLEL I/O TEMPLATE
+*
+* Filename      : net_dev_ether_template_pio.c
+* Version       : V3.04.02
+* Programmer(s) : EHS
+*                 FGK
+*                 ITJ
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.20.00 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_DEV_TEMPLATE_ETHER_PIO_MODULE
+#include  
+#include  
+#include  
+#include  
+#include  "net_dev_ether_template_pio.h"
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*
+* Note(s) : (1) Receive buffers usually MUST be aligned to some octet boundary.  However, adjusting
+*               receive buffer alignment MUST be performed from within 'net_dev_cfg.h'.  Do not adjust
+*               the value below as it is used for configuration checking only.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MII_REG_RD_WR_TO                              10000    /* MII read write timeout.                              */
+#define  RX_BUF_ALIGN_OCTETS                               4    /* See Note #1.                                         */
+
+#define  DEV_RX_CRC_DIS                                    0
+#define  DEV_RX_CRC_EN                                     1
+#define  DEV_RX_CRC_OPT                                    2
+
+#define  TX_BUF_STATUS                                     1
+#define  USED                                              1
+
+
+/*
+*********************************************************************************************************
+*                                     REGISTER BIT DEFINITIONS
+*
+* Note(s) : (1) All necessary register bit definitions should be defined within this section.
+*********************************************************************************************************
+*/
+
+#define  INT_STATUS_MASK_ALL                      0x00000000
+#define  INT_STATUS_MASK_SUPPORTED                0x00000000
+#define  CTRL_TX_EN                               DEF_BIT_00
+#define  CTRL_RX_EN                               DEF_BIT_00
+#define  CTRL_RX_CRC_EN                           DEF_BIT_00
+#define  CTRL_DISCARD_FRAME                       DEF_BIT_00
+
+#define  RX_ISR_EVENT_MSK                         DEF_BIT_00
+#define  TX_ISR_EVENT_MSK                         DEF_BIT_00
+#define  UNHANDLED_ISR_EVENT_MASK                 DEF_BIT_00
+
+#define  RX_STATUS_ERR_MSK                        DEF_BIT_00
+#define  TX_STATUS_BUSY                           DEF_BIT_00
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*
+* Note(s) : (1) Instance specific data area structures should be defined below.  The data area
+*               structure typically includes error counters and variables used to track the
+*               state of the device.  Variables required for correct operation of the device
+*               MUST NOT be defined globally and should instead be included within the instance
+*               specific data area structure and referenced as pif->Dev_Data structure members.
+*
+*           (2) All device drivers MUST track the addresses of ALL buffers that have been
+*               transmitted and not yet acknowledged through transmit complete interrupts.
+*********************************************************************************************************
+*/
+
+                                                                /* --------------- DEVICE INSTANCE DATA --------------- */
+typedef  struct  net_dev_data {
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    NET_CTR      StatRxPktCtr;
+    NET_CTR      StatTxPktCtr;
+#endif
+#if (NET_CTR_CFG_ERR_EN  == DEF_ENABLED)
+    NET_CTR      ErrRxPktDiscardedCtr;
+    NET_CTR      ErrTxPktDiscardedCtr;
+#endif
+
+    CPU_INT32U   Status;
+
+    CPU_INT08U  *TxBufCompPtr;                                  /* See Note #2.                                         */
+#ifdef  NET_MCAST_MODULE_EN
+    CPU_INT08U   MulticastAddrHashBitCtr[64];
+#endif
+} NET_DEV_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*
+* Note(s) : (1) Device register definitions SHOULD NOT be absolute & SHOULD use the provided base address
+*               within the device configuration structure (see 'net_dev_cfg.c'), as well as each device's
+*               register definition structure in order to properly resolve register addresses at run-time
+*               by mapping the device register definition structure onto an interface's base address.
+*
+*           (2) The device register definition structure MUST take into account appropriate register
+*               offsets & apply reserved space as required.  The registers listed within the register
+*               definition structure MUST reflect the exact ordering and data sizes illustrated in the
+*               device user guide.
+*
+*           (3) Device registers SHOULD be declared as volatile variables so that compilers do NOT cache
+*               register values but MUST perform the steps to read or write each register value for every
+*               register read or write access.
+*
+*               An example device register structure is provided below.
+*********************************************************************************************************
+*/
+
+typedef  struct  net_dev {
+    CPU_REG32  CTRL;
+    CPU_REG32  IAH;
+    CPU_REG32  IAL;
+    CPU_REG32  RESERVED1;
+    CPU_REG32  RESERVED2;
+    CPU_REG32  IER;
+    CPU_REG32  ISR;
+    CPU_REG32  RESERVED3;
+    CPU_REG32  RSTAT;
+    CPU_REG32  RXFIFO;
+    CPU_REG32  STATUS;
+} NET_DEV;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*
+* Note(s) : (1) Global variables are highly discouraged and should only be used for storing NON-instance
+*               specific data and the array of instance specific data.  Global variables, those that are
+*               not declared within the NET_DEV_DATA area, are not multiple-instance safe and could lead
+*               to incorrect driver operation if used to store device state information.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Device driver functions may be arbitrarily named.  However, it is recommended that device
+*               driver functions be named using the names provided below.  All driver function prototypes
+*               should be located within the driver C source file ('net_dev_&&&.c') & be declared as
+*               static functions to prevent name clashes with other network protocol suite device drivers.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                        /* -------- FNCT'S COMMON TO ALL DEV'S -------- */
+static  void  NetDev_Init               (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_Start              (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_Stop               (NET_IF             *pif,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_Rx                 (NET_IF             *pif,
+                                         CPU_INT08U        **p_data,
+                                         CPU_INT16U         *size,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_Tx                 (NET_IF             *pif,
+                                         CPU_INT08U         *p_data,
+                                         CPU_INT16U          size,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_AddrMulticastAdd   (NET_IF             *pif,
+                                         CPU_INT08U         *paddr_hw,
+                                         CPU_INT08U          addr_hw_len,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_AddrMulticastRemove(NET_IF             *pif,
+                                         CPU_INT08U         *paddr_hw,
+                                         CPU_INT08U          addr_hw_len,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_ISR_Handler        (NET_IF             *pif,
+                                         NET_DEV_ISR_TYPE    type);
+
+
+static  void  NetDev_IO_Ctrl            (NET_IF             *pif,
+                                         CPU_INT08U          opt,
+                                         void               *p_data,
+                                         NET_ERR            *perr);
+
+
+static  void  NetDev_MII_Rd             (NET_IF             *pif,
+                                         CPU_INT08U          phy_addr,
+                                         CPU_INT08U          reg_addr,
+                                         CPU_INT16U         *p_data,
+                                         NET_ERR            *perr);
+
+static  void  NetDev_MII_Wr             (NET_IF             *pif,
+                                         CPU_INT08U          phy_addr,
+                                         CPU_INT08U          reg_addr,
+                                         CPU_INT16U          data,
+                                         NET_ERR            *perr);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NETWORK DEVICE DRIVER API
+*
+* Note(s) : (1) Device driver API structures are used by applications during calls to NetIF_Add().  This
+*               API structure allows higher layers to call specific device driver functions via function
+*               pointer instead of by name.  This enables the network protocol suite to compile & operate
+*               with multiple device drivers.
+*
+*           (2) In most cases, the API structure provided below SHOULD suffice for most device drivers
+*               exactly as is with the exception that the API structure's name which MUST be unique &
+*               SHOULD clearly identify the device being implemented.  For example, the Cirrus Logic
+*               CS8900A Ethernet controller's API structure should be named NetDev_API_CS8900A[].
+*
+*               The API structure MUST also be externally declared in the device driver header file
+*               ('net_dev_&&&.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+
+const  NET_DEV_API_ETHER  NetDev_API_TemplateEtherPIO = {                               /* Ether PIO dev API fnct ptrs :*/
+                                                          &NetDev_Init,                 /*   Init/add                   */
+                                                          &NetDev_Start,                /*   Start                      */
+                                                          &NetDev_Stop,                 /*   Stop                       */
+                                                          &NetDev_Rx,                   /*   Rx                         */
+                                                          &NetDev_Tx,                   /*   Tx                         */
+                                                          &NetDev_AddrMulticastAdd,     /*   Multicast addr add         */
+                                                          &NetDev_AddrMulticastRemove,  /*   Multicast addr remove      */
+                                                          &NetDev_ISR_Handler,          /*   ISR handler                */
+                                                          &NetDev_IO_Ctrl,              /*   I/O ctrl                   */
+                                                          &NetDev_MII_Rd,               /*   Phy reg rd                 */
+                                                          &NetDev_MII_Wr                /*   Phy reg wr                 */
+                                                        };
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Init()
+*
+* Description : (1) Initialize Network Driver Layer :
+*
+*                   (a) Initialize required clock sources
+*                   (b) Initialize external interrupt controller
+*                   (c) Initialize external GPIO controller
+*                   (d) Initialize driver state variables
+*                   (e) Initialize driver statistics & error counters
+*                   (f) Allocate memory for device DMA descriptors
+*                   (g) Initialize additional device registers
+*                       (1) (R)MII mode / Phy bus type
+*                       (2) Disable device interrupts
+*                       (3) Disable device receiver and transmitter
+*                       (4) Other necessary device initialization
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE            No Error.
+*                           NET_DEV_ERR_INIT            General initialization error.
+*                           NET_BUF_ERR_POOL_MEM_ALLOC  Memory allocation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Add() via 'pdev_api->Init()'.
+*
+* Note(s)     : (2) The application developer SHOULD define NetDev_CfgClk() within net_bsp.c
+*                   in order to properly enable clocks for specified network interface.  In
+*                   some cases, a device may require clocks to be enabled for BOTH the device
+*                   and accessory peripheral modules such as GPIO.  A call to this function
+*                   MAY need to occur BEFORE any device register accesses are made.  In the
+*                   event that a device does NOT require any external clocks to be enabled,
+*                   it is recommended that the device driver still call the NetBSP fuction
+*                   which may in turn leave the section for the specific interface number
+*                   empty.
+*
+*               (3) The application developer SHOULD define NetDev_CfgGPIO() within net_bsp.c
+*                   in order to properly configure any necessary GPIO necessary for the device
+*                   to operate properly.  Micrium recommends defining and calling this NetBSP
+*                   function even if no additional GPIO initialization is required.
+*
+*               (4) The application developer SHOULD define NetDev_CfgIntCtrl() within net_bsp.c
+*                   in order to properly enable interrupts on an external or CPU integrated
+*                   interrupt controller.  Interrupt sources that are specific to the DEVICE
+*                   hardware MUST NOT be initialized from within NetDev_CfgIntCtrl() and
+*                   SHOULD only be modified from within the device driver.
+*
+*                   (a) External interrupt sources are cleared within the NetBSP first level
+*                       ISR handler either before or after the call to the device driver ISR
+*                       handler function.  The device driver ISR handler function SHOULD only
+*                       clear the device specific interrupts and NOT external or CPU interrupt
+*                       controller interrupt sources.
+*
+*               (5) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (6) All device drivers that store instance specific data MUST declare all
+*                   instance specific variables within the device data area defined above.
+*
+*               (7) Drivers SHOULD validate device configuration values and set *perr to
+*                   NET_DEV_ERR_INVALID_CFG if unacceptible values have been specified. Fields
+*                   of interest generally include, but are not limited to :
+*
+*                   (a) pdev_cfg->RxBufPoolType :
+*
+*                       (1) NET_IF_MEM_TYPE_MAIN
+*                       (2) NET_IF_MEM_TYPE_DEDICATED
+*
+*                   (b) pdev_cfg->TxBufPoolType :
+*
+*                       (1) NET_IF_MEM_TYPE_MAIN
+*                       (2) NET_IF_MEM_TYPE_DEDICATED
+*
+*                   (c) pdev_cfg->RxBufAlignOctets
+*                   (d) pdev_cfg->TxBufAlignOctets
+*                   (e) pdev_cfg->DataBusSizeNbrBits
+*
+*               (8) NetDev_Init() should exit with :
+*
+*                   (a) All device interrupt source disabled. External interrupt controllers
+*                       should however be ready to accept interrupt requests.
+*                   (b) All device interrupt sources cleared.
+*                   (c) Both the receiver and transmitter disabled.
+*
+*               (9) Some drivers MAY require knowledge of the Phy configuration in order
+*                   to properly configure the MAC with the correct Phy bus mode, speed and
+*                   duplex settings.  If a driver requires access to the Phy configuration,
+*                   then the driver MUST validate the pif->Phy_Cfg pointer by checking for
+*                   a NULL pointer BEFORE attempting to access members of the Phy
+*                   configuration structure.  Phy configuration fields of interest generally
+*                   include, but are  not limited to :
+*
+*                   (a) pphy_cfg->Type :
+*
+*                       (1) NET_PHY_TYPE_INT            Phy integrated with MAC.
+*                       (2) NET_PHY_TYPE_EXT            Phy externally attached to MAC.
+*
+*                   (b) pphy_cfg->BusMode :
+*
+*                       (1) NET_PHY_BUS_MODE_MII        Phy bus mode configured to MII.
+*                       (2) NET_PHY_BUS_MODE_RMII       Phy bus mode configured to RMII.
+*                       (3) NET_PHY_BUS_MODE_SMII       Phy bus mode configured to SMII.
+*
+*                   (c) pphy_cfg->Spd :
+*
+*                       (1) NET_PHY_SPD_0               Phy link speed unknown or NOT linked.
+*                       (2) NET_PHY_SPD_10              Phy link speed configured to  10   mbit/s.
+*                       (3) NET_PHY_SPD_100             Phy link speed configured to  100  mbit/s.
+*                       (4) NET_PHY_SPD_1000            Phy link speed configured to  1000 mbit/s.
+*                       (5) NET_PHY_SPD_AUTO            Phy link speed configured for auto-negotiation.
+*
+*                   (d) pphy_cfg->Duplex :
+*
+*                       (1) NET_PHY_DUPLEX_UNKNOWN      Phy link duplex unknown or link not established.
+*                       (2) NET_PHY_DUPLEX_HALF         Phy link duplex configured to  half duplex.
+*                       (3) NET_PHY_DUPLEX_FULL         Phy link duplex configured to  full duplex.
+*                       (4) NET_PHY_DUPLEX_AUTO         Phy link duplex configured for auto-negotiation.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Init (NET_IF   *pif,
+                           NET_ERR  *perr)
+{
+    NET_DEV_BSP_ETHER  *pdev_bsp;
+    NET_PHY_CFG_ETHER  *pphy_cfg;
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    NET_BUF_SIZE        buf_size_max;
+    NET_BUF_SIZE        buf_ix;
+    CPU_SIZE_T          reqd_octets;
+    LIB_ERR             lib_err;
+
+
+                                                                /* -------- OBTAIN REFERENCE TO CFGs/REGs/BSP --------- */
+    pphy_cfg = (NET_PHY_CFG_ETHER *)pif->Ext_Cfg;
+    pdev_cfg = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;
+    pdev     = (NET_DEV           *)pdev_cfg->BaseAddr;         /* Overlay dev reg struct on top of dev base addr.      */
+    pdev_bsp = (NET_DEV_BSP_ETHER *)pif->Dev_BSP;
+
+                                                                /* --------------- VALIDATE DEVICE CFG ---------------- */
+                                                                /* See Note #7.                                         */
+                                                                /* Validate Rx buf alignment.                           */
+    if ((pdev_cfg->RxBufAlignOctets % RX_BUF_ALIGN_OCTETS) != 0u) {
+        *perr = NET_DEV_ERR_INVALID_CFG;
+         return;
+    }
+
+                                                                /* Validate Rx buf ix offset.                           */
+    if (pdev_cfg->RxBufIxOffset != 0u) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+                                                                /* Validate Rx buf size.                                */
+    buf_ix       = NET_IF_IX_RX;
+    buf_size_max = NetBuf_GetMaxSize((NET_IF_NBR     )pif->Nbr,
+                                     (NET_TRANSACTION)NET_TRANSACTION_RX,
+                                     (NET_BUF       *)0,
+                                     (NET_BUF_SIZE   )buf_ix);
+    if (buf_size_max < NET_IF_ETHER_FRAME_MAX_SIZE) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+
+
+                                                                /* Validate Tx buf ix offset.                           */
+    if (pdev_cfg->TxBufIxOffset != 0u) {
+       *perr = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+
+    if (pphy_cfg == (void *)0) {
+       *perr = NET_PHY_ERR_INVALID_CFG;
+        return;
+    }
+                                                                /* Validate phy bus mode.                               */
+    if (pphy_cfg->BusMode != NET_PHY_BUS_MODE_RMII) {
+       *perr = NET_PHY_ERR_INVALID_CFG;
+        return;
+    }
+
+
+                                                                /* -------------- ALLOCATE DEV DATA AREA -------------- */
+    pif->Dev_Data = Mem_HeapAlloc((CPU_SIZE_T  ) sizeof(NET_DEV_DATA),
+                                  (CPU_SIZE_T  ) 4,
+                                  (CPU_SIZE_T *)&reqd_octets,
+                                  (LIB_ERR    *)&lib_err);
+    if (pif->Dev_Data == (void *)0) {
+       *perr = NET_DEV_ERR_MEM_ALLOC;
+        return;
+    }
+
+    pdev_data = (NET_DEV_DATA *)pif->Dev_Data;
+
+
+
+                                                                /* ------------- ENABLE NECESSARY CLOCKS -------------- */
+                                                                /* Enable module clks (see Note #2).                    */
+    pdev_bsp->CfgClk(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------- INITIALIZE EXTERNAL GPIO CONTROLLER -------- */
+                                                                /* Configure Ethernet Controller GPIO (see Note #4).    */
+    pdev_bsp->CfgGPIO(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ----- INITIALIZE EXTERNAL INTERRUPT CONTROLLER ------ */
+                                                                /* Configure ext int ctrl'r (see Note #3).              */
+    pdev_bsp->CfgIntCtrl(pif, perr);
+    if (*perr != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* ---- INITIALIZE ALL DEVICE DATA AREA VARIABLES ----- */
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    pdev_data->StatRxPktCtr         = 0;
+    pdev_data->StatTxPktCtr         = 0;
+#endif
+#if (NET_CTR_CFG_ERR_EN  == DEF_ENABLED)
+    pdev_data->ErrRxPktDiscardedCtr = 0;
+    pdev_data->ErrTxPktDiscardedCtr = 0;
+#endif
+
+                                                                /* ------------- INITIALIZE DEV REGISTERS ------------- */
+    pdev->CTRL = 0;                                             /* See Note #8.                                         */
+
+
+                                                                /* ------ OPTIONALLY OBTAIN REFERENCE TO PHY CFG ------ */
+    pphy_cfg = (NET_PHY_CFG_ETHER *)pif->Ext_Cfg;               /* Obtain ptr to the phy cfg struct.                    */
+    if (pphy_cfg != (void *)0) {                                /* Cfg MAC w/ initial Phy settings.                     */
+        ;
+    }
+
+   (void)&pdev_data;
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Start()
+*
+* Description : (1) Start network interface hardware :
+*
+*                   (a) Initialize transmit semaphore count
+*                   (b) Initialize hardware address registers
+*                   (c) Initialize receive and transmit descriptors
+*                   (d) Clear all pending interrupt sources
+*                   (e) Enable supported interrupts
+*                   (f) Enable the transmitter and receiver
+*                   (g) Start / Enable DMA if required
+*
+*
+* Argument(s) : pif         Pointer to a network interface.
+*               ---         Argument validated in NetIF_Start().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Ethernet device successfully started.
+*
+*                                                               - RETURNED BY NetIF_AddrHW_SetHandler() : --
+*                               NET_IF_ERR_NULL_PTR             Argument(s) passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT         Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_IF_ERR_INVALID_STATE        Invalid network interface state.
+*                               NET_IF_ERR_INVALID_ADDR         Invalid hardware address.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+*                                                               - RETURNED BY NetIF_DevCfgTxRdySignal() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_OS_ERR_INIT_DEV_TX_RDY_VAL  Invalid device transmit ready signal.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Start() via 'pdev_api->Start()'.
+*
+* Note(s)     : (2) Setting the maximum number of frames queued for transmission is optional.  By
+*                   default, all network interfaces are configured to block until the previous frame
+*                   has completed transmission.  However, some devices can queue multiple frames for
+*                   transmission before blocking is required.  The default semaphore value is one.
+*
+*               (3) The physical hardware address should not be configured from NetDev_Init(). Instead,
+*                   it should be configured from within NetDev_Start() to allow for the proper use
+*                   of NetIF_Ether_HW_AddrSet(), hard coded hardware addresses from the device
+*                   configuration structure, or auto-loading EEPROM's. Changes to the physical address
+*                   only take effect when the device transitions from the DOWN to UP state.
+*
+*               (4) The device hardware address is set from one of the data sources below. Each source
+*                   is listed in the order of precedence.
+*
+*                   (a) Device Configuration Structure       Configure a valid HW address during
+*                                                                compile time.
+*
+*                                                            Configure either "00:00:00:00:00:00" or
+*                                                                an empty string, "", in order to
+*                                                                configure the HW address using using
+*                                                                method (b).
+*
+*                   (b) NetIF_Ether_HW_AddrSet()             Call NetIF_Ether_HW_AddrSet() if the HW
+*                                                                address needs to be configured via
+*                                                                run-time from a different data
+*                                                                source. E.g. Non auto-loading
+*                                                                memory such as I2C or SPI EEPROM.
+*                                                               (see Note #3).
+*
+*                   (c) Auto-Loading via EEPROM.             If neither options a) or b) are used,
+*                                                                the IF layer will use the HW address
+*                                                                obtained from the network hardware
+*                                                                address registers.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Start (NET_IF   *pif,
+                            NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV            *pdev;
+    CPU_INT08U          hw_addr[NET_IF_ETHER_ADDR_SIZE];
+    CPU_INT08U          hw_addr_len;
+    CPU_BOOLEAN         hw_addr_cfg;
+    NET_ERR             err;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ---------------- CFG TX RDY SIGNAL ----------------- */
+    NetIF_DevCfgTxRdySignal(pif,                                /* See Note #2.                                         */
+                            pdev_cfg->TxDescNbr,
+                            perr);
+    if (*perr != NET_IF_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* ------------------- CFG HW ADDR -------------------- */
+    hw_addr_cfg = DEF_NO;                                       /* See Notes #3 & #4.                                   */
+
+    NetASCII_Str_to_MAC(pdev_cfg->HW_AddrStr,                   /* Get configured HW MAC address string, if any ...     */
+                       &hw_addr[0],                             /* ... (see Note #4a).                                  */
+                       &err);
+    if (err == NET_ASCII_ERR_NONE) {
+        NetIF_AddrHW_SetHandler((NET_IF_NBR  ) pif->Nbr,
+                                (CPU_INT08U *)&hw_addr[0],
+                                (CPU_INT08U  ) sizeof(hw_addr),
+                                (NET_ERR    *)&err);
+    }
+
+    if (err == NET_IF_ERR_NONE) {                               /* If no errors, configure device    HW MAC address.    */
+        hw_addr_cfg = DEF_YES;
+
+    } else {                                                    /* Else get  app-configured IF layer HW MAC address, ...*/
+                                                                /* ... if any (see Note #4b).                           */
+        hw_addr_len = sizeof(hw_addr);
+        NetIF_AddrHW_GetHandler(pif->Nbr, &hw_addr[0], &hw_addr_len, &err);
+        if (err == NET_IF_ERR_NONE) {
+            hw_addr_cfg  = NetIF_AddrHW_IsValidHandler(pif->Nbr, &hw_addr[0], &err);
+        } else {
+            hw_addr_cfg  = DEF_NO;
+        }
+
+        if (hw_addr_cfg != DEF_YES) {                           /* Else attempt to get device's automatically loaded ...*/
+                                                                /* ... HW MAC address, if any (see Note #4c).           */
+            hw_addr[0] = (pdev->IAL >> (0 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+            hw_addr[1] = (pdev->IAL >> (1 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+            hw_addr[2] = (pdev->IAL >> (2 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+            hw_addr[3] = (pdev->IAL >> (3 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+
+            hw_addr[4] = (pdev->IAH >> (0 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+            hw_addr[5] = (pdev->IAH >> (1 * DEF_INT_08_NBR_BITS)) & DEF_INT_08_MASK;
+
+            NetIF_AddrHW_SetHandler((NET_IF_NBR  ) pif->Nbr,    /* Configure IF layer to use automatically-loaded ...   */
+                                    (CPU_INT08U *)&hw_addr[0],  /* ... HW MAC address.                                  */
+                                    (CPU_INT08U  ) sizeof(hw_addr),
+                                    (NET_ERR    *) perr);
+            if (*perr != NET_IF_ERR_NONE) {                     /* No valid HW MAC address configured, return error.    */
+                 return;
+            }
+        }
+    }
+
+    if (hw_addr_cfg == DEF_YES) {                               /* If necessary, set device HW MAC address.             */
+        pdev->IAL = (((CPU_INT32U)hw_addr[0] << (0 * DEF_INT_08_NBR_BITS)) |
+                     ((CPU_INT32U)hw_addr[1] << (1 * DEF_INT_08_NBR_BITS)) |
+                     ((CPU_INT32U)hw_addr[2] << (2 * DEF_INT_08_NBR_BITS)) |
+                     ((CPU_INT32U)hw_addr[3] << (3 * DEF_INT_08_NBR_BITS)));
+
+        pdev->IAH = (((CPU_INT32U)hw_addr[4] << (0 * DEF_INT_08_NBR_BITS)) |
+                     ((CPU_INT32U)hw_addr[5] << (1 * DEF_INT_08_NBR_BITS)));
+    }
+
+
+                                                                /* -------------------- CFG INT'S --------------------- */
+    pdev->ISR  |= INT_STATUS_MASK_ALL;                          /* Clear all pending int. sources.                      */
+    pdev->IER  |= INT_STATUS_MASK_SUPPORTED;                    /* Enable Rx, Tx and other supported int. sources.      */
+
+
+                                                                /* ------------------ ENABLE RX & TX ------------------ */
+    pdev->CTRL |= CTRL_TX_EN  |                                 /* Enable transmitter & receiver.                       */
+                  CTRL_RX_EN;
+
+                                                                /* ----------------- START DMA FETCH ------------------ */
+                                                                /* Start DMA if required.                               */
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Stop()
+*
+* Description : (1) Shutdown network interface hardware :
+*
+*                   (a) Disable the receiver and transmitter
+*                   (b) Disable receive and transmit interrupts
+*                   (c) Clear pending interrupt requests
+*                   (d) Free ALL receive descriptors (Return ownership to hardware)
+*                   (e) Deallocate ALL transmit buffers
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE    No Error
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Stop() via 'pdev_api->Stop()'.
+*
+* Note(s)     : (2) (a) (1) It is recommended that a device driver should only post all currently-used,
+*                           i.e. not-fully-transmitted, transmit buffers to the network interface transmit
+*                           deallocation queue.
+*
+*                       (2) However, a driver MAY attempt to post all queued &/or transmitted buffers.
+*                           The network interface transmit deallocation task will silently ignore any
+*                           unknown or duplicate transmit buffers.  This allows device drivers to
+*                           indiscriminately & easily post all transmit buffers without determining
+*                           which buffers have NOT yet been transmitted.
+*
+*                   (b) (1) Device drivers should assume that the network interface transmit deallocation
+*                           queue is large enough to post all currently-used transmit buffers.
+*
+*                       (2) If the transmit deallocation queue is NOT large enough to post all transmit
+*                           buffers, some transmit buffers may/will be leaked/lost.
+*
+*               (3) All functions that require device register access MUST obtain reference to the
+*                   device hardware register space PRIOR to attempting to access any registers.
+*                   Register definitions SHOULD NOT be absolute & SHOULD use the provided base
+*                   address within the device configuration structure, as well as the device
+*                   register definition structure in order to properly resolve register addresses
+*                   during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Stop (NET_IF   *pif,
+                           NET_ERR  *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    NET_ERR             err;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ----------------- DISABLE RX & TX ------------------ */
+    pdev->CTRL &= ~(CTRL_TX_EN  |                               /* Disable transmitter & receiver.                      */
+                    CTRL_RX_EN);
+
+                                                                /* -------------- DISABLE & CLEAR INT'S --------------- */
+    pdev->IER  &=  ~INT_STATUS_MASK_SUPPORTED;                  /* Disable Rx, Tx and other supported int. sources.     */
+    pdev->ISR  &=  ~INT_STATUS_MASK_ALL;                        /* Clear all pending int. sources.                      */
+
+
+                                                                /* ------------------- FREE TX BUFS ------------------- */
+    if ((pdev_data->Status & TX_BUF_STATUS) == USED) {          /* If NOT yet  tx'd, ...                                */
+                                                                /* ... dealloc tx buf (see Note #2a1).                  */
+        NetIF_TxDeallocTaskPost((CPU_INT08U *)pdev_data->TxBufCompPtr, &err);
+       (void)&err;                                              /* Ignore possible dealloc err (see Note #2b2).         */
+    }
+
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Rx()
+*
+* Description : (1) This function returns a pointer to the received data to the caller :
+*                   (a) Determine which receive descriptor caused the interrupt
+*                   (b) Obtain pointer to data area to replace existing data area
+*                   (c) Reconfigure descriptor with pointer to new data area
+*                   (d) Set return values.  Pointer to received data area and size
+*                   (e) Update current receive descriptor pointer
+*                   (f) Increment counters.
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               p_data  Pointer to pointer to received DMA data area. The received data
+*                       area address should be returned to the stack by dereferencing
+*                       p_data as *p_data = (address of receive data area).
+*
+*               size    Pointer to size. The number of bytes received should be returned
+*                       to the stack by dereferencing size as *size = (number of bytes).
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE            No Error
+*                           NET_DEV_ERR_RX              Generic Rx error.
+*                           NET_DEV_ERR_INVALID_SIZE    Invalid Rx frame size.
+*                           NET_BUF error codes         Potential NET_BUF error codes
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt() via 'pdev_api->Rx()'.
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) If a receive error occurs, the function SHOULD return 0 for the size, a
+*                   NULL pointer to the data area AND an error code equal to NET_DEV_ERR_RX.
+*                   Some devices may require that driver instruct the hardware to drop the
+*                   frame if it has been commited to internal device memory.
+*
+*                   (a) If a new data area is unavailable, the driver MUST instruct hardware
+*                       to discard the frame.
+*
+*               (4) Reading data from the device hardware may occur in various sized reads :
+*
+*                   (a) Device drivers that require read sizes equivalent to the size of the
+*                       device data bus MAY examine pdev_cfg->DataBusSizeNbrBits in order to
+*                       determine the number of required data reads.
+*
+*                   (b) Devices drivers that require read sizes equivalent to the size of the
+*                       Rx FIFO width SHOULD use the known FIFO width to determine the number
+*                       of required data reads.
+*
+*                   (c) It may be necessary to round the number of data reads up, OR perform
+*                       the last data read outside of the loop.
+*
+*               (5) A pointer set equal to pbuf_new and sized according to the required data
+*                   read size determined in (4) should be used to read data from the device
+*                   into the receive buffer.
+*
+*               (6) Some devices may interrupt only ONCE for a recieved frame.  The driver MAY
+*                   need check if additional frames have been received while processing the
+*                   current received frame.  If additional frames have been received, the driver
+*                   MAY need to signal the receive task before exiting NetDev_Rx().
+*
+*               (7) Some devices optionally include each receive packet's CRC in the received
+*                   packet data & size.
+*
+*                   (a) CRCs might optionally be included at run-time or at build time. Each
+*                       driver doesn't necessarily need to conditionally include or exclude
+*                       the CRC at build time.  Instead, a device may include/exclude the code
+*                       to subtract the CRC size from the packet size.
+*
+*                   (b) The CRC size should be subtracted from the receive packet size ONLY if
+*                       the CRC was included in the received packet data.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Rx (NET_IF       *pif,
+                         CPU_INT08U  **p_data,
+                         CPU_INT16U   *size,
+                         NET_ERR      *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    CPU_INT08U         *pbuf_new;
+    CPU_BOOLEAN         rx_crc;
+    CPU_INT16U          rx_len;
+    CPU_INT16U          cnt;
+    CPU_INT16U          i;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ------------- CHECK FOR RECEIVE ERRORS ------------- */
+    if ((pdev->RSTAT & RX_STATUS_ERR_MSK) > 0) {                /* See Note #3.                                         */
+        *size   = (CPU_INT16U  )0;
+        *p_data = (CPU_INT08U *)0;
+        *perr   = (NET_ERR     )NET_DEV_ERR_RX;
+         pdev->CTRL |= CTRL_DISCARD_FRAME;                      /* See Note #3.                                         */
+         NET_CTR_ERR_INC(pdev_data->ErrRxPktDiscardedCtr);
+         return;
+    }
+
+                                                                /* --------------- OBTAIN FRAME LENGTH ---------------- */
+    rx_len = (CPU_INT16U)pdev->STATUS & 0x07FF;
+#if   (DEV_CFG_RX_CRC_EN == DEV_RX_CRC_OPT)                     /* See Note #7.                                         */
+    rx_crc =  DEF_BIT_IS_SET(pdesc->DMA_Ctrl CTRL_RX_CRC_EN, CTRL_RX_CRC_EN);
+#elif (DEV_CFG_RX_CRC_EN == DEV_RX_CRC_EN)
+    rx_crc =  DEF_YES;
+#else
+    rx_crc =  DEF_NO;
+#endif
+    if (rx_crc == DEF_YES) {                                    /* If opt to rx CRC into pkt en'd, ...                  */
+        rx_len -= NET_IF_ETHER_FRAME_CRC_SIZE;                  /* ... sub CRC size from pkt (see Note #7b).            */
+    }
+    if (rx_len <  NET_IF_ETHER_FRAME_MIN_SIZE) {                /* If frame is a runt, ...                              */
+        pdev->CTRL |= CTRL_DISCARD_FRAME;                       /* ... discard rx'd frame.                              */
+        NET_CTR_ERR_INC(pdev_data->ErrRxPktDiscardedCtr);
+       *size   = (CPU_INT16U  )0;
+       *p_data = (CPU_INT08U *)0;
+       *perr   = (NET_ERR     )NET_DEV_ERR_INVALID_SIZE;
+        pdev->CTRL |= CTRL_DISCARD_FRAME;                       /* See Note #3.                                         */
+        NET_CTR_ERR_INC(pdev_data->ErrRxPktDiscardedCtr);
+        return;
+    }
+
+
+                                                                /* --------- OBTAIN PTR TO NEW DMA DATA AREA ---------- */
+                                                                /* Request an empty buffer.                             */
+    pbuf_new = NetBuf_GetDataPtr(pif,
+                                 NET_TRANSACTION_RX,
+                                 NET_IF_ETHER_FRAME_MAX_SIZE,
+                                 NET_IF_IX_RX,
+                                 0,
+                                 0,
+                                 DEF_NULL,
+                                 perr);
+
+    if (*perr != NET_BUF_ERR_NONE) {                            /* If unable to get a buffer (see Note #3c).            */
+        *size   = (CPU_INT16U  )0;
+        *p_data = (CPU_INT08U *)0;
+         pdev->CTRL |= CTRL_DISCARD_FRAME;                      /* See Note #3.                                         */
+         NET_CTR_ERR_INC(pdev_data->ErrRxPktDiscardedCtr);
+         return;
+    }
+
+   *size = rx_len;                                              /* Return the size of the received frame.               */
+
+    cnt  = rx_len / pdev_cfg->DataBusSizeNbrBits;               /* Determine nbr of dev memory or FIFO reads are ...    */
+                                                                /* ... req'd (see Note #4 & #5).                        */
+
+    for (i = 0; i < cnt; i++) {                                 /* Read data from device (see Note #4 & #5).            */
+        ;
+    }
+
+   *p_data = pbuf_new;                                          /* Return a pointer to the received data.               */
+
+    NET_CTR_STAT_INC(pdev_data->StatRxPktCtr);
+
+   (void)&pdev_data;
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Tx()
+*
+* Description : (1) This function transmits the specified data :
+*
+*                   (a) Check if the transmitter is ready.
+*                   (b) Configure the next transmit descriptor for pointer to data and data size.
+*                   (c) Issue the transmit command.
+*                   (d) Increment pointer to next transmit descriptor
+*
+* Argument(s) : pif     Pointer to the interface requiring service.
+*
+*               p_data  Pointer to data to transmit.
+*
+*               size    Size    of data to transmit.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NONE        No Error
+*                           NET_DEV_ERR_TX_BUSY     No Tx descriptors available
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPkt() via 'pdev_api->Tx()'.
+*
+* Note(s)     : (2) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (3) Software MUST track all transmit buffer addresses that are that are queued for
+*                   transmission but have not received a transmit complete notification (interrupt).
+*                   Once the frame has been transmitted, software must post the buffer address of
+*                   the frame that has completed transmission to the transmit deallocation task.
+*                   See NetDev_ISR_Handler() for more information.
+*
+*               (4) Writing data to the device hardware may occur in various sized writes :
+*
+*                   (a) Device drivers that require write sizes equivalent to the size of the
+*                       device data bus MAY examine pdev_cfg->DataBusSizeNbrBits in order to
+*                       determine the number of required data writes.
+*
+*                   (b) Devices drivers that require write sizes equivalent to the size of the
+*                       Tx FIFO width SHOULD use the known FIFO width to determine the number
+*                       of required data reads.
+*
+*                   (c) It may be necessary to round the number of data writes up, OR perform the
+*                       last data write outside of the loop.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Tx (NET_IF      *pif,
+                         CPU_INT08U  *p_data,
+                         CPU_INT16U   size,
+                         NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    CPU_INT16U          cnt;
+    CPU_INT16U          i;
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+    if ((pdev->STATUS & TX_STATUS_BUSY) > 0) {                  /* Check if dev rdy to Tx.                              */
+      *perr = NET_DEV_ERR_TX_BUSY;
+       return;
+    }
+
+
+    cnt = size / pdev_cfg->DataBusSizeNbrBits;                  /* Determine nbr of dev memory or FIFO writes that  ... */
+                                                                /* ... are req'd (see Note #4).                         */
+
+    for (i = 0; i < cnt; i++) {                                 /* Copy data to device (see Note #4).                   */
+        ;
+    }
+
+    pdev->CTRL = 1;                                             /* Initiate Tx.                                         */
+
+    pdev_data->TxBufCompPtr = p_data;                           /* See Note #3.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetDev_AddrMulticastAdd()
+*
+* Description : Configure hardware address filtering to accept specified hardware address.
+*
+* Argument(s) : pif         Pointer to an Ethernet network interface.
+*               ---         Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               paddr_hw    Pointer to hardware address.
+*               --------    Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_len    Length  of hardware address.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Hardware address successfully configured.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'len' passed equal to 0.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_AddrMulticastAdd() via 'pdev_api->AddrMulticastAdd()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_AddrMulticastAdd (NET_IF      *pif,
+                                       CPU_INT08U  *paddr_hw,
+                                       CPU_INT08U   addr_hw_len,
+                                       NET_ERR     *perr)
+{
+#ifdef  NET_MCAST_MODULE_EN
+#endif
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetDev_AddrMulticastRemove()
+*
+* Description : Configure hardware address filtering to reject specified hardware address.
+*
+* Argument(s) : pif         Pointer to an Ethernet network interface.
+*               ---         Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               paddr_hw    Pointer to hardware address.
+*               --------    Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_len    Length  of hardware address.
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Hardware address successfully removed.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'len' passed equal to 0.
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_AddrMulticastAdd() via 'pdev_api->AddrMulticastRemove()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_AddrMulticastRemove (NET_IF      *pif,
+                                          CPU_INT08U  *paddr_hw,
+                                          CPU_INT08U   addr_hw_len,
+                                          NET_ERR     *perr)
+{
+#ifdef  NET_MCAST_MODULE_EN
+#endif
+
+   *perr = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_ISR_Handler()
+*
+* Description : This function serves as the device Interrupt Service Routine Handler. This ISR
+*               handler MUST service and clear all necessary and enabled interrupt events for
+*               the device.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*               ---
+*
+*               type    Network Interface defined argument representing the type of ISR in progress. Codes
+*                       for Rx, Tx, Overrun, Jabber, etc... are defined within net_if.h and are passed
+*                       into this function by the corresponding Net BSP ISR handler function. The Net
+*                       BSP ISR handler function may be called by a specific ISR vector and therefore
+*                       know which ISR type code to pass.  Otherwise, the Net BSP may pass
+*                       NET_DEV_ISR_TYPE_UNKNOWN and the device driver MAY ignore the parameter when
+*                       the ISR type can be deduced by reading an available interrupt status register.
+*
+*                       Type codes that are defined within net_if.c include but are not limited to :
+*
+*                           NET_DEV_ISR_TYPE_RX
+*                           NET_DEV_ISR_TYPE_TX_COMPLETE
+*                           NET_DEV_ISR_TYPE_UNKNOWN
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Specific first- or second-level BSP ISR handler.
+*
+* Note(s)     : (1) This function is called via function pointer from the context of an ISR.
+*
+*               (2) In the case of an interrupt occurring prior to Network Protocol Stack initialization,
+*                   the device driver should ensure that the interrupt source is cleared in order
+*                   to prevent the potential for an infinite interrupt loop during system initialization.
+*
+*               (3) Many devices generate only one interrupt event for several ready frames.  In
+*                   descriptors.  In order to accommodate this, it is recommended that all DMA based
+*                   drivers count the number of ready receive descriptors during the receive event
+*                   and signal the receive task for ONLY newly received descriptors which have not
+*                   yet been signaled for during the last receive interrupt event.
+*
+*               (4) Many DMA devices generate only one interrupt event for several transmit
+*                   complete descriptors.  In this case, the driver MUST determine which descriptors
+*                   have completed transmission and post each descriptor data area address to
+*                   the transmit deallocation task.  The code provided below assumes one
+*                   interrupt per transmit event which may not necessarily be the case for all
+*                   devices.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_ISR_Handler (NET_IF            *pif,
+                                  NET_DEV_ISR_TYPE   type)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV_DATA       *pdev_data;
+    NET_DEV            *pdev;
+    CPU_DATA            reg_val;
+    CPU_INT08U         *p_data;
+    NET_ERR             err;
+
+
+   (void)&type;                                                 /* Prevent 'variable unused' compiler warning.          */
+
+
+                                                                /* -- OBTAIN REFERENCE TO DEVICE CFG/DATA/REGISTERS --- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev_data = (NET_DEV_DATA      *)pif->Dev_Data;             /* Obtain ptr to dev data area.                         */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* --------------- DETERMINE ISR TYPE ----------------- */
+    reg_val = pdev->ISR;
+
+                                                                /* ------------------ HANDLE RX ISRs ------------------ */
+    if ((reg_val & RX_ISR_EVENT_MSK) > 0) {
+         NetIF_RxTaskSignal(pif->Nbr, &err);                    /* Signal Net IF RxQ Task for each new rdy descriptor.  */
+          switch (err) {
+              case NET_IF_ERR_NONE:
+                   break;
+
+                 case NET_IF_ERR_RX_Q_FULL:
+                 case NET_IF_ERR_RX_Q_SIGNAL_FAULT:
+                 default:
+                      break;
+         }
+
+         pdev->ISR |= RX_ISR_EVENT_MSK;                         /* Clear device Rx interrupt event flag.                */
+    }
+
+
+                                                                /* ------------------ HANDLE TX ISRs ------------------ */
+    if ((reg_val & TX_ISR_EVENT_MSK) > 0) {
+         NET_CTR_STAT_INC(pdev_data->StatTxPktCtr);             /* Increment Tx Pkt ctr.                                */
+         p_data = (CPU_INT08U *)pdev_data->TxBufCompPtr;
+         NetIF_TxDeallocTaskPost(p_data, &err);
+         NetIF_DevTxRdySignal(pif);                             /* Signal Net IF that Tx resources are available.       */
+
+         pdev->ISR |= TX_ISR_EVENT_MSK;                         /* Clear device Tx interrupt event flag.                */
+    }
+
+
+                                                                /* ---------------- HANDLE MISC ISRs ------------------ */
+    pdev->ISR |= UNHANDLED_ISR_EVENT_MASK;                      /* Clear unhandled interrupt event flag.                */
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_IO_Ctrl()
+*
+* Description : This function provides a mechanism for the Phy driver to update the MAC link
+*               and duplex settings, as well as a method for the application and link state
+*               timer to obtain the current link status.  Additional user specified driver
+*               functionality MAY be added if necessary.
+*
+* Argument(s) : pif     Pointer to interface requiring service.
+*
+*               opt     Option code representing desired function to perform. The Network Protocol Suite
+*                       specifies the option codes below. Additional option codes may be defined by the
+*                       driver developer in the driver's header file.
+*                           NET_IF_IO_CTRL_LINK_STATE_GET
+*                           NET_IF_IO_CTRL_LINK_STATE_UPDATE
+*
+*                       Driver defined operation codes MUST be defined starting from 20 or higher
+*                       to prevent clashing with the pre-defined operation code types. See the
+*                       device driver header file for more details.
+*
+*               data    Pointer to optional data for either sending or receiving additional function
+*                       arguments or return data.
+*
+*               perr    Pointer to return error code.
+*                           NET_IF_ERR_INVALID_IO_CTRL_OPT      Invalid option number specified.
+*                           NET_ERR_FAULT_NULL_FNCT             Null interface function pointer encountered.
+*
+*                           NET_DEV_ERR_NONE                    IO Ctrl operation completed successfully.
+*                           NET_DEV_ERR_NULL_PTR                Null argument pointer passed.
+*
+*                           NET_PHY_ERR_NULL_PTR                Pointer argument(s) passed NULL pointer(s).
+*                           NET_PHY_ERR_TIMEOUT_RESET           Phy reset          time-out.
+*                           NET_PHY_ERR_TIMEOUT_AUTO_NEG        Auto-Negotiation   time-out.
+*                           NET_PHY_ERR_TIMEOUT_REG_RD          Phy register read  time-out.
+*                           NET_PHY_ERR_TIMEOUT_REG_WR          Phy register write time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IO_CtrlHandler() via 'pdev_api->IO_Ctrl()',
+*               NetPhy_LinkStateGet()        via 'pdev_api->IO_Ctrl()'.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_IO_Ctrl (NET_IF      *pif,
+                              CPU_INT08U   opt,
+                              void        *p_data,
+                              NET_ERR     *perr)
+{
+    NET_DEV_LINK_ETHER  *plink_state;
+    NET_DEV_CFG_ETHER   *pdev_cfg;
+    NET_DEV             *pdev;
+    NET_PHY_API_ETHER   *pphy_api;
+    CPU_INT16U           duplex;
+    CPU_INT16U           spd;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+                                                                /* ----------- PERFORM SPECIFIED OPERATION ------------ */
+    switch (opt) {
+        case NET_IF_IO_CTRL_LINK_STATE_GET_INFO:
+             plink_state = (NET_DEV_LINK_ETHER *)p_data;
+             if (plink_state == (NET_DEV_LINK_ETHER *)0) {
+                *perr = NET_DEV_ERR_NULL_PTR;
+                 return;
+             }
+             pphy_api = (NET_PHY_API_ETHER *)pif->Ext_API;
+             if (pphy_api == (void *)0) {
+                *perr = NET_ERR_FAULT_NULL_FNCT;
+                 return;
+             }
+             pphy_api->LinkStateGet(pif, plink_state, perr);
+             if (*perr != NET_PHY_ERR_NONE) {
+                  return;
+             }
+            *perr = NET_DEV_ERR_NONE;
+             break;
+
+
+        case NET_IF_IO_CTRL_LINK_STATE_UPDATE:
+             plink_state = (NET_DEV_LINK_ETHER *)p_data;
+
+             duplex = NET_PHY_DUPLEX_UNKNOWN;
+             if (plink_state->Duplex != duplex) {
+                 switch (plink_state->Duplex) {                 /* TODO Update duplex register setting on device.       */
+                    case NET_PHY_DUPLEX_FULL:
+                         pdev->CTRL |=  0x01;                   /* Example device reg write to update link duplex.      */
+                         break;
+
+                    case NET_PHY_DUPLEX_HALF:
+                         pdev->CTRL &= ~0x01;                   /* Example device reg write to update link duplex.      */
+                         break;
+
+                    default:
+                         break;
+                 }
+             }
+
+             spd = NET_PHY_SPD_0;
+             if (plink_state->Spd != spd) {
+                 switch (plink_state->Spd) {                    /* TODO Update speed register setting on device.        */
+                    case NET_PHY_SPD_10:
+                         pdev->CTRL &= ~0x10;                   /* Example device reg write to update MAC link spd.     */
+                         break;
+
+                    case NET_PHY_SPD_100:
+                         pdev->CTRL |=  0x10;                   /* Example device reg write to update MAC link spd.     */
+                         break;
+
+                    case NET_PHY_SPD_1000:
+                         break;
+
+                    default:
+                         break;
+                 }
+             }
+            *perr = NET_DEV_ERR_NONE;
+             break;
+
+
+        default:
+            *perr = NET_IF_ERR_INVALID_IO_CTRL_OPT;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_MII_Rd()
+*
+* Description : Write data over the (R)MII bus to the specified Phy register.
+*
+* Argument(s) : pif         Pointer to the interface requiring service.
+*
+*               phy_addr   (R)MII bus address of the Phy requiring service.
+*
+*               reg_addr    Phy register number to write to.
+*
+*               p_data      Pointer to variable to store returned register data.
+*
+*               perr    Pointer to return error code.
+*                           NET_DEV_ERR_NULL_PTR            Pointer argument(s) passed NULL pointer(s).
+*                           NET_PHY_ERR_NONE                MII write completed successfully.
+*                           NET_PHY_ERR_TIMEOUT_REG_RD      Register read time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various Phy functions.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_MII_Rd (NET_IF      *pif,
+                             CPU_INT08U   phy_addr,
+                             CPU_INT08U   reg_addr,
+                             CPU_INT16U  *p_data,
+                             NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV            *pdev;
+    CPU_INT32U          timeout;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_data == (CPU_INT16U *)0) {
+       *perr    =  NET_DEV_ERR_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ------------ PERFORM MII READ OPERATION ------------ */
+   (void)&pdev;                                                 /* Prevent possible 'variable unused' warnings.         */
+   (void)&timeout;
+
+   *perr = NET_PHY_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_MII_Wr()
+*
+* Description : Write data over the (R)MII bus to the specified Phy register.
+*
+* Argument(s) : pif         Pointer to the interface requiring service.
+*
+*               phy_addr   (R)MII bus address of the Phy requiring service.
+*
+*               reg_addr    Phy register number to write to.
+*
+*               data        Data to write to the specified Phy register.
+*
+*               perr    Pointer to return error code.
+*                           NET_PHY_ERR_NONE                MII write completed successfully.
+*                           NET_PHY_ERR_TIMEOUT_REG_WR      Register write time-out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various Phy functions.
+*
+* Note(s)     : (1) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_MII_Wr (NET_IF      *pif,
+                             CPU_INT08U   phy_addr,
+                             CPU_INT08U   reg_addr,
+                             CPU_INT16U   data,
+                             NET_ERR     *perr)
+{
+    NET_DEV_CFG_ETHER  *pdev_cfg;
+    NET_DEV            *pdev;
+    CPU_INT32U          timeout;
+
+
+                                                                /* ------- OBTAIN REFERENCE TO DEVICE REGISTERS ------- */
+    pdev_cfg  = (NET_DEV_CFG_ETHER *)pif->Dev_Cfg;              /* Obtain ptr to the dev cfg struct.                    */
+    pdev      = (NET_DEV           *)pdev_cfg->BaseAddr;        /* Overlay dev reg struct on top of dev base addr.      */
+
+
+                                                                /* ------------ PERFORM MII READ OPERATION ------------ */
+   (void)&pdev;                                                 /* Prevent possible 'variable unused' warnings.         */
+   (void)&timeout;
+
+   *perr = NET_PHY_ERR_NONE;
+}
+
+#endif  /* NET_IF_ETHER_MODULE_EN */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_pio.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_pio.h
new file mode 100644
index 0000000..9cd23eb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_pio.h
@@ -0,0 +1,86 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                                   ETHERNET PARALLEL I/O TEMPLATE
+*
+* Filename      : net_dev_ether_template_pio.h
+* Version       : V3.04.02
+* Programmer(s) : EHS
+*                 FGK
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.20.00 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DEV_TEMPLATE_ETHER_PIO_MODULE_PRESENT
+#define  NET_DEV_TEMPLATE_ETHER_PIO_MODULE_PRESENT
+
+#include  
+#ifdef   NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_API_ETHER  NetDev_API_TemplateEtherPIO;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_ETHER_MODULE_EN                    */
+#endif  /* NET_DEV_TEMPLATE_ETHER_PIO_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/XIL_ETHER_LITE/net_dev_xil_ether_lite.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/XIL_ETHER_LITE/net_dev_xil_ether_lite.h
new file mode 100644
index 0000000..07a6b11
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/XIL_ETHER_LITE/net_dev_xil_ether_lite.h
@@ -0,0 +1,85 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                                       XILINX AXI ETHERNET LITE
+*
+* Filename      : net_dev_xil_ether_lite.h
+* Version       : V3.02.00.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.20.00 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DEV_XIL_ETHER_LITE_MODULE_PRESENT
+#define  NET_DEV_XIL_ETHER_LITE_MODULE_PRESENT
+
+#include  
+#ifdef   NET_IF_ETHER_MODULE_EN
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_API_ETHER  NetDev_API_XIL_ETHER_LITE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_ETHER_MODULE_EN                    */
+#endif  /* NET_DEV_XIL_ETHER_LITE_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/XPS_LL_EMAC/net_dev_xps_ll_temac_dma.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/XPS_LL_EMAC/net_dev_xps_ll_temac_dma.h
new file mode 100644
index 0000000..a50b699
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/XPS_LL_EMAC/net_dev_xps_ll_temac_dma.h
@@ -0,0 +1,145 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                            Xilinx Local Link Hard TEMAC Driver (Mode DMA)
+*                                    Support Both Soft and Hard DMA
+*
+* Filename      : net_dev_xps_ll_temac_dma.h
+* Version       : V3.03.01.00
+* Programmer(s) : AHFAI
+*                 NB
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.20.00 (or more recent version) is included in the project build.
+*
+*                 (2) This driver version does not support the extended Multicast mode.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DEV_XPS_LL_TEMAC_MODULE_PRESENT
+#define  NET_DEV_XPS_LL_TEMAC_MODULE_PRESENT
+
+#include  
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*                                      DEVICE DRIVER ERROR CODES
+*
+* Note(s) : (1) ALL device-independent error codes #define'd in      'net_err.h';
+*               ALL device-specific    error codes #define'd in this 'net_dev_&&&.h'.
+*
+*           (2) Network error code '11,000' series reserved for network device drivers.
+*               See 'net_err.h  NETWORK DEVICE ERROR CODES' to ensure that device-specific
+*               error codes do NOT conflict with device-independent error codes.
+*********************************************************************************************************
+*/
+
+#define  NET_DEV_MCAST_TAB_ERR_RD                      11600u   /* Multicast tbl rd err.                                */
+#define  NET_DEV_ERR_RST                               11700u   /* EMAC reset failed.                                   */
+
+
+/*
+*********************************************************************************************************
+*                       XPS_LL_TEMAC (ETHERNET) DEVICE BSP INTERFACE DATA TYPE
+*
+* Note(s) : (1) (a) The XPS_LL_TEMAC device board-support package (BSP) interface data type is a specific
+*                   Ethernet device BSP interface data type definition which SHOULD define ALL Ethernet
+*                   device BSP functions, synchronized in both the sequential order of the functions &
+*                   argument lists for each function.
+*
+*                   Thus, ANY modification to the sequential order or argument lists of the BSP functions
+*                   SHOULD be appropriately synchronized between the Ethernet device BSP interface data
+*                   type & the XPS_LL_TEMAC device BSP interface data type/instantiations.
+*
+*                   However, the XPS_LL_TEMAC device BSP interface data types/instantiations MAY (& do)
+*                   include additional BSP functions after all generic Ethernet device BSP functions.
+*
+*               (b) A specific XPS_LL_TEMAC device BSP interface instantiation MAY define NULL functions
+*                   for any (or all) BSP functions provided that the XPS_LL_TEMAC device driver does NOT
+*                   require those specific BSP function(s).
+*
+*               See also 'net_if_ether.h  ETHERNET DEVICE BSP INTERFACE DATA TYPE  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                                /* --------------- XPS_LL_TEMAC DEV BSP --------------- */
+                                                                /* XPS_LL_TEMAC dev BSP fnct ptrs :                     */
+typedef  struct  net_dev_bsp_xps_ll_temac_dma {
+    void        (*CfgClk)     (NET_IF      *pif,                /* Cfg dev clk(s).                                      */
+                               NET_ERR     *perr);
+
+    void        (*CfgIntCtrl) (NET_IF      *pif,                /* Cfg dev int ctrl(s).                                 */
+                               NET_ERR     *perr);
+
+    void        (*CfgGPIO)    (NET_IF      *pif,                /* Cfg dev GPIO.                                        */
+                               NET_ERR     *perr);
+
+
+    CPU_INT32U  (*ClkFreqGet) (NET_IF      *pif,                /* Get dev clk freq.                                    */
+                               NET_ERR     *perr);
+
+
+    CPU_ADDR    (*DMA_AddrGet)(void);                           /* Get dev DMA base addr.                               */
+
+    CPU_INT32U  (*DMA_Rd32)   (CPU_INT32U   addr);              /* Rd data from mem addr.                               */
+
+    void        (*DMA_Wr32)   (CPU_INT32U   addr,               /* Wr data to   mem addr.                               */
+                               CPU_INT32U   data);
+
+} NET_DEV_BSP_XPS_LL_TEMAC_DMA;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_API_ETHER  NetDev_API_XPS_LL_TEMAC_DMA;
+
+
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif /* NET_IF_ETHER_MODULE_EN              */
+#endif /* NET_DEV_XPS_LL_TEMAC_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Manager/Generic/net_wifi_mgr.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Manager/Generic/net_wifi_mgr.c
new file mode 100644
index 0000000..06dd91d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Manager/Generic/net_wifi_mgr.c
@@ -0,0 +1,1555 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK WIRELESS MANAGER
+*
+*                                              WIFI MANAGER
+*
+* Filename      : net_wifi_mgr.c
+* Version       : V3.03.01
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.12.00 (or more recent version) is included in the project build.
+*
+*                 (2) The wireless hardware used with this wireless manager is assumed to embed the wireless
+*                     supplicant within the wireless hardware and provide common command.
+*
+*                 (3) Interrupt support is hardware specific, therefore the generic wireless manager does NOT
+*                     support interrupts.  However, interrupt support is easily added to the generic Wireless
+*                     manager & thus the ISR handler has been prototyped & populated within the function
+*                     pointer structure for example purposes.
+
+*                 (4) REQUIREs the following network protocol files in network directories :
+*
+*                     (a) (1) Wireless Network Interface Layer
+*
+*                           Located in the following network directory
+*
+*                               \\IF\
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_WIFI_MGR_MODULE
+#include  "../../../../IF/net_if.h"
+#include  "../../../../IF/net_if_wifi.h"
+#include  "net_wifi_mgr.h"
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_WIFI_MGR_LOCK_OBJ_NAME          "WiFi Mgr Lock"
+#define  NET_WIFI_MGR_RESP_OBJ_NAME          "WiFi Mgr MGMT Response"
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void         NetWiFiMgr_Init           (       NET_IF               *p_if,
+                                                       NET_ERR              *p_err);
+
+static  void         NetWiFiMgr_Start          (       NET_IF               *p_if,
+                                                       NET_ERR              *p_err);
+
+static  void         NetWiFiMgr_Stop           (       NET_IF               *p_if,
+                                                       NET_ERR              *p_err);
+
+static  CPU_INT16U   NetWiFiMgr_AP_Scan        (       NET_IF               *p_if,
+                                                       NET_IF_WIFI_AP       *p_buf_scan,
+                                                       CPU_INT16U            scan_len_max,
+                                                const  NET_IF_WIFI_SSID     *p_ssid,
+                                                       NET_IF_WIFI_CH        ch,
+                                                       NET_ERR              *p_err);
+
+static  void         NetWiFiMgr_AP_Join        (       NET_IF               *p_if,
+                                                const  NET_IF_WIFI_AP_CFG   *p_ap_cfg,
+                                                       NET_ERR              *p_err);
+
+static  void         NetWiFiMgr_AP_Leave       (       NET_IF               *p_if,
+                                                       NET_ERR              *p_err);
+
+static  void         NetWiFiMgr_IO_Ctrl        (       NET_IF               *p_if,
+                                                       CPU_INT08U            opt,
+                                                       void                 *p_data,
+                                                       NET_ERR              *p_err);
+
+static  CPU_INT32U   NetWiFiMgr_Mgmt           (       NET_IF               *p_if,
+                                                       NET_IF_WIFI_CMD       cmd,
+                                                       CPU_INT08U           *p_buf_cmd,
+                                                       CPU_INT16U            buf_cmd_len,
+                                                       CPU_INT08U           *p_buf_rtn,
+                                                       CPU_INT16U            buf_rtn_len_max,
+                                                       NET_ERR              *p_err);
+
+
+static  CPU_INT32U   NetWiFiMgr_MgmtHandler    (       NET_IF               *p_if,
+                                                       NET_IF_WIFI_CMD       cmd,
+                                                       CPU_INT08U           *p_buf_cmd,
+                                                       CPU_INT16U            buf_cmd_len,
+                                                       CPU_INT08U           *p_buf_rtn,
+                                                       CPU_INT16U            buf_rtn_len_max,
+                                                       NET_ERR              *p_err);
+
+static  void         NetWiFiMgr_Signal         (       NET_IF               *p_if,
+                                                       NET_BUF              *p_buf,
+                                                       NET_ERR              *p_err);
+
+static  void         NetWiFiMgr_LockAcquire    (       KAL_LOCK_HANDLE       lock,
+                                                       NET_ERR              *p_err);
+
+static  void         NetWiFiMgr_LockRelease    (       KAL_LOCK_HANDLE       lock);
+
+static  void         NetWiFiMgr_AP_Create      (       NET_IF                *p_if,
+                                                const  NET_IF_WIFI_AP_CFG    *p_ap_cfg,
+                                                       NET_ERR               *p_err);
+
+static  CPU_INT16U   NetWiFiMgr_AP_GetPeerInfo (       NET_IF                *p_if,
+                                                const  NET_IF_WIFI_PEER      *p_buf_peer,
+                                                       CPU_INT16U             peer_info_len_max,
+                                                       NET_ERR               *p_err);
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+                                                                                /* WiFi Mgr API fnct ptrs :             */
+const  NET_WIFI_MGR_API  NetWiFiMgr_API_Generic = {
+                                                   &NetWiFiMgr_Init,            /*   Init/add                           */
+                                                   &NetWiFiMgr_Start,           /*   Start                              */
+                                                   &NetWiFiMgr_Stop,            /*   Stop                               */
+                                                   &NetWiFiMgr_AP_Scan,         /*   Scan                               */
+                                                   &NetWiFiMgr_AP_Join,         /*   Join                               */
+                                                   &NetWiFiMgr_AP_Leave,        /*   Leave                              */
+                                                   &NetWiFiMgr_IO_Ctrl,         /*   IO Ctrl                            */
+                                                   &NetWiFiMgr_Mgmt,            /*   Mgmt                               */
+                                                   &NetWiFiMgr_Signal,          /*   Signal                             */
+                                                   &NetWiFiMgr_AP_Create,       /*   Create                             */
+                                                   &NetWiFiMgr_AP_GetPeerInfo,  /*   GetClientInfo                      */
+                                                  };
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          NetWiFiMgr_Init()
+*
+* Description : (1) Initialize wireless manager layer.
+*
+*                   (a) Allocate memory for manager object
+*                   (b) Initalize wireless  manager lock
+*                   (c) Initalize wireless  manager Response Signal
+*
+*
+* Argument(s) : p_if    Pointer to interface to initialize Wifi manager.
+*               ----    Argument validated in NetIF_IF_Add().
+*
+*               p_err           Pointer to variable  that will receive the return error code from this function :
+*
+*                                   NET_WIFI_MGR_ERR_NONE           Wireless manager        successfully      initialized.
+*                                   NET_WIFI_MGR_ERR_MEM_ALLOC      Wireless manager memory allocatation      failed.
+*
+*                                                                   ----- RETURNED BY 'NetOS_WiFiMgr_LockInit()' : -----
+*                                   NET_OS_ERR_LOCK_INIT            Wireless manager lock      NOT            initialized.
+*                                   NET_OS_ERR_INIT_SIGNAL_NAME     Wireless manager lock name NOT            initialized.
+*
+*                                                                   ----- RETURNED BY 'NetOS_WiFiMgr_RespInit()' : -----
+*                                   NET_OS_ERR_INIT_SIGNAL          Response signal object NOT successfully   initialized.
+*                                   NET_OS_ERR_INIT_SIGNAL_NAME     Response signal name   NOT successfully   initialized.
+*                                   NET_WIFI_MGR_ERR_INIT_OS        Wireless manager os object    initializati   on failed.
+*
+* Return(s)   : none
+*
+* Caller(s)   : NetIF_WiFi_IF_Add() via 'p_mgr_api->Init()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Wireless manager initialization occurs only when the interface is added.
+*                       See 'net_if_wifi.c  NetIF_WiFi_IF_Add()'.
+*********************************************************************************************************
+*/
+
+static  void  NetWiFiMgr_Init(NET_IF   *p_if,
+                              NET_ERR  *p_err)
+{
+    NET_DEV_CFG_WIFI   *p_cfg;
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+    CPU_SIZE_T          size;
+    CPU_SIZE_T          reqd_octets;
+    KAL_ERR             kal_err;
+    LIB_ERR             err_lib;
+
+
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+
+
+                                                                /* ----------- ALLOCATE WIFI MGR DATA AREA ------------ */
+    size           =  sizeof(NET_WIFI_MGR_DATA);
+    p_if->Ext_Data =  Mem_HeapAlloc(size,
+                                   (CPU_SIZE_T  ) sizeof(void *),
+                                   &reqd_octets,
+                                   &err_lib);
+    if (p_if->Ext_Data == (void *)0) {
+       *p_err = NET_WIFI_MGR_ERR_MEM_ALLOC;
+        goto exit;
+    }
+
+    p_mgr_data = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+
+
+                                                                /* ---------------- INIT WIFI MGR LOCK ---------------- */
+    p_mgr_data->MgrLock = KAL_LockCreate(NET_WIFI_MGR_LOCK_OBJ_NAME, DEF_NULL, &kal_err);
+    switch (kal_err) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_WIFI_MGR_ERR_MEM_ALLOC;
+             goto exit;
+
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_WIFI_MGR_ERR_LOCK_CREATE;
+             goto exit;
+    }
+
+
+    p_cfg = (NET_DEV_CFG_WIFI *)p_if->Dev_Cfg;
+
+                                                                /* --------------- INIT WIFI MGR SIGNAL --------------- */
+    p_mgr_data->MgmtSignalResp = KAL_QCreate(NET_WIFI_MGR_RESP_OBJ_NAME,
+                                             p_cfg->RxBufLargeNbr,
+                                             DEF_NULL,
+                                            &kal_err);
+    switch (kal_err) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_WIFI_MGR_ERR_MEM_ALLOC;
+             goto exit_delete_lock;
+
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_WIFI_MGR_ERR_RESP_SIGNAL_CREATE;
+             goto exit_delete_lock;
+    }
+
+
+    p_mgr_data->DevStarted = DEF_NO;
+    p_mgr_data->AP_Joined  = DEF_NO;
+    p_mgr_data->AP_Created = DEF_NO;
+
+    goto exit;
+
+
+exit_delete_lock:
+    KAL_LockDel(p_mgr_data->MgrLock, &kal_err);
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetWiFiMgr_Start()
+*
+* Description : Start wireless manager of the interface.
+*
+* Argument(s) : p_if    Pointer to interface to Start wireless manager.
+*               ----    Argument validated in NetIF_IF_Start().
+*
+*               p_err           Pointer to variable  that will receive the return error code from this function :
+*
+*                               NET_WIFI_MGR_ERR_NONE           Wireless manager for the interface successfully
+*                                                                   started.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_WiFi_IF_Start() via 'p_mgr_api->Start()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Wireless manager start occurs each time the interface is started.
+*                       See 'net_if_wifi.c  NetIF_WiFi_IF_Start()'.
+*********************************************************************************************************
+*/
+
+static  void  NetWiFiMgr_Start (NET_IF   *p_if,
+                                NET_ERR  *p_err)
+{
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+
+
+    p_mgr_data             = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+    p_mgr_data->DevStarted =  DEF_YES;
+
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetWiFiMgr_Stop()
+*
+* Description : Shutdown wireless manager of the interface.
+*
+* Argument(s) : p_if    Pointer to interface to Start Wifi manager.
+*               ----    Argument validated in NetIF_Stop().
+*
+*               p_err           Pointer to variable  that will receive the return error code from this function :
+*
+*                               NET_WIFI_MGR_ERR_NONE           Wireless manager for the interface successfully
+*                                                                   stopped.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_WiFi_IF_Stop() via 'p_mgr_api->Stop()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Wireless manager stop occurs each time the interface is stopped.
+*                       See 'net_if_wifi.c  NetIF_WiFi_IF_Stop()'.
+*********************************************************************************************************
+*/
+
+static  void  NetWiFiMgr_Stop (NET_IF   *p_if,
+                               NET_ERR  *p_err)
+{
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+
+
+    p_mgr_data             = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+    p_mgr_data->DevStarted =  DEF_NO;
+
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetWiFiMgr_AP_Scan()
+*
+* Description : (1) Scan for available wireless network by the interface:
+*
+*                   (a) Release network          lock
+*                   (b) Acquire wireless manager lock
+*                   (c) Acquire network          lock
+*                   (d) Send scan command and get result
+*                   (e) Release network          lock
+*                   (f) Release wireless manager lock
+*
+*
+* Argument(s) : p_if            Pointer to interface to Scan with.
+*               ----            Argument validated in NetIF_WiFi_Scan().
+*
+*               p_buf_scan      Pointer to table that will receive the return network found.
+*
+*               scan_len_max    Length of the scan buffer (i.e. Number of network that can be found).
+*
+*               p_ssid          Pointer to variable that contains the SSID to scan for.
+*
+*               ch              The wireless channel to scan.
+*               --              Argument checked in NetSock_CfgTimeoutTxQ_Get_ms().
+*
+*                                   NET_IF_WIFI_CH_ALL         Scan Wireless network for all channel.
+*                                   NET_IF_WIFI_CH_1           Scan Wireless network on channel 1.
+*                                   NET_IF_WIFI_CH_2           Scan Wireless network on channel 2.
+*                                   NET_IF_WIFI_CH_3           Scan Wireless network on channel 3.
+*                                   NET_IF_WIFI_CH_4           Scan Wireless network on channel 4.
+*                                   NET_IF_WIFI_CH_5           Scan Wireless network on channel 5.
+*                                   NET_IF_WIFI_CH_6           Scan Wireless network on channel 6.
+*                                   NET_IF_WIFI_CH_7           Scan Wireless network on channel 7.
+*                                   NET_IF_WIFI_CH_8           Scan Wireless network on channel 8.
+*                                   NET_IF_WIFI_CH_9           Scan Wireless network on channel 9.
+*                                   NET_IF_WIFI_CH_10          Scan Wireless network on channel 10.
+*                                   NET_IF_WIFI_CH_11          Scan Wireless network on channel 11.
+*                                   NET_IF_WIFI_CH_12          Scan Wireless network on channel 12.
+*                                   NET_IF_WIFI_CH_13          Scan Wireless network on channel 13.
+*                                   NET_IF_WIFI_CH_14          Scan Wireless network on channel 14.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_WIFI_MGR_ERR_NONE                   Wireless manager cmd successufully executed.
+*                                   NET_WIFI_MGR_ERR_NOT_STARTED            Wireless manager NOT started.
+*
+*                                                                           --- RETURNED BY 'NetOS_WiFiMgr_Lock()' : ---
+*                                   NET_WIFI_MGR_ERR_LOCK                   Wireless manager access NOT acquired.
+*
+*                                                                           - RETURNED BY 'NetWiFiMgr_MgmtHandler()' : -
+*                                   NET_WIFI_MGR_ERR_CMD_FAULT              Management command  fault.
+*                                   NET_WIFI_MGR_ERR_RESP_FAULT             Management response fault.
+*                                   NET_WIFI_MGR_ERR_RESP_SIGNAL_TIMEOUT    Wireless manager response signal timeout.
+
+*
+* Return(s)   : Number of wireless network found, if any.
+*
+*               0,                                otherwise.
+*
+* Caller(s)   : NetIF_WiFi_IF_Scan() via 'p_mgr_api->Scan()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  NetWiFiMgr_AP_Scan (       NET_IF            *p_if,
+                                               NET_IF_WIFI_AP    *p_buf_scan,
+                                               CPU_INT16U         scan_len_max,
+                                        const  NET_IF_WIFI_SSID  *p_ssid,
+                                               NET_IF_WIFI_CH     ch,
+                                               NET_ERR           *p_err)
+{
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+    NET_IF_WIFI_SCAN    scan;
+    CPU_INT08U         *p_buf_cmd;
+    CPU_INT08U         *p_buf_rtn;
+    CPU_INT16U          len;
+    CPU_INT32U          rtn_len;
+    NET_ERR             err;
+
+    p_mgr_data = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+    if (p_mgr_data->DevStarted != DEF_YES) {
+       *p_err = NET_WIFI_MGR_ERR_NOT_STARTED;
+        return (0);
+    }
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+                                                                /* -------------- ACQUIRE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockAcquire(p_mgr_data->MgrLock,
+                           p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+          return(0);
+    }
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetWiFiMgr_AP_Scan, &err);
+    if (err != NET_ERR_NONE) {
+       *p_err = NET_WIFI_MGR_ERR_LOCK_ACQUIRE;
+        return(0);
+    }
+
+                                                                /* ----------- SEND SCAN CMD AND GET RESULT ----------- */
+    Mem_Clr(&scan.SSID, sizeof(scan.SSID));
+    if (p_ssid != (NET_IF_WIFI_SSID *)0) {
+        Str_Copy_N((      CPU_CHAR *)&scan.SSID,
+                   (const CPU_CHAR *) p_ssid,
+                                      sizeof(scan.SSID));
+    }
+
+    scan.Ch   =  ch;
+    len       =  scan_len_max * sizeof(NET_IF_WIFI_AP);
+    p_buf_cmd = (CPU_INT08U *)&scan;
+    p_buf_rtn = (CPU_INT08U *) p_buf_scan;
+    rtn_len   =  NetWiFiMgr_MgmtHandler(p_if,
+                                        NET_IF_WIFI_CMD_SCAN,
+                                        p_buf_cmd,
+                                        sizeof(scan),
+                                        p_buf_rtn,
+                                        len,
+                                        p_err);
+
+                                                                /* -------------- RELEASE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockRelease(p_mgr_data->MgrLock);
+
+
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+         return (0);
+    }
+
+    len = rtn_len / sizeof(NET_IF_WIFI_AP);
+
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+
+    return (len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetWiFiMgr_AP_Join()
+*
+* Description : Join wireless network:
+*
+*                   (a) Release network          lock
+*                   (b) Acquire wireless manager lock
+*                   (c) Acquire network          lock
+*                   (d) Send 'Join' command and get result
+*                   (e) Release network          lock
+*                   (f) Release wireless manager lock
+*
+*
+* Argument(s) : p_if    Pointer to interface to join with.
+*               ----    Argument validated in NetIF_WiFi_Join().
+*
+*               p_join  Pointer to variable that contains the wireless network to join.
+*               ------  Argument validated in NetIF_WiFi_Join().
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_WIFI_MGR_ERR_NONE                   Wireless manager cmd successufully executed.
+*                                   NET_WIFI_MGR_ERR_NOT_STARTED            Wireless manager NOT started.
+*
+*                                                                           --- RETURNED BY 'NetOS_WiFiMgr_Lock()' : ---
+*                                   NET_WIFI_MGR_ERR_LOCK                   Wireless manager access NOT acquired.
+*
+*                                                                           - RETURNED BY 'NetWiFiMgr_MgmtHandler()' : -
+*                                   NET_WIFI_MGR_ERR_CMD_FAULT              Management command  fault.
+*                                   NET_WIFI_MGR_ERR_RESP_FAULT             Management response fault.
+*                                   NET_WIFI_MGR_ERR_RESP_SIGNAL_TIMEOUT    Wireless manager response signal timeout.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_WiFi_Join() via 'p_mgr_api->Join()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetWiFiMgr_AP_Join (       NET_IF               *p_if,
+                                  const  NET_IF_WIFI_AP_CFG   *p_ap_cfg,
+                                         NET_ERR              *p_err)
+{
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+    CPU_INT08U         *p_buf_cmd;
+    CPU_INT16U          buf_data_len;
+    NET_ERR             err;
+
+
+    p_mgr_data = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+    if (p_mgr_data->DevStarted != DEF_YES) {
+       *p_err = NET_WIFI_MGR_ERR_NOT_STARTED;
+        return;
+    }
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+                                                                /* -------------- ACQUIRE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockAcquire(p_mgr_data->MgrLock,
+                           p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+          return;
+    }
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetWiFiMgr_AP_Join, &err);
+    if (err != NET_ERR_NONE) {
+       *p_err = NET_WIFI_MGR_ERR_LOCK_ACQUIRE;
+        return;
+    }
+                                                                /* ----------- SEND JOIN CMD AND GET RESULT ----------- */
+    buf_data_len = sizeof(NET_IF_WIFI_AP_CFG);
+    p_buf_cmd    = (CPU_INT08U *)p_ap_cfg;
+    (void)NetWiFiMgr_MgmtHandler(p_if,
+                                 NET_IF_WIFI_CMD_JOIN,
+                                 p_buf_cmd,
+                                 buf_data_len,
+                                 0,
+                                 0,
+                                 p_err);
+
+
+                                                                /* -------------- RELEASE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockRelease(p_mgr_data->MgrLock);
+
+
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+         return;
+    }
+
+    p_mgr_data->AP_Joined = DEF_YES;
+
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetWiFiMgr_AP_Leave()
+*
+* Description : Leave wireless network.
+*
+*                   (a) Release network          lock
+*                   (b) Acquire wireless manager lock
+*                   (c) Acquire network          lock
+*                   (d) Send 'Leave' command and get result
+*                   (e) Release network          lock
+*                   (f) Release wireless manager lock
+*
+*
+* Argument(s) : p_if            Pointer to interface to leave wireless network.
+*               ----            Argument validated in NetIF_WiFi_Leave().
+*
+*               p_err           Pointer to variable  that will receive the return error code from this function :
+*
+*                                   NET_WIFI_MGR_ERR_NONE                   Wireless manager cmd successufully executed.
+*                                   NET_WIFI_MGR_ERR_NOT_STARTED            Wireless manager NOT started.
+*
+*                                                                           --- RETURNED BY 'NetOS_WiFiMgr_Lock()' : ---
+*                                   NET_WIFI_MGR_ERR_LOCK                   Wireless manager access NOT acquired.
+*
+*                                                                           - RETURNED BY 'NetWiFiMgr_MgmtHandler()' : -
+*                                   NET_WIFI_MGR_ERR_CMD_FAULT              Management command  fault.
+*                                   NET_WIFI_MGR_ERR_RESP_FAULT             Management response fault.
+*                                   NET_WIFI_MGR_ERR_RESP_SIGNAL_TIMEOUT    Wireless manager response signal timeout.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_WiFi_Leave() via 'p_mgr_api->Leave()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetWiFiMgr_AP_Leave (NET_IF   *p_if,
+                                   NET_ERR  *p_err)
+{
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+    NET_ERR             err;
+
+    p_mgr_data = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+    if (p_mgr_data->DevStarted != DEF_YES) {
+       *p_err = NET_WIFI_MGR_ERR_NOT_STARTED;
+        return;
+    }
+
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+                                                                /* -------------- ACQUIRE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockAcquire(p_mgr_data->MgrLock,
+                           p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+          return;
+    }
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetWiFiMgr_AP_Leave, &err);
+    if (err != NET_ERR_NONE) {
+       *p_err = NET_WIFI_MGR_ERR_LOCK_ACQUIRE;
+        return;
+    }
+
+
+
+
+                                                                /* ---------- SEND LEAVE CMD AND GET RESULT ----------- */
+    (void)NetWiFiMgr_MgmtHandler(p_if,
+                                 NET_IF_WIFI_CMD_LEAVE,
+                                 0,
+                                 0,
+                                 0,
+                                 0,
+                                 p_err);
+
+
+                                                                /* -------------- RELEASE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockRelease(p_mgr_data->MgrLock);
+
+    if (*p_err == NET_WIFI_MGR_ERR_NONE) {
+         p_if->Link             = NET_IF_LINK_DOWN;
+         p_mgr_data->AP_Joined  = DEF_NO;
+         p_mgr_data->AP_Created = DEF_NO;
+    } else {
+         return;
+    }
+
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetWiFiMgr_IO_Ctrl()
+*
+* Description : Handle a wireless interface's (I/O) control(s).
+*
+* Argument(s) : p_if    Pointer to a Wireless network interface.
+*               ----    Argument validated in NetIF_IO_CtrlHandler().
+*
+*               opt     Desired I/O control option code to perform; additional control options may be
+*                       defined by the device driver :
+*               ---     Argument checked in NetIF_IO_CtrlHandler().
+*
+*                           NET_IF_IO_CTRL_LINK_STATE_GET           Get    Wireless interface's link state,
+*                                                                       'UP' or 'DOWN'.
+*                           NET_IF_IO_CTRL_LINK_STATE_GET_INFO      Get    Wireless interface's detailed
+*                                                                       link state info.
+*                           NET_IF_IO_CTRL_LINK_STATE_UPDATE        Update Wireless interface's link state.
+*
+*               p_data  Pointer to variable that will receive possible I/O control data (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_WIFI_MGR_ERR_NONE                   Wireless manager cmd successufully executed.
+*                               NET_WIFI_MGR_ERR_NOT_STARTED            Wireless manager NOT started.
+*                               NET_IF_ERR_INVALID_IO_CTRL_OPT          Invalid I/O control option.
+*                               NET_ERR_FAULT_NULL_PTR                     Argument 'p_data' passed a NULL pointer.
+*
+*                                                                       --- RETURNED BY 'NetOS_WiFiMgr_Lock()' : ---
+*                               NET_WIFI_MGR_ERR_LOCK                   Wireless manager access NOT acquired.
+*
+*                                                                       - RETURNED BY 'NetWiFiMgr_MgmtHandler()' : -
+*                               NET_WIFI_MGR_ERR_CMD_FAULT              Management command  fault.
+*                               NET_WIFI_MGR_ERR_RESP_FAULT             Management response fault.
+*                               NET_WIFI_MGR_ERR_RESP_SIGNAL_TIMEOUT    Wireless manager response signal timeout.
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_IO_CtrlHandler() via 'pif_api->IO_Ctrl()'.
+*
+* Note(s)     : (1) 'p_data' MUST point to a variable (or memory) that is sufficiently sized AND aligned
+*                    to receive any return data.
+*********************************************************************************************************
+*/
+
+static  void  NetWiFiMgr_IO_Ctrl (NET_IF      *p_if,
+                                  CPU_INT08U   opt,
+                                  void        *p_data,
+                                  NET_ERR     *p_err)
+{
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+    CPU_BOOLEAN        *p_link_state;
+    NET_ERR             err;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_data == (void *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    switch (opt) {
+        case NET_IF_IO_CTRL_LINK_STATE_GET:
+        case NET_IF_IO_CTRL_LINK_STATE_GET_INFO:
+        case NET_IF_IO_CTRL_LINK_STATE_UPDATE:
+             break;
+
+        default:
+            *p_err = NET_IF_ERR_INVALID_IO_CTRL_OPT;
+             return;
+    }
+#endif
+
+
+    p_link_state = (CPU_BOOLEAN *)p_data;
+    p_mgr_data   = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+
+    if (p_mgr_data->DevStarted != DEF_YES){
+       *p_link_state = NET_IF_LINK_DOWN;
+       *p_err        = NET_WIFI_MGR_ERR_NOT_STARTED;
+        return;
+    }
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+                                                                /* -------------- ACQUIRE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockAcquire(p_mgr_data->MgrLock,
+                           p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+          return;
+    }
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetWiFiMgr_AP_Leave, &err);
+    if (err != NET_ERR_NONE) {
+       *p_err = NET_WIFI_MGR_ERR_LOCK_ACQUIRE;
+        return;
+    }
+
+
+                                                                /* ------------- SEND CMD AND GET RESULT -------------- */
+    (void)NetWiFiMgr_MgmtHandler(p_if,
+                                 opt,
+                                 p_data,
+                                 0,
+                                 p_data,
+                                 0,
+                                 p_err);
+
+
+                                                                /* -------------- RELEASE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockRelease(p_mgr_data->MgrLock);
+
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+         return;
+    }
+
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetWiFiMgr_Mgmt()
+*
+* Description : (1) Send driver management command:
+*
+*                   (a) Acquire wireless manager lock
+*                   (b) Send management command and get result
+*                   (c) Release wireless manager lock
+*                   (d) Execute & process management command
+*
+*
+* Argument(s) : p_if                Pointer to interface to manage wireless network.
+*               ----                Argument validated in NetIF_IF_Add(),
+*                                                         NetIF_IF_Start(),
+*                                                         NetIF_RxHandler().
+*
+*               cmd                 Management command to send.
+*
+*                                       See Note #2a.
+*
+*               p_buf_cmd           Pointer to variable that contains the data to send.
+*
+*               buf_cmd_len         Length of the command buffer.
+*
+*               p_buf_rtn           Pointer to variable that will receive the data.
+*
+*               buf_rtn_len_max     Length of the return buffer.
+*
+*               p_err           Pointer to variable  that will receive the return error code from this function :
+*
+*                                   NET_WIFI_MGR_ERR_NONE                   Wireless manager cmd successufully executed.
+*
+*                                                                           --- RETURNED BY 'NetOS_WiFiMgr_Lock()' : ---
+*                                   NET_WIFI_MGR_ERR_LOCK                   Wireless manager access NOT acquired.
+*
+*                                                                           - RETURNED BY 'NetWiFiMgr_MgmtHandler()' : -
+*                                   NET_WIFI_MGR_ERR_CMD_FAULT              Management command  fault.
+*                                   NET_WIFI_MGR_ERR_RESP_FAULT             Management response fault.
+*                                   NET_WIFI_MGR_ERR_RESP_SIGNAL_TIMEOUT    Wireless manager response signal timeout.
+*
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) The driver can define and implement its own management commands which need a response by
+*                   calling the wireless manager api (p_mgr_api->Mgmt()) to send the management command and to
+*                   receive the response.
+*
+*                   (a) Driver management command code '100' series reserved for driver.
+*
+*               (3) Prior calling this function, the network lock must be acquired.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetWiFiMgr_Mgmt (NET_IF           *p_if,
+                                     NET_IF_WIFI_CMD   cmd,
+                                     CPU_INT08U       *p_buf_cmd,
+                                     CPU_INT16U        buf_cmd_len,
+                                     CPU_INT08U       *p_buf_rtn,
+                                     CPU_INT16U        buf_rtn_len_max,
+                                     NET_ERR          *p_err)
+{
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+    CPU_INT32U          rtn_len;
+    NET_ERR             err;
+
+    p_mgr_data = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+    if (p_mgr_data->DevStarted != DEF_YES) {
+       *p_err = NET_WIFI_MGR_ERR_NOT_STARTED;
+        return (0u);
+    }
+
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+                                                                /* -------------- ACQUIRE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockAcquire(p_mgr_data->MgrLock,
+                           p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+          return(0);
+    }
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetWiFiMgr_Mgmt, &err);
+    if (err != NET_ERR_NONE) {
+       *p_err = NET_WIFI_MGR_ERR_LOCK_ACQUIRE;
+        return(0);
+    }
+
+
+                                                                /* ----------- SEND MGMT CMD AND GET RESULT ----------- */
+    rtn_len = NetWiFiMgr_MgmtHandler(p_if,
+                                     cmd,
+                                     p_buf_cmd,
+                                     buf_cmd_len,
+                                     p_buf_rtn,
+                                     buf_rtn_len_max,
+                                     p_err);
+
+
+                                                                /* -------------- RELEASE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockRelease(p_mgr_data->MgrLock);
+
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+         return (rtn_len);
+    }
+
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+
+    return (rtn_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetWiFiMgr_MgmtHandler()
+*
+* Description : (1) Send mgmt command and get result:
+*
+*                   (a) Ask driver to transmit management command
+*                   (b) Release network lock
+*                   (b) Wait response
+*                   (c) Ask driver to decode the received management response
+*                   (d) Free received buffer
+*                   (e) Acquire network lock
+*
+*
+* Argument(s) : p_if                Pointer to interface to leave wireless network.
+*               ----                Argument validated in NetIF_IF_Add(),
+*                                                         NetIF_IF_Start(),
+*                                                         NetIF_RxHandler(),
+*                                                         NetIF_WiFi_Scan(),
+*                                                         NetIF_WiFi_Join(),
+*                                                         NetIF_WiFi_Leave().
+*
+*               cmd                 Management command to send.
+*               ----                Argument validated in NetWiFiMgr_AP_Scan(),
+*                                                         NetWiFiMgr_AP_Join(),
+*                                                         NetWiFiMgr_AP_Leave().
+*
+*                                       NET_IF_WIFI_CMD_SCAN                    Scan  for available Wireless network.
+*                                       NET_IF_WIFI_CMD_JOIN                    Join  a             Wireless network.
+*                                       NET_IF_WIFI_CMD_LEAVE                   Leave the           Wireless network.
+*                                       NET_IF_IO_CTRL_LINK_STATE_GET           Get    Wireless interface's link state,
+*                                                                                   'UP' or 'DOWN'.*
+*                                       NET_IF_IO_CTRL_LINK_STATE_GET_INFO      Get    Wireless interface's detailed*               p_buf_data_rx       Pointer to variable that will receive the data.
+*                                                                                   link state info.*
+*                                       NET_IF_IO_CTRL_LINK_STATE_UPDATE        Update Wireless interface's link state.
+*
+*
+*                                       See 'NetWiFiMgr_Mgmt()' Note 2a.
+*
+*
+*               p_buf_len_rx        Length of the receive buffer.
+*
+*               p_buf_data_tx       Pointer to variable that contains the data to send.
+*
+*               buf_data_tx_len     Length of the data to send.
+*
+*               p_err           Pointer to variable  that will receive the return error code from this function :
+*
+*                                   NET_WIFI_MGR_ERR_NONE                   Wireless manager command successfully
+*                                                                               completed.
+*
+*                                   NET_WIFI_MGR_ERR_CMD_FAULT              Management command  fault.
+*                                   NET_WIFI_MGR_ERR_RESP_FAULT             Management response fault.
+*
+*                                                                           - RETURNED BY 'NetOS_WiFiMgr_RespWait()' : -
+*                                   NET_WIFI_MGR_ERR_RESP_SIGNAL_TIMEOUT    Wireless manager response signal timeout.
+*
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_WiFiMgr_AP_Scan(),
+*               Net_WiFiMgr_AP_Join(),
+*               Net_WiFiMgr_AP_Leave(),
+*               Net_WiFiMgr_Mgmt().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetWiFiMgr_MgmtHandler (NET_IF           *p_if,
+                                            NET_IF_WIFI_CMD   cmd,
+                                            CPU_INT08U       *p_buf_cmd,
+                                            CPU_INT16U        buf_cmd_len,
+                                            CPU_INT08U       *p_buf_rtn,
+                                            CPU_INT16U        buf_rtn_len_max,
+                                            NET_ERR          *p_err)
+{
+    NET_DEV_API_WIFI   *p_dev_api;
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+    NET_WIFI_MGR_CTX    ctx;
+    NET_BUF            *p_buf;
+    NET_BUF_HDR        *p_hdr;
+    CPU_INT32U          rtn_len;
+    CPU_BOOLEAN         done;
+    KAL_ERR             kal_err;
+    NET_ERR             err;
+
+
+    p_dev_api  =  (NET_DEV_API_WIFI  *)p_if->Dev_API;
+    p_mgr_data =  (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+    done       =   DEF_NO;
+    rtn_len    =   0u;
+    while (done != DEF_YES) {
+                                                                /* ------------- PREPARE & SEND MGMT CMD -------------- */
+        rtn_len = p_dev_api->MgmtExecuteCmd(p_if,
+                                            cmd,
+                                           &ctx,
+                                            p_buf_cmd,
+                                            buf_cmd_len,
+                                            p_buf_rtn,
+                                            buf_rtn_len_max,
+                                            p_err);
+        if (*p_err != NET_DEV_ERR_NONE) {
+            *p_err  = NET_WIFI_MGR_ERR_CMD_FAULT;
+             goto exit;
+        }
+
+        if ((*p_err        == NET_DEV_ERR_NONE) &&
+            ( ctx.WaitResp == DEF_YES         )) {              /* If the cmd requires a resp.                          */
+
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+            Net_GlobalLockRelease();                            /* Require to rx pkt & mgmt frame.                      */
+
+
+
+                                                                /* -------------------- WAIT RESP --------------------- */
+            p_buf = (NET_BUF *)KAL_QPend(p_mgr_data->MgmtSignalResp,
+                                         KAL_OPT_PEND_NONE,
+                                         ctx.WaitRespTimeout_ms,
+                                        &kal_err);
+            switch (kal_err) {
+                case KAL_ERR_NONE:
+                     break;
+
+                case KAL_ERR_TIMEOUT:
+                    *p_err = NET_WIFI_MGR_ERR_RESP_SIGNAL_TIMEOUT;
+                     goto exit_fail_acquire_lock;
+
+                case KAL_ERR_ABORT:
+                case KAL_ERR_ISR:
+                case KAL_ERR_WOULD_BLOCK:
+                case KAL_ERR_OS:
+                default:
+                    *p_err = NET_WIFI_MGR_ERR_RESP_FAULT;
+                     goto exit_fail_acquire_lock;
+            }
+
+
+            p_hdr   = &p_buf->Hdr;
+
+                                                                /* ----------------- RX & DECODE RESP ----------------- */
+            rtn_len = p_dev_api->MgmtProcessResp(p_if,
+                                                 cmd,
+                                                &ctx,
+                                                 p_buf->DataPtr,
+                                                 p_hdr->DataLen,
+                                                 p_buf_rtn,
+                                                 buf_rtn_len_max,
+                                                 p_err);
+
+                                                                /* ------------------ FREE BUF RX'D ------------------- */
+            NetBuf_Free(p_buf);
+
+            if (*p_err != NET_DEV_ERR_NONE) {
+                *p_err  = NET_WIFI_MGR_ERR_RESP_FAULT;
+                 goto exit_acquire_lock;
+            }
+
+
+
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+            Net_GlobalLockAcquire((void *)&NetWiFiMgr_MgmtHandler, &err);
+            if (err != NET_ERR_NONE) {
+                rtn_len = 0u;
+               *p_err   = err;
+                goto exit;
+            }
+        }
+
+        if ((*p_err             == NET_DEV_ERR_NONE) &&
+            ( ctx.MgmtCompleted == DEF_YES         )) {
+           *p_err = NET_WIFI_MGR_ERR_NONE;
+            goto exit;
+        }
+    }
+
+
+exit_fail_acquire_lock:
+    rtn_len = 0u;
+
+exit_acquire_lock:
+    Net_GlobalLockAcquire((void *)&NetWiFiMgr_MgmtHandler, &err);
+
+exit:
+    return (rtn_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetWiFiMgr_Signal()
+*
+* Description : Signal reception of a management response.
+*
+* Argument(s) : p_if    Pointer to interface to leave wireless network.
+*               ----    Argument validated in NetIF_RxHandler().
+*
+*               p_buf   Pointer to net buffer that contains the management buffer received.
+*               -----   Argument checked   in NetIF_RxHandler().
+*
+*               p_err           Pointer to variable   that will receive the return error code from this function :
+*
+*                                   NET_WIFI_MGR_ERR_NONE           Wireless manager for the interface successfully
+*                                                                   left.
+*
+*                                                                   - RETURNED BY 'NetOS_WiFiMgr_RespSignal()' : --
+*                                   NET_OS_ERR_RESP                 Post managemment response failed
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver via 'p_mgr_api->Signal()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetWiFiMgr_Signal (NET_IF   *p_if,
+                                 NET_BUF  *p_buf,
+                                 NET_ERR  *p_err)
+{
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+    KAL_ERR             kal_err;
+
+
+    p_mgr_data = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+
+
+    KAL_QPost(        p_mgr_data->MgmtSignalResp,
+              (void *)p_buf,
+                      KAL_OPT_POST_NONE,
+                     &kal_err);
+    if (kal_err != KAL_ERR_NONE) {
+         NetBuf_Free(p_buf);
+    }
+
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+}
+
+
+
+
+/*
+*********************************************************************************************************
+*                                        NetOS_WiFiMgr_Lock()
+*
+* Description : Lock wireless manager.
+*
+* Argument(s) : plock_obj   Pointer to variable that contains the wireless manager lock object.
+*               ---------   Argument checked in NetOS_WiFiMgr_LockInit().
+*
+*               ptask_obj   Pointer to task object that will receive the current task pointer.
+*               ---------   Argument checked in NetOS_WiFiMgr_LockInit().
+*
+*               perr        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_OS_ERR_NONE             Wireless manager access     acquired.
+*                               NET_WIFI_MGR_ERR_LOCK       Wireless manager access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetWiFiMgr_AP_Scan(),
+*               NetWiFiMgr_AP_Join(),
+*               NetWiFiMgr_AP_Leave(),
+*               NetWiFiMgr_Mgmt().
+*
+*               This function is a wireless manager function & SHOULD be called only by appropriate network
+*               device driver function(s).
+*
+* Note(s)     : (1) (a) Wireless manager access MUST be acquired--i.e. MUST wait for access; do NOT timeout.
+*
+*                       (1) Failure to acquire manager access will prevent network task(s)/operation(s)
+*                           from functioning.
+*
+*                   (b) Wireless manager access MUST be acquired exclusively by only a single task at any one
+*                       time.
+*
+*                   See also 'NetOS_WiFiMgr_Unlock()  Note #1'.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+static  void  NetWiFiMgr_LockAcquire (KAL_LOCK_HANDLE   lock,
+                                      NET_ERR          *p_err)
+{
+    KAL_ERR  kal_err;
+
+
+    KAL_LockAcquire(lock, KAL_OPT_PEND_NONE, KAL_TIMEOUT_INFINITE, &kal_err);
+    switch (kal_err) {
+        case KAL_ERR_NONE:
+            *p_err = NET_WIFI_MGR_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_LOCK_OWNER:
+            *p_err = NET_WIFI_MGR_ERR_LOCK_ACQUIRE;
+             return;
+
+
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_ABORT:
+        case KAL_ERR_TIMEOUT:
+        case KAL_ERR_WOULD_BLOCK:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_WIFI_MGR_ERR_LOCK_ACQUIRE;
+             return;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetOS_WiFiMgr_Unlock()
+*
+* Description : Unlock wireless manager.
+*
+* Argument(s) : plock_obj   Pointer to variable that contains the wireless manager lock object.
+*               ---------   Argument checked in NetOS_WiFiMgr_LockInit().
+*
+*               ptask_obj   Pointer to task object that will receive the current task pointer.
+*               ---------   Argument checked in NetOS_WiFiMgr_LockInit().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetWiFiMgr_AP_Scan(),
+*               NetWiFiMgr_AP_Join(),
+*               NetWiFiMgr_AP_Leave(),
+*               NetWiFiMgr_Mgmt().
+*
+*               This function is a wireless manager function & SHOULD be called only by appropriate network
+*               device driver function(s).
+*
+* Note(s)     : (1) Wireless manager MUST be released--i.e. MUST unlock access without failure.
+*
+*                   (a) Failure to release Wireless manager access will prevent task(s)/operation(s) from
+*                       functioning.  Thus Wireless manager access is assumed to be successfully released
+*                       since NO uC/OS-III error handling could be performed to counteract failure.
+*
+*                   See also 'NetOS_WiFiMgr_Lock()  Note #1'.
+*********************************************************************************************************
+*/
+#ifdef  NET_IF_WIFI_MODULE_EN
+static  void  NetWiFiMgr_LockRelease (KAL_LOCK_HANDLE  lock)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_LockRelease(lock,  &err_kal);                           /* Release exclusive network access.                    */
+
+   (void)&err_kal;                                               /* See Note #1a.                                        */
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                         NetWiFiMgr_AP_Create()
+*
+* Description : Create wireless network:
+*
+*                   (a) Release network          lock
+*                   (b) Acquire wireless manager lock
+*                   (c) Acquire network          lock
+*                   (d) Send 'Create' command and get result
+*                   (e) Release network          lock
+*                   (f) Release wireless manager lock
+*
+*
+* Argument(s) : p_if    Pointer to interface to create with.
+*               ----    Argument validated in NetIF_WiFi_CreateAP().
+*
+*               p_join  Pointer to variable that contains the wireless network to join.
+*               ------  Argument validated in NetIF_WiFi_CreateAP().
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_WIFI_MGR_ERR_NONE                   Wireless manager cmd successufully executed.
+*                                   NET_WIFI_MGR_ERR_NOT_STARTED            Wireless manager NOT started.
+*
+*                                                                           --- RETURNED BY 'NetOS_WiFiMgr_Lock()' : ---
+*                                   NET_WIFI_MGR_ERR_LOCK                   Wireless manager access NOT acquired.
+*
+*                                                                           - RETURNED BY 'NetWiFiMgr_MgmtHandler()' : -
+*                                   NET_WIFI_MGR_ERR_CMD_FAULT              Management command  fault.
+*                                   NET_WIFI_MGR_ERR_RESP_FAULT             Management response fault.
+*                                   NET_WIFI_MGR_ERR_RESP_SIGNAL_TIMEOUT    Wireless manager response signal timeout.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_WiFi_CreateAP() via 'p_mgr_api->Create()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetWiFiMgr_AP_Create (       NET_IF                 *p_if,
+                                    const  NET_IF_WIFI_AP_CFG     *p_ap_cfg,
+                                           NET_ERR                *p_err)
+{
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+    CPU_INT08U         *p_buf_cmd;
+    CPU_INT16U          buf_data_len;
+    NET_ERR             err;
+
+    p_mgr_data = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+    if (p_mgr_data->DevStarted != DEF_YES) {
+       *p_err = NET_WIFI_MGR_ERR_NOT_STARTED;
+        return;
+    }
+
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+                                                                /* -------------- ACQUIRE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockAcquire(p_mgr_data->MgrLock,
+                           p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+          return;
+    }
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetWiFiMgr_AP_Create, &err);
+    if (err != NET_ERR_NONE) {
+       *p_err = NET_WIFI_MGR_ERR_LOCK_ACQUIRE;
+        return;
+    }
+
+                                                                /* ---------- SEND CREATE CMD AND GET RESULT ---------- */
+    buf_data_len = sizeof(NET_IF_WIFI_AP_CFG);
+    p_buf_cmd    = (CPU_INT08U *)p_ap_cfg;
+    (void)NetWiFiMgr_MgmtHandler(p_if,
+                                 NET_IF_WIFI_CMD_CREATE,
+                                 p_buf_cmd,
+                                 buf_data_len,
+                                 0,
+                                 0,
+                                 p_err);
+
+
+                                                                /* -------------- RELEASE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockRelease(p_mgr_data->MgrLock);
+
+
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+         return;
+    }
+
+    p_mgr_data->AP_Created = DEF_YES;
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+}
+/*
+*********************************************************************************************************
+*                                         NetWiFiMgr_AP_GetPeerInfo()
+*
+* Description : (1) Get the info of the peer connected to the access point created by the interface:
+*
+*                   (a) Release network          lock
+*                   (b) Acquire wireless manager lock
+*                   (c) Acquire network          lock
+*                   (d) Send get peer info command and get result
+*                   (e) Release network          lock
+*                   (f) Release wireless manager lock
+*
+*
+* Argument(s) : p_if            Pointer to interface to Scan with.
+*               ----            Argument validated in NetIF_WiFi_Scan().
+*
+*               p_buf_peer      Pointer to table that will receive the peer info found.
+*
+*               peer_len_max    Length of the scan buffer (i.e. Number of network that can be found).s
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_WIFI_MGR_ERR_NONE                   Wireless manager cmd successufully executed.
+*                                   NET_WIFI_MGR_ERR_NOT_STARTED            Wireless manager NOT started.
+*
+*                                                                           --- RETURNED BY 'NetOS_WiFiMgr_Lock()' : ---
+*                                   NET_WIFI_MGR_ERR_LOCK                   Wireless manager access NOT acquired.
+*
+*                                                                           - RETURNED BY 'NetWiFiMgr_MgmtHandler()' : -
+*                                   NET_WIFI_MGR_ERR_CMD_FAULT              Management command  fault.
+*                                   NET_WIFI_MGR_ERR_RESP_FAULT             Management response fault.
+*                                   NET_WIFI_MGR_ERR_RESP_SIGNAL_TIMEOUT    Wireless manager response signal timeout.
+
+*
+* Return(s)   : Number of peer found, if any.
+*
+*               0, otherwise.
+*
+* Caller(s)   : NetIF_WiFi_IF_GetPeerInfo() via 'p_mgr_api->GetPeerInfo()'.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static CPU_INT16U NetWiFiMgr_AP_GetPeerInfo (       NET_IF                *p_if,
+                                             const  NET_IF_WIFI_PEER      *p_buf_peer,
+                                                    CPU_INT16U             peer_len_max,
+                                                    NET_ERR               *p_err)
+{
+    NET_WIFI_MGR_DATA  *p_mgr_data;
+    CPU_INT08U         *p_buf_rtn;
+    CPU_INT16U          len;
+    CPU_INT32U          rtn_len;
+    NET_ERR             err;
+
+    p_mgr_data = (NET_WIFI_MGR_DATA *)p_if->Ext_Data;
+    if (p_mgr_data->DevStarted != DEF_YES) {
+       *p_err = NET_WIFI_MGR_ERR_NOT_STARTED;
+        return (0);
+    }
+    if (p_mgr_data->AP_Created == DEF_NO) {
+       *p_err = NET_WIFI_MGR_ERR_STATE;
+        return (0);
+    }
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+                                                                /* -------------- ACQUIRE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockAcquire(p_mgr_data->MgrLock,
+                           p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+          return(0);
+    }
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetWiFiMgr_AP_Create, &err);
+    if (err != NET_ERR_NONE) {
+       *p_err = NET_WIFI_MGR_ERR_LOCK_ACQUIRE;
+        return(0);
+    }
+                                                                /* ------ SEND GET PEER INFO CMD AND GET RESULT ------- */
+
+    len       =  peer_len_max * sizeof(NET_IF_WIFI_PEER);
+    p_buf_rtn = (CPU_INT08U *) p_buf_peer;
+    rtn_len   =  NetWiFiMgr_MgmtHandler(p_if,
+                                        NET_IF_WIFI_CMD_GET_PEER_INFO,
+                                        DEF_NULL,
+                                        0,
+                                        p_buf_rtn,
+                                        len,
+                                        p_err);
+
+                                                                /* -------------- RELEASE WIFI MGR LOCK --------------- */
+    NetWiFiMgr_LockRelease(p_mgr_data->MgrLock);
+
+
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+         return (0);
+    }
+
+    len = rtn_len / sizeof(NET_IF_WIFI_PEER);
+
+   *p_err = NET_WIFI_MGR_ERR_NONE;
+
+    return (len);
+}
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif /* NET_IF_WIFI_MODULE_EN       */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Manager/Generic/net_wifi_mgr.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Manager/Generic/net_wifi_mgr.h
new file mode 100644
index 0000000..8ba389e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Manager/Generic/net_wifi_mgr.h
@@ -0,0 +1,241 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK WIRELESS MANAGER
+*
+*                                              WIFI MANAGER
+*
+* Filename      : net_wifi_mgr.h
+* Version       : V3.03.01
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.12 (or more recent version) is included in the project build.
+*
+*                 (2) The wireless hardware used with this wireless manager is assumed to embed the wireless
+*                     supplicant within the wireless hardware and provide common command.
+*
+*                 (3) Interrupt support is Hardware specific, therefore the generic Wireless manager does NOT
+*                     support interrupts.  However, interrupt support is easily added to the generic wireless
+*                     manager & thus the ISR handler has been prototyped and & populated within the function
+*                     pointer structure for example purposes.
+
+*                 (4) REQUIREs the following network protocol files in network directories :
+*
+*                     (a) (1) Wireless Network Interface Layer
+*
+*                           Located in the following network directory
+*
+*                               \\IF\
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This network physical layer header file is protected from multiple pre-processor inclusion
+*               through use of the network physical layer module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  NET_WIFI_MGR_MODULE_PRESENT                                 /* See Note #1.                                         */
+#define  NET_WIFI_MGR_MODULE_PRESENT
+
+#ifdef    NET_IF_WIFI_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                             NETWORK WIRELESS MANAGER LAYER ERROR CODES
+*
+* Note(s) : (1) ALL wireless layer-independent error codes #define'd in      'net_err.h';
+*               ALL wireless layer-specific    error codes #define'd in this 'net_wifi_mgr_&&&.h'.
+*
+*           (2) Network error code '12,000' series reserved for network wireless manager layer.
+*               See 'net_err.h  NETWORK EXTENSION LAYER ERROR CODES' to ensure that wireless manager
+*               layer-specific error codes do NOT conflict with extension layer-independent error codes.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  struct  net_wifi_mgr_ctx {
+    CPU_BOOLEAN  WaitResp;
+    CPU_INT32U   WaitRespTimeout_ms;
+    CPU_BOOLEAN  MgmtCompleted;
+} NET_WIFI_MGR_CTX;
+
+
+
+typedef  struct  net_if_wifi_mgr_data {
+    KAL_LOCK_HANDLE  MgrLock;
+    KAL_Q_HANDLE     MgmtSignalResp;
+    CPU_BOOLEAN      DevStarted;
+    CPU_BOOLEAN      AP_Joined;
+    CPU_BOOLEAN      AP_Created;
+} NET_WIFI_MGR_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                   WIRELESS DEVICE API DATA TYPES
+*
+* Note(s) : (1) (a) The Wireless device application programming interface (API) data type is a specific
+*                   network device API data type definition which MUST define ALL generic network device
+*                   API functions, synchronized in both the sequential order of the functions & argument
+*                   lists for each function.
+*
+*                   Thus, ANY modification to the sequential order or argument lists of the API functions
+*                   MUST be appropriately synchronized between the generic network device API data type &
+*                   the Wireless device API data type definition/instantiations.
+*
+*                   However, specific Wireless device API data type definitions/instantiations MAY include
+*                   additional API functions after all generic Ethernet device API functions.
+*
+*               (b) ALL API functions MUST be defined with NO NULL functions for all specific Ethernet
+*                   device API instantiations.  Any specific Ethernet device API instantiation that does
+*                   NOT require a specific API's functionality MUST define an empty API function.
+*
+*               See also 'net_if.h  GENERIC NETWORK DEVICE API DATA TYPE  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                                            /* ---------- NET WIFI DEV API ------------ */
+                                                                            /* Net wifi dev API fnct ptrs :             */
+typedef  struct  net_dev_api_wifi {
+
+    void        (*Init)               (NET_IF             *p_if,            /*   Init/add.                              */
+                                       NET_ERR            *p_err);
+
+    void        (*Start)              (NET_IF             *p_if,            /*   Start.                                 */
+                                       NET_ERR            *p_err);
+
+    void        (*Stop)               (NET_IF             *p_if,            /*   Stop.                                  */
+                                       NET_ERR            *p_err);
+
+    void        (*Rx)                 (NET_IF             *p_if,            /*   Rx.                                    */
+                                       CPU_INT08U        **p_data,
+                                       CPU_INT16U         *size,
+                                       NET_ERR            *p_err);
+
+    void        (*Tx)                 (NET_IF             *p_if,            /*   Tx.                                    */
+                                       CPU_INT08U         *p_data,
+                                       CPU_INT16U          size,
+                                       NET_ERR            *p_err);
+
+    void        (*AddrMulticastAdd)   (NET_IF             *p_if,            /*   Multicast addr add.                    */
+                                       CPU_INT08U         *p_addr_hw,
+                                       CPU_INT08U          addr_hw_len,
+                                       NET_ERR            *p_err);
+
+    void        (*AddrMulticastRemove)(NET_IF             *p_if,            /*   Multicast addr remove.                 */
+                                       CPU_INT08U         *p_addr_hw,
+                                       CPU_INT08U          addr_hw_len,
+                                       NET_ERR            *p_err);
+
+    void        (*ISR_Handler)        (NET_IF             *p_if,            /*   ISR handler.                           */
+                                       NET_DEV_ISR_TYPE    type);
+
+    void        (*MgmtDemux)          (NET_IF             *p_if,            /*   Demux mgmt frame.                      */
+                                       NET_BUF            *p_buf,
+                                       NET_ERR            *p_err);
+
+    CPU_INT32U  (*MgmtExecuteCmd)     (NET_IF             *p_if,            /*   Execute mgmt cmd.                      */
+                                       NET_IF_WIFI_CMD     cmd,
+                                       NET_WIFI_MGR_CTX   *p_ctx,
+                                       void               *p_cmd_data,
+                                       CPU_INT16U          cmd_data_len,
+                                       CPU_INT08U         *p_buf_rtn,
+                                       CPU_INT08U          buf_rtn_len_max,
+                                       NET_ERR            *p_err);
+
+    CPU_INT32U  (*MgmtProcessResp)    (NET_IF             *p_if,            /*   Process mgmt frame.                    */
+                                       NET_IF_WIFI_CMD     cmd,
+                                       NET_WIFI_MGR_CTX   *p_ctx,
+                                       CPU_INT08U         *p_buf_rxd,
+                                       CPU_INT16U          buf_rxd_len,
+                                       CPU_INT08U         *p_buf_rtn,
+                                       CPU_INT16U          buf_rtn_len_max,
+                                       NET_ERR            *p_err);
+} NET_DEV_API_WIFI;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_WIFI_MGR_API  NetWiFiMgr_API_Generic;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'net_wifi_mgr.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_WIFI_MODULE_EN       */
+#endif  /* NET_WIFI_MGR_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Template/net_dev_wifi_template_spi.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Template/net_dev_wifi_template_spi.c
new file mode 100644
index 0000000..67d5b5a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Template/net_dev_wifi_template_spi.c
@@ -0,0 +1,2431 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                                        WIRELESS SPI TEMPLATE
+*
+* Filename      : net_dev_wifi_template_spi.c
+* Version       : V3.03.01.00
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.12.00 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_DEV_TEMPLATE_WIFI_SPI_MODULE
+
+
+
+#include  
+#include  
+#include  
+#include  "net_dev_wifi_template_spi.h"
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*
+* Note(s) : (1) Receive buffers MUST contain a prefix of at least one octet for the packet type
+*               and any other data that help the driver to demux the management frame.
+*
+*           (2) The driver MUST handle and implement generic commands defined in net_if_wifi.h. But the driver
+*               can also define and implement its own management command which need an response by calling
+*               the wireless manager api (p_mgr_api->Mgmt()) to send the management command and to receive
+*               the response.
+*
+*               (a) Driver management command code '100' series reserved for driver.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_DEV_RX_BUF_SPI_OFFSET_OCTETS                  4u   /* See note 1.                                          */
+#define  NET_DEV_SPI_CLK_FREQ_MIN                    1000000L
+#define  NET_DEV_SPI_CLK_FREQ_MAX                   60000000L
+
+
+#define  NET_DEV_MGMT_NONE                               100u   /* See note 2.                                          */
+#define  NET_DEV_MGMT_BOOT_FIRMWARE                      101u
+#define  NET_DEV_MGMT_BOOT_UPGRADE                       101u
+#define  NET_DEV_MGMT_INIT_MAC                           102u
+#define  NET_DEV_MGMT_SET_PWR_SAVE                       103u
+#define  NET_DEV_MGMT_SET_HW_ADDR                        104u
+#define  NET_DEV_MGMT_GET_HW_ADDR                        105u
+#define  NET_DEV_MGMT_SET_SPD_MODE                       106u
+#define  NET_DEV_MGMT_LOAD_FIRMWARE                      107u
+#define  NET_DEV_MGMT_LOAD_FIRMWARE_FF_DATA              108u
+#define  NET_DEV_MGMT_LOAD_FIRMWARE_FF_TAIM1             109u
+#define  NET_DEV_MGMT_LOAD_FIRMWARE_FF_TAIM2             110u
+#define  NET_DEV_MGMT_GET_FIRMWARE_VERSION               120u
+
+#define  NET_DEV_RESP_CARD_RDY                             1u
+#define  NET_DEV_RESP_CTRL                                 2u
+#define  NET_DEV_RESP_INIT                                 3u
+#define  NET_DEV_RESP_JOIN                                 4u
+#define  NET_DEV_RESP_SCAN                                 5u
+#define  NET_DEV_RESP_TADM                                 6u
+#define  NET_DEV_RESP_TAIM1                                7u
+#define  NET_DEV_RESP_TAIM2                                8u
+#define  NET_DEV_RESP_WAKEUP                               9u
+
+#define  NET_DEV_FIRMWARE_VERSION                         10u
+
+
+#define  NET_DEV_INT_RX_STATUS_ERR_MSK                     1u
+#define  NET_DEV_INT_TYPE_MASK_DATA                        2u
+
+
+#define  NET_DEV_AP_PER_SCAN_MAX                          32u
+
+
+/*
+*********************************************************************************************************
+*                                     REGISTER BIT DEFINITIONS
+*
+* Note(s) : (1) All necessary register bit definitions should be defined within this section.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*
+* Note(s) : (1) Instance specific data area structures should be defined within this section.
+*               The data area structure typically includes error counters and variables used
+*               to track the state of the device.  Variables required for correct operation
+*               of the device MUST NOT be defined globally and should instead be included within
+*               the instance specific data area structure and referenced as pif->Dev_Data structure
+*               members.
+*
+*           (2) All device drivers MUST track the addresses of ALL buffers that have been
+*               transmitted and not yet acknowledged through transmit complete interrupts.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* --------------- DEVICE INSTANCE DATA --------------- */
+typedef  struct  net_dev_data {
+
+    CPU_INT08U      SubState;
+    CPU_INT08U      WaitResponseType;
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    NET_CTR         StatRxPktCtr;
+    NET_CTR         StatTxPktCtr;
+#endif
+#if (NET_CTR_CFG_ERR_EN  == DEF_ENABLED)
+    NET_CTR         ErrRxPktDiscardedCtr;
+    NET_CTR         ErrTxPktDiscardedCtr;
+#endif
+
+    CPU_INT08U     *TxBufCompPtr;                               /* See Note #2.                                         */
+    CPU_INT08U     *GlobalBufPtr;
+} NET_DEV_DATA;
+
+
+typedef  struct  net_dev_desc {
+    CPU_INT08U      Octet[16];
+} NET_DEV_DESC;
+
+
+typedef  struct  net_dev_desc_ctrl {
+    NET_DEV_DESC    Desc;
+    CPU_INT08U     *WrBufPtr;
+    CPU_INT08U     *RdBufPtr;
+    CPU_INT32U      len;
+} NET_DEV_DESC_CTRL;
+
+
+typedef  struct  net_dev_mgmt_scan_info {
+    CPU_INT08U        Ch;
+    CPU_INT08U        SecMode;
+    CPU_INT08U        RSSID;
+    NET_IF_WIFI_SSID  SSID;
+} NET_DEV_MGMT_SCAN_AP;
+
+typedef  struct  net_dev_mgmt_scan_response {
+    CPU_INT32U            ScanCnt;
+    CPU_INT32U            Error;
+    NET_DEV_MGMT_SCAN_AP  APs[NET_DEV_AP_PER_SCAN_MAX];
+} NET_DEV_MGMT_SCAN_RESP;
+
+typedef  struct  net_dev_mgmt_frame_desc {
+    CPU_INT16U   Word0;
+    CPU_INT16U   Word1;
+    CPU_INT16U   Word2;
+    CPU_INT16U   Word3;
+    CPU_INT16U   Word4;
+    CPU_INT16U   Word5;
+    CPU_INT16U   Word6;
+    CPU_INT16U   Word7;
+} NET_DEV_MGMT_DESC;
+
+typedef  struct  net_dev_mgmt_frame_scan {
+    CPU_INT32U        Channel;
+    NET_IF_WIFI_SSID  SSID;
+} NET_DEV_MGMT_FRAME_SCAN;
+
+typedef  struct  net_dev_mgmt_frame_join {
+    CPU_INT08U        NetworkType;
+    CPU_INT08U        SecType;
+    CPU_INT08U        DataRate;
+    CPU_INT08U        PwrLevel;
+    NET_IF_WIFI_PSK   PSK;
+    NET_IF_WIFI_SSID  SSID;
+    CPU_INT08U        Mode;
+    CPU_INT08U        Ch;
+    CPU_INT08U        Action;
+} NET_DEV_MGMT_FRAME_JOIN;
+
+
+typedef  struct  net_dev_mgmt_frame_power_save {
+    CPU_INT08U  Mode;
+    CPU_INT08U  Interval;
+} NET_DEV_MGMT_FRAME_PWR_SAVE;
+
+typedef union net_dev_mgmt_frame {
+    NET_DEV_MGMT_FRAME_SCAN         Scan;
+    NET_DEV_MGMT_FRAME_JOIN         Join;
+    NET_DEV_MGMT_FRAME_PWR_SAVE     Pwr_Save;
+} NET_DEV_MGMT_FRAME;
+
+typedef  struct  net_dev_mgmt_desc_frame {
+    NET_DEV_MGMT_DESC   Desc;
+    NET_DEV_MGMT_FRAME  Frame;
+} NET_DEV_MGMT_DESC_FRAME;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*
+* Note(s) : (1) Global variables are highly discouraged and should only be used for storing NON-instance
+*               specific data and the array of instance specific data.  Global variables, those that are
+*               not declared within the NET_DEV_DATA area, are not multiple-instance safe and could lead
+*               to incorrect driver operation if used to store device state information.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Device driver functions may be arbitrarily named.  However, it is recommended that device
+*               driver functions be named using the names provided below.  All driver function prototypes
+*               should be located within the driver C source file ('net_dev_&&&.c') & be declared as
+*               static functions to prevent name clashes with other network protocol suite device drivers.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                              /* -------- FNCT'S COMMON TO ALL DEV'S -------- */
+static  void        NetDev_Init                (NET_IF               *p_if,
+                                                NET_ERR              *p_err);
+
+
+static  void        NetDev_Start               (NET_IF               *p_if,
+                                                NET_ERR              *p_err);
+
+static  void        NetDev_Stop                (NET_IF               *p_if,
+                                                NET_ERR              *p_err);
+
+
+static  void        NetDev_Rx                  (NET_IF               *p_if,
+                                                CPU_INT08U          **p_data,
+                                                CPU_INT16U           *p_size,
+                                                NET_ERR              *p_err);
+
+static  void        NetDev_Tx                  (NET_IF               *p_if,
+                                                CPU_INT08U           *p_data,
+                                                CPU_INT16U            size,
+                                                NET_ERR              *p_err);
+
+
+static  void        NetDev_AddrMulticastAdd    (NET_IF               *p_if,
+                                                CPU_INT08U           *p_addr_hw,
+                                                CPU_INT08U            addr_hw_len,
+                                                NET_ERR              *p_err);
+
+static  void        NetDev_AddrMulticastRemove (NET_IF               *p_if,
+                                                CPU_INT08U           *p_addr_hw,
+                                                CPU_INT08U            addr_hw_len,
+                                                NET_ERR              *p_err);
+
+
+static  void        NetDev_ISR_Handler         (NET_IF               *p_if,
+                                                NET_DEV_ISR_TYPE      type);
+
+
+                                                                             /* ------- FNCT'S COMMON TO WIFI DEV'S -------- */
+static  void        NetDev_MgmtDemux           (NET_IF               *p_if,
+                                                NET_BUF              *p_buf,
+                                                NET_ERR              *p_err);
+
+
+static  CPU_INT32U  NetDev_MgmtExecutCmd       (NET_IF               *p_if,
+                                                NET_IF_WIFI_CMD       cmd,
+                                                NET_WIFI_MGR_CTX     *p_ctx,
+                                                void                 *p_cmd_data,
+                                                CPU_INT16U            cmd_data_len,
+                                                CPU_INT08U           *p_buf_rtn,
+                                                CPU_INT08U            buf_rtn_len_max,
+                                                NET_ERR              *p_err);
+
+static  CPU_INT32U  NetDev_MgmtProcessResp     (NET_IF               *p_if,
+                                                NET_IF_WIFI_CMD       cmd,
+                                                NET_WIFI_MGR_CTX     *p_ctx,
+                                                CPU_INT08U           *p_buf_rxd,
+                                                CPU_INT16U            buf_rxd_len,
+                                                CPU_INT08U           *p_buf_rtn,
+                                                CPU_INT16U            buf_rtn_len_max,
+                                                NET_ERR              *p_err);
+
+static  CPU_INT32U  NetDev_MgmtProcessScanResp (NET_IF               *p_if,
+                                                CPU_INT08U           *p_frame,
+                                                CPU_INT16U            frame_len,
+                                                CPU_INT08U           *p_ap_buf,
+                                                CPU_INT16U            buf_len);
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NETWORK DEVICE DRIVER API
+*
+* Note(s) : (1) Device driver API structures are used by applications during calls to NetIF_Add().  This
+*               API structure allows higher layers to call specific device driver functions via function
+*               pointer instead of by name.  This enables the network protocol suite to compile & operate
+*               with multiple device drivers.
+*
+*           (2) In most cases, the API structure provided below SHOULD suffice for most device drivers
+*               exactly as is with the exception that the API structure's name which MUST be unique &
+*               SHOULD clearly identify the device being implemented.  For example, the Cirrus Logic
+*               CS8900A Ethernet controller's API structure should be named NetDev_API_CS8900A[].
+*
+*               The API structure MUST also be externally declared in the device driver header file
+*               ('net_dev_&&&.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+
+const  NET_DEV_API_WIFI  NetDev_API_TemplateWiFiSpi = {                             /* Ether PIO dev API fnct ptrs : */
+                                                       &NetDev_Init,                /*   Init/add                    */
+                                                       &NetDev_Start,               /*   Start                       */
+                                                       &NetDev_Stop,                /*   Stop                        */
+                                                       &NetDev_Rx,                  /*   Rx                          */
+                                                       &NetDev_Tx,                  /*   Tx                          */
+                                                       &NetDev_AddrMulticastAdd,    /*   Multicast addr add          */
+                                                       &NetDev_AddrMulticastRemove, /*   Multicast addr remove       */
+                                                       &NetDev_ISR_Handler,         /*   ISR handler                 */
+                                                       &NetDev_MgmtDemux,           /*   Demux mgmt frame rx'd       */
+                                                       &NetDev_MgmtExecutCmd,       /*   Excute mgmt cmd             */
+                                                       &NetDev_MgmtProcessResp      /*   Process mgmt resp rx'd      */
+                                                      };
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Init()
+*
+* Description : (1) Initialize Network Driver Layer :
+*
+*                   (a) Initialize required clock sources
+*                   (b) Initialize external interrupt controller
+*                   (c) Initialize external GPIO controller
+*                   (d) Initialize driver state variables
+*                   (e) Initialize driver statistics & error counters
+*                   (f) Allocate memory for device DMA descriptors
+*                   (g) Initialize additional device registers
+*                       (1) (R)MII mode / Phy bus type
+*                       (2) Disable device interrupts
+*                       (3) Disable device receiver and transmitter
+*                       (4) Other necessary device initialization
+*
+* Argument(s) : p_if    Pointer to an wireless network interface.
+*               ----    Argument validated in NetIF_Add().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_DEV_ERR_NONE            No Error.
+*                           NET_DEV_ERR_INIT            General initialization        error.
+*                           NET_DEV_ERR_   INVALID_CFG     General invalid configuration error.
+*                           NET_DEV_ERR_MEM_ALLOC       Memory allocation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_WiFi_IF_Add() via 'p_dev_api->Init()'.
+*
+* Note(s)     : (2) The application developer SHOULD define NetDev_CfgGPIO() within net_bsp.c
+*                   in order to properly configure any necessary GPIO necessary for the device
+*                   to operate properly.  Micrium recommends defining and calling this NetBSP
+*                   function even if no additional GPIO initialization is required.
+*
+*               (3) The application developper SHOULD define NetDev_SPI_Init within net_bsp.c
+*                   in order to properly configure SPI registers for the device to operate
+*                   properly.
+*
+*               (4) The application developer SHOULD define NetDev_CfgIntCtrl() within net_bsp.c
+*                   in order to properly enable interrupts on an external or CPU integrated
+*                   interrupt controller.  Interrupt sources that are specific to the DEVICE
+*                   hardware MUST NOT be initialized from within NetDev_CfgIntCtrl() and
+*                   SHOULD only be modified from within the device driver.
+*
+*                   (a) External interrupt sources are cleared within the NetBSP first level
+*                       ISR handler either before or after the call to the device driver ISR
+*                       handler function.  The device driver ISR handler function SHOULD only
+*                       clear the device specific interrupts and NOT external or CPU interrupt
+*                       controller interrupt sources.
+*
+*               (5) The application developer SHOULD define NetDev_IntCtrl() within net_bsp.c
+*                   in order to properly enable  or disable interrupts on an external or CPU integrated
+*                   interrupt controller.
+*
+*               (6) All functions that require device register access MUST obtain reference
+*                   to the device hardware register space PRIOR to attempting to access
+*                   any registers.  Register definitions SHOULD NOT be absolute and SHOULD
+*                   use the provided base address within the device configuration structure,
+*                   as well as the device register definition structure in order to properly
+*                   resolve register addresses during run-time.
+*
+*               (7) All device drivers that store instance specific data MUST declare all
+*                   instance specific variables within the device data area defined above.
+*
+*               (8) Drivers SHOULD validate device configuration values and set *perr to
+*                   NET_DEV_ERR_INVALID_CFG if unacceptible values have been specified. Fields
+*                   of interest generally include, but are not limited to :
+*
+*                   (a) pdev_cfg->RxBufPoolType :
+*
+*                       (1) NET_IF_MEM_TYPE_MAIN
+*                       (2) NET_IF_MEM_TYPE_DEDICATED
+*
+*                   (b) pdev_cfg->TxBufPoolType :
+*
+*                       (1) NET_IF_MEM_TYPE_MAIN
+*                       (2) NET_IF_MEM_TYPE_DEDICATED
+*
+*                   (c) pdev_cfg->RxBufAlignOctets
+*                   (d) pdev_cfg->TxBufAlignOctets
+*                   (e) pdev_cfg->DataBusSizeNbrBits
+*                   (f) pdev_cfg->SPI_ClkFreq
+*                   (g) pdev_cfg->SPI_ClkPol
+*
+*                       (1) NET_DEV_SPI_CLK_POL_INACTIVE_LOW
+*                       (2) NET_DEV_SPI_CLK_POL_INACTIVE_HIGH
+*
+*                   (h) pdev_cfg->SPI_ClkPhase
+*
+*                       (1) NET_DEV_SPI_CLK_PHASE_FALLING_EDGE
+*                       (2) NET_DEV_SPI_CLK_PHASE_RASING_EDGE
+*
+*                   (i) pdev_cfg->SPI_XferUnitLen
+*
+*                       (1) NET_DEV_SPI_XFER_UNIT_LEN_8_BITS
+*                       (2) NET_DEV_SPI_XFER_UNIT_LEN_16_BITS
+*                       (3) NET_DEV_SPI_XFER_UNIT_LEN_32_BITS
+*                       (4) NET_DEV_SPI_XFER_UNIT_LEN_64_BITS
+*
+*                   (j) pdev_cfg->SPI_XferShiftDir
+*
+*                       (1) NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_MSB
+*                       (2) NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_LSB
+*
+*               (9) NetDev_Init() should exit with :
+*
+*                   (a) All device interrupt source disabled. External interrupt controllers
+*                       should however be ready to accept interrupt requests.
+*                   (b) All device interrupt sources cleared.
+*                   (c) Both the receiver and transmitter disabled.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Init (NET_IF   *p_if,
+                           NET_ERR  *p_err)
+{
+    NET_DEV_BSP_WIFI_SPI  *p_dev_bsp;
+    NET_DEV_CFG_WIFI      *p_dev_cfg;
+    NET_DEV_DATA          *p_dev_data;
+    NET_BUF_SIZE           buf_rx_size_max;
+    CPU_SIZE_T             reqd_octets;
+    CPU_INT16U             buf_size_max;
+    CPU_BOOLEAN            valid;
+    LIB_ERR                lib_err;
+
+
+                                                                /* -------- OBTAIN REFERENCE TO CFGs/REGs/BSP --------- */
+    p_dev_cfg = (NET_DEV_CFG_WIFI     *)p_if->Dev_Cfg;
+    p_dev_bsp = (NET_DEV_BSP_WIFI_SPI *)p_if->Dev_BSP;
+
+
+                                                                /* --------------- VALIDATE DEVICE CFG ---------------- */
+                                                                /* Validate Rx buf ix offset.                           */
+    if (p_dev_cfg->RxBufIxOffset != NET_DEV_RX_BUF_SPI_OFFSET_OCTETS) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+    buf_rx_size_max = NetBuf_GetMaxSize(                 p_if->Nbr,
+                                                         NET_TRANSACTION_RX,
+                                        (NET_BUF       *)0,
+                                                         NET_IF_IX_RX);
+    if (buf_rx_size_max < NET_IF_802x_FRAME_MAX_SIZE) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+                                                                /* Validate SPI freq.                                   */
+    valid = DEF_CHK_VAL(p_dev_cfg->SPI_ClkFreq,
+                        NET_DEV_SPI_CLK_FREQ_MIN,
+                        NET_DEV_SPI_CLK_FREQ_MAX);
+    if (valid != DEF_OK) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+                                                                /* Validate SPI pol.                                    */
+    if (p_dev_cfg->SPI_ClkPol != NET_DEV_SPI_CLK_POL_INACTIVE_HIGH) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+                                                                /* Validate SPI phase.                                  */
+    if (p_dev_cfg->SPI_ClkPol != NET_DEV_SPI_CLK_POL_INACTIVE_LOW) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+                                                                /* Validate xfer unit len.                              */
+    if (p_dev_cfg->SPI_XferUnitLen != NET_DEV_SPI_XFER_UNIT_LEN_8_BITS) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+                                                                /* Validate xfer shift dir first.                       */
+    if (p_dev_cfg->SPI_XferShiftDir != NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_MSB) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        return;
+    }
+
+
+                                                                /* -------------- ALLOCATE DEV DATA AREA -------------- */
+    p_if->Dev_Data = Mem_HeapAlloc(sizeof(NET_DEV_DATA),
+                                   p_dev_cfg->RxBufAlignOctets,
+                                  &reqd_octets,
+                                  &lib_err);
+    if (p_if->Dev_Data == (void *)0) {
+       *p_err = NET_DEV_ERR_MEM_ALLOC;
+        return;
+    }
+
+    p_dev_data               = (NET_DEV_DATA *)p_if->Dev_Data;
+
+    buf_size_max             =  DEF_MAX(p_dev_cfg->RxBufLargeSize, p_dev_cfg->TxBufLargeSize);
+    p_dev_data->GlobalBufPtr = (CPU_INT08U *)Mem_HeapAlloc(buf_size_max,
+                                                           p_dev_cfg->RxBufAlignOctets,
+                                                          &reqd_octets,
+                                                          &lib_err);
+    if (p_dev_data->GlobalBufPtr == (CPU_INT08U *)0) {
+       *p_err = NET_DEV_ERR_MEM_ALLOC;
+        return;
+    }
+
+                                                                /* ------- INITIALIZE EXTERNAL GPIO CONTROLLER -------- */
+    p_dev_bsp->CfgGPIO(p_if, p_err);                            /* Configure Wireless Controller GPIO (see Note #2).    */
+    if (*p_err != NET_DEV_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_INIT;
+         return;
+    }
+
+
+                                                                /* ------------ INITIALIZE SPI CONTROLLER ------------- */
+    p_dev_bsp->SPI_Init(p_if, p_err);                           /* Configure SPI Controller (see Note #3).              */
+    if (*p_err != NET_DEV_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_INIT;
+         return;
+    }
+
+
+                                                                /* ----- INITIALIZE EXTERNAL INTERRUPT CONTROLLER ----- */
+    p_dev_bsp->CfgIntCtrl(p_if, p_err);                         /* Configure ext int ctrl'r (see Note #4).              */
+    if (*p_err != NET_DEV_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_INIT;
+         return;
+    }
+
+
+                                                                /* ------------ DISABLE EXTERNAL INTERRUPT ------------ */
+    p_dev_bsp->IntCtrl(p_if, DEF_NO, p_err);                    /* Disable ext int ctrl'r (See Note #5)                 */
+    if (*p_err != NET_DEV_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_INIT;
+         return;
+    }
+
+
+                                                                /* ---- INITIALIZE ALL DEVICE DATA AREA VARIABLES ----- */
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    p_dev_data->StatRxPktCtr         = 0;
+    p_dev_data->StatTxPktCtr         = 0;
+#endif
+
+#if (NET_CTR_CFG_ERR_EN  == DEF_ENABLED)
+    p_dev_data->ErrRxPktDiscardedCtr = 0;
+    p_dev_data->ErrTxPktDiscardedCtr = 0;
+#endif
+
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Start()
+*
+* Description : (1) Start network interface hardware :
+*
+*                   (a) Initialize transmit semaphore count
+*                   (b) Start      Wireless device
+*                   (c) Initialize Wireless device
+*                   (d) Validate   Wireless Firmware version
+*
+*                       (1) Boot Wireless device to upgrade firmware
+*                       (2) Load Firmware
+*                       (3) Reset Wireless device
+*
+*                   (e) Boot       Wireless firmware
+*                   (f) Initialize Wireless firmware MAC layer
+*                   (g) Configure hardware address
+*
+*
+* Argument(s) : p_if    Pointer to a network interface.
+*               ----    Argument validated in NetIF_Start().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_DEV_ERR_NONE                Wireless device successfully started.
+*
+*                                                           - RETURNED BY NetIF_AddrHW_SetHandler() : -
+*                           NET_IF_ERR_NULL_PTR             Argument(s) passed a NULL pointer.
+*                           NET_IF_ERR_NULL_FNCT            Invalid NULL function pointer.
+*                           NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                           NET_IF_ERR_INVALID_STATE        Invalid network interface state.
+*                           NET_IF_ERR_INVALID_ADDR         Invalid hardware address.
+*                           NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Start() via 'pdev_api->Start()'.
+*
+* Note(s)     : (2) Setting the maximum number of frames queued for transmission is optional.  By
+*                   default, all network interfaces are configured to block until the previous frame
+*                   has completed transmission.  However, some devices can queue multiple frames for
+*                   transmission before blocking is required.  The default semaphore value is one.
+*
+*               (3) The physical hardware address should not be configured from NetDev_Init(). Instead,
+*                   it should be configured from within NetDev_Start() to allow for the proper use
+*                   of NetIF_802x_HW_AddrSet(), hard coded hardware addresses from the device
+*                   configuration structure, or auto-loading EEPROM's. Changes to the physical address
+*                   only take effect when the device transitions from the DOWN to UP state.
+*
+*               (4) The device hardware address is set from one of the data sources below. Each source
+*                   is listed in the order of precedence.
+*
+*                   (a) Device Configuration Structure      Configure a valid HW address during
+*                                                                compile time.
+*
+*                                                           Configure either "00:00:00:00:00:00" or
+*                                                                an empty string, "", in order to
+*                                                                configure the HW address using using
+*                                                                method (b).
+*
+*                   (b) NetIF_802x_HW_AddrSet()             Call NetIF_802x_HW_AddrSet() if the HW
+*                                                                address needs to be configured via
+*                                                                run-time from a different data
+*                                                                source. E.g. Non auto-loading
+*                                                                memory such as I2C or SPI EEPROM
+*                                                               (see Note #3).
+*
+*                   (c) Auto-Loading via EEPROM              If neither options a) or b) are used,
+*                                                                the IF layer will use the HW address
+*                                                                obtained from the network hardware
+*                                                                address registers.
+*
+*               (5) More than one SPI device could share the same SPI controller, thus we MUST protect
+*                   the access to the SPI controller and these step MUST be followed:
+*
+*                   (a) Acquire SPI register lock.
+*
+*                       (1) If no other device share the same SPI controller, it is NOT required to
+*                           implement any type of ressource lock.
+*
+*                   (b) Enable the Device Chip Select.
+*
+*                       (1) The Chip Select of the device SHOULD be disabled between each device access
+*
+*                   (c) Set the SPI configuration of the device.
+*
+*                       (1) If no other device share the same SPI controller, SPI configuration can be
+*                           done during the SPI initialization.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Start (NET_IF   *p_if,
+                            NET_ERR  *p_err)
+{
+    NET_DEV_BSP_WIFI_SPI  *p_dev_bsp;
+    NET_WIFI_MGR_API      *p_mgr_api;
+    NET_DEV_CFG_WIFI      *p_dev_cfg;
+    CPU_INT08U             hw_addr[NET_IF_802x_ADDR_SIZE];
+    CPU_INT08U             firmware_version;
+    CPU_INT08U             hw_addr_len;
+    CPU_INT16U             len;
+    CPU_BOOLEAN            firmware_upgrade;
+    CPU_BOOLEAN            hw_addr_cfg;
+    NET_ERR                err;
+
+
+                                                                /* ----------- OBTAIN REFERENCE TO MGR/BSP ------------ */
+    p_mgr_api  = (NET_WIFI_MGR_API     *)p_if->Ext_API;         /* Obtain ptr to the mgr api struct.                    */
+    p_dev_bsp  = (NET_DEV_BSP_WIFI_SPI *)p_if->Dev_BSP;         /* Obtain ptr to the bsp api struct.                    */
+    p_dev_cfg = (NET_DEV_CFG_WIFI     *)p_if->Dev_Cfg;
+
+
+                                                                /* ------- INITIALIZE TRANSMIT SEMAPHORE COUNT -------- */
+    NetIF_DevCfgTxRdySignal(p_if,                               /* See Note #2.                                         */
+                            1,
+                            p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_FAULT;
+         return;
+    }
+
+                                                                /* -------------- START WIRELESS DEVICE --------------- */
+    p_dev_bsp->Start(p_if, p_err);                              /* Power up.                                            */
+    if (*p_err != NET_DEV_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_FAULT;
+         return;
+    }
+
+    p_dev_bsp->IntCtrl(p_if, DEF_YES, p_err);
+    if (*p_err != NET_DEV_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_FAULT;
+         return;
+    }
+
+
+                                                                /* ------------ INITIALIZE WIRELESS DEVICE ------------ */
+    /* TODO Insert code to intialize the SPI.                                                                           */
+    /*                                                                                                                  */
+    /* Ex:                                                                                                              */
+                                                                /* ----------------- ACQUIRE SPI LOCK ----------------- */
+                                                                /* See Note #5a.                                        */
+    /*p_dev_bsp->SPI_Lock(p_if, p_err);                                                                                 */
+    /*if (*p_err != NET_DEV_ERR_NONE) {                                                                                 */
+    /*    *p_err  = NET_DEV_ERR_RX_BUSY;                                                                                */
+    /*     return;                                                                                                      */
+    /*}                                                                                                                 */
+    /*                                                                                                                  */
+    /*                                                                                                                  */
+                                                                /* -------------- ENABLE SPI CHIP SELECT -------------- */
+                                                                /* See Note #5b.                                        */
+    /*p_dev_bsp->SPI_ChipSelEn(p_if, p_err);                                                                            */
+    /*if (*p_err != NET_DEV_ERR_NONE) {                                                                                 */
+    /*     p_dev_bsp->SPI_Unlock(p_if);                                                                                 */
+    /*    *p_err  = NET_DEV_ERR_RX;                                                                                     */
+    /*     return;                                                                                                      */
+    /*}                                                                                                                 */
+    /*                                                                                                                  */
+    /*                                                                                                                  */
+                                                                /* ------------- CONFIGURE SPI CONTROLLER ------------- */
+                                                                /* See Note #5c.                                        */
+    /*p_dev_bsp->SPI_SetCfg(p_if,                                                                                       */
+    /*                      p_dev_cfg->SPI_ClkFreq,                                                                     */
+    /*                      p_dev_cfg->SPI_ClkPol,                                                                      */
+    /*                      p_dev_cfg->SPI_ClkPhase,                                                                    */
+    /*                      p_dev_cfg->SPI_XferUnitLen,                                                                 */
+    /*                      p_dev_cfg->SPI_XferShiftDir,                                                                */
+    /*                      p_err);                                                                                     */
+    /*if (*p_err != NET_DEV_ERR_NONE) {                                                                                 */
+    /*     p_dev_bsp->SPI_ChipSelDis(p_if);                                                                             */
+    /*     p_dev_bsp->SPI_Unlock(p_if);                                                                                 */
+    /*    *p_err  = NET_DEV_ERR_FAULT;                                                                                  */
+    /*     return;                                                                                                      */
+    /*}                                                                                                                 */
+    /* wr_buf[0] = 0x00;                                                                                                */
+    /* ...                                                                                                              */
+    /*p_dev_bsp->SPI_WrRd(p_if,                                                                                         */
+    /*                   &wr_buf,                                                                                       */
+    /*                   &rd_buf,                                                                                       */
+    /*                    len,                                                                                          */
+    /*                    p_err);                                                                                       */
+    /*if (*p_err != NET_DEV_ERR_NONE) {                                                                                 */
+    /*    *p_err  = NET_DEV_ERR_FAULT;                                                                                  */
+    /*     return;                                                                                                      */
+    /*}                                                                                                                 */
+    /*                                                                                                                  */
+    /* if (rd_buf[2] != 0x52) {                                                                                         */
+    /*    *p_err  = NET_DEV_ERR_FAULT;                                                                                  */
+    /*     return;                                                                                                      */
+    /*}                                                                                                                 */
+
+
+                                                                /* -------- VALIDATE WIRELESS FIRMWARE VERSION -------- */
+    p_mgr_api->Mgmt( p_if,
+                     NET_DEV_MGMT_GET_FIRMWARE_VERSION,
+                    &firmware_version,
+                     sizeof (firmware_version),
+                     0,
+                     0,
+                     p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_FAULT;
+         return;
+    }
+
+    if (firmware_version != NET_DEV_FIRMWARE_VERSION) {
+        firmware_upgrade = DEF_YES;
+    } else {
+        firmware_upgrade = DEF_NO;
+    }
+
+
+
+
+    if (firmware_upgrade == DEF_YES) {
+                                                                /* -------------- BOOT UPGRADE FIRMWARE --------------- */
+        p_mgr_api->Mgmt(p_if,
+                        NET_DEV_MGMT_BOOT_UPGRADE,
+                        0,
+                        0,
+                        0,
+                        0,
+                        p_err);
+        if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+            *p_err  = NET_DEV_ERR_FAULT;
+             return;
+        }
+                                                                /* ---------------- LOAD NEW FIRMWARE ----------------- */
+        p_mgr_api->Mgmt(              p_if,
+                                      NET_DEV_MGMT_LOAD_FIRMWARE,
+                        (CPU_INT08U *)0,
+                                      0,
+                        (CPU_INT08U *)0,
+                                      0,
+                                      p_err);
+        if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+            *p_err  = NET_DEV_ERR_FAULT;
+             return;
+        }
+
+
+                                                                /* ------------------- RESET DEVICE ------------------- */
+        p_dev_bsp->Stop(p_if, p_err);                           /* Power down.                                          */
+        if (*p_err != NET_DEV_ERR_NONE) {
+            *p_err  = NET_DEV_ERR_FAULT;
+             return;
+        }
+
+        p_dev_bsp->Start(p_if, p_err);                          /* Power up.                                            */
+        if (*p_err != NET_DEV_ERR_NONE) {
+            *p_err  = NET_DEV_ERR_FAULT;
+             return;
+        }
+    }
+
+                                                                /* ------------------ BOOT FIRMWARE ------------------- */
+    p_mgr_api->Mgmt(              p_if,                         /* Boot firmware.                                       */
+                                  NET_DEV_MGMT_BOOT_FIRMWARE,
+                    (CPU_INT08U *)0,
+                                  0,
+                    (CPU_INT08U *)0,
+                                  0,
+                                  p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_FAULT;
+         return;
+    }
+
+
+                                                                /* ------------- INIT FIRMWARE MAC LAYER -------------- */
+    p_mgr_api->Mgmt(              p_if,
+                                  NET_DEV_MGMT_INIT_MAC,
+                    (CPU_INT08U *)0,
+                                  0,
+                    (CPU_INT08U *)0,
+                                  0,
+                                  p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_FAULT;
+         return;
+    }
+
+
+                                                                /* ------------ CONFIGURE HARDWARE ADDRESS ------------ */
+    hw_addr_cfg = DEF_NO;                                       /* See Notes #3 & #4.                                   */
+
+    NetASCII_Str_to_MAC(p_dev_cfg->HW_AddrStr,                  /* Get configured HW MAC address string, if any ...     */
+                       &hw_addr[0],                             /* ... (see Note #4a).                                  */
+                       &err);
+    if (err == NET_ASCII_ERR_NONE) {
+        NetIF_AddrHW_SetHandler((NET_IF_NBR  ) p_if->Nbr,
+                                (CPU_INT08U *)&hw_addr[0],
+                                (CPU_INT08U  ) sizeof(hw_addr),
+                                (NET_ERR    *)&err);
+    }
+
+    if (err == NET_IF_ERR_NONE) {                               /* If no errors,  configure device HW MAC address.      */
+        hw_addr_cfg = DEF_YES;
+
+    } else {                                                    /* Get copy of configured IF layer HW MAC address, ...  */
+                                                                /* ... if any (see Note #4b).                           */
+        hw_addr_len = sizeof(hw_addr);
+        NetIF_AddrHW_GetHandler(p_if->Nbr, &hw_addr[0], &hw_addr_len, &err);
+        if (err == NET_IF_ERR_NONE) {                           /* Check if the IF HW address has been user configured. */
+            hw_addr_cfg  = NetIF_AddrHW_IsValidHandler(p_if->Nbr, &hw_addr[0], &err);
+        } else {
+            hw_addr_cfg  = DEF_NO;
+        }
+
+        if (hw_addr_cfg != DEF_YES) {                           /* If NOT valid, attempt to use automatically ...       */
+                                                                /* ... loaded HW MAC address (see Note #4c).            */
+            len = sizeof(hw_addr);
+            p_mgr_api->Mgmt(               p_if,
+                                           NET_DEV_MGMT_GET_HW_ADDR,
+                            (CPU_INT08U *) hw_addr,
+                                           len,
+                            (CPU_INT08U *) 0,
+                                           0,
+                                           p_err);
+            if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+                *p_err  = NET_DEV_ERR_FAULT;
+                 return;
+            }
+
+            NetIF_AddrHW_SetHandler(p_if->Nbr,                  /* Configure IF layer to use automatically-loaded ...   */
+                                   &hw_addr[0],                 /* ... HW MAC address.                                  */
+                                    sizeof(hw_addr),
+                                    p_err);
+            if (*p_err != NET_IF_ERR_NONE) {                    /* No valid HW MAC address configured, return error.    */
+                 return;
+            }
+        }
+    }
+
+    if (hw_addr_cfg == DEF_YES) {                               /* If necessary, set device HW MAC address.             */
+        p_mgr_api->Mgmt(               p_if,
+                                       NET_DEV_MGMT_SET_HW_ADDR,
+                        (CPU_INT08U *) 0,
+                                       0,
+                        (CPU_INT08U *) hw_addr,
+                                       len,
+                                       p_err);
+        if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+            *p_err  = NET_DEV_ERR_FAULT;
+             return;
+        }
+    }
+
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Stop()
+*
+* Description : (1) Shutdown network interface hardware :
+*
+*                   (a) Disable the receiver and transmitter
+*                   (b) Disable receive and transmit interrupts
+*                   (c) Clear pending interrupt requests
+*                   (d) Free ALL receive descriptors (Return ownership to hardware)
+*                   (e) Deallocate ALL transmit buffers
+*
+* Argument(s) : p_if    Pointer to a network interface.
+*               ----    Argument validated in NetIF_Stop().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_DEV_ERR_NONE    Device     successfully stopped.
+*                           NET_DEV_ERR_FAULT   Device NOT successfully stopped.
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_WiFi_IF_Stop() via 'p_dev_api->Stop()'.
+*
+* Note(s)     : (2) (a) (1) It is recommended that a device driver should only post all currently-used,
+*                           i.e. not-fully-transmitted, transmit buffers to the network interface transmit
+*                           deallocation queue.
+*
+*                       (2) However, a driver MAY attempt to post all queued &/or transmitted buffers.
+*                           The network interface transmit deallocation task will silently ignore any
+*                           unknown or duplicate transmit buffers.  This allows device drivers to
+*                           indiscriminately & easily post all transmit buffers without determining
+*                           which buffers have NOT yet been transmitted.
+*
+*                   (b) (1) Device drivers should assume that the network interface transmit deallocation
+*                           queue is large enough to post all currently-used transmit buffers.
+*
+*                       (2) If the transmit deallocation queue is NOT large enough to post all transmit
+*                           buffers, some transmit buffers may/will be leaked/lost.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Stop (NET_IF   *p_if,
+                           NET_ERR  *p_err)
+{
+    NET_DEV_DATA          *p_dev_data;
+    NET_DEV_BSP_WIFI_SPI  *p_dev_bsp;
+    NET_ERR                err;
+
+                                                                /* -------- OBTAIN REFERENCE TO CFGs/REGs/BSP --------- */
+    p_dev_data = (NET_DEV_DATA         *)p_if->Dev_Data;        /* Obtain ptr to dev data area.                         */
+    p_dev_bsp  = (NET_DEV_BSP_WIFI_SPI *)p_if->Dev_BSP;         /* Obtain ptr to the bsp api struct.                    */
+
+
+                                                                /* --------------- STOP WIRELESS DEVICE --------------- */
+    p_dev_bsp->Stop(p_if, p_err);                               /* Power down.                                          */
+    if (*p_err != NET_DEV_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_FAULT;
+         return;
+    }
+
+                                                                /* ------------------- FREE TX BUFS ------------------- */
+    if (p_dev_data->TxBufCompPtr != (CPU_INT08U *)0) {         /* If NOT yet  tx'd, ...                                */
+                                                                /* ... dealloc tx buf (see Note #2a1).                  */
+        NetIF_TxDeallocTaskPost((CPU_INT08U *)p_dev_data->TxBufCompPtr, &err);
+       (void)&err;                                              /* Ignore possible dealloc err (see Note #2b2).         */
+        p_dev_data->TxBufCompPtr = (CPU_INT08U *)0;
+    }
+
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Rx()
+*
+* Description : (1) This function returns a pointer to the received data to the caller :
+*
+*                   (a) Acquire   SPI Lock
+*                   (b) Enable    SPI Chip Select
+*                   (c) Configure SPI Controller
+*                   (d) Determine what caused the interrupt
+*                   (e) Obtain pointer to data area to replace existing data area
+*                   (f) Read data from the SPI
+*                   (g) Set packet type
+*                   (h) Set return values, pointer to received data area and size
+*                   (i) Increment counters.
+*                   (j) Disable SPI Chip Select
+*                   (k) Release SPI lock
+*
+*
+* Argument(s) : p_if    Pointer to a network interface.
+*               ----    Argument validated in NetIF_RxHandler().
+*
+*               p_data  Pointer to pointer to received data area. The received data
+*                       area address should be returned to the stack by dereferencing
+*                       p_data as *p_data = (address of receive data area).
+*
+*               p_size  Pointer to size. The number of bytes received should be returned
+*                       to the stack by dereferencing size as *size = (number of bytes).
+*               ------  Argument validated in NetIF_RxPkt().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_DEV_ERR_NONE                No Error
+*                           NET_DEV_ERR_RX                  Generic Rx error.
+*                           NET_DEV_ERR_RX_BUSY             Device is busy.
+*                           NET_DEV_ERR_INVALID_SIZE        Invalid Rx frame size.
+*                           NET_DEV_ERR_FAULT               Device  fault/failure.
+*
+*                                                           ------ RETURNED BY NetBuf_GetDataPtr() : ------
+*                           NET_BUF_ERR_NONE                Network buffer data area successfully allocated
+*                                                               & initialized.
+*                           NET_BUF_ERR_NONE_AVAIL          NO available buffer data areas to allocate.
+*                           NET_BUF_ERR_INVALID_IX          Invalid index.
+*                           NET_BUF_ERR_INVALID_SIZE        Invalid size; less than 0 or greater than the
+*                                                               maximum network buffer data area size
+*                                                               available.
+*                           NET_BUF_ERR_INVALID_LEN         Requested size & start index overflows network
+*                                                               buffer's data area.
+*                           NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt() via 'pdev_api->Rx()'.
+*
+* Note(s)     : (2) More than one SPI device could share the same SPI controller, thus we MUST protect
+*                   the access to the SPI controller and these step MUST be followed:
+*
+*                   (a) Acquire SPI register lock.
+*
+*                       (1) If no other device are shared the same SPI controller, it's not required to
+*                           implement any type of ressource lock.
+*
+*                   (b) Enable the Device Chip Select.
+*
+*                       (1) The Chip Select of the device SHOULD be disbaled between each device access
+*
+*                   (c) Set the SPI configuration of the device.
+*
+*                       (1) If no other device are shared the same SPI controller, SPI configuration can be
+*                           done during the SPI initialization.
+*
+*               (3) If a receive error occurs, the function SHOULD return 0 for the size, a
+*                   NULL pointer to the data area AND an error code equal to NET_DEV_ERR_RX.
+*                   Some devices may require that driver instruct the hardware to drop the
+*                   frame if it has been commited to internal device memory.
+*
+*                   (a) If a new data area is unavailable, the driver MUST instruct hardware
+*                       to discard the frame.
+*
+*               (4) Reading data from the device hardware may occur in various sized reads :
+*
+*                   (a) Device drivers that require read sizes equivalent to the size of the
+*                       device data bus MAY examine pdev_cfg->DataBusSizeNbrBits in order to
+*                       determine the number of required data reads.
+*
+*                   (b) Devices drivers that require read sizes equivalent to the size of the
+*                       Rx FIFO width SHOULD use the known FIFO width to determine the number
+*                       of required data reads.
+*
+*                   (c) It may be necessary to round the number of data reads up, OR perform the
+*                       last data read outside of the loop.
+*
+*               (5) A pointer set equal to pbuf_new and sized according to the required data
+*                   read size determined in (4) should be used to read data from the device
+*                   into the receive buffer.
+*
+*               (6) Some devices may interrupt only ONCE for a recieved frame.  The driver MAY need
+*                   check if additional frames have been received while processing the current
+*                   received frame.  If additional frames have been received, the driver MAY need
+*                   to signal the receive task before exiting NetDev_Rx().
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Rx (NET_IF       *p_if,
+                         CPU_INT08U  **p_data,
+                         CPU_INT16U   *p_size,
+                         NET_ERR      *p_err)
+{
+    NET_DEV_BSP_WIFI_SPI  *p_dev_bsp;
+    NET_DEV_CFG_WIFI      *p_dev_cfg;
+    NET_DEV_DATA          *p_dev_data;
+    CPU_INT08U             rd_buf[4];
+    CPU_INT08U            *p_buf;
+    CPU_INT08U             int_type;
+
+
+                                                                /* -------- OBTAIN REFERENCE TO CFGs/REGs/BSP --------- */
+    p_dev_bsp  = (NET_DEV_BSP_WIFI_SPI *)p_if->Dev_BSP;         /* Obtain ptr to the bsp api struct.                    */
+    p_dev_cfg  = (NET_DEV_CFG_WIFI     *)p_if->Dev_Cfg;         /* Obtain ptr to dev cfg area.                          */
+    p_dev_data = (NET_DEV_DATA         *)p_if->Dev_Data;        /* Obtain ptr to dev data area.                         */
+
+
+                                                                /* ----------------- ACQUIRE SPI LOCK ----------------- */
+    p_dev_bsp->SPI_Lock(p_if, p_err);                           /* See Note #2a.                                        */
+    if (*p_err != NET_DEV_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_RX_BUSY;
+         return;
+    }
+
+
+                                                                /* -------------- ENABLE SPI CHIP SELECT -------------- */
+    p_dev_bsp->SPI_ChipSelEn(p_if, p_err);                      /* See Note #2b.                                        */
+    if (*p_err != NET_DEV_ERR_NONE) {
+         p_dev_bsp->SPI_Unlock(p_if);
+        *p_err  = NET_DEV_ERR_RX;
+         return;
+    }
+
+
+                                                                /* ------------- CONFIGURE SPI CONTROLLER ------------- */
+    p_dev_bsp->SPI_SetCfg(p_if,                                 /* See Note #2c.                                        */
+                          p_dev_cfg->SPI_ClkFreq,
+                          p_dev_cfg->SPI_ClkPol,
+                          p_dev_cfg->SPI_ClkPhase,
+                          p_dev_cfg->SPI_XferUnitLen,
+                          p_dev_cfg->SPI_XferShiftDir,
+                          p_err);
+    if (*p_err != NET_DEV_ERR_NONE) {
+         p_dev_bsp->SPI_ChipSelDis(p_if);
+         p_dev_bsp->SPI_Unlock(p_if);
+        *p_err  = NET_DEV_ERR_FAULT;
+         return;
+    }
+
+   (void)&p_buf;
+                                                                /* ------------- READ INTERRUPT REGISTER -------------- */
+    /* TODO Insert code to read the interrupt register.                                                                 */
+    /* Ex:                                                                                                              */
+    /* wr_buf[0] = 0x00;                                                                                                */
+    /* ...                                                                                                              */
+    /*p_dev_bsp->SPI_WrRd(p_if,                                                                                         */
+    /*                   &wr_buf,                                                                                       */
+    /*                   &rd_buf,                                                                                       */
+    /*                    len,                                                                                          */
+    /*                    p_err);                                                                                       */
+
+
+    int_type = rd_buf[3];
+                                                                /* ------------- CHECK FOR RECEIVE ERRORS ------------- */
+    if ((int_type & NET_DEV_INT_RX_STATUS_ERR_MSK) > 0) {
+        *p_err = NET_DEV_ERR_RX;
+    }
+
+
+    if ((int_type & NET_DEV_INT_TYPE_MASK_DATA) > 0) {
+                                                                /* ----------- OBTAIN PTR TO NEW DATA AREA ------------ */
+        p_buf     = NetBuf_GetDataPtr(p_if,
+                                      NET_TRANSACTION_RX,
+                                      NET_IF_ETHER_FRAME_MAX_SIZE,
+                                      NET_IF_IX_RX,
+                                      0,
+                                      0,
+                                      0,
+                                      p_err);
+        if (*p_err != NET_BUF_ERR_NONE) {                       /* See Note #3.                                         */
+            *p_size = 0;
+            *p_data = 0;
+             p_dev_bsp->SPI_ChipSelDis(p_if);
+             p_dev_bsp->SPI_Unlock(p_if);
+             return;
+        }
+
+        /* TODO Insert code to get/read data packet or management response.                                             */
+        /* Ex:                                                                                                          */
+        /* wr_buf[0] = 0x00;                                                                                            */
+        /* ...                                                                                                          */
+        /*p_dev_bsp->SPI_WrRd(p_if,                                                                                     */
+        /*                   &wr_buf,                                                                                   */
+        /*                    p_buf,                                                                                    */
+        /*                    len,                                                                                      */
+        /*                    p_err);                                                                                   */
+        /* int_type = rd_buf[3];                                                                                        */
+
+
+                                                                /* ------------ ANALYSE & SET PACKET TYPE ------------- */
+        /* TODO Insert code to analyse and set the packet type.                                                         */
+        /* Ex:                                                                                                          */
+        /* type = rd_buf[8];                                                                                            */
+        /* if (type == NET_DEV_MGMT_RESP) {                                                                             */
+        /*    *p_buf = NET_IF_WIFI_MGMT_FRAME;                                                                          */
+        /* } else {                                                                                                     */
+        /*    *p_buf = NET_IF_WIFI_DATA_PKT;                                                                            */
+        /* }                                                                                                            */
+
+    } else {
+        NET_CTR_ERR_INC(p_dev_data->ErrRxPktDiscardedCtr);
+       *p_err = NET_DEV_ERR_RX;
+    }
+
+   (void)&p_dev_data;
+
+    p_dev_bsp->SPI_ChipSelDis(p_if);
+    p_dev_bsp->SPI_Unlock(p_if);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_Tx()
+*
+* Description : (1) This function transmits the specified data :
+*
+*                   (a) Acquire   SPI Lock
+*                   (b) Enable    SPI Chip Select
+*                   (c) Configure SPI Controller
+*                   (d) Write data to the device to transmit
+*                   (e) Increment counters.
+*                   (f) Disable SPI Chip Select
+*                   (g) Release SPI lock
+*
+* Argument(s) : p_if    Pointer to a network interface.
+*               ----    Argument validated in NetIF_TxHandler().
+*
+*               p_data  Pointer to data to transmit.
+*               ------  Argument checked   in NetIF_Tx().
+*
+*               size    Size    of data to transmit.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_DEV_ERR_NONE        No         error
+*                           NET_DEV_ERR_TX          Generic Tx error.
+*                           NET_DEV_ERR_TX_BUSY     No Tx descriptors available
+*                           NET_DEV_ERR_FAULT       Device fault/failure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPkt() via 'pdev_api->Tx()'.
+*
+* Note(s)     : (2) More than one SPI device could share the same SPI controller, thus we MUST protect
+*                   the access to the SPI controller and these step MUST be followed:
+*
+*                   (a) Acquire SPI register lock.
+*
+*                       (1) If no other device are shared the same SPI controller, it's not required to
+*                           implement any type of ressource lock.
+*
+*                   (b) Enable the Device Chip Select.
+*
+*                       (1) The Chip Select of the device SHOULD be disbaled between each device access
+*
+*                   (c) Set the SPI configuration of the device.
+*
+*                       (1) If no other device are shared the same SPI controller, SPI configuration can be
+*                           done during the SPI initialization.
+*
+*               (3) Software MUST track all transmit buffer addresses that are that are queued for
+*                   transmission but have not received a transmit complete notification (interrupt).
+*                   Once the frame has been transmitted, software must post the buffer address of
+*                   the frame that has completed transmission to the transmit deallocation task.
+*
+*                   (a) If the device doesn't support transmit complete notification software must
+*                       post the buffer address of the frame once the data is wrote on the device FIFO.
+*
+*               (4) Writing data to the device hardware may occur in various sized writes :
+*
+*                   (a) Devices drivers that require write sizes equivalent to the size of the
+*                       Tx FIFO width SHOULD use the known FIFO width to determine the number
+*                       of required data reads.
+*
+*                   (b) It may be necessary to round the number of data writes up, OR perform the
+*                       last data write outside of the loop.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_Tx (NET_IF      *p_if,
+                         CPU_INT08U  *p_data,
+                         CPU_INT16U   size,
+                         NET_ERR     *p_err)
+{
+    NET_DEV_DATA             *p_dev_data;
+    NET_DEV_BSP_WIFI_SPI     *p_dev_bsp;
+    NET_DEV_CFG_WIFI         *p_dev_cfg;
+    NET_ERR                   err;
+
+
+                                                                /* -------- OBTAIN REFERENCE TO CFGs/REGs/BSP --------- */
+    p_dev_data = (NET_DEV_DATA         *)p_if->Dev_Data;
+    p_dev_bsp  = (NET_DEV_BSP_WIFI_SPI *)p_if->Dev_BSP;
+    p_dev_cfg  = (NET_DEV_CFG_WIFI     *)p_if->Dev_Cfg;
+
+
+                                                                /* ----------------- ACQUIRE SPI LOCK ----------------- */
+    p_dev_bsp->SPI_Lock(p_if, p_err);                           /* See Note #2a.                                        */
+    if (*p_err != NET_DEV_ERR_NONE) {
+        *p_err  = NET_DEV_ERR_TX_BUSY;
+         return;
+    }
+
+
+                                                                /* -------------- ENABLE SPI CHIP SELECT -------------- */
+    p_dev_bsp->SPI_ChipSelEn(p_if, p_err);                      /* See Note #2b.                                        */
+    if (*p_err != NET_DEV_ERR_NONE) {
+         p_dev_bsp->SPI_Unlock(p_if);
+        *p_err  = NET_DEV_ERR_TX;
+         return;
+    }
+
+
+                                                                /* ------------- CONFIGURE SPI CONTROLLER ------------- */
+    p_dev_bsp->SPI_SetCfg(p_if,                                 /* See Note #2c.                                        */
+                          p_dev_cfg->SPI_ClkFreq,
+                          p_dev_cfg->SPI_ClkPol,
+                          p_dev_cfg->SPI_ClkPhase,
+                          p_dev_cfg->SPI_XferUnitLen,
+                          p_dev_cfg->SPI_XferShiftDir,
+                          p_err);
+    if (*p_err != NET_DEV_ERR_NONE) {
+         p_dev_bsp->SPI_ChipSelDis(p_if);
+         p_dev_bsp->SPI_Unlock(p_if);
+        *p_err = NET_DEV_ERR_TX;
+         return;
+    }
+
+
+                                                                /* -------------------- SEND DATA --------------------- */
+    /* TODO Insert code to write & tx data packet.                                                                      */
+    /* Ex:                                                                                                              */
+    /* wr_buf[0] = 0x01;                                                                                                */
+    /* ...                                                                                                              */
+    /*p_dev_bsp->SPI_WrRd(p_if,                                                                                         */
+    /*                   &wr_buf,                                                                                       */
+    /*                    p_dev_data-GlobalBuf,                                                                         */
+    /*                    len,                                                                                          */
+    /*                    p_err);                                                                                       */
+    /*p_dev_bsp->SPI_WrRd(p_if,                                                                                         */
+    /*                    p_data,                                                                                       */
+    /*                    p_dev_data-GlobalBuf,                                                                         */
+    /*                    size,                                                                                         */
+    /*                    p_err);                                                                                       */
+
+
+    p_dev_data->TxBufCompPtr = p_data;                          /* See Note #3.                                         */
+    NetIF_TxDeallocTaskPost(p_data, &err);                   /* See Note #3a.                                        */
+    NetIF_DevTxRdySignal(p_if);
+
+   (void)&err;                                                  /* Prevent possible 'variable unused' warnings.         */
+    p_dev_data->TxBufCompPtr = (CPU_INT08U *)0;
+
+
+                                                                /* ------------- DISBALE SPI CHIP SELECT -------------- */
+    p_dev_bsp->SPI_ChipSelDis(p_if);
+
+
+                                                                /* ----------------- RELEASE SPI LOCK ----------------- */
+    p_dev_bsp->SPI_Unlock(p_if);
+
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetDev_AddrMulticastAdd()
+*
+* Description : Configure hardware address filtering to accept specified hardware address.
+*
+* Argument(s) : p_if            Pointer to a network interface.
+*               ----            Argument validated in NetIF_AddrMulticastAdd().
+*
+*               paddr_hw        Pointer to hardware address.
+*               --------        Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_hw_len     Length  of hardware address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Hardware address successfully configured.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'len' passed equal to 0.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_AddrMulticastAdd() via 'pdev_api->AddrMulticastAdd()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_AddrMulticastAdd (NET_IF      *p_if,
+                                       CPU_INT08U  *p_addr_hw,
+                                       CPU_INT08U   addr_hw_len,
+                                       NET_ERR     *p_err)
+{
+#ifdef NET_MULTICAST_PRESENT
+#endif
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetDev_AddrMulticastRemove()
+*
+* Description : Configure hardware address filtering to reject specified hardware address.
+*
+* Argument(s) : p_if            Pointer to a network interface.
+*               ----            Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               p_addr_hw       Pointer to hardware address.
+*               ---------       Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_hw_len     Length  of hardware address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Hardware address successfully removed.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'len' passed equal to 0.
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_AddrMulticastAdd() via 'pdev_api->AddrMulticastRemove()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_AddrMulticastRemove (NET_IF      *p_if,
+                                          CPU_INT08U  *p_addr_hw,
+                                          CPU_INT08U   addr_hw_len,
+                                          NET_ERR     *p_err)
+{
+#ifdef NET_MULTICAST_PRESENT
+#endif
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDev_ISR_Handler()
+*
+* Description : This function serves as the device Interrupt Service Routine Handler. This ISR
+*               handler MUST service and clear all necessary and enabled interrupt events for
+*               the device.
+*
+* Argument(s) : p_if        Pointer to a network interface.
+*               ----        Argument validated in NetIF_ISR_Handler().
+*
+*               type    Network Interface defined argument representing the type of ISR in progress. Codes
+*                       for Rx, Tx, Overrun, Jabber, etc... are defined within net_if.h and are passed
+*                       into this function by the corresponding Net BSP ISR handler function. The Net
+*                       BSP ISR handler function may be called by a specific ISR vector and therefore
+*                       know which ISR type code to pass.  Otherwise, the Net BSP may pass
+*                       NET_DEV_ISR_TYPE_UNKNOWN and the device driver MAY ignore the parameter when
+*                       the ISR type can be deduced by reading an available interrupt status register.
+*
+*                       Type codes that are defined within net_if.c include but are not limited to :
+*
+*                           NET_DEV_ISR_TYPE_RX
+*                           NET_DEV_ISR_TYPE_TX_COMPLETE
+*                           NET_DEV_ISR_TYPE_UNKNOWN
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_ISR_Handler() via 'p_dev_api->ISR_Handler()'.
+*
+* Note(s)     : (1) This function is called via function pointer from the context of an ISR.
+*
+*               (2) In the case of an interrupt occurring prior to Network Protocol Stack initialization,
+*                   the device driver should ensure that the interrupt source is cleared in order
+*                   to prevent the potential for an infinite interrupt loop during system initialization.
+*
+*               (3) Many devices generate only one interrupt event for several ready frames.
+*
+*                   (a) It is NOT recommended to read from the SPI controller in the ISR handler as the SPI
+*                       can be shared with another peripheral. If the SPI lock has been acquired by another
+*                       application/chip the entire application could be locked forever.
+*
+*                   (b) If the device support the transmit completed notification and it is NOT possible to know
+*                       the interrupt type without reading on the device, we suggest to notify the receive task
+*                       where the interrupt register is read. And in this case, NetDev_rx() should return a
+*                       management frame, which will be send automaticcly to NetDev_Demux() and where the stack
+*                       is called to dealloc the packet transmitted.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_ISR_Handler (NET_IF            *p_if,
+                                  NET_DEV_ISR_TYPE   type)
+{
+    NET_DEV_DATA  *p_dev_data;
+    NET_ERR        err;
+
+
+    p_dev_data = (NET_DEV_DATA *)p_if->Dev_Data;
+
+    switch (type) {
+        case NET_DEV_ISR_TYPE_RX:
+        case NET_DEV_ISR_TYPE_UNKNOWN:                          /* See Note #3.                                         */
+             NetIF_RxTaskSignal(p_if->Nbr, &err);
+             break;
+
+
+        case NET_DEV_ISR_TYPE_TX_COMPLETE:
+             NetIF_TxDeallocTaskPost(p_dev_data->TxBufCompPtr, &err);
+             NetIF_DevTxRdySignal(p_if);
+             p_dev_data->TxBufCompPtr = (CPU_INT08U *)0;
+             break;
+
+
+        default:
+             break;
+    }
+
+    (void)&err;                                                  /* Prevent possible 'variable unused' warnings.         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_MgmtDemux()
+*
+* Description : (1) This function should analyse the management frame received:
+*
+*                   (a) Apply some operations on the device
+*                   (b) Call the stack to change the link state or
+*                   (c) Signal the wireless manager when response is received (See Note #3)
+*
+* Argument(s) : p_if        Pointer to a network interface.
+*               ----        Argument validated in NetIF_RxHandler().
+*
+*               p_buf       Pointer to a network buffer that received a management frame.
+*               -----       Argument checked   in NetIF_WiFi_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE    Management     successfully processed
+*                               NET_DEV_ERR_RX      Management NOT successfully processed
+*
+* Caller(s)   : NetIF_WiFi_RxMgmtFrameHandler() via 'p_dev_api->DemuxMgmt()'.
+*
+* Return(s)   : none.
+*
+* Note(s)     : (2) (a) The network buffer MUST be freed by this functions when the buffer is only used by this function.
+*
+*                   (b) The network buffer MUST NOT be freed by this function when an error occured and is returned,
+*                       the upper layer free the buffer and increment discarded management frame global counter.
+*
+*                   (c) The netowrk buffer MUST NOT be freed by this function when the wireless manager is signaled as
+*                       the network buffer will be used and freed by the wireless manager.
+*
+*               (3) The wireless manager MUST be signaled only when the response received is for a management
+*                   command previously sent.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_MgmtDemux (NET_IF   *p_if,
+                                NET_BUF  *p_buf,
+                                NET_ERR  *p_err)
+{
+    NET_DEV_DATA      *p_dev_data;
+    NET_WIFI_MGR_API  *p_mgr_api;
+    CPU_INT08U         type;
+    CPU_BOOLEAN        signal;
+
+
+    p_dev_data = (NET_DEV_DATA *) p_if->Dev_Data;
+    type       =  p_buf->DataPtr[2];
+    signal     =  DEF_NO;
+
+    switch (p_dev_data->WaitResponseType) {
+        case NET_DEV_MGMT_BOOT_FIRMWARE:
+             if (type == NET_DEV_RESP_CARD_RDY) {
+                 signal = DEF_YES;
+             }
+             break;
+
+
+        case NET_DEV_MGMT_GET_HW_ADDR:
+             if (type == NET_DEV_RESP_CTRL) {
+                 signal = DEF_YES;
+             }
+             break;
+
+
+        case NET_DEV_MGMT_INIT_MAC:
+             if (type == NET_DEV_RESP_INIT) {
+                 signal = DEF_YES;
+             }
+             break;
+
+
+        case NET_DEV_MGMT_SET_PWR_SAVE:
+             if (type == NET_DEV_RESP_WAKEUP) {
+                 signal = DEF_YES;
+             }
+             break;
+
+
+        case NET_IF_WIFI_CMD_SCAN:
+             if (type == NET_DEV_RESP_SCAN) {
+                 signal = DEF_YES;
+             }
+             break;
+
+
+        case NET_IF_WIFI_CMD_JOIN:
+             if (type == NET_DEV_RESP_JOIN) {
+                 signal = DEF_YES;
+             }
+             break;
+
+
+        case NET_DEV_MGMT_LOAD_FIRMWARE:
+             if ((type == NET_DEV_RESP_TAIM1) |
+                 (type == NET_DEV_RESP_TAIM2) |
+                 (type == NET_DEV_RESP_TADM )) {
+                  signal = DEF_YES;
+             }
+             break;
+
+
+        case NET_DEV_MGMT_NONE:
+        default:
+             signal = DEF_NO;
+             break;
+    }
+
+    if (signal == DEF_YES) {
+        p_mgr_api = (NET_WIFI_MGR_API *)p_if->Ext_API;
+        p_mgr_api->Signal(p_if, p_buf, p_err);
+       *p_err = NET_DEV_ERR_NONE;
+    } else {
+       *p_err = NET_DEV_ERR_RX;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetDev_MgmtExecutCmd()
+*
+* Description : This function MUST initialize or continue a management command.
+*
+* Argument(s) : p_if                Pointer to a network interface.
+*               ----                Argument validated in NetIF_IF_Add(),
+*                                                         NetIF_IF_Start(),
+*                                                         NetIF_RxHandler(),
+*                                                         NetIF_WiFi_Scan(),
+*                                                         NetIF_WiFi_Join(),
+*                                                         NetIF_WiFi_Leave().
+*
+*               cmd                 Management command to be executed:
+*
+*                                       NET_IF_WIFI_CMD_SCAN
+*                                       NET_IF_WIFI_CMD_JOIN
+*                                       NET_IF_WIFI_CMD_LEAVE
+*                                       NET_IF_IO_CTRL_LINK_STATE_GET
+*                                       NET_IF_IO_CTRL_LINK_STATE_GET_INFO
+*                                       NET_IF_IO_CTRL_LINK_STATE_UPDATE
+*                                       Others management commands defined by this driver.
+*
+*               p_ctx               State machine context See Note #1.
+*
+*               p_cmd_data          Pointer to a buffer that contains data to be used by the driver to execute
+*                                   the command.
+*
+*               cmd_data_len        Command data length.
+*
+*               p_buf_rtn           Pointer to buffer that will receive return data.
+*
+*               buf_rtn_len_max     Return maximum data length.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE    Management     successfully executed
+*                               NET_DEV_ERR_FAULT   Management NOT successfully executed
+*
+* Caller(s)   : NetWiFiMgr_MgmtHandler() via 'p_dev_api->MgmtExecuteCmd()'.
+*
+* Return(s)   : Length of data wrote in the return buffer in octet.
+*
+* Note(s)     : (1) The state machine context is used by the wireless manager to know what it MUST do after
+*                   this call:
+*
+*                   (a) WaitResp            is used by the wireless manager to know if an asynchronous response is
+*                                           required.
+*
+*                   (b) WaitRespTimeout_ms  is used by the wireless manager to know what is the timeout to receive
+*                                           the response.
+*
+*                   (c) MgmtCompleted       is used by the wireless manager to know if the management process is
+*                                           completed.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetDev_MgmtExecutCmd  (NET_IF            *p_if,
+                                           NET_IF_WIFI_CMD    cmd,
+                                           NET_WIFI_MGR_CTX  *p_ctx,
+                                           void              *p_cmd_data,
+                                           CPU_INT16U         cmd_data_len,
+                                           CPU_INT08U        *p_buf_rtn,
+                                           CPU_INT08U         buf_rtn_len_max,
+                                           NET_ERR           *p_err)
+{
+    NET_DEV_DATA          *p_dev_data;
+    NET_DEV_BSP_WIFI_SPI  *p_dev_bsp;
+    NET_DEV_CFG_WIFI      *p_dev_cfg;
+    CPU_INT08U             rd_buf[4];
+    CPU_INT32U             rtn_len;
+
+
+
+    p_dev_data = (NET_DEV_DATA         *)p_if->Dev_Data;
+    p_dev_bsp  = (NET_DEV_BSP_WIFI_SPI *)p_if->Dev_BSP;
+    p_dev_cfg  = (NET_DEV_CFG_WIFI     *)p_if->Dev_Cfg;
+
+
+   *p_err                     = NET_DEV_ERR_NONE;
+    p_ctx->WaitRespTimeout_ms = 0;
+
+
+    p_dev_bsp->SPI_Lock(p_if, p_err);
+    if (*p_err != NET_DEV_ERR_NONE) {
+        *p_err = NET_DEV_ERR_FAULT;
+         return (0);
+    }
+
+    p_dev_bsp->SPI_ChipSelEn(p_if, p_err);
+    if (*p_err != NET_DEV_ERR_NONE) {
+         p_dev_bsp->SPI_Unlock(p_if);
+        *p_err = NET_DEV_ERR_FAULT;
+         return (0);
+    }
+
+    p_dev_bsp->SPI_SetCfg(p_if,
+                          p_dev_cfg->SPI_ClkFreq,
+                          p_dev_cfg->SPI_ClkPol,
+                          p_dev_cfg->SPI_ClkPhase,
+                          p_dev_cfg->SPI_XferUnitLen,
+                          p_dev_cfg->SPI_XferShiftDir,
+                          p_err);
+    if (*p_err != NET_DEV_ERR_NONE) {
+         p_dev_bsp->SPI_Unlock(p_if);
+        *p_err  = NET_DEV_ERR_RX;
+         return (0);
+    }
+
+    rtn_len = rd_buf[3];
+
+
+    switch (cmd) {
+        case NET_DEV_MGMT_BOOT_FIRMWARE:
+
+            /* TODO Insert code to boot the device.                                                                     */
+            /* Ex:                                                                                                      */
+            /* wr_buf[0] = 0x01;                                                                                        */
+            /* ...                                                                                                      */
+            /*p_dev_bsp->SPI_WrRd(p_if,                                                                                 */
+            /*                   &wr_buf,                                                                               */
+            /*                    p_dev_data-GlobalBuf,                                                                 */
+            /*                    len,                                                                                  */
+            /*                    p_err);                                                                               */
+
+             if (*p_err != NET_DEV_ERR_NONE) {
+                  p_ctx->WaitResp              = DEF_NO;
+                  p_ctx->MgmtCompleted         = DEF_YES;
+                  p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                 *p_err                        = NET_DEV_ERR_FAULT;
+                  break;
+             }
+             p_ctx->WaitResp              = DEF_YES;
+             p_ctx->MgmtCompleted         = DEF_NO;
+             p_dev_data->WaitResponseType = NET_DEV_MGMT_BOOT_FIRMWARE;
+             p_dev_data->SubState         = NET_DEV_MGMT_NONE;
+            *p_err                        = NET_DEV_ERR_NONE;
+             break;
+
+
+        case NET_DEV_MGMT_LOAD_FIRMWARE:
+             switch (p_dev_data->SubState) {
+                 case NET_DEV_MGMT_NONE:
+                      /* TODO Insert code to load firmware part 1.                                                      */
+                      /* Ex:                                                                                            */
+                      /* wr_buf[0] = 0x01;                                                                              */
+                      /* ...                                                                                            */
+                      /*p_dev_bsp->SPI_WrRd(p_if,                                                                       */
+                      /*                   &wr_buf,                                                                     */
+                      /*                    p_dev_data-GlobalBuf,                                                       */
+                      /*                    len,                                                                        */
+                      /*                    p_err);                                                                     */
+                      /*p_dev_bsp->SPI_WrRd(p_if,                                                                       */
+                      /*                    p_firmware_part1,                                                           */
+                      /*                    p_dev_data-GlobalBuf,                                                       */
+                      /*                    len,                                                                        */
+                      /*                    p_err);                                                                     */
+                      if (*p_err != NET_DEV_ERR_NONE) {
+                           p_ctx->WaitResp              = DEF_NO;
+                           p_ctx->MgmtCompleted         = DEF_YES;
+                           p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                           p_dev_data->SubState         = NET_DEV_MGMT_NONE;
+                          *p_err                        = NET_DEV_ERR_FAULT;
+                           break;
+                      }
+                      p_ctx->WaitResp              = DEF_YES;
+                      p_ctx->MgmtCompleted         = DEF_NO;
+                      p_dev_data->WaitResponseType = NET_DEV_MGMT_LOAD_FIRMWARE;
+                      p_dev_data->SubState         = NET_DEV_MGMT_LOAD_FIRMWARE_FF_TAIM1;
+                     *p_err                        = NET_DEV_ERR_NONE;
+                      break;
+
+
+                 case NET_DEV_MGMT_LOAD_FIRMWARE_FF_TAIM2:
+                      /* TODO Insert code to load firmware part 2.                                                      */
+                      /* Ex:                                                                                            */
+                      /* wr_buf[0] = 0x01;                                                                              */
+                      /* ...                                                                                            */
+                      /*p_dev_bsp->SPI_WrRd(p_if,                                                                       */
+                      /*                   &wr_buf,                                                                     */
+                      /*                    p_dev_data-GlobalBuf,                                                       */
+                      /*                    len,                                                                        */
+                      /*                    p_err);                                                                     */
+                      /*p_dev_bsp->SPI_WrRd(p_if,                                                                       */
+                      /*                    p_firmware_part1,                                                           */
+                      /*                    p_dev_data-GlobalBuf,                                                       */
+                      /*                    len,                                                                        */
+                      /*                    p_err);                                                                     */
+                      if (*p_err != NET_DEV_ERR_NONE) {
+                           p_ctx->WaitResp              = DEF_NO;
+                           p_ctx->MgmtCompleted         = DEF_YES;
+                           p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                          *p_err                        = NET_DEV_ERR_FAULT;
+                           break;
+                      }
+                      p_ctx->WaitResp              = DEF_YES;
+                      p_ctx->MgmtCompleted         = DEF_NO;
+                      p_dev_data->WaitResponseType = NET_DEV_MGMT_LOAD_FIRMWARE;
+                      p_dev_data->SubState         = NET_DEV_MGMT_LOAD_FIRMWARE_FF_TAIM2;
+                     *p_err                        = NET_DEV_ERR_NONE;
+                      break;
+
+
+                 case NET_DEV_MGMT_LOAD_FIRMWARE_FF_DATA:
+                      /* TODO Insert code to load firmware part 3.                                                      */
+                      /* Ex:                                                                                            */
+                      /* wr_buf[0] = 0x01;                                                                              */
+                      /* ...                                                                                            */
+                      /*p_dev_bsp->SPI_WrRd(p_if,                                                                       */
+                      /*                   &wr_buf,                                                                     */
+                      /*                    p_dev_data-GlobalBuf,                                                       */
+                      /*                    len,                                                                        */
+                      /*                    p_err);                                                                     */
+                      /*p_dev_bsp->SPI_WrRd(p_if,                                                                       */
+                      /*                    p_firmware_part1,                                                           */
+                      /*                    p_dev_data-GlobalBuf,                                                       */
+                      /*                    len,                                                                        */
+                      /*                    p_err);                                                                     */
+                      if (*p_err != NET_DEV_ERR_NONE) {
+                           p_ctx->WaitResp              = DEF_NO;
+                           p_ctx->MgmtCompleted         = DEF_YES;
+                           p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                          *p_err                        = NET_DEV_ERR_FAULT;
+                           break;
+                      }
+                      p_ctx->WaitResp              = DEF_YES;
+                      p_ctx->MgmtCompleted         = DEF_NO;
+                      p_dev_data->WaitResponseType = NET_DEV_MGMT_LOAD_FIRMWARE;
+                      p_dev_data->SubState         = NET_DEV_MGMT_LOAD_FIRMWARE_FF_DATA;
+                     *p_err                        = NET_DEV_ERR_NONE;
+                      break;
+
+
+                 default:
+                     *p_err = NET_DEV_ERR_FAULT;
+                      break;
+             }
+             break;
+
+
+        case NET_DEV_MGMT_INIT_MAC:
+             /* TODO Insert code to intialize mac layer.                                                                */
+             /* Ex:                                                                                                     */
+             /* wr_buf[0] = 0x01;                                                                                       */
+             /* ...                                                                                                     */
+             /*p_dev_bsp->SPI_WrRd(p_if,                                                                                */
+             /*                   &wr_buf,                                                                              */
+             /*                    p_dev_data-GlobalBuf,                                                                */
+             /*                    len,                                                                                 */
+             /*                    p_err);                                                                              */
+             if (*p_err != NET_DEV_ERR_NONE) {
+                  p_ctx->WaitResp              = DEF_NO;
+                  p_ctx->MgmtCompleted         = DEF_YES;
+                  p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                 *p_err                        = NET_DEV_ERR_FAULT;
+                  break;
+             }
+             p_ctx->WaitResp              = DEF_YES;
+             p_ctx->MgmtCompleted         = DEF_NO;
+             p_dev_data->WaitResponseType = NET_DEV_MGMT_INIT_MAC;
+            *p_err                        = NET_DEV_ERR_NONE;
+             break;
+
+
+        case NET_DEV_MGMT_GET_HW_ADDR:
+             /* TODO Insert code to receive the mac address (asynchronous response).                                    */
+             /* Ex:                                                                                                     */
+             /* wr_buf[0] = 0x01;                                                                                       */
+             /* ...                                                                                                     */
+             /*p_dev_bsp->SPI_WrRd(p_if,                                                                                */
+             /*                   &wr_buf,                                                                              */
+             /*                    p_dev_data-GlobalBuf,                                                                */
+             /*                    len,                                                                                 */
+             /*                    p_err);                                                                              */
+             if (*p_err != NET_DEV_ERR_NONE) {
+                  p_ctx->WaitResp              = DEF_NO;
+                  p_ctx->MgmtCompleted         = DEF_YES;
+                  p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                 *p_err                        = NET_DEV_ERR_FAULT;
+                  break;
+             }
+
+             p_ctx->WaitResp              = DEF_YES;
+             p_ctx->MgmtCompleted         = DEF_NO;
+             p_dev_data->WaitResponseType = NET_DEV_MGMT_GET_HW_ADDR;
+            *p_err                        = NET_DEV_ERR_NONE;
+             break;
+
+
+        case NET_DEV_MGMT_GET_FIRMWARE_VERSION:
+             /* TODO Insert code to receive the firmware version (asynchronous response).                               */
+             /* Ex:                                                                                                     */
+             /* wr_buf[0] = 0x01;                                                                                       */
+             /* ...                                                                                                     */
+             /*p_dev_bsp->SPI_WrRd(p_if,                                                                                */
+             /*                   &wr_buf,                                                                              */
+             /*                    p_dev_data-GlobalBuf,                                                                */
+             /*                    len,                                                                                 */
+             /*                    p_err);                                                                              */
+             if (*p_err != NET_DEV_ERR_NONE) {
+                  p_ctx->WaitResp              = DEF_NO;
+                  p_ctx->MgmtCompleted         = DEF_YES;
+                  p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                 *p_err                        = NET_DEV_ERR_FAULT;
+                  break;
+             }
+
+             p_ctx->WaitResp              = DEF_YES;
+             p_ctx->MgmtCompleted         = DEF_NO;
+             p_dev_data->WaitResponseType = NET_DEV_MGMT_GET_HW_ADDR;
+            *p_err                        = NET_DEV_ERR_NONE;
+             break;
+
+
+        case NET_IF_WIFI_CMD_SCAN:
+             /* TODO Insert code to scan for available wireless network (asynchronous response).                        */
+             /* Ex:                                                                                                     */
+             /* wr_buf[0] = 0x01;                                                                                       */
+             /* ...                                                                                                     */
+             /*p_dev_bsp->SPI_WrRd(p_if,                                                                                */
+             /*                   &wr_buf,                                                                              */
+             /*                    p_dev_data-GlobalBuf,                                                                */
+             /*                    len,                                                                                 */
+             /*                    p_err);                                                                              */
+             if (*p_err != NET_DEV_ERR_NONE) {
+                  p_ctx->WaitResp              = DEF_NO;
+                  p_ctx->MgmtCompleted         = DEF_YES;
+                  p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                 *p_err                        = NET_DEV_ERR_FAULT;
+                  break;
+             }
+
+             p_ctx->WaitResp              = DEF_YES;
+             p_ctx->MgmtCompleted         = DEF_NO;
+             p_dev_data->WaitResponseType = NET_IF_WIFI_CMD_SCAN;
+            *p_err                        = NET_DEV_ERR_NONE;
+             break;
+
+
+        case NET_IF_WIFI_CMD_JOIN:
+             /* TODO Insert code to join a wireless network (asynchronous response).                                    */
+             /* Ex:                                                                                                     */
+             /* wr_buf[0] = 0x01;                                                                                       */
+             /* ...                                                                                                     */
+             /*p_dev_bsp->SPI_WrRd(p_if,                                                                                */
+             /*                   &wr_buf,                                                                              */
+             /*                    p_dev_data-GlobalBuf,                                                                */
+             /*                    len,                                                                                 */
+             /*                    p_err);                                                                              */
+             if (*p_err != NET_DEV_ERR_NONE) {
+                  p_ctx->WaitResp              = DEF_NO;
+                  p_ctx->MgmtCompleted         = DEF_YES;
+                  p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                 *p_err                        = NET_DEV_ERR_FAULT;
+                  break;
+             }
+
+             p_ctx->WaitResp              = DEF_YES;
+             p_ctx->MgmtCompleted         = DEF_NO;
+             p_dev_data->WaitResponseType = NET_IF_WIFI_CMD_JOIN;
+             break;
+
+
+        case NET_IF_IO_CTRL_LINK_STATE_GET:
+        case NET_IF_IO_CTRL_LINK_STATE_GET_INFO:
+             /* TODO Insert code to get the link state.                                                                 */
+             /* Ex:                                                                                                     */
+             /* wr_buf[0] = 0x01;                                                                                       */
+             /* ...                                                                                                     */
+             /*p_dev_bsp->SPI_WrRd(p_if,                                                                                */
+             /*                   &wr_buf,                                                                              */
+             /*                    p_dev_data-GlobalBuf,                                                                */
+             /*                    len,                                                                                 */
+             /*                    p_err);                                                                              */
+             /* p_link_state = (CPU_BOOLEAN *)p_dev_data-GlobalBuf[2];                                                  */
+             p_ctx->WaitResp      = DEF_NO;
+             p_ctx->MgmtCompleted = DEF_YES;
+            *p_err                = NET_DEV_ERR_NONE;
+             break;
+
+
+        case NET_IF_IO_CTRL_LINK_STATE_UPDATE:
+             /* TODO Insert code to get the link state.                                                                 */
+             /* Ex:                                                                                                     */
+             /* wr_buf[0] = 0x01;                                                                                       */
+             /* ...                                                                                                     */
+             /*p_dev_bsp->SPI_WrRd(p_if,                                                                                */
+             /*                   &wr_buf,                                                                              */
+             /*                    p_dev_data-GlobalBuf,                                                                */
+             /*                    len,                                                                                 */
+             /*                    p_err);                                                                              */
+             /* p_link_state = (CPU_BOOLEAN *)p_cmd_data;                                                               */
+             /* p_link_state = (CPU_BOOLEAN *)p_dev_data-GlobalBuf[2];                                                  */
+             p_ctx->WaitResp      = DEF_NO;
+             p_ctx->MgmtCompleted = DEF_YES;
+            *p_err                = NET_DEV_ERR_NONE;
+             break;
+
+
+        default:
+             p_ctx->WaitResp              = DEF_NO;
+             p_ctx->MgmtCompleted         = DEF_YES;
+             p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+            *p_err                        = NET_DEV_ERR_FAULT;
+             break;
+    }
+
+    p_dev_bsp->SPI_ChipSelDis(p_if);
+    p_dev_bsp->SPI_Unlock(p_if);
+
+    return (rtn_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetDev_MgmtProcessResp()
+*
+* Description : After that the wireless manager has received the response, this function is called to analyse,
+*               set the state machine context and fill the return buffer.analyse
+*
+* Argument(s) : p_if                Pointer to a network interface.
+*               ----                Argument validated in NetIF_IF_Add(),
+*                                                         NetIF_IF_Start(),
+*                                                         NetIF_RxHandler(),
+*                                                         NetIF_WiFi_Scan(),
+*                                                         NetIF_WiFi_Join(),
+*                                                         NetIF_WiFi_Leave().
+*
+*               cmd                 Management command to be executed:
+*
+*                                       NET_IF_WIFI_CMD_SCAN
+*                                       NET_IF_WIFI_CMD_JOIN
+*                                       NET_IF_WIFI_CMD_LEAVE
+*                                       NET_IF_IO_CTRL_LINK_STATE_GET
+*                                       NET_IF_IO_CTRL_LINK_STATE_GET_INFO
+*                                       NET_IF_IO_CTRL_LINK_STATE_UPDATE
+*                                       Others management commands defined by this driver.
+*
+*               p_ctx               State machine context See Note #1.
+*
+*               p_buf_rxd           Pointer to a network buffer that contains the command data response.
+*
+*               buf_rxd_len         Length of the data response.
+*
+*               p_buf_rtn           Pointer to buffer that will receive return data.
+*
+*               buf_rtn_len_max     Return maximum data length.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE    Management response     successfully processed
+*                               NET_DEV_ERR_FAULT   Management response NOT successfully processed
+*
+* Caller(s)   : NetWiFiMgr_MgmtHandler() via 'p_dev_api->MgmtProcessResp()'.
+*
+* Return(s)   : Length of data wrote in the return buffer in octet.
+*
+* Note(s)     : (1) The network buffer is always freed by the wireless manager, no matter the error returned.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetDev_MgmtProcessResp  (NET_IF            *p_if,
+                                             NET_IF_WIFI_CMD    cmd,
+                                             NET_WIFI_MGR_CTX  *p_ctx,
+                                             CPU_INT08U        *p_buf_rxd,
+                                             CPU_INT16U         buf_rxd_len,
+                                             CPU_INT08U        *p_buf_rtn,
+                                             CPU_INT16U         buf_rtn_len_max,
+                                             NET_ERR           *p_err)
+{
+    CPU_INT08U         type;
+    CPU_INT32U         rtn;
+    CPU_INT08U        *p_frame;
+    CPU_INT08U        *p_dst;
+    void const        *p_src;
+    CPU_INT16U         len;
+    NET_DEV_DATA      *p_dev_data;
+    NET_DEV_CFG_WIFI  *p_dev_cfg;
+
+
+    p_dev_cfg  = (NET_DEV_CFG_WIFI *)p_if->Dev_Cfg;
+    p_dev_data = (NET_DEV_DATA     *)p_if->Dev_Data;
+    type        = p_buf_rxd[2];
+    p_frame     = p_buf_rxd + p_dev_cfg->RxBufIxOffset;
+   *p_err       = NET_DEV_ERR_NONE;
+    rtn         = 0;
+
+    switch (cmd) {
+        case NET_DEV_MGMT_BOOT_FIRMWARE:
+             if ((p_dev_data->WaitResponseType == NET_DEV_MGMT_BOOT_FIRMWARE) &&
+                 (type                         == NET_DEV_RESP_CARD_RDY)) {
+                  p_ctx->WaitResp      = DEF_NO;
+                  p_ctx->MgmtCompleted = DEF_YES;
+             } else {
+                  p_ctx->WaitResp      = DEF_YES;
+                  p_ctx->MgmtCompleted = DEF_NO;
+             }
+             break;
+
+
+        case NET_DEV_MGMT_GET_HW_ADDR:
+             if ((p_dev_data->WaitResponseType == NET_DEV_MGMT_GET_HW_ADDR) &&
+                 (type                         == NET_DEV_RESP_CTRL)    ) {
+                  p_dst = (CPU_INT08U *)p_buf_rtn;
+                  p_src =  p_frame + 2;
+                  Mem_Copy(p_dst, p_src, buf_rtn_len_max);
+                  rtn = buf_rtn_len_max;
+                  p_ctx->WaitResp      = DEF_NO;
+                  p_ctx->MgmtCompleted = DEF_YES;
+             } else {
+                  p_ctx->WaitResp      = DEF_YES;
+                  p_ctx->MgmtCompleted = DEF_NO;
+             }
+             break;
+
+
+        case NET_DEV_MGMT_INIT_MAC:
+             if ((p_dev_data->WaitResponseType == NET_DEV_MGMT_INIT_MAC) &&
+                 (type                         == NET_DEV_RESP_INIT)    ) {
+                  p_ctx->WaitResp      = DEF_NO;
+                  p_ctx->MgmtCompleted = DEF_YES;
+             } else {
+                  p_ctx->WaitResp      = DEF_YES;
+                  p_ctx->MgmtCompleted = DEF_NO;
+             }
+             break;
+
+
+        case NET_IF_WIFI_CMD_SCAN:
+             if ((p_dev_data->WaitResponseType == NET_IF_WIFI_CMD_SCAN) &&
+                 (type                         == NET_DEV_RESP_SCAN)   ) {
+                  len = buf_rxd_len - p_dev_cfg->RxBufIxOffset;
+                  rtn = NetDev_MgmtProcessScanResp(p_if, p_frame, len, p_buf_rtn, buf_rtn_len_max);
+                  p_ctx->WaitResp      = DEF_NO;
+                  p_ctx->MgmtCompleted = DEF_YES;
+             }
+             break;
+
+             break;
+
+
+        case NET_IF_WIFI_CMD_JOIN:
+             if ((p_dev_data->WaitResponseType == NET_IF_WIFI_CMD_JOIN) &&
+                 (type                         == NET_DEV_RESP_JOIN)   ) {
+                  p_ctx->WaitResp      = DEF_NO;
+                  p_ctx->MgmtCompleted = DEF_YES;
+
+                  if (p_frame[2] != DEF_CLR) {
+                     *p_err = NET_DEV_ERR_FAULT;
+                  }
+             }
+             break;
+
+
+        case NET_DEV_MGMT_LOAD_FIRMWARE:
+             switch (p_dev_data->SubState) {
+                 case NET_DEV_MGMT_LOAD_FIRMWARE_FF_TAIM1:
+                      if (type == NET_DEV_RESP_TAIM1) {
+                          p_dev_data->WaitResponseType = NET_DEV_MGMT_LOAD_FIRMWARE;
+                          p_dev_data->SubState         = NET_DEV_MGMT_LOAD_FIRMWARE_FF_TAIM2;
+                          p_ctx->WaitResp              = DEF_NO;
+                          p_ctx->MgmtCompleted         = DEF_NO;
+
+                      } else {
+                          p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                          p_dev_data->SubState         = NET_DEV_MGMT_NONE;
+                          p_ctx->WaitResp              = DEF_NO;
+                          p_ctx->MgmtCompleted         = DEF_YES;
+                         *p_err                        = NET_DEV_ERR_FAULT;
+                      }
+                      break;
+
+
+                 case NET_DEV_MGMT_LOAD_FIRMWARE_FF_TAIM2:
+                      if (type == NET_DEV_RESP_TAIM2) {
+                          p_dev_data->WaitResponseType = NET_DEV_MGMT_LOAD_FIRMWARE;
+                          p_dev_data->SubState         = NET_DEV_MGMT_LOAD_FIRMWARE_FF_DATA;
+                          p_ctx->WaitResp              = DEF_NO;
+                          p_ctx->MgmtCompleted         = DEF_NO;
+
+                      } else {
+                          p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                          p_dev_data->SubState         = NET_DEV_MGMT_NONE;
+                          p_ctx->WaitResp              = DEF_NO;
+                          p_ctx->MgmtCompleted         = DEF_YES;
+                         *p_err                        = NET_DEV_ERR_FAULT;
+                      }
+                      break;
+
+
+                 case NET_DEV_MGMT_LOAD_FIRMWARE_FF_DATA:
+                      p_dev_data->WaitResponseType = NET_DEV_MGMT_NONE;
+                      p_dev_data->SubState         = NET_DEV_MGMT_NONE;
+                      p_ctx->WaitResp              = DEF_NO;
+                      p_ctx->MgmtCompleted         = DEF_YES;
+                      if (type != NET_DEV_RESP_TADM) {
+                         *p_err = NET_DEV_ERR_FAULT;
+                      }
+                      break;
+
+
+                 default:
+                     *p_err = NET_DEV_ERR_FAULT;
+                      break;
+             }
+             break;
+
+
+        default:
+            *p_err = NET_DEV_ERR_FAULT;
+             break;
+    }
+
+    return (rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetDev_MgmtProcessScanResp()
+*
+* Description : This function fill the application buffer by translating the scan response.
+*
+* Argument(s) : p_if        Pointer to a network interface.
+*               ----        Argument validated in NetIF_IF_Add(),
+*                                                 NetIF_IF_Start(),
+*                                                 NetIF_RxHandler(),
+*                                                 NetIF_WiFi_Scan(),
+*                                                 NetIF_WiFi_Join(),
+*                                                 NetIF_WiFi_Leave().
+*
+*               p_frame     Pointer to a wireless management frame that contains the scan response.
+*
+*               frame_len   Length of the scan response.
+*
+*               p_ap_buf    Pointer to buffer that will receive access point found.
+*
+*               buf_len     Length of the access point buffer.
+*
+* Caller(s)   : NetDev_MgmtProcessResp()
+*
+* Return(s)   : Length of data wrote in the return buffer in octet.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetDev_MgmtProcessScanResp (NET_IF      *p_if,
+                                        CPU_INT08U  *p_frame,
+                                        CPU_INT16U   frame_len,
+                                        CPU_INT08U  *p_ap_buf,
+                                        CPU_INT16U   buf_len)
+{
+    CPU_INT08U               i;
+    CPU_INT08U               ap_ctn;
+    CPU_INT08U               ap_rtn_max;
+    NET_IF_WIFI_AP          *p_ap;
+    NET_DEV_MGMT_SCAN_AP    *p_scan_ap;
+    NET_DEV_MGMT_SCAN_RESP  *p_scan_response;
+
+
+    p_ap            = (NET_IF_WIFI_AP         *)p_ap_buf;
+    p_scan_response = (NET_DEV_MGMT_SCAN_RESP *)p_frame;
+    ap_rtn_max      =  buf_len / sizeof(NET_IF_WIFI_AP);
+    ap_ctn          =  p_scan_response->ScanCnt;
+
+    for (i = 0; i < ap_ctn - 1; i++) {
+        p_scan_ap = (NET_DEV_MGMT_SCAN_AP *)&p_scan_response->APs[i];
+        Str_Copy_N((CPU_CHAR *)&p_ap->SSID,
+                   (CPU_CHAR *)&p_scan_ap->SSID,
+                                NET_IF_WIFI_STR_LEN_MAX_SSID);
+        p_ap->SignalStrength = p_scan_ap->RSSID;
+        p_ap->Ch             = p_scan_ap->Ch;
+        switch (p_scan_ap->SecMode) {
+            case 1:
+                 p_ap->SecurityType = NET_IF_WIFI_SECURITY_WPA;
+                 break;
+
+
+            case 2:
+                 p_ap->SecurityType = NET_IF_WIFI_SECURITY_WPA2;
+                 break;
+
+
+            case 3:
+                 p_ap->SecurityType = NET_IF_WIFI_SECURITY_WEP;
+                 break;
+
+
+            case 0:
+            default:
+                p_ap->SecurityType = NET_IF_WIFI_SECURITY_OPEN;
+                break;
+        }
+        p_ap++;
+
+        if (i == ap_rtn_max - 1) {
+            break;
+        }
+    }
+
+    if (i < ap_rtn_max - 1) {
+        return (ap_ctn * sizeof(NET_IF_WIFI_AP));
+    } else {
+        return (ap_rtn_max);
+    }
+}
+
+#endif /* NET_IF_WIFI_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Template/net_dev_wifi_template_spi.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Template/net_dev_wifi_template_spi.h
new file mode 100644
index 0000000..4c5c07f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Dev/WiFi/Template/net_dev_wifi_template_spi.h
@@ -0,0 +1,91 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK DEVICE DRIVER
+*
+*                                        WIRELESS SPI TEMPLATE
+*
+* Filename      : net_dev_wifi_template_spi.h
+* Version       : V3.03.01.00
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/TCP-IP V2.12.00 (or more recent version) is included in the project build.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DEV_TEMPLATE_WIFI_SPI_MODULE_PRESENT
+#define  NET_DEV_TEMPLATE_WIFI_SPI_MODULE_PRESENT
+#ifdef  NET_IF_WIFI_MODULE_EN
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                      DEVICE DRIVER ERROR CODES
+*
+* Note(s) : (1) ALL device-independent error codes #define'd in      'net_err.h';
+*               ALL device-specific    error codes #define'd in this 'net_dev_&&&.h'.
+*
+*           (2) Network error code '11,000' series reserved for network device drivers.
+*               See 'net_err.h  NETWORK DEVICE ERROR CODES' to ensure that device-specific
+*               error codes do NOT conflict with device-independent error codes.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_API_WIFI  NetDev_API_TemplateWiFiSpi;
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif /* NET_IF_WIFI_MODULE_EN                    */
+#endif /* NET_DEV_TEMPLATE_WIFI_SPI_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Init/init_ether.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Init/init_ether.c
new file mode 100644
index 0000000..62135e0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Init/init_ether.c
@@ -0,0 +1,443 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                       ETHERNET INITIALIZATION
+*
+* Filename      : init_ether.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize uC/TCP-IP:
+*
+*                     (a) Initialize Stack tasks and objects
+*                     (b) Initialize an Ethernet Interface
+*                     (c) Start the Ethernet Interface
+*                     (d) Configure IP addresses of the Interface
+*
+*                 (2) This example is based on template files so some modifications will be required. Insert the
+*                     appropriate project/board specific code to perform the stated actions wherever 'TODO'
+*                     comments are found.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The device configuration template file should be copied to your application folder and modified
+*               to follow your requirements. Refer to the User's Manual for more information about how to configure
+*               your device.
+*
+*               We recommend starting with a working configuration from an example project for your MCU. Micrium might
+*               have some projects available only for internal usage, so if no working projects are found online, please
+*               ask at support@micrium.com for a configuration file example.
+*
+*           (2) Most of the time Micrium provides an Ethernet Network device driver which can be found under the
+*               following folder:
+*
+*                   $/Micrium/Software/uC-TCPIP/Dev/Ether//net_dev_.h
+*
+*               If Micrium does not support your network device driver, you will have to write your own device driver
+*               starting from the Ethernet Device driver template. Before starting to write your own driver, make
+*               sure that the driver is not already available.
+*
+*           (3) The PHY driver should be provided by Micrium and located under the following folder:
+*
+*                   $/Micrium/Software/uC-TCPIP/Dev/Ether/PHY//net_phy_.h
+*
+*               Most of the time for MII, RMII or GMII PHY, the generic PHY works correctly. If your PHY is not
+*               available and the generic is not working you will have to write you own PHY driver. Normally
+*               for a single connector PHY, some minor changes to the generic driver are required.
+*
+*           (4) The board support package (BSP) template file should be copied to your application folder and modified
+*               for your specific board. Refer to the User's Manual for more information about how to write a BSP.
+*
+*               However, we recommend starting with a working configuration from an example project for your MCU.
+*               Micrium might have some projects available only for internal usage, so if no working project are found
+*               online, please ask at support@micrium.com for a BSP file example specific for your MCU.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#ifdef NET_IPv4_MODULE_EN
+#include  
+#endif
+
+#ifdef NET_IPv6_MODULE_EN
+#include  
+#endif
+
+#include                        /* TODO Device configuration header. See Note #1.           */
+#include   /* TODO Device driver header.        See Note #2.           */
+#include                   /* TODO PHY driver header.           See Note #3.           */
+#include                      /* TODO BSP header.                  See Note #4.           */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef NET_IPv6_MODULE_EN
+static  void  App_AutoCfgResult(      NET_IF_NBR                 if_nbr,
+                                const NET_IPv6_ADDR             *p_addr_local,
+                                const NET_IPv6_ADDR             *p_addr_global,
+                                      NET_IPv6_AUTO_CFG_STATUS   auto_cfg_result);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        AppInit_TCPIP_Ether()
+*
+* Description : Initialize uC/TCP-IP:
+*
+*                   (a) Initialize tasks and objects
+*                   (b) Initialize an Ethernet Interface
+*                   (c) Start the Ethernet Interface
+*                   (d) Configure IP addresses of the Interface
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK,   initialization completed successfully.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Some prerequisite module initializations are required. The following modules must be initialized
+*                   prior to starting the Network Protocol stacks initialization:
+*
+*                   (a) uC/CPU
+*                   (b) uC/LIB Memory module
+*
+*               (2) Net_Init() is the Network Protocol stack's initialization function. It must only be called
+*                   once and before any other Network functions.
+*
+*                   (a) This function takes the three TCP-IP internal task configuration structures as
+*                       arguments (such as priority, stack size, etc.). By default these configuration
+*                       structures are defined in net_cfg.c :
+*
+*                       NetRxTaskCfg            RX    task configuration
+*                       NetTxDeallocTaskCfg     TX    task configuration
+*                       NetTmrTaskCfg           Timer task configuration
+*
+*                   (b) We recommend you configure the Network Protocol Stack task priorities & Network application
+*                       (such as a Web server) task priorities as follows:
+*
+*                           NetTxDeallocTaskCfg                         (highest priority)
+*
+*                           Network applications (HTTPs, FTP, DNS, etc.)
+*
+*                           NetTmrTaskCfg
+*                           NetRxTaskCfg                                (lowest  priority)
+*
+*                       We recommend that the uC/TCP-IP Timer task and network interface Receive task be lower
+*                       priority than almost all other application tasks; but we recommend that the network
+*                       interface Transmit De-allocation task be higher priority than all application tasks that use
+*                       uC/TCP-IP network services.
+*
+*                       However, better performance can be observed when the Network applications are set with the
+*                       lowest priority. Some experimentation could be required to identify the best task priority
+*                       configuration.
+*
+*               (3) NetIF_Add() is a network interface function responsible for initializing a Network Device driver.
+*
+*                   (a) NetIF_Add() returns the interface index number. The interface index number should start at '1',
+*                       since the interface '0' is reserved for the loopback interface. The interface index number must
+*                       be used when you want to access the interface using any Network interface API.
+*
+*                   (b) The first parameter is the address of the Network interface API. These API are provided by
+*                       Micrium and are defined in file 'net_if_.h'. It should be either:
+*
+*                           NetIF_API_Ether     Ethernet interface
+*                           NetIF_API_WiFi      Wireless interface
+*
+*                   (c) The second parameter is the address of the device API function. The API should be defined in the
+*                       Device driver header:
+*
+*                            $/uC-TCPIP/Dev///net_dev_.h
+*
+*                   (d) The third parameter is the address of the device BSP data structure. Refer to the section
+*                       'INCLUDE FILES - Note #4' of this file for more details.
+*
+*                   (e) The fourth parameter is the address of the device configuration data structure. Refer to the
+*                       section 'INCLUDE FILES - Note #1' of this file for more details.
+*
+*                   (f) The fifth parameter is the address of the PHY API function. Refer to the section
+*                       'INCLUDE FILES - Note #3' of this file for more details.
+*
+*                   (g) The sixth and last parameter is the address of the PHY configuration data structure. The PHY
+*                       configuration should be located in net_dev_cfg.c/h.
+*
+*               (4) NetIF_Start() makes the network interface ready to receive and transmit. Once this function returns without
+*                   an error the device should be able to receive packet, an interrupt should then be generated from the Ethernet
+*                   controller (at least for each packets present on the cable).
+*
+*               (5) NetASCII_Str_to_IP() converts the human readable address into a format required by the protocol stack.
+*
+*                   In this example the IP address used, 10.10.10.64, addresses out of the 10.10.10.1 network with a subnet mask
+*                   of 255.255.255.0. To match different networks, the IP address, the subnet mask and the default gateway's IP
+*                   address have to be customized.
+*
+*               (6) NetIPv4_CfgAddrAdd() configures the network IPv4 static parameters (IPv4 address, subnet mask and
+*                   default gateway) required for the interface. More than one set of network parameters can be
+*                   configured per interface. NetIPv4_CfgAddrAdd() can be repeated for as many network parameter
+*                   sets as need configuring for an interface.
+*
+*                   IPv4 parameters can be added whenever as long as the interface was added (initialized) even if the interface
+*                   is started or not.
+*
+*                   For Dynamic IPv4 configuration, uC/DHCPc is required
+*
+*               (7) NetIPv6_CfgAddrAdd() configures the network IPv6 static parameters (IPv6 address and prefix length)
+*                   required for the interface. More than one set of network parameters can be configured per interface.
+*                   NetIPv6_CfgAddrAdd() can be repeated for as many network parameter sets as need configuring for
+*                   an interface.
+*
+*                   IPv6 parameters can be added whenever as long as the interface is added (initialized) even if the interface
+*                   is started or not.
+*
+*                   For the moment dynamic IPv6 is not yet supported either by IPv6 Autoconfig or DHCPv6c.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppInit_TCPIP_Ether (void)
+{
+    NET_IF_NBR      if_nbr;
+    NET_ERR         err_net;
+#ifdef NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR   addr_ipv4;
+    NET_IPv4_ADDR   msk_ipv4;
+    NET_IPv4_ADDR   gateway_ipv4;
+#endif
+#ifdef NET_IPv6_MODULE_EN
+    CPU_BOOLEAN     cfg_result;
+    NET_FLAGS       ipv6_flags;
+    NET_IPv6_ADDR   addr_ipv6;
+#endif
+
+
+                                                                /* ------- PREREQUISITES MODULE INITIALIZATION -------- */
+    CPU_Init();                                                 /* See Note #1.                                         */
+    Mem_Init();
+
+
+                                                                /* -------- INITIALIZE NETWORK TASKS & OBJECTS -------- */
+    err_net = Net_Init(&NetRxTaskCfg,                           /* See Note #2.                                         */
+                       &NetTxDeallocTaskCfg,
+                       &NetTmrTaskCfg);
+    if (err_net != NET_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* -------------- ADD ETHERNET INTERFACE -------------- */
+                                                                /* See Note #3.                                         */
+    if_nbr = NetIF_Add((void    *)&NetIF_API_Ether,             /* See Note #3b.                                        */
+                       (void    *)&NetDev_API_TemplateEtherDMA, /* TODO Device driver API,    See Note #3c.             */
+                       (void    *)&NetDev_BSP_BoardDev_Nbr,     /* TODO BSP API,              See Note #3d.             */
+                       (void    *)&NetDev_Cfg_Ether_1,          /* TODO Device configuration, See Note #3e.             */
+                       (void    *)&NetPhy_API_Generic,          /* TODO PHY driver API,       See Note #3f.             */
+                       (void    *)&NetPhy_Cfg_Ether_1,          /* TODO PHY configuration,    See Note #3g.             */
+                                  &err_net);
+    if (err_net != NET_IF_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- START ETHERNET INTERFACE ------------- */
+                                                                /* See Note #4.                                         */
+    NetIF_Start(if_nbr, &err_net);                              /* Makes the interface ready to receive and transmit.   */
+    if (err_net != NET_IF_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+#ifdef NET_IPv4_MODULE_EN
+                                                                /* --------- CONFIGURE IPV4 STATIC ADDRESSES ---------- */
+                                                                /* For Dynamic IPv4 configuration, uC/DHCPc is required */
+
+                                                                /* TODO Update IPv4 Addresses following your network ...*/
+                                                                /* ... requirements.                                    */
+
+                                                                /* See Note #5.                                         */
+    NetASCII_Str_to_IP("10.10.10.64",                           /* Convert Host IPv4 string address to 32 bit address.  */
+                       &addr_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetASCII_Str_to_IP("255.255.255.0",                         /* Convert IPv4 mask string to 32 bit address.          */
+                       &msk_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetASCII_Str_to_IP("10.10.10.1",                            /* Convert Gateway string address to 32 bit address.    */
+                       &gateway_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetIPv4_CfgAddrAdd(if_nbr,                                  /* Add a statically-configured IPv4 host address,   ... */
+                       addr_ipv4,                               /* ... subnet mask, & default gateway to the        ... */
+                       msk_ipv4,                                /* ... interface. See Note #6.                          */
+                       gateway_ipv4,
+                      &err_net);
+    if (err_net != NET_IPv4_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+
+#ifdef  NET_IPv6_MODULE_EN
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+                                                                /* ----- START IPV6 STATELESS AUTO-CONFIGURATION ------ */
+    NetIPv6_AddrAutoCfgHookSet(if_nbr,                          /* Set hook function to received Auto-Cfg result.       */
+                              &App_AutoCfgResult,
+                              &err_net);
+
+    cfg_result = NetIPv6_AddrAutoCfgEn(if_nbr,                  /* Enable and Start Auto-Configuration process.         */
+                                       DEF_YES,
+                                      &err_net);
+    if (cfg_result == DEF_FAIL) {
+        return (DEF_FAIL);
+    }
+
+#endif
+                                                                /* ----- CONFIGURE IPV6 STATIC LINK LOCAL ADDRESS ----- */
+                                                                /* DHCPv6c is not yet available.                        */
+
+
+                                                                /* TODO Update IPv6 Address following your network ...  */
+                                                                /* ... requirements.                                    */
+
+                                                                /* See Note #7.                                         */
+    NetASCII_Str_to_IP("fe80::1111:1111",                       /* Convert IPv6 string address to 128 bit address.      */
+                       &addr_ipv6,
+                        NET_IPv6_ADDR_SIZE,
+                       &err_net);
+
+    ipv6_flags = 0;
+    DEF_BIT_SET(ipv6_flags, NET_IPv6_FLAG_BLOCK_EN);            /* Set Address Configuration as blocking.               */
+    DEF_BIT_SET(ipv6_flags, NET_IPv6_FLAG_DAD_EN);              /* Enable DAD with Address Configuration.               */
+
+    cfg_result = NetIPv6_CfgAddrAdd(if_nbr,                     /* Add a statically-configured IPv6 host address to ... */
+                                   &addr_ipv6,                  /* ... the interface. See Note 6.                       */
+                                    64,
+                                    ipv6_flags,
+                                   &err_net);
+    if (cfg_result == DEF_FAIL) {
+        return (DEF_FAIL);
+    }
+
+
+#endif  /* NET_IPv6_MODULE_EN */
+
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          App_AutoCfgResult()
+*
+* Description : Hook function to received the IPv6 Auto-Configuration process result.
+*
+* Argument(s) : if_nbr          Network Interface number on which Auto-Configuration occurred.
+*
+*               p_addr_local    Pointer to IPv6 link-local address configured, if any.
+*                               DEF_NULL, otherwise.
+*
+*               p_addr_global   Pointer to IPv6 global address configured, if any.
+*                               DEF_NULL, otherwise.
+*
+*               auto_cfg_result Result status of the IPv6 Auto-Configuration process.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Referenced in AppInit_TCPIP_MultipleIF().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+static  void  App_AutoCfgResult (      NET_IF_NBR                 if_nbr,
+                                 const NET_IPv6_ADDR             *p_addr_local,
+                                 const NET_IPv6_ADDR             *p_addr_global,
+                                       NET_IPv6_AUTO_CFG_STATUS   auto_cfg_result)
+{
+    CPU_CHAR  ip_string[NET_ASCII_LEN_MAX_ADDR_IPv6];
+    NET_ERR   err_net;
+
+
+    if (p_addr_local != DEF_NULL) {
+        NetASCII_IPv6_to_Str((NET_IPv6_ADDR *)p_addr_local, ip_string, DEF_NO, DEF_YES, &err_net);
+        printf("IPv6 Address Link Local: %s\n", ip_string);
+    }
+
+    if (p_addr_global != DEF_NULL) {
+        NetASCII_IPv6_to_Str((NET_IPv6_ADDR *)p_addr_global, ip_string, DEF_NO, DEF_YES, &err_net);
+        printf("IPv6 Address Global: %s\n", ip_string);
+    }
+
+    switch (auto_cfg_result) {
+        case NET_IPv6_AUTO_CFG_STATUS_FAILED:
+             printf("Auto-Configuration failed.\n");
+             break;
+
+
+        case NET_IPv6_AUTO_CFG_STATUS_SUCCEEDED:
+             printf("Auto-Configuration succeeded.\n");
+             break;
+
+
+        case NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL:
+             printf("Auto-Configuration with Link-Local address only.\n");
+             break;
+
+
+        default:
+             printf("Invalid Auto-Configuration result.\n");
+             break;
+    }
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Init/init_multiple_if.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Init/init_multiple_if.c
new file mode 100644
index 0000000..6530d41
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Init/init_multiple_if.c
@@ -0,0 +1,705 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                  MULTIPLE INTERFACE INITIALIZATION
+*
+* Filename      : init_multiple_if.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize uC/TCP-IP:
+*
+*                     (a) Initialize Stack tasks and objects
+*
+*                     (b) Initialize an Ethernet Interface
+*                     (c) Start that Ethernet Interface
+*                     (d) Configure IP addresses of the Ethernet Interface
+*
+*                     (e) Initialize an Wireless Interface
+*                     (f) Start that Wireless Interface
+*                     (g) Scan for Wireless networks available
+*                     (h) Analyze scan result
+*                     (i) Join a Wireless network
+*                     (j) Configure IP addresses of that Wireless Interface
+*
+*                 (2) This example is based on template files so some modifications will be required. Insert the
+*                     appropriate project/board specific code to perform the stated actions wherever 'TODO'
+*                     comments are found.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The device configuration template file should be copied to your application folder and modified
+*               to follow your requirements. Refer to the User's Manual for more information about how to configure
+*               your device.
+*
+*               We recommend starting with a working configuration from an example project for your wireless module.
+*               Micrium might have some projects available only for internal usage, so if no working projects are found
+*               online, please ask at support@micrium.com for a configuration file example.
+*
+*           (2) Most of the time Micrium provides a device driver which can be found under the following folders:
+*
+*                   $/Micrium/Software/uC-TCPIP/Dev/Ether//net_dev_.h
+*                   $/Micrium/Software/uC-TCPIP/Dev/WiFi//net_dev_.h
+*
+*               If Micrium does not support your network device driver, you will have to write your own device
+*               driver starting from the Device driver template. Before starting to write your own driver, make
+*               sure that the driver is not already available.
+*
+*           (3) The PHY driver should be provided by Micrium and located under the following folder:
+*
+*                   $/Micrium/Software/uC-TCPIP/Dev/Ether/PHY//net_phy_.h
+*
+*               Most of the time for MII, RMII or GMII PHY, the generic PHY works correctly. If your PHY is not
+*               available and the generic is not working you will have to write you own PHY driver. Normally
+*               for a single connector PHY, some minor changes to the generic driver are required.
+*
+*           (4) The board support package (BSP) template file should be copied to your application folder and modified
+*               for your specific board. Refer to the User's Manual for more information about how to write a BSP.
+*
+*               However, we recommend starting with a working configuration from an example project for your network
+*               device. Micrium might have some projects available only for internal usage, so if no working project are
+*               found online, please ask at support@micrium.com for a BSP file example specific for your network device.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#ifdef NET_IPv4_MODULE_EN
+#include  
+#endif
+
+#ifdef NET_IPv6_MODULE_EN
+#include  
+#endif
+
+#include                        /* TODO Device configuration header. See Note #1.           */
+
+#include   /* TODO Device driver header.        See Note #2.           */
+#include     /* TODO Device driver header.        See Note #2.           */
+
+#include                   /* TODO PHY driver header.           See Note #3.           */
+#include  
+
+#include                      /* TODO BSP header.                  See Note #4.           */
+#include                       /* TODO BSP header.                  See Note #4.           */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv6_MODULE_EN
+static  void  App_AutoCfgResult(      NET_IF_NBR                 if_nbr,
+                                const NET_IPv6_ADDR             *p_addr_local,
+                                const NET_IPv6_ADDR             *p_addr_global,
+                                      NET_IPv6_AUTO_CFG_STATUS   auto_cfg_result);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     AppInit_TCPIP_MultipleIF()
+*
+* Description : Initialize uC/TCP-IP:
+*
+*                   (a) Initialize tasks and objects
+*
+*                   (b) Initialize an Ethernet Interface
+*                   (c) Start the Ethernet Interface
+*                   (d) Configure IP addresses of the Ethernet Interface
+*
+*                   (e) Initialize a Wireless Interface
+*                   (f) Start the Wireless Interface
+*                   (g) Configure IP addresses of the Wireless Interface
+*                   (h) Scan for Wireless network available
+*                   (i) Analyze scan results
+*                   (j) Join a Wireless network
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK,   initialization completed successfully.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Some prerequisite module initializations are required. The following modules must be initialized
+*                   prior to starting the Network Protocol stacks initialization:
+*
+*                   (a) uC/CPU
+*                   (b) uC/LIB Memory module
+*
+*               (2) Net_Init() is the Network Protocol stack's initialization function. It must only be called
+*                   once and before any other Network functions.
+*
+*                   (a) This function takes the three TCP-IP internal task configuration structures as
+*                       arguments (such as priority, stack size, etc.). By default these configuration
+*                       structures are defined in net_cfg.c :
+*
+*                       NetRxTaskCfg            RX    task configuration
+*                       NetTxDeallocTaskCfg     TX    task configuration
+*                       NetTmrTaskCfg           Timer task configuration
+*
+*                   (b) We recommend you configure the Network Protocol Stack task priorities & Network application
+*                       (such as a Web server) task priorities as follows:
+*
+*                           NetTxDeallocTaskCfg                         (highest priority)
+*
+*                           Network applications (HTTPs, FTP, DNS, etc.)
+*
+*                           NetTmrTaskCfg
+*                           NetRxTaskCfg                                (lowest  priority)
+*
+*                       We recommend that the uC/TCP-IP Timer task and network interface Receive task be lower
+*                       priority than almost all other application tasks; but we recommend that the network
+*                       interface Transmit De-allocation task be higher priority than all application tasks that use
+*                       uC/TCP-IP network services.
+*
+*                       However, better performance can be observed when the Network applications are set with the
+*                       lowest priority. Some experimentation could be required to identify the best task priority
+*                       configuration.
+*
+*               (3) NetIF_Add() is a network interface function responsible for initializing a Network Device driver.
+*
+*                   (a) NetIF_Add() returns the interface index number. The interface index number should start at '1',
+*                       since the interface '0' is reserved for the loopback interface. The interface index number must
+*                       be used when you want to access the interface using any Network interface API.
+*
+*                   (b) The first parameter is the address of the Network interface API. These API are provided by
+*                       Micrium and are defined in file 'net_if_.h'. It should be either:
+*
+*                           NetIF_API_Ether     Ethernet interface
+*                           NetIF_API_WiFi      Wireless interface
+*
+*                   (c) The second parameter is the address of the device API function. The API should be defined in the
+*                       Device driver header:
+*
+*                            $/uC-TCPIP/Dev///net_dev_.h
+*
+*                   (d) The third parameter is the address of the device BSP data structure. Refer to the section
+*                       'INCLUDE FILES - Note #4' of this file for more details.
+*
+*                   (e) The fourth parameter is the address of the device configuration data structure. Refer to the
+*                       section 'INCLUDE FILES - Note #1' of this file for more details.
+*
+*                   (f) The fifth parameter is the address of the PHY API function. Refer to the section
+*                       'INCLUDE FILES - Note #3' of this file for more details.
+*
+*                   (g) The sixth and last parameter is the address of the PHY configuration data structure. The PHY
+*                       configuration should be located in net_dev_cfg.c/h.
+*
+*               (4) NetIF_Start() makes the network interface scan, join or create adhoc wireless network. This function must interact
+*                   with the wireless module thus some interrupt should be generated from the wirless's interrupt pin when calling
+*                   this function.
+*
+*               (5) NetASCII_Str_to_IP() converts the human readable address into a format required by the protocol stack.
+*
+*                   In this example the IP address used, 10.10.10.64, addresses out of the 10.10.10.1 network with a subnet mask
+*                   of 255.255.255.0. To match different networks, the IP address, the subnet mask and the default gateway's IP
+*                   address have to be customized.
+*
+*               (6) NetIPv4_CfgAddrAdd() configures the network IPv4 static parameters (IPv4 address, subnet mask and
+*                   default gateway) required for the interface. More than one set of network parameters can be
+*                   configured per interface. NetIPv4_CfgAddrAdd() can be repeated for as many network parameter
+*                   sets as need configuring for an interface.
+*
+*                   IPv4 parameters can be added whenever as long as the interface was added (initialized) even if the interface
+*                   is started or not.
+*
+*                   For Dynamic IPv4 configuration, uC/DHCPc is required
+*
+*               (7) NetIPv6_CfgAddrAdd() configures the network IPv6 static parameters (IPv6 address and prefix length)
+*                   required for the interface. More than one set of network parameters can be configured per interface.
+*                   NetIPv6_CfgAddrAdd() can be repeated for as many network parameter sets as need configuring for
+*                   an interface.
+*
+*                   IPv6 parameters can be added whenever as long as the interface is added (initialized) even if the interface
+*                   is started or not.
+*
+*                   For the moment dynamic IPv6 is not yet supported either by IPv6 Autoconfig or DHCPv6c.
+*
+*               (8) NetIF_WiFi_Scan() is used to scan for available Wireless Network available in the range.
+*
+*                   (a) The second parameter is a table of access point that will be receive access points found in the range.
+*                       Obviously, the maximum number of access point that the table can store must be past to the function.
+*
+*                   (b) It's possible to scan for a specific hidden network by passing a string that contains the SSID of the
+*                       hidden network. If the scan request is for all access point, you only have to pass a null pointer.
+*
+*                   (c) The fourth parameter is the wireless channel to scan on, it can be:
+*
+*                                       NET_IF_WIFI_CH_ALL
+*                                       NET_IF_WIFI_CH_1
+*                                       NET_IF_WIFI_CH_2
+*                                       NET_IF_WIFI_CH_3
+*                                       NET_IF_WIFI_CH_4
+*                                       NET_IF_WIFI_CH_5
+*                                       NET_IF_WIFI_CH_6
+*                                       NET_IF_WIFI_CH_7
+*                                       NET_IF_WIFI_CH_8
+*                                       NET_IF_WIFI_CH_9
+*                                       NET_IF_WIFI_CH_10
+*                                       NET_IF_WIFI_CH_11
+*                                       NET_IF_WIFI_CH_12
+*                                       NET_IF_WIFI_CH_13
+*                                       NET_IF_WIFI_CH_14
+*
+*               (9) NetIF_WiFi_Join() is used to join a wireless network. Note that the network must has been found during a scan
+*                   previously. Once the wireless access point is join, it is possible to receive and transmit packet on the network.
+*
+*                   (a) The second parameter is the Network type it can be either:
+*
+*                           NET_IF_WIFI_NET_TYPE_INFRASTRUCTURE
+*                           NET_IF_WIFI_NET_TYPE_ADHOC
+*
+*                       The scan function should return the network type as well.
+*
+*
+*                   (b) The third parameter is the wireless date rate to configure:
+*
+*                           NET_IF_WIFI_DATA_RATE_AUTO
+*                           NET_IF_WIFI_DATA_RATE_1_MBPS
+*                           NET_IF_WIFI_DATA_RATE_2_MBPS
+*                           NET_IF_WIFI_DATA_RATE_5_5_MBPS
+*                           NET_IF_WIFI_DATA_RATE_6_MBPS
+*                           NET_IF_WIFI_DATA_RATE_9_MBPS
+*                           NET_IF_WIFI_DATA_RATE_11_MBPS
+*                           NET_IF_WIFI_DATA_RATE_12_MBPS
+*                           NET_IF_WIFI_DATA_RATE_18_MBPS
+*                           NET_IF_WIFI_DATA_RATE_24_MBPS
+*                           NET_IF_WIFI_DATA_RATE_36_MBPS
+*                           NET_IF_WIFI_DATA_RATE_48_MBPS
+*                           NET_IF_WIFI_DATA_RATE_54_MBPS
+*                           NET_IF_WIFI_DATA_RATE_MCS0
+*                           NET_IF_WIFI_DATA_RATE_MCS1
+*                           NET_IF_WIFI_DATA_RATE_MCS2
+*                           NET_IF_WIFI_DATA_RATE_MCS3
+*                           NET_IF_WIFI_DATA_RATE_MCS4
+*                           NET_IF_WIFI_DATA_RATE_MCS5
+*                           NET_IF_WIFI_DATA_RATE_MCS6
+*                           NET_IF_WIFI_DATA_RATE_MCS7
+*                           NET_IF_WIFI_DATA_RATE_MCS8
+*                           NET_IF_WIFI_DATA_RATE_MCS9
+*                           NET_IF_WIFI_DATA_RATE_MCS10
+*                           NET_IF_WIFI_DATA_RATE_MCS11
+*                           NET_IF_WIFI_DATA_RATE_MCS12
+*                           NET_IF_WIFI_DATA_RATE_MCS13
+*                           NET_IF_WIFI_DATA_RATE_MCS14
+*                           NET_IF_WIFI_DATA_RATE_MCS15
+*
+*                   (c) The fourth parameter is the wireless network's security type. It can be:
+*
+*                           NET_IF_WIFI_SECURITY_OPEN
+*                           NET_IF_WIFI_SECURITY_WEP
+*                           NET_IF_WIFI_SECURITY_WPA
+*                           NET_IF_WIFI_SECURITY_WPA2
+*
+*                   (d) The fifth parameter is the wireless radio's power level. It can be:
+*
+*                           NET_IF_WIFI_PWR_LEVEL_LO
+*                           NET_IF_WIFI_PWR_LEVEL_MED
+*                           NET_IF_WIFI_PWR_LEVEL_HI
+*
+*                   (e) The sixth parameter is the access point's SSID to join.
+*
+*                   (f) The seventh parameter is the Pre shared key (PSK) of the access point's. If the security
+*                       type of the access point is open, the PSK can set to 0.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppInit_TCPIP_MultipleIF (void)
+{
+#ifdef NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR       addr_ipv4;
+    NET_IPv4_ADDR       msk_ipv4;
+    NET_IPv4_ADDR       gateway_ipv4;
+#endif
+
+#ifdef NET_IPv6_MODULE_EN
+    CPU_BOOLEAN         cfg_result;
+    NET_FLAGS           ipv6_flags;
+    NET_IPv6_ADDR       addr_ipv6;
+#endif
+
+    NET_IF_NBR          if_nbr_ether;
+    NET_IF_NBR          if_nbr_wifi;
+    NET_IF_WIFI_AP      ap[10];
+    NET_IF_WIFI_SSID   *p_ssid;
+    NET_IF_WIFI_SSID    ssid;
+    NET_IF_WIFI_PSK     psk;
+    CPU_INT16U          ctn;
+    CPU_INT16U          i;
+    CPU_INT16S          result;
+    CPU_BOOLEAN         found;
+    NET_ERR             err_net;
+
+
+                                                                /* -------- INITIALIZE NETWORK TASKS & OBJECTS -------- */
+    err_net = Net_Init(&NetRxTaskCfg,
+                       &NetTxDeallocTaskCfg,
+                       &NetTmrTaskCfg);
+    if (err_net != NET_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* -------------- ADD ETHERNET INTERFACE -------------- */
+                                                                /* See Note #3.                                         */
+    if_nbr_ether = NetIF_Add((void    *)&NetIF_API_Ether,             /* See Note #3b.                                  */
+                             (void    *)&NetDev_API_TemplateEtherDMA, /* TODO Device driver API,    See Note #3c.       */
+                             (void    *)&NetDev_BSP_BoardDev_Nbr,     /* TODO BSP API,              See Note #3d.       */
+                             (void    *)&NetDev_Cfg_Ether_1,          /* TODO Device configuration, See Note #3e.       */
+                             (void    *)&NetPhy_API_Generic,          /* TODO PHY driver API,       See Note #3f.       */
+                             (void    *)&NetPhy_Cfg_Ether_1,          /* TODO PHY configuration,    See Note #3g.       */
+                                        &err_net);
+    if (err_net != NET_IF_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- START ETHERNET INTERFACE ------------- */
+                                                                /* See Note #4.                                         */
+    NetIF_Start(if_nbr_ether, &err_net);                        /* Makes the interface ready to receive and transmit.   */
+    if (err_net != NET_IF_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+#ifdef NET_IPv4_MODULE_EN
+                                                                /* --------- CONFIGURE IPV4 STATIC ADDRESSES ---------- */
+                                                                /* For Dynamic IPv4 configuration, uC/DHCPc is required */
+
+                                                                /* TODO Update IPv4 Addresses following your network ...*/
+                                                                /* ... requirements.                                    */
+
+                                                                /* See Note #5.                                         */
+    NetASCII_Str_to_IP("10.10.10.64",                           /* Convert Host IPv4 string address to 32 bit address.  */
+                       &addr_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetASCII_Str_to_IP("255.255.255.0",                         /* Convert IPv4 mask string to 32 bit address.          */
+                       &msk_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetASCII_Str_to_IP("10.10.10.1",                            /* Convert Gateway string address to 32 bit address.    */
+                       &gateway_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetIPv4_CfgAddrAdd(if_nbr_ether,                            /* Add a statically-configured IPv4 host address,   ... */
+                       addr_ipv4,                               /* ... subnet mask, & default gateway to the        ... */
+                       msk_ipv4,                                /* ... interface. See Note #6.                          */
+                       gateway_ipv4,
+                      &err_net);
+    if (err_net != NET_IPv4_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+
+#ifdef  NET_IPv6_MODULE_EN
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+                                                                /* ----- START IPV6 STATELESS AUTO-CONFIGURATION ------ */
+    NetIPv6_AddrAutoCfgHookSet(if_nbr_ether,                /* Set Callback function to received Auto-Cfg result.   */
+                              &App_AutoCfgResult,
+                              &err_net);
+
+    cfg_result = NetIPv6_AddrAutoCfgEn(if_nbr_ether,            /* Enable and Start Auto-Configuration process.         */
+                                       DEF_YES,
+                                      &err_net);
+    if (cfg_result == DEF_FAIL) {
+        return (DEF_FAIL);
+    }
+
+#endif
+                                                                /* ----- CONFIGURE IPV6 STATIC LINK LOCAL ADDRESS ----- */
+                                                                /* DHCPv6c is not yet available.                        */
+
+    ipv6_flags = 0;
+    DEF_BIT_SET(ipv6_flags, NET_IPv6_FLAG_BLOCK_EN);            /* Set Address Configuration as blocking.               */
+    DEF_BIT_SET(ipv6_flags, NET_IPv6_FLAG_DAD_EN);              /* Enable DAD with Address Configuration.               */
+
+                                                                /* TODO Update IPv6 Address following your network ...  */
+                                                                /* ... requirements.                                    */
+
+                                                                /* See Note #7.                                         */
+    NetASCII_Str_to_IP("fe80::1111:1111",                       /* Convert IPv6 string address to 128 bit address.      */
+                       &addr_ipv6,
+                        NET_IPv6_ADDR_SIZE,
+                       &err_net);
+
+    cfg_result = NetIPv6_CfgAddrAdd(if_nbr_ether,               /* Add a statically-configured IPv6 host address to ... */
+                                   &addr_ipv6,                  /* ... the interface. See Note 6.                       */
+                                    64,
+                                    ipv6_flags,
+                                   &err_net);
+    if (cfg_result == DEF_FAIL) {
+        return (DEF_FAIL);
+    }
+
+#endif  /* NET_IPv6_MODULE_EN */
+
+
+                                                                /* -------------- ADD WIRELESS INTERFACE -------------- */
+    if_nbr_wifi = NetIF_Add((void    *)&NetIF_API_WiFi,
+                            (void    *)&NetDev_API_TemplateWiFiSpi,  /* TODO Change following your Device driver API.   */
+                            (void    *)&NetDev_BSP_WiFi,             /* TODO Change for your BSP API.                   */
+                            (void    *)&NetDev_Cfg_WiFi_1,           /* TODO Change for Device configuration.           */
+                            (void    *)&NetWiFiMgr_API_Generic,      /* TODO Might be change for another PHY.           */
+                                        DEF_NULL,
+                                       &err_net);
+    if (err_net != NET_IF_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- START WIRELESS INTERFACE ------------- */
+                                                                /* See Note #4.                                         */
+    NetIF_Start(if_nbr_wifi, &err_net);                         /* Makes the interface ready to receive and transmit.   */
+    if (err_net != NET_IF_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------ SCAN FOR WIRELESS NETWORKS ------------ */
+    ctn = NetIF_WiFi_Scan(if_nbr_wifi,                          /* See Note #8.                                         */
+                          ap,                                   /* Access point table See Note #8a.                     */
+                          10,                                   /* Access point table size.                             */
+                          DEF_NULL,                             /* Hidden SSID See Note #8b.                            */
+                          NET_IF_WIFI_CH_ALL,                   /* Channel to scan See Note #8c.                        */
+                         &err_net);
+    if (err_net != NET_IF_WIFI_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* --------- ANALYSE WIRELESS NETWORKS FOUND ---------- */
+    found = DEF_NO;
+    for (i = 0; i < ctn - 1; i++) {                             /* Browse table of access point found.                  */
+        p_ssid = &ap[i].SSID;
+        result = Str_Cmp_N((CPU_CHAR *)p_ssid,                  /* Search for a specific Wireless Network SSID.         */
+                                      "Wifi_AP_SSID",           /* TODO Change for your WiFi Network SSID.              */
+                                       NET_IF_WIFI_STR_LEN_MAX_SSID);
+        if (result == 0) {
+            found = DEF_YES;
+            break;
+        }
+    }
+
+    if (found == DEF_NO) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------- JOIN A WIRELESS NETWORK -------------- */
+    Mem_Clr(&ssid, sizeof(ssid));
+    Mem_Clr(&psk,  sizeof(psk));
+    Str_Copy_N((CPU_CHAR *)&ssid,
+                           "Wifi_AP_SSID",                      /* TODO Change for your WiFi Network SSID.              */
+                            12);                                /* SSID string length.                                  */
+    Str_Copy_N((CPU_CHAR *)&psk,
+                           "Password",                          /* TODO Change for your WiFi Network Password.          */
+                            8);                                 /* PSK string length.                                   */
+
+    NetIF_WiFi_Join(if_nbr_wifi,                                /* See Note #9.                                         */
+                    ap[i].NetType,                              /* See Note #9a.                                        */
+                    NET_IF_WIFI_DATA_RATE_AUTO,                 /* See Note #9b.                                        */
+                    ap[i].SecurityType,                         /* See Note #9c.                                        */
+                    NET_IF_WIFI_PWR_LEVEL_HI,                   /* See Note #9d.                                        */
+                    ssid,                                       /* See Note #9e.                                        */
+                    psk,                                        /* See Note #9f.                                        */
+                   &err_net);
+    if (err_net != NET_IF_WIFI_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+#ifdef NET_IPv4_MODULE_EN
+                                                                /* --------- CONFIGURE IPV4 STATIC ADDRESSES ---------- */
+                                                                /* For Dynamic IPv4 configuration, uC/DHCPc is required */
+
+                                                                /* TODO Update IPv4 Addresses following your network ...*/
+                                                                /* ... requirements.                                    */
+
+                                                                /* See Note #5.                                         */
+    NetASCII_Str_to_IP("192.168.1.10",                          /* Convert Host IPv4 string address to 32 bit address.  */
+                       &addr_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetASCII_Str_to_IP("255.255.255.0",                         /* Convert IPv4 mask string to 32 bit address.          */
+                       &msk_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetASCII_Str_to_IP("192.168.1.1",                           /* Convert Gateway string address to 32 bit address.    */
+                       &gateway_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetIPv4_CfgAddrAdd(if_nbr_wifi,                             /* Add a statically-configured IPv4 host address,   ... */
+                       addr_ipv4,                               /* ... subnet mask, & default gateway to the        ... */
+                       msk_ipv4,                                /* ... interface. See Note #6.                          */
+                       gateway_ipv4,
+                      &err_net);
+    if (err_net != NET_IPv4_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+
+#ifdef NET_IPv6_MODULE_EN
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+                                                                /* ----- START IPV6 STATELESS AUTO-CONFIGURATION ------ */
+    NetIPv6_AddrAutoCfgHookSet(if_nbr_wifi,                     /* Set hook function to received Auto-Cfg result.       */
+                              &App_AutoCfgResult,
+                              &err_net);
+
+    cfg_result = NetIPv6_AddrAutoCfgEn(if_nbr_wifi,             /* Enable and Start Auto-Configuration process.         */
+                                       DEF_YES,
+                                      &err_net);
+    if (cfg_result == DEF_FAIL) {
+        return (DEF_FAIL);
+    }
+
+#endif
+                                                                /* ----- CONFIGURE IPV6 STATIC LINK LOCAL ADDRESS ----- */
+                                                                /* DHCPv6c is not yet available.                        */
+
+                                                                /* TODO Update IPv6 Address following your network ...  */
+                                                                /* ... requirements.                                    */
+
+                                                                /* See Note #5.                                         */
+    NetASCII_Str_to_IP("fe80::4444:1111",                       /* Convert IPv6 string address to 128 bit address.      */
+                       &addr_ipv6,
+                        NET_IPv6_ADDR_SIZE,
+                       &err_net);
+
+    ipv6_flags = 0;
+    DEF_BIT_SET(ipv6_flags, NET_IPv6_FLAG_BLOCK_EN);            /* Set Address Configuration as blocking.               */
+    DEF_BIT_SET(ipv6_flags, NET_IPv6_FLAG_DAD_EN);              /* Enable DAD with Address Configuration.               */
+
+    cfg_result = NetIPv6_CfgAddrAdd(if_nbr_wifi,                /* Add a statically-configured IPv6 host address to ... */
+                                   &addr_ipv6,                  /* ... the interface. See Note 7.                       */
+                                    64,
+                                    ipv6_flags,
+                                   &err_net);
+    if (cfg_result == DEF_FAIL) {
+        return (DEF_FAIL);
+    }
+
+#endif  /* NET_IPv6_MODULE_EN */
+
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                          App_AutoCfgResult()
+*
+* Description : Hook function to received the IPv6 Auto-Configuration process result.
+*
+* Argument(s) : if_nbr          Network Interface number on which Auto-Configuration occurred.
+*
+*               p_addr_local    Pointer to IPv6 link-local address configured, if any.
+*                               DEF_NULL, otherwise.
+*
+*               p_addr_global   Pointer to IPv6 global address configured, if any.
+*                               DEF_NULL, otherwise.
+*
+*               auto_cfg_result Result status of the IPv6 Auto-Configuration process.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Referenced in AppInit_TCPIP_MultipleIF().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+static  void  App_AutoCfgResult (      NET_IF_NBR                 if_nbr,
+                                 const NET_IPv6_ADDR             *p_addr_local,
+                                 const NET_IPv6_ADDR             *p_addr_global,
+                                       NET_IPv6_AUTO_CFG_STATUS   auto_cfg_result)
+{
+    CPU_CHAR  ip_string[NET_ASCII_LEN_MAX_ADDR_IPv6];
+    NET_ERR   err_net;
+
+
+    if (p_addr_local != DEF_NULL) {
+        NetASCII_IPv6_to_Str((NET_IPv6_ADDR *)p_addr_local, ip_string, DEF_NO, DEF_YES, &err_net);
+        printf("IPv6 Address Link Local: %s\n", ip_string);
+    }
+
+    if (p_addr_global != DEF_NULL) {
+        NetASCII_IPv6_to_Str((NET_IPv6_ADDR *)p_addr_global, ip_string, DEF_NO, DEF_YES, &err_net);
+        printf("IPv6 Address Global: %s\n", ip_string);
+    }
+
+    switch (auto_cfg_result) {
+        case NET_IPv6_AUTO_CFG_STATUS_FAILED:
+             printf("Auto-Configuration failed.\n");
+             break;
+
+
+        case NET_IPv6_AUTO_CFG_STATUS_SUCCEEDED:
+             printf("Auto-Configuration succeeded.\n");
+             break;
+
+
+        case NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL:
+             printf("Auto-Configuration with Link-Local address only.\n");
+             break;
+
+
+        default:
+             printf("Invalid Auto-Configuration result.\n");
+             break;
+    }
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Init/init_wifi.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Init/init_wifi.c
new file mode 100644
index 0000000..890e929
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Init/init_wifi.c
@@ -0,0 +1,601 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                       WIRELESS INITIALIZATION
+*
+* Filename      : init_wifi.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to initialize uC/TCP-IP:
+*
+*                     (a) Initialize Stack tasks and objects
+*                     (b) Initialize a Wireless Interface
+*                     (c) Start that Wireless Interface
+*                     (d) Configure IP addresses of the Interface
+*                     (e) Scan for Wireless networks available
+*                     (f) Analyze scan results
+*                     (g) Join a Wireless network
+*
+*                 (2) This example is based on template files so some modifications will be required. Insert the
+*                     appropriate project/board specific code to perform the stated actions wherever 'TODO'
+*                     comments are found.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The device configuration template file should be copied to your application folder and modified
+*               to follow your requirements. Refer to the User's Manual for more information about how to configure
+*               your device.
+*
+*               We recommend starting with a working configuration from an example project for your wireless module.
+*               Micrium might have some projects available only for internal usage, so if no working projects are found
+*               online, please ask at support@micrium.com for a configuration file example.
+*
+*           (2) Most of the time Micrium provides a Wireless device driver which can be found under the
+*               following folder:
+*
+*                   $/Micrium/Software/uC-TCPIP/Dev/WiFi//net_dev_.h
+*
+*               If Micrium does not support your network wireless device driver, you will have to write your own device
+*               driver starting from the Wireless Device driver template. Before starting to write your own driver, make
+*               sure that the driver is not already available.
+*
+*           (3) The board support package (BSP) template file should be copied to your application folder and modified
+*               for your specific board. Refer to the User's Manual for more information about how to write a BSP.
+*
+*               However, we recommend starting with a working configuration from an example project for your Wireless
+*               module. Micrium might have some projects available only for internal usage, so if no working project are
+*               found online, please ask at support@micrium.com for a BSP file example specific for your MCU and your
+*               Wireless Module.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#ifdef NET_IPv4_MODULE_EN
+#include  
+#endif
+
+#ifdef NET_IPv6_MODULE_EN
+#include  
+#endif
+
+#include                        /* TODO Device configuration header. See Note #1.           */
+#include     /* TODO Device driver header.        See Note #2.           */
+#include  
+#include                       /* TODO BSP header.                  See Note #3.           */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv6_MODULE_EN
+static  void  App_AutoCfgResult(      NET_IF_NBR                 if_nbr,
+                                const NET_IPv6_ADDR             *p_addr_local,
+                                const NET_IPv6_ADDR             *p_addr_global,
+                                      NET_IPv6_AUTO_CFG_STATUS   auto_cfg_result);
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                        AppInit_TCPIP_WiFi()
+*
+* Description : Initialize uC/TCP-IP:
+*
+*                   (a) Initialize tasks and objects
+*                   (b) Initialize a Wireless Interface
+*                   (c) Start the Wireless Interface
+*                   (d) Configure IP addresses of the Interface
+*                   (e) Scan for Wireless network available
+*                   (f) Analyze scan results
+*                   (g) Join a Wireless network
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK,   initialization completed successfully.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Some prerequisite module initializations are required. The following modules must be initialized
+*                   prior to starting the Network Protocol stacks initialization:
+*
+*                   (a) uC/CPU
+*                   (b) uC/LIB Memory module
+*
+*               (2) Net_Init() is the Network Protocol stack's initialization function. It must only be called
+*                   once and before any other Network functions.
+*
+*                   (a) This function takes the three TCP-IP internal task configuration structures as
+*                       arguments (such as priority, stack size, etc.). By default these configuration
+*                       structures are defined in net_cfg.c :
+*
+*                       NetRxTaskCfg            RX    task configuration
+*                       NetTxDeallocTaskCfg     TX    task configuration
+*                       NetTmrTaskCfg           Timer task configuration
+*
+*                   (b) We recommend you configure the Network Protocol Stack task priorities & Network application
+*                       (such as a Web server) task priorities as follows:
+*
+*                           NetTxDeallocTaskCfg                         (highest priority)
+*
+*                           Network applications (HTTPs, FTP, DNS, etc.)
+*
+*                           NetTmrTaskCfg
+*                           NetRxTaskCfg                                (lowest  priority)
+*
+*                       We recommend that the uC/TCP-IP Timer task and network interface Receive task be lower
+*                       priority than almost all other application tasks; but we recommend that the network
+*                       interface Transmit De-allocation task be higher priority than all application tasks that use
+*                       uC/TCP-IP network services.
+*
+*                       However, better performance can be observed when the Network applications are set with the
+*                       lowest priority. Some experimentation could be required to identify the best task priority
+*                       configuration.
+*
+*               (3) NetIF_Add() is a network interface function responsible for initializing a Network Device driver.
+*
+*                   (a) NetIF_Add() returns the interface index number. The interface index number should start at '1',
+*                       since the interface '0' is reserved for the loopback interface. The interface index number must
+*                       be used when you want to access the interface using any Network interface API.
+*
+*                   (b) The first parameter is the address of the Network interface API. These API are provided by
+*                       Micrium and are defined in file 'net_if_.h'. It should be either:
+*
+*                           NetIF_API_Ether     Ethernet interface
+*                           NetIF_API_WiFi      Wireless interface
+*
+*                   (c) The second parameter is the address of the device API function. The API should be defined in the
+*                       Device driver header:
+*
+*                            $/uC-TCPIP/Dev///net_dev_.h
+*
+*                   (d) The third parameter is the address of the device BSP data structure. Refer to the section
+*                       'INCLUDE FILES - Note #3' of this file for more details.
+*
+*                   (e) The fourth parameter is the address of the device configuration data structure. Refer to the
+*                       section 'INCLUDE FILES - Note #1' of this file for more details.
+*
+*                   (f) The fifth parameter is the address of the WiFi Manager API function. This API is provided by Micrium and
+*                       it's located in:
+*
+*                           $/uC-TCPIP/Dev/WiFi/Manager/Generic/net_wifi_mgr.h
+*
+*                   (g) The sixth and last parameter is the address of the WiFi manager configuration data structure. Actually there
+*                       are no configuration require with the generic Wifi manager. So this parameters can be kept as null.
+*
+*               (4) NetIF_Start() makes the network interface scan, join or create adhoc wireless network. This function must interact
+*                   with the wireless module thus some interrupt should be generated from the wirless's interrupt pin when calling
+*                   this function.
+*
+*               (5) NetASCII_Str_to_IP() converts the human readable address into a format required by the protocol stack.
+*
+*                   In this example the IP address used, 10.10.10.64, addresses out of the 10.10.10.1 network with a subnet mask
+*                   of 255.255.255.0. To match different networks, the IP address, the subnet mask and the default gateway's IP
+*                   address have to be customized.
+*
+*               (6) NetIPv4_CfgAddrAdd() configures the network IPv4 static parameters (IPv4 address, subnet mask and
+*                   default gateway) required for the interface. More than one set of network parameters can be
+*                   configured per interface. NetIPv4_CfgAddrAdd() can be repeated for as many network parameter
+*                   sets as need configuring for an interface.
+*
+*                   IPv4 parameters can be added whenever as long as the interface was added (initialized) even if the interface
+*                   is started or not.
+*
+*                   For Dynamic IPv4 configuration, uC/DHCPc is required
+*
+*               (7) NetIPv6_CfgAddrAdd() configures the network IPv6 static parameters (IPv6 address and prefix length)
+*                   required for the interface. More than one set of network parameters can be configured per interface.
+*                   NetIPv6_CfgAddrAdd() can be repeated for as many network parameter sets as need configuring for
+*                   an interface.
+*
+*                   IPv6 parameters can be added whenever as long as the interface is added (initialized) even if the interface
+*                   is started or not.
+*
+*                   For the moment dynamic IPv6 is not yet supported either by IPv6 Autoconfig or DHCPv6c.
+*
+*               (8) NetIF_WiFi_Scan() is used to scan for available Wireless Network available in the range.
+*
+*                   (a) The second parameter is a table of access point that will be receive access points found in the range.
+*                       Obviously, the maximum number of access point that the table can store must be past to the function.
+*
+*                   (b) It's possible to scan for a specific hidden network by passing a string that contains the SSID of the
+*                       hidden network. If the scan request is for all access point, you only have to pass a null pointer.
+*
+*                   (c) The fourth parameter is the wireless channel to scan on, it can be:
+*
+*                                       NET_IF_WIFI_CH_ALL
+*                                       NET_IF_WIFI_CH_1
+*                                       NET_IF_WIFI_CH_2
+*                                       NET_IF_WIFI_CH_3
+*                                       NET_IF_WIFI_CH_4
+*                                       NET_IF_WIFI_CH_5
+*                                       NET_IF_WIFI_CH_6
+*                                       NET_IF_WIFI_CH_7
+*                                       NET_IF_WIFI_CH_8
+*                                       NET_IF_WIFI_CH_9
+*                                       NET_IF_WIFI_CH_10
+*                                       NET_IF_WIFI_CH_11
+*                                       NET_IF_WIFI_CH_12
+*                                       NET_IF_WIFI_CH_13
+*                                       NET_IF_WIFI_CH_14
+*
+*               (9) NetIF_WiFi_Join() is used to join a wireless network. Note that the network must has been found during a scan
+*                   previously. Once the wireless access point is join, it is possible to receive and transmit packet on the network.
+*
+*                   (a) The second parameter is the Network type it can be either:
+*
+*                           NET_IF_WIFI_NET_TYPE_INFRASTRUCTURE
+*                           NET_IF_WIFI_NET_TYPE_ADHOC
+*
+*                       The scan function should return the network type as well.
+*
+*
+*                   (b) The third parameter is the wireless date rate to configure:
+*
+*                           NET_IF_WIFI_DATA_RATE_AUTO
+*                           NET_IF_WIFI_DATA_RATE_1_MBPS
+*                           NET_IF_WIFI_DATA_RATE_2_MBPS
+*                           NET_IF_WIFI_DATA_RATE_5_5_MBPS
+*                           NET_IF_WIFI_DATA_RATE_6_MBPS
+*                           NET_IF_WIFI_DATA_RATE_9_MBPS
+*                           NET_IF_WIFI_DATA_RATE_11_MBPS
+*                           NET_IF_WIFI_DATA_RATE_12_MBPS
+*                           NET_IF_WIFI_DATA_RATE_18_MBPS
+*                           NET_IF_WIFI_DATA_RATE_24_MBPS
+*                           NET_IF_WIFI_DATA_RATE_36_MBPS
+*                           NET_IF_WIFI_DATA_RATE_48_MBPS
+*                           NET_IF_WIFI_DATA_RATE_54_MBPS
+*                           NET_IF_WIFI_DATA_RATE_MCS0
+*                           NET_IF_WIFI_DATA_RATE_MCS1
+*                           NET_IF_WIFI_DATA_RATE_MCS2
+*                           NET_IF_WIFI_DATA_RATE_MCS3
+*                           NET_IF_WIFI_DATA_RATE_MCS4
+*                           NET_IF_WIFI_DATA_RATE_MCS5
+*                           NET_IF_WIFI_DATA_RATE_MCS6
+*                           NET_IF_WIFI_DATA_RATE_MCS7
+*                           NET_IF_WIFI_DATA_RATE_MCS8
+*                           NET_IF_WIFI_DATA_RATE_MCS9
+*                           NET_IF_WIFI_DATA_RATE_MCS10
+*                           NET_IF_WIFI_DATA_RATE_MCS11
+*                           NET_IF_WIFI_DATA_RATE_MCS12
+*                           NET_IF_WIFI_DATA_RATE_MCS13
+*                           NET_IF_WIFI_DATA_RATE_MCS14
+*                           NET_IF_WIFI_DATA_RATE_MCS15
+*
+*                   (c) The fourth parameter is the wireless network's security type. It can be:
+*
+*                           NET_IF_WIFI_SECURITY_OPEN
+*                           NET_IF_WIFI_SECURITY_WEP
+*                           NET_IF_WIFI_SECURITY_WPA
+*                           NET_IF_WIFI_SECURITY_WPA2
+*
+*                       The scan function should return the network security type as well.
+*
+*                   (d) The fifth parameter is the wireless radio's power level. It can be:
+*
+*                           NET_IF_WIFI_PWR_LEVEL_LO
+*                           NET_IF_WIFI_PWR_LEVEL_MED
+*                           NET_IF_WIFI_PWR_LEVEL_HI
+*
+*                   (e) The sixth parameter is the access point's SSID to join.
+*
+*                   (f) The seventh parameter is the Pre shared key (PSK) of the access point's. If the security
+*                       type of the access point is open, the PSK can set to null.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppInit_TCPIP_WiFi (void)
+{
+#ifdef NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR       addr_ipv4;
+    NET_IPv4_ADDR       msk_ipv4;
+    NET_IPv4_ADDR       gateway_ipv4;
+#endif
+#ifdef NET_IPv6_MODULE_EN
+    CPU_BOOLEAN         cfg_result;
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    NET_FLAGS           ipv6_flags;
+    NET_IPv6_ADDR       addr_ipv6;
+#endif
+#endif
+    NET_IF_NBR          if_nbr;
+    NET_IF_WIFI_AP      ap[10];
+    NET_IF_WIFI_SSID   *p_ssid;
+    NET_IF_WIFI_SSID    ssid;
+    NET_IF_WIFI_PSK     psk;
+    CPU_INT16U          ctn;
+    CPU_INT16U          i;
+    CPU_INT16S          result;
+    CPU_BOOLEAN         found;
+    NET_ERR             err_net;
+
+
+                                                                /* ------- PREREQUISITES MODULE INITIALIZATION -------- */
+    CPU_Init();                                                 /* See Note #1.                                         */
+    Mem_Init();
+
+
+
+                                                                /* -------- INITIALIZE NETWORK TASKS & OBJECTS -------- */
+    err_net = Net_Init(&NetRxTaskCfg,                           /* See Note #2.                                         */
+                       &NetTxDeallocTaskCfg,
+                       &NetTmrTaskCfg);
+    if (err_net != NET_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+                                                                /* -------------- ADD WIRELESS INTERFACE -------------- */
+                                                                /* See Note #3.                                         */
+    if_nbr = NetIF_Add((void    *)&NetIF_API_WiFi,              /* See Note #3b.                                        */
+                       (void    *)&NetDev_API_TemplateWiFiSpi,  /* TODO BSP API,              See Note #3d.             */
+                       (void    *)&NetDev_BSP_WiFi,             /* TODO Device configuration, See Note #3e.             */
+                       (void    *)&NetDev_Cfg_WiFi_1,           /* TODO PHY driver API,       See Note #3f.             */
+                       (void    *)&NetWiFiMgr_API_Generic,      /* TODO PHY configuration,    See Note #3g.             */
+                                   DEF_NULL,
+                                  &err_net);
+    if (err_net != NET_IF_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* ------------- START WIRELESS INTERFACE ------------- */
+                                                                /* See Note #4.                                         */
+    NetIF_Start(if_nbr, &err_net);                              /* Makes the interface ready to receive and transmit.   */
+    if (err_net != NET_IF_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+#else
+    return (DEF_FAIL);
+#endif
+
+                                                                /* ------------ SCAN FOR WIRELESS NETWORKS ------------ */
+    ctn = NetIF_WiFi_Scan(if_nbr,                               /* See Note #8.                                         */
+                          ap,                                   /* Access point table See Note #8a.                     */
+                          10,                                   /* Access point table size.                             */
+                          DEF_NULL,                             /* Hidden SSID See Note #8b.                            */
+                          NET_IF_WIFI_CH_ALL,                   /* Channel to scan See Note #8c.                        */
+                         &err_net);
+    if (err_net != NET_IF_WIFI_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* --------- ANALYSE WIRELESS NETWORKS FOUND ---------- */
+    found = DEF_NO;
+    for (i = 0; i < ctn - 1; i++) {                             /* Browse table of access point found.                  */
+        p_ssid = &ap[i].SSID;
+        result = Str_Cmp_N((CPU_CHAR *)p_ssid,                  /* Search for a specific Wireless Network SSID.         */
+                                      "Wifi_AP_SSID",           /* TODO Change for your WiFi Network SSID.              */
+                                       NET_IF_WIFI_STR_LEN_MAX_SSID);
+        if (result == 0) {
+            found = DEF_YES;
+            break;
+        }
+    }
+
+    if (found == DEF_NO) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------- JOIN A WIRELESS NETWORK -------------- */
+    Mem_Clr(&ssid, sizeof(ssid));
+    Mem_Clr(&psk,  sizeof(psk));
+    Str_Copy_N((CPU_CHAR *)&ssid,
+                           "Wifi_AP_SSID",                      /* TODO Change for your WiFi Network SSID.              */
+                            12);                                /* SSID string length.                                  */
+    Str_Copy_N((CPU_CHAR *)&psk,
+                           "Password",                          /* TODO Change for your WiFi Network Password.          */
+                            8);                                 /* PSK string length.                                   */
+
+    NetIF_WiFi_Join(if_nbr,                                     /* See Note #9.                                         */
+                    ap[i].NetType,                              /* See Note #9a.                                        */
+                    NET_IF_WIFI_DATA_RATE_AUTO,                 /* See Note #9b.                                        */
+                    ap[i].SecurityType,                         /* See Note #9c.                                        */
+                    NET_IF_WIFI_PWR_LEVEL_HI,                   /* See Note #9d.                                        */
+                    ssid,                                       /* See Note #9e.                                        */
+                    psk,                                        /* See Note #9f.                                        */
+                   &err_net);
+    if (err_net != NET_IF_WIFI_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+#ifdef NET_IPv4_MODULE_EN
+                                                                /* --------- CONFIGURE IPV4 STATIC ADDRESSES ---------- */
+                                                                /* For Dynamic IPv4 configuration, uC/DHCPc is required */
+
+                                                                /* TODO Update IPv4 Addresses following your network ...*/
+                                                                /* ... requirements.                                    */
+
+                                                                /* See Note #5.                                         */
+    NetASCII_Str_to_IP("10.10.10.64",                           /* Convert Host IPv4 string address to 32 bit address.  */
+                       &addr_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetASCII_Str_to_IP("255.255.255.0",                         /* Convert IPv4 mask string to 32 bit address.          */
+                       &msk_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetASCII_Str_to_IP("10.10.10.1",                            /* Convert Gateway string address to 32 bit address.    */
+                       &gateway_ipv4,
+                        NET_IPv4_ADDR_SIZE,
+                       &err_net);
+
+    NetIPv4_CfgAddrAdd(if_nbr,                                  /* Add a statically-configured IPv4 host address,   ... */
+                       addr_ipv4,                               /* ... subnet mask, & default gateway to the        ... */
+                       msk_ipv4,                                /* ... interface. See Note #6.                          */
+                       gateway_ipv4,
+                      &err_net);
+    if (err_net != NET_IPv4_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+
+
+#ifdef  NET_IPv6_MODULE_EN
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+                                                                /* ----- START IPV6 STATELESS AUTO-CONFIGURATION ------ */
+    NetIPv6_AddrAutoCfgHookSet(if_nbr,                          /* Set hook function to received Auto-Cfg result.       */
+                              &App_AutoCfgResult,
+                              &err_net);
+
+    cfg_result = NetIPv6_AddrAutoCfgEn(if_nbr,                  /* Enable and Start Auto-Configuration process.         */
+                                       DEF_YES,
+                                      &err_net);
+    if (cfg_result == DEF_FAIL) {
+        return (DEF_FAIL);
+    }
+
+#else
+                                                                /* ----- CONFIGURE IPV6 STATIC LINK LOCAL ADDRESS ----- */
+                                                                /* DHCPv6c is not yet available.                        */
+
+                                                                /* TODO Update IPv6 Address following your network ...  */
+                                                                /* ... requirements.                                    */
+
+                                                                /* See Note #5.                                         */
+    NetASCII_Str_to_IP("fe80::1111:1111",                       /* Convert IPv6 string address to 128 bit address.      */
+                       &addr_ipv6,
+                        NET_IPv6_ADDR_SIZE,
+                       &err_net);
+
+    ipv6_flags = 0;
+    DEF_BIT_SET(ipv6_flags, NET_IPv6_FLAG_BLOCK_EN);            /* Set Address Configuration as blocking.               */
+    DEF_BIT_SET(ipv6_flags, NET_IPv6_FLAG_DAD_EN);              /* Enable DAD with Address Configuration.               */
+
+    cfg_result = NetIPv6_CfgAddrAdd(if_nbr,                     /* Add a statically-configured IPv6 host address to ... */
+                                   &addr_ipv6,                  /* ... the interface. See Note 7.                       */
+                                    64,
+                                    ipv6_flags,
+                                   &err_net);
+    if (cfg_result == DEF_FAIL) {
+        return (DEF_FAIL);
+    }
+
+#endif  /* NET_IPv6_ADDR_AUTO_CFG_MODULE_EN */
+
+#endif  /* NET_IPv6_MODULE_EN */
+
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          App_AutoCfgResult()
+*
+* Description : Hook function to received the IPv6 Auto-Configuration process result.
+*
+* Argument(s) : if_nbr          Network Interface number on which Auto-Configuration occurred.
+*
+*               p_addr_local    Pointer to IPv6 link-local address configured, if any.
+*                               DEF_NULL, otherwise.
+*
+*               p_addr_global   Pointer to IPv6 global address configured, if any.
+*                               DEF_NULL, otherwise.
+*
+*               auto_cfg_result Result status of the IPv6 Auto-Configuration process.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Referenced in AppInit_TCPIP_MultipleIF().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+static  void  App_AutoCfgResult (      NET_IF_NBR                 if_nbr,
+                                 const NET_IPv6_ADDR             *p_addr_local,
+                                 const NET_IPv6_ADDR             *p_addr_global,
+                                       NET_IPv6_AUTO_CFG_STATUS   auto_cfg_result)
+{
+    CPU_CHAR  ip_string[NET_ASCII_LEN_MAX_ADDR_IPv6];
+    NET_ERR   err_net;
+
+
+    if (p_addr_local != DEF_NULL) {
+        NetASCII_IPv6_to_Str((NET_IPv6_ADDR *)p_addr_local, ip_string, DEF_NO, DEF_YES, &err_net);
+        printf("IPv6 Address Link Local: %s\n", ip_string);
+    }
+
+    if (p_addr_global != DEF_NULL) {
+        NetASCII_IPv6_to_Str((NET_IPv6_ADDR *)p_addr_global, ip_string, DEF_NO, DEF_YES, &err_net);
+        printf("IPv6 Address Global: %s\n", ip_string);
+    }
+
+    switch (auto_cfg_result) {
+        case NET_IPv6_AUTO_CFG_STATUS_FAILED:
+             printf("Auto-Configuration failed.\n");
+             break;
+
+
+        case NET_IPv6_AUTO_CFG_STATUS_SUCCEEDED:
+             printf("Auto-Configuration succeeded.\n");
+             break;
+
+
+        case NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL:
+             printf("Auto-Configuration with Link-Local address only.\n");
+             break;
+
+
+        default:
+             printf("Invalid Auto-Configuration result.\n");
+             break;
+    }
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Multicast/mcast_echo_client.py b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Multicast/mcast_echo_client.py
new file mode 100644
index 0000000..2b01cd1
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Multicast/mcast_echo_client.py
@@ -0,0 +1,102 @@
+#! /usr/bin/env python
+
+#*
+#********************************************************************************************************
+#
+#                                       MULTICAST EXAMPLE
+#
+# Filename      : mcast_echo_client.py
+# Version       : V3.04.02
+# Programmer(s) :
+#********************************************************************************************************
+# Description   : TODO
+#
+# Argument(s)   : IPv4 Address of the remote host
+#
+#                 IPv4 Multicast group address
+#
+#                 Remote Port
+#
+# Note(s)       : TODO
+#********************************************************************************************************
+#*
+
+#------------------
+# MODULE TO IMPORT
+#------------------
+import time
+import struct
+import socket
+import sys
+
+
+#----------------------
+# ARGUMENTS VALIDATION
+#----------------------
+if (len(sys.argv) > 3):
+    sys.stderr.write('Invalid number of arguments!\n')
+    sys.exit(-1)
+#end if
+
+
+GROUP       = sys.argv[1]
+PORT        = sys.argv[2]
+
+ANY         = "0.0.0.0"
+
+# Datagram (udp) socket
+try :
+    s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
+    print('Socket created')
+
+except socket.error :
+    print('Failed to create socket. Error Code : ' + str(socket.error[0]) + ' Message ' + socket.error[1])
+    sys.exit()
+#end try
+
+
+try:
+    # Set a timeout so the socket does not block indefinitely when trying to receive data.
+    s.settimeout(1)
+
+    # Set the time-to-live for messages to 1 so they do not go past the local network segment.
+    ttl = struct.pack('b', 1)
+    s.setsockopt(socket.IPPROTO_IP, socket.IP_MULTICAST_TTL, ttl)
+
+    #The sender is bound on (0.0.0.0:1501)
+    s.bind((ANY, int(PORT)))
+    print("The sender is bound: (" + ANY + ":" + PORT + ")")
+
+except socket.error :
+    print('Failed to create socket. Error Code : ' + str(socket.error[0]) + ' Message ' + socket.error[1])
+    s.close()
+    sys.exit()
+#end try
+
+
+multicast_group = (GROUP, int(PORT))
+
+while(1) :
+    msg       = 'Hello World'
+    msg_bytes =  bytes(msg, 'UTF-8')
+
+    try :
+        #Set the whole string
+        s.sendto(msg_bytes, multicast_group)
+        print("Message sent: " + msg)
+
+        # receive data from client (data, addr)
+        d     = s.recvfrom(1024)
+        reply = d[0]
+        addr  = d[1]
+        print('Server reply : ' + reply.decode('UTF-8'))
+
+    except socket.timeout as msg_error:
+        print('Timeout')
+
+    except socket.error as msg_error:
+        print('Socket Error : ' + msg_error[0])
+        s.close()
+        sys.exit()
+    #end try
+#end while
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Multicast/mcast_echo_server.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Multicast/mcast_echo_server.c
new file mode 100644
index 0000000..8496104
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Multicast/mcast_echo_server.c
@@ -0,0 +1,152 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                         MULTICAST ECHO SERVER
+*
+* Filename      : mcast_echo_server.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to create a UDP Multicast echo server using IPv4 string address.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void  MCastEchoServer (NET_IF_NBR     if_nbr,
+                       CPU_CHAR      *p_group_addr,
+                       NET_PORT_NBR   port)
+{
+    NET_IPv4_ADDR       addr;
+    NET_SOCK_ID         sock_id;
+    NET_SOCK_ADDR_IPv4  addr_local;
+    NET_ERR             net_err;
+
+
+
+    addr = NetASCII_Str_to_IPv4(p_group_addr, &net_err);        /* Convert Group IP address.                            */
+
+    NetIGMP_HostGrpJoin(if_nbr, addr, &net_err);                /* Join the multicast group.                            */
+    if (net_err != NET_IGMP_ERR_NONE) {
+        return;
+    }
+
+
+
+    sock_id = NetSock_Open(NET_SOCK_FAMILY_IP_V4,               /* Open an UDP socket.                                  */
+                           NET_SOCK_TYPE_DATAGRAM,
+                           NET_SOCK_PROTOCOL_UDP,
+                          &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+        return;
+    }
+
+                                                                        /* Set Socket address structure.                */
+    addr_local.AddrFamily = NET_SOCK_ADDR_FAMILY_IP_V4;                 /* IPv4.                                        */
+    addr_local.Addr       = NET_UTIL_HOST_TO_NET_32(NET_IPv4_ADDR_ANY); /* Any IPv4 addresses.                          */
+    addr_local.Port       = NET_UTIL_HOST_TO_NET_16(port);              /* Multicast Port to listen on.                 */
+
+
+    NetSock_Bind(                    sock_id,                   /* Bind the socket.                                     */
+                 (NET_SOCK_ADDR   *)&addr_local,
+                                     sizeof(addr_local),
+                                    &net_err);
+    if (net_err != NET_SOCK_ERR_NONE) {
+        goto exit_close;
+    }
+
+
+    while(1) {
+        CPU_CHAR           buf[1472u];
+        NET_SOCK_ADDR      sock_addr;
+        NET_SOCK_ADDR_LEN  sock_addr_len = sizeof(sock_addr);
+        CPU_INT32S         data_len;
+
+
+        data_len = NetSock_RxDataFrom(sock_id,                  /* Receive Data from the multicast group.               */
+                                      buf,
+                                      1472u,
+                                      NET_SOCK_FLAG_NONE,
+                                     &sock_addr,
+                                     &sock_addr_len,
+                                      DEF_NULL,
+                                      DEF_NULL,
+                                      DEF_NULL,
+                                     &net_err);
+        switch (net_err) {
+            case NET_SOCK_ERR_NONE:
+                 NetSock_TxDataTo(sock_id,                      /* Transmit received data to the sender.                */
+                                  buf,
+                                  data_len,
+                                  NET_SOCK_FLAG_NONE,
+                                 &sock_addr,
+                                  sock_addr_len,
+                                 &net_err);
+                 break;
+
+            case NET_SOCK_ERR_RX_Q_EMPTY:
+                 break;
+
+            default:
+                goto exit_close;
+        }
+    }
+
+
+exit_close:
+    NetSock_Close(sock_id, &net_err);                           /* Close the socket.                                    */
+
+    return;
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/Script/tcp_server.py b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/Script/tcp_server.py
new file mode 100644
index 0000000..3384a03
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/Script/tcp_server.py
@@ -0,0 +1,47 @@
+ #!/usr/bin/env python
+
+import asyncio
+import time
+import socket
+import struct
+
+class EchoServerClientProtocol(asyncio.Protocol):
+    def connection_made(self, transport):
+        self.transport = transport
+
+        peername = transport.get_extra_info('peername')
+        print('Connection from {}'.format(peername))
+
+        sock = transport.get_extra_info('socket')
+        sock.setsockopt(socket.SOL_SOCKET, socket.SO_LINGER, struct.pack('ii', 1, 0))
+
+
+    def data_received(self, data):
+        message = data.decode()
+        print('Data received: {!r}'.format(message))
+
+        print('Send: {!r}'.format(message))
+        self.transport.write(data)
+
+        time.sleep(0.02)
+
+        print('Close the client socket')
+        self.transport.close()
+
+
+loop = asyncio.get_event_loop()
+# Each client connection will create a new protocol instance
+coro = loop.create_server(EchoServerClientProtocol, '0.0.0.0', 10001)
+server = loop.run_until_complete(coro)
+
+# Serve requests until CTRL+c is pressed
+print('Serving on {}'.format(server.sockets[0].getsockname()))
+try:
+    loop.run_forever()
+except KeyboardInterrupt:
+    pass
+
+# Close the server
+server.close()
+loop.run_until_complete(server.wait_closed())
+loop.close()
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/tcp_client.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/tcp_client.c
new file mode 100644
index 0000000..e3a24c2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/tcp_client.c
@@ -0,0 +1,256 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                           TCP ECHO CLIENT
+*
+* Filename      : tcp_client.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to create a TCP client using IPv4 or IPv6 string address.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  TCP_SERVER_PORT  10001
+#define  TX_BUF_SIZE         16
+
+
+/*
+*********************************************************************************************************
+*                                           App_TCP_Client()
+*
+* Description : TCP Echo client:
+*
+*                   (a) Open a socket.
+*                   (b) Configure socket's address.
+*                   (c) Connect socket.
+*                   (d) Transmit data to the server.
+*                   (e) Receive echo response from the server
+*                   (f) Close socket.
+*
+* Argument(s) : p_ip_addr   Pointer to a string that contains the IP address of the server.
+*
+* Return(s)   : DEF_OK,   No error, message sent and echo received.
+*
+*               DEF_FAIL, Otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  App_TCP_Client (CPU_CHAR  *p_ip_addr)
+{
+#if   defined(NET_IPv6_MODULE_EN)
+    NET_IPv6_ADDR             server_addr;
+#elif defined(NET_IPv4_MODULE_EN)
+    NET_IPv4_ADDR             server_addr;
+#endif
+    NET_SOCK_ADDR             server_sock_addr;
+    NET_SOCK_ADDR_LEN         server_sock_addr_len;
+    NET_IP_ADDR_FAMILY        ip_family;
+    NET_SOCK_PROTOCOL_FAMILY  protocol_family;
+    NET_SOCK_ADDR_FAMILY      sock_addr_family;
+    NET_IP_ADDR_LEN           ip_addr_len;
+    NET_SOCK_ID               sock;
+    NET_SOCK_DATA_SIZE        tx_size;
+    NET_SOCK_DATA_SIZE        tx_rem;
+    CPU_CHAR                  tx_buf[] = "This is a TCP message";
+    NET_SOCK_RTN_CODE         rx_size;
+    NET_SOCK_DATA_SIZE        rx_rem;
+    CPU_INT08U               *p_buf;
+    NET_ERR                   err;
+
+
+                                                                /* ---------------- CONVERT IP ADDRESS ---------------- */
+    ip_family = NetASCII_Str_to_IP(p_ip_addr,
+                                  &server_addr,
+                                   sizeof(server_addr),
+                                  &err);
+    switch (err) {
+        case NET_ASCII_ERR_NONE:
+             break;
+
+        case NET_ASCII_ERR_IP_FAMILY_NOT_PRESENT:
+        case NET_ASCII_ERR_INVALID_CHAR_SEQ:
+        default:
+             return (DEF_FAIL);
+    }
+
+    switch (ip_family) {
+        case NET_IP_ADDR_FAMILY_IPv4:
+             sock_addr_family = NET_SOCK_ADDR_FAMILY_IP_V4;
+             protocol_family  = NET_SOCK_PROTOCOL_FAMILY_IP_V4;
+             ip_addr_len      = NET_IPv4_ADDR_SIZE;
+             break;
+
+        case NET_IP_ADDR_FAMILY_IPv6:
+             sock_addr_family = NET_SOCK_ADDR_FAMILY_IP_V6;
+             protocol_family  = NET_SOCK_PROTOCOL_FAMILY_IP_V6;
+             ip_addr_len      = NET_IPv6_ADDR_SIZE;
+             break;
+
+        case NET_IP_ADDR_FAMILY_UNKNOWN:
+        default:
+             return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------------- OPEN SOCKET -------------------- */
+    sock = NetSock_Open(protocol_family,
+                        NET_SOCK_TYPE_STREAM,
+                        NET_SOCK_PROTOCOL_TCP,
+                       &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------ CONFIGURE SOCKET'S ADDRESS ------------ */
+    NetApp_SetSockAddr(        &server_sock_addr,
+                                sock_addr_family,
+                                TCP_SERVER_PORT,
+                       (void *)&server_addr,
+                                ip_addr_len,
+                               &err);
+    switch (err) {
+        case NET_APP_ERR_NONE:
+            break;
+
+
+        case NET_APP_ERR_FAULT:
+        case NET_APP_ERR_NONE_AVAIL:
+        case NET_APP_ERR_INVALID_ARG:
+        default:
+            NetSock_Close(sock, &err);
+            return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------------ CONNECT SOCKET ------------------ */
+    NetSock_Conn(sock, &server_sock_addr, sizeof(server_sock_addr), &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        NetSock_Close(sock, &err);
+        return (DEF_FAIL);
+    }
+
+
+    p_buf  = (CPU_INT08U *)tx_buf;
+    tx_rem =  sizeof(tx_buf);
+    do {
+        tx_size = NetSock_TxDataTo(                  sock,
+                                   (void           *)p_buf,
+                                                     tx_rem,
+                                                     NET_SOCK_FLAG_NONE,
+                                   (NET_SOCK_ADDR *)&server_sock_addr,
+                                                     NET_SOCK_ADDR_SIZE,
+                                                    &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 tx_rem -= tx_size;
+                 p_buf   = (CPU_INT08U *)(p_buf + tx_size);
+                 break;
+
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+            case NET_ERR_TX:
+                 NetApp_TimeDly_ms(5, &err);
+                 break;
+
+            default:
+                 NetSock_Close(sock, &err);
+                 return (DEF_FAIL);
+        }
+    } while (tx_rem > 0);
+
+
+    rx_rem = TX_BUF_SIZE;
+
+
+                                                                /* ----- WAIT UNTIL RECEIVING DATA FROM A CLIENT ------ */
+    rx_rem =  TX_BUF_SIZE;
+    p_buf  = (CPU_INT08U *)tx_buf;
+    do {
+        server_sock_addr_len = sizeof(server_sock_addr);
+        rx_size              = NetSock_RxDataFrom(sock,
+                                          (void *)p_buf,
+                                                  rx_rem,
+                                                  NET_SOCK_FLAG_NONE,
+                                                 &server_sock_addr,
+                                                 &server_sock_addr_len,
+                                                  DEF_NULL,
+                                                  DEF_NULL,
+                                                  DEF_NULL,
+                                                 &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 rx_rem -=  rx_size;
+                 p_buf   = (CPU_INT08U *)(p_buf + rx_size);
+                 break;
+
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+            case NET_ERR_RX:
+                 NetApp_TimeDly_ms(5, &err);
+                 break;
+
+            default:
+                 NetSock_Close(sock, &err);
+                 return (DEF_FAIL);
+        }
+    } while (tx_rem > 0);
+
+
+                                                                /* ------------------- CLOSE SOCKET ------------------- */
+    NetSock_Close(sock, &err);
+
+    return (DEF_OK);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/tcp_server.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/tcp_server.c
new file mode 100644
index 0000000..48524a7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/tcp_server.c
@@ -0,0 +1,403 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                           TCP ECHO SERVER
+*
+* Filename      : tcp_server.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to create a TCP server that accept IPv4 or IPv6 connections.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  TCP_SERVER_PORT  10001
+#define  RX_BUF_SIZE         15
+
+
+/*
+*********************************************************************************************************
+*                                         App_TCP_ServerIPv4()
+*
+* Description : TCP Echo server:
+*
+*                   (a) Open a socket.
+*                   (b) Configure socket's address.
+*                   (c) Bind that socket.
+*                   (d) Receive data on the socket.
+*                   (e) Transmit to source the data received.
+*                   (f) Close socket on fatal fault error.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if  defined(NET_IPv4_MODULE_EN) && \
+     defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  App_TCP_ServerIPv4 (void)
+{
+    NET_SOCK_ID          sock_listen;
+    NET_SOCK_ID          sock_child;
+    NET_SOCK_ADDR_IPv4   server_sock_addr_ip;
+    NET_SOCK_ADDR_IPv4   client_sock_addr_ip;
+    NET_SOCK_ADDR_LEN    client_sock_addr_ip_size;
+    NET_SOCK_RTN_CODE    rx_size;
+    NET_SOCK_RTN_CODE    tx_size;
+    NET_SOCK_DATA_SIZE   tx_rem;
+    CPU_CHAR             rx_buf[RX_BUF_SIZE];
+    CPU_INT32U           addr_any = NET_IPv4_ADDR_ANY;
+    CPU_INT08U          *p_buf;
+    CPU_BOOLEAN          fault_err;
+    NET_ERR              err;
+
+
+                                                                /* ----------------- OPEN IPV4 SOCKET ----------------- */
+    sock_listen = NetSock_Open(NET_SOCK_PROTOCOL_FAMILY_IP_V4,
+                               NET_SOCK_TYPE_STREAM,
+                               NET_SOCK_PROTOCOL_TCP,
+                              &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        return;
+    }
+
+
+                                                                /* ------------ CONFIGURE SOCKET'S ADDRESS ------------ */
+    NetApp_SetSockAddr((NET_SOCK_ADDR *)&server_sock_addr_ip,
+                                         NET_SOCK_ADDR_FAMILY_IP_V4,
+                                         TCP_SERVER_PORT,
+                       (CPU_INT08U    *)&addr_any,
+                                         NET_IPv4_ADDR_SIZE,
+                                        &err);
+    switch (err) {
+        case NET_APP_ERR_NONE:
+            break;
+
+
+        case NET_APP_ERR_FAULT:
+        case NET_APP_ERR_NONE_AVAIL:
+        case NET_APP_ERR_INVALID_ARG:
+        default:
+            NetSock_Close(sock_listen, &err);
+            return;
+    }
+
+
+                                                                /* ------------------- BIND SOCKET -------------------- */
+    NetSock_Bind(                  sock_listen,
+                 (NET_SOCK_ADDR *)&server_sock_addr_ip,
+                                   NET_SOCK_ADDR_SIZE,
+                                  &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        NetSock_Close(sock_listen, &err);
+        return;
+    }
+
+
+                                                                /* ------------------ LISTEN SOCKET ------------------- */
+    NetSock_Listen(sock_listen, 1, &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        NetSock_Close(sock_listen, &err);
+        return;
+    }
+
+    fault_err = DEF_NO;
+
+    while (fault_err == DEF_NO) {
+        client_sock_addr_ip_size = NET_SOCK_ADDR_IPv4_SIZE;
+
+                                                                /* ---------- ACCEPT NEW INCOMING CONNECTION ---------- */
+        sock_child = NetSock_Accept(                  sock_listen,
+                                    (NET_SOCK_ADDR *)&client_sock_addr_ip,
+                                                     &client_sock_addr_ip_size,
+                                                     &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 do {
+                                                                /* ----- WAIT UNTIL RECEIVING DATA FROM A CLIENT ------ */
+                     client_sock_addr_ip_size = sizeof(client_sock_addr_ip);
+                     rx_size = NetSock_RxDataFrom(                  sock_child,
+                                                                    rx_buf,
+                                                                    RX_BUF_SIZE,
+                                                                    NET_SOCK_FLAG_NONE,
+                                                  (NET_SOCK_ADDR *)&client_sock_addr_ip,
+                                                                   &client_sock_addr_ip_size,
+                                                                    DEF_NULL,
+                                                                    DEF_NULL,
+                                                                    DEF_NULL,
+                                                                   &err);
+                     switch (err) {
+                         case NET_SOCK_ERR_NONE:
+                              tx_rem =  rx_size;
+                              p_buf  = (CPU_INT08U *)rx_buf;
+                                                                /* ----- TRANSMIT THE DATA RECEIVED TO THE CLIENT ----- */
+                              do {
+                                  tx_size = NetSock_TxDataTo(                  sock_child,
+                                                             (void           *)p_buf,
+                                                                               tx_rem,
+                                                                               NET_SOCK_FLAG_NONE,
+                                                             (NET_SOCK_ADDR *)&client_sock_addr_ip,
+                                                                               client_sock_addr_ip_size,
+                                                                              &err);
+                                  tx_rem -= tx_size;
+                                  p_buf   = (CPU_INT08U *)(p_buf + tx_size);
+
+                              } while (tx_rem > 0);
+                              break;
+
+                         case NET_SOCK_ERR_RX_Q_EMPTY:
+                         case NET_ERR_FAULT_LOCK_ACQUIRE:
+                              break;
+
+                         default:
+                             fault_err = DEF_YES;
+                             break;
+                     }
+
+                 } while (fault_err == DEF_NO);
+
+
+                                                                /* ---------------- CLOSE CHILD SOCKET ---------------- */
+                 NetSock_Close(sock_child, &err);
+                 if (err != NET_SOCK_ERR_NONE) {
+                     fault_err = DEF_YES;
+                 }
+                 break;
+
+            case NET_SOCK_ERR_NONE_AVAIL:
+            case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+                 break;
+
+            default:
+                 fault_err = DEF_YES;
+                 break;
+        }
+    }
+
+                                                                /* ------------- FATAL FAULT SOCKET ERROR ------------- */
+    NetSock_Close(sock_listen, &err);                           /* This function should be reached only when a fatal ...*/
+                                                                /* fault error has occurred.                            */
+}
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                         App_TCP_ServerIPv6()
+*
+* Description : TCP Echo server:
+*
+*                   (a) Open a socket.
+*                   (b) Configure socket's address.
+*                   (c) Bind that socket.
+*                   (d) Receive data on the socket.
+*                   (e) Transmit to source the data received.
+*                   (f) Close socket on fatal fault error.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if  defined(NET_IPv6_MODULE_EN) && \
+     defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  App_TCP_ServerIPv6 (void)
+{
+    NET_SOCK_ID          sock_listen;
+    NET_SOCK_ID          sock_child;
+    NET_SOCK_ADDR_IPv6   server_sock_addr_ip;
+    NET_SOCK_ADDR_IPv6   client_sock_addr_ip;
+    NET_SOCK_ADDR_LEN    client_sock_addr_ip_size;
+    NET_SOCK_RTN_CODE    rx_size;
+    NET_SOCK_RTN_CODE    tx_size;
+    NET_SOCK_DATA_SIZE   tx_rem;
+    CPU_CHAR             rx_buf[RX_BUF_SIZE];
+    CPU_INT08U          *p_buf;
+    CPU_BOOLEAN          fault_err;
+    NET_ERR              err;
+
+
+
+                                                                /* ----------------- OPEN IPV6 SOCKET ----------------- */
+    sock_listen = NetSock_Open(NET_SOCK_PROTOCOL_FAMILY_IP_V6,
+                               NET_SOCK_TYPE_STREAM,
+                               NET_SOCK_PROTOCOL_TCP,
+                              &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        return;
+    }
+
+
+
+                                                                /* ------------ CONFIGURE SOCKET'S ADDRESS ------------ */
+    NetApp_SetSockAddr((NET_SOCK_ADDR *)&server_sock_addr_ip,
+                                         NET_SOCK_ADDR_FAMILY_IP_V6,
+                                         TCP_SERVER_PORT,
+                       (CPU_INT08U    *)&NET_IPv6_ADDR_ANY,
+                                         NET_IPv6_ADDR_SIZE,
+                                        &err);
+    switch (err) {
+        case NET_APP_ERR_NONE:
+            break;
+
+
+        case NET_APP_ERR_FAULT:
+        case NET_APP_ERR_NONE_AVAIL:
+        case NET_APP_ERR_INVALID_ARG:
+        default:
+            NetSock_Close(sock_listen, &err);
+            return;
+    }
+
+
+                                                                /* ------------------- BIND SOCKET -------------------- */
+    NetSock_Bind(                  sock_listen,
+                 (NET_SOCK_ADDR *)&server_sock_addr_ip,
+                                   NET_SOCK_ADDR_SIZE,
+                                  &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        NetSock_Close(sock_listen, &err);
+        return;
+    }
+
+
+                                                                /* ------------------ LISTEN SOCKET ------------------- */
+    NetSock_Listen(sock_listen, 1, &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        NetSock_Close(sock_listen, &err);
+        return;
+    }
+
+    fault_err = DEF_NO;
+
+    while (fault_err == DEF_NO) {
+                                                                /* --------- ACCEPT NEW INCOMMING CONNECTION ---------- */
+        sock_child = NetSock_Accept(                  sock_listen,
+                                    (NET_SOCK_ADDR *)&client_sock_addr_ip,
+                                                     &client_sock_addr_ip_size,
+                                                     &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 do {
+                                                                /* ---- WAIT UNTIL RECEIVING DATA FROM THE CLIENT ----- */
+                     client_sock_addr_ip_size = sizeof(client_sock_addr_ip);
+                     rx_size = NetSock_RxDataFrom(                  sock_child,
+                                                                    rx_buf,
+                                                                    RX_BUF_SIZE,
+                                                                    NET_SOCK_FLAG_NONE,
+                                                  (NET_SOCK_ADDR *)&client_sock_addr_ip,
+                                                                   &client_sock_addr_ip_size,
+                                                                    DEF_NULL,
+                                                                    DEF_NULL,
+                                                                    DEF_NULL,
+                                                                   &err);
+                     switch (err) {
+                         case NET_SOCK_ERR_NONE:
+                              tx_rem =  rx_size;
+                              p_buf  = (CPU_INT08U *)rx_buf;
+                                                                /* ----- TRANSMIT THE DATA RECEIVED TO THE CLIENT ----- */
+                              do {
+                                  tx_size = NetSock_TxDataTo(                  sock_child,
+                                                             (void           *)p_buf,
+                                                                               tx_rem,
+                                                                               NET_SOCK_FLAG_NONE,
+                                                             (NET_SOCK_ADDR *)&client_sock_addr_ip,
+                                                                               client_sock_addr_ip_size,
+                                                                              &err);
+                                  tx_rem -=  tx_size;
+                                  p_buf   = (CPU_INT08U *)(p_buf + tx_size);
+
+                              } while (tx_rem > 0);
+                              break;
+
+                         case NET_SOCK_ERR_RX_Q_EMPTY:
+                         case NET_ERR_FAULT_LOCK_ACQUIRE:
+                              break;
+
+                         default:
+                             fault_err = DEF_YES;
+                             break;
+                     }
+
+                 } while (fault_err == DEF_NO);
+
+
+                                                                /* ---------------- CLOSE CHILD SOCKET ---------------- */
+                 NetSock_Close(sock_child, &err);
+                 if (err != NET_SOCK_ERR_NONE) {
+                     fault_err = DEF_YES;
+                 }
+                 break;
+
+            case NET_SOCK_ERR_NONE_AVAIL:
+            case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+                 break;
+
+            default:
+                 fault_err = DEF_YES;
+                 break;
+        }
+    }
+
+                                                                /* ------------- FATAL FAULT SOCKET ERROR ------------- */
+    NetSock_Close(sock_listen, &err);                           /* This function should be reached only when a fatal ...*/
+                                                                /* fault error has occurred.                            */
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/udp_client.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/udp_client.c
new file mode 100644
index 0000000..7089606
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/udp_client.c
@@ -0,0 +1,246 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                           UDP ECHO CLIENT
+*
+* Filename      : udp_client.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to create an UDP client using IPv4 or IPv6 string address.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  UDP_SERVER_PORT  10001
+#define  TX_BUF_SIZE         15
+
+
+/*
+*********************************************************************************************************
+*                                          App_UDP_Client()
+*
+* Description : UDP Echo client:
+*
+*                   (a) Open a socket.
+*                   (b) Configure socket's address.
+*                   (c) Transmit data to the server.
+*                   (d) Receive echo response from the server
+*                   (e) Close socket.
+*
+* Argument(s) : p_ip_addr   Pointer to a string that contains the IP address of the server.
+*
+* Return(s)   : DEF_OK,   No error, message sent and echo received.
+*
+*               DEF_FAIL, Otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  App_UDP_Client (CPU_CHAR  *p_ip_addr)
+{
+#if   defined(NET_IPv6_MODULE_EN)
+    NET_IPv6_ADDR             server_addr;
+#elif defined(NET_IPv4_MODULE_EN)
+    NET_IPv4_ADDR             server_addr;
+#endif
+    NET_SOCK_ADDR             server_sock_addr;
+    NET_SOCK_ADDR_LEN         server_sock_addr_len;
+    NET_IP_ADDR_FAMILY        ip_family;
+    NET_SOCK_PROTOCOL_FAMILY  protocol_family;
+    NET_SOCK_ADDR_FAMILY      sock_addr_family;
+    NET_IP_ADDR_LEN           ip_addr_len;
+    NET_SOCK_ID               sock;
+    NET_SOCK_DATA_SIZE        tx_size;
+    NET_SOCK_DATA_SIZE        tx_rem;
+    CPU_CHAR                  tx_buf[TX_BUF_SIZE];
+    NET_SOCK_RTN_CODE         rx_size;
+    NET_SOCK_DATA_SIZE        rx_rem;
+    CPU_INT08U               *p_buf;
+    NET_ERR                   err;
+
+
+                                                                /* ---------------- CONVERT IP ADDRESS ---------------- */
+    ip_family = NetASCII_Str_to_IP(p_ip_addr,
+                                  &server_addr,
+                                   sizeof(server_addr),
+                                  &err);
+    switch (err) {
+        case NET_ASCII_ERR_NONE:
+             break;
+
+        case NET_ASCII_ERR_IP_FAMILY_NOT_PRESENT:
+        case NET_ASCII_ERR_INVALID_CHAR_SEQ:
+        default:
+             return (DEF_FAIL);
+    }
+
+    switch (ip_family) {
+        case NET_IP_ADDR_FAMILY_IPv4:
+             sock_addr_family = NET_SOCK_ADDR_FAMILY_IP_V4;
+             protocol_family  = NET_SOCK_PROTOCOL_FAMILY_IP_V4;
+             ip_addr_len      = NET_IPv4_ADDR_SIZE;
+             break;
+
+        case NET_IP_ADDR_FAMILY_IPv6:
+             sock_addr_family = NET_SOCK_ADDR_FAMILY_IP_V6;
+             protocol_family  = NET_SOCK_PROTOCOL_FAMILY_IP_V6;
+             ip_addr_len      = NET_IPv6_ADDR_SIZE;
+             break;
+
+        case NET_IP_ADDR_FAMILY_UNKNOWN:
+        default:
+             return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------------- OPEN SOCKET -------------------- */
+    sock = NetSock_Open(protocol_family,
+                        NET_SOCK_TYPE_DATAGRAM,
+                        NET_SOCK_PROTOCOL_UDP,
+                       &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------ CONFIGURE SOCKET'S ADDRESS ------------ */
+    NetApp_SetSockAddr(        &server_sock_addr,
+                                sock_addr_family,
+                                UDP_SERVER_PORT,
+                       (void *)&server_addr,
+                                ip_addr_len,
+                               &err);
+    switch (err) {
+        case NET_APP_ERR_NONE:
+            break;
+
+
+        case NET_APP_ERR_FAULT:
+        case NET_APP_ERR_NONE_AVAIL:
+        case NET_APP_ERR_INVALID_ARG:
+        default:
+            NetSock_Close(sock, &err);
+            return (DEF_FAIL);
+    }
+
+
+    tx_rem = TX_BUF_SIZE;
+    p_buf  = tx_buf;
+    do {
+        tx_size = NetSock_TxDataTo(                  sock,
+                                   (void           *)p_buf,
+                                                     tx_rem,
+                                                     NET_SOCK_FLAG_NONE,
+                                   (NET_SOCK_ADDR *)&server_sock_addr,
+                                                     NET_SOCK_ADDR_SIZE,
+                                                    &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 tx_rem -=  tx_size;
+                 p_buf   = (CPU_INT08U *)(p_buf + tx_size);
+                 break;
+
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+            case NET_ERR_TX:
+                 NetApp_TimeDly_ms(5, &err);
+                 break;
+
+            default:
+                 NetSock_Close(sock, &err);
+                 return (DEF_FAIL);
+        }
+    } while (tx_rem > 0);
+
+
+    rx_rem = TX_BUF_SIZE;
+
+
+                                                                /* ----- WAIT UNTIL RECEIVING DATA FROM A CLIENT ------ */
+    rx_rem =  TX_BUF_SIZE;
+    p_buf  = (CPU_INT08U *)tx_buf;
+    do {
+        server_sock_addr_len = sizeof(server_sock_addr);
+        rx_size              = NetSock_RxDataFrom(sock,
+                                          (void *)p_buf,
+                                                  rx_rem,
+                                                  NET_SOCK_FLAG_NONE,
+                                                 &server_sock_addr,
+                                                 &server_sock_addr_len,
+                                                  DEF_NULL,
+                                                  DEF_NULL,
+                                                  DEF_NULL,
+                                                 &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 rx_rem -=  rx_size;
+                 p_buf   = (CPU_INT08U *)(p_buf + rx_size);
+                 break;
+
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+            case NET_ERR_RX:
+                 NetApp_TimeDly_ms(5, &err);
+                 break;
+
+            default:
+                 NetSock_Close(sock, &err);
+                 return (DEF_FAIL);
+        }
+    } while (tx_rem > 0);
+
+                                                                /* ------------------- CLOSE SOCKET ------------------- */
+    NetSock_Close(sock, &err);
+
+    return (DEF_OK);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/udp_server.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/udp_server.c
new file mode 100644
index 0000000..7c56ca8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/Socket/udp_server.c
@@ -0,0 +1,334 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                           UDP ECHO SERVER
+*
+* Filename      : udp_server.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example shows how to create an UDP server with IPv4 and IPv6.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  UDP_SERVER_PORT  10001
+#define  RX_BUF_SIZE         15
+
+
+/*
+*********************************************************************************************************
+*                                         App_UDP_ServerIPv4()
+*
+* Description : UDP Echo server:
+*
+*                   (a) Open a socket.
+*                   (b) Configure socket's address.
+*                   (c) Bind that socket.
+*                   (d) Receive data on the socket.
+*                   (e) Transmit to source the data received.
+*                   (f) Close socket on fatal fault error.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+void  App_UDP_ServerIPv4 (void)
+{
+    NET_SOCK_ID          sock;
+    NET_SOCK_ADDR_IPv4   server_sock_addr_ip;
+    NET_SOCK_ADDR_IPv4   client_sock_addr_ip;
+    NET_SOCK_ADDR_LEN    client_sock_addr_ip_size;
+    NET_SOCK_RTN_CODE    rx_size;
+    NET_SOCK_RTN_CODE    tx_size;
+    NET_SOCK_DATA_SIZE   tx_rem;
+    CPU_CHAR             rx_buf[RX_BUF_SIZE];
+    CPU_INT32U           addr_any = NET_IPv4_ADDR_ANY;
+    CPU_INT08U          *p_buf;
+    CPU_BOOLEAN          fault_err;
+    NET_ERR              err;
+
+
+                                                                /* ----------------- OPEN IPV4 SOCKET ----------------- */
+    sock = NetSock_Open(NET_SOCK_PROTOCOL_FAMILY_IP_V4,
+                        NET_SOCK_TYPE_DATAGRAM,
+                        NET_SOCK_PROTOCOL_UDP,
+                       &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        return;
+    }
+
+
+                                                                /* ------------ CONFIGURE SOCKET'S ADDRESS ------------ */
+    NetApp_SetSockAddr((NET_SOCK_ADDR *)&server_sock_addr_ip,
+                                         NET_SOCK_ADDR_FAMILY_IP_V4,
+                                         UDP_SERVER_PORT,
+                       (CPU_INT08U    *)&addr_any,
+                                         NET_IPv4_ADDR_SIZE,
+                                        &err);
+    switch (err) {
+        case NET_APP_ERR_NONE:
+            break;
+
+
+        case NET_APP_ERR_FAULT:
+        case NET_APP_ERR_NONE_AVAIL:
+        case NET_APP_ERR_INVALID_ARG:
+        default:
+            NetSock_Close(sock, &err);
+            return;
+    }
+
+
+                                                                /* ------------------- BIND SOCKET -------------------- */
+    NetSock_Bind(                  sock,
+                 (NET_SOCK_ADDR *)&server_sock_addr_ip,
+                                   NET_SOCK_ADDR_SIZE,
+                                  &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        NetSock_Close(sock, &err);
+        return;
+    }
+
+    fault_err = DEF_NO;
+
+    do {
+                                                                /* ----- WAIT UNTIL RECEIVING DATA FROM A CLIENT ------ */
+        client_sock_addr_ip_size = sizeof(client_sock_addr_ip);
+        rx_size = NetSock_RxDataFrom(                  sock,
+                                                       rx_buf,
+                                                       RX_BUF_SIZE,
+                                                       NET_SOCK_FLAG_NONE,
+                                     (NET_SOCK_ADDR *)&client_sock_addr_ip,
+                                                      &client_sock_addr_ip_size,
+                                                       DEF_NULL,
+                                                       DEF_NULL,
+                                                       DEF_NULL,
+                                                      &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 tx_rem = rx_size;
+                 p_buf  = rx_buf;
+                                                                /* ----- TRANSMIT THE DATA RECEIVED TO THE CLIENT ----- */
+                 do {
+                     tx_size = NetSock_TxDataTo(                  sock,
+                                                                  p_buf,
+                                                                  tx_rem,
+                                                                  NET_SOCK_FLAG_NONE,
+                                                (NET_SOCK_ADDR *)&client_sock_addr_ip,
+                                                                  client_sock_addr_ip_size,
+                                                                 &err);
+                     tx_rem -=  tx_size;
+                     p_buf   = (CPU_INT08U *)(p_buf + tx_size);
+
+                 } while (tx_rem > 0);
+                 break;
+
+            case NET_SOCK_ERR_RX_Q_EMPTY:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 break;
+
+            default:
+                fault_err = DEF_YES;
+                break;
+        }
+
+    } while (fault_err == DEF_NO);
+
+                                                                /* ------------- FATAL FAULT SOCKET ERROR ------------- */
+    NetSock_Close(sock, &err);                                  /* This function should be reached only when a fatal ...*/
+                                                                /* fault error has occurred.                            */
+}
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                         App_UDP_ServerIPv6()
+*
+* Description : UDP Echo server:
+*
+*                   (a) Open a socket.
+*                   (b) Configure socket's address.
+*                   (c) Bind that socket.
+*                   (d) Receive data on the socket.
+*                   (e) Transmit to source the data received.
+*                   (f) Close socket on fatal fault error.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+void  App_UDP_ServerIPv6 (void)
+{
+    NET_SOCK_ID          sock;
+    NET_SOCK_ADDR_IPv6   server_sock_addr_ip;
+    NET_SOCK_ADDR_IPv6   client_sock_addr_ip;
+    NET_SOCK_ADDR_LEN    client_sock_addr_ip_size;
+    NET_SOCK_RTN_CODE    rx_size;
+    NET_SOCK_RTN_CODE    tx_size;
+    NET_SOCK_DATA_SIZE   tx_rem;
+    CPU_CHAR             rx_buf[RX_BUF_SIZE];
+    CPU_INT08U          *p_buf;
+    CPU_BOOLEAN          fault_err;
+    NET_ERR              err;
+
+
+
+                                                                /* ----------------- OPEN IPV6 SOCKET ----------------- */
+    sock = NetSock_Open(NET_SOCK_PROTOCOL_FAMILY_IP_V6,         /* IPv6 Socket family.                                  */
+                        NET_SOCK_TYPE_DATAGRAM,                 /* Datagram socket.                                     */
+                        NET_SOCK_PROTOCOL_UDP,                  /* UDP protocol.                                        */
+                       &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        return;
+    }
+
+
+                                                                /* ------------ CONFIGURE SOCKET'S ADDRESS ------------ */
+                                                                /* Populate the NET_SOCK_ADDR_IP structure for the ...  */
+                                                                /* server address and port, and convert it to ...       */
+                                                                /* network order.                                       */
+    NetApp_SetSockAddr((NET_SOCK_ADDR *)&server_sock_addr_ip,
+                                         NET_SOCK_ADDR_FAMILY_IP_V6,
+                                         UDP_SERVER_PORT,
+                       (CPU_INT08U    *)&NET_IPv6_ADDR_ANY,
+                                         NET_IPv6_ADDR_SIZE,
+                                        &err);
+    switch (err) {
+        case NET_APP_ERR_NONE:
+            break;
+
+
+        case NET_APP_ERR_FAULT:
+        case NET_APP_ERR_NONE_AVAIL:
+        case NET_APP_ERR_INVALID_ARG:
+        default:
+            NetSock_Close(sock, &err);
+            return;
+    }
+
+
+                                                                /* ------------------- BIND SOCKET -------------------- */
+    NetSock_Bind(                  sock,                        /* Bind the newly created socket to the address and ... */
+                 (NET_SOCK_ADDR *)&server_sock_addr_ip,         /* port specified by server_sock_addr_ip.               */
+                                   NET_SOCK_ADDR_SIZE,
+                                  &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        NetSock_Close(sock, &err);
+        return;
+    }
+
+    fault_err = DEF_NO;
+
+    do {
+                                                                /* ----- WAIT UNTIL RECEIVING DATA FROM A CLIENT ------ */
+        client_sock_addr_ip_size = sizeof(client_sock_addr_ip);
+        rx_size = NetSock_RxDataFrom(                  sock,    /* Receive data from any host on port UDP_SERVER_PORT.  */
+                                     (void           *)rx_buf,
+                                                       RX_BUF_SIZE,
+                                                       NET_SOCK_FLAG_NONE,
+                                     (NET_SOCK_ADDR *)&client_sock_addr_ip,
+                                                      &client_sock_addr_ip_size,
+                                                       DEF_NULL,
+                                                       DEF_NULL,
+                                                       DEF_NULL,
+                                                      &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 tx_rem =  rx_size;
+                 p_buf  = (CPU_INT08U *)rx_buf;
+                 do {
+                                                                 /* ------- TRANSMIT RECEIVED DATA TO THE CLIENT ------- */
+                                                                 /* Transmit data to IP address and port of the client.  */
+                     tx_size = NetSock_TxDataTo(                  sock,
+                                                (void           *)p_buf,
+                                                                  tx_rem,
+                                                                  NET_SOCK_FLAG_NONE,
+                                                (NET_SOCK_ADDR *)&client_sock_addr_ip,
+                                                                  client_sock_addr_ip_size,
+                                                                 &err);
+                     tx_rem -=  tx_size;
+                     p_buf   = (CPU_INT08U *)(p_buf + tx_size);
+
+                 } while (tx_rem > 0);
+                 break;
+
+            case NET_SOCK_ERR_RX_Q_EMPTY:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 break;
+
+            default:
+                fault_err = DEF_YES;
+                break;
+        }
+
+    } while (fault_err == DEF_NO);
+
+
+                                                                /* ------------- FATAL FAULT SOCKET ERROR ------------- */
+    NetSock_Close(sock, &err);                                  /* This function should be reached only when a fatal ...*/
+                                                                /* fault error has occurred.                            */
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/CA-Cert/go_daddy.cer b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/CA-Cert/go_daddy.cer
new file mode 100644
index 0000000..885c45a
Binary files /dev/null and b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/CA-Cert/go_daddy.cer differ
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/CA-Cert/test.cer b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/CA-Cert/test.cer
new file mode 100644
index 0000000..885c45a
Binary files /dev/null and b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/CA-Cert/test.cer differ
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/client_secure.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/client_secure.c
new file mode 100644
index 0000000..32ecb6c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/client_secure.c
@@ -0,0 +1,266 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                           TLS/SSL CLIENT
+
+*
+* Filename      : client_secure.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example show how to connect a client to a server using TLS/SSL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                            /* CA certificate:                                          */
+                                                            /*      (1) Can be obtained on CA website.                  */
+                                                            /*      (2) Can be generated using a tool such as OpenSSL.  */
+CPU_CHAR *p_cert =
+                "MIIDVDCCAjygAwIBAgIDAjRWMA0GCSqGSIb3DQEBBQUAMEIxCzAJBgNVBAYTAlVT"
+                "MRYwFAYDVQQKEw1HZW9UcnVzdCBJbmMuMRswGQYDVQQDExJHZW9UcnVzdCBHbG9i"
+                "YWwgQ0EwHhcNMDIwNTIxMDQwMDAwWhcNMjIwNTIxMDQwMDAwWjBCMQswCQYDVQQG"
+                "EwJVUzEWMBQGA1UEChMNR2VvVHJ1c3QgSW5jLjEbMBkGA1UEAxMSR2VvVHJ1c3Qg"
+                "R2xvYmFsIENBMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA2swYYzD9"
+                "9BcjGlZ+W988bDjkcbd4kdS8odhM+KhDtgPpTSEHCIjaWC9mOSm9BXiLnTjoBbdq"
+                "fnGk5sRgprDvgOSJKA+eJdbtg/OtppHHmMlCGDUUna2YRpIuT8rxh0PBFpVXLVDv"
+                "iS2Aelet8u5fa9IAjbkU+BQVNdnARqN7csiRv8lVK83Qlz6cJmTM386DGXHKTubU"
+                "1XupGc1V3sjs0l44U+VcT4wt/lAjNvxm5suOpDkZALeVAjmRCw7+OC7RHQWa9k0+"
+                "bw8HHa8sHo9gOeL6NlMTOdReJivbPagUvTLrGAMoUgRx5aszPeE4uwc2hGKceeoW"
+                "MPRfwCvocWvk+QIDAQABo1MwUTAPBgNVHRMBAf8EBTADAQH/MB0GA1UdDgQWBBTA"
+                "ephojYn7qwVkDBF9qn1luMrMTjAfBgNVHSMEGDAWgBTAephojYn7qwVkDBF9qn1l"
+                "uMrMTjANBgkqhkiG9w0BAQUFAAOCAQEANeMpauUvXVSOKVCUn5kaFOSPeCpilKIn"
+                "Z57QzxpeR+nBsqTP3UEaBU6bS+5Kb1VSsyShNwrrZHYqLizz/Tt1kL/6cdjHPTfS"
+                "tQWVYrmm3ok9Nns4d0iXrKYgjy6myQzCsplFAMfOEVEiIuCl6rYVSAlk6l5PdPcF"
+                "PseKUgzbFbS9bZvlxrFUaKnjaZC2mqUPuLk/IH2uSrW4nOQdtqvmlKXBx4Ot2/Un"
+                "hw4EbNX/3aBd7YdStysVAq45pmp06drE57xNNB6pXE0zX5IJL4hmXXeXxx12E6nV"
+                "5fEWCRE11azbJHFwLJhWC9kXtNHjUStedejV0NxPNO3CBWaAocvmMw==";
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppClientCertTrustCallBackFnct (void                             *p_cert_dn,
+                                             NET_SOCK_SECURE_UNTRUSTED_REASON  reason);
+
+
+
+/*
+*********************************************************************************************************
+*                                          AppClientConnect()
+*
+* Description : (1) Initialize a client secure socket:
+*
+*                   (a) Install CA certificate.
+*                   (b) Open a TCP socket.
+*                   (c) Configure socket's option to be secure.
+*                   (d) Connect the socket, establish a secure connection with the server.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Socket ID, if successfully connected.
+*
+*               -1,        Otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  AppClientConnect (void)
+{
+    NET_SOCK_ID         sock_id;
+    NET_SOCK_ADDR_IPv4  addr_server;
+    CPU_INT32U          len_addr_server;
+    CPU_INT32U          len;
+    NET_ERR             err;
+
+                                                                /* -------------- INSTALL CA CERTIFICATE -------------- */
+    len = Str_Len(p_cert);
+    NetSecure_CA_CertIntall(p_cert, len, NET_SOCK_SECURE_CERT_KEY_FMT_PEM, &err);
+
+
+                                                                /* ------------------ OPEN THE SOCKET ----------------- */
+    sock_id = NetApp_SockOpen(NET_SOCK_ADDR_FAMILY_IP_V4,
+                              NET_SOCK_TYPE_STREAM,
+                              NET_SOCK_PROTOCOL_TCP,
+                              3,
+                              5,
+                              &err);
+    switch (err) {
+        case NET_APP_ERR_NONE:
+             break;
+
+        default:
+             return (-1);
+    }
+
+                                                                /* ------------ CONFIGURE SOCKET AS SECURE ------------ */
+   (void)NetSock_CfgSecure(sock_id,                             /* First the socket option secure must be set.          */
+                           DEF_YES,
+                          &err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+        default:
+             NetApp_SockClose(sock_id, 1, &err);
+             return (-1);
+    }
+
+
+   (void)NetSock_CfgSecureClientCommonName(sock_id,             /* Configure the common name of the server ...          */
+                                          "domain_name.com",    /* certificate, most of the time it is the Domain name. */
+                                          &err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+        default:
+             NetApp_SockClose(sock_id, 1, &err);
+             return (-1);
+    }
+
+                                                                /* Configure the callback function to call if the ...   */
+                                                                /* ... server certificate is not trusted. So the  ...   */
+                                                                /* ... connection can be allow even if the        ...   */
+                                                                /* ... certificate is not trusted.                      */
+   (void)NetSock_CfgSecureClientTrustCallBack(sock_id,
+                                             &AppClientCertTrustCallBackFnct,
+                                             &err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+        default:
+             NetApp_SockClose(sock_id, 1, &err);
+             return (-1);
+    }
+
+
+                                                                /* ------------- ESTABLISH TCP CONNECTION ------------- */
+    Mem_Clr((void *)&addr_server, NET_SOCK_ADDR_SIZE);
+
+
+    addr_server.AddrFamily = NetASCII_Str_to_IP((CPU_CHAR  *)"98.139.211.125",
+                                                (void      *)addr_server.Addr,
+                                                (CPU_INT08U )sizeof(addr_server.Addr),
+                                                            &err);
+    addr_server.Port       = NET_UTIL_HOST_TO_NET_16(12345);
+    len_addr_server        = sizeof(addr_server);
+
+    (void)NetApp_SockConn(                  sock_id,            /* Connect to server using TLS/SSL.                     */
+                          (NET_SOCK_ADDR *)&addr_server,
+                                            len_addr_server,
+                                            3,
+                                            5,
+                                            5,
+                                           &err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+        default:
+             NetApp_SockClose(sock_id, 1, &err);
+             return (-1);
+    }
+
+    /* Now all the data transfered on this socket is encrypted.                 */
+    /* You just have to use any socket API such as NetApp_Rx() or NetApp_Tx().  */
+
+    return (sock_id);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                   AppClientCertTrustCallBackFnct()
+*
+* Description : Function called when the server's certificate is not trusted.
+*
+* Argument(s) : p_cert_dn   Pointer to certificate distinguish name.
+*
+*               reason      Reason why the certificate is not trusted:
+*
+*                               NET_SOCK_SECURE_UNTRUSTED_BY_CA
+*                               NET_SOCK_SECURE_EXPIRE_DATE
+*                               NET_SOCK_SECURE_INVALID_DATE
+*                               NET_SOCK_SECURE_SELF_SIGNED
+*                               NET_SOCK_SECURE_UNKNOWN
+*
+*
+* Return(s)   : DEF_OK,   The connection can be established even if the certificated is not trusted.
+*
+*               DEF_FAIL, Connection refused.
+*
+* Caller(s)   : Secure Layer when establishing a connection.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AppClientCertTrustCallBackFnct (void                             *p_cert_dn,
+                                             NET_SOCK_SECURE_UNTRUSTED_REASON  reason)
+{
+    return (DEF_OK);
+}
+
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/server_secure.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/server_secure.c
new file mode 100644
index 0000000..3915475
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Examples/TLS-SSL/server_secure.c
@@ -0,0 +1,249 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                           TLS/SSL SERVER
+
+*
+* Filename      : server_secure.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) This example show how to create a server using TLS/SSL
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                        /* Certificate-Key pair can be obtained:                                        */
+                                        /*      (1) Generating a self signed certificate using a tool such as OpenSSL.  */
+                                        /*      (2) Purchasing an TLS/SSL certificate from a Certificates authorities.  */
+
+#define APP_CFG_SECURE_CERT                                      \
+"MIIEEjCCAvqgAwIBAgIBBzANBgkqhkiG9w0BAQUFADAaMRgwFgYDVQQDEw9WYWxp\
+Y29yZS1EQzEtQ0EwHhcNMTEwMzE4MTcwMTQyWhcNMjEwMzE1MTcwMTQyWjCBkDEL\
+MAkGA1UEBhMCVVMxCzAJBgNVBAgTAkNBMQ8wDQYDVQQHEwZJcnZpbmUxHjAcBgNV\
+BAoTFVZhbGljb3JlIFRlY2hub2xvZ2llczEhMB8GA1UEAxMYbGFuLWZ3LTAxLnZh\
+bGljb3JlLmxvY2FsMSAwHgYJKoZIhvcNAQkBFhFhZG1pbkBsb2NhbGRvbWFpbjCC\
+ASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBALwGOahytiwshzz1s/ngxy1+\
++VrXZYjKSEzMYbJCUhK9xA5fz8pGtOZIXI+CasZPSbXv+ZDLGpSpeFnOL49plYRs\
+vmTxg2n3AlZbP6pD9OPU8rmufsTvXAmQGxxIkdmWiXYJk0pbj+U698me6DKMV/sy\
+3ekQaQC2I2nr8uQw8RhuNhhlkWyjBWdXnS2mLNLSan2Jnt8rumtAi3B+vF5Vf0Fa\
+kLJNt45R0f5jjuab+qw4PKMZEQbqe0XTNzkxdD0XNRBdKlajffoZPBJ7xkfuKUA3\
+cMjXKzetABoKvsv+ElfvqlrI9RXvTXy52EaQmVhiOyBHrScq4RbwtDQsd59Qmk0C\
+AwEAAaOB6zCB6DAJBgNVHRMEAjAAMBEGCWCGSAGG+EIBAQQEAwIGQDA0BglghkgB\
+hvhCAQ0EJxYlRWFzeS1SU0EgR2VuZXJhdGVkIFNlcnZlciBDZXJ0aWZpY2F0ZTAd\
+BgNVHQ4EFgQUrq5KF11M9rpKm75nAs+MaiK0niYwUQYDVR0jBEowSIAU2Q9eGjzS\
+LZhvlRRKO6c4Q5ATtuChHqQcMBoxGDAWBgNVBAMTD1ZhbGljb3JlLURDMS1DQYIQ\
+T9aBcT0uXoxJmC0ohp7oSTATBgNVHSUEDDAKBggrBgEFBQcDATALBgNVHQ8EBAMC\
+BaAwDQYJKoZIhvcNAQEFBQADggEBAAUMm/9G+mhxVIYK4anc34FMqu88NQy8lrh0\
+loNfHhIEKnerzMz+nQGidf+KBg5K5U2Jo8e9gVnrzz1gh2RtUFvDjgosGIrgYZMN\
+yreNUD2I7sWtuWFQyEuewbs8h2MECs2xVktkqp5KPmJGCYGhXbi+zuqi/19cIsly\
+yS01kmexwcFMXyX4YOVbG+JFHy1b4zFvWgSDULj14AuKfc8RiZNvMRMWR/Jqlpr5\
+xWQRSmkjuzQMFavs7soZ+kHp9vnFtY2D6gF2cailk0sdG0uuyPBVxEJ2meifG6eb\
+o3FQzdtIrB6oMFHEU00P38SJq+mrDItPDRXNLa2Nrtc1EJtmjws="
+
+
+#define APP_CFG_SECURE_KEY                                       \
+"MIIEogIBAAKCAQEAvAY5qHK2LCyHPPWz+eDHLX75WtdliMpITMxhskJSEr3EDl/P\
+yka05khcj4Jqxk9Jte/5kMsalKl4Wc4vj2mVhGy+ZPGDafcCVls/qkP049Tyua5+\
+xO9cCZAbHEiR2ZaJdgmTSluP5Tr3yZ7oMoxX+zLd6RBpALYjaevy5DDxGG42GGWR\
+bKMFZ1edLaYs0tJqfYme3yu6a0CLcH68XlV/QVqQsk23jlHR/mOO5pv6rDg8oxkR\
+Bup7RdM3OTF0PRc1EF0qVqN9+hk8EnvGR+4pQDdwyNcrN60AGgq+y/4SV++qWsj1\
+Fe9NfLnYRpCZWGI7IEetJyrhFvC0NCx3n1CaTQIDAQABAoIBAEbbqbr7j//RwB2P\
+EwZmWWmh4mMDrbYBVYHrvB2rtLZvYYVxQiOexenK92b15TtbAhJYn5qbkCbaPwrJ\
+E09eoQRI3u+3vKigd/cHaFTIS2/Y/qhPRGL/OZY5Ap6EEsMHYkJjlWh+XRosQNlw\
+01zJWxbFsq90ib3E5k+ypdStRQ7JQ9ntvDAP6MDp3DF2RYf22Tpr9t3Oi2mUirOl\
+piOEB55wydSyIhSHusbms3sp2uvQBYJjZP7eENEQz55PebTzl9UF2dgJ0wJFS073\
+rvp46fibcch1L7U6v8iUNaS47GTs3MMyO4zda73ufhYwZLU5gL8oEDY3tf/J8zuC\
+mNurr0ECgYEA8i1GgstYBFSCH4bhd2mLu39UVsIvHaD38mpJE6avCNOUq3Cyz9qr\
+NzewG7RyqR43HsrVqUSQKzlAGWqG7sf+jkiam3v6VW0y05yqDjs+SVW+ZN5CKyn3\
+sMZV0ei4MLrfxWneQaKy/EUTJMlz3rLSDM/hpJoA/gOo9BIFRf2HPkkCgYEAxsGq\
+LYU+ZEKXKehVesh8rIic4QXwzeDmpMF2wTq6GnFq2D4vWPyVGDWdORcIO2BojDWV\
+EZ8e7F2SghbmeTjXGADldYXQiQyt4Wtm+oJ6d+/juKSrQ1HIPzn1qgXDNLPfjd9o\
+9lX5lGlRn49Jrx/kKQAPTcnCa1IirIcsmcdiy+UCgYBEbOBwUi3zQ0Fk0QJhb/Po\
+LSjSPpl7YKDN4JP3NnBcKRPngLc1HU6lElny6gA/ombmj17hLZsia1GeHMg1LVLS\
+NtdgOR5ZBrqGqcwuqzSFGfHqpBXEBl6SludmoL9yHUreh3QhzWuO9aFcEoNnl9Tb\
+g9z4Wf8Pxk71byYISYLt6QKBgERActjo3ZD+UPyCHQBp4m45B246ZQO9zFYdXVNj\
+gE7eTatuR0IOkoBawN++6gPByoUDTWpcsvjF9S6ZAJH2E97ZR/KAfijh4r/66sTx\
+k26mQRPB8FHQvqv/kj3NdsgdUJJeeqPEyEzPkcjyIoJxuB7gN2El/I5wCRon3Qf9\
+sQ6FAoGAfVOaROSAtq/bq9JIL60kkhA9sr3KmX52PnOR2hW0caWi96j+2jlmPT93\
+4A2LIVUo6hCsHLSCFoWWiyX9pIqyYTn5L1EmeBO0+E8BH9F/te9+ZZ53U+quwc/X\
+AZ6Pseyhj7S9wkI5hZ9SO1gcK4rWrAK/UFOIzzlACr5INr723vw="
+
+
+#define  APP_CFG_SECURE_CERT_LEN      (sizeof(APP_CFG_SECURE_CERT) - 1)
+#define  APP_CFG_SECURE_KEY_LEN       (sizeof(APP_CFG_SECURE_KEY)  - 1)
+
+
+
+/*
+*********************************************************************************************************
+*                                            AppServerInit()
+*
+* Description : (1) Initialize server's listen socket to accept only connection over TLS/SSL:
+*
+*                   (a) Open a socket.
+*                   (b) Configure socket's option to be secure.
+*                   (c) Bind.
+*                   (d) Listen.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Socket ID, if no error.
+*
+*               -1,        Otherwise.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  AppServerInit (void)
+{
+    NET_SOCK_ID         sock_id;
+    NET_SOCK_ADDR_IPv4  addr_server_ip;
+    NET_SOCK_ADDR_LEN   addr_len;
+    NET_ERR             err;
+
+
+                                                                /* -------------------- OPEN SOCK --------------------- */
+    sock_id = NetApp_SockOpen(NET_SOCK_ADDR_FAMILY_IP_V4,
+                              NET_SOCK_TYPE_STREAM,
+                              NET_SOCK_PROTOCOL_TCP,
+                              3,
+                              5,
+                              &err);
+    switch (err) {
+        case NET_APP_ERR_NONE:
+             break;
+
+        default:
+             return (-1);
+    }
+
+
+                                                                /* --------------- CFG SOCK SECURE OPT----------------- */
+   (void)NetSock_CfgSecure(sock_id,                             /* First the socket option secure must be set.          */
+                           DEF_YES,
+                          &err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+        default:
+             NetApp_SockClose(sock_id, 1, &err);
+             return (-1);
+    }
+
+
+   (void)NetSock_CfgSecureServerCertKeyInstall(sock_id,         /* Set certificate and key on the socket.               */
+                                               APP_CFG_SECURE_CERT,
+                                               APP_CFG_SECURE_CERT_LEN,
+                                               APP_CFG_SECURE_KEY,
+                                               APP_CFG_SECURE_KEY_LEN,
+                                               NET_SOCK_SECURE_CERT_KEY_FMT_PEM,
+                                               DEF_NO,
+                                              &err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+        default:
+             NetApp_SockClose(sock_id, 1, &err);
+             return (-1);
+    }
+
+
+                                                                /* -------------------- BIND SOCK --------------------- */
+    addr_len = sizeof(addr_server_ip);
+
+    Mem_Set((void *)&addr_server_ip,
+                     0u,
+                     addr_len);
+
+    addr_server_ip.AddrFamily = NET_SOCK_ADDR_FAMILY_IP_V4;
+    addr_server_ip.Port       = NET_UTIL_HOST_TO_NET_16(12345);
+    addr_server_ip.Addr       = NET_UTIL_HOST_TO_NET_32(INADDR_ANY);
+
+   (void)NetApp_SockBind(                  sock_id,
+                         (NET_SOCK_ADDR *)&addr_server_ip,
+                                           addr_len,
+                                           3,
+                                           5,
+                                          &err);
+    switch (err) {
+        case NET_APP_ERR_NONE:
+            break;
+
+        default:
+            NetApp_SockClose(sock_id, 1, &err);
+            return (-1);
+    }
+
+
+                                                                /* ------------------- LISTEN SOCK -------------------- */
+   (void)NetApp_SockListen(sock_id, 1, &err);
+    switch(err) {
+        case NET_APP_ERR_NONE:
+             break;
+
+        default:
+            NetApp_SockClose(sock_id, 1, &err);
+            return (-1);
+    }
+
+    /* Now all socket returned from accept() will use TLS/SSL.  */
+    /* So all the data transfered on child socket is encrypted. */
+    /* You just have to use any socket API such as :            */
+    /*      NetApp_Accept(), NetApp_Rx(), NetApp_Tx().          */
+
+
+    return (sock_id);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/Template/net_fs_template.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/Template/net_fs_template.c
new file mode 100644
index 0000000..cb348a4
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/Template/net_fs_template.c
@@ -0,0 +1,1052 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NETWORK FILE SYSTEM PORT LAYER
+*
+*                                              TEMPLATE
+*
+* Filename      : net_fs_template.c
+* Version       : V3.04.02
+* Programmer(s) : FBJ
+*                 SL
+*                 BAN
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/FS  V4.03
+*                     (b) uC/Clk V3.09          if uC/FS V4.04 (or more recent) is included
+*
+*                 (2) Should be compatible with the following TCP/IP application versions (or more recent):
+*
+*                     (a) uC/FTPc  V1.93.01
+*                     (b) uC/FTPs  V1.95.02
+*                     (c) uC/HTTPs V1.98.00
+*                     (d) uC/TFTPc V1.92.01
+*                     (e) uC/TFTPs V1.91.02
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    NET_FS_TEMPLATE_MODULE
+#include  "..\net_fs.h"
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetFS_WorkingFolderGet(CPU_CHAR    *p_path,
+                                            CPU_SIZE_T   path_len_max);
+
+static  CPU_BOOLEAN  NetFS_WorkingFolderSet(CPU_CHAR    *p_path);
+
+
+/*
+*********************************************************************************************************
+*                                           FILE SYSTEM API
+*
+* Note(s) : (1) File system API structures are used by network applications during calls.  This API structure
+*               allows network application to call specific file system functions via function pointer instead
+*               of by name.  This enables the network application suite to compile & operate with multiple
+*               file system.
+*
+*           (2) In most cases, the API structure provided below SHOULD suffice for most network application
+*               exactly as is with the exception that the API structure's name which MUST be unique &
+*               SHOULD clearly identify the file system being implemented.  For example, the Micrium file system
+*               V4's API structure should be named NetFS_API_FS_V4[].
+*
+*               The API structure MUST also be externally declared in the File system port header file
+*               ('net_fs_&&&.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+                                                                        /* Net FS static API fnct ptrs :                */
+const  NET_FS_API  NetFS_API_Template = {
+                                          NetFS_CfgPathGetLenMax,       /*   Path max len.                              */
+                                          NetFS_CfgPathGetSepChar,      /*   Path sep char.                             */
+                                          NetFS_FileOpen,               /*   Open                                       */
+                                          NetFS_FileClose,              /*   Close                                      */
+                                          NetFS_FileRd,                 /*   Rd                                         */
+                                          NetFS_FileWr,                 /*   Wr                                         */
+                                          NetFS_FilePosSet,             /*   Set position                               */
+                                          NetFS_FileSizeGet,            /*   Get size                                   */
+                                          NetFS_DirOpen,                /*   Open  dir                                  */
+                                          NetFS_DirClose,               /*   Close dir                                  */
+                                          NetFS_DirRd,                  /*   Rd    dir                                  */
+                                          NetFS_EntryCreate,            /*   Entry create                               */
+                                          NetFS_EntryDel,               /*   Entry del                                  */
+                                          NetFS_EntryRename,            /*   Entry rename                               */
+                                          NetFS_EntryTimeSet,           /*   Entry set time                             */
+                                          NetFS_FileDateTimeCreateGet,  /*   Create date time                           */
+                                          NetFS_WorkingFolderGet,       /*   Get working folder                         */
+                                          NetFS_WorkingFolderSet,       /*   Set working folder                         */
+                                        };
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          NetFS_CfgPathGetLenMax()
+*
+* Description : Get maximum path lenght
+*
+* Argument(s) : none.
+*
+* Return(s)   : maximum path len.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetFS_CfgPathGetLenMax (void)
+{
+    /* $$$$ Insert code to return the maximum path length. */
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetFS_CfgPathGetSepChar()
+*
+* Description : Get path separator character
+*
+* Argument(s) : none.
+*
+* Return(s)   : separator charater.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_CHAR  NetFS_CfgPathGetSepChar (void)
+{
+    /* $$$$ Insert code to return the path separator character. */
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         DIRECTORY FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          NetFS_DirOpen()
+*
+* Description : Open a directory.
+*
+* Argument(s) : pname       Name of the directory.
+*
+* Return(s)   : Pointer to a directory, if NO errors.
+*               Pointer to NULL,        otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *NetFS_DirOpen (CPU_CHAR  *pname)
+{
+    void  *pdir;
+
+
+    /* $$$$ Insert code to open a directory.    */
+    pdir = (void *)0;
+
+    return (pdir);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetFS_DirClose()
+*
+* Description : Close a directory.
+*
+* Argument(s) : pdir        Pointer to a directory.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetFS_DirClose (void  *pdir)
+{
+    /* $$$$ Insert code to close a directory.   */
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_DirRd()
+*
+* Description : Read a directory entry from a directory.
+*
+* Argument(s) : pdir        Pointer to a directory.
+*
+*               pentry      Pointer to variable that will receive directory entry information.
+*
+* Return(s)   : DEF_OK,   if directory entry read.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_DirRd (void          *pdir,
+                          NET_FS_ENTRY  *pentry)
+{
+    /* $$$$ Insert code to read entry from a directory.     */
+
+
+    /* $$$$ Insert code to populate pentry.                 */
+
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           ENTRY FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        NetFS_EntryCreate()
+*
+* Description : Create a file or directory.
+*
+* Argument(s) : pname       Name of the entry.
+*
+*               dir         Indicates whether the new entry shall be a directory :
+*
+*                               DEF_YES, if the entry shall be a directory.
+*                               DEF_NO,  if the entry shall be a file.
+*
+* Return(s)   : DEF_OK,   if entry created.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_EntryCreate (CPU_CHAR     *pname,
+                                CPU_BOOLEAN   dir)
+{
+    /* $$$$ Insert code to create a file or a directory.    */
+
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetFS_EntryDel()
+*
+* Description : Delete a file or directory.
+*
+* Argument(s) : pname       Name of the entry.
+*
+*               file        Indicates whether the entry MAY be a file :
+*
+*                               DEF_YES, if the entry may     be a file.
+*                               DEF_NO,  if the entry may NOT be a file.
+*
+* Return(s)   : DEF_OK,   if entry created.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_EntryDel (CPU_CHAR     *pname,
+                             CPU_BOOLEAN   file)
+{
+    /* $$$$ Insert code to delete a file or a directory.    */
+
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetFS_EntryRename()
+*
+* Description : Rename a file or directory.
+*
+* Argument(s) : pname_old   Old path of the entry.
+*
+*               pname_new   New path of the entry.
+*
+* Return(s)   : DEF_OK,   if entry renamed.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_EntryRename (CPU_CHAR  *pname_old,
+                                CPU_CHAR  *pname_new)
+{
+    /* $$$$ Insert code to rename a file or a directory.    */
+
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetFS_EntryTimeSet()
+*
+* Description : Set a file or directory's date/time.
+*
+* Argument(s) : pname       Name of the entry.
+*
+*               ptime       Pointer to date/time.
+*
+* Return(s)   : DEF_OK,   if date/time set.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_EntryTimeSet (CPU_CHAR           *pname,
+                                 NET_FS_DATE_TIME  *ptime)
+{
+    /* $$$$ Insert code to set a file or directory's date/time.     */
+
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           FILE FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         NetFS_FileOpen()
+*
+* Description : Open a file.
+*
+* Argument(s) : pname       Name of the file.
+*
+*               mode        Mode of the file :
+*
+*                               NetFS_FILE_MODE_APPEND        Open existing file at end-of-file OR create new file.
+*                               NetFS_FILE_MODE_CREATE        Create new file OR overwrite existing file.
+*                               NetFS_FILE_MODE_CREATE_NEW    Create new file OR return error if file exists.
+*                               NetFS_FILE_MODE_OPEN          Open existing file.
+*                               NetFS_FILE_MODE_TRUNCATE      Truncate existing file to zero length.
+*
+*               access      Access rights of the file :
+*
+*                               NetFS_FILE_ACCESS_RD          Open file in read           mode.
+*                               NetFS_FILE_ACCESS_RD_WR       Open file in read AND write mode.
+*                               NetFS_FILE_ACCESS_WR          Open file in          write mode
+*
+* Return(s)   : Pointer to a file, if NO errors.
+*               Pointer to NULL,   otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *NetFS_FileOpen (CPU_CHAR            *pname,
+                       NET_FS_FILE_MODE     mode,
+                       NET_FS_FILE_ACCESS   access)
+{
+    /* $$$$ Insert code to open a file.     */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetFS_FileClose()
+*
+* Description : Close a file.
+*
+* Argument(s) : pfile       Pointer to a file.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetFS_FileClose (void  *pfile)
+{
+    /* $$$$ Insert code to close a file.    */
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetFS_FileRd()
+*
+* Description : Read from a file.
+*
+* Argument(s) : pfile       Pointer to a file.
+*
+*               pdest       Pointer to destination buffer.
+*
+*               size        Number of octets to read.
+*
+*               psize_rd    Pointer to variable that will receive the number of octets read.
+*
+* Return(s)   : DEF_OK,   if no error occurred during read (see Note #1).
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) If the read request could not be fulfilled because the EOF was reached, the return
+*                   value should be 'DEF_OK'.  The application should compare the value in 'psize_rd' to
+*                   the value passed to 'size' to detect an EOF reached condition.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_FileRd (void        *pfile,
+                           void        *pdest,
+                           CPU_SIZE_T   size,
+                           CPU_SIZE_T  *psize_rd)
+{
+    /* $$$$ Insert code to read from a file.    */
+
+
+   *psize_rd = 0;
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetFS_FileWr()
+*
+* Description : Write to a file.
+*
+* Argument(s) : pfile       Pointer to a file.
+*
+*               psrc        Pointer to source buffer.
+*
+*               size        Number of octets to write.
+*
+*               psize_wr    Pointer to variable that will receive the number of octets written.
+*
+* Return(s)   : DEF_OK,   if no error occurred during write.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_FileWr (void        *pfile,
+                           void        *psrc,
+                           CPU_SIZE_T   size,
+                           CPU_SIZE_T  *psize_wr)
+{
+    /* $$$$ Insert code to write to a file.     */
+
+
+   *psize_wr = 0;
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetFS_FilePosSet()
+*
+* Description : Set file position indicator.
+*
+* Argument(s) : pfile       Pointer to a file.
+*
+*               offset      Offset from the file position specified by 'origin'.
+*
+*               origin      Reference position for offset :
+*
+*                               NetFS_SEEK_ORIGIN_START    Offset is from the beginning of the file.
+*                               NetFS_SEEK_ORIGIN_CUR      Offset is from current file position.
+*                               NetFS_SEEK_ORIGIN_END      Offset is from the end       of the file.
+*
+* Return(s)   : DEF_OK,   if file position set.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_FilePosSet (void        *pfile,
+                               CPU_INT32S   offset,
+                               CPU_INT08U   origin)
+{
+    /* $$$$ Insert code to set file position indicator.     */
+
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetFS_FileSizeGet()
+*
+* Description : Get file size.
+*
+* Argument(s) : pfile       Pointer to a file.
+*
+*               psize       Pointer to variable that will receive the file size.
+*
+* Return(s)   : DEF_OK,   if file size gotten.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_FileSizeGet (void        *pfile,
+                                CPU_INT32U  *psize)
+{
+    /* $$$$ Insert code to get file size.     */
+
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetFS_FileDateTimeCreateGet()
+*
+* Description : Get file creation date/time.
+*
+* Argument(s) : pfile       Pointer to a file.
+*
+*               ptime       Pointer to variable that will receive the date/time :
+*
+*                               Default/epoch date/time,        if any error(s);
+*                               Current       date/time,        otherwise.
+*
+* Return(s)   : DEF_OK,   if file creation date/time gotten.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_FileDateTimeCreateGet (void               *pfile,
+                                          NET_FS_DATE_TIME  *ptime)
+{
+    /* $$$$ Insert code to get file time of creation.     */
+
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetFS_WorkingFolderGet()
+*
+* Description : Get current working folder.
+*
+* Argument(s) : p_path  String buffer that will receive the working directory path.
+*
+* Return(s)   : DEF_OK,   if file creation date/time gotten.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetFS_WorkingFolderGet (CPU_CHAR    *p_path,
+                                             CPU_SIZE_T   path_len_max)
+{
+    /* $$$$ Insert code to get the working folder.      */
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetFS_WorkingFolderSet()
+*
+* Description : Set current working folder.
+*
+* Argument(s) : p_path  String that specifies EITHER...
+*                           (a) the absolute working directory path to set;
+*                           (b) a relative path that will be applied to the current working directory.
+*
+* Return(s)   : DEF_OK,   if file creation date/time gotten.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetFS_WorkingFolderSet (CPU_CHAR    *p_path)
+{
+    /* $$$$ Insert code to set the working folder.  */
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_fopen()
+*
+* Description : Open a file.
+*
+* Argument(s) : name_full   Name of the file.
+*
+*               str_mode    Access mode of the file (see Note #1a).
+*
+* Return(s)   : Pointer to a file, if NO errors.
+*               Pointer to NULL,   otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'fopen() : DESCRIPTION' states that :
+*
+*                   (a) "If ['str_mode'] is one of the following, the file is open in the indicated mode." :
+*
+*                           "r or rb           Open file for reading."
+*                           "w or wb           Truncate to zero length or create file for writing."
+*                           "a or ab           Append; open and create file for writing at end-of-file."
+*                           "r+ or rb+ or r+b  Open file for update (reading and writing)."
+*                           "w+ or wb+ or w+b  Truncate to zero length or create file for update."
+*                           "a+ or ab+ or a+b  Append; open or create for update, writing at end-of-file.
+*
+*                   (b) "The character 'b' shall have no effect"
+*
+*                   (c) "Opening a file with read mode ... shall fail if the file does not exist or
+*                        cannot be read"
+*
+*                   (d) "Opening a file with append mode ... shall cause all subsequent writes to the
+*                        file to be forced to the then current end-of-file"
+*
+*                   (e) "When a file is opened with update mode ... both input and output may be performed....
+*                        However, the application shall ensure that output is not directly followed by
+*                        input without an intervening call to 'fflush()' or to a file positioning function
+*                      ('fseek()', 'fsetpos()', or 'rewind()'), and input is not directly followed by output
+*                        without an intervening call to a file positioning function, unless the input
+*                        operation encounters end-of-file."
+*
+*               (2) IEEE Std 1003.1, 2004 Edition, Section 'fopen() : RETURN VALUE' states that "[u]pon
+*                   successful completion 'fopen()' shall return a pointer to the object controlling the
+*                   stream.  Otherwise a null pointer shall be returned'.
+*********************************************************************************************************
+*/
+
+void  *NetFS_fopen (const  char  *name_full,
+                    const  char  *str_mode)
+{
+    /* $$$$ Insert code to open a file. */
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_fseek()
+*
+* Description : Set file position indicator.
+*
+* Argument(s) : p_file      Pointer to a file.
+*
+*               offset      Offset from file position specified by 'whence'.
+*
+*               origin      Reference position for offset :
+*
+*                               FS_SEEK_SET    Offset is from the beginning of the file.
+*                               FS_SEEK_CUR    Offset is from current file position.
+*                               FS_SEEK_END    Offset is from the end       of the file.
+*
+* Return(s)   :  0, if the function succeeds.
+*               -1, otherwise.
+*
+* Caller(s)   : Application,
+*               fs_rewind().
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'fread() : DESCRIPTION' states that :
+*
+*                   (a) "If a read or write error occurs, the error indicator for the stream shall be set"
+*
+*                   (b) "The new position measured in bytes from the beginning of the file, shall be
+*                        obtained by adding 'offset' to the position specified by 'whence'. The specified
+*                        point is ..."
+*
+*                       (1) "... the beginning of the file                        for SEEK_SET"
+*
+*                       (2) "... the current value of the file-position indicator for SEEK_CUR"
+*
+*                       (3) "... end-of-file                                      for SEEK_END"
+*
+*                   (c) "A successful call to 'fseek()' shall clear the end-of-file indicator"
+*
+*                   (d) "The 'fseek()' function shall allow the file-position indicator to be set beyond
+*                        the end of existing data in the file.  If data is later written at this point,
+*                        subsequent reads of data in the gap shall return bytes with the value 0 until
+*                        data is actually written into the gap."
+*
+*               (2) IEEE Std 1003.1, 2004 Edition, Section 'fread() : RETURN VALUE' states that "[t]he
+*                   'fseek()' and 'fseeko()' functions shall return 0 if they succeeds.  Otherwise, they
+*                   shall return -1".
+*
+*               (3) If the file position indicator is set beyond the file's current data, the file MUST
+*                   be opened in write or read/write mode.
+*********************************************************************************************************
+*/
+
+int  NetFS_fseek (void       *p_file,
+                  long  int   offset,
+                  int         origin)
+{
+    /* $$$$ Insert code to set file position indicator. */
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_ftell()
+*
+* Description : Get file position indicator.
+*
+* Argument(s) : p_file     Pointer to a file.
+*
+* Return(s)   : The current file system position, if the function succeeds.
+*               -1,                               otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'ftell() : RETURN VALUE' states that :
+*
+*                   (a) "Upon successful completion, 'ftell()' and 'ftello()' shall return the current
+*                        value of the file-position indicator for the stream measured in bytes from the
+*                        beginning of the file."
+*
+*                   (b) "Otherwise, 'ftell()' and 'ftello()' shall return -1, cast to 'long' and 'off_t'
+*                        respectively, and set errno to indicate the error."
+*
+*               (2) #### Check for overflow in cast.
+*********************************************************************************************************
+*/
+
+long  int  NetFS_ftell (void  *p_file)
+{
+    /* $$$$ Insert code to get file position indicator. */
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_rewind()
+*
+* Description : Reset file position indicator of a file.
+*
+* Argument(s) : p_file      Pointer to a file.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'rewind() : DESCRIPTION' states that :
+*
+*                       "[T]he call 'rewind(stream)' shall be equivalent to '(void)fseek(stream, 0L, SEEK_SET)'
+*                        except that 'rewind()' shall also clear the error indicator."
+*********************************************************************************************************
+*/
+
+
+void  NetFS_rewind (void  *p_file)
+{
+    /* $$$$ Insert code to reset file position indicator of a file. */
+}
+
+
+/*
+*********************************************************************************************************
+*                                             fs_fread()
+*
+* Description : Read from a file.
+*
+* Argument(s) : p_dest       Pointer to destination buffer.
+*
+*               size        Size of each item to read.
+*
+*               nitems      Number of items to read.
+*
+*               p_file      Pointer to a file.
+*
+* Return(s)   : Number of items read.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'fread() : DESCRIPTION' states that :
+*
+*                   (a) "The 'fread()' function shall read into the array pointed to by 'ptr' up to 'nitems'
+*                        elements whose size is specified by 'size' in bytes"
+*
+*                   (b) "The file position indicator for the stream ... shall be advanced by the number of
+*                        bytes successfully read"
+*
+*               (2) IEEE Std 1003.1, 2004 Edition, Section 'fread() : RETURN VALUE' states that "[u]pon
+*                   completion, 'fread()' shall return the number of elements which is less than 'nitems'
+*                   only if a read error or end-of-file is encountered".
+*
+*               (3) See 'fs_fopen()  Note #1e'.
+*
+*               (4) The file MUST have been opened in read or update (read/write) mode.
+*
+*               (5) If an error occurs while reading from the file, a value less than 'nitems' will
+*                   be returned.  To determine whether the premature return was caused by reaching the
+*                   end-of-file, the 'fs_feof()' function should be used :
+*
+*                       rtn = fs_fread(pbuf, 1, 1000, pfile);
+*                       if (rtn < 1000) {
+*                           eof = fs_feof();
+*                           if (eof != 0) {
+*                               // File has reached EOF
+*                           } else {
+*                               // Error has occurred
+*                           }
+*                       }
+*
+*               (6) #### Check for multiplication overflow.
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  NetFS_fread ( void          *p_dest,
+                          CPU_SIZE_T     size,
+                          CPU_SIZE_T     nitems,
+                          void          *p_file)
+{
+    /* $$$$ Insert code to read from a file.    */
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_fwrite()
+*
+* Description : Write to a file.
+*
+* Argument(s) : p_src       Pointer to source buffer.
+*
+*               size        Size of each item to write.
+*
+*               nitems      Number of items to write.
+*
+*               p_file      Pointer to a file.
+*
+* Return(s)   : Number of items written.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'fwrite() : DESCRIPTION' states that :
+*
+*                   (a) "The 'fwrite()' function shall write, from the array pointed to by 'ptr', up to
+*                       'nitems' elements whose size is specified by 'size', to the stream pointed to by
+*                       'stream'"
+*
+*                   (b) "The file position indicator for the stream ... shall be advanced by the number of
+*                        bytes successfully written"
+*
+*               (2) IEEE Std 1003.1, 2004 Edition, Section 'fwrite() : RETURN VALUE' states that
+*                   "'fwrite()' shall return the number of elements successfully written, which may be
+*                   less than 'nitems' if a write error is encountered".
+*
+*               (3) See 'fs_fopen()  Notes #1d & #1e'.
+*
+*               (4) The file MUST have been opened in write or update (read/write) mode.
+*
+*               (5) #### Check for multiplication overflow.
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  NetFS_fwrite (const   void          *p_src,
+                                  CPU_SIZE_T     size,
+                                  CPU_SIZE_T     nitems,
+                                  void          *p_file)
+{
+    /* $$$$ Insert code to write to a file.     */
+}
+
+/*
+*********************************************************************************************************
+*                                           NetFS_fclose()
+*
+* Description : Close & free a file.
+*
+* Argument(s) : p_file      Pointer to a file.
+*
+* Return(s)   : 0,      if the file was successfully closed.
+*               FS_EOF, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) After a file is closed, the application MUST desist from accessing its file pointer.
+*                   This could cause file system corruption, since this handle may be re-used for a
+*                   different file.
+*
+*               (2) (a) If the most recent operation is output (write), all unwritten data is written
+*                       to the file.
+*
+*                   (b) Any buffer assigned with 'fs_setbuf()' or 'fs_setvbuf()' shall no longer be
+*                       accessed by the file system & may be re-used by the application.
+*********************************************************************************************************
+*/
+
+int  NetFS_fclose  (void  *p_file)
+{
+    /* $$$$ Insert code to close & free a file. */
+}
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/Template/net_fs_template.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/Template/net_fs_template.h
new file mode 100644
index 0000000..6aba6ca
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/Template/net_fs_template.h
@@ -0,0 +1,112 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NETWORK FILE SYSTEM PORT LAYER
+*
+*                                              TEMPLATE
+*
+* Filename      : net_fs_template.h
+* Version       : V3.04.02
+* Programmer(s) : FBJ
+*                 SL
+*                 BAN
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/FS  V4.03
+*                     (b) uC/Clk V3.09          if uC/FS V4.04 (or more recent) is included
+*
+*                 (2) Should be compatible with the following TCP/IP application versions (or more recent):
+*
+*                     (a) uC/FTPc  V1.93.01
+*                     (b) uC/FTPs  V1.95.02
+*                     (c) uC/HTTPs V1.98.00
+*                     (d) uC/TFTPc V1.92.01
+*                     (e) uC/TFTPs V1.91.02
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_FS_V4_MODULE_PRESENT
+#define  NET_FS_V4_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_FS_API  NetFS_API_Template;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of net fs template module include.               */
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/net_fs.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/net_fs.h
new file mode 100644
index 0000000..fd67079
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/net_fs.h
@@ -0,0 +1,398 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                NETWORK FILE SYSTEM PORT HEADER FILE
+*
+* Filename      : net_fs.h
+* Version       : V3.04.02
+* Programmer(s) : FBJ
+* *               AA
+*                 SL
+*                 BAN
+*********************************************************************************************************
+* Note(s)       : (1) Network File System (API) Layer module is required for :
+*
+*                     (a) Applications that require network application programming interface (API) :
+*                         (1) Network socket API with error handling
+*                         (2) Network time delays
+*
+*                 (2) Should be compatible with the following TCP/IP application versions (or more recent):
+*
+*                     (a) uC/FTPc  V1.93.02
+*                     (b) uC/FTPs  V1.95.03
+*                     (c) uC/HTTPs V1.98.01
+*                     (d) uC/TFTPc V1.92.02
+*                     (e) uC/TFTPs V1.91.03
+*                     (f) Mocana NanoSSL V5.5
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_FS_PRESENT
+#define  NET_FS_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   NET_FS_MODULE
+#define  NET_FS_EXT
+#else
+#define  NET_FS_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifndef  NET_FS_CFG_ARG_CHK_EXT_EN
+#define  NET_FS_CFG_ARG_CHK_EXT_EN     DEF_DISABLED
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_FS_PATH_SEP_CHAR                    ASCII_CHAR_REVERSE_SOLIDUS
+
+#define  NET_FS_MAX_FILE_NAME_LEN                NET_FS_CFG_MAX_FILE_NAME_LEN
+#define  NET_FS_MAX_PATH_NAME_LEN                NET_FS_CFG_MAX_PATH_NAME_LEN
+
+#define  NET_FS_SEEK_ORIGIN_START                         1u    /* Origin is beginning of file.                         */
+#define  NET_FS_SEEK_ORIGIN_CUR                           2u    /* Origin is current file position.                     */
+#define  NET_FS_SEEK_ORIGIN_END                           3u    /* Origin is end of file.                               */
+
+#define  NET_FS_ENTRY_ATTRIB_RD                  DEF_BIT_00     /* Entry is readable.                                   */
+#define  NET_FS_ENTRY_ATTRIB_WR                  DEF_BIT_01     /* Entry is writeable.                                  */
+#define  NET_FS_ENTRY_ATTRIB_HIDDEN              DEF_BIT_02     /* Entry is hidden from user-level processes.           */
+#define  NET_FS_ENTRY_ATTRIB_DIR                 DEF_BIT_03     /* Entry is a directory.                                */
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        DATE / TIME DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  net_fs_date_time {
+    CPU_INT16U         Sec;                                     /* Seconds [0..60].                                     */
+    CPU_INT16U         Min;                                     /* Minutes [0..59].                                     */
+    CPU_INT16U         Hr;                                      /* Hour [0..23].                                        */
+    CPU_INT16U         Day;                                     /* Day of month [1..31].                                */
+    CPU_INT16U         Month;                                   /* Month of year [1..12].                               */
+    CPU_INT16U         Yr;                                      /* Year [0, ..., 2000, 2001, ...].                      */
+} NET_FS_DATE_TIME;
+
+/*
+*********************************************************************************************************
+*                                           ENTRY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  net_fs_entry {
+    CPU_INT16U         Attrib;                                  /* Entry attributes.                                    */
+    CPU_INT32U         Size;                                    /* File size in octets.                                 */
+    NET_FS_DATE_TIME   DateTimeCreate;                          /* Date/time of creation.                               */
+    CPU_CHAR          *NamePtr;                                 /* Name.                                                */
+} NET_FS_ENTRY;
+
+
+/*
+*********************************************************************************************************
+*                                              FILE MODES
+*********************************************************************************************************
+*/
+
+typedef  enum  net_fs_file_mode {                               /* File modes. See NetFS_FileOpen() note #1.            */
+    NET_FS_FILE_MODE_NONE,
+    NET_FS_FILE_MODE_APPEND,
+    NET_FS_FILE_MODE_CREATE,
+    NET_FS_FILE_MODE_CREATE_NEW,
+    NET_FS_FILE_MODE_OPEN,
+    NET_FS_FILE_MODE_TRUNCATE
+} NET_FS_FILE_MODE;
+
+
+/*
+*********************************************************************************************************
+*                                              FILE ACCESS
+*********************************************************************************************************
+*/
+
+typedef  enum  net_fs_file_access {                            /* File access. See NetFS_FileOpen() note #2.            */
+    NET_FS_FILE_ACCESS_RD,
+    NET_FS_FILE_ACCESS_RD_WR,
+    NET_FS_FILE_ACCESS_WR
+} NET_FS_FILE_ACCESS;
+
+
+/*
+*********************************************************************************************************
+*                                               FS API
+*********************************************************************************************************
+*/
+
+                                                                        /* ---------------- NET FS API ---------------- */
+                                                                        /* Net FS API fnct ptrs :                       */
+typedef  struct  net_fs_api {
+                                                                        /* ------- GENERIC  NET FS API MEMBERS -------- */
+    CPU_INT32U    (*CfgPathGetLenMax)   (void);                         /*   Get path maximum length.                   */
+
+    CPU_CHAR      (*CfgPathGetSepChar)  (void);                         /*   Get path separator character.              */
+
+                                                                        /*   Open file                                  */
+    void         *(*Open)               (CPU_CHAR            *p_name,
+                                         NET_FS_FILE_MODE     mode,
+                                         NET_FS_FILE_ACCESS   access);
+
+                                                                        /*   Close file.                                */
+    void          (*Close)              (void                *p_file);
+
+                                                                        /*   Read file.                                 */
+    CPU_BOOLEAN   (*Rd)                 (void                *p_file,
+                                         void                *p_dest,
+                                         CPU_SIZE_T           size,
+                                         CPU_SIZE_T          *p_size_rd);
+
+                                                                        /*   Write file.                                */
+    CPU_BOOLEAN   (*Wr)                 (void                *p_file,
+                                         void                *p_src,
+                                         CPU_SIZE_T           size,
+                                         CPU_SIZE_T          *p_size_wr);
+
+                                                                        /*   Set file position.                         */
+    CPU_BOOLEAN   (*SetPos)             (void                *p_file,
+                                         CPU_INT32S           offset,
+                                         CPU_INT08U           origin);
+
+                                                                        /*   Get file size.                             */
+    CPU_BOOLEAN   (*GetSize)            (void                *p_file,
+                                         CPU_INT32U          *p_size);
+
+                                                                        /*   Open directory.                            */
+    void         *(*DirOpen)            (CPU_CHAR            *p_name);
+
+                                                                        /*   Close directory.                           */
+    void          (*DirClose)           (void                *p_dir);
+
+                                                                        /*   Read directory.                            */
+    CPU_BOOLEAN   (*DirRd)              (void                *p_dir,
+                                         NET_FS_ENTRY        *p_entry);
+
+                                                                        /*   Entry create.                              */
+    CPU_BOOLEAN   (*EntryCreate)        (CPU_CHAR            *p_name,
+                                         CPU_BOOLEAN          dir);
+
+                                                                        /*   Entry delete.                              */
+    CPU_BOOLEAN   (*EntryDel)           (CPU_CHAR            *p_name,
+                                         CPU_BOOLEAN          file);
+
+                                                                        /*   Entry rename.                              */
+    CPU_BOOLEAN   (*EntryRename)        (CPU_CHAR            *p_name_old,
+                                         CPU_CHAR            *p_name_new);
+
+                                                                        /*   Entry time set.                            */
+    CPU_BOOLEAN   (*EntryTimeSet)       (CPU_CHAR            *p_name,
+                                         NET_FS_DATE_TIME    *p_time);
+
+                                                                        /*   Create a date time.                        */
+    CPU_BOOLEAN   (*DateTimeCreate)     (void                *p_file,
+                                         NET_FS_DATE_TIME    *p_time);
+
+                                                                        /*   Get working folder.                        */
+    CPU_BOOLEAN   (*WorkingFolderGet)   (CPU_CHAR            *p_path,
+                                         CPU_SIZE_T           path_len_max);
+
+                                                                        /*   Set working folder.                        */
+    CPU_BOOLEAN   (*WorkingFolderSet)   (CPU_CHAR            *p_path);
+} NET_FS_API;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+                                                                              /* ------------- CFG FNCTS ------------ */
+CPU_INT32U    NetFS_CfgPathGetLenMax     (void);
+
+CPU_CHAR      NetFS_CfgPathGetSepChar    (void);
+
+                                                                              /* ------------- DIR FNCTS ------------ */
+void         *NetFS_DirOpen              (CPU_CHAR             *p_name);      /* Open  directory.                     */
+
+void          NetFS_DirClose             (void                 *p_dir);       /* Close directory.                     */
+
+CPU_BOOLEAN   NetFS_DirRd                (void                 *p_dir,        /* Read entry from directory.           */
+                                          NET_FS_ENTRY         *p_entry);
+
+
+                                                                              /* ----------- ENTRY FNCTS ------------ */
+CPU_BOOLEAN   NetFS_EntryCreate          (CPU_CHAR             *p_name,       /* Create file or directory.            */
+                                          CPU_BOOLEAN           dir);
+
+CPU_BOOLEAN   NetFS_EntryDel             (CPU_CHAR             *p_name,       /* Delete file or directory.            */
+                                          CPU_BOOLEAN           file);
+
+CPU_BOOLEAN   NetFS_EntryRename          (CPU_CHAR             *p_name_old,   /* Rename file or directory.            */
+                                          CPU_CHAR             *p_name_new);
+
+CPU_BOOLEAN   NetFS_EntryTimeSet         (CPU_CHAR             *p_name,       /* Set a  file or directory's date/time.*/
+                                          NET_FS_DATE_TIME     *p_time);
+
+
+                                                                              /* ------------ FILE FNCTS ------------ */
+void         *NetFS_FileOpen             (CPU_CHAR             *p_name,       /* Open  file.                          */
+                                          NET_FS_FILE_MODE      mode,
+                                          NET_FS_FILE_ACCESS    access);
+
+void          NetFS_FileClose            (void                 *p_file);      /* Close file.                          */
+
+
+CPU_BOOLEAN   NetFS_FileRd               (void                 *p_file,       /* Read from file.                      */
+                                          void                 *p_dest,
+                                          CPU_SIZE_T            size,
+                                          CPU_SIZE_T           *p_size_rd);
+
+CPU_BOOLEAN   NetFS_FileWr               (void                 *p_file,       /* Write to  file.                      */
+                                          void                 *p_src,
+                                          CPU_SIZE_T            size,
+                                          CPU_SIZE_T           *p_size_wr);
+
+CPU_BOOLEAN   NetFS_FilePosSet           (void                 *p_file,       /* Set file position.                   */
+                                          CPU_INT32S            offset,
+                                          CPU_INT08U            origin);
+
+CPU_INT32U    NetFS_FilePosGet           (void                 *pfile,
+                                          CPU_BOOLEAN          *p_err);
+
+CPU_BOOLEAN   NetFS_FileSizeGet          (void                 *p_file,       /* Get file size.                       */
+                                          CPU_INT32U           *p_size);
+
+CPU_BOOLEAN   NetFS_FileDateTimeCreateGet(void                 *p_file,       /* Get file creation date.              */
+                                          NET_FS_DATE_TIME     *p_time);
+
+
+                                                                              /* ---------- STD POSIX API ----------- */
+void         *NetFS_fopen                (const  char          *name_full,    /* Open a file.                         */
+                                          const  char          *str_mode);
+
+int           NetFS_fseek                (       void          *p_file,       /* Set file position indicator.         */
+                                                 long  int      offset,
+                                                 int            origin);
+
+long  int     NetFS_ftell               (        void          *p_file);      /* Get file position indicator.         */
+
+void          NetFS_rewind              (        void          *p_file);      /* Reset file position indicator.       */
+
+CPU_SIZE_T    NetFS_fread               (        void          *p_dest,       /* Read from a file.                    */
+                                                 CPU_SIZE_T     size,
+                                                 CPU_SIZE_T     nitems,
+                                                 void          *p_file);
+
+CPU_SIZE_T    NetFS_fwrite              (const   void          *p_src,        /* Write to a file.                     */
+                                                 CPU_SIZE_T     size,
+                                                 CPU_SIZE_T     nitems,
+                                                 void          *p_file);
+
+int           NetFS_fclose              (        void          *p_file);      /* Close & free a file.                 */
+
+
+/*
+*********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if    ((NET_FS_CFG_ARG_CHK_EXT_EN != DEF_DISABLED) && \
+        (NET_FS_CFG_ARG_CHK_EXT_EN != DEF_ENABLED ))
+#error  "NET_FS_CFG_ARG_CHK_EXT_EN       illegally #define'd in 'app_cfg.h'"
+#error  "                                [MUST be  DEF_DISABLED]           "
+#error  "                                [     ||  DEF_ENABLED ]           "
+#endif
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of Apps FS module include.                       */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/uC-FS-V4/net_fs_v4.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/uC-FS-V4/net_fs_v4.c
new file mode 100644
index 0000000..ecc02c8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/uC-FS-V4/net_fs_v4.c
@@ -0,0 +1,1701 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NETWORK FILE SYSTEM PORT LAYER
+*
+*                                             uC/FS V4.xx
+*
+* Filename      : net_fs_v4.c
+* Version       : V3.04.02
+* Programmer(s) : FBJ
+*                 SL
+*                 BAN
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/FS  V4.03
+*                     (b) uC/Clk V3.09          if uC/FS V4.04 (or more recent) is included
+*
+*                 (2) Should be compatible with the following TCP/IP application versions (or more recent):
+*
+*                     (a) uC/FTPc  V1.93.01
+*                     (b) uC/FTPs  V1.95.02
+*                     (c) uC/HTTPs V1.98.00
+*                     (d) uC/TFTPc V1.92.01
+*                     (e) uC/TFTPs V1.91.02
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    NET_FS_V4_MODULE
+#include  "net_fs_v4.h"
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_FS_FILE_BUF_SIZE   512u
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetFS_WorkingFolderGet (CPU_CHAR    *p_path,
+                                             CPU_SIZE_T   path_len_max);
+
+static  CPU_BOOLEAN  NetFS_WorkingFolderSet (CPU_CHAR    *p_path);
+
+
+/*
+*********************************************************************************************************
+*                                           FILE SYSTEM API
+*
+* Note(s) : (1) File system API structures are used by network applications during calls.  This API structure
+*               allows network application to call specific file system functions via function pointer instead
+*               of by name.  This enables the network application suite to compile & operate with multiple
+*               file system.
+*
+*           (2) In most cases, the API structure provided below SHOULD suffice for most network application
+*               exactly as is with the exception that the API structure's name which MUST be unique &
+*               SHOULD clearly identify the file system being implemented.  For example, the Micrium file system
+*               V4's API structure should be named NetFS_API_FS_V4[].
+*
+*               The API structure MUST also be externally declared in the File system port header file
+*               ('net_fs_&&&.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+                                                                        /* Net FS static API fnct ptrs :                */
+const  NET_FS_API  NetFS_API_FS_V4 = {
+                                       NetFS_CfgPathGetLenMax,          /*   Path max len.                              */
+                                       NetFS_CfgPathGetSepChar,         /*   Path sep char.                             */
+                                       NetFS_FileOpen,                  /*   Open                                       */
+                                       NetFS_FileClose,                 /*   Close                                      */
+                                       NetFS_FileRd,                    /*   Rd                                         */
+                                       NetFS_FileWr,                    /*   Wr                                         */
+                                       NetFS_FilePosSet,                /*   Set position                               */
+                                       NetFS_FileSizeGet,               /*   Get size                                   */
+                                       NetFS_DirOpen,                   /*   Open  dir                                  */
+                                       NetFS_DirClose,                  /*   Close dir                                  */
+                                       NetFS_DirRd,                     /*   Rd    dir                                  */
+                                       NetFS_EntryCreate,               /*   Entry create                               */
+                                       NetFS_EntryDel,                  /*   Entry del                                  */
+                                       NetFS_EntryRename,               /*   Entry rename                               */
+                                       NetFS_EntryTimeSet,              /*   Entry set time                             */
+                                       NetFS_FileDateTimeCreateGet,     /*   Create date time                           */
+                                       NetFS_WorkingFolderGet,          /*   Get working folder                         */
+                                       NetFS_WorkingFolderSet,          /*   Set working folder                         */
+                                     };
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if (NET_FS_FILE_BUF_EN == DEF_ENABLED)
+static  CPU_DATA  NetFS_FileBuf[NET_FS_FILE_BUF_SIZE/sizeof(CPU_DATA)];
+
+static  FS_FILE  *NetFS_BufFilePtr = DEF_NULL;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          NetFS_CfgPathGetLenMax()
+*
+* Description : Get maximum path lenght
+*
+* Argument(s) : none.
+*
+* Return(s)   : maximum path len.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetFS_CfgPathGetLenMax (void)
+{
+    return ((CPU_INT32U)FS_CFG_MAX_PATH_NAME_LEN);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetFS_CfgPathGetSepChar()
+*
+* Description : Get path separator character
+*
+* Argument(s) : none.
+*
+* Return(s)   : separator charater.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_CHAR  NetFS_CfgPathGetSepChar (void)
+{
+    return ((CPU_CHAR)FS_CHAR_PATH_SEP);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetFS_DirOpen()
+*
+* Description : Open a directory.
+*
+* Argument(s) : p_name  Name of the directory.
+*
+* Return(s)   : Pointer to a directory, if NO errors.
+*               Pointer to NULL,        otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *NetFS_DirOpen (CPU_CHAR  *p_name)
+{
+#ifdef  FS_DIR_MODULE_PRESENT
+    FS_DIR  *p_dir;
+    FS_ERR   err;
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE DIR NAME ----------------- */
+    if (p_name == (CPU_CHAR *)0) {                              /* Validate NULL name.                                  */
+        return ((void *)0);
+    }
+#endif
+
+                                                                /* -------------------- OPEN DIR ---------------------- */
+    p_dir = FSDir_Open(p_name,
+                      &err);
+   (void)&err;                                                  /* Ignore err.                                          */
+
+    return ((void *)p_dir);
+
+#else
+   (void)&p_name;                                               /* Prevent 'variable unused' compiler warning.          */
+
+    return ((void *)0);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetFS_DirClose()
+*
+* Description : Close a directory.
+*
+* Argument(s) : p_dir   Pointer to a directory.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetFS_DirClose (void  *p_dir)
+{
+#ifdef  FS_DIR_MODULE_PRESENT
+    FS_ERR  err;
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ------------------ VALIDATE DIR -------------------- */
+    if (p_dir == (void *)0) {                                   /* Validate NULL dir ptr.                               */
+        return;
+    }
+#endif
+
+                                                                /* -------------------- CLOSE DIR --------------------- */
+    FSDir_Close(p_dir,
+               &err);
+   (void)&err;                                                  /* Ignore err.                                          */
+
+#else
+   (void)&pdir;                                                 /* Prevent 'variable unused' compiler warning.          */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_DirRd()
+*
+* Description : Read a directory entry from a directory.
+*
+* Argument(s) : p_dir       Pointer to a directory.
+*
+*               p_entry     Pointer to variable that will receive directory entry information.
+*
+* Return(s)   : DEF_OK,   if directory entry read.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_DirRd (void          *p_dir,
+                          NET_FS_ENTRY  *p_entry)
+{
+#ifdef  FS_DIR_MODULE_PRESENT
+    CPU_INT16U     attrib;
+    FS_DIR_ENTRY   entry_fs;
+    FS_ERR         err;
+#if (FS_VERSION >= 404u)
+    CLK_DATE_TIME  stime;
+    CPU_BOOLEAN    conv_success;
+#else
+    FS_DATE_TIME   stime;
+#endif
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_dir == (void *)0) {                                   /* Validate NULL dir   ptr.                             */
+        return (DEF_FAIL);
+    }
+    if (p_entry == (NET_FS_ENTRY *)0) {                         /* Validate NULL entry ptr.                             */
+        return (DEF_FAIL);
+    }
+    if (p_entry->NamePtr == (CPU_CHAR *)0) {                    /* Validate Name entry ptr.                             */
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ---------------------- RD DIR ---------------------- */
+    FSDir_Rd(p_dir,
+            &entry_fs,
+            &err);
+    if (err != FS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    Str_Copy_N(p_entry->NamePtr, entry_fs.Name, FS_CFG_MAX_PATH_NAME_LEN);
+
+    attrib = DEF_BIT_NONE;
+    if (DEF_BIT_IS_SET(entry_fs.Info.Attrib, FS_ENTRY_ATTRIB_RD) == DEF_YES) {
+        attrib |= NET_FS_ENTRY_ATTRIB_RD;
+    }
+    if (DEF_BIT_IS_SET(entry_fs.Info.Attrib, FS_ENTRY_ATTRIB_WR) == DEF_YES) {
+        attrib |= NET_FS_ENTRY_ATTRIB_WR;
+    }
+    if (DEF_BIT_IS_SET(entry_fs.Info.Attrib, FS_ENTRY_ATTRIB_HIDDEN) == DEF_YES) {
+        attrib |= NET_FS_ENTRY_ATTRIB_HIDDEN;
+    }
+    if (DEF_BIT_IS_SET(entry_fs.Info.Attrib, FS_ENTRY_ATTRIB_DIR) == DEF_YES) {
+        attrib |= NET_FS_ENTRY_ATTRIB_DIR;
+    }
+    p_entry->Attrib = attrib;
+    p_entry->Size   = entry_fs.Info.Size;
+
+#if (FS_VERSION >= 404u)
+    conv_success = Clk_TS_UnixToDateTime(entry_fs.Info.DateTimeCreate,
+                                         0,
+                                        &stime);
+    if (conv_success == DEF_OK) {
+        p_entry->DateTimeCreate.Sec   = stime.Sec;
+        p_entry->DateTimeCreate.Min   = stime.Min;
+        p_entry->DateTimeCreate.Hr    = stime.Hr;
+        p_entry->DateTimeCreate.Day   = stime.Day;
+        p_entry->DateTimeCreate.Month = stime.Month;
+        p_entry->DateTimeCreate.Yr    = stime.Yr;
+    } else {
+        p_entry->DateTimeCreate.Sec   = 0u;
+        p_entry->DateTimeCreate.Min   = 0u;
+        p_entry->DateTimeCreate.Hr    = 0u;
+        p_entry->DateTimeCreate.Day   = 1u;
+        p_entry->DateTimeCreate.Month = 1u;
+        p_entry->DateTimeCreate.Yr    = 0u;
+    }
+#else
+    FSTime_TS_to_Time(entry_fs.Info.DateTimeCreate,
+                     &stime,
+                     &err);
+    if (err == FS_ERR_NONE) {
+        p_entry->DateTimeCreate.Sec   = stime.Sec;
+        p_entry->DateTimeCreate.Min   = stime.Min;
+        p_entry->DateTimeCreate.Hr    = stime.Hr;
+        p_entry->DateTimeCreate.Day   = stime.Day;
+        p_entry->DateTimeCreate.Month = stime.Month + 1u;
+        p_entry->DateTimeCreate.Yr    = stime.Yr    + FS_TIME_YEAR_OFFSET;
+    } else {
+        p_entry->DateTimeCreate.Sec   = 0u;
+        p_entry->DateTimeCreate.Min   = 0u;
+        p_entry->DateTimeCreate.Hr    = 0u;
+        p_entry->DateTimeCreate.Day   = 1u;
+        p_entry->DateTimeCreate.Month = 1u;
+        p_entry->DateTimeCreate.Yr    = 0u;
+    }
+#endif
+
+    return (DEF_OK);
+
+
+#else
+   (void)&p_dir;                                                /* Prevent 'variable unused' compiler warning.          */
+   (void)&p_entry;
+
+    return (DEF_FAIL);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           ENTRY FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        NetFS_EntryCreate()
+*
+* Description : Create a file or directory.
+*
+* Argument(s) : p_name  Name of the entry.
+*
+*               dir     Indicates whether the new entry shall be a directory :
+*
+*                           DEF_YES, if the entry shall be a directory.
+*                           DEF_NO,  if the entry shall be a file.
+*
+* Return(s)   : DEF_OK,   if entry created.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_EntryCreate (CPU_CHAR     *p_name,
+                                CPU_BOOLEAN   dir)
+{
+#if (FS_CFG_RD_ONLY_EN != DEF_ENABLED)
+    FS_ERR       err;
+    CPU_BOOLEAN  ok;
+#if (FS_VERSION >= 404u)
+    FS_FLAGS     entry_type;
+#endif
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE FILE NAME ---------------- */
+    if (p_name == (CPU_CHAR *)0) {                              /* Validate NULL name.                                  */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- CREATE FILE/DIR ------------------ */
+#if (FS_VERSION >= 404u)
+    if (dir == DEF_YES) {
+        entry_type = FS_ENTRY_TYPE_DIR;
+    } else {
+        entry_type = FS_ENTRY_TYPE_FILE;
+    }
+
+    FSEntry_Create(p_name,
+                   entry_type,
+                   DEF_YES,
+                  &err);
+#else
+    FSEntry_Create(pname,
+                   dir,
+                   DEF_YES,
+                  &err);
+#endif
+
+    ok = (err == FS_ERR_NONE) ? DEF_OK : DEF_FAIL;
+
+    return (ok);
+
+#else
+   (void)&p_name;                                               /* Prevent 'variable unused' compiler warning.          */
+   (void)&dir;
+
+    return (DEF_FAIL);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetFS_EntryDel()
+*
+* Description : Delete a file or directory.
+*
+* Argument(s) : p_name  Name of the entry.
+*
+*               file    Indicates whether the entry MAY be a file :
+*
+*                           DEF_YES, if the entry MAY be a file.
+*                           DEF_NO,  if the entry is NOT a file.
+*
+* Return(s)   : DEF_OK,   if entry created.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_EntryDel (CPU_CHAR     *p_name,
+                             CPU_BOOLEAN   file)
+{
+#if (FS_CFG_RD_ONLY_EN != DEF_ENABLED)
+    FS_ERR       err;
+    CPU_BOOLEAN  ok;
+#if (FS_VERSION >= 404u)
+    FS_FLAGS     entry_type;
+#endif
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE FILE NAME ---------------- */
+    if (p_name == (CPU_CHAR *)0) {                              /* Validate NULL name.                                  */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* --------------------- DEL FILE --------------------- */
+#if (FS_VERSION >= 404u)
+    if (file == DEF_YES) {
+        entry_type = FS_ENTRY_TYPE_ANY;
+    } else {
+        entry_type = FS_ENTRY_TYPE_DIR;
+    }
+    FSEntry_Del(p_name,
+                entry_type,
+               &err);
+#else
+    FSEntry_Del(p_name,
+                file,
+               &err);
+#endif
+
+    ok = (err == FS_ERR_NONE) ? DEF_OK : DEF_FAIL;
+
+    return (ok);
+
+#else
+   (void)&p_name;                                               /* Prevent 'variable unused' compiler warning.          */
+   (void)&file;
+
+    return (DEF_FAIL);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetFS_EntryRename()
+*
+* Description : Rename a file or directory.
+*
+* Argument(s) : p_name_old  Old path of the entry.
+*
+*               p_name_new  New path of the entry.
+*
+* Return(s)   : DEF_OK,   if entry renamed.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_EntryRename (CPU_CHAR  *p_name_old,
+                                CPU_CHAR  *p_name_new)
+{
+#if (FS_CFG_RD_ONLY_EN != DEF_ENABLED)
+    FS_ERR       err;
+    CPU_BOOLEAN  ok;
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_name_old == (CPU_CHAR *)0) {                          /* Validate NULL name.                                  */
+        return (DEF_FAIL);
+    }
+    if (p_name_old == (CPU_CHAR *)0) {                          /* Validate NULL name.                                  */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------------- RENAME FILE -------------------- */
+    FSEntry_Rename(p_name_old,
+                   p_name_new,
+                   DEF_YES,
+                  &err);
+
+    ok = (err == FS_ERR_NONE) ? DEF_OK : DEF_FAIL;
+
+    return (ok);
+
+#else
+   (void)&p_name_old;                                           /* Prevent 'variable unused' compiler warning.          */
+   (void)&p_name_new;
+
+    return (DEF_FAIL);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetFS_EntryTimeSet()
+*
+* Description : Set a file or directory's date/time.
+*
+* Argument(s) : p_name  Name of the entry.
+*
+*               p_time  Pointer to date/time.
+*
+* Return(s)   : DEF_OK,   if date/time set.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_EntryTimeSet (CPU_CHAR          *p_name,
+                                 NET_FS_DATE_TIME  *p_time)
+{
+#if (FS_CFG_RD_ONLY_EN != DEF_ENABLED)
+    FS_ERR         err;
+    CPU_BOOLEAN    ok;
+#if (FS_VERSION >= 404u)
+    CLK_DATE_TIME  stime;
+#else
+    FS_DATE_TIME   stime;
+#endif
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_name == (CPU_CHAR *)0) {                              /* Validate NULL name.                                  */
+        return (DEF_FAIL);
+    }
+    if (p_time == (NET_FS_DATE_TIME *)0) {                      /* Validate NULL date/time.                             */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------------ SET DATE/TIME ------------------- */
+#if (FS_VERSION >= 404u)
+    stime.Sec   = p_time->Sec;
+    stime.Min   = p_time->Min;
+    stime.Hr    = p_time->Hr;
+    stime.Day   = p_time->Day;
+    stime.Month = p_time->Month;
+    stime.Yr    = p_time->Yr;
+#else
+    stime.Sec   = p_time->Sec;
+    stime.Min   = p_time->Min;
+    stime.Hr    = p_time->Hr;
+    stime.Day   = p_time->Day;
+    stime.Month = p_time->Month - 1u;
+    stime.Yr    = p_time->Yr    - FS_TIME_YEAR_OFFSET;
+#endif
+
+    FSEntry_TimeSet(p_name,
+                   &stime,
+                    FS_DATE_TIME_ALL,
+                   &err);
+
+    ok = (err == FS_ERR_NONE) ? DEF_OK : DEF_FAIL;
+
+    return (ok);
+
+#else
+   (void)&p_name;                                               /* Prevent 'variable unused' compiler warning.          */
+   (void)&p_time;
+
+    return (DEF_FAIL);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           FILE FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         NetFS_FileOpen()
+*
+* Description : Open a file.
+*
+* Argument(s) : p_name  Name of the file.
+*
+*               mode    Mode of the file :
+*
+*                           NET_FS_FILE_MODE_APPEND        Open existing file at end-of-file OR create new file.
+*                           NET_FS_FILE_MODE_CREATE        Create new file OR overwrite existing file.
+*                           NET_FS_FILE_MODE_CREATE_NEW    Create new file OR return error if file exists.
+*                           NET_FS_FILE_MODE_OPEN          Open existing file.
+*                           NET_FS_FILE_MODE_TRUNCATE      Truncate existing file to zero length.
+*
+*               access  Access rights of the file :
+*
+*                           NET_FS_FILE_ACCESS_RD          Open file in read           mode.
+*                           NET_FS_FILE_ACCESS_RD_WR       Open file in read AND write mode.
+*                           NET_FS_FILE_ACCESS_WR          Open file in          write mode
+*
+*
+* Return(s)   : Pointer to a file, if NO errors.
+*               Pointer to NULL,   otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *NetFS_FileOpen (CPU_CHAR            *p_name,
+                       NET_FS_FILE_MODE     mode,
+                       NET_FS_FILE_ACCESS   access)
+{
+    FS_ERR      err;
+    FS_FLAGS    mode_flags;
+    FS_FILE    *p_file;
+#if (NET_FS_FILE_BUF_EN == DEF_ENABLED)
+    CPU_SR_ALLOC();
+#endif
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_name     == (CPU_CHAR *)0) {                          /* Validate NULL name.                                  */
+        return ((void *)0);
+    }
+#endif
+
+
+                                                                /* -------------------- OPEN FILE --------------------- */
+    mode_flags = FS_FILE_ACCESS_MODE_NONE;
+
+    switch (mode) {
+        case NET_FS_FILE_MODE_APPEND:
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_APPEND);
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_CREATE);
+             break;
+
+
+        case NET_FS_FILE_MODE_CREATE:
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_CREATE);
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_TRUNCATE);
+             break;
+
+
+        case NET_FS_FILE_MODE_CREATE_NEW:
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_CREATE);
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_EXCL);
+             break;
+
+
+        case NET_FS_FILE_MODE_OPEN:
+             break;
+
+
+        case NET_FS_FILE_MODE_TRUNCATE:
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_TRUNCATE);
+             break;
+
+
+        default:
+             return (DEF_NULL);
+    }
+
+
+    switch (access) {
+        case NET_FS_FILE_ACCESS_RD:
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_RD);
+             break;
+
+
+        case NET_FS_FILE_ACCESS_RD_WR:
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_RD);
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_WR);
+             break;
+
+
+        case NET_FS_FILE_ACCESS_WR:
+             DEF_BIT_SET(mode_flags, FS_FILE_ACCESS_MODE_WR);
+             break;
+
+
+        default:
+             return (DEF_NULL);
+    }
+
+
+    p_file = FSFile_Open(p_name,
+                         mode_flags,
+                        &err);
+   (void)&err;                                                  /* Ignore err.                                          */
+
+#if (NET_FS_FILE_BUF_EN == DEF_ENABLED)
+    if (p_file == DEF_NULL) {
+        return DEF_NULL;
+    }
+
+    CPU_CRITICAL_ENTER();
+    if (NetFS_BufFilePtr == DEF_NULL) {
+        NetFS_BufFilePtr = p_file;
+        CPU_CRITICAL_EXIT();
+
+        FSFile_BufAssign(p_file, &NetFS_FileBuf, FS_FILE_BUF_MODE_RD_WR, NET_FS_FILE_BUF_SIZE, &err);
+        if (err != FS_ERR_NONE) {
+            CPU_CRITICAL_ENTER();
+            NetFS_BufFilePtr = DEF_NULL;
+            CPU_CRITICAL_EXIT();
+        }
+
+    } else {
+        CPU_CRITICAL_EXIT();
+    }
+#endif
+
+
+    return ((void *)p_file);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetFS_FileClose()
+*
+* Description : Close a file.
+*
+* Argument(s) : p_file  Pointer to a file.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetFS_FileClose (void  *p_file)
+{
+    FS_ERR  err;
+#if (NET_FS_FILE_BUF_EN == DEF_ENABLED)
+    CPU_SR_ALLOC();
+#endif
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE FILE PTR ----------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return;
+    }
+#endif
+
+#if (NET_FS_FILE_BUF_EN == DEF_ENABLED)
+    CPU_CRITICAL_ENTER();
+    if (NetFS_BufFilePtr == p_file) {
+        NetFS_BufFilePtr  = DEF_NULL;
+    }
+    CPU_CRITICAL_EXIT();
+#endif
+
+
+                                                                /* -------------------- CLOSE FILE -------------------- */
+    FSFile_Close(p_file,
+                &err);
+
+    p_file = DEF_NULL;
+
+   (void)&err;                                                  /* Ignore err.                                          */
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetFS_FileRd()
+*
+* Description : Read from a file.
+*
+* Argument(s) : p_file      Pointer to a file.
+*
+*               p_dest      Pointer to destination buffer.
+*
+*               size        Number of octets to read.
+*
+*               p_size_rd   Pointer to variable that will receive the number of octets read.
+*
+* Return(s)   : DEF_OK,   if no error occurred during read (see Note #2).
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*               (2) If the read request could not be fulfilled because the EOF was reached, the return
+*                   value should be 'DEF_OK'.  The application should compare the value in 'psize_rd' to
+*                   the value passed to 'size' to detect an EOF reached condition.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_FileRd (void        *p_file,
+                           void        *p_dest,
+                           CPU_SIZE_T   size,
+                           CPU_SIZE_T  *p_size_rd)
+{
+    FS_ERR       err;
+    CPU_BOOLEAN  ok;
+    CPU_SIZE_T   size_rd;
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE SIZE PTR ----------------- */
+    if (p_size_rd == (CPU_SIZE_T *)0) {                         /* Validate NULL size ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_size_rd = 0u;                                             /* Init to dflt size for err (see Note #1).             */
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return (DEF_FAIL);
+    }
+    if (p_dest == (void *)0) {                                  /* Validate NULL dest ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* --------------------- RD FILE ---------------------- */
+    size_rd  = FSFile_Rd(p_file,
+                         p_dest,
+                         size,
+                        &err);
+
+    ok        = ((err == FS_ERR_NONE) ||
+                 (err == FS_ERR_EOF)) ? DEF_OK : DEF_FAIL;
+
+   *p_size_rd = size_rd;
+
+    return (ok);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetFS_FileWr()
+*
+* Description : Write to a file.
+*
+* Argument(s) : p_file      Pointer to a file.
+*
+*               p_src       Pointer to source buffer.
+*
+*               size        Number of octets to write.
+*
+*               p_size_wr   Pointer to variable that will receive the number of octets written.
+*
+* Return(s)   : DEF_OK,   if no error occurred during write.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_FileWr (void        *p_file,
+                           void        *p_src,
+                           CPU_SIZE_T   size,
+                           CPU_SIZE_T  *p_size_wr)
+{
+#if (FS_CFG_RD_ONLY_EN != DEF_ENABLED)
+    FS_ERR       err;
+    CPU_BOOLEAN  ok;
+    CPU_SIZE_T   size_wr;
+#endif
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE SIZE PTR ----------------- */
+    if (p_size_wr == (CPU_SIZE_T *)0) {                         /* Validate NULL size ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_size_wr = 0u;                                             /* Init to dflt size (see Note #1).                     */
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return (DEF_FAIL);
+    }
+    if (p_src  == (void *)0) {                                  /* Validate NULL src  ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* --------------------- WR FILE ---------------------- */
+#if (FS_CFG_RD_ONLY_EN != DEF_ENABLED)
+    size_wr   =  FSFile_Wr(p_file,
+                           p_src,
+                           size,
+                          &err);
+
+    ok        = (err == FS_ERR_NONE) ? DEF_OK : DEF_FAIL;
+   *p_size_wr =  size_wr;
+
+    return (ok);
+
+#else
+   (void)&p_file;                                               /* Prevent 'variable unused' compiler warning.          */
+   (void)&p_src;
+   (void)&size;
+
+    return (DEF_FAIL);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetFS_FilePosSet()
+*
+* Description : Set file position indicator.
+*
+* Argument(s) : p_file  Pointer to a file.
+*
+*               offset  Offset from the file position specified by 'origin'.
+*
+*               origin  Reference position for offset :
+*
+*                           NET_FS_SEEK_ORIGIN_START    Offset is from the beginning of the file.
+*                           NET_FS_SEEK_ORIGIN_CUR      Offset is from current file position.
+*                           NET_FS_SEEK_ORIGIN_END      Offset is from the end       of the file.
+*
+* Return(s)   : DEF_OK,   if file position set.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_FilePosSet (void        *p_file,
+                               CPU_INT32S   offset,
+                               CPU_INT08U   origin)
+{
+    FS_ERR       err;
+    CPU_BOOLEAN  ok;
+    FS_STATE     origin_fs;
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE FILE PTR ----------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------------ SET FILE POS -------------------- */
+    switch (origin) {
+        case NET_FS_SEEK_ORIGIN_START:
+             origin_fs = FS_FILE_ORIGIN_START;
+             break;
+
+
+        case NET_FS_SEEK_ORIGIN_CUR:
+             origin_fs = FS_FILE_ORIGIN_CUR;
+             break;
+
+
+        case NET_FS_SEEK_ORIGIN_END:
+             origin_fs = FS_FILE_ORIGIN_END;
+             break;
+
+
+        default:
+             return (DEF_FAIL);
+    }
+
+    FSFile_PosSet(p_file,
+                  offset,
+                  origin_fs,
+                 &err);
+
+    ok = (err == FS_ERR_NONE) ? DEF_OK : DEF_FAIL;
+
+    return (ok);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetFS_FileSizeGet()
+*
+* Description : Get file size.
+*
+* Argument(s) : p_file  Pointer to a file.
+*
+*               p_size  Pointer to variable that will receive the file size.
+*
+* Return(s)   : DEF_OK,   if file size gotten.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_FileSizeGet (void        *p_file,
+                                CPU_INT32U  *p_size)
+{
+    FS_ENTRY_INFO  info;
+    FS_ERR         err;
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE SIZE PTR ----------------- */
+    if (p_size == (CPU_INT32U *)0) {                            /* Validate NULL size ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+   *p_size = 0u;                                                /* Init to dflt size for err (see Note #1).             */
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE FILE PTR ----------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------------ GET FILE SIZE ------------------- */
+    FSFile_Query(p_file,
+                &info,
+                &err);
+    if (err != FS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+   *p_size = (CPU_INT32U)info.Size;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetFS_FileDateTimeCreateGet()
+*
+* Description : Get file creation date/time.
+*
+* Argument(s) : p_file  Pointer to a file.
+*
+*               p_time  Pointer to variable that will receive the date/time :
+*
+*                           Default/epoch date/time,        if any error(s);
+*                           Current       date/time,        otherwise.
+*
+* Return(s)   : DEF_OK,   if file creation date/time gotten.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetFS_FileDateTimeCreateGet (void              *p_file,
+                                          NET_FS_DATE_TIME  *p_time)
+{
+    CLK_DATE_TIME  time;
+    CLK_TS_SEC     time_ts_sec;
+    CPU_BOOLEAN    rtn_code;
+    FS_ENTRY_INFO  info;
+    FS_ERR         err;
+
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE DATE/TIME PTR ------------ */
+    if (p_time == (NET_FS_DATE_TIME *)0) {
+        return (DEF_FAIL);
+    }
+#endif
+                                                                /* Init to dflt date/time for err (see Note #1).        */
+    p_time->Yr    = 0u;
+    p_time->Month = 0u;
+    p_time->Day   = 0u;
+    p_time->Hr    = 0u;
+    p_time->Min   = 0u;
+    p_time->Sec   = 0u;
+
+#if (NET_FS_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE FILE PTR ----------------- */
+    if (p_file == (void *)0) {                                  /* Validate NULL file ptr.                              */
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ---------- GET FILE CREATION DATE/TIME ------------- */
+    FSFile_Query(p_file,
+                &info,
+                &err);
+    if (err != FS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    time_ts_sec = info.DateTimeCreate;
+    rtn_code    = Clk_TS_ToDateTime(time_ts_sec, 0, &time);     /* Convert clk timestamp to date/time structure.        */
+    if (rtn_code != DEF_OK) {
+        return (DEF_FAIL);
+    }
+                                                                /* Set each creation date/time field to be rtn'd.       */
+    p_time->Yr    = time.Yr;
+    p_time->Month = time.Month;
+    p_time->Day   = time.Day;
+    p_time->Hr    = time.Hr;
+    p_time->Min   = time.Min;
+    p_time->Sec   = time.Sec;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetFS_WorkingFolderGet()
+*
+* Description : Get current working folder.
+*
+* Argument(s) : p_path          Pointer to string that will receive the working folder
+*
+* Return(s)   : DEF_OK,   if p_path successfully copied.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetFS_WorkingFolderGet (CPU_CHAR    *p_path,
+                                             CPU_SIZE_T   path_len_max)
+{
+    FS_ERR  err;
+
+
+    FS_WorkingDirGet(p_path, path_len_max, &err);
+    switch (err) {
+        case FS_ERR_NONE:
+             return (DEF_OK);
+
+
+        case FS_ERR_NULL_PTR:
+        case FS_ERR_NULL_ARG:
+        case FS_ERR_NAME_BUF_TOO_SHORT:
+        case FS_ERR_VOL_NONE_EXIST:
+        default:
+             break;
+    }
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetFS_WorkingFolderSet()
+*
+* Description : Set current working folder.
+*
+* Argument(s) : p_path  String that specifies EITHER...
+*                           (a) the absolute working directory path to set;
+*                           (b) a relative path that will be applied to the current working directory.
+*
+* Return(s)   : DEF_OK,   if file creation date/time gotten.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetFS_WorkingFolderSet (CPU_CHAR  *p_path)
+{
+    FS_ERR  err;
+
+
+    FS_WorkingDirSet(p_path, &err);
+    switch (err) {
+        case FS_ERR_NONE:
+             return (DEF_OK);
+
+
+        case FS_ERR_NAME_INVALID:
+        case FS_ERR_NAME_PATH_TOO_LONG:
+        case FS_ERR_NULL_PTR:
+        case FS_ERR_VOL_NONE_EXIST:
+        case FS_ERR_WORKING_DIR_NONE_AVAIL:
+        case FS_ERR_WORKING_DIR_INVALID:
+        default:
+             break;
+    }
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_fopen()
+*
+* Description : Open a file.
+*
+* Argument(s) : name_full   Name of the file.
+*
+*               str_mode    Access mode of the file (see Note #1a).
+*
+* Return(s)   : Pointer to a file, if NO errors.
+*               Pointer to NULL,   otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'fopen() : DESCRIPTION' states that :
+*
+*                   (a) "If ['str_mode'] is one of the following, the file is open in the indicated mode." :
+*
+*                           "r or rb           Open file for reading."
+*                           "w or wb           Truncate to zero length or create file for writing."
+*                           "a or ab           Append; open and create file for writing at end-of-file."
+*                           "r+ or rb+ or r+b  Open file for update (reading and writing)."
+*                           "w+ or wb+ or w+b  Truncate to zero length or create file for update."
+*                           "a+ or ab+ or a+b  Append; open or create for update, writing at end-of-file.
+*
+*                   (b) "The character 'b' shall have no effect"
+*
+*                   (c) "Opening a file with read mode ... shall fail if the file does not exist or
+*                        cannot be read"
+*
+*                   (d) "Opening a file with append mode ... shall cause all subsequent writes to the
+*                        file to be forced to the then current end-of-file"
+*
+*                   (e) "When a file is opened with update mode ... both input and output may be performed....
+*                        However, the application shall ensure that output is not directly followed by
+*                        input without an intervening call to 'fflush()' or to a file positioning function
+*                      ('fseek()', 'fsetpos()', or 'rewind()'), and input is not directly followed by output
+*                        without an intervening call to a file positioning function, unless the input
+*                        operation encounters end-of-file."
+*
+*               (2) IEEE Std 1003.1, 2004 Edition, Section 'fopen() : RETURN VALUE' states that "[u]pon
+*                   successful completion 'fopen()' shall return a pointer to the object controlling the
+*                   stream.  Otherwise a null pointer shall be returned'.
+*********************************************************************************************************
+*/
+
+void  *NetFS_fopen (const  char  *name_full,
+                    const  char  *str_mode)
+{
+    FS_FILE  *p_file;
+
+
+    p_file = fs_fopen(name_full, str_mode);
+
+    return (void *)p_file;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_fseek()
+*
+* Description : Set file position indicator.
+*
+* Argument(s) : p_file      Pointer to a file.
+*
+*               offset      Offset from file position specified by 'whence'.
+*
+*               origin      Reference position for offset :
+*
+*                               FS_SEEK_SET    Offset is from the beginning of the file.
+*                               FS_SEEK_CUR    Offset is from current file position.
+*                               FS_SEEK_END    Offset is from the end       of the file.
+*
+* Return(s)   :  0, if the function succeeds.
+*               -1, otherwise.
+*
+* Caller(s)   : Application,
+*               fs_rewind().
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'fread() : DESCRIPTION' states that :
+*
+*                   (a) "If a read or write error occurs, the error indicator for the stream shall be set"
+*
+*                   (b) "The new position measured in bytes from the beginning of the file, shall be
+*                        obtained by adding 'offset' to the position specified by 'whence'. The specified
+*                        point is ..."
+*
+*                       (1) "... the beginning of the file                        for SEEK_SET"
+*
+*                       (2) "... the current value of the file-position indicator for SEEK_CUR"
+*
+*                       (3) "... end-of-file                                      for SEEK_END"
+*
+*                   (c) "A successful call to 'fseek()' shall clear the end-of-file indicator"
+*
+*                   (d) "The 'fseek()' function shall allow the file-position indicator to be set beyond
+*                        the end of existing data in the file.  If data is later written at this point,
+*                        subsequent reads of data in the gap shall return bytes with the value 0 until
+*                        data is actually written into the gap."
+*
+*               (2) IEEE Std 1003.1, 2004 Edition, Section 'fread() : RETURN VALUE' states that "[t]he
+*                   'fseek()' and 'fseeko()' functions shall return 0 if they succeeds.  Otherwise, they
+*                   shall return -1".
+*
+*               (3) If the file position indicator is set beyond the file's current data, the file MUST
+*                   be opened in write or read/write mode.
+*********************************************************************************************************
+*/
+
+int  NetFS_fseek (void       *p_file,
+                  long  int   offset,
+                  int         origin)
+{
+    int rtn_value;
+
+
+    rtn_value = fs_fseek((FS_FILE *)p_file,
+                                    offset,
+                                    origin);
+
+    return (rtn_value);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_ftell()
+*
+* Description : Get file position indicator.
+*
+* Argument(s) : p_file     Pointer to a file.
+*
+* Return(s)   : The current file system position, if the function succeeds.
+*               -1,                               otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'ftell() : RETURN VALUE' states that :
+*
+*                   (a) "Upon successful completion, 'ftell()' and 'ftello()' shall return the current
+*                        value of the file-position indicator for the stream measured in bytes from the
+*                        beginning of the file."
+*
+*                   (b) "Otherwise, 'ftell()' and 'ftello()' shall return -1, cast to 'long' and 'off_t'
+*                        respectively, and set errno to indicate the error."
+*********************************************************************************************************
+*/
+
+long  int  NetFS_ftell (void  *p_file)
+{
+    long  int  pos;
+
+
+    pos = fs_ftell((FS_FILE *)p_file);
+
+
+    return (pos);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_rewind()
+*
+* Description : Reset file position indicator of a file.
+*
+* Argument(s) : p_file      Pointer to a file.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'rewind() : DESCRIPTION' states that :
+*
+*                       "[T]he call 'rewind(stream)' shall be equivalent to '(void)fseek(stream, 0L, SEEK_SET)'
+*                        except that 'rewind()' shall also clear the error indicator."
+*********************************************************************************************************
+*/
+
+
+void  NetFS_rewind (void  *p_file)
+{
+    fs_rewind((FS_FILE *) p_file);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             fs_fread()
+*
+* Description : Read from a file.
+*
+* Argument(s) : p_dest       Pointer to destination buffer.
+*
+*               size        Size of each item to read.
+*
+*               nitems      Number of items to read.
+*
+*               p_file      Pointer to a file.
+*
+* Return(s)   : Number of items read.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'fread() : DESCRIPTION' states that :
+*
+*                   (a) "The 'fread()' function shall read into the array pointed to by 'ptr' up to 'nitems'
+*                        elements whose size is specified by 'size' in bytes"
+*
+*                   (b) "The file position indicator for the stream ... shall be advanced by the number of
+*                        bytes successfully read"
+*
+*               (2) IEEE Std 1003.1, 2004 Edition, Section 'fread() : RETURN VALUE' states that "[u]pon
+*                   completion, 'fread()' shall return the number of elements which is less than 'nitems'
+*                   only if a read error or end-of-file is encountered".
+*
+*               (3) See 'fs_fopen()  Note #1e'.
+*
+*               (4) The file MUST have been opened in read or update (read/write) mode.
+*
+*               (5) If an error occurs while reading from the file, a value less than 'nitems' will
+*                   be returned.  To determine whether the premature return was caused by reaching the
+*                   end-of-file, the 'fs_feof()' function should be used :
+*
+*                       rtn = fs_fread(pbuf, 1, 1000, pfile);
+*                       if (rtn < 1000) {
+*                           eof = fs_feof();
+*                           if (eof != 0) {
+*                               // File has reached EOF
+*                           } else {
+*                               // Error has occurred
+*                           }
+*                       }
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  NetFS_fread ( void          *p_dest,
+                          CPU_SIZE_T     size,
+                          CPU_SIZE_T     nitems,
+                          void          *p_file)
+{
+    CPU_SIZE_T  len_rd;
+
+
+    len_rd = fs_fread(           p_dest,
+                                 size,
+                                 nitems,
+                      (FS_FILE *)p_file);
+
+
+    return (len_rd);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetFS_fwrite()
+*
+* Description : Write to a file.
+*
+* Argument(s) : p_src       Pointer to source buffer.
+*
+*               size        Size of each item to write.
+*
+*               nitems      Number of items to write.
+*
+*               p_file      Pointer to a file.
+*
+* Return(s)   : Number of items written.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) IEEE Std 1003.1, 2004 Edition, Section 'fwrite() : DESCRIPTION' states that :
+*
+*                   (a) "The 'fwrite()' function shall write, from the array pointed to by 'ptr', up to
+*                       'nitems' elements whose size is specified by 'size', to the stream pointed to by
+*                       'stream'"
+*
+*                   (b) "The file position indicator for the stream ... shall be advanced by the number of
+*                        bytes successfully written"
+*
+*               (2) IEEE Std 1003.1, 2004 Edition, Section 'fwrite() : RETURN VALUE' states that
+*                   "'fwrite()' shall return the number of elements successfully written, which may be
+*                   less than 'nitems' if a write error is encountered".
+*
+*               (3) See 'fs_fopen()  Notes #1d & #1e'.
+*
+*               (4) The file MUST have been opened in write or update (read/write) mode.
+*********************************************************************************************************
+*/
+
+CPU_SIZE_T  NetFS_fwrite (const   void          *p_src,
+                                  CPU_SIZE_T     size,
+                                  CPU_SIZE_T     nitems,
+                                  void          *p_file)
+{
+    CPU_SIZE_T  len_wr;
+
+
+    len_wr = fs_fwrite(           p_src,
+                                  size,
+                                  nitems,
+                       (FS_FILE *)p_file);
+
+    return (len_wr);
+}
+
+/*
+*********************************************************************************************************
+*                                           NetFS_fclose()
+*
+* Description : Close & free a file.
+*
+* Argument(s) : p_file      Pointer to a file.
+*
+* Return(s)   : 0,      if the file was successfully closed.
+*               FS_EOF, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a file system suite application interface (API) function & MAY be called
+*               by application function(s).
+*
+* Note(s)     : (1) After a file is closed, the application MUST desist from accessing its file pointer.
+*                   This could cause file system corruption, since this handle may be re-used for a
+*                   different file.
+*
+*               (2) (a) If the most recent operation is output (write), all unwritten data is written
+*                       to the file.
+*
+*                   (b) Any buffer assigned with 'fs_setbuf()' or 'fs_setvbuf()' shall no longer be
+*                       accessed by the file system & may be re-used by the application.
+*********************************************************************************************************
+*/
+
+int  NetFS_fclose  (void  *p_file)
+{
+    int  rtn_value;
+
+
+    rtn_value = fs_fclose((FS_FILE *)p_file);
+
+    return (rtn_value);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/uC-FS-V4/net_fs_v4.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/uC-FS-V4/net_fs_v4.h
new file mode 100644
index 0000000..a1eb85d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/FS/uC-FS-V4/net_fs_v4.h
@@ -0,0 +1,134 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   NETWORK FILE SYSTEM PORT LAYER
+*
+*                                             uC/FS V4.xx
+*
+* Filename      : net_fs_v4.h
+* Version       : V3.04.02
+* Programmer(s) : FBJ
+*                 SL
+*                 BAN
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/FS  V4.03
+*                     (b) uC/Clk V3.09          if uC/FS V4.04 (or more recent) is included
+*
+*                 (2) Should be compatible with the following TCP/IP application versions (or more recent):
+*
+*                     (a) uC/FTPc  V1.93.01
+*                     (b) uC/FTPs  V1.95.02
+*                     (c) uC/HTTPs V1.98.00
+*                     (d) uC/TFTPc V1.92.01
+*                     (e) uC/TFTPs V1.91.02
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  NET_FS_V4_MODULE_PRESENT
+#define  NET_FS_V4_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_FS_FILE_BUF_EN     DEF_ENABLED
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_FS_API  NetFS_API_FS_V4;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if (FS_CFG_WORKING_DIR_EN != DEF_ENABLED )
+    #error  "FS_CFG_WORKING_DIR_EN      illegally #define'd in 'fs_cfg.h'"
+    #error  "                           [MUST be  DEF_ENABLED]           "
+#endif
+
+
+                                                                /* ---------------- NET_FS_FILE_BUF_EN ---------------- */
+#ifndef  NET_FS_FILE_BUF_EN
+#error  "NET_FS_FILE_BUF_EN                           not #define'd in 'net_fs_v4.h'            "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+
+#elif  ((NET_FS_FILE_BUF_EN != DEF_DISABLED) && \
+        (NET_FS_FILE_BUF_EN != DEF_ENABLED ))
+#error  "NET_FS_FILE_BUF_EN                     illegally #define'd in 'net_fs_v4.h'            "
+#error  "                                       [MUST be  DEF_DISABLED]                         "
+#error  "                                       [     ||  DEF_ENABLED ]                         "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of net fs V4 module include.                     */
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if.c
new file mode 100644
index 0000000..99e1afe
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if.c
@@ -0,0 +1,9018 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    NETWORK INTERFACE MANAGEMENT
+*
+* Filename      : net_if.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 EHS
+*                 FGK
+*                 SR
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Network Interface modules located in the following network directory :
+*
+*                     (a) \\IF\net_if.*
+*                                                      net_if_*.*
+*
+*                             where
+*                                           directory path for network protocol suite
+*                                      net_if.*                     Generic  Network Interface Management
+*                                                                       module files
+*                                      net_if_*.*                   Specific Network Interface(s) module files
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_IF_MODULE
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_if.h"
+#include  "../Source/net_cfg_net.h"
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_arp.h"
+#include  "../IP/IPv4/net_ipv4.h"
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ipv6.h"
+#include  "../IP/IPv6/net_mldp.h"
+#endif
+
+
+#ifdef  NET_IF_802x_MODULE_EN
+#include  "net_if_802x.h"
+#endif
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+#include  "net_if_ether.h"
+#endif
+
+#ifdef  NET_IF_LOOPBACK_MODULE_EN
+#include  "net_if_loopback.h"
+#endif
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+#include  "net_if_wifi.h"
+#endif
+
+#ifdef  NET_IGMP_MODULE_EN
+#include  "../IP/IPv4/net_igmp.h"
+#endif
+
+
+#include  "../Source/net.h"
+#include  "../Source/net_udp.h"
+#include  "../Source/net_tcp.h"
+#include  "../Source/net_mgr.h"
+#include  "../Source/net_util.h"
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- TASK NAMES -------------------- */
+#define  NET_IF_RX_TASK_NAME                "Net IF Rx Task"
+#define  NET_IF_TX_DEALLOC_TASK_NAME        "Net IF Tx Dealloc Task"
+
+
+                                                                /* -------------------- OBJ NAMES --------------------- */
+#define  NET_IF_RX_Q_NAME                   "Net IF Rx Q"
+#define  NET_IF_TX_DEALLOC_Q_NAME           "Net IF Tx Dealloc Q"
+#define  NET_IF_TX_SUSPEND_NAME             "Net IF Tx Suspend"
+
+#define  NET_IF_LINK_SUBSCRIBER             "Net IF Link subscriber pool"
+
+#define  NET_IF_CFG_NAME                    "Cfg lock"
+
+#define  NET_IF_DEV_TX_RDY_NAME             "Net IF Dev Tx Rdy"
+
+
+
+#define  NET_IF_TX_SUSPEND_TIMEOUT_MIN_MS                  0
+#define  NET_IF_TX_SUSPEND_TIMEOUT_MAX_MS                100
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  KAL_TASK_HANDLE  NetIF_RxTaskHandle;
+static  KAL_TASK_HANDLE  NetIF_TxDeallocTaskHandle;
+
+static  KAL_Q_HANDLE     NetIF_RxQ_Handle;
+static  KAL_Q_HANDLE     NetIF_TxQ_Handle;
+
+
+
+static  NET_IF          NetIF_Tbl[NET_IF_NBR_IF_TOT];       /* Net IF tbl.                                          */
+static  NET_IF_NBR      NetIF_NbrBase;                      /* Net IF tbl base nbr.                                 */
+static  NET_IF_NBR      NetIF_NbrNext;                      /* Net IF tbl next nbr to cfg.                          */
+
+
+static  NET_STAT_CTR    NetIF_RxTaskPktCtr;                 /*        Net IF rx task q'd pkts ctr.                  */
+
+static  NET_IF_Q_SIZE   NetIF_RxQ_SizeCfgd;                 /*        Net IF rx q cfg'd size.                       */
+static  NET_IF_Q_SIZE   NetIF_RxQ_SizeCfgdRem;              /*        Net IF rx q cfg'd size rem'ing.               */
+
+
+static  NET_BUF        *NetIF_TxListHead;                   /* Ptr to net IF tx list head.                          */
+static  NET_BUF        *NetIF_TxListTail;                   /* Ptr to net IF tx list tail.                          */
+
+static  NET_IF_Q_SIZE   NetIF_TxDeallocQ_SizeCfgd;          /*        Net IF tx dealloc cfg'd size.                 */
+static  NET_IF_Q_SIZE   NetIF_TxDeallocQ_SizeCfgdRem;       /*        Net IF tx dealloc cfg'd size rem'ing.         */
+
+
+static  NET_TMR        *NetIF_PhyLinkStateTmr;              /* Phy link state tmr.                                  */
+static  CPU_INT16U      NetIF_PhyLinkStateTime_ms;          /* Phy link state time (in ms   ).                      */
+static  NET_TMR_TICK    NetIF_PhyLinkStateTime_tick;        /* Phy link state time (in ticks).                      */
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+static  NET_TMR        *NetIF_PerfMonTmr;                   /* Perf mon       tmr.                                  */
+static  CPU_INT16U      NetIF_PerfMonTime_ms;               /* Perf mon       time (in ms   ).                      */
+static  NET_TMR_TICK    NetIF_PerfMonTime_tick;             /* Perf mon       time (in ticks).                      */
+
+static  CPU_BOOLEAN     NetIF_CtrsResetEn = DEF_NO;         /* Variable added for uC-Probe to reset counters.       */
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+static  void           NetIF_InitTaskObj                (const  NET_TASK_CFG       *p_rx_task_cfg,
+                                                         const  NET_TASK_CFG       *p_tx_task_cfg,
+                                                                NET_ERR            *p_err);
+
+static  void           NetIF_ObjInit                    (       NET_IF             *p_if,
+                                                                NET_ERR            *p_err);
+
+static  void           NetIF_ObjDel                     (       NET_IF             *p_if);
+
+static  void           NetIF_DevTxRdyWait               (       NET_IF             *p_if,
+                                                                NET_ERR            *p_err);
+
+                                                                /* --------------------- RX FNCTS --------------------- */
+static  void           NetIF_RxTask                     (       void               *p_data);
+
+static  void           NetIF_RxTaskHandler              (       void);
+
+static  NET_IF_NBR     NetIF_RxTaskWait                 (       NET_ERR            *p_err);
+
+static  void           NetIF_RxHandler                  (       NET_IF_NBR          if_nbr);
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+static  void           NetIF_RxHandlerLoadBal           (       NET_IF             *p_if);
+#endif
+
+
+static  NET_BUF_SIZE   NetIF_RxPkt                      (       NET_IF             *p_if,
+                                                                NET_ERR            *p_err);
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+static  void           NetIF_RxPktDec                   (       NET_IF             *p_if);
+#endif
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+static  void           NetIF_RxPktDiscard               (       NET_BUF            *p_buf,
+                                                                NET_ERR            *p_err);
+#endif
+
+static  void           NetIF_RxQ_SizeCfg                (       NET_IF_Q_SIZE       size);
+
+
+                                                                /* --------------------- TX FNCTS --------------------- */
+static  void           NetIF_TxDeallocTask              (       void               *p_data);
+
+static  void           NetIF_TxDeallocTaskHandler       (       void);
+
+                                                                /* Wait for dev tx comp signal.                         */
+static  CPU_INT08U    *NetIF_TxDeallocTaskWait          (       NET_ERR            *p_err);
+
+static  void           NetIF_TxDeallocQ_SizeCfg         (       NET_IF_Q_SIZE       size);
+
+static  void           NetIF_TxHandler                  (       NET_BUF            *p_buf,
+                                                                NET_ERR            *p_err);
+
+static  NET_BUF_SIZE   NetIF_TxPkt                      (       NET_IF             *p_if,
+                                                                NET_BUF            *p_buf,
+                                                                NET_ERR            *p_err);
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+static  void           NetIF_TxPktValidate              (       NET_IF             *p_if,
+                                                                NET_BUF_HDR        *p_buf_hdr,
+                                                                NET_ERR            *p_err);
+#endif
+
+static  void           NetIF_TxPktListDealloc           (       CPU_INT08U         *p_buf_data);
+
+static  NET_BUF       *NetIF_TxPktListSrch              (       CPU_INT08U         *p_buf_data);
+
+static  void           NetIF_TxPktListInsert            (       NET_BUF            *p_buf);
+
+static  void           NetIF_TxPktListRemove            (       NET_BUF            *p_buf);
+
+
+static  void           NetIF_TxPktFree                  (       NET_BUF            *p_buf);
+
+static  void           NetIF_TxPktDiscard               (       NET_BUF            *p_buf,
+                                                                CPU_BOOLEAN         inc_ctrs,
+                                                                NET_ERR            *p_err);
+
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+static  void           NetIF_TxSuspendTimeoutInit       (       NET_IF             *p_if,
+                                                                NET_ERR            *p_err);
+
+static  void           NetIF_TxSuspendSignal            (       NET_IF             *p_if);
+
+static  void           NetIF_TxSuspendWait              (       NET_IF             *p_if);
+#endif
+
+
+
+                                                                /* ------------------ HANDLER FNCTS ------------------- */
+static  void           NetIF_BufPoolCfgValidate         (       NET_IF_NBR          if_nbr,
+                                                                NET_DEV_CFG        *p_dev_cfg,
+                                                                NET_ERR            *p_err);
+
+
+static  void          *NetIF_GetDataAlignPtr            (       NET_IF_NBR          if_nbr,
+                                                                NET_TRANSACTION     transaction,
+                                                                void               *p_data,
+                                                                NET_ERR            *p_err);
+
+static  CPU_INT16U     NetIF_GetProtocolHdrSize         (       NET_IF             *p_if,
+                                                                NET_PROTOCOL_TYPE   protocol,
+                                                                NET_ERR            *p_err);
+
+
+static  void           NetIF_IO_CtrlHandler             (       NET_IF_NBR          if_nbr,
+                                                                CPU_INT08U          opt,
+                                                                void               *p_data,
+                                                                NET_ERR            *p_err);
+
+
+#ifndef  NET_CFG_LINK_STATE_POLL_DISABLED
+static  void           NetIF_PhyLinkStateHandler        (       void               *p_obj);
+#endif
+
+
+#if  (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+static  void           NetIF_PerfMonHandler             (       void               *p_obj);
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+
+#ifndef  NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS
+#error  "NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS        not #define'd in 'net_cfg.h'            "
+#error  "                                  [MUST be  >= NET_IF_TX_SUSPEND_TIMEOUT_MIN_MS]"
+#error  "                                  [     &&  <= NET_IF_TX_SUSPEND_TIMEOUT_MAX_MS]"
+
+#elif   (DEF_CHK_VAL(NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS,          \
+                     NET_IF_TX_SUSPEND_TIMEOUT_MIN_MS,          \
+                     NET_IF_TX_SUSPEND_TIMEOUT_MAX_MS) != DEF_OK)
+#error  "NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS  illegally #define'd in 'net_cfg.h'            "
+#error  "                                  [MUST be  >= NET_IF_TX_SUSPEND_TIMEOUT_MIN_MS]"
+#error  "                                  [     &&  <= NET_IF_TX_SUSPEND_TIMEOUT_MAX_MS]"
+#endif
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_Init()
+*
+* Description : (1) Initialize the Network  Interface Management Module :
+*
+*                   (a) Perform    Network Interface/OS initialization
+*                   (b) Initialize Network Interface table
+*                   (c) Initialize Network Interface counter(s)
+*                   (d) Initialize Network Interface transmit list pointers
+*                   (e) Initialize Network Interface timers
+*                   (f) Initialize Network Interface(s)/Layer(s) :
+*                       (1) (A) Initialize          Loopback Interface
+*                           (B) Initialize specific network  interface(s)
+*                       (2) Initialize ARP Layer
+*
+*
+* Argument(s) : p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                         Network interface module successfully
+*                                                                           initialized.
+*
+*                               -------------------- RETURNED BY NetIF_InitTaskObj() : ----------------------
+*                               See NetIF_InitTaskObj() for additional return error codes.
+*
+*                               -------------------- RETURNED BY NetIF_Loopback_Init() : --------------------
+*                               See NetIF_Loopback_Init() for additional return error codes.
+*
+*                               ---------------------- RETURNED BY NetIF_&&&_Init() : -----------------------
+*                                See specific network interface(s) 'Init()' for additional return error codes.
+*
+*                               ------------------------ RETURNED BY NetTmr_Get() : -------------------------
+*                               See NetTmr_Get() for additional return error codes.
+*
+*                               ---------------------- RETURNED BY NetStat_CtrInit() : ----------------------
+*                               See NetStat_CtrInit() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) The following network interface initialization functions MUST be sequenced as follows :
+*
+*                   (a) Net_IF_KAL_Init()  MUST precede ALL other network interface initialization functions
+*                   (b) NetIF_&&&_Init()'s MUST follow  ALL other network interface initialization functions
+*
+*               (3) Regardless of whether the Loopback interface is enabled or disabled, network interface
+*                   numbers MUST be initialized to reserve the lowest possible network interface number
+*                   ('NET_IF_NBR_LOOPBACK') for the Loopback interface.
+*
+*                           NetIF_NbrLoopback
+*                           NetIF_NbrBaseCfgd
+*********************************************************************************************************
+*/
+
+void  NetIF_Init (const  NET_TASK_CFG  *p_rx_task_cfg,
+                  const  NET_TASK_CFG  *p_tx_task_cfg,
+                         NET_ERR       *p_err)
+{
+    NET_IF        *p_if;
+    NET_IF_NBR     if_nbr;
+    NET_TMR_TICK   timeout_tick;
+    CPU_SR_ALLOC();
+
+
+                                                                        /* ---------- PERFORM NET IF/OS INIT ---------- */
+    NetIF_InitTaskObj(p_rx_task_cfg, p_tx_task_cfg, p_err);             /* Create net IF obj(s)/task(s) [see Note #2a]. */
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+
+
+
+                                                                        /* --------------- INIT IF TBL ---------------- */
+    p_if = &NetIF_Tbl[0];
+    for (if_nbr = 0u; if_nbr < NET_IF_NBR_IF_TOT; if_nbr++) {
+        p_if->Nbr      =  NET_IF_NBR_NONE;
+        p_if->Type     =  NET_IF_TYPE_NONE;
+        p_if->Init     =  DEF_NO;
+        p_if->En       =  DEF_DISABLED;
+        p_if->Link     =  NET_IF_LINK_DOWN;
+        p_if->MTU      =  0u;
+        p_if->IF_API   = (void *)0;
+        p_if->IF_Data  = (void *)0;
+        p_if->Dev_API  = (void *)0;
+        p_if->Dev_Cfg  = (void *)0;
+        p_if->Dev_Data = (void *)0;
+        p_if->Ext_API  = (void *)0;
+        p_if->Ext_Cfg  = (void *)0;
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+        p_if->PerfMonState      = NET_IF_PERF_MON_STATE_STOP;
+        p_if->PerfMonTS_Prev_ms = NET_TS_NONE;
+#else
+       (void)&NetIF_NbrBase;
+#endif
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+        NetStat_CtrInit(&p_if->RxPktCtr,     p_err);
+        if (*p_err != NET_STAT_ERR_NONE) {
+             return;
+        }
+
+        NetStat_CtrInit(&p_if->TxSuspendCtr, p_err);
+        if (*p_err != NET_STAT_ERR_NONE) {
+             return;
+        }
+#endif
+
+        p_if++;
+    }
+                                                                        /* Init base/next IF nbrs (see Note #3).        */
+#if (NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+    NetIF_NbrBase = NET_IF_NBR_BASE;
+    NetIF_NbrNext = NET_IF_NBR_LOOPBACK;
+#else
+    NetIF_NbrBase = NET_IF_NBR_BASE_CFGD;
+    NetIF_NbrNext = NET_IF_NBR_BASE_CFGD;
+#endif
+
+
+                                                                        /* ------------ INIT NET IF CTR's ------------- */
+    NetStat_CtrInit(&NetIF_RxTaskPktCtr, p_err);
+    if (*p_err != NET_STAT_ERR_NONE) {
+         return;
+    }
+
+
+                                                                        /* ----------- INIT NET IF TX LIST ------------ */
+    NetIF_TxListHead = DEF_NULL;
+    NetIF_TxListTail = DEF_NULL;
+
+
+                                                                        /* ------------ INIT NET IF TMR's ------------- */
+    CPU_CRITICAL_ENTER();
+    timeout_tick          = NetIF_PhyLinkStateTime_tick;
+    CPU_CRITICAL_EXIT();
+
+#ifndef  NET_CFG_LINK_STATE_POLL_DISABLED
+    NetIF_PhyLinkStateTmr = NetTmr_Get((CPU_FNCT_PTR)&NetIF_PhyLinkStateHandler,
+                                       (void       *) 0,
+                                       (NET_TMR_TICK) timeout_tick,
+                                       (CPU_INT16U  ) NET_TMR_FLAG_NONE,
+                                       (NET_ERR    *) p_err);
+    if (*p_err != NET_TMR_ERR_NONE) {
+         return;
+    }
+#endif
+
+   (void)&NetIF_PhyLinkStateTmr;
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    CPU_CRITICAL_ENTER();
+    timeout_tick     = NetIF_PerfMonTime_tick;
+    CPU_CRITICAL_EXIT();
+    NetIF_PerfMonTmr = NetTmr_Get((CPU_FNCT_PTR)&NetIF_PerfMonHandler,
+                                  (void       *) 0,
+                                  (NET_TMR_TICK) timeout_tick,
+                                  (CPU_INT16U  ) NET_TMR_FLAG_NONE,
+                                  (NET_ERR    *) p_err);
+    if (*p_err != NET_TMR_ERR_NONE) {
+         return;
+    }
+
+   (void)&NetIF_PerfMonTmr;
+#endif
+
+
+                                                                        /* -------------- INIT NET IF(s) -------------- */
+                                                                        /* See Note #2b.                                */
+#ifdef  NET_IF_LOOPBACK_MODULE_EN
+    NetIF_Loopback_Init(p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+    NetIF_Ether_Init(p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+    NetIF_WiFi_Init(p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+#ifdef  NET_ARP_MODULE_EN
+    NetARP_Init(p_err);
+    if (*p_err != NET_ARP_ERR_NONE) {
+         return;
+    }
+#endif
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_BufPoolInit()
+*
+* Description : (1) Create network interface buffer memory pools :
+*
+*                   (a) Validate network interface buffer configuration
+*                   (b) Create   network buffer memory pools :
+*                       (1) Create receive  large buffer pool
+*                       (2) Create transmit large buffer pool
+*                       (3) Create transmit small buffer pool
+*                       (4) Create network buffer header pool
+*
+*
+* Argument(s) : p_if        Pointer to network interface.
+*               ----        Argument validated in NetIF_Add().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Buffer pools successfully created.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               -- RETURNED BY NetIF_BufPoolCfgValidate() : --
+*                               NET_IF_ERR_INVALID_POOL_TYPE    Invalid network interface buffer pool type.
+*                               NET_IF_ERR_INVALID_POOL_ADDR    Invalid network interface buffer pool address.
+*                               NET_IF_ERR_INVALID_POOL_SIZE    Invalid network interface buffer pool size.
+*                               NET_IF_ERR_INVALID_POOL_QTY     Invalid network interface buffer pool number
+*                                                                   of buffers configured.
+*
+*                                                               --- RETURNED BY NetBuf_PoolCfgValidate() : ---
+*                               NET_BUF_ERR_INVALID_QTY         Invalid number of network buffers configured.
+*                               NET_BUF_ERR_INVALID_SIZE        Invalid size   of network buffer data areas
+*                                                                   configured.
+*                               NET_BUF_ERR_INVALID_IX          Invalid offset from base index into network
+*                                                                   buffer data area configured.
+*
+*                                                               ------ RETURNED BY NetBuf_PoolInit() : -------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_BUF_ERR_INVALID_POOL_TYPE   Invalid network buffer pool type.
+*                               NET_BUF_ERR_POOL_MEM_ALLOC           Network buffer pool initialization failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_IF_Add(),
+*               NetIF_WiFi_IF_Add(),
+*               NetIF_Loopback_IF_Add().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (2) (a) Each added network interfaces MUST decrement its total number of configured receive
+*                       buffers from the remaining network interface receive queue configured size.
+*
+*                   (b) Each added network interfaces MUST decrement its total number of configured transmit
+*                       buffers from the remaining network interface transmit deallocation queue configured
+*                       size.
+*
+*                       (1) However, since the network loopback interface does NOT deallocate transmit
+*                           packets via the network interface transmit deallocation task (see
+*                           'net_if_loopback.c  NetIF_Loopback_Tx()  Note #4'); then the network interface
+*                           transmit deallocation queue size does NOT need to be adjusted by the network
+*                           loopback interface's number of configured transmit buffers.
+*
+*                   See also 'NetBuf_PoolCfgValidate()  Note #2'.
+*
+*               (3) Each network buffer data area allocates additional octets for its configured offset
+*                   (see 'net_dev_cfg.c  EXAMPLE NETWORK INTERFACE / DEVICE CONFIGURATION  Note #5').  This
+*                   ensures that each data area's effective, useable size still equals its configured size
+*                   (see 'net_dev_cfg.c  EXAMPLE NETWORK INTERFACE / DEVICE CONFIGURATION  Note #2').
+*********************************************************************************************************
+*/
+
+void  NetIF_BufPoolInit (NET_IF   *p_if,
+                         NET_ERR  *p_err)
+{
+    NET_IF_NBR    if_nbr;
+    NET_IF_API   *p_if_api;
+    NET_DEV_CFG  *p_dev_cfg;
+    void         *p_addr;
+    CPU_ADDR      size;
+    CPU_SIZE_T    size_buf;
+    CPU_SIZE_T    reqd_octets;
+    NET_BUF_QTY   nbr_bufs_tot;
+
+
+                                                                /* ------------- VALIDATE NET IF BUF CFG -------------- */
+    if_nbr    = (NET_IF_NBR   )p_if->Nbr;
+    p_if_api  = (NET_IF_API  *)p_if->IF_API;
+    p_dev_cfg = (NET_DEV_CFG *)p_if->Dev_Cfg;
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_if_api->BufPoolCfgValidate == (void (*)(NET_IF  *,
+                                                  NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+    NetBuf_PoolCfgValidate(p_if->Type, p_dev_cfg, p_err);
+    if (*p_err != NET_BUF_ERR_NONE) {
+         return;
+    }
+
+    NetIF_BufPoolCfgValidate(if_nbr, p_dev_cfg, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+    p_if_api->BufPoolCfgValidate(p_if, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* --------- INIT NET IF RX BUF POOL ---------- */
+    if (p_dev_cfg->RxBufPoolType == NET_IF_MEM_TYPE_MAIN) {
+        p_addr = (void   *)0;
+        size  = (CPU_ADDR)0u;
+    } else {
+        p_addr = (void   *)p_dev_cfg->MemAddr;
+        size  = (CPU_ADDR)p_dev_cfg->MemSize;
+    }
+
+    if (p_dev_cfg->RxBufLargeNbr > 0) {
+        size_buf = p_dev_cfg->RxBufLargeSize +                  /* Inc cfg'd rx buf size by ...                         */
+                   p_dev_cfg->RxBufIxOffset;                    /* ... cfg'd rx buf offset (see Note #3).               */
+        NetBuf_PoolInit(if_nbr,
+                        NET_BUF_TYPE_RX_LARGE,                  /* Create  large rx buf data area pool.                 */
+                        p_addr,                                 /* Create  pool  in dedicated mem, if avail.            */
+                        size,                                   /* Size  of dedicated mem, if avail.                    */
+                        p_dev_cfg->RxBufLargeNbr,               /* Nbr  of large rx bufs to create.                     */
+                        size_buf,                               /* Size of large rx bufs to create.                     */
+                        p_dev_cfg->RxBufAlignOctets,            /* Align   large rx bufs to octet boundary.             */
+                       &reqd_octets,
+                        p_err);
+
+        if (*p_err != NET_BUF_ERR_NONE) {
+             return;
+        }
+
+        NetIF_RxQ_SizeCfgdRem -= p_dev_cfg->RxBufLargeNbr;      /* Dec rem'ing rx Q size by nbr large rx bufs ..        */
+                                                                /* .. (see Note #2a).                                   */
+    }
+
+
+                                                                /* ------------- INIT NET IF TX BUF POOLS ------------- */
+    if (p_dev_cfg->TxBufPoolType == NET_IF_MEM_TYPE_MAIN) {
+        p_addr = (void   *)0;
+        size  = (CPU_ADDR)0u;
+    } else {
+        p_addr = (void   *)p_dev_cfg->MemAddr;
+        size  = (CPU_ADDR)p_dev_cfg->MemSize;
+    }
+
+    if (p_dev_cfg->TxBufLargeNbr > 0) {
+        size_buf = p_dev_cfg->TxBufLargeSize +                  /* Inc cfg'd tx buf size by ...                         */
+                   p_dev_cfg->TxBufIxOffset;                    /* ... cfg'd tx buf offset (see Note #3).               */
+        NetBuf_PoolInit(if_nbr,
+                        NET_BUF_TYPE_TX_LARGE,                  /* Create  large tx buf data area pool.                 */
+                        p_addr,                                 /* Create  pool  in dedicated mem, if avail.            */
+                        size,                                   /* Size  of dedicated mem, if avail.                    */
+                        p_dev_cfg->TxBufLargeNbr,               /* Nbr  of large tx bufs to create.                     */
+                        size_buf,                               /* Size of large tx bufs to create.                     */
+                        p_dev_cfg->TxBufAlignOctets,            /* Align   large tx bufs to octet boundary.             */
+                       &reqd_octets,
+                        p_err);
+
+        if (*p_err != NET_BUF_ERR_NONE) {
+             return;
+        }
+
+        if (if_nbr != NET_IF_NBR_LOOPBACK) {                    /* For all non-loopback IF's (see Note #2b1),..         */
+                                                                /* .. dec rem'ing tx dealloc Q size by nbr   ..         */
+                                                                /* .. of large tx bufs (see Note #2b).                  */
+            NetIF_TxDeallocQ_SizeCfgdRem -= p_dev_cfg->TxBufLargeNbr;
+        }
+    }
+
+    if (p_dev_cfg->TxBufSmallNbr > 0) {
+        size_buf = p_dev_cfg->TxBufSmallSize +                  /* Inc cfg'd tx buf size by ...                         */
+                   p_dev_cfg->TxBufIxOffset;                    /* ... cfg'd tx buf offset (see Note #3).               */
+        NetBuf_PoolInit(if_nbr,
+                        NET_BUF_TYPE_TX_SMALL,                  /* Create  small tx buf data area pool.                 */
+                        p_addr,                                 /* Create  pool  in dedicated mem, if avail.            */
+                        size,                                   /* Size  of dedicated mem, if avail.                    */
+                        p_dev_cfg->TxBufSmallNbr,               /* Nbr  of small tx bufs to create.                     */
+                        size_buf,                               /* Size of small tx bufs to create.                     */
+                        p_dev_cfg->TxBufAlignOctets,            /* Align   small tx bufs to octet boundary.             */
+                       &reqd_octets,
+                        p_err);
+
+        if (*p_err != NET_BUF_ERR_NONE) {
+             return;
+        }
+
+        if (if_nbr != NET_IF_NBR_LOOPBACK) {                    /* For all non-loopback IF's (see Note #2b1),..         */
+                                                                /* .. dec rem'ing tx dealloc Q size by nbr   ..         */
+                                                                /* .. of small tx bufs (see Note #2b).                  */
+            NetIF_TxDeallocQ_SizeCfgdRem -= p_dev_cfg->TxBufSmallNbr;
+        }
+    }
+
+                                                                /* --------------- INIT NET IF BUF POOL --------------- */
+                                                                /* Calc IF's tot nbr net bufs.                          */
+    nbr_bufs_tot = p_dev_cfg->RxBufLargeNbr +
+                   p_dev_cfg->TxBufLargeNbr +
+                   p_dev_cfg->TxBufSmallNbr;
+
+    if (nbr_bufs_tot > 0) {
+        NetBuf_PoolInit(if_nbr,
+                        NET_BUF_TYPE_BUF,                       /* Create  net buf pool.                                */
+                        0,                                      /* Create  net bufs from main mem heap.                 */
+                        0u,
+                        nbr_bufs_tot,                           /* Nbr  of net bufs to create.                          */
+                        sizeof(NET_BUF),                        /* Size of net bufs.                                    */
+                        sizeof(CPU_DATA),                       /* Align   net bufs to CPU data word size.              */
+                       &reqd_octets,
+                        p_err);
+
+        if (*p_err != NET_BUF_ERR_NONE) {
+             return;
+        }
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_CfgPhyLinkPeriod()
+*
+* Description : (1) Configure Network Interface Physical Link State Handler time (i.e. scheduling period) :
+*
+*                   (a) Validate  desired physical link state handler time
+*                   (b) Configure desired physical link state handler time
+*
+*
+* Argument(s) : time_ms     Desired value for Network Interface Physical Link State Handler time
+*                               (in milliseconds).
+*
+* Return(s)   : DEF_OK,   Network Interface Physical Link State Handler timeout configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API)
+*               function & MAY be called by application function(s).
+*
+* Note(s)     : (2) Configured time does NOT reschedule the next physical link state handling but
+*                   configures the scheduling of all subsequent  physical link state handling.
+*
+*               (3) Configured time converted to 'NET_TMR_TICK' ticks to avoid run-time conversion.
+*
+*               (4) 'NetIF_PhyLinkStateTime' variables MUST ALWAYS be accessed exclusively in critical
+*                   sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_CfgPhyLinkPeriod (CPU_INT16U  time_ms)
+{
+    NET_TMR_TICK  time_tick;
+    CPU_SR_ALLOC();
+
+
+    if (time_ms < NET_IF_PHY_LINK_TIME_MIN_MS) {
+        return (DEF_FAIL);
+    }
+    if (time_ms > NET_IF_PHY_LINK_TIME_MAX_MS) {
+        return (DEF_FAIL);
+    }
+
+    time_tick                   = ((NET_TMR_TICK)time_ms * NET_TMR_TIME_TICK_PER_SEC) / DEF_TIME_NBR_mS_PER_SEC;
+    CPU_CRITICAL_ENTER();
+    NetIF_PhyLinkStateTime_ms   = time_ms;
+    NetIF_PhyLinkStateTime_tick = time_tick;
+    CPU_CRITICAL_EXIT();
+
+   (void)&NetIF_PhyLinkStateTime_ms;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_CfgPerfMonPeriod()
+*
+* Description : (1) Configure Network Interface Performance Monitor Handler time (i.e. scheduling period) :
+*
+*                   (a) Validate  desired performance monitor handler time
+*                   (b) Configure desired performance monitor handler time
+*
+*
+* Argument(s) : time_ms     Desired value for Network Interface Performance Monitor Handler time
+*                               (in milliseconds).
+*
+* Return(s)   : DEF_OK,   Network Interface Performance Monitor Handler time configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API)
+*               function & MAY be called by application function(s).
+*
+* Note(s)     : (2) Configured time does NOT reschedule the next performance monitor handling but
+*                   configures the scheduling of all  subsequent performance monitor handling.
+*
+*               (3) Configured time converted to 'NET_TMR_TICK' ticks to avoid run-time conversion.
+*
+*               (4) 'NetIF_PerfMonTime' variables MUST ALWAYS be accessed exclusively in critical
+*                   sections.
+*********************************************************************************************************
+*/
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+CPU_BOOLEAN  NetIF_CfgPerfMonPeriod (CPU_INT16U  time_ms)
+{
+    NET_TMR_TICK  time_tick;
+    CPU_SR_ALLOC();
+
+
+    if (time_ms < NET_IF_PERF_MON_TIME_MIN_MS) {
+        return (DEF_FAIL);
+    }
+    if (time_ms > NET_IF_PERF_MON_TIME_MAX_MS) {
+        return (DEF_FAIL);
+    }
+
+    time_tick              = ((NET_TMR_TICK)time_ms * NET_TMR_TIME_TICK_PER_SEC) / DEF_TIME_NBR_mS_PER_SEC;
+    CPU_CRITICAL_ENTER();
+    NetIF_PerfMonTime_ms   = time_ms;
+    NetIF_PerfMonTime_tick = time_tick;
+    CPU_CRITICAL_EXIT();
+
+   (void)&NetIF_PerfMonTime_ms;
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                              NetIF_Add()
+*
+* Description : (1) Add & initialize a specific instance of a network interface :
+*
+*                   (a) Acquire network lock
+*                   (b) Validate   network interface :
+*                       (1) Validate next network interface available
+*                       (2) Validate      network interface parameters
+*                   (c) Initialize network interface :
+*                       (1) Configure  network interface parameters
+*                       (2) Initialize network buffers & pools
+*                       (3) Initialize specific network interface & device
+*                   (d) Release network lock
+*                   (e) Return  network interface number
+*                         OR
+*                       Null    network interface number & error code, on failure
+*
+*
+* Argument(s) : if_api      Pointer to specific network interface API.
+*
+*               dev_api     Pointer to specific network device driver API.
+*
+*               dev_bsp     Pointer to specific network device board-specific API.
+*
+*               dev_cfg     Pointer to specific network device hardware configuration.
+*
+*               ext_api     Pointer to specific network extension layer API           (see Note #4).
+*
+*               ext_cfg     Pointer to specific network extension layer configuration (see Note #4).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Network interface successfully added.
+*                               NET_ERR_FAULT_NULL_PTR                 Argument 'if_api'/'dev_cfg'/'dev_api'/'dev_bsp'
+*                                                                       passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT                Invalid/NULL network interface function pointer.
+*                               NET_IF_ERR_INVALID_CFG              Invalid      network interface API configuration.
+*                               NET_IF_ERR_INVALID_IF               NO available network interfaces
+*                                                                       (see 'net_cfg_dev.h  NET_IF_NBR_IF_TOT').
+*
+*                               NET_DEV_ERR_NULL_PTR                Argument(s) 'dev_api'/'dev_bsp'/'dev_cfg'
+*                                                                       passed a NULL pointer.
+*                               NET_DEV_ERR_INVALID_CFG             Argument(s) 'phy_api'/'phy_cfg'/'phy_data'
+*                                                                       incorrectly configured (see Note #4b).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   ------- RETURNED BY NetIF_BufPoolInit() : --------
+*                               NET_IF_ERR_INVALID_POOL_TYPE        Invalid network interface buffer pool type.
+*                               NET_IF_ERR_INVALID_POOL_ADDR        Invalid network interface buffer pool address.
+*                               NET_IF_ERR_INVALID_POOL_SIZE        Invalid network interface buffer pool size.
+*                               NET_IF_ERR_INVALID_POOL_QTY         Invalid network interface buffer pool number
+*                                                                       of buffers configured.
+*
+*                               NET_BUF_ERR_POOL_MEM_ALLOC               Network buffer pool initialization failed.
+*                               NET_BUF_ERR_INVALID_POOL_TYPE       Invalid network buffer pool type.
+*                               NET_BUF_ERR_INVALID_QTY             Invalid number of network buffers configured.
+*                               NET_BUF_ERR_INVALID_SIZE            Invalid size   of network buffer data areas
+*                                                                       configured.
+*                               NET_BUF_ERR_INVALID_IX              Invalid offset from base index into network
+*                                                                       buffer data area configured.
+*
+*                                                                   --------- RETURNED BY 'p_if_api->Add()' : ---------
+*                               NET_ERR_FAULT_MEM_ALLOC             Insufficient resources available to add interface.
+*
+*                               NET_DEV_ERR_INVALID_CFG             Invalid/NULL network device API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT               Invalid NULL network device function pointer.
+*
+*                                                                   See specific network interface(s) 'Add()' for
+*                                                                       additional return error codes.
+*
+*                                                                   ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Interface number of the added interface, if NO error(s).
+*
+*               NET_IF_NBR_NONE,                         otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIF_Add() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) NetIF_Add() blocked until network initialization completes.
+*
+*                   See also 'net.c  Net_Init()  Note #3d'.
+*
+*               (4) (a) Network physical layer arguments MAY be NULL for any of the following :
+*
+*                       (1) The network device does not require   Physical layer support.
+*                       (2) The network device uses an integrated Physical layer supported from within
+*                           the network device &/or the network device driver.
+*
+*                   (b) However, if network physical layer API is available, then ALL network physical
+*                       layer API arguments MUST be provided.
+*
+*               (5) (a) The following parameters MUST be configured PRIOR to initializing the specific
+*                       network interface/device so that the initialized network interface is valid :
+*
+*                       (1) The network interface's initialization flag MUST be set; ...
+*                       (2) The next available interface number MUST be incremented.
+*
+*                   (b) On ANY error(s), network interface parameters MUST be appropriately reset :
+*
+*                       (1) The network interface's initialization flag SHOULD be cleared; ...
+*                       (2) The next available interface number MUST be decremented.
+*********************************************************************************************************
+*/
+
+NET_IF_NBR  NetIF_Add (void     *if_api,
+                       void     *dev_api,
+                       void     *dev_bsp,
+                       void     *dev_cfg,
+                       void     *ext_api,
+                       void     *ext_cfg,
+                       NET_ERR  *p_err)
+{
+    NET_IF       *p_if     = DEF_NULL;
+    NET_IF_API   *p_if_api;
+    NET_IF_NBR    if_nbr   = NET_IF_NBR_NONE;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_NULL);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_Add, p_err);           /* See Note #2b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return (NET_IF_NBR_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail_init;
+    }
+#endif
+
+
+                                                                /* -------------- VALIDATE NET IF AVAIL --------------- */
+    CPU_CRITICAL_ENTER();
+    if_nbr = NetIF_NbrNext;                                     /* Get cur net IF nbr.                                  */
+    CPU_CRITICAL_EXIT();
+    if (if_nbr >= NET_IF_NBR_IF_TOT) {
+       *p_err = NET_IF_ERR_INVALID_IF;
+        goto exit_fail_init;
+    }
+
+    CPU_CRITICAL_ENTER();
+    NetIF_NbrNext++;                                            /* Inc to next avail net IF nbr (see Note #5a2).        */
+    CPU_CRITICAL_EXIT();
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* --------------- VALIDATE IF API PTRS --------------- */
+    if (if_api == DEF_NULL) {                                   /* If NULL IF API,                               ...    */
+       *p_err = NET_ERR_FAULT_NULL_PTR;                         /* ... & rtn err.                                       */
+        goto exit_fail;
+    }
+
+    if (dev_cfg == DEF_NULL) {                                  /* If NULL dev cfg,                              ...    */
+       *p_err = NET_DEV_ERR_NULL_PTR;
+        goto exit_fail;
+    }
+
+    if ((if_nbr  != NET_IF_NBR_LOOPBACK) &&
+        (dev_api == DEF_NULL)){                                 /* For non-loopback IF's,                        ...    */
+                                                                /* ... or NULL dev BSP;                          ...    */
+        *p_err = NET_DEV_ERR_NULL_PTR;
+         goto exit_fail;
+    }
+#endif
+
+
+                                                                /* ------------------- INIT NET IF -------------------- */
+    p_if           = &NetIF_Tbl[if_nbr];
+    p_if->Nbr      =  if_nbr;
+    p_if->IF_API   =  if_api;
+    p_if->Dev_API  =  dev_api;
+    p_if->Dev_BSP  =  dev_bsp;
+    p_if->Dev_Cfg  =  dev_cfg;
+    p_if->Ext_API  =  ext_api;
+    p_if->Ext_Cfg  =  ext_cfg;
+    p_if->En       =  DEF_DISABLED;
+    p_if->Link     =  NET_IF_LINK_DOWN;
+    p_if->LinkPrev =  NET_IF_LINK_DOWN;
+    CPU_CRITICAL_ENTER();
+    p_if->Init     =  DEF_YES;                                  /* See Note #5a1.                                       */
+    CPU_CRITICAL_EXIT();
+
+
+                                                                /* --------------- INIT SPECIFIC NET IF --------------- */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api->Add == (void (*)(NET_IF  *,
+                                  NET_ERR *))0) {               /* If net IF add fnct NOT avail,                   ...  */
+       *p_err =  NET_ERR_FAULT_NULL_FNCT;
+        goto exit_fail;
+    }
+#endif
+
+    NetIF_ObjInit(p_if, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {                            /* On any err(s);                                  ...  */
+         goto exit_fail;
+    }
+
+
+    p_if_api->Add(p_if, p_err);                                 /* Init/add IF & dev.                                   */
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_fail_deinit;
+    }
+
+                                                                /* -------- INIT IP LAYER FOR ADDED INTERFACE --------- */
+    NetIP_IF_Init(if_nbr, p_err);
+    if (*p_err != NET_ERR_NONE) {
+        goto exit_fail_deinit;
+    }
+
+   *p_err = NET_IF_ERR_NONE;
+
+    goto exit_release;
+
+ exit_fail_deinit:
+     NetIF_ObjDel(p_if);
+
+exit_fail:
+    if (p_if != DEF_NULL) {
+        CPU_CRITICAL_ENTER();                                   /* On any err(s);                                  ...   */
+        p_if->Init = DEF_NO;                                    /* ... Clr net IF init           (see Note #5b1) & ...   */
+        NetIF_NbrNext--;                                        /* ... dec next avail net IF nbr (see Note #5b2).        */
+        CPU_CRITICAL_EXIT();
+    }
+exit_fail_init:
+    if_nbr = NET_IF_NBR_NONE;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (if_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_Start()
+*
+* Description : (1) Start a network interface :
+*
+*                   (a) Acquire network lock
+*                   (b) Start   network interface
+*                   (c) Release network lock
+*
+*
+* Argument(s) : if_nbr      Network interface number to start.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface successfully started.
+*                               NET_IF_ERR_INVALID_STATE        Network interface already started.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               -------- RETURNED BY NetIF_Get() : --------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ---- RETURNED BY 'p_if_api->Start()' : -----
+*                                                               See specific network interface(s) 'Start()'
+*                                                                   for additional return error codes.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIF_Start() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) NetIF_Start() blocked until network initialization completes.
+*
+*               (4) Each specific network interface 'Start()' is responsible for setting the initial link
+*                   state after starting a network interface.
+*
+*                   (a) Specific network interface that do not require link state MUST set the network
+*                       interface's link state to 'UP'.
+*********************************************************************************************************
+*/
+
+void  NetIF_Start (NET_IF_NBR   if_nbr,
+                   NET_ERR     *p_err)
+{
+    NET_IF          *p_if;
+    NET_IF_API      *p_if_api;
+#ifdef  NET_MLDP_MODULE_EN
+    NET_IPv6_ADDR  addr_allnode_mcast;
+#endif
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_Start, p_err);         /* See Note #2b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_release;
+    }
+
+    if (p_if->En != DEF_DISABLED) {                              /* If net IF already started, ...                       */
+       *p_err = NET_IF_ERR_INVALID_STATE;                        /* ... rtn err.                                         */
+        goto exit_release;
+    }
+
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        goto exit_release;
+    }
+    if (p_if_api->Start == (void (*)(NET_IF  *,
+                                    NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        goto exit_release;
+    }
+#endif
+
+
+                                                                /* ------------------- START NET IF ------------------- */
+    p_if_api->Start(p_if, p_err);                               /* Init/start IF & dev hw.                              */
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_release;
+    }
+
+    p_if->En = DEF_ENABLED;                                     /* En IF AFTER IF/dev start.                            */
+
+#ifdef   NET_MLDP_MODULE_EN
+    if (p_if->Type != NET_IF_TYPE_LOOPBACK) {
+        NetIPv6_AddrMcastAllNodesSet(&addr_allnode_mcast,       /* Create all-node mcast addr.                          */
+                                      p_err);
+        if (*p_err != NET_IPv6_ERR_NONE) {
+            goto exit_stop;
+        }
+
+        NetMLDP_HostGrpJoinHandler(if_nbr,
+                                  &addr_allnode_mcast,
+                                  p_err);
+        if (*p_err != NET_MLDP_ERR_NONE) {
+             goto exit_stop;
+        }
+    }
+#endif
+
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    p_if->PerfMonState = NET_IF_PERF_MON_STATE_START;           /* Start perf mon.                                      */
+#endif
+
+
+   *p_err = NET_IF_ERR_NONE;
+    goto exit_release;
+
+#ifdef   NET_MLDP_MODULE_EN
+exit_stop:
+    p_if->En = DEF_DISABLED;                                    /* Dis IF AFTER IF/dev start.                           */
+    p_if_api->Stop(p_if, p_err);
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_Stop()
+*
+* Description : (1) Stop a network interface :
+*
+*                   (a) Acquire network lock
+*                   (b) Stop    network interface
+*                   (c) Release network lock
+*
+*
+* Argument(s) : if_nbr      Network interface number to stop.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface successfully stopped.
+*                               NET_IF_ERR_INVALID_STATE        Network interface already stopped.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               ------- RETURNED BY NetIF_Get() : --------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ---- RETURNED BY 'p_if_api->Stop()' : -----
+*                                                               See specific network interface(s) 'Stop()'
+*                                                                   for additional return error codes.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIF_Stop() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) NetIF_Stop() blocked until network initialization completes.
+*
+*               (4) Each specific network interface 'Stop()' SHOULD be responsible for clearing the link
+*                   state after stopping a network interface.  However, clearing the link state to 'DOWN'
+*                   is included for completeness & as an extra precaution in case the specific network
+*                   interface 'Stop()' fails to clear the link state.
+*********************************************************************************************************
+*/
+
+void  NetIF_Stop (NET_IF_NBR   if_nbr,
+                  NET_ERR     *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_Stop, p_err);          /* See Note #2b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_release;
+    }
+
+    if (p_if->En != DEF_ENABLED) {                              /* If net IF NOT started, ...                           */
+       *p_err = NET_IF_ERR_INVALID_STATE;                       /* ... rtn err.                                         */
+        goto exit_release;
+    }
+
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        goto exit_release;
+    }
+    if (p_if_api->Stop == (void (*)(NET_IF  *,
+                                   NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        goto exit_release;
+    }
+#endif
+
+
+                                                                /* ------------------- STOP NET IF -------------------- */
+    p_if_api->Stop(p_if, p_err);                                /* Stop IF & dev hw.                                    */
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_release;
+    }
+
+    p_if->En               = DEF_DISABLED;
+    p_if->Link             = NET_IF_LINK_DOWN;                  /* See Note #4.                                         */
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    p_if->PerfMonState     = NET_IF_PERF_MON_STATE_STOP;
+#endif
+
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_Get()
+*
+* Description : Get a pointer to a network interface.
+*
+* Argument(s) : if_nbr      Network interface number to get.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface successfully returned.
+*
+*                                                               - RETURNED BY NetIF_IsValidHandler() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Pointer to corresponding network interface, if NO error(s).
+*
+*               Pointer to NULL,                            otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) (a) NetIF_Get() is called by network protocol suite function(s) & SHOULD be called
+*                       with the global network lock already acquired.
+*
+*                   (b) (1) However, although acquiring the global network lock is typically required;
+*                           interrupt service routines (ISRs) are (typically) prohibited from pending
+*                           on OS objects & therefore can NOT acquire the global network lock.
+*
+*                       (2) Therefore, ALL network interface & network device driver functions that may
+*                           be called by interrupt service routines MUST be able to be asynchronously
+*                           accessed without acquiring the global network lock AND without corrupting
+*                           any network data or task.
+*
+*                       See also 'NetIF_ISR_Handler()  Note #1b'.
+*********************************************************************************************************
+*/
+
+NET_IF  *NetIF_Get (NET_IF_NBR   if_nbr,
+                    NET_ERR     *p_err)
+{
+    NET_IF  *p_if;
+
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+    if (if_nbr == NET_IF_NBR_NONE) {
+       *p_err = NET_IF_ERR_INVALID_IF;
+        return ((NET_IF *)0);
+    }
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+   (void)NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err !=  NET_IF_ERR_NONE) {
+         return ((NET_IF *)0);
+    }
+#endif
+
+    p_if  = &NetIF_Tbl[if_nbr];
+   *p_err =  NET_IF_ERR_NONE;
+
+    return (p_if);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_GetDflt()
+*
+* Description : Get the interface number of the default network interface; i.e. the first enabled network
+*                   interface with at least one configured host address.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Interface number of the first enabled network interface, if any.
+*
+*               NET_IF_NBR_NONE,                                         otherwise.
+*
+* Caller(s)   : NetSock_BindHandler(),
+*               NetSock_TxDataHandlerDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT  be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_GetDflt() is called by network protocol suite function(s) & MUST be called with
+*                   the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+NET_IF_NBR  NetIF_GetDflt (void)
+{
+    NET_IF       *p_if;
+    NET_IF_NBR    if_nbr;
+    NET_IF_NBR    if_nbr_ix;
+    NET_IF_NBR    if_nbr_next;
+    CPU_BOOLEAN   init;
+    CPU_BOOLEAN   addr_avail;
+    NET_ERR       err;
+    CPU_SR_ALLOC();
+
+
+    if_nbr      = NET_IF_NBR_NONE;
+    if_nbr_ix   = NET_IF_NBR_BASE_CFGD;
+    CPU_CRITICAL_ENTER();
+    if_nbr_next = NetIF_NbrNext;
+    CPU_CRITICAL_EXIT();
+
+    p_if = &NetIF_Tbl[if_nbr_ix];
+
+    while ((if_nbr_ix <  if_nbr_next) &&                        /* Srch ALL cfg'd IF's            ...                   */
+           (if_nbr    == NET_IF_NBR_NONE)) {
+
+        CPU_CRITICAL_ENTER();
+        init = p_if->Init;
+        CPU_CRITICAL_EXIT();
+        if ((init    == DEF_YES) &&                             /* ... for first init'd & en'd IF ...                   */
+            (p_if->En == DEF_ENABLED)) {
+            addr_avail = NetMgr_IsAddrsCfgdOnIF(if_nbr_ix, &err);
+            if (addr_avail == DEF_YES) {                        /* ... with cfg'd host addr(s) avail.                   */
+                if_nbr = p_if->Nbr;
+            }
+#if 1                                                           /* !!!! Req'd temp'rly for sock datagram wildcard.      */
+            if_nbr = p_if->Nbr;
+#endif
+        }
+
+        if (if_nbr == NET_IF_NBR_NONE) {                        /* If NO cfg'd host addr(s) found, ...                  */
+            p_if++;                                             /* ... adv to next IF.                                  */
+            if_nbr_ix++;
+        }
+    }
+
+#if (NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+    if (if_nbr == NET_IF_NBR_NONE) {                            /* If NO init'd, en'd, & cfg'd IF found; ...            */
+        if_nbr  = NET_IF_NBR_LOOPBACK;                          /* ... rtn loopback IF, if en'd/avail.                  */
+    }
+#endif
+
+    return (if_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_GetRxDataAlignPtr()
+*
+* Description : (1) Get aligned pointer into a receive application data buffer :
+*
+*                   (a) Get    pointer to aligned receive application data buffer address       See Note #3
+*                   (b) Return pointer to aligned receive application data buffer address
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*
+* Argument(s) : if_nbr      Network interface number to get a receive application buffer's aligned data
+*                               pointer.
+*
+*               p_data      Pointer to receive application data buffer to get an aligned pointer into
+*                               (see also Note #3b).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               -- RETURNED BY NetIF_GetDataAlignPtr() : --
+*                               NET_IF_ERR_NONE                 Aligned pointer into receive application
+*                                                                   data buffer successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_data' passed a NULL pointer.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_ALIGN_NOT_AVAIL      Alignment between application data buffer &
+*                                                                   network interface's network buffer data
+*                                                                   area(s) NOT possible (see Note #3a1B).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Pointer to aligned receive application data buffer address, if NO error(s).
+*
+*               Pointer to NULL,                                            otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIF_GetRxDataAlignPtr() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'NetIF_GetDataAlignPtr()  Note #1a').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) (a) (1) (A) Optimal alignment between application data buffer(s) & network interface's
+*                               network buffer data area(s) is NOT guaranteed & is possible if & only if
+*                               all of the following conditions are true :
+*
+*                               (1) Network interface's network buffer data area(s) MUST be aligned to a
+*                                   multiple of the CPU's data word size (see 'net_buf.h  NETWORK BUFFER
+*                                   INDEX & SIZE DEFINES  Note #2b2').
+*
+*                           (B) Otherwise, a single, fixed alignment between application data buffer(s) &
+*                               network interface's buffer data area(s) is NOT possible.
+*
+*                       (2) (A) Even when application data buffers & network buffer data areas are aligned
+*                               in the best case; optimal alignment is NOT guaranteed for every read/write
+*                               of data to/from application data buffers & network buffer data areas.
+*
+*                               For any single read/write of data to/from application data buffers & network
+*                               buffer data areas, optimal alignment occurs if & only if all of the following
+*                               conditions are true :
+*
+*                               (1) Data read/written to/from application data buffer(s) to network buffer
+*                                   data area(s) MUST start on addresses with the same relative offset from
+*                                   CPU word-aligned addresses.
+*
+*                                   In other words, the modulus of the specific read/write address in the
+*                                   application data buffer with the CPU's data word size MUST be equal to
+*                                   the modulus of the specific read/write address in the network buffer
+*                                   data area with the CPU's data word size.
+*
+*                                   This condition MIGHT NOT be satisfied whenever :
+*
+*                                   (a) Data is read/written to/from fragmented packets
+*                                   (b) Data is NOT maximally read/written to/from stream-type packets
+*                                           (e.g. TCP data segments)
+*                                   (c) Packets include variable number of header options (e.g. IP options)
+*
+*                           (B) However, even though optimal alignment between application data buffers &
+*                               network buffer data areas is NOT guaranteed for every read/write; optimal
+*                               alignment SHOULD occur more frequently leading to improved network data
+*                               throughput.
+*
+*                   (b) Since the first aligned address in the application data buffer may be 0 to
+*                       (CPU_CFG_DATA_SIZE - 1) octets after the application data buffer's starting
+*                       address, the application data buffer SHOULD allocate & reserve an additional
+*                       (CPU_CFG_DATA_SIZE - 1) number of octets.
+*
+*                       However, the application data buffer's effective, useable size is still limited
+*                       to its original declared size (before reserving additional octets) & SHOULD NOT
+*                       be increased by the additional, reserved octets.
+*
+*                   See also 'NetIF_GetDataAlignPtr()  Note #3'.
+*********************************************************************************************************
+*/
+
+void  *NetIF_GetRxDataAlignPtr (NET_IF_NBR   if_nbr,
+                                void        *p_data,
+                                NET_ERR     *p_err)
+{
+    void  *p_data_align;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((void *)0);
+    }
+#endif
+
+
+    p_data_align = NetIF_GetDataAlignPtr(if_nbr, NET_TRANSACTION_RX, p_data, p_err);
+
+
+    return (p_data_align);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_GetTxDataAlignPtr()
+*
+* Description : (1) Get aligned pointer into a transmit application data buffer :
+*
+*                   (a) Get    pointer to aligned transmit application data buffer address      See Note #3
+*                   (b) Return pointer to aligned transmit application data buffer address
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*
+* Argument(s) : if_nbr      Network interface number to get a transmit application buffer's aligned data
+*                               pointer.
+*
+*               p_data      Pointer to transmit application data buffer to get an aligned pointer into
+*                               (see also Note #3b).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                               -- RETURNED BY NetIF_GetDataAlignPtr() : --
+*                               NET_IF_ERR_NONE                 Aligned pointer into transmit application
+*                                                                   data buffer successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_data' passed a NULL pointer.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_ALIGN_NOT_AVAIL      Alignment between application data buffer &
+*                                                                   network interface's network buffer data
+*                                                                   area(s) NOT possible (see Note #3a1B).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Pointer to aligned transmit application data buffer address, if NO error(s).
+*
+*               Pointer to NULL,                                             otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIF_GetTxDataAlignPtr() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'NetIF_GetDataAlignPtr()  Note #1a').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) (a) (1) (A) Optimal alignment between application data buffer(s) & network interface's
+*                               network buffer data area(s) is NOT guaranteed & is possible if & only if
+*                               all of the following conditions are true :
+*
+*                               (1) Network interface's network buffer data area(s) MUST be aligned to a
+*                                   multiple of the CPU's data word size (see 'net_buf.h  NETWORK BUFFER
+*                                   INDEX & SIZE DEFINES  Note #2b2').
+*
+*                           (B) Otherwise, a single, fixed alignment between application data buffer(s) &
+*                               network interface's buffer data area(s) is NOT possible.
+*
+*                       (2) (A) Even when application data buffers & network buffer data areas are aligned
+*                               in the best case; optimal alignment is NOT guaranteed for every read/write
+*                               of data to/from application data buffers & network buffer data areas.
+*
+*                               For any single read/write of data to/from application data buffers & network
+*                               buffer data areas, optimal alignment occurs if & only if all of the following
+*                               conditions are true :
+*
+*                               (1) Data read/written to/from application data buffer(s) to network buffer
+*                                   data area(s) MUST start on addresses with the same relative offset from
+*                                   CPU word-aligned addresses.
+*
+*                                   In other words, the modulus of the specific read/write address in the
+*                                   application data buffer with the CPU's data word size MUST be equal to
+*                                   the modulus of the specific read/write address in the network buffer
+*                                   data area with the CPU's data word size.
+*
+*                                   This condition MIGHT NOT be satisfied whenever :
+*
+*                                   (a) Data is read/written to/from fragmented packets
+*                                   (b) Data is NOT maximally read/written to/from stream-type packets
+*                                           (e.g. TCP data segments)
+*                                   (c) Packets include variable number of header options (e.g. IP options)
+*
+*                           (B) However, even though optimal alignment between application data buffers &
+*                               network buffer data areas is NOT guaranteed for every read/write; optimal
+*                               alignment SHOULD occur more frequently leading to improved network data
+*                               throughput.
+*
+*                   (b) Since the first aligned address in the application data buffer may be 0 to
+*                       (CPU_CFG_DATA_SIZE - 1) octets after the application data buffer's starting
+*                       address, the application data buffer SHOULD allocate & reserve an additional
+*                       (CPU_CFG_DATA_SIZE - 1) number of octets.
+*
+*                       However, the application data buffer's effective, useable size is still limited
+*                       to its original declared size (before reserving additional octets) & SHOULD NOT
+*                       be increased by the additional, reserved octets.
+*
+*                   See also 'NetIF_GetDataAlignPtr()  Note #3'.
+*********************************************************************************************************
+*/
+
+void  *NetIF_GetTxDataAlignPtr (NET_IF_NBR   if_nbr,
+                                void        *p_data,
+                                NET_ERR     *p_err)
+{
+    void  *p_data_align;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((void *)0);
+    }
+#endif
+    *p_err = NET_IF_ERR_NONE;
+
+    p_data_align = NetIF_GetDataAlignPtr(if_nbr, NET_TRANSACTION_TX, p_data, p_err);
+
+    return (p_data_align);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_GetExtAvailCtr()
+*
+* Description : Return number of external interface configured.
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Number of external interface available
+*
+* Caller(s)   : NetIF_GetExtAvailCtr().
+*               Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetIF_GetExtAvailCtr (NET_ERR  *p_err)
+{
+    CPU_INT08U  nbr  = 0u;
+    CPU_INT08U  init = NET_IF_NBR_BASE;
+
+
+
+#if (NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+    init = NET_IF_NBR_LOOPBACK;
+#endif
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_GetExtAvailCtr, p_err);       /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+        return (DEF_NO);
+    }
+
+    nbr = NetIF_NbrNext - init;
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_GetBaseNbr()
+*
+* Description : Get the interface base number (first interface ID).
+*
+* Argument(s) : none.
+*
+* Return(s)   : Interface base number.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_IF_NBR  NetIF_GetNbrBaseCfgd (void)
+{
+    return (NET_IF_NBR_BASE_CFGD);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_IsValid()
+*
+* Description : Validate network interface number.
+*
+* Argument(s) : if_nbr      Network interface number to validate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               - RETURNED BY NetIF_IsValidHandler() : --
+*                               NET_IF_ERR_NONE                 Network interface successfully validated.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               - RETURNED BY Net_GlobalLockAcquire() : -
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_YES, network interface number   valid.
+*
+*               DEF_NO,  network interface number invalid / NOT yet configured.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_IsValid() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIF_IsValidHandler()  Note #1'.
+*
+*               (2) NetIF_IsValid() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_IsValid (NET_IF_NBR   if_nbr,
+                            NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_NO);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_IsValid, p_err);       /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return (DEF_NO);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    valid = NetIF_IsValidHandler(if_nbr, p_err);
+    goto exit_release;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    valid = DEF_NO;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_IsValidHandler()
+*
+* Description : Validate network interface number.
+*
+* Argument(s) : if_nbr      Network interface number to validate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface successfully validated.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : DEF_YES, network interface number   valid.
+*
+*               DEF_NO,  network interface number invalid / NOT yet configured.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1a].
+*
+* Note(s)     : (1) (a) NetIF_IsValidHandler() is called by network protocol suite function(s) & SHOULD
+*                       be called with the global network lock already acquired.
+*
+*                       See also 'NetIF_IsValid()  Note #1'.
+*
+*                   (b) (1) However, although acquiring the global network lock is typically required;
+*                           interrupt service routines (ISRs) are (typically) prohibited from pending
+*                           on OS objects & therefore can NOT acquire the global network lock.
+*
+*                       (2) Therefore, ALL network interface & network device driver functions that may
+*                           be called by interrupt service routines MUST be able to be asynchronously
+*                           accessed without acquiring the global network lock AND without corrupting
+*                           any network data or task.
+*
+*                       (3) Thus the following variables MUST ALWAYS be accessed exclusively in critical
+*                           sections :
+*
+*                           (A) 'NetIF_NbrNext'
+*                           (B)  Network interfaces 'Init'
+*
+*                       See also 'NetIF_ISR_Handler()  Note #1b'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_IsValidHandler (NET_IF_NBR   if_nbr,
+                                   NET_ERR     *p_err)
+{
+    NET_IF       *p_if;
+    NET_IF_NBR    if_nbr_next;
+    CPU_BOOLEAN   init;
+    CPU_SR_ALLOC();
+
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+    CPU_CRITICAL_ENTER();
+    if_nbr_next = NetIF_NbrNext;
+    CPU_CRITICAL_EXIT();
+    if (if_nbr >= if_nbr_next) {
+       *p_err =  NET_IF_ERR_INVALID_IF;
+        return (DEF_NO);
+    }
+
+                                                                /* ----------------- VALIDATE NET IF ------------------ */
+    p_if  = &NetIF_Tbl[if_nbr];
+    CPU_CRITICAL_ENTER();
+    init =  p_if->Init;
+    CPU_CRITICAL_EXIT();
+    if (init != DEF_YES) {
+       *p_err  = NET_IF_ERR_INVALID_IF;
+        return (DEF_NO);
+    }
+
+
+   *p_err =  NET_IF_ERR_NONE;
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_IsValidCfgd()
+*
+* Description : Validate configured network interface number.
+*
+* Argument(s) : if_nbr      Network interface number to validate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_NONE                 Network interface successfully validated.
+*                               NET_IF_ERR_INVALID_IF           Invalid configured network interface number.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_YES, network interface number   valid.
+*
+*               DEF_NO,  network interface number invalid / NOT yet configured or reserved.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_IsValidCfgd() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIF_IsValidCfgdHandler()  Note #1'.
+*
+*               (2) NetIF_IsValidCfgd() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_IsValidCfgd (NET_IF_NBR   if_nbr,
+                                NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_NO);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_IsValidCfgd, p_err);   /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return (DEF_NO);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    valid = NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    goto exit_release;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    valid = DEF_NO;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_IsValidCfgdHandler()
+*
+* Description : Validate configured network interface number.
+*
+* Argument(s) : if_nbr      Network interface number to validate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface successfully validated.
+*                               NET_IF_ERR_INVALID_IF           Invalid configured network interface number.
+*
+* Return(s)   : DEF_YES, network interface number   valid.
+*
+*               DEF_NO,  network interface number invalid / NOT yet configured or reserved.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_IsValidCfgdHandler() is called by network protocol suite function(s) & MUST be
+*                   called with the global network lock already acquired.
+*
+*                   See also 'NetIF_IsValidCfgd()  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_IsValidCfgdHandler (NET_IF_NBR   if_nbr,
+                                       NET_ERR     *p_err)
+{
+    NET_IF       *p_if;
+    NET_IF_NBR    if_nbr_next;
+    CPU_BOOLEAN   init;
+    CPU_SR_ALLOC();
+
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+    CPU_CRITICAL_ENTER();
+    if_nbr_next = NetIF_NbrNext;
+    CPU_CRITICAL_EXIT();
+    if ((if_nbr <  NET_IF_NBR_BASE_CFGD) ||
+        (if_nbr >= if_nbr_next)) {
+       *p_err =  NET_IF_ERR_INVALID_IF;
+        return (DEF_NO);
+    }
+
+                                                                /* ----------------- VALIDATE NET IF ------------------ */
+    p_if  = &NetIF_Tbl[if_nbr];
+    CPU_CRITICAL_ENTER();
+    init =  p_if->Init;
+    CPU_CRITICAL_EXIT();
+    if (init != DEF_YES) {
+       *p_err =  NET_IF_ERR_INVALID_IF;
+        return (DEF_NO);
+    }
+
+
+   *p_err =  NET_IF_ERR_NONE;
+
+    return (DEF_YES);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_IsEn()
+*
+* Description : Validate network interface as enabled.
+*
+* Argument(s) : if_nbr      Network interface number to validate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               ---- RETURNED BY NetIF_IsEnHandler() : -----
+*                               NET_IF_ERR_NONE                 Network interface successfully validated
+*                                                                   as enabled.
+*                               NET_IF_ERR_INVALID_IF           Invalid OR disabled network interface.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_YES, network interface   valid  &  enabled.
+*
+*               DEF_NO,  network interface invalid or disabled.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_IsEn() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIF_IsEnHandler()  Note #1'.
+*
+*               (2) NetIF_IsEn() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_IsEn (NET_IF_NBR   if_nbr,
+                         NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  en;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_NO);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_IsEn, p_err);          /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return (DEF_NO);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+                                                                /* --------------- VALIDATE NET IF EN'D --------------- */
+    en = NetIF_IsEnHandler(if_nbr, p_err);
+    goto exit_release;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   en = DEF_NO;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (en);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_IsEnHandler()
+*
+* Description : Validate network interface as enabled.
+*
+* Argument(s) : if_nbr      Network interface number to validate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface successfully validated
+*                                                                   as enabled.
+*                               NET_IF_ERR_INVALID_IF           Invalid OR disabled network interface.
+*
+* Return(s)   : DEF_YES, network interface   valid  &  enabled.
+*
+*               DEF_NO,  network interface invalid or disabled.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_IsEnHandler() is called by network protocol suite function(s) & MUST be called
+*                   with the global network lock already acquired.
+*
+*                   See also 'NetIF_IsEn()  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_IsEnHandler (NET_IF_NBR   if_nbr,
+                                NET_ERR     *p_err)
+{
+    NET_IF       *p_if;
+    CPU_BOOLEAN   en;
+
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (DEF_NO);
+    }
+
+                                                                /* --------------- VALIDATE NET IF EN'D --------------- */
+    p_if = &NetIF_Tbl[if_nbr];
+    if (p_if->En == DEF_ENABLED) {
+        en   = DEF_YES;
+       *p_err = NET_IF_ERR_NONE;
+    } else {
+        en   = DEF_NO;
+       *p_err = NET_IF_ERR_INVALID_IF;
+    }
+
+    return (en);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetIF_IsEnCfgd()
+*
+* Description : Validate configured network interface as enabled.
+*
+* Argument(s) : if_nbr      Network interface number to validate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               -- RETURNED BY NetIF_IsEnCfgdHandler() : ---
+*                               NET_IF_ERR_NONE                 Network interface successfully validated
+*                                                                   as enabled.
+*                               NET_IF_ERR_INVALID_IF           Invalid OR disabled network interface.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_YES, network interface   valid  &  enabled.
+*
+*               DEF_NO,  network interface invalid or disabled.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_IsEnCfgd() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIF_IsEnCfgdHandler()  Note #1'.
+*
+*               (2) NetIF_IsEnCfgd() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_IsEnCfgd (NET_IF_NBR   if_nbr,
+                             NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  en;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_NO);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_IsEnCfgd, p_err);      /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return (DEF_NO);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+                                                                /* --------------- VALIDATE NET IF EN'D --------------- */
+    en = NetIF_IsEnCfgdHandler(if_nbr, p_err);
+    goto exit_release;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   en = DEF_NO;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (en);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_IsEnCfgdHandler()
+*
+* Description : Validate configured network interface as enabled.
+*
+* Argument(s) : if_nbr      Network interface number to validate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface successfully validated
+*                                                                   as enabled.
+*                               NET_IF_ERR_INVALID_IF           Invalid OR disabled network interface.
+*
+* Return(s)   : DEF_YES, network interface   valid  &  enabled.
+*
+*               DEF_NO,  network interface invalid or disabled.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_IsEnCfgdHandler() is called by network protocol suite function(s) & MUST be
+*                   called with the global network lock already acquired.
+*
+*                   See also 'NetIF_IsEnCfgd()  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_IsEnCfgdHandler (NET_IF_NBR   if_nbr,
+                                    NET_ERR     *p_err)
+{
+    NET_IF       *p_if;
+    CPU_BOOLEAN   en;
+
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (DEF_NO);
+    }
+
+                                                                /* --------------- VALIDATE NET IF EN'D --------------- */
+    p_if = &NetIF_Tbl[if_nbr];
+    if (p_if->En == DEF_ENABLED) {
+        en    = DEF_YES;
+       *p_err = NET_IF_ERR_NONE;
+    } else {
+        en    = DEF_NO;
+       *p_err = NET_IF_ERR_INVALID_IF;
+    }
+
+    return (en);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_AddrHW_Get()
+*
+* Description : Get network interface's hardware address.
+*
+* Argument(s) : if_nbr      Network interface number to get hardware address.
+*
+*               p_addr_hw   Pointer to variable that will receive the hardware address (see Note #3).
+*
+*               p_addr_len  Pointer to a variable to ... :
+*
+*                               (a) Pass the length of the address buffer pointed to by 'p_addr'.
+*                               (b) (1) Return the actual size of the protocol address, if NO error(s);
+*                                   (2) Return 0,                                       otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               --- RETURNED BY NetIF_AddrHW_GetHandler() : ----
+*                               NET_IF_ERR_NONE                 Network interface's hardware address
+*                                                                   successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_addr_hw'/'p_addr_len' passed a
+*                                                                   NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+*                                                               See specific network interface(s) 'AddrHW_Get()'
+*                                                                   for additional return error codes.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_AddrHW_Get() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIF_AddrHW_GetHandler()  Note #1'.
+*
+*               (2) NetIF_AddrHW_Get() blocked until network initialization completes.
+*
+*               (3) The hardware address is returned in network-order; i.e. the pointer to the hardware
+*                   address points to the highest-order octet.
+*********************************************************************************************************
+*/
+
+void  NetIF_AddrHW_Get (NET_IF_NBR   if_nbr,
+                        CPU_INT08U  *p_addr_hw,
+                        CPU_INT08U  *p_addr_len,
+                        NET_ERR     *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_AddrHW_Get, p_err);    /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+                                                                /* ---------------- GET NET IF HW ADDR ---------------- */
+    NetIF_AddrHW_GetHandler(if_nbr, p_addr_hw, p_addr_len, p_err);
+
+    goto exit_release;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_AddrHW_GetHandler()
+*
+* Description : Get network interface's hardware address.
+*
+* Argument(s) : if_nbr      Network interface number to get hardware address.
+*
+*               p_addr_hw   Pointer to variable that will receive the hardware address (see Note #2).
+*
+*               p_addr_len  Pointer to a variable to ... :
+*
+*                               (a) Pass the length of the address buffer pointed to by 'p_addr_hw'.
+*                               (b) (1) Return the actual size of the protocol address, if NO error(s);
+*                                   (2) Return 0,                                       otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's hardware address
+*                                                                   successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_addr_hw'/'p_addr_len' passed a
+*                                                                   NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*
+*                                                               ---------- RETURNED BY NetIF_Get() : -----------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ---- RETURNED BY 'p_if_api->AddrHW_Get()' : -----
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+*                                                               See specific network interface(s) 'AddrHW_Get()'
+*                                                                   for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrHW_Get().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_AddrHW_GetHandler() is called by network protocol suite function(s) & MUST be
+*                   called with the global network lock already acquired.
+*
+*                   See also 'NetIF_AddrHW_Get()  Note #1'.
+*
+*               (2) The hardware address is returned in network-order; i.e. the pointer to the hardware
+*                   address points to the highest-order octet.
+*
+*               (3) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+void  NetIF_AddrHW_GetHandler (NET_IF_NBR   if_nbr,
+                               CPU_INT08U  *p_addr_hw,
+                               CPU_INT08U  *p_addr_len,
+                               NET_ERR     *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+    CPU_INT08U   addr_len;
+
+                                                                /* ---------------- VALIDATE ADDR PTRS ---------------- */
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_addr_len == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+    addr_len   = *p_addr_len;
+   *p_addr_len =  0u;                                           /* Init len for err (see Note #3).                      */
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_addr_hw == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_if_api->AddrHW_Get == (void (*)(NET_IF     *,
+                                         CPU_INT08U *,
+                                         CPU_INT08U *,
+                                         NET_ERR    *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+                                                                /* ---------------- GET NET IF HW ADDR ---------------- */
+    p_if_api->AddrHW_Get(p_if, p_addr_hw, &addr_len, p_err);
+   *p_addr_len = addr_len;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_AddrHW_Set()
+*
+* Description : Set network interface's hardware address.
+*
+* Argument(s) : if_nbr      Network interface number to set hardware address.
+*
+*               p_addr_hw   Pointer to hardware address (see Note #3).
+*
+*               addr_len    Length  of hardware address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               --- RETURNED BY NetIF_AddrHW_SetHandler() : ----
+*                               NET_IF_ERR_NONE                 Network interface's hardware address
+*                                                                   successfully set.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_addr_hw' passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_INVALID_STATE        Invalid network interface state (see Note #4).
+*                               NET_IF_ERR_INVALID_ADDR         Invalid hardware address.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+*                                                               See specific network interface(s) 'AddrHW_Set()'
+*                                                                   for additional return error codes.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_AddrHW_Set() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIF_AddrHW_SetHandler()  Note #1'.
+*
+*               (2) NetIF_AddrHW_Set() blocked until network initialization completes.
+*
+*               (3) The hardware address MUST be in network-order; i.e. the pointer to the hardware
+*                   address MUST point to the highest-order octet.
+*
+*               (4) The interface MUST be stopped BEFORE setting a new hardware address, which does
+*                   NOT take effect until the interface is re-started.
+*********************************************************************************************************
+*/
+
+void  NetIF_AddrHW_Set (NET_IF_NBR   if_nbr,
+                        CPU_INT08U  *p_addr_hw,
+                        CPU_INT08U   addr_len,
+                        NET_ERR     *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_AddrHW_Set, p_err);    /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+                                                                /* ---------------- SET NET IF HW ADDR ---------------- */
+    NetIF_AddrHW_SetHandler(if_nbr, p_addr_hw, addr_len, p_err);
+
+    goto exit_release;
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_AddrHW_SetHandler()
+*
+* Description : Set network interface's hardware address.
+*
+* Argument(s) : if_nbr      Network interface number to set hardware address.
+*
+*               p_addr_hw   Pointer to hardware address (see Note #2).
+*
+*               addr_len    Length  of hardware address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's hardware address
+*                                                                   successfully set.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_addr_hw' passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_IF_ERR_INVALID_STATE        Invalid network interface state (see Note #3).
+*
+*                                                               ---------- RETURNED BY NetIF_Get() : -----------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ---- RETURNED BY 'p_if_api->AddrHW_Set()' : -----
+*                               NET_IF_ERR_INVALID_ADDR         Invalid hardware address.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+*                                                               See specific network interface(s) 'AddrHW_Set()'
+*                                                                   for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrHW_Set().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_AddrHW_SetHandler() is called by network protocol suite function(s) & MUST
+*                   be called with the global network lock already acquired.
+*
+*                   See also 'NetIF_AddrHW_Set()  Note #1'.
+*
+*               (2) The hardware address MUST be in network-order; i.e. the pointer to the hardware
+*                   address MUST point to the highest-order octet.
+*
+*               (3) The interface MUST be stopped BEFORE setting a new hardware address, which does
+*                   NOT take effect until the interface is re-started.
+*********************************************************************************************************
+*/
+
+void  NetIF_AddrHW_SetHandler (NET_IF_NBR   if_nbr,
+                               CPU_INT08U  *p_addr_hw,
+                               CPU_INT08U   addr_len,
+                               NET_ERR     *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+
+                                                                /* ---------------- VALIDATE ADDR PTR ----------------- */
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_addr_hw == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+    if (p_if->En != DEF_DISABLED) {                              /* If net IF NOT dis'd (see Note #3), ...               */
+       *p_err = NET_IF_ERR_INVALID_STATE;                        /* ... rtn err.                                         */
+        return;
+    }
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_if_api->AddrHW_Set == (void (*)(NET_IF     *,
+                                         CPU_INT08U *,
+                                         CPU_INT08U  ,
+                                         NET_ERR    *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+                                                                /* ---------------- SET NET IF HW ADDR ---------------- */
+    p_if_api->AddrHW_Set(p_if, p_addr_hw, addr_len, p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_AddrHW_IsValid()
+*
+* Description : Validate network interface's hardware address.
+*
+* Argument(s) : if_nbr      Interface number to validate the hardware address.
+*
+*               p_addr_hw   Pointer to an interface hardware address (see Note #3).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               - RETURNED BY NetIF_AddrHW_IsValidHandler() : -
+*                               NET_IF_ERR_NONE                 Network interface's hardware address
+*                                                                   successfully validated.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_addr_hw' passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_YES, if hardware address valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_AddrHW_IsValid() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIF_AddrHW_IsValidHandler()  Note #1'.
+*
+*               (2) NetIF_AddrHW_IsValid() blocked until network initialization completes.
+*
+*               (3) The hardware address MUST be in network-order; i.e. the pointer to the hardware
+*                   address MUST point to the highest-order octet.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_AddrHW_IsValid (NET_IF_NBR   if_nbr,
+                                   CPU_INT08U  *p_addr_hw,
+                                   NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_NO);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetIF_AddrHW_IsValid, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return (DEF_NO);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+                                                                /* ------------- VALIDATE NET IF HW ADDR -------------- */
+    valid = NetIF_AddrHW_IsValidHandler(if_nbr, p_addr_hw, p_err);
+    goto exit_release;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    valid = DEF_NO;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_AddrHW_IsValidHandler()
+*
+* Description : Validate network interface's hardware address.
+*
+* Argument(s) : if_nbr      Interface number to validate the hardware address.
+*
+*               p_addr_hw   Pointer to an interface hardware address (see Note #2).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's hardware address
+*                                                                   successfully validated.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_addr_hw' passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*
+*                                                               ------- RETURNED BY NetIF_Get() : --------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : DEF_YES, if hardware address valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIF_AddrHW_IsValid().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_AddrHW_IsValidHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetIF_AddrHW_IsValid()  Note #1'.
+*
+*               (2) The hardware address MUST be in network-order; i.e. the pointer to the hardware
+*                   address MUST point to the highest-order octet.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_AddrHW_IsValidHandler (NET_IF_NBR   if_nbr,
+                                          CPU_INT08U  *p_addr_hw,
+                                          NET_ERR     *p_err)
+{
+    NET_IF       *p_if;
+    NET_IF_API   *p_if_api;
+    CPU_BOOLEAN   valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ADDR PTR ----------------- */
+    if (p_addr_hw == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (DEF_NO);
+    }
+#endif
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (DEF_NO);
+    }
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err =  NET_IF_ERR_INVALID_CFG;
+        return (DEF_NO);
+    }
+    if (p_if_api->AddrHW_IsValid == (CPU_BOOLEAN (*)(NET_IF     *,
+                                                    CPU_INT08U *))0) {
+       *p_err =  NET_ERR_FAULT_NULL_FNCT;
+        return (DEF_NO);
+    }
+#endif
+
+                                                                /* ------------- VALIDATE NET IF HW ADDR -------------- */
+    valid = p_if_api->AddrHW_IsValid(p_if, p_addr_hw);
+   *p_err = NET_IF_ERR_NONE;
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_AddrMulticastAdd()
+*
+* Description : Add a multicast address to a network interface.
+*
+* Argument(s) : if_nbr                  Interface number to add a multicast address.
+*
+*               p_addr_protocol         Pointer to a multicast protocol address to add (see Note #1).
+*
+*               addr_protocol_len       Length of the protocol address, in octets.
+*
+*               addr_protocol_type      Protocol address type.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Multicast address successfully added.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_addr_protocol' passed a NULL pointer.
+*
+*                                                               ---------- RETURNED BY NetIF_Get() : -----------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               - RETURNED BY 'p_if_api->AddrMulticastAdd()' : --
+*                               NET_ERR_FAULT_FEATURE_DIS              Disabled API function.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware/protocol address length.
+*                               NET_IF_ERR_INVALID_PROTOCOL     Invalid network  protocol.
+*
+*                                                               See specific network interface(s)
+*                                                                   'AddrMulticastAdd()' for
+*                                                                   additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_HostGrpAdd().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) The multicast protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+#ifdef  NET_MCAST_MODULE_EN
+void  NetIF_AddrMulticastAdd (NET_IF_NBR          if_nbr,
+                              CPU_INT08U         *p_addr_protocol,
+                              CPU_INT08U          addr_protocol_len,
+                              NET_PROTOCOL_TYPE   addr_protocol_type,
+                              NET_ERR            *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTRS ------------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit;
+    }
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        goto exit;
+    }
+    if (p_if_api->AddrMulticastAdd == (void (*)(NET_IF          *,
+                                               CPU_INT08U      *,
+                                               CPU_INT08U       ,
+                                               NET_PROTOCOL_TYPE,
+                                               NET_ERR         *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        goto exit;
+    }
+#endif
+
+                                                                /* ----------- ADD MULTICAST ADDR TO NET IF ----------- */
+    p_if_api->AddrMulticastAdd(p_if,
+                              p_addr_protocol,
+                              addr_protocol_len,
+                              addr_protocol_type,
+                              p_err);
+    switch (*p_err) {
+        case NET_DEV_ERR_NONE:
+        case NET_IF_ERR_NONE:
+             break;
+
+        case NET_ERR_FAULT_NULL_FNCT:
+        case NET_ERR_FAULT_FEATURE_DIS:
+        case NET_IF_ERR_INVALID_CFG:
+        case NET_IF_ERR_INVALID_ADDR_LEN:
+        case NET_IF_ERR_INVALID_PROTOCOL:
+             goto exit;
+
+        case NET_DEV_ERR_INIT:
+        case NET_DEV_ERR_FAULT:
+        case NET_DEV_ERR_NULL_PTR:
+        case NET_DEV_ERR_MEM_ALLOC:
+        case NET_DEV_ERR_DEV_OFF:
+            *p_err = NET_IF_ERR_DEV_FAULT;
+             goto exit;
+
+        default:
+            *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+             goto exit;
+    }
+
+    *p_err = NET_IF_ERR_NONE;
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_AddrMulticastRemove()
+*
+* Description : Remove a multicast address from a network interface.
+*
+* Argument(s) : if_nbr                  Interface number to remove a multicast address.
+*
+*               p_addr_protocol         Pointer to a multicast protocol address to remove (see Note #1).
+*
+*               addr_protocol_len       Length of the protocol address, in octets.
+*
+*               addr_protocol_type      Protocol address type.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Multicast address successfully removed.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_addr_protocol' passed a NULL pointer.
+*
+*                                                               ----------- RETURNED BY NetIF_Get() : ------------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               - RETURNED BY 'p_if_api->AddrMulticastRemove()' : -
+*                               NET_ERR_FAULT_FEATURE_DIS              Disabled API function.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware/protocol address length.
+*                               NET_IF_ERR_INVALID_PROTOCOL     Invalid network  protocol.
+*
+*                                                               See specific network interface(s)
+*                                                                   'AddrMulticastRemove()' for
+*                                                                   additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_HostGrpRemove().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) The multicast protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_MCAST_MODULE_EN
+void  NetIF_AddrMulticastRemove (NET_IF_NBR          if_nbr,
+                                 CPU_INT08U         *p_addr_protocol,
+                                 CPU_INT08U          addr_protocol_len,
+                                 NET_PROTOCOL_TYPE   addr_protocol_type,
+                                 NET_ERR            *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTRS ------------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_if_api->AddrMulticastRemove == (void (*)(NET_IF          *,
+                                                  CPU_INT08U      *,
+                                                  CPU_INT08U       ,
+                                                  NET_PROTOCOL_TYPE,
+                                                  NET_ERR         *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+                                                                /* -------- REMOVE MULTICAST ADDR FROM NET IF --------- */
+    p_if_api->AddrMulticastRemove(p_if,
+                                 p_addr_protocol,
+                                 addr_protocol_len,
+                                 addr_protocol_type,
+                                 p_err);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NetIF_AddrMulticastProtocolToHW()
+*
+* Description : Convert a multicast protocol address into a hardware address.
+*
+* Argument(s) : if_nbr                  Interface number to convert address.
+*
+*               p_addr_protocol         Pointer to a multicast protocol address to convert (see Note #1a).
+*
+*               addr_protocol_len       Length of the protocol address, in octets.
+*
+*               addr_protocol_type      Protocol address type.
+*
+*               p_addr_hw               Pointer to a variable that will receive the hardware address
+*                                           (see Note #1b).
+*
+*               p_addr_hw_len            Pointer to a variable to ... :
+*
+*                                           (a) Pass the length of the hardware address, in octets.
+*                                           (b) (1) Return the actual length of the hardware address,
+*                                                       in octets, if NO error(s);
+*                                               (2) Return 0, otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Protocol address successfully converted.
+*                               NET_ERR_FAULT_NULL_PTR             Argument(s) passed a NULL pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               -------------- RETURNED BY NetIF_Get() : ---------------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               - RETURNED BY 'p_if_api->AddrMulticastProtocolToHW()' : -
+*                               NET_ERR_FAULT_FEATURE_DIS              Disabled API function.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware/protocol address length.
+*                               NET_IF_ERR_INVALID_PROTOCOL     Invalid network  protocol.
+*
+*                                                               See specific network interface(s)
+*                                                                   'AddrMulticastProtocolToHW()' for
+*                                                                   additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_CacheHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) The multicast protocol address MUST be in network-order.
+*
+*                   (b) The hardware address is returned in network-order; i.e. the pointer to the
+*                       hardware address points to the highest-order octet.
+*
+*               (2) Since 'p_addr_hw_len' argument is both an input & output argument (see 'Argument(s) :
+*                   p_addr_hw_len'), ... :
+*
+*                   (a) Its input value SHOULD be validated prior to use; ...
+*                       (1) In the case that the 'p_addr_len' argument is passed a null pointer,
+*                           NO input value is validated or used.
+*
+*                   (b) While its output value MUST be initially configured to return a default value
+*                       PRIOR to all other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+#ifdef  NET_MCAST_TX_MODULE_EN
+void  NetIF_AddrMulticastProtocolToHW (NET_IF_NBR          if_nbr,
+                                       CPU_INT08U         *p_addr_protocol,
+                                       CPU_INT08U          addr_protocol_len,
+                                       NET_PROTOCOL_TYPE   addr_protocol_type,
+                                       CPU_INT08U         *p_addr_hw,
+                                       CPU_INT08U         *p_addr_hw_len,
+                                       NET_ERR            *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+    CPU_INT08U   addr_hw_len;
+
+                                                                /* ------------------ VALIDATE ADDRS ------------------ */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_hw_len == (CPU_INT08U *)0) {                      /* See Note #2a1.                                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+     addr_hw_len = *p_addr_hw_len;
+#endif
+   *p_addr_hw_len =  0u;                                         /* Cfg dflt addr len for err (see Note #2b).            */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+    if (p_addr_hw == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_if_api->AddrMulticastProtocolToHW == (void (*)(NET_IF          *,
+                                                        CPU_INT08U      *,
+                                                        CPU_INT08U       ,
+                                                        NET_PROTOCOL_TYPE,
+                                                        CPU_INT08U      *,
+                                                        CPU_INT08U      *,
+                                                        NET_ERR         *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+                                                                /* -------------- CONVERT MULTICAST ADDR -------------- */
+    p_if_api->AddrMulticastProtocolToHW(p_if,
+                                       p_addr_protocol,
+                                       addr_protocol_len,
+                                       addr_protocol_type,
+                                       p_addr_hw,
+                                      &addr_hw_len,
+                                       p_err);
+
+   *p_addr_hw_len = addr_hw_len;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_MTU_Get()
+*
+* Description : Get network interface's MTU.
+*
+* Argument(s) : if_nbr      Network interface number to get MTU.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's MTU successfully returned.
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               --------- RETURNED BY NetIF_Get() : ----------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Network interface's MTU, if NO error(s).
+*
+*               0,                       otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_MTU_Get() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetIF_MTU_Get() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+NET_MTU  NetIF_MTU_Get (NET_IF_NBR   if_nbr,
+                        NET_ERR     *p_err)
+{
+    NET_IF   *p_if;
+    NET_MTU   mtu;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_MTU)0);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_MTU_Get, p_err);       /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return (0u);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_fail;
+    }
+
+                                                                /* ------------------ GET NET IF MTU ------------------ */
+    mtu = p_if->MTU;
+    goto exit_release;
+
+
+exit_fail:
+    mtu = 0;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (mtu);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_MTU_GetProtocol()
+*
+* Description : Get network interface's MTU for desired protocol layer.
+*
+* Argument(s) : if_nbr      Network interface number to get MTU.
+*
+*               protocol    Desired protocol layer of network interface MTU.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's MTU successfully returned.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid network protocol.
+*
+*                                                               --------- RETURNED BY NetIF_Get() : ----------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Network interface's MTU at desired protocol, if NO error(s).
+*
+*               0,                                           otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_MTU  NetIF_MTU_GetProtocol (NET_IF_NBR          if_nbr,
+                                NET_PROTOCOL_TYPE   protocol,
+                                NET_IF_FLAG         opt,
+                                NET_ERR            *p_err)
+{
+    NET_IF      *p_if         = DEF_NULL;
+    NET_IF_API  *p_if_api     = DEF_NULL;
+    NET_MTU      mtu          = 0u;
+    CPU_INT16U   pkt_size_hdr = 0u;
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit;
+    }
+
+                                                                /* ------------- CALC PROTOCOL LAYER MTU -------------- */
+
+    pkt_size_hdr = NetIF_GetProtocolHdrSize(DEF_NULL, protocol, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit;
+    }
+
+
+    if (protocol == NET_PROTOCOL_TYPE_LINK) {
+        p_if_api = p_if->IF_API;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+             if (p_if_api == DEF_NULL) {
+                *p_err =  NET_IF_ERR_INVALID_CFG;
+                 goto exit;
+             }
+             if (p_if_api->GetPktSizeHdr == DEF_NULL) {
+                *p_err =  NET_ERR_FAULT_NULL_FNCT;
+                 goto exit;
+             }
+#endif
+             pkt_size_hdr +=  p_if_api->GetPktSizeHdr(p_if);
+    }
+
+
+    mtu = p_if->MTU - pkt_size_hdr;
+
+   (void)&opt;
+
+exit:
+    return (mtu);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_GetPayloadRxMax()
+*
+* Description : Get maximum payload that can be received.
+*
+* Argument(s) : if_nbr      Network interface number to get payload.
+*
+*               protocol    Desired protocol layer of network interface.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's MTU successfully returned.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid network protocol.
+*
+*                                                               --------- RETURNED BY NetIF_Get() : ----------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Rx payload max
+*
+* Caller(s)   : NetTCP_RxConnWinSizeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetIF_GetPayloadRxMax (NET_IF_NBR          if_nbr,
+                                   NET_PROTOCOL_TYPE   protocol,
+                                   NET_ERR            *p_err)
+{
+    NET_IF        *p_if;
+    NET_BUF_SIZE   buf_size = 0u;
+    CPU_INT16U     hdr_size = 0u;
+    CPU_INT16U     payload  = 0u;
+
+
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit;
+    }
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    buf_size = NetIF_GetPktSizeMax(if_nbr, p_err);
+    hdr_size = NetIF_GetProtocolHdrSize(p_if, protocol, p_err);
+
+    payload  = buf_size - hdr_size;
+
+
+exit:
+    return (payload);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_GetPayloadTxMax()
+*
+* Description : Get maximum payload that can be transmitted.
+*
+* Argument(s) : if_nbr      Network interface number to get payload.
+*
+*               protocol    Desired protocol layer of network interface MTU.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's MTU successfully returned.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid network protocol.
+*
+*                                                               --------- RETURNED BY NetIF_Get() : ----------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Maximum Transmit payload.
+*
+* Caller(s)   : NetTCP_TxConnSync().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetIF_GetPayloadTxMax (NET_IF_NBR          if_nbr,
+                                   NET_PROTOCOL_TYPE   protocol,
+                                   NET_ERR            *p_err)
+{
+    NET_IF        *p_if;
+    CPU_INT16U     hdr_size = 0u;
+    CPU_INT16U     payload  = 0u;
+
+
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit;
+    }
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    hdr_size = NetIF_GetProtocolHdrSize(DEF_NULL, protocol, p_err);
+    payload  = p_if->MTU - hdr_size;
+
+exit:
+    return (payload);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_MTU_Set()
+*
+* Description : Set network interface's MTU.
+*
+* Argument(s) : if_nbr      Network interface number to set MTU.
+*
+*               mtu         Desired maximum transmission unit size to configure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               --- RETURNED BY NetIF_MTU_SetHandler() : ----
+*                               NET_IF_ERR_NONE                 Network interface's MTU successfully set.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_INVALID_MTU          Invalid network interface MTU.
+*
+*                                                               See specific network interface(s) 'MTU_Set()'
+*                                                                   for additional return error codes.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_MTU_Set() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetIF_MTU_Set() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+void  NetIF_MTU_Set (NET_IF_NBR   if_nbr,
+                     NET_MTU      mtu,
+                     NET_ERR     *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_MTU_Set, p_err);       /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+                                                                /* ------------------ SET NET IF MTU ------------------ */
+    NetIF_MTU_SetHandler(if_nbr, mtu, p_err);
+
+    goto exit_release;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_GetPktSizeMin()
+*
+* Description : Get network interface's minimum packet size.
+*
+* Argument(s) : if_nbr      Network interface number to get minimum packet size.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's minimum packet size
+*                                                                   successfully returned.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               ------ RETURNED BY NetIF_Get() : ------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Network interface's minimum packet size, if NO error(s).
+*
+*               0,                                       otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetIF_GetPktSizeMin (NET_IF_NBR   if_nbr,
+                                 NET_ERR     *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+    CPU_INT16U   pkt_size_min;
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (0u);
+    }
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err =  NET_IF_ERR_INVALID_CFG;
+        return (0u);
+    }
+    if (p_if_api->GetPktSizeMin == (CPU_INT16U (*)(NET_IF *))0) {
+       *p_err =  NET_ERR_FAULT_NULL_FNCT;
+        return (0u);
+    }
+#endif
+
+                                                                /* ------------- GET NET IF MIN PKT SIZE -------------- */
+    pkt_size_min = p_if_api->GetPktSizeMin(p_if);
+
+   *p_err =  NET_IF_ERR_NONE;
+
+    return (pkt_size_min);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_GetPktSizeMax()
+*
+* Description : Get network interface's maximum packet size.
+*
+* Argument(s) : if_nbr      Network interface number to get minimum packet size.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's minimum packet size
+*                                                                   successfully returned.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               ------ RETURNED BY NetIF_Get() : ------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Network interface's minimum packet size, if NO error(s).
+*
+*               0,                                       otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetIF_GetPktSizeMax (NET_IF_NBR   if_nbr,
+                                 NET_ERR     *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+    CPU_INT16U   pkt_size_max;
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (0u);
+    }
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err =  NET_IF_ERR_INVALID_CFG;
+        return (0u);
+    }
+    if (p_if_api->GetPktSizeMin == (CPU_INT16U (*)(NET_IF *))0) {
+       *p_err =  NET_ERR_FAULT_NULL_FNCT;
+        return (0u);
+    }
+#endif
+
+                                                                /* ------------- GET NET IF MIN PKT SIZE -------------- */
+    pkt_size_max = p_if_api->GetPktSizeMax(p_if);
+
+   *p_err =  NET_IF_ERR_NONE;
+
+    return (pkt_size_max);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_ISR_Handler()
+*
+* Description : Handle network interface's device interrupt service routine (ISR) function(s).
+*
+* Argument(s) : if_nbr      Network interface number  to handle ISR(s).
+*
+*               type        Device  interrupt type(s) to handle :
+*
+*                               NET_DEV_ISR_TYPE_UNKNOWN        Handle unknown device           ISR(s).
+*                               NET_DEV_ISR_TYPE_RX             Handle device receive           ISR(s).
+*                               NET_DEV_ISR_TYPE_RX_OVERRUN     Handle device receive  overrun  ISR(s).
+*                               NET_DEV_ISR_TYPE_TX_RDY         Handle device transmit ready    ISR(s).
+*                               NET_DEV_ISR_TYPE_TX_COMPLETE    Handle device transmit complete ISR(s).
+*
+*                           See also 'net_if.h  NETWORK DEVICE INTERRUPT SERVICE ROUTINE (ISR) TYPE DEFINES'
+*                               for other available & supported network device ISR types.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface ISR(s) successfully handled.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_STATE        Invalid network interface state (see Note #3).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               ----------- RETURNED BY NetIF_Get() : -----------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ---- RETURNED BY 'p_if_api->ISR_Handler()' : -----
+*                                                               See specific network interface(s) 'ISR_Handler()'
+*                                                                   for additional return error codes.
+*
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver(s)' Board Support Package (BSP) Interrupt Service Routine (ISR) handler(s).
+*
+*               This function is a network interface (IF) to network device function & SHOULD be called
+*               only by appropriate network device driver ISR handler function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_ISR_Handler() is called by device driver function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST NOT block by pending on & acquiring the global network lock.
+*
+*                       (1) Although blocking on the global network lock is typically required since any
+*                           external API function access is asynchronous to other network protocol tasks;
+*                           interrupt service routines (ISRs) are (typically) prohibited from pending on
+*                           OS objects & therefore can NOT acquire the global network lock.
+*
+*                       (2) Therefore, ALL network interface & network device driver functions that may
+*                           be called by interrupt service routines MUST be able to be asynchronously
+*                           accessed without acquiring the global network lock AND without corrupting
+*                           any network data or task.
+*
+*               (2) NetIF_ISR_Handler() blocked until network initialization completes.
+*
+*                   (a) Although blocking on the global network lock is typically required to verify
+*                       that network protocol suite initialization is complete; interrupt service routines
+*                       (ISRs) are (typically) prohibited from pending on OS objects & therefore can NOT
+*                       acquire the global network lock.
+*
+*                   (b) Therefore, since network protocol suite initialization complete MUST be able to
+*                       be verified from interrupt service routines without acquiring the global network
+*                       lock; 'Net_InitDone' MUST be accessed exclusively in critical sections during
+*                       initialization & from asynchronous interrupt service routines.
+*
+*               (3) Network device interrupt service routines (ISR) handler(s) SHOULD be able to correctly
+*                   function regardless of whether their corresponding network interface(s) are enabled.
+*
+*                   See also Note #1b2.
+*********************************************************************************************************
+*/
+
+void  NetIF_ISR_Handler (NET_IF_NBR         if_nbr,
+                         NET_DEV_ISR_TYPE   type,
+                         NET_ERR           *p_err)
+{
+    NET_IF       *p_if;
+    NET_IF_API   *p_if_api;
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_BOOLEAN   done;
+    CPU_SR_ALLOC();
+#endif
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    CPU_CRITICAL_ENTER();
+    done = Net_InitDone;
+    CPU_CRITICAL_EXIT();
+    if (done != DEF_YES) {                                      /* If init NOT complete, exit (see Note #2).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        return;
+    }
+#endif
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);                              /* See Note #1b2.                                       */
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+#if 0                                                           /* See Note #3.                                         */
+    if (p_if->En != DEF_ENABLED) {
+       *p_err = NET_IF_ERR_INVALID_STATE;
+        return;
+    }
+#endif
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_if_api->ISR_Handler == (void (*)(NET_IF         *,
+                                          NET_DEV_ISR_TYPE,
+                                          NET_ERR        *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+                                                                /* --------------- HANDLE NET IF ISR(s) --------------- */
+    p_if_api->ISR_Handler(p_if, type, p_err);                      /* See Note #1b2.                                       */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_LinkStateGet()
+*
+* Description : Get network interface's last known physical link state (see also Note #3).
+*
+* Argument(s) : if_nbr      Network interface number to get last known physical link state.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's last known physical
+*                                                                   link state successfully returned.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               -------- RETURNED BY NetIF_Get() : --------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : NET_IF_LINK_UP,   if NO error(s) & network interface's last known physical link state was 'UP'.
+*
+*               NET_IF_LINK_DOWN, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_LinkStateGet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetIF_LinkStateGet() blocked until network initialization completes.
+*
+*               (3) NetIF_LinkStateGet() only returns a network interface's last known physical link state
+*                   since enabled network interfaces' physical link states are only periodically updated
+*                   (see 'NetIF_PhyLinkStateHandler()  Note #1a').
+*
+*                   See also 'NetIF_IO_Ctrl()  Note #5'.
+*********************************************************************************************************
+*/
+
+NET_IF_LINK_STATE  NetIF_LinkStateGet (NET_IF_NBR   if_nbr,
+                                       NET_ERR     *p_err)
+{
+    NET_IF_LINK_STATE   link_state;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(NET_IF_LINK_DOWN);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_LinkStateGet, p_err);  /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return (NET_IF_LINK_DOWN);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+    link_state = NetIF_LinkStateGetHandler(if_nbr, p_err);
+
+
+    goto exit_release;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    link_state = NET_IF_LINK_DOWN;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+   *p_err =  NET_IF_ERR_NONE;
+
+    return (link_state);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_LinkStateGetHandler()
+*
+* Description : Get network interface's last known physical link state (see also Note #3).
+*
+* Argument(s) : if_nbr      Network interface number to get last known physical link state.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's last known physical
+*                                                                   link state successfully returned.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               -------- RETURNED BY NetIF_Get() : --------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : NET_IF_LINK_UP,   if NO error(s) & network interface's last known physical link state was 'UP'.
+*
+*               NET_IF_LINK_DOWN, otherwise.
+*
+* Caller(s)   : NetIF_LinkStateGet(),
+*               NetMLDP_TxAdvertiseMembership().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_IF_LINK_STATE  NetIF_LinkStateGetHandler (NET_IF_NBR   if_nbr,
+                                              NET_ERR     *p_err)
+{
+    NET_IF  *p_if;
+
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (NET_IF_LINK_DOWN);
+    }
+
+                                                                /* -------------- GET NET IF LINK STATE --------------- */
+    return (p_if->Link);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_LinkStateWaitUntilUp()
+*
+* Description : Wait for a network interface's link state to be 'UP'.
+*
+* Argument(s) : if_nbr          Network interface number to check link state.
+*
+*               retry_max       Maximum number of consecutive wait retries (see Note #2).
+*
+*               time_dly_ms     Transitory delay value, in milliseconds    (see Note #2).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's link state 'UP'.
+*                               NET_ERR_IF_LINK_DOWN            Network interface's link state 'DOWN'.
+*
+*                                                               - RETURNED BY NetIF_LinkStateGet() : -
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : NET_IF_LINK_UP,   if NO error(s) & network interface's link state is 'UP'.
+*
+*               NET_IF_LINK_DOWN, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_LinkStateWaitUntilUp() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'NetIF_LinkStateGet()  Note #1b').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) If a non-zero number of retries is requested then a non-zero time delay SHOULD also be
+*                   requested; otherwise, all retries will most likely fail immediately since no time will
+*                   elapse to wait for & allow the network interface's link state to successfully be 'UP'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_LinkStateWaitUntilUp (NET_IF_NBR   if_nbr,
+                                         CPU_INT16U   retry_max,
+                                         CPU_INT32U   time_dly_ms,
+                                         NET_ERR     *p_err)
+{
+    NET_IF_LINK_STATE  link_state = NET_IF_LINK_DOWN;
+    CPU_BOOLEAN         done      = DEF_NO;
+    CPU_BOOLEAN         dly       = DEF_NO;
+    CPU_INT16U          retry_cnt = 0u;
+    NET_ERR             err       = NET_IF_ERR_NONE;
+    NET_ERR             err_rtn   = NET_IF_ERR_NONE;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(NET_IF_LINK_DOWN);
+    }
+#endif
+                                                                /* --------- WAIT FOR NET IF LINK STATE 'UP' ---------- */
+    link_state = NET_IF_LINK_DOWN;
+    done       = DEF_NO;
+    dly        = DEF_NO;
+    retry_cnt  = 0u;
+
+    while ((retry_cnt <= retry_max) &&                          /* While retry <= max retry ...                         */
+           (done      == DEF_NO)) {                             /* ... & link NOT UP,       ...                         */
+
+        if (dly == DEF_YES) {
+            KAL_Dly(time_dly_ms);
+        }
+
+        link_state = NetIF_LinkStateGet(if_nbr, &err);          /* ... chk link state.                                  */
+        switch (err) {
+            case NET_IF_ERR_NONE:
+                 if (link_state == NET_IF_LINK_UP) {
+                     done    = DEF_YES;
+                     err_rtn = NET_IF_ERR_NONE;
+                 } else {
+                     retry_cnt++;
+                     dly     = DEF_YES;
+                     err_rtn = NET_ERR_IF_LINK_DOWN;
+                 }
+                 break;
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:                       /* If transitory err(s), ...                            */
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 retry_cnt++;
+                 dly     = DEF_YES;                             /* ... dly retry.                                       */
+                 err_rtn = err;
+                 break;
+
+
+            case NET_IF_ERR_INVALID_IF:
+            default:
+                 done    = DEF_YES;
+                 err_rtn = err;
+                 break;
+        }
+    }
+
+   *p_err =  err_rtn;
+
+    return (link_state);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_LinkStateSubscribe()
+*
+* Description : Subscribe to get notified when an interface link state changes.
+*
+* Argument(s) : if_nbr  Network interface number to check link state.
+*
+*               fcnt    Function to call when the link changes.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_IF_ERR_NONE                     Link State Subscription successful.
+*                           NET_ERR_FAULT_LOCK_ACQUIRE          Error while getting Network Lock.
+*                           NET_INIT_ERR_NOT_COMPLETED          Network Initialization is not completed.
+*
+*                           --------- RETURNED BY NetIF_LinkStateSubscribeHandler() ---------
+*                           See NetIF_LinkStateSubscribeHandler() for additional error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_LinkStateSubscribe (NET_IF_NBR                    if_nbr,
+                                NET_IF_LINK_SUBSCRIBER_FNCT   fcnt,
+                                NET_ERR                      *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(NET_IF_LINK_DOWN);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_LinkStateGet, p_err);  /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+
+    NetIF_LinkStateSubscribeHandler(if_nbr, fcnt, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_release;
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIF_LinkStateSubscribeHandler()
+*
+* Description : Subscribe to get notified when an interface link state changes.
+*
+* Argument(s) : if_nbr  Network interface number to check link state.
+*
+*               fcnt    Function to call when the link changes.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_IF_ERR_NONE                         Link State Subscription successful.
+*                           NET_ERR_FAULT_NULL_PTR                  Argument fcnt passed a null pointer.
+*                           NET_IF_ERR_LINK_SUBSCRIBER_MEM_ALLOC    Error while allocating the memory block
+*                                                                       for the subscriber.
+*
+*                           --------- RETURNED BY NetIF_Get() ---------
+*                           See NetIF_Get() for additional error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_LinkStateSubscribe(),
+*               NetMLDP_HostGrpAdd().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_LinkStateSubscribeHandler (NET_IF_NBR                    if_nbr,
+                                       NET_IF_LINK_SUBSCRIBER_FNCT   fcnt,
+                                       NET_ERR                      *p_err)
+{
+    NET_IF                      *p_if;
+    NET_IF_LINK_SUBSCRIBER_OBJ  *p_obj;
+    LIB_ERR                      err_lib;
+
+
+#if ((NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED))
+    if (fcnt == DEF_NULL) {
+       *p_err  = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+        goto exit;
+    }
+
+
+                                                                /* -------- VALIDATE SUBSCRIBER DOESN'T EXIST --------- */
+    p_obj = p_if->LinkSubscriberListHeadPtr;
+    while (p_obj != DEF_NULL) {
+        if (p_obj->Fnct == fcnt) {
+            p_obj->RefCtn++;
+           *p_err = NET_IF_ERR_NONE;
+            goto exit;
+        }
+
+        p_obj = p_obj->NextPtr;
+    }
+
+
+                                                                /* -------- GET MEMORY TO STORE NEW SUBSCRIBER -------- */
+    p_obj = (NET_IF_LINK_SUBSCRIBER_OBJ *)Mem_DynPoolBlkGet(&p_if->LinkSubscriberPool, &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = NET_IF_ERR_LINK_SUBSCRIBER_MEM_ALLOC;
+        goto exit;
+    }
+
+    p_obj->RefCtn  = 0u;
+    p_obj->Fnct    = fcnt;
+    p_obj->NextPtr = DEF_NULL;
+
+
+                                                                /* -------------- UPDATE SUBSCRIBER LIST -------------- */
+    if (p_if->LinkSubscriberListHeadPtr == DEF_NULL) {
+        p_if->LinkSubscriberListHeadPtr  = p_obj;
+        p_if->LinkSubscriberListEndPtr   = p_obj;
+    } else {
+        p_if->LinkSubscriberListEndPtr->NextPtr = p_obj;
+        p_if->LinkSubscriberListEndPtr          = p_obj;
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_LinkStateUnsubscribe()
+*
+* Description : Unsubscribe to get notified when interface link state changes.
+*
+* Argument(s) : if_nbr  Network interface number to check link state.
+*
+*               fcnt    Function to call when the link changes.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_IF_ERR_NONE                     Link State Unsubscription successful.
+*                           NET_ERR_FAULT_LOCK_ACQUIRE          Error while getting Network Lock.
+*                           NET_INIT_ERR_NOT_COMPLETED          Network Initialization is not completed.
+*
+*                           --------- RETURNED BY NetIF_LinkStateUnSubscribeHandler() ---------
+*                           See NetIF_LinkStateUnSubscribeHandler() for additional error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_LinkStateUnsubscribe (NET_IF_NBR                    if_nbr,
+                                  NET_IF_LINK_SUBSCRIBER_FNCT   fcnt,
+                                  NET_ERR                      *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(NET_IF_LINK_DOWN);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_LinkStateGet, p_err);  /* See Note #1b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+
+    NetIF_LinkStateUnSubscribeHandler(if_nbr, fcnt, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_release;
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetIF_LinkStateUnsubscribeHandler()
+*
+* Description : Unsubscribe to get notified when interface link state changes.
+*
+* Argument(s) : if_nbr  Network interface number to check link state.
+*
+*               fcnt    Function to call when the link changes.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_IF_ERR_NONE                         Link State Unsubscription successful.
+*                           NET_IF_ERR_LINK_SUBSCRIBER_NOT_FOUND    No Subscriber found.
+*
+*                           --------- RETURNED BY NetIF_Get() ---------
+*                           See NetIF_Get() for additional error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_LinkStateUnsubscribe().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_LinkStateUnSubscribeHandler(NET_IF_NBR                    if_nbr,
+                                        NET_IF_LINK_SUBSCRIBER_FNCT   fcnt,
+                                        NET_ERR                      *p_err)
+{
+    NET_IF                      *p_if;
+    NET_IF_LINK_SUBSCRIBER_OBJ  *p_obj;
+    NET_IF_LINK_SUBSCRIBER_OBJ  *p_obj_prev;
+    LIB_ERR                      err_lib;
+
+
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit;
+    }
+
+
+
+    p_obj_prev = DEF_NULL;
+    p_obj      = p_if->LinkSubscriberListHeadPtr;
+    while (p_obj != DEF_NULL) {
+                                                                /* ----------- FIND FNCT IN SUBSCRIBER LIST ----------- */
+        if (p_obj->Fnct == fcnt) {
+            if (p_obj->RefCtn == 0u) {
+                if (p_obj == p_if->LinkSubscriberListHeadPtr) {
+
+                    p_if->LinkSubscriberListHeadPtr = p_if->LinkSubscriberListHeadPtr->NextPtr;
+
+                    if (p_if->LinkSubscriberListEndPtr == p_obj) {
+                        p_if->LinkSubscriberListHeadPtr = DEF_NULL;
+                        p_if->LinkSubscriberListEndPtr   = DEF_NULL;
+                    }
+
+                } else if (p_obj == p_if->LinkSubscriberListEndPtr) {
+                    p_if->LinkSubscriberListEndPtr = p_obj_prev;
+
+                } else {
+                    p_obj_prev->NextPtr = p_obj->NextPtr;
+                }
+
+                                                                    /* Release memory blk.                                  */
+                Mem_DynPoolBlkFree(&p_if->LinkSubscriberPool, p_obj, &err_lib);
+               (void)&err_lib;                                      /* Ignore error.                                        */
+            } else {
+                p_obj->RefCtn--;
+            }
+
+           *p_err = NET_IF_ERR_NONE;
+            goto exit;
+        }
+
+        p_obj_prev = p_obj;
+        p_obj      = p_obj->NextPtr;
+    }
+
+
+   *p_err = NET_IF_ERR_LINK_SUBSCRIBER_NOT_FOUND;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_IO_Ctrl()
+*
+* Description : (1) Handle network interface &/or device specific (I/O) control(s) :
+*
+*                   (a) Device link :
+*                       (1) Get    device link info
+*                       (2) Get    device link state
+*                       (3) Update device link state
+*
+*
+* Argument(s) : if_nbr      Network interface number to handle (I/O) controls.
+*
+*               opt         Desired I/O control option code to perform; additional control options may be
+*                           defined by the device driver :
+*
+*                               NET_IF_IO_CTRL_LINK_STATE_GET       Get    device's current  physical link state,
+*                                                                       'UP' or 'DOWN' (see Note #5).
+*                               NET_IF_IO_CTRL_LINK_STATE_GET_INFO  Get    device's detailed physical link state
+*                                                                       information.
+*                               NET_IF_IO_CTRL_LINK_STATE_UPDATE    Update device's current  physical link state.
+*
+*               p_data      Pointer to variable that will receive possible I/O control data (see Note #4).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   --- RETURNED BY NetIF_IO_CtrlHandler() : ----
+*                               NET_IF_ERR_NONE                     I/O control option successfully handled.
+*                               NET_ERR_FAULT_NULL_PTR                 Argument 'p_data' passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT                Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG              Invalid/NULL API configuration.
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IF_ERR_INVALID_IO_CTRL_OPT      Invalid I/O control option.
+*
+*                                                                   See specific network interface(s) 'IO_Ctrl()'
+*                                                                       for additional return error codes.
+*
+*                                                                   --- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIF_IO_Ctrl() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIF_IO_CtrlHandler()  Note #2'.
+*
+*               (3) NetIF_IO_Ctrl() blocked until network initialization completes.
+*
+*               (4) 'p_data' MUST point to a variable or memory buffer that is sufficiently sized AND
+*                    aligned to receive any return data. If the option is :
+*
+*                   (a) NET_IF_IO_CTRL_LINK_STATE_GET:
+*                       (1) For Ethernet or Wireless interface: p_data MUST point to a CPU_BOOLEAN variable.
+*
+*                   (b) NET_IF_IO_CTRL_LINK_STATE_GET_INFO
+                        NET_IF_IO_CTRL_LINK_STATE_UPDATE
+*
+*                       (1) For an ethernet interface: p_data MUST point to a variable of data type
+*                               NET_DEV_LINK_ETHER.
+*
+*                       (2) For a  Wireless interface: p_data MUST point to a variable of data type
+*                               NET_DEV_LINK_WIFI.
+*
+*               (5) NetIF_IO_Ctrl() can return a network device's current physical link state (using the
+*                   'NET_IF_IO_CTRL_LINK_STATE_GET' option).
+*
+*                   See also 'NetIF_LinkStateGet()  Note #3'.
+*********************************************************************************************************
+*/
+
+void  NetIF_IO_Ctrl (NET_IF_NBR   if_nbr,
+                     CPU_INT08U   opt,
+                     void        *p_data,
+                     NET_ERR     *p_err)
+{
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_IO_Ctrl, p_err);       /* See Note #2b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+                                                                /* ---------------- HANDLE NET IF I/O ----------------- */
+    NetIF_IO_CtrlHandler(if_nbr, opt, p_data, p_err);
+
+    goto exit_release;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_RxTaskSignal()
+*
+* Description : Signal network interface receive task of received packet.
+*
+* Argument(s) : if_nbr      Network interface to signal  receive.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface receive queue successfully
+*                                                                   signaled.
+*                               NET_IF_ERR_RX_Q_FULL            Network interface receive queue full.
+*                               NET_IF_ERR_RX_Q_SIGNAL_FAULT    Network interface receive queue signal fault.
+*
+*                                                               --- RETURNED BY NetIF_IsValidHandler() : ----
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver receive ISR handler(s),
+*               NetIF_Loopback_Tx().
+*
+*               This function is a network protocol suite to network device function & SHOULD be called
+*               only by appropriate network device driver function(s).
+*
+* Note(s)     : (1) To balance network receive versus transmit packet loads for certain network connection
+*                   types (e.g. stream-type connections), network receive & transmit packets SHOULD be
+*                   handled in an APPROXIMATELY balanced ratio.
+*
+*                   (b) To implement network receive versus transmit load balancing :
+*
+*                       (1) The availability of network receive packets MUST be managed for each network
+*                           interface :
+*
+*                           (A) Increment the number of available network receive packets queued to a
+*                               network interface for each packet received.
+*
+*                   See also 'net_if.c  NetIF_RxPktInc()  Note #1'.
+*
+*               (2) Encoding/decoding the network interface number does NOT require any message size.
+*
+*                   See also 'NetIF_RxTaskWait()  Note #2'.
+*********************************************************************************************************
+*/
+
+void  NetIF_RxTaskSignal (NET_IF_NBR   if_nbr,
+                          NET_ERR     *p_err)
+{
+    CPU_ADDR  if_nbr_msg;
+    KAL_ERR   err_kal;
+
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+   (void)NetIF_IsValidHandler(if_nbr, p_err);                   /* Validate interface number.                           */
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+    if_nbr_msg = (CPU_ADDR)if_nbr;                              /* Encode interface number of signaled receive.         */
+    KAL_QPost(        NetIF_RxQ_Handle,
+              (void *)if_nbr_msg,
+                      KAL_OPT_PEND_NONE,
+                     &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+                                                                /* Increment number of receive packets queued ...       */
+             NetIF_RxPktInc(if_nbr);                            /* ... to a network interface (see Note #1b1A).         */
+            *p_err = NET_IF_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OVF:
+            *p_err = NET_IF_ERR_RX_Q_FULL;
+             break;
+
+
+        case KAL_ERR_RSRC:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_IF_ERR_RX_Q_SIGNAL_FAULT;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetIF_RxPktInc()
+*
+* Description : Increment number receive packet(s) queued & available on a network interface.
+*
+* Argument(s) : if_nbr      Interface number that received packet(s).
+*               ------      Argument validated in NetIF_RxTaskSignal().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxTaskSignal().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) To balance network receive versus transmit packet loads for certain network connection
+*                   types (e.g. stream-type connections), network receive & transmit packets on each
+*                   network interface SHOULD be handled in an APPROXIMATELY balanced ratio.
+*
+*                   (a) Network task priorities & lock mechanisms partially maintain a balanced ratio
+*                       between network receive versus transmit packet handling.
+*
+*                       However, the handling of network receive & transmit packets :
+*
+*                       (1) SHOULD be interleaved so that for every few packet(s) received & handled,
+*                           several packet(s) should be transmitted; & vice versa.
+*
+*                       (2) SHOULD NOT exclusively handle receive nor transmit packets, even for a
+*                           short period of time, but especially for a prolonged period of time.
+*
+*                   (b) To implement network receive versus transmit load balancing :
+*
+*                       (1) The availability of network receive packets MUST be managed for each network
+*                           interface :
+*
+*                           (A) Increment the number of available network receive packets queued to a
+*                               network interface for each packet received.
+*
+*                           (B) Decrement the number of available network receive packets queued to a
+*                               network interface for each received packet processed.
+*
+*                       (2) Certain network connections MUST periodically suspend network transmit(s)
+*                           to handle network interface(s)' receive packet(s) :
+*
+*                           (A) Suspend network connection transmit(s) if any receive packets are
+*                               available on a network interface.
+*
+*                           (B) Signal or timeout network connection transmit suspend(s) to restart
+*                               transmit(s).
+*
+*                   See also 'NetIF_RxPktDec()         Note #1',
+*                            'NetIF_RxPktIsAvail()     Note #1',
+*                            'NetIF_TxSuspend()        Note #1',
+*                          & 'NetIF_TxSuspendSignal()  Note #1'.
+*
+*               (2) Network interfaces' 'RxPktCtr' variables MUST ALWAYS be accessed exclusively in
+*                   critical sections.
+*********************************************************************************************************
+*/
+
+void  NetIF_RxPktInc (NET_IF_NBR  if_nbr)
+{
+    NET_ERR   err;
+#ifdef  NET_LOAD_BAL_MODULE_EN
+    NET_IF   *p_if;
+
+
+    p_if = &NetIF_Tbl[if_nbr];
+    NetStat_CtrInc(&p_if->RxPktCtr, &err);                       /* Inc net IF's  nbr q'd rx pkts avail (see Note #1b1A).*/
+
+#else
+   (void)&if_nbr;                                               /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+    NetStat_CtrInc(&NetIF_RxTaskPktCtr, &err);                  /* Inc rx task's nbr q'd rx pkts avail.                 */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_RxPktIsAvail()
+*
+* Description : Determine if any network interface receive packet(s) are available.
+*
+* Argument(s) : rx_chk_nbr      Number of consecutive times that network interface's receive packet
+*                                   availability has been checked (see Note #2b1).
+*
+* Return(s)   : DEF_YES, network interface receive packet(s)     available (see Note #2a1).
+*
+*               DEF_NO,  network interface receive packet(s) NOT available (see Note #2a2).
+*
+* Caller(s)   : NetTCP_TxConnTxQ().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) To balance network receive versus transmit packet loads for certain network connection
+*                   types (e.g. stream-type connections), network receive & transmit packets on each
+*                   network interface SHOULD be handled in an APPROXIMATELY balanced ratio.
+*
+*                   (a) Network task priorities & lock mechanisms partially maintain a balanced ratio
+*                       between network receive versus transmit packet handling.
+*
+*                       However, the handling of network receive & transmit packets :
+*
+*                       (1) SHOULD be interleaved so that for every few packet(s) received & handled,
+*                           several packet(s) should be transmitted; & vice versa.
+*
+*                       (2) SHOULD NOT exclusively handle receive nor transmit packets, even for a
+*                           short period of time, but especially for a prolonged period of time.
+*
+*                   (b) To implement network receive versus transmit load balancing :
+*
+*                       (1) The availability of network receive packets MUST be managed for each network
+*                           interface :
+*
+*                           (A) Increment the number of available network receive packets queued to a
+*                               network interface for each packet received.
+*
+*                           (B) Decrement the number of available network receive packets queued to a
+*                               network interface for each received packet processed.
+*
+*                   See also 'NetIF_RxPktInc()  Note #1'
+*                          & 'NetIF_RxPktDec()  Note #1'.
+*
+*               (2) (a) To approximate a balanced ratio of network receive versus transmit packets
+*                       handled; the availability of network receive packets returned is conditionally
+*                       based on the consecutive number of times the availability is checked :
+*
+*                       (1) If the number of available network receive packets queued ('NetIF_RxPktCtr')
+*                           is greater than the consecutive number of times the availability is checked
+*                           ('rx_chk_nbr'), then the actual availability of network receive packet is
+*                           returned.
+*
+*                       (2) Otherwise, no available network receive packets is returned -- even if
+*                           network receive packets ARE available.
+*
+*                   (b) (1) The number of consecutive times that the network receive availability
+*                           is checked ('rx_chk_nbr') SHOULD correspond to the consecutive number
+*                           of times that a network connection transmit suspends itself to check
+*                           for & handle any network receive packet(s).
+*
+*                       (2) (A) To check actual network receive packet availability,
+*                               call NetIF_RxPktIsAvail() with 'rx_chk_nbr' always    set to 0.
+*
+*                           (B) To check        network receive packet availability consecutively,
+*                               call NetIF_RxPktIsAvail() with 'rx_chk_nbr' initially set to 0 &
+*                               incremented by 1 for each consecutive call thereafter.
+*
+*               (3) Network interfaces' 'RxPktCtr' variables MUST ALWAYS be accessed exclusively in
+*                   critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_RxPktIsAvail (NET_IF_NBR  if_nbr,
+                                 NET_CTR     rx_chk_nbr)
+{
+    CPU_BOOLEAN    rx_pkt_avail;
+#ifdef  NET_LOAD_BAL_MODULE_EN
+    NET_IF        *p_if;
+    NET_STAT_CTR  *pstat_ctr;
+    CPU_SR_ALLOC();
+
+
+    p_if      = &NetIF_Tbl[if_nbr];
+    pstat_ctr = &p_if->RxPktCtr;
+
+    CPU_CRITICAL_ENTER();
+    rx_pkt_avail = (pstat_ctr->CurCtr > rx_chk_nbr) ? DEF_YES : DEF_NO;     /* See Note #2a1.                           */
+    CPU_CRITICAL_EXIT();
+
+#else
+   (void)&if_nbr;                                               /* Prevent 'variable unused' compiler warnings.         */
+   (void)&rx_chk_nbr;
+    rx_pkt_avail = DEF_NO;
+#endif
+
+    return (rx_pkt_avail);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_TxDeallocTaskPost()
+*
+* Description : Post network buffer transmit data areas to deallocate from device(s) to network interface
+*                   transmit deallocation queue.
+*
+* Argument(s) : p_buf_data   Pointer to transmit buffer data area to deallocate.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                         Transmit buffer data area successfully
+*                                                                           posted to deallocation queue.
+*                               NET_IF_ERR_TX_DEALLC_Q_FULL             Network interface transmit deallocation
+*                                                                           queue full.
+*                               NET_IF_ERR_TX_DEALLC_Q_SIGNAL_FAULT     Network interface transmit deallocation
+*                                                                           queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver transmit complete ISR handler(s).
+*
+*               This function is a network protocol suite to network device function & SHOULD be called
+*               only by appropriate network interface/device controller function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_TxDeallocTaskPost (CPU_INT08U  *p_buf_data,
+                               NET_ERR     *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_QPost(        NetIF_TxQ_Handle,
+              (void *)p_buf_data,
+                      KAL_OPT_PEND_NONE,
+                     &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_IF_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OVF:
+            *p_err = NET_IF_ERR_TX_DEALLC_Q_FULL;
+             break;
+
+
+        case KAL_ERR_RSRC:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_IF_ERR_TX_DEALLC_Q_SIGNAL_FAULT;
+             break;
+    }
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                              NetIF_Tx()
+*
+* Description : Transmit data packets to network interface(s)/device(s).
+*
+* Argument(s) : p_buf_list   Pointer to network buffer data packet(s) to transmit via network interface(s)/
+*                               device(s) [see Note #1a].
+*
+*               p_err        Pointer to variable that will receive the return error code from this function
+*                               (see Note #1b) :
+*
+*                                                               ----- RETURNED BY NetIF_TxHandler() : -----
+*                               NET_IF_ERR_NONE                 Packet(s) successfully transmitted (or
+*                                                                   queued for later transmission).
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+*                                                               --- RETURNED BY NetIF_TxPktDiscard() : ----
+*                               NET_ERR_TX                      Transmit error; packet(s) discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Tx(),
+*               NetARP_CacheTxPktHandler(),
+*               NetIP_TxPktDatagram().
+*
+*               This function is a network protocol suite to network interface (IF) function & SHOULD be
+*               called only by appropriate network interface function(s).
+*
+* Note(s)     : (1) (a) On any error(s), the current transmit packet may be discarded by handler functions;
+*                       but any remaining transmit packet(s) are still transmitted.
+*
+*                       However, while IP transmit fragmentation is NOT currently supported (see
+*                      'net_ip.h  Note #1d'), transmit data packet lists are limited to a single transmit
+*                       data packet.
+*
+*                       See also 'NetIF_TxPktDiscard()  Note #2'.
+*
+*                   (b) Error code returned by 'p_err' refers to the last transmit packet's error ONLY.
+*********************************************************************************************************
+*/
+
+void  NetIF_Tx (NET_BUF  *p_buf_list,
+                NET_ERR  *p_err)
+{
+    NET_BUF      *p_buf;
+    NET_BUF      *p_buf_next;
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_ERR       err_rtn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf_list == (NET_BUF *)0) {
+        NetIF_TxPktDiscard(p_buf_list, DEF_YES, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+        return;
+    }
+#endif
+
+                                                                /* ----------------- TX NET IF PKT(S) ----------------- */
+    p_buf    = p_buf_list;
+    err_rtn = NET_ERR_TX;
+    while (p_buf != (NET_BUF *)0) {                              /* Tx ALL pkt bufs in list.                             */
+        p_buf_hdr  = &p_buf->Hdr;
+        p_buf_next =  p_buf_hdr->NextBufPtr;
+
+
+        NetIF_TxHandler(p_buf,
+                       &err_rtn);                               /* See Note #1a.                                        */
+
+        if (err_rtn != NET_IF_ERR_TX_ADDR_PEND) {
+                                                                /* --------------- UNLINK CHAINED BUFS ---------------- */
+            if (p_buf_next != (NET_BUF *)0) {
+                p_buf_hdr->NextBufPtr = (NET_BUF *)0;
+                p_buf_hdr = &p_buf_next->Hdr;
+                p_buf_hdr->PrevBufPtr = (NET_BUF *)0;
+            }
+        }
+
+        p_buf = p_buf_next;                                       /* Adv to next tx pkt buf.                              */
+    }
+
+
+   *p_err = err_rtn;                                             /* See Note #1b.                                        */
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_TxIxDataGet()
+*
+* Description : Get the offset of a buffer at which the IPv6 packet can be written.
+*
+* Argument(s) : if_nbr      Network interface number to transmit data.
+*
+*               data_len    IPv6 payload size.
+*
+*               mtu         MTU for the upper-layer protocol.
+*
+*               p_ix        Pointer to the current protocol index.
+*               ----        Argument validated in NetARP_TxIxDataGet(),
+*                                                 NetIF_GetDataAlignPtr(),
+*                                                 NetIPv6_GetTxDataIx().
+*                                                 NetIPv4_TxIxDataGet(),
+*                                                 NetIPv6_GetTxDataIx(),
+*                                                 NetIPv6_TxPktPrepareExtHdr(),
+*                                                 NetIPv6_TxPktPrepareHdr().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               No errors.
+*
+*                                                               -------- Returned by NetIF_GetTxDataIx() ---------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_INVALID_PROTOCOL     Network interface type is unsupported.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_TxIxDataGet(),
+*               NetIF_GetDataAlignPtr(),
+*               NetIPv4_TxIxDataGet(),
+*               NetIPv6_GetTxDataIx(),
+*               NetIPv6_TxPktPrepareExtHdr(),
+*               NetIPv6_TxPktPrepareHdr().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+void  NetIF_TxIxDataGet (NET_IF_NBR   if_nbr,
+                         CPU_INT32U   data_len,
+                         CPU_INT16U  *p_ix,
+                         NET_ERR     *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+
+
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+        return;
+    }
+
+
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+    if (p_if_api == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_OBJ;
+        goto exit;
+    }
+
+
+   *p_ix += p_if_api->GetPktSizeHdr(p_if);
+
+
+   (void)&data_len;
+
+   *p_err = NET_IF_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_TxSuspend()
+*
+* Description : Suspend transmit on network interface connection(s).
+*
+* Argument(s) : if_nbr      Interface number to suspend transmit.
+*               ------      Argument checked in NetTCP_TxConnTxQ().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnTxQ().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) To balance network receive versus transmit packet loads for certain network connection
+*                   types (e.g. stream-type connections), network receive & transmit packets on each
+*                   network interface SHOULD be handled in an APPROXIMATELY balanced ratio.
+*
+*                   (a) Network task priorities & lock mechanisms partially maintain a balanced ratio
+*                       between network receive versus transmit packet handling.
+*
+*                       However, the handling of network receive & transmit packets :
+*
+*                       (1) SHOULD be interleaved so that for every few packet(s) received & handled,
+*                           several packet(s) should be transmitted; & vice versa.
+*
+*                       (2) SHOULD NOT exclusively handle receive nor transmit packets, even for a
+*                           short period of time, but especially for a prolonged period of time.
+*
+*                   (b) To implement network receive versus transmit load balancing :
+*
+*                       (1) The availability of network receive packets MUST be managed for each network
+*                           interface :
+*
+*                           (A) Increment the number of available network receive packets queued to a
+*                               network interface for each packet received.
+*
+*                           (B) Decrement the number of available network receive packets queued to a
+*                               network interface for each received packet processed.
+*
+*                       (2) Certain network connections MUST periodically suspend network transmit(s)
+*                           to handle network interface(s)' receive packet(s) :
+*
+*                           (A) Suspend network connection transmit(s) if any receive packets are
+*                               available on a network interface.
+*
+*                           (B) Signal or timeout network connection transmit suspend(s) to restart
+*                               transmit(s).
+*
+*                   See also 'NetIF_RxPktInc()         Note #1',
+*                            'NetIF_RxPktDec()         Note #1',
+*                          & 'NetIF_TxSuspendSignal()  Note #1'.
+*
+*               (2) (a) To approximate a balanced ratio of network receive versus transmit packets handled;
+*                       the number of consecutive times that a network connection transmit suspends itself
+*                       to check for & handle any network receive packet(s) SHOULD APPROXIMATELY correspond
+*                       to the number of queued receive packet(s) available on a network interface.
+*
+*                       See also 'NetIF_RxPktIsAvail()  Note #2'.
+*
+*                   (b) To protect connections from transmit corruption while suspended, ALL transmit
+*                       operations for suspended connections MUST be blocked until the connection is no
+*                       longer suspended.
+*
+*               (3) Network interfaces' 'TxSuspendCtr' variables may be accessed with only the global
+*                   network lock acquired & are NOT required to be accessed exclusively in critical
+*                   sections.
+*********************************************************************************************************
+*/
+
+void  NetIF_TxSuspend (NET_IF_NBR  if_nbr)
+{
+#ifdef  NET_LOAD_BAL_MODULE_EN
+    NET_IF   *p_if;
+    NET_ERR   err;
+
+
+    p_if = &NetIF_Tbl[if_nbr];
+    NetStat_CtrInc(&p_if->TxSuspendCtr, &err);                   /* Inc net IF's tx suspend ctr.                         */
+    NetIF_TxSuspendWait(p_if);                                   /* Wait on      tx suspend signal (see Note #1b2A).     */
+    NetStat_CtrDec(&p_if->TxSuspendCtr, &err);                   /* Dec net IF's tx suspend ctr.                         */
+#else
+   (void)&if_nbr;                                               /* Prevent 'variable unused' compiler warning.          */
+#endif
+}
+
+/*
+*********************************************************************************************************
+*                                       NetIF_DevCfgTxRdySignal()
+*
+* Description : (1) Configure the value of a network device transmit ready signal :
+*
+*                   (a) The value of the transmit ready signal should be configured with either the
+*                       number of available transmit descriptors for a DMA device or the number of
+*                       packet that can be buffered within a non-DMA device.
+*
+*
+* Argument(s) : if_nbr      Interface number of the network device transmit ready signal.
+*
+*               cnt         Desired count    of the network device transmit ready signal.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_NONE                        Network device transmit ready signal
+*                                                                       value successfully configured.
+*                               NET_IF_ERR_INIT_DEV_TX_RDY_VAL      Invalid device transmit ready signal.
+*
+*                                                                   - RETURNED BY NetIF_IsValidHandler() : -
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver start functions.
+*
+*               This function is a network interface (IF) to network device function & SHOULD (optionally)
+*               be called only by appropriate network device driver function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_DevCfgTxRdySignal (NET_IF      *p_if,
+                               CPU_INT16U   cnt,
+                               NET_ERR     *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    if (cnt < 1) {
+       *p_err = NET_IF_ERR_DEV_TX_RDY_VAL;
+        return;
+    }
+
+    KAL_SemSet(p_if->DevTxRdySignalObj, cnt, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_IF_ERR_DEV_TX_RDY_VAL;
+             return;
+    }
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_DevTxRdySignal()
+*
+* Description : Signal that device transmit is ready.
+*
+* Argument(s) : if_nbr  Interface number to signal transmit ready.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device driver transmit ISR handler(s).
+*
+*               This function is a network interface (IF) to network device function & SHOULD be called
+*               only by appropriate network device driver function(s).
+*
+* Note(s)     : (1) Device transmit ready MUST be signaled--i.e. MUST signal without failure.
+*
+*                   (a) Failure to signal device transmit ready will prevent device from transmitting
+*                       packets.  Thus, device transmit ready is assumed to be successfully signaled
+*                       since NO uC/OS-III error handling could be performed to counteract failure.
+*********************************************************************************************************
+*/
+
+void  NetIF_DevTxRdySignal (NET_IF  *p_if)
+{
+    KAL_ERR  err_kal;
+
+
+
+    KAL_SemPost(p_if->DevTxRdySignalObj,                        /* Signal device that transmit ready.                   */
+                KAL_OPT_PEND_NONE,
+               &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_OVF:
+        case KAL_ERR_OS:
+        default:
+             return;
+
+    }
+
+   (void)&err_kal;                                              /* See Note #1a.                                        */
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_TxSuspendTimeoutSet()
+*
+* Description : Set network interface transmit suspend timeout value.
+*
+* Argument(s) : if_nbr      Interface number to set timeout value.
+*
+*               timeout_ms  Timeout value (in milliseconds).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_NONE                    Network interface transmit suspend timeout
+*                                                                   successfully set.
+*
+*                                                               --- RETURNED BY NetIF_IsValidHandler() : ----
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API)
+*               function & MAY be called by application function(s).
+*
+* Note(s)     : (1) 'NetIF_TxSuspendTimeout_tick' variables MUST ALWAYS be accessed exclusively
+*                    in critical sections.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+void  NetIF_TxSuspendTimeoutSet (NET_IF_NBR   if_nbr,
+                                 CPU_INT32U   timeout_ms,
+                                 NET_ERR     *p_err)
+{
+    NET_IF    *p_if;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+   (void)NetIF_IsValidHandler(if_nbr, p_err);                    /* Validate interface number.                           */
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+
+    CPU_CRITICAL_ENTER();
+    p_if->TxSuspendTimeout_ms = timeout_ms;                     /* Set transmit suspend timeout value (in OS ticks).    */
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NetIF_TxSuspendTimeoutGet_ms()
+*
+* Description : Get network interface transmit suspend timeout value.
+*
+* Argument(s) : if_nbr      Interface number to get timeout value.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_NONE                    Network interface transmit suspend timeout
+*                                                                   successfully returned.
+*
+*                                                               -- RETURNED BY NetIF_IsValidHandler() : --
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Network transmit suspend timeout value (in milliseconds), if NO error(s).
+*
+*               0,                                                        otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API)
+*               function & MAY be called by application function(s).
+*
+* Note(s)     : (1) 'NetIF_TxSuspendTimeout_tick' variables MUST ALWAYS be accessed exclusively
+*                    in critical sections.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+CPU_INT32U  NetIF_TxSuspendTimeoutGet_ms (NET_IF_NBR   if_nbr,
+                                          NET_ERR     *p_err)
+{
+    NET_IF      *p_if;
+    CPU_INT32U   timeout_ms;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+   (void)NetIF_IsValidHandler(if_nbr, p_err);                    /* Validate interface number.                           */
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (0u);
+    }
+#endif
+
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (0u);
+    }
+
+    CPU_CRITICAL_ENTER();
+    timeout_ms = p_if->TxSuspendTimeout_ms;                     /* Get transmit suspend timeout value (in OS ticks).    */
+    CPU_CRITICAL_EXIT();
+
+   *p_err            = NET_ERR_NONE;
+
+    return (timeout_ms);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_MTU_SetHandler()
+*
+* Description : Set network interface's MTU.
+*
+* Argument(s) : if_nbr      Network interface number to set MTU.
+*
+*               mtu         Desired maximum transmission unit size to set.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               --------- RETURNED BY NetIF_Get() : ---------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ---- RETURNED BY 'p_if_api->MTU_Set()' : -----
+*                               NET_IF_ERR_NONE                 Network interface's MTU successfully set.
+*                               NET_IF_ERR_INVALID_MTU          Invalid network interface MTU.
+*
+*                                                               See specific network interface(s) 'MTU_Set()'
+*                                                                   for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_MTU_Set(),
+*               NetNDP_RxRouterAdvertisement().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_MTU_SetHandler (NET_IF_NBR   if_nbr,
+                            NET_MTU      mtu,
+                            NET_ERR     *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_if_api->MTU_Set == (void (*)(NET_IF  *,
+                                      NET_MTU  ,
+                                      NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+                                                                /* ------------------ SET NET IF MTU ------------------ */
+    p_if_api->MTU_Set(p_if, mtu, p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          NetIF_InitTaskObj()
+*
+* Description : (1) Perform network interface/OS initialization :
+*
+*                   (a) (1) Create Network Interface Receive Task
+*
+*                       (2) Implement network interface receive queue by creating a message queue.
+*
+*                           (A) Initialize network interface receive queue with no received packets by NOT
+*                               posting any messages to the queue.
+*
+*                   (b) (1) Create Network Interface Transmit Deallocation Task
+*
+*                       (2) Implement network interface transmit deallocation queue by creating a message
+*                           queue.
+*
+*                           (A) Initialize network interface transmit deallocation queue with no posted
+*                               transmit packets by NOT posting any messages to the queue.
+*
+*                   (c) Implement  network interface transmit suspend signal by creating a counting semaphore.
+*
+*                       (1) Initialize network interface transmit suspend signal with no signal by setting
+*                           the semaphore count to 0 to block the semaphore.
+*
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*                       successful.
+*
+*                           NET_IF_ERR_NONE
+*                           NET_IF_ERR_INIT_RX_TASK_MEM_ALLOC
+*                           NET_IF_ERR_INIT_RX_TASK_CREATE
+*                           NET_IF_ERR_INIT_RX_Q_INVALID_ARG
+*                           NET_IF_ERR_INIT_RX_Q_MEM_ALLOC
+*                           NET_IF_ERR_INIT_RX_Q_CREATE
+*                           NET_IF_ERR_INIT_TX_DEALLOC_TASK_INVALID_ARG
+*                           NET_IF_ERR_INIT_TX_DEALLOC_TASK_MEM_ALLOC
+*                           NET_IF_ERR_INIT_TX_DEALLOC_TASK_CREATE
+*                           NET_IF_ERR_INIT_TX_DEALLOC_Q_MEM_ALLOC
+*                           NET_IF_ERR_INIT_TX_DEALLOC_Q_INVALID_ARG
+*                           NET_IF_ERR_INIT_TX_DEALLOC_Q_CREATE
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_InitTaskObj (const  NET_TASK_CFG  *p_rx_task_cfg,
+                                 const  NET_TASK_CFG  *p_tx_task_cfg,
+                                        NET_ERR       *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+
+                                                                /* ----------- INITIALIZE NETWORK INTERFACE RECEIVE ----------- */
+                                                                /* Create    network interface receive task & queue ...         */
+                                                                /* ... (see Note #1a).                                          */
+    NetIF_RxTaskHandle = KAL_TaskAlloc((const  CPU_CHAR *)NET_IF_RX_TASK_NAME,
+                                                          p_rx_task_cfg->StkPtr,
+                                                          p_rx_task_cfg->StkSizeBytes,
+                                                          DEF_NULL,
+                                                         &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_INVALID_ARG:
+            *p_err = NET_IF_ERR_INIT_RX_TASK_INVALID_ARG;
+             return;
+
+
+        case KAL_ERR_MEM_ALLOC:
+        default:
+            *p_err = NET_IF_ERR_INIT_RX_TASK_MEM_ALLOC;
+             return;
+    }
+
+
+
+    NetIF_RxQ_Handle = KAL_QCreate((const CPU_CHAR *)NET_IF_RX_Q_NAME,
+                                                     NET_CFG_IF_RX_Q_SIZE,
+                                                     DEF_NULL,
+                                                    &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_IF_ERR_INIT_RX_Q_MEM_ALLOC;
+             return;
+
+
+        case KAL_ERR_INVALID_ARG:
+            *p_err = NET_IF_ERR_INIT_RX_Q_INVALID_ARG;
+             return;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_IF_ERR_INIT_RX_Q_CREATE;
+             return;
+    }
+
+
+    NetIF_RxQ_SizeCfg(NET_CFG_IF_RX_Q_SIZE);                    /* Configure network interface receive queue size.      */
+
+
+    KAL_TaskCreate(NetIF_RxTaskHandle,
+                   NetIF_RxTask,
+                   DEF_NULL,
+                   p_rx_task_cfg->Prio,
+                   DEF_NULL,
+                  &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_ISR:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_IF_ERR_INIT_RX_TASK_CREATE;
+             return;
+    }
+
+
+
+
+                                                        /* ---- INITIALIZE NETWORK INTERFACE TRANSMIT DEALLOCATION ---- */
+                                                        /* Create    network interface transmit deallocation task ...   */
+                                                        /* ... & queue (see Note #1b).                                  */
+    NetIF_TxDeallocTaskHandle = KAL_TaskAlloc((const  CPU_CHAR *)NET_IF_TX_DEALLOC_TASK_NAME,
+                                                                 p_tx_task_cfg->StkPtr,
+                                                                 p_tx_task_cfg->StkSizeBytes,
+                                                                 DEF_NULL,
+                                                                &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_INVALID_ARG:
+            *p_err = NET_IF_ERR_INIT_TX_DEALLOC_TASK_INVALID_ARG;
+             return;
+
+
+        case KAL_ERR_MEM_ALLOC:
+        default:
+            *p_err = NET_IF_ERR_INIT_TX_DEALLOC_TASK_MEM_ALLOC;
+             return;
+    }
+
+
+
+    NetIF_TxQ_Handle = KAL_QCreate((const CPU_CHAR *)NET_IF_TX_DEALLOC_Q_NAME,
+                                                     NET_CFG_IF_TX_DEALLOC_Q_SIZE,
+                                                     DEF_NULL,
+                                                    &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_IF_ERR_INIT_TX_DEALLOC_Q_MEM_ALLOC;
+             return;
+
+
+        case KAL_ERR_INVALID_ARG:
+            *p_err = NET_IF_ERR_INIT_TX_DEALLOC_Q_INVALID_ARG;
+             return;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_IF_ERR_INIT_TX_DEALLOC_Q_CREATE;
+             return;
+    }
+
+    NetIF_TxDeallocQ_SizeCfg(NET_CFG_IF_TX_DEALLOC_Q_SIZE);
+
+
+    KAL_TaskCreate(NetIF_TxDeallocTaskHandle,
+                   NetIF_TxDeallocTask,
+                   DEF_NULL,
+                   p_tx_task_cfg->Prio,
+                   DEF_NULL,
+                  &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_ISR:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_IF_ERR_INIT_TX_DEALLOC_TASK_CREATE;
+             return;
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_ObjInit()
+*
+* Description : Create and initialize interface's OS objects.
+*
+* Argument(s) : p_if    Pointer to network interface.
+*               ----    Argument validated in NetIF_Add().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                       NET_IF_ERR_NONE
+*                       NET_IF_ERR_INIT_TX_SUSPEND_MEM_ALLOC
+*                       NET_IF_ERR_INIT_TX_SUSPEND_SEM_INVALID_ARG
+*                       NET_IF_ERR_INIT_TX_SUSPEND_SEM_CREATE
+*                       NET_IF_ERR_INIT_TX_SUSPEND_TIMEOUT
+*                       NET_IF_ERR_INIT_TX_SUSPEND_MEM_ALLOC
+*                       NET_IF_ERR_INIT_TX_SUSPEND_SEM_INVALID_ARG
+*                       NET_IF_ERR_INIT_TX_SUSPEND_SEM_CREATE
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Add().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_ObjInit (NET_IF   *p_if,
+                             NET_ERR  *p_err)
+{
+    KAL_ERR  err_kal;
+    LIB_ERR  err_lib;
+
+
+    p_if->DevTxRdySignalObj = KAL_SemCreate((const CPU_CHAR  *)NET_IF_DEV_TX_RDY_NAME,
+                                                               DEF_NULL,
+                                                              &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_IF_ERR_INIT_TX_SUSPEND_MEM_ALLOC;
+             goto exit;
+
+
+        case KAL_ERR_INVALID_ARG:
+            *p_err = NET_IF_ERR_INIT_TX_SUSPEND_SEM_INVALID_ARG;
+             goto exit;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_CREATE:
+        default:
+             *p_err = NET_IF_ERR_INIT_TX_SUSPEND_SEM_CREATE;
+              goto exit;
+    }
+
+
+#ifdef  NET_LOAD_BAL_MODULE_EN                /* ------ INITIALIZE NETWORK INTERFACE TRANSMIT SUSPEND ------- */
+
+                                                        /* Initialize transmit suspend signals' timeout values.         */
+    NetIF_TxSuspendTimeoutInit(p_if, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+       *p_err = NET_IF_ERR_INIT_TX_SUSPEND_TIMEOUT;
+        goto exit_fail_tx_signal;
+    }
+
+
+   p_if->TxSuspendSignalObj = KAL_SemCreate((const CPU_CHAR  *)NET_IF_TX_SUSPEND_NAME,
+                                                               DEF_NULL,
+                                                              &err_kal);
+   switch (err_kal) {
+       case KAL_ERR_NONE:
+            break;
+
+
+       case KAL_ERR_MEM_ALLOC:
+           *p_err = NET_IF_ERR_INIT_TX_SUSPEND_MEM_ALLOC;
+            goto exit_fail_tx_signal;
+
+
+       case KAL_ERR_INVALID_ARG:
+           *p_err = NET_IF_ERR_INIT_TX_SUSPEND_SEM_INVALID_ARG;
+            goto exit_fail_tx_signal;
+
+
+       case KAL_ERR_ISR:
+       case KAL_ERR_CREATE:
+       default:
+            *p_err = NET_IF_ERR_INIT_TX_SUSPEND_SEM_CREATE;
+             goto exit_fail_tx_signal;
+
+   }
+#endif
+
+
+   Mem_DynPoolCreate(NET_IF_LINK_SUBSCRIBER,
+                    &p_if->LinkSubscriberPool,
+                     DEF_NULL,
+                     sizeof(NET_IF_LINK_SUBSCRIBER_OBJ),
+                     sizeof(CPU_DATA),
+                     0u,
+                     LIB_MEM_BLK_QTY_UNLIMITED,
+                    &err_lib);
+   if(err_lib != LIB_MEM_ERR_NONE) {
+      *p_err = NET_IF_ERR_LINK_SUBSCRIBER_MEM_ALLOC;
+       goto exit_fail_tx_suspend;
+   }
+
+   p_if->LinkSubscriberListHeadPtr = DEF_NULL;
+   p_if->LinkSubscriberListEndPtr  = DEF_NULL;
+
+
+  *p_err = NET_IF_ERR_NONE;
+   goto exit;
+
+
+exit_fail_tx_suspend:
+#ifdef  NET_LOAD_BAL_MODULE_EN
+    KAL_SemDel(p_if->TxSuspendSignalObj, &err_kal);
+
+exit_fail_tx_signal:
+
+#endif
+    KAL_SemDel(p_if->DevTxRdySignalObj, &err_kal);
+
+exit:
+     return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_ObjDel()
+*
+* Description : Delete interface's OS objects.
+*
+* Argument(s) : p_if    Pointer to network interface.
+*               ----    Argument validated in NetIF_Add().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Add().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_ObjDel (NET_IF  *p_if)
+{
+    KAL_ERR  err_kal;
+
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+    KAL_SemDel(p_if->TxSuspendSignalObj, &err_kal);
+#endif
+
+    KAL_SemDel(p_if->DevTxRdySignalObj,  &err_kal);
+
+   (void)&err_kal;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_DevTxRdyWait()
+*
+* Description : Wait on device transmit ready signal.
+*
+* Argument(s) : if_nbr      Interface number to wait on transmit ready signal.
+*               ------      Argument validated in NetIF_Tx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                    Device transmit ready signal     received.
+*                               NET_DEV_ERR_TX_RDY_SIGNAL_TIMEOUT   Device transmit ready signal NOT received
+*                                                                       within timeout.
+*                               NET_DEV_ERR_TX_RDY_SIGNAL_FAULT     Device transmit ready signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Tx().
+*
+*               This function is a network interface (IF) to network device function & SHOULD be called
+*               only by appropriate network interface function(s).
+*
+* Note(s)     : (1) (a) If timeouts NOT desired, wait for device transmit ready signal.
+*
+*                   (b) If timeout      desired, return NET_DEV_ERR_TX_RDY_SIGNAL_TIMEOUT error on transmit
+*                       ready timeout.  Implement timeout with OS-dependent functionality.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_DevTxRdyWait (NET_IF   *p_if,
+                                  NET_ERR  *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_SemPend(p_if->DevTxRdySignalObj, KAL_OPT_PEND_NONE, 15,  &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_IF_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_TIMEOUT:
+            *p_err = NET_IF_ERR_TX_RDY_SIGNAL_TIMEOUT;          /* See Note #1b.                                        */
+             break;
+
+
+        case KAL_ERR_ABORT:
+        case KAL_ERR_ISR:
+        case KAL_ERR_WOULD_BLOCK:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_IF_ERR_TX_RDY_SIGNAL_FAULT;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIF_RxTask()
+*
+* Description : OS-dependent shell task to schedule & run Network Interface Receive Task handler.
+*
+*               (1) Shell task's primary purpose is to schedule & run NetIF_RxTaskHandler() forever;
+*                   (i.e. shell task should NEVER exit).
+*
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-III).
+*
+* Return(s)   : none.
+*
+* Created by  : NetIF_InitTaskObj().
+*
+* Note(s)     : (2) To prevent deadlocking any lower priority task(s), network tasks SHOULD delay for a
+*                   (brief) time after any network task handlers exit.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_RxTask (void  *p_data)
+{
+   (void)&p_data;                                               /* Prevent 'variable unused' compiler warning.          */
+
+    while (DEF_ON) {
+        NetIF_RxTaskHandler();
+        KAL_DlyTick(1u, KAL_OPT_DLY_NONE);                      /* Dly for lower prio task(s) [see Note #2].            */
+    }
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_RxTaskHandler()
+*
+* Description : (1) Handle received data packets from all enabled network interface(s)/device(s) :
+*
+*                   (a) Wait for packet receive signal from network interface(s)/device(s)
+*                   (b) Acquire  network  lock                                              See Note #3
+*                   (c) Handle   received packet
+*                   (d) Release  network  lock
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxTask().
+*
+*               This function is a network protocol suite to operating system (OS) function & SHOULD be
+*               called only by appropriate network-operating system port function(s).
+*
+* Note(s)     : (2) NetIF_RxTaskHandler() blocked until network initialization completes.
+*
+*               (3) NetIF_RxTaskHandler() blocks ALL other network protocol tasks by pending on & acquiring
+*                   the global network lock (see 'net.h  Note #3').
+*********************************************************************************************************
+*/
+
+static  void  NetIF_RxTaskHandler (void)
+{
+    NET_IF_NBR  if_nbr;
+    NET_ERR     err;
+
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        Net_InitCompWait(&err);                                 /* ... wait on net init (see Note #2).                  */
+        if (err != NET_ERR_NONE) {
+            return;
+        }
+    }
+
+
+    while (DEF_ON) {
+                                                                /* ------------------ WAIT FOR RX PKT ----------------- */
+        do {
+            if_nbr = NetIF_RxTaskWait(&err);
+        } while (err != NET_IF_ERR_NONE);
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #3.                                         */
+        Net_GlobalLockAcquire((void *)&NetIF_RxTaskHandler, &err);
+        if (err != NET_ERR_NONE) {
+            continue;
+        }
+
+                                                                /* ------------------ HANDLE RX PKT ------------------- */
+        NetIF_RxHandler(if_nbr);
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+        Net_GlobalLockRelease();
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_RxTaskWait()
+*
+* Description : Wait on network interface receive queue for receive signal.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface receive queue signal
+*                                                                   successfully  received.
+*                               NET_IF_ERR_RX_Q_EMPTY           Network interface receive queue empty.
+*                               NET_IF_ERR_RX_Q_SIGNAL_FAULT    Network interface receive queue signal
+*                                                                   fault.
+*
+* Return(s)   : Interface number of signaled receive, if NO error(s).
+*
+*               NET_IF_NBR_NONE,                      otherwise.
+*
+* Caller(s)   : NetIF_RxTaskHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) If timeouts NOT desired, wait on network interface receive queue until signaled
+*                       (i.e. do NOT exit).
+*
+*                   (b) If timeout      desired, return NET_IF_ERR_RX_Q_EMPTY error on receive queue
+*                       timeout.  Implement timeout with OS-dependent functionality.
+*
+*               (2) Encoding/decoding the network interface number does NOT require any message size.
+*
+*                   See also 'NetIF_RxTaskSignal()  Note #2'.
+*********************************************************************************************************
+*/
+
+static  NET_IF_NBR  NetIF_RxTaskWait (NET_ERR  *p_err)
+{
+    void         *p_rx_q;
+    CPU_ADDR      if_nbr_msg;
+    NET_IF_NBR    if_nbr;
+    KAL_ERR       err_kal;
+
+                                                                /* Wait on network interface receive task queue ...     */
+                                                                /* ... preferably without timeout (see Note #1a).       */
+    p_rx_q = KAL_QPend(NetIF_RxQ_Handle, KAL_OPT_PEND_NONE, 0, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             if_nbr_msg = (CPU_ADDR  )p_rx_q;
+             if_nbr     = (NET_IF_NBR)if_nbr_msg;               /* Decode interface number of signaled receive.         */
+            *p_err      =  NET_IF_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_TIMEOUT:
+             if_nbr = NET_IF_NBR_NONE;
+            *p_err   = NET_IF_ERR_RX_Q_EMPTY;                    /* See Note #1b.                                        */
+             break;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_ABORT:
+        case KAL_ERR_WOULD_BLOCK:
+        case KAL_ERR_OS:
+        default:
+             if_nbr = NET_IF_NBR_NONE;
+            *p_err  = NET_IF_ERR_RX_Q_SIGNAL_FAULT;
+             break;
+    }
+
+    return (if_nbr);
+}
+
+
+/*
+*******************************************************************************************************
+*                                           NetIF_RxHandler()
+*
+* Description : (1) Receive data packets from network interface(s)/device(s) :
+*
+*                   (a) Receive packet from interface/device :
+*                       (1) Get    receive packet's   network interface
+*                       (2) Update receive packet counters
+*                       (3)        Receive packet via network interface
+*
+*                   (b) Handle network load balancing  #### NET-821
+*                   (c) Update receive statistics
+*
+*
+* Argument(s) : if_nbr      Network interface number that received a packet.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxTaskHandler().
+*
+* Note(s)     : (2) Network buffer already freed by higher layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_RxHandler (NET_IF_NBR  if_nbr)
+{
+    NET_IF        *p_if;
+    NET_BUF_SIZE   size;
+    NET_ERR        err;
+
+
+                                                                /* --------------- GET RX PKT's NET IF ---------------- */
+    p_if = NetIF_Get(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        return;
+    }
+
+
+                                                                /* ------------------ RX NET IF PKT ------------------- */
+    NetStat_CtrDec(&NetIF_RxTaskPktCtr, &err);                  /* Dec rx task's nbr q'd rx pkts avail.                 */
+
+    NET_CTR_STAT_INC(Net_StatCtrs.IFs.RxPktCtr);
+    NET_CTR_STAT_INC(Net_StatCtrs.IFs.IF[if_nbr].RxNbrPktCtr);
+
+
+    switch (if_nbr) {
+        case NET_IF_NBR_LOOPBACK:
+#ifdef NET_IF_LOOPBACK_MODULE_EN
+             size = NetIF_Loopback_Rx(p_if,
+                                     &err);
+#else
+             err = NET_IF_ERR_INVALID_IF;
+#endif
+             break;
+
+
+        default:
+             size = NetIF_RxPkt(p_if,
+                               &err);
+             break;
+    }
+
+
+
+#ifdef  NET_LOAD_BAL_MODULE_EN                                  /* --------------- HANDLE NET LOAD BAL ---------------- */
+    NetIF_RxHandlerLoadBal(p_if);
+#endif
+
+
+                                                                /* ----------------- UPDATE RX STATS ------------------ */
+    switch (err) {                                              /* Chk err from NetIF_Loopback_Rx() / NetIF_RxPkt().    */
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.IF[if_nbr].RxNbrPktCtrProcessed);
+             NET_CTR_STAT_ADD(Net_StatCtrs.IFs.IF[if_nbr].RxNbrOctets, size);
+
+            (void)&size;                                        /* Prevent possible 'variable unused' warning.          */
+             break;
+
+
+        case NET_ERR_INVALID_TRANSACTION:
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_ERR_RX:
+        case NET_DEV_ERR_RX:
+        case NET_IF_ERR_INVALID_IF:
+        case NET_IF_ERR_INVALID_CFG:
+        case NET_ERR_FAULT_NULL_FNCT:
+        case NET_ERR_FAULT_MEM_ALLOC:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        case NET_BUF_ERR_NONE_AVAIL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_SIZE:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_BUF_ERR_INVALID_LEN:
+        default:
+                                                                /* See Note #2.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.RxPktDisCtr);
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[if_nbr].RxPktDisCtr);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_RxHandlerLoadBal()
+*
+* Description : Handle network receive versus transmit load balancing.
+*
+* Argument(s) : p_if        Pointer to network interface to handle load balancing.
+*               ----        Argument validated in NetIF_RxHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxHandler().
+*
+* Note(s)     : (1) To balance network receive versus transmit packet loads for certain network connection
+*                   types (e.g. stream-type connections), network receive & transmit packets on each
+*                   network interface SHOULD be handled in an APPROXIMATELY balanced ratio.
+*
+*                   (a) Network task priorities & lock mechanisms partially maintain a balanced ratio
+*                       between network receive versus transmit packet handling.
+*
+*                       However, the handling of network receive & transmit packets :
+*
+*                       (1) SHOULD be interleaved so that for every few packet(s) received & handled,
+*                           several packet(s) should be transmitted; & vice versa.
+*
+*                       (2) SHOULD NOT exclusively handle receive nor transmit packets, even for a
+*                           short period of time, but especially for a prolonged period of time.
+*
+*                   (b) To implement network receive versus transmit load balancing :
+*
+*                       (1) The availability of network receive packets MUST be managed for each network
+*                           interface :
+*
+*                           (A) Increment the number of available network receive packets queued to a
+*                               network interface for each packet received.
+*
+*                           (B) Decrement the number of available network receive packets queued to a
+*                               network interface for each received packet processed.
+*
+*                       (2) Certain network connections MUST periodically suspend network transmit(s)
+*                           to handle network interface(s)' receive packet(s) :
+*
+*                           (A) Suspend network connection transmit(s) if any receive packets are
+*                               available on a network interface.
+*
+*                           (B) Signal or timeout network connection transmit suspend(s) to restart
+*                               transmit(s).
+*
+*                   See also 'net_if.c  NetIF_RxPkt()  Note #1'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+static  void  NetIF_RxHandlerLoadBal (NET_IF  *p_if)
+{
+    NetIF_RxPktDec(p_if);                                        /* Dec net IF's nbr q'd rx pkts avail (see Note #1b1B). */
+    NetIF_TxSuspendSignal(p_if);                                 /* Signal net tx suspend              (see Note #1b2B). */
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             NetIF_RxPkt()
+*
+* Description : (1) Receive data packets from devices & demultiplex to network interface layer :
+*
+*                   (a) Update network interface's link status                          See Note #2
+*                   (b) Receive packet from device :
+*                       (1) Get receive packet from device
+*                       (2) Get receive packet network buffer
+*                   (c) Demultiplex receive packet to specific network interface
+*
+*
+* Argument(s) : p_if        Pointer to network interface that received a packet.
+*               ----        Argument validated in NetIF_RxHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface packet successfully
+*                                                                   received & processed.
+*
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                               NET_DEV_ERR_RX                  Network device receive error.
+*
+*                                                               --- RETURNED BY NetIF_RxPktDiscard() : ---
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+*                                                               ------- RETURNED BY NetBuf_Get() : -------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                               NET_BUF_ERR_NONE_AVAIL          NO available buffers to allocate.
+*                               NET_BUF_ERR_INVALID_SIZE        Requested size is greater then the maximum
+*                                                                   buffer size available.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index.
+*                               NET_BUF_ERR_INVALID_LEN         Invalid buffer length.
+*
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                                                               ----- RETURNED BY 'p_if_api->Rx()' : ------
+*                                                               See specific network interface(s) 'Rx()'
+*                                                                   for additional return error codes.
+*
+* Return(s)   : Size of received packet, if NO error(s).
+*
+*               0,                       otherwise.
+*
+* Caller(s)   : NetIF_RxHandler().
+*
+* Note(s)     : (2) If a network interface receives a packet, its physical link must be 'UP' & the
+*                   interface's physical link state is set accordingly.
+*
+*                   (a) An attempt to check for link state is made after an interface has been started.
+*                       However, many physical layer devices, such as Ethernet physical layers require
+*                       several seconds for Auto-Negotiation to complete before the link becomes
+*                       established.  Thus the interface link flag is not updated until the link state
+*                       timer expires & one or more attempts to check for link state have been completed.
+*
+*               (3) When network buffer is demultiplexed to network IF receive, the buffer's reference
+*                   counter is NOT incremented since the packet interface layer does NOT maintain a
+*                   reference to the buffer.
+*
+*               (4) Network buffer already freed by higher layer.
+*********************************************************************************************************
+*/
+
+static  NET_BUF_SIZE  NetIF_RxPkt (NET_IF   *p_if,
+                                   NET_ERR  *p_err)
+{
+    NET_IF_API    *p_if_api;
+    NET_DEV_API   *pdev_api;
+    CPU_INT08U    *p_buf_data;
+    NET_BUF       *p_buf;
+    NET_BUF_HDR   *p_buf_hdr;
+    NET_BUF_SIZE   size;
+    NET_BUF_SIZE   ix_rx;
+    NET_BUF_SIZE   ix_offset;
+    NET_ERR        err;
+
+                                                                    /* --------------- RX PKT FROM DEV ---------------- */
+    pdev_api = (NET_DEV_API *)p_if->Dev_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (pdev_api == (NET_DEV_API *)0) {
+       *p_err =  NET_IF_ERR_INVALID_CFG;
+        return (0u);
+    }
+    if (pdev_api->Rx == (void (*)(NET_IF      *,
+                                  CPU_INT08U **,
+                                  CPU_INT16U  *,
+                                  NET_ERR     *))0) {
+       *p_err =  NET_ERR_FAULT_NULL_FNCT;
+        return (0u);
+    }
+#endif
+
+    pdev_api->Rx(p_if, &p_buf_data, &size, &err);                     /* Get rx'd buf data area from dev.                 */
+    if ( err != NET_DEV_ERR_NONE) {
+       *p_err  = NET_DEV_ERR_RX;
+        return (0u);
+    }
+
+                                                                    /* Get net buf for rx'd buf data area.              */
+    ix_rx = NET_IF_IX_RX;
+    p_buf = NetBuf_Get(p_if->Nbr,
+                       NET_TRANSACTION_RX,
+                       size,
+                       ix_rx,
+                       &ix_offset,
+                       NET_BUF_FLAG_NONE,
+                       p_err);
+    if (*p_err != NET_BUF_ERR_NONE) {
+         NetBuf_FreeBufDataAreaRx(p_if->Nbr, p_buf_data);
+         return (0u);
+    }
+
+    p_buf->DataPtr = p_buf_data;
+    ix_rx         += ix_offset;
+
+
+                                                                    /* ----------------- DEMUX RX PKT ----------------- */
+    p_buf_hdr                    = &p_buf->Hdr;
+    p_buf_hdr->TotLen            = (NET_BUF_SIZE)size;               /* Set pkt size as buf tot len & data len.          */
+    p_buf_hdr->DataLen           = (NET_BUF_SIZE)p_buf_hdr->TotLen;
+    p_buf_hdr->IF_HdrIx          = (CPU_INT16U  )ix_rx;
+    p_buf_hdr->ProtocolHdrType   =  NET_PROTOCOL_TYPE_IF;
+    p_buf_hdr->ProtocolHdrTypeIF =  NET_PROTOCOL_TYPE_IF;
+    DEF_BIT_SET(p_buf_hdr->Flags,   NET_BUF_FLAG_RX_REMOTE);
+
+                                                                    /* See Note #3.                                     */
+
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+        NetIF_RxPktDiscard(p_buf, p_err);
+        return (0u);
+    }
+    if (p_if_api->Rx == (void (*)(NET_IF  *,
+                                 NET_BUF *,
+                                 NET_ERR *))0) {
+        NetIF_RxPktDiscard(p_buf, p_err);
+        return (0u);
+    }
+#endif
+
+
+    p_if_api->Rx(p_if, p_buf, p_err);                                   /* Demux rx pkt to appropriate net IF rx handler.   */
+    if (*p_err != NET_IF_ERR_NONE) {
+                                                                    /* See Note #4.                                     */
+         return (0u);
+    }
+
+
+                                                                    /* -------------- RTN RX'D DATA SIZE -------------- */
+   *p_err =  NET_IF_ERR_NONE;
+
+    return (size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetIF_RxPktDec()
+*
+* Description : Decrement number receive packet(s) queued & available for a network interface.
+*
+* Argument(s) : p_if    Pointer to network interface that received a packet.
+*               ----    Argument validated in NetIF_RxHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxHandlerLoadBal().
+*
+* Note(s)     : (1) To balance network receive versus transmit packet loads for certain network connection
+*                   types (e.g. stream-type connections), network receive & transmit packets on each
+*                   network interface SHOULD be handled in an APPROXIMATELY balanced ratio.
+*
+*                   (a) Network task priorities & lock mechanisms partially maintain a balanced ratio
+*                       between network receive versus transmit packet handling.
+*
+*                       However, the handling of network receive & transmit packets :
+*
+*                       (1) SHOULD be interleaved so that for every few packet(s) received & handled,
+*                           several packet(s) should be transmitted; & vice versa.
+*
+*                       (2) SHOULD NOT exclusively handle receive nor transmit packets, even for a
+*                           short period of time, but especially for a prolonged period of time.
+*
+*                   (b) To implement network receive versus transmit load balancing :
+*
+*                       (1) The availability of network receive packets MUST be managed for each network
+*                           interface :
+*
+*                           (A) Increment the number of available network receive packets queued to a
+*                               network interface for each packet received.
+*
+*                           (B) Decrement the number of available network receive packets queued to a
+*                               network interface for each received packet processed.
+*
+*                       (2) Certain network connections MUST periodically suspend network transmit(s)
+*                           to handle network interface(s)' receive packet(s) :
+*
+*                           (A) Suspend network connection transmit(s) if any receive packets are
+*                               available on a network interface.
+*
+*                           (B) Signal or timeout network connection transmit suspend(s) to restart
+*                               transmit(s).
+*
+*                   See also 'NetIF_RxPktInc()         Note #1',
+*                            'NetIF_RxPktIsAvail()     Note #1',
+*                            'NetIF_TxSuspend()        Note #1',
+*                          & 'NetIF_TxSuspendSignal()  Note #1'.
+*
+*               (2) Network interfaces' 'RxPktCtr' variables MUST ALWAYS be accessed exclusively in
+*                   critical sections.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+static  void  NetIF_RxPktDec (NET_IF  *p_if)
+{
+    NET_ERR  err;
+
+
+    NetStat_CtrDec(&p_if->RxPktCtr, &err);                       /* Dec net IF's nbr q'd rx pkts avail (see Note #1b1B). */
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_RxPktDiscard()
+*
+* Description : On any IF receive error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+static  void  NetIF_RxPktDiscard (NET_BUF  *p_buf,
+                                  NET_ERR  *p_err)
+{
+#if (NET_CTR_CFG_ERR_EN         == DEF_ENABLED)
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_ERR       err;
+#endif
+    NET_BUF_HDR  *p_buf_hdr;
+    CPU_BOOLEAN   valid;
+    NET_IF_NBR    if_nbr;
+    NET_BUF_QTY   i;
+#endif
+    NET_BUF_QTY   nbr_freed;
+
+
+#if (NET_CTR_CFG_ERR_EN         == DEF_ENABLED)
+    if (p_buf != (NET_BUF *)0) {
+        p_buf_hdr = &p_buf->Hdr;
+        if_nbr   =  p_buf_hdr->IF_Nbr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        valid    =  NetIF_IsValidHandler(if_nbr, &err);
+#else
+        valid    =  DEF_YES;
+#endif
+    } else {
+        valid    =  DEF_NO;
+    }
+#endif
+
+
+    nbr_freed = NetBuf_FreeBufList((NET_BUF *)p_buf,
+                                   (NET_CTR *)0);
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    for (i = 0u; i < nbr_freed; i++) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.RxPktDisCtr);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[if_nbr].RxPktDisCtr);
+        }
+    }
+#else
+   (void)&nbr_freed;                                            /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+   *p_err = NET_ERR_RX;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_RxQ_SizeCfg()
+*
+* Description : Configure the maximum number of receive signals that may be concurrently queued to the
+*                   network interface receive queue.
+*
+* Argument(s) : size    Configured size of network interface receive queue :
+*
+*                           NET_IF_Q_SIZE_MAX                   Maximum configurable queue size
+*                                                                  (i.e. NO limit on queue size).
+*                           In number of receive signals,       otherwise.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_InitTaskObj().
+*
+*               This function is a board-support package function & SHOULD be called only by
+*               appropriate product function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_RxQ_SizeCfg (NET_IF_Q_SIZE  size)
+{
+    NetIF_RxQ_SizeCfgd    = size;
+    NetIF_RxQ_SizeCfgdRem = size;
+
+   (void)&NetIF_RxQ_SizeCfgd;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_TxDeallocTask()
+*
+* Description : OS-dependent shell task to schedule & run Network Interface Transmit Deallocation Task
+*                   handler.
+*
+*               (1) Shell task's primary purpose is to schedule & run NetIF_TxDeallocTaskHandler()
+*                   forever; (i.e. shell task should NEVER exit).
+*
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-III).
+*
+* Return(s)   : none.
+*
+* Created by  : NetIF_InitTaskObj().
+*
+* Note(s)     : (2) To prevent deadlocking any lower priority task(s), network tasks SHOULD delay for a
+*                   (brief) time after any network task handlers exit.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_TxDeallocTask (void  *p_data)
+{
+   (void)&p_data;                                               /* Prevent 'variable unused' compiler warning.          */
+
+    while (DEF_ON) {
+        NetIF_TxDeallocTaskHandler();
+        KAL_Dly(1u);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_TxDeallocTaskHandler()
+*
+* Description : (1) Deallocate network buffers & data areas :
+*
+*                   (a) Wait for   transmitted network buffer data areas deallocated from network device(s)
+*                   (b) Acquire network lock
+*                   (c) Deallocate transmitted network buffer(s)
+*                   (d) Release network lock
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxDeallocTask().
+*
+*               This function is a network protocol suite to operating system (OS) function & SHOULD be
+*               called only by appropriate network-operating system port function(s).
+*
+* Note(s)     : (2) NetIF_TxDeallocTaskHandler() blocked until network initialization completes.
+*
+*               (3) NetIF_TxDeallocTaskHandler() blocks ALL other network protocol tasks by pending on &
+*                   acquiring the global network lock (see 'net.h  Note #3').
+*********************************************************************************************************
+*/
+
+static  void  NetIF_TxDeallocTaskHandler (void)
+{
+    CPU_INT08U  *p_buf_data;
+    NET_ERR      err;
+
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        Net_InitCompWait(&err);                                 /* ... wait on net init (see Note #2).                  */
+        if (err != NET_ERR_NONE) {
+            return;
+        }
+    }
+
+
+    while (DEF_ON) {
+                                                                /* ---------- WAIT FOR TX'D NET BUF DATA AREA --------- */
+        do {
+            p_buf_data = NetIF_TxDeallocTaskWait(&err);
+        } while (err!= NET_IF_ERR_NONE);
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #3.                                         */
+        Net_GlobalLockAcquire((void *)&NetIF_TxDeallocTaskHandler, &err);
+        if (err != NET_ERR_NONE) {
+            continue;
+        }
+
+                                                                /* ---------------- DEALLOC TX NET BUF ---------------- */
+        NetIF_TxPktListDealloc(p_buf_data);
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+        Net_GlobalLockRelease();
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_TxDeallocTaskWait()
+*
+* Description : Wait on network interface transmit deallocation queue for network buffer transmit data
+*                   areas deallocated from device(s).
+*
+* Argument(s) : p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                         Transmit buffer data area  deallocated
+*                                                                            from device.
+*                               NET_IF_ERR_TX_DEALLC_Q_EMPTY            Network interface transmit deallocation
+*                                                                           queue empty.
+*                               NET_IF_ERR_TX_DEALLC_Q_SIGNAL_FAULT     Network interface transmit deallocation
+*                                                                           queue signal fault.
+*
+* Return(s)   : Pointer to deallocated transmit buffer data area, if NO error(s).
+*
+*               Pointer to NULL,                                  otherwise.
+*
+* Caller(s)   : NetIF_TxDeallocTaskHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) If timeouts NOT desired, wait on network interface transmit deallocation queue
+*                       until signaled (i.e. do NOT exit).
+*
+*                   (b) If timeout      desired, return NET_IF_ERR_TX_DEALLC_Q_EMPTY error on transmit
+*                       deallocation queue timeout.  Implement timeout with OS-dependent functionality.
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  *NetIF_TxDeallocTaskWait (NET_ERR  *p_err)
+{
+    void         *p_tx_q;
+    CPU_INT08U   *p_buf_data;
+    KAL_ERR       err_kal;
+
+                                                                /* Wait for deallocated transmit buffer data area ...   */
+                                                                /* ... preferably without timeout (see Note #1a).       */
+    p_tx_q = KAL_QPend(NetIF_TxQ_Handle, KAL_OPT_PEND_NONE, 0, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             p_buf_data = (CPU_INT08U *)p_tx_q;                  /* Decode pointer to transmit buffer data area.         */
+            *p_err      =  NET_IF_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_TIMEOUT:
+             p_buf_data = (CPU_INT08U *)0;
+            *p_err      =  NET_IF_ERR_TX_DEALLC_Q_EMPTY;         /* See Note #1b.                                        */
+             break;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_WOULD_BLOCK:
+        case KAL_ERR_OS:
+        default:
+             p_buf_data = (CPU_INT08U *)0;
+            *p_err      =  NET_IF_ERR_TX_DEALLC_Q_SIGNAL_FAULT;
+             break;
+    }
+
+    return (p_buf_data);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_TxDeallocQ_SizeCfg()
+*
+* Description : Configure the maximum number of transmit data areas that may be concurrently queued to
+*                   the network interface transmit deallocation queue.
+*
+* Argument(s) : size    Configured size of network interface transmit deallocation queue :
+*
+*                           NET_IF_Q_SIZE_MAX                   Maximum configurable queue size
+*                                                                  (i.e. NO limit on queue size).
+*                           In number of transmit data areas,   otherwise.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_InitTaskObj().
+*
+*               This function is a board-support package function & SHOULD be called only by
+*               appropriate product function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_TxDeallocQ_SizeCfg (NET_IF_Q_SIZE  size)
+{
+    NetIF_TxDeallocQ_SizeCfgd    = size;
+    NetIF_TxDeallocQ_SizeCfgdRem = size;
+
+   (void)&NetIF_TxDeallocQ_SizeCfgd;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetIF_TxHandler()
+*
+* Description : (1) Transmit data packets to  network interface(s)/device(s) :
+*
+*                   (a) Get transmit packet's network interface
+*                   (b) Check network interface's/device's link state
+*                   (c) Transmit packet via   network interface
+*                   (d) Update transmit statistics
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer data packet to transmit.
+*               ----        Argument checked in NetIF_Tx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Packet successfully transmitted (or queued
+*                                                                   for later transmission).
+*                               NET_ERR_IF_LINK_DOWN            Network interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*                               NET_ERR_TX                      Network interface/device transmit error.
+*
+*                                                               ---- RETURNED BY NetIF_Loopback_Tx() : ----
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Tx().
+*
+* Note(s)     : (2) Network buffer already freed by lower layer; only increment error counters.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_TxHandler (NET_BUF  *p_buf,
+                               NET_ERR  *p_err)
+{
+    NET_BUF_HDR   *p_buf_hdr;
+    NET_IF        *p_if_tx;
+    NET_IF_NBR     if_nbr;
+    NET_IF_NBR     if_nbr_tx;
+    NET_BUF_SIZE   size;
+    NET_ERR        err;
+
+
+                                                                /* ------------ VALIDATE TX PKT's NET IF's ------------ */
+    p_buf_hdr  = &p_buf->Hdr;
+    if_nbr    =  p_buf_hdr->IF_Nbr;
+    if_nbr_tx =  p_buf_hdr->IF_NbrTx;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (if_nbr != if_nbr_tx) {                                  /* If net IF to tx to NOT same as tx'ing net IF & ..    */
+        if (if_nbr_tx != NET_IF_NBR_LOOPBACK) {                 /* .. net IF to tx to NOT loopback IF,            ..    */
+            NetIF_TxPktDiscard(p_buf, DEF_YES, &err);           /* .. discard tx pkt & rtn err.                         */
+           *p_err = NET_IF_ERR_INVALID_IF;
+            return;
+        }
+    }
+#endif
+
+
+                                                                /* --------------- GET TX PKT's NET IF ---------------- */
+    p_if_tx = NetIF_Get(if_nbr_tx, p_err);                       /* Get net IF to tx to.                                 */
+    if (*p_err != NET_IF_ERR_NONE) {
+         NetIF_TxPktDiscard(p_buf, DEF_YES, &err);
+         return;
+    }
+
+
+                                                                /* -------------- CHK NET IF LINK STATE --------------- */
+    switch (p_if_tx->Link) {                                    /* Chk link state of net IF to tx to.                   */
+        case NET_IF_LINK_UP:
+             break;
+
+
+        case NET_IF_LINK_DOWN:
+        default:
+             NetIF_TxPktDiscard(p_buf, DEF_YES, &err);
+            *p_err = NET_ERR_IF_LINK_DOWN;
+             return;
+    }
+
+
+                                                                /* ------------------ TX NET IF PKT ------------------- */
+    switch (if_nbr_tx) {
+        case NET_IF_NBR_LOOPBACK:
+#ifdef NET_IF_LOOPBACK_MODULE_EN
+             size = NetIF_Loopback_Tx(p_if_tx,
+                                      p_buf,
+                                      p_err);
+#else
+            *p_err = NET_ERR_IF_LOOPBACK_DIS;
+#endif
+             break;
+
+
+        default:
+             size = NetIF_TxPkt(p_if_tx,
+                                p_buf,
+                                p_err);
+             break;
+    }
+
+
+                                                                /* ----------------- UPDATE TX STATS ------------------ */
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.TxPktCtr);
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.IF[if_nbr].TxNbrPktCtr);
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.IF[if_nbr].TxNbrPktCtrProcessed);
+             NET_CTR_STAT_ADD(Net_StatCtrs.IFs.IF[if_nbr].TxNbrOctets, size);
+
+            (void)&if_nbr;                                      /* Prevent possible 'variable unused' warnings.         */
+            (void)&size;
+             break;
+
+
+        case NET_IF_ERR_TX_ADDR_PEND:                           /* Tx pending on hw addr; will tx when addr resolved.   */
+            *p_err = NET_IF_ERR_NONE;
+             return;
+
+
+        case NET_ERR_IF_LOOPBACK_DIS:
+             NetIF_TxPktDiscard(p_buf, DEF_YES, &err);
+                                                                /* Rtn err from NetIF_Loopback_Tx().                    */
+             return;
+
+
+        case NET_ERR_INVALID_TRANSACTION:
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_ERR_TX:
+        case NET_IF_ERR_INVALID_IF:
+        case NET_IF_ERR_INVALID_CFG:
+        case NET_ERR_FAULT_NULL_FNCT:
+        case NET_IF_ERR_RX_Q_FULL:
+        case NET_IF_ERR_RX_Q_SIGNAL_FAULT:
+        case NET_DEV_ERR_TX_RDY_SIGNAL_TIMEOUT:
+        case NET_DEV_ERR_TX_RDY_SIGNAL_FAULT:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_BUF_ERR_NONE_AVAIL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_SIZE:
+        case NET_BUF_ERR_INVALID_LEN:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+                                                                /* See Note #2.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.TxPktDisCtr);
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[if_nbr].TxPktDisCtr);
+            *p_err = NET_ERR_TX;
+             return;
+    }
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                             NetIF_TxPkt()
+*
+* Description : (1) Transmit data packets from network interface layer to network device(s) :
+*
+*                   (a) Validate   transmit data packet
+*                   (b) Prepare    transmit data packet(s) via network interface layer
+*                   (c) Wait for   transmit ready signal from  network device
+*                   (d) Prepare    transmit data packet(s) via network device driver :
+*                       (1) Set    transmit data packet(s)' transmit lock
+*                       (2) Insert transmit data packet(s) into network interface transmit list
+*                   (e)            Transmit data packet(s) via network device driver
+*
+*
+* Argument(s) : p_if        Pointer to network interface to transmit a packet.
+*               ----        Argument validated in NetIF_TxHandler().
+*
+*               p_buf       Pointer to network buffer data packet to transmit.
+*               -----       Argument checked   in NetIF_Tx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function
+*                               (see Note #4) :
+*
+*                               NET_IF_ERR_NONE                     Packet successfully transmitted.
+*                               NET_IF_ERR_TX_ADDR_PEND             Packet successfully prepared & queued
+*                                                                       for later transmission.
+*
+*                               NET_ERR_TX                          Network interface/device transmit error
+*                                                                       (see Note #4b).
+*
+*                                                                   --- RETURNED BY NetIF_TxPktValidate() : ---
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_ERR_FAULT_NULL_FNCT                Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG              Invalid/NULL API configuration.
+*                               NET_ERR_INVALID_PROTOCOL            Invalid/unknown protocol type.
+*                               NET_BUF_ERR_INVALID_TYPE            Invalid network buffer   type.
+*                               NET_BUF_ERR_INVALID_IX              Invalid/insufficient buffer index.
+*
+*                                                                   --- RETURNED BY NetIF_Dev_TxRdyWait() : ---
+*                               NET_DEV_ERR_TX_RDY_SIGNAL_TIMEOUT   Device transmit ready signal NOT received
+*                                                                       within timeout.
+*                               NET_DEV_ERR_TX_RDY_SIGNAL_FAULT     Device transmit ready signal fault.
+*
+*                                                                   ----- RETURNED BY 'pdev_api->Tx()' : ------
+*                                                                   See specific network device(s) 'Tx()'
+*                                                                       for additional return error codes.
+*
+* Return(s)   : Size of transmitted packet, if NO error(s).
+*
+*               0,                          otherwise.
+*
+* Caller(s)   : NetIF_TxHandler().
+*
+* Note(s)     : (2) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) After  transmit packet buffer queued to Network Interface Transmit List,
+*                       remove transmit packet buffer from      Network Interface Transmit List.
+*
+*               (3) Network buffer already freed by lower layer.
+*
+*               (4) Error codes from network interface/device driver handler functions returned as is.
+*********************************************************************************************************
+*/
+
+static  NET_BUF_SIZE  NetIF_TxPkt (NET_IF   *p_if,
+                                   NET_BUF  *p_buf,
+                                   NET_ERR  *p_err)
+{
+    NET_IF_API    *p_if_api;
+    NET_DEV_API   *pdev_api;
+    NET_BUF_HDR   *p_buf_hdr;
+    CPU_INT08U    *p_data;
+    NET_BUF_SIZE   size;
+    NET_ERR        err;
+
+
+
+                                                                /* ---------------- VALIDATE IF TX PKT ---------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    NetIF_TxPktValidate(p_if,
+                        p_buf_hdr,
+                        p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+        case NET_ERR_FAULT_NULL_FNCT:
+        case NET_IF_ERR_INVALID_CFG:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_ERR_INVALID_PROTOCOL:
+        default:
+             NetIF_TxPktDiscard(p_buf, DEF_NO, &err);
+                                                                /* Rtn err from NetIF_TxPktValidate() [see Note #4].    */
+             return (0u);
+    }
+#endif
+
+
+                                                                /* ------------ PREPARE TX PKT VIA NET IF ------------- */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+    p_if_api->Tx(p_if, p_buf, p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             break;
+
+
+        case NET_IF_ERR_TX_ADDR_PEND:                           /* Tx pending on hw addr; will tx when addr resolved.   */
+             return (0u);
+
+
+        case NET_ERR_TX:
+        default:
+                                                                /* See Note #3.                                         */
+            *p_err =  NET_ERR_TX;
+             return (0u);
+    }
+
+
+                                                                /* ------------- WAIT FOR DEV TX RDY SIGNAL ----------- */
+    NetIF_DevTxRdyWait(p_if, p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             break;
+
+
+        case NET_IF_ERR_TX_RDY_SIGNAL_TIMEOUT:
+        case NET_IF_ERR_TX_RDY_SIGNAL_FAULT:
+        default:
+             NetIF_TxPktDiscard(p_buf, DEF_NO, &err);
+                                                                /* Rtn err from NetIF_Dev_TxRdyWait() [see Note #4].    */
+             return (0u);
+    }
+
+
+                                                                /* ------------ PREPARE TX PKT VIA NET DEV ------------ */
+    p_data = &p_buf->DataPtr[p_buf_hdr->IF_HdrIx];
+    size   =  p_buf_hdr->TotLen;
+    DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_TX_LOCK);         /* Protect tx pkt buf from concurrent access by dev hw. */
+    NetIF_TxPktListInsert(p_buf);                                /* Insert  tx pkt buf into tx list.                     */
+
+
+                                                                /* ---------------- TX PKT VIA NET DEV ---------------- */
+    pdev_api = (NET_DEV_API *)p_if->Dev_API;
+    pdev_api->Tx(p_if, p_data, size, p_err);
+    if (*p_err != NET_DEV_ERR_NONE) {
+         NetIF_TxPktListRemove(p_buf);                           /* See Note #2a.                                        */
+         NetIF_TxPktDiscard(p_buf, DEF_NO, &err);
+                                                                /* Rtn err from 'pdev_api->Tx()' [see Note #4].         */
+         return (0u);
+    }
+
+
+                                                                /* ---------------- RTN TX'D DATA SIZE ---------------- */
+   *p_err =  NET_IF_ERR_NONE;
+
+    return (size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_TxPktValidate()
+*
+* Description : (1) Validate network interface transmit packet :
+*
+*                   (a) Validate network interface :
+*                       (1) Interface/device transmit API
+*
+*                   (b) Validate the following transmit packet parameters :
+*
+*                       (1) Network interface
+*                       (2) Buffer type
+*                       (3) Supported protocols :
+*                           (A) Ethernet
+*                           (B) ARP
+*                           (C) IPv4
+*
+*                       (4) Buffer protocol index
+*
+*
+* Argument(s) : p_if        Pointer to network interface.
+*               ----        Argument validated in NetIF_TxPkt().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIF_TxPkt().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Transmit packet validated.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer   type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*
+*                                                               - RETURNED BY NetIF_IsValidHandler() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPkt().
+*
+* Note(s)     : (2) Network buffer's network interface number was previously validated via NetIF_Get().
+*                   The network interface number does NOT need to be re-validated but is shown for
+*                   completeness.
+*********************************************************************************************************
+*/
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+static  void  NetIF_TxPktValidate (NET_IF       *p_if,
+                                   NET_BUF_HDR  *p_buf_hdr,
+                                   NET_ERR      *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_IF_NBR    if_nbr;
+    CPU_INT16U    ix;
+#endif
+    NET_IF_API   *p_if_api;
+    NET_DEV_API  *pdev_api;
+
+
+                                                                /* ----------------- VALIDATE NET IF ------------------ */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if_nbr = p_buf_hdr->IF_Nbr;
+#if 0                                                           /* See Note #2.                                         */
+   (void)NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+   (void)&if_nbr;                                               /* Prevent possible 'variable unused' warning.          */
+#endif
+
+
+                                                                /* ------------- VALIDATE NET IF/DEV API -------------- */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_if_api->Tx == (void (*)(NET_IF  *,
+                                 NET_BUF *,
+                                 NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+    pdev_api = (NET_DEV_API *)p_if->Dev_API;
+    if (pdev_api == (NET_DEV_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (pdev_api->Tx == (void (*)(NET_IF     *,
+                                  CPU_INT08U *,
+                                  CPU_INT16U  ,
+                                  NET_ERR    *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_RX_LARGE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+                                                                /* ---------------- VALIDATE PROTOCOL ----------------- */
+    switch (p_buf_hdr->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_IF_FRAME:
+        case NET_PROTOCOL_TYPE_IF_ETHER:
+             ix = p_buf_hdr->IF_HdrIx;
+             break;
+
+#ifdef  NET_ARP_MODULE_EN
+        case NET_PROTOCOL_TYPE_ARP:
+             ix = p_buf_hdr->ARP_MsgIx;
+             break;
+#endif
+
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V4:
+             ix = p_buf_hdr->IP_HdrIx;
+             break;
+#endif
+
+        case NET_PROTOCOL_TYPE_IP_V6:
+             ix = p_buf_hdr->IP_HdrIx;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[if_nbr].TxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    if (ix == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[if_nbr].TxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+#else
+   (void)&p_buf_hdr;                                             /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_TxPktListDealloc()
+*
+* Description : (1) Deallocate transmitted packet's network buffer & data area :
+*
+*                   (a) Search Network Interface Transmit List for transmitted network buffer
+*                   (b) Deallocate transmit packet buffer :
+*                       (1) Remove transmit packet buffer from network interface transmit list
+*                       (2) Free network buffer
+*
+*
+* Argument(s) : p_buf_data   Pointer to a network packet buffer's transmitted data area (see Note #2b1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxDeallocTaskHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_TxPktListDealloc (CPU_INT08U  *p_buf_data)
+{
+    NET_BUF  *p_buf;
+
+
+    p_buf = NetIF_TxPktListSrch(p_buf_data);                      /* Srch tx list for tx'd pkt buf.                       */
+    if (p_buf != (NET_BUF *)0) {                                 /* If   tx'd  pkt buf found,       ...                  */
+        NetIF_TxPktListRemove(p_buf);                            /* ... remove pkt buf from tx list ...                  */
+        NetIF_TxPktFree(p_buf);                                  /* ... & free net buf.                                  */
+        NET_CTR_STAT_INC(Net_StatCtrs.IFs.TxPktDeallocCtr);
+
+    } else {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.TxPktDeallocCtr);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_TxPktListSrch()
+*
+* Description : Search Network Interface Transmit List for transmitted network buffer.
+*
+*               (1) Network buffers whose data areas have been transmitted via network interface(s)/device(s)
+*                   are queued to await acknowledgement of transmission complete & subsequent deallocation.
+*
+*                   (a) Transmitted network buffers are linked to form a Network Interface Transmit List.
+*
+*                       In the diagram below, ... :
+*
+*                       (1) The horizontal row represents the list of transmitted network buffers.
+*
+*                       (2) (A) 'NetIF_TxListHead' points to the head of the Network Interface Transmit List;
+*                           (B) 'NetIF_TxListTail' points to the tail of the Network Interface Transmit List.
+*
+*                       (3) Network buffers' 'PrevTxListPtr' & 'NextTxListPtr' doubly-link each network buffer
+*                           to form the Network Interface Transmit List.
+*
+*                   (b) (1) (A) For each network buffer data area that has been transmitted, all network buffers
+*                               are searched in order to find (& deallocate) the corresponding network buffer.
+*
+*                           (B) The network buffer corresponding to the transmitted data area has a network
+*                               interface index into its data area that points to the address of the transmitted
+*                               data area.
+*
+*                       (2) To expedite faster network buffer searches :
+*
+*                           (A) (1) Network buffers are added             at the tail of the Network Interface
+*                                       Transmit List;
+*                               (2) Network buffers are searched starting at the head of the Network Interface
+*                                       Transmit List.
+*
+*                           (B) As network buffers are added into the list, older network buffers migrate to the
+*                               head of the Network Interface Transmit List.  Once a network buffer's data area
+*                               has been transmitted, the network buffer is removed from the Network Interface
+*                               Transmit List & deallocated.
+*
+*
+*                                      |                                               |
+*                                      |<------ Network Interface Transmit List ------>|
+*                                      |               (see Note #1a1)                 |
+*
+*                             Transmitted network buffers                      New transmit
+*                               awaiting acknowledgement                     network buffers
+*                                   of transmission                          inserted at tail
+*                                  (see Note #1b2A2)                         (see Note #1b2A1)
+*
+*                                         |              NextTxListPtr              |
+*                                         |             (see Note #1a3)             |
+*                                         v                    |                    v
+*                                                              |
+*                   Head of            -------       -------   v   -------       -------       (see Note #1a2B)
+*              Network Interface  ---->|     |------>|     |------>|     |------>|     |
+*                Transmit List         |     |       |     |       |     |       |     |            Tail of
+*                                      |     |<------|     |<------|     |<------|     |<----  Network Interface
+*              (see Note #1a2A)        |     |       |     |   ^   |     |       |     |         Transmit List
+*                                      |     |       |     |   |   |     |       |     |
+*                                      -------       -------   |   -------       -------
+*                                                              |
+*                                                        PrevTxListPtr
+*                                                       (see Note #1a3)
+*
+*
+* Argument(s) : p_buf_data   Pointer to a network packet buffer's transmitted data area (see Note #2).
+*
+* Return(s)   : Pointer to transmitted data area's network buffer, if found.
+*
+*               Pointer to NULL,                                   otherwise.
+*
+* Caller(s)   : NetIF_TxPktListDealloc().
+*
+* Note(s)     : (2) The network buffer corresponding to the transmitted data area has a network interface
+*                   index into its data area that points to the address of the transmitted data area.
+*
+*                   See also Note #1b1.
+*********************************************************************************************************
+*/
+
+static  NET_BUF  *NetIF_TxPktListSrch (CPU_INT08U  *p_buf_data)
+{
+    NET_BUF      *p_buf;
+    NET_BUF_HDR  *p_buf_hdr;
+    CPU_INT08U   *p_buf_data_if;
+    CPU_BOOLEAN   found;
+
+
+    p_buf  = NetIF_TxListHead;                                       /* Start @ Net IF Tx List head (see Note #1b2A2).   */
+    found = DEF_NO;
+
+    while ((p_buf  != (NET_BUF *)0) &&                               /* Srch    Net IF Tx List ...                       */
+           (found ==  DEF_NO)) {                                    /* ... until tx'd pkt buf found.                    */
+        p_buf_hdr     = &p_buf->Hdr;
+        p_buf_data_if = &p_buf->DataPtr[p_buf_hdr->IF_HdrIx];
+        found        = (p_buf_data_if == p_buf_data) ? DEF_YES : DEF_NO;  /* Cmp tx data area ptrs (see Note #1b1B).      */
+
+        if (found != DEF_YES) {                                     /* If NOT found, ...                                */
+            p_buf = p_buf_hdr->NextTxListPtr;                         /* ... adv to next tx pkt buf.                      */
+        }
+    }
+
+    return (p_buf);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_TxPktListInsert()
+*
+* Description : Insert a network packet buffer into the Network Interface Transmit List.
+*
+* Argument(s) : p_buf       Pointer to a network buffer.
+*               -----       Argument checked in NetIF_Tx().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPkt().
+*
+* Note(s)     : (1) Some buffer controls were previously initialized in NetBuf_Get() when the buffer was
+*                   allocated.  These buffer controls do NOT need to be re-initialized but are shown for
+*                   completeness.
+*
+*               (2) See 'NetIF_TxPktListSrch()  Note #1b2A1'.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_TxPktListInsert (NET_BUF  *p_buf)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_BUF_HDR  *p_buf_hdr_tail;
+
+                                                                /* ----------------- CFG NET BUF PTRS ----------------- */
+    p_buf_hdr                = (NET_BUF_HDR *)&p_buf->Hdr;
+    p_buf_hdr->PrevTxListPtr = (NET_BUF     *) NetIF_TxListTail;
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #1].                */
+    p_buf_hdr->NextTxListPtr = (NET_BUF     *) 0;
+#endif
+
+                                                                /* -------- INSERT PKT BUF INTO NET IF TX LIST -------- */
+    if (NetIF_TxListTail != (NET_BUF *)0) {                     /* If list NOT empty, insert after tail.                */
+        p_buf_hdr_tail                = &NetIF_TxListTail->Hdr;
+        p_buf_hdr_tail->NextTxListPtr =  p_buf;
+    } else {                                                    /* Else add first pkt buf to list.                      */
+        NetIF_TxListHead             =  p_buf;
+    }
+    NetIF_TxListTail = p_buf;                                    /* Insert pkt buf @ list tail (see Note #2).            */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_TxPktListRemove()
+*
+* Description : Remove a network packet buffer from the Network Interface Transmit List.
+*
+* Argument(s) : p_buf       Pointer to a network buffer.
+*               -----       Argument checked in NetIF_TxPktListDealloc().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPkt(),
+*               NetIF_TxPktListDealloc().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_TxPktListRemove (NET_BUF  *p_buf)
+{
+    NET_BUF      *p_buf_list_prev;
+    NET_BUF      *p_buf_list_next;
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_BUF_HDR  *p_buf_list_prev_hdr;
+    NET_BUF_HDR  *p_buf_list_next_hdr;
+
+                                                                /* -------- REMOVE PKT BUF FROM NET IF TX LIST -------- */
+    p_buf_hdr       = &p_buf->Hdr;
+    p_buf_list_prev =  p_buf_hdr->PrevTxListPtr;
+    p_buf_list_next =  p_buf_hdr->NextTxListPtr;
+
+                                                                /* Point prev pkt buf to next pkt buf.                  */
+    if (p_buf_list_prev != (NET_BUF *)0) {
+        p_buf_list_prev_hdr                = &p_buf_list_prev->Hdr;
+        p_buf_list_prev_hdr->NextTxListPtr =  p_buf_list_next;
+    } else {
+        NetIF_TxListHead                  =  p_buf_list_next;
+    }
+                                                                /* Point next pkt buf to prev pkt buf.                  */
+    if (p_buf_list_next != (NET_BUF *)0) {
+        p_buf_list_next_hdr                = &p_buf_list_next->Hdr;
+        p_buf_list_next_hdr->PrevTxListPtr =  p_buf_list_prev;
+    } else {
+        NetIF_TxListTail                  =  p_buf_list_prev;
+    }
+
+                                                                /* ----------------- CLR NET BUF PTRS ----------------- */
+    p_buf_hdr->PrevTxListPtr = (NET_BUF *)0;
+    p_buf_hdr->NextTxListPtr = (NET_BUF *)0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetIF_TxPktFree()
+*
+* Description : (1) Free network buffer :
+*
+*                   (a) Unlock network buffer's transmit lock
+*                   (b) Free   network buffer
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*               -----       Argument checked in NetIF_TxPktListDealloc().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPktListDealloc().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_TxPktFree (NET_BUF  *p_buf)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+
+
+    p_buf_hdr = &p_buf->Hdr;
+    DEF_BIT_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_TX_LOCK);         /* Clr  net buf's tx lock.                              */
+
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,                        /* Free net buf.                                        */
+                        (NET_CTR *)0);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_TxPktDiscard()
+*
+* Description : (1) On any IF transmit error(s), discard packet & buffer :
+*
+*                   (a) Unlock network buffer's transmit lock
+*                   (b) Free   network buffer
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               inc_ctrs    Indicate whether to increment error counter(s) :
+*
+*                               DEF_YES                                Increment error counter(s).
+*                               DEF_NO                          Do NOT increment error counter(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Tx().
+*
+* Note(s)     : (2) ONLY the current transmit packet buffer is discarded.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_TxPktDiscard (NET_BUF      *p_buf,
+                                  CPU_BOOLEAN   inc_ctrs,
+                                  NET_ERR      *p_err)
+{
+#if (NET_CTR_CFG_ERR_EN         == DEF_ENABLED)
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_ERR       err;
+#endif
+    CPU_BOOLEAN   valid;
+    NET_IF_NBR    if_nbr;
+    NET_BUF_QTY   i;
+#endif
+    NET_BUF_QTY   nbr_freed;
+    NET_BUF_HDR  *p_buf_hdr;
+
+
+    if (p_buf != (NET_BUF *)0) {
+        p_buf_hdr = &p_buf->Hdr;
+        DEF_BIT_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_TX_LOCK);     /* Clr net buf's tx lock.                               */
+
+#if (NET_CTR_CFG_ERR_EN         == DEF_ENABLED)
+        if_nbr = p_buf_hdr->IF_Nbr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        valid  = NetIF_IsValidHandler(if_nbr, &err);
+#else
+        valid  = DEF_YES;
+#endif
+    } else {
+        valid  = DEF_NO;
+#endif
+    }
+
+
+    nbr_freed = NetBuf_FreeBuf((NET_BUF *)p_buf,                 /* Free net buf (see Note #2).                          */
+                               (NET_CTR *)0);
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    if (inc_ctrs == DEF_YES) {
+        for (i = 0u; i < nbr_freed; i++) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IFs.TxPktDisCtr);
+            if (valid == DEF_YES) {
+                NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[if_nbr].TxPktDisCtr);
+            }
+        }
+    }
+#else
+   (void)&inc_ctrs;                                             /* Prevent 'variable unused' compiler warnings.         */
+   (void)&nbr_freed;
+#endif
+
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_TxSuspendTimeoutInit()
+*
+* Description : Initialize network interface transmit suspend timeout value.
+*
+* Argument(s) : p_if    Pointer to network interface.
+*               ----    Argument validated in NetIF_ObjInit().
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_IF_ERR_NONE
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_ObjInit().
+*
+* Note(s)     : (1) 'NetIF_TxSuspendTimeout_tick' variables MUST ALWAYS be accessed exclusively
+*                    in critical sections.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+static  void  NetIF_TxSuspendTimeoutInit (NET_IF      *p_if,
+                                          NET_ERR     *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    p_if->TxSuspendTimeout_ms = NET_IF_CFG_TX_SUSPEND_TIMEOUT_MS;              /* Set transmit suspend timeout value (in OS ticks).    */
+    CPU_CRITICAL_EXIT();
+
+   *p_err = NET_IF_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_TxSuspendSignal()
+*
+* Description : Signal suspended network interface connection(s)' transmit(s).
+*
+* Argument(s) : p_if        Pointer to network interface to signal suspended transmit(s).
+*               ----        Argument validated in NetIF_RxHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxHandlerLoadBal().
+*
+* Note(s)     : (1) To balance network receive versus transmit packet loads for certain network connection
+*                   types (e.g. stream-type connections), network receive & transmit packets SHOULD be
+*                   handled in an APPROXIMATELY balanced ratio.
+*
+*                   (a) Network task priorities & lock mechanisms partially maintain a balanced ratio
+*                       between network receive versus transmit packet handling.
+*
+*                       However, the handling of network receive & transmit packets :
+*
+*                       (1) SHOULD be interleaved so that for every few packet(s) received & handled,
+*                           several packet(s) should be transmitted; & vice versa.
+*
+*                       (2) SHOULD NOT exclusively handle receive nor transmit packets, even for a
+*                           short period of time, but especially for a prolonged period of time.
+*
+*                   (b) To implement network receive versus transmit load balancing :
+*
+*                       (1) The availability of network receive packets MUST be managed for each network
+*                           interface :
+*
+*                           (A) Increment the number of available network receive packets queued to a
+*                               network interface for each packet received.
+*
+*                           (B) Decrement the number of available network receive packets queued to a
+*                               network interface for each received packet processed.
+*
+*                       (2) Certain network connections MUST periodically suspend network transmit(s)
+*                           to handle network interface(s)' receive packet(s) :
+*
+*                           (A) Suspend network connection transmit(s) if any receive packets are
+*                               available on a network interface.
+*
+*                           (B) Signal or timeout network connection transmit suspend(s) to restart
+*                               transmit(s).
+*
+*                   See also 'NetIF_RxPktInc()      Note #1',
+*                            'NetIF_RxPktDec()      Note #1',
+*                            'NetIF_RxPktIsAvail()  Note #1',
+*                          & 'NetIF_TxSuspend()     Note #1'.
+*
+*               (3) Network interfaces' 'TxSuspendCtr' variables may be accessed with only the global
+*                   network lock acquired & are NOT required to be accessed exclusively in critical
+*                   sections.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+static  void  NetIF_TxSuspendSignal (NET_IF  *p_if)
+{
+    NET_STAT_CTR  *pstat_ctr;
+    NET_CTR        nbr_tx_suspend;
+    KAL_ERR        err_kal;
+    NET_CTR        i;
+    CPU_SR_ALLOC();
+
+
+    pstat_ctr      = &p_if->TxSuspendCtr;
+    CPU_CRITICAL_ENTER();
+    nbr_tx_suspend =  pstat_ctr->CurCtr;
+    CPU_CRITICAL_EXIT();
+
+    for (i = 0u; i < nbr_tx_suspend; i++) {
+                                                                /* Signal ALL suspended net conn tx's (see Note #1b2B). */
+        KAL_SemPost(p_if->TxSuspendSignalObj, KAL_OPT_PEND_NONE, &err_kal);
+        (void)&err_kal;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_TxSuspendWait()
+*
+* Description : Wait on network interface transmit suspend signal.
+*
+* Argument(s) : p_if    Pointer to network interface.
+*               ----    Argument validated in NetIF_TxSuspend().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxSuspend().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network interface transmit suspend waits until :
+*
+*                   (a) Signaled
+*                   (b) Timed out
+*                   (c) Any OS fault occurs
+*
+*               (2) Implement timeout with OS-dependent functionality.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+static  void  NetIF_TxSuspendWait (NET_IF  *p_if)
+{
+    CPU_INT32U  timeout_ms;
+    KAL_ERR     err_kal;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    timeout_ms =  p_if->TxSuspendTimeout_ms;
+    CPU_CRITICAL_EXIT();
+
+                                                                /* Wait on network interface transmit suspend signal.   */
+    KAL_SemPend(p_if->TxSuspendSignalObj, KAL_OPT_PEND_NONE, timeout_ms, &err_kal);
+
+
+   (void)&err_kal;                                              /* See Note #1c.                                        */
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_BufPoolCfgValidate()
+*
+* Description : (1) Validate network interface buffer pool configuration :
+*
+*                   (a) Validate network interface buffer memory pool types
+*                   (b) Validate configured number of network interface buffers
+*
+*
+* Argument(s) : if_nbr      Interface number to initialize network buffer pools.
+*               ------      Argument validated in NetIF_BufPoolInit().
+*
+*               p_dev_cfg   Pointer to network interface's device configuration.
+*               ---------   Argument validated in NetIF_BufPoolInit().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface buffer pool configuration
+*                                                                   valid.
+*                               NET_IF_ERR_INVALID_POOL_TYPE    Invalid network interface buffer pool type.
+*                               NET_IF_ERR_INVALID_POOL_ADDR    Invalid network interface buffer pool address.
+*                               NET_IF_ERR_INVALID_POOL_SIZE    Invalid network interface buffer pool size.
+*                               NET_IF_ERR_INVALID_POOL_QTY     Invalid network interface buffer pool number
+*                                                                   of buffers configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_BufPoolInit().
+*
+* Note(s)     : (2) (a) All added network interfaces MUST NOT configure a total number of receive  buffers
+*                       greater than the configured network interface receive queue size.
+*
+*                   (b) All added network interfaces MUST NOT configure a total number of transmit buffers
+*                       greater than the configured network interface transmit deallocation queue size.
+*
+*                       (1) However, since the network loopback interface does NOT deallocate transmit
+*                           packets via the network interface transmit deallocation task (see
+*                           'net_if_loopback.c  NetIF_Loopback_Tx()  Note #4'); then the network interface
+*                           transmit deallocation queue size does NOT need to be adjusted by the network
+*                           loopback interface's number of configured transmit buffers.
+*
+*                       See also 'NetIF_BufPoolInit()  Note #2'.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_BufPoolCfgValidate (NET_IF_NBR    if_nbr,
+                                        NET_DEV_CFG  *p_dev_cfg,
+                                        NET_ERR      *p_err)
+{
+    NET_BUF_QTY  nbr_bufs_tx;
+
+
+                                                                /* ------------- VALIDATE MEM POOL TYPES -------------- */
+    switch (p_dev_cfg->RxBufPoolType) {                         /* Validate rx buf mem pool type.                       */
+        case NET_IF_MEM_TYPE_MAIN:
+             break;
+
+
+        case NET_IF_MEM_TYPE_DEDICATED:
+             if (p_dev_cfg->MemAddr == (CPU_ADDR)0u) {
+                *p_err = NET_IF_ERR_INVALID_POOL_ADDR;
+                 return;
+             }
+             if (p_dev_cfg->MemSize < 1) {
+                *p_err = NET_IF_ERR_INVALID_POOL_SIZE;
+                 return;
+             }
+             break;
+
+
+        case NET_IF_MEM_TYPE_NONE:
+        default:
+            *p_err = NET_IF_ERR_INVALID_POOL_TYPE;
+             return;
+    }
+
+    switch (p_dev_cfg->TxBufPoolType) {                          /* Validate tx buf mem pool type.                       */
+        case NET_IF_MEM_TYPE_MAIN:
+             break;
+
+
+        case NET_IF_MEM_TYPE_DEDICATED:
+             if (p_dev_cfg->MemAddr == (CPU_ADDR)0u) {
+                *p_err = NET_IF_ERR_INVALID_POOL_ADDR;
+                 return;
+             }
+             if (p_dev_cfg->MemSize < 1) {
+                *p_err = NET_IF_ERR_INVALID_POOL_SIZE;
+                 return;
+             }
+             break;
+
+
+        case NET_IF_MEM_TYPE_NONE:
+        default:
+            *p_err = NET_IF_ERR_INVALID_POOL_TYPE;
+             return;
+    }
+
+
+                                                                /* ---------------- VALIDATE NBR BUFS ----------------- */
+    if (p_dev_cfg->RxBufLargeNbr > NetIF_RxQ_SizeCfgdRem) {     /* Validate nbr rx bufs (see Note #2a).                 */
+       *p_err = NET_IF_ERR_INVALID_POOL_QTY;
+        return;
+    }
+
+    if (if_nbr != NET_IF_NBR_LOOPBACK) {                        /* For all non-loopback IF's (see Note #2b1), ...       */
+        nbr_bufs_tx = p_dev_cfg->TxBufLargeNbr +
+                      p_dev_cfg->TxBufSmallNbr;
+        if (nbr_bufs_tx > NetIF_TxDeallocQ_SizeCfgdRem) {       /* ... validate nbr tx bufs  (see Note #2b).            */
+           *p_err = NET_IF_ERR_INVALID_POOL_QTY;
+            return;
+        }
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_GetDataAlignPtr()
+*
+* Description : (1) Get aligned pointer into application data buffer :
+*
+*                   (a) Acquire network lock
+*                   (b) Calculate pointer to aligned application data buffer address        See Note #3
+*                   (c) Release network lock
+*                   (d) Return    pointer to aligned application data buffer address
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*
+* Argument(s) : if_nbr          Network interface number to get an application buffer's aligned data pointer.
+*
+*               transaction     Transaction type :
+*
+*                                   NET_TRANSACTION_RX          Receive  transaction.
+*                                   NET_TRANSACTION_TX          Transmit transaction.
+*
+*               p_data          Pointer to application data buffer to get an aligned pointer into (see also
+*                                   Note #3c).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Aligned pointer into application data buffer
+*                                                                   successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_data' passed a NULL pointer.
+*                               NET_IF_ERR_ALIGN_NOT_AVAIL      Alignment between application data buffer &
+*                                                                   network interface's network buffer data
+*                                                                   area(s) NOT possible (see Note #3b1B).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                                                               -------- RETURNED BY NetIF_Get() : ---------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Pointer to aligned application data buffer address, if available.
+*
+*               Pointer to         application data buffer address, if aligned address NOT available.
+*
+*               Pointer to NULL,                                    otherwise.
+*
+* Caller(s)   : NetIF_GetRxDataAlignPtr(),
+*               NetIF_GetTxDataAlignPtr().
+*
+* Note(s)     : (2) NetIF_GetDataAlignPtr() blocked until network initialization completes.
+*
+*               (3) (a) The first aligned address in the application data buffer is calculated based on
+*                       the following equations :
+*
+*
+*                       (1) Addr         =  Addr  %  Word
+*                               Offset                   Size
+*
+*
+*                       (2) Align        =  [ (Word     -  Addr      )  +  ([Ix     + Ix      ]  %  Word    ) ]  %  Word
+*                                Offset            Size        Offset          Data     Offset          Size            Size
+*
+*
+*                                           { (A) Addr  +  Align       , if optimal alignment between application data
+*                                           {                   Offset      buffer & network interface's network buffer
+*                                           {                               data area(s) is  possible (see Note #3b1A)
+*                       (3) Addr         =  {
+*                               Align       { (B) Addr                 , if optimal alignment between application data
+*                                           {                               buffer & network interface's network buffer
+*                                           {                               data area(s) NOT possible (see Note #3b1B)
+*
+*                           where
+*
+*                               (A) Addr            Application data buffer's address ('p_data')
+*
+*                               (B) Addr            Non-negative offset from application data buffer's
+*                                       Offset          address to previous CPU word-aligned address
+*
+*                               (C) Align           Non-negative offset from application data buffer's
+*                                        Offset         address to first address that is aligned with
+*                                                       network interface's network buffer data area(s)
+*
+*                               (D) Addr            First address in application data buffer that is aligned
+*                                       Align           with network interface's network buffer data area(s)
+*
+*                               (E) Word            CPU's data word size (see 'cpu.h  CPU WORD CONFIGURATION
+*                                       Size            Note #1')
+*
+*                               (F) Ix              Network buffer's base data index (see 'net_buf.h
+*                                     Data              NETWORK BUFFER INDEX & SIZE DEFINES  Note #2b')
+*
+*                               (G) Ix              Network interface's configured network buffer receive/
+*                                     Offset            transmit data offset (see 'net_dev_cfg.c  EXAMPLE
+*                                                       NETWORK DEVICE CONFIGURATION  Note #5')
+*
+*
+*                   (b) (1) (A) Optimal alignment between application data buffer(s) & network interface's
+*                               network buffer data area(s) is NOT guaranteed & is possible if & only if
+*                               all of the following conditions are true :
+*
+*                               (1) Network interface's network buffer data area(s) MUST be aligned to a
+*                                   multiple of the CPU's data word size (see 'net_buf.h  NETWORK BUFFER
+*                                   INDEX & SIZE DEFINES  Note #2b2').
+*
+*                           (B) Otherwise, a single, fixed alignment between application data buffer(s) &
+*                               network interface's buffer data area(s) is NOT possible.
+*
+*                       (2) (A) Even when application data buffers & network buffer data areas are aligned
+*                               in the best case; optimal alignment is NOT guaranteed for every read/write
+*                               of data to/from application data buffers & network buffer data areas.
+*
+*                               For any single read/write of data to/from application data buffers & network
+*                               buffer data areas, optimal alignment occurs if & only if all of the following
+*                               conditions are true :
+*
+*                               (1) Data read/written to/from application data buffer(s) to network buffer
+*                                   data area(s) MUST start on addresses with the same relative offset from
+*                                   CPU word-aligned addresses.
+*
+*                                   In other words, the modulus of the specific read/write address in the
+*                                   application data buffer with the CPU's data word size MUST be equal to
+*                                   the modulus of the specific read/write address in the network buffer
+*                                   data area with the CPU's data word size.
+*
+*                                   This condition MIGHT NOT be satisfied whenever :
+*
+*                                   (a) Data is read/written to/from fragmented packets
+*                                   (b) Data is NOT maximally read/written to/from stream-type packets
+*                                           (e.g. TCP data segments)
+*                                   (c) Packets include variable number of header options (e.g. IP options)
+*
+*                           (B) However, even though optimal alignment between application data buffers &
+*                               network buffer data areas is NOT guaranteed for every read/write; optimal
+*                               alignment SHOULD occur more frequently leading to improved network data
+*                               throughput.
+*
+*                   (c) Since the first aligned address in the application data buffer may be 0 to
+*                       (CPU_CFG_DATA_SIZE - 1) octets after the application data buffer's starting
+*                       address, the application data buffer SHOULD allocate & reserve an additional
+*                       (CPU_CFG_DATA_SIZE - 1) number of octets.
+*
+*                       However, the application data buffer's effective, useable size is still limited
+*                       to its original declared size (before reserving additional octets) & SHOULD NOT
+*                       be increased by the additional, reserved octets.
+*********************************************************************************************************
+*/
+
+static  void  *NetIF_GetDataAlignPtr (NET_IF_NBR        if_nbr,
+                                      NET_TRANSACTION   transaction,
+                                      void             *p_data,
+                                      NET_ERR          *p_err)
+{
+    NET_IF        *p_if;
+    NET_DEV_CFG   *p_dev_cfg;
+    void          *p_data_align;
+    CPU_ADDR       addr;
+    NET_BUF_SIZE   addr_offset;
+    NET_BUF_SIZE   align;
+    NET_BUF_SIZE   ix_align;
+    NET_BUF_SIZE   ix_offset;
+    NET_BUF_SIZE   data_ix;
+    NET_BUF_SIZE   data_size;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE DATA PTR ----------------- */
+    if (p_data == (void *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return ((void *)0);
+    }
+#endif
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIF_GetDataAlignPtr, p_err);
+    if (*p_err !=  NET_ERR_NONE) {
+         return ((void *)0);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail_null;
+    }
+#endif
+
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err !=  NET_IF_ERR_NONE) {
+         goto exit_fail_null;
+    }
+
+
+                                                                /* --------------- GET NET IF ALIGN/IX ---------------- */
+
+
+    p_dev_cfg = (NET_DEV_CFG *)p_if->Dev_Cfg;
+    switch (transaction) {
+        case NET_TRANSACTION_RX:
+             align     = p_dev_cfg->RxBufAlignOctets;
+             ix_offset = p_dev_cfg->RxBufIxOffset;
+             data_ix   = NET_BUF_DATA_IX_RX;
+             break;
+
+
+        case NET_TRANSACTION_TX:
+             align     = p_dev_cfg->TxBufAlignOctets;
+             ix_offset = p_dev_cfg->TxBufIxOffset;
+             NetIF_TxIxDataGet(if_nbr,
+                               0,
+                              &data_ix,
+                               p_err);
+             break;
+
+
+        case NET_TRANSACTION_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.InvTransactionTypeCtr);
+            *p_err = NET_ERR_INVALID_TRANSACTION;
+             goto exit_fail_null;
+    }
+
+    data_size = CPU_CFG_DATA_SIZE;
+
+    if (((align %  data_size) != 0u) ||                         /* If net  buf align NOT multiple of CPU data word size,*/
+         (align == 0u)) {
+       *p_err =  NET_IF_ERR_ALIGN_NOT_AVAIL;                    /* .. data buf align NOT possible (see Note #3b1A1).    */
+        goto exit_fail_data;
+    }
+
+
+                                                                /* ------------ CALC ALIGN'D DATA BUF PTR ------------- */
+    addr        = (CPU_ADDR    ) p_data;
+    addr_offset = (NET_BUF_SIZE)(addr % data_size);             /* Calc data addr  offset (see Note #3a1).              */
+                                                                /* Calc data align offset (see Note #3a2).              */
+    ix_align    =  data_ix    +  ix_offset;
+    ix_align   %=  data_size;
+    ix_align   +=  data_size  -  addr_offset;
+    ix_align   %=  data_size;
+
+    p_data_align = (void *)((CPU_INT08U *)p_data + ix_align);   /* Calc data align'd ptr  (see Note #3a3A).             */
+
+
+
+    *p_err =  NET_IF_ERR_NONE;
+     goto exit_release;
+
+exit_fail_data:
+     p_data_align = p_data;
+     goto exit_release;
+
+exit_fail_null:
+    p_data_align = DEF_NULL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+
+    return (p_data_align);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_GetProtocolHdrSize()
+*
+* Description : Get the header length required by protocols.
+*
+* Argument(s) : p_if        Pointer to network interface.
+*               ----        Argument validated in NetIF_ObjInit().
+*
+*               protocol    Desired protocol layer of network interface MTU.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network interface's MTU successfully returned.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid network protocol.
+*
+*                                                               --------- RETURNED BY NetIF_Get() : ----------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Headers size.
+*
+* Caller(s)   : NetIF_GetPayloadRxMax(),
+*               NetIF_GetPayloadTxMax(),
+*               NetIF_MTU_GetProtocol().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  NetIF_GetProtocolHdrSize (NET_IF             *p_if,
+                                              NET_PROTOCOL_TYPE   protocol,
+                                              NET_ERR            *p_err)
+{
+    NET_IF_API  *p_if_api;
+    CPU_INT16U   hdr_size = 0u;
+
+
+    if (p_if != DEF_NULL) {
+        switch (p_if->Type) {
+            case NET_IF_TYPE_NONE:
+                 break;
+
+            case NET_IF_TYPE_ETHER:
+            case NET_IF_TYPE_WIFI:
+                 hdr_size += NET_IF_HDR_SIZE_ETHER;
+                 break;
+
+            case NET_IF_TYPE_LOOPBACK:
+                 hdr_size += NET_IF_HDR_SIZE_LOOPBACK;
+                 break;
+
+            case NET_IF_TYPE_PPP:
+            case NET_IF_TYPE_SERIAL:
+            default:
+                *p_err = NET_IF_ERR_INVALID_PROTOCOL;
+                 goto exit;
+        }
+    }
+
+                                                                /* ------------- CALC PROTOCOL LAYER MTU -------------- */
+    switch (protocol) {
+        case NET_PROTOCOL_TYPE_LINK:
+             if (p_if == DEF_NULL) {
+                *p_err = NET_ERR_FAULT_NULL_OBJ;
+                 goto exit;
+             }
+
+             p_if_api = p_if->IF_API;
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+             if (p_if_api == DEF_NULL) {
+                *p_err =  NET_IF_ERR_INVALID_CFG;
+                 goto exit;
+             }
+             if (p_if_api->GetPktSizeHdr == DEF_NULL) {
+                *p_err =  NET_ERR_FAULT_NULL_FNCT;
+                 goto exit;
+             }
+#endif
+             hdr_size = p_if_api->GetPktSizeHdr(p_if);
+             break;
+
+
+        case NET_PROTOCOL_TYPE_IF:
+        case NET_PROTOCOL_TYPE_IF_FRAME:
+        case NET_PROTOCOL_TYPE_IF_ETHER:
+        case NET_PROTOCOL_TYPE_IF_IEEE_802:
+             break;
+
+        case NET_PROTOCOL_TYPE_ARP:
+             hdr_size += NET_ARP_HDR_SIZE;
+             break;
+
+        case NET_PROTOCOL_TYPE_IP_V4:
+        case NET_PROTOCOL_TYPE_ICMP_V4:
+        case NET_PROTOCOL_TYPE_UDP_V4:
+        case NET_PROTOCOL_TYPE_IGMP:
+        case NET_PROTOCOL_TYPE_TCP_V4:
+             hdr_size += NET_IPv4_HDR_SIZE_MIN;
+             switch (protocol) {
+                 case NET_PROTOCOL_TYPE_IP_V4:
+                 case NET_PROTOCOL_TYPE_ICMP_V4:
+                      break;
+
+                 case NET_PROTOCOL_TYPE_UDP_V4:
+                      hdr_size += NET_UDP_HDR_SIZE;
+                      break;
+
+                 case NET_PROTOCOL_TYPE_IGMP:
+                      hdr_size += NET_IGMP_HDR_SIZE;
+                      break;
+
+                 case NET_PROTOCOL_TYPE_TCP_V4:
+                      hdr_size += NET_TCP_HDR_SIZE_MIN;
+                      break;
+
+                 default:
+                      break;
+             }
+             break;
+
+
+        case NET_PROTOCOL_TYPE_IP_V6:
+        case NET_PROTOCOL_TYPE_ICMP_V6:
+        case NET_PROTOCOL_TYPE_UDP_V6:
+        case NET_PROTOCOL_TYPE_TCP_V6:
+             hdr_size += NET_IPv6_HDR_SIZE;
+             switch (protocol) {
+                 case NET_PROTOCOL_TYPE_IP_V6:
+                 case NET_PROTOCOL_TYPE_ICMP_V6:
+                      break;
+
+
+                 case NET_PROTOCOL_TYPE_UDP_V6:
+                      hdr_size += NET_UDP_HDR_SIZE;
+                      break;
+
+
+                 case NET_PROTOCOL_TYPE_TCP_V6:
+                      hdr_size += NET_TCP_HDR_SIZE_MIN;
+                      break;
+
+                 default:
+                      break;
+             }
+             break;
+
+        case NET_PROTOCOL_TYPE_NONE:
+        case NET_PROTOCOL_TYPE_APP:
+        case NET_PROTOCOL_TYPE_SOCK:
+        default:
+            *p_err =  NET_ERR_INVALID_PROTOCOL;
+             goto exit;
+    }
+
+
+   *p_err =  NET_IF_ERR_NONE;
+
+
+exit:
+    return (hdr_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_IO_CtrlHandler()
+*
+* Description : (1) Handle network interface &/or device specific (I/O) control(s) :
+*
+*                   (a) Device link :
+*                       (1) Get    device link info
+*                       (2) Get    device link state
+*                       (3) Update device link state
+*
+*
+* Argument(s) : if_nbr      Network interface number to handle (I/O) controls.
+*
+*               opt         Desired I/O control option code to perform; additional control options may be
+*                           defined by the device driver :
+*
+*                               NET_IF_IO_CTRL_LINK_STATE_GET       Get    device's current  physical link state,
+*                                                                       'UP' or 'DOWN' (see Note #3).
+*                               NET_IF_IO_CTRL_LINK_STATE_GET_INFO  Get    device's detailed physical link state
+*                                                                       information.
+*                               NET_IF_IO_CTRL_LINK_STATE_UPDATE    Update device's current  physical link state.
+*
+*               p_data      Pointer to variable that will receive possible I/O control data (see Note #3).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_INVALID_CFG              Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT                Invalid NULL function pointer.
+*
+*                                                                   ---- RETURNED BY 'p_if_api->IO_Ctrl()' : -----
+*                               NET_IF_ERR_NONE                     I/O control option successfully handled.
+*                               NET_ERR_FAULT_NULL_PTR                 Argument 'p_data' passed a NULL pointer.
+*                               NET_IF_ERR_INVALID_IO_CTRL_OPT      Invalid I/O control option.
+*
+*                                                                   See specific network interface(s) 'IO_Ctrl()'
+*                                                                       for additional return error codes.
+*
+*                                                                   --------- RETURNED BY NetIF_Get() : ---------
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_IO_Ctrl(),
+*               NetIF_PhyLinkStateHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (2) NetIF_IO_CtrlHandler() is called by network protocol suite function(s) & MUST be
+*                   called with the global network lock already acquired.
+*
+*                   See also 'NetIF_IO_Ctrl()  Note #2'.
+*
+*               (3) 'p_data' MUST point to a variable or memory buffer that is sufficiently sized AND
+*                    aligned to receive any return data.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_IO_CtrlHandler (NET_IF_NBR   if_nbr,
+                                    CPU_INT08U   opt,
+                                    void        *p_data,
+                                    NET_ERR     *p_err)
+{
+    NET_IF      *p_if;
+    NET_IF_API  *p_if_api;
+
+                                                                /* -------------------- GET NET IF -------------------- */
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------------ GET NET IF API ------------------ */
+    p_if_api = (NET_IF_API *)p_if->IF_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_if_api == (NET_IF_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_if_api->IO_Ctrl == (void (*)(NET_IF   *,
+                                      CPU_INT08U,
+                                      void     *,
+                                      NET_ERR  *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+                                                                /* ----------------- HANDLE NET IF I/O ---------------- */
+    p_if_api->IO_Ctrl(p_if, opt, p_data, p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_PhyLinkStateHandler()
+*
+* Description : (1) Monitor network interfaces' physical layer link state :
+*
+*                   (a) Poll devices for current link state
+*                   (b) Get Physical Link State Handler timer
+*
+*
+* Argument(s) : p_obj       Pointer to this Network Interface Physical Link State Handler function
+*                               (see Note #2).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetIF_Init(),
+*                             NetIF_PhyLinkStateHandler().
+*
+* Note(s)     : (2) Network timer module requires a pointer to an object when allocating a timer.
+*                   However, since the Physical Link State Handler does NOT use or require any
+*                   object in order to execute, a NULL object pointer is passed instead.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (3) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Reset by NetTmr_Get().
+*
+*                   (b) but do NOT re-free the timer.
+*
+*               (4) (a) If a network interface's physical link state cannot be determined, it should NOT
+*                       be updated until the interface's physical link state can be correctly determined.
+*                       This allows the interface to continue to transmit packets despite any transitory
+*                       error(s) in determining network interface's physical link state.
+*
+*                   (b) (1) Network interfaces' 'Link' variables MUST ALWAYS be accessed exclusively with
+*                           the global network lock already acquired.
+*
+*                       (2) Therefore, physical layer link states CANNOT be asynchronously updated by any
+*                           network interface, device driver, or physical layer functions; including  any
+*                           interrupt service routines (ISRs).
+*********************************************************************************************************
+*/
+#ifndef  NET_CFG_LINK_STATE_POLL_DISABLED
+static  void  NetIF_PhyLinkStateHandler (void  *p_obj)
+{
+    NET_IF                      *p_if;
+    NET_IF_NBR                   if_nbr;
+    NET_IF_NBR                   if_nbr_next;
+    NET_TMR_TICK                 time_tick;
+    NET_IF_LINK_STATE            link_state;
+    NET_IF_LINK_SUBSCRIBER_OBJ  *p_subsciber_obj;
+    NET_ERR                      err;
+    CPU_SR_ALLOC();
+
+
+   (void)&p_obj;                                                    /* Prevent 'variable unused' warning (see Note #2). */
+
+                                                                    /* ------- GET ALL NET IF's PHY LINK STATE -------- */
+    if_nbr      = NET_IF_NBR_BASE_CFGD;
+    CPU_CRITICAL_ENTER();
+    if_nbr_next = NetIF_NbrNext;
+    CPU_CRITICAL_EXIT();
+
+    p_if = &NetIF_Tbl[if_nbr];
+
+    for ( ; if_nbr < if_nbr_next; if_nbr++) {
+        if (p_if->En == DEF_ENABLED) {
+            NetIF_IO_CtrlHandler(              if_nbr,
+                                               NET_IF_IO_CTRL_LINK_STATE_GET,
+                                 (void      *)&link_state,
+                                              &err);
+
+            if (err == NET_IF_ERR_NONE) {                           /* If NO err(s)               [see Note #4a], ...   */
+                p_if->Link = link_state;                            /* ... update IF's link state (see Note #4b).       */
+
+                if (link_state != p_if->LinkPrev) {                 /* If Link state changed since last read ...        */
+                                                                    /* ...  notify subscriber.                          */
+                    p_subsciber_obj = p_if->LinkSubscriberListHeadPtr;
+
+                                                                    /* --------------- RELEASE NET LOCK --------------- */
+                    Net_GlobalLockRelease();
+
+
+                    while (p_subsciber_obj != DEF_NULL) {
+
+                        if (p_subsciber_obj->Fnct != DEF_NULL) {
+                            p_subsciber_obj->Fnct(p_if->Nbr, link_state);
+                        }
+
+                        p_subsciber_obj = p_subsciber_obj->NextPtr;
+                    }
+
+                                                                    /* --------------- ACQUIRE NET LOCK --------------- */
+                    Net_GlobalLockAcquire((void *)&NetIF_PhyLinkStateHandler, &err);
+                }
+
+                p_if->LinkPrev = link_state;
+            }
+        }
+
+        p_if++;
+    }
+
+                                                                    /* ------------ GET PHY LINK STATE TMR ------------ */
+    CPU_CRITICAL_ENTER();
+    time_tick             = NetIF_PhyLinkStateTime_tick;
+    CPU_CRITICAL_EXIT();
+    NetIF_PhyLinkStateTmr = NetTmr_Get(&NetIF_PhyLinkStateHandler,
+                                        0,                          /* See Note #2.                                     */
+                                        time_tick,
+                                        NET_TMR_FLAG_NONE,
+                                       &err);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_PerfMonHandler()
+*
+* Description : (1) Monitor network interfaces' performance :
+*
+*                   (a) Calculate & update network interfaces' performance statistics
+*                   (b) Get Performance Monitor Handler timer
+*
+*
+* Argument(s) : p_obj       Pointer to this Network Interface Performance Monitor Handler function
+*                               (see Note #2).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetIF_Init(),
+*                             NetIF_PerfMonHandler().
+*
+* Note(s)     : (2) Network timer module requires a pointer to an object when allocating a timer.
+*                   However, since the Performance Monitor Handler does NOT use or require any
+*                   object in order to execute, a NULL object pointer is passed instead.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (3) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Reset by NetTmr_Get().
+*
+*                   (b) but do NOT re-free the timer.
+*********************************************************************************************************
+*/
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+static  void  NetIF_PerfMonHandler (void  *p_obj)
+{
+    NET_IF            *p_if;
+    NET_CTR_IF_STATS  *p_if_stats;
+    NET_IF_NBR         if_nbr;
+    NET_IF_NBR         if_nbr_next;
+    NET_CTR            rx_octets_cur;
+    NET_CTR            rx_octets_prev;
+    NET_CTR            rx_octets_per_sec;
+    NET_CTR            rx_pkt_cnt_cur;
+    NET_CTR            rx_pkt_cnt_prev;
+    NET_CTR            rx_pkt_per_sec;
+    NET_CTR            tx_octets_cur;
+    NET_CTR            tx_octets_prev;
+    NET_CTR            tx_octets_per_sec;
+    NET_CTR            tx_pkt_cnt_prev;
+    NET_CTR            tx_pkt_cnt_cur;
+    NET_CTR            tx_pkt_per_sec;
+    NET_TS_MS          ts_ms_cur;
+    NET_TS_MS          ts_ms_prev;
+    NET_TS_MS          ts_ms_delta;
+    NET_TMR_TICK       time_tick;
+    CPU_BOOLEAN        update_dlyd;
+    CPU_BOOLEAN        reset;
+    NET_ERR            err;
+    CPU_SR_ALLOC();
+
+
+   (void)&p_obj;                                                            /* Prevent 'variable unused' (see Note #2). */
+
+
+                                                                            /* ------- UPDATE NET IF PERF STATS ------- */
+    if_nbr      = NetIF_NbrBase;
+    CPU_CRITICAL_ENTER();
+    if_nbr_next = NetIF_NbrNext;
+    reset       = NetIF_CtrsResetEn;
+    CPU_CRITICAL_EXIT();
+
+    if (reset == DEF_YES) {
+        NetCtr_Init();
+        CPU_CRITICAL_ENTER();
+        NetIF_CtrsResetEn = DEF_NO;
+        CPU_CRITICAL_EXIT();
+    }
+
+    p_if       = &NetIF_Tbl[if_nbr];
+    p_if_stats = &Net_StatCtrs.IFs.IF[if_nbr];
+
+    ts_ms_cur =  NetUtil_TS_Get_ms();
+
+    for ( ; if_nbr < if_nbr_next; if_nbr++) {
+        if (p_if->En == DEF_ENABLED) {
+
+            rx_octets_cur  = p_if_stats->RxNbrOctets;
+            tx_octets_cur  = p_if_stats->TxNbrOctets;
+            rx_pkt_cnt_cur = p_if_stats->RxNbrPktCtrProcessed;
+            tx_pkt_cnt_cur = p_if_stats->TxNbrPktCtrProcessed;
+
+            update_dlyd    = DEF_NO;
+
+            if (p_if->PerfMonState == NET_IF_PERF_MON_STATE_RUN) {          /* If perf mon already running &       ...  */
+
+                ts_ms_prev = p_if->PerfMonTS_Prev_ms;
+                if (ts_ms_cur > ts_ms_prev) {                               /* ... cur ts > prev ts,               ...  */
+                                                                            /* ... update   perf mon stats :       ...  */
+                                                                            /* ... get prev perf mon vals,         ...  */
+                    rx_octets_prev    = p_if_stats->RxNbrOctetsPrev;
+                    tx_octets_prev    = p_if_stats->TxNbrOctetsPrev;
+                    rx_pkt_cnt_prev   = p_if_stats->RxNbrPktCtrProcessedPrev;
+                    tx_pkt_cnt_prev   = p_if_stats->TxNbrPktCtrProcessedPrev;
+
+                    ts_ms_delta       = ts_ms_cur - ts_ms_prev;             /* ... calc delta ts (in ms), &        ...  */
+
+                                                                            /* ... calc/update cur perf mon stats; ...  */
+                    rx_octets_per_sec = ((rx_octets_cur  - rx_octets_prev ) * DEF_TIME_NBR_mS_PER_SEC) / ts_ms_delta;
+                    tx_octets_per_sec = ((tx_octets_cur  - tx_octets_prev ) * DEF_TIME_NBR_mS_PER_SEC) / ts_ms_delta;
+                    rx_pkt_per_sec    = ((rx_pkt_cnt_cur - rx_pkt_cnt_prev) * DEF_TIME_NBR_mS_PER_SEC) / ts_ms_delta;
+                    tx_pkt_per_sec    = ((tx_pkt_cnt_cur - tx_pkt_cnt_prev) * DEF_TIME_NBR_mS_PER_SEC) / ts_ms_delta;
+
+
+                    p_if_stats->RxNbrOctetsPerSec = rx_octets_per_sec;
+                    p_if_stats->TxNbrOctetsPerSec = tx_octets_per_sec;
+                    p_if_stats->RxNbrPktCtrPerSec = rx_pkt_per_sec;
+                    p_if_stats->TxNbrPktCtrPerSec = tx_pkt_per_sec;
+
+                    if (p_if_stats->RxNbrOctetsPerSecMax < rx_octets_per_sec) {
+                        p_if_stats->RxNbrOctetsPerSecMax = rx_octets_per_sec;
+                    }
+                    if (p_if_stats->TxNbrOctetsPerSecMax < tx_octets_per_sec) {
+                        p_if_stats->TxNbrOctetsPerSecMax = tx_octets_per_sec;
+                    }
+                    if (p_if_stats->RxNbrPktCtrPerSecMax < rx_pkt_per_sec) {
+                        p_if_stats->RxNbrPktCtrPerSecMax = rx_pkt_per_sec;
+                    }
+                    if (p_if_stats->TxNbrPktCtrPerSecMax < tx_pkt_per_sec) {
+                        p_if_stats->TxNbrPktCtrPerSecMax = tx_pkt_per_sec;
+                    }
+
+                } else {                                                    /* ... else dly perf mon stats update.      */
+                    update_dlyd = DEF_YES;
+                }
+            }
+
+            if (update_dlyd != DEF_YES) {                                   /* If update NOT dly'd, ...                 */
+                                                                            /* ... save cur stats for next update.      */
+                p_if_stats->RxNbrOctetsPrev          = rx_octets_cur;
+                p_if_stats->TxNbrOctetsPrev          = tx_octets_cur;
+                p_if_stats->RxNbrPktCtrProcessedPrev = rx_pkt_cnt_cur;
+                p_if_stats->TxNbrPktCtrProcessedPrev = tx_pkt_cnt_cur;
+
+                p_if->PerfMonTS_Prev_ms                        = ts_ms_cur;
+            }
+
+            p_if->PerfMonState = NET_IF_PERF_MON_STATE_RUN;
+
+        } else {
+            p_if->PerfMonState = NET_IF_PERF_MON_STATE_STOP;
+        }
+
+        p_if++;
+        p_if_stats++;
+    }
+
+
+                                                                            /* ----------- GET PERF MON TMR ----------- */
+    CPU_CRITICAL_ENTER();
+    time_tick        = NetIF_PerfMonTime_tick;
+    CPU_CRITICAL_EXIT();
+    NetIF_PerfMonTmr = NetTmr_Get((CPU_FNCT_PTR )&NetIF_PerfMonHandler,
+                                  (void        *) 0,                        /* See Note #2.                             */
+                                  (NET_TMR_TICK ) time_tick,
+                                  (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                  (NET_ERR     *)&err);
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if.h
new file mode 100644
index 0000000..a312680
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if.h
@@ -0,0 +1,954 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    NETWORK INTERFACE MANAGEMENT
+*
+* Filename      : net_if.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 EHS
+*                 FGK
+*                 SR
+*********************************************************************************************************
+* Note(s)       : (1) Network Interface modules located in the following network directory :
+*
+*                     (a) \\IF\net_if.*
+*                                                      net_if_*.*
+*
+*                             where
+*                                           directory path for network protocol suite
+*                                      net_if.*                     Generic  Network Interface Management
+*                                                                       module files
+*                                      net_if_*.*                   Specific Network Interface(s) module files
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../Source/net.h"
+#include  "../Source/net_cfg_net.h"
+#include  "../Source/net_buf.h"
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IF_MODULE_PRESENT
+#define  NET_IF_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_IF_PHY_LINK_TIME_MIN_MS                      50
+#define  NET_IF_PHY_LINK_TIME_MAX_MS                   60000
+#define  NET_IF_PHY_LINK_TIME_DFLT_MS                    250
+
+#define  NET_IF_PERF_MON_TIME_MIN_MS                      50
+#define  NET_IF_PERF_MON_TIME_MAX_MS                   60000
+#define  NET_IF_PERF_MON_TIME_DFLT_MS                    250
+
+
+/*
+*********************************************************************************************************
+*                                NETWORK INTERFACE I/O CONTROL DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IF_IO_CTRL_NONE                               0u
+#define  NET_IF_IO_CTRL_LINK_STATE_GET                    10u   /* Get        link state.                               */
+#define  NET_IF_IO_CTRL_LINK_STATE_GET_INFO               11u   /* Get        link state info.                          */
+#define  NET_IF_IO_CTRL_LINK_STATE_UPDATE                 12u   /* Update dev link state regs.                          */
+
+
+
+                                                                /* ----- CFG BUF DATA PROTOCOL MIN/MAX HDR SIZES ------ */
+
+#if  (defined(NET_IF_ETHER_MODULE_EN) || \
+      defined(NET_IF_WIFI_MODULE_EN))
+
+    #define  NET_IF_HDR_SIZE_MIN                NET_IF_HDR_SIZE_ETHER
+    #define  NET_IF_HDR_SIZE_MAX                NET_IF_HDR_SIZE_ETHER
+
+#elif  (defined(NET_IF_LOOPBACK_MODULE_EN))
+
+    #define  NET_IF_HDR_SIZE_MIN                NET_IF_HDR_SIZE_LOOPBACK
+    #define  NET_IF_HDR_SIZE_MAX                NET_IF_HDR_SIZE_LOOPBACK
+
+#else
+    #define  NET_IF_HDR_SIZE_MIN                0
+    #define  NET_IF_HDR_SIZE_MAX                0
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK INTERFACE INDEX DEFINES
+*
+* Note(s) : (1) Since network data value macro's appropriately convert data values from any CPU addresses,
+*               word-aligned or not; network receive & transmit packets are NOT required to ensure that
+*               network packet headers (ARP/IP/UDP/TCP/etc.) & header members will locate on CPU word-
+*               aligned addresses.  Therefore, network interface packets are NOT required to start on
+*               any specific buffer indices.
+*
+*               See also 'net_util.h  NETWORK DATA VALUE MACRO'S           Note #2b'
+*                      & 'net_buf.h   NETWORK BUFFER INDEX & SIZE DEFINES  Note #2'.
+*********************************************************************************************************
+*/
+                                                                            /* See Note #1.                             */
+#define  NET_IF_IX_RX                                    NET_BUF_DATA_IX_RX
+#define  NET_IF_RX_IX                                    NET_IF_IX_RX       /* Req'd for backwards-compatibility.       */
+
+
+/*
+*********************************************************************************************************
+*                                 NETWORK INTERFACE NUMBER DATA TYPE
+*********************************************************************************************************
+*/
+
+#define  NET_IF_NBR_BASE                                   0
+#define  NET_IF_NBR_BASE_CFGD                           (NET_IF_NBR_BASE       + NET_IF_NBR_IF_RESERVED)
+
+
+#define  NET_IF_NBR_NONE                                 NET_IF_NBR_MAX_VAL
+#define  NET_IF_NBR_MIN                                  NET_IF_NBR_IF_RESERVED
+#define  NET_IF_NBR_MAX                                 (NET_IF_NBR_NONE - 1)
+
+                                                                                /* Reserved net IF nbrs :               */
+#define  NET_IF_NBR_LOOPBACK                            (NET_IF_NBR_BASE + 0)
+#define  NET_IF_NBR_LOCAL_HOST                           NET_IF_NBR_LOOPBACK
+#define  NET_IF_NBR_WILDCARD                             NET_IF_NBR_NONE
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   NETWORK INTERFACE TYPE DEFINES
+*
+* Note(s) : (1) NET_IF_TYPE_&&& #define values specifically chosen as ASCII representations of the network
+*               interface types.  Memory displays of network interfaces will display the network interface
+*               TYPEs with their chosen ASCII names.
+*********************************************************************************************************
+*/
+
+
+typedef  enum  net_if_mem_type {
+    NET_IF_MEM_TYPE_NONE = 0,
+    NET_IF_MEM_TYPE_MAIN,                       /* Create dev's net bufs in main      mem.              */
+    NET_IF_MEM_TYPE_DEDICATED                   /* Create dev's net bufs in dedicated mem.              */
+} NET_IF_MEM_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                     NETWORK DEVICE INTERRUPT SERVICE ROUTINE (ISR) TYPE DATA TYPE
+*
+* Note(s) : (1) The following network device interrupt service routine (ISR) types are currently supported.
+*
+*               However, this may NOT be a complete or exhaustive list of device ISR type(s).  Therefore,
+*               ANY addition, modification, or removal of network device ISR types SHOULD be appropriately
+*               synchronized &/or updated with (ALL) device driver ISR handlers.
+*********************************************************************************************************
+*/
+
+typedef  enum  net_dev_isr_type {
+    NET_DEV_ISR_TYPE_NONE,
+    NET_DEV_ISR_TYPE_UNKNOWN,                                   /* Dev                     ISR unknown.                 */
+
+    NET_DEV_ISR_TYPE_RX,                                        /* Dev rx                  ISR.                         */
+    NET_DEV_ISR_TYPE_RX_RUNT,                                   /* Dev rx runt             ISR.                         */
+    NET_DEV_ISR_TYPE_RX_OVERRUN,                                /* Dev rx overrun          ISR.                         */
+
+    NET_DEV_ISR_TYPE_TX_RDY,                                    /* Dev tx rdy              ISR.                         */
+    NET_DEV_ISR_TYPE_TX_COMPLETE,                               /* Dev tx complete         ISR.                         */
+    NET_DEV_ISR_TYPE_TX_COLLISION_LATE,                         /* Dev tx late   collision ISR.                         */
+    NET_DEV_ISR_TYPE_TX_COLLISION_EXCESS,                       /* Dev tx excess collision ISR.                         */
+
+    NET_DEV_ISR_TYPE_JABBER,                                    /* Dev jabber              ISR.                         */
+    NET_DEV_ISR_TYPE_BABBLE,                                    /* Dev babble              ISR.                         */
+
+    NET_DEV_ISR_TYPE_PHY,                                       /* Dev phy                 ISR.                         */
+
+
+    NET_DEV_ISR_TYPE_TX_DONE = NET_DEV_ISR_TYPE_TX_COMPLETE
+} NET_DEV_ISR_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                              NETWORK DEVICE CONFIGURATION FLAG DATA TYPE
+*
+* Note(s) : (1) The following network device configuration flags are currently supported :
+*
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  NET_DEV_CFG_FLAGS;
+
+                                                                /* See Note #1.                                         */
+#define  NET_DEV_CFG_FLAG_NONE                           DEF_BIT_NONE
+#define  NET_DEV_CFG_FLAG_SWAP_OCTETS                    DEF_BIT_00
+
+#define  NET_DEV_CFG_FLAG_MASK                          (NET_DEV_CFG_FLAG_NONE       | \
+                                                         NET_DEV_CFG_FLAG_SWAP_OCTETS)
+
+
+/*
+*********************************************************************************************************
+*                        NETWORK INTERFACE PERFORMANCE MONITOR STATE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum net_if_perf_mon_state {
+    NET_IF_PERF_MON_STATE_NONE,
+    NET_IF_PERF_MON_STATE_STOP,
+    NET_IF_PERF_MON_STATE_START,
+    NET_IF_PERF_MON_STATE_RUN
+} NET_IF_PERF_MON_STATE;
+
+typedef  enum net_if_link_sate {
+  NET_IF_LINK_UP,
+  NET_IF_LINK_DOWN
+} NET_IF_LINK_STATE;
+
+
+/*
+*********************************************************************************************************
+*                         NETWORK INTERFACE PERFORMANCE MONITOR STATE DEFINES
+*********************************************************************************************************
+*/
+
+typedef  void  (*NET_IF_LINK_SUBSCRIBER_FNCT)(NET_IF_NBR        if_nbr,
+                                              NET_IF_LINK_STATE link_state);
+
+typedef  struct  net_if_link_subscriber_obj  NET_IF_LINK_SUBSCRIBER_OBJ;
+
+struct  net_if_link_subscriber_obj{
+    NET_IF_LINK_SUBSCRIBER_FNCT   Fnct;
+    CPU_INT32U                    RefCtn;
+    NET_IF_LINK_SUBSCRIBER_OBJ   *NextPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                                     NETWORK INTERFACE DATA TYPE
+*
+* Note(s) : (1) A network interface's hardware MTU is computed as the minimum of the largest buffer size
+*               configured for a specific interface & the configured MTU for the interface device.
+*
+*           (2) Network interface initialization flag set when an interface has been successfully added
+*               & initialized to the interface table.  Once set, this flag is never cleared since the
+*               removal of interfaces is currently not allowed.
+*
+*           (3) Network interface enable/disable independent of physical hardware link state of the
+*               interface's associated device.
+**********************************************************************************************************
+*/
+
+                                                        /* -------------------------- NET IF -------------------------- */
+struct  net_if {
+    NET_IF_TYPE                  Type;                  /* IF type (Loopback, Ethernet, PPP, Serial device, etc.).      */
+    NET_IF_NBR                   Nbr;                   /* IF nbr.                                                      */
+
+    CPU_BOOLEAN                  Init;                  /* IF init     status (see Note #2).                            */
+    CPU_BOOLEAN                  En;                    /* IF en/dis   status (see Note #3).                            */
+
+    NET_IF_LINK_STATE            LinkPrev;
+    NET_IF_LINK_STATE            Link;                  /* IF current  Phy link status.                                 */
+    MEM_DYN_POOL                 LinkSubscriberPool;
+    NET_IF_LINK_SUBSCRIBER_OBJ  *LinkSubscriberListHeadPtr;
+    NET_IF_LINK_SUBSCRIBER_OBJ  *LinkSubscriberListEndPtr;
+
+    NET_MTU                      MTU;                   /* IF MTU             (see Note #1).                            */
+
+    void                        *IF_API;                /* Ptr to IF's     API  fnct tbl.                               */
+    void                        *IF_Data;               /* Ptr to IF's     data area.                                   */
+    void                        *Dev_API;               /* Ptr to IF's dev API  fnct tbl.                               */
+    void                        *Dev_BSP;               /* Ptr to IF's dev BSP  fnct tbl.                               */
+    void                        *Dev_Cfg;               /* Ptr to IF's dev cfg       tbl.                               */
+    void                        *Dev_Data;              /* Ptr to IF's dev data area.                                   */
+    void                        *Ext_API;               /* Ptr to IF's phy API  fnct tbl.                               */
+    void                        *Ext_Cfg;               /* Ptr to IF's phy cfg       tbl.                               */
+    void                        *Ext_Data;              /* Ptr to IF's phy data area.                                   */
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    NET_IF_PERF_MON_STATE        PerfMonState;          /* Perf mon state.                                              */
+    NET_TS_MS                    PerfMonTS_Prev_ms;     /* Perf mon prev TS (in ms).                                    */
+#endif
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+    NET_STAT_CTR                 RxPktCtr;              /* Indicates nbr of rx pkts q'd to IF but NOT yet handled.      */
+
+
+    KAL_SEM_HANDLE               TxSuspendSignalObj;
+    CPU_INT32U                   TxSuspendTimeout_ms;
+    NET_STAT_CTR                 TxSuspendCtr;          /* Indicates nbr of tx conn's for  IF currently suspended.      */
+#endif
+
+    KAL_SEM_HANDLE               DevTxRdySignalObj;
+};
+
+
+/*
+*********************************************************************************************************
+*                           GENERIC NETWORK DEVICE CONFIGURATION DATA TYPE
+*
+* Note(s) : (1) The generic network device configuration data type is a template/subset for all specific
+*               network device configuration data types.  Each specific network device configuration
+*               data type MUST define ALL generic network device configuration parameters, synchronized
+*               in both the sequential order & data type of each parameter.
+*
+*               Thus ANY modification to the sequential order or data types of generic configuration
+*               parameters MUST be appropriately synchronized between the generic network device
+*               configuration data type & ALL specific network device configuration data types.
+*********************************************************************************************************
+*/
+
+                                                    /* ------------------------- NET DEV CFG -------------------------- */
+struct  net_dev_cfg {
+    NET_IF_MEM_TYPE     RxBufPoolType;              /* Rx buf mem pool type :                                           */
+                                                    /*   NET_IF_MEM_TYPE_MAIN        bufs alloc'd from main      mem    */
+                                                    /*   NET_IF_MEM_TYPE_DEDICATED   bufs alloc'd from dedicated mem    */
+    NET_BUF_SIZE        RxBufLargeSize;             /* Size  of dev rx large buf data areas (in octets).                */
+    NET_BUF_QTY         RxBufLargeNbr;              /* Nbr   of dev rx large buf data areas.                            */
+    NET_BUF_SIZE        RxBufAlignOctets;           /* Align of dev rx       buf data areas (in octets).                */
+    NET_BUF_SIZE        RxBufIxOffset;              /* Offset from base ix to rx data into data area (in octets).       */
+
+
+    NET_IF_MEM_TYPE     TxBufPoolType;              /* Tx buf mem pool type :                                           */
+                                                    /*   NET_IF_MEM_TYPE_MAIN        bufs alloc'd from main      mem    */
+                                                    /*   NET_IF_MEM_TYPE_DEDICATED   bufs alloc'd from dedicated mem    */
+    NET_BUF_SIZE        TxBufLargeSize;             /* Size  of dev tx large buf data areas (in octets).                */
+    NET_BUF_QTY         TxBufLargeNbr;              /* Nbr   of dev tx large buf data areas.                            */
+    NET_BUF_SIZE        TxBufSmallSize;             /* Size  of dev tx small buf data areas (in octets).                */
+    NET_BUF_QTY         TxBufSmallNbr;              /* Nbr   of dev tx small buf data areas.                            */
+    NET_BUF_SIZE        TxBufAlignOctets;           /* Align of dev tx       buf data areas (in octets).                */
+    NET_BUF_SIZE        TxBufIxOffset;              /* Offset from base ix to tx data from data area (in octets).       */
+
+
+    CPU_ADDR            MemAddr;                    /* Base addr of (dev's) dedicated mem, if avail.                    */
+    CPU_ADDR            MemSize;                    /* Size      of (dev's) dedicated mem, if avail.                    */
+
+
+    NET_DEV_CFG_FLAGS   Flags;                      /* Opt'l bit flags.                                                 */
+};
+
+
+/*
+*********************************************************************************************************
+*                               GENERIC NETWORK INTERFACE API DATA TYPE
+*
+* Note(s) : (1) The generic network interface application programming interface (API) data type is a
+*               template/subset for all specific network interface API data types.
+*
+*               (a) Each specific network interface API data type definition MUST define ALL generic
+*                   network interface API functions, synchronized in both the sequential order of the
+*                   functions & argument lists for each function.
+*
+*                   Thus ANY modification to the sequential order or argument lists of the generic API
+*                   functions MUST be appropriately synchronized between the generic network interface
+*                   API data type & ALL specific network interface API data type definitions/instantiations.
+*
+*               (b) ALL API functions SHOULD be defined with NO NULL functions for all specific network
+*                   interface API instantiations.  Any specific network interface API instantiation that
+*                   does define any NULL API functions MUST ensure that NO NULL API functions are called
+*                   for the specific network interface.
+*
+*                   Instead of  NULL functions, a specific network interface API instantiation COULD
+*                   define empty API functions that return error code 'NET_ERR_FAULT_FEATURE_DIS'.
+*********************************************************************************************************
+*/
+
+                                                                                    /* ---------- NET IF API ---------- */
+                                                                                    /* Net IF API fnct ptrs :           */
+struct  net_if_api {
+                                                                                    /*   Init/add                       */
+    void         (*Add)                      (NET_IF             *p_if,
+                                              NET_ERR            *p_err);
+
+                                                                                    /*   Start                          */
+    void         (*Start)                    (NET_IF             *p_if,
+                                              NET_ERR            *p_err);
+
+                                                                                    /*   Stop                           */
+    void         (*Stop)                     (NET_IF             *p_if,
+                                              NET_ERR            *p_err);
+
+
+                                                                                    /*   Rx                             */
+    void         (*Rx)                       (NET_IF             *p_if,
+                                              NET_BUF            *p_buf,
+                                              NET_ERR            *p_err);
+
+                                                                                    /*   Tx                             */
+    void         (*Tx)                       (NET_IF             *p_if,
+                                              NET_BUF            *p_buf,
+                                              NET_ERR            *p_err);
+
+
+                                                                                    /*   Hw addr get                    */
+    void         (*AddrHW_Get)               (NET_IF             *p_if,
+                                              CPU_INT08U         *p_addr,
+                                              CPU_INT08U         *addr_len,
+                                              NET_ERR            *p_err);
+
+                                                                                    /*   Hw addr set                    */
+    void         (*AddrHW_Set)               (NET_IF             *p_if,
+                                              CPU_INT08U         *p_addr,
+                                              CPU_INT08U          addr_len,
+                                              NET_ERR            *p_err);
+
+                                                                                    /*   Hw addr valid                  */
+    CPU_BOOLEAN  (*AddrHW_IsValid)           (NET_IF             *p_if,
+                                              CPU_INT08U         *p_addr_hw);
+
+
+                                                                                    /*   Multicast addr add             */
+    void         (*AddrMulticastAdd)         (NET_IF             *p_if,
+                                              CPU_INT08U         *p_addr_protocol,
+                                              CPU_INT08U          paddr_protocol_len,
+                                              NET_PROTOCOL_TYPE   addr_protocol_type,
+                                              NET_ERR            *p_err);
+
+                                                                                    /*   Multicast addr remove          */
+    void         (*AddrMulticastRemove)      (NET_IF             *p_if,
+                                              CPU_INT08U         *p_addr_protocol,
+                                              CPU_INT08U          paddr_protocol_len,
+                                              NET_PROTOCOL_TYPE   addr_protocol_type,
+                                              NET_ERR            *p_err);
+
+                                                                                    /*   Multicast addr protocol-to-hw  */
+    void         (*AddrMulticastProtocolToHW)(NET_IF             *p_if,
+                                              CPU_INT08U         *p_addr_protocol,
+                                              CPU_INT08U          addr_protocol_len,
+                                              NET_PROTOCOL_TYPE   addr_protocol_type,
+                                              CPU_INT08U         *p_addr_hw,
+                                              CPU_INT08U         *p_addr_hw_len,
+                                              NET_ERR            *p_err);
+
+
+                                                                                    /*   Buf cfg validation             */
+    void         (*BufPoolCfgValidate)       (NET_IF             *p_if,
+                                              NET_ERR            *p_err);
+
+
+                                                                                    /*   MTU set                        */
+    void         (*MTU_Set)                  (NET_IF             *p_if,
+                                              NET_MTU             mtu,
+                                              NET_ERR            *p_err);
+
+
+                                                                                    /*   Get pkt hdr size               */
+    CPU_INT16U   (*GetPktSizeHdr)            (NET_IF             *p_if);
+
+                                                                                    /*   Get pkt min size               */
+    CPU_INT16U   (*GetPktSizeMin)            (NET_IF             *p_if);
+
+
+    /*   Get pkt min size               */
+    CPU_INT16U   (*GetPktSizeMax)            (NET_IF             *p_if);
+
+                                                                                    /*   ISR handler                    */
+    void         (*ISR_Handler)              (NET_IF             *p_if,
+                                              NET_DEV_ISR_TYPE    type,
+                                              NET_ERR            *p_err);
+
+
+                                                                                    /*   I/O ctrl                       */
+    void         (*IO_Ctrl)                  (NET_IF             *p_if,
+                                              CPU_INT08U          opt,
+                                              void               *p_data,
+                                              NET_ERR            *p_err);
+};
+
+
+/*
+*********************************************************************************************************
+*                                GENERIC NETWORK DEVICE API DATA TYPE
+*
+* Note(s) : (1) The generic network device application programming interface (API) data type is a template/
+*               subset for all specific network device API data types.
+*
+*               (a) Each specific network device API data type definition MUST define ALL generic network
+*                   device API functions, synchronized in both the sequential order of the functions &
+*                   argument lists for each function.
+*
+*                   Thus ANY modification to the sequential order or argument lists of the  generic API
+*                   functions MUST be appropriately synchronized between the generic network device API
+*                   data type & ALL specific network device API data type definitions/instantiations.
+*
+*                   However, specific network device API data type definitions/instantiations MAY include
+*                   additional API functions after all generic network device API functions.
+*
+*               (b) ALL API functions MUST be defined with NO NULL functions for all specific network
+*                   device API instantiations.  Any specific network device API instantiation that does
+*                   NOT require a specific API's functionality MUST define an empty API function which
+*                   may need to return an appropriate error code.
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- NET DEV API ------------------- */
+                                                                /* Net dev API fnct ptrs :                              */
+typedef  struct  net_dev_api {
+                                                                /* Init                                                 */
+    void  (*Init)               (NET_IF              *p_if,
+                                 NET_ERR             *p_err);
+                                                                /* Start                                                */
+    void  (*Start)              (NET_IF              *p_if,
+                                 NET_ERR             *p_err);
+                                                                /* Stop                                                 */
+    void  (*Stop)               (NET_IF              *p_if,
+                                 NET_ERR             *p_err);
+                                                                /* Rx                                                   */
+    void  (*Rx)                 (NET_IF              *p_if,
+                                 CPU_INT08U         **p_data,
+                                 CPU_INT16U          *size,
+                                 NET_ERR             *p_err);
+                                                                /* Tx                                                   */
+    void  (*Tx)                 (NET_IF              *p_if,
+                                 CPU_INT08U          *p_data,
+                                 CPU_INT16U           size,
+                                 NET_ERR             *p_err);
+                                                                /* Multicast addr add                                   */
+    void  (*AddrMulticastAdd)   (NET_IF              *p_if,
+                                 CPU_INT08U          *p_addr_hw,
+                                 CPU_INT08U           addr_hw_len,
+                                 NET_ERR             *p_err);
+                                                                /* Multicast addr remove                                */
+    void  (*AddrMulticastRemove)(NET_IF              *p_if,
+                                 CPU_INT08U          *p_addr_hw,
+                                 CPU_INT08U           addr_hw_len,
+                                 NET_ERR             *p_err);
+                                                                /* ISR handler                                          */
+    void  (*ISR_Handler)        (NET_IF              *p_if,
+                                 NET_DEV_ISR_TYPE     type);
+} NET_DEV_API;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+/* =========================================== CTRL FNCTS ============================================ */
+
+NET_IF_NBR        NetIF_Add                   (void                         *if_api,
+                                               void                         *dev_api,
+                                               void                         *dev_bsp,
+                                               void                         *dev_cfg,
+                                               void                         *ext_api,
+                                               void                         *ext_cfg,
+                                               NET_ERR                      *p_err);
+
+void              NetIF_Start                 (NET_IF_NBR                    if_nbr,
+                                               NET_ERR                      *p_err);
+
+void              NetIF_Stop                  (NET_IF_NBR                    if_nbr,
+                                               NET_ERR                      *p_err);
+
+
+/* ============================================ CFG FNCTS ============================================ */
+
+CPU_BOOLEAN       NetIF_CfgPhyLinkPeriod      (CPU_INT16U                    time_ms);
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+CPU_BOOLEAN       NetIF_CfgPerfMonPeriod      (CPU_INT16U                    time_ms);
+#endif
+
+void             *NetIF_GetRxDataAlignPtr     (NET_IF_NBR                    if_nbr,
+                                               void                         *p_data,
+                                               NET_ERR                      *p_err);
+
+
+/* ========================================== STATUS FNCTS =========================================== */
+
+CPU_BOOLEAN       NetIF_IsValid               (NET_IF_NBR                    if_nbr,
+                                               NET_ERR                      *p_err);
+
+CPU_BOOLEAN       NetIF_IsValidCfgd           (NET_IF_NBR                    if_nbr,
+                                               NET_ERR                      *p_err);
+
+CPU_BOOLEAN       NetIF_IsEn                  (NET_IF_NBR                    if_nbr,
+                                               NET_ERR                      *p_err);
+
+CPU_BOOLEAN       NetIF_IsEnCfgd              (NET_IF_NBR                    if_nbr,
+                                               NET_ERR                      *p_err);
+
+CPU_INT08U        NetIF_GetExtAvailCtr        (NET_ERR                      *p_err);
+
+
+NET_IF_NBR        NetIF_GetNbrBaseCfgd            (void);
+
+
+/* =========================================== MGMT FNCTS ============================================ */
+
+void              NetIF_AddrHW_Get            (NET_IF_NBR                    if_nbr,
+                                               CPU_INT08U                   *p_addr_hw,
+                                               CPU_INT08U                   *p_addr_len,
+                                               NET_ERR                      *p_err);
+
+void              NetIF_AddrHW_Set            (NET_IF_NBR                    if_nbr,
+                                               CPU_INT08U                   *p_addr_hw,
+                                               CPU_INT08U                    addr_len,
+                                               NET_ERR                      *p_err);
+
+CPU_BOOLEAN       NetIF_AddrHW_IsValid        (NET_IF_NBR                    if_nbr,
+                                               CPU_INT08U                   *p_addr_hw,
+                                               NET_ERR                      *p_err);
+
+NET_MTU           NetIF_MTU_Get               (NET_IF_NBR                    if_nbr,
+                                               NET_ERR                      *p_err);
+
+void              NetIF_MTU_Set               (NET_IF_NBR                    if_nbr,
+                                               NET_MTU                       mtu,
+                                               NET_ERR                      *p_err);
+
+NET_IF_LINK_STATE NetIF_LinkStateGet          (NET_IF_NBR                    if_nbr,
+                                               NET_ERR                      *p_err);
+
+CPU_BOOLEAN       NetIF_LinkStateWaitUntilUp  (NET_IF_NBR                    if_nbr,
+                                               CPU_INT16U                    retry_max,
+                                               CPU_INT32U                    time_dly_ms,
+                                               NET_ERR                      *p_err);
+
+void              NetIF_LinkStateSubscribe    (NET_IF_NBR                    if_nbr,
+                                               NET_IF_LINK_SUBSCRIBER_FNCT   fcnt,
+                                               NET_ERR                      *p_err);
+
+void              NetIF_LinkStateUnsubscribe  (NET_IF_NBR                    if_nbr,
+                                               NET_IF_LINK_SUBSCRIBER_FNCT   fcnt,
+                                               NET_ERR                      *p_err);
+
+void              NetIF_IO_Ctrl               (NET_IF_NBR                    if_nbr,
+                                               CPU_INT08U                    opt,
+                                               void                         *p_data,
+                                               NET_ERR                      *p_err);
+
+#ifdef  NET_LOAD_BAL_MODULE_EN
+void              NetIF_TxSuspendTimeoutSet   (NET_IF_NBR                    if_nbr,
+                                               CPU_INT32U                    timeout_ms,
+                                               NET_ERR                      *p_err);
+
+CPU_INT32U        NetIF_TxSuspendTimeoutGet_ms(NET_IF_NBR                    if_nbr,
+                                               NET_ERR                      *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               BSP API
+*********************************************************************************************************
+*/
+
+void  NetIF_ISR_Handler(NET_IF_NBR          if_nbr,
+                        NET_DEV_ISR_TYPE    type,
+                        NET_ERR            *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                             DRIVER API
+*********************************************************************************************************
+*/
+
+void  NetIF_RxTaskSignal     (NET_IF_NBR   if_nbr,              /* Signal IF rx rdy    from dev rx ISR(s).              */
+                              NET_ERR     *p_err);
+
+
+void  NetIF_DevCfgTxRdySignal(NET_IF      *p_if,
+                              CPU_INT16U   cnt,
+                              NET_ERR     *p_err);
+
+void  NetIF_DevTxRdySignal   (NET_IF      *p_if);
+
+void  NetIF_TxDeallocTaskPost(CPU_INT08U  *p_buf_data,          /* Post to tx dealloc Q.                                */
+                              NET_ERR     *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+
+void               NetIF_Init                       (const  NET_TASK_CFG                 *p_rx_task_cfg,
+                                                     const  NET_TASK_CFG                 *p_tx_task_cfg,
+                                                            NET_ERR                      *p_err);
+
+void               NetIF_BufPoolInit                (       NET_IF                       *p_if,
+                                                            NET_ERR                      *p_err);
+
+
+NET_IF            *NetIF_Get                        (       NET_IF_NBR                    if_nbr,
+                                                            NET_ERR                      *p_err);
+
+NET_IF_NBR         NetIF_GetDflt                    (       void);
+
+
+void              *NetIF_GetTxDataAlignPtr          (       NET_IF_NBR                    if_nbr,
+                                                            void                         *p_data,
+                                                            NET_ERR                      *p_err);
+
+
+CPU_BOOLEAN        NetIF_IsValidHandler             (       NET_IF_NBR                    if_nbr,
+                                                            NET_ERR                      *p_err);
+
+
+CPU_BOOLEAN        NetIF_IsValidCfgdHandler         (       NET_IF_NBR                    if_nbr,
+                                                            NET_ERR                      *p_err);
+
+
+
+CPU_BOOLEAN        NetIF_IsEnHandler                (       NET_IF_NBR                    if_nbr,
+                                                            NET_ERR                      *p_err);
+
+CPU_BOOLEAN        NetIF_IsEnCfgdHandler            (       NET_IF_NBR                    if_nbr,
+                                                            NET_ERR                      *p_err);
+
+void               NetIF_AddrHW_GetHandler          (       NET_IF_NBR                    if_nbr,
+                                                            CPU_INT08U                   *p_addr_hw,
+                                                            CPU_INT08U                   *p_addr_len,
+                                                            NET_ERR                      *p_err);
+
+void               NetIF_AddrHW_SetHandler          (       NET_IF_NBR                    if_nbr,
+                                                            CPU_INT08U                   *p_addr_hw,
+                                                            CPU_INT08U                    addr_len,
+                                                            NET_ERR                      *p_err);
+
+CPU_BOOLEAN        NetIF_AddrHW_IsValidHandler      (       NET_IF_NBR                    if_nbr,
+                                                            CPU_INT08U                   *p_addr_hw,
+                                                            NET_ERR                      *p_err);
+
+
+#ifdef  NET_MCAST_MODULE_EN
+void               NetIF_AddrMulticastAdd           (       NET_IF_NBR                    if_nbr,
+                                                            CPU_INT08U                   *p_addr_protocol,
+                                                            CPU_INT08U                    addr_protocol_len,
+                                                            NET_PROTOCOL_TYPE             addr_protocol_type,
+                                                            NET_ERR                      *p_err);
+
+void               NetIF_AddrMulticastRemove        (       NET_IF_NBR                    if_nbr,
+                                                            CPU_INT08U                   *p_addr_protocol,
+                                                            CPU_INT08U                    addr_protocol_len,
+                                                            NET_PROTOCOL_TYPE             addr_protocol_type,
+                                                            NET_ERR                      *p_err);
+#endif
+#ifdef  NET_MCAST_TX_MODULE_EN
+void               NetIF_AddrMulticastProtocolToHW  (       NET_IF_NBR                    if_nbr,
+                                                            CPU_INT08U                   *p_addr_protocol,
+                                                            CPU_INT08U                    addr_protocol_len,
+                                                            NET_PROTOCOL_TYPE             addr_protocol_type,
+                                                            CPU_INT08U                   *p_addr_hw,
+                                                            CPU_INT08U                   *p_addr_hw_len,
+                                                            NET_ERR                      *p_err);
+#endif
+
+
+NET_MTU            NetIF_MTU_GetProtocol            (       NET_IF_NBR                    if_nbr,
+                                                            NET_PROTOCOL_TYPE             protocol,
+                                                            NET_IF_FLAG                   opt,
+                                                            NET_ERR                      *p_err);
+
+void               NetIF_MTU_SetHandler             (       NET_IF_NBR                    if_nbr,
+                                                            NET_MTU                       mtu,
+                                                            NET_ERR                      *p_err);
+
+CPU_INT16U         NetIF_GetPayloadRxMax            (       NET_IF_NBR                    if_nbr,
+                                                            NET_PROTOCOL_TYPE             protocol,
+                                                            NET_ERR                      *p_err);
+
+CPU_INT16U         NetIF_GetPayloadTxMax            (       NET_IF_NBR                    if_nbr,
+                                                            NET_PROTOCOL_TYPE             protocol,
+                                                            NET_ERR                      *p_err);
+
+CPU_INT16U         NetIF_GetPktSizeMin              (       NET_IF_NBR                    if_nbr,
+                                                            NET_ERR                      *p_err);
+
+CPU_INT16U         NetIF_GetPktSizeMax              (       NET_IF_NBR                    if_nbr,
+                                                            NET_ERR                      *p_err);
+
+void               NetIF_RxPktInc                   (       NET_IF_NBR                    if_nbr);
+
+CPU_BOOLEAN        NetIF_RxPktIsAvail               (       NET_IF_NBR                    if_nbr,
+                                                            NET_CTR                       rx_chk_nbr);
+
+void               NetIF_Tx                         (       NET_BUF                      *p_buf_list,
+                                                            NET_ERR                      *p_err);
+
+void               NetIF_TxSuspend                  (       NET_IF_NBR                    if_nbr);
+
+void               NetIF_TxIxDataGet                (       NET_IF_NBR                    if_nbr,
+                                                            CPU_INT32U                    data_size,
+                                                            CPU_INT16U                   *p_ix,
+                                                            NET_ERR                      *p_err);
+
+NET_IF_LINK_STATE  NetIF_LinkStateGetHandler        (       NET_IF_NBR   if_nbr,
+                                                            NET_ERR     *p_err);
+
+void               NetIF_LinkStateSubscribeHandler  (       NET_IF_NBR                    if_nbr,
+                                                            NET_IF_LINK_SUBSCRIBER_FNCT   fcnt,
+                                                            NET_ERR                      *p_err);
+
+void               NetIF_LinkStateUnSubscribeHandler(       NET_IF_NBR                    if_nbr,
+                                                            NET_IF_LINK_SUBSCRIBER_FNCT   fcnt,
+                                                            NET_ERR                      *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IF_CFG_MAX_NBR_IF
+#error  "NET_IF_CFG_MAX_NBR_IF                   not #define'd in 'net_cfg.h'"
+#error  "                                  [MUST be  >= NET_IF_NBR_MIN_VAL]  "
+
+#elif   (DEF_CHK_VAL_MIN(NET_IF_CFG_MAX_NBR_IF,       \
+                         NET_IF_NBR_MIN_VAL) != DEF_OK)
+#error  "NET_IF_CFG_MAX_NBR_IF             illegally #define'd in 'net_cfg.h'"
+#error  "                                  [MUST be  >= NET_IF_NBR_MIN_VAL]  "
+#endif
+
+
+                                                            /* Correctly configured in 'net_cfg_net.h'; DO NOT MODIFY.  */
+#ifndef  NET_IF_NBR_IF_TOT
+#error  "NET_IF_NBR_IF_TOT                       not #define'd in 'net_cfg_net.h'"
+#error  "                                  [MUST be  >= NET_IF_NBR_MIN]          "
+#error  "                                  [     &&  <= NET_IF_NBR_MAX]          "
+
+#elif   (DEF_CHK_VAL(NET_IF_NBR_IF_TOT,       \
+                     NET_IF_NBR_MIN,          \
+                     NET_IF_NBR_MAX) != DEF_OK)
+#error  "NET_IF_NBR_IF_TOT                 illegally #define'd in 'net_cfg_net.h'"
+#error  "                                  [MUST be  >= NET_IF_NBR_MIN]          "
+#error  "                                  [     &&  <= NET_IF_NBR_MAX]          "
+#endif
+
+
+
+
+#if    ((NET_IF_CFG_LOOPBACK_EN == DEF_DISABLED) && \
+        (NET_IF_CFG_ETHER_EN    == DEF_DISABLED) && \
+        (NET_IF_CFG_WIFI_EN     == DEF_DISABLED))
+#error  "NET_IF_CFG_LOOPBACK_EN &&                                           "
+#error  "NET_IF_CFG_ETHER_EN               illegally #define'd in 'net_cfg.h'"
+#error  "NET_IF_CFG_LOOPBACK_EN ||                                           "
+#error  "NET_IF_CFG_ETHER_EN               [MUST be  DEF_ENABLED ]           "
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_802x.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_802x.c
new file mode 100644
index 0000000..79e135a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_802x.c
@@ -0,0 +1,2872 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK INTERFACE LAYER
+*
+*                                                802x
+*
+* Filename      : net_if_802x.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 EHS
+*                 SR
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Supports Ethernet as described in RFC #894; supports IEEE 802 as described in RFC #1042.
+*
+*                 (2) Ethernet implementation conforms to RFC #1122, Section 2.3.3, bullets (a) & (b), but
+*                     does NOT implement bullet (c) :
+*
+*                     RFC #1122                  LINK LAYER                  October 1989
+*
+*                     2.3.3  ETHERNET (RFC-894) and IEEE 802 (RFC-1042) ENCAPSULATION
+*
+*                            Every Internet host connected to a 10Mbps Ethernet cable :
+*
+*                            (a) MUST be able to send and receive packets using RFC-894 encapsulation;
+*
+*                            (b) SHOULD be able to receive RFC-1042 packets, intermixed with RFC-894 packets; and
+*
+*                            (c) MAY be able to send packets using RFC-1042 encapsulation.
+*
+*                 (3) REQUIREs the following network protocol files in network directories :
+*
+*                     (a) Network Interface Layer located in the following network directory :
+*
+*                             \\IF\
+*
+*                     (b) Address Resolution Protocol    Layer located in the following network directory :
+*
+*                             \\
+*
+*                         See also 'net_arp.h  Note #1'.
+*
+*                              where
+*                                          directory path for network protocol suite
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_IF_MODULE_802x
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_if_802x.h"
+#include  "../Source/net_cfg_net.h"
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_ipv4.h"
+#include  "../IP/IPv4/net_icmpv4.h"
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ndp.h"
+#include  "../IP/IPv6/net_ipv6.h"
+#endif
+
+#include  "net_if.h"
+#include  "../Source/net.h"
+#include  "../Source/net_util.h"
+#include  "../Source/net_ctr.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IF_802x_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            802x DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- ETHER FRAME TYPES ----------------- */
+#define  NET_IF_802x_FRAME_TYPE_IPv4                  0x0800u
+#define  NET_IF_802x_FRAME_TYPE_IPv6                  0x86DDu
+#define  NET_IF_802x_FRAME_TYPE_ARP                   0x0806u
+#define  NET_IF_802x_FRAME_TYPE_RARP                  0x8035u   /* See 'net_def.h  NETWORK PROTOCOL TYPES  Note #1'.    */
+
+
+/*
+*********************************************************************************************************
+*                                          IEEE 802 DEFINES
+*
+* Note(s) : (1) SNAP 'Organizational Unique Identifier' (OUI) abbreviated to 'SNAP' for some SNAP OUI
+*               codes to enforce ANSI-compliance of 31-character symbol length uniqueness.
+*
+*           (2) Default SNAP 'Organizational Unique Identifier' (OUI) IEEE 802.2 frame type is ALWAYS
+*               Ethernet frame type (see 'IEEE 802 HEADER / FRAME  Note #1').
+*********************************************************************************************************
+*/
+
+#define  NET_IF_IEEE_802_FRAME_LEN_MAX                  (NET_IF_MTU_IEEE_802 + NET_IF_HDR_SIZE_BASE_IEEE_802)
+
+                                                                /* ------- IEEE 802.2 LOGICAL LINK CONTROL (LLC) ------ */
+#define  NET_IF_IEEE_802_LLC_DSAP                       0xAAu
+#define  NET_IF_IEEE_802_LLC_SSAP                       0xAAu
+#define  NET_IF_IEEE_802_LLC_CTRL                       0x03u
+
+                                                                /* --- IEEE 802.2 SUB-NETWORK ACCESS PROTOCOL (SNAP) -- */
+#define  NET_IF_IEEE_802_SNAP_CODE_ETHER            0x000000u   /*    Dflt  SNAP org code (Ether) [see Note #2].        */
+#define  NET_IF_IEEE_802_SNAP_CODE_00                   0x00u   /*    Dflt  SNAP org code, octet #00.                   */
+#define  NET_IF_IEEE_802_SNAP_CODE_01                   0x00u   /*    Dflt  SNAP org code, octet #01.                   */
+#define  NET_IF_IEEE_802_SNAP_CODE_02                   0x00u   /*    Dflt  SNAP org code, octet #02.                   */
+
+#define  NET_IF_IEEE_802_SNAP_TYPE_IPv4                  NET_IF_802x_FRAME_TYPE_IPv4
+#define  NET_IF_IEEE_802_SNAP_TYPE_IPv6                  NET_IF_802x_FRAME_TYPE_IPv6
+#define  NET_IF_IEEE_802_SNAP_TYPE_ARP                   NET_IF_802x_FRAME_TYPE_ARP
+#define  NET_IF_IEEE_802_SNAP_TYPE_RARP                  NET_IF_802x_FRAME_TYPE_RARP
+
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK INTERFACE HEADER DEFINES
+*
+* Note(s) : (1) NET_IF_HDR_SIZE_ETHER_MAX's ideal #define'tion :
+*
+*                   (A) max( Ether Hdr, IEEE 802 Hdr )
+*
+*               (a) However, since NET_IF_HDR_SIZE_ETHER_MAX is used ONLY for network transmit & IEEE 802
+*                   is NEVER transmitted (see 'net_if_ether.h  Note #2'), NET_IF_HDR_SIZE_ETHER_MAX  MUST
+*                   be #define'd with hard-coded knowledge that Ethernet is the only supported frame
+*                   encapsulation for network transmit.
+*
+*           (2) The following network interface value MUST be pre-#define'd in 'net_def.h' PRIOR to
+*               'net_cfg.h' so that the developer can configure the network interface for the correct
+*               network interface link layer values (see 'net_def.h  NETWORK INTERFACE LAYER DEFINES'
+*               & 'net_cfg_net.h  NETWORK INTERFACE LAYER CONFIGURATION  Note #4') :
+*
+*               (a) NET_IF_HDR_SIZE_ETHER                 14
+*********************************************************************************************************
+*/
+
+#define  NET_IF_HDR_SIZE_BASE_ETHER                       14    /* Ethernet base hdr size.                              */
+#define  NET_IF_HDR_SIZE_BASE_IEEE_802                     8    /* IEEE 802 base hdr size.                              */
+
+#if 0                                                           /* See Note #2a.                                        */
+#define  NET_IF_HDR_SIZE_ETHER                           NET_IF_HDR_SIZE_BASE_ETHER
+#endif
+#define  NET_IF_HDR_SIZE_IEEE_802                       (NET_IF_HDR_SIZE_BASE_ETHER + NET_IF_HDR_SIZE_BASE_IEEE_802)
+
+#define  NET_IF_HDR_SIZE_ETHER_MIN              (DEF_MIN(NET_IF_HDR_SIZE_ETHER, NET_IF_HDR_SIZE_IEEE_802))
+#define  NET_IF_HDR_SIZE_ETHER_MAX                       NET_IF_HDR_SIZE_ETHER
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                                /* ------------ 802x ADDRs ------------ */
+static  const  CPU_INT08U  NetIF_802x_AddrNull[NET_IF_802x_ADDR_SIZE] = {
+    0x00u,
+    0x00u,
+    0x00u,
+    0x00u,
+    0x00u,
+    0x00u
+};
+
+static  const  CPU_INT08U  NetIF_802x_AddrBroadcast[NET_IF_802x_ADDR_SIZE] = {
+    0xFFu,
+    0xFFu,
+    0xFFu,
+    0xFFu,
+    0xFFu,
+    0xFFu
+};
+
+#ifdef  NET_MCAST_MODULE_EN
+static  const  CPU_INT08U  NetIF_802x_AddrMulticastMask[NET_IF_802x_ADDR_SIZE] = {
+    0x01u,
+    0x00u,
+    0x00u,
+    0x00u,
+    0x00u,
+    0x00u
+};
+#endif
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+#ifdef  NET_IPv4_MODULE_EN
+static  const  CPU_INT08U  NetIF_802x_AddrMulticastBaseIPv4[NET_IF_802x_ADDR_SIZE] = {
+    0x01u,
+    0x00u,
+    0x5Eu,
+    0x00u,
+    0x00u,
+    0x00u
+};
+#endif
+#endif
+
+#ifdef  NET_MCAST_MODULE_EN
+#ifdef  NET_IPv6_MODULE_EN
+static  const  CPU_INT08U  NetIF_802x_AddrMulticastBaseIPv6[NET_IF_802x_ADDR_SIZE] = {
+    0x33u,
+    0x33u,
+    0x00u,
+    0x00u,
+    0x00u,
+    0x00u
+};
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                             NETWORK INTERFACE HEADER / FRAME DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------- NET 802x IF DATA ----------------- */
+typedef  struct  net_if_data_802x {
+    CPU_INT08U  HW_Addr[NET_IF_802x_ADDR_SIZE];                 /* 802x IF's dev hw addr.                               */
+} NET_IF_DATA_802x;
+
+
+/*
+*********************************************************************************************************
+*                                 ETHERNET HEADER / FRAME DATA TYPES
+*
+* Note(s) : (1) Frame 'Data' buffer CANNOT be declared to force word-alignment.  'Data' buffer MUST immediately
+*               follow frame 'Hdr' since Ethernet frames are contiguous, non-aligned data packets.
+*
+*           (2) 'Data' declared with 1 entry; prevents removal by compiler optimization.
+*
+*           (3) Frame CRC's are computed/validated by an Ethernet device.  NO software CRC is handled for
+*               receive or transmit.
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------- NET IF ETHER HDR ----------------- */
+typedef  struct  net_if_hdr_ether {
+    CPU_INT08U        AddrDest[NET_IF_802x_ADDR_SIZE];          /* MAC dest addr.                                       */
+    CPU_INT08U        AddrSrc[NET_IF_802x_ADDR_SIZE];           /* MAC src  addr.                                       */
+    CPU_INT16U        FrameType;                                /* Frame type.                                          */
+} NET_IF_HDR_ETHER;
+
+
+/*
+*********************************************************************************************************
+*                                 IEEE 802 HEADER / FRAME DATA TYPES
+*
+* Note(s) : (1) Header 'SNAP_OrgCode' defines the SNAP 'Organizational Unique Identifier' (OUI).  The OUI
+*               indicates the various organization/vendor/manufacturer with each organization then defining
+*               their respective frame types.
+*
+*               However, the default SNAP OUI indicates Ethernet frame types & is ALWAYS used.  ALL other
+*               OUI's are discarded as invalid.
+*
+*               See also 'IEEE 802 DEFINES  Notes #1 & #2'.
+*
+*           (2) Frame 'Data' buffer CANNOT be declared to force word-alignment.  'Data' buffer MUST immediately
+*               follow frame 'Hdr' since Ethernet frames are contiguous, non-aligned data packets.
+*
+*           (3) 'Data' declared with 1 entry; prevents removal by compiler optimization.
+*
+*           (4) Frame CRC's are computed/validated by an Ethernet device.  NO software CRC is handled for
+*               receive or transmit.
+*********************************************************************************************************
+*/
+
+                                                                /* --------------- NET IF IEEE 802 HDR ---------------- */
+typedef  struct  net_if_hdr_ieee_802 {
+    CPU_INT08U           AddrDest[NET_IF_802x_ADDR_SIZE];       /* IEEE 802.3 dest  addr.                               */
+    CPU_INT08U           AddrSrc[NET_IF_802x_ADDR_SIZE];        /* IEEE 802.3 src   addr.                               */
+    CPU_INT16U           FrameLen;                              /* IEEE 802.3 frame len.                                */
+
+                                                                /* ------ IEEE 802.2 LOGICAL LINK CONTROL (LLC) ------- */
+    CPU_INT08U           LLC_DSAP;                              /* Dest Serv Access Pt.                                 */
+    CPU_INT08U           LLC_SSAP;                              /* Src  Serv Access Pt.                                 */
+    CPU_INT08U           LLC_Ctrl;                              /* Ctrl Field.                                          */
+
+                                                                /* -- IEEE 802.2 SUB-NETWORK ACCESS PROTOCOL (SNAP) --- */
+    CPU_INT08U           SNAP_OrgCode[NET_IF_IEEE_802_SNAP_CODE_SIZE];  /* Org code (see Note #1).                      */
+    CPU_INT16U           SNAP_FrameType;                                /* IEEE 802.2 frame type.                       */
+} NET_IF_HDR_IEEE_802;
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                                    /* ----------- RX FNCTS ----------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIF_802x_RxPktValidateBuf      (NET_BUF_HDR            *p_buf_hdr,
+                                                NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                                NET_ERR                *p_err);
+#endif
+
+static  void  NetIF_802x_RxPktFrameDemux       (NET_IF                 *p_if,
+                                                NET_BUF                *p_buf,
+                                                NET_BUF_HDR            *p_buf_hdr,
+                                                NET_IF_HDR_802x        *p_if_hdr,
+                                                NET_CTR_IF_802x_STATS  *p_ctrs_stat,
+                                                NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                                NET_ERR                *p_err);
+
+static  void  NetIF_802x_RxPktFrameDemuxEther  (NET_IF                 *p_if,
+                                                NET_BUF_HDR            *p_buf_hdr,
+                                                NET_IF_HDR_802x        *p_if_hdr,
+                                                NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                                NET_ERR                *p_err);
+
+static  void  NetIF_802x_RxPktFrameDemuxIEEE802(NET_IF                 *p_if,
+                                                NET_BUF_HDR            *p_buf_hdr,
+                                                NET_IF_HDR_802x        *p_if_hdr,
+                                                NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                                NET_ERR                *p_err);
+
+static  void  NetIF_802x_RxPktDiscard          (NET_BUF                *p_buf,
+                                                NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                                NET_ERR                *p_err);
+
+
+                                                                                    /* ----------- TX FNCTS ----------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIF_802x_TxPktValidate         (NET_BUF_HDR            *p_buf_hdr,
+                                                NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                                NET_ERR                *p_err);
+#endif
+
+static  void  NetIF_802x_TxPktPrepareFrame     (NET_IF                 *p_if,
+                                                NET_BUF                *p_buf,
+                                                NET_BUF_HDR            *p_buf_hdr,
+                                                NET_CTR_IF_802x_STATS  *p_ctrs_stat,
+                                                NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                                NET_ERR                *p_err);
+
+static  void  NetIF_802x_TxPktDiscard          (NET_BUF                *p_buf,
+                                                NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                                NET_ERR                *p_err);
+
+static  void  NetIF_802x_TxIxDataGet           (CPU_INT16U             *p_ix,
+                                                NET_ERR                *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_802x_Init()
+*
+* Description : (1) Initialize 802x Module :
+*
+*                   Module initialization NOT yet required/implemented
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     802x network interface module
+*                                                                       successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_Init (NET_ERR  *p_err)
+{
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_802x_Rx()
+*
+* Description : (1) Process received data packets & forward to network protocol layers :
+*
+*                   (a) Update link status
+*                   (b) Validate packet received
+*                   (c) Demultiplex packet to higher-layer protocols
+*
+*
+* Argument(s) : p_if            Pointer to an 802x network interface.
+*               ----            Argument validated in NetIF_RxHandler().
+*
+*               p_buf           Pointer to a network buffer that received a packet.
+*               -----           Argument checked   in NetIF_Ether_Rx(),
+*                                                     NetIF_WiFi_Rx().
+*
+*               p_ctrs_stat     Pointer to an 802x network interface statistic counters.
+*
+*               p_ctrs_err      Pointer to an 802x network interface error     counters.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 802x packet successfully received & processed.
+*                               NET_ERR_FAULT_NULL_PTR             Argument(s) passed a NULL pointer.
+*
+*                                                               -- RETURNED BY NetIF_802x_RxPktDiscard() : ---
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_Rx(),
+*               NetIF_WiFi_Rx().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) If a network interface receives a packet, its physical link must be 'UP' & the
+*                   interface's physical link state is set accordingly.
+*
+*                   (a) An attempt to check for link state is made after an interface has been started.
+*                       However, many physical layer devices, such as Ethernet physical layers require
+*                       several seconds for Auto-Negotiation to complete before the link becomes
+*                       established.  Thus the interface link flag is not updated until the link state
+*                       timer expires & one or more attempts to check for link state have been completed.
+*
+*               (3) Network buffer already freed by higher layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_Rx (NET_IF                 *p_if,
+                     NET_BUF                *p_buf,
+                     NET_CTR_IF_802x_STATS  *p_ctrs_stat,
+                     NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                     NET_ERR                *p_err)
+{
+    NET_BUF_HDR      *p_buf_hdr;
+    NET_IF_HDR_802x  *p_if_hdr;
+    CPU_BOOLEAN       size_valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------ VALIDATE PTRS ------------------- */
+#if (NET_CTR_CFG_STAT_EN        == DEF_ENABLED)
+    if (p_ctrs_stat == (NET_CTR_IF_802x_STATS *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+#if (NET_CTR_CFG_ERR_EN         == DEF_ENABLED)
+    if (p_ctrs_err == (NET_CTR_IF_802x_ERRS *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+#endif
+
+
+                                                                /* ---------------- UPDATE LINK STATUS ---------------- */
+    if (p_if->En != DEF_YES) {
+        NetIF_802x_RxPktDiscard(p_buf, p_ctrs_err, p_err);
+        return;
+    }
+
+    p_if->Link = NET_IF_LINK_UP;                                /* See Note #2.                                         */
+
+
+                                                                /* ------------ VALIDATE RX'D 802x IF PKT ------------- */
+    p_buf_hdr = &p_buf->Hdr;
+    size_valid = NetIF_802x_PktSizeIsValid(p_buf_hdr->TotLen);
+    if (size_valid != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvFrameCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->RxInvFrameCtr);
+        NetIF_802x_RxPktDiscard(p_buf, p_ctrs_err, p_err);
+        return;
+    }
+
+    NET_CTR_STAT_INC(Net_StatCtrs.IFs.IFs_802xCtrs.RxPktCtr);
+    NET_CTR_STAT_INC(p_ctrs_stat->RxPktCtr);
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetIF_802x_RxPktValidateBuf(p_buf_hdr, p_ctrs_err, p_err);  /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetIF_802x_RxPktDiscard(p_buf, p_ctrs_err, p_err);
+             return;
+    }
+#endif
+
+
+                                                                /* -------------- DEMUX RX'D 802x IF PKT -------------- */
+    p_if_hdr = (NET_IF_HDR_802x *)&p_buf->DataPtr[p_buf_hdr->IF_HdrIx];
+    NetIF_802x_RxPktFrameDemux(p_if,                            /* Demux pkt to appropriate net protocol.               */
+                               p_buf,
+                               p_buf_hdr,
+                               p_if_hdr,
+                               p_ctrs_stat,
+                               p_ctrs_err,
+                               p_err);
+
+
+                                                                /* ----------------- UPDATE RX STATS ------------------ */
+    switch (*p_err) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_ARP_ERR_NONE:
+#endif
+#ifdef  NET_NDP_MODULE_EN
+        case NET_NDP_ERR_NONE:
+#endif
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_IPv4_ERR_NONE:
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_IPv6_ERR_NONE:
+#endif
+            *p_err = NET_IF_ERR_NONE;
+             break;
+
+
+        case NET_ERR_RX:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxPktDisCtr);
+             NET_CTR_ERR_INC(p_ctrs_err->RxPktDisCtr);
+                                                                /* Rtn err from NetIF_802x_RxPktFrameDemux().           */
+             return;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_IF_ERR_INVALID_ADDR_DEST:
+        case NET_IF_ERR_INVALID_ADDR_SRC:
+        case NET_IF_ERR_INVALID_LEN_FRAME:
+        case NET_IF_ERR_INVALID_ETHER_TYPE:
+        case NET_IF_ERR_INVALID_LLC_DSAP:
+        case NET_IF_ERR_INVALID_LLC_SSAP:
+        case NET_IF_ERR_INVALID_LLC_CTRL:
+        case NET_IF_ERR_INVALID_SNAP_CODE:
+        case NET_IF_ERR_INVALID_SNAP_TYPE:
+        default:
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.IFs_802xCtrs.RxPktDisCtr);
+             NET_CTR_STAT_INC(p_ctrs_stat->RxPktDisCtr);
+             NetIF_802x_RxPktDiscard(p_buf, p_ctrs_err, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetIF_802x_Tx()
+*
+* Description : (1) Prepare data packets from network protocol layers for transmit :
+*
+*                   (a) Validate packet to transmit
+*                   (b) Prepare data packets with appropriate Ethernet frame format
+*
+*
+* Argument(s) : p_if            Pointer to an 802x network interface.
+*               ----            Argument validated in NetIF_TxHandler().
+*
+*               p_buf           Pointer to a network buffer with data packet to transmit.
+*               -----           Argument checked   in NetIF_Ether_Tx(),
+*                                                     NetIF_WiFi_Tx().
+*
+*               p_ctrs_stat     Pointer to an 802x network interface statistic counters.
+*
+*               p_ctrs_err      Pointer to an 802x network interface error     counters.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 802x Packet successfully prepared for transmission.
+*                               NET_IF_ERR_TX_ADDR_PEND         802x Packet successfully prepared & queued for
+*                                                                   later transmission.
+*                               NET_ERR_FAULT_NULL_PTR             Argument(s) passed a NULL pointer.
+*
+*                                                               ----- RETURNED BY NetIF_802x_TxPktDiscard() : -----
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_Tx(),
+*               NetIF_WiFi_Tx().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_Tx (NET_IF                 *p_if,
+                     NET_BUF                *p_buf,
+                     NET_CTR_IF_802x_STATS  *p_ctrs_stat,
+                     NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                     NET_ERR                *p_err)
+{
+    NET_IF_HDR_ETHER  *p_if_hdr_ether;
+    NET_BUF_HDR       *p_buf_hdr;
+    CPU_INT16U         frame_type;
+
+
+    p_buf_hdr = &p_buf->Hdr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------ VALIDATE PTRS ------------------- */
+#if (NET_CTR_CFG_STAT_EN        == DEF_ENABLED)
+    if (p_ctrs_stat == (NET_CTR_IF_802x_STATS *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    if (p_ctrs_err == (NET_CTR_IF_802x_ERRS *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+                                                                /* --------------- VALIDATE 802x TX PKT --------------- */
+    NetIF_802x_TxPktValidate(p_buf_hdr, p_ctrs_err, p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             break;
+
+
+        case NET_IF_ERR_INVALID_LEN_DATA:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_ERR_INVALID_PROTOCOL:
+        default:
+             NetIF_802x_TxPktDiscard(p_buf, p_ctrs_err, p_err);
+             return;
+    }
+#endif
+
+
+                                                                /* -------------- PREPARE 802x TX FRAME --------------- */
+    NetIF_802x_TxPktPrepareFrame(p_if,
+                                 p_buf,
+                                 p_buf_hdr,
+                                 p_ctrs_stat,
+                                 p_ctrs_err,
+                                 p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_TX_RDY:
+        case NET_IF_ERR_TX_BROADCAST:
+             break;
+
+
+        case NET_IF_ERR_TX_ADDR_REQ:
+        case NET_IF_ERR_TX_MULTICAST:
+             p_if_hdr_ether = (NET_IF_HDR_ETHER *)&p_buf->DataPtr[p_buf_hdr->IF_HdrIx];
+             frame_type     =  NET_UTIL_VAL_GET_NET_16(&p_if_hdr_ether->FrameType);
+             switch (frame_type) {
+#ifdef  NET_IPv4_MODULE_EN
+                 case NET_IF_802x_FRAME_TYPE_ARP:
+                 case NET_IF_802x_FRAME_TYPE_IPv4:
+#ifdef  NET_ARP_MODULE_EN
+                      NetARP_CacheHandler(p_buf, p_err);
+#else
+                     *p_err = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+                      break;
+#endif
+
+
+#ifdef  NET_IPv6_MODULE_EN
+                 case NET_IF_802x_FRAME_TYPE_IPv6:
+#ifdef  NET_NDP_MODULE_EN
+                      NetNDP_NeighborCacheHandler(p_buf, p_err);
+#else
+                     *p_err = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+                      break;
+#endif
+
+
+                 default:
+                     *p_err = NET_IF_ERR_INVALID_PROTOCOL;
+                      return;
+                    }
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_LEN:
+        default:
+             NetIF_802x_TxPktDiscard(p_buf, p_ctrs_err, p_err);
+             return;
+    }
+
+
+                                                                /* ----------------- UPDATE TX STATS ------------------ */
+    switch (*p_err) {                                           /* Chk err from                       ...               */
+        case NET_IF_ERR_TX_RDY:                                 /* ... NetIF_802x_TxPktPrepareFrame() ...               */
+        case NET_IF_ERR_TX_BROADCAST:
+        case NET_ARP_ERR_CACHE_RESOLVED:                        /* ... or NetARP_CacheHandler().                        */
+        case NET_NDP_ERR_NEIGHBOR_CACHE_STALE:
+        case NET_NDP_ERR_NEIGHBOR_CACHE_RESOLVED:
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.IFs_802xCtrs.TxPktCtr);
+             NET_CTR_STAT_INC(p_ctrs_stat->TxPktCtr);
+            *p_err = NET_IF_ERR_NONE;
+             break;
+
+
+        case NET_ARP_ERR_CACHE_PEND:
+        case NET_NDP_ERR_NEIGHBOR_CACHE_PEND:
+            *p_err = NET_IF_ERR_TX_ADDR_PEND;                   /* Tx pending on hw addr; will tx when addr resolved.   */
+             return;
+
+        default:
+             NetIF_802x_TxPktDiscard(p_buf, p_ctrs_err, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_802x_AddrHW_Get()
+*
+* Description : Get an 802x interface's hardware address.
+*
+* Argument(s) : p_if        Pointer to an 802x network interface.
+*               ----        Argument validated in NetIF_AddrHW_GetHandler().
+*
+*               p_addr_hw   Pointer to variable that will receive the hardware address (see Note #1).
+*               ---------   Argument checked   in NetIF_AddrHW_GetHandler().
+*
+*               p_addr_len  Pointer to a variable to ... :
+*               ----------
+*                               (a) Pass the length of the address buffer pointed to by 'paddr_hw'.
+*                               (b) (1) Return the actual size of the protocol address, if NO error(s);
+*                                   (2) Return 0,                                       otherwise.
+*
+*                           Argument checked in NetIF_AddrHW_GetHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 802x interface's hardware address
+*                                                                   successfully returned.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrHW_GetHandler() via 'pif_api->AddrHW_Get()'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) An 802x hardware address is also known as a MAC (Media Access Control) address.
+*
+*                   (b) The hardware address is returned in network-order; i.e. the pointer to the hardware
+*                       address points to the highest-order octet.
+*
+*               (2) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_AddrHW_Get (NET_IF      *p_if,
+                             CPU_INT08U  *p_addr_hw,
+                             CPU_INT08U  *p_addr_len,
+                             NET_ERR     *p_err)
+{
+    NET_IF_DATA_802x  *p_if_data;
+    CPU_INT08U         addr_len;
+
+
+      addr_len = *p_addr_len;
+   *p_addr_len =  0u;                                           /* Init len for err (see Note #2).                      */
+
+                                                                /* ------------ VALIDATE 802x HW ADDR LEN ------------- */
+    if (addr_len < NET_IF_802x_ADDR_SIZE) {
+       *p_err    = NET_IF_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+
+                                                                /* ----------------- GET 802x HW ADDR ----------------- */
+    p_if_data = (NET_IF_DATA_802x *)p_if->IF_Data;
+    NET_UTIL_VAL_COPY(p_addr_hw,
+                     &p_if_data->HW_Addr[0],
+                      NET_IF_802x_ADDR_SIZE);
+
+   *p_addr_len = NET_IF_802x_ADDR_SIZE;
+   *p_err      = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_802x_AddrHW_Set()
+*
+* Description : Set an 802x interface's hardware address.
+*
+* Argument(s) : p_if        Pointer to an 802x network interface.
+*               ----        Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               p_addr_hw   Pointer to hardware address (see Note #1).
+*               ---------   Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_len    Length  of hardware address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 802x interface's hardware address
+*                                                                   successfully set.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'paddr_hw' passed a NULL pointer.
+*                               NET_IF_ERR_INVALID_ADDR         Invalid hardware address.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrHW_SetHandler() via 'pif_api->AddrHW_Set()'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) An 802x hardware address is also known as a MAC (Media Access Control) address.
+*
+*                   (b) The hardware address MUST be in network-order; i.e. the pointer to the hardware
+*                       address MUST point to the highest-order octet.
+*
+*               (2) The interface MUST be stopped BEFORE setting a new hardware address which does NOT
+*                   take effect until the interface is re-started.
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_AddrHW_Set (NET_IF      *p_if,
+                             CPU_INT08U  *p_addr_hw,
+                             CPU_INT08U   addr_len,
+                             NET_ERR     *p_err)
+{
+    NET_IF_DATA_802x  *p_if_data;
+    CPU_BOOLEAN        valid;
+
+                                                                /* -------------- VALIDATE 802x HW ADDR --------------- */
+    if (addr_len != NET_IF_802x_ADDR_SIZE) {
+       *p_err = NET_IF_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+
+    valid = NetIF_802x_AddrHW_IsValid(p_if, p_addr_hw);
+    if (valid != DEF_YES) {
+       *p_err = NET_IF_ERR_INVALID_ADDR;
+        return;
+    }
+
+                                                                /* ----------------- SET 802x HW ADDR ----------------- */
+    p_if_data = (NET_IF_DATA_802x *)p_if->IF_Data;
+    NET_UTIL_VAL_COPY(&p_if_data->HW_Addr[0],                   /* Set new hw addr (see Note #2).                       */
+                       p_addr_hw,
+                       NET_IF_802x_ADDR_SIZE);
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_802x_AddrHW_IsValid()
+*
+* Description : (1) Validate an 802x hardware address which MUST NOT be one of the following :
+*
+*                   (a) 802x broadcast address               See RFC #894, Section 'Address Mappings :
+*                                                                   Broadcast Address'
+*
+*
+* Argument(s) : p_if        Pointer to an 802x network interface.
+*               ----        Argument validated in NetIF_AddrHW_IsValidHandler(),
+*                                                 NetIF_Ether_AddrHW_Set(),
+*                                                 NetIF_Ether_RxPktFrameDemux(),
+*                                                 NetIF_WiFi_AddrHW_Set(),
+*                                                 NetIF_WiFi_RxPktFrameDemux().
+*
+*               p_addr_hw   Pointer to an 802x hardware address (see Note #1).
+*               ---------   Argument checked   in NetIF_AddrHW_IsValidHandler(),
+*                                                 NetIF_Ether_AddrHW_Set(),
+*                                                 NetIF_WiFi_AddrHW_Set();
+*                                    validated in NetIF_802x_RxPktFrameDemux().
+*
+* Return(s)   : DEF_YES, if 802x hardware address valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIF_AddrHW_IsValidHandler() via 'pif_api->AddrHW_IsValid()',
+*               NetIF_Ether_AddrHW_Set(),
+*               NetIF_Ether_RxPktFrameDemux(),
+*               NetIF_WiFi_AddrHW_Set(),
+*               NetIF_WiFi_RxPktFrameDemux().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) An 802x hardware address is also known as a MAC (Media Access Control) address.
+*
+*                   (b) The hardware address MUST be in network-order; i.e. the pointer to the hardware
+*                       address MUST point to the highest-order octet.
+*
+*                   (c) The size of the memory buffer that contains the 802x hardware address MUST be
+*                       greater than or equal to NET_IF_802x_ADDR_SIZE.
+*
+*                   (d) 802x hardware address memory buffer array accessed by octets.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_802x_AddrHW_IsValid (NET_IF      *p_if,
+                                        CPU_INT08U  *p_addr_hw)
+{
+    CPU_BOOLEAN  addr_null;
+    CPU_BOOLEAN  addr_broadcast;
+    CPU_BOOLEAN  addr_valid;
+
+
+   (void)&p_if;                                                 /* Prevent 'variable unused' compiler warning.          */
+
+                                                                /* ------------------- VALIDATE PTR ------------------- */
+    if (p_addr_hw == (CPU_INT08U *)0) {
+        switch (p_if->Type) {
+#ifdef  NET_IF_ETHER_MODULE_EN
+            case NET_IF_TYPE_ETHER:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IFs.Ether.IF_802xCtrs.NullPtrCtr);
+                 break;
+#endif
+
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+            case NET_IF_TYPE_WIFI:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IFs.WiFi.IF_802xCtrs.NullPtrCtr);
+                 break;
+#endif
+
+            default:
+                 break;
+        }
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.NullPtrCtr);
+        return (DEF_NO);
+    }
+
+                                                                /* -------------- VALIDATE 802x HW ADDR --------------- */
+    addr_null      = Mem_Cmp((void     *) p_addr_hw,
+                             (void     *)&NetIF_802x_AddrNull[0],
+                             (CPU_SIZE_T) NET_IF_802x_ADDR_SIZE);
+    addr_broadcast = Mem_Cmp((void     *) p_addr_hw,
+                             (void     *)&NetIF_802x_AddrBroadcast[0],
+                             (CPU_SIZE_T) NET_IF_802x_ADDR_SIZE);
+
+    addr_valid     = ((addr_null      == DEF_YES) ||
+                      (addr_broadcast == DEF_YES)) ? DEF_NO : DEF_YES;
+
+    return (addr_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIF_802x_AddrMulticastAdd()
+*
+* Description : Add a multicast address to an 802x interface.
+*
+* Argument(s) : p_if                    Pointer to an 802x network interface to add address.
+*               ----                    Argument validated in NetIF_AddrMulticastAdd().
+*
+*               p_addr_protocol         Pointer to a multicast protocol address to add (see Note #1).
+*               ---------------         Argument checked   in NetIF_AddrMulticastAdd().
+*
+*               addr_protocol_len       Length of the protocol address, in octets.
+*
+*               addr_protocol_type      Protocol address type.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                              NET_IF_ERR_NONE                  Network hardware address successfully added.
+*                              NET_ERR_FAULT_NULL_FNCT             Invalid NULL function pointer.*
+*                              NET_ERR_FAULT_FEATURE_DIS               Disabled     API function.
+*                              NET_ERR_FAULT_NULL_OBJ           Invalid/NULL API configuration.
+*
+*                                                               - RETURNED BY NetIF_802x_AddrMulticastProtocolToHW() : -
+*                              NET_IF_ERR_INVALID_ADDR_LEN      Invalid hardware/protocol
+*                                                                   address length.
+*                              NET_IF_ERR_INVALID_PROTOCOL      Invalid network protocol.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrMulticastAdd() via 'pif_api->AddrMulticastAdd()'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) The multicast protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_AddrMulticastAdd (NET_IF             *p_if,
+                                   CPU_INT08U         *p_addr_protocol,
+                                   CPU_INT08U          addr_protocol_len,
+                                   NET_PROTOCOL_TYPE   addr_protocol_type,
+                                   NET_ERR            *p_err)
+{
+#ifdef  NET_MCAST_MODULE_EN
+    NET_DEV_API  *p_dev_api;
+    CPU_INT08U    addr_hw[NET_IF_802x_ADDR_SIZE];
+    CPU_INT08U    addr_hw_len;
+
+
+    switch (addr_protocol_type) {
+        case NET_PROTOCOL_TYPE_IP_V4:
+             addr_hw_len = sizeof(addr_hw);
+             NetIF_802x_AddrMulticastProtocolToHW((NET_IF          *) p_if,
+                                                  (CPU_INT08U      *) p_addr_protocol,
+                                                  (CPU_INT08U       ) addr_protocol_len,
+                                                  (NET_PROTOCOL_TYPE) addr_protocol_type,
+                                                  (CPU_INT08U      *)&addr_hw[0],
+                                                  (CPU_INT08U      *)&addr_hw_len,
+                                                  (NET_ERR         *) p_err);
+             if (*p_err != NET_IF_ERR_NONE) {
+                  return;
+             }
+             break;
+
+        case NET_PROTOCOL_TYPE_IP_V6:
+             addr_hw_len = sizeof(addr_hw);
+             NetIF_802x_AddrMulticastProtocolToHW((NET_IF          *) p_if,
+                                                  (CPU_INT08U      *) p_addr_protocol,
+                                                  (CPU_INT08U       ) addr_protocol_len,
+                                                  (NET_PROTOCOL_TYPE) addr_protocol_type,
+                                                  (CPU_INT08U      *)&addr_hw[0],
+                                                  (CPU_INT08U      *)&addr_hw_len,
+                                                  (NET_ERR         *) p_err);
+             if (*p_err != NET_IF_ERR_NONE) {
+                  return;
+             }
+             break;
+        default:
+            *p_err = NET_IF_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    p_dev_api = (NET_DEV_API *)p_if->Dev_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_dev_api == (void *)0) {
+       *p_err = NET_ERR_FAULT_NULL_OBJ;
+        return;
+    }
+    if (p_dev_api->AddrMulticastAdd == (void (*)(NET_IF     *,
+                                                 CPU_INT08U *,
+                                                 CPU_INT08U  ,
+                                                 NET_ERR    *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+                                                                /* Add multicast addr to dev.                           */
+    p_dev_api->AddrMulticastAdd((NET_IF     *) p_if,
+                                (CPU_INT08U *)&addr_hw[0],
+                                (CPU_INT08U  ) addr_hw_len,
+                                (NET_ERR    *) p_err);
+
+
+#else
+   (void)&p_if;                                                 /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_addr_protocol;
+   (void)&addr_protocol_len;
+   (void)&addr_protocol_type;
+
+
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_802x_AddrMulticastRemove()
+*
+* Description : Remove a multicast address from an 802x interface.
+*
+* Argument(s) : p_if                    Pointer to an 802x network interface to remove address.
+*               ----                    Argument validated in NetIF_AddrMulticastRemove().
+*
+*               p_addr_protocol         Pointer to a multicast protocol address to remove (see Note #1).
+*               ---------------         Argument checked   in NetIF_AddrMulticastRemove().
+*
+*               addr_protocol_len       Length of the protocol address, in octets.
+*
+*               addr_protocol_type      Protocol address type.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network hardware address successfully removed.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_FEATURE_DIS              Disabled     API function.
+*
+*                                                               - RETURNED BY NetIF_802x_AddrMulticastProtocolToHW() : -
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware/protocol
+*                                                                   address length.
+*                               NET_IF_ERR_INVALID_PROTOCOL     Invalid network protocol.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrMulticastRemove() via 'pif_api->AddrMulticastRemove()'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) The multicast protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_AddrMulticastRemove (NET_IF             *p_if,
+                                      CPU_INT08U         *p_addr_protocol,
+                                      CPU_INT08U          addr_protocol_len,
+                                      NET_PROTOCOL_TYPE   addr_protocol_type,
+                                      NET_ERR            *p_err)
+{
+#ifdef  NET_MCAST_MODULE_EN
+    NET_DEV_API  *p_dev_api;
+    CPU_INT08U    addr_hw[NET_IF_802x_ADDR_SIZE];
+    CPU_INT08U    addr_hw_len;
+
+
+    switch (addr_protocol_type) {
+        case NET_PROTOCOL_TYPE_IP_V4:
+        case NET_PROTOCOL_TYPE_IP_V6:
+             addr_hw_len = sizeof(addr_hw);
+             NetIF_802x_AddrMulticastProtocolToHW((NET_IF          *) p_if,
+                                                  (CPU_INT08U      *) p_addr_protocol,
+                                                  (CPU_INT08U       ) addr_protocol_len,
+                                                  (NET_PROTOCOL_TYPE) addr_protocol_type,
+                                                  (CPU_INT08U      *)&addr_hw[0],
+                                                  (CPU_INT08U      *)&addr_hw_len,
+                                                  (NET_ERR         *) p_err);
+             if (*p_err != NET_IF_ERR_NONE) {
+                  return;
+             }
+             break;
+
+
+        default:
+            *p_err = NET_IF_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    p_dev_api = (NET_DEV_API *)p_if->Dev_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_dev_api == (void *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_dev_api->AddrMulticastRemove == (void (*)(NET_IF     *,
+                                                    CPU_INT08U *,
+                                                    CPU_INT08U  ,
+                                                    NET_ERR    *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+                                                                /* Remove multicast addr from dev.                       */
+    p_dev_api->AddrMulticastRemove((NET_IF     *) p_if,
+                                   (CPU_INT08U *)&addr_hw[0],
+                                   (CPU_INT08U  ) addr_hw_len,
+                                   (NET_ERR    *) p_err);
+
+
+#else
+   (void)&p_if;                                                 /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_addr_protocol;
+   (void)&addr_protocol_len;
+   (void)&addr_protocol_type;
+
+
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                               NetIF_802x_AddrMulticastProtocolToHW()
+*
+* Description : Convert a multicast protocol address into an 802x address.
+*
+* Argument(s) : p_if                    Pointer to an 802x network interface to transmit the packet.
+*               ----                    Argument validated in NetIF_AddrMulticastProtocolToHW().
+*
+*               p_addr_protocol         Pointer to a multicast protocol address to convert
+*               ---------------             (see Note #1a).
+*
+*                                       Argument checked   in NetIF_AddrMulticastProtocolToHW().
+*
+*               addr_protocol_len       Length of the protocol address, in octets.
+*
+*               addr_protocol_type      Protocol address type.
+*
+*               p_addr_hw               Pointer to a variable that will receive the hardware address
+*               ---------                   (see Note #1b).
+*
+*                                       Argument checked   in NetIF_AddrMulticastProtocolToHW().
+*
+*               p_addr_hw_len           Pointer to a variable to ... :
+*               -------------
+*                                           (a) Pass the length of the              hardware address
+*                                                   argument, in octets.
+*                                           (b) (1) Return the actual length of the hardware address,
+*                                                       in octets, if NO error(s);
+*                                               (2) Return 0, otherwise.
+*
+*                                       Argument checked   in NetIF_AddrMulticastProtocolToHW().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network protocol address successfully
+*                                                                   converted.
+*                               NET_IF_ERR_INVALID_ADDR_LEN     Invalid hardware/protocol address length.
+*                               NET_IF_ERR_INVALID_PROTOCOL     Invalid network protocol.
+*                               NET_ERR_FAULT_FEATURE_DIS              Disabled API function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_AddrMulticastAdd(),
+*               NetIF_802x_AddrMulticastRemove(),
+*               NetIF_AddrMulticastProtocolToHW() via 'pif_api->AddrMulticastProtocolToHW'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) The multicast protocol address MUST be in network-order.
+*
+*                   (b) The 802x hardware address is returned in network-order; i.e. the pointer to
+*                       the hardware address points to the highest-order octet.
+*
+*               (2) Since 'paddr_hw_len' argument is both an input & output argument (see 'Argument(s) :
+*                   paddr_hw_len'), ... :
+*
+*                   (a) Its input value SHOULD be validated prior to use; ...
+*                   (b) While its output value MUST be initially configured to return a default value
+*                       PRIOR to all other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_AddrMulticastProtocolToHW (NET_IF             *p_if,
+                                            CPU_INT08U         *p_addr_protocol,
+                                            CPU_INT08U          addr_protocol_len,
+                                            NET_PROTOCOL_TYPE   addr_protocol_type,
+                                            CPU_INT08U         *p_addr_hw,
+                                            CPU_INT08U         *p_addr_hw_len,
+                                            NET_ERR            *p_err)
+{
+#ifdef  NET_MCAST_TX_MODULE_EN
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+#ifdef NET_IPv4_MODULE_EN
+    CPU_INT08U      addr_hw_len;
+#endif
+#endif
+#ifdef NET_IPv4_MODULE_EN
+    CPU_INT08U      addr_protocol_v4[NET_IPv4_ADDR_LEN];
+#endif
+#ifdef NET_IPv6_MODULE_EN
+    NET_IPv6_ADDR   addr_protocol_v6;
+#endif
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+#ifdef NET_IPv4_MODULE_EN
+      addr_hw_len = *p_addr_hw_len;
+#endif
+#endif
+#endif
+   *p_addr_hw_len =  0u;                                        /* Cfg dflt addr len for err (see Note #2b).            */
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+    switch (addr_protocol_type) {
+        case NET_PROTOCOL_TYPE_IP_V4:
+#ifdef NET_IPv4_MODULE_EN
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------ VALIDATE ADDRS ------------------ */
+             if (addr_protocol_len != sizeof(NET_IPv4_ADDR)) {
+                *p_err = NET_IF_ERR_INVALID_ADDR_LEN;
+                 return;
+             }
+             if (addr_hw_len != NET_IF_802x_ADDR_SIZE) {
+                *p_err = NET_IF_ERR_INVALID_ADDR_LEN;
+                 return;
+             }
+#endif
+
+             NET_UTIL_VAL_COPY(&addr_protocol_v4[0],
+                                p_addr_protocol,
+                                addr_protocol_len);
+
+             NET_UTIL_VAL_COPY(&p_addr_hw[0],
+                               &NetIF_802x_AddrMulticastBaseIPv4[0],
+                                NET_IF_802x_ADDR_SIZE);
+             p_addr_hw[3] = addr_protocol_v4[1] & 0x7Fu;
+             p_addr_hw[4] = addr_protocol_v4[2];
+             p_addr_hw[5] = addr_protocol_v4[3];
+#else
+            *p_err = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+             break;
+
+
+        case NET_PROTOCOL_TYPE_IP_V6:
+#ifdef NET_IPv6_MODULE_EN
+             Mem_Copy(&addr_protocol_v6.Addr[0],
+                       p_addr_protocol,
+                       addr_protocol_len);
+
+             Mem_Copy(&p_addr_hw[0],
+                      &NetIF_802x_AddrMulticastBaseIPv6[0],
+                       NET_IF_802x_ADDR_SIZE);
+             p_addr_hw[2] = addr_protocol_v6.Addr[12];
+             p_addr_hw[3] = addr_protocol_v6.Addr[13];
+             p_addr_hw[4] = addr_protocol_v6.Addr[14];
+             p_addr_hw[5] = addr_protocol_v6.Addr[15];
+#else
+            *p_err = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+             break;
+
+
+        default:
+            *p_err = NET_IF_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+   (void)&p_if;                                                 /* Prevent 'variable unused' compiler warning.          */
+
+   *p_addr_hw_len = NET_IF_802x_ADDR_SIZE;
+   *p_err         = NET_IF_ERR_NONE;
+
+
+#else
+   (void)&p_if;                                                 /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_addr_protocol;
+   (void)&addr_protocol_len;
+   (void)&addr_protocol_type;
+   (void)&p_addr_hw;
+
+   *p_addr_hw_len = 0u;                                         /* Cfg dflt addr len for err (see Note #2b).            */
+   *p_err         = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIF_802x_BufPoolCfgValidate()
+*
+* Description : (1) Validate 802x network buffer pool configuration :
+*
+*                   (a) Validate configured size of network buffers
+*
+*
+* Argument(s) : p_if        Pointer to an 802x network interface.
+*               ----        Argument validated in NetIF_BufPoolInit().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 802x buffer pool configuration valid.
+*                               NET_BUF_ERR_INVALID_SIZE        Invalid size of 802x buffer data areas
+*                                                                   configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_BufPoolInit() via 'pif_api->BufPoolCfgValidate()'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) All 802x buffer data area sizes MUST be configured greater than or equal to
+*                   NET_IF_802x_BUF_SIZE_MIN.
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_BufPoolCfgValidate (NET_IF   *p_if,
+                                     NET_ERR  *p_err)
+{
+    NET_DEV_CFG  *p_dev_cfg;
+    CPU_INT16U    net_if_802x_buf_size_min;
+
+
+    p_dev_cfg = (NET_DEV_CFG *)p_if->Dev_Cfg;
+
+    net_if_802x_buf_size_min = 0u;
+    NetIF_802x_TxIxDataGet(&net_if_802x_buf_size_min,
+                            p_err);
+
+
+                                                                    /* ----------- VALIDATE BUF DATA SIZES ------------ */
+    if (p_dev_cfg->RxBufLargeSize < net_if_802x_buf_size_min) {     /*     Validate large rx buf size (see Note #2).    */
+       *p_err = NET_BUF_ERR_INVALID_SIZE;
+        return;
+    }
+
+    if (p_dev_cfg->TxBufLargeNbr > 0) {                              /* If any large tx bufs cfg'd, ...                  */
+        if (p_dev_cfg->TxBufLargeSize < net_if_802x_buf_size_min) { /* ... validate large tx buf size (see Note #2).    */
+           *p_err = NET_BUF_ERR_INVALID_SIZE;
+            return;
+        }
+    }
+
+    if (p_dev_cfg->TxBufSmallNbr > 0) {                              /* If any small tx bufs cfg'd, ...                  */
+        if (p_dev_cfg->TxBufSmallSize < net_if_802x_buf_size_min) {  /* ... validate small tx buf size (see Note #2).    */
+           *p_err = NET_BUF_ERR_INVALID_SIZE;
+            return;
+        }
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_802x_MTU_Set()
+*
+* Description : Set 802x interface's MTU.
+*
+* Argument(s) : p_if        Pointer to an 802x network interface.
+*               ----        Argument validated in NetIF_MTU_SetHandler().
+*
+*               mtu         Desired maximum transmission unit (MTU) size to configure (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 802x interface's MTU successfully set.
+*                               NET_IF_ERR_INVALID_MTU          Invalid MTU.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_MTU_SetHandler() via 'pif_api->MTU_Set()'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_MTU_Set (NET_IF   *p_if,
+                          NET_MTU   mtu,
+                          NET_ERR  *p_err)
+{
+    NET_DEV_CFG   *p_dev_cfg;
+    NET_BUF_SIZE   buf_size_max;
+    NET_MTU        mtu_max;
+
+
+    p_dev_cfg     = (NET_DEV_CFG *)p_if->Dev_Cfg;
+    buf_size_max  =  DEF_MAX((p_dev_cfg->TxBufLargeSize - p_dev_cfg->TxBufIxOffset),
+                             (p_dev_cfg->TxBufSmallSize - p_dev_cfg->TxBufIxOffset));
+    mtu_max       =  DEF_MIN(mtu, buf_size_max);
+
+    if (mtu <= mtu_max) {
+        p_if->MTU = mtu;
+       *p_err     = NET_IF_ERR_NONE;
+    } else {
+       *p_err     = NET_IF_ERR_INVALID_MTU;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_802x_GetPktSizeHdr()
+*
+* Description : Get 802x packet header size.
+*
+* Argument(s) : p_if    Pointer to an 802x network interface.
+*               ----    Argument validated in NetIF_MTU_GetProtocol().
+*
+* Return(s)   : The 802x packet header size.
+*
+* Caller(s)   : NetIF_MTU_GetProtocol() via 'pif_api->GetPktSizeHdr()'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetIF_802x_GetPktSizeHdr (NET_IF  *p_if)
+{
+    CPU_INT16U  pkt_size;
+
+
+   (void)&p_if;                                                 /* Prevent 'variable unused' compiler warning.          */
+    pkt_size = (CPU_INT16U)NET_IF_HDR_SIZE_ETHER;
+
+    return (pkt_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_802x_GetPktSizeMin()
+*
+* Description : Get minimum allowable 802x packet size.
+*
+* Argument(s) : p_if    Pointer to an 802x network interface.
+*               ----    Argument validated in NetIF_GetPktSizeMin().
+*
+* Return(s)   : The minimum allowable 802x packet size.
+*
+* Caller(s)   : NetIF_GetPktSizeMin() via 'pif_api->GetPktSizeMin()'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetIF_802x_GetPktSizeMin (NET_IF  *p_if)
+{
+    CPU_INT16U  pkt_size;
+
+
+   (void)&p_if;                                                 /* Prevent 'variable unused' compiler warning.          */
+    pkt_size = (CPU_INT16U)NET_IF_802x_FRAME_MIN_SIZE;
+
+    return (pkt_size);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_802x_GetPktSizeMax()
+*
+* Description : Get maximum allowable 802x packet size.
+*
+* Argument(s) : p_if    Pointer to an 802x network interface.
+*               ----    Argument validated in NetIF_GetPktSizeMin().
+*
+* Return(s)   : The maximum allowable 802x packet size.
+*
+* Caller(s)   : NetIF_GetPktSizeMax() via 'pif_api->GetPktSizeMax()'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetIF_802x_GetPktSizeMax (NET_IF  *p_if)
+{
+    CPU_INT16U  pkt_size;
+
+
+   (void)&p_if;                                                 /* Prevent 'variable unused' compiler warning.          */
+    pkt_size = (CPU_INT16U)NET_IF_ETHER_FRAME_MAX_SIZE;
+
+    return (pkt_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_802x_PktSizeIsValid()
+*
+* Description : Validate an 802x packet size.
+*
+* Argument(s) : size    Size of 802x packet frame (in octets).
+*
+* Return(s)   : DEF_YES, if 802x packet size valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIF_Ether_Rx(),
+*               NetIF_WiFi_Rx().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIF_802x_PktSizeIsValid (CPU_INT16U  size)
+{
+    CPU_BOOLEAN  valid;
+
+
+    valid = DEF_YES;
+
+    if (size  < NET_IF_802x_FRAME_MIN_SIZE) {
+        valid = DEF_NO;
+    }
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_802x_ISR_Handler()
+*
+* Description : Handle Wireless device's interrupt service routine (ISR) function(s).
+*
+* Argument(s) : p_if        Pointer to an 802x network interface.
+*               ----        Argument validated in NetIF_ISR_Handler().
+*
+*               type        Device interrupt type(s) to handle :
+*
+*                               NET_DEV_ISR_TYPE_UNKNOWN                Handle unknown device           ISR(s).
+*                               NET_DEV_ISR_TYPE_RX                     Handle device receive           ISR(s).
+*                               NET_DEV_ISR_TYPE_RX_RUNT                Handle device runt              ISR(s).
+*                               NET_DEV_ISR_TYPE_RX_OVERRUN             Handle device receive overrun   ISR(s).
+*                               NET_DEV_ISR_TYPE_TX_RDY                 Handle device transmit ready    ISR(s).
+*                               NET_DEV_ISR_TYPE_TX_COMPLETE            Handle device transmit complete ISR(s).
+*                               NET_DEV_ISR_TYPE_TX_COLLISION_LATE      Handle device late   collision  ISR(s).
+*                               NET_DEV_ISR_TYPE_TX_COLLISION_EXCESS    Handle device excess collision  ISR(s).
+*                               NET_DEV_ISR_TYPE_JABBER                 Handle device jabber            ISR(s).
+*                               NET_DEV_ISR_TYPE_BABBLE                 Handle device late babble       ISR(s).
+*                               NET_DEV_ISR_TYPE_PHY                    Handle device physical layer    ISR(s).
+*
+*                                                                       See specific network device(s) for
+*                                                                           additional device ISR(s).
+*
+*                           See also 'net_if.h  NETWORK DEVICE INTERRUPT SERVICE ROUTINE (ISR) TYPE DEFINES'
+*                               for other available & supported network device ISR types.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Wireless interface's device ISR(s)
+*                                                                   successfully handled.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_ISR_Handler() via 'pif_api->ISR_Handler()'.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) NetIF_WiFi_ISR_Handler() is called within the context of an ISR & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST NOT block by pending on & acquiring the global network lock.
+*
+*                       (1) Although blocking on the global network lock is typically required since any
+*                           external API function access is asynchronous to other network protocol tasks;
+*                           interrupt service routines (ISRs) are (typically) prohibited from pending on
+*                           OS objects & therefore can NOT acquire the global network lock.
+*
+*                       (2) Therefore, ALL network interface & network device driver functions called by
+*                           NetIF_WiFi_ISR_Handler() MUST be able to be asynchronously accessed without
+*                           the global network lock & without corrupting any network data or task.
+*
+*               (2) Network device interrupt service routines (ISR) handler(s) SHOULD be able to correctly
+*                   function regardless of whether their corresponding network interface(s) are enabled.
+*
+*                   See also Note #1b2.
+*********************************************************************************************************
+*/
+
+void  NetIF_802x_ISR_Handler (NET_IF            *p_if,
+                              NET_DEV_ISR_TYPE   type,
+                              NET_ERR           *p_err)
+{
+    NET_DEV_API  *p_dev_api;
+
+
+                                                                /* ---------------- VALIDATE ISR TYPE ---------------- */
+    switch (type) {
+        case NET_DEV_ISR_TYPE_UNKNOWN:
+        case NET_DEV_ISR_TYPE_RX:
+        case NET_DEV_ISR_TYPE_RX_RUNT:
+        case NET_DEV_ISR_TYPE_RX_OVERRUN:
+        case NET_DEV_ISR_TYPE_TX_RDY:
+        case NET_DEV_ISR_TYPE_TX_COMPLETE:
+        case NET_DEV_ISR_TYPE_TX_COLLISION_LATE:
+        case NET_DEV_ISR_TYPE_TX_COLLISION_EXCESS:
+             p_dev_api = (NET_DEV_API *)p_if->Dev_API;
+             if (p_dev_api->ISR_Handler == (void (*)(NET_IF         *,
+                                                     NET_DEV_ISR_TYPE))0) {
+                *p_err = NET_ERR_FAULT_NULL_FNCT;
+                 return;
+             }
+             p_dev_api->ISR_Handler(p_if, type);
+             break;
+
+
+        case NET_DEV_ISR_TYPE_PHY:
+        case NET_DEV_ISR_TYPE_JABBER:
+        case NET_DEV_ISR_TYPE_BABBLE:
+        default:
+            *p_err = NET_IF_ERR_INVALID_ISR_TYPE;
+             return;
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                    NetIF_802x_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as 802x protocol.
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header that received a packet.
+*               ---------   Argument validated in NetIF_Ether_Rx(),
+*                                                 NetIF_WiFi_Rx().
+*
+*               p_ctrs_err  Pointer to an 802x network interface error counters.
+*               ----------  Argument checked   in NetIF_802x_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Received buffer's IF header validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT IF.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_Rx(),
+*               NetIF_WiFi_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIF_802x_RxPktValidateBuf (NET_BUF_HDR           *p_buf_hdr,
+                                           NET_CTR_IF_802x_ERRS  *p_ctrs_err,
+                                           NET_ERR               *p_err)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  valid;
+    NET_ERR      err;
+
+
+   (void)&p_ctrs_err;                                           /* Prevent possible 'variable unused' warning.          */
+
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* ------------- VALIDATE 802x IF BUF HDR ------------- */
+    if (p_buf_hdr->ProtocolHdrType != NET_PROTOCOL_TYPE_IF) {
+        if_nbr = p_buf_hdr->IF_Nbr;
+        valid  = NetIF_IsValidHandler(if_nbr, &err);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvProtocolCtr);
+            NET_CTR_ERR_INC(p_ctrs_err->RxInvProtocolCtr);
+        }
+       *p_err = NET_ERR_INVALID_PROTOCOL;
+        return;
+    }
+
+    if (p_buf_hdr->IF_HdrIx == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvBufIxCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->RxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_IF_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetIF_802x_RxPktFrameDemux()
+*
+* Description : (1) Validate received packet frame & demultiplex to appropriate protocol layer :
+*
+*                   (a) Validate destination address :
+*                       (1) Check for broadcast address                 See RFC #1122, Section 2.4
+*                       (2) Check for multicast address                 See RFC #1112, Section 6.4
+*                       (3) Check for this host's hardware address
+*                   (b) Validate source address                         See 'NetIF_802x_IsValidAddrSrc()  Note #1'
+*                   (c) Demultiplex & validate frame :
+*                       (1) Ethernet   frame type
+*                       (2) IEEE 802.3 frame length
+*                   (d) Demultiplex packet to appropriate protocol layer :
+*                       (1) IP  receive
+*                       (2) ARP receive
+*
+*
+* Argument(s) : p_if            Pointer to an 802x network interface that received a packet.
+*               ----            Argument validated in NetIF_RxHandler().
+*
+*               p_buf           Pointer to a       network buffer    that received a packet.
+*               -----           Argument checked   in NetIF_Ether_Rx(),
+*                                                     NetIF_WiFi_Rx().
+*
+*               p_buf_hdr       Pointer to received packet frame's network buffer header.
+*               ---------       Argument validated in NetIF_Ether_Rx(),
+*                                                     NetIF_WiFi_Rx().
+*
+*               p_if_hdr        Pointer to received packet frame's header.
+*               --------        Argument validated in NetIF_Ether_Rx(),
+*                                                     NetIF_WiFi_Rx().
+*
+*               p_ctrs_stat     Pointer to an 802x network interface statistic counters.
+*               -----------     Argument checked   in NetIF_802x_Rx().
+*
+*               p_ctrs_err      Pointer to an 802x network interface error     counters.
+*               ----------      Argument checked   in NetIF_802x_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_INVALID_ADDR_DEST        Invalid destination address.
+*                               NET_IF_ERR_INVALID_ADDR_SRC         Invalid source      address.
+*                               NET_ERR_INVALID_PROTOCOL            Invalid network protocol.
+*
+*                                                                   -- RETURNED BY NetIF_802x_RxPktFrameDemuxEther() : --
+*                               NET_IF_ERR_INVALID_ETHER_TYPE       Invalid Ethernet Frame Type value.
+*
+*                                                                   - RETURNED BY NetIF_802x_RxPktFrameDemuxIEEE802() : -
+*                               NET_IF_ERR_INVALID_LEN_FRAME        Invalid IEEE 802.3 frame length.
+*                               NET_IF_ERR_INVALID_LLC_DSAP         Invalid IEEE 802.2 LLC  DSAP    value.
+*                               NET_IF_ERR_INVALID_LLC_SSAP         Invalid IEEE 802.2 LLC  SSAP    value.
+*                               NET_IF_ERR_INVALID_LLC_CTRL         Invalid IEEE 802.2 LLC  Control value.
+*                               NET_IF_ERR_INVALID_SNAP_CODE        Invalid IEEE 802.2 SNAP OUI     value.
+*                               NET_IF_ERR_INVALID_SNAP_TYPE        Invalid IEEE 802.2 SNAP Type    value.
+*
+*                                                                   ------------- RETURNED BY NetARP_Rx() : -------------
+*                               NET_ARP_ERR_NONE                    ARP message successfully demultiplexed.
+*
+*                                                                   ------------- RETURNED BY NetIPv4_Rx() : -------------
+*                               NET_IPv4_ERR_NONE                   IPv4 datagram successfully demultiplexed.
+*
+*                                                                   ------------- RETURNED BY NetIPv6_Rx() : -------------
+*                               NET_IPv6_ERR_NONE                   IPv6 datagram successfully demultiplexed.
+*
+*                               NET_ERR_RX                          Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_Rx(),
+*               NetIF_WiFi_Rx().
+*
+* Note(s)     : (2) When network buffer is demultiplexed to higher-layer protocol receive, the buffer's
+*                   reference counter is NOT incremented since the network interface layer does NOT
+*                   maintain a reference to the buffer.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_802x_RxPktFrameDemux (NET_IF                 *p_if,
+                                          NET_BUF                *p_buf,
+                                          NET_BUF_HDR            *p_buf_hdr,
+                                          NET_IF_HDR_802x        *p_if_hdr,
+                                          NET_CTR_IF_802x_STATS  *p_ctrs_stat,
+                                          NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                          NET_ERR                *p_err)
+{
+    NET_IF_DATA_802x  *p_if_data;
+    CPU_BOOLEAN        valid;
+    CPU_BOOLEAN        dest_this_host;
+#ifdef  NET_MCAST_RX_MODULE_EN
+    CPU_BOOLEAN        dest_multicast;
+#endif
+    CPU_BOOLEAN        dest_broadcast;
+    CPU_INT16U         frame_type_len;
+
+
+   (void)&p_ctrs_stat;                                          /* Prevent possible 'variable unused' warnings.         */
+
+
+                                                                /* ---------------- VALIDATE DEST ADDR ---------------- */
+    dest_broadcast = Mem_Cmp((void     *)&p_if_hdr->AddrDest[0],
+                             (void     *)&NetIF_802x_AddrBroadcast[0],
+                             (CPU_SIZE_T) NET_IF_802x_ADDR_SIZE);
+
+#ifdef  NET_MCAST_RX_MODULE_EN
+    dest_multicast = ((p_if_hdr->AddrDest[0] & NetIF_802x_AddrMulticastMask[0]) ==
+                                               NetIF_802x_AddrMulticastMask[0]) ? DEF_YES : DEF_NO;
+#endif
+
+    if (dest_broadcast == DEF_YES) {
+        NET_CTR_STAT_INC(Net_StatCtrs.IFs.IFs_802xCtrs.RxPktBcastCtr);
+        NET_CTR_STAT_INC(p_ctrs_stat->RxPktBcastCtr);
+        DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_RX_BROADCAST);   /* Flag rx'd multicast pkt (see Note #1a1).         */
+
+#ifdef  NET_MCAST_RX_MODULE_EN
+    } else if (dest_multicast == DEF_YES) {
+        NET_CTR_STAT_INC(Net_StatCtrs.IFs.IFs_802xCtrs.RxPktMcastCtr);
+        NET_CTR_STAT_INC(p_ctrs_stat->RxPktMcastCtr);
+        DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_RX_MULTICAST);   /* Flag rx'd broadcast pkt (see Note #1a2).         */
+#endif
+
+    } else {
+        p_if_data      = (NET_IF_DATA_802x  *) p_if->IF_Data;
+        dest_this_host =  Mem_Cmp((void     *)&p_if_hdr->AddrDest[0],
+                                  (void     *)&p_if_data->HW_Addr[0],
+                                  (CPU_SIZE_T) NET_IF_802x_ADDR_SIZE);
+        if (dest_this_host != DEF_YES) {                        /* Discard invalid dest addr (see Note #1a3).           */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvAddrDestCtr);
+            NET_CTR_ERR_INC(p_ctrs_err->RxInvAddrDestCtr);
+           *p_err = NET_IF_ERR_INVALID_ADDR_DEST;
+            return;
+        }
+    }
+
+
+                                                                /* ---------------- VALIDATE SRC  ADDR ---------------- */
+    valid = NetIF_802x_AddrHW_IsValid(p_if, &p_if_hdr->AddrSrc[0]);
+
+    if (valid != DEF_YES) {                                     /* Discard invalid src addr (see Note #1b).             */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvAddrSrcCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->RxInvAddrSrcCtr);
+       *p_err = NET_IF_ERR_INVALID_ADDR_SRC;
+        return;
+    }
+
+#ifdef  NET_DAD_MODULE_EN
+                                                                /* --------------- DEMUX RX IF HW ADDR ---------------- */
+    p_buf_hdr->IF_HW_AddrLen     =  NET_IF_802x_ADDR_SIZE;
+    p_buf_hdr->IF_HW_AddrSrcPtr  = &p_if_hdr->AddrSrc[0];
+    p_buf_hdr->IF_HW_AddrDestPtr = &p_if_hdr->AddrDest[0];
+#endif
+
+
+                                                                /* --------------- DEMUX/VALIDATE FRAME --------------- */
+    NET_UTIL_VAL_COPY_GET_NET_16(&frame_type_len, &p_if_hdr->FrameType_Len);
+    if (frame_type_len <= NET_IF_IEEE_802_FRAME_LEN_MAX) {
+        NetIF_802x_RxPktFrameDemuxIEEE802(p_if,
+                                          p_buf_hdr,
+                                          p_if_hdr,
+                                          p_ctrs_err,
+                                          p_err);
+    } else {
+        NetIF_802x_RxPktFrameDemuxEther(p_if,
+                                        p_buf_hdr,
+                                        p_if_hdr,
+                                        p_ctrs_err,
+                                        p_err);
+    }
+
+
+                                                                /* -------------------- DEMUX PKT --------------------- */
+    switch (*p_err) {                                           /* See Note #2.                                         */
+        case NET_IF_ERR_NONE:
+             switch (p_buf_hdr->ProtocolHdrType) {              /* Demux buf to appropriate protocol.                   */
+
+
+#ifdef  NET_ARP_MODULE_EN
+                 case NET_PROTOCOL_TYPE_ARP:
+                      NetARP_Rx(p_buf, p_err);
+                      break;
+#endif
+
+#ifdef  NET_IPv4_MODULE_EN
+                 case NET_PROTOCOL_TYPE_IP_V4:
+                      NetIPv4_Rx(p_buf, p_err);
+                      break;
+#endif
+
+
+#ifdef  NET_IPv6_MODULE_EN
+                case  NET_PROTOCOL_TYPE_IP_V6:
+                      NetIPv6_Rx(p_buf, p_err);
+                      break;
+#endif
+
+                 case NET_PROTOCOL_TYPE_NONE:
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvProtocolCtr);
+                      NET_CTR_ERR_INC(p_ctrs_err->RxInvProtocolCtr);
+                      NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[p_if->Nbr].RxInvProtocolCtr);
+                     *p_err = NET_ERR_INVALID_PROTOCOL;
+                      return;
+             }
+             break;
+
+
+        case NET_IF_ERR_INVALID_ETHER_TYPE:
+        case NET_IF_ERR_INVALID_LEN_FRAME:
+        case NET_IF_ERR_INVALID_LLC_DSAP:
+        case NET_IF_ERR_INVALID_LLC_SSAP:
+        case NET_IF_ERR_INVALID_LLC_CTRL:
+        case NET_IF_ERR_INVALID_SNAP_CODE:
+        case NET_IF_ERR_INVALID_SNAP_TYPE:
+        default:
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetIF_802x_RxPktFrameDemuxEther()
+*
+* Description : (1) Validate & demultiplex Ethernet packet frame :
+*
+*                   (a) Validate & demultiplex Ethernet packet frame
+*                   (b) Update buffer controls
+*
+*
+* Argument(s) : p_buf_hdr   Pointer to received packet frame's network buffer header.
+*               ---------   Argument validated in NetIF_Ether_Rx(),
+*                                                 NetIF_WiFi_Rx().
+*
+*               p_if_hdr    Pointer to received packet frame's header.
+*               --------    Argument validated in NetIF_Ether_Rx(),
+*                                                 NetIF_WiFi_Rx().
+*
+*               p_ctrs_err  Pointer to an 802x network interface error counters.
+*               ----------  Argument checked   in NetIF_802x_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Valid   Ethernet frame packet .
+*                               NET_IF_ERR_INVALID_ETHER_TYPE       Invalid Ethernet Frame Type value.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_RxPktFrameDemux().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_802x_RxPktFrameDemuxEther (NET_IF                *p_if,
+                                               NET_BUF_HDR           *p_buf_hdr,
+                                               NET_IF_HDR_802x       *p_if_hdr,
+                                               NET_CTR_IF_802x_ERRS  *p_ctrs_err,
+                                               NET_ERR               *p_err)
+{
+    NET_IF_HDR_ETHER  *p_if_hdr_ether;
+    CPU_INT16U         frame_type;
+    CPU_INT16U         ix;
+
+
+   (void)&p_ctrs_err;                                           /* Prevent possible 'variable unused' warnings.         */
+   (void)&p_if;
+
+    p_if_hdr_ether = (NET_IF_HDR_ETHER *)p_if_hdr;
+
+                                                                /* -------------- VALIDATE / DEMUX FRAME -------------- */
+    NET_UTIL_VAL_COPY_GET_NET_16(&frame_type, &p_if_hdr_ether->FrameType);
+    ix = p_buf_hdr->IF_HdrIx + NET_IF_HDR_SIZE_ETHER;
+    switch (frame_type) {                                       /* Validate & demux Ether frame type.                   */
+
+
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_IF_802x_FRAME_TYPE_IPv4:
+             p_buf_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_IP_V4;
+             p_buf_hdr->ProtocolHdrTypeNet    =  NET_PROTOCOL_TYPE_IP_V4;
+             p_buf_hdr->IP_HdrIx              = (NET_BUF_SIZE)ix;
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_IF_802x_FRAME_TYPE_IPv6:
+             p_buf_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_IP_V6;
+             p_buf_hdr->ProtocolHdrTypeNet    =  NET_PROTOCOL_TYPE_IP_V6;
+             p_buf_hdr->IP_HdrIx            = (NET_BUF_SIZE)ix;
+             break;
+#endif
+
+#ifdef  NET_ARP_MODULE_EN
+        case NET_IF_802x_FRAME_TYPE_ARP:
+             p_buf_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_ARP;
+             p_buf_hdr->ProtocolHdrTypeIF_Sub =  NET_PROTOCOL_TYPE_ARP;
+             p_buf_hdr->ARP_MsgIx             = (NET_BUF_SIZE)ix;
+             break;
+#endif
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvFrameCtr);
+             NET_CTR_ERR_INC(p_ctrs_err->RxInvFrameCtr);
+            *p_err = NET_IF_ERR_INVALID_ETHER_TYPE;
+             return;
+    }
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+    p_buf_hdr->IF_HdrLen         =  NET_IF_HDR_SIZE_ETHER;
+    p_buf_hdr->DataLen          -= (NET_BUF_SIZE)p_buf_hdr->IF_HdrLen;
+
+    p_buf_hdr->ProtocolHdrTypeIF =  NET_PROTOCOL_TYPE_IF_ETHER;
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetIF_802x_RxPktFrameDemuxIEEE802()
+*
+* Description : (1) Validate & demultiplex IEEE 802 packet frame :
+*
+*                   (a) Validate & demultiplex IEEE 802 packet frame
+*                       (1) IEEE 802.2 LLC
+*                       (2) IEEE 802.2 SNAP Organization Code
+*                       (3) IEEE 802.2 SNAP Frame Type
+*                   (b) Update buffer controls
+*
+*
+* Argument(s) : p_buf_hdr   Pointer to received packet frame's network buffer header.
+*               ---------   Argument validated in NetIF_Ether_Rx(),
+*                                                 NetIF_WiFi_Rx().
+*
+*               p_if_hdr    Pointer to received packet frame's header.
+*               --------    Argument validated in NetIF_Ether_Rx(),
+*                                                 NetIF_WiFi_Rx().
+*
+*               p_ctrs_err  Pointer to an 802x network interface error counters.
+*               ----------  Argument checked   in NetIF_802x_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Valid IEEE 802 packet frame.
+*                               NET_IF_ERR_INVALID_LEN_FRAME        Invalid IEEE 802.3 frame length.
+*                               NET_IF_ERR_INVALID_LLC_DSAP         Invalid IEEE 802.2 LLC  DSAP    value.
+*                               NET_IF_ERR_INVALID_LLC_SSAP         Invalid IEEE 802.2 LLC  SSAP    value.
+*                               NET_IF_ERR_INVALID_LLC_CTRL         Invalid IEEE 802.2 LLC  Control value.
+*                               NET_IF_ERR_INVALID_SNAP_CODE        Invalid IEEE 802.2 SNAP OUI     value.
+*                               NET_IF_ERR_INVALID_SNAP_TYPE        Invalid IEEE 802.2 SNAP Type    value.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_RxPktFrameDemux().
+*
+* Note(s)     : (2) The IEEE 802.3 Frame Length field specifies the number of frame data octets & does NOT
+*                   include the trailing frame CRC field octets.  However, since some Ethernet devices MAY
+*                   append the CRC field as part of a received packet frame, any validation of the minimum
+*                   frame size MUST assume that the CRC field may be present.  Therefore, the minimum frame
+*                   packet size for comparison MUST include the number of CRC field octets.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_802x_RxPktFrameDemuxIEEE802 (NET_IF                *p_if,
+                                                 NET_BUF_HDR           *p_buf_hdr,
+                                                 NET_IF_HDR_802x       *p_if_hdr,
+                                                 NET_CTR_IF_802x_ERRS  *p_ctrs_err,
+                                                 NET_ERR               *p_err)
+{
+    NET_IF_HDR_IEEE_802  *p_if_hdr_ieee_802;
+    CPU_INT16U            frame_len;
+    CPU_INT16U            frame_len_actual;
+    CPU_INT16U            frame_type;
+    CPU_INT16U            ix;
+
+
+   (void)&p_ctrs_err;                                               /* Prevent possible 'variable unused' warnings.     */
+   (void)&p_if;
+
+
+    p_if_hdr_ieee_802 = (NET_IF_HDR_IEEE_802 *)p_if_hdr;
+
+                                                                    /* ------------- VALIDATE FRAME SIZE -------------- */
+    if (p_buf_hdr->TotLen >= NET_IF_802x_FRAME_MIN_CRC_SIZE) {      /* If pkt size >= min frame pkt size (see Note #2)  */
+        NET_UTIL_VAL_COPY_GET_NET_16(&frame_len, &p_if_hdr_ieee_802->FrameLen);
+        frame_len_actual = (CPU_INT16U)(p_buf_hdr->TotLen - NET_IF_HDR_SIZE_ETHER - NET_IF_802x_FRAME_CRC_SIZE);
+        if (frame_len   != frame_len_actual) {                      /* ... & frame len != rem pkt len, rtn err.         */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvFrameCtr);
+            NET_CTR_ERR_INC(p_ctrs_err->RxInvFrameCtr);
+           *p_err = NET_IF_ERR_INVALID_LEN_FRAME;
+            return;
+        }
+    }
+
+                                                                    /* ------------ VALIDATE IEEE 802.2 LLC ----------- */
+    if (p_if_hdr_ieee_802->LLC_DSAP != NET_IF_IEEE_802_LLC_DSAP) {  /* Validate IEEE 802.2 LLC DSAP.                    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvFrameCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->RxInvFrameCtr);
+       *p_err = NET_IF_ERR_INVALID_LLC_DSAP;
+        return;
+    }
+
+    if (p_if_hdr_ieee_802->LLC_SSAP != NET_IF_IEEE_802_LLC_SSAP) {  /* Validate IEEE 802.2 LLC SSAP.                    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvFrameCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->RxInvFrameCtr);
+       *p_err = NET_IF_ERR_INVALID_LLC_SSAP;
+        return;
+    }
+
+    if (p_if_hdr_ieee_802->LLC_Ctrl != NET_IF_IEEE_802_LLC_CTRL) {  /* Validate IEEE 802.2 LLC Ctrl.                    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvFrameCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->RxInvFrameCtr);
+       *p_err = NET_IF_ERR_INVALID_LLC_CTRL;
+        return;
+    }
+                                                                    /* ----------- VALIDATE IEEE 802.2 SNAP ----------- */
+                                                                    /* Validate IEEE 802.2 SNAP OUI.                    */
+    if (p_if_hdr_ieee_802->SNAP_OrgCode[0] != NET_IF_IEEE_802_SNAP_CODE_00) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvFrameCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->RxInvFrameCtr);
+       *p_err = NET_IF_ERR_INVALID_SNAP_CODE;
+        return;
+    }
+    if (p_if_hdr_ieee_802->SNAP_OrgCode[1] != NET_IF_IEEE_802_SNAP_CODE_01) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvFrameCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->RxInvFrameCtr);
+       *p_err = NET_IF_ERR_INVALID_SNAP_CODE;
+        return;
+    }
+    if (p_if_hdr_ieee_802->SNAP_OrgCode[2] != NET_IF_IEEE_802_SNAP_CODE_02) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvFrameCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->RxInvFrameCtr);
+       *p_err = NET_IF_ERR_INVALID_SNAP_CODE;
+        return;
+    }
+
+
+    NET_UTIL_VAL_COPY_GET_NET_16(&frame_type, &p_if_hdr_ieee_802->SNAP_FrameType);
+    ix = p_buf_hdr->IF_HdrIx + NET_IF_HDR_SIZE_IEEE_802;
+    switch (frame_type) {                                           /* Validate & demux IEEE 802.2 SNAP Frame Type.     */
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_IF_IEEE_802_SNAP_TYPE_IPv4:
+             p_buf_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_IP_V4;
+             p_buf_hdr->ProtocolHdrTypeNet    =  NET_PROTOCOL_TYPE_IP_V4;
+             p_buf_hdr->IP_HdrIx              = (NET_BUF_SIZE)ix;
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_IF_IEEE_802_SNAP_TYPE_IPv6:
+             p_buf_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_IP_V6;
+             p_buf_hdr->ProtocolHdrTypeNet    =  NET_PROTOCOL_TYPE_IP_V6;
+             p_buf_hdr->IP_HdrIx            = (NET_BUF_SIZE)ix;
+             break;
+#endif
+
+#ifdef  NET_ARP_MODULE_EN
+        case NET_IF_IEEE_802_SNAP_TYPE_ARP:
+             p_buf_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_ARP;
+             p_buf_hdr->ProtocolHdrTypeIF_Sub =  NET_PROTOCOL_TYPE_ARP;
+             p_buf_hdr->ARP_MsgIx             = (NET_BUF_SIZE)ix;
+             break;
+#endif
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.RxInvFrameCtr);
+             NET_CTR_ERR_INC(p_ctrs_err->RxInvFrameCtr);
+            *p_err = NET_IF_ERR_INVALID_SNAP_TYPE;
+             return;
+    }
+
+                                                                    /* --------------- UPDATE BUF CTRLS --------------- */
+    p_buf_hdr->IF_HdrLen         =  NET_IF_HDR_SIZE_IEEE_802;
+    p_buf_hdr->DataLen          -= (NET_BUF_SIZE)p_buf_hdr->IF_HdrLen;
+
+    p_buf_hdr->ProtocolHdrTypeIF =  NET_PROTOCOL_TYPE_IF_IEEE_802;
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_802x_RxPktDiscard()
+*
+* Description : On any 802x receive error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_ctrs_err  Pointer to an 802x network interface error counters.
+*               ----------  Argument checked in NetIF_802x_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_Rx().
+*
+* Note(s)     : (1) Network buffer freed by higher layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_802x_RxPktDiscard (NET_BUF               *p_buf,
+                                       NET_CTR_IF_802x_ERRS  *p_ctrs_err,
+                                       NET_ERR               *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.IFs.IFs_802x.RxPktDisCtr;
+    NET_CTR_ERR_INC(p_ctrs_err->RxPktDisCtr);
+#else
+    p_ctr = (NET_CTR *) 0;
+   (void)&p_ctrs_err;                                           /* Prevent possible 'variable unused' warnings.         */
+#endif
+
+   (void)NetBuf_FreeBuf(p_buf, p_ctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_802x_TxPktValidate()
+*
+* Description : (1) Validate 802x transmit packet parameters :
+*
+*                   (a) Validate the following transmit packet parameters :
+*
+*                       (1) Buffer type
+*                       (2) Supported protocols :
+*                           (A) ARP
+*                           (B) IP
+*
+*                       (3) Buffer protocol index
+*                       (4) Total Length
+*
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIF_Ether_Tx(),
+*                                                 NetIF_WiFi_Tx().
+*
+*               p_ctrs_err  Pointer to an 802x network interface error counters.
+*               ----------  Argument checked   in NetIF_802x_Tx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Transmit packet validated.
+*                               NET_IF_ERR_INVALID_LEN_DATA     Invalid protocol/data length.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer   type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_Tx(),
+*               NetIF_WiFi_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIF_802x_TxPktValidate (NET_BUF_HDR           *p_buf_hdr,
+                                        NET_CTR_IF_802x_ERRS  *p_ctrs_err,
+                                        NET_ERR               *p_err)
+{
+    CPU_INT16U  ix;
+    CPU_INT16U  len;
+
+
+   (void)&p_ctrs_err;                                           /* Prevent possible 'variable unused' warnings.         */
+
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_RX_LARGE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+                                                                /* ----------------- VALIDATE PROTOCOL ---------------- */
+    switch (p_buf_hdr->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_IF_ETHER:
+            *p_err = NET_IF_ERR_NONE;
+             return;
+
+#ifdef  NET_ARP_MODULE_EN
+        case NET_PROTOCOL_TYPE_ARP:
+             ix  = p_buf_hdr->ARP_MsgIx;
+             len = p_buf_hdr->ARP_MsgLen;
+             break;
+#endif
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V4:
+             ix  = p_buf_hdr->IP_HdrIx;
+             len = p_buf_hdr->IP_TotLen;
+             break;
+#endif
+
+        case NET_PROTOCOL_TYPE_IP_V6:
+             ix  = p_buf_hdr->IP_HdrIx;
+             len = p_buf_hdr->IP_TotLen;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.TxInvProtocolCtr);
+             NET_CTR_ERR_INC(p_ctrs_err->TxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    if (ix == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.TxInvBufIxCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->TxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+    if (ix <  NET_IF_HDR_SIZE_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.TxInvBufIxCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->TxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+
+                                                                /* -------------- VALIDATE TOT DATA LEN --------------- */
+    if (len != p_buf_hdr->TotLen) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.TxHdrDataLenCtr);
+        NET_CTR_ERR_INC(p_ctrs_err->TxHdrDataLenCtr);
+       *p_err = NET_IF_ERR_INVALID_LEN_DATA;
+        return;
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_802x_TxPktPrepareFrame()
+*
+* Description : (1) Prepare data packet with 802x frame format :
+*
+*                   (a) Demultiplex Ethernet frame type
+*                   (b) Update buffer controls
+*                   (c) Write Ethernet values into packet frame
+*                       (1) Ethernet destination broadcast address, if necessary
+*                       (2) Ethernet source      MAC       address
+*                       (3) Ethernet frame type
+*                   (d) Clear Ethernet frame pad octets, if any
+*
+*
+* Argument(s) : p_if            Pointer to an 802x network interface.
+*               ----            Argument validated in NetIF_TxHandler().
+*
+*               p_buf           Pointer to network buffer with data packet to encapsulate.
+*               -----           Argument checked   in NetIF_Ether_Tx(),
+*                                                     NetIF_WiFi_Tx().
+*
+*               p_buf_hdr       Pointer to network buffer header.
+*               ---------       Argument validated in NetIF_Ether_Tx(),
+*                                                     NetIF_WiFi_Tx().
+*
+*               p_ctrs_stat     Pointer to an 802x network interface error counters.
+*               ----------      Argument checked   in NetIF_802x_Tx().
+*
+*               p_ctrs_err      Pointer to an 802x network interface error counters.
+*               ----------      Argument checked   in NetIF_802x_Tx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_TX_RDY               Ethernet frame already encapsulated. ARP
+*                                                                   cache resolved, frame ready for
+*                                                                   transmission to the device.
+*                               NET_IF_ERR_TX_BROADCAST         Ethernet frame successfully prepared for
+*                                                                   Ethernet broadcast on local network.
+*                               NET_IF_ERR_TX_MULTICAST         Ethernet frame successfully prepared for
+*                                                                   Ethernet multicast on local network.
+*                               NET_IF_ERR_TX_ADDR_REQ          Ethernet frame successfully prepared &
+*                                                                   requires hardware address binding.
+*
+*                               NET_ERR_INVALID_PROTOCOL        Invalid network protocol.
+*                               NET_BUF_ERR_INVALID_LEN         Insufficient buffer length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_Tx(),
+*               NetIF_WiFI_Tx().
+*
+* Note(s)     : (2) Supports ONLY Ethernet frame format for network transmit (see 'net_if_802x.c  Note #2a').
+*
+*               (3) Supports ONLY ARP & IP protocols (see 'net.h  Note #2a').
+*
+*               (4) To prepare the packet buffer for ARP resolution, the buffer's ARP protocol address
+*                   pointer needs to be configured to the appropriate outbound address :
+*
+*                   (a) For ARP packets, the ARP layer will configure the ARP protocol address pointer
+*                       (see 'net_arp.c  NetARP_TxPktPrepareHdr()  Note #1d').
+*
+*                   (b) For IP  packets, configure the ARP protocol address pointer to the IP's next-
+*                       route address.
+*
+*               (5) RFC #894, Section 'Frame Format' states that :
+*
+*                   (a) "The minimum length of the data field of a packet sent over an Ethernet is 46
+*                        octets."
+*
+*                   (b) (1) "If necessary, the data field should be padded (with octets of zero) to
+*                            meet the Ethernet minimum frame size."
+*                       (2) "This padding is not part of the IP packet and is not included in the
+*                            total length field of the IP header."
+*********************************************************************************************************
+*/
+
+static  void  NetIF_802x_TxPktPrepareFrame (NET_IF                 *p_if,
+                                            NET_BUF                *p_buf,
+                                            NET_BUF_HDR            *p_buf_hdr,
+                                            NET_CTR_IF_802x_STATS  *p_ctrs_stat,
+                                            NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                            NET_ERR                *p_err)
+{
+#ifdef  NET_MCAST_TX_MODULE_EN
+    CPU_BOOLEAN        tx_multicast;
+#endif
+    NET_IF_DATA_802x  *p_if_data;
+    NET_IF_HDR_ETHER  *p_if_hdr_ether;
+    CPU_INT16U         protocol_ix;
+    CPU_INT16U         frame_type;
+    CPU_INT16U         clr_ix;
+    CPU_INT16U         clr_len;
+    CPU_INT16U         clr_size;
+    CPU_BOOLEAN        clr_buf_mem;
+    CPU_BOOLEAN        tx_broadcast;
+
+
+   (void)&p_ctrs_stat;                                          /* Prevent possible 'variable unused' warnings.         */
+   (void)&p_ctrs_err;
+
+
+                                                                /* ----------------- DEMUX FRAME TYPE ----------------- */
+    switch (p_buf_hdr->ProtocolHdrType) {                       /* Demux protocol for frame type (see Note #3).         */
+        case NET_PROTOCOL_TYPE_IF_ETHER:
+            *p_err       = NET_IF_ERR_TX_RDY;
+             return;
+
+#ifdef  NET_ARP_MODULE_EN
+        case NET_PROTOCOL_TYPE_ARP:
+             protocol_ix = p_buf_hdr->ARP_MsgIx;
+             frame_type  = NET_IF_802x_FRAME_TYPE_ARP;
+             break;
+#endif
+
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V4:
+             protocol_ix = p_buf_hdr->IP_HdrIx;
+             frame_type  = NET_IF_802x_FRAME_TYPE_IPv4;
+#ifdef  NET_ARP_MODULE_EN
+                                                                /* Cfg ARP addr ptr (see Note #4b).                     */
+             p_buf_hdr->ARP_AddrProtocolPtr = (CPU_INT08U *)&p_buf_hdr->IP_AddrNextRouteNetOrder;
+#endif
+             break;
+#endif
+
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V6:
+             protocol_ix = p_buf_hdr->IP_HdrIx;
+             frame_type  = NET_IF_802x_FRAME_TYPE_IPv6;
+                                                                /* Cfg NDP addr ptr (see Note #4b).                     */
+#ifdef  NET_ARP_MODULE_EN
+             p_buf_hdr->ARP_AddrProtocolPtr = (CPU_INT08U *)&p_buf_hdr->IPv6_AddrNextRoute;
+#endif
+#ifdef  NET_NDP_MODULE_EN
+             p_buf_hdr->NDP_AddrProtocolPtr = (CPU_INT08U *)&p_buf_hdr->IPv6_AddrNextRoute;
+#endif
+             break;
+#endif
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IFs_802x.TxInvProtocolCtr);
+             NET_CTR_ERR_INC(p_ctrs_err->TxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+
+                                                                            /* ----------- UPDATE BUF CTRLS ----------- */
+    p_buf_hdr->IF_HdrLen         =  NET_IF_HDR_SIZE_ETHER;
+    p_buf_hdr->IF_HdrIx          =  protocol_ix - p_buf_hdr->IF_HdrLen;
+    p_buf_hdr->TotLen           += (NET_BUF_SIZE) p_buf_hdr->IF_HdrLen;
+
+    p_buf_hdr->ProtocolHdrType   =  NET_PROTOCOL_TYPE_IF_ETHER;
+    p_buf_hdr->ProtocolHdrTypeIF =  NET_PROTOCOL_TYPE_IF_ETHER;
+
+
+                                                                            /* ---------- PREPARE 802x FRAME ---------- */
+    p_if_hdr_ether = (NET_IF_HDR_ETHER *)&p_buf->DataPtr[p_buf_hdr->IF_HdrIx];
+
+                                                                            /* --------- PREPARE FRAME ADDRS ---------- */
+    tx_broadcast   =  DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_TX_BROADCAST);
+#ifdef  NET_MCAST_TX_MODULE_EN
+    tx_multicast   =  DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_TX_MULTICAST);
+#endif
+
+    if (tx_broadcast == DEF_YES) {                                          /* If dest addr broadcast,      ...         */
+        NET_UTIL_VAL_COPY(&p_if_hdr_ether->AddrDest[0],                     /* ... wr broadcast addr into frame.        */
+                          &NetIF_802x_AddrBroadcast[0],
+                           NET_IF_802x_ADDR_SIZE);
+        NET_CTR_STAT_INC(Net_StatCtrs.IFs.IFs_802xCtrs.TxPktBcastCtr);
+        NET_CTR_STAT_INC(p_ctrs_stat->TxPktBcastCtr);
+       *p_err = NET_IF_ERR_TX_BROADCAST;
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+    } else if (tx_multicast == DEF_YES) {
+                                                                /* If dest addr multicast, ...                          */
+        if (frame_type != NET_IF_802x_FRAME_TYPE_IPv6) {
+            NET_CTR_STAT_INC(Net_StatCtrs.IFs.IFs_802xCtrs.TxPktMcastCtr);
+            NET_CTR_STAT_INC(p_ctrs_stat->TxPktMcastCtr);
+
+#ifdef  NET_ARP_MODULE_EN
+            p_buf_hdr->ARP_AddrHW_Ptr = &p_if_hdr_ether->AddrDest[0];           /* ...  req hw addr binding.                */
+#endif
+
+        } else {
+
+
+#ifdef  NET_IPv6_MODULE_EN
+            NetIPv6_AddrHW_McastSet(&p_if_hdr_ether->AddrDest[0], &p_buf_hdr->IPv6_AddrDest, p_err);
+            if (*p_err != NET_IPv6_ERR_NONE) {
+                 return;
+            }
+#ifdef  NET_NDP_MODULE_EN
+            p_buf_hdr->NDP_AddrHW_Ptr = &p_if_hdr_ether->AddrDest[0];
+#endif
+
+#endif
+        }
+
+       *p_err = NET_IF_ERR_TX_MULTICAST;
+#endif
+
+    } else {                                                                /* Else req hw addr binding.                */
+#ifdef  NET_ARP_MODULE_EN
+        p_buf_hdr->ARP_AddrHW_Ptr = &p_if_hdr_ether->AddrDest[0];
+#endif
+#ifdef  NET_NDP_MODULE_EN
+        p_buf_hdr->NDP_AddrHW_Ptr = &p_if_hdr_ether->AddrDest[0];
+#endif
+       *p_err =  NET_IF_ERR_TX_ADDR_REQ;
+    }
+
+    p_if_data = (NET_IF_DATA_802x *)p_if->IF_Data;
+    NET_UTIL_VAL_COPY(&p_if_hdr_ether->AddrSrc[0],                          /* Wr src addr into frame.                  */
+                      &p_if_data->HW_Addr[0],
+                       NET_IF_802x_ADDR_SIZE);
+
+                                                                            /* ---------- PREPARE FRAME TYPE ---------- */
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_if_hdr_ether->FrameType, &frame_type);
+
+                                                                            /* --------- CLR/PAD FRAME OCTETS --------- */
+    if (p_buf_hdr->TotLen < NET_IF_802x_FRAME_MIN_SIZE) {                   /* If tot len < min frame len (see Note #5a)*/
+        clr_buf_mem = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_CLR_MEM);
+        if (clr_buf_mem != DEF_YES) {                                       /* ... & buf mem NOT clr,               ... */
+            clr_ix   = p_buf_hdr->IF_HdrIx        + (CPU_INT16U)p_buf_hdr->TotLen;
+            clr_len  = NET_IF_802x_FRAME_MIN_SIZE - (CPU_INT16U)p_buf_hdr->TotLen;
+            clr_size = clr_ix + clr_len;
+            if (clr_size > p_buf_hdr->Size) {
+               *p_err = NET_BUF_ERR_INVALID_LEN;
+                return;
+            }
+            Mem_Clr((void     *)&p_buf->DataPtr[clr_ix],                    /* ... clr rem'ing octets (see Note #5b1).  */
+                    (CPU_SIZE_T) clr_len);
+        }
+        p_buf_hdr->TotLen = NET_IF_802x_FRAME_MIN_SIZE;                     /* Update tot frame len.                    */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_802x_TxPktDiscard()
+*
+* Description : On any 802x transmit error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_ctrs_err  Pointer to an 802x network interface error counters.
+*               ----------  Argument checked in NetIF_802x_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_802x_TxPktDiscard (NET_BUF               *p_buf,
+                                       NET_CTR_IF_802x_ERRS  *p_ctrs_err,
+                                       NET_ERR               *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.IFs.IFs_802x.TxPktDisCtr;
+    NET_CTR_ERR_INC(p_ctrs_err->TxPktDisCtr);
+#else
+    p_ctr = (NET_CTR *) 0;
+   (void)&p_ctrs_err;                                           /* Prevent possible 'variable unused' warnings.         */
+#endif
+
+   (void)NetBuf_FreeBuf(p_buf, p_ctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_802x_TxIxDataGet()
+*
+* Description : Get the offset of a buffer at which the IPv4 data can be written.
+*
+* Argument(s) : p_ix    Pointer to the current protocol index.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_IF_ERR_NONE
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_BufPoolCfgValidate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+static  void  NetIF_802x_TxIxDataGet (CPU_INT16U  *p_ix,
+                                      NET_ERR     *p_err)
+{
+    *p_ix  += NET_IF_HDR_SIZE_ETHER_MIN;
+    *p_err  = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_802x_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_802x.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_802x.h
new file mode 100644
index 0000000..038ea6f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_802x.h
@@ -0,0 +1,362 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK INTERFACE LAYER
+*
+*                                                802x
+*
+* Filename      : net_if_802x.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 EHS
+*                 SR
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Implements code common to the following network interface layers :
+*
+*                     (a) Ethernet as described in RFC # 894
+*                     (b) IEEE 802 as described in RFC #1042
+*
+*                 (2) Ethernet implementation conforms to RFC #1122, Section 2.3.3, bullets (a) & (b), but
+*                     does NOT implement bullet (c) :
+*
+*                     RFC #1122                  LINK LAYER                  October 1989
+*
+*                     2.3.3  ETHERNET (RFC-894) and IEEE 802 (RFC-1042) ENCAPSULATION
+*
+*                            Every Internet host connected to a 10Mbps Ethernet cable :
+*
+*                            (a) MUST be able to send and receive packets using RFC-894 encapsulation;
+*
+*                            (b) SHOULD be able to receive RFC-1042 packets, intermixed with RFC-894 packets; and
+*
+*                            (c) MAY be able to send packets using RFC-1042 encapsulation.
+*
+*                 (3) REQUIREs the following network protocol files in network directories :
+*
+*                     (a) Network Interface Layer located in the following network directory :
+*
+*                             \\IF\
+*
+*                     (b) Address Resolution Protocol    Layer located in the following network directory :
+*
+*                             \\
+*
+*                         See also 'net_arp.h  Note #1'.
+*
+*                              where
+*                                          directory path for network protocol suite
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_if.h"
+#include  "../Source/net_cfg_net.h"
+#include  "../Source/net_ascii.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) 802x Interface module is included only if support for any of the following devices
+*               is configured :
+*
+*               (a) Ethernet
+*               (b) Wireless
+*
+*               See 'net_cfg_net.h  NETWORK INTERFACE LAYER CONFIGURATION  Note #2a2'.
+*
+*           (2) The following 802x-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require 802x configuration :
+*
+*                   NET_IF_802x_MODULE_EN
+*
+*               See 'net_cfg_net.h  NETWORK INTERFACE LAYER CONFIGURATION  Note #2a2'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IF_802x_MODULE_PRESENT                             /* See Note #2c.                                        */
+#define  NET_IF_802x_MODULE_PRESENT
+
+
+#ifdef   NET_IF_802x_MODULE_EN                             /* See Note #2.                                         */
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_arp.h"                                /* See 'net_if_802x.h  Note #3b'.                       */
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  NETWORK INTERFACE / 802x DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IF_802x_ADDR_SIZE                        NET_IF_802x_HW_ADDR_LEN   /* Size of 48-bit Ether MAC addr (in octets).   */
+#define  NET_IF_802x_ADDR_SIZE_STR                    NET_ASCII_LEN_MAX_ADDR_MAC
+#define  NET_IF_ETHER_ADDR_SIZE                       NET_IF_802x_ADDR_SIZE     /* Req'd for backwards-compatibility.   */
+
+
+
+/*
+*********************************************************************************************************
+*                         802x SIZE & MAXIMUM TRANSMISSION UNIT (MTU) DEFINES
+*
+* Note(s) : (1) (a) RFC #894, Section 'Frame Format' & RFC #1042, Section 'Frame Format and MAC Level Issues :
+*                   For IEEE 802.3' specify the following range on Ethernet & IEEE 802 frame sizes :
+*
+*                   (1) Minimum frame size =   64 octets
+*                   (2) Maximum frame size = 1518 octets
+*
+*               (b) Since the 4-octet CRC trailer included in the specified minimum & maximum frame sizes is
+*                   NOT necessarily included or handled by the network protocol suite, the minimum & maximum
+*                   frame sizes for receive & transmit packets is adjusted by the CRC size.
+*********************************************************************************************************
+*/
+
+#define  NET_IF_802x_FRAME_CRC_SIZE                        4
+#define  NET_IF_ETHER_FRAME_CRC_SIZE                     NET_IF_802x_FRAME_CRC_SIZE /* Req'd for backwards-compatibility.   */
+
+#define  NET_IF_802x_FRAME_MIN_CRC_SIZE                   64    /* See Note #1a1.                                           */
+#define  NET_IF_802x_FRAME_MIN_SIZE                     (NET_IF_802x_FRAME_MIN_CRC_SIZE - NET_IF_802x_FRAME_CRC_SIZE)
+#define  NET_IF_ETHER_FRAME_MIN_SIZE                     NET_IF_802x_FRAME_MIN_SIZE
+
+#define  NET_IF_802x_FRAME_MAX_CRC_SIZE                 1518    /* See Note #1a2.                                           */
+
+                                                                /* Must keep for backyard compatibility.                    */
+#define  NET_IF_ETHER_FRAME_MAX_CRC_SIZE                 NET_IF_802x_FRAME_MAX_CRC_SIZE
+#define  NET_IF_ETHER_FRAME_MAX_SIZE                    (NET_IF_802x_FRAME_MAX_CRC_SIZE - NET_IF_802x_FRAME_CRC_SIZE)
+
+#define  NET_IF_802x_FRAME_MAX_SIZE                     (NET_IF_802x_FRAME_MAX_CRC_SIZE - NET_IF_802x_FRAME_CRC_SIZE)
+
+
+#define  NET_IF_MTU_ETHER                               (NET_IF_802x_FRAME_MAX_CRC_SIZE - NET_IF_802x_FRAME_CRC_SIZE - NET_IF_HDR_SIZE_ETHER)
+#define  NET_IF_MTU_IEEE_802                            (NET_IF_802x_FRAME_MAX_CRC_SIZE - NET_IF_802x_FRAME_CRC_SIZE - NET_IF_HDR_SIZE_IEEE_802)
+
+#define  NET_IF_IEEE_802_SNAP_CODE_SIZE                  3u     /*  3-octet SNAP org code         (see Note #1).        */
+
+#define  NET_IF_802x_BUF_SIZE_MIN                       (NET_IF_ETHER_FRAME_MIN_SIZE    + NET_BUF_DATA_SIZE_MIN      - NET_BUF_DATA_PROTOCOL_HDR_SIZE_MIN)
+
+
+#define  NET_IF_802x_BUF_RX_LEN_MIN                      NET_IF_ETHER_FRAME_MAX_SIZE
+#define  NET_IF_802x_BUF_TX_LEN_MIN                      NET_IF_ETHER_FRAME_MIN_SIZE
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                             NETWORK INTERFACE HEADER / FRAME DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------- NET IF 802x HDR ------------------ */
+typedef  struct  net_if_hdr_802x {
+    CPU_INT08U  AddrDest[NET_IF_802x_ADDR_SIZE];                /*       802x dest  addr.                               */
+    CPU_INT08U  AddrSrc[NET_IF_802x_ADDR_SIZE];                 /*       802x src   addr.                               */
+    CPU_INT16U  FrameType_Len;                                  /* Demux 802x frame type vs. IEEE 802.3 frame len.      */
+} NET_IF_HDR_802x;
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+                                                                                        /* -------- INIT FNCTS -------- */
+void         NetIF_802x_Init                     (NET_ERR                *p_err);
+
+                                                                                        /* --------- RX FNCTS --------- */
+void         NetIF_802x_Rx                       (NET_IF                 *p_if,
+                                                  NET_BUF                *p_buf,
+                                                  NET_CTR_IF_802x_STATS  *p_ctrs_stat,
+                                                  NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                                  NET_ERR                *p_err);
+
+                                                                                        /* --------- TX FNCTS --------- */
+void         NetIF_802x_Tx                       (NET_IF                 *p_if,
+                                                  NET_BUF                *p_buf,
+                                                  NET_CTR_IF_802x_STATS  *p_ctrs_stat,
+                                                  NET_CTR_IF_802x_ERRS   *p_ctrs_err,
+                                                  NET_ERR                *p_err);
+
+                                                                                        /* -------- MGMT FNCTS -------- */
+void         NetIF_802x_AddrHW_Get               (NET_IF                 *p_if,
+                                                  CPU_INT08U             *p_addr_hw,
+                                                  CPU_INT08U             *p_addr_len,
+                                                  NET_ERR                *p_err);
+
+void         NetIF_802x_AddrHW_Set               (NET_IF                 *p_if,
+                                                  CPU_INT08U             *p_addr_hw,
+                                                  CPU_INT08U              addr_len,
+                                                  NET_ERR                *p_err);
+
+CPU_BOOLEAN  NetIF_802x_AddrHW_IsValid           (NET_IF                 *p_if,
+                                                  CPU_INT08U             *p_addr_hw);
+
+void         NetIF_802x_AddrMulticastAdd         (NET_IF                 *p_if,
+                                                  CPU_INT08U             *p_addr_protocol,
+                                                  CPU_INT08U              addr_protocol_len,
+                                                  NET_PROTOCOL_TYPE       addr_protocol_type,
+                                                  NET_ERR                *p_err);
+
+void         NetIF_802x_AddrMulticastRemove      (NET_IF                 *p_if,
+                                                  CPU_INT08U             *p_addr_protocol,
+                                                  CPU_INT08U              addr_protocol_len,
+                                                  NET_PROTOCOL_TYPE       addr_protocol_type,
+                                                  NET_ERR                *p_err);
+
+void         NetIF_802x_AddrMulticastProtocolToHW(NET_IF                 *p_if,
+                                                  CPU_INT08U             *p_addr_protocol,
+                                                  CPU_INT08U              addr_protocol_len,
+                                                  NET_PROTOCOL_TYPE       addr_protocol_type,
+                                                  CPU_INT08U             *p_addr_hw,
+                                                  CPU_INT08U             *p_addr_hw_len,
+                                                  NET_ERR                *p_err);
+
+void         NetIF_802x_BufPoolCfgValidate       (NET_IF                 *p_if,
+                                                  NET_ERR                *p_err);
+
+void         NetIF_802x_MTU_Set                  (NET_IF                 *p_if,
+                                                  NET_MTU                 mtu,
+                                                  NET_ERR                *p_err);
+
+CPU_INT16U   NetIF_802x_GetPktSizeHdr            (NET_IF                 *p_if);
+
+CPU_INT16U   NetIF_802x_GetPktSizeMin            (NET_IF                 *p_if);
+
+CPU_INT16U   NetIF_802x_GetPktSizeMax            (NET_IF                 *p_if);
+
+CPU_BOOLEAN  NetIF_802x_PktSizeIsValid           (CPU_INT16U              size);
+
+
+void         NetIF_802x_ISR_Handler              (NET_IF                 *p_if,
+                                                  NET_DEV_ISR_TYPE        type,
+                                                  NET_ERR                *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_802x_MODULE_EN        */
+#endif  /* NET_IF_802x_MODULE_PRESENT   */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_ether.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_ether.c
new file mode 100644
index 0000000..3ef229c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_ether.c
@@ -0,0 +1,1072 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK INTERFACE LAYER
+*
+*                                              ETHERNET
+*
+* Filename      : net_if_ether.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 EHS
+*                 SR
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Supports Ethernet as described in RFC #894; supports IEEE 802 as described in RFC #1042.
+*
+*                 (2) Ethernet implementation conforms to RFC #1122, Section 2.3.3, bullets (a) & (b), but
+*                     does NOT implement bullet (c) :
+*
+*                     RFC #1122                  LINK LAYER                  October 1989
+*
+*                     2.3.3  ETHERNET (RFC-894) and IEEE 802 (RFC-1042) ENCAPSULATION
+*
+*                            Every Internet host connected to a 10Mbps Ethernet cable :
+*
+*                            (a) MUST be able to send and receive packets using RFC-894 encapsulation;
+*
+*                            (b) SHOULD be able to receive RFC-1042 packets, intermixed with RFC-894 packets; and
+*
+*                            (c) MAY be able to send packets using RFC-1042 encapsulation.
+*
+*                 (3) REQUIREs the following network protocol files in network directories :
+*
+*                     (a) Network Interface Layer           located in the following network directory :
+*
+*                             \\IF\
+*
+*                     (b) Address Resolution Protocol Layer located in the following network directory :
+*
+*                             \\
+*
+*                         See also 'net_arp.h  Note #1'.
+*
+*                              where
+*                                          directory path for network protocol suite
+*
+*                     (c) IEEE 802 Layer located in the following network directory :
+*
+*                             \\IF\
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_IF_MODULE_ETHER
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_if_ether.h"
+#include  "net_if.h"
+#include  "../Source/net_type.h"
+#include  "../Source/net_cfg_net.h"
+#include  "../Source/net_err.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                            /* ----------- RX FNCT ----------- */
+static  void  NetIF_Ether_Rx            (NET_IF      *p_if,
+                                         NET_BUF     *p_buf,
+                                         NET_ERR     *p_err);
+
+static  void  NetIF_Ether_RxPktDiscard  (NET_BUF     *p_buf,
+                                         NET_ERR     *p_err);
+
+
+                                                            /* ----------- TX FNCT ----------- */
+static  void  NetIF_Ether_Tx            (NET_IF      *p_if,
+                                         NET_BUF     *p_buf,
+                                         NET_ERR     *p_err);
+
+static  void  NetIF_Ether_TxPktDiscard  (NET_BUF     *p_buf,
+                                         NET_ERR     *p_err);
+
+
+                                                               /* -------- API FNCTS --------- */
+static  void  NetIF_Ether_IF_Add        (NET_IF      *p_if,
+                                         NET_ERR     *p_err);
+
+static  void  NetIF_Ether_IF_Start      (NET_IF      *p_if,
+                                         NET_ERR     *p_err);
+
+static  void  NetIF_Ether_IF_Stop       (NET_IF      *p_if,
+                                         NET_ERR     *p_err);
+
+
+                                                               /* -------- MGMT FNCTS -------- */
+static  void  NetIF_Ether_IO_CtrlHandler(NET_IF      *p_if,
+                                         CPU_INT08U   opt,
+                                         void        *p_data,
+                                         NET_ERR     *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+const  NET_IF_API  NetIF_API_Ether = {                                          /* Ether IF API fnct ptrs :             */
+                                       &NetIF_Ether_IF_Add,                     /*   Init/add                           */
+                                       &NetIF_Ether_IF_Start,                   /*   Start                              */
+                                       &NetIF_Ether_IF_Stop,                    /*   Stop                               */
+                                       &NetIF_Ether_Rx,                         /*   Rx                                 */
+                                       &NetIF_Ether_Tx,                         /*   Tx                                 */
+                                       &NetIF_802x_AddrHW_Get,                  /*   Hw        addr get                 */
+                                       &NetIF_802x_AddrHW_Set,                  /*   Hw        addr set                 */
+                                       &NetIF_802x_AddrHW_IsValid,              /*   Hw        addr valid               */
+                                       &NetIF_802x_AddrMulticastAdd,            /*   Multicast addr add                 */
+                                       &NetIF_802x_AddrMulticastRemove,         /*   Multicast addr remove              */
+                                       &NetIF_802x_AddrMulticastProtocolToHW,   /*   Multicast addr protocol-to-hw      */
+                                       &NetIF_802x_BufPoolCfgValidate,          /*   Buf cfg validation                 */
+                                       &NetIF_802x_MTU_Set,                     /*   MTU set                            */
+                                       &NetIF_802x_GetPktSizeHdr,               /*   Get pkt hdr size                   */
+                                       &NetIF_802x_GetPktSizeMin,               /*   Get pkt min size                   */
+                                       &NetIF_802x_GetPktSizeMax,
+                                       &NetIF_802x_ISR_Handler,                 /*   ISR handler                        */
+                                       &NetIF_Ether_IO_CtrlHandler              /*   I/O ctrl                           */
+                                     };
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          NetIF_Ether_Init()
+*
+* Description : (1) Initialize Ethernet Network Interface Module :
+*
+*                   Module initialization NOT yet required/implemented
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Ethernet network interface module
+*                                                                       successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_Ether_Init (NET_ERR  *p_err)
+{
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           NetIF_Ether_Rx()
+*
+* Description : Process received data packets & forward to network protocol layers.
+*
+*
+* Argument(s) : p_if        Pointer to an Ethernet network interface to transmit data packet(s).
+*               ----        Argument validated in NetIF_RxHandler().
+*
+*               p_buf       Pointer to a network buffer that received a packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Ethernet packet successfully received &
+*                                                                   processed.
+*                               NET_ERR_FAULT_NULL_PTR             Argument(s) passed a NULL pointer.
+*
+*                                                               - RETURNED BY NetIF_Ether_RxPktDiscard() : -
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt() via 'pif_api->Rx()'.
+*
+* Note(s)     : (1) Network buffer already freed by higher layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Ether_Rx (NET_IF   *p_if,
+                              NET_BUF  *p_buf,
+                              NET_ERR  *p_err)
+{
+    NET_CTR_IF_802x_STATS  *p_ctrs_stat;
+    NET_CTR_IF_802x_ERRS   *p_ctrs_err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.Ether.NullPtrCtr);
+        NetIF_Ether_RxPktDiscard(p_buf, p_err);
+       *p_err = NET_ERR_RX;
+        return;
+    }
+#endif
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    p_ctrs_stat = &Net_StatCtrs.IFs.Ether.IF_802xCtrs;
+#else
+    p_ctrs_stat = (NET_CTR_IF_802x_STATS *)0;
+#endif
+#if (NET_CTR_CFG_ERR_EN  == DEF_ENABLED)
+    p_ctrs_err  = &Net_ErrCtrs.IFs.Ether.IF_802xCtrs;
+#else
+    p_ctrs_err  = (NET_CTR_IF_802x_ERRS *)0;
+#endif
+
+
+                                                                /* ------------------- RX ETHER PKT ------------------- */
+    NetIF_802x_Rx(p_if,
+                  p_buf,
+                  p_ctrs_stat,
+                  p_ctrs_err,
+                  p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.Ether.RxPktCtr);
+             break;
+
+
+        case NET_ERR_RX:
+                                                                /* See Note #1.                                             */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.Ether.RxPktDisCtr);
+             break;
+
+
+        case NET_ERR_FAULT_NULL_PTR:
+        default:
+             NetIF_Ether_RxPktDiscard(p_buf, p_err);
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_Ether_RxPktDiscard()
+*
+* Description : On any receive error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*               -----       Argument checked in NetIF_WiFi_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Ether_RxPktDiscard (NET_BUF  *p_buf,
+                                        NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.IFs.Ether.RxPktDisCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf(p_buf, p_ctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetIF_Ether_Tx()
+*
+* Description : Prepare data packets from network protocol layers for Ethernet transmit.
+*
+* Argument(s) : p_if        Pointer to a network interface to transmit data packet(s).
+*               ----        Argument validated in NetIF_TxHandler().
+*
+*               p_buf       Pointer to network buffer with data packet to transmit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Ethernet packet successfully prepared
+*                                                                   for transmission.
+*                               NET_IF_ERR_TX_ADDR_PEND         Ethernet packet successfully prepared
+*                                                                   & queued for later transmission.
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPkt() via 'pif_api->Tx()'.
+*
+* Note(s)     : (1) Network buffer already freed by higher layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Ether_Tx (NET_IF   *p_if,
+                              NET_BUF  *p_buf,
+                              NET_ERR  *p_err)
+{
+    NET_CTR_IF_802x_STATS  *p_ctrs_stat;
+    NET_CTR_IF_802x_ERRS   *p_ctrs_err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetIF_Ether_TxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.Ether.NullPtrCtr);
+       *p_err = NET_ERR_TX;
+        return;
+    }
+#endif
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    p_ctrs_stat = &Net_StatCtrs.IFs.Ether.IF_802xCtrs;
+#else
+    p_ctrs_stat = (NET_CTR_IF_802x_STATS *)0;
+#endif
+#if (NET_CTR_CFG_ERR_EN  == DEF_ENABLED)
+    p_ctrs_err  = &Net_ErrCtrs.IFs.Ether.IF_802xCtrs;
+#else
+    p_ctrs_err  = (NET_CTR_IF_802x_ERRS *)0;
+#endif
+
+
+                                                                /* --------------- PREPARE ETHER TX PKT --------------- */
+    NetIF_802x_Tx(p_if,
+                  p_buf,
+                  p_ctrs_stat,
+                  p_ctrs_err,
+                  p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.Ether.TxPktCtr);
+             break;
+
+
+        case NET_IF_ERR_TX_ADDR_PEND:
+             break;
+
+
+        case NET_ERR_TX:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.Ether.TxPktDisCtr);
+             break;
+
+
+        case NET_ERR_FAULT_NULL_PTR:
+        default:
+             NetIF_Ether_TxPktDiscard(p_buf, p_err);
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_Ether_TxPktDiscard()
+*
+* Description : On any Ethernet transmit error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*               -----       Argument checked in NetIF_Ether_Tx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Ether_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Ether_TxPktDiscard (NET_BUF  *p_buf,
+                                        NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.IFs.Ether.TxPktDisCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+
+   (void)NetBuf_FreeBuf(p_buf, p_ctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_Ether_IF_Add()
+*
+* Description : (1) Add & initialize an Ethernet network interface :
+*
+*                   (a) Validate   Ethernet device configuration
+*                   (b) Initialize Ethernet device data area
+*                   (c) Perform    Ethernet/OS initialization
+*                   (d) Initialize Ethernet device hardware MAC address
+*                   (e) Initialize Ethernet device hardware
+*                   (f) Initialize Ethernet device MTU
+*                   (g) Configure  Ethernet interface
+*
+*
+* Argument(s) : p_if        Pointer to Ethernet network interface to add.
+*               ----        Argument validated in NetIF_Add().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Ethernet interface successfully added.
+*                               NET_ERR_FAULT_MEM_ALLOC             Insufficient resources available to add
+*                                                                       Ethernet interface.
+*                               NET_IF_ERR_INVALID_CFG              Invalid/NULL network interface API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT                Invalid NULL network interface function pointer.
+*
+*                               NET_DEV_ERR_INVALID_CFG             Invalid/NULL network device    API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT               Invalid NULL network device    function pointer.
+*
+*                                                                   -------- RETURNED BY NetDev_Init() : ---------
+*                                                                   See NetDev_Init() for addtional return error codes.
+*
+*                                                                   ------- RETURNED BY 'pdev_api->Init()' : --------
+*                                                                   See specific network device(s) 'Init()' for
+*                                                                       additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Add() via 'pif_api->Add()'.
+*
+* Note(s)     : (2) This function sets the interface MAC address to all 0's.  This ensures that the
+*                   device driver can compare the MAC for all 0 in order to check if the MAC has
+*                   been configured before.
+*
+*               (3) The return error is not checked because there isn't anything that can be done from
+*                   software in order to recover from a device hardware initializtion error.  The cause
+*                   is most likely associated with either a driver or hardware failure.  The best
+*                   course of action it to increment the interface number & allow software to attempt
+*                   to bring up the next interface.
+*
+*               (4) Upon adding an Ethernet interface, the highest possible Ethernet MTU is configured.
+*                   If this value needs to be changed, either prior to starting the interface, or during
+*                   run-time, it may be reconfigured by calling NetIF_MTU_Set() from the application.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Ether_IF_Add (NET_IF   *p_if,
+                                  NET_ERR  *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_BOOLEAN         flags_invalid;
+    NET_PHY_API_ETHER  *p_phy_api;
+    NET_PHY_CFG_ETHER  *p_phy_cfg;
+    CPU_BOOLEAN         phy_api_none;
+    CPU_BOOLEAN         phy_api_avail;
+#endif
+    NET_DEV_CFG_ETHER  *p_dev_cfg;
+    NET_DEV_API_ETHER  *p_dev_api;
+    NET_IF_DATA_ETHER  *p_if_data;
+    void               *p_addr_hw;
+    CPU_SIZE_T          reqd_octets;
+    NET_BUF_SIZE        buf_size_max;
+    NET_MTU             mtu_max;
+    LIB_ERR             err_lib;
+
+
+    p_dev_cfg = (NET_DEV_CFG_ETHER *)p_if->Dev_Cfg;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    p_phy_api = (NET_PHY_API_ETHER *)p_if->Ext_API;
+    p_phy_cfg = (NET_PHY_CFG_ETHER *)p_if->Ext_Cfg;
+
+    phy_api_none  = ((p_phy_api == (void *)0) &&
+                     (p_phy_cfg == (void *)0)) ? DEF_YES : DEF_NO;
+    phy_api_avail = ((p_phy_api != (void *)0) &&
+                     (p_phy_cfg != (void *)0)) ? DEF_YES : DEF_NO;
+    if ((phy_api_none  != DEF_YES) &&                           /* If phy API NOT NULL                           ...    */
+        (phy_api_avail != DEF_YES)) {                           /* ... or avail (see Note #4b);                  ...    */
+        *p_err =  NET_PHY_ERR_INVALID_CFG;                      /* ... & rtn err.                                       */
+         goto exit;
+    }
+
+                                                                /* ----------------- VALIDATE DEV CFG ----------------- */
+    flags_invalid = DEF_BIT_IS_SET_ANY(p_dev_cfg->Flags,
+                   (NET_DEV_CFG_FLAGS)~NET_DEV_CFG_FLAG_MASK);
+    if (flags_invalid == DEF_YES) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        goto exit;
+    }
+
+                                                                /* ----------------- VALIDATE PHY CFG ----------------- */
+    if (p_if->Ext_API != (NET_PHY_API_ETHER *)0) {
+        switch (p_phy_cfg->Spd) {                               /* Validate phy bus spd.                                */
+            case NET_PHY_SPD_10:
+            case NET_PHY_SPD_100:
+            case NET_PHY_SPD_1000:
+            case NET_PHY_SPD_AUTO:
+                 break;
+
+            default:
+                *p_err = NET_DEV_ERR_INVALID_CFG;
+                 goto exit;
+        }
+
+
+        switch (p_phy_cfg->Duplex) {                            /* Validate phy bus duplex.                             */
+            case NET_PHY_DUPLEX_HALF:
+            case NET_PHY_DUPLEX_FULL:
+            case NET_PHY_DUPLEX_AUTO:
+                 break;
+
+            default:
+                *p_err = NET_DEV_ERR_INVALID_CFG;
+                 goto exit;
+        }
+    }
+#endif
+
+                                                                /* ------------------- CFG ETHER IF ------------------- */
+    p_if->Type = NET_IF_TYPE_ETHER;                             /* Set IF type to Ether.                                */
+
+
+    NetIF_BufPoolInit(p_if, p_err);                             /* Init IF's buf pools.                                 */
+    if (*p_err != NET_IF_ERR_NONE) {                            /* On any err(s);                                  ...  */
+         goto exit;
+    }
+
+                                                                /* ------------- INIT ETHER DEV DATA AREA ------------- */
+    p_if->IF_Data = Mem_HeapAlloc((CPU_SIZE_T  ) sizeof(NET_IF_DATA_ETHER),
+                                  (CPU_SIZE_T  ) sizeof(void *),
+                                  (CPU_SIZE_T *)&reqd_octets,
+                                  (LIB_ERR    *)&err_lib);
+    if (p_if->IF_Data == (void *)0) {
+       *p_err = NET_ERR_FAULT_MEM_ALLOC;
+        goto exit;
+    }
+
+    p_if_data = (NET_IF_DATA_ETHER *)p_if->IF_Data;
+
+
+
+                                                                /* --------------- INIT IF HW/MAC ADDR ---------------- */
+    p_addr_hw = &p_if_data->HW_Addr[0];
+    Mem_Clr((void     *)p_addr_hw,                              /* Clr hw addr (see Note #2).                           */
+            (CPU_SIZE_T)NET_IF_802x_ADDR_SIZE);
+
+                                                                /* ------------------- INIT DEV HW -------------------- */
+    p_dev_api = (NET_DEV_API_ETHER *)p_if->Dev_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_dev_api == (NET_DEV_API_ETHER *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        goto exit;
+    }
+    if (p_dev_api->Init == (void (*)(NET_IF  *,
+                                     NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        goto exit;
+    }
+#endif
+
+    p_dev_api->Init(p_if, p_err);                               /* Init but don't start dev HW.                         */
+    if (*p_err != NET_DEV_ERR_NONE) {                           /* See Note #3.                                         */
+         goto exit;
+    }
+
+                                                                /* --------------------- INIT MTU --------------------- */
+    buf_size_max = DEF_MAX(p_dev_cfg->TxBufLargeSize,
+                           p_dev_cfg->TxBufSmallSize);
+    mtu_max      = DEF_MIN(NET_IF_MTU_ETHER, buf_size_max);
+    p_if->MTU    = mtu_max;                                     /* Set Ether MTU (see Note #4).                         */
+
+
+   *p_err = NET_IF_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_Ether_IF_Start()
+*
+* Description : (1) Start an Ethernet Network Interface :
+*
+*                   (a) Start Ethernet device
+*                   (b) Start Ethernet physical layer, if available :
+*                       (1) Initialize physical layer
+*                       (2) Enable     physical layer
+*                       (3) Check      physical layer link status
+*
+*
+* Argument(s) : p_if        Pointer to Ethernet network interface to start.
+*               ----        Argument validated in NetIF_Start().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Ethernet interface successfully started.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               ----- RETURNED BY 'pphy_api->Init()' : -----
+*                                                               See specific PHY device(s)  'Init()'
+*                                                                   for additional return error codes.
+*
+*                                                               - RETURNED BY 'pphy_api->LinkStateSet()' : -
+*                                                               See specific PHY device(s) 'LinkStateSet()'
+*                                                                   for additional return error codes.
+*
+*                                                               ---- RETURNED BY 'pdev_api->Start()' : -----
+*                                                               See specific network device(s) 'Start()'
+*                                                                   for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Start() via 'pif_api->Start()'.
+*
+* Note(s)     : (2) If present, an attempt will be made to initialize the Ethernet Phy (Physical Layer).
+*                   This function assumes that the device driver has initialized the Phy (R)MII bus prior
+*                   to the Phy initialization & link state get calls.
+*
+*               (3) The MII register block remains enabled while the Phy PWRDOWN bit is set.  Thus all
+*                   parameters may be configured PRIOR to enabling the analog portions of the Phy logic.
+*
+*               (4) If the Phy enable or link state get functions return an error, they may be ignored
+*                   since the Phy may be enabled by default after reset, & the link may become established
+*                   at a later time.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Ether_IF_Start (NET_IF   *p_if,
+                                    NET_ERR  *p_err)
+{
+    NET_DEV_LINK_ETHER   link_state;
+    NET_DEV_API_ETHER   *p_dev_api;
+    NET_PHY_API_ETHER   *p_phy_api;
+    NET_PHY_CFG_ETHER   *p_phy_cfg;
+    NET_ERR              phy_err;
+
+
+    p_dev_api = (NET_DEV_API_ETHER *)p_if->Dev_API;
+    p_phy_api = (NET_PHY_API_ETHER *)p_if->Ext_API;
+    p_phy_cfg = (NET_PHY_CFG_ETHER *)p_if->Ext_Cfg;
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_dev_api == (NET_DEV_API_ETHER *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_dev_api->Start == (void (*)(NET_IF  *,
+                                      NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+    p_dev_api->Start(p_if, p_err);                              /* Start dev.                                           */
+    if (*p_err != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+    if (p_phy_api != (NET_PHY_API_ETHER *)0) {                  /* If avail, ...                                        */
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+        if (p_phy_api->Init  == (void (*)(NET_IF  *,
+                                          NET_ERR *))0) {
+           *p_err = NET_ERR_FAULT_NULL_FNCT;
+            return;
+        }
+        if (p_phy_api->EnDis == (void (*)(NET_IF    *,
+                                          CPU_BOOLEAN,
+                                          NET_ERR   *))0) {
+           *p_err = NET_ERR_FAULT_NULL_FNCT;
+            return;
+        }
+        if (p_phy_api->LinkStateGet == (void (*)(NET_IF             *,
+                                                 NET_DEV_LINK_ETHER *,
+                                                 NET_ERR            *))0) {
+           *p_err = NET_ERR_FAULT_NULL_FNCT;
+            return;
+        }
+        if (p_phy_api->LinkStateSet == (void (*)(NET_IF             *,
+                                                 NET_DEV_LINK_ETHER *,
+                                                 NET_ERR            *))0) {
+           *p_err = NET_ERR_FAULT_NULL_FNCT;
+            return;
+        }
+
+        if (p_phy_cfg == (NET_PHY_CFG_ETHER *)0) {
+           *p_err = NET_IF_ERR_INVALID_CFG;
+            return;
+        }
+#endif
+        p_phy_api->Init(p_if, p_err);                           /* ... init Phy (see Note #2).                          */
+        switch (*p_err) {
+            case NET_PHY_ERR_NONE:
+            case NET_PHY_ERR_TIMEOUT_AUTO_NEG:                  /* Initial auto-negotiation err is passive when ...     */
+                 break;                                         /* ... Phy is dis'd from reset / init.                  */
+
+
+            case NET_ERR_FAULT_NULL_PTR:
+            case NET_PHY_ERR_TIMEOUT_RESET:
+            case NET_PHY_ERR_TIMEOUT_REG_RD:
+            case NET_PHY_ERR_TIMEOUT_REG_WR:
+            default:
+                 return;
+        }
+
+                                                                /* Cfg link state (see Note #3).                        */
+        link_state.Spd    = p_phy_cfg->Spd;
+        link_state.Duplex = p_phy_cfg->Duplex;
+        p_phy_api->LinkStateSet(p_if, &link_state, p_err);
+        switch (*p_err) {
+            case NET_PHY_ERR_NONE:
+            case NET_PHY_ERR_TIMEOUT_AUTO_NEG:
+                 break;
+
+            default:
+                 return;
+        }
+
+        p_phy_api->EnDis(p_if, DEF_ENABLED, &phy_err);          /* En Phy.                                              */
+       (void)&phy_err;                                          /* See Note #4.                                         */
+
+        p_phy_api->LinkStateGet(p_if, &link_state, &phy_err);   /* See Note #4.                                         */
+        if (phy_err != NET_PHY_ERR_NONE) {
+             p_if->Link = NET_IF_LINK_DOWN;
+        } else {
+            if (link_state.Spd > NET_PHY_SPD_0) {
+                p_if->Link = NET_IF_LINK_UP;
+            } else {
+                p_if->Link = NET_IF_LINK_DOWN;
+            }
+        }
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_Ether_IF_Stop()
+*
+* Description : (1) Stop Specific Network Interface :
+*
+*                   (a) Stop Ethernet device
+*                   (b) Stop Ethernet physical layer, if available
+*
+*
+* Argument(s) : p_if        Pointer to Ethernet network interface to stop.
+*               ----        Argument validated in NetIF_Stop().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Ethernet interface successfully stopped.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               --- RETURNED BY 'pdev_api->Stop()' : ---
+*                                                               See specific network device(s) 'Stop()'
+*                                                                   for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Stop() via 'pif_api->Stop()'.
+*
+* Note(s)     : (2) If the Phy returns an error, it may be ignored since the device has been successfully
+*                   stopped.  One side effect may be that the Phy remains powered on & possibly linked.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Ether_IF_Stop (NET_IF   *p_if,
+                                   NET_ERR  *p_err)
+{
+    NET_DEV_API_ETHER  *p_dev_api;
+    NET_PHY_API_ETHER  *p_phy_api;
+    NET_ERR             phy_err;
+
+
+    p_dev_api = (NET_DEV_API_ETHER *)p_if->Dev_API;
+    p_phy_api = (NET_PHY_API_ETHER *)p_if->Ext_API;
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_dev_api == (NET_DEV_API_ETHER *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_dev_api->Stop == (void (*)(NET_IF  *,
+                                     NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+    p_dev_api->Stop(p_if, p_err);
+    if (*p_err != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+    if (p_phy_api != (void *)0) {
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+        if (p_phy_api->EnDis == (void (*)(NET_IF    *,
+                                          CPU_BOOLEAN,
+                                          NET_ERR   *))0) {
+           *p_err = NET_ERR_FAULT_NULL_FNCT;
+            return;
+        }
+#endif
+        p_phy_api->EnDis(p_if, DEF_DISABLED, &phy_err);         /* Disable Phy.                                         */
+       (void)&phy_err;                                          /* See Note #2.                                         */
+    }
+
+    p_if->Link = NET_IF_LINK_DOWN;
+
+   *p_err      = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_Ether_IO_CtrlHandler()
+*
+* Description : Handle an Ethernet interface's (I/O) control(s).
+*
+* Argument(s) : p_if        Pointer to an Ethernet network interface.
+*               ----        Argument validated in NetIF_IO_CtrlHandler().
+*
+*               opt         Desired I/O control option code to perform; additional control options may be
+*                           defined by the device driver :
+*
+*                               NET_IF_IO_CTRL_LINK_STATE_GET           Get    Ethernet interface's link state,
+*                                                                           'UP' or 'DOWN'.
+*                               NET_IF_IO_CTRL_LINK_STATE_GET_INFO      Get    Ethernet interface's detailed
+*                                                                           link state info.
+*                               NET_IF_IO_CTRL_LINK_STATE_UPDATE        Update Ethernet interface's link state.
+*
+*               p_data      Pointer to variable that will receive possible I/O control data (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Ethernet I/O control option successfully
+*                                                                   handled.
+*                               NET_ERR_FAULT_NULL_PTR             Argument(s) passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*
+*                                                               -- RETURNED BY 'pdev_api->IO_Ctrl()' : ---
+*                                                               See specific network device(s) 'IO_Ctrl()'
+*                                                                   for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_IO_CtrlHandler() via 'pif_api->IO_Ctrl()'.
+*
+* Note(s)     : (1) 'p_data' MUST point to a variable (or memory) that is sufficiently sized AND aligned
+*                    to receive any return data.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Ether_IO_CtrlHandler (NET_IF      *p_if,
+                                          CPU_INT08U   opt,
+                                          void        *p_data,
+                                          NET_ERR     *p_err)
+{
+    NET_DEV_API_ETHER   *p_dev_api;
+    NET_DEV_LINK_ETHER   p_link_info;
+    NET_IF_LINK_STATE   *p_link_state;
+
+
+    p_dev_api = (NET_DEV_API_ETHER *)p_if->Dev_API;
+
+                                                                /* ------------ VALIDATE NET DEV I/O PTRS ------------- */
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_data == (void *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+    if (p_dev_api == (NET_DEV_API_ETHER *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_dev_api->IO_Ctrl == (void (*)(NET_IF   *,
+                                        CPU_INT08U,
+                                        void     *,
+                                        NET_ERR  *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+                                                                /* ----------- HANDLE NET DEV I/O CTRL OPT ------------ */
+    switch (opt) {
+        case NET_IF_IO_CTRL_LINK_STATE_GET:
+             p_dev_api->IO_Ctrl((NET_IF   *) p_if,
+                                (CPU_INT08U) NET_IF_IO_CTRL_LINK_STATE_GET_INFO,
+                                (void     *)&p_link_info,       /* Get link state info.                                 */
+                                (NET_ERR  *) p_err);
+
+             p_link_state = (NET_IF_LINK_STATE *)p_data;        /* See Note #1.                                         */
+
+             if (*p_err       != NET_DEV_ERR_NONE) {
+                 *p_link_state = NET_IF_LINK_DOWN;
+                  return;
+             }
+
+             switch (p_link_info.Spd) {                         /* Demux link state from link spd.                      */
+                 case NET_PHY_SPD_10:
+                 case NET_PHY_SPD_100:
+                 case NET_PHY_SPD_1000:
+                     *p_link_state = NET_IF_LINK_UP;
+                      break;
+
+
+                 case NET_PHY_SPD_0:
+                 default:
+                     *p_link_state = NET_IF_LINK_DOWN;
+                      break;
+             }
+             break;
+
+
+        case NET_IF_IO_CTRL_LINK_STATE_UPDATE:
+                                                                /* Rtn err for unavail ctrl opt?                        */
+             break;
+
+
+        case NET_IF_IO_CTRL_LINK_STATE_GET_INFO:
+        default:                                                /* Handle other dev I/O opt(s).                         */
+             p_dev_api->IO_Ctrl((NET_IF   *)p_if,
+                                (CPU_INT08U)opt,
+                                (void     *)p_data,             /* See Note #1.                                         */
+                                (NET_ERR  *)p_err);
+             if (*p_err != NET_DEV_ERR_NONE) {
+                  return;
+             }
+             break;
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_ETHER_MODULE_EN   */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_ether.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_ether.h
new file mode 100644
index 0000000..af1e69f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_ether.h
@@ -0,0 +1,505 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK INTERFACE LAYER
+*
+*                                              ETHERNET
+*
+* Filename      : net_if_ether.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 EHS
+*                 SR
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Supports following network interface layers:
+*
+*                   (a) Ethernet                                See 'net_if_802x.h Note #1a'
+*
+*                   (b) IEEE 802                                See 'net_if_802x.h Note #1b'
+*
+*                 (2) Ethernet implementation conforms to RFC #1122, Section 2.3.3, bullets (a) & (b), but
+*                     does NOT implement bullet (c) :
+*
+*                     RFC #1122                  LINK LAYER                  October 1989
+*
+*                     2.3.3  ETHERNET (RFC-894) and IEEE 802 (RFC-1042) ENCAPSULATION
+*
+*                            Every Internet host connected to a 10Mbps Ethernet cable :
+*
+*                            (a) MUST be able to send and receive packets using RFC-894 encapsulation;
+*
+*                            (b) SHOULD be able to receive RFC-1042 packets, intermixed with RFC-894 packets; and
+*
+*                            (c) MAY be able to send packets using RFC-1042 encapsulation.
+*
+*                 (3) REQUIREs the following network protocol files in network directories :
+*
+*                     (a) (1) Network Interface Layer
+*                         (2) 802x    Interface layer
+*
+*                           Located in the following network directory
+*
+*                               \\IF\
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../Source/net_cfg_net.h"
+#include  "net_if_802x.h"
+#include  "../Source/net_buf.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Ethernet Interface module is included only if Ethernet devices are configured (see
+*               'net_cfg_net.h  NETWORK INTERFACE LAYER CONFIGURATION  Note #2a2').
+*
+*           (2) The following Ethernet-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require Ethernet configuration
+*               (see 'net_cfg_net.h  NETWORK INTERFACE LAYER CONFIGURATION  Note #2a2') :
+*
+*                   NET_IF_ETHER_MODULE_EN
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IF_ETHER_MODULE_PRESENT
+#define  NET_IF_ETHER_MODULE_PRESENT
+
+#ifdef  NET_IF_ETHER_MODULE_EN                             /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_if_802x.h"
+#include  "../Source/net_cache.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_IF_ETHER_BUF_RX_LEN_MIN     NET_IF_802x_BUF_RX_LEN_MIN
+#define  NET_IF_ETHER_BUF_TX_LEN_MIN     NET_IF_802x_BUF_TX_LEN_MIN
+
+
+/*
+*********************************************************************************************************
+*                                   ETHERNET PHYSICAL LAYER DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_PHY_SPD_0                                     0u   /* Link speed unknown, or link down.                    */
+#define  NET_PHY_SPD_10                                   10u   /* Link speed = 10mbps.                                 */
+#define  NET_PHY_SPD_100                                 100u   /* Link speed = 100mbps.                                */
+#define  NET_PHY_SPD_1000                               1000u   /* Link speed = 1000mbps.                               */
+#define  NET_PHY_SPD_AUTO                             0xFFFFu   /* Initial link spd determined by auto-negotiation.     */
+
+
+#define  NET_PHY_DUPLEX_UNKNOWN                            0u   /* Duplex uknown or auto-neg incomplete.                */
+#define  NET_PHY_DUPLEX_HALF                               1u   /* Duplex = Half Duplex.                                */
+#define  NET_PHY_DUPLEX_FULL                               2u   /* Duplex = Full Duplex.                                */
+#define  NET_PHY_DUPLEX_AUTO                               3u   /* Initial duplex   determined by auto-negotiation.     */
+
+#define  NET_PHY_BUS_MODE_MII                              0u   /* Phy attached to MAC via  MII bus.                    */
+#define  NET_PHY_BUS_MODE_RMII                             1u   /* Phy attached to MAC via RMII bus.                    */
+#define  NET_PHY_BUS_MODE_SMII                             2u   /* Phy attached to MAC via SMII bus.                    */
+#define  NET_PHY_BUS_MODE_GMII                             3u   /* Phy attached to MAC via GMII bus.                    */
+
+#define  NET_PHY_TYPE_INT                                  0u   /* Internal Phy attached to MAC.                        */
+#define  NET_PHY_TYPE_EXT                                  1u   /* External Phy attached to MAC.                        */
+
+#define  NET_PHY_ADDR_AUTO                              0xFFu   /* Detect   Phy addr automatically.                     */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     ETHERNET DEVICE DATA TYPES
+*
+* Note(s) : (1) The Ethernet interface configuration data type is a specific definition of a network
+*               device configuration data type.  Each specific network device configuration data type
+*               MUST define ALL generic network device configuration parameters, synchronized in both
+*               the sequential order & data type of each parameter.
+*
+*               Thus ANY modification to the sequential order or data types of generic configuration
+*               parameters MUST be appropriately synchronized between the generic network device
+*               configuration data type & the Ethernet interface configuration data type.
+*
+*               See also 'net_if.h  GENERIC NETWORK DEVICE CONFIGURATION DATA TYPE  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                    /* ---------------------- NET ETHER DEV CFG ----------------------- */
+typedef  struct  net_dev_cfg_ether {
+                                                    /* ----------------- GENERIC  NET DEV CFG MEMBERS ----------------- */
+    NET_IF_MEM_TYPE     RxBufPoolType;              /* Rx buf mem pool type :                                           */
+                                                    /*   NET_IF_MEM_TYPE_MAIN        bufs alloc'd from main      mem    */
+                                                    /*   NET_IF_MEM_TYPE_DEDICATED   bufs alloc'd from dedicated mem    */
+    NET_BUF_SIZE        RxBufLargeSize;             /* Size  of dev rx large buf data areas (in octets).                */
+    NET_BUF_QTY         RxBufLargeNbr;              /* Nbr   of dev rx large buf data areas.                            */
+    NET_BUF_SIZE        RxBufAlignOctets;           /* Align of dev rx       buf data areas (in octets).                */
+    NET_BUF_SIZE        RxBufIxOffset;              /* Offset from base ix to rx data into data area (in octets).       */
+
+
+    NET_IF_MEM_TYPE     TxBufPoolType;              /* Tx buf mem pool type :                                           */
+                                                    /*   NET_IF_MEM_TYPE_MAIN        bufs alloc'd from main      mem    */
+                                                    /*   NET_IF_MEM_TYPE_DEDICATED   bufs alloc'd from dedicated mem    */
+    NET_BUF_SIZE        TxBufLargeSize;             /* Size  of dev tx large buf data areas (in octets).                */
+    NET_BUF_QTY         TxBufLargeNbr;              /* Nbr   of dev tx large buf data areas.                            */
+    NET_BUF_SIZE        TxBufSmallSize;             /* Size  of dev tx small buf data areas (in octets).                */
+    NET_BUF_QTY         TxBufSmallNbr;              /* Nbr   of dev tx small buf data areas.                            */
+    NET_BUF_SIZE        TxBufAlignOctets;           /* Align of dev tx       buf data areas (in octets).                */
+    NET_BUF_SIZE        TxBufIxOffset;              /* Offset from base ix to tx data from data area (in octets).       */
+
+
+    CPU_ADDR            MemAddr;                    /* Base addr of (Ether dev's) dedicated mem, if avail.              */
+    CPU_ADDR            MemSize;                    /* Size      of (Ether dev's) dedicated mem, if avail.              */
+
+
+    NET_DEV_CFG_FLAGS   Flags;                      /* Opt'l bit flags.                                                 */
+
+                                                    /* ----------------- SPECIFIC NET DEV CFG MEMBERS ----------------- */
+    NET_BUF_QTY         RxDescNbr;                  /* Nbr rx dev desc's.                                               */
+    NET_BUF_QTY         TxDescNbr;                  /* Nbr tx dev desc's.                                               */
+
+
+    CPU_ADDR            BaseAddr;                   /* Base addr of Ether dev hw/regs.                                  */
+
+    CPU_DATA            DataBusSizeNbrBits;         /* Size      of Ether dev's data bus (in bits), if avail.           */
+
+    CPU_CHAR            HW_AddrStr[NET_IF_802x_ADDR_SIZE_STR]; /*  Ether IF's dev hw addr str.                         */
+
+} NET_DEV_CFG_ETHER;
+
+
+                                                    /* ---------------------- NET ETHER IF DATA ----------------------- */
+typedef  struct  net_if_data_ether {
+    CPU_INT08U      HW_Addr[NET_IF_802x_ADDR_SIZE]; /*              Ether IF's dev hw addr.                             */
+    CPU_INT08U      Phy_Addr;                       /* Base addr of Ether IF's Phy hw addr.                             */
+} NET_IF_DATA_ETHER;
+
+                                                    /* ---------------------- NET ETHER PHY CFG ----------------------- */
+typedef  struct  net_phy_cfg_ether {
+    CPU_INT08U      BusAddr;                        /* Phy bus  addr.                                                   */
+    CPU_INT08U      BusMode;                        /* Phy bus  mode.                                                   */
+    CPU_INT08U      Type;                           /* Phy      type.                                                   */
+    CPU_INT16U      Spd;                            /* Phy link spd.                                                    */
+    CPU_INT08U      Duplex;                         /* Phy link duplex.                                                 */
+} NET_PHY_CFG_ETHER;
+
+
+                                                    /* ------------------- NET ETHER DEV LINK STATE ------------------- */
+typedef  struct net_dev_link_state_ether {
+    CPU_INT16U      Spd;                            /* Link spd.                                                        */
+    CPU_INT08U      Duplex;                         /* Link duplex.                                                     */
+} NET_DEV_LINK_ETHER;
+
+
+/*
+*********************************************************************************************************
+*                                   ETHERNET DEVICE API DATA TYPES
+*
+* Note(s) : (1) (a) The Ethernet device application programming interface (API) data type is a specific
+*                   network device API data type definition which MUST define ALL generic network device
+*                   API functions, synchronized in both the sequential order of the functions & argument
+*                   lists for each function.
+*
+*                   Thus ANY modification to the sequential order or argument lists of the  generic API
+*                   functions MUST be appropriately synchronized between the generic network device API
+*                   data type & the Ethernet device API data type definition/instantiations.
+*
+*                   However, specific Ethernet device API data type definitions/instantiations MAY include
+*                   additional API functions after all generic Ethernet device API functions.
+*
+*               (b) ALL API functions MUST be defined with NO NULL functions for all specific Ethernet
+*                   device API instantiations.  Any specific Ethernet device API instantiation that does
+*                   NOT require a specific API's functionality MUST define an empty API function which
+*                   may need to return an appropriate error code.
+*
+*               See also 'net_if.h  GENERIC NETWORK DEVICE API DATA TYPE  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                                        /* ------------ NET ETHER DEV API ------------- */
+                                                                        /* Net Ether dev API fnct ptrs :                */
+typedef  struct  net_dev_api_ether {
+                                                                        /* ------- GENERIC  NET DEV API MEMBERS ------- */
+                                                                        /*   Init/add                                   */
+    void  (*Init)               (NET_IF              *pif,
+                                 NET_ERR             *p_err);
+                                                                        /*   Start                                      */
+    void  (*Start)              (NET_IF              *pif,
+                                 NET_ERR             *p_err);
+                                                                        /*   Stop                                       */
+    void  (*Stop)               (NET_IF              *pif,
+                                 NET_ERR             *p_err);
+
+                                                                        /*   Rx                                         */
+    void  (*Rx)                 (NET_IF              *pif,
+                                 CPU_INT08U         **p_data,
+                                 CPU_INT16U          *size,
+                                 NET_ERR             *p_err);
+                                                                        /*   Tx                                         */
+    void  (*Tx)                 (NET_IF              *pif,
+                                 CPU_INT08U          *p_data,
+                                 CPU_INT16U           size,
+                                 NET_ERR             *p_err);
+
+                                                                        /* ------- SPECIFIC NET DEV API MEMBERS ------- */
+                                                                        /*   Multicast addr add                         */
+    void  (*AddrMulticastAdd)   (NET_IF              *pif,
+                                 CPU_INT08U          *paddr_hw,
+                                 CPU_INT08U           addr_hw_len,
+                                 NET_ERR             *p_err);
+                                                                        /*   Multicast addr remove                      */
+    void  (*AddrMulticastRemove)(NET_IF              *pif,
+                                 CPU_INT08U          *paddr_hw,
+                                 CPU_INT08U           addr_hw_len,
+                                 NET_ERR             *p_err);
+
+                                                                        /*   ISR handler                                */
+    void  (*ISR_Handler)        (NET_IF              *pif,
+                                 NET_DEV_ISR_TYPE     type);
+
+                                                                        /*   I/O ctrl                                   */
+    void  (*IO_Ctrl)            (NET_IF              *pif,
+                                 CPU_INT08U           opt,
+                                 void                *p_data,
+                                 NET_ERR             *p_err);
+
+                                                                        /*   Phy reg rd                                 */
+    void  (*Phy_RegRd)          (NET_IF              *pif,
+                                 CPU_INT08U           phy_addr,
+                                 CPU_INT08U           reg_addr,
+                                 CPU_INT16U          *p_data,
+                                 NET_ERR             *p_err);
+                                                                        /*   Phy reg wr                                 */
+    void  (*Phy_RegWr)          (NET_IF              *pif,
+                                 CPU_INT08U           phy_addr,
+                                 CPU_INT08U           reg_addr,
+                                 CPU_INT16U           reg_data,
+                                 NET_ERR             *p_err);
+} NET_DEV_API_ETHER;
+
+
+                                                                        /* ------------ NET ETHER PHY API ------------- */
+                                                                        /* Net Ether phy API fnct ptrs :                */
+typedef  struct  net_phy_api_ether {
+                                                                        /*   Init                                       */
+    void  (*Init)               (NET_IF              *pif,
+                                 NET_ERR             *p_err);
+                                                                        /*   En/dis                                     */
+    void  (*EnDis)              (NET_IF              *pif,
+                                 CPU_BOOLEAN          en,
+                                 NET_ERR             *p_err);
+
+                                                                        /*   Link state get                             */
+    void  (*LinkStateGet)       (NET_IF              *pif,
+                                 NET_DEV_LINK_ETHER  *plink_state,
+                                 NET_ERR             *p_err);
+                                                                        /*   Link state set                             */
+    void  (*LinkStateSet)       (NET_IF              *pif,
+                                 NET_DEV_LINK_ETHER  *plink_state,
+                                 NET_ERR             *p_err);
+
+                                                                        /*   ISR                                        */
+    void  (*ISR_Handler)        (NET_IF              *pif);
+} NET_PHY_API_ETHER;
+
+
+/*
+*********************************************************************************************************
+*                              ETHERNET DEVICE BSP INTERFACE DATA TYPE
+*
+* Note(s) : (1) The generic Ethernet device board-support package (BSP) interface data type is a template/
+*               subset for all specific Ethernet device BSP interface data types.
+*
+*               (a) Each specific Ethernet device BSP interface data type definition SHOULD define ALL
+*                   generic Ethernet device BSP functions, synchronized in both the sequential order of
+*                   the functions & argument lists for each function.
+*
+*                   Thus ANY modification to the sequential order or argument lists of the generic BSP
+*                   functions SHOULD be appropriately synchronized between the generic Ethernet device
+*                   BSP interface data type & ALL specific Ethernet device BSP interface data type
+*                   definitions/instantiations.
+*
+*                   However, specific Ethernet device BSP interface data type definitions/instantiations
+*                   MAY include additional BSP functions after all generic Ethernet device BSP functions.
+*
+*               (b) (1) A specific Ethernet device BSP interface instantiation MAY define NULL functions
+*                       for any (or all) generic BSP functions provided that the specific Ethernet device
+*                       driver does NOT require those specific generic BSP function(s).
+*
+*                   (2) However, a specific Ethernet device driver that includes additional BSP functions
+*                       into its specific BSP interface data type definition SHOULD NOT then define any
+*                       NULL functions for these additional functions.
+*********************************************************************************************************
+*/
+
+                                                                        /* ------------ NET ETHER DEV BSP ------------- */
+                                                                        /* Net Ether dev BSP fnct ptrs :                */
+typedef  struct  net_dev_bsp_ether {
+    void        (*CfgClk)    (NET_IF   *pif,                            /* Cfg dev clk(s).                              */
+                              NET_ERR  *p_err);
+
+    void        (*CfgIntCtrl)(NET_IF   *pif,                            /* Cfg dev int ctrl(s).                         */
+                              NET_ERR  *p_err);
+
+    void        (*CfgGPIO)   (NET_IF   *pif,                            /* Cfg dev GPIO.                                */
+                              NET_ERR  *p_err);
+
+
+    CPU_INT32U  (*ClkFreqGet)(NET_IF   *pif,                            /* Get dev clk freq.                            */
+                              NET_ERR  *p_err);
+} NET_DEV_BSP_ETHER;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_IF_API  NetIF_API_Ether;                             /* Ether IF API fnct ptr(s).                    */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void  NetIF_Ether_Init(NET_ERR  *p_err);
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IF_CFG_ETHER_EN
+#error  "NET_IF_CFG_ETHER_EN        not #define'd in 'net_cfg.h'"
+#error  "                     [MUST be  DEF_DISABLED]           "
+#error  "                     [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_IF_CFG_ETHER_EN != DEF_DISABLED) && \
+        (NET_IF_CFG_ETHER_EN != DEF_ENABLED ))
+#error  "NET_IF_CFG_ETHER_EN  illegally #define'd in 'net_cfg.h'"
+#error  "                     [MUST be  DEF_DISABLED]           "
+#error  "                     [     ||  DEF_ENABLED ]           "
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_ETHER_MODULE_EN       */
+#endif  /* NET_IF_ETHER_MODULE_PRESENT  */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_loopback.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_loopback.c
new file mode 100644
index 0000000..ca0833d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_loopback.c
@@ -0,0 +1,2034 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  NETWORK LOOPBACK INTERFACE LAYER
+*
+* Filename      : net_if_loopback.c
+* Version       : V3.04.02
+* Programmer(s) : EHS
+*                 ITJ
+*********************************************************************************************************
+* Note(s)       : (1) Supports internal loopback communication.
+*
+*                     (a) Internal loopback interface is NOT linked to, associated with, or handled by
+*                         any physical network device(s) & therefore has NO physical protocol overhead.
+*
+*                 (2) REQUIREs the following network protocol files in network directories :
+*
+*                     (a) Network Interface Layer located in the following network directory :
+*
+*                             \\IF\
+*
+*                              where
+*                                          directory path for network protocol suite
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_IF_MODULE_LOOPBACK
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../Source/net_cfg_net.h"
+
+#include  "net_if_loopback.h"
+#include  "net_if.h"
+#include  "../Source/net_type.h"
+
+#ifdef NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_ipv4.h"
+#endif
+
+#ifdef NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ipv6.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IF_LOOPBACK_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_BUF        *NetIF_Loopback_RxQ_Head;   /* Ptr to loopback IF rx Q head.                        */
+static  NET_BUF        *NetIF_Loopback_RxQ_Tail;   /* Ptr to loopback IF rx Q tail.                        */
+
+static  NET_STAT_CTR    NetIF_Loopback_RxQ_PktCtr; /*    Net loopback IF rx pkts ctr.                      */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                                    /* ----------- RX FNCTS ----------- */
+
+static  void         NetIF_Loopback_RxQ_Add                  (NET_BUF            *p_buf);
+
+static  NET_BUF     *NetIF_Loopback_RxQ_Get                  (void);
+
+static  void         NetIF_Loopback_RxQ_Remove               (NET_BUF            *p_buf);
+
+static  void         NetIF_Loopback_RxQ_Unlink               (NET_BUF            *p_buf);
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void         NetIF_Loopback_RxPktValidateBuf         (NET_BUF_HDR        *p_buf_hdr,
+                                                              NET_ERR            *p_err);
+#endif
+
+static  void         NetIF_Loopback_RxPktDemux               (NET_BUF            *p_buf,
+                                                              NET_ERR            *p_err);
+
+static  void         NetIF_Loopback_RxPktDiscard             (NET_BUF            *p_buf,
+                                                              NET_ERR            *p_err);
+
+
+                                                                                    /* ----------- TX FNCTS ----------- */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void         NetIF_Loopback_TxPktValidate            (NET_BUF_HDR        *p_buf_hdr,
+                                                              NET_ERR            *p_err);
+#endif
+
+static  void         NetIF_Loopback_TxPktFree                (NET_BUF            *p_buf);
+
+static  void         NetIF_Loopback_TxPktDiscard             (NET_BUF            *p_buf,
+                                                              NET_ERR            *p_err);
+
+
+                                                                                    /* ---------- API FNCTS ----------- */
+
+static  void         NetIF_Loopback_IF_Add                   (NET_IF             *p_if,
+                                                              NET_ERR            *p_err);
+
+static  void         NetIF_Loopback_IF_Start                 (NET_IF             *p_if,
+                                                              NET_ERR            *p_err);
+
+static  void         NetIF_Loopback_IF_Stop                  (NET_IF             *p_if,
+                                                              NET_ERR            *p_err);
+
+
+                                                                                    /* ---------- MGMT FNCTS ---------- */
+
+static  void         NetIF_Loopback_AddrHW_Get               (NET_IF             *p_if,
+                                                              CPU_INT08U         *p_addr_hw,
+                                                              CPU_INT08U         *p_addr_len,
+                                                              NET_ERR            *p_err);
+
+static  void         NetIF_Loopback_AddrHW_Set               (NET_IF             *p_if,
+                                                              CPU_INT08U         *p_addr_hw,
+                                                              CPU_INT08U          addr_len,
+                                                              NET_ERR            *p_err);
+
+static  CPU_BOOLEAN  NetIF_Loopback_AddrHW_IsValid           (NET_IF             *p_if,
+                                                              CPU_INT08U         *p_addr_hw);
+
+
+static  void         NetIF_Loopback_AddrMulticastAdd         (NET_IF             *p_if,
+                                                              CPU_INT08U         *p_addr_protocol,
+                                                              CPU_INT08U          addr_protocol_len,
+                                                              NET_PROTOCOL_TYPE   addr_protocol_type,
+                                                              NET_ERR            *p_err);
+
+static  void         NetIF_Loopback_AddrMulticastRemove      (NET_IF             *p_if,
+                                                              CPU_INT08U         *p_addr_protocol,
+                                                              CPU_INT08U          addr_protocol_len,
+                                                              NET_PROTOCOL_TYPE   addr_protocol_type,
+                                                              NET_ERR            *p_err);
+
+static  void         NetIF_Loopback_AddrMulticastProtocolToHW(NET_IF             *p_if,
+                                                              CPU_INT08U         *p_addr_protocol,
+                                                              CPU_INT08U          addr_protocol_len,
+                                                              NET_PROTOCOL_TYPE   addr_protocol_type,
+                                                              CPU_INT08U         *p_addr_hw,
+                                                              CPU_INT08U         *p_addr_hw_len,
+                                                              NET_ERR            *p_err);
+
+
+
+static  void         NetIF_Loopback_BufPoolCfgValidate       (NET_IF             *p_if,
+                                                              NET_ERR            *p_err);
+
+
+static  void         NetIF_Loopback_MTU_Set                  (NET_IF             *p_if,
+                                                              NET_MTU             mtu,
+                                                              NET_ERR            *p_err);
+
+
+static  CPU_INT16U   NetIF_Loopback_GetPktSizeHdr            (NET_IF             *p_if);
+
+static  CPU_INT16U   NetIF_Loopback_GetPktSizeMin            (NET_IF             *p_if);
+
+static  CPU_INT16U   NetIF_Loopback_GetPktSizeMax            (NET_IF             *p_if);
+
+
+static  void         NetIF_Loopback_ISR_Handler              (NET_IF             *p_if,
+                                                              NET_DEV_ISR_TYPE    type,
+                                                              NET_ERR            *p_err);
+
+static  void         NetIF_Loopback_IO_CtrlHandler           (NET_IF             *p_if,
+                                                              CPU_INT08U          opt,
+                                                              void               *p_data,
+                                                              NET_ERR            *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if (NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+const  NET_IF_API  NetIF_API_Loopback = {                                           /* Loopback IF API fnct ptrs :      */
+                                          &NetIF_Loopback_IF_Add,                   /*   Init/add                       */
+                                          &NetIF_Loopback_IF_Start,                 /*   Start                          */
+                                          &NetIF_Loopback_IF_Stop,                  /*   Stop                           */
+                                           0,                                       /*   Rx                             */
+                                           0,                                       /*   Tx                             */
+                                          &NetIF_Loopback_AddrHW_Get,               /*   Hw        addr get             */
+                                          &NetIF_Loopback_AddrHW_Set,               /*   Hw        addr set             */
+                                          &NetIF_Loopback_AddrHW_IsValid,           /*   Hw        addr valid           */
+                                          &NetIF_Loopback_AddrMulticastAdd,         /*   Multicast addr add             */
+                                          &NetIF_Loopback_AddrMulticastRemove,      /*   Multicast addr remove          */
+                                          &NetIF_Loopback_AddrMulticastProtocolToHW,/*   Multicast addr protocol-to-hw  */
+                                          &NetIF_Loopback_BufPoolCfgValidate,       /*   Buf cfg validation             */
+                                          &NetIF_Loopback_MTU_Set,                  /*   MTU set                        */
+                                          &NetIF_Loopback_GetPktSizeHdr,            /*   Get pkt hdr size               */
+                                          &NetIF_Loopback_GetPktSizeMin,            /*   Get pkt min size               */
+                                          &NetIF_Loopback_GetPktSizeMax,            /*   Get pkt max size               */
+                                          &NetIF_Loopback_ISR_Handler,              /*   ISR handler                    */
+                                          &NetIF_Loopback_IO_CtrlHandler            /*   I/O ctrl                       */
+                                        };
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_Loopback_Init()
+*
+* Description : (1) Initialize Network Loopback Interface Module :
+*
+*                   (a) Initialize network loopback interface counter(s)
+*                   (b) Initialize network loopback interface receive queue pointers
+*                   (c) Add        network loopback interface
+*                   (d) Start      network loopback interface
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network Loopback Interface module
+*                                                                   successfully initialized.
+*
+*                                                               ------ RETURNED BY NetStat_CtrInit() : -------
+*                               NET_ERR_FAULT_NULL_PTR           Argument passed a NULL pointer.
+*
+*                                                               --------- RETURNED BY NetIF_Add() : ----------
+*                                                               -------- RETURNED BY NetIF_Start() : ---------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired (see Note #2b2).
+*
+*                                                               --------- RETURNED BY NetIF_Add() : ----------
+*                               NET_IF_ERR_INVALID_POOL_TYPE    Invalid network interface buffer pool type.
+*                               NET_IF_ERR_INVALID_POOL_ADDR    Invalid network interface buffer pool address.
+*                               NET_IF_ERR_INVALID_POOL_SIZE    Invalid network interface buffer pool size.
+*                               NET_IF_ERR_INVALID_POOL_QTY     Invalid network interface buffer pool number
+*                                                                   of buffers configured.
+*
+*                               NET_BUF_ERR_POOL_MEM_ALLOC           Network buffer pool initialization failed.
+*                               NET_BUF_ERR_INVALID_POOL_TYPE   Invalid network buffer pool type.
+*                               NET_BUF_ERR_INVALID_QTY         Invalid number of network buffers configured.
+*                               NET_BUF_ERR_INVALID_SIZE        Invalid size   of network buffer data areas
+*                                                                   configured.
+*                               NET_BUF_ERR_INVALID_IX          Invalid offset from base index into network
+*                                                                   buffer data area configured.
+*
+*                                                               -------- RETURNED BY NetIF_Start() : ---------
+*                               NET_IF_ERR_INVALID_STATE        Network interface already started.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) The following network loopback interface initialization functions MUST be sequenced
+*                   as follows :
+*
+*                   (a) NetIF_Loopback_Init() MUST precede ALL other network loopback interface
+*                           initialization functions
+*
+*                   (b) NetIF_Add() & NetIF_Start() MUST :
+*
+*                       (1) Follow  NetIF_Init()'s initialization       of the network global lock
+*                               (see also 'net_if.c  NetIF_Init()   Note #2b')
+*                       (2) Precede any network or application task access to the network global lock
+*                               (see also 'net_if.c  NetIF_Add()    Note #2'
+*                                       & 'net_if.c  NetIF_Start()  Note #2')
+*********************************************************************************************************
+*/
+
+void  NetIF_Loopback_Init (NET_ERR  *p_err)
+{
+#if (NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+    NET_IF_NBR  if_nbr;
+
+
+                                                                /* ----------- INIT NET LOOPBACK IF CTR(s) ------------ */
+    NetStat_CtrInit(&NetIF_Loopback_RxQ_PktCtr, p_err);
+    if (*p_err!= NET_STAT_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* -------------- INIT NET LOOPBACK RX Q -------------- */
+    NetIF_Loopback_RxQ_Head = (NET_BUF *)0;
+    NetIF_Loopback_RxQ_Tail = (NET_BUF *)0;
+
+                                                                /* ----------------- INIT LOOPBACK IF ----------------- */
+                                                                /* Start Loopback IF (see Note #2b).                    */
+    if_nbr = NetIF_Add((void    *)&NetIF_API_Loopback,          /* Loopback IF's                      API.              */
+                       (void    *) 0,                           /* Loopback IF   does NOT support dev API.              */
+                       (void    *) 0,                           /* Loopback IF   does NOT support dev BSP.              */
+                       (void    *)&NetIF_Cfg_Loopback,          /* Loopback IF's                  dev cfg.              */
+                       (void    *) 0,                           /* Loopback IF   does NOT support Phy API.              */
+                       (void    *) 0,                           /* Loopback IF   does NOT support Phy cfg.              */
+                       (NET_ERR *) p_err);
+    if (*p_err!= NET_IF_ERR_NONE) {
+         return;
+    }
+
+
+    NetIF_Start(if_nbr, p_err);                                 /* Start Loopback IF.                                   */
+    if (*p_err!= NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_Loopback_Rx()
+*
+* Description : (1) Receive & handle packets from the network loopback interface :
+*
+*                   (a) Receive packet from network loopback interface :
+*                       (1) Update  receive packet counters
+*                       (2) Get     receive packet from loopback receive queue
+*                   (b) Validate    receive packet
+*                   (c) Demultiplex receive packet to network layer protocols
+*                   (d) Update      receive statistics
+*
+*
+* Argument(s) : p_if        Pointer to network loopback interface that received a packet.
+*               ----        Argument validated in NetIF_RxHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Loopback packet successfully received & processed.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_FAULT_MEM_ALLOC         NO receive packets available on loopback interface.
+*
+*                                                               - RETURNED BY NetIF_Loopback_RxPktValidateBuf() : -
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+*                                                               ---- RETURNED BY NetIF_Loopback_RxPktDemux() : ----
+*                               NET_ERR_INVALID_PROTOCOL        Invalid loopback/network protocol.
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : Size of received packet, if NO error(s).
+*
+*               0,                       otherwise.
+*
+* Caller(s)   : NetIF_RxHandler().
+*
+* Note(s)     : (2) If a network interface receives a packet, its physical link must be 'UP' & the
+*                   interface's physical link state is set accordingly.
+*
+*                   (a) An attempt to check for link state is made after an interface has been started.
+*                       However, many physical layer devices, such as Ethernet physical layers require
+*                       several seconds for Auto-Negotiation to complete before the link becomes
+*                       established.  Thus the interface link flag is not updated until the link state
+*                       timer expires & one or more attempts to check for link state have been completed.
+*
+*               (3) When network buffer is demultiplexed to the network layer, the buffer's reference
+*                   counter is NOT incremented since the network loopback interface receive does NOT
+*                   maintain a reference to the buffer.
+*
+*               (4) Network buffer already freed by higher layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+NET_BUF_SIZE  NetIF_Loopback_Rx (NET_IF   *p_if,
+                                 NET_ERR  *p_err)
+{
+#if (NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+    NET_BUF       *p_buf;
+    NET_BUF_HDR   *p_buf_hdr;
+    NET_BUF_SIZE   size;
+    NET_ERR        err;
+
+
+   (void)&p_if;                                                 /* Prevent 'variable unused' compiler warning.          */
+
+                                                                /* ---------------- UPDATE LINK STATUS ---------------- */
+    p_if->Link = NET_IF_LINK_UP;                                /* See Note #2.                                         */
+
+
+                                                                /* -------------------- GET RX PKT -------------------- */
+    p_buf= NetIF_Loopback_RxQ_Get();                            /* Get pkt from loopback rx Q.                          */
+    if (p_buf== (NET_BUF *)0) {
+        NetIF_Loopback_RxPktDiscard(p_buf, &err);
+       *p_err =  NET_ERR_FAULT_MEM_ALLOC;
+        return (0u);
+    }
+
+    NetStat_CtrDec(&NetIF_Loopback_RxQ_PktCtr, &err);           /* Dec loopback IF's nbr q'd rx pkts avail.             */
+
+    NET_CTR_STAT_INC(Net_StatCtrs.IFs.Loopback.RxPktCtr);
+
+
+                                                                /* ------------ VALIDATE RX'D LOOPBACK PKT ------------ */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetIF_Loopback_RxPktValidateBuf(p_buf_hdr, p_err);          /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetIF_Loopback_RxPktDiscard(p_buf, &err);
+             return (0u);
+    }
+#endif
+
+
+                                                                /* ------------------- DEMUX RX PKT ------------------- */
+    size = p_buf_hdr->TotLen;                                   /* Rtn pkt tot len/size.                                */
+                                                                /* See Note #3.                                         */
+    NetIF_Loopback_RxPktDemux(p_buf, p_err);
+
+
+                                                                /* ----------------- UPDATE RX STATS ------------------ */
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.Loopback.RxPktCompCtr);
+             break;
+
+
+        case NET_ERR_RX:
+                                                                /* See Note #4.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.Loopback.RxPktDisCtr);
+                                                                /* Rtn err from NetIF_Loopback_RxPktDemux().            */
+             return (0u);
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        default:
+             NetIF_Loopback_RxPktDiscard(p_buf, &err);
+             return (0u);
+    }
+
+
+                                                                /* ---------------- RTN RX'D DATA SIZE ---------------- */
+    return (size);
+
+
+
+#else
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+   *p_err =  NET_ERR_IF_LOOPBACK_DIS;
+
+    return (0u);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_Loopback_Tx()
+*
+* Description : (1) Transmit packets to the network loopback interface :
+*
+*                   (a) Validate loopback transmit packet
+*                   (b) Get      loopback receive  buffer
+*                   (c) Copy     loopback transmit packet to loopback receive buffer
+*                   (d) Post     loopback receive  packet to loopback receive queue
+*                   (e) Signal   network interface receive task
+*                   (f) Free     loopback transmit packet                                   See Note #4
+*                   (g) Update   loopback transmit statistics
+*
+*
+* Argument(s) : p_if        Pointer to network loopback interface.
+*               ----        Argument validated in NetIF_TxHandler().
+*
+*               p_buf_tx     Pointer to network buffer to transmit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Loopback packet successfully transmitted.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*
+*                               NET_ERR_INVALID_PROTOCOL        Invalid loopback/network protocol.
+*
+*                                                               - RETURNED BY NetIF_Loopback_TxPktDiscard() : -
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+*                                                               ----- RETURNED BY NetIF_RxTaskSignal() : ------
+*                               NET_IF_ERR_RX_Q_FULL            Network interface receive queue full.
+*                               NET_IF_ERR_RX_Q_SIGNAL_FAULT    Network interface receive queue signal fault.
+*
+*                                                               ---------- RETURNED BY NetBuf_Get() : ---------
+*                                                               ------ RETURNED BY NetBuf_GetDataPtr() : ------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                               NET_BUF_ERR_NONE_AVAIL          NO available buffers/data areas to allocate.
+*                               NET_BUF_ERR_INVALID_SIZE        Requested size is greater then the maximum
+*                                                                   buffer size available.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index.
+*                               NET_BUF_ERR_INVALID_LEN         Invalid buffer length.
+*
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                                                               ------- RETURNED BY NetBuf_DataCopy() : -------
+*                               NET_ERR_FAULT_NULL_PTR            Argument(s) passed a NULL pointer.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid buffer type.
+*
+* Return(s)   : Size of transmitted packet, if NO error(s).
+*
+*               0,                          otherwise.
+*
+* Caller(s)   : NetIF_TxHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Loopback buffer flag value to clear was previously initialized in NetBuf_Get() when
+*                   the buffer was allocated.  This buffer flag value does NOT need to be re-cleared but
+*                   is shown for completeness.
+*
+*               (3) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) For loopback receive buffers NOT yet posted to the network loopback interface
+*                       receive queue, the buffer MUST be freed by NetBuf_Free().
+*                   (b)     Loopback receive buffer data areas that have been linked to loopback receive
+*                       buffers are inherently freed    by NetBuf_Free().
+*                   (c)     Loopback receive buffers that have been queued to the loopback receive queue
+*                               are inherently unlinked by NetBuf_Free().
+*
+*               (4) Since loopback transmit packets are NOT asynchronously transmitted from network
+*                   devices, they do NOT need to be asynchronously deallocated by the network interface
+*                   transmit deallocation task (see 'net_if.c  NetIF_TxDeallocTaskHandler()  Note #1a').
+*********************************************************************************************************
+*/
+
+NET_BUF_SIZE  NetIF_Loopback_Tx (NET_IF   *p_if,
+                                 NET_BUF  *p_buf_tx,
+                                 NET_ERR  *p_err)
+{
+#if (NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+    NET_BUF       *p_buf_rx;
+    NET_BUF_HDR   *p_buf_hdr_rx;
+    NET_BUF_HDR   *p_buf_hdr_tx;
+    NET_BUF_SIZE   buf_data_ix_tx;
+    NET_BUF_SIZE   buf_data_ix_rx;
+    NET_BUF_SIZE   buf_data_ix_rx_offset;
+    NET_BUF_SIZE   buf_data_size_rx;
+    NET_BUF_SIZE   buf_data_len_tx;
+    NET_ERR        err;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                         /* --------------- VALIDATE PTR --------------- */
+    if (p_buf_tx == (NET_BUF *)0) {
+        NetIF_Loopback_TxPktDiscard(p_buf_tx, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.Loopback.NullPtrCtr);
+        return (0u);
+    }
+#endif
+
+
+                                                                        /* --------- VALIDATE LOOPBACK TX PKT --------- */
+    p_buf_hdr_tx = &p_buf_tx->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetIF_Loopback_TxPktValidate(p_buf_hdr_tx, p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetIF_Loopback_TxPktDiscard(p_buf_tx, p_err);
+             return (0u);
+    }
+#endif
+
+                                                                        /* ----------- GET LOOPBACK RX BUF ------------ */
+                                                                        /* Get rx buf.                                  */
+    buf_data_len_tx = p_buf_hdr_tx->TotLen;
+    buf_data_ix_rx  = NET_BUF_DATA_IX_RX;
+    p_buf_rx         = NetBuf_Get((NET_IF_NBR     ) NET_IF_NBR_LOOPBACK,
+                                 (NET_TRANSACTION) NET_TRANSACTION_RX,
+                                 (NET_BUF_SIZE   ) buf_data_len_tx,
+                                 (NET_BUF_SIZE   ) buf_data_ix_rx,
+                                 (NET_BUF_SIZE  *)&buf_data_ix_rx_offset,
+                                 (NET_BUF_FLAGS  ) NET_BUF_FLAG_NONE,
+                                 (NET_ERR       *)&err);
+    if (err != NET_BUF_ERR_NONE) {
+        NetIF_Loopback_TxPktDiscard(p_buf_tx, p_err);
+        return (0u);
+    }
+
+                                                                        /* Get rx buf data area.                        */
+    p_buf_rx->DataPtr = NetBuf_GetDataPtr((NET_IF        *) p_if,
+                                         (NET_TRANSACTION) NET_TRANSACTION_RX,
+                                         (NET_BUF_SIZE   ) buf_data_len_tx,
+                                         (NET_BUF_SIZE   ) buf_data_ix_rx,
+                                         (NET_BUF_SIZE  *)&buf_data_ix_rx_offset,
+                                         (NET_BUF_SIZE  *)&buf_data_size_rx,
+                                         (NET_BUF_TYPE  *) 0,
+                                         (NET_ERR       *)&err);
+    if (err != NET_BUF_ERR_NONE) {
+        NetBuf_Free(p_buf_rx);                                          /* See Note #3a.                                */
+        NetIF_Loopback_TxPktDiscard(p_buf_tx, p_err);
+        return (0u);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (buf_data_size_rx < buf_data_len_tx) {
+        NetBuf_Free(p_buf_rx);                                          /* See Note #3b.                                */
+        NetIF_Loopback_TxPktDiscard(p_buf_tx, p_err);
+        return (0u);
+    }
+#else
+   (void)&buf_data_size_rx;                                             /* Prevent 'variable unused' compiler warning.  */
+#endif
+
+    buf_data_ix_rx += buf_data_ix_rx_offset;
+
+
+                                                                        /* ------ COPY TX PKT TO LOOPBACK RX BUF ------ */
+                                                                        /* Cfg rx loopback buf ctrls.                   */
+    p_buf_hdr_rx                  = &p_buf_rx->Hdr;
+    p_buf_hdr_rx->TotLen          = (NET_BUF_SIZE     )buf_data_len_tx;
+    p_buf_hdr_rx->DataLen         = (NET_BUF_SIZE     )buf_data_len_tx;
+    p_buf_hdr_rx->ProtocolHdrType = (NET_PROTOCOL_TYPE)p_buf_hdr_tx->ProtocolHdrType;
+#if 0                                                                   /* Init'd in NetBuf_Get() [see Note #2].        */
+    DEF_BIT_CLR(p_buf_hdr_rx->Flags, NET_BUF_FLAG_RX_REMOTE);
+#endif
+
+    switch (p_buf_hdr_tx->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_IP_V4:
+             p_buf_hdr_rx->IP_HdrIx = (CPU_INT16U  )buf_data_ix_rx;
+             buf_data_ix_tx        = (NET_BUF_SIZE)p_buf_hdr_tx->IP_HdrIx;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[NET_IF_NBR_LOOPBACK].TxInvProtocolCtr);
+             NetBuf_Free(p_buf_rx);                                     /* See Note #3b.                                */
+             NetIF_Loopback_TxPktDiscard(p_buf_tx, p_err);
+             return (0u);
+    }
+
+                                                                        /* Copy tx loopback pkt into rx loopback buf.   */
+    NetBuf_DataCopy((NET_BUF    *) p_buf_rx,
+                    (NET_BUF    *) p_buf_tx,
+                    (NET_BUF_SIZE) buf_data_ix_rx,
+                    (NET_BUF_SIZE) buf_data_ix_tx,
+                    (NET_BUF_SIZE) buf_data_len_tx,
+                    (NET_ERR    *)&err);
+    if (err != NET_BUF_ERR_NONE) {
+        NetBuf_Free(p_buf_rx);                                          /* See Note #3b.                                */
+        NetIF_Loopback_TxPktDiscard(p_buf_tx, p_err);
+        return (0u);
+    }
+
+
+                                                                        /* ------- POST RX PKT TO LOOPBACK RX Q ------- */
+    NetIF_Loopback_RxQ_Add(p_buf_rx);                                   /* Post pkt to loopback rx q.                   */
+    NetStat_CtrInc(&NetIF_Loopback_RxQ_PktCtr, &err);                   /* Inc loopback IF's nbr q'd rx pkts avail.     */
+
+
+                                                                        /* ------------ SIGNAL IF RX TASK ------------- */
+    NetIF_RxTaskSignal(NET_IF_NBR_LOOPBACK, &err);
+    if (err != NET_IF_ERR_NONE) {
+        NetBuf_Free(p_buf_rx);                                          /* See Note #3c.                                */
+        NetIF_Loopback_TxPktDiscard(p_buf_tx, p_err);
+        return (0u);
+    }
+
+
+                                                                        /* ------ FREE TX PKT / UPDATE TX STATS ------- */
+    NetIF_Loopback_TxPktFree(p_buf_tx);                                 /* See Note #4.                                 */
+
+    NET_CTR_STAT_INC(Net_StatCtrs.IFs.Loopback.TxPktCtr);
+
+
+                                                                        /* ------------ RTN TX'D DATA SIZE ------------ */
+   *p_err =  NET_IF_ERR_NONE;
+
+    return (buf_data_len_tx);
+
+
+
+#else
+   (void)&p_if;                                                         /* Prevent 'variable unused' compiler warnings. */
+   (void)&p_buf_tx;
+
+   *p_err =  NET_ERR_IF_LOOPBACK_DIS;
+
+    return (0u);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       NetIF_Loopback_RxQ_Add()
+*
+* Description : Add a network packet into the Network Loopback Interface Receive Queue.
+*
+*               (1) Network packets that have been received via the Network Loopback Interface are queued
+*                   to await processing by the Network Interface Receive Task handler (see 'net_if.c
+*                   NetIF_RxTaskHandler()  Note #1').
+*
+*                   (a) Received network packet buffers are linked to form a Network Loopback Interface
+*                       Receive Queue.
+*
+*                       In the diagram below, ... :
+*
+*                       (1) The horizontal row represents the list of received network packet buffers.
+*
+*                       (2) (A) 'NetIF_Loopback_RxQ_Head' points to the head of the Network Loopback Interface
+*                                   Receive Queue;
+*                           (B) 'NetIF_Loopback_RxQ_Tail' points to the tail of the Network Loopback Interface
+*                                   Receive Queue.
+*
+*                       (3) Network buffers' 'PrevSecListPtr' & 'NextSecListPtr' doubly-link each network
+*                           packet  buffer to form the Network Loopback Interface Receive Queue.
+*
+*                   (b) The Network Loopback Interface Receive Queue is a FIFO Q :
+*
+*                       (1) Network packet buffers are added at     the tail of the Network Loopback Interface
+*                               Receive Queue;
+*                       (2) Network packet buffers are removed from the head of the Network Loopback Interface
+*                               Receive Queue.
+*
+*
+*                                      |                                               |
+*                                      |<- Network Loopback Interface Receive Queue -->|
+*                                      |                (see Note #1)                  |
+*
+*                                Packets removed from                        Packets added at
+*                                 Receive Queue head                        Receive Queue tail
+*                                  (see Note #1b2)                           (see Note #1b1)
+*
+*                                         |              NextSecListPtr             |
+*                                         |             (see Note #1a3)             |
+*                                         v                    |                    v
+*                                                              |
+*                       Head of        -------       -------   v   -------       -------  (see Note #1a2B)
+*                       Receive   ---->|     |------>|     |------>|     |------>|     |
+*                        Queue         |     |       |     |       |     |       |     |       Tail of
+*                                      |     |<------|     |<------|     |<------|     |<----  Receive
+*                  (see Note #1a2A)    |     |       |     |   ^   |     |       |     |        Queue
+*                                      |     |       |     |   |   |     |       |     |
+*                                      -------       -------   |   -------       -------
+*                                                              |
+*                                                        PrevSecListPtr
+*                                                       (see Note #1a3)
+*
+*
+* Argument(s) : p_buf       Pointer to a network buffer.
+*               -----       Argument validated in NetIF_Loopback_Tx().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Loopback_Tx().
+*
+* Note(s)     : (2) Some buffer controls were previously initialized in NetBuf_Get() when the buffer was
+*                   allocated.  These buffer controls do NOT need to be re-initialized but are shown for
+*                   completeness.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_RxQ_Add (NET_BUF  *p_buf)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_BUF_HDR  *p_buf_hdr_tail;
+
+                                                                /* ----------------- CFG NET BUF PTRS ----------------- */
+    p_buf_hdr                 = (NET_BUF_HDR *)&p_buf->Hdr;
+    p_buf_hdr->PrevSecListPtr = (NET_BUF     *) NetIF_Loopback_RxQ_Tail;
+    p_buf_hdr->NextSecListPtr = (NET_BUF     *) 0;
+                                                                /* Cfg buf's unlink fnct/obj to loopback rx Q.          */
+    p_buf_hdr->UnlinkFnctPtr  = (NET_BUF_FNCT )&NetIF_Loopback_RxQ_Unlink;
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #2].                */
+    p_buf_hdr->UnlinkObjPtr   = (void        *) 0;
+#endif
+
+                                                                /* ---------- ADD PKT BUF INTO LOOPBACK RX Q ---------- */
+    if (NetIF_Loopback_RxQ_Tail != (NET_BUF *)0) {              /* If Q NOT empty, add after tail.                      */
+        p_buf_hdr_tail                 = &NetIF_Loopback_RxQ_Tail->Hdr;
+        p_buf_hdr_tail->NextSecListPtr =  p_buf;
+    } else {                                                    /* Else add first pkt buf into Q.                       */
+        NetIF_Loopback_RxQ_Head       =  p_buf;
+    }
+    NetIF_Loopback_RxQ_Tail = p_buf;                            /* Add pkt buf @ Q tail (see Note #1b1).                */
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_Loopback_RxQ_Get()
+*
+* Description : Get a network packet buffer from the Network Loopback Interface Receive Queue.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Pointer to received network packet buffer, if available.
+*
+*               Pointer to NULL,                           otherwise.
+*
+* Caller(s)   : NetIF_Loopback_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_BUF  *NetIF_Loopback_RxQ_Get (void)
+{
+    NET_BUF  *p_buf;
+
+                                                                /* ---------- GET PKT BUF FROM LOOPBACK RX Q ---------- */
+    p_buf= NetIF_Loopback_RxQ_Head;
+    if (p_buf== (NET_BUF *)0) {
+        return ((NET_BUF *)0);
+    }
+                                                                /* -------- REMOVE PKT BUF FROM LOOPBACK RX Q --------- */
+    NetIF_Loopback_RxQ_Remove(p_buf);
+
+    return (p_buf);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_Loopback_RxQ_Remove()
+*
+* Description : Remove a network packet buffer from the Network Loopback Interface Receive Queue.
+*
+* Argument(s) : p_buf       Pointer to a network buffer.
+*               -----       Argument checked in NetIF_Loopback_RxQ_Get(),
+*                                               NetIF_Loopback_RxQ_Unlink().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Loopback_RxQ_Get(),
+*               NetIF_Loopback_RxQ_Unlink().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_RxQ_Remove (NET_BUF  *p_buf)
+{
+    NET_BUF      *p_buf_list_prev;
+    NET_BUF      *p_buf_list_next;
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_BUF_HDR  *p_buf_list_prev_hdr;
+    NET_BUF_HDR  *p_buf_list_next_hdr;
+
+                                                                /* -------- REMOVE PKT BUF FROM LOOPBACK RX Q --------- */
+    p_buf_hdr       = &p_buf->Hdr;
+    p_buf_list_prev =  p_buf_hdr->PrevSecListPtr;
+    p_buf_list_next =  p_buf_hdr->NextSecListPtr;
+
+                                                                /* Point prev pkt buf to next pkt buf.                  */
+    if (p_buf_list_prev != (NET_BUF *)0) {
+        p_buf_list_prev_hdr                 = &p_buf_list_prev->Hdr;
+        p_buf_list_prev_hdr->NextSecListPtr =  p_buf_list_next;
+    } else {
+        NetIF_Loopback_RxQ_Head            =  p_buf_list_next;
+    }
+                                                                /* Point next pkt buf to prev pkt buf.                  */
+    if (p_buf_list_next != (NET_BUF *)0) {
+        p_buf_list_next_hdr                 = &p_buf_list_next->Hdr;
+        p_buf_list_next_hdr->PrevSecListPtr =  p_buf_list_prev;
+    } else {
+        NetIF_Loopback_RxQ_Tail            =  p_buf_list_prev;
+    }
+
+                                                                /* ----------------- CLR NET BUF PTRS ----------------- */
+    p_buf_hdr->PrevSecListPtr = (NET_BUF    *)0;                /* Clr buf sec list ptrs.                               */
+    p_buf_hdr->NextSecListPtr = (NET_BUF    *)0;
+
+    p_buf_hdr->UnlinkFnctPtr  = (NET_BUF_FNCT)0;                /* Clr unlink ptrs.                                     */
+    p_buf_hdr->UnlinkObjPtr   = (void       *)0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_Loopback_RxQ_Unlink()
+*
+* Description : Unlink a network packet buffer from the Network Loopback Interface Receive Queue.
+*
+* Argument(s) : p_buf       Pointer to network buffer enqueued on Network Loopback Interface Receive Queue.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetIF_Loopback_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_RxQ_Unlink (NET_BUF  *p_buf)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN  used;
+#endif
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf== (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.Loopback.NullPtrCtr);
+        return;
+    }
+                                                                /* ------------------- VALIDATE BUF ------------------- */
+    used = NetBuf_IsUsed(p_buf);
+    if (used != DEF_YES) {
+        return;
+    }
+#endif
+
+                                                                /* ---------- UNLINK BUF FROM LOOPBACK RX Q ----------- */
+    NetIF_Loopback_RxQ_Remove(p_buf);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIF_Loopback_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as a valid loopback packet.
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header that received a packet.
+*               ---------   Argument validated in NetIF_Loopback_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Received loopback buffer packet validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT a valid
+*                                                                   loopback/network protocol.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Loopback_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIF_Loopback_RxPktValidateBuf (NET_BUF_HDR  *p_buf_hdr,
+                                               NET_ERR      *p_err)
+{
+    CPU_INT16U  ix;
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* ----------------- VALIDATE PROTOCOL ---------------- */
+    switch (p_buf_hdr->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_IP_V4:
+             ix = p_buf_hdr->IP_HdrIx;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[NET_IF_NBR_LOOPBACK].RxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    if (ix == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[NET_IF_NBR_LOOPBACK].RxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_IF_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_Loopback_RxPktDemux()
+*
+* Description : Demultiplex received loopback packet to appropriate network protocol.
+*
+* Argument(s) : p_buf      Pointer to network buffer that received loopback packet.
+*               -----      Argument validated in NetIF_Loopback_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Loopback packet successfully demultiplexed
+*                                                                   & processed.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid network protocol.
+*
+*                                                               -------- RETURNED BY NetIP_Rx() : --------
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Loopback_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_RxPktDemux (NET_BUF  *p_buf,
+                                         NET_ERR  *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_ERR       err;
+
+
+    p_buf_hdr = &p_buf->Hdr;
+    switch (p_buf_hdr->ProtocolHdrType) {                       /* Demux buf to appropriate protocol.                   */
+        case NET_PROTOCOL_TYPE_IP_V4:
+#ifdef  NET_IPv4_MODULE_EN
+             NetIPv4_Rx(p_buf, &err);
+            *p_err = (err == NET_IPv4_ERR_NONE) ? NET_IF_ERR_NONE : err;
+#else
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[NET_IF_NBR_LOOPBACK].RxInvProtocolCtr);
+            *p_err = NET_IF_ERR_LOOPBACK_DEMUX_PROTOCOL;
+#endif
+
+             break;
+
+
+        case NET_PROTOCOL_TYPE_IP_V6:
+#ifdef  NET_IPv6_MODULE_EN
+             NetIPv6_Rx(p_buf, &err);
+            *p_err = (err == NET_IPv6_ERR_NONE) ? NET_IF_ERR_NONE : err;
+#else
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[NET_IF_NBR_LOOPBACK].RxInvProtocolCtr);
+            *p_err = NET_IF_ERR_LOOPBACK_DEMUX_PROTOCOL;
+#endif
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[NET_IF_NBR_LOOPBACK].RxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             break;
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                     NetIF_Loopback_RxPktDiscard()
+*
+* Description : On any loopback receive error(s), discard loopback packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Loopback_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_RxPktDiscard (NET_BUF  *p_buf,
+                                           NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.IFs.Loopback.RxPktDisCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIF_Loopback_TxPktValidate()
+*
+* Description : (1) Validate network loopback interface transmit packet parameters :
+*
+*                   (a) Validate the following transmit packet parameters :
+*
+*                       (1) Supported protocols :
+*                           (A) IPv4
+*
+*                       (2) Buffer protocol index
+*
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIF_Loopback_Tx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Transmit packet validated.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer   type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Loopback_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIF_Loopback_TxPktValidate (NET_BUF_HDR  *p_buf_hdr,
+                                            NET_ERR      *p_err)
+{
+    CPU_INT16U  ix;
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_RX_LARGE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* ----------------- VALIDATE PROTOCOL ---------------- */
+    switch (p_buf_hdr->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_IP_V4:
+             ix = p_buf_hdr->IP_HdrIx;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[NET_IF_NBR_LOOPBACK].TxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    if (ix == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[NET_IF_NBR_LOOPBACK].TxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_Loopback_TxPktFree()
+*
+* Description : Free network buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Loopback_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_TxPktFree (NET_BUF  *p_buf)
+{
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)0);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_Loopback_TxPktDiscard()
+*
+* Description : On any loopback transmit packet error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Loopback_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_TxPktDiscard (NET_BUF  *p_buf,
+                                           NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.IFs.Loopback.TxPktDisCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_Loopback_IF_Add()
+*
+* Description : (1) Add & initialize the Network Loopback Interface :
+*
+*                   (a) Initialize Loopback MTU
+*                   (b) Configure  Loopback interface
+*
+*
+* Argument(s) : p_if        Pointer to network loopback interface.
+*               ----        Argument validated in NetIF_Add().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network loopback interface successfully added.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Add() via 'p_if_api->Add()'.
+*
+* Note(s)     : (2) Upon adding the loopback interface, the highest possible MTU is configured.  If this
+*                   value needs to be changed, either prior to starting the interface or during run-time,
+*                   it may be reconfigured by calling NetIF_MTU_Set() from the application.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_IF_Add (NET_IF   *p_if,
+                                     NET_ERR  *p_err)
+{
+    NET_IF_CFG_LOOPBACK  *pcfg_loopback;
+    NET_BUF_SIZE          buf_size_max;
+    NET_MTU               mtu_loopback;
+    NET_MTU               mtu_loopback_dflt;
+
+
+    pcfg_loopback = (NET_IF_CFG_LOOPBACK *)p_if->Dev_Cfg;
+
+                                                                /* ------------------ CFG LOOPBACK IF ----------------- */
+    p_if->Type = NET_IF_TYPE_LOOPBACK;                          /* Set IF type to loopback.                             */
+
+
+    NetIF_BufPoolInit(p_if, p_err);                             /* Init IF's buf pools.                                 */
+    if (*p_err != NET_IF_ERR_NONE) {                            /* On any err(s);                                       */
+         goto exit;
+    }
+
+                                                                /* --------------------- INIT MTU --------------------- */
+    buf_size_max      = DEF_MAX(pcfg_loopback->TxBufLargeSize, pcfg_loopback->TxBufSmallSize);
+    mtu_loopback_dflt = NET_IF_MTU_LOOPBACK;
+    mtu_loopback      = DEF_MIN(mtu_loopback_dflt, buf_size_max);
+    p_if->MTU         = mtu_loopback;                           /* Set loopback MTU (see Note #2).                      */
+
+
+
+
+   *p_err = NET_IF_ERR_NONE;
+
+exit:
+   return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_Loopback_IF_Start()
+*
+* Description : Start Network Loopback Interface.
+*
+* Argument(s) : p_if        Pointer to network loopback interface.
+*               ----        Argument validated in NetIF_Start().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network loopback interface successfully
+*                                                                   started.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Start() via 'p_if_api->Start()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_IF_Start (NET_IF   *p_if,
+                                       NET_ERR  *p_err)
+{
+    p_if->Link = NET_IF_LINK_UP;
+   *p_err      = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_Loopback_IF_Stop()
+*
+* Description : Stop Network Loopback Interface.
+*
+* Argument(s) : p_if        Pointer to network loopback interface.
+*               ----        Argument validated in NetIF_Stop().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Network loopback interface successfully
+*                                                                   stopped.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Stop() via 'p_if_api->Stop()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_IF_Stop (NET_IF   *p_if,
+                                      NET_ERR  *p_err)
+{
+    p_if->Link = NET_IF_LINK_DOWN;
+   *p_err      = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_Loopback_AddrHW_Get()
+*
+* Description : Get the loopback interface's hardware address.
+*
+* Argument(s) : p_if        Pointer to loopback interface.
+*               ----        Argument validated in NetIF_AddrHW_GetHandler().
+*
+*               p_addr_hw   Pointer to variable that will receive the hardware address.
+*               ---------   Argument checked   in NetIF_AddrHW_GetHandler().
+*
+*               p_addr_len  Pointer to a variable to ... :
+*               ----------
+*                               (a) Pass the length of the address buffer pointed to by 'p_addr_hw'.
+*                               (b) (1) Return the actual size of the protocol address, if NO error(s);
+*                                   (2) Return 0,                                       otherwise.
+*
+*                           Argument checked in NetIF_AddrHW_GetHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_INVALID_ADDR         Loopback interface's hardware address NULL
+*                                                                   (see Note #1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrHW_GetHandler() via 'p_if_api->AddrHW_Get()'.
+*
+* Note(s)     : (1) The loopback interface is NOT linked to, associated with, or handled by any physical
+*                   network device(s) & therefore has NO physical hardware address.
+*
+*                   See also 'net_if_loopback.c  Note #1a'.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_AddrHW_Get (NET_IF      *p_if,
+                                         CPU_INT08U  *p_addr_hw,
+                                         CPU_INT08U  *p_addr_len,
+                                         NET_ERR     *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_addr_hw;
+
+   *p_addr_len = 0u;
+   *p_err     = NET_IF_ERR_LOOPBACK_INVALID_ADDR;               /* See Note #1.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_Loopback_AddrHW_Set()
+*
+* Description : Set the loopback interface's hardware address.
+*
+* Argument(s) : p_if        Pointer to loopback interface.
+*               ----        Argument validated in NetIF_AddrHW_SetHandler().
+*
+*               p_addr_hw   Pointer to a memory that contains the hardware address (see Note #1).
+*               ---------   Argument checked   in NetIF_AddrHW_SetHandler().
+*
+*               addr_len    Hardware address length.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_INVALID_ADDR         Invalid hardware address (see Note #1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrHW_SetHandler() via 'p_if_api->AddrHW_Set()'.
+*
+* Note(s)     : (1) The loopback interface is NOT linked to, associated with, or handled by any physical
+*                   network device(s) & therefore has NO physical hardware address.
+*
+*                   See also 'net_if_loopback.c  Note #1a'.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_AddrHW_Set (NET_IF      *p_if,
+                                         CPU_INT08U  *p_addr_hw,
+                                         CPU_INT08U   addr_len,
+                                         NET_ERR     *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_addr_hw;
+   (void)&addr_len;
+
+   *p_err = NET_IF_ERR_LOOPBACK_INVALID_ADDR;                    /* See Note #1.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIF_Loopback_AddrHW_IsValid()
+*
+* Description : Validate a loopback interface hardware address.
+*
+* Argument(s) : p_if        Pointer to   loopback interface.
+*               ----        Argument validated in NetIF_AddrHW_IsValidHandler().
+*
+*               p_addr_hw   Pointer to a loopback interface hardware address (see Note #1).
+*               ---------   Argument checked   in NetIF_AddrHW_IsValidHandler().
+*
+* Return(s)   : DEF_NO, loopback hardware address NOT valid (see Note #1).
+*
+* Caller(s)   : NetIF_AddrHW_IsValidHandler() via 'p_if_api->AddrHW_IsValid()'.
+*
+* Note(s)     : (1) The loopback interface is NOT linked to, associated with, or handled by any physical
+*                   network device(s) & therefore has NO physical hardware address.
+*
+*                   See also 'net_if_loopback.c  Note #1a'.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetIF_Loopback_AddrHW_IsValid (NET_IF      *p_if,
+                                                    CPU_INT08U  *p_addr_hw)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_addr_hw;
+
+    return (DEF_NO);                                            /* See Note #1.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIF_Loopback_AddrMulticastAdd()
+*
+* Description : Add a multicast address to the loopback interface.
+*
+* Argument(s) : p_if                    Pointer to network loopback interface to add address.
+*               ----                    Argument validated in NetIF_AddrMulticastAdd().
+*
+*               p_addr_protocol         Pointer to a multicast protocol address to add (see Note #1).
+*               ---------------         Argument checked   in NetIF_AddrMulticastAdd().
+*
+*               addr_protocol_len       Length of the protocol address, in octets.
+*
+*               addr_protocol_type      Protocol address type.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_FAULT_FEATURE_DIS              Disabled API function (see Note #1).
+*
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrMulticastAdd() via 'p_if_api->AddrMulticastAdd()'.
+*
+* Note(s)     : (1) Multicast addresses are available ONLY for configured interface(s); NOT for any
+*                   loopback interface(s).
+*
+*               (2) The multicast protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_AddrMulticastAdd (NET_IF             *p_if,
+                                               CPU_INT08U         *p_addr_protocol,
+                                               CPU_INT08U          addr_protocol_len,
+                                               NET_PROTOCOL_TYPE   addr_protocol_type,
+                                               NET_ERR            *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_addr_protocol;
+   (void)&addr_protocol_len;
+   (void)&addr_protocol_type;
+
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetIF_Loopback_AddrMulticastRemove()
+*
+* Description : Remove a multicast address from the loopback interface.
+*
+* Argument(s) : p_if                    Pointer to network loopback interface to remove address.
+*               ----                    Argument validated in NetIF_AddrMulticastRemove().
+*
+*               p_addr_protocol         Pointer to a multicast protocol address to remove (see Note #1).
+*               ---------------         Argument checked   in NetIF_AddrMulticastRemove().
+*
+*               addr_protocol_len       Length of the protocol address, in octets.
+*
+*               addr_protocol_type      Protocol address type.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_FAULT_FEATURE_DIS              Disabled API function (see Note #1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrMulticastRemove() via 'p_if_api->AddrMulticastRemove()'.
+*
+* Note(s)     : (1) Multicast addresses are available ONLY for configured interface(s); NOT for any
+*                   loopback interface(s).
+*
+*               (2) The multicast protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_AddrMulticastRemove (NET_IF             *p_if,
+                                                  CPU_INT08U         *p_addr_protocol,
+                                                  CPU_INT08U          addr_protocol_len,
+                                                  NET_PROTOCOL_TYPE   addr_protocol_type,
+                                                  NET_ERR            *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_addr_protocol;
+   (void)&addr_protocol_len;
+   (void)&addr_protocol_type;
+
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+}
+
+
+/*
+*********************************************************************************************************
+*                              NetIF_Loopback_AddrMulticastProtocolToHW()
+*
+* Description : Convert a multicast protocol address into a loopback interface address.
+*
+*
+* Argument(s) : p_if                    Pointer to network loopback interface to transmit the packet.
+*               ----                    Argument validated in NetIF_AddrMulticastProtocolToHW().
+*
+*               p_addr_protocol         Pointer to a multicast protocol address to convert,
+*               ---------------             in network-order.
+*
+*                                       Argument checked   in NetIF_AddrMulticastProtocolToHW().
+*
+*               addr_protocol_len       Length of the protocol address, in octets.
+*
+*               addr_protocol_type      Protocol address type.
+*
+*               p_addr_hw               Pointer to a variable that will receive the hardware address
+*               ---------                   in network order.
+*
+*                                       Argument checked   in NetIF_AddrMulticastProtocolToHW().
+*
+*               p_addr_hw_len           Pointer to a variable to ... :
+*               -------------
+*                                           (a) Pass the length of the              hardware address
+*                                                   argument, in octets.
+*                                           (b) (1) Return the actual length of the hardware address,
+*                                                       in octets, if NO error(s);
+*                                               (2) Return 0, otherwise.
+*
+*                                       Argument checked   in NetIF_AddrMulticastProtocolToHW().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_FAULT_FEATURE_DIS              Disabled API function (see Note #1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_AddrMulticastProtocolToHW() via 'p_if_api->AddrMulticastProtocolToHW'.
+*
+* Note(s)     : (1) Multicast addresses are available ONLY for configured interface(s); NOT for any
+*                   loopback interface(s).
+*
+*               (2) (a) The multicast protocol address MUST be in network-order.
+*
+*                   (b) The loopback hardware address is returned in network-order; i.e. the pointer to
+*                       the hardware address points to the highest-order octet.
+*
+*               (3) Since 'p_addr_hw_len' argument is both an input & output argument (see 'Argument(s) :
+*                   p_addr_hw_len'), ... :
+*
+*                   (a) Its input value SHOULD be validated prior to use; ...
+*                   (b) While its output value MUST be initially configured to return a default value
+*                       PRIOR to all other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_AddrMulticastProtocolToHW (NET_IF             *p_if,
+                                                        CPU_INT08U         *p_addr_protocol,
+                                                        CPU_INT08U          addr_protocol_len,
+                                                        NET_PROTOCOL_TYPE   addr_protocol_type,
+                                                        CPU_INT08U         *p_addr_hw,
+                                                        CPU_INT08U         *p_addr_hw_len,
+                                                        NET_ERR            *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_addr_protocol;
+   (void)&addr_protocol_len;
+   (void)&addr_protocol_type;
+   (void)&p_addr_hw;
+
+   *p_addr_hw_len = 0u;                                          /* Cfg dflt addr len for err (see Note #3b).            */
+   *p_err         = NET_ERR_FAULT_FEATURE_DIS;
+}
+
+/*
+*********************************************************************************************************
+*                                  NetIF_Loopback_BufPoolCfgValidate()
+*
+* Description : Validate loopback interface network buffer pool configuration.
+*
+* Argument(s) : p_if        Pointer to loopback interface.
+*               ----        Argument validated in NetIF_BufPoolInit().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Loopback interface's buffer pool
+*                                                                   configuration valid.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_BufPoolInit() via 'p_if_api->BufPoolCfgValidate()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_BufPoolCfgValidate (NET_IF   *p_if,
+                                                 NET_ERR  *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                      NetIF_Loopback_MTU_Set()
+*
+* Description : Set the loopback interface's MTU.
+*
+* Argument(s) : p_if        Pointer to loopback interface.
+*               ----        Argument validated in NetIF_MTU_SetHandler().
+*
+*               mtu         Desired maximum transmission unit (MTU) size to configure (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Loopback interface's MTU successfully set.
+*                               NET_IF_ERR_INVALID_MTU          Invalid MTU.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_MTU_SetHandler() via 'p_if_api->MTU_Set()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_MTU_Set (NET_IF   *p_if,
+                                      NET_MTU   mtu,
+                                      NET_ERR  *p_err)
+{
+    NET_IF_CFG_LOOPBACK  *pcfg_loopback;
+    NET_BUF_SIZE          buf_size_max;
+    NET_MTU               mtu_max;
+
+
+    pcfg_loopback = (NET_IF_CFG_LOOPBACK *)p_if->Dev_Cfg;
+    buf_size_max  =  DEF_MAX(pcfg_loopback->TxBufLargeSize, pcfg_loopback->TxBufSmallSize);
+    mtu_max       =  DEF_MIN(mtu, buf_size_max);
+
+    if (mtu <= mtu_max) {
+        p_if->MTU  =  mtu;
+       *p_err     =  NET_IF_ERR_NONE;
+    } else {
+       *p_err     =  NET_IF_ERR_LOOPBACK_INVALID_MTU;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIF_Loopback_GetPktSizeHdr()
+*
+* Description : Get loopback interface header size.
+*
+* Argument(s) : p_if        Pointer to loopback interface.
+*               ----        Argument validated in NetIF_MTU_GetProtocol().
+*
+* Return(s)   : The loopback interface header size.
+*
+* Caller(s)   : NetIF_MTU_GetProtocol() via 'p_if_api->GetPktSizeHdr()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  NetIF_Loopback_GetPktSizeHdr (NET_IF  *p_if)
+{
+    CPU_INT16U  pkt_size;
+
+
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+    pkt_size = (CPU_INT16U)NET_IF_HDR_SIZE_LOOPBACK;
+
+    return (pkt_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIF_Loopback_GetPktSizeMin()
+*
+* Description : Get minimum allowable loopback interface packet size.
+*
+* Argument(s) : p_if        Pointer to loopback interface.
+*               ----        Argument validated in NetIF_GetPktSizeMin().
+*
+* Return(s)   : The minimum allowable loopback interface packet size.
+*
+* Caller(s)   : NetIF_GetPktSizeMin() via 'p_if_api->GetPktSizeMin()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  NetIF_Loopback_GetPktSizeMin (NET_IF  *p_if)
+{
+    CPU_INT16U  pkt_size;
+
+
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+    pkt_size = (CPU_INT16U)NET_IF_LOOPBACK_SIZE_MIN;
+
+    return (pkt_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIF_Loopback_GetPktSizeMin()
+*
+* Description : Get maximum allowable loopback interface packet size.
+*
+* Argument(s) : p_if        Pointer to loopback interface.
+*               ----        Argument validated in NetIF_GetPktSizeMin().
+*
+* Return(s)   : The maximum allowable loopback interface packet size.
+*
+* Caller(s)   : NetIF_GetPktSizeMax() via 'p_if_api->GetPktSizeMin()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  NetIF_Loopback_GetPktSizeMax (NET_IF  *p_if)
+{
+    CPU_INT16U    pkt_size;
+    NET_DEV_CFG  *p_cfg = (NET_DEV_CFG *)p_if->Dev_Cfg;
+
+
+   (void)&p_if;                                                 /* Prevent 'variable unused' compiler warning.          */
+    pkt_size = (CPU_INT16U)p_cfg->RxBufLargeSize;
+
+    return (pkt_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIF_Loopback_ISR_Handler()
+*
+* Description : Handle loopback interface interrupt service routine (ISR) function(s).
+*
+*               (1) Interrupt service routines are available ONLY for configured interface(s)/device(s);
+*                   NOT for any loopback interface(s).
+*
+*
+* Argument(s) : p_if        Pointer to network loopback interface.
+*               ----        Argument validated in NetIF_ISR_Handler().
+*
+*               type        Device interrupt type(s) to handle.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_FAULT_FEATURE_DIS              Disabled API function (see Note #1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_ISR_Handler() via 'p_if_api->ISR_Handler()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_ISR_Handler (NET_IF            *p_if,
+                                          NET_DEV_ISR_TYPE   type,
+                                          NET_ERR           *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warnings.         */
+   (void)&type;
+
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIF_Loopback_IO_CtrlHandler()
+*
+* Description : Handle loopback interface specific control(s).
+*
+* Argument(s) : p_if        Pointer to loopback interface.
+*               ----        Argument validated in NetIF_IO_CtrlHandler().
+*
+*               opt         Desired I/O control option code to perform :
+*
+*                               NET_IF_IO_CTRL_LINK_STATE_GET           Get loopback interface's link state,
+*                                                                           'UP' or 'DOWN'.
+*
+*               p_data      Pointer to variable that will receive possible I/O control data (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Loopback interface I/O control option
+*                                                                       successfully handled.
+*                               NET_ERR_FAULT_NULL_PTR                 Argument(s) passed a NULL pointer.
+*                               NET_IF_ERR_INVALID_IO_CTRL_OPT      Invalid I/O control option.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_IO_CtrlHandler() via 'p_if_api->IO_Ctrl()'.
+*
+* Note(s)     : (1) 'p_data' MUST point to a variable (or memory) that is sufficiently sized AND aligned
+*                    to receive any return data.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_Loopback_IO_CtrlHandler (NET_IF      *p_if,
+                                             CPU_INT08U   opt,
+                                             void        *p_data,
+                                             NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  *p_link_state;
+
+
+    switch (opt) {
+        case NET_IF_IO_CTRL_LINK_STATE_GET:
+             if (p_data == (void *)0) {
+                *p_err = NET_ERR_FAULT_NULL_PTR;
+                 return;
+             }
+
+             p_link_state = (CPU_BOOLEAN *)p_data;              /* See Note #1.                                         */
+            *p_link_state = (CPU_BOOLEAN  )p_if->Link;
+             break;
+
+
+        case NET_IF_IO_CTRL_NONE:
+        case NET_IF_IO_CTRL_LINK_STATE_GET_INFO:
+        case NET_IF_IO_CTRL_LINK_STATE_UPDATE:
+        default:
+            *p_err = NET_IF_ERR_INVALID_IO_CTRL_OPT;
+             return;
+    }
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_LOOPBACK_MODULE_EN    */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_loopback.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_loopback.h
new file mode 100644
index 0000000..cc9a267
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_loopback.h
@@ -0,0 +1,305 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  NETWORK LOOPBACK INTERFACE LAYER
+*
+* Filename      : net_if_loopback.h
+* Version       : V3.04.02
+* Programmer(s) : EHS
+*                 ITJ
+*********************************************************************************************************
+* Note(s)       : (1) Supports internal loopback communication.
+*
+*                     (a) Internal loopback interface is NOT linked to, associated with, or handled by
+*                         any physical network device(s) & therefore has NO physical protocol overhead.
+*
+*                 (2) REQUIREs the following network protocol files in network directories :
+*
+*                     (a) Network Interface Layer located in the following network directory :
+*
+*                             \\IF\
+*
+*                              where
+*                                          directory path for network protocol suite
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../Source/net_cfg_net.h"
+#include  "net_if.h"
+#include  "net_if_802x.h"
+#include  "../Source/net_type.h"
+#include  "../Source/net_stat.h"
+#include  "../Source/net_buf.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Loopback Interface Layer module is included regardless of whether the loopback interface
+*               is enabled (see 'net_cfg_net.h  NETWORK INTERFACE LAYER CONFIGURATION  Note #2a1').
+*
+*           (2) The following loopback-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require loopback configuration
+*               (see 'net_cfg_net.h  NETWORK INTERFACE LAYER CONFIGURATION  Note #2a1') :
+*
+*                   NET_IF_LOOPBACK_MODULE_EN
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IF_LOOPBACK_MODULE_PRESENT
+#define  NET_IF_LOOPBACK_MODULE_PRESENT
+
+#ifdef   NET_IF_LOOPBACK_MODULE_EN                          /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_IF_LOOPBACK_BUF_RX_LEN_MIN     NET_IF_ETHER_FRAME_MIN_SIZE
+#define  NET_IF_LOOPBACK_BUF_TX_LEN_MIN     NET_IF_802x_BUF_TX_LEN_MIN
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK INTERFACE HEADER DEFINES
+*
+* Note(s) : (1) The following network interface value MUST be pre-#define'd in 'net_def.h' PRIOR to
+*               'net_cfg.h' so that the developer can configure the network interface for the correct
+*               network interface layer values (see 'net_def.h  NETWORK INTERFACE LAYER DEFINES' &
+*               'net_cfg_net.h  NETWORK INTERFACE LAYER CONFIGURATION  Note #4') :
+*
+*               (a) NET_IF_HDR_SIZE_LOOPBACK               0
+*********************************************************************************************************
+*/
+
+#if 0
+#define  NET_IF_HDR_SIZE_LOOPBACK                          0    /* See Note #1a.                                        */
+#endif
+
+#define  NET_IF_HDR_SIZE_LOOPBACK_MIN                    NET_IF_HDR_SIZE_LOOPBACK
+#define  NET_IF_HDR_SIZE_LOOPBACK_MAX                    NET_IF_HDR_SIZE_LOOPBACK
+
+
+/*
+*********************************************************************************************************
+*              NETWORK LOOPBACK INTERFACE SIZE & MAXIMUM TRANSMISSION UNIT (MTU) DEFINES
+*
+* Note(s) : (1) The loopback interface is NOT linked to, associated with, or handled by any physical
+*               network device(s) & therefore has NO physical protocol overhead.
+*
+*               See also 'net_if_loopback.h  Note #1a'.
+*********************************************************************************************************
+*/
+                                                                /* See Note #1.                                         */
+#define  NET_IF_MTU_LOOPBACK                             NET_MTU_MAX_VAL
+
+#define  NET_IF_LOOPBACK_BUF_SIZE_MIN                   (NET_IF_LOOPBACK_SIZE_MIN + NET_BUF_DATA_SIZE_MIN - NET_BUF_DATA_PROTOCOL_HDR_SIZE_MIN)
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                          NETWORK LOOPBACK INTERFACE CONFIGURATION DATA TYPE
+*
+* Note(s) : (1) The network loopback interface configuration data type is a specific instantiation of a
+*               network device configuration data type.  ALL specific network device configuration data
+*               types MUST be defined with ALL of the generic network device configuration data type's
+*               configuration parameters, synchronized in both the sequential order & data type of each
+*               parameter.
+*
+*               Thus ANY modification to the sequential order or data types of generic configuration
+*               parameters MUST be appropriately synchronized between the generic network device
+*               configuration data type & the network loopback interface configuration data type.
+*
+*               See also 'net_if.h  GENERIC NETWORK DEVICE CONFIGURATION DATA TYPE  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                    /* --------------------- NET LOOPBACK IF CFG ---------------------- */
+typedef  struct  net_if_cfg_loopback {
+                                                    /* ---------------- GENERIC  LOOPBACK CFG MEMBERS ----------------- */
+    NET_IF_MEM_TYPE     RxBufPoolType;              /* Rx buf mem pool type :                                           */
+                                                    /*   NET_IF_MEM_TYPE_MAIN        bufs alloc'd from main      mem    */
+                                                    /*   NET_IF_MEM_TYPE_DEDICATED   bufs alloc'd from dedicated mem    */
+    NET_BUF_SIZE        RxBufLargeSize;             /* Size  of loopback IF large buf data areas     (in octets).       */
+    NET_BUF_QTY         RxBufLargeNbr;              /* Nbr   of loopback IF large buf data areas.                       */
+    NET_BUF_SIZE        RxBufAlignOctets;           /* Align of loopback IF       buf data areas     (in octets).       */
+    NET_BUF_SIZE        RxBufIxOffset;              /* Offset from base ix to rx data into data area (in octets).       */
+
+
+    NET_IF_MEM_TYPE     TxBufPoolType;              /* Tx buf mem pool type :                                           */
+                                                    /*   NET_IF_MEM_TYPE_MAIN        bufs alloc'd from main      mem    */
+                                                    /*   NET_IF_MEM_TYPE_DEDICATED   bufs alloc'd from dedicated mem    */
+    NET_BUF_SIZE        TxBufLargeSize;             /* Size  of loopback IF large buf data areas     (in octets).       */
+    NET_BUF_QTY         TxBufLargeNbr;              /* Nbr   of loopback IF large buf data areas.                       */
+    NET_BUF_SIZE        TxBufSmallSize;             /* Size  of loopback IF small buf data areas     (in octets).       */
+    NET_BUF_QTY         TxBufSmallNbr;              /* Nbr   of loopback IF small buf data areas.                       */
+    NET_BUF_SIZE        TxBufAlignOctets;           /* Align of loopback IF       buf data areas     (in octets).       */
+    NET_BUF_SIZE        TxBufIxOffset;              /* Offset from base ix to tx data from data area (in octets).       */
+
+
+    CPU_ADDR            MemAddr;                    /* Base addr of (loopback IF's) dedicated mem, if avail.            */
+    CPU_ADDR            MemSize;                    /* Size      of (loopback IF's) dedicated mem, if avail.            */
+
+
+    NET_DEV_CFG_FLAGS   Flags;                      /* Opt'l bit flags.                                                 */
+
+                                                    /* ---------------- SPECIFIC LOOPBACK CFG MEMBERS ----------------- */
+
+} NET_IF_CFG_LOOPBACK;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_IF_CFG_LOOPBACK   NetIF_Cfg_Loopback;        /*    Net loopback IF cfg.                              */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void          NetIF_Loopback_Init(NET_ERR  *p_err);
+
+
+                                                                /* --------------------- RX FNCTS --------------------- */
+NET_BUF_SIZE  NetIF_Loopback_Rx  (NET_IF   *p_if,
+                                  NET_ERR  *p_err);
+
+                                                                /* --------------------- TX FNCTS --------------------- */
+NET_BUF_SIZE  NetIF_Loopback_Tx  (NET_IF   *p_if,
+                                  NET_BUF  *p_buf_tx,
+                                  NET_ERR  *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IF_CFG_LOOPBACK_EN
+#error  "NET_IF_CFG_LOOPBACK_EN        not #define'd in 'net_cfg.h'"
+#error  "                        [MUST be  DEF_DISABLED]           "
+#error  "                        [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_IF_CFG_LOOPBACK_EN != DEF_DISABLED) && \
+        (NET_IF_CFG_LOOPBACK_EN != DEF_ENABLED ))
+#error  "NET_IF_CFG_LOOPBACK_EN  illegally #define'd in 'net_cfg.h'"
+#error  "                        [MUST be  DEF_DISABLED]           "
+#error  "                        [     ||  DEF_ENABLED ]           "
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_LOOPBACK_MODULE_EN        */
+#endif  /* NET_IF_LOOPBACK_MODULE_PRESENT   */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_wifi.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_wifi.c
new file mode 100644
index 0000000..68927ea
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_wifi.c
@@ -0,0 +1,1904 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK INTERFACE LAYER
+*
+*                                              WIRELESS
+*
+* Filename      : net_if_wifi.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Supports following network interface layers:
+*
+*                     (a) Ethernet See 'net_if_802x.h Note #1a'
+*
+*                     (b) IEEE 802 See 'net_if_802x.h Note #1b'
+*
+*                 (2) Wireless implementation conforms to RFC #1122, Section 2.3.3, bullets (a) & (b), but
+*                     does NOT implement bullet (c) :
+*
+*                     RFC #1122                  LINK LAYER                  October 1989
+*
+*                     2.3.3  ETHERNET (RFC-894) and IEEE 802 (RFC-1042) ENCAPSULATION
+*
+*                            Every Internet host connected to a 10Mbps Ethernet cable :
+*
+*                            (a) MUST be able to send and receive packets using RFC-894 encapsulation;
+*
+*                            (b) SHOULD be able to receive RFC-1042 packets, intermixed with RFC-894 packets; and
+*
+*                            (c) MAY be able to send packets using RFC-1042 encapsulation.
+*
+*                 (3) Wireless implemtation doesn't supports wireless supplicant and/or IEEE 802.11. The
+*                     wireless module-hardware must provide the wireless suppliant and all relevant IEEE 802.11
+*                     supports.
+*
+*                 (4) REQUIREs the following network protocol files in network directories :
+*
+*                     (a) (1) Network Interface Layer
+*                         (2) 802x    Interface layer
+*
+*                           Located in the following network directory
+*
+*                               \\IF\
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_IF_MODULE_WIFI
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_if_wifi.h"
+#include  "net_if.h"
+#include  "../Source/net.h"
+#include  "../Source/net_type.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                    /* ----------------------- NET WIFI IF DATA ----------------------- */
+typedef  struct  net_if_data_wifi {
+    CPU_INT08U  HW_Addr[NET_IF_802x_ADDR_SIZE];     /* WiFi IF's dev hw addr.                                           */
+} NET_IF_DATA_WIFI;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* --------------------- RX FNCTS --------------------- */
+static  void  NetIF_WiFi_Rx                (NET_IF      *p_if,
+                                            NET_BUF     *p_buf,
+                                            NET_ERR     *p_err);
+
+static  void  NetIF_WiFi_RxPktHandler      (NET_IF      *p_if,
+                                            NET_BUF     *p_buf,
+                                            NET_ERR     *p_err);
+
+static  void  NetIF_WiFi_RxMgmtFrameHandler(NET_IF      *p_if,
+                                            NET_BUF     *p_buf,
+                                            NET_ERR     *p_err);
+
+static  void  NetIF_WiFi_RxDiscard         (NET_BUF     *p_buf,
+                                            NET_ERR     *p_err);
+
+
+                                                                /* --------------------- TX FNCTS --------------------- */
+static  void  NetIF_WiFi_Tx                (NET_IF      *p_if,
+                                            NET_BUF     *p_buf,
+                                            NET_ERR     *p_err);
+
+static  void  NetIF_WiFi_TxPktDiscard      (NET_BUF     *p_buf,
+                                            NET_ERR     *p_err);
+
+
+                                                                /* -------------------- API FNCTS --------------------- */
+static  void  NetIF_WiFi_IF_Add            (NET_IF      *p_if,
+                                            NET_ERR     *p_err);
+
+static  void  NetIF_WiFi_IF_Start          (NET_IF      *p_if,
+                                            NET_ERR     *p_err);
+
+static  void  NetIF_WiFi_IF_Stop           (NET_IF      *p_if,
+                                            NET_ERR     *p_err);
+
+
+                                                                /* -------------------- MGMT FNCTS -------------------- */
+static  void  NetIF_WiFi_IO_CtrlHandler    (NET_IF      *p_if,
+                                            CPU_INT08U   opt,
+                                            void        *p_data,
+                                            NET_ERR     *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  NET_IF_API  NetIF_API_WiFi = {                                           /* WiFi IF API fnct ptrs :              */
+                                      &NetIF_WiFi_IF_Add,                       /*   Init/add                           */
+                                      &NetIF_WiFi_IF_Start,                     /*   Start                              */
+                                      &NetIF_WiFi_IF_Stop,                      /*   Stop                               */
+                                      &NetIF_WiFi_Rx,                           /*   Rx                                 */
+                                      &NetIF_WiFi_Tx,                           /*   Tx                                 */
+                                      &NetIF_802x_AddrHW_Get,                   /*   Hw        addr get                 */
+                                      &NetIF_802x_AddrHW_Set,                   /*   Hw        addr set                 */
+                                      &NetIF_802x_AddrHW_IsValid,               /*   Hw        addr valid               */
+                                      &NetIF_802x_AddrMulticastAdd,             /*   Multicast addr add                 */
+                                      &NetIF_802x_AddrMulticastRemove,          /*   Multicast addr remove              */
+                                      &NetIF_802x_AddrMulticastProtocolToHW,    /*   Multicast addr protocol-to-hw      */
+                                      &NetIF_802x_BufPoolCfgValidate,           /*   Buf cfg validation                 */
+                                      &NetIF_802x_MTU_Set,                      /*   MTU set                            */
+                                      &NetIF_802x_GetPktSizeHdr,                /*   Get pkt hdr size                   */
+                                      &NetIF_802x_GetPktSizeMin,                /*   Get pkt min size                   */
+                                      &NetIF_802x_GetPktSizeMax,
+                                      &NetIF_802x_ISR_Handler,                  /*   ISR handler                        */
+                                      &NetIF_WiFi_IO_CtrlHandler                /*   I/O ctrl                           */
+                                    };
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_WiFi_Init()
+*
+* Description : (1) Initialize Wireless Network Interface Module :
+*
+*                   Module initialization NOT yet required/implemented
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Wireless network interface module
+*                                                                       successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIF_WiFi_Init (NET_ERR  *p_err)
+{
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_WiFi_Scan()
+*
+* Description : Scan available wireless access point.
+*
+* Argument(s) : if_nbr              Wireless network interface number.
+*
+*               p_buf_scan          Pointer to a buffer that will receive available access point.
+*
+*               buf_scan_len_max    Maximum number of access point that can be stored
+*
+*               p_ssid              Pointer to ... :
+*
+*                                       (a) null, if scan for all access point is resquested.
+*                                       (b) a string that contains the SSID to scan.
+*
+*               ch                  Channel number:
+*
+*                                       NET_IF_WIFI_CH_ALL
+*                                       NET_IF_WIFI_CH_1
+*                                       NET_IF_WIFI_CH_2
+*                                       NET_IF_WIFI_CH_3
+*                                       NET_IF_WIFI_CH_4
+*                                       NET_IF_WIFI_CH_5
+*                                       NET_IF_WIFI_CH_6
+*                                       NET_IF_WIFI_CH_7
+*                                       NET_IF_WIFI_CH_8
+*                                       NET_IF_WIFI_CH_9
+*                                       NET_IF_WIFI_CH_10
+*                                       NET_IF_WIFI_CH_11
+*                                       NET_IF_WIFI_CH_12
+*                                       NET_IF_WIFI_CH_13
+*                                       NET_IF_WIFI_CH_14
+*
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_WIFI_ERR_NONE            Wireless network interface module
+*                                                                   successfully scanned.
+*                               NET_IF_WIFI_ERR_CH_INVALID      Channel argument passed is invalid.
+*                               NET_IF_WIFI_ERR_SCAN            Wireless access point scan failed.
+*                               NET_ERR_FAULT_NULL_PTR             Argument 'p_buf_scan' passed a NULL pointer.
+*
+* Return(s)   : Number of wireless access point found.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_WiFi_Scan() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetIF_WiFi_Scan (       NET_IF_NBR         if_nbr,
+                                    NET_IF_WIFI_AP    *p_buf_scan,
+                                    CPU_INT16U         buf_scan_len_max,
+                             const  NET_IF_WIFI_SSID  *p_ssid,
+                                    NET_IF_WIFI_CH     ch,
+                                    NET_ERR           *p_err)
+{
+
+    NET_IF            *p_if;
+    CPU_INT16U         ctn;
+    NET_WIFI_MGR_API  *p_mgr_api;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------- VALIDATE ARG ------------------- */
+    if (p_buf_scan == (NET_IF_WIFI_AP *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+
+    if (ch > NET_IF_WIFI_CH_MAX) {
+       *p_err = NET_IF_WIFI_ERR_INVALID_CH;
+        return (0u);
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetIF_WiFi_Scan, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return (0u);
+    }
+
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (0u);
+    }
+
+    p_mgr_api = (NET_WIFI_MGR_API *)p_if->Ext_API;
+
+    ctn = p_mgr_api->AP_Scan(p_if, p_buf_scan, buf_scan_len_max, p_ssid, ch, p_err);
+    switch (*p_err) {
+        case NET_WIFI_MGR_ERR_NONE:
+            *p_err = NET_IF_WIFI_ERR_NONE;
+             break;
+
+
+        default:
+            *p_err = NET_IF_WIFI_ERR_SCAN;
+             ctn   = 0u;
+             break;
+    }
+
+    Net_GlobalLockRelease();
+
+    return (ctn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_WiFi_Join()
+*
+* Description : Join a wireless access point.
+*
+* Argument(s) : if_nbr              Wireless network interface number.
+*
+*               net_type            Wireless network type:
+*
+*                                       NET_IF_WIFI_NET_TYPE_INFRASTRUCTURE
+*                                       NET_IF_WIFI_NET_TYPE_ADHOC
+*
+*
+*               data_rate           Wireless date rate to configure:
+*
+*                                       NET_IF_WIFI_DATA_RATE_AUTO
+*                                       NET_IF_WIFI_DATA_RATE_1_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_2_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_5_5_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_6_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_9_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_11_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_12_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_18_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_24_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_36_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_48_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_54_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_MCS0
+*                                       NET_IF_WIFI_DATA_RATE_MCS1
+*                                       NET_IF_WIFI_DATA_RATE_MCS2
+*                                       NET_IF_WIFI_DATA_RATE_MCS3
+*                                       NET_IF_WIFI_DATA_RATE_MCS4
+*                                       NET_IF_WIFI_DATA_RATE_MCS5
+*                                       NET_IF_WIFI_DATA_RATE_MCS6
+*                                       NET_IF_WIFI_DATA_RATE_MCS7
+*                                       NET_IF_WIFI_DATA_RATE_MCS8
+*                                       NET_IF_WIFI_DATA_RATE_MCS9
+*                                       NET_IF_WIFI_DATA_RATE_MCS10
+*                                       NET_IF_WIFI_DATA_RATE_MCS11
+*                                       NET_IF_WIFI_DATA_RATE_MCS12
+*                                       NET_IF_WIFI_DATA_RATE_MCS13
+*                                       NET_IF_WIFI_DATA_RATE_MCS14
+*                                       NET_IF_WIFI_DATA_RATE_MCS15
+*
+*
+*               security_type       Wireless security type:
+*
+*                                       NET_IF_WIFI_SECURITY_OPEN
+*                                       NET_IF_WIFI_SECURITY_WEP
+*                                       NET_IF_WIFI_SECURITY_WPA
+*                                       NET_IF_WIFI_SECURITY_WPA2
+*
+*
+*               pwr_level           Wireless radio power to configure:
+*
+*                                       NET_IF_WIFI_PWR_LEVEL_LO
+*                                       NET_IF_WIFI_PWR_LEVEL_MED
+*                                       NET_IF_WIFI_PWR_LEVEL_HI
+*
+*
+*               ssid                SSID of the access point to join.
+*
+*               psk                 Pre shared key of the access point.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Wireless network interface module
+*                                                                       successfully joined.
+*
+*                               NET_IF_WIFI_ERR_JOIN                Wireless network interface module
+*                                                                       access point join failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_WiFi_Join() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) Before join an access point, the access point should have been found during a
+*                   previous scan.
+*********************************************************************************************************
+*/
+
+void  NetIF_WiFi_Join (NET_IF_NBR                  if_nbr,
+                       NET_IF_WIFI_NET_TYPE        net_type,
+                       NET_IF_WIFI_DATA_RATE       data_rate,
+                       NET_IF_WIFI_SECURITY_TYPE   security_type,
+                       NET_IF_WIFI_PWR_LEVEL       pwr_level,
+                       NET_IF_WIFI_SSID            ssid,
+                       NET_IF_WIFI_PSK             psk,
+                       NET_ERR                    *p_err)
+{
+
+    NET_IF               *p_if;
+    NET_WIFI_MGR_API     *p_mgr_api;
+    NET_IF_WIFI_AP_CFG    ap_cfg;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------- VALIDATE ARG ------------------- */
+    switch (net_type) {
+        case NET_IF_WIFI_NET_TYPE_INFRASTRUCTURE:
+        case NET_IF_WIFI_NET_TYPE_ADHOC:
+             break;
+
+
+        default:
+            *p_err = NET_IF_WIFI_ERR_INVALID_NET_TYPE;
+             return;
+    }
+
+    switch (data_rate) {
+        case NET_IF_WIFI_DATA_RATE_AUTO:
+        case NET_IF_WIFI_DATA_RATE_1_MBPS:
+        case NET_IF_WIFI_DATA_RATE_2_MBPS:
+        case NET_IF_WIFI_DATA_RATE_5_5_MBPS:
+        case NET_IF_WIFI_DATA_RATE_6_MBPS:
+        case NET_IF_WIFI_DATA_RATE_9_MBPS:
+        case NET_IF_WIFI_DATA_RATE_11_MBPS:
+        case NET_IF_WIFI_DATA_RATE_12_MBPS:
+        case NET_IF_WIFI_DATA_RATE_18_MBPS:
+        case NET_IF_WIFI_DATA_RATE_24_MBPS:
+        case NET_IF_WIFI_DATA_RATE_36_MBPS:
+        case NET_IF_WIFI_DATA_RATE_48_MBPS:
+        case NET_IF_WIFI_DATA_RATE_54_MBPS:
+        case NET_IF_WIFI_DATA_RATE_MCS0:
+        case NET_IF_WIFI_DATA_RATE_MCS1:
+        case NET_IF_WIFI_DATA_RATE_MCS2:
+        case NET_IF_WIFI_DATA_RATE_MCS3:
+        case NET_IF_WIFI_DATA_RATE_MCS4:
+        case NET_IF_WIFI_DATA_RATE_MCS5:
+        case NET_IF_WIFI_DATA_RATE_MCS6:
+        case NET_IF_WIFI_DATA_RATE_MCS7:
+        case NET_IF_WIFI_DATA_RATE_MCS8:
+        case NET_IF_WIFI_DATA_RATE_MCS9:
+        case NET_IF_WIFI_DATA_RATE_MCS10:
+        case NET_IF_WIFI_DATA_RATE_MCS11:
+        case NET_IF_WIFI_DATA_RATE_MCS12:
+        case NET_IF_WIFI_DATA_RATE_MCS13:
+        case NET_IF_WIFI_DATA_RATE_MCS14:
+        case NET_IF_WIFI_DATA_RATE_MCS15:
+             break;
+
+
+        default:
+            *p_err = NET_IF_WIFI_ERR_INVALID_DATA_RATE;
+             return;
+    }
+
+    switch (security_type) {
+        case NET_IF_WIFI_SECURITY_OPEN:
+        case NET_IF_WIFI_SECURITY_WEP:
+        case NET_IF_WIFI_SECURITY_WPA:
+        case NET_IF_WIFI_SECURITY_WPA2:
+             break;
+
+
+        default:
+            *p_err = NET_IF_WIFI_ERR_INVALID_SECURITY;
+             return;
+    }
+
+    switch (pwr_level) {
+        case NET_IF_WIFI_PWR_LEVEL_LO:
+        case NET_IF_WIFI_PWR_LEVEL_MED:
+        case NET_IF_WIFI_PWR_LEVEL_HI:
+             break;
+
+
+        default:
+            *p_err = NET_IF_WIFI_ERR_INVALID_PWR_LEVEL;
+             return;
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetIF_WiFi_Join, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+
+    p_mgr_api = (NET_WIFI_MGR_API *)p_if->Ext_API;
+
+    Mem_Clr(&ap_cfg, sizeof(ap_cfg));
+    ap_cfg.NetType      = net_type;
+    ap_cfg.DataRate     = data_rate;
+    ap_cfg.SecurityType = security_type;
+    ap_cfg.PwrLevel     = pwr_level;
+    ap_cfg.SSID         = ssid;
+    ap_cfg.PSK          = psk;
+    ap_cfg.Ch           = NET_IF_WIFI_CH_ALL;
+
+    p_mgr_api->AP_Join(p_if, &ap_cfg, p_err);
+    switch (*p_err) {
+        case NET_WIFI_MGR_ERR_NONE:
+             p_if->Link = NET_IF_LINK_UP;
+            *p_err      = NET_IF_WIFI_ERR_NONE;
+             break;
+
+        default:
+             break;
+    }
+
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_WiFi_CreateAP()
+*
+* Description : Create a wireless access point.
+*
+* Argument(s) : if_nbr              Wireless network interface number.
+*
+*               net_type            Wireless network type:
+*
+*                                       NET_IF_WIFI_NET_TYPE_INFRASTRUCTURE
+*                                       NET_IF_WIFI_NET_TYPE_ADHOC
+*
+*               data_rate           Wireless date rate to configure:
+*
+*                                       NET_IF_WIFI_DATA_RATE_AUTO
+*                                       NET_IF_WIFI_DATA_RATE_1_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_2_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_5_5_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_6_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_9_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_11_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_12_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_18_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_24_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_36_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_48_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_54_MBPS
+*                                       NET_IF_WIFI_DATA_RATE_MCS0
+*                                       NET_IF_WIFI_DATA_RATE_MCS1
+*                                       NET_IF_WIFI_DATA_RATE_MCS2
+*                                       NET_IF_WIFI_DATA_RATE_MCS3
+*                                       NET_IF_WIFI_DATA_RATE_MCS4
+*                                       NET_IF_WIFI_DATA_RATE_MCS5
+*                                       NET_IF_WIFI_DATA_RATE_MCS6
+*                                       NET_IF_WIFI_DATA_RATE_MCS7
+*                                       NET_IF_WIFI_DATA_RATE_MCS8
+*                                       NET_IF_WIFI_DATA_RATE_MCS9
+*                                       NET_IF_WIFI_DATA_RATE_MCS10
+*                                       NET_IF_WIFI_DATA_RATE_MCS11
+*                                       NET_IF_WIFI_DATA_RATE_MCS12
+*                                       NET_IF_WIFI_DATA_RATE_MCS13
+*                                       NET_IF_WIFI_DATA_RATE_MCS14
+*                                       NET_IF_WIFI_DATA_RATE_MCS15
+*
+*
+*               security_type       Wireless security type:
+*
+*                                       NET_IF_WIFI_SECURITY_OPEN
+*                                       NET_IF_WIFI_SECURITY_WEP
+*                                       NET_IF_WIFI_SECURITY_WPA
+*                                       NET_IF_WIFI_SECURITY_WPA2
+*
+*
+*               pwr_level           Wireless radio power to configure:
+*
+*                                       NET_IF_WIFI_PWR_LEVEL_LO
+*                                       NET_IF_WIFI_PWR_LEVEL_MED
+*                                       NET_IF_WIFI_PWR_LEVEL_HI
+*
+*
+*               ch                  Channel of the wireless network to create:
+*
+*                                       NET_IF_WIFI_CH_1
+*                                       NET_IF_WIFI_CH_2
+*                                       NET_IF_WIFI_CH_3
+*                                       NET_IF_WIFI_CH_4
+*                                       NET_IF_WIFI_CH_5
+*                                       NET_IF_WIFI_CH_6
+*                                       NET_IF_WIFI_CH_7
+*                                       NET_IF_WIFI_CH_8
+*                                       NET_IF_WIFI_CH_9
+*                                       NET_IF_WIFI_CH_10
+*                                       NET_IF_WIFI_CH_11
+*                                       NET_IF_WIFI_CH_12
+*                                       NET_IF_WIFI_CH_13
+*                                       NET_IF_WIFI_CH_14
+*
+*
+*               ssid                SSID of the access point to create.
+*
+*               psk                 Pre shared key of the access point.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Wireless network interface module
+*                                                                       successfully created.
+*
+*                               NET_IF_WIFI_ERR_CREATE              Wireless network interface module
+*                                                                       access point create failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_WiFi_CreateAP() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*********************************************************************************************************
+*/
+
+void  NetIF_WiFi_CreateAP    (NET_IF_NBR                  if_nbr,
+                              NET_IF_WIFI_NET_TYPE        net_type,
+                              NET_IF_WIFI_DATA_RATE       data_rate,
+                              NET_IF_WIFI_SECURITY_TYPE   security_type,
+                              NET_IF_WIFI_PWR_LEVEL       pwr_level,
+                              NET_IF_WIFI_CH              ch,
+                              NET_IF_WIFI_SSID            ssid,
+                              NET_IF_WIFI_PSK             psk,
+                              NET_ERR                    *p_err)
+{
+    NET_IF               *p_if;
+    NET_WIFI_MGR_API     *p_mgr_api;
+    NET_IF_WIFI_AP_CFG    ap_cfg;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------- VALIDATE ARG ------------------- */
+    switch (data_rate) {
+        case NET_IF_WIFI_DATA_RATE_AUTO:
+        case NET_IF_WIFI_DATA_RATE_1_MBPS:
+        case NET_IF_WIFI_DATA_RATE_2_MBPS:
+        case NET_IF_WIFI_DATA_RATE_5_5_MBPS:
+        case NET_IF_WIFI_DATA_RATE_6_MBPS:
+        case NET_IF_WIFI_DATA_RATE_9_MBPS:
+        case NET_IF_WIFI_DATA_RATE_11_MBPS:
+        case NET_IF_WIFI_DATA_RATE_12_MBPS:
+        case NET_IF_WIFI_DATA_RATE_18_MBPS:
+        case NET_IF_WIFI_DATA_RATE_24_MBPS:
+        case NET_IF_WIFI_DATA_RATE_36_MBPS:
+        case NET_IF_WIFI_DATA_RATE_48_MBPS:
+        case NET_IF_WIFI_DATA_RATE_54_MBPS:
+        case NET_IF_WIFI_DATA_RATE_MCS0:
+        case NET_IF_WIFI_DATA_RATE_MCS1:
+        case NET_IF_WIFI_DATA_RATE_MCS2:
+        case NET_IF_WIFI_DATA_RATE_MCS3:
+        case NET_IF_WIFI_DATA_RATE_MCS4:
+        case NET_IF_WIFI_DATA_RATE_MCS5:
+        case NET_IF_WIFI_DATA_RATE_MCS6:
+        case NET_IF_WIFI_DATA_RATE_MCS7:
+        case NET_IF_WIFI_DATA_RATE_MCS8:
+        case NET_IF_WIFI_DATA_RATE_MCS9:
+        case NET_IF_WIFI_DATA_RATE_MCS10:
+        case NET_IF_WIFI_DATA_RATE_MCS11:
+        case NET_IF_WIFI_DATA_RATE_MCS12:
+        case NET_IF_WIFI_DATA_RATE_MCS13:
+        case NET_IF_WIFI_DATA_RATE_MCS14:
+        case NET_IF_WIFI_DATA_RATE_MCS15:
+             break;
+
+
+        default:
+            *p_err = NET_IF_WIFI_ERR_INVALID_DATA_RATE;
+             return;
+    }
+
+
+    switch (security_type) {
+        case NET_IF_WIFI_SECURITY_OPEN:
+        case NET_IF_WIFI_SECURITY_WEP:
+        case NET_IF_WIFI_SECURITY_WPA:
+        case NET_IF_WIFI_SECURITY_WPA2:
+             break;
+
+
+        default:
+            *p_err = NET_IF_WIFI_ERR_INVALID_SECURITY;
+             return;
+    }
+
+
+    switch (pwr_level) {
+        case NET_IF_WIFI_PWR_LEVEL_LO:
+        case NET_IF_WIFI_PWR_LEVEL_MED:
+        case NET_IF_WIFI_PWR_LEVEL_HI:
+             break;
+
+
+        default:
+            *p_err = NET_IF_WIFI_ERR_INVALID_PWR_LEVEL;
+             return;
+    }
+
+
+    switch (ch) {
+        case NET_IF_WIFI_CH_1:
+        case NET_IF_WIFI_CH_2:
+        case NET_IF_WIFI_CH_3:
+        case NET_IF_WIFI_CH_4:
+        case NET_IF_WIFI_CH_5:
+        case NET_IF_WIFI_CH_6:
+        case NET_IF_WIFI_CH_7:
+        case NET_IF_WIFI_CH_8:
+        case NET_IF_WIFI_CH_9:
+        case NET_IF_WIFI_CH_10:
+        case NET_IF_WIFI_CH_11:
+        case NET_IF_WIFI_CH_12:
+        case NET_IF_WIFI_CH_13:
+        case NET_IF_WIFI_CH_14:
+             break;
+
+
+        case NET_IF_WIFI_CH_ALL:
+        default:
+            *p_err = NET_IF_WIFI_ERR_INVALID_CH;
+             return;
+    }
+
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetIF_WiFi_CreateAP, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+
+    p_mgr_api = (NET_WIFI_MGR_API *)p_if->Ext_API;
+
+    Mem_Clr(&ap_cfg, sizeof(ap_cfg));
+    ap_cfg.NetType      = net_type;
+    ap_cfg.DataRate     = data_rate;
+    ap_cfg.SecurityType = security_type;
+    ap_cfg.PwrLevel     = pwr_level;
+    ap_cfg.SSID         = ssid;
+    ap_cfg.PSK          = psk;
+    ap_cfg.Ch           = ch;
+
+    p_mgr_api->AP_Create(p_if, &ap_cfg, p_err);
+    switch (*p_err) {
+        case NET_WIFI_MGR_ERR_NONE:
+             p_if->Link = NET_IF_LINK_UP;
+            *p_err      = NET_IF_WIFI_ERR_NONE;
+             break;
+
+
+        default:
+             p_if->Link = NET_IF_LINK_DOWN;
+            *p_err      = NET_IF_WIFI_ERR_CREATE;
+             break;
+    }
+
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_WiFi_Leave()
+*
+* Description : Leave the access point previously joined.
+*
+*
+* Argument(s) : if_nbr  Wireless network interface number.
+*
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Wireless network interface module
+*                                                                       successfully left.
+*
+*                               NET_IF_WIFI_ERR_LEAVE               Wireless network interface module
+*                                                                       access point leave failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_WiFi_Leave() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+void  NetIF_WiFi_Leave (NET_IF_NBR   if_nbr,
+                        NET_ERR     *p_err)
+{
+
+    NET_IF            *p_if;
+    NET_WIFI_MGR_API  *p_mgr_api;
+
+
+    Net_GlobalLockAcquire((void *)&NetIF_WiFi_Leave, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+
+    p_mgr_api = (NET_WIFI_MGR_API *)p_if->Ext_API;
+
+    p_mgr_api->AP_Leave(p_if, p_err);
+    switch (*p_err) {
+        case NET_WIFI_MGR_ERR_NONE:
+             p_if->Link = NET_IF_LINK_DOWN;
+            *p_err      = NET_IF_WIFI_ERR_NONE;
+             break;
+
+        default:
+             break;
+    }
+
+    Net_GlobalLockRelease();
+}
+
+/*
+*********************************************************************************************************
+*                                          NetIF_WiFi_GetPeerInfo()
+*
+* Description : Get the info of peers connected to the access point (When acting as an access point).
+*
+*
+* Argument(s) : if_nbr              Wireless network interface number.
+*
+*               p_buf_peer          Pointer to the buffer to save the peer information.
+*
+*               buf_peer_len_max    Length in bytes of p_buf_peer.
+*
+*               p_err               Pointer to variable that will receive the return error code from this function :
+*
+*                                       NET_IF_ERR_NONE                     Wireless network interface module
+*                                                                           successfully get the peer info.
+*
+*                                       NET_IF_WIFI_ERR_GET_PEER_INFO       Wireless network interface module
+*                                                                           access point get peer info failed.
+*
+* Return(s)   : Number of peers on the network and that are set in the buffer.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIF_WiFi_GetPeerInfo() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetIF_WiFi_GetPeerInfo (NET_IF_NBR          if_nbr,
+                                    NET_IF_WIFI_PEER   *p_buf_peer,
+                                    CPU_INT16U          buf_peer_len_max,
+                                    NET_ERR            *p_err)
+{
+
+    NET_IF            *p_if;
+    CPU_INT16U         ctn;
+    NET_WIFI_MGR_API  *p_mgr_api;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------- VALIDATE ARG ------------------- */
+    if (p_buf_peer == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetIF_WiFi_GetPeerInfo, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return (0u);
+    }
+
+    p_if = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (0u);
+    }
+
+    p_mgr_api = (NET_WIFI_MGR_API *)p_if->Ext_API;
+
+    ctn = p_mgr_api->AP_GetPeerInfo(p_if,
+                                    p_buf_peer,
+                                    buf_peer_len_max,
+                                    p_err);
+    switch (*p_err) {
+
+        case NET_WIFI_MGR_ERR_NONE:
+            *p_err = NET_IF_WIFI_ERR_NONE;
+             break;
+
+        default:
+            *p_err = NET_IF_WIFI_ERR_GET_PEER_INFO;
+             ctn   = 0u;
+             break;
+    }
+
+    Net_GlobalLockRelease();
+
+    return (ctn);
+}
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_WiFi_Rx()
+*
+* Description : Process received data packets or wireless management frame.
+*
+*
+* Argument(s) : p_if        Pointer to an network interface that received a packet.
+*               ----        Argument validated in NetIF_RxHandler().
+*
+*               p_buf       Pointer to a network buffer that received a packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                               ----- RETURNED BY NetIF_WiFi_RxPktHandler() : -----
+*                               NET_IF_ERR_NONE                 802x packet successfully received & processed.
+*                               NET_ERR_FAULT_NULL_PTR             Argument(s) passed a NULL pointer.
+*
+*                                                               - RETURNED BY NetIF_WiFi_RxMgmtFrameHandler() : --
+*                               NET_IF_ERR_NONE                 Wireless management frame successfully received.
+*
+*                                                               ---- RETURNED BY NetIF_WiFI_RxPktDiscard() : -----
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt() via 'pif_api->Rx()'.
+*
+* Note(s)     : (1) Network buffer already freed by higher layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_WiFi_Rx (NET_IF   *p_if,
+                             NET_BUF  *p_buf,
+                             NET_ERR  *p_err)
+{
+    NET_IF_WIFI_FRAME_TYPE  *p_frame_type;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.WiFi.IF_802xCtrs.NullPtrCtr);
+       *p_err = NET_ERR_RX;
+        return;
+    }
+#endif
+
+
+                                                                /* --------------- DEMUX WIFI PKT/FRAME --------------- */
+    p_frame_type = (NET_IF_WIFI_FRAME_TYPE *)p_buf->DataPtr;
+    switch (*p_frame_type) {
+        case NET_IF_WIFI_DATA_PKT:
+             NetIF_WiFi_RxPktHandler(p_if, p_buf, p_err);
+             break;
+
+
+        case NET_IF_WIFI_MGMT_FRAME:
+             NetIF_WiFi_RxMgmtFrameHandler(p_if, p_buf, p_err);
+             break;
+
+
+        default:
+             NetIF_WiFi_RxDiscard(p_buf, p_err);
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_WiFi_RxPktHandler()
+*
+* Description : (1) Process received data packets & forward to network protocol layers :
+*
+*                   (a) Validate & demultiplex packet to higher-layer protocols
+*                   (b) Update receive statistics
+*
+*
+* Argument(s) : p_if        Pointer to an network interface that received a packet.
+*               ----        Argument validated in NetIF_RxHandler().
+*
+*               p_buf       Pointer to a network buffer that received a packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Wireless packet successfully received &
+*                                                                   processed.
+*
+*                                                               - RETURNED BY NetIF_WiFI_RxPktDiscard() : -
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt() via 'pif_api->Rx()'.
+*
+* Note(s)     : (2) Network buffer already freed by higher layer.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_WiFi_RxPktHandler (NET_IF   *p_if,
+                                       NET_BUF  *p_buf,
+                                       NET_ERR  *p_err)
+{
+    NET_CTR_IF_802x_STATS  *p_ctrs_stat;
+    NET_CTR_IF_802x_ERRS   *p_ctrs_err;
+
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    p_ctrs_stat = &Net_StatCtrs.IFs.WiFi.IF_802xCtrs;
+#else
+    p_ctrs_stat = (NET_CTR_IF_802x_STATS *)0;
+#endif
+#if (NET_CTR_CFG_ERR_EN  == DEF_ENABLED)
+    p_ctrs_err  = &Net_ErrCtrs.IFs.WiFi.IF_802xCtrs;
+#else
+    p_ctrs_err  = (NET_CTR_IF_802x_ERRS *)0;
+#endif
+
+
+                                                                /* ------------------- RX WIFI PKT -------------------- */
+    NetIF_802x_Rx(p_if,
+                 p_buf,
+                 p_ctrs_stat,
+                 p_ctrs_err,
+                 p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.WiFi.RxPktCtr);
+             break;
+
+
+        case NET_ERR_RX:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.WiFi.RxPktDisCtr);
+             break;
+
+
+        case NET_ERR_FAULT_NULL_PTR:
+        default:
+             NetIF_WiFi_RxDiscard(p_buf, p_err);
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIF_WiFi_RxMgmtFrameHandler()
+*
+* Description : Demultiplex management wireless frame.
+*
+*
+* Argument(s) : p_if        Pointer to an network interface that received a packet.
+*               ----        Argument validated in NetIF_RxHandler().
+*
+*               p_buf       Pointer to a network buffer that received a packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Wireless packet successfully demultiplexed.
+*
+*                                                               - RETURNED BY NetIF_WiFI_RxPktDiscard() : -
+*                               NET_ERR_RX                      Receive error; frame discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt() via 'pif_api->Rx()'.
+*
+* Note(s)     : (2) If a network interface receives a packet, its physical link must be 'UP' & the
+*                   interface's physical link state is set accordingly.
+*
+*                   (a) An attempt to check for link state is made after an interface has been started.
+*                       However, many physical layer devices, such as Ethernet physical layers require
+*                       several seconds for Auto-Negotiation to complete before the link becomes
+*                       established.  Thus the interface link flag is not updated until the link state
+*                       timer expires & one or more attempts to check for link state have been completed.
+*
+*               (3) Network buffer already freed by higher layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_WiFi_RxMgmtFrameHandler (NET_IF   *p_if,
+                                             NET_BUF  *p_buf,
+                                             NET_ERR  *p_err)
+{
+    NET_DEV_API_IF_WIFI  *p_dev_api;
+
+
+    if (p_if->Init != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.WiFi.RxMgmtDisCtr);
+        NetIF_WiFi_RxDiscard(p_buf, p_err);
+        return;
+    }
+
+
+                                                                /* -------------- DEMUX WIFI MGMT FRAME --------------- */
+    NET_CTR_STAT_INC(Net_StatCtrs.IFs.WiFi.RxMgmtCtr);
+    p_dev_api = (NET_DEV_API_IF_WIFI *)p_if->Dev_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_dev_api == (NET_DEV_API_IF_WIFI *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+    if (p_dev_api->Rx == (void (*)(NET_IF      *,
+                                   CPU_INT08U **,
+                                   CPU_INT16U  *,
+                                   NET_ERR     *))0) {
+        NetIF_WiFi_RxDiscard(p_buf, p_err);
+        return;
+    }
+#endif
+
+
+    p_dev_api->MgmtDemux(p_if, p_buf, p_err);
+    if (*p_err != NET_DEV_ERR_NONE) {
+         NET_CTR_ERR_INC(Net_ErrCtrs.IFs.WiFi.RxMgmtDisCtr);
+         NetIF_WiFi_RxDiscard(p_buf, p_err);
+         return;
+    }
+
+    NET_CTR_STAT_INC(Net_StatCtrs.IFs.WiFi.RxMgmtCompCtr);
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIF_WiFi_RxPktDiscard()
+*
+* Description : On any receive error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*               -----       Argument checked in NetIF_WiFi_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_WiFi_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_WiFi_RxDiscard (NET_BUF  *p_buf,
+                                    NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.IFs.WiFi.RxDisCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf(p_buf, p_ctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIF_WiFi_Tx()
+*
+* Description : Prepare data packets from network protocol layers for Wireless transmit.
+*
+* Argument(s) : p_if        Pointer to a network interface to transmit data packet(s).
+*               ----        Argument validated in NetIF_TxHandler().
+*
+*               p_buf       Pointer to network buffer with data packet to transmit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Wireless packet successfully prepared
+*                                                                   for transmission.
+*                               NET_IF_ERR_TX_ADDR_PEND         Wireless packet successfully prepared
+*                                                                   & queued for later transmission.
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_TxPkt() via 'pif_api->Tx()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_WiFi_Tx (NET_IF   *p_if,
+                             NET_BUF  *p_buf,
+                             NET_ERR  *p_err)
+{
+    NET_CTR_IF_802x_STATS  *p_ctrs_stat;
+    NET_CTR_IF_802x_ERRS   *p_ctrs_err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetIF_WiFi_TxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IFs.WiFi.TxNullPtrCtr);
+       *p_err = NET_ERR_TX;
+        return;
+    }
+#endif
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    p_ctrs_stat = &Net_StatCtrs.IFs.WiFi.IF_802xCtrs;
+#else
+    p_ctrs_stat = (NET_CTR_IF_802x_STATS *)0;
+#endif
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctrs_err  = &Net_ErrCtrs.IFs.WiFi.IF_802xCtrs;
+#else
+    p_ctrs_err  = (NET_CTR_IF_802x_ERRS *)0;
+#endif
+
+                                                                /* --------------- PREPARE WIFI TX PKT ---------------- */
+    NetIF_802x_Tx(p_if,
+                  p_buf,
+                  p_ctrs_stat,
+                  p_ctrs_err,
+                  p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IFs.WiFi.TxPktCtr);
+             break;
+
+
+        case NET_IF_ERR_TX_ADDR_PEND:
+             break;
+
+
+        case NET_ERR_TX:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IFs.WiFi.TxPktDisCtr);
+             break;
+
+
+        case NET_ERR_FAULT_NULL_PTR:
+        default:
+             NetIF_WiFi_TxPktDiscard(p_buf, p_err);
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIF_WiFi_TxPktDiscard()
+*
+* Description : On any Wireless transmit error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*               -----       Argument checked in NetIF_WiFi_Tx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_WiFi_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_WiFi_TxPktDiscard (NET_BUF  *p_buf,
+                                       NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.IFs.WiFi.TxPktDisCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+
+   (void)NetBuf_FreeBuf(p_buf, p_ctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIF_WiFi_IF_Add()
+*
+* Description : (1) Add & initialize an Wireless network interface :
+*
+*                   (a) Validate   Wireless device configuration
+*                   (b) Initialize Wireless device data area
+*                   (c) Perform    Wireless/OS initialization
+*                   (d) Initialize Wireless device hardware MAC address
+*                   (e) Initialize Wireless device hardware
+*                   (f) Initialize Wireless device MTU
+*                   (g) Configure  Wireless interface
+*
+*
+* Argument(s) : p_if        Pointer to Wireless network interface to add.
+*               ----        Argument validated in NetIF_Add().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                     Wireless interface successfully added.
+*                               NET_ERR_FAULT_MEM_ALLOC             Insufficient resources available to add
+*                                                                       Wireless interface.
+*                               NET_IF_ERR_INVALID_CFG              Invalid/NULL network interface API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT                Invalid NULL network interface function pointer.
+*
+*                               NET_DEV_ERR_INVALID_CFG             Invalid/NULL network device    API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT               Invalid NULL network device    function pointer.
+*
+*                                                                   ------- RETURNED BY NetDev_Init() : ----------
+*                                                                   See NetDev_Init() for addtional return error codes.
+*
+*                                                                   ----- RETURNED BY 'p_dev_api->Init()' : ------
+*                                                                   See specific network device(s) 'Init()' for
+*                                                                       additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Add() via 'pif_api->Add()'.
+*
+* Note(s)     : (2) This function sets the interface MAC address to all 0's.  This ensures that the
+*                   device driver can compare the MAC for all 0 in order to check if the MAC has
+*                   been configured before.
+*
+*               (3) The return error is not checked because there isn't anything that can be done from
+*                   software in order to recover from a device hardware initializtion error.  The cause
+*                   is most likely associated with either a driver or hardware failure.  The best
+*                   course of action it to increment the interface number & allow software to attempt
+*                   to bring up the next interface.
+*
+*               (4) Upon adding an Wireless interface, the highest possible Wireless MTU is configured.
+*                   If this value needs to be changed, either prior to starting the interface, or during
+*                   run-time, it may be reconfigured by calling NetIF_MTU_Set() from the application.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_WiFi_IF_Add (NET_IF   *p_if,
+                                 NET_ERR  *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_BOOLEAN           flags_invalid;
+#endif
+    NET_DEV_CFG_WIFI     *p_dev_cfg;
+    NET_DEV_API_IF_WIFI  *p_dev_api;
+    NET_IF_DATA_WIFI     *p_if_data;
+    NET_WIFI_MGR_API     *p_mgr_api;
+    void                 *p_addr_hw;
+    CPU_SIZE_T            reqd_octets;
+    NET_BUF_SIZE          buf_size_max;
+    NET_MTU               mtu_max;
+    LIB_ERR               err_lib;
+
+
+    p_dev_cfg = (NET_DEV_CFG_WIFI *)p_if->Dev_Cfg;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE DEV CFG ----------------- */
+    flags_invalid =  DEF_BIT_IS_SET_ANY(p_dev_cfg->Flags,
+                  ~((NET_DEV_CFG_FLAGS)NET_DEV_CFG_FLAG_MASK));
+    if (flags_invalid == DEF_YES) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        goto exit;
+    }
+
+    if (p_dev_cfg->RxBufIxOffset < NET_IF_WIFI_CFG_RX_BUF_IX_OFFSET_MIN) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        goto exit;
+    }
+
+                                                                /* ---------------- VALIDATE WIFI MGR ----------------- */
+    if (p_if->Ext_API == (NET_WIFI_MGR_API *)0) {
+       *p_err = NET_DEV_ERR_INVALID_CFG;
+        goto exit;
+    }
+#endif
+
+                                                                /* ------------------- CFG WIFI IF -------------------- */
+    p_if->Type  = NET_IF_TYPE_WIFI;                             /* Set IF type to WiFi.                                 */
+
+
+    NetIF_BufPoolInit(p_if, p_err);                             /* Init IF's buf pools.                                 */
+    if (*p_err != NET_IF_ERR_NONE) {                            /* On any err(s);                                  ...  */
+         goto exit;
+    }
+
+                                                                /* ------------- INIT WIFI DEV DATA AREA -------------- */
+    p_if->IF_Data = Mem_HeapAlloc(sizeof(NET_IF_DATA_WIFI),
+                                  sizeof(void *),
+                                 &reqd_octets,
+                                 &err_lib);
+    if (p_if->IF_Data == (void *)0) {
+       *p_err = NET_ERR_FAULT_MEM_ALLOC;
+        goto exit;
+    }
+
+    p_if_data = (NET_IF_DATA_WIFI *)p_if->IF_Data;
+
+
+
+                                                                /* --------------- INIT IF HW/MAC ADDR ---------------- */
+    p_addr_hw = &p_if_data->HW_Addr[0];
+    Mem_Clr((void     *)p_addr_hw,                              /* Clr hw addr (see Note #2).                           */
+            (CPU_SIZE_T)NET_IF_802x_ADDR_SIZE);
+
+
+                                                                /* ------------------ INIT WIFI MGR ------------------- */
+    p_mgr_api = (NET_WIFI_MGR_API *)p_if->Ext_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_mgr_api == (NET_WIFI_MGR_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        goto exit;
+    }
+    if (p_mgr_api->Init == (void (*)(NET_IF  *,
+                                     NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        goto exit;
+    }
+#endif
+
+    p_mgr_api->Init(p_if, p_err);
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+         goto exit;
+    }
+                                                                /* ------------------- INIT DEV HW -------------------- */
+    p_dev_api = (NET_DEV_API_IF_WIFI *)p_if->Dev_API;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_dev_api == (NET_DEV_API_IF_WIFI *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        goto exit;
+    }
+    if (p_dev_api->Init == (void (*)(NET_IF  *,
+                                     NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        goto exit;
+    }
+#endif
+
+    p_dev_api->Init(p_if, p_err);                               /* Init but don't start dev HW.                         */
+    if (*p_err != NET_DEV_ERR_NONE) {                           /* See Note #3.                                         */
+         goto exit;
+    }
+
+                                                                /* --------------------- INIT MTU --------------------- */
+    buf_size_max = DEF_MAX(p_dev_cfg->TxBufLargeSize,
+                           p_dev_cfg->TxBufSmallSize);
+    mtu_max      = DEF_MIN(NET_IF_MTU_ETHER, buf_size_max);
+    p_if->MTU    = mtu_max;                                     /* Set WiFi MTU (see Note #4).                          */
+
+
+
+
+   *p_err = NET_IF_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIF_WiFi_IF_Start()
+*
+* Description : (1) Start an Wireless Network Interface :
+*                   (a) Start WiFi manager
+*                   (b) Start WiFi device
+*
+*
+* Argument(s) : p_if        Pointer to Wireless network interface to start.
+*               ----        Argument validated in NetIF_Start().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Wireless interface successfully started.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               --- RETURNED BY 'pphy_api->Init()' : ---
+*                               NET_ERR_FAULT_NULL_PTR            Argument(s) passed a NULL pointer.
+*                               NET_PHY_ERR_TIMEOUT_RESET       Phy reset          time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_RD      Phy register read  time-out.
+*                               NET_PHY_ERR_TIMEOUT_REG_WR      Phy register write time-out.
+*
+*                                                               -- RETURNED BY 'p_dev_api->Start()' : --
+*                                                               See specific network device(s) 'Start()'
+*                                                                   for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Start() via 'pif_api->Start()'.
+*
+* Note(s)     : (2) If present, an attempt will be made to initialize the Ethernet Phy (Physical Layer).
+*                   This function assumes that the device driver has initialized the Phy (R)MII bus prior
+*                   to the Phy initialization & link state get calls.
+*
+*               (3) The MII register block remains enabled while the Phy PWRDOWN bit is set.  Thus, all
+*                   parameters may be configured PRIOR to enabling the analog portions of the Phy logic.
+*
+*               (4) If the Phy enable or link state get functions return an error, they may be ignored
+*                   since the Phy may be enabled by default after reset, & the link may become established
+*                   at a later time.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_WiFi_IF_Start (NET_IF   *p_if,
+                                   NET_ERR  *p_err)
+{
+    NET_DEV_API_IF_WIFI  *p_dev_api;
+    NET_WIFI_MGR_API     *p_mgr_api;
+
+
+    p_dev_api = (NET_DEV_API_IF_WIFI *)p_if->Dev_API;
+    p_mgr_api = (NET_WIFI_MGR_API    *)p_if->Ext_API;
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_dev_api == (NET_DEV_API_IF_WIFI *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_dev_api->Start == (void (*)(NET_IF  *,
+                                      NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+
+    if (p_mgr_api == (NET_WIFI_MGR_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_mgr_api->Start == (void (*)(NET_IF  *,
+                                      NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+    p_mgr_api->Start(p_if, p_err);                              /* Start wifi mgr.                                      */
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+         return;
+    }
+
+    p_dev_api->Start(p_if, p_err);                              /* Start dev.                                           */
+    if (*p_err != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+    p_if->Link = NET_IF_LINK_DOWN;
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIF_WiFi_IF_Stop()
+*
+* Description : (1) Stop Specific Network Interface :
+*
+*                   (a) Stop Wireless device
+*                   (b) Stop Wireless physical layer, if available
+*
+*
+* Argument(s) : p_if        Pointer to Wireless network interface to stop.
+*               ----        Argument validated in NetIF_Stop().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Wirless interface successfully stopped.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               -- RETURNED BY 'p_dev_api->Stop()' : ---
+*                                                               See specific network device(s) 'Stop()'
+*                                                                   for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Stop() via 'pif_api->Stop()'.
+*
+* Note(s)     : (2) If the Phy returns an error, it may be ignored since the device has been successfully
+*                   stopped.  One side effect may be that the Phy remains powered on & possibly linked.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_WiFi_IF_Stop (NET_IF   *p_if,
+                                  NET_ERR  *p_err)
+{
+    NET_DEV_API_IF_WIFI  *p_dev_api;
+    NET_WIFI_MGR_API     *p_mgr_api;
+
+
+    p_dev_api = (NET_DEV_API_IF_WIFI *)p_if->Dev_API;
+    p_mgr_api = (NET_WIFI_MGR_API    *)p_if->Ext_API;
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_dev_api == (NET_DEV_API_IF_WIFI *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_dev_api->Stop == (void (*)(NET_IF  *,
+                                     NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+    if (p_mgr_api == (NET_WIFI_MGR_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_mgr_api->Stop == (void (*)(NET_IF  *,
+                                     NET_ERR *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+    p_dev_api->Stop(p_if, p_err);                               /* Stop dev.                                            */
+    if (*p_err != NET_DEV_ERR_NONE) {
+         return;
+    }
+
+    p_mgr_api->Stop(p_if, p_err);                               /* Stop wifi mgr.                                       */
+    if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+         return;
+    }
+
+    p_if->Link = NET_IF_LINK_DOWN;
+
+   *p_err      = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIF_WiFi_IO_CtrlHandler()
+*
+* Description : Handle an Wireless interface's (I/O) control(s).
+*
+* Argument(s) : p_if        Pointer to an Wireless network interface.
+*               ----        Argument validated in NetIF_IO_CtrlHandler().
+*
+*               opt         Desired I/O control option code to perform; additional control options may be
+*                           defined by the device driver :
+*
+*                               NET_IF_IO_CTRL_LINK_STATE_GET           Get    Wireless interface's link state,
+*                                                                           'UP' or 'DOWN'.
+*                               NET_IF_IO_CTRL_LINK_STATE_GET_INFO      Get    Wireless interface's detailed
+*                                                                           link state info.
+*                               NET_IF_IO_CTRL_LINK_STATE_UPDATE        Update Wireless interface's link state.
+*
+*               p_data      Pointer to variable that will receive possible I/O control data (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IF_ERR_NONE                 Wireless I/O control option successfully
+*                                                                   handled.
+*                               NET_ERR_FAULT_NULL_PTR             Argument(s) passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*
+*                                                               -- RETURNED BY 'p_dev_api->IO_Ctrl()' : --
+*                                                               See specific network device(s) 'IO_Ctrl()'
+*                                                                   for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_IO_CtrlHandler() via 'pif_api->IO_Ctrl()'.
+*
+* Note(s)     : (1) 'p_data' MUST point to a variable (or memory) that is sufficiently sized AND aligned
+*                    to receive any return data.
+*********************************************************************************************************
+*/
+
+static  void  NetIF_WiFi_IO_CtrlHandler (NET_IF      *p_if,
+                                         CPU_INT08U   opt,
+                                         void        *p_data,
+                                         NET_ERR     *p_err)
+{
+    CPU_BOOLEAN        *p_link_state;
+    NET_DEV_LINK_WIFI   link_info;
+    NET_WIFI_MGR_API   *p_mgr_api;
+
+
+    p_mgr_api = (NET_WIFI_MGR_API *)p_if->Ext_API;
+
+                                                                /* ------------ VALIDATE EXT API I/O PTRS ------------- */
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_data == (void *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+    if (p_mgr_api == (NET_WIFI_MGR_API *)0) {
+       *p_err = NET_IF_ERR_INVALID_CFG;
+        return;
+    }
+    if (p_mgr_api->IO_Ctrl == (void (*)(NET_IF   *,
+                                        CPU_INT08U,
+                                        void     *,
+                                        NET_ERR  *))0) {
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+
+
+                                                                /* ----------- HANDLE NET DEV I/O CTRL OPT ------------ */
+    switch (opt) {
+        case NET_IF_IO_CTRL_LINK_STATE_GET:
+             p_mgr_api->IO_Ctrl((NET_IF   *) p_if,
+                                (CPU_INT08U) NET_IF_IO_CTRL_LINK_STATE_GET,
+                                (void     *)&link_info,         /* Get link state info.                                 */
+                                (NET_ERR  *) p_err);
+
+             p_link_state = (CPU_BOOLEAN *)p_data;              /* See Note #1.                                         */
+
+             if (*p_err       != NET_WIFI_MGR_ERR_NONE) {
+                 *p_link_state = NET_IF_LINK_DOWN;
+                  return;
+             }
+
+            *p_link_state = link_info.LinkState;
+             break;
+
+
+        case NET_IF_IO_CTRL_LINK_STATE_UPDATE:
+                                                                /* Rtn err for unavail ctrl opt?                        */
+             break;
+
+
+        case NET_IF_IO_CTRL_LINK_STATE_GET_INFO:
+        default:                                                /* Handle other dev I/O opt(s).                         */
+             p_mgr_api->IO_Ctrl((NET_IF   *)p_if,
+                                (CPU_INT08U)opt,
+                                (void     *)p_data,             /* See Note #1.                                         */
+                                (NET_ERR  *)p_err);
+             if (*p_err != NET_WIFI_MGR_ERR_NONE) {
+                  return;
+             }
+             break;
+    }
+
+
+   *p_err = NET_IF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_WIFI_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_wifi.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_wifi.h
new file mode 100644
index 0000000..ef5ca32
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_wifi.h
@@ -0,0 +1,831 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK INTERFACE LAYER
+*
+*                                              WIRELESS
+*
+* Filename      : net_if_wifi.h
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Supports following network interface layers:
+*
+*                     (a) Ethernet See 'net_if_802x.h Note #1a'
+*
+*                     (b) IEEE 802 See 'net_if_802x.h Note #1b'
+*
+*                 (2) Wireless implementation conforms to RFC #1122, Section 2.3.3, bullets (a) & (b), but
+*                     does NOT implement bullet (c) :
+*
+*                     RFC #1122                  LINK LAYER                  October 1989
+*
+*                     2.3.3  ETHERNET (RFC-894) and IEEE 802 (RFC-1042) ENCAPSULATION
+*
+*                            Every Internet host connected to a 10Mbps Ethernet cable :
+*
+*                            (a) MUST be able to send and receive packets using RFC-894 encapsulation;
+*
+*                            (b) SHOULD be able to receive RFC-1042 packets, intermixed with RFC-894 packets; and
+*
+*                            (c) MAY be able to send packets using RFC-1042 encapsulation.
+*
+*                 (3) Wireless implemtation doesn't supports wireless supplicant and/or IEEE 802.11. The
+*                     wireless module-hardware must provide the wireless suppliant and all relevant IEEE 802.11
+*                     supports.
+*
+*                 (4) REQUIREs the following network protocol files in network directories :
+*
+*                     (a) (1) Network Interface Layer
+*                         (2) 802x    Interface layer
+*
+*                           Located in the following network directory
+*
+*                               \\IF\
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_if_802x.h"
+#include  "../Source/net_cfg_net.h"
+#include  "../Source/net_buf.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Wireless Interface module is included only if support for Wireless devices is configured
+*               (see 'net_cfg_net.h  NETWORK INTERFACE LAYER CONFIGURATION  Note #2a2').
+*
+*           (2) The following Wireless-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require Ethernet configuration
+*               (see 'net_cfg_net.h  NETWORK INTERFACE LAYER CONFIGURATION  Note #2a2') :
+*
+*                   NET_IF_WIFI_MODULE_EN
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IF_WIFI_MODULE_PRESENT
+#define  NET_IF_WIFI_MODULE_PRESENT
+
+#ifdef  NET_IF_WIFI_MODULE_EN                              /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_IF_WIFI_BUF_RX_LEN_MIN     NET_IF_802x_BUF_RX_LEN_MIN
+#define  NET_IF_WIFI_BUF_TX_LEN_MIN     NET_IF_802x_BUF_TX_LEN_MIN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   DEVICE SPI CFG VALUE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U   NET_DEV_CFG_SPI_CLK_FREQ;
+
+
+typedef  CPU_BOOLEAN  NET_DEV_CFG_SPI_CLK_POL;
+
+#define  NET_DEV_SPI_CLK_POL_INACTIVE_LOW                  0u   /* The clk is low  when inactive.                         */
+#define  NET_DEV_SPI_CLK_POL_INACTIVE_HIGH                 1u   /* The clk is high when inactive.                         */
+
+
+
+typedef  CPU_BOOLEAN  NET_DEV_CFG_SPI_CLK_PHASE;
+
+#define  NET_DEV_SPI_CLK_PHASE_FALLING_EDGE                0u   /*Data is 'read'    on the leading   edge of the clk & .. */
+                                                                /* ...    'changed' on the following edge of the clk.     */
+#define  NET_DEV_SPI_CLK_PHASE_RAISING_EDGE                1u   /*Data is 'changed' on the following edge of the clk & .. */
+                                                                /* ...    'read'    on the leading   edge of the clk.     */
+
+
+typedef  CPU_INT08U   NET_DEV_CFG_SPI_XFER_UNIT_LEN;
+
+#define  NET_DEV_SPI_XFER_UNIT_LEN_8_BITS                  8u   /* Xfer unit len is  8 bits.                              */
+#define  NET_DEV_SPI_XFER_UNIT_LEN_16_BITS                16u   /* Xfer unit len is 16 bits.                              */
+#define  NET_DEV_SPI_XFER_UNIT_LEN_32_BITS                32u   /* Xfer unit len is 32 bits.                              */
+#define  NET_DEV_SPI_XFER_UNIT_LEN_64_BITS                64u   /* Xfer unit len is 64 bits.                              */
+
+
+
+typedef  CPU_BOOLEAN  NET_DEV_CFG_SPI_XFER_SHIFT_DIR;
+
+#define  NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_MSB              0u   /* Xfer MSB first.                                        */
+#define  NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_LSB              1u   /* Xfer LSB first.                                        */
+
+
+
+typedef  CPU_INT08U   NET_DEV_BAND;
+
+#define  NET_DEV_BAND_NONE                                 0u
+#define  NET_DEV_BAND_2_4_GHZ                              1u
+#define  NET_DEV_BAND_5_0_GHZ                              2u
+#define  NET_DEV_BAND_DUAL                                 3u
+
+
+/*
+*********************************************************************************************************
+*                                    WIRELESS FRAME TYPE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U     NET_IF_WIFI_FRAME_TYPE;
+
+#define  NET_IF_WIFI_DATA_PKT                              1u
+#define  NET_IF_WIFI_MGMT_FRAME                            2u
+
+#define  NET_IF_WIFI_CFG_RX_BUF_IX_OFFSET_MIN              1u           /* The rx buf must be prefixed with pkt type.   */
+
+
+/*
+*********************************************************************************************************
+*                                       WIRELESS CMD DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U     NET_IF_WIFI_CMD;                                /* Define WiFi cmd.                             */
+
+#define  NET_IF_WIFI_CMD_SCAN                              1u
+#define  NET_IF_WIFI_CMD_JOIN                              2u
+#define  NET_IF_WIFI_CMD_LEAVE                             3u
+#define  NET_IF_WIFI_CMD_LINK_STATE_GET                    4u
+#define  NET_IF_WIFI_CMD_LINK_STATE_GET_INFO               5u
+#define  NET_IF_WIFI_CMD_LINK_STATE_UPDATE                 6u
+#define  NET_IF_WIFI_CMD_CREATE                               7u
+#define  NET_IF_WIFI_CMD_GET_PEER_INFO                     8u
+
+typedef  CPU_BOOLEAN    NET_IF_WIFI_CMD_TYPE;
+
+#define  NET_IF_WIFI_CMD_TYPE_ANALYSE_RESP                 0u
+#define  NET_IF_WIFI_CMD_TYPE_EXECUTE_CMD                  1u
+
+
+
+/*
+*********************************************************************************************************
+*                                  WIRELESS SECURITY TYPE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U     NET_IF_WIFI_SECURITY_TYPE;                      /* Define WiFi security type.                   */
+
+#define  NET_IF_WIFI_SECURITY_OPEN                         1u
+#define  NET_IF_WIFI_SECURITY_WEP                          2u
+#define  NET_IF_WIFI_SECURITY_WPA                          3u
+#define  NET_IF_WIFI_SECURITY_WPA2                         4u
+
+
+/*
+*********************************************************************************************************
+*                                    WIRELESS CHANNEL DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U     NET_IF_WIFI_CH;
+
+                                                                        /* Defines WiFi ch.                             */
+#define  NET_IF_WIFI_CH_ALL                                0u
+#define  NET_IF_WIFI_CH_1                                  1u
+#define  NET_IF_WIFI_CH_2                                  2u
+#define  NET_IF_WIFI_CH_3                                  3u
+#define  NET_IF_WIFI_CH_4                                  4u
+#define  NET_IF_WIFI_CH_5                                  5u
+#define  NET_IF_WIFI_CH_6                                  6u
+#define  NET_IF_WIFI_CH_7                                  7u
+#define  NET_IF_WIFI_CH_8                                  8u
+#define  NET_IF_WIFI_CH_9                                  9u
+#define  NET_IF_WIFI_CH_10                                10u
+#define  NET_IF_WIFI_CH_11                                11u
+#define  NET_IF_WIFI_CH_12                                12u
+#define  NET_IF_WIFI_CH_13                                13u
+#define  NET_IF_WIFI_CH_14                                14u
+
+
+#define  NET_IF_WIFI_CH_MIN             NET_IF_WIFI_CH_ALL
+#define  NET_IF_WIFI_CH_MAX             NET_IF_WIFI_CH_14
+
+
+/*
+*********************************************************************************************************
+*                                   WIRELESS NETWORK TYPE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U     NET_IF_WIFI_NET_TYPE;                           /* Define WiFi net type.                        */
+
+#define  NET_IF_WIFI_NET_TYPE_UNKNOWN                      0u
+#define  NET_IF_WIFI_NET_TYPE_INFRASTRUCTURE               1u
+#define  NET_IF_WIFI_NET_TYPE_ADHOC                        2u
+
+
+/*
+*********************************************************************************************************
+*                                    WIRELESS DATA RATE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U     NET_IF_WIFI_DATA_RATE;                          /* Define WiFi data rate.                       */
+
+#define  NET_IF_WIFI_DATA_RATE_AUTO                        0u
+#define  NET_IF_WIFI_DATA_RATE_1_MBPS                      1u
+#define  NET_IF_WIFI_DATA_RATE_2_MBPS                      2u
+#define  NET_IF_WIFI_DATA_RATE_5_5_MBPS                    5u
+#define  NET_IF_WIFI_DATA_RATE_6_MBPS                      6u
+#define  NET_IF_WIFI_DATA_RATE_9_MBPS                      9u
+#define  NET_IF_WIFI_DATA_RATE_11_MBPS                    11u
+#define  NET_IF_WIFI_DATA_RATE_12_MBPS                    12u
+#define  NET_IF_WIFI_DATA_RATE_18_MBPS                    18u
+#define  NET_IF_WIFI_DATA_RATE_24_MBPS                    24u
+#define  NET_IF_WIFI_DATA_RATE_36_MBPS                    36u
+#define  NET_IF_WIFI_DATA_RATE_48_MBPS                    48u
+#define  NET_IF_WIFI_DATA_RATE_54_MBPS                    54u
+#define  NET_IF_WIFI_DATA_RATE_MCS0                      100u
+#define  NET_IF_WIFI_DATA_RATE_MCS1                      101u
+#define  NET_IF_WIFI_DATA_RATE_MCS2                      102u
+#define  NET_IF_WIFI_DATA_RATE_MCS3                      103u
+#define  NET_IF_WIFI_DATA_RATE_MCS4                      104u
+#define  NET_IF_WIFI_DATA_RATE_MCS5                      105u
+#define  NET_IF_WIFI_DATA_RATE_MCS6                      106u
+#define  NET_IF_WIFI_DATA_RATE_MCS7                      107u
+#define  NET_IF_WIFI_DATA_RATE_MCS8                      108u
+#define  NET_IF_WIFI_DATA_RATE_MCS9                      109u
+#define  NET_IF_WIFI_DATA_RATE_MCS10                     110u
+#define  NET_IF_WIFI_DATA_RATE_MCS11                     111u
+#define  NET_IF_WIFI_DATA_RATE_MCS12                     112u
+#define  NET_IF_WIFI_DATA_RATE_MCS13                     113u
+#define  NET_IF_WIFI_DATA_RATE_MCS14                     114u
+#define  NET_IF_WIFI_DATA_RATE_MCS15                     115u
+
+
+/*
+*********************************************************************************************************
+*                                 WIRELESS POWER & STRENGHT DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U     NET_IF_WIFI_PWR_LEVEL;                          /* Define WiFi pwr level.                       */
+typedef  CPU_INT08U     NET_IF_WIFI_SIGNAL_STRENGTH;                    /* WiFi IF's signal strength.                   */
+
+#define  NET_IF_WIFI_PWR_LEVEL_LO                          0u
+#define  NET_IF_WIFI_PWR_LEVEL_MED                         1u
+#define  NET_IF_WIFI_PWR_LEVEL_HI                          2u
+
+
+/*
+*********************************************************************************************************
+*                                       WIRELESS SSID DATA TYPE
+*********************************************************************************************************
+*/
+
+#define  NET_IF_WIFI_STR_LEN_MAX_SSID                     32u
+
+typedef  struct  net_if_wifi_ssid {                                     /* Define WiFi SSID.                            */
+    CPU_CHAR                     SSID[NET_IF_WIFI_STR_LEN_MAX_SSID];    /* WiFi SSID.                                   */
+} NET_IF_WIFI_SSID;
+
+
+/*
+*********************************************************************************************************
+*                                       WIRELESS PSK DATA TYPE
+*********************************************************************************************************
+*/
+
+#define  NET_IF_WIFI_STR_LEN_MAX_PSK                      32u
+
+typedef  struct  net_if_wifi_psk {
+    CPU_CHAR                     PSK[NET_IF_WIFI_STR_LEN_MAX_PSK];      /* WiFi PSK.                                    */
+} NET_IF_WIFI_PSK;
+
+/*
+*********************************************************************************************************
+*                                       WIRELESS BSS MAC ADDR
+*********************************************************************************************************
+*/
+
+
+typedef  struct  net_if_wifi_bssid {
+    CPU_INT08U                   BSSID[NET_IF_802x_ADDR_SIZE];          /* WiFi BSSID                                   */
+} NET_IF_WIFI_BSSID;
+
+
+/*
+*********************************************************************************************************
+*                                       WIRELESS SCAN DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  net_if_wifi_scan {
+    NET_IF_WIFI_SSID             SSID;                                  /* WiFi scan SSID.                              */
+    NET_IF_WIFI_CH               Ch;                                    /* WiFi Scan Ch.                                */
+} NET_IF_WIFI_SCAN;
+
+
+/*
+*********************************************************************************************************
+*                                 WIRELESS APs SCAN RESULT DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  net_if_wifi_ap {
+    NET_IF_WIFI_BSSID            BSSID;                                 /* WiFi AP SSID.                                */
+    NET_IF_WIFI_SSID             SSID;                                  /* WiFi AP SSID.                                */
+    NET_IF_WIFI_CH               Ch;                                    /* WiFi AP Ch.                                  */
+    NET_IF_WIFI_NET_TYPE         NetType;                               /* Wifi AP net type.                            */
+    NET_IF_WIFI_SECURITY_TYPE    SecurityType;                          /* WiFi AP security type.                       */
+    NET_IF_WIFI_SIGNAL_STRENGTH  SignalStrength;                        /* WiFi AP Signal Strength.                     */
+} NET_IF_WIFI_AP;
+
+
+
+/*
+*********************************************************************************************************
+*                                     WIRELESS AP CONFIG DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  net_if_wifi_ap_cfg {
+    NET_IF_WIFI_NET_TYPE         NetType;                               /* WiFi AP Config net type.                     */
+    NET_IF_WIFI_DATA_RATE        DataRate;                              /* WiFi AP Config data rate.                    */
+    NET_IF_WIFI_SECURITY_TYPE    SecurityType;                          /* WiFi AP Config security type.                */
+    NET_IF_WIFI_PWR_LEVEL        PwrLevel;                              /* WiFi AP Config pwr level.                    */
+    NET_IF_WIFI_SSID             SSID;                                  /* WiFi AP Config ssid.                         */
+    NET_IF_WIFI_PSK              PSK;                                   /* WiFi AP Config psk.                          */
+    NET_IF_WIFI_CH               Ch;                                    /* WiFi AP Config ch.                           */
+} NET_IF_WIFI_AP_CFG;
+
+/*
+*********************************************************************************************************
+*                                     WIRELESS PEER INFO DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  net_if_wifi_peer {
+    CPU_CHAR                     HW_Addr[NET_IF_802x_ADDR_SIZE];        /* WiFi peer MAC addr.                          */
+} NET_IF_WIFI_PEER;
+
+
+
+/*
+*********************************************************************************************************
+*                                     WIRELESS DEVICE DATA TYPES
+*
+* Note(s) : (1) The Wireless interface configuration data type is a specific definition of a network
+*               device configuration data type.  Each specific network device configuration data type
+*               MUST define ALL generic network device configuration parameters, synchronized in both
+*               the sequential order & data type of each parameter.
+*
+*               Thus, ANY modification to the sequential order or data types of configuration parameters
+*               MUST be appropriately synchronized between the generic network device configuration data
+*               type & the Ethernet interface configuration data type.
+*
+*               See also 'net_if.h  GENERIC NETWORK DEVICE CONFIGURATION DATA TYPE  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                        /* ----------------------- NET WIFI DEV CFG ----------------------- */
+typedef  struct  net_dev_cfg_wifi {
+    NET_IF_MEM_TYPE                 RxBufPoolType;      /* Rx buf mem pool type :                                           */
+                                                        /*   NET_IF_MEM_TYPE_MAIN        bufs alloc'd from main      mem    */
+                                                        /*   NET_IF_MEM_TYPE_DEDICATED   bufs alloc'd from dedicated mem    */
+    NET_BUF_SIZE                    RxBufLargeSize;     /* Size  of dev rx large buf data areas (in octets).                */
+    NET_BUF_QTY                     RxBufLargeNbr;      /* Nbr   of dev rx large buf data areas.                            */
+    NET_BUF_SIZE                    RxBufAlignOctets;   /* Align of dev rx       buf data areas (in octets).                */
+    NET_BUF_SIZE                    RxBufIxOffset;      /* Offset from base ix to rx data into data area (in octets).       */
+
+
+    NET_IF_MEM_TYPE                 TxBufPoolType;      /* Tx buf mem pool type :                                           */
+                                                        /*   NET_IF_MEM_TYPE_MAIN        bufs alloc'd from main      mem    */
+                                                        /*   NET_IF_MEM_TYPE_DEDICATED   bufs alloc'd from dedicated mem    */
+    NET_BUF_SIZE                    TxBufLargeSize;     /* Size  of dev tx large buf data areas (in octets).                */
+    NET_BUF_QTY                     TxBufLargeNbr;      /* Nbr   of dev tx large buf data areas.                            */
+    NET_BUF_SIZE                    TxBufSmallSize;     /* Size  of dev tx small buf data areas (in octets).                */
+    NET_BUF_QTY                     TxBufSmallNbr;      /* Nbr   of dev tx small buf data areas.                            */
+    NET_BUF_SIZE                    TxBufAlignOctets;   /* Align of dev tx       buf data areas (in octets).                */
+    NET_BUF_SIZE                    TxBufIxOffset;      /* Offset from base ix to tx data from data area (in octets).       */
+
+
+    CPU_ADDR                        MemAddr;            /* Base addr of (WiFi dev's) dedicated mem, if avail.               */
+    CPU_ADDR                        MemSize;            /* Size      of (WiFi dev's) dedicated mem, if avail.               */
+
+
+    NET_DEV_CFG_FLAGS               Flags;              /* Opt'l bit flags.                                                 */
+
+    NET_DEV_BAND                    Band;               /* Wireless Band to use by the device.                              */
+                                                        /*   NET_DEV_2_4_GHZ        Wireless band is 2.4Ghz.                */
+                                                        /*   NET_DEV_5_0_GHZ        Wireless band is 5.0Ghz.                */
+                                                        /*   NET_DEV_DUAL           Wireless band is dual (2.4 & 5.0 Ghz).  */
+
+    NET_DEV_CFG_SPI_CLK_FREQ        SPI_ClkFreq;        /* SPI Clk freq (in Hz).                                            */
+
+    NET_DEV_CFG_SPI_CLK_POL         SPI_ClkPol;         /* SPI Clk pol:                                                     */
+                                                        /*   NET_DEV_SPI_CLK_POL_ACTIVE_LOW      clk is low  when inactive. */
+                                                        /*   NET_DEV_SPI_CLK_POL_ACTIVE_HIGH     clk is high when inactive. */
+
+    NET_DEV_CFG_SPI_CLK_PHASE       SPI_ClkPhase;       /* SPI Clk phase:                                                   */
+                                                        /*   NET_DEV_SPI_CLK_PHASE_FALLING_EDGE  Data availables on  ...    */
+                                                        /*                                          ... failling edge.      */
+                                                        /*   NET_DEV_SPI_CLK_PHASE_RASING_EDGE   Data availables on  ...    */
+                                                        /*                                          ... rasing edge.        */
+
+    NET_DEV_CFG_SPI_XFER_UNIT_LEN   SPI_XferUnitLen;    /* SPI xfer unit length:                                            */
+                                                        /*   NET_DEV_SPI_XFER_UNIT_LEN_8_BITS    Unit len of  8 bits.       */
+                                                        /*   NET_DEV_SPI_XFER_UNIT_LEN_16_BITS   Unit len of 16 bits.       */
+                                                        /*   NET_DEV_SPI_XFER_UNIT_LEN_32_BITS   Unit len of 32 bits.       */
+                                                        /*   NET_DEV_SPI_XFER_UNIT_LEN_64_BITS   Unit len of 64 bits.       */
+
+    NET_DEV_CFG_SPI_XFER_SHIFT_DIR  SPI_XferShiftDir;   /* SPI xfer shift dir:                                              */
+                                                        /*   NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_MSB   Xfer MSB first.         */
+                                                        /*   NET_DEV_SPI_XFER_SHIFT_DIR_FIRST_LSB   Xfer LSB first.         */
+
+    CPU_CHAR                        HW_AddrStr[NET_IF_802x_ADDR_SIZE_STR];  /*  WiFi IF's dev hw addr str.                  */
+
+} NET_DEV_CFG_WIFI;
+
+
+
+
+                                                    /* -------------------- NET WIFI DEV LINK STATE ------------------- */
+typedef  struct net_dev_link_state_wifi {
+    CPU_BOOLEAN             LinkState;              /* Link   state.                                                    */
+    NET_IF_WIFI_AP          AP;                     /* Access Point.                                                    */
+    NET_IF_WIFI_DATA_RATE   DataRate;               /* Link   spd.                                                      */
+    NET_IF_WIFI_PWR_LEVEL   PwrLevel;               /* Power  Level.                                                    */
+} NET_DEV_LINK_WIFI;
+
+
+/*
+*********************************************************************************************************
+*                                   WIRELESS DEVICE API DATA TYPES
+*
+* Note(s) : (1) (a) The Wireless device application programming interface (API) data type is a specific
+*                   network device API data type definition which MUST define ALL generic network device
+*                   API functions, synchronized in both the sequential order of the functions & argument
+*                   lists for each function.
+*
+*                   Thus, ANY modification to the sequential order or argument lists of the API functions
+*                   MUST be appropriately synchronized between the generic network device API data type &
+*                   the Wireless device API data type definition/instantiations.
+*
+*                   However, specific Wireless device API data type definitions/instantiations MAY include
+*                   additional API functions after all generic Ethernet device API functions.
+*
+*               (b) ALL API functions MUST be defined with NO NULL functions for all specific Wireless
+*                   device API instantiations.  Any specific Ethernet device API instantiation that does
+*                   NOT require a specific API's functionality MUST define an empty API function.
+*
+*               See also 'net_if.h  GENERIC NETWORK DEVICE API DATA TYPE  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                                        /* ------------- NET WIFI DEV API ------------- */
+                                                                        /* Net WiFi dev API fnct ptrs :                 */
+typedef  struct  net_dev_api_if_wifi {
+                                                                        /*   Init/add                                   */
+    void  (*Init)               (NET_IF               *p_if,
+                                 NET_ERR              *p_err);
+                                                                        /*   Start                                      */
+    void  (*Start)              (NET_IF               *p_if,
+                                 NET_ERR              *p_err);
+                                                                        /*   Stop                                       */
+    void  (*Stop)               (NET_IF               *p_if,
+                                 NET_ERR              *p_err);
+                                                                        /*   Rx                                         */
+    void  (*Rx)                 (NET_IF               *p_if,
+                                 CPU_INT08U          **p_data,
+                                 CPU_INT16U           *size,
+                                 NET_ERR              *p_err);
+                                                                        /*   Tx                                         */
+    void  (*Tx)                 (NET_IF               *p_if,
+                                 CPU_INT08U           *p_data,
+                                 CPU_INT16U            size,
+                                 NET_ERR              *p_err);
+                                                                        /*   Multicast addr add                         */
+    void  (*AddrMulticastAdd)   (NET_IF               *p_if,
+                                 CPU_INT08U           *p_addr_hw,
+                                 CPU_INT08U            addr_hw_len,
+                                 NET_ERR              *p_err);
+                                                                        /*   Multicast addr remove                      */
+    void  (*AddrMulticastRemove)(NET_IF               *p_if,
+                                 CPU_INT08U           *p_addr_hw,
+                                 CPU_INT08U            addr_hw_len,
+                                 NET_ERR              *p_err);
+                                                                        /*   ISR handler                                */
+    void  (*ISR_Handler)        (NET_IF               *p_if,
+                                 NET_DEV_ISR_TYPE      type);
+
+                                                                        /*   Demux Pkt Mgmt                             */
+    void  (*MgmtDemux)          (NET_IF               *p_if,
+                                 NET_BUF              *p_buf,
+                                 NET_ERR              *p_err);
+} NET_DEV_API_IF_WIFI;
+
+
+                                                                                        /* ----- NET WIFI MGR API ----- */
+                                                                                        /* Net WiFi mgr API fnct ptrs : */
+typedef  struct  net_wifi_mgr_api {
+                                                                                        /*   Init                       */
+    void           (*Init)                     (       NET_IF                *p_if,
+                                                       NET_ERR               *p_err);
+                                                                                        /*   Start                      */
+    void           (*Start)                    (       NET_IF                *p_if,
+                                                       NET_ERR               *p_err);
+                                                                                        /*   Stop                       */
+    void           (*Stop)                     (       NET_IF                *p_if,
+                                                       NET_ERR               *p_err);
+                                                                                        /*   Scan                       */
+    CPU_INT16U     (*AP_Scan)                  (       NET_IF                *p_if,
+                                                       NET_IF_WIFI_AP        *p_buf_scan,
+                                                       CPU_INT16U             buf_scan_len_max,
+                                                const  NET_IF_WIFI_SSID      *p_ssid,
+                                                       NET_IF_WIFI_CH         ch,
+                                                       NET_ERR               *p_err);
+                                                                                        /*   Join                       */
+    void           (*AP_Join)                  (       NET_IF                *p_if,
+                                                const  NET_IF_WIFI_AP_CFG    *p_ap_cfg,
+                                                       NET_ERR               *p_err);
+                                                                                        /*   Leave                      */
+    void           (*AP_Leave)                 (       NET_IF                *p_if,
+                                                       NET_ERR               *p_err);
+
+                                                                                        /*   I/O Control                */
+    void           (*IO_Ctrl)                     (    NET_IF                *p_if,
+                                                       CPU_INT08U             opt,
+                                                       void                  *p_data,
+                                                       NET_ERR               *p_err);
+                                                                                        /*   Mgmt handler               */
+    CPU_INT32U     (*Mgmt)                     (       NET_IF                *p_if,
+                                                       NET_IF_WIFI_CMD        cmd,
+                                                       CPU_INT08U            *p_buf_cmd,
+                                                       CPU_INT16U             buf_cmd_len,
+                                                       CPU_INT08U            *p_buf_rtn,
+                                                       CPU_INT16U             buf_rtn_len_max,
+                                                       NET_ERR               *p_err);
+                                                                                        /*   Mgr signal                 */
+    void           (*Signal)                   (       NET_IF                *p_if,
+                                                       NET_BUF               *p_buf,
+                                                       NET_ERR               *p_err);
+                                                                                        /*   Create                     */
+    void           (*AP_Create)                (       NET_IF                *p_if,
+                                                const  NET_IF_WIFI_AP_CFG    *p_cfg,
+                                                       NET_ERR               *p_err);
+                                                                                        /*   Get Peer Info              */
+    CPU_INT16U     (*AP_GetPeerInfo)           (       NET_IF                *p_if,
+                                                const  NET_IF_WIFI_PEER      *p_buf_peer,
+                                                       CPU_INT16U             peer_info_len_max,
+                                                       NET_ERR               *p_err);
+} NET_WIFI_MGR_API;
+
+
+/*
+*********************************************************************************************************
+*                              WIRELESS DEVICE BSP INTERFACE DATA TYPE
+*
+* Note(s) : (1) (a) The Wireless device board-support package (BSP) interface data type is a specific
+*                   network device BSP interface data type definition which SHOULD define ALL generic
+*                   network device BSP functions, synchronized in both the sequential order of the
+*                   functions & argument lists for each function.
+*
+*                   Thus, ANY modification to the sequential order or argument lists of the BSP functions
+*                   SHOULD be appropriately synchronized between the generic network device BSP interface
+*                   data type & the Wireless device BSP interface data type definition/instantiations.
+*
+*                   However, specific Wireless device BSP interface data type definitions/instantiations
+*                   MAY include additional BSP functions after all generic Wireless device BSP functions.
+*
+*               (b) A specific Wireless device BSP interface instantiation MAY define NULL functions for
+*                   any (or all) BSP functions provided that the specific Ethernet device driver does NOT
+*                   require those specific BSP function(s).
+*********************************************************************************************************
+*/
+
+                                                                            /* ----------- NET WIFI DEV BSP ----------- */
+                                                                            /* Net WiFi dev BSP fnct ptrs :             */
+typedef  struct  net_dev_bsp_wifi_spi {
+                                                                            /*   Start                                  */
+    void        (*Start)            (NET_IF                          *p_if,
+                                     NET_ERR                         *p_err);
+                                                                            /*   Stop                                       */
+    void        (*Stop )            (NET_IF                          *p_if,
+                                     NET_ERR                         *p_err);
+                                                                            /*   Cfg GPIO                                   */
+    void        (*CfgGPIO)          (NET_IF                          *p_if,
+                                     NET_ERR                         *p_err);
+                                                                            /*   Cfg ISR                                    */
+    void        (*CfgIntCtrl)       (NET_IF                          *p_if,
+                                     NET_ERR                         *p_err);
+                                                                            /*   Enable/Disable ISR                         */
+    void        (*IntCtrl)          (NET_IF                          *p_if,
+                                     CPU_BOOLEAN                      en,
+                                     NET_ERR                         *p_err);
+                                                                            /*   Cfg SPI                                    */
+    void        (*SPI_Init)         (NET_IF                          *p_if,
+                                     NET_ERR                         *p_err);
+                                                                            /*   Lock                                       */
+    void        (*SPI_Lock)         (NET_IF                          *p_if,
+                                     NET_ERR                         *p_err);
+                                                                            /*   Unlock                                     */
+    void        (*SPI_Unlock)       (NET_IF                          *p_if);
+                                                                            /*   Wr & Rd                                    */
+    void        (*SPI_WrRd)         (NET_IF                          *p_if,
+                                     CPU_INT08U                      *p_buf_wr,
+                                     CPU_INT08U                      *p_buf_rd,
+                                     CPU_INT16U                       len,
+                                     NET_ERR                         *p_err);
+                                                                            /*   Chip Select                                */
+    void        (*SPI_ChipSelEn)    (NET_IF                          *p_if,
+                                     NET_ERR                         *p_err);
+                                                                            /*   Chip Unselect                              */
+    void        (*SPI_ChipSelDis)   (NET_IF                          *p_if);
+                                                                            /*   Set SPI Cfg                                */
+    void        (*SPI_SetCfg)       (NET_IF                          *p_if,
+                                     NET_DEV_CFG_SPI_CLK_FREQ         freq,
+                                     NET_DEV_CFG_SPI_CLK_POL          pol,
+                                     NET_DEV_CFG_SPI_CLK_PHASE        pha,
+                                     NET_DEV_CFG_SPI_XFER_UNIT_LEN    xfer_unit_len,
+                                     NET_DEV_CFG_SPI_XFER_SHIFT_DIR   xfer_shift_dir,
+                                     NET_ERR                         *p_err);
+} NET_DEV_BSP_WIFI_SPI;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+extern  const  NET_IF_API  NetIF_API_WiFi;                      /* Wireless IF API fnct ptr(s).                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetIF_WiFi_Scan       (       NET_IF_NBR                  if_nbr,
+                                          NET_IF_WIFI_AP             *p_buf_scan,
+                                          CPU_INT16U                  buf_scan_len_max,
+                                   const  NET_IF_WIFI_SSID           *p_ssid,
+                                          NET_IF_WIFI_CH              ch,
+                                          NET_ERR                    *p_err);
+
+
+void        NetIF_WiFi_Join       (       NET_IF_NBR                  if_nbr,
+                                          NET_IF_WIFI_NET_TYPE        net_type,
+                                          NET_IF_WIFI_DATA_RATE       data_rate,
+                                          NET_IF_WIFI_SECURITY_TYPE   security_type,
+                                          NET_IF_WIFI_PWR_LEVEL       pwr_level,
+                                          NET_IF_WIFI_SSID            ssid,
+                                          NET_IF_WIFI_PSK             psk,
+                                          NET_ERR                    *p_err);
+
+void        NetIF_WiFi_CreateAP   (       NET_IF_NBR                  if_nbr,
+                                          NET_IF_WIFI_NET_TYPE        net_type,
+                                          NET_IF_WIFI_DATA_RATE       data_rate,
+                                          NET_IF_WIFI_SECURITY_TYPE   security_type,
+                                          NET_IF_WIFI_PWR_LEVEL       pwr_level,
+                                          NET_IF_WIFI_CH              ch,
+                                          NET_IF_WIFI_SSID            ssid,
+                                          NET_IF_WIFI_PSK             psk,
+                                          NET_ERR                    *p_err);
+
+void        NetIF_WiFi_Leave      (       NET_IF_NBR                  if_nbr,
+                                          NET_ERR                    *p_err);
+
+CPU_INT16U  NetIF_WiFi_GetPeerInfo(       NET_IF_NBR                  if_nbr,
+                                          NET_IF_WIFI_PEER           *p_buf_peer,
+                                          CPU_INT16U                  buf_peer_info_len_max,
+                                          NET_ERR                    *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void       NetIF_WiFi_Init      (       NET_ERR                    *p_err);
+
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IF_CFG_WIFI_EN
+#error  "NET_IF_CFG_WIFI_EN         not #define'd in 'net_cfg.h'"
+#error  "                     [MUST be  DEF_DISABLED]           "
+#error  "                     [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_IF_CFG_WIFI_EN != DEF_DISABLED) && \
+        (NET_IF_CFG_WIFI_EN != DEF_ENABLED ))
+#error  "NET_IF_CFG_WIFI_EN   illegally #define'd in 'net_cfg.h'"
+#error  "                     [MUST be  DEF_DISABLED]           "
+#error  "                     [     ||  DEF_ENABLED ]           "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IF_WIFI_MODULE_EN        */
+#endif  /* NET_IF_WIFI_MODULE_PRESENT   */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_arp.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_arp.c
new file mode 100644
index 0000000..079d1d2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_arp.c
@@ -0,0 +1,3810 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK ARP LAYER
+*                                    (ADDRESS RESOLUTION PROTOCOL)
+*
+* Filename      : net_arp.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Address Resolution Protocol ONLY required for network interfaces that require
+*                     network-address-to-hardware-address bindings (see RFC #826 'Abstract').
+*
+*                 (2) Supports Address Resolution Protocol as described in RFC #826 with the following
+*                     restrictions/constraints :
+*
+*                     (a) ONLY supports the following hardware types :
+*                         (1) 48-bit Ethernet
+*
+*                     (b) ONLY supports the following protocol types :
+*                         (1) 32-bit IP
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    NET_ARP_MODULE
+#include  "net_arp.h"
+#include  "../../IF/net_if.h"
+#include  "../../Source/net.h"
+#include  "../../Source/net_util.h"
+#include  "../../Source/net_mgr.h"
+#include  "../../Source/net_ctr.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'net_arp.h  MODULE'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_ARP_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_ARP_HW_TYPE_NONE                         0x0000u
+#define  NET_ARP_PROTOCOL_TYPE_IP_V4                  0x0800u
+#define  NET_ARP_HW_TYPE_ETHER                        0x0001u
+
+/*
+*********************************************************************************************************
+*                                          ARP CACHE DEFINES
+*
+* Note(s) : (1) (a) RFC #1122, Section 2.3.2.2 states that "the link layer SHOULD save (rather than
+*                   discard) at least one ... packet of each set of packets destined to the same
+*                   unresolved IP address, and transmit the saved packet when the address has been
+*                   resolved."
+*
+*               (b) However, in order to avoid excessive discards, it seems reasonable that at least
+*                   two transmit packet buffers should be queued to a pending ARP cache.
+*********************************************************************************************************
+*/
+#define  NET_ARP_CACHE_TIMEOUT_MIN_SEC           ( 1  *  DEF_TIME_NBR_SEC_PER_MIN)  /* Cache timeout min  =  1 min      */
+#define  NET_ARP_CACHE_TIMEOUT_MAX_SEC           (10  *  DEF_TIME_NBR_SEC_PER_MIN)  /* Cache timeout max  = 10 min      */
+
+#define  NET_ARP_CACHE_TX_Q_TH_MIN                         0
+#define  NET_ARP_CACHE_TX_Q_TH_MAX                       NET_BUF_NBR_MAX
+
+#define  NET_ARP_RENEW_REQ_RETRY_DFLT                      15
+
+
+/*
+*********************************************************************************************************
+*                                    ARP HEADER / MESSAGE DEFINES
+*
+* Note(s) : (1) See RFC #826, Section 'Packet Format' for ARP packet header format.
+*
+*               (a) ARP header includes two pairs of hardware & protocol type addresses--one each for the
+*                   sender & the target.
+*********************************************************************************************************
+*/
+
+#define  NET_ARP_HDR_OP_REQ                           0x0001u
+#define  NET_ARP_HDR_OP_REPLY                         0x0002u
+
+
+#define  NET_ARP_MSG_LEN                                 NET_ARP_HDR_SIZE
+#define  NET_ARP_MSG_LEN_DATA                              0
+
+
+
+/*
+*********************************************************************************************************
+*                                         ARP REQUEST DEFINES
+*
+* Note(s) : (1) RFC #1122, Section 2.3.2.1 states that "a mechanism to prevent ARP flooding (repeatedly
+*               sending an ARP Request for the same IP address, at a high rate) MUST be included.  The
+*               recommended maximum rate is 1 per second per destination".
+*********************************************************************************************************
+*/
+
+#define  NET_ARP_REQ_RETRY_MIN                             0
+#define  NET_ARP_REQ_RETRY_MAX                             5
+                                                                /* ARP req retry timeouts (see Note #1).                */
+#define  NET_ARP_REQ_RETRY_TIMEOUT_MIN_SEC                 1    /* ARP req retry timeout min  =  1 sec                  */
+#define  NET_ARP_REQ_RETRY_TIMEOUT_MAX_SEC                10    /* ARP req retry timeout max  = 10 sec                  */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN     NetARP_AddrFltrEn;
+
+NET_ARP_CACHE   NetARP_CacheTbl[NET_ARP_CFG_CACHE_NBR];
+
+NET_ARP_CACHE  *NetARP_CacheListHead;                      /* Ptr to head of ARP Cache List.               */
+NET_ARP_CACHE  *NetARP_CacheListTail;                      /* Ptr to tail of ARP Cache List.               */
+
+#if 0
+CPU_INT16U      NetARP_CacheTimeout_sec;                   /* ARP cache timeout              (in secs ).   */
+NET_TMR_TICK    NetARP_CacheTimeout_tick;                  /* ARP cache timeout              (in ticks).   */
+#endif
+
+NET_BUF_QTY     NetARP_CacheTxQ_MaxTh_nbr;                 /* Max nbr tx bufs to enqueue    on ARP cache.  */
+
+
+CPU_INT08U      NetARP_ReqMaxAttemptsPend_nbr;     /* ARP req max nbr of attempts in pend  state.          */
+CPU_INT08U      NetARP_ReqTimeoutPend_sec;         /* ARP req wait-for-reply timeout (in secs ).           */
+NET_TMR_TICK    NetARP_ReqTimeoutPend_tick;        /* ARP req wait-for-reply timeout (in ticks).           */
+
+CPU_INT08U      NetARP_ReqMaxAttemptsRenew_nbr;    /* ARP req max nbr of attempts in renew state.          */
+CPU_INT08U      NetARP_ReqTimeoutRenew_sec;        /* ARP req wait-for-reply timeout (in secs ).           */
+NET_TMR_TICK    NetARP_ReqTimeoutRenew_tick;       /* ARP req wait-for-reply timeout (in ticks).           */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                            /* --------------- RX FNCTS --------------- */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void            NetARP_RxPktValidateBuf     (NET_BUF_HDR    *p_buf_hdr,
+                                                     NET_ERR        *p_err);
+#endif
+
+static  void            NetARP_RxPktValidate        (NET_BUF_HDR    *p_buf_hdr,
+                                                     NET_ARP_HDR    *p_arp_hdr,
+                                                     NET_ERR        *p_err);
+
+
+static  void            NetARP_RxPktCacheUpdate     (NET_IF_NBR      if_nbr,
+                                                     NET_ARP_HDR    *p_arp_hdr,
+                                                     NET_ERR        *p_err);
+
+
+static  void            NetARP_RxPktReply           (NET_IF_NBR      if_nbr,
+                                                     NET_ARP_HDR    *p_arp_hdr,
+                                                     NET_ERR        *p_err);
+
+
+static  void            NetARP_RxPktIsTargetThisHost(NET_IF_NBR      if_nbr,
+                                                     NET_ARP_HDR    *p_arp_hdr,
+                                                     NET_ERR        *p_err);
+
+
+static  void            NetARP_RxPktFree            (NET_BUF        *p_buf);
+
+static  void            NetARP_RxPktDiscard         (NET_BUF        *p_buf,
+                                                     NET_ERR        *p_err);
+
+
+                                                                            /* --------------- TX FNCTS --------------- */
+
+static  void            NetARP_Tx                   (NET_IF_NBR      if_nbr,
+                                                     CPU_INT08U     *p_addr_hw_sender,
+                                                     CPU_INT08U     *p_addr_hw_target,
+                                                     CPU_INT08U     *p_addr_protocol_sender,
+                                                     CPU_INT08U     *p_addr_protocol_target,
+                                                     CPU_INT16U      op_code,
+                                                     NET_ERR        *p_err);
+
+
+static  void            NetARP_TxReply              (NET_IF_NBR      if_nbr,
+                                                     NET_ARP_HDR    *p_arp_hdr);
+
+
+static  void            NetARP_TxPktPrepareHdr      (NET_BUF        *p_buf,
+                                                     CPU_INT16U      msg_ix,
+                                                     CPU_INT08U     *p_addr_hw_sender,
+                                                     CPU_INT08U     *p_addr_hw_target,
+                                                     CPU_INT08U     *p_addr_protocol_sender,
+                                                     CPU_INT08U     *p_addr_protocol_target,
+                                                     CPU_INT16U      op_code,
+                                                     NET_ERR        *p_err);
+
+static  void            NetARP_TxIxDataGet          (NET_IF_NBR      if_nbr,
+                                                     CPU_INT32U      data_len,
+                                                     CPU_INT16U     *p_ix,
+                                                     NET_ERR        *p_err);
+
+static  void            NetARP_TxPktFree            (NET_BUF        *p_buf);
+
+static  void            NetARP_TxPktDiscard         (NET_BUF        *p_buf,
+                                                     NET_ERR        *p_err);
+
+
+                                                                            /* ----------- ARP CACHE FNCTS ------------ */
+
+static  void            NetARP_CacheReqTimeout      (void           *p_cache_timeout);
+
+static  void            NetARP_CacheRenewTimeout    (void           *p_cache_timeout);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             NetARP_Init()
+*
+* Description : (1) Initialize Address Resolution Protocol Layer :
+*
+*                   (a) Initialize ARP cache pool
+*                   (b) Initialize ARP cache table
+*                   (c) Initialize ARP cache list pointers
+*
+*
+* Argument(s) : p_err    Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_ARP_ERR_NONE    ARP module successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Init().
+*
+*               This function is a network protocol suite to network interface (IF) function & SHOULD be
+*               called only by appropriate network interface initialization function(s).
+*
+* Note(s)     : (2) ARP cache pool MUST be initialized PRIOR to initializing the pool with pointers to
+*                   ARP caches.
+*********************************************************************************************************
+*/
+
+void  NetARP_Init (NET_ERR  *p_err)
+{
+    NET_ARP_CACHE      *p_cache;
+    NET_ARP_CACHE_QTY   i;
+    NET_ERR             net_err;
+
+
+                                                                /* ------------ INIT ARP CACHE POOL/STATS ------------- */
+    NetCache_AddrARP_PoolPtr = (NET_CACHE_ADDR_ARP *)0;         /* Init-clr ARP cache pool (see Note #2).               */
+
+    NetStat_PoolInit((NET_STAT_POOL   *)&NetCache_AddrARP_PoolStat,
+                     (NET_STAT_POOL_QTY) NET_ARP_CFG_CACHE_NBR,
+                     (NET_ERR         *)&net_err);
+
+
+                                                                /* ---------------- INIT ARP CACHE TBL ---------------- */
+    p_cache = &NetARP_CacheTbl[0];
+    for (i = 0u; i < NET_ARP_CFG_CACHE_NBR; i++) {
+                                                                /* Init each ARP      cache type/addr len--NEVER modify.*/
+        p_cache->Type           = NET_CACHE_TYPE_ARP;
+        p_cache->CacheAddrPtr   = &NetCache_AddrARP_Tbl[i];     /* Init each ARP addr cache ptr.                        */
+
+        p_cache->ReqAttemptsCtr = 0u;
+
+        p_cache->State          =  NET_ARP_CACHE_STATE_FREE;    /* Init each ARP      cache as free/NOT used.           */
+        p_cache->Flags          =  NET_CACHE_FLAG_NONE;
+
+        NetCache_Init((NET_CACHE_ADDR *) p_cache,               /* Init each ARP addr cache.                            */
+                      (NET_CACHE_ADDR *) p_cache->CacheAddrPtr,
+                                        &net_err);
+
+        if (net_err != NET_CACHE_ERR_NONE) {
+            *p_err = net_err;
+             return;
+        }
+
+        p_cache++;
+    }
+
+    NetARP_AddrFltrEn = DEF_ENABLED;
+    NetARP_ReqMaxAttemptsRenew_nbr = NET_ARP_RENEW_REQ_RETRY_DFLT + 1u;
+
+                                                                /* ------------- INIT ARP CACHE LIST PTRS ------------- */
+    NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_ARP] = (NET_CACHE_ADDR *)0;
+    NetCache_AddrListTail[NET_CACHE_ADDR_LIST_IX_ARP] = (NET_CACHE_ADDR *)0;
+
+   *p_err = NET_ARP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetARP_CfgAddrFilterEn()
+*
+* Description : Configure ARP address filter feature.
+*
+* Argument(s) : en  Set Filter enabled or disabled:
+*
+*                       DEF_ENABLED     Enable  filtering feature.
+*                       DEF_DISABLED    Disable filtering feature.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  NetARP_CfgAddrFilterEn (CPU_BOOLEAN  en)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    NetARP_AddrFltrEn = en;
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetARP_CfgCacheTimeout()
+*
+* Description : Configure ARP cache timeout from ARP Cache List.
+*
+* Argument(s) : timeout_sec     Desired value for ARP cache timeout (in seconds).
+*
+* Return(s)   : DEF_OK,   ARP cache timeout configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Net_InitDflt(),
+*               Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) RFC #1122, Section 2.3.2.1 states that "an implementation of the Address Resolution
+*                   Protocol (ARP) ... MUST provide a mechanism to flush out-of-date cache entries.  If
+*                   this mechanism involves a timeout, it SHOULD be possible to configure the timeout
+*                   value".
+*
+*               (2) Configured timeout does NOT reschedule any current ARP cache timeout in progress but
+*                   becomes effective the next time an ARP cache sets its timeout.
+*
+*               (3) Configured timeout converted to 'NET_TMR_TICK' ticks to avoid run-time conversion.
+*
+*               (4) 'NetARP_CacheTimeout' variables MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetARP_CfgCacheTimeout (CPU_INT16U  timeout_sec)
+{
+    NET_TMR_TICK  timeout_tick;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ARP_CACHE_TIMEOUT_MIN_SEC > DEF_INT_16U_MIN_VAL)
+    if (timeout_sec < NET_ARP_CACHE_TIMEOUT_MIN_SEC) {
+        return (DEF_FAIL);
+    }
+#endif
+#if (NET_ARP_CACHE_TIMEOUT_MAX_SEC < DEF_INT_16U_MAX_VAL)
+    if (timeout_sec > NET_ARP_CACHE_TIMEOUT_MAX_SEC) {
+        return (DEF_FAIL);
+    }
+#endif
+
+    timeout_tick             = (NET_TMR_TICK)timeout_sec * NET_TMR_TIME_TICK_PER_SEC;
+    CPU_CRITICAL_ENTER();
+    NetARP_ReqTimeoutRenew_sec  = timeout_sec;
+    NetARP_ReqTimeoutRenew_tick = timeout_tick;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetARP_CfgCacheTxQ_MaxTh()
+*
+* Description : Configure ARP cache maximum number of transmit packet buffers to enqueue.
+*
+* Argument(s) : nbr_buf_max     Desired maximum number of transmit packet buffers to enqueue onto an
+*
+* Return(s)   : DEF_OK,   ARP cache transmit packet buffer threshold configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Net_InitDflt(),
+*               Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) 'NetARP_CacheTxQ_MaxTh_nbr' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetARP_CfgCacheTxQ_MaxTh (NET_BUF_QTY  nbr_buf_max)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ARP_CACHE_TX_Q_TH_MIN > DEF_INT_16U_MIN_VAL)
+    if (nbr_buf_max < NET_ARP_CACHE_TX_Q_TH_MIN) {
+        return (DEF_FAIL);
+    }
+#endif
+#if (NET_ARP_CACHE_TX_Q_TH_MAX < DEF_INT_16U_MAX_VAL)
+    if (nbr_buf_max > NET_ARP_CACHE_TX_Q_TH_MAX) {
+        return (DEF_FAIL);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    NetARP_CacheTxQ_MaxTh_nbr = nbr_buf_max;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetARP_CfgCacheAccessedTh()
+*
+* Description : Configure ARP cache access promotion threshold.
+*
+* Argument(s) : nbr_access  Desired number of ARP cache accesses before ARP cache is promoted.
+*
+* Return(s)   : DEF_OK,   ARP cache access promotion threshold configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Net_InitDflt(),
+*               Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) 'NetARP_CacheAccessedTh_nbr' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetARP_CfgCacheAccessedTh (CPU_INT16U  nbr_access)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ARP_CACHE_ACCESSED_TH_MIN > DEF_INT_16U_MIN_VAL)
+    if (nbr_access < NET_ARP_CACHE_ACCESSED_TH_MIN) {
+        return (DEF_FAIL);
+    }
+#endif
+#if (NET_ARP_CACHE_ACCESSED_TH_MAX < DEF_INT_16U_MAX_VAL)
+    if (nbr_access > NET_ARP_CACHE_ACCESSED_TH_MAX) {
+        return (DEF_FAIL);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    NetARP_CacheAccessedTh_nbr = nbr_access;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetARP_CfgReqTimeout()
+*
+* Description : Configure timeout between ARP Request retries.
+*
+* Argument(s) : timeout_sec     Desired value for ARP Request pending ARP Reply timeout (in seconds).
+*
+* Return(s)   : DEF_OK,   ARP Request timeout configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Net_InitDflt(),
+*               Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Configured timeout does NOT reschedule any current ARP Request timeout in progress but
+*                   becomes effective the next time an ARP Request is transmitted with timeout.
+*
+*               (2) Configured timeout converted to 'NET_TMR_TICK' ticks to avoid run-time conversion.
+*
+*               (3) 'NetARP_ReqTimeout' variables MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetARP_CfgReqTimeout (CPU_INT08U  timeout_sec)
+{
+    NET_TMR_TICK  timeout_tick;
+    CPU_SR_ALLOC();
+
+
+    if (timeout_sec < NET_ARP_REQ_RETRY_TIMEOUT_MIN_SEC) {
+        return (DEF_FAIL);
+    }
+    if (timeout_sec > NET_ARP_REQ_RETRY_TIMEOUT_MAX_SEC) {
+        return (DEF_FAIL);
+    }
+
+    timeout_tick           = (NET_TMR_TICK)timeout_sec * NET_TMR_TIME_TICK_PER_SEC;
+    CPU_CRITICAL_ENTER();
+    NetARP_ReqTimeoutPend_sec  = timeout_sec;
+    NetARP_ReqTimeoutPend_tick = timeout_tick;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetARP_CfgReqMaxRetries()
+*
+* Description : Configure ARP Request maximum number of requests.
+*
+* Argument(s) : max_nbr_retries     Desired maximum number of ARP Request attempts.
+*
+* Return(s)   : DEF_OK,   ARP Request maximum number of request attempts configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Net_InitDflt(),
+*               Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) An ARP cache monitors the number of ARP Requests transmitted before receiving an ARP
+*                   Reply.  In other words, an ARP cache monitors the number of ARP Request attempts.
+*
+*                   However, the maximum number of ARP Requests that each ARP cache is allowed to transmit
+*                   is configured in terms of retries.  Thus the total number of attempts is equal to the
+*                   configured number of retries plus one (1).
+*
+*               (2) 'NetARP_ReqMaxAttemptsPend_nbr' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetARP_CfgReqMaxRetries (CPU_INT08U  max_nbr_retries)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ARP_REQ_RETRY_MIN > DEF_INT_08U_MIN_VAL)
+    if (max_nbr_retries < NET_ARP_REQ_RETRY_MIN) {
+        return (DEF_FAIL);
+    }
+#endif
+#if (NET_ARP_REQ_RETRY_MAX < DEF_INT_08U_MAX_VAL)
+    if (max_nbr_retries > NET_ARP_REQ_RETRY_MAX) {
+        return (DEF_FAIL);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    NetARP_ReqMaxAttemptsPend_nbr = max_nbr_retries + 1u;       /* Set max attempts as max retries + 1 (see Note #1).       */
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetARP_CacheProbeAddrOnNet()
+*
+* Description : (1) Transmit an ARP Request to probe the local network for a specific protocol address :
+*
+*                   (a) Acquire network lock
+*                   (b) Remove ARP cache with desired protocol address from ARP Cache List, if available
+*                   (c) Configure ARP cache :
+*                       (1) Get default-configured ARP cache
+*                       (2) ARP cache state
+*                   (d) Transmit ARP Request to probe local network for desired protocol address
+*                   (e) Release network lock
+*
+*
+*               (2) NetARP_CacheProbeAddrOnNet() SHOULD be used in conjunction with NetARP_CacheGetAddrHW()
+*                   to determine if a specific protocol address is available on the local network :
+*
+*                   (a) After successfully transmitting an ARP Request to probe the local network &  ...
+*                   (b) After some time delay(s) [on the order of ARP Request timeouts & retries];   ...
+*                   (c) Check ARP Cache for the hardware address of a host on the local network that
+*                           corresponds to the desired protocol address.
+*
+*                   See also 'NetARP_CacheGetAddrHW()   Note #1'
+*                          & 'NetARP_TxReqGratuitous()  Note #2'.
+*
+*
+* Argument(s) : protocol_type           Address protocol type.
+*
+*               p_addr_protocol_sender  Pointer to protocol address to send probe from     (see Note #5a1).
+*
+*               p_addr_protocol_target  Pointer to protocol address to probe local network (see Note #5a2).
+*
+*               addr_protocol_len       Length  of protocol address (in octets)            [see Note #5b].
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*                           pointer.
+*                               NET_ARP_ERR_NONE                    ARP Request successfully transmitted to
+*                                                                       probe local network for the desired
+*                                                                       protocol address (see Note #2).
+*                               NET_ERR_FAULT_NULL_PTR                Argument 'p_addr_protocol' passed a NULL
+*                                                                      pointer.
+*                               NET_ARP_ERR_INVALID_PROTOCOL_LEN    Invalid ARP protocol address length.*
+*                               NET_INIT_ERR_NOT_COMPLETED          Network initialization NOT complete.
+*
+*                                                                   - RETURNED BY NetMgr_GetHostAddrProtocolIF_Nbr() : -
+*                               NET_MGR_ERR_INVALID_PROTOCOL        Invalid/unsupported network protocol.
+*                               NET_MGR_ERR_INVALID_PROTOCOL_ADDR   Invalid protocol address NOT used by host.
+*                               NET_MGR_ERR_INVALID_PROTOCOL_LEN    Invalid protocol address length.
+*
+*                                                                   -------- RETURNED BY NetCache_CfgAddrs() : ---------
+*                               NET_ARP_ERR_CACHE_NONE_AVAIL        NO available ARP caches to allocate.
+*                               NET_ARP_ERR_CACHE_INVALID_TYPE      ARP cache is NOT a valid cache type.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL              NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE            Network timer is NOT a valid timer type.
+*
+*                                                                   ------ RETURNED BY Net_GlobalLockAcquire() : -------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #3].
+*
+* Note(s)     : (3) NetARP_CacheProbeAddrOnNet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (4) NetARP_CacheProbeAddrOnNet() blocked until network initialization completes.
+*
+*               (5) (a) (1) 'p_addr_protocol_sender' MUST point to a valid protocol address in network-order,
+*                            configured on a valid interface.
+*
+*                       (2) 'p_addr_protocol_target' MUST point to a valid protocol address in network-order.
+*
+*                           See also 'NetARP_CacheHandler()  Note #2e3'.
+*
+*                   (b) The length of the protocol address MUST be equal to NET_IPv4_ADDR_SIZE
+*                       & is included for correctness & completeness.
+*********************************************************************************************************
+*/
+void  NetARP_CacheProbeAddrOnNet (NET_PROTOCOL_TYPE     protocol_type,
+                                  CPU_INT08U           *p_addr_protocol_sender,
+                                  CPU_INT08U           *p_addr_protocol_target,
+                                  NET_CACHE_ADDR_LEN    addr_protocol_len,
+                                  NET_ERR              *p_err)
+{
+    NET_IF_NBR           if_nbr;
+    NET_CACHE_ADDR_ARP  *p_cache_addr_arp;
+    NET_ARP_CACHE       *p_cache_arp;
+    NET_TMR_TICK         timeout_tick;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------- VALIDATE PROTOCOL ADDRS -------------- */
+    if (p_addr_protocol_sender == (CPU_INT08U *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+    if (p_addr_protocol_target == (CPU_INT08U *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+                                                                /* Chk protocol addr len (see Note #5b).                */
+    if (addr_protocol_len != NET_IPv4_ADDR_SIZE) {
+       *p_err = NET_ARP_ERR_INVALID_PROTOCOL_LEN;
+        return;
+    }
+#endif
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #3b.                                        */
+    Net_GlobalLockAcquire((void *)&NetARP_CacheProbeAddrOnNet, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #4).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+
+                                                                /* -------------------- GET IF NBR -------------------- */
+    if_nbr = NetMgr_GetHostAddrProtocolIF_Nbr(protocol_type,
+                                              p_addr_protocol_sender,
+                                              addr_protocol_len,
+                                              p_err);
+    if (*p_err != NET_MGR_ERR_NONE) {
+         goto exit_release;
+    }
+
+
+                                                                /* --------- REMOVE PROTOCOL ADDR'S ARP CACHE --------- */
+    p_cache_addr_arp = (NET_CACHE_ADDR_ARP *)NetCache_AddrSrch(NET_CACHE_TYPE_ARP,
+                                                               if_nbr,
+                                                               p_addr_protocol_target,
+                                                               NET_IPv4_ADDR_SIZE,
+                                                               p_err);
+    if (p_cache_addr_arp != (NET_CACHE_ADDR_ARP *)0) {          /* If protocol addr's ARP cache avail, ...              */
+        NetCache_Remove((NET_CACHE_ADDR *)p_cache_addr_arp,     /* ... remove from ARP Cache List (see Note #1b).       */
+                                          DEF_YES);
+    }
+
+
+                                                                /* ------------------ CFG ARP CACHE ------------------- */
+    CPU_CRITICAL_ENTER();
+    timeout_tick = NetARP_ReqTimeoutPend_tick;
+    CPU_CRITICAL_EXIT();
+
+    p_cache_addr_arp = (NET_CACHE_ADDR_ARP *)NetCache_CfgAddrs(NET_CACHE_TYPE_ARP,
+                                                               if_nbr,
+                                                               0,
+                                                               NET_IF_HW_ADDR_LEN_MAX,
+                                                               p_addr_protocol_target,
+                                                               p_addr_protocol_sender,
+                                                               NET_IPv4_ADDR_SIZE,
+                                                               DEF_YES,
+                                                               NetARP_CacheReqTimeout,
+                                                               timeout_tick,
+                                                               p_err);
+    if (*p_err != NET_CACHE_ERR_NONE) {
+         goto exit_release;
+    }
+
+    p_cache_arp = (NET_ARP_CACHE *)NetCache_GetParent((NET_CACHE_ADDR *)p_cache_addr_arp);
+    if (p_cache_arp == ((NET_ARP_CACHE *)0)) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit_release;
+    }
+
+    p_cache_arp->State = NET_ARP_CACHE_STATE_PEND;
+
+                                                                /* ------- INSERT ARP CACHE INTO ARP CACHE LIST ------- */
+    NetCache_Insert((NET_CACHE_ADDR *)p_cache_addr_arp);
+
+                                                                /* -------------------- TX ARP REQ -------------------- */
+
+    NetARP_TxReq(p_cache_addr_arp);                             /* Tx ARP req to resolve ARP cache.                     */
+
+   *p_err = NET_ARP_ERR_NONE;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetARP_IsAddrProtocolConflict()
+*
+* Description : Get interface's protocol address conflict status between this interface's ARP host
+*                   protocol address(s) & other host(s) on the local network.
+*
+* Argument(s) : if_nbr      Interface number to get protocol address conflict status.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*                               NET_ARP_ERR_NONE                Protocol address conflict status
+*                                                                   successfully returned.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization NOT complete.
+*
+*                                                               - RETURNED BY NetIF_IsValidHandler() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               - RETURNED BY Net_GlobalLockAcquire() : -
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_YES, if address conflict detected.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetARP_IsAddrProtocolConflict().
+*
+*               This function is an application interface (API) function & MAY be called by application
+*               function(s).
+*
+* Note(s)     : (1) NetARP_IsAddrProtocolConflict() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetARP_IsAddrProtocolConflict() blocked until network initialization completes.
+*
+*               (3) RFC #3927, Section 2.5 states that :
+*
+*                   (a) "If a host receives an ARP packet (request *or* reply) on an interface where" ...
+*                       (1) "the 'sender hardware address' does not match the hardware address of
+*                                 that interface, but"                                                ...
+*                       (2) "the 'sender IP       address' is a IP address the host has configured for
+*                                 that interface,"                                                    ...
+*                   (b) "then this is a conflicting ARP packet, indicating an address conflict."
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetARP_IsAddrProtocolConflict (NET_IF_NBR   if_nbr,
+                                            NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  addr_conflict;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetARP_IsAddrProtocolConflict, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return (DEF_NO);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        addr_conflict = DEF_NO;
+        goto exit;
+    }
+#endif
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+   (void)NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         addr_conflict = DEF_NO;
+         goto exit;
+    }
+
+                                                                /* ------------ CHK PROTOCOL ADDR CONFLICT ------------ */
+    addr_conflict = NetMgr_IsAddrProtocolConflict(if_nbr);
+
+   *p_err =  NET_ARP_ERR_NONE;
+
+
+exit:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (addr_conflict);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetARP_CacheHandler()
+*
+* Description : (1) Resolve destination hardware address using ARP for transmit data packet :
+*
+*                   (a) Search ARP Cache List for ARP cache with corresponding protocol address
+*                   (b) If ARP cache     found, handle packet based on ARP cache state :
+*
+*                       (1) PENDING  -> Enqueue transmit packet buffer to ARP cache
+*                       (2) RESOLVED -> Copy ARP cache's hardware address to data packet;
+*                                       Return to Network Interface to transmit data packet
+*
+*                   (c) If ARP cache NOT found, allocate new ARP cache in 'PENDING' state (see Note #1b1)
+*
+*                   See 'net_cache.h  CACHE STATES' for cache state diagram.
+*
+*               (2) This ARP cache handler function assumes the following :
+*
+*                   (a) ALL ARP caches in the ARP Cache List are valid [validated by NetCache_AddrGet()]
+*                   (b) ANY ARP cache in the 'PENDING' state MAY have already enqueued at LEAST one
+*                           transmit packet buffer when ARP cache allocated [see NetCache_AddrGet()]
+*                   (c) ALL ARP caches in the 'RESOLVED' state have valid hardware addresses
+*                   (d) ALL transmit buffers enqueued on any ARP cache are valid
+*                   (e) Buffer's ARP address pointers pre-configured by Network Interface to point to :
+*
+*                       (1) 'ARP_AddrProtocolPtr'               Pointer to the protocol address used to
+*                                                                   resolve the hardware address
+*                       (2) 'ARP_AddrHW_Ptr'                    Pointer to memory buffer to return the
+*                                                                   resolved hardware address
+*                       (3) ARP addresses                       Which MUST be in network-order
+*
+*
+* Argument(s) : p_buf   Pointer to network buffer to transmit.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*                           NET_ARP_ERR_CACHE_RESOLVED          ARP cache resolved & hardware address
+*                                                                   successfully copied.
+*                           NET_ARP_ERR_CACHE_PEND              ARP cache in 'PENDING' state; transmit
+*                                                                   buffer enqueued to ARP cache.
+*                           NET_ERR_FAULT_NULL_PTR                Argument 'p_buf' passed a NULL pointer;
+*                                                                   OR
+*                                                               'p_buf's 'ARP_AddrProtocolPtr'/'ARP_AddrHWPtr'
+*                                                                   are set as NULL pointers.
+*
+*                           ------------ RETURNED BY NetIF_AddrMulticastProtocolToHW() ------------
+*                           See NetIF_AddrMulticastProtocolToHW() for additional return error codes.
+*
+*                           ------------------ RETURNED BY NetARP_CacheAddPend() ------------------
+*                           See NetARP_CacheAddPend() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_Tx().
+*
+*               This function is a board-support package function & SHOULD be called only by
+*               appropriate product function(s).
+*
+* Note(s)     : (3) (a) ARP Cache List is accessed by
+*
+*                       (1) NetCache_AddResolved()                  via NetCache_Insert()
+*                       (2) NetCache_Remove()                       via NetCache_Unlink()
+*                       (3) NetARP_CacheHandler()
+*                       (4) NetARP_CacheAddPend()                   via NetCache_Insert()
+*                       (5) NetARP_RxPktCacheUpdate()
+*                       (6) ARP cache's 'TMR->Obj' pointer          via NetARP_CacheReqTimeout() &
+*                                                                       NetARP_CacheTimeout()
+*
+*                   (b) Since the primary tasks of the network protocol suite are prevented from running
+*                       concurrently (see 'net.h  Note #3'), it is NOT necessary to protect the shared
+*                       resources of the ARP Cache List since no asynchronous access from other network
+*                       tasks is possible.
+*
+*               (4) (a) RFC #1122, Section 2.3.2.2 states that "the link layer SHOULD" :
+*
+*                       (1) "Save (rather than discard) ... packets destined to the same unresolved
+*                            IP address and" ...
+*                       (2) "Transmit the saved packet[s] when the address has been resolved."
+*
+*                   (b) Since ARP Layer is the last layer to handle & queue the transmit network
+*                       buffer, it is NOT necessary to increment the network buffer's reference
+*                       counter to include the pending ARP cache buffer queue as a new reference
+*                       to the network buffer.
+*
+*               (5) Some buffer controls were previously initialized in NetBuf_Get() when the packet
+*                   was received at the network interface layer.  These buffer controls do NOT need
+*                   to be re-initialized but are shown for completeness.
+*
+*               (6) A resolved multicast address still remains resolved even if any error(s) occur
+*                   while adding it to the ARP cache.
+*********************************************************************************************************
+*/
+
+void  NetARP_CacheHandler (NET_BUF  *p_buf,
+                           NET_ERR  *p_err)
+{
+#ifdef  NET_MCAST_MODULE_EN
+    NET_PROTOCOL_TYPE    protocol_type_net;
+    CPU_BOOLEAN          addr_protocol_multicast;
+    CPU_INT08U           addr_hw_len;
+    NET_ERR              err;
+#endif
+    NET_IF_NBR           if_nbr;
+    CPU_INT08U          *p_addr_hw;
+    CPU_INT08U          *p_addr_protocol;
+    NET_BUF_HDR         *p_buf_hdr;
+    NET_BUF_HDR         *ptail_buf_hdr;
+    NET_BUF             *ptail_buf;
+    NET_ARP_CACHE       *p_cache;
+    NET_CACHE_ADDR_ARP  *p_cache_addr_arp;
+    NET_BUF_QTY          buf_max_th;
+    CPU_SR_ALLOC();
+
+
+                                                                /* ------------------ VALIDATE PTRS ------------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_buf == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+    p_buf_hdr       = &p_buf->Hdr;
+    p_addr_hw       =  p_buf_hdr->ARP_AddrHW_Ptr;
+    p_addr_protocol =  p_buf_hdr->ARP_AddrProtocolPtr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_hw == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+    if_nbr = p_buf_hdr->IF_Nbr;
+                                                                /* ------------------ SRCH ARP CACHE ------------------ */
+    p_cache_addr_arp = (NET_CACHE_ADDR_ARP *)NetCache_AddrSrch(NET_CACHE_TYPE_ARP,
+                                                              if_nbr,
+                                                              p_addr_protocol,
+                                                              NET_IPv4_ADDR_SIZE,
+                                                              p_err);
+
+
+    if (p_cache_addr_arp != DEF_NULL) {                         /* If ARP cache found, chk state.                       */
+        p_cache = (NET_ARP_CACHE *)NetCache_GetParent((NET_CACHE_ADDR *)p_cache_addr_arp);
+        if (p_cache == DEF_NULL) {
+            return;
+        }
+
+        switch (p_cache->State) {
+            case NET_ARP_CACHE_STATE_PEND:                      /* If ARP cache pend, append buf into Q (see Note #4a1).*/
+                 CPU_CRITICAL_ENTER();
+                 buf_max_th = NetARP_CacheTxQ_MaxTh_nbr;
+                 CPU_CRITICAL_EXIT();
+
+                 if (p_cache_addr_arp->TxQ_Nbr >= buf_max_th) {
+                    *p_err = NET_CACHE_ERR_UNRESOLVED;
+                     return;
+                 }
+
+                 ptail_buf = p_cache_addr_arp->TxQ_Tail;
+                 if (ptail_buf != (NET_BUF *)0) {               /* If Q NOT empty,    append buf @ Q tail.              */
+                     ptail_buf_hdr                 = &ptail_buf->Hdr;
+                     ptail_buf_hdr->NextSecListPtr = (NET_BUF *)p_buf;
+                     p_buf_hdr->PrevSecListPtr      = (NET_BUF *)ptail_buf;
+                     p_cache_addr_arp->TxQ_Tail     = (NET_BUF *)p_buf;
+
+                 } else {                                       /* Else add buf as first q'd buf.                       */
+                     p_cache_addr_arp->TxQ_Head     = (NET_BUF *)p_buf;
+                     p_cache_addr_arp->TxQ_Tail     = (NET_BUF *)p_buf;
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #5].                */
+                     p_buf_hdr->PrevSecListPtr      = (NET_BUF *)0;
+                     p_buf_hdr->NextSecListPtr      = (NET_BUF *)0;
+#endif
+                 }
+
+                 p_cache_addr_arp->TxQ_Nbr++;
+                                                                /* Cfg buf's unlink fnct/obj to ARP cache.              */
+                 p_buf_hdr->UnlinkFnctPtr = (NET_BUF_FNCT)&NetCache_UnlinkBuf;
+                 p_buf_hdr->UnlinkObjPtr  = (void       *) p_cache_addr_arp;
+
+                *p_err                    =  NET_ARP_ERR_CACHE_PEND;
+                 break;
+
+
+            case NET_ARP_CACHE_STATE_RENEW:
+            case NET_ARP_CACHE_STATE_RESOLVED:                  /* If ARP cache resolved, copy hw addr.                 */
+                 Mem_Copy(p_addr_hw,
+                          p_cache_addr_arp->AddrHW,
+                          NET_IF_HW_ADDR_LEN_MAX);
+                 *p_err = NET_ARP_ERR_CACHE_RESOLVED;
+                 break;
+
+
+            case NET_ARP_CACHE_STATE_NONE:
+            case NET_ARP_CACHE_STATE_FREE:
+            default:
+                 NetCache_Remove((NET_CACHE_ADDR *)p_cache_addr_arp, DEF_YES);
+                 NetARP_CacheAddPend(p_buf, p_buf_hdr, p_addr_protocol, p_err);
+                 break;
+        }
+
+    } else {
+#ifdef  NET_MCAST_MODULE_EN
+        protocol_type_net       = p_buf_hdr->ProtocolHdrTypeNet;
+        addr_protocol_multicast = NetMgr_IsAddrProtocolMulticast((NET_PROTOCOL_TYPE)protocol_type_net,
+                                                                 (CPU_INT08U      *)p_addr_protocol,
+                                                                 (CPU_INT08U       )NET_IPv4_ADDR_SIZE);
+
+        if (addr_protocol_multicast == DEF_YES) {               /* If multicast protocol addr,      ...                 */
+            if_nbr      = p_buf_hdr->IF_Nbr;
+            addr_hw_len = NET_IF_HW_ADDR_LEN_MAX;
+                                                                /* ... convert to multicast hw addr ...                 */
+            NetIF_AddrMulticastProtocolToHW(if_nbr,
+                                            p_addr_protocol,
+                                            NET_IPv4_ADDR_SIZE,
+                                            protocol_type_net,
+                                            p_addr_hw,
+                                           &addr_hw_len,
+                                            p_err);
+            if (*p_err != NET_IF_ERR_NONE) {
+                 return;
+            }
+                                                                /* ... & add as resolved ARP cache.                     */
+            NetCache_AddResolved(if_nbr,
+                                 p_addr_hw,
+                                 p_addr_protocol,
+                                 NET_CACHE_TYPE_ARP,
+                                 NetARP_CacheRenewTimeout,
+                                 NetARP_ReqTimeoutRenew_tick,
+                                &err);
+
+           *p_err = NET_ARP_ERR_CACHE_RESOLVED;                 /* Rtn resolved multicast hw addr (see Note #6).        */
+            return;
+        }
+#endif
+        NetARP_CacheAddPend(p_buf, p_buf_hdr, p_addr_protocol, p_err);
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                        NetARP_CacheGetAddrHW()
+*
+* Description : (1) Get hardware address that corresponds to a specific ARP cache's protocol address :
+*
+*                   (a) Acquire network lock
+*                   (b) Search ARP Cache List for ARP cache with desired protocol address
+*                   (c) If corresponding ARP cache found, get/return     hardware address
+*                   (d) Release network lock
+*
+*
+* Argument(s) : if_nbr              Network interface number.
+*
+*               p_addr_hw           Pointer to a memory buffer that will receive the hardware address :
+*
+*               addr_hw_len_buf     Length of hardware address memory buffer (in octets) [see Note #4a1].
+*
+*               p_addr_protocol     Pointer to the specific protocol address to search for corresponding
+*
+*               addr_protocol_len   Length of protocol address (in octets) [see Note #4b].
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_NONE                    Hardware address successfully returned.
+*                               NET_ARP_ERR_CACHE_NOT_FOUND         ARP cache with corresponding  hardware/
+*                                                                       protocol address NOT found.
+*                               NET_ARP_ERR_CACHE_PEND              ARP cache in 'PENDING' state; hardware
+*                                                                       address NOT yet resolved (see Note #6).
+*
+*                               NET_ERR_FAULT_NULL_PTR                Argument 'p_addr_hw'/'p_addr_protocol' passed
+*                                                                       a NULL pointer.
+*                               NET_ARP_ERR_INVALID_HW_ADDR_LEN     Invalid ARP hardware address length.
+*                               NET_ARP_ERR_INVALID_PROTOCOL_LEN    Invalid ARP protocol address length.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   ------ RETURNED BY Net_GlobalLockAcquire() : -------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Length of returned hardware address (see Note #4a2), if available.
+*
+*               0,                                                   otherwise.
+*
+* Caller(s)   : NetARP_CacheGetAddrHW().
+*
+*               This function is an application interface (API) function & MAY be called by application
+*               function(s).
+*
+* Note(s)     : (2) NetARP_CacheGetAddrHW() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) NetARP_CacheGetAddrHW() blocked until network initialization completes.
+*
+*               (4) (a) (1) The size of the memory buffer that will receive the returned hardware address
+*                           MUST be greater than or equal to NET_IF_HW_ADDR_LEN_MAX.
+*
+*                       (2) The length of any returned hardware address is equal to NET_IF_HW_ADDR_LEN_MAX.
+*
+*                       (3) Address memory buffer array cleared in case of any error(s).
+*
+*                           (A) Address memory buffer array SHOULD be initialized to return a NULL address
+*                               PRIOR to all validation or function handling in case of any error(s).
+*
+*                   (b) The length of the protocol address MUST be equal to NET_IPv4_ADDR_SIZE
+*                       & is included for correctness & completeness.
+*
+*               (5) ARP addresses handled in network-order :
+*
+*                   (a) 'p_addr_hw'            returns  a hardware address in network-order.
+*                   (b) 'p_addr_protocol' MUST point to a protocol address in network-order.
+*
+*                   See also 'NetARP_CacheHandler()  Note #2e3'.
+*
+*               (6) While an ARP cache is in 'PENDING' state the hardware address is NOT yet resolved,
+*                   but MAY be resolved in the near future by an awaited ARP Reply.
+*********************************************************************************************************
+*/
+NET_CACHE_ADDR_LEN  NetARP_CacheGetAddrHW (NET_IF_NBR           if_nbr,
+                                           CPU_INT08U          *p_addr_hw,
+                                           NET_CACHE_ADDR_LEN   addr_hw_len_buf,
+                                           CPU_INT08U          *p_addr_protocol,
+                                           NET_CACHE_ADDR_LEN   addr_protocol_len,
+                                           NET_ERR             *p_err)
+{
+    NET_CACHE_ADDR_LEN   addr_hw_len;
+    NET_CACHE_ADDR_ARP  *p_cache_addr_arp;
+
+
+                                                                /* --------------- VALIDATE HW ADDR BUF --------------- */
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_addr_hw == (CPU_INT08U *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+#endif
+                                                                /* Clr hw addr         (see Note #4a3).                 */
+    Mem_Clr((void     *)p_addr_hw,
+            (CPU_SIZE_T) addr_hw_len_buf);
+
+    addr_hw_len = NET_IF_HW_ADDR_LEN_MAX;                       /* Cfg hw addr     len (see Note #4a2).                 */
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (addr_hw_len_buf < addr_hw_len) {                        /* Chk hw addr buf len (see Note #4a1).                 */
+       *p_err =  NET_ARP_ERR_INVALID_HW_ADDR_LEN;
+        return (0u);
+    }
+#endif
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------ VALIDATE PROTOCOL ADDR BUF ------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+                                                                /* Chk protocol addr len (see Note #4b).                */
+    if (addr_protocol_len != NET_IPv4_ADDR_SIZE) {
+       *p_err =  NET_ARP_ERR_INVALID_PROTOCOL_LEN;
+        return (0u);
+    }
+#else
+   (void)&addr_protocol_len;                                    /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetARP_CacheGetAddrHW, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return (0u);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+
+                                                                /* -------------------- SRCH CACHE -------------------- */
+    p_cache_addr_arp = (NET_CACHE_ADDR_ARP *)NetCache_AddrSrch(NET_CACHE_TYPE_ARP,
+                                                              if_nbr,
+                                                              p_addr_protocol,
+                                                              NET_IPv4_ADDR_SIZE,
+                                                              p_err);
+    if (p_cache_addr_arp == (NET_CACHE_ADDR_ARP *)0) {
+       *p_err = NET_ARP_ERR_CACHE_NOT_FOUND;
+        goto exit_fail;
+    }
+
+    switch (*p_err) {
+        case NET_CACHE_ERR_PEND:
+            *p_err =  NET_ARP_ERR_CACHE_PEND;                       /* ... (see Note #6).                                   */
+             goto exit_fail;
+
+
+        case NET_CACHE_ERR_RESOLVED:
+             Mem_Copy(p_addr_hw,
+                      p_cache_addr_arp->AddrHW,
+                      NET_IF_HW_ADDR_LEN_MAX);
+             break;
+
+
+        default:
+             NetCache_Remove((NET_CACHE_ADDR *)p_cache_addr_arp, DEF_YES);
+            *p_err = NET_ARP_ERR_CACHE_NOT_FOUND;
+             goto exit_fail;
+    }
+
+
+   *p_err = NET_ARP_ERR_NONE;
+    goto exit_release;
+
+exit_fail:
+    addr_hw_len = 0;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (addr_hw_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetARP_CachePoolStatGet()
+*
+* Description : Get ARP statistics pool.
+*
+* Argument(s) : none.
+*
+* Return(s)   : ARP  statistics pool, if NO error(s).
+*
+*               NULL statistics pool, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) NetARP_CachePoolStatGet() blocked until network initialization completes; return NULL
+*                   statistics pool.
+*
+*               (2) 'NetARP_CachePoolStat' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+NET_STAT_POOL  NetARP_CachePoolStatGet (void)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    NET_ERR        err;
+#endif
+    NET_STAT_POOL  stat_pool;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        NetStat_PoolClr(&stat_pool, &err);
+        return (stat_pool);                                     /* ... rtn NULL stat pool (see Note #1).                */
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    stat_pool = NetCache_AddrARP_PoolStat;
+    CPU_CRITICAL_EXIT();
+
+    return (stat_pool);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetARP_CachePoolStatResetMaxUsed()
+*
+* Description : Reset ARP statistics pool's maximum number of entries used.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_CachePoolStatGet(),
+*               NetARP_CachePoolStatResetMaxUsed().
+*
+*               This function is an application interface (API) function & MAY be called by application
+*               function(s).
+*
+* Note(s)     : (1) NetARP_CachePoolStatResetMaxUsed() blocked until network initialization completes.
+*
+*                   (a) However, since 'NetARP_CachePoolStat' is reset when network initialization
+*                       completes; NO error is returned.
+*********************************************************************************************************
+*/
+
+void  NetARP_CachePoolStatResetMaxUsed (void)
+{
+    NET_ERR  err;
+
+
+                                                                /* Acquire net lock.                                    */
+    Net_GlobalLockAcquire((void *)&NetARP_CachePoolStatResetMaxUsed, &err);
+    if (err != NET_ERR_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        goto exit_release;                                      /* ... rtn w/o err (see Note #1a).                      */
+    }
+#endif
+
+
+    NetStat_PoolResetUsedMax(&NetCache_AddrARP_PoolStat, &err); /* Reset ARP cache stat pool.                           */
+    goto exit_release;
+
+exit_release:
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+}
+
+
+/*
+*********************************************************************************************************
+*                                              NetARP_Rx()
+*
+* Description : (1) Process received ARP packets & update ARP Cache List :
+*
+*                   (a) Validate ARP packet
+*                   (b) Update   ARP cache
+*                   (c) Prepare & transmit an ARP Reply for a received ARP Request
+*                   (d) Free ARP packet
+*                   (e) Update receive statistics
+*
+*
+* Argument(s) : p_buf   Pointer to network buffer that received ARP packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_NONE                ARP packet successfully received & processed.
+*
+*                                                               ---- RETURNED BY NetARP_RxPktDiscard() : ----
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_RxPktFrameDemux().
+*
+*               This function is a board-support package function & SHOULD be called only by
+*               appropriate product function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetARP_Rx (NET_BUF  *p_buf,
+                 NET_ERR  *p_err)
+{
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    NET_CTR      *p_ctr;
+#endif
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_ARP_HDR  *p_arp_hdr;
+    NET_IF_NBR    if_nbr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetARP_RxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.ARP.RxPktCtr);
+
+
+                                                                /* -------------- VALIDATE RX'D ARP PKT --------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetARP_RxPktValidateBuf(p_buf_hdr, p_err);                  /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_ARP_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetARP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+#endif
+    p_arp_hdr = (NET_ARP_HDR *)&p_buf->DataPtr[p_buf_hdr->ARP_MsgIx];
+    NetARP_RxPktValidate(p_buf_hdr, p_arp_hdr, p_err);          /* Validate rx'd pkt.                                   */
+
+
+                                                                /* ----------------- UPDATE ARP CACHE ----------------- */
+    switch (*p_err) {                                           /* Chk err from NetARP_RxPktValidate().                 */
+        case NET_ARP_ERR_NONE:
+             if_nbr = p_buf_hdr->IF_Nbr;
+             NetARP_RxPktCacheUpdate(if_nbr, p_arp_hdr, p_err);
+             break;
+
+
+        case NET_ARP_ERR_INVALID_HW_TYPE:
+        case NET_ARP_ERR_INVALID_HW_ADDR:
+        case NET_ARP_ERR_INVALID_HW_ADDR_LEN:
+        case NET_ARP_ERR_INVALID_PROTOCOL_TYPE:
+        case NET_ARP_ERR_INVALID_PROTOCOL_ADDR:
+        case NET_ARP_ERR_INVALID_PROTOCOL_LEN:
+        case NET_ARP_ERR_INVALID_OP_CODE:
+        case NET_ARP_ERR_INVALID_OP_ADDR:
+        case NET_ARP_ERR_INVALID_LEN_MSG:
+        default:
+             NetARP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                /* ------------------- TX ARP REPLY ------------------- */
+    switch (*p_err) {                                           /* Chk err from NetARP_RxPktCacheUpdate().              */
+        case NET_CACHE_ERR_RESOLVED:
+        case NET_ARP_ERR_CACHE_RESOLVED:
+             NetARP_RxPktReply(if_nbr, p_arp_hdr, p_err);
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+        case NET_CACHE_ERR_NONE_AVAIL:
+        case NET_CACHE_ERR_INVALID_TYPE:
+        case NET_ARP_ERR_INVALID_OP_CODE:
+        case NET_ARP_ERR_INVALID_PROTOCOL_LEN:
+        case NET_ARP_ERR_RX_TARGET_REPLY:
+        case NET_ARP_ERR_RX_TARGET_NOT_THIS_HOST:
+        case NET_ERR_FAULT_UNKNOWN_ERR:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_MGR_ERR_ADDR_TBL_SIZE:
+        case NET_MGR_ERR_INVALID_PROTOCOL:
+        case NET_MGR_ERR_INVALID_PROTOCOL_LEN:
+        case NET_ERR_FAULT_NULL_FNCT:
+        case NET_TMR_ERR_NONE_AVAIL:
+        case NET_TMR_ERR_INVALID_TYPE:
+        default:
+             NetARP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                /* ---------- FREE ARP PKT / UPDATE RX STATS ---------- */
+    switch (*p_err) {                                           /* Chk err from NetARP_RxPktReply().                    */
+        case NET_ARP_ERR_RX_REQ_TX_REPLY:
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+             p_ctr = (NET_CTR *)&Net_StatCtrs.ARP.RxMsgReqCompCtr;
+#endif
+             break;
+
+
+        case NET_ARP_ERR_RX_REPLY_TX_PKTS:
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+             p_ctr = (NET_CTR *)&Net_StatCtrs.ARP.RxMsgReplyCompCtr;
+#endif
+             break;
+
+
+        case NET_ARP_ERR_INVALID_OP_CODE:
+        case NET_ARP_ERR_RX_TARGET_NOT_THIS_HOST:
+        default:
+             NetARP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+    NetARP_RxPktFree(p_buf);
+
+    NET_CTR_STAT_INC(Net_StatCtrs.ARP.RxMsgCompCtr);
+    NET_CTR_STAT_INC(*p_ctr);
+
+
+   *p_err = NET_ARP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetARP_TxReqGratuitous()
+*
+* Description : (1) Prepare & transmit a gratuitous ARP Request onto the local network :
+*
+*                   (a) Acquire  network lock
+*                   (b) Get      network interface's hardware address
+*                   (c) Prepare  ARP Request packet :
+*                       (1) Configure sender's hardware address as this interface's hardware address
+*                       (2) Configure target's hardware address as NULL
+*                       (3) Configure sender's protocol address as this interface's protocol address
+*                       (4) Configure target's protocol address as this interface's protocol address    See Note #6a
+*                       (5) Configure ARP operation as ARP Request
+*                   (d) Transmit ARP Request
+*                   (e) Release  network lock
+*
+*
+*               (2) NetARP_TxReqGratuitous() COULD be used in conjunction with NetARP_IsAddrProtocolConflict()
+*                   to determine if the host's protocol address is already present on the local network :
+*
+*                   (a) After successfully transmitting a gratuitous ARP Request onto the local network & ...
+*                   (b) After some time delay(s) [on the order of ARP Request timeouts & retries];        ...
+*                   (c) Check this host's ARP protocol address conflict flag to see if any other host(s)
+*                           are configured with this host's ARP protocol address.
+*
+*                   See also 'NetARP_IsAddrProtocolConflict()  Note #3'
+*                          & 'NetARP_ProbeAddrOnNet()          Note #2'.
+*
+*
+* Argument(s) : protocol_type       Address protocol type.
+*
+*               p_addr_protocol     Pointer to protocol address used to transmit gratuitous request (see Note #5).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_ERR_FAULT_NULL_PTR                Argument(s) passed a NULL pointer.
+*
+*                                                                   ------------ RETURNED BY NetARP_Tx() : -------------
+*                               NET_ARP_ERR_NONE                    Gratuitous ARP request packet successfully
+*                                                                       transmitted.
+*                               NET_ARP_ERR_INVALID_OP_CODE         Invalid ARP operation code.
+*                               NET_BUF_ERR_NONE_AVAIL              NO available buffers to allocate.
+*                               NET_BUF_ERR_INVALID_SIZE            Requested size is greater then the maximum
+*                                                                       buffer size available.
+*                               NET_BUF_ERR_INVALID_IX              Invalid buffer index.
+*                               NET_BUF_ERR_INVALID_LEN             Invalid buffer length.
+*                               NET_ERR_INVALID_TRANSACTION         Invalid transaction type.
+*                               NET_ERR_TX                          Transmit error; packet discarded.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*
+*                                                                   - RETURNED BY NetMgr_GetHostAddrProtocolIF_Nbr() : -
+*                               NET_MGR_ERR_INVALID_PROTOCOL        Invalid/unsupported network protocol.
+*                               NET_MGR_ERR_INVALID_PROTOCOL_ADDR   Invalid protocol address NOT used by host.
+*                               NET_MGR_ERR_INVALID_PROTOCOL_LEN    Invalid protocol address length.
+*
+*                                                                   ----- RETURNED BY NetIF_AddrHW_GetHandler() : ------
+*                               NET_ERR_FAULT_NULL_PTR                 Argument(s) passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT                Invalid NULL function pointer.
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IF_ERR_INVALID_ADDR_LEN         Invalid hardware address length.
+*
+*                                                                   ------ RETURNED BY Net_GlobalLockAcquire() : -------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Network Application.
+*
+*               This function is a network protocol suite function that SHOULD be called only by appropriate
+*               network application function(s) [see also Note #3].
+*
+* Note(s)     : (3) NetARP_TxReqGratuitous() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (4) NetARP_TxReqGratuitous() blocked until network initialization completes.
+*
+*               (5) 'p_addr_protocol' MUST point to a valid protocol address in network-order.
+*
+*               (6) RFC #3927, Section 2.4 states that one purpose for transmitting a gratuitous ARP Request
+*                   is for a host to "announce its [claim] ... [on] a unique address ... by broadcasting ...
+*                   an ARP Request ... to make sure that other hosts on the link do not have stale ARP cache
+*                   entries left over from some other host that may previously have been using the same
+*                   address".
+*
+*                   (a) "The ... ARP Request ... announcement ... sender and target IP addresses are both
+*                        set to the host's newly selected ... address."
+*********************************************************************************************************
+*/
+void  NetARP_TxReqGratuitous (NET_PROTOCOL_TYPE    protocol_type,
+                              CPU_INT08U          *p_addr_protocol,
+                              NET_CACHE_ADDR_LEN   addr_protocol_len,
+                              NET_ERR             *p_err)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_INT08U   addr_hw_len;
+    CPU_INT08U   addr_hw_sender[NET_IF_HW_ADDR_LEN_MAX];
+    CPU_INT08U  *p_addr_hw_sender;
+    CPU_INT08U  *p_addr_hw_target;
+    CPU_INT08U  *p_addr_protocol_sender;
+    CPU_INT08U  *p_addr_protocol_target;
+    CPU_INT16U   op_code;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE PROTOCOL ADDR -------------- */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #3b.                                        */
+    Net_GlobalLockAcquire((void *)&NetARP_TxReqGratuitous, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit tx (see Note #4).         */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+
+                                                                /* ------------- GET PROTOCOL & HW ADDRS -------------- */
+    if_nbr = NetMgr_GetHostAddrProtocolIF_Nbr(protocol_type,
+                                              p_addr_protocol,
+                                              addr_protocol_len,
+                                              p_err);
+    if (*p_err != NET_MGR_ERR_NONE) {
+         goto exit_release;
+    }
+
+    addr_hw_len = NET_IF_HW_ADDR_LEN_MAX;
+    NetIF_AddrHW_GetHandler((NET_IF_NBR  ) if_nbr,
+                            (CPU_INT08U *)&addr_hw_sender[0],
+                            (CPU_INT08U *)&addr_hw_len,
+                            (NET_ERR    *) p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_release;
+    }
+
+                                                                /* --------------- PREPARE ARP REQ PKT ---------------- */
+                                                                /* See Note #1c.                                        */
+    p_addr_hw_sender       = (CPU_INT08U *)&addr_hw_sender[0];
+    p_addr_hw_target       = (CPU_INT08U *) 0;
+    p_addr_protocol_sender = (CPU_INT08U *) p_addr_protocol;
+    p_addr_protocol_target = (CPU_INT08U *) p_addr_protocol;
+
+    op_code               =  NET_ARP_HDR_OP_REQ;
+
+                                                                /* -------------------- TX ARP REQ -------------------- */
+    NetARP_Tx(if_nbr,
+              p_addr_hw_sender,
+              p_addr_hw_target,
+              p_addr_protocol_sender,
+              p_addr_protocol_target,
+              op_code,
+              p_err);
+
+    if (*p_err == NET_ARP_ERR_NONE) {
+         NET_CTR_STAT_INC(Net_StatCtrs.ARP.TxMsgReqCtr);
+    }
+
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetARP_TxReq()
+*
+* Description : (1) Prepare & transmit an ARP Request to resolve a pending ARP cache :
+*
+*                   (a) Get network interface's hardware & protocol addresses
+*                   (b) Prepare  ARP Request packet :
+*                       (1) Configure sender's hardware address as this interface's hardware address
+*                       (2) Configure target's hardware address as NULL since unknown
+*                       (3) Configure sender's protocol address as this interface's protocol address
+*                       (4) Configure target's protocol address as the protocol address listed in the ARP cache
+*                       (5) Configure ARP operation as ARP Request
+*
+*
+* Argument(s) : p_cache     Pointer to an ARP cache.
+*               ------      Argument checked in NetARP_CacheAddPend(),
+*                                               NetARP_CacheReqTimeout(),
+*                                               NetARP_ProbeAddrOnNet().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_CacheAddPend(),
+*               NetARP_CacheReqTimeout(),
+*               NetARP_ProbeAddrOnNet().
+*
+* Note(s)     : (2) Do NOT need to verify success of ARP Request since failure will cause timeouts & retries.
+*********************************************************************************************************
+*/
+
+void  NetARP_TxReq (NET_CACHE_ADDR_ARP  *p_cache_addr_arp)
+{
+    NET_ARP_CACHE  *p_cache_arp;
+    CPU_INT08U      addr_hw_len;
+    CPU_INT08U      addr_hw_sender[NET_IF_HW_ADDR_LEN_MAX];
+    CPU_INT08U     *p_addr_hw_target;
+    CPU_INT08U     *p_addr_protocol_target;
+    CPU_INT08U     *p_addr_protocol_sender;
+    NET_IF_NBR      if_nbr;
+    CPU_INT16U      op_code;
+    NET_ERR         err;
+
+
+                                                                /* ------------ GET HW & PROTOCOL IF ADDRS ------------ */
+    addr_hw_len = NET_IF_HW_ADDR_LEN_MAX;
+    NetIF_AddrHW_GetHandler((NET_IF_NBR  ) p_cache_addr_arp->IF_Nbr,
+                            (CPU_INT08U *)&addr_hw_sender[0],
+                            (CPU_INT08U *)&addr_hw_len,
+                            (NET_ERR    *)&err);
+    if (err != NET_IF_ERR_NONE) {
+        return;
+    }
+
+
+                                                                /* --------- CFG ARP REQ FROM ARP CACHE DATA ---------- */
+                                                                /* See Note #1b.                                        */
+    if_nbr                 =  p_cache_addr_arp->IF_Nbr;
+    p_addr_hw_target       =  DEF_NULL;
+    p_addr_protocol_target = (CPU_INT08U *)&p_cache_addr_arp->AddrProtocol[0];
+    p_addr_protocol_sender = (CPU_INT08U *)&p_cache_addr_arp->AddrProtocolSender[0];
+
+    p_cache_arp = NetCache_GetParent((NET_CACHE_ADDR *)p_cache_addr_arp);
+    if (p_cache_arp->State  != NET_ARP_CACHE_STATE_RENEW) {
+        p_addr_hw_target = DEF_NULL;
+    } else {
+        p_addr_hw_target = p_cache_addr_arp->AddrHW;
+    }
+
+    op_code               =  NET_ARP_HDR_OP_REQ;
+
+    NetARP_Tx(if_nbr,
+             &addr_hw_sender[0],
+              p_addr_hw_target,
+              p_addr_protocol_sender,
+              p_addr_protocol_target,
+              op_code,
+             &err);
+
+    if (err == NET_ARP_ERR_NONE) {
+        NET_CTR_STAT_INC(Net_StatCtrs.ARP.TxMsgReqCtr);
+    }
+
+    p_cache_arp = (NET_ARP_CACHE *)NetCache_GetParent((NET_CACHE_ADDR *)p_cache_addr_arp);
+    if (p_cache_arp == ((NET_ARP_CACHE *)0)) {
+        return;
+    }
+
+    p_cache_arp->ReqAttemptsCtr++;                              /* Inc req attempts ctr.                                */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetARP_CacheAddPend()
+*
+* Description : (1) Add a 'PENDING' ARP cache into the ARP Cache List & transmit an ARP Request :
+*
+*                   (a) Configure ARP cache :
+*                       (1) Get sender protocol sender
+*                       (2) Get default-configured ARP cache
+*                       (3) ARP cache state
+*                       (4) Enqueue transmit buffer to ARP cache queue
+*                   (b) Insert   ARP cache into ARP Cache List
+*                   (c) Transmit ARP Request to resolve ARP cache
+*
+*
+* Argument(s) : p_buf           Pointer to network buffer to transmit.
+*               ----            Argument checked   in NetARP_CacheHandler().
+*
+*               p_buf_hdr       Pointer to network buffer header.
+*               --------        Argument validated in NetARP_CacheHandler().
+*
+*               p_addr_protocol Pointer to protocol address (see Note #2).
+*               --------------  Argument checked   in NetARP_CacheHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_CACHE_PEND              ARP cache added in 'PENDING' state.
+*
+*                                                                   -- RETURNED BY NetCache_CfgAddrs() : --
+*                               NET_CACHE_ERR_NONE_AVAIL            NO available ARP caches to allocate.
+*                               NET_CACHE_ERR_INVALID_TYPE          ARP cache is NOT a valid cache type.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL              NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE            Network timer is NOT a valid timer type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_CacheHandler().
+*
+* Note(s)     : (2) 'p_addr_protocol' MUST point to a valid protocol address in network-order.
+*
+*                    See also 'NetARP_CacheHandler()  Note #2e3'.
+*
+*               (3) (a) RFC #1122, Section 2.3.2.2 states that "the link layer SHOULD" :
+*
+*                       (1) "Save (rather than discard) ... packets destined to the same unresolved
+*                            IP address and" ...
+*                       (2) "Transmit the saved packet[s] when the address has been resolved."
+*
+*                   (b) Since ARP Layer is the last layer to handle & queue the transmit network
+*                       buffer, it is NOT necessary to increment the network buffer's reference
+*                       counter to include the pending ARP cache buffer queue as a new reference
+*                       to the network buffer.
+*
+*               (4) Some buffer controls were previously initialized in NetBuf_Get() when the packet
+*                   was received at the network interface layer.  These buffer controls do NOT need
+*                   to be re-initialized but are shown for completeness.
+*********************************************************************************************************
+*/
+void  NetARP_CacheAddPend (NET_BUF      *p_buf,
+                           NET_BUF_HDR  *p_buf_hdr,
+                           CPU_INT08U   *p_addr_protocol,
+                           NET_ERR      *p_err)
+{
+    NET_CACHE_ADDR_ARP  *p_cache_addr_arp;
+    NET_ARP_CACHE       *p_cache_arp;
+    CPU_INT08U           addr_protocol_sender[NET_IPv4_ADDR_SIZE];
+    NET_IF_NBR           if_nbr;
+    NET_TMR_TICK         timeout_tick;
+    CPU_SR_ALLOC();
+
+                                                                /* ------------------ CFG ARP CACHE ------------------- */
+                                                                /* Copy sender protocol addr to net order.              */
+                                                                /* Cfg protocol addr generically from IP addr.          */
+    NET_UTIL_VAL_COPY_SET_NET_32(&addr_protocol_sender[0], &p_buf_hdr->IP_AddrSrc);
+
+    if_nbr       = p_buf_hdr->IF_Nbr;
+    CPU_CRITICAL_ENTER();
+    timeout_tick = NetARP_ReqTimeoutPend_tick;
+    CPU_CRITICAL_EXIT();
+
+    p_cache_addr_arp = (NET_CACHE_ADDR_ARP *)NetCache_CfgAddrs(NET_CACHE_TYPE_ARP,
+                                                               if_nbr,
+                                                               0,
+                                                               NET_IF_HW_ADDR_LEN_MAX,
+                                                               p_addr_protocol,
+                                                              &addr_protocol_sender[0],
+                                                               NET_IPv4_ADDR_SIZE,
+                                                               DEF_YES,
+                                                               NetARP_CacheReqTimeout,
+                                                               timeout_tick,
+                                                               p_err);
+    if (*p_err != NET_CACHE_ERR_NONE) {
+         return;
+    }
+
+                                                                /* Cfg buf's unlink fnct/obj to ARP cache.              */
+    p_buf_hdr->UnlinkFnctPtr  = (NET_BUF_FNCT)NetCache_UnlinkBuf;
+    p_buf_hdr->UnlinkObjPtr   = (void       *)p_cache_addr_arp;
+
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #4].                */
+    p_buf_hdr->PrevSecListPtr = (NET_BUF *)0;
+    p_buf_hdr->NextSecListPtr = (NET_BUF *)0;
+#endif
+                                                                /* Q buf to ARP cache (see Note #3a1).                  */
+    p_cache_addr_arp->TxQ_Head         = (NET_BUF *)p_buf;
+    p_cache_addr_arp->TxQ_Tail         = (NET_BUF *)p_buf;
+    p_cache_addr_arp->TxQ_Nbr++;
+
+    p_cache_arp = (NET_ARP_CACHE *)p_cache_addr_arp->ParentPtr;
+
+    p_cache_arp->State = NET_ARP_CACHE_STATE_PEND;
+
+                                                                /* ------- INSERT ARP CACHE INTO ARP CACHE LIST ------- */
+    NetCache_Insert((NET_CACHE_ADDR *)p_cache_addr_arp);
+                                                                /* -------------------- TX ARP REQ -------------------- */
+    NetARP_TxReq(p_cache_addr_arp);                             /* Tx ARP req to resolve ARP cache.                     */
+
+
+   *p_err = NET_ARP_ERR_CACHE_PEND;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       NetARP_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as ARP protocol.
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header that received ARP packet.
+*               --------    Argument validated in NetARP_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_NONE                Received buffer's ARP header validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT ARP.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetARP_RxPktValidateBuf (NET_BUF_HDR  *p_buf_hdr,
+                                       NET_ERR      *p_err)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  valid;
+    NET_ERR      err;
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* --------------- VALIDATE ARP BUF HDR --------------- */
+    if (p_buf_hdr->ProtocolHdrType != NET_PROTOCOL_TYPE_ARP) {
+        if_nbr = p_buf_hdr->IF_Nbr;
+        valid  = NetIF_IsValidHandler(if_nbr, &err);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvProtocolCtr);
+        }
+       *p_err = NET_ERR_INVALID_PROTOCOL;
+        return;
+    }
+
+    if (p_buf_hdr->ARP_MsgIx == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_ARP_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetARP_RxPktValidate()
+*
+* Description : (1) Validate received ARP packet :
+*
+*                   (a) Validate the received packet's following ARP header fields :
+*
+*                       (1) Hardware  Type
+*                       (2) Hardware  Address Length
+*                       (3) Hardware  Address : Sender's
+*                       (4) Protocol  Type
+*                       (5) Protocol  Address Length
+*                       (6) Protocol  Address : Sender's
+*                       (7) Operation Code
+*
+*                   (b) Convert the following ARP header fields from network-order to host-order :
+*
+*                       (1) Hardware  Type
+*                       (2) Protocol  Type
+*                       (3) Operation Code                                          See Note #1bB
+*
+*                           (A) These fields are NOT converted directly in the received packet buffer's
+*                               data area but are converted in local or network buffer variables ONLY.
+*
+*                           (B) To avoid storing the ARP operation code in a network buffer variable &
+*                               passing an additional pointer to the network buffer header that received
+*                               ARP packet, ARP operation code is converted in the following functions :
+*
+*                               (1) NetARP_RxPktValidate()
+*                               (2) NetARP_RxPktCacheUpdate()
+*                               (3) NetARP_RxPktReply()
+*                               (4) NetARP_RxPktIsTargetThisHost()
+*
+*                           (C) Hardware & Protocol Addresses are NOT converted from network-order to
+*                               host-order & MUST be accessed as multi-octet arrays.
+*
+*                   (c) Validate the received packet's following ARP packet controls :
+*
+*                       (1) ARP message length                                      See Note #4
+*
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header that received ARP packet.
+*               --------    Argument validated in NetARP_Rx().
+*
+*               p_arp_hdr   Pointer to received packet's ARP header.
+*               --------    Argument validated in NetARP_Rx()/NetARP_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_NONE                    Received packet validated.
+*                               NET_ARP_ERR_INVALID_HW_TYPE         Invalid ARP hardware type.
+*                               NET_ARP_ERR_INVALID_HW_ADDR         Invalid ARP hardware address.
+*                               NET_ARP_ERR_INVALID_HW_ADDR_LEN     Invalid ARP hardware address length.
+*                               NET_ARP_ERR_INVALID_PROTOCOL_TYPE   Invalid ARP protocol type.
+*                               NET_ARP_ERR_INVALID_PROTOCOL_ADDR   Invalid ARP protocol address.
+*                               NET_ARP_ERR_INVALID_PROTOCOL_LEN    Invalid ARP protocol address length.
+*                               NET_ARP_ERR_INVALID_OP_CODE         Invalid ARP operation code.
+*                               NET_ARP_ERR_INVALID_OP_ADDR         Invalid address for ARP operation
+*                                                                       (see Note #3).
+*                               NET_ARP_ERR_INVALID_LEN_MSG         Invalid ARP message length
+*                                                                       (see Note #1c1).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Rx().
+*
+* Note(s)     : (2) See RFC #826, Section 'Packet Format' for ARP packet header format.
+*
+*               (3) (a) (1) RFC #826, Section 'Packet Generation' states that "the Address Resolution module
+*                           ... does not set [the ARP Request packet's target hardware address] to anything
+*                           in particular, because it is this value that it is trying to determine" :
+*
+*                           (A) "Could    set [the ARP Request packet's target hardware address] to the
+*                                broadcast address for the hardware."
+*
+*                           (B) "Could    set [the ARP Request packet's target hardware address] to the ...
+*                                hardware  address of target of this packet (if known)."
+*
+*                       (2) (A) Therefore, ARP Requests SHOULD typically be transmitted onto a network via
+*                               the network's broadcast address.
+*
+*                           (B) However, an ARP Request COULD be transmitted directly to a specific host/
+*                               hardware address.
+*
+*                           (C) Thus, any ARP Request NOT received as a broadcast OR directly-addressed
+*                               packet MUST be discarded.
+*
+*                   (b) (1) RFC #826, Section 'Packet Reception' states to "send the [ARP Reply] packet to
+*                           the ... address ... [from] which the request was received".
+*
+*                       (2) (A) Therefore, an ARP Reply SHOULD be transmitted directly to the ARP-Requesting
+*                               host & SHOULD NOT be broadcast onto the network.
+*
+*                           (B) Thus, any ARP Reply received as a broadcast packet SHOULD be discarded.
+*
+*               (4) (a) The ARP message length SHOULD be compared to the remaining packet data length which
+*                       should be identical.
+*
+*                   (b) (1) However, some network interfaces MAY append octets to their frames :
+*
+*                           (A) 'pad' octets, if the frame length does NOT meet the frame's required minimum size :
+*
+*                               (1) RFC #894, Section 'Frame Format' states that "the minimum length of  the data
+*                                   field of a packet sent over an Ethernet is 46 octets.  If necessary, the data
+*                                   field should be padded (with octets of zero) to meet the Ethernet minimum frame
+*                                   size".
+*
+*                               (2) RFC #1042, Section 'Frame Format and MAC Level Issues : For all hardware types'
+*                                   states that "IEEE 802 packets may have a minimum size restriction.  When
+*                                   necessary, the data field should be padded (with octets of zero) to meet the
+*                                   IEEE 802 minimum frame size requirements".
+*
+*                           (B) Trailer octets, to improve overall throughput :
+*
+*                               (1) RFC #893, Section 'Introduction' specifies "a link-level ... trailer
+*                                   encapsulation, or 'trailer' ... to minimize the number and size of memory-
+*                                   to-memory copy operations performed by a receiving host when processing a
+*                                   data packet".
+*
+*                               (2) RFC #1122, Section 2.3.1 states that "trailer encapsulations[s] ... rearrange
+*                                   the data contents of packets ... [to] improve the throughput of higher layer
+*                                   protocols".
+*
+*                           (C) CRC or checksum values, optionally copied from a device.
+*
+*                       (2) Therefore, if ANY octets are appended to the total frame length, then the packet's
+*                           remaining data length MAY be greater than the ARP message length :
+*
+*                           (A) Thus,    the ARP message length & the packet's remaining data length CANNOT be
+*                               compared for equality.
+*
+*                               (1) Unfortunately, this eliminates the possibility to validate the ARP message
+*                                   length to the packet's remaining data length.
+*
+*                           (B) And      the ARP message length MAY    be less    than the packet's remaining
+*                               data length.
+*
+*                               (1) However, the packet's remaining data length MUST be reset to the ARP message
+*                                   length to correctly calculate higher-layer application data length.
+*
+*                           (C) However, the ARP message length CANNOT be greater than the packet's remaining
+*                               data length.
+*********************************************************************************************************
+*/
+
+static  void  NetARP_RxPktValidate (NET_BUF_HDR  *p_buf_hdr,
+                                    NET_ARP_HDR  *p_arp_hdr,
+                                    NET_ERR      *p_err)
+{
+    CPU_INT08U          addr_hw_target[NET_IF_HW_ADDR_LEN_MAX];
+    CPU_INT08U          addr_hw_len;
+    CPU_INT08U         *p_addr_target_hw;
+    CPU_BOOLEAN         target_hw_verifd;
+    CPU_INT16U          hw_type;
+    CPU_INT16U          protocol_type_arp;
+    NET_PROTOCOL_TYPE   protocol_type;
+    CPU_INT16U          op_code;
+    CPU_BOOLEAN         rx_broadcast;
+    CPU_BOOLEAN         valid;
+    NET_ERR             err;
+
+
+                                                                /* ------------ VALIDATE ARP HW TYPE/ADDR ------------- */
+    NET_UTIL_VAL_COPY_GET_NET_16(&hw_type, &p_arp_hdr->AddrHW_Type);
+    if (hw_type != NET_ADDR_HW_TYPE_802x) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvHW_TypeCtr);
+       *p_err = NET_ARP_ERR_INVALID_HW_TYPE;
+        return;
+    }
+
+    if (p_arp_hdr->AddrHW_Len != NET_IF_HW_ADDR_LEN_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvHW_AddrLenCtr);
+       *p_err = NET_ARP_ERR_INVALID_HW_ADDR_LEN;
+        return;
+    }
+
+    valid = NetIF_AddrHW_IsValidHandler((NET_IF_NBR  ) p_buf_hdr->IF_Nbr,
+                                        (CPU_INT08U *)&p_arp_hdr->AddrHW_Sender[0],
+                                        (NET_ERR    *)&err);
+    if (valid != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvHW_AddrCtr);
+       *p_err = NET_ARP_ERR_INVALID_HW_ADDR;
+        return;
+    }
+
+
+                                                                /* --------- VALIDATE ARP PROTOCOL TYPE/ADDR ---------- */
+    NET_UTIL_VAL_COPY_GET_NET_16(&protocol_type_arp, &p_arp_hdr->AddrProtocolType);
+    if (protocol_type_arp != NET_ARP_PROTOCOL_TYPE_IP_V4) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvProtocolTypeCtr);
+       *p_err = NET_ARP_ERR_INVALID_PROTOCOL_TYPE;
+        return;
+    }
+
+    if (p_arp_hdr->AddrProtocolLen != NET_IPv4_ADDR_SIZE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvLenCtr);
+       *p_err = NET_ARP_ERR_INVALID_PROTOCOL_LEN;
+        return;
+    }
+
+
+                                                                /* Get net protocol type.                               */
+    switch (protocol_type_arp) {
+        case NET_ARP_PROTOCOL_TYPE_IP_V4:
+             protocol_type = NET_PROTOCOL_TYPE_IP_V4;
+             break;
+
+
+        default:
+             protocol_type = NET_PROTOCOL_TYPE_NONE;
+             break;
+    }
+
+
+    valid = NetMgr_IsValidAddrProtocol((NET_PROTOCOL_TYPE) protocol_type,
+                                       (CPU_INT08U      *)&p_arp_hdr->AddrProtocolSender[0],
+                                       (CPU_INT08U       ) NET_IPv4_ADDR_SIZE);
+    if (valid != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvProtocolAddrCtr);
+       *p_err = NET_ARP_ERR_INVALID_PROTOCOL_ADDR;
+        return;
+    }
+
+
+                                                                /* --------------- VALIDATE ARP OP CODE --------------- */
+    NET_UTIL_VAL_COPY_GET_NET_16(&op_code, &p_arp_hdr->OpCode);
+    rx_broadcast = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_RX_BROADCAST);
+    switch (op_code) {
+        case NET_ARP_HDR_OP_REQ:
+             if (NetARP_AddrFltrEn == DEF_YES) {
+                 if (rx_broadcast != DEF_YES) {                 /* If rx'd ARP Req NOT broadcast (see Note #3a2A)  ...  */
+                     addr_hw_len = NET_IF_HW_ADDR_LEN_MAX;
+                     NetIF_AddrHW_GetHandler((NET_IF_NBR  ) p_buf_hdr->IF_Nbr,
+                                             (CPU_INT08U *)&addr_hw_target[0],
+                                             (CPU_INT08U *)&addr_hw_len,
+                                             (NET_ERR    *) p_err);
+                     if (*p_err != NET_IF_ERR_NONE) {
+                          NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvOpAddrCtr);
+                         *p_err = NET_ARP_ERR_INVALID_OP_ADDR;
+                          return;
+                     }
+
+                     p_addr_target_hw  = p_arp_hdr->AddrHW_Target;
+                     target_hw_verifd = Mem_Cmp((void     *) p_addr_target_hw,
+                                                (void     *)&addr_hw_target[0],
+                                                (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+                     if (target_hw_verifd != DEF_YES) {         /* ... & NOT addr'd to this host (see Note #3a2B), ...  */
+                         NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvOpAddrCtr);
+                        *p_err = NET_ARP_ERR_INVALID_OP_ADDR;   /* ... rtn err / discard pkt     (see Note #3a2C).      */
+                         return;
+                     }
+                 }
+             }
+             break;
+
+
+        case NET_ARP_HDR_OP_REPLY:
+             if (rx_broadcast != DEF_NO) {                      /* If rx'd ARP Reply broadcast, ...                     */
+                 NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvOpAddrCtr);
+                *p_err = NET_ARP_ERR_INVALID_OP_ADDR;           /* ... rtn err / discard pkt (see Note #3b2B).          */
+                 return;
+             }
+             break;
+
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvOpCodeCtr);
+            *p_err = NET_ARP_ERR_INVALID_OP_CODE;
+             return;
+    }
+
+
+                                                                /* --------------- VALIDATE ARP MSG LEN --------------- */
+    p_buf_hdr->ARP_MsgLen = NET_ARP_HDR_SIZE;
+    if (p_buf_hdr->ARP_MsgLen > p_buf_hdr->DataLen) {           /* If ARP msg len > rem pkt data len, ...               */
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvMsgLenCtr);
+       *p_err = NET_ARP_ERR_INVALID_LEN_MSG;                    /* ... rtn err (see Note #4b2C).                        */
+        return;
+    }
+
+    p_buf_hdr->DataLen = (NET_BUF_SIZE)p_buf_hdr->ARP_MsgLen;   /* Trunc pkt data len to ARP msg len (see Note #4b2B1). */
+
+
+
+   *p_err = NET_ARP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetARP_RxPktCacheUpdate()
+*
+* Description : (1) Update an ARP cache based on received ARP packet's sender addresses :
+*
+*                   (a) Verify ARP message's intended target address is this host
+*                   (b) Search ARP Cache List
+*                   (c) Update ARP cache
+*
+*
+* Argument(s) : if_nbr      Interface number the packet was received from.
+*
+*               p_arp_hdr   Pointer to received packet's ARP header.
+*               --------    Argument validated in NetARP_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_CACHE_RESOLVED              ARP cache resolved & hardware address
+*                                                                           successfully copied.
+*                               NET_ARP_ERR_RX_TARGET_REPLY             ARP Reply received but NO corresponding ARP
+*                                                                           cache currently pending for ARP Reply.
+*
+*                                                                       ----- RETURNED BY NetCacheAdd_Resolved() : -----
+*                               NET_CACHE_ERR_NONE_AVAIL                NO available ARP caches to allocate.
+*                               NET_CACHE_ERR_INVALID_TYPE              ARP cache is NOT a valid cache type.
+*                               NET_ERR_FAULT_NULL_FNCT                   Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL                  NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE                Network timer is NOT a valid timer type.
+*
+*                                                                       - RETURNED BY NetARP_RxPktIsTargetThisHost() : -
+*                               NET_ARP_ERR_RX_TARGET_NOT_THIS_HOST     Received ARP message NOT intended for this host.
+*                               NET_ARP_ERR_INVALID_OP_CODE             Invalid  ARP operation code.
+*                               NET_ARP_ERR_INVALID_PROTOCOL_LEN        Invalid  ARP protocol address length.
+*                               NET_IF_ERR_INVALID_IF                   Invalid network interface number.
+*                               NET_ERR_FAULT_UNKNOWN_ERR                       Interface's protocol address(s) NOT
+*                                                                           successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR                    Argument(s) passed a NULL pointer.
+*                               NET_MGR_ERR_INVALID_PROTOCOL            Invalid/unsupported network protocol.
+*                               NET_MGR_ERR_INVALID_PROTOCOL_LEN        Invalid protocol address length.
+*                               NET_MGR_ERR_ADDR_TBL_SIZE               Invalid protocol address table size.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Rx().
+*
+* Note(s)     : (2) (a) RFC #826, Section 'Packet Reception' states that :
+*
+*                       (1) "If the ... sender protocol address ... is already in ... [the] translation table,
+*                            update the sender hardware address field of the entry with the new information in
+*                            the packet."
+*
+*                       (2) Otherwise, if the packet's target protocol address matches this host's ARP protocol
+*                           address; then "add the ... sender protocol address, sender hardware address to the
+*                           translation table".
+*
+*                   (b) (1) Thus, the ARP cache algorithm implies that ALL messages received at the ARP layer
+*                           automatically update the ARP Cache List EVEN if this host is NOT the intended target
+*                           host of a received ARP message -- but ONLY if an ARP cache for the sender's addresses
+*                           is already cached.
+*
+*                       (2) However, if NO ARP cache exists for the sender's addresses, then even the ARP cache
+*                           algorithm implies that a misdirected or incorrectly received ARP message is discarded.
+*
+*               (3) A configurable ARP address filtering feature is provided to selectively filter & discard
+*                   ALL misdirected or incorrectly received ARP messages (see 'net_cfg.h  ADDRESS RESOLUTION
+*                   PROTOCOL LAYER CONFIGURATION  Note #3') :
+*
+*                   (a) When ENABLED,  the ARP address filter discards :
+*
+*                       (1) ALL misdirected, broadcasted, or incorrectly received ARP messages.
+*
+*                       (2) Any ARP Reply received for this host for which NO corresponding ARP cache currently
+*                           exists.  Note that such an ARP Reply may be a legitimate, yet late, ARP Reply to a
+*                           pending ARP Request that has timed-out & been removed from the ARP Cache List.
+*
+*                   (b) When DISABLED, the ARP address filter discards :
+*
+*                       (1) Any misdirected or incorrectly received ARP messages if the sender's address(s)
+*                           are NOT already cached.
+*               (4) (a) RFC # 826, Section 'Related issue' states that "perhaps receiving of a packet from a
+*                       host should reset a timeout in the address resolution entry ... [but] this may cause
+*                       extra overhead to scan the table for each incoming packet".
+*
+*                   (b) RFC #1122, Section 2.3.2.1 restates "that this timeout should be restarted when the
+*                       cache entry is 'refreshed' ... by ... an ARP broadcast from the system in question".
+*
+*                   (c) However, Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 4.5 'ARP Examples :
+*                       ARP Cache Timeout' adds that "the Host Requirements RFC [#1122] says that this timeout
+*                       should occur even if the entry is in use, but most Berkeley-derived implementations do
+*                       not do this -- they restart the timeout each time the entry is referenced".
+*********************************************************************************************************
+*/
+
+static  void  NetARP_RxPktCacheUpdate (NET_IF_NBR    if_nbr,
+                                       NET_ARP_HDR  *p_arp_hdr,
+                                       NET_ERR      *p_err)
+{
+    CPU_INT16U           op_code                = 0u;
+    CPU_BOOLEAN          cache_add              = DEF_NO;
+    CPU_INT08U          *p_addr_sender_hw       = DEF_NULL;
+    CPU_INT08U          *p_addr_sender_protocol = DEF_NULL;
+    NET_CACHE_ADDR_ARP  *p_cache_addr_arp       = DEF_NULL;
+    NET_ARP_CACHE       *p_cache_arp            = DEF_NULL;
+    NET_BUF             *p_buf_head             = DEF_NULL;
+    NET_TMR_TICK         timeout_tick           = 0u;
+    CPU_SR_ALLOC();
+
+
+                                                                /* ----------------- CHK TARGET ADDR ------------------ */
+    NetARP_RxPktIsTargetThisHost(if_nbr, p_arp_hdr, p_err);
+    if (NetARP_AddrFltrEn == DEF_YES) {
+        if (*p_err != NET_ARP_ERR_RX_TARGET_THIS_HOST) {        /* Fltr misdirected rx'd ARP msgs (see Note #3b1).      */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxPktInvDest);
+             return;
+        }
+    } else {
+        cache_add = (*p_err == NET_ARP_ERR_RX_TARGET_THIS_HOST) ? DEF_YES : DEF_NO;
+    }
+
+
+                                                                /* ------------------ SRCH ARP CACHE ------------------ */
+    p_addr_sender_hw       = p_arp_hdr->AddrHW_Sender;
+    p_addr_sender_protocol = p_arp_hdr->AddrProtocolSender;
+
+    p_cache_addr_arp = (NET_CACHE_ADDR_ARP *)NetCache_AddrSrch(NET_CACHE_TYPE_ARP,
+                                                              if_nbr,
+                                                              p_addr_sender_protocol,
+                                                              NET_IPv4_ADDR_SIZE,
+                                                              p_err);
+
+                                                                /* ----------------- UPDATE ARP CACHE ----------------- */
+    if (p_cache_addr_arp != DEF_NULL) {                         /* If ARP cache found, chk state.                       */
+        p_cache_arp = (NET_ARP_CACHE *)NetCache_GetParent((NET_CACHE_ADDR *)p_cache_addr_arp);
+        switch (p_cache_arp->State) {
+            case NET_ARP_CACHE_STATE_PEND:                      /* If ARP cache pend, add sender's hw addr, ...         */
+                 Mem_Copy((void     *)&p_cache_addr_arp->AddrHW[0],
+                          (void     *) p_addr_sender_hw,
+                          (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+
+                 p_cache_addr_arp->AddrHW_Valid = DEF_YES;
+                                                                /* Reset ARP cache tmr (see Note #4).                   */
+                 CPU_CRITICAL_ENTER();
+                 timeout_tick = NetARP_ReqTimeoutRenew_tick;
+                 CPU_CRITICAL_EXIT();
+                 NetTmr_Set((NET_TMR    *)p_cache_arp->TmrPtr,
+                            (CPU_FNCT_PTR)NetARP_CacheRenewTimeout,
+                            (NET_TMR_TICK)timeout_tick,
+                            (NET_ERR    *)p_err);
+
+                 p_buf_head                  =  p_cache_addr_arp->TxQ_Head;
+                 p_cache_addr_arp->TxQ_Head  = (NET_BUF *)0;
+                 p_cache_addr_arp->TxQ_Tail  = (NET_BUF *)0;
+                 p_cache_addr_arp->TxQ_Nbr   = 0;
+
+                 if (p_buf_head != DEF_NULL) {
+                     NetCache_TxPktHandler(NET_PROTOCOL_TYPE_ARP,
+                                           p_buf_head,          /* ... & handle/tx cache's buf Q.                       */
+                                           p_addr_sender_hw);
+                 }
+                 p_cache_arp->State = NET_ARP_CACHE_STATE_RESOLVED;
+                *p_err              = NET_ARP_ERR_CACHE_RESOLVED;
+                 break;
+
+
+            case NET_ARP_CACHE_STATE_RENEW:
+            case NET_ARP_CACHE_STATE_RESOLVED:                  /* If ARP cache resolved, update sender's hw addr.      */
+                 Mem_Copy((void     *)&p_cache_addr_arp->AddrHW[0],
+                          (void     *) p_addr_sender_hw,
+                          (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+                                                                /* Reset ARP cache tmr (see Note #4).                   */
+                 CPU_CRITICAL_ENTER();
+                 timeout_tick = NetARP_ReqTimeoutRenew_tick;
+                 CPU_CRITICAL_EXIT();
+                 NetTmr_Set((NET_TMR    *)p_cache_arp->TmrPtr,
+                            (CPU_FNCT_PTR)NetARP_CacheRenewTimeout,
+                            (NET_TMR_TICK)timeout_tick,
+                            (NET_ERR    *)p_err);
+
+                *p_err = NET_ARP_ERR_CACHE_RESOLVED;
+                 break;
+
+
+            case NET_ARP_CACHE_STATE_NONE:
+            case NET_ARP_CACHE_STATE_FREE:
+            default:
+                 NetCache_Remove((NET_CACHE_ADDR *)p_cache_addr_arp, DEF_YES);
+                 NetCache_AddResolved(if_nbr,
+                                      p_addr_sender_hw,
+                                      p_addr_sender_protocol,
+                                      NET_CACHE_TYPE_ARP,
+                                      NetARP_CacheRenewTimeout,
+                                      NetARP_ReqTimeoutRenew_tick,
+                                      p_err);
+                 break;
+        }
+
+    } else {                                                    /* Else add new ARP cache into ARP Cache List.          */
+        if (NetARP_AddrFltrEn == DEF_YES) {                     /* If ARP addr fltr en'd          ..                    */
+            NET_UTIL_VAL_COPY_GET_NET_16(&op_code, &p_arp_hdr->OpCode);
+            if (op_code != NET_ARP_HDR_OP_REQ) {                /* .. but ARP pkt NOT an ARP Req, ..                    */
+                                                                /* .. do  NOT add new ARP cache (see Note #3a2).        */
+                NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxPktTargetReplyCtr);
+               *p_err = NET_ARP_ERR_RX_TARGET_REPLY;
+                return;
+            }
+        } else {
+                                                                /* If ARP addr fltr dis'd            ..                 */
+            if (cache_add != DEF_YES) {                         /* .. &   ARP pkt NOT for this host, ..                 */
+                                                                /* .. do  NOT add new ARP cache (see Note #3b1).        */
+                NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxPktInvDest);
+                return;                                         /* Err rtn'd by NetARP_RxPktIsTargetThisHost().         */
+            }
+        }
+
+        NetCache_AddResolved(if_nbr,
+                             p_addr_sender_hw,
+                             p_addr_sender_protocol,
+                             NET_CACHE_TYPE_ARP,
+                             NetARP_CacheRenewTimeout,
+                             NetARP_ReqTimeoutRenew_tick,
+                             p_err);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetARP_RxPktReply()
+*
+* Description : Reply to received ARP message, if necessary.
+*
+* Argument(s) : if_nbr      Interface number the packet was received from.
+*
+*               p_arp_hdr   Pointer to received packet's ARP header.
+*               --------    Argument validated in NetARP_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_RX_REQ_TX_REPLY             ARP Reply transmitted.
+*                               NET_ARP_ERR_RX_REPLY_TX_PKTS            ARP Reply received; ARP cache transmit
+*                                                                           queue packets already transmitted
+*                                                                           (see Note #1).
+*                               NET_ARP_ERR_INVALID_OP_CODE             Invalid ARP operation code.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Rx().
+*
+* Note(s)     : (1) ARP Reply already transmitted the ARP cache's transmit buffer queue, if any, in
+*                   NetARP_RxPktCacheUpdate(); no further action required.
+*
+*               (2) Default case already invalidated in NetARP_RxPktValidate().  However, the default
+*                   case is included as an extra precaution in case 'OpCode' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetARP_RxPktReply (NET_IF_NBR    if_nbr,
+                                 NET_ARP_HDR  *p_arp_hdr,
+                                 NET_ERR      *p_err)
+{
+    CPU_INT16U  op_code;
+
+
+    NET_UTIL_VAL_COPY_GET_NET_16(&op_code, &p_arp_hdr->OpCode);
+
+    switch (op_code) {
+        case NET_ARP_HDR_OP_REQ:                                /* Use rx'd ARP Req to tx ARP Reply.                    */
+             NetARP_TxReply(if_nbr, p_arp_hdr);
+            *p_err = NET_ARP_ERR_RX_REQ_TX_REPLY;
+             break;
+
+
+        case NET_ARP_HDR_OP_REPLY:                              /* See Note #1.                                         */
+            *p_err = NET_ARP_ERR_RX_REPLY_TX_PKTS;
+             break;
+
+
+        default:                                                /* See Note #2.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvOpCodeCtr);
+            *p_err = NET_ARP_ERR_INVALID_OP_CODE;
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetARP_RxPktIsTargetThisHost()
+*
+* Description : (1) Determine if this host is the intended target of the received ARP message :
+*
+*                   (a) Validate interface
+*                   (b) (1) Get    target hardware address
+*                       (2) Verify target hardware address                              See Note #2
+*                   (c) (1) Get    target protocol address
+*                       (2) Verify target protocol address :
+*                           (A) Check for protocol initialization address
+*                           (B) Check for protocol address conflict                     See Note #4
+*                   (d) Return target validation
+*
+*
+* Argument(s) : if_nbr      Interface number the packet was received from.
+*
+*               p_arp_hdr   Pointer to received packet's ARP header.
+*               --------    Argument validated in NetARP_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_RX_TARGET_THIS_HOST         Received ARP message     intended
+*                                                                           for this host.
+*                               NET_ARP_ERR_RX_TARGET_NOT_THIS_HOST     Received ARP message NOT intended
+*                                                                           for this host.
+*                               NET_ARP_ERR_INVALID_OP_CODE             Invalid ARP operation code.
+*                               NET_ARP_ERR_INVALID_PROTOCOL_LEN        Invalid ARP protocol address length.
+*
+*                                                                       ---- RETURNED BY NetIF_IsValidHandler() : ----
+*                               NET_IF_ERR_INVALID_IF                   Invalid network interface number.
+*
+*                                                                       - RETURNED BY NetMgr_GetHostAddrProtocol() : -
+*                               NET_ERR_FAULT_UNKNOWN_ERR                       Interface's protocol address(s) NOT
+*                                                                           successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR                    Argument(s) passed a NULL pointer.
+*                               NET_MGR_ERR_INVALID_PROTOCOL            Invalid/unsupported network protocol.
+*                               NET_MGR_ERR_INVALID_PROTOCOL_LEN        Invalid protocol address length.
+*                               NET_MGR_ERR_ADDR_TBL_SIZE               Invalid protocol address table size.
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_RxPktCacheUpdate().
+*
+* Note(s)     : (2) (a) ARP Request target hardware address previously verified in NetARP_RxPktValidate()
+*                       as     a network interface broadcast address or directly-addressed to this host's
+*                       ARP hardware address.
+*
+*                       See 'NetARP_RxPktValidate()  Note #3a'.
+*
+*                   (b) ARP Reply   target hardware address previously verified in NetARP_RxPktValidate()
+*                       as NOT a network interface broadcast address but NOT yet verified as directly-
+*                       addressed to this host's ARP hardware address.
+*
+*                       See 'NetARP_RxPktValidate()  Note #3b'.
+*
+*               (3) Default case already invalidated in NetARP_RxPktValidate().  However, the default case
+*                   is included as an extra precaution in case 'OpCode' is incorrectly modified.
+*
+*               (4) RFC #3927, Section 2.5 states that :
+*
+*                   (a) "If a host receives an ARP packet (request *or* reply) on an interface where" ...
+*                       (1) "the 'sender hardware address' does not match the hardware address of
+*                                 that interface, but"                                                ...
+*                       (2) "the 'sender IP       address' is a IP address the host has configured for
+*                                 that interface,"                                                    ...
+*                   (b) "then this is a conflicting ARP packet, indicating an address conflict."
+*
+*                   See also 'NetARP_IsAddrProtocolConflict()  Note #3'.
+*********************************************************************************************************
+*/
+static  void  NetARP_RxPktIsTargetThisHost (NET_IF_NBR    if_nbr,
+                                            NET_ARP_HDR  *p_arp_hdr,
+                                            NET_ERR      *p_err)
+{
+    CPU_INT16U          op_code;
+    CPU_INT08U         *p_addr_target_hw;
+    CPU_INT08U         *p_addr_sender_hw;
+    CPU_INT08U         *p_addr_target_protocol;
+    CPU_INT08U         *p_addr_sender_protocol;
+    CPU_INT08U         *p_addr_host_protocol;
+    CPU_INT08U          addr_if_hw[NET_IF_HW_ADDR_LEN_MAX];
+    CPU_INT08U          addr_if_protocol_tbl[NET_IPv4_ADDR_SIZE * NET_IPv4_CFG_IF_MAX_NBR_ADDR];
+    CPU_INT08U          addr_hw_len;
+    CPU_INT08U          addr_protocol_len;
+    CPU_INT08U          addr_protocol_tbl_qty;
+    CPU_INT08U          addr_ix;
+    CPU_INT16U          protocol_type_arp;
+    NET_PROTOCOL_TYPE   protocol_type;
+    CPU_BOOLEAN         target_hw_verifd;
+    CPU_BOOLEAN         sender_hw_verifd;
+    CPU_BOOLEAN         target_protocol_verifd;
+    NET_ERR             err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ----------------- VALIDATE IF NBR ------------------ */
+   (void)NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+
+                                                                /* ------------------- GET HW ADDR -------------------- */
+    addr_hw_len = NET_IF_HW_ADDR_LEN_MAX;
+    NetIF_AddrHW_GetHandler((NET_IF_NBR  ) if_nbr,
+                            (CPU_INT08U *)&addr_if_hw[0],
+                            (CPU_INT08U *)&addr_hw_len,
+                            (NET_ERR    *)&err);
+    if ( err != NET_IF_ERR_NONE) {
+       *p_err  = NET_ARP_ERR_RX_TARGET_NOT_THIS_HOST;
+        return;
+    }
+
+
+                                                                /* -------------- VERIFY TARGET HW ADDR --------------- */
+    if (NetARP_AddrFltrEn == DEF_YES) {
+        NET_UTIL_VAL_COPY_GET_NET_16(&op_code, &p_arp_hdr->OpCode);
+        switch (op_code) {
+            case NET_ARP_HDR_OP_REQ:                            /* See Note #2a.                                        */
+                 target_hw_verifd = DEF_YES;
+                 break;
+
+
+            case NET_ARP_HDR_OP_REPLY:                          /* See Note #2b.                                        */
+                 p_addr_target_hw  = p_arp_hdr->AddrHW_Target;
+                 target_hw_verifd = Mem_Cmp((void     *) p_addr_target_hw,
+                                            (void     *)&addr_if_hw[0],
+                                            (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+                 break;
+
+
+            default:                                            /* See Note #3.                                         */
+                 NET_CTR_ERR_INC(Net_ErrCtrs.ARP.RxInvOpCodeCtr);
+                *p_err = NET_ARP_ERR_INVALID_OP_CODE;
+                 return;
+        }
+    } else {
+        target_hw_verifd = DEF_YES;
+    }
+
+
+                                                                /* ---------------- GET PROTOCOL ADDR ----------------- */
+    NET_UTIL_VAL_COPY_GET_NET_16(&protocol_type_arp, &p_arp_hdr->AddrProtocolType);
+    switch (protocol_type_arp) {
+        case NET_ARP_PROTOCOL_TYPE_IP_V4:
+             protocol_type = NET_PROTOCOL_TYPE_IP_V4;
+             break;
+
+
+        default:
+             protocol_type = NET_PROTOCOL_TYPE_NONE;
+             break;
+    }
+
+    addr_protocol_tbl_qty  = NET_IPv4_CFG_IF_MAX_NBR_ADDR;
+    addr_protocol_len      = NET_IPv4_ADDR_SIZE;
+    NetMgr_GetHostAddrProtocol((NET_IF_NBR       ) if_nbr,
+                               (NET_PROTOCOL_TYPE) protocol_type,
+                               (CPU_INT08U      *)&addr_if_protocol_tbl[0],
+                               (CPU_INT08U      *)&addr_protocol_tbl_qty,
+                               (CPU_INT08U      *)&addr_protocol_len,
+                               (NET_ERR         *) p_err);
+    switch (*p_err) {
+        case NET_MGR_ERR_NONE:
+                                                                /* ----------- VERIFY TARGET PROTOCOL ADDR ------------ */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+             if (addr_protocol_len != NET_IPv4_ADDR_SIZE) {
+                *p_err = NET_ARP_ERR_INVALID_PROTOCOL_LEN;
+                 return;
+             }
+#endif
+
+             addr_ix                =  0u;
+             p_addr_target_protocol  =  p_arp_hdr->AddrProtocolTarget;
+             p_addr_host_protocol    = &addr_if_protocol_tbl[addr_ix];
+             target_protocol_verifd =  DEF_NO;
+
+             while ((addr_ix                 < addr_protocol_tbl_qty) &&
+                    (target_protocol_verifd != DEF_YES)) {
+
+                 target_protocol_verifd = Mem_Cmp((void     *)p_addr_target_protocol,
+                                                  (void     *)p_addr_host_protocol,
+                                                  (CPU_SIZE_T)addr_protocol_len);
+
+                 p_addr_host_protocol += addr_protocol_len;
+                 addr_ix++;
+             }
+
+                                                                /* ------------ CHK PROTOCOL ADDR CONFLICT ------------ */
+             p_addr_sender_hw  = p_arp_hdr->AddrHW_Sender;      /* Cmp sender's hw addr           (see Note #4a1A).     */
+             sender_hw_verifd = Mem_Cmp((void     *) p_addr_sender_hw,
+                                        (void     *)&addr_if_hw[0],
+                                        (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+
+             if (sender_hw_verifd != DEF_YES) {                 /* If sender hw addr NOT verifd, ...                    */
+                                                                /* ... cmp sender's protocol addr (see Note #4a1B).     */
+                 p_addr_sender_protocol = &p_arp_hdr->AddrProtocolSender[0];
+                 addr_protocol_len     =  p_arp_hdr->AddrProtocolLen;
+
+                 NetMgr_ChkAddrProtocolConflict(if_nbr,
+                                                protocol_type,
+                                                p_addr_sender_protocol,
+                                                addr_protocol_len,
+                                               &err);
+             }
+             break;
+
+
+        case NET_MGR_ERR_ADDR_CFG_IN_PROGRESS:                  /* ----------- VERIFY TARGET PROTOCOL ADDR ------------ */
+             addr_protocol_len      = NET_IPv4_ADDR_SIZE;
+             target_protocol_verifd = NetMgr_IsAddrProtocolInit((NET_PROTOCOL_TYPE) protocol_type,
+                                                                (CPU_INT08U      *)&p_arp_hdr->AddrProtocolTarget[0],
+                                                                (CPU_INT08U       ) addr_protocol_len);
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+        case NET_ERR_FAULT_UNKNOWN_ERR:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_MGR_ERR_ADDR_TBL_SIZE:
+        case NET_MGR_ERR_INVALID_PROTOCOL:
+        case NET_MGR_ERR_INVALID_PROTOCOL_LEN:
+        default:
+             return;
+    }
+
+
+                                                                /* -------------- RTN TARGET VALIDATION --------------- */
+   *p_err = ((target_hw_verifd       == DEF_YES) &&
+            (target_protocol_verifd == DEF_YES)) ? NET_ARP_ERR_RX_TARGET_THIS_HOST :
+                                                   NET_ARP_ERR_RX_TARGET_NOT_THIS_HOST;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetARP_RxPktFree()
+*
+* Description : Free network buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetARP_RxPktFree (NET_BUF  *p_buf)
+{
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)0);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetARP_RxPktDiscard()
+*
+* Description : On any ARP receive error(s), discard ARP packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetARP_RxPktDiscard (NET_BUF  *p_buf,
+                                   NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.ARP.RxPktDisCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             NetARP_Tx()
+*
+* Description : (1) Prepare & transmit an ARP Request or ARP Reply :
+*
+*                   (a) Get network buffer for ARP transmit packet
+*                   (b) Prepare & transmit packet
+*                   (c) Free      transmit packet buffer(s)
+*                   (d) Update    transmit statistics
+*
+*
+* Argument(s) : if_nbr                  Interface number to transmit ARP Request.
+*
+*               p_addr_hw_sender        Pointer to sender's hardware address (see Note #2).
+*
+*               p_addr_hw_target        Pointer to target's hardware address (see Note #2).
+*
+*               p_addr_protocol_sender  Pointer to sender's protocol address (see Note #2).
+*
+*               p_addr_protocol_target  Pointer to target's protocol address (see Note #2).
+*
+*               op_code                 ARP operation : Request or Reply.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_NONE                ARP packet successfully transmitted.
+*                               NET_ERR_FAULT_NULL_PTR            Argument(s) passed a NULL pointer.
+*                               NET_ARP_ERR_INVALID_OP_CODE     Invalid ARP operation code.
+*
+*                                                               ------- RETURNED BY NetBuf_Get() : --------
+*                               NET_BUF_ERR_NONE_AVAIL          NO available buffers to allocate.
+*                               NET_BUF_ERR_INVALID_SIZE        Requested size is greater then the maximum
+*                                                                   buffer size available.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index.
+*                               NET_BUF_ERR_INVALID_LEN         Invalid buffer length.
+*
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                                                               --- RETURNED BY NetARP_TxPktDiscard() : ---
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+*                                                               -------- RETURNED BY NetIF_Tx() : ---------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_TxReq(),
+*               NetARP_TxReply(),
+*               NetARP_TxReqGratuitous().
+*
+* Note(s)     : (2) ARP addresses MUST be in network-order.
+*
+*               (3) Assumes network buffer's protocol header size is large enough to accommodate ARP header
+*                   size (see 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1').
+*
+*               (4) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+static  void  NetARP_Tx (NET_IF_NBR   if_nbr,
+                         CPU_INT08U  *p_addr_hw_sender,
+                         CPU_INT08U  *p_addr_hw_target,
+                         CPU_INT08U  *p_addr_protocol_sender,
+                         CPU_INT08U  *p_addr_protocol_target,
+                         CPU_INT16U   op_code,
+                         NET_ERR     *p_err)
+{
+    CPU_INT16U   msg_ix;
+    CPU_INT16U   msg_ix_offset;
+    NET_BUF     *p_buf;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_addr_hw_sender == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.TxPktDisCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (p_addr_protocol_sender == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.TxPktDisCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (p_addr_protocol_target == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.TxPktDisCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+                                                                /* ------------------- VALIDATE OP -------------------- */
+    switch (op_code) {
+        case NET_ARP_HDR_OP_REQ:                                /* For ARP Req, NULL hw addr ptr expected.              */
+             break;
+
+
+        case NET_ARP_HDR_OP_REPLY:
+             if (p_addr_hw_target == (CPU_INT08U *)0) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+                 NET_CTR_ERR_INC(Net_ErrCtrs.ARP.TxPktDisCtr);
+                *p_err = NET_ERR_FAULT_NULL_PTR;
+                 return;
+             }
+             break;
+
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.ARP.TxHdrOpCodeCtr);
+             NET_CTR_ERR_INC(Net_ErrCtrs.ARP.TxPktDisCtr);
+            *p_err = NET_ARP_ERR_INVALID_OP_CODE;
+             return;
+    }
+#endif
+
+
+                                                                /* --------------------- GET BUF ---------------------- */
+#if 0
+#if (NET_BUF_DATA_IX_TX < NET_ARP_HDR_SIZE)                     /* See Note #3.                                         */
+    NetARP_TxPktDiscard((NET_BUF *)0,
+                        (NET_ERR *)p_err);
+    NET_CTR_ERR_INC(Net_ErrCtrs.ARP.TxInvBufIxCtr);
+    return;
+#endif
+#endif
+
+#if 0
+    msg_ix   = NET_BUF_DATA_IX_TX - msg_size_hdr;
+#else
+    msg_ix = 0u;
+    NetARP_TxIxDataGet(if_nbr,
+                       NET_ARP_MSG_LEN_DATA,
+                      &msg_ix,
+                       p_err);
+#endif
+
+    p_buf   = NetBuf_Get((NET_IF_NBR     ) if_nbr,
+                        (NET_TRANSACTION) NET_TRANSACTION_TX,
+                        (NET_BUF_SIZE   ) NET_ARP_MSG_LEN_DATA,
+                        (NET_BUF_SIZE   ) msg_ix,
+                        (NET_BUF_SIZE  *)&msg_ix_offset,
+                        (CPU_INT16U     ) NET_BUF_FLAG_NONE,
+                        (NET_ERR       *) p_err);
+    if (*p_err != NET_BUF_ERR_NONE) {
+         return;
+    }
+
+    msg_ix += msg_ix_offset;
+
+                                                                /* ---------------- PREPARE/TX ARP PKT ---------------- */
+    NetARP_TxPktPrepareHdr(p_buf,
+                           msg_ix,
+                           p_addr_hw_sender,
+                           p_addr_hw_target,
+                           p_addr_protocol_sender,
+                           p_addr_protocol_target,
+                           op_code,
+                           p_err);
+    switch (*p_err) {
+        case NET_ARP_ERR_NONE:
+             NetIF_Tx(p_buf, p_err);
+             break;
+
+
+        case NET_ERR_FAULT_NULL_PTR:
+        default:
+             NetARP_TxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                /* ---------- FREE TX PKT / UPDATE TX STATS ----------- */
+    switch (*p_err) {                                           /* Chk err from NetIF_Tx().                             */
+        case NET_IF_ERR_NONE:
+             NetARP_TxPktFree(p_buf);
+             NET_CTR_STAT_INC(Net_StatCtrs.ARP.TxMsgCtr);
+            *p_err = NET_ARP_ERR_NONE;
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #4.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ARP.TxPktDisCtr);
+                                                                /* Rtn err from NetIF_Tx().                             */
+             return;
+
+
+        default:
+             NetARP_TxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetARP_TxReply()
+*
+* Description : (1) Prepare & transmit an ARP Reply in response to an ARP Request :
+*
+*                   (a) Configure sender's hardware address as this interface's           hardware address
+*                   (b) Configure target's hardware address from the ARP Request's sender hardware address
+*                   (c) Configure sender's protocol address from the ARP Request's target protocol address
+*                   (d) Configure target's protocol address from the ARP Request's sender protocol address
+*                   (e) Configure ARP operation as ARP Reply
+*
+*
+* Argument(s) : if_nbr      Interface number to transmit ARP Reply.
+*
+*               p_arp_hdr   Pointer to a packet's ARP header.
+*               --------    Argument checked in NetARP_RxPktValidate().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_RxPktReply().
+*
+* Note(s)     : (2) Do NOT need to verify success of ARP Reply since failure will cause timeouts & retries.
+*********************************************************************************************************
+*/
+
+static  void  NetARP_TxReply (NET_IF_NBR    if_nbr,
+                              NET_ARP_HDR  *p_arp_hdr)
+{
+    CPU_INT08U   addr_hw_sender[NET_IF_HW_ADDR_LEN_MAX];
+    CPU_INT08U  *p_addr_hw_target;
+    CPU_INT08U  *p_addr_protocol_sender;
+    CPU_INT08U  *p_addr_protocol_target;
+    CPU_INT08U   addr_hw_len;
+    CPU_INT16U   op_code;
+    NET_ERR      err;
+
+                                                                /* Cfg ARP Reply from ARP Req (see Note #1).            */
+    addr_hw_len = NET_IF_HW_ADDR_LEN_MAX;
+    NetIF_AddrHW_GetHandler((NET_IF_NBR  ) if_nbr,
+                            (CPU_INT08U *)&addr_hw_sender[0],
+                            (CPU_INT08U *)&addr_hw_len,
+                            (NET_ERR    *)&err);
+    if (err != NET_IF_ERR_NONE) {
+        return;
+    }
+
+    p_addr_hw_target       = (CPU_INT08U *)&p_arp_hdr->AddrHW_Sender[0];
+    p_addr_protocol_sender = (CPU_INT08U *)&p_arp_hdr->AddrProtocolTarget[0];
+    p_addr_protocol_target = (CPU_INT08U *)&p_arp_hdr->AddrProtocolSender[0];
+
+    op_code               =  NET_ARP_HDR_OP_REPLY;
+
+    NetARP_Tx((NET_IF_NBR  ) if_nbr,
+              (CPU_INT08U *)&addr_hw_sender[0],
+              (CPU_INT08U *) p_addr_hw_target,
+              (CPU_INT08U *) p_addr_protocol_sender,
+              (CPU_INT08U *) p_addr_protocol_target,
+              (CPU_INT16U  ) op_code,
+              (NET_ERR    *)&err);
+
+    if (err == NET_ARP_ERR_NONE) {
+        NET_CTR_STAT_INC(Net_StatCtrs.ARP.TxMsgReplyCtr);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetARP_TxPktPrepareHdr()
+*
+* Description : (1) Prepare ARP packet header :
+*
+*                   (a) Update network buffer's index & length controls
+*
+*                   (b) Prepare the transmit packet's following ARP header fields :
+*
+*                       (1) Hardware  Type
+*                       (2) Protocol  Type
+*                       (3) Hardware  Address Length
+*                       (4) Protocol  Address Length
+*                       (5) Operation Code
+*                       (6) Sender's  Hardware Address
+*                       (7) Sender's  Protocol Address
+*                       (8) Target's  Hardware Address
+*                       (9) Target's  Protocol Address
+*
+*                   (c) Convert the following ARP header fields from host-order to network-order :
+*
+*                       (1) Hardware  Type
+*                       (2) Protocol  Type
+*                       (3) Operation Code
+*
+*                   (d) Configure ARP protocol address pointer                      See Note #2
+*
+*
+* Argument(s) : p_buf                   Pointer to network buffer to prepare ARP packet.
+*
+*               msg_ix                  Buffer index to prepare ARP packet.
+*               ------                  Argument checked in NetARP_Tx().
+*
+*               p_addr_hw_sender        Pointer to sender's hardware address (see Note #2).
+*               ---------------         Argument checked in NetARP_Tx().
+*
+*               p_addr_hw_target        Pointer to target's hardware address (see Note #2).
+*               ---------------         Argument checked in NetARP_Tx().
+*
+*               p_addr_protocol_sender  Pointer to sender's protocol address (see Note #2).
+*               ---------------------   Argument checked in NetARP_Tx().
+*
+*               p_addr_protocol_target  Pointer to target's protocol address (see Note #2).
+*               ---------------------   Argument checked in NetARP_Tx().
+*
+*               op_code                 ARP operation : Request or Reply.
+*               -------                 Argument checked in NetARP_Tx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_NONE                ARP packet successfully prepared.
+*                               NET_ERR_FAULT_NULL_PTR            Argument 'p_buf' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Tx().
+*
+* Note(s)     : (2) ARP addresses MUST be in network-order.
+*
+*               (3) Some buffer controls were previously initialized in NetBuf_Get() when the buffer was
+*                   allocated.  These buffer controls do NOT need to be re-initialized but are shown for
+*                   completeness.
+*********************************************************************************************************
+*/
+
+static  void  NetARP_TxPktPrepareHdr (NET_BUF     *p_buf,
+                                      CPU_INT16U   msg_ix,
+                                      CPU_INT08U  *p_addr_hw_sender,
+                                      CPU_INT08U  *p_addr_hw_target,
+                                      CPU_INT08U  *p_addr_protocol_sender,
+                                      CPU_INT08U  *p_addr_protocol_target,
+                                      CPU_INT16U   op_code,
+                                      NET_ERR     *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_ARP_HDR  *p_arp_hdr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+    p_buf_hdr                        = &p_buf->Hdr;
+    p_buf_hdr->ARP_MsgIx             = (CPU_INT16U  )msg_ix;
+    p_buf_hdr->ARP_MsgLen            = (CPU_INT16U  )NET_ARP_HDR_SIZE;
+    p_buf_hdr->TotLen                = (NET_BUF_SIZE)p_buf_hdr->ARP_MsgLen;
+    p_buf_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_ARP;
+    p_buf_hdr->ProtocolHdrTypeIF_Sub =  NET_PROTOCOL_TYPE_ARP;
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #3].                */
+    p_buf_hdr->DataIx                =  NET_BUF_IX_NONE;
+    p_buf_hdr->DataLen               =  0u;
+#endif
+
+
+                                                                /* ----------------- PREPARE ARP HDR ------------------ */
+    p_arp_hdr    =  (NET_ARP_HDR *)&p_buf->DataPtr[p_buf_hdr->ARP_MsgIx];
+
+
+                                                                /* ---------- PREPARE ARP HW/PROTOCOL TYPES ----------- */
+    NET_UTIL_VAL_SET_NET_16(&p_arp_hdr->AddrHW_Type,      NET_ARP_HW_TYPE_ETHER);
+    NET_UTIL_VAL_SET_NET_16(&p_arp_hdr->AddrProtocolType, NET_ARP_PROTOCOL_TYPE_IP_V4);
+
+                                                                /* -------- PREPARE ARP HW/PROTOCOL ADDR LENS --------- */
+    p_arp_hdr->AddrHW_Len      =  NET_IF_HW_ADDR_LEN_MAX;
+    p_arp_hdr->AddrProtocolLen =  NET_IPv4_ADDR_SIZE;
+
+                                                                /* --------------- PREPARE ARP OP CODE ---------------- */
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_arp_hdr->OpCode, &op_code);
+
+                                                                /* ------- PREPARE ARP HW/PROTOCOL SENDER ADDRS ------- */
+    Mem_Copy((void     *)&p_arp_hdr->AddrHW_Sender[0],
+             (void     *) p_addr_hw_sender,
+             (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+
+    Mem_Copy((void     *)&p_arp_hdr->AddrProtocolSender[0],
+             (void     *) p_addr_protocol_sender,
+             (CPU_SIZE_T) NET_IPv4_ADDR_SIZE);
+
+                                                                /* ------- PREPARE ARP HW/PROTOCOL TARGET ADDRS ------- */
+    if (p_addr_hw_target == (CPU_INT08U *)0) {                  /* If ARP target hw addr NULL for ARP Req, ...          */
+        Mem_Clr( (void     *)&p_arp_hdr->AddrHW_Target[0],      /* .. clr target hw addr octets.                        */
+                 (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+
+        DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_TX_BROADCAST); /* ARP Req broadcast to ALL hosts on local net.       */
+
+    } else {                                                    /* Else copy target hw addr for ARP Reply.              */
+        Mem_Copy((void     *)&p_arp_hdr->AddrHW_Target[0],
+                 (void     *) p_addr_hw_target,
+                 (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+                                                                /* ARP Reply tx'd directly to target host.              */
+    }
+
+    Mem_Copy((void     *)&p_arp_hdr->AddrProtocolTarget[0],
+             (void     *) p_addr_protocol_target,
+             (CPU_SIZE_T) NET_IPv4_ADDR_SIZE);
+
+                                                                /* ------------ CFG ARP PROTOCOL ADDR PTR ------------- */
+    p_buf_hdr->ARP_AddrProtocolPtr = &p_arp_hdr->AddrProtocolTarget[0];
+
+
+
+   *p_err = NET_ARP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetARP_TxIxDataGet()
+*
+* Description : (1) Solves the starting index of the ARP data from the data buffer begining.
+*
+*               (2) Starting index if found by adding up the header sizes of the lower-level
+*                   protocol headers.
+*
+*
+* Argument(s) : if_nbr      Network interface number to transmit data.
+*
+*               hdr_len     Length of the ARP header.
+*
+*               data_len    Length of the ARP payload.
+*
+*               p_ix        Pointer to the current protocol index.
+*               ----        Argument validated in NetARP_Tx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ARP_ERR_NONE                No error.
+*
+*                               NET_ARP_ERR_INVALID_LEN         The payload is greater than the largest fragmentable
+*                                                               IPv4 datagram.
+*
+*                               -Returned by NetIF_GetTxDataIx()-
+*                               See NetIF_GetTxDataIx() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Tx().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetARP_TxIxDataGet (NET_IF_NBR   if_nbr,
+                                  CPU_INT32U   data_len,
+                                  CPU_INT16U  *p_ix,
+                                  NET_ERR     *p_err)
+{
+    NET_MTU  mtu;
+
+
+    mtu = NetIF_MTU_GetProtocol(if_nbr, NET_PROTOCOL_TYPE_ARP, NET_IF_FLAG_NONE, p_err);
+    if (data_len > mtu) {
+       *p_err = NET_ARP_ERR_INVALID_LEN_MSG;                     /* See Note #2.                                         */
+        return;
+    }
+
+
+                                                                /* Add the lower-level hdr offsets.                     */
+    NetIF_TxIxDataGet(if_nbr, data_len, p_ix, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+   *p_err = NET_ARP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetARP_TxPktFree()
+*
+* Description : Free network buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Tx().
+*
+* Note(s)     : (1) (a) Although ARP Transmit initially requests the network buffer for transmit,
+*                       the ARP layer does NOT maintain a reference to the buffer.
+*
+*                   (b) Also, since the network interface deallocation task frees ALL unreferenced buffers
+*                       after successful transmission, the ARP layer must NOT free the transmit buffer.
+*
+*                       See also 'net_if.c  NetIF_TxDeallocTaskHandler()  Note #1c'.
+*********************************************************************************************************
+*/
+
+static  void  NetARP_TxPktFree (NET_BUF  *p_buf)
+{
+   (void)&p_buf;                                                 /* Prevent 'variable unused' warning (see Note #1).     */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetARP_TxPktDiscard()
+*
+* Description : On any ARP transmit handler error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetARP_TxPktDiscard (NET_BUF  *p_buf,
+                                   NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.ARP.TxPktDisCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetARP_CacheReqTimeout()
+*
+* Description : Retry ARP Request to resolve an ARP cache in the 'PENDING' state on ARP Request timeout.
+*
+* Argument(s) : p_cache_timeout     Pointer to an ARP cache (see Note #1b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetARP_CacheAddPend().
+*
+* Note(s)     : (1) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_ARP_CACHE' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (2) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetCache_AddrFree() via NetCache_Remove(); or
+*                       (2) Reset   by NetTmr_Get().
+*
+*                   (b) but do NOT re-free the timer.
+*********************************************************************************************************
+*/
+static  void  NetARP_CacheReqTimeout (void  *p_cache_timeout)
+{
+    NET_ARP_CACHE       *p_cache;
+    NET_CACHE_ADDR_ARP  *p_arp;
+    NET_TMR_TICK         timeout_tick;
+    CPU_INT08U           th_max;
+    NET_ERR              err;
+    CPU_SR_ALLOC();
+
+
+    p_cache = (NET_ARP_CACHE      *)p_cache_timeout;
+    p_arp   = (NET_CACHE_ADDR_ARP *)p_cache->CacheAddrPtr;
+
+    p_cache->TmrPtr = DEF_NULL;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARP CACHE ---------------- */
+    if (p_cache == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+        return;
+    }
+
+    if (p_arp == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+        return;
+    }
+
+    if (p_arp->Type != NET_CACHE_TYPE_ARP) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.InvTypeCtr);
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    switch (p_cache->State) {
+        case NET_ARP_CACHE_STATE_RENEW:
+             th_max       = NetARP_ReqMaxAttemptsRenew_nbr;
+             timeout_tick = NetARP_ReqTimeoutRenew_tick;
+             break;
+
+
+        case NET_ARP_CACHE_STATE_PEND:
+        default:
+             th_max       = NetARP_ReqMaxAttemptsPend_nbr;
+             timeout_tick = NetARP_ReqTimeoutPend_tick;
+             break;
+    }
+    CPU_CRITICAL_EXIT();
+
+    if (p_cache->ReqAttemptsCtr >= th_max) {                    /* If nbr attempts >= max, free ARP cache.              */
+        NetCache_Remove((NET_CACHE_ADDR *)p_arp, DEF_NO);
+        return;
+    }
+
+                                                                /* ------------------ RETRY ARP REQ ------------------- */
+    CPU_CRITICAL_ENTER();
+    timeout_tick   = NetARP_ReqTimeoutPend_tick;
+    CPU_CRITICAL_EXIT();
+    p_cache->TmrPtr = NetTmr_Get((CPU_FNCT_PTR) NetARP_CacheReqTimeout,
+                                (void       *) p_cache,
+                                (NET_TMR_TICK) timeout_tick,
+                                (CPU_INT16U  ) NET_TMR_FLAG_NONE,
+                                (NET_ERR    *)&err);
+    if (err != NET_TMR_ERR_NONE) {                              /* If tmr unavail, free ARP cache.                      */
+        NetCache_Remove((NET_CACHE_ADDR *)p_arp, DEF_NO);
+        return;
+    }
+
+                                                                /* ------------------ RE-TX ARP REQ ------------------- */
+    NetARP_TxReq(p_arp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetARP_CacheRenewTimeout()
+*
+* Description : Renew an ARP cache in the 'RESOLVED' state on timeout.
+*
+* Argument(s) : p_cache_timeout      Pointer to an ARP cache (see Note #2b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetARP_CacheAddResolved().
+*
+* Note(s)     : (1) RFC #1122, Section 2.3.2.1 states that "an implementation of the Address Resolution
+*                   Protocol (ARP) ... MUST provide a mechanism to flush out-of-date cache entries".
+*
+*               (2) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_ARP_CACHE' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (3) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetCache_AddrFree() via NetCache_Remove().
+*
+*                   (b) but do NOT re-free the timer.
+*********************************************************************************************************
+*/
+
+static  void  NetARP_CacheRenewTimeout (void  *p_cache_timeout)
+{
+    CPU_FNCT_PTR         fcnt;
+    NET_TMR_TICK         timeout_tick;
+    NET_ARP_CACHE       *p_cache;
+    NET_CACHE_ADDR_ARP  *p_arp;
+    CPU_BOOLEAN          tx_req;
+    NET_ERR              err;
+    CPU_SR_ALLOC();
+
+
+    p_cache = (NET_ARP_CACHE *)p_cache_timeout;                 /* See Note #2b2A.                                      */
+
+    p_cache->TmrPtr = DEF_NULL;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ARP CACHE ---------------- */
+    if (p_cache == (NET_ARP_CACHE *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+        return;
+    }
+
+    if (p_cache->Type != NET_CACHE_TYPE_ARP) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ARP.InvTypeCtr);
+        return;
+    }
+#endif
+
+    p_arp = (NET_CACHE_ADDR_ARP *)p_cache->CacheAddrPtr;
+
+    if ((CPU_INT32U)p_arp->AddrProtocolSender[0] != NET_ARP_PROTOCOL_TYPE_NONE) {
+        CPU_CRITICAL_ENTER();
+        timeout_tick = NetARP_ReqTimeoutRenew_tick;
+        CPU_CRITICAL_EXIT();
+
+        fcnt         = NetARP_CacheRenewTimeout;
+        tx_req       = DEF_YES;
+
+    } else {
+
+        NetCache_Remove((NET_CACHE_ADDR *)p_arp, DEF_NO);
+        return;
+    }
+
+
+                                                                /* ------------------ RETRY ARP REQ ------------------- */
+
+    p_cache->TmrPtr = NetTmr_Get(fcnt, p_cache, timeout_tick, NET_TMR_FLAG_NONE, &err);
+    if (err != NET_TMR_ERR_NONE) {                              /* If tmr unavail, free ARP cache.                      */
+                                                                /* Clr but do NOT free tmr (see Note #2).               */
+        NetCache_Remove((NET_CACHE_ADDR *)p_cache->CacheAddrPtr, DEF_NO);
+        return;
+    }
+
+    p_cache->State = NET_ARP_CACHE_STATE_RENEW;
+
+    if (tx_req == DEF_YES) {
+        NetARP_TxReq(p_cache->CacheAddrPtr);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* NET_ARP_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_arp.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_arp.h
new file mode 100644
index 0000000..235ae08
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_arp.h
@@ -0,0 +1,464 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK ARP LAYER
+*                                    (ADDRESS RESOLUTION PROTOCOL)
+*
+* Filename      : net_arp.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*********************************************************************************************************
+* Note(s)       : (1) Address Resolution Protocol ONLY required for network interfaces that require
+*                     network-address-to-hardware-address bindings (see RFC #826 'Abstract').
+*
+*                 (2) Supports Address Resolution Protocol as described in RFC #826 with the following
+*                     restrictions/constraints :
+*
+*                     (a) ONLY supports the following hardware types :
+*                         (1) 48-bit Ethernet
+*
+*                     (b) ONLY supports the following protocol types :
+*                         (1) 32-bit IP
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../../Source/net_cfg_net.h"
+#include  "../../Source/net_cache.h"
+#include  "../../Source/net_tmr.h"
+#include  "../../Source/net_buf.h"
+#include  "../../Source/net_err.h"
+#include  "../../Source/net_stat.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) ARP Layer module is required for some network interfaces (see 'net_arp.h  Note #1').
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_ARP_MODULE_PRESENT                                 /* See Note #2b.                                        */
+#define  NET_ARP_MODULE_PRESENT
+#ifdef   NET_ARP_MODULE_EN
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef NET_ARP_MODULE
+#define  NET_ARP_EXT
+#else
+#define  NET_ARP_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          ARP CACHE DEFINES
+*
+* Note(s) : (1) (a) RFC #1122, Section 2.3.2.2 states that "the link layer SHOULD save (rather than
+*                   discard) at least one ... packet of each set of packets destined to the same
+*                   unresolved IP address, and transmit the saved packet when the address has been
+*                   resolved."
+*
+*               (b) However, in order to avoid excessive discards, it seems reasonable that at least
+*                   two transmit packet buffers should be queued to a pending ARP cache.
+*********************************************************************************************************
+*/
+
+
+#define  NET_ARP_CACHE_TIMEOUT_DFLT_SEC          (10  *  DEF_TIME_NBR_SEC_PER_MIN)  /* Cache timeout dflt = 10 min      */
+
+
+#define  NET_ARP_REQ_RETRY_DFLT                            3
+#define  NET_ARP_CACHE_TX_Q_TH_DFLT                        2                        /* See Note #1b.                    */
+#define  NET_ARP_CACHE_ACCESSED_TH_MIN                    10
+#define  NET_ARP_CACHE_ACCESSED_TH_MAX                 65000
+#define  NET_ARP_CACHE_ACCESSED_TH_DFLT                  100
+#define  NET_ARP_REQ_RETRY_TIMEOUT_DFLT_SEC                5    /* ARP req retry timeout dflt =  5 sec                  */
+
+
+#define  NET_ARP_PROTOCOL_TYPE_NONE                   0x0000u
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          ARP CACHE STATES
+*
+*                          (1a)                            (1b)
+*                            ARP REQUEST                     ARP REPLY
+*              ----------    FETCHES NEW     -----------     RESOLVES       ------------
+*              |        |     ARP CACHE      |         |     ARP CACHE      |          |
+*              |  FREE  | -----------------> | PENDING | -----------------> | RESOLVED |
+*              |        |                    |         |                    |          |
+*              ----------  (1c)              -----------                    ------------
+*                 ^  ^       ARP REQUEST          |                               |
+*                 |  |        TIMES OUT           |                               |
+*                 |  |      AFTER RETRIES         |        (1d)                   |
+*                 |  ------------------------------          ARP CACHE            |
+*                 |                                          TIMES OUT            |
+*                 -----------------------------------------------------------------
+*
+*
+* Note(s) : (1) (a) ARP cache lookup fails to find the ARP cache with corresponding protocol address.
+*                   A new ARP cache is allocated from the ARP cache pool & inserted into the ARP Cache
+*                   List in the 'PENDING' state.  An ARP Request is generated & transmitted to resolve
+*                   the pending ARP cache.
+*
+*               (b) An ARP Reply resolves the pending ARP cache's hardware address.
+*
+*               (c) Alternatively, no corresponding ARP Reply is received after the maximum number of
+*                   ARP Request retries & the ARP cache is freed.
+*
+*               (d) ARP cache times out & is freed.
+*********************************************************************************************************
+*/
+
+typedef  enum  net_app_cache_state {
+    NET_ARP_CACHE_STATE_NONE,
+    NET_ARP_CACHE_STATE_FREE,
+    NET_ARP_CACHE_STATE_PEND,
+    NET_ARP_CACHE_STATE_RENEW,
+    NET_ARP_CACHE_STATE_RESOLVED
+} NET_ARP_CACHE_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                    ARP CACHE QUANTITY DATA TYPE
+*
+* Note(s) : (1) NET_ARP_CACHE_NBR_MAX  SHOULD be #define'd based on 'NET_ARP_CACHE_QTY' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_ARP_CACHE_QTY;                         /* Defines max qty of ARP caches to support.            */
+
+#define  NET_ARP_CACHE_NBR_MIN                             1
+#define  NET_ARP_CACHE_NBR_MAX           DEF_INT_16U_MAX_VAL    /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                    ARP ADDRESS LENGTH DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_ARP_ADDR_LEN;
+
+
+/*
+*********************************************************************************************************
+*                                         ARP FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_FLAGS   NET_ARP_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                            ARP HEADER
+*
+* Note(s) : (1) See RFC #826, Section 'Packet Format' for ARP packet header format.
+*
+*           (2) See 'ARP HEADER / MESSAGE DEFINES'.
+*********************************************************************************************************
+*/
+
+                                                                        /* --------------- NET ARP HDR ---------------- */
+typedef  struct  net_arp_hdr {
+    CPU_INT16U      AddrHW_Type;                                        /* ARP pkt hw       type.                       */
+    CPU_INT16U      AddrProtocolType;                                   /* ARP pkt protocol type.                       */
+
+    CPU_INT08U      AddrHW_Len;                                         /* ARP pkt hw       addr len (in octets).       */
+    CPU_INT08U      AddrProtocolLen;                                    /* ARP pkt protocol addr len (in octets).       */
+
+    CPU_INT16U      OpCode;                                             /* ARP op code (see Note #2).                   */
+
+    CPU_INT08U      AddrHW_Sender[NET_IF_HW_ADDR_LEN_MAX];              /* Sender hw       addr.                        */
+
+                                                                        /* Sender protocol addr.                        */
+    CPU_INT08U      AddrProtocolSender[NET_IPv4_ADDR_SIZE];
+
+    CPU_INT08U      AddrHW_Target[NET_IF_HW_ADDR_LEN_MAX];              /* Target hw       addr.                        */
+
+                                                                        /* Target protocol addr.                        */
+    CPU_INT08U      AddrProtocolTarget[NET_IPv4_ADDR_SIZE];
+} NET_ARP_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                      ARP CACHE ENTRY DATA TYPE
+*
+*                                  NET_ARP_CACHE
+*                                 |-------------|
+*                                 | Cache Type  |
+*                      Previous   |-------------|
+*                       Cache <----------O      |
+*                                 |-------------|     Next
+*                                 |      O----------> Cache      Buffer Queue
+*                                 |-------------|                    Head       -------
+*                                 |      O------------------------------------> |     |
+*                                 |-------------|                               |     |
+*                                 |      O----------------------                -------
+*                                 |-------------|              |                  | ^
+*                                 |      O----------> Cache    |                  v |
+*                                 |-------------|     Timer    |                -------
+*                                 |  Hardware:  |              |                |     |
+*                                 |    Type     |              |                |     |
+*                                 |   Length    |              |                -------
+*                                 |   Address   |              |                  | ^
+*                                 |-------------|              | Buffer Queue     v |
+*                                 |  Protocol:  |              |     Tail       -------
+*                                 |    Type     |              ---------------> |     |
+*                                 |   Length    |                               |     |
+*                                 |   Address   |                               -------
+*                                 |-------------|
+*                                 |    Flags    |
+*                                 |-------------|
+*                                 |   Accessed  |
+*                                 |   Counter   |
+*                                 |-------------|
+*                                 |   Request   |
+*                                 |   Counter   |
+*                                 |-------------|
+*                                 |    State    |
+*                                 |-------------|
+*
+*
+* Note(s) : (1) Configured by the developer via 'net_cfg.h' & 'net_cfg_net.h' at compile time.
+*
+*               See 'net_arp.h  Note #2' & 'ARP HARDWARE & PROTOCOL DEFINES  Note #1' for supported
+*               hardware & protocol types.
+*********************************************************************************************************
+*/
+
+                                                                        /* --------------- NET ARP CACHE -------------- */
+typedef  struct  net_arp_cache  NET_ARP_CACHE;
+
+#ifdef NET_IPv4_MODULE_EN
+struct  net_arp_cache {
+    NET_CACHE_TYPE        Type;
+    NET_CACHE_ADDR_ARP   *CacheAddrPtr;                                 /* Ptr to ARP addr cache.                       */
+    NET_TMR              *TmrPtr;                                       /* Ptr to cache TMR.                            */
+    CPU_INT08U            ReqAttemptsCtr;                               /* ARP req attempts ctr.                        */
+    NET_ARP_CACHE_STATE   State;                                        /* ARP cache state.                             */
+    CPU_INT16U            Flags;                                        /* ARP cache flags.                             */
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+NET_ARP_EXT  CPU_INT16U      NetARP_CacheAccessedTh_nbr;                /* Nbr successful srch's to promote ARP cache.  */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+void               NetARP_CfgAddrFilterEn          (CPU_BOOLEAN          en);
+
+void               NetARP_TxReqGratuitous          (NET_PROTOCOL_TYPE    protocol_type,
+                                                    CPU_INT08U          *p_addr_protocol,
+                                                    NET_CACHE_ADDR_LEN   addr_protocol_len,
+                                                    NET_ERR             *p_err);
+
+                                                                                    /* ---------- CFG FNCTS ----------- */
+CPU_BOOLEAN         NetARP_CfgCacheTimeout         (CPU_INT16U           timeout_sec);
+
+
+CPU_BOOLEAN         NetARP_CfgCacheTxQ_MaxTh       (NET_BUF_QTY          nbr_buf_max);
+
+CPU_BOOLEAN         NetARP_CfgCacheAccessedTh      (CPU_INT16U           nbr_access);
+
+CPU_BOOLEAN         NetARP_CfgReqTimeout           (CPU_INT08U           timeout_sec);
+
+CPU_BOOLEAN         NetARP_CfgReqMaxRetries        (CPU_INT08U           max_nbr_retries);
+
+
+                                                                                    /* --------- STATUS FNCTS --------- */
+
+CPU_BOOLEAN         NetARP_IsAddrProtocolConflict  (NET_IF_NBR           if_nbr,
+                                                    NET_ERR             *p_err);
+
+NET_CACHE_ADDR_LEN  NetARP_CacheGetAddrHW          (NET_IF_NBR           if_nbr,
+                                                    CPU_INT08U          *p_addr_hw,
+                                                    NET_CACHE_ADDR_LEN   addr_hw_len_buf,
+                                                    CPU_INT08U          *p_addr_protocol,
+                                                    NET_CACHE_ADDR_LEN   addr_protocol_len,
+                                                    NET_ERR             *p_err);
+
+void               NetARP_CacheProbeAddrOnNet      (NET_PROTOCOL_TYPE    protocol_type,
+                                                    CPU_INT08U          *p_addr_protocol_sender,
+                                                    CPU_INT08U          *p_addr_protocol_target,
+                                                    NET_CACHE_ADDR_LEN   addr_protocol_len,
+                                                    NET_ERR             *p_err);
+
+                                                                                    /* ---- ARP CACHE STATUS FNCTS ---- */
+CPU_INT08U         NetARP_CacheCalcStat            (void);
+
+
+NET_STAT_POOL      NetARP_CachePoolStatGet         (void);
+
+void               NetARP_CachePoolStatResetMaxUsed(void);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+#ifdef NET_IPv4_MODULE_EN
+void  NetARP_Init        (NET_ERR             *p_err);
+
+void  NetARP_CacheHandler(NET_BUF             *p_buf,
+                          NET_ERR             *p_err);
+
+void  NetARP_CacheAddPend(NET_BUF             *p_buf,
+                          NET_BUF_HDR         *p_buf_hdr,
+                          CPU_INT08U          *p_addr_protocol,
+                          NET_ERR             *p_err);
+
+void  NetARP_CacheTimeout(void                *p_cache_timeout);
+
+void  NetARP_Rx          (NET_BUF             *p_buf,
+                          NET_ERR             *p_err);
+
+void  NetARP_TxReq       (NET_CACHE_ADDR_ARP  *p_cache);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#ifndef  NET_ARP_CFG_CACHE_NBR
+#error  "NET_ARP_CFG_CACHE_NBR                not #define'd in 'net_cfg.h' "
+#error  "                               [MUST be  >= NET_ARP_CACHE_NBR_MIN]"
+#error  "                               [     &&  <= NET_ARP_CACHE_NBR_MAX]"
+
+#elif  ((NET_ARP_CFG_CACHE_NBR < NET_ARP_CACHE_NBR_MIN) || \
+        (NET_ARP_CFG_CACHE_NBR > NET_ARP_CACHE_NBR_MAX))
+#error  "NET_ARP_CFG_NBR_CACHE          illegally #define'd in 'net_cfg.h' "
+#error  "                               [MUST be  >= NET_ARP_CACHE_NBR_MIN]"
+#error  "                               [     &&  <= NET_ARP_CACHE_NBR_MAX]"
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#endif  /* NET_ARP_MODULE_EN      */
+#endif  /* NET_ARP_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_icmpv4.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_icmpv4.c
new file mode 100644
index 0000000..4d51d87
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_icmpv4.c
@@ -0,0 +1,3355 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK ICMP V4 LAYER
+*                                 (INTERNET CONTROL MESSAGE PROTOCOL)
+*
+* Filename      : net_icmpv4.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 SL
+*********************************************************************************************************
+* Note(s)       : (1) Supports Internet Control Message Protocol as described in RFC #792 with the following
+*                     restrictions/constraints :
+*
+*                     (a) Does NOT support IP forwarding/routing               RFC #1122, Section 3.3.1
+*
+*                     (b) Does NOT support ICMP Address Mask Agent/Server      RFC #1122, Section 3.2.2.9
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_ICMPv4_MODULE
+
+#include  "../../Source/net_cfg_net.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'net_icmpv4.h  MODULE'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_ICMPv4_MODULE_EN
+
+
+#include  "net_icmpv4.h"
+#include  "net_ipv4.h"
+#include  "../../IF/net_if.h"
+#include  "../../Source/net_icmp.h"
+#include  "../../Source/net_stat.h"
+#include  "../../Source/net_util.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       ICMPv4 MESSAGE DEFINES
+*********************************************************************************************************
+*/
+
+
+#define  NET_ICMPv4_HDR_SIZE_TS                           20
+#define  NET_ICMPv4_HDR_SIZE_ADDR_MASK                    12
+
+
+#define  NET_ICMPv4_HDR_NBR_OCTETS_UNUSED                  4
+#define  NET_ICMPv4_HDR_NBR_OCTETS_UNUSED_PARAM_PROB       3
+
+
+#define  NET_ICMPv4_MSG_ERR_HDR_SIZE_MIN               NET_IPv4_HDR_SIZE_MIN
+#define  NET_ICMPv4_MSG_ERR_HDR_SIZE_MAX               NET_IPv4_HDR_SIZE_MAX
+
+#define  NET_ICMPv4_MSG_ERR_DATA_SIZE_MIN_BITS            64                    /* See RFC #1122, Section 3.2.2.        */
+#define  NET_ICMPv4_MSG_ERR_DATA_SIZE_MIN_OCTETS      (((NET_ICMPv4_MSG_ERR_DATA_SIZE_MIN_BITS - 1) / DEF_OCTET_NBR_BITS) + 1)
+
+#define  NET_ICMPv4_MSG_ERR_LEN_MIN                     (NET_ICMPv4_MSG_ERR_HDR_SIZE_MIN  + NET_ICMPv4_MSG_ERR_DATA_SIZE_MIN_OCTETS)
+#define  NET_ICMPv4_MSG_ERR_LEN_MAX                     (NET_ICMPv4_MSG_ERR_HDR_SIZE_MAX  + NET_ICMPv4_MSG_ERR_DATA_SIZE_MIN_OCTETS)
+
+
+#define  NET_ICMPv4_MSG_LEN_MIN_DFLT                     NET_ICMPv4_HDR_SIZE_DFLT
+
+#define  NET_ICMPv4_MSG_LEN_MIN_DEST_UNREACH            (NET_ICMPv4_HDR_SIZE_DEST_UNREACH + NET_ICMPv4_MSG_ERR_LEN_MIN)
+#define  NET_ICMPv4_MSG_LEN_MIN_TIME_EXCEED             (NET_ICMPv4_HDR_SIZE_TIME_EXCEED  + NET_ICMPv4_MSG_ERR_LEN_MIN)
+#define  NET_ICMPv4_MSG_LEN_MIN_PARAM_PROB              (NET_ICMPv4_HDR_SIZE_PARAM_PROB   + NET_ICMPv4_MSG_ERR_LEN_MIN)
+#define  NET_ICMPv4_MSG_LEN_MIN_ECHO                     NET_ICMPv4_HDR_SIZE_ECHO
+#define  NET_ICMPv4_MSG_LEN_MIN_TS                       NET_ICMPv4_HDR_SIZE_TS
+#define  NET_ICMPv4_MSG_LEN_MIN_ADDR_MASK                NET_ICMPv4_HDR_SIZE_ADDR_MASK
+
+
+#define  NET_ICMPv4_MSG_LEN_MAX_NONE                     DEF_INT_16U_MAX_VAL
+
+#define  NET_ICMPv4_MSG_LEN_MAX_DEST_UNREACH             NET_ICMPv4_MSG_LEN_MAX_NONE
+#define  NET_ICMPv4_MSG_LEN_MAX_TIME_EXCEED              NET_ICMPv4_MSG_LEN_MAX_NONE
+#define  NET_ICMPv4_MSG_LEN_MAX_PARAM_PROB               NET_ICMPv4_MSG_LEN_MAX_NONE
+#define  NET_ICMPv4_MSG_LEN_MAX_ECHO                     NET_ICMPv4_MSG_LEN_MAX_NONE
+#define  NET_ICMPv4_MSG_LEN_MAX_TS                       NET_ICMPv4_HDR_SIZE_TS
+#define  NET_ICMPv4_MSG_LEN_MAX_ADDR_MASK                NET_ICMPv4_HDR_SIZE_ADDR_MASK
+
+#define  NET_ICMPv4_MSG_PTR_MIN_PARAM_PROB               NET_ICMPv4_MSG_LEN_MIN_DFLT
+
+
+/*
+*********************************************************************************************************
+*                                       ICMPv4 POINTER DEFINES
+*
+* Note(s) : (1) RFC #791 & RFC #792 define a pointer (PTR) as an index (IX) into an option or message :
+*
+*               (a) RFC #791, Section 3.1 'Options : Loose/Strict Source & Record Route'
+*               (b) RFC #791, Section 3.1 'Options : Internet Timestamp'
+*               (c) RFC #792,             'Parameter Problem Message'
+*
+*           (2) ICMPv4 Parameter Problem Message pointer validation currently ONLY supports the following
+*               protocols :
+*
+*               (a) IP
+*
+*           (3) The following pointer/indices abbreviated to enforce ANSI-compliance of 31-character
+*               symbol length uniqueness :
+*
+*               (a) 'NET_ICMPv4_PTR_IX_IP_HDR'   abbreviated to 'NET_ICMPv4_PTR_IX_IP'
+*               (b) 'NET_ICMPv4_PTR_IX_ICMP_MSG' abbreviated to 'NET_ICMPv4_PTR_IX_ICMP'
+*********************************************************************************************************
+*/
+                                                                                /* -------- ICMPv4 MSG PTR IXs -------- */
+#define  NET_ICMPv4_PTR_IX_ICMP_BASE                       0
+
+#define  NET_ICMPv4_PTR_IX_ICMP_TYPE                       0
+#define  NET_ICMPv4_PTR_IX_ICMP_CODE                       1
+#define  NET_ICMPv4_PTR_IX_ICMP_CHK_SUM                    2
+
+#define  NET_ICMPv4_PTR_IX_ICMP_PTR                        4
+#define  NET_ICMPv4_PTR_IX_ICMP_UNUSED                     4
+#define  NET_ICMPv4_PTR_IX_ICMP_UNUSED_PARAM_PROB          5
+
+
+/*
+*********************************************************************************************************
+*                                         ICMPv4 FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------- NET ICMPv4 FLAGS ----------------- */
+#define  NET_ICMPv4_FLAG_NONE                     DEF_BIT_NONE
+#define  NET_ICMPv4_FLAG_USED                     DEF_BIT_00    /* ICMPv4 entry cur used; i.e. NOT in free pool.        */
+
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       ICMPv4 FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_FLAGS   NET_ICMPv4_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                            ICMPv4 HEADER
+*
+* Note(s) : (1) See RFC #792 for ICMP message header formats.
+*
+*           (2) ICMP 'Redirect' & 'Router' messages are NOT supported (see 'net_icmp.h  Note #1').
+*********************************************************************************************************
+*/
+
+                                                                        /* -------------- NET ICMPv4 HDR -------------- */
+typedef  struct  net_ICMPv4_hdr {
+    CPU_INT08U      Type;                                               /* ICMPv4 msg type.                             */
+    CPU_INT08U      Code;                                               /* ICMPv4 msg code.                             */
+    CPU_INT16U      ChkSum;                                             /* ICMPv4 msg chk sum.                          */
+} NET_ICMPv4_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                         ICMPv4 ERROR HEADER
+*
+* Note(s) : (1) See RFC #792, Sections 'Destination Unreachable Message', 'Source Quench Message', 'Time
+*               Exceeded Message' for ICMP 'Error Message' header format.
+*
+*           (2) 'Unused' field MUST be cleared (i.e. ALL 'Unused' field octets MUST be set to 0x00).
+*********************************************************************************************************
+*/
+
+                                                                        /* ------------ NET ICMPv4 ERR HDR ------------ */
+typedef  struct  net_ICMPv4_hdr_err {
+    CPU_INT08U      Type;                                               /* ICMPv4 msg type.                             */
+    CPU_INT08U      Code;                                               /* ICMPv4 msg code.                             */
+    CPU_INT16U      ChkSum;                                             /* ICMPv4 msg chk sum.                          */
+
+    CPU_INT08U      Unused[NET_ICMPv4_HDR_NBR_OCTETS_UNUSED];           /* See Note #2.                                 */
+
+    CPU_INT08U      Data[NET_ICMPv4_MSG_ERR_LEN_MAX];
+} NET_ICMPv4_HDR_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                   ICMPv4 PARAMETER PROBLEM HEADER
+*
+* Note(s) : (1) See RFC #792, Section 'Parameter Problem Message' for ICMP 'Parameter Problem Message'
+*               header format.
+*
+*           (2) 'Unused' field MUST be cleared (i.e. ALL 'Unused' field octets MUST be set to 0x00).
+*********************************************************************************************************
+*/
+
+                                                                        /* --------- NET ICMPv4 PARAM PROB HDR -------- */
+typedef  struct  net_ICMPv4_hdr_param_prob {
+    CPU_INT08U      Type;                                               /* ICMPv4 msg type.                             */
+    CPU_INT08U      Code;                                               /* ICMPv4 msg code.                             */
+    CPU_INT16U      ChkSum;                                             /* ICMPv4 msg chk sum.                          */
+
+    CPU_INT08U      Ptr;                                                /* Ptr into ICMPv4 err msg.                     */
+    CPU_INT08U      Unused[NET_ICMPv4_HDR_NBR_OCTETS_UNUSED_PARAM_PROB];/* See Note #2.                                 */
+
+    CPU_INT08U      Data[NET_ICMPv4_MSG_ERR_LEN_MAX];
+} NET_ICMPv4_HDR_PARAM_PROB;
+
+
+/*
+*********************************************************************************************************
+*                                 ICMPv4 ECHO REQUEST/REPLY HEADER
+*
+* Note(s) : (1) See RFC #792, Section 'Echo or Echo Reply Message' for ICMP 'Echo Request/Reply Message'
+*               header format.
+*
+*           (2) 'Data' declared with 1 entry; prevents removal by compiler optimization.
+*********************************************************************************************************
+*/
+
+                                                                        /* ------ NET ICMPv4 ECHO REQ/REPLY HDR ------- */
+typedef  struct  net_ICMPv4_hdr_echo {
+    CPU_INT08U      Type;                                               /* ICMPv4 msg type.                             */
+    CPU_INT08U      Code;                                               /* ICMPv4 msg code.                             */
+    CPU_INT16U      ChkSum;                                             /* ICMPv4 msg chk sum.                          */
+
+    CPU_INT16U      ID;                                                 /* ICMPv4 msg ID.                               */
+    CPU_INT16U      SeqNbr;                                             /* ICMPv4 seq nbr.                              */
+
+    CPU_INT08U      Data[1];                                            /* ICMPv4 msg data (see Note #2).               */
+} NET_ICMPv4_HDR_ECHO;
+
+
+/*
+*********************************************************************************************************
+*                                  ICMPv4 INTERNET TIMESTAMP HEADER
+*
+* Note(s) : (1) See RFC #792, Section 'Timestamp or Timestamp Reply Message' for ICMP 'Internet Timestamp
+*               Message' header format.
+*********************************************************************************************************
+*/
+
+                                                                        /* ------- NET ICMPv4 TS REQ/REPLY HDR -------- */
+typedef  struct  net_ICMPv4_hdr_ts {
+    CPU_INT08U      Type;                                               /* ICMPv4 msg type.                             */
+    CPU_INT08U      Code;                                               /* ICMPv4 msg code.                             */
+    CPU_INT16U      ChkSum;                                             /* ICMPv4 msg chk sum.                          */
+
+    CPU_INT16U      ID;                                                 /* ICMPv4 msg ID.                               */
+    CPU_INT16U      SeqNbr;                                             /* ICMPv4 seq nbr.                              */
+
+    NET_TS          TS_Originate;                                       /* TS @ req tx.                                 */
+    NET_TS          TS_Rx;                                              /* TS @ target rx.                              */
+    NET_TS          TS_Tx;                                              /* TS @ target tx.                              */
+} NET_ICMPv4_HDR_TS;
+
+
+/*
+*********************************************************************************************************
+*                              ICMPv4 ADDRESS MASK REQUEST/REPLY HEADER
+*
+* Note(s) : (1) See RFC #950, Appendix I 'Address Mask ICMP' for ICMP 'Address Mask Request/Reply Message'
+*               header format.
+*********************************************************************************************************
+*/
+
+                                                                        /* ---- NET ICMPv4 ADDR MASK REQ/REPLY HDR ---- */
+typedef  struct  net_ICMPv4_hdr_addr_mask {
+    CPU_INT08U      Type;                                               /* ICMPv4 msg type.                             */
+    CPU_INT08U      Code;                                               /* ICMPv4 msg code.                             */
+    CPU_INT16U      ChkSum;                                             /* ICMPv4 msg chk sum.                          */
+
+    CPU_INT16U      ID;                                                 /* ICMPv4 msg ID.                               */
+    CPU_INT16U      SeqNbr;                                             /* ICMPv4 seq nbr.                              */
+
+    NET_IPv4_ADDR   AddrMask;                                           /* Addr mask.                                   */
+} NET_ICMPv4_HDR_ADDR_MASK;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+static    CPU_INT16U               NetICMPv4_TxSeqNbrCtr;         /* Global tx seq nbr field ctr.                       */
+
+
+/*
+*********************************************************************************************************
+*                                     NET_ICMPv4_TX_GET_SEQ_NBR()
+*
+* Description : Get next ICMPv4 transmit message sequence number.
+*
+* Argument(s) : seq_nbr     Variable that will receive the returned ICMPv4 transmit message sequence number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_TxMsgReq().
+*
+*               This macro is an INTERNAL network protocol suite macro & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Return ICMP sequence number is NOT converted from host-order to network-order.
+*********************************************************************************************************
+*/
+
+#define  NET_ICMPv4_TX_GET_SEQ_NBR(seq_nbr)     do { NET_UTIL_VAL_COPY_16(&(seq_nbr), &NetICMPv4_TxSeqNbrCtr); \
+                                                     NetICMPv4_TxSeqNbrCtr++;                                } while (0)
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                    /* ------------------- RX FNCTS ------------------- */
+static  void                       NetICMPv4_RxReplyDemux             (NET_BUF                 *p_buf,
+                                                                       NET_BUF_HDR             *p_buf_hdr,
+                                                                       NET_ICMPv4_HDR          *p_icmp_hdr,
+                                                                       NET_ERR                 *p_err);
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void                       NetICMPv4_RxPktValidateBuf         (NET_BUF_HDR             *p_buf_hdr,
+                                                                       NET_ERR                 *p_err);
+#endif /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+
+static  void                       NetICMPv4_RxPktValidate            (NET_BUF                 *p_buf,
+                                                                       NET_BUF_HDR             *p_buf_hdr,
+                                                                       NET_ICMPv4_HDR          *p_icmp_hdr,
+                                                                       NET_ERR                 *p_err);
+
+static  void                       NetICMPv4_RxPktFree                (NET_BUF                 *p_buf);
+
+static  void                       NetICMPv4_RxPktDiscard             (NET_BUF                 *p_buf,
+                                                                       NET_ERR                 *p_err);
+
+
+                                                                    /* ------------------- TX FNCTS ------------------- */
+
+static  NET_ICMPv4_REQ_ID_SEQ      NetICMPv4_TxMsgReqHandler          (CPU_INT08U               type,
+                                                                       CPU_INT08U               code,
+                                                                       CPU_INT16U               id,
+                                                                       NET_IPv4_ADDR            addr_src,
+                                                                       NET_IPv4_ADDR            addr_dest,
+                                                                       NET_IPv4_TOS             TOS,
+                                                                       NET_IPv4_TTL             TTL,
+                                                                       NET_IPv4_FLAGS           flags,
+                                                                       void                    *p_opts,
+                                                                       void                    *p_data,
+                                                                       CPU_INT16U               data_len,
+                                                                       NET_ERR                 *p_err);
+
+static  void                       NetICMPv4_TxMsgErrValidate         (NET_BUF                 *p_buf,
+                                                                       NET_BUF_HDR             *p_buf_hdr,
+                                                                       NET_IPv4_HDR            *p_ip_hdr,
+                                                                       CPU_INT08U               type,
+                                                                       CPU_INT08U               code,
+                                                                       CPU_INT08U               ptr,
+                                                                       NET_ERR                 *p_err);
+
+
+static  void                       NetICMPv4_TxMsgReqValidate         (CPU_INT08U               type,
+                                                                       CPU_INT08U               code,
+                                                                       NET_ERR                 *p_err);
+
+
+static  void                       NetICMPv4_TxReqReply               (NET_BUF                 *p_buf,
+                                                                       NET_BUF_HDR             *p_buf_hdr,
+                                                                       NET_ICMPv4_HDR          *p_icmp_hdr,
+                                                                       NET_ERR                 *p_err);
+
+static  void                       NetICMPv4_TxIxDataGet              (NET_IF_NBR                 if_nbr,
+                                                                       CPU_INT32U                 data_len,
+                                                                       CPU_INT16U                *p_ix,
+                                                                       NET_ERR                   *p_err);
+
+static  void                       NetICMPv4_TxPktFree                (NET_BUF                 *p_buf);
+
+static  void                       NetICMPv4_TxPktDiscard             (NET_BUF                 *p_buf,
+                                                                       NET_ERR                 *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          NetICMPv4_Init()
+*
+* Description : (1) Initialize Internet Control Message Protocol Layer V6 :
+*
+*                   (a) Initialize ICMP transmit sequence number counter
+*
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_ICMPv4_ERR_NONE     ICMPv4 module successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetICMPv4_Init (NET_ERR  *p_err)
+{
+                                                                    /* ----------- INIT ICMPv4 TX SEQ NBR CTR ----------- */
+    NetICMPv4_TxSeqNbrCtr = 0u;
+
+   *p_err = NET_ICMPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetICMPv4_Rx()
+*
+* Description : (1) Process received messages :
+*
+*                   (a) Validate ICMPv4 packet
+*                   (b) Demultiplex ICMPv4 message
+*                   (c) Free ICMPv4 packet
+*                   (d) Update receive statistics
+*
+*               (2) Although ICMPv4 data units are typically referred to as 'messages' (see RFC #792, Section
+*                   'Introduction'), the term 'ICMP packet' (see RFC #1983, 'packet') is used for ICMP
+*                   Receive until the packet is validated as an ICMPv4 message.
+*
+*
+* Argument(s) : p_buf   Pointer to network buffer that received ICMPv4 packet.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_ICMPv4_ERR_NONE     Message successfully received and processed.
+*
+*                           -RETURNED BY NetICMPv4_RxPktValidate()-
+*                           See NetICMPv4_RxPktValidate() for additional return error codes.
+*
+*                           -RETURNED BY NetICMPv4_TxReqReply()-
+*                           See NetICMPv4_TxReqReply() for additional return error codes.
+*
+*                           -RETURNED BY NetICMPv4_RxPktDiscard()-
+*                           See NetICMPv4_RxPktDiscard() for additional return error codes.
+*
+*                           -RETURNED BY NetICMPv4_RxPktValidateBuf()-
+*                           See NetICMPv4_RxPktValidateBuf() for additional return error codes.
+*
+*                           -RETURNED BY NetICMPv4_RxReplyDemux()-
+*                           See NetICMPv4_RxReplyDemux() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_RxPktDemuxDatagram().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (3) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetICMPv4_Rx (NET_BUF  *p_buf,
+                    NET_ERR  *p_err)
+{
+    NET_BUF_HDR     *p_buf_hdr;
+    NET_ICMPv4_HDR  *p_icmp_hdr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetICMPv4_RxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.RxMsgCtr);
+
+
+                                                                /* ------------- VALIDATE RX'D ICMPv4 PKT ------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetICMPv4_RxPktValidateBuf(p_buf_hdr, p_err);               /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_ICMPv4_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetICMPv4_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+#endif
+    p_icmp_hdr = (NET_ICMPv4_HDR *)&p_buf->DataPtr[p_buf_hdr->ICMP_MsgIx];
+    NetICMPv4_RxPktValidate(p_buf,                              /* Validate rx'd pkt.                                   */
+                            p_buf_hdr,
+                            p_icmp_hdr,
+                            p_err);
+
+
+                                                                /* ------------------ DEMUX ICMP MSG ------------------ */
+    switch (*p_err) {
+        case NET_ICMPv4_ERR_MSG_TYPE_REQ:
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.RxMsgReqCtr);
+             NetICMPv4_TxReqReply(p_buf, p_buf_hdr, p_icmp_hdr, p_err);
+             break;
+
+
+        case NET_ICMPv4_ERR_MSG_TYPE_REPLY:
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.RxMsgReplyCtr);
+             NetICMPv4_RxReplyDemux(p_buf, p_buf_hdr, p_icmp_hdr, p_err);
+             break;
+
+
+        case NET_ICMPv4_ERR_MSG_TYPE_ERR:
+                                                                /* See Note #3a.                                        */
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.RxMsgErrCtr);
+             break;
+
+        case NET_ICMPv4_ERR_RX_BROADCAST:
+        case NET_ICMPv4_ERR_RX_MCAST:
+        case NET_ICMPv4_ERR_INVALID_TYPE:
+        case NET_ICMPv4_ERR_INVALID_CODE:
+        case NET_ICMPv4_ERR_INVALID_PTR:
+        case NET_ICMPv4_ERR_INVALID_LEN:
+        case NET_ICMPv4_ERR_INVALID_LEN_DATA:
+        case NET_ICMPv4_ERR_INVALID_CHK_SUM:
+        default:
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.RxMsgUnknownCtr);
+             NetICMPv4_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                /* -------- FREE ICMPv4 PKT / UPDATE RX STATS --------- */
+    switch (*p_err) {                                           /* Chk err from NetICMPv4_TxMsg&&&().                   */
+        case NET_ICMPv4_ERR_NONE:
+             NetICMPv4_RxPktFree(p_buf);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.RxMsgCompCtr);
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+             NetICMPv4_RxPktFree(p_buf);
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxPktDiscardedCtr);
+            *p_err = NET_ERR_RX;
+             return;
+
+
+        case NET_ICMPv4_ERR_RX_REPLY:
+        default:
+             NetICMPv4_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+   *p_err = NET_ICMPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetICMPv4_TxEchoReq()
+*
+* Description : Transmit ICMPv4 echo request message.
+*
+* Argument(s) : p_addr_dest     Pointer to IPv4 destination address to send the ICMP echo request.
+*
+*               id              ID that will be send as the ICMP echo request ID.
+*
+*               p_data          Pointer to the data buffer to include in the ICMP echo request.
+*
+*               data_len        Number of data buffer octets to include in the ICMP echo request.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_ICMPv4_ERR_NONE     ICMPv4 Echo request successfully sent.
+*
+*                                   ------------- RETURNED BY NetICMPv4_TxMsgReq() -------------
+*                                   See NetICMPv4_TxMsgReq() for additional return error codes.
+*
+* Return(s)   : ICMPv4 echo request sequence number, if NO error(s).
+*
+*               NET_ICMPv4_REQ_SEQ_NONE, otherwise.
+*
+* Caller(s)   : NetICMP_TxEchoReq().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U   NetICMPv4_TxEchoReq (NET_IPv4_ADDR  *p_addr_dest,
+                                  CPU_INT16U      id,
+                                  void           *p_data,
+                                  CPU_INT16U      data_len,
+                                  NET_ERR        *p_err)
+{
+    NET_IPv4_ADDR           addr_dest;
+    NET_IPv4_ADDR           addr_src;
+    NET_ICMPv4_REQ_ID_SEQ   id_seq;
+
+
+    id_seq.ID     = id;
+    id_seq.SeqNbr = NET_ICMPv4_REQ_SEQ_NONE;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_dest == (NET_IPv4_ADDR *)0) {                    /* ---------------- VALIDATE ADDR PTR ----------------- */
+       *p_err = NET_ICMPv4_ERR_INVALID_PTR;
+        return (NET_ICMPv4_REQ_SEQ_NONE);
+    }
+
+    if ((data_len >  0u)       &&
+        (p_data   == DEF_NULL)) {
+        *p_err = NET_ICMPv4_ERR_INVALID_PTR;
+         return (NET_ICMPv4_REQ_SEQ_NONE);
+    }
+#endif
+                                                                /* ---------------- SET DEST IP ADDR ------------------ */
+    Mem_Copy(&addr_dest, p_addr_dest, sizeof(NET_IPv4_ADDR));
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetICMPv4_TxEchoReq, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return (0u);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit tx (see Note #2).         */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+                                                                /* ----------------- SET SRC IP ADDR ------------------ */
+    addr_src = NetIPv4_GetAddrSrcHandler(addr_dest);
+
+
+                                                                /* ------------------ TX ICMPv4 REQ ------------------- */
+    id_seq = NetICMPv4_TxMsgReqHandler(NET_ICMPv4_MSG_TYPE_ECHO_REQ,
+                                       NET_ICMPv4_MSG_CODE_ECHO_REQ,
+                                       id,
+                                       addr_src,
+                                       addr_dest,
+                                       NET_IPv4_HDR_TOS_NONE,
+                                       NET_IPv4_HDR_TTL_MAX,
+                                       NET_IPv4_FLAG_NONE,
+                                       DEF_NULL,
+                                       p_data,
+                                       data_len,
+                                       p_err);
+    if (*p_err != NET_ICMPv4_ERR_NONE) {
+         goto exit_release;
+    }
+
+   *p_err = NET_ICMPv4_ERR_NONE;
+
+exit_release:
+    Net_GlobalLockRelease();
+    return (id_seq.SeqNbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetICMPv4_TxMsgErr()
+*
+* Description : (1) Transmit ICMPv4 Error Message in response to received packet with one or more errors :
+*
+*                   (a) Validate ICMPv4 Error Message
+*
+*                   (b) Get buffer for ICMPv4 Error Message :
+*
+*                       (1) Calculate  ICMPv4 Error Message buffer size
+*                       (2) Copy received packet's IP header & data into ICMPv4 Error Message
+*                       (3) Initialize ICMPv4 Error Message buffer controls
+*
+*                   (c) Prepare ICMPv4 Error Message :
+*
+*                       (1) Type                           See 'net_icmpv4.h  ICMP MESSAGE TYPES & CODES'
+*                       (2) Code                           See 'net_icmpv4.h  ICMP MESSAGE TYPES & CODES'
+*                       (3) Pointer
+*                       (4) Unused
+*                       (5) Check-Sum
+*
+*                   (d) Transmit ICMPv4 Error Message
+*
+*                       (1) RFC #1122, Section 3.2.2 specifies that "an ICMP error message SHOULD be sent
+*                           with normal (i.e., zero) TOS bits".  RFC #1349, Section 5.1 confirms that "an
+*                           ICMP error message is always sent with the default TOS (0000)".
+*
+*                   (e) Free ICMPv4 Error Message buffer
+*                   (f) Update transmit statistics
+*
+*
+* Argument(s) : p_buf   Pointer to network buffer that received a packet with error(s).
+*
+*               type    ICMPv4 Error Message type (see Note #1c1) :
+*                       NET_ICMPv4_MSG_TYPE_DEST_UNREACH
+*                       NET_ICMPv4_MSG_TYPE_TIME_EXCEED
+*                       NET_ICMPv4_MSG_TYPE_PARAM_PROB
+*
+*               code    ICMPv4 Error Message code (see Note #1c2).
+*
+*               ptr     Pointer to received packet's ICMPv4 error (optional).
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_ICMPv4_ERR_NONE             ICMPv4 Error Message successfully transmitted.
+*
+*                           ---------------------- RETURNED BY NetIPv4_Tx()-----------------------
+*                           See NetIPv4_Tx() for additional return error codes.
+*
+*                           ---------------- RETURNED BY NetICMPv4_TxPktDiscard() ----------------
+*                           See NetICMPv4_TxPktDiscard() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_RxPktFragTimeout(),
+*               NetIPv4_RxPktValidate(),
+*               NetIPv4_RxPktValidateOpt(),
+*               NetTCP_RxPktDemuxSeg(),
+*               NetUDP_Rx().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (2) (a) The following IPv4 header fields MUST be decoded &/or converted from network-order to host-
+*                       order BEFORE any ICMPv4 Error Messages are transmitted (see 'net_ip.c  NetIP_RxPktValidate()
+*                       Note #3') :
+*
+*                       (1) Header Length
+*                       (2) Total  Length
+*                       (3) Source      Address
+*                       (4) Destination Address
+*
+*                   (b) The following IPv4 header fields were NOT previously decoded &/or converted from network-
+*                       order to host-order & are NOT available :
+*
+*                       (1) IP Data Length
+*
+*               (3) Default case already invalidated in NetICMPv4_TxMsgErrValidate().  However, the default
+*                   case is included as an extra precaution in case 'type' is incorrectly modified.
+*
+*               (4) Assumes network buffer's protocol header size is large enough to accommodate ICMP header
+*                   size (see 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1').
+*
+*               (5) Some buffer controls were previously initialized in NetBuf_Get() when the buffer
+*                   was allocated earlier in this function.  These buffer controls do NOT need to be
+*                   re-initialized but are shown for completeness.
+*
+*               (6) (a) ICMPv4 message Check-Sum MUST be calculated AFTER the entire ICMPv4 message has been
+*                       prepared.  In addition, ALL multi-octet words are converted from host-order to
+*                       network-order since "the sum of 16-bit integers can be computed in either byte
+*                       order" [RFC #1071, Section 2.(B)].
+*
+*                   (b) ICMPv4 message Check-Sum field MUST be cleared to '0' BEFORE the ICMP message Check-Sum
+*                       is calculated (see RFC #792, Sections 'Destination Unreachable Message : Checksum',
+*                       'Time Exceeded Message : Checksum', 'Source Quench Message : Checksum', & 'Parameter
+*                       Problem Message : Checksum').
+*
+*                   (c) The ICMPv4 message Check-Sum field is returned in network-order & MUST NOT be re-converted
+*                       back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumHdrCalc()  Note #3b').
+*
+*               (7) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetICMPv4_TxMsgErr (NET_BUF     *p_buf,
+                          CPU_INT08U   type,
+                          CPU_INT08U   code,
+                          CPU_INT08U   ptr,
+                          NET_ERR     *p_err)
+{
+    NET_BUF_HDR                *p_buf_hdr;
+    NET_IPv4_HDR               *p_ip_hdr;
+    NET_BUF                    *p_msg_err;
+    NET_BUF_HDR                *p_msg_err_hdr;
+    NET_ICMPv4_HDR_ERR         *p_icmp_hdr_err;
+    NET_ICMPv4_HDR_PARAM_PROB  *p_icmp_hdr_param_prob;
+    CPU_INT16U                  msg_size_hdr;
+    CPU_INT16U                  msg_size_data_ip;
+    CPU_INT16U                  msg_size_data;
+    CPU_INT16U                  msg_size_tot;
+    CPU_INT16U                  msg_ix;
+    CPU_INT16U                  msg_ix_offset;
+    CPU_INT16U                  msg_ix_data;
+    CPU_INT16U                  msg_chk_sum;
+    NET_ERR                     err;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                               (NET_ERR *)p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+
+                                                                /* ------------ VALIDATE ICMPv4 TX ERR MSG ------------ */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_buf_hdr->IP_HdrIx == NET_BUF_IX_NONE) {
+        NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                               (NET_ERR *)p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvalidBufIxCtr);
+        return;
+    }
+#endif
+    p_ip_hdr = (NET_IPv4_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+
+
+    NetICMPv4_TxMsgErrValidate(p_buf, p_buf_hdr, p_ip_hdr, type, code, ptr, &err);
+    if (err != NET_ICMPv4_ERR_NONE) {
+        NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                               (NET_ERR *)p_err);
+        return;
+    }
+
+
+                                                                /* -------------- GET ICMPv4 ERR MSG BUF -------------- */
+                                                                /* Calc err msg buf size.                               */
+    switch (type) {
+        case NET_ICMPv4_MSG_TYPE_DEST_UNREACH:
+             msg_size_hdr = NET_ICMPv4_HDR_SIZE_DEST_UNREACH;
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_TIME_EXCEED:
+             msg_size_hdr = NET_ICMPv4_HDR_SIZE_TIME_EXCEED;
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_PARAM_PROB:
+             msg_size_hdr = NET_ICMPv4_HDR_SIZE_PARAM_PROB;
+             break;
+
+
+        default:                                                /* See Note #3.                                         */
+             NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                                    (NET_ERR *)p_err);
+             return;
+    }
+
+
+    if (p_buf_hdr->IP_TotLen >= p_buf_hdr->IP_HdrLen) {                     /* If IP tot len > IP hdr len &      ...    */
+        msg_size_data_ip = p_buf_hdr->IP_TotLen - p_buf_hdr->IP_HdrLen;     /* Calc IP data len (see Note #2b1).        */
+        if (msg_size_data_ip >= NET_ICMPv4_MSG_ERR_DATA_SIZE_MIN_OCTETS) {  /* ... ip data >= min ICMPv4 data len, ...  */
+                                                                            /* ... get max ICMPv4 err msg len.          */
+            msg_size_data = p_buf_hdr->IP_HdrLen + NET_ICMPv4_MSG_ERR_DATA_SIZE_MIN_OCTETS;
+        } else {                                                            /* Else get max IP tot len.                 */
+            msg_size_data = p_buf_hdr->IP_TotLen;
+        }
+    } else {                                                                /* Else get max IP tot len.                 */
+        msg_size_data = p_buf_hdr->IP_TotLen;
+    }
+
+    msg_size_tot = msg_size_hdr + msg_size_data;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+#if 0
+    if (NET_BUF_DATA_IX_TX < msg_size_hdr) {                    /* See Note #4.                                         */
+        NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                               (NET_ERR *)p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxInvalidBufIxCtr);
+        return;
+    }
+#endif
+#endif
+                                                                /* Get err msg buf.                                     */
+#if 0
+    msg_ix   = NET_BUF_DATA_IX_TX - msg_size_hdr;
+#else
+    msg_ix = 0u;
+    NetICMPv4_TxIxDataGet(p_buf_hdr->IF_Nbr,
+                          msg_size_tot,
+                         &msg_ix,
+                         &err);
+#endif
+
+    p_msg_err = NetBuf_Get((NET_IF_NBR     ) p_buf_hdr->IF_Nbr,
+                          (NET_TRANSACTION) NET_TRANSACTION_TX,
+                          (NET_BUF_SIZE   ) msg_size_tot,
+                          (NET_BUF_SIZE   ) msg_ix,
+                          (NET_BUF_SIZE  *)&msg_ix_offset,
+                          (NET_BUF_FLAGS  ) NET_BUF_FLAG_NONE,
+                          (NET_ERR       *)&err);
+    if (err != NET_BUF_ERR_NONE) {
+        NetICMPv4_TxPktDiscard(p_msg_err, p_err);
+        return;
+    }
+
+
+    msg_ix      += msg_ix_offset;
+    msg_ix_data  = msg_ix + msg_size_hdr;
+    NetBuf_DataWr((NET_BUF    *) p_msg_err,                     /* Copy rx'd IPv4 hdr & data into ICMPv4 err tx buf.    */
+                  (NET_BUF_SIZE) msg_ix_data,
+                  (NET_BUF_SIZE) msg_size_data,
+                  (CPU_INT08U *) p_ip_hdr,
+                  (NET_ERR    *)&err);
+    if (err != NET_BUF_ERR_NONE) {
+        NetICMPv4_TxPktDiscard(p_msg_err, p_err);
+        return;
+    }
+
+                                                                /* Init err msg buf ctrls.                              */
+    p_msg_err_hdr                        = &p_msg_err->Hdr;
+    p_msg_err_hdr->ICMP_MsgIx            = (CPU_INT16U  )msg_ix;
+    p_msg_err_hdr->ICMP_MsgLen           = (CPU_INT16U  )msg_size_tot;
+    p_msg_err_hdr->ICMP_HdrLen           = (CPU_INT16U  )msg_size_hdr;
+    p_msg_err_hdr->TotLen                = (NET_BUF_SIZE)p_msg_err_hdr->ICMP_MsgLen;
+    p_msg_err_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_ICMP_V4;
+    p_msg_err_hdr->ProtocolHdrTypeNetSub =  NET_PROTOCOL_TYPE_ICMP_V4;
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #5].                */
+    p_msg_err_hdr->DataIx                =  NET_BUF_IX_NONE;
+    p_msg_err_hdr->DataLen               =  0u;
+#endif
+
+
+
+
+                                                                /* -------------- PREPARE ICMPv4 ERR MSG -------------- */
+    switch (type) {
+        case NET_ICMPv4_MSG_TYPE_DEST_UNREACH:
+        case NET_ICMPv4_MSG_TYPE_TIME_EXCEED:
+             p_icmp_hdr_err       = (NET_ICMPv4_HDR_ERR *)&p_msg_err->DataPtr[p_msg_err_hdr->ICMP_MsgIx];
+             p_icmp_hdr_err->Type =  type;
+             p_icmp_hdr_err->Code =  code;
+                                                                            /* Clr unused octets.                       */
+             Mem_Clr((void     *)p_icmp_hdr_err->Unused,
+                     (CPU_SIZE_T)NET_ICMPv4_HDR_NBR_OCTETS_UNUSED);
+                                                                            /* Calc ICMPv4 msg chk sum (see Note #6).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_err->ChkSum, 0x0000u);     /* Clr             chk sum (see Note #6b).  */
+#ifdef NET_ICMP_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void     *) p_icmp_hdr_err,
+                                                             (CPU_INT16U) p_msg_err_hdr->ICMP_MsgLen,
+                                                             (NET_ERR  *)&err);
+#endif
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_err->ChkSum, &msg_chk_sum);   /* Copy chk sum in net order (see Note #6c).*/
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_PARAM_PROB:
+             p_icmp_hdr_param_prob       = (NET_ICMPv4_HDR_PARAM_PROB *)&p_msg_err->DataPtr[p_msg_err_hdr->ICMP_MsgIx];
+             p_icmp_hdr_param_prob->Type =  type;
+             p_icmp_hdr_param_prob->Code =  code;
+             p_icmp_hdr_param_prob->Ptr  =  ptr;
+                                                                                /* Clr unused octets.                   */
+             Mem_Clr((void     *)p_icmp_hdr_param_prob->Unused,
+                     (CPU_SIZE_T)NET_ICMPv4_HDR_NBR_OCTETS_UNUSED_PARAM_PROB);
+                                                                                /* Calc msg chk sum (see Note #6).      */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_param_prob->ChkSum, 0x0000u);  /* Clr      chk sum (see Note #6b).     */
+#ifdef NET_ICMP_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void     *) p_icmp_hdr_param_prob,
+                                                             (CPU_INT16U) p_msg_err_hdr->ICMP_MsgLen,
+                                                             (NET_ERR  *)&err);
+#endif
+                                                                                /* Copy chk sum in net order (see Note #6c).*/
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_param_prob->ChkSum, &msg_chk_sum);
+             break;
+
+
+        default:                                                /* See Note #3.                                         */
+             NetICMPv4_TxPktDiscard(p_msg_err, p_err);
+             return;
+    }
+
+    if (err != NET_UTIL_ERR_NONE) {                             /* Chk err from NetUtil_16BitOnesCplChkSumHdrCalc().    */
+        NetICMPv4_TxPktDiscard(p_msg_err, p_err);
+        return;
+    }
+
+
+
+                                                                /* ---------------- TX ICMPv4 ERR MSG ----------------- */
+    NetIPv4_Tx((NET_BUF      *)p_msg_err,
+               (NET_IPv4_ADDR )p_buf_hdr->IP_AddrDest,
+               (NET_IPv4_ADDR )p_buf_hdr->IP_AddrSrc,
+               (NET_IPv4_TOS  )NET_IPv4_TOS_DFLT,               /* See Note #1d1.                                       */
+               (NET_IPv4_TTL  )NET_IPv4_TTL_DFLT,
+               (NET_IPv4_FLAGS)NET_IPv4_FLAG_NONE,
+               (void         *)0,
+               (NET_ERR      *)p_err);
+
+
+
+                                                                /* ------ FREE ICMPv4 ERR MSG / UPDATE TX STATS ------- */
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+             NetICMPv4_TxPktFree(p_msg_err);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.TxMsgCtr);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.TxMsgErrCtr);
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #7.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxPktDiscardedCtr);
+                                                                /* Rtn err from NetIPv4_Tx().                           */
+             return;
+
+
+        case NET_IPv4_ERR_TX_PKT:
+                                                                /* See Note #7.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxPktDiscardedCtr);
+            *p_err = NET_ERR_TX;
+             return;
+
+
+        default:
+             NetICMPv4_TxPktDiscard(p_msg_err, p_err);
+             return;
+    }
+
+
+   *p_err = NET_ICMPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       NetICMPv4_RxReplyDemux()
+*
+* Description : Demultiplex ICMPv4 reply.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMPv4 message.
+*               -----       Argument checked   in NetICMPv4_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetICMPv4_Rx().
+*
+*               p_icmp_hdr  Pointer to network buffer ICMPv4 header.
+*               ----------  Argument validated in NetICMPv4_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*                               NET_ICMPv4_ERR_NONE      Message     successfully demultiplexed.
+*                               NET_ICMPv4_ERR_RX_REPLY  Message not successfully demultiplexed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_Rx().
+*
+* Note(s)     : (1) ICMPv4 Receive Error/Reply Messages NOT yet fully implemented #### NET-806
+*
+*                   (a) Only support Echo Reply.
+*
+*                   (a) Define "User Process" to report ICMPv4 Error Messages to Transport &/or Application Layers.
+*
+*                   (b) Define procedure to demultiplex & enqueue ICMPv4 Reply Messages to Application.
+*
+*                       (1) MUST implement mechanism to de-queue ICMPv4 message data from single, complete
+*                           datagram packet buffers or multiple, fragmented packet buffers.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv4_RxReplyDemux (NET_BUF         *p_buf,
+                                      NET_BUF_HDR     *p_buf_hdr,
+                                      NET_ICMPv4_HDR  *p_icmp_hdr,
+                                      NET_ERR         *p_err)
+{
+    NET_ICMPv4_HDR_ECHO  *p_icmp_echo_hdr;
+    CPU_INT16U            id;
+    CPU_INT16U            seq;
+    CPU_INT16U            data_len;
+
+
+
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv4_MSG_TYPE_ECHO_REPLY:
+             p_icmp_echo_hdr = (NET_ICMPv4_HDR_ECHO *)p_icmp_hdr;
+             data_len        =  p_buf_hdr->ICMP_MsgLen - p_buf_hdr->ICMP_HdrLen;
+             id              =  NET_UTIL_NET_TO_HOST_16(p_icmp_echo_hdr->ID);
+             seq             =  NET_UTIL_NET_TO_HOST_16(p_icmp_echo_hdr->SeqNbr);
+
+             NetICMP_RxEchoReply(id,
+                                 seq,
+                                 p_icmp_echo_hdr->Data,
+                                 data_len,
+                                 p_err);
+             if (*p_err != NET_ICMP_ERR_NONE) {
+                 *p_err  = NET_ICMPv4_ERR_RX_REPLY;
+                  return;
+             }
+             break;
+
+
+        default:
+            *p_err = NET_ICMPv4_ERR_RX_REPLY;
+             return;
+    }
+
+   (void)&p_buf;
+
+
+   *p_err = NET_ICMPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetICMPv4_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as ICMPv4 protocol.
+*
+* Argument(s) : p_buf_hdr    Pointer to network buffer header that received ICMPv4 packet.
+*               ---------    Argument validated in NetICMPv4_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv4_ERR_NONE             Received buffer's ICMPv4 header validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT ICMPv4.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetICMPv4_RxPktValidateBuf (NET_BUF_HDR  *p_buf_hdr,
+                                          NET_ERR      *p_err)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  valid;
+    NET_ERR      err;
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* -------------- VALIDATE ICMPv4 BUF HDR ------------- */
+    if (p_buf_hdr->ProtocolHdrType != NET_PROTOCOL_TYPE_ICMP_V4) {
+        if_nbr = p_buf_hdr->IF_Nbr;
+        valid  = NetIF_IsValidHandler(if_nbr, &err);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvalidProtocolCtr);
+        }
+       *p_err = NET_ERR_INVALID_PROTOCOL;
+        return;
+    }
+
+    if (p_buf_hdr->ICMP_MsgIx == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvalidBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_ICMPv4_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetICMPv4_RxPktValidate()
+*
+* Description : (1) Validate received ICMPv4 packet :
+*
+*                   (a) Validate the received packet's destination                  See Note #3
+*
+*                   (b) (1) Validate the received packet's following ICMPv4 header fields :
+*
+*                           (A) Type
+*                           (B) Code
+*                           (C) Message Length
+*                           (D) Pointer                         See RFC  #792, Section 'Parameter Problem Message'
+*                           (E) Check-Sum                       See Note #7a
+*
+*                       (2) Validation ignores the following ICMPv4 header fields :
+*
+*                           (A) Unused                          See RFC # 792, Section 'Message Formats'
+*                           (B) Data                            See RFC #1122, Sections 3.2.2 & 3.2.2.6
+*                           (C) Identification (ID)             See RFC # 792, Sections 'Echo or Echo Reply Message'
+*                                                                   & 'Timestamp or Timestamp Reply Message'
+*                           (D) Sequence Number                 See RFC # 792, Sections 'Echo or Echo Reply Message'
+*                                                                   & 'Timestamp or Timestamp Reply Message'
+*
+*                   (c) Convert the following ICMPv4 message fields from network-order to host-order :
+*
+*                       (1) Check-Sum                                               See Note #7c
+*
+*                           (A) These fields are NOT converted directly in the received packet buffer's
+*                               data area but are converted in local or network buffer variables ONLY.
+*
+*                   (d) Update network buffer's length controls
+*
+*                   (e) Demultiplex ICMPv4 message type
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMP packet.
+*               -----       Argument checked   in NetICMPv4_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetICMPv4_Rx().
+*
+*               p_icmp_hdr  Pointer to received packet's ICMP header.
+*               ----------  Argument validated in NetICMPv4_Rx()/NetICMPv4_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv4_ERR_MSG_TYPE_ERR       Received packet validated as ICMPv4 Error   Message.
+*                               NET_ICMPv4_ERR_MSG_TYPE_REQ       Received packet validated as ICMPv4 Request Message.
+*                               NET_ICMPv4_ERR_MSG_TYPE_REPLY     Received packet validated as ICMPv4 Reply   Message.
+*
+*                               NET_ICMPv4_ERR_RX_BROADCAST       Packet received via broadcast.
+*                               NET_ICMPv4_ERR_RX_MCAST       Packet received via multicast.
+*
+*                               NET_ICMPv4_ERR_INVALID_TYPE       Invalid/unknown ICMPv4 message type.
+*                               NET_ICMPv4_ERR_INVALID_CODE       Invalid/unknown ICMPv4 message code.
+*                               NET_ICMPv4_ERR_INVALID_PTR        Invalid ICMPv4 message pointer outside ICMPv4 message.
+*                               NET_ICMPv4_ERR_INVALID_LEN        Invalid ICMPv4 message      length.
+*                               NET_ICMPv4_ERR_INVALID_LEN_DATA   Invalid ICMPv4 message data length.
+*                               NET_ICMPv4_ERR_INVALID_CHK_SUM    Invalid ICMPv4 check-sum.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_Rx().
+*
+* Note(s)     : (2) See 'net_icmpv4.h  ICMPv4 HEADER' for ICMPv4 header format.
+*
+*               (3) (a) RFC #1122, Sections 3.2.2.6 & 3.2.2.8 state that "an ICMP ... Request destined to an
+*                       IP broadcast or IP multicast address MAY be silently discarded".
+*
+*                       However, NO RFC specifies how OTHER ICMPv4 messages should handle messages received by
+*                       broadcast or multicast.  Therefore, it is assumed that ALL ICMPv4 messages destined
+*                       to an IP broadcast or IP multicast address SHOULD be silently discarded.
+*
+*                   (b) Since a packet destined to a valid IPv4 broadcast address MUST also have been received as
+*                       a link-layer broadcast (see RFC #1122, Section 3.3.6 & 'net_ip.c  NetIPv4_RxPktValidate()
+*                       Note #9d3B1b'), the determination of an IPv4 broadcast destination address need only verify
+*                       that the received packet was received as a link-layer broadcast packet.
+*
+*               (4) (a) RFC #1122, Section 3.2.2 requires that ICMPv4 messages with the following invalid ICMPv4
+*                       header fields be "silently discarded" :
+*
+*                       (1) Type                                    RFC #1122, Section 3.2.2
+*
+*                   (b) Assumes that ICMPv4 messages with the following invalid ICMPv4 header fields should also
+*                       be "silently discarded" :
+*
+*                       (1) Code
+*                       (2) Message Length
+*                       (3) Pointer
+*                       (4) Check-Sum
+*
+*               (5) See 'net_icmpv4.h  ICMPv4 MESSAGE TYPES & CODES' for supported ICMPv4 message types/codes.
+*
+*               (6) Since ICMPv4 message headers do NOT contain a message length field, the ICMPv4 Message Length
+*                   is assumed to be the remaining IPv4 Datagram Length.
+*
+*               (7) (a) ICMPv4 message Check-Sum field MUST be validated AFTER (or BEFORE) any multi-octet
+*                       words are converted from network-order to host-order since "the sum of 16-bit
+*                       integers can be computed in either byte order" [RFC #1071, Section 2.(B)].
+*
+*                       In other words, the ICMPv4 message Check-Sum CANNOT be validated AFTER SOME but NOT
+*                       ALL multi-octet words have been converted from network-order to host-order.
+*
+*                       However, ALL received packets' multi-octet words are converted in local or network
+*                       buffer variables ONLY (see Note #1cA).  Therefore, ICMPv4 message Check-Sum may be
+*                       validated at any point.
+*
+*                   (b) RFC #792, Section 'Echo or Echo Reply Message : Checksum' specifies that "if the
+*                       total length is odd, the received data is padded with one octet of zeros for
+*                       computing the checksum".
+*
+*                       However, NO RFC specifies how OTHER ICMP message types should handle odd-length
+*                       check-sums.  Therefore, it is assumed that ICMPv4 Echo Request & Echo Reply Messages
+*                       should handle odd-length check-sums according to RFC #792's 'Echo or Echo Reply
+*                       Message : Checksum' specification, while ALL other ICMPv4 message types should handle
+*                       odd-length check-sums according to RFC #1071, Section 4.1.
+*
+*                       See also 'net_util.c  NetUtil_16BitSumDataCalc()  Note #8'.
+*
+*                   (c) After the ICMPv4 message Check-Sum is validated, it is NOT necessary to convert the
+*                       Check-Sum from network-order to host-order since it is NOT required for further
+*                       processing.
+*
+*               (8) Default case already invalidated earlier in this function.  However, the default case
+*                   is included as an extra precaution in case 'Type' is incorrectly modified.
+*
+*               (9) (a) (1) Except for ICMPv4 Echo & Echo Reply Messages (see Note #9b), most ICMP messages do
+*                           NOT permit user &/or application data (see RFC #792 & RFC #1122, Sections 3.2.2).
+*
+*                       (2) Most ICMPv4 messages that do NOT contain user &/or application data will NOT be
+*                           received in separate packet buffers since most ICMP messages are NOT large enough
+*                           to be fragmented since the minimum network buffer size MUST be configured such
+*                           that most ICMPv4 messages fit within a single packet buffer (see 'net_buf.h
+*                           NETWORK BUFFER INDEX & SIZE DEFINES  Note #1d').
+*
+*                           However, RFC #1122, Section 3.2.2 states that "every ICMPv4 error message includes
+*                           the Internet header and at least the first 8 data octets of the datagram that
+*                           triggered the error; more than 8 octets MAY be sent".  Thus, it is possible that
+*                           some received ICMPv4 error messages MAY contain more than 8 octets of the Internet
+*                           header & may therefore be received in one or more fragmented packet buffers.
+*
+*                           Furthermore, these additional error message octets SHOULD NOT contain user &/or
+*                           application data.
+*
+*                       (3) ICMPv4 data index value to clear was previously initialized in NetBuf_Get() when
+*                           the buffer was allocated.  This index value does NOT need to be re-cleared but
+*                           is shown for completeness.
+*
+*                   (b) (1) ICMPv4 Echo & Echo Reply Messages permit the transmission & receipt of user &/or
+*                           application data (see RFC #792, Section 'Echo or Echo Reply Message' & RFC #1122,
+*                           Section 3.2.2.6).
+*
+*                           Since the minimum network buffer size MUST be configured such that the entire
+*                           ICMPv4 Echo Message header MUST be received in a single packet (see 'net_buf.h
+*                           NETWORK BUFFER INDEX & SIZE DEFINES  Note #1d'), after the ICMPv4 Echo Message
+*                           header size is decremented from the first packet buffer's remaining number of
+*                           data octets, any remaining octets MUST be user &/or application data octets.
+*
+*                           (A) Note that the 'Data' index is updated regardless of a null-size data length.
+*
+*                       (2) If additional packet buffers exist, the remaining IP datagram 'Data' MUST be
+*                           user &/or application data.  Therefore, the 'Data' length does NOT need to
+*                           be adjusted but the 'Data' index MUST be updated.
+*
+*                   (c) #### Total ICMPv4 Message Length is duplicated in ALL fragmented packet buffers
+*                       (may NOT be necessary; remove if unnecessary).
+*********************************************************************************************************
+*/
+static  void  NetICMPv4_RxPktValidate (NET_BUF         *p_buf,
+                                       NET_BUF_HDR     *p_buf_hdr,
+                                       NET_ICMPv4_HDR  *p_icmp_hdr,
+                                       NET_ERR         *p_err)
+{
+    CPU_BOOLEAN                 rx_broadcast       = DEF_NO;
+    CPU_BOOLEAN                 addr_multicast     = DEF_NO;
+    CPU_BOOLEAN                 icmp_chk_sum_valid = DEF_OK;
+    CPU_INT16U                  icmp_msg_len_hdr   = 0u;
+    CPU_INT16U                  icmp_msg_len_min   = 0u;
+    CPU_INT16U                  icmp_msg_len_max   = 0u;
+    CPU_INT16U                  icmp_msg_len       = 0u;
+    NET_ICMPv4_HDR_PARAM_PROB  *p_icmp_param_prob  = DEF_NULL;
+    NET_BUF                    *p_buf_next         = DEF_NULL;
+    NET_BUF_HDR                *p_buf_next_hdr     = DEF_NULL;
+
+
+                                                                /* ------------- VALIDATE ICMPv4 RX DEST -------------- */
+    rx_broadcast = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_RX_BROADCAST);
+    if (rx_broadcast != DEF_NO) {                               /* If ICMPv4 rx'd as broadcast, rtn err (see Note #3).  */
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxBcastCtr);
+       *p_err = NET_ICMPv4_ERR_RX_BROADCAST;
+        return;
+    }
+
+    addr_multicast = NetIPv4_IsAddrMulticast(p_buf_hdr->IP_AddrDest);
+    if (addr_multicast != DEF_NO) {                             /* If ICMPv4 rx'd as multicast, rtn err (see Note #3).  */
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxMcastCtr);
+       *p_err = NET_ICMPv4_ERR_RX_MCAST;
+        return;
+    }
+
+
+
+                                                                /* ------------ VALIDATE ICMPv4 TYPE/CODE ------------- */
+    switch (p_icmp_hdr->Type) {                                 /* See Notes #4a1 & #4b1.                               */
+        case NET_ICMPv4_MSG_TYPE_DEST_UNREACH:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv4_MSG_CODE_DEST_NET:
+                 case NET_ICMPv4_MSG_CODE_DEST_HOST:
+                 case NET_ICMPv4_MSG_CODE_DEST_PROTOCOL:
+                 case NET_ICMPv4_MSG_CODE_DEST_PORT:
+                 case NET_ICMPv4_MSG_CODE_DEST_FRAG_NEEDED:
+                 case NET_ICMPv4_MSG_CODE_DEST_ROUTE_FAIL:
+                 case NET_ICMPv4_MSG_CODE_DEST_NET_UNKNOWN:
+                 case NET_ICMPv4_MSG_CODE_DEST_HOST_UNKNOWN:
+                 case NET_ICMPv4_MSG_CODE_DEST_HOST_ISOLATED:
+                 case NET_ICMPv4_MSG_CODE_DEST_NET_TOS:
+                 case NET_ICMPv4_MSG_CODE_DEST_HOST_TOS:
+                      icmp_msg_len_hdr = NET_ICMPv4_HDR_SIZE_DEST_UNREACH;
+                      icmp_msg_len_min = NET_ICMPv4_MSG_LEN_MIN_DEST_UNREACH;
+                      icmp_msg_len_max = NET_ICMPv4_MSG_LEN_MAX_DEST_UNREACH;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_TIME_EXCEED:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv4_MSG_CODE_TIME_EXCEED_TTL:
+                 case NET_ICMPv4_MSG_CODE_TIME_EXCEED_FRAG_REASM:
+                      icmp_msg_len_hdr = NET_ICMPv4_HDR_SIZE_TIME_EXCEED;
+                      icmp_msg_len_min = NET_ICMPv4_MSG_LEN_MIN_TIME_EXCEED;
+                      icmp_msg_len_max = NET_ICMPv4_MSG_LEN_MAX_TIME_EXCEED;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_PARAM_PROB:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR:
+                 case NET_ICMPv4_MSG_CODE_PARAM_PROB_OPT_MISSING:
+                      icmp_msg_len_hdr =  NET_ICMPv4_HDR_SIZE_PARAM_PROB;
+                      icmp_msg_len_min =  NET_ICMPv4_MSG_LEN_MIN_PARAM_PROB;
+                      icmp_msg_len_max =  NET_ICMPv4_MSG_LEN_MAX_PARAM_PROB;
+
+                      p_icmp_param_prob = (NET_ICMPv4_HDR_PARAM_PROB *)p_icmp_hdr;
+                      if (p_icmp_param_prob->Ptr < NET_ICMPv4_MSG_PTR_MIN_PARAM_PROB) {  /* If ptr val < min ptr val, .. */
+                          NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvPtrCtr);
+                         *p_err = NET_ICMPv4_ERR_INVALID_PTR;                            /* ... rtn err (see Note #4b3). */
+                          return;
+                      }
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_ECHO_REQ:
+        case NET_ICMPv4_MSG_TYPE_ECHO_REPLY:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv4_MSG_CODE_ECHO:
+                      icmp_msg_len_hdr = NET_ICMPv4_HDR_SIZE_ECHO;
+                      icmp_msg_len_min = NET_ICMPv4_MSG_LEN_MIN_ECHO;
+                      icmp_msg_len_max = NET_ICMPv4_MSG_LEN_MAX_ECHO;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_TS_REQ:
+        case NET_ICMPv4_MSG_TYPE_TS_REPLY:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv4_MSG_CODE_TS:
+                      icmp_msg_len_hdr = NET_ICMPv4_HDR_SIZE_TS;
+                      icmp_msg_len_min = NET_ICMPv4_MSG_LEN_MIN_TS;
+                      icmp_msg_len_max = NET_ICMPv4_MSG_LEN_MAX_TS;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REPLY:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv4_MSG_CODE_ADDR_MASK:
+                      icmp_msg_len_hdr = NET_ICMPv4_HDR_SIZE_ADDR_MASK;
+                      icmp_msg_len_min = NET_ICMPv4_MSG_LEN_MIN_ADDR_MASK;
+                      icmp_msg_len_max = NET_ICMPv4_MSG_LEN_MAX_ADDR_MASK;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+#if 0                                                           /* ---------------- UNSUPPORTED TYPES ----------------- */
+                                                                /* See Note #5.                                         */
+        case NET_ICMPv4_MSG_TYPE_REDIRECT:
+        case NET_ICMPv4_MSG_TYPE_ROUTE_REQ:
+        case NET_ICMPv4_MSG_TYPE_ROUTE_AD:
+        case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REQ:
+#endif
+        default:                                                /* ------------------ INVALID TYPES ------------------- */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvTypeCtr);
+            *p_err = NET_ICMPv4_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+
+                                                                /* ------------- VALIDATE ICMPv4 MSG LEN -------------- */
+    icmp_msg_len          = p_buf_hdr->IP_DatagramLen;          /* See Note #6.                                         */
+    p_buf_hdr->ICMP_MsgLen = icmp_msg_len;
+    if (p_buf_hdr->ICMP_MsgLen < icmp_msg_len_min) {            /* If msg len < min msg len, rtn err.                   */
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvMsgLenCtr);
+       *p_err = NET_ICMPv4_ERR_INVALID_LEN;
+        return;
+    }
+    if (icmp_msg_len_max != NET_ICMPv4_MSG_LEN_MAX_NONE) {
+        if (p_buf_hdr->ICMP_MsgLen > icmp_msg_len_max) {         /* If msg len > max msg len, rtn err.                   */
+            NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvMsgLenCtr);
+           *p_err = NET_ICMPv4_ERR_INVALID_LEN;
+            return;
+        }
+    }
+
+    if (p_icmp_hdr->Type == NET_ICMPv4_MSG_TYPE_PARAM_PROB) {    /* For ICMP Param Prob msg,   ...                       */
+        if (p_icmp_param_prob->Ptr >= p_buf_hdr->ICMP_MsgLen) {  /* ... if ptr val >= msg len, ...                       */
+            NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvPtrCtr);
+           *p_err = NET_ICMPv4_ERR_INVALID_PTR;                  /* ... rtn err (see Note #4b3).                         */
+            return;
+        }
+    }
+
+
+                                                                /* ------------- VALIDATE ICMPv4 CHK SUM -------------- */
+                                                                /* See Note #7.                                         */
+    switch (p_icmp_hdr->Type) {                                 /* See Note #7b.                                        */
+        case NET_ICMPv4_MSG_TYPE_DEST_UNREACH:
+        case NET_ICMPv4_MSG_TYPE_SRC_QUENCH:
+        case NET_ICMPv4_MSG_TYPE_TIME_EXCEED:
+        case NET_ICMPv4_MSG_TYPE_PARAM_PROB:
+        case NET_ICMPv4_MSG_TYPE_TS_REQ:
+        case NET_ICMPv4_MSG_TYPE_TS_REPLY:
+        case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REPLY:
+#ifdef NET_ICMP_CHK_SUM_OFFLOAD_RX
+             icmp_chk_sum_valid = DEF_YES;
+#else
+             icmp_chk_sum_valid = NetUtil_16BitOnesCplChkSumHdrVerify(p_icmp_hdr, p_buf_hdr->ICMP_MsgLen, p_err);
+#endif
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_ECHO_REQ:
+        case NET_ICMPv4_MSG_TYPE_ECHO_REPLY:
+#ifdef  NET_ICMP_CHK_SUM_OFFLOAD_RX
+             icmp_chk_sum_valid = DEF_YES;
+#else
+             icmp_chk_sum_valid = NetUtil_16BitOnesCplChkSumDataVerify(p_buf, 0, 0u, p_err);
+#endif
+             break;
+
+
+        default:                                                /* See Note #8.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvTypeCtr);
+            *p_err = NET_ICMPv4_ERR_INVALID_TYPE;
+             return;
+    }
+
+    if (icmp_chk_sum_valid != DEF_OK) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvChkSumCtr);
+       *p_err = NET_ICMPv4_ERR_INVALID_CHK_SUM;
+        return;
+    }
+#if 0                                                           /* Conv to host-order NOT necessary (see Note #7c).     */
+   (void)NET_UTIL_VAL_GET_NET_16(&p_icmp_hdr->ChkSum);
+#endif
+
+
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+    p_buf_hdr->ICMP_HdrLen = icmp_msg_len_hdr;
+
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv4_MSG_TYPE_DEST_UNREACH:
+        case NET_ICMPv4_MSG_TYPE_SRC_QUENCH:
+        case NET_ICMPv4_MSG_TYPE_TIME_EXCEED:
+        case NET_ICMPv4_MSG_TYPE_PARAM_PROB:
+        case NET_ICMPv4_MSG_TYPE_TS_REQ:
+        case NET_ICMPv4_MSG_TYPE_TS_REPLY:
+        case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REPLY:
+             p_buf_hdr->DataLen = 0u;                           /* Clr data len/ix       (see Note #9a1).               */
+#if 0                                                           /* Clr'd in NetBuf_Get() [see Note #9a3].               */
+             p_buf_hdr->DataIx  = NET_BUF_IX_NONE;
+#endif
+
+             p_buf_next = p_buf_hdr->NextBufPtr;
+             while (p_buf_next != (NET_BUF *)0) {               /* Clr ALL pkt bufs' data len/ix (see Note #9a2).       */
+                 p_buf_next_hdr              = &p_buf_next->Hdr;
+                 p_buf_next_hdr->DataLen     =  0u;
+#if 0                                                           /* Clr'd in NetBuf_Get() [see Note #9a3].               */
+                 p_buf_next_hdr->DataIx      =  NET_BUF_IX_NONE;
+#endif
+                 p_buf_next_hdr->ICMP_HdrLen =  0u;             /* NULL ICMPv4 hdr len in each pkt buf.                 */
+                 p_buf_next_hdr->ICMP_MsgLen =  icmp_msg_len;   /* Dup  ICMPv4 msg len in each pkt buf (see Note #9c).  */
+                 p_buf_next                  =  p_buf_next_hdr->NextBufPtr;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_ECHO_REQ:
+        case NET_ICMPv4_MSG_TYPE_ECHO_REPLY:
+                                                                /* Calc ICMP Echo Msg data len/ix (see Note #9b).       */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+             if (p_buf_hdr->ICMP_HdrLen > p_buf_hdr->DataLen) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxHdrDataLenCtr);
+                *p_err = NET_ICMPv4_ERR_INVALID_LEN_DATA;
+                 return;
+             }
+#endif
+             p_buf_hdr->DataLen -= (NET_BUF_SIZE) p_buf_hdr->ICMP_HdrLen;
+             p_buf_hdr->DataIx   = (CPU_INT16U  )(p_buf_hdr->ICMP_MsgIx + NET_ICMPv4_MSG_LEN_MIN_ECHO);
+
+             p_buf_next = p_buf_hdr->NextBufPtr;
+             while (p_buf_next != (NET_BUF *)0) {               /* Calc ALL pkt bufs' data len/ix   (see Note #9b2).    */
+                 p_buf_next_hdr              = &p_buf_next->Hdr;
+                 p_buf_next_hdr->DataIx      =  p_buf_next_hdr->ICMP_MsgIx;
+                 p_buf_next_hdr->ICMP_HdrLen =  0u;             /* NULL ICMP hdr len in each pkt buf.                   */
+                 p_buf_next_hdr->ICMP_MsgLen =  icmp_msg_len;   /* Dup  ICMP msg len in each pkt buf (see Note #9c).    */
+                 p_buf_next                  =  p_buf_next_hdr->NextBufPtr;
+             }
+             break;
+
+
+        default:                                                /* See Note #8.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvTypeCtr);
+            *p_err = NET_ICMPv4_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+
+                                                                /* -------------- DEMUX ICMPv4 MSG TYPE --------------- */
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv4_MSG_TYPE_DEST_UNREACH:
+        case NET_ICMPv4_MSG_TYPE_SRC_QUENCH:
+        case NET_ICMPv4_MSG_TYPE_TIME_EXCEED:
+        case NET_ICMPv4_MSG_TYPE_PARAM_PROB:
+            *p_err = NET_ICMPv4_ERR_MSG_TYPE_ERR;
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_ECHO_REQ:
+        case NET_ICMPv4_MSG_TYPE_TS_REQ:
+            *p_err = NET_ICMPv4_ERR_MSG_TYPE_REQ;
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_ECHO_REPLY:
+        case NET_ICMPv4_MSG_TYPE_TS_REPLY:
+        case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REPLY:
+            *p_err = NET_ICMPv4_ERR_MSG_TYPE_REPLY;
+             break;
+
+
+        default:                                                /* See Note #8.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvTypeCtr);
+            *p_err = NET_ICMPv4_ERR_INVALID_TYPE;
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetICMPv4_RxPktFree()
+*
+* Description : Free network buffer(s).
+*
+* Argument(s) : p_buf  Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv4_RxPktFree (NET_BUF  *p_buf)
+{
+   (void)NetBuf_FreeBufList((NET_BUF *)p_buf,
+                            (NET_CTR *)0);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetICMPv4_RxPktDiscard()
+*
+* Description : On any ICMPv4 receive error(s), discard ICMPv4 packet(s) & buffer(s).
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv4_RxPktDiscard (NET_BUF  *p_buf,
+                                      NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.ICMPv4.RxPktDiscardedCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBufList((NET_BUF *)p_buf,
+                            (NET_CTR *)p_ctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetICMPv4_TxMsgReqHandler()
+*
+* Description : (1) Transmit ICMPv4 Request Message :
+*
+*                   (a) Acquire  network lock
+*
+*                   (b) Validate ICMPv4 Request Message :
+*
+*                       (1) Validate the following arguments :
+*
+*                           (A) Type
+*                           (B) Code
+*                           (C) Source Address
+*
+*                       (2) Validation of the following arguments deferred to NetIPv4_Tx() :
+*
+*                           (A) Type of Service (TOS)
+*
+*                               (1) RFC #1349, Section 5.1 states that "an ICMP request message may
+*                                   be sent with any value in the TOS field.  A mechanism to allow
+*                                   the user to specify the TOS value to be used would be a useful
+*                                   feature in many applications that generate ICMP request messages".
+*
+*                           (B) Time-to-Live    (TTL)
+*                           (C) Destination Address
+*                           (D) IP flags
+*                           (E) IP options
+*
+*                       (3) Validation ignores the following arguments :
+*
+*                           (A) Data
+*                           (B) Data length
+*
+*                   (c) Get buffer for ICMPv4 Request Message :
+*
+*                       (1) Calculate      ICMPv4 Request Message buffer size
+*                       (2) Copy data into ICMPv4 Request Message
+*                       (3) Initialize     ICMPv4 Request Message buffer controls
+*
+*                   (d) Prepare ICMPv4 Request Message :
+*
+*                       (1) Type                               See 'net_icmpv4.h  ICMPv4 MESSAGE TYPES & CODES'
+*                       (2) Code                               See 'net_icmpv4.h  ICMPv4 MESSAGE TYPES & CODES'
+*                       (3) Identification (ID)
+*                       (4) Sequence Number
+*                       (5) Data
+*                       (6) Timestamps
+*                           (A) Timestamp Request Message
+*                               (1) "The Originate Timestamp is the time the sender last touched the message
+*                                    before sending it" (RFC #792, Section 'Timestamp or Timestamp Reply Message :
+*                                    Description').
+*
+*                   (e) Transmit ICMPv4 Request Message
+*                   (f) Free     ICMPv4 Request Message buffer
+*                   (g) Update   ICMPv4 transmit statistics
+*                   (h) Release  network lock
+*                   (i) Return   ICMPv4 Request Message Identification & Sequence Number
+*                         OR
+*                       NULL id & sequence number structure, on failure
+*
+*
+*
+* Argument(s) : type        ICMPv4 Request Message type (see Note #1d1) :
+*                           NET_ICMPv4_MSG_TYPE_ECHO_REQ
+*                           NET_ICMPv4_MSG_TYPE_TS_REQ
+*                           NET_ICMPv4_MSG_TYPE_ADDR_MASK_REQ
+*
+*               code        ICMPv4 Request Message code (see Note #1d2).
+*
+*               id          ICMPv4 Request Message id.
+*
+*               addr_src    Source      IPv4 address.
+*
+*               addr_dest   Destination IPv4 address.
+*
+*               TOS         Specific TOS to transmit ICMP/IP packet (see Notes #1b2A
+*
+*               TTL         Specific TTL to transmit ICMP/IP packet
+*
+*               flags       Flags to select transmit options; bit-field flags logically OR'd :
+*
+*               p_opts      Pointer to one or more IPv4 options configuration data structures
+*
+*               p_data      Pointer to application data to transmit.
+*               ------      Argument validated in NetICMPv4_TxEchoReq().
+*
+*               data_len    Length of application data to transmit (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv4_ERR_NONE             ICMPv4 Request Message successfully transmitted.
+*
+*
+*                               --------------------------- RETURNED BY NetIPv4_Tx() ---------------------------
+*                               See NetIPv4_Tx() for additional return error codes.
+*
+*
+*                               --------------------- RETURNED BY NetICMPv4_TxPktDiscard() ---------------------
+*                               See NetICMPv4_TxPktDiscard() for additional return error codes.
+*
+*
+* Return(s)   : ICMPv4 Request Message's Identification (ID) & Sequence Numbers, if NO error(s).
+*
+*               NULL                     Identification (ID) & Sequence Numbers, otherwise.
+*
+* Caller(s)   : NetICMPv4_TxEchoReq().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (2) NetICMPv4_TxMsgReq() blocked until network initialization completes.
+*
+*               (3) Default case already invalidated in NetICMPv4_TxMsgReqValidate().  However, the default
+*                   case is included as an extra precaution in case 'type' is incorrectly modified.
+*
+*               (4) Assumes network buffer's protocol header size is large enough to accommodate ICMPv4 header
+*                   size (see 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1').
+*
+*               (5) Some buffer controls were previously initialized in NetBuf_Get() when the buffer
+*                   was allocated earlier in this function.  These buffer controls do NOT need to be
+*                   re-initialized but are shown for completeness.
+*
+*               (6) (a) ICMPv4 message Check-Sum MUST be calculated AFTER the entire ICMPv4 message has been
+*                       prepared.  In addition, ALL multi-octet words are converted from host-order to
+*                       network-order since "the sum of 16-bit integers can be computed in either byte
+*                       order" [RFC #1071, Section 2.(B)].
+*
+*                   (b) ICMPv4 message Check-Sum field MUST be cleared to '0' BEFORE the ICMPv4 message
+*                       Check-Sum is calculated (see RFC #792, Sections 'Echo or Echo Reply Message :
+*                       Checksum', 'Timestamp or Timestamp Reply Message : Checksum'; & RFC #950,
+*                       Appendix I 'Address Mask ICMP', Section 'ICMP Fields : Checksum').
+*
+*                   (c) The ICMPv4 message Check-Sum field is returned in network-order & MUST NOT be re-
+*                       converted back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumHdrCalc()
+*                       Note #3b' & 'net_util.c  NetUtil_16BitOnesCplChkSumDataCalc()  Note #4b').
+*
+*               (7) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+static  NET_ICMPv4_REQ_ID_SEQ  NetICMPv4_TxMsgReqHandler (CPU_INT08U       type,
+                                                          CPU_INT08U       code,
+                                                          CPU_INT16U       id,
+                                                          NET_IPv4_ADDR    addr_src,
+                                                          NET_IPv4_ADDR    addr_dest,
+                                                          NET_IPv4_TOS     TOS,
+                                                          NET_IPv4_TTL     TTL,
+                                                          NET_IPv4_FLAGS   flags,
+                                                          void            *p_opts,
+                                                          void            *p_data,
+                                                          CPU_INT16U       data_len,
+                                                          NET_ERR         *p_err)
+{
+    NET_ICMPv4_REQ_ID_SEQ      id_seq;
+    NET_IF_NBR                 if_nbr;
+    CPU_INT16U                 msg_size_hdr;
+    CPU_INT16U                 msg_size_data;
+    CPU_INT16U                 msg_size_tot;
+    CPU_INT16U                 msg_seq_nbr;
+    CPU_INT16U                 msg_ix;
+    CPU_INT16U                 msg_ix_offset;
+    CPU_INT16U                 msg_ix_data;
+    CPU_INT16U                 msg_chk_sum;
+    NET_TS                     ts;
+    NET_BUF                   *p_msg_req;
+    NET_BUF_HDR               *p_msg_req_hdr;
+    NET_ICMPv4_HDR_ECHO       *p_icmp_hdr_echo;
+    NET_ICMPv4_HDR_TS         *p_icmp_hdr_ts;
+    NET_ICMPv4_HDR_ADDR_MASK  *p_icmp_hdr_addr;
+    NET_ERR                    err;
+
+
+    id_seq.ID     = NET_ICMPv4_REQ_ID_NONE;
+    id_seq.SeqNbr = NET_ICMPv4_REQ_SEQ_NONE;
+
+                                                                /* ------------ VALIDATE ICMPv4 TX REQ MSG ------------ */
+    NetICMPv4_TxMsgReqValidate(type, code, &err);
+
+    if (err != NET_ICMPv4_ERR_NONE) {
+        NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                               (NET_ERR *)p_err);
+        return (id_seq);
+    }
+
+
+                                                                /* ------- VALIDATE ICMPv4 TX REQ MSG SRC ADDR -------- */
+    if_nbr = NetIPv4_GetAddrHostIF_Nbr(addr_src);
+    if (if_nbr == NET_IF_NBR_NONE) {
+        NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                               (NET_ERR *)p_err);
+        return (id_seq);
+    }
+
+
+                                                                /* -------------- GET ICMPv4 REQ MSG BUF -------------- */
+                                                                /* Calc req msg buf size.                               */
+    switch (type) {
+        case NET_ICMPv4_MSG_TYPE_ECHO_REQ:
+             msg_size_hdr = NET_ICMPv4_HDR_SIZE_ECHO;
+
+             if (p_data != (void *)0) {
+                 msg_size_data = data_len;
+             } else {
+                 msg_size_data = 0u;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_TS_REQ:
+             if (p_data != (void *)0) {
+                 NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                                        (NET_ERR *)p_err);
+                *p_err = NET_ICMPv4_ERR_INVALID_ARG;
+                 return (id_seq);
+             }
+
+             if (data_len > 0) {
+                 NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                                        (NET_ERR *)p_err);
+                *p_err = NET_ICMPv4_ERR_INVALID_ARG;
+                 return (id_seq);
+             }
+
+             msg_size_hdr  = NET_ICMPv4_HDR_SIZE_TS;
+             msg_size_data = 0u;
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REQ:
+             if (p_data != (void *)0) {
+                 NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                                        (NET_ERR *)p_err);
+                *p_err = NET_ICMPv4_ERR_INVALID_ARG;
+                 return (id_seq);
+             }
+
+             if (data_len > 0) {
+                 NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                                        (NET_ERR *)p_err);
+                *p_err = NET_ICMPv4_ERR_INVALID_ARG;
+                 return (id_seq);
+             }
+
+             msg_size_hdr  = NET_ICMPv4_HDR_SIZE_ADDR_MASK;
+             msg_size_data = 0u;
+             break;
+
+
+        default:                                                /* See Note #3.                                         */
+             NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                                  (NET_ERR *)p_err);
+             return (id_seq);
+    }
+
+    msg_size_tot = msg_size_hdr + msg_size_data;
+
+
+#if 0
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (NET_BUF_DATA_IX_TX < msg_size_hdr) {                    /* See Note #4.                                         */
+        NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                               (NET_ERR *)p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxInvalidBufIxCtr);
+        return (id_seq);
+    }
+#endif
+#endif
+
+
+                                                                /* Get req msg buf.                                     */
+#if 0
+    msg_ix   = NET_BUF_DATA_IX_TX - msg_size_hdr;
+#else
+    msg_ix = 0u;
+    NetICMPv4_TxIxDataGet(if_nbr,
+                          msg_size_tot,
+                         &msg_ix,
+                         &err);
+#endif
+
+    p_msg_req = NetBuf_Get((NET_IF_NBR     ) if_nbr,
+                          (NET_TRANSACTION) NET_TRANSACTION_TX,
+                          (NET_BUF_SIZE   ) msg_size_tot,
+                          (NET_BUF_SIZE   ) msg_ix,
+                          (NET_BUF_SIZE  *)&msg_ix_offset,
+                          (NET_BUF_FLAGS  ) NET_BUF_FLAG_NONE,
+                          (NET_ERR       *)&err);
+    if (err != NET_BUF_ERR_NONE) {
+        NetICMPv4_TxPktDiscard(p_msg_req, p_err);
+        return (id_seq);
+    }
+
+    msg_ix      += msg_ix_offset;
+    msg_ix_data  = msg_ix + msg_size_hdr;
+
+                                                                /* Init req msg buf ctrls.                              */
+    p_msg_req_hdr                        = &p_msg_req->Hdr;
+    p_msg_req_hdr->ICMP_MsgIx            = (CPU_INT16U  )msg_ix;
+    p_msg_req_hdr->ICMP_MsgLen           = (CPU_INT16U  )msg_size_tot;
+    p_msg_req_hdr->ICMP_HdrLen           = (CPU_INT16U  )msg_size_hdr;
+    p_msg_req_hdr->TotLen                = (NET_BUF_SIZE)p_msg_req_hdr->ICMP_MsgLen;
+    p_msg_req_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_ICMP_V4;
+    p_msg_req_hdr->ProtocolHdrTypeNetSub =  NET_PROTOCOL_TYPE_ICMP_V4;
+
+
+    if (msg_size_data > 0) {                                    /* Copy data into ICMPv4 req tx buf.                    */
+        NetBuf_DataWr((NET_BUF    *) p_msg_req,
+                      (NET_BUF_SIZE) msg_ix_data,
+                      (NET_BUF_SIZE) msg_size_data,
+                      (CPU_INT08U *) p_data,
+                      (NET_ERR    *)&err);
+        if (err != NET_BUF_ERR_NONE) {
+            NetICMPv4_TxPktDiscard(p_msg_req, p_err);
+            return (id_seq);
+        }
+
+        p_msg_req_hdr->DataIx  = (CPU_INT16U  )msg_ix_data;
+        p_msg_req_hdr->DataLen = (NET_BUF_SIZE)msg_size_data;
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #5].                */
+    } else {
+        p_msg_req_hdr->DataIx  =  NET_BUF_IX_NONE;
+        p_msg_req_hdr->DataLen =  0u;
+#endif
+    }
+
+
+                                                                /* --------------- PREPARE ICMP REQ MSG --------------- */
+    NET_ICMPv4_TX_GET_SEQ_NBR(msg_seq_nbr);
+
+    switch (type) {
+        case NET_ICMPv4_MSG_TYPE_ECHO_REQ:
+             p_icmp_hdr_echo       = (NET_ICMPv4_HDR_ECHO *)&p_msg_req->DataPtr[p_msg_req_hdr->ICMP_MsgIx];
+             p_icmp_hdr_echo->Type =  NET_ICMPv4_MSG_TYPE_ECHO_REQ;
+             p_icmp_hdr_echo->Code =  NET_ICMPv4_MSG_CODE_ECHO_REQ;
+             NET_UTIL_VAL_COPY_SET_NET_16(&p_icmp_hdr_echo->ID,     &id);
+             NET_UTIL_VAL_COPY_SET_NET_16(&p_icmp_hdr_echo->SeqNbr, &msg_seq_nbr);
+                                                                            /* Calc ICMPv4 msg chk sum (see Note #6).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_echo->ChkSum, 0x0000u);    /* Clr             chk sum (see Note #6b).  */
+#ifdef NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumDataCalc((void     *) p_msg_req,
+                                                              (void     *) 0,
+                                                              (CPU_INT16U) 0u,
+                                                              (NET_ERR  *)&err);
+#endif
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_echo->ChkSum, &msg_chk_sum);  /* Copy chk sum in net order (see Note #6c).*/
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_TS_REQ:
+             p_icmp_hdr_ts       = (NET_ICMPv4_HDR_TS   *)&p_msg_req->DataPtr[p_msg_req_hdr->ICMP_MsgIx];
+             p_icmp_hdr_ts->Type =  NET_ICMPv4_MSG_TYPE_TS_REQ;
+             p_icmp_hdr_ts->Code =  NET_ICMPv4_MSG_CODE_TS_REQ;
+             ts                 =  NetUtil_TS_Get();                        /* See Note #1d6A1.                         */
+             NET_UTIL_VAL_COPY_SET_NET_16(&p_icmp_hdr_ts->ID,           &id);
+             NET_UTIL_VAL_COPY_SET_NET_16(&p_icmp_hdr_ts->SeqNbr,       &msg_seq_nbr);
+             NET_UTIL_VAL_COPY_SET_NET_32(&p_icmp_hdr_ts->TS_Originate, &ts);
+             NET_UTIL_VAL_SET_NET_32(&p_icmp_hdr_ts->TS_Rx,  NET_TS_NONE);
+             NET_UTIL_VAL_SET_NET_32(&p_icmp_hdr_ts->TS_Tx,  NET_TS_NONE);
+                                                                            /* Calc ICMPv4 msg chk sum (see Note #6).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_ts->ChkSum, 0x0000u);      /* Clr             chk sum (see Note #6b).  */
+#ifdef NET_ICMP_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void     *) p_icmp_hdr_ts,
+                                                             (CPU_INT16U) p_msg_req_hdr->ICMP_MsgLen,
+                                                             (NET_ERR  *)&err);
+#endif
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_ts->ChkSum, &msg_chk_sum);    /* Copy chk sum in net order (see Note #6c).*/
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REQ:
+             p_icmp_hdr_addr       = (NET_ICMPv4_HDR_ADDR_MASK *)&p_msg_req->DataPtr[p_msg_req_hdr->ICMP_MsgIx];
+             p_icmp_hdr_addr->Type =  NET_ICMPv4_MSG_TYPE_ADDR_MASK_REQ;
+             p_icmp_hdr_addr->Code =  NET_ICMPv4_MSG_CODE_ADDR_MASK_REQ;
+             NET_UTIL_VAL_COPY_SET_NET_16(&p_icmp_hdr_addr->ID,     &id);
+             NET_UTIL_VAL_COPY_SET_NET_16(&p_icmp_hdr_addr->SeqNbr, &msg_seq_nbr);
+             NET_UTIL_VAL_SET_NET_32(&p_icmp_hdr_addr->AddrMask, NET_IPv4_ADDR_NONE);
+                                                                            /* Calc ICMPv4 msg chk sum (see Note #6).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_addr->ChkSum,   0x0000u);  /* Clr             chk sum (see Note #6b).  */
+#ifdef NET_ICMP_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void     *) p_icmp_hdr_addr,
+                                                             (CPU_INT16U) p_msg_req_hdr->ICMP_MsgLen,
+                                                             (NET_ERR  *)&err);
+#endif
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_addr->ChkSum, &msg_chk_sum);  /* Copy chk sum in net order (see Note #6c).*/
+             break;
+
+
+        default:                                                /* See Note #3.                                         */
+             NetICMPv4_TxPktDiscard(p_msg_req, p_err);
+             return (id_seq);
+    }
+
+    if (err != NET_UTIL_ERR_NONE) {                             /* Chk err from NetUtil_16BitOnesCplChkSum()'s.         */
+        NetICMPv4_TxPktDiscard(p_msg_req, p_err);
+        return (id_seq);
+    }
+
+
+
+                                                                /* ---------------- TX ICMPv4 REQ MSG ----------------- */
+    NetIPv4_Tx((NET_BUF      *)p_msg_req,
+               (NET_IPv4_ADDR )addr_src,
+               (NET_IPv4_ADDR )addr_dest,
+               (NET_IPv4_TOS  )TOS,
+               (NET_IPv4_TTL  )TTL,
+               (NET_IPv4_FLAGS)flags,
+               (void         *)p_opts,
+               (NET_ERR      *)p_err);
+
+
+
+                                                                /* ------ FREE ICMPv4 REQ MSG / UPDATE TX STATS ------- */
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+             NetICMPv4_TxPktFree(p_msg_req);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.TxMsgCtr);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.TxMsgReqCtr);
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #7.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxPktDiscardedCtr);
+                                                                /* Rtn err from NetIPv4_Tx().                           */
+             return (id_seq);
+
+
+        case NET_IPv4_ERR_TX_PKT:
+                                                                /* See Note #7.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxPktDiscardedCtr);
+            *p_err =  NET_ERR_TX;
+             return (id_seq);
+
+
+        default:
+             NetICMPv4_TxPktDiscard(p_msg_req, p_err);
+             return (id_seq);
+    }
+
+
+                                                                /* ---------- RTN ICMPv4 REQ MSG ID/SEQ NBR ----------- */
+    id_seq.ID     = id;
+    id_seq.SeqNbr = msg_seq_nbr;
+
+   *p_err          = NET_ICMPv4_ERR_NONE;
+
+    return (id_seq);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetICMPv4_TxMsgErrValidate()
+*
+* Description : (1) Validate received packet & transmit error parameters for ICMPv4 Error Message transmit :
+*
+*                   (a) RFC #1122, Section 3.2.2 specifies that "an ICMP error message MUST NOT be sent as
+*                       the result of receiving" :
+*
+*                       (1) "An ICMP Error Message",                                          ...
+*
+*                       (2) "A datagram destined to an IP broadcast or IP multicast address", ...
+*
+*                           (A) Any packet received as an IP broadcast destination address MUST also have
+*                               been received as a link-layer broadcast (see RFC #1122, Section 3.3.6 &
+*                               'net_ip.c  NetIPv4_RxPktValidate()  Note #9d3B1a').
+*
+*                           (B) Therefore, it is NOT necessary to re-validate the IP destination address
+*                               as a non-broadcast address since it has ALREADY been validated as a non-
+*                               broadcast at the link-layer (see Note #1a3).
+*
+*                       (3) "A datagram sent as a link-layer broadcast",                      ...
+*
+*                       (4) "A non-initial fragment",                                         ...
+*
+*                       (5) "A datagram whose source address does not define a single host -- e.g., a zero
+*                            address, a loopback address, a broadcast address, a multicast address, or a
+*                            Class E address"
+*
+*                           (A) ALL IPv4 source addresses already validated (see 'net_ip.c  NetIPv4_RxPktValidate()
+*                               Note #9c') except 'This Host' & 'Specified Host' addresses.
+*
+*                   (b) Validate ICMPv4 Error Message transmit parameters :
+*
+*                       (1) Type
+*                       (2) Code
+*                       (3) Pointer                                         See Note #6
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received a packet with error(s).
+*               -----       Argument checked   in NetICMPv4_TxMsgErr().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetICMPv4_TxMsgErr().
+*
+*               p_ip_hdr    Pointer to received packet's IP header.
+*               --------    Argument validated in NetICMPv4_TxMsgErr().
+*
+*               type        ICMPv4 Error Message type (see Note #5) :
+*                               NET_ICMPv4_MSG_TYPE_DEST_UNREACH
+*                               NET_ICMPv4_MSG_TYPE_TIME_EXCEED
+*                               NET_ICMPv4_MSG_TYPE_PARAM_PROB
+*
+*               code        ICMPv4 Error Message code (see Note #5).
+*
+*               ptr         Pointer to received packet's ICMPv4 error (optional).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv4_ERR_NONE                   Received packet successfully validated
+*                                                                         for ICMPv4 transmit error message.
+*
+*                               NET_ICMPv4_ERR_TX_INVALID_MCAST   Packet received as a multicast packet.
+*                               NET_ICMPv4_ERR_TX_INVALID_BROADCAST   Packet received as a broadcast packet.
+*                               NET_ICMPv4_ERR_TX_INVALID_ADDR_SRC    Packet received with a non-single host
+*                                                                         IPv4 source address.
+*                               NET_ICMPv4_ERR_TX_INVALID_FRAG        Packet received as a non-initial fragment.
+*                               NET_ICMPv4_ERR_TX_INVALID_ERR_MSG     Packet received as an ICMP Error Message.
+*                               NET_ICMPv4_ERR_INVALID_TYPE           Invalid/unknown ICMPv4 message type.
+*                               NET_ICMPv4_ERR_INVALID_CODE           Invalid/unknown ICMPv4 message code.
+*                               NET_ICMPv4_ERR_INVALID_PTR            Invalid message pointer outside error message.
+*                               NET_BUF_ERR_INVALID_IX                Invalid/insufficient buffer index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_TxMsgErr().
+*
+* Note(s)     : (2) The following IPv4 header fields MUST be converted from network-order to host-order BEFORE
+*                   any transmit ICMPv4 Error Messages are validated :
+*
+*                   (a) Total  Length                       See 'net_ipv4.c  NetIPv4_RxPktValidate()  Note #3b'
+*                   (b) Source Address                      See 'net_ipv4.c  NetIPv4_RxPktValidate()  Note #3c'
+*
+*               (3) See 'net_ip.h  IP ADDRESS DEFINES  Notes #2 & #3' for supported IP addresses.
+*
+*               (4) Default case already invalidated in NetIPv4_RxPktValidate().  However, the default case
+*                   is included as an extra precaution in case 'IP_AddrSrc' is incorrectly modified.
+*
+*               (5) See 'net_icmpv4.h  ICMPv4 MESSAGE TYPES & CODES' for supported ICMPv4 message types & codes.
+*
+*               (6) (a) ICMPv4 Parameter Problem Messages' pointer fields validated by comparing the pointer
+*                       field value to minimum & maximum pointer field values.
+*
+*                   (b) Since an ICMPv4 Parameter Problem Message's minimum pointer field value is NOT less
+*                       than zero (see 'net_icmpv4.h  ICMPv4 POINTER DEFINES'), a minimum pointer field value
+*                       check is NOT required unless native data type 'CPU_INT16U' is incorrectly configured
+*                       as a signed integer in 'cpu.h'.
+*
+*                   (c) Since an ICMPv4 Parameter Problem Message may be received for an IPv4 or higher-layer
+*                       protocol, the maximum pointer field value is specific to each received ICMPv4 packets'
+*                       IPv4 header length & demultiplexed protocol header length :
+*
+*                           Pointer Field Value < Maximum Pointer Field Value = IPv4 Header Length
+*                                                                           [ + Other Protocol Header Length ]
+*
+*                   (d) See 'net_icmpv4.h  ICMP POINTER DEFINES  Note #2' for supported ICMPv4 Parameter Problem
+*                       Message protocols.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv4_TxMsgErrValidate (NET_BUF       *p_buf,
+                                          NET_BUF_HDR   *p_buf_hdr,
+                                          NET_IPv4_HDR  *p_ip_hdr,
+                                          CPU_INT08U     type,
+                                          CPU_INT08U     code,
+                                          CPU_INT08U     ptr,
+                                          NET_ERR       *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT16U       ptr_max;
+    CPU_INT16U       ptr_max_protocol;
+#endif
+#if 0                                                           /* See Note #1a2B.                                      */
+    CPU_BOOLEAN      addr_broadcast;
+#endif
+    CPU_BOOLEAN      addr_multicast;
+    CPU_BOOLEAN      rx_broadcast;
+    CPU_BOOLEAN      ip_flag_frags_more;
+    CPU_INT16U       ip_flags;
+    CPU_INT16U       ip_frag_offset;
+    NET_ICMPv4_HDR  *p_icmp_hdr;
+
+
+
+                                                                /* ------------- CHK LINK-LAYER BROADCAST ------------- */
+    rx_broadcast = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_RX_BROADCAST);
+    if (rx_broadcast != DEF_NO) {                               /* If pkt rx'd via broadcast, ...                       */
+       *p_err = NET_ICMPv4_ERR_TX_INVALID_BROADCAST;            /* ... rtn err (see Note #1a3).                         */
+        return;
+    }
+
+
+                                                                /* ---------------- CHK IPv4 DEST ADDR ---------------- */
+#if 0                                                           /* See Note #1a2B.                                      */
+    addr_broadcast = NetIPv4_IsAddrBroadcast(p_buf_hdr->IP_AddrDest);
+    if (addr_broadcast != DEF_NO) {                             /* If pkt rx'd via broadcast, ...                       */
+       *p_err = NET_ICMPv4_ERR_TX_INVALID_BROADCAST;            /* ... rtn err (see Note #1a2).                         */
+        return;
+    }
+#endif
+    addr_multicast = NetIPv4_IsAddrMulticast(p_buf_hdr->IP_AddrDest);
+    if (addr_multicast != DEF_NO) {                             /* If pkt rx'd via multicast, ...                       */
+       *p_err = NET_ICMPv4_ERR_TX_INVALID_MCAST;            /* ... rtn err (see Note #1a2).                         */
+        return;
+    }
+
+
+                                                                /* ---------------- CHK IPv4 SRC  ADDR ---------------- */
+                                                                /* See Note #1a5.                                       */
+    if (p_buf_hdr->IP_AddrSrc == NET_IPv4_ADDR_THIS_HOST) {     /* Chk invalid         'This Host' (see Note #1a5A).    */
+       *p_err = NET_ICMPv4_ERR_TX_INVALID_ADDR_SRC;
+        return;
+    }
+
+    if ((p_buf_hdr->IP_AddrSrc & NET_IPv4_ADDR_CLASS_A_MASK) == NET_IPv4_ADDR_CLASS_A) {
+                                                                /* Chk invalid Class-A 'This Host' (see Note #1a5A).    */
+        if ((p_buf_hdr->IP_AddrSrc    & NET_IPv4_ADDR_CLASS_A_MASK_HOST) ==
+            (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_A_MASK_HOST)) {
+            *p_err = NET_ICMPv4_ERR_TX_INVALID_ADDR_SRC;
+             return;
+        }
+
+    } else if ((p_buf_hdr->IP_AddrSrc & NET_IPv4_ADDR_CLASS_B_MASK) == NET_IPv4_ADDR_CLASS_B) {
+                                                                /* Chk invalid Class-B 'This Host' (see Note #1a5A).    */
+        if ((p_buf_hdr->IP_AddrSrc    & NET_IPv4_ADDR_CLASS_B_MASK_HOST) ==
+            (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_B_MASK_HOST)) {
+            *p_err = NET_ICMPv4_ERR_TX_INVALID_ADDR_SRC;
+             return;
+        }
+
+    } else if ((p_buf_hdr->IP_AddrSrc & NET_IPv4_ADDR_CLASS_C_MASK) == NET_IPv4_ADDR_CLASS_C) {
+                                                                /* Chk invalid Class-C 'This Host' (see Note #1a5A).    */
+        if ((p_buf_hdr->IP_AddrSrc    & NET_IPv4_ADDR_CLASS_C_MASK_HOST) ==
+            (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_C_MASK_HOST)) {
+            *p_err = NET_ICMPv4_ERR_TX_INVALID_ADDR_SRC;
+             return;
+        }
+
+    } else {                                                    /* Discard invalid addr class (see Notes #3 & #4).      */
+       *p_err = NET_ICMPv4_ERR_TX_INVALID_ADDR_SRC;
+        return;
+    }
+
+
+                                                                /* ------------------ CHK IPv4 FRAG ------------------- */
+
+    ip_flags           = p_buf_hdr->IP_Flags_FragOffset & NET_IPv4_HDR_FLAG_MASK;
+    ip_flag_frags_more = DEF_BIT_IS_SET(ip_flags, NET_IPv4_HDR_FLAG_FRAG_MORE);
+    if (ip_flag_frags_more != DEF_NO) {                         /* If 'More Frags' flag set ...                         */
+        ip_frag_offset = p_buf_hdr->IP_Flags_FragOffset & NET_IPv4_HDR_FRAG_OFFSET_MASK;
+        if (ip_frag_offset != NET_IPv4_HDR_FRAG_OFFSET_NONE) {  /* ... & frag offset != 0,  ...                         */
+           *p_err = NET_ICMPv4_ERR_TX_INVALID_FRAG;             /* ... rtn err for non-initial frag (see Note #1a4).    */
+            return;
+        }
+    }
+
+
+
+                                                                /* ---------------- CHK ICMPv4 ERR MSG ---------------- */
+    if (p_ip_hdr->Protocol == NET_IP_HDR_PROTOCOL_ICMP) {       /* If rx'd IP datagram is ICMP, ...                     */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (p_buf_hdr->ICMP_MsgIx == NET_BUF_IX_NONE) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.RxInvalidBufIxCtr);
+           *p_err = NET_BUF_ERR_INVALID_IX;
+            return;
+        }
+#endif
+        p_icmp_hdr = (NET_ICMPv4_HDR *)&p_buf->DataPtr[p_buf_hdr->ICMP_MsgIx];
+
+        switch (p_icmp_hdr->Type) {                             /* ... chk ICMPv4 msg type & ...                        */
+            case NET_ICMPv4_MSG_TYPE_DEST_UNREACH:
+            case NET_ICMPv4_MSG_TYPE_TIME_EXCEED:
+            case NET_ICMPv4_MSG_TYPE_PARAM_PROB:
+                *p_err = NET_ICMPv4_ERR_TX_INVALID_ERR_MSG;     /* ... rtn err for ICMPv4 err msgs (see Note #1a1).     */
+                 return;
+
+
+            case NET_ICMPv4_MSG_TYPE_ECHO_REQ:
+            case NET_ICMPv4_MSG_TYPE_ECHO_REPLY:
+            case NET_ICMPv4_MSG_TYPE_TS_REQ:
+            case NET_ICMPv4_MSG_TYPE_TS_REPLY:
+            case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REPLY:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                 ptr_max_protocol = p_buf_hdr->ICMP_MsgLen;     /* See Note #6c.                                        */
+#endif
+                 break;
+
+#if 0                                                           /* ---------------- UNSUPPORTED TYPES ----------------- */
+                                                                /* See Note #5.                                         */
+            case NET_ICMPv4_MSG_TYPE_REDIRECT:
+            case NET_ICMPv4_MSG_TYPE_ROUTE_REQ:
+            case NET_ICMPv4_MSG_TYPE_ROUTE_AD:
+            case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REQ:
+#endif
+            default:                                            /* ------------------ INVALID TYPES ------------------- */
+                *p_err = NET_ICMPv4_ERR_INVALID_TYPE;
+                 return;
+        }
+
+
+    } else {                                                    /* See Note #6d.                                        */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        ptr_max_protocol = 0u;
+#endif
+    }
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------- VALIDATE ICMP ERR MSG TYPE/CODE/PTR -------- */
+    switch (type) {
+        case NET_ICMPv4_MSG_TYPE_DEST_UNREACH:
+             switch (code) {
+                 case NET_ICMPv4_MSG_CODE_DEST_PROTOCOL:
+                 case NET_ICMPv4_MSG_CODE_DEST_PORT:
+                      break;
+
+
+                 case NET_ICMPv4_MSG_CODE_DEST_NET:
+                 case NET_ICMPv4_MSG_CODE_DEST_HOST:
+                 case NET_ICMPv4_MSG_CODE_DEST_FRAG_NEEDED:
+                 case NET_ICMPv4_MSG_CODE_DEST_ROUTE_FAIL:
+                 case NET_ICMPv4_MSG_CODE_DEST_NET_UNKNOWN:
+                 case NET_ICMPv4_MSG_CODE_DEST_HOST_UNKNOWN:
+                 case NET_ICMPv4_MSG_CODE_DEST_HOST_ISOLATED:
+                 case NET_ICMPv4_MSG_CODE_DEST_NET_TOS:
+                 case NET_ICMPv4_MSG_CODE_DEST_HOST_TOS:
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_TIME_EXCEED:
+             switch (code) {
+                 case NET_ICMPv4_MSG_CODE_TIME_EXCEED_TTL:
+                 case NET_ICMPv4_MSG_CODE_TIME_EXCEED_FRAG_REASM:
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_PARAM_PROB:
+             switch (code) {
+                 case NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR:
+                 case NET_ICMPv4_MSG_CODE_PARAM_PROB_OPT_MISSING:
+                                                                /* Validate ICMPv4 Param Prob Msg ptr (see Note #6).    */
+#if 0                                                           /* See Note #6b.                                        */
+                      if (ptr < NET_ICMPv4_PTR_IX_BASE) {
+                          NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxHdrPtrCtr);
+                         *p_err = NET_ICMPv4_ERR_INVALID_PTR;
+                      }
+#endif
+                      ptr_max = p_buf_hdr->IP_HdrLen + ptr_max_protocol;
+                      if (ptr >= ptr_max) {
+                          NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxHdrPtrCtr);
+                         *p_err = NET_ICMPv4_ERR_INVALID_PTR;
+                      }
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_ECHO_REQ:
+        case NET_ICMPv4_MSG_TYPE_ECHO_REPLY:
+        case NET_ICMPv4_MSG_TYPE_TS_REQ:
+        case NET_ICMPv4_MSG_TYPE_TS_REPLY:
+        case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REPLY:
+            *p_err = NET_ICMPv4_ERR_TX_INVALID_ERR_MSG;
+             return;
+
+#if 0                                                           /* ---------------- UNSUPPORTED TYPES ----------------- */
+                                                                /* See Note #5.                                         */
+        case NET_ICMPv4_MSG_TYPE_REDIRECT:
+        case NET_ICMPv4_MSG_TYPE_ROUTE_REQ:
+        case NET_ICMPv4_MSG_TYPE_ROUTE_AD:
+        case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REQ:
+#endif
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxHdrTypeCtr);
+            *p_err = NET_ICMPv4_ERR_INVALID_TYPE;
+             return;
+    }
+
+#else                                                           /* Prevent 'variable unused' compiler warnings.         */
+   (void)&type;
+   (void)&code;
+   (void)&ptr;
+#endif
+
+
+   *p_err = NET_ICMPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetICMPv4_TxMsgReqValidate()
+*
+* Description : (1) Validate parameters for ICMPv4 Request Message transmit :
+*
+*                   (a) Type                                                        See Note #2
+*                   (b) Code                                                        See Note #2
+*
+*
+* Argument(s) : type        ICMPv4 Request Message type (see Note #1a) :
+*
+*                               NET_ICMPv4_MSG_TYPE_ECHO_REQ
+*                               NET_ICMPv4_MSG_TYPE_TS_REQ
+*                               NET_ICMPv4_MSG_TYPE_ADDR_MASK_REQ
+*
+*               code        ICMPv4 Request Message code (see Note #1b).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv4_ERR_NONE                 Transmit parameters successfully validated
+*                                                                       for ICMPv4 transmit request message.
+*                               NET_ICMPv4_ERR_INVALID_TYPE         Invalid/unknown ICMPv4 message type.
+*                               NET_ICMv6P_ERR_INVALID_CODE         Invalid/unknown ICMPv4 message code.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_TxMsgReqHandler().
+*
+* Note(s)     : (2) See 'net_icmpv4.h  ICMPv4 MESSAGE TYPES & CODES' for supported ICMPv4 message types & codes.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv4_TxMsgReqValidate (CPU_INT08U   type,
+                                          CPU_INT08U   code,
+                                          NET_ERR     *p_err)
+{
+
+                                                                /* -------- VALIDATE ICMPv4 REQ MSG TYPE/CODE --------- */
+    switch (type) {
+        case NET_ICMPv4_MSG_TYPE_ECHO_REQ:
+             switch (code) {
+                 case NET_ICMPv4_MSG_CODE_ECHO_REQ:
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_TS_REQ:
+             switch (code) {
+                 case NET_ICMPv4_MSG_CODE_TS_REQ:
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_ADDR_MASK_REQ:
+             switch (code) {
+                 case NET_ICMPv4_MSG_CODE_ADDR_MASK_REQ:
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv4_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxHdrTypeCtr);
+            *p_err = NET_ICMPv4_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+   *p_err = NET_ICMPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetICMPv4_TxMsgReply()
+*
+* Description : (1) Transmit ICMPv4 Reply Message in response to received ICMPv4 Request Message :
+*
+*                   (a) Process ICMPv4 Reply Message :
+*
+*                       (1) The following ICMPv4 Reply Messages require receive processing :
+*
+*                           (A) Timestamp Reply Message
+*
+*                               (1) "The Receive Timestamp is the time the echoer first touched it on receipt"
+*                                   (RFC #792, Section 'Timestamp or Timestamp Reply Message : Description').
+*
+*                   (b) Get buffer for ICMPv4 Reply Message :
+*
+*                       (1) Copy ICMPv4 Request Message into ICMPv4 Reply Message
+*                       (2) Initialize ICMPv4 Reply Message buffer controls
+*
+*                   (c) Prepare ICMPv4 Reply Message's IPv4 header :
+*
+*                       (1) RFC #1349, Section 5.1 specifies that "an ICMP reply message is sent with the same
+*                           value in the TOS field as was used in the corresponding ICMP request message".
+*
+*                       (2) RFC #1122, Sections 3.2.2.6 & 3.2.2.8 specify that "if a Record Route and/or Time
+*                           Stamp option is received in [an ICMP Request, these options] SHOULD be updated ...
+*                           and included in the IP header of the ... Reply message".  Also "if a Source Route
+*                           option is received ... the return route MUST be reversed and used as a Source Route
+*                           option for the ... Reply message".
+*
+*                           #### These IPv4 header option requirements for ICMPv4 Reply Messages are NOT yet implemented.
+*
+*                   (d) Prepare ICMPv4 Reply Message :
+*
+*                       (1) Echo Reply Message
+*
+*                           (A) "To form an echo reply message, the source and destination addresses are simply
+*                                reversed, the type code changed to [reply], and the checksum recomputed"
+*                               (RFC #792, Section 'Echo or Echo Reply Message : Addresses').
+*
+*                       (2) Timestamp Reply Message
+*
+*                           (A) "The Transmit Timestamp is the time the echoer last touched the message on sending
+*                                it" (RFC #792, Section 'Timestamp or Timestamp Reply Message : Description').
+*
+*                           (B) "To form a timestamp reply message, the source and destination addresses are
+*                                simply reversed, the type code changed to [reply], and the checksum recomputed"
+*                                (RFC #792, Section 'Timestamp or Timestamp Reply Message : Addresses').
+*
+*                       (3) Some ICMPv4 Reply Message fields are copied directly from the ICMPv4 Request Message.
+*
+*                           (A) ICMPv4 Reply Message Identification & Sequence Number fields were NOT validated
+*                               or converted from network-order to host-order (see 'NetICMPv4_RxPktValidate()
+*                               Notes #1b2C & #1b2D') & therefore do NOT need to be converted from host-order
+*                               to network-order.
+*
+*                   (e) Transmit ICMPv4 Reply Message
+*                   (f) Free     ICMPv4 Reply Message buffer
+*                   (g) Update transmit statistics
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMP packet.
+*               -----       Argument checked   in NetICMPv4_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetICMPv4_Rx().
+*
+*               p_icmp_hdr  Pointer to received packet's ICMP header.
+*               ----------  Argument validated in NetICMPv4_Rx()/NetICMPv4_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv4_ERR_NONE             ICMPv4 Reply Message successfully transmitted.
+*
+*                                                               -- RETURNED BY NetICMPv4_TxPktDiscard() : --
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+*                                                               -------- RETURNED BY NetIPv4_Tx() : --------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_Rx().
+*
+* Note(s)     : (2) Default case already invalidated in NetICMPv4_RxPktValidate().  However, the default case
+*                   is included as an extra precaution in case 'Type' is incorrectly modified.
+*
+*               (3) (a) RFC #1122, Section 3.2.2.6 states that "data received in an ICMP Echo Request MUST
+*                       be entirely included in the resulting Echo Reply.  However, if sending the Echo Reply
+*                       requires intentional fragmentation that is not implemented, the datagram MUST be
+*                       truncated to maximum transmission size ... and sent".
+*
+*                       See also 'net_ipv4.h  Note #1c'.
+*
+*                   (b) In case the maximum network buffer size is smaller than the ICMPv4 message data length,
+*                       the ICMPv4 Echo Request Message data should be similarly truncated in order to transmit
+*                       the ICMPv4 Echo Reply Message.
+*
+*               (4) Some buffer controls were previously initialized in NetBuf_Get() when the buffer
+*                   was allocated earlier in this function.  These buffer controls do NOT need to be
+*                   re-initialized but are shown for completeness.
+*
+*               (5) (a) ICMPv4 message Check-Sum MUST be calculated AFTER the entire ICMP message has been
+*                       prepared.  In addition, ALL multi-octet words are converted from host-order to
+*                       network-order since "the sum of 16-bit integers can be computed in either byte
+*                       order" [RFC #1071, Section 2.(B)].
+*
+*                   (b) ICMPv4 message Check-Sum field MUST be cleared to '0' BEFORE the ICMPv4 message
+*                       Check-Sum is calculated (see RFC #792, Sections 'Echo or Echo Reply Message :
+*                       Checksum' & 'Timestamp or Timestamp Reply Message : Checksum').
+*
+*                   (c) The ICMPv4 message Check-Sum field is returned in network-order & MUST NOT be re-
+*                       converted back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumHdrCalc()
+*                       Note #3b' & 'net_util.c  NetUtil_16BitOnesCplChkSumDataCalc()  Note #4b').
+*
+*               (6) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv4_TxReqReply (NET_BUF         *p_buf,
+                                    NET_BUF_HDR     *p_buf_hdr,
+                                    NET_ICMPv4_HDR  *p_icmp_hdr,
+                                    NET_ERR         *p_err)
+{
+#if 0                                                           /* DISABLED while NOT yet implemented.                  */
+    NET_IPv4_OPT_CFG_ROUTE_TS   msg_opt_route_ts;
+#endif
+    NET_ICMPv4_HDR_ECHO          *p_icmp_hdr_echo;
+    NET_ICMPv4_HDR_TS            *p_icmp_hdr_ts;
+    NET_BUF                      *p_msg_req;
+    NET_BUF                      *p_msg_reply;
+    NET_BUF_HDR                  *p_msg_req_hdr;
+    NET_BUF_HDR                  *p_msg_reply_hdr;
+    NET_IPv4_OPT_CFG_ROUTE_TS    *p_msg_opt_cfg_route_ts;
+    NET_IPv4_HDR                 *p_ip_hdr;
+    NET_BUF_SIZE                  buf_size_max;
+    NET_BUF_SIZE                  buf_size_max_data;
+    NET_MTU                       icmp_mtu;
+    CPU_INT16U                    msg_size_hdr;
+    CPU_INT16U                    msg_len;
+    CPU_INT16U                    msg_len_min;
+    CPU_INT16U                    msg_len_rem;
+    CPU_INT16U                    msg_ix;
+    CPU_INT16U                    msg_ix_offset;
+    CPU_INT16U                    msg_reply_ix;
+    CPU_INT16U                    msg_reply_len;
+    CPU_INT16U                    msg_chk_sum;
+    CPU_INT08U                   *p_msg_req_data;
+    NET_TS                        ts;
+    NET_IPv4_TOS                  TOS;
+    NET_IPv4_FLAGS                flags;
+    NET_ERR                       err;
+
+
+
+                                                                /* ------------ PROCESS ICMPv4 REPLY MSGs ------------- */
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv4_MSG_TYPE_ECHO_REQ:
+             msg_size_hdr =  NET_ICMPv4_HDR_SIZE_ECHO;
+             msg_len_min  =  NET_ICMPv4_MSG_LEN_MIN_ECHO;
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_TS_REQ:
+             p_icmp_hdr_ts = (NET_ICMPv4_HDR_TS *)p_icmp_hdr;
+             ts           =  NetUtil_TS_Get();                  /* See Note #1a1A1.                                     */
+             NET_UTIL_VAL_COPY_SET_NET_32(&p_icmp_hdr_ts->TS_Rx, &ts);
+             msg_size_hdr =  NET_ICMPv4_HDR_SIZE_TS;
+             msg_len_min  =  NET_ICMPv4_MSG_LEN_MIN_TS;
+             break;
+
+
+        default:                                                /* See Note #2.                                         */
+             NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                                    (NET_ERR *)p_err);
+             return;
+    }
+
+
+
+                                                                /* ------------- GET ICMPv4 REPLY MSG BUF ------------- */
+    msg_len  = p_buf_hdr->ICMP_MsgLen;                          /* Adj req msg len for reply msg len.                   */
+                                                                /* Get IF's ICMPv4 MTU.                                 */
+    icmp_mtu = NetIF_MTU_GetProtocol(p_buf_hdr->IF_Nbr, NET_PROTOCOL_TYPE_ICMP_V4, NET_IF_FLAG_NONE, &err);
+    if (err != NET_IF_ERR_NONE) {
+        NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                               (NET_ERR *)p_err);
+        return;
+    }
+
+#if 0
+    msg_ix   = NET_BUF_DATA_IX_TX - msg_size_hdr;
+#else
+    msg_ix = 0u;
+    NetICMPv4_TxIxDataGet(p_buf_hdr->IF_Nbr,
+                          msg_len,
+                         &msg_ix,
+                         &err);
+#endif
+
+    buf_size_max = NetBuf_GetMaxSize((NET_IF_NBR     )p_buf_hdr->IF_Nbr,
+                                     (NET_TRANSACTION)NET_TRANSACTION_TX,
+                                     (NET_BUF       *)0,
+                                     (NET_BUF_SIZE   )msg_ix);
+
+    buf_size_max_data = (NET_BUF_SIZE)DEF_MIN(buf_size_max, icmp_mtu);
+
+    if (msg_len > buf_size_max_data) {                          /* If msg len > max data size, ...                      */
+        if (p_icmp_hdr->Type != NET_ICMPv4_MSG_TYPE_ECHO_REQ) { /* ... for Echo Req Msg ONLY,  ...                      */
+            NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                                   (NET_ERR *)p_err);
+            return;
+        }
+        msg_len = (CPU_INT16U)buf_size_max_data;                /* ... truncate msg len (see Note #3).                  */
+    }
+
+    if (msg_len < msg_len_min) {                                /* If msg len < min msg len, rtn err.                   */
+        NetICMPv4_TxPktDiscard((NET_BUF *)0,
+                               (NET_ERR *)p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxInvalidLenCtr);
+        return;
+    }
+
+                                                                /* Get reply msg buf.                                   */
+    p_msg_reply = NetBuf_Get(p_buf_hdr->IF_Nbr,
+                             NET_TRANSACTION_TX,
+                             msg_len,
+                             msg_ix,
+                            &msg_ix_offset,
+                             NET_BUF_FLAG_NONE,
+                            &err);
+    if (err != NET_BUF_ERR_NONE) {
+        NetICMPv4_TxPktDiscard(p_msg_reply, p_err);
+        return;
+    }
+
+    msg_ix       += msg_ix_offset;
+    msg_reply_ix  = msg_ix;
+    msg_len_rem   = msg_len;
+
+    p_msg_req = p_buf;
+
+    while ((p_msg_req != (NET_BUF *)0) && (msg_len_rem > 0)) {  /* For ALL ICMPv4 req msg pkt bufs, ...                 */
+                                                                /* ... copy rx'd ICMPv4 req msg into ICMP reply tx buf. */
+        p_msg_req_hdr  = &p_msg_req->Hdr;
+        p_msg_req_data = &p_msg_req->DataPtr[p_msg_req_hdr->ICMP_MsgIx];
+        msg_reply_len  =  p_msg_req_hdr->IP_DataLen;             /* Each pkt buf's IP data is ICMPv4 req msg data.       */
+        if (msg_reply_len > msg_len_rem) {                      /* If req msg pkt buf data len > rem msg len, ...       */
+            msg_reply_len = msg_len_rem;                        /* ... truncate req msg pkt buf data len.               */
+        }
+
+        NetBuf_DataWr((NET_BUF    *) p_msg_reply,
+                      (NET_BUF_SIZE) msg_reply_ix,
+                      (NET_BUF_SIZE) msg_reply_len,
+                      (CPU_INT08U *) p_msg_req_data,
+                      (NET_ERR    *)&err);
+        if (err != NET_BUF_ERR_NONE) {
+            NetICMPv4_TxPktDiscard(p_msg_reply, p_err);
+            return;
+        }
+
+        msg_reply_ix += msg_reply_len;
+        msg_len_rem  -= msg_reply_len;
+
+        p_msg_req      = p_msg_req_hdr->NextBufPtr;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (msg_len_rem > 0) {                                      /* If entire ICMPv4 req msg NOT copied, rtn err.        */
+        NetICMPv4_TxPktDiscard(p_msg_reply, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxInvalidLenCtr);
+        return;
+    }
+#endif
+
+                                                                /* Init reply msg buf ctrls.                            */
+    p_msg_reply_hdr                        = &p_msg_reply->Hdr;
+    p_msg_reply_hdr->ICMP_MsgIx            = (CPU_INT16U  )msg_ix;
+    p_msg_reply_hdr->ICMP_MsgLen           = (CPU_INT16U  )msg_len;
+    p_msg_reply_hdr->ICMP_HdrLen           = (CPU_INT16U  )msg_size_hdr;
+    p_msg_reply_hdr->TotLen                = (NET_BUF_SIZE)p_msg_reply_hdr->ICMP_MsgLen;
+    p_msg_reply_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_ICMP_V4;
+    p_msg_reply_hdr->ProtocolHdrTypeNetSub =  NET_PROTOCOL_TYPE_ICMP_V4;
+
+
+
+                                                                /* ----------- PREPARE ICMPv4 REPLY IP HDR ------------ */
+    p_ip_hdr               = (NET_IPv4_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+    TOS                   =  p_ip_hdr->TOS;                     /* See Note #1c1.                                       */
+    flags                 =  NET_IPv4_FLAG_NONE;                /* See Note #1c2.                                       */
+    p_msg_opt_cfg_route_ts = (NET_IPv4_OPT_CFG_ROUTE_TS *)0;
+
+
+
+                                                                /* ------------- PREPARE ICMPv4 REPLY MSG ------------- */
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv4_MSG_TYPE_ECHO_REQ:                      /* See Note #1d1.                                       */
+             p_icmp_hdr_echo         = (NET_ICMPv4_HDR_ECHO *)&p_msg_reply->DataPtr[p_msg_reply_hdr->ICMP_MsgIx];
+             p_icmp_hdr_echo->Type   =  NET_ICMPv4_MSG_TYPE_ECHO_REPLY;
+#if 0                                                           /* Copied from ICMPv4 req msg (see Note #1d3).          */
+             p_icmp_hdr_echo->Code   =  NET_ICMP_MSG_CODE_ECHO;
+                                                                /* See Note #1d3A.                                      */
+            (void)&p_icmp_hdr_echo->ID;
+            (void)&p_icmp_hdr_echo->SeqNbr;
+#endif
+                                                                /* Calc ICMP msg data len.                              */
+             if (p_buf_hdr->ICMP_MsgLen > msg_len_min) {
+                 p_msg_reply_hdr->DataIx  = (CPU_INT16U  )(p_msg_reply_hdr->ICMP_MsgIx  + msg_len_min);
+                 p_msg_reply_hdr->DataLen = (NET_BUF_SIZE)(p_msg_reply_hdr->ICMP_MsgLen - msg_len_min);
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #4].                */
+             } else {
+                 p_msg_reply_hdr->DataIx  = NET_BUF_IX_NONE;
+                 p_msg_reply_hdr->DataLen = 0u;
+#endif
+             }
+                                                                            /* Calc ICMPv4 msg chk sum (see Note #5).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_echo->ChkSum, 0x0000u);    /* Clr             chk sum (see Note #5b).  */
+#ifdef NET_ICMP_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumDataCalc((void     *) p_msg_reply,
+                                                              (void     *) 0,
+                                                              (CPU_INT16U) 0u,
+                                                              (NET_ERR  *)&err);
+#endif
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_echo->ChkSum, &msg_chk_sum);   /* Copy chk sum in net order (see Note #5c).*/
+             break;
+
+
+        case NET_ICMPv4_MSG_TYPE_TS_REQ:                        /* See Note #1d2.                                       */
+             p_icmp_hdr_ts            = (NET_ICMPv4_HDR_TS *)&p_msg_reply->DataPtr[p_msg_reply_hdr->ICMP_MsgIx];
+             ts                      =  NetUtil_TS_Get();       /* See Note #1d2A.                                      */
+             NET_UTIL_VAL_COPY_SET_NET_32(&p_icmp_hdr_ts->TS_Tx, &ts);
+
+             p_icmp_hdr_ts->Type      =  NET_ICMPv4_MSG_TYPE_TS_REPLY;
+#if 0                                                           /* Copied from ICMPv4 req msg (see Note #1d3).          */
+             p_icmp_hdr_ts->Code      =  NET_ICMPv4_MSG_CODE_TS;
+                                                                /* See Note #1d3A.                                      */
+            (void)&p_icmp_hdr_ts->ID;
+            (void)&p_icmp_hdr_ts->SeqNbr;
+#endif
+                                                                /* NULL ICMPv4 msg data len.                            */
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #4].                */
+             p_msg_reply_hdr->DataIx  =  NET_BUF_IX_NONE;
+             p_msg_reply_hdr->DataLen =  0;
+#endif
+                                                                            /* Calc ICMPv4 msg chk sum (see Note #5).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_ts->ChkSum, 0x0000u);      /* Clr             chk sum (see Note #5b).  */
+#ifdef NET_ICMP_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void     *) p_icmp_hdr_ts,
+                                                             (CPU_INT16U) p_msg_reply_hdr->ICMP_MsgLen,
+                                                             (NET_ERR  *)&err);
+#endif
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_ts->ChkSum, &msg_chk_sum);     /* Copy chk sum in net order (see Note #5c).*/
+             break;
+
+
+        default:                                                /* See Note #2.                                         */
+             NetICMPv4_TxPktDiscard(p_msg_reply, p_err);
+             return;
+    }
+
+#ifndef NET_ICMP_CHK_SUM_OFFLOAD_TX
+    if (err != NET_UTIL_ERR_NONE) {                             /* Chk err from NetUtil_16BitOnesCplChkSum()'s.         */
+        NetICMPv4_TxPktDiscard(p_msg_reply, p_err);
+        return;
+    }
+#endif
+
+
+
+
+                                                                /* --------------- TX ICMPv4 REPLY MSG ---------------- */
+    NetIPv4_Tx((NET_BUF      *)p_msg_reply,
+               (NET_IPv4_ADDR )p_buf_hdr->IP_AddrDest,
+               (NET_IPv4_ADDR )p_buf_hdr->IP_AddrSrc,
+               (NET_IPv4_TOS  )TOS,
+               (NET_IPv4_TTL  )NET_IPv4_TTL_DFLT,
+               (NET_IPv4_FLAGS)flags,
+               (void         *)p_msg_opt_cfg_route_ts,
+               (NET_ERR      *)p_err);
+
+
+
+                                                                /* ----- FREE ICMPv4 REPLY MSG / UPDATE TX STATS ------ */
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+             NetICMPv4_TxPktFree(p_msg_reply);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.TxMsgCtr);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv4.TxMsgReplyCtr);
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #6.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxPktDiscardedCtr);
+                                                                /* Rtn err from NetIPv4_Tx().                           */
+             return;
+
+
+        case NET_IPv4_ERR_TX_PKT:
+                                                                /* See Note #6.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv4.TxPktDiscardedCtr);
+            *p_err = NET_ERR_TX;
+             return;
+
+
+        default:
+             NetICMPv4_TxPktDiscard(p_msg_reply, p_err);
+             return;
+    }
+
+
+   *p_err = NET_ICMPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetICMPv4_TxIxDataGet()
+*
+* Description : (1) Retrieve stating index of ICMPv4 data from the data buffer beginning:
+*
+*                   (a) Starting index if found by adding up the header sizes of the lower-level
+*                       protocol headers.
+*
+*
+* Argument(s) : if_nbr      Network interface number to transmit data.
+*
+*               data_len    Length of the ICMPv4 payload.
+*
+*               p_ix        Pointer to the current protocol index.
+*               ----        Argument validated in NetICMPv4_TxMsgErr(),
+*                                                 NetICMPv4_TxMsgReqHandler(),
+*                                                 NetICMPv4_TxReqReply().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv4_ERR_NONE     No errors.
+*
+*                               -Returned by NetIF_MTU_GetProtocol()-
+*                               See NetIF_MTU_GetProtocol() for additional return error codes.
+*
+*                               -Returned by NetIPv4_GetTxDataIx()-
+*                               See NetIPv4_GetTxDataIx() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_TxMsgErr(),
+*               NetICMPv4_TxMsgReqHandler(),
+*               NetICMPv4_TxReqReply().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (2) If the payload is greater than the largest fragmentable IPv4 datagram (65535 bytes) the
+*                   packet must be discarded (see RFC #2460, Section 4.5).
+*********************************************************************************************************
+*/
+static  void  NetICMPv4_TxIxDataGet (NET_IF_NBR   if_nbr,
+                                     CPU_INT32U   data_len,
+                                     CPU_INT16U  *p_ix,
+                                     NET_ERR     *p_err)
+{
+    NET_MTU  mtu;
+
+
+    if (data_len > NET_IPv4_FRAG_SIZE_MAX) {
+       *p_err = NET_ICMPv4_ERR_INVALID_LEN;                     /* See Note #2.                                         */
+        return;
+    }
+
+    mtu = NetIF_MTU_GetProtocol(if_nbr, NET_PROTOCOL_TYPE_ICMP_V4, NET_IF_FLAG_NONE, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+        return;
+    }
+
+                                                                /* Add the lower-level hdr offsets.                     */
+    NetIPv4_TxIxDataGet(if_nbr, data_len, mtu, p_ix, p_err);
+    if (*p_err != NET_IPv4_ERR_NONE) {
+         return;
+    }
+
+   *p_err = NET_ICMPv4_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                        NetICMPv4_TxPktFree()
+*
+* Description : Free network buffer.
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_TxMsgErr(),
+*               NetICMPv4_TxMsgReq(),
+*               NetICMPv4_TxMsgReply().
+*
+* Note(s)     : (1) (a) Although ICMPv4 Transmit initially requests the network buffer for transmit,
+*                       the ICMPv4 layer does NOT maintain a reference to the buffer.
+*
+*                   (b) Also, since the network interface deallocation task frees ALL unreferenced buffers
+*                       after successful transmission, the ICMP layer must NOT free the transmit buffer.
+*
+*                       See also 'net_if.c  NetIF_TxDeallocTaskHandler()  Note #1c'.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv4_TxPktFree (NET_BUF  *p_buf)
+{
+   (void)&p_buf;                                                 /* Prevent 'variable unused' warning (see Note #1).     */
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetICMPv4_TxPktDiscard()
+*
+* Description : On any ICMPv4 transmit packet error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_TxMsgErr(),
+*               NetICMPv4_TxMsgReq(),
+*               NetICMPv4_TxMsgReply().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv4_TxPktDiscard (NET_BUF  *p_buf,
+                                      NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.ICMPv4.TxPktDiscardedCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)p_ctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* NET_ICMPv4_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_icmpv4.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_icmpv4.h
new file mode 100644
index 0000000..c720891
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_icmpv4.h
@@ -0,0 +1,284 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK ICMP V4 LAYER
+*                                 (INTERNET CONTROL MESSAGE PROTOCOL)
+*
+* Filename      : net_icmpv4.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 SL
+*********************************************************************************************************
+* Note(s)       : (1) Supports Internet Control Message Protocol as described in RFC #792 with the following
+*                     restrictions/constraints :
+*
+*                     (a) Does NOT support IP forwarding/routing               RFC #1122, Section 3.3.1
+*
+*                     (b) Does NOT support ICMP Address Mask Agent/Server      RFC #1122, Section 3.2.2.9
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/net_cfg_net.h"
+#include  "../../Source/net_type.h"
+#include  "../../Source/net_stat.h"
+#include  "../../Source/net.h"
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Network IPv4 Layer module is required for applications that requires IPv4 services.
+*
+*               See also 'net_cfg.h  IP LAYER CONFIGURATION'.
+*********************************************************************************************************
+*/
+
+#ifndef  NET_ICMPv4_MODULE_PRESENT
+#define  NET_ICMPv4_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_ICMPv4_HDR_SIZE_DFLT                          8
+
+#define  NET_ICMPv4_HDR_SIZE_DEST_UNREACH                NET_ICMPv4_HDR_SIZE_DFLT
+#define  NET_ICMPv4_HDR_SIZE_SRC_QUENCH                  NET_ICMPv4_HDR_SIZE_DFLT
+#define  NET_ICMPv4_HDR_SIZE_TIME_EXCEED                 NET_ICMPv4_HDR_SIZE_DFLT
+#define  NET_ICMPv4_HDR_SIZE_PARAM_PROB                  NET_ICMPv4_HDR_SIZE_DFLT
+#define  NET_ICMPv4_HDR_SIZE_ECHO                        NET_ICMPv4_HDR_SIZE_DFLT
+
+
+/*
+*********************************************************************************************************
+*                                    ICMPv4 MESSAGE TYPES & CODES
+*
+* Note(s) : (1) 'DEST_UNREACH' abbreviated to 'DEST' for ICMP 'Destination Unreachable' message
+*                error codes to enforce ANSI-compliance of 31-character symbol length uniqueness.
+*
+*           (2) ICMPv4 'Redirect' & 'Router' messages are NOT supported (see 'net_icmp.h  Note #1').
+*
+*           (3) ICMPv4 'Address Mask Request' messages received by this host are NOT supported (see
+*               'net_icmp.h  Note #3').
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------- ICMPv4 MSG TYPES ----------------- */
+#define  NET_ICMPv4_MSG_TYPE_NONE                        DEF_INT_08U_MAX_VAL
+
+#define  NET_ICMPv4_MSG_TYPE_ECHO_REPLY                    0u
+#define  NET_ICMPv4_MSG_TYPE_DEST_UNREACH                  3u
+#define  NET_ICMPv4_MSG_TYPE_SRC_QUENCH                    4u
+#define  NET_ICMPv4_MSG_TYPE_REDIRECT                      5u   /* See Note #2.                                         */
+#define  NET_ICMPv4_MSG_TYPE_ECHO_REQ                      8u
+#define  NET_ICMPv4_MSG_TYPE_ROUTE_AD                      9u   /* See Note #2.                                         */
+#define  NET_ICMPv4_MSG_TYPE_ROUTE_REQ                    10u   /* See Note #2.                                         */
+#define  NET_ICMPv4_MSG_TYPE_TIME_EXCEED                  11u
+#define  NET_ICMPv4_MSG_TYPE_PARAM_PROB                   12u
+#define  NET_ICMPv4_MSG_TYPE_TS_REQ                       13u
+#define  NET_ICMPv4_MSG_TYPE_TS_REPLY                     14u
+#define  NET_ICMPv4_MSG_TYPE_ADDR_MASK_REQ                17u
+#define  NET_ICMPv4_MSG_TYPE_ADDR_MASK_REPLY              18u
+
+
+                                                                /* ----------------- ICMPv4 MSG CODES ----------------- */
+#define  NET_ICMPv4_MSG_CODE_NONE                        DEF_INT_08U_MAX_VAL
+
+#define  NET_ICMPv4_MSG_CODE_ECHO                          0u
+#define  NET_ICMPv4_MSG_CODE_ECHO_REQ                      0u
+#define  NET_ICMPv4_MSG_CODE_ECHO_REPLY                    0u
+
+#define  NET_ICMPv4_MSG_CODE_DEST_NET                      0u   /* See Note #1.                                         */
+#define  NET_ICMPv4_MSG_CODE_DEST_HOST                     1u
+#define  NET_ICMPv4_MSG_CODE_DEST_PROTOCOL                 2u
+#define  NET_ICMPv4_MSG_CODE_DEST_PORT                     3u
+#define  NET_ICMPv4_MSG_CODE_DEST_FRAG_NEEDED              4u
+#define  NET_ICMPv4_MSG_CODE_DEST_ROUTE_FAIL               5u
+#define  NET_ICMPv4_MSG_CODE_DEST_NET_UNKNOWN              6u
+#define  NET_ICMPv4_MSG_CODE_DEST_HOST_UNKNOWN             7u
+#define  NET_ICMPv4_MSG_CODE_DEST_HOST_ISOLATED            8u
+#define  NET_ICMPv4_MSG_CODE_DEST_NET_TOS                 11u
+#define  NET_ICMPv4_MSG_CODE_DEST_HOST_TOS                12u
+
+#define  NET_ICMPv4_MSG_CODE_SRC_QUENCH                    0u
+
+#define  NET_ICMPv4_MSG_CODE_TIME_EXCEED_TTL               0u
+#define  NET_ICMPv4_MSG_CODE_TIME_EXCEED_FRAG_REASM        1u
+
+#define  NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR             0u
+#define  NET_ICMPv4_MSG_CODE_PARAM_PROB_OPT_MISSING        1u
+
+#define  NET_ICMPv4_MSG_CODE_TS                            0u
+#define  NET_ICMPv4_MSG_CODE_TS_REQ                        0u
+#define  NET_ICMPv4_MSG_CODE_TS_REPLY                      0u
+
+#define  NET_ICMPv4_MSG_CODE_ADDR_MASK                     0u
+#define  NET_ICMPv4_MSG_CODE_ADDR_MASK_REQ                 0u
+#define  NET_ICMPv4_MSG_CODE_ADDR_MASK_REPLY               0u
+
+                                                                                /* --------- IPv4 HDR PTR IXs --------- */
+#define  NET_ICMPv4_PTR_IX_BASE                            0
+#define  NET_ICMPv4_PTR_IX_IP_BASE                       NET_ICMPv4_PTR_IX_BASE
+
+#define  NET_ICMPv4_PTR_IX_IP_VER                       (NET_ICMPv4_PTR_IX_IP_BASE +  0)
+#define  NET_ICMPv4_PTR_IX_IP_HDR_LEN                   (NET_ICMPv4_PTR_IX_IP_BASE +  0)
+#define  NET_ICMPv4_PTR_IX_IP_TOS                       (NET_ICMPv4_PTR_IX_IP_BASE +  1)
+#define  NET_ICMPv4_PTR_IX_IP_TOT_LEN                   (NET_ICMPv4_PTR_IX_IP_BASE +  2)
+#define  NET_ICMPv4_PTR_IX_IP_ID                        (NET_ICMPv4_PTR_IX_IP_BASE +  4)
+#define  NET_ICMPv4_PTR_IX_IP_FLAGS                     (NET_ICMPv4_PTR_IX_IP_BASE +  6)
+#define  NET_ICMPv4_PTR_IX_IP_FRAG_OFFSET               (NET_ICMPv4_PTR_IX_IP_BASE +  6)
+#define  NET_ICMPv4_PTR_IX_IP_TTL                       (NET_ICMPv4_PTR_IX_IP_BASE +  8)
+#define  NET_ICMPv4_PTR_IX_IP_PROTOCOL                  (NET_ICMPv4_PTR_IX_IP_BASE +  9)
+#define  NET_ICMPv4_PTR_IX_IP_CHK_SUM                   (NET_ICMPv4_PTR_IX_IP_BASE + 10)
+#define  NET_ICMPv4_PTR_IX_IP_ADDR_SRC                  (NET_ICMPv4_PTR_IX_IP_BASE + 12)
+#define  NET_ICMPv4_PTR_IX_IP_ADDR_DEST                 (NET_ICMPv4_PTR_IX_IP_BASE + 16)
+#define  NET_ICMPv4_PTR_IX_IP_OPTS                      (NET_ICMPv4_PTR_IX_IP_BASE + 20)
+
+
+#define  NET_ICMPv4_MSG_PTR_NONE                         DEF_INT_08U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                   ICMP REQUEST MESSAGE IDENTIFICATION & SEQUENCE NUMBER DATA TYPE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_ICMPv4_REQ_ID_NONE                               0u
+#define  NET_ICMPv4_REQ_SEQ_NONE                              0u
+
+                                                                        /* ------- NET ICMP REQ MSG ID/SEQ NBR -------- */
+typedef  struct  net_icmpv4_req_id_seq {
+    CPU_INT16U      ID;                                                 /* ICMP Req Msg ID.                             */
+    CPU_INT16U      SeqNbr;                                             /* ICMP Req Msg Seq Nbr.                        */
+} NET_ICMPv4_REQ_ID_SEQ;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+
+void                   NetICMPv4_Init     (NET_ERR        *p_err);
+
+void                   NetICMPv4_Rx       (NET_BUF        *p_buf,
+                                           NET_ERR        *p_err);
+
+void                   NetICMPv4_TxMsgErr (NET_BUF        *p_buf,
+                                           CPU_INT08U      type,
+                                           CPU_INT08U      code,
+                                           CPU_INT08U      ptr,
+                                           NET_ERR        *p_err);
+
+CPU_INT16U             NetICMPv4_TxEchoReq(NET_IPv4_ADDR  *p_addr_dest,
+                                           CPU_INT16U      id,
+                                           void           *p_data,
+                                           CPU_INT16U      data_len,
+                                           NET_ERR        *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+#endif /* NET_ICMPv4_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_igmp.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_igmp.c
new file mode 100644
index 0000000..81c8dae
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_igmp.c
@@ -0,0 +1,2594 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK IGMP LAYER
+*                                 (INTERNET GROUP MANAGEMENT PROTOCOL)
+*
+* Filename      : net_igmp.c
+* Version       : V3.04.02
+* Programmer(s) : SR
+*********************************************************************************************************
+* Note(s)       : (1) Internet Group Management Protocol ONLY required for network interfaces that require
+*                     reception of IP class-D (multicast) packets (see RFC #1112, Section 3 'Levels of
+*                     Conformance : Level 2').
+*
+*                     (a) IGMP is NOT required for the transmission of IP class-D (multicast) packets
+*                         (see RFC #1112, Section 3 'Levels of Conformance : Level 1').
+*
+*                 (2) Supports Internet Group Management Protocol version 1, as described in RFC #1112
+*                     with the following restrictions/constraints :
+*
+*                     (a) Only one socket may receive datagrams for a specific host group address & port
+*                         number at any given time.
+*
+*                         See also 'net_sock.c  Note #1e'.
+*
+*                     (b) Since sockets do NOT automatically leave IGMP host groups when closed,
+*                         it is the application's responsibility to leave each host group once it is
+*                         no longer needed by the application.
+*
+*                     (c) Transmission of IGMP Query Messages NOT currently supported. #### NET-820
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_IGMP_MODULE
+#include  "net_igmp.h"
+#include  "net_ipv4.h"
+#include  "../../Source/net_buf.h"
+#include  "../../Source/net.h"
+#include  "../../IF/net_if.h"
+#include  "../../Source/net_util.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IGMP_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         IGMP HEADER DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IGMP_HDR_VER_MASK                          0xF0u
+#define  NET_IGMP_HDR_VER_SHIFT                            4u
+#define  NET_IGMP_HDR_VER                                  1u   /* Supports IGMPv1 ONLY (see 'net_igmp.h  Note #2').    */
+
+#define  NET_IGMP_HDR_TYPE_MASK                         0x0Fu
+
+
+/*
+*********************************************************************************************************
+*                                      IGMP MESSAGE SIZE DEFINES
+*
+* Note(s) : (1) RFC #1112, Appendix I, Section 'State Transition Diagram' states that "to be valid, the
+*               ... [received] message[s] must be at least 8 octets long".
+*********************************************************************************************************
+*/
+
+#define  NET_IGMP_MSG_LEN                  NET_IGMP_HDR_SIZE
+#define  NET_IGMP_MSG_LEN_DATA                             0
+
+
+/*
+*********************************************************************************************************
+*                                      IGMP MESSAGE TYPE DEFINES
+*
+* Note(s) : (1) RFC #1112, Appendix I, Section 'Type' states that "there are two types of IGMP message[s]
+*               ... to hosts" :
+*
+*               (a) 1 = Host Membership Query
+*               (b) 2 = Host Membership Report
+*********************************************************************************************************
+*/
+
+#define  NET_IGMP_MSG_TYPE_QUERY                           1u   /* See Note #1a.                                        */
+#define  NET_IGMP_MSG_TYPE_REPORT                          2u   /* See Note #1b.                                        */
+
+
+/*
+*********************************************************************************************************
+*                                       IGMP HOST GROUP STATES
+*
+*                                         -------------------
+*                                         |                 |
+*                                         |                 |
+*                                         |                 |
+*                                         |                 |
+*                            ------------>|      FREE       |<------------
+*                            |            |                 |            |
+*                            |            |                 |            |
+*                            |            |                 |            |
+*                            |            |                 |            |
+*                            |            -------------------            | (1e) LEAVE GROUP
+*                            |                     |                     |
+*                            | (1e) LEAVE GROUP    | (1a) JOIN GROUP     |
+*                            |                     |                     |
+*                   -------------------            |            -------------------
+*                   |                 |<------------            |                 |
+*                   |                 |                         |                 |
+*                   |                 |<------------------------|                 |
+*                   |                 |  (1c) QUERY  RECEIVED   |                 |
+*                   |    DELAYING     |                         |      IDLE       |
+*                   |                 |------------------------>|                 |
+*                   |                 |  (1b) REPORT RECEIVED   |                 |
+*                   |                 |                         |                 |
+*                   |                 |------------------------>|                 |
+*                   -------------------  (1d) TIMER  EXPIRED    -------------------
+*
+*
+* Note(s) : (1) RFC #1112, Appendix I, Sections 'Informal Protocol Description' & 'State Transition Diagram'
+*               outline the IGMP state diagram :
+*
+*               (a) An application performs a request to join a multicast group.  A new IGMP host group
+*                   entry is allocated from the IGMP host group pool & inserted into the IGMP Host Group
+*                   List in the 'DELAYING' state.  A timer is started to transmit a report to inform the
+*                   IGMP enabled router.
+*
+*               (b) The host receives a valid IGMP Host Membership Report message, on the interface the
+*                   host has joined the group on.  The timer is stopped & the host group transitions
+*                   into the 'IDLE' state.
+*
+*               (c) A query is received for that IGMP group.  The host group transitions into the 'DELAYING'
+*                   state & a timer is started to transmit a report to inform the IGMP router.
+*
+*               (d) The report delay timer expires for the group & a report for that group is transmitted.
+*                   The host group then transitions into the 'IDLE' state.
+*
+*               (e) The application leaves the group on the interface; the IGMP host group is then freed.
+*
+*           (2) RFC #1112, Section 7.2 states that "to support IGMP, every level 2 host must join the
+*               all-hosts group (address 224.0.0.1) ... and must remain a member for as long as the
+*               host is active".
+*
+*               (a) Therefore, the group 224.0.0.1 is considered a special group, & is always in the
+*                   'STATIC' state, meaning it neither can be deleted, nor be put in the 'IDLE' or
+*                   'DELAYING' state.
+*
+*               (b) However, since network interfaces are not yet enabled at IGMP initialization time,
+*                   the host delays joining the "all-hosts" group on an interface until the first group
+*                   membership is requested on an interface.
+*********************************************************************************************************
+*/
+
+#define  NET_IGMP_HOST_GRP_STATE_NONE                      0u
+#define  NET_IGMP_HOST_GRP_STATE_FREE                      1u
+#define  NET_IGMP_HOST_GRP_STATE_DELAYING                  2u
+#define  NET_IGMP_HOST_GRP_STATE_IDLE                      3u
+
+#define  NET_IGMP_HOST_GRP_STATE_STATIC                   10u   /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                         IGMP REPORT DEFINES
+*
+* Note(s) : (1) RFC #1112, Appendix I, Section 'Informal Protocol Description' states that :
+*
+*               (a) "When a host joins a new group, it should immediately transmit a Report for that
+*                    group [...].  To cover the possibility of the initial Report being lost or damaged,
+*                    it is recommended that it be repeated once or twice after short delays."
+*
+*                    The delay between the report transmissions is set to 2 seconds in this implementation.
+*
+*               (b) "When a host receives a Query [...] it starts a report delay timer for each of its
+*                    group memberships on the network interface of the incoming Query.  Each timer is
+*                    set to a different, randomly-chosen value between zero and [10] seconds."
+*
+*           (2) When a transmit error occurs when attempting to transmit an IGMP report, a new timer
+*               is set with a delay of NET_IGMP_HOST_GRP_REPORT_DLY_RETRY_SEC seconds to retransmit
+*               the report.
+*********************************************************************************************************
+*/
+
+#define  NET_IGMP_HOST_GRP_REPORT_DLY_JOIN_SEC             2    /* See Note #1a.                                        */
+                                                                /* See Note #1b.                                        */
+#define  NET_IGMP_HOST_GRP_REPORT_DLY_MIN_SEC              0
+#define  NET_IGMP_HOST_GRP_REPORT_DLY_MAX_SEC             10
+
+#define  NET_IGMP_HOST_GRP_REPORT_DLY_RETRY_SEC            2    /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                          IGMP FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ NET IGMP FLAGS ------------------ */
+#define  NET_IGMP_FLAG_NONE                       DEF_BIT_NONE
+#define  NET_IGMP_FLAG_USED                       DEF_BIT_00    /* IGMP host grp cur used; i.e. NOT in free pool.       */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                 IGMP HOST GROUP QUANTITY DATA TYPE
+*
+* Note(s) : (1) NET_IGMP_HOST_GRP_NBR_MAX  SHOULD be #define'd based on 'NET_IGMP_HOST_GRP_QTY' data type
+*               declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_IGMP_HOST_GRP_QTY;                     /* Defines max qty of IGMP host groups to support.      */
+
+
+/*
+*********************************************************************************************************
+*                                   IGMP HOST GROUP STATE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_IGMP_HOST_GRP_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                        IGMP FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_FLAGS   NET_IGMP_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                             IGMP HEADER
+*
+* Note(s) : (1) See RFC #1112, Appendix I for IGMP packet header format.
+*
+*           (2) IGMP Version Number & Message Type are encoded in the first octet of an IGMP header as follows :
+*
+*                         7 6 5 4   3 2 1 0
+*                       ---------------------
+*                       |  V E R  | T Y P E |
+*                       ---------------------
+*
+*                   where
+*                           VER         IGMP version; currently 1 (see 'net_igmp.h  Note #2')
+*                           TYPE        IGMP message type         (see 'net_igmp.h  IGMP MESSAGE TYPE DEFINES)
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET IGMP HDR ------------------- */
+typedef  struct  net_igmp_hdr {
+    CPU_INT08U      Ver_Type;                                   /* IGMP pkt  ver/type (see Note #2).                    */
+    CPU_INT08U      Unused;
+    CPU_INT16U      ChkSum;                                     /* IGMP pkt  chk sum.                                   */
+    NET_IPv4_ADDR   AddrGrp;                                    /* IPv4   host grp addr.                                */
+} NET_IGMP_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                     IGMP HOST GROUP DATA TYPES
+*
+*                                          NET_IGMP_HOST_GRP
+*                                         |-----------------|
+*                                         | Host Group Type |
+*                           Previous      |-----------------|
+*                          Host Group <------------O        |
+*                                         |-----------------|        Next
+*                                         |        O------------> Host Group
+*                                         |-----------------|
+*                                         |        O------------> Host Group
+*                                         |-----------------|        Timer
+*                                         |    Interface    |
+*                                         |     Number      |
+*                                         |-----------------|
+*                                         |   IP Address    |
+*                                         |-----------------|
+*                                         |      State      |
+*                                         |-----------------|
+*                                         |    Reference    |
+*                                         |     Counter     |
+*                                         |-----------------|
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- NET IGMP HOST GRP ----------------- */
+typedef  struct  net_igmp_host_grp  NET_IGMP_HOST_GRP;
+
+struct  net_igmp_host_grp {
+    NET_IGMP_HOST_GRP        *PrevPtr;                          /* Ptr to PREV IGMP host grp.                           */
+    NET_IGMP_HOST_GRP        *NextPtr;                          /* Ptr to NEXT IGMP host grp.                           */
+
+    NET_TMR                  *TmrPtr;                           /* Ptr to host grp TMR.                                 */
+
+    NET_IF_NBR                IF_Nbr;                           /* IGMP   host grp IF nbr.                              */
+    NET_IPv4_ADDR             AddrGrp;                          /* IGMP   host grp IPv4 addr.                           */
+
+    NET_IGMP_HOST_GRP_STATE   State;                            /* IGMP   host grp state.                               */
+    CPU_INT16U                RefCtr;                           /* IGMP   host grp ref ctr.                             */
+
+    NET_IGMP_FLAGS            Flags;                            /* IGMP   host grp flags.                               */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_IGMP_HOST_GRP   NetIGMP_HostGrpTbl[NET_MCAST_CFG_HOST_GRP_NBR_MAX];
+static  NET_IGMP_HOST_GRP  *NetIGMP_HostGrpPoolPtr;        /* Ptr to pool of free host grp.                       */
+static  NET_STAT_POOL       NetIGMP_HostGrpPoolStat;
+
+static  NET_IGMP_HOST_GRP  *NetIGMP_HostGrpListHead;       /* Ptr to head of IGMP Host Grp List.                  */
+
+static  CPU_BOOLEAN         NetIGMP_AllHostsJoinedOnIF[NET_IF_NBR_IF_TOT];
+
+static  RAND_NBR            NetIGMP_RandSeed;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                                            /* ------- RX FNCTS ------- */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void                NetIGMP_RxPktValidateBuf       (NET_BUF_HDR        *p_buf_hdr,
+                                                            NET_ERR            *p_err);
+#endif /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+
+static  void                NetIGMP_RxPktValidate          (NET_BUF            *p_buf,
+                                                            NET_BUF_HDR        *p_buf_hdr,
+                                                            NET_IGMP_HDR       *p_igmp_hdr,
+                                                            NET_ERR            *p_err);
+
+
+static  void                NetIGMP_RxMsgQuery             (NET_IF_NBR          if_nbr,
+                                                            NET_IGMP_HDR       *p_igmp_hdr);
+
+static  void                NetIGMP_RxMsgReport            (NET_IF_NBR          if_nbr,
+                                                            NET_IGMP_HDR       *p_igmp_hdr);
+
+
+static  void                NetIGMP_RxPktFree              (NET_BUF            *p_buf);
+
+static  void                NetIGMP_RxPktDiscard           (NET_BUF            *p_buf,
+                                                            NET_ERR            *p_err);
+
+
+                                                                                            /* ------- TX FNCTS ------- */
+static  void                NetIGMP_TxMsg                  (NET_IF_NBR          if_nbr,
+                                                            NET_IPv4_ADDR       addr_src,
+                                                            NET_IPv4_ADDR       addr_grp,
+                                                            CPU_INT08U          type,
+                                                            NET_ERR            *p_err);
+
+static  void                NetIGMP_TxMsgReport            (NET_IGMP_HOST_GRP  *p_host_grp,
+                                                            NET_ERR            *p_err);
+
+static  void                NetIGMP_TxIxDataGet            (NET_IF_NBR          if_nbr,
+                                                            CPU_INT16U          data_len,
+                                                            CPU_INT16U         *p_ix,
+                                                            NET_ERR            *p_err);
+
+static  void                NetIGMP_TxPktFree              (NET_BUF            *p_buf);
+
+static  void                NetIGMP_TxPktDiscard           (NET_BUF            *p_buf,
+                                                            NET_ERR            *p_err);
+
+
+                                                                                            /* -- IGMP HOST GRP FNCTS - */
+
+static  NET_IGMP_HOST_GRP  *NetIGMP_HostGrpSrch            (NET_IF_NBR          if_nbr,
+                                                            NET_IPv4_ADDR       addr_grp);
+
+
+static  NET_IGMP_HOST_GRP  *NetIGMP_HostGrpAdd             (NET_IF_NBR          if_nbr,
+                                                            NET_IPv4_ADDR       addr_grp,
+                                                            NET_ERR            *p_err);
+
+static  void                NetIGMP_HostGrpRemove          (NET_IGMP_HOST_GRP  *p_host_grp);
+
+static  void                NetIGMP_HostGrpInsert          (NET_IGMP_HOST_GRP  *p_host_grp);
+
+static  void                NetIGMP_HostGrpUnlink          (NET_IGMP_HOST_GRP  *p_host_grp);
+
+
+static  void                NetIGMP_HostGrpReportDlyTimeout(void               *p_host_grp_timeout);
+
+
+static  NET_IGMP_HOST_GRP  *NetIGMP_HostGrpGet             (NET_ERR            *p_err);
+
+static  void                NetIGMP_HostGrpFree            (NET_IGMP_HOST_GRP  *p_host_grp);
+
+static  void                NetIGMP_HostGrpClr             (NET_IGMP_HOST_GRP  *p_host_grp);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            NetIGMP_Init()
+*
+* Description : (1) Initialize Internet Group Management Protocol Layer :
+*
+*                   (a) Initialize IGMP host group pool
+*                   (b) Initialize IGMP host group table
+*                   (c) Initialize IGMP Host Group List pointer
+*                   (d) Initialize IGMP all-hosts groups
+*                   (e) Initialize IGMP random seed
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) IGMP host group pool MUST be initialized PRIOR to initializing the pool with pointers
+*                   to IGMP host group.
+*
+*               (3) (a) RFC #1112, Section 7.2 states that "every level 2 host must join the 'all-hosts'
+*                       group ... on each network interface at initialization time and must remain a
+*                       member for as long as the host is active".
+*
+*                   (b) However, network interfaces are not enabled at IGMP initialization time &
+*                       cannot be completely configured.  Therefore, joining the "all-hosts" group is
+*                       postponed until the first group membership is requested on an interface. #### NET-802
+*
+*                   See also 'net_igmp.h  IGMP HOST GROUP STATES        Note #2b'
+*                          & 'net_igmp.c  NetIGMP_HostGrpJoinHandler()  Note #7'.
+*********************************************************************************************************
+*/
+
+void  NetIGMP_Init (void)
+{
+    NET_IGMP_HOST_GRP      *p_host_grp;
+    NET_IGMP_HOST_GRP_QTY   i;
+    NET_IF_NBR              if_nbr;
+    NET_ERR                 err;
+
+
+                                                                /* ---------- INIT IGMP HOST GRP POOL/STATS ----------- */
+    NetIGMP_HostGrpPoolPtr = DEF_NULL;                          /* Init-clr IGMP host grp pool (see Note #2).           */
+
+    NetStat_PoolInit(&NetIGMP_HostGrpPoolStat,
+                      NET_MCAST_CFG_HOST_GRP_NBR_MAX,
+                     &err);
+
+
+                                                                /* -------------- INIT IGMP HOST GRP TBL -------------- */
+    p_host_grp = &NetIGMP_HostGrpTbl[0];
+    for (i = 0u; i < NET_MCAST_CFG_HOST_GRP_NBR_MAX; i++) {
+        p_host_grp->State = NET_IGMP_HOST_GRP_STATE_FREE;       /* Init each IGMP host grp as free/NOT used.            */
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        NetIGMP_HostGrpClr(p_host_grp);
+#endif
+                                                                /* Free each IGMP host grp to pool (see Note #2).       */
+        p_host_grp->NextPtr     = NetIGMP_HostGrpPoolPtr;
+        NetIGMP_HostGrpPoolPtr = p_host_grp;
+
+        p_host_grp++;
+    }
+
+
+    NetIGMP_HostGrpListHead = (NET_IGMP_HOST_GRP *)0;           /* ----------- INIT IGMP HOST GRP LIST PTR ------------ */
+
+
+                                                                /* ---------------- INIT ALL-HOSTS GRP ---------------- */
+    for (if_nbr = NET_IF_NBR_BASE_CFGD; if_nbr < NET_IF_NBR_IF_TOT; if_nbr++) {
+        NetIGMP_AllHostsJoinedOnIF[if_nbr] = DEF_NO;            /* See Note #3.                                         */
+    }
+
+
+                                                                /* ------------------ INIT RAND SEED ------------------ */
+    NetIGMP_RandSeed = 1u;                                      /* See 'lib_math.c  Math_Init()  Note #2'.              */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIGMP_HostGrpJoin()
+*
+* Description : Join a host group.
+*
+* Argument(s) : if_nbr      Interface number to join host group.
+*
+*               addr_grp    IP address of host group to join (see Note #2).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   - RETURNED BY NetIGMP_HostGrpJoinHandler() : -
+*                               NET_IGMP_ERR_NONE                   Host group successfully joined.
+*                               NET_IGMP_ERR_INVALID_ADDR_GRP       Invalid group address.
+*                               NET_IGMP_ERR_HOST_GRP_NONE_AVAIL    NO available host group to allocate.
+*                               NET_IGMP_ERR_HOST_GRP_INVALID_TYPE  Host group is NOT a valid host group type.
+*                               NET_IF_ERR_INVALID_IF               Invalid OR disabled configured interface.
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   --- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if host group successfully joined.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIGMP_HostGrpJoin() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIGMP_HostGrpJoinHandler()  Note #2'.
+*
+*               (2) IP host group address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIGMP_HostGrpJoin (NET_IF_NBR      if_nbr,
+                                  NET_IPv4_ADDR   addr_grp,
+                                  NET_ERR        *p_err)
+{
+    CPU_BOOLEAN  host_grp_join;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetIGMP_HostGrpJoin, p_err); /* Acquire net lock (see Note #1b).                     */
+    if (*p_err != NET_ERR_NONE) {
+         return (DEF_FAIL);
+    }
+                                                                /* Join host grp.                                       */
+    host_grp_join = NetIGMP_HostGrpJoinHandler(if_nbr, addr_grp, p_err);
+
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (host_grp_join);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIGMP_HostGrpJoinHandler()
+*
+* Description : (1) Join a host group :
+*
+*                   (a) Validate interface number
+*                   (b) Validate internet group address
+*                   (c) Search IGMP Host Group List for host group with corresponding address
+*                           & interface number
+*                   (d) If host group NOT found, allocate new host group.
+*                   (e) Advertise membership to multicast router(s)
+*
+*
+* Argument(s) : if_nbr      Interface number to join host group (see Note  #4).
+*
+*               addr_grp    IP address of host group to join    (see Notes #5 & #6).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IGMP_ERR_NONE                   Host group successfully joined.
+*                               NET_IGMP_ERR_INVALID_ADDR_GRP       Invalid host group address.
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   --- RETURNED BY NetIGMP_HostGrpAdd() : ---
+*                               NET_IGMP_ERR_HOST_GRP_NONE_AVAIL    NO available host group to allocate.
+*                               NET_IGMP_ERR_HOST_GRP_INVALID_TYPE  Host group is NOT a valid host group type.
+*
+*                                                                   - RETURNED BY NetIF_IsEnCfgdHandler() : --
+*                               NET_IF_ERR_INVALID_IF               Invalid OR disabled configured interface.
+*
+* Return(s)   : DEF_OK,   if host group successfully joined.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIGMP_HostGrpJoin().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIGMP_HostGrpJoinHandler() is called by network protocol suite function(s) & MUST
+*                   be called with the global network lock already acquired.
+*
+*                   See also 'NetIGMP_HostGrpJoin()  Note #1'.
+*
+*               (3) NetIGMP_HostGrpJoinHandler() blocked until network initialization completes.
+*
+*               (4) IGMP host groups can ONLY be joined on configured interface(s); NOT on any
+*                   localhost/loopback interface(s).
+*
+*               (5) IP host group address MUST be in host-order.
+*
+*               (6) (a) RFC #1112, Section 4 specifies that "class D ... host group addresses range" :
+*
+*                       (1) "from 224.0.0.0" ...
+*                       (2) "to   239.255.255.255".
+*
+*                   (b) However, RFC #1112, Section 4 adds that :
+*
+*                       (1) "address 224.0.0.0 is guaranteed not to be assigned to any group", ...
+*                       (2) "and 224.0.0.1 is assigned to the permanent group of all IP hosts."
+*
+*               (7) (a) RFC #1112, Section 7.2 states that "every level 2 host must join the 'all-hosts'
+*                       group ... on each network interface at initialization time and must remain a
+*                       member for as long as the host is active".
+*
+*                   (b) However, network interfaces are not enabled at IGMP initialization time &
+*                       cannot be completely configured.  Therefore, joining the "all-hosts" group is
+*                       postponed until the first group membership is requested on an interface. #### NET-802
+*
+*                   See also 'net_igmp.h  IGMP HOST GROUP STATES  Note #2b'
+*                          & 'net_igmp.c  NetIGMP_Init()          Note #3'.
+*
+*               (8) RFC #1112, Section 7.1 states that :
+*
+*                   (a) "It is permissible to join the same group on more than one interface"; ...
+*                   (b) "It is also permissible for more than one upper-layer protocol to request
+*                        membership in the same group."
+*
+*               (9) (a) RFC #1112, Appendix I, Section 'Informal Protocol Description' states that "when
+*                       a host joins a new group, it should immediately transmit a Report for that group.
+*                       ... To cover the possibility of the initial Report being lost of damaged, it is
+*                       recommended that it be repeated once or twice after short delays".  Hence :
+*
+*                       (1) An IGMP Report is transmitted just after inserting the host group into IGMP
+*                           Host Group List;
+*
+*                       (2) A Report timer is configured so a second Report is transmitted after a delay
+*                           of NET_IGMP_HOST_GRP_REPORT_DLY_JOIN_SEC seconds.
+*
+*                   (b) However, failure to transmit the initial report or to configure the timer does
+*                       NOT prevent the host group from being inserted into the IGMP Host Group List.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIGMP_HostGrpJoinHandler (NET_IF_NBR      if_nbr,
+                                         NET_IPv4_ADDR   addr_grp,
+                                         NET_ERR        *p_err)
+{
+    NET_IGMP_HOST_GRP  *p_host_grp;
+    NET_TMR_TICK        timeout_tick;
+    NET_ERR             err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    NetIF_IsEnCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {                            /* If cfg'd IF NOT en'd (see Note #4), ...              */
+         return (DEF_FAIL);                                     /* ... rtn err.                                         */
+    }
+
+                                                                /* Chk all-hosts grp (see Note #7b).                    */
+    if (NetIGMP_AllHostsJoinedOnIF[if_nbr] != DEF_YES) {
+        NetIGMP_HostGrpAdd(if_nbr,
+                           NET_IPv4_ADDR_MULTICAST_ALL_HOSTS,
+                           p_err);
+        if (*p_err != NET_IGMP_ERR_NONE) {
+             return (DEF_FAIL);
+        }
+
+        NetIGMP_AllHostsJoinedOnIF[if_nbr] = DEF_YES;
+    }
+
+
+                                                                /* -------------- VALIDATE HOST GRP ADDR -------------- */
+    if (addr_grp == NET_IPv4_ADDR_MULTICAST_ALL_HOSTS) {        /* If host grp addr = all-hosts addr, ...               */
+       *p_err =  NET_IGMP_ERR_NONE;                             /* ... rtn (see Note #6b2).                             */
+        return (DEF_OK);
+    }
+
+    if ((addr_grp < NET_IPv4_ADDR_MULTICAST_HOST_MIN) ||        /* If host grp addr NOT valid multicast (see Note #6a), */
+        (addr_grp > NET_IPv4_ADDR_MULTICAST_HOST_MAX)) {
+        *p_err =  NET_IGMP_ERR_INVALID_ADDR_GRP;                /* ... rtn err.                                         */
+         return (DEF_FAIL);
+    }
+
+                                                                /* ---------------- SRCH HOST GRP LIST ---------------- */
+    p_host_grp = NetIGMP_HostGrpSrch(if_nbr, addr_grp);
+    if (p_host_grp != (NET_IGMP_HOST_GRP *)0) {                 /* If host grp found, ...                               */
+        p_host_grp->RefCtr++;                                   /* ... inc ref ctr.                                     */
+       *p_err =  NET_IGMP_ERR_NONE;
+        return (DEF_OK);
+    }
+
+    p_host_grp = NetIGMP_HostGrpAdd(if_nbr, addr_grp, p_err);    /* Add new host grp into Host Grp List (see Note #8a).  */
+    if (*p_err != NET_IGMP_ERR_NONE) {
+         return (DEF_FAIL);
+    }
+
+
+                                                                /* --------------- ADVERTISE MEMBERSHIP --------------- */
+    NetIGMP_TxMsgReport(p_host_grp, &err);                      /* See Note #9a1.                                       */
+
+                                                                /* Cfg report timeout.                                  */
+    timeout_tick      = (NET_TMR_TICK)(NET_IGMP_HOST_GRP_REPORT_DLY_JOIN_SEC * NET_TMR_TIME_TICK_PER_SEC);
+    p_host_grp->TmrPtr =  NetTmr_Get((CPU_FNCT_PTR ) NetIGMP_HostGrpReportDlyTimeout,
+                                    (void        *) p_host_grp, /* See Note #7a2.                                       */
+                                    (NET_TMR_TICK ) timeout_tick,
+                                    (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                    (NET_ERR     *)&err);
+
+    p_host_grp->State = (err == NET_TMR_ERR_NONE) ? NET_IGMP_HOST_GRP_STATE_DELAYING
+                                                 : NET_IGMP_HOST_GRP_STATE_IDLE;
+
+   *p_err =  NET_IGMP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIGMP_HostGrpLeave()
+*
+* Description : Leave a host group.
+*
+* Argument(s) : if_nbr      Interface number to leave host group.
+*
+*               addr_grp    IP address of host group to leave (see Note #2).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   - RETURNED BY NetIGMP_HostGrpLeaveHandler() : -
+*                               NET_IGMP_ERR_NONE                   Host group successfully left.
+*                               NET_IGMP_ERR_HOST_GRP_NOT_FOUND     Host group NOT found.
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if host group successfully left.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIGMP_HostGrpLeave() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIGMP_HostGrpLeaveHandler()  Note #2'.
+*
+*               (2) IP host group address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIGMP_HostGrpLeave (NET_IF_NBR      if_nbr,
+                                   NET_IPv4_ADDR   addr_grp,
+                                   NET_ERR        *p_err)
+{
+    CPU_BOOLEAN  host_grp_leave;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+
+                                                                /* Acquire net lock (see Note #1b).                     */
+    Net_GlobalLockAcquire((void *)&NetIGMP_HostGrpLeave, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return (DEF_FAIL);
+    }
+                                                                /* Leave host grp.                                      */
+    host_grp_leave = NetIGMP_HostGrpLeaveHandler(if_nbr, addr_grp, p_err);
+
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+
+    return (host_grp_leave);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIGMP_HostGrpLeaveHandler()
+*
+* Description : (1) Leave a host group :
+*
+*                   (a) Search IGMP Host Group List for host group with corresponding address
+*                           & interface number
+*                   (b) If host group found, remove host group from IGMP Host Group List
+*
+*
+* Argument(s) : if_nbr      Interface number to leave host group.
+*
+*               addr_grp    IP address of host group to leave (see Note #4).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IGMP_ERR_NONE                   Host group successfully left.
+*                               NET_IGMP_ERR_HOST_GRP_NOT_FOUND     Host group NOT found.
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+* Return(s)   : DEF_OK,   if host group successfully left.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIGMP_HostGrpLeave().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) NetIGMP_HostGrpLeaveHandler() is called by network protocol suite function(s) & MUST
+*                   be called with the global network lock already acquired.
+*
+*                   See also 'NetIGMP_HostGrpLeave()  Note #1'.
+*
+*               (3) NetIGMP_HostGrpLeaveHandler() blocked until network initialization completes.
+*
+*               (4) IP host group address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIGMP_HostGrpLeaveHandler (NET_IF_NBR      if_nbr,
+                                          NET_IPv4_ADDR   addr_grp,
+                                          NET_ERR        *p_err)
+{
+    NET_IGMP_HOST_GRP  *p_host_grp;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ---------------- SRCH HOST GRP LIST ---------------- */
+    p_host_grp = NetIGMP_HostGrpSrch(if_nbr, addr_grp);
+    if (p_host_grp == (NET_IGMP_HOST_GRP *)0) {                 /* If host grp NOT found, ...                           */
+       *p_err =  NET_IGMP_ERR_HOST_GRP_NOT_FOUND;               /* ... rtn err.                                         */
+        return (DEF_FAIL);
+    }
+
+    p_host_grp->RefCtr--;                                        /* Dec ref ctr.                                         */
+    if (p_host_grp->RefCtr < 1) {                                /* If last ref to host grp, ...                         */
+        NetIGMP_HostGrpRemove(p_host_grp);                       /* ... remove host grp from Host Grp List.              */
+    }
+
+
+   *p_err =  NET_IGMP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIGMP_IsGrpJoinedOnIF()
+*
+* Description : Check for joined host group on specified interface.
+*
+* Argument(s) : if_nbr      Interface number to search.
+*
+*               addr_grp    IP address of host group.
+*
+* Return(s)   : DEF_YES, if host group address joined on interface.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIP_RxPktValidate().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIGMP_IsGrpJoinedOnIF (NET_IF_NBR     if_nbr,
+                                      NET_IPv4_ADDR  addr_grp)
+{
+    NET_IGMP_HOST_GRP  *p_host_grp;
+    CPU_BOOLEAN         grp_joined;
+
+
+    p_host_grp  =  NetIGMP_HostGrpSrch(if_nbr, addr_grp);
+    grp_joined = (p_host_grp != (NET_IGMP_HOST_GRP *)0) ? DEF_YES : DEF_NO;
+
+    return (grp_joined);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             NetIGMP_Rx()
+*
+* Description : (1) Process received IGMP packets & update host group status :
+*
+*                   (a) Validate IGMP packet
+*                   (b) Update   IGMP host group status
+*                   (c) Free     IGMP packet
+*                   (d) Update receive statistics
+*
+*               (2) Although IGMP data units are typically referred to as 'messages' (see RFC #1112,
+*                   Appendix I), the term 'IGMP packet' (see RFC #1983, 'packet') is used for IGMP
+*                   Receive until the packet is validated as an IGMP message.
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer that received IGMP packet.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IGMP_ERR_NONE               IGMP packet successfully received & processed.
+*
+*                                                               ---- RETURNED BY NetIGMP_RxPktDiscard() : ----
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIP_RxPktDemuxDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIGMP_Rx (NET_BUF  *p_buf,
+                  NET_ERR  *p_err)
+{
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    NET_CTR       *p_ctr;
+#endif
+    NET_BUF_HDR   *p_buf_hdr;
+    NET_IGMP_HDR  *p_igmp_hdr;
+    NET_IF_NBR     if_nbr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetIGMP_RxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.IGMP.RxMsgCtr);
+
+
+                                                                /* -------------- VALIDATE RX'D IGMP PKT -------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetIGMP_RxPktValidateBuf(p_buf_hdr, p_err);                 /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_IGMP_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetIGMP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+#endif
+    p_igmp_hdr = (NET_IGMP_HDR *)&p_buf->DataPtr[p_buf_hdr->IGMP_MsgIx];
+    if_nbr    =  p_buf_hdr->IF_Nbr;
+    NetIGMP_RxPktValidate(p_buf, p_buf_hdr, p_igmp_hdr, p_err); /* Validate rx'd pkt.                                   */
+
+
+                                                                /* ------------------ DEMUX IGMP MSG ------------------ */
+    switch (*p_err) {
+        case NET_IGMP_ERR_MSG_TYPE_QUERY:
+             NetIGMP_RxMsgQuery(if_nbr, p_igmp_hdr);
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+             p_ctr = &Net_StatCtrs.IGMP.RxMsgQueryCtr;
+#endif
+             break;
+
+
+        case NET_IGMP_ERR_MSG_TYPE_REPORT:
+             NetIGMP_RxMsgReport(if_nbr, p_igmp_hdr);
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+             p_ctr = &Net_StatCtrs.IGMP.RxMsgReportCtr;
+#endif
+             break;
+
+
+        case NET_IGMP_ERR_INVALID_VER:
+        case NET_IGMP_ERR_INVALID_TYPE:
+        case NET_IGMP_ERR_INVALID_LEN:
+        case NET_IGMP_ERR_INVALID_CHK_SUM:
+        case NET_IGMP_ERR_INVALID_ADDR_DEST:
+        case NET_IGMP_ERR_INVALID_ADDR_GRP:
+        default:
+             NetIGMP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+    NetIGMP_RxPktFree(p_buf);                                   /* ------------------- FREE IGMP PKT ------------------ */
+
+                                                                /* ------------------ UPDATE RX STATS ----------------- */
+    NET_CTR_STAT_INC(Net_StatCtrs.IGMP.RxMsgCompCtr);
+    NET_CTR_STAT_INC(*p_ctr);
+
+
+   *p_err = NET_IGMP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NetIGMP_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as IGMP protocol.
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header that received IGMP packet.
+*               ---------   Argument validated in NetIGMP_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IGMP_ERR_NONE               Received buffer's IGMP header validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT IGMP.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIGMP_RxPktValidateBuf (NET_BUF_HDR  *p_buf_hdr,
+                                        NET_ERR      *p_err)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  valid;
+    NET_ERR      err;
+
+                                                                /* --------------- VALIDATE IGMP BUF HDR -------------- */
+    if (p_buf_hdr->ProtocolHdrType != NET_PROTOCOL_TYPE_IGMP) {
+        if_nbr = p_buf_hdr->IF_Nbr;
+        valid  = NetIF_IsValidHandler(if_nbr, &err);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.RxInvalidProtocolCtr);
+        }
+       *p_err = NET_ERR_INVALID_PROTOCOL;
+        return;
+    }
+
+    if (p_buf_hdr->IGMP_MsgIx == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.RxInvalidBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_IGMP_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetIGMP_RxPktValidate()
+*
+* Description : (1) Validate received IGMP packet :
+*
+*                   (a) Validate the received message's length                          See Note #4
+*
+*                   (b) (1) Validate the received packet's following IGMP header fields :
+*
+*                           (A) Version
+*                           (B) Type
+*                           (C) Checksum
+*
+*                       (2) Validation ignores the following ICMP header fields :
+*
+*                           (A) Host Group Address
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IGMP packet.
+*               -----       Argument checked   in NetIGMP_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIGMP_Rx().
+*
+*               p_igmp_hdr  Pointer to received packet's IGMP header.
+*               ----------  Argument validated in NetIGMP_Rx()/NetIGMP_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IGMP_ERR_MSG_TYPE_QUERY     Received packet validated as IGMP Query  Message.
+*                               NET_IGMP_ERR_MSG_TYPE_REPORT    Received packet validated as IGMP Report Message.
+*
+*                               NET_IGMP_ERR_INVALID_VER        Invalid IGMP version.
+*                               NET_IGMP_ERR_INVALID_TYPE       Invalid IGMP message type.
+*                               NET_IGMP_ERR_INVALID_LEN        Invalid IGMP message length.
+*                               NET_IGMP_ERR_INVALID_CHK_SUM    Invalid IGMP check-sum.
+*                               NET_IGMP_ERR_INVALID_ADDR_DEST  Invalid IGMP IP group address for query.
+*                               NET_IGMP_ERR_INVALID_ADDR_GRP   IP destination address & IGMP header group
+*                                                                   address NOT identical.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_Rx().
+*
+* Note(s)     : (2) See 'net_igmp.h  IGMP HEADER' for IGMP header format.
+*
+*               (3) (a) (1) RFC #1112, Section 7.2 states that "an ICMP error message ... is never generated
+*                           in response to a datagram destined to an IP host group".
+*
+*                       (2) RFC #1122, Section 3.2.2 reiterates that "an ICMP error message MUST NOT be sent
+*                           as the result of receiving ... a datagram destined to an ... IP multicast address".
+*
+*                   (b) 'p_buf' NOT used to transmit ICMP error messages but is included for consistency.
+*
+*               (4) (a) RFC #1112, Appendix I, Section 'State Transition Diagram' states that "to be valid,
+*                       the ... [received] message[s] must be at least 8 octets long".
+*
+*                   (b) Since IGMP message headers do NOT contain a message length field, the IGMP Message
+*                       Length is assumed to be the remaining IP Datagram Length.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_RxPktValidate (NET_BUF       *p_buf,
+                                     NET_BUF_HDR   *p_buf_hdr,
+                                     NET_IGMP_HDR  *p_igmp_hdr,
+                                     NET_ERR       *p_err)
+{
+    CPU_INT16U     igmp_msg_len;
+    CPU_BOOLEAN    igmp_chk_sum_valid;
+    CPU_INT08U     igmp_ver;
+    CPU_INT08U     igmp_type;
+    NET_IPv4_ADDR  igmp_grp_addr;
+    NET_ERR        err;
+    NET_ERR        err_rtn;
+
+
+   (void)&p_buf;                                                /* Prevent 'variable unused' warning (see Note #3b).    */
+
+
+                                                                /* ------------- VALIDATE IGMP RX MSG LEN ------------- */
+    igmp_msg_len          = p_buf_hdr->IP_DatagramLen;          /* See Note #3b.                                        */
+    p_buf_hdr->IGMP_MsgLen = igmp_msg_len;
+    if (igmp_msg_len < NET_IGMP_MSG_SIZE_MIN) {                 /* If msg len < min msg len, rtn err (see Note #4a).    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.RxHdrMsgLenCtr);
+       *p_err = NET_IGMP_ERR_INVALID_LEN;
+        return;
+    }
+
+
+                                                                /* ---------------- VALIDATE IGMP VER ----------------- */
+    igmp_ver   = p_igmp_hdr->Ver_Type & NET_IGMP_HDR_VER_MASK;  /* See 'net_igmp.h  IGMP HEADER  Note #2'.              */
+    igmp_ver >>= NET_IGMP_HDR_VER_SHIFT;
+    if (igmp_ver != NET_IGMP_HDR_VER) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.RxHdrVerCtr);
+       *p_err = NET_IGMP_ERR_INVALID_VER;
+        return;
+    }
+
+
+                                                                /* -------------- VALIDATE IGMP MSG TYPE -------------- */
+    NET_UTIL_VAL_COPY_GET_NET_32(&igmp_grp_addr, &p_igmp_hdr->AddrGrp);
+    igmp_type = p_igmp_hdr->Ver_Type & NET_IGMP_HDR_TYPE_MASK;
+
+    switch (igmp_type) {
+        case NET_IGMP_MSG_TYPE_QUERY:
+             if (p_buf_hdr->IP_AddrDest != NET_IPv4_ADDR_MULTICAST_ALL_HOSTS) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.RxPktInvalidAddrDestCtr);
+                *p_err = NET_IGMP_ERR_INVALID_ADDR_DEST;
+                 return;
+             }
+             err_rtn = NET_IGMP_ERR_MSG_TYPE_QUERY;
+             break;
+
+
+        case NET_IGMP_MSG_TYPE_REPORT:
+             if (p_buf_hdr->IP_AddrDest != igmp_grp_addr) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.RxPktInvalidAddrDestCtr);
+                *p_err = NET_IGMP_ERR_INVALID_ADDR_GRP;
+                 return;
+             }
+             err_rtn = NET_IGMP_ERR_MSG_TYPE_REPORT;
+             break;
+
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.RxHdrTypeCtr);
+            *p_err = NET_IGMP_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+                                                                /* -------------- VALIDATE IGMP CHK SUM --------------- */
+    igmp_chk_sum_valid = NetUtil_16BitOnesCplChkSumHdrVerify((void     *) p_igmp_hdr,
+                                                             (CPU_INT16U) p_buf_hdr->IGMP_MsgLen,
+                                                             (NET_ERR  *)&err);
+    if (igmp_chk_sum_valid != DEF_OK) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.RxHdrChkSumCtr);
+       *p_err = NET_IGMP_ERR_INVALID_CHK_SUM;
+        return;
+    }
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIGMP_RxMsgQuery()
+*
+* Description : (1) Process IGMP received query :
+*
+*                   (a) Search host group in IDLE     state
+*                   (b) Configure timer for host group
+*                   (c) Set    host group in DELAYING state
+*
+*
+* Argument(s) : if_nbr      Interface number the packet was received from.
+*
+*               p_igmp_hdr  Pointer to received packet's IGMP header.
+*               ----------  Argument validated in NetIGMP_Rx().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_Rx().
+*
+* Note(s)     : (2) See 'net_igmp.h  IGMP HEADER' for IGMP header format.
+*
+*               (3) See 'net_igmp.h  IGMP HOST GROUP STATES  Note #1' for state transitions.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_RxMsgQuery (NET_IF_NBR     if_nbr,
+                                  NET_IGMP_HDR  *p_igmp_hdr)
+{
+    NET_IGMP_HOST_GRP  *p_host_grp;
+    CPU_INT16U          timeout_sec;
+    NET_TMR_TICK        timeout_tick;
+    NET_ERR             err;
+
+
+   (void)&p_igmp_hdr;                                           /* Prevent 'variable unused' compiler warning.          */
+
+    p_host_grp = NetIGMP_HostGrpListHead;
+    while (p_host_grp != (NET_IGMP_HOST_GRP *)0) {              /* Handle ALL host grp in host grp list.                */
+        if (p_host_grp->IF_Nbr == if_nbr) {                     /* If host grp IF nbr is query IF nbr & ..              */
+                                                                /* .. host grp state  is IDLE,          ..              */
+            if (p_host_grp->State == NET_IGMP_HOST_GRP_STATE_IDLE) {
+                                                                /* .. calc new rand timeout             ..              */
+                NetIGMP_RandSeed  =  Math_RandSeed(NetIGMP_RandSeed);
+                timeout_sec       =  NetIGMP_RandSeed % (CPU_INT16U)(NET_IGMP_HOST_GRP_REPORT_DLY_MAX_SEC + 1);
+                timeout_tick      = (NET_TMR_TICK)(timeout_sec * NET_TMR_TIME_TICK_PER_SEC);
+
+                                                                /* .. & set tmr.                                        */
+                p_host_grp->TmrPtr =  NetTmr_Get((CPU_FNCT_PTR ) NetIGMP_HostGrpReportDlyTimeout,
+                                                (void        *) p_host_grp,
+                                                (NET_TMR_TICK ) timeout_tick,
+                                                (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                                (NET_ERR     *)&err);
+                if (err != NET_TMR_ERR_NONE) {                  /* If err setting tmr,     ...                          */
+                    NetIGMP_TxMsgReport(p_host_grp, &err);      /* ... tx report immed'ly; ...                          */
+
+                } else {                                        /* ... else set host grp state to DELAYING.             */
+                    p_host_grp->State = NET_IGMP_HOST_GRP_STATE_DELAYING;
+                }
+            }
+        }
+
+        p_host_grp = (NET_IGMP_HOST_GRP *)p_host_grp->NextPtr;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIGMP_RxMsgReport()
+*
+* Description : (1) Process received IGMP report :
+*
+*                   (a) Search host group in DELAYING state & targeted by report
+*                   (b) Free   timer
+*                   (c) Set    host group in IDLE     state
+*
+*
+* Argument(s) : if_nbr      Interface number the packet was received from.
+*
+*               p_igmp_hdr  Pointer to received packet's IGMP header.
+*               ----------  Argument validated in NetIGMP_Rx().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_Rx().
+*
+* Note(s)     : (2) See 'net_igmp.h  IGMP HEADER' for IGMP header format.
+*
+*               (3) See 'net_igmp.h  IGMP HOST GROUP STATES  Note #1' for state transitions.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_RxMsgReport (NET_IF_NBR     if_nbr,
+                                   NET_IGMP_HDR  *p_igmp_hdr)
+{
+    NET_IPv4_ADDR       addr_grp;
+    NET_IGMP_HOST_GRP  *p_host_grp;
+
+
+    NET_UTIL_VAL_COPY_GET_NET_32(&addr_grp, &p_igmp_hdr->AddrGrp);
+
+    p_host_grp = NetIGMP_HostGrpSrch(if_nbr, addr_grp);
+
+    if (p_host_grp != (NET_IGMP_HOST_GRP *)0) {                      /* If host grp            ...                       */
+        if (p_host_grp->State == NET_IGMP_HOST_GRP_STATE_DELAYING) { /* ... in DELAYING state, ...                       */
+            if (p_host_grp->TmrPtr != (NET_TMR *)0) {
+                NetTmr_Free(p_host_grp->TmrPtr);                     /* ... free tmr if avail  ...                       */
+                p_host_grp->TmrPtr  = (NET_TMR *)0;
+            }
+
+            p_host_grp->State = NET_IGMP_HOST_GRP_STATE_IDLE;        /* ... & set to IDLE state.                         */
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIGMP_RxPktFree()
+*
+* Description : Free network buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_RxPktFree (NET_BUF  *p_buf)
+{
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)0);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIGMP_RxPktDiscard()
+*
+* Description : On any IGMP receive error(s), discard IGMP packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_RxPktDiscard (NET_BUF  *p_buf,
+                                    NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.IGMP.RxPktDiscardedCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)p_ctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIGMP_TxMsg()
+*
+* Description : (1) Prepare & transmit an IGMP Report or IGMP Query :
+*
+*                   (a) Validate IGMP Message Type          See 'net_igmp.h  IGMP MESSAGE TYPE DEFINES'
+*                                                             & 'net_icmp.c  Note #2c'
+*                   (b) Get buffer for IGMP Message :
+*                       (1) Initialize IGMP Message buffer controls
+*
+*                   (c) Prepare IGMP Message :
+*
+*                       (1) Type                            See  Note #1a
+*                       (2) Version                         See 'net_igmp.h  IGMP HEADER DEFINES'
+*                       (3) Group address
+*                           (A) RFC #1112, Appendix I, Section 'Informal Protocl Description' states
+*                               that "a report is sent with" :
+*
+*                               (1) "an IP destination address equal to the host group address being
+*                                       reported" ...
+*                               (2) "and with an IP time-to-live of 1, so that other members of the
+*                                    same group can overhear the report."
+*
+*                       (4) Check sum
+*
+*                   (d) Transmit IGMP Message
+*                   (e) Free     IGMP Message buffer
+*                   (f) Update transmit statistics
+*
+*
+* Argument(s) : if_nbr      Interface number to transmit IGMP message.
+*
+*               addr_src    Source     IP address (see Note #2).
+*               --------    Argument validated in NetIGMP_TxMsgReport().
+*
+*               addr_grp    Host group IP address (see Note #2).
+*
+*               type        IGMP message type (see Note #1c1) :
+*
+*                               NET_IGMP_MSG_TYPE_QUERY         IGMP Message Query  type
+*                               NET_IGMP_MSG_TYPE_REPORT        IGMP Message Report type
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IGMP_ERR_NONE               IGMP message successfully transmitted.
+*
+*                                                               -- RETURNED BY NetIGMP_TxPktDiscard() : ---
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+*                                                               --------- RETURNED BY NetIP_Tx() : --------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_TxMsgReport().
+*
+* Note(s)     : (2) IP addresses MUST be in host-order.
+*
+*               (3) Assumes network buffer's protocol header size is large enough to accommodate IGMP header
+*                   size (see 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1a2').
+*
+*               (4) Some buffer controls were previously initialized in NetBuf_Get() when the buffer was
+*                   allocated.  These buffer controls do NOT need to be re-initialized but are shown for
+*                   completeness.
+*
+*               (5) (a) IGMP header Check-Sum MUST be calculated AFTER the entire IGMP header has been
+*                       prepared.  In addition, ALL multi-octet words are converted from host-order to
+*                       network-order since "the sum of 16-bit integers can be computed in either byte
+*                       order" [RFC #1071, Section 2.(B)].
+*
+*                   (b) IGMP header Check-Sum field MUST be cleared to '0' BEFORE the IGMP header Check-Sum
+*                       is calculated (see RFC #1112, Appendix I, Section 'Checksum').
+*
+*                   (c) The IGMP header Check-Sum field is returned in network-order & MUST NOT be re-converted
+*                       back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumHdrCalc()  Note #3b').
+*
+*               (6) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_TxMsg (NET_IF_NBR      if_nbr,
+                             NET_IPv4_ADDR   addr_src,
+                             NET_IPv4_ADDR   addr_grp,
+                             CPU_INT08U      type,
+                             NET_ERR        *p_err)
+{
+    NET_BUF       *pmsg_buf;
+    NET_BUF_HDR   *pmsg_buf_hdr;
+    NET_IGMP_HDR  *p_igmp_hdr;
+    CPU_INT16U     msg_ix;
+    CPU_INT16U     msg_ix_offset;
+    CPU_INT08U     igmp_ver;
+    CPU_INT08U     igmp_type;
+    CPU_INT16U     igmp_chk_sum;
+    NET_ERR        err;
+
+
+                                                                /* -------------- VALIDATE IGMP MSG TYPE -------------- */
+    switch (type) {
+        case NET_IGMP_MSG_TYPE_REPORT:
+             break;
+
+
+        case NET_IGMP_MSG_TYPE_QUERY:                           /* See 'net_icmp.c  Note #2c'.                          */
+        default:
+             NetIGMP_TxPktDiscard((NET_BUF *)0,
+                                  (NET_ERR *)p_err);
+             return;
+    }
+
+
+                                                                /* ------------------ GET IGMP TX BUF ----------------- */
+    msg_ix = 0;
+    NetIGMP_TxIxDataGet(if_nbr, NET_IGMP_HDR_SIZE, &msg_ix, &err);
+    if (err != NET_IGMP_ERR_NONE) {
+        return;
+    }
+
+    pmsg_buf = NetBuf_Get(if_nbr,
+                          NET_TRANSACTION_TX,
+                          NET_IGMP_MSG_LEN_DATA,
+                          msg_ix,
+                         &msg_ix_offset,
+                          NET_BUF_FLAG_NONE,
+                         &err);
+    if (err != NET_BUF_ERR_NONE) {
+        NetIGMP_TxPktDiscard(pmsg_buf, p_err);
+        return;
+    }
+
+    msg_ix += msg_ix_offset;
+
+                                                                /* Init msg buf ctrls.                                  */
+    pmsg_buf_hdr                        = &pmsg_buf->Hdr;
+    pmsg_buf_hdr->IGMP_MsgIx            = (CPU_INT16U  )msg_ix;
+    pmsg_buf_hdr->IGMP_MsgLen           = (CPU_INT16U  )NET_IGMP_HDR_SIZE;
+    pmsg_buf_hdr->TotLen                = (NET_BUF_SIZE)pmsg_buf_hdr->IGMP_MsgLen;
+    pmsg_buf_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_IGMP;
+    pmsg_buf_hdr->ProtocolHdrTypeNetSub =  NET_PROTOCOL_TYPE_IGMP;
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #4].                */
+    p_buf_hdr->DataIx                    =  NET_BUF_IX_NONE;
+    p_buf_hdr->DataLen                   =  0u;
+#endif
+
+
+                                                                /* ----------------- PREPARE IGMP MSG ----------------- */
+    p_igmp_hdr = (NET_IGMP_HDR *)&pmsg_buf->DataPtr[pmsg_buf_hdr->IGMP_MsgIx];
+
+                                                                /* Prepare IGMP ver/type (see Note #1c1).               */
+    igmp_ver              = NET_IGMP_HDR_VER;
+    igmp_ver            <<= NET_IGMP_HDR_VER_SHIFT;
+
+    igmp_type             = type;
+    igmp_type            &= NET_IGMP_HDR_TYPE_MASK;
+
+    p_igmp_hdr->Ver_Type   = igmp_ver | igmp_type;
+
+
+    NET_UTIL_VAL_SET_NET_16(&p_igmp_hdr->Unused, 0x0000u);      /* Clr unused octets.                                   */
+
+                                                                /* Prepare host grp addr (see Note #1c3).               */
+    NET_UTIL_VAL_COPY_SET_NET_32(&p_igmp_hdr->AddrGrp, &addr_grp);
+
+                                                                /* Prepare IGMP chk sum  (see Note #5).                 */
+    NET_UTIL_VAL_SET_NET_16(&p_igmp_hdr->ChkSum, 0x0000u);      /* Clr  chk sum (see Note #5b).                         */
+                                                                /* Calc chk sum.                                        */
+    igmp_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void     *)p_igmp_hdr,
+                                                     (CPU_INT16U)NET_IGMP_HDR_SIZE,
+                                                     (NET_ERR  *)p_err);
+    if (*p_err != NET_UTIL_ERR_NONE) {
+         NetIGMP_TxPktDiscard(pmsg_buf, p_err);
+         return;
+    }
+
+    NET_UTIL_VAL_COPY_16(&p_igmp_hdr->ChkSum, &igmp_chk_sum);   /* Copy chk sum in net order (see Note #5c).            */
+
+
+
+                                                                /* ------------------- TX IGMP MSG -------------------- */
+    NetIPv4_Tx(pmsg_buf,
+               addr_src,
+               addr_grp,
+               NET_IPv4_TOS_DFLT,
+               NET_IPv4_TTL_MULTICAST_IGMP,
+               NET_IPv4_FLAG_NONE,
+               DEF_NULL,
+               p_err);
+
+
+                                                                /* --------- FREE IGMP MSG / UPDATE TX STATS ---------- */
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+             NetIGMP_TxPktFree(pmsg_buf);
+             NET_CTR_STAT_INC(Net_StatCtrs.IGMP.TxMsgCtr);
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #6.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.TxPktDiscardedCtr);
+                                                                /* Rtn err from NetIP_Tx().                             */
+             return;
+
+
+        case NET_IPv4_ERR_TX_PKT:
+                                                                /* See Note #6.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.TxPktDiscardedCtr);
+            *p_err = NET_ERR_TX;
+             return;
+
+
+        default:
+             NetIGMP_TxPktDiscard(pmsg_buf, p_err);
+             return;
+    }
+
+
+   *p_err = NET_IGMP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIGMP_TxMsgReport()
+*
+* Description : (1) Prepare & transmit an IGMP Report :
+*
+*                   (a) Prepare IGMP Report Message :
+*                       (1) Get host group's network interface number
+*                       (2) Get host group's source IP address
+*                       (3) Get host group's        IP address
+*
+*                   (b) Update transmit statistics
+*
+*
+* Argument(s) : p_host_grp  Pointer to host group to transmit report.
+*               ----------  Argument checked in NetIGMP_HostGrpJoinHandler(),
+*                                               NetIGMP_HostGrpReportDlyTimeout(),
+*                                               NetIGMP_RxMsgQuery().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IGMP_ERR_NONE               IGMP Report Message successfully transmitted.
+*                               NET_IGMP_ERR_INVALID_ADDR_SRC   Invalid/unavailable source address.
+*
+*                                                               ------- RETURNED BY NetIGMP_TxMsg() : -------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_HostGrpJoinHandler(),
+*               NetIGMP_HostGrpReportDlyTimeout(),
+*               NetIGMP_RxMsgQuery().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_TxMsgReport (NET_IGMP_HOST_GRP  *p_host_grp,
+                                   NET_ERR            *p_err)
+{
+    NET_IF_NBR        if_nbr;
+    NET_IP_ADDRS_QTY  addr_ip_tbl_qty;
+    NET_IPv4_ADDR     addr_ip_tbl[NET_IPv4_CFG_IF_MAX_NBR_ADDR];
+    NET_IPv4_ADDR     addr_src;
+    NET_IPv4_ADDR     addr_grp;
+    NET_ERR           err;
+
+
+                                                                /* ------------- PREPARE IGMP REPORT MSG -------------- */
+    if_nbr          = p_host_grp->IF_Nbr;                       /* Get IGMP host grp IF nbr.                            */
+    addr_ip_tbl_qty = sizeof(addr_ip_tbl) / sizeof(NET_IPv4_ADDR);
+   (void)NetIPv4_GetAddrHostHandler((NET_IF_NBR        ) if_nbr,
+                                    (NET_IPv4_ADDR    *)&addr_ip_tbl[0],
+                                    (NET_IP_ADDRS_QTY *)&addr_ip_tbl_qty,
+                                    (NET_ERR          *)&err);
+    if (err != NET_IPv4_ERR_NONE) {
+       *p_err = NET_IGMP_ERR_INVALID_ADDR_SRC;
+        return;
+    }
+
+    addr_src = addr_ip_tbl[0];                                  /* Get IGMP host grp src addr.                          */
+    addr_grp = p_host_grp->AddrGrp;                             /* Get IGMP host grp     addr.                          */
+
+
+                                                                /* ---------------- TX IGMP REPORT MSG ---------------- */
+    NetIGMP_TxMsg((NET_IF_NBR   )if_nbr,
+                  (NET_IPv4_ADDR)addr_src,
+                  (NET_IPv4_ADDR)addr_grp,
+                  (CPU_INT08U   )NET_IGMP_MSG_TYPE_REPORT,
+                  (NET_ERR     *)p_err);
+    if (*p_err != NET_IGMP_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* ------------------ UPDATE TX STATS ----------------- */
+    NET_CTR_STAT_INC(Net_StatCtrs.IGMP.TxMsgReportCtr);
+
+
+   *p_err = NET_IGMP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIGMP_TxIxDataGet()
+*
+* Description : Get the offset of a buffer at which the UDP data can be written.
+*
+* Argument(s) : if_nbr      Network interface number to transmit data.
+*
+*               data_len    Length of the IGMP payload.
+*
+*               p_ix        Pointer to the current protocol index.
+*               ----        Argument validated in NetIGMP_TxMsg().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv4_ERR_NONE     No errors.
+*
+*                               -Returned by NetIF_MTU_GetProtocol()-
+*                               See NetIF_MTU_GetProtocol() for additional return error codes.
+*
+*                               -Returned by NetIPv4_GetTxDataIx()-
+*                               See NetIPv4_GetTxDataIx() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_TxMsg().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_TxIxDataGet (NET_IF_NBR   if_nbr,
+                                   CPU_INT16U   data_len,
+                                   CPU_INT16U  *p_ix,
+                                   NET_ERR     *p_err)
+{
+    NET_MTU  mtu;
+
+
+    mtu   = NetIF_MTU_GetProtocol(if_nbr, NET_PROTOCOL_TYPE_IGMP, NET_IF_FLAG_NONE, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+        return;
+    }
+
+
+    NetIPv4_TxIxDataGet(if_nbr,
+                        data_len,
+                        mtu,
+                        p_ix,
+                        p_err);
+    if (*p_err != NET_IPv4_ERR_NONE) {
+         return;
+    }
+
+   *p_err = NET_IGMP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIGMP_TxPktFree()
+*
+* Description : Free network buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_TxMsg().
+*
+* Note(s)     : (1) (a) Although IGMP Transmit initially requests the network buffer for transmit,
+*                       the IGMP layer does NOT maintain a reference to the buffer.
+*
+*                   (b) Also, since the network interface layer frees ALL unreferenced buffers after
+*                       successful transmission, the IGMP layer MUST not free the transmit buffer.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_TxPktFree (NET_BUF  *p_buf)
+{
+   (void)&p_buf;                                                 /* Prevent 'variable unused' warning (see Note #1).     */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIGMP_TxPktDiscard()
+*
+* Description : On any IGMP transmit packet error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_TxMsg().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_TxPktDiscard (NET_BUF  *p_buf,
+                                    NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.IGMP.TxPktDiscardedCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)p_ctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIGMP_HostGrpSrch()
+*
+* Description : Search IGMP Host Group List for host group with specific address & interface number.
+*
+*               (1) IGMP host groups are linked to form an IGMP Host Group List.
+*
+*                   (a) In the diagram below, ... :
+*
+*                       (1) The horizontal row represents the list of IGMP host groups.
+*
+*                       (2) 'NetIGMP_HostGrpListHead' points to the head of the IGMP Host Group List.
+*
+*                       (3) IGMP host groups' 'PrevPtr' & 'NextPtr' doubly-link each host group to form the
+*                           IGMP Host Group List.
+*
+*                   (b) (1) For any IGMP Host Group List lookup, all IGMP host groups are searched in order
+*                           to find the host group with the appropriate host group address on the specified
+*                           interface.
+*
+*                       (2) To expedite faster IGMP Host Group List lookup :
+*
+*                           (A) (1) (a) IGMP host groups are added at;            ...
+*                                   (b) IGMP host groups are searched starting at ...
+*                               (2) ... the head of the IGMP Host Group List.
+*
+*                           (B) As IGMP host groups are added into the list, older IGMP host groups migrate
+*                               to the tail of the IGMP Host Group List.   Once an IGMP host group is left,
+*                               it is removed from the IGMP Host Group List.
+*
+*
+*                                        |                                               |
+*                                        |<---------- List of IGMP Host Groups --------->|
+*                                        |                (see Note #1a1)                |
+*
+*                                 New IGMP host groups                      Oldest IGMP host group
+*                                   inserted at head                        in IGMP Host Group List
+*                                  (see Note #1b2A2)                           (see Note #1b2B)
+*
+*                                           |                 NextPtr                 |
+*                                           |             (see Note #1a3)             |
+*                                           v                    |                    v
+*                                                                |
+*                   Head of IGMP         -------       -------   v   -------       -------
+*                  Host Group List  ---->|     |------>|     |------>|     |------>|     |
+*                                        |     |       |     |       |     |       |     |        Tail of IGMP
+*                  (see Note #1a2)       |     |<------|     |<------|     |<------|     |<----  Host Group List
+*                                        -------       -------   ^   -------       -------
+*                                                                |
+*                                                                |
+*                                                             PrevPtr
+*                                                         (see Note #1a3)
+*
+*
+* Argument(s) : if_nbr      Interface number to search for host group.
+*
+*               addr_grp    IP address of host group to search (see Note #2).
+*
+* Return(s)   : Pointer to IGMP host group with specific IP group address & interface, if found.
+*
+*               Pointer to NULL,                                                       otherwise.
+*
+* Caller(s)   : NetIGMP_HostGrpJoinHandler(),
+*               NetIGMP_HostGrpLeaveHandler(),
+*               NetIGMP_IsGrpJoinedOnIF(),
+*               NetIGMP_RxMsgReport().
+*
+* Note(s)     : (2) IP host group address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+static  NET_IGMP_HOST_GRP  *NetIGMP_HostGrpSrch (NET_IF_NBR     if_nbr,
+                                                 NET_IPv4_ADDR  addr_grp)
+{
+    NET_IGMP_HOST_GRP  *p_host_grp;
+    NET_IGMP_HOST_GRP  *p_host_grp_next;
+    CPU_BOOLEAN         found;
+
+
+    p_host_grp = NetIGMP_HostGrpListHead;                       /* Start @ IGMP Host Grp List head (see Note #1b2A1b).  */
+    found     = DEF_NO;
+
+    while ((p_host_grp != (NET_IGMP_HOST_GRP *)0) &&            /* Srch IGMP Host Grp List ...                          */
+           (found     ==  DEF_NO)) {                            /* ... until host grp found.                            */
+
+        p_host_grp_next = (NET_IGMP_HOST_GRP *) p_host_grp->NextPtr;
+
+        found = ((p_host_grp->IF_Nbr  == if_nbr) &&             /* Cmp IF nbr & grp addr.                               */
+                 (p_host_grp->AddrGrp == addr_grp)) ? DEF_YES : DEF_NO;
+
+        if (found != DEF_YES) {                                 /* If NOT found, adv to next IGMP host grp.             */
+            p_host_grp = p_host_grp_next;
+        }
+    }
+
+    return (p_host_grp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIGMP_HostGrpAdd()
+*
+* Description : (1) Add a host group to the IGMP Host Group List :
+*
+*                   (a) Get a     host group from      host group pool
+*                   (b) Configure host group
+*                   (c) Insert    host group into IGMP Host Group List
+*                   (d) Configure interface for multicast address
+*
+*
+* Argument(s) : if_nbr      Interface number to add host group.
+*               ------      Argument checked in NetIGMP_HostGrpJoinHandler().
+*
+*               addr_grp    IP address of host group to add.
+*               --------    Argument checked in NetIGMP_HostGrpJoinHandler().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IGMP_ERR_NONE                   Host group succesfully added.
+*
+*                                                                   --- RETURNED BY NetIGMP_HostGrpGet() : ---
+*                               NET_IGMP_ERR_HOST_GRP_NONE_AVAIL    NO available host group to allocate.
+*                               NET_IGMP_ERR_HOST_GRP_INVALID_TYPE  Host group is NOT a valid host group type.
+*
+* Return(s)   : Pointer to host group, if NO error(s).
+*
+*               Pointer to NULL,       otherwise.
+*
+* Caller(s)   : NetIGMP_HostGrpJoinHandler().
+*
+* Note(s)     : (2) IP host group address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+static  NET_IGMP_HOST_GRP  *NetIGMP_HostGrpAdd (NET_IF_NBR      if_nbr,
+                                                NET_IPv4_ADDR   addr_grp,
+                                                NET_ERR        *p_err)
+{
+    NET_IGMP_HOST_GRP  *p_host_grp;
+    NET_PROTOCOL_TYPE   addr_protocol_type;
+    NET_IPv4_ADDR       addr_grp_net;
+    CPU_INT08U         *p_addr_protocol;
+    CPU_INT08U          addr_protocol_len;
+    NET_ERR             err;
+
+
+    p_host_grp = NetIGMP_HostGrpGet(p_err);                     /* ------------------- GET HOST GRP ------------------- */
+    if (p_host_grp == (NET_IGMP_HOST_GRP *)0) {
+        return ((NET_IGMP_HOST_GRP *)0);                        /* Rtn err from NetIGMP_HostGrpGet().                   */
+    }
+
+
+                                                                /* ------------------- CFG HOST GRP ------------------- */
+    p_host_grp->AddrGrp =  addr_grp;
+    p_host_grp->IF_Nbr  =  if_nbr;
+    p_host_grp->RefCtr  =  1u;
+                                                                /* Set host grp state.                                  */
+                                                                /* See 'net_igmp.h  IGMP HOST GROUP STATES  Note #2'.   */
+    p_host_grp->State   = (addr_grp == NET_IPv4_ADDR_MULTICAST_ALL_HOSTS) ? NET_IGMP_HOST_GRP_STATE_STATIC
+                                                                         : NET_IGMP_HOST_GRP_STATE_IDLE;
+
+
+                                                                /* -------- INSERT HOST GRP INTO HOST GRP LIST -------- */
+    NetIGMP_HostGrpInsert(p_host_grp);
+
+
+                                                                /* ------------ CFG IF FOR MULTICAST ADDR ------------- */
+    addr_grp_net       =  NET_UTIL_HOST_TO_NET_32(addr_grp);
+    addr_protocol_type =  NET_PROTOCOL_TYPE_IP_V4;
+    p_addr_protocol    = (CPU_INT08U *)&addr_grp_net;
+    addr_protocol_len  =  sizeof(addr_grp_net);
+
+    NetIF_AddrMulticastAdd(if_nbr,
+                           p_addr_protocol,
+                           addr_protocol_len,
+                           addr_protocol_type,
+                          &err);
+
+
+   *p_err =  NET_IGMP_ERR_NONE;
+
+    return (p_host_grp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIGMP_HostGrpRemove()
+*
+* Description : Remove a host group from the IGMP Host Group List :
+*
+*                   (a) Remove host group from IGMP Host Group List
+*                   (b) Free   host group back to   host group pool
+*                   (c) Remove multicast address from interface
+*
+*
+* Argument(s) : p_host_grp  Pointer to a host group.
+*               ----------  Argument checked in NetIGMP_HostGrpLeaveHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_HostGrpLeaveHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_HostGrpRemove (NET_IGMP_HOST_GRP  *p_host_grp)
+{
+    NET_IF_NBR          if_nbr;
+    NET_PROTOCOL_TYPE   addr_protocol_type;
+    NET_IPv4_ADDR       addr_grp;
+    NET_IPv4_ADDR       addr_grp_net;
+    CPU_INT08U         *p_addr_protocol;
+    CPU_INT08U          addr_protocol_len;
+    NET_ERR             err;
+
+
+    if_nbr   = p_host_grp->IF_Nbr;
+    addr_grp = p_host_grp->AddrGrp;
+
+    NetIGMP_HostGrpUnlink(p_host_grp);                          /* -------- REMOVE HOST GRP FROM HOST GRP LIST -------- */
+
+    NetIGMP_HostGrpFree(p_host_grp);                            /* ------------------ FREE HOST GRP ------------------- */
+
+                                                                /* ---------- REMOVE MULTICAST ADDR FROM IF ----------- */
+    addr_grp_net       =  NET_UTIL_HOST_TO_NET_32(addr_grp);
+    addr_protocol_type =  NET_PROTOCOL_TYPE_IP_V4;
+   p_addr_protocol      = (CPU_INT08U *)&addr_grp_net;
+    addr_protocol_len  =  sizeof(addr_grp_net);
+
+    NetIF_AddrMulticastRemove(if_nbr,
+                              p_addr_protocol,
+                              addr_protocol_len,
+                              addr_protocol_type,
+                             &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIGMP_HostGrpInsert()
+*
+* Description : Insert a host group into the IGMP Host Group List.
+*
+* Argument(s) : p_host_grp  Pointer to a host group.
+*               ----------  Argument checked in NetIGMP_HostGrpAdd().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_HostGrpAdd().
+*
+* Note(s)     : (1) See 'NetIGMP_HostGrpSrch()  Note #1b2A1a'.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_HostGrpInsert (NET_IGMP_HOST_GRP  *p_host_grp)
+{
+                                                                        /* ---------- CFG IGMP HOST GRP PTRS ---------- */
+    p_host_grp->PrevPtr = (NET_IGMP_HOST_GRP *)0;
+    p_host_grp->NextPtr = (NET_IGMP_HOST_GRP *)NetIGMP_HostGrpListHead;
+
+                                                                        /* ------ INSERT IGMP HOST GRP INTO LIST ------ */
+    if (NetIGMP_HostGrpListHead != (NET_IGMP_HOST_GRP *)0) {            /* If list NOT empty, insert before head.       */
+        NetIGMP_HostGrpListHead->PrevPtr = p_host_grp;
+    }
+
+    NetIGMP_HostGrpListHead = p_host_grp;                                /* Insert host grp @ list head (see Note #1).   */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIGMP_HostGrpUnlink()
+*
+* Description : Unlink a host group from the IGMP Host Group List.
+*
+* Argument(s) : p_host_grp  Pointer to a host group.
+*               ----------  Argument checked in NetIGMP_HostGrpRemove()
+*                                                 by NetIGMP_HostGrpLeaveHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_HostGrpRemove().
+*
+* Note(s)     : (1) Since NetIGMP_HostGrpUnlink() called ONLY to remove & then re-link or free host
+*                   groups, it is NOT necessary to clear the entry's previous & next pointers.  However,
+*                   pointers cleared to NULL shown for correctness & completeness.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_HostGrpUnlink (NET_IGMP_HOST_GRP  *p_host_grp)
+{
+    NET_IGMP_HOST_GRP  *p_host_grp_prev;
+    NET_IGMP_HOST_GRP  *p_host_grp_next;
+
+                                                                        /* ------ UNLINK IGMP HOST GRP FROM LIST ------ */
+    p_host_grp_prev = p_host_grp->PrevPtr;
+    p_host_grp_next = p_host_grp->NextPtr;
+                                                                        /* Point prev host grp to next host grp.        */
+    if (p_host_grp_prev != (NET_IGMP_HOST_GRP *)0) {
+        p_host_grp_prev->NextPtr = p_host_grp_next;
+    } else {
+        NetIGMP_HostGrpListHead = p_host_grp_next;
+    }
+                                                                        /* Point next host grp to prev host grp.        */
+    if (p_host_grp_next != (NET_IGMP_HOST_GRP *)0) {
+        p_host_grp_next->PrevPtr = p_host_grp_prev;
+    }
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)                             /* Clr host grp ptrs (see Note #1).             */
+    p_host_grp->PrevPtr = (NET_IGMP_HOST_GRP *)0;
+    p_host_grp->NextPtr = (NET_IGMP_HOST_GRP *)0;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIGMP_HostGrpReportDlyTimeout()
+*
+* Description : Transmit an IGMP report on IGMP Query timeout.
+*
+* Argument(s) : p_host_grp_timeout  Pointer to a host group (see Note #1b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetIGMP_HostGrpJoinHandler(),
+*                             NetIGMP_HostGrpReportDlyTimeout(),
+*                             NetIGMP_RxMsgQuery().
+*
+* Note(s)     : (1) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_IGMP_HOST_GRP' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (2) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer,
+*                   (b) but do NOT re-free the timer.
+*
+*               (3) In case of a transmit error :
+*
+*                   (a) Configure a timer to attempt retransmission of the IGMP report, if the error
+*                       is transitory.
+*
+*                       See also 'net_igmp.h  IGMP REPORT DEFINES  Note #2'.
+*
+*                   (b) Revert to 'IDLE' state, if the error is permanent.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_HostGrpReportDlyTimeout (void  *p_host_grp_timeout)
+{
+    NET_IGMP_HOST_GRP  *p_host_grp;
+    NET_TMR_TICK        timeout_tick;
+    NET_ERR             err;
+
+
+    p_host_grp = (NET_IGMP_HOST_GRP *)p_host_grp_timeout;       /* See Note #1b2A.                                      */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE IGMP HOST GRP -------------- */
+    if (p_host_grp == (NET_IGMP_HOST_GRP *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_host_grp->TmrPtr = (NET_TMR *)0;                          /* Clear tmr (see Note #2).                             */
+
+
+                                                                /* ------------------ TX IGMP REPORT ------------------ */
+    NetIGMP_TxMsgReport(p_host_grp, &err);
+    switch (err) {
+        case NET_IGMP_ERR_NONE:                                 /* If NO err, ...                                       */
+             p_host_grp->State = NET_IGMP_HOST_GRP_STATE_IDLE;  /* ... set state to 'IDLE'.                             */
+             break;
+
+
+        case NET_ERR_TX:                                        /* If tx err, ...                                       */
+        case NET_ERR_IF_LINK_DOWN:
+                                                                /* ... cfg new tmr (see Note #3a).                      */
+             timeout_tick      = (NET_TMR_TICK)(NET_IGMP_HOST_GRP_REPORT_DLY_RETRY_SEC * NET_TMR_TIME_TICK_PER_SEC);
+             p_host_grp->TmrPtr =  NetTmr_Get((CPU_FNCT_PTR )&NetIGMP_HostGrpReportDlyTimeout,
+                                             (void        *) p_host_grp,
+                                             (NET_TMR_TICK ) timeout_tick,
+                                             (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                             (NET_ERR     *)&err);
+
+             p_host_grp->State = (err == NET_TMR_ERR_NONE) ? NET_IGMP_HOST_GRP_STATE_DELAYING
+                                                          : NET_IGMP_HOST_GRP_STATE_IDLE;
+             break;
+
+
+        case NET_IGMP_ERR_INVALID_ADDR_SRC:
+        default:                                                /* On all other errs, ...                               */
+             p_host_grp->State = NET_IGMP_HOST_GRP_STATE_IDLE;  /* ... set state to 'IDLE'.                             */
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIGMP_HostGrpGet()
+*
+* Description : (1) Allocate & initialize a host group :
+*
+*                   (a) Get a host group
+*                   (b) Validate   host group
+*                   (c) Initialize host group
+*                   (d) Update host group pool statistics
+*                   (e) Return pointer to host group
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*               (2) The host group pool is implemented as a stack :
+*
+*                   (a) 'NetIGMP_HostGrpPoolPtr' points to the head of the host group pool.
+*
+*                   (b) Host groups' 'NextPtr's link each host group to form the host group pool stack.
+*
+*                   (c) Host groups are inserted & removed at the head of    the host group pool stack.
+*
+*
+*                                       Host groups are
+*                                     inserted & removed
+*                                        at the head
+*                                       (see Note #2c)
+*
+*                                             |                 NextPtr
+*                                             |             (see Note #2b)
+*                                             v                    |
+*                                                                  |
+*                                          -------       -------   v   -------       -------
+*                          Host group ---->|     |------>|     |------>|     |------>|     |
+*                            Pointer       |     |       |     |       |     |       |     |
+*                                          |     |       |     |       |     |       |     |
+*                         (see Note #2a)   -------       -------       -------       -------
+*
+*                                          |                                               |
+*                                          |<--------- Pool of Free host groups ---------->|
+*                                          |                (see Note #2)                  |
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IGMP_ERR_NONE                   Host group successfully allocated &
+*                                                                       initialized.
+*                               NET_IGMP_ERR_HOST_GRP_NONE_AVAIL    NO available host group to allocate.
+*                               NET_IGMP_ERR_HOST_GRP_INVALID_TYPE  Host group is NOT a valid host group type.
+*
+* Return(s)   : Pointer to host group, if NO error(s).
+*
+*               Pointer to NULL,       otherwise.
+*
+* Caller(s)   : NetIGMP_HostGrpAdd().
+*
+* Note(s)     : (3) (a) Host group pool is accessed by 'NetIGMP_HostGrpPoolPtr' during execution of
+*
+*                       (1) NetIGMP_Init()
+*                       (2) NetIGMP_HostGrpGet()
+*                       (3) NetIGMP_HostGrpFree()
+*
+*                   (b) Since the primary tasks of the network protocol suite are prevented from running
+*                       concurrently (see 'net.h  Note #3'), it is NOT necessary to protect the shared
+*                       resources of the host group pool since no asynchronous access from other network
+*                       tasks is possible.
+*********************************************************************************************************
+*/
+
+static  NET_IGMP_HOST_GRP  *NetIGMP_HostGrpGet (NET_ERR  *p_err)
+{
+    NET_IGMP_HOST_GRP  *p_host_grp;
+    NET_ERR             err;
+
+
+                                                                /* ------------------- GET HOST GRP ------------------- */
+    if (NetIGMP_HostGrpPoolPtr != (NET_IGMP_HOST_GRP *)0) {     /* If host grp pool NOT empty, get host grp from pool.  */
+        p_host_grp               = (NET_IGMP_HOST_GRP *)NetIGMP_HostGrpPoolPtr;
+        NetIGMP_HostGrpPoolPtr  = (NET_IGMP_HOST_GRP *)p_host_grp->NextPtr;
+
+    } else {                                                    /* Else none avail, rtn err.                            */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IGMP.NoneAvailCtr);
+       *p_err =   NET_IGMP_ERR_HOST_GRP_NONE_AVAIL;
+        return ((NET_IGMP_HOST_GRP *)0);
+    }
+
+
+                                                                /* ------------------ INIT HOST GRP ------------------- */
+    NetIGMP_HostGrpClr(p_host_grp);
+    DEF_BIT_SET(p_host_grp->Flags, NET_IGMP_FLAG_USED);         /* Set host grp as used.                                */
+
+                                                                /* ------------ UPDATE HOST GRP POOL STATS ------------ */
+    NetStat_PoolEntryUsedInc(&NetIGMP_HostGrpPoolStat, &err);
+
+   *p_err =  NET_IGMP_ERR_NONE;
+
+    return (p_host_grp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIGMP_HostGrpFree()
+*
+* Description : (1) Free a host group :
+*
+*                   (a) Free   host group timer
+*                   (b) Clear  host group controls
+*                   (c) Free   host group back to host group pool
+*                   (d) Update host group pool statistics
+*
+*
+* Argument(s) : p_host_grp  Pointer to a host group.
+*               ----------  Argument checked in NetIGMP_HostGrpRemove()
+*                                                 by NetIGMP_HostGrpLeaveHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_HostGrpRemove().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_HostGrpFree (NET_IGMP_HOST_GRP  *p_host_grp)
+{
+    NET_ERR  err;
+
+
+                                                                    /* -------------- FREE HOST GRP TMR --------------- */
+    if (p_host_grp->TmrPtr != (NET_TMR *)0) {
+        NetTmr_Free(p_host_grp->TmrPtr);
+    }
+
+                                                                    /* ----------------- CLR HOST GRP ----------------- */
+    p_host_grp->State = NET_IGMP_HOST_GRP_STATE_FREE;               /* Set host grp as freed/NOT used.                  */
+    DEF_BIT_CLR(p_host_grp->Flags, NET_IGMP_FLAG_USED);
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+    NetIGMP_HostGrpClr(p_host_grp);
+#endif
+
+                                                                    /* ---------------- FREE HOST GRP ----------------- */
+    p_host_grp->NextPtr     = NetIGMP_HostGrpPoolPtr;
+    NetIGMP_HostGrpPoolPtr = p_host_grp;
+
+                                                                    /* ---------- UPDATE HOST GRP POOL STATS ---------- */
+    NetStat_PoolEntryUsedDec(&NetIGMP_HostGrpPoolStat, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIGMP_HostGrpClr()
+*
+* Description : Clear IGMP host group controls.
+*
+* Argument(s) : p_host_grp  Pointer to an IGMP host group.
+*               ----------  Argument validated in NetIGMP_Init();
+*                                    checked   in NetIGMP_HostGrpGet()
+*                                                   by NetIGMP_HostGrpAdd();
+*                                                 NetIGMP_HostGrpFree()
+*                                                   by NetIGMP_HostGrpRemove().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIGMP_Init(),
+*               NetIGMP_HostGrpGet(),
+*               NetIGMP_HostGrpFree().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIGMP_HostGrpClr (NET_IGMP_HOST_GRP  *p_host_grp)
+{
+    p_host_grp->PrevPtr = (NET_IGMP_HOST_GRP *)0;
+    p_host_grp->NextPtr = (NET_IGMP_HOST_GRP *)0;
+
+    p_host_grp->TmrPtr  = (NET_TMR           *)0;
+
+    p_host_grp->IF_Nbr  =  NET_IF_NBR_NONE;
+    p_host_grp->AddrGrp =  NET_IPv4_ADDR_NONE;
+
+    p_host_grp->State   =  NET_IGMP_HOST_GRP_STATE_FREE;
+    p_host_grp->RefCtr  =  0u;
+    p_host_grp->Flags   =  NET_IGMP_FLAG_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* NET_IGMP_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_igmp.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_igmp.h
new file mode 100644
index 0000000..adcbca3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_igmp.h
@@ -0,0 +1,244 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK IGMP LAYER
+*                                 (INTERNET GROUP MANAGEMENT PROTOCOL)
+*
+* Filename      : net_igmp.h
+* Version       : V3.04.02
+* Programmer(s) : SR
+*********************************************************************************************************
+* Note(s)       : (1) Internet Group Management Protocol ONLY required for network interfaces that require
+*                     reception of IP class-D (multicast) packets (see RFC #1112, Section 3 'Levels of
+*                     Conformance : Level 2').
+*
+*                     (a) IGMP is NOT required for the transmission of IP class-D (multicast) packets
+*                         (see RFC #1112, Section 3 'Levels of Conformance : Level 1').
+*
+*                 (2) Supports Internet Group Management Protocol version 1, as described in RFC #1112
+*                     with the following restrictions/constraints :
+*
+*                     (a) Only one socket may receive datagrams for a specific host group address & port
+*                         number at any given time.
+*
+*                         See also 'net_sock.c  Note #1e'.
+*
+*                     (b) Since sockets do NOT automatically leave IGMP host groups when closed,
+*                         it is the application's responsibility to leave each host group once it is
+*                         no longer needed by the application.
+*
+*                     (c) Transmission of IGMP Query Messages NOT currently supported. #### NET-820
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../../Source/net_cfg_net.h"
+#include  "../../Source/net_type.h"
+#include  "../../Source/net_tmr.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) IGMP Layer module is required only for IP multicast reception & IGMP group management
+*               (see 'net_igmp.h  Note #1').
+*
+*           (2) The following IGMP-module-present configuration value MUST be pre-#define'd
+*               in 'net_cfg_net.h' PRIOR to all other network modules that require IGMP Layer
+*               configuration (see 'net_cfg_net.h  IGMP LAYER CONFIGURATION  Note #2b') :
+*
+*                   NET_IGMP_MODULE_EN
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IGMP_MODULE_PRESENT
+#define  NET_IGMP_MODULE_PRESENT
+
+
+#ifdef   NET_IGMP_MODULE_EN                                /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_IGMP_HOST_GRP_NBR_MIN                         1
+#define  NET_IGMP_HOST_GRP_NBR_MAX       DEF_INT_16U_MAX_VAL    /* See Note #1.                                         */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+                                                                    /* ------------- GRP MEMBERSHIP FNCTS ------------- */
+CPU_BOOLEAN  NetIGMP_HostGrpJoin        (NET_IF_NBR      if_nbr,
+                                         NET_IPv4_ADDR   addr_grp,
+                                         NET_ERR        *p_err);
+
+CPU_BOOLEAN  NetIGMP_HostGrpJoinHandler (NET_IF_NBR      if_nbr,
+                                         NET_IPv4_ADDR   addr_grp,
+                                         NET_ERR        *p_err);
+
+
+CPU_BOOLEAN  NetIGMP_HostGrpLeave       (NET_IF_NBR      if_nbr,
+                                         NET_IPv4_ADDR   addr_grp,
+                                         NET_ERR        *p_err);
+
+CPU_BOOLEAN  NetIGMP_HostGrpLeaveHandler(NET_IF_NBR      if_nbr,
+                                         NET_IPv4_ADDR   addr_grp,
+                                         NET_ERR        *p_err);
+
+
+CPU_BOOLEAN  NetIGMP_IsGrpJoinedOnIF    (NET_IF_NBR      if_nbr,
+                                         NET_IPv4_ADDR   addr_grp);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void         NetIGMP_Init               (void);
+
+                                                                    /* ------------------- RX FNCTS ------------------- */
+void         NetIGMP_Rx                 (NET_BUF        *p_buf,
+                                         NET_ERR        *p_err);
+
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_MCAST_CFG_HOST_GRP_NBR_MAX
+#error  "NET_MCAST_CFG_HOST_GRP_NBR_MAX        not #define'd in 'net_cfg.h'     "
+#error  "                               [MUST be  >= NET_IGMP_HOST_GRP_NBR_MIN]"
+#error  "                               [     &&  <= NET_IGMP_HOST_GRP_NBR_MAX]"
+
+#elif   (DEF_CHK_VAL(NET_MCAST_CFG_HOST_GRP_NBR_MAX,      \
+                     NET_IGMP_HOST_GRP_NBR_MIN,          \
+                     NET_IGMP_HOST_GRP_NBR_MAX) != DEF_OK)
+#error  "NET_MCAST_CFG_HOST_GRP_NBR_MAX  illegally #define'd in 'net_cfg.h'     "
+#error  "                               [MUST be  >= NET_IGMP_HOST_GRP_NBR_MIN]"
+#error  "                               [     &&  <= NET_IGMP_HOST_GRP_NBR_MAX]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* NET_IGMP_MODULE_EN      */
+#endif /* NET_IGMP_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_ipv4.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_ipv4.c
new file mode 100644
index 0000000..de72c01
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_ipv4.c
@@ -0,0 +1,10923 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     NETWORK IP LAYER VERSION 4
+*                                       (INTERNET PROTOCOL V4)
+*
+* Filename      : net_ipv4.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 SL
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Supports Internet Protocol as described in RFC #791, also known as IPv4, with the
+*                     following restrictions/constraints :
+*
+*                     (a) ONLY supports a single default gateway                RFC #1122, Section 3.3.1
+*                             per interface
+*
+*                     (b) IPv4 forwarding/routing NOT currently supported       RFC #1122, Sections 3.3.1,
+*                                                                                           3.3.4 & 3.3.5
+*
+*                     (c) Transmit fragmentation  NOT currently supported       RFC # 791, Section 2.3
+*                                                                                           'Fragmentation &
+*                                                                                              Reassembly'
+*                     (d) IPv4 Security options   NOT           supported       RFC #1108
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_IPv4_MODULE
+
+#include  "net_ipv4.h"
+#include  "net_icmpv4.h"
+#include  "net_igmp.h"
+#include  "../../Source/net_cfg_net.h"
+#include  "../../Source/net_buf.h"
+#include  "../../Source/net_util.h"
+#include  "../../Source/net.h"
+#include  "../../Source/net_udp.h"
+#include  "../../Source/net_tcp.h"
+#include  "../../Source/net_conn.h"
+#include  "../../IF/net_if.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         IPv4 HEADER DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_HDR_VER_MASK                          0xF0u
+#define  NET_IPv4_HDR_VER_SHIFT                            4u
+#define  NET_IPv4_HDR_VER                                  4u   /* Supports IPv4 ONLY (see 'net_ipv4.h  Note #1').      */
+
+
+#define  NET_IPv4_HDR_LEN_MASK                          0x0Fu
+
+#define  NET_IPv4_ID_INIT                                NET_IPv4_ID_NONE
+
+
+/*
+*********************************************************************************************************
+*                                     IPv4 HEADER OPTIONS DEFINES
+*
+* Note(s) : (1) See the following RFC's for IPv4 options summary :
+*
+*               (a) RFC # 791, Section 3.1     'Options'
+*               (b) RFC #1122, Section 3.2.1.8
+*               (c) RFC #1108
+*
+*           (2) IPv4 option types are encoded in the first octet for each IP option as follows :
+*
+*                         7   6 5  4 3 2 1 0
+*                       ---------------------
+*                       |CPY|CLASS|  N B R  |
+*                       ---------------------
+*
+*                   where
+*                           CPY         Indicates whether option is copied into all fragments :
+*                                           '0' - IP option NOT copied into fragments
+*                                           '1' - IP option     copied into fragments
+*                           CLASS       Indicates options class :
+*                                           '00' - Control
+*                                           '01' - Reserved
+*                                           '10' - Debug / Measurement
+*                                           '11' - Reserved
+*                           NBR         Option Number :
+*                                           '00000' - End of Options List
+*                                           '00001' - No Operation
+*                                           '00010' - Security
+*                                           '00011' - Loose  Source Routing
+*                                           '00100' - Internet Timestamp
+*                                           '00111' - Record Route
+*                                           '01001' - Strict Source Routing
+*
+*           (3) IPv4 header allows for a maximum option list length of ten (10) 32-bit options :
+*
+*                   NET_IPv4_HDR_OPT_SIZE_MAX = (NET_IPv4_HDR_SIZE_MAX - NET_IPv4_HDR_SIZE_MIN) / NET_IPv4_HDR_OPT_SIZE_WORD
+*
+*                                           = (60 - 20) / (32-bits)
+*
+*                                           =  Ten (10) 32-bit options
+*
+*           (4) 'NET_IPv4_OPT_SIZE'  MUST be pre-defined PRIOR to all definitions that require IPv4 option
+*                size data type.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_HDR_OPT_COPY_FLAG               DEF_BIT_07
+
+#define  NET_IPv4_HDR_OPT_CLASS_MASK                    0x60u
+#define  NET_IPv4_HDR_OPT_CLASS_CTRL                    0x00u
+#define  NET_IPv4_HDR_OPT_CLASS_RESERVED_1              0x20u
+#define  NET_IPv4_HDR_OPT_CLASS_DBG                     0x40u
+#define  NET_IPv4_HDR_OPT_CLASS_RESERVED_2              0x60u
+
+#define  NET_IPv4_HDR_OPT_NBR_MASK                      0x1Fu
+#define  NET_IPv4_HDR_OPT_NBR_END_LIST                  0x00u
+#define  NET_IPv4_HDR_OPT_NBR_NOP                       0x01u
+#define  NET_IPv4_HDR_OPT_NBR_SECURITY                  0x02u   /* See 'net_ipv4.h  Note #1d'.                          */
+#define  NET_IPv4_HDR_OPT_NBR_ROUTE_SRC_LOOSE           0x03u
+#define  NET_IPv4_HDR_OPT_NBR_SECURITY_EXTENDED         0x05u   /* See 'net_ipv4.h  Note #1d'.                          */
+#define  NET_IPv4_HDR_OPT_NBR_TS                        0x04u
+#define  NET_IPv4_HDR_OPT_NBR_ROUTE_REC                 0x07u
+#define  NET_IPv4_HDR_OPT_NBR_ROUTE_SRC_STRICT          0x09u
+
+#define  NET_IPv4_HDR_OPT_END_LIST             (                             NET_IPv4_HDR_OPT_CLASS_CTRL | NET_IPv4_HDR_OPT_NBR_END_LIST         )
+#define  NET_IPv4_HDR_OPT_NOP                  (                             NET_IPv4_HDR_OPT_CLASS_CTRL | NET_IPv4_HDR_OPT_NBR_NOP              )
+#define  NET_IPv4_HDR_OPT_SECURITY             (NET_IPv4_HDR_OPT_COPY_FLAG | NET_IPv4_HDR_OPT_CLASS_CTRL | NET_IPv4_HDR_OPT_NBR_SECURITY         )
+#define  NET_IPv4_HDR_OPT_ROUTE_SRC_LOOSE      (NET_IPv4_HDR_OPT_COPY_FLAG | NET_IPv4_HDR_OPT_CLASS_CTRL | NET_IPv4_HDR_OPT_NBR_ROUTE_SRC_LOOSE  )
+#define  NET_IPv4_HDR_OPT_SECURITY_EXTENDED    (NET_IPv4_HDR_OPT_COPY_FLAG | NET_IPv4_HDR_OPT_CLASS_CTRL | NET_IPv4_HDR_OPT_NBR_SECURITY_EXTENDED)
+#define  NET_IPv4_HDR_OPT_TS                   (                             NET_IPv4_HDR_OPT_CLASS_DBG  | NET_IPv4_HDR_OPT_NBR_TS               )
+#define  NET_IPv4_HDR_OPT_ROUTE_REC            (                             NET_IPv4_HDR_OPT_CLASS_CTRL | NET_IPv4_HDR_OPT_NBR_ROUTE_REC        )
+#define  NET_IPv4_HDR_OPT_ROUTE_SRC_STRICT     (NET_IPv4_HDR_OPT_COPY_FLAG | NET_IPv4_HDR_OPT_CLASS_CTRL | NET_IPv4_HDR_OPT_NBR_ROUTE_SRC_STRICT )
+
+#define  NET_IPv4_HDR_OPT_PAD                           0x00u
+
+                                                                /* ---------------- SRC/REC ROUTE OPTS ---------------- */
+#define  NET_IPv4_OPT_ROUTE_PTR_OPT                        0    /* Ptr ix to       route opt itself.                    */
+#define  NET_IPv4_OPT_ROUTE_PTR_ROUTE                      4    /* Ptr ix to first route (min legal ptr val).           */
+
+                                                                /* --------------------- TS OPTS ---------------------- */
+#define  NET_IPv4_OPT_TS_PTR_OPT                           0    /* Ptr ix to       TS    opt itself.                    */
+#define  NET_IPv4_OPT_TS_PTR_TS                            4    /* Ptr ix to first TS    (min legal ptr val).           */
+
+#define  NET_IPv4_OPT_TS_OVF_MASK                       0xF0u
+#define  NET_IPv4_OPT_TS_OVF_SHIFT                         4u
+#define  NET_IPv4_OPT_TS_OVF_MAX                          15u
+
+#define  NET_IPv4_OPT_TS_FLAG_MASK                      0x0Fu
+#define  NET_IPv4_OPT_TS_FLAG_TS_ONLY                      0u
+#define  NET_IPv4_OPT_TS_FLAG_TS_ROUTE_REC                 1u
+#define  NET_IPv4_OPT_TS_FLAG_TS_ROUTE_SPEC                3u
+
+
+
+
+#define  NET_IPv4_HDR_OPT_SIZE_ROUTE                     NET_IPv4_HDR_OPT_SIZE_WORD
+#define  NET_IPv4_HDR_OPT_SIZE_TS                        NET_IPv4_HDR_OPT_SIZE_WORD
+#define  NET_IPv4_HDR_OPT_SIZE_SECURITY                    3
+
+#define  NET_IPv4_OPT_PARAM_NBR_MIN                        1
+
+#define  NET_IPv4_OPT_PARAM_NBR_MAX_ROUTE                  9
+#define  NET_IPv4_OPT_PARAM_NBR_MAX_TS_ONLY                9
+#define  NET_IPv4_OPT_PARAM_NBR_MAX_TS_ROUTE               4
+
+#define  NET_IPv4_HDR_OPT_IX                             NET_IPv4_HDR_SIZE_MIN
+#define  NET_IPv4_OPT_IX_RX                                0
+
+
+/*
+*********************************************************************************************************
+*                              IPv4 ADDRESS CONFIGURATION STATE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_ADDR_CFG_STATE_NONE                      0u
+#define  NET_IPv4_ADDR_CFG_STATE_STATIC                   10u
+#define  NET_IPv4_ADDR_CFG_STATE_DYNAMIC                  20u
+#define  NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT             21u
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                 IPv4 SOURCE ROUTE OPTION DATA TYPE
+*
+* Note(s) : (1) See the following RFC's for Source Route options summary :
+*
+*               (a) RFC # 791, Section 3.1         'Options : Loose/Strict Source & Record Route'
+*               (b) RFC #1122, Section 3.2.1.8.(c)
+*
+*           (2) Used for both Source Route options & Record Route options :
+*
+*               (a) NET_IPv4_HDR_OPT_ROUTE_SRC_LOOSE
+*               (b) NET_IPv4_HDR_OPT_ROUTE_SRC_STRICT
+*               (c) NET_IPv4_HDR_OPT_ROUTE_REC
+*
+*           (3) 'Route' declared with 1 entry; prevents removal by compiler optimization.
+*********************************************************************************************************
+*/
+
+typedef  struct  net_ipv4_opt_src_route {
+    CPU_INT08U          Type;                                   /* Src route type (see Note #2).                        */
+    CPU_INT08U          Len;                                    /* Len of   src route opt (in octets).                  */
+    CPU_INT08U          Ptr;                                    /* Ptr into src route opt (octet-ix'd).                 */
+    CPU_INT08U          Pad;                                    /* Forced word-alignment pad octet.                     */
+    NET_IPv4_ADDR       Route[1];                               /* Src route IPv4 addrs (see Note #3).                  */
+} NET_IPv4_OPT_SRC_ROUTE;
+
+
+/*
+*********************************************************************************************************
+*                              IPv4 INTERNET TIMESTAMP OPTION DATA TYPE
+*
+* Note(s) : (1) See the following RFC's for Internet Timestamp option summary :
+*
+*               (a) RFC # 791, Section 3.1         'Options : Internet Timestamp'
+*               (b) RFC #1122, Section 3.2.1.8.(e)
+*
+*           (2) 'TS'/'Route'/'Route_TS' declared with 1 entry; prevents removal by compiler optimization.
+*********************************************************************************************************
+*/
+
+typedef  struct  net_ipv4_opt_ts {
+    CPU_INT08U          Type;                                   /* TS type.                                             */
+    CPU_INT08U          Len;                                    /* Len of   src route opt (in octets).                  */
+    CPU_INT08U          Ptr;                                    /* Ptr into src route opt (octet-ix'd).                 */
+    CPU_INT08U          Ovf_Flags;                              /* Ovf/Flags.                                           */
+    NET_TS              TS[1];                                  /* Timestamps (see Note #2).                            */
+} NET_IPv4_OPT_TS;
+
+
+
+typedef  struct  net_ipv4_route_ts {
+    NET_IPv4_ADDR       Route[1];                               /* Route IPv4 addrs (see Note #2).                      */
+    NET_TS              TS[1];                                  /* Timestamps     (see Note #2).                        */
+} NET_IPv4_ROUTE_TS;
+
+#define  NET_IPv4_OPT_TS_ROUTE_SIZE              (sizeof(NET_IPv4_ROUTE_TS))
+
+
+typedef  struct  net_ipv4_opt_ts_route {
+    CPU_INT08U          Type;                                   /* TS type.                                             */
+    CPU_INT08U          Len;                                    /* Len of   src route opt (in octets).                  */
+    CPU_INT08U          Ptr;                                    /* Ptr into src route opt (octet-ix'd).                 */
+    CPU_INT08U          Ovf_Flags;                              /* Ovf/Flags.                                           */
+    NET_IPv4_ROUTE_TS   Route_TS[1];                            /* Route IPv4 addrs / TS (see Note #2).                 */
+} NET_IPv4_OPT_TS_ROUTE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_BUF          *NetIPv4_FragReasmListsHead;     /* Ptr to head of frag reasm lists.                     */
+static  NET_BUF          *NetIPv4_FragReasmListsTail;     /* Ptr to tail of frag reasm lists.                     */
+
+static  CPU_INT08U        NetIPv4_FragReasmTimeout_sec;   /* IPv4 frag reasm timeout (in secs ).                  */
+static  NET_TMR_TICK      NetIPv4_FragReasmTimeout_tick;  /* IPv4 frag reasm timeout (in ticks).                  */
+
+
+static  CPU_INT16U        NetIPv4_TxID_Ctr;               /* Global tx ID field ctr.                              */
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                            /* -------------- CFG FNCTS --------------- */
+static  CPU_BOOLEAN      NetIPv4_CfgAddrRemoveAllHandler (NET_IF_NBR         if_nbr,
+                                                          NET_ERR           *p_err);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+static  void             NetIPv4_CfgAddrValidate         (NET_IPv4_ADDR   addr_host,
+                                                          NET_IPv4_ADDR   addr_subnet_mask,
+                                                          NET_IPv4_ADDR   addr_dflt_gateway,
+                                                          NET_ERR        *p_err);
+#endif
+
+                                                                            /* -------------- GET FNCTS --------------- */
+
+static  NET_IPv4_ADDRS  *NetIPv4_GetAddrsHostCfgd        (NET_IPv4_ADDR   addr,
+                                                          NET_IF_NBR     *p_if_nbr);
+
+static  NET_IPv4_ADDRS  *NetIPv4_GetAddrsHostCfgdOnIF    (NET_IPv4_ADDR   addr,
+                                                          NET_IF_NBR      if_nbr);
+
+
+
+                                                                            /* -------- VALIDATE RX DATAGRAMS --------- */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void             NetIPv4_RxPktValidateBuf        (NET_BUF_HDR    *p_buf_hdr,
+                                                          NET_ERR        *p_err);
+#endif
+
+static  void             NetIPv4_RxPktValidate           (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          NET_IPv4_HDR   *p_ip_hdr,
+                                                          NET_ERR        *p_err);
+
+static  void             NetIPv4_RxPktValidateOpt        (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          NET_IPv4_HDR   *p_ip_hdr,
+                                                          CPU_INT08U      ip_hdr_len_size,
+                                                          NET_ERR        *p_err);
+
+static  CPU_BOOLEAN    NetIPv4_RxPktValidateOptRoute     (NET_BUF_HDR    *p_buf_hdr,
+                                                          CPU_INT08U     *p_opts,
+                                                          CPU_INT08U      opt_list_len_rem,
+                                                          CPU_INT08U     *p_opt_len,
+                                                          NET_ERR        *p_err);
+
+static  CPU_BOOLEAN    NetIPv4_RxPktValidateOptTS        (NET_BUF_HDR    *p_buf_hdr,
+                                                          CPU_INT08U     *p_opts,
+                                                          CPU_INT08U      opt_list_len_rem,
+                                                          CPU_INT08U     *p_opt_len,
+                                                          NET_ERR        *p_err);
+
+                                                                                    /* -------- REASM RX FRAGS -------- */
+
+static  NET_BUF       *NetIPv4_RxPktFragReasm            (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          NET_IPv4_HDR   *p_ip_hdr,
+                                                          NET_ERR        *p_err);
+
+static  NET_BUF       *NetIPv4_RxPktFragListAdd          (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          CPU_INT16U      frag_ip_flags,
+                                                          CPU_INT16U      frag_offset,
+                                                          CPU_INT16U      frag_size,
+                                                          NET_ERR        *p_err);
+
+static  NET_BUF       *NetIPv4_RxPktFragListInsert       (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          CPU_INT16U      frag_ip_flags,
+                                                          CPU_INT16U      frag_offset,
+                                                          CPU_INT16U      frag_size,
+                                                          NET_BUF        *p_frag_list,
+                                                          NET_ERR        *p_err);
+
+static  void           NetIPv4_RxPktFragListRemove       (NET_BUF        *p_frag_list,
+                                                          CPU_BOOLEAN     tmr_free);
+
+static  void           NetIPv4_RxPktFragListDiscard      (NET_BUF        *p_frag_list,
+                                                          CPU_BOOLEAN     tmr_free,
+                                                          NET_ERR        *p_err);
+
+static  void           NetIPv4_RxPktFragListUpdate       (NET_BUF        *p_frag_list,
+                                                          NET_BUF_HDR    *p_frag_list_buf_hdr,
+                                                          CPU_INT16U      frag_ip_flags,
+                                                          CPU_INT16U      frag_offset,
+                                                          CPU_INT16U      frag_size,
+                                                          NET_ERR        *p_err);
+
+static  NET_BUF         *NetIPv4_RxPktFragListChkComplete(NET_BUF        *p_frag_list,
+                                                          NET_BUF_HDR    *p_frag_list_buf_hdr,
+                                                          NET_ERR        *p_err);
+
+static  void             NetIPv4_RxPktFragTimeout        (void           *p_frag_list_timeout);
+
+
+                                                                            /* ---------- DEMUX RX DATAGRAMS ---------- */
+
+static  void             NetIPv4_RxPktDemuxDatagram      (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          NET_ERR        *p_err);
+
+
+
+static  void             NetIPv4_RxPktDiscard            (NET_BUF        *p_buf,
+                                                          NET_ERR        *p_err);
+
+
+
+                                                                                    /* ------- VALIDATE TX PKTS ------- */
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+static  void             NetIPv4_TxPktValidate           (NET_BUF_HDR      *p_buf_hdr,
+                                                          NET_IPv4_ADDR     addr_src,
+                                                          NET_IPv4_ADDR     addr_dest,
+                                                          NET_IPv4_TOS      TOS,
+                                                          NET_IPv4_TTL      TTL,
+                                                          CPU_INT16U        flags,
+                                                          void             *p_opts,
+                                                          NET_ERR          *p_err);
+#endif
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void             NetIPv4_TxPktValidateOpt        (void           *p_opts,
+                                                          NET_ERR        *p_err);
+
+static  void             NetIPv4_TxPktValidateOptRouteTS (void           *p_opt_route_ts,
+                                                          CPU_INT08U     *p_opt_len,
+                                                          void          **p_opt_next,
+                                                          NET_ERR        *p_err);
+#endif
+
+                                                                            /* ------------- TX IPv4 PKTS ------------- */
+
+static  void             NetIPv4_TxPkt                   (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          NET_IPv4_ADDR   addr_src,
+                                                          NET_IPv4_ADDR   addr_dest,
+                                                          NET_IPv4_TOS    TOS,
+                                                          NET_IPv4_TTL    TTL,
+                                                          CPU_INT16U      flags,
+                                                          void           *p_opts,
+                                                          NET_ERR        *p_err);
+
+static  CPU_INT08U       NetIPv4_TxPktPrepareOpt         (void           *p_opts,
+                                                          CPU_INT08U     *p_opt_hdr,
+                                                          NET_ERR        *p_err);
+
+static  void             NetIPv4_TxPktPrepareOptRoute    (void           *p_opts,
+                                                          CPU_INT08U     *p_opt_hdr,
+                                                          CPU_INT08U     *p_opt_len,
+                                                          void          **p_opt_next,
+                                                          NET_ERR        *p_err);
+
+static  void             NetIPv4_TxPktPrepareOptTS       (void           *p_opts,
+                                                          CPU_INT08U     *p_opt_hdr,
+                                                          CPU_INT08U     *p_opt_len,
+                                                          void          **p_opt_next,
+                                                          NET_ERR        *p_err);
+
+static  void             NetIPv4_TxPktPrepareOptTSRoute  (void           *p_opts,
+                                                          CPU_INT08U     *p_opt_hdr,
+                                                          CPU_INT08U     *p_opt_len,
+                                                          void          **p_opt_next,
+                                                          NET_ERR        *p_err);
+
+static  void             NetIPv4_TxPktPrepareHdr         (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          CPU_INT16U      ip_hdr_len_tot,
+                                                          CPU_INT08U      ip_opt_len_tot,
+                                                          CPU_INT16U      protocol_ix,
+                                                          NET_IPv4_ADDR   addr_src,
+                                                          NET_IPv4_ADDR   addr_dest,
+                                                          NET_IPv4_TOS    TOS,
+                                                          NET_IPv4_TTL    TTL,
+                                                          CPU_INT16U      flags,
+                                                          CPU_INT32U     *p_ip_hdr_opts,
+                                                          NET_ERR        *p_err);
+
+                                                                                    /* -------- TX IP DATAGRAMS ------- */
+
+static  void             NetIPv4_TxPktDatagram           (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          NET_ERR        *p_err);
+
+static  void             NetIPv4_TxPktDatagramRouteSel   (NET_BUF_HDR    *p_buf_hdr,
+                                                          NET_ERR        *p_err);
+
+
+static  void             NetIPv4_TxPktDiscard            (NET_BUF        *p_buf,
+                                                          NET_ERR        *p_err);
+
+
+                                                                            /* ----------- RE-TX IPv4 PKTS ------------ */
+
+static  void             NetIPv4_ReTxPkt                 (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          NET_ERR        *p_err);
+
+static  void             NetIPv4_ReTxPktPrepareHdr       (NET_BUF        *p_buf,
+                                                          NET_BUF_HDR    *p_buf_hdr,
+                                                          NET_ERR        *p_err);
+
+static  CPU_BOOLEAN      NetIPv4_IsAddrHostHandler       (NET_IPv4_ADDR   addr);
+
+static  CPU_BOOLEAN      NetIPv4_IsAddrHostCfgdHandler   (NET_IPv4_ADDR   addr);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            NetIPv4_Init()
+*
+* Description : (1) Initialize Internet Protocol Layer :
+*
+*                   (a) Initialize ALL interfaces' configurable IPv4 addresses
+*                   (b) Initialize IPv4 fragmentation list pointers
+*                   (c) Initialize IPv4 identification (ID) counter
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) (a) Default IPv4 address initialization is invalid & forces the developer or higher-layer
+*                       protocol application to configure valid IPv4 address(s).
+*
+*                   (b) Address configuration state initialized to 'static' by default.
+*
+*                       See also 'net_ipv4.h  NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE  Note #1b',
+*                                'NetIPv4_CfgAddrRemove()     Note #5c',
+*                              & 'NetIPv4_CfgAddrRemoveAll()  Note #4c'.
+*
+*                   See also 'NetIPv4_CfgAddrAdd()         Note #7',
+*                            'NetIPv4_CfgAddrAddDynamic()  Note #8',
+*                            'NetIPv4_CfgAddrRemove()      Note #5',
+*                          & 'NetIPv4_CfgAddrRemoveAll()   Note #4'.
+*********************************************************************************************************
+*/
+
+void  NetIPv4_Init (void)
+{
+    NET_IPv4_IF_CFG   *p_ip_if_cfg;
+    NET_IPv4_ADDRS    *p_ip_addrs;
+    NET_IP_ADDRS_QTY   addr_ix;
+    NET_IF_NBR         if_nbr;
+
+
+                                                                    /* --------------- INIT IPv4 ADDRS ---------------- */
+    if_nbr     =  NET_IF_NBR_BASE;
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+    for ( ; if_nbr < NET_IF_NBR_IF_TOT; if_nbr++) {                 /* Init ALL IF's IPv4 addrs to NONE (see Note #2a). */
+        addr_ix   =  0u;
+        p_ip_addrs = &p_ip_if_cfg->AddrsTbl[addr_ix];
+        for ( ; addr_ix < NET_IPv4_CFG_IF_MAX_NBR_ADDR; addr_ix++) {
+            p_ip_addrs->AddrHost               = NET_IPv4_ADDR_NONE;
+            p_ip_addrs->AddrHostSubnetMask     = NET_IPv4_ADDR_NONE;
+            p_ip_addrs->AddrHostSubnetMaskHost = NET_IPv4_ADDR_NONE;
+            p_ip_addrs->AddrHostSubnetNet      = NET_IPv4_ADDR_NONE;
+            p_ip_addrs->AddrDfltGateway        = NET_IPv4_ADDR_NONE;
+            p_ip_addrs++;
+        }
+
+        p_ip_if_cfg->AddrsNbrCfgd         = 0u;
+        p_ip_if_cfg->AddrCfgState         = NET_IPv4_ADDR_CFG_STATE_STATIC;  /* Init to static addr cfg (see Note #2b).  */
+        p_ip_if_cfg->AddrProtocolConflict = DEF_NO;
+
+        p_ip_if_cfg++;
+    }
+
+
+                                                                    /* ------------- INIT IPv4 FRAG LISTS ------------- */
+    NetIPv4_FragReasmListsHead = (NET_BUF *)0;
+    NetIPv4_FragReasmListsTail = (NET_BUF *)0;
+
+                                                                    /* --------------- INIT IPv4 ID CTR --------------- */
+    NetIPv4_TxID_Ctr           =  NET_IPv4_ID_INIT;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIPv4_CfgAddrAdd()
+*
+* Description : (1) Add a statically-configured IPv4 host address, subnet mask, & default gateway to an interface :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  address configuration :
+*                       (1) Validate interface
+*                       (2) Validate IPv4 address, subnet mask, & default gateway
+*                       (3) Validate IPv4 address configured
+*                       (4) Validate IPv4 address configuration state                       See Note #7b1
+*                       (5) Validate number of    configured IP addresses
+*
+*                   (c) Configure static IPv4 address                                       See Note #7a1
+*                   (d) Release   network lock
+*
+*
+*               (2) Configured IPv4 addresses are organized in an address table implemented as an array :
+*
+*                   (a) (1) (A) NET_IPv4_CFG_IF_MAX_NBR_ADDR configures each interface's maximum number of
+*                               configured IPv4 addresses.
+*
+*                           (B) This value is used to declare the size of each interface's address table.
+*
+*                       (2) Each configurable interface's 'AddrsNbrCfgd' indicates the current number of
+*                           configured IPv4 addresses.
+*
+*                   (b) Each address table is zero-based indexed :
+*
+*                       (1) Configured addresses are organized contiguously from indices '0' to 'N - 1'.
+*
+*                       (2) NO addresses         are configured             from indices 'N' to 'M - 1',
+*                           for 'N' NOT equal to 'M'.
+*
+*                       (3) The next available table index to add a configured address is at index 'N',
+*                           if  'N' NOT equal to 'M'.
+*
+*                       (4) Each address table is initialized, & also de-configured, with NULL address
+*                           value NET_IPv4_ADDR_NONE, at ALL table indices following configured addresses.
+*
+*                               where
+*                                       M       maximum number of configured addresses (see Note #2a1A)
+*                                       N       current number of configured addresses (see Note #2a1B)
+*
+*
+*                                                    Configured IPv4
+*                                                    Addresses Table
+*                                                     (see Note #2)
+*
+*                                -------------------------------------------------------       -----            -----
+*                                |  Cfg'd Addr #0  | Subnet Mask #0  | Dflt Gateway #0 |         ^                ^
+*                                |-----------------|-----------------|-----------------|         |                |
+*                                |  Cfg'd Addr #1  | Subnet Mask #1  | Dflt Gateway #1 |                          |
+*                                |-----------------|-----------------|-----------------|   Current number         |
+*                                |  Cfg'd Addr #2  | Subnet Mask #2  | Dflt Gateway #2 |   of configured          |
+*                                |-----------------|-----------------|-----------------|   IPv4 addresses         |
+*                                |        .        |        .        |        .        |  on an interface         |
+*                                |        .        |        .        |        .        |  (see Note #2a2)
+*                                |        .        |        .        |        .        |                    Maximum number
+*                                |-----------------|-----------------|-----------------|         |          of configured
+*                                |  Cfg'd Addr #N  | Subnet Mask #N  | Dflt Gateway #N |         v          IPv4 addresses
+*      Next available            |-----------------|-----------------|-----------------|       -----       for an interface
+*   address to configure  -----> |    ADDR NONE    |    ADDR NONE    |    ADDR NONE    |         ^         (see Note #2a1)
+*      (see Note #2b3)           |-----------------|-----------------|-----------------|         |
+*                                |        .        |        .        |        .        |                          |
+*                                |        .        |        .        |        .        |   Non-configured         |
+*                                |        .        |        .        |        .        |  address entries         |
+*                                |        .        |        .        |        .        |  (see Note #2b4)         |
+*                                |        .        |        .        |        .        |                          |
+*                                |-----------------|-----------------|-----------------|         |                |
+*                                |    ADDR NONE    |    ADDR NONE    |    ADDR NONE    |         v                v
+*                                -------------------------------------------------------       -----            -----
+*
+*
+*                   See also 'net_ipv4.h  NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE  Note #1a'.
+*
+* Argument(s) : if_nbr              Interface number to configure.
+*
+*               addr_host           Desired IPv4 address to add to this interface     (see Note #5).
+*
+*               addr_subnet_mask    Desired IPv4 address subnet mask     to configure (see Note #5).
+*
+*               addr_dflt_gateway   Desired IPv4 default gateway address to configure (see Note #5).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   IPv4 address successfully configured.
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                               NET_IPv4_ERR_ADDR_CFG_STATE         Invalid IPv4 address configuration state --
+*                                                                       NOT in static address configuration
+*                                                                       (see Note #7b1).
+*                               NET_IPv4_ERR_ADDR_TBL_FULL          Interface's configured IPv4 address table full.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_USE        IPv4 address already configured on an interface.
+*
+*                                                                   -- RETURNED BY NetIPv4_CfgAddrValidate() : ---
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST      Invalid IPv4 address, subnet mask, or address/
+*                                                                       subnet mask combination.
+*                               NET_IPv4_ERR_INVALID_ADDR_GATEWAY   Invalid IPv4 default gateway address.
+*
+*                                                                   -- RETURNED BY NetIF_IsValidCfgdHandler() : --
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+*                                                                   --- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if valid IPv4 address, subnet mask, & default gateway configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #3].
+*
+* Note(s)     : (3) NetIPv4_CfgAddrAdd() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (4) NetIPv4_CfgAddrAdd() blocked until network initialization completes.
+*
+*               (5) IPv4 addresses MUST be in host-order.
+*
+*               (6) (a) RFC #1122, Section 3.3.1.6 states that "a manual method of entering ... the following
+*                       ... configuration data MUST be provided" :
+*
+*                       (1) "IPv4 address(es)"
+*                       (2) "Address mask(s)"
+*                       (3) "A list of default gateways"
+*
+*                   (b) (1) RFC #1122, Section 3.3.1.1 states that "the host IPv4 layer MUST operate correctly
+*                           in a minimal network environment, and in particular, when there are no gateways".
+*
+*                           In other words, a host on an isolated network should be able to correctly operate
+*                           & communicate with all other hosts on its local network without need of a gateway
+*                           or configuration of a gateway.
+*
+*                       (2) However, a configured gateway MUST be on the same network as the host's IPv4 address
+*                           -- i.e. the network portion of the configured IPv4 address & the configured gateway
+*                           addresses MUST be identical.
+*
+*                       See also 'NetIPv4_CfgAddrValidate()  Note #2'.
+*
+*               (7) (a) An interface may be configured with either :
+*
+*                       (1) One or more statically- configured IPv4 addresses (default configuration)
+*                               OR
+*                       (2) Exactly one dynamically-configured IPv4 address
+*
+*                   (b) (1) If an interface's address(s) are NOT already statically-configured, NO
+*                           statically-configured address(s) may be added.
+*
+*                       (2) Any dynamically-configured address MUST be removed before adding any
+*                           statically-configured address(s).
+*
+*                   See also 'net_ipv4.h  NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE  Note #1b',
+*                            'NetIPv4_CfgAddrAddDynamic()  Note #8',
+*                            'NetIPv4_CfgAddrRemove()      Note #5',
+*                          & 'NetIPv4_CfgAddrRemoveAll()   Note #4'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_CfgAddrAdd (NET_IF_NBR      if_nbr,
+                                 NET_IPv4_ADDR   addr_host,
+                                 NET_IPv4_ADDR   addr_subnet_mask,
+                                 NET_IPv4_ADDR   addr_dflt_gateway,
+                                 NET_ERR        *p_err)
+{
+    CPU_BOOLEAN       addr_cfgd;
+    NET_IPv4_IF_CFG  *p_ip_if_cfg;
+    NET_IPv4_ADDRS   *p_ip_addrs;
+    CPU_BOOLEAN       result;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                        /* ----------- VALIDATE RTN ERR PTR ----------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                        /* ------------- ACQUIRE NET LOCK ------------- */
+    Net_GlobalLockAcquire((void *)&NetIPv4_CfgAddrAdd, p_err);          /* See Note #3b.                                */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                                      /* If init NOT complete, exit (see Note #4).    */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+
+                                                                        /* ------------- VALIDATE IF NBR -------------- */
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_fail;
+    }
+
+                                                                        /* ------------ VALIDATE IP ADDRS ------------- */
+    NetIPv4_CfgAddrValidate(addr_host, addr_subnet_mask, addr_dflt_gateway, p_err);
+    if (*p_err != NET_IPv4_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+                                                                        /* Validate host addr cfg'd.                    */
+    addr_cfgd = NetIPv4_IsAddrHostCfgdHandler(addr_host);
+    if (addr_cfgd != DEF_NO) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgInvAddrInUseCtr);
+       *p_err =  NET_IPv4_ERR_ADDR_CFG_IN_USE;
+        goto exit_fail;
+    }
+
+
+
+                                                                        /* ------- VALIDATE IPv4 ADDR CFG STATE ------- */
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+
+    switch (p_ip_if_cfg->AddrCfgState) {
+        case NET_IPv4_ADDR_CFG_STATE_STATIC:                            /* See Note #7b1.                               */
+             break;
+
+
+        case NET_IPv4_ADDR_CFG_STATE_NONE:
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC:
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrStateCtr);
+            *p_err =  NET_IPv4_ERR_ADDR_CFG_STATE;
+             goto exit_fail;
+    }
+
+
+                                                                        /* ----- VALIDATE NBR CFG'D IPv4 ADDRS -------- */
+    if (p_ip_if_cfg->AddrsNbrCfgd >= NET_IPv4_CFG_IF_MAX_NBR_ADDR) {    /* If nbr cfg'd addrs >= max, ...               */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrTblFullCtr);
+       *p_err =  NET_IPv4_ERR_ADDR_TBL_FULL;                            /* ... rtn tbl full.                            */
+        goto exit_fail;
+    }
+
+
+                                                                        /* ----------- CFG STATIC IPv4 ADDR ----------- */
+    p_ip_addrs                         = &p_ip_if_cfg->AddrsTbl[p_ip_if_cfg->AddrsNbrCfgd];
+    p_ip_addrs->AddrHost               =  addr_host;
+    p_ip_addrs->AddrHostSubnetMask     =              addr_subnet_mask;
+    p_ip_addrs->AddrHostSubnetMaskHost =             ~addr_subnet_mask;
+    p_ip_addrs->AddrHostSubnetNet      =  addr_host & addr_subnet_mask;
+    p_ip_addrs->AddrDfltGateway        =  addr_dflt_gateway;
+
+    p_ip_if_cfg->AddrsNbrCfgd++;
+#if 0                                                                   /* See Note #7b1.                               */
+                                                                        /* Set to static  addr cfg (see Note #7a1).     */
+    p_ip_if_cfg->AddrCfgState          =  NET_IPv4_ADDR_CFG_STATE_STATIC;
+#endif
+    CPU_CRITICAL_ENTER();
+    p_ip_if_cfg->AddrProtocolConflict  =  DEF_NO;                       /* Clr    dynamic addr conflict.                */
+    CPU_CRITICAL_EXIT();
+
+
+    result = DEF_OK;
+   *p_err  = NET_IPv4_ERR_NONE;
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+exit_fail:
+    result = DEF_FAIL;
+
+exit_release:
+                                                                        /* ------------- RELEASE NET LOCK ------------- */
+    Net_GlobalLockRelease();
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_CfgAddrAddDynamic()
+*
+* Description : (1) Add a dynamically-configured IPv4 host address, subnet mask, & default gateway to
+*                   an interface :
+*
+*                   (a) Acquire    network lock
+*                   (b) Validate   address configuration :
+*                       (1) Validate interface
+*                       (2) Validate IPv4 address, subnet mask, & default gateway
+*                       (3) Validate IPv4 address configured
+*                       (4) Validate IPv4 address configuration state                   See Note #8b
+*
+*                   (c) Remove ALL configured IPv4 address(s)                           See Note #8c
+*                   (d) Configure  dynamic    IPv4 address                              See Note #8a2
+*                   (e) Release    network lock
+*
+*
+*               (2) Configured IP addresses are organized in an address table implemented as an array :
+*
+*                   (a) (1) (A) NET_IPv4_CFG_IF_MAX_NBR_ADDR configures each interface's maximum number of
+*                               configured IPv4 addresses.
+*
+*                           (B) This value is used to declare the size of each interface's address table.
+*
+*                       (2) Each configurable interface's 'AddrsNbrCfgd' indicates the current number of
+*                           configured IPv4 addresses.
+*
+*                   (b) Each address table is zero-based indexed :
+*
+*                       (1) Configured addresses are organized contiguously from indices '0' to 'N - 1'.
+*
+*                       (2) NO addresses         are configured             from indices 'N' to 'M - 1',
+*                           for 'N' NOT equal to 'M'.
+*
+*                       (3) The next available table index to add a configured address is at index 'N',
+*                           if  'N' NOT equal to 'M'.
+*
+*                       (4) Each address table is initialized, & also de-configured, with NULL address
+*                           value NET_IPv4_ADDR_NONE, at ALL table indices following configured addresses.
+*
+*                               where
+*                                       M       maximum number of configured addresses (see Note #2a1A)
+*                                       N       current number of configured addresses (see Note #2a1B)
+*
+*
+*                                                    Configured IPv4
+*                                                    Addresses Table
+*                                                     (see Note #2)
+*
+*                                -------------------------------------------------------       -----            -----
+*                                |  Cfg'd Addr #0  | Subnet Mask #0  | Dflt Gateway #0 |         ^                ^
+*                                |-----------------|-----------------|-----------------|         |                |
+*                                |  Cfg'd Addr #1  | Subnet Mask #1  | Dflt Gateway #1 |                          |
+*                                |-----------------|-----------------|-----------------|   Current number         |
+*                                |  Cfg'd Addr #2  | Subnet Mask #2  | Dflt Gateway #2 |   of configured          |
+*                                |-----------------|-----------------|-----------------|   IPv4 addresses         |
+*                                |        .        |        .        |        .        |  on an interface         |
+*                                |        .        |        .        |        .        |  (see Note #2a2)
+*                                |        .        |        .        |        .        |                    Maximum number
+*                                |-----------------|-----------------|-----------------|         |          of configured
+*                                |  Cfg'd Addr #N  | Subnet Mask #N  | Dflt Gateway #N |         v          IPv4 addresses
+*      Next available            |-----------------|-----------------|-----------------|       -----       for an interface
+*   address to configure  -----> |    ADDR NONE    |    ADDR NONE    |    ADDR NONE    |         ^         (see Note #2a1)
+*      (see Note #2b3)           |-----------------|-----------------|-----------------|         |
+*                                |        .        |        .        |        .        |                          |
+*                                |        .        |        .        |        .        |   Non-configured         |
+*                                |        .        |        .        |        .        |  address entries         |
+*                                |        .        |        .        |        .        |  (see Note #2b4)         |
+*                                |        .        |        .        |        .        |                          |
+*                                |-----------------|-----------------|-----------------|         |                |
+*                                |    ADDR NONE    |    ADDR NONE    |    ADDR NONE    |         v                v
+*                                -------------------------------------------------------       -----            -----
+*
+*
+*                   See also 'net_ipv4.h  NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE  Note #1a'.
+*
+*
+* Argument(s) : if_nbr              Interface number to configure.
+*
+*               addr_host           Desired IPv4 address to add to this interface     (see Note #6).
+*
+*               addr_subnet_mask    Desired IPv4 address subnet mask     to configure (see Note #6).
+*
+*               addr_dflt_gateway   Desired IPv4 default gateway address to configure (see Note #6).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   IPv4 address successfully configured.
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                               NET_IPv4_ERR_ADDR_CFG_STATE         Invalid IPv4 address configuration state --
+*                                                                       NOT in dynamic address initialization
+*                                                                       (see Note #8b1).
+*                               NET_IPv4_ERR_ADDR_CFG_IN_USE        IPv4 address already configured on an interface.
+*
+*                                                                   -- RETURNED BY NetIPv4_CfgAddrValidate() : ---
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST      Invalid IPv4 address, subnet mask, or address/
+*                                                                       subnet mask combination.
+*                               NET_IPv4_ERR_INVALID_ADDR_GATEWAY   Invalid IPv4 default gateway address.
+*
+*                                                                   --- RETURNED BY NetIF_IsEnCfgdHandler() : ----
+*                               NET_IF_ERR_INVALID_IF               Invalid OR disabled network interface.
+*
+*                                                                   --- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if valid IPv4 address, subnet mask, & default gateway configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Network Application.
+*
+*               This function is a network protocol suite initialization function & SHOULD be called only
+*               by appropriate network application function(s) [see also Notes #3 & #4].
+*
+* Note(s)     : (3) NetIPv4_CfgAddrAddDynamic() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (4) Application calls to dynamic address configuration functions MUST be sequenced as follows :
+*
+*                   (a) NetIPv4_CfgAddrAddDynamicStart()  MUST precede NetIPv4_CfgAddrAddDynamic()
+*
+*                   See also 'NetIPv4_CfgAddrAddDynamicStart()  Note #3'
+*                          & 'NetIPv4_CfgAddrAddDynamicStop()   Note #3'.
+*
+*               (5) NetIPv4_CfgAddrAddDynamic() blocked until network initialization completes.
+*
+*               (6) IPv4 addresses MUST be in host-order.
+*
+*               (7) (a) RFC #1122, Section 3.3.1.6 states that "a manual method of entering ... the following
+*                       ... configuration data MUST be provided" :
+*
+*                       (1) "IPv4 address(es)"
+*                       (2) "Address mask(s)"
+*                       (3) "A list of default gateways"
+*
+*                   (b) (1) RFC #1122, Section 3.3.1.1 states that "the host IPv4 layer MUST operate correctly
+*                           in a minimal network environment, and in particular, when there are no gateways".
+*
+*                           In other words, a host on an isolated network should be able to correctly operate
+*                           & communicate with all other hosts on its local network without need of a gateway
+*                           or configuration of a gateway.
+*
+*                       (2) However, a configured gateway MUST be on the same network as the host's IPv4 address
+*                           -- i.e. the network portion of the configured IPv4 address & the configured gateway
+*                           addresses MUST be identical.
+*
+*                       See also 'NetIPv4_CfgAddrValidate()  Note #2'.
+*
+*               (8) (a) An interface may be configured with either :
+*
+*                       (1) One or more statically- configured IPv4 addresses (default configuration)
+*                               OR
+*                       (2) Exactly one dynamically-configured IPv4 address
+*
+*                   (b) (1) If an interface's address configuration is NOT currently in dynamic address
+*                           initialization, NO (dynamically-configured) address may be added.
+*
+*                       (2) Dynamic address initialization MUST be started before adding any dynamically-
+*                           configured address (see Note #4a).
+*
+*                   (c) If any address(s) are configured on an interface when the application configures
+*                       a dynamically-configured address, then ALL configured address(s) are removed.
+*
+*                       (1) ALL configured address(s) already  removed in NetIPv4_CfgAddrAddDynamicStart().
+*                           These address(s) do NOT need to be re-removed but are shown for completeness.
+*
+*                           See also 'NetIPv4_CfgAddrAddDynamicStart()  Note #1d'.
+*
+*                   See also 'net_ipv4.h  NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE  Note #1b',
+*                            'NetIPv4_CfgAddrAdd()        Note #7',
+*                            'NetIPv4_CfgAddrRemove()     Note #5',
+*                          & 'NetIPv4_CfgAddrRemoveAll()  Note #4'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_CfgAddrAddDynamic (NET_IF_NBR      if_nbr,
+                                        NET_IPv4_ADDR   addr_host,
+                                        NET_IPv4_ADDR   addr_subnet_mask,
+                                        NET_IPv4_ADDR   addr_dflt_gateway,
+                                        NET_ERR        *p_err)
+{
+    CPU_BOOLEAN       addr_cfgd;
+    NET_IPv4_IF_CFG  *p_ip_if_cfg;
+    NET_IPv4_ADDRS   *p_ip_addrs;
+    CPU_BOOLEAN       result;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                        /* ----------- VALIDATE RTN ERR PTR ----------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                        /* ------------- ACQUIRE NET LOCK ------------- */
+    Net_GlobalLockAcquire((void *)&NetIPv4_CfgAddrAddDynamic, p_err);   /* See Note #3b.                                */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                                      /* If init NOT complete, exit (see Note #5).    */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+
+                                                                        /* ------------- VALIDATE IF NBR -------------- */
+   (void)NetIF_IsEnCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_fail;
+    }
+
+                                                                        /* ----------- VALIDATE IPv4 ADDRS ------------ */
+    NetIPv4_CfgAddrValidate(addr_host, addr_subnet_mask, addr_dflt_gateway, p_err);
+    if (*p_err != NET_IPv4_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+                                                                        /* Validate host addr cfg'd.                    */
+    addr_cfgd = NetIPv4_IsAddrHostCfgdHandler(addr_host);
+    if (addr_cfgd != DEF_NO) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgInvAddrInUseCtr);
+       *p_err =  NET_IPv4_ERR_ADDR_CFG_IN_USE;
+        goto exit_fail;
+    }
+
+
+
+                                                                        /* ------- VALIDATE IPv4 ADDR CFG STATE ------- */
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+
+    switch (p_ip_if_cfg->AddrCfgState) {
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT:                      /* See Note #8b1.                               */
+             break;
+
+
+        case NET_IPv4_ADDR_CFG_STATE_NONE:
+        case NET_IPv4_ADDR_CFG_STATE_STATIC:
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrStateCtr);
+            *p_err =  NET_IPv4_ERR_ADDR_CFG_STATE;
+             goto exit_fail;
+    }
+
+
+
+#if 0                                                                   /* Removed in dynamic start (see Note #8c1).    */
+                                                                        /* ------ REMOVE ALL CFG'D IPv4 ADDR(S) ------- */
+    NetIPv4_CfgAddrRemoveAllHandler(if_nbr, p_err);
+    if (*p_err != NET_IPv4_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+
+                                                                        /* ---------- CFG DYNAMIC IPv4 ADDR ----------- */
+    p_ip_addrs                         = &p_ip_if_cfg->AddrsTbl[0];
+    p_ip_addrs->AddrHost               =  addr_host;
+    p_ip_addrs->AddrHostSubnetMask     =              addr_subnet_mask;
+    p_ip_addrs->AddrHostSubnetMaskHost =             ~addr_subnet_mask;
+    p_ip_addrs->AddrHostSubnetNet      =  addr_host & addr_subnet_mask;
+    p_ip_addrs->AddrDfltGateway        =  addr_dflt_gateway;
+
+    p_ip_if_cfg->AddrsNbrCfgd          =  1u;                           /* Cfg single dynamic addr     (see Note #8a2). */
+                                                                        /* Set to     dynamic addr cfg (see Note #8a2). */
+    p_ip_if_cfg->AddrCfgState          =  NET_IPv4_ADDR_CFG_STATE_DYNAMIC;
+    CPU_CRITICAL_ENTER();
+    p_ip_if_cfg->AddrProtocolConflict  =  DEF_NO;                       /* Clr        dynamic addr conflict.            */
+    CPU_CRITICAL_EXIT();
+
+
+
+   *p_err =  NET_IPv4_ERR_NONE;
+    result = DEF_OK;
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+exit_fail:
+    result = DEF_FAIL;
+
+exit_release:
+                                                                       /* ------------- RELEASE NET LOCK ------------- */
+    Net_GlobalLockRelease();
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv4_CfgAddrAddDynamicStart()
+*
+* Description : (1) Start the dynamic address configuration for an interface :
+*
+*                   (a) Acquire  network lock
+*                   (b) Validate interface
+*                   (c) Validate IPv4 address configuration state(s)                         See Note #5b
+*                   (d) Remove   ALL configured IPv4 host address(s) from interface
+*                   (e) Set      IPv4 address configuration state to dynamic initialization
+*                   (f) Release  network lock
+*
+*
+* Argument(s) : if_nbr      Interface number to start dynamic address configuration.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   Dynamic address configuration successfully
+*                                                                       started.
+*                               NET_IPv4_ERR_ADDR_CFG_STATE         Invalid IPv4 address configuration state
+*                                                                       (see Note #5b).
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS   Another interface already in dynamic address
+*                                                                       initialization (see Note #5b2).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   --- RETURNED BY NetIF_IsEnCfgdHandler() : ---
+*                               NET_IF_ERR_INVALID_IF               Invalid OR disabled network interface.
+*
+*                                                                   --- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if dynamic configuration successfully started.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Network Application.
+*
+*               This function is a network protocol suite initialization function & SHOULD be called only
+*               by appropriate network application function(s) [see also Notes #2 & #3].
+*
+* Note(s)     : (2) NetIPv4_CfgAddrAddDynamicStart() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) Application calls to dynamic address configuration functions MUST be sequenced as follows :
+*
+*                   (a) NetIPv4_CfgAddrAddDynamicStart()  MUST precede NetIPv4_CfgAddrAddDynamic()
+*
+*                   See also 'NetIPv4_CfgAddrAddDynamic()      Note #4'
+*                          & 'NetIPv4_CfgAddrAddDynamicStop()  Note #3'.
+*
+*               (4) NetIPv4_CfgAddrAddDynamicStart() blocked until network initialization completes.
+*
+*               (5) (a) An interface may be configured with either :
+*
+*                       (1) One or more statically- configured IPv4 addresses (default configuration)
+*                               OR
+*                       (2) Exactly one dynamically-configured IPv4 address
+*
+*                   (b) (1) If an interface's address configuration is already in dynamic address
+*                           initialization, then dynamic address initialization does NOT need to be
+*                           re-started.
+*
+*                       (2) Only a single interface is allowed to be in the dynamic address
+*                           initialization state at any one time. #### NET-818
+*
+*                   See also 'net_ipv4.h  NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE  Note #1b',
+*                            'NetIPv4_CfgAddrAdd()         Note #7',
+*                            'NetIPv4_CfgAddrAddDynamic()  Note #8',
+*                            'NetIPv4_CfgAddrRemove()      Note #5',
+*                          & 'NetIPv4_CfgAddrRemoveAll()   Note #4'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_CfgAddrAddDynamicStart (NET_IF_NBR   if_nbr,
+                                             NET_ERR     *p_err)
+{
+    NET_IPv4_IF_CFG  *p_ip_if_cfg;
+    NET_IPv4_IF_CFG  *p_ip_if_cfg_srch;
+    NET_IF_NBR        if_nbr_ix;
+    CPU_BOOLEAN       addr_init;
+    CPU_BOOLEAN       result;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                        /* ----------- VALIDATE RTN ERR PTR ----------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                        /* ------------- ACQUIRE NET LOCK ------------- */
+                                                                        /* See Note #2b.                                */
+    Net_GlobalLockAcquire((void *)&NetIPv4_CfgAddrAddDynamicStart, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                                      /* If init NOT complete, exit (see Note #4).    */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+
+                                                                        /* ------------- VALIDATE IF NBR -------------- */
+   (void)NetIF_IsEnCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+
+                                                                        /* ----- VALIDATE IPv4 ADDR CFG STATE(S) ------ */
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+
+    switch (p_ip_if_cfg->AddrCfgState) {
+        case NET_IPv4_ADDR_CFG_STATE_STATIC:
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC:
+             break;
+
+
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT:                      /* See Note #5b1.                               */
+            *p_err = NET_IPv4_ERR_NONE;
+             goto exit_fail;
+
+
+        case NET_IPv4_ADDR_CFG_STATE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrStateCtr);
+            *p_err =  NET_IPv4_ERR_ADDR_CFG_STATE;
+             goto exit_fail;
+    }
+
+
+    if_nbr_ix       =  NET_IF_NBR_BASE_CFGD;
+    p_ip_if_cfg_srch = &NetIPv4_IF_CfgTbl[if_nbr_ix];
+    addr_init       =  DEF_NO;
+
+    while ((if_nbr_ix <  NET_IF_NBR_IF_TOT) &&                          /* Srch ALL cfg'd IF's  ...                     */
+           (addr_init == DEF_NO)) {
+
+        if ((if_nbr_ix                     != if_nbr) &&                /* ... for any other IF ...                     */
+            (p_ip_if_cfg_srch->AddrCfgState == NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT)) {
+            addr_init  = DEF_YES;                                       /* ... in dynamic addr init.                    */
+
+        } else {
+            if_nbr_ix++;
+            p_ip_if_cfg_srch++;
+        }
+    }
+
+    if (addr_init != DEF_NO) {                                          /* If any cfg'd IF in dynamic addr init, ...    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrStateCtr);
+       *p_err =  NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS;                     /* ... rtn err (see Note #5b2).                 */
+        goto exit_fail;
+    }
+
+
+
+                                                                        /* ------ REMOVE ALL CFG'D IPv4 ADDR(S) ------- */
+    NetIPv4_CfgAddrRemoveAllHandler(if_nbr, p_err);
+    if (*p_err != NET_IPv4_ERR_NONE) {
+         goto exit_fail;
+    }
+
+
+                                                                        /* --------- START DYNAMIC ADDR INIT ---------- */
+    p_ip_if_cfg->AddrCfgState = NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT;   /* Set to dynamic addr init.                    */
+
+
+
+
+
+   *p_err =  NET_IPv4_ERR_NONE;
+    result = DEF_OK;
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+exit_fail:
+    result = DEF_FAIL;
+
+exit_release:
+                                                                        /* ------------- RELEASE NET LOCK ------------- */
+    Net_GlobalLockRelease();
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv4_CfgAddrAddDynamicStop()
+*
+* Description : (1) Stop the dynamic address configuration for an interface (see Note #3a) :
+*
+*                   (a) Acquire  network lock
+*                   (b) Validate interface
+*                   (c) Validate IPv4 address configuration state                       See Note #5b
+*                   (d) Reset    IPv4 address configuration state to static             See Note #5c
+*                   (e) Release  network lock
+*
+*
+* Argument(s) : if_nbr      Interface number to stop dynamic address configuration.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               Dynamic address configuration successfully
+*                                                                   stopped.
+*                               NET_IPv4_ERR_ADDR_CFG_STATE     Invalid IPv4 address configuration state --
+*                                                                   NOT in dynamic address initialization
+*                                                                   (see Note #5b).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if dynamic configuration successfully stopped.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Network Application.
+*
+*               This function is a network protocol suite initialization function & SHOULD be called only
+*               by appropriate network application function(s) [see also Notes #2 & #3].
+*
+* Note(s)     : (2) NetIPv4_CfgAddrAddDynamicStop() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) Application calls to dynamic address configuration functions MUST be sequenced as follows :
+*
+*                   (a) NetIPv4_CfgAddrAddDynamicStop()  MUST follow NetIPv4_CfgAddrAddDynamicStart() --
+*                                                      if & ONLY if dynamic address initialization fails
+*
+*                   See also 'NetIPv4_CfgAddrAddDynamicStart()  Note #3'
+*                          & 'NetIPv4_CfgAddrAddDynamic()       Note #4'.
+*
+*               (4) NetIPv4_CfgAddrAddDynamicStop() blocked until network initialization completes.
+*
+*               (5) (a) An interface may be configured with either :
+*
+*                       (1) One or more statically- configured IPv4 addresses (default configuration)
+*                               OR
+*                       (2) Exactly one dynamically-configured IPv4 address
+*
+*                   (b) If an interface's address configuration is NOT currently in dynamic address
+*                       initialization, then dynamic address initialization may NOT be stopped
+*                       (see Note #3a).
+*
+*                   (c) When NO address(s) are configured on an interface after dynamic address
+*                       initialization stops, then the interface's address configuration is
+*                       defaulted back to statically-configured.
+*
+*                       See also 'NetIPv4_Init()              Note #2b',
+*                                'NetIPv4_CfgAddrRemove()     Note #5c',
+*                              & 'NetIPv4_CfgAddrRemoveAll()  Note #4c'.
+*
+*                   See also 'net_ipv4.h  NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE  Note #1b',
+*                            'NetIPv4_CfgAddrAdd()         Note #7',
+*                            'NetIPv4_CfgAddrAddDynamic()  Note #8',
+*                            'NetIPv4_CfgAddrRemove()      Note #5',
+*                          & 'NetIPv4_CfgAddrRemoveAll()   Note #4'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_CfgAddrAddDynamicStop (NET_IF_NBR   if_nbr,
+                                            NET_ERR     *p_err)
+{
+    NET_IPv4_IF_CFG  *p_ip_if_cfg;
+    CPU_BOOLEAN       result;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                        /* ----------- VALIDATE RTN ERR PTR ----------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                        /* ------------- ACQUIRE NET LOCK ------------- */
+                                                                        /* See Note #2b.                                */
+    Net_GlobalLockAcquire((void *)&NetIPv4_CfgAddrAddDynamicStop, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                                      /* If init NOT complete, exit (see Note #4).    */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+
+                                                                        /* ------------- VALIDATE IF NBR -------------- */
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+
+                                                                        /* ------- VALIDATE IPv4 ADDR CFG STATE ------- */
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+
+    switch (p_ip_if_cfg->AddrCfgState) {
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT:                      /* See Note #5b.                                */
+             break;
+
+
+        case NET_IPv4_ADDR_CFG_STATE_NONE:
+        case NET_IPv4_ADDR_CFG_STATE_STATIC:
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrStateCtr);
+            *p_err =  NET_IPv4_ERR_ADDR_CFG_STATE;
+             goto exit_fail;
+    }
+
+
+                                                                        /* ---------- STOP DYNAMIC ADDR INIT ---------- */
+    p_ip_if_cfg->AddrCfgState = NET_IPv4_ADDR_CFG_STATE_STATIC;         /* Dflt to static addr cfg (see Note #5c).      */
+
+
+
+
+
+   *p_err =  NET_IPv4_ERR_NONE;
+    result = DEF_OK;
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+exit_fail:
+    result = DEF_FAIL;
+
+exit_release:
+                                                                        /* ------------- RELEASE NET LOCK ------------- */
+    Net_GlobalLockRelease();
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_CfgAddrRemove()
+*
+* Description : (1) Remove a configured IPv4 host address, subnet mask, & default gateway from an interface :
+*
+*                   (a) Acquire  network lock
+*                   (b) Validate address to remove :
+*                       (1) Validate interface
+*                       (2) Validate IPv4 address
+*                       (3) Validate IPv4 address configuration state                         See Note #5b
+*
+*                   (c) Remove configured IPv4 address from interface's IPv4 address table :
+*                       (1) Search table for address to remove
+*                       (2) Close all connections for address
+*                       (3) If NO configured IPv4 address(s) remain in table,               See Note #5c
+*                              reset address configuration state to static
+*
+*                   (d) Release  network lock
+*
+*
+* Argument(s) : if_nbr      Interface number to remove address configuration.
+*
+*               addr_host   IPv4 address     to remove (see Note #4).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   Configured IPv4 address successfully removed.
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST      Invalid    IPv4 address.
+*                               NET_IPv4_ERR_ADDR_CFG_STATE         Invalid    IPv4 address configuration state
+*                                                                   (see Note #5b).
+*                               NET_IPv4_ERR_ADDR_TBL_EMPTY         Interface's configured IPv4 address table empty.
+*                               NET_IPv4_ERR_ADDR_NOT_FOUND         IPv4 address NOT found in interface's configured
+*                                                                   IPv4 address table for specified interface.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               -- RETURNED BY NetIF_IsValidCfgdHandler() : --
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if IPv4 address configuration removed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv4_CfgAddrRemove() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) NetIPv4_CfgAddrRemove() blocked until network initialization completes.
+*
+*               (4) IPv4 address MUST be in host-order.
+*
+*               (5) (a) An interface may be configured with either :
+*
+*                       (1) One or more statically- configured IPv4 addresses (default configuration)
+*                               OR
+*                       (2) Exactly one dynamically-configured IPv4 address
+*
+*                   (b) If an interface's IPv4 host address(s) are NOT currently statically- or dynamically-
+*                       configured, then NO address(s) may NOT be removed.
+*
+*                   (c) If NO address(s) are configured on an interface after an address is removed, then
+*                       the interface's address configuration is defaulted back to statically-configured.
+*
+*                       See also 'NetIPv4_Init()              Note #2b'
+*                              & 'NetIPv4_CfgAddrRemoveAll()  Note #4c'.
+*
+*                   See also 'net_ipv4.h  NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE  Note #1b',
+*                            'NetIPv4_CfgAddrAdd()         Note #7',
+*                            'NetIPv4_CfgAddrAddDynamic()  Note #8',
+*                          & 'NetIPv4_CfgAddrRemoveAll()   Note #4'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_CfgAddrRemove (NET_IF_NBR      if_nbr,
+                                    NET_IPv4_ADDR   addr_host,
+                                    NET_ERR        *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_BOOLEAN        addr_valid;
+#endif
+    NET_IPv4_ADDR      addr_cfgd;
+    NET_IPv4_IF_CFG   *p_ip_if_cfg;
+    NET_IPv4_ADDRS    *p_ip_addrs;
+    NET_IPv4_ADDRS    *p_ip_addrs_next;
+    NET_IP_ADDRS_QTY   addr_ix;
+    CPU_BOOLEAN        addr_found;
+    CPU_BOOLEAN        result;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                        /* ----------- VALIDATE RTN ERR PTR ----------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                        /* ------------- ACQUIRE NET LOCK ------------- */
+    Net_GlobalLockAcquire((void *)&NetIPv4_CfgAddrRemove, p_err);       /* See Note #2b.                                */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                                      /* If init NOT complete, exit (see Note #3).    */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+
+                                                                        /* ------------- VALIDATE IF NBR -------------- */
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_fail;
+    }
+
+                                                                        /* ------------ VALIDATE IPv4 ADDR ------------ */
+    addr_valid = NetIPv4_IsValidAddrHost(addr_host);
+    if (addr_valid != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgInvAddrHostCtr);
+       *p_err =  NET_IPv4_ERR_INVALID_ADDR_HOST;
+        goto exit_fail;
+    }
+#endif
+
+
+                                                                        /* ------- VALIDATE IPv4 ADDR CFG STATE ------- */
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+
+    switch (p_ip_if_cfg->AddrCfgState) {
+        case NET_IPv4_ADDR_CFG_STATE_STATIC:                            /* See Note #5b.                                */
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC:
+             break;
+
+
+        case NET_IPv4_ADDR_CFG_STATE_NONE:
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrStateCtr);
+            *p_err =  NET_IPv4_ERR_ADDR_CFG_STATE;
+             goto exit_fail;
+    }
+
+
+                                                                        /* ------ VALIDATE NBR CFG'D IPv4 ADDRS ------- */
+    if (p_ip_if_cfg->AddrsNbrCfgd < 1) {                                /* If nbr cfg'd addrs < 1, ...                  */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrTblEmptyCtr);
+       *p_err =  NET_IPv4_ERR_ADDR_TBL_EMPTY;                           /* ... rtn tbl empty.                           */
+        goto exit_fail;
+    }
+
+
+                                                                        /* --------- SRCH IP ADDR IN ADDR TBL --------- */
+    addr_ix    =  0u;
+    addr_found =  DEF_NO;
+    p_ip_addrs  = &p_ip_if_cfg->AddrsTbl[addr_ix];
+
+    while ((addr_ix    <  p_ip_if_cfg->AddrsNbrCfgd) &&                 /* Srch ALL addrs ...                           */
+           (addr_found == DEF_NO)) {                                    /* ... until addr found.                        */
+
+        if (p_ip_addrs->AddrHost != addr_host) {                        /* If addr NOT found, ...                       */
+            p_ip_addrs++;                                               /* ... adv to next entry.                       */
+            addr_ix++;
+
+        } else {
+            addr_found = DEF_YES;
+        }
+    }
+
+    if (addr_found != DEF_YES) {                                        /* If addr NOT found, ...                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrNotFoundCtr);
+       *p_err =  NET_IPv4_ERR_ADDR_NOT_FOUND;                           /* ... rtn err.                                 */
+        goto exit_fail;
+    }
+
+
+
+                                                                        /* -------- CLOSE ALL IPv4 ADDR CONNS --------- */
+                                                                        /* Close all cfg'd addr's conns.                */
+    addr_cfgd = NET_UTIL_HOST_TO_NET_32(p_ip_addrs->AddrHost);
+    NetConn_CloseAllConnsByAddrHandler((CPU_INT08U      *)      &addr_cfgd,
+                                       (NET_CONN_ADDR_LEN)sizeof(addr_cfgd));
+
+
+                                                                        /* ------ REMOVE IPv4 ADDR FROM ADDR TBL ------ */
+    p_ip_addrs_next = p_ip_addrs;
+    p_ip_addrs_next++;
+    addr_ix++;
+
+    while (addr_ix < p_ip_if_cfg->AddrsNbrCfgd) {                       /* Shift ALL rem'ing tbl addr(s) ...            */
+                                                                        /* ... following removed addr to prev tbl entry.*/
+        p_ip_addrs->AddrHost               = p_ip_addrs_next->AddrHost;
+        p_ip_addrs->AddrHostSubnetMask     = p_ip_addrs_next->AddrHostSubnetMask;
+        p_ip_addrs->AddrHostSubnetMaskHost = p_ip_addrs_next->AddrHostSubnetMaskHost;
+        p_ip_addrs->AddrHostSubnetNet      = p_ip_addrs_next->AddrHostSubnetNet;
+        p_ip_addrs->AddrDfltGateway        = p_ip_addrs_next->AddrDfltGateway;
+
+        p_ip_addrs++;
+        p_ip_addrs_next++;
+        addr_ix++;
+    }
+                                                                        /* Clr last addr tbl entry.                     */
+    p_ip_addrs->AddrHost               = NET_IPv4_ADDR_NONE;
+    p_ip_addrs->AddrHostSubnetMask     = NET_IPv4_ADDR_NONE;
+    p_ip_addrs->AddrHostSubnetMaskHost = NET_IPv4_ADDR_NONE;
+    p_ip_addrs->AddrHostSubnetNet      = NET_IPv4_ADDR_NONE;
+    p_ip_addrs->AddrDfltGateway        = NET_IPv4_ADDR_NONE;
+
+    p_ip_if_cfg->AddrsNbrCfgd--;
+    if (p_ip_if_cfg->AddrsNbrCfgd < 1) {                                /* If NO addr(s) cfg'd, ...                     */
+                                                                        /* ... dflt to static addr cfg (see Note #5c).  */
+        p_ip_if_cfg->AddrCfgState         = NET_IPv4_ADDR_CFG_STATE_STATIC;
+        CPU_CRITICAL_ENTER();
+        p_ip_if_cfg->AddrProtocolConflict = DEF_NO;                     /* Clr   addr conflict.                         */
+        CPU_CRITICAL_EXIT();
+    }
+
+
+
+
+   *p_err =  NET_IPv4_ERR_NONE;
+   result = DEF_OK;
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+
+exit_fail:
+    result = DEF_FAIL;
+                                                                        /* ------------- RELEASE NET LOCK ------------- */
+exit_release:
+    Net_GlobalLockRelease();
+
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_CfgAddrRemoveAll()
+*
+* Description : (1) Remove all configured IPv4 host address(s) from an interface :
+*
+*                   (a) Acquire  network lock
+*                   (b) Validate interface
+*                   (c) Remove   ALL configured IPv4 host address(s) from interface
+*                   (d) Release  network lock
+*
+*
+* Argument(s) : if_nbr      Interface number to remove address configuration.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               -- RETURNED BY NetIPv4_CfgAddrRemoveAllHandler() : ---
+*                               NET_IPv4_ERR_NONE               ALL configured IPv4 address(s) successfully removed.
+*                               NET_IPv4_ERR_ADDR_CFG_STATE     Invalid IPv4 address configuration state (see Note #4b).
+*
+*                                                               ------ RETURNED BY NetIF_IsValidCfgdHandler() : ------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ------- RETURNED BY Net_GlobalLockAcquire() : --------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if ALL interface's configured IP host address(s) successfully removed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv4_CfgAddrRemoveAll() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv4_CfgAddrRemoveAllHandler()  Note #2'.
+*
+*               (3) NetIPv4_CfgAddrRemoveAll() blocked until network initialization completes.
+*
+*               (4) (a) An interface may be configured with either :
+*
+*                       (1) One or more statically- configured IPv4 addresses (default configuration)
+*                               OR
+*                       (2) Exactly one dynamically-configured IPv4 address
+*
+*                   (b) If an interface's IPv4 host address(s) are NOT currently statically- or dynamically-
+*                       configured, then NO address(s) may NOT be removed.
+*
+*                   (c) When NO address(s) are configured on an interface after ALL address(s) are removed,
+*                       the interface's address configuration is defaulted back to statically-configured.
+*
+*                       See also 'NetIPv4_Init()           Note #2b'
+*                              & 'NetIPv4_CfgAddrRemove()  Note #5c'.
+*
+*                   See also 'net_ipv4.h  NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE  Note #1b',
+*                            'NetIPv4._CfgAddrAdd()         Note #7',
+*                            'NetIPv4._CfgAddrAddDynamic()  Note #8',
+*                          & 'NetIPv4._CfgAddrRemove()      Note #5'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_CfgAddrRemoveAll (NET_IF_NBR   if_nbr,
+                                       NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  addr_remove;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                        /* ----------- VALIDATE RTN ERR PTR ----------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetIPv4_CfgAddrRemoveAll, p_err);    /* Acquire net lock (see Note #1b).             */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                                      /* If init NOT complete, exit (see Note #3).    */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);                       /* Validate IF nbr.                             */
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+                                                                        /* Remove all IF's cfg'd host addr(s).          */
+    addr_remove = NetIPv4_CfgAddrRemoveAllHandler(if_nbr, p_err);
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    addr_remove = DEF_FAIL;
+#endif
+
+exit_release:
+    Net_GlobalLockRelease();                                            /* Release net lock.                            */
+
+    return (addr_remove);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_CfgFragReasmTimeout()
+*
+* Description : (1) Configure IPv4 fragment reassembly timeout.
+*
+*                   (a) IPv4 fragment reassembly timeout is the maximum time allowed between received IPv4
+*                       fragments from the same IPv4 datagram.
+*
+* Argument(s) : timeout_sec     Desired value for IPv4 fragment reassembly timeout (in seconds).
+*
+* Return(s)   : DEF_OK,   IPv4 fragment reassembly timeout configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Net_InitDflt(),
+*               Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) Configured timeout does NOT reschedule any current IP fragment reassembly timeout in
+*                   progress but becomes effective the next time IP fragments reassemble with timeout.
+*
+*               (3) Configured timeout converted to 'NET_TMR_TICK' ticks to avoid run-time conversion.
+*
+*               (3) 'NetIPv4_FragReasmTimeout' variables MUST ALWAYS be accessed exclusively in critical
+*                    sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_CfgFragReasmTimeout (CPU_INT08U  timeout_sec)
+{
+    NET_TMR_TICK  timeout_tick;
+    CPU_SR_ALLOC();
+
+
+    if (timeout_sec < NET_IPv4_FRAG_REASM_TIMEOUT_MIN_SEC) {
+        return (DEF_FAIL);
+    }
+    if (timeout_sec > NET_IPv4_FRAG_REASM_TIMEOUT_MAX_SEC) {
+        return (DEF_FAIL);
+    }
+
+    timeout_tick                  = (NET_TMR_TICK)timeout_sec * NET_TMR_TIME_TICK_PER_SEC;
+    CPU_CRITICAL_ENTER();
+    NetIPv4_FragReasmTimeout_sec  =  timeout_sec;
+    NetIPv4_FragReasmTimeout_tick =  timeout_tick;
+    CPU_CRITICAL_EXIT();
+
+   (void)&NetIPv4_FragReasmTimeout_sec;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIPv4_GetAddrHost()
+*
+* Description : Get an interface's IPv4 host address(s) [see Note #3].
+*
+* Argument(s) : if_nbr          Interface number to get IPv4 host address(s).
+*
+*               p_addr_tbl       Pointer to IPv4 address table that will receive the IPv4 host address(s)
+*                                   in host-order for this interface.
+*
+*               p_addr_tbl_qty   Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address table, in number of IPv4 addresses,
+*                                           pointed to by 'p_addr_tbl'.
+*                                   (b) (1) Return the actual number of IPv4 addresses, if NO error(s);
+*                                       (2) Return 0,                                 otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   - RETURNED BY NetIPv4_GetAddrHostHandler() : -
+*                               NET_IPv4_ERR_NONE                   IP host address(s) successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_addr_tbl'/'p_addr_tbl_qty' passed
+*                                                                       a NULL pointer.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL        NO IP host address(s) configured on specified
+*                                                                       interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS   Interface in dynamic address initialization.
+*                               NET_IPv4_ERR_ADDR_TBL_SIZE          Invalid IP address table size.
+*                               NET_IFv4_ERR_INVALID_IF             Invalid network interface number.
+*
+*                                                                   --- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if interface's IPv4 host address(s) successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv4_GetAddrHost() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv4_GetAddrHostHandler()  Note #1'.
+*
+*               (2) NetIPv4_GetAddrHost() blocked until network initialization completes.
+*
+*               (3) IPv4 address(s) returned in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_GetAddrHost (NET_IF_NBR         if_nbr,
+                                  NET_IPv4_ADDR     *p_addr_tbl,
+                                  NET_IP_ADDRS_QTY  *p_addr_tbl_qty,
+                                  NET_ERR           *p_err)
+{
+    CPU_BOOLEAN  addr_avail;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetIPv4_GetAddrHost, p_err); /* Acquire net lock (see Note #1b).                     */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+                                                                /* Get all IF's host addr(s).                           */
+    addr_avail = NetIPv4_GetAddrHostHandler(if_nbr, p_addr_tbl, p_addr_tbl_qty, p_err);
+    goto exit_release;
+
+
+exit_lock_fault:
+   *p_addr_tbl_qty = 0u;
+    return (DEF_FAIL);
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    addr_avail    = DEF_FAIL;
+   *p_addr_tbl_qty = 0u;
+#endif
+
+
+exit_release:
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (addr_avail);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_GetAddrHostHandler()
+*
+* Description : Get an interface's IPv4 host address(s) [see Note #2].
+*
+* Argument(s) : if_nbr          Interface number to get IPv4 host address(s).
+*
+*               p_addr_tbl       Pointer to IPv4 address table that will receive the IPv4 host address(s)
+*                                   in host-order for this interface.
+*
+*               p_addr_tbl_qty   Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address table, in number of IPv4 addresses,
+*                                           pointed to by 'p_addr_tbl'.
+*                                   (b) (1) Return the actual number of IPv4 addresses, if NO error(s);
+*                                       (2) Return 0,                                   otherwise.
+*
+*                               See also Note #3.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   IP host address(s) successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_addr_tbl'/'p_addr_tbl_qty' passed
+*                                                                       a NULL pointer.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL        NO IP host address(s) configured on specified
+*                                                                       interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS   Interface in dynamic address initialization.
+*                               NET_IPv4_ERR_ADDR_TBL_SIZE          Invalid IP address table size.
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+* Return(s)   : DEF_OK,   if interface's IPv4 host address(s) successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIPv4_GetAddrHost(),
+*               NetIPv4_GetHostAddrProtocol(),
+*               NetIPv4_ChkAddrProtocolConflict(),
+*               NetSock_BindHandler(),
+*               NetSock_TxDataHandlerDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv4_GetAddrHostHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetIPv4_GetAddrHost()  Note #1'.
+*
+*               (2) IPv4 address(s) returned in host-order.
+*
+*               (3) Since 'p_addr_tbl_qty' argument is both an input & output argument
+*                   (see 'Argument(s) : p_addr_tbl_qty'), ... :
+*
+*                   (a) Its input value SHOULD be validated prior to use; ...
+*
+*                       (1) In the case that the 'p_addr_tbl_qty' argument is passed a null pointer,
+*                           NO input value is validated or used.
+*
+*                       (2) The number of IP addresses of the table that will receive the configured
+*                           IP address(s) MUST be greater than or equal to NET_IPv4_CFG_IF_MAX_NBR_ADDR.
+*
+*                   (b) While its output value MUST be initially configured to return a default value
+*                       PRIOR to all other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_GetAddrHostHandler (NET_IF_NBR         if_nbr,
+                                         NET_IPv4_ADDR     *p_addr_tbl,
+                                         NET_IP_ADDRS_QTY  *p_addr_tbl_qty,
+                                         NET_ERR           *p_err)
+{
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    NET_IP_ADDRS_QTY   addr_tbl_qty;
+#endif
+    NET_IPv4_IF_CFG   *p_ip_if_cfg;
+    NET_IPv4_ADDRS    *p_ip_addrs;
+    NET_IPv4_ADDR     *p_addr;
+    NET_IP_ADDRS_QTY   addr_ix;
+
+
+                                                                /* ---------------- VALIDATE ADDR TBL ----------------- */
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_addr_tbl_qty == (NET_IP_ADDRS_QTY *)0) {              /* See Note #3a1.                                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.NullPtrCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (DEF_FAIL);
+    }
+
+     addr_tbl_qty = *p_addr_tbl_qty;
+#endif
+   *p_addr_tbl_qty =  0u;                                       /* Cfg rtn addr tbl qty for err  (see Note #3b).        */
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (addr_tbl_qty < NET_IPv4_CFG_IF_MAX_NBR_ADDR) {          /* Validate initial addr tbl qty (see Note #3a).        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrTblSizeCtr);
+       *p_err =  NET_IPv4_ERR_ADDR_TBL_SIZE;
+        return (DEF_FAIL);
+    }
+
+    if (p_addr_tbl == (NET_IPv4_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.NullPtrCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+   (void)NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ------------------ GET IPv4 ADDRS ------------------ */
+    p_addr = p_addr_tbl;
+
+    if (if_nbr == NET_IF_NBR_LOOPBACK) {                        /* For loopback IF,                  ...                */
+#if (NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+       *p_addr         = NET_IPv4_ADDR_LOCAL_HOST_ADDR;         /* ... get dflt IPv4 localhost addr; ...                */
+       *p_addr_tbl_qty = 1u;
+       *p_err          = NET_IPv4_ERR_NONE;
+        return (DEF_OK);
+#else
+       *p_err          = NET_IF_ERR_INVALID_IF;
+        return (DEF_FAIL);
+#endif
+    }
+
+
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+                                                                /* For IF in dynamic init state,   ...                  */
+    if (p_ip_if_cfg->AddrCfgState == NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT) {
+       *p_err = NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS;              /* ... rtn NO addr;                ...                  */
+        return (DEF_FAIL);
+    }
+
+    if (p_ip_if_cfg->AddrsNbrCfgd < 1) {
+       *p_err =  NET_IPv4_ERR_ADDR_NONE_AVAIL;
+        return (DEF_FAIL);
+    }
+
+    addr_ix   =  0u;
+    p_ip_addrs = &p_ip_if_cfg->AddrsTbl[addr_ix];
+    while (addr_ix < p_ip_if_cfg->AddrsNbrCfgd) {               /* ... else get all cfg'd host addr(s).                 */
+       *p_addr = p_ip_addrs->AddrHost;
+        p_ip_addrs++;
+        p_addr++;
+        addr_ix++;
+    }
+
+
+   *p_addr_tbl_qty = p_ip_if_cfg->AddrsNbrCfgd;                 /* Rtn nbr of cfg'd addrs.                              */
+   *p_err          = NET_IPv4_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIPv4_GetAddrSrc()
+*
+* Description : Get corresponding configured IPv4 host address for a remote IPv4 address (to use as source
+*               address).
+*
+* Argument(s) : addr_remote     Remote address to get configured IPv4 host address (see Note #3).
+*
+* Return(s)   : Configured IPv4 host address (see Note #3), if available.
+*
+*               NET_IPv4_ADDR_NONE,                         otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv4_GetAddrHostCfgd() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv4_GetAddrHostHandler()  Note #1'.
+*
+*               (2) NetIPv4_GetAddrHostCfgd() blocked until network initialization completes.
+*
+*               (3) IPv4 addresses MUST be in host-order.
+*********************************************************************************************************
+*/
+
+NET_IPv4_ADDR  NetIPv4_GetAddrSrc (NET_IPv4_ADDR  addr_remote)
+{
+    NET_IPv4_ADDR  addr_host;
+    NET_ERR        err;
+
+
+                                                                /* Acquire net lock (see Note #1b).                     */
+    Net_GlobalLockAcquire((void *)&NetIPv4_GetAddrSrc, &err);
+    if (err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+        goto exit_fail;
+    }
+#endif
+
+
+    addr_host = NetIPv4_GetAddrSrcHandler(addr_remote);    /* Get cfg'd host addr.                                 */
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (NET_IPv4_ADDR_NONE);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    addr_host = NET_IPv4_ADDR_NONE;
+#endif
+
+exit_release:
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (addr_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_GetAddrSrcHandler()
+*
+* Description : (1) Get corresponding configured IPv4 host address for a remote IPv4 address :
+*
+*                   (a) Search Remote IPv4 Address cache for corresponding  configured IPv4 host address
+*                           that recently communicated with the remote IPv4 address
+*
+*                       (1) NOT yet implemented if IPv4 routing table to be implemented.
+*
+*                   (b) Search configured IP host addresses structure for configured IPv4 host address with
+*                           same local network as the remote IPv4 address
+*
+*
+* Argument(s) : addr_remote     Remote address to get configured IPv4 host address (see Note #3).
+*
+* Return(s)   : Configured IPv4 host address (see Note #3), if available.
+*
+*               NET_IPv4_ADDR_NONE,                         otherwise.
+*
+* Caller(s)   : NetSock_ConnHandlerAddr(),
+*               NetSock_TxDataHandlerDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv4_GetAddrSrcHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*               (3) IPv4 addresses MUST be in host-order.
+*********************************************************************************************************
+*/
+
+NET_IPv4_ADDR  NetIPv4_GetAddrSrcHandler (NET_IPv4_ADDR  addr_remote)
+{
+    NET_IPv4_ADDR      addr_host = NET_IPv4_ADDR_NONE;
+    NET_IF_NBR         if_nbr    = NET_IF_NBR_BASE_CFGD;
+    NET_IPv4_IF_CFG   *p_ip_if_cfg;
+    NET_IPv4_ADDRS    *p_ip_addrs;
+    NET_IP_ADDRS_QTY   addr_ix;
+    CPU_BOOLEAN        is_valid;
+
+
+                                                                /* ---------------- VALIDATE IPv4 ADDR ---------------- */
+    if (addr_remote == NET_IPv4_ADDR_NONE) {
+        return (NET_IPv4_ADDR_NONE);
+    }
+                                                                /* -------------- SRCH REMOTE ADDR CACHE -------------- */
+                                                                /* See Note #1a1.                                       */
+
+                                                                /* ... search address on all configured Interfaces.     */
+    while ((if_nbr    <  NET_IF_NBR_IF_TOT) &&
+           (addr_host == NET_IPv4_ADDR_NONE )) {
+        p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+        addr_ix     = 0u;
+        p_ip_addrs  = &p_ip_if_cfg->AddrsTbl[addr_ix];
+
+        while ((addr_ix   <  p_ip_if_cfg->AddrsNbrCfgd) &&      /* ...  all cfg'd addrs  ...                            */
+               (addr_host == NET_IPv4_ADDR_NONE)) {
+            if ((addr_remote & p_ip_addrs->AddrHostSubnetMask) ==
+                               p_ip_addrs->AddrHostSubnetNet ) {
+                is_valid = NetIPv4_IsValidAddrHost (p_ip_addrs->AddrHost);
+                if (is_valid == DEF_YES) {
+                    addr_host = p_ip_addrs->AddrHost;
+                    break;
+                }
+            }
+
+            if (addr_host == NET_IPv4_ADDR_NONE) {              /* If addr NOT found,        ...                        */
+                p_ip_addrs++;                                   /* ... adv to next IPv4 addr ...                        */
+                addr_ix++;
+            }
+        }
+
+        if (addr_host == NET_IPv4_ADDR_NONE) {
+            if_nbr++;
+        }
+    }
+
+                                                                /* If no addr found on subnet, return default interface */
+    if (addr_host == NET_IPv4_ADDR_NONE) {
+        addr_ix     =  0u;
+        if_nbr      =  NetIF_GetDflt();
+        if (if_nbr != NET_IF_NBR_NONE) {
+            p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+            p_ip_addrs  = &p_ip_if_cfg->AddrsTbl[addr_ix];
+
+            while ((addr_ix   <  p_ip_if_cfg->AddrsNbrCfgd) &&      /* ...  all cfg'd addrs  ...                            */
+                   (addr_host == NET_IPv4_ADDR_NONE)) {
+
+                is_valid = NetIPv4_IsValidAddrHost (p_ip_addrs->AddrHost);
+                if ((p_ip_addrs->AddrDfltGateway != NET_IPv4_ADDR_NONE) &&
+                    (p_ip_addrs->AddrHost        != NET_IPv4_ADDR_NONE) &&
+                    (is_valid                    == DEF_YES)          ) {
+                     addr_host = p_ip_addrs->AddrHost;
+                     break;
+                }
+
+                if (addr_host == NET_IPv4_ADDR_NONE) {              /* If addr NOT found,        ...                        */
+                    p_ip_addrs++;                                   /* ... adv to next IPv4 addr ...                        */
+                    addr_ix++;
+                }
+            }
+        }
+    }
+
+    return (addr_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_GetAddrSubnetMask()
+*
+* Description : Get the IPv4 address subnet mask for a configured IPv4 host address.
+*
+* Argument(s) : addr        Configured IPv4 host address to get the subnet mask (see Note #3).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   Configured IPv4 address's subnet mask
+*                                                                       successfully returned.
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST      Invalid or not configured IPv4 host
+*                                                                       address.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Configured IPv4 host address's subnet mask in host-order, if NO error(s).
+*
+*               NET_IPv4_ADDR_NONE,                                       otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv4_GetAddrSubnetMask() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetIPv4_GetAddrSubnetMask() blocked until network initialization completes.
+*
+*               (3) IPv4 address returned in host-order.
+*********************************************************************************************************
+*/
+
+NET_IPv4_ADDR  NetIPv4_GetAddrSubnetMask (NET_IPv4_ADDR   addr,
+                                          NET_ERR        *p_err)
+{
+    NET_IPv4_ADDRS  *p_ip_addrs;
+    NET_IPv4_ADDR    addr_subnet;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_IPv4_ADDR)0);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetIPv4_GetAddrSubnetMask, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+                                                                /* ----------- GET IPv4 ADDR'S SUBNET MASK ------------ */
+    p_ip_addrs = NetIPv4_GetAddrsHostCfgd((NET_IPv4_ADDR )addr,
+                                         (NET_IF_NBR   *)0);
+    if (p_ip_addrs == (NET_IPv4_ADDRS *)0) {                    /* If addr NOT found, ...                               */
+       *p_err =  NET_IPv4_ERR_INVALID_ADDR_HOST;                /* ... rtn err.                                         */
+        goto exit_fail;
+    }
+
+    addr_subnet = p_ip_addrs->AddrHostSubnetMask;               /* Get IPv4 addr subnet mask.                           */
+
+
+   *p_err =  NET_IPv4_ERR_NONE;
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (NET_IPv4_ADDR_NONE);
+
+exit_fail:
+    addr_subnet = NET_IPv4_ADDR_NONE;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (addr_subnet);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_GetAddrDfltGateway()
+*
+* Description : Get the default gateway IPv4 address for a configured IPv4 host address.
+*
+* Argument(s) : addr        Configured IPv4 host address to get the default gateway (see Note #3).
+*
+*               p_err      Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   Configured IPv4 address's default gateway
+*                                                                       successfully returned.
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST      Invalid or not yet configured IPv4 host
+*                                                                       address.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Configured IPv4 host address's default gateway in host-order, if NO error(s).
+*
+*               NET_IPv4_ADDR_NONE,                                           otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv4_GetAddrDfltGateway() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetIPv4_GetAddrDfltGateway() blocked until network initialization completes.
+*
+*               (3) IPv4 address returned in host-order.
+*********************************************************************************************************
+*/
+
+NET_IPv4_ADDR  NetIPv4_GetAddrDfltGateway (NET_IPv4_ADDR   addr,
+                                           NET_ERR        *p_err)
+{
+    NET_IPv4_ADDRS  *p_ip_addrs;
+    NET_IPv4_ADDR    addr_dflt_gateway;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_IPv4_ADDR)0);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetIPv4_GetAddrDfltGateway, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+                                                                /* ----------- GET IPv4 ADDR'S DFLT GATEWAY ----------- */
+    p_ip_addrs = NetIPv4_GetAddrsHostCfgd((NET_IPv4_ADDR )addr,
+                                         (NET_IF_NBR *)0);
+    if (p_ip_addrs == (NET_IPv4_ADDRS *)0) {                    /* If addr NOT found, ...                               */
+       *p_err =  NET_IPv4_ERR_INVALID_ADDR_HOST;                /* ... rtn err.                                         */
+        goto exit_fail;
+    }
+
+    addr_dflt_gateway = p_ip_addrs->AddrDfltGateway;            /* Get IPv4 addr dflt gateway.                          */
+
+
+   *p_err =  NET_IPv4_ERR_NONE;
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (NET_IPv4_ADDR_NONE);
+
+exit_fail:
+    addr_dflt_gateway = NET_IPv4_ADDR_NONE;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (addr_dflt_gateway);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_GetAddrHostIF_Nbr()
+*
+* Description : (1) Get the interface number for an IPv4 host address :
+*
+*                   (a) A configured IPv4 host address (on an enabled interface)
+*                   (b) A 'Localhost'                address
+*                   (c) A 'This host' initialization address                        See Note #4
+*
+*
+* Argument(s) : addr        Configured IPv4 host address to get the interface number (see Note #3).
+*
+* Return(s)   : Interface number of a configured IPv4 host address,    if available.
+*
+*               Interface number of              IPv4 host address
+*                   in dynamic address initialization (see Note #4), if available.
+*
+*               NET_IF_NBR_LOCAL_HOST,                               for a localhost address.
+*
+*               NET_IF_NBR_NONE,                                     otherwise.
+*
+* Caller(s)   : NetICMPv4_TxMsgReqHandler(),
+*               NetIPv4_GetAddrProtocolIF_Nbr(),
+*               NetIPv4_IsAddrHostHandler(),
+*               NetSock_IsValidAddrLocal(),
+*               NetUDP_TxAppDataHandlerIPv4().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv4_GetAddrHostIF_Nbr() is called by network protocol suite function(s) & MUST
+*                   be called with the global network lock already acquired.
+*
+*               (3) IPv4 address MUST be in host-order.
+*
+*               (4) For the 'This Host' initialization address, the interface in the dynamic address
+*                   initialization state (if any) is returned (see 'NetIPv4_CfgAddrAddDynamicStart()
+*                   Note #4b2').  This allows higher layers to select an interface in dynamic address
+*                   initialization & transmit the 'This Host' initialization address in order to
+*                   negotiate & configure a dynamic address for the interface.
+*********************************************************************************************************
+*/
+
+NET_IF_NBR  NetIPv4_GetAddrHostIF_Nbr (NET_IPv4_ADDR  addr)
+{
+    NET_IPv4_IF_CFG  *p_ip_if_cfg;
+    NET_IF_NBR        if_nbr;
+    CPU_BOOLEAN       addr_this_host;
+    CPU_BOOLEAN       addr_local_host;
+    CPU_BOOLEAN       addr_init;
+
+
+    addr_this_host = NetIPv4_IsAddrThisHost(addr);              /* Chk 'This Host' addr  (see Note #1c).                */
+    if (addr_this_host == DEF_YES) {
+        if_nbr     =  NET_IF_NBR_BASE_CFGD;
+        p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+        addr_init  =  DEF_NO;
+
+        while ((if_nbr    <  NET_IF_NBR_IF_TOT) &&              /* Srch ALL cfg'd IF's ...                              */
+               (addr_init == DEF_NO)) {
+
+            if (p_ip_if_cfg->AddrCfgState == NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT) {
+                addr_init  = DEF_YES;                           /* ... for dynamic addr init (see Note #4).             */
+
+            } else {
+                if_nbr++;
+                p_ip_if_cfg++;
+            }
+        }
+
+        if (addr_init != DEF_YES) {                             /* If NO dynamic addr init found, ...                   */
+            if_nbr = NET_IF_NBR_NONE;                           /* ... rtn NO IF.                                       */
+        }
+
+    } else {
+                                                                /* Chk localhost  addrs (see Note #1b).                 */
+        addr_local_host = NetIPv4_IsAddrLocalHost(addr);
+        if (addr_local_host == DEF_YES) {
+            if_nbr = NET_IF_NBR_LOCAL_HOST;
+                                                                /* Chk cfg'd host addrs (see Note #1a).                 */
+        } else {
+            if_nbr = NetIPv4_GetAddrHostCfgdIF_Nbr(addr);
+        }
+    }
+
+    return (if_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv4_GetAddrHostCfgdIF_Nbr()
+*
+* Description : Get the interface number for a configured IPv4 host address.
+*
+* Argument(s) : addr        Configured IPv4 host address to get the interface number (see Note #2).
+*
+* Return(s)   : Interface number of a configured IPv4 host address, if available.
+*
+*               NET_IF_NBR_NONE,                                  otherwise.
+*
+* Caller(s)   : NetIPv4_GetAddrHostIF_Nbr(),
+*               NetIPv4_IsAddrHostCfgdHandler(),
+*               NetIPv4_GetAddrProtocolIF_Nbr().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv4_GetAddrHostCfgdIF_Nbr() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*               (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+NET_IF_NBR  NetIPv4_GetAddrHostCfgdIF_Nbr (NET_IPv4_ADDR  addr)
+{
+    NET_IPv4_ADDRS  *p_ip_addrs;
+    NET_IF_NBR       if_nbr;
+
+
+    p_ip_addrs = NetIPv4_GetAddrsHostCfgd(addr, &if_nbr);
+    if (p_ip_addrs == (NET_IPv4_ADDRS *)0) {
+        return (NET_IF_NBR_NONE);
+    }
+
+    return (if_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_IsAddrClassA()
+*
+* Description : Validate an IPv4 address as a Class-A IPv4 address.
+*
+*               (1) RFC #791, Section 3.2 'Addressing : Address Format' specifies IPv4 Class-A addresses
+*                   as :
+*
+*                       Class  High Order Bits
+*                       -----  ---------------
+*                        (A)         0
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address is a Class-A IPv4 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrClassA (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_class_a;
+
+
+    addr_class_a = ((addr & NET_IPv4_ADDR_CLASS_A_MASK) == NET_IPv4_ADDR_CLASS_A) ? DEF_YES : DEF_NO;
+
+    return (addr_class_a);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_IsAddrClassB()
+*
+* Description : Validate an IPv4 address as a Class-B IPv4 address.
+*
+*               (1) RFC #791, Section 3.2 'Addressing : Address Format' specifies IPv4 Class-B addresses
+*                   as :
+*
+*                       Class  High Order Bits
+*                       -----  ---------------
+*                        (B)         10
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address is a Class-B IPv4 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrClassB (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_class_b;
+
+
+    addr_class_b = ((addr & NET_IPv4_ADDR_CLASS_B_MASK) == NET_IPv4_ADDR_CLASS_B) ? DEF_YES : DEF_NO;
+
+    return (addr_class_b);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_IsAddrClassC()
+*
+* Description : Validate an IPv4 address as a Class-C IPv4 address.
+*
+*               (1) RFC #791, Section 3.2 'Addressing : Address Format' specifies IPv4 Class-C addresses
+*                   as :
+*
+*                       Class  High Order Bits
+*                       -----  ---------------
+*                        (C)         110
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address is a Class-C IPv4 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrClassC (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_class_c;
+
+
+    addr_class_c = ((addr & NET_IPv4_ADDR_CLASS_C_MASK) == NET_IPv4_ADDR_CLASS_C) ? DEF_YES : DEF_NO;
+
+    return (addr_class_c);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_IsAddrClassD()
+*
+* Description : Validate an IPv4 address as a Class-D IPv4 address.
+*
+*               (1) RFC #1112, Section 4 specifies IPv4 Class-D addresses as :
+*
+*                       Class  High Order Bits
+*                       -----  ---------------
+*                        (D)        1110
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address is a Class-D IPv4 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrClassD (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_class_d;
+
+
+    addr_class_d = ((addr & NET_IPv4_ADDR_CLASS_D_MASK) == NET_IPv4_ADDR_CLASS_D) ? DEF_YES : DEF_NO;
+
+    return (addr_class_d);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_IsAddrThisHost()
+*
+* Description : Validate an IPv4 address as a 'This Host' initialization IPv4 address.
+*
+*               (1) RFC #1122, Section 3.2.1.3.(a) specifies the IPv4 'This Host' initialization address
+*                   as :
+*
+*                       0.0.0.0
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address is a 'This Host' initialization IPv4 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrThisHost (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_this_host;
+
+
+    addr_this_host = (addr == NET_IPv4_ADDR_THIS_HOST) ? DEF_YES : DEF_NO;
+
+    return (addr_this_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_IsAddrLocalHost()
+*
+* Description : Validate an IPv4 address as a 'Localhost' IPv4 address.
+*
+*               (1) RFC #1122, Section 3.2.1.3.(g) specifies the IPv4 'Localhost' address as :
+*
+*                       127.
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address is a 'Localhost' IPv4 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrLocalHost (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_local_host;
+
+
+    addr_local_host = ((addr >= NET_IPv4_ADDR_LOCAL_HOST_MIN) &&
+                       (addr <= NET_IPv4_ADDR_LOCAL_HOST_MAX)) ? DEF_YES : DEF_NO;
+
+    return (addr_local_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_IsAddrLocalLink()
+*
+* Description : Validate an IPv4 address as a link-local IPv4 address.
+*
+*               (1) RFC #3927, Section 2.1 specifies the "IPv4 Link-Local address ... range ... [as]
+*                   inclusive" ... :
+*
+*                   (a) "from 169.254.1.0" ...
+*                   (b) "to   169.254.254.255".
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address is a link-local IPv4 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrLocalLink (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_local_link;
+
+
+    addr_local_link = ((addr >= NET_IPv4_ADDR_LOCAL_LINK_HOST_MIN) &&
+                       (addr <= NET_IPv4_ADDR_LOCAL_LINK_HOST_MAX)) ? DEF_YES : DEF_NO;
+
+    return (addr_local_link);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_IsAddrBroadcast()
+*
+* Description : Validate an IPv4 address as a limited broadcast IPv4 address.
+*
+*               (1) RFC #1122, Section 3.2.1.3.(c) specifies the IPv4 limited broadcast address as :
+*
+*                       255.255.255.255
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address is a limited broadcast IP address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrBroadcast (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_broadcast;
+
+
+    addr_broadcast = (addr == NET_IPv4_ADDR_BROADCAST) ? DEF_YES : DEF_NO;
+
+    return (addr_broadcast);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_IsAddrMulticast()
+*
+* Description : Validate an IPv4 address as a multicast IP address.
+*
+*               (1) RFC #1122, Section 3.2.1.3 specifies IPv4 multicast addresses as "(Class D) address[es]".
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address is a multicast IP address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application,
+*               NetIPv4_IsAddrProtocolMulticast(),
+*               NetICMPv4_RxPktValidate(),
+*               NetICMPv4_TxMsgErrValidate().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrMulticast (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_multicast;
+
+
+    addr_multicast = NetIPv4_IsAddrClassD(addr);
+
+    return (addr_multicast);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIPv4_IsAddrHost()
+*
+* Description : (1) Validate an IPv4 address as an IPv4 host address :
+*
+*                   (a) A configured  IPv4 host address (on an enabled interface)
+*                   (b) A 'Localhost' IPv4      address
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #4).
+*
+* Return(s)   : DEF_YES, if IPv4 address is one of the host's IPv4 addresses.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv4_IsAddrHost() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv4_IsAddrHostHandler()  Note #2'.
+*
+*               (3) NetIPv4_IsAddrHost() blocked until network initialization completes.
+*
+*               (4) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrHost (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_host;
+    NET_ERR      err;
+
+
+    Net_GlobalLockAcquire((void *)&NetIPv4_IsAddrHost, &err);   /* Acquire net lock (see Note #2b).                     */
+    if (err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+        goto exit_fail;
+    }
+#endif
+
+
+    addr_host = NetIPv4_IsAddrHostHandler(addr);                /* Chk if any host addr.                                */
+    goto exit_release;
+
+
+exit_lock_fault:
+     return (DEF_FAIL);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    addr_host = DEF_FAIL;
+#endif
+
+exit_release:
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (addr_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_IsAddrHostCfgd()
+*
+* Description : Validate an IPv4 address as a configured IPv4 host address on an enabled interface.
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #3).
+*
+* Return(s)   : DEF_YES, if IPv4 address is one of the host's configured IPv4 addresses.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv4_IsAddrHostCfgd() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv4_IsAddrHostCfgdHandler()  Note #1'.
+*
+*               (2) NetIPv4_IsAddrHostCfgd() blocked until network initialization completes.
+*
+*               (3) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrHostCfgd (NET_IPv4_ADDR  addr)
+{
+    CPU_BOOLEAN  addr_host;
+    NET_ERR      err;
+
+
+                                                                /* Acquire net lock (see Note #1b).                     */
+    Net_GlobalLockAcquire((void *)&NetIPv4_IsAddrHostCfgd, &err);
+    if (err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+        goto exit_fail;
+    }
+#endif
+
+
+    addr_host = NetIPv4_IsAddrHostCfgdHandler(addr);            /* Chk if any cfg'd host addr.                          */
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    addr_host = DEF_NO;
+#endif
+
+exit_release:
+
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (addr_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_IsAddrsCfgdOnIF()
+*
+* Description : Check if any IPv4 host address(s) configured on an interface.
+*
+* Argument(s) : if_nbr      Interface number to check for configured IPv4 host address(s).
+*
+*               p_err      Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               - RETURNED BY NetIPv4_IsAddrsCfgdOnIF_Handler() : -
+*                               NET_IPv4_ERR_NONE               Configured IPv4 host address(s) availability
+*                                                                   successfully returned.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ----- RETURNED BY Net_GlobalLockAcquire() : -------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_YES, if any IP host address(s) configured on interface.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv4_IsAddrsCfgdOnIF() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv4_IsAddrsCfgdOnIF_Handler()  Note #1'.
+*
+*               (2) NetIPv4_IsAddrsCfgdOnIF() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrsCfgdOnIF (NET_IF_NBR   if_nbr,
+                                      NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  addr_avail;
+
+
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_NO);
+    }
+
+                                                                /* Acquire net lock (see Note #1b).                     */
+    Net_GlobalLockAcquire((void *)&NetIPv4_IsAddrsCfgdOnIF, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+
+    addr_avail = NetIPv4_IsAddrsCfgdOnIF_Handler(if_nbr, p_err);    /* Chk IF for any cfg'd host addr(s).               */
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    addr_avail = DEF_NO;
+#endif
+
+exit_release:
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (addr_avail);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv4_IsAddrsCfgdOnIF_Handler()
+*
+* Description : Check if any IPv4 address(s) configured on an interface.
+*
+* Argument(s) : if_nbr      Interface number to check for configured IPv4 address(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               Configured IPv4 host address(s) availability
+*                                                                   successfully returned.
+*
+*                                                               - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : DEF_YES, if any IPv4 host address(s) configured on interface.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv4_IsAddrsCfgdOnIF(),
+*               NetMgr_IsAddrsCfgdOnIF().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv4_IsAddrsCfgdOnIF_Handler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetIPv4_IsAddrsCfgdOnIF()  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrsCfgdOnIF_Handler (NET_IF_NBR   if_nbr,
+                                              NET_ERR     *p_err)
+{
+    NET_IPv4_IF_CFG  *p_ip_if_cfg;
+    CPU_BOOLEAN       addr_avail;
+
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_NO);
+    }
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (DEF_NO);
+    }
+#endif
+
+                                                                /* ------------ CHK CFG'D IPv4 ADDRS AVAIL ------------ */
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+    addr_avail = (p_ip_if_cfg->AddrsNbrCfgd > 0) ? DEF_YES : DEF_NO;
+   *p_err       =  NET_IPv4_ERR_NONE;
+
+    return (addr_avail);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_IsValidAddrHost()
+*
+* Description : (1) Validate an IPv4 host address :
+*
+*                   (a) MUST NOT be one of the following :
+*
+*                       (1) This      Host                              RFC #1122, Section 3.2.1.3.(a)
+*                       (2) Specified Host                              RFC #1122, Section 3.2.1.3.(b)
+*                       (3) Limited   Broadcast                         RFC #1122, Section 3.2.1.3.(c)
+*                       (4) Directed  Broadcast                         RFC #1122, Section 3.2.1.3.(d)
+*                       (5) Localhost                                   RFC #1122, Section 3.2.1.3.(g)
+*                       (6) Multicast host address                      RFC #1112, Section 7.2
+*
+*                   (b) (1) RFC #3927, Section 2.1 specifies the "IPv4 Link-Local address" :
+*
+*                           (A) "Range ... inclusive"  ...
+*                               (1) "from 169.254.1.0" ...
+*                               (2) "to   169.254.254.255".
+*
+*               (2) ONLY validates typical IPv4 host addresses, since 'This Host' & 'Specified Host' IPv4
+*                   host addresses are ONLY valid during a host's initialization (see Notes #1a1 & #1a4).
+*                   This function CANNOT be used to validate any 'This Host' or 'Specified Host' host
+*                   addresses.
+*
+* Argument(s) : addr_host   IPv4 host address to validate (see Note #4).
+*
+* Return(s)   : DEF_YES, if IPv4 host address valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (3) See 'net_ipv4.h  IPv3 ADDRESS DEFINES  Notes #2 & #3' for supported IPv4 addresses.
+*
+*               (4) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsValidAddrHost (NET_IPv4_ADDR  addr_host)
+{
+    CPU_BOOLEAN  valid;
+
+
+    valid = DEF_YES;
+                                                                /* ---------------- VALIDATE HOST ADDR ---------------- */
+                                                                /* Chk invalid 'This Host'         (see Note #1a1).     */
+    if (addr_host == NET_IPv4_ADDR_THIS_HOST) {
+        valid = DEF_NO;
+
+                                                                /* Chk invalid lim'd broadcast     (see Note #1a3).     */
+    } else if (addr_host == NET_IPv4_ADDR_BROADCAST) {
+        valid = DEF_NO;
+
+                                                                /* Chk invalid localhost           (see Note #1a5).     */
+    } else if ((addr_host & NET_IPv4_ADDR_LOCAL_HOST_MASK_NET) ==
+                            NET_IPv4_ADDR_LOCAL_HOST_NET     ) {
+        valid = DEF_NO;
+
+                                                                /* Chk         link-local addrs    (see Note #1b1).     */
+    } else if ((addr_host & NET_IPv4_ADDR_LOCAL_LINK_MASK_NET) ==
+                            NET_IPv4_ADDR_LOCAL_LINK_NET     ) {
+                                                                /* Chk invalid link-local addr     (see Note #1b1A).    */
+        if ((addr_host < NET_IPv4_ADDR_LOCAL_LINK_HOST_MIN) ||
+            (addr_host > NET_IPv4_ADDR_LOCAL_LINK_HOST_MAX)) {
+             valid = DEF_NO;
+        }
+
+
+    } else if ((addr_host & NET_IPv4_ADDR_CLASS_A_MASK) == NET_IPv4_ADDR_CLASS_A) {
+                                                                /* Chk invalid Class-A 'This Host' (see Note #1a2).     */
+        if ((addr_host               & NET_IPv4_ADDR_CLASS_A_MASK_HOST) ==
+            (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_A_MASK_HOST)) {
+             valid = DEF_NO;
+        }
+                                                                /* Chk invalid Class-A broadcast   (see Note #1a4).     */
+        if ((addr_host               & NET_IPv4_ADDR_CLASS_A_MASK_HOST) ==
+            (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_A_MASK_HOST)) {
+             valid = DEF_NO;
+        }
+
+
+    } else if ((addr_host & NET_IPv4_ADDR_CLASS_B_MASK) == NET_IPv4_ADDR_CLASS_B) {
+                                                                /* Chk invalid Class-B 'This Host' (see Note #1a2).     */
+        if ((addr_host               & NET_IPv4_ADDR_CLASS_B_MASK_HOST) ==
+            (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_B_MASK_HOST)) {
+             valid = DEF_NO;
+        }
+                                                                /* Chk invalid Class-B broadcast   (see Note #1a4).     */
+        if ((addr_host               & NET_IPv4_ADDR_CLASS_B_MASK_HOST) ==
+            (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_B_MASK_HOST)) {
+             valid = DEF_NO;
+        }
+
+
+    } else if ((addr_host & NET_IPv4_ADDR_CLASS_C_MASK) == NET_IPv4_ADDR_CLASS_C) {
+                                                                /* Chk invalid Class-C 'This Host' (see Note #1a2).     */
+        if ((addr_host               & NET_IPv4_ADDR_CLASS_C_MASK_HOST) ==
+            (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_C_MASK_HOST)) {
+             valid = DEF_NO;
+        }
+                                                                /* Chk invalid Class-C broadcast   (see Note #1a4).     */
+        if ((addr_host               & NET_IPv4_ADDR_CLASS_C_MASK_HOST) ==
+            (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_C_MASK_HOST)) {
+             valid = DEF_NO;
+        }
+
+
+    } else if ((addr_host & NET_IPv4_ADDR_CLASS_D_MASK) == NET_IPv4_ADDR_CLASS_D) {
+                                                                /* Chk invalid Class-D multicast   (see Note #1a6).     */
+        valid = DEF_NO;
+
+
+    } else {                                                    /* Invalid addr class (see Note #3).                    */
+        valid = DEF_NO;
+    }
+
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_IsValidAddrHostCfgd()
+*
+* Description : (1) Validate an IPv4 address for a configured IPv4 host address :
+*
+*                   (a) MUST NOT be one of the following :
+*
+*                       (1) This      Host                              RFC #1122, Section 3.2.1.3.(a)
+*                       (2) Specified Host                              RFC #1122, Section 3.2.1.3.(b)
+*                       (3) Limited   Broadcast                         RFC #1122, Section 3.2.1.3.(c)
+*                       (4) Directed  Broadcast                         RFC #1122, Section 3.2.1.3.(d)
+*                       (5) Subnet    Broadcast                         RFC #1122, Section 3.2.1.3.(e)
+*                       (6) Localhost                                   RFC #1122, Section 3.2.1.3.(g)
+*                       (7) Multicast host address                      RFC #1112, Section 7.2
+*
+*                   See also 'NetIPv4_IsValidAddrHost()  Note #1'.
+*
+*               (2) ONLY validates this host's IPv4 address, since 'This Host' & 'Specified Host' IPv4 host
+*                   addresses are ONLY valid during a host's initialization (see Notes #1a1 & #1a4).  This
+*                   function CANNOT be used to validate any 'This Host' or 'Specified Host' host addresses.
+*
+*
+* Argument(s) : addr_host           IPv4 host address to validate (see Note #4).
+*
+*               addr_subnet_mask    IPv4      address subnet mask (see Note #4).
+*
+* Return(s)   : DEF_YES, if this host's IPv4 address valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv4_CfgAddrAdd(),
+*               NetIPv4_CfgAddrAddDynamic(),
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (3) See 'net_ipv4.h  IP ADDRESS DEFINES  Notes #2 & #3' for supported IPv4 addresses.
+*
+*               (4) IPv4 addresses MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsValidAddrHostCfgd (NET_IPv4_ADDR  addr_host,
+                                          NET_IPv4_ADDR  addr_subnet_mask)
+{
+    CPU_BOOLEAN  valid_host;
+    CPU_BOOLEAN  valid_mask;
+    CPU_BOOLEAN  valid;
+
+
+    if ((addr_host        == NET_IPv4_ADDR_NONE) ||                 /* Chk invalid NULL addr(s).                        */
+        (addr_subnet_mask == NET_IPv4_ADDR_NONE)) {
+         return (DEF_NO);
+    }
+                                                                    /* Chk invalid subnet 'This Host' (see Note #1a2).  */
+    if ((addr_host               & ~addr_subnet_mask) ==
+        (NET_IPv4_ADDR_THIS_HOST & ~addr_subnet_mask)) {
+         return (DEF_NO);
+    }
+                                                                    /* Chk invalid subnet broadcast   (see Note #1a5).  */
+    if ((addr_host               & ~addr_subnet_mask) ==
+        (NET_IPv4_ADDR_BROADCAST & ~addr_subnet_mask)) {
+         return (DEF_NO);
+    }
+
+
+    valid_host = NetIPv4_IsValidAddrHost(addr_host);
+    valid_mask = NetIPv4_IsValidAddrSubnetMask(addr_subnet_mask);
+
+    valid      = ((valid_host == DEF_YES) &&
+                  (valid_mask == DEF_YES)) ? DEF_YES : DEF_NO;
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv4_IsValidAddrSubnetMask()
+*
+* Description : (1) Validate an IPv4 address subnet mask :
+*
+*                   (a) RFC #1122, Section 3.2.1.3 states that :
+*
+*                       (1) "IP addresses are not permitted to have the value 0 or -1 for any of the ...
+*                             fields" ...
+*                       (2) "This implies that each of these fields will be at least two bits long."
+*
+*                   (b) RFC #950, Section 2.1 'Special Addresses' reiterates that "the values of all
+*                       zeros and all ones in the subnet field should not be assigned to actual
+*                       (physical) subnets".
+*
+*                   (c) RFC #950, Section 2.1 also states that "the bits that identify the subnet ...
+*                       need not be adjacent in the address.  However, we recommend that the subnet
+*                       bits be contiguous and located as the most significant bits of the local
+*                       address".
+*
+*                       #### Therefore, it is assumed that at least the most significant bit of the
+*                       network portion of the subnet address SHOULD be set.
+*
+*                       See also 'net_ipv4.h  IPv4 ADDRESS DEFINES  Note #2b2'.
+*
+* Argument(s) : addr_subnet_mask    IPv4 address subnet mask to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address subnet mask valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv4_IsValidAddrHostCfgd().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) IPv4 addresses MUST be in host-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsValidAddrSubnetMask (NET_IPv4_ADDR  addr_subnet_mask)
+{
+    CPU_BOOLEAN    valid;
+    NET_IPv4_ADDR  mask;
+    CPU_INT08U     mask_size;
+    CPU_INT08U     mask_nbr_one_bits;
+    CPU_INT08U     mask_nbr_one_bits_min;
+    CPU_INT08U     mask_nbr_one_bits_max;
+    CPU_INT08U     i;
+
+                                                                    /* ------------- VALIDATE SUBNET MASK ------------- */
+                                                                    /* Chk invalid subnet class (see Note #1c).         */
+    if ((addr_subnet_mask & NET_IPv4_ADDR_CLASS_SUBNET_MASK_MIN) == NET_IPv4_ADDR_NONE) {
+        valid = DEF_NO;
+
+    } else {                                                        /* Chk invalid subnet mask (see Notes #1a & #1b).   */
+        mask_size         = sizeof(addr_subnet_mask) * DEF_OCTET_NBR_BITS;
+        mask              = DEF_BIT_00;
+        mask_nbr_one_bits = 0u;
+        for (i = 0u; i < mask_size; i++) {                          /* Calc nbr subnet bits.                            */
+            if (addr_subnet_mask & mask) {
+                mask_nbr_one_bits++;
+            }
+            mask <<= 1u;
+        }
+
+        mask_nbr_one_bits_min = 2u;                                 /* See Note #1a2.                                   */
+        mask_nbr_one_bits_max = mask_size - mask_nbr_one_bits_min;
+                                                                    /* Chk invalid nbr subnet bits (see Note #1a2).     */
+        if (mask_nbr_one_bits < mask_nbr_one_bits_min) {
+            valid = DEF_NO;
+
+        } else if (mask_nbr_one_bits > mask_nbr_one_bits_max) {
+            valid = DEF_NO;
+
+        } else {
+            valid = DEF_YES;
+        }
+    }
+
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIPv4_IsValidTOS()
+*
+* Description : Validate an IPv4 TOS.
+*
+* Argument(s) : TOS         IPv4 TOS to validate.
+*
+* Return(s)   : DEF_YES, if IPv4 TOS valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv4_TxPktValidate(),
+*               NetConn_IPv4_TxTOS_Set().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) See 'net_ipv4.h  IPv4 HEADER TYPE OF SERVICE (TOS) DEFINES  Note #1'
+*                     & 'net_ipv4.h  IPv4 HEADER  Note #3'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsValidTOS (NET_IPv4_TOS  TOS)
+{
+    CPU_BOOLEAN  tos_mbz;
+
+
+    tos_mbz = DEF_BIT_IS_SET(TOS, NET_IPv4_HDR_TOS_MBZ_MASK);     /* Chk for invalid TOS bit(s).                          */
+    if (tos_mbz != DEF_NO) {
+        return (DEF_NO);
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIPv4_IsValidTTL()
+*
+* Description : Validate an IPv4 TTL.
+*
+* Argument(s) : TTL         IPv4 TTL to validate.
+*
+* Return(s)   : DEF_YES, if IPv4 TTL valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv4_TxPktValidate(),
+*               NetConn_IPv4_TxTTL_Set().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) RFC #1122, Section 3.2.1.7 states that "a host MUST NOT send a datagram with a
+*                   Time-to-Live (TTL) value of zero".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsValidTTL (NET_IPv4_TTL  TTL)
+{
+    if (TTL < 1) {                                              /* Chk TTL < 1 (see Note #1).                           */
+        return (DEF_NO);
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_IsValidFlags()
+*
+* Description : Validate IPv4 flags.
+*
+* Argument(s) : flags    IPv4 flags to select options; bit-field flags logically OR'd :
+*
+*                               NET_IPv4_FLAG_NONE              No  IPv4 flags selected.
+*                               NET_IPv4_FLAG_TX_DONT_FRAG      Set IPv4 'Don't Frag' flag.
+*
+* Return(s)   : DEF_YES, if IPv4 flags valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv4_TxPktValidate(),
+*               NetConn_IPv4_TxFlagsSet().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsValidFlags (NET_IPv4_FLAGS  flags)
+{
+    NET_IPv4_FLAGS  flag_mask;
+
+
+    flag_mask = NET_IPv4_FLAG_NONE        |
+                NET_IPv4_FLAG_TX_DONT_FRAG;
+                                                                /* Chk for any invalid flags req'd.                 */
+    if ((flags & (NET_IPv4_FLAGS)~flag_mask) != NET_IPv4_FLAG_NONE) {
+        return (DEF_NO);
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             NetIPv4_Rx()
+*
+* Description : (1) Process received datagrams & forward to network protocol layers :
+*
+*                   (a) Validate IPv4 packet & options
+*                   (b) Reassemble fragmented datagrams
+*                   (c) Demultiplex datagram to higher-layer protocols
+*                   (d) Update receive statistics
+*
+*               (2) Although IPv4 data units are typically referred to as 'datagrams' (see RFC #791, Section 1.1),
+*                   the term 'IP packet' (see RFC #1983, 'packet') is used for IPv4 Receive until the packet is
+*                   validated, & possibly reassembled, as an IPv4 datagram.
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv4 packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               IP datagram successfully received & processed.
+*
+*                                                               ---- RETURNED BY NetIPv4_RxPktDiscard() : ----
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Loopback_RxPktDemux(),
+*               Network interface receive functions.
+*
+*               This function is a network protocol suite to network interface (IF) function & SHOULD be
+*               called only by appropriate network interface function(s).
+*
+* Note(s)     : (3) Since NetIPv4_RxPktFragReasm() may return a pointer to a different packet buffer (see
+*                   'NetIPv4_RxPktFragReasm()  Return(s)', 'p_buf_hdr' MUST be reloaded.
+*
+*               (4) (a) For single packet buffer IPv4 datagrams, the datagram length is equal to the IPv4
+*                       Total Length minus the IPv4 Header Length.
+*
+*                   (b) For multiple packet buffer, fragmented IPv4 datagrams, the datagram length is
+*                       equal to the previously calculated total fragment size.
+*
+*                       (1) IP datagram length is stored ONLY in the first packet buffer of any
+*                           fragmented packet buffers.
+*
+*               (5) Network buffer already freed by higher layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetIPv4_Rx (NET_BUF  *p_buf,
+                  NET_ERR  *p_err)
+{
+    NET_BUF_HDR    *p_buf_hdr;
+    NET_IPv4_HDR   *p_ip_hdr;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetIPv4_RxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.IPv4.RxPktCtr);
+
+                                                                /* -------------- VALIDATE RX'D IPv4 PKT -------------- */
+    p_buf_hdr = &p_buf->Hdr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetIPv4_RxPktValidateBuf(p_buf_hdr, p_err);                 /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetIPv4_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+#endif
+    p_ip_hdr = (NET_IPv4_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+
+    NetIPv4_RxPktValidate(p_buf, p_buf_hdr, p_ip_hdr, p_err);   /* Validate rx'd pkt.                                   */
+
+
+
+                                                                /* ------------------- REASM FRAGS -------------------- */
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+             p_buf = NetIPv4_RxPktFragReasm(p_buf, p_buf_hdr, p_ip_hdr, p_err);
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+        case NET_IPv4_ERR_INVALID_VER:
+        case NET_IPv4_ERR_INVALID_LEN_HDR:
+        case NET_IPv4_ERR_INVALID_LEN_TOT:
+        case NET_IPv4_ERR_INVALID_LEN_DATA:
+        case NET_IPv4_ERR_INVALID_FLAG:
+        case NET_IPv4_ERR_INVALID_FRAG:
+        case NET_IPv4_ERR_INVALID_PROTOCOL:
+        case NET_IPv4_ERR_INVALID_CHK_SUM:
+        case NET_IPv4_ERR_INVALID_ADDR_SRC:
+        case NET_IPv4_ERR_INVALID_ADDR_DEST:
+        case NET_IPv4_ERR_INVALID_OPT:
+        case NET_IPv4_ERR_INVALID_OPT_LEN:
+        case NET_IPv4_ERR_INVALID_OPT_NBR:
+        case NET_IPv4_ERR_INVALID_OPT_END:
+        case NET_IPv4_ERR_INVALID_OPT_FLAG:
+        case NET_IPv4_ERR_RX_OPT_BUF_NONE_AVAIL:
+        case NET_IPv4_ERR_RX_OPT_BUF_LEN:
+        case NET_IPv4_ERR_RX_OPT_BUF_WR:
+        default:
+             NetIPv4_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                            /* ------------ DEMUX DATAGRAM ------------ */
+    switch (*p_err) {                                                       /* Chk err from NetIPv4_RxPktFragReasm().   */
+        case NET_IPv4_ERR_RX_FRAG_NONE:
+        case NET_IPv4_ERR_RX_FRAG_COMPLETE:
+             p_buf_hdr = &p_buf->Hdr;                                       /* Reload buf hdr ptr (see Note #3).        */
+             if (*p_err == NET_IPv4_ERR_RX_FRAG_NONE) {                     /* If pkt NOT frag'd, ...                   */
+                  p_buf_hdr->IP_DatagramLen = p_buf_hdr->IP_TotLen          /* ... calc buf datagram len (see Note #4a).*/
+                                           - p_buf_hdr->IP_HdrLen;
+             } else {                                                       /* Else set tot frag size ...               */
+                  p_buf_hdr->IP_DatagramLen = p_buf_hdr->IP_FragSizeTot;    /* ...       as datagram len (see Note #4b).*/
+             }
+             NetIPv4_RxPktDemuxDatagram(p_buf, p_buf_hdr, p_err);
+             break;
+
+
+        case NET_IPv4_ERR_RX_FRAG_REASM:                        /* Frag'd datagram in reasm.                            */
+            *p_err = NET_IPv4_ERR_NONE;
+             return;
+
+
+        case NET_IPv4_ERR_RX_FRAG_DISCARD:
+        case NET_IPv4_ERR_RX_FRAG_OFFSET:
+        case NET_IPv4_ERR_RX_FRAG_SIZE:
+        case NET_IPv4_ERR_RX_FRAG_SIZE_TOT:
+        case NET_IPv4_ERR_RX_FRAG_LEN_TOT:
+        default:
+             NetIPv4_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                /* ----------------- UPDATE RX STATS ------------------ */
+    switch (*p_err) {                                           /* Chk err from NetIPv4_RxPktDemuxDatagram().           */
+        case NET_ICMPv4_ERR_NONE:
+        case NET_IGMP_ERR_NONE:
+        case NET_UDP_ERR_NONE:
+        case NET_TCP_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IPv4.RxDgramCompCtr);
+            *p_err = NET_IPv4_ERR_NONE;
+             break;
+
+
+        case NET_ERR_RX:
+                                                                /* See Note #5.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxPktDisCtr);
+                                                                /* Rtn err from NetIPv4_RxPktDemuxDatagram().           */
+             return;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        default:
+             NetIPv4_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                             NetIPv4_Tx()
+*
+* Description : (1) Prepare & transmit IPv4 datagram packet(s) :
+*
+*                   (a) Validate  transmit packet
+*                   (b) Prepare & transmit packet datagram
+*                   (c) Update    transmit statistics
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to transmit IPv4 packet.
+*
+*               addr_src    Source      IPv4 address.
+*
+*               addr_dest   Destination IPv4 address.
+*
+*               TOS         Specific TOS to transmit IPv4 packet (see Note #2a).
+*
+*               TTL         Specific TTL to transmit IPv4 packet (see Note #2b) :
+*
+*                               NET_IPv4_TTL_MIN                minimum TTL transmit value   (1)
+*                               NET_IPv4_TTL_MAX                maximum TTL transmit value (255)
+*                               NET_IPv4_TTL_DFLT               default TTL transmit value (128)
+*                               NET_IPv4_TTL_NONE               replace with default TTL
+*
+*               flags       Flags to select transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IPv4_FLAG_NONE              No  IPv4 transmit flags selected.
+*                               NET_IPv4_FLAG_TX_DONT_FRAG      Set IPv4 'Don't Frag' flag.
+*
+*               p_opts      Pointer to one or more IPv4 options configuration data structures (see Note #2c) :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IPv4_OPT_CFG_ROUTE_TS       Route &/or Internet Timestamp options configuration.
+*                               NET_IPv4_OPT_CFG_SECURITY       Security options configuration
+*                                                                   (see 'net_ipv4.c  Note #1d').
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               IPv4 datagram(s)     successfully prepared &
+*                                                                   transmitted to network interface layer.
+*                               NET_IPv4_ERR_TX_PKT             IPv4 datagram(s) NOT successfully prepared or
+*                                                                   transmitted to network interface layer.
+*
+*                                                               -- RETURNED BY NetIPv4_TxPktDiscard() : ---
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+*                                                               ------ RETURNED BY NetIPv4_TxPkt() : ------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_TxMsgErr(),
+*               NetICMPv4_TxMsgReq(),
+*               NetICMPv4_TxMsgReply(),
+*               NetUDP_Tx(),
+*               NetTCP_TxPkt().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) (a) RFC #1122, Section 3.2.1.6 states that :
+*
+*                       (1) "The IP layer MUST provide a means ... to set the TOS field of every datagram
+*                            that is sent;" ...
+*                       (2) "the default is all zero bits."
+*
+*                       See also 'net_ipv4.h  IPv4 HEADER TYPE OF SERVICE (TOS) DEFINES'.
+*
+*                   (b) RFC #1122, Section 3.2.1.7 states that :
+*
+*                       (1) "The IP layer MUST provide a means ... to set the TTL field of every datagram
+*                            that is sent."
+*
+*                       (2) "A host MUST NOT send a datagram with a Time-to-Live (TTL) value of zero."
+*
+*                       (3) "When a fixed TTL value is used, it MUST be configurable."
+*
+*                       See also 'net_ipv4.h  IPv4 HEADER TIME-TO-LIVE (TTL) DEFINES'.
+*
+*                   (c) RFC #1122, Section 3.2.1.8 states that "there MUST be a means ... to specify IP
+*                       options to be included in transmitted IP datagrams".
+*
+*                       See also 'net_ipv4.h  IPv4 HEADER OPTION CONFIGURATION DATA TYPES'.
+*
+*               (3) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetIPv4_Tx (NET_BUF        *p_buf,
+                  NET_IPv4_ADDR   addr_src,
+                  NET_IPv4_ADDR   addr_dest,
+                  NET_IPv4_TOS    TOS,
+                  NET_IPv4_TTL    TTL,
+                  CPU_INT16U      flags,
+                  void           *p_opts,
+                  NET_ERR        *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_ERR       err;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetIPv4_TxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+                                                                /* --------------- VALIDATE IPv4 TX PKT --------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    NetIPv4_TxPktValidate(p_buf_hdr,
+                          addr_src,
+                          addr_dest,
+                          TOS,
+                          TTL,
+                          flags,
+                          p_opts,
+                          p_err);
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_IF_ERR_INVALID_IF:
+        case NET_IPv4_ERR_INVALID_LEN_DATA:
+        case NET_IPv4_ERR_INVALID_TOS:
+        case NET_IPv4_ERR_INVALID_FLAG:
+        case NET_IPv4_ERR_INVALID_TTL:
+        case NET_IPv4_ERR_INVALID_ADDR_SRC:
+        case NET_IPv4_ERR_INVALID_ADDR_DEST:
+        case NET_IPv4_ERR_INVALID_ADDR_GATEWAY:
+        case NET_IPv4_ERR_INVALID_OPT_TYPE:
+        case NET_IPv4_ERR_INVALID_OPT_LEN:
+        case NET_IPv4_ERR_INVALID_OPT_CFG:
+        case NET_IPv4_ERR_INVALID_OPT_ROUTE:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetIPv4_TxPktDiscard(p_buf, &err);
+            *p_err = NET_IPv4_ERR_TX_PKT;
+             return;
+    }
+#endif
+
+
+                                                                /* ------------------- TX IPv4 PKT -------------------- */
+    NetIPv4_TxPkt(p_buf,
+                  p_buf_hdr,
+                  addr_src,
+                  addr_dest,
+                  TOS,
+                  TTL,
+                  flags,
+                  p_opts,
+                  p_err);
+
+
+                                                                /* ----------------- UPDATE TX STATS ------------------ */
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDgramCtr);
+            *p_err = NET_IPv4_ERR_NONE;
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        case NET_IF_ERR_INVALID_IF:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxPktDisCtr);
+                                                                /* Rtn err from NetIPv4_TxPkt().                        */
+             return;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_IF_ERR_INVALID_CFG:
+        case NET_ERR_FAULT_NULL_FNCT:
+        case NET_IPv4_ERR_INVALID_LEN_HDR:
+        case NET_IPv4_ERR_INVALID_FRAG:
+        case NET_IPv4_ERR_INVALID_OPT_TYPE:
+        case NET_IPv4_ERR_INVALID_OPT_LEN:
+        case NET_IPv4_ERR_INVALID_ADDR_HOST:
+        case NET_IPv4_ERR_INVALID_ADDR_GATEWAY:
+        case NET_IPv4_ERR_TX_DEST_INVALID:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_BUF_ERR_INVALID_LEN:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_UTIL_ERR_NULL_SIZE:
+             NetIPv4_TxPktDiscard(p_buf, &err);
+            *p_err = NET_IPv4_ERR_TX_PKT;
+             return;
+
+
+        default:
+             NetIPv4_TxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIPv4_ReTx()
+*
+* Description : (1) Prepare & re-transmit packets from transport protocol layers to network interface layer :
+*
+*                   (a) Validate  re-transmit packet
+*                   (b) Prepare & re-transmit packet datagram
+*                   (c) Update    re-transmit statistics
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to re-transmit IPv4 packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               IPv4 datagram(s) successfully re-transmitted
+*                                                                   to network interface layer.
+*
+*                                                               -- RETURNED BY NetIPv4_TxPktDiscard() : ---
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+*                                                               ----- RETURNED BY NetIPv4_ReTxPkt() : -----
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN         Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnReTxQ().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetIPv4_ReTx (NET_BUF  *p_buf,
+                    NET_ERR  *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetIPv4_TxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+                                                                /* ------------- VALIDATE IPv4 RE-TX PKT -------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_buf_hdr->IP_HdrIx == NET_BUF_IX_NONE) {
+        NetIPv4_TxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvBufIxCtr);
+        return;
+    }
+#endif
+
+
+                                                                /* ------------------ RE-TX IPv4 PKT ------------------ */
+    NetIPv4_ReTxPkt(p_buf,
+                    p_buf_hdr,
+                    p_err);
+
+
+                                                                /* ---------------- UPDATE RE-TX STATS ---------------- */
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDgramCtr);
+            *p_err = NET_IPv4_ERR_NONE;
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #2.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxPktDisCtr);
+                                                                /* Rtn err from NetIPv4_ReTxPkt().                      */
+             return;
+
+
+        case NET_IPv4_ERR_INVALID_ADDR_HOST:
+        case NET_IPv4_ERR_INVALID_ADDR_GATEWAY:
+        case NET_IPv4_ERR_TX_DEST_INVALID:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_UTIL_ERR_NULL_SIZE:
+        default:
+             NetIPv4_TxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv4_CfgAddrRemoveAllHandler()
+*
+* Description : (1) Remove all configured IPv4 host address(s) from an interface :
+*
+*                   (a) Validate IPv4 address configuration state                                   See Note #3b
+*                   (b) Remove ALL configured IPv4 address(s) from interface's IPv4 address table :
+*                       (1) Close all connections for each address
+*                   (c) Reset    IPv4 address configuration state to static                         See Note #3c
+*
+*
+*
+* Argument(s) : if_nbr      Interface number to remove address configuration.
+*               ------      Argument validated in NetIPv4_CfgAddrRemoveAll(),
+*                                                 NetIPv4_CfgAddrAddDynamicStart(),
+*                                                 NetIPv4_CfgAddrAddDynamic().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               ALL configured IPv4 address(s) successfully
+*                                                                   removed.
+*                               NET_IPv4_ERR_ADDR_CFG_STATE     Invalid IPv4 address configuration state
+*                                                                   (see Note #3b).
+*
+* Return(s)   : DEF_OK,   if ALL interface's configured IPv4 host address(s) successfully removed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIPv4_CfgAddrRemoveAll(),
+*               NetIPv4_CfgAddrAddDynamicStart(),
+*               NetIPv4_CfgAddrAddDynamic().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv4_CfgAddrRemoveAllHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetIPv4_CfgAddrRemoveAll()  Note #2'.
+*
+*               (3) (a) An interface may be configured with either :
+*
+*                       (1) One or more statically- configured IPv4 addresses (default configuration)
+*                               OR
+*                       (2) Exactly one dynamically-configured IPv4 address
+*
+*                   (b) If an interface's IPv4 host address(s) are NOT currently statically- or dynamically-
+*                       configured, then NO address(s) may NOT be removed.  However, an interface in the
+*                       dynamic-init may call this function which effect will solely put that interface
+*                       back in the default statically-configured mode.
+*
+*                   (c) When NO address(s) are configured on an interface after ALL address(s) are removed,
+*                       the interface's address configuration is defaulted back to statically-configured.
+*
+*                       See also 'NetIPv4_Init()           Note #2b'
+*                              & 'NetIPv4_CfgAddrRemove()  Note #5c'.
+*
+*                   See also 'net_ipv4.h  NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE  Note #1b',
+*                            'NetIPv4_CfgAddrAdd()         Note #7',
+*                            'NetIPv4_CfgAddrAddDynamic()  Note #8',
+*                          & 'NetIPv4_CfgAddrRemove()      Note #5'.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetIPv4_CfgAddrRemoveAllHandler (NET_IF_NBR   if_nbr,
+                                                      NET_ERR     *p_err)
+{
+    NET_IPv4_ADDR      addr_cfgd;
+    NET_IPv4_IF_CFG   *p_ip_if_cfg;
+    NET_IPv4_ADDRS    *p_ip_addrs;
+    NET_IP_ADDRS_QTY   addr_ix;
+    CPU_SR_ALLOC();
+
+
+                                                                        /* ------- VALIDATE IPv4 ADDR CFG STATE ------- */
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+
+    switch (p_ip_if_cfg->AddrCfgState) {
+        case NET_IPv4_ADDR_CFG_STATE_STATIC:                            /* See Note #3b.                                */
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC:
+        case NET_IPv4_ADDR_CFG_STATE_DYNAMIC_INIT:
+             break;
+
+
+        case NET_IPv4_ADDR_CFG_STATE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgAddrStateCtr);
+            *p_err =  NET_IPv4_ERR_ADDR_CFG_STATE;
+             return (DEF_FAIL);
+    }
+
+
+                                                                        /* ------ REMOVE ALL CFG'D IPv4 ADDR(S) ------- */
+    addr_ix   =  0u;
+    p_ip_addrs = &p_ip_if_cfg->AddrsTbl[addr_ix];
+    while (addr_ix < p_ip_if_cfg->AddrsNbrCfgd) {                       /* Remove ALL cfg'd addrs.                      */
+                                                                        /* Close  all cfg'd addr's conns.               */
+        addr_cfgd = NET_UTIL_HOST_TO_NET_32(p_ip_addrs->AddrHost);
+        NetConn_CloseAllConnsByAddrHandler((CPU_INT08U      *)      &addr_cfgd,
+                                           (NET_CONN_ADDR_LEN)sizeof(addr_cfgd));
+
+                                                                        /* Remove addr from tbl.                        */
+        p_ip_addrs->AddrHost               = NET_IPv4_ADDR_NONE;
+        p_ip_addrs->AddrHostSubnetMask     = NET_IPv4_ADDR_NONE;
+        p_ip_addrs->AddrHostSubnetMaskHost = NET_IPv4_ADDR_NONE;
+        p_ip_addrs->AddrHostSubnetNet      = NET_IPv4_ADDR_NONE;
+        p_ip_addrs->AddrDfltGateway        = NET_IPv4_ADDR_NONE;
+
+        p_ip_addrs++;
+        addr_ix++;
+    }
+
+    p_ip_if_cfg->AddrsNbrCfgd         = 0u;                             /* NO  addr(s) cfg'd.                           */
+    p_ip_if_cfg->AddrCfgState         = NET_IPv4_ADDR_CFG_STATE_STATIC; /* Set to static addr cfg (see Note #3c).       */
+    CPU_CRITICAL_ENTER();
+    p_ip_if_cfg->AddrProtocolConflict = DEF_NO;                         /* Clr addr conflict.                           */
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err =  NET_IPv4_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_CfgAddrValidate()
+*
+* Description : Validate an IPv4 host address, subnet mask, & default gateway for configuration on an
+*               interface.
+*
+* Argument(s) : addr_host           Desired IPv4 address                 to configure (see Note #1).
+*
+*               addr_subnet_mask    Desired IPv4 address subnet mask     to configure (see Note #1).
+*
+*               addr_dflt_gateway   Desired IPv4 default gateway address to configure (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   IP address successfully configured.
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST      Invalid IPv4 address, subnet mask, or
+*                                                                       address/subnet mask combination.
+*                               NET_IPv4_ERR_INVALID_ADDR_GATEWAY   Invalid IPv4 default gateway address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_CfgAddrAdd(),
+*               NetIPv4_CfgAddrAddDynamic().
+*
+* Note(s)     : (1) IPv4 addresses MUST be in host-order.
+*
+*               (2) (a) RFC #1122, Section 3.3.1.1 states that "the host IP layer MUST operate correctly
+*                       in a minimal network environment, and in particular, when there are no gateways".
+*
+*                       In other words, a host on an isolated network should be able to correctly operate
+*                       & communicate with all other hosts on its local network without need of a gateway
+*                       or configuration of a gateway.
+*
+*                       See also 'NetIPv4_TxPktDatagramRouteSel()  Note #3b1c1'.
+*
+*                   (b) However, a configured gateway MUST be on the same network as the host's IPv4 address
+*                       -- i.e. the network portion of the configured IPv4 address & the configured gateway
+*                       addresses MUST be identical.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+static  void  NetIPv4_CfgAddrValidate (NET_IPv4_ADDR   addr_host,
+                                       NET_IPv4_ADDR   addr_subnet_mask,
+                                       NET_IPv4_ADDR   addr_dflt_gateway,
+                                       NET_ERR        *p_err)
+{
+    CPU_BOOLEAN  addr_valid;
+
+                                                                        /* Validate host addr & subnet mask.            */
+    addr_valid = NetIPv4_IsValidAddrHostCfgd(addr_host, addr_subnet_mask);
+    if (addr_valid != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgInvAddrHostCtr);
+       *p_err =  NET_IPv4_ERR_INVALID_ADDR_HOST;
+        return;
+    }
+                                                                        /* Validate dflt gateway (see Note #2).         */
+    if (addr_dflt_gateway != NET_IPv4_ADDR_NONE) {
+        addr_valid = NetIPv4_IsValidAddrHost(addr_dflt_gateway);
+        if (addr_valid != DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgInvGatewayCtr);
+           *p_err =  NET_IPv4_ERR_INVALID_ADDR_GATEWAY;
+            return;
+        }
+                                                                        /* Validate dflt gateway subnet (see Note #2b). */
+        if ((addr_dflt_gateway & addr_subnet_mask) !=
+            (addr_host         & addr_subnet_mask)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgInvGatewayCtr);
+            *p_err =  NET_IPv4_ERR_INVALID_ADDR_GATEWAY;
+             return;
+        }
+    }
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_GetAddrsHostCfgd()
+*
+* Description : Get interface number & IPv4 addresses structure for configured IPv4 address.
+*
+* Argument(s) : addr        Configured IPv4 host address to get the interface number & IPv4 addresses
+*                               structure (see Note #1).
+*
+*               p_if_nbr    Pointer to variable that will receive ... :
+*
+*                               (a) The interface number for this configured IPv4 address, if available;
+*                               (b) NET_IF_NBR_NONE,                                       otherwise.
+*
+* Return(s)   : Pointer to corresponding IPv4 address structure, if IPv4 address configured on any interface.
+*
+*               Pointer to NULL,                                 otherwise.
+*
+* Caller(s)   : NetIPv4_GetAddrSubnetMask(),
+*               NetIPv4_GetAddrDfltGateway(),
+*               NetIPv4_GetAddrHostCfgdIF_Nbr().
+*
+* Note(s)     : (1) IPv4 address MUST be in host-order.
+*
+*               (2) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+static  NET_IPv4_ADDRS  *NetIPv4_GetAddrsHostCfgd (NET_IPv4_ADDR   addr,
+                                                   NET_IF_NBR     *p_if_nbr)
+{
+    NET_IPv4_ADDRS  *p_ip_addrs;
+    NET_IF_NBR       if_nbr;
+
+
+    if (p_if_nbr != (NET_IF_NBR *)0) {                          /* Init IF nbr for err (see Note #2).                   */
+       *p_if_nbr  =  NET_IF_NBR_NONE;
+    }
+
+                                                                /* ---------------- VALIDATE IPv4 ADDR ---------------- */
+    if (addr ==  NET_IPv4_ADDR_NONE) {
+        return ((NET_IPv4_ADDRS *)0);
+    }
+
+
+                                                                /* -------- SRCH ALL CFG'D IF's FOR IPv4 ADDR --------- */
+    if_nbr    =  NET_IF_NBR_BASE_CFGD;
+    p_ip_addrs = (NET_IPv4_ADDRS *)0;
+
+    while ((if_nbr    <   NET_IF_NBR_IF_TOT) &&                 /* Srch all cfg'd IF's ...                              */
+           (p_ip_addrs == (NET_IPv4_ADDRS *)0)) {               /* ... until addr found.                                */
+
+        p_ip_addrs = NetIPv4_GetAddrsHostCfgdOnIF(addr, if_nbr);
+        if (p_ip_addrs == (NET_IPv4_ADDRS *)0) {                /* If addr NOT found, ...                               */
+            if_nbr++;                                           /* ... adv to next IF nbr.                              */
+        }
+    }
+
+    if (p_ip_addrs != (NET_IPv4_ADDRS *)0) {                    /* If addr avail, ...                                   */
+        if (p_if_nbr != (NET_IF_NBR *)0) {
+           *p_if_nbr  =  if_nbr;                                /* ... rtn IF nbr.                                      */
+        }
+    }
+
+
+    return (p_ip_addrs);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv4_GetAddrsHostCfgdOnIF()
+*
+* Description : Get IPv4 addresses structure for an interface's configured IPv4 address.
+*
+* Argument(s) : addr        Configured IPv4 host address to get the interface number & IPv4 addresses
+*                               structure (see Note #1).
+*
+*               if_nbr      Interface number to search for configured IPv4 address.
+*
+* Return(s)   : Pointer to corresponding IP address structure, if IPv4 address configured on this interface.
+*
+*               Pointer to NULL,                                 otherwise.
+*
+* Caller(s)   : NetIPv4_GetAddrsHostCfgd(),
+*               NetIPv4_RxPktValidate(),
+*               NetIPv4_TxPktValidate(),
+*               NetIPv4_TxPktDatagramRouteSel().
+*
+* Note(s)     : (1) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+static  NET_IPv4_ADDRS  *NetIPv4_GetAddrsHostCfgdOnIF (NET_IPv4_ADDR  addr,
+                                                       NET_IF_NBR     if_nbr)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN        valid;
+    NET_ERR            err;
+#endif
+    NET_IPv4_IF_CFG   *p_ip_if_cfg;
+    NET_IPv4_ADDRS    *p_ip_addrs;
+    NET_IP_ADDRS_QTY   addr_ix;
+    CPU_BOOLEAN        addr_found;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ----------------- VALIDATE IF NBR ------------------ */
+    valid = NetIF_IsValidCfgdHandler(if_nbr, &err);
+    if (valid != DEF_YES) {
+        return ((NET_IPv4_ADDRS *)0);
+    }
+#endif
+
+                                                                /* ---------------- VALIDATE IPv4 ADDR ---------------- */
+    if (addr == NET_IPv4_ADDR_NONE) {
+        return ((NET_IPv4_ADDRS *)0);
+    }
+
+
+                                                                /* -------------- SRCH IF FOR IPv4 ADDR --------------- */
+    addr_ix    =  0u;
+    addr_found =  DEF_NO;
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+    p_ip_addrs  = &p_ip_if_cfg->AddrsTbl[addr_ix];
+
+    while ((addr_ix    <  p_ip_if_cfg->AddrsNbrCfgd) &&         /* Srch all cfg'd addrs ...                             */
+           (addr_found == DEF_NO)) {                            /* ... until addr found.                                */
+
+        if (p_ip_addrs->AddrHost != addr) {                     /* If addr NOT found, ...                               */
+            p_ip_addrs++;                                       /* ... adv to IF's next addr.                           */
+            addr_ix++;
+
+        } else {
+            addr_found = DEF_YES;
+        }
+    }
+
+    if (addr_found != DEF_YES) {
+        return ((NET_IPv4_ADDRS *)0);
+    }
+
+
+    return (p_ip_addrs);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as IPv4 protocol.
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header that received IPv4 packet.
+*               ---------   Argument validated in NetIPv4_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               Received buffer's IPv4 header validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT IPv4.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIPv4_RxPktValidateBuf (NET_BUF_HDR  *p_buf_hdr,
+                                        NET_ERR      *p_err)
+{
+    CPU_BOOLEAN  valid;
+    NET_ERR      err;
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvBufTypeCtr);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* --------------- VALIDATE IPv4 BUF HDR -------------- */
+    if (p_buf_hdr->ProtocolHdrType != NET_PROTOCOL_TYPE_IP_V4) {
+        valid = NetIF_IsValidHandler(p_buf_hdr->IF_Nbr, &err);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvIF_Ctr);
+        }
+       *p_err = NET_ERR_INVALID_PROTOCOL;
+        return;
+    }
+
+    if (p_buf_hdr->IP_HdrIx == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_RxPktValidate()
+*
+* Description : (1) Validate received IPv4 packet :
+*
+*                   (a) (1) Validate the received packet's following IPv4 header fields :
+*
+*                           (A) Version
+*                           (B) Header Length
+*                           (C) Total  Length                               See Note #4
+*                           (D) Flags
+*                           (E) Fragment Offset
+*                           (F) Protocol
+*                           (G) Check-Sum                                   See Note #5
+*                           (H) Source      Address                         See Note #9c
+*                           (I) Destination Address                         See Note #9d
+*                           (J) Options
+*
+*                       (2) Validation ignores the following IPv4 header fields :
+*
+*                           (A) Type of Service (TOS)
+*                           (B) Identification  (ID)
+*                           (C) Time-to-Live    (TTL)
+*
+*                   (b) Convert the following IPv4 header fields from network-order to host-order :
+*
+*                       (1) Total Length                                    See Notes #1bB1 & #3b
+*                       (2) Identification (ID)                             See Note  #1bB2
+*                       (3) Flags/Fragment Offset                           See Note  #1bB3
+*                       (4) Check-Sum                                       See Note  #5d
+*                       (5) Source      Address                             See Notes #1bB4 & #3c
+*                       (6) Destination Address                             See Notes #1bB5 & #3d
+*                       (7) All Options' multi-octet words                  See Notes #1bB6 & #1bC
+*
+*                           (A) These fields are NOT converted directly in the received packet buffer's
+*                               data area but are converted in local or network buffer variables ONLY.
+*
+*                           (B) The following IPv4 header fields are converted & stored in network buffer
+*                               variables :
+*
+*                               (1) Total Length
+*                               (2) Identification (ID)
+*                               (3) Flags/Fragment Offset
+*                               (4) Source      Address
+*                               (5) Destination Address
+*                               (6) IPv4 Options' multi-octet words
+*
+*                           (C) Since any IPv4 packet may receive a number of various IPv4 options that may
+*                               require conversion from network-order to host-order, IPv4 options are copied
+*                               into a separate network buffer for validation, conversion, & demultiplexing.
+*
+*                   (c) Update network buffer's protocol controls
+*
+*                   (d) Process IPv4 packet in ICMP Receive Handler
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv4 packet.
+*               -----       Argument checked   in NetIPv4_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIPv4_Rx().
+*
+*               p_ip_hdr    Pointer to received packet's IPv4 header.
+*               --------    Argument validated in NetIPv4_Rx()/NetIPv4_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                       Received packet validated.
+*                               NET_IPv4_ERR_INVALID_VER                Invalid IPv4 version.
+*                               NET_IPv4_ERR_INVALID_LEN_HDR            Invalid IPv4 header length.
+*                               NET_IPv4_ERR_INVALID_LEN_TOT            Invalid IPv4 total  length.
+*                               NET_IPv4_ERR_INVALID_LEN_DATA           Invalid IPv4 data   length.
+*                               NET_IPv4_ERR_INVALID_FLAG               Invalid IPv4 flags.
+*                               NET_IPv4_ERR_INVALID_FRAG               Invalid IPv4 fragmentation.
+*                               NET_IPv4_ERR_INVALID_PROTOCOL           Invalid/unknown protocol type.
+*                               NET_IPv4_ERR_INVALID_CHK_SUM            Invalid IPv4 check-sum.
+*                               NET_IPv4_ERR_INVALID_ADDR_SRC           Invalid IPv4 source      address.
+*                               NET_IPv4_ERR_INVALID_ADDR_DEST          Invalid IPv4 destination address.
+*                               NET_IPv4_ERR_INVALID_ADDR_BROADCAST     Invalid IPv4 broadcast.
+*
+*                                                                       - RETURNED BY NetIPv4_RxPktValidateOpt() : -
+*                               NET_IPv4_ERR_RX_OPT_BUF_NONE_AVAIL      No available buffers to process
+*                                                                           IPv4 options.
+*                               NET_IPv4_ERR_RX_OPT_BUF_LEN             Insufficient buffer length to write
+*                                                                           IPv4 options to buffer.
+*                               NET_IPv4_ERR_RX_OPT_BUF_WR              IPv4 options failed to write to buffer.
+*                               NET_IPv4_ERR_INVALID_OPT                Invalid IPv4 option.
+*                               NET_IPv4_ERR_INVALID_OPT_LEN            Invalid IPv4 option length.
+*                               NET_IPv4_ERR_INVALID_OPT_NBR            Invalid IPv4 option number of same option.
+*                               NET_IPv4_ERR_INVALID_OPT_END            Invalid IPv4 option list ending.
+*                               NET_IPv4_ERR_INVALID_OPT_FLAG           Invalid IPv4 option flag.
+*
+*                                                                       --- RETURNED BY NetIF_IsEnHandler() : ----
+*                               NET_IF_ERR_INVALID_IF                   Invalid OR disabled network interface.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_Rx().
+*
+* Note(s)     : (2) See 'net_ipv4.h  IP HEADER' for IPv4 header format.
+*
+*               (3) The following IPv4 header fields MUST be decoded &/or converted from network-order to host-order
+*                   BEFORE any ICMP Error Messages are transmitted (see 'net_icmp.c  NetICMPv4_TxMsgErr()  Note #2') :
+*
+*                   (a) Header Length
+*                   (b) Total  Length
+*                   (c) Source      Address
+*                   (d) Destination Address
+*
+*               (4) (a) In addition to validating that the IPv4 header Total Length is greater than or equal to the
+*                       IPv4 header Header Length, the IPv4 total length SHOULD be compared to the remaining packet
+*                       data length which should be identical.
+*
+*                   (b) (1) However, some network interfaces MAY append octets to their frames :
+*
+*                           (A) 'pad' octets, if the frame length does NOT meet the frame's required minimum size :
+*
+*                               (1) RFC #894, Section 'Frame Format' states that "the minimum length of  the data
+*                                   field of a packet sent over an Ethernet is 46 octets.  If necessary, the data
+*                                   field should be padded (with octets of zero) to meet the Ethernet minimum frame
+*                                   size.  This padding is not part of the IPv4 packet and is not included in the
+*                                   total length field of the IPv4 header".
+*
+*                               (2) RFC #1042, Section 'Frame Format and MAC Level Issues : For all hardware types'
+*                                   states that "IEEE 802 packets may have a minimum size restriction.  When
+*                                   necessary, the data field should be padded (with octets of zero) to meet the
+*                                   IEEE 802 minimum frame size requirements.  This padding is not part of the IPv4
+*                                   datagram and is not included in the total length field of the IPv4 header".
+*
+*                           (B) Trailer octets, to improve overall throughput :
+*
+*                               (1) RFC #893, Section 'Introduction' specifies "a link-level ... trailer
+*                                   encapsulation, or 'trailer' ... to minimize the number and size of memory-
+*                                   to-memory copy operations performed by a receiving host when processing a
+*                                   data packet".
+*
+*                               (2) RFC #1122, Section 2.3.1 states that "trailer encapsulations[s] ... rearrange
+*                                   the data contents of packets ... [to] improve the throughput of higher layer
+*                                   protocols".
+*
+*                           (C) CRC or checksum values, optionally copied from a device.
+*
+*                       (2) Therefore, if ANY octets are appended to the total frame length, then the packet's
+*                           remaining data length MAY be greater than the IPv4 total length :
+*
+*                           (A) Thus,    the IPv4 total length & the packet's remaining data length CANNOT be
+*                               compared for equality.
+*
+*                               (1) Unfortunately, this eliminates the possibility to validate the IPv4 total
+*                                   length to the packet's remaining data length.
+*
+*                           (B) And      the IPv4 total length MAY    be less    than the packet's remaining
+*                               data length.
+*
+*                               (1) However, the packet's remaining data length MUST be reset to the IPv4
+*                                   total length to correctly calculate higher-layer application data
+*                                   length.
+*
+*                           (C) However, the IPv4 total length CANNOT be greater than the packet's remaining
+*                               data length.
+*
+*               (5) (a) IPv4 header Check-Sum field MUST be validated BEFORE (or AFTER) any multi-octet words
+*                       are converted from network-order to host-order since "the sum of 16-bit integers can
+*                       be computed in either byte order" [RFC #1071, Section 2.(B)].
+*
+*                       In other words, the IPv4 header Check-Sum CANNOT be validated AFTER SOME but NOT ALL
+*                       multi-octet words have been converted from network-order to host-order.
+*
+*                   (b) However, ALL received packets' multi-octet words are converted in local or network
+*                       buffer variables ONLY (see Note #1bA).  Therefore, IPv4 header Check-Sum may be validated
+*                       at any point.
+*
+*                   (c) For convenience, the IPv4 header Check-Sum is validated AFTER IPv4 Version, Header Length,
+*                       & Total Length fields have been validated.  Thus, invalid IPv4 version or length packets
+*                       are quickly discarded (see Notes #9a, #8a, & #8b) & the total IPv4 header length
+*                       (in octets) will already be calculated for the IPv4 Check-Sum calculation.
+*
+*                   (d) After the IPv4 header Check-Sum is validated, it is NOT necessary to convert the Check-
+*                       Sum from network-order to host-order since    it is NOT required for further processing.
+*
+*               (6) (a) RFC #791, Section 3.2 'Fragmentation and Reassembly' states that "if an internet datagram
+*                       is fragmented" :
+*
+*                       (1) "Fragments are counted in units of 8 octets."
+*                       (2) "The minimum fragment is 8 octets."
+*
+*                   (b) (1) However, this CANNOT apply "if this is the last fragment" ...
+*                           (A) "(that is the more fragments field is zero)";         ...
+*                       (2) Which may be of ANY size.
+*
+*                   See also 'net_ipv4.h  IPv4 FRAGMENTATION DEFINES  Note #1a'.
+*
+*               (7) (a) RFC #792, Section 'Destination Unreachable Message : Description' states that "if, in
+*                       the destination host, the IPv4 module cannot deliver the datagram because the indicated
+*                       protocol module ... is not active, the destination host may send a destination unreachable
+*                       message to the source host".
+*
+*                   (b) Default case already invalidated earlier in this function.  However, the default case
+*                       is included as an extra precaution in case 'Protocol' is incorrectly modified.
+*
+*               (8) ICMP Error Messages are sent if any of the following IP header fields are invalid :
+*
+*                   (a) Header Length                               ICMP 'Parameter   Problem'  Error Message
+*                   (b) Total  Length                               ICMP 'Parameter   Problem'  Error Message
+*                   (c) Flags                                       ICMP 'Parameter   Problem'  Error Message
+*                   (d) Fragment Offset                             ICMP 'Parameter   Problem'  Error Message
+*                   (e) Protocol                                    ICMP 'Unreachable Protocol' Error Message
+*                   (f) Options                                     ICMP 'Parameter   Problem'  Error Messages
+*                                                                        [see NetIPv4_RxPktValidateOpt()]
+*
+*               (9) RFC #1122, Section 3.2.1 requires that IPv4 packets with the following invalid IPv4 header
+*                   fields be "silently discarded" :
+*
+*                   (a) Version                                             RFC #1122, Section 3.2.1.1
+*                   (b) Check-Sum                                           RFC #1122, Section 3.2.1.2
+*
+*                   (c) Source Address
+*
+*                       (1) (A) RFC #1122, Section 3.2.1.3 states that "a host MUST silently discard
+*                               an incoming datagram containing an IPv4 source address that is invalid
+*                               by the rules of this section".
+*
+*                           (B) (1) MAY      be one of the following :
+*                                   (a) Configured host address             RFC #1122, Section 3.2.1.3.(1)
+*                                   (b) Localhost       address             RFC #1122, Section 3.2.1.3.(g)
+*                                                                               See also Note #9c2A
+*                                   (c) Link-local host address             RFC #3927, Section 2.1
+*                                                                               See also Note #9c2B
+*                                   (d) This       Host                     RFC #1122, Section 3.2.1.3.(a)
+*                                   (e) Specified  Host                     RFC #1122, Section 3.2.1.3.(b)
+*
+*                               (2) MUST NOT be one of the following :
+*                                   (a) Multicast  host address             RFC #1112, Section 7.2
+*                                   (b) Limited    Broadcast                RFC #1122, Section 3.2.1.3.(c)
+*                                   (c) Directed   Broadcast                RFC #1122, Section 3.2.1.3.(d)
+*                                   (d) Subnet     Broadcast                RFC #1122, Section 3.2.1.3.(e)
+*                                                                               See also Note #9c2C
+*
+*                       (2) (A) RFC #1122, Section 3.2.1.3.(g) states that the "internal host loopback
+*                               address ... MUST NOT appear outside a host".
+*
+*                               (1) However, this does NOT prevent the host loopback address from being
+*                                   used as an IPv4 packet's source address as long as BOTH the packet's
+*                                   source AND destination addresses are internal host addresses, either
+*                                   a configured host IP address or any host loopback address.
+*
+*                           (B) RFC #3927, Section 2.1 specifies the "IPv4 Link-Local address ... range
+*                               ... [as] inclusive" ... :
+
+*                               (1) "from 169.254.1.0" ...
+*                               (2) "to   169.254.254.255".
+*
+*                           (C) Although received packets' IPv4 source addresses SHOULD be checked for
+*                               invalid subnet broadcasts (see Note #9c1B2d), since multiple IPv4 host
+*                               addresses MAY be configured on any single network interface & since
+*                               each of these IPv4 host addresses may be configured on various networks
+*                               with various subnet masks, it is NOT possible to absolutely determine
+*                               if a received packet is a subnet broadcast for any specific network
+*                               on the network interface.
+*
+*                   (d) Destination Address
+*
+*                       (1) (A) RFC #1122, Section 3.2.1.3 states that "a host MUST silently discard
+*                               an incoming datagram that is not destined for" :
+*
+*                               (1) "(one of) the host's IPv4 address(es); or" ...
+*                               (2) "an IPv4 broadcast address valid for the connected network; or"
+*                               (3) "the address for a multicast group of which the host is a member
+*                                    on the incoming physical interface."
+*
+*                           (B) (1) MUST     be one of the following :
+*                                   (a) Configured host address             RFC #1122, Section 3.2.1.3.(1)
+*                                   (b) Multicast  host address             RFC #1122, Section 3.2.1.3.(3)
+*                                                                               See also Note #9d2A
+*                                   (c) Localhost                           RFC #1122, Section 3.2.1.3.(g)
+*                                                                               See also Note #9d2B
+*                                   (d) Limited    Broadcast                RFC #1122, Section 3.2.1.3.(c)
+*                                   (e) Directed   Broadcast                RFC #1122, Section 3.2.1.3.(d)
+*                                   (f) Subnet     Broadcast                RFC #1122, Section 3.2.1.3.(e)
+*
+*                               (2) MUST NOT be one of the following :
+*                                   (a) This       Host                     RFC #1122, Section 3.2.1.3.(a)
+*                                   (b) Specified  Host                     RFC #1122, Section 3.2.1.3.(b)
+*
+*                       (2) (A) RFC #1122, Section 3.2.1.3 states that "for most purposes, a datagram
+*                               addressed to a ... multicast destination is processed as if it had been
+*                               addressed to one of the host's IP addresses".
+*
+*                           (B) RFC #1122, Section 3.2.1.3.(g) states that the "internal host loopback
+*                               address ... MUST NOT appear outside a host".
+*
+*                           (C) RFC #3927, Section 2.8 states that "the 169.254/16 address prefix MUST
+*                               NOT be subnetted".  Therefore, link-local broadcast packets may ONLY be
+*                               received via directed broadcast (see Note #9d1B1e).
+*
+*                       (3) (A) RFC #1122, Section 3.3.6 states that :
+*
+*                               (1) "When a host sends a datagram to a link-layer broadcast address, the IP
+*                                    destination address MUST be a legal IP broadcast or IP multicast address."
+*
+*                               (2) "A host SHOULD silently discard a datagram that is received via a link-
+*                                    layer broadcast ... but does not specify an IP multicast or broadcast
+*                                    destination address."
+*
+*                           (B) (1) Therefore, any packet received as ... :
+*
+*                                   (a) ... an IPv4 broadcast destination address MUST also have been received
+*                                        as a link-layer broadcast.
+*
+*                                   (b) ... a link-layer broadcast MUST also be received as an IP broadcast or
+*                                        as an IPv4 multicast.
+*
+*                               (2) Thus, the following packets MUST be silently discarded if received as ... :
+*
+*                                   (a) ... a link-layer broadcast but not as an IPv4 broadcast or multicast; ...
+*                                   (b) ... a link-layer unicast   but     as an IPv4 broadcast.
+*
+*              (10) See 'net_ipv4.h  IPv4 ADDRESS DEFINES  Notes #2 & #3' for supported IPv4 addresses.
+*
+*              (11) (a) RFC #1122, Section 3.2.1.6 states that "the IP layer SHOULD pass received TOS values
+*                       up to the transport layer".
+*
+*                       NOT currently implemented. #### NET-812
+*
+*                   (b) RFC #1122, Section 3.2.1.8 states that "all IP options ... received in datagrams MUST
+*                       be passed to the transport layer (or to ICMP processing when the datagram is an ICMP
+*                       message).  The IPv4 and transport layer MUST each interpret those IPv4 options that they
+*                       understand and silently ignore the others".
+*
+*                       NOT currently implemented. #### NET-813
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_RxPktValidate (NET_BUF        *p_buf,
+                                     NET_BUF_HDR    *p_buf_hdr,
+                                     NET_IPv4_HDR   *p_ip_hdr,
+                                     NET_ERR        *p_err)
+{
+#ifdef  NET_IGMP_MODULE_EN
+    CPU_BOOLEAN        addr_host_grp_joined;
+#endif
+    NET_IPv4_IF_CFG   *p_ip_if_cfg;
+    NET_IPv4_ADDRS    *p_ip_addrs;
+    NET_IP_ADDRS_QTY   addr_ix;
+    NET_IF_NBR         if_nbr;
+    CPU_INT08U         ip_ver;
+    CPU_INT08U         ip_hdr_len;
+    CPU_INT16U         ip_hdr_len_tot;
+    CPU_INT16U         ip_flags;
+    CPU_INT16U         ip_frag_offset;
+    CPU_INT16U         protocol_ix;
+    CPU_BOOLEAN        ip_flag_reserved;
+    CPU_BOOLEAN        ip_flag_dont_frag;
+    CPU_BOOLEAN        ip_flag_frags_more;
+    CPU_BOOLEAN        ip_chk_sum_valid;
+    CPU_BOOLEAN        addr_host_src;
+    CPU_BOOLEAN        addr_host_dest;
+    CPU_BOOLEAN        rx_remote_host;
+    CPU_BOOLEAN        rx_broadcast;
+    CPU_BOOLEAN        ip_broadcast;
+    CPU_BOOLEAN        ip_multicast;
+#ifdef  NET_ICMPv4_MODULE_EN
+    NET_ERR            msg_err;
+#endif
+
+
+                                                                /* --------------- CONVERT IPv4 FIELDS ---------------- */
+                                                                /* See Note #3.                                         */
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->IP_TotLen,   &p_ip_hdr->TotLen);
+    NET_UTIL_VAL_COPY_GET_NET_32(&p_buf_hdr->IP_AddrSrc,  &p_ip_hdr->AddrSrc);
+    NET_UTIL_VAL_COPY_GET_NET_32(&p_buf_hdr->IP_AddrDest, &p_ip_hdr->AddrDest);
+
+
+                                                                /* ---------------- VALIDATE IPv4 VER ----------------- */
+    ip_ver   = p_ip_hdr->Ver_HdrLen & NET_IPv4_HDR_VER_MASK;    /* See 'net_ipv4.h  IPv4 HEADER  Note #2'.              */
+    ip_ver >>= NET_IPv4_HDR_VER_SHIFT;
+    if (ip_ver != NET_IPv4_HDR_VER) {                           /* Validate IP ver.                                     */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvVerCtr);
+       *p_err = NET_IPv4_ERR_INVALID_VER;
+        return;
+    }
+
+
+                                                                /* -------------- VALIDATE IPv4 HDR LEN --------------- */
+                                                                /* See 'net_ipv4.h  IPv4 HEADER  Note #2'.              */
+    ip_hdr_len          =  p_ip_hdr->Ver_HdrLen   & NET_IPv4_HDR_LEN_MASK;
+    ip_hdr_len_tot      = (CPU_INT16U)ip_hdr_len * NET_IPv4_HDR_LEN_WORD_SIZE;
+    p_buf_hdr->IP_HdrLen = (CPU_INT16U)ip_hdr_len_tot;          /* See Note #3a.                                        */
+
+    if (ip_hdr_len < NET_IPv4_HDR_LEN_MIN) {                    /* If hdr len < min hdr len, rtn err.                   */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvLenCtr);
+#ifdef  NET_ICMPv4_MODULE_EN
+        NetICMPv4_TxMsgErr(p_buf,
+                           NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                           NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                           NET_ICMPv4_PTR_IX_IP_HDR_LEN,
+                          &msg_err);
+#endif
+       *p_err = NET_IPv4_ERR_INVALID_LEN_HDR;
+        return;
+    }
+#if ((NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED) & \
+      defined(NET_ICMPv4_MODULE_EN))
+    if (ip_hdr_len > NET_IPv4_HDR_LEN_MAX) {                    /* If hdr len > max hdr len, rtn err.                   */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvLenCtr);
+        NetICMPv4_TxMsgErr(p_buf,
+                           NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                           NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                           NET_ICMPv4_PTR_IX_IP_HDR_LEN,
+                          &msg_err);
+       *p_err = NET_IPv4_ERR_INVALID_LEN_HDR;
+        return;
+    }
+#endif
+
+
+
+                                                                /* -------------- VALIDATE IPv4 TOT LEN --------------- */
+#if 0                                                           /* See Note #3b.                                        */
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->IP_TotLen, &p_ip_hdr->TotLen);
+#endif
+    if (p_buf_hdr->IP_TotLen < ip_hdr_len_tot) {                /* If IPv4 tot len < hdr len, rtn err.                  */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvTotLenCtr);
+#ifdef  NET_ICMPv4_MODULE_EN
+        NetICMPv4_TxMsgErr(p_buf,
+                           NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                           NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                           NET_ICMPv4_PTR_IX_IP_TOT_LEN,
+                          &msg_err);
+#endif
+       *p_err = NET_IPv4_ERR_INVALID_LEN_TOT;
+        return;
+    }
+
+    if (p_buf_hdr->IP_TotLen > p_buf_hdr->DataLen) {            /* If IPv4 tot len > rem pkt data len, ...              */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvTotLenCtr);
+#ifdef  NET_ICMPv4_MODULE_EN
+        NetICMPv4_TxMsgErr(p_buf,
+                           NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                           NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                           NET_ICMPv4_PTR_IX_IP_TOT_LEN,
+                          &msg_err);
+#endif
+       *p_err = NET_IPv4_ERR_INVALID_LEN_TOT;                   /* ... rtn err (see Note #4b2C).                        */
+        return;
+    }
+
+    p_buf_hdr->DataLen    = (NET_BUF_SIZE) p_buf_hdr->IP_TotLen;    /* Trunc data len to IP tot len (see Note #4b2B1).  */
+    p_buf_hdr->IP_DataLen = (CPU_INT16U  )(p_buf_hdr->IP_TotLen - p_buf_hdr->IP_HdrLen);
+
+
+
+                                                                /* --------------- VALIDATE IPv4 CHK SUM -------------- */
+#ifdef  NET_IPV4_CHK_SUM_OFFLOAD_RX
+    ip_chk_sum_valid = DEF_OK;
+#else
+                                                                /* See Note #5.                                         */
+    ip_chk_sum_valid = NetUtil_16BitOnesCplChkSumHdrVerify((void     *)p_ip_hdr,
+                                                           (CPU_INT16U)ip_hdr_len_tot,
+                                                           (NET_ERR  *)p_err);
+#endif
+    if (ip_chk_sum_valid != DEF_OK) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvChkSumCtr);
+       *p_err = NET_IPv4_ERR_INVALID_CHK_SUM;
+        return;
+    }
+#if 0                                                           /* Conv to host-order NOT necessary (see Note #5d).     */
+   (void)NET_UTIL_VAL_GET_NET_16(&p_ip_hdr->ChkSum);
+#endif
+
+
+
+                                                                /* ------------------ CONVERT IP ID ------------------- */
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->IP_ID, &p_ip_hdr->ID);
+
+
+                                                                /* --------------- VALIDATE IPv4 FLAGS ---------------- */
+                                                                /* See 'net_ipv4.h  IPv4 HEADER  Note #4'.              */
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->IP_Flags_FragOffset, &p_ip_hdr->Flags_FragOffset);
+    ip_flags         = p_buf_hdr->IP_Flags_FragOffset & NET_IPv4_HDR_FLAG_MASK;
+#if 1                                                           /* Allow invalid reserved flag for rx'd datagrams.      */
+    ip_flag_reserved = DEF_BIT_IS_SET_ANY(ip_flags, NET_IPv4_HDR_FLAG_RESERVED);
+    if (ip_flag_reserved != DEF_NO) {                           /* If reserved flag bit set, rtn err.                   */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvFlagsCtr);
+#ifdef  NET_ICMPv4_MODULE_EN
+        NetICMPv4_TxMsgErr(p_buf,
+                           NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                           NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                           NET_ICMPv4_PTR_IX_IP_FLAGS,
+                          &msg_err);
+#endif
+       *p_err = NET_IPv4_ERR_INVALID_FLAG;
+        return;
+    }
+#endif
+
+
+                                                                /* ---------------- VALIDATE IPv4 FRAG ---------------- */
+                                                                /* See 'net_ipv4.h  IPv4 HEADER  Note #4'.              */
+    ip_flag_dont_frag  = DEF_BIT_IS_SET(ip_flags, NET_IPv4_HDR_FLAG_FRAG_DONT);
+    ip_flag_frags_more = DEF_BIT_IS_SET(ip_flags, NET_IPv4_HDR_FLAG_FRAG_MORE);
+    if (ip_flag_dont_frag != DEF_NO) {                          /* If  'Don't Frag' flag set & ...                      */
+        if (ip_flag_frags_more != DEF_NO) {                     /* ... 'More Frags' flag set, rtn err.                  */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvFragCtr);
+#ifdef  NET_ICMPv4_MODULE_EN
+            NetICMPv4_TxMsgErr(p_buf,
+                               NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                               NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                               NET_ICMPv4_PTR_IX_IP_FRAG_OFFSET,
+                              &msg_err);
+#endif
+           *p_err = NET_IPv4_ERR_INVALID_FRAG;
+            return;
+        }
+
+        ip_frag_offset = p_buf_hdr->IP_Flags_FragOffset & NET_IPv4_HDR_FRAG_OFFSET_MASK;
+        if (ip_frag_offset != NET_IPv4_HDR_FRAG_OFFSET_NONE) {  /* ... frag offset != 0,      rtn err.                  */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvFragCtr);
+#ifdef  NET_ICMPv4_MODULE_EN
+            NetICMPv4_TxMsgErr(p_buf,
+                               NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                               NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                               NET_ICMPv4_PTR_IX_IP_FRAG_OFFSET,
+                              &msg_err);
+#endif
+           *p_err = NET_IPv4_ERR_INVALID_FRAG;
+            return;
+        }
+    }
+
+    if (ip_flag_frags_more != DEF_NO) {                         /* If 'More Frags' set (see Note #6b1A)   ...           */
+                                                                /* ... & IPv4 data len NOT multiple of    ...           */
+        if ((p_buf_hdr->IP_DataLen % NET_IPv4_FRAG_SIZE_UNIT) != 0u) { /* ... frag size units (see Note #6a), rtn err.  */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvFragCtr);
+#ifdef  NET_ICMPv4_MODULE_EN
+            NetICMPv4_TxMsgErr(p_buf,
+                               NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                               NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                               NET_ICMPv4_PTR_IX_IP_TOT_LEN,
+                              &msg_err);
+#endif
+           *p_err = NET_IPv4_ERR_INVALID_FRAG;
+            return;
+        }
+    }
+
+
+
+                                                                /* -------------- VALIDATE IPv4 PROTOCOL -------------- */
+    switch (p_ip_hdr->Protocol) {                               /* See 'net_ip.h  IP HEADER PROTOCOL FIELD DEFINES ...  */
+        case NET_IP_HDR_PROTOCOL_ICMP:                          /* ... Note #1.                                         */
+        case NET_IP_HDR_PROTOCOL_IGMP:
+        case NET_IP_HDR_PROTOCOL_UDP:
+        case NET_IP_HDR_PROTOCOL_TCP:
+             break;
+
+
+        default:                                                /* See Note #7a.                                        */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvProtocolCtr);
+#ifdef  NET_ICMPv4_MODULE_EN
+             NetICMPv4_TxMsgErr(p_buf,
+                                NET_ICMPv4_MSG_TYPE_DEST_UNREACH,
+                                NET_ICMPv4_MSG_CODE_DEST_PROTOCOL,
+                                NET_ICMPv4_MSG_PTR_NONE,
+                               &msg_err);
+#endif
+            *p_err = NET_IPv4_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+
+
+                                                                    /* -------------- VALIDATE IP ADDRS --------------- */
+#if 0                                                               /* See Notes #3c & #3d.                             */
+    NET_UTIL_VAL_COPY_GET_NET_32(&p_buf_hdr->IP_AddrSrc,  &p_ip_hdr->AddrSrc);
+    NET_UTIL_VAL_COPY_GET_NET_32(&p_buf_hdr->IP_AddrDest, &p_ip_hdr->AddrDest);
+#endif
+
+    if_nbr = p_buf_hdr->IF_Nbr;                                     /* Get pkt's rx'd IF.                               */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+   (void)NetIF_IsEnHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                    /* Chk pkt rx'd to cfg'd host addr.                 */
+    if (if_nbr != NET_IF_NBR_LOCAL_HOST) {
+        p_ip_addrs      =  NetIPv4_GetAddrsHostCfgdOnIF(p_buf_hdr->IP_AddrDest, if_nbr);
+        addr_host_dest = (p_ip_addrs != (NET_IPv4_ADDRS *)0) ? DEF_YES : DEF_NO;
+    } else {
+        p_ip_addrs      = (NET_IPv4_ADDRS *)0;
+        addr_host_dest =  NetIPv4_IsAddrHostCfgdHandler(p_buf_hdr->IP_AddrDest);
+    }
+
+                                                                    /* Chk pkt rx'd via local or remote host.           */
+    rx_remote_host = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_RX_REMOTE);
+    if (((if_nbr  != NET_IF_NBR_LOCAL_HOST) && (rx_remote_host == DEF_NO)) ||
+        ((if_nbr  == NET_IF_NBR_LOCAL_HOST) && (rx_remote_host != DEF_NO))) {
+         NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+        *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+         return;
+    }
+
+
+                                                                /* -------------- VALIDATE IPv4 SRC ADDR -------------- */
+                                                                /* See Note #9c.                                        */
+    if (p_buf_hdr->IP_AddrSrc == NET_IPv4_ADDR_THIS_HOST) {     /* Chk 'This Host' addr        (see Note #9c1B1d).      */
+
+                                                                /* Chk         localhost addrs (see Note #9c1B1b).      */
+    } else if ((p_buf_hdr->IP_AddrSrc & NET_IPv4_ADDR_LOCAL_HOST_MASK_NET) ==
+                                       NET_IPv4_ADDR_LOCAL_HOST_NET     ) {
+                                                                /* Chk invalid localhost addrs.                         */
+        if ((p_buf_hdr->IP_AddrSrc    & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST) ==
+            (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+             return;
+        }
+        if ((p_buf_hdr->IP_AddrSrc    & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST) ==
+            (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+             return;
+        }
+
+        if (rx_remote_host != DEF_NO) {                         /* If localhost addr rx'd via remote host, ...          */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;              /* ... rtn err / discard pkt   (see Note #9c2A1).       */
+            return;
+        }
+
+                                                                /* Chk link-local addrs        (see Note #9c1B1c).      */
+    } else if ((p_buf_hdr->IP_AddrSrc & NET_IPv4_ADDR_LOCAL_LINK_MASK_NET) ==
+                                       NET_IPv4_ADDR_LOCAL_LINK_NET     ) {
+                                                                /* Chk invalid link-local addr (see Note #9c2B1).       */
+        if ((p_buf_hdr->IP_AddrSrc < NET_IPv4_ADDR_LOCAL_LINK_HOST_MIN) ||
+            (p_buf_hdr->IP_AddrSrc > NET_IPv4_ADDR_LOCAL_LINK_HOST_MAX)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+             return;
+        }
+
+
+                                                                /* Chk invalid lim'd broadcast (see Note #9c1B2b).      */
+    } else if (p_buf_hdr->IP_AddrSrc == NET_IPv4_ADDR_BROADCAST) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+       *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+        return;
+
+
+    } else if ((p_buf_hdr->IP_AddrSrc   & NET_IPv4_ADDR_CLASS_A_MASK) == NET_IPv4_ADDR_CLASS_A) {
+                                                                /* Chk Class-A broadcast       (see Note #9c1B2c).      */
+        if ((p_buf_hdr->IP_AddrSrc      & NET_IPv4_ADDR_CLASS_A_MASK_HOST) ==
+            (NET_IPv4_ADDR_BROADCAST   & NET_IPv4_ADDR_CLASS_A_MASK_HOST)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+             return;
+        }
+
+    } else if ((p_buf_hdr->IP_AddrSrc & NET_IPv4_ADDR_CLASS_B_MASK) == NET_IPv4_ADDR_CLASS_B) {
+                                                                /* Chk Class-B broadcast       (see Note #9c1B2c).      */
+        if ((p_buf_hdr->IP_AddrSrc    & NET_IPv4_ADDR_CLASS_B_MASK_HOST) ==
+            (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_B_MASK_HOST)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+             return;
+        }
+
+    } else if ((p_buf_hdr->IP_AddrSrc & NET_IPv4_ADDR_CLASS_C_MASK) == NET_IPv4_ADDR_CLASS_C) {
+                                                                /* Chk Class-C broadcast       (see Note #9c1B2c).      */
+        if ((p_buf_hdr->IP_AddrSrc    & NET_IPv4_ADDR_CLASS_C_MASK_HOST) ==
+            (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_C_MASK_HOST)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+             return;
+        }
+
+    } else if ((p_buf_hdr->IP_AddrSrc & NET_IPv4_ADDR_CLASS_D_MASK) == NET_IPv4_ADDR_CLASS_D) {
+                                                                /* Chk Class-D multicast       (see Note #9c1B2a).      */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+       *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+        return;
+
+    } else {                                                    /* Discard invalid addr class  (see Note #10).          */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+       *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+        return;
+    }
+
+                                                                /* Chk subnet  broadcast       (see Note #9c1B2d).      */
+#if 0                                                           /* See Note #9c2C.                                      */
+    if (p_ip_addrs != (NET_IPv4_ADDRS *)0) {
+        if ((p_buf_hdr->IP_AddrSrc & p_ip_addrs->AddrHostSubnetMask) ==
+                                    p_ip_addrs->AddrHostSubnetNet ) {
+            if ((p_buf_hdr->IP_AddrSrc    & p_ip_addrs->AddrHostSubnetMaskHost) ==
+                (NET_IPv4_ADDR_BROADCAST & p_ip_addrs->AddrHostSubnetMaskHost)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvAddrSrcCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+                 return;
+            }
+        }
+    }
+#endif
+
+
+                                                                    /* ------------- VALIDATE IP DEST ADDR ------------ */
+                                                                    /* See Note #9d.                                    */
+    ip_broadcast = DEF_NO;
+    ip_multicast = DEF_NO;
+
+                                                                    /* Chk this host's cfg'd addr    (see Note #9d1B1a).*/
+    if (p_ip_addrs != (NET_IPv4_ADDRS *)0) {
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (p_ip_addrs->AddrHost == NET_IPv4_ADDR_NONE) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+            return;
+        }
+#endif
+        if (p_buf_hdr->IP_AddrDest != p_ip_addrs->AddrHost) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+            return;
+        }
+
+                                                                    /* Chk this host's cfg'd addr(s) [see Note #9d1B1a].*/
+    } else if (addr_host_dest == DEF_YES) {
+        addr_host_src = NetIPv4_IsAddrHostHandler(p_buf_hdr->IP_AddrSrc);
+        if (addr_host_src != DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+            return;
+        }
+
+                                                                    /* Chk         localhost         (see Note #9d1B1c).*/
+    } else if ((p_buf_hdr->IP_AddrDest & NET_IPv4_ADDR_LOCAL_HOST_MASK_NET) ==
+                                        NET_IPv4_ADDR_LOCAL_HOST_NET     ) {
+                                                                    /* Chk invalid localhost addrs.                     */
+        if ((p_buf_hdr->IP_AddrDest    & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST) ==
+            (NET_IPv4_ADDR_THIS_HOST  & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+             return;
+        }
+
+        if (rx_remote_host != DEF_NO) {                             /* If localhost addr rx'd via remote host, ...      */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;                 /* ... rtn err / discard pkt     (see Note #9d2B).  */
+            return;
+        }
+
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.RxDestLocalHostCtr);
+
+                                                                    /* Chk invalid 'This Host'       (see Note #9d1B2a).*/
+    } else if (p_buf_hdr->IP_AddrDest == NET_IPv4_ADDR_THIS_HOST) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+       *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+        return;
+
+
+#ifdef  NET_IGMP_MODULE_EN
+                                                                    /* Chk joined multicast addr(s)  [see Note #9d1B1b].*/
+    } else if ((p_buf_hdr->IP_AddrDest & NET_IPv4_ADDR_CLASS_D_MASK) == NET_IPv4_ADDR_CLASS_D) {
+        addr_host_grp_joined = NetIGMP_IsGrpJoinedOnIF(if_nbr, p_buf_hdr->IP_AddrDest);
+        if (addr_host_grp_joined != DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+            return;
+        }
+
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.RxDestMcastCtr);
+        ip_multicast = DEF_YES;
+#endif
+
+
+    } else {
+                                                                    /* Chk lim'd broadcast           (see Note #9d1B1d).*/
+        if (p_buf_hdr->IP_AddrDest == NET_IPv4_ADDR_BROADCAST) {
+            ip_broadcast = DEF_YES;
+
+        } else if ((p_buf_hdr->IP_AddrDest & NET_IPv4_ADDR_LOCAL_LINK_MASK_NET) ==
+                                            NET_IPv4_ADDR_LOCAL_LINK_NET     ) {
+                                                                    /* Chk link-local broadcast      (see Note #9d2C).  */
+            if ((p_buf_hdr->IP_AddrDest & NET_IPv4_ADDR_LOCAL_LINK_MASK_HOST) !=
+                (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_LOCAL_LINK_MASK_HOST)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+                 return;
+            }
+            ip_broadcast = DEF_YES;
+
+
+        } else if ((p_buf_hdr->IP_AddrDest & NET_IPv4_ADDR_CLASS_A_MASK) == NET_IPv4_ADDR_CLASS_A) {
+                                                                    /* Chk Class-A 'This Host'       (see Note #9d1B2b).*/
+            if ((p_buf_hdr->IP_AddrDest   & NET_IPv4_ADDR_CLASS_A_MASK_HOST) ==
+                (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_A_MASK_HOST)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+                 return;
+            }
+                                                                    /* Chk Class-A broadcast         (see Note #9d1B1e).*/
+            if ((p_buf_hdr->IP_AddrDest   & NET_IPv4_ADDR_CLASS_A_MASK_HOST) ==
+                (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_A_MASK_HOST)) {
+                 ip_broadcast = DEF_YES;
+            }
+
+        } else if ((p_buf_hdr->IP_AddrDest & NET_IPv4_ADDR_CLASS_B_MASK) == NET_IPv4_ADDR_CLASS_B) {
+                                                                    /* Chk Class-B 'This Host'       (see Note #9d1B2b).*/
+            if ((p_buf_hdr->IP_AddrDest    & NET_IPv4_ADDR_CLASS_B_MASK_HOST) ==
+                (NET_IPv4_ADDR_THIS_HOST  & NET_IPv4_ADDR_CLASS_B_MASK_HOST)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+                 return;
+            }
+                                                                    /* Chk Class-B broadcast         (see Note #9d1B1e).*/
+            if ((p_buf_hdr->IP_AddrDest   & NET_IPv4_ADDR_CLASS_B_MASK_HOST) ==
+                (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_B_MASK_HOST)) {
+                 ip_broadcast = DEF_YES;
+            }
+
+        } else if ((p_buf_hdr->IP_AddrDest & NET_IPv4_ADDR_CLASS_C_MASK) == NET_IPv4_ADDR_CLASS_C) {
+                                                                    /* Chk Class-C 'This Host'       (see Note #9d1B2b).*/
+            if ((p_buf_hdr->IP_AddrDest    & NET_IPv4_ADDR_CLASS_C_MASK_HOST) ==
+                (NET_IPv4_ADDR_THIS_HOST  & NET_IPv4_ADDR_CLASS_C_MASK_HOST)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+                 return;
+            }
+                                                                    /* Chk Class-C broadcast         (see Note #9d1B1e).*/
+            if ((p_buf_hdr->IP_AddrDest   & NET_IPv4_ADDR_CLASS_C_MASK_HOST) ==
+                (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_C_MASK_HOST)) {
+                 ip_broadcast = DEF_YES;
+            }
+
+        } else {                                                    /* Discard invalid addr class    (see Note #10).    */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+            return;
+        }
+
+                                                                    /* Chk subnet broadcast          (see Note #9d1B1f).*/
+        if (if_nbr != NET_IF_NBR_LOCAL_HOST) {                      /* If pkt rx'd via remote host, ...                 */
+            p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+            addr_ix    =  0u;
+            p_ip_addrs  = &p_ip_if_cfg->AddrsTbl[addr_ix];
+                                                                    /* ... chk broadcast on ALL cfg'd addrs on rx'd IF. */
+            while ((addr_ix      <  p_ip_if_cfg->AddrsNbrCfgd) &&
+                   (ip_broadcast == DEF_NO)) {
+                if ((p_buf_hdr->IP_AddrDest & p_ip_addrs->AddrHostSubnetMask) ==
+                                             p_ip_addrs->AddrHostSubnetNet ) {
+                    if ((p_buf_hdr->IP_AddrDest   & p_ip_addrs->AddrHostSubnetMaskHost) ==
+                        (NET_IPv4_ADDR_BROADCAST & p_ip_addrs->AddrHostSubnetMaskHost)) {
+                         ip_broadcast = DEF_YES;
+                    }
+                }
+                p_ip_addrs++;
+                addr_ix++;
+            }
+        }
+
+                                                                    /* If NOT any this host's addrs (see Note #9d1A1) & */
+        if (ip_broadcast != DEF_YES) {                              /* .. NOT any broadcast   addrs (see Note #9d1A2);  */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;                 /* .. rtn err / discard pkt     (see Note #9d1A).   */
+            return;
+        }
+
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.RxDestBcastCtr);
+    }
+
+                                                                    /* Chk invalid    broadcast     (see Note #9d3).    */
+    rx_broadcast = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_RX_BROADCAST);
+    if (rx_broadcast == DEF_YES) {                                  /* If          IF   broadcast rx'd, ...             */
+        if ((ip_broadcast != DEF_YES) &&                            /* ... BUT NOT IPv4 broadcast rx'd  ...             */
+            (ip_multicast != DEF_YES)) {                            /* ... AND NOT IPv4 multicast rx'd; ...             */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestBcastCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_BROADCAST;           /* ... rtn err / discard pkt    (see Note #9d3B2a). */
+             return;
+        }
+    } else {                                                        /* If      NOT IF   broadcast rx'd  ...             */
+        if  (ip_broadcast == DEF_YES) {                             /* ... BUT     IPv4 broadcast rx'd, ...             */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxDestBcastCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_BROADCAST;           /* ... rtn err / discard pkt    (see Note #9d3B2b). */
+             return;
+        }
+    }
+
+
+
+                                                                /* ---------------- VALIDATE IPv4 OPTS ---------------- */
+    if (ip_hdr_len_tot > NET_IPv4_HDR_SIZE_MIN) {               /* If hdr len > min, ...                                */
+                                                                /* ... validate/process IPv4 opts (see Note #11b).      */
+        NetIPv4_RxPktValidateOpt((NET_BUF      *)p_buf,
+                                 (NET_BUF_HDR  *)p_buf_hdr,
+                                 (NET_IPv4_HDR *)p_ip_hdr,
+                                 (CPU_INT08U    )ip_hdr_len_tot,
+                                 (NET_ERR      *)p_err);
+        if (*p_err != NET_IPv4_ERR_NONE) {
+             return;
+        }
+    }
+
+
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+#if 0                                                           /* See Note #3a.                                        */
+    p_buf_hdr->IP_HdrLen = ip_hdr_len_tot;
+#endif
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_buf_hdr->IP_HdrLen > p_buf_hdr->DataLen) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvDataLenCtr);
+       *p_err = NET_IPv4_ERR_INVALID_LEN_DATA;
+        return;
+    }
+#endif
+    p_buf_hdr->DataLen -= (NET_BUF_SIZE) p_buf_hdr->IP_HdrLen;
+    protocol_ix        = (CPU_INT16U  )(p_buf_hdr->IP_HdrIx + p_buf_hdr->IP_HdrLen);
+    switch (p_ip_hdr->Protocol) {
+        case NET_IP_HDR_PROTOCOL_ICMP:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_ICMP_V4;
+             p_buf_hdr->ProtocolHdrTypeNetSub    = NET_PROTOCOL_TYPE_ICMP_V4;
+             p_buf_hdr->ICMP_MsgIx               = protocol_ix;
+             break;
+
+
+#ifdef  NET_IGMP_MODULE_EN
+        case NET_IP_HDR_PROTOCOL_IGMP:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_IGMP;
+             p_buf_hdr->ProtocolHdrTypeNetSub    = NET_PROTOCOL_TYPE_IGMP;
+             p_buf_hdr->IGMP_MsgIx               = protocol_ix;
+             break;
+#endif
+
+
+        case NET_IP_HDR_PROTOCOL_UDP:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_UDP_V4;
+             p_buf_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_UDP_V4;
+             p_buf_hdr->TransportHdrIx            = protocol_ix;
+             break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+        case NET_IP_HDR_PROTOCOL_TCP:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_TCP_V4;
+             p_buf_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_TCP_V4;
+             p_buf_hdr->TransportHdrIx            = protocol_ix;
+             break;
+#endif
+
+        default:                                                /* See Note #7b.                                        */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvProtocolCtr);
+            *p_err = NET_IPv4_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_RxPktValidateOpt()
+*
+* Description : (1) Validate & process received packet's IPv4 options :
+*
+*                   (a) Copy            IPv4 options into new buffer    See 'NetIPv4_RxPktValidate()  Note #1bC'
+*                   (b) Decode/validate IPv4 options
+*
+*
+* Argument(s) : p_buf               Pointer to network buffer that received IPv4 packet.
+*               -----               Argument checked   in NetIPv4_Rx().
+*
+*               p_buf_hdr           Pointer to network buffer header.
+*               ----------          Argument validated in NetIPv4_Rx().
+*
+*               p_ip_hdr            Pointer to received packet's IPv4 header.
+*               -------             Argument validated in NetIPv4_Rx()/NetIPv4_RxPktValidateBuf().
+*
+*               ip_hdr_len_size     Length  of received packet's IPv4 header.
+*               ----------------    Argument validated in NetIPv4_RxPktValidate().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                       IPv4 options validated & processed.
+*                               NET_IPv4_ERR_RX_OPT_BUF_NONE_AVAIL      No available buffers       to process
+*                                                                           IPv4 options.
+*                               NET_IPv4_ERR_RX_OPT_BUF_LEN             Insufficient buffer length to write
+*                                                                           IPv4 options to buffer.
+*                               NET_IPv4_ERR_RX_OPT_BUF_WR              IP options failed to write to buffer.
+*                               NET_IPv4_ERR_INVALID_OPT                Invalid IPv4 option.
+*                               NET_IPv4_ERR_INVALID_OPT_LEN            Invalid IPv4 option length.
+*                               NET_IPv4_ERR_INVALID_OPT_NBR            Invalid IPv4 option number of same option.
+*                               NET_IPv4_ERR_INVALID_OPT_END            Invalid IPv4 option list ending.
+*                               NET_IPv4_ERR_INVALID_OPT_FLAG           Invalid IPv4 option flag.
+*
+*                                                                     ----- RETURNED BY NetIF_Get() : ------
+*                               NET_IF_ERR_INVALID_IF                 Invalid network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_RxPktValidate().
+*
+* Note(s)     : (2) (a) See 'net_ipv4.h  IPv4 HEADER OPTIONS DEFINES' for   supported IPv4 options' summary.
+*
+*                   (b) See 'net_ipv4.c  Note #1d'                    for unsupported IPv4 options.
+*
+*               (3) RFC #1122, Section 3.2.1.8 lists the processing of the following IPv4 options as optional :
+*
+*                   (a) Record Route                            RFC #1122, Section 3.2.1.8.(d)
+*                   (b) Internet Timestamp                      RFC #1122, Section 3.2.1.8.(e)
+*
+*               (4) Each option's length MUST be multiples of NET_IP_HDR_OPT_SIZE_WORD octets so that "the
+*                   beginning of a subsequent option [aligns] on a 32-bit boundary" (RFC #791, Section 3.1
+*                   'Options : No Operation').
+*
+*               (5) RFC #1122, Section 3.2.1.8.(c) prohibits "an IP header" from transmitting with "more
+*                   than one Source Route option".
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_RxPktValidateOpt (NET_BUF        *p_buf,
+                                        NET_BUF_HDR    *p_buf_hdr,
+                                        NET_IPv4_HDR   *p_ip_hdr,
+                                        CPU_INT08U      ip_hdr_len_size,
+                                        NET_ERR        *p_err)
+{
+    NET_IF        *p_if                 = DEF_NULL;
+    NET_BUF       *p_opt_buf            = DEF_NULL;
+    NET_BUF_HDR   *p_opt_buf_hdr        = DEF_NULL;
+    CPU_INT08U    *p_opts               = DEF_NULL;
+    CPU_INT08U     opt_list_len_size    = 0u;
+    CPU_INT08U     opt_list_len_rem     = 0u;
+    CPU_INT08U     opt_len              = 0u;
+    CPU_INT08U     opt_nbr_src_routes   = 0u;
+#ifdef  NET_ICMPv4_MODULE_EN
+    CPU_INT08U     opt_ix_err           = 0u;
+#endif
+    CPU_INT16U     opt_ix               = 0u;
+    NET_BUF_SIZE   opt_buf_size         = 0u;
+    CPU_BOOLEAN    opt_err              = DEF_NO;
+    CPU_BOOLEAN    opt_list_end         = DEF_NO;
+    NET_IF_NBR     if_nbr               = NET_IF_NBR_NONE;
+    NET_ERR        err                  = NET_IPv4_ERR_NONE;
+    NET_ERR        err_rtn              = NET_IPv4_ERR_NONE;
+
+
+
+    opt_list_len_size = ip_hdr_len_size - NET_IPv4_HDR_SIZE_MIN;/* Calc opt list len size.                              */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------- VALIDATE IPv4 HDR OPT LIST SIZE --------- */
+#ifdef  NET_ICMPv4_MODULE_EN
+    if (opt_list_len_size > NET_IPv4_HDR_OPT_SIZE_MAX) {        /* If tot opt len > max opt size,           rtn err.    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvOptsCtr);
+        NetICMPv4_TxMsgErr(p_buf,
+                           NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                           NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                           NET_ICMPv4_PTR_IX_IP_OPTS,
+                          &err);
+       *p_err = NET_IPv4_ERR_INVALID_OPT_LEN;
+        return;
+    }
+                                                                /* If tot opt len NOT multiple of opt size, rtn err.    */
+    if ((opt_list_len_size % NET_IPv4_HDR_OPT_SIZE_WORD) != 0u) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvOptsCtr);
+        NetICMPv4_TxMsgErr(p_buf,
+                           NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                           NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                           NET_ICMPv4_PTR_IX_IP_OPTS,
+                          &err);
+       *p_err = NET_IPv4_ERR_INVALID_OPT_LEN;
+        return;
+    }
+#endif
+#endif
+
+
+                                                                /* ------------- COPY IPv4 OPTS INTO BUF -------------- */
+    if_nbr = p_buf_hdr->IF_Nbr;
+    p_if    = NetIF_Get(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+                                                                /* Get IPv4 opt rx buf.                                 */
+    opt_ix   = NET_IPv4_OPT_IX_RX;
+    p_opt_buf = NetBuf_Get(if_nbr,
+                           NET_TRANSACTION_RX,
+                           opt_list_len_size,
+                           opt_ix,
+                           0,
+                           NET_BUF_FLAG_NONE,
+                          &err);
+    if ( err != NET_BUF_ERR_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxOptsBufNoneAvailCtr);
+       *p_err  = NET_IPv4_ERR_RX_OPT_BUF_NONE_AVAIL;
+        return;
+    }
+
+                                                                /* Get IPv4 opt rx buf data area.                       */
+    p_opt_buf->DataPtr = NetBuf_GetDataPtr(p_if,
+                                           NET_TRANSACTION_RX,
+                                           opt_list_len_size,
+                                           opt_ix,
+                                           0,
+                                          &opt_buf_size,
+                                           0,
+                                          &err);
+    if ( err != NET_BUF_ERR_NONE) {
+        NetBuf_Free(p_opt_buf);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxOptsBufNoneAvailCtr);
+       *p_err  = NET_IPv4_ERR_RX_OPT_BUF_NONE_AVAIL;
+        return;
+    }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (opt_list_len_size > opt_buf_size) {
+        NetBuf_Free(p_opt_buf);
+       *p_err = NET_IPv4_ERR_RX_OPT_BUF_LEN;
+        return;
+    }
+#else
+   (void)&opt_buf_size;                                         /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+    NetBuf_DataWr((NET_BUF    *) p_opt_buf,                     /* Copy IP opts from rx'd pkt to IP opt buf.            */
+                  (NET_BUF_SIZE) opt_ix,
+                  (NET_BUF_SIZE) opt_list_len_size,
+                  (CPU_INT08U *)&p_ip_hdr->Opts[0],
+                  (NET_ERR    *)&err);
+    if ( err != NET_BUF_ERR_NONE) {
+        NetBuf_Free(p_opt_buf);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxOptsBufWrCtr);
+       *p_err  = NET_IPv4_ERR_RX_OPT_BUF_WR;
+        return;
+    }
+                                                                /* Init IPv4 opt buf ctrls.                             */
+    p_buf_hdr->IP_OptPtr           = (NET_BUF     *) p_opt_buf;
+    p_opt_buf_hdr                  = (NET_BUF_HDR *)&p_opt_buf->Hdr;
+    p_opt_buf_hdr->IP_HdrIx        = (CPU_INT16U   ) opt_ix;
+    p_opt_buf_hdr->IP_HdrLen       = (CPU_INT16U   ) opt_list_len_size;
+    p_opt_buf_hdr->TotLen          = (NET_BUF_SIZE ) p_opt_buf_hdr->IP_HdrLen;
+    p_opt_buf_hdr->ProtocolHdrType =  NET_PROTOCOL_TYPE_IP_V4_OPT;
+
+
+                                                                /* ------------ DECODE/VALIDATE IPv4 OPTS ------------- */
+    opt_err            =  DEF_NO;
+    opt_list_end       =  DEF_NO;
+    opt_nbr_src_routes =  0u;
+
+    p_opts              = (CPU_INT08U *)&p_opt_buf->DataPtr[opt_ix];
+    opt_list_len_rem   =  opt_list_len_size;
+
+    while (opt_list_len_rem > 0) {                              /* Process each opt in list (see Notes #2 & #4).        */
+        switch (*p_opts) {
+            case NET_IPv4_HDR_OPT_END_LIST:                     /* ------------------- END OPT LIST ------------------- */
+                 opt_list_end = DEF_YES;                        /* Mark end of opt list.                                */
+                 opt_len      = NET_IPv4_HDR_OPT_SIZE_WORD;
+                 break;
+
+
+            case NET_IPv4_HDR_OPT_NOP:                          /* --------------------- NOP OPT ---------------------- */
+                 opt_len      = NET_IPv4_HDR_OPT_SIZE_WORD;
+                 break;
+
+
+            case NET_IPv4_HDR_OPT_ROUTE_SRC_LOOSE:              /* ---------------- SRC/REC ROUTE OPTS ---------------- */
+            case NET_IPv4_HDR_OPT_ROUTE_SRC_STRICT:
+            case NET_IPv4_HDR_OPT_ROUTE_REC:
+                 if (opt_list_end == DEF_NO) {
+                     if (opt_nbr_src_routes < 1) {
+                         opt_nbr_src_routes++;
+                         opt_err = NetIPv4_RxPktValidateOptRoute(p_buf_hdr, p_opts, opt_list_len_rem, &opt_len, &err_rtn);
+
+                     } else {                                   /* If > 1 src route opt, rtn err (see Note #5).         */
+                         err_rtn = NET_IPv4_ERR_INVALID_OPT_NBR;
+                         opt_err = DEF_YES;
+                     }
+                 } else {                                       /* If opt found AFTER end of opt list, rtn err.         */
+                     err_rtn = NET_IPv4_ERR_INVALID_OPT_END;
+                     opt_err = DEF_YES;
+                 }
+                 break;
+
+
+            case NET_IPv4_HDR_OPT_TS:                           /* --------------------- TS OPTS ---------------------- */
+                 if (opt_list_end == DEF_NO) {
+                     opt_err = NetIPv4_RxPktValidateOptTS(p_buf_hdr, p_opts, opt_list_len_rem, &opt_len, &err_rtn);
+
+                 } else {                                       /* If opt found AFTER end of opt list, rtn err.         */
+                     err_rtn = NET_IPv4_ERR_INVALID_OPT_END;
+                     opt_err = DEF_YES;
+                 }
+                 break;
+                                                                /* --------------- UNSUPPORTED IP OPTS ---------------- */
+                                                                /* See Note #2b.                                        */
+            case NET_IPv4_HDR_OPT_SECURITY:
+            case NET_IPv4_HDR_OPT_SECURITY_EXTENDED:
+            default:                                            /* ------------------- INVALID OPTS ------------------- */
+                 opt_len = *(p_opts + 1);                       /* Ignore unknown opts.                                 */
+                 break;
+        }
+
+        if (opt_err == DEF_NO) {
+            if (opt_list_len_rem >= opt_len) {
+                opt_list_len_rem -= opt_len;
+                p_opts           += opt_len;
+            } else {                                              /* If rem opt list len NOT multiple of opt size, ...  */
+                err_rtn           = NET_IPv4_ERR_INVALID_OPT_LEN; /* ... rtn err.                                       */
+                opt_err           = DEF_YES;
+            }
+        }
+
+        if (opt_err != DEF_NO) {                                  /* If ANY opt errs, tx ICMP err msg.                  */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvOptsCtr);
+#ifdef  NET_ICMPv4_MODULE_EN
+            opt_ix_err = NET_ICMPv4_PTR_IX_IP_OPTS + (opt_list_len_size - opt_list_len_rem);
+            NetICMPv4_TxMsgErr(p_buf,
+                               NET_ICMPv4_MSG_TYPE_PARAM_PROB,
+                               NET_ICMPv4_MSG_CODE_PARAM_PROB_IP_HDR,
+                               opt_ix_err,
+                              &err);
+            *p_err = err_rtn;
+#endif
+            return;
+        }
+    }
+
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv4_RxPktValidateOptRoute()
+*
+* Description : (1) Validate & process Source Route options :
+*
+*                   (a) Convert ALL Source Route IPv4 addresses from network-order to host-order
+*                   (b) Add this host's IPv4 address to Source Route
+*
+*               (2) See 'net_ipv4.h  IPv4 SOURCE ROUTE OPTION DATA TYPE' for Source Route options summary.
+*
+*
+* Argument(s) : p_buf_hdr           Pointer to network buffer header.
+*               ---------           Argument validated in NetIPv4_Rx().
+*
+*               p_opts              Pointer to Source Route option.
+*               -----               Argument validated in NetIPv4_RxPktValidateOpt().
+*
+*               opt_list_len_rem    Remaining option list length (in octets).
+*
+*               p_opt_len           Pointer to variable that will receive the Source Route option length
+*               ---------               (in octets).
+*
+*                                   Argument validated in NetIPv4_RxPktValidateOpt().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               Source Route IPv4 option validated & processed.
+*                               NET_IPv4_ERR_INVALID_OPT_LEN    Invalid IPv4 option length.
+*
+* Return(s)   : DEF_NO,  NO Source Route option error.
+*
+*               DEF_YES, otherwise.
+*
+* Caller(s)   : NetIPv4_RxPktValidateOpt().
+*
+* Note(s)     : (3) If Source Route option appends this host's IPv4 address to the source route, the IPv4
+*                   header check-sum is NOT re-calculated since the check-sum was previously validated
+*                   in NetIPv4_RxPktValidate() & is NOT required for further validation or processing.
+*
+*               (4) Default case already invalidated earlier in this function.  However, the default
+*                   case is included as an extra precaution in case any of the IPv4 receive options is
+*                   incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetIPv4_RxPktValidateOptRoute (NET_BUF_HDR  *p_buf_hdr,
+                                                    CPU_INT08U   *p_opts,
+                                                    CPU_INT08U    opt_list_len_rem,
+                                                    CPU_INT08U   *p_opt_len,
+                                                    NET_ERR      *p_err)
+{
+    NET_IPv4_OPT_SRC_ROUTE  *p_opt_route;
+    NET_IPv4_ADDR            opt_addr;
+    CPU_INT08U               opt_ptr;
+    CPU_INT08U               opt_ix;
+
+
+    p_opt_route = (NET_IPv4_OPT_SRC_ROUTE *)p_opts;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ----------------- VALIDATE OPT TYPE ---------------- */
+    switch (p_opt_route->Type) {
+        case NET_IPv4_HDR_OPT_ROUTE_SRC_LOOSE:
+        case NET_IPv4_HDR_OPT_ROUTE_SRC_STRICT:
+        case NET_IPv4_HDR_OPT_ROUTE_REC:
+             break;
+
+
+        default:
+            *p_err =  NET_IPv4_ERR_INVALID_OPT;
+             return (DEF_YES);
+    }
+#endif
+
+                                                                /* ----------------- VALIDATE OPT LEN ----------------- */
+    if (p_opt_route->Ptr > p_opt_route->Len) {                  /* If ptr exceeds opt len,              rtn err.        */
+       *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+        return (DEF_YES);
+    }
+
+    if (p_opt_route->Len > opt_list_len_rem) {                  /* If opt len exceeds rem opt len,      rtn err.        */
+       *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+        return (DEF_YES);
+    }
+
+    if ((p_opt_route->Len % NET_IPv4_HDR_OPT_SIZE_WORD) != 0u) {    /* If opt len NOT multiple of opt size, rtn err.    */
+       *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+        return (DEF_YES);
+    }
+
+
+    opt_ptr = NET_IPv4_OPT_ROUTE_PTR_ROUTE;
+    opt_ix  = 0u;
+
+                                                                /* --------------- CONVERT TO HOST-ORDER -------------- */
+    while (opt_ptr < p_opt_route->Ptr) {                        /* Convert ALL src route addrs to host-order.           */
+        NET_UTIL_VAL_COPY_GET_NET_32(&opt_addr, &p_opt_route->Route[opt_ix]);
+        NET_UTIL_VAL_COPY_32(&p_opt_route->Route[opt_ix], &opt_addr);
+        opt_ptr += NET_IPv4_HDR_OPT_SIZE_WORD;
+        opt_ix++;
+    }
+
+                                                                /* ------------------- INSERT ROUTE ------------------- */
+    if (p_opt_route->Ptr < p_opt_route->Len) {                  /* If ptr < len, append this host addr to src route.    */
+        switch (*p_opts) {
+            case NET_IPv4_HDR_OPT_ROUTE_SRC_LOOSE:
+            case NET_IPv4_HDR_OPT_ROUTE_REC:
+                 opt_addr         = p_buf_hdr->IP_AddrDest;
+                 NET_UTIL_VAL_COPY_SET_HOST_32(&p_opt_route->Route[opt_ix], &opt_addr);
+                 p_opt_route->Ptr += NET_IPv4_HDR_OPT_SIZE_WORD;
+                 break;
+
+
+            case NET_IPv4_HDR_OPT_ROUTE_SRC_STRICT:
+                 break;
+
+
+            default:                                            /* See Note #4.                                         */
+                *p_err =  NET_IPv4_ERR_INVALID_OPT;
+                 return (DEF_YES);
+        }
+    }
+
+
+   *p_opt_len = p_opt_route->Len;                               /* Rtn src route opt len.                               */
+   *p_err     = NET_IPv4_ERR_NONE;
+
+    return (DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_RxPktValidateOptTS()
+*
+* Description : (1) Validate & process Internet Timestamp options :
+*
+*                   (a) Convert ALL Internet Timestamps & Source Route IPv4 addresses from network-order
+*                           to host-order
+*                   (b) Add current Internet Timestamp & this host's   IPv4 address to Internet Timestamp
+*
+*               (2) See 'net_ipv4.h  IPv4 INTERNET TIMESTAMP OPTION DATA TYPE' for Internet Timestamp options
+*                       summary.
+*
+*
+* Argument(s) : p_buf_hdr           Pointer to network buffer header.
+*               ---------           Argument validated in NetIPv4_Rx().
+*
+*               p_opts              Pointer to Internet Timestamp option.
+*               -----               Argument validated in NetIPv4_RxPktValidateOpt().
+*
+*               opt_list_len_rem    Remaining option list length (in octets).
+*
+*               p_opt_len           Pointer to variable that will return the Internet Timestamp option length
+*               ---------               (in octets).
+*
+*                                   Argument validated in NetIPv4_RxPktValidateOpt().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               Internet Timestamp IPv4 option validated
+*                                                                   & processed.
+*                               NET_IPv4_ERR_INVALID_OPT_LEN    Invalid IPv4 option length.
+*
+* Return(s)   : DEF_NO,  NO Internet Timestamp option error.
+*
+*               DEF_YES, otherwise.
+*
+* Caller(s)   : NetIPv4_RxPktValidateOpt().
+*
+* Note(s)     : (3) If Internet Timestamp option appends the current Internet Timestamp &/or this host's
+*                   IP address to the Internet Timestamp, the IPv4 header check-sum is NOT re-calculated
+*                   since the check-sum was previously validated in NetIPv4_RxPktValidate() & is NOT
+*                   required for further validation or processing.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetIPv4_RxPktValidateOptTS (NET_BUF_HDR  *p_buf_hdr,
+                                                 CPU_INT08U   *p_opts,
+                                                 CPU_INT08U    opt_list_len_rem,
+                                                 CPU_INT08U   *p_opt_len,
+                                                 NET_ERR      *p_err)
+{
+    NET_IPv4_OPT_TS        *p_opt_ts;
+    NET_IPv4_OPT_TS_ROUTE  *p_opt_ts_route;
+    NET_IPv4_ROUTE_TS      *p_route_ts;
+    CPU_INT08U              opt_ptr;
+    CPU_INT08U              opt_ix;
+    CPU_INT08U              opt_ts_flags;
+    CPU_INT08U              opt_ts_ovf;
+    NET_TS                  opt_ts;
+    NET_IPv4_ADDR           opt_addr;
+
+
+    p_opt_ts = (NET_IPv4_OPT_TS *)p_opts;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ----------------- VALIDATE OPT TYPE ---------------- */
+    switch (p_opt_ts->Type) {
+        case NET_IPv4_HDR_OPT_TS:
+             break;
+
+
+        default:
+            *p_err =  NET_IPv4_ERR_INVALID_OPT;
+             return (DEF_YES);
+    }
+#endif
+
+                                                                /* ----------------- VALIDATE OPT LEN ----------------- */
+    if (p_opt_ts->Ptr > p_opt_ts->Len) {                        /* If ptr exceeds opt len,         rtn err.             */
+       *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+        return (DEF_YES);
+    }
+
+    if (p_opt_ts->Len > opt_list_len_rem) {                     /* If opt len exceeds rem opt len, rtn err.             */
+       *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+        return (DEF_YES);
+    }
+
+
+    opt_ptr      = NET_IPv4_OPT_TS_PTR_TS;
+    opt_ix       = 0u;
+    opt_ts_flags = p_opt_ts->Ovf_Flags & NET_IPv4_OPT_TS_FLAG_MASK;
+
+    switch (opt_ts_flags) {
+        case NET_IPv4_OPT_TS_FLAG_TS_ONLY:
+             if ((p_opt_ts->Len % NET_IPv4_HDR_OPT_SIZE_WORD) != 0u) { /* If opt len NOT multiple of opt size, rtn err. */
+                *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+                 return (DEF_YES);
+             }
+
+                                                                /* --------------- CONVERT TO HOST-ORDER -------------- */
+             while (opt_ptr < p_opt_ts->Ptr) {                  /* Convert ALL TS's to host-order.                      */
+                 NET_UTIL_VAL_COPY_GET_NET_32(&opt_ts, &p_opt_ts->TS[opt_ix]);
+                 NET_UTIL_VAL_COPY_32(&p_opt_ts->TS[opt_ix], &opt_ts);
+                 opt_ptr += NET_IPv4_HDR_OPT_SIZE_WORD;
+                 opt_ix++;
+             }
+
+                                                                /* --------------------- INSERT TS -------------------- */
+             if (p_opt_ts->Ptr < p_opt_ts->Len) {               /* If ptr < len, append ts to list.                     */
+                 opt_ts        = NetUtil_TS_Get();
+                 NET_UTIL_VAL_COPY_SET_HOST_32(&p_opt_ts->TS[opt_ix], &opt_ts);
+                 p_opt_ts->Ptr += NET_IPv4_HDR_OPT_SIZE_WORD;
+
+             } else {                                           /* Else inc & chk ovf ctr.                              */
+                 opt_ts_ovf    = p_opt_ts->Ovf_Flags & NET_IPv4_OPT_TS_OVF_MASK;
+                 opt_ts_ovf  >>= NET_IPv4_OPT_TS_OVF_SHIFT;
+                 opt_ts_ovf++;
+
+                 if (opt_ts_ovf > NET_IPv4_OPT_TS_OVF_MAX) {    /* If ovf ctr ovfs, rtn err.                            */
+                    *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+                     return (DEF_YES);
+                 }
+             }
+             break;
+
+
+        case NET_IPv4_OPT_TS_FLAG_TS_ROUTE_REC:
+        case NET_IPv4_OPT_TS_FLAG_TS_ROUTE_SPEC:
+                                                                /* If opt len NOT multiple of opt size, rtn err.        */
+             if ((p_opt_ts->Len % NET_IPv4_OPT_TS_ROUTE_SIZE) != NET_IPv4_HDR_OPT_SIZE_WORD) {
+                *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+                 return (DEF_YES);
+             }
+
+             p_opt_ts_route = (NET_IPv4_OPT_TS_ROUTE *)p_opts;
+             p_route_ts     = &p_opt_ts_route->Route_TS[0];
+
+                                                                /* --------------- CONVERT TO HOST-ORDER -------------- */
+             while (opt_ptr < p_opt_ts_route->Ptr) {            /* Convert ALL src route addrs & ts's to host-order.    */
+                 NET_UTIL_VAL_COPY_GET_NET_32(&opt_addr, &p_route_ts->Route[opt_ix]);
+                 NET_UTIL_VAL_COPY_GET_NET_32(&opt_ts,   &p_route_ts->TS[opt_ix]);
+                 NET_UTIL_VAL_COPY_32(&p_route_ts->Route[opt_ix], &opt_addr);
+                 NET_UTIL_VAL_COPY_32(&p_route_ts->TS[opt_ix],    &opt_ts);
+                 opt_ptr += NET_IPv4_OPT_TS_ROUTE_SIZE;
+                 opt_ix++;
+             }
+
+                                                                /* ---------------- INSERT SRC ROUTE/TS --------------- */
+             if (p_opt_ts_route->Ptr < p_opt_ts_route->Len) {   /* If ptr < len, append src route addr & ts to list.    */
+                 opt_addr            = p_buf_hdr->IP_AddrDest;
+                 opt_ts              = NetUtil_TS_Get();
+                 NET_UTIL_VAL_COPY_SET_HOST_32(&p_route_ts->Route[opt_ix], &opt_addr);
+                 NET_UTIL_VAL_COPY_SET_HOST_32(&p_route_ts->TS[opt_ix],    &opt_ts);
+                 p_opt_ts_route->Ptr += NET_IPv4_OPT_TS_ROUTE_SIZE;
+
+             } else {                                           /* Else inc & chk ovf ctr.                              */
+                 opt_ts_ovf   = p_opt_ts->Ovf_Flags & NET_IPv4_OPT_TS_OVF_MASK;
+                 opt_ts_ovf >>= NET_IPv4_OPT_TS_OVF_SHIFT;
+                 opt_ts_ovf++;
+
+                 if (opt_ts_ovf > NET_IPv4_OPT_TS_OVF_MAX) {    /* If ovf ctr ovfs, rtn err.                            */
+                    *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+                     return (DEF_YES);
+                 }
+             }
+             break;
+
+
+        default:                                                /* If invalid/unknown TS flag, rtn err.                 */
+            *p_err =  NET_IPv4_ERR_INVALID_OPT_FLAG;
+             return (DEF_YES);
+    }
+
+
+   *p_opt_len = p_opt_ts->Len;                                  /* Rtn TS opt len.                                      */
+   *p_err     = NET_IPv4_ERR_NONE;
+
+    return (DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_RxPktFragReasm()
+*
+* Description : (1) Reassemble any IPv4 datagram fragments :
+*
+*                   (a) Determine if received IPv4 packet is a fragment
+*                   (b) Reassemble IPv4 fragments, when possible
+*
+*               (2) (a) Received fragments are reassembled by sorting datagram fragments into fragment lists
+*                       (also known as 'Fragmented Datagrams') grouped by the following IPv4 header fields :
+*
+*                       (1) Source      Address
+*                       (2) Destination Address
+*                       (3) Identification
+*                       (4) Protocol
+*
+*                       See also Note #3a.
+*
+*                   (b) Fragment lists are linked to form a list of Fragment Lists/Fragmented Datagrams.
+*
+*                       (1) In the diagram below, ... :
+*
+*                           (A) The top horizontal row  represents the list of fragment lists.
+*
+*                           (B) Each    vertical column represents the fragments in the same fragment list/
+*                               Fragmented Datagram.
+*
+*                           (C) (1) 'NetIPv4_FragReasmListsHead' points to the head of the Fragment Lists;
+*                               (2) 'NetIPv4_FragReasmListsTail' points to the tail of the Fragment Lists.
+*
+*                           (D) Fragment buffers' 'PrevPrimListPtr' & 'NextPrimListPtr' doubly-link each fragment
+*                               list's head buffer to form the list of Fragment Lists.
+*
+*                           (E) Fragment buffer's 'PrevBufPtr'      & 'NextBufPtr'      doubly-link each fragment
+*                               in a fragment list.
+*
+*                       (2) (A) For each received fragment, all fragment lists are searched in order to insert the
+*                               fragment into the appropriate fragment list--i.e. the fragment list with identical
+*                               fragment list IPv4 header field values (see Note #2a).
+*
+*                           (B) If a received fragment is the first fragment with its specific fragment list IPv4
+*                               header field values, the received fragment starts a new fragment list which is
+*                               added at the tail of the Fragment Lists.
+*
+*                               See also Note #3b2.
+*
+*                           (C) To expedite faster fragment list searches :
+*
+*                               (1) (a) Fragment lists are added             at the tail of the Fragment Lists;
+*                                   (b) Fragment lists are searched starting at the head of the Fragment Lists.
+*
+*                               (2) As fragments are received & processed into fragment lists, older fragment
+*                                   lists migrate to the head of the Fragment Lists.  Once a fragment list is
+*                                   reassembled or discarded, it is removed from the Fragment Lists.
+*
+*                       (3) Fragment buffer size is irrelevant & ignored in the fragment reassembly procedure--
+*                           i.e. the procedure functions correctly regardless of the buffer sizes used for any &
+*                           all received fragments.
+*
+*
+*
+*                                        |                   List of                     |
+*                                        |<----------- Fragmented Datagrams ------------>|
+*                                        |               (see Note #2b1A)                |
+*
+*                               Oldest Fragmented Datagram                    New fragment lists
+*                                   in Fragment Lists                          inserted at tail
+*                                   (see Note #2b2C2)                         (see Note #2b2C1a)
+*
+*                                           |        NextPrimListPtr                  |
+*                                           |       (see Note #2b1D)                  |
+*                                           v                   |                     v
+*                                                               |
+*             ---         Head of        -------       -------  v    -------       -------  (see Note #2b1C2)
+*              ^          Fragment  ---->|     |------>|     |------>|     |------>|     |
+*              |           Lists         |     |       |     |       |     |       |     |       Tail of
+*              |                         |     |<------|     |<------|     |<------|     |<----  Fragment
+*              |     (see Note #2b1C1)   |     |       |     |  ^    |     |       |     |        Lists
+*              |                         |     |       |     |  |    |     |       |     |
+*              |                         -------       -------  |    -------       -------
+*              |                           | ^                  |      | ^
+*              |                           | |       PrevPrimListPtr   | |
+*              |                           v |      (see Note #2b1D)   v |
+*              |                         -------                     -------
+*                                        |     |                     |     |
+*     Fragments in the same              |     |                     |     |
+*      Fragmented Datagram               |     |                     |     |
+*       (see Note #2b1B)                 |     |                     |     |
+*                                        |     |                     |     |        Fragments in a fragment
+*              |                         -------                     -------        list may use different
+*              |                           | ^                         | ^           size network buffers
+*              |           NextBufPtr ---> | | <--- PrevBufPtr         | |             (see Note #2b3)
+*              |        (see Note #2b1E)   v |   (see Note #2b1E)      v |
+*              |                         -------                     -------        The last fragment in a
+*              |                         |     |                     |     |  <--- fragment list may likely
+*              |                         |     |                     |     |       use a smaller buffer size
+*              |                         |     |                     -------
+*              |                         |     |
+*              v                         |     |
+*             ---                        -------
+*
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv4 packet.
+*               -----       Argument checked   in NetIPv4_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIPv4_Rx().
+*
+*               p_ip_hdr    Pointer to received packet's IPv4 header.
+*               --------    Argument checked   in NetIPv4_RxPktValidate().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_RX_FRAG_NONE       Datagram complete; NOT a fragment (see Note #3b1B).
+*
+*                                                               ------- RETURNED BY NetIPv4_RxPktFragListAdd() : --------
+*                                                               ------ RETURNED BY NetIPv4_RxPktFragListInsert() : ------
+*                               NET_IPv4_ERR_RX_FRAG_REASM      Fragments in reassembly progress.
+*                               NET_IPv4_ERR_RX_FRAG_DISCARD    Fragment &/or datagram discarded.
+*                               NET_IPv4_ERR_RX_FRAG_OFFSET     Invalid fragment offset.
+*                               NET_IPv4_ERR_RX_FRAG_SIZE       Invalid fragment size.
+*                               NET_IPv4_ERR_RX_FRAG_LEN_TOT    Invalid fragment   datagram total IPv4 length.
+*
+*                                                               ------ RETURNED BY NetIPv4_RxPktFragListInsert() : ------
+*                               NET_IPv4_ERR_RX_FRAG_COMPLETE   Datagram complete; fragments reassembled (see Note #3b3).
+*                               NET_IPv4_ERR_RX_FRAG_SIZE_TOT   Invalid fragmented datagram total size.
+*
+* Return(s)   : Pointer to reassembled datagram, if fragment reassembly complete.
+*
+*               Pointer to NULL,                 if fragment reassembly in progress.
+*
+*               Pointer to fragment buffer,      for any fragment discard error.
+*
+* Caller(s)   : NetIPv4_Rx().
+*
+* Note(s)     : (3) (a) RFC #791, Section 3.2 'Fragmentation & Reassembly' states that the following IPv4 header
+*                       fields are "used together ... to identify datagram fragments for reassembly" :
+*
+*                       (1) "Internet identification field (ID)", ...
+*                       (2) "source"     address,                 ...
+*                       (3) "destination address", &              ...
+*                       (4) "protocol field".
+*
+*                   (b) RFC #791, Section 3.2 'Fragmentation and Reassembly : An Example Reassembly Procedure'
+*                       states that :
+*
+*                       (1) (A) "If ... both [of the following IPv4 header fields] ... are zero" ... :
+*                               (1) "the fragment offset and" ...
+*                               (2) "the more fragments";     ...
+*
+*                           (B) "Then ... this is a whole datagram ... and the datagram is forwarded to the
+*                                next step in datagram processing."
+*
+*                       (2) "If no other fragment with [identical] buffer identifier[s] is [available] then
+*                            [new] reassembly resources are allocated."
+*
+*                           See also 'NetIPv4_RxPktFragListAdd()  Note #2'.
+*
+*                       (3) When a "fragment [finally] completes the datagram ... then the datagram is sent
+*                           to the next step in datagram processing".
+*
+*               (4) (a) Fragment lists are accessed by :
+*
+*                       (1) NetIPv4_RxPktFragReasm()
+*                       (2) Fragment list's 'TMR->Obj' pointer      during execution of NetIPv4_RxPktFragTimeout()
+*
+*                   (b) Since the primary tasks of the network protocol suite are prevented from running
+*                       concurrently (see 'net.h  Note #3'), it is NOT necessary to protect the shared
+*                       resources of the fragment lists since no asynchronous access from other network
+*                       tasks is possible.
+*********************************************************************************************************
+*/
+
+static  NET_BUF  *NetIPv4_RxPktFragReasm (NET_BUF        *p_buf,
+                                          NET_BUF_HDR    *p_buf_hdr,
+                                          NET_IPv4_HDR   *p_ip_hdr,
+                                          NET_ERR        *p_err)
+{
+    CPU_BOOLEAN     frag;
+    CPU_BOOLEAN     frag_done;
+    CPU_BOOLEAN     ip_flag_frags_more;
+    CPU_INT16U      ip_flags;
+    CPU_INT16U      frag_offset;
+    CPU_INT16U      frag_size;
+    NET_BUF        *p_frag;
+    NET_BUF        *p_frag_list;
+    NET_BUF_HDR    *p_frag_list_buf_hdr;
+    NET_IPv4_HDR   *p_frag_list_ip_hdr;
+
+
+                                                                /* -------------- CHK FRAG REASM REQUIRED ------------- */
+    frag = DEF_NO;
+
+    ip_flags           = p_buf_hdr->IP_Flags_FragOffset & NET_IPv4_HDR_FLAG_MASK;
+    ip_flag_frags_more = DEF_BIT_IS_SET(ip_flags, NET_IPv4_HDR_FLAG_FRAG_MORE);
+    if (ip_flag_frags_more != DEF_NO) {                         /* If 'More Frags' set (see Note #3b1A2), ...           */
+        frag  = DEF_YES;                                        /* ... mark as frag.                                    */
+    }
+
+    frag_offset = (CPU_INT16U)(p_buf_hdr->IP_Flags_FragOffset & NET_IPv4_HDR_FRAG_OFFSET_MASK);
+    if (frag_offset != NET_IPv4_HDR_FRAG_OFFSET_NONE) {         /* If frag offset != 0 (see Note #3b1A1), ...           */
+        frag  = DEF_YES;                                        /* ... mark as frag.                                    */
+    }
+
+    if (frag != DEF_YES) {                                      /* If pkt NOT a frag, ...                               */
+       *p_err  = NET_IPv4_ERR_RX_FRAG_NONE;
+        return (p_buf);                                         /* ... rtn non-frag'd datagram (see Note #3b1B).        */
+    }
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.IPv4.RxFragCtr);
+
+
+                                                                /* ------------------- REASM FRAGS -------------------- */
+    frag_size  = p_buf_hdr->IP_TotLen - p_buf_hdr->IP_HdrLen;
+    p_frag_list = NetIPv4_FragReasmListsHead;
+    frag_done  = DEF_NO;
+
+    while (frag_done == DEF_NO) {                               /* Insert frag into a frag list.                        */
+
+        if (p_frag_list != (NET_BUF *)0) {                      /* Srch ALL existing frag lists first (see Note #2b2A). */
+            p_frag_list_buf_hdr =                 &p_frag_list->Hdr;
+            p_frag_list_ip_hdr  = (NET_IPv4_HDR *)&p_frag_list->DataPtr[p_frag_list_buf_hdr->IP_HdrIx];
+
+                                                                                  /* If frag & this frag list's    ...  */
+            if (p_buf_hdr->IP_AddrSrc    == p_frag_list_buf_hdr->IP_AddrSrc) {    /* ... src  addr (see Note #2a1) ...  */
+                if (p_buf_hdr->IP_AddrDest == p_frag_list_buf_hdr->IP_AddrDest) { /* ... dest addr (see Note #2a2) ...  */
+                    if (p_buf_hdr->IP_ID     == p_frag_list_buf_hdr->IP_ID) {     /* ... ID        (see Note #2a3) ...  */
+                        if (p_ip_hdr->Protocol == p_frag_list_ip_hdr->Protocol) { /* ... protocol  (see Note #2a4) ...  */
+                                                                                  /* ... fields identical,         ...  */
+                            p_frag     = NetIPv4_RxPktFragListInsert(p_buf,       /* ... insert frag into frag list.    */
+                                                                    p_buf_hdr,
+                                                                    ip_flags,
+                                                                    frag_offset,
+                                                                    frag_size,
+                                                                    p_frag_list,
+                                                                    p_err);
+                            frag_done = DEF_YES;
+                        }
+                    }
+                }
+            }
+
+            if (frag_done != DEF_YES) {                         /* If NOT done, adv to next frag list.                  */
+                p_frag_list = p_frag_list_buf_hdr->NextPrimListPtr;
+            }
+
+        } else {                                                /* Else add new frag list (see Note #2b2B).             */
+            p_frag     = NetIPv4_RxPktFragListAdd(p_buf,
+                                                 p_buf_hdr,
+                                                 ip_flags,
+                                                 frag_offset,
+                                                 frag_size,
+                                                 p_err);
+            frag_done = DEF_YES;
+        }
+    }
+
+    return (p_frag);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_RxPktFragListAdd()
+*
+* Description : (1) Add fragment as new fragment list at end of Fragment Lists :
+*
+*                   (a) Get    fragment reassembly timer
+*                   (b) Insert fragment into Fragment Lists
+*                   (c) Update fragment list reassembly calculations
+*
+*
+* Argument(s) : p_buf           Pointer to network buffer that received fragment.
+*               -----           Argument checked   in NetIPv4_Rx().
+*
+*               p_buf_hdr       Pointer to network buffer header.
+*               ---------       Argument validated in NetIPv4_Rx().
+*
+*               frag_ip_flags   Fragment IPv4 header flags.
+*               -------------   Argument validated in NetIPv4_RxPktFragReasm().
+*
+*               frag_offset     Fragment offset.
+*
+*               frag_size       Fragment size (in octets).
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+* Return(s)   : Pointer to NULL,            if fragment added as new fragment list.
+*
+*               Pointer to fragment buffer, for any fragment discard error.
+*
+* Caller(s)   : NetIPv4_RxPktFragReasm().
+*
+* Note(s)     : (2) (a) RFC #791, Section 3.2 'Fragmentation and Reassembly' states that "if an internet
+*                       datagram is fragmented" :
+*
+*                       (1) (A) "Fragments are counted in units of 8 octets."
+*                           (B) "The minimum fragment is 8 octets."
+*
+*                       (2) (A) However, this CANNOT apply "if this is the last fragment" ...
+*                               (1) "(that is the more fragments field is zero)";         ...
+*                           (B) Which may be of ANY size.
+*
+*                       See also 'net_ipv4.h  IPv4 FRAGMENTATION DEFINES  Note #1a'.
+*
+*                   (b) RFC #791, Section 3.2 'Fragmentation and Reassembly : An Example Reassembly Procedure'
+*                       states that "if no other fragment with [identical] buffer identifier[s] is [available]
+*                       then [new] reassembly resources are allocated".
+*
+*               (3) During fragment list insertion, some fragment buffer controls were previously initialized
+*                   in NetBuf_Get() when the packet was received at the network interface layer.  These buffer
+*                   controls do NOT need to be re-initialized but are shown for completeness.
+*********************************************************************************************************
+*/
+
+static  NET_BUF  *NetIPv4_RxPktFragListAdd (NET_BUF           *p_buf,
+                                          NET_BUF_HDR         *p_buf_hdr,
+                                          NET_IPv4_HDR_FLAGS   frag_ip_flags,
+                                          CPU_INT16U           frag_offset,
+                                          CPU_INT16U           frag_size,
+                                          NET_ERR             *p_err)
+{
+    CPU_BOOLEAN    ip_flag_frags_more;
+    CPU_INT16U     frag_size_min;
+    NET_TMR_TICK   timeout_tick;
+    NET_ERR        tmr_err;
+    NET_BUF       *p_frag;
+    NET_BUF_HDR   *p_frag_list_tail_buf_hdr;
+    CPU_SR_ALLOC();
+
+
+                                                                /* ------------------- VALIDATE FRAG ------------------ */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (frag_offset > NET_IPv4_HDR_FRAG_OFFSET_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvFragOffsetCtr);
+       *p_err =  NET_IPv4_ERR_RX_FRAG_OFFSET;
+        return (p_buf);
+    }
+#endif
+
+    ip_flag_frags_more =  DEF_BIT_IS_SET(frag_ip_flags, NET_IPv4_HDR_FLAG_FRAG_MORE);
+    frag_size_min      = (ip_flag_frags_more == DEF_YES) ? NET_IPv4_FRAG_SIZE_MIN_FRAG_MORE
+                                                         : NET_IPv4_FRAG_SIZE_MIN_FRAG_LAST;
+    if (frag_size < frag_size_min) {                            /* See Note #2a.                                        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxFragSizeCtr);
+       *p_err =  NET_IPv4_ERR_RX_FRAG_SIZE;
+        return (p_buf);
+    }
+
+    if (frag_size > NET_IPv4_FRAG_SIZE_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxFragSizeCtr);
+       *p_err =  NET_IPv4_ERR_RX_FRAG_SIZE;
+        return (p_buf);
+    }
+
+
+                                                                /* ------------------- GET FRAG TMR ------------------- */
+    CPU_CRITICAL_ENTER();
+    timeout_tick     = NetIPv4_FragReasmTimeout_tick;
+    CPU_CRITICAL_EXIT();
+    p_buf_hdr->TmrPtr = NetTmr_Get((CPU_FNCT_PTR) NetIPv4_RxPktFragTimeout,
+                                  (void       *) p_buf,
+                                  (NET_TMR_TICK) timeout_tick,
+                                  (CPU_INT16U  ) NET_TMR_FLAG_NONE,
+                                  (NET_ERR    *)&tmr_err);
+    if (tmr_err != NET_TMR_ERR_NONE) {                          /* If tmr unavail, discard frag.                        */
+       *p_err =  NET_IPv4_ERR_RX_FRAG_DISCARD;
+        return (p_buf);
+    }
+
+
+                                                                /* ------------ INSERT FRAG INTO FRAG LISTS ----------- */
+    if (NetIPv4_FragReasmListsTail != (NET_BUF *)0) {           /* If frag lists NOT empty, insert @ tail.              */
+        p_buf_hdr->PrevPrimListPtr                = (NET_BUF     *) NetIPv4_FragReasmListsTail;
+        p_frag_list_tail_buf_hdr                  = (NET_BUF_HDR *)&NetIPv4_FragReasmListsTail->Hdr;
+        p_frag_list_tail_buf_hdr->NextPrimListPtr = (NET_BUF     *) p_buf;
+        NetIPv4_FragReasmListsTail               = (NET_BUF     *) p_buf;
+
+    } else {                                                    /* Else add frag as first frag list.                    */
+        NetIPv4_FragReasmListsHead               = (NET_BUF     *) p_buf;
+        NetIPv4_FragReasmListsTail               = (NET_BUF     *) p_buf;
+        p_buf_hdr->PrevPrimListPtr                = (NET_BUF     *) 0;
+    }
+
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #3].                */
+    p_buf_hdr->NextPrimListPtr = (NET_BUF *)0;
+    p_buf_hdr->PrevBufPtr      = (NET_BUF *)0;
+    p_buf_hdr->NextBufPtr      = (NET_BUF *)0;
+    p_buf_hdr->IP_FragSizeTot  =  NET_IPv4_FRAG_SIZE_NONE;
+    p_buf_hdr->IP_FragSizeCur  =  0u;
+#endif
+
+
+                                                                /* ----------------- UPDATE FRAG CALCS ---------------- */
+    NetIPv4_RxPktFragListUpdate(p_buf,
+                                p_buf_hdr,
+                                frag_ip_flags,
+                                frag_offset,
+                                frag_size,
+                                p_err);
+    if (*p_err !=  NET_IPv4_ERR_NONE) {
+         return ((NET_BUF *)0);
+    }
+
+
+   *p_err  =  NET_IPv4_ERR_RX_FRAG_REASM;
+    p_frag = (NET_BUF *)0;
+
+    return (p_frag);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_RxPktFragListInsert()
+*
+* Description : Insert fragment into corresponding fragment list.
+*
+*               (1) (a) Fragments are sorted into fragment lists by fragment offset.
+*
+*                       See Notes #2a3 & #2b3.
+*
+*                   (b) Although RFC #791, Section 3.2 'Fragmentation and Reassembly : An Example Reassembly
+*                       Procedure' states that "in the case that two or more fragments contain the same data
+*                       either identically or through a partial overlap ... [the IP fragmentation reassembly
+*                       algorithm should] use the more recently arrived copy in the data buffer and datagram
+*                       delivered"; in order to avoid the complexity of sequencing received fragments with
+*                       duplicate data that overlap multiple previously-received fragments' data, duplicate
+*                       & overlap fragments are discarded :
+*
+*                       (1) Duplicate fragments are discarded.  A fragment is a duplicate of a fragment already
+*                           in the fragment list if both fragments have identical fragment offset & size values.
+*
+*                       (2) Overlap fragments are discarded & the entire Fragmented Datagram is also discarded.
+*                           A fragment is an overlap fragment if any portion of its fragment data overlaps any
+*                           other fragment's data :
+*
+*                           (A) [Fragment offset]  <  [(Any other fragment offset * FRAG_OFFSET_SIZE) +
+*                                                       Any other fragment size                       ]
+*
+*                           (B) [(Fragment offset * FRAG_OFFSET_SIZE) + Fragment size]  >  [Any other fragment offset]
+*
+*
+*                       See also 'net_tcp.c  NetTCP_RxPktConnHandlerRxQ_Conn()  Note #2a3'.
+*
+*
+* Argument(s) : p_buf           Pointer to network buffer that received fragment.
+*               ----            Argument checked   in NetIPv4_Rx().
+*
+*               p_buf_hdr       Pointer to network buffer header.
+*               ---------       Argument validated in NetIPv4_Rx().
+*
+*               frag_ip_flags   Fragment IPv4 header flags.
+*               --------------  Argument validated in NetIPv4_RxPktFragReasm().
+*
+*               frag_offset     Fragment offset.
+*
+*               frag_size       Fragment size (in octets).
+*
+*               p_frag_list     Pointer to fragment list head buffer.
+*               -----------     Argument validated in NetIPv4_RxPktFragReasm().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_RX_FRAG_REASM      Fragment reassembly in progress.
+*                               NET_IPv4_ERR_RX_FRAG_DISCARD    Fragment discarded.
+*                               NET_IPv4_ERR_RX_FRAG_OFFSET     Invalid  fragment offset.
+*                               NET_IPv4_ERR_RX_FRAG_SIZE       Invalid  fragment size.
+*
+*                                                               -- RETURNED BY NetIPv4_RxPktFragListChkComplete() : -
+*                               NET_IPv4_ERR_RX_FRAG_COMPLETE   Datagram complete; fragments reassembled.
+*                               NET_IPv4_ERR_RX_FRAG_SIZE_TOT   Invalid fragmented datagram total size.
+*
+*                                                               --- RETURNED BY NetIPv4_RxPktFragListUpdate() : ---
+*                                                               - RETURNED BY NetIPv4_RxPktFragListChkComplete() : -
+*                               NET_IPv4_ERR_RX_FRAG_LEN_TOT    Invalid fragment   datagram total IPv4 length.
+*
+* Return(s)   : Pointer to reassembled datagram, if fragment reassembly complete.
+*
+*               Pointer to NULL,                 if fragment reassembly in progress.
+*
+*               Pointer to fragment buffer,      for any fragment discard error.
+*
+* Caller(s)   : NetIPv4_RxPktFragReasm().
+*
+* Note(s)     : (2) (a) RFC #791, Section 3.2 'Fragmentation and Reassembly' states that "if an internet
+*                       datagram is fragmented" :
+*
+*                       (1) (A) (1) "Fragments are counted in units of 8 octets."
+*                               (2) "The minimum fragment is 8 octets."
+*
+*                           (B) (1) However, this CANNOT apply "if this is the last fragment" ...
+*                                   (a) "(that is the more fragments field is zero)";         ...
+*                               (2) Which may be of ANY size.
+*
+*                           See also 'net_ipv4.h  IPv4 FRAGMENTATION DEFINES  Note #1a'.
+*
+*                       (2) "Fragments ... data portion must be ... on 8 octet boundaries."
+*
+*                       (3) "The Fragment Offset field identifies the fragment location, relative to the
+*                            beginning of the original unfragmented datagram."
+*
+*                   (b) RFC #791, Section 3.2 'Fragmentation and Reassembly : An Example Reassembly Procedure'
+*                       states that :
+*
+*                       (1) (A) "If this is the first fragment"              ...
+*                               (1) "(that is the fragment offset is zero)", ...
+*                           (B) "this header is placed in the header buffer."
+*
+*                       (2) "Some [IP] options are copied [in every fragment], but others remain with
+*                            the first fragment only."
+*
+*                       (3) "The data from the fragment is placed in the data buffer according to its
+*                            fragment offset and length."
+*
+*                            See also Note #2a3.
+*
+*               (3) Assumes ALL fragments in fragment lists have previously been validated for buffer &
+*                   IPv4 header fields.
+*
+*               (4) During fragment list insertion, some fragment buffer controls were previously
+*                   initialized in NetBuf_Get() when the packet was received at the network interface
+*                   layer.  These buffer controls do NOT need to be re-initialized but are shown for
+*                   completeness.
+*********************************************************************************************************
+*/
+
+static  NET_BUF  *NetIPv4_RxPktFragListInsert (NET_BUF             *p_buf,
+                                               NET_BUF_HDR         *p_buf_hdr,
+                                               NET_IPv4_HDR_FLAGS   frag_ip_flags,
+                                               CPU_INT16U           frag_offset,
+                                               CPU_INT16U           frag_size,
+                                               NET_BUF             *p_frag_list,
+                                               NET_ERR             *p_err)
+{
+    CPU_BOOLEAN   ip_flag_frags_more;
+    CPU_BOOLEAN   frag_insert_done;
+    CPU_BOOLEAN   frag_list_discard;
+    CPU_INT16U    frag_offset_actual;
+    CPU_INT16U    frag_list_cur_frag_offset;
+    CPU_INT16U    frag_list_cur_frag_offset_actual;
+    CPU_INT16U    frag_list_prev_frag_offset;
+    CPU_INT16U    frag_list_prev_frag_offset_actual;
+    CPU_INT16U    frag_size_min;
+    CPU_INT16U    frag_size_cur;
+    NET_BUF      *p_frag;
+    NET_BUF      *p_frag_list_prev_buf;
+    NET_BUF      *p_frag_list_cur_buf;
+    NET_BUF      *p_frag_list_prev_list;
+    NET_BUF      *p_frag_list_next_list;
+    NET_BUF_HDR  *p_frag_list_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_prev_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_cur_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_prev_list_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_next_list_buf_hdr;
+    NET_TMR      *p_tmr;
+    NET_ERR       err;
+
+
+                                                                /* ------------------- VALIDATE FRAG ------------------ */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (frag_offset > NET_IPv4_HDR_FRAG_OFFSET_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvFragOffsetCtr);
+       *p_err =  NET_IPv4_ERR_RX_FRAG_OFFSET;
+        return (p_buf);
+    }
+#endif
+
+    ip_flag_frags_more =  DEF_BIT_IS_SET(frag_ip_flags, NET_IPv4_HDR_FLAG_FRAG_MORE);
+    frag_size_min      = (ip_flag_frags_more == DEF_YES) ? NET_IPv4_FRAG_SIZE_MIN_FRAG_MORE
+                                                         : NET_IPv4_FRAG_SIZE_MIN_FRAG_LAST;
+    if (frag_size < frag_size_min) {                            /* See Note #2a1.                                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxFragSizeCtr);
+       *p_err =  NET_IPv4_ERR_RX_FRAG_SIZE;
+        return (p_buf);
+    }
+
+    if (frag_size > NET_IPv4_FRAG_SIZE_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxFragSizeCtr);
+       *p_err =  NET_IPv4_ERR_RX_FRAG_SIZE;
+        return (p_buf);
+    }
+
+
+                                                                        /* ------- INSERT FRAG INTO FRAG LISTS -------- */
+    frag_insert_done       =  DEF_NO;
+
+    p_frag_list_cur_buf     =  p_frag_list;
+    p_frag_list_cur_buf_hdr = &p_frag_list_cur_buf->Hdr;
+
+    while (frag_insert_done == DEF_NO) {
+
+        frag_list_cur_frag_offset = (CPU_INT16U)(p_frag_list_cur_buf_hdr->IP_Flags_FragOffset & NET_IPv4_HDR_FRAG_OFFSET_MASK);
+        if (frag_offset > frag_list_cur_frag_offset) {                  /* While frag offset > cur frag offset, ...     */
+
+            if (p_frag_list_cur_buf_hdr->NextBufPtr != (NET_BUF *)0) {   /* ... adv to next frag in list.                */
+                p_frag_list_cur_buf     =  p_frag_list_cur_buf_hdr->NextBufPtr;
+                p_frag_list_cur_buf_hdr = &p_frag_list_cur_buf->Hdr;
+
+            } else {                                                    /* If @ last frag in list, append frag @ end.   */
+                frag_offset_actual               =   frag_offset                      * NET_IPv4_FRAG_SIZE_UNIT;
+                frag_list_cur_frag_offset_actual = ( frag_list_cur_frag_offset        * NET_IPv4_FRAG_SIZE_UNIT          )
+                                                 + (p_frag_list_cur_buf_hdr->IP_TotLen - p_frag_list_cur_buf_hdr->IP_HdrLen);
+
+                if (frag_offset_actual >= frag_list_cur_frag_offset_actual) {   /* If frag does NOT overlap, ...        */
+                                                                                /* ... append @ end of frag list.       */
+                    p_buf_hdr->PrevBufPtr               = (NET_BUF *)p_frag_list_cur_buf;
+#if 0                                                                   /* Init'd in NetBuf_Get() [see Note #4].        */
+                    p_buf_hdr->NextBufPtr               = (NET_BUF *)0;
+                    p_buf_hdr->PrevPrimListPtr          = (NET_BUF *)0;
+                    p_buf_hdr->NextPrimListPtr          = (NET_BUF *)0;
+                    p_buf_hdr->TmrPtr                   = (NET_TMR *)0;
+                    p_buf_hdr->IP_FragSizeTot           =  NET_IPv4_FRAG_SIZE_NONE;
+                    p_buf_hdr->IP_FragSizeCur           =  0u;
+#endif
+
+                    p_frag_list_cur_buf_hdr->NextBufPtr = (NET_BUF *)p_buf;
+
+
+                    p_frag_list_buf_hdr = &p_frag_list->Hdr;
+                    NetIPv4_RxPktFragListUpdate(p_frag_list,             /* Update frag list reasm calcs.                */
+                                                p_frag_list_buf_hdr,
+                                                frag_ip_flags,
+                                                frag_offset,
+                                                frag_size,
+                                                p_err);
+                    if (*p_err !=  NET_IPv4_ERR_NONE) {
+                         return ((NET_BUF *)0);
+                    }
+                                                                        /* Chk    frag list reasm complete.             */
+                    p_frag = NetIPv4_RxPktFragListChkComplete(p_frag_list,
+                                                             p_frag_list_buf_hdr,
+                                                             p_err);
+
+                } else {                                                /* Else discard overlap frag & datagram.        */
+                    NetIPv4_RxPktFragListDiscard(p_frag_list, DEF_YES, &err);
+                    NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxFragDisCtr);
+                    p_frag = p_buf;
+                   *p_err  = NET_IPv4_ERR_RX_FRAG_DISCARD;
+                }
+
+                frag_insert_done = DEF_YES;
+            }
+
+
+        } else if (frag_offset < frag_list_cur_frag_offset) {           /* If frag offset < cur frag offset, ...        */
+                                                                        /* ... insert frag into frag list.              */
+            frag_list_discard                =  DEF_NO;
+
+            frag_offset_actual               = (frag_offset               * NET_IPv4_FRAG_SIZE_UNIT) + frag_size;
+            frag_list_cur_frag_offset_actual =  frag_list_cur_frag_offset * NET_IPv4_FRAG_SIZE_UNIT;
+
+            if (frag_offset_actual > frag_list_cur_frag_offset_actual) {/* If frag overlaps with next frag, ...         */
+                frag_list_discard  = DEF_YES;                           /* ... discard frag & datagram (see Note #1b2). */
+
+            } else if (p_frag_list_cur_buf_hdr->PrevBufPtr != (NET_BUF *)0) {
+                p_frag_list_prev_buf               =  p_frag_list_cur_buf_hdr->PrevBufPtr;
+                p_frag_list_prev_buf_hdr           = &p_frag_list_prev_buf->Hdr;
+
+                frag_offset_actual                =   frag_offset * NET_IPv4_FRAG_SIZE_UNIT;
+
+                frag_list_prev_frag_offset        =  p_frag_list_prev_buf_hdr->IP_Flags_FragOffset & NET_IPv4_HDR_FRAG_OFFSET_MASK;
+                frag_list_prev_frag_offset_actual = ( frag_list_prev_frag_offset        * NET_IPv4_FRAG_SIZE_UNIT             )
+                                                  + (p_frag_list_prev_buf_hdr->IP_TotLen - p_frag_list_prev_buf_hdr->IP_HdrLen);
+                                                                        /* If frag overlaps with prev frag, ...         */
+                if (frag_offset_actual < frag_list_prev_frag_offset_actual) {
+                    frag_list_discard  = DEF_YES;                       /* ... discard frag & datagram (see Note #1b2). */
+                }
+            } else {
+                ;
+            }
+
+            if (frag_list_discard == DEF_NO) {                          /* If frag does NOT overlap, ...                */
+                                                                        /* ... insert into frag list.                   */
+                p_buf_hdr->PrevBufPtr = p_frag_list_cur_buf_hdr->PrevBufPtr;
+                p_buf_hdr->NextBufPtr = p_frag_list_cur_buf;
+
+                if (p_buf_hdr->PrevBufPtr != (NET_BUF *)0) {            /* Insert p_buf between prev & cur bufs.         */
+                    p_frag_list_prev_buf                     =  p_buf_hdr->PrevBufPtr;
+                    p_frag_list_prev_buf_hdr                 = &p_frag_list_prev_buf->Hdr;
+
+                    p_frag_list_prev_buf_hdr->NextBufPtr     =  p_buf;
+                    p_frag_list_cur_buf_hdr->PrevBufPtr      =  p_buf;
+
+#if 0                                                                   /* Init'd in NetBuf_Get() [see Note #4].        */
+                    p_buf_hdr->PrevPrimListPtr               = (NET_BUF *)0;
+                    p_buf_hdr->NextPrimListPtr               = (NET_BUF *)0;
+                    p_buf_hdr->TmrPtr                        = (NET_TMR *)0;
+                    p_buf_hdr->IP_FragSizeTot                =  NET_IPv4_FRAG_SIZE_NONE;
+                    p_buf_hdr->IP_FragSizeCur                =  0u;
+#endif
+
+                } else {                                                /* Else p_buf is new frag list head.             */
+                    p_frag_list                              =  p_buf;
+                                                                        /* Move frag list head info to cur buf ...      */
+                                                                        /* ... (see Note #2b1).                         */
+                    p_buf_hdr->PrevPrimListPtr               =  p_frag_list_cur_buf_hdr->PrevPrimListPtr;
+                    p_buf_hdr->NextPrimListPtr               =  p_frag_list_cur_buf_hdr->NextPrimListPtr;
+                    p_buf_hdr->TmrPtr                        =  p_frag_list_cur_buf_hdr->TmrPtr;
+                    p_buf_hdr->IP_FragSizeTot                =  p_frag_list_cur_buf_hdr->IP_FragSizeTot;
+                    p_buf_hdr->IP_FragSizeCur                =  p_frag_list_cur_buf_hdr->IP_FragSizeCur;
+
+                    p_frag_list_cur_buf_hdr->PrevBufPtr      = (NET_BUF *)p_buf;
+                    p_frag_list_cur_buf_hdr->PrevPrimListPtr = (NET_BUF *)0;
+                    p_frag_list_cur_buf_hdr->NextPrimListPtr = (NET_BUF *)0;
+                    p_frag_list_cur_buf_hdr->TmrPtr          = (NET_TMR *)0;
+                    p_frag_list_cur_buf_hdr->IP_FragSizeTot  =  NET_IPv4_FRAG_SIZE_NONE;
+                    p_frag_list_cur_buf_hdr->IP_FragSizeCur  =  0u;
+
+                                                                        /* Point tmr            to new frag list head.  */
+                    p_tmr                                    = (NET_TMR *)p_buf_hdr->TmrPtr;
+                    p_tmr->Obj                               = (void    *)p_buf;
+
+                                                                        /* Point prev frag list to new frag list head.  */
+                    p_frag_list_prev_list = p_buf_hdr->PrevPrimListPtr;
+                    if (p_frag_list_prev_list != (NET_BUF *)0) {
+                        p_frag_list_prev_list_buf_hdr                  = &p_frag_list_prev_list->Hdr;
+                        p_frag_list_prev_list_buf_hdr->NextPrimListPtr =  p_buf;
+                    } else {
+                        NetIPv4_FragReasmListsHead                    =  p_buf;
+                    }
+
+                                                                        /* Point next frag list to new frag list head.  */
+                    p_frag_list_next_list = p_buf_hdr->NextPrimListPtr;
+                    if (p_frag_list_next_list != (NET_BUF *)0) {
+                        p_frag_list_next_list_buf_hdr                  = &p_frag_list_next_list->Hdr;
+                        p_frag_list_next_list_buf_hdr->PrevPrimListPtr =  p_buf;
+                    } else {
+                        NetIPv4_FragReasmListsTail                    =  p_buf;
+                    }
+                }
+
+                p_frag_list_buf_hdr = &p_frag_list->Hdr;
+                NetIPv4_RxPktFragListUpdate(p_frag_list,                 /* Update frag list reasm calcs.                */
+                                            p_frag_list_buf_hdr,
+                                            frag_ip_flags,
+                                            frag_offset,
+                                            frag_size,
+                                            p_err);
+                if (*p_err !=  NET_IPv4_ERR_NONE) {
+                     return ((NET_BUF *)0);
+                }
+                                                                         /* Chk    frag list reasm complete.             */
+                p_frag = NetIPv4_RxPktFragListChkComplete(p_frag_list,
+                                                         p_frag_list_buf_hdr,
+                                                         p_err);
+
+            } else {                                                     /* Else discard overlap frag & datagram ...     */
+                NetIPv4_RxPktFragListDiscard(p_frag_list, DEF_YES, &err);/* ... (see Note #1b2).                         */
+                NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxFragDisCtr);
+                p_frag = p_buf;
+               *p_err  = NET_IPv4_ERR_RX_FRAG_DISCARD;
+            }
+
+            frag_insert_done = DEF_YES;
+
+        } else {                                                         /* Else if frag offset = cur frag offset, ...   */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxFragDisCtr);
+            p_frag = p_buf;
+           *p_err  = NET_IPv4_ERR_RX_FRAG_DISCARD;                       /* ... discard duplicate frag (see Note #1b1).  */
+
+            frag_size_cur  = p_frag_list_cur_buf_hdr->IP_TotLen - p_frag_list_cur_buf_hdr->IP_HdrLen;
+            if (frag_size != frag_size_cur) {                            /* If frag size != cur frag size,    ...        */
+                NetIPv4_RxPktFragListDiscard(p_frag_list, DEF_YES, &err);/* ... discard overlap frag datagram ...        */
+                                                                         /* ... (see Note #1b2).                         */
+            }
+
+            frag_insert_done = DEF_YES;
+        }
+    }
+
+    return (p_frag);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_RxPktFragListRemove()
+*
+* Description : (1) Remove fragment list from Fragment Lists :
+*
+*                   (a) Free   fragment reassembly timer
+*                   (b) Remove fragment list from Fragment Lists
+*                   (c) Clear  buffer's fragment pointers
+*
+*
+* Argument(s) : p_frag_list     Pointer to fragment list head buffer.
+*               -----------     Argument validated in NetIPv4_RxPktFragListDiscard(),
+*                                                     NetIPv4_RxPktFragListChkComplete().
+*
+*               tmr_free        Indicate whether to free network timer :
+*
+*                                   DEF_YES            Free network timer for fragment list discard.
+*                                   DEF_NO      Do NOT free network timer for fragment list discard
+*                                                   [Freed by  NetTmr_TaskHandler()
+*                                                          via NetIPv4_RxPktFragListDiscard()].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_RxPktFragListChkComplete(),
+*               NetIPv4_RxPktFragListDiscard().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_RxPktFragListRemove (NET_BUF      *p_frag_list,
+                                           CPU_BOOLEAN   tmr_free)
+{
+    NET_BUF      *p_frag_list_prev_list;
+    NET_BUF      *p_frag_list_next_list;
+    NET_BUF_HDR  *p_frag_list_prev_list_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_next_list_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_buf_hdr;
+    NET_TMR      *p_tmr;
+
+
+    p_frag_list_buf_hdr = &p_frag_list->Hdr;
+
+                                                                /* ------------------ FREE FRAG TMR ------------------- */
+    if (tmr_free == DEF_YES) {
+        p_tmr = p_frag_list_buf_hdr->TmrPtr;
+        if (p_tmr != (NET_TMR *)0) {
+            NetTmr_Free(p_tmr);
+        }
+    }
+
+                                                                /* --------- REMOVE FRAG LIST FROM FRAG LISTS --------- */
+    p_frag_list_prev_list = p_frag_list_buf_hdr->PrevPrimListPtr;
+    p_frag_list_next_list = p_frag_list_buf_hdr->NextPrimListPtr;
+
+                                                                /* Point prev frag list to next frag list.              */
+    if (p_frag_list_prev_list != (NET_BUF *)0) {
+        p_frag_list_prev_list_buf_hdr                  = &p_frag_list_prev_list->Hdr;
+        p_frag_list_prev_list_buf_hdr->NextPrimListPtr =  p_frag_list_next_list;
+    } else {
+        NetIPv4_FragReasmListsHead                    =  p_frag_list_next_list;
+    }
+
+                                                                /* Point next frag list to prev frag list.              */
+    if (p_frag_list_next_list != (NET_BUF *)0) {
+        p_frag_list_next_list_buf_hdr                  = &p_frag_list_next_list->Hdr;
+        p_frag_list_next_list_buf_hdr->PrevPrimListPtr =  p_frag_list_prev_list;
+    } else {
+        NetIPv4_FragReasmListsTail                    =  p_frag_list_prev_list;
+    }
+
+                                                                /* ---------------- CLR BUF FRAG PTRS ----------------- */
+    p_frag_list_buf_hdr->PrevPrimListPtr = (NET_BUF *)0;
+    p_frag_list_buf_hdr->NextPrimListPtr = (NET_BUF *)0;
+    p_frag_list_buf_hdr->TmrPtr          = (NET_TMR *)0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv4_RxPktFragListDiscard()
+*
+* Description : Discard fragment list from Fragment Lists.
+*
+* Argument(s) : p_frag_list     Pointer to fragment list head buffer.
+*               -----------     Argument validated in NetIPv4_RxPktFragListInsert(),
+*                                                     NetIPv4_RxPktFragListChkComplete(),
+*                                                     NetIPv4_RxPktFragListDiscard().
+*
+*               tmr_free        Indicate whether to free network timer :
+*
+*                                   DEF_YES            Free network timer for fragment list discard.
+*                                   DEF_NO      Do NOT free network timer for fragment list discard
+*                                                   [Freed by NetTmr_TaskHandler()].
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_RX_FRAG_DISCARD      Fragment list discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_RxPktFragListChkComplete(),
+*               NetIPv4_RxPktFragListInsert(),
+*               NetIPv4_RxPktFragListUpdate(),
+*               NetIPv4_RxPktFragTimeout().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_RxPktFragListDiscard (NET_BUF      *p_frag_list,
+                                            CPU_BOOLEAN   tmr_free,
+                                            NET_ERR      *p_err)
+{
+    NET_ERR  err;
+
+
+    NetIPv4_RxPktFragListRemove(p_frag_list, tmr_free);                  /* Remove frag list from Frag Lists.            */
+    NetIPv4_RxPktDiscard(p_frag_list, &err);                             /* Discard every frag buf in frag list.         */
+
+    NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxFragDgramDisCtr); /* Inc discarded frag'd datagram ctr.           */
+
+   *p_err = NET_IPv4_ERR_RX_FRAG_DISCARD;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_RxPktFragListUpdate()
+*
+* Description : Update fragment list reassembly calculations.
+*
+* Argument(s) : p_frag_list_buf_hdr     Pointer to fragment list head buffer's header.
+*               -------------------     Argument validated in NetIPv4_RxPktFragListAdd(),
+*                                                             NetIPv4_RxPktFragListInsert().
+*
+*               frag_ip_flags           Fragment IPv4 header flags.
+*               --------------          Argument validated in NetIPv4_RxPktFragListAdd(),
+*                                                             NetIPv4_RxPktFragListInsert().
+*
+*               frag_offset             Fragment offset.
+*               ------------            Argument validated in NetIPv4_RxPktFragListAdd(),
+*                                                             NetIPv4_RxPktFragListInsert().
+*
+*               frag_size               Fragment size (in octets).
+*               ----------              Argument validated in NetIPv4_RxPktFragListAdd(),
+*                                                             NetIPv4_RxPktFragListInsert().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               Fragment list reassembly calculations
+*                                                                   successfully updated.
+*                               NET_IPv4_ERR_RX_FRAG_LEN_TOT    Invalid fragment datagram total IP length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_RxPktFragListAdd(),
+*               NetIPv4_RxPktFragListInsert().
+*
+* Note(s)     : (1) (a) RFC #791, Section 3.2 'Fragmentation and Reassembly' states that "fragments ... data
+*                       portion ... allows" up to :
+*
+*                       (1) "2**13 = 8192 fragments" ...
+*                       (2) "of 8 octets each"       ...
+*                       (3) "for a total of 65,536 [sic] octets."
+*
+*                   (b) RFC #791, Section 3.2 'Fragmentation and Reassembly : An Example Reassembly Procedure'
+*                       states that :
+*
+*                       (1) "If this is the last fragment"                    ...
+*                           (A) "(that is the more fragments field is zero)"; ...
+*
+*                       (2) "The total data length is computed."
+*
+*               (2) To avoid possible integer arithmetic overflow, the fragmentation arithmetic result MUST
+*                   be declared as an integer data type with a greater resolution -- i.e. greater number of
+*                   bits -- than the fragmentation arithmetic operands' data type(s).
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_RxPktFragListUpdate (NET_BUF             *p_frag_list,
+                                           NET_BUF_HDR         *p_frag_list_buf_hdr,
+                                           NET_IPv4_HDR_FLAGS   frag_ip_flags,
+                                           CPU_INT16U           frag_offset,
+                                           CPU_INT16U           frag_size,
+                                           NET_ERR             *p_err)
+{
+    CPU_INT32U   frag_size_tot;                                     /* See Note #2.                                     */
+    CPU_BOOLEAN  ip_flag_frags_more;
+    NET_ERR      err;
+
+
+    p_frag_list_buf_hdr->IP_FragSizeCur += frag_size;
+    ip_flag_frags_more                  = DEF_BIT_IS_SET(frag_ip_flags, NET_IPv4_HDR_FLAG_FRAG_MORE);
+    if (ip_flag_frags_more != DEF_YES) {                            /* If 'More Frags' NOT set (see Note #1b1A), ...    */
+                                                                    /* ... calc frag tot size  (see Note #1b2).         */
+        frag_size_tot = ((CPU_INT32U)frag_offset * NET_IPv4_FRAG_SIZE_UNIT) + (CPU_INT32U)frag_size;
+        if (frag_size_tot > NET_IPv4_TOT_LEN_MAX) {                 /* If frag tot size > IP tot len max, ...           */
+            NetIPv4_RxPktFragListDiscard(p_frag_list, DEF_YES, &err);/* ... discard ovf'd frag datagram (see Note #1a3). */
+           *p_err = NET_IPv4_ERR_RX_FRAG_LEN_TOT;
+            return;
+        }
+
+        p_frag_list_buf_hdr->IP_FragSizeTot = (CPU_INT16U)frag_size_tot;
+    }
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetIPv4_RxPktFragListChkComplete()
+*
+* Description : Check if fragment list complete; i.e. fragmented datagram reassembled.
+*
+* Argument(s) : p_frag_list              Pointer to fragment list head buffer.
+*               -----------              Argument validated in NetIPv4_RxPktFragListInsert().
+*
+*               p_frag_list_buf_hdr      Pointer to fragment list head buffer's header.
+*               -------------------      Argument validated in NetIPv4_RxPktFragListInsert().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_RX_FRAG_COMPLETE   Datagram complete; fragments reassembled.
+*                               NET_IPv4_ERR_RX_FRAG_REASM      Fragments in reassembly progress.
+*                               NET_IPv4_ERR_RX_FRAG_SIZE_TOT   Invalid fragmented datagram total size.
+*                               NET_IPv4_ERR_RX_FRAG_LEN_TOT    Invalid fragment   datagram total IPv4 length.
+*
+*                                                               - RETURNED BY NetIPv4_RxPktFragListDiscard() : -
+*                               NET_IPv4_ERR_RX_FRAG_DISCARD    Fragment list discarded.
+*
+* Return(s)   : Pointer to reassembled datagram, if fragment reassembly complete.
+*
+*               Pointer to NULL,                 if fragment reassembly in progress.
+*                                                   OR
+*                                                for any fragment discard error.
+*
+* Caller(s)   : NetIPv4_RxPktFragListInsert().
+*
+* Note(s)     : (1) (a) RFC #791, Section 3.2 'Fragmentation and Reassembly' states that :
+*
+*                       (1) "Fragments ... data portion ... allows" up to :
+*                           (A) "2**13 = 8192 fragments" ...
+*                           (B) "of 8 octets each"       ...
+*                           (C) "for a total of 65,536 [sic] octets."
+*
+*                       (2) "The header is counted in the total length and not in the fragments."
+*
+*                   (b) RFC #791, Section 3.2 'Fragmentation and Reassembly : An Example Reassembly
+*                       Procedure' states that :
+*
+*                       (1) "If this fragment completes the datagram ... then the datagram is sent to
+*                            the next step in datagram processing."
+*
+*                       (2) "Otherwise the timer is set to" :
+*                           (A) "the maximum of the current timer value" ...
+*                           (B) "and the value of the time to live field from this fragment."
+*                               (1) However, since IP headers' Time-To-Live (TTL) field does NOT
+*                                   directly correlate to a specific timeout value in seconds, this
+*                                   requirement is NOT implemented. #### NET-803
+*
+*               (2) To avoid possible integer arithmetic overflow, the fragmentation arithmetic result
+*                   MUST be declared as an integer data type with a greater resolution -- i.e. greater
+*                   number of bits -- than the fragmentation arithmetic operands' data type(s).
+*********************************************************************************************************
+*/
+
+static  NET_BUF  *NetIPv4_RxPktFragListChkComplete (NET_BUF      *p_frag_list,
+                                                    NET_BUF_HDR  *p_frag_list_buf_hdr,
+                                                    NET_ERR      *p_err)
+{
+    NET_BUF       *p_frag;
+    CPU_INT32U     frag_tot_len;                                     /* See Note #2.                                     */
+    NET_TMR_TICK   timeout_tick;
+    NET_ERR        err;
+    CPU_SR_ALLOC();
+
+                                                                     /* If tot frag size complete, ...                   */
+    if (p_frag_list_buf_hdr->IP_FragSizeCur == p_frag_list_buf_hdr->IP_FragSizeTot) {
+                                                                     /* Calc frag IPv4 tot len (see Note #1a2).          */
+        frag_tot_len = (CPU_INT32U)p_frag_list_buf_hdr->IP_HdrLen + (CPU_INT32U)p_frag_list_buf_hdr->IP_FragSizeTot;
+        if (frag_tot_len > NET_IPv4_TOT_LEN_MAX) {                   /* If tot frag len > IPv4 tot len max, ...          */
+            NetIPv4_RxPktFragListDiscard(p_frag_list, DEF_YES, &err);/* ... discard ovf'd frag datagram (see Note #1a1C).*/
+           *p_err =   NET_IPv4_ERR_RX_FRAG_LEN_TOT;
+            return ((NET_BUF *)0);
+        }
+
+        NetIPv4_RxPktFragListRemove(p_frag_list, DEF_YES);
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.RxFragDgramReasmCtr);
+        p_frag = p_frag_list;                                        /* ... rtn reasm'd datagram (see Note #1b1).        */
+       *p_err  = NET_IPv4_ERR_RX_FRAG_COMPLETE;
+
+                                                                     /* If cur frag size > tot frag size, ...            */
+    } else if (p_frag_list_buf_hdr->IP_FragSizeCur > p_frag_list_buf_hdr->IP_FragSizeTot) {
+        NetIPv4_RxPktFragListDiscard(p_frag_list, DEF_YES, p_err);   /* ... discard ovf'd frag datagram.                 */
+       *p_err =   NET_IPv4_ERR_RX_FRAG_SIZE_TOT;
+        return ((NET_BUF *)0);
+
+
+    } else {                                                         /* Else reset frag tmr (see Note #1b2A).            */
+        CPU_CRITICAL_ENTER();
+        timeout_tick = NetIPv4_FragReasmTimeout_tick;
+        CPU_CRITICAL_EXIT();
+        NetTmr_Set((NET_TMR    *) p_frag_list_buf_hdr->TmrPtr,
+                   (CPU_FNCT_PTR) NetIPv4_RxPktFragTimeout,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (err != NET_TMR_ERR_NONE) {
+            NetIPv4_RxPktFragListDiscard(p_frag_list, DEF_YES, p_err);
+            return ((NET_BUF *)0);
+        }
+#endif
+
+       *p_err  =  NET_IPv4_ERR_RX_FRAG_REASM;
+        p_frag = (NET_BUF *)0;
+    }
+
+
+    return (p_frag);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_RxPktFragTimeout()
+*
+* Description : Discard fragment list on fragment reassembly timeout.
+*
+* Argument(s) : p_frag_list_timeout     Pointer to network buffer fragment reassembly list (see Note #1b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_RxPktFragListAdd(),
+*               NetIPv4_RxPktFragListChkComplete().
+*
+* Note(s)     : (1) RFC #791, Section 3.2 'Fragmentation and Reassembly : An Example Reassembly Procedure'
+*                   states that :
+*
+*                   (a) "If the [IP fragments' reassembly] timer runs out," ...
+*                   (b) "the [sic] all reassembly resources for this buffer identifier are released."
+*
+*               (2) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_BUF' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (3) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetIPv4_RxPktFragListRemove() via NetIPv4_RxPktFragListDiscard().
+*
+*                   (b) but do NOT re-free the timer.
+*
+*               (4) (a) RFC #792, Section 'Time Exceeded Message' states that :
+*
+*                       (1) "if a host reassembling a fragmented datagram cannot complete the reassembly
+*                            due to missing fragments within its time limit" ...
+*                       (2) (A) "it discards the datagram,"                  ...
+*                           (B) "and it may send a time exceeded message."
+*
+*                   (b) MUST send ICMP 'Time Exceeded' error message BEFORE NetIPv4_RxPktFragListDiscard()
+*                       frees fragment buffers.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_RxPktFragTimeout (void  *p_frag_list_timeout)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN   used;
+#endif
+    NET_BUF      *p_frag_list;
+    NET_ERR       err;
+
+
+    p_frag_list = (NET_BUF *)p_frag_list_timeout;               /* See Note #2b2A.                                      */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE IPv4 RX FRAG --------------- */
+    if (p_frag_list == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.NullPtrCtr);
+        return;
+    }
+
+    used = NetBuf_IsUsed(p_frag_list);
+    if (used != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.NullPtrCtr);
+        return;
+    }
+#endif
+
+#ifdef  NET_ICMPv4_MODULE_EN
+
+    NetICMPv4_TxMsgErr((NET_BUF  *) p_frag_list,                /* Send ICMPv4 'Time Exceeded' err msg (see Note #4).   */
+                       (CPU_INT08U) NET_ICMPv4_MSG_TYPE_TIME_EXCEED,
+                       (CPU_INT08U) NET_ICMPv4_MSG_CODE_TIME_EXCEED_FRAG_REASM,
+                       (CPU_INT08U) NET_ICMPv4_MSG_PTR_NONE,
+                       (NET_ERR  *)&err);
+#endif
+                                                                /* Discard frag list (see Note #1b).                    */
+    NetIPv4_RxPktFragListDiscard((NET_BUF   *) p_frag_list,
+                                 (CPU_BOOLEAN) DEF_NO,          /* Clr but do NOT free tmr (see Note #3).               */
+                                 (NET_ERR   *)&err);
+
+
+    NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxFragDgramTimeoutCtr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_RxPktDemuxDatagram()
+*
+* Description : Demultiplex IPv4 datagram to appropriate ICMP, IGMP, UDP, or TCP layer.
+*
+* Argument(s) : p_buf      Pointer to network buffer that received IPv4 datagram.
+*               -----      Argument checked   in NetIPv4_Rx().
+*
+*               p_buf_hdr  Pointer to network buffer header.
+*               ---------  Argument validated in NetIPv4_Rx().
+*
+*               p_err      Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+*                                                               ----- RETURNED BY NetICMPv4_Rx() : -----
+*                               NET_ICMPv4_ERR_NONE             ICMP message successfully demultiplexed.
+*
+*                                                               ------ RETURNED BY NetIGMP_Rx() : ------
+*                               NET_IGMP_ERR_NONE               IGMP message successfully demultiplexed.
+*
+*                                                               ------ RETURNED BY NetUDP_Rx() : -------
+*                               NET_UDP_ERR_NONE                UDP datagram successfully demultiplexed.
+*
+*                                                               ------ RETURNED BY NetTCP_Rx() : -------
+*                               NET_TCP_ERR_NONE                TCP segment  successfully demultiplexed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_Rx().
+*
+* Note(s)     : (1) When network buffer is demultiplexed to higher-layer protocol receive, buffer's reference
+*                   counter is NOT incremented since the IPv4 layer does NOT maintain a reference to the
+*                   buffer.
+*
+*               (2) Default case already invalidated in NetIPv4_RxPktValidate().  However, the default case
+*                   is included as an extra precaution in case 'ProtocolHdrType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_RxPktDemuxDatagram (NET_BUF      *p_buf,
+                                          NET_BUF_HDR  *p_buf_hdr,
+                                          NET_ERR      *p_err)
+{
+    switch (p_buf_hdr->ProtocolHdrType) {                        /* Demux buf to appropriate protocol (see Note #1).     */
+#ifdef NET_ICMPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_ICMP_V4:
+             NetICMPv4_Rx(p_buf, p_err);
+             break;
+#endif
+
+
+#ifdef  NET_IGMP_MODULE_EN
+        case NET_PROTOCOL_TYPE_IGMP:
+             NetIGMP_Rx(p_buf, p_err);
+             break;
+#endif
+
+
+        case NET_PROTOCOL_TYPE_UDP_V4:
+             NetUDP_Rx(p_buf, p_err);
+             break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+        case NET_PROTOCOL_TYPE_TCP_V4:
+             NetTCP_Rx(p_buf, p_err);
+             break;
+#endif
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:                                                /* See Note #2.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.RxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_RxPktDiscard()
+*
+* Description : On any IPv4 receive error(s), discard IPv4 packet(s) & buffer(s).
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_Rx(),
+*               NetIPv4_RxPktFragListDiscard().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_RxPktDiscard (NET_BUF  *p_buf,
+                                    NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.IPv4.RxPktDisCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBufList((NET_BUF *)p_buf,
+                            (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_TxPktValidate()
+*
+* Description : (1) Validate IPv4 transmit packet parameters & options :
+*
+*                   (a) Validate the following transmit packet parameters :
+*
+*                       (1) Supported protocols :
+*                           (A) ICMP
+*                           (B) IGMP
+*                           (C) UDP
+*                           (D) TCP
+*
+*                       (2) Buffer protocol index
+*                       (3) Total Length
+*                       (4) Type of Service (TOS)                                   See Note #2c
+*                       (5) Flags
+*                       (6) Time-to-Live    (TTL)                                   See Note #2d
+*                       (7) Destination Address                                     See Note #2f
+*                       (8) Source      Address                                     See Note #2e
+*                       (9) Options
+*
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIPv4_Tx().
+*
+*               addr_src    Source      IPv4 address.
+*
+*               addr_dest   Destination IPv4 address.
+*
+*               TOS         Specific TOS to transmit IPv4 packet
+*                               (see 'net_ipv4.h  IPv4 HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit IPv4 packet
+*                               (see 'net_ipv4.h  IPv4 HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IPv4_TTL_MIN                minimum TTL transmit value   (1)
+*                               NET_IPv4_TTL_MAX                maximum TTL transmit value (255)
+*                               NET_IPv4_TTL_DFLT               default TTL transmit value (128)
+*                               NET_IPv4_TTL_NONE               replace with default TTL
+*
+*               flags       Flags to select transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IPv4_FLAG_NONE              No  IPv4 transmit flags selected.
+*                               NET_IPv4_FLAG_TX_DONT_FRAG      Set IPv4 'Don't Frag' flag.
+*
+*               p_opts      Pointer to one or more IPv4 options configuration data structures
+*                               (see 'net_ipv4.h  IPv4 HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IPv4 transmit options configuration.
+*                               NET_IPv4_OPT_CFG_ROUTE_TS       Route &/or Internet Timestamp options configuration.
+*                               NET_IPv4_OPT_CFG_SECURITY       Security options configuration
+*                                                                   (see 'net_ipv4.h  Note #1d').
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   Transmit packet validated.
+*                               NET_IPv4_ERR_INVALID_LEN_DATA       Invalid protocol/data length.
+*                               NET_IPv4_ERR_INVALID_TOS            Invalid IPv4 TOS.
+*                               NET_IPv4_ERR_INVALID_FLAG           Invalid IPv4 flag(s).
+*                               NET_IPv4_ERR_INVALID_TTL            Invalid IPv4 TTL.
+*                               NET_IPv4_ERR_INVALID_ADDR_SRC       Invalid IPv4 source          address.
+*                               NET_IPv4_ERR_INVALID_ADDR_DEST      Invalid IPv4 destination     address.
+*                               NET_IPv4_ERR_INVALID_ADDR_GATEWAY   Invalid IPv4 default gateway address.
+*                               NET_BUF_ERR_INVALID_TYPE            Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX              Invalid/insufficient buffer index.
+*                               NET_ERR_INVALID_PROTOCOL            Invalid/unknown protocol type.
+*
+*                                                                   - RETURNED BY NetIPv4_TxPktValidateOpt() : -
+*                               NET_IPv4_ERR_NONE                   IPv4 transmit option configurations validated.
+*                               NET_IPv4_ERR_INVALID_OPT_TYPE       Invalid IPv4 option  type.
+*                               NET_IPv4_ERR_INVALID_OPT_LEN        Invalid IPv4 options length.
+*                               NET_IPv4_ERR_INVALID_OPT_CFG        Invalid IPv4 options configuration.
+*                               NET_IPv4_ERR_INVALID_OPT_ROUTE      Invalid IPv4 route address(s).
+*
+*                                                                   ---- RETURNED BY NetIF_IsEnHandler() : -----
+*                               NET_IF_ERR_INVALID_IF               Invalid OR disabled network interface.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_Tx().
+*
+* Note(s)     : (2) RFC #1122, Section 3.2.1 requires that IPv4 packets be transmitted with the following
+*                   valid IPv4 header fields :
+*
+*                   (a) Version                                             RFC #1122, Section 3.2.1.1
+*                   (b) Check-Sum                                           RFC #1122, Section 3.2.1.2
+*                   (c) Type of Service (TOS)                               RFC #1122, Section 3.2.1.6
+*                   (d) Time-to-Live    (TTL)                               RFC #1122, Section 3.2.1.7
+*
+*                       (1) RFC #1122, Section 3.2.1.7 states that "a host MUST NOT send a datagram with
+*                           a Time-to-Live (TTL) value of zero".
+*
+*                   (e) Source      Address
+*
+*                       (1) (A) RFC #1122, Section 3.2.1.3 states that "when a host sends any datagram,
+*                               the IP source address MUST be one of its own IP addresses (but not a
+*                               broadcast or multicast address)".
+*
+*                           (B) (1) MUST     be one of the following :
+*                                   (a) Configured host address             RFC #1122, Section 3.2.1.3.(1)
+*                                   (b) Localhost                           RFC #1122, Section 3.2.1.3.(g)
+*                                                                               See also Note #2e2A
+*                                   (c) This       Host                     RFC #1122, Section 3.2.1.3.(a)
+*                                   (d) Specified  Host                     RFC #1122, Section 3.2.1.3.(b)
+*
+*                               (2) MUST NOT be one of the following :
+*                                   (a) Multicast  host address             RFC #1112, Section 7.2
+*                                   (b) Limited    Broadcast                RFC #1122, Section 3.2.1.3.(c)
+*                                   (c) Directed   Broadcast                RFC #1122, Section 3.2.1.3.(d)
+*                                   (d) Subnet     Broadcast                RFC #1122, Section 3.2.1.3.(e)
+*
+*                       (2) (A) RFC #1122, Section 3.2.1.3.(g) states that the "internal host loopback
+*                               address ... MUST NOT appear outside a host".
+*
+*                               (1) However, this does NOT prevent the host loopback address from being
+*                                   used as an IPv4 packet's source address as long as BOTH the packet's
+*                                   source AND destination addresses are internal host addresses, either
+*                                   a configured host IP address or any host loopback address.
+*
+*                   (f) Destination Address
+*
+*                       (1) (A) (1) MAY      be one of the following :
+*                                   (a) Configured host address             RFC #1122, Section 3.2.1.3.(1)
+*                                   (b) Multicast  host address             RFC #1122, Section 3.2.1.3.(3)
+*                                                                               See also Note #2f2A
+*                                   (c) Localhost                           RFC #1122, Section 3.2.1.3.(g)
+*                                   (d) Link-local host address             RFC #3927, Section 2.1
+*                                                                               See also Note #2f2B
+*                                   (e) Limited    Broadcast                RFC #1122, Section 3.2.1.3.(c)
+*                                   (f) Directed   Broadcast                RFC #1122, Section 3.2.1.3.(d)
+*                                   (g) Subnet     Broadcast                RFC #1122, Section 3.2.1.3.(e)
+*
+*                               (2) MUST NOT be one of the following :
+*                                   (a) This       Host                     RFC #1122, Section 3.2.1.3.(a)
+*                                   (b) Specified  Host                     RFC #1122, Section 3.2.1.3.(b)
+*
+*                       (2) (A) (1) RFC #1112, Section 4 specifies that "class D ... host group addresses
+*                                   range" :
+*
+*                                   (a) "from 224.0.0.0" ...
+*                                   (b) "to   239.255.255.255".
+*
+*                               (2) However, RFC #1112, Section 4 adds that :
+*
+*                                   (a) "address 224.0.0.0 is guaranteed not to be assigned to any group", ...
+*                                   (b) "and 224.0.0.1 is assigned to the permanent group of all IP hosts."
+*
+*                           (B) (1) RFC #3927, Section 2.1 specifies the "IPv4 Link-Local address ... range
+*                                   ... [as] inclusive" ... :
+*
+*                                   (a) "from 169.254.1.0" ...
+*                                   (b) "to   169.254.254.255".
+*
+*                               (2) RFC #3927, Section 2.6.2 states that "169.254.255.255 ... is the broadcast
+*                                   address for the Link-Local prefix".
+*
+*               (3) See 'net_ipv4.h  IPv4 ADDRESS DEFINES  Notes #2 & #3' for supported IPv4 addresses.
+*********************************************************************************************************
+*/
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+static  void  NetIPv4_TxPktValidate (NET_BUF_HDR    *p_buf_hdr,
+                                     NET_IPv4_ADDR   addr_src,
+                                     NET_IPv4_ADDR   addr_dest,
+                                     NET_IPv4_TOS    TOS,
+                                     NET_IPv4_TTL    TTL,
+                                     NET_IPv4_FLAGS  flags,
+                                     void           *p_opts,
+                                     NET_ERR        *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT16U       ix;
+    CPU_INT16U       len;
+    CPU_INT16U       flag_mask;
+    CPU_BOOLEAN      tos_mbz;
+#endif
+    NET_IPv4_ADDRS  *p_ip_addrs;
+    NET_IF_NBR       if_nbr;
+    CPU_BOOLEAN      addr_host;
+    CPU_BOOLEAN      tx_remote_host;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                    /* ------------ VALIDATE NET BUF TYPE ------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_RX_LARGE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+                                                                    /* --------------- VALIDATE PROTOCOL -------------- */
+    switch (p_buf_hdr->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_ICMP_V4:
+             ix  = p_buf_hdr->ICMP_MsgIx;
+             len = p_buf_hdr->ICMP_MsgLen;
+             break;
+
+
+#ifdef  NET_IGMP_MODULE_EN
+        case NET_PROTOCOL_TYPE_IGMP:
+             ix  = p_buf_hdr->IGMP_MsgIx;
+             len = p_buf_hdr->IGMP_MsgLen;
+             break;
+#endif
+
+
+        case NET_PROTOCOL_TYPE_UDP_V4:
+#ifdef  NET_TCP_MODULE_EN
+        case NET_PROTOCOL_TYPE_TCP_V4:
+#endif
+             ix  = p_buf_hdr->TransportHdrIx;
+             len = p_buf_hdr->TransportHdrLen + (CPU_INT16U)p_buf_hdr->DataLen;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    if (ix == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+    if (ix <  NET_IPv4_HDR_SIZE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+
+
+                                                                    /* ------------ VALIDATE TOT DATA LEN ------------- */
+    if (len != p_buf_hdr->TotLen) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvDataLenCtr);
+       *p_err = NET_IPv4_ERR_INVALID_LEN_DATA;
+        return;
+    }
+
+
+
+                                                                    /* -------------- VALIDATE IPv4 TOS --------------- */
+    tos_mbz = DEF_BIT_IS_SET(TOS, NET_IPv4_HDR_TOS_MBZ_MASK);
+    if (tos_mbz != DEF_NO) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvTOS_Ctr);
+       *p_err = NET_IPv4_ERR_INVALID_TOS;
+        return;
+    }
+
+
+
+                                                                    /* ------------- VALIDATE IPv4 FLAGS -------------- */
+    flag_mask = NET_IPv4_FLAG_NONE        |
+                NET_IPv4_FLAG_TX_DONT_FRAG;
+
+    if ((flags & ~flag_mask) != NET_IPv4_FLAG_NONE) {               /* If any invalid flags req'd, rtn err.             */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvFlagsCtr);
+       *p_err = NET_IPv4_ERR_INVALID_FLAG;
+        return;
+    }
+
+
+
+                                                                    /* -------------- VALIDATE IPv4 TTL --------------- */
+    if (TTL < 1) {                                                  /* If TTL < 1, rtn err (see Note #2d1).             */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvTTL_Ctr);
+       *p_err = NET_IPv4_ERR_INVALID_TTL;
+        return;
+    }
+
+
+#else                                                               /* Prevent 'variable unused' compiler warnings.     */
+   (void)&TOS;
+   (void)&TTL;
+   (void)&flags;
+   (void)&p_opts;
+#endif
+
+
+
+                                                                    /* ------------- VALIDATE IPv4 ADDRS -------------- */
+    if_nbr = p_buf_hdr->IF_Nbr;                                     /* Get pkt's tx IF.                                 */
+   (void)NetIF_IsEnHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+                                                                    /* Chk pkt's tx cfg'd host addr.                    */
+    if (if_nbr != NET_IF_NBR_LOCAL_HOST) {
+        p_ip_addrs = NetIPv4_GetAddrsHostCfgdOnIF((NET_IPv4_ADDR)addr_src,
+                                                 (NET_IF_NBR   )if_nbr);
+    } else {
+        p_ip_addrs = NetIPv4_GetAddrsHostCfgd((NET_IPv4_ADDR )addr_src,
+                                             (NET_IF_NBR   *)0);
+    }
+
+    if (p_ip_addrs != (NET_IPv4_ADDRS *)0) {
+        if ((p_ip_addrs->AddrHost               == NET_IPv4_ADDR_NONE) ||
+            (p_ip_addrs->AddrHostSubnetMask     == NET_IPv4_ADDR_NONE) ||
+            (p_ip_addrs->AddrHostSubnetMaskHost == NET_IPv4_ADDR_NONE) ||
+            (p_ip_addrs->AddrHostSubnetNet      == NET_IPv4_ADDR_NONE)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrSrcCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+             return;
+        }
+    }
+
+
+                                                                    /* ----------- VALIDATE IPv4 DEST ADDR ------------ */
+                                                                    /* See Note #2e.                                    */
+    addr_host = NetIPv4_IsAddrHostCfgdHandler(addr_dest);           /* Chk this host's cfg'd addr(s) [see Note #2f1A1a].*/
+    if (addr_host == DEF_YES) {
+
+        tx_remote_host = DEF_NO;
+
+                                                                    /* Chk invalid 'This Host'       (see Note #2f1A2a).*/
+    } else if (addr_dest == NET_IPv4_ADDR_THIS_HOST) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrDestCtr);
+       *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+        return;
+
+                                                                    /* Chk localhost addrs           (see Note #2f1A1c).*/
+    } else if ((addr_dest & NET_IPv4_ADDR_LOCAL_HOST_MASK_NET) ==
+                            NET_IPv4_ADDR_LOCAL_HOST_NET     ) {
+                                                                    /* Chk localhost 'This Host'     (see Note #2f1A2b).*/
+        if ((addr_dest               & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST) ==
+            (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrDestCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+             return;
+        }
+
+        tx_remote_host = DEF_NO;
+
+                                                                    /* Chk link-local addrs          (see Note #2f1A1d).*/
+    } else if ((addr_dest & NET_IPv4_ADDR_LOCAL_LINK_MASK_NET) ==
+                            NET_IPv4_ADDR_LOCAL_LINK_NET     ) {
+                                                                    /* Chk link-local broadcast      (see Note #2f2B2). */
+        if (addr_dest == NET_IPv4_ADDR_LOCAL_LINK_BROADCAST) {
+            ;
+                                                                    /* Chk invalid link-local addrs  (see Note #2f2B1a).*/
+        } else if ((addr_dest < NET_IPv4_ADDR_LOCAL_LINK_HOST_MIN) ||
+                   (addr_dest > NET_IPv4_ADDR_LOCAL_LINK_HOST_MAX)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrDestCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+             return;
+        }
+
+        tx_remote_host = DEF_YES;
+
+                                                                    /* Chk lim'd broadcast           (see Note #2f1A1e).*/
+    } else if (addr_dest == NET_IPv4_ADDR_BROADCAST) {
+
+        tx_remote_host = DEF_YES;
+
+
+#ifdef  NET_MCAST_MODULE_EN
+                                                                    /* Chk Class-D multicast         (see Note #2f1A1b).*/
+    } else if ((addr_dest & NET_IPv4_ADDR_CLASS_D_MASK) == NET_IPv4_ADDR_CLASS_D) {
+                                                                    /* Chk invalid multicast addrs   (see Note #2f2A).  */
+        if ((addr_dest < NET_IPv4_ADDR_MULTICAST_MIN) ||
+            (addr_dest > NET_IPv4_ADDR_MULTICAST_MAX)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrDestCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+             return;
+        }
+
+        tx_remote_host = DEF_YES;
+#endif
+
+                                                                    /* Chk remote hosts :                               */
+    } else if (p_ip_addrs == (NET_IPv4_ADDRS *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrDestCtr);
+       *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+        return;
+
+                                                                    /* Chk local  subnet.                               */
+    } else if ((addr_dest & p_ip_addrs->AddrHostSubnetMask) ==
+                            p_ip_addrs->AddrHostSubnetNet ) {
+                                                                    /* Chk local  subnet 'This Host' (see Note #2f1A2b).*/
+        if ((addr_dest               & p_ip_addrs->AddrHostSubnetMaskHost) ==
+            (NET_IPv4_ADDR_THIS_HOST & p_ip_addrs->AddrHostSubnetMaskHost)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrDestCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+             return;
+        }
+
+        tx_remote_host = DEF_YES;
+
+
+    } else {
+                                                                    /* Chk remote subnet.                               */
+        if ((addr_dest & NET_IPv4_ADDR_CLASS_A_MASK) == NET_IPv4_ADDR_CLASS_A) {
+                                                                    /* Chk Class-A 'This Host'       (see Note #2f1A2b).*/
+            if ((addr_dest               & NET_IPv4_ADDR_CLASS_A_MASK_HOST) ==
+                (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_A_MASK_HOST)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrDestCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+                 return;
+            }
+
+        } else if ((addr_dest & NET_IPv4_ADDR_CLASS_B_MASK) == NET_IPv4_ADDR_CLASS_B) {
+                                                                    /* Chk Class-B 'This Host'       (see Note #2f1A2b).*/
+            if ((addr_dest               & NET_IPv4_ADDR_CLASS_B_MASK_HOST) ==
+                (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_B_MASK_HOST)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrDestCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+                 return;
+            }
+
+        } else if ((addr_dest & NET_IPv4_ADDR_CLASS_C_MASK) == NET_IPv4_ADDR_CLASS_C) {
+                                                                    /* Chk Class-C 'This Host'       (see Note #2f1A2b).*/
+            if ((addr_dest               & NET_IPv4_ADDR_CLASS_C_MASK_HOST) ==
+                (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_C_MASK_HOST)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrDestCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+                 return;
+            }
+
+        } else {                                                    /* Discard invalid addr class    (see Note #3).     */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrDestCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_DEST;
+            return;
+        }
+
+                                                                    /* Chk dflt gateway cfg'd.                          */
+        if (p_ip_addrs->AddrDfltGateway == NET_IPv4_ADDR_NONE) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.CfgInvGatewayCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_GATEWAY;
+            return;
+        }
+
+        tx_remote_host = DEF_YES;
+    }
+
+
+                                                                    /* ------------- VALIDATE IP SRC ADDR ------------- */
+                                                                    /* See Note #2d.                                    */
+                                                                    /* Chk this host's cfg'd addr  (see Note #2e1B1a).  */
+    if (p_ip_addrs != (NET_IPv4_ADDRS *)0) {
+#if 0                                                               /* Chk'd in 'VALIDATE IPv4 ADDRS'.                  */
+        if (p_ip_addrs->AddrHost == NET_IPv4_ADDR_NONE) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrSrcCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+            return;
+        }
+#endif
+        if (addr_src != p_ip_addrs->AddrHost) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrSrcCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+            return;
+        }
+
+                                                                    /* Chk 'This Host'             (see Note #2e1B1c).  */
+    } else if (addr_src == NET_IPv4_ADDR_THIS_HOST) {
+
+                                                                    /* Chk         localhost addrs (see Note #2e1B1b).  */
+    } else if ((addr_src & NET_IPv4_ADDR_LOCAL_HOST_MASK_NET) ==
+                           NET_IPv4_ADDR_LOCAL_HOST_NET     ) {
+                                                                    /* Chk invalid localhost addrs.                     */
+        if ((addr_src                & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST) ==
+            (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrSrcCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+             return;
+        }
+        if ((addr_src                & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST) ==
+            (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST)) {
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrSrcCtr);
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+             return;
+        }
+
+        if (tx_remote_host != DEF_NO) {                             /* If localhost addr tx'd to remote host, ...       */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrSrcCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;                  /* ... rtn err / discard pkt   (see Note #2e2A).    */
+            return;
+        }
+
+
+    } else {
+        if ((addr_src & NET_IPv4_ADDR_CLASS_A_MASK) == NET_IPv4_ADDR_CLASS_A) {
+                                                                    /* Chk Class-A 'This Host'     (see Note #2e1B1d).  */
+            if ((addr_src                & NET_IPv4_ADDR_CLASS_A_MASK_HOST) !=
+                (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_A_MASK_HOST)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrSrcCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+                 return;
+            }
+
+        } else if ((addr_src & NET_IPv4_ADDR_CLASS_B_MASK) == NET_IPv4_ADDR_CLASS_B) {
+                                                                    /* Chk Class-B 'This Host'     (see Note #2e1B1d).  */
+            if ((addr_src                & NET_IPv4_ADDR_CLASS_B_MASK_HOST) !=
+                (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_B_MASK_HOST)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrSrcCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+                 return;
+            }
+
+        } else if ((addr_src & NET_IPv4_ADDR_CLASS_C_MASK) == NET_IPv4_ADDR_CLASS_C) {
+                                                                    /* Chk Class-C 'This Host'     (see Note #2e1B1d).  */
+            if ((addr_src                & NET_IPv4_ADDR_CLASS_C_MASK_HOST) !=
+                (NET_IPv4_ADDR_THIS_HOST & NET_IPv4_ADDR_CLASS_C_MASK_HOST)) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrSrcCtr);
+                *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+                 return;
+            }
+
+        } else {                                                    /* Discard invalid addr class  (see Note #3).       */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvAddrSrcCtr);
+           *p_err = NET_IPv4_ERR_INVALID_ADDR_SRC;
+            return;
+        }
+    }
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* --------------- VALIDATE IP OPTS --------------- */
+    if (p_opts != (void *)0) {
+        NetIPv4_TxPktValidateOpt(p_opts, p_err);
+        if (*p_err != NET_IPv4_ERR_NONE) {
+            return;
+        }
+    }
+#endif
+
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_TxPktValidateOpt()
+*
+* Description : (1) Validate IPv4 transmit option configurations :
+*
+*                   (a) IPv4 transmit options MUST be configured by appropriate transmit options configuration
+*                       data structure(s) passed via 'p_opts'; see 'net_ipv4.h  IP HEADER OPTION CONFIGURATION
+*                       DATA TYPES' for IPv4 options configuration.
+*
+*                   (b) IPv4 header allows for a maximum option size of 40 octets (see 'net_ipv4.h  IPv4 HEADER
+*                       OPTIONS DEFINES  Note #3').
+*
+*
+* Argument(s) : p_opts      Pointer to one or more IPv4 options configuration data structures (see Note #1a) :
+*
+*                               NET_IPv4_OPT_CFG_ROUTE_TS           IPv4 Route &/or Internet Timestamp options
+*                                                                       configuration.
+*                               NET_IPv4_OPT_CFG_SECURITY           Security options configuration
+*                                                                       (see 'net_ipv4.c  Note #1d').
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   IPv4 transmit option configurations validated.
+*                               NET_IPv4_ERR_INVALID_OPT_TYPE       Invalid IPv4 option type.
+*                               NET_IPv4_ERR_INVALID_OPT_LEN        Total options length exceeds maximum IPv4
+*                                                                       options length (see Note #1b).
+*                               NET_IPv4_ERR_INVALID_OPT_CFG        Invalid number of exclusive IPv4 options
+*                                                                       (see Note #3).
+*
+*                                                                   - RETURNED BY NetIPv4_TxPktValidateOptRouteTS() : -
+*                               NET_IPv4_ERR_INVALID_OPT_TYPE       Invalid IPv4 option type.
+*                               NET_IPv4_ERR_INVALID_OPT_LEN        Invalid number of Route &/or Internet
+*                                                                     Timestamp entries configured.
+*                               NET_IPv4_ERR_INVALID_OPT_ROUTE      Invalid route address(s).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_TxPktValidate().
+*
+* Note(s)     : (2) (a) See 'net_ipv4.h  IPv4 HEADER OPTIONS DEFINES' for   supported IPv4 options' summary.
+*
+*                   (b) See 'net_ipv4.c  Note #1d'                    for unsupported IPv4 options.
+*
+*               (3) The following IPv4 transmit options MUST be configured exclusively--i.e. only a single
+*                   IPv4 Route or Internet Timestamp option may be configured for any one IPv4 datagram :
+*
+*                   (a) NET_IPv4_OPT_TYPE_ROUTE_STRICT
+*                   (b) NET_IPv4_OPT_TYPE_ROUTE_LOOSE
+*                   (c) NET_IPv4_OPT_TYPE_ROUTE_REC
+*                   (d) NET_IPv4_OPT_TYPE_TS_ONLY
+*                   (e) NET_IPv4_OPT_TYPE_TS_ROUTE_REC
+*                   (f) NET_IPv4_OPT_TYPE_TS_ROUTE_SPEC
+*
+*                       (A) RFC #1122, Section 3.2.1.8.(c) prohibits "an IP header" from transmitting
+*                           with "more than one Source Route option".
+*
+*               (4) RFC #791, Section 3.1 'Options : Internet Timestamp' states that "each timestamp"
+*                   may be "preceded with [an] internet address".
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIPv4_TxPktValidateOpt (void     *p_opts,
+                                        NET_ERR  *p_err)
+{
+    CPU_INT08U          opt_len_size;
+    CPU_INT08U          opt_len;
+    CPU_INT08U          opt_nbr_route_ts;
+    NET_IPv4_OPT_TYPE  *p_opt_cfg_type;
+    void               *p_opt_cfg;
+    void               *p_opt_next;
+
+
+    opt_len_size     = 0u;
+    opt_nbr_route_ts = 0u;
+    p_opt_cfg        = p_opts;
+
+    while (p_opt_cfg  != (void *)0) {
+        p_opt_cfg_type = (NET_IPv4_OPT_TYPE *)p_opt_cfg;
+        switch (*p_opt_cfg_type) {
+            case NET_IPv4_OPT_TYPE_ROUTE_STRICT:
+            case NET_IPv4_OPT_TYPE_ROUTE_LOOSE:
+            case NET_IPv4_OPT_TYPE_ROUTE_REC:
+            case NET_IPv4_OPT_TYPE_TS_ONLY:
+            case NET_IPv4_OPT_TYPE_TS_ROUTE_REC:
+            case NET_IPv4_OPT_TYPE_TS_ROUTE_SPEC:
+                 if (opt_nbr_route_ts > 0) {                    /* If > 1 exclusive IPv4 opt, rtn err (see Note #3A).   */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptCfgCtr);
+                    *p_err = NET_IPv4_ERR_INVALID_OPT_CFG;
+                     return;
+                 }
+                 opt_nbr_route_ts++;
+
+                 NetIPv4_TxPktValidateOptRouteTS(p_opt_cfg, &opt_len, &p_opt_next, p_err);
+                 break;
+
+#if 0                                                           /* -------------- UNSUPPORTED IPv4 OPTS --------------- */
+                                                                /* See Note #2b.                                        */
+            case NET_IPv4_OPT_TYPE_SECURITY:
+            case NET_IPv4_OPT_SECURITY_EXTENDED:
+#endif
+            case NET_IPv4_OPT_TYPE_NONE:                        /* ---------------- INVALID IPv4 OPTS ----------------- */
+            default:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptTypeCtr);
+                *p_err = NET_IPv4_ERR_INVALID_OPT_TYPE;
+                 return;
+        }
+
+        if (*p_err != NET_IPv4_ERR_NONE) {
+            return;
+        }
+
+        opt_len_size += opt_len;
+        if (opt_len_size > NET_IPv4_HDR_OPT_SIZE_MAX) {         /* If tot opt len exceeds max opt len, rtn err.         */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptLenCtr);
+           *p_err = NET_IPv4_ERR_INVALID_OPT_LEN;
+            return;
+        }
+
+        p_opt_cfg = p_opt_next;                                 /* Validate next cfg opt.                               */
+    }
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv4_TxPktValidateOptRouteTS()
+*
+* Description : (1) Validate IPv4 Route &/or Internet Timestamp option configuration :
+*
+*                   (a) See 'net_ipv4.h  IPv4 ROUTE & INTERNET TIMESTAMP OPTIONS CONFIGURATION DATA TYPE' for
+*                       valid IPv4 Route &/or Internet Timestamp option configuration.
+*
+*                   (b) Validate the following options' configuration parameters :
+*
+*                       (1) Type
+*                       (2) Number
+*                             * Less    than minimum
+*                             * Greater than maximum
+*                       (3) IPv4 Route addresses
+*                             * MUST be IPv4 Class A, B, or C address   See 'net_ipv4.h  IPv4 ADDRESS DEFINES  Note #2a'
+*                       (4) Internet Timestamps
+*                             * Timestamp values are NOT validated
+*
+*                   (c) Return option values.
+*
+*
+* Argument(s) : p_opt_route_ts  Pointer to IPv4 Route &/or Internet Timestamp option configuration data structure.
+*               --------------  Argument checked   in NetIPv4_TxPktValidateOpt().
+*
+*               p_opt_len       Pointer to variable that will receive the Route/Internet Timestamp option length
+*               ---------           (in octets).
+*
+*                               Argument validated in NetIPv4_TxPktValidateOpt().
+*
+*               p_opt_next       Pointer to variable that will receive the pointer to the next IPv4 transmit option.
+*               ----------       Argument validated in NetIPv4_TxPktValidateOpt().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   Route &/or Internet Timestamp option
+*                                                                       configuration validated.
+*                               NET_IPv4_ERR_INVALID_OPT_TYPE       Invalid IPv4 option type.
+*                               NET_IPv4_ERR_INVALID_OPT_LEN        Invalid number of Route &/or Internet
+*                                                                       Timestamp entries configured.
+*                               NET_IPv4_ERR_INVALID_OPT_ROUTE      Invalid route address(s).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_TxPktValidateOpt().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIPv4_TxPktValidateOptRouteTS (void         *p_opt_route_ts,
+                                               CPU_INT08U   *p_opt_len,
+                                               void        **p_opt_next,
+                                               NET_ERR      *p_err)
+{
+    NET_IPv4_OPT_CFG_ROUTE_TS  *p_opt_cfg_route_ts;
+    CPU_INT08U                  opt_nbr_min;
+    CPU_INT08U                  opt_nbr_max;
+    CPU_INT08U                  opt_len;
+    CPU_INT08U                  opt_len_opt;
+    CPU_INT08U                  opt_len_param;
+    CPU_INT08U                  opt_route_ix;
+    CPU_BOOLEAN                 opt_route_spec;
+    NET_IPv4_ADDR               opt_route_addr;
+
+
+    p_opt_cfg_route_ts = (NET_IPv4_OPT_CFG_ROUTE_TS *)p_opt_route_ts;
+
+                                                                /* ------------------ VALIDATE TYPE ------------------- */
+    switch (p_opt_cfg_route_ts->Type) {
+        case NET_IPv4_OPT_TYPE_ROUTE_STRICT:
+             opt_nbr_min    = NET_IPv4_OPT_PARAM_NBR_MIN;
+             opt_nbr_max    = NET_IPv4_OPT_PARAM_NBR_MAX_ROUTE;
+             opt_len_opt    = NET_IPv4_HDR_OPT_SIZE_ROUTE;
+             opt_len_param  = sizeof(NET_IPv4_ADDR);
+             opt_route_spec = DEF_YES;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_ROUTE_LOOSE:
+             opt_nbr_min    = NET_IPv4_OPT_PARAM_NBR_MIN;
+             opt_nbr_max    = NET_IPv4_OPT_PARAM_NBR_MAX_ROUTE;
+             opt_len_opt    = NET_IPv4_HDR_OPT_SIZE_ROUTE;
+             opt_len_param  = sizeof(NET_IPv4_ADDR);
+             opt_route_spec = DEF_YES;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_ROUTE_REC:
+             opt_nbr_min    = NET_IPv4_OPT_PARAM_NBR_MIN;
+             opt_nbr_max    = NET_IPv4_OPT_PARAM_NBR_MAX_ROUTE;
+             opt_len_opt    = NET_IPv4_HDR_OPT_SIZE_ROUTE;
+             opt_len_param  = sizeof(NET_IPv4_ADDR);
+             opt_route_spec = DEF_NO;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_TS_ONLY:
+             opt_nbr_min    = NET_IPv4_OPT_PARAM_NBR_MIN;
+             opt_nbr_max    = NET_IPv4_OPT_PARAM_NBR_MAX_TS_ONLY;
+             opt_len_opt    = NET_IPv4_HDR_OPT_SIZE_TS;
+             opt_len_param  = sizeof(NET_TS);
+             opt_route_spec = DEF_NO;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_TS_ROUTE_REC:
+             opt_nbr_min    = NET_IPv4_OPT_PARAM_NBR_MIN;
+             opt_nbr_max    = NET_IPv4_OPT_PARAM_NBR_MAX_TS_ROUTE;
+             opt_len_opt    = NET_IPv4_HDR_OPT_SIZE_TS;
+             opt_len_param  = sizeof(NET_IPv4_ADDR) + sizeof(NET_TS);
+             opt_route_spec = DEF_NO;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_TS_ROUTE_SPEC:
+             opt_nbr_min    = NET_IPv4_OPT_PARAM_NBR_MIN;
+             opt_nbr_max    = NET_IPv4_OPT_PARAM_NBR_MAX_TS_ROUTE;
+             opt_len_opt    = NET_IPv4_HDR_OPT_SIZE_TS;
+             opt_len_param  = sizeof(NET_IPv4_ADDR) + sizeof(NET_TS);
+             opt_route_spec = DEF_YES;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptTypeCtr);
+            *p_err = NET_IPv4_ERR_INVALID_OPT_TYPE;
+             return;
+    }
+
+                                                                /* ------------------- VALIDATE NBR ------------------- */
+    if (p_opt_cfg_route_ts->Nbr < opt_nbr_min) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptLenCtr);
+       *p_err = NET_IPv4_ERR_INVALID_OPT_LEN;
+        return;
+    }
+    if (p_opt_cfg_route_ts->Nbr > opt_nbr_max) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptLenCtr);
+       *p_err = NET_IPv4_ERR_INVALID_OPT_LEN;
+        return;
+    }
+
+                                                                /* ------------------ VALIDATE ROUTE ------------------ */
+    if (opt_route_spec == DEF_YES) {                            /* For specified routes ...                             */
+                                                                /* ... validate all route addrs (see Note #1b3).        */
+        for (opt_route_ix = 0u; opt_route_ix < p_opt_cfg_route_ts->Nbr; opt_route_ix++) {
+
+            opt_route_addr = p_opt_cfg_route_ts->Route[opt_route_ix];
+
+            if ((opt_route_addr & NET_IPv4_ADDR_CLASS_A_MASK) != NET_IPv4_ADDR_CLASS_A) {
+                if ((opt_route_addr & NET_IPv4_ADDR_CLASS_B_MASK) != NET_IPv4_ADDR_CLASS_B) {
+                    if ((opt_route_addr & NET_IPv4_ADDR_CLASS_C_MASK) != NET_IPv4_ADDR_CLASS_C) {
+                        NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptCfgCtr);
+                       *p_err = NET_IPv4_ERR_INVALID_OPT_ROUTE;
+                        return;
+                    }
+                }
+            }
+        }
+    }
+
+                                                                /* ------------------- VALIDATE TS -------------------- */
+                                                                /* See Note #1b4.                                       */
+
+
+                                                                /* ------------------- RTN OPT VALS ------------------- */
+    opt_len   = opt_len_opt + (p_opt_cfg_route_ts->Nbr * opt_len_param);
+   *p_opt_len  = opt_len;
+   *p_opt_next = p_opt_cfg_route_ts->NextOptPtr;
+   *p_err      = NET_IPv4_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            NetIPv4_TxPkt()
+*
+* Description : (1) Prepare IPv4 header & transmit IPv4 packet :
+*
+*                   (a) Prepare   IPv4 options (if any)
+*                   (b) Calculate IPv4 header buffer controls
+*                   (c) Check for transmit fragmentation        See Note #2
+*                   (d) Prepare   IPv4 header
+*                   (e) Transmit  IPv4 packet datagram
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to transmit IPv4 packet.
+*               -----       Argument checked   in NetIPv4_Tx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIPv4_Tx().
+*
+*               addr_src    Source      IPv4 address.
+*               ---------   Argument checked   in NetIPv4_TxPktValidate().
+*
+*               addr_dest   Destination IPv4 address.
+*               ----------  Argument checked   in NetIPv4_TxPktValidate().
+*
+*               TOS         Specific TOS to transmit IPv4 packet
+*               ---             (see 'net_ipv4.h  IPv4 HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*                           Argument checked   in NetIPv4_TxPktValidate().
+*
+*               TTL         Specific TTL to transmit IPv4 packet
+*               ---             (see 'net_ipv4.h  IPv4 HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IPv4_TTL_MIN                minimum TTL transmit value   (1)
+*                               NET_IPv4_TTL_MAX                maximum TTL transmit value (255)
+*                               NET_IPv4_TTL_DFLT               default TTL transmit value (128)
+*                               NET_IPv4_TTL_NONE               replace with default TTL
+*
+*                           Argument validated in NetIPv4_TxPktValidate().
+*
+*               flags       Flags to select transmit options; bit-field flags logically OR'd :
+*               -----
+*                               NET_IPv4_FLAG_NONE              No  IPv4 transmit flags selected.
+*                               NET_IPv4_FLAG_TX_DONT_FRAG      Set IPv4 'Don't Frag' flag.
+*
+*                           Argument checked   in NetIPv4_TxPktValidate().
+*
+*               p_opts      Pointer to one or more IPv4 options configuration data structures
+*               -----           (see 'net_ipv4.h  IPv4 HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IPv4 transmit options configuration.
+*                               NET_IPv4_OPT_CFG_ROUTE_TS       Route &/or Internet Timestamp options configuration.
+*                               NET_IPv4_OPT_CFG_SECURITY       Security options configuration
+*                                                                   (see 'net_ipv4.h  Note #1d').
+*
+*                           Argument checked   in NetIPv4_TxPktValidate().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_INVALID_PROTOCOL            Invalid/unknown protocol type.
+*                               NET_IPv4_ERR_INVALID_LEN_HDR        Invalid IPv4 header length.
+*                               NET_IPv4_ERR_INVALID_FRAG           Invalid IPv4 fragmentation.
+*
+*                                                                   -- RETURNED BY NetIF_MTU_GetProtocol() : --
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IF_ERR_INVALID_CFG              Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT                Invalid NULL function pointer.
+*
+*                                                                   - RETURNED BY NetIPv4_TxPktPrepareOpt() : -
+*                               NET_IPv4_ERR_INVALID_OPT_TYPE       Invalid IPv4 option type.
+*                               NET_IPv4_ERR_INVALID_OPT_LEN        Invalid IPv4 option length.
+*
+*                                                                   - RETURNED BY NetIPv4_TxPktPrepareHdr() : -
+*                               NET_BUF_ERR_INVALID_IX              Invalid/insufficient buffer index.
+*                               NET_BUF_ERR_INVALID_LEN             Invalid buffer length.
+*                               NET_UTIL_ERR_NULL_PTR               Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE              Check-sum passed a zero size.
+*
+*                                                                   -- RETURNED BY NetIPv4_TxPktDatagram() : --
+*                               NET_IF_ERR_NONE                     Packet successfully transmitted.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST      Invalid IPv4 host    address.
+*                               NET_IPv4_ERR_INVALID_ADDR_GATEWAY   Invalid IPv4 gateway address.
+*                               NET_IPv4_ERR_TX_DEST_INVALID        Invalid transmit destination.
+*                               NET_ERR_TX                          Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_Tx().
+*
+* Note(s)     : (2) IPv4 transmit fragmentation NOT currently supported (see 'net_ipv4.c  Note #1c'). #### NET-810
+*
+*               (3) Default case already invalidated in NetIPv4_TxPktValidate().  However, the default case
+*                   is included as an extra precaution in case 'ProtocolHdrType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_TxPkt (NET_BUF        *p_buf,
+                             NET_BUF_HDR    *p_buf_hdr,
+                             NET_IPv4_ADDR   addr_src,
+                             NET_IPv4_ADDR   addr_dest,
+                             NET_IPv4_TOS    TOS,
+                             NET_IPv4_TTL    TTL,
+                             NET_IPv4_FLAGS  flags,
+                             void           *p_opts,
+                             NET_ERR        *p_err)
+{
+#if 0                                                           /* NOT currently implemented (see Note #2).             */
+    CPU_BOOLEAN        flag_dont_frag;
+#endif
+    CPU_INT08U         ip_opt_len_size;
+    CPU_INT16U         ip_hdr_len_size;
+    CPU_INT16U         protocol_ix;
+    NET_MTU            ip_mtu;
+    NET_IPv4_OPT_SIZE  ip_hdr_opts[NET_IPv4_HDR_OPT_NBR_MAX];
+    CPU_BOOLEAN        ip_tx_frag;
+
+
+                                                                /* ---------------- PREPARE IPv4 OPTS ----------------- */
+    if (p_opts != (void *)0) {
+        ip_opt_len_size = NetIPv4_TxPktPrepareOpt((void       *) p_opts,
+                                                  (CPU_INT08U *)&ip_hdr_opts[0],
+                                                  (NET_ERR    *) p_err);
+        if (*p_err != NET_IPv4_ERR_NONE) {
+             return;
+        }
+    } else {
+        ip_opt_len_size = 0u;
+    }
+
+
+                                                                /* --------------- CALC IPv4 HDR CTRLS ---------------- */
+                                                                /* Calc tot IPv4 hdr len (in octets).                   */
+    ip_hdr_len_size = (CPU_INT16U)(NET_IPv4_HDR_SIZE_MIN + ip_opt_len_size);
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (ip_hdr_len_size > NET_IPv4_HDR_SIZE_MAX) {
+       *p_err = NET_IPv4_ERR_INVALID_LEN_HDR;
+        return;
+    }
+#endif
+
+    switch (p_buf_hdr->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_ICMP_V4:
+             protocol_ix = p_buf_hdr->ICMP_MsgIx;
+             break;
+
+
+#ifdef  NET_IGMP_MODULE_EN
+        case NET_PROTOCOL_TYPE_IGMP:
+             protocol_ix = p_buf_hdr->IGMP_MsgIx;
+             break;
+#endif
+
+
+        case NET_PROTOCOL_TYPE_UDP_V4:
+#ifdef  NET_TCP_MODULE_EN
+        case NET_PROTOCOL_TYPE_TCP_V4:
+#endif
+             protocol_ix = p_buf_hdr->TransportHdrIx;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+
+                                                                /* ----------------- CHK FRAG REQUIRED ---------------- */
+    ip_tx_frag = DEF_NO;
+    if (protocol_ix < ip_hdr_len_size) {                        /* If hdr len > allowed rem ix, tx frag req'd.          */
+        ip_tx_frag = DEF_YES;
+    }
+
+    ip_mtu  = NetIF_MTU_GetProtocol(p_buf_hdr->IF_Nbr, NET_PROTOCOL_TYPE_IP_V4, NET_IF_FLAG_NONE, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+    ip_mtu -= ip_hdr_len_size - NET_IPv4_HDR_SIZE_MIN;
+    if (p_buf_hdr->TotLen > ip_mtu) {                            /* If tot len > MTU,            tx frag req'd.          */
+        ip_tx_frag = DEF_YES;
+    }
+
+
+    if (ip_tx_frag == DEF_NO) {                                 /* If tx frag NOT required, ...                         */
+
+        NetIPv4_TxPktPrepareHdr(p_buf,                          /* ... prepare IPv4 hdr     ...                         */
+                                p_buf_hdr,
+                                ip_hdr_len_size,
+                                ip_opt_len_size,
+                                protocol_ix,
+                                addr_src,
+                                addr_dest,
+                                TOS,
+                                TTL,
+                                flags,
+                               &ip_hdr_opts[0],
+                                p_err);
+
+        if (*p_err != NET_IPv4_ERR_NONE) {
+             return;
+        }
+
+        NetIPv4_TxPktDatagram(p_buf, p_buf_hdr, p_err);         /* ... & tx IPv4 datagram.                              */
+
+    } else {
+#if 0                                                           /* NOT currently implemented (see Note #2).             */
+        flag_dont_frag = DEF_BIT_IS_SET(flags, NET_IPv4_FLAG_TX_DONT_FRAG);
+        if (flag_dont_frag != DEF_NO) {
+           *p_err = NET_IPv4_ERR_INVALID_FRAG;
+            return;
+        }
+#else
+       *p_err = NET_IPv4_ERR_INVALID_FRAG;
+        return;
+#endif
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                         NetIPv4_TxIxDataGet()
+*
+* Description : Get the offset of a buffer at which the IPv4 data can be written.
+*
+* Argument(s) : if_nbr      Network interface number to transmit data.
+*
+*               data_len    IPv4 payload size.
+*
+*               mtu         MTU for the upper-layer protocol.
+*
+*               p_ix        Pointer to the current protocol index.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE           No error.
+*
+*                               ----------- RETURNED BY NetIF_GetTxDataIx() : -----------
+*                               See NetIF_GetTxDataIx() for additional return error codes.
+*
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv4_TxIxDataGet(),
+*               NetIGMP_TxIxDataGet(),
+*               NetTCP_GetTxDataIx(),
+*               NetUDP_GetTxDataIx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+void  NetIPv4_TxIxDataGet (NET_IF_NBR   if_nbr,
+                           CPU_INT32U   data_len,
+                           CPU_INT16U   mtu,
+                           CPU_INT16U  *p_ix,
+                           NET_ERR     *p_err)
+{
+                                                                /* Add IPv4 min hdr len to current offset.              */
+   *p_ix += NET_IPv4_HDR_SIZE;
+
+                                                                /* Add the lower-level hdr        offsets.              */
+    NetIF_TxIxDataGet(if_nbr, data_len, p_ix, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+
+   (void)&mtu;
+
+   *p_err  = NET_IPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_TxPktPrepareOpt()
+*
+* Description : (1) Prepare IPv4 header with IPv4 transmit options :
+*
+*                   (a) Prepare ALL IPv4 options from configuration
+*                           data structure(s)
+*                   (b) Pad remaining IPv4 header octets            See RFC #791, Section 3.1 'Padding'
+*
+*               (2) IP transmit options MUST be configured by appropriate options configuration data structure(s)
+*                   passed via 'p_opts'; see 'net_ipv4.h  IPv4 HEADER OPTION CONFIGURATION DATA TYPES' for IPv4
+*                   options configuration.
+*
+*               (3) Convert ALL IPv4 options' multi-octet words from host-order to network-order.
+*
+*
+* Argument(s) : p_opts      Pointer to one or more IPv4 options configuration data structures (see Note #2) :
+*               ------
+*                               NULL                            NO IPv4 transmit options configuration.
+*                               NET_IPv4_OPT_CFG_ROUTE_TS       Route &/or Internet Timestamp options configuration.
+*                               NET_IPv4_OPT_CFG_SECURITY       Security options configuration
+*                                                                   (see 'net_ipv4.h  Note #1d').
+*
+*                           Argument checked   in NetIPv4_TxPkt().
+*
+*               p_opt_hdr   Pointer to IPv4 transmit option buffer to prepare IPv4 options.
+*               ---------   Argument validated in NetIPv4_TxPkt().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               IPv4 header options successfully prepared.
+*                               NET_IPv4_ERR_INVALID_OPT_TYPE   Invalid IPv4 option type.
+*                               NET_IPv4_ERR_INVALID_OPT_LEN    Invalid IPv4 option length.
+*
+* Return(s)   : Total IPv4 option length (in octets), if NO error(s).
+*
+*               0,                                  otherwise.
+*
+* Caller(s)   : NetIPv4_TxPkt().
+*
+* Note(s)     : (4) (a) See 'net_ip.h  IP HEADER OPTIONS DEFINES' for   supported IP options' summary.
+*
+*                   (b) See 'net_ip.c  Note #1d'                  for unsupported IP options.
+*
+*               (5) Transmit arguments & options validated in NetIPv4_TxPktValidate()/NetIPv4_TxPktValidateOpt() :
+*
+*                   (a) Assumes ALL   transmit arguments & options are valid
+*                   (b) Assumes total transmit options' lengths    are valid
+*
+*               (6) IP header allows for a maximum option size of 40 octets (see 'net_ipv4.h  IPv4 HEADER
+*                   OPTIONS DEFINES  Note #3').
+*
+*               (7) Default case already invalidated in NetIPv4_TxPktValidateOpt().  However, the default
+*                   case is included as an extra precaution in case any of the IPv4 transmit options types
+*                   are incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  NetIPv4_TxPktPrepareOpt (void        *p_opts,
+                                             CPU_INT08U  *p_opt_hdr,
+                                             NET_ERR     *p_err)
+{
+    CPU_INT08U          ip_opt_len_tot = 0u;
+    CPU_INT08U          ip_opt_len     = 0u;
+    CPU_INT08U         *p_opt_cfg_hdr  = DEF_NULL;
+    NET_IPv4_OPT_TYPE  *p_opt_cfg_type = DEF_NULL;
+    void               *p_opt_next     = DEF_NULL;
+    void               *p_opt_cfg      = DEF_NULL;
+
+
+    ip_opt_len_tot = 0u;
+    p_opt_cfg       = p_opts;
+    p_opt_cfg_hdr   = p_opt_hdr;
+                                                                /* ---------------- PREPARE IPv4 OPTS ----------------- */
+    while (p_opt_cfg  != (void *)0) {                           /* Prepare ALL cfg'd IPv4 opts (see Note #1a).          */
+        p_opt_cfg_type = (NET_IPv4_OPT_TYPE *)p_opt_cfg;
+        switch (*p_opt_cfg_type) {
+            case NET_IPv4_OPT_TYPE_ROUTE_STRICT:
+            case NET_IPv4_OPT_TYPE_ROUTE_LOOSE:
+            case NET_IPv4_OPT_TYPE_ROUTE_REC:
+                 NetIPv4_TxPktPrepareOptRoute(p_opt_cfg, p_opt_cfg_hdr, &ip_opt_len, &p_opt_next, p_err);
+                 break;
+
+
+            case NET_IPv4_OPT_TYPE_TS_ONLY:
+                 NetIPv4_TxPktPrepareOptTS(p_opt_cfg, p_opt_cfg_hdr, &ip_opt_len, &p_opt_next, p_err);
+                 break;
+
+
+            case NET_IPv4_OPT_TYPE_TS_ROUTE_REC:
+            case NET_IPv4_OPT_TYPE_TS_ROUTE_SPEC:
+                 NetIPv4_TxPktPrepareOptTSRoute(p_opt_cfg, p_opt_cfg_hdr, &ip_opt_len, &p_opt_next, p_err);
+                 break;
+
+                                                                /* -------------- UNSUPPORTED IPv4 OPTS --------------- */
+                                                                /* See Note #4b.                                        */
+            case NET_IPv4_OPT_TYPE_SECURITY:
+            case NET_IPv4_OPT_SECURITY_EXTENDED:
+                 break;
+
+                                                                /* ---------------- INVALID IPv4 OPTS ----------------- */
+            case NET_IPv4_OPT_TYPE_NONE:
+            default:                                            /* See Note #6.                                         */
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptTypeCtr);
+                *p_err =  NET_IPv4_ERR_INVALID_OPT_TYPE;
+                 return (0u);
+        }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (*p_err != NET_IPv4_ERR_NONE) {                      /* See Note #4a.                                        */
+             return (0u);
+        }
+        if (ip_opt_len_tot > NET_IPv4_HDR_OPT_SIZE_MAX) {       /* See Note #4b.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptLenCtr);
+           *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+            return (0u);
+        }
+#endif
+
+        ip_opt_len_tot += ip_opt_len;
+        p_opt_cfg_hdr  += ip_opt_len;
+
+        p_opt_cfg       = p_opt_next;                          /* Prepare next cfg opt.                                */
+    }
+
+
+                                                                /* ------------------- PAD IPv4 HDR ------------------- */
+    if (ip_opt_len_tot > 0u) {
+                                                                /* Pad rem'ing IPv4 hdr octets (see Note #1b).          */
+        while ((ip_opt_len_tot %  NET_IPv4_HDR_OPT_SIZE_WORD) &&
+               (ip_opt_len_tot <= NET_IPv4_HDR_OPT_SIZE_MAX )) {
+           *p_opt_cfg_hdr = NET_IPv4_HDR_OPT_PAD;
+            p_opt_cfg_hdr++;
+            ip_opt_len_tot++;
+        }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (ip_opt_len_tot > NET_IPv4_HDR_OPT_SIZE_MAX) {       /* See Note #4b.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptLenCtr);
+           *p_err =  NET_IPv4_ERR_INVALID_OPT_LEN;
+            return (0u);
+        }
+#endif
+    }
+
+
+   *p_err =  NET_IPv4_ERR_NONE;
+
+    return (ip_opt_len_tot);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv4_TxPktPrepareOptRoute()
+*
+* Description : (1) Prepare IPv4 header with IPv4 Route transmit options :
+*
+*                   (a) Prepare IPv4 Route option header
+*                   (b) Prepare IPv4 Route
+*
+*               (2) See RFC #791, Section 3.1 'Options : Loose/Strict Source & Record Route'.
+*
+*
+* Argument(s) : p_opts      Pointer to IPv4 Route option configuration data structure.
+*               ------      Argument checked   in NetIPv4_TxPktPrepareOpt().
+*
+*               p_opt_hdr   Pointer to IPv4 transmit option buffer to prepare IPv4 Route option.
+*               ---------   Argument validated in NetIPv4_TxPkt().
+*
+*               p_opt_len   Pointer to variable that will receive the Route option length (in octets).
+*               ---------   Argument validated in NetIPv4_TxPktPrepareOpt().
+*
+*               p_opt_next  Pointer to variable that will receive the pointer to the next IPv4 transmit option.
+*               ---------   Argument validated in NetIPv4_TxPktPrepareOpt().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               IPv4 Route option successfully prepared.
+*                               NET_IPv4_ERR_INVALID_OPT_TYPE   Invalid IPv4 option type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_TxPktPrepareOpt().
+*
+* Note(s)     : (3) Transmit arguments & options validated in NetIPv4_TxPktValidate()/NetIPv4_TxPktValidateOpt() :
+*
+*                   (a) Assumes ALL   transmit arguments & options are valid
+*                   (b) Assumes total transmit options' lengths    are valid
+*
+*               (4) Default case already invalidated in NetIPv4_TxPktValidateOpt().  However, the default
+*                   case is included as an extra precaution in case any of the IPv4 transmit options types
+*                   are incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_TxPktPrepareOptRoute (void         *p_opts,
+                                            CPU_INT08U   *p_opt_hdr,
+                                            CPU_INT08U   *p_opt_len,
+                                            void        **p_opt_next,
+                                            NET_ERR      *p_err)
+{
+    NET_IPv4_OPT_CFG_ROUTE_TS  *p_opt_cfg_route_ts;
+    NET_IPv4_OPT_SRC_ROUTE     *p_opt_route;
+    CPU_BOOLEAN                 opt_route_spec;
+    CPU_INT08U                  opt_route_ix;
+    NET_IPv4_ADDR               opt_route_addr;
+
+
+                                                                /* -------------- PREPARE ROUTE OPT HDR --------------- */
+    p_opt_cfg_route_ts = (NET_IPv4_OPT_CFG_ROUTE_TS *)p_opts;
+    p_opt_route        = (NET_IPv4_OPT_SRC_ROUTE    *)p_opt_hdr;
+    p_opt_route->Len   =  NET_IPv4_HDR_OPT_SIZE_ROUTE + (p_opt_cfg_route_ts->Nbr * sizeof(NET_IPv4_ADDR));
+    p_opt_route->Ptr   =  NET_IPv4_OPT_ROUTE_PTR_ROUTE;
+    p_opt_route->Pad   =  NET_IPv4_HDR_OPT_PAD;
+
+    switch (p_opt_cfg_route_ts->Type) {
+        case NET_IPv4_OPT_TYPE_ROUTE_STRICT:
+             p_opt_route->Type = NET_IPv4_HDR_OPT_ROUTE_SRC_STRICT;
+             opt_route_spec   = DEF_YES;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_ROUTE_LOOSE:
+             p_opt_route->Type = NET_IPv4_HDR_OPT_ROUTE_SRC_LOOSE;
+             opt_route_spec   = DEF_YES;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_ROUTE_REC:
+             p_opt_route->Type = NET_IPv4_HDR_OPT_ROUTE_REC;
+             opt_route_spec   = DEF_NO;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_NONE:
+        default:                                                /* See Note #4.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptTypeCtr);
+            *p_err = NET_IPv4_ERR_INVALID_OPT_TYPE;
+             return;
+    }
+
+
+                                                                /* ------------------ PREPARE ROUTE ------------------- */
+    for (opt_route_ix = 0u; opt_route_ix < p_opt_cfg_route_ts->Nbr; opt_route_ix++) {
+                                                                /* Cfg specified or rec route addrs.                    */
+        if (opt_route_spec == DEF_YES) {
+            opt_route_addr =  p_opt_cfg_route_ts->Route[opt_route_ix];
+        } else {
+            opt_route_addr = (NET_IPv4_ADDR)NET_IPv4_ADDR_NONE;
+        }
+        NET_UTIL_VAL_COPY_SET_NET_32(&p_opt_route->Route[opt_route_ix], &opt_route_addr);
+    }
+
+
+   *p_opt_len  = p_opt_route->Len;
+   *p_opt_next = p_opt_cfg_route_ts->NextOptPtr;
+   *p_err      = NET_IPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_TxPktPrepareOptTS()
+*
+* Description : (1) Prepare IPv4 header with Internet Timestamp option :
+*
+*                   (a) Prepare Internet Timestamp option header
+*                   (b) Prepare Internet Timestamps
+*
+*               (2) See RFC #791, Section 3.1 'Options : Internet Timestamp'.
+*
+*
+* Argument(s) : p_opts      Pointer to Internet Timestamp option configuration data structure.
+*               ------      Argument checked   in NetIPv4_TxPktPrepareOpt().
+*
+*               p_opt_hdr   Pointer to IP transmit option buffer to prepare Internet Timestamp option.
+*               ---------   Argument validated in NetIPv4_TxPkt().
+*
+*               p_opt_len   Pointer to variable that will receive the Internet Timestamp option length
+*               ---------        (in octets).
+*
+*                           Argument validated in NetIPv4_TxPktPrepareOpt().
+*
+*               p_opt_next  Pointer to variable that will receive the pointer to the next IPv4 transmit option.
+*               ----------  Argument validated in NetIPv4_TxPktPrepareOpt().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               Internet Timestamp option successfully prepared.
+*                               NET_IPv4_ERR_INVALID_OPT_TYPE   Invalid IPv4 option type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_TxPktPrepareOpt().
+*
+* Note(s)     : (3) Transmit arguments & options validated in NetIPv4_TxPktValidate()/NetIPv4_TxPktValidateOpt() :
+*
+*                   (a) Assumes ALL   transmit arguments & options are valid
+*                   (b) Assumes total transmit options' lengths    are valid
+*
+*               (4) Default case already invalidated in NetIPv4_TxPktValidateOpt().  However, the default
+*                   case is included as an extra precaution in case any of the IPv4 transmit options types
+*                   are incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_TxPktPrepareOptTS (void         *p_opts,
+                                         CPU_INT08U   *p_opt_hdr,
+                                         CPU_INT08U   *p_opt_len,
+                                         void        **p_opt_next,
+                                         NET_ERR      *p_err)
+{
+    NET_IPv4_OPT_CFG_ROUTE_TS  *p_opt_cfg_route_ts;
+    NET_IPv4_OPT_TS            *p_opt_ts;
+    CPU_INT08U                  opt_ts_ovf;
+    CPU_INT08U                  opt_ts_flags;
+    CPU_INT08U                  opt_ts_ix;
+    NET_TS                      opt_ts;
+
+
+                                                                /* ---------------- PREPARE TS OPT HDR ---------------- */
+    p_opt_cfg_route_ts = (NET_IPv4_OPT_CFG_ROUTE_TS *)p_opts;
+
+    switch (p_opt_cfg_route_ts->Type) {
+        case NET_IPv4_OPT_TYPE_TS_ONLY:
+             p_opt_ts            = (NET_IPv4_OPT_TS *)p_opt_hdr;
+             p_opt_ts->Type      =  NET_IPv4_HDR_OPT_TS;
+             p_opt_ts->Len       =  NET_IPv4_HDR_OPT_SIZE_TS + (p_opt_cfg_route_ts->Nbr * sizeof(NET_TS));
+             p_opt_ts->Ptr       =  NET_IPv4_OPT_TS_PTR_TS;
+
+             opt_ts_ovf         =  0u;
+             opt_ts_flags       =  NET_IPv4_OPT_TS_FLAG_TS_ONLY;
+             p_opt_ts->Ovf_Flags =  opt_ts_ovf | opt_ts_flags;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_NONE:
+        default:                                                /* See Note #4.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptTypeCtr);
+            *p_err = NET_IPv4_ERR_INVALID_OPT_TYPE;
+             return;
+    }
+
+
+                                                                /* -------------------- PREPARE TS -------------------- */
+    for (opt_ts_ix = 0u; opt_ts_ix < p_opt_cfg_route_ts->Nbr; opt_ts_ix++) {
+        opt_ts = p_opt_cfg_route_ts->TS[opt_ts_ix];
+        NET_UTIL_VAL_COPY_SET_NET_32(&p_opt_ts->TS[opt_ts_ix], &opt_ts);
+    }
+
+
+   *p_opt_len  = p_opt_ts->Len;
+   *p_opt_next = p_opt_cfg_route_ts->NextOptPtr;
+   *p_err      = NET_IPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv4_TxPktPrepareOptTSRoute()
+*
+* Description : (1) Prepare IPv4 header with Internet Timestamp with IPv4 Route option :
+*
+*                   (a) Prepare Internet Timestamp option header
+*                   (b) Prepare Internet Timestamps
+*
+*               (2) See RFC #791, Section 3.1 'Options : Internet Timestamp'.
+*
+*
+* Argument(s) : p_opts      Pointer to Internet Timestamp option configuration data structure.
+*               ------      Argument checked   in NetIPv4_TxPktPrepareOpt().
+*
+*               p_opt_hdr   Pointer to IP transmit option buffer to prepare Internet Timestamp option.
+*               ---------   Argument validated in NetIPv4_TxPkt().
+*
+*               p_opt_len   Pointer to variable that will receive the Internet Timestamp option length
+*               ---------   Argument validated in NetIPv4_TxPktPrepareOpt().
+*                                   (in octets).
+*
+*               p_opt_next  Pointer to variable that will receive the pointer to the next IPv4 transmit option.
+*               ----------  Argument validated in NetIPv4_TxPktPrepareOpt().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               Internet Timestamp with IP Route option
+*                                                                   successfully prepared.
+*                               NET_IPv4_ERR_INVALID_OPT_TYPE   Invalid IPv4 option type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_TxPktPrepareOpt().
+*
+* Note(s)     : (3) Transmit arguments & options validated in NetIPv4_TxPktValidate()/NetIPv4_TxPktValidateOpt() :
+*
+*                   (a) Assumes ALL   transmit arguments & options are valid
+*                   (b) Assumes total transmit options' lengths    are valid
+*
+*               (4) Default case already invalidated in NetIPv4_TxPktValidateOpt().  However, the default
+*                   case is included as an extra precaution in case any of the IPv4 transmit options types
+*                   are incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_TxPktPrepareOptTSRoute (void         *p_opts,
+                                              CPU_INT08U   *p_opt_hdr,
+                                              CPU_INT08U   *p_opt_len,
+                                              void        **p_opt_next,
+                                              NET_ERR      *p_err)
+{
+    NET_IPv4_OPT_CFG_ROUTE_TS  *p_opt_cfg_route_ts;
+    NET_IPv4_OPT_TS_ROUTE      *p_opt_ts_route;
+    NET_IPv4_ROUTE_TS          *p_route_ts;
+    CPU_INT08U                  opt_ts_ovf;
+    CPU_INT08U                  opt_ts_flags;
+    CPU_INT08U                  opt_ts_ix;
+    NET_TS                      opt_ts;
+    CPU_BOOLEAN                 opt_route_spec;
+    NET_IPv4_ADDR               opt_route_addr;
+
+
+                                                                /* ---------------- PREPARE TS OPT HDR ---------------- */
+    p_opt_cfg_route_ts   = (NET_IPv4_OPT_CFG_ROUTE_TS *)p_opts;
+    p_opt_ts_route       = (NET_IPv4_OPT_TS_ROUTE     *)p_opt_hdr;
+    p_opt_ts_route->Type =  NET_IPv4_HDR_OPT_TS;
+    p_opt_ts_route->Len  =  NET_IPv4_HDR_OPT_SIZE_TS + (p_opt_cfg_route_ts->Nbr * (sizeof(NET_IPv4_ADDR) + sizeof(NET_TS)));
+    p_opt_ts_route->Ptr  =  NET_IPv4_OPT_TS_PTR_TS;
+    opt_ts_ovf          =  0u;
+
+    switch (p_opt_cfg_route_ts->Type) {
+        case NET_IPv4_OPT_TYPE_TS_ROUTE_REC:
+             opt_ts_flags             = NET_IPv4_OPT_TS_FLAG_TS_ROUTE_REC;
+             p_opt_ts_route->Ovf_Flags = opt_ts_ovf | opt_ts_flags;
+             opt_route_spec           = DEF_NO;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_TS_ROUTE_SPEC:
+             opt_ts_flags             = NET_IPv4_OPT_TS_FLAG_TS_ROUTE_SPEC;
+             p_opt_ts_route->Ovf_Flags = opt_ts_ovf | opt_ts_flags;
+             opt_route_spec           = DEF_YES;
+             break;
+
+
+        case NET_IPv4_OPT_TYPE_NONE:
+        default:                                                /* See Note #4.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvOptTypeCtr);
+            *p_err = NET_IPv4_ERR_INVALID_OPT_TYPE;
+             return;
+    }
+
+
+                                                                /* ----------------- PREPARE ROUTE/TS ----------------- */
+    p_route_ts = &p_opt_ts_route->Route_TS[0];
+    for (opt_ts_ix = 0u; opt_ts_ix < p_opt_cfg_route_ts->Nbr; opt_ts_ix++) {
+                                                                /* Cfg specified or rec route addrs.                    */
+        if (opt_route_spec == DEF_YES) {
+            opt_route_addr =  p_opt_cfg_route_ts->Route[opt_ts_ix];
+        } else {
+            opt_route_addr = (NET_IPv4_ADDR)NET_IPv4_ADDR_NONE;
+        }
+        NET_UTIL_VAL_COPY_SET_NET_32(&p_route_ts->Route[opt_ts_ix], &opt_route_addr);
+
+        opt_ts = p_opt_cfg_route_ts->TS[opt_ts_ix];
+        NET_UTIL_VAL_COPY_SET_NET_32(&p_route_ts->TS[opt_ts_ix],    &opt_ts);
+    }
+
+
+   *p_opt_len  = p_opt_ts_route->Len;
+   *p_opt_next = p_opt_cfg_route_ts->NextOptPtr;
+   *p_err      = NET_IPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv4_TxPktPrepareHdr()
+*
+* Description : (1) Prepare IP header :
+*
+*                   (a) Update network buffer's protocol index & length controls
+*
+*                   (b) Prepare the transmit packet's following IP header fields :
+*
+*                       (1) Version
+*                       (2) Header Length
+*                       (3) Type of Service (TOS)
+*                       (4) Total  Length
+*                       (5) Identification  (ID)
+*                       (6) Flags
+*                       (7) Fragment Offset
+*                       (8) Time-to-Live    (TTL)
+*                       (9) Protocol
+*                      (10) Check-Sum                                   See Note #6
+*                      (11) Source      Address
+*                      (12) Destination Address
+*                      (13) Options
+*
+*                   (c) Convert the following IP header fields from host-order to network-order :
+*
+*                       (1) Total Length
+*                       (2) Identification (ID)
+*                       (3) Flags/Fragment Offset
+*                       (4) Source      Address
+*                       (5) Destination Address
+*                       (6) Check-Sum                                   See Note #6c
+*                       (7) Options                                     See Note #5
+*
+*
+* Argument(s) : p_buf               Pointer to network buffer to transmit IP packet.
+*               -----               Argument checked   in NetIPv4_Tx().
+*
+*               p_buf_hdr           Pointer to network buffer header.
+*               ---------           Argument validated in NetIPv4_Tx().
+*
+*               ip_hdr_len_tot      Total IPv4 header length.
+*               ---------------     Argument checked   in NetIPv4_TxPkt().
+*
+*               ip_opt_len_tot      Total IPv4 header options' length.
+*               ---------------     Argument checked   in NetIPv4_TxPktPrepareOpt().
+*
+*               protocol_ix         Index to higher-layer protocol header.
+*
+*               addr_src            Source      IP address.
+*               ---------           Argument checked   in NetIPv4_TxPktValidate().
+*
+*               addr_dest           Destination IPv4 address.
+*               ----------          Argument checked   in NetIPv4_TxPktValidate().
+*
+*               TOS                 Specific TOS to transmit IPv4 packet
+*               ---                     (see 'net_ipv4.h  IPv4 HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*                                   Argument checked   in NetIPv4_TxPktValidate().
+*
+*               TTL                 Specific TTL to transmit IPv4 packet
+*               ---                     (see 'net_ipv4.h  IPv4 HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                                       NET_IPv4_TTL_MIN                minimum TTL transmit value   (1)
+*                                       NET_IPv4_TTL_MAX                maximum TTL transmit value (255)
+*                                       NET_IPv4_TTL_DFLT               default TTL transmit value (128)
+*                                       NET_IPv4_TTL_NONE               replace with default TTL
+*
+*                                   Argument validated in NetIPv4_TxPktValidate().
+*
+*               flags               Flags to select transmit options; bit-field flags logically OR'd :
+*               -----
+*                                       NET_IPv4_FLAG_NONE              No  IPv4 transmit flags selected.
+*                                       NET_IPv4_FLAG_TX_DONT_FRAG      Set IPv4 'Don't Frag' flag.
+*
+*                                   Argument checked   in NetIPv4_TxPktValidate().
+*
+*               p_ip_hdr_opts       Pointer to IPv4 options buffer.
+*               -------------       Argument checked   in NetIPv4_TxPktPrepareOpt().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               IPv4 header successfully prepared.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*
+*                                                               ----------- RETURNED BY NetBuf_DataWr() : -----------
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index  for transmit options.
+*                               NET_BUF_ERR_INVALID_LEN         Invalid buffer length for transmit options.
+*
+*                                                               - RETURNED BY NetUtil_16BitOnesCplChkSumHdrCalc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_TxPkt().
+*
+* Note(s)     : (2) See 'net_ipv4.h  IPv4 HEADER' for IPv4 header format.
+*
+*               (3) Supports ONLY the following protocols :
+*
+*                   (a) ICMP
+*                   (b) IGMP
+*                   (c) UDP
+*                   (d) TCP
+*
+*                   See also 'net.h  Note #2a'.
+*
+*               (4) Default case already invalidated in NetIPv4_TxPktValidate().  However, the default case is
+*                   included as an extra precaution in case 'ProtocolHdrType' is incorrectly modified.
+*
+*               (5) Assumes ALL IPv4 options' multi-octet words previously converted from host-order to
+*                   network-order.
+*
+*               (6) (a) IPv4 header Check-Sum MUST be calculated AFTER the entire IPv4 header has been prepared.
+*                       In addition, ALL multi-octet words are converted from host-order to network-order
+*                       since "the sum of 16-bit integers can be computed in either byte order" [RFC #1071,
+*                       Section 2.(B)].
+*
+*                   (b) IPv4 header Check-Sum field MUST be cleared to '0' BEFORE the IP header Check-Sum is
+*                       calculated (see RFC #791, Section 3.1 'Header Checksum').
+*
+*                   (c) The IPv4 header Check-Sum field is returned in network-order & MUST NOT be re-converted
+*                       back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumHdrCalc()  Note #3b').
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_TxPktPrepareHdr (NET_BUF        *p_buf,
+                                       NET_BUF_HDR    *p_buf_hdr,
+                                       CPU_INT16U      ip_hdr_len_tot,
+                                       CPU_INT08U      ip_opt_len_tot,
+                                       CPU_INT16U      protocol_ix,
+                                       NET_IPv4_ADDR   addr_src,
+                                       NET_IPv4_ADDR   addr_dest,
+                                       NET_IPv4_TOS    TOS,
+                                       NET_IPv4_TTL    TTL,
+                                       CPU_INT16U      flags,
+                                       CPU_INT32U     *p_ip_hdr_opts,
+                                       NET_ERR        *p_err)
+{
+    NET_IPv4_HDR  *p_ip_hdr;
+    CPU_INT08U     ip_ver;
+    CPU_INT08U     ip_hdr_len;
+    CPU_INT16U     ip_id;
+    CPU_INT16U     ip_flags;
+    CPU_INT16U     ip_frag_offset;
+    CPU_INT16U     ip_opt_ix;
+    CPU_INT16U     ip_flags_frag_offset;
+    CPU_INT16U     ip_chk_sum;
+    CPU_BOOLEAN    addr_dest_multicast;
+
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+    p_buf_hdr->IP_HdrLen       =  ip_hdr_len_tot;
+    p_buf_hdr->IP_HdrIx        =  protocol_ix - p_buf_hdr->IP_HdrLen;
+
+    p_buf_hdr->IP_DataLen      = (CPU_INT16U  ) p_buf_hdr->TotLen;
+    p_buf_hdr->IP_DatagramLen  = (CPU_INT16U  ) p_buf_hdr->TotLen;
+    p_buf_hdr->TotLen         += (NET_BUF_SIZE) p_buf_hdr->IP_HdrLen;
+    p_buf_hdr->IP_TotLen       = (CPU_INT16U  ) p_buf_hdr->TotLen;
+
+
+
+                                                                /* ----------------- PREPARE IPv4 HDR ----------------- */
+    p_ip_hdr = (NET_IPv4_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+
+
+
+                                                                /* -------------- PREPARE IP VER/HDR LEN -------------- */
+    ip_ver               = NET_IPv4_HDR_VER;
+    ip_ver             <<= NET_IPv4_HDR_VER_SHIFT;
+
+    ip_hdr_len           = p_buf_hdr->IP_HdrLen / NET_IPv4_HDR_LEN_WORD_SIZE;
+    ip_hdr_len          &= NET_IPv4_HDR_LEN_MASK;
+
+    p_ip_hdr->Ver_HdrLen  = ip_ver | ip_hdr_len;
+
+
+
+                                                                /* ------------------ PREPARE IP TOS ------------------ */
+    p_ip_hdr->TOS = TOS;
+
+
+
+                                                                /* --------------- PREPARE IPv4 TOT LEN --------------- */
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_ip_hdr->TotLen, &p_buf_hdr->TotLen);
+
+
+
+                                                                /* ----------------- PREPARE IPv4 ID ------------------ */
+    NET_IPv4_TX_GET_ID(ip_id);
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_ip_hdr->ID, &ip_id);
+
+
+
+                                                                /* -------------- PREPARE IPv4 FLAGS/FRAG ------------- */
+    ip_flags  = NET_IPv4_HDR_FLAG_NONE;
+    ip_flags |= flags;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    ip_flags &= NET_IPv4_HDR_FLAG_MASK;
+#endif
+
+    ip_frag_offset       = NET_IPv4_HDR_FRAG_OFFSET_NONE;
+
+    ip_flags_frag_offset = ip_flags | ip_frag_offset;
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_ip_hdr->Flags_FragOffset, &ip_flags_frag_offset);
+
+
+
+                                                                /* ----------------- PREPARE IPv4 TTL ----------------- */
+    if (TTL != NET_IPv4_TTL_NONE) {
+        p_ip_hdr->TTL = TTL;
+    } else {
+#ifdef  NET_MCAST_TX_MODULE_EN
+        addr_dest_multicast =  NetIPv4_IsAddrMulticast(addr_dest);
+#else
+        addr_dest_multicast =  DEF_NO;
+#endif
+                                                                /* ... set dflt multicast TTL for multicast dest addr.  */
+        p_ip_hdr->TTL        = (addr_dest_multicast != DEF_YES) ? NET_IPv4_TTL_DFLT
+                                                               : NET_IPv4_TTL_MULTICAST_DFLT;
+    }
+
+
+                                                                /* -------------- PREPARE IPv4 PROTOCOL --------------- */
+    switch (p_buf_hdr->ProtocolHdrType) {                       /* Demux IPv4 protocol (see Note #3).                   */
+        case NET_PROTOCOL_TYPE_ICMP_V4:
+             p_ip_hdr->Protocol = NET_IP_HDR_PROTOCOL_ICMP;
+             break;
+
+
+#ifdef  NET_IGMP_MODULE_EN
+        case NET_PROTOCOL_TYPE_IGMP:
+             p_ip_hdr->Protocol = NET_IP_HDR_PROTOCOL_IGMP;
+             break;
+#endif
+
+
+        case NET_PROTOCOL_TYPE_UDP_V4:
+             p_ip_hdr->Protocol = NET_IP_HDR_PROTOCOL_UDP;
+             break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+        case NET_PROTOCOL_TYPE_TCP_V4:
+             p_ip_hdr->Protocol = NET_IP_HDR_PROTOCOL_TCP;
+             break;
+#endif
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:                                                /* See Note #4.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    p_buf_hdr->ProtocolHdrType    = NET_PROTOCOL_TYPE_IP_V4;    /* Update buf protocol for IPv4.                        */
+    p_buf_hdr->ProtocolHdrTypeNet = NET_PROTOCOL_TYPE_IP_V4;
+
+
+
+                                                                /* ---------------- PREPARE IPv4 ADDRS ---------------- */
+    p_buf_hdr->IP_AddrSrc  = addr_src;
+    p_buf_hdr->IP_AddrDest = addr_dest;
+
+    NET_UTIL_VAL_COPY_SET_NET_32(&p_ip_hdr->AddrSrc,  &addr_src);
+    NET_UTIL_VAL_COPY_SET_NET_32(&p_ip_hdr->AddrDest, &addr_dest);
+
+
+
+                                                                /* ---------------- PREPARE IPv4 OPTS ----------------- */
+    if (ip_opt_len_tot > 0) {
+        ip_opt_ix = p_buf_hdr->IP_HdrIx + NET_IPv4_HDR_OPT_IX;
+        NetBuf_DataWr((NET_BUF    *)p_buf,                      /* See Note #5.                                         */
+                      (NET_BUF_SIZE)ip_opt_ix,
+                      (NET_BUF_SIZE)ip_opt_len_tot,
+                      (CPU_INT08U *)p_ip_hdr_opts,
+                      (NET_ERR    *)p_err);
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (*p_err != NET_BUF_ERR_NONE) {
+             return;
+        }
+#endif
+    }
+
+
+                                                                /* --------------- PREPARE IPv4 CHK SUM --------------- */
+                                                                /* See Note #6.                                         */
+    NET_UTIL_VAL_SET_NET_16(&p_ip_hdr->ChkSum, 0x0000u);        /* Clr  chk sum (see Note #6b).                         */
+                                                                /* Calc chk sum.                                        */
+#ifdef  NET_IPV4_CHK_SUM_OFFLOAD_TX
+    ip_chk_sum = 0u;
+#else
+    ip_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void     *)p_ip_hdr,
+                                                   (CPU_INT16U)ip_hdr_len_tot,
+                                                   (NET_ERR  *)p_err);
+    if (*p_err != NET_UTIL_ERR_NONE) {
+         return;
+    }
+#endif
+
+    NET_UTIL_VAL_COPY_16(&p_ip_hdr->ChkSum, &ip_chk_sum);       /* Copy chk sum in net order (see Note #6c).            */
+
+
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_TxPktDatagram()
+*
+* Description : (1) Transmit IPv4 packet datagram :
+*
+*                   (a) Select next-route IPv4 address
+*                   (b) Transmit IPv4 packet datagram via next IPv4 address route :
+*
+*                       (1) Destination is this host                Send to Loopback Interface
+*                           (A) Configured host address
+*                           (B) Localhost       address
+*
+*                       (2) Limited Broadcast                       Send to Network  Interface Transmit
+*                       (3) Local   Host                            Send to Network  Interface Transmit
+*                       (4) Remote  Host                            Send to Network  Interface Transmit
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to transmit IPv4 packet.
+*               -----       Argument checked   in NetIPv4_Tx(),
+*                                                 NetIPv4_ReTx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIPv4_Tx(),
+*                                                 NetIPv4_ReTx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   - RETURNED BY NetIPv4_TxPktDatagramRouteSel() : -
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST      Invalid IPv4 host    address.
+*                               NET_IPv4_ERR_INVALID_ADDR_GATEWAY   Invalid IPv4 gateway address.
+*                               NET_IPv4_ERR_TX_DEST_INVALID        Invalid transmit destination.
+*
+*                                                                   ---------- RETURNED BY NetIF_Tx() : -----------
+*                               NET_IF_ERR_NONE                     Packet successfully transmitted.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*                               NET_ERR_TX                          Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_ReTxPkt(),
+*               NetIPv4_TxPkt().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_TxPktDatagram (NET_BUF      *p_buf,
+                                     NET_BUF_HDR  *p_buf_hdr,
+                                     NET_ERR      *p_err)
+{
+                                                                /* --------------- SEL NEXT-ROUTE ADDR ---------------- */
+    NetIPv4_TxPktDatagramRouteSel(p_buf_hdr, p_err);
+
+
+    switch (*p_err) {                                           /* --------------- TX IPv4 PKT DATAGRAM --------------- */
+        case NET_IPv4_ERR_TX_DEST_LOCAL_HOST:
+             p_buf_hdr->IF_NbrTx = NET_IF_NBR_LOCAL_HOST;
+             NetIF_Tx(p_buf, p_err);
+             break;
+
+
+        case NET_IPv4_ERR_TX_DEST_BROADCAST:
+        case NET_IPv4_ERR_TX_DEST_MULTICAST:
+        case NET_IPv4_ERR_TX_DEST_HOST_THIS_NET:
+        case NET_IPv4_ERR_TX_DEST_DFLT_GATEWAY:
+             p_buf_hdr->IF_NbrTx = p_buf_hdr->IF_Nbr;
+             NetIF_Tx(p_buf, p_err);
+             break;
+
+
+        case NET_IPv4_ERR_TX_DEST_INVALID:
+        case NET_IPv4_ERR_INVALID_ADDR_HOST:
+        case NET_IPv4_ERR_INVALID_ADDR_GATEWAY:
+        default:
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv4_TxPktDatagramRouteSel()
+*
+* Description : (1) Configure  next-route IPv4 address for transmit IPv4 packet datagram :
+*
+*                   (a) Select next-route IPv4 address :                See Note #3
+*                       (1) Destination is this host :
+*                           (A) Configured host address
+*                           (B) Localhost       address                 See RFC #1122, Section 3.2.1.3.(g)
+*                       (2) Link-local                                  See Note #3c
+*                       (3) Limited Broadcast                           See Note #3b2a
+*                       (4) Multicast                                   See Note #3b2a
+*                       (5) Local  Net Host                             See Note #3b1b
+*                       (6) Remote Net Host                             See Note #3b1c
+*
+*                   (b) Configure next-route IPv4 address in network-order.
+*
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header of IPv4 transmit packet.
+*               ---------   Argument validated in NetIPv4_Tx(),
+*                                                 NetIPv4_ReTx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_TX_DEST_LOCAL_HOST         Destination is a local host address.
+*                               NET_IPv4_ERR_TX_DEST_BROADCAST          Limited broadcast on local  network.
+*                               NET_IPv4_ERR_TX_DEST_MULTICAST          Multicast         on local  network.
+*                               NET_IPv4_ERR_TX_DEST_HOST_THIS_NET      Destination host  on local  network.
+*                               NET_IPv4_ERR_TX_DEST_DFLT_GATEWAY       Destination host  on remote network.
+*                               NET_IPv4_ERR_TX_DEST_INVALID            Invalid IPv4 destination address.
+*
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST          Invalid IPv4 host        address.
+*                               NET_IPv4_ERR_INVALID_ADDR_GATEWAY       Invalid IPv4 gateway     address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_TxPktDatagram().
+*
+* Note(s)     : (2) See 'net_ipv4.h  IPv4 ADDRESS DEFINES  Notes #2 & #3' for supported IPv4 addresses.
+*
+*               (3) (a) (1) RFC #1122, Section 3.3.1 states that "the IP layer chooses the correct next hop
+*                           for each datagram it sends" :
+*
+*                           (A) "If the destination is on a connected network, the datagram is sent directly
+*                                to the destination host;" ...
+*                           (B) "Otherwise, it has to be routed to a gateway on a connected network."
+*
+*                       (2) However, the IPv4 layer should route datagrams destined to any internal host
+*                           to IPv4 receive processing.
+*
+*                           (A) RFC #950, Section 2.2 states that :
+*
+*                                   "IF ip_net_number(dg.ip_dest) = ip_net_number(my_ip_addr)
+*                                       THEN send_dg_locally(dg, dg.ip_dest)"
+*
+*                           (B) RFC #1122, Section 3.2.1.3.(g) states that the "internal host loopback
+*                               address ... MUST NOT appear outside a host".
+*
+*                               (1) However, this does NOT prevent the host loopback address from being
+*                                   used as an IP packet's source address as long as BOTH the packet's
+*                                   source AND destination addresses are internal host addresses, either
+*                                   a configured host IPv4 address or any host loopback address.
+*
+*                   (b) RFC #1122, Section 3.3.1.1 states that "to decide if the destination is on a
+*                       connected network, the following algorithm MUST be used" :
+*
+*                       (1) (b) "If the IPv4 destination address bits extracted by the address mask match the
+*                                IP source address bits extracted by the same mask, then the destination is
+*                                on the corresponding connected network, and the datagram is ... transmitted
+*                                directly to the destination host."
+*
+*                           (c) "If not, then the destination is accessible only through a gateway."
+*
+*                               (1) However, "the host IPv4 layer MUST operate correctly in a minimal network
+*                                   environment, and in particular, when there are no gateways."
+*
+*                       (2) (a) "For a limited broadcast or a multicast address, simply pass the datagram
+*                                to the link layer for the appropriate interface."
+*
+*                           (b) "For a (network or subnet) directed broadcast, the datagram can use the
+*                                standard routing algorithms."
+*
+*                               (1) RFC #950, Section 2.1 'Special Addresses' confirms that the broadcast
+*                                   address for subnetted IPv4 addresses is still "the address of all ones".
+*
+*                   (c) (1) RFC #3927, Section 2.6.2 states that :
+*
+*                           (A) (1) "If ... the host ... send[s] [a] packet with an IPv4 Link-Local source
+*                                    address ... [to] a unicast ... destination address ... outside the
+*                                    169.254/16 prefix, ... then it MUST ARP for the destination address
+*                                    and then send its packet ... directly to its destination on the same
+*                                    physical link."
+*
+*                               (2) "The host MUST NOT send the packet to any router for forwarding."
+*
+*                           (B) (1) (a) "If the destination address is in the 169.254/16 prefix ... then
+*                                        the sender MUST ARP for the destination address and then send its
+*                                        packet directly to the destination on the same physical link."
+*
+*                                   (b) "The host MUST NOT send a packet with an IPv4 Link-Local destination
+*                                        address to any router for forwarding."
+*
+*                               (2) "This MUST be done whether the interface is configured with a Link-Local
+*                                    or a routable IPv4 address."
+*
+*                       (2) (A) RFC #3927, Section 2.8 reiterates that "the non-forwarding rule means that
+*                               hosts may assume that all 169.254/16 destination addresses are 'on-link'
+*                               and directly reachable".
+*
+*                           (B) RFC #3927, Section 2.6.2 concludes that "in the case of a device with a
+*                               single interface and only an Link-Local IPv4 address, this requirement
+*                               can be paraphrased as 'ARP for everything'".
+*
+*                       (3) (A) RFC #3927, Section 2.8   states that "the 169.254/16 address prefix MUST
+*                               NOT be subnetted".
+*
+*                           (B) RFC #3927, Section 2.6.2 states that "169.254.255.255 ... is the broadcast
+*                               address for the Link-Local prefix".
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_TxPktDatagramRouteSel (NET_BUF_HDR  *p_buf_hdr,
+                                             NET_ERR      *p_err)
+{
+    NET_IPv4_ADDRS  *p_ip_addrs;
+    NET_IF_NBR       if_nbr;
+    NET_IPv4_ADDR    addr_src;
+    NET_IPv4_ADDR    addr_dest;
+    CPU_BOOLEAN      addr_cfgd;
+
+
+                                                                        /* ----------- GET IPv4 TX PKT ADDRS ---------- */
+    addr_src  = p_buf_hdr->IP_AddrSrc;
+    addr_dest = p_buf_hdr->IP_AddrDest;
+
+    if_nbr    = p_buf_hdr->IF_Nbr;
+    p_ip_addrs = NetIPv4_GetAddrsHostCfgdOnIF(addr_src, if_nbr);
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_ip_addrs != (NET_IPv4_ADDRS *)0) {
+        if ((p_ip_addrs->AddrHost               == NET_IPv4_ADDR_NONE) ||
+            (p_ip_addrs->AddrHostSubnetMask     == NET_IPv4_ADDR_NONE) ||
+            (p_ip_addrs->AddrHostSubnetMaskHost == NET_IPv4_ADDR_NONE) ||
+            (p_ip_addrs->AddrHostSubnetNet      == NET_IPv4_ADDR_NONE)) {
+            *p_err = NET_IPv4_ERR_INVALID_ADDR_HOST;
+             return;
+        }
+    }
+#endif
+
+                                                                        /* Perform IPv4 routing/fwd'ing alg here?       */
+
+
+                                                                        /* ---------- CHK CFG'D HOST ADDR(S) ---------- */
+                                                                        /* Chk cfg'd host addr(s)   [see Note #3a2A].   */
+    addr_cfgd = NetIPv4_IsAddrHostCfgdHandler(addr_dest);
+    if (addr_cfgd == DEF_YES) {
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestThisHostCtr);
+        p_buf_hdr->IP_AddrNextRoute = addr_dest;
+       *p_err                       = NET_IPv4_ERR_TX_DEST_LOCAL_HOST;
+
+                                                                        /* ----------- CHK LOCALHOST ADDRS ------------ */
+                                                                        /* Chk localhost src   addr (see Note #3a2B1).  */
+    } else if ((addr_src  & NET_IPv4_ADDR_LOCAL_HOST_MASK_NET) ==
+                            NET_IPv4_ADDR_LOCAL_HOST_NET     ) {
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestLocalHostCtr);
+        p_buf_hdr->IP_AddrNextRoute = addr_dest;
+       *p_err                       = NET_IPv4_ERR_TX_DEST_LOCAL_HOST;
+                                                                        /* Chk localhost dest  addr (see Note #3a2B).   */
+    } else if ((addr_dest & NET_IPv4_ADDR_LOCAL_HOST_MASK_NET) ==
+                            NET_IPv4_ADDR_LOCAL_HOST_NET     ) {
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestLocalHostCtr);
+        p_buf_hdr->IP_AddrNextRoute = addr_dest;
+       *p_err                       = NET_IPv4_ERR_TX_DEST_LOCAL_HOST;
+
+                                                                        /* ----------- CHK LINK-LOCAL ADDRS ----------- */
+    } else if (((addr_src  & NET_IPv4_ADDR_LOCAL_LINK_MASK_NET) ==      /* Chk link-local src  addr (see Note #3c1A) OR */
+                             NET_IPv4_ADDR_LOCAL_LINK_NET     ) ||
+               ((addr_dest & NET_IPv4_ADDR_LOCAL_LINK_MASK_NET) ==      /* ... link-local dest addr (see Note #3c1B).   */
+                             NET_IPv4_ADDR_LOCAL_LINK_NET     )) {
+                                                                        /* Chk link-local broadcast (see Note #3c3B).   */
+        if ((addr_dest               & NET_IPv4_ADDR_LOCAL_LINK_MASK_HOST) ==
+            (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_LOCAL_LINK_MASK_HOST)) {
+             NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestBcastCtr);
+             DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_TX_BROADCAST);
+             p_buf_hdr->IP_AddrNextRoute = addr_dest;
+            *p_err                       = NET_IPv4_ERR_TX_DEST_BROADCAST;
+
+        } else {
+            p_buf_hdr->IP_AddrNextRoute = addr_dest;
+           *p_err                       = NET_IPv4_ERR_TX_DEST_HOST_THIS_NET;
+        }
+
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestLocalLinkCtr);
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestLocalNetCtr);
+
+
+                                                                        /* ----------- CHK LIM'D BROADCAST ------------ */
+    } else if (addr_dest == NET_IPv4_ADDR_BROADCAST) {                  /* Chk lim'd broadcast (see Note #3b2a).        */
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestBcastCtr);
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestLocalNetCtr);
+        DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_TX_BROADCAST);
+        p_buf_hdr->IP_AddrNextRoute = addr_dest;
+       *p_err                       = NET_IPv4_ERR_TX_DEST_BROADCAST;
+
+
+#ifdef  NET_MCAST_MODULE_EN                                             /* -------------- CHK MULTICAST --------------- */
+                                                                        /* Chk multicast       (see Note #3b2a).        */
+    } else if ((addr_dest & NET_IPv4_ADDR_CLASS_D_MASK) == NET_IPv4_ADDR_CLASS_D) {
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestMcastCtr);
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestLocalNetCtr);
+        DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_TX_MULTICAST);
+        p_buf_hdr->IP_AddrNextRoute = addr_dest;
+       *p_err                       = NET_IPv4_ERR_TX_DEST_MULTICAST;
+#endif
+
+                                                                        /* ------------- CHK REMOTE HOST -------------- */
+    } else if (p_ip_addrs == (NET_IPv4_ADDRS *)0) {
+       *p_err = NET_IPv4_ERR_INVALID_ADDR_HOST;
+        return;
+
+                                                                        /* ------------- CHK LOCAL  NET --------------- */
+                                                                        /* Chk local subnet           (see Note #3b1b). */
+    } else if ((addr_dest & p_ip_addrs->AddrHostSubnetMask) ==
+                            p_ip_addrs->AddrHostSubnetNet ) {
+                                                                        /* Chk local subnet broadcast (see Note #3b2b1).*/
+        if ((addr_dest               & p_ip_addrs->AddrHostSubnetMaskHost) ==
+            (NET_IPv4_ADDR_BROADCAST & p_ip_addrs->AddrHostSubnetMaskHost)) {
+             NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestBcastCtr);
+             DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_TX_BROADCAST);
+             p_buf_hdr->IP_AddrNextRoute = addr_dest;
+            *p_err                       = NET_IPv4_ERR_TX_DEST_BROADCAST;
+
+        } else {
+             p_buf_hdr->IP_AddrNextRoute = addr_dest;
+            *p_err                       = NET_IPv4_ERR_TX_DEST_HOST_THIS_NET;
+        }
+
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestLocalNetCtr);
+
+
+                                                                        /* ------------- CHK REMOTE  NET -------------- */
+    } else {
+
+                                                                        /* Tx to remote net (see Note #3b1c) ...        */
+        if ((addr_dest & NET_IPv4_ADDR_CLASS_A_MASK) == NET_IPv4_ADDR_CLASS_A) {
+            if ((addr_dest             & NET_IPv4_ADDR_CLASS_A_MASK_HOST) ==
+                (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_A_MASK_HOST)) {
+                 NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestBcastCtr);
+            }
+
+        } else if ((addr_dest & NET_IPv4_ADDR_CLASS_B_MASK) == NET_IPv4_ADDR_CLASS_B) {
+            if ((addr_dest             & NET_IPv4_ADDR_CLASS_B_MASK_HOST) ==
+                (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_B_MASK_HOST)) {
+                 NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestBcastCtr);
+            }
+
+        } else if ((addr_dest & NET_IPv4_ADDR_CLASS_C_MASK) == NET_IPv4_ADDR_CLASS_C) {
+            if ((addr_dest             & NET_IPv4_ADDR_CLASS_C_MASK_HOST) ==
+                (NET_IPv4_ADDR_BROADCAST & NET_IPv4_ADDR_CLASS_C_MASK_HOST)) {
+                 NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestBcastCtr);
+            }
+
+        } else {                                                        /* Discard invalid addr class (see Note #2).    */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv4.TxInvDestCtr);
+           *p_err = NET_IPv4_ERR_TX_DEST_INVALID;
+            return;
+        }
+
+
+        if (p_ip_addrs != (NET_IPv4_ADDRS *)0) {
+            if (p_ip_addrs->AddrDfltGateway == NET_IPv4_ADDR_NONE) {     /* If dflt gateway NOT cfg'd, ...               */
+               *p_err = NET_IPv4_ERR_INVALID_ADDR_GATEWAY;               /* ... rtn err (see Note #3b1c1).               */
+                return;
+            }
+        }
+
+
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv4.TxDestRemoteNetCtr);
+        p_buf_hdr->IP_AddrNextRoute = p_ip_addrs->AddrDfltGateway;      /* ... via dflt gateway (see Note #3a1B).       */
+       *p_err                       = NET_IPv4_ERR_TX_DEST_DFLT_GATEWAY;
+    }
+
+
+                                                                        /* ---- CFG IPv4 NEXT ROUTE NET-ORDER ADDR ---- */
+    p_buf_hdr->IP_AddrNextRouteNetOrder = NET_UTIL_HOST_TO_NET_32(p_buf_hdr->IP_AddrNextRoute);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv4_TxPktDiscard()
+*
+* Description : On any IPv4 transmit packet error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_ReTx(),
+*               NetIPv4_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_TxPktDiscard (NET_BUF  *p_buf,
+                                    NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.IPv4.TxPktDisCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetIPv4_ReTxPkt()
+*
+* Description : (1) Prepare & re-transmit IPv4 packet :
+*
+*                   (a) Prepare     IPv4 header
+*                   (b) Re-transmit IPv4 packet datagram
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to re-transmit IPv4 packet.
+*               -----       Argument checked   in NetIPv4_ReTx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIPv4_ReTx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   - RETURNED BY NetIPv4_ReTxPktPrepareHdr() : -
+*                               NET_UTIL_ERR_NULL_PTR               Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE              Check-sum passed a zero size.
+*
+*                                                                   -- RETURNED BY NetIPv4_TxPktDatagram() : --
+*                               NET_IF_ERR_NONE                     Packet successfully transmitted.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST      Invalid IPv4 host    address.
+*                               NET_IPv4_ERR_INVALID_ADDR_GATEWAY   Invalid IPv4 gateway address.
+*                               NET_IPv4_ERR_TX_DEST_INVALID        Invalid transmit destination.
+*                               NET_ERR_TX                          Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_ReTx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_ReTxPkt (NET_BUF      *p_buf,
+                               NET_BUF_HDR  *p_buf_hdr,
+                               NET_ERR      *p_err)
+{
+                                                                /* ----------------- PREPARE IPv4 HDR ----------------- */
+    NetIPv4_ReTxPktPrepareHdr(p_buf,
+                            p_buf_hdr,
+                            p_err);
+    if (*p_err != NET_IPv4_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------- RE-TX IPv4 PKT DATAGRAM -------------- */
+    NetIPv4_TxPktDatagram(p_buf, p_buf_hdr, p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_ReTxPktPrepareHdr()
+*
+* Description : (1) Prepare IPv4 header for re-transmit IPv4 packet :
+*
+*                   (a) Update network buffer's protocol & length controls
+*
+*                   (b) (1) Prepare the re-transmit packet's following IPv4 header fields :
+*
+*                           (A) Identification  (ID)                        See Note #2
+*                           (B) Check-Sum                                   See Note #3
+*
+*                       (2) Assumes the following IP header fields are already validated/prepared &
+*                           have NOT been modified :
+*
+*                           (A) Version
+*                           (B) Header Length
+*                           (C) Type of Service (TOS)
+*                           (D) Total  Length
+*                           (E) Flags
+*                           (F) Fragment Offset
+*                           (G) Time-to-Live    (TTL)
+*                           (H) Protocol
+*                           (I) Source      Address
+*                           (J) Destination Address
+*                           (K) Options
+*
+*                   (c) Convert the following IPv4 header fields from host-order to network-order :
+*
+*                       (1) Identification (ID)
+*                       (2) Check-Sum                                       See Note #3c
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to transmit IPv4 packet.
+*               -----       Argument checked   in NetIPv4_Tx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetIPv4_Tx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE               IPv4 header successfully prepared.
+*
+*                                                               - RETURNED BY NetUtil_16BitOnesCplChkSumHdrCalc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_ReTxPkt().
+*
+* Note(s)     : (2) RFC #1122, Section 3.2.1.5 states that "some Internet protocol experts have maintained
+*                   that when a host sends an identical copy of an earlier datagram, the new copy should
+*                   contain the same Identification value as the original ... However, ... we believe that
+*                   retransmitting the same Identification field is not useful".
+*
+*               (3) (a) IP header Check-Sum MUST be calculated AFTER the entire IPv4 header has been prepared.
+*                       In addition, ALL multi-octet words are converted from host-order to network-order
+*                       since "the sum of 16-bit integers can be computed in either byte order" [RFC #1071,
+*                       Section 2.(B)].
+*
+*                   (b) IPv4 header Check-Sum field MUST be cleared to '0' BEFORE the IPv4 header Check-Sum is
+*                       calculated (see RFC #791, Section 3.1 'Header Checksum').
+*
+*                   (c) The IPv4 header Check-Sum field is returned in network-order & MUST NOT be re-converted
+*                       back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumHdrCalc()  Note #3b').
+*********************************************************************************************************
+*/
+
+static  void  NetIPv4_ReTxPktPrepareHdr (NET_BUF      *p_buf,
+                                         NET_BUF_HDR  *p_buf_hdr,
+                                         NET_ERR      *p_err)
+{
+    NET_IPv4_HDR  *p_ip_hdr;
+    CPU_INT16U     ip_id;
+    CPU_INT16U     ip_hdr_len_tot;
+    CPU_INT16U     ip_chk_sum;
+
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+    p_buf_hdr->ProtocolHdrType    =  NET_PROTOCOL_TYPE_IP_V4;   /* Update buf protocol for IPv4.                        */
+    p_buf_hdr->ProtocolHdrTypeNet =  NET_PROTOCOL_TYPE_IP_V4;
+                                                                /* Reset tot len for re-tx.                             */
+    p_buf_hdr->TotLen             = (NET_BUF_SIZE)p_buf_hdr->IP_TotLen;
+
+
+                                                                /* ----------------- PREPARE IPv4 HDR ----------------- */
+    p_ip_hdr = (NET_IPv4_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+
+
+                                                                /* ----------------- PREPARE IPv4 ID ------------------ */
+    NET_IPv4_TX_GET_ID(ip_id);                                  /* Get new IP ID (see Note #2).                         */
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_ip_hdr->ID, &ip_id);
+
+                                                                /* --------------- PREPARE IPv4 CHK SUM --------------- */
+                                                                /* See Note #3.                                         */
+    NET_UTIL_VAL_SET_NET_16(&p_ip_hdr->ChkSum, 0x0000u);        /* Clr  chk sum (see Note #3b).                         */
+    ip_hdr_len_tot = p_buf_hdr->IP_HdrLen;
+#ifdef  NET_IPV4_CHK_SUM_OFFLOAD_TX                          /* Calc chk sum.                                        */
+    ip_chk_sum     = 0u;
+#else
+    ip_chk_sum     = NetUtil_16BitOnesCplChkSumHdrCalc((void     *)p_ip_hdr,
+                                                       (CPU_INT16U)ip_hdr_len_tot,
+                                                       (NET_ERR  *)p_err);
+    if (*p_err != NET_UTIL_ERR_NONE) {
+         return;
+    }
+#endif
+
+    NET_UTIL_VAL_COPY_16(&p_ip_hdr->ChkSum, &ip_chk_sum);       /* Copy chk sum in net order (see Note #3c).            */
+
+
+   (void)&ip_hdr_len_tot;
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                      NetIPv4_IsAddrHostHandler()
+*
+* Description : (1) Validate an IPv4 address as an IPv4 host address :
+*
+*                   (a) A configured IPv4 host address (on an enabled interface)
+*                   (b) A 'Localhost'     IPv4 address
+*
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #3).
+*
+* Return(s)   : DEF_YES, if IPv4 address is one of the host's IP addresses.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv4_IsAddrHost(),
+*               NetIPv4_RxPktValidate().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv4_IsAddrHostHandler() is called by network protocol suite function(s) & MUST
+*                   be called with the global network lock already acquired.
+*
+*                   See also 'NetIPv4_IsAddrHost()  Note #2'.
+*
+*               (3) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetIPv4_IsAddrHostHandler (NET_IPv4_ADDR  addr)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  addr_host;
+
+
+    if_nbr    =  NetIPv4_GetAddrHostIF_Nbr(addr);
+    addr_host = (if_nbr != NET_IF_NBR_NONE) ? DEF_YES : DEF_NO;
+
+    return (addr_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv4_IsAddrHostCfgdHandler()
+*
+* Description : Validate an IPv4 address as a configured IPv4 host address on an enabled interface.
+*
+* Argument(s) : addr        IPv4 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv4 address is one of the host's configured IPv4 addresses.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv4_IsAddrHostCfgd(),
+*               NetIPv4_CfgAddrAdd(),
+*               NetIPv4_CfgAddrAddDynamic(),
+*               NetIPv4_RxPktValidate(),
+*               NetIPv4_TxPktValidate(),
+*               NetIPv4_TxPktDatagramRouteSel().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (1) NetIPv4_IsAddrHostCfgdHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetIPv4_IsAddrHostCfgd()  Note #1'.
+*
+*               (2) IPv4 address MUST be in host-order.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetIPv4_IsAddrHostCfgdHandler (NET_IPv4_ADDR  addr)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  addr_host;
+
+
+    if_nbr    =  NetIPv4_GetAddrHostCfgdIF_Nbr(addr);
+    addr_host = (if_nbr != NET_IF_NBR_NONE) ? DEF_YES : DEF_NO;
+
+    return (addr_host);
+}
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                 NETWORK MANAGER INTERFACE FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_GetHostAddrProtocol()
+*
+* Description : Get an interface's IPv4 protocol address(s) [see Note #1].
+*
+* Argument(s) : if_nbr                      Interface number to get IPv4 protocol address(s).
+*
+*               p_addr_protocol_tbl         Pointer to a protocol address table that will receive the protocol
+*                                               address(s) in network-order for this interface.
+*
+*               p_addr_protocol_tbl_qty     Pointer to a variable to ... :
+*
+*                                               (a) Pass the size of the protocol address table, in number of
+*                                                       protocol address(s), pointed to by 'p_addr_protocol_tbl'.
+*                                               (b) (1) Return the actual number of IPv4 protocol address(s),
+*                                                           if NO error(s);
+*                                                   (2) Return 0, otherwise.
+*
+*                                           See also Note #2a.
+*
+*               p_addr_protocol_len         Pointer to a variable to ... :
+*
+*                                               (a) Pass the length of the protocol address table address(s),
+*                                                       in octets.
+*                                               (b) (1) Return the actual length of IPv4 protocol address(s),
+*                                                           in octets, if NO error(s);
+*                                                   (2) Return 0, otherwise.
+*
+*                                           See also Note #2b.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   Interface's IPv4 protocol address(s)
+*                                                                       successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR               Argument(s) passed a NULL pointer.
+*                               NET_IPv4_ERR_INVALID_ADDR_LEN       Invalid protocol address length.
+*                               NET_IPv4_ERR_ADDR_TBL_SIZE          Invalid protocol address table size.
+*
+*                                                                   - RETURNED BY NetIPv4_GetAddrHostHandler() : -
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IP_ERR_ADDR_CFG_IN_PROGRESS     Interface in dynamic address configuration
+*                                                                       initialization state.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMgr_GetHostAddrProtocol().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) IPv4 protocol address(s) returned in network-order.
+*
+*               (2) (a) Since 'p_addr_protocol_tbl_qty' argument is both an input & output argument
+*                       (see 'Argument(s) : p_addr_protocol_tbl_qty'), ... :
+*
+*                       (1) Its input value SHOULD be validated prior to use; ...
+*
+*                           (A) In the case that the 'p_addr_protocol_tbl_qty' argument is passed a null
+*                               pointer, NO input value is validated or used.
+*
+*                           (B) The protocol address table's size MUST be greater than or equal to each
+*                               interface's maximum number of IPv4 protocol addresses times the size of
+*                               an IPv4 protocol address :
+*
+*                               (1) (p_addr_protocol_tbl_qty *  >=  [ NET_IPv4_CFG_IF_MAX_NBR_ADDR *
+*                                    p_addr_protocol_len    )         sizeof(NET_IPv4_ADDR)      ]
+*
+*                       (2) While its output value MUST be initially configured to return a default value
+*                           PRIOR to all other validation or function handling in case of any error(s).
+*
+*                   (b) Since 'p_addr_protocol_len' argument is both an input & output argument
+*                       (see 'Argument(s) : p_addr_protocol_len'), ... :
+*
+*                       (1) Its input value SHOULD be validated prior to use; ...
+*
+*                           (A) In the case that the 'p_addr_protocol_len' argument is passed a null pointer,
+*                               NO input value is validated or used.
+*
+*                           (B) The table's protocol address(s) length SHOULD be greater than or equal to the
+*                               size of an IPv4 protocol address :
+*
+*                               (1) p_addr_protocol_len  >=  sizeof(NET_IPv4_ADDR)
+*
+*                       (2) While its output value MUST be initially configured to return a default value
+*                           PRIOR to all other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+void  NetIPv4_GetHostAddrProtocol (NET_IF_NBR   if_nbr,
+                                   CPU_INT08U  *p_addr_protocol_tbl,
+                                   CPU_INT08U  *p_addr_protocol_tbl_qty,
+                                   CPU_INT08U  *p_addr_protocol_len,
+                                   NET_ERR     *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT16U          addr_protocol_tbl_size;
+    CPU_INT16U         addr_ip_tbl_size;
+    CPU_INT08U         addr_protocol_tbl_qty;
+    CPU_INT08U         addr_protocol_len;
+#endif
+    CPU_INT08U        *p_addr_protocol;
+    NET_IPv4_ADDR     *p_addr_ip;
+    NET_IPv4_ADDR      addr_ip_tbl[NET_IPv4_CFG_IF_MAX_NBR_ADDR];
+    NET_IP_ADDRS_QTY   addr_ip_tbl_qty;
+    NET_IP_ADDRS_QTY   addr_ix;
+    CPU_INT08U         addr_ip_len;
+
+
+                                                                /* ------------ VALIDATE PROTOCOL ADDR TBL ------------ */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_protocol_tbl_qty == (CPU_INT08U *)0) {           /* See Note #2a1A.                                      */
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+     addr_protocol_tbl_qty = *p_addr_protocol_tbl_qty;
+#endif
+   *p_addr_protocol_tbl_qty =  0u;                              /* Cfg dflt tbl qty for err  (see Note #2a2).           */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_protocol_len == (CPU_INT08U *)0) {               /* See Note #2b1A.                                      */
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+     addr_protocol_len = *p_addr_protocol_len;
+#endif
+   *p_addr_protocol_len =  0u;                                  /* Cfg dflt addr len for err (see Note #2b2).           */
+    addr_ip_len        =  sizeof(NET_IPv4_ADDR);
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_protocol_tbl == (CPU_INT08U *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (addr_protocol_len < addr_ip_len) {                      /* Validate protocol addr len      (see Note #2b1B).    */
+       *p_err = NET_IPv4_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+
+    addr_protocol_tbl_size = addr_protocol_tbl_qty        * addr_protocol_len;
+    addr_ip_tbl_size       = NET_IPv4_CFG_IF_MAX_NBR_ADDR * addr_ip_len;
+    if (addr_protocol_tbl_size < addr_ip_tbl_size) {            /* Validate protocol addr tbl size (see Note #2a1B).    */
+       *p_err = NET_IPv4_ERR_ADDR_TBL_SIZE;
+        return;
+    }
+#endif
+
+
+                                                                /* ------------- GET IPv4 PROTOCOL ADDRS -------------- */
+    addr_ip_tbl_qty = sizeof(addr_ip_tbl) / sizeof(NET_IPv4_ADDR);
+   (void)NetIPv4_GetAddrHostHandler((NET_IF_NBR        ) if_nbr,
+                                    (NET_IPv4_ADDR    *)&addr_ip_tbl[0],
+                                    (NET_IP_ADDRS_QTY *)&addr_ip_tbl_qty,
+                                    (NET_ERR          *) p_err);
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+        case NET_IPv4_ERR_ADDR_NONE_AVAIL:
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS:
+        case NET_IPv4_ERR_ADDR_TBL_SIZE:
+        default:
+             return;
+    }
+
+    addr_ix        =  0u;
+    p_addr_ip       = &addr_ip_tbl[addr_ix];
+    p_addr_protocol = &p_addr_protocol_tbl[addr_ix];
+    while (addr_ix <  addr_ip_tbl_qty) {                        /* Rtn all IPv4 protocol addr(s) ...                    */
+        NET_UTIL_VAL_COPY_SET_NET_32(p_addr_protocol, p_addr_ip); /* ... in net-order (see Note #1).                    */
+        p_addr_protocol += addr_ip_len;
+        p_addr_ip++;
+        addr_ix++;
+    }
+
+                                                                /* Rtn nbr & len of IPv4 protocol addr(s).              */
+   *p_addr_protocol_tbl_qty = (CPU_INT08U)addr_ip_tbl_qty;
+   *p_addr_protocol_len     = (CPU_INT08U)addr_ip_len;
+
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv4_GetAddrProtocolIF_Nbr()
+*
+* Description : (1) Get the interface number for a host's IPv4 protocol address :
+*
+*                   (a) A configured IPv4 host address (on an enabled interface)
+*                   (b) A 'Localhost'          address
+*                   (c) An           IPv4 host initialization address
+*
+*
+* Argument(s) : p_addr_protocol     Pointer to protocol address (see Note #2).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   IPv4 protocol address's interface number
+*                                                                       successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_addr_protocol' passed a NULL
+*                                                                       pointer.
+*                               NET_IPv4_ERR_INVALID_ADDR_LEN       Invalid IPv4 protocol address length.
+*                               NET_IPv4_ERR_INVALID_ADDR_HOST      IPv4 protocol address NOT used by host.
+*
+* Return(s)   : Interface number for IPv4 protocol address, if configured on this host.
+*
+*               Interface number of  IPv4 protocol address
+*                   in address initialization,              if available.
+*
+*               NET_IF_NBR_LOCAL_HOST,                      for a localhost address.
+*
+*               NET_IF_NBR_NONE,                            otherwise.
+*
+* Caller(s)   : NetMgr_GetHostAddrProtocolIF_Nbr().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (2) Protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+NET_IF_NBR  NetIPv4_GetAddrProtocolIF_Nbr (CPU_INT08U  *p_addr_protocol,
+                                           CPU_INT08U   addr_protocol_len,
+                                           NET_ERR     *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT08U     addr_ip_len;
+#endif
+    NET_IPv4_ADDR  addr_ip;
+    NET_IF_NBR     if_nbr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE PROTOCOL ADDR ------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (NET_IF_NBR_NONE);
+    }
+
+    addr_ip_len = sizeof(NET_IPv4_ADDR);
+    if (addr_protocol_len != addr_ip_len) {
+       *p_err =  NET_IPv4_ERR_INVALID_ADDR_LEN;
+        return (NET_IF_NBR_NONE);
+    }
+#else
+   (void)&addr_protocol_len;                                        /* Prevent 'variable unused' compiler warning.      */
+#endif
+
+                                                                    /* ------- GET IPv4 PROTOCOL ADDR's IF NBR -------- */
+    NET_UTIL_VAL_COPY_GET_NET_32(&addr_ip, p_addr_protocol);
+    if_nbr =  NetIPv4_GetAddrHostIF_Nbr(addr_ip);
+   *p_err   = (if_nbr != NET_IF_NBR_NONE) ? NET_IPv4_ERR_NONE
+                                         : NET_IPv4_ERR_INVALID_ADDR_HOST;
+
+    return (if_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv4_IsValidAddrProtocol()
+*
+* Description : Validate an IPv4 protocol address.
+*
+* Argument(s) : p_addr_protocol      Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+* Return(s)   : DEF_YES, if IPv4 protocol address valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetMgr_IsValidAddrProtocol().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) IPv4 protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsValidAddrProtocol (CPU_INT08U  *p_addr_protocol,
+                                          CPU_INT08U   addr_protocol_len)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT08U     addr_ip_len;
+#endif
+    NET_IPv4_ADDR  addr_ip;
+    CPU_BOOLEAN    valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE PROTOCOL ADDR ------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+        return (DEF_NO);
+    }
+
+    addr_ip_len = sizeof(NET_IPv4_ADDR);
+    if (addr_protocol_len != addr_ip_len) {
+        return (DEF_NO);
+    }
+#else
+   (void)&addr_protocol_len;                                        /* Prevent 'variable unused' compiler warning.      */
+#endif
+
+                                                                    /* --------- VALIDATE IPv4 PROTOCOL ADDR ---------- */
+    NET_UTIL_VAL_COPY_GET_NET_32(&addr_ip, p_addr_protocol);
+    valid = NetIPv4_IsValidAddrHost(addr_ip);
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIPv4_IsAddrInit()
+*
+* Description : Validate an IPv4 protocol address as the initialization address.
+*
+* Argument(s) : p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+* Return(s)   : DEF_YES, if IPv4 protocol address is the initialization address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetMgr_IsAddrProtocolInit().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) IPv4 protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrInit (CPU_INT08U  *p_addr_protocol,
+                                 CPU_INT08U   addr_protocol_len)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT08U     addr_ip_len;
+#endif
+    NET_IPv4_ADDR  addr_ip;
+    CPU_BOOLEAN    addr_init;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE PROTOCOL ADDR ------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+        return (DEF_NO);
+    }
+
+    addr_ip_len = sizeof(NET_IPv4_ADDR);
+    if (addr_protocol_len != addr_ip_len) {
+        return (DEF_NO);
+    }
+#else
+   (void)&addr_protocol_len;                                        /* Prevent 'variable unused' compiler warning.      */
+#endif
+
+                                                                    /* ------- VALIDATE IPv4 PROTOCOL INIT ADDR ------- */
+    NET_UTIL_VAL_COPY_GET_NET_32(&addr_ip, p_addr_protocol);
+    addr_init = NetIPv4_IsAddrThisHost(addr_ip);
+
+    return (addr_init);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv4_IsAddrProtocolMulticast()
+*
+* Description : Validate an IPv4 protocol address as a multicast address.
+*
+* Argument(s) : p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+* Return(s)   : DEF_YES, if IPv4 protocol address is a multicast address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetMgr_IsAddrProtocolMulticast().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) IPv4 protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+CPU_BOOLEAN  NetIPv4_IsAddrProtocolMulticast (CPU_INT08U  *p_addr_protocol,
+                                              CPU_INT08U   addr_protocol_len)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT08U     addr_ip_len;
+#endif
+    NET_IPv4_ADDR  addr_ip;
+    CPU_BOOLEAN    addr_multicast;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE PROTOCOL ADDR ------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+        return (DEF_NO);
+    }
+
+    addr_ip_len = sizeof(NET_IPv4_ADDR);
+    if (addr_protocol_len != addr_ip_len) {
+        return (DEF_NO);
+    }
+#else
+   (void)&addr_protocol_len;                                        /* Prevent 'variable unused' compiler warning.      */
+#endif
+
+                                                                    /* ------- VALIDATE IPv4 PROTOCOL INIT ADDR ------- */
+    NET_UTIL_VAL_COPY_GET_NET_32(&addr_ip, p_addr_protocol);
+    addr_multicast = NetIPv4_IsAddrMulticast(addr_ip);
+
+    return (addr_multicast);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv4_IsAddrProtocolConflict()
+*
+* Description : Get interface's IPv4 protocol address conflict status.
+*
+* Argument(s) : if_nbr      Interface number to get IPv4 protocol address conflict status.
+*
+* Return(s)   : DEF_YES, if IPv4 protocol address conflict detected.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetMgr_IsAddrProtocolConflict().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) (a) RFC #3927, Section 2.5 states that :
+*
+*                       (1) "If a host receives ... [a] packet ... on an interface where"             ...
+*                           (A) "the 'sender IP       address' is the IP address the host has configured
+*                                 for that interface, but"                                            ...
+*                           (B) "the 'sender hardware address' does not match the hardware address of
+*                                     that interface,"                                                ...
+*                       (2) "then this is a conflicting ... packet, indicating an address conflict."
+*
+*                   (b) Any address conflict between this host's IPv4 protocol address(s) & other host(s)
+*                       on the local network is latched until checked & reset.
+*
+*                   See also 'NetIPv4_ChkAddrProtocolConflict()  Note #2'.
+*
+*               (2) Interfaces' IPv4 address configuration 'AddrProtocolConflict' variables MUST ALWAYS
+*                   be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv4_IsAddrProtocolConflict (NET_IF_NBR  if_nbr)
+{
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+     NET_IF_NBR       valid;
+     NET_ERR          err;
+#endif
+    NET_IPv4_IF_CFG  *p_ip_if_cfg;
+    CPU_BOOLEAN       addr_conflict;
+    CPU_SR_ALLOC();
+
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+                                                                    /* --------------- VALIDATE IF NBR ---------------- */
+    valid = NetIF_IsValidHandler(if_nbr, &err);
+    if (valid != DEF_YES) {
+        return  (DEF_NO);
+    }
+#endif
+
+                                                                    /* ------- CHK IPv4 PROTOCOL ADDR CONFLICT -------- */
+    p_ip_if_cfg = &NetIPv4_IF_CfgTbl[if_nbr];
+
+    CPU_CRITICAL_ENTER();
+    addr_conflict                    = p_ip_if_cfg->AddrProtocolConflict;
+    p_ip_if_cfg->AddrProtocolConflict = DEF_NO;                     /* Clr addr conflict (see Note #1b).                */
+    CPU_CRITICAL_EXIT();
+
+    return (addr_conflict);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv4_ChkAddrProtocolConflict()
+*
+* Description : Check for any IPv4 protocol address conflict between this interface's IPv4 host address(s)
+*                   & other host(s) on the local network.
+*
+* Argument(s) : if_nbr              Interface number to get IPv4 protocol address conflict status.
+*
+*               p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length of  protocol address (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv4_ERR_NONE                   Protocol address conflict successfully checked.
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_addr_protocol' passed a NULL
+*                                                                       pointer.
+*                               NET_IPv4_ERR_INVALID_ADDR_LEN       Invalid IPv4 protocol address length.
+*
+*                                                                   - RETURNED BY NetIPv4_GetAddrHostHandler() : --
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS   Interface in dynamic address initialization.
+*                               NET_IPv4_ERR_ADDR_TBL_SIZE          Invalid IP address table size.
+*
+*                                                                   ---- RETURNED BY NetIF_IsValidHandler() : -----
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMgr_ChkAddrProtocolConflict().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) IPv4 protocol address MUST be in network-order.
+*
+*               (2) (a) RFC #3927, Section 2.5 states that :
+*
+*                       (1) "If a host receives ... [a] packet ... on an interface where"             ...
+*                           (A) "the 'sender IP       address' is the IP address the host has configured
+*                                 for that interface, but"                                            ...
+*                           (B) "the 'sender hardware address' does not match the hardware address of
+*                                     that interface,"                                                ...
+*                       (2) "then this is a conflicting ... packet, indicating an address conflict."
+*
+*                   (b) Any address conflict between this host's IPv4 protocol address(s) & other host(s)
+*                       on the local network is latched until checked & reset.
+*
+*                   See also 'NetIPv4_IsAddrProtocolConflict()  Note #1'.
+*
+*               (3) Network layer manager SHOULD eventually be responsible for maintaining each
+*                   interface's network address(s)' configuration. #### NET-809
+*
+*                   See also 'net_mgr.c  Note #1'.
+*********************************************************************************************************
+*/
+
+void  NetIPv4_ChkAddrProtocolConflict (NET_IF_NBR   if_nbr,
+                                       CPU_INT08U  *p_addr_protocol,
+                                       CPU_INT08U   addr_protocol_len,
+                                       NET_ERR     *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT08U       addr_ip_len;
+#endif
+    NET_IPv4_IF_CFG   *p_ip_if_cfg;
+    NET_IPv4_ADDR     *p_addr_ip;
+    NET_IPv4_ADDR      addr_ip_tbl[NET_IPv4_CFG_IF_MAX_NBR_ADDR];
+    NET_IP_ADDRS_QTY   addr_ip_tbl_qty;
+    CPU_INT08U         addr_ix;
+    CPU_BOOLEAN        addr_conflict;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE PROTOCOL ADDR ------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    addr_ip_len = sizeof(NET_IPv4_ADDR);
+    if (addr_protocol_len != addr_ip_len) {
+       *p_err = NET_IPv4_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+#endif
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+                                                                    /* --------------- VALIDATE IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+
+                                                                    /* ----------- GET IPv4 PROTOCOL ADDRS ------------ */
+    addr_ip_tbl_qty = sizeof(addr_ip_tbl) / sizeof(NET_IPv4_ADDR);
+   (void)NetIPv4_GetAddrHostHandler((NET_IF_NBR        ) if_nbr,
+                                    (NET_IPv4_ADDR    *)&addr_ip_tbl[0],
+                                    (NET_IP_ADDRS_QTY *)&addr_ip_tbl_qty,
+                                    (NET_ERR          *) p_err);
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+        case NET_IPv4_ERR_ADDR_NONE_AVAIL:
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS:
+        case NET_IPv4_ERR_ADDR_TBL_SIZE:
+        default:
+             return;
+    }
+
+
+                                                                    /* ------ CHK IPv4 PROTOCOL ADDR(S) CONFLICT ------ */
+    addr_ix       =  0u;
+    p_addr_ip      = &addr_ip_tbl[addr_ix];
+    addr_conflict =  DEF_NO;
+
+    while ((addr_ix < addr_ip_tbl_qty) &&                           /* Srch ALL cfg'd addrs ...                         */
+           (addr_conflict == DEF_NO)) {                             /* ... for protocol addr conflict (see Note #2a1A). */
+
+       *p_addr_ip      = NET_UTIL_HOST_TO_NET_32(*p_addr_ip);
+        addr_conflict = Mem_Cmp((void     *)p_addr_protocol,
+                                (void     *)p_addr_ip,
+                                (CPU_SIZE_T)addr_protocol_len);
+        p_addr_ip++;
+        addr_ix++;
+    }
+
+    if (addr_conflict == DEF_YES) {                                 /* If protocol addrs conflict, ...                  */
+        p_ip_if_cfg                       = &NetIPv4_IF_CfgTbl[if_nbr];
+        CPU_CRITICAL_ENTER();
+        p_ip_if_cfg->AddrProtocolConflict =  DEF_YES;               /* ... set addr conflict (see Note #1a2).           */
+        CPU_CRITICAL_EXIT();
+    }
+
+
+   *p_err = NET_IPv4_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* NET_IPv4_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_ipv4.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_ipv4.h
new file mode 100644
index 0000000..26778d7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_ipv4.h
@@ -0,0 +1,1132 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     NETWORK IP LAYER VERSION 4
+*                                       (INTERNET PROTOCOL V4)
+*
+* Filename      : net_ipv4.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 SL
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Supports Internet Protocol as described in RFC #791, also known as IPv4, with the
+*                     following restrictions/constraints :
+*
+*                     (a) ONLY supports a single default gateway                RFC #1122, Section 3.3.1
+*                             per interface
+*
+*                     (b) IP forwarding/routing  NOT currently supported        RFC #1122, Sections 3.3.1,
+*                                                                                           3.3.4 & 3.3.5
+*
+*                     (c) Transmit fragmentation NOT currently supported        RFC # 791, Section 2.3
+*                                                                                           'Fragmentation &
+*                                                                                              Reassembly'
+*                     (d) IP Security options    NOT           supported        RFC #1108
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../../Source/net_ip.h"
+#include  "../../Source/net_type.h"
+#include  "../../Source/net_tmr.h"
+#include  "../../Source/net_cfg_net.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Network IPv4 Layer module is required for applications that requires IPv4 services.
+*
+*               See also 'net_cfg.h  IP LAYER CONFIGURATION'.
+*
+*           (2) The following IP-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require IPv4 Layer
+*               configuration (see 'net_cfg_net.h  IP LAYER CONFIGURATION  Note #2b') :
+*
+*                   NET_IPv4_MODULE_EN
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IPv4_MODULE_PRESENT
+#define  NET_IPv4_MODULE_PRESENT
+
+
+#ifdef   NET_IPv4_MODULE_EN                                /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef NET_IPv4_MODULE
+#define  NET_IPv4_EXT
+#else
+#define  NET_IPv4_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         IPv4 HEADER DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_HDR_SIZE_TOT_MIN                      (NET_IF_HDR_SIZE_TOT_MIN + NET_IPv4_HDR_SIZE_MIN)
+#define  NET_IPv4_HDR_SIZE_TOT_MAX                      (NET_IF_HDR_SIZE_TOT_MAX + NET_IPv4_HDR_SIZE_MAX)
+
+#define  NET_IPv4_HDR_SIZE                                20u
+
+#define  NET_IPv4_ID_NONE                                  0u
+
+
+
+typedef  CPU_INT32U  NET_IPv4_OPT_SIZE;                         /* IPv4 opt size data type (see Note #4).               */
+
+#define  NET_IPv4_HDR_OPT_SIZE_WORD              (sizeof(NET_IPv4_OPT_SIZE))
+#define  NET_IPv4_HDR_OPT_SIZE_MAX                      (NET_IPv4_HDR_SIZE_MAX - NET_IPv4_HDR_SIZE_MIN)
+
+#define  NET_IPv4_HDR_OPT_NBR_MIN                          0
+#define  NET_IPv4_HDR_OPT_NBR_MAX                       (NET_IPv4_HDR_OPT_SIZE_MAX / NET_IPv4_HDR_OPT_SIZE_WORD)
+
+#define  NET_IPv4_OPT_PARAM_NBR_MAX                        9    /* Max nbr of 'max nbr opts'.                           */
+
+
+/*
+*********************************************************************************************************
+*                              IPv4 HEADER TYPE OF SERVICE (TOS) DEFINES
+*
+* Note(s) : (1) (a) See 'IPv4 HEADER  Note #3'                   for TOS            fields.
+*
+*               (b) See RFC # 791, Section 3.1 'Type of Service' for TOS Precedence values.
+*
+*               (c) See RFC #1349, Section 4                     for TOS            values.
+*
+*           (2) RFC #1122, Section 3.2.1.6 states that "the default ... TOS field ... is all zero bits."
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_HDR_TOS_PRECEDNCE_ROUTINE             0x00u
+#define  NET_IPv4_HDR_TOS_PRECEDNCE_PRIO                0x20u
+#define  NET_IPv4_HDR_TOS_PRECEDNCE_IMMED               0x40u
+#define  NET_IPv4_HDR_TOS_PRECEDNCE_FLASH               0x60u
+#define  NET_IPv4_HDR_TOS_PRECEDNCE_FLASH_OVERRIDE      0x80u
+#define  NET_IPv4_HDR_TOS_PRECEDNCE_CRITIC_ECP          0xA0u
+#define  NET_IPv4_HDR_TOS_PRECEDNCE_INTERNET_CTRL       0xC0u
+#define  NET_IPv4_HDR_TOS_PRECEDNCE_NET_CTRL            0xE0u
+
+#define  NET_IPv4_HDR_TOS_PRECEDNCE_MASK                0xE0u
+#define  NET_IPv4_HDR_TOS_PRECEDNCE_DFLT                 NET_IPv4_HDR_TOS_PRECEDNCE_ROUTINE
+
+
+#define  NET_IPv4_HDR_TOS_NONE                          0x00u
+#define  NET_IPv4_HDR_TOS_LO_DLY                        0x10u
+#define  NET_IPv4_HDR_TOS_HI_THRUPUT                    0x08u
+#define  NET_IPv4_HDR_TOS_HI_RELIABILITY                0x04u
+#define  NET_IPv4_HDR_TOS_LO_COST                       0x02u
+
+#define  NET_IPv4_HDR_TOS_MASK                          0x1Eu
+#define  NET_IPv4_HDR_TOS_DFLT                           NET_IPv4_HDR_TOS_NONE
+
+
+#define  NET_IPv4_HDR_TOS_MBZ_MASK                      0x01u
+#define  NET_IPv4_HDR_TOS_MBZ_DFLT                      0x00u
+
+#define  NET_IPv4_HDR_TOS_RESERVED                       NET_IPv4_HDR_TOS_MBZ_DFLT
+
+                                                                /* See Note #2.                                         */
+#define  NET_IPv4_TOS_DFLT                              (NET_IPv4_HDR_TOS_PRECEDNCE_DFLT | \
+                                                         NET_IPv4_HDR_TOS_DFLT           | \
+                                                         NET_IPv4_HDR_TOS_MBZ_DFLT)
+
+#define  NET_IPv4_TOS_NONE                                 NET_IPv4_TOS_DFLT
+
+/*
+*********************************************************************************************************
+*                               IPv4 HEADER TIME-TO-LIVE (TTL) DEFINES
+*
+* Note(s) : (1) RFC #1122, Section 3.2.1.7 states that :
+*
+*               (a) "A host MUST NOT send a datagram with a Time-to-Live (TTL) value of zero."
+*
+*               (b) "When a fixed TTL value is used, it MUST be configurable."
+*
+*                   NOT yet implemented. #### NET-817
+*
+*           (2) (a) RFC #1112, Section 6.1 states that "if the upper-layer protocol chooses not to
+*                   specify a time-to-live, it should default to 1 for all multicast IPv4 datagrams,
+*                   so that an explicit choice is required to multicast beyond a single network".
+*
+*               (b) RFC #1112, Appendix I, Section 'Informal Protocol Description' states that
+*                   "queries ... carry an IP time-to-live of 1" & that a "report is sent ... with
+*                   an IPv4 time-to-live of 1".
+*
+*                   Hence, every IGMP message uses a Time-to-Live (TTL) value of 1.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_HDR_TTL_NONE                             0    /* On IPv4 Tx, subst _DFLT for _NONE (see Note #1a).    */
+#define  NET_IPv4_HDR_TTL_MIN                              1
+#define  NET_IPv4_HDR_TTL_MAX                            255
+#define  NET_IPv4_HDR_TTL_DFLT                           128    /* See Note #1b.                                        */
+
+#define  NET_IPv4_TTL_NONE                               NET_IPv4_HDR_TTL_NONE
+#define  NET_IPv4_TTL_MIN                                NET_IPv4_HDR_TTL_MIN
+#define  NET_IPv4_TTL_MAX                                NET_IPv4_HDR_TTL_MAX
+#define  NET_IPv4_TTL_DFLT                               NET_IPv4_HDR_TTL_DFLT
+
+#define  NET_IPv4_TTL_MULTICAST_DFLT                       1    /* See Note #2a.                                        */
+#define  NET_IPv4_TTL_MULTICAST_IGMP                       1    /* See Note #2b.                                        */
+
+
+/*
+*********************************************************************************************************
+*                                    IPv4 DATA/TOTAL LENGTH DEFINES
+*
+* Note(s) : (1) (a) IPv4 total length #define's (NET_IPv4_TOT_LEN)  relate to the total size of a complete
+*                   IPv4 datagram, including the packet's IPv4 header.  Note that a complete IPv4 datagram
+*                   MAY be fragmented in multiple IPv4 packets.
+*
+*               (b) IPv4 data  length #define's (NET_IPv4_DATA_LEN) relate to the data  size of a complete
+*                   IPv4 datagram, equal to the total IPv4 datagram length minus its IPv4 header size.  Note
+*                   that a complete IPv4 datagram MAY be fragmented in multiple IPv4 packets.
+*
+*           (2) RFC #791, Section 3.1 'Total Length' "recommend[s] that hosts only send datagrams larger
+*               than 576 octets if ... the destination is prepared to accept the larger datagrams"; while
+*               RFC #879, Section 1 requires that "HOSTS MUST NOT SEND DATAGRAMS LARGER THAN 576 OCTETS
+*               UNLESS ... THE DESTINATION HOST IS PREPARED TO ACCEPT LARGER DATAGRAMS".
+*********************************************************************************************************
+*/
+
+                                                                                /* See Notes #1a & #1b.                 */
+#define  NET_IPv4_DATA_LEN_MIN                             0
+
+#define  NET_IPv4_TOT_LEN_MIN                           (NET_IPv4_HDR_SIZE_MIN + NET_IPv4_DATA_LEN_MIN)
+#define  NET_IPv4_TOT_LEN_MAX                            DEF_INT_16U_MAX_VAL
+
+#define  NET_IPv4_DATA_LEN_MAX                          (NET_IPv4_TOT_LEN_MAX  - NET_IPv4_HDR_SIZE_MIN)
+
+
+#define  NET_IPv4_MAX_DATAGRAM_SIZE_DFLT                 576                    /* See Note #2.                         */
+
+
+/*
+*********************************************************************************************************
+*                                      IPv4 HEADER FLAG DEFINES
+*
+* Note(s) : (1) See 'IPv4 HEADER  Note #4' for flag fields.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_HDR_FLAG_MASK                       0xE000u
+
+#define  NET_IPv4_HDR_FLAG_NONE                   DEF_BIT_NONE
+#define  NET_IPv4_HDR_FLAG_RESERVED               DEF_BIT_15    /* MUST be '0'.                                         */
+#define  NET_IPv4_HDR_FLAG_FRAG_DONT              DEF_BIT_14
+#define  NET_IPv4_HDR_FLAG_FRAG_MORE              DEF_BIT_13
+
+
+/*
+*********************************************************************************************************
+*                                     IPv4 FRAGMENTATION DEFINES
+*
+* Note(s) : (1) (a) (1) RFC #791, Section 3.2 'Fragmentation and Reassembly' states that :
+*
+*                       (A) "Fragments are counted in units of 8 octets."
+*                       (B) "The minimum fragment is 8 octets."
+*
+*                   (2) However, this CANNOT apply to the last fragment in a fragmented datagram :
+*
+*                       (A) Which may be of ANY size; ...
+*                       (B) But SHOULD be at least one octet.
+*
+*               (b) RFC #791, Section 3.2 'Fragmentation and Reassembly : An Example Reassembly Procedure'
+*                   states that "the current recommendation for the [IP fragmentation reassembly] timer
+*                   setting is 15 seconds ... [but] this may be changed ... with ... experience".
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_HDR_FRAG_OFFSET_MASK                0x1FFFu
+#define  NET_IPv4_HDR_FRAG_OFFSET_NONE                     0
+#define  NET_IPv4_HDR_FRAG_OFFSET_MIN                      0
+#define  NET_IPv4_HDR_FRAG_OFFSET_MAX                   8191
+
+
+#define  NET_IPv4_FRAG_SIZE_UNIT                           8    /* Frag size unit = 8 octets (see Note #1a1).           */
+
+#define  NET_IPv4_FRAG_SIZE_NONE                         DEF_INT_16U_MAX_VAL
+#define  NET_IPv4_FRAG_SIZE_MIN_FRAG_MORE                NET_IPv4_FRAG_SIZE_UNIT    /* See Note #1a1B.                  */
+#define  NET_IPv4_FRAG_SIZE_MIN_FRAG_LAST                  1                        /* See Note #1a2B.                  */
+#define  NET_IPv4_FRAG_SIZE_MAX                       (((NET_IPv4_TOT_LEN_MAX - NET_IPv4_HDR_SIZE_MIN) / NET_IPv4_FRAG_SIZE_UNIT) \
+                                                                                                       * NET_IPv4_FRAG_SIZE_UNIT)
+
+                                                                /* IPv4 frag reasm timeout (see Note #1b) :             */
+#define  NET_IPv4_FRAG_REASM_TIMEOUT_MIN_SEC               1    /* IPv4 frag reasm timeout min  =  1 seconds            */
+#define  NET_IPv4_FRAG_REASM_TIMEOUT_MAX_SEC              15    /* IPv4 frag reasm timeout max  = 15 seconds            */
+#define  NET_IPv4_FRAG_REASM_TIMEOUT_DFLT_SEC              5    /* IPv4 frag reasm timeout dflt =  5 seconds            */
+
+
+/*
+*********************************************************************************************************
+*                                        IPv4 ADDRESS DEFINES
+*
+* Note(s) : (1) See the following RFC's for IPv4 address summary :
+*
+*               (a) RFC # 791, Section 3.2     'Addressing'
+*               (b) RFC # 950, Section 2.1
+*               (c) RFC #1122, Section 3.2.1.3
+*               (d) RFC #3927, Section 2.1
+*
+*           (2) (a) Supports IPv4 Class A, B, C & D Network addresses ONLY as specified by RFC #791,
+*                   Section 3.2 'Addressing : Address Format' & RFC #1112, Section 4 :
+*
+*                       Class  High Order Bits
+*                       -----  ---------------
+*                        (A)         0
+*                        (B)         10
+*                        (C)         110
+*                        (D)         1110
+*
+*               (b) (1) RFC #1519 states that "the concept of network 'class' needs to be deprecated"
+*                       (Section 4.1) in order to "support classless network destinations" which will
+*                       "permit arbitrary super/subnetting of the remaining class A and class B [and
+*                       class C] address space (the assumption being that classless ... non-contiguous
+*                       subnets ... will be contained within a single ... domain)" (Section 2.2).
+*
+*                       However, despite the aggregated, classless network address space; individual
+*                       class definitions MUST still be used to validate IPv4 addresses as within a
+*                       network address space -- versus multicast, reserved, or experimental addresses.
+*
+*                   (2) RFC #950, Section 2.1 states that "the bits that identify the subnet ... need
+*                       not be adjacent in the address.  However, we recommend that the subnet bits be
+*                       contiguous and located as the most significant bits of the local address".
+*
+*                       #### Therefore, it is assumed that at least the most significant bit of the
+*                       network portion of the subnet address SHOULD be set.
+*
+*           (3) (a) Currently supports 'This Host' initialization address ONLY :
+*
+*                   (1) This      Host                      0.0.0.0         See RFC #1122, Section 3.2.1.3.(a)
+*
+*                       Specified host initialization addresses NOT currently supported :
+*
+*                   (2) Specified Host                      0.        See RFC #1122, Section 3.2.1.3.(b)
+*
+*               (b) Supports 'Localhost' loopback address :
+*
+*                   (1) Localhost                         127.        See RFC #1122, Section 3.2.1.3.(g)
+*
+*                   (2) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 2.7, Page 28 states
+*                       that "most implementations support a 'loopback interface' that allows a ... host
+*                       to communicate with" itself :
+*
+*                       (A) "The class A network ID 127 is reserved for the loopback interface."
+*                       (B) For "this [loopback] interface ... most systems assign" ... :
+*                           (1) "the IP address of 127.0.0.1 ... and" ...
+*                           (2) "the name 'localhost'."
+*
+*               (c) Supports auto-configured, link-local IPv4 addresses :
+*
+*                   (1) Link-local Hosts                169.254.      See RFC #3927, Section 2.1
+*
+*                   (2) (A) RFC #3927, Section 2.1 specifies the "IPv4 Link-Local address ... range ...
+*                           [as] inclusive" ... :
+*
+*                           (1) "from 169.254.1.0" ...
+*                           (2) "to   169.254.254.255".
+*
+*                       (B) RFC #3927, Section 2.6.2 states that "169.254.255.255 ... is the broadcast
+*                           address for the Link-Local prefix".
+*
+*                       (C) RFC #3927, Section 2.8   states that "the 169.254/16 address prefix MUST
+*                           NOT be subnetted".
+*
+*               (d) Supports multicast host addresses :
+*
+*                   (1) RFC #1112, Section 4 specifies that "class D ... host group addresses range" :
+*
+*                       (A) "from 224.0.0.0" ...
+*                       (B) "to   239.255.255.255".
+*
+*                   (2) However, RFC #1112, Section 4 adds that :
+*
+*                       (A) "address 224.0.0.0 is guaranteed not to be assigned to any group", ...
+*                       (B) "and 224.0.0.1 is assigned to the permanent group of all IP hosts."
+*
+*               (e) Currently supports limited & directed-network broadcasts ONLY :
+*
+*                   (1) Limited          Broadcast      255.255.255.255     See RFC #1122, Section 3.2.1.3.(c)
+*                   (2) Directed-Network Broadcast        .<-1>        See RFC #1122, Section 3.2.1.3.(d)
+*                   (3) Directed-Subnet  Broadcast   ..<-1>   See RFC #1122, Section 3.2.1.3.(e)
+*
+*                       Directed-subnets broadcasts NOT currently supported #### NET-801
+*
+*                   (4) Directed-Subnets Broadcast   ..<-1>   See RFC #1122, Section 3.2.1.3.(f)
+*
+*           (4) IPv4 addresses expressed in IPv4 dotted-decimal notation, ww.xx.yy.zz, #define'd as :
+*
+*                    (((NET_IPv4_ADDR) ww << (3 * DEF_OCTET_NBR_BITS)) | \
+*                     ((NET_IPv4_ADDR) xx << (2 * DEF_OCTET_NBR_BITS)) | \
+*                     ((NET_IPv4_ADDR) yy << (1 * DEF_OCTET_NBR_BITS)) | \
+*                     ((NET_IPv4_ADDR) zz << (0 * DEF_OCTET_NBR_BITS)))
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_ADDR_CLASS_A                    0x00000000u           /* Class-A IPv4 addr (see Note #2a1A).          */
+#define  NET_IPv4_ADDR_CLASS_A_MASK               0x80000000u
+#define  NET_IPv4_ADDR_CLASS_A_MASK_NET           0xFF000000u
+#define  NET_IPv4_ADDR_CLASS_A_MASK_HOST          0x00FFFFFFu
+
+#define  NET_IPv4_ADDR_CLASS_B                    0x80000000u           /* Class-B IPv4 addr (see Note #2a1B).          */
+#define  NET_IPv4_ADDR_CLASS_B_MASK               0xC0000000u
+#define  NET_IPv4_ADDR_CLASS_B_MASK_NET           0xFFFF0000u
+#define  NET_IPv4_ADDR_CLASS_B_MASK_HOST          0x0000FFFFu
+
+#define  NET_IPv4_ADDR_CLASS_C                    0xC0000000u           /* Class-C IPv4 addr (see Note #2a1C).          */
+#define  NET_IPv4_ADDR_CLASS_C_MASK               0xE0000000u
+#define  NET_IPv4_ADDR_CLASS_C_MASK_NET           0xFFFFFF00u
+#define  NET_IPv4_ADDR_CLASS_C_MASK_HOST          0x000000FFu
+
+#define  NET_IPv4_ADDR_CLASS_D                    0xE0000000u           /* Class-D IPv4 addr (see Note #2a1D).          */
+#define  NET_IPv4_ADDR_CLASS_D_MASK               0xF0000000u
+
+
+#define  NET_IPv4_ADDR_CLASS_SUBNET_MASK_MIN      0x80000000u           /* See Note #2b2.                               */
+
+
+
+                                                                        /* 'This Host' IPv4 init addr (see Note #3a1).  */
+#define  NET_IPv4_ADDR_THIS_HOST          (((NET_IPv4_ADDR)  0uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                           ((NET_IPv4_ADDR)  0uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                           ((NET_IPv4_ADDR)  0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                           ((NET_IPv4_ADDR)  0uL << (0u * DEF_OCTET_NBR_BITS)))
+
+#define  NET_IPv4_ADDR_NONE                  NET_IPv4_ADDR_THIS_HOST
+
+#define  NET_IPv4_ADDR_ANY                   NET_IPv4_ADDR_NONE
+
+
+                                                                        /* Localhost net            (see Note #3b1).    */
+#define  NET_IPv4_ADDR_LOCAL_HOST_NET                (((NET_IPv4_ADDR)127uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (0u * DEF_OCTET_NBR_BITS)))
+
+                                                                        /* Localhost typical  addr  (see Note #3b2B1).  */
+#define  NET_IPv4_ADDR_LOCAL_HOST_ADDR               (((NET_IPv4_ADDR)127uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  1uL << (0u * DEF_OCTET_NBR_BITS)))
+
+                                                                        /* Localhost min host addr.                     */
+#define  NET_IPv4_ADDR_LOCAL_HOST_MIN                (((NET_IPv4_ADDR)127uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  1uL << (0u * DEF_OCTET_NBR_BITS)))
+                                                                        /* Localhost max host addr.                     */
+#define  NET_IPv4_ADDR_LOCAL_HOST_MAX                (((NET_IPv4_ADDR)127uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)255uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)255uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)254uL << (0u * DEF_OCTET_NBR_BITS)))
+
+#if 0
+                                                                        /* Private network 10.x.x.x                     */
+#define  NET_IPv4_ADDR_PRIVATE_NET_10                (((NET_IPv4_ADDR) 10uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (0u * DEF_OCTET_NBR_BITS)))
+
+#define  NET_IPv4_ADDR_PRIVATE_NET_10_DFTL_GATEWAY   (((NET_IPv4_ADDR) 10uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  1uL << (0u * DEF_OCTET_NBR_BITS)))
+
+                                                                        /* Private network 172.16.x.x                     */
+#define  NET_IPv4_ADDR_PRIVATE_NET_172               (((NET_IPv4_ADDR) 172uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  16uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)   0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)   0uL << (0u * DEF_OCTET_NBR_BITS)))
+
+#define  NET_IPv4_ADDR_PRIVATE_NET_172_DFTL_GATEWAY  (((NET_IPv4_ADDR) 172uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  16uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)   0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)   1uL << (0u * DEF_OCTET_NBR_BITS)))
+
+                                                                        /* Private network 192.168.x.x                     */
+#define  NET_IPv4_ADDR_PRIVATE_NET_192               (((NET_IPv4_ADDR) 192uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR) 168uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)   0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)   0uL << (0u * DEF_OCTET_NBR_BITS)))
+
+#define  NET_IPv4_ADDR_PRIVATE_NET_192_DFTL_GATEWAY  (((NET_IPv4_ADDR)  192uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  168uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)    0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)    1uL << (0u * DEF_OCTET_NBR_BITS)))
+#endif
+
+                                                                        /* Link-local net           (see Note #3c1).    */
+#define  NET_IPv4_ADDR_LOCAL_LINK_NET                (((NET_IPv4_ADDR)169uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)254uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (0u * DEF_OCTET_NBR_BITS)))
+
+                                                                        /* Link-local broadcast     (see Note #3c2B).   */
+#define  NET_IPv4_ADDR_LOCAL_LINK_BROADCAST          (((NET_IPv4_ADDR)169uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)254uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)255uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)255uL << (0u * DEF_OCTET_NBR_BITS)))
+
+                                                                        /* Link-local min host addr (see Note #3c2A1).  */
+#define  NET_IPv4_ADDR_LOCAL_LINK_HOST_MIN           (((NET_IPv4_ADDR)169uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)254uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  1uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)  0uL << (0u * DEF_OCTET_NBR_BITS)))
+                                                                        /* Link-local max host addr (see Note #3c2A2).  */
+#define  NET_IPv4_ADDR_LOCAL_LINK_HOST_MAX           (((NET_IPv4_ADDR)169uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)254uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)254uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                                      ((NET_IPv4_ADDR)255uL << (0u * DEF_OCTET_NBR_BITS)))
+
+
+
+
+                                                                        /* Multicast min       addr (see Note #3d2).    */
+#define  NET_IPv4_ADDR_MULTICAST_MIN       (((NET_IPv4_ADDR)224uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)  0uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)  0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)  1uL << (0u * DEF_OCTET_NBR_BITS)))
+                                                                        /* Multicast max       addr (see Note #3d1B).   */
+#define  NET_IPv4_ADDR_MULTICAST_MAX       (((NET_IPv4_ADDR)239uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)255uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)255uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)255uL << (0u * DEF_OCTET_NBR_BITS)))
+
+                                                                        /* Multicast min host  addr (see Note #3d2A).   */
+#define  NET_IPv4_ADDR_MULTICAST_HOST_MIN  (((NET_IPv4_ADDR)224uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)  0uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)  0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)  2uL << (0u * DEF_OCTET_NBR_BITS)))
+                                                                        /* Multicast max host  addr (see Note #3d1B).   */
+#define  NET_IPv4_ADDR_MULTICAST_HOST_MAX     NET_IPv4_ADDR_MULTICAST_MAX
+
+                                                                        /* Multicast all-hosts addr (see Note #3d2B).   */
+#define  NET_IPv4_ADDR_MULTICAST_ALL_HOSTS (((NET_IPv4_ADDR)224uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)  0uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)  0uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)  1uL << (0u * DEF_OCTET_NBR_BITS)))
+
+
+
+                                                                        /* Limited broadcast addr   (see Note #3e1).    */
+#define  NET_IPv4_ADDR_BROADCAST           (((NET_IPv4_ADDR)255uL << (3u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)255uL << (2u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)255uL << (1u * DEF_OCTET_NBR_BITS)) | \
+                                            ((NET_IPv4_ADDR)255uL << (0u * DEF_OCTET_NBR_BITS)))
+
+
+#define  NET_IPv4_ADDR_LOCAL_HOST_MASK_NET          0xFF000000u
+#define  NET_IPv4_ADDR_LOCAL_HOST_MASK_HOST         0x00FFFFFFu
+
+#define  NET_IPv4_ADDR_LOCAL_LINK_MASK_NET          0xFFFF0000u
+#define  NET_IPv4_ADDR_LOCAL_LINK_MASK_HOST         0x0000FFFFu
+
+
+/*
+*********************************************************************************************************
+*                                           IP FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET IP FLAGS ------------------- */
+#define  NET_IPv4_FLAG_NONE                           DEF_BIT_NONE
+
+                                                                /* IP tx flags copied from IP hdr flags.                */
+#define  NET_IPv4_FLAG_TX_DONT_FRAG                   NET_IPv4_HDR_FLAG_FRAG_DONT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/**********************************************************************************************************
+*                                   IPv4 OPTION CONFIGURATION TYPE
+*
+* Note(s) : (1) NET_IPv4_OPT_CFG_TYPE_&&& #define values specifically chosen as ASCII representations of
+*               the IP option configuration types.  Memory displays of IPv4 option configuration buffers
+*               will display the IPv4 option configuration TYPEs with their chosen ASCII names.
+*********************************************************************************************************
+*/
+
+typedef enum net_ipv4_opt_type {
+    NET_IPv4_OPT_TYPE_NONE = 0,
+    NET_IPv4_OPT_TYPE_ROUTE_STRICT,
+    NET_IPv4_OPT_TYPE_ROUTE_LOOSE,
+    NET_IPv4_OPT_TYPE_ROUTE_REC,
+    NET_IPv4_OPT_TYPE_TS_ONLY,
+    NET_IPv4_OPT_TYPE_TS_ROUTE_REC,
+    NET_IPv4_OPT_TYPE_TS_ROUTE_SPEC,
+    NET_IPv4_OPT_TYPE_SECURITY,
+    NET_IPv4_OPT_SECURITY_EXTENDED
+} NET_IPv4_OPT_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                       IPv4 ADDRESS DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------- CFG'D IPv4 ADDRS ----------------- */
+typedef  struct  net_ipv4_addrs {
+    NET_IPv4_ADDR  AddrHost;                                    /* IPv4 host addr.                                      */
+    NET_IPv4_ADDR  AddrHostSubnetMask;                          /* IPv4 subnet net  mask.                               */
+    NET_IPv4_ADDR  AddrHostSubnetMaskHost;                      /* IPv4 subnet host mask.                               */
+    NET_IPv4_ADDR  AddrHostSubnetNet;                           /* IPv4 subnet      net.                                */
+    NET_IPv4_ADDR  AddrDfltGateway;                             /* IPv4 dflt gateway (see 'net_ipv4.h  Note #1a').      */
+} NET_IPv4_ADDRS;
+
+
+/*
+*********************************************************************************************************
+*                      NETWORK INTERFACES' IPv4 ADDRESS CONFIGURATION DATA TYPE
+*
+* Note(s) : (1) Each configurable interface maintains its own unique IPv4 address configuration :
+*
+*               Network layer manager MAY eventually maintain each interface's network address(s)
+*                    & address configuration (see 'net_mgr.h  Note #1').
+*
+*               (a) Configured IPv4 addresses are organized in an address table implemented as an array :
+*
+*                   (1) (A) (1) NET_IPv4_CFG_IF_MAX_NBR_ADDR configures each interface's maximum number of
+*                               configured IPv4 addresses.
+*
+*                           (2) This value is used to declare the size of each interface's address table.
+*
+*                       (B) Each configurable interface's 'AddrsNbrCfgd' indicates the current number of
+*                           configured IPv4 addresses.
+*
+*                   (2) Each address table is zero-based indexed :
+*
+*                       (A) Configured addresses are organized contiguously from indices '0' to 'N - 1'.
+*
+*                       (B) NO addresses         are configured             from indices 'N' to 'M - 1',
+*                           for 'N' NOT equal to 'M'.
+*
+*                       (C) The next available table index to add a configured address is at index 'N',
+*                           if  'N' NOT equal to 'M'.
+*
+*                       (D) Each address table is initialized, & also de-configured, with NULL address
+*                           value NET_IPv4_ADDR_NONE, at ALL table indices following configured addresses.
+*
+*                               where
+*                                       M       maximum number of configured addresses (see Note #1a1A)
+*                                       N       current number of configured addresses (see Note #1a1B)
+*
+*               (b) (1) An interface may be configured with either :
+*
+*                       (A) One or more statically- configured IPv4 addresses (default configuration)
+*                               OR
+*                       (B) Exactly one dynamically-configured IPv4 address
+*
+*                   (2) (A) (1) If an interface's IPv4 host address(s) are NOT already configured statically,
+*                               the application is NOT allowed to add a statically-configured IPv4 address.
+*
+*                           (2) The application MUST remove any dynamically-configured IPv4 address before
+*                               adding any statically-configured IPv4 address(s).
+*
+*                       (B) If any IPv4 host address(s) are configured on an interface when the application
+*                           configures a dynamically-configured IPv4 address, then ALL configured IPv4
+*                           address(s) are removed before configuring the dynamically-configured IPv4 address.
+*
+*                       (C) If NO IPv4 host address(s) are configured on an interface after the application
+*                           removes ALL configured IPv4 address(s), then the interface's IPv4 host address
+*                           configuration is defaulted back to statically-configured (see Note #1b1A).
+*
+*
+*        Each interface's                                 Configured IPv4
+*   IPv4 Address Configuration                            Addresses Table
+*         (see Note #1)                                   (see Note #1a)
+*
+*   --------------------------        -------------------------------------------------------       -----            -----
+*   |  Cfg'd IPv4 Addrs Tbl  | -----> |  Cfg'd Addr #0  | Subnet Mask #0  | Dflt Gateway #0 |         ^                ^
+*   |------------------------|        |-----------------|-----------------|-----------------|         |                |
+*   |  Nbr Cfg'd IPv4 Addrs  |        |  Cfg'd Addr #1  | Subnet Mask #1  | Dflt Gateway #1 |                          |
+*   |------------------------|        |-----------------|-----------------|-----------------|   Current number         |
+*   |     Addr Cfg State     |        |  Cfg'd Addr #2  | Subnet Mask #2  | Dflt Gateway #2 |   of configured          |
+*   |------------------------|        |-----------------|-----------------|-----------------|   IPv4 addresses         |
+*   | Addr Protocol Conflict |        |        .        |        .        |        .        |  on an interface         |
+*   --------------------------        |        .        |        .        |        .        |  (see Note #1a1B)
+*                                     |        .        |        .        |        .        |                    Maximum number
+*                                     |-----------------|-----------------|-----------------|         |          of configured
+*                                     |  Cfg'd Addr #N  | Subnet Mask #N  | Dflt Gateway #N |         v          IPv4 addresses
+*           Next available            |-----------------|-----------------|-----------------|       -----       for an interface
+*        address to configure  -----> |    ADDR NONE    |    ADDR NONE    |    ADDR NONE    |         ^         (see Note #1a1A)
+*          (see Note #1a2C)           |-----------------|-----------------|-----------------|         |
+*                                     |        .        |        .        |        .        |                          |
+*                                     |        .        |        .        |        .        |   Non-configured         |
+*                                     |        .        |        .        |        .        |  address entries         |
+*                                     |        .        |        .        |        .        |  (see Note #1a2D)        |
+*                                     |        .        |        .        |        .        |                          |
+*                                     |-----------------|-----------------|-----------------|         |                |
+*                                     |    ADDR NONE    |    ADDR NONE    |    ADDR NONE    |         v                v
+*                                     -------------------------------------------------------       -----            -----
+*
+*
+*********************************************************************************************************
+*/
+
+                                                                    /* ------------ IFs' IPv4 ADDR(S) CFG ------------- */
+                                                                    /* IFs' IPv4 addr(s) cfg state : ...                */
+typedef  CPU_INT08U  NET_IPv4_ADDR_CFG_STATE;                       /* ... STATIC vs. DYNAMIC    (see Note #1b).        */
+
+
+typedef  struct  net_ipv4_if_cfg {
+    NET_IPv4_ADDRS           AddrsTbl[NET_IPv4_CFG_IF_MAX_NBR_ADDR];/* IF's   cfg'd IPv4 addr(s)     [see Note #1a].    */
+    NET_IP_ADDRS_QTY         AddrsNbrCfgd;                          /* Nbr of cfg'd IP   addr(s)     [see Note #1a1B].  */
+
+    NET_IPv4_ADDR_CFG_STATE  AddrCfgState;                          /* IF's IPv4 addr(s) cfg state (see Note #1b).      */
+    CPU_BOOLEAN              AddrProtocolConflict;                  /* Indicates a protocol addr conflict between  ...  */
+                                                                    /* ... this IF's cfg'd  addr(s) & other hosts' ...  */
+                                                                    /* ... addr(s) on local net.                        */
+} NET_IPv4_IF_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                            IPv4 HEADER
+*
+* Note(s) : (1) See RFC #791, Section 3.1 for IPv4 datagram header format.
+*
+*           (2) IPv4 Version Number & Header Length are encoded in the first octet of an IPv4 header as
+*               follows :
+*
+*                         7 6 5 4   3 2 1 0
+*                       ---------------------
+*                       |  V E R  | H L E N |
+*                       ---------------------
+*
+*                   where
+*                           VER         IPv4 version; currently 4 (see 'net_ipv4.h  Note #1')
+*                           HLEN        IPv4 Headers' length in 32-bit words; MUST be at least 5 (20-octet header)
+*                                           & MUST be less than or equal to 15 (60-octet header)
+*
+*           (3) Type of Service (TOS) is encoded in the second octet of an IPv4 header as follows (see 'RFC #1349
+*               Type of Service in the Internet Protocol Suite' for required TOS implementation) :
+*
+*                        7   6   5   4   3   2   1   0
+*                       --------------------------------
+*                       |PRECEDENCE| D | T | R | C | 0 |
+*                       --------------------------------
+*
+*                   where
+*                           PRECEDENCE      Datagram Priority (see 'IPv4 HEADER TYPE OF SERVICE (TOS) DEFINES') :
+*                                               '000' - Lowest  "Routine"         Priority (default)
+*                                               '111' - Highest "Network Control" Priority
+*                           D               Datagram Delay Request :
+*                                               '0' - Normal Delay       requested (default)
+*                                               '1' - Low    Delay       requested
+*                           T               Datagram Throughput Request :
+*                                               '0' - Normal Throughput  requested (default)
+*                                               '1' - High   Throughput  requested
+*                           R               Datagram Reliability Request :
+*                                               '0' - Normal Reliability requested (default)
+*                                               '1' - High   Reliability requested
+*                           C               Datagram Cost Request :
+*                                               '0' - Normal Cost        requested (default)
+*                                               '1' - Low    Cost        requested
+*                           0               MUST be zero; i.e. '0'
+*
+*           (4) Flags & Fragment Offset are encoded in the seventh & eighth octets of an IPv4 header as follows :
+*
+*                        15 14 13  12 11 10 9 8 7 6 5 4 3 2 1 0
+*                       ----------------------------------------
+*                       | 0 DF MF |      FRAGMENT OFFSET       |
+*                       ----------------------------------------
+*
+*                   where
+*                           0                   MUST be zero; i.e. '0'
+*                           DF                  'Do Not Fragment' Flag :
+*                                                   '0' - Datagram fragmentation     allowed
+*                                                   '1' - Datagram fragmentation NOT allowed
+*                           MF                  'More Fragments' Flag :
+*                                                   '0' - No more fragments for datagram; i.e. last fragment
+*                                                   '1' -    More fragments for datagram
+*                           FRAGMENT OFFSET     Offset of fragment in original datagram, measured in units of
+*                                                   8 octets (64 bits)
+*
+*           (5) Supports ONLY a subset of allowed protocol numbers :
+*
+*               (a) ICMP
+*               (b) IGMP
+*               (c) UDP
+*               (d) TCP
+*
+*               See also 'net.h  Note #2a';
+*                  & see 'RFC #1340  Assigned Numbers' for a complete list of protocol numbers.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET IPv4 HDR ------------------- */
+typedef  struct  net_ipv4_hdr {
+    CPU_INT08U          Ver_HdrLen;                             /* IPv4 datagram ver nbr/hdr len   (see Note #2).       */
+    NET_IPv4_TOS        TOS;                                    /* IPv4 datagram TOS               (see Note #3).       */
+    CPU_INT16U          TotLen;                                 /* IPv4 datagram tot len.                               */
+    CPU_INT16U          ID;                                     /* IPv4 datagram ID.                                    */
+    NET_IPv4_HDR_FLAGS  Flags_FragOffset;                       /* IPv4 datagram flags/frag offset (see Note #4).       */
+    NET_IPv4_TTL        TTL;                                    /* IPv4 datagram TTL.                                   */
+    CPU_INT08U          Protocol;                               /* IPv4 datagram protocol          (see Note #5).       */
+    NET_CHK_SUM         ChkSum;                                 /* IPv4 datagram chk sum.                               */
+    NET_IPv4_ADDR       AddrSrc;                                /* IPv4 datagram src  addr.                             */
+    NET_IPv4_ADDR       AddrDest;                               /* IPv4 datagram dest addr.                             */
+    NET_IPv4_OPT_SIZE   Opts[NET_IPv4_HDR_OPT_NBR_MAX];         /* IPv4 datagram opts (if any).                         */
+} NET_IPv4_HDR;
+
+
+
+
+
+/*
+*********************************************************************************************************
+*                             IPv4 HEADER OPTION CONFIGURATION DATA TYPES
+*
+* Note(s) : (1) RFC #1122, Section 3.2.1.8 states that "there MUST be a means ... to specify IPv4 options
+*               to included in transmitted IPv4 datagrams".
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                   IPv4 ROUTE & INTERNET TIMESTAMP OPTIONS CONFIGURATION DATA TYPE
+*
+* Note(s) : (1) 'NET_IPv4_OPT_CFG_ROUTE_TS' data type used to configure IPv4 Route & Internet Timestamp
+*                transmit options :
+*
+*               (a) Type        specifies the desired IPv4 option configuration type
+*               (b) Nbr         specifies the desired number of option entries to allocate
+*               (c) Route       specifies the desired IPv4 addresses for Route or Internet Timestamp
+*               (d) TS          specifies the desired Internet Timestamps
+*********************************************************************************************************
+*/
+
+typedef  struct  net_ipv4_opt_cfg_route_ts {
+    NET_IPv4_OPT_TYPE   Type;                                   /* IPv4 opt type.                                       */
+    CPU_INT08U          Nbr;                                    /* IPv4 opt nbr.                                        */
+    NET_IPv4_ADDR       Route[NET_IPv4_OPT_PARAM_NBR_MAX];      /* IPv4 route addrs.                                    */
+    NET_TS              TS[NET_IPv4_OPT_PARAM_NBR_MAX];         /* IPv4 TS's.                                           */
+    void               *NextOptPtr;                             /* Ptr to next IPv4 opt cfg.                            */
+} NET_IPv4_OPT_CFG_ROUTE_TS;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* Cfg'able IFs' IPv4 addr(s) cfg tbl.                  */
+NET_IPv4_EXT NET_IPv4_IF_CFG   NetIPv4_IF_CfgTbl[NET_IF_NBR_IF_TOT];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         NET_IPv4_TX_GET_ID()
+*
+* Description : Get next IPv4 transmit identification number.
+*
+* Argument(s) : id      Variable that will receive the returned IPv4 transmit identification number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv4_TxPktPrepareHdr(),
+*               NetIPv4_ReTxPktPrepareHdr().
+*
+*               This macro is an INTERNAL network protocol suite macro & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Return IPv4 identification number is NOT converted from host-order to network-order.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_TX_GET_ID(id)                 do { NET_UTIL_VAL_COPY_16(&(id), &NetIPv4_TxID_Ctr); \
+                                                     NetIPv4_TxID_Ctr++;                           } while (0)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+                                                                /* -------------- CFG FNCTS --------------- */
+CPU_BOOLEAN    NetIPv4_CfgAddrAdd             (NET_IF_NBR         if_nbr,
+                                               NET_IPv4_ADDR      addr_host,
+                                               NET_IPv4_ADDR      addr_subnet_mask,
+                                               NET_IPv4_ADDR      addr_dflt_gateway,
+                                               NET_ERR           *p_err);
+
+CPU_BOOLEAN    NetIPv4_CfgAddrAddDynamic      (NET_IF_NBR         if_nbr,
+                                               NET_IPv4_ADDR      addr_host,
+                                               NET_IPv4_ADDR      addr_subnet_mask,
+                                               NET_IPv4_ADDR      addr_dflt_gateway,
+                                               NET_ERR           *p_err);
+
+CPU_BOOLEAN    NetIPv4_CfgAddrAddDynamicStart (NET_IF_NBR         if_nbr,
+                                               NET_ERR           *p_err);
+
+CPU_BOOLEAN    NetIPv4_CfgAddrAddDynamicStop  (NET_IF_NBR         if_nbr,
+                                               NET_ERR           *p_err);
+
+CPU_BOOLEAN    NetIPv4_CfgAddrRemove          (NET_IF_NBR         if_nbr,
+                                               NET_IPv4_ADDR      addr_host,
+                                               NET_ERR           *p_err);
+
+CPU_BOOLEAN    NetIPv4_CfgAddrRemoveAll       (NET_IF_NBR         if_nbr,
+                                               NET_ERR           *p_err);
+
+CPU_BOOLEAN    NetIPv4_CfgFragReasmTimeout    (CPU_INT08U         timeout_sec);
+
+CPU_BOOLEAN    NetIPv4_GetAddrHost            (NET_IF_NBR         if_nbr,
+                                               NET_IPv4_ADDR     *p_addr_tbl,
+                                               NET_IP_ADDRS_QTY  *p_addr_tbl_qty,
+                                               NET_ERR           *p_err);
+
+NET_IPv4_ADDR  NetIPv4_GetAddrSrc             (NET_IPv4_ADDR      addr_remote);
+
+NET_IPv4_ADDR  NetIPv4_GetAddrSubnetMask      (NET_IPv4_ADDR      addr,
+                                               NET_ERR           *p_err);
+
+NET_IPv4_ADDR  NetIPv4_GetAddrDfltGateway     (NET_IPv4_ADDR      addr,
+                                               NET_ERR           *p_err);
+
+CPU_BOOLEAN    NetIPv4_IsAddrClassA           (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrClassB           (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrClassC           (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrClassD           (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrThisHost         (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrLocalHost        (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrLocalLink        (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrBroadcast        (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrMulticast        (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrHost             (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrHostCfgd         (NET_IPv4_ADDR      addr);
+
+CPU_BOOLEAN    NetIPv4_IsAddrsCfgdOnIF        (NET_IF_NBR         if_nbr,
+                                               NET_ERR           *p_err);
+
+CPU_BOOLEAN    NetIPv4_IsValidAddrHost        (NET_IPv4_ADDR      addr_host);
+
+CPU_BOOLEAN    NetIPv4_IsValidAddrHostCfgd    (NET_IPv4_ADDR      addr_host,
+                                               NET_IPv4_ADDR      addr_subnet_mask);
+
+CPU_BOOLEAN    NetIPv4_IsValidAddrSubnetMask  (NET_IPv4_ADDR      addr_subnet_mask);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void           NetIPv4_Init                    (void);
+
+                                                                             /* -------------- GET FNCTS --------------- */
+CPU_BOOLEAN    NetIPv4_GetAddrHostHandler      (NET_IF_NBR           if_nbr,
+                                                NET_IPv4_ADDR       *p_addr_tbl,
+                                                NET_IP_ADDRS_QTY    *p_addr_tbl_qty,
+                                                NET_ERR             *p_err);
+
+NET_IPv4_ADDR  NetIPv4_GetAddrSrcHandler       (NET_IPv4_ADDR        addr_remote);
+
+NET_IF_NBR     NetIPv4_GetAddrHostIF_Nbr       (NET_IPv4_ADDR        addr);
+
+NET_IF_NBR     NetIPv4_GetAddrHostCfgdIF_Nbr   (NET_IPv4_ADDR        addr);
+
+                                                                             /* ------------- STATUS FNCTS ------------- */
+
+
+CPU_BOOLEAN    NetIPv4_IsAddrsCfgdOnIF_Handler (NET_IF_NBR           if_nbr,
+                                                NET_ERR             *p_err);
+
+CPU_BOOLEAN    NetIPv4_IsValidTOS              (NET_IPv4_TOS         TOS);
+
+CPU_BOOLEAN    NetIPv4_IsValidTTL              (NET_IPv4_TTL         TTL);
+
+CPU_BOOLEAN    NetIPv4_IsValidFlags            (NET_IPv4_FLAGS       flags);
+
+                                                                               /* --------------- RX FNCTS --------------- */
+void           NetIPv4_Rx                      (NET_BUF             *p_buf,
+                                                NET_ERR             *p_err);
+
+                                                                               /* --------------- TX FNCTS --------------- */
+void           NetIPv4_Tx                      (NET_BUF             *p_buf,    /* Prepare & tx IPv4 pkts.                  */
+                                                NET_IPv4_ADDR        addr_src,
+                                                NET_IPv4_ADDR        addr_dest,
+                                                NET_IPv4_TOS         TOS,
+                                                NET_IPv4_TTL         TTL,
+                                                NET_IPv4_FLAGS       flags,
+                                                void                *p_opts,
+                                                NET_ERR             *p_err);
+
+void           NetIPv4_TxIxDataGet             (NET_IF_NBR           if_nbr,
+                                                CPU_INT32U           data_len,
+                                                CPU_INT16U           mtu,
+                                                CPU_INT16U          *p_ix,
+                                                NET_ERR             *p_err);
+
+void           NetIPv4_ReTx                    (NET_BUF             *p_buf,     /* Prepare & re-tx IPv4 pkts.               */
+                                                NET_ERR             *p_err);
+
+                                                                               /* ------------ NET MGR FNCTS ------------- */
+void           NetIPv4_GetHostAddrProtocol     (NET_IF_NBR           if_nbr,
+                                                CPU_INT08U          *p_addr_protocol_tbl,
+                                                CPU_INT08U          *p_addr_protocol_tbl_qty,
+                                                CPU_INT08U          *p_addr_protocol_len,
+                                                NET_ERR             *p_err);
+
+NET_IF_NBR     NetIPv4_GetAddrProtocolIF_Nbr   (CPU_INT08U          *p_addr_protocol,
+                                                CPU_INT08U           addr_protocol_len,
+                                                NET_ERR             *p_err);
+
+CPU_BOOLEAN    NetIPv4_IsValidAddrProtocol     (CPU_INT08U          *p_addr_protocol,
+                                                CPU_INT08U           addr_protocol_len);
+
+CPU_BOOLEAN    NetIPv4_IsAddrInit              (CPU_INT08U          *p_addr_protocol,
+                                                CPU_INT08U           addr_protocol_len);
+
+#ifdef  NET_MCAST_MODULE_EN
+CPU_BOOLEAN    NetIPv4_IsAddrProtocolMulticast (CPU_INT08U          *p_addr_protocol,
+                                                CPU_INT08U           addr_protocol_len);
+#endif
+
+CPU_BOOLEAN    NetIPv4_IsAddrProtocolConflict  (NET_IF_NBR           if_nbr);
+
+void           NetIPv4_ChkAddrProtocolConflict (NET_IF_NBR           if_nbr,
+                                                CPU_INT08U          *p_addr_protocol,
+                                                CPU_INT08U           addr_protocol_len,
+                                                NET_ERR             *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_IPv4_MODULE_EN       */
+#endif  /* NET_IPv4_MODULE_PRESENT  */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_dad.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_dad.c
new file mode 100644
index 0000000..624e998
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_dad.c
@@ -0,0 +1,810 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           NETWORK DAD LAYER
+*                                     (DUPLICATION ADDRESS DETECTION)
+*
+* Filename      : net_dad.c
+* Version       : V3.04.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) Supports Duplicate address detection as described in RFC #4862.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    NET_DAD_MODULE
+#include  "net_dad.h"
+#include  "net_ndp.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_DAD_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_DAD_OBJ_POOL_NAME                  "Net DAD Object Pool"
+#define  NET_DAD_SIGNAL_ERR_NAME                "Net DAD Signal Err"
+#define  NET_DAD_SIGNAL_COMPL_NAME              "Net DAD Signal Complete"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  MEM_DYN_POOL             NetDAD_Pool;
+static  NET_DAD_OBJ             *NetDAD_ObjListHeadPtr;
+static  NET_DAD_OBJ             *NetDAD_ObjListEndPtr;
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             NetDAD_Init()
+*
+* Description : Initialize DAD module
+*
+* Argument(s) : Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_Init()
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetDAD_Init (NET_ERR  *p_err)
+{
+    LIB_ERR  err_lib;
+
+
+                                                                /* -------- CREATE DYNAMIC POOL FOR DAD OBJECT -------- */
+    Mem_DynPoolCreate(NET_DAD_OBJ_POOL_NAME,
+                     &NetDAD_Pool,
+                      DEF_NULL,
+                      sizeof(NET_DAD_OBJ),
+                      sizeof(CPU_DATA),
+                      1u,
+                      LIB_MEM_BLK_QTY_UNLIMITED,
+                     &err_lib);
+    if(err_lib != LIB_MEM_ERR_NONE) {
+      *p_err = NET_DAD_ERR_OBJ_POOL_CREATE;
+       return;
+    }
+
+   *p_err = NET_DAD_ERR_NONE;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                          NetDAD_Start()
+*
+* Description : (1) Start Duplication Address Detection (DAD) procedure :
+*
+*                   (a) Validate that DAD is enabled.
+*                   (b) Validate that IPv6 addrs object for addr to configured exists.
+*                   (c) Get a new DAD object in pool.
+*                   (d) Update DAD object parameters.
+*                   (e) Start NDP DAD process.
+*
+* Argument(s) : if_nbr          Network interface number.
+*
+*               p_addr          Pointer to the IPv6 addr to perform duplicate address detection.
+*
+*               addr_cfg_type   Type of Address Configuration :
+*
+*                                   NET_IPV6_ADDR_CFG_TYPE_STATIC_BLOKING
+*                                   NET_IPV6_ADDR_CFG_TYPE_STATIC_NO_BLOKING
+*                                   NET_IPV6_ADDR_CFG_TYPE_AUTO_CFG_NO_BLOCKING
+*                                   NET_IPV6_ADDR_CFG_TYPE_RX_PREFIX_INFO
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                   DAD process finish successfully,
+*                               NET_IPv6_ERR_DAD_DISABLED           DAD is disabled.
+*                               NET_IPv6_ERR_ADDR_NOT_FOUND         IPv6 addrs obj not found.
+*                               NET_IPv6_ERR_AUTO_CFG_DISABLED      IPv6 Auto-Cfg disabled.
+*                               NET_IPv6_ERR_DAD_FAULT              DAD process faulted.
+*                               NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS   DAD in progress.
+*                               NET_IPv6_ERR_ADDR_CFG_DUPLICATED    DAD finish with add duplication detected.
+*
+*                               ----------- RETURNED BY NetIPv6_DAD_SignalWait() : ------------
+*                               See NetIPv6_DAD_SignalWait() for additional return error codes.
+*
+*                               ----------- RETURNED BY Net_GlobalLockAcquire() : ------------
+*                               See Net_GlobalLockAcquire() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetIPv6_CfgAddrAddHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetDAD_Start (NET_IF_NBR               if_nbr,
+                    NET_IPv6_ADDR           *p_addr,
+                    NET_IPv6_ADDR_CFG_TYPE   addr_cfg_type,
+                    NET_DAD_FNCT             dad_hook_fnct,
+                    NET_ERR                 *p_err)
+{
+    NET_DAD_OBJ          *p_dad_obj;
+    NET_IPv6_ADDRS       *p_ipv6_addrs;
+    CPU_INT08U            dad_retx_nbr;
+    NET_IPv6_ADDR_STATE   state;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+                                                                /* ----------- VALIDATE THAT DAD IS ENABLED ----------- */
+    dad_retx_nbr = NetNDP_DAD_GetMaxAttemptsNbr();
+    if (dad_retx_nbr <= 0) {
+       *p_err = NET_ERR_FAULT_FEATURE_DIS;
+        goto exit;
+    }
+
+                                                                /* -------------- RECOVER IPV6 ADDRS OBJ -------------- */
+    p_ipv6_addrs = NetIPv6_GetAddrsHostOnIF(if_nbr, p_addr);
+    if (p_ipv6_addrs == DEF_NULL) {
+       *p_err = NET_DAD_ERR_ADDR_NOT_FOUND;
+        goto exit;
+    }
+
+                                                                /* --------------- GET A NEW DAD OBJECT --------------- */
+    p_dad_obj = NetDAD_ObjGet(p_err);
+    if (*p_err != NET_DAD_ERR_NONE) {
+         goto exit;
+    }
+
+                                                                /* ----------- UPDATE DAD OBJECT PARAMETERS ----------- */
+    Mem_Copy(&p_dad_obj->Addr, p_addr, NET_IPv6_ADDR_SIZE);
+
+    p_dad_obj->Fnct  = dad_hook_fnct;
+
+    switch (addr_cfg_type) {
+        case NET_IPv6_ADDR_CFG_TYPE_STATIC_BLOKING:
+             p_dad_obj->NotifyComplEn = DEF_YES;
+             break;
+
+
+        case NET_IPv6_ADDR_CFG_TYPE_STATIC_NO_BLOKING:
+             p_dad_obj->NotifyComplEn = DEF_NO;
+             break;
+
+
+        case NET_IPv6_ADDR_CFG_TYPE_AUTO_CFG_NO_BLOCKING:
+#ifdef NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+             p_dad_obj->NotifyComplEn = DEF_NO;
+#else
+            *p_err = NET_ERR_FAULT_FEATURE_DIS;
+             goto exit_release;
+#endif
+             break;
+
+
+        case NET_IPv6_ADDR_CFG_TYPE_RX_PREFIX_INFO:
+             p_dad_obj->NotifyComplEn = DEF_NO;
+             break;
+
+
+        default:
+             break;
+    }
+
+                                                                /* ---------- CREATE NEW NDP CACHE FOR ADDR ----------- */
+    NetNDP_DAD_Start(if_nbr, p_addr, p_err);
+    if (*p_err != NET_NDP_ERR_NONE) {
+        *p_err  = NET_DAD_ERR_FAULT;
+         goto exit_release;
+    }
+
+                                                                /* ---- WAIT FOR DAD SIGNAL COMPLETE IF BLOCKING EN --- */
+    if (addr_cfg_type == NET_IPv6_ADDR_CFG_TYPE_STATIC_BLOKING) {
+
+        Net_GlobalLockRelease();
+
+        NetDAD_SignalWait(NET_DAD_SIGNAL_TYPE_COMPL, p_dad_obj, p_err);
+        if (*p_err != NET_DAD_ERR_NONE) {
+             goto exit_relock;
+        }
+
+        Net_GlobalLockAcquire((void *)&NetDAD_Start, p_err);
+        if (*p_err != NET_ERR_NONE) {
+             goto exit_release;
+        }
+
+        NetDAD_Stop(if_nbr, p_dad_obj);
+
+        state = p_ipv6_addrs->AddrState;
+        switch (state) {
+            case NET_IPv6_ADDR_STATE_PREFERRED:
+            case NET_IPv6_ADDR_STATE_DEPRECATED:
+                *p_err = NET_DAD_ERR_NONE;
+                 goto exit;
+
+
+            case NET_IPv6_ADDR_STATE_DUPLICATED:
+            case NET_IPv6_ADDR_STATE_TENTATIVE:
+            case NET_IPv6_ADDR_STATE_NONE:
+            default:
+                *p_err = NET_DAD_ERR_FAILED;
+                 goto exit;
+        }
+    }
+
+   *p_err = NET_DAD_ERR_IN_PROGRESS;
+
+    goto exit;
+
+
+exit_relock:
+{
+    NET_ERR  local_err;
+
+    Net_GlobalLockAcquire((void *)&NetDAD_Start, &local_err);
+   (void)&local_err;
+}
+
+exit_release:
+    NetDAD_Stop(if_nbr, p_dad_obj);
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDAD_Stop()
+*
+* Description : Stop the current running DAD process.
+*
+* Argument(s) : if_nbr      Interface number of the address on which DAD is occurring.
+*
+*               p_dad_obj   Pointer to the current DAD object.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetIPv6_AddrAutoCfgDAD_Result(),
+*               NetIPv6_CfgAddrAddDAD_Result(),
+*               NetIPv6_DAD_Start().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  NetDAD_Stop(NET_IF_NBR    if_nbr,
+                  NET_DAD_OBJ  *p_dad_obj)
+{
+    NET_ERR                  err_net;
+    KAL_ERR                  err_kal;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    p_dad_obj->Fnct          = DEF_NULL;
+    p_dad_obj->NotifyComplEn = DEF_NO;
+    CPU_CRITICAL_EXIT();
+
+    KAL_SemSet(p_dad_obj->SignalCompl, 0, &err_kal);
+    KAL_SemSet(p_dad_obj->SignalErr,   0, &err_kal);
+
+    NetNDP_DAD_Stop(if_nbr, &p_dad_obj->Addr);
+
+    NetDAD_ObjRelease(p_dad_obj, &err_net);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetDAD_ObjGet()
+*
+* Description : Obtain a DAD object.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DAD_ERR_NONE                DAD object successfully recovered.
+*                               NET_DAD_ERR_OBJ_MEM_ALLOC       Error while allocating the memory block for DAD
+*                                                                   object.
+*                               NET_ERR_FAULT_MEM_ALLOC         Memory allocation error with DAD signal creation.
+*                               NET_DAD_ERR_SIGNAL_CREATE       Error with DAD signal creation.
+*
+* Return(s)   : Pointer to new DAD object created.
+*
+* Caller(s)   : NetNDP_DAD_Start().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetDAD_ObjGet() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+NET_DAD_OBJ  *NetDAD_ObjGet (NET_ERR  *p_err)
+{
+    NET_DAD_OBJ   *p_obj;
+    LIB_ERR        err_lib;
+    KAL_ERR        err_kal;
+
+                                                                /* ------------ GET DAD OBJ FROM DYN POOL ------------- */
+    p_obj = (NET_DAD_OBJ *)Mem_DynPoolBlkGet(&NetDAD_Pool, &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = NET_DAD_ERR_OBJ_MEM_ALLOC;
+            goto exit;
+        }
+
+                                                                /* ------------ INIT DAD OBJ SIGNAL ERROR ------------- */
+    p_obj->SignalErr = KAL_SemCreate((const CPU_CHAR *)NET_DAD_SIGNAL_ERR_NAME,
+                                                       DEF_NULL,
+                                                      &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_ERR_FAULT_MEM_ALLOC;
+             goto exit_release;
+
+
+        default:
+            *p_err = NET_DAD_ERR_SIGNAL_CREATE;
+             goto exit_release;
+    }
+
+                                                                /* ----------- INIT DAD OBJ SIGNAL COMPLETE ----------- */
+    p_obj->SignalCompl = KAL_SemCreate((const CPU_CHAR *)NET_DAD_SIGNAL_COMPL_NAME,
+                                                         DEF_NULL,
+                                                        &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_ERR_FAULT_MEM_ALLOC;
+             goto exit_release;
+
+
+        default:
+            *p_err = NET_DAD_ERR_SIGNAL_CREATE;
+             goto exit_release;
+    }
+
+                                                                /* ---------- INIT OTHER DAD OBJ PARAMETERS ---------- */
+    NetIPv6_AddrUnspecifiedSet(&p_obj->Addr, p_err);
+    p_obj->NotifyComplEn = DEF_NO;
+    p_obj->Fnct          = DEF_NULL;
+
+
+                                                                /* --------------- UPDATE DAD OBJ LIST ---------------- */
+   if (NetDAD_ObjListHeadPtr == DEF_NULL) {
+       NetDAD_ObjListHeadPtr  = p_obj;
+       NetDAD_ObjListEndPtr   = p_obj;
+   } else {
+       NetDAD_ObjListEndPtr->NextPtr = p_obj;
+       NetDAD_ObjListEndPtr          = p_obj;
+   }
+
+
+  *p_err = NET_DAD_ERR_NONE;
+
+   goto exit;
+
+exit_release:
+    Mem_DynPoolBlkFree(&NetDAD_Pool, p_obj, &err_lib);
+    p_obj = DEF_NULL;
+
+exit:
+    return (p_obj);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetDAD_ObjRelease()
+*
+* Description : Release DAD object.
+*
+* Argument(s) : p_obj       Pointer to DAD object to release.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DAD_ERR_NONE                DAD object successfully released.
+*                               NET_DAD_ERR_OBJ_NOT_FOUND       DAD object not found in list.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetNDP_DAD_Stop().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetDAD_ObjRelease() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+void  NetDAD_ObjRelease (NET_DAD_OBJ  *p_dad_obj,
+                         NET_ERR      *p_err)
+{
+    NET_DAD_OBJ  *p_obj_prev;
+    NET_DAD_OBJ  *p_obj;
+    CPU_BOOLEAN   found;
+    KAL_ERR       err_kal;
+    LIB_ERR       err_lib;
+
+                                                                /* --------------- UPDATE DAD OBJ LIST ---------------- */
+    found      = DEF_NO;
+    p_obj_prev = DEF_NULL;
+    p_obj      = NetDAD_ObjListHeadPtr;
+    while (p_obj != DEF_NULL) {
+        if (p_obj == p_dad_obj) {
+            if (p_obj == NetDAD_ObjListHeadPtr) {
+
+                NetDAD_ObjListHeadPtr = p_obj->NextPtr;
+
+                if (NetDAD_ObjListEndPtr == p_obj) {
+                    NetDAD_ObjListHeadPtr = DEF_NULL;
+                    NetDAD_ObjListEndPtr  = DEF_NULL;
+                }
+
+            } else if (p_obj == NetDAD_ObjListEndPtr) {
+                NetDAD_ObjListEndPtr = p_obj_prev;
+
+            } else {
+                p_obj_prev->NextPtr = p_obj->NextPtr;
+            }
+
+            found = DEF_YES;
+            break;
+        }
+        p_obj_prev = p_obj;
+        p_obj      = p_obj->NextPtr;
+    }
+
+    if (found == DEF_YES) {
+                                                                /* ------------- RELEASE KAL SEMAPHORES -------------- */
+        KAL_SemDel(p_dad_obj->SignalCompl, &err_kal);
+        p_dad_obj->SignalCompl.SemObjPtr = DEF_NULL;
+
+        KAL_SemDel(p_dad_obj->SignalErr, &err_kal);
+        p_dad_obj->SignalErr.SemObjPtr = DEF_NULL;
+
+                                                                /* ------------------- FREE DAD OBJ ------------------- */
+        Mem_DynPoolBlkFree(&NetDAD_Pool, p_dad_obj, &err_lib);
+
+       *p_err = NET_DAD_ERR_NONE;
+
+    } else {
+       *p_err = NET_DAD_ERR_OBJ_NOT_FOUND;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetDAD_ObjSrch()
+*
+* Description : Search DAD object with specific IPv6 address in DAD object list.
+*
+* Argument(s) : p_addr      Pointer to IPv6 address
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DAD_ERR_NONE                DAD object successfully found.
+*                               NET_DAD_ERR_OBJ_NOT_FOUND       DAD object not found in list.
+*
+* Return(s)   : Pointer to DAD object found.
+*
+* Caller(s)   : NetIPv6_CfgAddrAdd(),
+*               NetIPv6_CfgAddrResult(),
+*               NetIPv6_AddrAutoCfgDAD_Result(),
+*               NetNDP_RxNeighborSolicitation(),
+*               NetNDP_RxNeighborAdvertisement(),
+*               NetNDP_DAD_Timeout(),
+*               NetNDP_CfgAddrResult().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetDAD_ObjSrch() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+NET_DAD_OBJ  *NetDAD_ObjSrch (NET_IPv6_ADDR  *p_addr,
+                              NET_ERR        *p_err)
+{
+    NET_DAD_OBJ  *p_obj;
+    CPU_BOOLEAN   identical;
+
+
+    p_obj = NetDAD_ObjListHeadPtr;
+
+    while (p_obj != DEF_NULL) {
+
+        identical = NetIPv6_IsAddrsIdentical(p_addr, &p_obj->Addr);
+        if (identical == DEF_YES) {
+           *p_err = NET_DAD_ERR_NONE;
+            return (p_obj);
+        }
+
+        p_obj      = p_obj->NextPtr;
+    }
+
+   *p_err = NET_DAD_ERR_OBJ_NOT_FOUND;
+    return (DEF_NULL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDAD_SignalWait()
+*
+* Description : Wait for a NDP DAD signal.
+*
+* Argument(s) : signal_type     DAD signal type :
+*                                   NET_DAD_SIGNAL_TYPE_ERR
+*                                   NET_DAD_SIGNAL_TYPE_COMPL
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DAD_ERR_NONE                DAD signal received successfully.
+*                               NET_DAD_ERR_SIGNAL_FAULT        DAD signal faulted.
+*                               NET_DAD_ERR_SIGNAL_INVALID      Invalid DAD signal type.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetIPv6_CfgAddrAdd(),
+*               NetNDP_DAD_Timeout().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) NetIPv6_DAD_SignalWait() is called by network protocol suite function(s) BUT
+*                   MUST be called with the global network lock NOT acquired.
+*********************************************************************************************************
+*/
+
+void  NetDAD_SignalWait (NET_DAD_SIGNAL_TYPE   signal_type,
+                         NET_DAD_OBJ          *p_dad_obj,
+                         NET_ERR              *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    switch (signal_type) {
+        case NET_DAD_SIGNAL_TYPE_ERR:
+             KAL_SemPend(p_dad_obj->SignalErr, KAL_OPT_PEND_NON_BLOCKING, KAL_TIMEOUT_INFINITE, &err_kal);
+             switch (err_kal) {
+                case KAL_ERR_NONE:
+                    *p_err = NET_DAD_ERR_NONE;
+                     break;
+
+
+                case KAL_ERR_ABORT:
+                case KAL_ERR_ISR:
+                case KAL_ERR_WOULD_BLOCK:
+                case KAL_ERR_TIMEOUT:
+                case KAL_ERR_OS:
+                default:
+                    *p_err = NET_DAD_ERR_SIGNAL_FAULT;
+                     break;
+             }
+             break;
+
+
+        case NET_DAD_SIGNAL_TYPE_COMPL:
+             KAL_SemPend(p_dad_obj->SignalCompl, KAL_OPT_PEND_BLOCKING, NET_IPv6_DAD_SIGNAL_TIMEOUT_MS, &err_kal);
+             switch (err_kal) {
+                case KAL_ERR_NONE:
+                    *p_err = NET_DAD_ERR_NONE;
+                     break;
+
+
+                case KAL_ERR_ABORT:
+                case KAL_ERR_ISR:
+                case KAL_ERR_WOULD_BLOCK:
+                case KAL_ERR_TIMEOUT:
+                case KAL_ERR_OS:
+                default:
+                    *p_err = NET_DAD_ERR_SIGNAL_FAULT;
+                     break;
+             }
+             break;
+
+
+        default:
+            *p_err = NET_DAD_ERR_SIGNAL_INVALID;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetDAD_Signal()
+*
+* Description : Post a IPv6 DAD signal.
+*
+* Argument(s) : signal_type     DAD signal type :
+*                                   NET_DAD_SIGNAL_TYPE_ERR
+*                                   NET_DAD_SIGNAL_TYPE_COMPL
+*
+*               p_dad_obj       Pointer to the current DAD object.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_DAD_ERR_NONE            DAD signal posted successfully.
+*                                   NET_DAD_ERR_SIGNAL_FAULT    DAD signal posting faulted.
+*                                   NET_DAD_ERR_SIGNAL_INVALID  Invalid DAD signal type.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetNDP_RxNeighborSolicitation(),
+*               NetNDP_RxNeighborAdvertisement(),
+*               NetNDP_DAD_Timeout().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) NetDAD_Signal() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+void  NetDAD_Signal (NET_DAD_SIGNAL_TYPE   signal_type,
+                     NET_DAD_OBJ          *p_dad_obj,
+                     NET_ERR              *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    switch (signal_type) {
+                                                                /* --------------- POST DAD SIGNAL ERR ---------------- */
+        case NET_DAD_SIGNAL_TYPE_ERR:
+             KAL_SemPost(p_dad_obj->SignalErr, KAL_OPT_PEND_NONE, &err_kal);
+             switch (err_kal) {
+                case KAL_ERR_NONE:
+                    *p_err = NET_DAD_ERR_NONE;
+                     break;
+
+
+                case KAL_ERR_OVF:
+                case KAL_ERR_OS:
+                default:
+                    *p_err = NET_DAD_ERR_SIGNAL_FAULT;
+                     break;
+             }
+             break;
+
+
+        case NET_DAD_SIGNAL_TYPE_COMPL:
+             if (p_dad_obj->NotifyComplEn == DEF_YES) {
+                 KAL_SemPost(p_dad_obj->SignalCompl, KAL_OPT_PEND_NONE, &err_kal);
+                 switch (err_kal) {
+                   case KAL_ERR_NONE:
+                       *p_err = NET_DAD_ERR_NONE;
+                        break;
+
+
+                   case KAL_ERR_OVF:
+                   case KAL_ERR_OS:
+                   default:
+                       *p_err = NET_DAD_ERR_SIGNAL_FAULT;
+                        break;
+                 }
+             }
+             break;
+
+
+        default:
+            *p_err = NET_DAD_ERR_SIGNAL_INVALID;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_DAD_MODULE_EN */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_dad.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_dad.h
new file mode 100644
index 0000000..9e5491d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_dad.h
@@ -0,0 +1,200 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*
+*                                           NETWORK DAD LAYER
+*                                     (DUPLICATION ADDRESS DETECTION
+*
+* Filename      : net_dad.h
+* Version       : V3.04.02
+* Programmer(s) : MM
+*********************************************************************************************************
+* Note(s)       : (1) Supports Duplicate address detection as described in RFC #4862.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_ipv6.h"
+#include  "../../Source/net.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DAD_MODULE_PRESENT
+#define  NET_DAD_MODULE_PRESENT
+
+#ifdef   NET_DAD_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          DAD DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  net_dad_obj  NET_DAD_OBJ;
+
+typedef  void  (*NET_DAD_FNCT)(NET_IF_NBR                 if_nbr,
+                               NET_DAD_OBJ               *p_dad_obj,
+                               NET_IPv6_ADDR_CFG_STATUS   status);
+
+struct net_dad_obj {
+    NET_DAD_OBJ        *NextPtr;
+    NET_IPv6_ADDR       Addr;
+    KAL_SEM_HANDLE      SignalErr;
+    KAL_SEM_HANDLE      SignalCompl;
+    CPU_BOOLEAN         NotifyComplEn;
+    NET_DAD_FNCT        Fnct;
+};
+
+
+/*
+*********************************************************************************************************
+*                                        DAD SIGNAL DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum net_dad_signal_type {
+    NET_DAD_SIGNAL_TYPE_ERR,
+    NET_DAD_SIGNAL_TYPE_COMPL,
+} NET_DAD_SIGNAL_TYPE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void              NetDAD_Init                (       NET_ERR                 *p_err);
+
+
+void              NetDAD_Start               (       NET_IF_NBR               if_nbr,
+                                                     NET_IPv6_ADDR           *p_addr,
+                                                     NET_IPv6_ADDR_CFG_TYPE   addr_cfg_type,
+                                                     NET_DAD_FNCT             dad_hook_fnct,
+                                                     NET_ERR                 *p_err);
+
+void              NetDAD_Stop                (       NET_IF_NBR               if_nbr,
+                                                     NET_DAD_OBJ             *p_dad_obj);
+
+NET_DAD_OBJ      *NetDAD_ObjGet              (       NET_ERR                 *p_err);
+
+void              NetDAD_ObjRelease          (       NET_DAD_OBJ             *p_dad_obj,
+                                                     NET_ERR                 *p_err);
+
+NET_DAD_OBJ      *NetDAD_ObjSrch             (       NET_IPv6_ADDR           *p_addr,
+                                                     NET_ERR                 *p_err);
+
+void              NetDAD_SignalWait          (       NET_DAD_SIGNAL_TYPE      signal_type,
+                                                     NET_DAD_OBJ             *p_dad_obj,
+                                                     NET_ERR                 *p_err);
+
+void              NetDAD_Signal              (       NET_DAD_SIGNAL_TYPE      signal_type,
+                                                     NET_DAD_OBJ             *p_dad_obj,
+                                                     NET_ERR                 *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_DAD_MODULE_EN       */
+#endif  /* NET_DAD_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_icmpv6.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_icmpv6.c
new file mode 100644
index 0000000..67d27fe
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_icmpv6.c
@@ -0,0 +1,3948 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK ICMP V6 LAYER
+*                                 (INTERNET CONTROL MESSAGE PROTOCOL)
+*
+* Filename      : net_icmpv6.c
+* Version       : V3.04.02
+* Programmer(s) : SL
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) Supports Internet Control Message Protocol V6 as described in RFC #4443 with the
+*                     following restrictions/constraints :
+*
+*                     (a) ICMPv6 Error Message received must be passed to the upper layer process that
+*                         originated the packet that caused the error.
+*
+*                     (b) Reception of ICMPv6 Packet too big messages not yet supported.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    NET_ICMPv6_MODULE
+#include  "net_icmpv6.h"
+#include  "net_ndp.h"
+#include  "net_mldp.h"
+#include  "../../IF/net_if.h"
+#include  "../../IF/net_if_ether.h"
+#include  "../../IF/net_if_802x.h"
+#include  "../../Source/net_icmp.h"
+#include  "../../Source/net_ip.h"
+#include  "../../Source/net_buf.h"
+#include  "../../Source/net_stat.h"
+#include  "../../Source/net.h"
+#include  "../../Source/net_util.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'net_ipv6.h  MODULE'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_ICMPv6_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         ICMPv6 FLAG DEFINES
+*
+* Notes(s) : (1) NET_ICMPv6_FLAG_USED indicates that the ICMPv6 entry is currently used and is not in
+*                free pool.
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------- NET ICMPv6 FLAGS ----------------- */
+#define  NET_ICMPv6_FLAG_NONE                            DEF_BIT_NONE
+#define  NET_ICMPv6_FLAG_USED                            DEF_BIT_00     /* See Note #1.                                 */
+
+
+/*
+*********************************************************************************************************
+*                                       ICMPv6 MESSAGE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_ICMPv6_HDR_SIZE_DFLT                          8
+
+#define  NET_ICMPv6_HDR_SIZE_DEST_UNREACH                NET_ICMPv6_HDR_SIZE_DFLT
+#define  NET_ICMPv6_HDR_SIZE_TIME_EXCEED                 NET_ICMPv6_HDR_SIZE_DFLT
+#define  NET_ICMPv6_HDR_SIZE_PARAM_PROB                  NET_ICMPv6_HDR_SIZE_DFLT
+#define  NET_ICMPv6_HDR_SIZE_ECHO                        NET_ICMPv6_HDR_SIZE_DFLT
+
+
+#define  NET_ICMPv6_HDR_NBR_OCTETS_UNUSED                  4
+#define  NET_ICMPv6_HDR_NBR_OCTETS_UNUSED_PARAM_PROB       3
+
+
+#define  NET_ICMPv6_MSG_ERR_HDR_SIZE_MIN               NET_IPv6_HDR_SIZE
+#define  NET_ICMPv6_MSG_ERR_HDR_SIZE_MAX               NET_IPv6_HDR_SIZE_MAX
+
+#define  NET_ICMPv6_MSG_ERR_DATA_SIZE_MIN_BITS            64
+#define  NET_ICMPv6_MSG_ERR_DATA_SIZE_MIN_OCTETS      (((NET_ICMPv6_MSG_ERR_DATA_SIZE_MIN_BITS - 1) / DEF_OCTET_NBR_BITS) + 1)
+
+#define  NET_ICMPv6_MSG_ERR_LEN_MIN                     (NET_ICMPv6_MSG_ERR_HDR_SIZE_MIN  + NET_ICMPv6_MSG_ERR_DATA_SIZE_MIN_OCTETS)
+#define  NET_ICMPv6_MSG_ERR_LEN_MAX                     (NET_ICMPv6_MSG_ERR_HDR_SIZE_MAX  + NET_ICMPv6_MSG_ERR_DATA_SIZE_MIN_OCTETS)
+
+
+#define  NET_ICMPv6_MSG_LEN_MIN_DFLT                     NET_ICMPv6_HDR_SIZE_DFLT
+
+#define  NET_ICMPv6_MSG_LEN_MIN_DEST_UNREACH            (NET_ICMPv6_HDR_SIZE_DEST_UNREACH + NET_ICMPv6_MSG_ERR_LEN_MIN)
+#define  NET_ICMPv6_MSG_LEN_MIN_TIME_EXCEED             (NET_ICMPv6_HDR_SIZE_TIME_EXCEED  + NET_ICMPv6_MSG_ERR_LEN_MIN)
+#define  NET_ICMPv6_MSG_LEN_MIN_PARAM_PROB              (NET_ICMPv6_HDR_SIZE_PARAM_PROB   + NET_ICMPv6_MSG_ERR_LEN_MIN)
+#define  NET_ICMPv6_MSG_LEN_MIN_ECHO                     NET_ICMPv6_HDR_SIZE_ECHO
+
+
+#define  NET_ICMPv6_MSG_LEN_MAX_NONE                     DEF_INT_16U_MAX_VAL
+
+#define  NET_ICMPv6_MSG_LEN_MAX_DEST_UNREACH             NET_ICMPv6_MSG_LEN_MAX_NONE
+#define  NET_ICMPv6_MSG_LEN_MAX_TIME_EXCEED              NET_ICMPv6_MSG_LEN_MAX_NONE
+#define  NET_ICMPv6_MSG_LEN_MAX_PARAM_PROB               NET_ICMPv6_MSG_LEN_MAX_NONE
+#define  NET_ICMPv6_MSG_LEN_MAX_ECHO                     NET_ICMPv6_MSG_LEN_MAX_NONE
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       ICMPv6 FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_FLAGS   NET_ICMPv6_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                         ICMPv6 ERROR HEADER
+*
+* Note(s) : (1) See RFC #4443, Sections 'Destination Unreachable Message', 'Packet Too Big Message', 'Time
+*               Exceeded Message' and 'Parameter Problem Message' for ICMP 'Error Message' header format.
+*
+*           (2) 'Unused' field MUST be cleared (i.e. ALL 'Unused' field octets MUST be set to 0x00).
+*********************************************************************************************************
+*/
+
+                                                                        /* ------------ NET ICMPv6 ERR HDR ------------ */
+typedef  struct  net_ICMPv6_hdr_err {
+    CPU_INT08U      Type;                                               /* ICMPv6 msg type.                             */
+    CPU_INT08U      Code;                                               /* ICMPv6 msg code.                             */
+    CPU_INT16U      ChkSum;                                             /* ICMPv6 msg chk sum.                          */
+
+    CPU_INT08U      Unused[NET_ICMPv6_HDR_NBR_OCTETS_UNUSED];           /* See Note #2.                                 */
+
+    CPU_INT08U      Data[NET_ICMPv6_MSG_ERR_LEN_MAX];
+} NET_ICMPv6_HDR_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                   ICMPv6 PARAMETER PROBLEM HEADER
+*
+* Note(s) : (1) See RFC #4443, Section 3.4 'Parameter Problem Message' for ICMPv6 'Parameter Problem Message'
+*               header format.
+*********************************************************************************************************
+*/
+
+                                                                        /* --------- NET ICMPv6 PARAM PROB HDR -------- */
+typedef  struct  net_ICMPv6_hdr_param_prob {
+    CPU_INT08U      Type;                                               /* ICMPv6 msg type.                             */
+    CPU_INT08U      Code;                                               /* ICMPv6 msg code.                             */
+    CPU_INT16U      ChkSum;                                             /* ICMPv6 msg chk sum.                          */
+    CPU_INT32U      Ptr;                                                /* Ptr into ICMPv6 err msg.                     */
+
+    CPU_INT08U      Data[NET_ICMPv6_MSG_ERR_LEN_MAX];
+} NET_ICMPv6_HDR_PARAM_PROB;
+
+
+/*
+*********************************************************************************************************
+*                                 ICMPv6 ECHO REQUEST/REPLY HEADER
+*
+* Note(s) : (1) See RFC #4443, Section 'Echo or Echo Reply Message' for ICMP 'Echo Request/Reply Message'
+*               header format.
+*
+*           (2) 'Data' declared with 1 entry; prevents removal by compiler optimization.
+*********************************************************************************************************
+*/
+
+                                                                        /* ------ NET ICMPv6 ECHO REQ/REPLY HDR ------- */
+typedef  struct  net_ICMPv6_hdr_echo {
+    CPU_INT08U      Type;                                               /* ICMPv6 msg type.                             */
+    CPU_INT08U      Code;                                               /* ICMPv6 msg code.                             */
+    CPU_INT16U      ChkSum;                                             /* ICMPv6 msg chk sum.                          */
+
+    CPU_INT16U      ID;                                                 /* ICMPv6 msg ID.                               */
+    CPU_INT16U      SeqNbr;                                             /* ICMPv6 seq nbr.                              */
+
+    CPU_INT08U      Data[1];                                            /* ICMPv6 msg data (see Note #2).               */
+} NET_ICMPv6_HDR_ECHO;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U                 NetICMPv6_TxSeqNbrCtr;         /* Global tx seq nbr field ctr.                       */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                    /* ------------------- RX FNCTS ------------------- */
+static  void                       NetICMPv6_RxReplyDemux             (NET_BUF                   *p_buf,
+                                                                       NET_BUF_HDR               *p_buf_hdr,
+                                                                       NET_ICMPv6_HDR            *p_icmp_hdr,
+                                                                       NET_ERR                   *p_err);
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void                       NetICMPv6_RxPktValidateBuf         (NET_BUF_HDR               *p_buf_hdr,
+                                                                       NET_ERR                   *p_err);
+#endif
+
+static  void                       NetICMPv6_RxPktValidate            (NET_BUF                   *p_buf,
+                                                                       NET_BUF_HDR               *p_buf_hdr,
+                                                                       NET_ICMPv6_HDR            *p_icmp_hdr,
+                                                                       NET_ERR                   *p_err);
+
+static  void                       NetICMPv6_RxPktFree                (NET_BUF                   *p_buf);
+
+static  void                       NetICMPv6_RxPktDiscard             (NET_BUF                   *p_buf,
+                                                                       NET_ERR                   *p_err);
+
+
+                                                                    /* ------------------- TX FNCTS ------------------- */
+static  void                       NetICMPv6_TxMsgErrValidate         (NET_BUF                   *p_buf,
+                                                                       NET_BUF_HDR               *p_buf_hdr,
+                                                                       NET_IPv6_HDR              *p_ip_hdr,
+                                                                       CPU_INT08U                 type,
+                                                                       CPU_INT08U                 code,
+                                                                       CPU_INT32U                 ptr,
+                                                                       NET_ERR                   *p_err);
+
+
+static  void                       NetICMPv6_TxMsgReqValidate         (CPU_INT08U                 type,
+                                                                       CPU_INT08U                 code,
+                                                                       NET_ERR                   *p_err);
+
+
+static  void                       NetICMPv6_TxPktFree                (NET_BUF                   *p_buf);
+
+static  void                       NetICMPv6_TxPktDiscard             (NET_BUF                   *p_buf,
+                                                                       NET_ERR                   *p_err);
+
+
+                                                                    /* ---------------- HANDLER FNCTS ----------------- */
+static  void                       NetICMPv6_GetTxDataIx              (NET_IF_NBR                 if_nbr,
+                                                                       CPU_INT32U                 data_len,
+                                                                       NET_IPv6_EXT_HDR          *p_ext_hdr_list,
+                                                                       CPU_INT16U                *p_ix,
+                                                                       NET_ERR                   *p_err);
+
+static  void                       NetICMPv6_CpyData                  (NET_BUF                   *p_buf_src,
+                                                                       NET_BUF                   *p_buf_dst,
+                                                                       CPU_INT32U                 msg_len,
+                                                                       NET_ERR                   *p_err);
+
+static  void                       NetICMPv6_CpyDataToBuf             (CPU_INT08U                *p_data,
+                                                                       NET_BUF                   *p_buf_dest,
+                                                                       CPU_INT32U                 msg_len,
+                                                                       NET_ERR                   *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          NetICMPv6_Init()
+*
+* Description : (1) Initialize Internet Control Message Protocol Layer V6 :
+*
+*                   (a) Initialize ICMP transmit sequence number counter
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetICMPv6_Init (void)
+{
+
+                                                                    /* ----------- INIT ICMPv6 TX SEQ NBR CTR ----------- */
+    NetICMPv6_TxSeqNbrCtr = 0u;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetICMPv6_Rx()
+*
+* Description : (1) Process received messages :
+*
+*                   (a) Validate ICMPv6 packet
+*                   (b) Demultiplex ICMPv6 message
+*                   (c) Free ICMPv6 packet
+*                   (d) Update receive statistics
+*
+*               (2) Although ICMPv6 data units are typically referred to as 'messages' (see RFC #792, Section
+*                   'Introduction'), the term 'ICMP packet' (see RFC #1983, 'packet') is used for ICMP
+*                   Receive until the packet is validated as an ICMPv6 message.
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMPv6 packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             ICMPv6 message successfully received & processed.
+*
+*                                                               --- RETURNED BY NetICMPv6_RxPktDiscard() : ----
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_RxPktDemuxDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (3) ICMPv6 Receive Error/Reply Messages NOT yet implemented. #### NET-796
+*
+*                   (a) Define "User Process" to report ICMPv6 Error Messages to Transport &/or Application Layers.
+*
+*                   (b) Define procedure to demultiplex & enqueue ICMPv6 Reply Messages to Application.
+*
+*                       (1) MUST implement mechanism to de-queue ICMPv6 message data from single, complete
+*                           datagram packet buffers or multiple, fragmented packet buffers.
+*
+*               (4) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetICMPv6_Rx (NET_BUF  *p_buf,
+                    NET_ERR  *p_err)
+{
+    NET_BUF_HDR     *p_buf_hdr;
+    NET_ICMPv6_HDR  *p_icmp_hdr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetICMPv6_RxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.RxMsgCtr);
+
+
+                                                                /* ------------- VALIDATE RX'D ICMPv6 PKT ------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetICMPv6_RxPktValidateBuf(p_buf_hdr, p_err);               /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_ICMPv6_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetICMPv6_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+#endif
+
+                                                                /* Validate rx'd pkt.                                   */
+    p_icmp_hdr = (NET_ICMPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->ICMP_MsgIx];
+    NetICMPv6_RxPktValidate(p_buf, p_buf_hdr, p_icmp_hdr, p_err);
+
+
+                                                                /* ------------------ DEMUX ICMP MSG ------------------ */
+    switch (*p_err) {
+        case NET_ICMPv6_ERR_MSG_TYPE_NEIGHBOR_SOL:
+        case NET_ICMPv6_ERR_MSG_TYPE_NEIGHBOR_ADV:
+        case NET_ICMPv6_ERR_MSG_TYPE_ROUTER_ADV:
+        case NET_ICMPv6_ERR_MSG_TYPE_REDIRECT:
+             NetNDP_Rx(p_buf,
+                       p_buf_hdr,
+                       p_icmp_hdr,
+                       p_err);
+             NET_CTR_STAT_INC(Net_StatCtrs.NDP.RxMsgCtr);
+             break;
+
+
+        case NET_ICMPv6_ERR_MSG_TYPE_QUERY:
+        case NET_ICMPv6_ERR_MSG_TYPE_REPORT:
+             NET_CTR_STAT_INC(Net_StatCtrs.MLDP.RxMsgCtr);
+             NetMLDP_Rx(                   p_buf,
+                                           p_buf_hdr,
+                        (NET_MLDP_V1_HDR *)p_icmp_hdr,
+                                           p_err);
+             break;
+
+
+        case NET_ICMPv6_ERR_MSG_TYPE_REPLY:
+             NetICMPv6_RxReplyDemux(p_buf, p_buf_hdr, p_icmp_hdr, p_err);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.RxMsgReplyCtr);
+             break;
+
+
+        case NET_ICMPv6_ERR_MSG_TYPE_REQ:
+             NetICMPv6_TxMsgReply(p_buf, p_buf_hdr, p_icmp_hdr, p_err);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.RxMsgReqCtr);
+             break;
+
+
+        case NET_ICMPv6_ERR_MSG_TYPE_ERR:                       /* See Note #3a.                                        */
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.RxMsgErrCtr);
+             break;
+
+
+        case NET_ICMPv6_ERR_MSG_TYPE_ROUTER_SOL:
+        case NET_ICMPv6_ERR_RX_BCAST:
+        case NET_ICMPv6_ERR_RX_MCAST:
+        case NET_ICMPv6_ERR_INVALID_TYPE:
+        case NET_ICMPv6_ERR_INVALID_CODE:
+        case NET_ICMPv6_ERR_INVALID_PTR:
+        case NET_ICMPv6_ERR_INVALID_LEN:
+        case NET_ICMPv6_ERR_INVALID_LEN_DATA:
+        case NET_ICMPv6_ERR_INVALID_CHK_SUM:
+        default:
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.RxMsgUnknownCtr);
+             NetICMPv6_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                /* -------- FREE ICMPv6 PKT / UPDATE RX STATS --------- */
+    switch (*p_err) {                                           /* Chk err from NetICMPv6_TxMsg&&&().                   */
+        case NET_NDP_ERR_NONE:
+        case NET_MLDP_ERR_NONE:
+        case NET_ICMPv6_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.RxMsgCompCtr);
+             NetICMPv6_RxPktFree(p_buf);
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #4.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxPktDiscardedCtr);
+            *p_err = NET_ERR_RX;
+             return;
+
+
+        case NET_NDP_ERR_HW_ADDR_LEN:
+        case NET_NDP_ERR_OPT_TYPE:
+        default:
+             NetICMPv6_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+   *p_err = NET_ICMPv6_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                       NetICMPv6_RxReplyDemux()
+*
+* Description : Demultiplex received ICMPv6 reply message.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMPv6 packet.
+*               ----        Argument checked in caller(s).
+*
+*               p_buf_hdr   Pointer to network buffer header that received ICMPv6 packet.
+*               --------    Argument checked in caller(s).
+*
+*               p_icmp_hdr  Pointer to received packet's ICMPv6 header.
+*               ---------   Argument checked in caller(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             ICMPv6 packet successfully demultiplexed.
+*                               NET_ICMPv6_ERR_RX_REPLY         Error while demultiplexing ICMPv6 packet.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_Rx().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv6_RxReplyDemux (NET_BUF         *p_buf,
+                                      NET_BUF_HDR     *p_buf_hdr,
+                                      NET_ICMPv6_HDR  *p_icmp_hdr,
+                                      NET_ERR         *p_err)
+{
+    NET_ICMPv6_HDR_ECHO  *p_icmp_echo_hdr;
+    CPU_INT16U            id;
+    CPU_INT16U            seq;
+    CPU_INT16U            data_len;
+
+
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv6_MSG_TYPE_ECHO_REPLY:
+             p_icmp_echo_hdr = (NET_ICMPv6_HDR_ECHO *)p_icmp_hdr;
+             data_len        =  p_buf_hdr->ICMP_MsgLen - p_buf_hdr->ICMP_HdrLen;
+             id              =  NET_UTIL_NET_TO_HOST_16(p_icmp_echo_hdr->ID);
+             seq             =  NET_UTIL_NET_TO_HOST_16(p_icmp_echo_hdr->SeqNbr);
+
+             NetICMP_RxEchoReply(id,
+                                 seq,
+                                 p_icmp_echo_hdr->Data,
+                                 data_len,
+                                 p_err);
+             if (*p_err != NET_ICMP_ERR_NONE) {
+                 *p_err = NET_ICMPv6_ERR_RX_REPLY;
+                  return;
+             }
+             break;
+
+
+        default:
+            *p_err = NET_ICMPv6_ERR_RX_REPLY;
+             return;
+    }
+
+   (void)&p_buf;
+
+    *p_err = NET_ICMPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetICMPv6_TxEchoReq()
+*
+* Description : Transmit ICMPv6 echo request message.
+*
+* Argument(s) : p_addr_dest         Pointer to IPv6 destination address to send the ICMP echo request.
+*
+*               timeout_ms          Timeout value :
+*
+*                                       NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value desired.
+*
+*                                       In number of milliseconds, otherwise.
+*
+*               p_data      Pointer to the data buffer        to include in     the ICMP echo request.
+*
+*               data_len    Number of      data buffer octets to include in     the ICMP echo request.
+*
+*               task_id     Task ID that will be send as                        the ICMP echo request ID.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             ICMP echo reply   message successfully received.
+*
+*                                                               ------ RETURNED BY NetICMPv6_TxMsgReq() : ------
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization NOT complete.
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*                               NET_ERR_FAULT_LOCK_ACQUIRE
+*
+                                                                ------- RETURNED BY NetICMP_Wait() : --------
+*                               NET_ICMP_ERR_SIGNAL_TIMEOUT     ICMP echo request message timeout.
+*                               NET_ICMP_ERR_SIGNAL_TIMEOUT     ICMP message queue timeout.
+*
+* Return(s)   : DEF_OK,   if ICMPv6 echo reply message successfully received from remote host.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetICMP_TxEchoReq().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16U   NetICMPv6_TxEchoReq (NET_IPv6_ADDR  *p_addr_dest,
+                                  CPU_INT16U      id,
+                                  void           *p_data,
+                                  CPU_INT16U      data_len,
+                                  NET_ERR        *p_err)
+{
+    NET_ICMPv6_REQ_ID_SEQ   req_id;
+
+
+    req_id.ID     = NET_ICMPv6_REQ_ID_NONE;
+    req_id.SeqNbr = NET_ICMPv6_REQ_SEQ_NONE;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_dest == (NET_IPv6_ADDR *)0) {                     /* ---------------- VALIDATE ADDR PTR ----------------- */
+       *p_err = NET_ICMPv6_ERR_INVALID_PTR;
+        goto exit_release;
+    }
+#endif
+
+                                                                /* ------------------ TX ICMPv6 REQ ------------------- */
+    req_id = NetICMPv6_TxMsgReq(NET_IF_NBR_NONE,
+                                NET_ICMPv6_MSG_TYPE_ECHO_REQ,
+                                NET_ICMPv6_MSG_CODE_ECHO_REQ,
+                                id,
+                                DEF_NULL,
+                                p_addr_dest,
+                                NET_IPv6_HDR_HOP_LIM_MAX,
+                                DEF_NULL,
+                                p_data,
+                                data_len,
+                                p_err);
+    if (*p_err != NET_ICMPv6_ERR_NONE) {
+         goto exit_release;
+    }
+
+
+   *p_err = NET_ICMPv6_ERR_NONE;
+    goto exit_release;
+
+
+exit_release:
+    return (req_id.SeqNbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetICMPv6_TxMsgErr()
+*
+* Description : (1) Transmit ICMPv6 Error Message in response to received packet with one or more errors :
+*
+*                   (a) Validate ICMPv6 Error Message.
+*
+*                   (b) Get buffer for ICMPv6 Error Message :
+*
+*                       (1) Calculate  ICMPv6 Error Message buffer size
+*                       (2) Copy received packet's IP header & data into ICMPv6 Error Message
+*                       (3) Initialize ICMPv6 Error Message buffer controls
+*
+*                   (c) Prepare ICMPv6 Error Message :
+*
+*                       (1) Type                           See 'net_icmp.h  ICMP MESSAGE TYPES & CODES'
+*                       (2) Code                           See 'net_icmp.h  ICMP MESSAGE TYPES & CODES'
+*                       (3) Pointer
+*                       (4) Unused
+*                       (5) Check-Sum
+*
+*                   (d) Transmit ICMPv6 Error Message.
+*
+*                   (e) Free ICMPv6 Error Message buffer.
+*
+*                   (f) Update transmit statistics.
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received a packet with error(s).
+*               ----        Argument checked in caller(s).
+*
+*               type        ICMPv6 Error Message type (see Note #1c1) :
+*
+*                               NET_ICMPv6_MSG_TYPE_DEST_UNREACH
+*                               NET_ICMPv6_MSG_TYPE_PKT_TOO_BIG
+*                               NET_ICMPv6_MSG_TYPE_TIME_EXCEED
+*                               NET_ICMPv6_MSG_TYPE_PARAM_PROB
+*
+*               code        ICMPv6 Error Message code (see Note #1c2).
+*
+*               ptr         Pointer to received packet's ICMPv6 error (optional).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             ICMPv6 Error Message successfully transmitted.
+*
+*                                                               -- RETURNED BY NetICMPv6_TxPktDiscard() : --
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+*                                                               -------- RETURNED BY NetIPv6_Tx() : --------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Default case already invalidated in NetICMPv6_TxMsgErrValidate().  However, the default
+*                   case is included as an extra precaution in case 'type' is incorrectly modified.
+*
+*               (3) Assumes network buffer's protocol header size is large enough to accommodate ICMP header
+*                   size (see 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1').
+*
+*               (4) Some buffer controls were previously initialized in NetBuf_Get() when the buffer was
+*                   allocated.  These buffer controls do NOT need to be re-initialized but are shown for
+*                   completeness.
+*
+*               (5) (a) ICMPv6 message Check-Sum MUST be calculated AFTER the entire ICMPv6 message has been
+*                       prepared.  In addition, ALL multi-octet words are converted from host-order to
+*                       network-order since "the sum of 16-bit integers can be computed in either byte
+*                       order" [RFC #1071, Section 2.(B)].
+*
+*                   (b) ICMPv6 message Check-Sum field MUST be cleared to '0' BEFORE the ICMP message Check-Sum
+*                       is calculated.
+*
+*                   (c) The ICMPv6 message Check-Sum field is returned in network-order & MUST NOT be re-converted
+*                       back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumHdrCalc()  Note #3b').
+*
+*               (6) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetICMPv6_TxMsgErr (NET_BUF     *p_buf,
+                          CPU_INT08U   type,
+                          CPU_INT08U   code,
+                          CPU_INT32U   ptr,
+                          NET_ERR     *p_err)
+{
+    NET_BUF_HDR                *p_buf_hdr;
+    NET_IPv6_HDR               *p_ip_hdr;
+    NET_BUF                    *p_msg_err;
+    NET_BUF_HDR                *p_msg_err_hdr;
+    NET_ICMPv6_HDR_ERR         *p_icmp_hdr_err;
+    NET_ICMPv6_HDR_PARAM_PROB  *p_icmp_hdr_param_prob;
+    NET_IPv6_PSEUDO_HDR         pseudo_hdr;
+    NET_MTU                     icmp_pld_maxlen;
+    CPU_INT16U                  msg_size_hdr;
+    CPU_INT16U                  msg_size_data;
+    CPU_INT16U                  msg_size_tot;
+    CPU_INT16U                  msg_ix;
+    CPU_INT16U                  msg_ix_offset;
+    CPU_INT16U                  msg_ix_data;
+    CPU_INT16U                  msg_chk_sum;
+    CPU_INT16U                  data_ix;
+    NET_ERR                     err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+                                                                /* ------------ VALIDATE ICMPv6 TX ERR MSG ------------ */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_buf_hdr->IP_HdrIx == NET_BUF_IX_NONE) {
+        NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxInvalidBufIxCtr);
+        return;
+    }
+#endif
+    p_ip_hdr = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+
+
+    NetICMPv6_TxMsgErrValidate(p_buf, p_buf_hdr, p_ip_hdr, type, code, ptr, &err);
+
+    if (err != NET_ICMPv6_ERR_NONE) {
+        NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+        return;
+    }
+
+                                                                /* -------------- GET ICMPv6 ERR MSG BUF -------------- */
+                                                                /* Calc err msg buf size.                               */
+    switch (type) {
+        case NET_ICMPv6_MSG_TYPE_DEST_UNREACH:
+             msg_size_hdr = NET_ICMPv6_HDR_SIZE_DEST_UNREACH;
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_TIME_EXCEED:
+             msg_size_hdr = NET_ICMPv6_HDR_SIZE_TIME_EXCEED;
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_PARAM_PROB:
+             msg_size_hdr = NET_ICMPv6_HDR_SIZE_PARAM_PROB;
+             break;
+
+
+        default:                                                /* See Note #3.                                         */
+             NetICMPv6_TxPktDiscard((NET_BUF *)0,
+                                    (NET_ERR *)p_err);
+             return;
+    }
+
+                                                                /* Get maximum payload length of ICMPv6 message         */
+    icmp_pld_maxlen = NET_IPv6_MAX_DATAGRAM_SIZE_DFLT - p_buf_hdr->IP_HdrLen - msg_size_hdr;
+                                                                /* Get message data lenght of ICMPv6 message            */
+    if ((p_buf_hdr->IP_TotLen + p_buf_hdr->IP_HdrLen) > icmp_pld_maxlen) {
+        msg_size_data = icmp_pld_maxlen;
+    } else {
+        msg_size_data = p_buf_hdr->IP_TotLen + p_buf_hdr->IP_HdrLen;
+    }
+
+    msg_size_tot = msg_size_hdr + msg_size_data;
+
+    data_ix = msg_size_hdr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetICMPv6_GetTxDataIx(p_buf_hdr->IF_Nbr,
+                          msg_size_data,
+                          DEF_NULL,
+                         &data_ix,
+                         &err);
+    if (err != NET_ICMPv6_ERR_NONE) {
+        NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+        return;
+    }
+
+    if (msg_size_hdr > data_ix) {                               /* See Note #4.                                         */
+        NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxInvalidBufIxCtr);
+        return;
+    }
+#endif
+                                                                /* Get err msg buf.                                     */
+    msg_ix   = data_ix - msg_size_hdr;
+    p_msg_err = NetBuf_Get(p_buf_hdr->IF_Nbr,
+                           NET_TRANSACTION_TX,
+                           msg_size_tot,
+                           msg_ix,
+                          &msg_ix_offset,
+                           NET_BUF_FLAG_NONE,
+                          &err);
+    if (err != NET_BUF_ERR_NONE) {
+        NetICMPv6_TxPktDiscard(p_msg_err, p_err);
+        return;
+    }
+
+    msg_ix      += msg_ix_offset;
+    msg_ix_data  = msg_ix + msg_size_hdr;
+    NetBuf_DataWr(               p_msg_err,                     /* Copy rx'd IPv6 hdr & data into ICMPv6 err tx buf.    */
+                                 msg_ix_data,
+                                 msg_size_data,
+                  (CPU_INT08U *) p_ip_hdr,
+                                &err);
+    if (err != NET_BUF_ERR_NONE) {
+        NetICMPv6_TxPktDiscard(p_msg_err, p_err);
+        return;
+    }
+
+                                                                /* Init err msg buf ctrls.                              */
+    p_msg_err_hdr                        = &p_msg_err->Hdr;
+    p_msg_err_hdr->ICMP_MsgIx            = (CPU_INT16U  )msg_ix;
+    p_msg_err_hdr->ICMP_MsgLen           = (CPU_INT16U  )msg_size_tot;
+    p_msg_err_hdr->ICMP_HdrLen           = (CPU_INT16U  )msg_size_hdr;
+    p_msg_err_hdr->TotLen                = (NET_BUF_SIZE)p_msg_err_hdr->ICMP_MsgLen;
+    p_msg_err_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_ICMP_V6;
+    p_msg_err_hdr->ProtocolHdrTypeNetSub =  NET_PROTOCOL_TYPE_ICMP_V6;
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #5].                */
+    p_msg_err_hdr->DataIx                =  NET_BUF_IX_NONE;
+    p_msg_err_hdr->DataLen               =  0u;
+#endif
+
+
+                                                                /* -------------- PREPARE ICMPv6 ERR MSG -------------- */
+    switch (type) {
+        case NET_ICMPv6_MSG_TYPE_DEST_UNREACH:
+        case NET_ICMPv6_MSG_TYPE_TIME_EXCEED:
+             p_icmp_hdr_err       = (NET_ICMPv6_HDR_ERR *)&p_msg_err->DataPtr[p_msg_err_hdr->ICMP_MsgIx];
+             p_icmp_hdr_err->Type =  type;
+             p_icmp_hdr_err->Code =  code;
+             Mem_Clr(&p_icmp_hdr_err->Unused, sizeof(NET_ICMPv6_HDR_NBR_OCTETS_UNUSED));
+                                                                                /* Calc msg chk sum (see Note #6).      */
+                                                                                /* Prepare IPv6 pseudo-hdr.             */
+             Mem_Clr(&pseudo_hdr, sizeof(NET_IPv6_PSEUDO_HDR));
+             pseudo_hdr.AddrSrc          = p_buf_hdr->IPv6_AddrDest;
+             pseudo_hdr.AddrDest         = p_buf_hdr->IPv6_AddrSrc;
+             pseudo_hdr.UpperLayerPktLen = NET_UTIL_HOST_TO_NET_32(p_msg_err_hdr->ICMP_MsgLen);
+             pseudo_hdr.NextHdr          = NET_UTIL_HOST_TO_NET_16(NET_IP_HDR_PROTOCOL_ICMPv6);
+
+
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void     *)&pseudo_hdr,
+                                                             (CPU_INT16U) sizeof(NET_IPv6_PSEUDO_HDR),
+                                                                         &err);
+             if (err != NET_UTIL_ERR_NONE) {
+                 NetICMPv6_TxPktDiscard(p_msg_err, p_err);
+                 return;
+             }
+
+             p_icmp_hdr_err->ChkSum = ~(msg_chk_sum);                        /* Copy chk sum in ICMPv6 chk sum field.    */
+
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void *)p_icmp_hdr_err,
+                                                                     p_msg_err_hdr->ICMP_MsgLen,
+                                                                    &err);
+             if (err != NET_UTIL_ERR_NONE) {
+                 NetICMPv6_TxPktDiscard(p_msg_err, p_err);
+                 return;
+             }
+
+             p_icmp_hdr_err->ChkSum = msg_chk_sum;
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_PARAM_PROB:
+             p_icmp_hdr_param_prob       = (NET_ICMPv6_HDR_PARAM_PROB *)&p_msg_err->DataPtr[p_msg_err_hdr->ICMP_MsgIx];
+             p_icmp_hdr_param_prob->Type =  type;
+             p_icmp_hdr_param_prob->Code =  code;
+             p_icmp_hdr_param_prob->Ptr  =  NET_UTIL_HOST_TO_NET_32(ptr);
+
+                                                                                /* Calc msg chk sum (see Note #6).      */
+                                                                                /* Prepare IPv6 pseudo-hdr.             */
+             Mem_Clr(&pseudo_hdr, sizeof(NET_IPv6_PSEUDO_HDR));
+             pseudo_hdr.AddrSrc          = p_buf_hdr->IPv6_AddrDest;
+             pseudo_hdr.AddrDest         = p_buf_hdr->IPv6_AddrSrc;
+             pseudo_hdr.UpperLayerPktLen = NET_UTIL_HOST_TO_NET_32(p_msg_err_hdr->ICMP_MsgLen);
+             pseudo_hdr.NextHdr          = NET_UTIL_HOST_TO_NET_16(NET_IP_HDR_PROTOCOL_ICMPv6);
+
+
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void     *)&pseudo_hdr,
+                                                             (CPU_INT16U) sizeof(NET_IPv6_PSEUDO_HDR),
+                                                                         &err);
+             if (err != NET_UTIL_ERR_NONE) {
+                 NetICMPv6_TxPktDiscard(p_msg_err, p_err);
+                 return;
+             }
+
+             p_icmp_hdr_param_prob->ChkSum = ~(msg_chk_sum);                 /* Copy chk sum in ICMPv6 chk sum field.    */
+
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumHdrCalc((void *)p_icmp_hdr_param_prob,
+                                                                     p_msg_err_hdr->ICMP_MsgLen,
+                                                                    &err);
+             if (err != NET_UTIL_ERR_NONE) {
+                 NetICMPv6_TxPktDiscard(p_msg_err, p_err);
+                 return;
+             }
+                                                                            /* Copy chk sum in net order (see Note #6c).*/
+             p_icmp_hdr_param_prob->ChkSum = msg_chk_sum;
+             break;
+
+
+        default:                                                /* See Note #3.                                         */
+             NetICMPv6_TxPktDiscard(p_msg_err, p_err);
+             return;
+    }
+
+                                                                /* ---------------- TX ICMPv6 ERR MSG ----------------- */
+    NetIPv6_Tx(                    p_msg_err,
+                                  &p_buf_hdr->IPv6_AddrDest,
+                                  &p_buf_hdr->IPv6_AddrSrc,
+               (NET_IPv6_EXT_HDR *)0,
+                                   NET_IPv6_HDR_TRAFFIC_CLASS,
+                                   NET_IPv6_HDR_FLOW_LABEL,
+                                   NET_IPv6_HOP_LIM_DFLT,
+                                   p_err);
+
+
+                                                                /* ------ FREE ICMPv6 ERR MSG / UPDATE TX STATS ------- */
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+             NetICMPv6_TxPktFree(p_msg_err);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.TxMsgCtr);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.TxMsgErrCtr);
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #7.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxPktDiscardedCtr);
+                                                                /* Rtn err from NetIPv6_Tx().                           */
+             return;
+
+
+        case NET_IPv6_ERR_TX_PKT:
+                                                                /* See Note #7.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxPktDiscardedCtr);
+            *p_err = NET_ERR_TX;
+             return;
+
+
+        default:
+             NetICMPv6_TxPktDiscard(p_msg_err, p_err);
+             return;
+    }
+
+   *p_err = NET_ICMPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetICMPv6_TxMsgReply()
+*
+* Description : (1) Transmit ICMPv6 Reply Message in response to received ICMPv6 Request Message :
+*
+*                   (a) Process ICMPv6 Reply Message.
+*
+*                   (b) Get buffer for ICMPv6 Reply Message :
+*
+*                       (1) Copy ICMPv6 Request Message into ICMPv6 Reply Message
+*                       (2) Initialize ICMPv6 Reply Message buffer controls
+*
+*                   (c) Prepare ICMPv6 Reply Message's IPv6 header :
+*
+*                       (1) RFC #1349, Section 5.1 specifies that "an ICMP reply message is sent with the same
+*                           value in the TOS field as was used in the corresponding ICMP request message".
+*
+*                       (2) RFC #1122, Sections 3.2.2.6 & 3.2.2.8 specify that "if a Record Route and/or Time
+*                           Stamp option is received in [an ICMP Request, these options] SHOULD be updated ...
+*                           and included in the IP header of the ... Reply message".  Also "if a Source Route
+*                           option is received ... the return route MUST be reversed and used as a Source Route
+*                           option for the ... Reply message".
+*
+*                           #### These IPv6 header option requirements for ICMPv6 Reply Messages are NOT yet implemented.
+*
+*                   (d) Prepare ICMPv6 Reply Message :
+*
+*                       (1) Echo Reply Message
+*
+*                           (A) "To form an echo reply message, the source and destination addresses are simply
+*                                reversed, the type code changed to [reply], and the checksum recomputed"
+*                               (RFC #792, Section 'Echo or Echo Reply Message : Addresses').
+*
+*                       (2) NDP Neighbor Advertisement Reply Message
+*
+*                           (A) "To form an echo reply message, the source and destination addresses are simply
+*                                reversed, the type code changed to [reply], and the checksum recomputed".
+*
+*                       (3) Some ICMPv6 Reply Message fields are copied directly from the ICMPv6 Request Message.
+*
+*                           (A) ICMPv6 Reply Message Identification & Sequence Number fields were NOT validated
+*                               or converted from network-order to host-order (see 'NetICMPv6_RxPktValidate()
+*                               Notes #1b2C & #1b2D') & therefore do NOT need to be converted from host-order
+*                               to network-order.
+*
+*                   (e) Transmit ICMPv6 Reply Message.
+*
+*                   (f) Free     ICMPv6 Reply Message buffer.
+*
+*                   (g) Update transmit statistics.
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMP packet.
+*               ----        Argument checked   in NetICMPv6_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetICMPv6_Rx().
+*
+*               p_icmp_hdr  Pointer to received packet's ICMP header.
+*               ---------   Argument validated in NetICMPv6_Rx()/NetICMPv6_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             ICMPv6 Reply Message successfully transmitted.
+*
+*                                                               -- RETURNED BY NetICMPv6_TxPktDiscard() : --
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+*                                                               -------- RETURNED BY NetIPv6_Tx() : --------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_Rx().
+*
+* Note(s)     : (2) Default case already invalidated in NetICMPv6_RxPktValidate().  However, the default case
+*                   is included as an extra precaution in case 'Type' is incorrectly modified.
+*
+*               (3) (a) RFC #1122, Section 3.2.2.6 states that "data received in an ICMP Echo Request MUST
+*                       be entirely included in the resulting Echo Reply.  However, if sending the Echo Reply
+*                       requires intentional fragmentation that is not implemented, the datagram MUST be
+*                       truncated to maximum transmission size ... and sent".
+*
+*                       See also 'net_IPv6.h  Note #1c'.
+*
+*                   (b) In case the maximum network buffer size is smaller than the ICMPv6 message data length,
+*                       the ICMPv6 Echo Request Message data should be similarly truncated in order to transmit
+*                       the ICMPv6 Echo Reply Message.
+*
+*               (4) Some buffer controls were previously initialized in NetBuf_Get() when the buffer
+*                   was allocated earlier in this function. These buffer controls do NOT need to be
+*                   re-initialized but are shown for completeness.
+*
+*               (5) (a) ICMPv6 message Check-Sum MUST be calculated AFTER the entire ICMP message has been
+*                       prepared.  In addition, ALL multi-octet words are converted from host-order to
+*                       network-order since "the sum of 16-bit integers can be computed in either byte
+*                       order" [RFC #1071, Section 2.(B)].
+*
+*                   (b) ICMPv6 message Check-Sum field MUST be cleared to '0' BEFORE the ICMPv6 message
+*                       Check-Sum is calculated.
+*
+*                   (c) The ICMPv6 message Check-Sum field is returned in network-order & MUST NOT be re-
+*                       converted back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumHdrCalc()
+*                       Note #3b' & 'net_util.c  NetUtil_16BitOnesCplChkSumDataCalc()  Note #4b').
+*
+*               (6) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetICMPv6_TxMsgReply (NET_BUF         *p_buf,
+                            NET_BUF_HDR     *p_buf_hdr,
+                            NET_ICMPv6_HDR  *p_icmp_hdr,
+                            NET_ERR         *p_err)
+{
+           CPU_INT08U                *p_mem;
+           NET_ICMPv6_HDR_ECHO       *p_icmp_hdr_echo;
+           NET_NDP_NEIGHBOR_ADV_HDR  *p_icmp_hdr_neighbor_adv;
+           CPU_INT08U                 hw_addr[NET_IF_HW_ADDR_LEN_MAX];
+           CPU_INT08U                 hw_addr_len;
+           NET_BUF                   *p_msg_reply;
+           NET_BUF                   *p_msg_reply_head;
+           NET_BUF                   *p_chain_buf;
+           NET_BUF                   *p_chain_buf_next;
+           NET_BUF_HDR               *p_msg_req_hdr;
+           NET_BUF_HDR               *p_msg_reply_hdr;
+           NET_BUF_HDR               *p_chain_buf_hdr;
+           NET_IPv6_HOP_LIM           hop_limit;
+           NET_BUF_SIZE               buf_size_max;
+           NET_BUF_SIZE               buf_size_max_data;
+           NET_MTU                    icmp_mtu;
+           CPU_INT16U                 msg_size_hdr;
+           CPU_INT16U                 msg_len;
+           CPU_INT16U                 msg_len_min;
+           CPU_INT16U                 msg_ix;
+           CPU_INT16U                 msg_ix_offset;
+           CPU_INT16U                 msg_chk_sum;
+           CPU_INT32U                 flags;
+           NET_IF_NBR                 if_nbr;
+    const  NET_IPv6_ADDRS            *p_ipv6_addrs;
+           NET_IPv6_ADDR              ipv6_addr_src;
+           NET_IPv6_ADDR              ipv6_addr_dest;
+           NET_IPv6_PSEUDO_HDR        ipv6_pseudo_hdr;
+           NET_IPv6_EXT_HDR           frag_hdr;
+           NET_IPv6_EXT_HDR          *p_ext_hdr_head;
+           CPU_INT16U                 data_ix;
+           CPU_INT32U                 payload_size;
+           CPU_INT32S                 req_len;
+           CPU_BOOLEAN                frag_used;
+           CPU_BOOLEAN                addr_unspecified;
+           CPU_BOOLEAN                addr_is_mcast;
+           NET_ERR                    err;
+
+
+    flags = 0u;
+                                                                /* ------------ PROCESS ICMPv6 REPLY MSGs ------------- */
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+             msg_size_hdr = NET_ICMPv6_HDR_SIZE_ECHO;
+             msg_len_min  = NET_ICMPv6_MSG_LEN_MIN_ECHO;
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+             msg_size_hdr = NET_NDP_HDR_SIZE_NEIGHBOR_SOL;
+             msg_len_min  = NET_NDP_MSG_LEN_MIN_NEIGHBOR_SOL;
+             break;
+
+
+        default:                                                /* See Note #2.                                         */
+             NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+             return;
+    }
+
+
+                                                                /* ------------- GET ICMPv6 REPLY MSG BUF ------------- */
+    msg_len   = p_buf_hdr->ICMP_MsgLen;                         /* Adj req msg len for reply msg len.                   */
+
+                                                                /* Get IF's ICMPv6 MTU.                                 */
+    frag_used = DEF_NO;
+    icmp_mtu  = NetIF_MTU_GetProtocol(p_buf_hdr->IF_Nbr, NET_PROTOCOL_TYPE_ICMP_V6, NET_IF_FLAG_NONE, &err);
+    if (err != NET_IF_ERR_NONE) {
+        NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+        return;
+    }
+
+                                                                /* Check if fragmentation is needed.                    */
+    p_ext_hdr_head = (NET_IPv6_EXT_HDR *)0;
+    if (msg_len > icmp_mtu) {
+        icmp_mtu      -= NET_IPv6_FRAG_HDR_SIZE;
+        icmp_mtu      -= (icmp_mtu % NET_IPv6_FRAG_SIZE_UNIT);
+        frag_used      = DEF_YES;
+        p_ext_hdr_head = NetIPv6_ExtHdrAddToList(0,
+                                                &frag_hdr,
+                                                 NET_IP_HDR_PROTOCOL_EXT_FRAG,
+                                                 NET_IPv6_FRAG_HDR_SIZE,
+                                                 NetIPv6_PrepareFragHdr,
+                                                 NET_IPv6_EXT_HDR_KEY_FRAG,
+                                                 p_err);
+        if (*p_err != NET_IPv6_ERR_NONE) {
+             NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+             return;
+        }
+    }
+
+    data_ix      = msg_size_hdr;
+    payload_size = msg_len;
+
+    NetICMPv6_GetTxDataIx(p_buf_hdr->IF_Nbr,
+                          msg_len,
+                          p_ext_hdr_head,
+                         &data_ix,
+                         &err);
+    if (err != NET_ICMPv6_ERR_NONE) {
+        NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+        return;
+    }
+
+    msg_ix       = (data_ix - msg_size_hdr);
+    buf_size_max =  NetBuf_GetMaxSize(p_buf_hdr->IF_Nbr,
+                                      NET_TRANSACTION_TX,
+                                      DEF_NULL,
+                                      msg_ix);
+
+    buf_size_max_data = DEF_MIN(buf_size_max, icmp_mtu);
+
+    if (frag_used == DEF_YES) {
+        buf_size_max_data -= (buf_size_max_data % NET_IPv6_FRAG_SIZE_UNIT);
+    }
+
+    if (msg_len > buf_size_max_data) {                          /* If msg len > max data size, ...                      */
+        if (p_icmp_hdr->Type != NET_ICMPv6_MSG_TYPE_ECHO_REQ) {  /* ... for Echo Req Msg ONLY,  ...                      */
+            NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+            return;
+        }
+    }
+
+    if (msg_len < msg_len_min) {                                /* If msg len < min msg len, rtn err.                   */
+        NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxInvalidLenCtr);
+        return;
+    }
+
+                                                                /* Get reply msg buf.                                   */
+    p_msg_reply_head = DEF_NULL;
+
+    while (msg_len > 0) {
+
+        req_len    = (CPU_INT32S)DEF_MIN(msg_len, buf_size_max_data);
+
+        p_msg_reply = NetBuf_Get(                 p_buf_hdr->IF_Nbr,
+                                                  NET_TRANSACTION_TX,
+                                 (NET_BUF_SIZE  ) req_len,
+                                 (NET_BUF_SIZE  ) msg_ix,
+                                 (NET_BUF_SIZE *)&msg_ix_offset,
+                                                  NET_BUF_FLAG_NONE,
+                                                 &err);
+        if (err != NET_BUF_ERR_NONE) {
+            NetICMPv6_TxPktDiscard(p_msg_reply, p_err);
+                                                                /* If a buf list has ben assembled, discard it.         */
+            p_chain_buf = p_msg_reply_head;
+                                                                /* Discard each buf of the list.                        */
+            while (p_chain_buf != (NET_BUF *)0) {
+                p_chain_buf_next = p_chain_buf->Hdr.NextBufPtr;
+                NetICMPv6_TxPktDiscard(p_chain_buf, p_err);
+                p_chain_buf      = p_chain_buf_next;
+            }
+            return;
+        }
+        msg_ix += msg_ix_offset;
+                                                                /* If buf is 1st aquired, set p_msg_reply_head to it ...*/
+        if (p_msg_reply_head == (NET_BUF *)0) {
+            p_msg_reply_head  = p_msg_reply;
+        } else {                                                /* ... else add it to the end NextBufPtr chain of ...   */
+                                                                /* ... p_msg_reply_head.                                */
+            p_chain_buf     =  p_msg_reply_head;
+            p_chain_buf_hdr = &p_msg_reply_head->Hdr;
+
+            while (p_chain_buf_hdr->NextBufPtr != (NET_BUF *)0) {
+                p_chain_buf     =  p_chain_buf_hdr->NextBufPtr;
+                p_chain_buf_hdr = &p_chain_buf->Hdr;
+            }
+
+            p_chain_buf_hdr->NextBufPtr =  p_msg_reply;
+            p_chain_buf_hdr             = &p_msg_reply->Hdr;
+            p_chain_buf_hdr->PrevBufPtr =  p_chain_buf;
+        }
+
+                                                                        /* Init reply msg buf ctrls.                            */
+        p_msg_reply_hdr                        = &p_msg_reply->Hdr;
+        p_msg_reply_hdr->ICMP_MsgIx            = (CPU_INT16U  ) msg_ix;
+        p_msg_reply_hdr->ICMP_MsgLen           = (CPU_INT16U  ) req_len;
+        p_msg_reply_hdr->ICMP_HdrLen           = (CPU_INT16U  ) msg_size_hdr;
+        p_msg_reply_hdr->DataLen               = (CPU_INT16U  )(req_len - msg_size_hdr);
+        p_msg_reply_hdr->TotLen                = (NET_BUF_SIZE)p_msg_reply_hdr->ICMP_MsgLen;
+        p_msg_reply_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_ICMP_V6;
+        p_msg_reply_hdr->ProtocolHdrTypeNetSub =  NET_PROTOCOL_TYPE_ICMP_V6;
+
+        msg_len           -= req_len;
+        msg_size_hdr       = 0;
+        buf_size_max_data  = (NET_BUF_SIZE)DEF_MIN(buf_size_max, icmp_mtu);
+    }
+
+    p_msg_req_hdr  = &p_buf->Hdr;
+
+    NetICMPv6_CpyData(p_buf, p_msg_reply_head, payload_size, p_err);
+    if (*p_err != NET_ICMPv6_ERR_NONE) {
+         NetICMPv6_TxPktDiscard(p_msg_reply_head, p_err);
+         return;
+    }
+
+    p_buf_hdr = &p_buf->Hdr;
+                                                                /* ------------- PREPARE IPv6 PSEUDO HDR -------------- */
+    ipv6_pseudo_hdr.UpperLayerPktLen = (CPU_INT32U)NET_UTIL_NET_TO_HOST_32(p_buf_hdr->ICMP_MsgLen);
+    ipv6_pseudo_hdr.Zero             = (CPU_INT16U)0x00u;
+    ipv6_pseudo_hdr.NextHdr          = (CPU_INT32U)NET_UTIL_NET_TO_HOST_16(NET_IP_HDR_PROTOCOL_ICMPv6);
+
+
+                                                                /* ------------- PREPARE ICMPv6 REPLY MSG ------------- */
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv6_MSG_TYPE_ECHO_REQ:                      /* See Note #1d1.                                       */
+             p_icmp_hdr_echo         = (NET_ICMPv6_HDR_ECHO *)&p_msg_reply_head->DataPtr[p_msg_reply_hdr->ICMP_MsgIx];
+             p_icmp_hdr_echo->Type   =  NET_ICMPv6_MSG_TYPE_ECHO_REPLY;
+             hop_limit               =  NET_IPv6_HDR_HOP_LIM_DFLT;
+#if 0                                                           /* Copied from ICMPv6 req msg (see Note #1d3).          */
+             p_icmp_hdr_echo->Code   =  NET_ICMP_MSG_CODE_ECHO;
+                                                                /* See Note #1d3A.                                      */
+            (void)&p_icmp_hdr_echo->ID;
+            (void)&p_icmp_hdr_echo->SeqNbr;
+#endif
+                                                                /* Calc ICMP msg data len.                              */
+             if (p_buf_hdr->ICMP_MsgLen > p_msg_reply_hdr->ICMP_HdrLen) {
+                 p_msg_reply_hdr->DataIx  = (CPU_INT16U  )(p_msg_reply_hdr->ICMP_MsgIx  + msg_len_min);
+                 p_msg_reply_hdr->DataLen = (NET_BUF_SIZE)(p_msg_reply_hdr->ICMP_MsgLen - p_msg_reply_hdr->ICMP_HdrLen);
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #4].                */
+             } else {
+                 p_msg_reply_hdr->DataIx  = NET_BUF_IX_NONE;
+                 p_msg_reply_hdr->DataLen = 0u;
+#endif
+             }
+
+                                                                /* Source Address Selection.                            */
+             addr_is_mcast = NetIPv6_IsAddrMcast(&p_buf_hdr->IPv6_AddrDest);
+             if (addr_is_mcast == DEF_YES) {
+                 p_ipv6_addrs = NetIPv6_GetAddrSrcHandler(                        &p_buf_hdr->IF_Nbr,
+                                                          (const  NET_IPv6_ADDR *) DEF_NULL,
+                                                          (const  NET_IPv6_ADDR *)&p_buf_hdr->IPv6_AddrSrc,
+                                                                                   DEF_NULL,
+                                                                                   p_err);
+                 if (*p_err != NET_IPv6_ERR_NONE) {
+                      NetICMPv6_TxPktDiscard(p_msg_reply_head, p_err);
+                      return;
+                 }
+#if 0
+                 ipv6_addr_src = p_ipv6_addrs->AddrHost;
+#endif
+                 NET_UTIL_IPv6_ADDR_COPY(p_ipv6_addrs->AddrHost, ipv6_addr_src);
+             } else {
+#if 0
+                 ipv6_addr_src = p_buf_hdr->IPv6_AddrDest;
+#endif
+                 NET_UTIL_IPv6_ADDR_COPY(p_buf_hdr->IPv6_AddrDest, ipv6_addr_src);
+             }
+
+                                                                /* Destination Address Selection.                       */
+#if 0
+             ipv6_addr_dest = p_buf_hdr->IPv6_AddrSrc;
+#endif
+             NET_UTIL_IPv6_ADDR_COPY(p_buf_hdr->IPv6_AddrSrc, ipv6_addr_dest);
+
+                                                                            /* Calc ICMPv6 msg chk sum (see Note #5).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_echo->ChkSum, 0x0000u);    /* Clr             chk sum (see Note #5b).  */
+#if 0
+             ipv6_pseudo_hdr.AddrSrc  = ipv6_addr_src;
+             ipv6_pseudo_hdr.AddrDest = ipv6_addr_dest;
+#endif
+             NET_UTIL_IPv6_ADDR_COPY(ipv6_addr_src,  ipv6_pseudo_hdr.AddrSrc);
+             NET_UTIL_IPv6_ADDR_COPY(ipv6_addr_dest, ipv6_pseudo_hdr.AddrDest);
+#ifdef NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumDataCalc((void     *) p_msg_reply_head,
+                                                              (void     *)&ipv6_pseudo_hdr,
+                                                                           NET_IPv6_PSEUDO_HDR_SIZE,
+                                                                          &err);
+#endif
+             if (err != NET_UTIL_ERR_NONE) {
+                 NetICMPv6_TxPktDiscard(p_msg_reply_head, p_err);
+                 return;
+             }
+
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_echo->ChkSum, &msg_chk_sum);   /* Copy chk sum in net order (see Note #5c).*/
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+             p_icmp_hdr_neighbor_adv = (NET_NDP_NEIGHBOR_ADV_HDR *)&p_msg_reply_head->DataPtr[p_msg_reply_hdr->ICMP_MsgIx];
+
+             addr_unspecified = NetIPv6_IsAddrUnspecified(&p_buf_hdr->IPv6_AddrSrc);
+
+                                                                /* Destination Address Selection.                       */
+             if (addr_unspecified == DEF_YES) {                 /* RFC#4861 s7.24 p.63                                  */
+                 DEF_BIT_CLR(flags, NET_NDP_HDR_FLAG_ROUTER);
+                 DEF_BIT_CLR(flags, NET_NDP_HDR_FLAG_SOL);
+                 DEF_BIT_CLR(flags, NET_NDP_HDR_FLAG_OVRD);
+                 NET_UTIL_IPv6_ADDR_SET_MCAST_ALL_NODES(ipv6_addr_dest);
+                 NET_UTIL_IPv6_ADDR_SET_MCAST_ALL_NODES(ipv6_pseudo_hdr.AddrDest);
+             } else {
+                 flags   = NET_NDP_HDR_FLAG_SOL;
+                 flags  |= NET_NDP_HDR_FLAG_OVRD;
+#if 0
+                 ipv6_addr_dest           = p_buf_hdr->IPv6_AddrSrc;
+                 ipv6_pseudo_hdr.AddrDest = p_buf_hdr->IPv6_AddrSrc;
+#endif
+                 NET_UTIL_IPv6_ADDR_COPY(p_buf_hdr->IPv6_AddrSrc, ipv6_addr_dest);
+                 NET_UTIL_IPv6_ADDR_COPY(p_buf_hdr->IPv6_AddrSrc, ipv6_pseudo_hdr.AddrDest);
+             }
+
+                                                                /* Source Address Selection.                            */
+#if 0
+             ipv6_pseudo_hdr.AddrSrc         = p_icmp_hdr_neighbor_adv->TargetAddr;
+             ipv6_addr_src                   = p_icmp_hdr_neighbor_adv->TargetAddr;
+#endif
+
+             NET_UTIL_IPv6_ADDR_COPY(p_icmp_hdr_neighbor_adv->TargetAddr, ipv6_pseudo_hdr.AddrSrc);
+             NET_UTIL_IPv6_ADDR_COPY(p_icmp_hdr_neighbor_adv->TargetAddr, ipv6_addr_src);
+
+                                                                /* Set Neighbor Advertisement Header.                   */
+             p_icmp_hdr_neighbor_adv->Type   = NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_ADV;
+             hop_limit                       = NET_IPv6_HDR_HOP_LIM_MAX;
+             flags                           = NET_UTIL_NET_TO_HOST_32(flags);
+             NET_UTIL_VAL_COPY_32(&p_icmp_hdr_neighbor_adv->Flags, &flags);
+             if_nbr                          = p_buf_hdr->IF_Nbr;
+             hw_addr_len                     = sizeof(hw_addr);
+
+             NetIF_AddrHW_GetHandler(if_nbr, hw_addr, &hw_addr_len, p_err);
+             if (*p_err != NET_IF_ERR_NONE) {
+                  NetICMPv6_TxPktDiscard(p_msg_reply_head, p_err);
+                  return;
+             }
+
+             p_mem  = (void *)&p_icmp_hdr_neighbor_adv->Opt;
+             p_mem +=  NET_NDP_OPT_DATA_OFFSET;
+             Mem_Copy(                p_mem,
+                      (const void *) &hw_addr[0],
+                      (CPU_SIZE_T  )  hw_addr_len);
+
+                                                                /* Calc ICMP msg data len.                              */
+             if (p_buf_hdr->ICMP_MsgLen > p_msg_reply_hdr->ICMP_HdrLen) {
+                 p_msg_reply_hdr->DataIx  = (CPU_INT16U  )(p_msg_reply_hdr->ICMP_MsgIx  + msg_len_min);
+                 p_msg_reply_hdr->DataLen = (NET_BUF_SIZE)(p_msg_reply_hdr->ICMP_MsgLen - p_msg_reply_hdr->ICMP_HdrLen);
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #4].                */
+             } else {
+                 p_msg_reply_hdr->DataIx  = NET_BUF_IX_NONE;
+                 p_msg_reply_hdr->DataLen = 0u;
+#endif
+             }
+
+                                                                                /* Calc ICMPv6 msg chk sum (see Note #5).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_neighbor_adv->ChkSum, 0x0000u); /* Clr             chk sum (see Note #5b).  */
+#ifdef NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumDataCalc((void     *) p_msg_reply_head,
+                                                              (void     *)&ipv6_pseudo_hdr,
+                                                                           NET_IPv6_PSEUDO_HDR_SIZE,
+                                                                          &err);
+#endif
+             if (err != NET_UTIL_ERR_NONE) {
+                 NetICMPv6_TxPktDiscard(p_msg_reply_head, p_err);
+                 return;
+             }
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_neighbor_adv->ChkSum, &msg_chk_sum);
+             break;
+
+
+        default:                                                /* See Note #2.                                         */
+             (void)&p_msg_req_hdr;
+             NetICMPv6_TxPktDiscard(p_msg_reply_head, p_err);
+             return;
+    }
+
+                                                                /* --------------- TX ICMPv6 REPLY MSG ---------------- */
+    NetIPv6_Tx(p_msg_reply_head,
+              &ipv6_addr_src,
+              &ipv6_addr_dest,
+               p_ext_hdr_head,
+               NET_IPv6_HDR_TRAFFIC_CLASS,
+               NET_IPv6_HDR_FLOW_LABEL,
+               hop_limit,
+               p_err);
+
+
+                                                                /* ----- FREE ICMPv6 REPLY MSG / UPDATE TX STATS ------ */
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+             NetICMPv6_TxPktFree(p_msg_reply_head);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.TxMsgCtr);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.TxMsgReplyCtr);
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #6.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxPktDiscardedCtr);
+                                                                /* Rtn err from NetIPv6_Tx().                           */
+             return;
+
+
+        case NET_IPv6_ERR_TX_PKT:
+                                                                /* See Note #6.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxPktDiscardedCtr);
+            *p_err = NET_ERR_TX;
+             return;
+
+
+        default:
+             NetICMPv6_TxPktDiscard(p_msg_reply_head, p_err);
+             return;
+    }
+
+   *p_err = NET_ICMPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetICMPv6_TxMsgReq()
+*
+* Description : (1) Transmit ICMPv6 Request Message :
+*
+*                   (a) Acquire  network lock.
+*
+*                   (b) Validate ICMPv6 Request Message :
+*
+*                       (1) Validate the following arguments :
+*
+*                           (A) Type
+*                           (B) Code
+*                           (C) Source Address
+*
+*                       (2) Validation of the following arguments deferred to NetIPv6_Tx() :
+*
+*                           (A) Hop Limit
+*                           (B) Destination Address
+*
+*                       (3) Validation ignores the following arguments :
+*
+*                           (A) Data
+*                           (B) Payload length
+*
+*                   (c) Get buffer for ICMPv6 Request Message :
+*
+*                       (1) Calculate      ICMPv6 Request Message buffer size
+*                       (2) Copy data into ICMPv6 Request Message
+*                       (3) Initialize     ICMPv6 Request Message buffer controls
+*
+*                   (d) Prepare ICMPv6 Request Message :
+*
+*                       (1) Type                               See 'net_icmpv6.h  ICMPv6 MESSAGE TYPES & CODES'
+*                       (2) Code                               See 'net_icmpv6.h  ICMPv6 MESSAGE TYPES & CODES'
+*                       (3) Identification (ID)
+*                       (4) Sequence Number
+*                       (5) Data
+*
+*                   (e) Transmit ICMPv6 Request Message.
+*
+*                   (f) Free     ICMPv6 Request Message buffer.
+*
+*                   (g) Update   ICMPv6 transmit statistics.
+*
+*                   (h) Release  network lock.
+*
+*                   (i) Return   ICMPv6 Request Message Identification & Sequence Number
+*                         OR
+*                       NULL id & sequence number structure, on failure
+*
+*
+* Argument(s) : type        ICMPv6 Request Message type (see Note #1d1) :
+*
+*                               NET_ICMPv6_MSG_TYPE_ECHO_REQ
+*
+*               code        ICMPv6 Request Message code (see Note #1d2).
+*
+*               id          ICMPv6 Request Message id (see 'NetICMPv6_TxMsgReq()  Note #3b').
+*
+*               addr_src    Source      IPv6 address.
+*
+*               addr_dest   Destination IPv6 address.
+*
+*               hop_lim     Specify the hop limit to transmit ICMP/IP packet.
+*
+*               dest_mcast  Specify if the IPv6 destination address is multicast.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization NOT complete.
+*
+*                                                               -- RETURNED BY NetICMPv6_TxMsgReqHandler() : --
+*                               NET_ICMPv6_ERR_NONE             ICMPv6 Request Message successfully transmitted.
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*                               NET_ERR_TX_BUF_NONE_AVAIL       Transmit error; No Tx Buffer available.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : ICMPv6 Request Message's Identification (ID) & Sequence Numbers, if NO error(s).
+*
+*               NULL                     Identification (ID) & Sequence Numbers, otherwise.
+*
+* Caller(s)   : NetICMPv6_TxEchoReq().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) NetICMPv6_TxMsgReq() blocked until network initialization completes.
+*
+*               (3) NetICMPv6_TxMsgReq() is the internal ICMPv6 handler for ICMPv6 Request Messages.  Its
+*                   global declaration is required since NetICMPv6_TxMsgReq() calls the handler function
+*                   from the OS port file (see also 'NetICMPv6_TxMsgReq()  Note #1').
+*
+*               (4) Default case already invalidated in NetICMPv6_TxMsgReqValidate().  However, the default
+*                   case is included as an extra precaution in case 'type' is incorrectly modified.
+*
+*               (5) Assumes network buffer's protocol header size is large enough to accommodate ICMPv6 header
+*                   size (see 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1').
+*
+*               (6) Some buffer controls were previously initialized in NetBuf_Get() when the buffer
+*                   was allocated earlier in this function.  These buffer controls do NOT need to be
+*                   re-initialized but are shown for completeness.
+*
+*               (7) (a) ICMPv6 message Check-Sum MUST be calculated AFTER the entire ICMPv6 message has been
+*                       prepared.  In addition, ALL multi-octet words are converted from host-order to
+*                       network-order since "the sum of 16-bit integers can be computed in either byte
+*                       order" [RFC #1071, Section 2.(B)].
+*
+*                   (b) ICMPv6 message Check-Sum field MUST be cleared to '0' BEFORE the ICMPv6 message
+*                       Check-Sum is calculated (see RFC #792, Sections 'Echo or Echo Reply Message :
+*                       Checksum', 'Timestamp or Timestamp Reply Message : Checksum'; & RFC #950,
+*                       Appendix I 'Address Mask ICMP', Section 'ICMP Fields : Checksum').
+*
+*                   (c) The ICMPv6 message Check-Sum field is returned in network-order & MUST NOT be re-
+*                       converted back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumHdrCalc()
+*                       Note #3b' & 'net_util.c  NetUtil_16BitOnesCplChkSumDataCalc()  Note #4b').
+*
+*               (8) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+NET_ICMPv6_REQ_ID_SEQ  NetICMPv6_TxMsgReq (NET_IF_NBR         if_nbr,
+                                           CPU_INT08U         type,
+                                           CPU_INT08U         code,
+                                           CPU_INT16U         id,
+                                           NET_IPv6_ADDR     *p_addr_src,
+                                           NET_IPv6_ADDR     *p_addr_dest,
+                                           NET_IPv6_HOP_LIM   hop_lim,
+                                           CPU_BOOLEAN        dest_mcast,
+                                           void              *p_data,
+                                           CPU_INT16U         data_len,
+                                           NET_ERR           *p_err)
+{
+    NET_ICMPv6_REQ_ID_SEQ  id_seq;
+    NET_IPv6_ADDR          ipv6_addr;
+
+                                                                /* Prepare err rtn val.                                 */
+    id_seq.ID     = id;
+    id_seq.SeqNbr = 0u;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetICMPv6_TxMsgReq, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return (id_seq);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit tx (see Note #2).         */
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+#endif
+
+    if (p_addr_src == DEF_NULL) {
+        NetIPv6_AddrUnspecifiedSet(&ipv6_addr, p_err);
+        if (*p_err != NET_IPv6_ERR_NONE) {
+            *p_err = NET_ICMPv6_ERR_TX_INVALID_ADDR_SRC;
+             goto exit_release;
+        }
+        p_addr_src = &ipv6_addr;
+    }
+
+    id_seq = NetICMPv6_TxMsgReqHandler(if_nbr,                  /* TX ICMPv6 req msg.                                   */
+                                       type,
+                                       code,
+                                       id,
+                                       p_addr_src,
+                                       p_addr_dest,
+                                       hop_lim,
+                                       dest_mcast,
+                                       DEF_NULL,
+                                       p_data,
+                                       data_len,
+                                       p_err);                  /* Returned NetICMPv6_TxMsgReqHandler() error codes.    */
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (id_seq);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetICMPv6_TxMsgReqHandler()
+*
+* Description : (1) Transmit ICMPv6 Request Message :
+*
+*                   (a) Validate ICMPv6 Request Message :
+*
+*                       (1) Validate the following arguments :
+*
+*                           (A) Type
+*                           (B) Code
+*                           (C) Source Address
+*
+*                       (2) Validation of the following arguments deferred to NetIPv6_Tx() :
+**
+*                           (B) Hop Limit
+*                           (C) Destination Address
+*
+*                       (3) Validation ignores the following arguments :
+*
+*                           (A) Data
+*                           (B) Payload length
+*
+*                   (b) Get buffer for ICMPv6 Request Message :
+*
+*                       (1) Calculate      ICMPv6 Request Message buffer size
+*                       (2) Copy data into ICMPv6 Request Message
+*                       (3) Initialize     ICMPv6 Request Message buffer controls
+*
+*                   (c) Prepare ICMPv6 Request Message :
+*
+*                       (1) Type                               See 'net_icmpv6.h  ICMPv6 MESSAGE TYPES & CODES'
+*                       (2) Code                               See 'net_icmpv6.h  ICMPv6 MESSAGE TYPES & CODES'
+*                       (3) Identification (ID)
+*                       (4) Sequence Number
+*                       (5) Data
+*
+*                   (d) Transmit ICMPv6 Request Message.
+*
+*                   (e) Free     ICMPv6 Request Message buffer.
+*
+*                   (f) Update   ICMPv6 transmit statistics.
+*
+*                   (g) Return   ICMPv6 Request Message Identification & Sequence Number
+*                         OR
+*                       NULL id & sequence number structure, on failure
+*
+*
+* Argument(s) : if_nbr      Number of the interface to transmit the ICMPv6 request message.
+*
+*                               NET_IF_NBR_NONE should be used when the interface is unknown.
+*
+*               type        ICMPv6 Request Message type (see Note #1d1) :
+*
+*                               NET_ICMPv6_MSG_TYPE_ECHO_REQ
+*
+*               code        ICMPv6 Request Message code (see Note #1d2).
+*
+*               id          ICMPv6 Request Message id (see 'NetICMPv6_TxMsgReq()  Note #3b').
+*
+*               p_addr_src  Pointer to source      IPv6 address.
+*
+*               p_addr_dest Pointer to Destination IPv6 address.
+*
+*               hop_lim     Specify the hop limit to transmit ICMP/IP packet.
+*
+*               dest_mcast  Specify if the IPv6 destination address is multicast.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             ICMPv6 Request Message successfully transmitted.
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*                               NET_ERR_TX_BUF_NONE_AVAIL       Transmit error; No Tx Buffer available.
+*
+*                                                               --------- RETURNED BY NetIPv6_Tx() : ---------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : ICMPv6 Request Message's Identification (ID) & Sequence Numbers, if NO error(s).
+*
+*               NULL                     Identification (ID) & Sequence Numbers, otherwise.
+*
+* Caller(s)   : NetICMPv6_TxMsgReq().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) NetICMPv6_TxMsgReqHandler() blocked until network initialization completes.
+*
+*               (3) NetICMPv6_TxMsgReqHandler() is the internal ICMPv6 handler for ICMPv6 Request Messages.  Its
+*                   global declaration is required since it is used by the MLDP and NDP layers.
+*
+*               (4) Default case already invalidated in NetICMPv6_TxMsgReqValidate().  However, the default
+*                   case is included as an extra precaution in case 'type' is incorrectly modified.
+*
+*               (5) Assumes network buffer's protocol header size is large enough to accommodate ICMPv6 header
+*                   size (see 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1').
+*
+*               (6) Some buffer controls were previously initialized in NetBuf_Get() when the buffer
+*                   was allocated earlier in this function.  These buffer controls do NOT need to be
+*                   re-initialized but are shown for completeness.
+*
+*               (7) (a) ICMPv6 message Check-Sum MUST be calculated AFTER the entire ICMPv6 message has been
+*                       prepared.  In addition, ALL multi-octet words are converted from host-order to
+*                       network-order since "the sum of 16-bit integers can be computed in either byte
+*                       order" [RFC #1071, Section 2.(B)].
+*
+*                   (b) ICMPv6 message Check-Sum field MUST be cleared to '0' BEFORE the ICMPv6 message
+*                       Check-Sum is calculated (see RFC #792, Sections 'Echo or Echo Reply Message :
+*                       Checksum', 'Timestamp or Timestamp Reply Message : Checksum'; & RFC #950,
+*                       Appendix I 'Address Mask ICMP', Section 'ICMP Fields : Checksum').
+*
+*                   (c) The ICMPv6 message Check-Sum field is returned in network-order & MUST NOT be re-
+*                       converted back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumHdrCalc()
+*                       Note #3b' & 'net_util.c  NetUtil_16BitOnesCplChkSumDataCalc()  Note #4b').
+*
+*               (8) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+NET_ICMPv6_REQ_ID_SEQ  NetICMPv6_TxMsgReqHandler (NET_IF_NBR         if_nbr,
+                                                  CPU_INT08U         type,
+                                                  CPU_INT08U         code,
+                                                  CPU_INT16U         id,
+                                                  NET_IPv6_ADDR     *p_addr_src,
+                                                  NET_IPv6_ADDR     *p_addr_dest,
+                                                  NET_IPv6_HOP_LIM   hop_lim,
+                                                  CPU_BOOLEAN        dest_mcast,
+                                                  NET_IPv6_EXT_HDR  *p_ext_hdr_list,
+                                                  void              *p_data,
+                                                  CPU_INT16U         data_len,
+                                                  NET_ERR           *p_err)
+{
+           NET_ICMPv6_REQ_ID_SEQ      id_seq;
+           CPU_INT16U                 msg_size_hdr;
+           CPU_INT16U                 msg_size_data;
+           CPU_INT16U                 msg_size_tot;
+           CPU_INT16U                 msg_seq_nbr;
+           CPU_INT16U                 msg_ix;
+           CPU_INT16U                 msg_ix_offset;
+           CPU_INT16U                 msg_chk_sum;
+           CPU_BOOLEAN                is_multicast;
+           CPU_BOOLEAN                is_unspecified;
+           NET_BUF                   *p_msg_req;
+           NET_BUF                   *p_msg_req_head;
+           NET_BUF                   *p_chain_buf;
+           NET_BUF                   *p_chain_buf_next;
+           NET_BUF_HDR               *p_msg_req_hdr;
+           NET_BUF_HDR               *p_chain_buf_hdr;
+           NET_ICMPv6_HDR_ECHO       *p_icmp_hdr_echo;
+           NET_NDP_NEIGHBOR_SOL_HDR  *p_icmp_hdr_neighbor_sol;
+           NET_NDP_ROUTER_SOL_HDR    *p_icmp_hdr_router_sol;
+           NET_NDP_OPT_HDR           *p_ndp_opt_hdr;
+           NET_MLDP_V1_HDR           *p_icmp_hdr_v1;
+           NET_IPv6_PSEUDO_HDR        ipv6_pseudo_hdr;
+           NET_IPv6_ADDR              ipv6_mcast_sol_addr;
+    const  NET_IPv6_ADDRS            *p_ipv6_addrs;
+           NET_IPv6_EXT_HDR          *p_ext_hdr_head;
+           NET_IPv6_EXT_HDR          *p_ext_hdr;
+           NET_IPv6_EXT_HDR           frag_hdr;
+           NET_BUF_SIZE               buf_size_max;
+           NET_BUF_SIZE               buf_size_max_data;
+           CPU_INT16U                 data_ix;
+           CPU_INT32S                 req_len;
+           CPU_BOOLEAN                frag_used;
+           NET_MTU                    mtu;
+           CPU_INT08U                 hw_addr[NET_IP_HW_ADDR_LEN];
+           CPU_INT08U                 hw_addr_len;
+           NET_ERR                    err;
+
+
+    id_seq.ID     = NET_ICMPv6_REQ_ID_NONE;
+    id_seq.SeqNbr = NET_ICMPv6_REQ_SEQ_NONE;
+
+                                                                /* ------------ VALIDATE ICMPv6 TX REQ MSG ------------ */
+    NetICMPv6_TxMsgReqValidate(type, code, &err);
+    if (err != NET_ICMPv6_ERR_NONE) {
+        NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+        goto exit;
+    }
+
+                                                                /* ------- VALIDATE ICMPv6 TX REQ MSG SRC ADDR -------- */
+    if (if_nbr == NET_IF_NBR_NONE) {
+
+        if_nbr = NET_IF_NBR_BASE_CFGD;                          /* Set IF nbr to first configured IF (default IF).      */
+
+        (void)NetIF_IsValidHandler(if_nbr, p_err);
+        if (*p_err != NET_IF_ERR_NONE) {
+             NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+             goto exit;
+        }
+    }
+
+    p_ipv6_addrs = NetIPv6_GetAddrSrcHandler(                      &if_nbr,
+                                            (const  NET_IPv6_ADDR *)p_addr_src,
+                                            (const  NET_IPv6_ADDR *)p_addr_dest,
+                                                                    DEF_NULL,
+                                                                    p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+         NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+         goto exit;
+    }
+
+    is_unspecified = NetIPv6_IsAddrUnspecified(p_addr_src);
+    if (is_unspecified != DEF_YES) {
+        p_addr_src = (NET_IPv6_ADDR *)&p_ipv6_addrs->AddrHost;
+    }
+
+
+                                                                /* -------------- GET ICMPv6 REQ MSG BUF -------------- */
+                                                                /* Calc req msg buf size.                               */
+    switch (type) {
+        case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+             msg_size_hdr = NET_ICMPv6_HDR_SIZE_ECHO;
+
+             if (p_data != DEF_NULL) {
+                 msg_size_data = data_len;
+             } else {
+                 msg_size_data = 0u;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+             msg_size_hdr = NET_NDP_HDR_SIZE_NEIGHBOR_SOL;
+
+             if (p_data != DEF_NULL) {
+                 msg_size_data = data_len;
+             } else {
+                 msg_size_data = 0u;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_SOL:
+             msg_size_hdr = NET_NDP_HDR_SIZE_ROUTER_SOL;
+
+             if (p_data != DEF_NULL) {
+                 msg_size_data = data_len;
+             } else {
+                 msg_size_data = 0u;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1:
+        case NET_ICMPv6_MSG_TYPE_MLDP_DONE:
+             msg_size_hdr = NET_MLDP_HDR_SIZE_DFLT;
+
+             if (p_data != DEF_NULL) {
+                 msg_size_data = data_len;
+             } else {
+                 msg_size_data = 0u;
+             }
+             break;
+
+
+        default:                                                /* See Note #4.                                         */
+             NetICMPv6_TxPktDiscard(DEF_NULL, p_err);
+            *p_err = NET_ERR_TX;
+             goto exit;
+    }
+
+    msg_size_tot = msg_size_hdr + msg_size_data;
+
+                                                                /* Get Size of Data space.                              */
+    frag_used = DEF_NO;
+    mtu       = NetIF_MTU_GetProtocol(if_nbr, NET_PROTOCOL_TYPE_ICMP_V6, NET_IF_FLAG_NONE, &err);
+    if (err != NET_IF_ERR_NONE) {
+        NetICMPv6_TxPktDiscard((NET_BUF *)0, p_err);
+        goto exit;
+    }
+
+
+                                                                /* Remove extension headers size from Data space.       */
+    if (p_ext_hdr_list != DEF_NULL) {
+        p_ext_hdr = p_ext_hdr_list;
+        while (p_ext_hdr != DEF_NULL) {
+            mtu       -= p_ext_hdr->Len;
+            p_ext_hdr  = p_ext_hdr->NextHdrPtr;
+        }
+    }
+
+                                                                /* Check if fragmentation is needed.                    */
+    if (msg_size_tot > mtu) {
+        frag_used = DEF_YES;
+        mtu -= NET_IPv6_FRAG_HDR_SIZE;
+        mtu -= (mtu % NET_IPv6_FRAG_SIZE_UNIT);
+        p_ext_hdr_head = NetIPv6_ExtHdrAddToList(p_ext_hdr_list,
+                                                &frag_hdr,
+                                                 NET_IP_HDR_PROTOCOL_EXT_FRAG,
+                                                 NET_IPv6_FRAG_HDR_SIZE,
+                                                 NetIPv6_PrepareFragHdr,
+                                                 NET_IPv6_EXT_HDR_KEY_FRAG,
+                                                 p_err);
+        if (*p_err != NET_IPv6_ERR_NONE) {
+             NetICMPv6_TxPktDiscard(DEF_NULL, p_err);
+             goto exit;
+        }
+
+    } else {
+        p_ext_hdr_head = p_ext_hdr_list;
+    }
+
+
+                                                                /* Get Index in Data Area by taking into account the ...*/
+                                                                /* ... lower layer headers.                             */
+    data_ix = msg_size_hdr;
+    NetIPv6_GetTxDataIx(if_nbr,
+                        p_ext_hdr_list,
+                        msg_size_tot,
+                        mtu,
+                       &data_ix,
+                       &err);
+    if (err != NET_IPv6_ERR_NONE) {
+        NetICMPv6_TxPktDiscard(DEF_NULL, p_err);
+        goto exit;
+    }
+
+    if (msg_size_hdr > data_ix) {                               /* See Note #5.                                         */
+        NetICMPv6_TxPktDiscard(DEF_NULL, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxInvalidBufIxCtr);
+        goto exit;
+    }
+
+
+                                                                /* Get req msg buf.                                     */
+    msg_ix   = data_ix - msg_size_hdr;
+
+
+
+    buf_size_max = NetBuf_GetMaxSize(if_nbr,
+                                     NET_TRANSACTION_TX,
+                                     DEF_NULL,
+                                     msg_ix);
+
+    buf_size_max_data = (NET_BUF_SIZE)DEF_MIN(buf_size_max, mtu);
+
+    if (frag_used == DEF_YES) {
+        buf_size_max_data -= (buf_size_max_data % NET_IPv6_FRAG_SIZE_UNIT);
+    }
+
+
+    p_msg_req_head = DEF_NULL;
+
+    while (msg_size_tot > 0) {
+
+        req_len    = (CPU_INT32S)DEF_MIN(msg_size_tot, buf_size_max_data);
+
+        p_msg_req = NetBuf_Get(if_nbr,
+                               NET_TRANSACTION_TX,
+                               req_len,
+                               msg_ix,
+                              &msg_ix_offset,
+                               NET_BUF_FLAG_NONE,
+                              &err);
+        if (err != NET_BUF_ERR_NONE) {
+            NetICMPv6_TxPktDiscard(p_msg_req, p_err);
+
+            p_chain_buf = p_msg_req_head;
+
+            while (p_chain_buf != DEF_NULL) {
+                p_chain_buf_next = p_chain_buf->Hdr.NextBufPtr;
+                NetICMPv6_TxPktDiscard(p_chain_buf, p_err);
+                p_chain_buf      = p_chain_buf_next;
+            }
+
+           *p_err = NET_ERR_TX_BUF_NONE_AVAIL;
+            goto exit;
+        }
+        msg_ix += msg_ix_offset;
+                                                                /* If buf is 1st aquired, set p_msg_req_head to it ...  */
+        if (p_msg_req_head == DEF_NULL) {
+            p_msg_req_head  = p_msg_req;
+        } else {                                                /* ... else add it to the end NextBufPtr chain of ...   */
+                                                                /* ... p_msg_req_head.                                  */
+            p_chain_buf     =  p_msg_req_head;
+            p_chain_buf_hdr = &p_msg_req_head->Hdr;
+
+            while (p_chain_buf_hdr->NextBufPtr != DEF_NULL) {
+                p_chain_buf     =  p_chain_buf_hdr->NextBufPtr;
+                p_chain_buf_hdr = &p_chain_buf->Hdr;
+            }
+
+            p_chain_buf_hdr->NextBufPtr =  p_msg_req;
+            p_chain_buf_hdr             = &p_msg_req->Hdr;
+            p_chain_buf_hdr->PrevBufPtr =  p_chain_buf;
+        }
+
+                                                                /* Init req msg buf ctrls.                              */
+        p_msg_req_hdr                        = &p_msg_req->Hdr;
+        p_msg_req_hdr->ICMP_MsgIx            = (CPU_INT16U  )msg_ix;
+        p_msg_req_hdr->ICMP_MsgLen           = (CPU_INT16U  )req_len;
+        p_msg_req_hdr->ICMP_HdrLen           = (CPU_INT16U  )msg_size_hdr;
+        p_msg_req_hdr->TotLen                = (NET_BUF_SIZE)p_msg_req_hdr->ICMP_MsgLen;
+        p_msg_req_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_ICMP_V6;
+        p_msg_req_hdr->ProtocolHdrTypeNetSub =  NET_PROTOCOL_TYPE_ICMP_V6;
+
+
+        msg_size_tot      -= req_len;
+        msg_size_hdr       = 0;
+        buf_size_max_data  = (NET_BUF_SIZE)DEF_MIN(buf_size_max, mtu);
+    }
+
+                                                                /* Copy data into ICMPv6 req tx buf.                    */
+    if (msg_size_data > 0) {
+        NetICMPv6_CpyDataToBuf(p_data,
+                               p_msg_req_head,
+                               msg_size_data,
+                               p_err);
+        if (*p_err != NET_ICMPv6_ERR_NONE) {
+             NetICMPv6_TxPktDiscard(p_msg_req_head, p_err);
+             goto exit;
+        }
+    }
+
+                                                                /* ------------- PREPARE IPv6 PSEUDO HDR -------------- */
+    Mem_Copy(            &ipv6_pseudo_hdr.AddrSrc,
+                          p_addr_src,
+             (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+
+    Mem_Copy(            &ipv6_pseudo_hdr.AddrDest,
+                          p_addr_dest,
+             (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+
+    ipv6_pseudo_hdr.UpperLayerPktLen = (CPU_INT32U)NET_UTIL_NET_TO_HOST_32(p_msg_req_hdr->ICMP_MsgLen);
+    ipv6_pseudo_hdr.Zero             = (CPU_INT16U)0x00u;
+    ipv6_pseudo_hdr.NextHdr          = (CPU_INT16U)NET_UTIL_NET_TO_HOST_16(NET_IP_HDR_PROTOCOL_ICMPv6);
+
+
+
+    p_msg_req_hdr = &p_msg_req_head->Hdr;
+
+                                                                /* --------------- PREPARE ICMP REQ MSG --------------- */
+    NET_ICMPv6_TX_GET_SEQ_NBR(msg_seq_nbr);
+
+    switch (type) {
+        case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+             p_icmp_hdr_echo       = (NET_ICMPv6_HDR_ECHO *)&p_msg_req_head->DataPtr[p_msg_req_hdr->ICMP_MsgIx];
+             p_icmp_hdr_echo->Type =  NET_ICMPv6_MSG_TYPE_ECHO_REQ;
+             p_icmp_hdr_echo->Code =  NET_ICMPv6_MSG_CODE_ECHO_REQ;
+             NET_UTIL_VAL_COPY_SET_NET_16(&p_icmp_hdr_echo->ID,     &id);
+             NET_UTIL_VAL_COPY_SET_NET_16(&p_icmp_hdr_echo->SeqNbr, &msg_seq_nbr);
+                                                                            /* Calc ICMPv6 msg chk sum (see Note #7).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_echo->ChkSum, 0x0000u);    /* Clr             chk sum (see Note #7b).  */
+#ifdef NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumDataCalc((void     *) p_msg_req_head,
+                                                              (void     *)&ipv6_pseudo_hdr,
+                                                              (CPU_INT16U) NET_IPv6_PSEUDO_HDR_SIZE,
+                                                              (NET_ERR  *)&err);
+#endif
+             if (err != NET_UTIL_ERR_NONE) {
+                 NetICMPv6_TxPktDiscard(p_msg_req_head, p_err);
+                 goto exit;
+             }
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_echo->ChkSum, &msg_chk_sum);  /* Copy chk sum in net order (see Note #7c).*/
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+             DEF_BIT_SET(p_msg_req_hdr->Flags, NET_BUF_FLAG_TX_MULTICAST);
+
+             p_icmp_hdr_neighbor_sol       = (NET_NDP_NEIGHBOR_SOL_HDR *)&p_msg_req_head->DataPtr[p_msg_req_hdr->ICMP_MsgIx];
+             p_icmp_hdr_neighbor_sol->Type =  NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL;
+             p_icmp_hdr_neighbor_sol->Code =  NET_ICMPv6_MSG_CODE_NDP_NEIGHBOR_SOL;
+             Mem_Clr(&p_icmp_hdr_neighbor_sol->Reserved, sizeof(p_icmp_hdr_neighbor_sol->Reserved));
+
+             is_multicast = NetIPv6_IsAddrMcast(p_addr_dest);
+             if (is_multicast == DEF_YES) {
+                 NetICMPv6_TxPktDiscard(p_msg_req_head, p_err);
+                *p_err = NET_ERR_INVALID_ADDR;
+                 goto exit;
+             }
+
+             Mem_Copy(            &p_icmp_hdr_neighbor_sol->TargetAddr,
+                                   p_addr_dest,
+                      (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+
+                                                                /* Destination address of a Neighbor Solicitation   ... */
+                                                                /* ... Message must be the solicited-node multicast ... */
+                                                                /* ... when sender is performing address resolution ... */
+                                                                /* ... and DAD.                                         */
+             if (dest_mcast == DEF_YES) {
+                 NetIPv6_AddrMcastSolicitedSet(&ipv6_mcast_sol_addr, p_addr_dest, if_nbr, p_err);
+                 p_addr_dest = &ipv6_mcast_sol_addr;
+                 Mem_Copy(            &ipv6_pseudo_hdr.AddrDest,
+                                      &ipv6_mcast_sol_addr,
+                          (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+             }
+
+                                                                            /* Calc ICMPv6 msg chk sum (see Note #5).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_neighbor_sol->ChkSum, 0x0000u);/* Clr         chk sum (see Note #5b).  */
+#ifdef NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumDataCalc(p_msg_req_head,
+                                                             &ipv6_pseudo_hdr,
+                                                              NET_IPv6_PSEUDO_HDR_SIZE,
+                                                             &err);
+#endif
+             if (err != NET_UTIL_ERR_NONE) {
+                 NetICMPv6_TxPktDiscard(p_msg_req_head, p_err);
+                 goto exit;
+             }
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_neighbor_sol->ChkSum, &msg_chk_sum);
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_SOL:
+             DEF_BIT_SET(p_msg_req_hdr->Flags, NET_BUF_FLAG_TX_MULTICAST);
+
+             p_icmp_hdr_router_sol = (NET_NDP_ROUTER_SOL_HDR *)&p_msg_req_head->DataPtr[p_msg_req_hdr->ICMP_MsgIx];
+             p_icmp_hdr_router_sol->Type      = NET_ICMPv6_MSG_TYPE_NDP_ROUTER_SOL;
+             p_icmp_hdr_router_sol->Code      = NET_ICMPv6_MSG_CODE_NDP_ROUTER_SOL;
+             p_icmp_hdr_router_sol->Reserved  = 0;
+
+             p_ndp_opt_hdr = (NET_NDP_OPT_HDR *)&p_icmp_hdr_router_sol->Opt;
+
+             if (is_unspecified == DEF_NO) {
+
+                 p_ndp_opt_hdr->Type = NET_NDP_OPT_TYPE_ADDR_SRC;
+                 p_ndp_opt_hdr->Len  = 1u;
+
+                 hw_addr_len = sizeof(hw_addr);
+                 NetIF_AddrHW_GetHandler(if_nbr, hw_addr, &hw_addr_len, p_err);
+                 if (*p_err != NET_IF_ERR_NONE) {
+                     *p_err  = NET_ERR_TX;
+                      goto exit;
+                 }
+
+                 Mem_Copy((void     *)(&p_icmp_hdr_router_sol->Opt + (NET_NDP_OPT_DATA_OFFSET)),
+                          (void     *) &hw_addr[0],
+                          (CPU_SIZE_T)  hw_addr_len);
+             } else {
+                 p_ndp_opt_hdr->Type = NET_NDP_OPT_TYPE_NONE;
+                 p_ndp_opt_hdr->Len  = 0u;
+             }
+
+
+                                                                                /* Calc ICMPv6 msg chk sum (see Note #5).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_router_sol->ChkSum, 0x0000u);  /* Clr             chk sum (see Note #5b).  */
+#ifdef NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumDataCalc((void     *) p_msg_req_head,
+                                                              (void     *)&ipv6_pseudo_hdr,
+                                                                           NET_IPv6_PSEUDO_HDR_SIZE,
+                                                                          &err);
+#endif
+             if (err != NET_UTIL_ERR_NONE) {
+                 NetICMPv6_TxPktDiscard(p_msg_req_head, p_err);
+                 goto exit;
+             }
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_router_sol->ChkSum, &msg_chk_sum);
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1:
+        case NET_ICMPv6_MSG_TYPE_MLDP_DONE:
+             DEF_BIT_SET(p_msg_req_hdr->Flags, NET_BUF_FLAG_TX_MULTICAST);
+
+             p_icmp_hdr_v1 = (NET_MLDP_V1_HDR *)&p_msg_req_head->DataPtr[p_msg_req_hdr->ICMP_MsgIx];
+             p_icmp_hdr_v1->Type           = type;
+             p_icmp_hdr_v1->Code           = code;
+             Mem_Clr(&p_icmp_hdr_v1->MaxResponseDly, sizeof(p_icmp_hdr_v1->MaxResponseDly));
+             Mem_Clr(&p_icmp_hdr_v1->Reserved,       sizeof(p_icmp_hdr_v1->Reserved));
+
+             Mem_Copy(            &p_icmp_hdr_v1->McastAddr,
+                                   p_data,
+                      (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+
+                                                                            /* Calc ICMPv6 msg chk sum (see Note #5).   */
+             NET_UTIL_VAL_SET_NET_16(&p_icmp_hdr_v1->ChkSum, 0x0000u);      /* Clr             chk sum (see Note #5b).  */
+#ifdef NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX
+             msg_chk_sum = 0u;
+#else
+             msg_chk_sum = NetUtil_16BitOnesCplChkSumDataCalc((void     *) p_msg_req_head,
+                                                              (void     *)&ipv6_pseudo_hdr,
+                                                                           NET_IPv6_PSEUDO_HDR_SIZE,
+                                                                          &err);
+#endif
+             if (err != NET_UTIL_ERR_NONE) {
+                 NetICMPv6_TxPktDiscard(p_msg_req_head, p_err);
+                 goto exit;
+             }
+             NET_UTIL_VAL_COPY_16(&p_icmp_hdr_v1->ChkSum, &msg_chk_sum);
+             break;
+
+
+        default:                                                /* See Note #4.                                         */
+             NetICMPv6_TxPktDiscard(p_msg_req_head, p_err);
+             goto exit;
+    }
+
+                                                                /* ---------------- TX ICMPv6 REQ MSG ----------------- */
+    NetIPv6_Tx(p_msg_req_head,
+               p_addr_src,
+               p_addr_dest,
+               p_ext_hdr_head,
+               NET_IPv6_HDR_TRAFFIC_CLASS,
+               NET_IPv6_HDR_FLOW_LABEL,
+               hop_lim,
+               p_err);
+
+                                                                /* ------ FREE ICMPv6 REQ MSG / UPDATE TX STATS ------- */
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+             NetICMPv6_TxPktFree(p_msg_req);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.TxMsgCtr);
+             NET_CTR_STAT_INC(Net_StatCtrs.ICMPv6.TxMsgReqCtr);
+             break;
+
+        case NET_ERR_IF_LINK_DOWN:
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxPktDiscardedCtr);
+            *p_err = NET_ERR_IF_LINK_DOWN;
+             goto exit;
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        case NET_IPv6_ERR_TX_PKT:
+                                                                /* See Note #8.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxPktDiscardedCtr);
+            *p_err = NET_ERR_TX;
+             goto exit;
+
+        default:
+             NetICMPv6_TxPktDiscard(p_msg_req_head, p_err);
+            *p_err = NET_ERR_TX;
+             goto exit;
+    }
+
+
+                                                                /* ---------- RTN ICMPv6 REQ MSG ID/SEQ NBR ----------- */
+    id_seq.ID     = id;
+    id_seq.SeqNbr = msg_seq_nbr;
+
+   *p_err         = NET_ICMPv6_ERR_NONE;
+
+exit:
+    return (id_seq);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NetICMPv6_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as ICMPv6 protocol.
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header that received ICMPv6 packet.
+*               --------    Argument validated in NetICMPv6_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             Received buffer's ICMPv6 header validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT ICMPv6.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetICMPv6_RxPktValidateBuf (NET_BUF_HDR  *p_buf_hdr,
+                                          NET_ERR      *p_err)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  valid;
+    NET_ERR      err;
+
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* -------------- VALIDATE ICMPv6 BUF HDR ------------- */
+    if (p_buf_hdr->ProtocolHdrType != NET_PROTOCOL_TYPE_ICMP_V6) {
+        if_nbr = p_buf_hdr->IF_Nbr;
+        valid  = NetIF_IsValidHandler(if_nbr, &err);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxInvalidProtocolCtr);
+        }
+       *p_err = NET_ERR_INVALID_PROTOCOL;
+        return;
+    }
+
+    if (p_buf_hdr->ICMP_MsgIx == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxInvalidBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_ICMPv6_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetICMP_RxPktValidate()
+*
+* Description : (1) Validate received ICMPv6 packet :
+*
+*                   (a) Validate the received packet's destination                  See Note #3
+*
+*                   (b) (1) Validate the received packet's following ICMPv6 header fields :
+*
+*                           (A) Type
+*                           (B) Code
+*                           (C) Pointer                         See RFC  #4443, Section 3.4 'Parameter Problem Message'
+*                           (D) Message Length
+*                           (E) Check-Sum                       See Note #7a
+*
+*                   (c) Convert the following ICMPv6 message fields from network-order to host-order :
+*
+*                       (1) Check-Sum                                               See Note #7c
+*
+*                           (A) These fields are NOT converted directly in the received packet buffer's
+*                               data area but are converted in local or network buffer variables ONLY.
+*
+*                   (d) Update network buffer's length controls
+*
+*                   (e) Demultiplex ICMPv6 message type
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMP packet.
+*               ----        Argument checked   in NetICMPv6_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetICMPv6_Rx().
+*
+*               p_icmp_hdr  Pointer to received packet's ICMP header.
+*               ---------   Argument validated in NetICMPv6_Rx()/NetICMPv6_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_MSG_TYPE_ERR       Received packet validated as ICMPv6 Error   Message.
+*                               NET_ICMPv6_ERR_MSG_TYPE_REQ       Received packet validated as ICMPv6 Request Message.
+*                               NET_ICMPv6_ERR_MSG_TYPE_REPLY     Received packet validated as ICMPv6 Reply   Message.
+*
+*                               NET_ICMPv6_ERR_RX_BCAST           Packet received via broadcast.
+*                               NET_ICMPv6_ERR_RX_MCAST           Packet received via multicast.
+*
+*                               NET_ICMPv6_ERR_INVALID_TYPE       Invalid/unknown ICMPv6 message type.
+*                               NET_ICMPv6_ERR_INVALID_CODE       Invalid/unknown ICMPv6 message code.
+*                               NET_ICMPv6_ERR_INVALID_PTR        Invalid ICMPv6 message pointer outside ICMPv6 message.
+*                               NET_ICMPv6_ERR_INVALID_LEN        Invalid ICMPv6 message      length.
+*                               NET_ICMPv6_ERR_INVALID_LEN_DATA   Invalid ICMPv6 message data length.
+*                               NET_ICMPv6_ERR_INVALID_CHK_SUM    Invalid ICMPv6 check-sum.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_Rx().
+*
+* Note(s)     : (2) See 'net_icmpv6.h  ICMPv6 HEADER' for ICMPv6 header format.
+*
+*               (3) (a) RFC #1122, Sections 3.2.2.6 & 3.2.2.8 state that "an ICMP ... Request destined to an
+*                       IP broadcast or IP multicast address MAY be silently discarded".
+*
+*                       However, NO RFC specifies how OTHER ICMPv6 messages should handle messages received by
+*                       broadcast or multicast. Therefore, it is assumed that ALL ICMPv6 messages destined
+*                       to an IP broadcast or IP multicast address SHOULD be silently discarded.
+*
+*                   (b) Since a packet destined to a valid IPv6 broadcast address MUST also have been received as
+*                       a link-layer broadcast (see RFC #1122, Section 3.3.6 & 'net_ip.c  NetIPv6_RxPktValidate()
+*                       Note #9d3B1b'), the determination of an IPv6 broadcast destination address need only verify
+*                       that the received packet was received as a link-layer broadcast packet.
+*               (4) (a) RFC #1122, Section 3.2.2 requires that ICMPv6 messages with the following invalid ICMPv6
+*                       header fields be "silently discarded" :
+*
+*                       (1) Type                                    RFC #1122, Section 3.2.2
+*
+*                   (b) Assumes that ICMPv6 messages with the following invalid ICMPv6 header fields should also
+*                       be "silently discarded" :
+*
+*                       (1) Code
+*                       (2) Message Length
+*                       (3) Pointer
+*                       (4) Check-Sum
+*
+*               (5) See 'net_icmpv6.h  ICMPv6 MESSAGE TYPES & CODES' for supported ICMPv6 message types/codes.
+*
+*               (6) Since ICMPv6 message headers do NOT contain a message length field, the ICMPv6 Message Length
+*                   is assumed to be the remaining IPv6 Datagram Length.
+*
+*               (7) (a) ICMPv6 message Check-Sum field MUST be validated AFTER (or BEFORE) any multi-octet
+*                       words are converted from network-order to host-order since "the sum of 16-bit
+*                       integers can be computed in either byte order" [RFC #1071, Section 2.(B)].
+*
+*                       In other words, the ICMPv6 message Check-Sum CANNOT be validated AFTER SOME but NOT
+*                       ALL multi-octet words have been converted from network-order to host-order.
+*
+*                       However, ALL received packets' multi-octet words are converted in local or network
+*                       buffer variables ONLY (see Note #1cA).  Therefore, ICMPv6 message Check-Sum may be
+*                       validated at any point.
+*
+*                   (b) RFC #792, Section 'Echo or Echo Reply Message : Checksum' specifies that "if the
+*                       total length is odd, the received data is padded with one octet of zeros for
+*                       computing the checksum".
+*
+*                       However, NO RFC specifies how OTHER ICMP message types should handle odd-length
+*                       check-sums.  Therefore, it is assumed that ICMPv6 Echo Request & Echo Reply Messages
+*                       should handle odd-length check-sums according to RFC #792's 'Echo or Echo Reply
+*                       Message : Checksum' specification, while ALL other ICMPv6 message types should handle
+*                       odd-length check-sums according to RFC #1071, Section 4.1.
+*
+*                       See also 'net_util.c  NetUtil_16BitSumDataCalc()  Note #8'.
+*
+*                   (c) After the ICMPv6 message Check-Sum is validated, it is NOT necessary to convert the
+*                       Check-Sum from network-order to host-order since it is NOT required for further
+*                       processing.
+*
+*               (8) Default case already invalidated earlier in this function.  However, the default case
+*                   is included as an extra precaution in case 'Type' is incorrectly modified.
+*
+*               (9) (a) (1) Except for ICMPv6 Echo & Echo Reply Messages (see Note #9b), most ICMP messages do
+*                           NOT permit user &/or application data (see RFC #792 & RFC #1122, Sections 3.2.2).
+*
+*                       (2) Most ICMPv6 messages that do NOT contain user &/or application data will NOT be
+*                           received in separate packet buffers since most ICMP messages are NOT large enough
+*                           to be fragmented since the minimum network buffer size MUST be configured such
+*                           that most ICMPv6 messages fit within a single packet buffer (see 'net_buf.h
+*                           NETWORK BUFFER INDEX & SIZE DEFINES  Note #1d').
+*
+*                           However, RFC #1122, Section 3.2.2 states that "every ICMPv6 error message includes
+*                           the Internet header and at least the first 8 data octets of the datagram that
+*                           triggered the error; more than 8 octets MAY be sent".  Thus, it is possible that
+*                           some received ICMPv6 error messages MAY contain more than 8 octets of the Internet
+*                           header & may therefore be received in one or more fragmented packet buffers.
+*
+*                           Furthermore, these additional error message octets SHOULD NOT contain user &/or
+*                           application data.
+*
+*                       (3) ICMPv6 data index value to clear was previously initialized in NetBuf_Get() when
+*                           the buffer was allocated.  This index value does NOT need to be re-cleared but
+*                           is shown for completeness.
+*
+*                   (b) (1) ICMPv6 Echo & Echo Reply Messages permit the transmission & receipt of user &/or
+*                           application data (see RFC #792, Section 'Echo or Echo Reply Message' & RFC #1122,
+*                           Section 3.2.2.6).
+*
+*                           Since the minimum network buffer size MUST be configured such that the entire
+*                           ICMPv6 Echo Message header MUST be received in a single packet (see 'net_buf.h
+*                           NETWORK BUFFER INDEX & SIZE DEFINES  Note #1d'), after the ICMPv6 Echo Message
+*                           header size is decremented from the first packet buffer's remaining number of
+*                           data octets, any remaining octets MUST be user &/or application data octets.
+*
+*                           (A) Note that the 'Data' index is updated regardless of a null-size data length.
+*
+*                       (2) If additional packet buffers exist, the remaining IP datagram 'Data' MUST be
+*                           user &/or application data.  Therefore, the 'Data' length does NOT need to
+*                           be adjusted but the 'Data' index MUST be updated.
+*
+*                   (c) #### Total ICMPv6 Message Length is duplicated in ALL fragmented packet buffers
+*                       (may NOT be necessary; remove if unnecessary).
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv6_RxPktValidate (NET_BUF         *p_buf,
+                                       NET_BUF_HDR     *p_buf_hdr,
+                                       NET_ICMPv6_HDR  *p_icmp_hdr,
+                                       NET_ERR         *p_err)
+{
+    CPU_BOOLEAN                 addr_multicast;
+    CPU_BOOLEAN                 icmp_chk_sum_valid;
+    CPU_INT16U                  icmp_msg_len_hdr;
+    CPU_INT16U                  icmp_msg_len_min;
+    CPU_INT16U                  icmp_msg_len_max;
+    CPU_INT16U                  icmp_msg_len;
+    NET_ICMPv6_HDR_PARAM_PROB  *p_icmp_param_prob;
+    NET_BUF                    *p_buf_next;
+    NET_BUF_HDR                *p_buf_next_hdr;
+    NET_IPv6_PSEUDO_HDR         ipv6_pseudo_hdr;
+
+
+    addr_multicast = NetIPv6_IsAddrMcast(&p_buf_hdr->IPv6_AddrDest);
+    if (addr_multicast != DEF_NO) {                             /* If ICMPv6 rx'd as multicast, rtn err (see Note #3).  */
+        switch (p_icmp_hdr->Type) {
+            case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+            case NET_ICMPv6_MSG_TYPE_PKT_TOO_BIG:
+            case NET_ICMPv6_MSG_TYPE_PARAM_PROB:
+            case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+            case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_ADV:
+            case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_SOL:
+            case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_ADV:
+            case NET_ICMPv6_MSG_TYPE_NDP_REDIRECT:
+            case NET_ICMPv6_MSG_TYPE_MLDP_QUERY:
+            case NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1:
+                 break;
+
+
+            default:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxMcastCtr);
+                *p_err = NET_ICMPv6_ERR_RX_MCAST;
+                 return;
+        }
+    }
+
+
+
+                                                                /* ------------ VALIDATE ICMPv6 TYPE/CODE ------------- */
+    switch (p_icmp_hdr->Type) {                                 /* See Notes #4a1 & #4b1.                               */
+        case NET_ICMPv6_MSG_TYPE_DEST_UNREACH:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv6_MSG_CODE_DEST_NO_ROUTE:
+                 case NET_ICMPv6_MSG_CODE_DEST_COM_PROHIBITED:
+                 case NET_ICMPv6_MSG_CODE_DEST_BEYONG_SCOPE:
+                 case NET_ICMPv6_MSG_CODE_DEST_ADDR_UNREACHABLE:
+                 case NET_ICMPv6_MSG_CODE_DEST_PORT_UNREACHABLE:
+                 case NET_ICMPv6_MSG_CODE_DEST_SRC_ADDR_FAIL_INGRESS:
+                 case NET_ICMPv6_MSG_CODE_DEST_ROUTE_REJECT:
+                      icmp_msg_len_hdr = NET_ICMPv6_HDR_SIZE_DEST_UNREACH;
+                      icmp_msg_len_min = NET_ICMPv6_MSG_LEN_MIN_DEST_UNREACH;
+                      icmp_msg_len_max = NET_ICMPv6_MSG_LEN_MAX_DEST_UNREACH;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_TIME_EXCEED:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv6_MSG_CODE_TIME_EXCEED_HOP_LIMIT:
+                 case NET_ICMPv6_MSG_CODE_TIME_EXCEED_FRAG_REASM:
+                      icmp_msg_len_hdr = NET_ICMPv6_HDR_SIZE_TIME_EXCEED;
+                      icmp_msg_len_min = NET_ICMPv6_MSG_LEN_MIN_TIME_EXCEED;
+                      icmp_msg_len_max = NET_ICMPv6_MSG_LEN_MAX_TIME_EXCEED;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_PARAM_PROB:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv6_MSG_CODE_PARAM_PROB_IP_HDR:
+                 case NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_NEXT_HDR:
+                 case NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_OPT:
+                      icmp_msg_len_hdr  =  NET_ICMPv6_HDR_SIZE_PARAM_PROB;
+                      icmp_msg_len_min  =  NET_ICMPv6_MSG_LEN_MIN_PARAM_PROB;
+                      icmp_msg_len_max  =  NET_ICMPv6_MSG_LEN_MAX_PARAM_PROB;
+
+                      p_icmp_param_prob = (NET_ICMPv6_HDR_PARAM_PROB *)p_icmp_hdr;
+                      if (p_icmp_param_prob->Ptr < NET_ICMPv6_MSG_PTR_MIN_PARAM_PROB) { /* If ptr val < min ptr val, .. */
+                          NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrPtrCtr);
+                         *p_err = NET_ICMPv6_ERR_INVALID_PTR;                           /* ... rtn err (see Note #4b3). */
+                          return;
+                      }
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+        case NET_ICMPv6_MSG_TYPE_ECHO_REPLY:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv6_MSG_CODE_ECHO:
+                      icmp_msg_len_hdr = NET_ICMPv6_HDR_SIZE_ECHO;
+                      icmp_msg_len_min = NET_ICMPv6_MSG_LEN_MIN_ECHO;
+                      icmp_msg_len_max = NET_ICMPv6_MSG_LEN_MAX_ECHO;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv6_MSG_CODE_NDP_NEIGHBOR_SOL:
+                      icmp_msg_len_hdr = NET_NDP_HDR_SIZE_NEIGHBOR_SOL;
+                      icmp_msg_len_min = NET_NDP_MSG_LEN_MIN_NEIGHBOR_SOL;
+                      icmp_msg_len_max = NET_NDP_MSG_LEN_MAX_NEIGHBOR_SOL;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_ADV:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv6_MSG_CODE_NDP_NEIGHBOR_ADV:
+                      icmp_msg_len_hdr = NET_NDP_HDR_SIZE_NEIGHBOR_ADV;
+                      icmp_msg_len_min = NET_NDP_MSG_LEN_MIN_NEIGHBOR_ADV;
+                      icmp_msg_len_max = NET_NDP_MSG_LEN_MAX_NEIGHBOR_ADV;
+                      break;
+
+
+                default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_ADV:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv6_MSG_CODE_NDP_ROUTER_ADV:
+                      icmp_msg_len_hdr = NET_NDP_HDR_SIZE_ROUTER_ADV;
+                      icmp_msg_len_min = NET_NDP_MSG_LEN_MIN_ROUTER_ADV;
+                      icmp_msg_len_max = NET_NDP_MSG_LEN_MAX_ROUTER_ADV;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_REDIRECT:
+             switch (p_icmp_hdr->Code) {
+                 case NET_ICMPv6_MSG_CODE_NDP_REDIRECT:
+                      icmp_msg_len_hdr = NET_NDP_HDR_SIZE_REDIRECT;
+                      icmp_msg_len_min = NET_NDP_MSG_LEN_MIN_REDIRECT;
+                      icmp_msg_len_max = NET_NDP_MSG_LEN_MAX_REDIRECT;
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_MLDP_QUERY:
+        case NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1:                /* Code is ignored for MLDP messages.                  */
+             icmp_msg_len_hdr = NET_MLDP_HDR_SIZE_DFLT;
+             icmp_msg_len_min = NET_MLDP_MSG_SIZE_MIN;
+             icmp_msg_len_max = NET_MLDP_MSG_SIZE_MAX;
+             break;
+
+
+        default:                                                /* ------------------ INVALID TYPES ------------------- */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrTypeCtr);
+            *p_err = NET_ICMPv6_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+                                                                /* ------------- VALIDATE ICMPv6 MSG LEN -------------- */
+    icmp_msg_len           = p_buf_hdr->IP_DatagramLen;         /* See Note #6.                                         */
+    p_buf_hdr->ICMP_MsgLen = icmp_msg_len;
+    if (p_buf_hdr->ICMP_MsgLen < icmp_msg_len_min) {            /* If msg len < min msg len, rtn err.                   */
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrMsgLenCtr);
+       *p_err = NET_ICMPv6_ERR_INVALID_LEN;
+        return;
+    }
+    if (icmp_msg_len_max != NET_ICMPv6_MSG_LEN_MAX_NONE) {
+        if (p_buf_hdr->ICMP_MsgLen > icmp_msg_len_max) {        /* If msg len > max msg len, rtn err.                   */
+            NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrMsgLenCtr);
+           *p_err = NET_ICMPv6_ERR_INVALID_LEN;
+            return;
+        }
+    }
+
+    if (p_icmp_hdr->Type == NET_ICMPv6_MSG_TYPE_PARAM_PROB) {   /* For ICMP Param Prob msg,   ...                       */
+        if (p_icmp_param_prob->Ptr >= p_buf_hdr->ICMP_MsgLen) { /* ... if ptr val >= msg len, ...                       */
+            NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrPtrCtr);
+           *p_err = NET_ICMPv6_ERR_INVALID_PTR;                 /* ... rtn err (see Note #4b3).                         */
+            return;
+        }
+    }
+
+                                                                /* ------------- VALIDATE ICMPv6 CHK SUM -------------- */
+                                                                /* See Note #7.                                         */
+                                                                /* See Note #7b.                                        */
+    Mem_Copy(&ipv6_pseudo_hdr.AddrSrc, &p_buf_hdr->IPv6_AddrSrc, sizeof(ipv6_pseudo_hdr.AddrSrc));
+    Mem_Copy(&ipv6_pseudo_hdr.AddrDest, &p_buf_hdr->IPv6_AddrDest, sizeof(ipv6_pseudo_hdr.AddrDest));
+    ipv6_pseudo_hdr.UpperLayerPktLen = (CPU_INT32U)NET_UTIL_HOST_TO_NET_32(p_buf_hdr->ICMP_MsgLen);
+    ipv6_pseudo_hdr.Zero             = (CPU_INT16U)0x00u;
+    ipv6_pseudo_hdr.NextHdr          = (CPU_INT16U)NET_UTIL_HOST_TO_NET_16(NET_IP_HDR_PROTOCOL_ICMPv6);
+
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv6_MSG_TYPE_DEST_UNREACH:
+        case NET_ICMPv6_MSG_TYPE_TIME_EXCEED:
+        case NET_ICMPv6_MSG_TYPE_PARAM_PROB:
+             icmp_chk_sum_valid = NetUtil_16BitOnesCplChkSumHdrVerify((void     *)p_icmp_hdr,
+                                                                                  p_buf_hdr->ICMP_MsgLen,
+                                                                                  p_err);
+             if (*p_err != NET_UTIL_ERR_NONE) {
+                 *p_err = NET_ICMPv6_ERR_INVALID_CHK_SUM;
+                  return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+        case NET_ICMPv6_MSG_TYPE_ECHO_REPLY:
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_ADV:
+        case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_ADV:
+        case NET_ICMPv6_MSG_TYPE_NDP_REDIRECT:
+        case NET_ICMPv6_MSG_TYPE_MLDP_QUERY:
+        case NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1:
+#ifdef  NET_ICMP_CHK_SUM_OFFLOAD_RX_EN
+            icmp_chk_sum_valid  = DEF_YES;
+#else
+             icmp_chk_sum_valid = NetUtil_16BitOnesCplChkSumDataVerify((void        *) p_buf,
+                                                                       (void        *)&ipv6_pseudo_hdr,
+                                                                                       NET_IPv6_PSEUDO_HDR_SIZE,
+                                                                                       p_err);
+             if (*p_err != NET_UTIL_ERR_NONE) {
+                 *p_err = NET_ICMPv6_ERR_INVALID_CHK_SUM;
+                  return;
+             }
+#endif
+             break;
+
+
+        default:                                                /* See Note #8.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrTypeCtr);
+            *p_err = NET_ICMPv6_ERR_INVALID_TYPE;
+             return;
+    }
+
+    if (icmp_chk_sum_valid != DEF_OK) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrChkSumCtr);
+       *p_err = NET_ICMPv6_ERR_INVALID_CHK_SUM;
+        return;
+    }
+#if 0                                                           /* Conv to host-order NOT necessary (see Note #7c).     */
+   (void)NET_UTIL_VAL_GET_NET_16(&p_icmp_hdr->ChkSum);
+#endif
+
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+    p_buf_hdr->ICMP_HdrLen = icmp_msg_len_hdr;
+
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv6_MSG_TYPE_DEST_UNREACH:
+        case NET_ICMPv6_MSG_TYPE_TIME_EXCEED:
+        case NET_ICMPv6_MSG_TYPE_PARAM_PROB:
+             p_buf_hdr->DataLen = 0u;                           /* Clr data len/ix       (see Note #9a1).               */
+#if 0                                                           /* Clr'd in NetBuf_Get() [see Note #9a3].               */
+             p_buf_hdr->DataIx  = NET_BUF_IX_NONE;
+#endif
+
+             p_buf_next = p_buf_hdr->NextBufPtr;
+             while (p_buf_next != (NET_BUF *)0) {               /* Clr ALL pkt bufs' data len/ix (see Note #9a2).       */
+                 p_buf_next_hdr              = &p_buf_next->Hdr;
+                 p_buf_next_hdr->DataLen     =  0u;
+#if 0                                                           /* Clr'd in NetBuf_Get() [see Note #9a3].               */
+                 p_buf_next_hdr->DataIx      =  NET_BUF_IX_NONE;
+#endif
+                 p_buf_next_hdr->ICMP_HdrLen =  0u;             /* NULL ICMPv6 hdr len in each pkt buf.                 */
+                 p_buf_next_hdr->ICMP_MsgLen =  icmp_msg_len;   /* Dup  ICMPv6 msg len in each pkt buf (see Note #9c).  */
+                 p_buf_next                  =  p_buf_next_hdr->NextBufPtr;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+        case NET_ICMPv6_MSG_TYPE_ECHO_REPLY:
+                                                                /* Calc ICMP Echo Msg data len/ix (see Note #9b).       */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+             if (p_buf_hdr->ICMP_HdrLen > p_buf_hdr->DataLen) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrDataLenCtr);
+                *p_err = NET_ICMPv6_ERR_INVALID_LEN_DATA;
+                 return;
+             }
+#endif
+             p_buf_hdr->DataLen -= (NET_BUF_SIZE) p_buf_hdr->ICMP_HdrLen;
+             p_buf_hdr->DataIx   = (CPU_INT16U  )(p_buf_hdr->ICMP_MsgIx + NET_ICMPv6_MSG_LEN_MIN_ECHO);
+
+             p_buf_next = p_buf_hdr->NextBufPtr;
+             while (p_buf_next != (NET_BUF *)0) {               /* Calc ALL pkt bufs' data len/ix   (see Note #9b2).    */
+                 p_buf_next_hdr              = &p_buf_next->Hdr;
+                 p_buf_next_hdr->DataIx      =  p_buf_next_hdr->ICMP_MsgIx;
+                 p_buf_next_hdr->ICMP_HdrLen =  0u;             /* NULL ICMP hdr len in each pkt buf.                   */
+                 p_buf_next_hdr->ICMP_MsgLen =  icmp_msg_len;   /* Dup  ICMP msg len in each pkt buf (see Note #9c).    */
+                 p_buf_next                  =  p_buf_next_hdr->NextBufPtr;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_ADV:
+        case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_ADV:
+        case NET_ICMPv6_MSG_TYPE_NDP_REDIRECT:
+        case NET_ICMPv6_MSG_TYPE_MLDP_QUERY:
+        case NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1:
+             break;
+
+
+        default:                                                /* See Note #8.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrTypeCtr);
+            *p_err = NET_ICMPv6_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* -------------- DEMUX ICMPv6 MSG TYPE --------------- */
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv6_MSG_TYPE_DEST_UNREACH:
+        case NET_ICMPv6_MSG_TYPE_TIME_EXCEED:
+        case NET_ICMPv6_MSG_TYPE_PARAM_PROB:
+            *p_err = NET_ICMPv6_ERR_MSG_TYPE_ERR;
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+            *p_err = NET_ICMPv6_ERR_MSG_TYPE_REQ;
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+            *p_err = NET_ICMPv6_ERR_MSG_TYPE_NEIGHBOR_SOL;
+             break;
+
+
+       case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_ADV:
+           *p_err = NET_ICMPv6_ERR_MSG_TYPE_NEIGHBOR_ADV;
+            break;
+
+
+       case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_ADV:
+           *p_err = NET_ICMPv6_ERR_MSG_TYPE_ROUTER_ADV;
+            break;
+
+
+       case NET_ICMPv6_MSG_TYPE_NDP_REDIRECT:
+           *p_err = NET_ICMPv6_ERR_MSG_TYPE_REDIRECT;
+            break;
+
+
+       case NET_ICMPv6_MSG_TYPE_MLDP_QUERY:
+           *p_err = NET_ICMPv6_ERR_MSG_TYPE_QUERY;
+            break;
+
+
+       case NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1:
+           *p_err = NET_ICMPv6_ERR_MSG_TYPE_REPORT;
+            break;
+
+
+       case NET_ICMPv6_MSG_TYPE_ECHO_REPLY:
+           *p_err = NET_ICMPv6_ERR_MSG_TYPE_REPLY;
+            break;
+
+
+       default:                                                 /* See Note #8.                                         */
+            NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxHdrTypeCtr);
+           *p_err = NET_ICMPv6_ERR_INVALID_TYPE;
+            return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetICMPv6_RxPktFree()
+*
+* Description : Free network buffer(s).
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv6_RxPktFree (NET_BUF  *p_buf)
+{
+   (void)NetBuf_FreeBufList(           p_buf,
+                            (NET_CTR *)0);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetICMPv6_RxPktDiscard()
+*
+* Description : On any ICMPv6 receive error(s), discard ICMPv6 packet(s) & buffer(s).
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv6_RxPktDiscard (NET_BUF  *p_buf,
+                                      NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.ICMPv6.RxPktDiscardedCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBufList(           p_buf,
+                            (NET_CTR *)p_ctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetICMPv6_TxMsgErrValidate()
+*
+* Description : (1) Validate received packet & transmit error parameters for ICMPv6 Error Message transmit :
+*
+*                   (a) RFC #4443, Section 2.4 (e) specifies that "an ICMP error message MUST NOT be sent as
+*                       the result of receiving the following" :
+*
+*                       (1) "An ICMPv6 Error Message",                                                      ...
+*
+*                       (2) "An ICMPv6 redirect message",                                                   ...
+*
+*                       (3) "A packet destined to an IPv6 multicast address. (There are two exceptions to
+*                            this rule: (1) the Packet Too Big Message (Section 3.2) to allow Path MTU
+*                            discovery to work for IPv6 multicast, and (2) the Parameter Problem Message,
+*                            Code 2 (Section 3.4) reporting an unrecognized IPv6 option (see Section 4.2
+*                            of [IPv6]) that has the Option Type highest-order two bits set to 10)",        ...
+*
+*                       (4) "A packet sent as a link-layer multicast (the exceptions from (3) apply to
+*                            this case, too)",                                                              ...
+*
+*                       (5) "A packet sent as a link-layer broadcast (the exceptions from (3) apply to
+*                            this case, too)",                                                              ...
+*
+*                       (6) "A packet whose source address does not uniquely identify a single node
+*                            -- e.g., the IPv6 Unspecified Address, an IPv6 multicast address, or an
+*                           address known by the ICMP message originator to be an IPv6 anycast address"
+*
+*                           (A) ALL IPv6 source addresses already validated (see 'net_ip.c  NetIPv6_RxPktValidate()
+*                               Note #9c') except 'This Host' & 'Specified Host' addresses.
+*
+*                   (b) Validate ICMPv6 Error Message transmit parameters :
+*
+*                       (1) Type
+*                       (2) Code
+*                       (3) Pointer                                         See Note #6
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received a packet with error(s).
+*               -----       Argument checked   in NetICMPv6_TxMsgErr().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetICMPv6_TxMsgErr().
+*
+*               p_ip_hdr    Pointer to received packet's IP header.
+*               --------    Argument validated in NetICMPv6_TxMsgErr().
+*
+*               type        ICMPv6 Error Message type (see Note #5) :
+*
+*                               NET_ICMPv6_MSG_TYPE_DEST_UNREACH
+*                               NET_ICMPv6_MSG_TYPE_PKT_TOO_BIG
+*                               NET_ICMPv6_MSG_TYPE_TIME_EXCEED
+*                               NET_ICMPv6_MSG_TYPE_PARAM_PROB
+*
+*               code        ICMPv6 Error Message code (see Note #5).
+*
+*               ptr         Pointer to received packet's ICMPv6 error (optional).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE                   Received packet successfully validated
+*                                                                         for ICMPv6 transmit error message.
+*                               NET_ICMPv6_ERR_TX_INVALID_MCAST       Packet received as a multicast packet.
+*                               NET_ICMPv6_ERR_TX_INVALID_BCAST       Packet received as a broadcast packet.
+*                               NET_ICMPv6_ERR_TX_INVALID_ADDR_SRC    Packet received with a non-single host
+*                                                                         IPv6 source address.
+*                               NET_ICMPv6_ERR_TX_INVALID_FRAG        Packet received as a non-initial fragment.
+*                               NET_ICMPv6_ERR_TX_INVALID_ERR_MSG     Packet received as an ICMP Error Message.
+*                               NET_ICMPv6_ERR_INVALID_TYPE           Invalid/unknown ICMPv6 message type.
+*                               NET_ICMPv6_ERR_INVALID_CODE           Invalid/unknown ICMPv6 message code.
+*                               NET_ICMPv6_ERR_INVALID_PTR            Invalid message pointer outside error message.
+*                               NET_BUF_ERR_INVALID_IX                Invalid/insufficient buffer index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgErr().
+*
+* Note(s)     : (2) See 'net_ipv6.h  IPv6 ADDRESS DEFINES for supported IP addresses.
+*
+*               (3) Default case already invalidated in NetIPv6_RxPktValidate().  However, the default case
+*                   is included as an extra precaution in case 'IP_AddrSrc' is incorrectly modified.
+*
+*               (4) See 'net_icmpv6.h  ICMPv6 MESSAGE TYPES & CODES' for supported ICMPv6 message types & codes.
+*
+*               (5) (a) ICMPv6 Parameter Problem Messages' pointer fields validated by comparing the pointer
+*                       field value to minimum & maximum pointer field values.
+*
+*                   (b) Since an ICMPv6 Parameter Problem Message's minimum pointer field value is NOT less
+*                       than zero (see 'net_icmpv6.h  ICMPv6 POINTER DEFINES'), a minimum pointer field value
+*                       check is NOT required unless native data type 'CPU_INT16U' is incorrectly configured
+*                       as a signed integer in 'cpu.h'.
+*
+*                   (c) Since an ICMPv6 Parameter Problem Message may be received for an IPv6 or higher-layer
+*                       protocol, the maximum pointer field value is specific to each received ICMPv6 packets'
+*                       IPv6 header length & demultiplexed protocol header length :
+*
+*                           Pointer Field Value < Maximum Pointer Field Value = IPv6 Header Length
+*                                                                           [ + Other Protocol Header Length ]
+*
+*                   (d) See 'net_icmpv6.h  ICMP POINTER DEFINES  Note #2' for supported ICMPv6 Parameter Problem
+*                       Message protocols.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv6_TxMsgErrValidate (NET_BUF       *p_buf,
+                                          NET_BUF_HDR   *p_buf_hdr,
+                                          NET_IPv6_HDR  *p_ip_hdr,
+                                          CPU_INT08U     type,
+                                          CPU_INT08U     code,
+                                          CPU_INT32U     ptr,
+                                          NET_ERR       *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT16U       ptr_max;
+    CPU_INT16U       ptr_max_protocol;
+#endif
+#if 0                                                           /* See Note #1a2B.                                      */
+    CPU_BOOLEAN      addr_broadcast;
+#endif
+    CPU_BOOLEAN      addr_multicast;
+    CPU_BOOLEAN      rx_broadcast;
+    CPU_BOOLEAN      ip_flag_frags_more;
+    NET_IPv6_FLAGS   ip_flags;
+    CPU_INT16U       ip_frag_offset;
+    NET_ICMPv6_HDR  *p_icmp_hdr;
+
+
+                                                                /* ------------- CHK LINK-LAYER BROADCAST ------------- */
+    rx_broadcast = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_RX_BROADCAST);
+                                                                /* If pkt rx'd via broadcast and no exception, ...      */
+    if (rx_broadcast != DEF_NO && (type != NET_ICMPv6_MSG_TYPE_PKT_TOO_BIG &&
+                                  (type != NET_ICMPv6_MSG_TYPE_PARAM_PROB  || code != NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_OPT))) {
+       *p_err = NET_ICMPv6_ERR_TX_INVALID_BCAST;                /* ... rtn err (see Note #1a3).                         */
+        return;
+    }
+
+                                                                /* ---------------- CHK IPv6 DEST ADDR ---------------- */
+    addr_multicast = NetIPv6_IsAddrMcast(&p_buf_hdr->IPv6_AddrDest);
+                                                                /* If pkt rx'd via multicast and no exceptions, ...     */
+    if (addr_multicast != DEF_NO && (type != NET_ICMPv6_MSG_TYPE_PKT_TOO_BIG &&
+                                    (type != NET_ICMPv6_MSG_TYPE_PARAM_PROB  || code != NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_OPT))) {
+        *p_err = NET_ICMPv6_ERR_TX_INVALID_MCAST;               /* ... rtn err (see Note #1a2).                         */
+        return;
+    }
+
+                                                                /* ------------------ CHK IPv6 FRAG ------------------- */
+
+    ip_flags           = p_buf_hdr->IPv6_Flags_FragOffset & NET_IPv6_FRAG_FLAGS_MASK;
+    ip_flag_frags_more = DEF_BIT_IS_SET(ip_flags, NET_IPv6_FRAG_FLAG_FRAG_MORE);
+    if (ip_flag_frags_more != DEF_NO) {                         /* If 'More Frags' flag set ...                         */
+        ip_frag_offset = p_buf_hdr->IPv6_Flags_FragOffset & NET_IPv6_FRAG_OFFSET_MASK;
+        if (ip_frag_offset != NET_IPv6_FRAG_OFFSET_NONE) {      /* ... & frag offset != 0,  ...                         */
+           *p_err = NET_ICMPv6_ERR_TX_INVALID_FRAG;             /* ... rtn err for non-initial frag (see Note #1a4).    */
+            return;
+        }
+    }
+
+
+                                                                /* ---------------- CHK ICMPv6 ERR MSG ---------------- */
+    if (p_ip_hdr->NextHdr == NET_IP_HDR_PROTOCOL_ICMPv6) {      /* If rx'd IP datagram is ICMPv6, ...                   */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (p_buf_hdr->ICMP_MsgIx == NET_BUF_IX_NONE) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.RxInvalidBufIxCtr);
+           *p_err = NET_BUF_ERR_INVALID_IX;
+            return;
+        }
+#endif
+        p_icmp_hdr = (NET_ICMPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->ICMP_MsgIx];
+
+        switch (p_icmp_hdr->Type) {                              /* ... chk ICMPv6 msg type & ...                        */
+            case NET_ICMPv6_MSG_TYPE_DEST_UNREACH:
+            case NET_ICMPv6_MSG_TYPE_TIME_EXCEED:
+            case NET_ICMPv6_MSG_TYPE_PARAM_PROB:
+                *p_err = NET_ICMPv6_ERR_TX_INVALID_ERR_MSG;      /* ... rtn err for ICMPv6 err msgs (see Note #1a1).     */
+                 return;
+
+
+            case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+            case NET_ICMPv6_MSG_TYPE_ECHO_REPLY:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                 ptr_max_protocol = p_buf_hdr->ICMP_MsgLen;     /* See Note #5c.                                        */
+#endif
+                 break;
+
+
+            default:                                            /* ------------------ INVALID TYPES ------------------- */
+                *p_err = NET_ICMPv6_ERR_INVALID_TYPE;
+                 return;
+        }
+
+
+    } else {                                                    /* See Note #5d.                                        */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        ptr_max_protocol = 0u;
+#endif
+    }
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------- VALIDATE ICMP ERR MSG TYPE/CODE/PTR -------- */
+    switch (type) {
+        case NET_ICMPv6_MSG_TYPE_DEST_UNREACH:
+             switch (code) {
+                case NET_ICMPv6_MSG_CODE_DEST_NO_ROUTE:
+                case NET_ICMPv6_MSG_CODE_DEST_COM_PROHIBITED:
+                case NET_ICMPv6_MSG_CODE_DEST_BEYONG_SCOPE:
+                case NET_ICMPv6_MSG_CODE_DEST_ADDR_UNREACHABLE:
+                case NET_ICMPv6_MSG_CODE_DEST_PORT_UNREACHABLE:
+                     break;
+
+
+                case NET_ICMPv6_MSG_CODE_DEST_SRC_ADDR_FAIL_INGRESS:
+                case NET_ICMPv6_MSG_CODE_DEST_ROUTE_REJECT:
+                default:
+                     NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrCodeCtr);
+                    *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                     return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_TIME_EXCEED:
+             switch (code) {
+                 case NET_ICMPv6_MSG_CODE_TIME_EXCEED_HOP_LIMIT:
+                 case NET_ICMPv6_MSG_CODE_TIME_EXCEED_FRAG_REASM:
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_PARAM_PROB:
+             switch (code) {
+                 case NET_ICMPv6_MSG_CODE_PARAM_PROB_IP_HDR:
+                 case NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_NEXT_HDR:
+                 case NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_OPT:
+                                                                /* Validate ICMPv6 Param Prob Msg ptr (see Note #6).    */
+#if 0                                                           /* See Note #5b.                                        */
+                      if (ptr < NET_ICMPv6_PTR_IX_BASE) {
+                          NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrPtrCtr);
+                         *p_err = NET_ICMPv6_ERR_INVALID_PTR;
+                      }
+#endif
+                      ptr_max = p_buf_hdr->IP_HdrLen + p_buf_hdr->IPv6_ExtHdrLen + ptr_max_protocol;
+                      if (ptr >= ptr_max) {
+                          NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrPtrCtr);
+                         *p_err = NET_ICMPv6_ERR_INVALID_PTR;
+                      }
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+        case NET_ICMPv6_MSG_TYPE_ECHO_REPLY:
+            *p_err = NET_ICMPv6_ERR_TX_INVALID_ERR_MSG;
+             return;
+
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrTypeCtr);
+            *p_err = NET_ICMPv6_ERR_INVALID_TYPE;
+             return;
+    }
+
+#else                                                           /* Prevent 'variable unused' compiler warnings.         */
+   (void)&type;
+   (void)&code;
+   (void)&ptr;
+#endif
+
+   *p_err = NET_ICMPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetICMPv6_TxMsgReqValidate()
+*
+* Description : (1) Validate parameters for ICMPv6 Request Message transmit :
+*
+*                   (a) Type                                                        See Note #2
+*                   (b) Code                                                        See Note #2
+*
+*
+* Argument(s) : type        ICMPv6 Request Message type (see Note #1a) :
+*
+*                               NET_ICMPv6_MSG_TYPE_ECHO_REQ
+*                               NET_ICMPv6_MSG_TYPE_NDP_ROUTER_SOL
+*                               NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL
+*                               NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1
+*                               NET_ICMPv6_MSG_TYPE_MLDP_DONE
+*
+*               code        ICMPv6 Request Message code (see Note #1b).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             Transmit parameters successfully validated
+*                                                                   for ICMPv6 transmit request message.
+*                               NET_ICMPv6_ERR_INVALID_TYPE     Invalid/unknown ICMPv6 message type.
+*                               NET_ICMv6P_ERR_INVALID_CODE     Invalid/unknown ICMPv6 message code.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgReqHandler().
+*
+* Note(s)     : (2) See 'net_icmpv6.h  ICMPv6 MESSAGE TYPES & CODES' for supported ICMPv6 message types & codes.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv6_TxMsgReqValidate (CPU_INT08U   type,
+                                          CPU_INT08U   code,
+                                          NET_ERR     *p_err)
+{
+
+                                                                /* -------- VALIDATE ICMPv6 REQ MSG TYPE/CODE --------- */
+    switch (type) {
+        case NET_ICMPv6_MSG_TYPE_ECHO_REQ:
+             switch (code) {
+                 case NET_ICMPv6_MSG_CODE_ECHO_REQ:
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+             switch (code) {
+                 case NET_ICMPv6_MSG_CODE_NDP_NEIGHBOR_SOL:
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_SOL:
+             switch (code) {
+                 case NET_ICMPv6_MSG_CODE_NDP_ROUTER_SOL:
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1:
+             switch (code) {
+                 case NET_ICMPv6_MSG_CODE_MLDP_REPORT:
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_MLDP_DONE:
+             switch (code) {
+                 case NET_ICMPv6_MSG_CODE_MLDP_DONE:
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrCodeCtr);
+                     *p_err = NET_ICMPv6_ERR_INVALID_CODE;
+                      return;
+             }
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_ECHO_REPLY:
+        case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_ADV:
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_ADV:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.TxHdrTypeCtr);
+            *p_err = NET_ICMPv6_ERR_INVALID_TYPE;
+             return;
+    }
+
+   *p_err = NET_ICMPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetICMPv6_TxPktFree()
+*
+* Description : Free network buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgErr(),
+*               NetICMPv6_TxMsgReq(),
+*               NetICMPv6_TxMsgReply().
+*
+* Note(s)     : (1) (a) Although ICMPv6 Transmit initially requests the network buffer for transmit,
+*                       the ICMPv6 layer does NOT maintain a reference to the buffer.
+*
+*                   (b) Also, since the network interface deallocation task frees ALL unreferenced buffers
+*                       after successful transmission, the ICMP layer must NOT free the transmit buffer.
+*
+*                       See also 'net_if.c  NetIF_TxDeallocTaskHandler()  Note #1c'.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv6_TxPktFree (NET_BUF  *p_buf)
+{
+   (void)&p_buf;                                                 /* Prevent 'variable unused' warning (see Note #1).     */
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetICMPv6_TxPktDiscard()
+*
+* Description : On any ICMPv6 transmit packet error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf       Pointer to network buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgErr(),
+*               NetICMPv6_TxMsgReq(),
+*               NetICMPv6_TxMsgReply().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv6_TxPktDiscard (NET_BUF  *p_buf,
+                                      NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.ICMPv6.TxPktDiscardedCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf(p_buf,
+                        p_ctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetICMPv6_GetTxDataIx()
+*
+* Description : (1) Solves the starting index of the ICMPv6 data from the data buffer beginning.
+*
+*               (2) Starting index if found by adding up the header sizes of the lower-level
+*                   protocol headers.
+*
+*
+* Argument(s) : if_nbr      Network interface number to transmit data.
+*
+*               hdr_len     Length of the ICMPv6 header.
+*
+*               data_len    Length of the ICMPv6 payload.
+*
+*               p_ix        Pointer to the current protocol index.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             No error.
+*                               NET_ICMPv6_ERR_INVALID_LEN      The payload is greater than the largest fragmentable
+*                                                                   IPv6 datagram.
+*                               NET_ICMPv6_ERR_FAULT            Covers errors returned by NetIPv6_GetTxDataIx()
+*                                                               See NetIPv6_GetTxDataIx() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgErr(),
+*               NetICMPv6_TxMsgReply().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (3) If the payload is greater than the largest fragmentable IPv6 datagram (65535 bytes) the packet
+*                   must be discarded (see RFC #2460, Section 4.5).
+*********************************************************************************************************
+*/
+static  void  NetICMPv6_GetTxDataIx (NET_IF_NBR         if_nbr,
+                                     CPU_INT32U         data_len,
+                                     NET_IPv6_EXT_HDR  *p_ext_hdr_list,
+                                     CPU_INT16U        *p_ix,
+                                     NET_ERR           *p_err)
+{
+    NET_MTU     mtu;
+
+
+    mtu        = NetIF_MTU_GetProtocol(if_nbr, NET_PROTOCOL_TYPE_ICMP_V6, NET_IF_FLAG_NONE, p_err);
+
+    if (data_len > NET_IPv6_FRAG_SIZE_MAX) {
+       *p_err = NET_ICMPv6_ERR_INVALID_LEN;                     /* See Note #2.                                         */
+        return;
+    }
+                                                                /* Add the lower-level header offsets.                  */
+    NetIPv6_GetTxDataIx(if_nbr,
+                        p_ext_hdr_list,
+                        data_len,
+                        mtu,
+                        p_ix,
+                        p_err);
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+            *p_err = NET_ICMPv6_ERR_NONE;
+             break;
+
+
+        default:
+           *p_err = NET_ICMPv6_ERR_FAULT;
+            break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetICMPv6_CpyData()
+*
+* Description : Copy data from a source buffer to a destination buffer. Source and destination buffers
+*               can be chained to other buffers to form a fragmented message.
+*
+* Argument(s) : p_buf_src   Pointer to a source      buffer.
+*
+*               p_buf_dest  Pointer to a destination buffer.
+*
+*               msg_len     Length of the message to copy from one buffer to another.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             No errors.
+*
+*                                                               ---------- Returned by NetBuf_DataCopy() ---------
+*                               NET_BUF_ERR_NONE                Copy between network buffer DATA areas successful.
+                                NET_ICMPv6_ERR_FAULT            Covers errors returned by NetBuf_DataCopy().
+                                                                     See NetBuf_DataCopy() for additional return error codes.
+*                               NET_ERR_FAULT_NULL_PTR          Argument 'p_buf_dest'/'p_buf_src' passed a NULL
+*                                                                   pointer.
+*                               NET_BUF_ERR_INVALID_TYPE        Argument 'p_buf_dest'/'p_buf_src's TYPE is invalid
+*                                                                   or unknown.
+*                               NET_BUF_ERR_INVALID_IX          Invalid index  [outside buffer(s)' DATA area(s)].
+*                               NET_BUF_ERR_INVALID_LEN         Invalid length [outside buffer(s)' DATA area(s)].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgReply().
+*
+* Note(s)     : (1) If destination is a fragment and it is not the last of its chain, then the data written
+*                   to that buffer must be a multiple of 8 bytes. (See RFC #2460, Section 4.5).
+*********************************************************************************************************
+*/
+
+static  void  NetICMPv6_CpyData (NET_BUF     *p_buf_src,
+                                 NET_BUF     *p_buf_dest,
+                                 CPU_INT32U   msg_len,
+                                 NET_ERR     *p_err)
+{
+    NET_BUF_HDR   *p_buf_hdr_src;
+    NET_BUF_HDR   *p_buf_hdr_dest;
+    NET_BUF_SIZE   ix_dest;
+    NET_BUF_SIZE   ix_src;
+    NET_BUF_SIZE   len_src;
+    NET_BUF_SIZE   len_dest;
+    NET_BUF_SIZE   len;
+    NET_BUF_SIZE   write_total;
+
+
+    p_buf_hdr_src  = &p_buf_src->Hdr;
+    p_buf_hdr_dest = &p_buf_dest->Hdr;
+
+    ix_src         =  p_buf_hdr_src->ICMP_MsgIx;
+    len_src        =  p_buf_hdr_src->DataLen + p_buf_hdr_src->ICMP_HdrLen;
+    ix_dest        =  p_buf_hdr_dest->ICMP_MsgIx;
+    len_dest       =  p_buf_hdr_dest->TotLen;
+
+    write_total    =  0u;
+
+    if (ix_src == NET_BUF_IX_NONE) {
+       *p_err = NET_ICMPv6_ERR_NONE;
+        return;
+    }
+
+                                                                /* Copy data until all data is moved.                   */
+    while (write_total < msg_len) {
+        len = (NET_BUF_SIZE)DEF_MIN(len_src, len_dest);
+
+        if (len == 0) {
+           *p_err = NET_ICMPv6_ERR_NONE;
+            return;
+        }
+
+        NetBuf_DataCopy(p_buf_dest,
+                        p_buf_src,
+                        ix_dest,
+                        ix_src,
+                        len,
+                        p_err);
+        if (*p_err != NET_BUF_ERR_NONE) {
+            *p_err = NET_ICMPv6_ERR_FAULT;
+             return;
+        }
+                                                                /* Find new source index.                               */
+        if (len_src == len) {
+            p_buf_src = p_buf_hdr_src->NextBufPtr;              /* Source buffer done.                                  */
+            if (p_buf_src == (NET_BUF *)0) {
+               *p_err = NET_ICMPv6_ERR_NONE;
+                return;
+            }
+
+            p_buf_hdr_src = &p_buf_src->Hdr;
+            ix_src        =  p_buf_hdr_src->DataIx;
+            len_src       =  p_buf_hdr_src->DataLen;
+
+        } else {
+            ix_src       += len;
+            len_src      -= len;
+        }
+
+                                                                /* Find new destination index.                          */
+        if (len_dest == len) {
+            p_buf_dest = p_buf_hdr_dest->NextBufPtr;            /* Destination buffer done.                             */
+            if (p_buf_dest == (NET_BUF *)0) {
+               *p_err = NET_ICMPv6_ERR_NONE;
+                return;
+            }
+
+            p_buf_hdr_dest = &p_buf_dest->Hdr;
+            ix_dest       =  p_buf_hdr_dest->ICMP_MsgIx;
+            len_dest      =  p_buf_hdr_dest->TotLen - p_buf_hdr_dest->ICMP_HdrLen;
+
+        } else {
+            ix_dest      += len;
+            len_dest     -= len;
+        }
+
+        write_total      += len;
+    }
+
+   *p_err = NET_ICMPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetICMPv6_CpyDataToBuf()
+*
+* Description : Copy data to a destination buffer. Destination buffer can be chained to other buffers
+*               to form a fragmented message.
+*
+* Argument(s) : p_data      Pointer to the data      buffer.
+*
+*               p_buf_dest  Pointer to a destination buffer.
+*
+*               msg_len     Length of the message to copy in the destination buffer(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMPv6_ERR_NONE             No errors.
+*
+*                                                               ---------- Returned by NetBuf_DataCopy() ---------
+*                               NET_BUF_ERR_NONE                Copy between network buffer DATA areas successful.
+*                               NET_ERR_FAULT_NULL_PTR            Argument 'p_buf_dest'/'p_buf_src' passed a NULL
+*                                                                   pointer.
+*                               NET_BUF_ERR_INVALID_TYPE        Argument 'p_buf_dest'/'p_buf_src's TYPE is invalid
+*                                                                   or unknown.
+*                               NET_BUF_ERR_INVALID_IX          Invalid index  [outside buffer(s)' DATA area(s)].
+*                               NET_BUF_ERR_INVALID_LEN         Invalid length [outside buffer(s)' DATA area(s)].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgReqHandler()
+*
+* Note(s)     : (2) If destination is a fragment and it is not the last of its chain, then the data written
+*                   to that buffer must be a multiple of 8 bytes. (See RFC #2460, Section 4.5).
+*********************************************************************************************************
+*/
+static  void  NetICMPv6_CpyDataToBuf (CPU_INT08U  *p_data,
+                                      NET_BUF     *p_buf_dest,
+                                      CPU_INT32U   msg_len,
+                                      NET_ERR     *p_err)
+{
+    NET_BUF_HDR   *p_buf_hdr_dest;
+    NET_BUF_SIZE   ix_dest;
+    NET_BUF_SIZE   len_dest;
+    NET_BUF_SIZE   len;
+    NET_BUF_SIZE   len_rem;
+    NET_BUF_SIZE   write_total;
+
+
+    p_buf_hdr_dest = &p_buf_dest->Hdr;
+
+    ix_dest       =  p_buf_hdr_dest->ICMP_MsgIx + p_buf_hdr_dest->ICMP_HdrLen;
+    len_dest      =  p_buf_hdr_dest->ICMP_MsgLen - p_buf_hdr_dest->ICMP_HdrLen;
+
+    write_total   =  0u;
+
+                                                                /* Copy data until all data is moved.                   */
+    while (write_total < msg_len) {
+
+        len_rem = msg_len - write_total;
+
+        len = (NET_BUF_SIZE)DEF_MIN(len_rem, len_dest);
+
+        if (len == 0) {
+           *p_err = NET_ERR_INVALID_LEN;
+            return;
+        }
+
+        NetBuf_DataWr(p_buf_dest,
+                      ix_dest,
+                      len,
+                      p_data,
+                      p_err);
+        if (*p_err != NET_BUF_ERR_NONE) {
+            return;
+        }
+
+        p_buf_hdr_dest->DataIx  = (CPU_INT16U  )ix_dest;
+        p_buf_hdr_dest->DataLen = (NET_BUF_SIZE)len;
+
+                                                                /* Find new destination index.                          */
+        if (len_dest == len) {
+            p_buf_dest = p_buf_hdr_dest->NextBufPtr;            /* Destination buffer done.                             */
+            if (p_buf_dest == (NET_BUF *)0) {
+               *p_err = NET_ICMPv6_ERR_NONE;
+                return;
+            }
+
+            p_buf_hdr_dest = &p_buf_dest->Hdr;
+            ix_dest       =  p_buf_hdr_dest->ICMP_MsgIx;
+            len_dest      =  p_buf_hdr_dest->ICMP_MsgLen - p_buf_hdr_dest->ICMP_HdrLen;
+
+        } else {
+            ix_dest      += len;
+            len_dest     -= len;
+        }
+
+        write_total      += len;
+    }
+
+   *p_err = NET_ICMPv6_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'net_icmpv6.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of ICMPv6 module include (see Note #1).          */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_icmpv6.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_icmpv6.h
new file mode 100644
index 0000000..eda3f1c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_icmpv6.h
@@ -0,0 +1,390 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK ICMP V6 LAYER
+*                                 (INTERNET CONTROL MESSAGE PROTOCOL)
+*
+* Filename      : net_icmpv6.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) Supports Internet Control Message Protocol V6 as described in RFC #4443 with the
+*                     following restrictions/constraints :
+*
+*                     (a) ICMPv6 Error Message received must be passed to the upper layer process that
+*                         originated the packet that caused the error.
+*
+*                     (b) Reception of ICMPv6 Packet too big messages not yet supported.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../../Source/net_cfg_net.h"
+#include  "../../Source/net_type.h"
+#include  "../../Source/net_stat.h"
+#include  "../../Source/net_buf.h"
+#include  "net_ipv6.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Network ICMPv6 Layer module is required for applications that requires IPv6 services.
+*
+*               See also 'net_cfg.h  IP LAYER CONFIGURATION'.
+*
+*           (2) The following IP-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require IPv6 Layer
+*               configuration (see 'net_cfg_net.h  IP LAYER CONFIGURATION  Note #2b') :
+*
+*                   NET_ICMPv6_MODULE_EN
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_ICMPv6_MODULE_PRESENT
+#define  NET_ICMPv6_MODULE_PRESENT
+
+
+#ifdef   NET_ICMPv6_MODULE_EN                                /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  ICMPv6 MESSAGE TYPES & CODES DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------- ICMPv6 MSG TYPES ----------------- */
+#define  NET_ICMPv6_MSG_TYPE_NONE                        DEF_INT_08U_MAX_VAL
+
+#define  NET_ICMPv6_MSG_TYPE_ECHO_REQ                    128u
+#define  NET_ICMPv6_MSG_TYPE_ECHO_REPLY                  129u
+
+#define  NET_ICMPv6_MSG_TYPE_DEST_UNREACH                  1u
+#define  NET_ICMPv6_MSG_TYPE_PKT_TOO_BIG                   2u
+#define  NET_ICMPv6_MSG_TYPE_TIME_EXCEED                   3u
+#define  NET_ICMPv6_MSG_TYPE_PARAM_PROB                    4u
+
+#define  NET_ICMPv6_MSG_TYPE_MLDP_QUERY                  130u
+#define  NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1              131u
+#define  NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V2              143u
+#define  NET_ICMPv6_MSG_TYPE_MLDP_DONE                   132u
+
+#define  NET_ICMPv6_MSG_TYPE_NDP_ROUTER_SOL              133u
+#define  NET_ICMPv6_MSG_TYPE_NDP_ROUTER_ADV              134u
+#define  NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL            135u
+#define  NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_ADV            136u
+#define  NET_ICMPv6_MSG_TYPE_NDP_REDIRECT                137u
+
+                                                                /* ----------------- ICMPv6 MSG CODES ----------------- */
+#define  NET_ICMPv6_MSG_CODE_NONE                        DEF_INT_08U_MAX_VAL
+
+#define  NET_ICMPv6_MSG_CODE_ECHO                          0u
+#define  NET_ICMPv6_MSG_CODE_ECHO_REQ                      0u
+#define  NET_ICMPv6_MSG_CODE_ECHO_REPLY                    0u
+
+#define  NET_ICMPv6_MSG_CODE_DEST_NO_ROUTE                 0u
+#define  NET_ICMPv6_MSG_CODE_DEST_COM_PROHIBITED           1u
+#define  NET_ICMPv6_MSG_CODE_DEST_BEYONG_SCOPE             2u
+#define  NET_ICMPv6_MSG_CODE_DEST_ADDR_UNREACHABLE         3u
+#define  NET_ICMPv6_MSG_CODE_DEST_PORT_UNREACHABLE         4u
+#define  NET_ICMPv6_MSG_CODE_DEST_SRC_ADDR_FAIL_INGRESS    5u
+#define  NET_ICMPv6_MSG_CODE_DEST_ROUTE_REJECT             6u
+
+#define  NET_ICMPv6_MSG_CODE_TIME_EXCEED_HOP_LIMIT         0u
+#define  NET_ICMPv6_MSG_CODE_TIME_EXCEED_FRAG_REASM        1u
+
+#define  NET_ICMPv6_MSG_CODE_PARAM_PROB_IP_HDR             0u
+#define  NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_NEXT_HDR       1u
+#define  NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_OPT            2u
+
+#define  NET_ICMPv6_MSG_CODE_MLDP_QUERY                    0u
+#define  NET_ICMPv6_MSG_CODE_MLDP_REPORT                   0u
+#define  NET_ICMPv6_MSG_CODE_MLDP_DONE                     0u
+
+#define  NET_ICMPv6_MSG_CODE_NDP_ROUTER_SOL                0u
+#define  NET_ICMPv6_MSG_CODE_NDP_ROUTER_ADV                0u
+#define  NET_ICMPv6_MSG_CODE_NDP_NEIGHBOR_SOL              0u
+#define  NET_ICMPv6_MSG_CODE_NDP_NEIGHBOR_ADV              0u
+#define  NET_ICMPv6_MSG_CODE_NDP_REDIRECT                  0u
+
+
+/*
+*********************************************************************************************************
+*                                       ICMPv6 POINTER DEFINES
+*
+* Note(s) : (1) In RFC #4443, the Parameter Problem Message defines a pointer (PTR) as an index (IX) into
+*              an option or message.
+*
+*           (2) ICMPv6 Parameter Problem Message pointer validation currently ONLY supports the following
+*               protocols :
+*
+*               (a) IPv6
+*********************************************************************************************************
+*/
+
+#define  NET_ICMPv6_PTR_IX_BASE                            0
+
+                                                                                /* --------- IPv6 HDR PTR IXs --------- */
+#define  NET_ICMPv6_PTR_IX_IP_BASE                       NET_ICMPv6_PTR_IX_BASE
+
+#define  NET_ICMPv6_PTR_IX_IP_VER                       (NET_ICMPv6_PTR_IX_IP_BASE +  0)
+#define  NET_ICMPv6_PTR_IX_IP_TRAFFIC_CLASS             (NET_ICMPv6_PTR_IX_IP_BASE +  0)
+#define  NET_ICMPv6_PTR_IX_IP_FLOW_LABEL                (NET_ICMPv6_PTR_IX_IP_BASE +  1)
+#define  NET_ICMPv6_PTR_IX_IP_PAYLOAD_LEN               (NET_ICMPv6_PTR_IX_IP_BASE +  4)
+#define  NET_ICMPv6_PTR_IX_IP_NEXT_HDR                  (NET_ICMPv6_PTR_IX_IP_BASE +  6)
+#define  NET_ICMPv6_PTR_IX_IP_HOP_LIM                   (NET_ICMPv6_PTR_IX_IP_BASE +  7)
+#define  NET_ICMPv6_PTR_IX_IP_ADDR_SRC                  (NET_ICMPv6_PTR_IX_IP_BASE +  8)
+#define  NET_ICMPv6_PTR_IX_IP_ADDR_DEST                 (NET_ICMPv6_PTR_IX_IP_BASE + 24)
+
+                                                                                /* -------- ICMPv6 MSG PTR IXs -------- */
+#define  NET_ICMPv6_PTR_IX_ICMP_BASE                       0
+
+#define  NET_ICMPv6_PTR_IX_ICMP_TYPE                       0
+#define  NET_ICMPv6_PTR_IX_ICMP_CODE                       1
+#define  NET_ICMPv6_PTR_IX_ICMP_CHK_SUM                    2
+
+#define  NET_ICMPv6_PTR_IX_ICMP_PTR                        4
+#define  NET_ICMPv6_PTR_IX_ICMP_UNUSED                     4
+#define  NET_ICMPv6_PTR_IX_ICMP_UNUSED_PARAM_PROB          5
+
+#define  NET_ICMPv6_PTR_IX_IP_FRAG_OFFSET                  2
+
+
+/*
+*********************************************************************************************************
+*                                       ICMPv6 MESSAGE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_ICMPv6_MSG_PTR_NONE                         DEF_INT_08U_MAX_VAL
+
+#define  NET_ICMPv6_MSG_PTR_MIN_PARAM_PROB               NET_ICMPv6_MSG_LEN_MIN_DFLT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            ICMPv6 HEADER
+*
+* Note(s) : (1) See RFC #4443 for ICMPv6 message header formats.
+*********************************************************************************************************
+*/
+
+                                                                        /* -------------- NET ICMPv6 HDR -------------- */
+typedef  struct  net_ICMPv6_hdr {
+    CPU_INT08U      Type;                                               /* ICMPv6 msg type.                             */
+    CPU_INT08U      Code;                                               /* ICMPv6 msg code.                             */
+    CPU_INT16U      ChkSum;                                             /* ICMPv6 msg chk sum.                          */
+} NET_ICMPv6_HDR;
+
+
+/*
+*********************************************************************************************************
+*                   ICMP REQUEST MESSAGE IDENTIFICATION & SEQUENCE NUMBER DATA TYPE
+*********************************************************************************************************
+*/
+
+#define  NET_ICMPv6_REQ_ID_NONE                            0u
+#define  NET_ICMPv6_REQ_SEQ_NONE                           0u
+
+                                                                        /* ------- NET ICMP REQ MSG ID/SEQ NBR -------- */
+typedef  struct  net_icmpv6_req_id_seq {
+    CPU_INT16U      ID;                                                 /* ICMP Req Msg ID.                             */
+    CPU_INT16U      SeqNbr;                                             /* ICMP Req Msg Seq Nbr.                        */
+} NET_ICMPv6_REQ_ID_SEQ;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     NET_ICMPv6_TX_GET_SEQ_NBR()
+*
+* Description : Get next ICMPv6 transmit message sequence number.
+*
+* Argument(s) : seq_nbr     Variable that will receive the returned ICMPv6 transmit message sequence number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgReq().
+*
+*               This macro is an INTERNAL network protocol suite macro & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Return ICMP sequence number is NOT converted from host-order to network-order.
+*********************************************************************************************************
+*/
+
+#define  NET_ICMPv6_TX_GET_SEQ_NBR(seq_nbr)     do { NET_UTIL_VAL_COPY_16(&(seq_nbr), &NetICMPv6_TxSeqNbrCtr); \
+                                                     NetICMPv6_TxSeqNbrCtr++;                                } while (0)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void                   NetICMPv6_Init             (void);
+
+void                   NetICMPv6_Rx               (NET_BUF           *p_buf,
+                                                   NET_ERR           *p_err);
+
+
+
+void                   NetICMPv6_TxMsgErr         (NET_BUF           *p_buf,
+                                                   CPU_INT08U         type,
+                                                   CPU_INT08U         code,
+                                                   CPU_INT32U         ptr,
+                                                   NET_ERR           *p_err);
+
+NET_ICMPv6_REQ_ID_SEQ  NetICMPv6_TxMsgReq         (NET_IF_NBR         if_nbr,       /* See Note #1.                     */
+                                                   CPU_INT08U         type,
+                                                   CPU_INT08U         code,
+                                                   CPU_INT16U         id,
+                                                   NET_IPv6_ADDR     *p_addr_src,
+                                                   NET_IPv6_ADDR     *p_addr_dest,
+                                                   NET_IPv6_HOP_LIM   hop_limit,
+                                                   CPU_BOOLEAN        dest_mcast,
+                                                   void              *p_data,
+                                                   CPU_INT16U         data_len,
+                                                   NET_ERR           *p_err);
+
+NET_ICMPv6_REQ_ID_SEQ  NetICMPv6_TxMsgReqHandler  (NET_IF_NBR         if_nbr,     /* See Note #1.                       */
+                                                   CPU_INT08U         type,
+                                                   CPU_INT08U         code,
+                                                   CPU_INT16U         id,
+                                                   NET_IPv6_ADDR     *p_addr_src,
+                                                   NET_IPv6_ADDR     *p_addr_dest,
+                                                   NET_IPv6_HOP_LIM   TTL,
+                                                   CPU_BOOLEAN        dest_mcast,
+                                                   NET_IPv6_EXT_HDR  *p_ext_hdr_list,
+                                                   void              *p_data,
+                                                   CPU_INT16U         data_len,
+                                                   NET_ERR           *p_err);
+
+CPU_INT16U             NetICMPv6_TxEchoReq        (NET_IPv6_ADDR     *p_addr_dest,
+                                                   CPU_INT16U         id,
+                                                   void              *p_msg_data,
+                                                   CPU_INT16U         p_data,
+                                                   NET_ERR           *p_err);
+
+void                   NetICMPv6_TxMsgReply       (NET_BUF           *p_buf,
+                                                   NET_BUF_HDR       *p_buf_hdr,
+                                                   NET_ICMPv6_HDR    *p_icmp_hdr,
+                                                   NET_ERR           *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_ICMPv6_MODULE_EN       */
+#endif  /* NET_ICMPv6_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ipv6.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ipv6.c
new file mode 100644
index 0000000..9abd8fa
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ipv6.c
@@ -0,0 +1,11500 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     NETWORK IP LAYER VERSION 6
+*                                       (INTERNET PROTOCOL V6)
+*
+* Filename      : net_ipv6.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) Supports Internet Protocol as described in RFC #2460, also known as IPv6, with the
+*                     following restrictions/constraints :
+**
+*                     (a) IPv6 forwarding/routing NOT currently supported       RFC #2460
+*
+*                     (b) Transmit fragmentation  NOT currently supported       RFC #2460, Section 4.5
+*                                                                              'Fragment Header'
+*
+*                     (c) IPv6 Security options   NOT           supported       RFC #4301
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    NET_IPv6_MODULE
+#include  "net_ipv6.h"
+#include  "net_ndp.h"
+#include  "net_icmpv6.h"
+#include  "net_mldp.h"
+#include  "net_dad.h"
+#include  "../../Source/net_buf.h"
+#include  "../../Source/net_conn.h"
+#include  "../../Source/net_util.h"
+#include  "../../Source/net_tcp.h"
+#include  "../../Source/net_udp.h"
+#include  "../../Source/net.h"
+#include  "../../IF/net_if.h"
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'net_ipv6.h  MODULE'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv6_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_ADDR_LOCAL_HOST_ADDR                   NET_IPv6_ADDR_ANY_INIT
+
+
+/*
+*********************************************************************************************************
+                                        IPv6 AUTO CFG DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_AUTO_CFG_RAND_RETRY_MAX                3
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     IPv6 POLICY TABLE DATA TYPE
+*
+* Note(s) : (1) The policy table is a longest-matching-prefix lookup table used for source and
+*               destination address selection algorithm.
+*
+*           (2) See the RFC #6724 'Default Address Selection for Internet Protocol Version 6' for more
+*               details.
+*********************************************************************************************************
+*/
+
+static const NET_IPv6_ADDR  NET_IPv6_POLICY_MASK_128 = { { 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF } };
+static const NET_IPv6_ADDR  NET_IPv6_POLICY_MASK_096 = { { 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0,   0,   0,   0    } };
+static const NET_IPv6_ADDR  NET_IPv6_POLICY_MASK_016 = { { 0xFF,0xFF,0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0    } };
+static const NET_IPv6_ADDR  NET_IPv6_POLICY_MASK_032 = { { 0xFF,0xFF,0xFF,0xFF,0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0    } };
+static const NET_IPv6_ADDR  NET_IPv6_POLICY_MASK_007 = { { 0XFE,0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0    } };
+static const NET_IPv6_ADDR  NET_IPv6_POLICY_MASK_010 = { { 0XFF,0XC0,0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0    } };
+
+
+typedef  struct  net_ipv6_policy {
+    const  NET_IPv6_ADDR  *PrefixAddrPtr;
+    const  NET_IPv6_ADDR  *PrefixMaskPtr;
+    const  CPU_INT08U      Precedence;
+    const  CPU_INT08U      Label;
+} NET_IPv6_POLICY;
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                              POLICY 01
+---------------------------------------------------------------------------------------------------------
+ */
+
+#define  NET_IPv6_POLICY_01_PREFIX_ADDR_PTR       &NET_IPv6_ADDR_LOOPBACK_INIT
+#define  NET_IPv6_POLICY_01_MASK_PTR              &NET_IPv6_POLICY_MASK_128
+#define  NET_IPv6_POLICY_01_PRECEDENCE             50
+#define  NET_IPv6_POLICY_01_LABEL                   0
+static  const  NET_IPv6_POLICY NetIPv6_Policy_01       = {
+                                                            NET_IPv6_POLICY_01_PREFIX_ADDR_PTR,
+                                                            NET_IPv6_POLICY_01_MASK_PTR,
+                                                            NET_IPv6_POLICY_01_PRECEDENCE,
+                                                            NET_IPv6_POLICY_01_LABEL
+                                                         };
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                              POLICY 02
+---------------------------------------------------------------------------------------------------------
+ */
+
+#define  NET_IPv6_POLICY_02_PREFIX_ADDR_PTR       &NET_IPv6_ADDR_ANY_INIT
+#define  NET_IPv6_POLICY_02_MASK_PTR              &NET_IPv6_ADDR_ANY_INIT
+#define  NET_IPv6_POLICY_02_PRECEDENCE             40
+#define  NET_IPv6_POLICY_02_LABEL                   1
+static  const  NET_IPv6_POLICY NetIPv6_Policy_02       = {
+                                                            NET_IPv6_POLICY_02_PREFIX_ADDR_PTR,
+                                                            NET_IPv6_POLICY_02_MASK_PTR,
+                                                            NET_IPv6_POLICY_02_PRECEDENCE,
+                                                            NET_IPv6_POLICY_02_LABEL
+                                                         };
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                              POLICY 03
+---------------------------------------------------------------------------------------------------------
+ */
+
+static  const  NET_IPv6_ADDR   NET_IPv6_POLICY_03_ADDR = { { 0,   0,   0,0,0,0,0,0,0,0,0,0,0xFF,0xFF,0,0 } };
+
+#define  NET_IPv6_POLICY_03_PREFIX_ADDR_PTR       &NET_IPv6_POLICY_03_ADDR
+#define  NET_IPv6_POLICY_03_MASK_PTR              &NET_IPv6_POLICY_MASK_096
+#define  NET_IPv6_POLICY_03_PRECEDENCE             35
+#define  NET_IPv6_POLICY_03_LABEL                   4
+static  const  NET_IPv6_POLICY NetIPv6_Policy_03       = {
+                                                            NET_IPv6_POLICY_03_PREFIX_ADDR_PTR,
+                                                            NET_IPv6_POLICY_03_MASK_PTR,
+                                                            NET_IPv6_POLICY_03_PRECEDENCE,
+                                                            NET_IPv6_POLICY_03_LABEL
+                                                         };
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                              POLICY 04
+---------------------------------------------------------------------------------------------------------
+ */
+
+
+static  const  NET_IPv6_ADDR   NET_IPv6_POLICY_04_ADDR = { { 0x20,0x02,0,0,0,0,0,0,0,0,0,0,0,   0,   0,0 } };
+#define  NET_IPv6_POLICY_04_PREFIX_ADDR_PTR       &NET_IPv6_POLICY_04_ADDR
+#define  NET_IPv6_POLICY_04_MASK_PTR              &NET_IPv6_POLICY_MASK_016
+#define  NET_IPv6_POLICY_04_PRECEDENCE             30
+#define  NET_IPv6_POLICY_04_LABEL                   2
+
+static  const  NET_IPv6_POLICY NetIPv6_Policy_04       = {
+                                                            NET_IPv6_POLICY_04_PREFIX_ADDR_PTR,
+                                                            NET_IPv6_POLICY_04_MASK_PTR,
+                                                            NET_IPv6_POLICY_04_PRECEDENCE,
+                                                            NET_IPv6_POLICY_04_LABEL
+                                                         };
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                              POLICY 05
+---------------------------------------------------------------------------------------------------------
+ */
+
+static  const  NET_IPv6_ADDR   NET_IPv6_POLICY_05_ADDR = { { 0x20,0x01,0,0,0,0,0,0,0,0,0,0,0,   0,   0,0 } };
+#define  NET_IPv6_POLICY_05_PREFIX_ADDR_PTR       &NET_IPv6_POLICY_05_ADDR
+#define  NET_IPv6_POLICY_05_MASK_PTR              &NET_IPv6_POLICY_MASK_032
+#define  NET_IPv6_POLICY_05_PRECEDENCE              5
+#define  NET_IPv6_POLICY_05_LABEL                   5
+
+static  const  NET_IPv6_POLICY NetIPv6_Policy_05       = {
+                                                            NET_IPv6_POLICY_05_PREFIX_ADDR_PTR,
+                                                            NET_IPv6_POLICY_05_MASK_PTR,
+                                                            NET_IPv6_POLICY_05_PRECEDENCE,
+                                                            NET_IPv6_POLICY_05_LABEL
+                                                         };
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                              POLICY 06
+---------------------------------------------------------------------------------------------------------
+ */
+
+static  const  NET_IPv6_ADDR   NET_IPv6_POLICY_06_ADDR = { { 0xFC,0,   0,0,0,0,0,0,0,0,0,0,0,   0,   0,0 } };
+#define  NET_IPv6_POLICY_06_PREFIX_ADDR_PTR       &NET_IPv6_POLICY_06_ADDR
+#define  NET_IPv6_POLICY_06_MASK_PTR              &NET_IPv6_POLICY_MASK_007
+#define  NET_IPv6_POLICY_06_PRECEDENCE              3
+#define  NET_IPv6_POLICY_06_LABEL                  13
+
+static  const  NET_IPv6_POLICY NetIPv6_Policy_06       = {
+                                                            NET_IPv6_POLICY_06_PREFIX_ADDR_PTR,
+                                                            NET_IPv6_POLICY_06_MASK_PTR,
+                                                            NET_IPv6_POLICY_06_PRECEDENCE,
+                                                            NET_IPv6_POLICY_06_LABEL
+                                                         };
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                              POLICY 07
+---------------------------------------------------------------------------------------------------------
+ */
+
+#define  NET_IPv6_POLICY_07_PREFIX_ADDR_PTR       &NET_IPv6_ADDR_ANY_INIT
+#define  NET_IPv6_POLICY_07_MASK_PTR              &NET_IPv6_POLICY_MASK_096
+#define  NET_IPv6_POLICY_07_PRECEDENCE              1
+#define  NET_IPv6_POLICY_07_LABEL                   3
+
+static  const  NET_IPv6_POLICY NetIPv6_Policy_07       = {
+                                                            NET_IPv6_POLICY_07_PREFIX_ADDR_PTR,
+                                                            NET_IPv6_POLICY_07_MASK_PTR,
+                                                            NET_IPv6_POLICY_07_PRECEDENCE,
+                                                            NET_IPv6_POLICY_07_LABEL
+                                                         };
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                              POLICY 08
+---------------------------------------------------------------------------------------------------------
+ */
+
+static  const  NET_IPv6_ADDR   NET_IPv6_POLICY_08_ADDR = { { 0xFE,0xC0,0,0,0,0,0,0,0,0,0,0,0,   0,   0,0 } };
+#define  NET_IPv6_POLICY_08_PREFIX_ADDR_PTR       &NET_IPv6_POLICY_08_ADDR
+#define  NET_IPv6_POLICY_08_MASK_PTR              &NET_IPv6_POLICY_MASK_010
+#define  NET_IPv6_POLICY_08_PRECEDENCE              1
+#define  NET_IPv6_POLICY_08_LABEL                  11
+
+static  const  NET_IPv6_POLICY NetIPv6_Policy_08       = {
+                                                            NET_IPv6_POLICY_08_PREFIX_ADDR_PTR,
+                                                            NET_IPv6_POLICY_08_MASK_PTR,
+                                                            NET_IPv6_POLICY_08_PRECEDENCE,
+                                                            NET_IPv6_POLICY_08_LABEL
+                                                         };
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                              POLICY 09
+---------------------------------------------------------------------------------------------------------
+ */
+
+
+static  const  NET_IPv6_ADDR   NET_IPv6_POLICY_09_ADDR = { { 0x3F,0xFE,0,0,0,0,0,0,0,0,0,0,0,   0,   0,0 } };
+#define  NET_IPv6_POLICY_09_PREFIX_ADDR_PTR       &NET_IPv6_POLICY_09_ADDR
+#define  NET_IPv6_POLICY_09_MASK_PTR              &NET_IPv6_POLICY_MASK_016
+#define  NET_IPv6_POLICY_09_PRECEDENCE              1
+#define  NET_IPv6_POLICY_09_LABEL                  12
+
+static  const  NET_IPv6_POLICY NetIPv6_Policy_09       = {
+                                                            NET_IPv6_POLICY_09_PREFIX_ADDR_PTR,
+                                                            NET_IPv6_POLICY_09_MASK_PTR,
+                                                            NET_IPv6_POLICY_09_PRECEDENCE,
+                                                            NET_IPv6_POLICY_09_LABEL
+                                                         };
+
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                            POLICY TABLE
+---------------------------------------------------------------------------------------------------------
+ */
+
+                                                        /* IPv6 Policy table                                    */
+static  const  NET_IPv6_POLICY  *NetIPv6_PolicyTbl[]   = {
+                                                           &NetIPv6_Policy_01,
+                                                           &NetIPv6_Policy_02,
+                                                           &NetIPv6_Policy_03,
+                                                           &NetIPv6_Policy_04,
+                                                           &NetIPv6_Policy_05,
+                                                           &NetIPv6_Policy_06,
+                                                           &NetIPv6_Policy_07,
+                                                           &NetIPv6_Policy_08,
+                                                           &NetIPv6_Policy_09,
+                                                         };
+
+#define NET_IPv6_POLICY_TBL_SIZE            (sizeof(NetIPv6_PolicyTbl))
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_IPv6_IF_CFG               NetIPv6_IF_CfgTbl[NET_IF_NBR_IF_TOT];
+
+
+static  NET_BUF                      *NetIPv6_FragReasmListsHead;     /* Ptr to head of frag reasm lists.               */
+static  NET_BUF                      *NetIPv6_FragReasmListsTail;     /* Ptr to tail of frag reasm lists.               */
+
+static  CPU_INT08U                    NetIPv6_FragReasmTimeout_sec;   /* IPv6 frag reasm timeout (in secs ).            */
+static  NET_TMR_TICK                  NetIPv6_FragReasmTimeout_tick;  /* IPv6 frag reasm timeout (in ticks).            */
+
+static  CPU_INT32U                    NetIPv6_TxID_Ctr;               /* Global tx ID field ctr.                        */
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+static  NET_IPv6_AUTO_CFG_OBJ        *NetIPv6_AutoCfgObjTbl[NET_IF_NBR_IF_TOT];
+
+static  NET_IPv6_AUTO_CFG_HOOK_FNCT   NetIPv6_AutoCfgHookFnct;
+#endif
+
+static  NET_IPv6_ADDR_HOOK_FNCT       NetIPv6_AddrCfgHookFnct;
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                            /* --------- IPv6 AUTO CFG FNCTS ---------- */
+#ifdef NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+
+static         void              NetIPv6_AddrAutoCfgHandler       (       NET_IF_NBR                 if_nbr,
+                                                                          NET_ERR                   *p_err);
+
+static         NET_IPv6_ADDR    *NetIPv6_CfgAddrRand              (       NET_IF_NBR                 if_nbr,
+                                                                          NET_IPv6_ADDR             *p_ipv6_id,
+                                                                          CPU_BOOLEAN                dad_en,
+                                                                          NET_ERR                   *p_err);
+
+static         void              NetIPv6_CfgAddrGlobal            (       NET_IF_NBR                 if_nbr,
+                                                                          NET_IPv6_ADDR             *p_ipv6_addr,
+                                                                          CPU_BOOLEAN                dad_en,
+                                                                          NET_ERR                   *p_err);
+
+#ifdef NET_DAD_MODULE_EN
+static         void              NetIPv6_AddrAutoCfgDAD_Result    (       NET_IF_NBR                 if_nbr,
+                                                                          NET_DAD_OBJ               *p_dad_obj,
+                                                                          NET_IPv6_ADDR_CFG_STATUS   status);
+#endif
+#endif
+
+#ifdef NET_DAD_MODULE_EN
+static         void              NetIPv6_CfgAddrAddDAD_Result     (       NET_IF_NBR                 if_nbr,
+                                                                          NET_DAD_OBJ               *p_dad_obj,
+                                                                          NET_IPv6_ADDR_CFG_STATUS   status);
+#endif
+
+                                                                            /* ------- SRC ADDR SELECTION FNCTS ------- */
+static  const  NET_IPv6_ADDRS   *NetIPv6_AddrSrcSel               (       NET_IF_NBR                 if_nbr,
+                                                                   const  NET_IPv6_ADDR             *p_addr_dest,
+                                                                   const  NET_IPv6_ADDRS            *p_addr_tbl,
+                                                                          NET_IP_ADDRS_QTY           addr_tbl_qty,
+                                                                          NET_ERR                   *p_err);
+
+static  const  NET_IPv6_POLICY  *NetIPv6_AddrSelPolicyGet         (const  NET_IPv6_ADDR             *p_addr);
+
+
+
+                                                                            /* -------------- CFG FNCTS --------------- */
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+static         void              NetIPv6_CfgAddrValidate          (       NET_IPv6_ADDR             *p_addr,
+                                                                          CPU_INT08U                 prefix_len,
+                                                                          NET_ERR                   *p_err);
+#endif  /* NET_ERR_CFG_ARG_CHK_EXT_EN */
+
+                                                                            /* -------- VALIDATE RX DATAGRAMS --------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static         void              NetIPv6_RxPktValidateBuf         (       NET_BUF_HDR               *p_buf_hdr,
+                                                                          NET_ERR                   *p_err);
+#endif  /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+
+static         void              NetIPv6_RxPktValidate            (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          NET_IPv6_HDR              *p_ip_hdr,
+                                                                          NET_ERR                   *p_err);
+
+static         void              NetIPv6_RxPktValidateNextHdr     (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          NET_IPv6_NEXT_HDR          next_hdr,
+                                                                          CPU_INT16U                 protocol_ix,
+                                                                          NET_ERR                   *p_err);
+
+static         void              NetIPv6_RxPktProcessExtHdr       (       NET_BUF                   *p_buf,
+                                                                          NET_ERR                   *p_err);
+
+static         CPU_INT16U        NetIPv6_RxOptHdr                 (       NET_BUF                   *p_buf,
+                                                                          NET_IPv6_NEXT_HDR         *p_next_hdr,
+                                                                          NET_PROTOCOL_TYPE          proto_type,
+                                                                          NET_ERR                   *p_err);
+
+static         CPU_INT16U        NetIPv6_RxRoutingHdr             (       NET_BUF                   *p_buf,
+                                                                          NET_IPv6_NEXT_HDR         *p_next_hdr,
+                                                                          NET_ERR                   *p_err);
+
+static         CPU_INT16U        NetIPv6_RxFragHdr                (       NET_BUF                   *p_buf,
+                                                                          NET_IPv6_NEXT_HDR         *p_next_hdr,
+                                                                          NET_ERR                   *p_err);
+
+static         CPU_INT16U        NetIPv6_RxESP_Hdr                (       NET_BUF                   *p_buf,
+                                                                          NET_IPv6_NEXT_HDR         *p_next_hdr,
+                                                                          NET_ERR                   *p_err);
+
+static         CPU_INT16U        NetIPv6_RxAuthHdr                (       NET_BUF                   *p_buf,
+                                                                          NET_IPv6_NEXT_HDR         *p_next_hdr,
+                                                                          NET_ERR                   *p_err);
+
+#if 0
+static         CPU_INT16U        NetIPv6_RxNoneHdr                (       NET_BUF                   *p_buf,
+                                                                          NET_IPv6_NEXT_HDR         *p_next_hdr,
+                                                                          NET_ERR                   *p_err);
+#endif
+
+static         CPU_INT16U        NetIPv6_RxMobilityHdr            (       NET_BUF                   *p_buf,
+                                                                          NET_IPv6_NEXT_HDR         *p_next_hdr,
+                                                                          NET_ERR                   *p_err);
+
+
+                                                                            /* ------------ REASM RX FRAGS ------------ */
+static         NET_BUF          *NetIPv6_RxPktFragReasm           (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          NET_IPv6_HDR              *p_ip_hdr,
+                                                                          NET_ERR                   *p_err);
+
+static         NET_BUF          *NetIPv6_RxPktFragListAdd         (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          CPU_INT16U                 frag_ip_flags,
+                                                                          CPU_INT32U                 frag_offset,
+                                                                          CPU_INT32U                 frag_size,
+                                                                          NET_ERR                   *p_err);
+
+static         NET_BUF          *NetIPv6_RxPktFragListInsert      (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          CPU_INT16U                 frag_ip_flags,
+                                                                          CPU_INT32U                 frag_offset,
+                                                                          CPU_INT32U                 frag_size,
+                                                                          NET_BUF                   *p_frag_list,
+                                                                          NET_ERR                   *p_err);
+
+static         void              NetIPv6_RxPktFragListRemove      (       NET_BUF                   *p_frag_list,
+                                                                          CPU_BOOLEAN                tmr_free);
+
+static         void              NetIPv6_RxPktFragListDiscard     (       NET_BUF                   *p_frag_list,
+                                                                          CPU_BOOLEAN                tmr_free,
+                                                                          NET_ERR                   *p_err);
+
+static         void              NetIPv6_RxPktFragListUpdate      (       NET_BUF                   *p_frag_list,
+                                                                          NET_BUF_HDR               *p_frag_list_buf_hdr,
+                                                                          CPU_INT16U                 frag_ip_flags,
+                                                                          CPU_INT32U                 frag_offset,
+                                                                          CPU_INT32U                 frag_size,
+                                                                          NET_ERR                   *p_err);
+
+static         NET_BUF          *NetIPv6_RxPktFragListChkComplete (       NET_BUF                   *p_frag_list,
+                                                                          NET_BUF_HDR               *p_frag_list_buf_hdr,
+                                                                          NET_ERR                   *p_err);
+
+static         void              NetIPv6_RxPktFragTimeout         (       void                      *p_frag_list_timeout);
+
+
+                                                                            /* ---------- DEMUX RX DATAGRAMS ---------- */
+static         void              NetIPv6_RxPktDemuxDatagram       (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          NET_ERR                   *p_err);
+
+
+static         void              NetIPv6_RxPktDiscard             (       NET_BUF                   *p_buf,
+                                                                          NET_ERR                   *p_err);
+
+                                                                            /* ----------- VALIDATE TX PKTS ----------- */
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+static         void              NetIPv6_TxPktValidate            (const  NET_BUF_HDR               *p_buf_hdr,
+                                                                   const  NET_IPv6_ADDR             *p_addr_src,
+                                                                   const  NET_IPv6_ADDR             *p_addr_dest,
+                                                                          NET_IPv6_TRAFFIC_CLASS     traffic_class,
+                                                                          NET_IPv6_FLOW_LABEL        flow_label,
+                                                                          NET_IPv6_HOP_LIM           hop_lim,
+                                                                          NET_ERR                   *p_err);
+#endif  /* NET_ERR_CFG_ARG_CHK_???_EN */
+
+                                                                            /* ------------- TX IPv6 PKTS ------------- */
+static         void              NetIPv6_TxPkt                    (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          NET_IPv6_ADDR             *p_addr_src,
+                                                                          NET_IPv6_ADDR             *p_addr_dest,
+                                                                          NET_IPv6_EXT_HDR          *p_ext_hdr_list,
+                                                                          NET_IPv6_TRAFFIC_CLASS     traffic_class,
+                                                                          NET_IPv6_FLOW_LABEL        flow_label,
+                                                                          NET_IPv6_HOP_LIM           hop_lim,
+                                                                          NET_ERR                   *p_err);
+
+static         void              NetIPv6_TxPktPrepareHdr          (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          CPU_INT16U                 protocol_ix,
+                                                                          NET_IPv6_ADDR             *p_addr_src,
+                                                                          NET_IPv6_ADDR             *p_addr_dest,
+                                                                          NET_IPv6_EXT_HDR          *p_ext_hdr_list,
+                                                                          NET_IPv6_TRAFFIC_CLASS     traffic_class,
+                                                                          NET_IPv6_FLOW_LABEL        flow_label,
+                                                                          NET_IPv6_HOP_LIM           hop_lim,
+                                                                          NET_ERR                   *p_err);
+
+static         void              NetIPv6_TxPktPrepareExtHdr       (       NET_BUF                   *p_buf,
+                                                                          NET_IPv6_EXT_HDR          *p_ext_hdr_list,
+                                                                          NET_ERR                   *p_err);
+
+
+#if 0
+static         void              NetIPv6_TxPktPrepareFragHdr      (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          CPU_INT16U                *p_protocol_ix,
+                                                                          NET_ERR                   *p_err);
+#endif
+
+
+                                                                            /* ----------- TX IPv6 DATAGRAMS ---------- */
+static         void              NetIPv6_TxPktDatagram            (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          NET_ERR                   *p_err);
+
+static         void              NetIPv6_TxPktDatagramRouteSel    (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          NET_ERR                   *p_err);
+
+
+static         void              NetIPv6_TxPktDiscard             (       NET_BUF                   *p_buf,
+                                                                          NET_ERR                   *p_err);
+
+
+                                                                            /* ----------- RE-TX IPv6 PKTS ------------ */
+static         void              NetIPv6_ReTxPkt                  (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          NET_ERR                   *p_err);
+
+static         void              NetIPv6_ReTxPktPrepareHdr        (       NET_BUF                   *p_buf,
+                                                                          NET_BUF_HDR               *p_buf_hdr,
+                                                                          NET_ERR                   *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            NetIPv6_Init()
+*
+* Description : (1) Initialize Internet Protocol Layer :
+*
+*                   (a) Initialize ALL interfaces' configurable IPv6 addresses.
+*                   (b) Initialize IPv6 fragmentation list pointers and fragmentation timeout.
+*                   (c) Initialize IPv6 identification (ID) counter.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                 IPv6 Layer Initialization successful.
+*                               NET_IPv6_ERR_DAD_OBJ_POOL_CREATE  Error in DAD obj pool creation.
+*                               NET_ERR_FAULT_MEM_ALLOC           Error in Memory alllocation for Auto-Cfg obj.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) (a) Default IPv6 address initialization is invalid & forces the developer or higher-layer
+*                       protocol application to configure valid IPv6 address(s).
+*
+*                   (b) Address configuration state initialized to 'static' by default.
+*
+*                       See also 'net_ipv6.h  NETWORK INTERFACES' IPv6 ADDRESS CONFIGURATION DATA TYPE'.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_Init (NET_ERR  *p_err)
+{
+    NET_IPv6_IF_CFG        *p_ip_if_cfg;
+    NET_IPv6_ADDRS         *p_ip_addrs;
+#ifdef NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    NET_IPv6_AUTO_CFG_OBJ  *p_obj;
+    CPU_INT08U              i;
+    LIB_ERR                 err_lib;
+#endif
+    NET_IP_ADDRS_QTY        addr_ix;
+    NET_IF_NBR              if_nbr;
+    NET_ERR                 err;
+
+
+                                                                /* ----------------- INIT IPv6 ADDRS ------------------ */
+    if_nbr      =  NET_IF_NBR_BASE;
+    p_ip_if_cfg = &NetIPv6_IF_CfgTbl[if_nbr];
+    for ( ; if_nbr < NET_IF_NBR_IF_TOT; if_nbr++) {             /* Init ALL IF's IPv6 addrs to NONE (see Note #2a).     */
+        addr_ix    =  0u;
+        p_ip_addrs = &p_ip_if_cfg->AddrsTbl[addr_ix];
+        for ( ; addr_ix < NET_IPv6_CFG_IF_MAX_NBR_ADDR; addr_ix++) {
+            NetIPv6_AddrUnspecifiedSet(&p_ip_addrs->AddrHost, &err);
+            p_ip_addrs->AddrMcastSolicitedPtr = (NET_IPv6_ADDR *)0;
+            p_ip_addrs->AddrCfgState          = NET_IPv6_ADDR_CFG_STATE_NONE;
+            p_ip_addrs->AddrHostPrefixLen     = 0u;
+            p_ip_addrs->AddrState             = NET_IPv6_ADDR_STATE_NONE;
+            p_ip_addrs->IsValid               = DEF_NO;
+            p_ip_addrs++;
+        }
+
+        p_ip_if_cfg->AddrsNbrCfgd         = 0u;
+
+        p_ip_if_cfg++;
+
+    }
+
+#ifdef NET_DAD_MODULE_EN
+    NetDAD_Init(p_err);
+    if (*p_err != NET_DAD_ERR_NONE) {
+        *p_err = NET_IPv6_ERR_FAULT;
+         goto exit;
+    }
+#endif
+
+                                                                /* -------------- INIT IPV6 AUTOCFG OBJ --------------- */
+#ifdef NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    for (i = 0; i < NET_IF_NBR_IF_TOT; i++) {
+
+        p_obj = (NET_IPv6_AUTO_CFG_OBJ *)Mem_SegAlloc(DEF_NULL,
+                                                      DEF_NULL,
+                                                      sizeof(NET_IPv6_AUTO_CFG_OBJ),
+                                                     &err_lib);
+        if (err_lib != LIB_MEM_ERR_NONE) {
+           *p_err = NET_ERR_FAULT_MEM_ALLOC;
+            goto exit;
+        }
+
+        NetIPv6_AutoCfgObjTbl[i] = p_obj;
+
+        p_obj->En                        = DEF_NO;
+        p_obj->DAD_En                    = DEF_NO;
+        p_obj->State                     = NET_IPv6_AUTO_CFG_STATE_NONE;
+        p_obj->AddrLocalPtr              = DEF_NULL;
+        p_obj->AddrGlobalPtr             = DEF_NULL;
+    }
+#endif
+
+                                                                /* --------------- INIT IPv6 FRAG LISTS --------------- */
+    NetIPv6_FragReasmListsHead = DEF_NULL;
+    NetIPv6_FragReasmListsTail = DEF_NULL;
+
+                                                                /* -------------- INIT IPv6 FRAG TIMEOUT -------------- */
+    NetIPv6_CfgFragReasmTimeout(NET_IPv6_FRAG_REASM_TIMEOUT_DFLT_SEC);
+
+                                                                /* ----------------- INIT IPv6 ID CTR ----------------- */
+    NetIPv6_TxID_Ctr =  NET_IPv6_ID_INIT;
+
+   *p_err = NET_IPv6_ERR_NONE;
+
+    goto exit;
+
+exit:
+   return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_LinkStateSubscriber()
+*
+* Description : (1) IPv6 subscriber function to link change. When link becomes UP:
+*                   (a) Disabled all configured IPv6 addresses.
+*                   (b) Do IPv6 Address Static Configuration for addresses that where statically configured.
+*                   (c) Do IPv6 Auto-configuration if conditions apply.
+*
+*
+* Argument(s) : if_nbr      Network interface number on which link state change occurred.
+*
+*               link_state  Current link state of given interface.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Referenced in NetIP_IF_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_LinkStateSubscriber (NET_IF_NBR         if_nbr,
+                                   NET_IF_LINK_STATE  link_state)
+{
+    NET_IPv6_IF_CFG           *p_ipv6_if_cfg  = DEF_NULL;
+    NET_IP_ADDRS_QTY           addr_cfgd_nbr  = 0;
+    NET_IPv6_ADDRS            *p_ip_addrs     = DEF_NULL;
+    NET_IP_ADDRS_QTY           addr_ix        = 0;
+    CPU_BOOLEAN                start_auto     = DEF_YES;
+    NET_IPv6_ADDR_CFG_STATE    addr_cfg_state = NET_IPv6_ADDR_CFG_STATE_NONE;
+#ifdef NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    NET_IPv6_AUTO_CFG_OBJ     *p_auto_obj     = DEF_NULL;
+    CPU_BOOLEAN                auto_en        = DEF_NO;
+#endif
+    NET_ERR                    err_net;
+    CPU_SR_ALLOC();
+
+
+                                                                /* ----------- ACQUIRE NETWORK GLOBAL LOCK ------------ */
+    Net_GlobalLockAcquire((void *)&NetIPv6_LinkStateSubscriber, &err_net);
+    if (err_net != NET_ERR_NONE) {
+         goto exit;
+    }
+
+                                                                /* --------- CHECK IF ADDRESSES ARE CFG ON IF --------- */
+    p_ipv6_if_cfg = &NetIPv6_IF_CfgTbl[if_nbr];
+
+    addr_cfgd_nbr = p_ipv6_if_cfg->AddrsNbrCfgd;
+
+    if (addr_cfgd_nbr > 0) {
+
+        addr_ix     =  0u;
+        p_ip_addrs  = &p_ipv6_if_cfg->AddrsTbl[addr_ix];
+
+        for (addr_ix = 0u; addr_ix < NET_IPv6_CFG_IF_MAX_NBR_ADDR; addr_ix++) {
+            p_ip_addrs->AddrState = NET_IPv6_ADDR_STATE_NONE;
+            p_ip_addrs->IsValid   = DEF_NO;
+
+            if (link_state == NET_IF_LINK_UP) {
+                addr_cfg_state = p_ip_addrs->AddrCfgState;
+
+                if (addr_cfg_state == NET_IPv6_ADDR_CFG_STATE_STATIC) {
+                    NetIPv6_CfgAddrAddHandler(if_nbr,
+                                             &p_ip_addrs->AddrHost,
+                                              p_ip_addrs->AddrHostPrefixLen,
+                                              0,
+                                              0,
+                                              NET_IPv6_ADDR_CFG_MODE_MANUAL,
+                                              DEF_YES,
+                                              NET_IPv6_ADDR_CFG_TYPE_STATIC_NO_BLOKING,
+                                             &err_net);
+                    switch (err_net) {
+                        case NET_IPv6_ERR_NONE:
+                        case NET_ERR_FAULT_FEATURE_DIS:
+                        case NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS:
+                        case NET_IPv6_ERR_ADDR_CFG_DUPLICATED:
+                             start_auto = DEF_NO;                   /* Disable auto-cfg since static addr are configured.   */
+                             break;
+
+                        default:
+                             NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.AddrStaticCfgFaultCtr);
+                             break;
+                    }
+                }
+            }
+            p_ip_addrs++;
+        }
+    }
+
+                                                                    /* --------- RESTART IPV6 AUTO-CONFIGURATION ---------- */
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    if (link_state == NET_IF_LINK_UP) {
+        p_auto_obj = NetIPv6_AutoCfgObjTbl[if_nbr];
+        CPU_CRITICAL_ENTER();
+        auto_en    = p_auto_obj->En;
+        CPU_CRITICAL_EXIT();
+
+        if ((start_auto == DEF_YES) &&
+            (auto_en    == DEF_YES)) {
+
+            NetIPv6_AddrAutoCfgHandler(if_nbr,
+                                      &err_net);
+            if (err_net != NET_IPv6_ERR_NONE) {
+                NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.AddrAutoCfgFaultCtrl);
+            }
+        }
+    }
+#endif
+
+
+    (void)&link_state;
+    (void)&start_auto;
+
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_AddrAutoCfgEn()
+*
+* Description : Enable IPv6 Auto-configuration process. If the link state is UP, the IPv6 Auto-configuration
+*               will start, else the Auto-configuration will start when the link becomes UP.
+*
+* Argument(s) : if_nbr      Network interface number to enable the address auto-configuration on.
+*
+*               dad_en      DEF_YES, Do the Duplication Address Detection (DAD)
+*                           DEF_NO , otherwise
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Enabled IPv6 Auto-Cfg successful.
+*                               NET_INIT_ERR_NOT_COMPLETED      Network stack initialization is not completed.
+*
+*                               ----------- RETURNED BY Net_GlobalLockAcquire() ------------
+*                               See Net_GlobalLockAcquire() for additional error codes.
+*
+*                               ---------- RETURNED BY NetIF_IsValidCfgdHandler() ----------
+*                               See NetIF_IsValidCfgdHandler() for additional error codes.
+*
+*                               --------- RETURNED BY NetIF_LinkStateGetHandler() ----------
+*                               See NetIF_LinkStateGetHandler() for additional error codes.
+*
+*                               --------- RETURNED BY NetIPv6_AddrAutoCfgHandler() ---------
+*                               See NetIPv6_AddrAutoCfgHandler() for additional error codes.
+*
+* Return(s)   : DEF_OK,   if IPv6 Auto-Configuration is enabled successfully
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) NetIPv6_AddrAutoCfgEn() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) RFC #4862 , Section 4 states that "Autoconfiguration is performed only on
+*                   multicast-capable links and begins when a multicast-capable interface is enabled,
+*                   e.g., during system startup".
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_AddrAutoCfgEn (NET_IF_NBR    if_nbr,
+                                    CPU_BOOLEAN   dad_en,
+                                    NET_ERR      *p_err)
+{
+    CPU_BOOLEAN             result;
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    NET_IPv6_AUTO_CFG_OBJ  *p_auto_obj;
+    NET_IF_LINK_STATE       link_state;
+
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIPv6_AddrAutoCfgEn, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         result   = DEF_FAIL;
+         goto exit;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ---------- VALIDATE NET INIT IS COMPLETED ---------- */
+    if (Net_InitDone != DEF_YES) {
+        result   = DEF_FAIL;
+       *p_err    =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         result   = DEF_FAIL;
+         goto exit_release;
+    }
+#endif
+
+                                                                /* ----------- SAVED PREFERENCE FOR AUTOCFG ----------- */
+    p_auto_obj         =  NetIPv6_AutoCfgObjTbl[if_nbr];
+    p_auto_obj->En     =  DEF_YES;
+    p_auto_obj->DAD_En = (dad_en == DEF_YES) ? DEF_YES : DEF_NO;
+
+                                                                /* ----------------- CHECK LINK STATE ----------------- */
+    link_state = NetIF_LinkStateGetHandler(if_nbr, p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             if (link_state == NET_IF_LINK_UP) {
+                 NetIPv6_AddrAutoCfgHandler(if_nbr, p_err);
+                 if (*p_err != NET_IPv6_ERR_NONE) {
+                     result = DEF_FAIL;
+                     goto exit_release;
+                 }
+             }
+             break;
+
+
+        default:
+             result = DEF_FAIL;
+             goto exit_release;
+    }
+
+    result = DEF_OK;
+   *p_err  = NET_IPv6_ERR_NONE;
+
+
+exit_release:
+                                                                   /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+#else
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+    result = DEF_FAIL;
+    goto exit;
+#endif
+
+   (void)&if_nbr;
+   (void)&dad_en;
+
+exit:
+    return(result);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_AddrAutoCfgDis()
+*
+* Description : Disabled the IPv6 Auto-Configuration.
+*
+* Argument(s) : if_nbr      Network interface number on which to disabled address auto-configuration.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Disabled IPv6 Auto-Cfg successful.
+*                               NET_INIT_ERR_NOT_COMPLETED      Network stack initialization is not completed.
+*
+*                               --------- RETURNED BY Net_GlobalLockAcquire() ---------
+*                               See Net_GlobalLockAcquire() for additional error codes.
+*
+*                               --------- RETURNED BY NetIF_IsValidCfgdHandler() ---------
+*                               See NetIF_IsValidCfgdHandler() for additional error codes.
+*
+* Return(s)   : DEF_OK,   if IPv6 Auto-Configuration was disabled successfully.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) NetIPv6_AddrAutoCfgDis() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) In a case of a link status change, the auto-configuration will not be called.
+*                   The Hook function after the Auto-configuration completion will also not occurred.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_AddrAutoCfgDis (NET_IF_NBR   if_nbr,
+                                     NET_ERR     *p_err)
+{
+    CPU_BOOLEAN             result;
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    NET_IPv6_AUTO_CFG_OBJ  *p_auto_obj;
+
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIPv6_AddrAutoCfgEn, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         result = DEF_FAIL;
+         goto exit;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ---------- VALIDATE NET INIT IS COMPLETED ---------- */
+    if (Net_InitDone != DEF_YES) {
+        result = DEF_FAIL;
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         result = DEF_FAIL;
+         goto exit_release;
+    }
+#endif
+
+    p_auto_obj     = NetIPv6_AutoCfgObjTbl[if_nbr];
+    p_auto_obj->En = DEF_NO;
+
+    result         = DEF_OK;
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+exit_release:
+    Net_GlobalLockRelease();
+
+#else
+    result = DEF_FAIL;
+   *p_err= NET_ERR_FAULT_FEATURE_DIS;
+    goto exit;
+#endif
+
+
+exit:
+   (void)&if_nbr;
+
+    return (result);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_CfgAddrHookSet()
+*
+* Description : Configure the IPv6 Static Address Configuration hook function. This function will be called
+*               each time a IPv6 static address has finished being configured.
+*
+* Argument(s) : if_nbr      Network interface number where the address configuration took place.
+*
+*               fnct        Pointer to hook function to call when the IPv6 static address configuration ends.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Hook function set successful.
+*
+*                               ----------- RETURNED BY Net_GlobalLockAcquire() : ------------
+*                               See Net_GlobalLockAcquire() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) NetIPv6_CfgAddrHookSet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_CfgAddrHookSet (NET_IF_NBR                if_nbr,
+                              NET_IPv6_ADDR_HOOK_FNCT   fnct,
+                              NET_ERR                  *p_err)
+{
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION();
+    }
+#endif
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIPv6_CfgAddrHookSet, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ---------- VALIDATE NET INIT IS COMPLETED ---------- */
+    if (Net_InitDone != DEF_YES) {
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        return;
+    }
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* ---------------- SET HOOK FUNCTION ----------------- */
+    NetIPv6_AddrCfgHookFnct = fnct;
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_AddrAutoCfgHookSet()
+*
+* Description : Configure IPv6 Auto-Configuration application hook function. This function will be called
+*               each time an Auto-Configuration process is completed.
+*
+* Argument(s) : if_nbr      Network interface number where the Auto-configuration took place.
+*
+*               fnct        Pointer to hook function to call when the Auto-configuration ends.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Hook function set successful.
+*
+*                               ----------- RETURNED BY Net_GlobalLockAcquire() : ------------
+*                               See Net_GlobalLockAcquire() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) NetIPv6_AddrAutoCfgHookSet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrAutoCfgHookSet (NET_IF_NBR                    if_nbr,
+                                  NET_IPv6_AUTO_CFG_HOOK_FNCT   fnct,
+                                  NET_ERR                      *p_err)
+{
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION();
+    }
+#endif
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIPv6_AddrAutoCfgHookSet, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ---------- VALIDATE NET INIT IS COMPLETED ---------- */
+    if (Net_InitDone != DEF_YES) {
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        return;
+    }
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* ---------------- SET HOOK FUNCTION ----------------- */
+    NetIPv6_AutoCfgHookFnct = fnct;
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+   *p_err = NET_IPv6_ERR_NONE;
+#else
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+
+    (void)&if_nbr;
+    (void)&fnct;
+#endif
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv6_CfgAddrAdd()
+*
+* Description : (1) Add a statically-configured IPv6 host address to an interface :
+*
+*                   (a) Acquire network lock
+*                   (b) Validate arguments & configure address
+*                   (d) Release network lock
+*
+*
+* Argument(s) : if_nbr      Interface number to configure.
+*
+*               p_addr      Pointer to desired IPv6 address to add to this interface (see Note #5).
+*
+*               prefix_len  Prefix length of the desired IPv6 address to add to this interface.
+*
+*               flags       Set of flags to select options for the address configuration:
+*
+*                               NET_IPv6_FLAG_BLOCK_EN      Enables blocking mode if set.
+*                               NET_IPv6_FLAG_DAD_EN        Enables DAD if set.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                       IPv6 address successfully configured.
+*                               NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS       IPv6 address configuration in progress.
+*                               NET_IPv6_ERR_DAD_DISABLED               DAD flags was set but DAD is disabled.
+*                               NET_IPv6_ERR_ADDR_CFG_DUPLICATED        IPv6 addr cfg failed because addr is duplicated.
+*                               NET_INIT_ERR_NOT_COMPLETED              Network initialization NOT complete.
+*
+*                               ----------- RETURNED BY Net_GlobalLockAcquire() : ------------
+*                               See Net_GlobalLockAcquire() for additional return error codes.
+*
+*                               ----------- RETURNED BY NetIF_IsValidCfgdHandler() : ------------
+*                               See NetIF_IsValidCfgdHandler() for additional return error codes.
+*
+*                               ----------- RETURNED BY NetIPv6_CfgAddrValidate() : ------------
+*                               See NetIPv6_CfgAddrValidate() for additional return error codes.
+*
+*                               ----------- RETURNED BY NetIPv6_CfgAddrAddHandler() : ------------
+*                               See NetIPv6_CfgAddrAddHandler() for additional return error codes.
+*
+*
+* Return(s)   : DEF_OK,   if valid IPv6 address configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s) [see also Note #3].
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_CfgAddrAdd (NET_IF_NBR      if_nbr,
+                                 NET_IPv6_ADDR  *p_addr,
+                                 CPU_INT08U      prefix_len,
+                                 NET_FLAGS       flags,
+                                 NET_ERR        *p_err)
+{
+    NET_IPv6_ADDR_CFG_TYPE  addr_cfg_type;
+    CPU_BOOLEAN             block_en;
+    CPU_BOOLEAN             dad_en;
+    CPU_BOOLEAN             result;
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetIPv6_CfgAddrAdd, p_err);  /* See Note #3b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT completed, exit (see Note #4).           */
+        result = DEF_FAIL;
+       *p_err = NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         result = DEF_FAIL;
+         goto exit_release;
+    }
+
+                                                                /* --------------- VALIDATE IPv6 ADDR ----------------- */
+    NetIPv6_CfgAddrValidate(p_addr, prefix_len, p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+         result = DEF_FAIL;
+         goto exit_release;
+    }
+
+                                                                /* ----------------- VALIDATE ERR PTR ----------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+
+    block_en = DEF_BIT_IS_SET(flags, NET_IPv6_FLAG_BLOCK_EN);
+    dad_en   = DEF_BIT_IS_SET(flags, NET_IPv6_FLAG_DAD_EN);
+
+                                                                /* --------------- SET DAD PARAMETERS ----------------- */
+    if (block_en == DEF_YES) {
+        addr_cfg_type = NET_IPv6_ADDR_CFG_TYPE_STATIC_BLOKING;
+    } else {
+        addr_cfg_type = NET_IPv6_ADDR_CFG_TYPE_STATIC_NO_BLOKING;
+    }
+
+                                                                /* --------------------- CFG ADDR --------------------- */
+    (void)NetIPv6_CfgAddrAddHandler(if_nbr,
+                                    p_addr,
+                                    prefix_len,
+                                    0,
+                                    0,
+                                    NET_IPv6_ADDR_CFG_MODE_MANUAL,
+                                    dad_en,
+                                    addr_cfg_type,
+                                    p_err);
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+        case NET_ERR_FAULT_FEATURE_DIS:
+             result = DEF_OK;
+             break;
+
+
+        case NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS:
+        case NET_IPv6_ERR_ADDR_CFG_DUPLICATED:
+        default:
+             result = DEF_FAIL;
+             break;
+    }
+
+    goto exit_release;
+
+
+exit_lock_fault:
+    result = DEF_FAIL;
+    goto exit;
+
+exit_release:
+    Net_GlobalLockRelease();
+
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_CfgAddrAddHandler()
+*
+* Description : (1) Add a statically-configured IPv6 host address to an interface :
+*
+*                   (a) Validate  address configuration :
+*                       (1) Check if address is already configured.
+*                       (2) Validate number of configured IP addresses.
+*
+*                   (b) Configure static IPv6 address
+*
+*                   (c) Join multicast group associated with address.
+*
+*                   (d) Do Duplication address detection (DAD) if enabled.
+*
+*               (2) Configured IPv6 addresses are organized in an address table implemented as an array :
+*
+*                   (a) (1) (A) NET_IPv6_CFG_IF_MAX_NBR_ADDR configures each interface's maximum number
+*                               of configured IPv6 addresses.
+*
+*                           (B) This value is used to declare the size of each interface's address table.
+*
+*                       (2) Each configurable interface's 'AddrsNbrCfgd' indicates the current number of
+*                           configured IPv6 addresses.
+*
+*                   (b) Each address table is zero-based indexed :
+*
+*                       (1) Configured addresses are organized contiguously from indices '0' to 'N - 1'.
+*
+*                       (2) NO addresses         are configured             from indices 'N' to 'M - 1',
+*                           for 'N' NOT equal to 'M'.
+*
+*                       (3) The next available table index to add a configured address is at index 'N',
+*                           if  'N' NOT equal to 'M'.
+*
+*                       (4) Each address table is initialized, & also de-configured, with NULL address
+*                           value NET_IPv6_ADDR_NONE, at ALL table indices following configured addresses.
+*
+*                               where
+*                                       M       maximum number of configured addresses (see Note #2a1A)
+*                                       N       current number of configured addresses (see Note #2a1B)
+*
+*
+*                                                    Configured IPv6
+*                                                    Addresses Table
+*                                                     (see Note #2)
+*
+*                                -------------------      -----            -----
+*                                |  Cfg'd Addr #0  |        ^                ^
+*                                |-----------------|        |                |
+*                                |  Cfg'd Addr #1  |                         |
+*                                |-----------------|  Current number         |
+*                                |  Cfg'd Addr #2  |  of configured          |
+*                                |-----------------|  IPv6 addresses         |
+*                                |        .        | on an interface         |
+*                                |        .        | (see Note #2a2)
+*                                |        .        |                   Maximum number
+*                                |-----------------|        |          of configured
+*                                |  Cfg'd Addr #N  |        v          IPv6 addresses
+*      Next available            |-----------------|      -----       for an interface
+*   address to configure  -----> |    ADDR NONE    |        ^         (see Note #2a1)
+*      (see Note #2b3)           |-----------------|        |
+*                                |        .        |                         |
+*                                |        .        |  Non-configured         |
+*                                |        .        | address entries         |
+*                                |        .        | (see Note #2b4)         |
+*                                |        .        |                         |
+*                                |-----------------|        |                |
+*                                |    ADDR NONE    |        v                v
+*                                -------------------      -----            -----
+*
+*
+*                   See also 'net_ipv6.h  NETWORK INTERFACES' IPv6 ADDRESS CONFIGURATION DATA TYPE  Note #1a'.
+*
+*
+* Argument(s) : if_nbr      Interface number to configure.
+*
+*               p_addr      Pointer to desired IPv6 address to add to this interface (see Note #5).
+*               ------      Argument validated by caller(s).
+*
+*               prefix_len  Prefix length of the desired IPv6 address to add to this interface.
+*
+*               cfg_mode    Desired value for configuration mode :
+*
+*                               NET_IPv6_ADDR_CFG_MODE_MANUAL   Address is configured manually.
+*
+*                               NET_IPv6_ADDR_CFG_MODE_AUTO     Address is configured using stateless address
+*                                                                   auto-configuration.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                       IPv6 address successfully configured.
+*                               NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS       IPv6 address configuration in progress.
+*                               NET_IPv6_ERR_ADDR_CFG_DUPLICATED        IPv6 address is already used on network.
+*                               NET_IPv6_ERR_ADDR_CFG                   IPv6 address configuration faulted.
+*                               NET_IPv6_ERR_INVALID_ADDR_CFG_MODE      Invalid IPv6 address configuration mode.
+*                               NET_IPv6_ERR_ADDR_CFG_STATE             Invalid IPv6 address configuration state
+*                               NET_IPv6_ERR_ADDR_TBL_FULL              Interface's configured IPv6 address table full.
+*                               NET_IPv6_ERR_ADDR_CFG_IN_USE            IPv6 address already configured on an interface.
+*
+*
+* Return(s)   : DEF_OK,   if valid IPv6 address configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIPv6_CfgAddrAdd(),
+*               NetIPv6_AddrAutoCfgHandler(),
+*               NetNDP_RxPrefixUpdate().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+NET_IPv6_ADDRS  *NetIPv6_CfgAddrAddHandler (NET_IF_NBR               if_nbr,
+                                            NET_IPv6_ADDR           *p_addr,
+                                            CPU_INT08U               prefix_len,
+                                            CPU_INT32U               lifetime_valid,
+                                            CPU_INT32U               lifetime_preferred,
+                                            CPU_INT08U               cfg_mode,
+                                            CPU_BOOLEAN              dad_en,
+                                            NET_IPv6_ADDR_CFG_TYPE   addr_cfg_type,
+                                            NET_ERR                 *p_err)
+{
+    NET_IF_LINK_STATE   link_state;
+    CPU_BOOLEAN         is_addr_cfgd;
+    CPU_BOOLEAN         is_addr_valid;
+    NET_IPv6_IF_CFG    *p_ip_if_cfg;
+    NET_IPv6_ADDRS     *p_ip_addrs;
+    NET_IPv6_ADDRS     *p_ip_addrs_return;
+    NET_TMR_TICK        timeout_tick;
+#ifdef  NET_MLDP_MODULE_EN
+    NET_MLDP_HOST_GRP  *p_host_grp;
+    NET_IPv6_ADDR       addr_mcast_sol;
+#endif
+#ifdef NET_DAD_MODULE_EN
+    NET_DAD_FNCT        dad_hook_fnct;
+#endif
+
+
+    link_state = NetIF_LinkStateGetHandler(if_nbr, p_err);
+
+    p_ip_if_cfg = &NetIPv6_IF_CfgTbl[if_nbr];
+
+                                                                /* ---------- VALIDATE NBR CFG'D IP ADDRS ------------- */
+    is_addr_cfgd = NetIPv6_IsAddrHostCfgdHandler(p_addr);
+    if (is_addr_cfgd != DEF_YES) {
+
+        if (p_ip_if_cfg->AddrsNbrCfgd >= NET_IPv6_CFG_IF_MAX_NBR_ADDR) {/* If nbr cfg'd addrs >= max, ...               */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.CfgAddrTblFullCtr);
+           *p_err  = NET_IPv6_ERR_ADDR_TBL_FULL;                        /* ... rtn tbl full.                            */
+            p_ip_addrs_return = DEF_NULL;
+            goto exit;
+        }
+    } else {
+
+        is_addr_valid = NetIPv6_IsAddrCfgdValidHandler(p_addr);  /* Check if address is already valid.                  */
+        if (is_addr_valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.CfgInvAddrInUseCtr);
+           *p_err =  NET_IPv6_ERR_ADDR_CFG_IN_USE;
+            p_ip_addrs_return = DEF_NULL;
+            goto exit;                                          /* NET_TODO: or update valid addr ?                     */
+        }
+    }
+
+    if (is_addr_cfgd == DEF_YES) {
+        p_ip_addrs = NetIPv6_GetAddrsHostOnIF(if_nbr, p_addr);
+        if (p_ip_addrs == DEF_NULL) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.CfgAddrNotFoundCtr);
+           *p_err =  NET_IPv6_ERR_ADDR_NOT_FOUND;
+            p_ip_addrs_return = DEF_NULL;
+            goto exit;
+        }
+    } else {
+        p_ip_addrs = &p_ip_if_cfg->AddrsTbl[p_ip_if_cfg->AddrsNbrCfgd];
+    }
+
+                                                                /* ------------------ CFG IPv6 ADDR ------------------- */
+
+                                                                /* Configure addr cfg state.                            */
+    switch (cfg_mode) {
+        case NET_IPv6_ADDR_CFG_MODE_MANUAL:
+             p_ip_addrs->AddrCfgState = NET_IPv6_ADDR_CFG_STATE_STATIC;
+             break;
+
+        case NET_IPv6_ADDR_CFG_MODE_AUTO:
+             p_ip_addrs->AddrCfgState = NET_IPv6_ADDR_CFG_STATE_AUTO_CFGD;
+             break;
+
+        default:
+            *p_err  = NET_IPv6_ERR_INVALID_ADDR_CFG_MODE;
+             p_ip_addrs_return = DEF_NULL;
+             goto exit;
+    }
+
+    if (is_addr_cfgd != DEF_YES) {
+        Mem_Copy(&p_ip_addrs->AddrHost,                         /* Configure host address.                              */
+                  p_addr,
+                  NET_IPv6_ADDR_SIZE);
+
+        p_ip_addrs->AddrHostPrefixLen = prefix_len;             /* Configure address prefix length.                     */
+        p_ip_addrs->IfNbr             = if_nbr;                 /* Configure IF number of address.                      */
+
+        p_ip_if_cfg->AddrsNbrCfgd++;                            /* Increment number of address configured on IF.        */
+
+    }
+
+
+#ifdef  NET_MLDP_MODULE_EN
+    if (link_state == NET_IF_LINK_UP) {
+        if (p_ip_addrs->AddrMcastSolicitedPtr == DEF_NULL) {
+            NetIPv6_AddrMcastSolicitedSet(&addr_mcast_sol,      /* Create solicited mcast addr.                         */
+                                           p_addr,
+                                           if_nbr,
+                                           p_err);
+            if (*p_err != NET_IPv6_ERR_NONE) {
+                 NetIPv6_CfgAddrRemoveHandler(if_nbr, p_addr, p_err);
+                 p_ip_addrs_return = DEF_NULL;
+                *p_err = NET_IPv6_ERR_ADDR_CFG;
+                 goto exit;
+            }
+
+
+            p_host_grp = NetMLDP_HostGrpJoinHandler(if_nbr,     /* Join  mcast group of the solicited mcast.            */
+                                                   &addr_mcast_sol,
+                                                    p_err);
+            if (*p_err != NET_MLDP_ERR_NONE) {
+                 NetIPv6_CfgAddrRemoveHandler(if_nbr, p_addr, p_err);
+                 p_ip_addrs_return = DEF_NULL;
+                *p_err = NET_IPv6_ERR_ADDR_CFG;
+                 goto exit;
+            }
+
+            p_ip_addrs->AddrMcastSolicitedPtr = &p_host_grp->AddrGrp;
+
+        } else {
+            p_host_grp = NetMLDP_HostGrpJoinHandler(if_nbr,     /* Join  mcast group of the solicited mcast.            */
+                                                    p_ip_addrs->AddrMcastSolicitedPtr,
+                                                    p_err);
+            if (*p_err != NET_MLDP_ERR_NONE) {
+                 NetIPv6_CfgAddrRemoveHandler(if_nbr, p_addr, p_err);
+                 p_ip_addrs_return = DEF_NULL;
+                *p_err = NET_IPv6_ERR_ADDR_CFG;
+                 goto exit;
+            }
+        }
+    }
+#endif
+
+    if (lifetime_valid > 0) {                                   /* Set addr Valid Lifetime Tmr                          */
+
+        timeout_tick = (NET_TMR_TICK)lifetime_valid * NET_TMR_TIME_TICK_PER_SEC;
+
+        if (p_ip_addrs->ValidLifetimeTmrPtr == DEF_NULL) {
+            p_ip_addrs->ValidLifetimeTmrPtr = NetTmr_Get(        NetIPv6_AddrValidLifetimeTimeout,
+                                                         (void *)p_ip_addrs,
+                                                                 timeout_tick,
+                                                                 NET_TMR_FLAG_NONE,
+                                                                 p_err);
+            if(*p_err != NET_TMR_ERR_NONE) {
+                NetIPv6_CfgAddrRemoveHandler(if_nbr, p_addr, p_err);
+                p_ip_addrs_return = DEF_NULL;
+               *p_err = NET_IPv6_ERR_ADDR_CFG;
+                goto exit;
+            }
+        } else {
+            NetTmr_Set(p_ip_addrs->ValidLifetimeTmrPtr,
+                       NetIPv6_AddrValidLifetimeTimeout,
+                       timeout_tick,
+                       p_err);
+            if (*p_err != NET_TMR_ERR_NONE) {
+                 NetIPv6_CfgAddrRemoveHandler(if_nbr, p_addr, p_err);
+                 p_ip_addrs_return = DEF_NULL;
+                *p_err = NET_IPv6_ERR_ADDR_CFG;
+                 goto exit;
+            }
+        }
+    }
+
+    if (lifetime_preferred > 0) {                               /* Set addr Preferred Lifetime Tmr.                     */
+
+        timeout_tick = (NET_TMR_TICK)lifetime_preferred * NET_TMR_TIME_TICK_PER_SEC;
+
+        if (p_ip_addrs->PrefLifetimeTmrPtr == DEF_NULL) {
+            p_ip_addrs->PrefLifetimeTmrPtr = NetTmr_Get(        NetIPv6_AddrPrefLifetimeTimeout,
+                                                        (void *)p_ip_addrs,
+                                                                timeout_tick,
+                                                                NET_TMR_FLAG_NONE,
+                                                                p_err);
+            if (*p_err != NET_TMR_ERR_NONE) {
+                 NetIPv6_CfgAddrRemoveHandler(if_nbr, p_addr, p_err);
+                 p_ip_addrs_return = DEF_NULL;
+                *p_err = NET_IPv6_ERR_ADDR_CFG;
+                 goto exit;
+            }
+        } else {
+            NetTmr_Set(p_ip_addrs->PrefLifetimeTmrPtr,
+                       NetIPv6_AddrPrefLifetimeTimeout,
+                       timeout_tick,
+                       p_err);
+            if (*p_err != NET_TMR_ERR_NONE) {
+                 NetIPv6_CfgAddrRemoveHandler(if_nbr, p_addr, p_err);
+                 p_ip_addrs_return = DEF_NULL;
+                *p_err = NET_IPv6_ERR_ADDR_CFG;
+                 goto exit;
+            }
+        }
+    }
+
+#ifdef NET_DAD_MODULE_EN
+    if ((dad_en     == DEF_YES)        &&
+        (link_state == NET_IF_LINK_UP)) {
+
+        p_ip_addrs->AddrState = NET_IPv6_ADDR_STATE_TENTATIVE;
+        p_ip_addrs->IsValid   = DEF_NO;
+
+        switch (addr_cfg_type) {
+            case NET_IPv6_ADDR_CFG_TYPE_STATIC_BLOKING:
+                 dad_hook_fnct = DEF_NULL;
+                 break;
+
+
+            case NET_IPv6_ADDR_CFG_TYPE_STATIC_NO_BLOKING:
+            case NET_IPv6_ADDR_CFG_TYPE_RX_PREFIX_INFO:
+                 dad_hook_fnct = &NetIPv6_CfgAddrAddDAD_Result;
+                 break;
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+            case NET_IPv6_ADDR_CFG_TYPE_AUTO_CFG_NO_BLOCKING:
+                 dad_hook_fnct = &NetIPv6_AddrAutoCfgDAD_Result;
+                 break;
+#endif
+
+            default:
+                 dad_hook_fnct = DEF_NULL;
+                 break;
+        }
+                                                                /* Do DAD on address configured and ...                 */
+                                                                /* ... configure addr state.                            */
+        NetDAD_Start(if_nbr, &p_ip_addrs->AddrHost, addr_cfg_type, dad_hook_fnct, p_err);
+        switch (*p_err) {
+            case NET_IPv6_ERR_NONE:
+                *p_err = NET_IPv6_ERR_NONE;
+                 break;
+
+
+            case NET_DAD_ERR_FAILED:
+                *p_err = NET_IPv6_ERR_ADDR_CFG_DUPLICATED;
+                 break;
+
+
+            case NET_DAD_ERR_IN_PROGRESS:
+                *p_err = NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS;
+                 break;
+
+
+            case NET_ERR_FAULT_FEATURE_DIS:
+                 p_ip_addrs->AddrState = NET_IPv6_ADDR_STATE_PREFERRED;
+                 p_ip_addrs->IsValid   = DEF_YES;
+                 break;
+
+
+            default:
+                 NetIPv6_CfgAddrRemoveHandler(if_nbr, p_addr, p_err);
+                 p_ip_addrs_return = DEF_NULL;
+                *p_err = NET_IPv6_ERR_ADDR_CFG;
+                 goto exit;
+        }
+    } else if (dad_en == DEF_YES) {
+        p_ip_addrs->AddrState = NET_IPv6_ADDR_STATE_TENTATIVE;
+        p_ip_addrs->IsValid   = DEF_NO;
+       *p_err                 = NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS;
+    } else {
+        p_ip_addrs->AddrState = NET_IPv6_ADDR_STATE_PREFERRED;
+        p_ip_addrs->IsValid   = DEF_YES;
+       *p_err                 = NET_IPv6_ERR_NONE;
+    }
+#else
+    p_ip_addrs->AddrState = NET_IPv6_ADDR_STATE_PREFERRED;
+    p_ip_addrs->IsValid   = DEF_YES;
+   *p_err                 = NET_IPv6_ERR_NONE;
+#endif
+
+    p_ip_addrs_return = p_ip_addrs;
+
+    (void)&dad_en;
+    (void)&addr_cfg_type;
+exit:
+    return (p_ip_addrs_return);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_CfgAddrRemove()
+*
+* Description : (1) Remove a configured IPv6 host address & multicast solicited mode address from an
+*                   interface :
+*
+*                   (a) Acquire  network lock.
+*                   (b) Validate address to remove.
+*                   (c) Remove configured IPv6 address from interface's IPv6 address table.
+*                   (d) Release  network lock.
+*
+*
+* Argument(s) : if_nbr          Interface number to remove address configuration.
+*
+*               p_addr_host     Pointer to IPv6 address to remove.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Configured IPv6 address successfully removed.
+*                               NET_IPv6_ERR_INVALID_ADDR_HOST  Invalid    IPv6 address.
+*                               NET_IPv6_ERR_ADDR_CFG_STATE     Invalid    IPv6 address configuration state
+*                                                                 (see Note #5b).
+*                               NET_IPv6_ERR_ADDR_TBL_EMPTY     Interface's configured IPv6 address table empty.
+*                               NET_IPv6_ERR_ADDR_NOT_FOUND     IPv6 address NOT found in interface's configured
+*                                                               IPv6 address table for specified interface.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               -- RETURNED BY NetIF_IsValidCfgdHandler() : --
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if IPv6 address removed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv6_CfgAddrRemove() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) NetIPv6_CfgAddrRemove() blocked until network initialization completes.
+*
+*               (4) (a) An interface may be configured with either :
+*
+*                       (1) One or more statically- configured IPv6 addresses (default configuration)
+*
+*                   (b) If an interface's IPv6 host address(s) are NOT currently statically- or dynamically-
+*                       configured, then NO address(s) may NOT be removed.
+*
+*                   (c) If NO address(s) are configured on an interface after an address is removed, then
+*                       the interface's address configuration is defaulted back to statically-configured.
+*
+*                       See also 'NetIPv6_Init()              Note #2b'
+*                              & 'NetIPv6_CfgAddrRemoveAll()  Note #4c'.
+*
+*                   See also 'net_ipv6.h  NETWORK INTERFACES' IPv6 ADDRESS CONFIGURATION DATA TYPE  Note #1b',
+*                            'NetIPv6_CfgAddrAdd()         Note #7',
+*                            'NetIPv6_CfgAddrAddDynamic()  Note #8',
+*                          & 'NetIPv6_CfgAddrRemoveAll()   Note #4'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_CfgAddrRemove (NET_IF_NBR      if_nbr,
+                                    NET_IPv6_ADDR  *p_addr_host,
+                                    NET_ERR        *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_BOOLEAN        addr_valid;
+#endif
+    CPU_BOOLEAN        result;
+
+
+                                                                        /* ------------- ACQUIRE NET LOCK ------------- */
+    Net_GlobalLockAcquire((void *)&NetIPv6_CfgAddrRemove, p_err);       /* See Note #2b.                                */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                                      /* If init NOT complete, exit (see Note #3).    */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+
+                                                                        /* ------------- VALIDATE IF NBR -------------- */
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_fail;
+    }
+
+                                                                        /* ------------ VALIDATE IPv6 ADDR ------------ */
+    addr_valid = NetIPv6_IsValidAddrHost(p_addr_host);
+    if (addr_valid != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.CfgInvAddrHostCtr);
+       *p_err =  NET_IPv6_ERR_INVALID_ADDR_HOST;
+        goto exit_fail;
+    }
+#endif  /* NET_ERR_CFG_ARG_CHK_EXT_EN */
+
+                                                                        /* Remove specific IF's cfg'd host addr.        */
+    result = NetIPv6_CfgAddrRemoveHandler(if_nbr, p_addr_host, p_err);
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    result = DEF_FAIL;
+#endif
+exit_release:
+                                                                       /* ------------- RELEASE NET LOCK ------------- */
+    Net_GlobalLockRelease();
+
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_CfgAddrRemoveHandler()
+*
+* Description : (1) Remove a configured IPv6 host address & multicast solicited mode address from an
+*                   interface :
+*
+*                   (a) Validate address to remove :
+*                       (1) Validate interface
+*                       (2) Validate IPv6 address
+*
+*                   (b) Remove configured IPv6 address from interface's IPv6 address table :
+*                       (1) Search table for address to remove
+*                       (2) Close all connections for address
+*
+*
+* Argument(s) : if_nbr          Interface number        to remove address configuration.
+*
+*               p_addr_host     Pointer to IPv6 address to remove.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Configured IPv6 address successfully removed.
+*                               NET_IPv6_ERR_INVALID_ADDR_HOST  Invalid    IPv6 address.
+*                               NET_IPv6_ERR_ADDR_CFG_STATE     Invalid    IPv6 address configuration state
+*                                                                 (see Note #5b).
+*                               NET_IPv6_ERR_ADDR_TBL_EMPTY     Interface's configured IPv6 address table empty.
+*                               NET_IPv6_ERR_ADDR_NOT_FOUND     IPv6 address NOT found in interface's configured
+*                                                               IPv6 address table for specified interface.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               -- RETURNED BY NetIF_IsValidCfgdHandler() : --
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if IPv6 address configuration removed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIPv6_CfgAddrAddHandler(),
+*               NetIPv6_CfgAddrRemove().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s). [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_CfgAddrRemoveHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_CfgAddrRemoveHandler (NET_IF_NBR      if_nbr,
+                                           NET_IPv6_ADDR  *p_addr_host,
+                                           NET_ERR        *p_err)
+{
+    NET_IPv6_ADDR      addr_cfgd;
+    NET_IPv6_IF_CFG   *p_ip_if_cfg;
+    NET_IPv6_ADDRS    *p_ip_addrs;
+    NET_IPv6_ADDRS    *p_ip_addrs_next;
+    NET_IP_ADDRS_QTY   addr_ix;
+    CPU_BOOLEAN        addr_found;
+    CPU_BOOLEAN        result;
+#ifdef  NET_MLDP_MODULE_EN
+    NET_IPv6_ADDR     *p_solicit_node_addr;
+#endif
+
+
+    p_ip_if_cfg = &NetIPv6_IF_CfgTbl[if_nbr];
+
+                                                                        /* ------ VALIDATE NBR CFG'D IPv6 ADDRS ------- */
+    if (p_ip_if_cfg->AddrsNbrCfgd < 1) {                                /* If nbr cfg'd addrs < 1, ...                  */
+        result = DEF_FAIL;
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.CfgAddrTblEmptyCtr);
+       *p_err =  NET_IPv6_ERR_ADDR_TBL_EMPTY;                           /* ... rtn tbl empty.                           */
+        goto exit;
+    }
+
+
+                                                                        /* -------- SRCH IPv6 ADDR IN ADDR TBL -------- */
+    addr_ix     =  0u;
+    addr_found  =  DEF_NO;
+    p_ip_addrs  = &p_ip_if_cfg->AddrsTbl[addr_ix];
+
+    while ((addr_ix    <  p_ip_if_cfg->AddrsNbrCfgd) &&                 /* Srch ALL addrs ...                           */
+           (addr_found == DEF_NO)) {                                    /* ... until addr found.                        */
+
+        addr_found = Mem_Cmp(&p_ip_addrs->AddrHost, p_addr_host, NET_IPv6_ADDR_SIZE);
+        if (addr_found != DEF_YES) {                                    /* If addr NOT found, ...                       */
+            p_ip_addrs++;                                               /* ... adv to next entry.                       */
+            addr_ix++;
+        }
+    }
+
+    if (addr_found != DEF_YES) {                                        /* If addr NOT found, ...                       */
+        result = DEF_FAIL;
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.CfgAddrNotFoundCtr);
+       *p_err =  NET_IPv6_ERR_ADDR_NOT_FOUND;                           /* ... rtn err.                                 */
+        goto exit;
+    }
+
+
+
+                                                                        /* -------- CLOSE ALL IPv6 ADDR CONNS --------- */
+                                                                        /* Close all cfg'd addr's conns.                */
+    Mem_Copy(&addr_cfgd, &p_ip_addrs->AddrHost, NET_IPv6_ADDR_SIZE);
+    NetConn_CloseAllConnsByAddrHandler((CPU_INT08U      *)      &addr_cfgd,
+                                       (NET_CONN_ADDR_LEN)sizeof(addr_cfgd));
+
+                                                                        /* ----------- FREE ADDRESS TIMERS ------------ */
+    NetTmr_Free(p_ip_addrs->PrefLifetimeTmrPtr);
+    NetTmr_Free(p_ip_addrs->ValidLifetimeTmrPtr);
+
+    p_ip_addrs->PrefLifetimeTmrPtr  = DEF_NULL;
+    p_ip_addrs->ValidLifetimeTmrPtr = DEF_NULL;
+
+#ifdef  NET_MLDP_MODULE_EN
+                                                                        /* LEAVE MLDP GROUP OF THE MCAST SOLICITED ADDR */
+    p_solicit_node_addr = p_ip_addrs->AddrMcastSolicitedPtr;
+    if (p_solicit_node_addr != DEF_NULL) {
+        NetMLDP_HostGrpLeaveHandler(if_nbr,
+                                    p_solicit_node_addr,
+                                    p_err);
+    }
+#endif
+
+                                                                        /* ------ REMOVE IPv6 ADDR FROM ADDR TBL ------ */
+    p_ip_addrs_next = p_ip_addrs;
+    p_ip_addrs_next++;
+    addr_ix++;
+
+    while (addr_ix < p_ip_if_cfg->AddrsNbrCfgd) {                       /* Shift ALL remaining tbl addr(s) ...          */
+                                                                        /* ... following removed addr to prev tbl entry.*/
+        Mem_Copy(&p_ip_addrs->AddrHost, &p_ip_addrs_next->AddrHost, NET_IPv6_ADDR_SIZE);
+        p_ip_addrs++;
+        p_ip_addrs_next++;
+        addr_ix++;
+    }
+
+                                                                        /* Clr last addr tbl entry.                     */
+    NetIPv6_AddrUnspecifiedSet(&p_ip_addrs->AddrHost, p_err);
+
+    p_ip_addrs->AddrMcastSolicitedPtr = DEF_NULL;
+    p_ip_addrs->AddrCfgState          = NET_IPv6_ADDR_CFG_STATE_NONE;
+    p_ip_addrs->AddrHostPrefixLen     = 0u;
+
+    p_ip_if_cfg->AddrsNbrCfgd--;
+
+   *p_err  = NET_IPv6_ERR_NONE;
+    result = DEF_OK;
+
+exit:
+    return (result);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_CfgAddrRemoveAll()
+*
+* Description : (1) Remove all configured IPv6 host address(s) from an interface :
+*
+*                   (a) Acquire  network lock
+*                   (b) Validate interface
+*                   (c) Remove   ALL configured IPv6 host address(s) from interface
+*                   (d) Release  network lock
+*
+*
+* Argument(s) : if_nbr      Interface number to remove address configuration.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               -- RETURNED BY NetIPv6_CfgAddrRemoveAllHandler() : ---
+*                               NET_IPv6_ERR_NONE               ALL configured IPv6 address(s) successfully removed.
+*                               NET_IPv6_ERR_ADDR_CFG_STATE     Invalid IPv6 address configuration state (see Note #4b).
+*
+*                                                               ------ RETURNED BY NetIF_IsValidCfgdHandler() : ------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ------- RETURNED BY Net_GlobalLockAcquire() : --------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if ALL interface's configured IP host address(s) successfully removed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv6_CfgAddrRemoveAll() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv6_CfgAddrRemoveAllHandler()  Note #2'.
+*
+*               (3) NetIPv6_CfgAddrRemoveAll() blocked until network initialization completes.
+*
+*               (4) (a) An interface may be configured with either :
+*
+*                       (1) One or more statically- configured IPv6 addresses (default configuration)
+*                               OR
+*                       (2) Exactly one dynamically-configured IPv6 address
+*
+*                   (b) If an interface's IPv6 host address(s) are NOT currently statically- or dynamically-
+*                       configured, then NO address(s) may NOT be removed.
+*
+*                   (c) When NO address(s) are configured on an interface after ALL address(s) are removed,
+*                       the interface's address configuration is defaulted back to statically-configured.
+*
+*                       See also 'NetIPv6_Init()           Note #2b'
+*                              & 'NetIPv6_CfgAddrRemove()  Note #5c'.
+*
+*                   See also 'net_ipv6.h  NETWORK INTERFACES' IPv6 ADDRESS CONFIGURATION DATA TYPE  Note #1b',
+*                            'NetIPv6._CfgAddrAdd()         Note #7',
+*                            'NetIPv6._CfgAddrAddDynamic()  Note #8',
+*                          & 'NetIPv6._CfgAddrRemove()      Note #5'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_CfgAddrRemoveAll (NET_IF_NBR   if_nbr,
+                                       NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  addr_remove;
+
+
+
+    Net_GlobalLockAcquire((void *)&NetIPv6_CfgAddrRemoveAll,p_err);     /* Acquire net lock (see Note #1b).             */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                                      /* If init NOT complete, exit (see Note #3).    */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);                        /* Validate IF nbr.                             */
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+                                                                        /* Remove all IF's cfg'd host addr(s).          */
+    addr_remove = NetIPv6_CfgAddrRemoveAllHandler(if_nbr, p_err);
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    addr_remove = DEF_FAIL;
+#endif
+
+exit_release:
+    Net_GlobalLockRelease();                                            /* Release net lock.                            */
+
+    return (addr_remove);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetIPv6_CfgAddrRemoveAllHandler()
+*
+* Description : (1) Remove all configured IPv6 host address(s) from an interface :
+*
+*                   (a) Validate IPv6 address configuration state                                   See Note #3b
+*                   (b) Remove ALL configured IPv6 address(s) from interface's IPv6 address table :
+*                       (1) Close all connections for each address
+*                   (c) Reset    IPv6 address configuration state to static                         See Note #3c
+*
+*
+*
+* Argument(s) : if_nbr      Interface number to remove address configuration.
+*               ------      Argument validated in NetIPv6_CfgAddrRemoveAll(),
+*                                                 NetIPv6_CfgAddrAddDynamicStart(),
+*                                                 NetIPv6_CfgAddrAddDynamic().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               ALL configured IPv6 address(s) successfully
+*                                                                   removed.
+*                               NET_IPv6_ERR_ADDR_CFG_STATE     Invalid IPv6 address configuration state
+*                                                                   (see Note #3b).
+*
+* Return(s)   : DEF_OK,   if ALL interface's configured IPv6 host address(s) successfully removed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIPv6_CfgAddrRemoveAll(),
+*               NetIPv6_CfgAddrAddDynamicStart(),
+*               NetIPv6_CfgAddrAddDynamic().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv6_CfgAddrRemoveAllHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetIPv6_CfgAddrRemoveAll()  Note #2'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_CfgAddrRemoveAllHandler (NET_IF_NBR   if_nbr,
+                                              NET_ERR     *p_err)
+{
+    NET_IPv6_IF_CFG   *p_ip_if_cfg;
+    NET_IPv6_ADDRS    *p_ip_addrs;
+    NET_IP_ADDRS_QTY   addr_ix;
+
+
+   p_ip_if_cfg = &NetIPv6_IF_CfgTbl[if_nbr];
+
+                                                                        /* ------ REMOVE ALL CFG'D IPv6 ADDR(S) ------- */
+    addr_ix    =  0u;
+    p_ip_addrs = &p_ip_if_cfg->AddrsTbl[addr_ix];
+    while (addr_ix < p_ip_if_cfg->AddrsNbrCfgd) {                       /* Remove ALL cfg'd addrs.                      */
+
+                                                                        /* Close  all cfg'd addr's conns.               */
+        NetConn_CloseAllConnsByAddrHandler((CPU_INT08U      *)&p_ip_addrs->AddrHost,
+                                           (NET_CONN_ADDR_LEN) NET_IPv6_ADDR_SIZE);
+
+
+#ifdef  NET_MLDP_MODULE_EN
+                                                                /* Leave the MLDP grp of the mcast solicited addr.      */
+        NetMLDP_HostGrpLeaveHandler(if_nbr,
+                                    p_ip_addrs->AddrMcastSolicitedPtr,
+                                    p_err);
+#endif
+                                                                        /* Remove addr from tbl.                        */
+        NetIPv6_AddrUnspecifiedSet(&p_ip_addrs->AddrHost, p_err);
+
+        p_ip_addrs->AddrMcastSolicitedPtr = (NET_IPv6_ADDR *)0;
+        p_ip_addrs->AddrCfgState          = NET_IPv6_ADDR_CFG_STATE_NONE;
+        p_ip_addrs->AddrState             = NET_IPv6_ADDR_STATE_NONE;
+        p_ip_addrs->AddrHostPrefixLen     = 0u;
+        p_ip_addrs->IfNbr                 = NET_IF_NBR_NONE;
+        p_ip_addrs->IsValid               = DEF_NO;
+
+        NetTmr_Free(p_ip_addrs->PrefLifetimeTmrPtr);
+        NetTmr_Free(p_ip_addrs->ValidLifetimeTmrPtr);
+
+        p_ip_addrs->PrefLifetimeTmrPtr  = DEF_NULL;
+        p_ip_addrs->ValidLifetimeTmrPtr = DEF_NULL;
+
+        p_ip_addrs++;
+        addr_ix++;
+    }
+
+    p_ip_if_cfg->AddrsNbrCfgd = 0u;                                     /* NO  addr(s) cfg'd.                           */
+
+
+   *p_err =  NET_IPv6_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_CfgFragReasmTimeout()
+*
+* Description : Configure IPv6 fragment reassembly timeout.
+*
+*               (1) IPv6 fragment reassembly timeout is the maximum time allowed between received IPv6
+*                   fragments from the same IPv6 datagram.
+*
+* Argument(s) : timeout_sec     Desired value for IPv6 fragment reassembly timeout (in seconds).
+*
+* Return(s)   : DEF_OK,   IPv6 fragment reassembly timeout configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Net_InitDflt(),
+*               Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (2) Timeout in seconds converted to 'NET_TMR_TICK' ticks in order to pre-compute initial
+*                   timeout value in 'NET_TMR_TICK' ticks.
+*
+*               (3) 'NetIPv6_FragReasmTimeout' variables MUST ALWAYS be accessed exclusively in critical
+*                    sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_CfgFragReasmTimeout (CPU_INT08U  timeout_sec)
+{
+    NET_TMR_TICK  timeout_tick;
+    CPU_SR_ALLOC();
+
+
+    if (timeout_sec < NET_IPv6_FRAG_REASM_TIMEOUT_MIN_SEC) {
+        return (DEF_FAIL);
+    }
+    if (timeout_sec > NET_IPv6_FRAG_REASM_TIMEOUT_MAX_SEC) {
+        return (DEF_FAIL);
+    }
+
+    timeout_tick                  = (NET_TMR_TICK)timeout_sec * NET_TMR_TIME_TICK_PER_SEC;
+    CPU_CRITICAL_ENTER();
+    NetIPv6_FragReasmTimeout_sec  =  timeout_sec;
+    NetIPv6_FragReasmTimeout_tick =  timeout_tick;
+    CPU_CRITICAL_EXIT();
+
+   (void)&NetIPv6_FragReasmTimeout_sec;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv6_GetAddrHost()
+*
+* Description : Get an interface's IPv6 host address(s) [see Note #3].
+*
+* Argument(s) : if_nbr          Interface number to get IPv6 host address(s).
+*
+*               p_addr_tbl       Pointer to IPv6 address table that will receive the IPv6 host address(s)
+*                                   in host-order for this interface.
+*
+*               p_addr_tbl_qty   Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address table, in number of IPv6 addresses,
+*                                           pointed to by 'p_addr_tbl'.
+*                                   (b) (1) Return the actual number of IPv6 addresses, if NO error(s);
+*                                       (2) Return 0,                                 otherwise.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   - RETURNED BY NetIPv6_GetAddrHostHandler() : -
+*                               NET_IPv6_ERR_NONE                   IP host address(s) successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_addr_tbl'/'p_addr_tbl_qty' passed
+*                                                                       a NULL pointer.
+*                               NET_IPv6_ERR_ADDR_NONE_AVAIL        NO IPv6 host address(s) configured on specified
+*                                                                       interface.
+*                               NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS   Interface in dynamic address initialization.
+*                               NET_IPv6_ERR_ADDR_TBL_SIZE          Invalid IPv6 address table size.
+*                               NET_IFV6_ERR_INVALID_IF             Invalid network interface number.
+*
+*                                                                   --- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if interface's IPv6 host address(s) successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_GetAddrHost() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv6_GetAddrHostHandler()  Note #1'.
+*
+*               (2) NetIPv6_GetAddrHost() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_GetAddrHost (NET_IF_NBR         if_nbr,
+                                  NET_IPv6_ADDR     *p_addr_tbl,
+                                  NET_IP_ADDRS_QTY  *p_addr_tbl_qty,
+                                  NET_ERR           *p_err)
+{
+    CPU_BOOLEAN  addr_avail;
+
+
+
+    Net_GlobalLockAcquire((void *)&NetIPv6_GetAddrHost, p_err); /* Acquire net lock (see Note #1b).                     */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+                                                                /* Get all IF's host addr(s).                           */
+    addr_avail = NetIPv6_GetAddrHostHandler(if_nbr, p_addr_tbl, p_addr_tbl_qty, p_err);
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    addr_avail = DEF_FAIL;
+#endif
+
+exit_release:
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+
+    return (addr_avail);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetIPv6_GetAddrHostHandler()
+*
+* Description : Get an interface's IPv6 host address(s) [see Note #2].
+*
+* Argument(s) : if_nbr          Interface number to get IPv6 host address(s).
+*
+*               p_addr_tbl       Pointer to IPv6 address table that will receive the IPv6 host address(s)
+*                                   in host-order for this interface.
+*
+*               p_addr_tbl_qty   Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address table, in number of IPv6 addresses,
+*                                           pointed to by 'p_addr_tbl'.
+*                                   (b) (1) Return the actual number of IPv6 addresses, if NO error(s);
+*                                       (2) Return 0,                                   otherwise.
+*
+*                               See also Note #3.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                   IPv6 host address(es) successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'p_addr_tbl'/'p_addr_tbl_qty' passed
+*                                                                       a NULL pointer.
+*                               NET_IPv6_ERR_ADDR_NONE_AVAIL        NO IPv6 host address(s) configured on specified
+*                                                                       interface.
+*                               NET_IPv6_ERR_ADDR_TBL_SIZE          Invalid IPv6 address table size.
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+* Return(s)   : DEF_OK,   if interface's IPv6 host address(s) successfully returned.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIPv6_GetAddrHost(),
+*               NetIPv6_GetHostAddrProtocol(),
+*               NetSock_BindHandler(),
+*               NetSock_TxDataHandlerDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_GetAddrHostHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetIPv6_GetAddrHost()  Note #1'.
+*
+*               (2) IPv6 address(s) returned in host-order.
+*
+*               (3) Since 'p_addr_tbl_qty' argument is both an input & output argument
+*                   (see 'Argument(s) : p_addr_tbl_qty'), ... :
+*
+*                   (a) Its input value SHOULD be validated prior to use; ...
+*
+*                       (1) In the case that the 'p_addr_tbl_qty' argument is passed a null pointer,
+*                           NO input value is validated or used.
+*
+*                       (2) The number of IP addresses of the table that will receive the configured
+*                           IP address(s) MUST be greater than or equal to NET_IPv6_CFG_IF_MAX_NBR_ADDR.
+*
+*                   (b) While its output value MUST be initially configured to return a default value
+*                       PRIOR to all other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_GetAddrHostHandler (NET_IF_NBR         if_nbr,
+                                         NET_IPv6_ADDR     *p_addr_tbl,
+                                         NET_IP_ADDRS_QTY  *p_addr_tbl_qty,
+                                         NET_ERR           *p_err)
+{
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    NET_IP_ADDRS_QTY   addr_tbl_qty;
+#endif
+    NET_IPv6_IF_CFG   *p_ip_if_cfg;
+    NET_IPv6_ADDR     *p_ip_addr;
+    NET_IPv6_ADDR     *p_addr;
+    NET_IP_ADDRS_QTY   addr_ix;
+
+
+                                                                /* ---------------- VALIDATE ADDR TBL ----------------- */
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (p_addr_tbl_qty == (NET_IP_ADDRS_QTY *)0) {              /* See Note #3a1.                                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (DEF_FAIL);
+    }
+
+     addr_tbl_qty = *p_addr_tbl_qty;
+#endif
+   *p_addr_tbl_qty =  0u;                                       /* Cfg rtn addr tbl qty for err  (see Note #3b).        */
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (addr_tbl_qty < NET_IPv6_CFG_IF_MAX_NBR_ADDR) {          /* Validate initial addr tbl qty (see Note #3a).        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.CfgAddrTblSizeCtr);
+       *p_err =  NET_IPv6_ERR_ADDR_TBL_SIZE;
+        return (DEF_FAIL);
+    }
+
+    if (p_addr_tbl == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+   (void)NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ------------------ GET IPv6 ADDRS ------------------ */
+    p_addr = p_addr_tbl;
+
+    if (if_nbr == NET_IF_NBR_LOOPBACK) {                        /* For loopback IF,                  ...                */
+#if (NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+                                                                /* ... get dflt IPv6 localhost addr; ...                */
+        p_addr            =  (NET_IPv6_ADDR *)&NET_IPv6_ADDR_LOCAL_HOST_ADDR;
+       *p_addr_tbl_qty    =   1u;
+       *p_err             =   NET_IPv6_ERR_NONE;
+        return (DEF_OK);
+#else
+       *p_err             = NET_IF_ERR_INVALID_IF;
+        return (DEF_FAIL);
+#endif
+    }
+
+    p_ip_if_cfg = &NetIPv6_IF_CfgTbl[if_nbr];
+
+    if (p_ip_if_cfg->AddrsNbrCfgd < 1) {
+       *p_err =  NET_IPv6_ERR_ADDR_NONE_AVAIL;
+        return (DEF_FAIL);
+    }
+
+    addr_ix  =  0u;
+    while (addr_ix < p_ip_if_cfg->AddrsNbrCfgd) {               /* ... else get all cfg'd host addr(s).                 */
+        p_ip_addr = &p_ip_if_cfg->AddrsTbl[addr_ix].AddrHost;
+        Mem_Copy(p_addr, p_ip_addr, sizeof(NET_IPv6_ADDR));
+        p_addr++;
+        addr_ix++;
+    }
+
+   *p_addr_tbl_qty = p_ip_if_cfg->AddrsNbrCfgd;                 /* Rtn nbr of cfg'd addrs.                              */
+   *p_err          = NET_IPv6_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_GetAddrSrc()
+*
+* Description : Find the best matched source address in the IPv6 configured host addresses for the
+*               specified destination address.
+*
+* Argument(s) : p_if_nbr        Pointer to given interface number if any, variable that will received the
+*                                  interface number if none is given.
+*
+*               p_addr_src      Pointer to IPv6 suggested source address if any.
+*
+*               p_addr_dest     Pointer to the destination address.
+*
+*               p_addr_nexthop  Pointer to Next Hop IPv6 address that the function will found.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                               -- RETURNED BY NetIPv6_GetAddrSrcHandler() : -
+*                               NET_IPv6_ERR_NONE               IPv6 Source address found.
+*                               NET_ERR_FAULT_NULL_PTR          Argument(s) passed NULL pointer.
+*                               NET_IPv6_ERR_TX_NEXT_HOP_NONE   No Next Hop was found for destination.
+*                               NET_IPv6_ERR_TX_SRC_SEL_FAIL    No adequate Source address was found.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Pointer to the IPv6 addresses structure associated with the best source address for the given
+*               destination.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s) [see also Note #3].
+*
+* Note(s)     : (1) NetIPv6_GetAddrSrc() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv6_GetAddrSrcHandler()  Note #1'.
+*********************************************************************************************************
+*/
+const  NET_IPv6_ADDRS  *NetIPv6_GetAddrSrc(       NET_IF_NBR     *p_if_nbr,
+                                           const  NET_IPv6_ADDR  *p_addr_src,
+                                           const  NET_IPv6_ADDR  *p_addr_dest,
+                                                  NET_IPv6_ADDR  *p_addr_nexthop,
+                                                  NET_ERR        *p_err)
+{
+    const  NET_IPv6_ADDRS  *p_addrs;
+
+
+    Net_GlobalLockAcquire((void *)&NetIPv6_GetAddrSrc, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+                                                                /* Get source address.                                  */
+    p_addrs = NetIPv6_GetAddrSrcHandler(p_if_nbr,
+                                        p_addr_src,
+                                        p_addr_dest,
+                                        p_addr_nexthop,
+                                        p_err);
+
+    goto exit_release;
+
+
+exit_lock_fault:
+    return ((NET_IPv6_ADDRS *)0);
+
+exit_release:
+    Net_GlobalLockRelease();
+
+    return (p_addrs);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv6_GetAddrSrcHandler()
+*
+* Description : Find the best matched source address for the given destination address.
+*
+* Argument(s) : p_if_nbr        Pointer to given interface number if any, variable that will received the
+*                                  interface number if none is given.
+*
+*               p_addr_src      Pointer to IPv6 suggested source address if any.
+*
+*               p_addr_dest     Pointer to the destination address.
+*
+*               p_addr_nexthop  Pointer to Next Hop IPv6 address that the function will found.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               IPv6 Source address found.
+*                               NET_ERR_FAULT_NULL_PTR          Argument(s) passed NULL pointer.
+*
+*                                                               ------- RETURNED BY NetNDP_NextHop() : -------
+*                               NET_IPv6_ERR_TX_NEXT_HOP_NONE   No Next Hop was found for destination.
+*
+*                                                               --- RETURNED BY NetIPv6_AddrSrcSelect() : ----
+*                               NET_IPv6_ERR_TX_SRC_SEL_FAIL    No adequate Source address was found.
+*
+*
+* Return(s)   : Pointer to the IPv6 addresses structure associated with the best source address for the given
+*               destination.
+*
+* Caller(s)   : NetIPv6_GetAddrSrc(),
+*               NetICMPv6_TxMsgReply(),
+*               NetICMPv6_TxReqHandler(),
+*               NetSock_ConnHandlerAddrLocalBind(),
+*               NetSock_TxDataHandlerDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+*
+* Note(s)     : (1) NetIPv6_GetAddrSrcHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*               (2) If a valid Interface number is given, the function will pull all the addresses
+*                   configured on the Interface and found the best source address for the given destination
+*                   address according to the Source Address Selection Rules define in RFC#6724.
+*
+*               (3) Else, if no Interface number is passed, the function will first call
+*                   NetNDP_NextHop() to determine the Next-Hop and therefore the good
+*                   Interface to Transmit given the destination address. Afterwards, the function will
+*                   continue with the source selection as mentioned in note #1.
+*
+*               (4) If a suggested source address is passed, the function will check if it's a address
+*                   configured on the outgoing Interface. If it is the case, the suggest source address
+*                   will be return and the Source Selection Algorithm will be bypass.
+*********************************************************************************************************
+*/
+
+const  NET_IPv6_ADDRS  *NetIPv6_GetAddrSrcHandler (       NET_IF_NBR     *p_if_nbr,
+                                                   const  NET_IPv6_ADDR  *p_addr_src,
+                                                   const  NET_IPv6_ADDR  *p_addr_dest,
+                                                          NET_IPv6_ADDR  *p_addr_nexthop,
+                                                          NET_ERR        *p_err)
+{
+           NET_IF_NBR         if_nbr;
+           NET_IF_NBR         if_nbr_src_addr;
+           NET_IPv6_IF_CFG   *p_ip_if_cfg;
+#ifdef  NET_NDP_MODULE_EN
+    const  NET_IPv6_ADDR     *p_next_hop;
+#endif
+    const  NET_IPv6_ADDRS    *p_addrs_src;
+           NET_IPv6_ADDRS    *p_addr_ip_tbl;
+           NET_IP_ADDRS_QTY   addr_ip_tbl_qty;
+           CPU_BOOLEAN        valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                 /* ------------ VALIDATE NO NULL POINTERS ------------ */
+    if (p_if_nbr == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit_fail;
+    }
+
+    if (p_addr_dest == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit_fail;
+    }
+#endif
+
+    if_nbr = *p_if_nbr;
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    valid = NetIF_IsValidCfgdHandler(if_nbr, p_err);
+#ifdef  NET_NDP_MODULE_EN
+    if (valid == DEF_YES) {                                     /* A valid IF nbr is given, ...                         */
+                                                                /* ... find address of Next-Hop.                        */
+        p_next_hop = NetNDP_NextHopByIF(if_nbr, p_addr_dest, p_err);
+        if (*p_err == NET_NDP_ERR_TX_NO_NEXT_HOP) {
+            *p_err  = NET_IPv6_ERR_NEXT_HOP;
+             goto exit_fail;
+        }
+
+    } else {                                                    /* No valid IF nbr is passed to function, ...           */
+                                                                /* ... find the outgoing IF and Next-Hop address.       */
+        p_next_hop = NetNDP_NextHop(&if_nbr, p_addr_src, p_addr_dest, p_err);
+        switch (*p_err) {
+            case NET_NDP_ERR_TX_DEST_HOST_THIS_NET:
+            case NET_NDP_ERR_TX_DFLT_GATEWAY:
+            case NET_NDP_ERR_TX_NO_DFLT_GATEWAY:
+            case NET_NDP_ERR_TX_DEST_MULTICAST:
+                 break;
+
+
+            case NET_NDP_ERR_TX_NO_NEXT_HOP:
+            default:
+                *p_err = NET_IPv6_ERR_NEXT_HOP;
+                 goto exit_fail;
+        }
+    }
+
+
+                                                                /* Set the Next-Hop address to return.                  */
+    if (p_addr_nexthop != DEF_NULL) {
+        p_addr_nexthop  = (NET_IPv6_ADDR *)p_next_hop;
+    }
+#endif
+
+   (void)&valid;
+                                                                /* Check if given source addr is configured on IF.      */
+    if (p_addr_src != DEF_NULL) {
+        if_nbr_src_addr = NetIPv6_GetAddrHostIF_Nbr(p_addr_src);
+
+        if (if_nbr_src_addr == if_nbr) {                        /* Return the given src addr if it's cfgd on the IF.    */
+            p_addrs_src = NetIPv6_GetAddrsHostOnIF(if_nbr, p_addr_src);
+           *p_err       = NET_IPv6_ERR_NONE;
+            goto exit;
+        }
+    }
+
+                                                                /* Retrieve pointer to IPv6 addrs configured on IF.     */
+    p_ip_if_cfg     = &NetIPv6_IF_CfgTbl[if_nbr];
+    addr_ip_tbl_qty =  p_ip_if_cfg->AddrsNbrCfgd;
+    p_addr_ip_tbl   = &p_ip_if_cfg->AddrsTbl[0];
+
+                                                                /* Find best matching source address.                   */
+    p_addrs_src = NetIPv6_AddrSrcSel(if_nbr,
+                                     p_addr_dest,
+                                     p_addr_ip_tbl,
+                                     addr_ip_tbl_qty,
+                                     p_err);
+
+    goto exit;
+#if (defined(NET_NDP_MODULE_EN) ||              \
+     NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+exit_fail:
+    p_addrs_src = DEF_NULL;
+#endif
+
+exit:
+    return (p_addrs_src);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv6_GetAddrHostIF_Nbr()
+*
+* Description : Get the interface number for a configured IPv6 host address.
+*
+* Argument(s) : p_addr       Pointer to configured IPv6 host address to get the interface number (see Note #2).
+*
+* Return(s)   : Interface number of a configured  IPv6 host address, if available.
+*
+*               NET_IF_NBR_NONE,                                     otherwise.
+*
+* Caller(s)   : NetIPv6_GetAddrHostIF_Nbr(),
+*               NetIPv6_IsAddrHostCfgdHandler(),
+*               NetIPv6_GetAddrProtocolIF_Nbr().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_GetAddrHostIF_Nbr() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*               (2) This function assumes that the uC/TCPIP stack does not permit two interfaces to setup
+*                   the same address.
+*********************************************************************************************************
+*/
+
+NET_IF_NBR  NetIPv6_GetAddrHostIF_Nbr (const  NET_IPv6_ADDR  *p_addr)
+{
+    CPU_BOOLEAN      addr_unspecified;
+    NET_IPv6_ADDRS  *p_ip_addrs;
+    NET_IF_NBR       if_nbr;
+
+
+    addr_unspecified = NetIPv6_IsAddrUnspecified(p_addr);
+    if (addr_unspecified == DEF_YES) {
+        return (NET_IF_NBR_NONE);
+    }
+
+    p_ip_addrs = NetIPv6_GetAddrsHost(p_addr, &if_nbr);
+    if (p_ip_addrs == (NET_IPv6_ADDRS *)0) {
+        return (NET_IF_NBR_NONE);
+    }
+
+    return (if_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetIPv6_GetAddrHostMatchPrefix()
+*
+* Description : Validate a prefix as being used by an address on the given interface.
+*
+* Argument(s) : if_nbr         Interface number of the interface to search on.
+*
+*               p_prefix       Pointer to IPv6 prefix.
+*
+*               prefix_len     Length of the prefix in bits.
+*
+* Return(s)   : Pointer to IPv6 Addresses object matching the prefix.
+*
+*
+* Caller(s)   : ????
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_GetAddrHostMatchPrefix() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+NET_IPv6_ADDRS  *NetIPv6_GetAddrHostMatchPrefix (NET_IF_NBR      if_nbr,
+                                                 NET_IPv6_ADDR  *p_prefix,
+                                                 CPU_INT08U      prefix_len)
+{
+    NET_IPv6_IF_CFG  *p_ip_if_cfg;
+    NET_IPv6_ADDRS   *p_addrs;
+    NET_IPv6_ADDR     mask;
+    CPU_BOOLEAN       valid;
+    CPU_INT08U        addr_ix;
+    NET_ERR           err;
+
+
+                                                                /* Set mask for given prefix.                           */
+    NetIPv6_MaskGet(&mask, prefix_len, &err);
+    if (err != NET_IPv6_ERR_NONE) {
+        p_addrs = DEF_NULL;
+        goto exit;
+    }
+
+    p_ip_if_cfg = &NetIPv6_IF_CfgTbl[if_nbr];
+
+    for (addr_ix = 0; addr_ix < NET_IPv6_CFG_IF_MAX_NBR_ADDR; addr_ix++) {
+        p_addrs  = &p_ip_if_cfg->AddrsTbl[addr_ix];
+        valid    =  NetIPv6_IsAddrAndMaskValid((const NET_IPv6_ADDR *)&p_addrs->AddrHost,
+                                               (const NET_IPv6_ADDR *)&mask);
+        if (valid == DEF_YES) {
+            goto exit;
+        }
+    }
+
+
+    p_addrs = DEF_NULL;
+
+   (void)&p_prefix;
+
+exit:
+    return (p_addrs);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_IsAddrAndMaskValid()
+*
+* Description : Validate that an IPv6 address and a mask are valid (match).
+*
+* Argument(s) : p_addr  Pointer to IPv6 address to validate.
+*               -----   Argument checked by caller(s).
+*
+*               p_mask  Pointer to IPv6 mask to be use.
+*               ------  Argument validated by caller(s).
+*
+* Return(s)   : DEF_OK,   if the address and the mask are matching.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIPv6_GetAddrHostMatchPrefix(),
+*               NetIPv6_LookUpPolicyTbl().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrAndMaskValid (const  NET_IPv6_ADDR  *p_addr,
+                                         const  NET_IPv6_ADDR  *p_mask)
+{
+    NET_IPv6_ADDR  addr_masked;
+    CPU_BOOLEAN    cmp;
+
+
+    NetIPv6_AddrMask(p_addr, p_mask, &addr_masked);
+    cmp = NetIPv6_IsAddrsIdentical(p_mask, &addr_masked);
+
+    return (cmp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv6_IsAddAndPrefixLenValid()
+*
+* Description : Validate that an IPv6 address and the prefix length are valid (match).
+*
+* Argument(s) : p_addr      Pointer to IPv6 address to validate.
+*               -----       Argument checked by caller(s).
+*
+*               prefix_len  Prefix length,
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                      Result is valid.
+*
+*                               ------------- Returned by NetIPv6_MaskGet() --------------
+*                               NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN   Invalid mask length.
+*
+*
+* Return(s)   : DEF_OK,   if the address and the prefix mask are matching.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetNDP_RemovePrefixDestCache().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrAndPrefixLenValid (const  NET_IPv6_ADDR  *p_addr,
+                                              const  NET_IPv6_ADDR  *p_prefix,
+                                                     CPU_INT08U      prefix_len,
+                                                     NET_ERR        *p_err)
+{
+    NET_IPv6_ADDR  mask;
+    NET_IPv6_ADDR  addr_masked;
+    CPU_BOOLEAN    cmp;
+
+
+    NetIPv6_MaskGet(&mask, prefix_len, p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+         cmp = DEF_FAIL;
+         goto exit;
+    }
+
+    NetIPv6_AddrMask(                        p_addr,
+                     (const  NET_IPv6_ADDR *)&mask,
+                                             &addr_masked);
+
+    cmp = NetIPv6_IsAddrsIdentical(p_prefix, &addr_masked);
+
+exit:
+    return (cmp);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_IsAddrMaskedValid()
+*
+* Description : Validate that a masked address is matching the mask.
+*
+* Argument(s) : p_prefix_mask   Pointer to IPv6 address mask.
+*               -------------   Argument validated by caller(s).
+*
+*               p_addr_masked   Pointer to the masked IPv6 address.
+*               -------------   Argument validated by caller(s).
+*
+* Return(s)   : DEF_OK,   if the address and the prefix mask are matching.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIPv6_AddrSrcSel(),
+*               NetIPv6_IsAddrAndMaskValid(),
+*               NetIPv6_IsAddrAndPrefixLenValid().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrsIdentical (const  NET_IPv6_ADDR  *p_prefix_mask,
+                                       const  NET_IPv6_ADDR  *p_addr_masked)
+{
+    CPU_INT08U     i;
+    CPU_BOOLEAN    cmp;
+
+
+    for (i = 0u; i < NET_IPv6_ADDR_SIZE; i++) {
+        if (p_prefix_mask->Addr[i] != p_addr_masked->Addr[i]) {
+            cmp = DEF_NO;
+            goto exit;
+        }
+    }
+
+
+    cmp = DEF_YES;
+
+exit:
+    return (cmp);
+}
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_GetAddrLinkLocalCfgd()
+*
+* Description : Get a link-local IPv6 address configured on a specific interface.
+*
+* Argument(s) : if_nbr      Network interface number to search for the link-local address.
+*
+* Return(s)   : Pointer on the link-local address, if found.
+*
+*               Pointer to NULL,                   otherwise.
+*
+* Caller(s)   : NetMLDP_TxReport().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_GetAddrLinkLocalCfgd() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+NET_IPv6_ADDR  *NetIPv6_GetAddrLinkLocalCfgd (NET_IF_NBR  if_nbr)
+{
+ #if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN        valid;
+    NET_ERR            err;
+#endif
+    NET_IPv6_IF_CFG   *p_ip_if_cfg;
+    NET_IPv6_ADDRS    *p_ip_addrs;
+    NET_IP_ADDRS_QTY   addr_ix;
+    CPU_BOOLEAN        addr_found;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ----------------- VALIDATE IF NBR ------------------ */
+    valid = NetIF_IsValidCfgdHandler(if_nbr, &err);
+    if (valid != DEF_YES) {
+        return ((NET_IPv6_ADDR *)0);
+    }
+#endif
+
+                                                                /* -------------- SRCH IF FOR IPv6 ADDR --------------- */
+    addr_ix          = 0u;
+    addr_found       = DEF_NO;
+    p_ip_if_cfg      = &NetIPv6_IF_CfgTbl[if_nbr];
+    p_ip_addrs       = &p_ip_if_cfg->AddrsTbl[addr_ix];
+
+    while (addr_ix < p_ip_if_cfg->AddrsNbrCfgd) {               /* Srch all cfg'd addrs ...                             */
+        addr_found = NetIPv6_IsAddrLinkLocal(&p_ip_addrs->AddrHost);
+        if (addr_found == DEF_YES) {
+            return (&p_ip_addrs->AddrHost);
+        }
+
+        p_ip_addrs++;                                           /* ... adv to IF's next addr.                           */
+        addr_ix++;
+    }
+
+    return ((NET_IPv6_ADDR *)0);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_GetAddrMatchingLen()
+*
+* Description : Compute the number of identical most significant bits of two IPv6 addresses.
+*
+* Argument(s) : p_addr_1   First  IPv6 address for comparison.
+*
+*               p_addr_2   Second IPv6 address for comparison.
+*
+* Return(s)   : Number of matching bits, if any.
+*
+*               0,                       otherwise.
+*
+* Caller(s)   : Application,
+*               NetIPv6_AddrSrcSelect(),
+*               NetMLDP_HostGrpSrch().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) The returned number is based on the number of matching MSB of both IPv6 addresses:
+*
+*                   (a) Calling the function with the following addresses will return  32 matching bits:
+*
+*                       p_addr_1 -> FE80:ABCD:0000:0000:0000:0000:0000:0000
+*                       p_addr_2 -> FE80:ABCD:F000:0000:0000:0000:0000:0000
+*
+*                   (b) Calling the function with the following addresses will return 127 matching bits:
+*
+*                       p_addr_1 -> FE80:ABCD:0000:0000:0000:0000:0000:0000
+*                       p_addr_2 -> FE80:ABCD:0000:0000:0000:0000:0000:0001
+*
+*                   (c) Calling the function with the following addresses will return 0   matching bits:
+*
+*                       p_addr_1 -> FE80:ABCD:0000:0000:0000:0000:0000:0000
+*                       p_addr_2 -> 7E80:ABCD:0000:0000:0000:0000:0000:0000
+*
+*                   (d) Calling the function with identical     addresses will return 128 matching bits.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetIPv6_GetAddrMatchingLen (const  NET_IPv6_ADDR  *p_addr_1,
+                                        const  NET_IPv6_ADDR  *p_addr_2)
+{
+    CPU_INT08U   matching_bit_qty;
+    CPU_INT08U   bit_ix;
+    CPU_INT08U   octet_ix;
+    CPU_INT08U   octet_diff;
+    CPU_BOOLEAN  octet_match;
+    CPU_BOOLEAN  bit_match;
+    CPU_BOOLEAN  bit_clr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                             /* ------------ VALIDATE ADDRS ------------ */
+    if (p_addr_1 == (NET_IPv6_ADDR *)0) {
+        return (0);
+    }
+    if (p_addr_2 == (NET_IPv6_ADDR *)0) {
+        return (0);
+    }
+#endif
+
+
+    matching_bit_qty = 0u;
+    octet_ix         = 0u;
+    octet_diff       = 0u;
+    bit_ix           = 0u;
+    octet_match      = DEF_YES;
+    bit_match        = DEF_YES;
+    bit_clr          = DEF_YES;
+
+    while((octet_ix    <  NET_IPv6_ADDR_SIZE) &&
+          (octet_match == DEF_YES)) {
+
+        if (p_addr_1->Addr[octet_ix] == p_addr_2->Addr[octet_ix]) {         /* If octets are     identical ...          */
+            matching_bit_qty = matching_bit_qty + DEF_OCTET_NBR_BITS;       /* ... add 8 bits to matching bit ctr.      */
+        } else {                                                            /* If octets are NOT identical ...          */
+            octet_diff = p_addr_1->Addr[octet_ix] ^ p_addr_2->Addr[octet_ix];/* ... determine which bits are identical. */
+            while((bit_ix    <  DEF_OCTET_NBR_BITS) &&                      /* Calculate number of identical bits ...   */
+                  (bit_match == DEF_YES)) {                                 /* ... starting from the MSB of the octet.  */
+                bit_clr = DEF_BIT_IS_CLR(octet_diff, DEF_BIT_07);
+                if (bit_clr == DEF_YES) {                                   /* If bits are identical .                  */
+                    matching_bit_qty++;                                     /* ... inc maching bits ctr.                */
+                    octet_diff <<= 1u;
+                } else {
+                    bit_match    = DEF_NO;                                  /* Return as soon as a bit is different.    */
+                }
+            }
+            octet_match = DEF_NO;
+        }
+        octet_ix++;
+    }
+
+    return (matching_bit_qty);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_GetAddrScope()
+*
+* Description : Get the scope of the given IPv6 address.
+*
+* Argument(s) : p_addr      Pointer to IPv6 address.
+*
+* Return(s)   : Scope of the given IPv6 address.
+*
+* Caller(s)   : Application,
+*               NetIPv6_AddrSrcSelect(),
+*               NetMLDP_HostGrpJoinHandler(),
+*               NetMLDP_HostGrpLeaveHandler(),
+*               NetMDLP_RxQuery().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) For an unicast address, the scope is given by the 16 first bits of the address. Three
+*                   scopes are possible:
+*                       (a) 0xFE80  Link-local
+*                       (b) 0xFEC0  Site-local  -> Deprecated
+*                       (c) others  Global
+*
+*               (2) For a mulicast address, the scope is given by a four bits field inside the address.
+*                   Current possible scopes are :
+*                       (a) 0x0  reserved
+*                       (b) 0x1  interface-local
+*                       (c) 0x2  link-local
+*                       (d) 0x3  reserved
+*                       (e) 0x4  admin-local
+*                       (f) 0x5  site-local
+*                       (g) 0x6  unassigned
+*                       (h) 0x7  unassigned
+*                       (i) 0x8  organization-local
+*                       (j) 0x9  unassigned
+*                       (k) 0xA  unassigned
+*                       (l) 0xB  unassigned
+*                       (m) 0xC  unassigned
+*                       (n) 0xD  unassigned
+*                       (o) 0xE  global
+*                       (p) 0xF  reserved
+*********************************************************************************************************
+*/
+
+NET_IPv6_SCOPE  NetIPv6_GetAddrScope (const NET_IPv6_ADDR  *p_addr)
+{
+    CPU_INT08U   scope;
+    CPU_BOOLEAN  is_loopback;
+    CPU_BOOLEAN  is_unspecified;
+
+                                                                /* ------------------ UNICAST ADDRESS ----------------- */
+    if (p_addr->Addr[0] == 0xFE) {
+        scope = p_addr->Addr[1] & 0xC0;
+
+        switch (scope) {
+            case 0x80:
+                 return (NET_IPv6_ADDR_SCOPE_LINK_LOCAL);
+
+
+            case 0xC0:
+                 return (NET_IPv6_ADDR_SCOPE_SITE_LOCAL);
+
+
+            default:
+                return (NET_IPv6_ADDR_SCOPE_GLOBAL);
+        }
+    }
+
+                                                                /* ----------------- MULITCAST ADDRESS ---------------- */
+    if (p_addr->Addr[0] == 0xFF) {
+        scope = p_addr->Addr[1] & 0x0F;
+        switch (scope) {
+            case NET_IPv6_ADDR_SCOPE_RESERVED:
+                 return (NET_IPv6_ADDR_SCOPE_RESERVED);
+
+
+            case NET_IPv6_ADDR_SCOPE_IF_LOCAL:
+                 return (NET_IPv6_ADDR_SCOPE_IF_LOCAL);
+
+
+            case NET_IPv6_ADDR_SCOPE_LINK_LOCAL:
+                 return (NET_IPv6_ADDR_SCOPE_LINK_LOCAL);
+
+
+            case NET_IPv6_ADDR_SCOPE_ADMIN_LOCAL:
+                 return (NET_IPv6_ADDR_SCOPE_ADMIN_LOCAL);
+
+
+            case NET_IPv6_ADDR_SCOPE_SITE_LOCAL:
+                 return (NET_IPv6_ADDR_SCOPE_SITE_LOCAL);
+
+
+            case NET_IPv6_ADDR_SCOPE_ORG_LOCAL:
+                 return (NET_IPv6_ADDR_SCOPE_ORG_LOCAL);
+
+
+            case NET_IPv6_ADDR_SCOPE_GLOBAL:
+                 return (NET_IPv6_ADDR_SCOPE_GLOBAL);
+
+
+            default:
+                 return(NET_IPv6_ADDR_SCOPE_GLOBAL);
+                 break;
+        }
+    }
+
+                                                                /* ----------------- LOOPBACK ADDRESS ----------------- */
+    is_loopback = NetIPv6_IsAddrLoopback(p_addr);
+    if (is_loopback == DEF_YES) {
+        return (NET_IPv6_ADDR_SCOPE_LINK_LOCAL);
+    }
+
+                                                                /* ---------------- UNSPECIFIED ADDRESS --------------- */
+    is_unspecified = NetIPv6_IsAddrUnspecified(p_addr);
+    if (is_unspecified == DEF_YES) {
+        return (NET_IPv6_ADDR_SCOPE_GLOBAL);
+    }
+
+    return (NET_IPv6_ADDR_SCOPE_GLOBAL);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_GetAddrsHost()
+*
+* Description : Get interface number & IPv6 addresses object for configured IPv6 address.
+*
+* Argument(s) : p_addr       Pointer to configured IPv6 host address to get the interface number & IPv6
+*                               addresses structure (see Note #1).
+*
+*               p_if_nbr     Pointer to variable that will receive ... :
+*
+*                               (a) The interface number for this configured IPv6 address, if available;
+*                               (b) NET_IF_NBR_NONE,                                       otherwise.
+*
+* Return(s)   : Pointer to corresponding IPv6 address structure, if IPv6 address configured on any interface.
+*
+*               Pointer to NULL,                                 otherwise.
+*
+* Caller(s)   : NetIPv6_GetAddrHostIF_Nbr().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_GetAddrsHost() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*               (2) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+NET_IPv6_ADDRS  *NetIPv6_GetAddrsHost (const  NET_IPv6_ADDR  *p_addr,
+                                              NET_IF_NBR     *p_if_nbr)
+{
+    CPU_BOOLEAN      addr_unspecified;
+    NET_IPv6_ADDRS  *p_ip_addrs;
+    NET_IF_NBR       if_nbr;
+
+
+    if (p_if_nbr != (NET_IF_NBR *)0) {                           /* Init IF nbr for err (see Note #2).                   */
+       *p_if_nbr  =  NET_IF_NBR_NONE;
+    }
+
+                                                                /* ---------------- VALIDATE IPv6 ADDR ---------------- */
+    addr_unspecified = NetIPv6_IsAddrUnspecified(p_addr);
+    if (addr_unspecified == DEF_YES) {
+        return ((NET_IPv6_ADDRS *)0);
+    }
+
+
+                                                                /* -------- SRCH ALL CFG'D IF's FOR IPv6 ADDR --------- */
+    if_nbr     =  NET_IF_NBR_BASE_CFGD;
+    p_ip_addrs = (NET_IPv6_ADDRS *)0;
+
+    while ((if_nbr     <   NET_IF_NBR_IF_TOT) &&                /* Srch all cfg'd IF's ...                              */
+           (p_ip_addrs == (NET_IPv6_ADDRS *)0)) {               /* ... until addr found.                                */
+
+        p_ip_addrs = NetIPv6_GetAddrsHostOnIF(if_nbr, p_addr);
+        if (p_ip_addrs == (NET_IPv6_ADDRS *)0) {                /* If addr NOT found, ...                               */
+            if_nbr++;                                           /* ... adv to next IF nbr.                              */
+        }
+    }
+
+    if (p_ip_addrs != (NET_IPv6_ADDRS *)0) {                    /* If addr avail, ...                                   */
+        if (p_if_nbr != (NET_IF_NBR *)0) {
+           *p_if_nbr  =  if_nbr;                                 /* ... rtn IF nbr.                                      */
+        }
+    }
+
+    return (p_ip_addrs);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_GetAddrsHostOnIF()
+*
+* Description : Get IPv6 addresses structure for an interface's configured IPv6 address.
+*
+* Argument(s) : p_addr      Pointer to configured IPv6 host address to get the interface number & IPv6
+*                               addresses structure (see Note #1).
+*
+*               if_nbr      Interface number to search for configured IPv6 address.
+*
+* Return(s)   : Pointer to corresponding IP address structure, if IPv6 address configured on this interface.
+*
+*               Pointer to NULL,                               otherwise.
+*
+* Caller(s)   : NetIPv6_GetAddrSrcHandler(),
+*               NetIPv6_GetAddrsHost(),
+*               NetIPv6_RxPktValidate(),
+*               NetIPv6_TxPktValidate().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_GetAddrsHostOnIF() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+NET_IPv6_ADDRS  *NetIPv6_GetAddrsHostOnIF (       NET_IF_NBR      if_nbr,
+                                           const  NET_IPv6_ADDR  *p_addr)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN        valid;
+    NET_ERR            err;
+#endif
+           NET_IPv6_IF_CFG   *p_ip_if_cfg;
+           NET_IPv6_ADDRS    *p_ip_addrs;
+    const  NET_IPv6_ADDR     *p_mcast_solicited_addr;
+           NET_IP_ADDRS_QTY   addr_ix;
+           CPU_BOOLEAN        addr_found;
+           CPU_BOOLEAN        addr_found_host;
+           CPU_BOOLEAN        addr_found_mcast_solicited;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ----------------- VALIDATE IF NBR ------------------ */
+    valid = NetIF_IsValidCfgdHandler(if_nbr, &err);
+    if (valid != DEF_YES) {
+        return ((NET_IPv6_ADDRS *)0);
+    }
+#endif
+                                                                /* -------------- VALIDATE IPv6 ADDR PTR -------------- */
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        return ((NET_IPv6_ADDRS *)0);
+    }
+
+                                                                /* -------------- SRCH IF FOR IPv6 ADDR --------------- */
+    addr_ix                    =  0u;
+    addr_found                 =  DEF_NO;
+    addr_found_host            =  DEF_NO;
+    addr_found_mcast_solicited =  DEF_NO;
+    p_ip_if_cfg                = &NetIPv6_IF_CfgTbl[if_nbr];
+    p_ip_addrs                 = &p_ip_if_cfg->AddrsTbl[addr_ix];
+
+    while ((addr_ix    <  p_ip_if_cfg->AddrsNbrCfgd) &&         /* Srch all cfg'd addrs ...                             */
+           (addr_found == DEF_NO)) {                            /* ... until addr found.                                */
+
+        p_mcast_solicited_addr = p_ip_addrs->AddrMcastSolicitedPtr;
+
+        addr_found_host = Mem_Cmp(p_addr, &p_ip_addrs->AddrHost, NET_IPv6_ADDR_SIZE);
+        if (addr_found_host == DEF_NO) {
+            addr_found_mcast_solicited = Mem_Cmp(p_addr, p_mcast_solicited_addr, NET_IPv6_ADDR_SIZE);
+        }
+
+        addr_found = addr_found_host | addr_found_mcast_solicited;
+
+        if (addr_found == DEF_NO) {                             /* If addr NOT found, ...                               */
+            p_ip_addrs++;                                       /* ... adv to IF's next addr.                           */
+            addr_ix++;
+        }
+    }
+
+    if (addr_found != DEF_YES) {
+        return ((NET_IPv6_ADDRS *)0);
+    }
+
+    return (p_ip_addrs);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_GetIF_CfgObj()
+*
+* Description : Get the pointer to the IPv6 Interface configuration object for a given interface number.
+*
+* Argument(s) : if_nbr  Interface number of which to get the IPv6 configuration pointer.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_IPv6_ERR_NONE                   IPv6 IF config successfully returned.
+*                           NET_IFV6_ERR_INVALID_IF             Invalid network interface number.
+*
+* Return(s)   : Pointer to IPv6 Interface configuration for specified interface number.
+*
+* Caller(s)   : NetNDP_RxPrefixAddrsUpdate(),
+*               NetCmd_IF_Config().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_GetIF_CfgObj() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+NET_IPv6_IF_CFG  *NetIPv6_GetIF_CfgObj(NET_IF_NBR   if_nbr,
+                                       NET_ERR     *p_err)
+{
+    NET_IPv6_IF_CFG  *p_ip_if_cfg;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN       valid;
+
+
+                                                                /* ------------ VALIDATE INTERFACE NUMBER ------------- */
+
+    valid = NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (valid != DEF_YES) {
+        return ((NET_IPv6_IF_CFG *)0);
+    }
+#endif
+
+                                                                /* ------------ GET POINTER TO IPv6 IF CFG ------------ */
+    p_ip_if_cfg = &NetIPv6_IF_CfgTbl[if_nbr];
+
+
+   *p_err = NET_IPv6_ERR_NONE;
+
+    return (p_ip_if_cfg);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_IsAddrHostCfgd()
+*
+* Description : Validate an IPv6 address as a configured IPv6 host address on an enabled interface.
+*
+* Argument(s) : p_addr      Pointer to IPv6 address to validate.
+*
+* Return(s)   : DEF_YES, if IPv6 address is one of the host's configured IPv6 addresses.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_IsAddrHostCfgd() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv6_IsAddrHostCfgdHandler()  Note #1'.
+*
+*               (2) NetIPv6_IsAddrHostCfgd() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrHostCfgd (const  NET_IPv6_ADDR  *p_addr)
+{
+    CPU_BOOLEAN  addr_host;
+    NET_ERR      err;
+
+                                                                /* Acquire net lock (see Note #1b).                     */
+    Net_GlobalLockAcquire((void *)&NetIPv6_IsAddrHostCfgd, &err);
+    if (err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+        goto exit_fail;
+    }
+#endif
+
+
+    addr_host = NetIPv6_IsAddrHostCfgdHandler(p_addr);           /* Chk if any cfg'd host addr.                          */
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    addr_host = DEF_FAIL;
+#endif
+
+exit_release:
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (addr_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv6_IsAddrHostCfgdHandler()
+*
+* Description : Validate an IPv6 address as a configured IPv6 host address on an enabled interface.
+*
+* Argument(s) : p_addr       Pointer to IPv6 address to validate.
+*
+* Return(s)   : DEF_YES, if IPv6 address is one of the host's configured IPv6 addresses.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv6_CfgAddrAddHandler(),
+*               NetIPv6_IsAddrHostCfgd().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_IsAddrHostCfgdHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetIPv6_IsAddrHostCfgd()  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrHostCfgdHandler (const  NET_IPv6_ADDR  *p_addr)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  addr_host;
+
+
+    if_nbr    =  NetIPv6_GetAddrHostIF_Nbr(p_addr);
+    addr_host = (if_nbr != NET_IF_NBR_NONE) ? DEF_YES : DEF_NO;
+
+    return (addr_host);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv6_IsAddrCfgdValidHandler()
+*
+* Description : Check if IPv6 address configured is valid (can be used).
+*
+* Argument(s) : p_addr  Pointer to IPv6 address to validate.
+*
+* Return(s)   : DEF_YES, if IPv6 address is one of the host's configured IPv6 addresses.*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : none.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_IsAddrCfgdValidHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrCfgdValidHandler (const  NET_IPv6_ADDR  *p_addr)
+{
+    NET_IPv6_ADDRS  *p_ip_addrs;
+    NET_IF_NBR       if_nbr;
+
+
+    p_ip_addrs = NetIPv6_GetAddrsHost(p_addr, &if_nbr);
+    if (p_ip_addrs == DEF_NULL) {
+        return (DEF_NO);
+    }
+
+    return (p_ip_addrs->IsValid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_IsAddrsCfgdOnIF()
+*
+* Description : Check if any IPv6 host address(s) configured on an interface.
+*
+* Argument(s) : if_nbr      Interface number to check for configured IPv6 host address(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               - RETURNED BY NetIPv6_IsAddrsCfgdOnIF_Handler() : -
+*                               NET_IPv6_ERR_NONE               Configured IPv6 host address(s) availability
+*                                                                   successfully returned.
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ----- RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_YES, if any IP host address(s) configured on interface.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_IsAddrsCfgdOnIF() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetIPv6_IsAddrsCfgdOnIF_Handler()  Note #1'.
+*
+*               (2) NetIPv6_IsAddrsCfgdOnIF() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrsCfgdOnIF (NET_IF_NBR   if_nbr,
+                                      NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  addr_avail;
+
+                                                                /* Acquire net lock (see Note #1b).                     */
+    Net_GlobalLockAcquire((void *)&NetIPv6_IsAddrsCfgdOnIF, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+
+    addr_avail = NetIPv6_IsAddrsCfgdOnIF_Handler(if_nbr, p_err);/* Chk IF for any cfg'd host addr(s).                   */
+    goto exit_release;
+
+
+exit_lock_fault:
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    addr_avail = DEF_FAIL;
+#endif
+
+exit_release:
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (addr_avail);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetIPv6_IsAddrsCfgdOnIF_Handler()
+*
+* Description : Check if any IPv6 address(s) configured on an interface.
+*
+* Argument(s) : if_nbr      Interface number to check for configured IPv6 address(s).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Configured IPv6 host address(s) availability
+*                                                                   successfully returned.
+*
+*                                                               - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : DEF_YES, if any IPv6 host address(s) configured on interface.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv6_IsAddrsCfgdOnIF(),
+*               NetMgr_IsAddrsCfgdOnIF().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_IsAddrsCfgdOnIF_Handler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetIPv6_IsAddrsCfgdOnIF()  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrsCfgdOnIF_Handler (NET_IF_NBR   if_nbr,
+                                              NET_ERR     *p_err)
+{
+    NET_IPv6_IF_CFG  *p_ip_if_cfg;
+    CPU_BOOLEAN       addr_avail;
+
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (DEF_NO);
+    }
+#endif
+
+                                                                /* ------------ CHK CFG'D IPv6 ADDRS AVAIL ------------ */
+    p_ip_if_cfg = &NetIPv6_IF_CfgTbl[if_nbr];
+    addr_avail = (p_ip_if_cfg->AddrsNbrCfgd > 0) ? DEF_YES : DEF_NO;
+   *p_err       =  NET_IPv6_ERR_NONE;
+
+
+    return (addr_avail);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_IsValidAddrHost()
+*
+* Description : (1) Validate an IPv6 host address :
+*
+*                   (a) MUST NOT be one of the following :
+*
+*                       (1) The unspecified address
+*                       (2) The loopback    address
+*                       (3) A Multicast     address
+*
+* Argument(s) : p_addr_host      Pointer to IPv6 host address to validate.
+*
+* Return(s)   : DEF_YES, if IPv6 host address valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (3) See 'net_ipv6.h  IPv6 ADDRESS DEFINES  Notes #2 & #3' for supported IPv6 addresses.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsValidAddrHost (const  NET_IPv6_ADDR  *p_addr_host)
+{
+    CPU_BOOLEAN  is_unspecified;
+    CPU_BOOLEAN  is_loopback;
+    CPU_BOOLEAN  is_mcast;
+
+
+    is_unspecified = NetIPv6_IsAddrUnspecified(p_addr_host);
+    if (is_unspecified == DEF_YES) {
+        return (DEF_NO);
+    }
+
+    is_loopback = NetIPv6_IsAddrLoopback(p_addr_host);
+    if (is_loopback == DEF_YES) {
+        return (DEF_NO);
+    }
+
+    is_mcast = NetIPv6_IsAddrMcast(p_addr_host);
+    if (is_mcast == DEF_YES) {
+        return (DEF_NO);
+    }
+
+    return (DEF_YES);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_IsAddrLinkLocal()
+*
+* Description : (1) Validate an IPv6 address as a link-local IPv6 address.
+*
+*                   (a) RFC #4291, Section 2.5.6 specifies that the "Link-Local addresses have the
+*                       following format" :
+*
+*                           +----------+-------------------------+----------------------------+
+*                           | 10 bits  |         54 bits         |          64 bits           |
+*                           +----------+-------------------------+----------------------------+
+*                           |1111111010|           0             |       interface ID         |
+*                           +----------+-------------------------+----------------------------+
+*
+*                   (b) In text representation, it corresponds to the following format:
+*
+*                       FE80:0000:0000:0000:aaaa.bbbb.cccc.dddd  OR:
+*                       FE80::aaaa.bbbb.cccc.dddd                WHERE:
+*
+*                             aaaa.bbbb.cccc.dddd is the interface ID.
+*
+* Argument(s) : p_addr       Pointer to IPv6 address to validate
+*
+* Return(s)   : DEF_YES, if IPv6 address is a link-local IPv6 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrLinkLocal (const  NET_IPv6_ADDR  *p_addr)
+{
+    CPU_BOOLEAN  addr_link_local;
+
+                                                                /* ---------------- VALIDATE ADDR PTR ----------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return(DEF_NO);
+    }
+#endif
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    addr_link_local = DEF_NO;
+    if ( (p_addr->Addr[0]         == 0xFE)  &&
+        ((p_addr->Addr[1] & 0xC0) == 0x80)  &&
+         (p_addr->Addr[2] == DEF_BIT_NONE)  &&
+         (p_addr->Addr[3] == DEF_BIT_NONE)  &&
+         (p_addr->Addr[4] == DEF_BIT_NONE)  &&
+         (p_addr->Addr[5] == DEF_BIT_NONE)  &&
+         (p_addr->Addr[6] == DEF_BIT_NONE)  &&
+         (p_addr->Addr[7] == DEF_BIT_NONE)) {
+
+         addr_link_local = DEF_YES;
+    }
+
+    return (addr_link_local);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_IsAddrSiteLocal()
+*
+* Description : (1) Validate an IPv6 address as a site-local address :
+*
+*                   (a) RFC #4291, Section 2.5.7 specifies that the "Site-Local addresses have the
+*                       following format" :
+*
+*                           +----------+-------------------------+----------------------------+
+*                           | 10 bits  |         54 bits         |          64 bits           |
+*                           +----------+-------------------------+----------------------------+
+*                           |1111111011|        subnet ID        |       interface ID         |
+*                           +----------+-------------------------+----------------------------+
+*
+*                   (b) In text representation, it corresponds to the following format:
+*
+*                       FEC0:AAAA:BBBB:CCCC:DDDD:aaaa.bbbb.cccc.dddd  WHERE:
+*
+*                             AAAA.BBBB.CCCC.DDDD is the subnet    ID AND ...
+*                             aaaa.bbbb.cccc.dddd is the interface ID.
+*
+* Argument(s) : p_addr       Pointer to IPv6 address to validate.
+*
+* Return(s)   : DEF_YES, if IPv6 address is a site-local IPv6 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrSiteLocal (const  NET_IPv6_ADDR  *p_addr)
+{
+    CPU_BOOLEAN  addr_site_local;
+
+                                                                /* ---------------- VALIDATE ADDR PTR ----------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return(DEF_NO);
+    }
+#endif
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    addr_site_local = DEF_NO;
+    if ((p_addr->Addr[0] == 0xFE)  &&
+        (p_addr->Addr[1] == 0xC0)) {
+        addr_site_local = DEF_YES;
+    }
+
+    return (addr_site_local);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_IsAddrMcast()
+*
+* Description : (1) Validate an IPv6 address as a multicast address :
+*
+*                   (a) RFC #4291, Section 2.7 specifies that "Multicast addresses have the following
+*                       format:
+*
+*                           +--------+----+----+---------------------------------------------+
+*                           |   8    |  4 |  4 |                  112 bits                   |
+*                           +------ -+----+----+---------------------------------------------+
+*                           |11111111|flgs|scop|                  group ID                   |
+*                           +--------+----+----+---------------------------------------------+
+*
+* Argument(s) : p_addr       Pointer to IPv6 address to validate.
+*
+* Return(s)   : DEF_YES, if IPv6 address is a multicast IPv6 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application,
+*               NetICMPv6_RxPktValidate(),
+*               NetICMPv6_TxMsgErrValidate(),
+*               NetIPv6_AddrTypeValidate(),
+*               NetIPv6_CfgAddrValidate(),
+*               NetIPv6_IsAddrProtocolMulticast().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrMcast (const  NET_IPv6_ADDR  *p_addr)
+{
+    CPU_BOOLEAN  addr_mcast;
+
+                                                                /* ---------------- VALIDATE ADDR PTR ----------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return(DEF_NO);
+    }
+#endif
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    addr_mcast = DEF_NO;
+    if (p_addr->Addr[0] == 0xFF) {
+        addr_mcast = DEF_YES;
+    }
+
+    return (addr_mcast);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_IsAddrMcastSolNode()
+*
+* Description : (1) Validate that an IPv6 address is solicited node multicast address.
+*
+* Argument(s) : p_addr           Pointer to       IPv6 address to validate (see Note #2).
+*
+*               p_addr_input     Pointer to input IPv6 address             (see Note #3).
+*
+* Return(s)   : DEF_YES, if IPv6 address is a solicited node multicast IPv6 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (2) IPv6 address MUST be in host-order.
+*
+*               (3) RFC #4291 Section 2.7.1 specifies that "Solicited-Node multicast address are computed
+*                   as a function of a node's unicast and anycast addresses.  A Solicited-Node multicast
+*                   address is formed by taking the low-order 24 bits of an address (unicast or anycast)
+*                   and appending those bits to the prefix FF02:0:0:0:0:1:FF00::/104 resulting in a
+*                   multicast address in the range" from :
+*
+*                   (a) FF02:0000:0000:0000:0000:0001:FF00:0000
+*
+*                        to ...
+*
+*                   (b) FF02:0000:0000:0000:0000:0001:FFFF:FFFF"
+*
+*               (4) As the 24 low-order 24 bits of the input address MUST be compared, the length argument
+*                   of the Mem_Cmp() function call is 3 bytes.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrMcastSolNode (const  NET_IPv6_ADDR  *p_addr,
+                                         const  NET_IPv6_ADDR  *p_addr_input)
+{
+    CPU_BOOLEAN   addr_mcast_sol_node;
+
+                                                                /* --------------- VALIDATE ADDR PTRS ----------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return(DEF_NO);
+    }
+
+    if (p_addr_input == (NET_IPv6_ADDR *)0) {
+        return(DEF_NO);
+    }
+#endif
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    addr_mcast_sol_node = DEF_NO;
+    if ((p_addr->Addr[0]  != 0xFF)         ||                    /* See Note #3.                                         */
+        (p_addr->Addr[1]  != 0x02)         ||
+        (p_addr->Addr[2]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[3]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[4]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[5]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[6]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[7]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[8]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[9]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[10] != DEF_BIT_NONE) ||
+        (p_addr->Addr[11] != 0x01)         ||
+        (p_addr->Addr[12] != 0xFF)){
+
+        return (DEF_NO);
+    }
+    addr_mcast_sol_node = Mem_Cmp(            &p_addr->Addr[13],
+                                              &p_addr_input->Addr[13],
+                                  (CPU_SIZE_T) 3u);             /* See Note #4.                                         */
+
+    return (addr_mcast_sol_node);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_IsAddrMcastAllNodes()
+*
+* Description : (1) Validate that an IPv6 address is a multicast to all routers IPv6 nodes :
+*
+*                   (a) RFC #4291 Section 2.7.1 specifies that the following IPv6 addresses "identify
+*                       the group of all IPv6 nodes" within their respective scope :
+*
+*                       FF01:0000:0000:0000:0000:0000:0000:1    Scope 1 -> Interface-local
+*                       FF02:0000:0000:0000:0000:0000:0000:1    Scope 2 -> Link-local
+*
+*
+* Argument(s) : p_addr      Pointer to IPv6 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv6 address is a mutlicast to all nodes IPv6 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application,
+*               NetIPv6_AddrTypeValidate().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrMcastAllNodes (const  NET_IPv6_ADDR  *p_addr)
+{
+    CPU_BOOLEAN  addr_mcast_all_nodes;
+
+                                                                /* ---------------- VALIDATE ADDR PTR ----------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return(DEF_NO);
+    }
+#endif
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    addr_mcast_all_nodes = DEF_NO;
+    if ((p_addr->Addr[0]  != 0xFF)         ||
+        (p_addr->Addr[2]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[3]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[4]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[5]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[6]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[7]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[8]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[9]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[10] != DEF_BIT_NONE) ||
+        (p_addr->Addr[11] != DEF_BIT_NONE) ||
+        (p_addr->Addr[12] != DEF_BIT_NONE) ||
+        (p_addr->Addr[13] != DEF_BIT_NONE) ||
+        (p_addr->Addr[14] != DEF_BIT_NONE) ||
+        (p_addr->Addr[15] != 0x01)) {
+
+        return (DEF_NO);
+    }
+
+    if ((p_addr->Addr[1] == 0x01) ||
+        (p_addr->Addr[1] == 0x02)) {
+        addr_mcast_all_nodes = DEF_YES;
+    }
+
+    return (addr_mcast_all_nodes);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv6_IsAddrMcastAllRouters()
+*
+* Description : (1) Validate that an IPv6 address is a multicast to all routers IPv6 address :
+*
+*                   (a) RFC #4291 Section 2.7.1 specifies that the following IPv6 addresses "identify
+*                       the group of all IPv6 routers" within their respective scope :
+*
+*                       (a) FF01:0000:0000:0000:0000:0000:0000:2    Scope 1 -> Interface-local
+*                       (b) FF02:0000:0000:0000:0000:0000:0000:2    Scope 2 -> Link-local
+*                       (c) FF05:0000:0000:0000:0000:0000:0000:2    Scope 5 -> Site-local
+*
+*
+* Argument(s) : p_addr  Pointer to IPv6 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv6 address is a mutlicast to all routers IPv6 address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application,
+*               NetIPv6_AddrTypeValidate().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrMcastAllRouters (const  NET_IPv6_ADDR  *p_addr)
+{
+    CPU_BOOLEAN  addr_mcast_all_routers;
+
+                                                                /* ---------------- VALIDATE ADDR PTR ----------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return(DEF_NO);
+    }
+#endif
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    addr_mcast_all_routers = DEF_NO;
+    if ((p_addr->Addr[0]  != 0xFF)         ||
+        (p_addr->Addr[2]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[3]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[4]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[5]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[6]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[7]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[8]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[9]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[10] != DEF_BIT_NONE) ||
+        (p_addr->Addr[11] != DEF_BIT_NONE) ||
+        (p_addr->Addr[12] != DEF_BIT_NONE) ||
+        (p_addr->Addr[13] != DEF_BIT_NONE) ||
+        (p_addr->Addr[14] != DEF_BIT_NONE) ||
+        (p_addr->Addr[15] != 0x02)) {
+
+        return (DEF_NO);
+    }
+
+    if ((p_addr->Addr[1] == 0x01) ||
+        (p_addr->Addr[1] == 0x02) ||
+        (p_addr->Addr[1] == 0x05)) {
+        addr_mcast_all_routers = DEF_YES;
+    }
+
+    return (addr_mcast_all_routers);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_IsAddrMcastRsvd()
+*
+* Description : (1) Validate that an IPv6 address is a reserved multicast IPv6 address :
+*
+*                   (a) RFC #4291 Section 2.7.1 specifies that the following addresses "are reserved and
+*                       shall never be assigned to any multicast group" :
+*
+*                           FF00:0:0:0:0:0:0:0
+*                           FF01:0:0:0:0:0:0:0
+*                           FF02:0:0:0:0:0:0:0
+*                           FF03:0:0:0:0:0:0:0
+*                           FF04:0:0:0:0:0:0:0
+*                           FF05:0:0:0:0:0:0:0
+*                           FF06:0:0:0:0:0:0:0
+*                           FF07:0:0:0:0:0:0:0
+*                           FF08:0:0:0:0:0:0:0
+*                           FF09:0:0:0:0:0:0:0
+*                           FF0A:0:0:0:0:0:0:0
+*                           FF0B:0:0:0:0:0:0:0
+*                           FF0C:0:0:0:0:0:0:0
+*                           FF0D:0:0:0:0:0:0:0
+*                           FF0E:0:0:0:0:0:0:0
+*                           FF0F:0:0:0:0:0:0:0
+*
+*
+* Argument(s) : p_addr      Pointer to IPv6 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv6 address is a reserved multicast IPv6 addresss.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrMcastRsvd (const  NET_IPv6_ADDR  *p_addr)
+{
+    CPU_BOOLEAN  addr_mcast_rsvd;
+
+                                                                /* ---------------- VALIDATE ADDR PTR ----------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return(DEF_NO);
+    }
+#endif
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    addr_mcast_rsvd = DEF_NO;
+    if ((p_addr->Addr[0]  != 0xFF)         ||
+        (p_addr->Addr[1]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[2]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[3]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[4]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[5]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[6]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[7]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[8]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[9]  != DEF_BIT_NONE) ||
+        (p_addr->Addr[10] != DEF_BIT_NONE) ||
+        (p_addr->Addr[11] != DEF_BIT_NONE) ||
+        (p_addr->Addr[12] != DEF_BIT_NONE) ||
+        (p_addr->Addr[13] != DEF_BIT_NONE) ||
+        (p_addr->Addr[14] != DEF_BIT_NONE) ||
+        (p_addr->Addr[15] != DEF_BIT_NONE)) {
+
+        return (DEF_NO);
+    }
+
+    if (p_addr->Addr[1]  < NET_IPv6_MCAST_RSVD_ADDR_MAX_VAL) {
+        addr_mcast_rsvd = DEF_YES;
+    }
+
+    return (addr_mcast_rsvd);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_IsAddrUnspecified()
+*
+* Description : (1) Validate that an IPv6 address is the unspecified IPv6 address :
+*
+*                   (a) RFC #4291 Section 2.5.2 specifies that the following unicast address "is called
+*                       the unspecified address" :
+*
+*                           0000:0000:0000:0000:0000:0000:0000:0000
+*
+* Argument(s) : p_addr   Pointer to IPv6 address to validate.
+*
+* Return(s)   : DEF_YES, if IPv6 address is the unspecified address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Various.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (2) This address indicates the absence of an address and MUST NOT be assigned to any
+*                   physical interface. However, it can be used in some cases in the Source Address field
+*                   of IPv6 packets sent by a host before it has learned its own address.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrUnspecified (const  NET_IPv6_ADDR  *p_addr)
+{
+    CPU_BOOLEAN  addr_unspecified;
+
+                                                                /* ---------------- VALIDATE ADDR PTR ----------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return(DEF_NO);
+    }
+#endif
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    addr_unspecified = DEF_NO;
+    if ((p_addr->Addr[0]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[1]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[2]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[3]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[4]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[5]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[6]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[7]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[8]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[9]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[10] == DEF_BIT_NONE) &&
+        (p_addr->Addr[11] == DEF_BIT_NONE) &&
+        (p_addr->Addr[12] == DEF_BIT_NONE) &&
+        (p_addr->Addr[13] == DEF_BIT_NONE) &&
+        (p_addr->Addr[14] == DEF_BIT_NONE) &&
+        (p_addr->Addr[15] == DEF_BIT_NONE)) {
+
+        addr_unspecified = DEF_YES;
+    }
+
+    return (addr_unspecified);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_IsAddrLoopback()
+*
+* Description : (1) Validate that an IPv6 address is the IPv6 loopback address :
+*
+*                   (a) RFC #4291 Section 2.5.3 specifies that the following unicast address "is called
+*                       the loopback address" :
+*
+*                           0000:0000:0000:0000:0000:0000:0000:0001
+*
+* Argument(s) : p_addr           Pointer to IPv6 address to validate (see Note #2).
+*
+* Return(s)   : DEF_YES, if IPv6 address is the IPv6 loopback address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : Application,
+*               NetIPv6_AddrTypeValidate().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (2) This address may be used by a node to send an IPv6 packet to itself and MUST NOT
+*                   be assigned to any physical interface.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrLoopback (const  NET_IPv6_ADDR  *p_addr)
+{
+    CPU_BOOLEAN  addr_loopback;
+
+                                                                /* ---------------- VALIDATE ADDR PTR ----------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return(DEF_NO);
+    }
+#endif
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    addr_loopback = DEF_NO;
+    if ((p_addr->Addr[0]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[1]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[2]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[3]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[4]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[5]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[6]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[7]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[8]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[9]  == DEF_BIT_NONE) &&
+        (p_addr->Addr[10] == DEF_BIT_NONE) &&
+        (p_addr->Addr[11] == DEF_BIT_NONE) &&
+        (p_addr->Addr[12] == DEF_BIT_NONE) &&
+        (p_addr->Addr[13] == DEF_BIT_NONE) &&
+        (p_addr->Addr[14] == DEF_BIT_NONE) &&
+        (p_addr->Addr[15] == 0x01)) {
+             addr_loopback = DEF_YES;
+    }
+
+    return (addr_loopback);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_AddrIsWildcard()
+*
+* Description : Verify if an NET_IPv6_ADDR address is the IPv6 wildcard address or not.
+*
+* Argument(s) : p_addr      Pointer to a NET_IPv6_ADDR address.
+*
+* Return(s)   : DEF_YES, if the address is IPv6 wildcard.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_IsValidAddrLocal().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN NetIPv6_IsAddrWildcard(NET_IPv6_ADDR  *p_addr)
+{
+    CPU_INT08U    i;
+    CPU_BOOLEAN   is_wildcard;
+    CPU_INT08U   *p_addr_in;
+    CPU_INT08U   *p_addr_wildcard;
+
+
+    is_wildcard     = DEF_YES;
+    p_addr_in       = (CPU_INT08U *) p_addr;
+    p_addr_wildcard = (CPU_INT08U *)&NET_IPv6_ADDR_WILDCARD;
+
+    for (i = 0 ; i < NET_IPv6_ADDR_SIZE ; i++) {
+        if (*p_addr_in != *p_addr_wildcard) {
+            is_wildcard = DEF_NO;
+            break;
+        }
+        p_addr_in++;
+        p_addr_wildcard++;
+    }
+
+    return (is_wildcard);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv6_IsValidHopLim()
+*
+* Description : Verify if an NET_IPv6_HOP_LIM value is valid or not.
+*
+* Argument(s) : hop_lim     The IPv6 hop limit to check the validity.
+*
+* Return(s)   : DEF_YES, if the IPv6 hop limit is valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_IsValidHopLim().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Hop limit has to be greater than or equal to 1 to be forwarded by a gateway.
+*********************************************************************************************************
+*/
+CPU_BOOLEAN  NetIPv6_IsValidHopLim (NET_IPv6_HOP_LIM  hop_lim)
+{
+    if (hop_lim < 1) {
+        return (DEF_NO);
+    }
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_AddrTypeValidate()
+*
+* Description : Validate the type of an IPv6 address.
+*
+* Argument(s) : p_addr      Pointer to IPv6 address to validate.
+*
+*               if_nbr      Interface number associated to the address.
+*
+* Return(s)   : NET_IPv6_ADDR_TYPE_MCAST,         if IPv6 address is an unknown type muticast     address.
+*               NET_IPv6_ADDR_TYPE_MCAST_SOL,     if IPv6 address is the multicast solicited node address.
+*               NET_IPv6_ADDR_TYPE_MCAST_ROUTERS, if IPv6 address is the multicast all routers    address.
+*               NET_IPv6_ADDR_TYPE_MCAST_NODES,   if IPv6 address is the multicast all nodes      address.
+*               NET_IPv6_ADDR_TYPE_LINK_LOCAL,    if IPv6 address is a link-local                 address.
+*               NET_IPv6_ADDR_TYPE_SITE_LOCAL,    if IPv6 address is a site-local                 address.
+*               NET_IPv6_ADDR_TYPE_UNSPECIFIED,   if IPv6 address is the unspecified              address.
+*               NET_IPv6_ADDR_TYPE_LOOPBACK,      if IPv6 address is the loopback                 address.
+*               NET_IPv6_ADDR_TYPE_UNICAST,       otherwise.
+*
+* Caller(s)   : NetIPv6_RxPktValidate().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_IPv6_ADDR_TYPE  NetIPv6_AddrTypeValidate (const  NET_IPv6_ADDR  *p_addr,
+                                                     NET_IF_NBR      if_nbr)
+
+{
+    CPU_BOOLEAN  valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return(NET_IPv6_ADDR_TYPE_NONE);
+    }
+#endif
+
+    valid = NetIPv6_IsAddrMcast(p_addr);
+    if (valid == DEF_YES) {
+        valid = NetIPv6_IsAddrMcastAllRouters(p_addr);
+        if (valid == DEF_YES) {
+            return (NET_IPv6_ADDR_TYPE_MCAST_ROUTERS);
+        }
+
+        valid = NetIPv6_IsAddrMcastAllNodes(p_addr);
+        if (valid == DEF_YES) {
+            return (NET_IPv6_ADDR_TYPE_MCAST_NODES);
+        }
+
+        valid = NetIPv6_IsAddrMcastRsvd(p_addr);
+        if (valid == DEF_YES) {
+            return (NET_IPv6_ADDR_TYPE_MCAST_RSVD);
+        }
+
+        return (NET_IPv6_ADDR_TYPE_MCAST);
+    }
+
+    valid = NetIPv6_IsAddrLoopback(p_addr);
+    if (valid == DEF_YES) {
+        return (NET_IPv6_ADDR_TYPE_LOOPBACK);
+    }
+
+    valid = NetIPv6_IsAddrUnspecified(p_addr);
+    if (valid == DEF_YES) {
+        return (NET_IPv6_ADDR_TYPE_UNSPECIFIED);
+    }
+
+    valid = NetIPv6_IsAddrLinkLocal(p_addr);
+    if (valid == DEF_YES) {
+        return (NET_IPv6_ADDR_TYPE_LINK_LOCAL);
+    }
+
+    valid = NetIPv6_IsAddrSiteLocal(p_addr);
+    if (valid == DEF_YES) {
+        return (NET_IPv6_ADDR_TYPE_SITE_LOCAL);
+    }
+
+
+    (void)&if_nbr;
+
+    return (NET_IPv6_ADDR_TYPE_UNICAST);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv6_CreateIF_ID()
+*
+* Description : Create an IPv6 interface identifier.
+*
+* Argument(s) : if_nbr      Network interface number to obtain link-layer hardware address.
+*
+*               p_addr_id   Pointer to the IPv6 address that will receive the IPv6 interface identifier.
+*
+*               id_type     IPv6 interface identifier type (see Note #1):
+*
+*                               NET_IPv6_ADDR_AUTO_CFG_ID_IEEE_48    Universal token from IEEE 802 48-bit MAC
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                       Address successfully created.
+*                               NET_IPv6_ERR_INVALID_ADDR_ID_TYPE       Invalid address ID type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application,
+*               NetIPv6_AddrAutoCfgHandler().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) Universal interface identifier generated from IEEE 802 48-bit MAC address is the
+*                   only interface identifier actually supported.
+*
+*               (2) RFC #4291, Section 2.5.1 states that:
+*
+*                   (a) "For all unicast addresses, except those that start with the binary value 000,
+*                        Interface IDs are required to be 64 bits long and to be constructed in Modified
+*                        EUI-64 format. Modified EUI-64 format-based interface identifiers may have
+*                        universal scope when derived from a universal token (e.g., IEEE 802 48-bit MAC
+*                         or IEEE EUI-64 identifiers [EUI64]) or may have local scope where a global
+*                        token is not available (e.g., serial links, tunnel end-points) or where global
+*                        tokens are undesirable (e.g., temporary tokens for privacy [PRIV])."
+*
+*                   (b) "In the resulting Modified EUI-64 format, the "u" bit is set to one (1) to
+*                        indicate universal scope, and it is set to zero (0) to indicate local scope."
+*
+*               (3) RFC #4291, Appendix A, states that "[EUI-64] actually defines 0xFF and 0xFF as the
+*                   bits to be inserted to create an IEEE EUI-64 identifier from an IEEE MAC-48 identifier.
+*                   The 0xFF and 0xFE values are used when starting  with an IEEE EUI-48 identifier."
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetIPv6_CreateIF_ID (NET_IF_NBR              if_nbr,
+                                 NET_IPv6_ADDR          *p_addr_id,
+                                 NET_IPv6_ADDR_ID_TYPE   id_type,
+                                 NET_ERR                *p_err)
+{
+    CPU_INT08U  hw_addr[NET_IF_HW_ADDR_LEN_MAX];
+    CPU_INT08U  hw_addr_len;
+
+
+    hw_addr_len = sizeof(hw_addr);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE ADDR PTR ----------------- */
+    if (p_addr_id == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+    }
+                                                                /* -------------- VALIDATE ADDR ID TYPE --------------- */
+    if (id_type != NET_IPv6_ADDR_AUTO_CFG_ID_IEEE_48) {         /* See Note #1.                                         */
+        *p_err = NET_IPv6_ERR_INVALID_ADDR_ID_TYPE;
+         return (NET_IPv6_ADDR_AUTO_CFG_ID_LEN_NONE);
+    }
+#endif
+
+    NetIPv6_AddrUnspecifiedSet(p_addr_id, p_err);               /* Clear IF ID.                                         */
+
+    NetIF_AddrHW_GetHandler(if_nbr, hw_addr, &hw_addr_len, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return (NET_IPv6_ADDR_AUTO_CFG_ID_LEN_NONE);
+    }
+
+    if (hw_addr_len >= 3) {
+                                                                /* ------------------- CREATE IF ID ------------------- */
+        Mem_Copy((void     *)&p_addr_id->Addr[8],               /* Copy first three octets of IF HW addr after ...      */
+                 (void     *)&hw_addr[0],                       /* ... 64 bits of IF ID.                                */
+                 (CPU_SIZE_T) 3u);
+
+        p_addr_id->Addr[8]  ^= 0x02;                            /* Set the ID as universal.               See Note #2b. */
+
+        p_addr_id->Addr[11]  = 0xFF;                            /* Insert the two octets between HW addr. See Note #3.  */
+        p_addr_id->Addr[12]  = 0xFE;
+    }
+
+    if (hw_addr_len >= 6) {
+        Mem_Copy((void     *)&p_addr_id->Addr[13],              /* Copy last three octets of IF HW addr after ...       */
+                 (void     *)&hw_addr[3],                       /* ... the two inserted octets.                         */
+                 (CPU_SIZE_T) 3u);
+    }
+
+   *p_err = NET_IPv6_ERR_NONE;
+
+    return (NET_IPv6_ADDR_AUTO_CFG_ID_LEN_IEEE_48);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_CreateAddrFromID()
+*
+* Description : (1) Create an IPv6 addr from a prefix and an identifier.
+*
+*                   (a) Validate prefix length.
+*                   (b) Append address ID to IPv6 address prefix.
+*
+*
+* Argument(s) : p_addr_id       Pointer to IPv6 address ID.
+*
+*               p_addr_prefix   Pointer to variable that will receive the created IPv6 addr (see Note #2).
+*
+*               prefix_type     Prefix type:
+*
+*                                   NET_IPv6_ADDR_PREFIX_CUSTOM         Custom     prefix type
+*                                   NET_IPv6_ADDR_PREFIX_LINK_LOCAL     Link-local prefix type
+*
+*               prefix_len      Prefix len (in bits).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                       Address successfully created.
+*
+*                               NET_ERR_FAULT_NULL_PTR                   Argument(s) passed a NULL pointer.
+*                               NET_IPv6_ERR_INVALID_ADDR_PREFIX_TYPE   Invalid prefix type.
+*                               NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN    Invalid prefix len.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application,
+*               NetIPv6_AddrAutoCfgHandler().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (2) If the prefix type is custom, p_addr_prefix SHOULD point on a variable that contain
+*                   the prefix address. The address ID will be append to this prefix address. If the
+*                   prefix type is link-local, the content of the variable pointed by p_addr_prefix does
+*                   not matter and will be overwrited.
+*
+*               (3) If the prefix type is link-local, prefix addr SHOULD be initialized to the unspecified
+*                   IPv6 addr to make sure resulting addr does not have any uninitialized values (i.e. if
+*                   any of the lower 8 octets of the ID address are NOT       initialized).
+*********************************************************************************************************
+*/
+
+void  NetIPv6_CreateAddrFromID (NET_IPv6_ADDR              *p_addr_id,
+                                NET_IPv6_ADDR              *p_addr_prefix,
+                                NET_IPv6_ADDR_PREFIX_TYPE   prefix_type,
+                                CPU_SIZE_T                  prefix_len,
+                                NET_ERR                    *p_err)
+{
+    CPU_SIZE_T  id_len_octets;
+    CPU_INT08U  prefix_octets_nbr;
+    CPU_INT08U  prefix_octets_ix;
+    CPU_INT08U  id_bits_nbr;
+    CPU_INT08U  prefix_mask;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE ADDR ID PTR --------------- */
+    if (p_addr_id == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+                                                                /* ------------- VALIDATE ADDR PREFIX PTR ------------- */
+    if (p_addr_prefix == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+                                                                /* ------------ VALIDATE ADDR PREFIX TYPE ------------- */
+    if ((prefix_type != NET_IPv6_ADDR_PREFIX_CUSTOM)      &&
+        (prefix_type != NET_IPv6_ADDR_PREFIX_LINK_LOCAL)) {
+       *p_err = NET_IPv6_ERR_INVALID_ADDR_PREFIX_TYPE;
+        return;
+    }
+#endif
+
+    if (prefix_len > NET_IPv6_ADDR_PREFIX_LEN_MAX) {
+       *p_err = NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN;
+        return;
+    }
+
+    if (prefix_type == NET_IPv6_ADDR_PREFIX_LINK_LOCAL) {       /* If addr prefix type is link-local ...                */
+        if (prefix_len != NET_IPv6_ADDR_PREFIX_LINK_LOCAL_LEN) {
+           *p_err = NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN;
+            return;
+        }
+        NetIPv6_AddrUnspecifiedSet(p_addr_prefix, p_err);       /* ... init addr to unspecified addr. See Note #3.      */
+    }
+
+    prefix_octets_nbr = prefix_len / DEF_OCTET_NBR_BITS;        /* Calc nbr of octets that will contain 8 prefix bits.  */
+    prefix_octets_ix  = prefix_octets_nbr + 1u;                 /* Set ix of the first octet that might NOT contain ... */
+                                                                /* ... 8 prefix bits.                                   */
+    id_len_octets     = NET_IPv6_ADDR_SIZE - prefix_octets_ix;  /* Calc nbr of octets that will contain 8 ID bits.      */
+
+    Mem_Copy((void     *)&p_addr_prefix->Addr[prefix_octets_ix],/* Copy ID octets                into prefix addr.      */
+             (void     *)&p_addr_id->Addr[prefix_octets_ix],
+             (CPU_SIZE_T) id_len_octets);
+
+                                                                /* Calc nbr of remaining ID bits to copy.               */
+    id_bits_nbr = DEF_OCTET_NBR_BITS - (prefix_len % DEF_OCTET_NBR_BITS);
+
+    prefix_mask = DEF_OCTET_MASK << id_bits_nbr;                /* Set prefix mask.                                     */
+
+                                                                /* Copy        remaining ID bits into prefix addr.      */
+    p_addr_prefix->Addr[prefix_octets_nbr] = ((p_addr_prefix->Addr[prefix_octets_nbr] &  prefix_mask) | \
+                                              (p_addr_id->Addr[prefix_octets_nbr]     & ~prefix_mask));
+
+    if (prefix_type == NET_IPv6_ADDR_PREFIX_LINK_LOCAL) {       /* If addr prefix type is link-local ...                */
+        p_addr_prefix->Addr[0] = 0xFE;                          /* ... set link-local prefix before the ID.             */
+        p_addr_prefix->Addr[1] = 0x80;
+        p_addr_prefix->Addr[2] = DEF_BIT_NONE;
+        p_addr_prefix->Addr[3] = DEF_BIT_NONE;
+        p_addr_prefix->Addr[4] = DEF_BIT_NONE;
+        p_addr_prefix->Addr[5] = DEF_BIT_NONE;
+        p_addr_prefix->Addr[6] = DEF_BIT_NONE;
+        p_addr_prefix->Addr[7] = DEF_BIT_NONE;
+    }
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_AddrHW_McastSet()
+*
+* Description : Set the multicast Hardware address.
+*
+* Argument(s) : p_addr_mac_ascii    Pointer to the Multicast MAC address to configured.
+*
+*               p_addr              Pointer to IPv6 address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Multicast MAC address configured successfully.
+*                               NET_ERR_FAULT_NULL_PTR          Argument(s) passed a NULL pointer.
+*                               NET_IPv6_ERR_INVALID_ADDR_DEST  Invalid IPv6 address passed as argument.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_TxPktPrepareFrame().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrHW_McastSet (CPU_INT08U     *p_addr_mac_ascii,
+                               NET_IPv6_ADDR  *p_addr,
+                               NET_ERR        *p_err)
+{
+    CPU_BOOLEAN  is_unspecified;
+
+
+    if (p_addr_mac_ascii == (CPU_INT08U *)0) {
+        *p_err = NET_ERR_FAULT_NULL_PTR;
+         return;
+    }
+
+    is_unspecified = NetIPv6_IsAddrUnspecified(p_addr);
+    if (is_unspecified == DEF_YES) {
+       *p_err = NET_IPv6_ERR_INVALID_ADDR_DEST;
+        return;
+    }
+
+    p_addr_mac_ascii[0] = 0x33;
+    p_addr_mac_ascii[1] = 0x33;
+
+    Mem_Copy((void     *)&p_addr_mac_ascii[2],
+             (void     *)&p_addr->Addr[12],
+             (CPU_SIZE_T) 4u);
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_SetAddrSolicitedMcast()
+*
+* Description : Set the solicited node multicast address for a given address.
+*
+* Argument(s) : p_addr_result   Pointer to the solicited node address to create
+*
+*               p_addr_input    Pointer to the IPv6 address associated with the solicited node address.
+*
+*               if_nbr          Interface number to get the HW address if necessary.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE       Solicited Node Multicast address successfully configured.
+*                               NET_ERR_FAULT_NULL_PTR  Argument(s) passed a NULL pointer.
+*
+*                                                       -- RETURNED by NetIF_IsValidCfgdHandler() : --
+*                               NET_IF_ERR_NONE         Network interface successfully validated.
+*                               NET_IF_ERR_INVALID_IF   Invalid configured network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgReqHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) The solicited node multicast address for a specific IPv6 address is formed with the
+*                   prefix FF02:0:0:0:0:1:FF00::/104 and the last 3 bytes of the given IPv6 address.
+*
+*               (2) If not address is passed as argument, the hardware address of the given Interface is
+*                   used to formed the Solicited Node Multicast address.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrMcastSolicitedSet (NET_IPv6_ADDR  *p_addr_result,
+                                     NET_IPv6_ADDR  *p_addr_input,
+                                     NET_IF_NBR      if_nbr,
+                                     NET_ERR        *p_err)
+{
+    CPU_INT08U   addr_hw[NET_IF_HW_ADDR_LEN_MAX];
+    CPU_INT08U   addr_hw_len;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* --------------- VALIDATE ADDR PTRS ----------------- */
+    if (p_addr_result == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+    }
+
+    if (p_addr_input  == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+    }
+#endif
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+   (void)NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+    p_addr_result->Addr[0]  = 0xFF;
+    p_addr_result->Addr[1]  = 0x02;
+    p_addr_result->Addr[2]  = DEF_BIT_NONE;
+    p_addr_result->Addr[3]  = DEF_BIT_NONE;
+    p_addr_result->Addr[4]  = DEF_BIT_NONE;
+    p_addr_result->Addr[5]  = DEF_BIT_NONE;
+    p_addr_result->Addr[6]  = DEF_BIT_NONE;
+    p_addr_result->Addr[7]  = DEF_BIT_NONE;
+    p_addr_result->Addr[8]  = DEF_BIT_NONE;
+    p_addr_result->Addr[9]  = DEF_BIT_NONE;
+    p_addr_result->Addr[10] = DEF_BIT_NONE;
+    p_addr_result->Addr[11] = 0x01;
+    p_addr_result->Addr[12] = 0xFF;
+
+    if (p_addr_input == (NET_IPv6_ADDR *)0) {                   /* See Note #2.                                         */
+
+        addr_hw_len = NET_IF_HW_ADDR_LEN_MAX;
+
+        NetIF_AddrHW_GetHandler(if_nbr, &addr_hw[0], &addr_hw_len, p_err);
+        if (*p_err != NET_IF_ERR_NONE) {
+             return;
+        }
+
+        Mem_Copy((void     *)&p_addr_result->Addr[13],
+                 (void     *)&addr_hw[3],
+                 (CPU_SIZE_T) 3u);
+
+       *p_err = NET_IPv6_ERR_NONE;
+        return;
+    }
+
+    Mem_Copy((void     *)&p_addr_result->Addr[13],              /* See Note #1.                                         */
+             (void     *)&p_addr_input->Addr[13],
+             (CPU_SIZE_T) 3u);
+
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetIPv6_AddrMcastAllRoutersSet()
+*
+* Description : Set the multicast all-routers IPv6 address.
+*
+* Argument(s) : p_addr      Pointer to the IPv6 Multicast All-Routers address to configured.
+*
+*               mldp_v2     DEF_YES, Multicast Listiner Discovery Protocol version 2 is used
+*                           DEF_NO,  Multicast Listiner Discovery Protocol version 1 is used
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE       Multicast All-Routers address sucessfully configured.
+*                               NET_ERR_FAULT_NULL_PTR  Argument(s) passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_TxReport(),
+*               NetMLDP_TxDone(),
+*               NetNDP_TxRouterSolicitation().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) The IPv6 Mulitcast All-Routers address is defined as FF02:0:0:0:0:0:0:2 for the link-local
+*                   scope.
+*
+*               (2) For the MLDv2 protocol, the address FF02:0:0:0:0:0:0:16 is used as the destination
+*                   address for sending MDL report messages.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrMcastAllRoutersSet (NET_IPv6_ADDR  *p_addr,
+                                      CPU_BOOLEAN     mldp_v2,
+                                      NET_ERR        *p_err)
+{
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ADDR PTR ----------------- */
+    if (p_addr  == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+    }
+#endif
+                                                                /* --------------------- SET ADDR --------------------- */
+    p_addr->Addr[0]  = 0xFF;
+    p_addr->Addr[1]  = 0x02;
+    p_addr->Addr[2]  = DEF_BIT_NONE;
+    p_addr->Addr[3]  = DEF_BIT_NONE;
+    p_addr->Addr[4]  = DEF_BIT_NONE;
+    p_addr->Addr[5]  = DEF_BIT_NONE;
+    p_addr->Addr[6]  = DEF_BIT_NONE;
+    p_addr->Addr[7]  = DEF_BIT_NONE;
+    p_addr->Addr[8]  = DEF_BIT_NONE;
+    p_addr->Addr[9]  = DEF_BIT_NONE;
+    p_addr->Addr[10] = DEF_BIT_NONE;
+    p_addr->Addr[11] = DEF_BIT_NONE;
+    p_addr->Addr[12] = DEF_BIT_NONE;
+    p_addr->Addr[13] = DEF_BIT_NONE;
+    p_addr->Addr[14] = DEF_BIT_NONE;
+
+    if (mldp_v2 == DEF_NO) {
+        p_addr->Addr[15] = 0x02;
+    } else {
+        p_addr->Addr[15] = 0x16;
+    }
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv6_AddrMcastAllNodesSet()
+*
+* Description : Set the multicast all-nodes IPv6 address.
+*
+* Argument(s) : p_addr      Pointer to the IPv6 Multicast All-Nodes address to configured.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE       Multicast All-Nodes address sucessfully configured.
+*                               NET_ERR_FAULT_NULL_PTR  Argument(s) passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Start().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) The IPv6 Multicast All Nodes address is defined as FF02:0:0:0:0:0:0:0:1
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrMcastAllNodesSet (NET_IPv6_ADDR  *p_addr,
+                                    NET_ERR        *p_err)
+{
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ADDR PTR ----------------- */
+    if (p_addr  == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+    }
+#endif
+
+    p_addr->Addr[0]  = 0xFF;
+    p_addr->Addr[1]  = 0x02;
+    p_addr->Addr[2]  = DEF_BIT_NONE;
+    p_addr->Addr[3]  = DEF_BIT_NONE;
+    p_addr->Addr[4]  = DEF_BIT_NONE;
+    p_addr->Addr[5]  = DEF_BIT_NONE;
+    p_addr->Addr[6]  = DEF_BIT_NONE;
+    p_addr->Addr[7]  = DEF_BIT_NONE;
+    p_addr->Addr[8]  = DEF_BIT_NONE;
+    p_addr->Addr[9]  = DEF_BIT_NONE;
+    p_addr->Addr[10] = DEF_BIT_NONE;
+    p_addr->Addr[11] = DEF_BIT_NONE;
+    p_addr->Addr[12] = DEF_BIT_NONE;
+    p_addr->Addr[13] = DEF_BIT_NONE;
+    p_addr->Addr[14] = DEF_BIT_NONE;
+    p_addr->Addr[15] = 0x01;
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_AddrLoopbackSet()
+*
+* Description : Set the loopback IPv6 address.
+*
+* Argument(s) : p_addr      Pointer to the IPv6 Loopback address to configured.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE       IPv6 loopback address sucessfully configured.
+*                               NET_ERR_FAULT_NULL_PTR  Argument(s) passed a NULL pointer
+*
+* Return(s)   : none.
+*
+* Caller(s)   : ????
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) The IPv6 loopback address is defined as 0:0:0:0:0:0:0:1.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrLoopbackSet (NET_IPv6_ADDR  *p_addr,
+                               NET_ERR        *p_err)
+{
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ADDR PTR ----------------- */
+    if (p_addr  == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+    }
+#endif
+
+    p_addr->Addr[0]  = DEF_BIT_NONE;
+    p_addr->Addr[1]  = DEF_BIT_NONE;
+    p_addr->Addr[2]  = DEF_BIT_NONE;
+    p_addr->Addr[3]  = DEF_BIT_NONE;
+    p_addr->Addr[4]  = DEF_BIT_NONE;
+    p_addr->Addr[5]  = DEF_BIT_NONE;
+    p_addr->Addr[6]  = DEF_BIT_NONE;
+    p_addr->Addr[7]  = DEF_BIT_NONE;
+    p_addr->Addr[8]  = DEF_BIT_NONE;
+    p_addr->Addr[9]  = DEF_BIT_NONE;
+    p_addr->Addr[10] = DEF_BIT_NONE;
+    p_addr->Addr[11] = DEF_BIT_NONE;
+    p_addr->Addr[12] = DEF_BIT_NONE;
+    p_addr->Addr[13] = DEF_BIT_NONE;
+    p_addr->Addr[14] = DEF_BIT_NONE;
+    p_addr->Addr[15] = 0x01;
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_AddrUnspecifiedSet()
+*
+* Description : Set the unspecified IPv6 address.
+*
+* Argument(s) : p_addr      Pointer to the IPv6 Unspecified address to configured.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE       IPv6 unspecified address sucessfully configured.
+*                               NET_ERR_FAULT_NULL_PTR  Argument(s) passed a NULL pointer
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgReq(),
+*               NetIPv6_CfgAddrRemove(),
+*               NetIPv6_CfgAddrRemoveAllHandler(),
+*               NetIPv6_CreateAddrFromID(),
+*               NetIPv6_CreateIF_ID(),
+*               NetIPv6_Init(),
+*               NetMLDP_TxMsgDone(),
+*               NetMLDP_TxReport(),
+*               NetNDP_TxNeighborSolicitation().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) The IPv6 Unspecified address is defined as 0:0:0:0:0:0:0:0.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrUnspecifiedSet (NET_IPv6_ADDR  *p_addr,
+                                  NET_ERR        *p_err)
+{
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ADDR PTR ----------------- */
+    if (p_addr  == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+    }
+#endif
+
+    p_addr->Addr[0]  = DEF_BIT_NONE;
+    p_addr->Addr[1]  = DEF_BIT_NONE;
+    p_addr->Addr[2]  = DEF_BIT_NONE;
+    p_addr->Addr[3]  = DEF_BIT_NONE;
+    p_addr->Addr[4]  = DEF_BIT_NONE;
+    p_addr->Addr[5]  = DEF_BIT_NONE;
+    p_addr->Addr[6]  = DEF_BIT_NONE;
+    p_addr->Addr[7]  = DEF_BIT_NONE;
+    p_addr->Addr[8]  = DEF_BIT_NONE;
+    p_addr->Addr[9]  = DEF_BIT_NONE;
+    p_addr->Addr[10] = DEF_BIT_NONE;
+    p_addr->Addr[11] = DEF_BIT_NONE;
+    p_addr->Addr[12] = DEF_BIT_NONE;
+    p_addr->Addr[13] = DEF_BIT_NONE;
+    p_addr->Addr[14] = DEF_BIT_NONE;
+    p_addr->Addr[15] = DEF_BIT_NONE;
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetIPv6_MaskGet()
+*
+* Description : Get an IPv6 mask based on prefix length.
+*
+* Argument(s) : p_mask_rtn  Pointer to IPv6 address mask to set.
+*               ----------  Argument validated by caller(s)
+*
+*               prefix_len  Length of the prefix mask in bits.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                      Mask successfully set.
+*                               NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN   Invalid mask length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_AddrMaskByPrefixLen(),
+*               NetIPv6_GetAddrHostMatchPrefix(),
+*               NetIPv6_IsAddrAndPrefixLenValid().
+*
+*               This function is an application interface (API) function & MAY be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_MaskGet (NET_IPv6_ADDR  *p_mask_rtn,
+                       CPU_INT08U      prefix_len,
+                       NET_ERR        *p_err)
+{
+    CPU_INT08U  mask;
+    CPU_INT08U  index;
+    CPU_INT08U  byte_index;
+    CPU_INT08U  modulo;
+
+
+                                                                /* Validate mask length.                                */
+    if ((prefix_len == 0u)                         ||
+        (prefix_len  > NET_IPv6_ADDR_LEN_NBR_BITS)) {
+       *p_err = NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN;
+        goto exit;
+    }
+
+    index      = 0u;                                            /* Index of bit in IPv6 address.                        */
+    byte_index = 0u;                                            /* Number of the current byte in the IPv6 addr.         */
+    modulo     = 0u;                                            /* Modulo 8.                                            */
+
+                                                                /* Set mask for given prefix.                           */
+    while (index < NET_IPv6_ADDR_LEN_NBR_BITS) {
+        modulo = index % DEF_OCTET_NBR_BITS;
+        if ((modulo == 0) &&                                    /* Increment the byte index when the modulo is null.    */
+            (index  != 0)) {
+             byte_index++;
+        }
+
+        mask = 1u << modulo;                                    /* Set the bit mask for the current byte.               */
+
+        if (index < prefix_len) {                               /* Apply mask for current address byte.                 */
+            DEF_BIT_SET(p_mask_rtn->Addr[byte_index], mask);
+        } else {
+            DEF_BIT_CLR(p_mask_rtn->Addr[byte_index], mask);
+        }
+
+        index++;
+    }
+
+
+   *p_err = NET_IPv6_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_AddrMaskByPrefixLen()
+*
+* Description : Get IPv6 masked with the prefix length.
+*
+*
+* Argument(s) : p_addr      Pointer to IPv6 address.
+*               ------      Argument checked by caller(s).
+*
+*               prefix_len  IPv6 address prefix length.
+*
+*               p_addr_rtn  Pointer to IPv6 address that will receive the masked address.
+*               ----------  Argument validated by caller(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                       Address successfully masked.
+*
+*                               ----------------- RETURNED BY NetIPv6_MaskGet() : ------------------
+*                               NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN    Invalid mask length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_PrefixSrchMatchAddr(),
+*               NetNDP_RxPrefixHandler().
+*
+*               This function is an application interface (API) function & MAY be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrMaskByPrefixLen (const  NET_IPv6_ADDR  *p_addr,
+                                          CPU_INT08U      prefix_len,
+                                          NET_IPv6_ADDR  *p_addr_rtn,
+                                          NET_ERR        *p_err)
+{
+    NET_IPv6_ADDR  mask;
+
+
+    NetIPv6_MaskGet(&mask, prefix_len, p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+         goto exit;
+    }
+
+
+    NetIPv6_AddrMask(                        p_addr,
+                     (const NET_IPv6_ADDR *)&mask,
+                                             p_addr_rtn);
+
+   *p_err = NET_IPv6_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIPv6_AddrMask()
+*
+* Description : Apply IPv6 mask on an address.
+*
+* Argument(s) : p_addr      Pointer to IPv6 address to be masked.
+*               ------      Argument checked by caller(s).
+*
+*               p_mask      Pointer to IPv6 address mask.
+*               ------      Argument validated by caller(s).
+*
+*               p_addr_rtn  Pointer to IPv6 address that will received the masked address.
+*               ----------  Argument validated by caller(s).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_AddrMaskByPrefixLen(),
+*               NetIPv6_IsAddrAndMaskValid(),
+*               NetIPv6_IsAddrAndPrefixLenValid().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrMask (const  NET_IPv6_ADDR   *p_addr,
+                        const  NET_IPv6_ADDR   *p_mask,
+                               NET_IPv6_ADDR   *p_addr_rtn)
+{
+    CPU_INT08U  i;
+
+
+    for (i = 0u; i < NET_IPv6_ADDR_LEN; i++) {
+        p_addr_rtn->Addr[i] = p_addr->Addr[i] & p_mask->Addr[i];
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIPv6_Rx()
+*
+* Description : (1) Process received datagrams & forward to network protocol layers :
+*
+*                   (a) Validate IPv6 packet & options
+*                   (b) Reassemble fragmented datagrams
+*                   (c) Demultiplex datagram to higher-layer protocols
+*                   (d) Update receive statistics
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv6 packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               IP datagram successfully received & processed.
+*
+*                                                               ---- RETURNED BY NetIPv6_RxPktDiscard() : ----
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_Loopback_RxPktDemux(),
+*               Network interface receive functions.
+*
+*               This function is a network protocol suite to network interface (IF) function & SHOULD be
+*               called only by ap_propriate network interface function(s).
+*
+* Note(s)     : (2) Since NetIPv6_RxPktFragReasm() may return a pointer to a different packet buffer (see
+*                   'NetIPv6_RxPktFragReasm()  Return(s)', 'p_buf_hdr' MUST be reloaded.
+*
+*               (3) (a) For single packet buffer IPv6 datagrams, the datagram length is equal to the IPv6
+*                       Total Length minus the IPv6 Header Length.
+*
+*                   (b) For multiple packet buffer, fragmented IPv6 datagrams, the datagram length is
+*                       equal to the previously calculated total fragment size.
+*
+*                       (1) IP datagram length is stored ONLY in the first packet buffer of any
+*                           fragmented packet buffers.
+*
+*               (4) Network buffer already freed by higher layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_Rx (NET_BUF  *p_buf,
+                  NET_ERR  *p_err)
+{
+    NET_BUF_HDR    *p_buf_hdr;
+    NET_IPv6_HDR   *p_ip_hdr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetIPv6_RxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.IPv6.RxPktCtr);
+
+
+                                                                /* -------------- VALIDATE RX'D IPv6 PKT -------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetIPv6_RxPktValidateBuf(p_buf_hdr, p_err);                 /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetIPv6_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+#endif
+    p_ip_hdr = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+    NetIPv6_RxPktValidate(p_buf, p_buf_hdr, p_ip_hdr, p_err);   /* Validate rx'd pkt.                                   */
+
+                                                                /* ----------------- PROCESS EXT HDR ------------------ */
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+             NetIPv6_RxPktProcessExtHdr(p_buf, p_err);
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+        case NET_IPv6_ERR_INVALID_VER:
+        case NET_IPv6_ERR_INVALID_LEN_HDR:
+        case NET_IPv6_ERR_INVALID_LEN_TOT:
+        case NET_IPv6_ERR_INVALID_LEN_DATA:
+        case NET_IPv6_ERR_INVALID_FLAG:
+        case NET_IPv6_ERR_INVALID_FRAG:
+        case NET_IPv6_ERR_INVALID_PROTOCOL:
+        case NET_IPv6_ERR_INVALID_CHK_SUM:
+        case NET_IPv6_ERR_INVALID_ADDR_SRC:
+        case NET_IPv6_ERR_INVALID_ADDR_DEST:
+        case NET_IPv6_ERR_RX_OPT_BUF_NONE_AVAIL:
+        case NET_IPv6_ERR_RX_OPT_BUF_LEN:
+        case NET_IPv6_ERR_RX_OPT_BUF_WR:
+        default:
+             NetIPv6_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+                                                                /* ------------------- REASM FRAGS -------------------- */
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+             p_buf = NetIPv6_RxPktFragReasm(p_buf, p_buf_hdr, p_ip_hdr, p_err);
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+        case NET_IPv6_ERR_INVALID_VER:
+        case NET_IPv6_ERR_INVALID_LEN_HDR:
+        case NET_IPv6_ERR_INVALID_LEN_TOT:
+        case NET_IPv6_ERR_INVALID_LEN_DATA:
+        case NET_IPv6_ERR_INVALID_FLAG:
+        case NET_IPv6_ERR_INVALID_FRAG:
+        case NET_IPv6_ERR_INVALID_PROTOCOL:
+        case NET_IPv6_ERR_INVALID_CHK_SUM:
+        case NET_IPv6_ERR_INVALID_ADDR_SRC:
+        case NET_IPv6_ERR_INVALID_ADDR_DEST:
+        case NET_IPv6_ERR_RX_OPT_BUF_NONE_AVAIL:
+        case NET_IPv6_ERR_RX_OPT_BUF_LEN:
+        case NET_IPv6_ERR_RX_OPT_BUF_WR:
+        default:
+             NetIPv6_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+
+                                                                          /* ------------- DEMUX DATAGRAM ------------- */
+    switch (*p_err) {                                                     /* Chk err from NetIPv6_RxPktFragReasm().     */
+        case NET_IPv6_ERR_RX_FRAG_NONE:
+        case NET_IPv6_ERR_RX_FRAG_COMPLETE:
+             p_buf_hdr = &p_buf->Hdr;                                     /* Reload buf hdr ptr (see Note #3).          */
+             if (*p_err == NET_IPv6_ERR_RX_FRAG_NONE) {                   /* If pkt NOT frag'd, ...                     */
+                  p_buf_hdr->IP_DatagramLen = (p_buf_hdr->IP_TotLen - p_buf_hdr->IPv6_ExtHdrLen);
+                                                                          /* ... calc buf datagram len (see Note #4a).  */
+             } else {                                                     /* Else set tot frag size ...                 */
+                  p_buf_hdr->IP_DatagramLen = p_buf_hdr->IP_FragSizeTot;  /* ...       as datagram len (see Note #4b).  */
+             }
+             NetIPv6_RxPktDemuxDatagram(p_buf, p_buf_hdr, p_err);
+             break;
+
+
+        case NET_IPv6_ERR_RX_FRAG_REASM:                        /* Frag'd datagram in reasm.                            */
+            *p_err = NET_IPv6_ERR_NONE;
+             return;
+
+
+        case NET_IPv6_ERR_RX_FRAG_DISCARD:
+        case NET_IPv6_ERR_RX_FRAG_OFFSET:
+        case NET_IPv6_ERR_RX_FRAG_SIZE:
+        case NET_IPv6_ERR_RX_FRAG_SIZE_TOT:
+        case NET_IPv6_ERR_RX_FRAG_LEN_TOT:
+        default:
+             NetIPv6_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                /* ----------------- UPDATE RX STATS ------------------ */
+    switch (*p_err) {                                           /* Chk err from NetIPv6_RxPktDemuxDatagram().           */
+        case NET_ICMPv6_ERR_NONE:
+        case NET_IGMP_ERR_NONE:
+        case NET_UDP_ERR_NONE:
+        case NET_TCP_ERR_NONE:
+        case NET_NDP_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IPv6.RxDgramCompCtr);
+            *p_err = NET_IPv6_ERR_NONE;
+             break;
+
+
+        case NET_ERR_RX:
+                                                                /* See Note #4.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxPktDisCtr);
+                                                                /* Rtn err from NetIPv6_RxPktDemuxDatagram().           */
+             return;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        default:
+             NetIPv6_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetIPv6_Tx()
+*
+* Description : (1) Prepare & transmit IPv6 datagram packet(s) :
+*
+*                   (a) Validate  transmit packet
+*                   (b) Prepare & transmit packet datagram
+*                   (c) Update    transmit statistics
+*
+*
+* Argument(s) : p_buf           Pointer to network buffer to transmit IPv6 packet.
+*
+*               p_addr_src      Pointer to source        IPv6 address.
+*
+*               p_addr_dest     Pointer to destination   IPv6 address.
+*
+*               traffic_class   Specific traffic class to transmit IPv6 packet (see Note #2a).
+*
+*               flow_label      Specific flow label    to transmit IPv6 packet (see Note #x).
+*
+*               next_hdr        Next header            to transmit IPv6 packet (see Note #x).
+*
+*               hop_limit       Specific hop limit to transmit IPv6 packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               IPv6 datagram(s)     successfully prepared &
+*                                                                   transmitted to network interface layer.
+*                               NET_IPv6_ERR_TX_PKT             IPv6 datagram(s) NOT successfully prepared or
+*                                                                   transmitted to network interface layer.
+*
+*                                                               -- RETURNED BY NetIPv6_TxPktDiscard() : ---
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+*                                                               ------ RETURNED BY NetIPv6_TxPkt() : ------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgErr(),
+*               NetICMPv6_TxMsgReq(),
+*               NetICMPv6_TxMsgReply(),
+*               NetUDP_Tx(),
+*               NetTCP_TxPkt().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_Tx (NET_BUF                 *p_buf,
+                  NET_IPv6_ADDR           *p_addr_src,
+                  NET_IPv6_ADDR           *p_addr_dest,
+                  NET_IPv6_EXT_HDR        *p_ext_hdr_list,
+                  NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                  NET_IPv6_FLOW_LABEL      flow_label,
+                  NET_IPv6_HOP_LIM         hop_lim,
+                  NET_ERR                 *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_ERR       err;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetIPv6_TxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+                                                                /* --------------- VALIDATE IPv6 TX PKT --------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    NetIPv6_TxPktValidate(p_buf_hdr,
+                          p_addr_src,
+                          p_addr_dest,
+                          traffic_class,
+                          flow_label,
+                          hop_lim,
+                          p_err);
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_IF_ERR_INVALID_IF:
+        case NET_IPv6_ERR_INVALID_LEN_DATA:
+        case NET_IPv6_ERR_INVALID_TOS:
+        case NET_IPv6_ERR_INVALID_FLAG:
+        case NET_IPv6_ERR_INVALID_HOP_LIMIT:
+        case NET_IPv6_ERR_INVALID_ADDR_SRC:
+        case NET_IPv6_ERR_INVALID_ADDR_DEST:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetIPv6_TxPktDiscard(p_buf, &err);
+            *p_err = NET_IPv6_ERR_TX_PKT;
+             return;
+    }
+#endif
+
+
+
+                                                                /* ------------------- TX IPv6 PKT -------------------- */
+    NetIPv6_TxPkt(p_buf,
+                  p_buf_hdr,
+                  p_addr_src,
+                  p_addr_dest,
+                  p_ext_hdr_list,
+                  traffic_class,
+                  flow_label,
+                  hop_lim,
+                  p_err);
+
+
+                                                                /* ----------------- UPDATE TX STATS ------------------ */
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IPv6.TxDgramCtr);
+            *p_err = NET_IPv6_ERR_NONE;
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxPktDisCtr);
+                                                                /* Rtn err from NetIPv6_TxPkt().                        */
+             return;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_IF_ERR_INVALID_IF:
+        case NET_IF_ERR_INVALID_CFG:
+        case NET_ERR_FAULT_NULL_FNCT:
+        case NET_IPv6_ERR_INVALID_LEN_HDR:
+        case NET_IPv6_ERR_INVALID_FRAG:
+        case NET_IPv6_ERR_INVALID_ADDR_HOST:
+        case NET_IPv6_ERR_TX_DEST_INVALID:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_BUF_ERR_INVALID_LEN:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_UTIL_ERR_NULL_SIZE:
+             NetIPv6_TxPktDiscard(p_buf, &err);
+            *p_err = NET_IPv6_ERR_TX_PKT;
+             return;
+
+
+        default:
+             NetIPv6_TxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetIPv6_ReTx()
+*
+* Description : (1) Prepare & re-transmit packets from transport protocol layers to network interface layer :
+*
+*                   (a) Validate  re-transmit packet
+*                   (b) Prepare & re-transmit packet datagram
+*                   (c) Update    re-transmit statistics
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to re-transmit IPv6 packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               IPv6 datagram(s) successfully re-transmitted
+*                                                                   to network interface layer.
+*
+*                                                               -- RETURNED BY NetIPv6_TxPktDiscard() : ---
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+*                                                               ----- RETURNED BY NetIPv6_ReTxPkt() : -----
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnReTxQ().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_ReTx (NET_BUF  *p_buf,
+                    NET_ERR  *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetIPv6_TxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+                                                                /* ------------- VALIDATE IPv6 RE-TX PKT -------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_buf_hdr->IP_HdrIx == NET_BUF_IX_NONE) {
+        NetIPv6_TxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxInvBufIxCtr);
+        return;
+    }
+#endif
+
+
+                                                                /* ------------------ RE-TX IPv6 PKT ------------------ */
+    NetIPv6_ReTxPkt(p_buf,
+                    p_buf_hdr,
+                    p_err);
+
+
+                                                                /* ---------------- UPDATE RE-TX STATS ---------------- */
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.IPv6.TxDgramCtr);
+            *p_err = NET_IPv6_ERR_NONE;
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #2.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxPktDisCtr);
+                                                                /* Rtn err from NetIPv6_ReTxPkt().                      */
+             return;
+
+
+        case NET_IPv6_ERR_INVALID_ADDR_HOST:
+        case NET_IPv6_ERR_TX_DEST_INVALID:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_UTIL_ERR_NULL_SIZE:
+        default:
+             NetIPv6_TxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetIPv6_GetTxDataIx()
+*
+* Description : Get the offset of a buffer at which the IPv6 data can be written.
+*
+* Argument(s) : if_nbr      Network interface number to transmit data.
+*
+*               data_len    IPv6 payload size.
+*
+*               mtu         MTU for the upper-layer protocol.
+*
+*               p_ix        Pointer to the current protocol index.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               No errors.
+*                               NET_IPv6_ERR_FAULT              Covers errors return by NetIF_GetTxDataIx().
+*                                                               See NetIF_GetTxDataIx() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_TxMsgReqHander(),
+*               NetICMPv6_GetTxDataIx(),
+*               NetTCP_GetTxDataIx(),
+*               NetUDP_GetTxDataIx().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_GetTxDataIx (NET_IF_NBR         if_nbr,
+                           NET_IPv6_EXT_HDR  *p_ext_hdr_list,
+                           CPU_INT32U         data_len,
+                           CPU_INT16U         mtu,
+                           CPU_INT16U        *p_ix,
+                           NET_ERR           *p_err)
+{
+    NET_IPv6_EXT_HDR  *p_ext_hdr;
+
+                                                                /* Add IPv6 min hdr len to current offset.              */
+   *p_ix += NET_IPv6_HDR_SIZE;
+
+#if 0
+    if (data_len > mtu) {
+       *p_ix += NET_IPv6_FRAG_HDR_SIZE;                         /* Add IPv6 frag ext   hdr len if frag is req'd.        */
+    }
+#endif
+                                                                /* Add Size of existing extension headers.              */
+    p_ext_hdr = p_ext_hdr_list;
+    while (p_ext_hdr != (NET_IPv6_EXT_HDR *)0) {
+       *p_ix      += p_ext_hdr->Len;
+        p_ext_hdr  = p_ext_hdr->NextHdrPtr;
+    }
+
+                                                                /* Add the lower-level hdr        offsets.              */
+    NetIF_TxIxDataGet(if_nbr, data_len, p_ix, p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+            *p_err = NET_IPv6_ERR_NONE;
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+        case NET_IF_ERR_INVALID_PROTOCOL:
+        default:
+            *p_err = NET_IPv6_ERR_FAULT;
+             break;
+    }
+
+    (void)&mtu;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_AddExtHdrToList()
+*
+* Description : Add an Extension Header object into its right place in the extension headers List.
+*
+* Argument(s) : p_ext_hdr_head  Pointer on the current top of the extension header list.
+*
+*               p_ext_hdr       Pointer to the extension header object to add to the list.
+*
+*               type            Type of the extension header.
+*
+*               len             Length of the extension header.
+*
+*               fnct            Pointer to callback function that will be call to fill the ext hdr.
+*
+*               sort_key        Key to sort the extension header.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               No error.
+*                               NET_IPv6_ERR_INVALID_EH         Invalid extension header to add.
+*
+* Return(s)   : Pointer to the new extension header list head.
+*
+* Caller(s)   : NetICMPv6_TxMsgReply(),
+*               NetICMPv6_TxMsgReqHandler(),
+*               NetMLDP_TxReport()
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_IPv6_EXT_HDR  *NetIPv6_ExtHdrAddToList(NET_IPv6_EXT_HDR   *p_ext_hdr_head,
+                                           NET_IPv6_EXT_HDR   *p_ext_hdr,
+                                           CPU_INT08U          type,
+                                           CPU_INT16U          len,
+                                           CPU_FNCT_PTR        fnct,
+                                           CPU_INT08U          sort_key,
+                                           NET_ERR            *p_err)
+{
+    NET_IPv6_EXT_HDR  *p_list_head;
+    NET_IPv6_EXT_HDR  *p_ext_hdr_prev;
+    NET_IPv6_EXT_HDR  *p_ext_hdr_next;
+    NET_IPv6_EXT_HDR  *p_ext_hdr_item;
+    NET_IPv6_EXT_HDR  *p_ext_hdr_cache;
+
+
+                                                                /* -------------- VALIDATE EXT HDR TYPE --------------- */
+    switch (sort_key) {
+        case NET_IPv6_EXT_HDR_KEY_HOP_BY_HOP:
+        case NET_IPv6_EXT_HDR_KEY_DEST_01:
+        case NET_IPv6_EXT_HDR_KEY_ROUTING:
+        case NET_IPv6_EXT_HDR_KEY_FRAG:
+             break;
+
+        case NET_IPv6_EXT_HDR_KEY_AUTH:
+        case NET_IPv6_EXT_HDR_KEY_ESP:
+        case NET_IPv6_EXT_HDR_KEY_DEST_02:
+            *p_err = NET_IPv6_ERR_INVALID_EH;
+             return (p_ext_hdr_head);
+    }
+
+
+                                                                /* --------------- SET EXT HEADER VALUES -------------- */
+    p_ext_hdr->Type    =         type;
+    p_ext_hdr->Len     =         len;
+    p_ext_hdr->SortKey =         sort_key;
+    p_ext_hdr->Fnct    = (void *)fnct;
+    p_ext_hdr->Arg     =         0;
+
+                                                                /* ----------- ADD EXT HDR TO LIST IN ORDER ----------- */
+    if (p_ext_hdr_head == (NET_IPv6_EXT_HDR *)0) {              /* List is empty, ...                                   */
+        p_ext_hdr->NextHdrPtr = (NET_IPv6_EXT_HDR *)0;          /* ... add ext hdr at top of list.                      */
+        p_ext_hdr->PrevHdrPtr = (NET_IPv6_EXT_HDR *)0;
+        p_list_head           = p_ext_hdr;
+    } else {
+
+        p_ext_hdr_item = p_ext_hdr_head;
+        while (p_ext_hdr_item != (NET_IPv6_EXT_HDR *)0) {       /* Goto the list to find the right place for the hdr:   */
+
+            if (p_ext_hdr_item->SortKey > sort_key) {
+                break;
+            } else if (p_ext_hdr_item->SortKey == sort_key) {   /* Ext hdr type is already in list...                   */
+               *p_err = NET_IPv6_ERR_INVALID_EH;                /* ... return with error.                               */
+                return (p_ext_hdr_head);
+            }
+
+            p_ext_hdr_cache = p_ext_hdr_item;
+            p_ext_hdr_item  = p_ext_hdr_item->NextHdrPtr;
+        }
+
+        if (p_ext_hdr_item == (NET_IPv6_EXT_HDR *)0) {          /* Add ext hdr blk to end of list.                      */
+
+            p_ext_hdr_item = p_ext_hdr_cache;
+            p_ext_hdr_item->NextHdrPtr = p_ext_hdr;
+            p_ext_hdr->PrevHdrPtr = p_ext_hdr_item;
+            p_ext_hdr->NextHdrPtr = (NET_IPv6_EXT_HDR *)0;
+            p_list_head = p_ext_hdr_head;
+
+        } else {                                                /* Add ext hdr blk inside the list.                     */
+
+            p_ext_hdr_prev = p_ext_hdr_item->PrevHdrPtr;
+            p_ext_hdr_next = p_ext_hdr_item;
+
+            if (p_ext_hdr_prev != (NET_IPv6_EXT_HDR *)0) {
+                p_ext_hdr_prev->NextHdrPtr = p_ext_hdr;
+                p_list_head                = p_ext_hdr_head;
+            } else {
+                p_list_head = p_ext_hdr;                        /* Set new list head if hdr blk is added at the top.    */
+            }
+            p_ext_hdr->PrevHdrPtr      = p_ext_hdr_prev;
+            p_ext_hdr->NextHdrPtr      = p_ext_hdr_next;
+            p_ext_hdr_next->PrevHdrPtr = p_ext_hdr;
+
+        }
+
+    }
+
+   *p_err = NET_IPv6_ERR_NONE;
+
+    return (p_list_head);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_PrepareFragHdr()
+*
+* Description : Callback function to fill up the fragment header inside the packet to be send.
+*
+* Argument(s) : p_ext_hdr_arg   Pointer to the function arguments.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_TxPktPrepareExtHdr().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_PrepareFragHdr(void  *p_ext_hdr_arg)
+{
+    NET_IPv6_FRAG_HDR          *p_frag_hdr;
+    NET_BUF                    *p_buf;
+    NET_IPv6_EXT_HDR_ARG_FRAG  *p_frag_hdr_arg;
+    CPU_INT16U                  frag_hdr_ix;
+
+
+    p_frag_hdr_arg = (NET_IPv6_EXT_HDR_ARG_FRAG *) p_ext_hdr_arg;
+
+    p_buf       = p_frag_hdr_arg->BufPtr;
+    frag_hdr_ix = p_frag_hdr_arg->BufIx;
+
+
+    p_frag_hdr = (NET_IPv6_FRAG_HDR *)&p_buf->DataPtr[frag_hdr_ix];
+
+    Mem_Clr(p_frag_hdr, NET_IPv6_FRAG_HDR_SIZE);
+
+    p_frag_hdr->NextHdr        = p_frag_hdr_arg->NextHdr;
+    p_frag_hdr->FragOffsetFlag = p_frag_hdr_arg->FragOffset;
+    p_frag_hdr->ID             = p_frag_hdr_arg->FragID;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                 NETWORK MANAGER INTERFACE FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_GetHostAddrProtocol()
+*
+* Description : Get an interface's IPv6 protocol address(s) [see Note #1].
+*
+* Argument(s) : if_nbr                      Interface number to get IPv6 protocol address(s).
+*
+*               p_addr_protocol_tbl         Pointer to a protocol address table that will receive the protocol
+*                                               address(s) in network-order for this interface.
+*
+*               p_addr_protocol_tbl_qty     Pointer to a variable to ... :
+*
+*                                               (a) Pass the size of the protocol address table, in number of
+*                                                       protocol address(s), pointed to by 'p_addr_protocol_tbl'.
+*                                               (b) (1) Return the actual number of IPv6 protocol address(s),
+*                                                           if NO error(s);
+*                                                   (2) Return 0, otherwise.
+*
+*                                           See also Note #1a.
+*
+*               p_addr_protocol_len         Pointer to a variable to ... :
+*
+*                                               (a) Pass the length of the protocol address table address(s),
+*                                                       in octets.
+*                                               (b) (1) Return the actual length of IPv6 protocol address(s),
+*                                                           in octets, if NO error(s);
+*                                                   (2) Return 0, otherwise.
+*
+*                                           See also Note #1b.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                   Interface's IPv6 protocol address(s)
+*                                                                       successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR               Argument(s) passed a NULL pointer.
+*                               NET_IPv6_ERR_INVALID_ADDR_LEN       Invalid protocol address length.
+*                               NET_IPv6_ERR_ADDR_TBL_SIZE          Invalid protocol address table size.
+*
+*                                                                   - RETURNED BY NetIPv6_GetAddrHostHandler() : -
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IP_ERR_ADDR_CFG_IN_PROGRESS     Interface in dynamic address configuration
+*                                                                       initialization state.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMgr_GetHostAddrProtocol().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) Since 'p_addr_protocol_tbl_qty' argument is both an input & output argument
+*                       (see 'Argument(s) : p_addr_protocol_tbl_qty'), ... :
+*
+*                       (1) Its input value SHOULD be validated prior to use; ...
+*
+*                           (A) In the case that the 'p_addr_protocol_tbl_qty' argument is passed a null
+*                               pointer, NO input value is validated or used.
+*
+*                           (B) The protocol address table's size MUST be greater than or equal to each
+*                               interface's maximum number of IPv6 protocol addresses times the size of
+*                               an IPv6 protocol address :
+*
+*                               (1) (p_addr_protocol_tbl_qty *  >=  [ NET_IPv6_CFG_IF_MAX_NBR_ADDR *
+*                                    p_addr_protocol_len    )         NET_IPv6_ADDR_SIZE      ]
+*
+*                       (2) While its output value MUST be initially configured to return a default value
+*                           PRIOR to all other validation or function handling in case of any error(s).
+*
+*                   (b) Since 'p_addr_protocol_len' argument is both an input & output argument
+*                       (see 'Argument(s) : p_addr_protocol_len'), ... :
+*
+*                       (1) Its input value SHOULD be validated prior to use; ...
+*
+*                           (A) In the case that the 'p_addr_protocol_len' argument is passed a null pointer,
+*                               NO input value is validated or used.
+*
+*                           (B) The table's protocol address(s) length SHOULD be greater than or equal to the
+*                               size of an IPv6 protocol address :
+*
+*                               (1) p_addr_protocol_len  >=  NET_IPv6_ADDR_SIZE
+*
+*                       (2) While its output value MUST be initially configured to return a default value
+*                           PRIOR to all other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+void  NetIPv6_GetHostAddrProtocol (NET_IF_NBR   if_nbr,
+                                   CPU_INT08U  *p_addr_protocol_tbl,
+                                   CPU_INT08U  *p_addr_protocol_tbl_qty,
+                                   CPU_INT08U  *p_addr_protocol_len,
+                                   NET_ERR     *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT16U         addr_protocol_tbl_size;
+    CPU_INT16U         addr_ip_tbl_size;
+    CPU_INT08U         addr_protocol_tbl_qty;
+    CPU_INT08U         addr_protocol_len;
+#endif
+    CPU_INT08U        *p_addr_protocol;
+    NET_IPv6_ADDR     *p_addr_ip;
+    NET_IPv6_ADDR      addr_ip_tbl[NET_IPv6_CFG_IF_MAX_NBR_ADDR];
+    NET_IP_ADDRS_QTY   addr_ip_tbl_qty;
+    NET_IP_ADDRS_QTY   addr_ix;
+    CPU_INT08U         addr_ip_len;
+
+
+                                                                    /* ---------- VALIDATE PROTOCOL ADDR TBL ---------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_protocol_tbl_qty == (CPU_INT08U *)0) {               /* See Note #1a1A.                                  */
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    addr_protocol_tbl_qty = *p_addr_protocol_tbl_qty;
+#endif
+   *p_addr_protocol_tbl_qty =  0u;                                   /* Cfg dflt tbl qty for err  (see Note #2a2).       */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_protocol_len == (CPU_INT08U *)0) {                    /* See Note #1b1A.                                  */
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+     addr_protocol_len = *p_addr_protocol_len;
+#endif
+   *p_addr_protocol_len =  0u;                                       /* Cfg dflt addr len for err (see Note #2b2).       */
+    addr_ip_len        =  NET_IPv6_ADDR_SIZE;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_protocol_tbl == (CPU_INT08U *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (addr_protocol_len < addr_ip_len) {                          /* Validate protocol addr len      (see Note #2b1B).*/
+       *p_err = NET_IPv6_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+
+    addr_protocol_tbl_size = addr_protocol_tbl_qty        * addr_protocol_len;
+    addr_ip_tbl_size       = NET_IPv6_CFG_IF_MAX_NBR_ADDR * addr_ip_len;
+    if (addr_protocol_tbl_size < addr_ip_tbl_size) {                /* Validate protocol addr tbl size (see Note #2a1B).*/
+       *p_err = NET_IPv6_ERR_ADDR_TBL_SIZE;
+        return;
+    }
+#endif
+
+
+                                                                    /* ----------- GET IPv6 PROTOCOL ADDRS ------------ */
+    addr_ip_tbl_qty = sizeof(addr_ip_tbl) / NET_IPv6_ADDR_SIZE;
+   (void)NetIPv6_GetAddrHostHandler(if_nbr,
+                                   &addr_ip_tbl[0],
+                                   &addr_ip_tbl_qty,
+                                    p_err);
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+        case NET_IPv6_ERR_ADDR_NONE_AVAIL:
+             break;
+
+
+        case NET_IF_ERR_INVALID_IF:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS:
+        case NET_IPv6_ERR_ADDR_TBL_SIZE:
+        default:
+             return;
+    }
+
+    addr_ix         =  0u;
+    p_addr_ip       = &addr_ip_tbl[addr_ix];
+    p_addr_protocol = &p_addr_protocol_tbl[addr_ix];
+    while (addr_ix <  addr_ip_tbl_qty) {                            /* Rtn all IPv6 protocol addr(s) ...                */
+        NET_UTIL_VAL_COPY_SET_NET_32(p_addr_protocol, p_addr_ip);   /* ... in net-order (see Note #1).                  */
+        p_addr_protocol += addr_ip_len;
+        p_addr_ip++;
+        addr_ix++;
+    }
+
+                                                                    /* Rtn nbr & len of IPv6 protocol addr(s).          */
+   *p_addr_protocol_tbl_qty = (CPU_INT08U)addr_ip_tbl_qty;
+   *p_addr_protocol_len     = (CPU_INT08U)addr_ip_len;
+
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv6_GetAddrProtocolIF_Nbr()
+*
+* Description : (1) Get the interface number for a host's IPv6 protocol address :
+*
+*                   (a) A configured IPv6 host address (on an enabled interface)
+*
+*
+* Argument(s) : p_addr_protocol     Pointer to protocol address (see Note #2).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               IPv6 protocol address's interface number
+*                                                                   successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_addr_protocol' passed a NULL
+*                                                                   pointer.
+*                               NET_IPv6_ERR_INVALID_ADDR_LEN   Invalid IPv6 protocol address length.
+*                               NET_IPv6_ERR_INVALID_ADDR_HOST  IPv6 protocol address NOT used by host.
+*
+* Return(s)   : Interface number for IPv6 protocol address, if configured on this host.
+*
+*               Interface number of  IPv6 protocol address
+*                   in address initialization,              if available.
+*
+*               NET_IF_NBR_LOCAL_HOST,                      for a localhost address.
+*
+*               NET_IF_NBR_NONE,                            otherwise.
+*
+* Caller(s)   : NetMgr_GetHostAddrProtocolIF_Nbr().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_IF_NBR  NetIPv6_GetAddrProtocolIF_Nbr (CPU_INT08U  *p_addr_protocol,
+                                           CPU_INT08U   addr_protocol_len,
+                                           NET_ERR     *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT08U     addr_ip_len;
+#endif
+    NET_IPv6_ADDR  addr_ip;
+    NET_IF_NBR     if_nbr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE PROTOCOL ADDR ------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (NET_IF_NBR_NONE);
+    }
+
+    addr_ip_len = NET_IPv6_ADDR_SIZE;
+    if (addr_protocol_len != addr_ip_len) {
+       *p_err =  NET_IPv6_ERR_INVALID_ADDR_LEN;
+        return (NET_IF_NBR_NONE);
+    }
+#else
+   (void)&addr_protocol_len;                                        /* Prevent 'variable unused' compiler warning.      */
+#endif
+
+                                                                    /* ------- GET IPv6 PROTOCOL ADDR's IF NBR -------- */
+    NET_UTIL_VAL_COPY_GET_NET_32(&addr_ip, p_addr_protocol);
+    if_nbr =  NetIPv6_GetAddrHostIF_Nbr(&addr_ip);
+   *p_err   = (if_nbr != NET_IF_NBR_NONE) ? NET_IPv6_ERR_NONE
+                                         : NET_IPv6_ERR_INVALID_ADDR_HOST;
+
+    return (if_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_IsValidAddrProtocol()
+*
+* Description : Validate an IPv6 protocol address.
+*
+* Argument(s) : p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+* Return(s)   : DEF_YES, if IPv6 protocol address valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetMgr_IsValidAddrProtocol().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) IPv6 protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsValidAddrProtocol (CPU_INT08U  *p_addr_protocol,
+                                          CPU_INT08U   addr_protocol_len)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT08U     addr_ip_len;
+#endif
+    NET_IPv6_ADDR  addr_ip;
+    CPU_BOOLEAN    valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE PROTOCOL ADDR ------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+        return (DEF_NO);
+    }
+
+    addr_ip_len = NET_IPv6_ADDR_SIZE;
+    if (addr_protocol_len != addr_ip_len) {
+        return (DEF_NO);
+    }
+#else
+   (void)&addr_protocol_len;                                        /* Prevent 'variable unused' compiler warning.      */
+#endif
+
+                                                                    /* --------- VALIDATE IPv6 PROTOCOL ADDR ---------- */
+    NET_UTIL_VAL_COPY_GET_NET_32(&addr_ip, p_addr_protocol);
+    valid = NetIPv6_IsValidAddrHost(&addr_ip);
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv6_IsAddrInit()
+*
+* Description : Validate an IPv6 protocol address as the initialization address.
+*
+* Argument(s) : p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+* Return(s)   : DEF_YES, if IPv6 protocol address is the initialization address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetMgr_IsAddrProtocolInit().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetIPv6_IsAddrInit (CPU_INT08U  *p_addr_protocol,
+                                 CPU_INT08U   addr_protocol_len)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT08U     addr_ip_len;
+#endif
+    CPU_BOOLEAN    addr_init;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE PROTOCOL ADDR ------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+        return (DEF_NO);
+    }
+
+    addr_ip_len = NET_IPv6_ADDR_SIZE;
+    if (addr_protocol_len != addr_ip_len) {
+        return (DEF_NO);
+    }
+#else
+   (void)&addr_protocol_len;                                        /* Prevent 'variable unused' compiler warning.      */
+#endif
+
+                                                                    /* ------- VALIDATE IPv6 PROTOCOL INIT ADDR ------- */
+    addr_init = NetIPv6_IsAddrUnspecified((NET_IPv6_ADDR *)p_addr_protocol);
+
+    return (addr_init);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetIPv6_IsAddrProtocolMulticast()
+*
+* Description : Validate an IPv6 protocol address as a multicast address.
+*
+* Argument(s) : p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+* Return(s)   : DEF_YES, if IPv6 protocol address is a multicast address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetMgr_IsAddrProtocolMulticast().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_MCAST_MODULE_EN
+CPU_BOOLEAN  NetIPv6_IsAddrProtocolMulticast (CPU_INT08U  *p_addr_protocol,
+                                              CPU_INT08U   addr_protocol_len)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT08U     addr_ip_len;
+#endif
+    NET_IPv6_ADDR  addr_ip;
+    CPU_BOOLEAN    addr_multicast;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE PROTOCOL ADDR ------------ */
+    if (p_addr_protocol == (CPU_INT08U *)0) {
+        return (DEF_NO);
+    }
+
+    addr_ip_len = NET_IPv6_ADDR_SIZE;
+    if (addr_protocol_len != addr_ip_len) {
+        return (DEF_NO);
+    }
+#else
+   (void)&addr_protocol_len;                                        /* Prevent 'variable unused' compiler warning.      */
+#endif
+
+                                                                    /* ------- VALIDATE IPv6 PROTOCOL INIT ADDR ------- */
+    Mem_Copy(&addr_ip,
+              p_addr_protocol,
+              NET_IPv6_ADDR_SIZE);
+    addr_multicast = NetIPv6_IsAddrMcast(&addr_ip);
+
+    return (addr_multicast);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_AddrValidLifetimeTimeout()
+*
+* Description : Remove IPv6 address from address list when valid lifetime comes to an end.
+*
+* Argument(s) : p_ipv6_addr_timeout  Pointer to ipv6 addrs object that has timed out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in : NetIPv6_CfgAddrAddHandler.
+*               Referenced in : NetNDP_RxPrefixAddrsUpdate.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrValidLifetimeTimeout (void  *p_ipv6_addr_timeout)
+{
+    NET_IPv6_ADDRS   *p_ipv6_addrs;
+    NET_IPv6_IF_CFG  *p_ipv6_if_cfg;
+
+    p_ipv6_addrs  = (NET_IPv6_ADDRS *) p_ipv6_addr_timeout;
+    p_ipv6_if_cfg = &NetIPv6_IF_CfgTbl[p_ipv6_addrs->IfNbr];
+
+    p_ipv6_addrs->AddrState = NET_IPv6_ADDR_STATE_NONE;
+    p_ipv6_addrs->IsValid   = DEF_NO;
+
+    p_ipv6_addrs->ValidLifetimeTmrPtr = DEF_NULL;
+
+    Mem_Clr(&p_ipv6_addrs->AddrHost, NET_IPv6_ADDR_SIZE);
+
+    p_ipv6_if_cfg->AddrsNbrCfgd--;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_AddrPrefLifetimeTimeout()
+*
+* Description : Set the IPv6 address has being deprecated when preferred lifetime comes to an end.
+*
+* Argument(s) : p_ipv6_addr_timeout  Pointer to ipv6 addrs object that has timed out.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in : NetIPv6_CfgAddrAddHandler.
+*               Referenced in : NetNDP_RxPrefixAddrsUpdate.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIPv6_AddrPrefLifetimeTimeout (void  *p_ipv6_addr_timeout)
+{
+    NET_IPv6_ADDRS   *p_ipv6_addrs;
+
+
+    p_ipv6_addrs  = (NET_IPv6_ADDRS *) p_ipv6_addr_timeout;
+
+    p_ipv6_addrs->AddrState = NET_IPv6_ADDR_STATE_DEPRECATED;
+    p_ipv6_addrs->IsValid   = DEF_YES;
+
+    p_ipv6_addrs->PrefLifetimeTmrPtr = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv6_AddrAutoCfgComp()
+*
+* Description : (1) Complete the IPv6 Auto-Configuration process.
+*
+*                   (a) Update IPv6 Auto-Configuration object for given interface.
+*                   (b) Call Application Hook function.
+*
+*
+* Argument(s) : if_nbr           Network interface number on which address auto-configuration occurred.
+*
+*               auto_cfg_status  Status of the IPv6 Auto-Configuration process.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetIPv6_AddrAutoCfgHandler(),
+*               NetIPv6_AddrAutoCfgDAD_Result(),
+*               NetNDP_RxPrefixUpdate().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetIPv6_AddrAutoCfgComp() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+void  NetIPv6_AddrAutoCfgComp (NET_IF_NBR                 if_nbr,
+                               NET_IPv6_AUTO_CFG_STATUS   auto_cfg_status)
+{
+    NET_IPv6_AUTO_CFG_OBJ         *p_auto_obj;
+    NET_IPv6_AUTO_CFG_HOOK_FNCT    fnct;
+    NET_IPv6_AUTO_CFG_STATE        state;
+    CPU_BOOLEAN                    enabled;
+
+
+    p_auto_obj = NetIPv6_AutoCfgObjTbl[if_nbr];
+
+    state      = p_auto_obj->State;
+    enabled    = p_auto_obj->En;
+
+    fnct       = NetIPv6_AutoCfgHookFnct;
+
+    if ((state == NET_IPv6_AUTO_CFG_STATE_STARTED_LOCAL)  ||
+        (state == NET_IPv6_AUTO_CFG_STATE_STARTED_GLOBAL)) {
+
+        p_auto_obj->State = NET_IPv6_AUTO_CFG_STATE_NONE;
+
+        if ((enabled == DEF_YES) &&
+            (fnct   != DEF_NULL)) {
+             fnct(if_nbr, p_auto_obj->AddrLocalPtr, p_auto_obj->AddrGlobalPtr, auto_cfg_status);
+        }
+    }
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_GetAddrAutoCfgObj()
+*
+* Description : Recover the IPv6 Auto-Configuration object for the given interface number.
+*
+* Argument(s) : if_nbr      Network interface number where the Auto-configuration is taken place.
+*
+* Return(s)   : Pointer to the IPv6 Auto-Configuration object for the given Interface.
+*
+* Caller(s)   : NetNDP_RxPrefixUpdate().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_GetAddrAutoCfgObj() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+NET_IPv6_AUTO_CFG_OBJ  *NetIPv6_GetAddrAutoCfgObj(NET_IF_NBR  if_nbr)
+{
+    NET_IPv6_AUTO_CFG_OBJ  *p_obj;
+
+
+    p_obj = NetIPv6_AutoCfgObjTbl[if_nbr];
+
+    return (p_obj);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_AddrAutoCfgHandler()
+*
+* Description : (1) Perform IPv6 Stateless Address Auto-Configuration:
+*
+*                   (a) Create link-local address.
+*                   (b) Add link-local address to the interface.
+*                   (c) If link-local configuration failed, restart with random address.
+*                   (d) Start global address configuration.
+*
+* Argument(s) : if_nbr      Network interface number to perform address auto-configuration.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                       Address auto-configuration successful.
+*                               NET_IPv6_ERR_AUTO_CFG_STARTED           Address auto-configuration already started on IF.
+*
+*                               ----------- RETURNED BY NetIPv6_CreateIF_ID() : ------------
+*                               See NetIPv6_CreateIF_ID() for additional return error codes.
+*
+*                               ----------- RETURNED BY NetIPv6_CreateAddrFromID() : ------------
+*                               See NetIPv6_CreateAddrFromID() for additional return error codes.
+*
+*                               ----------- RETURNED BY NetIPv6_CfgAddrAddHandler() : -------------
+*                               See NetIPv6_CfgAddrAddHandler() for additional return error codes.
+*
+*                               ----------- RETURNED BY NetIPv6_CfgAddrRand() : ------------
+*                               See NetIPv6_CfgAddrRand() for additional return error codes.
+*
+*                               ----------- RETURNED BY NetIPv6_CfgAddrGlobal() : ------------
+*                               See NetIPv6_CfgAddrGlobal() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_AddrAutoCfgEn(),
+*               NetIPv6_LinkStateSubscriber().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetIPv6_AddrAutoCfgHandler() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*
+*               (2) RFC #4862 , Section 4 states that "Auto-configuration is performed only on
+*                   multicast-capable links and begins when a multicast-capable interface is enabled,
+*                   e.g., during system startup".
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+static  void  NetIPv6_AddrAutoCfgHandler (NET_IF_NBR   if_nbr,
+                                          NET_ERR     *p_err)
+{
+    NET_IPv6_AUTO_CFG_OBJ    *p_obj;
+    NET_IPv6_ADDRS           *p_addrs;
+    NET_IPv6_ADDR            *p_addr_cfgd;
+    NET_IPv6_ADDR             ipv6_id;
+    NET_IPv6_ADDR             ipv6_addr;
+    NET_IPv6_AUTO_CFG_STATE   state;
+    NET_IPv6_AUTO_CFG_STATUS  status;
+    CPU_BOOLEAN               dad_en;
+
+
+                                                                /* --------- ADVERTISE AUTOCONFIG AS STARTED ---------- */
+    p_obj = NetIPv6_AutoCfgObjTbl[if_nbr];
+
+    state = p_obj->State;
+    if ((state == NET_IPv6_AUTO_CFG_STATE_STARTED_LOCAL)  ||
+        (state == NET_IPv6_AUTO_CFG_STATE_STARTED_GLOBAL)) {
+        *p_err  = NET_IPv6_ERR_AUTO_CFG_STARTED;
+         goto exit;
+    }
+
+    p_obj->State = NET_IPv6_AUTO_CFG_STATE_STARTED_LOCAL;
+
+                                                                /* Notify with hook that aut-cfg has started.           */
+    NetIPv6_AddrAutoCfgComp(if_nbr, NET_IPv6_AUTO_CFG_STATUS_STARTED);
+    p_obj->State = NET_IPv6_AUTO_CFG_STATE_STARTED_LOCAL;
+
+                                                                /* ------------- SET DAD ENABLE VARIABLE -------------- */
+    dad_en = p_obj->DAD_En;
+
+                                                                /* -------------- CREATE LINK-LOCAL ADDR -------------- */
+    (void)NetIPv6_CreateIF_ID(if_nbr,                           /* Create IF ID from HW mac addr.                       */
+                             &ipv6_id,
+                              NET_IPv6_ADDR_AUTO_CFG_ID_IEEE_48,
+                              p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+         p_obj->AddrLocalPtr  = DEF_NULL;
+         p_obj->AddrGlobalPtr = DEF_NULL;
+         status               = NET_IPv6_AUTO_CFG_STATUS_FAILED;
+         goto exit_comp;
+    }
+
+    NetIPv6_CreateAddrFromID(&ipv6_id,                          /* Create link-local IPv6 addr from IF ID.              */
+                             &ipv6_addr,
+                              NET_IPv6_ADDR_PREFIX_LINK_LOCAL,
+                              NET_IPv6_ADDR_PREFIX_LINK_LOCAL_LEN,
+                              p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+         p_obj->AddrLocalPtr  = DEF_NULL;
+         p_obj->AddrGlobalPtr = DEF_NULL;
+         status               = NET_IPv6_AUTO_CFG_STATUS_FAILED;
+         goto exit_comp;
+    }
+
+                                                                /* ------------- ADD ADDRESS TO INTERFACE ------------- */
+    p_addrs = NetIPv6_CfgAddrAddHandler(if_nbr,
+                                       &ipv6_addr,
+                                        NET_IPv6_ADDR_PREFIX_LINK_LOCAL_LEN,
+                                        0,
+                                        0,
+                                        NET_IPv6_ADDR_CFG_MODE_AUTO,
+                                        dad_en,
+                                        NET_IPv6_ADDR_CFG_TYPE_AUTO_CFG_NO_BLOCKING,
+                                        p_err);
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+        case NET_ERR_FAULT_FEATURE_DIS:
+             p_obj->AddrLocalPtr = &p_addrs->AddrHost;
+             dad_en              =  DEF_NO;
+                                                                /* Continue autoconfig with global addr cfg.            */
+             NetIPv6_CfgAddrGlobal(if_nbr,
+                                  &ipv6_addr,
+                                   dad_en,
+                                   p_err);
+             switch (*p_err) {
+                 case NET_IPv6_ERR_NONE:
+                      goto exit;
+
+                 case NET_IPv6_ERR_ROUTER_ADV_SIGNAL_TIMEOUT:
+                      p_obj->AddrGlobalPtr = DEF_NULL;
+                      status               = NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL;
+                     *p_err                = NET_IPv6_ERR_NONE;
+                      goto exit_comp;
+
+                 default:
+                     p_obj->AddrGlobalPtr = DEF_NULL;
+                     status               = NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL;
+                     goto exit;
+             }
+             break;
+
+
+        case NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS:
+            *p_err = NET_IPv6_ERR_NONE;
+             goto exit;                                         /* Callback function will continue auto-config.         */
+
+
+        case NET_IPv6_ERR_ADDR_CFG_DUPLICATED:
+                                                                /* Restart autoconfig with random address.              */
+             p_addr_cfgd = NetIPv6_CfgAddrRand(if_nbr,
+                                              &ipv6_id,
+                                               dad_en,
+                                               p_err);
+             switch (*p_err) {
+                 case NET_IPv6_ERR_NONE:
+                 case NET_ERR_FAULT_FEATURE_DIS:
+                      p_obj->AddrLocalPtr = p_addr_cfgd;
+                      dad_en              = DEF_NO;
+                                                                /* Continue autoconfig with global addr cfg.            */
+                      NetIPv6_CfgAddrGlobal(if_nbr,
+                                           &ipv6_addr,
+                                            dad_en,
+                                            p_err);
+                      switch (*p_err) {
+                          case NET_IPv6_ERR_NONE:
+                               goto exit;
+
+                          case NET_IPv6_ERR_ROUTER_ADV_SIGNAL_TIMEOUT:
+                               p_obj->AddrGlobalPtr = DEF_NULL;
+                               status               = NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL;
+                              *p_err                = NET_IPv6_ERR_NONE;
+                               goto exit_comp;
+
+                          default:
+                              p_obj->AddrGlobalPtr = DEF_NULL;
+                              status               = NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL;
+                              goto exit_comp;
+
+                      }
+                      break;
+
+
+                 case NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS:
+                     *p_err = NET_IPv6_ERR_NONE;
+                      goto exit;                                /* Callback function will continue autoconfig.          */
+
+
+                 case NET_IPv6_ERR_ADDR_CFG_DUPLICATED:
+                 default:
+                      p_obj->AddrLocalPtr  = DEF_NULL;
+                      p_obj->AddrGlobalPtr = DEF_NULL;
+                      status               = NET_IPv6_AUTO_CFG_STATUS_FAILED;
+                      goto exit_comp;
+             }
+             break;
+
+
+         default:
+             p_obj->AddrLocalPtr  = DEF_NULL;
+             p_obj->AddrGlobalPtr = DEF_NULL;
+             status               = NET_IPv6_AUTO_CFG_STATUS_FAILED;
+             goto exit_comp;
+    }
+
+exit_comp:
+    NetIPv6_AddrAutoCfgComp(if_nbr, status);
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         NetIPv6_CfgAddrRand()
+*
+* Description : Create Random Link-Local address and start address configuration.
+*
+* Argument(s) : if_nbr      Network interface number to perform address auto-configuration.
+*
+*               p_ipv6_id   Pointer to IPv6 address Interface ID.
+*
+*               dad_en      DEF_YES, Do the Duplication Address Detection (DAD)
+*                           DEF_NO , otherwise
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               ----------- RETURNED BY NetIPv6_CreateAddrFromID() : ------------
+*                               See NetIPv6_CreateAddrFromID() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetIPv6_AddrAutoCfgHandler(),
+*               NetIPv6_AddrAutoCfgDAD_Result().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+static  NET_IPv6_ADDR  *NetIPv6_CfgAddrRand (NET_IF_NBR      if_nbr,
+                                             NET_IPv6_ADDR  *p_ipv6_id,
+                                             CPU_BOOLEAN     dad_en,
+                                             NET_ERR        *p_err)
+{
+    NET_IPv6_ADDRS  *p_ipv6_addrs;
+    NET_IPv6_ADDR   *p_addr_return;
+    NET_IPv6_ADDR    ipv6_addr;
+    RAND_NBR         rand_nbr;
+    CPU_INT08U      *p_addr_08;
+    CPU_INT08U       retry_cnt;
+    CPU_INT32U       ix;
+
+
+    rand_nbr = ((p_ipv6_id->Addr[ 3] << 24) | (p_ipv6_id->Addr[ 2] << 16) | (p_ipv6_id->Addr[ 1] <<  8) | (p_ipv6_id->Addr[ 0])) ^
+               ((p_ipv6_id->Addr[ 7] << 24) | (p_ipv6_id->Addr[ 6] << 16) | (p_ipv6_id->Addr[ 5] <<  8) | (p_ipv6_id->Addr[ 4])) ^
+               ((p_ipv6_id->Addr[11] << 24) | (p_ipv6_id->Addr[10] << 16) | (p_ipv6_id->Addr[ 9] <<  8) | (p_ipv6_id->Addr[ 8])) ^
+               ((p_ipv6_id->Addr[15] << 24) | (p_ipv6_id->Addr[14] << 16) | (p_ipv6_id->Addr[13] <<  8) | (p_ipv6_id->Addr[12]));
+
+    Math_RandSetSeed(rand_nbr);
+
+    retry_cnt = 0;
+
+    while ((*p_err    != NET_IPv6_ERR_NONE)                  &&
+           (*p_err    != NET_ERR_FAULT_FEATURE_DIS)          &&
+           (*p_err    != NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS)  &&
+           ( retry_cnt < NET_IPv6_AUTO_CFG_RAND_RETRY_MAX)) {
+                                                                /* Generate a new ID from a random src.                 */
+        rand_nbr  = Math_Rand();
+        ix        = NET_IPv6_ADDR_PREFIX_LINK_LOCAL_LEN / 8u;
+        p_addr_08 = (CPU_INT08U *)&p_ipv6_id->Addr[ix];
+
+        while (ix < NET_IPv6_ADDR_SIZE) {
+           *p_addr_08 ^= (CPU_INT08U)rand_nbr;                  /* Bitwise XOR each byte of the ID with the random nbr. */
+            p_addr_08++;
+            ix++;
+        }
+
+        NetIPv6_CreateAddrFromID(p_ipv6_id,                     /* Create link-local IPv6 addr from IF ID.              */
+                                &ipv6_addr,
+                                 NET_IPv6_ADDR_PREFIX_LINK_LOCAL,
+                                 NET_IPv6_ADDR_PREFIX_LINK_LOCAL_LEN,
+                                 p_err);
+        if (*p_err != NET_IPv6_ERR_NONE) {
+            p_addr_return = DEF_NULL;
+            goto exit;
+        }
+
+                                                                /* ------------- ADD ADDRESS TO INTERFACE ------------- */
+        (void)NetIPv6_CfgAddrAddHandler(if_nbr,
+                                       &ipv6_addr,
+                                        NET_IPv6_ADDR_PREFIX_LINK_LOCAL_LEN,
+                                        0,
+                                        0,
+                                        NET_IPv6_ADDR_CFG_STATE_AUTO_CFGD,
+                                        dad_en,
+                                        NET_IPv6_ADDR_CFG_TYPE_AUTO_CFG_NO_BLOCKING,
+                                        p_err);
+
+        retry_cnt++;
+    }
+
+    if (retry_cnt == NET_IPv6_AUTO_CFG_RAND_RETRY_MAX) {
+        p_addr_return = DEF_NULL;
+        goto exit;
+    }
+
+    p_ipv6_addrs  =  NetIPv6_GetAddrsHostOnIF(if_nbr, &ipv6_addr);
+    if (p_ipv6_addrs == DEF_NULL) {
+        p_addr_return = DEF_NULL;
+       *p_err = NET_IPv6_ERR_ADDR_NOT_FOUND;
+        goto exit;
+    }
+
+    p_addr_return = &p_ipv6_addrs->AddrHost;
+
+exit:
+    return (p_addr_return);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv6_CfgAddrGlobal()
+*
+* Description : (1) Start IPv6 global address configuration:
+*                   (a) Create Signal to be advertise of Router Advertisement reception.
+*                   (b) Send Router Solicitation.
+*                   (c) Wait for a received Router Advertisement.
+*
+*
+* Argument(s) : if_nbr          Network interface number to perform address auto-configuration.
+*
+*               p_ipv6_addr     Pointer to IPv6 link-local address that was configured.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Started global addr cfg successfully.
+*                               NET_ERR_FAULT_MEM_ALLOC         Memory allocation error.
+*                               NET_IPv6_ERR_SIGNAL_CREATE      Rx RA Signal creation error.
+*                               NET_IPv6_ERR_ADDR_CFG           Global addr cfg faulted.
+*                               NET_IPv6_ERR_RX_RA_TIMEOUT      Pending on Rx RA signal timed out.
+*                               NET_IPv6_ERR_SIGNAL_FAULT       Pending on Rx RA signal faulted.
+*
+*                               ------------ RETURNED BY Net_GlobalLockAcquire() -------------
+*                               See Net_GlobalLockAcquire() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetIPv6_AddrAutoCfgHandler(),
+*               NetIPv6_AddrAutoCfgDAD_Result().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+static void  NetIPv6_CfgAddrGlobal (NET_IF_NBR      if_nbr,
+                                    NET_IPv6_ADDR  *p_ipv6_addr,
+                                    CPU_BOOLEAN     dad_en,
+                                    NET_ERR        *p_err)
+{
+    NET_IPv6_AUTO_CFG_OBJ  *p_obj;
+    KAL_SEM_HANDLE         *p_signal;
+    CPU_INT08U              retry_cnt;
+    CPU_BOOLEAN             done;
+    NET_ERR                 err_net;
+    CPU_SR_ALLOC();
+
+
+    p_obj = NetIPv6_AutoCfgObjTbl[if_nbr];
+    CPU_CRITICAL_ENTER();
+    p_obj->State = NET_IPv6_AUTO_CFG_STATE_STARTED_GLOBAL;
+    CPU_CRITICAL_EXIT();
+
+                                                                /* ----------------- INIT RX RA SIGNAL ---------------- */
+    p_signal = NetNDP_RouterAdvSignalCreate(if_nbr, p_err);
+    if (*p_err != NET_NDP_ERR_NONE) {
+        *p_err = NET_IPv6_ERR_ADDR_CFG;
+         goto exit;
+    }
+
+    retry_cnt = 0;
+    done      = DEF_NO;
+    while ((done      != DEF_YES)                 &&
+           (retry_cnt  < NET_NDP_TX_ROUTER_SOL_RETRY_MAX)) {
+                                                                /* -------------- TX ROUTER SOLICIT MSG --------------- */
+        NetNDP_TxRouterSolicitation(if_nbr,
+                                    p_ipv6_addr,
+                                    p_err);
+        if (*p_err != NET_NDP_ERR_NONE) {
+            *p_err = NET_IPv6_ERR_ADDR_CFG;
+             goto exit_del_signal;
+        }
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+        Net_GlobalLockRelease();
+
+                                                                /* ---------- WAIT FOR RX ROUTER ADV SIGNAL ----------- */
+        NetNDP_RouterAdvSignalPend(p_signal, p_err);
+        switch (*p_err) {
+           case NET_NDP_ERR_NONE:
+                done  = DEF_YES;
+               *p_err = NET_IPv6_ERR_NONE;
+                break;
+
+
+           case NET_NDP_ERR_ROUTER_ADV_SIGNAL_TIMEOUT:
+               *p_err = NET_IPv6_ERR_ROUTER_ADV_SIGNAL_TIMEOUT;
+                break;
+
+
+           default:
+               *p_err = NET_IPv6_ERR_ADDR_CFG;
+                goto exit_lock_acquire;
+        }
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+        Net_GlobalLockAcquire((void *)&NetIPv6_CfgAddrGlobal, &err_net);
+        if (err_net != NET_ERR_NONE) {
+           *p_err = err_net;
+            goto exit_del_signal;
+        }
+
+        retry_cnt++;
+    }
+
+
+   (void)&dad_en;
+
+    goto exit_del_signal;
+
+
+exit_lock_acquire:
+    Net_GlobalLockAcquire((void *)&NetIPv6_CfgAddrGlobal, &err_net);
+
+exit_del_signal:
+    NetNDP_RouterAdvSignalRemove(p_signal);
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_AddrAutoCfgDAD_Result()
+*
+* Description : IPv6 Auto-configuration callback function when DAD is enabled to continue auto-configuration
+*               process.
+*
+* Argument(s) : if_nbr      Network Interface number on which DAD is occurring.
+*
+*               p_dad_obj   Pointer to current DAD object.
+*
+*               status      Status of the DAD process.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Referenced in NetNDP_DAD_Start().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (defined(NET_IPv6_ADDR_AUTO_CFG_MODULE_EN) && \
+    (defined(NET_DAD_MODULE_EN))                      )
+static  void  NetIPv6_AddrAutoCfgDAD_Result (NET_IF_NBR                 if_nbr,
+                                             NET_DAD_OBJ               *p_dad_obj,
+                                             NET_IPv6_ADDR_CFG_STATUS   status)
+{
+    NET_IPv6_AUTO_CFG_OBJ     *p_auto_cfg_obj;
+    NET_IPv6_ADDRS            *p_ipv6_addrs;
+    NET_IPv6_ADDR             *p_ipv6_addr;
+    NET_IPv6_AUTO_CFG_STATUS   auto_cfg_result;
+    CPU_BOOLEAN                local_addr;
+    NET_ERR                    err_net;
+
+
+    p_auto_cfg_obj = NetIPv6_AutoCfgObjTbl[if_nbr];
+
+    p_ipv6_addr  = &p_dad_obj->Addr;
+
+    p_ipv6_addrs = NetIPv6_GetAddrsHostOnIF(if_nbr, p_ipv6_addr);/* Recover IPv6 addrs object.                          */
+    if (p_ipv6_addrs == DEF_NULL) {
+        p_auto_cfg_obj->AddrLocalPtr  = DEF_NULL;
+        p_auto_cfg_obj->AddrGlobalPtr = DEF_NULL;
+        auto_cfg_result               = NET_IPv6_AUTO_CFG_STATUS_FAILED;
+        NetDAD_Stop(if_nbr, p_dad_obj);
+        goto exit_comp;
+    }
+
+    NetDAD_Stop(if_nbr, p_dad_obj);                             /* Stop current DAD process.                            */
+
+    p_ipv6_addr = &p_ipv6_addrs->AddrHost;
+
+    local_addr  = NetIPv6_IsAddrLinkLocal(p_ipv6_addr);
+
+    if (local_addr == DEF_YES) {                                /* Cfg of link-local addr has finished.                 */
+
+        if (status != NET_IPv6_ADDR_CFG_STATUS_SUCCEED) {
+
+            NetIPv6_CfgAddrRand(if_nbr,
+                                p_ipv6_addr,
+                                DEF_YES,
+                               &err_net);
+            if ((err_net != NET_IPv6_ERR_NONE)                &&
+                (err_net != NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS)) {
+                 p_auto_cfg_obj->AddrLocalPtr  = DEF_NULL;
+                 p_auto_cfg_obj->AddrGlobalPtr = DEF_NULL;
+                 auto_cfg_result               = NET_IPv6_AUTO_CFG_STATUS_FAILED;
+                 goto exit_comp;
+            }
+
+            goto exit;
+
+        } else {
+
+            p_auto_cfg_obj->AddrLocalPtr = p_ipv6_addr;
+
+            NetIPv6_CfgAddrGlobal(if_nbr,
+                                  p_ipv6_addr,
+                                  DEF_YES,
+                                 &err_net);
+            if (err_net != NET_IPv6_ERR_NONE) {
+                p_auto_cfg_obj->AddrGlobalPtr = DEF_NULL;
+                auto_cfg_result               = NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL;
+                goto exit_comp;
+            }
+
+            goto exit;
+
+        }
+    } else {                                                    /* Cfg of global addr has finished.                     */
+
+        if (status != NET_IPv6_ADDR_CFG_STATUS_SUCCEED) {
+            p_auto_cfg_obj->AddrGlobalPtr = DEF_NULL;
+            auto_cfg_result               = NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL;
+            goto exit_comp;
+        } else {
+            p_auto_cfg_obj->AddrGlobalPtr = p_ipv6_addr;
+            auto_cfg_result               = NET_IPv6_AUTO_CFG_STATUS_SUCCEEDED;
+            goto exit_comp;
+        }
+    }
+
+
+exit_comp:
+    NetIPv6_AddrAutoCfgComp(if_nbr, auto_cfg_result);
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_CfgAddrAddDAD_Result()
+*
+* Description : Hook function call after IPv6 static address configuration with DAD enabled to release DAD
+*               object.
+*
+* Argument(s) : if_nbr      Interface number on which DAD is occurring.
+*
+*               p_dad_obj   Pointer to current DAD object.
+*
+*               status      Status of the DAD process.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Referenced in NetNDP_DAD_Start().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef NET_DAD_MODULE_EN
+static  void  NetIPv6_CfgAddrAddDAD_Result (NET_IF_NBR                 if_nbr,
+                                            NET_DAD_OBJ               *p_dad_obj,
+                                            NET_IPv6_ADDR_CFG_STATUS   status)
+{
+    NET_IPv6_ADDRS               *p_ipv6_addrs;
+    NET_IPv6_ADDR                *p_ipv6_addr;
+    NET_IPv6_ADDR                *p_addr_return;
+    NET_IPv6_ADDR_HOOK_FNCT       fnct;
+    NET_IPv6_ADDR_CFG_STATUS      status_return;
+
+
+    p_ipv6_addr = &p_dad_obj->Addr;
+
+    fnct = NetIPv6_AddrCfgHookFnct;
+
+    p_ipv6_addrs = NetIPv6_GetAddrsHostOnIF(if_nbr, p_ipv6_addr);
+    if (p_ipv6_addrs == DEF_NULL) {
+        p_addr_return = DEF_NULL;
+        status_return = NET_IPv6_ADDR_CFG_STATUS_FAIL;
+    } else {
+        p_addr_return = &p_ipv6_addrs->AddrHost;
+        status_return =  status;
+    }
+
+    if (fnct != DEF_NULL) {
+        fnct(if_nbr, p_addr_return, status_return);
+    }
+
+    NetDAD_Stop(if_nbr, p_dad_obj);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         NetIPv6_AddrSrcSel()
+*
+* Description : Select the best Source address for the given destination address following the rules
+*               given by the Default Source Selection mentioned in RFC #6724.
+*
+* Argument(s) : if_nbr          Interface number on which to send packet.
+*
+*               p_addr_dest     Pointer to IPv6 destination address.
+*
+*               p_addr_tbl      Pointer to head of addresses table of Interface.
+*
+*               p_addr_tbl_qty  Pointer to number of address configured on Interface.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_IPv6_ERR_NONE               Address selection succeeded.
+*                                   NET_IPv6_ERR_TX_SRC_SEL_FAIL    Address selection failed.
+*
+* Return(s)   : Pointer to IPv6 addresses object to use as source address.
+*
+* Caller(s)   : NetIPv6_GetAddrSrcHandler().
+*
+* Note(s)     : (1) If source address selection failed, the first address in the Interface addresses
+*                   table is return.
+*
+*               (2) RFC #6724 Section 5 - "Source Address Selection" describe selection rules:
+*
+*                   (a) Rule 1: Prefer same address.
+*
+*                   (b) Rule 3: Avoid deprecated addresses.
+*
+*                   (c) Rule 4: Prefer home addresses.
+*
+*                       (i) Not applicable
+*
+*                   (d) Rule 5: Prefer outgoing interface.
+*
+*                       (i) Not applicable
+*
+*                   (e) Rule 5.5: Prefer addresses in a prefix advertised by the next-hop.
+*
+*                       (i) Not applicable
+*
+*                   (f) Rule 6: Prefer matching label.
+*
+*                   (g) Rule 7: Prefer temporary addresses.
+*
+*                       (i) Not applicable
+*
+*                   (h) Rule 8: Use longest matching prefix.
+*********************************************************************************************************
+*/
+
+static  const  NET_IPv6_ADDRS  *NetIPv6_AddrSrcSel (       NET_IF_NBR         if_nbr,
+                                                    const  NET_IPv6_ADDR     *p_addr_dest,
+                                                    const  NET_IPv6_ADDRS    *p_addr_tbl,
+                                                           NET_IP_ADDRS_QTY   addr_tbl_qty,
+                                                           NET_ERR           *p_err)
+{
+    const  NET_IPv6_ADDRS    *p_addr_cur;
+    const  NET_IPv6_ADDRS    *p_addr_sel;
+    const  NET_IPv6_POLICY   *p_policy_dest;
+    const  NET_IPv6_POLICY   *p_policy_addr;
+           NET_IP_ADDRS_QTY   addr_ix;
+           CPU_BOOLEAN        valid;
+           CPU_INT08U         rule_sel;
+           CPU_INT08U         dest_scope;
+           CPU_INT08U         addr_scope;
+           CPU_INT08U         len_cur;
+           CPU_INT08U         len_sel;
+
+
+    dest_scope    = NetIPv6_GetAddrScope(p_addr_dest);
+    p_policy_dest = NetIPv6_AddrSelPolicyGet(p_addr_dest);
+    rule_sel      = NET_IPv6_SRC_SEL_RULE_NONE;
+    len_sel       = 0u;
+
+
+    for (addr_ix = 0u; addr_ix < addr_tbl_qty; addr_ix++) {
+
+        p_addr_cur = &p_addr_tbl[addr_ix];
+
+                                                                /* RULE #1 : Prefer same address.                       */
+        valid = NetIPv6_IsAddrsIdentical(&p_addr_cur->AddrHost, p_addr_dest);
+        if (valid == DEF_YES) {
+            p_addr_sel = p_addr_cur;
+            goto rule_found;
+        }
+
+                                                                /* RULE #2 : Prefer appropriate scope.                  */
+        addr_scope = NetIPv6_GetAddrScope(&p_addr_cur->AddrHost);
+        if (addr_scope == dest_scope) {
+            p_addr_sel  = p_addr_cur;
+            rule_sel    = NET_IPv6_SRC_SEL_RULE_02;
+            continue;
+        }
+
+        if (rule_sel > NET_IPv6_SRC_SEL_RULE_03) {              /* RULE #3 : Avoid deprecated addresses.                */
+
+            if (p_addr_cur->AddrState == NET_IPv6_ADDR_STATE_PREFERRED) {
+                p_addr_sel = p_addr_cur;
+                rule_sel   = NET_IPv6_SRC_SEL_RULE_03;
+                continue;
+            }
+
+        } else {
+            continue;
+        }
+
+                                                                /* RULE #4 :   See Note 2d.                             */
+                                                                /* RULE #5 :   See Note 2e.                             */
+                                                                /* RULE #5.5 : See Note 2f.                             */
+
+                                                                /* RULE #6 : Prefer matching label.                     */
+        if (rule_sel > NET_IPv6_SRC_SEL_RULE_06) {
+
+            p_policy_addr = NetIPv6_AddrSelPolicyGet(&p_addr_cur->AddrHost);
+            if (p_policy_addr->Label == p_policy_dest->Label) {
+                p_addr_sel = p_addr_cur;
+                rule_sel   = NET_IPv6_SRC_SEL_RULE_06;
+                continue;
+            }
+
+        } else {
+            continue;
+        }
+
+                                                                /* RULE #7 :   See Note 2d.                             */
+
+                                                                /* RULE #8 : Use longest matching prefix.               */
+        len_cur = NetIPv6_GetAddrMatchingLen(p_addr_dest, &p_addr_cur->AddrHost);
+        if (len_cur >= len_sel) {
+            len_sel    = len_cur;
+            p_addr_sel = p_addr_cur;
+            rule_sel   = NET_IPv6_SRC_SEL_RULE_08;
+            continue;
+        }
+    }
+
+
+
+    if (rule_sel == NET_IPv6_SRC_SEL_RULE_NONE) {
+        p_addr_sel = &p_addr_tbl[0];
+       *p_err      =  NET_IPv6_ERR_TX_SRC_SEL_FAIL;
+        goto exit;
+    }
+
+
+    (void)&if_nbr;
+
+
+rule_found:
+   *p_err = NET_IPv6_ERR_NONE;
+
+exit:
+    return (p_addr_sel);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_LookUpPolicyTbl()
+*
+* Description : Get address selection policy for a given IPv6 address.
+*
+* Argument(s) : p_addr      Pointer to IPv6 address
+*               ------      Argument checked by caller(s).
+*
+* Return(s)   : Pointer to address selection policy matching the given address.
+*
+* Caller(s)   : NetIPv6_AddrSrcSelect().
+*
+* Note(s)     : (1) The Policy table is part of the procedure to select the source and destination
+*                   address to Transmit packets.
+*********************************************************************************************************
+*/
+
+const  NET_IPv6_POLICY  *NetIPv6_AddrSelPolicyGet (const  NET_IPv6_ADDR *p_addr)
+{
+    const  NET_IPv6_POLICY  *p_policy_entry;
+    const  NET_IPv6_POLICY  *p_policy_found;
+           CPU_INT08U        i;
+           CPU_BOOLEAN       valid;
+
+
+    for (i = 0; i < NET_IPv6_POLICY_TBL_SIZE; i++) {
+        p_policy_entry = NetIPv6_PolicyTbl[i];
+        valid = NetIPv6_IsAddrAndMaskValid(p_addr, p_policy_entry->PrefixMaskPtr);
+        if (valid == DEF_YES) {
+            p_policy_found = p_policy_entry;
+            goto exit;
+        }
+    }
+
+
+exit:
+    return (p_policy_found);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_CfgAddrValidate()
+*
+* Description : Validate an IPv6 host address and prefix length for configuration on an interface.
+*
+* Argument(s) : p_addr       Pointer to desired IPv6 address to configure.
+*
+*               prefix_len   Prefix length of the desired IPv6 address.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                       IPv6 address successfully configured.
+*                               NET_IPv6_ERR_INVALID_ADDR_HOST          Invalid IPv6 address.
+*                               NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN    Invalid IPv6 address prefix length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_CfgAddrAdd().
+*
+* Note(s)     : (1) See function NetIPv6_IsValidAddrHost() for supported IPv6 address host.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+static  void  NetIPv6_CfgAddrValidate (NET_IPv6_ADDR  *p_addr,
+                                       CPU_INT08U      prefix_len,
+                                       NET_ERR        *p_err)
+{
+    CPU_BOOLEAN  addr_valid;
+
+
+                                                                /* ----------- VALIDATE IPv6 ADDR PREFIX LEN ---------- */
+    if (prefix_len > NET_IPv6_ADDR_PREFIX_LEN_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.CfgInvAddrHostCtr);
+       *p_err = NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN;
+        return;
+    }
+
+                                                                /* -------------- VALIDATE HOST ADDRESS --------------- */
+    addr_valid = NetIPv6_IsValidAddrHost(p_addr);
+    if (addr_valid != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.CfgInvAddrHostCtr);
+       *p_err =  NET_IPv6_ERR_INVALID_ADDR_HOST;
+        return;
+    }
+
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as IPv6 protocol.
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header that received IPv6 packet.
+*               --------    Argument validated in NetIPv6_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Received buffer's IPv6 header validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT IPv6.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetIPv6_RxPktValidateBuf (NET_BUF_HDR  *p_buf_hdr,
+                                        NET_ERR      *p_err)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  valid;
+    NET_ERR      err;
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* --------------- VALIDATE IPv6 BUF HDR -------------- */
+    if (p_buf_hdr->ProtocolHdrType != NET_PROTOCOL_TYPE_IP_V6) {
+        if_nbr = p_buf_hdr->IF_Nbr;
+        valid  = NetIF_IsValidHandler(if_nbr, &err);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvIF_Ctr);
+        }
+       *p_err = NET_ERR_INVALID_PROTOCOL;
+        return;
+    }
+
+    if (p_buf_hdr->IP_HdrIx == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_RxPktValidate()
+*
+* Description : (1) Validate received IPv6 packet :
+*
+*                   (a) (1) Validate the received packet's following IPv6 header fields :
+*
+*                           (A) Version
+*                           (B) Traffic Class
+*                           (C) Flow Label
+*                           (D) Payload Length
+*                           (E) Next Header
+*                           (F) Source      Address
+*                           (G) Destination Address
+*
+*                       (2) Validation ignores the following IPv6 header fields :
+*
+*                           (A) Hop Limit
+*
+*                   (b) Convert the following IPv6 header fields from network-order to host-order :
+*
+*                       (1) Version
+*                       (2) Traffic Class
+*                       (3) Flow Label
+*
+*                           (A) These fields are NOT converted directly in the received packet buffer's
+*                               data area but are converted in local or network buffer variables ONLY.
+*
+*                           (B) The following IPv6 header fields are converted & stored in network buffer
+*                               variables :
+*
+*                               (1) Payload Length
+*                               (4) Source Address
+*                               (5) Destination Address
+*                               (6) Next Header
+*
+*                   (c) Update network buffer's protocol controls
+*
+*                   (d) Process IPv6 packet in ICMPv6 Receive Handler
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv6 packet.
+*               ----        Argument checked   in NetIPv6_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetIPv6_Rx().
+*
+*               p_ip_hdr    Pointer to received packet's IPv6 header.
+*               -------     Argument validated in NetIPv6_Rx()/NetIPv6_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                       Received packet validated.
+*                               NET_IPv6_ERR_INVALID_VER                Invalid IPv6 version.
+*                               NET_IPv6_ERR_INVALID_TRAFFIC_CLASS      Invalid IPv6 Traffic Class.
+*                               NET_IPv6_ERR_INVALID_FLOW_LABEL         Invalid IPv6 Flow Label.
+*                               NET_IPv6_ERR_INVALID_LEN_TOT            Invalid IPv6 total  length.
+*                               NET_IPv6_ERR_INVALID_PROTOCOL           Invalid/unknown protocol type.
+*                               NET_IPv6_ERR_INVALID_LEN_DATA           Invalid IPv6 data   length.
+*                               NET_IPv6_ERR_INVALID_ADDR_SRC           Invalid IPv6 source      address.
+*                               NET_IPv6_ERR_INVALID_ADDR_DEST          Invalid IPv6 destination address.
+*                               NET_IPv6_ERR_INVALID_EH                 Invalid IPv6 Extension header.
+*
+*                                                                       --- RETURNED BY NetIF_IsEnHandler() : ----
+*                               NET_IF_ERR_INVALID_IF                   Invalid OR disabled network interface.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_Rx().
+*
+* Note(s)     : (2) See 'net_ipv6.h  IP HEADER' for IPv6 header format.
+*
+*               (3) The following IPv6 header fields MUST be decoded &/or converted from network-order to host-order
+*                   BEFORE any ICMP Error Messages are transmitted (see 'net_icmp.c  NetICMPv6_TxMsgErr()  Note #2') :
+*
+*                   (a) Header Length
+*                   (b) Payload  Length
+*                   (c) Source      Address
+*                   (d) Destination Address
+*
+*               (4) (a) In addition to validating that the IPv6 header Total Length is greater than or equal to the
+*                       IPv6 header Header Length, the IPv6 total length SHOULD be compared to the remaining packet
+*                       data length which should be identical.
+*
+*                   (b) (1) However, some network interfaces MAY append octets to their frames :
+*
+*                           (A) 'pad' octets, if the frame length does NOT meet the frame's required minimum size :
+*
+*                               (1) RFC #894, Section 'Frame Format' states that "the minimum length of  the data
+*                                   field of a packet sent over an Ethernet is 46 octets.  If necessary, the data
+*                                   field should be padded (with octets of zero) to meet the Ethernet minimum frame
+*                                   size.  This padding is not part of the IPv6 packet and is not included in the
+*                                   total length field of the IPv6 header".
+*
+*                               (2) RFC #1042, Section 'Frame Format and MAC Level Issues : For all hardware types'
+*                                   states that "IEEE 802 packets may have a minimum size restriction.  When
+*                                   necessary, the data field should be padded (with octets of zero) to meet the
+*                                   IEEE 802 minimum frame size requirements.  This padding is not part of the IPv6
+*                                   datagram and is not included in the total length field of the IPv6 header".
+*
+*                           (B) Trailer octets, to improve overall throughput :
+*
+*                               (1) RFC #893, Section 'Introduction' specifies "a link-level ... trailer
+*                                   encapsulation, or 'trailer' ... to minimize the number and size of memory-
+*                                   to-memory copy operations performed by a receiving host when processing a
+*                                   data packet".
+*
+*                               (2) RFC #1122, Section 2.3.1 states that "trailer encapsulations[s] ... rearrange
+*                                   the data contents of packets ... [to] improve the throughput of higher layer
+*                                   protocols".
+*
+*                           (C) CRC or checksum values, optionally copied from a device.
+*
+*                       (2) Therefore, if ANY octets are appended to the total frame length, then the packet's
+*                           remaining data length MAY be greater than the IPv6 total length :
+*
+*                           (A) Thus, the IPv6 total length & the packet's remaining data length CANNOT be
+*                               compared for equality.
+*
+*                               (1) Unfortunately, this eliminates the possibility to validate the IPv6 total
+*                                   length to the packet's remaining data length.
+*
+*                           (B) And the IPv6 total length MAY be less than the packet's remaining
+*                               data length.
+*
+*                               (1) However, the packet's remaining data length MUST be reset to the IPv6
+*                                   total length to correctly calculate higher-layer application data
+*                                   length.
+*
+*                           (C) However, the IPv6 total length CANNOT be greater than the packet's remaining
+*                               data length.
+*
+*               (5) RFC #4443, Section 3.4 'Parameter Problem Message' states that "If an IPv6 node processing
+*                   a packet finds a problem with a field in the IPv6 header or extension headers such that it
+*                   cannot complete processing the packet, it MUST discard the packet and SHOULD originate an
+*                   ICMPv6 Parameter Problem message to the packet's source, indicating the type and location
+*                   of the problem."
+*
+*               (6) IPv6 packets with the following invalid IPv6 header fields be "silently discarded" :
+*
+*                   (a) Version
+*
+*                   (b) Source Address
+*
+*                       (1) (A) A host MUST silently discard an incoming datagram containing an IPv6 source
+*                               address that is invalid by the rules of this section.
+*
+*                           (B) (1) MAY be one of the following :
+*                                   (a) Configured host address
+*                                   (b) Unspecified     address
+*
+*                               (2) MUST NOT be one of the following :
+*                                   (a) IPv6 Multicast  address
+*                                   (b) IPv6 Loopback   address
+*
+*                   (c) Destination Address
+*
+*                       (1) (A) A host MUST silently discard an incoming datagram that is not destined for :
+*
+*                               (1) (one of) the host's IPv6 address(es);
+*                               (2) the address for a multicast group of which the host is a member
+*                                    on the incoming physical interface.
+*
+*                           (B) (1) MUST     be one of the following :
+*                                   (a) IPv6 Unicast address
+*                                   (b) Multicast    address
+*
+*                               (2) MUST NOT be one of the following :
+*                                   (a) Unspecified  IPv6 address
+*
+*              (7) See 'net_ipv6.h  IPv6 ADDRESS DEFINES  Notes #2 & #3' for supported IPv6 addresses.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_RxPktValidate (NET_BUF        *p_buf,
+                                     NET_BUF_HDR    *p_buf_hdr,
+                                     NET_IPv6_HDR   *p_ip_hdr,
+                                     NET_ERR        *p_err)
+{
+#if 0
+    CPU_BOOLEAN                 addr_host_dest;
+    NET_IPv6_ADDR              *p_ip_addr;
+#endif
+#if  (NET_IPv6_CFG_TRAFFIC_CLASS_EN == DEF_ENABLED)
+    CPU_INT32U                  ip_traffic_class;
+    CPU_INT08U                  ip_dscp;
+    CPU_INT08U                  ip_ecn;
+#endif
+#if  (NET_IPv6_CFG_FLOW_LABEL_EN == DEF_ENABLED)
+    CPU_INT32U                  ip_flow_label;
+#endif
+    const  NET_IPv6_ADDRS      *p_ip_addrs;
+           NET_IPv6_ADDR_TYPE   addr_type;
+           NET_IF_NBR           if_nbr;
+           CPU_INT32U           ip_ver_traffic_flow;
+           CPU_INT32U           ip_ver;
+           CPU_INT16U           protocol_ix;
+           CPU_BOOLEAN          rx_remote_host;
+#ifdef NET_MLDP_MODULE_EN
+           CPU_BOOLEAN          grp_joined;
+#endif
+#ifdef NET_ICMPv6_MODULE_EN
+           NET_ERR              msg_err;
+#endif
+
+                                                                /* --------------- CONVERT IPv6 FIELDS ---------------- */
+    NET_UTIL_VAL_COPY_GET_NET_32(&ip_ver_traffic_flow,     &p_ip_hdr->VerTrafficFlow);
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->IP_TotLen,    &p_ip_hdr->PayloadLen);
+
+    Mem_Copy(&p_buf_hdr->IPv6_AddrSrc,  &p_ip_hdr->AddrSrc,  NET_IPv6_ADDR_SIZE);
+    Mem_Copy(&p_buf_hdr->IPv6_AddrDest, &p_ip_hdr->AddrDest, NET_IPv6_ADDR_SIZE);
+
+                                                                /* ---------------- VALIDATE IPv6 VER ----------------- */
+    ip_ver      = ip_ver_traffic_flow & NET_IPv6_HDR_VER_MASK;
+    ip_ver    >>= NET_IPv6_HDR_VER_SHIFT;
+    if (ip_ver != NET_IPv6_HDR_VER) {                           /* Validate IP ver.                                     */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvVerCtr);
+       *p_err = NET_IPv6_ERR_INVALID_VER;
+        return;
+    }
+
+#if  (NET_IPv6_CFG_TRAFFIC_CLASS_EN == DEF_ENABLED)
+                                                                /* ----------- VALIDATE IPv6 TRAFFIC CLASS ------------ */
+                                                                /* See 'net_ipv6.h  IPv6 HEADER  Note #x'.              */
+
+    ip_traffic_class      = ip_ver_traffic_flow & NET_IPv6_HDR_TRAFFIC_CLASS_MASK_32;
+    ip_traffic_class    >>= NET_IPv6_HDR_TRAFFIC_CLASS_SHIFT;
+
+                                                                /* - VALIDATE IPv6 DIFFERENTIATED SERVICES CODEPOINT -- */
+
+    ip_dscp               = ip_traffic_class    & NET_IPv6_HDR_DSCP_MASK_08;
+    ip_dscp             >>= NET_IPv6_HDR_DSCP_SHIFT;
+
+                                                                /* -- VALIDATE IPv6 EXPLICIT CONGESTION NOTIFICATION -- */
+
+    ip_ecn                = ip_traffic_class    & NET_IPv6_HDR_ECN_MASK_08;
+
+    APP_TRACE_IPv6("           Traffic class = %u\r\n", ip_traffic_class);
+
+
+    if (ip_traffic_class != NET_IPv6_HDR_TRAFFIC_CLASS) {       /* Validate IP traffic class.                           */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvTrafficClassCtr);
+       *p_err = NET_IPv6_ERR_INVALID_TRAFFIC_CLASS;
+        return;
+    }
+
+#endif
+
+#if  (NET_IPv6_CFG_FLOW_LABEL_EN == DEF_ENABLED)
+                                                                /* ------------ VALIDATE IPv6 FLOW LABEL -------------- */
+                                                                /* See 'net_ipv6.h  IPv6 HEADER  Note #x'.              */
+    ip_flow_label      = ip_ver_traffic_flow & NET_IPv6_HDR_FLOW_LABEL_MASK;
+    ip_flow_label    >>= NET_IPv6_HDR_FLOW_LABEL_SHIFT;
+    if (ip_flow_label != NET_IPv6_HDR_FLOW_LABEL) {             /* Validate IP flow label.                              */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvFlowLabelCtr);
+       *p_err = NET_IPv6_ERR_INVALID_FLOW_LABEL;
+        return;
+    }
+#endif
+
+                                                                /* ------------ VALIDATE IPv6 PAYLOAD LEN ------------- */
+    if (p_buf_hdr->IP_TotLen > p_buf_hdr->DataLen) {              /* If IPv6 tot len > rem pkt data len, ...              */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvTotLenCtr);
+#ifdef NET_ICMPv6_MODULE_EN
+        NetICMPv6_TxMsgErr(p_buf,
+                           NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                           NET_ICMPv6_MSG_CODE_PARAM_PROB_IP_HDR,
+                           NET_ICMPv6_PTR_IX_IP_PAYLOAD_LEN,
+                          &msg_err);
+#endif
+       *p_err = NET_IPv6_ERR_INVALID_LEN_TOT;                    /* ... rtn err (see Note #4b2C).                        */
+        return;
+    }
+
+    p_buf_hdr->IP_DataLen = (CPU_INT16U  )p_buf_hdr->IP_TotLen;
+    p_buf_hdr->IP_HdrLen  = sizeof(NET_IPv6_HDR);
+
+                                                                /* ------------ VALIDATE IPv6 NEXT HEADER ------------- */
+    switch (p_ip_hdr->NextHdr) {                                /* See 'net_ipv6.h  IP HEADER PROTOCOL FIELD ...        */
+        case NET_IP_HDR_PROTOCOL_ICMPv6:
+        case NET_IP_HDR_PROTOCOL_UDP:
+        case NET_IP_HDR_PROTOCOL_TCP:
+             break;
+
+
+        case NET_IP_HDR_PROTOCOL_EXT_HOP_BY_HOP:
+        case NET_IP_HDR_PROTOCOL_EXT_DEST:
+        case NET_IP_HDR_PROTOCOL_EXT_ROUTING:
+        case NET_IP_HDR_PROTOCOL_EXT_FRAG:
+        case NET_IP_HDR_PROTOCOL_EXT_AUTH:
+        case NET_IP_HDR_PROTOCOL_EXT_ESP:
+        case NET_IP_HDR_PROTOCOL_EXT_NONE:
+        case NET_IP_HDR_PROTOCOL_EXT_MOBILITY:
+             break;
+
+
+        default:                                                /* See Note #x.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvProtocolCtr);
+#ifdef  NET_ICMPv6_MODULE_EN
+             NetICMPv6_TxMsgErr(p_buf,
+                                NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                                NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_NEXT_HDR,
+                                NET_IPv6_HDR_NEXT_HDR_IX,
+                               &msg_err);
+#endif
+            *p_err = NET_IPv6_ERR_INVALID_PROTOCOL;
+             return;
+
+    }
+                                                                /* --------------- VALIDATE IPv6 ADDRS ---------------- */
+    if_nbr = p_buf_hdr->IF_Nbr;                                 /* Get pkt's rx'd IF.                                   */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+   (void)NetIF_IsEnHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* Chk pkt rx'd to cfg'd host addr.                     */
+#if 0
+    if (if_nbr == NET_IF_NBR_LOCAL_HOST) {
+        p_ip_addr      = (NET_IPv6_ADDR *)0;
+        addr_host_dest =  NetIPv6_IsAddrHostCfgdHandler(&p_buf_hdr->IPv6_AddrDest);
+    }
+#endif
+                                                                /* Chk pkt rx'd via local or remote host.               */
+    rx_remote_host = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_RX_REMOTE);
+    if (((if_nbr  != NET_IF_NBR_LOCAL_HOST) && (rx_remote_host == DEF_NO)) ||
+        ((if_nbr  == NET_IF_NBR_LOCAL_HOST) && (rx_remote_host != DEF_NO))) {
+         NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvDestCtr);
+        *p_err = NET_IPv6_ERR_INVALID_ADDR_DEST;
+         return;
+    }
+                                                                /* -------------- VALIDATE IPv6 SRC ADDR -------------- */
+    addr_type = NetIPv6_AddrTypeValidate(&p_buf_hdr->IPv6_AddrSrc, if_nbr);
+    switch (addr_type) {
+        case  NET_IPv6_ADDR_TYPE_UNICAST:
+        case  NET_IPv6_ADDR_TYPE_LINK_LOCAL:
+        case  NET_IPv6_ADDR_TYPE_SITE_LOCAL:
+        case  NET_IPv6_ADDR_TYPE_UNSPECIFIED:
+        case  NET_IPv6_ADDR_TYPE_NONE:
+              break;
+
+
+        case  NET_IPv6_ADDR_TYPE_MCAST:
+        case  NET_IPv6_ADDR_TYPE_MCAST_SOL:
+        case  NET_IPv6_ADDR_TYPE_MCAST_ROUTERS:
+        case  NET_IPv6_ADDR_TYPE_MCAST_NODES:
+        case  NET_IPv6_ADDR_TYPE_LOOPBACK:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvAddrSrcCtr);
+            *p_err = NET_IPv6_ERR_INVALID_ADDR_SRC;
+             return;
+    }
+                                                                /* -------------- VALIDATE IPv6 DEST ADDR ------------- */
+    addr_type = NetIPv6_AddrTypeValidate(&p_buf_hdr->IPv6_AddrDest, if_nbr);
+    switch (addr_type) {
+
+        case  NET_IPv6_ADDR_TYPE_MCAST_ROUTERS:
+        case  NET_IPv6_ADDR_TYPE_MCAST_NODES:
+        case  NET_IPv6_ADDR_TYPE_LOOPBACK:
+              (void)&p_ip_addrs;
+              break;
+
+        case  NET_IPv6_ADDR_TYPE_MCAST:
+        case  NET_IPv6_ADDR_TYPE_MCAST_SOL:
+#ifdef  NET_MLDP_MODULE_EN
+              grp_joined = NetMLDP_IsGrpJoinedOnIF(if_nbr,
+                                                  &p_buf_hdr->IPv6_AddrDest);
+              if (grp_joined == DEF_NO) {
+                  NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvDestCtr);
+                 *p_err = NET_IPv6_ERR_INVALID_ADDR_DEST;
+                  return;
+              }
+#else
+              NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvDestCtr);
+             *p_err = NET_IPv6_ERR_INVALID_ADDR_DEST;
+#endif
+              break;
+
+
+        case  NET_IPv6_ADDR_TYPE_UNICAST:
+        case  NET_IPv6_ADDR_TYPE_SITE_LOCAL:
+        case  NET_IPv6_ADDR_TYPE_LINK_LOCAL:
+        case  NET_IPv6_ADDR_TYPE_NONE:
+        case  NET_IPv6_ADDR_TYPE_UNSPECIFIED:
+        default:
+            p_ip_addrs = NetIPv6_GetAddrsHostOnIF(                        if_nbr,
+                                                  (const NET_IPv6_ADDR *)&p_buf_hdr->IPv6_AddrDest);
+            if (p_ip_addrs == (NET_IPv6_ADDRS *)0) {
+                NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvDestCtr);
+                *p_err = NET_IPv6_ERR_INVALID_ADDR_DEST;
+                return;
+            }
+    }
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+                                                                /* See Note #3a.                                        */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_buf_hdr->IP_HdrLen > p_buf_hdr->DataLen) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvDataLenCtr);
+       *p_err = NET_IPv6_ERR_INVALID_LEN_DATA;
+        return;
+    }
+#endif
+    p_buf_hdr->DataLen -= (NET_BUF_SIZE) p_buf_hdr->IP_HdrLen;
+    protocol_ix        = (CPU_INT16U  )(p_buf_hdr->IP_HdrIx + p_buf_hdr->IP_HdrLen);
+
+                                                                /* ----------- PROCESS NEXT HEADER PROTOCOL ----------- */
+    NetIPv6_RxPktValidateNextHdr(p_buf,
+                                 p_buf_hdr,
+                                 p_ip_hdr->NextHdr,
+                                 protocol_ix,
+                                 p_err);
+
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+             break;
+
+
+        case NET_IPv6_ERR_INVALID_EH_OPT_SEQ:
+        default:
+#ifdef   NET_ICMPv6_MODULE_EN
+             NetICMPv6_TxMsgErr(p_buf,
+                                NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                                NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_NEXT_HDR,
+                               (p_buf_hdr->IP_HdrIx - p_buf_hdr->IP_HdrIx),
+                                p_err);
+#endif
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvOptsCtr);
+            *p_err = NET_IPv6_ERR_INVALID_EH;
+             return;
+    }
+
+
+    DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv6_RxPktValidateNextHdr()
+*
+* Description : (1) Validates the IPv6 Header or Extension Header Next Header.
+*
+*               (2) Updates the Protocol Header and Protocol Index field of p_buf_hdr.
+*
+*
+* Argument(s) : p_buf           Pointer to network buffer that received IPv6 packet.
+*               ----            Argument checked   in NetIPv6_Rx().
+*
+*               p_buf_hdr       Pointer to network buffer header that received IPv6 packet.
+*               --------        Argument validated in NetIPv6_Rx().
+*
+*               next_hdr        Protocol type or Extension Header of the following header.
+*
+*               protocol_ix     Index of the Next Header.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                   next_hdr is valid.
+*                               NET_IPv6_ERR_INVALID_EH_OPT_SEQ     next_hdr is NET_IP_HDR_PROTOCOL_EXT_HOP_BY_HOP
+*                                                                   and not the first ext hdr of packet.
+*                               NET_IPv6_ERR_INVALID_PROTOCOL       Otherwise.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_RxPktProcessExtHdr().
+*
+* Note(s)     : (3) If, a node encounters a Next Header value of zero (Hop-by-Hop) in any header other
+*                   than an IPv6 header or an unrecognized Next Header, it must send an ICMP Parameter Problem
+*                   message to the source of the packet, with an ICMP Code value of 1 ("unrecognized Next
+*                   Header type encountered") and the ICMP Pointer field containing the offset of the
+*                   unrecognized value within the original packet. (See RFC #2460, Section 4.0).
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_RxPktValidateNextHdr (NET_BUF            *p_buf,
+                                            NET_BUF_HDR        *p_buf_hdr,
+                                            NET_IPv6_NEXT_HDR   next_hdr,
+                                            CPU_INT16U          protocol_ix,
+                                            NET_ERR            *p_err)
+{
+    switch (next_hdr) {
+        case NET_IP_HDR_PROTOCOL_ICMPv6:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_ICMP_V6;
+             p_buf_hdr->ProtocolHdrTypeNetSub    = NET_PROTOCOL_TYPE_ICMP_V6;
+             p_buf_hdr->ICMP_MsgIx               = protocol_ix;
+             break;
+
+
+        case NET_IP_HDR_PROTOCOL_UDP:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_UDP_V6;
+             p_buf_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_UDP_V6;
+             p_buf_hdr->TransportHdrIx           = protocol_ix;;
+             break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+        case NET_IP_HDR_PROTOCOL_TCP:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_TCP_V6;
+             p_buf_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_TCP_V6;
+             p_buf_hdr->TransportHdrIx           = protocol_ix;
+             break;
+#endif
+
+
+        case NET_IP_HDR_PROTOCOL_EXT_HOP_BY_HOP:
+             p_buf_hdr->IPv6_HopByHopHdrIx       = protocol_ix;
+                                                                /* See Note 3.                                          */
+             if ((p_buf_hdr->IPv6_HopByHopHdrIx - p_buf_hdr->IP_HdrIx) != NET_IPv6_HDR_SIZE) {
+                *p_err = NET_IPv6_ERR_INVALID_EH_OPT_SEQ;
+                 return;
+             }
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_IP_V6_EXT_HOP_BY_HOP;
+             break;
+
+
+        case NET_IP_HDR_PROTOCOL_EXT_ROUTING:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_IP_V6_EXT_ROUTING;
+             p_buf_hdr->IPv6_RoutingHdrIx        = protocol_ix;
+             break;
+
+
+        case NET_IP_HDR_PROTOCOL_EXT_FRAG:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_IP_V6_EXT_FRAG;
+             p_buf_hdr->IPv6_FragHdrIx           = protocol_ix;
+             break;
+
+
+        case NET_IP_HDR_PROTOCOL_EXT_ESP:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_IP_V6_EXT_ESP;
+             p_buf_hdr->IPv6_ESP_HdrIx           = protocol_ix;
+             break;
+
+
+        case NET_IP_HDR_PROTOCOL_EXT_AUTH:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_IP_V6_EXT_AUTH;
+             p_buf_hdr->IPv6_AuthHdrIx           = protocol_ix;
+             break;
+
+
+        case NET_IP_HDR_PROTOCOL_EXT_NONE:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_IP_V6_EXT_NONE;
+#if 0
+             p_buf_hdr->IPv6_NoneHdrIx           = protocol_ix;
+#endif
+             break;
+
+
+        case NET_IP_HDR_PROTOCOL_EXT_DEST:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_IP_V6_EXT_DEST;
+             p_buf_hdr->IPv6_DestHdrIx           = protocol_ix;
+             break;
+
+
+        case NET_IP_HDR_PROTOCOL_EXT_MOBILITY:
+             p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_IP_V6_EXT_MOBILITY;
+             p_buf_hdr->IPv6_MobilityHdrIx       = protocol_ix;
+             break;
+
+        default:                                                /* See Note 3.                                          */
+            *p_err = NET_IPv6_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+   (void)&p_buf;
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_RxPktProcessExtHdr()
+*
+* Description : Process the Extension Header(s) found in the received IPv6 packet.
+*
+* Argument(s) : p_buf       Pointer to a buffer to process the next extension header.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               No Errors.
+*                               NET_IPv6_ERR_INVALID_EH         Invalid ext hdr num.
+*                               NET_IPv6_ERR_INVALID_EH_LEN     Invalid ext hdr len.
+*                               NET_IPv6_ERR_INVALID_EH_OPT     Invalid ext hdr option.
+*                               NET_IPv6_ERR_INVALID_PROTOCOL   Invalid/unknow protocol type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_Rx().
+*
+* Note(s)     : (1) If, a node encounters a Next Header value of zero (Hop-by-Hop) in any header other
+*                   than an IPv6 header or an unrecognized Next Header, it must send an ICMP Parameter Problem
+*                   message to the source of the packet, with an ICMP Code value of 1 ("unrecognized Next
+*                   Header type encountered") and the ICMP Pointer field containing the offset of the
+*                   unrecognized value within the original packet. (See RFC #2460, Section 4.0).
+*********************************************************************************************************
+*/
+static void NetIPv6_RxPktProcessExtHdr(NET_BUF  *p_buf,
+                                       NET_ERR  *p_err)
+{
+    NET_BUF_HDR       *p_buf_hdr;
+#ifdef NET_ICMPv6_MODULE_EN
+    CPU_INT16U         prev_protocol_ix;
+#endif
+    CPU_INT16U         protocol_ix;
+    NET_IPv6_NEXT_HDR  next_hdr;
+
+
+    p_buf_hdr         = &p_buf->Hdr;
+#ifdef NET_ICMPv6_MODULE_EN
+    prev_protocol_ix =  p_buf_hdr->IP_HdrIx + NET_IPv6_HDR_SIZE + p_buf_hdr->IPv6_ExtHdrLen;
+#endif
+    while ((p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_IP_V6_EXT_HOP_BY_HOP) ||
+           (p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_IP_V6_EXT_ROUTING)    ||
+           (p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_IP_V6_EXT_FRAG)       ||
+           (p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_IP_V6_EXT_ESP)        ||
+           (p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_IP_V6_EXT_AUTH)       ||
+           (p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_IP_V6_EXT_NONE)       ||
+           (p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_IP_V6_EXT_DEST)       ||
+           (p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_IP_V6_EXT_MOBILITY)) {
+
+#ifdef NET_ICMPv6_MODULE_EN
+        prev_protocol_ix =  p_buf_hdr->IP_HdrIx + NET_IPv6_HDR_SIZE + p_buf_hdr->IPv6_ExtHdrLen;
+#endif
+                                                                /* Demux Ext Hdr fct.                                   */
+        switch (p_buf_hdr->ProtocolHdrType) {
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_HOP_BY_HOP:
+                 protocol_ix = NetIPv6_RxOptHdr(p_buf, &next_hdr, NET_PROTOCOL_TYPE_IP_V6_EXT_HOP_BY_HOP, p_err);
+                 break;
+
+
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_DEST:
+                 protocol_ix = NetIPv6_RxOptHdr(p_buf, &next_hdr, NET_PROTOCOL_TYPE_IP_V6_EXT_DEST, p_err);
+                 break;
+
+
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_ROUTING:
+                 protocol_ix = NetIPv6_RxRoutingHdr(p_buf, &next_hdr, p_err);
+                 break;
+
+
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_FRAG:
+                 protocol_ix = NetIPv6_RxFragHdr(p_buf, &next_hdr, p_err);
+                 break;
+
+
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_ESP:
+                 protocol_ix = NetIPv6_RxESP_Hdr(p_buf, &next_hdr, p_err);
+                 break;
+
+
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_AUTH:
+                 protocol_ix = NetIPv6_RxAuthHdr(p_buf, &next_hdr, p_err);
+                 break;
+
+
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_MOBILITY:
+                 protocol_ix = NetIPv6_RxMobilityHdr(p_buf, &next_hdr, p_err);
+                 break;
+
+
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_NONE:
+                *p_err = NET_IPv6_ERR_NONE;
+                 return;
+
+
+            default:
+#ifdef NET_ICMPv6_MODULE_EN
+                                                                    /* Send ICMP Parameter Problem Msg (See Note 2).    */
+                 NetICMPv6_TxMsgErr(p_buf,
+                                    NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                                    NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_NEXT_HDR,
+                                   (prev_protocol_ix - p_buf_hdr->IP_HdrIx),
+                                    p_err);
+#endif
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvOptsCtr);
+                *p_err = NET_IPv6_ERR_INVALID_EH;
+                 return;
+        }
+
+        switch (*p_err) {
+            case NET_IPv6_ERR_NONE:
+                 break;
+
+
+            case NET_IPv6_ERR_INVALID_EH:
+            case NET_IPv6_ERR_INVALID_EH_LEN:
+            case NET_IPv6_ERR_INVALID_EH_OPT:
+            default:
+                 return;
+        }
+
+        NetIPv6_RxPktValidateNextHdr(p_buf,
+                                     p_buf_hdr,
+                                     next_hdr,
+                                     protocol_ix,
+                                     p_err);
+
+        switch (*p_err) {
+            case NET_IPv6_ERR_NONE:
+                 break;
+
+
+            case NET_IPv6_ERR_INVALID_EH_OPT_SEQ:
+            case NET_IPv6_ERR_INVALID_PROTOCOL:
+            default:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvProtocolCtr);
+#ifdef  NET_ICMPv6_MODULE_EN
+                 NetICMPv6_TxMsgErr(p_buf,
+                                    NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                                    NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_NEXT_HDR,
+                                   (prev_protocol_ix - p_buf_hdr->IP_HdrIx),
+                                    p_err);
+#endif
+                *p_err = NET_IPv6_ERR_INVALID_PROTOCOL;
+                 return;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIPv6_RxOptHdr()
+*
+* Description : Validate and process a received Hop-By-Hop or Destination Header.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv6 datagram.
+*               ----        Argument checked   in NetIPv6_Rx().
+*
+*               p_next_hdr  Pointer to variable that will receive the next header from this function.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               No error.
+*                               NET_ERR_FAULT_NULL_PTR           p_next_hdr is null.
+*                               NET_IPv6_ERR_INVALID_EH_OPT     Header option is unhandled.
+*
+* Return(s)   : Index of the next extension header or upper layer protocol, if NO error(s).
+*
+*               0u                                                          otherwise.
+*
+* Caller(s)   : NetIPv6_RxPktProcessExtHdr().
+*
+* Note(s)     : (1) Hop-by-Hop extension header and Destination header have an Option field based on the
+*                   TLV model (Type-Length-Value). See 'net_ipv6.h' EXTENSION HEADER TLV OPTION DATA TYPE.
+*********************************************************************************************************
+*/
+static  CPU_INT16U  NetIPv6_RxOptHdr(NET_BUF            *p_buf,
+                                     NET_IPv6_NEXT_HDR  *p_next_hdr,
+                                     NET_PROTOCOL_TYPE   proto_type,
+                                     NET_ERR            *p_err)
+{
+#if 0
+    CPU_BOOLEAN              change_en;
+#endif
+    CPU_INT08U              *p_data;
+    NET_BUF_HDR             *p_buf_hdr;
+    NET_IPv6_OPT_HDR        *p_opt_hdr;
+    NET_IPv6_EXT_HDR_TLV    *p_tlv;
+    CPU_INT16U               ext_hdr_ix;
+    NET_IPv6_TLV_TYPE        action;
+    NET_IPv6_OPT_TYPE        opt_type;
+    CPU_INT16U               eh_len;
+    CPU_INT16U               next_hdr_offset;
+    CPU_INT16U               next_tlv_offset;
+    CPU_BOOLEAN              dest_addr_multicast;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_next_hdr == (NET_IPv6_NEXT_HDR *)0u) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvOptsCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+#endif
+
+    p_buf_hdr = &p_buf->Hdr;                                    /* Get ptr to buf hdr.                                  */
+
+    switch (proto_type) {
+        case NET_PROTOCOL_TYPE_IP_V6_EXT_HOP_BY_HOP:
+             ext_hdr_ix = p_buf_hdr->IPv6_HopByHopHdrIx;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_IP_V6_EXT_DEST:
+             ext_hdr_ix = p_buf_hdr->IPv6_DestHdrIx;
+             break;
+
+
+        default:
+            *p_err = NET_IPv6_ERR_INVALID_PROTOCOL;
+             return (0u);
+    }
+
+    p_data                    =  p_buf->DataPtr;
+                                                                /* Get opt hdr from ext hdr data space.                 */
+    p_opt_hdr                 = (NET_IPv6_OPT_HDR *)&p_data[ext_hdr_ix];
+
+                                                                /* */
+    eh_len                    = (p_opt_hdr->HdrLen + 1) * NET_IPv6_EH_ALIGN_SIZE;
+    p_buf_hdr->DataLen        -= eh_len;
+    p_buf_hdr->IPv6_ExtHdrLen += eh_len;
+
+    next_hdr_offset           = ext_hdr_ix + eh_len;
+    next_tlv_offset           = 0u;
+
+    while (next_tlv_offset < (eh_len - 2u)) {
+
+        p_tlv     = (NET_IPv6_EXT_HDR_TLV  *)&p_opt_hdr->Opt[next_tlv_offset];
+
+        action    =  p_tlv->Type & NET_IPv6_EH_TLV_TYPE_ACT_MASK;
+#if 0
+        change_en = (p_tlv->Type & NET_IPv6_EH_TLV_TYPE_CHG_MASK) >> NET_IPv6_EH_TLV_TYPE_CHG_SHIFT;
+#endif
+        opt_type  =  p_tlv->Type & NET_IPv6_EH_TLV_TYPE_OPT_MASK;
+
+        switch (opt_type) {
+            case NET_IPv6_EH_TYPE_PAD1:
+                 break;
+
+
+            case NET_IPv6_EH_TYPE_PADN:
+                 break;
+
+
+
+            case NET_IPv6_EH_TYPE_ROUTER_ALERT:
+                 break;
+
+
+            default:
+                 switch (action) {
+                                                                /* Skip over opt & continue processing hdr.             */
+                     case NET_IPv6_EH_TLV_TYPE_ACT_SKIP:
+                          break;
+
+                                                                /* Discard pkt.                                         */
+                     case NET_IPv6_EH_TLV_TYPE_ACT_DISCARD:
+                          NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvOptsCtr);
+                         *p_err = NET_IPv6_ERR_INVALID_EH_OPT;
+                          return (0u);
+
+                                                                /* Discard pkt & send ICMP Param Problem code 2 msg.    */
+                     case NET_IPv6_EH_TLV_TYPE_ACT_DISCARD_IPPM:
+#ifdef  NET_ICMPv6_MODULE_EN
+                          NetICMPv6_TxMsgErr(p_buf,
+                                             NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                                             NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_OPT,
+                                            ((ext_hdr_ix + 2) - p_buf_hdr->IP_HdrIx),
+                                             p_err);
+#endif
+                          NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvOptsCtr);
+                         *p_err = NET_IPv6_ERR_INVALID_EH_OPT;
+                          return (0u);
+                                                                /* Discard pkt & send ICMP Param Problem code 2 msg ... */
+                                                                /* ... if pkt dest is not multicast.                    */
+                     case NET_IPv6_EH_TLV_TYPE_ACT_DISCARD_IPPM_MC:
+                          p_buf_hdr = &p_buf->Hdr;
+                          dest_addr_multicast = NetIPv6_IsAddrMcast(&p_buf_hdr->IPv6_AddrDest);
+                          if (dest_addr_multicast == DEF_NO) {
+#ifdef  NET_ICMPv6_MODULE_EN
+                              NetICMPv6_TxMsgErr(p_buf,
+                                                 NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                                                 NET_ICMPv6_MSG_CODE_PARAM_PROB_BAD_OPT,
+                                                ((ext_hdr_ix + 2) - p_buf_hdr->IP_HdrIx),
+                                                 p_err);
+#endif
+                          }
+                          NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvOptsCtr);
+                         *p_err = NET_IPv6_ERR_INVALID_EH_OPT;
+                          return (0u);
+                 }
+                 break;
+        }
+
+        if (opt_type == NET_IPv6_EH_TYPE_PAD1) {                /* The format of the Pad1 opt is a special case, it ... */
+            next_tlv_offset++;                                  /* ... doesn't have len and value fields.               */
+        } else {
+            next_tlv_offset += p_tlv->Len + 2u;
+        }
+    }
+
+   *p_next_hdr = p_opt_hdr->NextHdr;
+   *p_err      = NET_IPv6_ERR_NONE;
+    return (next_hdr_offset);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetIPv6_RxRoutingHdr()
+*
+* Description : Process the received Routing extension header.
+*
+* Argument(s) : p_buf       Pointer to Received buffer.
+*               ----        Argument checked   in NetIPv6_Rx().
+*
+*               p_next_hdr  Pointer to IPv6 next header object.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                   Routing Extension header successfully processed.
+*                               NET_IPv6_ERR_INVALID_EH_OPT_SEQ     Invalid Extension header.
+*
+* Return(s)   : Index in buffer of the IPv6 Next header.
+*
+* Caller(s)   : NetIPv6_RxPktProcessExtHdr().
+*
+* Note(s)     : (1) Routing Extension Header is not yet supported. Therefore the function does not
+*                   process the header and only set the pointer to the next header.
+*********************************************************************************************************
+*/
+static  CPU_INT16U  NetIPv6_RxRoutingHdr (NET_BUF            *p_buf,
+                                          NET_IPv6_NEXT_HDR  *p_next_hdr,
+                                          NET_ERR            *p_err)
+{
+    CPU_INT08U            *p_data;
+    NET_BUF_HDR           *p_buf_hdr;
+    NET_IPv6_ROUTING_HDR  *prouting_hdr;
+    CPU_INT16U             next_protocol_ix;
+    CPU_INT16U             hdr_len;
+
+
+    p_buf_hdr    = &p_buf->Hdr;                                 /* Get ptr to buf hdr.                                  */
+    p_data       =  p_buf->DataPtr;
+
+                                                                /* Get routing hdr from pkt data space.                 */
+    prouting_hdr = (NET_IPv6_ROUTING_HDR *)&p_data[p_buf_hdr->IPv6_RoutingHdrIx];
+    hdr_len      = (prouting_hdr->HdrLen + 1) * NET_IPv6_EH_ALIGN_SIZE;
+
+                                                                /* Calculate next hdr ptr.                              */
+    next_protocol_ix                = p_buf_hdr->IPv6_RoutingHdrIx + hdr_len;
+    p_buf_hdr->DataLen              -=                               hdr_len;
+    p_buf_hdr->IPv6_ExtHdrLen       +=                               hdr_len;
+
+    switch (prouting_hdr->RoutingType) {
+        case NET_IPv6_EH_ROUTING_TYPE_0:
+        case NET_IPv6_EH_ROUTING_TYPE_1:
+        case NET_IPv6_EH_ROUTING_TYPE_2:
+            break;                                              /* No processing of Routing Header for now.             */
+
+        default:
+            if (prouting_hdr->SegLeft != 0) {
+#ifdef  NET_ICMPv6_MODULE_EN
+                NetICMPv6_TxMsgErr(p_buf,
+                                   NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                                   NET_ICMPv6_MSG_CODE_PARAM_PROB_IP_HDR,
+                                 ((p_buf_hdr->IPv6_RoutingHdrIx + 2) - p_buf_hdr->IP_HdrIx),
+                                   p_err);
+#endif
+                NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvOptsCtr);
+               *p_err = NET_IPv6_ERR_INVALID_EH_OPT_SEQ;
+                return (0u);
+            }
+    }
+
+
+   *p_next_hdr = prouting_hdr->NextHdr;
+   *p_err      = NET_IPv6_ERR_NONE;
+    return (next_protocol_ix);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIPv6_RxFragHdr()
+*
+* Description : Process the received Fragment extension header.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv6 datagram.
+*               ----        Argument checked   in NetIPv6_Rx().
+*
+*               p_next_hdr  Pointer to IPv6 next header object.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Fragment Extension Header successfully processed.
+*
+* Return(s)   : Index in buffer of the IPv6 Next header.
+*
+* Caller(s)   : NetIPv6_RxPktProcessExtHdr().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+static  CPU_INT16U  NetIPv6_RxFragHdr (NET_BUF            *p_buf,
+                                       NET_IPv6_NEXT_HDR  *p_next_hdr,
+                                       NET_ERR            *p_err)
+{
+    CPU_INT08U         *p_data;
+    NET_BUF_HDR        *p_buf_hdr;
+    NET_IPv6_FRAG_HDR  *p_frag_hdr;
+    CPU_INT16U          next_protocol_ix;
+
+
+    p_buf_hdr  = &p_buf->Hdr;                                     /* Get ptr to buf hdr.                                  */
+    p_data     =  p_buf->DataPtr;
+
+                                                                /* Get frag hdr from pkt data space.                    */
+    p_frag_hdr = (NET_IPv6_FRAG_HDR *)&p_data[p_buf_hdr->IPv6_FragHdrIx];
+
+                                                                /* Get frag flag & ID.                                  */
+    p_buf_hdr->IPv6_Flags_FragOffset = NET_UTIL_NET_TO_HOST_16(p_frag_hdr->FragOffsetFlag);
+    p_buf_hdr->IPv6_ID               = NET_UTIL_NET_TO_HOST_32(p_frag_hdr->ID);
+
+                                                                /* Calculate next hdr ptr.                              */
+    next_protocol_ix                = p_buf_hdr->IPv6_FragHdrIx + NET_IPv6_FRAG_HDR_SIZE;
+    p_buf_hdr->DataLen              -=                            NET_IPv6_FRAG_HDR_SIZE;
+    p_buf_hdr->IPv6_ExtHdrLen       +=                            NET_IPv6_FRAG_HDR_SIZE;
+
+
+   *p_next_hdr = p_frag_hdr->NextHdr;
+   *p_err      = NET_IPv6_ERR_NONE;
+    return (next_protocol_ix);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIPv6_RxESP_Hdr()
+*
+* Description : Process the received ESP (Encapsulation Security Payload) extension header.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv6 datagram.
+*               ----        Argument checked   in NetIPv6_Rx().
+*
+*               p_next_hdr  Pointer to IPv6 next header object.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+* Return(s)   : Index in buffer of the IPv6 Next header.
+*
+* Caller(s)   : NetIPv6_RxPktProcessExtHdr().
+*
+* Note(s)     : (1) ESP Extension Header is not yet supported.
+*********************************************************************************************************
+*/
+static  CPU_INT16U  NetIPv6_RxESP_Hdr (NET_BUF            *p_buf,
+                                       NET_IPv6_NEXT_HDR  *p_next_hdr,
+                                       NET_ERR            *p_err)
+{
+   (void)&p_buf;
+   (void)&p_next_hdr;
+
+   *p_err = NET_IPv6_ERR_INVALID_EH;
+
+    return (0u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIPv6_RxAuthHdr()
+*
+* Description : Process the received Authentication Extension Header.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv6 datagram.
+*               ----        Argument checked   in NetIPv6_Rx().
+*
+*               p_next_hdr  Pointer to IPv6 next header object.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+* Return(s)   : Index in buffer of the IPv6 Next header.
+*
+* Caller(s)   : NetIPv6_RxPktProcessExtHdr().
+*
+* Note(s)     : (1) Authentication Extension Header is not yet supported. Therefore the function does not
+*                   process the header and only set the pointer to the next header.
+*********************************************************************************************************
+*/
+static  CPU_INT16U  NetIPv6_RxAuthHdr (NET_BUF            *p_buf,
+                                       NET_IPv6_NEXT_HDR  *p_next_hdr,
+                                       NET_ERR            *p_err)
+{
+    NET_BUF_HDR                    *p_buf_hdr;
+    CPU_INT08U                     *p_data;
+    NET_IPv6_AUTHENTICATION_HDR    *pauth_hdr;
+    CPU_INT16U                      eh_len;
+    CPU_INT16U                      next_hdr_offset;
+
+                                                                /* Get ptr to buf hdr.                                  */
+    p_buf_hdr  = &p_buf->Hdr;
+    p_data     =  p_buf->DataPtr;
+
+                                                                /* Get Auth hdr from pkt data space.                    */
+    pauth_hdr = (NET_IPv6_AUTHENTICATION_HDR *)&p_data[p_buf_hdr->IP_HdrIx];
+
+    eh_len    = ((pauth_hdr->HdrLen + 2)>>1) * NET_IPv6_EH_ALIGN_SIZE;
+    p_buf_hdr->DataLen        -= eh_len;
+    p_buf_hdr->IPv6_ExtHdrLen += eh_len;
+
+    next_hdr_offset = p_buf_hdr->IPv6_AuthHdrIx + eh_len;
+
+   *p_next_hdr = pauth_hdr->NextHdr;
+   *p_err      = NET_IPv6_ERR_NONE;
+
+    return (next_hdr_offset);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIPv6_RxNoneHdr()
+*
+* Description : Process the received None Extension Header.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv6 datagram.
+*               ----        Argument checked   in NetIPv6_Rx().
+*
+*               p_next_hdr  Pointer to IPv6 next header object.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+* Return(s)   : Index in buffer of the IPv6 Next header.
+*
+* Caller(s)   : NetIPv6_RxPktProcessExtHdr().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if 0
+static  CPU_INT16U  NetIPv6_RxNoneHdr (NET_BUF            *p_buf,
+    NET_CTR_ERR_INC(Net_ErrCtrs.NetIPv6_ErrRxHdrOptsCtr);
+                                       NET_IPv6_NEXT_HDR  *p_next_hdr,
+                                       NET_ERR            *p_err)
+{
+    (void)&p_buf;
+    (void)&p_next_hdr;
+    (void)&p_err;
+
+    return (0u);
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                        NetIPv6_RxMobilityHdr()
+*
+* Description : Process the received Mobility Extension Header.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv6 datagram.
+*               ----        Argument checked   in NetIPv6_Rx().
+*
+*               p_next_hdr  Pointer to IPv6 next header object.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+* Return(s)   : Index in buffer of the IPv6 Next header.
+*
+* Caller(s)   : NetIPv6_RxPktProcessExtHdr().
+*
+* Note(s)     : (1) IPv6 Mobility Extension header is not yet supported.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  NetIPv6_RxMobilityHdr (NET_BUF            *p_buf,
+                                           NET_IPv6_NEXT_HDR  *p_next_hdr,
+                                           NET_ERR            *p_err)
+{
+   (void)&p_buf;
+   (void)&p_next_hdr;
+
+   *p_err = NET_IPv6_ERR_INVALID_EH;
+
+    return (0u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_RxPktFragReasm()
+*
+* Description : (1) Reassemble any IPv6 datagram fragments :
+*
+*                   (a) Determine if received IPv6 packet is a fragment
+*                   (b) Reassemble IPv6 fragments, when possible
+*
+*               (2) (a) Received fragments are reassembled by sorting datagram fragments into fragment lists
+*                       (also known as 'Fragmented Datagrams') grouped by the following IPv6 header fields :
+*
+*                       (1) Source      Address
+*                       (2) Destination Address
+*                       (3) Identification
+*
+*                   (b) Fragment lists are linked to form a list of Fragment Lists/Fragmented Datagrams.
+*
+*                       (1) In the diagram below, ... :
+*
+*                           (A) The top horizontal row  represents the list of fragment lists.
+*
+*                           (B) Each    vertical column represents the fragments in the same fragment list/
+*                               Fragmented Datagram.
+*
+*                           (C) (1) 'NetIPv6_FragReasmListsHead' points to the head of the Fragment Lists;
+*                               (2) 'NetIPv6_FragReasmListsTail' points to the tail of the Fragment Lists.
+*
+*                           (D) Fragment buffers' 'PrevPrimListPtr' & 'NextPrimListPtr' doubly-link each fragment
+*                               list's head buffer to form the list of Fragment Lists.
+*
+*                           (E) Fragment buffer's 'PrevBufPtr'      & 'NextBufPtr'      doubly-link each fragment
+*                               in a fragment list.
+*
+*                       (2) (A) For each received fragment, all fragment lists are searched in order to insert the
+*                               fragment into the ap_propriate fragment list--i.e. the fragment list with identical
+*                               fragment list IPv6 header field values (see Note #2a).
+*
+*                           (B) If a received fragment is the first fragment with its specific fragment list IPv6
+*                               header field values, the received fragment starts a new fragment list which is
+*                               added at the tail of the Fragment Lists.
+*
+*                               See also Note #3b2.
+*
+*                           (C) To expedite faster fragment list searches :
+*
+*                               (1) (a) Fragment lists are added             at the tail of the Fragment Lists;
+*                                   (b) Fragment lists are searched starting at the head of the Fragment Lists.
+*
+*                               (2) As fragments are received & processed into fragment lists, older fragment
+*                                   lists migrate to the head of the Fragment Lists.  Once a fragment list is
+*                                   reassembled or discarded, it is removed from the Fragment Lists.
+*
+*                       (3) Fragment buffer size is irrelevant & ignored in the fragment reassembly procedure--
+*                           i.e. the procedure functions correctly regardless of the buffer sizes used for any &
+*                           all received fragments.
+*
+*
+*
+*                                        |                   List of                     |
+*                                        |<----------- Fragmented Datagrams ------------>|
+*                                        |               (see Note #2b1A)                |
+*
+*                               Oldest Fragmented Datagram                    New fragment lists
+*                                   in Fragment Lists                          inserted at tail
+*                                   (see Note #2b2C2)                         (see Note #2b2C1a)
+*
+*                                           |        NextPrimListPtr                  |
+*                                           |       (see Note #2b1D)                  |
+*                                           v                   |                     v
+*                                                               |
+*             ---         Head of        -------       -------  v    -------       -------  (see Note #2b1C2)
+*              ^          Fragment  ---->|     |------>|     |------>|     |------>|     |
+*              |           Lists         |     |       |     |       |     |       |     |       Tail of
+*              |                         |     |<------|     |<------|     |<------|     |<----  Fragment
+*              |     (see Note #2b1C1)   |     |       |     |  ^    |     |       |     |        Lists
+*              |                         |     |       |     |  |    |     |       |     |
+*              |                         -------       -------  |    -------       -------
+*              |                           | ^                  |      | ^
+*              |                           | |       PrevPrimListPtr   | |
+*              |                           v |      (see Note #2b1D)   v |
+*              |                         -------                     -------
+*                                        |     |                     |     |
+*     Fragments in the same              |     |                     |     |
+*      Fragmented Datagram               |     |                     |     |
+*       (see Note #2b1B)                 |     |                     |     |
+*                                        |     |                     |     |        Fragments in a fragment
+*              |                         -------                     -------        list may use different
+*              |                           | ^                         | ^           size network buffers
+*              |           NextBufPtr ---> | | <--- PrevBufPtr         | |             (see Note #2b3)
+*              |        (see Note #2b1E)   v |   (see Note #2b1E)      v |
+*              |                         -------                     -------        The last fragment in a
+*              |                         |     |                     |     |  <--- fragment list may likely
+*              |                         |     |                     |     |       use a smaller buffer size
+*              |                         |     |                     -------
+*              |                         |     |
+*              v                         |     |
+*             ---                        -------
+*
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer that received IPv6 packet.
+*               ----        Argument checked   in NetIPv6_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header.
+*               --------    Argument validated in NetIPv6_Rx().
+*
+*               p_ip_hdr     Pointer to received packet's IPv6 header.
+*               -------     Argument checked   in NetIPv6_RxPktValidate().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_RX_FRAG_NONE       Datagram complete; NOT a fragment (see Note #3b1B).
+*
+*                                                               ------- RETURNED BY NetIPv6_RxPktFragListAdd() : --------
+*                                                               ------ RETURNED BY NetIPv6_RxPktFragListInsert() : ------
+*                               NET_IPv6_ERR_RX_FRAG_REASM      Fragments in reassembly progress.
+*                               NET_IPv6_ERR_RX_FRAG_DISCARD    Fragment &/or datagram discarded.
+*                               NET_IPv6_ERR_RX_FRAG_OFFSET     Invalid fragment offset.
+*                               NET_IPv6_ERR_RX_FRAG_SIZE       Invalid fragment size.
+*                               NET_IPv6_ERR_RX_FRAG_LEN_TOT    Invalid fragment   datagram total IPv6 length.
+*
+*                                                               ------ RETURNED BY NetIPv6_RxPktFragListInsert() : ------
+*                               NET_IPv6_ERR_RX_FRAG_COMPLETE   Datagram complete; fragments reassembled (see Note #3b3).
+*                               NET_IPv6_ERR_RX_FRAG_SIZE_TOT   Invalid fragmented datagram total size.
+*
+* Return(s)   : Pointer to reassembled datagram, if fragment reassembly complete.
+*
+*               Pointer to NULL,                 if fragment reassembly in progress.
+*
+*               Pointer to fragment buffer,      for any fragment discard error.
+*
+* Caller(s)   : NetIPv6_Rx().
+*
+* Note(s)     : (3) (a) RFC #2460, Section 4.5 'Fragment Header' states that the following IPv6 header
+*                       fields are "used together ... to identify datagram fragments for reassembly" :
+*
+*                       (1) Internet identification field (ID)
+*                       (2) source      address
+*                       (3) destination address
+*
+*               (4) (a) Fragment lists are accessed by :
+*
+*                       (1) NetIPv6_RxPktFragReasm()
+*                       (2) Fragment list's 'TMR->Obj' pointer      during execution of NetIPv6_RxPktFragTimeout()
+*
+*                   (b) Since the primary tasks of the network protocol suite are prevented from running
+*                       concurrently (see 'net.h  Note #3'), it is NOT necessary to protect the shared
+*                       resources of the fragment lists since no asynchronous access from other network
+*                       tasks is possible.
+*********************************************************************************************************
+*/
+
+static  NET_BUF  *NetIPv6_RxPktFragReasm (NET_BUF        *p_buf,
+                                          NET_BUF_HDR    *p_buf_hdr,
+                                          NET_IPv6_HDR   *p_ip_hdr,
+                                          NET_ERR        *p_err)
+{
+#if 0
+    NET_IPv6_HDR   *p_frag_list_ip_hdr;
+#endif
+    CPU_BOOLEAN     frag;
+    CPU_BOOLEAN     frag_done;
+    CPU_BOOLEAN     ip_flag_frags_more;
+    CPU_BOOLEAN     addr_cmp;
+    CPU_INT16U      ip_flags;
+    CPU_INT16U      frag_offset;
+    CPU_INT16U      frag_size;
+    NET_BUF        *p_frag;
+    NET_BUF        *p_frag_list;
+    NET_BUF_HDR    *p_frag_list_buf_hdr;
+
+
+                                                                /* -------------- CHK FRAG REASM REQUIRED ------------- */
+    frag = DEF_NO;
+
+    ip_flags           = p_buf_hdr->IPv6_Flags_FragOffset & NET_IPv6_FRAG_FLAGS_MASK;
+    ip_flag_frags_more = DEF_BIT_IS_SET(ip_flags, NET_IPv6_FRAG_FLAG_FRAG_MORE);
+    if (ip_flag_frags_more != DEF_NO) {                         /* If 'More Frags' set (see Note #3b1A2), ...           */
+        frag  = DEF_YES;                                        /* ... mark as frag.                                    */
+    }
+
+    frag_offset = p_buf_hdr->IPv6_Flags_FragOffset & NET_IPv6_FRAG_OFFSET_MASK;
+    if (frag_offset != NET_IPv6_FRAG_OFFSET_NONE) {             /* If frag offset != 0 (see Note #3b1A1), ...           */
+        frag  = DEF_YES;                                        /* ... mark as frag.                                    */
+    }
+
+    if (frag != DEF_YES) {                                      /* If pkt NOT a frag, ...                               */
+       *p_err  = NET_IPv6_ERR_RX_FRAG_NONE;
+        return (p_buf);                                          /* ... rtn non-frag'd datagram (see Note #3b1B).        */
+    }
+
+    NET_CTR_STAT_INC(Net_StatCtrs.IPv6.RxFragCtr);
+
+
+                                                                /* ------------------- REASM FRAGS -------------------- */
+    frag_size   = p_buf_hdr->IP_TotLen - p_buf_hdr->IPv6_ExtHdrLen;
+    p_frag_list = NetIPv6_FragReasmListsHead;
+    frag_done   = DEF_NO;
+
+    while (frag_done == DEF_NO) {                               /* Insert frag into a frag list.                        */
+
+        if (p_frag_list != (NET_BUF *)0) {                      /* Srch ALL existing frag lists first (see Note #2b2A). */
+            p_frag_list_buf_hdr =                 &p_frag_list->Hdr;
+#if 0
+            p_frag_list_ip_hdr  = (NET_IPv6_HDR *)&p_frag_list->DataPtr[p_frag_list_buf_hdr->IP_HdrIx];
+#endif
+                                                                                /* If frag & this frag list's    ...    */
+
+            addr_cmp = Mem_Cmp(&p_buf_hdr->IPv6_AddrSrc, &p_frag_list_buf_hdr->IPv6_AddrSrc, NET_IPv6_ADDR_SIZE);
+
+            if (addr_cmp == DEF_YES) {                                          /* ... src  addr (see Note #2a1) ...    */
+                addr_cmp = Mem_Cmp(&p_buf_hdr->IPv6_AddrDest, &p_frag_list_buf_hdr->IPv6_AddrDest, NET_IPv6_ADDR_SIZE);
+                if (addr_cmp == DEF_YES) {                                      /* ... dest addr (see Note #2a2) ...    */
+                    if (p_buf_hdr->IPv6_ID    == p_frag_list_buf_hdr->IPv6_ID) {/* ... ID        (see Note #2a3) ...    */
+#if 0
+                        if (p_ip_hdr->NextHdr == p_frag_list_ip_hdr->NextHdr) { /* ... next hdr  (see Note #2a4) ...    */
+                                                                                /* ... fields identical,         ...    */
+#endif
+                        p_frag    = NetIPv6_RxPktFragListInsert(p_buf,          /* ... insert frag into frag list.      */
+                                                                p_buf_hdr,
+                                                                ip_flags,
+                                                                frag_offset,
+                                                                frag_size,
+                                                                p_frag_list,
+                                                                p_err);
+                        frag_done = DEF_YES;
+#if 0
+                        }
+#endif
+                    }
+                }
+            }
+
+            if (frag_done != DEF_YES) {                         /* If NOT done, adv to next frag list.                  */
+                p_frag_list = p_frag_list_buf_hdr->NextPrimListPtr;
+            }
+
+        } else {                                                /* Else add new frag list (see Note #2b2B).             */
+            p_frag    = NetIPv6_RxPktFragListAdd(p_buf,
+                                                 p_buf_hdr,
+                                                 ip_flags,
+                                                 frag_offset,
+                                                 frag_size,
+                                                 p_err);
+            frag_done = DEF_YES;
+        }
+    }
+
+   (void)&p_ip_hdr;
+
+    return (p_frag);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_RxPktFragListAdd()
+*
+* Description : (1) Add fragment as new fragment list at end of Fragment Lists :
+*
+*                   (a) Get    fragment reassembly timer
+*                   (b) Insert fragment into Fragment Lists
+*                   (c) Update fragment list reassembly calculations
+*
+*
+* Argument(s) : p_buf           Pointer to network buffer that received fragment.
+*               ----            Argument checked   in NetIPv6_Rx().
+*
+*               p_buf_hdr       Pointer to network buffer header.
+*               --------        Argument validated in NetIPv6_Rx().
+*
+*               frag_ip_flags   Fragment IPv6 header flags.
+*               -------------   Argument validated in NetIPv6_RxPktFragReasm().
+*
+*               frag_offset     Fragment offset.
+*
+*               frag_size       Fragment size (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_RX_FRAG_REASM      Fragment reassembly in progress.
+*                               NET_IPv6_ERR_RX_FRAG_DISCARD    Fragment discarded.
+*                               NET_IPv6_ERR_RX_FRAG_OFFSET     Invalid  fragment offset.
+*                               NET_IPv6_ERR_RX_FRAG_SIZE       Invalid  fragment size.
+*
+*                                                               - RETURNED BY NetIPv6_RxPktFragListUpdate() : -
+*                               NET_IPv6_ERR_RX_FRAG_LEN_TOT    Invalid fragment datagram total IPv6 length.
+*
+* Return(s)   : Pointer to NULL,            if fragment added as new fragment list.
+*
+*               Pointer to fragment buffer, for any fragment discard error.
+*
+* Caller(s)   : NetIPv6_RxPktFragReasm().
+*
+* Note(s)     : (2) (a) RFC #2460, Section 4.5 'Fragment Header' states that "if an internet
+*                       datagram is fragmented" :
+*
+*                       (1) (A) "Fragments are counted in units of 8 octets."
+*                           (B) "The minimum fragment is 8 octets."
+*
+*                       (2) (A) However, this CANNOT apply "if this is the last fragment" ...
+*                               (1) "(that is the more fragments field is zero)";         ...
+*                           (B) Which may be of ANY size.
+*
+*               (3) During fragment list insertion, some fragment buffer controls were previously initialized
+*                   in NetBuf_Get() when the packet was received at the network interface layer.  These buffer
+*                   controls do NOT need to be re-initialized but are shown for completeness.
+*********************************************************************************************************
+*/
+
+static  NET_BUF  *NetIPv6_RxPktFragListAdd (NET_BUF      *p_buf,
+                                            NET_BUF_HDR  *p_buf_hdr,
+                                            CPU_INT16U    frag_ip_flags,
+                                            CPU_INT32U    frag_offset,
+                                            CPU_INT32U    frag_size,
+                                            NET_ERR      *p_err)
+{
+    CPU_BOOLEAN    ip_flag_frags_more;
+    CPU_INT16U     frag_size_min;
+    NET_TMR_TICK   timeout_tick;
+    NET_ERR        tmr_err;
+    NET_BUF       *p_frag;
+    NET_BUF_HDR   *p_frag_list_tail_buf_hdr;
+    CPU_SR_ALLOC();
+
+
+                                                                /* ------------------- VALIDATE FRAG ------------------ */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (frag_offset > NET_IPv6_FRAG_OFFSET_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvFragOffsetCtr);
+       *p_err =  NET_IPv6_ERR_RX_FRAG_OFFSET;
+        return (p_buf);
+    }
+#endif
+
+    ip_flag_frags_more =  DEF_BIT_IS_SET(frag_ip_flags, NET_IPv6_FRAG_FLAG_FRAG_MORE);
+    frag_size_min      = (ip_flag_frags_more == DEF_YES) ? NET_IPv6_FRAG_SIZE_MIN_FRAG_MORE
+                                                         : NET_IPv6_FRAG_SIZE_MIN_FRAG_LAST;
+    if (frag_size < frag_size_min) {                            /* See Note #2a.                                        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxFragSizeCtr);
+       *p_err =  NET_IPv6_ERR_RX_FRAG_SIZE;
+        return (p_buf);
+    }
+
+    if (frag_size > NET_IPv6_FRAG_SIZE_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxFragSizeCtr);
+       *p_err =  NET_IPv6_ERR_RX_FRAG_SIZE;
+        return (p_buf);
+    }
+
+    if ((ip_flag_frags_more                    == DEF_YES) &&
+        ((frag_size % NET_IPv6_FRAG_SIZE_UNIT) != 0u)) {
+#ifdef  NET_ICMPv6_MODULE_EN
+        NetICMPv6_TxMsgErr(p_buf,
+                           NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                           NET_ICMPv6_MSG_CODE_PARAM_PROB_IP_HDR,
+                           NET_ICMPv6_PTR_IX_IP_PAYLOAD_LEN,
+                           p_err);
+#endif
+        *p_err =  NET_IPv6_ERR_RX_FRAG_SIZE;
+        return (p_buf);
+    }
+
+
+                                                                /* ------------------- GET FRAG TMR ------------------- */
+    CPU_CRITICAL_ENTER();
+    timeout_tick     = NetIPv6_FragReasmTimeout_tick;
+    CPU_CRITICAL_EXIT();
+    p_buf_hdr->TmrPtr = NetTmr_Get((CPU_FNCT_PTR) NetIPv6_RxPktFragTimeout,
+                                  (void       *) p_buf,
+                                  (NET_TMR_TICK) timeout_tick,
+                                  (CPU_INT16U  ) NET_TMR_FLAG_NONE,
+                                  (NET_ERR    *)&tmr_err);
+    if (tmr_err != NET_TMR_ERR_NONE) {                          /* If tmr unavail, discard frag.                        */
+       *p_err =  NET_IPv6_ERR_RX_FRAG_DISCARD;
+        return (p_buf);
+    }
+
+
+                                                                /* ------------ INSERT FRAG INTO FRAG LISTS ----------- */
+    if (NetIPv6_FragReasmListsTail != (NET_BUF *)0) {           /* If frag lists NOT empty, insert @ tail.              */
+        p_buf_hdr->PrevPrimListPtr                = (NET_BUF     *) NetIPv6_FragReasmListsTail;
+        p_frag_list_tail_buf_hdr                  = (NET_BUF_HDR *)&NetIPv6_FragReasmListsTail->Hdr;
+        p_frag_list_tail_buf_hdr->NextPrimListPtr = (NET_BUF     *) p_buf;
+        NetIPv6_FragReasmListsTail               = (NET_BUF     *) p_buf;
+
+    } else {                                                    /* Else add frag as first frag list.                    */
+        NetIPv6_FragReasmListsHead               = (NET_BUF     *) p_buf;
+        NetIPv6_FragReasmListsTail               = (NET_BUF     *) p_buf;
+        p_buf_hdr->PrevPrimListPtr                = (NET_BUF     *) 0;
+    }
+
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #3].                */
+    p_buf_hdr->NextPrimListPtr = (NET_BUF *)0;
+    p_buf_hdr->PrevBufPtr      = (NET_BUF *)0;
+    p_buf_hdr->NextBufPtr      = (NET_BUF *)0;
+    p_buf_hdr->IP_FragSizeTot  =  NET_IPv6_FRAG_SIZE_NONE;
+    p_buf_hdr->IP_FragSizeCur  =  0u;
+#endif
+
+
+                                                                /* ----------------- UPDATE FRAG CALCS ---------------- */
+    NetIPv6_RxPktFragListUpdate(p_buf,
+                                p_buf_hdr,
+                                frag_ip_flags,
+                                frag_offset,
+                                frag_size,
+                                p_err);
+    if (*p_err !=  NET_IPv6_ERR_NONE) {
+         return ((NET_BUF *)0);
+    }
+
+
+   *p_err  =  NET_IPv6_ERR_RX_FRAG_REASM;
+    p_frag = (NET_BUF *)0;
+
+    return (p_frag);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_RxPktFragListInsert()
+*
+* Description : (1) Insert fragment into corresponding fragment list.
+*
+*                   (a) Fragments are sorted into fragment lists by fragment offset.
+*
+*
+* Argument(s) : p_buf           Pointer to network buffer that received fragment.
+*               ----            Argument checked   in NetIPv6_Rx().
+*
+*               p_buf_hdr       Pointer to network buffer header.
+*               --------        Argument validated in NetIPv6_Rx().
+*
+*               frag_ip_flags   Fragment IPv6 header flags.
+*               -------------   Argument validated in NetIPv6_RxPktFragReasm().
+*
+*               frag_offset     Fragment offset.
+*
+*               frag_size       Fragment size (in octets).
+*
+*               p_frag_list     Pointer to fragment list head buffer.
+*               ----------      Argument validated in NetIPv6_RxPktFragReasm().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_RX_FRAG_REASM      Fragment reassembly in progress.
+*                               NET_IPv6_ERR_RX_FRAG_DISCARD    Fragment discarded.
+*                               NET_IPv6_ERR_RX_FRAG_OFFSET     Invalid  fragment offset.
+*                               NET_IPv6_ERR_RX_FRAG_SIZE       Invalid  fragment size.
+*
+*                                                               -- RETURNED BY NetIPv6_RxPktFragListChkComplete() : -
+*                               NET_IPv6_ERR_RX_FRAG_COMPLETE   Datagram complete; fragments reassembled.
+*                               NET_IPv6_ERR_RX_FRAG_SIZE_TOT   Invalid fragmented datagram total size.
+*
+*                                                               --- RETURNED BY NetIPv6_RxPktFragListUpdate() : ---
+*                                                               - RETURNED BY NetIPv6_RxPktFragListChkComplete() : -
+*                               NET_IPv6_ERR_RX_FRAG_LEN_TOT    Invalid fragment   datagram total IPv6 length.
+*
+* Return(s)   : Pointer to reassembled datagram, if fragment reassembly complete.
+*
+*               Pointer to NULL,                 if fragment reassembly in progress.
+*
+*               Pointer to fragment buffer,      for any fragment discard error.
+*
+* Caller(s)   : NetIPv6_RxPktFragReasm().
+*
+* Note(s)     : (2) Assumes ALL fragments in fragment lists have previously been validated for buffer &
+*                   IPv6 header fields.
+*
+*               (3) During fragment list insertion, some fragment buffer controls were previously
+*                   initialized in NetBuf_Get() when the packet was received at the network interface
+*                   layer.  These buffer controls do NOT need to be re-initialized but are shown for
+*                   completeness.
+*********************************************************************************************************
+*/
+
+static  NET_BUF  *NetIPv6_RxPktFragListInsert (NET_BUF      *p_buf,
+                                               NET_BUF_HDR  *p_buf_hdr,
+                                               CPU_INT16U    frag_ip_flags,
+                                               CPU_INT32U    frag_offset,
+                                               CPU_INT32U    frag_size,
+                                               NET_BUF      *p_frag_list,
+                                               NET_ERR      *p_err)
+{
+#if 0
+    CPU_INT16U    frag_size_cur;
+#endif
+    CPU_BOOLEAN   ip_flag_frags_more;
+    CPU_BOOLEAN   frag_insert_done;
+    CPU_BOOLEAN   frag_list_discard;
+    CPU_INT16U    frag_offset_actual;
+    CPU_INT16U    frag_list_cur_frag_offset;
+    CPU_INT16U    frag_list_cur_frag_offset_actual;
+    CPU_INT16U    frag_list_prev_frag_offset;
+    CPU_INT16U    frag_list_prev_frag_offset_actual;
+    CPU_INT16U    frag_size_min;
+    NET_BUF      *p_frag;
+    NET_BUF      *p_frag_list_prev_buf;
+    NET_BUF      *p_frag_list_cur_buf;
+    NET_BUF      *p_frag_list_prev_list;
+    NET_BUF      *p_frag_list_next_list;
+    NET_BUF_HDR  *p_frag_list_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_prev_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_cur_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_prev_list_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_next_list_buf_hdr;
+    NET_TMR      *p_tmr;
+    NET_ERR       err;
+
+
+                                                                /* ------------------- VALIDATE FRAG ------------------ */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (frag_offset > NET_IPv6_FRAG_OFFSET_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvFragOffsetCtr);
+       *p_err =  NET_IPv6_ERR_RX_FRAG_OFFSET;
+        return (p_buf);
+    }
+#endif
+
+    ip_flag_frags_more =  DEF_BIT_IS_SET(frag_ip_flags, NET_IPv6_FRAG_FLAG_FRAG_MORE);
+    frag_size_min      = (ip_flag_frags_more == DEF_YES) ? NET_IPv6_FRAG_SIZE_MIN_FRAG_MORE
+                                                         : NET_IPv6_FRAG_SIZE_MIN_FRAG_LAST;
+    if (frag_size < frag_size_min) {                            /* See Note #2a1.                                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxFragSizeCtr);
+       *p_err =  NET_IPv6_ERR_RX_FRAG_SIZE;
+        return (p_buf);
+    }
+
+    if (frag_size > NET_IPv6_FRAG_SIZE_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxFragSizeCtr);
+       *p_err =  NET_IPv6_ERR_RX_FRAG_SIZE;
+        return (p_buf);
+    }
+
+    if ((ip_flag_frags_more                    == DEF_YES) &&
+        ((frag_size % NET_IPv6_FRAG_SIZE_UNIT) != 0u)) {
+#ifdef  NET_ICMPv6_MODULE_EN
+        NetICMPv6_TxMsgErr(p_buf,
+                           NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                           NET_ICMPv6_MSG_CODE_PARAM_PROB_IP_HDR,
+                           NET_ICMPv6_PTR_IX_IP_PAYLOAD_LEN,
+                           p_err);
+#endif
+        *p_err =  NET_IPv6_ERR_RX_FRAG_SIZE;
+        return (p_buf);
+    }
+
+
+                                                                        /* ------- INSERT FRAG INTO FRAG LISTS -------- */
+    frag_insert_done       =  DEF_NO;
+
+    p_frag_list_cur_buf     =  p_frag_list;
+    p_frag_list_cur_buf_hdr = &p_frag_list_cur_buf->Hdr;
+
+    while (frag_insert_done == DEF_NO) {
+
+        frag_list_cur_frag_offset = p_frag_list_cur_buf_hdr->IPv6_Flags_FragOffset & NET_IPv6_FRAG_OFFSET_MASK;
+        if (frag_offset > frag_list_cur_frag_offset) {                  /* While frag offset > cur frag offset, ...     */
+
+            if (p_frag_list_cur_buf_hdr->NextBufPtr != (NET_BUF *)0) {   /* ... adv to next frag in list.                */
+                p_frag_list_cur_buf     =  p_frag_list_cur_buf_hdr->NextBufPtr;
+                p_frag_list_cur_buf_hdr = &p_frag_list_cur_buf->Hdr;
+
+            } else {                                                    /* If @ last frag in list, append frag @ end.   */
+                frag_offset_actual               =  frag_offset;
+                frag_list_cur_frag_offset_actual =  frag_list_cur_frag_offset
+                                                 + (p_frag_list_cur_buf_hdr->IP_TotLen - p_frag_list_cur_buf_hdr->IPv6_ExtHdrLen);
+
+                if (frag_offset_actual >= frag_list_cur_frag_offset_actual) {   /* If frag does NOT overlap, ...        */
+                                                                                /* ... append @ end of frag list.       */
+                    p_buf_hdr->PrevBufPtr               = (NET_BUF *)p_frag_list_cur_buf;
+#if 0                                                                   /* Init'd in NetBuf_Get() [see Note #4].        */
+                    p_buf_hdr->NextBufPtr               = (NET_BUF *)0;
+                    p_buf_hdr->PrevPrimListPtr          = (NET_BUF *)0;
+                    p_buf_hdr->NextPrimListPtr          = (NET_BUF *)0;
+                    p_buf_hdr->TmrPtr                   = (NET_TMR *)0;
+                    p_buf_hdr->IP_FragSizeTot           =  NET_IPv6_FRAG_SIZE_NONE;
+                    p_buf_hdr->IP_FragSizeCur           =  0u;
+#endif
+
+                    p_frag_list_cur_buf_hdr->NextBufPtr = (NET_BUF *)p_buf;
+
+
+                    p_frag_list_buf_hdr = &p_frag_list->Hdr;
+                    NetIPv6_RxPktFragListUpdate(p_frag_list,            /* Update frag list reasm calcs.                */
+                                                p_frag_list_buf_hdr,
+                                                frag_ip_flags,
+                                                frag_offset,
+                                                frag_size,
+                                                p_err);
+                    if (*p_err !=  NET_IPv6_ERR_NONE) {
+                         return ((NET_BUF *)0);
+                    }
+                                                                        /* Chk    frag list reasm complete.             */
+                    p_frag = NetIPv6_RxPktFragListChkComplete(p_frag_list,
+                                                              p_frag_list_buf_hdr,
+                                                              p_err);
+
+                } else {                                                /* Else discard overlap frag & datagram.        */
+                    NetIPv6_RxPktFragListDiscard(p_frag_list, DEF_YES, &err);
+                    NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxFragDisCtr);
+                    p_frag = p_buf;
+                   *p_err  = NET_IPv6_ERR_RX_FRAG_DISCARD;
+                }
+
+                frag_insert_done = DEF_YES;
+            }
+
+
+        } else if (frag_offset < frag_list_cur_frag_offset) {           /* If frag offset < cur frag offset, ...        */
+                                                                        /* ... insert frag into frag list.              */
+            frag_list_discard                = DEF_NO;
+
+            frag_offset_actual               = frag_offset+ frag_size;
+            frag_list_cur_frag_offset_actual = frag_list_cur_frag_offset;
+
+            if (frag_offset_actual > frag_list_cur_frag_offset_actual) {/* If frag overlaps with next frag, ...         */
+                frag_list_discard  = DEF_YES;                           /* ... discard frag & datagram (see Note #1b2). */
+
+            } else if (p_frag_list_cur_buf_hdr->PrevBufPtr != (NET_BUF *)0) {
+                p_frag_list_prev_buf               =  p_frag_list_cur_buf_hdr->PrevBufPtr;
+                p_frag_list_prev_buf_hdr           = &p_frag_list_prev_buf->Hdr;
+
+                frag_offset_actual                =   frag_offset;
+
+                frag_list_prev_frag_offset        =  p_frag_list_prev_buf_hdr->IPv6_Flags_FragOffset & NET_IPv6_FRAG_OFFSET_MASK;
+                frag_list_prev_frag_offset_actual =   frag_list_prev_frag_offset
+                                                  + (p_frag_list_prev_buf_hdr->IP_TotLen - p_frag_list_prev_buf_hdr->IP_HdrLen);
+                                                                        /* If frag overlaps with prev frag, ...         */
+                if (frag_offset_actual < frag_list_prev_frag_offset_actual) {
+                    frag_list_discard  = DEF_YES;                       /* ... discard frag & datagram (see Note #1b2). */
+                }
+            }
+
+            if (frag_list_discard == DEF_NO) {                          /* If frag does NOT overlap, ...                */
+                                                                        /* ... insert into frag list.                   */
+                p_buf_hdr->PrevBufPtr = p_frag_list_cur_buf_hdr->PrevBufPtr;
+                p_buf_hdr->NextBufPtr = p_frag_list_cur_buf;
+
+                if (p_buf_hdr->PrevBufPtr != (NET_BUF *)0) {             /* Insert p_buf between prev & cur bufs.         */
+                    p_frag_list_prev_buf                     =  p_buf_hdr->PrevBufPtr;
+                    p_frag_list_prev_buf_hdr                 = &p_frag_list_prev_buf->Hdr;
+
+                    p_frag_list_prev_buf_hdr->NextBufPtr     =  p_buf;
+                    p_frag_list_cur_buf_hdr->PrevBufPtr      =  p_buf;
+
+#if 0                                                                   /* Init'd in NetBuf_Get() [see Note #4].        */
+                    p_buf_hdr->PrevPrimListPtr               = (NET_BUF *)0;
+                    p_buf_hdr->NextPrimListPtr               = (NET_BUF *)0;
+                    p_buf_hdr->TmrPtr                        = (NET_TMR *)0;
+                    p_buf_hdr->IP_FragSizeTot                =  NET_IPv6_FRAG_SIZE_NONE;
+                    p_buf_hdr->IP_FragSizeCur                =  0u;
+#endif
+
+                } else {                                                /* Else p_buf is new frag list head.             */
+                    p_frag_list                              =  p_buf;
+                                                                        /* Move frag list head info to cur buf ...      */
+                                                                        /* ... (see Note #2b1).                         */
+                    p_buf_hdr->PrevPrimListPtr               =  p_frag_list_cur_buf_hdr->PrevPrimListPtr;
+                    p_buf_hdr->NextPrimListPtr               =  p_frag_list_cur_buf_hdr->NextPrimListPtr;
+                    p_buf_hdr->TmrPtr                        =  p_frag_list_cur_buf_hdr->TmrPtr;
+                    p_buf_hdr->IP_FragSizeTot                =  p_frag_list_cur_buf_hdr->IP_FragSizeTot;
+                    p_buf_hdr->IP_FragSizeCur                =  p_frag_list_cur_buf_hdr->IP_FragSizeCur;
+
+                    p_frag_list_cur_buf_hdr->PrevBufPtr      = (NET_BUF *)p_buf;
+                    p_frag_list_cur_buf_hdr->PrevPrimListPtr = (NET_BUF *)0;
+                    p_frag_list_cur_buf_hdr->NextPrimListPtr = (NET_BUF *)0;
+                    p_frag_list_cur_buf_hdr->TmrPtr          = (NET_TMR *)0;
+                    p_frag_list_cur_buf_hdr->IP_FragSizeTot  =  NET_IPv6_FRAG_SIZE_NONE;
+                    p_frag_list_cur_buf_hdr->IP_FragSizeCur  =  0u;
+
+                                                                        /* Point tmr            to new frag list head.  */
+                    p_tmr                                    = (NET_TMR *)p_buf_hdr->TmrPtr;
+                    p_tmr->Obj                               = (void    *)p_buf;
+
+                                                                        /* Point prev frag list to new frag list head.  */
+                    p_frag_list_prev_list = p_buf_hdr->PrevPrimListPtr;
+                    if (p_frag_list_prev_list != (NET_BUF *)0) {
+                        p_frag_list_prev_list_buf_hdr                  = &p_frag_list_prev_list->Hdr;
+                        p_frag_list_prev_list_buf_hdr->NextPrimListPtr =  p_buf;
+                    } else {
+                        NetIPv6_FragReasmListsHead                     =  p_buf;
+                    }
+
+                                                                        /* Point next frag list to new frag list head.  */
+                    p_frag_list_next_list = p_buf_hdr->NextPrimListPtr;
+                    if (p_frag_list_next_list != (NET_BUF *)0) {
+                        p_frag_list_next_list_buf_hdr                  = &p_frag_list_next_list->Hdr;
+                        p_frag_list_next_list_buf_hdr->PrevPrimListPtr =  p_buf;
+                    } else {
+                        NetIPv6_FragReasmListsTail                    =  p_buf;
+                    }
+                }
+
+                p_frag_list_buf_hdr = &p_frag_list->Hdr;
+                NetIPv6_RxPktFragListUpdate(p_frag_list,                /* Update frag list reasm calcs.                */
+                                            p_frag_list_buf_hdr,
+                                            frag_ip_flags,
+                                            frag_offset,
+                                            frag_size,
+                                            p_err);
+                if (*p_err !=  NET_IPv6_ERR_NONE) {
+                     return ((NET_BUF *)0);
+                }
+                                                                        /* Chk    frag list reasm complete.             */
+                p_frag = NetIPv6_RxPktFragListChkComplete(p_frag_list,
+                                                          p_frag_list_buf_hdr,
+                                                          p_err);
+
+            } else {                                                    /* Else discard overlap frag & datagram ...     */
+                NetIPv6_RxPktFragListDiscard(p_frag_list, DEF_YES, &err);/* ... (see Note #1b2).                         */
+                NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxFragDisCtr);
+                p_frag = p_buf;
+               *p_err  = NET_IPv6_ERR_RX_FRAG_DISCARD;
+            }
+
+            frag_insert_done = DEF_YES;
+
+
+        } else {                                                        /* Else if frag offset = cur frag offset, ...   */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxFragDisCtr);
+            p_frag = p_buf;
+           *p_err  = NET_IPv6_ERR_RX_FRAG_DISCARD;                       /* ... discard duplicate frag (see Note #1b1).  */
+
+#if 0
+            frag_size_cur  = p_frag_list_cur_buf_hdr->IP_TotLen - p_frag_list_cur_buf_hdr->IP_HdrLen;
+            if (frag_size != frag_size_cur) {                           /* If frag size != cur frag size,    ...        */
+                NetIPv6_RxPktFragListDiscard(p_frag_list, DEF_YES, &err);/* ... discard overlap frag datagram ...        */
+                                                                        /* ... (see Note #1b2).                         */
+            }
+#endif
+            frag_insert_done = DEF_YES;
+        }
+    }
+
+    return (p_frag);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_RxPktFragListRemove()
+*
+* Description : (1) Remove fragment list from Fragment Lists :
+*
+*                   (a) Free   fragment reassembly timer
+*                   (b) Remove fragment list from Fragment Lists
+*                   (c) Clear  buffer's fragment pointers
+*
+*
+* Argument(s) : p_frag_list     Pointer to fragment list head buffer.
+*               ----------      Argument validated in NetIPv6_RxPktFragListDiscard(),
+*                                                     NetIPv6_RxPktFragListChkComplete().
+*
+*               tmr_free        Indicate whether to free network timer :
+*
+*                                   DEF_YES            Free network timer for fragment list discard.
+*                                   DEF_NO      Do NOT free network timer for fragment list discard
+*                                                   [Freed by  NetTmr_TaskHandler()
+*                                                          via NetIPv6_RxPktFragListDiscard()].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_RxPktFragListDiscard(),
+*               NetIPv6_RxPktFragListChkComplete().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_RxPktFragListRemove (NET_BUF      *p_frag_list,
+                                           CPU_BOOLEAN   tmr_free)
+{
+    NET_BUF      *p_frag_list_prev_list;
+    NET_BUF      *p_frag_list_next_list;
+    NET_BUF_HDR  *p_frag_list_prev_list_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_next_list_buf_hdr;
+    NET_BUF_HDR  *p_frag_list_buf_hdr;
+    NET_TMR      *p_tmr;
+
+
+    p_frag_list_buf_hdr = &p_frag_list->Hdr;
+
+                                                                /* ------------------ FREE FRAG TMR ------------------- */
+    if (tmr_free == DEF_YES) {
+        p_tmr = p_frag_list_buf_hdr->TmrPtr;
+        if (p_tmr != (NET_TMR *)0) {
+            NetTmr_Free(p_tmr);
+        }
+    }
+
+                                                                /* --------- REMOVE FRAG LIST FROM FRAG LISTS --------- */
+    p_frag_list_prev_list = p_frag_list_buf_hdr->PrevPrimListPtr;
+    p_frag_list_next_list = p_frag_list_buf_hdr->NextPrimListPtr;
+
+                                                                /* Point prev frag list to next frag list.              */
+    if (p_frag_list_prev_list != (NET_BUF *)0) {
+        p_frag_list_prev_list_buf_hdr                  = &p_frag_list_prev_list->Hdr;
+        p_frag_list_prev_list_buf_hdr->NextPrimListPtr =  p_frag_list_next_list;
+    } else {
+        NetIPv6_FragReasmListsHead                    =  p_frag_list_next_list;
+    }
+
+                                                                /* Point next frag list to prev frag list.              */
+    if (p_frag_list_next_list != (NET_BUF *)0) {
+        p_frag_list_next_list_buf_hdr                  = &p_frag_list_next_list->Hdr;
+        p_frag_list_next_list_buf_hdr->PrevPrimListPtr =  p_frag_list_prev_list;
+    } else {
+        NetIPv6_FragReasmListsTail                    =  p_frag_list_prev_list;
+    }
+
+                                                                /* ---------------- CLR BUF FRAG PTRS ----------------- */
+    p_frag_list_buf_hdr->PrevPrimListPtr = (NET_BUF *)0;
+    p_frag_list_buf_hdr->NextPrimListPtr = (NET_BUF *)0;
+    p_frag_list_buf_hdr->TmrPtr          = (NET_TMR *)0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetIPv6_RxPktFragListDiscard()
+*
+* Description : Discard fragment list from Fragment Lists.
+*
+* Argument(s) : p_frag_list     Pointer to fragment list head buffer.
+*               ----------      Argument validated in NetIPv6_RxPktFragListInsert(),
+*                                                     NetIPv6_RxPktFragListChkComplete(),
+*                                                     NetIPv6_RxPktFragListDiscard().
+*
+*               tmr_free        Indicate whether to free network timer :
+*
+*                                   DEF_YES            Free network timer for fragment list discard.
+*                                   DEF_NO      Do NOT free network timer for fragment list discard
+*                                                   [Freed by NetTmr_TaskHandler()].
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_RX_FRAG_DISCARD      Fragment list discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_RxPktFragListInsert(),
+*               NetIPv6_RxPktFragListChkComplete(),
+*               NetIPv6_RxPktFragListTimeout().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_RxPktFragListDiscard (NET_BUF      *p_frag_list,
+                                            CPU_BOOLEAN   tmr_free,
+                                            NET_ERR      *p_err)
+{
+    NET_ERR  err;
+
+
+    NetIPv6_RxPktFragListRemove(p_frag_list, tmr_free);                  /* Remove frag list from Frag Lists.            */
+    NetIPv6_RxPktDiscard(p_frag_list, &err);                             /* Discard every frag buf in frag list.         */
+
+    NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxFragDgramDisCtr); /* Inc discarded frag'd datagram ctr.           */
+
+   *p_err = NET_IPv6_ERR_RX_FRAG_DISCARD;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_RxPktFragListUpdate()
+*
+* Description : Update fragment list reassembly calculations.
+*
+* Argument(s) : p_frag_list_buf_hdr     Pointer to fragment list head buffer's header.
+*               ------------------      Argument validated in NetIPv6_RxPktFragListAdd(),
+*                                                             NetIPv6_RxPktFragListInsert().
+*
+*               frag_ip_flags           Fragment IPv6 header flags.
+*               -------------           Argument validated in NetIPv6_RxPktFragListAdd(),
+*                                                             NetIPv6_RxPktFragListInsert().
+*
+*               frag_offset             Fragment offset.
+*               -----------             Argument validated in NetIPv6_RxPktFragListAdd(),
+*                                                             NetIPv6_RxPktFragListInsert().
+*
+*               frag_size               Fragment size (in octets).
+*               ---------               Argument validated in NetIPv6_RxPktFragListAdd(),
+*                                                             NetIPv6_RxPktFragListInsert().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               Fragment list reassembly calculations
+*                                                                   successfully updated.
+*                               NET_IPv6_ERR_RX_FRAG_LEN_TOT    Invalid fragment datagram total IP length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_RxPktFragListAdd(),
+*               NetIPv6_RxPktFragListInsert().
+*
+* Note(s)     : (1) RFC #2460, Section 4.5 'Fragment Header' states that :
+*
+*                   (a) "If insufficient fragments are received to complete reassembly of a packet within
+*                        60 seconds of the reception of the first-arriving fragment of that packet,
+*                        reassembly of that packet must be abandoned and all the fragments that have been
+*                        received for that packet must be discarded."
+*
+*                   (b) "If the first fragment (i.e., the one with a Fragment Offset of zero) has been
+*                        received, an ICMP Time Exceeded -- Fragment Reassembly Time Exceeded message
+*                        should be sent to the source of that fragment."
+*
+*               (2) To avoid possible integer arithmetic overflow, the fragmentation arithmetic result MUST
+*                   be declared as an integer data type with a greater resolution -- i.e. greater number of
+*                   bits -- than the fragmentation arithmetic operands' data type(s).
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_RxPktFragListUpdate (NET_BUF      *p_frag_list,
+                                           NET_BUF_HDR  *p_frag_list_buf_hdr,
+                                           CPU_INT16U    frag_ip_flags,
+                                           CPU_INT32U    frag_offset,
+                                           CPU_INT32U    frag_size,
+                                           NET_ERR      *p_err)
+{
+    NET_BUF      *p_buf_last;
+    NET_BUF_HDR  *p_buf_hdr_last;
+    CPU_INT32U    frag_size_tot;                                     /* See Note #2.                                     */
+    CPU_BOOLEAN   ip_flag_frags_more;
+    NET_ERR       err;
+
+
+    p_frag_list_buf_hdr->IP_FragSizeCur += frag_size;
+    ip_flag_frags_more                  = DEF_BIT_IS_SET(frag_ip_flags, NET_IPv6_FRAG_FLAG_FRAG_MORE);
+    if (ip_flag_frags_more != DEF_YES) {                            /* If 'More Frags' NOT set (see Note #1b1A), ...    */
+                                                                    /* ... calc frag tot size  (see Note #1b2).         */
+        frag_size_tot = (CPU_INT32U)frag_offset + (CPU_INT32U)frag_size;
+        if (frag_size_tot > NET_IPv6_TOT_LEN_MAX) {                 /* If frag tot size > IP tot len max, ...           */
+
+                                                                    /* Send ICMPv6 Problem message.                     */
+            p_buf_last     = p_frag_list;
+            p_buf_hdr_last = p_frag_list_buf_hdr;
+            while (p_buf_hdr_last->NextBufPtr != (NET_BUF *)0) {
+                p_buf_last     =  p_buf_hdr_last->NextBufPtr;
+                p_buf_hdr_last = &p_buf_last->Hdr;
+            }
+#ifdef  NET_ICMPv6_MODULE_EN
+            NetICMPv6_TxMsgErr(p_buf_last,
+                               NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                               NET_ICMPv6_MSG_CODE_PARAM_PROB_IP_HDR,
+                              (p_frag_list_buf_hdr->IPv6_FragHdrIx - p_frag_list_buf_hdr->IP_HdrIx) + NET_ICMPv6_PTR_IX_IP_FRAG_OFFSET,
+                              &err);
+#endif
+            NetIPv6_RxPktFragListDiscard(p_frag_list, DEF_YES, &err);/* ... discard ovf'd frag datagram (see Note #1a3). */
+           *p_err = NET_IPv6_ERR_RX_FRAG_LEN_TOT;
+            return;
+        }
+
+        p_frag_list_buf_hdr->IP_FragSizeTot = (CPU_INT16U)frag_size_tot;
+    }
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetIPv6_RxPktFragListChkComplete()
+*
+* Description : Check if fragment list complete; i.e. fragmented datagram reassembled.
+*
+* Argument(s) : p_frag_list             Pointer to fragment list head buffer.
+*               ----------              Argument validated in NetIPv6_RxPktFragListInsert().
+*
+*               p_frag_list_buf_hdr     Pointer to fragment list head buffer's header.
+*               ------------------      Argument validated in NetIPv6_RxPktFragListInsert().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_RX_FRAG_COMPLETE   Datagram complete; fragments reassembled.
+*                               NET_IPv6_ERR_RX_FRAG_REASM      Fragments in reassembly progress.
+*                               NET_IPv6_ERR_RX_FRAG_SIZE_TOT   Invalid fragmented datagram total size.
+*                               NET_IPv6_ERR_RX_FRAG_LEN_TOT    Invalid fragment   datagram total IPv6 length.
+*
+*                                                               - RETURNED BY NetIPv6_RxPktFragListDiscard() : -
+*                               NET_IPv6_ERR_RX_FRAG_DISCARD    Fragment list discarded.
+*
+* Return(s)   : Pointer to reassembled datagram, if fragment reassembly complete.
+*
+*               Pointer to NULL,                 if fragment reassembly in progress.
+*                                                   OR
+*                                                for any fragment discard error.
+*
+* Caller(s)   : NetIPv6_RxPktFragListInsert().
+*
+* Note(s)     : (1) RFC #2460, Section 4.5 'Fragment Header' states that :
+*
+*                   (a) "If insufficient fragments are received to complete reassembly of a packet within
+*                        60 seconds of the reception of the first-arriving fragment of that packet,
+*                        reassembly of that packet must be abandoned and all the fragments that have been
+*                        received for that packet must be discarded."
+*
+*                   (b) "If the first fragment (i.e., the one with a Fragment Offset of zero) has been
+*                        received, an ICMP Time Exceeded -- Fragment Reassembly Time Exceeded message
+*                        should be sent to the source of that fragment."
+*
+*               (2) To avoid possible integer arithmetic overflow, the fragmentation arithmetic result
+*                   MUST be declared as an integer data type with a greater resolution -- i.e. greater
+*                   number of bits -- than the fragmentation arithmetic operands' data type(s).
+*********************************************************************************************************
+*/
+
+static  NET_BUF  *NetIPv6_RxPktFragListChkComplete (NET_BUF      *p_frag_list,
+                                                    NET_BUF_HDR  *p_frag_list_buf_hdr,
+                                                    NET_ERR      *p_err)
+{
+    NET_BUF       *p_frag;
+    CPU_INT32U     frag_tot_len;                                    /* See Note #2.                                     */
+#if 0
+    NET_TMR_TICK   timeout_tick;
+#endif
+    NET_ERR        err;
+
+                                                                    /* If tot frag size complete, ...                   */
+    if (p_frag_list_buf_hdr->IP_FragSizeCur == p_frag_list_buf_hdr->IP_FragSizeTot) {
+                                                                    /* Calc frag IPv6 tot len (see Note #1a2).          */
+#if 0
+        frag_tot_len = (CPU_INT32U)p_frag_list_buf_hdr->IPv6_ExtHdrLen + (CPU_INT32U)p_frag_list_buf_hdr->IP_FragSizeTot;
+#else
+        frag_tot_len = (CPU_INT32U)p_frag_list_buf_hdr->IP_FragSizeTot;
+#endif
+        if (frag_tot_len > NET_IPv6_TOT_LEN_MAX) {                  /* If tot frag len > IPv6 tot len max, ...          */
+            NetIPv6_RxPktFragListDiscard(p_frag_list, DEF_YES, &err);/* ...discard ovf'd frag datagram (see Note #1a1C).*/
+
+#ifdef  NET_ICMPv6_MODULE_EN
+                                                                    /* Send ICMPv6 Problem message.                     */
+            NetICMPv6_TxMsgErr(p_frag_list,
+                               NET_ICMPv6_MSG_TYPE_PARAM_PROB,
+                               NET_ICMPv6_MSG_CODE_PARAM_PROB_IP_HDR,
+                              (p_frag_list_buf_hdr->IPv6_FragHdrIx - p_frag_list_buf_hdr->IP_HdrIx) + NET_ICMPv6_PTR_IX_IP_FRAG_OFFSET,
+                              &err);
+#endif
+           *p_err =   NET_IPv6_ERR_RX_FRAG_LEN_TOT;
+            return ((NET_BUF *)0);
+        }
+
+        NetIPv6_RxPktFragListRemove(p_frag_list, DEF_YES);
+        NET_CTR_STAT_INC(Net_StatCtrs.IPv6.RxFragDgramReasmCtr);
+        p_frag = p_frag_list;                                       /* ... rtn reasm'd datagram (see Note #1b1).        */
+       *p_err  = NET_IPv6_ERR_RX_FRAG_COMPLETE;
+
+#if 0
+                                                                    /* If cur frag size > tot frag size, ...            */
+    } else if (p_frag_list_buf_hdr->IP_FragSizeCur > p_frag_list_buf_hdr->IP_FragSizeTot) {
+        NetIPv6_RxPktFragListDiscard(p_frag_list, DEF_YES, p_err);  /* ... discard ovf'd frag datagram.                 */
+       *p_err =   NET_IPv6_ERR_RX_FRAG_SIZE_TOT;
+        return ((NET_BUF *)0);
+#endif
+
+    } else {                                                        /* Else reset frag tmr (see Note #1b2A).            */
+#if 0
+        CPU_CRITICAL_ENTER();
+        timeout_tick = NetIPv6_FragReasmTimeout_tick;
+        CPU_CRITICAL_EXIT();
+        NetTmr_Set((NET_TMR    *) p_frag_list_buf_hdr->TmrPtr,
+                   (CPU_FNCT_PTR) NetIPv6_RxPktFragTimeout,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (err != NET_TMR_ERR_NONE) {
+            NetIPv6_RxPktFragListDiscard(p_frag_list, DEF_YES, p_err);
+            return ((NET_BUF *)0);
+        }
+#endif
+#endif
+       *p_err  =  NET_IPv6_ERR_RX_FRAG_REASM;
+        p_frag = (NET_BUF *)0;
+
+    }
+
+    return (p_frag);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_RxPktFragTimeout()
+*
+* Description : Discard fragment list on fragment reassembly timeout.
+*
+* Argument(s) : p_frag_list_timeout     Pointer to network buffer fragment reassembly list (see Note #1b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetIPv6_RxPktFragListAdd().
+*
+* Note(s)     : (1) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to ap_propriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_BUF' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (2) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetIPv6_RxPktFragListRemove() via NetIPv6_RxPktFragListDiscard().
+*
+*                   (b) but do NOT re-free the timer.
+*
+*               (3) RFC #2460, Section 4.5 'Fragment Header' states that :
+*
+*                   (a) "If insufficient fragments are received to complete reassembly of a packet within
+*                        60 seconds of the reception of the first-arriving fragment of that packet,
+*                        reassembly of that packet must be abandoned and all the fragments that have been
+*                        received for that packet must be discarded."
+*
+*                   (b) "If the first fragment (i.e., the one with a Fragment Offset of zero) has been
+*                        received, an ICMP Time Exceeded -- Fragment Reassembly Time Exceeded message
+*                        should be sent to the source of that fragment."
+*
+*               (4) MUST send ICMP 'Time Exceeded' error message BEFORE NetIPv6_RxPktFragListDiscard()
+*                   frees fragment buffers.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_RxPktFragTimeout (void  *p_frag_list_timeout)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN   used;
+#endif
+    NET_BUF      *p_frag_list;
+    NET_ERR       err;
+
+
+    p_frag_list = (NET_BUF *)p_frag_list_timeout;               /* See Note #2b2A.                                      */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE IPv6 RX FRAG --------------- */
+    if (p_frag_list == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return;
+    }
+
+    used = NetBuf_IsUsed(p_frag_list);
+    if (used != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.NullPtrCtr);
+        return;
+    }
+#endif
+
+#ifdef  NET_ICMPv6_MODULE_EN
+    NetICMPv6_TxMsgErr((NET_BUF  *) p_frag_list,                 /* Send ICMPV6 'Time Exceeded' err msg (see Note #4).     */
+                       (CPU_INT08U) NET_ICMPv6_MSG_TYPE_TIME_EXCEED,
+                       (CPU_INT08U) NET_ICMPv6_MSG_CODE_TIME_EXCEED_FRAG_REASM,
+                       (CPU_INT08U) NET_ICMPv6_MSG_PTR_NONE,
+                       (NET_ERR  *)&err);
+#endif
+                                                                /* Discard frag list (see Note #1b).                    */
+    NetIPv6_RxPktFragListDiscard((NET_BUF   *) p_frag_list,
+                                 (CPU_BOOLEAN) DEF_NO,          /* Clr but do NOT free tmr (see Note #3).               */
+                                 (NET_ERR   *)&err);
+
+
+    NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxFragDgramTimeoutCtr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetIPv6_RxPktDemuxDatagram()
+*
+* Description : Demultiplex IPv6 datagram to ap_propriate ICMPv6, UDP, or TCP layer.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received IPv6 datagram.
+*               ----        Argument checked   in NetIPv6_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetIPv6_Rx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+*                                                               ----- RETURNED BY NetICMPv6_Rx() : -----
+*                               NET_ICMPV6_ERR_NONE             ICMPv6 message successfully demultiplexed.
+*
+*                                                               ------ RETURNED BY NetUDP_Rx() : -------
+*                               NET_UDP_ERR_NONE                UDP datagram successfully demultiplexed.
+*
+*                                                               ------ RETURNED BY NetTCP_Rx() : -------
+*                               NET_TCP_ERR_NONE                TCP segment  successfully demultiplexed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_Rx().
+*
+* Note(s)     : (1) When network buffer is demultiplexed to higher-layer protocol receive, buffer's reference
+*                   counter is NOT incremented since the IPv6 layer does NOT maintain a reference to the
+*                   buffer.
+*
+*               (2) Default case already invalidated in NetIPv6_RxPktValidate().  However, the default case
+*                   is included as an extra precaution in case 'ProtocolHdrType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_RxPktDemuxDatagram (NET_BUF      *p_buf,
+                                          NET_BUF_HDR  *p_buf_hdr,
+                                          NET_ERR      *p_err)
+{
+    NET_BUF_HDR  *p_hdr;
+
+
+    p_hdr = &p_buf->Hdr;
+    DEF_BIT_SET(p_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);         /* Set IPv6 Flag.                                       */
+
+    switch (p_buf_hdr->ProtocolHdrType) {                       /* Demux buf to appropriate protocol (see Note #1).     */
+#ifdef  NET_ICMPv6_MODULE_EN
+        case NET_PROTOCOL_TYPE_ICMP_V6:
+             NetICMPv6_Rx(p_buf, p_err);
+             break;
+#endif
+
+
+        case NET_PROTOCOL_TYPE_UDP_V6:
+             NetUDP_Rx(p_buf, p_err);
+             break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+        case NET_PROTOCOL_TYPE_TCP_V6:
+             NetTCP_Rx(p_buf, p_err);
+             break;
+#endif
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:                                                /* See Note #2.                                         */
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.RxInvProtocolCtr);
+           *p_err = NET_ERR_INVALID_PROTOCOL;
+            return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_RxPktDiscard()
+*
+* Description : On any IPv6 receive error(s), discard IPv6 packet(s) & buffer(s).
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_Rx(),
+*               NetIPv6_RxPktFragListDiscard().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_RxPktDiscard (NET_BUF  *p_buf,
+                                    NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.IPv6.RxPktDisCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBufList((NET_BUF *)p_buf,
+                            (NET_CTR *)p_ctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_TxPktValidate()
+*
+* Description : (1) Validate IPv6 transmit packet parameters :
+*
+*                   (a) Validate the following transmit packet parameters :
+*
+*                       (1) Supported protocols :
+*                           (A) ICMPv6
+*                           (B) UDP
+*                           (C) TCP
+*
+*                       (2) Buffer protocol index
+*                       (3) Total Length
+*                       (4) Hop Limit                                               See Note #2d
+*                       (5) Destination Address                                     See Note #2f
+*                       (6) Source      Address                                     See Note #2e
+*
+*
+* Argument(s) : p_buf_hdr       Pointer to network buffer header.
+*               --------        Argument validated in NetIPv6_Tx().
+*
+*               p_addr_src      Pointer to source        IPv6 address.
+*
+*               p_addr_dest     Pointer to destination   IPv6 address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE                   Transmit packet validated.
+*                               NET_BUF_ERR_INVALID_TYPE            Invalid network buffer type.
+*                               NET_ERR_INVALID_PROTOCOL            Invalid/unknown protocol type.
+*                               NET_BUF_ERR_INVALID_IX              Invalid/insufficient buffer index.
+*                               NET_IPv6_ERR_INVALID_LEN_DATA       Invalid protocol/data length.
+*                               NET_IPv6_ERR_INVALID_HOP_LIMIT      Invalid IPv6 Hop Limit.
+*                               NET_IPv6_ERR_INVALID_ADDR_SRC       Invalid IPv6 source          address.
+*
+*                                                                   -- RETURNED BY NetIF_IsEnHandler() : --
+*                               NET_IF_ERR_INVALID_IF               Invalid OR disabled network interface.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_Tx().
+*
+* Note(s)     : (2) See 'net_ipv6.h  IPv6 ADDRESS DEFINES  Notes #2 & #3' for supported IPv6 addresses.
+*********************************************************************************************************
+*/
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+static  void  NetIPv6_TxPktValidate (const  NET_BUF_HDR             *p_buf_hdr,
+                                     const  NET_IPv6_ADDR           *p_addr_src,
+                                     const  NET_IPv6_ADDR           *p_addr_dest,
+                                            NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                            NET_IPv6_FLOW_LABEL      flow_label,
+                                            NET_IPv6_HOP_LIM         hop_lim,
+                                            NET_ERR                 *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_INT16U       ix;
+    CPU_INT16U       len;
+#endif
+    NET_IPv6_ADDRS  *p_ip_addrs;
+    NET_IF_NBR       if_nbr;
+    CPU_BOOLEAN      addr_unspecified;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                    /* ------------ VALIDATE NET BUF TYPE ------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_RX_LARGE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+                                                                    /* --------------- VALIDATE PROTOCOL -------------- */
+    switch (p_buf_hdr->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_ICMP_V6:
+             ix  = p_buf_hdr->ICMP_MsgIx;
+             len = p_buf_hdr->ICMP_MsgLen;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_UDP_V6:
+#ifdef  NET_TCP_MODULE_EN
+        case NET_PROTOCOL_TYPE_TCP_V6:
+#endif
+             ix  = p_buf_hdr->TransportHdrIx;
+             len = p_buf_hdr->TransportHdrLen + (CPU_INT16U)p_buf_hdr->DataLen;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    if (ix == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+    if (ix <  NET_IPv6_HDR_SIZE_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxInvBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+                                                                    /* ------------ VALIDATE TOT DATA LEN ------------- */
+    if (len != p_buf_hdr->TotLen) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxInvDataLenCtr);
+       *p_err = NET_IPv6_ERR_INVALID_LEN_DATA;
+        return;
+    }
+
+                                                                    /* ----------- VALIDATE IPv6 HOP LIMIT ------------ */
+    if (hop_lim < 1) {                                              /* If Hop Limit < 1, rtn err.                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxInvTTL_Ctr);
+       *p_err = NET_IPv6_ERR_INVALID_HOP_LIMIT;
+        return;
+    }
+#endif
+
+                                                                    /* ------------- VALIDATE IPv6 ADDRS -------------- */
+    if_nbr = p_buf_hdr->IF_Nbr;                                     /* Get pkt's tx IF.                                 */
+   (void)NetIF_IsEnHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+                                                                    /* Chk pkt's tx cfg'd host addr for src addr.       */
+    addr_unspecified = NetIPv6_IsAddrUnspecified(p_addr_src);
+    if (addr_unspecified == DEF_NO) {
+        if (if_nbr != NET_IF_NBR_LOCAL_HOST) {
+            p_ip_addrs = NetIPv6_GetAddrsHostOnIF(if_nbr, p_addr_src);
+        } else {
+            p_ip_addrs = NetIPv6_GetAddrsHost(p_addr_src,
+                                              DEF_NULL);
+        }
+
+        if (p_ip_addrs == (NET_IPv6_ADDRS *)0) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxInvAddrSrcCtr);
+           *p_err = NET_IPv6_ERR_INVALID_ADDR_SRC;
+            return;
+        }
+    }
+
+
+   (void)&p_addr_dest;
+   (void)&traffic_class;
+   (void)&flow_label;
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           NetIPv6_TxPkt()
+*
+* Description : (1) Prepare IPv6 header & transmit IPv6 packet :
+
+*                   (a) Calculate IPv6 header buffer controls
+*                   (b) Check for transmit fragmentation        See Note #2
+*                   (c) Prepare   IPv6 Extension header(s)
+*                   (d) Prepare   IPv6 header
+*                   (e) Transmit  IPv6 packet datagram
+*
+*
+* Argument(s) : p_buf           Pointer to network buffer to transmit IPv6 packet.
+*               ----            Argument checked   in NetIPv6_Tx().
+*
+*               p_buf_hdr       Pointer to network buffer header.
+*               --------        Argument validated in NetIPv6_Tx().
+*
+*               p_addr_src      Pointer to source      IPv6 address.
+*               ---------       Argument checked   in NetIPv6_TxPktValidate().
+*
+*               p_addr_dest     Pointer to destination IPv6 address.
+*               ----------      Argument checked   in NetIPv6_TxPktValidate().
+*
+*               p_ext_hdr_list  Pointer to extension header list to add to IPv6 packet.
+*
+*               traffic_class   Traffic class to add in the IPv6 header to send.
+*
+*               flow_label      Flow label to add in the IPv6 header to send.
+*
+*               hop_lim         Hop limit to add in the IPv6 header of the packet to send.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_INVALID_PROTOCOL            Invalid/unknown protocol type.
+*                               NET_IPv6_ERR_INVALID_LEN_HDR        Invalid IPv6 header length.
+*                               NET_IPv6_ERR_INVALID_FRAG           Invalid IPv6 fragmentation.
+*
+*                                                                   --- RETURNED BY NetIF_MTU_GetProtocol() : ---
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IF_ERR_INVALID_CFG              Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT                Invalid NULL function pointer.
+*
+*                                                                   - RETURNED BY NetIPv6_TxPktPrepareExtHdr() :-
+*                               NET_IPv6_ERR_INVALID_PROTOCOL       Invalid/unknown protocol type.
+*                               NET_IPv6_ERR_INVALID_EH             Invalid extension header.
+*
+*                                                                   -- RETURNED BY NetIPv6_TxPktPrepareHdr() : --
+*                               NET_IPv6_ERR_INVALID_PROTOCOL       Invalid/unknown protocol type.
+*
+*                                                                   --- RETURNED BY NetIPv6_TxPktDatagram() : ---
+*                               NET_IPv6_ERR_TX_DEST_LOCAL_HOST     Destination is a local host address.
+*                               NET_IPv6_ERR_TX_DEST_MULTICAST      Multicast destination.
+*                               NET_IPv6_ERR_TX_DEST_HOST_THIS_NET  Destination is on same link.
+*                               NET_IPv6_ERR_TX_DFLT_GATEWAY        Next-hop is the default router.
+*                               NET_IPv6_ERR_TX_DFLT_GATEWAY_NONE   Next-hop is a router in the router list.
+*                               NET_IPv6_ERR_TX_NEXT_HOP_NONE       No next-hop is available.
+*                               NET_IF_ERR_NONE                     Packet successfully transmitted.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*                               NET_ERR_TX                          Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_Tx().
+*
+* Note(s)     : (2) IPv6 transmit fragmentation NOT currently supported (see 'net_IPv6.c  Note #1c').
+*                   fragmentation is supported for ICMPv6 packet but not for TCP and UDP packets.
+*
+*               (3) Default case already invalidated in NetIPv6_TxPktValidate().  However, the default case
+*                   is included as an extra precaution in case 'ProtocolHdrType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_TxPkt (NET_BUF                 *p_buf,
+                             NET_BUF_HDR             *p_buf_hdr,
+                             NET_IPv6_ADDR           *p_addr_src,
+                             NET_IPv6_ADDR           *p_addr_dest,
+                             NET_IPv6_EXT_HDR        *p_ext_hdr_list,
+                             NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                             NET_IPv6_FLOW_LABEL      flow_label,
+                             NET_IPv6_HOP_LIM         hop_lim,
+                             NET_ERR                 *p_err)
+{
+    CPU_INT16U         ip_hdr_len_size;
+    CPU_INT16U         protocol_ix;
+    CPU_BOOLEAN        ip_tx_frag;
+
+
+                                                                /* ---------------- PREPARE IPv6 OPTS ----------------- */
+
+    ip_tx_frag = DEF_NO;
+                                                                /* --------------- CALC IPv6 HDR CTRLS ---------------- */
+                                                                /* Calc tot IPv6 hdr len (in octets).                   */
+    ip_hdr_len_size = (CPU_INT16U)(NET_IPv6_HDR_SIZE);
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (ip_hdr_len_size > NET_IPv6_HDR_SIZE_MAX) {
+       *p_err = NET_IPv6_ERR_INVALID_LEN_HDR;
+        return;
+    }
+#endif
+
+    switch (p_buf_hdr->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_ICMP_V6:
+             protocol_ix = p_buf_hdr->ICMP_MsgIx;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_UDP_V6:
+#ifdef  NET_TCP_MODULE_EN
+        case NET_PROTOCOL_TYPE_TCP_V6:
+#endif
+             protocol_ix = p_buf_hdr->TransportHdrIx;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxInvProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+
+                                                                /* ----------------- CHK FRAG REQUIRED ---------------- */
+                                                                /* Chained NET_BUF requires frag.                       */
+    if (p_buf_hdr->NextBufPtr != (NET_BUF *)0) {
+        ip_tx_frag = DEF_YES;
+    }
+
+    if (protocol_ix < ip_hdr_len_size) {                        /* If hdr len > allowed rem ix, tx frag req'd.          */
+        *p_err = NET_IPv6_ERR_TX_PKT;
+         return;
+    }
+
+
+#if 0
+    if (ip_tx_frag == DEF_YES) {                                /* If tx frag NOT required, (see Note #2).              */
+        NetIPv6_TxPktPrepareFragHdr(p_buf,
+                                    p_buf_hdr,
+                                   &protocol_ix,
+                                    p_err);
+
+        if (*p_err != NET_IPv6_ERR_NONE) {
+             return;
+        }
+    }
+#endif
+
+                                                                /* ... prepare IPv6 Extension Headers ...               */
+    NetIPv6_TxPktPrepareExtHdr (p_buf,
+                                p_ext_hdr_list,
+                                p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+         return;
+    }
+
+    NetIPv6_TxPktPrepareHdr(p_buf,                              /* ... prepare IPv6 hdr     ...                         */
+                            p_buf_hdr,
+                            protocol_ix,
+                            p_addr_src,
+                            p_addr_dest,
+                            p_ext_hdr_list,
+                            traffic_class,
+                            flow_label,
+                            hop_lim,
+                            p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+         return;
+    }
+
+    NetIPv6_TxPktDatagram(p_buf, p_buf_hdr, p_err);             /* ... & tx IPv6 datagram.                              */
+
+    (void)&ip_tx_frag;                                          /* Prevent 'variable unused' compiler warning.          */
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetIPv6_TxPktPrepareHdr()
+*
+* Description : (1) Prepare IPv6 header :
+*
+*                   (a) Update network buffer's protocol index & length controls
+*
+*                   (b) Prepare the transmit packet's following IPv6 header fields :
+*
+*                       (1) Version
+*                       (2) Traffic Class
+*                       (3) Flow Label
+*                       (4) Payload Length
+*                       (5) Next Header
+*                       (6) Hop Limit
+*                       (7) Source      Address
+*                       (8) Destination Address
+*
+*                   (c) Convert the following IPv6 header fields from host-order to network-order :
+*
+*                       (1) Version / Traffic Class / Flow Label
+*                       (2) Payload Length
+*
+*
+* Argument(s) : p_buf               Pointer to network buffer to transmit IP packet.
+*               ----                Argument checked   in NetIPv6_Tx().
+*
+*               p_buf_hdr           Pointer to network buffer header.
+*               --------            Argument validated in NetIPv6_Tx().
+*
+*               protocol_ix         Index to higher-layer protocol header.
+*
+*               p_addr_src          Pointer to source        IPv6 address.
+*               ---------           Argument checked   in NetIPv6_TxPktValidate().
+*
+*               p_addr_dest         Pointer to destination   IPv6 address.
+*               ----------          Argument checked   in NetIPv6_TxPktValidate().
+*
+*               p_ext_hdr_list      Pointer to IPv6 Extensions headers list.
+*
+*               traffic_class       Traffic Class of packet.
+*
+*               flow_label          Flow Label of packet.
+*
+*               hop_lim             Hop Limit of packet.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               IPv6 header successfully prepared.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_TxPkt().
+*
+* Note(s)     : (2) See 'net_ipv6.h  IPv6 HEADER' for IPv6 header format.
+*
+*               (3) Supports ONLY the following protocols :
+*
+*                   (a) ICMPv6
+*                   (b) UDP
+*                   (c) TCP
+*
+*                   See also 'net.h  Note #2a'.
+*
+*               (4) Default case already invalidated in NetIPv6_TxPktValidate(). However, the default case is
+*                   included as an extra precaution in case 'ProtocolHdrType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_TxPktPrepareHdr (NET_BUF                 *p_buf,
+                                       NET_BUF_HDR             *p_buf_hdr,
+                                       CPU_INT16U               protocol_ix,
+                                       NET_IPv6_ADDR           *p_addr_src,
+                                       NET_IPv6_ADDR           *p_addr_dest,
+                                       NET_IPv6_EXT_HDR        *p_ext_hdr_list,
+                                       NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                       NET_IPv6_FLOW_LABEL      flow_label,
+                                       NET_IPv6_HOP_LIM         hop_lim,
+                                       NET_ERR                 *p_err)
+{
+    NET_IPv6_HDR      *p_ip_hdr;
+    NET_IPv6_EXT_HDR  *p_ext_hdr;
+    CPU_INT08U         ip_ver;
+    CPU_INT32U         ip_ver_traffic_flow;
+    NET_DEV_CFG       *p_dev_cfg;
+    NET_IF            *p_if;
+
+    p_if      = NetIF_Get(p_buf_hdr->IF_Nbr, p_err);
+    p_dev_cfg = p_if->Dev_Cfg;
+
+    while (p_buf != (NET_BUF *)0) {
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+        p_buf_hdr->IP_HdrIx = p_dev_cfg->TxBufIxOffset;
+        NetIF_TxIxDataGet(p_buf_hdr->IF_Nbr,
+                          0,
+                         &p_buf_hdr->IP_HdrIx,
+                          p_err);
+        p_buf_hdr->IP_DataLen     = (CPU_INT16U) p_buf_hdr->TotLen;
+        p_buf_hdr->IP_DatagramLen = (CPU_INT16U) p_buf_hdr->TotLen;
+
+                                                                /* ----------------- PREPARE IPv6 HDR ----------------- */
+        p_ip_hdr = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+
+
+                                                                /* ----- PREPARE IP VER/TRAFFIC CLASS/FLOW LABEL ------ */
+        ip_ver = NET_IPv6_HDR_VER;
+        ip_ver_traffic_flow  = (ip_ver        << NET_IPv6_HDR_VER_SHIFT);
+
+        traffic_class        = (traffic_class  & NET_IPv6_HDR_TRAFFIC_CLASS_MASK_16);
+        ip_ver_traffic_flow |= (traffic_class << NET_IPv6_HDR_TRAFFIC_CLASS_SHIFT);
+
+        flow_label           = (flow_label     & NET_IPv6_HDR_FLOW_LABEL_MASK);
+        ip_ver_traffic_flow |= (flow_label    << NET_IPv6_HDR_FLOW_LABEL_SHIFT);
+
+        NET_UTIL_VAL_COPY_SET_NET_32(&p_ip_hdr->VerTrafficFlow, &ip_ver_traffic_flow);
+
+                                                                /* ------------- PREPARE IPv6 PAYLOAD LEN ------------- */
+        NET_UTIL_VAL_COPY_SET_NET_16(&p_ip_hdr->PayloadLen, &p_buf_hdr->TotLen);
+        p_buf_hdr->TotLen    += sizeof(NET_IPv6_HDR);
+        p_buf_hdr->IP_TotLen  = (CPU_INT16U) p_buf_hdr->TotLen;
+
+                                                                /* -------------- PREPARE IPv6 NEXT HDR --------------- */
+        p_ext_hdr = p_ext_hdr_list;
+        if (p_ext_hdr == (NET_IPv6_EXT_HDR *)0) {
+            switch (p_buf_hdr->ProtocolHdrType) {               /* Demux IPv6 protocol (see Note #3).                   */
+                case NET_PROTOCOL_TYPE_ICMP_V6:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_ICMPv6;
+                     break;
+
+
+                case NET_PROTOCOL_TYPE_UDP_V6:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_UDP;
+                     break;
+
+
+    #ifdef  NET_TCP_MODULE_EN
+                case NET_PROTOCOL_TYPE_TCP_V6:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_TCP;
+                     break;
+    #endif
+
+                case NET_PROTOCOL_TYPE_IP_V6_EXT_HOP_BY_HOP:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_EXT_HOP_BY_HOP;
+                     break;
+
+
+                case NET_PROTOCOL_TYPE_IP_V6_EXT_ROUTING:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_EXT_ROUTING;
+                     break;
+
+
+                case NET_PROTOCOL_TYPE_IP_V6_EXT_FRAG:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_EXT_FRAG;
+                     break;
+
+
+                case NET_PROTOCOL_TYPE_IP_V6_EXT_ESP:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_EXT_ESP;
+                     break;
+
+
+                case NET_PROTOCOL_TYPE_IP_V6_EXT_AUTH:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_EXT_AUTH;
+                     break;
+
+
+                case NET_PROTOCOL_TYPE_IP_V6_EXT_NONE:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_EXT_NONE;
+                     break;
+
+
+                case NET_PROTOCOL_TYPE_IP_V6_EXT_DEST:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_EXT_DEST;
+                     break;
+
+
+                case NET_PROTOCOL_TYPE_IP_V6_EXT_MOBILITY:
+                     p_ip_hdr->NextHdr = NET_IP_HDR_PROTOCOL_EXT_MOBILITY;
+                     break;
+
+
+                default:                                            /* See Note #4.                                         */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxInvProtocolCtr);
+                    *p_err = NET_ERR_INVALID_PROTOCOL;
+                     return;
+            }
+        } else {
+            p_ip_hdr->NextHdr = p_ext_hdr->Type;
+        }
+
+        p_buf_hdr->ProtocolHdrType    = NET_PROTOCOL_TYPE_IP_V6; /* Update buf protocol for IPv6.                       */
+        p_buf_hdr->ProtocolHdrTypeNet = NET_PROTOCOL_TYPE_IP_V6;
+
+
+                                                                /* -------------- PREPARE IPv6 HOP LIMIT -------------- */
+        if (hop_lim != NET_IPv6_HOP_LIM_NONE) {
+            p_ip_hdr->HopLim = hop_lim;
+        } else {
+            p_ip_hdr->HopLim = NET_IPv6_HOP_LIM_DFLT;
+        }
+
+                                                                /* ---------------- PREPARE IPv6 ADDRS ---------------- */
+        Mem_Copy(&p_buf_hdr->IPv6_AddrSrc,  p_addr_src,  NET_IPv6_ADDR_SIZE);
+        Mem_Copy(&p_buf_hdr->IPv6_AddrDest, p_addr_dest, NET_IPv6_ADDR_SIZE);
+
+        Mem_Copy(&p_ip_hdr->AddrSrc,  p_addr_src,  NET_IPv6_ADDR_SIZE);
+        Mem_Copy(&p_ip_hdr->AddrDest, p_addr_dest, NET_IPv6_ADDR_SIZE);
+
+                                                                /* Move to next buffer.                                 */
+        p_buf = p_buf_hdr->NextBufPtr;
+        if (p_buf != (NET_BUF *)0) {
+            p_buf_hdr = &p_buf->Hdr;
+        }
+    }
+
+   (void)&protocol_ix;
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_TxPktPrepareExtHdr()
+*
+* Description : Prepare Extension headers in packets to send and, if necessary, chained fragments
+*               for IPv6 fragmentation.
+*
+* Argument(s) : p_buf           Pointer to network buffer to transmit IPv6 packet.
+*
+*               p_ext_hdr_list  Pointer to list of extension headers to add.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               No Error.
+*                               NET_IPv6_ERR_INVALID_PROTOCOL   The protocol that carries the fragment is not
+*                                                                   UDP, TCP or ICMP.
+*                               NET_IPv6_ERR_INVALID_EH         An extension header is invalid.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_TxPkt()
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_TxPktPrepareExtHdr (NET_BUF           *p_buf,
+                                          NET_IPv6_EXT_HDR  *p_ext_hdr_list,
+                                          NET_ERR           *p_err)
+{
+    NET_BUF_HDR                   *p_buf_hdr;
+    NET_IPv6_EXT_HDR              *p_ext_hdr;
+    NET_IPv6_EXT_HDR              *p_ext_hdr_next;
+    NET_IPv6_EXT_HDR              *p_ext_hdr_prev;
+    CPU_FNCT_PTR                   fnct;
+    NET_IPv6_EXT_HDR_ARG_GENERIC   ext_hdr_arg;
+    CPU_INT16U                     data_ix;
+    CPU_INT16U                     data_ix_prev;
+    CPU_INT08U                     next_hdr_type;
+    NET_IPv6_EXT_HDR_ARG_FRAG      frag_hdr_arg;
+    NET_IPv6_FRAG_FLAGS            fragOffsetFlag;
+    CPU_INT16U                     datagram_offset;
+    CPU_INT32U                     ID;
+    NET_DEV_CFG                   *p_dev_cfg;
+    NET_IF                        *p_if;
+
+    datagram_offset = 0u;
+    fragOffsetFlag  = NET_IPv6_FRAG_OFFSET_NONE;
+    NET_IPv6_TX_GET_ID(ID);
+
+    while (p_buf != (NET_BUF *)0) {
+
+        p_buf_hdr = &p_buf->Hdr;
+        p_if      = NetIF_Get(p_buf_hdr->IF_Nbr, p_err);
+        p_dev_cfg = p_if->Dev_Cfg;
+
+        p_buf_hdr->IP_HdrIx = p_dev_cfg->TxBufIxOffset;
+        NetIF_TxIxDataGet(p_buf_hdr->IF_Nbr,
+                          0,
+                         &p_buf_hdr->IP_HdrIx,
+                          p_err);
+
+                                                                /* ---------------- SET FRAGMENT INFO ----------------- */
+                                                                /* Get the fragment offset.                             */
+        fragOffsetFlag = datagram_offset & NET_IPv6_FRAG_OFFSET_MASK;
+
+        datagram_offset   += p_buf_hdr->TotLen;
+
+                                                                /* Determine the more frag flag.                        */
+        if (p_buf_hdr->NextBufPtr != (NET_BUF *)0){
+            DEF_BIT_SET(fragOffsetFlag, NET_IPv6_FRAG_FLAG_MORE);
+        }
+
+                                                                /* ------------ PREPARE EXTENSION HEADERS ------------- */
+        data_ix      = 0;
+        data_ix_prev = 0;
+        p_ext_hdr    = p_ext_hdr_list;
+        while (p_ext_hdr != (NET_IPv6_EXT_HDR *)0) {
+
+            p_ext_hdr_next = p_ext_hdr->NextHdrPtr;
+            p_ext_hdr_prev = p_ext_hdr->PrevHdrPtr;
+
+                                                                /* Set Type of Next Header.                             */
+            if(p_ext_hdr_next != (NET_IPv6_EXT_HDR *)0) {
+                next_hdr_type = p_ext_hdr_next->Type;
+            } else {
+                switch (p_buf_hdr->ProtocolHdrType) {
+                    case NET_PROTOCOL_TYPE_ICMP_V6:
+                         next_hdr_type = NET_IP_HDR_PROTOCOL_ICMPv6;
+                         break;
+
+
+                    case NET_PROTOCOL_TYPE_UDP_V6:
+                         next_hdr_type = NET_IP_HDR_PROTOCOL_UDP;
+                         break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+                    case NET_PROTOCOL_TYPE_TCP_V6:
+                         next_hdr_type = NET_IP_HDR_PROTOCOL_TCP;
+                         break;
+#endif
+
+
+                    default:
+                         NET_CTR_ERR_INC(Net_ErrCtrs.IPv6.TxInvProtocolCtr);
+                        *p_err = NET_ERR_INVALID_PROTOCOL;
+                         return;
+                }
+            }
+
+                                                                /* Set Ext Hdr Data Index.                              */
+            if (p_ext_hdr_prev != (NET_IPv6_EXT_HDR *)0) {
+                data_ix = data_ix_prev + p_ext_hdr_prev->Len;
+            } else {
+                data_ix = p_buf_hdr->IP_HdrIx + NET_IPv6_HDR_SIZE;
+            }
+
+                                                                /* Callback function to write content of ext hdr.      */
+            switch (p_ext_hdr->Type) {
+                case NET_IP_HDR_PROTOCOL_EXT_HOP_BY_HOP:
+                case NET_IP_HDR_PROTOCOL_EXT_DEST:
+                case NET_IP_HDR_PROTOCOL_EXT_ROUTING:
+                case NET_IP_HDR_PROTOCOL_EXT_ESP:
+                case NET_IP_HDR_PROTOCOL_EXT_AUTH:
+                case NET_IP_HDR_PROTOCOL_EXT_MOBILITY:
+                     ext_hdr_arg.BufIx   =  data_ix;
+                     ext_hdr_arg.BufPtr  =  p_buf;
+                     ext_hdr_arg.NextHdr =  next_hdr_type;
+                     fnct                = (CPU_FNCT_PTR)p_ext_hdr->Fnct;
+                     fnct((void *) &ext_hdr_arg);
+                     break;
+
+
+                case NET_IP_HDR_PROTOCOL_EXT_FRAG:
+                     frag_hdr_arg.BufIx      =  data_ix;
+                     frag_hdr_arg.BufPtr     =  p_buf;
+                     frag_hdr_arg.NextHdr    =  next_hdr_type;
+                     frag_hdr_arg.FragOffset =  NET_UTIL_HOST_TO_NET_16(fragOffsetFlag);
+                     frag_hdr_arg.FragID     =  NET_UTIL_HOST_TO_NET_32(ID);
+                     fnct                    = (CPU_FNCT_PTR)p_ext_hdr->Fnct;
+                     fnct((void *) &frag_hdr_arg);
+                     break;
+
+
+                default:
+                   *p_err = NET_IPv6_ERR_INVALID_EH;
+                    return;
+            }
+
+            p_buf_hdr->IPv6_ExtHdrLen += p_ext_hdr->Len;
+            p_buf_hdr->TotLen         += p_ext_hdr->Len;
+
+            data_ix_prev = data_ix;
+            p_ext_hdr    = p_ext_hdr->NextHdrPtr;
+        }
+
+        p_buf = p_buf_hdr->NextBufPtr;
+
+    }
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_TxPktPrepareFragHdr()
+*
+* Description : Prepare packet and chained fragments for IPv6 fragmentation.
+*
+* Argument(s) : p_buf           Pointer to network buffer to transmit IPv6 packet.
+*
+*               p_buf_hdr       Pointer to network buffer header.
+*
+*               p_protocol_ix   Pointer to a protocol header index.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               No Error.
+*
+*                               NET_IPv6_ERR_INVALID_PROTOCOL   The protocol that carries the fragment is not
+*                                                                   UDP, TCP or ICMP.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_TxPkt().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if 0
+static  void  NetIPv6_TxPktPrepareFragHdr(NET_BUF      *p_buf,
+                                          NET_BUF_HDR  *p_buf_hdr,
+                                          CPU_INT16U   *p_protocol_ix,
+                                          NET_ERR      *p_err)
+{
+    NET_IPv6_FRAG_HDR    *p_frag_hdr;
+    NET_IPv6_FRAG_FLAGS   fragOffsetFlag;
+    CPU_INT16U            datagram_offset;
+    CPU_INT32U            ID;
+
+
+    datagram_offset = 0u;
+    fragOffsetFlag  = NET_IPv6_FRAG_OFFSET_NONE;
+    NET_IPv6_TX_GET_ID(ID);
+
+   *p_protocol_ix -= NET_IPv6_FRAG_HDR_SIZE;
+
+    while (p_buf != (NET_BUF *)0) {
+
+        p_buf_hdr = &p_buf->Hdr;
+        p_buf_hdr->IPv6_ExtHdrLen += NET_IPv6_FRAG_HDR_SIZE;
+        p_frag_hdr = (NET_IPv6_FRAG_HDR *)&p_buf->DataPtr[*p_protocol_ix];
+        Mem_Clr(p_frag_hdr, NET_IPv6_FRAG_HDR_SIZE);
+
+                                                                /* Set the Next Hdr field of the Frag Hdr.              */
+        switch (p_buf_hdr->ProtocolHdrType) {
+            case NET_PROTOCOL_TYPE_ICMP_V6:
+                 p_frag_hdr->NextHdr = NET_IP_HDR_PROTOCOL_ICMPv6;
+                 break;
+
+#ifdef  NET_TCP_MODULE_PRESENT
+            case NET_PROTOCOL_TYPE_TCP_V6:
+                 p_frag_hdr->NextHdr = NET_IP_HDR_PROTOCOL_TCP;
+                 break;
+#endif
+
+            case NET_PROTOCOL_TYPE_UDP_V6:
+                 p_frag_hdr->NextHdr = NET_IP_HDR_PROTOCOL_UDP;
+                 break;
+
+
+            default:
+                *p_err = NET_IPv6_ERR_INVALID_PROTOCOL;
+                 return;
+        }
+
+        p_buf_hdr->ProtocolHdrType = NET_PROTOCOL_TYPE_IP_V6_EXT_FRAG;
+
+                                                                /* Get the fragment offset.                             */
+        fragOffsetFlag = datagram_offset & NET_IPv6_FRAG_OFFSET_MASK;
+
+#if 1
+        datagram_offset  += p_buf_hdr->TotLen;
+        p_buf_hdr->TotLen += NET_IPv6_FRAG_HDR_SIZE;
+#else
+        datagram_offset += 1448;
+#endif
+                                                                /* Determine the more frag flag.                        */
+        if (p_buf_hdr->NextBufPtr != (NET_BUF *)0){
+            DEF_BIT_SET(fragOffsetFlag, NET_IPv6_FRAG_FLAG_MORE);
+        }
+
+        p_frag_hdr->FragOffsetFlag = NET_UTIL_HOST_TO_NET_16(fragOffsetFlag);
+
+
+
+        p_buf = p_buf_hdr->NextBufPtr;
+
+    }
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_TxPktDatagram()
+*
+* Description : (1) Transmit IPv6 packet datagram :
+*
+*                   (a) Select next-route IPv6 address
+*                   (b) Transmit IPv6 packet datagram via next IPv6 address route :
+*
+*                       (1) Destination is this host                Send to Loopback Interface
+*                       (2) Destination is multicast                Send to Network  Interface Transmit
+*                       (3) Destination is Local  Host              Send to Network  Interface Transmit
+*                       (4) Destination is Remote Host              Send to Network  Interface Transmit
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to transmit IPv6 packet.
+*               ----        Argument checked   in NetIPv6_Tx(),
+*                                                 NetIPv6_ReTx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetIPv6_Tx(),
+*                                                 NetIPv6_ReTx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   - RETURNED BY NetIPv6_TxPktDatagramRouteSel() : -
+*                               NET_IPv6_ERR_TX_DEST_LOCAL_HOST     Destination is a local host address.
+*                               NET_IPv6_ERR_TX_DEST_MULTICAST      Multicast destination.
+*                               NET_IPv6_ERR_TX_DEST_HOST_THIS_NET  Destination is on same link.
+*                               NET_IPv6_ERR_TX_DFLT_GATEWAY        Next-hop is the default router.
+*                               NET_IPv6_ERR_TX_DFLT_GATEWAY_NONE   Next-hop is a router in the router list.
+*                               NET_IPv6_ERR_TX_NEXT_HOP_NONE       No next-hop is available.
+*
+*                                                                   ---------- RETURNED BY NetIF_Tx() : -----------
+*                               NET_IF_ERR_NONE                     Packet successfully transmitted.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*                               NET_ERR_TX                          Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_TxPkt(),
+*               NetIPv6_ReTxPkt().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_TxPktDatagram (NET_BUF      *p_buf,
+                                     NET_BUF_HDR  *p_buf_hdr,
+                                     NET_ERR      *p_err)
+{
+                                                                /* --------------- SEL NEXT-ROUTE ADDR ---------------- */
+    NetIPv6_TxPktDatagramRouteSel(p_buf,p_buf_hdr, p_err);
+
+
+    switch (*p_err) {                                           /* --------------- TX IPv6 PKT DATAGRAM --------------- */
+        case NET_IPv6_ERR_TX_DEST_LOCAL_HOST:
+             p_buf_hdr->IF_NbrTx = NET_IF_NBR_LOCAL_HOST;
+             NetIF_Tx(p_buf, p_err);
+             break;
+
+
+        case NET_IPv6_ERR_NONE:
+        case NET_IPv6_ERR_TX_DEST_MULTICAST:
+             p_buf_hdr->IF_NbrTx = p_buf_hdr->IF_Nbr;
+             NetIF_Tx(p_buf, p_err);
+             break;
+
+
+        case NET_IPv6_ERR_TX_DEST_INVALID:
+        case NET_IPv6_ERR_INVALID_ADDR_HOST:
+        case NET_IPv6_ERR_NEXT_HOP:
+        default:
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetIPv6_TxPktDatagramRouteSel()
+*
+* Description : (1) Configure next-route IPv6 address for transmit IPv6 packet datagram :
+*
+*                   (a) Select next-route IPv6 address :
+*                       (1) Destination is this host                    See Note #3
+*                       (2) Link-local Host                             See Note #2a
+*                       (3) Remote Host                                 See Note #2a
+*                       (4) Multicast                                   See Note #2c
+*
+*                   (b) Configure next-route IPv6 address for all buffers in buffer list.
+*
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header of IPv6 transmit packet.
+*               --------    Argument validated in NetIPv6_Tx(),
+*                                                 NetIPv6_ReTx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_TX_DEST_LOCAL_HOST      Destination is a local host address.
+*                               NET_IPv6_ERR_TX_DEST_MULTICAST       Multicast destination.
+*
+*                                                                    --- RETURNED by NetNDP_NextHopByIF() ---
+*                               NET_IPv6_ERR_TX_DEST_HOST_THIS_NET   Destination is on same link.
+*                               NET_IPv6_ERR_TX_DFLT_GATEWAY         Next-hop is the default router.
+*                               NET_IPv6_ERR_TX_DFLT_GATEWAY_NONE    Next-hop is a router in the router list.
+*                               NET_IPv6_ERR_TX_NEXT_HOP_NONE        No next-hop is available.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_TxPktDatagram().
+*
+* Note(s)     :(2) RFC #4861, Section 5.2 Next-hop determination :
+*                   (a) "The sender performs a longest prefix match against the Prefix List to determine
+*                        whether the packet's destination is on- or off-link.  If the destination is on-link,
+*                        the next-hop address is the same as the packet's destination address. Otherwise,
+*                        the sender selects a router from the Default Router List."
+*
+*                   (b) " For efficiency reasons, next-hop determination is not performed on every packet
+*                         that is sent. Instead, the results of next-hop determination computations are saved
+*                         in the Destination Cache (which also contains updates learned from Redirect messages).
+*                         When the sending node has a packet to send, it first examines the Destination Cache.
+*                         If no entry exists for the destination, next-hop determination is invoked to create
+*                         a Destination Cache entry."
+*
+*                   (c) "For multicast packets, the next-hop is always the (multicast) destination address
+*                        and is considered to be on-link.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_TxPktDatagramRouteSel (NET_BUF      *p_buf,
+                                             NET_BUF_HDR  *p_buf_hdr,
+                                             NET_ERR      *p_err)
+{
+#if 0
+    NET_IPv6_HDR        *p_ip_hdr;
+#endif
+           NET_BUF             *p_buf_list;
+           NET_BUF_HDR         *p_buf_list_hdr;
+           NET_IF_NBR           if_nbr;
+           NET_IF_NBR           if_nbr_found;
+    const  NET_IPv6_ADDR       *p_addr_next_hop;
+    const  NET_IPv6_ADDR       *p_addr_dest;
+           CPU_BOOLEAN          addr_mcast;
+
+
+#if 0
+    p_ip_hdr    = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+#endif
+
+    if_nbr      =  p_buf_hdr->IF_Nbr;
+    p_addr_dest = &p_buf_hdr->IPv6_AddrDest;
+
+                                                                /* Multicast Address destination.                       */
+    addr_mcast = NetIPv6_IsAddrMcast(p_addr_dest);
+    if (addr_mcast == DEF_TRUE) {
+        p_addr_next_hop = p_addr_dest;
+       *p_err = NET_IPv6_ERR_TX_DEST_MULTICAST;
+        goto exit;
+    }
+
+                                                                /* Verify that addr dest is not an addr on current IF.  */
+    if_nbr_found = NetIPv6_GetAddrHostIF_Nbr(p_addr_dest);
+    if (if_nbr == if_nbr_found) {
+        p_addr_next_hop = p_addr_dest;
+       *p_err = NET_IPv6_ERR_TX_DEST_LOCAL_HOST;
+        goto exit;
+    }
+
+#ifdef  NET_NDP_MODULE_EN
+                                                                /* ---------------- FIND NEXT HOP ADDRESS ------------- */
+    p_addr_next_hop = NetNDP_NextHopByIF(if_nbr,
+                                         p_addr_dest,
+                                         p_err);
+    switch (*p_err) {
+        case NET_NDP_ERR_TX_DEST_MULTICAST:
+        case NET_NDP_ERR_TX_DEST_HOST_THIS_NET:
+        case NET_NDP_ERR_TX_DFLT_GATEWAY:
+        case NET_NDP_ERR_TX_NO_DFLT_GATEWAY:
+            *p_err = NET_IPv6_ERR_NONE;
+             break;
+
+
+        case NET_NDP_ERR_TX_NO_NEXT_HOP:
+        default:
+            *p_err = NET_IPv6_ERR_NEXT_HOP;
+             break;
+    }
+#else
+    *p_err = NET_IPv6_ERR_NEXT_HOP;
+#endif
+
+
+exit:
+    if (*p_err != NET_IPv6_ERR_NEXT_HOP) {
+         p_buf_list     = p_buf;
+         p_buf_list_hdr = p_buf_hdr;
+         while (p_buf_list != (NET_BUF *)0) {
+            p_buf_list_hdr->IPv6_AddrNextRoute = *p_addr_next_hop;
+            p_buf_list     = p_buf_list_hdr->NextBufPtr;
+            p_buf_list_hdr = &p_buf_list->Hdr;
+        }
+
+    } else {
+                                                                /* ICMPv6 Destination Unreachable Error message should ...  */
+                                                                /* ... be sent. #### NET-781                                */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetIPv6_TxPktDiscard()
+*
+* Description : On any IPv6 transmit packet error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_Tx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_TxPktDiscard (NET_BUF  *p_buf,
+                                    NET_ERR  *p_err)
+{
+    NET_CTR  *p_ctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    p_ctr = (NET_CTR *)&Net_ErrCtrs.IPv6.TxPktDisCtr;
+#else
+    p_ctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)p_ctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetIPv6_ReTxPkt()
+*
+* Description : (1) Prepare & re-transmit IPv6 packet :
+*
+*                   (a) Prepare     IPv6 header
+*                   (b) Re-transmit IPv6 packet datagram
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to re-transmit IPv6 packet.
+*               ----        Argument checked   in NetIPv6_ReTx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetIPv6_ReTx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   -- RETURNED BY NetIPv6_TxPktDatagram() : --
+*                               NET_IF_ERR_NONE                     Packet successfully transmitted.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*                               NET_IPv6_ERR_INVALID_ADDR_HOST      Invalid IPv6 host    address.
+*                               NET_IPv6_ERR_TX_DEST_INVALID        Invalid transmit destination.
+*                               NET_ERR_TX                          Transmit error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_ReTx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_ReTxPkt (NET_BUF      *p_buf,
+                               NET_BUF_HDR  *p_buf_hdr,
+                               NET_ERR      *p_err)
+{
+                                                                /* ----------------- PREPARE IPv6 HDR ----------------- */
+    NetIPv6_ReTxPktPrepareHdr(p_buf,
+                            p_buf_hdr,
+                            p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ------------- RE-TX IPv6 PKT DATAGRAM -------------- */
+    NetIPv6_TxPktDatagram(p_buf, p_buf_hdr, p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetIPv6_ReTxPktPrepareHdr()
+*
+* Description : (1) Prepare IPv6 header for re-transmit IPv6 packet :
+*
+*                   (a) Update network buffer's protocol & length controls
+*
+*                   (b) (1) Version
+*                       (2) Traffic Class
+*                       (3) Flow Label
+*                       (4) Payload Length
+*                       (5) Next Header
+*                       (6) Hop Limit
+*                       (7) Source      Address
+*                       (8) Destination Address
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to transmit IPv6 packet.
+*               ----        Argument checked   in NetIPv6_Tx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetIPv6_Tx().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_NONE               IPv6 header successfully prepared.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_ReTxPkt().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetIPv6_ReTxPktPrepareHdr (NET_BUF      *p_buf,
+                                         NET_BUF_HDR  *p_buf_hdr,
+                                         NET_ERR      *p_err)
+{
+#if 0
+    NET_IPv6_HDR  *p_ip_hdr;
+#endif
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+    p_buf_hdr->ProtocolHdrType    =  NET_PROTOCOL_TYPE_IP_V6;   /* Update buf protocol for IPv6.                        */
+    p_buf_hdr->ProtocolHdrTypeNet =  NET_PROTOCOL_TYPE_IP_V6;
+                                                                /* Reset tot len for re-tx.                             */
+    p_buf_hdr->TotLen             = (NET_BUF_SIZE)p_buf_hdr->IP_TotLen;
+
+
+                                                                /* ----------------- PREPARE IPv6 HDR ----------------- */
+#if 0
+    p_ip_hdr = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+#endif
+
+   (void)&p_buf;
+
+   *p_err = NET_IPv6_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'net_ipv6.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of IPv6 module include (see Note #1).            */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ipv6.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ipv6.h
new file mode 100644
index 0000000..0cf075e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ipv6.h
@@ -0,0 +1,1456 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     NETWORK IP LAYER VERSION 6
+*                                       (INTERNET PROTOCOL v6)
+*
+* Filename      : net_ipv6.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) Supports Internet Protocol as described in RFC #2460, also known as IPv6, with the
+*                     following restrictions/constraints :
+**
+*                     (a) IPv6 forwarding/routing NOT currently supported       RFC #2460
+*
+*                     (b) Transmit fragmentation  NOT currently supported       RFC #2460, Section 4.5
+*                                                                              'Fragment Header'
+*
+*                     (c) IPv6 Security options   NOT           supported       RFC #4301
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  "../../Source/net_cfg_net.h"
+#include  "../../Source/net_ip.h"
+#include  "../../Source/net_type.h"
+#include  "../../Source/net_tmr.h"
+
+#include  "../../IF/net_if.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Network IPv6 Layer module is required for applications that requires IPv6 services.
+*
+*               See also 'net_cfg.h  IP LAYER CONFIGURATION'.
+*
+*           (2) The following IP-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require IPv6 Layer
+*               configuration (see 'net_cfg_net.h  IP LAYER CONFIGURATION  Note #2b') :
+*
+*                   NET_IPv6_MODULE_EN
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IPv6_MODULE_PRESENT
+#define  NET_IPv6_MODULE_PRESENT
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           DAD DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_DAD_SIGNAL_TIMEOUT_MS    (NET_NDP_SOLICIT_NBR_MAX * NET_NDP_RETRANS_TIMEOUT_MAX_SEC * 1000u)
+
+
+/*
+*********************************************************************************************************
+*                                           IPv6 FLAG DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_FLAG_BLOCK_EN             DEF_BIT_01
+#define  NET_IPv6_FLAG_DAD_EN               DEF_BIT_02
+
+
+/*
+*********************************************************************************************************
+*                                     IP MULTICAST SELECT DEFINES
+*
+* Note(s) : (1) The following IP values MUST be pre-#define'd in 'net_def.h' PRIOR to 'net_cfg.h'
+*               so that the developer can configure IP for the desired IP multicast selection (see
+*               'net_def.h  IP LAYER DEFINES  Note #1') :
+*
+*                   NET_IP_MULTICAST_SEL_NONE
+*                   NET_IP_MULTICAST_SEL_TX
+*                   NET_IP_MULTICAST_SEL_TX_RX
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+#define  NET_IP_MULTICAST_SEL_NONE                         0u
+#define  NET_IP_MULTICAST_SEL_TX                           1u
+#define  NET_IP_MULTICAST_SEL_TX_RX                        2u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         IPv6 HEADER DEFINES
+*
+* Note(s) : (1) The following IPv6 value MUST be pre-#define'd in 'net_def.h' PRIOR to 'net_buf.h' so that
+*               the Network Buffer Module can configure maximum buffer header size (see 'net_def.h  IPv6
+*               LAYER DEFINES' & 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1') :
+*
+*               (a) NET_IPv6_HDR_SIZE_MAX                 40        (NET_IPv6_HDR_LEN_MAX
+*                                                                  * NET_IPv6_HDR_LEN_WORD_SIZE)
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_HDR_VER_MASK                    0xF0000000u
+#define  NET_IPv6_HDR_VER_SHIFT                           28u
+#define  NET_IPv6_HDR_VER                                  6u
+
+#define  NET_IPv6_HDR_TRAFFIC_CLASS_MASK_32       0x0FF00000u
+#define  NET_IPv6_HDR_TRAFFIC_CLASS_MASK_16           0x00FFu
+#define  NET_IPv6_HDR_TRAFFIC_CLASS_SHIFT                 20u
+#define  NET_IPv6_HDR_TRAFFIC_CLASS               0x00000000u
+
+#define  NET_IPv6_HDR_DSCP_MASK_08                      0xFCu
+#define  NET_IPv6_HDR_DSCP_SHIFT                        0x02u
+
+#define  NET_IPv6_HDR_ECN_MASK_08                       0x03u
+
+#define  NET_IPv6_HDR_FLOW_LABEL_MASK             0x000FFFFFu
+#define  NET_IPv6_HDR_FLOW_LABEL_SHIFT                     0u
+#define  NET_IPv6_HDR_FLOW_LABEL                           0u
+
+#define  NET_IPv6_HDR_LEN_MASK                          0x0Fu
+#define  NET_IPv6_HDR_LEN_MIN                             10
+#define  NET_IPv6_HDR_LEN_MAX                             15
+#define  NET_IPv6_HDR_LEN_WORD_SIZE                      CPU_WORD_SIZE_32
+
+#if 0
+#define  NET_IPv6_HDR_SIZE                               40u
+#endif
+
+#define  NET_IPv6_HDR_SIZE_TOT_MIN                      (NET_IF_HDR_SIZE_TOT_MIN + NET_IPv6_HDR_SIZE)
+#define  NET_IPv6_HDR_SIZE_TOT_MAX                      (NET_IF_HDR_SIZE_TOT_MAX + NET_IPv6_HDR_SIZE_MAX)
+
+
+#define  NET_IPv6_ID_NONE                                  0u
+#define  NET_IPv6_ID_INIT                                NET_IPv6_ID_NONE
+
+
+/*
+*********************************************************************************************************
+*                              IPv6 EXTENSION HEADER SORT KEY DEFINES
+*
+* Note(s) : (1) Used to sort the extensions headers list for the appropriate order in the IPv6 packet.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_EXT_HDR_KEY_HOP_BY_HOP                   0u
+#define  NET_IPv6_EXT_HDR_KEY_DEST_01                      1u
+#define  NET_IPv6_EXT_HDR_KEY_ROUTING                      2u
+#define  NET_IPv6_EXT_HDR_KEY_FRAG                         3u
+#define  NET_IPv6_EXT_HDR_KEY_AUTH                         4u
+#define  NET_IPv6_EXT_HDR_KEY_ESP                          5u
+#define  NET_IPv6_EXT_HDR_KEY_DEST_02                      6u
+
+
+/*
+*********************************************************************************************************
+*                                IPv6 HEADER TRAFFIC CLASS (TC) DEFINES
+*
+* Note(s) : (1) (a) See 'IPv6 HEADER  Note #3'                   for TC             fields.
+*
+*               (b) See RFC # 791, Section 3.1 'Type of Service' for TC  Precedence values.
+*
+*               (c) See RFC #1349, Section 4                     for TOS            values.
+*
+*           (2) RFC #1122, Section 3.2.1.6 states that "the default ... TOS field ... is all zero bits."
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_HDR_TRAFFIC_CLASS_NONE                0x00u
+
+#define  NET_IPv6_HDR_TRAFFIC_CLASS_DFLT                 NET_IPv6_HDR_TRAFFIC_CLASS_NONE
+
+#define  NET_IPv6_TRAFFIC_CLASS_DFLT                     NET_IPv6_HDR_TRAFFIC_CLASS_DFLT
+
+/*
+*********************************************************************************************************
+*                                     IPv6 HEADER HOP LIMIT DEFINES
+*
+* Note(s) : (1) (a) IPv6 packet cannot be send with Hop Limit of zero. Therefore a Hop Limit of zero will be
+*                   change to the default Hop Limit want transmitting.
+*
+*               (b) uC/TCP-IP stack configured the IPv6 default Hop Limit to a value of 128.
+*
+*           (2) Multicast packet must always have a Hop Limit of 1 since they should not leave the local
+*               network.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_HDR_HOP_LIM_NONE                         0    /* On IPv6 Tx, subst _DFLT for _NONE (see Note #1a).    */
+#define  NET_IPv6_HDR_HOP_LIM_MIN                          1
+#define  NET_IPv6_HDR_HOP_LIM_MAX                        255
+#define  NET_IPv6_HDR_HOP_LIM_DFLT                       128
+
+#define  NET_IPv6_HOP_LIM_NONE                           NET_IPv6_HDR_HOP_LIM_NONE
+#define  NET_IPv6_HOP_LIM_MIN                            NET_IPv6_HDR_HOP_LIM_MIN
+#define  NET_IPv6_HOP_LIM_MAX                            NET_IPv6_HDR_HOP_LIM_MAX
+#define  NET_IPv6_HOP_LIM_DFLT                           NET_IPv6_HDR_HOP_LIM_DFLT
+
+#define  NET_IPv6_HOP_LIM_MULTICAST_DFLT                   1    /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*                               IPv6 HEADER FLOW LABEL DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_HDR_FLOW_LABEL_NONE                      0
+#define  NET_IPv6_HDR_FLOW_LABEL_MIN                       0
+#define  NET_IPv6_HDR_FLOW_LABEL_MAX              0x000FFFFF
+#define  NET_IPv6_HDR_FLOW_LABEL_DFLT                    NET_IPv6_HDR_FLOW_LABEL_NONE
+
+#define  NET_IPv6_FLOW_LABEL_NONE                        NET_IPv6_HDR_FLOW_LABEL_NONE
+#define  NET_IPv6_FLOW_LABEL_MIN                         NET_IPv6_HDR_FLOW_LABEL_MIN
+#define  NET_IPv6_FLOW_LABEL_MAX                         NET_IPv6_HDR_FLOW_LABEL_MAX
+#define  NET_IPv6_FLOW_LABEL_DFLT                        NET_IPv6_HDR_FLOW_LABEL_DFLT
+
+
+/*
+*********************************************************************************************************
+*                                    IPv6 DATA/TOTAL LENGTH DEFINES
+*
+* Note(s) : (1) (a) IPv6 total length #define's (NET_IPv6_TOT_LEN)  relate to the total size of a complete
+*                   IPv6 datagram, including the packet's IPv6 header.  Note that a complete IPv6 datagram
+*                   MAY be fragmented in multiple IPv6 packets.
+*
+*               (b) IPv6 data  length #define's (NET_IPv6_DATA_LEN) relate to the data  size of a complete
+*                   IPv6 datagram, equal to the total IPv6 datagram length minus its IPv6 header size.  Note
+*                   that a complete IPv6 datagram MAY be fragmented in multiple IPv6 packets.
+
+*           (2) RFC #2460, Section 5 'Packet Size Issues' required that "every link in the internet have
+*               an MTU of 1280 octets or greater."
+*********************************************************************************************************
+*/
+
+                                                                                /* See Notes #1a & #1b.                 */
+#define  NET_IPv6_DATA_LEN_MIN                             0
+
+#define  NET_IPv6_TOT_LEN_MIN                           (NET_IPv6_HDR_SIZE + NET_IPv6_DATA_LEN_MIN)
+#define  NET_IPv6_TOT_LEN_MAX                            DEF_INT_16U_MAX_VAL
+
+#define  NET_IPv6_DATA_LEN_MAX                          (NET_IPv6_TOT_LEN_MAX  - NET_IPv6_HDR_SIZE)
+
+
+#define  NET_IPv6_MAX_DATAGRAM_SIZE_DFLT                1280                    /* See Note #2.                         */
+
+
+/*
+*********************************************************************************************************
+*                                   IPv6 FRAGMENTATION & FLAG DEFINES
+*
+* Note(s) : (1) See 'IPv6 HEADER  Note #4' for flag fields.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_FRAG_FLAGS_MASK                     0x0007u
+
+#define  NET_IPv6_FRAG_NONE                              DEF_BIT_NONE
+#define  NET_IPv6_FRAG_FLAG_FRAG_MORE                    DEF_BIT_00
+
+/*
+*********************************************************************************************************
+*                                     IPv6 FRAGMENTATION DEFINES
+*
+* Note(s) : (1) The fragment offset field of the Fragment Header is located at bits [15-3]. It is a value
+*               representing a 8-byte multiple offset. Since the field starts at bit 3, masking the lower
+*               3 bits of the field provides a byte multiple offset of the fragment.
+*
+*           (2) If insufficient fragments are received to complete reassembly of a packet within
+*                   60 seconds of the reception of the first-arriving fragment of that packet,
+*                   reassembly of that packet must be abandoned and all the fragments that have been
+*                   received for that packet must be discarded.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_FRAG_OFFSET_MASK                    0xFFF8u
+#define  NET_IPv6_FRAG_OFFSET_NONE                         0u
+#define  NET_IPv6_FRAG_OFFSET_MIN                          0u
+#define  NET_IPv6_FRAG_OFFSET_MAX                     0xFFF8u
+#define  NET_IPv6_FRAG_FLAG_MORE                         DEF_BIT_00
+
+
+#define  NET_IPv6_FRAG_SIZE_UNIT                           8u   /* Frag size unit = 8 octets (see Note #1).             */
+
+#define  NET_IPv6_FRAG_SIZE_NONE                         DEF_INT_16U_MAX_VAL
+#define  NET_IPv6_FRAG_SIZE_MIN_FRAG_MORE                NET_IPv6_FRAG_SIZE_UNIT
+#define  NET_IPv6_FRAG_SIZE_MIN_FRAG_LAST                  1u
+
+#define  NET_IPv6_FRAG_SIZE_MAX                        65535u
+
+                                                                /* IPv6 frag reasm timeout (see Note #2) :              */
+#define  NET_IPv6_FRAG_REASM_TIMEOUT_MIN_SEC               1u   /* IPv6 frag reasm timeout min  =  1 seconds            */
+#define  NET_IPv6_FRAG_REASM_TIMEOUT_MAX_SEC             120u   /* IPv6 frag reasm timeout max  = 10 seconds            */
+#define  NET_IPv6_FRAG_REASM_TIMEOUT_DFLT_SEC             60u   /* IPv6 frag reasm timeout dflt = 60 seconds            */
+
+
+/*
+*********************************************************************************************************
+*                                        IPv6 ADDRESS DEFINES
+*
+* Note(s) : (1) See the RFC #4291 'IPv6 Addressing Architecture' for IPv6 address summary.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_MCAST_RSVD_ADDR_MAX_VAL               (DEF_INT_08U_MAX_VAL & DEF_NIBBLE_MASK)
+
+static const NET_IPv6_ADDR  NET_IPv6_ADDR_ANY_INIT                  = { { 0,   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } };
+static const NET_IPv6_ADDR  NET_IPv6_ADDR_LOOPBACK_INIT             = { { 0,   0,0,0,0,0,0,0,0,0,0,0,0,0,0,1 } };
+static const NET_IPv6_ADDR  NET_IPv6_ADDR_LINKLOCAL_ALLNODES_INIT   = { { 0xFF,2,0,0,0,0,0,0,0,0,0,0,0,0,0,1 } };
+static const NET_IPv6_ADDR  NET_IPv6_ADDR_LINKLOCAL_ALLROUTERS_INIT = { { 0xFF,2,0,0,0,0,0,0,0,0,0,0,0,0,0,2 } };
+
+#define  NET_IPv6_ADDR_ANY                               NET_IPv6_ADDR_ANY_INIT
+#define  NET_IPv6_ADDR_NONE                              NET_IPv6_ADDR_ANY
+#define  NET_IPv6_ADDR_WILDCARD                          NET_IPv6_ADDR_ANY
+#define  NET_IPv6_ADDR_LOOPBACK                          NET_IPv6_ADDR_LOOPBACK_INIT
+#define  NET_IPv6_ADDR_LINKLOCAL_ALLNODES                NET_IPv6_ADDR_LINKLOCAL_ALLNODES_INIT
+#define  NET_IPv6_ADDR_LINKLOCAL_ALLROUTERS              NET_IPv6_ADDR_LINKLOCAL_ALLROUTERS_INIT
+
+
+/*
+*********************************************************************************************************
+*                                   IPv6 SOURCE ADDR SELECTION DEFINES
+*
+* Note(s) : (1) Priority order of rules to select source address.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_SRC_SEL_RULE_MIN                      1u
+#define  NET_IPv6_SRC_SEL_RULE_MAX                    255u
+
+#define  NET_IPv6_SRC_SEL_RULE_NONE                     NET_IPv6_SRC_SEL_RULE_MAX
+
+
+#define  NET_IPv6_SRC_SEL_RULE_01                       1u
+#define  NET_IPv6_SRC_SEL_RULE_02                       2u
+#define  NET_IPv6_SRC_SEL_RULE_03                       3u
+#define  NET_IPv6_SRC_SEL_RULE_04                       4u
+#define  NET_IPv6_SRC_SEL_RULE_05                       5u
+#define  NET_IPv6_SRC_SEL_RULE_06                       6u
+#define  NET_IPv6_SRC_SEL_RULE_07                       7u
+#define  NET_IPv6_SRC_SEL_RULE_08                       8u
+
+
+
+/*
+*********************************************************************************************************
+*                                      IPv6 ADDRESS TYPE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_ADDR_TYPE_NONE                           0u
+#define  NET_IPv6_ADDR_TYPE_UNSPECIFIED                    1u
+#define  NET_IPv6_ADDR_TYPE_LOOPBACK                       2u
+#define  NET_IPv6_ADDR_TYPE_UNICAST                        3u
+#define  NET_IPv6_ADDR_TYPE_LINK_LOCAL                     4u
+#define  NET_IPv6_ADDR_TYPE_SITE_LOCAL                     5u
+#define  NET_IPv6_ADDR_TYPE_MCAST                          6u
+#define  NET_IPv6_ADDR_TYPE_MCAST_SOL                      7u
+#define  NET_IPv6_ADDR_TYPE_MCAST_ROUTERS                  8u
+#define  NET_IPv6_ADDR_TYPE_MCAST_ROUTERS_MLDV2            9u
+#define  NET_IPv6_ADDR_TYPE_MCAST_NODES                   10u
+#define  NET_IPv6_ADDR_TYPE_MCAST_RSVD                    12u
+
+/*
+*********************************************************************************************************
+*                                     IPv6 ADDRESS PREFIX DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_ADDR_PREFIX_CUSTOM                       0u
+#define  NET_IPv6_ADDR_PREFIX_LINK_LOCAL                   1u
+#define  NET_IPv6_ADDR_PREFIX_SITE_LOCAL                   2u
+#define  NET_IPv6_ADDR_PREFIX_MCAST                        3u
+
+#define  NET_IPv6_ADDR_PREFIX_LINK_LOCAL_LEN              64u
+
+#define  NET_IPv6_ADDR_PREFIX_LEN_MIN                      0u
+#define  NET_IPv6_ADDR_PREFIX_LEN_MAX                    128u
+
+
+/*
+*********************************************************************************************************
+*                             IPv6 ADDRESS AUTO CONFIGURATION ID DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_ADDR_AUTO_CFG_ID_NONE                    0u
+#define  NET_IPv6_ADDR_AUTO_CFG_ID_IEEE_48                 1u
+
+#define  NET_IPv6_ADDR_AUTO_CFG_ID_LEN_NONE                0u
+#define  NET_IPv6_ADDR_AUTO_CFG_ID_LEN_IEEE_48            64u
+
+/*
+*********************************************************************************************************
+*                              IPv6 ADDRESS CONFIGURATION MODES DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_ADDR_CFG_MODE_MANUAL                     0u
+#define  NET_IPv6_ADDR_CFG_MODE_AUTO                      10u
+
+
+/*
+*********************************************************************************************************
+*                              IPv6 ADDRESS CONFIGURATION STATE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_ADDR_CFG_STATE_NONE                      0u
+#define  NET_IPv6_ADDR_CFG_STATE_STATIC                   10u
+#define  NET_IPv6_ADDR_CFG_STATE_DYNAMIC                  20u
+#define  NET_IPv6_ADDR_CFG_STATE_DYNAMIC_INIT             21u
+#define  NET_IPv6_ADDR_CFG_STATE_AUTO_CFGD                30u
+
+/*
+*********************************************************************************************************
+*                              IPv6 ADDRESS STATE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_ADDR_STATE_NONE                          0u
+#define  NET_IPv6_ADDR_STATE_PREFERRED                    10u
+#define  NET_IPv6_ADDR_STATE_DEPRECATED                   20u
+#define  NET_IPv6_ADDR_STATE_TENTATIVE                    30u
+#define  NET_IPv6_ADDR_STATE_DUPLICATED                   40u
+
+
+/*
+*********************************************************************************************************
+*                      IPv6 HOP-BY-HOP & DESTINATION OPTION EXTENSION HEADER DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_EH_TLV_TYPE_ACT_MASK                  0xC0
+#define  NET_IPv6_EH_TLV_TYPE_CHG_MASK                  0x20
+#define  NET_IPv6_EH_TLV_TYPE_OPT_MASK                  0x1F
+
+#define  NET_IPv6_EH_TLV_TYPE_ACT_SKIP                  0x00
+#define  NET_IPv6_EH_TLV_TYPE_ACT_DISCARD               0x40
+#define  NET_IPv6_EH_TLV_TYPE_ACT_DISCARD_IPPM          0x80
+#define  NET_IPv6_EH_TLV_TYPE_ACT_DISCARD_IPPM_MC       0xC0
+
+#define  NET_IPv6_EH_TLV_TYPE_CHG_SHIFT                    6u
+
+#define  NET_IPv6_EH_TYPE_PAD1                          0x00
+#define  NET_IPv6_EH_TYPE_PADN                          0x01
+#define  NET_IPv6_EH_TYPE_ROUTER_ALERT                  0x05
+
+
+/*
+*********************************************************************************************************
+*                                    IPv6 Router Alert Option Values
+*
+*   Reference
+*           [RFC2711]
+*
+*      Value                          Description                                        Reference
+*        0      Datagram contains a Multicast Listener Discovery message                 [RFC2710]
+*        1      Datagram contains RSVP message                                           [RFC2711]
+*        2      Datagram contains an Active Networks message                             [RFC2711]
+*        3      Reserved                                                                 [RFC5350]
+*      4-35     Aggregated Reservation Nesting Level                                     [RFC3175]
+*      36-67    QoS NSLP Aggregation Levels 0-31                                         [RFC5974]
+*       68      NSIS NATFW NSLP                                                          [RFC5973]
+*    69-65502   Unassigned
+*   65503-65534 Reserved for experimental use                                            [RFC5350]
+*      65535    Reserved                                                                 [IANA   ]
+
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_EH_TYPE_ROUTER_ALERT_MLDP           0x0000
+#define  NET_IPv6_EH_TYPE_ROUTER_ALERT_RSVP           0x0001
+#define  NET_IPv6_EH_TYPE_ROUTER_ALERT_AN             0x0002
+
+
+/*
+*********************************************************************************************************
+*                             IPv6 EXTENSION HEADER SIZE ALIGNMENT DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_EH_ALIGN_SIZE                            8u
+
+/*
+*********************************************************************************************************
+*                                     IPv6 NEXT HEADER FIELD OFFSET
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_HDR_NEXT_HDR_IX                          6u
+
+/*
+*********************************************************************************************************
+*                              IPv6 ROUTING EXTENSION HEADER ROUTING TYPE
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_EH_ROUTING_TYPE_0                        0u
+#define  NET_IPv6_EH_ROUTING_TYPE_1                        1u
+#define  NET_IPv6_EH_ROUTING_TYPE_2                        2u
+
+
+/*
+*********************************************************************************************************
+*                                   IPv6 INTERNET TIMESTAMP DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_TS_NONE                         ((NET_TS)0u)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        IPv6 PREFIX ADDR TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_IPv6_ADDR_PREFIX_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                IPv6 AUTO CONFIGURATION ADDR ID TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_IPv6_ADDR_ID_TYPE;
+
+/*
+*********************************************************************************************************
+*                                       IPv6 NEXT HDR DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_IPv6_NEXT_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                    IPv6 ADDRESS SCOPE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum net_ipv6_scope {
+    NET_IPv6_ADDR_SCOPE_RESERVED    =  0u,
+    NET_IPv6_ADDR_SCOPE_IF_LOCAL    =  1u,
+    NET_IPv6_ADDR_SCOPE_LINK_LOCAL  =  2u,
+    NET_IPv6_ADDR_SCOPE_ADMIN_LOCAL =  4u,
+    NET_IPv6_ADDR_SCOPE_SITE_LOCAL  =  5u,
+    NET_IPv6_ADDR_SCOPE_ORG_LOCAL   =  8u,
+    NET_IPv6_ADDR_SCOPE_GLOBAL      = 14u,
+} NET_IPv6_SCOPE;
+
+
+/*
+*********************************************************************************************************
+*                                       IPv6 ADDRESS DATA TYPES
+*
+* Note(s) : (1) 'NET_IPv6_ADDR' pre-defined in 'net_type.h' PRIOR to all other network modules that
+*                require IPv6 address data type.
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+typedef  CPU_INT32U  NET_IPv6_ADDR;                             /* Defines IPv6 IP addr size.                           */
+#endif
+
+
+typedef  CPU_INT08U  NET_IPv6_ADDR_TYPE;
+
+typedef  CPU_INT08U  NET_IPv6_ADDR_STATE;
+                                                                /* ----------------- CFG'D IPv6 ADDRS ----------------- */
+typedef  CPU_INT08U  NET_IPv6_ADDR_CFG_STATE;
+
+typedef  struct  net_IPv6_addrs {
+    NET_IF_NBR                    IfNbr;
+    NET_IPv6_ADDR                 AddrHost;                     /* IPv6 host                addr.                       */
+    NET_IPv6_ADDR                *AddrMcastSolicitedPtr;
+    NET_IPv6_ADDR_CFG_STATE       AddrCfgState;                 /* IPv6                     addr auto cfg state.        */
+    CPU_INT08U                    AddrHostPrefixLen;            /* IPv6 host                addr prefix len (in bytes). */
+    NET_IPv6_ADDR_STATE           AddrState;
+    CPU_BOOLEAN                   IsValid;
+    NET_TMR                      *PrefLifetimeTmrPtr;
+    NET_TMR                      *ValidLifetimeTmrPtr;
+} NET_IPv6_ADDRS;
+
+
+/*
+*********************************************************************************************************
+*                                       IPv6 TLV TYPE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_IPv6_TLV_TYPE;
+
+/*
+*********************************************************************************************************
+*                                       IPv6 TLV LENGTH DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_IPv6_TLV_LEN;
+
+
+/*
+*********************************************************************************************************
+*                                       IPv6 HOP BY HOP OPTION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_IPv6_OPT_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                      NETWORK INTERFACES' IPv6 ADDRESS CONFIGURATION DATA TYPE
+*
+* Note(s) : (1) Each configurable interface maintains its own unique IPv6 address configuration :
+*
+*               Network layer manager MAY eventually maintain each interface's network address(s)
+*                    & address configuration (see 'net_mgr.h  Note #1').
+*
+*               (a) Configured IPv6 addresses are organized in an address table implemented as an array :
+*
+*                   (1) (A) (1) NET_IPv6_CFG_IF_MAX_NBR_ADDR configures each interface's maximum number
+*                               of configured IPv6 addresses.
+*
+*                           (2) This value is used to declare the size of each interface's address table.
+*
+*                       (B) Each configurable interface's 'AddrsNbrCfgd' indicates the current number of
+*                           configured IPv6 addresses.
+*
+*                   (2) Each address table is zero-based indexed :
+*
+*                       (A) Configured addresses are organized contiguously from indices '0' to 'N - 1'.
+*
+*                       (B) NO addresses         are configured             from indices 'N' to 'M - 1',
+*                           for 'N' NOT equal to 'M'.
+*
+*                       (C) The next available table index to add a configured address is at index 'N',
+*                           if  'N' NOT equal to 'M'.
+*
+*                       (D) Each address table is initialized, & also de-configured, with NULL address
+*                           value NET_IPv6_ADDR_NONE, at ALL table indices following configured addresses.
+*
+*                               where
+*                                       M       maximum number of configured addresses (see Note #1a1A)
+*                                       N       current number of configured addresses (see Note #1a1B)
+*
+*               (b) (1) An interface may be configured with either :
+*
+*                       (A) One or more statically- configured IPv6 addresses (default configuration)
+*                               OR
+*                       (B) Exactly one dynamically-configured IPv6 address
+*                           #### NET-747
+*                           False for IPv6 ??  Stateless Auto-Cfg and DHCPv6 can both exits at the same time.
+*
+*                   (2) (A) (1) If an interface's IPv6 host address(s) are NOT already configured statically,
+*                               the application is NOT allowed to add a statically-configured IPv6 address.*
+*                               #### NET-822
+*
+*                           (2) The application MUST remove any dynamically-configured IPv6 address before
+*                               adding any statically-configured IPv6 address(s).
+*
+*                       (B) If any IPv6 host address(s) are configured on an interface when the application
+*                           configures a dynamically-configured IPv6 address, then ALL configured IPv6
+*                           address(s) are removed before configuring the dynamically-configured IPv6 address.
+*
+*                       (C) If NO IPv6 host address(s) are configured on an interface after the application
+*                           removes ALL configured IPv6 address(s), then the interface's IPv6 host address
+*                           configuration is defaulted back to statically-configured (see Note #1b1A).
+*
+*
+*        Each interface's                                 Configured IPv6
+*   IPv6 Address Configuration                            Addresses Table
+*         (see Note #1)                                   (see Note #1a)
+*
+*   --------------------------        -------------------------------------------------------       -----            -----
+*   |  Cfg'd IPv6 Addrs Tbl  | -----> |  Cfg'd Addr #0  | Subnet Mask #0  | Dflt Gateway #0 |         ^                ^
+*   |------------------------|        |-----------------|-----------------|-----------------|         |                |
+*   |  Nbr Cfg'd IPv6 Addrs  |        |  Cfg'd Addr #1  | Subnet Mask #1  | Dflt Gateway #1 |                          |
+*   |------------------------|        |-----------------|-----------------|-----------------|   Current number         |
+*   |     Addr Cfg State     |        |  Cfg'd Addr #2  | Subnet Mask #2  | Dflt Gateway #2 |   of configured          |
+*   |------------------------|        |-----------------|-----------------|-----------------|   IPv6 addresses         |
+*   | Addr Protocol Conflict |        |        .        |        .        |        .        |  on an interface         |
+*   --------------------------        |        .        |        .        |        .        |  (see Note #1a1B)
+*                                     |        .        |        .        |        .        |                    Maximum number
+*                                     |-----------------|-----------------|-----------------|         |          of configured
+*                                     |  Cfg'd Addr #N  | Subnet Mask #N  | Dflt Gateway #N |         v          IPv6 addresses
+*           Next available            |-----------------|-----------------|-----------------|       -----       for an interface
+*        address to configure  -----> |    ADDR NONE    |    ADDR NONE    |    ADDR NONE    |         ^         (see Note #1a1A)
+*          (see Note #1a2C)           |-----------------|-----------------|-----------------|         |
+*                                     |        .        |        .        |        .        |                          |
+*                                     |        .        |        .        |        .        |   Non-configured         |
+*                                     |        .        |        .        |        .        |  address entries         |
+*                                     |        .        |        .        |        .        |  (see Note #1a2D)        |
+*                                     |        .        |        .        |        .        |                          |
+*                                     |-----------------|-----------------|-----------------|         |                |
+*                                     |    ADDR NONE    |    ADDR NONE    |    ADDR NONE    |         v                v
+*                                     -------------------------------------------------------       -----            -----
+*
+*
+*********************************************************************************************************
+*/
+
+                                                                    /* ------------ IFs' IPv6 ADDR(S) CFG ------------- */
+typedef  struct  net_IPv6_if_cfg {
+                                                                    /* IF's   cfg'd IPv6 addr(s)     [see Note #1a].    */
+    NET_IPv6_ADDRS           AddrsTbl[NET_IPv6_CFG_IF_MAX_NBR_ADDR];
+    NET_IP_ADDRS_QTY         AddrsNbrCfgd;                          /* Nbr of cfg'd IP   addr(s)     [see Note #1a1B].  */
+
+} NET_IPv6_IF_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                            IPv6 HEADER
+*
+* Note(s) : (1) See RFC #2460, Section 3 for IPv6 datagram header format.
+*
+*           (2) (a) IPv6 Version Number, Traffic Class & Flow Label are encoded in the first word of an IPv6
+*                   header as follows :
+*
+*                                        31 28 27     20 19   0
+*                                       ------------------------
+*                                       | VER | TRAFFIC | FLOW |
+*                                       ------------------------
+*
+*                       where
+*                               VER         IPv6 version; currently 6 (see 'net_ipv6.h  Note #1')
+*                               TRAFFIC     Traffic Class; classes or priorities of IPv6 packets.
+*                               FLOW        Flow Label; label of sequences of packets.
+*
+*               (b) See RFC #2474 for Traffic Class field detailed description.
+*
+*               (c) See RFC #6437 for Flow Label    field detailed description.
+*
+*           (3) (a) IPv6 Payload Length, Next Header and Hop Limit are encoded in the seconrd word of an IPv6
+*                   header as follows :
+*
+*                                    31        16 15      8 7      0
+*                                   ---------------------------------
+*                                   | PAYLOADLEN | NEXTHDR | HOPLIM |
+*                                   ---------------------------------
+*
+*                       where
+*                               PAYLOADLEN  Payload Len; Length of the IPv6 payload following this IPv6 header.
+*                               NEXTHDR     Next Header; Identifies the type of header following the IPv6 header.
+*                               HOPLIM      Hop Limit; Decremented by 1 by each node that forwards the packet.
+*
+*           (4) (a) IPv6 Source Address is a 128-bit addresses specifying the originator of the packet
+*                   described as follow:
+*
+*                 127                                                                 0
+*                -----------------------------------------------------------------------
+*                |                              ADDR SRC                               |
+*                -----------------------------------------------------------------------
+*
+*                       where
+*                               ADDR SCR    Source Address; 128-bit address of the originator of the packet.
+*
+*               (b) IPv6 Destination Address is a 128-bit addresses specifying the recipient of the packet
+*                   described as follow:
+*
+*                 127                                                                 0
+*                -----------------------------------------------------------------------
+*                |                              ADDR DEST                              |
+*                -----------------------------------------------------------------------
+*
+*                       where
+*                               ADDR DEST   Destination Address; 128-bit address of the recipient of the packet.
+*
+*               (c) See RFC #4291 for more details on IPv6 addressing architecture.
+*
+**********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET IPv6 HDR ------------------- */
+typedef  struct  net_IPv6_hdr {
+    CPU_INT32U         VerTrafficFlow;                          /* IPv6 ver nbr/traffic class/flow label (see Note #2). */
+    CPU_INT16U         PayloadLen;                              /* IPv6 payload len.                                    */
+    NET_IPv6_NEXT_HDR  NextHdr;                                 /* IPv6 next hdr.                                       */
+    CPU_INT08U         HopLim;                                  /* IPv6 hop lim.                                        */
+    NET_IPv6_ADDR      AddrSrc;                                 /* IPv6 src  addr.                                      */
+    NET_IPv6_ADDR      AddrDest;                                /* IPv6 dest addr.                                      */
+} NET_IPv6_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                         IPv6 PSEUDO-HEADER
+*
+* Note(s) : (1) See RFC #2460, Section 8.1 'Upper-Layer Checksums' for IPv6 pseudo-header format.
+*********************************************************************************************************
+*/
+
+                                                                /* --------------- NET IPv6 PSEUDO-HDR ---------------- */
+typedef  struct  net_ipv6_pseudo_hdr {
+    NET_IPv6_ADDR  AddrSrc;                                     /* IPv6 dataram  src  addr.                             */
+    NET_IPv6_ADDR  AddrDest;                                    /* IPv6 datagram dest addr.                             */
+    CPU_INT32U     UpperLayerPktLen;                            /* Len of the upper-layer hdr & data.                   */
+    CPU_INT16U     Zero;                                        /* Field MUST be zero'd; i.e. ALL bits clr'd.           */
+    CPU_INT16U     NextHdr;                                     /* Next hdr. First 8-bits MUST be zero'd.               */
+} NET_IPv6_PSEUDO_HDR;
+
+#define  NET_IPv6_PSEUDO_HDR_SIZE                (sizeof(NET_IPv6_PSEUDO_HDR))
+
+
+/*
+*********************************************************************************************************
+*                                       IPv6 EXTENTION HEADERS
+*********************************************************************************************************
+*/
+
+typedef struct net_ipv6_ext_hdr  NET_IPv6_EXT_HDR;
+
+struct  net_ipv6_ext_hdr {
+
+    NET_IPv6_EXT_HDR  *NextHdrPtr;
+    NET_IPv6_EXT_HDR  *PrevHdrPtr;
+    CPU_INT08U         Type;
+    CPU_INT16U         Len;
+    CPU_INT08U         SortKey;
+    void              *Fnct;
+    void              *Arg;
+};
+
+
+/*
+*********************************************************************************************************
+*                                   IPv6 EXTENTION HEADERS ARGUMENTS
+*********************************************************************************************************
+*/
+
+
+typedef  struct  net_ipv6_ext_hdr_arg_generic {
+    CPU_INT08U   NextHdr;
+    NET_BUF     *BufPtr;
+    CPU_INT16U   BufIx;
+} NET_IPv6_EXT_HDR_ARG_GENERIC;
+
+
+typedef  struct  net_ipv6_ext_hdr_arg_frag {
+    CPU_INT08U   NextHdr;
+    NET_BUF     *BufPtr;
+    CPU_INT16U   BufIx;
+    CPU_INT16U   FragOffset;
+    CPU_INT32U   FragID;
+} NET_IPv6_EXT_HDR_ARG_FRAG;
+
+/*
+*********************************************************************************************************
+*                              IPv6 HOP-BY-HOP & DESTINATION OPTION HEADER
+*
+* Note(s) : (1) See RFC #2460
+*********************************************************************************************************
+*/
+
+                                                                /* -------- NET IPv6 HOP-BY-HOP & DEST OPT HDR -------- */
+typedef  struct  net_ipv6_opt_hdr {
+    NET_IPv6_NEXT_HDR  NextHdr;                                 /* Next hdr.                                            */
+    CPU_INT08U         HdrLen;                                  /* Size of hdr in octets, excluding 1st octet.          */
+    CPU_INT08U         Opt[1];                                  /* Variable option field.                               */
+} NET_IPv6_OPT_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                          IPv6 ROUTING HEADER
+*
+* Note(s) : (1) See RFC #2460
+*********************************************************************************************************
+*/
+
+                                                                /* --------------- NET IPV6 ROUTING HDR --------------- */
+typedef  struct  net_ipv6_routing_hdr {
+    NET_IPv6_NEXT_HDR  NextHdr;                                 /* Next hdr.                                            */
+    CPU_INT08U         HdrLen;                                  /* Size of hdr in octets, excluding 1st octet.          */
+    CPU_INT08U         RoutingType;                             /* Routing type field.                                  */
+    CPU_INT08U         SegLeft;                                 /* Segment left field.                                  */
+    CPU_INT32U         Rsvd;                                    /* Reserved     field.                                  */
+    NET_IPv6_ADDR      Addr[1];                                 /* Address routing table.                               */
+} NET_IPv6_ROUTING_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                         IPv6 FRAGMENT HEADER
+*
+* Note(s) : (1) See RFC #2460
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- NET IPV6 FRAG HDR ----------------- */
+typedef  struct  net_ipv6_frag_hdr {
+    NET_IPv6_NEXT_HDR    NextHdr;                                /* Next hdr.                                            */
+    CPU_INT08U           Rsvd;                                   /* Reserved                 field.                      */
+    NET_IPv6_FRAG_FLAGS  FragOffsetFlag;                         /* Frag offset & frag flags field.                      */
+    CPU_INT32U           ID;                                     /* ID                       field.                      */
+} NET_IPv6_FRAG_HDR;
+
+#define  NET_IPv6_FRAG_HDR_SIZE  sizeof(NET_IPv6_FRAG_HDR)
+
+
+/*
+*********************************************************************************************************
+*                                      IPv6 AUTHENTICATION HEADER
+*
+* Note(s) : (1) See RFC #4302
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- NET IPV6 FRAG HDR ----------------- */
+typedef  struct  net_ipv6_authentication_hdr {
+    NET_IPv6_NEXT_HDR  NextHdr;                                 /* Next hdr.                                            */
+    CPU_INT08U         HdrLen;                                  /* Hdr Len.                                             */
+    CPU_INT16U         Rsvd;                                    /* Reserved        field.                               */
+    CPU_INT32U         SPI;                                     /* Security parameters index.                           */
+    CPU_INT32U         SeqNum;                                  /* Sequence number field.                               */
+    CPU_INT32U         ICV[1];                                  /* Integrety check value. Variable len.                 */
+} NET_IPv6_AUTHENTICATION_HDR;
+
+
+/*
+*********************************************************************************************************
+*                              IPv6 ENCAPSULATING SECURITY PAYLOAD HEADER
+*
+* Note(s) : (1) See RFC #4303
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- NET IPV6 FRAG HDR ----------------- */
+typedef  struct  net_ipv6_esp_hdr {
+    CPU_INT32U  SPI;                                            /* Security parameters index.                           */
+    CPU_INT32U  SeqNum;                                         /* Sequence number field.                               */
+    CPU_INT08U  Payload[4];                                     /* Payload, padding, next header & ICV. Variable len.   */
+} NET_IPv6_ESP_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                 EXTENSION HEADER TLV OPTION DATA TYPE
+*
+* Notes : (1) TLV (Type-Length-Value) Option format :
+*
+*             0               7               15
+*             +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+- - - - - - - - -
+*             |  Option Type  |  Opt Data Len |  Option Data
+*             +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+- - - - - - - - -
+*********************************************************************************************************
+*/
+
+typedef  struct  net_ipv6_ext_hdr_tlv {
+    NET_IPv6_TLV_TYPE  Type;
+    NET_IPv6_TLV_LEN   Len;
+    CPU_INT08U         Val[2];
+} NET_IPv6_EXT_HDR_TLV;
+
+
+/*
+**********************************************************************************************************
+*                                  IPv6 AUTOCONFIGURATION DATA TYPE
+**********************************************************************************************************
+*/
+
+typedef enum net_ipv6_auto_cfg_state{
+    NET_IPv6_AUTO_CFG_STATE_NONE,
+    NET_IPv6_AUTO_CFG_STATE_STARTED_LOCAL,
+    NET_IPv6_AUTO_CFG_STATE_STARTED_GLOBAL,
+    NET_IPv6_AUTO_CFG_STATE_ENDED,
+} NET_IPv6_AUTO_CFG_STATE;
+
+typedef enum net_ipv6_auto_cfg_status{
+    NET_IPv6_AUTO_CFG_STATUS_NONE,
+    NET_IPv6_AUTO_CFG_STATUS_SUCCEEDED,
+    NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL,
+    NET_IPv6_AUTO_CFG_STATUS_FAILED,
+    NET_IPv6_AUTO_CFG_STATUS_STARTED,
+} NET_IPv6_AUTO_CFG_STATUS;
+
+typedef struct net_ipv6_auto_cfg_obj {
+    CPU_BOOLEAN                En;
+    NET_IPv6_AUTO_CFG_STATE    State;
+    CPU_BOOLEAN                DAD_En;
+    NET_IPv6_ADDR             *AddrLocalPtr;
+    NET_IPv6_ADDR             *AddrGlobalPtr;
+} NET_IPv6_AUTO_CFG_OBJ;
+
+
+typedef  void  (*NET_IPv6_AUTO_CFG_HOOK_FNCT)(       NET_IF_NBR                 if_nbr,
+                                              const  NET_IPv6_ADDR             *p_addr_local_cfgd,
+                                              const  NET_IPv6_ADDR             *p_addr_global_cfgd,
+                                                     NET_IPv6_AUTO_CFG_STATUS   auto_cfg_result);
+
+
+/*
+*********************************************************************************************************
+*                                      IPv6 ADDR CFG TYPE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum net_ipv6_addr_cfg_type {
+    NET_IPv6_ADDR_CFG_TYPE_NONE,
+    NET_IPv6_ADDR_CFG_TYPE_STATIC_BLOKING,
+    NET_IPv6_ADDR_CFG_TYPE_STATIC_NO_BLOKING,
+    NET_IPv6_ADDR_CFG_TYPE_AUTO_CFG_BLOCKING,
+    NET_IPv6_ADDR_CFG_TYPE_AUTO_CFG_NO_BLOCKING,
+    NET_IPv6_ADDR_CFG_TYPE_RX_PREFIX_INFO,
+} NET_IPv6_ADDR_CFG_TYPE;
+
+/*
+*********************************************************************************************************
+*                                    IPv6 ADDR CFG STATUS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum net_ipv6_addr_cfg_status {
+    NET_IPv6_ADDR_CFG_STATUS_NONE,
+    NET_IPv6_ADDR_CFG_STATUS_SUCCEED,
+    NET_IPv6_ADDR_CFG_STATUS_FAIL,
+    NET_IPv6_ADDR_CFG_STATUS_DUPLICATE,
+    NET_IPv6_ADDR_CFG_STATUS_IN_PROGRESS,
+} NET_IPv6_ADDR_CFG_STATUS;
+
+
+/*
+*********************************************************************************************************
+*                                    IPv6 ADDR HOOK FNCT DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  void  (*NET_IPv6_ADDR_HOOK_FNCT)(       NET_IF_NBR                 if_nbr,
+                                          const  NET_IPv6_ADDR             *p_addr_cfgd,
+                                                 NET_IPv6_ADDR_CFG_STATUS   addr_cfg_status);
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         NET_IPv6_TX_GET_ID()
+*
+* Description : Get next IPv6 transmit identification number.
+*
+* Argument(s) : id      Variable that will receive the returned IPv6 transmit identification number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_TxPktPrepareHdr(),
+*               NetIPv6_ReTxPktPrepareHdr(),
+*               NetIPv6_TxPktPrepareFragHdr().
+*
+*               This macro is an INTERNAL network protocol suite macro & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Return IPv6 identification number is NOT converted from host-order to network-order.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_TX_GET_ID(id)                 do { NET_UTIL_VAL_COPY_32(&(id), &NetIPv6_TxID_Ctr); \
+                                                     NetIPv6_TxID_Ctr++;                           } while (0)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+                                                                /* ------------ AUTO CFG FNCTS ------------ */
+       CPU_BOOLEAN             NetIPv6_AddrAutoCfgEn           (       NET_IF_NBR                    if_nbr,
+                                                                       CPU_BOOLEAN                   dad_en,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_AddrAutoCfgDis          (       NET_IF_NBR                    if_nbr,
+                                                                       NET_ERR                      *p_err);
+
+
+       void                    NetIPv6_AddrAutoCfgHookSet      (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_AUTO_CFG_HOOK_FNCT   fnct,
+                                                                       NET_ERR                      *p_err);
+
+
+                                                                /* -------------- CFG FNCTS --------------- */
+       void                    NetIPv6_CfgAddrHookSet          (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_ADDR_HOOK_FNCT       fnct,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_CfgAddrAdd              (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_ADDR                *p_addr,
+                                                                       CPU_INT08U                    prefix_len,
+                                                                       NET_FLAGS                     flags,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_CfgAddrRemove           (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_ADDR                *p_addr_host,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_CfgAddrRemoveAll        (       NET_IF_NBR                    if_nbr,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_CfgFragReasmTimeout     (       CPU_INT08U                    timeout_sec);
+
+
+                                                                /* -------------- GET FNCTS --------------- */
+       CPU_BOOLEAN             NetIPv6_GetAddrHost             (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_ADDR                *p_addr_tbl,
+                                                                       NET_IP_ADDRS_QTY             *p_addr_tbl_qty,
+                                                                       NET_ERR                      *p_err);
+
+const  NET_IPv6_ADDRS         *NetIPv6_GetAddrSrc              (       NET_IF_NBR                   *p_if_nbr,
+                                                                const  NET_IPv6_ADDR                *p_addr_src,
+                                                                const  NET_IPv6_ADDR                *p_addr_dest,
+                                                                       NET_IPv6_ADDR                *p_addr_nexthop,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_INT08U              NetIPv6_GetAddrMatchingLen      (const  NET_IPv6_ADDR                *p_addr_1,
+                                                                const  NET_IPv6_ADDR                *p_addr_2);
+
+       NET_IPv6_SCOPE          NetIPv6_GetAddrScope            (const  NET_IPv6_ADDR                *p_addr);
+
+
+                                                                /* ------------- STATUS FNCTS ------------- */
+       CPU_BOOLEAN             NetIPv6_IsAddrHostCfgd          (const  NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrsCfgdOnIF         (       NET_IF_NBR                    if_nbr,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_IsValidAddrHost         (const  NET_IPv6_ADDR                *p_addr_host);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrLinkLocal         (const  NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrSiteLocal         (const  NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrMcast             (const  NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrMcastAllRouters   (const  NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrMcastAllNodes     (const  NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrMcastSolNode      (const  NET_IPv6_ADDR                *p_addr,
+                                                                const  NET_IPv6_ADDR                *p_addr_input);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrMcastRsvd         (const  NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrUnspecified       (const  NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrLoopback          (const  NET_IPv6_ADDR                *p_addr);
+
+       NET_IPv6_ADDR_TYPE      NetIPv6_AddrTypeValidate        (const  NET_IPv6_ADDR                *p_addr,
+                                                                       NET_IF_NBR                    if_nbr);
+
+
+                                                                /* ------------- SETUP FNCTS -------------- */
+       CPU_INT08U              NetIPv6_CreateIF_ID             (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_ADDR                *p_if_ID,
+                                                                       NET_IPv6_ADDR_ID_TYPE         id_type,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_CreateAddrFromID        (       NET_IPv6_ADDR                *p_addr_ID,
+                                                                       NET_IPv6_ADDR                *p_addr_prefix,
+                                                                       NET_IPv6_ADDR_PREFIX_TYPE     prefix_type,
+                                                                       CPU_SIZE_T                    prefix_len,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_MaskGet                 (       NET_IPv6_ADDR                *p_mask_rtn,
+                                                                       CPU_INT08U                    prefix_len,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_AddrMaskByPrefixLen     (const  NET_IPv6_ADDR                *p_addr,
+                                                                       CPU_INT08U                    prefix_len,
+                                                                       NET_IPv6_ADDR                *p_addr_rtn,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_AddrMask                (const  NET_IPv6_ADDR                *p_addr,
+                                                                const  NET_IPv6_ADDR                *p_mask,
+                                                                       NET_IPv6_ADDR                *p_addr_rtn);
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+       void                    NetIPv6_Init                    (       NET_ERR                      *p_err);
+
+       void                    NetIPv6_LinkStateSubscriber     (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IF_LINK_STATE             link_state);
+
+
+                                                                /* -------------- CFG FNCTS --------------- */
+       NET_IPv6_ADDRS         *NetIPv6_CfgAddrAddHandler       (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_ADDR                *p_addr,
+                                                                       CPU_INT08U                    prefix_len,
+                                                                       CPU_INT32U                    lifetime_valid,
+                                                                       CPU_INT32U                    lifetime_preferred,
+                                                                       CPU_INT08U                    cfg_mode,
+                                                                       CPU_BOOLEAN                   dad_en,
+                                                                       NET_IPv6_ADDR_CFG_TYPE        addr_cfg_type,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_CfgAddrRemoveHandler    (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_ADDR                *p_addr_host,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_CfgAddrRemoveAllHandler (       NET_IF_NBR                    if_nbr,
+                                                                       NET_ERR                      *p_err);
+
+
+                                                                /* -------------- GET FNCTS --------------- */
+       CPU_BOOLEAN             NetIPv6_GetAddrHostHandler      (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_ADDR                *p_addr_tbl,
+                                                                       NET_IP_ADDRS_QTY             *p_addr_tbl_qty,
+                                                                       NET_ERR                      *p_err);
+
+const  NET_IPv6_ADDRS         *NetIPv6_GetAddrSrcHandler       (       NET_IF_NBR                   *p_if_nbr,
+                                                                const  NET_IPv6_ADDR                *p_addr_src,
+                                                                const  NET_IPv6_ADDR                *p_addr_dest,
+                                                                       NET_IPv6_ADDR                *p_addr_nexthop,
+                                                                       NET_ERR                      *p_err);
+
+       NET_IF_NBR              NetIPv6_GetAddrHostIF_Nbr       (const  NET_IPv6_ADDR                *p_addr);
+
+       NET_IPv6_ADDRS         *NetIPv6_GetAddrHostMatchPrefix  (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_ADDR                *p_prefix,
+                                                                       CPU_INT08U                    prefix_len);
+
+       NET_IPv6_ADDR          *NetIPv6_GetAddrLinkLocalCfgd    (       NET_IF_NBR                    if_nbr);
+
+       NET_IPv6_ADDRS         *NetIPv6_GetAddrsHost            (const  NET_IPv6_ADDR                *p_addr,
+                                                                       NET_IF_NBR                   *p_if_nbr);
+
+       NET_IPv6_ADDRS         *NetIPv6_GetAddrsHostOnIF        (       NET_IF_NBR                    if_nbr,
+                                                                const  NET_IPv6_ADDR                *p_addr);
+
+       NET_IPv6_IF_CFG        *NetIPv6_GetIF_CfgObj            (       NET_IF_NBR                    if_nbr,
+                                                                       NET_ERR                      *p_err);
+
+
+                                                                /* ------------- STATUS FNCTS ------------- */
+       CPU_BOOLEAN             NetIPv6_IsAddrHostCfgdHandler   (const  NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrCfgdValidHandler  (const  NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrsCfgdOnIF_Handler (       NET_IF_NBR                    if_nbr,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrWildcard          (       NET_IPv6_ADDR                *p_addr);
+
+       CPU_BOOLEAN             NetIPv6_IsValidHopLim           (       NET_IPv6_HOP_LIM              hop_lim);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrAndMaskValid      (const  NET_IPv6_ADDR                *p_addr,
+                                                                const  NET_IPv6_ADDR                *p_mask);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrAndPrefixLenValid (const  NET_IPv6_ADDR                *p_addr,
+                                                                const  NET_IPv6_ADDR                *p_prefix,
+                                                                       CPU_INT08U                    prefix_len,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrsIdentical        (const  NET_IPv6_ADDR                *p_prefix_mask,
+                                                                const  NET_IPv6_ADDR                *p_addr_masked);
+
+
+                                                                /* ------------- SETUP FNCTS -------------- */
+       void                    NetIPv6_AddrHW_McastSet         (       CPU_INT08U                   *p_addr_mac_ascii,
+                                                                       NET_IPv6_ADDR                *p_addr,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_AddrMcastSolicitedSet   (       NET_IPv6_ADDR                *p_addr_result,
+                                                                       NET_IPv6_ADDR                *p_addr_input,
+                                                                       NET_IF_NBR                    if_nbr,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_AddrMcastAllRoutersSet  (       NET_IPv6_ADDR                *p_addr,
+                                                                       CPU_BOOLEAN                   mldp_v2,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_AddrMcastAllNodesSet    (       NET_IPv6_ADDR                *p_addr,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_AddrLoopbackSet         (       NET_IPv6_ADDR                *p_addr,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_AddrUnspecifiedSet      (       NET_IPv6_ADDR                *p_addr,
+                                                                       NET_ERR                      *p_err);
+
+
+                                                                /* --------------- RX FNCTS --------------- */
+       void                    NetIPv6_Rx                      (       NET_BUF                      *p_buf,
+                                                                       NET_ERR                      *p_err);
+
+
+                                                                /* --------------- TX FNCTS --------------- */
+                                                                /* Prepare & tx IPv6 pkts.                  */
+       void                    NetIPv6_Tx                      (       NET_BUF                      *p_buf,
+                                                                       NET_IPv6_ADDR                *p_addr_src,
+                                                                       NET_IPv6_ADDR                *p_addr_dest,
+                                                                       NET_IPv6_EXT_HDR             *p_ext_hdr_list,
+                                                                       NET_IPv6_TRAFFIC_CLASS        traffic_class,
+                                                                       NET_IPv6_FLOW_LABEL           flow_label,
+                                                                       NET_IPv6_HOP_LIM              hop_lim,
+                                                                       NET_ERR                      *p_err);
+
+                                                                /* Prepare & re-tx IPv6 pkts.              */
+       void                    NetIPv6_ReTx                    (       NET_BUF                      *p_buf,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_GetTxDataIx             (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_EXT_HDR             *p_ext_hdr_list,
+                                                                       CPU_INT32U                    data_len,
+                                                                       CPU_INT16U                    mtu,
+                                                                       CPU_INT16U                   *p_ix,
+                                                                       NET_ERR                      *p_err);
+
+                                                                /* Prepare Extension Header to Tx.         */
+       NET_IPv6_EXT_HDR       *NetIPv6_ExtHdrAddToList         (       NET_IPv6_EXT_HDR             *p_ext_hdr_head,
+                                                                       NET_IPv6_EXT_HDR             *p_ext_hdr,
+                                                                       CPU_INT08U                    type,
+                                                                       CPU_INT16U                    len,
+                                                                       CPU_FNCT_PTR                  fnct,
+                                                                       CPU_INT08U                    sort_key,
+                                                                       NET_ERR                      *p_err);
+
+       void                    NetIPv6_PrepareFragHdr          (       void                         *p_ext_hdr_arg);
+
+
+                                                                /* ------------ NET MGR FNCTS ------------- */
+       void                    NetIPv6_GetHostAddrProtocol     (       NET_IF_NBR                    if_nbr,
+                                                                       CPU_INT08U                   *p_addr_protocol_tbl,
+                                                                       CPU_INT08U                   *p_addr_protocol_tbl_qty,
+                                                                       CPU_INT08U                   *p_addr_protocol_len,
+                                                                       NET_ERR                      *p_err);
+
+       NET_IF_NBR              NetIPv6_GetAddrProtocolIF_Nbr   (       CPU_INT08U                   *p_addr_protocol,
+                                                                       CPU_INT08U                    addr_protocol_len,
+                                                                       NET_ERR                      *p_err);
+
+       CPU_BOOLEAN             NetIPv6_IsValidAddrProtocol     (       CPU_INT08U                   *p_addr_protocol,
+                                                                       CPU_INT08U                    addr_protocol_len);
+
+       CPU_BOOLEAN             NetIPv6_IsAddrInit              (       CPU_INT08U                   *p_addr_protocol,
+                                                                       CPU_INT08U                    addr_protocol_len);
+
+#ifdef  NET_MCAST_MODULE_EN
+       CPU_BOOLEAN             NetIPv6_IsAddrProtocolMulticast (       CPU_INT08U                   *p_addr_protocol,
+                                                                       CPU_INT08U                    addr_protocol_len);
+#endif
+
+                                                                /* --------- IPv6 ADDRESS TIMERS ---------- */
+       void                    NetIPv6_AddrValidLifetimeTimeout(       void                         *p_ipv6_addr_timeout);
+
+       void                    NetIPv6_AddrPrefLifetimeTimeout (       void                         *p_ipv6_addr_timeout);
+
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+       void                    NetIPv6_AddrAutoCfgComp         (       NET_IF_NBR                    if_nbr,
+                                                                       NET_IPv6_AUTO_CFG_STATUS      auto_cfg_status);
+
+       NET_IPv6_AUTO_CFG_OBJ  *NetIPv6_GetAddrAutoCfgObj       (       NET_IF_NBR                    if_nbr);
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#endif /* NET_IPv6_MODULE_PRESENT  */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_mldp.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_mldp.c
new file mode 100644
index 0000000..8d67256
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_mldp.c
@@ -0,0 +1,2480 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK MLDP LAYER
+*                               (MULTICAST LISTENER DISCOVERY PROTOCOL)
+*
+* Filename      : net_mldp.c
+* Version       : V3.04.02
+* Programmer(s) : SL
+*                 MM
+*                 SR
+*********************************************************************************************************
+* Note(s)       : (1) Supports Neighbor Discovery Protocol as described in RFC #2710.
+*
+*                 (2) Only the MLDP v1 is supported. The MLDP v2 as described in RFC #3810 is not yet
+*                     supported.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    NET_MLDP_MODULE
+#include  "net_mldp.h"
+#include  "net_ipv6.h"
+#include  "net_icmpv6.h"
+#include  "../../Source/net_tmr.h"
+#include  "../../IF/net_if.h"
+#include  "../../Source/net.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) See 'net_mldp.h  MODULE'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_MLDP_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         MLDP REPORT DEFINES
+*
+* Note(s) : (1) RFC #2710,  Section 4 'Protocol Description' states that :
+*
+*               (a) "When a node starts listening to a multicast address on an interface, it should
+*                    immediately transmit an unsolicited Report for that address on that interface,
+*                    in case it is the first listener on the link. To cover the possibility of the initial
+*                    Report being lost or damaged, it is recommended that it be repeated once or twice
+*                    after short delays."
+*
+*                    The delay between the report transmissions is set to 2 seconds in this implementation.
+*
+*               (b) "When a node receives a Multicast-Address-Specific Query, if it is listening to the
+*                    queried Multicast Address on the interface from which the Query was received, it
+*                    sets a delay timer for that address to a random value selected from the range
+*                    [0, Maximum Response Delay]."
+*
+*           (2) When a transmit error occurs when attempting to transmit an MLDP report, a new timer
+*               is set with a delay of NET_MLDP_HOST_GRP_REPORT_DLY_RETRY_SEC seconds to retransmit
+*               the report.
+*********************************************************************************************************
+*/
+
+#define  NET_MLDP_HOST_GRP_REPORT_DLY_JOIN_SEC             2    /* See Note #1a.                                        */
+                                                                /* See Note #1b.                                        */
+#define  NET_MLDP_HOST_GRP_REPORT_DLY_MIN_SEC              0
+#define  NET_MLDP_HOST_GRP_REPORT_DLY_MAX_SEC             10
+
+#define  NET_MLDP_HOST_GRP_REPORT_DLY_RETRY_SEC            2    /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                          MLDP FLAG DEFINES
+*********************************************************************************************************
+*/
+                                                                /* ------------------ NET MLDP FLAGS ------------------ */
+#define  NET_MLDP_FLAG_NONE                              DEF_BIT_NONE
+#define  NET_MLDP_FLAG_USED                              DEF_BIT_00    /* MLDP host grp cur used; i.e. NOT in free pool.*/
+
+
+/*
+*********************************************************************************************************
+*                                 MLDP HOP BY HOP EXT HDR SIZE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_MLDP_OPT_HDR_SIZE                             8
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_MLDP_HOST_GRP   NetMLDP_HostGrpTbl[NET_MCAST_CFG_HOST_GRP_NBR_MAX]; /* Table of MDLP Host Group Objects.    */
+static  NET_MLDP_HOST_GRP  *NetMLDP_HostGrpPoolPtr;                             /* Ptr to pool of free host grp.        */
+static  NET_STAT_POOL       NetMLDP_HostGrpPoolStat;                            /* Stastici Pool for MLDP.              */
+
+static  NET_MLDP_HOST_GRP  *NetMLDP_HostGrpListHead;                            /* Ptr to head of MLDP Host Grp List.   */
+
+static  RAND_NBR            NetMLDP_RandSeed;                                   /* Variable for MLDP random delay.      */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void                NetMLDP_RxPktValidate           (      NET_BUF             *p_buf,
+                                                                   NET_BUF_HDR         *p_buf_hdr,
+                                                                   NET_MLDP_V1_HDR     *p_mldp_hdr,
+                                                                   NET_ERR             *p_err);
+
+static  void                NetMLDP_RxQuery                 (      NET_IF_NBR          if_nbr,
+                                                             const NET_IPv6_ADDR       *p_addr_dest,
+                                                                   NET_MLDP_V1_HDR     *p_mldp_hdr,
+                                                                   NET_ERR             *p_err);
+
+static  void                NetMLDP_RxReport                (      NET_IF_NBR          if_nbr,
+                                                             const NET_IPv6_ADDR      *p_addr_dest,
+                                                                   NET_MLDP_V1_HDR    *p_mldp_hdr,
+                                                                   NET_ERR            *p_err);
+
+static  void                NetMLDP_TxAdvertiseMembership   (      NET_MLDP_HOST_GRP  *p_grp,
+                                                                   NET_ERR            *p_err);
+
+static  void                NetMLDP_TxReport                (      NET_IF_NBR          if_nbr,
+                                                                   NET_IPv6_ADDR      *p_addr_mcast_dest,
+                                                                   NET_ERR            *p_err);
+
+static  void                NetMLDP_TxMsgDone               (      NET_IF_NBR          if_nbr,
+                                                                   NET_IPv6_ADDR      *p_addr_mcast_dest,
+                                                                   NET_ERR            *p_err);
+
+static  NET_MLDP_HOST_GRP  *NetMLDP_HostGrpSrch             (      NET_IF_NBR          if_nbr,
+                                                             const NET_IPv6_ADDR      *p_addr);
+
+static  NET_MLDP_HOST_GRP  *NetMLDP_HostGrpSrchIF           (      NET_IF_NBR          if_nbr);
+
+static  NET_MLDP_HOST_GRP  *NetMLDP_HostGrpAdd              (      NET_IF_NBR          if_nbr,
+                                                             const NET_IPv6_ADDR      *p_addr,
+                                                                   NET_ERR            *p_err);
+
+static  void                NetMLDP_HostGrpRemove           (      NET_MLDP_HOST_GRP  *p_host_grp);
+
+static  void                NetMLDP_HostGrpInsert           (      NET_MLDP_HOST_GRP  *p_host_grp);
+
+static  void                NetMLDP_HostGrpUnlink           (      NET_MLDP_HOST_GRP  *p_host_grp);
+
+static  NET_MLDP_HOST_GRP  *NetMLDP_HostGrpGet              (      NET_ERR            *p_err);
+
+
+static  void                NetMLDP_HostGrpFree             (      NET_MLDP_HOST_GRP  *p_host_grp);
+
+static  void                NetMLDP_HostGrpClr              (      NET_MLDP_HOST_GRP  *p_host_grp);
+
+#if 0
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void                NetMLDP_HostGrpDiscard          (      NET_MLDP_HOST_GRP  *p_host_grp);
+#endif
+#endif
+
+static  void                NetMLDP_HostGrpReportDlyTimeout (      void               *p_host_grp_timeout);
+
+static  void                NetMLDP_LinkStateNotification   (      NET_IF_NBR           if_nbr,
+                                                                   NET_IF_LINK_STATE    link_state);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            NetMLDP_Init()
+*
+* Description : (1) Initialize Multicast Listener Discovery Layer :
+*
+*                   (a) Initialize MLDP host group pool
+*                   (b) Initialize MLDP host group table
+*                   (c) Initialize MLDP Host Group List pointer
+*                   (d) Initialize MLDP random seed
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) MLDP host group pool MUST be initialized PRIOR to initializing the pool with pointers
+*                   to MLDP host group.
+*********************************************************************************************************
+*/
+
+void  NetMLDP_Init (void)
+{
+
+    NET_MLDP_HOST_GRP      *p_host_grp;
+    NET_MLDP_HOST_GRP_QTY   i;
+    NET_ERR                 err;
+
+
+                                                                /* ---------- INIT MLDP HOST GRP POOL/STATS ----------- */
+    NetMLDP_HostGrpPoolPtr = (NET_MLDP_HOST_GRP *)0;            /* Init-clr MLDP host grp pool (see Note #2).           */
+
+    NetStat_PoolInit(&NetMLDP_HostGrpPoolStat,
+                      NET_MCAST_CFG_HOST_GRP_NBR_MAX,
+                     &err);
+
+    (void)&err;                                                 /* Prevent 'variable unused' warning.                   */
+
+                                                                /* -------------- INIT MLDP HOST GRP TBL -------------- */
+    p_host_grp = &NetMLDP_HostGrpTbl[0];
+    for (i = 0u; i < NET_MCAST_CFG_HOST_GRP_NBR_MAX; i++) {
+        p_host_grp->State = NET_MLDP_HOST_GRP_STATE_FREE;        /* Init each MLDP host grp as free/NOT used.            */
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        NetMLDP_HostGrpClr(p_host_grp);
+#endif
+                                                                /* Free each MLDP host grp to pool.                     */
+        p_host_grp->NextListPtr = NetMLDP_HostGrpPoolPtr;
+        NetMLDP_HostGrpPoolPtr  = p_host_grp;
+
+        p_host_grp++;
+    }
+
+    NetMLDP_HostGrpListHead = (NET_MLDP_HOST_GRP *)0;           /* ----------- INIT MLDP HOST GRP LIST PTR ------------ */
+
+                                                                /* ------------------ INIT RAND SEED ------------------ */
+    NetMLDP_RandSeed = 1u;                                      /* See 'lib_math.c  Math_Init()  Note #2'.              */
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetMLDP_HostGrpJoin()
+*
+* Description :  Join a IPv6 MLDP group associated with a multicast address.
+*
+* Argument(s) : if_nbr      Interface number associated with the MDLP host group.
+*
+*               p_addr      Pointer to IPv6 address of host group to join.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   - RETURNED BY NetMLDP_HostGrpJoinHandler() : -
+*                               NET_MDLP_ERR_NONE                   Host group successfully joined.
+*                               NET_MDLP_ERR_INVALID_ADDR_GRP       Invalid group address.
+*                               NET_MDLP_ERR_HOST_GRP_NONE_AVAIL    NO available host group to allocate.
+*                               NET_MDLP_ERR_HOST_GRP_INVALID_TYPE  Host group is NOT a valid host group type.
+*                               NET_IF_ERR_INVALID_IF               Invalid OR disabled configured interface.
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_MLDP_ERR_TX                     Err in Tx of MDLP Report Message.
+*
+*                                                                   --- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Pointer to MLDP Host Group object added to the MLDP list.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetMLDP_HostGrpJoin() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetMLDP_HostGrpJoinHandler()  Note #2'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetMLDP_HostGrpJoin (NET_IF_NBR      if_nbr,
+                                  NET_IPv6_ADDR  *p_addr,
+                                  NET_ERR        *p_err)
+{
+    CPU_BOOLEAN         result = DEF_FAIL;
+    NET_MLDP_HOST_GRP  *p_grp  = DEF_NULL;
+
+
+    Net_GlobalLockAcquire((void *)&NetMLDP_HostGrpJoin, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE POINTER ------------------ */
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit_release;
+    }
+#endif
+
+                                                                /* Join host grp.                                       */
+    p_grp = NetMLDP_HostGrpJoinHandler(if_nbr,
+                                      p_addr,
+                                      p_err);
+    goto exit_release;
+
+
+exit_release:
+    Net_GlobalLockRelease();
+
+    if (p_grp != DEF_NULL) {
+        result = DEF_OK;
+    } else {
+        result = DEF_FAIL;
+    }
+
+    goto exit;
+
+exit_lock_fault:
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetMLDP_HostGrpJoinHandler()
+*
+* Description : (1) Join a IPv6 MLDP group associated with a multicast address:
+*
+* *                 (a) Validate interface number
+*                   (b) Validate multicast group address
+*                   (c) Search MLDP Host Group List for host group with corresponding address
+*                           & interface number
+*                   (d) If host group NOT found, allocate new host group.
+*                   (e) Advertise membership to multicast router(s)
+*
+*
+* Argument(s) : if_nbr      Interface number associated with the MDLP host group.
+*
+*               p_addr      Pointer to IPv6 address of host group to join.
+*               ------      Argument validated by caller(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MLDP_ERR_NONE                   Host group successfully joined.
+*                               NET_MLDP_ERR_INVALID_ADDR_GRP       Invalid host group address.
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   --- RETURNED BY NetMLDP_HostGrpAdd() : ---
+*                               NET_MLDP_ERR_HOST_GRP_NONE_AVAIL    NO available host group to allocate.
+*
+*                                                                   ---- RETURNED BY NetMLDP_TxReport() : ----
+*                               NET_MLDP_ERR_TX                     Err in Tx of MDLP Report Message.
+*
+*                                                                   - RETURNED BY NetIF_IsEnCfgdHandler() : --
+*                               NET_IF_ERR_INVALID_IF               Invalid OR disabled configured interface.
+*
+* Return(s)   : Pointer to MLDP Host Group object added to the MLDP list.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : NetMLDP_HostGrpJoin(),
+*               NetIF_Start(),
+*               NetIPv6_CfgAddrAddHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+*
+* Note(s)     : (2) NetMLDP_HostGrpJoinHandler() is called by network protocol suite function(s) & MUST
+*                   be called with the global network lock already acquired.
+*
+*                   See also 'NetMLDP_HostGrpJoin()  Note #1.
+*
+*               (3) NetMLDP_HostGrpJoinHandler() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+NET_MLDP_HOST_GRP  *NetMLDP_HostGrpJoinHandler (      NET_IF_NBR      if_nbr,
+                                                const NET_IPv6_ADDR  *p_addr,
+                                                      NET_ERR        *p_err)
+{
+    NET_MLDP_HOST_GRP  *p_grp    = DEF_NULL;
+    CPU_BOOLEAN         is_mcast = DEF_NO;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit;
+    }
+#endif
+
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         goto exit;
+    }
+
+
+                                                                /* -------------- VALIDATE HOST GRP ADDR -------------- */
+    is_mcast = NetIPv6_IsAddrMcast(p_addr);
+    if (is_mcast != DEF_YES) {
+       *p_err = NET_MLDP_ERR_INVALID_ADDR_GRP;
+        goto exit;
+    }
+
+                                                                /* ---------------- SRCH HOST GRP LIST ---------------- */
+    p_grp = NetMLDP_HostGrpSrch(if_nbr, p_addr);
+    if (p_grp != DEF_NULL) {                                    /* If host grp found, ...                               */
+        p_grp->RefCtr++;
+       *p_err = NET_MLDP_ERR_NONE;
+        goto exit;
+    }
+
+    p_grp = NetMLDP_HostGrpAdd(if_nbr, p_addr, p_err);          /* Add new host grp into Host Grp List.                 */
+    if (*p_err != NET_MLDP_ERR_NONE) {
+         goto exit;
+    }
+
+   *p_err = NET_MLDP_ERR_NONE;
+
+exit:
+    return (p_grp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetMLDP_HostGrpLeave()
+*
+* Description : Leave MDLP group associated with the received IPv6 multicast address.
+*
+* Argument(s) : if_nbr      Interface number associated with host group.
+*
+*               p_addr      Pointer to IPv6 address of host group to leave.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   - RETURNED BY NetMLDP_HostGrpLeaveHandler() : -
+*                               NET_MLDP_ERR_NONE                   Host group successfully left.
+*                               NET_MLDP_ERR_INVALID_ADDR_GRP       Invalid host group address.
+*                               NET_MLDP_ERR_HOST_GRP_NOT_FOUND     Host group NOT found.
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_IF_ERR_INVALID_IF               Invalid OR disabled configured interface.
+*                               NET_MLDP_ERR_TX                     Err in Tx of MDLP Done Message.
+*
+*                                                                   ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   if host group successfully left.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetMLDP_HostGrpLeave() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetMLDP_HostGrpLeaveHandler()  Note #2'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetMLDP_HostGrpLeave (NET_IF_NBR      if_nbr,
+                                   NET_IPv6_ADDR  *p_addr,
+                                   NET_ERR        *p_err)
+{
+    CPU_BOOLEAN  host_grp_leave;
+
+
+                                                                /* Acquire net lock (see Note #1b).                     */
+    Net_GlobalLockAcquire((void *)&NetMLDP_HostGrpLeave, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE POINTER ------------------ */
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit_release;
+    }
+#endif
+
+                                                                /* Leave host grp.                                      */
+    host_grp_leave = NetMLDP_HostGrpLeaveHandler(if_nbr, p_addr, p_err);
+
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+
+exit_release:
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+
+    return (host_grp_leave);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetMLDP_HostGrpLeaveHandler()
+*
+* Description : (1) Leave MDLP group associated with the received IPv6 multicast address :
+*
+* *                 (a) Search MLDP Host Group List for host group with corresponding address
+*                           & interface number
+*                   (b) If host group found, remove host group from MLDP Host Group List.
+*                   (c) Advertise end of Membership if host is last member of the group.
+*
+* Argument(s) : if_nbr      Interface number associated with host group.
+*
+*               p_addr      Pointer to IPv6 address of host group to leave.
+*               ------      Argument validated by caller(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MLDP_ERR_NONE                   Host group successfully left.
+*                               NET_MLDP_ERR_INVALID_ADDR_GRP       Invalid host group address.
+*                               NET_MLDP_ERR_HOST_GRP_NOT_FOUND     Host group NOT found.
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*
+*                                                                   - RETURNED BY NetIF_IsEnCfgdHandler() : --
+*                               NET_IF_ERR_INVALID_IF               Invalid OR disabled configured interface.
+*
+*                                                                   ----- RETURNED BY NetMLDP_TxDone() : -----
+*                               NET_MLDP_ERR_TX                     Err in Tx of MDLP Done Message.
+*
+* Return(s)   : DEF_OK,   if host group successfully left.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetMLDP_HostGrpLeave()
+*               NetIPv6_CfgAddrRemove()
+*               NetIPv6_CfgAddrRemoveAllHandler()
+*
+* Note(s)     : (2) NetMLDP_HostGrpLeaveHandler() is called by network protocol suite function(s) & MUST
+*                   be called with the global network lock already acquired.
+*
+*                   See also 'NetMLDP_HostGrpLeave()  Note #1'.
+*
+*               (3) NetMLDP_HostGrpLeaveHandler() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetMLDP_HostGrpLeaveHandler (      NET_IF_NBR     if_nbr,
+                                          const NET_IPv6_ADDR *p_addr,
+                                                NET_ERR       *p_err)
+{
+    NET_MLDP_HOST_GRP  *p_host_grp;
+    CPU_BOOLEAN         is_mcast_allnodes;
+    CPU_BOOLEAN         is_mcast;
+    CPU_INT08U          scope;
+    CPU_BOOLEAN         result;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err  = NET_INIT_ERR_NOT_COMPLETED;
+        result = DEF_FAIL;
+        goto exit;
+    }
+#endif
+
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {                            /* If cfg'd IF NOT en'd (see Note #4), ...              */
+        result = DEF_FAIL;                                      /* ... rtn err.                                         */
+        goto exit;
+    }
+
+
+                                                                /* -------------- VALIDATE HOST GRP ADDR -------------- */
+    is_mcast = NetIPv6_IsAddrMcast(p_addr);
+    if (is_mcast != DEF_YES) {
+       *p_err = NET_MLDP_ERR_INVALID_ADDR_GRP;
+        result = DEF_FAIL;
+        goto exit;
+    }
+                                                                /* ---------------- SRCH HOST GRP LIST ---------------- */
+    p_host_grp = NetMLDP_HostGrpSrch(if_nbr, p_addr);
+    if (p_host_grp == (NET_MLDP_HOST_GRP *)0) {                 /* If host grp NOT found, ...                           */
+       *p_err  =  NET_MLDP_ERR_HOST_GRP_NOT_FOUND;              /* ... rtn err.                                         */
+        result = DEF_FAIL;
+        goto exit;
+    }
+
+    p_host_grp->RefCtr--;                                       /* Dec ref ctr.                                         */
+
+                                                                /* ----------- ADVERTISE END OF MEMBERSHIP ------------ */
+    is_mcast_allnodes = NetIPv6_IsAddrMcastAllNodes(&p_host_grp->AddrGrp);
+
+    scope             = NetIPv6_GetAddrScope(&p_host_grp->AddrGrp);
+
+    if (( is_mcast_allnodes == DEF_NO)            &&
+        ((scope != NET_IPv6_ADDR_SCOPE_RESERVED)  &&
+         (scope != NET_IPv6_ADDR_SCOPE_IF_LOCAL))) {
+
+        if (p_host_grp->RefCtr < 1) {
+            NetMLDP_TxMsgDone(if_nbr,
+                             &p_host_grp->AddrGrp,
+                              p_err);
+            switch (*p_err) {
+                case NET_MLDP_ERR_NONE:
+                case NET_ERR_IF_LINK_DOWN:
+                     result = DEF_OK;
+                     break;
+
+                case NET_MLDP_ERR_INVALID_HOP_HDR:
+                case NET_ERR_TX:
+                case NET_ERR_TX_BUF_NONE_AVAIL:
+                case NET_ERR_FAULT_UNKNOWN_ERR:
+                     result = DEF_FAIL;
+                     goto exit;
+
+                default:
+                    result = DEF_FAIL;
+                   *p_err  = NET_ERR_FAULT_UNKNOWN_ERR;
+                    goto exit;
+            }
+        }
+    }
+
+                                                                /* -------- REMOVE HOST GRP FROM HOST GRP LIST -------- */
+    if (p_host_grp->RefCtr < 1) {
+        NetMLDP_HostGrpRemove(p_host_grp);
+    }
+
+   *p_err = NET_MLDP_ERR_NONE;
+
+exit:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetMLDP_IsGrpJoinedOnIF()
+*
+* Description : Check for joined host group on specified interface.
+*
+* Argument(s) : if_nbr      Interface number to search.
+*
+*               p_addr_grp  Pointer to IPv6 address of host group.
+*
+* Return(s)   : DEF_YES, if host group address joined on interface.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIPv6_RxPktValidate().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetMLDP_IsGrpJoinedOnIF (      NET_IF_NBR      if_nbr,
+                                      const NET_IPv6_ADDR  *p_addr_grp)
+{
+    NET_MLDP_HOST_GRP  *p_host_grp;
+    CPU_BOOLEAN         grp_joined;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE POINTER ------------------ */
+    if (p_addr_grp == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.NullPtrCtr);
+        return (DEF_FAIL);
+    }
+#endif
+
+    p_host_grp  =  NetMLDP_HostGrpSrch(if_nbr, p_addr_grp);
+    grp_joined = (p_host_grp != (NET_MLDP_HOST_GRP *)0) ? DEF_YES : DEF_NO;
+
+    return (grp_joined);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetMLDP_HopByHopHdr()
+*
+* Description : Callback function called by IP layer when Extension headers are added to Tx buffer.
+*
+* Argument(s) : p_ext_hdr_arg   Pointer to list of arguments.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIPv6_TxPktPrepareExtHdr()
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetMLDP_PrepareHopByHopHdr(void  *p_ext_hdr_arg)
+{
+    NET_IPv6_EXT_HDR_ARG_GENERIC  *p_hop_hdr_arg;
+    NET_IPv6_OPT_HDR              *p_hop_hdr;
+    NET_IPv6_EXT_HDR_TLV          *p_tlv;
+    NET_BUF                       *p_buf;
+    CPU_INT16U                     hop_hdr_ix;
+
+
+    p_hop_hdr_arg      = (NET_IPv6_EXT_HDR_ARG_GENERIC *)p_ext_hdr_arg;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE POINTER ------------------ */
+    if (p_ext_hdr_arg == (NET_IPv6_EXT_HDR_ARG_GENERIC *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_buf              =  p_hop_hdr_arg->BufPtr;
+    hop_hdr_ix         =  p_hop_hdr_arg->BufIx;
+
+    p_hop_hdr          = (NET_IPv6_OPT_HDR *)&p_buf->DataPtr[hop_hdr_ix];
+    p_hop_hdr->NextHdr =  p_hop_hdr_arg->NextHdr;
+    p_hop_hdr->HdrLen  =  0;
+    p_tlv              = (NET_IPv6_EXT_HDR_TLV  *)&p_hop_hdr->Opt[0];
+    p_tlv->Type        =  NET_IPv6_EH_TYPE_ROUTER_ALERT;
+    p_tlv->Len         =  2;
+    p_tlv->Val[0]      =  0;
+    p_tlv->Val[1]      =  0;
+    p_tlv              = (NET_IPv6_EXT_HDR_TLV  *) (&p_hop_hdr->Opt[0] + 4);
+    p_tlv->Type        =  NET_IPv6_EH_TYPE_PADN;
+    p_tlv->Len         =  0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetMLDP_Rx()
+*
+* Description : (1) Process received MLDP packets & update host group status :
+*
+*                   (a) Validate MLDP packet
+*                   (b) Update   MLDP host group status
+*                   (c) Free     MLDP packet
+*                   (d) Update receive statistics
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMP packet.
+*               -----       Argument checked   in NetICMPv6_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetICMPv6_Rx().
+*
+*               p_mldp_hdr  Pointer to received packet's MLDP header.
+*               ----------  Argument validated in NetICMPv6_Rx()/NetICMPv6_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MLDP_ERR_NONE               MLDP packet successfully received & processed.
+*
+*                                                               --- RETURNED BY NetMLDP_RxPktValidate() : ----
+*                               NET_MLDP_ERR_HOP_LIMIT          Invalid Hop Limit
+*                               NET_MLDP_ERR_INVALID_HOP_HDR    Invalid Hop-by_hop header received.
+*                               NET_MLDP_ERR_INVALID_ADDR_SRC   Invalid source address.
+*                               NET_MLDP_ERR_INVALID_ADDR_DEST  Invalid destination address.
+*                               NET_MLDP_ERR_INVALID_LEN        Invalid MLDP message length.
+*                               NET_MDLP_ERR_INVALID_TYPE       Invalid MDLP message type.
+*
+*                                                               ------ RETURNED BY NetMLDP_RxQuery() : -------
+*                                                               ------ RETURNED BY NetMLDP_RxReport() : ------
+*                               NET_MLDP_ERR_INVALID_ADDR_GRP
+*                               NET_MLDP_ERR_HOST_GRP_NOT_FOUND
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_Rx()
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetMLDP_Rx (NET_BUF          *p_buf,
+                  NET_BUF_HDR      *p_buf_hdr,
+                  NET_MLDP_V1_HDR  *p_mldp_hdr,
+                  NET_ERR          *p_err)
+{
+    NET_IF_NBR   if_nbr;
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    NET_CTR     *p_ctr;
+#endif
+
+
+    if_nbr = p_buf_hdr->IF_Nbr;
+
+                                                                /*-------------- VALIDATE RX'D MLDP PKT -------------- */
+    NetMLDP_RxPktValidate(p_buf,
+                          p_buf_hdr,
+                          p_mldp_hdr,
+                          p_err);
+
+                                                                /* ------------------ DEMUX MLDP MSG ------------------ */
+    switch (*p_err) {
+        case NET_MLDP_ERR_MSG_TYPE_QUERY:
+             NetMLDP_RxQuery(if_nbr,
+                            &p_buf_hdr->IPv6_AddrDest,
+                             p_mldp_hdr,
+                             p_err);
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+             p_ctr = (NET_CTR *)Net_StatCtrs.MLDP.RxMsgQueryCtr;
+#endif
+             break;
+
+
+        case NET_MLDP_ERR_MSG_TYPE_REPORT:
+             NetMLDP_RxReport(if_nbr,
+                             &p_buf_hdr->IPv6_AddrDest,
+                              p_mldp_hdr,
+                              p_err);
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+             p_ctr = (NET_CTR *)Net_StatCtrs.MLDP.RxMsgReportCtr;
+#endif
+             break;
+
+
+        case NET_MLDP_ERR_HOP_LIMIT:
+        case NET_MLDP_ERR_INVALID_HOP_HDR:
+        case NET_MLDP_ERR_INVALID_ADDR_SRC:
+        case NET_MLDP_ERR_INVALID_LEN:
+        case NET_MDLP_ERR_INVALID_TYPE:
+        default:
+             return;
+    }
+
+                                                                /* ------------------ UPDATE RX STATS ----------------- */
+    NET_CTR_STAT_INC(Net_StatCtrs.MLDP.RxMsgCompCtr);
+    NET_CTR_STAT_INC(*p_ctr);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          NetMLDP_RxPktValidate()
+*
+* Description : (1) Validate received MLDP packet :
+*
+*                   (a) Validate Hop Limit of packet.
+*                   (b) Validate Router Alert Option in Hop-By-Hop IPv6 Extension Header.
+*                   (c) Validate Rx Source address as a link-local address
+*                   (d) Validate Rx Destination address as multicast
+*                   (e) Validate Rx Source address is not configured on host.
+*                   (f) Validate MDLP message length.
+*                   (g) Validate MDLP message type.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMP packet.
+*               -----       Argument checked   in NetICMPv6_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument validated in NetICMPv6_Rx().
+*
+*               p_mldp_hdr  Pointer to received packet's NDP header.
+*               ----------  Argument validated in NetICMPv6_Rx()/NetICMPv6_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MLDP_ERR_HOP_LIMIT          Invalid Hop Limit
+*                               NET_MLDP_ERR_INVALID_HOP_HDR    Invalid Hop-by_hop header received.
+*                               NET_MLDP_ERR_INVALID_ADDR_SRC   Invalid source address.
+*                               NET_MLDP_ERR_INVALID_ADDR_DEST  Invalid destination address.
+*                               NET_MLDP_ERR_INVALID_LEN        Invalid MLDP message length.
+*                               NET_MDLP_ERR_INVALID_TYPE       Invalid MDLP message type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_RxPktValidate (NET_BUF          *p_buf,
+                                     NET_BUF_HDR      *p_buf_hdr,
+                                     NET_MLDP_V1_HDR  *p_mldp_hdr,
+                                     NET_ERR          *p_err)
+{
+    NET_IPv6_HDR          *p_ip_hdr;
+    NET_IPv6_OPT_HDR      *p_opt_hdr;
+    CPU_INT08U            *p_data;
+    NET_IPv6_EXT_HDR_TLV  *p_tlv;
+    NET_IPv6_OPT_TYPE      opt_type;
+    NET_IF_NBR             if_nbr;
+    NET_IF_NBR             if_nbr_found;
+    CPU_INT16U             mldp_msg_len;
+    CPU_INT16U             ext_hdr_ix;
+    CPU_INT16U             eh_len;
+    CPU_INT16U             next_tlv_offset;
+    CPU_INT08U             mldp_type;
+    CPU_INT08U             hop_limit_ip;
+    CPU_BOOLEAN            is_addr_mcast;
+    CPU_BOOLEAN            is_addr_linklocal;
+    CPU_BOOLEAN            rtr_alert;
+
+
+    (void)&p_buf;                                               /* Prevent 'variable unused' warning (see Note #3b).    */
+
+    if_nbr = p_buf_hdr->IF_Nbr;
+
+                                                                /* -------------- VALIDATE HOP LIMIT VALUE ------------ */
+    p_ip_hdr     = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+    hop_limit_ip = p_ip_hdr->HopLim;
+    if (hop_limit_ip != NET_IPv6_HDR_HOP_LIM_MIN) {
+       *p_err = NET_MLDP_ERR_HOP_LIMIT;
+        return;
+    }
+                                                                /* ---------- VALIDATE HOP BY HOP IPv6 HEADER --------- */
+    ext_hdr_ix      =  p_buf_hdr->IPv6_HopByHopHdrIx;
+    p_data          =  p_buf->DataPtr;
+                                                                /* Get opt hdr from ext hdr data space.                 */
+    p_opt_hdr       = (NET_IPv6_OPT_HDR *)&p_data[ext_hdr_ix];
+
+    eh_len          = (p_opt_hdr->HdrLen + 1) * NET_IPv6_EH_ALIGN_SIZE;
+    next_tlv_offset =  0u;
+    rtr_alert       =  DEF_NO;
+
+    eh_len -= 2u;
+    while (next_tlv_offset < eh_len) {
+
+        p_tlv     = (NET_IPv6_EXT_HDR_TLV  *)&p_opt_hdr->Opt[next_tlv_offset];
+        opt_type  =  p_tlv->Type & NET_IPv6_EH_TLV_TYPE_OPT_MASK;
+
+        switch (opt_type) {
+            case NET_IPv6_EH_TYPE_ROUTER_ALERT:
+                 rtr_alert = DEF_YES;
+                 break;
+
+
+            case NET_IPv6_EH_TYPE_PAD1:
+            case NET_IPv6_EH_TYPE_PADN:
+            default:
+                break;
+        }
+
+        if (opt_type == NET_IPv6_EH_TYPE_PAD1) {                /* The format of the Pad1 opt is a special case, it ... */
+            next_tlv_offset++;                                  /* ... doesn't have len and value fields.               */
+        } else {
+            next_tlv_offset += p_tlv->Len + 2u;
+        }
+
+    }
+
+    if (rtr_alert == DEF_NO) {
+       *p_err = NET_MLDP_ERR_INVALID_HOP_HDR;
+        return;
+    }
+
+                                                                /* ------------- VALIDATE MLDP RX SRC ADDR ------------ */
+    is_addr_linklocal = NetIPv6_IsAddrLinkLocal(&p_buf_hdr->IPv6_AddrSrc);
+    if (is_addr_linklocal == DEF_NO) {
+       *p_err = NET_MLDP_ERR_INVALID_ADDR_SRC;
+        return;
+    }
+
+                                                                /* ------------- VALIDATE MLDP RX DEST ADDR ------------ */
+    is_addr_mcast = NetIPv6_IsAddrMcast(&p_buf_hdr->IPv6_AddrDest);
+    if (is_addr_mcast == DEF_NO) {
+       *p_err = NET_MLDP_ERR_INVALID_ADDR_DEST;
+        return;
+    }
+
+                                                                /* ------- VALIDATE SRC ADDR IS NOT LOCAL ADDR -------- */
+    if_nbr_found = NetIPv6_GetAddrHostIF_Nbr(&p_buf_hdr->IPv6_AddrSrc);
+    if (if_nbr == if_nbr_found) {
+       *p_err = NET_MLDP_ERR_INVALID_ADDR_SRC;
+        return;
+    }
+
+                                                                /* ------------- VALIDATE MLDP RX MSG LEN ------------- */
+    mldp_msg_len           = p_buf_hdr->IP_DatagramLen;
+    p_buf_hdr->MLDP_MsgLen = mldp_msg_len;
+    if (mldp_msg_len < NET_MLDP_MSG_SIZE_MIN) {                 /* If msg len < min msg len, rtn err (see Note #4a).    */
+       *p_err = NET_MLDP_ERR_INVALID_LEN;
+        return;
+    }
+
+                                                                /*  ------------ VALIDATE MLDP MESSAGE TYPE ----------- */
+    mldp_type = p_mldp_hdr->Type;
+    switch (mldp_type) {
+        case NET_ICMPv6_MSG_TYPE_MLDP_QUERY:
+            *p_err = NET_MLDP_ERR_MSG_TYPE_QUERY;
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1:
+            *p_err = NET_MLDP_ERR_MSG_TYPE_REPORT;
+             break;
+
+
+        default:
+            *p_err = NET_MDLP_ERR_INVALID_TYPE;
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetMLDP_RxQuery()
+*
+* Description : (1) Receive Multicast Listener Query message :
+*
+*                   (a) Find if the query is a general query or a specific query.
+*                   (b) Send Report Message if case apply.
+*
+* Argument(s) : if_nbr        Interface number on which message was received.
+*
+*               p_addr_dest   Pointer to Destination address of Rx buffer.
+*
+*               p_mldp_hdr    Pointer to received packet's MLDP header.
+*               ----------    Argument validated in caller(s).
+*
+*               p_err         Pointer to variable that will receive the return error code from this function :
+*
+*                                 NET_MLDP_ERR_NONE
+*                                 NET_MLDP_ERR_INVALID_ADDR_GRP
+*                                 NET_MLDP_ERR_HOST_GRP_NOT_FOUND
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_Rx().
+*
+* Note(s)     : (2) RFC #2710 Section 5 page 9 :
+*                   (a) The link-scope all-nodes address (FF02::1) is handled as a special
+*                       case. The node starts in Idle Listener state for that address on
+*                       every interface, never transitions to another state, and never sends
+*                       a Report or Done for that address
+*
+*                   (b) MLD messages are never sent for multicast addresses whose scope is 0
+*                      (reserved) or 1 (node-local).
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_RxQuery (      NET_IF_NBR        if_nbr,
+                               const NET_IPv6_ADDR    *p_addr_dest,
+                                     NET_MLDP_V1_HDR  *p_mldp_hdr,
+                                     NET_ERR          *p_err)
+{
+    NET_MLDP_HOST_GRP        *p_mldp_grp;
+    NET_IPv6_ADDR            *p_mldp_grp_addr;
+    NET_MLDP_HOST_GRP_STATE   mldp_grp_state;
+    CPU_INT32U                mldp_grp_delay;
+    NET_TMR_TICK              timeout_tick;
+    CPU_INT16U                timeout_sec;
+    CPU_INT32U                resp_delay_ms;
+    CPU_INT08U                scope;
+    CPU_BOOLEAN               is_addr_unspecified;
+    CPU_BOOLEAN               is_addr_mcast;
+    CPU_BOOLEAN               is_mcast_allnodes;
+    CPU_BOOLEAN               if_grp_list;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE POINTER ------------------ */
+    if (p_addr_dest == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    p_mldp_grp_addr     = &p_mldp_hdr->McastAddr;
+
+    is_addr_unspecified =  NetIPv6_IsAddrUnspecified(p_mldp_grp_addr);
+    is_addr_mcast       =  NetIPv6_IsAddrMcast(p_mldp_grp_addr);
+
+                                                                /* -------------- VALIDATE ADDRESS GROUP -------------- */
+    if ((is_addr_unspecified == DEF_NO) &&
+        (is_addr_mcast       == DEF_NO)) {
+        *p_err = NET_MLDP_ERR_INVALID_ADDR_GRP;
+         return;
+    }
+
+                                                                /* ----------------- SET DELAY VALUE ------------------ */
+    resp_delay_ms = p_mldp_hdr->MaxResponseDly;
+    if (resp_delay_ms != 0) {
+        timeout_tick = resp_delay_ms * NET_TMR_TIME_TICK_PER_SEC / 1000;
+    } else {
+        timeout_tick = 0;
+    }
+
+                                                                /* ---------------- GET TYPE OF QUERY ----------------- */
+    if (is_addr_unspecified == DEF_YES) {                       /* Received a General Query ...                         */
+
+        if_grp_list = DEF_YES;
+
+        p_mldp_grp  = NetMLDP_HostGrpSrchIF(if_nbr);            /* ... Find all MLDP groups related to IF.              */
+
+    } else {                                                    /* Received a Mulitcast-Address-Specific Query ...      */
+
+        if_grp_list = DEF_NO;
+                                                                /* ... search MLD grp List for multicast addr.          */
+        p_mldp_grp  = NetMLDP_HostGrpSrch(if_nbr, p_addr_dest);
+        if (p_mldp_grp == (NET_MLDP_HOST_GRP *)0) {
+           *p_err = NET_MLDP_ERR_HOST_GRP_NOT_FOUND;
+            return;
+        }
+    }
+
+                                                                /* ------------- SEND MLDP REPORT MESSAGE ------------- */
+    while (p_mldp_grp != (NET_MLDP_HOST_GRP *)0) {
+
+        mldp_grp_state = p_mldp_grp->State;
+        mldp_grp_delay = p_mldp_grp->Delay_ms;
+
+        is_mcast_allnodes = NetIPv6_IsAddrMcastAllNodes(&p_mldp_grp->AddrGrp);
+        scope             = NetIPv6_GetAddrScope(&p_mldp_grp->AddrGrp);
+
+        if (( is_mcast_allnodes == DEF_NO)            &&        /* See Note #2.                                         */
+            ((scope != NET_IPv6_ADDR_SCOPE_RESERVED)  &&
+             (scope != NET_IPv6_ADDR_SCOPE_IF_LOCAL))) {
+
+            if (timeout_tick == 0) {                            /* If delay received is null, ...                       */
+                NetMLDP_TxReport(if_nbr,                        /* ... send report right away.                          */
+                                &p_mldp_grp->AddrGrp,
+                                 p_err);
+                if (*p_err != NET_MLDP_ERR_NONE) {
+                     NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.TxPktDisCtr);
+                }
+
+            } else if ((mldp_grp_state == NET_MLDP_HOST_GRP_STATE_IDLE) ||
+                       (mldp_grp_delay  > resp_delay_ms)) {
+
+                                                                /* Set Delay timer.                                     */
+                NetMLDP_RandSeed   =  Math_RandSeed(NetMLDP_RandSeed);
+                timeout_sec        =  NetMLDP_RandSeed % (CPU_INT16U)(NET_MLDP_HOST_GRP_REPORT_DLY_MAX_SEC + 1);
+                timeout_tick       = (NET_TMR_TICK)(timeout_sec * NET_TMR_TIME_TICK_PER_SEC);
+
+                p_mldp_grp->TmrPtr =  NetTmr_Get((CPU_FNCT_PTR )NetMLDP_HostGrpReportDlyTimeout,
+                                                 (void        *)p_mldp_grp,
+                                                                timeout_tick,
+                                                                NET_TMR_FLAG_NONE,
+                                                                p_err);
+                if (*p_err != NET_TMR_ERR_NONE) {               /* If err setting tmr,     ...                          */
+                    NetMLDP_TxReport(if_nbr,
+                                    &p_mldp_grp->AddrGrp,
+                                     p_err);                    /* ... tx report immediately; ...                       */
+                    if (*p_err != NET_MLDP_ERR_NONE) {
+                         NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.TxPktDisCtr);
+                    }
+
+                } else {                                        /* ... else set host grp state to DELAYING.             */
+                    p_mldp_grp->State = NET_MLDP_HOST_GRP_STATE_DELAYING;
+                }
+            }
+        } else {
+            p_mldp_grp->TmrPtr   = (NET_TMR *)0;
+            p_mldp_grp->State    = NET_MLDP_HOST_GRP_STATE_IDLE;
+            p_mldp_grp->Delay_ms = 0;
+        }
+
+        if (if_grp_list == DEF_NO) {                            /* For a specific query, send only the report for ...   */
+            break;                                              /* ... the specific grp.                                */
+        }
+
+        p_mldp_grp = p_mldp_grp->NextIF_ListPtr;
+    }
+
+   *p_err = NET_MLDP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetMLDP_RxReport()
+*
+* Description : (1) Receive Multicast Listener Report message :
+*
+*                   (a) Find if IF is listening to the multicast address.
+*                   (b) If the group address is one the IF listen to :
+*                           i)   remove delay timer.
+*                           ii)  Increase the listener count.
+*                           iii) Change the group state to IDLE.
+*
+* Argument(s) : if_nbr        Interface number on which message was received.
+*
+*               p_addr_dest   Pointer to Destination address of Rx buf.
+*
+*               p_mldp_hdr    Pointer to received packet's MLDP header.
+*               ----------    Argument validated in caller(s).
+*
+*               p_err         Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MLDP_ERR_NONE                 Report message successfully Rx & Handled.
+*                               NET_MLDP_ERR_INVALID_ADDR_GRP     Invalid Multicast address group.
+*                               NET_MLDP_ERR_HOST_GRP_NOT_FOUND   Multicast Host group not found.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_RxReport (      NET_IF_NBR        if_nbr,
+                                const NET_IPv6_ADDR    *p_addr_dest,
+                                      NET_MLDP_V1_HDR  *p_mldp_hdr,
+                                      NET_ERR          *p_err)
+{
+    NET_MLDP_HOST_GRP  *p_mldp_grp;
+    NET_IPv6_ADDR      *p_mldp_grp_addr;
+    CPU_BOOLEAN         is_addr_mcast;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE POINTER ------------------ */
+    if (p_addr_dest == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+    p_mldp_grp_addr = &p_mldp_hdr->McastAddr;
+
+    is_addr_mcast   =  NetIPv6_IsAddrMcast(p_mldp_grp_addr);
+
+                                                                /* ------- VALIDATE RX MULTICAST GROUP ADDRESS -------- */
+    if (is_addr_mcast == DEF_NO) {
+       *p_err = NET_MLDP_ERR_INVALID_ADDR_GRP;
+        return;
+    }
+
+                                                                /* ------- SEARCH FOR GRP ADDR IN MLDP GRP LIST ------- */
+    p_mldp_grp = NetMLDP_HostGrpSrch(if_nbr, p_addr_dest);
+    if (p_mldp_grp == (NET_MLDP_HOST_GRP *)0) {
+       *p_err = NET_MLDP_ERR_HOST_GRP_NOT_FOUND;
+        return;
+    }
+
+    p_mldp_grp->RefCtr++;                                       /* Increase Listener counter.                           */
+
+    p_mldp_grp->State = NET_MLDP_HOST_GRP_STATE_IDLE;           /* Set state to IDLE.                                   */
+
+                                                                /* Free timer.                                          */
+    if (p_mldp_grp->TmrPtr != (NET_TMR *)0) {
+        NetTmr_Free(p_mldp_grp->TmrPtr);
+        p_mldp_grp->TmrPtr = (NET_TMR *)0;
+    }
+
+   *p_err = NET_MLDP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetMLDP_TxAdvertiseMembership()
+*
+* Description : Transmit a MLDP multicast membership advertisement.
+*
+* Argument(s) : p_grp   Pointer to the MLDP host group.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_MLDP_ERR_NONE                   MLDP membership adv. successfully Tx.
+*                           NET_ERR_TX                          Error while transmitting the MLDP message.
+*                           NET_ERR_FAULT_UNKNOWN_ERR           Unknown error while tramsmitting the MLDP message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_HostGrpAdd(),
+*               NetMLDP_TxAdvertiseMembership().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_TxAdvertiseMembership (NET_MLDP_HOST_GRP  *p_grp,
+                                             NET_ERR            *p_err)
+{
+    NET_TMR_TICK        timeout_tick;
+    CPU_BOOLEAN         is_mcast_allnodes;
+    CPU_INT08U          scope;
+
+
+    is_mcast_allnodes = NetIPv6_IsAddrMcastAllNodes(&p_grp->AddrGrp);
+    scope             = NetIPv6_GetAddrScope(&p_grp->AddrGrp);
+
+    if (( is_mcast_allnodes == DEF_NO)            &&
+        ((scope != NET_IPv6_ADDR_SCOPE_RESERVED)  &&
+         (scope != NET_IPv6_ADDR_SCOPE_IF_LOCAL))) {
+
+        NET_IF_LINK_STATE  link_state;
+
+
+        link_state = NetIF_LinkStateGetHandler(p_grp->IF_Nbr, p_err);
+        if (link_state != NET_IF_LINK_UP) {
+           *p_err = NET_ERR_IF_LINK_DOWN;
+            goto exit;
+        }
+
+        timeout_tick  = (NET_TMR_TICK)(NET_MLDP_HOST_GRP_REPORT_DLY_JOIN_SEC * NET_TMR_TIME_TICK_PER_SEC);
+        p_grp->TmrPtr =  NetTmr_Get(NetMLDP_HostGrpReportDlyTimeout,
+                                    p_grp,
+                                    timeout_tick,
+                                    NET_TMR_FLAG_NONE,
+                                    p_err);
+        if(*p_err == NET_TMR_ERR_NONE) {
+            p_grp->State    = NET_MLDP_HOST_GRP_STATE_DELAYING;
+            p_grp->Delay_ms = NET_MLDP_HOST_GRP_REPORT_DLY_RETRY_SEC * 1000;
+
+        } else {                                                /* If no timer available tx once.                       */
+            p_grp->State    = NET_MLDP_HOST_GRP_STATE_IDLE;
+            p_grp->Delay_ms = 0u;
+        }
+
+        NetMLDP_TxReport(p_grp->IF_Nbr,
+                        &p_grp->AddrGrp,
+                         p_err);
+        switch (*p_err) {
+            case NET_MLDP_ERR_NONE:
+            case NET_ERR_TX_BUF_NONE_AVAIL:
+                 break;
+
+            case NET_ERR_IF_LINK_DOWN:
+                 NetTmr_Free(p_grp->TmrPtr);
+                 break;
+
+            case NET_ERR_TX:
+            case NET_MLDP_ERR_INVALID_HOP_HDR:
+                *p_err = NET_ERR_TX;
+                 goto exit;
+
+            default:
+                *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+                 goto exit;
+        }
+
+    } else {
+        p_grp->TmrPtr   = (NET_TMR *)0;
+        p_grp->State    =  NET_MLDP_HOST_GRP_STATE_IDLE;
+        p_grp->Delay_ms =  0;
+    }
+
+
+   *p_err =  NET_MLDP_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetMLDP_TxReport()
+*
+* Description : Transmit Multicast Listener Report message.
+*
+* Argument(s) : if_nbr              Network interface number to transmit Multicast Listener Report message.
+*
+*               p_addr_mcast_dest   Pointer to IPv6 multicast group address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MLDP_ERR_NONE               MLDP Report successfully transmitted.
+*                               NET_MLDP_ERR_INVALID_HOP_HDR    Error while setting Hop-by-Hop ext header.
+*                               NET_MLDP_ERR_TX                 Error while transmitting MDLP report.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_HostGrpJoinHandler()
+*               NetMLDP_RxQuery()
+*               NetMLDP_HostGrpReportDlyTimeout()
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_TxReport (NET_IF_NBR      if_nbr,
+                                NET_IPv6_ADDR  *p_addr_mcast_dest,
+                                NET_ERR        *p_err)
+{
+    NET_IPv6_ADDR      addr_unspecified;
+    NET_IPv6_ADDR     *p_addr_dest;
+    NET_IPv6_ADDR     *p_addr_src;
+    NET_IPv6_EXT_HDR   hop_hdr;
+    NET_IPv6_EXT_HDR  *p_ext_hdr_head;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE POINTER ------------------ */
+    if (p_addr_mcast_dest == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* Take the multicast address being reported as dest.   */
+    p_addr_dest = p_addr_mcast_dest;
+
+                                                                /* Take a Link-Local address cfgd on IF as src addr.    */
+    p_addr_src = NetIPv6_GetAddrLinkLocalCfgd(if_nbr);
+    if (p_addr_src == (NET_IPv6_ADDR *)0) {
+        NetIPv6_AddrUnspecifiedSet(&addr_unspecified, p_err);
+        p_addr_src = &addr_unspecified;
+    }
+
+                                                                /* ---------------- ADD HOP-HOP HEADER ---------------- */
+    p_ext_hdr_head = (NET_IPv6_EXT_HDR *)0;
+
+    p_ext_hdr_head =  NetIPv6_ExtHdrAddToList(p_ext_hdr_head,
+                                             &hop_hdr,
+                                              NET_IP_HDR_PROTOCOL_EXT_HOP_BY_HOP,
+                                              NET_MLDP_OPT_HDR_SIZE,
+                                              NetMLDP_PrepareHopByHopHdr,
+                                              NET_IPv6_EXT_HDR_KEY_HOP_BY_HOP,
+                                              p_err);
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+             break;
+
+        case NET_IPv6_ERR_INVALID_EH:
+             *p_err = NET_MLDP_ERR_INVALID_HOP_HDR;
+              goto exit;
+
+        default:
+            *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+             goto exit;
+    }
+
+                                                                /* ---------------- TX MLDP REPORT MSG ---------------- */
+    (void)NetICMPv6_TxMsgReqHandler(        if_nbr,
+                                            NET_ICMPv6_MSG_TYPE_MLDP_REPORT_V1,
+                                            NET_ICMPv6_MSG_CODE_MLDP_REPORT,
+                                            0u,
+                                            p_addr_src,
+                                            p_addr_dest,
+                                            NET_IPv6_HDR_HOP_LIM_MIN,
+                                            DEF_NO,
+                                            p_ext_hdr_head,
+                                    (void *)p_addr_mcast_dest,
+                                            NET_IPv6_ADDR_SIZE,
+                                            p_err);
+    switch (*p_err) {
+        case NET_ICMPv6_ERR_NONE:
+             break;
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+             goto exit;
+
+        default:
+            *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+             goto exit;
+    }
+
+
+   *p_err = NET_MLDP_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetMLDP_TxDone()
+*
+* Description : (1) Transmit Multicast Listener Done message.
+*
+* Argument(s) : if_nbr              Network interface number to transmit Multicast Listener Done message.
+*
+*               p_addr_mcast_dest   Pointer to multicast IPv6 address.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MLDP_ERR_NONE               MLDP Done message successfully transmitted.
+*                               NET_MLDP_ERR_INVALID_HOP_HDR    Error while setting Hop-by-Hop ext header.
+*                               NET_MLDP_ERR_TX                 Error while transmitting MDLP Done message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_HostGrpLeaveHandler().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_TxMsgDone (NET_IF_NBR      if_nbr,
+                                 NET_IPv6_ADDR  *p_addr_mcast_dest,
+                                 NET_ERR        *p_err)
+{
+    NET_IPv6_ADDR      addr_unspecified;
+    NET_IPv6_ADDR      addr_mcast_all_routers;
+    NET_IPv6_ADDR     *p_addr_src;
+    NET_IPv6_EXT_HDR   hop_hdr;
+    NET_IPv6_EXT_HDR  *p_ext_hdr_head;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE POINTER ------------------ */
+    if (p_addr_mcast_dest == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* Take the multicast all routers addr as dest addr.    */
+    NetIPv6_AddrMcastAllRoutersSet(&addr_mcast_all_routers, DEF_NO, p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+        *p_err = NET_MLDP_ERR_INVALID_ADDR_DEST;
+         return;
+    }
+
+                                                                /* Take a Link-Local address cfgd on IF as src addr.    */
+    p_addr_src = NetIPv6_GetAddrLinkLocalCfgd(if_nbr);
+    if (p_addr_src == (NET_IPv6_ADDR *)0) {
+        NetIPv6_AddrUnspecifiedSet(&addr_unspecified, p_err);
+        p_addr_src = &addr_unspecified;
+    }
+
+                                                                /* ---------------- ADD HOP-HOP HEADER ---------------- */
+    p_ext_hdr_head = (NET_IPv6_EXT_HDR *)0;
+
+    p_ext_hdr_head = NetIPv6_ExtHdrAddToList(p_ext_hdr_head,
+                                            &hop_hdr,
+                                             NET_IP_HDR_PROTOCOL_EXT_HOP_BY_HOP,
+                                             NET_MLDP_OPT_HDR_SIZE,
+                                             NetMLDP_PrepareHopByHopHdr,
+                                             NET_IPv6_EXT_HDR_KEY_HOP_BY_HOP,
+                                             p_err);
+    switch (*p_err) {
+        case NET_IPv6_ERR_NONE:
+             break;
+
+        case NET_IPv6_ERR_INVALID_EH:
+             *p_err = NET_MLDP_ERR_INVALID_HOP_HDR;
+              goto exit;
+
+        default:
+            *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+             goto exit;
+    }
+
+                                                                /* ----------------- TX MLDP DONE MSG ----------------- */
+   (void) NetICMPv6_TxMsgReqHandler(         if_nbr,
+                                             NET_ICMPv6_MSG_TYPE_MLDP_DONE,
+                                             NET_ICMPv6_MSG_CODE_MLDP_DONE,
+                                             0u,
+                                             p_addr_src,
+                                            &addr_mcast_all_routers,
+                                             NET_IPv6_HDR_HOP_LIM_MIN,
+                                             DEF_NO,
+                                             p_ext_hdr_head,
+                                    (void *) p_addr_mcast_dest,
+                                             NET_IPv6_ADDR_SIZE,
+                                             p_err);
+   switch (*p_err) {
+       case NET_ICMPv6_ERR_NONE:
+            break;
+
+
+       case NET_ERR_IF_LINK_DOWN:
+       case NET_ERR_TX:
+       case NET_ERR_TX_BUF_NONE_AVAIL:
+            goto exit;
+
+       default:
+           *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+            goto exit;
+   }
+
+
+   *p_err = NET_MLDP_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetMLDP_HostGrpSrch()
+*
+* Description : Search MLDP Host Group List for host group with specific address & interface number.
+*
+*               (1) MLDP host groups are linked to form an MLDP Host Group List.
+*
+*                   (a) In the diagram below, ... :
+*
+*                       (1) The horizontal row represents the list of MLDP host groups.
+*
+*                       (2) 'NetMLDP_HostGrpListHead' points to the head of the MLDP Host Group List.
+*
+*                       (3) MLDP host groups' 'PrevListPtr' & 'NextListPtr' doubly-link each host group to
+*                           form the MLDP Host Group List.
+*
+*                   (b) (1) For any MLDP Host Group List lookup, all MLDP host groups are searched in order
+*                           to find the host group with the appropriate host group address on the specified
+*                           interface.
+*
+*                       (2) To expedite faster MLDP Host Group List lookup :
+*
+*                           (A) (1) (a) MLDP host groups are added at;            ...
+*                                   (b) MLDP host groups are searched starting at ...
+*                               (2) ... the head of the MLDP Host Group List.
+*
+*                           (B) As MLDP host groups are added into the list, older MLDP host groups migrate
+*                               to the tail of the MLDP Host Group List.   Once an MLDP host group is left,
+*                               it is removed from the MLDP Host Group List.
+*
+*
+*                                        |                                               |
+*                                        |<---------- List of MLDP Host Groups --------->|
+*                                        |                (see Note #1a1)                |
+*
+*                                 New MLDP host groups                      Oldest MLDP host group
+*                                   inserted at head                        in MLDP Host Group List
+*                                  (see Note #1b2A2)                           (see Note #1b2B)
+*
+*                                           |                 NextPtr                 |
+*                                           |             (see Note #1a3)             |
+*                                           v                    |                    v
+*                                                                |
+*                   Head of MLDP         -------       -------   v   -------       -------
+*                  Host Group List  ---->|     |------>|     |------>|     |------>|     |
+*                                        |     |       |     |       |     |       |     |        Tail of MLDP
+*                  (see Note #1a2)       |     |<------|     |<------|     |<------|     |<----  Host Group List
+*                                        -------       -------   ^   -------       -------
+*                                                                |
+*                                                                |
+*                                                             PrevPtr
+*                                                         (see Note #1a3)
+*
+*
+* Argument(s) : if_nbr      Interface number to search for host group.
+*
+*               addr_grp    IP address of host group to search (see Note #2).
+*
+* Return(s)   : Pointer to MLDP host group with specific IP group address & interface, if found.
+*
+*               Pointer to NULL,                                                       otherwise.
+*
+* Caller(s)   : NetMLDP_HostGrpJoinHandler(),
+*               NetMLDP_HostGrpLeaveHandler(),
+*               NetMLDP_IsGrpJoinedOnIF(),
+*               NetMLDP_RxQuery(),
+*               NetMLDP_RxReport().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_MLDP_HOST_GRP  *NetMLDP_HostGrpSrch (      NET_IF_NBR      if_nbr,
+                                                 const NET_IPv6_ADDR  *p_addr)
+{
+    NET_MLDP_HOST_GRP  *p_host_grp;
+    NET_MLDP_HOST_GRP  *p_host_grp_next;
+    CPU_INT08U          match_bit;
+    CPU_BOOLEAN         found;
+
+
+    p_host_grp = NetMLDP_HostGrpListHead;                       /* Start @ MLDP Host Grp List head.                     */
+    found      = DEF_NO;
+
+    while ((p_host_grp != (NET_MLDP_HOST_GRP *)0) &&            /* Srch MLDP Host Grp List ...                          */
+           (found      ==  DEF_NO)               ) {            /* ... until host grp found.                            */
+
+        p_host_grp_next = (NET_MLDP_HOST_GRP *) p_host_grp->NextListPtr;
+
+        match_bit       =  NetIPv6_GetAddrMatchingLen(&p_host_grp->AddrGrp, p_addr);
+
+        found = ((p_host_grp->IF_Nbr  == if_nbr) &&             /* Cmp IF nbr & grp addr.                               */
+                 (match_bit == 128)) ? DEF_YES : DEF_NO;
+
+        if (found != DEF_YES) {                                 /* If NOT found, adv to next MLDP host grp.             */
+            p_host_grp = p_host_grp_next;
+        }
+    }
+
+    return (p_host_grp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetMLDP_HostGrpSrchIF()
+*
+* Description : Search MLDP Host Group List for all host groups attached to the same interface number.
+*
+* Argument(s) : if_nbr      Interface number to search for host group.
+*
+* Return(s)   : Pointer to the MDLP host group at the head of the list containing all the host groups
+*                 for the given Interface number.
+*
+* Caller(s)   : NetMDLP_RxQuery().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_MLDP_HOST_GRP  *NetMLDP_HostGrpSrchIF (NET_IF_NBR  if_nbr)
+{
+    NET_MLDP_HOST_GRP  *p_host_grp;
+    NET_MLDP_HOST_GRP  *p_if_grp_head;
+
+
+
+    p_host_grp    =  NetMLDP_HostGrpListHead;                   /* Start @ MLDP Host Grp List head.                     */
+    p_if_grp_head = (NET_MLDP_HOST_GRP *)0;
+
+    while (p_host_grp != (NET_MLDP_HOST_GRP *)0) {              /* Srch MLDP Host Grp List ...                          */
+                                                                /* ... for all grp attached to IF.                      */
+
+        if (p_host_grp->IF_Nbr  == if_nbr) {
+            if (p_if_grp_head == (NET_MLDP_HOST_GRP *)0) {
+                p_host_grp->PrevIF_ListPtr = (NET_MLDP_HOST_GRP *)0;
+                p_host_grp->NextIF_ListPtr = (NET_MLDP_HOST_GRP *)0;
+            } else {
+                p_if_grp_head->PrevIF_ListPtr = p_host_grp;
+                p_host_grp->NextIF_ListPtr    = p_if_grp_head;
+            }
+            p_if_grp_head = p_host_grp;
+        }
+
+        p_host_grp = p_host_grp->NextListPtr;
+
+    }
+
+    return (p_if_grp_head);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetMLDP_HostGrpAdd()
+*
+* Description : (1) Add a host group to the MLDP Host Group List :
+*
+*                   (a) Get a     host group from      host group pool
+*                   (b) Configure host group
+*                   (c) Insert    host group into MLDP Host Group List
+*                   (d) Configure interface for multicast address
+*
+*
+* Argument(s) : if_nbr      Interface number to add host group.
+*               ------      Argument checked in NetMLDP_HostGrpJoinHandler().
+*
+*               p_addr      Pointer to IPv6 address of host group to add.
+*               --------    Argument checked in NetMLDP_HostGrpJoinHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MLDP_ERR_NONE                   Host group succesfully added.
+*
+*                                                                   --- RETURNED BY NetMLDP_HostGrpGet() : ---
+*                               NET_MLDP_ERR_HOST_GRP_NONE_AVAIL    NO available host group to allocate.
+*
+* Return(s)   : Pointer to host group, if NO error(s).
+*
+*               Pointer to NULL,       otherwise.
+*
+* Caller(s)   : NetMLDP_HostGrpJoinHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_MLDP_HOST_GRP  *NetMLDP_HostGrpAdd (      NET_IF_NBR      if_nbr,
+                                                const NET_IPv6_ADDR  *p_addr,
+                                                      NET_ERR        *p_err)
+{
+    NET_MLDP_HOST_GRP  *p_host_grp;
+    NET_PROTOCOL_TYPE   addr_protocol_type;
+    CPU_INT08U         *p_addr_protocol;
+    CPU_INT08U          addr_protocol_len;
+    NET_ERR             err;
+
+
+
+    p_host_grp = NetMLDP_HostGrpGet(p_err);                     /* ------------------- GET HOST GRP ------------------- */
+    if (p_host_grp == (NET_MLDP_HOST_GRP *)0) {
+        return (p_host_grp);                                    /* Rtn err from NetMLDP_HostGrpGet().                   */
+    }
+
+                                                                /* ------------------- CFG HOST GRP ------------------- */
+    Mem_Copy(&p_host_grp->AddrGrp, p_addr, sizeof(p_host_grp->AddrGrp));
+
+    p_host_grp->IF_Nbr  =   if_nbr;
+    p_host_grp->RefCtr  =   1u;
+
+                                                                /* Set host grp state.                                  */
+    p_host_grp->State = NET_MLDP_HOST_GRP_STATE_IDLE;
+
+                                                                /* -------- INSERT HOST GRP INTO HOST GRP LIST -------- */
+    NetMLDP_HostGrpInsert(p_host_grp);
+
+                                                                /* ------------ CFG IF FOR MULTICAST ADDR ------------- */
+    addr_protocol_type =  NET_PROTOCOL_TYPE_IP_V6;
+    p_addr_protocol    = (CPU_INT08U *)p_addr;
+    addr_protocol_len  =  NET_IPv6_ADDR_SIZE;
+
+    NetIF_AddrMulticastAdd(if_nbr,
+                           p_addr_protocol,
+                           addr_protocol_len,
+                           addr_protocol_type,
+                          &err);
+    switch (err) {
+        case NET_IF_ERR_NONE:
+             break;
+
+
+        case NET_IF_ERR_INVALID_CFG:
+        case NET_ERR_FAULT_NULL_FNCT:
+        case NET_ERR_FAULT_NULL_PTR:
+        default:
+            *p_err = NET_ERR_FAULT_NULL_OBJ;
+             goto exit_remove;
+    }
+
+                                                                /* ------------ ADVERTISE MCAST MEMBERSHIP ------------ */
+    NetMLDP_TxAdvertiseMembership(p_host_grp, p_err);
+    switch (*p_err) {
+        case NET_MLDP_ERR_NONE:
+        case NET_ERR_TX_BUF_NONE_AVAIL:
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_ERR_TX:
+        default:
+             goto exit;
+    }
+
+    NetIF_LinkStateSubscribeHandler(if_nbr, &NetMLDP_LinkStateNotification, p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+             break;
+
+
+        case NET_ERR_FAULT_NULL_PTR:
+            *p_err = NET_ERR_FAULT_NULL_OBJ;
+             goto exit_remove;
+
+
+        case NET_IF_ERR_LINK_SUBSCRIBER_MEM_ALLOC:
+            *p_err = NET_ERR_FAULT_MEM_ALLOC;
+             goto exit_remove;
+
+
+        default:
+            *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+             goto exit_remove;
+    }
+
+   *p_err = NET_MLDP_ERR_NONE;
+    goto exit;
+
+exit_remove:
+    NetMLDP_HostGrpRemove(p_host_grp);
+    NetMLDP_HostGrpFree(p_host_grp);
+    p_host_grp = DEF_NULL;
+
+exit:
+    return (p_host_grp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetMLDP_HostGrpRemove()
+*
+* Description : Remove a host group from the MLDP Host Group List :
+*
+*                   (a) Remove host group from MLDP Host Group List
+*                   (b) Free   host group back to   host group pool
+*                   (c) Remove multicast address from interface
+*
+*
+* Argument(s) : p_host_grp   Pointer to a host group.
+*               ---------    Argument checked in NetMLDP_HostGrpLeaveHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_HostGrpLeaveHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_HostGrpRemove (NET_MLDP_HOST_GRP  *p_host_grp)
+{
+    NET_IF_NBR          if_nbr;
+    NET_PROTOCOL_TYPE   addr_protocol_type;
+    NET_IPv6_ADDR      *p_addr_grp;
+    CPU_INT08U         *p_addr_protocol;
+    CPU_INT08U          addr_protocol_len;
+    NET_ERR             err;
+
+
+    if_nbr     =  p_host_grp->IF_Nbr;
+    p_addr_grp = &p_host_grp->AddrGrp;
+
+
+    NetMLDP_HostGrpUnlink(p_host_grp);                          /* -------- REMOVE HOST GRP FROM HOST GRP LIST -------- */
+
+    NetMLDP_HostGrpFree(p_host_grp);                            /* ------------------ FREE HOST GRP ------------------- */
+
+                                                                /* ---------- REMOVE MULTICAST ADDR FROM IF ----------- */
+    addr_protocol_type =  NET_PROTOCOL_TYPE_IP_V6;
+    p_addr_protocol    = (CPU_INT08U *)p_addr_grp;
+    addr_protocol_len  =  NET_IPv6_ADDR_SIZE;
+
+    NetIF_AddrMulticastRemove(if_nbr,
+                              p_addr_protocol,
+                              addr_protocol_len,
+                              addr_protocol_type,
+                             &err);
+
+    NetIF_LinkStateUnSubscribeHandler(if_nbr, &NetMLDP_LinkStateNotification, &err);
+
+   (void)&err;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetMLDP_HostGrpInsert()
+*
+* Description : Insert a host group into the MLDP Host Group List.
+*
+* Argument(s) : p_host_grp   Pointer to a host group.
+*               ----------   Argument checked in NetMLDP_HostGrpAdd().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_HostGrpAdd().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_HostGrpInsert (NET_MLDP_HOST_GRP  *p_host_grp)
+{
+                                                                        /* ---------- CFG MLDP HOST GRP PTRS ---------- */
+    p_host_grp->PrevListPtr = (NET_MLDP_HOST_GRP *)0;
+    p_host_grp->NextListPtr = (NET_MLDP_HOST_GRP *)NetMLDP_HostGrpListHead;
+
+                                                                        /* ------ INSERT MLDP HOST GRP INTO LIST ------ */
+    if (NetMLDP_HostGrpListHead != (NET_MLDP_HOST_GRP *)0) {            /* If list NOT empty, insert before head.       */
+        NetMLDP_HostGrpListHead->PrevListPtr = p_host_grp;
+    }
+
+    NetMLDP_HostGrpListHead = p_host_grp;                               /* Insert host grp @ list head.                 */
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetMLDP_HostGrpUnlink()
+*
+* Description : Unlink a host group from the MLDP Host Group List.
+*
+* Argument(s) : p_host_grp   Pointer to a host group.
+*               ----------   Argument checked in NetMLDP_HostGrpRemove()
+*                                             by NetMLDP_HostGrpLeaveHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_HostGrpRemove().
+*
+* Note(s)     : (1) Since NetMLDP_HostGrpUnlink() called ONLY to remove & then re-link or free host
+*                   groups, it is NOT necessary to clear the entry's previous & next pointers.  However,
+*                   pointers cleared to NULL shown for correctness & completeness.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_HostGrpUnlink (NET_MLDP_HOST_GRP  *p_host_grp)
+{
+    NET_MLDP_HOST_GRP  *p_host_grp_prev;
+    NET_MLDP_HOST_GRP  *p_host_grp_next;
+
+                                                                        /* ------ UNLINK MLDP HOST GRP FROM LIST ------ */
+    p_host_grp_prev = p_host_grp->PrevListPtr;
+    p_host_grp_next = p_host_grp->NextListPtr;
+                                                                        /* Point prev host grp to next host grp.        */
+    if (p_host_grp_prev != (NET_MLDP_HOST_GRP *)0) {
+        p_host_grp_prev->NextListPtr = p_host_grp_next;
+    } else {
+        NetMLDP_HostGrpListHead = p_host_grp_next;
+    }
+                                                                        /* Point next host grp to prev host grp.        */
+    if (p_host_grp_next != (NET_MLDP_HOST_GRP *)0) {
+        p_host_grp_next->PrevListPtr = p_host_grp_prev;
+    }
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)                             /* Clr host grp ptrs (see Note #1).             */
+    p_host_grp->PrevListPtr = (NET_MLDP_HOST_GRP *)0;
+    p_host_grp->NextListPtr = (NET_MLDP_HOST_GRP *)0;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetMLDP_HostGrpGet()
+*
+* Description : (1) Allocate & initialize a host group :
+*
+*                   (a) Get a host group
+*                   (b) Validate   host group
+*                   (c) Initialize host group
+*                   (d) Update host group pool statistics
+*                   (e) Return pointer to host group
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*               (2) The host group pool is implemented as a stack :
+*
+*                   (a) 'NetMLDP_HostGrpPoolPtr' points to the head of the host group pool.
+*
+*                   (b) Host groups' 'NextPtr's link each host group to form the host group pool stack.
+*
+*                   (c) Host groups are inserted & removed at the head of    the host group pool stack.
+*
+*
+*                                       Host groups are
+*                                     inserted & removed
+*                                        at the head
+*                                       (see Note #2c)
+*
+*                                             |                 NextPtr
+*                                             |             (see Note #2b)
+*                                             v                    |
+*                                                                  |
+*                                          -------       -------   v   -------       -------
+*                          Host group ---->|     |------>|     |------>|     |------>|     |
+*                            Pointer       |     |       |     |       |     |       |     |
+*                                          |     |       |     |       |     |       |     |
+*                         (see Note #2a)   -------       -------       -------       -------
+*
+*                                          |                                               |
+*                                          |<--------- Pool of Free host groups ---------->|
+*                                          |                (see Note #2)                  |
+*
+*
+* Argument(s) : p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MLDP_ERR_NONE                   Host group successfully allocated &
+*                                                                       initialized.
+*                               NET_MLDP_ERR_HOST_GRP_NONE_AVAIL    NO available host group to allocate.
+*
+* Return(s)   : Pointer to host group, if NO error(s).
+*
+*               Pointer to NULL,       otherwise.
+*
+* Caller(s)   : NetMLDP_HostGrpAdd().
+*
+* Note(s)     : (3) (a) Host group pool is accessed by 'NetMLDP_HostGrpPoolPtr' during execution of
+*
+*                       (1) NetMLDP_Init()
+*                       (2) NetMLDP_HostGrpGet()
+*                       (3) NetMLDP_HostGrpFree()
+*
+*                   (b) Since the primary tasks of the network protocol suite are prevented from running
+*                       concurrently (see 'net.h  Note #3'), it is NOT necessary to protect the shared
+*                       resources of the host group pool since no asynchronous access from other network
+*                       tasks is possible.
+*********************************************************************************************************
+*/
+
+static  NET_MLDP_HOST_GRP  *NetMLDP_HostGrpGet (NET_ERR  *p_err)
+{
+    NET_MLDP_HOST_GRP  *p_host_grp;
+    NET_ERR             err;
+
+
+                                                                /* ------------------- GET HOST GRP ------------------- */
+    if (NetMLDP_HostGrpPoolPtr != (NET_MLDP_HOST_GRP *)0) {     /* If host grp pool NOT empty, get host grp from pool.  */
+        p_host_grp              = (NET_MLDP_HOST_GRP *)NetMLDP_HostGrpPoolPtr;
+        NetMLDP_HostGrpPoolPtr  = (NET_MLDP_HOST_GRP *)p_host_grp->NextListPtr;
+
+    } else {                                                    /* Else none avail, rtn err.                            */
+        NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.NoneAvailCtr);
+       *p_err = NET_MLDP_ERR_HOST_GRP_NONE_AVAIL;
+        return ((NET_MLDP_HOST_GRP *)0);
+    }
+
+                                                                /* ------------------ INIT HOST GRP ------------------- */
+    NetMLDP_HostGrpClr(p_host_grp);
+    DEF_BIT_SET(p_host_grp->Flags, NET_MLDP_FLAG_USED);         /* Set host grp as used.                                */
+
+                                                                /* ------------ UPDATE HOST GRP POOL STATS ------------ */
+    NetStat_PoolEntryUsedInc(&NetMLDP_HostGrpPoolStat, &err);
+   (void)&err;
+
+
+   *p_err = NET_MLDP_ERR_NONE;
+
+    return (p_host_grp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetMLDP_HostGrpFree()
+*
+* Description : (1) Free a host group :
+*
+*                   (a) Free   host group timer
+*                   (b) Clear  host group controls
+*                   (c) Free   host group back to host group pool
+*                   (d) Update host group pool statistics
+*
+*
+* Argument(s) : p_host_grp   Pointer to a host group.
+*               ---------    Argument checked in NetMLDP_HostGrpRemove()
+*                                             by NetMLDP_HostGrpLeaveHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_HostGrpRemove().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_HostGrpFree (NET_MLDP_HOST_GRP  *p_host_grp)
+{
+    NET_ERR  err;
+
+
+                                                                    /* -------------- FREE HOST GRP TMR --------------- */
+    if (p_host_grp->TmrPtr != (NET_TMR *)0) {
+        NetTmr_Free(p_host_grp->TmrPtr);
+        p_host_grp->TmrPtr = (NET_TMR *)0;
+    }
+
+                                                                    /* ----------------- CLR HOST GRP ----------------- */
+    p_host_grp->State = NET_MLDP_HOST_GRP_STATE_FREE;                /* Set host grp as freed/NOT used.                  */
+    DEF_BIT_CLR(p_host_grp->Flags, NET_MLDP_FLAG_USED);
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+     NetMLDP_HostGrpClr(p_host_grp);
+#endif
+
+                                                                    /* ---------------- FREE HOST GRP ----------------- */
+    p_host_grp->NextListPtr = NetMLDP_HostGrpPoolPtr;
+    NetMLDP_HostGrpPoolPtr  = p_host_grp;
+
+                                                                    /* ---------- UPDATE HOST GRP POOL STATS ---------- */
+    NetStat_PoolEntryUsedDec(&NetMLDP_HostGrpPoolStat, &err);
+   (void)&err;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetMLDP_HostGrpClr()
+*
+* Description : Clear MLDP host group controls.
+*
+* Argument(s) : p_host_grp   Pointer to a MLDP host group.
+*               ---------    Argument checked in caller(s).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetMLDP_Init(),
+*               NetMLDP_HostGrpGet(),
+*               NetMLDP_HostGrpFree().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_HostGrpClr (NET_MLDP_HOST_GRP  *p_host_grp)
+{
+    p_host_grp->PrevListPtr     = (NET_MLDP_HOST_GRP *)0;
+    p_host_grp->NextListPtr     = (NET_MLDP_HOST_GRP *)0;
+
+    p_host_grp->PrevIF_ListPtr  = (NET_MLDP_HOST_GRP *)0;
+    p_host_grp->NextIF_ListPtr  = (NET_MLDP_HOST_GRP *)0;
+
+    p_host_grp->TmrPtr          = (NET_TMR           *)0;
+    p_host_grp->Delay_ms        =  0;
+
+    p_host_grp->IF_Nbr          =  NET_IF_NBR_NONE;
+    p_host_grp->AddrGrp         =  NET_IPv6_ADDR_NONE;
+
+    p_host_grp->State           =  NET_MLDP_HOST_GRP_STATE_FREE;
+    p_host_grp->RefCtr          =  0u;
+    p_host_grp->Flags           =  NET_MLDP_FLAG_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetMLDP_HostGrpReportDlyTimeout()
+*
+* Description : Transmit an MLDP report on MLDP Delay timeout.
+*
+* Argument(s) : p_host_grp_timeout   Pointer to a host group (see Note #1b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetMLDP_HostGrpJoinHandler(),
+*                             NetMLDP_RxQuery(),
+*
+* Note(s)     : (1) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_MLDP_HOST_GRP' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (2) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer,
+*                   (b) but do NOT re-free the timer.
+*
+*               (3) In case of a transmit error :
+*
+*                   (a) Configure a timer to attempt retransmission of the MLDP report, if the error
+*                       is transitory.
+*
+*                   (b) Revert to 'IDLE' state, if the error is permanent.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_HostGrpReportDlyTimeout (void  *p_host_grp_timeout)
+{
+    NET_MLDP_HOST_GRP  *p_host_grp;
+    NET_TMR_TICK        timeout_tick;
+    NET_ERR             err;
+
+
+    p_host_grp = (NET_MLDP_HOST_GRP *)p_host_grp_timeout;       /* See Note #1b2A.                                      */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE MLDP HOST GRP -------------- */
+    if (p_host_grp == (NET_MLDP_HOST_GRP *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.MLDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_host_grp->TmrPtr = (NET_TMR *)0;                          /* Clear tmr (see Note #2).                             */
+
+
+                                                                /* ------------------ TX MLDP REPORT ------------------ */
+    NetMLDP_TxReport((NET_IF_NBR)       p_host_grp->IF_Nbr,
+                     (NET_IPv6_ADDR *) &p_host_grp->AddrGrp,
+                     (NET_ERR       *) &err);
+    switch (err) {
+        case NET_MLDP_ERR_NONE:                                 /* If NO err, ...                                       */
+        case NET_ERR_IF_LINK_DOWN:
+             p_host_grp->State = NET_MLDP_HOST_GRP_STATE_IDLE;  /* ... set state to 'IDLE'.                             */
+             break;
+
+
+        case NET_ERR_TX:                                        /* If tx err, ...                                       */
+                                                                /* ... cfg new tmr (see Note #3a).                      */
+             timeout_tick       = (NET_TMR_TICK)(NET_MLDP_HOST_GRP_REPORT_DLY_RETRY_SEC * NET_TMR_TIME_TICK_PER_SEC);
+             p_host_grp->TmrPtr =  NetTmr_Get(              NetMLDP_HostGrpReportDlyTimeout,
+                                              (void       *)p_host_grp,
+                                                            timeout_tick,
+                                                            NET_TMR_FLAG_NONE,
+                                                           &err);
+             if(err == NET_TMR_ERR_NONE) {
+                p_host_grp->State    = NET_MLDP_HOST_GRP_STATE_DELAYING;
+                p_host_grp->Delay_ms = NET_MLDP_HOST_GRP_REPORT_DLY_RETRY_SEC * 1000;
+             } else {
+                p_host_grp->State    = NET_MLDP_HOST_GRP_STATE_IDLE;
+                p_host_grp->Delay_ms = 0;
+             }
+             break;
+
+
+        default:                                                /* On all other errs, ...                               */
+             p_host_grp->State = NET_MLDP_HOST_GRP_STATE_IDLE;  /* ... set state to 'IDLE'.                             */
+             break;
+    }
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                    NetMLDP_LinkStateNotification()
+*
+* Description : Callback function called when the Interface link state has changed and the MDLP module
+*               needs to update its memberships on the Interface.
+*
+* Argument(s) : if_nbr      Interface number associated with the link status notification.
+*
+*               link_state  Current IF link state :
+*                               NET_IF_LINK_UP
+*                               NET_IF_LINK_DOWN
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced NetMLDP_HostGrpAdd(),
+*                          NetMLDP_HostGrpRemove().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetMLDP_LinkStateNotification (NET_IF_NBR         if_nbr,
+                                             NET_IF_LINK_STATE  link_state)
+{
+    NET_MLDP_HOST_GRP  *p_host_grp;
+    NET_ERR             err;
+
+
+    switch (link_state) {
+        case NET_IF_LINK_UP:
+
+             p_host_grp = NetMLDP_HostGrpListHead;                      /* Start @ MLDP Host Grp List head.                     */
+
+             while (p_host_grp != DEF_NULL)  {                          /* Srch MLDP Host Grp List ...                          */
+                 if (p_host_grp->IF_Nbr == if_nbr) {
+                     NetMLDP_TxAdvertiseMembership(p_host_grp, &err);
+                    (void)&err;
+                 }
+                 p_host_grp = p_host_grp->NextListPtr;
+             }
+             break;
+
+
+        case NET_IF_LINK_DOWN:
+        default:
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_MLDP_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_mldp.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_mldp.h
new file mode 100644
index 0000000..e123c99
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_mldp.h
@@ -0,0 +1,319 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK MLDP LAYER
+*                                (MULTICAST LISTENER DISCOVERY PROTOCOL)
+*
+* Filename      : net_mldp.h
+* Version       : V3.04.02
+* Programmer(s) : SL
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) Supports Neighbor Discovery Protocol as described in RFC #2710.
+*
+*                 (2) Only the MLDPv1 is supported. MLDPv2 as described in RFC #3810 is not yet
+*                     supported.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../../Source/net_cfg_net.h"
+#include  "../../Source/net_type.h"
+#include  "../../Source/net_tmr.h"
+#include  "../../Source/net_buf.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Network MLDP Layer module is required for applications that requires IPv6 services.
+*
+*               See also 'net_cfg.h  IP LAYER CONFIGURATION'.
+*
+*           (2) The following IP-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require IPv6 Layer
+*               configuration (see 'net_cfg_net.h  IP LAYER CONFIGURATION') :
+*
+*                   NET_MLDP_MODULE_EN
+*********************************************************************************************************
+*/
+
+#ifndef  NET_MLDP_MODULE_PRESENT
+#define  NET_MLDP_MODULE_PRESENT
+
+#ifdef   NET_MLDP_MODULE_EN                                /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      MLDP MESSAGE SIZE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_MLDP_HDR_SIZE_DFLT                            8
+#define  NET_MLDP_MSG_SIZE_MIN                            16
+#define  NET_MLDP_MSG_SIZE_MAX                           NET_ICMPv6_MSG_LEN_MAX_NONE
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                    MLDP CACHE QUANTITY DATA TYPE
+*
+* Note(s) : (1) NET_MLDP_CACHE_NBR_MAX  SHOULD be #define'd based on 'NET_MLDP_HOST_GRP_QTY' data type
+*               declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_MLDP_HOST_GRP_QTY;
+
+#define  NET_MLDP_HOST_GRP_NBR_MIN                         1
+#define  NET_MLDP_HOST_GRP_NBR_MAX                       DEF_INT_16U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                   MLDP HOST GROUP STATE DATA TYPE
+*
+*                                         -------------------
+*                                         |                 |
+*                                         |                 |
+*                                         |                 |
+*                                         |                 |
+*                            ------------>|      FREE       |<------------
+*                            |            |                 |            |
+*                            |            |                 |            |
+*                            |            |                 |            |
+*                            |            |                 |            |
+*                            |            -------------------            | (1e) STOP LISTENING
+*                            |                     |                     |
+*                            | (1e) STOP LISTENING | (1a)START LISTENING |
+*                            |                     |                     |
+*                   -------------------            |            -------------------
+*                   |                 |<------------            |                 |
+*                   |                 |                         |                 |
+*                   |                 |<------------------------|                 |
+*                   |                 |  (1c) QUERY  RECEIVED   |                 |
+*                   |    DELAYING     |                         |      IDLE       |
+*                   |                 |------------------------>|                 |
+*                   |                 |  (1b) REPORT RECEIVED   |                 |
+*                   |                 |                         |                 |
+*                   |                 |------------------------>|                 |
+*                   -------------------  (1d) TIMER  EXPIRED    -------------------
+*
+*
+* Note(s) : (1) See RFC #2710
+*********************************************************************************************************
+*/
+
+typedef enum net_mldp_host_grp_state {
+    NET_MLDP_HOST_GRP_STATE_NONE      =  0u,
+    NET_MLDP_HOST_GRP_STATE_FREE      =  1u,
+    NET_MLDP_HOST_GRP_STATE_DELAYING  =  2u,
+    NET_MLDP_HOST_GRP_STATE_IDLE      =  3u,
+} NET_MLDP_HOST_GRP_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                       MLDP HEADERS DATA TYPE
+*
+* Note(s) : (1) See RFC #2710 Section #3 for MLDP message header format.
+*********************************************************************************************************
+*/
+
+                                                                        /* -------------- NET MLDP V1 HDR -------------- */
+typedef  struct  net_mldp_v1_hdr {
+    CPU_INT08U        Type;                                             /* MLDP msg type.                                */
+    CPU_INT08U        Code;                                             /* MLDP msg code.                                */
+    CPU_INT16U        ChkSum;                                           /* MLDP msg chk sum.                             */
+    CPU_INT16U        MaxResponseDly;                                   /* MLDP max response dly.                        */
+    CPU_INT16U        Reserved;                                         /* MLDP reserved bits.                           */
+    NET_IPv6_ADDR     McastAddr;                                        /* MLDP mcast addr.                              */
+} NET_MLDP_V1_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                IPv6 MULTICAST GROUP DATA TYPES
+*
+* Note(s) : (1) Structure holding the group membership information of a IPv6 multicast address
+*
+*********************************************************************************************************
+*/
+
+typedef  struct  net_mldp_host_grp  NET_MLDP_HOST_GRP;
+
+struct net_mldp_host_grp {
+    NET_MLDP_HOST_GRP        *PrevListPtr;                      /* Ptr to PREV MLDP host grp.                           */
+    NET_MLDP_HOST_GRP        *NextListPtr;                      /* Ptr to NEXT MLDP host grp.                           */
+
+    NET_MLDP_HOST_GRP        *PrevIF_ListPtr;                   /* Ptr to PREV MLDP host grp of same IF.                */
+    NET_MLDP_HOST_GRP        *NextIF_ListPtr;                   /* Ptr to NEXT MLDP host grp of same IF.                */
+
+    NET_TMR                  *TmrPtr;                           /* Pointer to MDLP delay timer.                         */
+    CPU_INT32U                Delay_ms;                         /* Delay value.                                         */
+
+    NET_IF_NBR                IF_Nbr;                           /* IF nbr attached to the MDLP group.                   */
+    NET_IPv6_ADDR             AddrGrp;                          /* Multicast address of the group.                      */
+
+    NET_MLDP_HOST_GRP_STATE   State;                            /* MLDP   host grp state.                               */
+    CPU_INT16U                RefCtr;                           /* MLDP   host grp ref ctr.                             */
+    CPU_INT16U                Flags;                            /* MLDP   host grp flags.                               */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN         NetMLDP_HostGrpJoin         (NET_IF_NBR         if_nbr,
+                                                 NET_IPv6_ADDR     *p_addr,
+                                                 NET_ERR           *p_err);
+
+CPU_BOOLEAN         NetMLDP_HostGrpLeave        (NET_IF_NBR         if_nbr,
+                                                 NET_IPv6_ADDR     *p_addr,
+                                                 NET_ERR           *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void                NetMLDP_Init                (void);
+
+NET_MLDP_HOST_GRP  *NetMLDP_HostGrpJoinHandler  (      NET_IF_NBR         if_nbr,
+                                                 const NET_IPv6_ADDR     *p_addr,
+                                                       NET_ERR           *p_err);
+
+CPU_BOOLEAN         NetMLDP_HostGrpLeaveHandler (      NET_IF_NBR         if_nbr,
+                                                 const NET_IPv6_ADDR     *p_addr,
+                                                       NET_ERR           *p_err);
+
+CPU_BOOLEAN         NetMLDP_IsGrpJoinedOnIF     (      NET_IF_NBR         if_nbr,
+                                                 const NET_IPv6_ADDR     *p_addr_grp);
+
+void                NetMLDP_Rx                  (      NET_BUF           *p_buf,
+                                                       NET_BUF_HDR       *p_buf_hdr,
+                                                       NET_MLDP_V1_HDR   *p_ndp_hdr,
+                                                       NET_ERR           *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif  /* NET_MLDP_MODULE_EN       */
+#endif  /* NET_MLDP_MODULE_PRESENT  */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ndp.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ndp.c
new file mode 100644
index 0000000..0269e02
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ndp.c
@@ -0,0 +1,7882 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK NDP LAYER
+*                                    (NEIGHBOR DISCOVERY PROTOCOL)
+*
+* Filename      : net_ndp.c
+* Version       : V3.04.02
+* Programmer(s) : SL
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) Supports Neighbor Discovery Protocol as described in RFC #4861 with the
+*                     following restrictions/constraints :
+*
+*                     (a) ONLY supports the following hardware types :
+*                         (1) 48-bit Ethernet
+*
+*                     (b) ONLY supports the following protocol types :
+*                         (1) 128-bit IPv6 addresses
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    NET_NDP_MODULE
+#include  "net_ndp.h"
+#include  "net_ipv6.h"
+#include  "net_mldp.h"
+#include  "net_dad.h"
+#include  "../../IF/net_if.h"
+#include  "../../IF/net_if_802x.h"
+#include  "../../Source/net.h"
+#include  "../../Source/net_mgr.h"
+#include  "../../Source/net_util.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_NDP_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_NDP_CACHE_FLAG_ISROUTER                     DEF_BIT_00
+
+#define  NET_NDP_PREFIX_LEN_MAX                          128u
+
+#define  NET_NDP_TWO_HOURS_SEC_NBR                      7200u
+#define  NET_NDP_LIFETIME_TIMEOUT_TWO_HOURS             NET_NDP_TWO_HOURS_SEC_NBR * NET_TMR_TIME_TICK_PER_SEC
+
+#define  NET_NDP_MS_NBR_PER_SEC                         1000u
+
+#define  NET_NDP_CACHE_TX_Q_TH_MIN                         0
+#define  NET_NDP_CACHE_TX_Q_TH_MAX                       NET_BUF_NBR_MAX
+
+
+/*
+*********************************************************************************************************
+*                                    INTERFACE SELECTION DEFINES
+*
+* Notes : (1) This classification is used to found the good interface to Tx for a given destination
+*             address.
+*********************************************************************************************************
+*/
+
+#define  NET_NDP_IF_DEST_ON_LINK_WITH_SRC_ADDR_CFGD          7
+#define  NET_NDP_IF_DEST_ON_LINK                             6
+#define  NET_NDP_IF_DFLT_ROUTER_ON_LINK_WITH_SRC_ADDR_CFGD   5
+#define  NET_NDP_IF_DFLT_ROUTER_ON_LINK                      4
+#define  NET_NDP_IF_ROUTER_ON_LINK_WITH_SRC_ADDR_CFGD        3
+#define  NET_NDP_IF_ROUTER_ON_LINK                           2
+#define  NET_NDP_IF_SRC_ADDR_CFGD                            1
+#define  NET_NDP_IF_NO_MATCH                                 0
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               NDP NEIGHBOR SOLICITATION TYPE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum net_ndp_neighbor_sol_type {
+    NET_NDP_NEIGHBOR_SOL_TYPE_DAD = 1u,
+    NET_NDP_NEIGHBOR_SOL_TYPE_RES = 2u,
+    NET_NDP_NEIGHBOR_SOL_TYPE_NUD = 3u,
+} NET_NDP_NEIGHBOR_SOL_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                     NDP HEADERS OPTIONS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  net_ndp_opt_hw_addr_hdr {
+    NET_NDP_OPT_HDR  Opt;                                               /* NDP opt type and length.                     */
+    CPU_INT08U       Addr[NET_IF_HW_ADDR_LEN_MAX];                      /* NDP hw addr.                                 */
+} NET_NDP_OPT_HW_ADDR_HDR;
+
+
+typedef  struct  net_ndp_opt_prefix_info_hdr {
+    NET_NDP_OPT_HDR  Opt;                                               /* NDP opt type and length.                     */
+    CPU_INT08U       PrefixLen;                                         /* NDP opt prefix info len (in bits).           */
+    CPU_INT08U       Flags;                                             /* NDP opt prefix info flags.                   */
+    CPU_INT32U       ValidLifetime;                                     /* NDP opt prefix info valid    lifetime.       */
+    CPU_INT32U       PreferredLifetime;                                 /* NDP opt prefix info prefered lifetime.       */
+    CPU_INT32U       Reserved;
+    NET_IPv6_ADDR    Prefix;                                            /* NDP opt prefix info prefix addr.             */
+} NET_NDP_OPT_PREFIX_INFO_HDR;
+
+
+typedef  struct  net_ndp_opt_redirect_hdr {
+    NET_NDP_OPT_HDR  Opt;                                               /* NDP opt type and length.                     */
+    CPU_INT16U       Reserved1;
+    CPU_INT32U       Reserved2;
+    CPU_INT08U       Data;                                              /* NDP IP header & data.                        */
+} NET_NDP_OPT_REDIRECT_HDR;
+
+
+typedef  struct  net_ndp_opt_mtu_hdr {
+    NET_NDP_OPT_HDR  Opt;                                               /* NDP opt type and length.                     */
+    CPU_INT16U       Reserved;
+    CPU_INT32U       MTU;                                               /* NDP MTU.                                     */
+} NET_NDP_OPT_MTU_HDR;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+static  KAL_SEM_HANDLE            NetNDP_RxRouterAdvSignal[NET_IF_NBR_IF_TOT];
+#endif
+
+static  NET_NDP_NEIGHBOR_CACHE    NetNDP_NeighborCacheTbl[NET_NDP_CFG_CACHE_NBR];   /* Neighbor Cache Table.            */
+
+static  NET_NDP_ROUTER            NetNDP_RouterTbl[NET_NDP_CFG_ROUTER_NBR];         /* Routers List Table.              */
+
+static  NET_NDP_PREFIX            NetNDP_PrefixTbl[NET_NDP_CFG_PREFIX_NBR];         /* Prefix List Table.               */
+
+static  NET_NDP_DEST_CACHE        NetNDP_DestTbl[NET_NDP_CFG_DEST_NBR];             /* Destination Cache Table.         */
+
+static  NET_NDP_ROUTER           *NetNDP_DefaultRouterTbl[NET_IF_NBR_IF_TOT];       /* Default Router Table.            */
+
+                                                                                    /* Router pool variables.           */
+static  NET_NDP_ROUTER           *NetNDP_RouterPoolPtr;
+static  NET_NDP_ROUTER           *NetNDP_RouterListHead;
+static  NET_NDP_ROUTER           *NetNDP_RouterListTail;
+static  NET_STAT_POOL             NetNDP_RouterPoolStat;
+
+static  NET_NDP_PREFIX           *NetNDP_PrefixPoolPtr;
+static  NET_NDP_PREFIX           *NetNDP_PrefixListHead;
+static  NET_NDP_PREFIX           *NetNDP_PrefixListTail;
+static  NET_STAT_POOL             NetNDP_PrefixPoolStat;
+
+static  NET_NDP_DEST_CACHE       *NetNDP_DestPoolPtr;
+static  NET_NDP_DEST_CACHE       *NetNDP_DestListHead;
+static  NET_NDP_DEST_CACHE       *NetNDP_DestListTail;
+static  NET_STAT_POOL             NetNDP_DestPoolStat;
+
+static  CPU_INT16U                NetNDP_ReachableTimeout_sec;
+static  NET_TMR_TICK              NetNDP_ReachableTimeout_tick;
+
+static  CPU_INT08U                NetNDP_SolicitMaxAttempsMulticast_nbr;    /* NDP mcast   solicit. max attempts nbr.   */
+static  CPU_INT08U                NetNDP_SolicitMaxAttempsUnicast_nbr;      /* NDP unicast solicit. max attempts nbr.   */
+static  CPU_INT08U                NetNDP_SolicitTimeout_sec;                /* NDP solicitations timeout (in secs ).    */
+static  NET_TMR_TICK              NetNDP_SolicitTimeout_tick;               /* NDP solicitations timeout (in ticks).    */
+
+#ifdef NET_DAD_MODULE_EN
+static  CPU_INT08U                NetNDP_DADMaxAttempts_nbr;
+#endif
+
+static  NET_BUF_QTY               NetNDP_CacheTxQ_MaxTh_nbr;            /* Max nbr tx bufs to enqueue    on NDP cache.  */
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void                 NetNDP_RxRouterAdvertisement    (const  NET_BUF                    *p_buf,
+                                                                     NET_BUF_HDR                *p_buf_hdr,
+                                                              const  NET_NDP_ROUTER_ADV_HDR     *p_ndp_hdr,
+                                                                     NET_ERR                    *p_err);
+
+static  void                 NetNDP_RxNeighborSolicitation   (const  NET_BUF                    *p_buf,
+                                                                     NET_BUF_HDR                *p_buf_hdr,
+                                                              const  NET_NDP_NEIGHBOR_SOL_HDR   *p_ndp_hdr,
+                                                                     NET_ERR                    *p_err);
+
+static  void                 NetNDP_RxNeighborAdvertisement  (const  NET_BUF                    *p_buf,
+                                                                     NET_BUF_HDR                *p_buf_hdr,
+                                                              const  NET_NDP_NEIGHBOR_ADV_HDR   *p_ndp_hdr,
+                                                                     NET_ERR                    *p_err);
+
+static  void                 NetNDP_RxRedirect               (const  NET_BUF                    *p_buf,
+                                                                     NET_BUF_HDR                *p_buf_hdr,
+                                                              const  NET_NDP_REDIRECT_HDR       *p_ndp_hdr,
+                                                                     NET_ERR                    *p_err);
+
+static  void                 NetNDP_RxPrefixUpdate           (       NET_IF_NBR                  if_nbr,
+                                                                     NET_IPv6_ADDR              *p_addr_prefix,
+                                                                     CPU_INT08U                  prefix_len,
+                                                                     CPU_BOOLEAN                 on_link,
+                                                                     CPU_BOOLEAN                 addr_cfg_auto,
+                                                                     CPU_INT32U                  lifetime_valid,
+                                                                     CPU_INT32U                  lifetime_preferred,
+                                                                     NET_ERR                    *p_err);
+
+static  void                 NetNDP_RxPrefixHandler          (       NET_IF_NBR                  if_nbr,
+                                                              const  NET_IPv6_ADDR              *p_addr_prefix,
+                                                                     CPU_INT08U                  prefix_len,
+                                                                     CPU_INT32U                  lifetime_valid,
+                                                                     CPU_BOOLEAN                 on_link,
+                                                                     CPU_BOOLEAN                 addr_cfg_auto,
+                                                                     NET_ERR                    *p_err);
+
+static  CPU_BOOLEAN          NetNDP_RxPrefixAddrsUpdate      (       NET_IF_NBR                  if_nbr,
+                                                                     NET_IPv6_ADDR              *p_addr_prefix,
+                                                                     CPU_INT08U                  prefix_len,
+                                                                     CPU_INT32U                  lifetime_valid,
+                                                                     CPU_INT32U                  lifetime_preferred);
+
+static  void                 NetNDP_TxNeighborSolicitation   (       NET_IF_NBR                  if_nbr,
+                                                                     NET_IPv6_ADDR              *p_addr_src,
+                                                                     NET_IPv6_ADDR              *p_addr_dest,
+                                                                     NET_NDP_NEIGHBOR_SOL_TYPE   ndp_sol_type,
+                                                                     NET_ERR                    *p_err);
+
+static  CPU_BOOLEAN          NetNDP_IsPrefixCfgdOnAddr       (       NET_IPv6_ADDR              *p_addr,
+                                                                     NET_IPv6_ADDR              *p_addr_prefix,
+                                                                     CPU_INT08U                  p_refix_len);
+
+static  NET_NDP_ROUTER      *NetNDP_UpdateDefaultRouter      (       NET_IF_NBR                  if_nbr,
+                                                                     NET_ERR                    *p_err);
+
+static  void                 NetNDP_UpdateDestCache          (       NET_IF_NBR                  if_nbr,
+                                                              const  CPU_INT08U                 *p_addr,
+                                                              const  CPU_INT08U                 *p_addr_new);
+
+static  void                 NetNDP_RemoveAddrDestCache      (       NET_IF_NBR                  if_nbr,
+                                                              const  CPU_INT08U                 *p_addr);
+
+static  void                 NetNDP_RemovePrefixDestCache    (       NET_IF_NBR                  if_nbr,
+                                                              const  CPU_INT08U                 *p_prefix,
+                                                                     CPU_INT08U                  prefix_len);
+
+static  void                 NetNDP_NeighborCacheAddPend     (const  NET_BUF                    *p_buf,
+                                                                     NET_BUF_HDR                *p_buf_hdr,
+                                                              const  CPU_INT08U                 *p_addr_protocol,
+                                                                     NET_ERR                    *p_err);
+
+static  NET_CACHE_ADDR_NDP  *NetNDP_NeighborCacheAddEntry    (       NET_IF_NBR                  if_nbr,
+                                                              const  CPU_INT08U                 *p_addr_hw,
+                                                              const  CPU_INT08U                 *p_addr_ipv6,
+                                                              const  CPU_INT08U                 *p_addr_ipv6_sender,
+                                                                     NET_TMR_TICK                timeout_tick,
+                                                                     CPU_FNCT_PTR                timeout_fnct,
+                                                                     CPU_INT08U                  cache_state,
+                                                                     CPU_BOOLEAN                 is_router,
+                                                                     NET_ERR                    *p_err);
+
+static  void                 NetNDP_NeighborCacheUpdateEntry (       NET_CACHE_ADDR_NDP         *p_cache_addr_ndp,
+                                                                     CPU_INT08U                 *p_ndp_opt_hw_addr);
+
+static  void                 NetNDP_NeighborCacheRemoveEntry (       NET_NDP_NEIGHBOR_CACHE     *p_cache,
+                                                                     CPU_BOOLEAN                 tmr_free);
+
+static  CPU_BOOLEAN          NetNDP_RouterDfltGet            (       NET_IF_NBR                  if_nbr,
+                                                                     NET_NDP_ROUTER            **p_router,
+                                                                     NET_ERR                    *p_err);
+
+static  NET_NDP_ROUTER      *NetNDP_RouterCfg                (       NET_IF_NBR                  if_nbr,
+                                                                     NET_IPv6_ADDR              *p_addr,
+                                                                     CPU_BOOLEAN                 timer_en,
+                                                                     CPU_FNCT_PTR                timeout_fnct,
+                                                                     NET_TMR_TICK                timeout_tick,
+                                                                     NET_ERR                    *p_err);
+
+static  NET_NDP_ROUTER      *NetNDP_RouterGet                (       NET_ERR                    *p_err);
+
+static  NET_NDP_ROUTER      *NetNDP_RouterSrch               (       NET_IF_NBR                  if_nbr,
+                                                                     NET_IPv6_ADDR              *p_addr,
+                                                                     NET_ERR                    *p_err);
+
+static  void                 NetNDP_RouterRemove             (       NET_NDP_ROUTER             *p_router,
+                                                                     CPU_BOOLEAN                 tmr_free);
+
+static  void                 NetNDP_RouterClr                (       NET_NDP_ROUTER             *p_router);
+
+static  NET_NDP_PREFIX      *NetNDP_PrefixSrchMatchAddr      (       NET_IF_NBR                  if_nbr,
+                                                              const  NET_IPv6_ADDR              *p_addr,
+                                                                     NET_ERR                    *p_err);
+
+static  NET_NDP_PREFIX      *NetNDP_PrefixCfg                (       NET_IF_NBR                  if_nbr,
+                                                              const  NET_IPv6_ADDR              *p_addr_prefix,
+                                                                     CPU_INT08U                  prefix_len,
+                                                                     CPU_BOOLEAN                 timer_en,
+                                                                     CPU_FNCT_PTR                timeout_fnct,
+                                                                     NET_TMR_TICK                timeout_tick,
+                                                                     NET_ERR                    *p_err);
+
+static  NET_NDP_PREFIX      *NetNDP_PrefixSrch               (       NET_IF_NBR                  if_nbr,
+                                                              const  NET_IPv6_ADDR              *p_addr,
+                                                                     NET_ERR                    *p_err);
+
+static  NET_NDP_PREFIX      *NetNDP_PrefixGet                (       NET_ERR                    *p_err);
+
+static  void                 NetNDP_PrefixRemove             (       NET_NDP_PREFIX             *p_prefix,
+                                                                     CPU_BOOLEAN                 tmr_free);
+
+static  void                 NetNDP_PrefixClr                (       NET_NDP_PREFIX             *p_prefix);
+
+static  NET_NDP_DEST_CACHE  *NetNDP_DestCacheCfg             (       NET_IF_NBR                  if_nbr,
+                                                              const  NET_IPv6_ADDR              *p_addr_dest,
+                                                              const  NET_IPv6_ADDR              *p_addr_next_hop,
+                                                                     CPU_BOOLEAN                 is_valid,
+                                                                     CPU_BOOLEAN                 on_link,
+                                                                     NET_ERR                    *p_err);
+
+static  NET_NDP_DEST_CACHE  *NetNDP_DestCacheGet             (       NET_ERR                    *p_err);
+
+static  NET_NDP_DEST_CACHE  *NetNDP_DestCacheSrch            (       NET_IF_NBR                  if_nbr,
+                                                              const  NET_IPv6_ADDR              *p_addr,
+                                                                     NET_ERR                    *p_err);
+
+static  NET_NDP_DEST_CACHE  *NetNDP_DestCacheSrchInvalid     (       NET_ERR                    *p_err);
+
+static  void                 NetNDP_DestCacheRemove          (       NET_NDP_DEST_CACHE         *p_dest);
+
+static  void                 NetNDP_DestCacheClr             (       NET_NDP_DEST_CACHE         *p_dest);
+
+static  CPU_BOOLEAN          NetNDP_IsAddrOnLink             (       NET_IF_NBR                  if_nbr,
+                                                              const  NET_IPv6_ADDR              *p_addr);
+
+static  void                 NetNDP_SolicitTimeout           (       void                       *p_cache_timeout);
+
+static  void                 NetNDP_ReachableTimeout         (       void                       *p_cache_timeout);
+
+
+static  void                 NetNDP_RouterTimeout            (       void                       *p_router_timeout);
+
+static  void                 NetNDP_PrefixTimeout            (       void                       *p_prefix_timeout);
+
+
+#ifdef  NET_DAD_MODULE_EN
+static  void                 NetNDP_DAD_Timeout              (       void                       *p_cache_timeout);
+#endif
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+static  void                 NetNDP_RouterAdvSignalPost      (       NET_IF_NBR                  if_nbr,
+                                                                     NET_ERR                    *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             NetNDP_Init()
+*
+* Description : (1) Initialize Neighbor Discovery Protocol Layer :
+*
+*                   (a) Initialize NDP DAD signals.
+*                   (b) Initialize NDP address cache pool.
+*                   (c) Initialize NDP neighbor cache table.
+*                   (d) Initialize NDP address cache.
+*                   (e) Initialize NDP address cache list pointers.
+*                   (f) Initialize NDP router table.
+*                   (g) Initialize NDP router list pointers.
+*                   (h) Initialize NDP prefix table.
+*                   (i) Initialize NDP prefix list pointers.
+*                   (j) Initialize NDP destination cache table.
+*                   (k) Initialize NDP destination cache list pointers.
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetNDP_Init (NET_ERR  *p_err)
+{
+    NET_NDP_NEIGHBOR_CACHE      *p_cache;
+    NET_NDP_ROUTER              *p_router;
+    NET_NDP_PREFIX              *p_prefix;
+    NET_NDP_DEST_CACHE          *p_dest;
+    NET_NDP_CACHE_QTY            i;
+
+
+                                                                /* ------------ INIT RX ROUTER ADV SIGNAL ------------- */
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    for (i = 0; i < NET_IF_NBR_IF_TOT; i++) {
+        NetNDP_RxRouterAdvSignal[i].SemObjPtr = DEF_NULL;
+    }
+#endif
+
+                                                                /* ------------ INIT NDP CACHE POOL/STATS ------------- */
+    NetCache_AddrNDP_PoolPtr = DEF_NULL;                        /* Init-clr NDP addr. cache pool (see Note #2b).        */
+
+    NetStat_PoolInit(&NetCache_AddrNDP_PoolStat,
+                      NET_NDP_CFG_CACHE_NBR,
+                      p_err);
+
+                                                                /* ------------ INIT NDP NEIGHBOR CACHE TBL ----------- */
+    p_cache = &NetNDP_NeighborCacheTbl[0];
+    for (i = 0u; i < NET_NDP_CFG_CACHE_NBR; i++) {
+        p_cache->Type           =  NET_CACHE_TYPE_NDP;
+        p_cache->CacheAddrPtr   = &NetCache_AddrNDP_Tbl[i];     /* Init each NDP addr cache ptr.                        */
+        p_cache->ReqAttemptsCtr =  0u;
+        p_cache->State          =  NET_NDP_CACHE_STATE_NONE;    /* Init each NDP cache as free/NOT used.                */
+        p_cache->Flags          =  NET_CACHE_FLAG_NONE;
+
+        NetCache_Init((NET_CACHE_ADDR *)p_cache,                /* Init each NDP addr cache.                            */
+                      (NET_CACHE_ADDR *)p_cache->CacheAddrPtr,
+                                        p_err);
+        p_cache++;
+    }
+
+
+                                                                /* ------------- INIT NDP CACHE LIST PTRS ------------- */
+    NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_NDP] = DEF_NULL;
+    NetCache_AddrListTail[NET_CACHE_ADDR_LIST_IX_NDP] = DEF_NULL;
+
+
+                                                                /* ------------ INIT NDP ROUTER POOL/STATS ------------- */
+    NetStat_PoolInit(&NetNDP_RouterPoolStat,
+                      NET_NDP_CFG_ROUTER_NBR,
+                      p_err);
+
+                                                                /* ---------------- INIT ROUTER TABLE ----------------- */
+    p_router = &NetNDP_RouterTbl[0];
+    for (i = 0u; i < NET_NDP_CFG_ROUTER_NBR; i++) {
+        p_router->IF_Nbr  = NET_IF_NBR_NONE;
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        Mem_Clr((void     *)&p_router->Addr,
+                (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+#endif
+
+        p_router->TmrPtr       = DEF_NULL;
+        p_router->NDP_CachePtr = DEF_NULL;
+        p_router->NextPtr      = NetNDP_RouterPoolPtr;          /* Free Router to Router pool (see Note #2).            */
+        NetNDP_RouterPoolPtr   = p_router;
+        p_router++;
+    }
+
+                                                                /* -------------- INIT ROUTER LIST PTRS --------------- */
+    NetNDP_RouterListHead = DEF_NULL;
+    NetNDP_RouterListTail = DEF_NULL;
+
+
+                                                                /* ------------ INIT NDP PREFIX POOL/STATS ------------ */
+    NetStat_PoolInit(&NetNDP_PrefixPoolStat,
+                      NET_NDP_CFG_PREFIX_NBR,
+                      p_err);
+
+
+                                                                /* ---------------- INIT PREFIX TABLE ----------------- */
+    p_prefix = &NetNDP_PrefixTbl[0];
+    for (i = 0u; i < NET_NDP_CFG_PREFIX_NBR; i++) {
+
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        Mem_Clr((void     *)&p_prefix->Prefix,
+                (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+#endif
+        p_prefix->IF_Nbr     = NET_IF_NBR_NONE;
+        p_prefix->TmrPtr     = DEF_NULL;
+        p_prefix->NextPtr    = NetNDP_PrefixPoolPtr;            /* Free Prefix to Prefix pool.                          */
+        NetNDP_PrefixPoolPtr = p_prefix;
+        p_prefix++;
+    }
+
+
+                                                                /* -------------- INIT PREFIX LIST PTRS --------------- */
+    NetNDP_PrefixListHead = DEF_NULL;
+    NetNDP_PrefixListTail = DEF_NULL;
+
+                                                                /* --------- INIT NDP DESTINATION POOL/STATS ---------- */
+    NetStat_PoolInit(&NetNDP_DestPoolStat,
+                      NET_NDP_CFG_DEST_NBR,
+                      p_err);
+
+                                                                /* -------------- INIT DESTINATION TABLE -------------- */
+    p_dest = &NetNDP_DestTbl[0];
+    for (i = 0u; i < NET_NDP_CFG_DEST_NBR; i++) {
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        Mem_Clr((void     *)&p_dest->AddrDest,
+                (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+
+        Mem_Clr((void     *)&p_dest->AddrNextHop,
+                (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+#endif
+        p_dest->IF_Nbr     = NET_IF_NBR_NONE;
+        p_dest->OnLink     = DEF_NO;
+        p_dest->IsValid    = DEF_NO;
+        p_dest->NextPtr    = NetNDP_DestPoolPtr;                /* Free Destination Cache to Destination Cache pool.    */
+        NetNDP_DestPoolPtr = p_dest;
+        p_dest++;
+    }
+
+                                                                /* ------------ INIT DESTINATION LIST PTRS ------------ */
+    NetNDP_DestListHead = DEF_NULL;
+    NetNDP_DestListTail = DEF_NULL;
+
+
+   *p_err = NET_NDP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetNDP_NeighborCacheHandler()
+*
+* Description : (1) Resolve destination hardware address using NDP :
+*
+*                   (a) Search NDP Cache List for NDP cache with corresponding protocol address.
+*                   (b) If NDP cache found, handle packet based on NDP cache state :
+*
+*                       (1) INCOMPLETE  -> Enqueue transmit packet buffer to NDP cache
+*                       (2) REACHABLE   -> Copy NDP cache's hardware address to data packet;
+*                                          Return to Network Interface to transmit data packet
+*
+*                   (c) If NDP cache NOT found, allocate new NDP cache in 'INCOMPLETE' state (see Note #1b1)
+*
+*                       See 'net_cache.h  CACHE STATES' for cache state diagram.
+*
+*               (2) This NDP cache handler function assumes the following :
+*
+*                   (a) ALL NDP caches in the NDP Cache List are valid. [validated by NetCache_AddrGet()]
+*                   (b) ANY NDP cache in the 'INCOMPLETE' state MAY have already enqueued at LEAST one
+*                           transmit packet buffer when NDP cache allocated. [see NetCache_AddrGet()]
+*                   (c) ALL NDP caches in the 'REACHABLE' state have valid hardware addresses.
+*                   (d) ALL transmit buffers enqueued on any NDP cache are valid.
+*                   (e) Buffer's NDP address pointers pre-configured by Network Interface to point to :
+*
+*                       (1) 'NDP_AddrProtocolPtr'               Pointer to the protocol address used to
+*                                                                   resolve the hardware address
+*                       (2) 'NDP_AddrHW_Ptr'                    Pointer to memory buffer to return the
+*                                                                   resolved hardware address
+*                       (3) NDP addresses                       Which MUST be in network-order
+*
+*
+* Argument(s) : p_buf       Pointer to network buffer to transmit.
+*               -----       Argument checked by caller(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NEIGHBOR_CACHE_PEND         NDP neighbor cache in pending state.
+*                               NET_NDP_ERR_NEIGHBOR_CACHE_RESOLVED     NDP neighbor cache resolved.
+*                               NET_NDP_ERR_NEIGHBOR_CACHE_STALE        NDP neighbor cache in stale state.
+*                               NET_NDP_ERR_FAULT                       NDP error fault.
+*                               NET_ERR_FAULT_NULL_PTR                  Argument passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_802x_Tx().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (3) Since the primary tasks of the network protocol suite are prevented from running
+*                   concurrently (see 'net.h  Note #3'), it is NOT necessary to protect the shared
+*                   resources of the NDP Cache List since no asynchronous access from other network
+*                   tasks is possible.
+*
+*               (4) (a) RFC #4861, Section 7.2.2 states that :
+*
+*                       (1) "While waiting for address resolution to complete, the sender MUST,
+*                            for each neighbor, retain a small queue of packets waiting for
+*                            address resolution to complete.  The queue MUST hold at least one
+*                            packet, and MAY contain more. ... Once address resolution completes,
+*                            the node transmits any queued packets."
+*
+*                   (b) Since NDP Layer is the last layer to handle & queue the transmit network
+*                       buffer, it is NOT necessary to increment the network buffer's reference
+*                       counter to include the pending NDP cache buffer queue as a new reference
+*                       to the network buffer.
+*
+*               (5) Some buffer controls were previously initialized in NetBuf_Get() when the packet
+*                   was received at the network interface layer. These buffer controls do NOT need
+*                   to be re-initialized but are shown for completeness.
+*
+*               (6) A resolved multicast address still remains resolved even if any error(s) occur
+*                   while adding it to the NDP cache.
+*********************************************************************************************************
+*/
+
+void   NetNDP_NeighborCacheHandler (const  NET_BUF  *p_buf,
+                                           NET_ERR  *p_err)
+{
+#ifdef  NET_MCAST_MODULE_EN
+    NET_IF_NBR               if_nbr;
+    NET_PROTOCOL_TYPE        protocol_type_net;
+    CPU_BOOLEAN              addr_protocol_multicast;
+    CPU_INT08U               addr_hw_len;
+#endif
+    NET_BUF_HDR             *p_buf_hdr;
+    CPU_INT08U              *p_addr_hw;
+    CPU_INT08U              *p_addr_protocol;
+    NET_BUF_HDR             *p_tail_buf_hdr;
+    NET_BUF                 *p_tail_buf;
+    NET_CACHE_ADDR_NDP      *p_cache_addr_ndp;
+    NET_ICMPv6_HDR          *p_icmp_hdr;
+    NET_NDP_NEIGHBOR_CACHE  *p_cache;
+    NET_TMR_TICK             timeout_tick;
+    CPU_INT08U               cache_state;
+    NET_BUF_QTY              buf_max_th;
+    CPU_SR_ALLOC();
+
+
+                                                                /* ------------------- VALIDATE PTRS ------------------ */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_buf == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_buf_hdr       = (NET_BUF_HDR *)&p_buf->Hdr;
+    p_addr_hw       =                 p_buf_hdr->NDP_AddrHW_Ptr;
+    p_addr_protocol =                 p_buf_hdr->NDP_AddrProtocolPtr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_hw == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+    if (p_addr_protocol == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    if_nbr = p_buf_hdr->IF_Nbr;
+
+                                                                /* ------- VALIDATE IF PACKET IS OF ICMPv6 TYPE ------- */
+    if (p_buf_hdr->ICMP_MsgIx != NET_BUF_IX_NONE) {
+        p_icmp_hdr = (NET_ICMPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->ICMP_MsgIx];
+    } else {
+        p_icmp_hdr = (NET_ICMPv6_HDR *)0;
+    }
+
+                                                                /* ------------------ SRCH NDP CACHE ------------------ */
+    p_cache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrSrch(NET_CACHE_TYPE_NDP,
+                                                               if_nbr,
+                                                               p_addr_protocol,
+                                                               NET_IPv6_ADDR_SIZE,
+                                                               p_err);
+    switch (*p_err) {
+        case NET_CACHE_ERR_NOT_FOUND:
+        case NET_CACHE_ERR_RESOLVED:
+        case NET_CACHE_ERR_PEND:
+             break;
+
+
+        case NET_CACHE_ERR_INVALID_ADDR_PROTO_LEN:
+        case NET_CACHE_ERR_INVALID_TYPE:
+        default:
+            *p_err = NET_NDP_ERR_FAULT;
+             goto exit;
+    }
+
+    if (p_cache_addr_ndp != (NET_CACHE_ADDR_NDP *)0) {           /* If NDP cache found, chk state.                       */
+        p_cache     = (NET_NDP_NEIGHBOR_CACHE *) p_cache_addr_ndp->ParentPtr;
+        cache_state = p_cache->State;
+        switch (cache_state) {
+            case NET_NDP_CACHE_STATE_INCOMPLETE:                /* If NDP cache pend, append buf into Q (see Note #4a1).*/
+                 CPU_CRITICAL_ENTER();
+                 buf_max_th = NetNDP_CacheTxQ_MaxTh_nbr;
+                 CPU_CRITICAL_EXIT();
+
+                 if (p_cache_addr_ndp->TxQ_Nbr >= buf_max_th) {
+                    *p_err = NET_CACHE_ERR_UNRESOLVED;
+                     return;
+                 }
+
+                 p_tail_buf = p_cache_addr_ndp->TxQ_Tail;
+                 if (p_tail_buf != (NET_BUF *)0) {              /* If Q NOT empty,    append buf @ Q tail.              */
+                     p_tail_buf_hdr                 = &p_tail_buf->Hdr;
+                     p_tail_buf_hdr->NextSecListPtr = (NET_BUF *)p_buf;
+                     p_buf_hdr->PrevSecListPtr      = (NET_BUF *)p_tail_buf;
+                     p_cache_addr_ndp->TxQ_Tail     = (NET_BUF *)p_buf;
+
+                 } else {                                       /* Else add buf as first q'd buf.                       */
+                     p_cache_addr_ndp->TxQ_Head     = (NET_BUF *)p_buf;
+                     p_cache_addr_ndp->TxQ_Tail     = (NET_BUF *)p_buf;
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #5].                */
+                     p_buf_hdr->PrevSecListPtr      = (NET_BUF *)0;
+                     p_buf_hdr->NextSecListPtr      = (NET_BUF *)0;
+#endif
+                 }
+                                                                /* Cfg buf's unlink fnct/obj to NDP cache.              */
+                 p_buf_hdr->UnlinkFnctPtr = (NET_BUF_FNCT)&NetCache_UnlinkBuf;
+                 p_buf_hdr->UnlinkObjPtr  = (void       *) p_cache_addr_ndp;
+
+                *p_err                    =  NET_NDP_ERR_NEIGHBOR_CACHE_PEND;
+                 goto exit;
+
+
+            case NET_NDP_CACHE_STATE_REACHABLE:                 /* If NDP cache REACHABLE, copy hw addr.                 */
+                *p_err = NET_NDP_ERR_NEIGHBOR_CACHE_RESOLVED;
+                 goto exit_mem_copy;
+
+
+            case NET_NDP_CACHE_STATE_STALE:
+            case NET_NDP_CACHE_STATE_DLY:
+                 if (p_icmp_hdr != (NET_ICMPv6_HDR *)0) {
+                     if (p_icmp_hdr->Type != NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_ADV) {
+                         p_cache->State = NET_NDP_CACHE_STATE_DLY;
+                         CPU_CRITICAL_ENTER();
+                         timeout_tick = NetNDP_DelayTimeout_tick;
+                         CPU_CRITICAL_EXIT();
+                         NetTmr_Set(p_cache->TmrPtr,
+                                    NetNDP_DelayTimeout,
+                                    timeout_tick,
+                                    p_err);
+                         if (*p_err != NET_TMR_ERR_NONE) {
+                              p_cache->State = NET_NDP_CACHE_STATE_STALE;
+                         }
+                     }
+                 }
+                *p_err = NET_NDP_ERR_NEIGHBOR_CACHE_STALE;
+                 goto exit_mem_copy;
+
+
+            case NET_NDP_CACHE_STATE_PROBE:
+                *p_err = NET_NDP_ERR_NEIGHBOR_CACHE_STALE;
+                 goto exit_mem_copy;
+
+
+            default:
+                 NetNDP_NeighborCacheRemoveEntry(p_cache, DEF_YES);
+                 NetNDP_NeighborCacheAddPend(p_buf, p_buf_hdr, p_addr_protocol, p_err);
+                 if (*p_err != NET_NDP_ERR_NEIGHBOR_CACHE_PEND) {
+                     *p_err = NET_NDP_ERR_FAULT;
+                      goto exit;
+                 }
+                *p_err = NET_NDP_ERR_NEIGHBOR_CACHE_PEND;
+                 goto exit;
+        }
+
+    } else {
+#ifdef  NET_MCAST_MODULE_EN
+        protocol_type_net       = p_buf_hdr->ProtocolHdrTypeNet;
+        addr_protocol_multicast = NetMgr_IsAddrProtocolMulticast(protocol_type_net,
+                                                                 p_addr_protocol,
+                                                                 NET_IPv6_ADDR_SIZE);
+
+        if (addr_protocol_multicast == DEF_YES) {               /* If multicast protocol addr,      ...                 */
+            addr_hw_len = NET_IF_HW_ADDR_LEN_MAX;
+                                                                /* ... convert to multicast hw addr ...                 */
+            NetIF_AddrMulticastProtocolToHW(if_nbr,
+                                            p_addr_protocol,
+                                            NET_IPv6_ADDR_SIZE,
+                                            protocol_type_net,
+                                            p_addr_hw,
+                                           &addr_hw_len,
+                                            p_err);
+            if (*p_err != NET_IF_ERR_NONE) {
+                *p_err  = NET_NDP_ERR_FAULT;
+                 goto exit;
+            }
+
+           *p_err = NET_NDP_ERR_NEIGHBOR_CACHE_RESOLVED;        /* Rtn resolved multicast hw addr (see Note #6).        */
+            goto exit;
+        }
+#endif
+        NetNDP_NeighborCacheAddPend(p_buf, p_buf_hdr, p_addr_protocol, p_err);
+        if (*p_err != NET_NDP_ERR_NEIGHBOR_CACHE_PEND) {
+            *p_err  = NET_NDP_ERR_FAULT;
+             goto exit;
+        }
+
+       *p_err = NET_NDP_ERR_NEIGHBOR_CACHE_PEND;
+        goto exit;
+    }
+
+
+exit_mem_copy:
+    Mem_Copy(p_addr_hw,
+             p_cache_addr_ndp->AddrHW,
+             NET_IF_HW_ADDR_LEN_MAX);
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                              NetNDP_Rx()
+*
+* Description : (1) Process received NDP packets :
+*
+*                   (a) Demultiplex received ICMPv6 packet according to the ICMPv6/NDP Type.
+*                   (b) Update receive statistics
+*
+* Argument(s) : p_buf       Pointer to network buffer that received the NDP packet.
+*               -----       Argument checked by caller(s).
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               ---------   Argument checked by caller(s).
+*
+*               p_icmp_hdr  Pointer to received packet's ICMP header.
+*               ----------  Argument validated by caller(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_INVALID_TYPE        ICMPv6 Type is not a NDP valid type.
+*
+*                               ------------- RETURNED BY NetNDP_RxRouterAdvertisement() -------------
+*                               See NetNDP_RxRouterAdvertisement() for additional return error codes.
+*
+*                               ------------ RETURNED BY NetNDP_RxNeighborSolicitation() -------------
+*                               See NetNDP_RxNeighborSolicitation() for additional return error codes.
+*
+*                               ------------ RETURNED BY NetNDP_RxNeighborAdvertisement() ------------
+*                               See NetNDP_RxNeighborAdvertisement() for additional return error codes.
+*
+*                               ------------------ RETURNED BY NetNDP_RxRedirect() -------------------
+*                               See NetNDP_RxRedirect() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetICMPv6_Rx().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetNDP_Rx (const  NET_BUF         *p_buf,
+                        NET_BUF_HDR     *p_buf_hdr,
+                 const  NET_ICMPv6_HDR  *p_icmp_hdr,
+                        NET_ERR         *p_err)
+{
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTRS ------------------ */
+    if (p_buf_hdr == (NET_BUF_HDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (p_icmp_hdr == (NET_ICMPv6_HDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.ICMPv6.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+    switch (p_icmp_hdr->Type) {
+        case NET_ICMPv6_MSG_TYPE_NDP_ROUTER_ADV:
+             NetNDP_RxRouterAdvertisement(                          p_buf,
+                                                                    p_buf_hdr,
+                                          (NET_NDP_ROUTER_ADV_HDR *)p_icmp_hdr,
+                                                                    p_err);
+             NET_CTR_STAT_INC(Net_StatCtrs.NDP.RxMsgAdvRouterCtr);
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL:
+             NetNDP_RxNeighborSolicitation(                            p_buf,
+                                                                       p_buf_hdr,
+                                           (NET_NDP_NEIGHBOR_SOL_HDR *)p_icmp_hdr,
+                                                                       p_err);
+             NET_CTR_STAT_INC(Net_StatCtrs.NDP.RxMsgSolNborCtr);
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_ADV:
+             NetNDP_RxNeighborAdvertisement(                                 p_buf,
+                                                                             p_buf_hdr,
+                                           (const NET_NDP_NEIGHBOR_ADV_HDR *)p_icmp_hdr,
+                                                                             p_err);
+             NET_CTR_STAT_INC(Net_StatCtrs.NDP.RxMsgAdvNborCtr);
+             break;
+
+
+        case NET_ICMPv6_MSG_TYPE_NDP_REDIRECT:
+             NetNDP_RxRedirect(                        p_buf,
+                                                       p_buf_hdr,
+                               (NET_NDP_REDIRECT_HDR *)p_icmp_hdr,
+                                                       p_err);
+             NET_CTR_STAT_INC(Net_StatCtrs.NDP.RxMsgRedirectCtr);
+             break;
+
+
+        default:
+            *p_err = NET_NDP_ERR_INVALID_TYPE;
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetNDP_TxRouterSolicitation()
+*
+* Description : (1) Transmit router solicitation message:
+*
+*                   (a) Set IPv6 source      address. See Note #2.
+*                   (b) Set IPv6 destination address as the multicast all-routers address.
+*                   (c) Transmit ICMP message.
+*
+*
+* Argument(s) : if_nbr      Network interface number to transmit Router Solicitation message.
+*
+*               p_addr_src  Pointer to IPv6 source address (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                               --- RETURNED BY NetICMPv6_HandlerTxMsgReq() : ---
+*                               NET_ICMPv6_ERR_NONE             ICMPv6 Request Message successfully transmitted.
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_ERR_TX                      Transmit error; packet discarded.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AutoConfig functions.
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (2) If IPv6 source address pointer is NULL, the unspecified address will be used.
+*********************************************************************************************************
+*/
+
+void  NetNDP_TxRouterSolicitation (NET_IF_NBR      if_nbr,
+                                   NET_IPv6_ADDR  *p_addr_src,
+                                   NET_ERR        *p_err)
+{
+    NET_IPv6_ADDR   addr_all_routers_mcast;
+    NET_IPv6_ADDR   addr_unspecified;
+    NET_IPv6_ADDR  *p_ndp_addr_src;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    (void)NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+                                                                /* ---------------- VALIDATE POINTERS ----------------- */
+    if (p_addr_src == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* ---------------- SET SOURCE ADDRESS ---------------- */
+    p_ndp_addr_src = p_addr_src;
+    if (p_ndp_addr_src == (NET_IPv6_ADDR *)0) {
+        NetIPv6_AddrUnspecifiedSet(&addr_unspecified, p_err);
+        p_ndp_addr_src = &addr_unspecified;
+    }
+
+                                                                /* -------------- SET DESTINATION ADDRESS ------------- */
+    NetIPv6_AddrMcastAllRoutersSet(&addr_all_routers_mcast, DEF_NO, p_err);
+
+                                                                /* ------------ TX NDP ROUTER SOLICITATION ------------ */
+                                                                /* Tx router solicitation.                              */
+   (void)NetICMPv6_TxMsgReqHandler(if_nbr,
+                                   NET_ICMPv6_MSG_TYPE_NDP_ROUTER_SOL,
+                                   NET_ICMPv6_MSG_CODE_NDP_ROUTER_SOL,
+                                   0u,
+                                   p_ndp_addr_src,
+                                  &addr_all_routers_mcast,
+                                   NET_IPv6_HDR_HOP_LIM_MAX,
+                                   DEF_NO,
+                                   DEF_NULL,
+                                   0,
+                                   0,
+                                   p_err);
+   if (*p_err != NET_ICMPv6_ERR_NONE) {
+       *p_err = NET_NDP_ERR_TX;
+        return;
+   }
+
+  *p_err = NET_NDP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_NextHopByIF()
+*
+* Description : Find Next Hop for the given destination address and interface.
+*               Add new Destination cache if none present.
+*
+* Argument(s) : if_nbr          Interface number on which packet will be send.
+*
+*               p_addr_dest     Pointer to IPv6 destination address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_TX_DEST_HOST_THIS_NET    Destination is on same link.
+*                               NET_IPv6_ERR_TX_DFLT_GATEWAY          Next-hop is the default router.
+*                               NET_IPv6_ERR_TX_DFLT_GATEWAY_NONE     Next-hop is a router in the router list.
+*                               NET_IPv6_ERR_TX_NEXT_HOP_NONE         No next-hop is available.
+*
+*                               --------- RETURNED BY NetIF_IsValidCfgdHandler() ---------
+*                               See NetIF_IsValidCfgdHandler() for additional error codes.
+*
+* Return(s)   : Pointer to the next-hop ipv6 address
+*
+* Caller(s)   : NetIPv6_GetAddrSrcHandler(),
+*               NetIPv6_TxPktDatagramRouteSel().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) The interface number given is assumed to be the good interface to used to reach
+*                   the destination.
+*
+*               (2) Use function NetNDP_NextHop() when interface is unknown.
+*********************************************************************************************************
+*/
+
+const  NET_IPv6_ADDR  *NetNDP_NextHopByIF (       NET_IF_NBR      if_nbr,
+                                           const  NET_IPv6_ADDR  *p_addr_dest,
+                                                  NET_ERR        *p_err)
+{
+    NET_NDP_DEST_CACHE  *p_dest_cache;
+    NET_NDP_ROUTER      *p_router;
+    NET_IPv6_ADDR       *p_addr_nexthop;
+    CPU_BOOLEAN          on_link;
+    CPU_BOOLEAN          addr_mcast;
+    CPU_BOOLEAN          dflt_router;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+        return ((NET_IPv6_ADDR *)0);
+    }
+#endif
+
+                                                                /* --------- CHECK IF DEST ADDR IS MULTICAST ---------- */
+    addr_mcast = NetIPv6_IsAddrMcast(p_addr_dest);
+    if (addr_mcast == DEF_YES) {
+       *p_err = NET_NDP_ERR_TX_DEST_MULTICAST;
+        return (p_addr_dest);
+    }
+
+                                                                /* -------- CHECK FOR DESTINATION CACHE ENTRY --------- */
+    p_dest_cache = NetNDP_DestCacheSrch(if_nbr, p_addr_dest, p_err);
+    if (p_dest_cache != (NET_NDP_DEST_CACHE *)0) {              /* Destination cache exists for current destination.    */
+        if (p_dest_cache->IsValid == DEF_YES) {
+            p_addr_nexthop = &p_dest_cache->AddrNextHop;
+            if (p_dest_cache->OnLink == DEF_YES) {
+               *p_err = NET_NDP_ERR_TX_DEST_HOST_THIS_NET;
+            } else {
+               *p_err = NET_NDP_ERR_TX_DFLT_GATEWAY;
+            }
+            return (p_addr_nexthop);
+        }
+    } else {
+        p_dest_cache = NetNDP_DestCacheCfg(if_nbr,
+                                           p_addr_dest,
+                                           DEF_NULL,
+                                           DEF_NO,
+                                           DEF_NO,
+                                           p_err);
+        if (*p_err != NET_NDP_ERR_NONE) {
+            return ((NET_IPv6_ADDR *)0);
+        }
+    }
+                                                                /* ---------- CHECK IF DESTINAION IS ON LINK ---------- */
+    on_link = NetNDP_IsAddrOnLink(if_nbr,
+                                  p_addr_dest);
+    if (on_link == DEF_YES) {
+        p_dest_cache->IsValid = DEF_YES;
+        p_dest_cache->OnLink  = DEF_YES;
+        Mem_Copy(&p_dest_cache->AddrNextHop, p_addr_dest, NET_IPv6_ADDR_SIZE);
+       *p_err = NET_NDP_ERR_TX_DEST_HOST_THIS_NET;
+        return (p_addr_dest);
+    }
+
+                                                                /* ------------- CHECK FOR ROUTER ON LINK ------------- */
+    dflt_router = NetNDP_RouterDfltGet(if_nbr, &p_router, p_err);
+    switch (*p_err) {
+        case NET_NDP_ERR_NONE:
+             if (dflt_router == DEF_YES) {
+                 p_dest_cache->IsValid = DEF_YES;
+                 p_dest_cache->OnLink  = DEF_NO;
+                *p_err = NET_NDP_ERR_TX_DFLT_GATEWAY;
+             } else {
+                 p_dest_cache->IsValid = DEF_NO;
+                 p_dest_cache->OnLink  = DEF_NO;
+                *p_err = NET_NDP_ERR_TX_NO_DFLT_GATEWAY;
+             }
+             break;
+
+
+        case NET_NDP_ERR_ROUTER_NOT_FOUND:
+        case NET_NDP_ERR_FAULT:
+        default:
+            p_dest_cache->IsValid = DEF_NO;
+            p_dest_cache->OnLink  = DEF_NO;
+           *p_err = NET_NDP_ERR_TX_NO_NEXT_HOP;
+            return ((NET_IPv6_ADDR *)0);
+    }
+
+
+    p_addr_nexthop = (NET_IPv6_ADDR *)&p_router->Addr;
+    Mem_Copy(&p_dest_cache->AddrNextHop, p_addr_nexthop, NET_IPv6_ADDR_SIZE);
+
+
+    return (p_addr_nexthop);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetNDP_NextHop()
+*
+* Description : Find Next Hop and the best Interface for the given destination address.
+*
+* Argument(s) : p_if_nbr        Pointer to variable that will received the interface number.
+*
+*               p_addr_src      Pointer to IPv6 suggested source address if any.
+*
+*               p_addr_dest     Pointer to IPv6 destination address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_IPv6_ERR_TX_DEST_HOST_THIS_NET    Destination is on same link.
+*                               NET_IPv6_ERR_TX_DEST_DFLT_GATEWAY     Next-hop is the default router.
+*                               NET_IPv6_ERR_TX_DEST_NO_DFLT_GATEWAY  Next-hop is a router in the router list.
+*                               NET_IPv6_ERR_TX_DEST_NONE             No next-hop is available.
+*
+* Return(s)   : Pointer to the next-hop ipv6 address
+*
+* Caller(s)   : NetIPv6_GetAddrSrcHandler().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) Destination address that are Link-Local are ambiguous, no interface can be chosen
+*                   as being adequate for the destination since link local prefix is the same for any
+*                   network. Therefore the default inteface is selected.
+*
+*               (2) To found the Interface for a Multicast destination address, the function checks
+*                   if any interface as joined the MLDP group of the address.
+*
+*               (3) This function finds the best matching interface for the given destination address
+*                   according to the following classification :
+*
+*                   (a) Destination is on same link as the interface and the received source address is
+*                       also configured on the interface.
+*
+*                   (b) Destination is on same link as the interface.
+*
+*                   (c) A Default router exit on the same link as the interface and the received source is
+*                       also configured on the interface.
+*
+*                   (d) A default router exit on the same link as the interface.
+*
+*                   (e) A router is present on the same link as the interface and the received source
+*                       address is also configured on the interface.
+*
+*                   (f) The received source address is configured on the interface.
+*
+*                   (g) No Interface is adequate for the destination address.
+*********************************************************************************************************
+*/
+
+const  NET_IPv6_ADDR  *NetNDP_NextHop (       NET_IF_NBR     *p_if_nbr,
+                                       const  NET_IPv6_ADDR  *p_addr_src,
+                                       const  NET_IPv6_ADDR  *p_addr_dest,
+                                              NET_ERR        *p_err)
+{
+           NET_IF_NBR           if_nbr;
+           NET_NDP_DEST_CACHE  *p_dest;
+           NET_NDP_DEST_CACHE  *p_dest_tmp;
+           NET_NDP_ROUTER      *p_router;
+    const  NET_IPv6_ADDR       *p_addr_nexthop;
+           NET_IPv6_ADDR       *p_addr_nexthop_tmp;
+           NET_IF_NBR           if_nbr_tmp;
+           NET_IF_NBR           if_nbr_src_addr;
+           CPU_INT08U           valid_nbr_current;
+           CPU_INT08U           valid_nbr_best;
+           CPU_BOOLEAN          link_local;
+           CPU_BOOLEAN          addr_mcast;
+           CPU_BOOLEAN          on_link;
+           CPU_BOOLEAN          add_dest;
+           CPU_BOOLEAN          add_dest_tmp;
+           CPU_BOOLEAN          dflt_router;
+           CPU_BOOLEAN          is_mcast_grp;
+           CPU_BOOLEAN          if_found;
+
+
+                                                                /* --------- CHECK IF DEST ADDR IS LINK LOCAL --------- */
+    link_local = NetIPv6_IsAddrLinkLocal(p_addr_dest);
+    if (link_local == DEF_YES) {
+       *p_if_nbr = NetIF_GetDflt();
+        p_addr_nexthop = NetNDP_NextHopByIF(*p_if_nbr, p_addr_dest, p_err);
+        return (p_addr_nexthop);
+    }
+
+                                                                /* --------- CHECK IF DEST ADDR IS MULTICAST ---------- */
+    addr_mcast = NetIPv6_IsAddrMcast(p_addr_dest);
+    if (addr_mcast == DEF_YES) {
+        if_nbr     = NET_IF_NBR_BASE_CFGD;
+        if_nbr_tmp = NET_IF_NBR_BASE_CFGD;
+        if_found   = DEF_NO;
+        for ( ; if_nbr_tmp < NET_IF_NBR_IF_TOT; if_nbr_tmp++) {
+            is_mcast_grp = NetMLDP_IsGrpJoinedOnIF(if_nbr_tmp, p_addr_dest);
+            if (is_mcast_grp == DEF_YES) {
+                if_found  = DEF_YES;
+                if_nbr    = if_nbr_tmp;
+            }
+        }
+        if (if_found == DEF_YES) {
+           *p_if_nbr = if_nbr;
+           *p_err    = NET_NDP_ERR_TX_DEST_MULTICAST;
+        } else {
+           *p_if_nbr = NET_IF_NBR_NONE;
+           *p_err    = NET_NDP_ERR_TX_NO_NEXT_HOP;
+        }
+        return(p_addr_dest);
+    }
+
+                                                                /* ----------- FOUND BEST NEXT HOP ADDRESS ------------ */
+    if (p_addr_src != (NET_IPv6_ADDR *)0) {
+        if_nbr_src_addr = NetIPv6_GetAddrHostIF_Nbr(p_addr_src);
+    }
+
+    if_nbr            = NET_IF_NBR_BASE_CFGD;
+    if_nbr_tmp        = NET_IF_NBR_BASE_CFGD;
+    valid_nbr_best    = 0;
+    valid_nbr_current = 0;
+    for ( ; if_nbr_tmp < NET_IF_NBR_IF_TOT; if_nbr_tmp++) {
+                                                                /* -------------- CHECK DESTINATION CACHE ------------- */
+        p_dest_tmp = NetNDP_DestCacheSrch(if_nbr_tmp, p_addr_dest, p_err);
+                                                                /* Destination cache exists for destination ...         */
+                                                                /* ... and destination cache is valid.                  */
+        if ((p_dest_tmp          != (NET_NDP_DEST_CACHE *)0) &&
+            (p_dest_tmp->IsValid == DEF_YES)                ) {
+
+            p_addr_nexthop_tmp = &p_dest_tmp->AddrNextHop;
+
+            if(p_dest_tmp->OnLink == DEF_YES) {
+                valid_nbr_current = NET_NDP_IF_DEST_ON_LINK;
+            } else {
+                valid_nbr_current = NET_NDP_IF_DFLT_ROUTER_ON_LINK;
+            }
+
+            add_dest_tmp = DEF_NO;
+
+                                                                /* Destination cache doesn't exists for destination ... */
+                                                                /* ... or is invalid.                                   */
+        } else {
+
+            if (p_dest_tmp == (NET_NDP_DEST_CACHE *)0) {
+                add_dest_tmp = DEF_YES;
+            } else {
+                add_dest_tmp = DEF_NO;
+            }
+
+                                                                /* --------- CHECK IF DESTINATION IS ON LINK ---------- */
+            on_link = NetNDP_IsAddrOnLink(if_nbr_tmp,
+                                          p_addr_dest);
+            if (on_link == DEF_YES) {
+                valid_nbr_current  = NET_NDP_IF_DEST_ON_LINK;
+                p_addr_nexthop_tmp = (NET_IPv6_ADDR *)p_addr_dest;
+
+            } else {
+                                                                /* ------------ CHECK FOR ROUTER ON LINK -------------- */
+                if (NetNDP_DefaultRouterTbl[if_nbr_tmp] == (NET_NDP_ROUTER *)0) {
+
+                    dflt_router = NetNDP_RouterDfltGet(if_nbr_tmp, &p_router, p_err);
+                    if (p_router != (NET_NDP_ROUTER *)0) {
+                        if (dflt_router == DEF_YES) {
+                            valid_nbr_current = NET_NDP_IF_DFLT_ROUTER_ON_LINK;
+                        } else {
+                            valid_nbr_current = NET_NDP_IF_ROUTER_ON_LINK;
+                        }
+                        p_addr_nexthop_tmp = &p_router->Addr;
+                    } else {
+                        p_addr_nexthop_tmp = (NET_IPv6_ADDR *)0;
+                       *p_err = NET_NDP_ERR_TX_NO_NEXT_HOP;
+                    }
+                } else {
+                    valid_nbr_current = NET_NDP_IF_DFLT_ROUTER_ON_LINK;
+                    p_addr_nexthop_tmp = &NetNDP_DefaultRouterTbl[if_nbr_tmp]->Addr;
+                   *p_err = NET_NDP_ERR_TX_DFLT_GATEWAY;
+                }
+            }
+        }
+
+        if (if_nbr_src_addr == if_nbr_tmp) {
+            valid_nbr_current++;
+        }
+
+        if (valid_nbr_current >= valid_nbr_best) {
+            valid_nbr_best = valid_nbr_current;
+            if_nbr         = if_nbr_tmp;
+            p_addr_nexthop = p_addr_nexthop_tmp;
+            add_dest       = add_dest_tmp;
+            if (add_dest == DEF_NO) {
+                 p_dest  = p_dest_tmp;
+            }
+        }
+    }
+
+                                                                /* Add a Destination Cache if none exist for dest.      */
+    if (add_dest == DEF_YES) {
+        p_dest = NetNDP_DestCacheCfg(if_nbr,
+                                     p_addr_dest,
+                                     p_addr_nexthop,
+                                     DEF_NO,
+                                     DEF_NO,
+                                     p_err);
+        if (*p_err != NET_NDP_ERR_NONE) {
+             return ((NET_IPv6_ADDR *)0);
+        }
+    }
+
+                                                                /* Set return status.                                   */
+    switch (valid_nbr_best) {
+        case NET_NDP_IF_DEST_ON_LINK_WITH_SRC_ADDR_CFGD:
+        case NET_NDP_IF_DEST_ON_LINK:
+             p_dest->IsValid = DEF_YES;
+             p_dest->OnLink  = DEF_YES;
+            *p_err = NET_NDP_ERR_TX_DEST_HOST_THIS_NET;
+             break;
+
+        case NET_NDP_IF_DFLT_ROUTER_ON_LINK_WITH_SRC_ADDR_CFGD:
+        case NET_NDP_IF_DFLT_ROUTER_ON_LINK:
+             p_dest->IsValid = DEF_YES;
+             p_dest->OnLink  = DEF_NO;
+            *p_err = NET_NDP_ERR_TX_DFLT_GATEWAY;
+             break;
+
+
+        case NET_NDP_IF_ROUTER_ON_LINK_WITH_SRC_ADDR_CFGD:
+        case NET_NDP_IF_ROUTER_ON_LINK:
+             p_dest->IsValid = DEF_NO;
+             p_dest->OnLink  = DEF_NO;
+            *p_err = NET_NDP_ERR_TX_NO_DFLT_GATEWAY;
+             break;
+
+        case NET_NDP_IF_SRC_ADDR_CFGD:
+        case NET_NDP_IF_NO_MATCH:
+        default:
+             p_dest->IsValid = DEF_NO;
+             p_dest->OnLink  = DEF_NO;
+            *p_err = NET_NDP_ERR_TX_NO_NEXT_HOP;
+             break;
+    }
+
+   *p_if_nbr = if_nbr;
+
+    return (p_addr_nexthop);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetNDP_CfgNeighborCacheTimeout()
+*
+* Description : Configure NDP Neighbor timeout from NDP Neighbor cache list.
+*
+* Argument(s) : timeout_sec     Desired value for NDP neighbor timeout (in seconds).
+*
+* Return(s)   : DEF_OK,   NDP neighbor cache timeout configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application,
+*               Net_InitDflt().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) Timeout in seconds converted to 'NET_TMR_TICK' ticks in order to pre-compute initial
+*                   timeout value in 'NET_TMR_TICK' ticks.
+*
+*               (2) 'NetNDP_NeighborCacheTimeout' variables MUST ALWAYS be accessed exclusively in
+*                    critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetNDP_CfgNeighborCacheTimeout (CPU_INT16U  timeout_sec)
+{
+    NET_TMR_TICK  timeout_tick;
+    CPU_SR_ALLOC();
+
+
+#if (NET_NDP_CACHE_TIMEOUT_MIN_SEC > DEF_INT_16U_MIN_VAL)
+    if (timeout_sec < NET_NDP_CACHE_TIMEOUT_MIN_SEC) {
+        return (DEF_FAIL);
+    }
+#endif
+#if (NET_NDP_CACHE_TIMEOUT_MAX_SEC < DEF_INT_16U_MAX_VAL)
+    if (timeout_sec > NET_NDP_CACHE_TIMEOUT_MAX_SEC) {
+        return (DEF_FAIL);
+    }
+#endif
+
+    timeout_tick = (NET_TMR_TICK)timeout_sec * NET_TMR_TIME_TICK_PER_SEC;
+    CPU_CRITICAL_ENTER();
+    NetNDP_NeighborCacheTimeout_sec  =  timeout_sec;
+    NetNDP_NeighborCacheTimeout_tick =  timeout_tick;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                      NetNDP_CfgReachabilityTimeout()
+*
+* Description : Configure possible NDP Neighbor reachability timeouts.
+*
+* Argument(s) : timeout_type    NDP timeout type.
+*
+*                                   NET_NDP_TIMEOUT_REACHABLE
+*                                   NET_NDP_TIMEOUT_DELAY
+*                                   NET_NDP_TIMEOUT_SOLICIT
+*
+*               timeout_sec     Desired value for NDP neighbor reachable timeout (in seconds).
+*
+* Return(s)   : DEF_OK,   NDP neighbor cache timeout configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application,
+*               Net_InitDflt().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetNDP_CfgReachabilityTimeout (NET_NDP_TIMEOUT  timeout_type,
+                                            CPU_INT16U       timeout_sec)
+{
+    NET_TMR_TICK  timeout_tick;
+    CPU_SR_ALLOC();
+
+
+    timeout_tick = (NET_TMR_TICK)timeout_sec * NET_TMR_TIME_TICK_PER_SEC;
+
+    switch (timeout_type) {
+        case NET_NDP_TIMEOUT_REACHABLE:
+             if (timeout_sec < NET_NDP_REACHABLE_TIMEOUT_MIN_SEC) {
+                 return (DEF_FAIL);
+             }
+             if (timeout_sec > NET_NDP_REACHABLE_TIMEOUT_MAX_SEC) {
+                 return (DEF_FAIL);
+             }
+             CPU_CRITICAL_ENTER();
+             NetNDP_ReachableTimeout_sec  =  timeout_sec;
+             NetNDP_ReachableTimeout_tick =  timeout_tick;
+             CPU_CRITICAL_EXIT();
+            (void)&NetNDP_ReachableTimeout_sec;
+             break;
+
+
+        case NET_NDP_TIMEOUT_DELAY:
+             if (timeout_sec < NET_NDP_DELAY_FIRST_PROBE_TIMEOUT_MIN_SEC) {
+                 return (DEF_FAIL);
+             }
+             if (timeout_sec > NET_NDP_DELAY_FIRST_PROBE_TIMEOUT_MAX_SEC) {
+                 return (DEF_FAIL);
+             }
+             CPU_CRITICAL_ENTER();
+             NetNDP_DelayTimeout_sec  =  timeout_sec;
+             NetNDP_DelayTimeout_tick =  timeout_tick;
+             CPU_CRITICAL_EXIT();
+             break;
+
+
+        case NET_NDP_TIMEOUT_SOLICIT:
+             if (timeout_sec < NET_NDP_RETRANS_TIMEOUT_MIN_SEC) {
+                 return (DEF_FAIL);
+             }
+             if (timeout_sec > NET_NDP_RETRANS_TIMEOUT_MAX_SEC) {
+                 return (DEF_FAIL);
+             }
+             CPU_CRITICAL_ENTER();
+             NetNDP_SolicitTimeout_sec  = timeout_sec;
+             NetNDP_SolicitTimeout_tick = timeout_tick;
+             CPU_CRITICAL_EXIT();
+            (void)&NetNDP_SolicitTimeout_sec;
+             break;
+
+
+        default:
+            return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                  NetNDP_CfgSolicitMaxNbr()
+*
+* Description : Configure NDP maximum number of NDP Solicitation sent for the given type of solicitation.
+*
+* Argument(s) : solicit_type    NDP Solicitation message type :
+*
+*                                   NET_NDP_SOLICIT_MULTICAST
+*                                   NET_NDP_SOLICIT_UNICAST
+*                                   NET_NDP_SOLICIT_DAD
+*
+*               max_nbr         Desired maximum number of NDP solicitation attempts.
+*
+* Return(s)   : DEF_OK,   NDP Request maximum number of solicitation attempts configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application,
+*               Net_InitDflt().
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetNDP_CfgSolicitMaxNbr (NET_NDP_SOLICIT  solicit_type,
+                                      CPU_INT08U       max_nbr)
+{
+    CPU_SR_ALLOC();
+
+
+    switch (solicit_type) {
+        case NET_NDP_SOLICIT_MULTICAST:
+#if (NET_NDP_SOLICIT_NBR_MIN > DEF_INT_08U_MIN_VAL)
+             if (max_nbr < NET_NDP_SOLICIT_NBR_MIN) {
+                 return (DEF_FAIL);
+             }
+#endif
+#if (NET_NDP_SOLICIT_NBR_MAX < DEF_INT_08U_MAX_VAL)
+             if (max_nbr > NET_NDP_SOLICIT_NBR_MAX) {
+                 return (DEF_FAIL);
+             }
+#endif
+             CPU_CRITICAL_ENTER();
+             NetNDP_SolicitMaxAttempsMulticast_nbr = max_nbr;
+             CPU_CRITICAL_EXIT();
+             break;
+
+
+        case NET_NDP_SOLICIT_UNICAST:
+#if (NET_NDP_SOLICIT_NBR_MIN > DEF_INT_08U_MIN_VAL)
+             if (max_nbr < NET_NDP_SOLICIT_NBR_MIN) {
+                 return (DEF_FAIL);
+             }
+#endif
+#if (NET_NDP_SOLICIT_NBR_MAX < DEF_INT_08U_MAX_VAL)
+             if (max_nbr > NET_NDP_SOLICIT_NBR_MAX) {
+                 return (DEF_FAIL);
+             }
+#endif
+            CPU_CRITICAL_ENTER();
+            NetNDP_SolicitMaxAttempsUnicast_nbr = max_nbr;
+            CPU_CRITICAL_EXIT();
+                     break;
+
+
+        case NET_NDP_SOLICIT_DAD:
+#ifdef NET_DAD_MODULE_EN
+#if (NET_NDP_SOLICIT_NBR_MIN > DEF_INT_08U_MIN_VAL)
+             if (max_nbr < NET_NDP_SOLICIT_NBR_MIN) {
+                 return (DEF_FAIL);
+             }
+#endif
+#if (NET_NDP_SOLICIT_NBR_MAX < DEF_INT_08U_MAX_VAL)
+             if (max_nbr > NET_NDP_SOLICIT_NBR_MAX) {
+                 return (DEF_FAIL);
+             }
+#endif
+             CPU_CRITICAL_ENTER();
+             NetNDP_DADMaxAttempts_nbr = max_nbr;
+             CPU_CRITICAL_EXIT();
+#endif
+             break;
+
+
+        default:
+            return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetNDP_CfgCacheTxQ_MaxTh()
+*
+* Description : Configure NDP cache maximum number of transmit packet buffers to enqueue.
+*
+* Argument(s) : nbr_buf_max     Desired maximum number of transmit packet buffers to enqueue onto an
+*
+* Return(s)   : DEF_OK,   NDP cache transmit packet buffer threshold configured.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Net_InitDflt(),
+*               Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) 'NetNDP_CacheTxQ_MaxTh_nbr' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetNDP_CfgCacheTxQ_MaxTh (NET_BUF_QTY  nbr_buf_max)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_NDP_CACHE_TX_Q_TH_MIN > DEF_INT_16U_MIN_VAL)
+    if (nbr_buf_max < NET_NDP_CACHE_TX_Q_TH_MIN) {
+        return (DEF_FAIL);
+    }
+#endif
+
+#if (NET_NDP_CACHE_TX_Q_TH_MAX < DEF_INT_16U_MAX_VAL)
+    if (nbr_buf_max > NET_NDP_CACHE_TX_Q_TH_MAX) {
+        return (DEF_FAIL);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    NetNDP_CacheTxQ_MaxTh_nbr = nbr_buf_max;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_CacheTimeout()
+*
+* Description : Discard an NDP cache in the 'STALE' state on timeout.
+*
+* Argument(s) : p_cache_timeout     Pointer to an NDP cache (see Note #2b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in : NetCache_AddResolve(),
+*                               NetNDP_RxRouterAdvertisement(),
+*                               NetNDP_RxNeighborSolicitation(),
+*                               NetNDP_RxNeighborAdvertisement(),
+*                               NetNDP_RxRedirect(),
+*                               NetNDP_NeighborCacheUpdateEntry(),
+*                               NetNDP_ReachableTimeout().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+*
+* Note(s)     : (1) RFC #4861 section 7.3.3 Node Behavior.
+*
+*               (2) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_NDP_CACHE' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (3) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetCache_AddrFree() via NetCache_Remove().
+*
+*                   (b) but do NOT re-free the timer.
+*********************************************************************************************************
+*/
+
+void  NetNDP_CacheTimeout (void  *p_cache_timeout)
+{
+    NET_NDP_NEIGHBOR_CACHE  *p_cache;
+    NET_CACHE_ADDR_NDP      *p_cache_addr_ndp;
+    NET_NDP_ROUTER          *p_router;
+    CPU_BOOLEAN              is_router;
+    NET_TMR_TICK             timeout_tick;
+    NET_ERR                  err;
+    CPU_SR_ALLOC();
+
+
+    p_cache = (NET_NDP_NEIGHBOR_CACHE *)p_cache_timeout;        /* See Note #2b2A.                                      */
+
+    p_cache_addr_ndp = p_cache->CacheAddrPtr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE NDP CACHE ---------------- */
+    if (p_cache == (NET_NDP_NEIGHBOR_CACHE *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_cache->TmrPtr = (NET_TMR *)0;                             /* Un-reference tmr in the NDP Neighbor cache.          */
+
+    is_router = DEF_BIT_IS_SET(p_cache->Flags,NET_NDP_CACHE_FLAG_ISROUTER);
+
+    if (is_router == DEF_TRUE) {                                /* If the addr is still a valid router don't delete it. */
+
+        p_router = NetNDP_RouterSrch(                  p_cache_addr_ndp->IF_Nbr,
+                                     (NET_IPv6_ADDR *)&p_cache_addr_ndp->AddrProtocol[0],
+                                                      &err);
+
+        if (p_router != (NET_NDP_ROUTER *)0) {
+            CPU_CRITICAL_ENTER();
+            timeout_tick = (NET_TMR_TICK)p_router->LifetimeSec * NET_TMR_TIME_TICK_PER_SEC;
+            CPU_CRITICAL_EXIT();
+
+            p_cache->TmrPtr = NetTmr_Get(        NetNDP_CacheTimeout,
+                                         (void *)p_cache,
+                                                 timeout_tick,
+                                                 NET_TMR_FLAG_NONE,
+                                                &err);
+            if (err != NET_TMR_ERR_NONE) {                      /* If tmr unavailable, free NDP cache.                  */
+                NetNDP_NeighborCacheRemoveEntry(p_cache, DEF_NO);
+                return;
+            }
+
+        } else {
+            NetNDP_NeighborCacheRemoveEntry(p_cache, DEF_NO);
+        }
+
+    } else {
+        NetNDP_NeighborCacheRemoveEntry(p_cache, DEF_NO);
+    }
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_DelayTimeout()
+*
+* Description : Change the NDP cache state to PROBE if the state of the NDP cache is still at DELAY when
+*               the timer end.
+*
+* Argument(s) : p_cache_timeout     Pointer to an NDP cache.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in : NetNDP_CacheHandler(),
+*                               NetCache_TxPktHandler().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+*
+* Note(s)     : (1) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_NDP_CACHE' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (2) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetNDP_CacheFree() via NetNDP_CacheRemove(); or
+*                       (2) Reset   by NetTmr_Get().
+*
+*                   (b) but do NOT re-free the timer.
+*********************************************************************************************************
+*/
+
+void  NetNDP_DelayTimeout (void  *p_cache_timeout)
+{
+    NET_NDP_NEIGHBOR_CACHE  *p_cache;
+    NET_TMR_TICK             timeout_tick;
+    NET_ERR                  err;
+    CPU_SR_ALLOC();
+
+
+    p_cache = (NET_NDP_NEIGHBOR_CACHE *)p_cache_timeout;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE NDP CACHE ---------------- */
+    if (p_cache == (NET_NDP_NEIGHBOR_CACHE *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+
+#endif
+
+
+    p_cache->TmrPtr = (NET_TMR *)0;                             /* Deference already freed timer.                       */
+
+    if(p_cache->State == NET_NDP_CACHE_STATE_DLY) {
+        p_cache->State = NET_NDP_CACHE_STATE_PROBE;
+        CPU_CRITICAL_ENTER();
+        timeout_tick = NetNDP_SolicitTimeout_tick;
+        CPU_CRITICAL_EXIT();
+
+        p_cache->TmrPtr = NetTmr_Get(        NetNDP_SolicitTimeout,
+                                     (void *)p_cache,
+                                             timeout_tick,
+                                             NET_TMR_FLAG_NONE,
+                                            &err);
+        if (err != NET_TMR_ERR_NONE) {                          /* If tmr unavail, free NDP cache.                      */
+            NetNDP_NeighborCacheRemoveEntry(p_cache, DEF_NO);
+            return;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetNDP_DAD_Start()
+*
+* Description : (1) Start duplicate address detection procedure:
+*
+*                   (a) Use a new cache entry to save address info.
+*
+* Argument(s) : if_nbr      Network interface number to perform duplicate address detection.
+*
+*               p_addr      Pointer on the IPv6 addr to perform duplicate address detection.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                DAD process successfully started.
+*
+*                               ------------- RETURNED by NetNDP_NeighborCacheAddEntry() ------------
+*                               See NetNDP_NeighborCacheAddEntry() for additional return error codes.
+*
+* Return(s)   : DEF_OK,   if duplicate address detection started successfully,
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetIPv6_CfgAddrAddHandler(),
+*               NetNDP_DAD_RetryTimeout().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) NetNDP_DAD_Start() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+#ifdef NET_DAD_MODULE_EN
+void  NetNDP_DAD_Start(NET_IF_NBR          if_nbr,
+                       NET_IPv6_ADDR      *p_addr,
+                       NET_ERR            *p_err)
+{
+    NET_TMR_TICK          timeout_tick;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* ---------- CREATE NEW NDP CACHE FOR ADDR ----------- */
+    CPU_CRITICAL_ENTER();
+    timeout_tick = NetNDP_SolicitTimeout_tick;
+    CPU_CRITICAL_EXIT();
+
+    (void)NetNDP_NeighborCacheAddEntry(               if_nbr,
+                                                      DEF_NULL,
+                                       (CPU_INT08U *) p_addr,
+                                                      DEF_NULL,
+                                                      timeout_tick,
+                                                      NetNDP_DAD_Timeout,
+                                                      NET_NDP_CACHE_STATE_INCOMPLETE,
+                                                      DEF_NO,
+                                                      p_err);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           NetNDP_DAD_Stop()
+*
+* Description : Remove the NDP Neighbor cache entry associated with the DAD process.
+*
+* Argument(s) : if_nbr  Interface number of the address on which DAD is occurring.
+*
+*               p_addr  Pointer to the IPv6 address on which DAD is occurring.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetIPv6_CfgAddrAddHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) NetNDP_DAD_Stop() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+#ifdef NET_DAD_MODULE_EN
+void  NetNDP_DAD_Stop(NET_IF_NBR      if_nbr,
+                      NET_IPv6_ADDR  *p_addr)
+{
+    NET_CACHE_ADDR_NDP      *p_cache_addr_ndp;
+    NET_NDP_NEIGHBOR_CACHE  *p_cache;
+    NET_ERR                  err_net;
+
+
+    p_cache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrSrch(               NET_CACHE_TYPE_NDP,
+                                                                              if_nbr,
+                                                               (CPU_INT08U *) p_addr,
+                                                                              NET_IPv6_ADDR_SIZE,
+                                                                             &err_net);
+    if (p_cache_addr_ndp == (NET_CACHE_ADDR_NDP *)0) {
+        return;
+    }
+
+    p_cache = (NET_NDP_NEIGHBOR_CACHE *)p_cache_addr_ndp->ParentPtr;
+
+    NetNDP_NeighborCacheRemoveEntry(p_cache, DEF_YES);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetNDP_DAD_GetMaxAttemptsNbr()
+*
+* Description : Get the number of DAD attempts configured.
+*
+* Argument(s) : None.
+*
+* Return(s)   : Number of DAD attempts configured.
+*
+* Caller(s)   : NetIPv6_DAD_Start().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) NetNDP_DAD_GetMaxAttemptsNbr() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+#ifdef NET_DAD_MODULE_EN
+CPU_INT08U  NetNDP_DAD_GetMaxAttemptsNbr (void)
+{
+    CPU_INT08U     dad_retx_nbr;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    dad_retx_nbr = NetNDP_DADMaxAttempts_nbr;
+    CPU_CRITICAL_EXIT();
+
+    return(dad_retx_nbr);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetNDP_RouterAdvSignalCreate()
+*
+* Description : Create Signal for Rx Router Advertisement message.
+*
+* Argument(s) : if_nbr      Network Interface number.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                        Signal created successfully.
+*                               NET_ERR_FAULT_MEM_ALLOC                 Memory allocation error for signal.
+*                               NET_NDP_ERR_ROUTER_ADV_SIGNAL_CREATE    Creation signal error.
+*
+* Return(s)   : Pointer to Signal handle for the given interface.
+*
+* Caller(s)   : NetIPv6_CfgAddrGlobal().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+KAL_SEM_HANDLE  *NetNDP_RouterAdvSignalCreate(NET_IF_NBR   if_nbr,
+                                              NET_ERR      *p_err)
+{
+    KAL_SEM_HANDLE  *p_signal;
+    KAL_ERR          err_kal;
+
+
+    p_signal = &NetNDP_RxRouterAdvSignal[if_nbr];
+   *p_signal =  KAL_SemCreate((const CPU_CHAR *)NET_NDP_RX_ROUTER_ADV_SIGNAL_NAME,
+                                                DEF_NULL,
+                                               &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_ERR_FAULT_MEM_ALLOC;
+             goto exit;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_NDP_ERR_ROUTER_ADV_SIGNAL_CREATE;
+             goto exit;
+    }
+
+   *p_err = NET_NDP_ERR_NONE;
+
+
+exit:
+    return (p_signal);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetNDP_RouterAdvSignalPend()
+*
+* Description : Wait for Rx Router Advertisement Signal.
+*
+* Argument(s) : p_signal    Pointer to signal handle.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                        Signal received.
+*                               NET_NDP_ERR_ROUTER_ADV_SIGNAL_TIMEOUT   Pending on signal timed out.
+*                               NET_NDP_ERR_ROUTER_ADV_SIGNAL_FAULT     Pending on signal faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetIPv6_CfgAddrGlobal().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+void  NetNDP_RouterAdvSignalPend(KAL_SEM_HANDLE  *p_signal,
+                                 NET_ERR         *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_SemPend(*p_signal,
+                 KAL_OPT_PEND_BLOCKING,
+                 NET_NDP_RX_ROUTER_ADV_TIMEOUT_MS,
+                &err_kal);
+    switch (err_kal) {
+       case KAL_ERR_NONE:
+           *p_err = NET_NDP_ERR_NONE;
+            break;
+
+
+       case KAL_ERR_TIMEOUT:
+           *p_err = NET_NDP_ERR_ROUTER_ADV_SIGNAL_TIMEOUT;
+            break;
+
+
+       case KAL_ERR_ABORT:
+       case KAL_ERR_ISR:
+       case KAL_ERR_WOULD_BLOCK:
+       case KAL_ERR_OS:
+       default:
+           *p_err = NET_NDP_ERR_ROUTER_ADV_SIGNAL_FAULT;
+            break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetNDP_RouterAdvSignalRemove()
+*
+* Description : Delete given Router Adv Signal.
+*
+* Argument(s) : p_signal    Pointer to signal handle.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetIPv6_CfgAddrGlobal().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+void  NetNDP_RouterAdvSignalRemove(KAL_SEM_HANDLE  *p_signal)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_SemDel(*p_signal, &err_kal);
+
+    p_signal->SemObjPtr = DEF_NULL;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_PrefixAddCfg()
+*
+* Description : Add IPv6 prefix configuration in the prefix pool.
+*
+* Argument(s) : if_nbr          Interface number.
+*
+*               p_addr_prefix   Pointer to IPv6 prefix.
+*
+*               prefix_len      Prefix length
+*
+*               timer_en        Indicate whether are not to set a network timer for the prefix:
+*
+*                               DEF_YES                Set network timer for prefix.
+*                               DEF_NO          Do NOT set network timer for prefix.
+*
+*               timeout_fnct    Pointer to timeout function.
+*
+*               timeout_tick    Timeout value (in 'NET_TMR_TICK' ticks).
+*
+*               p_err           Pointer to variable that will receive the return error code from this function:
+*
+*
+* Return(s)   : Pointer to configured prefix entry.
+*
+* Caller(s)   : IxANVL testing tools.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Function for testing purpose.
+*********************************************************************************************************
+*/
+
+NET_NDP_PREFIX  *NetNDP_PrefixAddCfg (       NET_IF_NBR      if_nbr,
+                                      const  NET_IPv6_ADDR  *p_addr_prefix,
+                                             CPU_INT08U      prefix_len,
+                                             CPU_BOOLEAN     timer_en,
+                                             CPU_FNCT_PTR    timeout_fnct,
+                                             NET_TMR_TICK    timeout_tick,
+                                             NET_ERR        *p_err)
+{
+    NET_NDP_PREFIX  *p_prefix;
+
+
+    p_prefix = DEF_NULL;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_addr_prefix == DEF_NULL) {
+        *p_err =  NET_ERR_FAULT_NULL_PTR;
+         goto exit_fault;
+    }
+
+    if ((timer_en     == DEF_YES)  &&
+        (timeout_fnct == DEF_NULL)) {
+        *p_err =  NET_ERR_FAULT_NULL_PTR;
+         goto exit_fault;
+    }
+#endif
+
+    p_prefix = (NET_NDP_PREFIX *)0;
+
+    Net_GlobalLockAcquire((void *)&NetNDP_PrefixAddCfg, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_fault;
+    }
+
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {                            /* If cfg'd IF NOT en'd (see Note #4), ...              */
+         goto exit_release;                                     /* ... rtn err.                                         */
+    }
+
+
+    p_prefix = NetNDP_PrefixSrch(if_nbr,
+                                 p_addr_prefix,
+                                 p_err);
+    if (*p_err == NET_NDP_ERR_NONE) {
+        goto exit_release;
+    }
+
+
+    NetNDP_PrefixCfg(if_nbr,
+                     p_addr_prefix,
+                     prefix_len,
+                     timer_en,
+                     timeout_fnct,
+                     timeout_tick,
+                     p_err);
+    if (*p_err != NET_NDP_ERR_NONE) {
+        goto exit_release;
+    }
+
+
+    *p_err = NET_NDP_ERR_NONE;
+
+
+exit_release:
+    Net_GlobalLockRelease();
+
+exit_fault:
+    return (p_prefix);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetNDP_DestCacheAddCfg()
+*
+* Description : Add IPv6 NDP Destination cache configuration in the Destination Cache pool.
+*
+* Argument(s) : if_nbr              Interface number for the destination to configure.
+*
+*               p_addr_dest         Pointer to IPv6 Destination address.
+*
+*               p_addr_next_hop     Pointer to Next-Hop IPv6 address.
+*
+*               is_valid            Indicate whether are not the Next-Hop address is valid.
+*                                       DEF_YES, address is   valid
+*                                       DEF_NO,  address is invalid
+*
+*               on_link             Indicate whether are not the Destination is on link.
+*                                       DEF_YES, destination is     on link
+*                                       DEF_NO,  destination is not on link
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                Destination successfully configured.
+*                               NET_ERR_FAULT_NULL_PTR          Argument 'p_addr_dest'/'p_addr_next_hop'
+*                                                                   passed a NULL pointer
+*                               NET_NDP_ERR_DEST_NONE_AVAIL     NO available destination to allocate.
+*
+* Return(s)   : Pointer to destination entry configured.
+*
+* Caller(s)   : IxANVL testing tools.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_NDP_DEST_CACHE  *NetNDP_DestCacheAddCfg(       NET_IF_NBR      if_nbr,
+                                            const  NET_IPv6_ADDR  *p_addr_dest,
+                                            const  NET_IPv6_ADDR  *p_addr_next_hop,
+                                                   CPU_BOOLEAN     is_valid,
+                                                   CPU_BOOLEAN     on_link,
+                                                   NET_ERR        *p_err)
+{
+    NET_NDP_DEST_CACHE  *p_dest;
+
+
+    p_dest = DEF_NULL;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_addr_dest == DEF_NULL) {
+        *p_err =  NET_ERR_FAULT_NULL_PTR;
+         goto exit_fault;
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetNDP_DestCacheAddCfg, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_fault;
+    }
+
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {                            /* If cfg'd IF NOT en'd (see Note #4), ...              */
+         goto exit_release;                                     /* ... rtn err.                                         */
+    }
+
+
+    p_dest = NetNDP_DestCacheSrch(if_nbr,
+                                  p_addr_dest,
+                                  p_err);
+    if (*p_err == NET_NDP_ERR_NONE) {
+        goto exit_release;
+    }
+
+    NetNDP_DestCacheCfg(if_nbr,
+                        p_addr_dest,
+                        DEF_NULL,
+                        DEF_YES,
+                        DEF_NO,
+                        p_err);
+    if (*p_err != NET_NDP_ERR_NONE) {
+        goto exit_release;
+    }
+
+
+   *p_err = NET_NDP_ERR_NONE;
+
+   (void)&p_addr_next_hop;
+   (void)&is_valid;
+   (void)&on_link;
+
+
+exit_release:
+    Net_GlobalLockRelease();
+
+exit_fault:
+    return (p_dest);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetNDP_DestCacheRemoveCfg()
+*
+* Description : Add IPv6 NDP Destination cache configuration in the Destination Cache pool.
+*
+* Argument(s) : if_nbr              Interface number for the destination to configure.
+*
+*               p_addr_dest         Pointer to IPv6 Destination address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                Destination successfully removed.
+*                               NET_ERR_FAULT_NULL_PTR          Argument 'p_addr_dest'/'p_addr_next_hop'
+*                                                                   passed a NULL pointer
+*
+* Return(s)   : none.
+*
+* Caller(s)   : IxANVL testing tools.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetNDP_DestCacheRemoveCfg (       NET_IF_NBR      if_nbr,
+                                 const  NET_IPv6_ADDR  *p_addr_dest,
+                                        NET_ERR        *p_err)
+{
+    NET_NDP_DEST_CACHE  *p_dest;
+
+
+    p_dest = DEF_NULL;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_addr_dest == DEF_NULL) {
+        *p_err =  NET_ERR_FAULT_NULL_PTR;
+         goto exit_fault;
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetNDP_DestCacheAddCfg, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_fault;
+    }
+
+    p_dest = NetNDP_DestCacheSrch(if_nbr,
+                                  p_addr_dest,
+                                  p_err);
+    if (*p_err != NET_NDP_ERR_NONE) {
+        goto exit_release;
+    }
+
+
+    NetNDP_DestCacheRemove(p_dest);
+
+
+   *p_err = NET_NDP_ERR_NONE;
+
+exit_release:
+    Net_GlobalLockRelease();
+
+exit_fault:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetNDP_CacheClrAll()
+*
+* Description : Clear all entries of the NDP cache, Router list, Prefix list and Destination cache.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : IxANVL testing tools.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Function for testing purpose.
+*********************************************************************************************************
+*/
+
+void  NetNDP_CacheClrAll (void)
+{
+    NET_NDP_NEIGHBOR_CACHE  *p_cache;
+    NET_CACHE_ADDR_NDP      *p_cache_addr_ndp;
+    NET_NDP_ROUTER          *p_router;
+    NET_NDP_PREFIX          *p_prefix;
+    NET_NDP_DEST_CACHE      *p_dest;
+    CPU_INT08U               i;
+    NET_ERR                  err;
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetNDP_CacheClrAll, &err);
+    if (err != NET_ERR_NONE) {
+         goto exit_fault;
+    }
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+        goto exit_release;
+    }
+
+
+                                                                /* Clear NDP Addr Cache and Neighbor Cache.             */
+    p_cache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_NDP];
+    while (p_cache_addr_ndp != DEF_NULL) {
+
+        NetNDP_RemoveAddrDestCache(p_cache_addr_ndp->IF_Nbr,
+                                  &p_cache_addr_ndp->AddrProtocol[0]);
+
+        p_cache                 = (NET_NDP_NEIGHBOR_CACHE *)p_cache_addr_ndp->ParentPtr;
+        p_cache->ReqAttemptsCtr =  0u;
+        p_cache->State          =  NET_NDP_CACHE_STATE_NONE;
+        p_cache->Flags          =  NET_CACHE_FLAG_NONE;
+
+        NetCache_Remove((NET_CACHE_ADDR *)p_cache_addr_ndp,     /* Clr Addr Cache and free tmr if specified.            */
+                                          DEF_YES);
+
+        p_cache->TmrPtr  = DEF_NULL;
+        p_cache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_NDP];
+    }
+
+                                                                /* Clear Default router list.                           */
+    p_router = NetNDP_RouterListHead;
+    while (p_router != DEF_NULL) {
+        NetNDP_RouterRemove(p_router, DEF_YES);
+        p_router = NetNDP_RouterListHead;
+    }
+
+    for (i = 0;i < NET_IF_NBR_IF_TOT; i++) {
+        NetNDP_DefaultRouterTbl[i] = (NET_NDP_ROUTER *)0;
+    }
+
+                                                                /* Clear Prefix list.                                   */
+    p_prefix = NetNDP_PrefixListHead;
+    while (p_prefix != DEF_NULL) {
+        NetNDP_PrefixRemove(p_prefix, DEF_YES);
+        p_prefix = NetNDP_PrefixListHead;
+    }
+
+                                                                /* Clear Destination Cache.                             */
+    p_dest = NetNDP_DestListHead;
+    while (p_dest != DEF_NULL) {
+        NetNDP_DestCacheRemove(p_dest);
+        p_dest = NetNDP_DestListHead;
+    }
+
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+exit_fault:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_CacheGetState()
+*
+* Description : Retrieve the cache state of the NDP neighbor cache entry related to the interface and
+*               address received.
+*
+* Argument(s) : if_nbr      Interface number
+*
+*               p_addr      Pointer to IPv6 address of the neighbor
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                        Neighbor cache was found.
+*                               NET_NDP_ERR_NEIGHBOR_CACHE_NOT_FOUND    Neighbor cache was not found.
+*
+* Return(s)   : Cache state of the Neighbor cache entry.
+*
+* Caller(s)   : IxANVL testing tools.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Function for testing purpose.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetNDP_CacheGetState (       NET_IF_NBR      if_nbr,
+                                  const  NET_IPv6_ADDR  *p_addr,
+                                         NET_ERR        *p_err)
+{
+    NET_CACHE_ADDR_NDP      *p_cache_addr_ndp;
+    NET_NDP_NEIGHBOR_CACHE  *p_cache;
+    CPU_INT08U               state;
+
+
+    state = NET_NDP_CACHE_STATE_NONE;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_addr == DEF_NULL) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        goto exit_fault;
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetNDP_CacheGetState, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_fault;
+    }
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+
+
+
+
+    p_cache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrSrch(              NET_CACHE_TYPE_NDP,
+                                                                             if_nbr,
+                                                               (CPU_INT08U *)p_addr,
+                                                                             NET_IPv6_ADDR_SIZE,
+                                                                             p_err);
+    if (p_cache_addr_ndp == (NET_CACHE_ADDR_NDP *)0) {
+       *p_err = NET_NDP_ERR_NEIGHBOR_CACHE_NOT_FOUND;
+        goto exit_release;
+    }
+
+    p_cache = (NET_NDP_NEIGHBOR_CACHE *) p_cache_addr_ndp->ParentPtr;
+    state   = p_cache->State;
+
+   *p_err   = NET_NDP_ERR_NONE;
+
+
+exit_release:
+                                                               /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+exit_fault:
+   return (state);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetNDP_CacheGetIsRouterFlagState()
+*
+* Description : Retrieve the IsRouter flag state for the given neighbor cache related to the interface
+*               and address received.
+*
+* Argument(s) : if_nbr      Interface number
+*
+*               p_addr      Pointer to IPv6 address of the neighbor
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                        Neighbor cache was found
+*                               NET_NDP_ERR_NEIGHBOR_CACHE_NOT_FOUND    Neighbor cache was not found.
+*
+* Return(s)   : IsRouter flag state : DEF_YES, neighbor is also a router
+*                                     DEF_NO , neighbor has not advertise itself as a router
+*
+* Caller(s)   : IxANVL testing tools.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Function for testing purpose.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetNDP_CacheGetIsRouterFlagState (       NET_IF_NBR      if_nbr,
+                                               const  NET_IPv6_ADDR  *p_addr,
+                                                      NET_ERR        *p_err)
+{
+    NET_CACHE_ADDR_NDP      *p_cache_addr_ndp;
+    NET_NDP_NEIGHBOR_CACHE  *p_cache;
+    CPU_BOOLEAN              is_router;
+
+
+    is_router = DEF_NO;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_addr == DEF_NULL) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        goto exit_fault;
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetNDP_CacheGetState, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_fault;
+    }
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_release;
+    }
+
+
+
+    p_cache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrSrch(              NET_CACHE_TYPE_NDP,
+                                                                             if_nbr,
+                                                               (CPU_INT08U *)p_addr,
+                                                                             NET_IPv6_ADDR_SIZE,
+                                                                             p_err);
+    if (p_cache_addr_ndp == (NET_CACHE_ADDR_NDP *)0) {
+       *p_err     = NET_NDP_ERR_NEIGHBOR_CACHE_NOT_FOUND;
+        goto exit_release;
+    }
+
+    p_cache   = (NET_NDP_NEIGHBOR_CACHE *) p_cache_addr_ndp->ParentPtr;
+    is_router = DEF_BIT_IS_SET(p_cache->Flags, NET_NDP_CACHE_FLAG_ISROUTER);
+
+
+   *p_err     = NET_NDP_ERR_NONE;
+
+
+exit_release:
+                                                              /* ----------------- RELEASE NET LOCK ----------------- */
+  Net_GlobalLockRelease();
+
+
+exit_fault:
+    return (is_router);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   NetNDP_RxRouterAdvertisement()
+*
+* Description : Receive Router Advertisement message.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMP packet.
+*               ----        Argument checked   in NetICMPv6_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetICMPv6_Rx().
+*
+*               p_ndp_hdr   Pointer to received packet's NDP header.
+*               ---------   Argument validated in NetICMPv6_Rx()/NetICMPv6_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                Router Adv. successfully processed.
+*                               NET_NDP_ERR_OPT_LEN             Option with Length zero is present.
+*                               NET_NDP_ERR_HW_ADDR_LEN         HW address length is invalid.
+*                               NET_NDP_ERR_HW_ADDR_THIS_HOST   Same HW addr received as host.
+*                               NET_NDP_ERR_OPT_TYPE            Invalid option type.
+*
+*                                                               --- RETURNED BY NetNDP_RouterCfg() : ---
+*                               NET_NDP_ERR_ROUTER_NONE_AVAIL   NO available router to allocate.
+*                               NET_ERR_FAULT_NULL_FNCT           Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL          NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE        Network timer is NOT a valid timer type.
+*
+*                                                               ------ RETURNED BY NetTmr_Set() : ------
+*                               NET_ERR_FAULT_NULL_PTR            Argument 'ptmr' passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT           Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_INVALID_TYPE        Invalid timer type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_Rx().
+*
+* Note(s)     : (1) RFC #4861, Section 6.1.2 states that "A node MUST silently discard any received
+*                   Router Advertisement messages that does not satisfy all of the following validity
+*                   checks":
+*
+*                   (a) IP Source Address is a link-local address.
+*
+*                   (b) The IP Hop Limit field has a value of 255.
+*
+*                   (c) ICMP checksum     is valid.
+*
+*                   (d) ICMP code         is zero.
+*
+*                   (e) ICMP length (derived from the IP length) is 16 or more octets.
+*
+*                   (f) All included options have a length that is greater than zero.
+*
+*               (2) RFC #4861 section 6.3.4 Processing Received Router Advertisements :
+*                   "On receipt of a valid Router Advertisement, a host extracts the source address of
+*                    the packet and does the following:
+*
+*                   (a) If the address is not already present in the host's Default
+*                       Router List, and the advertisement's Router Lifetime is non-
+*                       zero, create a new entry in the list, and initialize its
+*                       invalidation timer value from the advertisement's Router
+*                       Lifetime field.
+*
+*                   (b) If the address is already present in the host's Default Router
+*                       List as a result of a previously received advertisement, reset
+*                       its invalidation timer to the Router Lifetime value in the newly
+*                       received advertisement.
+*
+*                   (c) If the address is already present in the host's Default Router
+*                       List and the received Router Lifetime value is zero, immediately
+*                       time-out the entry."
+*
+*               (3) (a) "If the advertisement contains a Source Link-Layer Address
+*                        option, the link-layer address SHOULD be recorded in the Neighbor
+*                        Cache entry for the router (creating an entry if necessary) and the
+*                        IsRouter flag in the Neighbor Cache entry MUST be set to TRUE."
+*
+*                   (b) "If no Source Link-Layer Address is included, but a corresponding Neighbor
+*                        Cache entry exists, its IsRouter flag MUST be set to TRUE."
+*
+*                   (c) "If a Neighbor Cache entry is created for the router, its reachability state
+*                        MUST be set to STALE as specified in Section 7.3.3."
+*
+*                   (d)"If a cache entry already exists and is updated with a different link-layer address,
+*                       the reachability state MUST also be set to STALE."
+*
+*               (4) "If the MTU option is present, hosts SHOULD copy the option's value into LinkMTU so long
+*                    as the value is greater than or equal to the minimum link MTU [IPv6] and does not
+*                    exceed the maximum LinkMTU value specified in the link-type-specific document."
+*
+*               (5) See NetNDP_RxPrefixUpdate() function description for details on handling Rx Prefix
+*                   Information.
+*
+*               (6) Additional processing of Rx NDP Router Advertisement may be needed to implement in the future
+*                   #### NET-793
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_RxRouterAdvertisement (const  NET_BUF                 *p_buf,
+                                                   NET_BUF_HDR             *p_buf_hdr,
+                                            const  NET_NDP_ROUTER_ADV_HDR  *p_ndp_hdr,
+                                                   NET_ERR                 *p_err)
+{
+    NET_IF_NBR                    if_nbr;
+    NET_NDP_OPT_TYPE              opt_type;
+    NET_NDP_OPT_LEN               opt_len;
+    CPU_INT16U                    opt_len_tot;
+    CPU_INT16U                    opt_len_cnt;
+    CPU_INT08U                   *p_ndp_opt;
+    NET_NDP_ROUTER               *p_router;
+    NET_CACHE_ADDR_NDP           *p_cache_addr_ndp;
+    NET_NDP_NEIGHBOR_CACHE       *p_cache_ndp;
+    NET_NDP_OPT_HDR              *p_ndp_opt_hdr;
+    NET_NDP_OPT_HW_ADDR_HDR      *p_ndp_opt_hw_addr_hdr;
+    NET_NDP_OPT_MTU_HDR          *p_ndp_opt_mtu_hdr;
+    NET_NDP_OPT_PREFIX_INFO_HDR  *p_ndp_opt_prefix_info_hdr;
+    NET_IPv6_ADDR                *p_addr_prefix;
+    NET_IPv6_HDR                 *p_ip_hdr;
+    NET_TMR_TICK                  timeout_tick;
+    CPU_INT32U                    router_mtu;
+    CPU_INT16U                    router_lifetime_sec;
+    CPU_INT32U                    retx_timeout;
+    CPU_INT32U                    lifetime_valid;
+    CPU_INT32U                    lifetime_preferred;
+    CPU_INT08U                    prefix_len;
+    CPU_INT08U                    hop_limit_ip;
+    CPU_INT08U                    hw_addr[NET_IP_HW_ADDR_LEN];
+    CPU_INT08U                    hw_addr_len;
+    CPU_BOOLEAN                   addr_link_local;
+    CPU_BOOLEAN                   addr_cfg_auto;
+    CPU_BOOLEAN                   on_link;
+    CPU_BOOLEAN                   hw_addr_this_host;
+    CPU_BOOLEAN                   opt_type_valid;
+    CPU_BOOLEAN                   opt_type_src_addr;
+    CPU_BOOLEAN                   addr_unspecified;
+    CPU_BOOLEAN                   prefix_Mcast;
+    CPU_BOOLEAN                   prefix_link_local;
+    CPU_BOOLEAN                   addr_cfg_other;
+    CPU_BOOLEAN                   addr_cfg_managed;
+    CPU_SR_ALLOC();
+
+
+    addr_link_local = NetIPv6_IsAddrLinkLocal(&p_buf_hdr->IPv6_AddrSrc);
+    if (addr_link_local == DEF_NO) {
+       *p_err = NET_NDP_ERR_ADDR_SRC;                           /* See Note #1a.                                        */
+        return;
+    }
+
+    p_ip_hdr      = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+    hop_limit_ip = p_ip_hdr->HopLim;
+    if (hop_limit_ip != NET_IPv6_HDR_HOP_LIM_MAX) {
+       *p_err = NET_NDP_ERR_HOP_LIMIT;                          /* See Note #1b.                                        */
+        return;
+    }
+
+    addr_unspecified = NetIPv6_IsAddrUnspecified(&p_buf_hdr->IPv6_AddrSrc);
+    if (addr_unspecified == DEF_TRUE) {
+       *p_err = NET_NDP_ERR_ADDR_SRC;
+        return;
+    }
+
+                                                                /* DHCPv6 Flags                                         */
+    addr_cfg_managed = DEF_BIT_IS_SET(p_ndp_hdr->Flags, NET_NDP_HDR_FLAG_ADDR_CFG_MNGD);
+    addr_cfg_other   = DEF_BIT_IS_SET(p_ndp_hdr->Flags, NET_NDP_HDR_FLAG_ADDR_CFG_OTHER);
+
+    (void)&addr_cfg_managed;
+    (void)&addr_cfg_other;
+
+    if_nbr              = p_buf_hdr->IF_Nbr;
+
+    NET_UTIL_VAL_COPY_GET_NET_16(&router_lifetime_sec, &p_ndp_hdr->RouterLifetime);
+
+    timeout_tick        = (NET_TMR_TICK)router_lifetime_sec * NET_TMR_TIME_TICK_PER_SEC;
+
+                                                                /* ---- UPDATE ROUTER ENTRY IN DEFAULT ROUTER LIST ---- */
+                                                                /* Search in Router List for Address.                   */
+    p_router = NetNDP_RouterSrch(if_nbr,
+                                &p_buf_hdr->IPv6_AddrSrc,
+                                 p_err);
+
+    if ((p_router            == (NET_NDP_ROUTER *)0)  &&        /* Router address is not in Default Router List.        */
+        (router_lifetime_sec != 0)) {                           /* See Note #2a.                                        */
+
+        p_router = NetNDP_RouterCfg(if_nbr,
+                                   &p_buf_hdr->IPv6_AddrSrc,
+                                    DEF_YES,
+                                   &NetNDP_RouterTimeout,
+                                    timeout_tick,
+                                    p_err);
+        if (*p_err != NET_NDP_ERR_NONE) {
+             return;
+        }
+
+        p_router->LifetimeSec = router_lifetime_sec;
+
+    } else if ((p_router            != (NET_NDP_ROUTER *)0)  && /* Router addr is already in list and...                */
+               (router_lifetime_sec != 0)) {                    /* ... router lifetime is non-zero.                     */
+                                                                /* See Note #2b.                                        */
+        if (p_router->TmrPtr != (NET_TMR *)0) {
+                                                                /* Update Router Lifetime tmr.                          */
+            NetTmr_Set(p_router->TmrPtr,
+                      &NetNDP_RouterTimeout,
+                       timeout_tick,
+                       p_err);
+
+            p_router->LifetimeSec = router_lifetime_sec;
+        }
+
+    } else if ((p_router            != (NET_NDP_ROUTER *)0)  && /* Router addr is already in list and...                */
+               (router_lifetime_sec == 0)) {                    /* ... router lifetime = 0.                             */
+                                                                /* See Note #2c.                                        */
+
+        NetNDP_RemoveAddrDestCache(p_router->IF_Nbr,
+                                  &p_router->Addr.Addr[0]);
+        NetNDP_RouterRemove(p_router, DEF_YES);                 /* Remove router from router list.                      */
+
+    } else {                                                    /* Router addr is not in router list and ...            */
+                                                                /* ... lifetime = 0.                                    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.RxInvalidRouterAdvCtr);
+       *p_err = NET_NDP_ERR_ROUTER_NOT_FOUND;
+        return;
+    }
+
+                                                                /* ----------- UPDATE NDP RE-TRANSMIT TIMER ----------- */
+    NET_UTIL_VAL_COPY_GET_NET_32(&retx_timeout, &p_ndp_hdr->ReTxTmr);
+    retx_timeout = retx_timeout/NET_NDP_MS_NBR_PER_SEC;
+    (void)NetNDP_CfgReachabilityTimeout(             NET_NDP_TIMEOUT_SOLICIT,
+                                        (CPU_INT16U) retx_timeout);
+
+                                                                /* ------- SEARCH NEIGHBOR CACHE FOR ROUTER ADDR ------ */
+    p_cache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrSrch(               NET_CACHE_TYPE_NDP,
+                                                                              if_nbr,
+                                                               (CPU_INT08U *)&p_buf_hdr->IPv6_AddrSrc,
+                                                                              NET_IPv6_ADDR_SIZE,
+                                                                              p_err);
+
+
+                                                                /*------------- SCAN RA FOR VALID OPTIONS ------------ */
+    opt_len_tot       =  p_buf_hdr->IP_TotLen - sizeof(NET_NDP_ROUTER_ADV_HDR) + sizeof(CPU_INT32U);
+    p_ndp_opt         = (CPU_INT08U *)&p_ndp_hdr->Opt;
+
+    opt_len_cnt       =  0u;
+    opt_type_valid    =  DEF_NO;
+    opt_type_src_addr =  DEF_NO;
+
+    while(( p_ndp_opt    != (CPU_INT08U *)0)       &&
+          (*p_ndp_opt    != NET_NDP_OPT_TYPE_NONE) &&
+          ( opt_len_cnt  <  opt_len_tot))  {
+
+        p_ndp_opt_hdr = (NET_NDP_OPT_HDR *)p_ndp_opt;
+        opt_type     = p_ndp_opt_hdr->Type;
+        opt_len      = p_ndp_opt_hdr->Len;
+
+        if (opt_len == 0u) {
+           *p_err = NET_NDP_ERR_OPT_LEN;                         /* See Note #1f.                                        */
+            return;
+        }
+
+        switch (opt_type) {
+           case NET_NDP_OPT_TYPE_ADDR_SRC:
+                opt_type_valid        = DEF_YES;
+                opt_type_src_addr     = DEF_YES;
+                p_ndp_opt_hw_addr_hdr = (NET_NDP_OPT_HW_ADDR_HDR *) p_ndp_opt;
+                hw_addr_len           = (opt_len * DEF_OCTET_NBR_BITS) - (NET_NDP_OPT_DATA_OFFSET);
+                if (hw_addr_len != NET_IF_HW_ADDR_LEN_MAX) {
+                   *p_err = NET_NDP_ERR_HW_ADDR_LEN;
+                    return;
+                }
+
+                hw_addr_len = sizeof(hw_addr);
+                NetIF_AddrHW_GetHandler(if_nbr, hw_addr, &hw_addr_len, p_err);
+                if (*p_err != NET_IF_ERR_NONE) {
+                     return;
+                }
+
+                hw_addr_this_host = Mem_Cmp((void     *)&hw_addr[0],
+                                            (void     *)&p_ndp_opt_hw_addr_hdr->Addr[0],
+                                            (CPU_SIZE_T) hw_addr_len);
+                if (hw_addr_this_host == DEF_TRUE) {
+                   *p_err = NET_NDP_ERR_HW_ADDR_THIS_HOST;
+                    return;
+                }
+
+                                                                /* Neighbor cache entry exists for the router.          */
+                                                                /* See Note #3d.                                        */
+                if (p_cache_addr_ndp != (NET_CACHE_ADDR_NDP *)0) {
+
+                    NetNDP_NeighborCacheUpdateEntry(p_cache_addr_ndp,
+                                                   &p_ndp_opt_hw_addr_hdr->Addr[0]);
+
+                    p_cache_ndp = (NET_NDP_NEIGHBOR_CACHE *) p_cache_addr_ndp->ParentPtr;
+                    DEF_BIT_SET(p_cache_ndp->Flags, NET_NDP_CACHE_FLAG_ISROUTER);
+
+                    if (p_router != (NET_NDP_ROUTER *)0) {
+                        p_router->NDP_CachePtr = p_cache_ndp;
+                    }
+                                                                /* No neighbor cache entry exits for the router.        */
+                } else {                                        /* See Note #3a and #3c.                                */
+                    CPU_CRITICAL_ENTER();
+                    timeout_tick = NetNDP_NeighborCacheTimeout_tick;
+                    CPU_CRITICAL_EXIT();
+
+                    p_cache_addr_ndp = NetNDP_NeighborCacheAddEntry(               if_nbr,
+                                                                    (CPU_INT08U *)&p_ndp_opt_hw_addr_hdr->Addr[0],
+                                                                    (CPU_INT08U *)&p_buf_hdr->IPv6_AddrSrc,
+                                                                    (CPU_INT08U *) 0,
+                                                                                   timeout_tick,
+                                                                                  &NetNDP_CacheTimeout,
+                                                                                   NET_NDP_CACHE_STATE_STALE,
+                                                                                   DEF_YES,
+                                                                                   p_err);
+
+                    p_cache_ndp = (NET_NDP_NEIGHBOR_CACHE *)p_cache_addr_ndp->ParentPtr;
+
+                    if (p_router != (NET_NDP_ROUTER *)0) {
+                        p_router->NDP_CachePtr = p_cache_ndp;
+                    }
+
+                }
+                break;
+
+                                                                /* See Note #4.                                        */
+           case NET_NDP_OPT_TYPE_MTU:
+                opt_type_valid = DEF_YES;
+                p_ndp_opt_mtu_hdr = (NET_NDP_OPT_MTU_HDR *) p_ndp_opt;
+                NET_UTIL_VAL_COPY_GET_NET_32(&router_mtu, &p_ndp_opt_mtu_hdr->MTU);
+
+                if ((router_mtu >= NET_IPv6_MAX_DATAGRAM_SIZE_DFLT) &&
+                    (router_mtu <= NET_IF_MTU_ETHER)) {
+                     NetIF_MTU_SetHandler(if_nbr, router_mtu, p_err);
+                }
+                break;
+
+
+           case NET_NDP_OPT_TYPE_PREFIX_INFO:
+                opt_type_valid = DEF_YES;
+
+                if (opt_len != CPU_WORD_SIZE_32) {              /* Prefix Information option must be 32 bytes.          */
+                   *p_err = NET_NDP_ERR_OPT_TYPE;
+                    break;
+                }
+
+                p_ndp_opt_prefix_info_hdr = (NET_NDP_OPT_PREFIX_INFO_HDR *)p_ndp_opt;
+
+                p_addr_prefix             = &p_ndp_opt_prefix_info_hdr->Prefix;
+                prefix_len                =  p_ndp_opt_prefix_info_hdr->PrefixLen;
+
+                if (prefix_len > NET_NDP_PREFIX_LEN_MAX) {      /* Nbr of valid bits of the prefix cannot exceed 128.   */
+                   *p_err = NET_NDP_ERR_OPT_TYPE;
+                    break;
+                }
+
+                prefix_Mcast      = NetIPv6_IsAddrMcast(p_addr_prefix);
+                prefix_link_local = NetIPv6_IsAddrLinkLocal(p_addr_prefix);
+
+                if ((prefix_Mcast      == DEF_YES) ||           /* Prefix must not have a link-local scope and ...      */
+                    (prefix_link_local == DEF_YES)) {           /* ... must not be a multicast addr prefix.             */
+                   *p_err = NET_NDP_ERR_OPT_TYPE;
+                    break;
+                }
+
+                on_link       = DEF_BIT_IS_SET(p_ndp_opt_prefix_info_hdr->Flags, NET_NDP_HDR_FLAG_ON_LINK);
+                addr_cfg_auto = DEF_BIT_IS_SET(p_ndp_opt_prefix_info_hdr->Flags, NET_NDP_HDR_FLAG_ADDR_CFG_AUTO);
+
+                NET_UTIL_VAL_COPY_GET_NET_32(&lifetime_valid,     &p_ndp_opt_prefix_info_hdr->ValidLifetime);
+                NET_UTIL_VAL_COPY_GET_NET_32(&lifetime_preferred, &p_ndp_opt_prefix_info_hdr->PreferredLifetime);
+
+                NetNDP_RxPrefixUpdate(if_nbr,
+                                      p_addr_prefix,
+                                      prefix_len,
+                                      on_link,
+                                      addr_cfg_auto,
+                                      lifetime_valid,
+                                      lifetime_preferred,
+                                      p_err);
+                switch (*p_err) {
+                    case NET_NDP_ERR_NONE:
+                    case NET_NDP_ERR_ADDR_CFG_IN_PROGRESS:
+                    case NET_NDP_ERR_ADDR_CFG_FAILED:
+                         break;
+
+
+                    case NET_NDP_ERR_INVALID_ARG:
+                    case NET_ERR_FAULT_NULL_PTR:
+                    case NET_NDP_ERR_INVALID_PREFIX:
+                    default:
+                         return;
+                }
+                break;
+
+
+           case NET_NDP_OPT_TYPE_ADDR_TARGET:
+           case NET_NDP_OPT_TYPE_REDIRECT:
+                break;
+
+
+           default:
+               *p_err = NET_NDP_ERR_OPT_TYPE;
+                return;
+       }
+
+        p_ndp_opt   += (opt_len * DEF_OCTET_NBR_BITS);
+        opt_len_cnt += (opt_len * DEF_OCTET_NBR_BITS);
+    }
+
+                                                                /* See Note #3b.                                        */
+    if ((opt_type_src_addr == DEF_NO)                &&
+        (p_cache_addr_ndp != (NET_CACHE_ADDR_NDP *)0)){
+         p_cache_ndp = (NET_NDP_NEIGHBOR_CACHE *)p_cache_addr_ndp->ParentPtr;
+         DEF_BIT_SET(p_cache_ndp->Flags, NET_NDP_CACHE_FLAG_ISROUTER);
+    }
+
+    if ((opt_len_tot     > 0)      &&
+        (opt_type_valid == DEF_NO)) {
+        *p_err = NET_NDP_ERR_OPT_TYPE;
+         return;
+    }
+
+    NetNDP_UpdateDefaultRouter(if_nbr, p_err);
+    switch (*p_err) {
+        case NET_NDP_ERR_ROUTER_DFLT_FIND:
+        case NET_NDP_ERR_ROUTER_DFLT_NONE:
+             break;
+
+
+        case NET_NDP_ERR_INVALID_ARG:
+        default:
+             return;
+    }
+
+   *p_err = NET_NDP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetNDP_RxNeighborSolicitation()
+*
+* Description : Receive Neighbor Solicitation message.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received NDP packet.
+*               ----        Argument checked   in NetICMPv6_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetICMPv6_Rx().
+*
+*               p_ndp_hdr   Pointer to received packet's NDP header.
+*               ---------   Argument validated in NetICMPv6_Rx(),
+*                                                 NetICMPv6_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                NS message successfully processed.
+*                               NET_NDP_ERR_HOP_LIMIT           Invalid Hop limit number.
+*                               NET_NDP_ERR_ADDR_TARGET         Invalid target address.
+*                               NET_NDP_ERR_ADDR_DEST           Invalid Destination address.
+*                               NET_NDP_ERR_ADDR_SRC            Invalid Source address.
+*                               NET_NDP_ERR_OPT_LEN             Invalid NDP option length.
+*                               NET_NDP_ERR_OPT_TYPE            Invalid NDP option type.
+*                               NET_NDP_ERR_HW_ADDR_THIS_HOST   Same HW addr received as host.
+*                               NET_NDP_ERR_FAULT               NDP operation faulted.
+*                               NET_NDP_ERR_ADDR_DUPLICATE      IPv6 address is detected has duplicated.
+*
+*                                                               ----------- RETURNED BY NetIF_Get() : ------------
+*                               NET_IF_ERR_INVALID_IF           Invalid interface.
+*
+*                                                               -- RETURNED BY NetNDP_NeighborCacheAddEntry() : --
+*                               NET_ERR_FAULT_NULL_PTR            No Neighbor cache is associated with the NDP cache.
+*                               NET_CACHE_ERR_NONE_AVAIL        NO available caches to allocate.
+*                               NET_CACHE_ERR_INVALID_TYPE      Cache is NOT a valid cache type.
+*                               NET_ERR_FAULT_NULL_FNCT           Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL          NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE        Network timer is NOT a valid timer type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_Rx().
+*
+* Note(s)     : (1) RFC #4861, Section 7.1.1 states that "A node MUST silently discard any received
+*                   Neighbor Solicitation messages that does not satisfy all of the following validity
+*                   checks":
+*
+*                   (a) The IP Hop Limit field has a value of 255.
+*
+*                   (b) ICMP checksum     is valid.
+*
+*                   (c) ICMP code         is zero.
+*
+*                   (d) ICMP length (derived from the IP length) is 24 or more octets.
+*
+*                   (e) Target Address is not a multicast address.
+*
+*                   (f) All included options have a length that is greater than zero.
+*
+*                   (g) If the IP source address is the unspecified address, the IP destination
+*                       address is a solicited-node multicast address,
+*
+*                   (h) If the IP source address is the unspecified address, there is no source
+*                       link-layer address option in the message.
+*
+*               (2) RFC #4861, Section 7.2.3 details the receipt of a Neighbor Solicitation Message :
+*
+*                   (a) "A valid Neighbor Solicitation that does not meet any of the following
+*                        requirements MUST be silently discarded:"
+*
+*                       (1) "The Target Address is a "valid" unicast or anycast address assigned to
+*                            the receiving interface,"
+*
+*                       (2) "The Target Address is a unicast or anycast address for which the node is
+*                            offering proxy service, or"
+*
+*                       (3) "The Target Address is a "tentative" address on which Duplicate Address
+*                            Detection is being performed."
+*
+*                   (b) "If the Target Address is tentative, the Neighbor Solicitation should be
+*                        processed as described in RFC #4862 section 5.4 :"
+*
+*                       (1) "If the target address is tentative, and the source address is a unicast
+*                            address, the solicitation's sender is performing address resolution on the
+*                            target; the solicitation should be silently ignored."
+*
+*                       (2) "Otherwise, processing takes place as described below. In all cases, a node
+*                            MUST NOT respond to a Neighbor Solicitation for a tentative address."
+*
+*                           (A) "If the source address of the Neighbor Solicitation is the unspecified
+*                                address, the solicitation is from a node performing Duplicate Address
+*                                Detection.
+*
+*                               (1) "If the solicitation is from another node, the tentative address is
+*                                    a duplicate and should not be used (by either node)."
+*
+*                               (2) "If the solicitation is from the node itself (because the node loops
+*                                    back multicast packets), the solicitation does not indicate the
+*                                    presence of a duplicate address."
+*
+*                   (c) "If the Source Address is not the unspecified address and, on link layers that
+*                        have addresses, the solicitation includes a Source Link-Layer Address option,
+*                        then the recipient SHOULD create or update the Neighbor Cache entry for the IP
+*                        Source Address of the solicitation."
+*
+*                   (d) "If an entry does not already exist, the node SHOULD create a new one and set
+*                        its reachability state to STALE."
+*
+*                   (e) "If an entry already exists, and the cached link-layer address differs from the
+*                        one in the received Source Link-Layer option, the cached address should be
+*                        replaced by the received address, and the entry's reachability state MUST be
+*                        set to STALE."
+*
+*                   (f) "If a Neighbor Cache entry is created, the IsRouter flag SHOULD be set to FALSE."
+*
+*                   (g) "If a Neighbor Cache entry already exists, its IsRouter flag MUST NOT be
+*                        modified."
+*
+*                   (h) "If the Source Address is the unspecified address, the node MUST NOT create or
+*                        update the Neighbor Cache entry."
+*
+*                   (i) "After any updates to the Neighbor Cache, the node sends a Neighbor Advertisement
+*                        response as described in the next section."
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_RxNeighborSolicitation (const  NET_BUF                   *p_buf,
+                                                    NET_BUF_HDR               *p_buf_hdr,
+                                             const  NET_NDP_NEIGHBOR_SOL_HDR  *p_ndp_hdr,
+                                                    NET_ERR                   *p_err)
+{
+    NET_IF_NBR                if_nbr;
+    NET_IPv6_ADDRS           *p_ipv6_addrs;
+    NET_IPv6_HDR             *p_ip_hdr;
+    NET_CACHE_ADDR_NDP       *p_cache_addr_ndp;
+    NET_NDP_OPT_HDR          *p_ndp_opt_hdr;
+    NET_NDP_OPT_HW_ADDR_HDR  *p_ndp_opt_hw_addr_hdr;
+    NET_NDP_OPT_TYPE          opt_type;
+    NET_NDP_OPT_LEN           opt_len;
+    CPU_INT08U               *p_ndp_opt;
+    CPU_INT08U                hop_limit_ip;
+    CPU_INT08U                hw_addr[NET_IP_HW_ADDR_LEN];
+    CPU_INT08U                hw_addr_len;
+    CPU_INT16U                opt_len_tot;
+    CPU_INT16U                opt_len_cnt;
+    CPU_BOOLEAN               addr_mcast;
+    CPU_BOOLEAN               addr_mcast_sol_node;
+    CPU_BOOLEAN               addr_unspecified;
+    CPU_BOOLEAN               hw_addr_this_host;
+    CPU_BOOLEAN               opt_type_src_addr;
+    CPU_BOOLEAN               addr_identical;
+    NET_TMR_TICK              timeout_tick;
+#ifdef NET_DAD_MODULE_EN
+    NET_DAD_OBJ              *p_dad_obj;
+#endif
+    CPU_SR_ALLOC();
+
+
+    if_nbr        =  p_buf_hdr->IF_Nbr;
+
+                                                                /* Get IF protocol HW addr and addr size.                */
+    hw_addr_len = sizeof(hw_addr);
+    NetIF_AddrHW_GetHandler(if_nbr, hw_addr, &hw_addr_len, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+
+    p_ip_hdr      = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+    hop_limit_ip  = p_ip_hdr->HopLim;
+
+    if (hop_limit_ip != NET_IPv6_HDR_HOP_LIM_MAX) {
+       *p_err = NET_NDP_ERR_HOP_LIMIT;                          /* See Note #1a.                                        */
+        return;
+    }
+
+    addr_mcast = NetIPv6_IsAddrMcast(&p_ndp_hdr->TargetAddr);
+    if (addr_mcast == DEF_YES) {
+       *p_err = NET_NDP_ERR_ADDR_TARGET;                        /* See Note #1e.                                        */
+        return;
+    }
+
+    addr_unspecified = NetIPv6_IsAddrUnspecified(&p_buf_hdr->IPv6_AddrSrc);
+    if (addr_unspecified == DEF_YES) {
+        addr_mcast_sol_node = NetIPv6_IsAddrMcastSolNode(&p_buf_hdr->IPv6_AddrDest,
+                                                         &p_ndp_hdr->TargetAddr );
+        if (addr_mcast_sol_node == DEF_NO) {
+            *p_err = NET_NDP_ERR_ADDR_DEST;                     /* See Note #1g.                                        */
+             return;
+        }
+    }
+
+                                                                /* Verify if target address is in IF address list.      */
+    p_ipv6_addrs = NetIPv6_GetAddrsHostOnIF(p_buf_hdr->IF_Nbr,
+                                           &p_ndp_hdr->TargetAddr);
+    if (p_ipv6_addrs != DEF_NULL) {
+        if (p_ipv6_addrs->AddrState == NET_IPv6_ADDR_STATE_TENTATIVE) {
+            addr_identical = NetIPv6_IsAddrsIdentical(&p_buf_hdr->IPv6_AddrDest, &p_ndp_hdr->TargetAddr);
+            if (addr_identical == DEF_YES) {                    /* Discard packet if src addr is same as target addr.   */
+               *p_err = NET_NDP_ERR_ADDR_DEST;
+                return;
+            }
+
+            if (addr_unspecified == DEF_NO) {
+               *p_err = NET_NDP_ERR_ADDR_TARGET;                 /* See Note #2b1.                                       */
+                return;
+            } else {
+#ifdef  NET_DAD_MODULE_EN
+                hw_addr_this_host = Mem_Cmp((void     *)&hw_addr[0],
+                                            (void     *) p_buf_hdr->IF_HW_AddrSrcPtr,
+                                            (CPU_SIZE_T) p_buf_hdr->IF_HW_AddrLen);
+                if (hw_addr_this_host != DEF_YES) {
+                    p_dad_obj = NetDAD_ObjSrch(&p_ipv6_addrs->AddrHost, p_err);
+                    if (*p_err != NET_DAD_ERR_NONE) {
+                        *p_err = NET_NDP_ERR_FAULT;
+                         return;
+                    }
+
+                    NetDAD_Signal(NET_DAD_SIGNAL_TYPE_ERR, p_dad_obj, p_err);
+                    if (*p_err != NET_DAD_ERR_NONE) {
+                        *p_err = NET_NDP_ERR_FAULT;
+                         return;
+                    }
+
+                   *p_err = NET_NDP_ERR_ADDR_DUPLICATE;
+                    return;
+                } else {
+                   *p_err = NET_NDP_ERR_HW_ADDR_THIS_HOST;
+                    return;
+                }
+#else
+               *p_err = NET_NDP_ERR_ADDR_TENTATIVE;
+                return;
+#endif
+            }
+        }
+    }
+
+    opt_len_tot           = p_buf_hdr->IP_TotLen - sizeof(NET_NDP_NEIGHBOR_SOL_HDR) + CPU_WORD_SIZE_32;
+
+    p_ndp_opt             = (CPU_INT08U *)             &p_ndp_hdr->Opt;
+    p_ndp_opt_hdr         = (NET_NDP_OPT_HDR *)         p_ndp_opt;
+    p_ndp_opt_hw_addr_hdr = (NET_NDP_OPT_HW_ADDR_HDR *) p_ndp_opt;
+
+    if ((addr_unspecified == DEF_YES) &&                        /* Case when the src addr is unspecified and there...   */
+        (opt_len_tot      == 0)) {                              /* ..is no opt field.                                   */
+
+        NET_UTIL_IPv6_ADDR_SET_MCAST_ALL_NODES(p_buf_hdr->IPv6_AddrDest);
+        p_ndp_opt_hdr->Type = NET_NDP_OPT_TYPE_ADDR_TARGET;     /* Set NDP option type for NA to Tx.                    */
+
+        NetICMPv6_TxMsgReply((NET_BUF        *)p_buf,
+                                               p_buf_hdr,
+                             (NET_ICMPv6_HDR *)p_ndp_hdr,
+                                               p_err);
+        switch (*p_err) {
+            case NET_ICMPv6_ERR_NONE:
+                 break;
+
+
+            case NET_ERR_TX:
+            case NET_ERR_IF_LOOPBACK_DIS:
+            case NET_ERR_IF_LINK_DOWN:
+            default:
+                *p_err = NET_NDP_ERR_FAULT;
+                 return;
+        }
+
+    } else if ((addr_unspecified == DEF_NO )  &&                /* Case when one or more option fields are present.     */
+               (opt_len_tot      != 0)) {
+
+        opt_type_src_addr = DEF_NO;
+        opt_len_cnt       = 0u;
+
+        while ( (opt_len_cnt  <  opt_len_tot)     &&
+                (p_ndp_opt    != (CPU_INT08U *)0)  &&
+               (*p_ndp_opt    != NET_NDP_OPT_TYPE_NONE)) {
+
+            p_ndp_opt_hdr         = (NET_NDP_OPT_HDR *)         p_ndp_opt;
+            p_ndp_opt_hw_addr_hdr = (NET_NDP_OPT_HW_ADDR_HDR *) p_ndp_opt;
+            opt_type              = p_ndp_opt_hdr->Type;
+            opt_len               = p_ndp_opt_hdr->Len;
+
+            if (opt_len == 0u) {
+               *p_err = NET_NDP_ERR_OPT_LEN;                    /* See Note #1f.                                        */
+                return;
+            }
+
+            if (opt_type == NET_NDP_OPT_TYPE_ADDR_SRC) {        /* Only Source Link-Layer Addr Option type is valid.    */
+
+                opt_type_src_addr = DEF_YES;
+
+                hw_addr_len = (opt_len * DEF_OCTET_NBR_BITS) - (NET_NDP_OPT_DATA_OFFSET);
+                if (hw_addr_len != NET_IF_HW_ADDR_LEN_MAX) {
+                   *p_err = NET_NDP_ERR_HW_ADDR_LEN;
+                    return;
+                }
+
+                hw_addr_this_host = Mem_Cmp((void     *)&hw_addr[0],
+                                            (void     *)&p_ndp_opt_hw_addr_hdr->Addr,
+                                            (CPU_SIZE_T) hw_addr_len);
+                if (hw_addr_this_host == DEF_TRUE) {
+                    *p_err = NET_NDP_ERR_HW_ADDR_THIS_HOST;
+                     return;
+                }
+                                                                /* Search in cache for Address.                         */
+                p_cache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrSrch(               NET_CACHE_TYPE_NDP,
+                                                                                          if_nbr,
+                                                                           (CPU_INT08U *)&p_buf_hdr->IPv6_AddrSrc,
+                                                                                          NET_IPv6_ADDR_SIZE,
+                                                                                          p_err);
+                if (p_cache_addr_ndp == (NET_CACHE_ADDR_NDP *)0) {  /* See Note #2d. If NDP cache not found, ...        */
+
+                    CPU_CRITICAL_ENTER();
+                    timeout_tick = NetNDP_NeighborCacheTimeout_tick;
+                    CPU_CRITICAL_EXIT();
+
+                    NetNDP_NeighborCacheAddEntry(               if_nbr,
+                                                 (CPU_INT08U *)&p_ndp_opt_hw_addr_hdr->Addr[0],
+                                                 (CPU_INT08U *)&p_buf_hdr->IPv6_AddrSrc,
+                                                 (CPU_INT08U *) 0,
+                                                                timeout_tick,
+                                                                NetNDP_CacheTimeout,
+                                                                NET_NDP_CACHE_STATE_STALE,
+                                                                DEF_NO,
+                                                                p_err);
+                    if (*p_err != NET_NDP_ERR_NONE) {
+                         return;
+                    }
+
+                } else {                                        /* See Note #2e. If NDP cache found, ...                */
+
+                    NetNDP_NeighborCacheUpdateEntry(p_cache_addr_ndp,
+                                                   &p_ndp_opt_hw_addr_hdr->Addr[0]);
+                }
+
+                p_ndp_opt_hdr->Type = NET_NDP_OPT_TYPE_ADDR_TARGET;
+                                                                /* See Note #2i.                                        */
+                NetICMPv6_TxMsgReply((NET_BUF        *)p_buf,
+                                                       p_buf_hdr,
+                                     (NET_ICMPv6_HDR *)p_ndp_hdr,
+                                                       p_err);
+                switch (*p_err) {
+                    case NET_ICMPv6_ERR_NONE:
+                         break;
+
+
+                    case NET_ERR_TX:
+                    case NET_ERR_IF_LOOPBACK_DIS:
+                    case NET_ERR_IF_LINK_DOWN:
+                    default:
+                        *p_err = NET_NDP_ERR_FAULT;
+                         return;
+                }
+            }
+
+            p_ndp_opt    += (opt_len * DEF_OCTET_NBR_BITS);
+            opt_len_cnt  += (opt_len * DEF_OCTET_NBR_BITS);
+        }
+
+        if (opt_type_src_addr == DEF_NO) {                      /* Case when no Source Link-Layer Address option ...    */
+           *p_err = NET_NDP_ERR_OPT_TYPE;                       /* ... is included in received NS.                      */
+            return;
+        }
+
+    } else if (addr_unspecified == DEF_NO &&                    /* RFC#4861 s7.2.4 p.64                                 */
+              (opt_len_tot      == 0)) {                        /* Case when no option is included in the NS.           */
+
+        p_ndp_opt_hdr->Type = NET_NDP_OPT_TYPE_ADDR_TARGET;
+
+        NetICMPv6_TxMsgReply((NET_BUF        *)p_buf,
+                                               p_buf_hdr,
+                             (NET_ICMPv6_HDR *)p_ndp_hdr,
+                                               p_err);
+        switch (*p_err) {
+            case NET_ICMPv6_ERR_NONE:
+                 break;
+
+
+            case NET_ERR_TX:
+            case NET_ERR_IF_LOOPBACK_DIS:
+            case NET_ERR_IF_LINK_DOWN:
+            default:
+                *p_err = NET_NDP_ERR_FAULT;
+                 return;
+        }
+
+    } else {
+       *p_err = NET_NDP_ERR_ADDR_SRC;
+        return;
+    }
+
+   *p_err = NET_NDP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetNDP_RxNeighborAdvertisement()
+*
+* Description : Receive Neighbor Advertisement message.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received NDP packet.
+*               ----        Argument checked   in NetICMPv6_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetICMPv6_Rx().
+*
+*               p_ndp_hdr   Pointer to received packet's NDP header.
+*               ---------   Argument validated in NetICMPv6_Rx()/NetICMPv6_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                      NA successfully processed
+*
+*                               NET_NDP_ERR_HOP_LIMIT                 Invalid Hop-limit in Neighbor Adv.
+*                               NET_NDP_ERR_ADDR_SRC                  Invalid source addr in Neighbor Adv.
+*                               NET_NDP_ERR_ADDR_DEST                 Invalid destination addr in Neighbor Adv.
+*                               NET_NDP_ERR_OPT_LEN                   Invalid option length in Neighbor Adv.
+*                               NET_NDP_ERR_NEIGHBOR_CACHE_NOT_FOUND  No Neighbor cache find for Neighbor Adv addr.
+*                               NET_NDP_ERR_HW_ADDR_LEN               Invalid HW addr len in Neighbor Adv.
+*                               NET_NDP_ERR_OPT_TYPE                  Invalid option type in Rx Neighbor Adv.
+*                               NET_NDP_ERR_ADDR_DUPLICATE            IPv6 address detected has duplicated.
+*                               NET_NDP_ERR_FAULT                     NDP operation faulted.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_Rx().
+*
+* Note(s)     : (1) RFC #4861, Section 7.1.2 states that "A node MUST silently discard any received
+*                   Neighbor Advertisement messages that does not satisfy all of the following validity
+*                   checks":
+*
+*                   (a) The IP Hop Limit field has a value of 255.
+*
+*                   (b) ICMP checksum     is valid.
+*
+*                   (d) ICMP code         is zero.
+*
+*                   (e) ICMP length (derived from the IP length) is 24 or more octets.
+*
+*                   (f) Target address is NOT a multicast address.
+*
+*                   (g) If the IP destination address is a multicast address, the solicited flag is zero.
+*
+*                   (h) All included options have a length that is greater than zero.
+*
+*               (2) RFC #4862, Section 5.4.4 states that "On receipt of a valid Neighbor Advertisement
+*                   message on an interface, node behavior depends on whether the target address is
+*                   tentative or matches a unicast or anycast address assigned to the interface: "
+*
+*                   (a) "If the target address is tentative, the tentative address is not unique."
+*
+*                   (b) "If the target address matches a unicast address assigned to the receiving
+*                        interface, it would possibly indicate that the address is a duplicate but it
+*                        has not been detected by the Duplicate Address Detection procedure (recall that
+*                        Duplicate Address Detection is not completely reliable).  How to handle such a
+*                        case is beyond the scope of this document."
+*
+*                   (c) "Otherwise, the advertisement is processed as described in [RFC4861]."
+*
+*               (3) RFC #4861, Section 7.2.5 details the receipt of a Neighbor Advertisement Message :
+*
+*                   (a) "When a valid Neighbor Advertisement is received (either solicited or
+*                        unsolicited), the Neighbor Cache is searched for the target's entry. If no
+*                        entry exists, the advertisement SHOULD be silently discarded."
+*
+*                   (b) "If the target's Neighbor Cache entry is in the INCOMPLETE state when the
+*                        advertisement is received, one of two things happens :
+*
+*                       (1) "If the link layer has addresses and no Target Link-Layer Address option is
+*                            included, the receiving node SHOULD silently discard the received."
+*
+*                       (2) "Otherwise, the receiving node performs the following steps:"
+*
+*                           (A) "It records the link-layer address in the Neighbor Cache entry"
+*
+*                           (B) "If the advertisement's Solicited flag is set, the state of the entry is
+*                                set to REACHABLE; otherwise, it is set to STALE"
+*
+*                           (C) "It sets the IsRouter flag in the cache entry based on the Router flag
+*                                in the received advertisement"
+*
+*                           (D) "It sends any packets queued for the neighbor awaiting address
+*                                resolution."
+*
+*                   (c) "If the target's Neighbor Cache entry is in any state other than INCOMPLETE when
+*                        the advertisement is received, the following actions take place:"
+*
+*                       (1) "If the Override flag is clear and the supplied link-layer address differs
+*                            from that in the cache, then one of two actions takes place:"
+*                           (A) "If the state of the entry is REACHABLE, set it to STALE, but do not
+*                                update the entry in any other way."
+*
+*                           (B) "Otherwise, the received advertisement should be ignored and MUST NOT
+*                                update the cache"
+*
+*                       (2) "If the Override flag is set, or the supplied link-layer address is the same
+*                            as that in the cache, or no Target Link-Layer Address option was supplied,
+*                            the received advertisement MUST update the Neighbor Cache entry as follows:"
+*
+*                           (A) "The link-layer address in the Target Link-Layer Address option MUST be
+*                                inserted in the cache (if one is supplied and differs from the already
+*                                recorded address)"
+*
+*                           (B) "If the Solicited flag is set, the state of the entry MUST be set to
+*                                REACHABLE.  If the Solicited flag is zero and the link-layer address
+*                                was updated with a different address, the state MUST be set to STALE.
+*                                Otherwise, the entry's state remains unchanged."
+*
+*                           (C) "The IsRouter flag in the cache entry MUST be set based on the Router
+*                                flag in the received advertisement.  In those cases where the IsRouter
+*                                flag changes from TRUE to FALSE as a result of this update, the node
+*                                MUST remove that router from the Default Router List and update the
+*                                Destination Cache entries for all destinations using that neighbor as a
+*                                router as specified in Section 7.3.3.  This is needed to detect when a
+*                                node that is used as a router stops forwarding packets due to being
+*                                configured as a host."
+*
+*                   (d) "If none of the above apply, the advertisement prompts future Neighbor
+*                        Unreachability Detection (if it is not already in progress) by changing the
+*                        state in the cache entry."
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_RxNeighborAdvertisement (const  NET_BUF                   *p_buf,
+                                                     NET_BUF_HDR               *p_buf_hdr,
+                                              const  NET_NDP_NEIGHBOR_ADV_HDR  *p_ndp_hdr,
+                                                     NET_ERR                   *p_err)
+{
+    NET_CACHE_ADDR_NDP       *p_cache_addr_ndp;
+    NET_NDP_NEIGHBOR_CACHE   *p_cache_ndp;
+    NET_NDP_ROUTER           *p_router;
+    NET_NDP_OPT_HDR          *p_ndp_opt_hdr;
+    NET_NDP_OPT_HW_ADDR_HDR  *p_ndp_opt_hw_addr_hdr = DEF_NULL;
+    NET_IPv6_HDR             *p_ip_hdr;
+    NET_IPv6_ADDRS           *p_ipv6_addrs;
+    NET_BUF                  *p_buf_head;
+    CPU_INT08U               *p_ndp_opt;
+    NET_NDP_OPT_TYPE          opt_type;
+    NET_NDP_OPT_LEN           opt_len;
+    NET_TMR_TICK              timeout_tick;
+    NET_IF_NBR                if_nbr;
+    CPU_FNCT_PTR              tmr_fnct;
+    CPU_INT08U                hw_addr_len;
+    CPU_INT08U                cache_state;
+    CPU_INT08U                hop_limit_ip;
+    CPU_INT16U                opt_len_tot;
+    CPU_INT16U                opt_len_cnt;
+    CPU_INT32U                flags;
+    CPU_BOOLEAN               is_solicited;
+    CPU_BOOLEAN               is_override;
+    CPU_BOOLEAN               is_router;
+    CPU_BOOLEAN               addr_mcast;
+    CPU_BOOLEAN               same_hw_addr;
+    CPU_BOOLEAN               opt_type_target_addr;
+    CPU_BOOLEAN               addr_identical;
+#ifdef NET_DAD_MODULE_EN
+    NET_DAD_OBJ              *p_dad_obj;
+#endif
+    CPU_SR_ALLOC();
+
+
+    if_nbr = p_buf_hdr->IF_Nbr;
+
+    NET_UTIL_VAL_COPY_GET_NET_32(&flags, &p_ndp_hdr->Flags);
+
+    is_override  = DEF_BIT_IS_SET(flags, NET_NDP_HDR_FLAG_OVRD);
+    is_solicited = DEF_BIT_IS_SET(flags, NET_NDP_HDR_FLAG_SOL);
+    is_router    = DEF_BIT_IS_SET(flags, NET_NDP_HDR_FLAG_ROUTER);
+
+                                                                /* ----------------- RX NA VALIDATION ----------------- */
+    p_ip_hdr      = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+    hop_limit_ip = p_ip_hdr->HopLim;
+    if (hop_limit_ip != NET_IPv6_HDR_HOP_LIM_MAX) {             /* See Note #1a.                                        */
+       *p_err = NET_NDP_ERR_HOP_LIMIT;
+        return;
+    }
+
+    addr_mcast = NetIPv6_IsAddrMcast(&p_ndp_hdr->TargetAddr);
+    if (addr_mcast == DEF_YES) {                                /* See Note #1f.                                        */
+       *p_err = NET_NDP_ERR_ADDR_TARGET;
+        return;
+    }
+
+    addr_mcast = NetIPv6_IsAddrMcast(&p_buf_hdr->IPv6_AddrDest);
+    if (addr_mcast == DEF_YES) {                                /* See Note #1g.                                        */
+        if (is_solicited == DEF_YES) {
+          *p_err = NET_NDP_ERR_ADDR_DEST;
+           return;
+        }
+    }
+
+                                                                /* --------- SEARCH IN IF IPv6 CFGD ADDR LIST -------- */
+    p_ipv6_addrs = NetIPv6_GetAddrsHostOnIF(p_buf_hdr->IF_Nbr,
+                                           &p_ndp_hdr->TargetAddr);
+
+    if (p_ipv6_addrs != DEF_NULL) {
+        switch (p_ipv6_addrs->AddrState) {
+            case NET_IPv6_ADDR_STATE_TENTATIVE:
+                 addr_identical = NetIPv6_IsAddrsIdentical(&p_buf_hdr->IPv6_AddrDest, &p_ndp_hdr->TargetAddr);
+                 if (addr_identical == DEF_YES) {               /* Discard packet if src addr is same as target addr.   */
+                    *p_err = NET_NDP_ERR_ADDR_DEST;
+                     return;
+                 }
+#ifdef  NET_DAD_MODULE_EN
+                 p_dad_obj = NetDAD_ObjSrch(&p_ipv6_addrs->AddrHost, p_err);
+                 if (*p_err != NET_DAD_ERR_NONE) {
+                     *p_err = NET_NDP_ERR_FAULT;
+                      return;
+                 }
+
+                 NetDAD_Signal(NET_DAD_SIGNAL_TYPE_ERR, p_dad_obj, p_err);           /* See Note #2a.                   */
+                 if (*p_err != NET_DAD_ERR_NONE) {
+                     *p_err = NET_NDP_ERR_FAULT;
+                      return;
+                 }
+#endif
+                *p_err = NET_NDP_ERR_ADDR_DUPLICATE;
+                 return;
+
+
+            case NET_IPv6_ADDR_STATE_PREFERRED:                 /* See Note #2b.                                        */
+            case NET_IPv6_ADDR_STATE_DEPRECATED:
+#ifdef  NET_DAD_MODULE_EN
+                 NET_CTR_ERR_INC(Net_ErrCtrs.NDP.RxNeighborAdvAddrDuplicateCtr);
+#endif
+                *p_err = NET_NDP_ERR_ADDR_DUPLICATE;
+                 return;
+
+
+            case NET_IPv6_ADDR_STATE_NONE:
+            case NET_IPv6_ADDR_STATE_DUPLICATED:
+            default:
+                 break;
+        }
+    }
+
+                                                                /* --- SEARCH IN NEIGHBOR CACHE FOR IPv6 TARGET ADDR -- */
+    p_cache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrSrch(               NET_CACHE_TYPE_NDP,
+                                                                              if_nbr,
+                                                               (CPU_INT08U *)&p_ndp_hdr->TargetAddr,
+                                                                              NET_IPv6_ADDR_SIZE,
+                                                                              p_err);
+
+    if (p_cache_addr_ndp == (NET_CACHE_ADDR_NDP *)0) {          /* See Note #3a.                                        */
+       *p_err = NET_NDP_ERR_NEIGHBOR_CACHE_NOT_FOUND;
+        return;
+    }
+
+    p_cache_ndp = (NET_NDP_NEIGHBOR_CACHE *) p_cache_addr_ndp->ParentPtr;
+    cache_state = p_cache_ndp->State;
+
+                                                                /*------------- SCAN NA FOR VALID OPTIONS ------------ */
+    opt_len_tot          =  p_buf_hdr->IP_TotLen - sizeof(NET_NDP_NEIGHBOR_ADV_HDR) + CPU_WORD_SIZE_32;
+    p_ndp_opt            = (CPU_INT08U *)&p_ndp_hdr->Opt;
+    opt_type_target_addr =  DEF_NO;
+    opt_len_cnt          =  0u;
+
+    while(( p_ndp_opt    != (CPU_INT08U *)0)       &&
+          ( opt_len_cnt  <  opt_len_tot))  {
+
+        p_ndp_opt_hdr = (NET_NDP_OPT_HDR *)p_ndp_opt;
+        opt_type      = p_ndp_opt_hdr->Type;
+        opt_len       = p_ndp_opt_hdr->Len;
+
+        if (opt_len == 0u) {
+           *p_err = NET_NDP_ERR_OPT_LEN;                        /* See Note #1f.                                        */
+            return;
+        }
+
+        switch (opt_type) {
+            case NET_NDP_OPT_TYPE_ADDR_TARGET :
+                 opt_type_target_addr  = DEF_YES;
+                 p_ndp_opt_hw_addr_hdr = (NET_NDP_OPT_HW_ADDR_HDR *) p_ndp_opt;
+
+                 hw_addr_len = (opt_len * DEF_OCTET_NBR_BITS) - (NET_NDP_OPT_DATA_OFFSET);
+
+                 if (hw_addr_len != NET_IF_HW_ADDR_LEN_MAX) {
+                    *p_err = NET_NDP_ERR_HW_ADDR_LEN;
+                     return;
+                 }
+                 break;
+
+
+            case NET_NDP_OPT_TYPE_NONE:
+            case NET_NDP_OPT_TYPE_ADDR_SRC:
+            case NET_NDP_OPT_TYPE_PREFIX_INFO:
+            case NET_NDP_OPT_TYPE_REDIRECT:
+            case NET_NDP_OPT_TYPE_MTU:
+            default:
+                 break;
+
+        }
+
+        p_ndp_opt   += (opt_len * DEF_OCTET_NBR_BITS);
+        opt_len_cnt += (opt_len * DEF_OCTET_NBR_BITS);
+    }
+
+                                                                /*------------------- RX NA HANDLING ------------------ */
+    if (cache_state == NET_NDP_CACHE_STATE_INCOMPLETE) {
+        if (opt_type_target_addr == DEF_YES) {
+            Mem_Copy((void     *)&p_cache_addr_ndp->AddrHW[0],          /* See Note #3b2A.                              */
+                     (void     *)&p_ndp_opt_hw_addr_hdr->Addr[0],
+                     (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+
+            p_cache_addr_ndp->AddrHW_Valid = DEF_YES;
+
+                                                                /* See Note #3b2B.                                      */
+            if (is_solicited == DEF_YES) {
+                CPU_CRITICAL_ENTER();
+                timeout_tick = NetNDP_ReachableTimeout_tick;
+                CPU_CRITICAL_EXIT();
+                tmr_fnct = NetNDP_ReachableTimeout;
+                p_cache_ndp->State = NET_NDP_CACHE_STATE_REACHABLE;
+
+            } else {
+                CPU_CRITICAL_ENTER();
+                timeout_tick = NetNDP_NeighborCacheTimeout_tick;
+                CPU_CRITICAL_EXIT();
+                tmr_fnct = NetNDP_CacheTimeout;
+                p_cache_ndp->State = NET_NDP_CACHE_STATE_STALE;
+            }
+
+                                                                /* Reset cache tmr.                                     */
+            NetTmr_Set(p_cache_ndp->TmrPtr,
+                       tmr_fnct,
+                       timeout_tick,
+                       p_err);
+            if (*p_err != NET_TMR_ERR_NONE) {
+                *p_err = NET_NDP_ERR_FAULT;
+                 return;
+            }
+                                                                /* See Note #3b2C.                                      */
+            if(is_router == DEF_YES) {
+                DEF_BIT_SET(p_cache_ndp->Flags, NET_NDP_CACHE_FLAG_ISROUTER);
+            }
+
+                                                                /* Re-initialize nbr of Solicitations sent.             */
+            p_cache_ndp->ReqAttemptsCtr = 0;
+
+                                                                /* See Note #3b2D.                                      */
+            p_buf_head                  =  p_cache_addr_ndp->TxQ_Head;
+            p_cache_addr_ndp->TxQ_Head  = (NET_BUF *)0;
+            p_cache_addr_ndp->TxQ_Tail  = (NET_BUF *)0;
+            p_cache_addr_ndp->TxQ_Nbr   = 0;
+
+            NetCache_TxPktHandler(NET_PROTOCOL_TYPE_NDP,
+                                  p_buf_head,
+                                 &p_ndp_opt_hw_addr_hdr->Addr[0]);
+        } else {                                                /* See Note #3b1.                                       */
+            *p_err = NET_NDP_ERR_OPT_TYPE;
+             return;
+        }
+
+    } else {                                                    /* Neighbor cache state other than INCOMPLETE.          */
+        if (p_ndp_opt_hw_addr_hdr != DEF_NULL) {
+            same_hw_addr =  Mem_Cmp((void     *)&p_cache_addr_ndp->AddrHW,
+                                    (void     *)&p_ndp_opt_hw_addr_hdr->Addr,
+                                    (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+        } else {
+            same_hw_addr = DEF_NO;
+        }
+
+        if((is_override  == DEF_NO) &&
+           (same_hw_addr == DEF_NO)    ) {                      /* See Note #3c1.                                       */
+
+            if (p_cache_ndp->State == NET_NDP_CACHE_STATE_REACHABLE) {  /* See Note #3c1A & #3c1B.                      */
+                p_cache_ndp->State = NET_NDP_CACHE_STATE_STALE;
+                CPU_CRITICAL_ENTER();
+                timeout_tick = NetNDP_NeighborCacheTimeout_tick;
+                CPU_CRITICAL_EXIT();
+                NetTmr_Set(p_cache_ndp->TmrPtr,
+                           NetNDP_CacheTimeout,
+                           timeout_tick,
+                           p_err);
+                if (*p_err != NET_TMR_ERR_NONE) {
+                    *p_err = NET_NDP_ERR_FAULT;
+                     return;
+                }
+            }
+
+        } else if((is_override          == DEF_YES)  ||         /* See Note #3c2.                                       */
+                  (same_hw_addr         == DEF_YES)  ||
+                  (opt_type_target_addr == DEF_NO)) {
+
+            if (opt_type_target_addr == DEF_YES &&              /* See Note #3c2A.                                      */
+                same_hw_addr         == DEF_NO) {
+                Mem_Copy((void     *)&p_cache_addr_ndp->AddrHW,
+                         (void     *)&p_ndp_opt_hw_addr_hdr->Addr,
+                         (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+            }
+
+            if (is_solicited == DEF_YES) {                      /* See Note #3c2B.                                      */
+                p_cache_ndp->State = NET_NDP_CACHE_STATE_REACHABLE;
+                CPU_CRITICAL_ENTER();
+                timeout_tick = NetNDP_ReachableTimeout_tick;
+                CPU_CRITICAL_EXIT();
+                NetTmr_Set(p_cache_ndp->TmrPtr,
+                           NetNDP_ReachableTimeout,
+                           timeout_tick,
+                           p_err);
+                if (*p_err != NET_TMR_ERR_NONE) {
+                    *p_err = NET_NDP_ERR_FAULT;
+                     return;
+                }
+
+            } else {
+                if (same_hw_addr == DEF_NO) {
+                    p_cache_ndp->State = NET_NDP_CACHE_STATE_STALE;
+                    CPU_CRITICAL_ENTER();
+                    timeout_tick = NetNDP_NeighborCacheTimeout_tick;
+                    CPU_CRITICAL_EXIT();
+                    NetTmr_Set(p_cache_ndp->TmrPtr,
+                               NetNDP_CacheTimeout,
+                               timeout_tick,
+                               p_err);
+                    if (*p_err != NET_TMR_ERR_NONE) {
+                        *p_err = NET_NDP_ERR_FAULT;
+                         return;
+                    }
+                }
+            }
+                                                                /* See Note #3c2C.                                      */
+            if (is_router == DEF_YES) {
+                DEF_BIT_SET(p_cache_ndp->Flags, NET_NDP_CACHE_FLAG_ISROUTER);
+
+            } else {
+                DEF_BIT_CLR(p_cache_ndp->Flags, NET_NDP_CACHE_FLAG_ISROUTER);
+
+                p_router = NetNDP_RouterSrch(                  if_nbr,
+                                             (NET_IPv6_ADDR *)&p_cache_addr_ndp->AddrProtocol[0],
+                                                               p_err);
+                if (p_router != (NET_NDP_ROUTER *)0) {
+                    NetNDP_RemoveAddrDestCache(p_cache_addr_ndp->IF_Nbr, &p_cache_addr_ndp->AddrProtocol[0]);
+                    NetNDP_RouterRemove(p_router, DEF_YES);
+                    NetNDP_UpdateDefaultRouter(p_cache_addr_ndp->IF_Nbr, p_err);
+                    switch (*p_err) {
+                        case NET_NDP_ERR_ROUTER_DFLT_FIND:
+                        case NET_NDP_ERR_ROUTER_DFLT_NONE:
+                             break;
+
+
+                        case NET_NDP_ERR_INVALID_ARG:
+                        default:
+                             return;
+                    }
+                }
+            }
+        }
+    }
+
+   *p_err = NET_NDP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_RxRedirect()
+*
+* Description : Receive Redirect message.
+*
+* Argument(s) : p_buf       Pointer to network buffer that received ICMP packet.
+*               ----        Argument checked   in NetICMPv6_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetICMPv6_Rx().
+*
+*               p_ndp_hdr   Pointer to received packet's NDP header.
+*               ---------   Argument validated in NetICMPv6_Rx()/NetICMPv6_RxPktValidateBuf().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                Redirect message successfully processed.
+*                               NET_NDP_ERR_HOP_LIMIT           Invalid Hop Limit
+*                               NET_NDP_ERR_ADDR_SRC            Invalid source address
+*                               NET_NDP_ERR_ADDR_DEST           Invalid destination address
+*                               NET_NDP_ERR_ADDR_TARGET         Invalid target address
+*                               NET_NDP_ERR_OPT_LEN             Invalid option length
+*                               NET_NDP_ERR_HW_ADDR_LEN         Invalid HW address length
+*                               NET_NDP_ERR_OPT_TYPE            Invalid option type
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_Rx().
+*
+* Note(s)     : (1) RFC #4861, Section 8.1 states that "A host MUST silently discard any received
+*                   Redirect messages that does not satisfy all of the following validity
+*                   checks":
+*
+*                   (a) IP Source Address is a link-local address.
+*
+*                   (b) The IP Hop Limit field has a value of 255.
+*
+*                   (c) ICMP checksum     is valid.
+*
+*                   (d) ICMP code         is zero.
+*
+*                   (e) ICMP length (derived from the IP length) is 40 or more octets.
+*
+*                   (f) The IP source address of the Redirect is the same as the current first-hop
+*                       router for the specified ICMP Destination Address.
+*
+*                   (g) The ICMP Destination Address field in the redirect message does not contain
+*                       a multicast address.
+*
+*                   (h) The ICMP Target Address is either a link-local address (when redirected to a
+*                       router) or the same as the ICMP Destination Address (when redirected to the
+*                       on-link-destination.
+*
+*                   (i) "All included options have a length that is greater than zero."
+*
+*               (2) If address target is the same as the destination address, the destination is on-link.
+*                   If not, the target address contain the better first-hop router.
+*
+*               (3) The following information is not used by the current implementation of NDP:
+*
+*                   (a) Redirected header option. It should contain as much as possible of the IP
+*                       packet that triggered the sending of the Redirect without making the redirect
+*                       packet exceed the minimum MTU.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_RxRedirect (const  NET_BUF               *p_buf,
+                                        NET_BUF_HDR           *p_buf_hdr,
+                                 const  NET_NDP_REDIRECT_HDR  *p_ndp_hdr,
+                                        NET_ERR               *p_err)
+{
+    NET_CACHE_ADDR_NDP        *p_cache_addr_target;
+    NET_NDP_NEIGHBOR_CACHE    *p_cache_target;
+    NET_NDP_DEST_CACHE        *p_dest_cache;
+    NET_NDP_OPT_TYPE           opt_type;
+    NET_NDP_OPT_LEN            opt_len;
+    CPU_INT16U                 opt_len_tot;
+    CPU_INT16U                 opt_len_cnt;
+    CPU_INT08U                *p_ndp_opt;
+    NET_NDP_OPT_HDR           *p_ndp_opt_hdr;
+    NET_NDP_OPT_HW_ADDR_HDR   *p_ndp_opt_hw_addr_hdr;
+    NET_NDP_OPT_REDIRECT_HDR  *p_ndp_opt_redirect_hdr;
+    CPU_INT08U                 hw_addr_len;
+    CPU_INT08U                 hop_limit_ip;
+    NET_IPv6_HDR              *p_ip_hdr;
+    NET_IF_NBR                 if_nbr;
+    NET_TMR_TICK               timeout_tick;
+    CPU_BOOLEAN                addr_is_link_local;
+    CPU_BOOLEAN                addr_is_mcast;
+    CPU_BOOLEAN                mem_same;
+    CPU_BOOLEAN                is_router;
+    CPU_SR_ALLOC();
+
+
+    if_nbr = p_buf_hdr->IF_Nbr;
+                                                                /* -------- VALIDATION OF THE REDIRECT MESSAGE -------- */
+    addr_is_link_local = NetIPv6_IsAddrLinkLocal(&p_buf_hdr->IPv6_AddrSrc);
+    if (addr_is_link_local == DEF_NO) {
+       *p_err = NET_NDP_ERR_ADDR_SRC;                           /* See Note #1a.                                        */
+        return;
+    }
+
+    p_ip_hdr      = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+    hop_limit_ip = p_ip_hdr->HopLim;
+    if (hop_limit_ip != NET_IPv6_HDR_HOP_LIM_MAX) {
+       *p_err = NET_NDP_ERR_HOP_LIMIT;                          /* See Note #1b.                                        */
+        return;
+    }
+
+    addr_is_mcast = NetIPv6_IsAddrMcast(&p_ndp_hdr->AddrDest);
+    if (addr_is_mcast == DEF_YES) {
+       *p_err = NET_NDP_ERR_ADDR_DEST;                          /* See Note #1g.                                        */
+        return;
+    }
+
+                                                                /* Search in cache for Destination Address.             */
+    p_dest_cache = NetNDP_DestCacheSrch(if_nbr, &p_ndp_hdr->AddrDest, p_err);
+    if (p_dest_cache == (NET_NDP_DEST_CACHE *)0) {
+       *p_err = NET_NDP_ERR_ADDR_DEST;
+        return;
+    }
+
+    mem_same = Mem_Cmp(&p_buf_hdr->IPv6_AddrSrc.Addr[0],
+                       &p_dest_cache->AddrNextHop.Addr[0],
+                        NET_IPv6_ADDR_SIZE);
+    if (mem_same == DEF_NO) {
+       *p_err = NET_NDP_ERR_ADDR_SRC;                           /* See Note #1f.                                        */
+        return;
+    }
+
+    addr_is_link_local = NetIPv6_IsAddrLinkLocal(&p_ndp_hdr->AddrTarget);
+
+    mem_same = Mem_Cmp(&p_ndp_hdr->AddrTarget,
+                       &p_ndp_hdr->AddrDest,
+                        NET_IPv6_ADDR_SIZE);
+
+    is_router = !mem_same;
+
+
+    if ((addr_is_link_local != DEF_YES) &&
+        (mem_same           != DEF_YES)) {
+        *p_err = NET_NDP_ERR_ADDR_TARGET;                       /* See Note #1h.                                        */
+         return;
+    }
+
+                                                                /* ----------- VALIDATE ADN PROCESS OPTIONS ----------- */
+    opt_len_tot = p_buf_hdr->IP_TotLen - sizeof(NET_NDP_REDIRECT_HDR) + sizeof(CPU_INT32U);
+    p_ndp_opt   = (CPU_INT08U *)&p_ndp_hdr->Opt;
+
+    opt_len_cnt = 0u;
+    while(( p_ndp_opt    != (CPU_INT08U *)0)       &&
+          (*p_ndp_opt    != NET_NDP_OPT_TYPE_NONE) &&
+          ( opt_len_cnt  <  opt_len_tot))  {
+
+        p_ndp_opt_hdr = (NET_NDP_OPT_HDR *)p_ndp_opt;
+        opt_type      = p_ndp_opt_hdr->Type;
+        opt_len       = p_ndp_opt_hdr->Len;
+
+        if (opt_len == 0u) {
+           *p_err = NET_NDP_ERR_OPT_LEN;                         /* See Note #1i.                                       */
+            return;
+        }
+
+       switch (opt_type) {
+           case NET_NDP_OPT_TYPE_ADDR_TARGET:
+                p_ndp_opt_hw_addr_hdr = (NET_NDP_OPT_HW_ADDR_HDR *) p_ndp_opt;
+                hw_addr_len = (opt_len * DEF_OCTET_NBR_BITS) - (NET_NDP_OPT_DATA_OFFSET);
+                if (hw_addr_len != NET_IF_HW_ADDR_LEN_MAX) {
+                   *p_err = NET_NDP_ERR_HW_ADDR_LEN;
+                    return;
+                }
+
+                                                                /* Search in cache for Target Address.                  */
+                p_cache_addr_target = (NET_CACHE_ADDR_NDP *)NetCache_AddrSrch(              NET_CACHE_TYPE_NDP,
+                                                                                            if_nbr,
+                                                                             (CPU_INT08U *)&p_ndp_hdr->AddrTarget.Addr[0],
+                                                                                            NET_IPv6_ADDR_SIZE,
+                                                                                            p_err);
+                if (p_cache_addr_target == (NET_CACHE_ADDR_NDP *)0) {
+                    CPU_CRITICAL_ENTER();
+                    timeout_tick = NetNDP_NeighborCacheTimeout_tick;
+                    CPU_CRITICAL_EXIT();
+
+                    NetNDP_NeighborCacheAddEntry(               if_nbr,
+                                                 (CPU_INT08U *)&p_ndp_opt_hw_addr_hdr->Addr[0],
+                                                 (CPU_INT08U *)&p_ndp_hdr->AddrTarget,
+                                                 (CPU_INT08U *) 0,
+                                                                timeout_tick,
+                                                                NetNDP_CacheTimeout,
+                                                                NET_NDP_CACHE_STATE_STALE,
+                                                                is_router,
+                                                                p_err);
+                } else {
+                    NetNDP_NeighborCacheUpdateEntry(p_cache_addr_target,
+                                                   &p_ndp_opt_hw_addr_hdr->Addr[0]);
+
+                    p_cache_target = (NET_NDP_NEIGHBOR_CACHE *)p_cache_addr_target->ParentPtr;
+                    if (is_router == DEF_YES) {
+                        DEF_BIT_SET(p_cache_target->Flags, NET_NDP_CACHE_FLAG_ISROUTER);
+                    }
+                }
+                break;
+
+
+           case NET_NDP_OPT_TYPE_REDIRECT:
+#if 1                                                          /* Prevent compiler warning.                             */
+               (void)&p_ndp_opt_redirect_hdr;                  /* See Note #3a                                          */
+#else
+                p_ndp_opt_redirect_hdr = (NET_NDP_OPT_REDIRECT_HDR *) p_ndp_opt;
+#endif
+
+
+                break;
+
+           case NET_NDP_OPT_TYPE_ADDR_SRC:
+           case NET_NDP_OPT_TYPE_PREFIX_INFO:
+           case NET_NDP_OPT_TYPE_MTU:
+           default:
+               *p_err = NET_NDP_ERR_OPT_TYPE;
+                break;
+       }
+
+        p_ndp_opt   += (opt_len * DEF_OCTET_NBR_BITS);
+        opt_len_cnt += (opt_len * DEF_OCTET_NBR_BITS);
+    }
+
+                                                                /* ------------- UPDATE DESTINATION CACHE ------------- */
+    p_dest_cache->AddrNextHop = p_ndp_hdr->AddrTarget;
+
+    if (mem_same == DEF_YES) {
+        p_dest_cache->OnLink = DEF_YES;
+    }
+
+    NetNDP_UpdateDestCache(if_nbr,
+                          &p_ndp_hdr->AddrDest.Addr[0],
+                          &p_ndp_hdr->AddrTarget.Addr[0]);
+
+   *p_err = NET_NDP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_RxPrefixUpdate()
+*
+* Description : (1) Add or Update an NDP prefix entry in the prefix list based on the received NDP prefix.
+*
+*                   (a) Search NDP prefix list
+*                   (b) Add or Update NDP prefix
+*                   (c) If Autonomous Flag is set, configure new addr with received prefix on Interface
+*
+*
+* Argument(s) : if_nbr          Interface number the packet was received from.
+*
+*               p_addr_prefix   Pointer to received NDP prefix.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                       NDP Rx prefix successfully processed.
+*                               NET_ERR_FAULT_NULL_PTR                   Argument 'p_addr_prefix' passed a NULL pointer.
+*                               NET_NDP_ERR_INVALID_PREFIX             Invalid prefix received.
+*                               NET_NDP_ERR_ADDR_CFG_FAILED            Auto-configured addr. with prefix failed.
+*
+*                                                                      -- RETURNED BY NetNDP_PrefixHandler() : --
+*                               NET_NDP_ERR_INVALID_PREFIX             Invalid Prefix not added to the list.
+*                               NET_NDP_ERR_PREFIX_NONE_AVAIL          NO available prefix to allocate.
+*
+*                                                                      - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_INVALID_IF                  Invalid network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_RxRouterAdvertisement().
+*
+* Note(s)     : (2) RFC #4861, Section 6.3.4 (Processing Received Router Advertisement) states that "For
+*                   each Prefix Information option with the on-link flag set, a host does the following:"
+*
+*                   (a) "If the prefix is the link-local prefix, silently ignore the Prefix Information option."
+*
+*                   (b) "If the prefix is not already present in the Prefix List, and the Prefix Information
+*                        option's Valid Lifetime field is non-zero, create a new entry for the prefix and
+*                        initialize its invalidation timer to the Valid Lifetime value in the Prefix
+*                        Information option."
+*
+*                   (c) "If the prefix is already present in the host's Prefix List as the result of a
+*                        previously received advertisement, reset its invalidation timer to the Valid Lifetime
+*                        value in the Prefix Information option.  If the new Lifetime value is zero, time-out
+*                        the prefix immediately (see Section 6.3.5)."
+*
+*                   (d) "If the Prefix Information option's Valid Lifetime field is zero, and the prefix is
+*                        not present in the host's Prefix List, silently ignore the option."
+*
+*               (3) RFC #4862, Section 5.5.3 states that "For each Prefix-Information option in the
+*                   Router Advertisement:
+*
+*                   (a) If the Autonomous flag is not set,                            silently ignore the
+*                       Prefix Information option.
+*
+*                   (b) If the prefix is the link-local prefix,                       silently ignore the
+*                       Prefix Information option.
+*
+*                   (c) If the preferred lifetime is greater than the valid lifetime, silently ignore the
+*                       Prefix Information option.
+*
+*                   (d) If the prefix advertised is not equal to the prefix of an address configured
+*                       by stateless autoconfiguration already in the list of addresses associated
+*                       with the interface (where "equal" means the two prefix lengths are the same
+*                       and the first prefix-length bits of the prefixes are identical), and if the
+*                       Valid Lifetime is not 0, form an address (and add it to the list) by combining
+*                       the advertised prefix with an interface identifier of the link as follows:
+*
+*                       |            128 - N bits               |       N bits           |
+*                       +---------------------------------------+------------------------+
+*                       |            link prefix                |  interface identifier  |
+*                       +----------------------------------------------------------------+
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_RxPrefixUpdate (NET_IF_NBR      if_nbr,
+                                     NET_IPv6_ADDR  *p_addr_prefix,
+                                     CPU_INT08U      prefix_len,
+                                     CPU_BOOLEAN     on_link,
+                                     CPU_BOOLEAN     addr_cfg_auto,
+                                     CPU_INT32U      lifetime_valid,
+                                     CPU_INT32U      lifetime_preferred,
+                                     NET_ERR        *p_err)
+{
+    NET_IPv6_ADDRS           *p_addrs;
+    NET_IPv6_ADDR             ipv6_id;
+    CPU_BOOLEAN               updated;
+    CPU_BOOLEAN               dad_en;
+    CPU_INT08U                id_len;
+    CPU_INT08U                total_addr_len;
+    NET_IPv6_ADDR_CFG_TYPE    addr_cfg_type;
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    NET_IPv6_AUTO_CFG_OBJ    *p_auto_obj;
+    NET_IPv6_AUTO_CFG_STATE   auto_state;
+#endif
+    CPU_SR_ALLOC();
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    NetIF_IsValidCfgdHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+        *p_err = NET_NDP_ERR_INVALID_ARG;
+         return;
+    }
+                                                                /* ---------- VALIDATE NO NULL POINTER AS ARG --------- */
+    if (p_addr_prefix == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* --------- ADD/UPDATE PREFIX TO PREFIX LIST --------- */
+    NetNDP_RxPrefixHandler(if_nbr,
+                           p_addr_prefix,
+                           prefix_len,
+                           lifetime_valid,
+                           on_link,
+                           addr_cfg_auto,
+                           p_err);
+
+                                                                /* ---------- CREATE & ADD ADDR WITH PREFIX ----------- */
+    if ((*p_err         == NET_NDP_ERR_NONE) &&
+        ( addr_cfg_auto == DEF_YES)         ) {                 /* When Autonomous Flag is set.                         */
+
+        if (lifetime_valid < lifetime_preferred) {
+           *p_err = NET_NDP_ERR_INVALID_PREFIX;
+            goto exit;
+        }
+
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+
+        p_auto_obj = NetIPv6_GetAddrAutoCfgObj(if_nbr);
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (p_auto_obj == DEF_NULL) {
+           *p_err = NET_ERR_FAULT_NULL_PTR;
+            goto exit;
+        }
+#endif
+                                                                /* Post signal for Rx RA msg with prefix option.        */
+        NetNDP_RouterAdvSignalPost(if_nbr, p_err);
+        if (*p_err != NET_NDP_ERR_NONE) {
+             goto exit;
+        }
+
+                                                                /* ------------------ SET DAD TYPE -------------------- */
+        CPU_CRITICAL_ENTER();
+        auto_state = p_auto_obj->State;
+        CPU_CRITICAL_EXIT();
+        if (auto_state == NET_IPv6_AUTO_CFG_STATE_STARTED_GLOBAL) {
+            addr_cfg_type = NET_IPv6_ADDR_CFG_TYPE_AUTO_CFG_NO_BLOCKING;
+            dad_en        = p_auto_obj->DAD_En;
+        } else {
+            addr_cfg_type = NET_IPv6_ADDR_CFG_TYPE_RX_PREFIX_INFO;
+            dad_en        = DEF_YES;
+        }
+#else
+        addr_cfg_type = NET_IPv6_ADDR_CFG_TYPE_RX_PREFIX_INFO;
+        dad_en        = DEF_YES;
+#endif
+
+                                                                /* Update addr(s) with same prefix already cfg on IF.   */
+        updated =  NetNDP_RxPrefixAddrsUpdate (if_nbr,
+                                               p_addr_prefix,
+                                               prefix_len,
+                                               lifetime_valid,
+                                               lifetime_preferred);
+
+        if ((updated   == DEF_NO) &&
+            (lifetime_valid  > 0)) {
+             id_len = NetIPv6_CreateIF_ID(if_nbr,               /* Create IF ID from HW mac addr.                       */
+                                         &ipv6_id,
+                                          NET_IPv6_ADDR_AUTO_CFG_ID_IEEE_48,
+                                          p_err);
+             switch (*p_err) {
+                 case NET_IPv6_ERR_NONE:
+                     *p_err = NET_NDP_ERR_NONE;
+                      break;
+
+
+                 case NET_ERR_FAULT_NULL_PTR:
+                 case NET_IPv6_ERR_INVALID_ADDR_ID_TYPE:
+                 default:
+                     *p_err = NET_NDP_ERR_ADDR_CFG_FAILED;
+                      goto exit_fail_stop_auto;
+             }
+
+             total_addr_len = id_len + prefix_len;
+             if (total_addr_len > NET_IPv6_ADDR_PREFIX_LEN_MAX) {
+                *p_err = NET_NDP_ERR_ADDR_CFG_FAILED;
+                 goto exit_fail_stop_auto;
+             }
+
+
+            (void)NetIPv6_CreateAddrFromID(&ipv6_id,            /* Create IPv6 addr from IF ID.                         */
+                                            p_addr_prefix,
+                                            NET_IPv6_ADDR_PREFIX_CUSTOM,
+                                            prefix_len,
+                                            p_err);
+            switch (*p_err) {
+                case NET_IPv6_ERR_NONE:
+                    *p_err = NET_NDP_ERR_NONE;
+                     break;
+
+
+                case NET_ERR_FAULT_NULL_PTR:
+                case NET_IPv6_ERR_INVALID_ADDR_PREFIX_TYPE:
+                case NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN:
+                default:
+                    *p_err = NET_NDP_ERR_ADDR_CFG_FAILED;
+                     goto exit_fail_stop_auto;
+            }
+
+                                                                /* ---------------- ADD ADDRESS TO IF ----------------- */
+            p_addrs = NetIPv6_CfgAddrAddHandler(if_nbr,
+                                                p_addr_prefix,
+                                                prefix_len,
+                                                lifetime_valid,
+                                                lifetime_preferred,
+                                                NET_IPv6_ADDR_CFG_MODE_AUTO,
+                                                dad_en,
+                                                addr_cfg_type,
+                                                p_err);
+            switch (*p_err) {
+                case NET_IPv6_ERR_NONE:
+                case NET_ERR_FAULT_FEATURE_DIS:
+                    *p_err = NET_NDP_ERR_NONE;
+                     goto exit_succeed_stop_auto;
+                     break;
+
+
+                case NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS:
+                    *p_err = NET_NDP_ERR_ADDR_CFG_IN_PROGRESS;
+                     goto exit;
+
+
+                case NET_IPv6_ERR_ADDR_CFG_IN_USE:
+                case NET_IPv6_ERR_ADDR_CFG_STATE:
+                case NET_IPv6_ERR_ADDR_TBL_FULL:
+                case NET_IPv6_ERR_INVALID_ADDR_CFG_MODE:
+                default:
+                    *p_err = NET_NDP_ERR_ADDR_CFG_FAILED;
+                     goto exit_fail_stop_auto;
+            }
+
+        } else {
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+            NET_IPv6_IF_CFG   *p_ip_if_cfg;
+            NET_IPv6_ADDRS    *p_ip_addrs;
+            NET_IP_ADDRS_QTY   addr_ix      = 0;
+            CPU_BOOLEAN        prefix_found = DEF_NO;
+
+
+            if (auto_state == NET_IPv6_AUTO_CFG_STATE_STARTED_GLOBAL) {
+                p_ip_if_cfg  =  NetIPv6_GetIF_CfgObj(if_nbr, p_err);
+                p_ip_addrs   = &p_ip_if_cfg->AddrsTbl[addr_ix];
+
+                while (addr_ix < p_ip_if_cfg->AddrsNbrCfgd) {   /* Srch all cfg'd addrs ...                             */
+
+                    if ((p_ip_addrs->AddrHostPrefixLen == prefix_len)                        &&
+                        (p_ip_addrs->AddrCfgState      == NET_IPv6_ADDR_CFG_STATE_AUTO_CFGD)) {
+
+                        prefix_found = NetNDP_IsPrefixCfgdOnAddr(&p_ip_addrs->AddrHost,
+                                                                  p_addr_prefix,
+                                                                  prefix_len);
+
+                        if (prefix_found == DEF_YES) {
+                            p_addrs = p_ip_addrs;
+                            break;
+                        }
+                    }
+
+                    p_ip_addrs++;                               /* ... adv to IF's next addr.                           */
+                    addr_ix++;
+                }
+
+                if (prefix_found == DEF_YES) {
+                    goto exit_succeed_stop_auto;
+                } else {
+                    goto exit_fail_stop_auto;
+                }
+            }
+#endif
+        }
+    }
+
+
+   (void)&p_addrs;
+
+    goto exit;
+
+
+exit_succeed_stop_auto:
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    if (auto_state == NET_IPv6_AUTO_CFG_STATE_STARTED_GLOBAL) {
+        p_auto_obj->AddrGlobalPtr = &p_addrs->AddrHost;
+        NetIPv6_AddrAutoCfgComp(if_nbr, NET_IPv6_AUTO_CFG_STATUS_SUCCEEDED);
+    }
+#endif
+    goto exit;
+
+
+exit_fail_stop_auto:
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+    if (auto_state == NET_IPv6_AUTO_CFG_STATE_STARTED_GLOBAL) {
+        p_auto_obj->AddrGlobalPtr = DEF_NULL;
+        NetIPv6_AddrAutoCfgComp(if_nbr, NET_IPv6_AUTO_CFG_STATUS_LINK_LOCAL);
+    }
+#endif
+
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetNDP_RxPrefixHandler()
+*
+* Description : (1) Add or Update an Prefix entry in the Prefix list based on received NDP prefix:
+*
+*                   (a) Search Prefix List
+*                   (b) Update or add Prefix entry
+*
+*
+* Argument(s) : if_nbr          Interface number the packet was received from.
+*
+*               p_addr_prefix   Pointer to received NDP prefix.
+*
+*               prefix_len      Length of the received prefix.
+*
+*               lifetime_valid  Lifetime of the received prefix.
+*
+*               on_link         Indicate if prefix is advertised as being on same link.
+*
+*               addr_cfg_auto   Indicate that prefix can be used for Autonomous Address Configuration.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                NDP prefix successfully configured.
+*                               NET_NDP_ERR_INVALID_PREFIX      Invalid Prefix not added to the list.
+*
+*                                                               ----- RETURNED BY NetNDP_PrefixCfg() : -----
+*                               NET_NDP_ERR_PREFIX_NONE_AVAIL   NO available prefix to allocate.
+*                               NET_ERR_FAULT_NULL_FNCT           Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL          NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE        Network timer is NOT a valid timer type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_RxPrefixUpdate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_RxPrefixHandler (       NET_IF_NBR      if_nbr,
+                                      const  NET_IPv6_ADDR  *p_addr_prefix,
+                                             CPU_INT08U      prefix_len,
+                                             CPU_INT32U      lifetime_valid,
+                                             CPU_BOOLEAN     on_link,
+                                             CPU_BOOLEAN     addr_cfg_auto,
+                                             NET_ERR        *p_err)
+{
+    NET_NDP_PREFIX      *p_prefix;
+    NET_IPv6_ADDR        addr_masked;
+    NET_TMR_TICK         timeout_tick;
+
+
+                                                                /* Insure that the received prefix is consistent ...    */
+                                                                /* ... with the prefix length.                          */
+    NetIPv6_AddrMaskByPrefixLen(p_addr_prefix, prefix_len, &addr_masked, p_err);
+    if (*p_err != NET_IPv6_ERR_NONE) {
+        *p_err  = NET_NDP_ERR_INVALID_PREFIX;
+         return;
+    }
+
+                                                                /* Calculate timeout tick.                              */
+    timeout_tick = (NET_TMR_TICK)lifetime_valid * NET_TMR_TIME_TICK_PER_SEC;
+
+                                                                /* ---------------- SEARCH PREFIX LIST ---------------- */
+    p_prefix = NetNDP_PrefixSrch(if_nbr, &addr_masked, p_err);
+
+    if (p_prefix != (NET_NDP_PREFIX *)0){                       /* Prefix already in prefix list...                     */
+        if (on_link == DEF_YES) {
+            if (lifetime_valid != 0) {
+                                                                /* ... update prefix timeout.                           */
+                if (p_prefix->TmrPtr != DEF_NULL) {
+                    NetTmr_Set(              p_prefix->TmrPtr,
+                               (CPU_FNCT_PTR)NetNDP_PrefixTimeout,
+                                             timeout_tick,
+                                             p_err);
+                } else {
+                    NetTmr_Get((CPU_FNCT_PTR)NetNDP_PrefixTimeout,
+                               (void       *)p_prefix,
+                                             timeout_tick,
+                                             NET_TMR_FLAG_NONE,
+                                             p_err);
+                    if (*p_err != NET_TMR_ERR_NONE) {
+                        *p_err = NET_NDP_ERR_NONE;
+                         return;
+                    }
+                }
+            } else {
+                NetNDP_RemovePrefixDestCache(if_nbr, &p_prefix->Prefix.Addr[0], p_prefix->PrefixLen);
+                NetNDP_PrefixRemove(p_prefix, DEF_YES);
+            }
+        }
+
+       *p_err = NET_NDP_ERR_NONE;
+        return;
+    }
+
+                                                            /* Prefix is not in NDP cache ...                       */
+    if (lifetime_valid == 0u) {                             /* ... if prefix lifetime = 0, do not add it to cache.  */
+       *p_err = NET_NDP_ERR_INVALID_PREFIX;
+        return;
+    }
+
+    if ((on_link       == DEF_NO) &&                        /* If On-link flag and Autonomous flag are not set, ... */
+        (addr_cfg_auto == DEF_NO)) {                        /* ... do not add prefix to the cache.                  */
+        *p_err = NET_NDP_ERR_INVALID_PREFIX;
+         return;
+    }
+                                                            /* Add new prefix to the prefix list.                   */
+    p_prefix = NetNDP_PrefixCfg(if_nbr,
+                               &addr_masked ,
+                                prefix_len,
+                                DEF_YES,
+                                NetNDP_PrefixTimeout,
+                                timeout_tick,
+                                p_err);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetNDP_PrefixAddrsUpdate()
+*
+* Description : Update all address on the given interface corresponding to the prefix.
+*
+* Argument(s) : if_nbr              Interface number to search for on.
+*
+*               p_addr_prefix       Pointer to prefix add.
+*
+*               prefix_len          Prefix Length.
+*
+*               lifetime_valid      Valid Lifetime received with Prefix Information Option.
+*
+*               lifetime_preferred  Preferred Lifetime received with Prefix Information Option.
+*
+* Return(s)   : DEF_YES     if one or more address where updated.
+*
+*               DEF_NO      otherwise.
+*
+* Caller(s)   : NetNDP_RxPrefixHandler().
+*
+* Note(s)     : (1) Address valid lifetime should be set to 2 hours according rules state in RFC #4862 Section 5.5.3
+*                   Router Advertisement Processing. #### NET-779.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetNDP_RxPrefixAddrsUpdate (NET_IF_NBR      if_nbr,
+                                                 NET_IPv6_ADDR  *p_addr_prefix,
+                                                 CPU_INT08U      prefix_len,
+                                                 CPU_INT32U      lifetime_valid,
+                                                 CPU_INT32U      lifetime_preferred)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN        valid;
+#endif
+    NET_IPv6_IF_CFG   *p_ip_if_cfg;
+    NET_IPv6_ADDRS    *p_ip_addrs;
+    NET_IP_ADDRS_QTY   addr_ix;
+    NET_TMR_TICK       timeout_tick;
+    NET_TMR_TICK       remain_tick;
+    CPU_BOOLEAN        prefix_found;
+    CPU_BOOLEAN        addr_updated;
+    NET_TMR           *p_tmr_pref;
+    NET_TMR           *p_tmr_valid;
+    NET_ERR            err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ----------------- VALIDATE IF NBR ------------------ */
+    valid = NetIF_IsValidCfgdHandler(if_nbr, &err);
+    if (valid != DEF_YES) {
+        return (DEF_NO);
+    }
+#endif
+                                                                /* ------------- VALIDATE IPv6 PREFIX PTR ------------- */
+    if (p_addr_prefix == (NET_IPv6_ADDR *)0) {
+        return (DEF_NO);
+    }
+
+                                                                /* -------------- SRCH IF FOR IPv6 ADDR --------------- */
+    addr_ix      = 0u;
+    addr_updated = DEF_NO;
+    prefix_found = DEF_NO;
+
+    p_ip_if_cfg  =  NetIPv6_GetIF_CfgObj(if_nbr, &err);
+    p_ip_addrs   = &p_ip_if_cfg->AddrsTbl[addr_ix];
+
+    while (addr_ix < p_ip_if_cfg->AddrsNbrCfgd) {               /* Srch all cfg'd addrs ...                             */
+
+        if ((p_ip_addrs->AddrHostPrefixLen == prefix_len)                        &&
+            (p_ip_addrs->AddrCfgState      == NET_IPv6_ADDR_CFG_STATE_AUTO_CFGD)) {
+
+            prefix_found = NetNDP_IsPrefixCfgdOnAddr(&p_ip_addrs->AddrHost,
+                                                      p_addr_prefix,
+                                                      prefix_len);
+
+            if (prefix_found == DEF_YES) {                      /* If prefix found, ...                                 */
+                                                                /* ... reset addr valid lifetime.                       */
+                addr_updated = DEF_YES;
+                                                                /* See Note #1.                                         */
+                p_tmr_valid = p_ip_addrs->ValidLifetimeTmrPtr;
+                p_tmr_pref  = p_ip_addrs->PrefLifetimeTmrPtr;
+
+                if (p_tmr_valid != DEF_NULL) {
+
+                    remain_tick  = p_tmr_valid->TmrVal;
+
+                    timeout_tick = (NET_TMR_TICK)lifetime_valid * NET_TMR_TIME_TICK_PER_SEC;
+
+                    if((timeout_tick > remain_tick   ) ||
+                       (timeout_tick > NET_NDP_LIFETIME_TIMEOUT_TWO_HOURS)) {
+                        NetTmr_Set(p_tmr_valid,
+                                  &NetIPv6_AddrValidLifetimeTimeout,
+                                   timeout_tick,
+                                  &err);
+                    } else if (remain_tick >= NET_NDP_LIFETIME_TIMEOUT_TWO_HOURS) {
+                        NetTmr_Set(p_tmr_valid,
+                                  &NetIPv6_AddrValidLifetimeTimeout,
+                                   NET_NDP_LIFETIME_TIMEOUT_TWO_HOURS,
+                                  &err);
+                    } else {
+                        p_ip_addrs++;                           /* ... adv to IF's next addr.                           */
+                        addr_ix++;
+                        continue;
+                    }
+                } else {
+
+                    p_tmr_valid = NetTmr_Get(       &NetIPv6_AddrValidLifetimeTimeout,
+                                             (void *)p_ip_addrs,
+                                                     NET_NDP_LIFETIME_TIMEOUT_TWO_HOURS,
+                                                     NET_TMR_FLAG_NONE,
+                                                    &err);
+                }
+
+                timeout_tick = (NET_TMR_TICK)lifetime_preferred * NET_TMR_TIME_TICK_PER_SEC;
+                if (p_tmr_pref != DEF_NULL) {
+                    NetTmr_Set(p_tmr_pref,
+                              &NetIPv6_AddrPrefLifetimeTimeout,
+                               timeout_tick,
+                              &err);
+                } else {
+                    p_tmr_pref = NetTmr_Get(       &NetIPv6_AddrPrefLifetimeTimeout,
+                                            (void *)p_ip_addrs,
+                                                    timeout_tick,
+                                                    NET_TMR_FLAG_NONE,
+                                                   &err);
+                }
+            }
+        }
+
+        p_ip_addrs++;                                            /* ... adv to IF's next addr.                           */
+        addr_ix++;
+    }
+
+    return (addr_updated);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetNDP_TxNeighborSolicitation()
+*
+* Description : Transmit Neighbor Solicitation message.
+*
+* Argument(s) : if_nbr          Network interface number to transmit Neighbor Solicitation message.
+*
+*               p_addr_src      Pointer to IPv6 source address (see Note #1).
+*
+*               p_addr_dest     Pointer to IPv6 destination address.
+*
+*               ndp_sol_type    Indicate what upper procedure is performing the Tx of Solicitations :
+*
+*                                   NET_NDP_NEIGHBOR_SOL_TYPE_DAD    Duplication Address Detection (DAD)
+*
+*                                   NET_NDP_NEIGHBOR_SOL_TYPE_RES    Address Resolution
+*
+*                                   NET_NDP_NEIGHBOR_SOL_TYPE_NUD    Neighbor Unreachability Detection
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                Tx Solicitations successful.
+*
+*                               ------------ RETURNED BY NetIF_IsValidCfgdHandler() : -----------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                               ----------- RETURNED BY NetICMPv6_TxMsgReqHandler() : -----------
+*                               See NetICMPv6_TxMsgReqHandler() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_NeighborCacheAddPend(),
+*               NetNDP_SolicitTimeout(),
+*               NetNDP_DupAddrDetection().
+*
+* Note(s)     : (1) If IPv6 source address pointer is NULL, the unspecified address is used.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_TxNeighborSolicitation (NET_IF_NBR                  if_nbr,
+                                             NET_IPv6_ADDR              *p_addr_src,
+                                             NET_IPv6_ADDR              *p_addr_dest,
+                                             NET_NDP_NEIGHBOR_SOL_TYPE   ndp_sol_type,
+                                             NET_ERR                    *p_err)
+{
+    NET_IPv6_ADDR             addr_unspecified;
+    NET_IPv6_ADDR            *p_ndp_addr_src;
+    NET_NDP_OPT_HW_ADDR_HDR   ndp_opt_hw_addr_hdr;
+    CPU_INT16U                data_len;
+    CPU_INT08U                hw_addr[NET_IP_HW_ADDR_LEN];
+    CPU_INT08U                hw_addr_len;
+    CPU_BOOLEAN               dest_mcast;
+    void                     *p_data;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+     NetIF_IsValidCfgdHandler(if_nbr, p_err);
+     if (*p_err != NET_IF_ERR_NONE) {
+          return;
+     }
+#endif
+
+    p_ndp_addr_src = p_addr_src;
+    if (p_ndp_addr_src == (NET_IPv6_ADDR *)0) {                  /* If  src addr ptr is NULL                      ...    */
+        NetIPv6_AddrUnspecifiedSet(&addr_unspecified, p_err);    /* ... tx neighbor solicitation with unspecified ...    */
+        p_ndp_addr_src = &addr_unspecified;                      /* ... src addr.                                        */
+        p_data        = (void *)0;
+        data_len      = 0u;
+    } else {
+        ndp_opt_hw_addr_hdr.Opt.Type = NET_NDP_OPT_TYPE_ADDR_SRC;
+        ndp_opt_hw_addr_hdr.Opt.Len  = 1u;
+
+        hw_addr_len = sizeof(hw_addr);
+        NetIF_AddrHW_GetHandler(if_nbr, hw_addr, &hw_addr_len, p_err);
+        if (*p_err != NET_IF_ERR_NONE) {
+             return;
+        }
+
+        Mem_Copy((void     *)&ndp_opt_hw_addr_hdr.Addr[0],
+                 (void     *)&hw_addr[0],
+                 (CPU_SIZE_T) NET_IP_HW_ADDR_LEN);
+
+        p_data   = (void *)&ndp_opt_hw_addr_hdr;
+        data_len = sizeof(NET_NDP_OPT_HW_ADDR_HDR);
+    }
+
+    if (ndp_sol_type == NET_NDP_NEIGHBOR_SOL_TYPE_DAD ||
+        ndp_sol_type == NET_NDP_NEIGHBOR_SOL_TYPE_RES) {
+        dest_mcast = DEF_YES;                                   /* Set destination addr to solicited-node-multicast.    */
+    } else {
+        dest_mcast = DEF_NO;
+    }
+
+                                                                /* -------------------- TX NDP REQ -------------------- */
+                                                                /* Tx Neighbor Solicitation msg.                        */
+   (void)NetICMPv6_TxMsgReqHandler(         if_nbr,
+                                            NET_ICMPv6_MSG_TYPE_NDP_NEIGHBOR_SOL,
+                                            NET_ICMPv6_MSG_CODE_NDP_NEIGHBOR_SOL,
+                                            0u,
+                                            p_ndp_addr_src,
+                                            p_addr_dest,
+                                            NET_IPv6_HDR_HOP_LIM_MAX,
+                                            dest_mcast,
+                                            DEF_NULL,
+                                   (void  *)p_data,
+                                            data_len,
+                                            p_err);
+   switch (*p_err) {
+       case NET_ICMPv6_ERR_NONE:
+           *p_err = NET_NDP_ERR_NONE;
+            break;
+
+
+       case NET_INIT_ERR_NOT_COMPLETED:
+       case NET_ERR_TX:
+       case NET_ERR_IF_LOOPBACK_DIS:
+       case NET_ERR_IF_LINK_DOWN:
+       case NET_ERR_FAULT_LOCK_ACQUIRE:
+       default:
+            break;
+
+   }
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetNDP_IsPrefixCfgdOnAddr()
+*
+* Description : Validate if an IPv6 prefix is configured on a specific address.
+*
+* Argument(s) : p_addr          Pointer to IPv6 address to validate.
+*
+*               p_addr_prefix   Pointer to IPv6 prefix to search for.
+*
+*               prefix_len      Prefix length.
+*
+* Return(s)   : DEF_YES, if the prefix is configured on the specified address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetNDP_PrefixAddrsUpdate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetNDP_IsPrefixCfgdOnAddr (NET_IPv6_ADDR  *p_addr,
+                                                NET_IPv6_ADDR  *p_addr_prefix,
+                                                CPU_INT08U      prefix_len)
+{
+    CPU_INT08U   prefix_octets_nbr;
+    CPU_INT08U   id_bits_nbr;
+    CPU_INT08U   prefix_mask;
+    CPU_INT08U   octet_ix;
+    CPU_BOOLEAN  prefix_found;
+
+
+    prefix_octets_nbr = prefix_len / DEF_OCTET_NBR_BITS;        /* Calc nbr of octets that contain 8 prefix bits.       */
+
+                                                                /* Calc nbr of remaining ID bits to not consider.       */
+    id_bits_nbr = DEF_OCTET_NBR_BITS - (prefix_len % DEF_OCTET_NBR_BITS);
+
+    prefix_mask = DEF_OCTET_MASK << id_bits_nbr;                /* Set prefix mask.                                     */
+
+    octet_ix = 0u;
+    while (octet_ix <  prefix_octets_nbr) {
+        if (p_addr_prefix->Addr[octet_ix] != p_addr->Addr[octet_ix]) {
+            return (DEF_NO);
+        }
+        octet_ix++;
+    }
+
+    prefix_found = ((p_addr_prefix->Addr[octet_ix] & prefix_mask) ==  \
+                    (p_addr->Addr[octet_ix]        & prefix_mask)) ? DEF_YES : DEF_NO;
+
+    return (prefix_found);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetNDP_UpdateDefaultRouter()
+*
+* Description : (1) Update the Default Router for the given interface:
+*
+*                   (a) Search NDP Default router list for a entry that is link with a neighbor cache
+*                       entry who's state is Reachable are maybe reachable (stale, delay, probe).
+*
+*
+* Argument(s) : if_nbr      Interface number of the router.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_ROUTER_DFLT_FIND    Default router as been find and set.
+*                               NET_NDP_ERR_ROUTER_DFLT_NONE    No Default router as been set.
+*
+*                                                               - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Pointer to the selected default router NDP cache entry.
+*
+* Caller(s)   : NetNDP_RxRouterAdvertisement(),
+*               NetNDP_RxNeighborAdvertisement(),
+*               NetNDP_SolicitTimeout(),
+*               NetNDP_RouterTimeout().
+*
+* Note(s)     : (2) RFC 4861 section 6.3.6 (Default Router Selection) specifies :
+*                   "Routers that are reachable or probably reachable (i.e., in any state other than
+*                    INCOMPLETE) SHOULD be preferred over routers whose reachability is unknown or suspect
+*                    (i.e., in the INCOMPLETE state, or for which no Neighbor Cache entry exists)."
+*********************************************************************************************************
+*/
+
+static  NET_NDP_ROUTER  *NetNDP_UpdateDefaultRouter(NET_IF_NBR   if_nbr,
+                                                    NET_ERR     *p_err)
+{
+    NET_NDP_ROUTER          *p_router;
+    NET_NDP_ROUTER          *p_router_temp;
+    NET_NDP_NEIGHBOR_CACHE  *p_cache_neighbor;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+     NetIF_IsValidCfgdHandler(if_nbr, p_err);
+     if (*p_err != NET_IF_ERR_NONE) {
+         *p_err =  NET_NDP_ERR_INVALID_ARG;
+          return ((NET_NDP_ROUTER *)0);
+     }
+#endif
+
+    p_router_temp = (NET_NDP_ROUTER *)0;
+
+    p_router = NetNDP_RouterListHead;
+    while (p_router != (NET_NDP_ROUTER *)0) {
+
+        if (p_router->IF_Nbr == if_nbr) {
+            p_cache_neighbor = p_router->NDP_CachePtr;
+            if (p_cache_neighbor != (NET_NDP_NEIGHBOR_CACHE *)0) {
+                if (p_cache_neighbor->State == NET_NDP_CACHE_STATE_REACHABLE) {
+                    NetNDP_DefaultRouterTbl[if_nbr] = p_router;
+                   *p_err = NET_NDP_ERR_ROUTER_DFLT_FIND;
+                    return (p_router);
+                } else if (p_cache_neighbor->State != NET_NDP_CACHE_STATE_INCOMPLETE) {
+                    p_router_temp = p_router;
+                }
+            }
+        }
+        p_router = p_router->NextPtr;
+    }
+
+    if (p_router_temp != (NET_NDP_ROUTER *)0) {
+        NetNDP_DefaultRouterTbl[if_nbr] = p_router_temp;
+       *p_err = NET_NDP_ERR_ROUTER_DFLT_FIND;
+        return (p_router_temp);
+    }
+
+
+    NetNDP_DefaultRouterTbl[if_nbr] = (NET_NDP_ROUTER *)0;
+
+   *p_err = NET_NDP_ERR_ROUTER_DFLT_NONE;
+
+    return ((NET_NDP_ROUTER *)0);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetNDP_UpdateDestCache()
+*
+* Description : (1) Update entry in Destination Cache with same Next-Hop address as the received one:
+*
+*                   (a) Search NDP Destination Cache List
+*                   (b) Update Next-Hop address in NDP destination cache whit new address.
+*
+*
+* Argument(s) : if_nbr       Interface number of the interface for the given address.
+*
+*               p_addr       Pointer to the Next-Hop IPv6 address to update.
+*
+*               p_addr_new   Pointer to the new Next-Hop IPv6 address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_RxRedirect().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_UpdateDestCache(       NET_IF_NBR   if_nbr,
+                                     const  CPU_INT08U  *p_addr,
+                                     const  CPU_INT08U  *p_addr_new)
+{
+    NET_NDP_DEST_CACHE  *p_dest_cache;
+    CPU_BOOLEAN          mem_same;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_ERR              err;
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+     NetIF_IsValidCfgdHandler(if_nbr, &err);
+     if (err != NET_IF_ERR_NONE) {
+         return;
+     }
+                                                                 /* ------------ VALIDATE NO NULL POINTERS ------------ */
+    if (p_addr == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+
+    if (p_addr_new == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_dest_cache = NetNDP_DestListHead;
+    while (p_dest_cache != (NET_NDP_DEST_CACHE *)0) {
+
+        if (p_dest_cache->IF_Nbr == if_nbr) {
+            mem_same = Mem_Cmp(&p_dest_cache->AddrNextHop, p_addr, NET_IPv6_ADDR_SIZE);
+            if (mem_same == DEF_YES) {
+                Mem_Copy(&p_dest_cache->AddrNextHop, p_addr_new, NET_IPv6_ADDR_SIZE);
+            }
+        }
+        p_dest_cache = p_dest_cache->NextPtr;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetNDP_RemoveAddrDestCache()
+*
+* Description : (1) Invalidate Entry in Destination Cache with Next-Hop Address corresponding to
+*                   given address:
+*
+*                   (a) Search NDP Destination Cache List
+*                   (b) Invalidate Next-Hop address in NDP destination cache when same as given address.
+*
+*
+* Argument(s) : if_nbr      Interface number of the interface for the given address.
+*
+*               p_prefix    Pointer to IPv6 address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_CacheTimeout(),
+*               NetNDP_CfgAddrPrefix().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_RemoveAddrDestCache(       NET_IF_NBR   if_nbr,
+                                         const  CPU_INT08U  *p_addr)
+{
+    NET_NDP_DEST_CACHE  *p_dest_cache;
+    CPU_BOOLEAN          mem_same;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_ERR              err;
+
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+     NetIF_IsValidCfgdHandler(if_nbr, &err);
+     if (err != NET_IF_ERR_NONE) {
+         return;
+     }
+                                                                 /* ------------ VALIDATE NO NULL POINTERS ------------ */
+    if (p_addr == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_dest_cache = NetNDP_DestListHead;
+    while (p_dest_cache != (NET_NDP_DEST_CACHE *)0) {
+
+        if (p_dest_cache->IF_Nbr == if_nbr) {
+            mem_same = Mem_Cmp(&p_dest_cache->AddrNextHop, p_addr, NET_IPv6_ADDR_SIZE);
+            if (mem_same == DEF_YES) {
+                Mem_Clr(&p_dest_cache->AddrNextHop, NET_IPv6_ADDR_SIZE);
+                p_dest_cache->IsValid = DEF_NO;
+                p_dest_cache->OnLink  = DEF_NO;
+            }
+        }
+        p_dest_cache = p_dest_cache->NextPtr;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NETNDP_RemovePrefixDestCache()
+*
+* Description : (1) Invalidate Entry in Destination Cache with Next-Hop Address with same given prefix:
+*
+*                   (a) Search NDP Destination Cache List
+*                   (b) Invalidate Next-Hop address in NDP cache when prefix match.
+*
+*
+* Argument(s) : if_nbr      Interface number of the interface for the given prefix.
+*
+*               p_prefix    Pointer to address prefix.
+*
+*               prefix_len  Length of the prefix.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_CacheTimeout(),
+*               NetNDP_CfgAddrPrefix().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_RemovePrefixDestCache (       NET_IF_NBR   if_nbr,
+                                            const  CPU_INT08U  *p_prefix,
+                                                   CPU_INT08U   prefix_len)
+{
+    NET_NDP_DEST_CACHE  *p_dest_cache;
+    CPU_BOOLEAN          valid;
+    NET_ERR              err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+     NetIF_IsValidCfgdHandler(if_nbr, &err);
+     if (err != NET_IF_ERR_NONE) {
+         return;
+     }
+                                                                 /* ------------ VALIDATE NO NULL POINTERS ------------ */
+    if (p_prefix == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_dest_cache = NetNDP_DestListHead;
+    while (p_dest_cache != (NET_NDP_DEST_CACHE *)0) {
+
+        if (p_dest_cache->IF_Nbr == if_nbr) {
+            valid = NetIPv6_IsAddrAndPrefixLenValid(                  &p_dest_cache->AddrNextHop,
+                                                     (NET_IPv6_ADDR *) p_prefix,
+                                                                       prefix_len,
+                                                                      &err);
+           (void)&err;
+
+            if (valid == DEF_YES) {
+                Mem_Clr(&p_dest_cache->AddrNextHop, NET_IPv6_ADDR_SIZE);
+                p_dest_cache->IsValid = DEF_NO;
+                p_dest_cache->OnLink  = DEF_NO;
+            }
+        }
+        p_dest_cache = p_dest_cache->NextPtr;
+    }
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetNDP_CacheAddPend()
+*
+* Description : (1) Add a 'PENDING' NDP cache into the NDP Cache List & transmit an NDP Request :
+*
+*                   (a) Configure NDP cache :
+*                       (1) Get sender protocol sender
+*                       (2) Get default-configured NDP cache
+*                       (3) NDP cache state
+*                       (4) Enqueue transmit buffer to NDP cache queue
+*                   (b) Insert   NDP cache into NDP Cache List
+*                   (c) Transmit NDP Request to resolve NDP cache
+*
+*
+* Argument(s) : p_buf            Pointer to network buffer to transmit.
+*               ----             Argument checked   in NetCache_Handler().
+*
+*               p_buf_hdr        Pointer to network buffer header.
+*               --------         Argument validated in NetCache_Handler().
+*
+*               p_addr_protocol  Pointer to protocol address (see Note #2).
+*               --------------   Argument checked   in NetCache_Handler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CACHE_ERR_PEND              NDP cache added in 'PENDING' state.
+*
+*                                                               - RETURNED BY NetNDP_NeighborCacheAddEntry() : -
+*                               NET_CACHE_ERR_NONE_AVAIL        NO available NDP caches to allocate.
+*                               NET_CACHE_ERR_INVALID_TYPE      NDP cache is NOT a valid cache type.
+*                               NET_ERR_FAULT_NULL_FNCT           Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL          NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE        Network timer is NOT a valid timer type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_CacheHandler().
+*
+* Note(s)     : (2) 'p_addr_protocol' MUST point to a valid protocol address in network-order.
+*
+*                    See also 'NetNDP_CacheHandler()  Note #2e3'.
+*
+*               (3) (a) RFC #1122, Section 2.3.2.2 states that "the link layer SHOULD" :
+*
+*                       (1) "Save (rather than discard) ... packets destined to the same unresolved
+*                            IP address and" ...
+*                       (2) "Transmit the saved packet[s] when the address has been resolved."
+*
+*                   (b) Since NDP Layer is the last layer to handle & queue the transmit network
+*                       buffer, it is NOT necessary to increment the network buffer's reference
+*                       counter to include the pending NDP cache buffer queue as a new reference
+*                       to the network buffer.
+*
+*               (4) Some buffer controls were previously initialized in NetBuf_Get() when the packet
+*                   was received at the network interface layer.  These buffer controls do NOT need
+*                   to be re-initialized but are shown for completeness.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_NeighborCacheAddPend (const  NET_BUF      *p_buf,
+                                                  NET_BUF_HDR  *p_buf_hdr,
+                                           const  CPU_INT08U   *p_addr_protocol,
+                                                  NET_ERR      *p_err)
+{
+    NET_CACHE_ADDR_NDP       *p_cache_addr_ndp;
+    NET_NDP_NEIGHBOR_CACHE   *p_cache_ndp;
+    CPU_INT08U                addr_protocol_sender[NET_IPv6_ADDR_SIZE];
+    NET_IF_NBR                if_nbr;
+    NET_TMR_TICK              timeout_tick;
+    NET_NDP_OPT_HW_ADDR_HDR   ndp_opt_hw_addr_hdr;
+    CPU_INT08U                hw_addr[NET_IP_HW_ADDR_LEN];
+    CPU_INT08U                hw_addr_len;
+    CPU_SR_ALLOC();
+
+
+                                                                /* ------------------ CFG NDP CACHE ------------------- */
+                                                                /* Copy sender protocol addr to net order.              */
+                                                                /* Cfg protocol addr generically from IP addr.          */
+    Mem_Copy(&addr_protocol_sender[0], &p_buf_hdr->IPv6_AddrSrc, NET_IPv6_ADDR_SIZE);
+
+    if_nbr = p_buf_hdr->IF_Nbr;
+
+    CPU_CRITICAL_ENTER();
+    timeout_tick = NetNDP_SolicitTimeout_tick;
+    CPU_CRITICAL_EXIT();
+
+    p_cache_addr_ndp = NetNDP_NeighborCacheAddEntry(if_nbr,
+                                                    0,
+                                                    p_addr_protocol,
+                                                    addr_protocol_sender,
+                                                    timeout_tick,
+                                                    NetNDP_SolicitTimeout,
+                                                    NET_NDP_CACHE_STATE_INCOMPLETE,
+                                                    DEF_NO,
+                                                    p_err);
+    if (*p_err != NET_NDP_ERR_NONE) {
+        return;
+    }
+
+                                                                /* Cfg buf's unlink fnct/obj to NDP cache.              */
+    p_buf_hdr->UnlinkFnctPtr  = (NET_BUF_FNCT)NetCache_UnlinkBuf;
+    p_buf_hdr->UnlinkObjPtr   = (void       *)p_cache_addr_ndp;
+
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #4].                */
+    p_buf_hdr->PrevSecListPtr = (NET_BUF *)0;
+    p_buf_hdr->NextSecListPtr = (NET_BUF *)0;
+#endif
+                                                                /* Q buf to NDP cache (see Note #3a1).                  */
+    p_cache_addr_ndp->TxQ_Head    = (NET_BUF *)p_buf;
+    p_cache_addr_ndp->TxQ_Tail    = (NET_BUF *)p_buf;
+    p_cache_addr_ndp->TxQ_Nbr++;
+                                                                /* -------------------- TX NDP REQ -------------------- */
+                                                                /* Tx Neighbor Solicitation msg to resolve NDP cache.   */
+
+    ndp_opt_hw_addr_hdr.Opt.Type = NET_NDP_OPT_TYPE_ADDR_SRC;
+    ndp_opt_hw_addr_hdr.Opt.Len  = 1u;
+
+    hw_addr_len = sizeof(hw_addr);
+    NetIF_AddrHW_GetHandler(if_nbr, hw_addr, &hw_addr_len, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+          return;
+    }
+
+    Mem_Copy((void     *)&ndp_opt_hw_addr_hdr.Addr[0],
+             (void     *)&hw_addr[0],
+             (CPU_SIZE_T) hw_addr_len);
+
+    NetNDP_TxNeighborSolicitation(                  if_nbr,
+                                                   &p_buf_hdr->IPv6_AddrSrc,
+                                  (NET_IPv6_ADDR *) p_addr_protocol,
+                                                    NET_NDP_NEIGHBOR_SOL_TYPE_RES,
+                                                    p_err);
+
+    p_cache_ndp = (NET_NDP_NEIGHBOR_CACHE *)p_cache_addr_ndp->ParentPtr;
+    p_cache_ndp->ReqAttemptsCtr++;                              /* Inc req attempts ctr.                                */
+
+   *p_err = NET_NDP_ERR_NEIGHBOR_CACHE_PEND;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetNDP_NeighborCacheAddEntry()
+*
+* Description : Add new entry to the NDP cache.
+*
+* Argument(s) : if_nbr              Interface number for this cache entry.
+*
+*               p_addr_hw           Pointer to hardware address.
+*
+*               p_addr_ipv6         Pointer to IPv6 address of Neighbor.
+*
+*               p_addr_ipv6_sender  Pointer to IPv6 address of the sender.
+*
+*               timeout_tick        Timeout value (in 'NET_TMR_TICK' ticks).
+*
+*               timeout_fnct        Pointer to timeout function.
+*
+*               cache_state         Neighbor Cache initial state.
+*
+*               is_router           Indicate if Neighbor entry is also a router.
+*                                       DEF_YES  Neighbor is also a router.
+*                                       DEF_NO   Neighbor is not advertising itself as a router.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                     NDP cache entry successfully added to the cache.
+*
+*                               NET_ERR_FAULT_NULL_PTR                 Argument 'p_addr_hw' / 'p_addr_ipv6' passed
+*                                                                        a NULL pointer.
+*                                                                    NDP Address Cache find has not Neighbor cache
+*                                                                        parent.
+*
+*                                                                    - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_INVALID_IF                Invalid network interface number.
+*
+*                               NET_NDP_ERR_NEIGHBOR_CACHE_ADD_FAIL  Failed to add new neighbor in neighbor cache.
+*
+*                                                                    ----- RETURNED BY NetCache_CfgAddrs() : -----
+*                               NET_CACHE_ERR_NONE_AVAIL             NO available caches to allocate.
+*                               NET_CACHE_ERR_INVALID_TYPE           Cache is NOT a valid cache type.
+*                               NET_ERR_FAULT_NULL_FNCT                Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL               NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE             Network timer is NOT a valid timer type.
+*
+* Return(s)   : Pointer to the NDP cache entry created.
+*
+* Caller(s)   : NetNDP_CfgAddrPrefix(),
+*               NetNDP_DAD_Start(),
+*               NetNDP_CacheAddPend(),
+*               NetNDP_RxNeighborSolicitation(),
+*               NetNDP_RxRouterAdvertisement().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_CACHE_ADDR_NDP  *NetNDP_NeighborCacheAddEntry (       NET_IF_NBR     if_nbr,
+                                                           const  CPU_INT08U    *p_addr_hw,
+                                                           const  CPU_INT08U    *p_addr_ipv6,
+                                                           const  CPU_INT08U    *p_addr_ipv6_sender,
+                                                                  NET_TMR_TICK   timeout_tick,
+                                                                  CPU_FNCT_PTR   timeout_fnct,
+                                                                  CPU_INT08U     cache_state,
+                                                                  CPU_BOOLEAN    is_router,
+                                                                  NET_ERR       *p_err)
+{
+    NET_CACHE_ADDR_NDP      *p_cache_addr_ndp;
+    NET_NDP_NEIGHBOR_CACHE  *p_cache_ndp;
+    CPU_BOOLEAN              timer_en;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+     NetIF_IsValidCfgdHandler(if_nbr, p_err);
+     if (*p_err != NET_IF_ERR_NONE) {
+          return ((NET_CACHE_ADDR_NDP *)0);
+     }
+                                                                /* ------------ VALIDATE NO NULL POINTERS ------------ */
+    if (p_addr_ipv6 == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return ((NET_CACHE_ADDR_NDP *)0);
+    }
+#endif
+
+    if (timeout_tick == 0) {
+        timer_en = DEF_NO;
+    } else {
+        timer_en = DEF_YES;
+    }
+
+    p_cache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_CfgAddrs(              NET_CACHE_TYPE_NDP,
+                                                                             if_nbr,
+                                                               (CPU_INT08U *)p_addr_hw,
+                                                                             NET_IF_HW_ADDR_LEN_MAX,
+                                                               (CPU_INT08U *)p_addr_ipv6,
+                                                               (CPU_INT08U *)p_addr_ipv6_sender,
+                                                                             NET_IPv6_ADDR_SIZE,
+                                                                             timer_en,
+                                                                             timeout_fnct,
+                                                                             timeout_tick,
+                                                                             p_err);
+    if (*p_err != NET_CACHE_ERR_NONE) {
+        *p_err = NET_NDP_ERR_NEIGHBOR_CACHE_ADD_FAIL;
+         return((NET_CACHE_ADDR_NDP *)0);
+    }
+
+                                                                /* Insert entry into NDP cache list.                    */
+    NetCache_Insert((NET_CACHE_ADDR *) p_cache_addr_ndp);
+
+                                                                /* Get parent cache.                                    */
+    p_cache_ndp = (NET_NDP_NEIGHBOR_CACHE *)NetCache_GetParent((NET_CACHE_ADDR *)p_cache_addr_ndp);
+    if (p_cache_ndp == ((NET_NDP_NEIGHBOR_CACHE *)0)) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return((NET_CACHE_ADDR_NDP *)0);
+    }
+
+    p_cache_ndp->State = cache_state;
+
+    if (is_router == DEF_TRUE) {
+                                                            /* Set isRouter Flag to high.                           */
+        DEF_BIT_SET(p_cache_ndp->Flags, NET_NDP_CACHE_FLAG_ISROUTER);
+    } else {
+        DEF_BIT_CLR(p_cache_ndp->Flags, NET_NDP_CACHE_FLAG_ISROUTER);
+    }
+
+   *p_err = NET_NDP_ERR_NONE;
+
+    return(p_cache_addr_ndp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetNDP_NeighborCacheUpdateEntry()
+*
+* Description : Update existing entry in the Neighbor cache.
+*
+* Argument(s) : p_cacne_addr_ndp    Pointer to entry in Address Cache.
+*
+*               p_ndp_opt_hw_addr   Pointer to hw address received in NDP message.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_RxRouterAdvertisement(),
+*               NetNDP_RxNeighborSolicitation().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_NeighborCacheUpdateEntry(NET_CACHE_ADDR_NDP  *p_cache_addr_ndp,
+                                              CPU_INT08U          *p_ndp_opt_hw_addr)
+{
+    NET_NDP_NEIGHBOR_CACHE  *p_cache;
+    CPU_BOOLEAN              same_hw_addr;
+    NET_TMR_TICK             timeout_tick;
+    NET_ERR                  err;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_cache_addr_ndp == (NET_CACHE_ADDR_NDP *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_cache = (NET_NDP_NEIGHBOR_CACHE *)NetCache_GetParent((NET_CACHE_ADDR *)p_cache_addr_ndp);
+
+
+    same_hw_addr =  Mem_Cmp((void     *)&p_cache_addr_ndp->AddrHW,
+                            (void     *) p_ndp_opt_hw_addr,
+                            (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+
+    if(same_hw_addr == DEF_NO) {                                /* Hw addr in cache isn't the same as the received one. */
+        Mem_Copy((void     *)&p_cache_addr_ndp->AddrHW[0],
+                 (void     *) p_ndp_opt_hw_addr,
+                 (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+
+        CPU_CRITICAL_ENTER();
+        timeout_tick = NetNDP_NeighborCacheTimeout_tick;
+        CPU_CRITICAL_EXIT();
+                                                                /* Set cache tmr to CacheTimeout.                       */
+        NetTmr_Set(p_cache->TmrPtr,
+                   NetNDP_CacheTimeout,
+                   timeout_tick,
+                  &err);
+                                                                /* Add state of the entry cache to STALE.               */
+        p_cache->State = NET_NDP_CACHE_STATE_STALE;
+    } else {                                                    /* Hw addr in cache is the same as the received one.    */
+        CPU_CRITICAL_ENTER();
+        timeout_tick = NetNDP_ReachableTimeout_tick;
+        CPU_CRITICAL_EXIT();
+                                                                /* Set cache tmr to ReachableTimeout.                   */
+        NetTmr_Set(p_cache->TmrPtr,
+                   NetNDP_ReachableTimeout,
+                   timeout_tick,
+                  &err);
+                                                                /* Add state of the entry cache to REACHABLE.           */
+        p_cache->State = NET_NDP_CACHE_STATE_REACHABLE;
+    }
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetNDP_CacheRemoveEntry()
+*
+* Description : Remove an entry in the NDP Neighbor cache.
+*
+* Argument(s) : p_cache   Pointer to the NDP Neighbor entry to remove.
+*
+*               tmr_free  Indicate if the neighbor cache timer must be freed.
+*                           DEF_YES         Free timer.
+*                           DEF_NO   Do not free timer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_RxRouterAdvertisement().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_NeighborCacheRemoveEntry(NET_NDP_NEIGHBOR_CACHE  *p_cache,
+                                              CPU_BOOLEAN              tmr_free)
+{
+    NET_CACHE_ADDR_NDP  *p_cache_addr_ndp;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_cache == (NET_NDP_NEIGHBOR_CACHE *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_cache_addr_ndp = p_cache->CacheAddrPtr;
+
+    NetNDP_RemoveAddrDestCache(p_cache_addr_ndp->IF_Nbr,
+                              &p_cache_addr_ndp->AddrProtocol[0]);
+
+    NetCache_Remove((NET_CACHE_ADDR *)p_cache_addr_ndp,         /* Clr Addr Cache and free tmr if specified.            */
+                                      tmr_free);
+
+    p_cache->TmrPtr         = (NET_TMR *)0;
+    p_cache->ReqAttemptsCtr =  0u;
+    p_cache->State          =  NET_NDP_CACHE_STATE_NONE;
+    p_cache->Flags          =  NET_CACHE_FLAG_NONE;
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetNDP_RouterDfltGet()
+*
+* Description : Retrieve the default router for the given Interface or if no default router is defined,
+*               get a router in the router list.
+*
+* Argument(s) : if_nbr      Interface number on which the packet must be send.
+*
+*               p_router    Pointer to variable that will receive the router object found.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                A  router has been found.
+*                               NET_NDP_ERR_ROUTER_NOT_FOUND    No router has been found.
+*                               NET_NDP_ERR_FAULT               Unexpected error.
+*
+* Return(s)   : DEF_YES, if the router found is the router listed as the default one.
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetNDP_NextHop().
+*
+* Note(s)     : (1) RFC 4861 section 6.3.6 (Default Router Selection) specifies :
+*                   "When no routers on the list are known to be reachable or probably reachable, routers
+*                    SHOULD be selected in a round-robin fashion, so that subsequent requests for a
+*                    default router do not return the same router until all other routers have been
+*                    selected."
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetNDP_RouterDfltGet(NET_IF_NBR        if_nbr,
+                                          NET_NDP_ROUTER  **p_router,
+                                          NET_ERR          *p_err)
+{
+    NET_NDP_ROUTER  *p_router_ix;
+    NET_NDP_ROUTER  *p_router_next;
+    NET_NDP_ROUTER  *p_router_cache;
+    CPU_BOOLEAN      robin_found;
+    CPU_BOOLEAN      router_found_next;
+
+
+    if (NetNDP_DefaultRouterTbl[if_nbr] != (NET_NDP_ROUTER *)0) {
+       *p_router = NetNDP_DefaultRouterTbl[if_nbr];
+       *p_err = NET_NDP_ERR_NONE;
+        return (DEF_YES);
+    }
+
+    robin_found       = DEF_NO;
+    router_found_next = DEF_NO;
+    p_router_ix       = DEF_NULL;
+    p_router_next     = DEF_NULL;
+    p_router_cache    = DEF_NULL;
+
+    p_router_ix = NetNDP_RouterListHead;
+    while ((p_router_ix != DEF_NULL) &&                         /* Search Default Router List for suitable router.      */
+           (robin_found == DEF_NO)) {
+
+        if (p_router_ix->IF_Nbr == if_nbr) {
+
+            p_router_next = p_router_ix->NextPtr;
+                                                                /* Search for suitable next router (on same IF).        */
+            while ((p_router_next     != DEF_NULL) &&
+                   (router_found_next == DEF_NO)  ) {
+                if (p_router_next->IF_Nbr == if_nbr) {
+                    router_found_next = DEF_YES;
+                } else {
+                    p_router_next = p_router_next->NextPtr;
+                }
+            }
+                                                                /* Cache first good router in case round-robin has ..   */
+                                                                /* ... not been assigned.                               */
+            if (p_router_cache == DEF_NULL) {
+                p_router_cache = p_router_ix;
+            }
+
+                                                                /* Find if router has been assigned with round robin.   */
+            if (p_router_ix->RoundRobin == DEF_YES) {
+                p_router_ix->RoundRobin = DEF_NO;
+                robin_found = DEF_YES;
+                if (p_router_next != DEF_NULL) {
+                    p_router_next->RoundRobin = DEF_YES;
+                    p_router_cache  = p_router_next;
+                }
+            }
+        }
+
+        router_found_next = DEF_NO;
+        p_router_ix = p_router_next;
+    }
+
+    if (robin_found == DEF_YES) {                               /* A router assigned with round-robin was found.        */
+       *p_router = p_router_cache;
+       *p_err    = NET_NDP_ERR_NONE;
+    } else if (p_router_cache != DEF_NULL) {                    /* No router was assign with the round robin...         */
+        p_router_cache->RoundRobin = DEF_YES;                   /* ... assign first find in list.                       */
+       *p_router = NetNDP_RouterListHead;
+       *p_err    = NET_NDP_ERR_NONE;
+    } else {                                                    /* No router was found.                                 */
+       *p_router = DEF_NULL;
+       *p_err    = NET_NDP_ERR_ROUTER_NOT_FOUND;
+    }
+    return (DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_RouterCfg()
+*
+* Description : (1) Get and Configure a Router from the router pool.
+*
+*                   (a) Get a router from the router pool and insert it in router list.
+*                   (b) Configure router with received arguments.
+*
+*
+* Argument(s) : if_nbr          Number of the Interface that is on same link than router.
+*
+*               p_addr          Pointer to router's IPv6 address.
+*
+*               timer_en        Indicate whether are not to set a network timer for the router:
+*
+*                                   DEF_YES                Set network timer for router.
+*                                   DEF_NO          Do NOT set network timer for router.
+*
+*               timeout_fnct    Pointer to timeout function.
+*
+*               timeout_tick    Timeout value (in 'NET_TMR_TICK' ticks).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                    Router successfully configured.
+*                               NET_ERR_FAULT_NULL_PTR                Argument 'p_addr' passed a NULL pointer.
+*
+*                                                                   - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+*                                                                   ----- RETURNED BY NetNDP_RouterGet() : -----
+*                               NET_NDP_ERR_ROUTER_NONE_AVAIL       NO available router to allocate.
+*
+*                                                                   -------- RETURNED BY NetTmr_Get() : --------
+*                               NET_ERR_FAULT_NULL_FNCT               Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL              NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE            Network timer is NOT a valid timer type.
+*
+* Return(s)   : Pointer to configured router entry.
+*
+* Caller(s)   : NetNDP_RxRouterAdvertisement().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_NDP_ROUTER  *NetNDP_RouterCfg(NET_IF_NBR      if_nbr,
+                                          NET_IPv6_ADDR  *p_addr,
+                                          CPU_BOOLEAN     timer_en,
+                                          CPU_FNCT_PTR    timeout_fnct,
+                                          NET_TMR_TICK    timeout_tick,
+                                          NET_ERR        *p_err)
+{
+    NET_NDP_ROUTER *p_router;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+     NetIF_IsValidCfgdHandler(if_nbr, p_err);
+     if (*p_err != NET_IF_ERR_NONE) {
+          return ((NET_NDP_ROUTER *)0);
+     }
+                                                                 /* ------------ VALIDATE NO NULL POINTERS ------------ */
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return ((NET_NDP_ROUTER *)0);
+    }
+#endif
+
+    p_router = NetNDP_RouterGet(p_err);
+
+    if (p_router == (NET_NDP_ROUTER *)0) {
+       return ((NET_NDP_ROUTER *)0);                            /* Return err from NetNDP_RouterGet().                  */
+    }
+
+    if (timer_en == DEF_YES) {
+
+        p_router->TmrPtr = NetTmr_Get((CPU_FNCT_PTR)timeout_fnct,
+                                      (void       *)p_router,
+                                      (NET_TMR_TICK)timeout_tick,
+                                      (CPU_INT16U  )NET_TMR_FLAG_NONE,
+                                      (NET_ERR    *)p_err);
+        if (*p_err != NET_TMR_ERR_NONE) {                       /* If timer unavailable, ...                            */
+                                                                /* ... free Router.                                     */
+            NetNDP_RouterRemove((NET_NDP_ROUTER *)p_router, DEF_NO);
+            return ((NET_NDP_ROUTER *)0);
+        }
+    }
+
+                                                                /* ---------------- CFG ROUTER ENTRY ------------------ */
+    p_router->IF_Nbr = if_nbr;
+
+    p_router->RoundRobin = DEF_NO;
+
+    Mem_Copy(&p_router->Addr, p_addr, NET_IPv6_ADDR_SIZE);
+
+    p_router->NDP_CachePtr = (NET_NDP_NEIGHBOR_CACHE*)0;
+
+   *p_err = NET_NDP_ERR_NONE;
+
+    return (p_router);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetNDP_RouterSrch()
+*
+* Description : Search for a matching Router for the given address into the Default Router list.
+*
+* Argument(s) : if_nbr      Interface number of the router to look for.
+*
+*               p_addr      Pointer to the ipv6 address to look for in the Default Router list.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                Router FOUND in router list.
+*                               NET_NDP_ERR_ROUTER_NOT_FOUND    Router NOT found in router list.
+*                               NET_ERR_FAULT_NULL_PTR            Argument 'p_addr' passed a NULL pointer.
+*
+*                                                               - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Pointer to router entry found in router list.
+*
+* Caller(s)   : NetNDP_RxRouterAdvertisement(),
+*               NetNDP_RxNeighborAdvertisement(),
+*               NetNDP_CacheReqTimeout().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_NDP_ROUTER  *NetNDP_RouterSrch(NET_IF_NBR      if_nbr,
+                                           NET_IPv6_ADDR  *p_addr,
+                                           NET_ERR        *p_err)
+{
+    NET_NDP_ROUTER    *p_router;
+    CPU_INT08U        *p_router_addr;
+    CPU_BOOLEAN        found;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+     NetIF_IsValidCfgdHandler(if_nbr, p_err);
+     if (*p_err != NET_IF_ERR_NONE) {
+          return ((NET_NDP_ROUTER *)0);
+     }
+                                                                 /* ------------ VALIDATE NO NULL POINTERS ------------ */
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return ((NET_NDP_ROUTER *)0);
+    }
+#endif
+
+    p_router = (NET_NDP_ROUTER *)NetNDP_RouterListHead;
+
+    while (p_router != (NET_NDP_ROUTER *)0) {                 /* Srch Default Router List ...                         */
+                                                              /* ... until router found.                              */
+
+        if (p_router->IF_Nbr == if_nbr) {
+
+            p_router_addr = (CPU_INT08U   *)&p_router->Addr.Addr[0];
+
+                                                                /* Cmp address with Router address.                     */
+            found         =  Mem_Cmp((void     *)p_addr,
+                                     (void     *)p_router_addr,
+                                     (CPU_SIZE_T)NET_IPv6_ADDR_SIZE);
+
+            if (found == DEF_YES) {                             /* If a router is found, ..                             */
+               *p_err = NET_NDP_ERR_NONE;
+                return (p_router);                              /* .. return found Router.                              */
+            }
+        }
+
+        p_router = p_router->NextPtr;;
+    }
+
+   *p_err = NET_NDP_ERR_ROUTER_NOT_FOUND;
+
+    return (p_router);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_RouterGet()
+*
+* Description : (1) Get a Router entry.
+*
+*                   (a) Get a router entry from the router pool.
+*                   (b) Insert router entry in the Default Router list.
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                Router successfully acquired.
+*                               NET_NDP_ERR_ROUTER_NONE_AVAIL   NO available router to allocate.
+*
+* Return(s)   : Pointer to router entry.
+*
+* Caller(s)   : NetNDP_RouterCfg().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_NDP_ROUTER  *NetNDP_RouterGet(NET_ERR  *p_err)
+{
+    NET_NDP_ROUTER  *p_router;
+    NET_ERR          err;
+
+
+    if (NetNDP_RouterPoolPtr != (NET_NDP_ROUTER *)0) {          /* If Router pool NOT empty, ...             */
+                                                                /* ...  get router from pool.                    */
+        p_router              = NetNDP_RouterPoolPtr;
+        NetNDP_RouterPoolPtr  = (NET_NDP_ROUTER *)p_router->NextPtr;
+
+                                                                /* If Router List NOT empty, ...              */
+    } else if (NetNDP_RouterListTail != (NET_NDP_ROUTER *)0) {
+                                                                /* ... get Router from list tail.             */
+        p_router              = (NET_NDP_ROUTER *)NetNDP_RouterListTail;
+        NetNDP_RouterRemove(p_router, DEF_YES);
+        p_router              = NetNDP_RouterPoolPtr;
+        NetNDP_RouterPoolPtr  = (NET_NDP_ROUTER *)p_router->NextPtr;
+
+    } else {                                                   /* Else none avail, rtn err (see Note #4).      */
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.RouterNoneAvailCtr);
+       *p_err =   NET_NDP_ERR_ROUTER_NONE_AVAIL;
+        return ((NET_NDP_ROUTER *)0);
+
+    }
+
+                                                                /* -------------------- INIT CACHE -------------------- */
+    NetNDP_RouterClr(p_router);
+
+                                                                /* ------------ UPDATE ROUTER POOL STATS -------------- */
+    NetStat_PoolEntryUsedInc(&NetNDP_RouterPoolStat, &err);
+
+                                                                /* ---------- INSERT ROUTER INTO ROUTER LIST ---------- */
+    p_router->PrevPtr = (NET_NDP_ROUTER *)0;
+    p_router->NextPtr = NetNDP_RouterListHead;
+                                                                /* If list NOT empty, insert before head.               */
+    if (NetNDP_RouterListHead != (NET_NDP_ROUTER *)0) {
+        NetNDP_RouterListHead->PrevPtr = p_router;
+    } else {                                                    /* Else add first Router to list.                       */
+        NetNDP_RouterListTail = p_router;
+    }
+                                                                /* Insert Router @ list head.                           */
+    NetNDP_RouterListHead = p_router;
+
+   *p_err =  NET_NDP_ERR_NONE;
+
+    return (p_router);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetNDP_RouterRemove()
+*
+* Description : (1) Remove a router from the router list.
+*
+*                   (a) Unlink router entry from router list.
+*                   (b) Free router entry.
+*
+*
+* Argument(s) : p_router    Pointer to the Router entry to insert into the router list.
+*
+*               tmr_free    Indicate whether to free network timer :
+*
+*                               DEF_YES                Free network timer for prefix.
+*                               DEF_NO          Do NOT free network timer for prefix.
+*                                                     [Freed by NetTmr_TaskHandler()].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_RxRouterAdvertisement(),
+*               NetNDP_RxNeighborAdvertisement(),
+*               NetNDP_RouterCfg(),
+*               NetNDP_RouterGet(),
+*               NetNDP_CacheReqTimeout(),
+*               NetNDP_RouterTimeout().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_RouterRemove(NET_NDP_ROUTER  *p_router,
+                                  CPU_BOOLEAN      tmr_free)
+{
+    NET_NDP_ROUTER  *p_router_next;
+    NET_NDP_ROUTER  *p_router_prev;
+    NET_ERR          err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_router == (NET_NDP_ROUTER *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_router_prev = p_router->PrevPtr;
+    p_router_next = p_router->NextPtr;
+
+                                                                /* ---------- UNLINK ROUTER FROM ROUTER LIST ---------- */
+                                                                /* Point previous Router to next Router.                */
+    if (p_router_prev != (NET_NDP_ROUTER *)0) {
+        p_router_prev->NextPtr = p_router_next;
+    } else {
+        NetNDP_RouterListHead  = p_router_next;
+    }
+                                                                /* Point next Router to previous Router.                */
+    if (p_router_next != (NET_NDP_ROUTER *)0) {
+        p_router_next->PrevPtr = p_router_prev;
+    } else {
+        NetNDP_RouterListTail  = p_router_prev;
+    }
+
+    #if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)                 /* Clear Router's pointers (see Note #1).               */
+    p_router->PrevPtr = (NET_NDP_ROUTER *)0;
+    p_router->NextPtr = (NET_NDP_ROUTER *)0;
+    #endif
+
+                                                                /* ----------------- FREE ROUTER TMR ------------------ */
+    if (tmr_free == DEF_YES) {
+        if (p_router->TmrPtr != (NET_TMR *)0) {
+         NetTmr_Free(p_router->TmrPtr);
+         p_router->TmrPtr = (NET_TMR *)0;
+        }
+    }
+
+                                                                /* ---------------- CLEAR ROUTER ENTRY ---------------- */
+    p_router->NDP_CachePtr = (NET_NDP_NEIGHBOR_CACHE *)0;
+
+    #if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        NetNDP_RouterClr(p_router);
+    #endif
+
+                                                                /* ---------------- FREE ROUTER ENTRY ----------------- */
+    p_router->NextPtr    = (NET_NDP_ROUTER *)NetNDP_RouterPoolPtr;
+    NetNDP_RouterPoolPtr = (NET_NDP_ROUTER *)p_router;
+
+                                                               /* ------------- UPDATE ROUTER POOL STATS -------------- */
+    NetStat_PoolEntryUsedDec(&NetNDP_RouterPoolStat, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetNDP_RouterClr()
+*
+* Description : Clear a router entry.
+*
+* Argument(s) : p_router    Pointer to the Router entry to clear.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_RouterGet(),
+*               NetNDP_RouterRemove().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_RouterClr(NET_NDP_ROUTER  *p_router)
+{
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_router == (NET_NDP_ROUTER *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_router->PrevPtr = (NET_NDP_ROUTER *)0;
+    p_router->NextPtr = (NET_NDP_ROUTER *)0;
+
+    p_router->IF_Nbr = NET_IF_NBR_NONE;
+
+    p_router->NDP_CachePtr = (NET_NDP_NEIGHBOR_CACHE *)0;
+
+    Mem_Clr(&p_router->Addr, NET_IPv6_ADDR_SIZE);
+
+    p_router->LifetimeSec = 0u;
+
+    if (p_router->TmrPtr != (NET_TMR *)0) {
+        NetTmr_Free(p_router->TmrPtr);
+        p_router->TmrPtr = (NET_TMR *)0;
+    }
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetNDP_PrefixSrchMatchAddr()
+*
+* Description : Search the prefix list for a match with the given address.
+*
+* Argument(s) : if_nbr      Interface number of the prefix to look for.
+*               ------      Argument checked by caller(s).
+*
+*               p_addr      Pointer to the ipv6 address to match with a prefix in the Prefix list.
+*               ------      Argument checked by caller(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                Prefix FOUND in prefix list.
+*                               NET_NDP_ERR_PREFIX_NOT_FOUND    Prefix NOT found in prefix list.
+*
+* Return(s)   : Pointer to prefix entry found in list.
+*
+* Caller(s)   : NetNDP_IsAddrOnLink().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_NDP_PREFIX  *NetNDP_PrefixSrchMatchAddr (       NET_IF_NBR      if_nbr,
+                                                     const  NET_IPv6_ADDR  *p_addr,
+                                                            NET_ERR        *p_err)
+{
+    NET_NDP_PREFIX    *p_prefix;
+    NET_NDP_PREFIX    *p_prefix_next;
+    CPU_INT08U        *p_prefix_addr;
+    NET_IPv6_ADDR      addr_masked;
+    CPU_BOOLEAN        found;
+
+
+    found = DEF_NO;
+
+    p_prefix = (NET_NDP_PREFIX *)NetNDP_PrefixListHead;
+    while ((p_prefix != (NET_NDP_PREFIX *)0) &&                 /* Search Prefix List ...                               */
+           (found    ==  DEF_NO)) {                             /* ... until Prefix found.                              */
+
+        p_prefix_next = (NET_NDP_PREFIX *) p_prefix->NextPtr;
+
+        if (p_prefix->IF_Nbr == if_nbr) {
+
+            p_prefix_addr = (CPU_INT08U *)&p_prefix->Prefix.Addr[0];
+
+            NetIPv6_AddrMaskByPrefixLen(p_addr, p_prefix->PrefixLen, &addr_masked, p_err);
+                                                                /* Compare Prefix with prefix in list.                  */
+            found =  Mem_Cmp((void     *)&addr_masked,
+                             (void     *) p_prefix_addr,
+                             (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+
+            if (found == DEF_YES) {                             /* If Prefix found, ..                                  */
+               *p_err = NET_NDP_ERR_NONE;
+                return (p_prefix);
+            }
+        }
+
+        p_prefix = (NET_NDP_PREFIX *)p_prefix_next;             /* Advertise to next Router.                            */
+    }
+
+   *p_err = NET_NDP_ERR_PREFIX_NOT_FOUND;
+
+    return (p_prefix);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetNDP_PrefixCfg()
+*
+* Description : (1) Get and Configured a prefix from the Prefix pool.
+*
+*                   (a) Get a prefix from the prefix pool and insert it in prefix list.
+*                   (b) Configure prefix with received arguments.
+*
+*
+* Argument(s) : if_nbr          Interface number of the prefix.
+*
+*               p_addr_prefix   Pointer to IPv6 prefix.
+*
+*               prefix_len      Length of the prefix to configure.
+*
+*               timer_en        Indicate whether are not to set a network timer for the prefix:
+*
+*                               DEF_YES                Set network timer for prefix.
+*                               DEF_NO          Do NOT set network timer for prefix.
+*
+*               timeout_fnct    Pointer to timeout function.
+*
+*               timeout_tick    Timeout value (in 'NET_TMR_TICK' ticks).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                Prefix successfully configured.
+*                               NET_ERR_FAULT_NULL_PTR          Argument 'p_addr_prefix' passed
+*                                                                   a NULL pointer.
+*
+*                                                               - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ----- RETURNED BY NetNDP_PrefixGet() : -----
+*                               NET_NDP_ERR_PREFIX_NONE_AVAIL   NO available prefix to allocate.
+*
+*                                                               -------- RETURNED BY NetTmr_Get() : --------
+*                               NET_ERR_FAULT_NULL_FNCT         Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL          NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE        Network timer is NOT a valid timer type.
+*
+* Return(s)   : Pointer to configured prefix entry.
+*
+* Caller(s)   : NetNDP_RxPrefixHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_NDP_PREFIX  *NetNDP_PrefixCfg (       NET_IF_NBR      if_nbr,
+                                           const  NET_IPv6_ADDR  *p_addr_prefix,
+                                                  CPU_INT08U      prefix_len,
+                                                  CPU_BOOLEAN     timer_en,
+                                                  CPU_FNCT_PTR    timeout_fnct,
+                                                  NET_TMR_TICK    timeout_tick,
+                                                  NET_ERR        *p_err)
+{
+    NET_NDP_PREFIX  *p_prefix;
+    NET_NDP_PREFIX  *p_prefix_rtn;
+
+
+    p_prefix_rtn = DEF_NULL;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------ VALIDATE NO NULL POINTERS ------------ */
+    if (p_addr_prefix == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+     NetIF_IsValidCfgdHandler(if_nbr, p_err);
+     if (*p_err != NET_IF_ERR_NONE) {
+          goto exit;
+     }
+
+
+#endif
+
+    p_prefix = NetNDP_PrefixGet(p_err);
+
+    if (p_prefix == (NET_NDP_PREFIX *)0) {
+        goto exit;                                              /* Return err from NetNDP_PrefixGet().                  */
+    }
+
+                                                                /* ----------------- CFG PREFIX TIMER ----------------- */
+    if (timer_en == DEF_YES) {
+
+        p_prefix->TmrPtr = NetTmr_Get((CPU_FNCT_PTR)timeout_fnct,
+                                      (void       *)p_prefix,
+                                      (NET_TMR_TICK)timeout_tick,
+                                      (CPU_INT16U  )NET_TMR_FLAG_NONE,
+                                      (NET_ERR    *)p_err);
+        if (*p_err != NET_TMR_ERR_NONE) {                       /* If timer unavailable, ...                            */
+                                                                /* ... free Prefix.                                     */
+            NetNDP_PrefixRemove(p_prefix, DEF_NO);
+            goto exit;
+        }
+    }
+
+
+                                                                /* ---------------- CFG PREFIX ENTRY ------------------ */
+    p_prefix_rtn        = p_prefix;
+    p_prefix->IF_Nbr    = if_nbr;
+    p_prefix->PrefixLen = prefix_len;
+    Mem_Copy(&p_prefix->Prefix, p_addr_prefix, NET_IPv6_ADDR_SIZE);
+
+
+   *p_err = NET_NDP_ERR_NONE;
+
+exit:
+    return (p_prefix_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetNDP_PrefixSrch()
+*
+* Description : Search the prefix list for a match with the given prefix.
+*
+* Argument(s) : if_nbr          Interface number of the prefix to look for.
+*
+*               p_addr_prefix   Pointer to the ipv6 prefix to look for in the Prefix list.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                Prefix FOUND in prefix list.
+*                               NET_NDP_ERR_PREFIX_NOT_FOUND    Prefix NOT found in prefix list.
+*                               NET_ERR_FAULT_NULL_PTR          Argument 'p_addr_prefix' passed
+*                                                                   a NULL pointer.
+*
+*                                                               - RETURNED BY NetIF_IsValidCfgdHandler() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Pointer to prefix entry found in list.
+*
+* Caller(s)   : NetNDP_PrefixAddCfg(),
+*               NetNDP_RxPrefixHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_NDP_PREFIX  *NetNDP_PrefixSrch (       NET_IF_NBR      if_nbr,
+                                            const  NET_IPv6_ADDR  *p_addr_prefix,
+                                                   NET_ERR        *p_err)
+{
+    NET_NDP_PREFIX    *p_prefix;
+    NET_NDP_PREFIX    *p_prefix_next;
+    NET_NDP_PREFIX    *p_prefix_rtn;
+    CPU_INT08U        *p_prefix_addr;
+    CPU_BOOLEAN        found;
+
+
+    p_prefix_rtn = DEF_NULL;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+     NetIF_IsValidCfgdHandler(if_nbr, p_err);
+     if (*p_err != NET_IF_ERR_NONE) {
+          goto exit;
+     }
+                                                                 /* ------------ VALIDATE NO NULL POINTERS ------------ */
+    if (p_addr_prefix == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    p_prefix = NetNDP_PrefixListHead;
+    while (p_prefix != DEF_NULL) {                              /* Search Prefix List ...                               */
+                                                                /* ... until Prefix found.                              */
+
+        p_prefix_next = p_prefix->NextPtr;
+
+        if (p_prefix->IF_Nbr == if_nbr) {
+
+            p_prefix_addr = &p_prefix->Prefix.Addr[0];
+
+                                                                /* Compare prefixes.                                    */
+            found         =  Mem_Cmp((void     *)p_addr_prefix,
+                                     (void     *)p_prefix_addr,
+                                     (CPU_SIZE_T)NET_IPv6_ADDR_SIZE);
+            if (found == DEF_YES) {                             /* If Prefix found, return prefix.                      */
+                p_prefix_rtn = p_prefix;
+               *p_err        = NET_NDP_ERR_NONE;
+                goto exit;
+            }
+        }
+
+        p_prefix = p_prefix_next;                               /* Advertise to next Prefix.                            */
+    }
+
+
+   *p_err = NET_NDP_ERR_PREFIX_NOT_FOUND;
+
+
+exit:
+    return (p_prefix_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_PrefixGet()
+*
+* Description : (1) Get a Prefix entry.
+*
+*                   (a) Get a prefix entry from the prefix pool.
+*                   (b) Insert prefix in the prefix list.
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                Prefix successfully acquired.
+*                               NET_NDP_ERR_PREFIX_NONE_AVAIL   NO available prefix to allocate.
+*
+* Return(s)   : Pointer to prefix entry.
+*
+* Caller(s)   : NetNDP_PrefixCfg().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_NDP_PREFIX  *NetNDP_PrefixGet(NET_ERR  *p_err)
+{
+    NET_NDP_PREFIX  *p_prefix;
+    NET_ERR          err;
+
+
+    if (NetNDP_PrefixPoolPtr != (NET_NDP_PREFIX *)0) {          /* If Prefix pool NOT empty, ...                        */
+                                                                /* ...  get Prefix from pool.                           */
+        p_prefix              =  NetNDP_PrefixPoolPtr;
+        NetNDP_PrefixPoolPtr  = (NET_NDP_PREFIX *)p_prefix->NextPtr;
+
+                                                                /* If Prefix List NOT empty, ...                        */
+    } else if (NetNDP_PrefixListTail != (NET_NDP_PREFIX *)0) {
+                                                                /* ... get Prefix from list tail.                       */
+        p_prefix             = (NET_NDP_PREFIX *)NetNDP_PrefixListTail;
+        NetNDP_PrefixRemove(p_prefix, DEF_YES);
+        p_prefix             = NetNDP_PrefixPoolPtr;
+        NetNDP_PrefixPoolPtr = (NET_NDP_PREFIX *)p_prefix->NextPtr;
+
+    } else {                                                   /* Else none avail, rtn err.                             */
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.PrefixNoneAvailCtr);
+       *p_err =   NET_NDP_ERR_PREFIX_NONE_AVAIL;
+        return ((NET_NDP_PREFIX *)0);
+    }
+
+                                                                /* -------------------- INIT PREFIX ------------------- */
+    NetNDP_PrefixClr(p_prefix);
+
+                                                                /* ------------ UPDATE PREFIX POOL STATS -------------- */
+    NetStat_PoolEntryUsedInc(&NetNDP_PrefixPoolStat, &err);
+
+
+                                                                /* ---------- INSERT PREFIX INTO PREFIX LIST ---------- */
+    p_prefix->PrevPtr = (NET_NDP_PREFIX *)0;
+    p_prefix->NextPtr = NetNDP_PrefixListHead;
+                                                                /* If list NOT empty, insert before head.               */
+    if (NetNDP_PrefixListHead != (NET_NDP_PREFIX *)0) {
+        NetNDP_PrefixListHead->PrevPtr = p_prefix;
+    } else {                                                    /* Else add first Prefix to list.                       */
+        NetNDP_PrefixListTail = p_prefix;
+    }
+                                                                /* Insert Prefix @ list head.                           */
+    NetNDP_PrefixListHead = p_prefix;
+
+   *p_err =  NET_NDP_ERR_NONE;
+
+    return (p_prefix);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetNDP_PrefixRemove()
+*
+* Description : (1) Remove a prefix from the prefix list.
+*
+*                   (a) Unlink prefix from prefix list.
+*                   (b) Free prefix entry.
+*
+*
+* Argument(s) : p_prefix    Pointer to the Prefix entry to remove from the Prefix list.
+*
+*               tmr_free    Indicate whether to free network timer :
+*
+*                               DEF_YES                Free network timer for prefix.
+*                               DEF_NO          Do NOT free network timer for prefix.
+*                                                     [Freed by NetTmr_TaskHandler()].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_CfgAddrPrefix(),
+*               NetNDP_PrefixCfg(),
+*               NetNDP_PrefixGet().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_PrefixRemove(NET_NDP_PREFIX  *p_prefix,
+                                  CPU_BOOLEAN      tmr_free)
+{
+    NET_NDP_PREFIX  *p_prefix_next;
+    NET_NDP_PREFIX  *p_prefix_prev;
+    NET_ERR          err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_prefix == (NET_NDP_PREFIX *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_prefix_prev = p_prefix->PrevPtr;
+    p_prefix_next = p_prefix->NextPtr;
+
+                                                                /* ---------- UNLINK PREFIX FROM PREFIX LIST ---------- */
+                                                                /* Point previous Prefix to next Prefix.                */
+    if (p_prefix_prev != (NET_NDP_PREFIX *)0) {
+        p_prefix_prev->NextPtr = p_prefix_next;
+    } else {
+        NetNDP_PrefixListHead  = p_prefix_next;
+    }
+                                                                /* Point next Prefix to previous Prefix.                */
+    if (p_prefix_next != (NET_NDP_PREFIX *)0) {
+        p_prefix_next->PrevPtr = p_prefix_prev;
+    } else {
+        NetNDP_PrefixListTail  = p_prefix_prev;
+    }
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)                     /* Clear Prefix's pointers.                             */
+    p_prefix->PrevPtr = (NET_NDP_PREFIX *)0;
+    p_prefix->NextPtr = (NET_NDP_PREFIX *)0;
+#endif
+
+                                                                /* ----------------- FREE PREFIX TMR ------------------ */
+    if (tmr_free == DEF_YES) {
+        if (p_prefix->TmrPtr != (NET_TMR *)0) {
+         NetTmr_Free(p_prefix->TmrPtr);
+         p_prefix->TmrPtr = (NET_TMR *)0;
+        }
+    }
+
+                                                                /* ---------------- CLEAR PREFIX ENTRY ---------------- */
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        NetNDP_PrefixClr(p_prefix);
+#endif
+
+                                                                /* ---------------- FREE PREFIX ENTRY ----------------- */
+    p_prefix->NextPtr    = (NET_NDP_PREFIX *)NetNDP_PrefixPoolPtr;
+    NetNDP_PrefixPoolPtr = (NET_NDP_PREFIX *)p_prefix;
+
+                                                               /* ------------- UPDATE PREFIX POOL STATS -------------- */
+    NetStat_PoolEntryUsedDec(&NetNDP_PrefixPoolStat, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetNDP_PrefixClr()
+*
+* Description : Clear a Prefix entry.
+*
+* Argument(s) : p_prefix    Pointer to the Prefix entry to clear.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_PrefixGet(),
+*               NetNDP_PrefixRemove().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_PrefixClr(NET_NDP_PREFIX  *p_prefix)
+{
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE NDP PREFIX --------------- */
+    if (p_prefix == (NET_NDP_PREFIX *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_prefix->PrevPtr = (NET_NDP_PREFIX *)0;
+    p_prefix->NextPtr = (NET_NDP_PREFIX *)0;
+
+    p_prefix->IF_Nbr  = NET_IF_NBR_NONE;
+
+    Mem_Clr(&p_prefix->Prefix, NET_IPv6_ADDR_SIZE);
+
+    if (p_prefix->TmrPtr != (NET_TMR *)0) {
+        NetTmr_Free(p_prefix->TmrPtr);
+        p_prefix->TmrPtr = (NET_TMR *)0;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_DestCacheCfg()
+*
+* Description : (1) Get and Configure a Destination entry from the Destination pool.
+*
+*                   (a) Get a Destination from the destination pool and insert it in destination cache.
+*                   (b) Configure destination with received arguments.
+*
+*
+* Argument(s) : if_nbr          Interface number for the destination to configure.
+*
+*               p_addr_dest     Pointer to IPv6 Destination address.
+*
+*               p_addr_next_hop Pointer to Next-Hop IPv6 address.
+*
+*               is_valid        Indicate whether are not the Next-Hop address is valid.
+*                                   DEF_YES, address is   valid
+*                                   DEF_NO,  address is invalid
+*
+*               on_link         Indicate whether are not the Destination is on link.
+*                                   DEF_YES, destination is     on link
+*                                   DEF_NO,  destination is not on link
+*
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                Destination successfully configured.
+*                               NET_ERR_FAULT_NULL_PTR          Argument 'p_addr_dest'/'p_addr_next_hop'
+*                                                                   passed a NULL pointer
+*
+*                                                               ----- RETURNED BY NetNDP_DestGet() : -----
+*                               NET_NDP_ERR_DEST_NONE_AVAIL     NO available destination to allocate.
+*
+* Return(s)   : Pointer to destination entry configured.
+*
+* Caller(s)   : NetNDP_NextHop(),
+*               NetNDP_NextHopByIF().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static NET_NDP_DEST_CACHE  *NetNDP_DestCacheCfg (       NET_IF_NBR      if_nbr,
+                                                 const  NET_IPv6_ADDR  *p_addr_dest,
+                                                 const  NET_IPv6_ADDR  *p_addr_next_hop,
+                                                        CPU_BOOLEAN     is_valid,
+                                                        CPU_BOOLEAN     on_link,
+                                                        NET_ERR        *p_err)
+{
+    NET_NDP_DEST_CACHE *p_dest;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_dest == (NET_IPv6_ADDR *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return ((NET_NDP_DEST_CACHE *)0);
+    }
+#endif
+
+    p_dest = NetNDP_DestCacheGet(p_err);
+    if (p_dest == (NET_NDP_DEST_CACHE *)0) {
+       return ((NET_NDP_DEST_CACHE *)0);                        /* Return err from NetNDP_DestGet().                    */
+    }
+
+
+                                                                /* -------------- CFG DESTINATION ENTRY --------------- */
+    p_dest->IF_Nbr  = if_nbr;
+    p_dest->IsValid = is_valid;
+    p_dest->OnLink  = on_link;
+
+    Mem_Copy(&p_dest->AddrDest, p_addr_dest, NET_IPv6_ADDR_SIZE);
+
+    if (p_addr_next_hop != (NET_IPv6_ADDR *)0) {
+        Mem_Copy(&p_dest->AddrNextHop, p_addr_next_hop, NET_IPv6_ADDR_SIZE);
+    }
+
+
+   *p_err = NET_NDP_ERR_NONE;
+
+    return (p_dest);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_DestCacheGet()
+*
+* Description : (1) Get a Destination cache entry from the Destination pool.
+*
+*                   (a) Get a free destination entry from pool.
+*                   (b) Insert destination into cache list.
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                    Destination successfully acquired.
+*                               NET_NDP_ERR_DEST_CACHE_NONE_AVAIL   NO available destination to allocate.
+*
+* Return(s)   : Pointer to Destination Cache entry.
+*
+* Caller(s)   : NetNDP_DestCacheCfg().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_NDP_DEST_CACHE  *NetNDP_DestCacheGet(NET_ERR  *p_err)
+{
+    NET_NDP_DEST_CACHE  *p_dest;
+    NET_ERR              err;
+
+
+    if (NetNDP_DestPoolPtr != (NET_NDP_DEST_CACHE *)0) {        /* If Destination entry pool NOT empty, ...             */
+                                                                /* ...  get destination from pool.                      */
+        p_dest              = NetNDP_DestPoolPtr;
+        NetNDP_DestPoolPtr  = (NET_NDP_DEST_CACHE *)p_dest->NextPtr;
+
+                                                                /* If Destination Cache List NOT empty, ...             */
+    } else if (NetNDP_DestListTail != (NET_NDP_DEST_CACHE *)0) {
+
+        p_dest = NetNDP_DestCacheSrchInvalid(p_err);            /* ... find an invalid Destination cache to remove ...  */
+
+        if (p_dest == (NET_NDP_DEST_CACHE *) 0) {
+            p_dest = (NET_NDP_DEST_CACHE *)NetNDP_DestListTail; /* ... if none avail, get Dest entry from list tail.    */
+        }
+
+        NetNDP_DestCacheRemove(p_dest);
+        p_dest              = NetNDP_DestPoolPtr;
+        NetNDP_DestPoolPtr  = (NET_NDP_DEST_CACHE *)p_dest->NextPtr;
+
+    } else {                                                   /* Else none avail, return err.                          */
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.DestCacheNoneAvailCtr);
+       *p_err =   NET_NDP_ERR_DEST_CACHE_NONE_AVAIL;
+        return ((NET_NDP_DEST_CACHE *)0);
+    }
+
+                                                                /* -------------- INIT DESTINATION ENTRY -------------- */
+    NetNDP_DestCacheClr(p_dest);
+
+                                                                /* --------- UPDATE DESTINATION POOL STATS ------------ */
+    NetStat_PoolEntryUsedInc(&NetNDP_DestPoolStat, &err);
+
+                                                                /* ---- INSERT DESTINATION INTO DESTINATION CACHE ----- */
+    p_dest->PrevPtr = (NET_NDP_DEST_CACHE *)0;
+    p_dest->NextPtr = NetNDP_DestListHead;
+                                                                /* If list NOT empty, insert before head.               */
+    if (NetNDP_DestListHead != (NET_NDP_DEST_CACHE *)0) {
+        NetNDP_DestListHead->PrevPtr = p_dest;
+    } else {                                                    /* Else add first Destination to list.                  */
+        NetNDP_DestListTail = p_dest;
+    }
+                                                                /* Insert Destination @ list head.                      */
+    NetNDP_DestListHead = p_dest;
+
+   *p_err =  NET_NDP_ERR_NONE;
+
+    return (p_dest);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetNDP_DestCacheSrch()
+*
+* Description : Search for a matching Destination entry for the given address into the Destination Cache.
+*
+* Argument(s) : if_nbr      Interface number of the destination to look for.
+*
+*               p_addr      Pointer to the ipv6 address to look for in the Destination Cache.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                    Destination FOUND in Destination cache.
+*                               NET_NDP_ERR_DESTINATION_NOT_FOUND   Destination NOT found.
+*
+* Return(s)   : Pointer to destination entry found in destination cache.
+*
+* Caller(s)   : NetNDP_NextHop(),
+*               NetNDP_NextHopByIF(),
+*               NetNDP_RxRedirect().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_NDP_DEST_CACHE  *NetNDP_DestCacheSrch (       NET_IF_NBR      if_nbr,
+                                                   const  NET_IPv6_ADDR  *p_addr,
+                                                          NET_ERR        *p_err)
+{
+    NET_NDP_DEST_CACHE  *p_dest;
+    CPU_INT08U          *p_dest_addr;
+    CPU_BOOLEAN          found;
+
+
+    found  =  DEF_NO;
+    p_dest = NetNDP_DestListHead;
+
+    while ((p_dest != (NET_NDP_DEST_CACHE *)0) &&               /* Srch Destination Cache List ...                      */
+           (found  ==  DEF_NO)                ) {               /* ... until cache found.                               */
+
+        if (p_dest->IF_Nbr == if_nbr) {
+
+            p_dest_addr = &p_dest->AddrDest.Addr[0];
+                                                                /* Cmp address with Destination cache address.          */
+            found       =  Mem_Cmp((void     *)p_addr,
+                                   (void     *)p_dest_addr,
+                                   (CPU_SIZE_T)NET_IPv6_ADDR_SIZE);
+
+            if (found == DEF_YES) {                             /* If Destination Cache found, ...                      */
+               *p_err = NET_NDP_ERR_NONE;                       /* ... rtn found Destination cache.                     */
+                return (p_dest);
+            }
+        }
+
+        p_dest = p_dest->NextPtr;                               /* Advertise to next Destination cache.                 */
+    }
+
+   *p_err  =  NET_NDP_ERR_DESTINATION_NOT_FOUND;
+
+    return (DEF_NULL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetNDP_DestCacheSrchInvalid()
+*
+* Description : Search for an invalid destination cache entry in the destination cache.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function:
+*
+*                               NET_NDP_ERR_NONE                    Invalid Destination found.
+*                               NET_NDP_ERR_DESTINATION_NOT_FOUND   No invalid Destination found.
+*
+* Return(s)   : Pointer to Destination Cache entry found.
+*
+* Caller(s)   : NetNDP_DestCacheGet().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_NDP_DEST_CACHE  *NetNDP_DestCacheSrchInvalid(NET_ERR  *p_err)
+{
+    NET_NDP_DEST_CACHE  *p_dest_cache;
+    NET_NDP_DEST_CACHE  *p_dest_cache_next;
+
+
+    p_dest_cache = (NET_NDP_DEST_CACHE *)NetNDP_DestListHead;
+    while (p_dest_cache != (NET_NDP_DEST_CACHE *)0) {           /* Search Destination Cache List.                       */
+
+        p_dest_cache_next = (NET_NDP_DEST_CACHE *) p_dest_cache->NextPtr;
+
+        if (p_dest_cache->IsValid == DEF_NO) {
+                                                                /* If Destination Cache found, ...                      */
+           *p_err = NET_NDP_ERR_NONE;                           /* ... rtn found Destination cache.                     */
+            return (p_dest_cache);
+
+        }
+
+        p_dest_cache = (NET_NDP_DEST_CACHE *)p_dest_cache_next; /* Advertise to next Destination cache.                 */
+    }
+
+   *p_err  =  NET_NDP_ERR_DESTINATION_NOT_FOUND;
+
+    return (p_dest_cache);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetNDP_DestCacheRemove()
+*
+* Description : (1) Remove a Destination cache entry from the Destination Cache.
+*
+*                   (a) Unlink destination entry from list
+*                   (b) Free destination entry
+*
+*
+* Argument(s) : p_router    Pointer to the Destination entry to remove from the Destination Cache list.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_DestGet().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_DestCacheRemove(NET_NDP_DEST_CACHE  *p_dest)
+{
+    NET_NDP_DEST_CACHE  *p_dest_next;
+    NET_NDP_DEST_CACHE  *p_dest_prev;
+    NET_ERR              err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NDP DESTINATION ------------ */
+    if (p_dest == (NET_NDP_DEST_CACHE *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_dest_prev = p_dest->PrevPtr;
+    p_dest_next = p_dest->NextPtr;
+
+                                                                /* --------- UNLINK DEST ENTRY FROM DEST LIST --------- */
+                                                                /* Point previous Destination to next Destination.      */
+    if (p_dest_prev != (NET_NDP_DEST_CACHE *)0) {
+        p_dest_prev->NextPtr = p_dest_next;
+    } else {
+        NetNDP_DestListHead  = p_dest_next;
+    }
+                                                                /* Point next Destination to previous Destination.      */
+    if (p_dest_next != (NET_NDP_DEST_CACHE *)0) {
+        p_dest_next->PrevPtr = p_dest_prev;
+    } else {
+        NetNDP_DestListTail  = p_dest_prev;
+    }
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)                     /* Clear Destination entry pointers.                    */
+    p_dest->PrevPtr = (NET_NDP_DEST_CACHE *)0;
+    p_dest->NextPtr = (NET_NDP_DEST_CACHE *)0;
+#endif
+
+                                                                /* -------------- CLEAR DESTINATION ENTRY ------------- */
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+     NetNDP_DestCacheClr(p_dest);
+#endif
+
+                                                                /* -------------- FREE DESTINATION ENTRY -------------- */
+    p_dest->NextPtr    = (NET_NDP_DEST_CACHE *)NetNDP_DestPoolPtr;
+    NetNDP_DestPoolPtr = (NET_NDP_DEST_CACHE *)p_dest;
+
+                                                               /* -------- UPDATE DESTINATION ENTRY POOL STATS -------- */
+    NetStat_PoolEntryUsedDec(&NetNDP_DestPoolStat, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetNDP_DestCacheClr()
+*
+* Description : Clear a Destination cache entry.
+*
+* Argument(s) : p_dest    Pointer to the Destination entry to clear.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetNDP_DestGet(),
+*               NetNDP_DestRemove().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_DestCacheClr(NET_NDP_DEST_CACHE  *p_dest)
+{
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NDP DESTINATION ------------ */
+    if (p_dest == (NET_NDP_DEST_CACHE *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_dest->PrevPtr = (NET_NDP_DEST_CACHE *)0;
+    p_dest->NextPtr = (NET_NDP_DEST_CACHE *)0;
+
+    p_dest->IF_Nbr = NET_IF_NBR_NONE;
+
+    p_dest->IsValid = DEF_NO;
+    p_dest->OnLink  = DEF_NO;
+
+    Mem_Clr(&p_dest->AddrDest, NET_IPv6_ADDR_SIZE);
+    Mem_Clr(&p_dest->AddrNextHop, NET_IPv6_ADDR_SIZE);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetNDP_IsAddrOnLink()
+*
+* Description : Validate if an IPv6 address is on-link or not.
+*
+* Argument(s) : if_nbr      Interface number of the address to validate.
+*
+*               p_addr      Pointer to IPv6 address to validate.
+*
+* Return(s)   : DEF_YES, if IPv6 address is on-link.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetNDP_NextHopByIF(),
+*               NetNDP_NextHop().
+*
+* Note(s)     : (1) A node considers an IPv6 address to be on-link if that addresses satisfied one of
+*                   the following conditions:
+*
+*                   (a) The address is covered by one of the on-link prefixes assigned to the link.
+*
+*                   (b) The address is the target address of a Redirect message sent by a router.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetNDP_IsAddrOnLink (       NET_IF_NBR      if_nbr,
+                                          const  NET_IPv6_ADDR  *p_addr)
+{
+    NET_NDP_PREFIX      *p_prefix;
+    CPU_BOOLEAN          addr_linklocal;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN          valid;
+#endif
+    NET_ERR              net_err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ----------------- VALIDATE IF NBR ------------------ */
+    valid = NetIF_IsValidCfgdHandler(if_nbr, &net_err);
+    if (valid != DEF_YES) {
+        return (DEF_NO);
+    }
+#endif
+                                                                /* -------------- VALIDATE IPv6 ADDR PTR -------------- */
+    if (p_addr == (NET_IPv6_ADDR *)0) {
+        return (DEF_NO);
+    }
+                                                                /* A link-local addr is always consider on link.        */
+    addr_linklocal = NetIPv6_IsAddrLinkLocal(p_addr);
+    if (addr_linklocal == DEF_TRUE) {
+        return (DEF_YES);
+    }
+
+                                                                /* Srch prefix list for a matching prefix to the addr.  */
+    p_prefix = NetNDP_PrefixSrchMatchAddr(if_nbr,
+                                          p_addr,
+                                         &net_err);
+    if (p_prefix != (NET_NDP_PREFIX *)0) {
+        return (DEF_YES);
+    }
+
+    return (DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_ReachableTimeout()
+*
+* Description : Change the NDP neighbor cache state from 'REACHABLE' to 'STALE'.
+*
+* Argument(s) : p_cache_timeout      Pointer to an NDP neighbor cache.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in : NetNDP_RxNeighborSolicitation(),
+*                               NetNDP_RxNeighborAdvertisement().
+*
+* Note(s)     : (1) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_NDP_CACHE' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (2) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetNDP_CacheFree() via NetNDP_CacheRemove(); or
+*                       (2) Reset   by NetTmr_Get().
+*
+*                   (b) but do NOT re-free the timer.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_ReachableTimeout (void  *p_cache_timeout)
+{
+    NET_NDP_NEIGHBOR_CACHE  *p_cache;
+    NET_TMR_TICK             timeout_tick;
+    NET_ERR                  err;
+    CPU_SR_ALLOC();
+
+
+    p_cache = (NET_NDP_NEIGHBOR_CACHE *)p_cache_timeout;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE NDP CACHE ---------------- */
+    if (p_cache == (NET_NDP_NEIGHBOR_CACHE *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    p_cache->TmrPtr = (NET_TMR *)0;
+
+    p_cache->State = NET_NDP_CACHE_STATE_STALE;
+    CPU_CRITICAL_ENTER();
+    timeout_tick = NetNDP_NeighborCacheTimeout_tick;
+    CPU_CRITICAL_EXIT();
+
+    p_cache->TmrPtr = NetTmr_Get(        NetNDP_CacheTimeout,
+                                 (void *)p_cache,
+                                         timeout_tick,
+                                         NET_TMR_FLAG_NONE,
+                                        &err);
+
+    if (err != NET_TMR_ERR_NONE) {                              /* If tmr unavailable, free NDP cache.                  */
+        NetNDP_NeighborCacheRemoveEntry(p_cache, DEF_NO);
+        return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetNDP_SolicitTimeout()
+*
+* Description : Retry NDP Solicitation to resolve an NDP neighbor cache in the 'INCOMPLETE' or
+*               "PROBE" state on the NDP Solicitation timeout.
+*
+* Argument(s) : p_cache_timeout    Pointer to an NDP neighbor cache (see Note #1b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in : NetNDP_NeighborCacheAddPend(),
+*                               NetNDP_DelayTimeout().
+*
+* Note(s)     : (1) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_NDP_CACHE' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (2) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetNDP_CacheFree() via NetNDP_CacheRemove(); or
+*                       (2) Reset   by NetTmr_Get().
+*
+*                   (b) but do NOT re-free the timer.
+*
+*               (3) RFC 4861 section 7.7.2 :
+*                   (a) "While awaiting a response, the sender SHOULD retransmit Neighbor
+*                        Solicitation messages approximately every RetransTimer milliseconds,
+*                        even in the absence of additional traffic to the neighbor.
+*                        Retransmissions MUST be rate-limited to at most one solicitation per
+*                        neighbor every RetransTimer milliseconds."
+*
+*                   (b) "If no Neighbor Advertisement is received after MAX_MULTICAST_SOLICIT
+*                        solicitation, address resolution has failed.  The sender MUST return
+*                        ICMP destination unreachable indications with code 3 (Address
+*                        Unreachable) for each packet queued awaiting address resolution."
+*
+*                        NetICMPv6_TxMsgErr() function is not adequate because it assume that p_buf is a
+*                        pointer to a received packet and not a queue of packet waiting to be send.
+*                        Therefore the address destination and address source are inverted when sending
+*                        the error message.
+*                        #### NET-780
+*                        #### NET-781
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_SolicitTimeout (void  *p_cache_timeout)
+{
+    NET_NDP_ROUTER             *p_router;
+    NET_NDP_NEIGHBOR_CACHE     *p_cache;
+    NET_CACHE_ADDR_NDP         *p_cache_addr_ndp;
+#if 0
+    NET_BUF                    *p_buf_list;
+    NET_BUF                    *p_buf_list_next;
+    NET_BUF                    *p_buf;
+    NET_BUF                    *p_buf_next;
+    NET_BUF_HDR                *p_buf_hdr;
+#endif
+    NET_TMR_TICK                timeout_tick;
+    CPU_INT08U                  th_max;
+    CPU_INT08U                  ndp_cache_state;
+    NET_NDP_NEIGHBOR_SOL_TYPE   ndp_sol_type;
+    CPU_BOOLEAN                 is_router;
+    NET_ERR                     err;
+    CPU_SR_ALLOC();
+
+
+    p_cache          = (NET_NDP_NEIGHBOR_CACHE *)p_cache_timeout;
+    p_cache_addr_ndp = p_cache->CacheAddrPtr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE NDP CACHE ---------------- */
+    if (p_cache == (NET_NDP_NEIGHBOR_CACHE *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+
+    if (p_cache_addr_ndp == (NET_CACHE_ADDR_NDP *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+    p_cache->TmrPtr = (NET_TMR *)0;                            /* Un-reference tmr in the NDP cache.                   */
+
+    ndp_cache_state = p_cache->State;
+    switch (ndp_cache_state) {
+        case NET_NDP_CACHE_STATE_INCOMPLETE :
+             CPU_CRITICAL_ENTER();
+             th_max = NetNDP_SolicitMaxAttempsMulticast_nbr;
+             CPU_CRITICAL_EXIT();
+             ndp_sol_type = NET_NDP_NEIGHBOR_SOL_TYPE_RES;
+             break;
+
+
+        case NET_NDP_CACHE_STATE_PROBE :
+             CPU_CRITICAL_ENTER();
+             th_max = NetNDP_SolicitMaxAttempsUnicast_nbr;
+             CPU_CRITICAL_EXIT();
+             ndp_sol_type = NET_NDP_NEIGHBOR_SOL_TYPE_NUD;
+             break;
+
+
+        default:
+            return;
+    }
+
+    if (p_cache->ReqAttemptsCtr >= th_max) {                    /* If nbr attempts >= max, ...                          */
+                                                                /* ... update dest cache to remove unreachable next-hop */
+        NetNDP_RemoveAddrDestCache(p_cache_addr_ndp->IF_Nbr,
+                                  &p_cache_addr_ndp->AddrProtocol[0]);
+
+                                                                /* ... if Neighbor cache is also a router, ...          */
+        is_router = DEF_BIT_IS_SET(p_cache->Flags, NET_NDP_CACHE_FLAG_ISROUTER);
+        if (is_router == DEF_YES) {
+            p_router = NetNDP_RouterSrch(                  p_cache_addr_ndp->IF_Nbr,
+                                         (NET_IPv6_ADDR *)&p_cache_addr_ndp->AddrProtocol,
+                                                          &err);
+            if (p_router != (NET_NDP_ROUTER *)0) {
+                NetNDP_RouterRemove(p_router, DEF_YES);         /* ... delete router in Default router list.            */
+                NetNDP_UpdateDefaultRouter(p_cache_addr_ndp->IF_Nbr, &err);
+            }
+        }
+
+                                                                /* See Note 3.b                                         */
+#if 0
+        if(p_cache->State == NET_NDP_CACHE_STATE_INCOMPLETE) {
+            p_buf_list = p_cache_addr_ndp->TxQ_Head;
+            while (p_buf_list  != (NET_BUF *)0) {
+                p_buf_hdr       = &p_buf_list->Hdr;
+                p_buf_list_next =  p_buf_hdr->NextSecListPtr;
+                p_buf           = p_buf_list;
+                while (p_buf != (NET_BUF *)0) {
+                    p_buf_hdr  = &p_buf->Hdr;
+                    p_buf_next = p_buf_hdr->NextBufPtr;
+                    NetICMPv6_TxMsgErr(p_buf_list,
+                                       NET_ICMPv6_MSG_TYPE_DEST_UNREACH,
+                                       NET_ICMPv6_MSG_CODE_DEST_ADDR_UNREACHABLE,
+                                       NET_ICMPv6_MSG_PTR_NONE,
+                                      &err);
+                    p_buf = p_buf_next;
+                }
+
+                p_buf_list = p_buf_list_next;
+            }
+        }
+#endif
+
+        NetNDP_NeighborCacheRemoveEntry(p_cache, DEF_NO);       /* ... free NDP cache.                                  */
+
+        return;
+    }
+
+                                                                /* ------------------ RETRY NDP REQ ------------------- */
+    CPU_CRITICAL_ENTER();
+    timeout_tick   = NetNDP_SolicitTimeout_tick;
+    CPU_CRITICAL_EXIT();
+
+    p_cache->TmrPtr = NetTmr_Get(        NetNDP_SolicitTimeout,
+                                 (void *)p_cache,
+                                         timeout_tick,
+                                         NET_TMR_FLAG_NONE,
+                                        &err);
+    if (err != NET_TMR_ERR_NONE) {                              /* If tmr unavail, free NDP cache.                      */
+        NetNDP_NeighborCacheRemoveEntry(p_cache, DEF_NO);
+        return;
+    }
+
+                                                                /* ------------- RE_TX NEIGHBOR SOL MSG --------------- */
+
+    NetNDP_TxNeighborSolicitation(                 p_cache_addr_ndp->IF_Nbr,
+                                  (NET_IPv6_ADDR *)p_cache_addr_ndp->AddrProtocolSender,
+                                  (NET_IPv6_ADDR *)p_cache_addr_ndp->AddrProtocol,
+                                                   ndp_sol_type,
+                                                  &err);
+
+    p_cache->ReqAttemptsCtr++;                                  /* Inc req attempts ctr.                                */
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_RouterTimeout()
+*
+* Description : (1) Remove Router entry in NDP default router list.
+*
+*                   (a) Remove Next-Hop address in destination cache corresponding to router.
+*                   (b) Remove NDP router entry in default router list.
+*                   (c) Update the Default Router.
+*
+*
+* Argument(s) : p_cache_timeout      Pointer to an NDP router.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in : NetNDP_RxRouterAdvertisement.
+*
+* Note(s)     : (1) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_NDP_CACHE' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (2) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetNDP_CacheFree() via NetNDP_CacheRemove(); or
+*                       (2) Reset   by NetTmr_Get().
+*
+*                   (b) but do NOT re-free the timer.
+*********************************************************************************************************
+*/
+
+static void  NetNDP_RouterTimeout(void  *p_router_timeout)
+{
+    NET_NDP_ROUTER      *p_router;
+    NET_ERR              err_net;
+
+
+    p_router = (NET_NDP_ROUTER *)p_router_timeout;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE NDP ROUTER --------------- */
+    if (p_router == (NET_NDP_ROUTER *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+                                                                /* Rem. NextHop in Dest. Cache corresponding to router. */
+    NetNDP_RemoveAddrDestCache(p_router->IF_Nbr, &p_router->Addr.Addr[0]);
+
+                                                                /* Remove Router from the default router list.          */
+    p_router->TmrPtr = (NET_TMR *)0;
+    NetNDP_RouterRemove(p_router, DEF_NO);
+
+                                                                /* Update the Default Router.                           */
+    NetNDP_UpdateDefaultRouter(p_router->IF_Nbr, &err_net);
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_PrefixTimeout()
+*
+* Description : (1) Remove Prefix entry in NDP prefix list.
+*
+*                   (a) Remove Next-Hop address in Destination Cache with corresponding prefix.
+*                   (b) Remove prefix entry from NDP prefix list.
+*
+*
+* Argument(s) : p_prefix_timeout    Pointer to NDP prefix entry.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in : NetNDP_PrefixHandler().
+*
+* Note(s)     : (1) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_NDP_CACHE' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (2) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetNDP_CacheFree() via NetNDP_CacheRemove(); or
+*                       (2) Reset   by NetTmr_Get().
+*
+*                   (b) but do NOT re-free the timer.
+*********************************************************************************************************
+*/
+
+static  void  NetNDP_PrefixTimeout (void  *p_prefix_timeout)
+{
+    NET_NDP_PREFIX  *p_prefix;
+
+
+    p_prefix = (NET_NDP_PREFIX *)p_prefix_timeout;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ----------------- VALIDATE PREFIX ------------------ */
+    if (p_prefix == (NET_NDP_PREFIX *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+                                                                /* Remove next-hop with prefix in destination cache ... */
+                                                                /* ... See RFC 4861 section 5.3.                        */
+    NetNDP_RemovePrefixDestCache(p_prefix->IF_Nbr,
+                                &p_prefix->Prefix.Addr[0],
+                                 p_prefix->PrefixLen);
+
+                                                                /* Remove Prefix entry in Prefix list.                  */
+    p_prefix->TmrPtr = (NET_TMR *)0;
+    NetNDP_PrefixRemove(p_prefix, DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetNDP_DAD_Timeout()
+*
+* Description : Retry NDP Request (sending NS) for the Duplication Address Detection (DAD).
+*
+* Argument(s) : p_cache_timeout     Pointer to an NDP cache.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in : NetNDP_DupAddrDetection.
+*
+* Note(s)     : (1) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_NDP_CACHE' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (2) This function is a network timer callback function :
+*
+*                   (a) Clear the timer pointer ... :
+*                       (1) Cleared in NetNDP_CacheFree() via NetNDP_CacheRemove(); or
+*                       (2) Reset   by NetTmr_Get().
+*
+*                   (b) but do NOT re-free the timer.
+*********************************************************************************************************
+*/
+#ifdef NET_DAD_MODULE_EN
+static  void  NetNDP_DAD_Timeout(void  *p_cache_timeout)
+{
+    NET_IF_NBR               if_nbr;
+    NET_IPv6_ADDRS          *p_ipv6_addrs;
+    NET_IPv6_ADDR           *p_addr;
+    NET_NDP_NEIGHBOR_CACHE  *p_cache;
+    NET_CACHE_ADDR_NDP      *p_cache_addr_ndp;
+    NET_DAD_OBJ             *p_dad_obj;
+    NET_TMR_TICK             timeout_tick;
+    CPU_INT08U               th_max;
+    NET_IPv6_ADDR_CFG_STATUS status;
+    NET_ERR                  err;
+    KAL_ERR                  err_kal;
+    CPU_SR_ALLOC();
+
+
+    p_cache = (NET_NDP_NEIGHBOR_CACHE *) p_cache_timeout;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE NDP CACHE ---------------- */
+    if (p_cache == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+        CPU_SW_EXCEPTION();
+    }
+#endif
+
+    p_cache_addr_ndp = p_cache->CacheAddrPtr;
+
+    if_nbr  = p_cache_addr_ndp->IF_Nbr;
+
+    p_cache->TmrPtr = DEF_NULL;
+
+    p_addr    = (NET_IPv6_ADDR *) &p_cache_addr_ndp->AddrProtocol[0];
+    p_dad_obj = NetDAD_ObjSrch(p_addr, &err);
+    if (err != NET_DAD_ERR_NONE) {
+        CPU_SW_EXCEPTION();
+    }
+
+    CPU_CRITICAL_ENTER();
+    th_max = NetNDP_DADMaxAttempts_nbr;
+    CPU_CRITICAL_EXIT();
+
+                                                                /* --------- VERIFY IF DAD SIGNAL ERR RECEIVED -------- */
+    NetDAD_SignalWait(NET_DAD_SIGNAL_TYPE_ERR, p_dad_obj, &err);
+    if (err == NET_DAD_ERR_NONE) {
+        KAL_SemSet(p_dad_obj->SignalErr, 0, &err_kal);          /* DAD process failed.                                  */
+        status = NET_IPv6_ADDR_CFG_STATUS_DUPLICATE;
+        goto exit_update;
+    }
+
+                                                                /* -------- VERIFY IF ALL DAD ATTEMPTS ARE SENT ------- */
+    if (p_cache->ReqAttemptsCtr >= th_max) {
+        status = NET_IPv6_ADDR_CFG_STATUS_SUCCEED;              /* DAD process succeeded.                               */
+        goto exit_update;
+    }
+
+                                                                /* ------------------ RETRY NDP REQ ------------------- */
+    CPU_CRITICAL_ENTER();
+    timeout_tick   = NetNDP_SolicitTimeout_tick;
+    CPU_CRITICAL_EXIT();
+
+                                                                /* Get new timer for NDP cache.                         */
+    p_cache->TmrPtr = NetTmr_Get(        NetNDP_DAD_Timeout,
+                                 (void *)p_cache,
+                                         timeout_tick,
+                                         NET_TMR_FLAG_NONE,
+                                        &err);
+    if (err != NET_TMR_ERR_NONE) {                              /* If timer unavailable, free NDP cache.                */
+        status = NET_IPv6_ADDR_CFG_STATUS_FAIL;
+        goto exit_update;
+    }
+
+                                                                /* Transmit NDP Solicitation message.                   */
+    NetNDP_TxNeighborSolicitation(                  if_nbr,
+                                                    DEF_NULL,
+                                  (NET_IPv6_ADDR *)&p_cache_addr_ndp->AddrProtocol[0],
+                                                    NET_NDP_NEIGHBOR_SOL_TYPE_DAD,
+                                                   &err);
+    if (err != NET_NDP_ERR_NONE) {
+        status = NET_IPv6_ADDR_CFG_STATUS_FAIL;
+        goto exit_update;
+    }
+
+    p_cache->ReqAttemptsCtr++;                                  /* Inc req attempts ctr.                                */
+
+    goto exit;
+
+
+exit_update:
+                                                                /* ------------ RECOVER IPv6 ADDRS OBJECT ------------- */
+    p_ipv6_addrs = NetIPv6_GetAddrsHostOnIF(if_nbr, p_addr);
+    if (p_ipv6_addrs == DEF_NULL) {
+        goto exit_clear;
+    }
+
+                                                                /* --------------- UPDATE ADDRESS STATE --------------- */
+    if (status == NET_IPv6_ADDR_CFG_STATUS_SUCCEED) {
+        p_ipv6_addrs->AddrState = NET_IPv6_ADDR_STATE_PREFERRED;
+        p_ipv6_addrs->IsValid   = DEF_YES;
+    } else {
+        p_ipv6_addrs->AddrState = NET_IPv6_ADDR_STATE_DUPLICATED;
+        p_ipv6_addrs->IsValid   = DEF_NO;
+    }
+
+
+exit_clear:
+
+    NetNDP_NeighborCacheRemoveEntry(p_cache, DEF_YES);          /* Free NDP cache.                                      */
+
+    NetDAD_Signal(NET_DAD_SIGNAL_TYPE_COMPL,                    /* Signal that DAD process is complete.                 */
+                  p_dad_obj,
+                 &err);
+    if (p_dad_obj->Fnct != DEF_NULL) {
+        p_dad_obj->Fnct(if_nbr, p_dad_obj, status);
+    }
+
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetNDP_RouterAdvSignalPost()
+*
+* Description : Post Rx Router Advertisement Signal.
+*
+* Argument(s) : if_nbr      Network Interface Number on which Router Adv. message was received.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_NDP_ERR_NONE                        Signal post successfully.
+*                               NET_NDP_ERR_ROUTER_ADV_SIGNAL_FAULT     Signal posting faulted.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetNDP_RxPrefixUpdate().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+static  void  NetNDP_RouterAdvSignalPost(NET_IF_NBR   if_nbr,
+                                         NET_ERR     *p_err)
+{
+    KAL_SEM_HANDLE  *p_signal;
+    KAL_ERR          err_kal;
+
+
+    p_signal = &NetNDP_RxRouterAdvSignal[if_nbr];
+    if (p_signal->SemObjPtr != DEF_NULL) {
+        KAL_SemPost(*p_signal,
+                     KAL_OPT_PEND_NONE,
+                    &err_kal);
+        if (err_kal != KAL_ERR_NONE) {
+           *p_err = NET_NDP_ERR_ROUTER_ADV_SIGNAL_FAULT;
+            goto exit;
+        }
+    }
+
+   *p_err = NET_NDP_ERR_NONE;
+
+
+exit:
+   return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*
+* Note(s) : (1) See 'net_ndp.h  MODULE'.
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of NDP module include (see Note #1).             */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ndp.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ndp.h
new file mode 100644
index 0000000..a103182
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ndp.h
@@ -0,0 +1,640 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK NDP LAYER
+*                                    (NEIGHBOR DISCOVERY PROTOCOL)
+*
+* Filename      : net_ndp.h
+* Version       : V3.04.02
+* Programmer(s) : SL
+*                 SR
+*                 MM
+*********************************************************************************************************
+* Note(s)       : (1) Supports Neighbor Discovery Protocol as described in RFC #2461 with the
+*                     following restrictions/constraints :
+*
+*                     (a) ONLY supports the following hardware types :
+*                         (1) 48-bit Ethernet
+*
+*                     (b) ONLY supports the following protocol types :
+*                         (1) 128-bit IPv6 addresses
+*
+*                     (c) IPv6 Stateless address Autoconfiguration not yet supported.
+*
+*                     (d) IPv6 Duplication Address Detection not yet supported.
+*
+*                     (e) Unsolicited Neighbor Advertisement Transmission.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../../Source/net_cfg_net.h"
+#include  "../../Source/net_type.h"
+#include  "../../Source/net_cache.h"
+#include  "../../Source/net_buf.h"
+#include  "net_icmpv6.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) NDP Layer module is required for applications that requires IPv6 services.
+*
+*           (2) The following NDP-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require NDP Layer
+*               configuration (see 'net_cfg_net.h  IP LAYER CONFIGURATION) :
+*
+*                   NET_NDP_MODULE_EN
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_NDP_MODULE_PRESENT
+#define  NET_NDP_MODULE_PRESENT
+
+#ifdef   NET_NDP_MODULE_EN                                /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef NET_NDP_MODULE
+#define  NET_NDP_EXT
+#else
+#define  NET_NDP_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_NDP_RX_ROUTER_ADV_SIGNAL_NAME              "Net NDP Rx Router Adv Signal"
+#define  NET_NDP_RX_ROUTER_ADV_TIMEOUT_MS                500u
+#define  NET_NDP_TX_ROUTER_SOL_RETRY_MAX                   3u
+
+#define  NET_NDP_CACHE_TX_Q_TH_DFLT                        2
+
+
+/*
+*********************************************************************************************************
+*                                            DAD DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_NDP_CFG_DAD_MAX_NBR_ATTEMPTS       3u              /* Configured number of NDP DAD attempts.               */
+
+
+/*
+*********************************************************************************************************
+*                                      NDP HEADER FLAGS DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_NDP_HDR_FLAG_ROUTER                         DEF_BIT_31
+#define  NET_NDP_HDR_FLAG_SOL                            DEF_BIT_30
+#define  NET_NDP_HDR_FLAG_OVRD                           DEF_BIT_29
+
+#define  NET_NDP_HDR_FLAG_ADDR_CFG_AUTO                  DEF_BIT_06
+#define  NET_NDP_HDR_FLAG_ON_LINK                        DEF_BIT_07
+
+#define  NET_NDP_HDR_FLAG_ADDR_CFG_OTHER                 DEF_BIT_06
+#define  NET_NDP_HDR_FLAG_ADDR_CFG_MNGD                  DEF_BIT_07
+
+
+/*
+*********************************************************************************************************
+*                                          NDP CACHE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_NDP_CACHE_ACCESSED_TH_MIN                    10
+#define  NET_NDP_CACHE_ACCESSED_TH_MAX                 65000
+#define  NET_NDP_CACHE_ACCESSED_TH_DFLT                  100
+
+#define  NET_NDP_CACHE_TIMEOUT_MIN_SEC                   ( 1  *  DEF_TIME_NBR_SEC_PER_MIN)  /* Timeout min  =  1 min    */
+#define  NET_NDP_CACHE_TIMEOUT_MAX_SEC                   (10  *  DEF_TIME_NBR_SEC_PER_MIN)  /* Timeout max  = 10 mins   */
+#define  NET_NDP_CACHE_TIMEOUT_DFLT_SEC                  (10  *  DEF_TIME_NBR_SEC_PER_MIN)  /* Timeout dflt = 10 mins   */
+
+
+/*
+*********************************************************************************************************
+*                                         NDP GENERAL DEFINES
+*********************************************************************************************************
+*/
+                                                                /* ------------------ NODE CONSTANTS ------------------ */
+#define  NET_NDP_SOLICIT_NBR_MIN                           0    /* Solicitations retries Min.                           */
+#define  NET_NDP_SOLICIT_NBR_MAX                           5    /* Solicitations retries Max.                           */
+#define  NET_NDP_SOLICIT_MAX_MULTICAST                     3    /* Multicast Solicitations retries Max.                 */
+#define  NET_NDP_SOLICIT_MAX_UNICAST                       3    /* Unicast   Solicitations retries Max.                 */
+
+                                                                /* Neighbor Unreachability Detection Timeouts.          */
+#define  NET_NDP_REACHABLE_TIMEOUT_SEC                    30    /* Neighbor reachability timeout.                       */
+#define  NET_NDP_REACHABLE_TIMEOUT_MIN_SEC                 1    /* NDP reachability timeout min  =  1 second            */
+#define  NET_NDP_REACHABLE_TIMEOUT_MAX_SEC               120    /* NDP reachability timeout max  = 120 seconds          */
+#define  NET_NDP_DELAY_FIRST_PROBE_TIMEOUT_SEC             3    /* Delay before first Probe.                            */
+#define  NET_NDP_DELAY_FIRST_PROBE_TIMEOUT_MIN_SEC         1    /* NDP Delay First Probe timeout min  =  1 second       */
+#define  NET_NDP_DELAY_FIRST_PROBE_TIMEOUT_MAX_SEC        10    /* NDP Delay First Probe timeout max  = 10 seconds      */
+#define  NET_NDP_RETRANS_TIMEOUT_SEC                       1    /* Retransmit timeout.                                  */
+#define  NET_NDP_RETRANS_TIMEOUT_MIN_SEC                   1    /* NDP Retransmit timeout min  =  1 second              */
+#define  NET_NDP_RETRANS_TIMEOUT_MAX_SEC                  10    /* NDP Retransmit timeout max  = 10 seconds             */
+
+
+/*
+*********************************************************************************************************
+*                                      NDP MESSAGE SIZE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_NDP_HDR_SIZE_NEIGHBOR_SOL                    24
+#define  NET_NDP_MSG_LEN_MIN_NEIGHBOR_SOL                NET_ICMPv6_HDR_SIZE_DFLT
+#define  NET_NDP_MSG_LEN_MAX_NEIGHBOR_SOL                NET_ICMPv6_MSG_LEN_MAX_NONE
+
+#define  NET_NDP_HDR_SIZE_NEIGHBOR_ADV                    32
+#define  NET_NDP_MSG_LEN_MIN_NEIGHBOR_ADV                NET_ICMPv6_HDR_SIZE_DFLT
+#define  NET_NDP_MSG_LEN_MAX_NEIGHBOR_ADV                NET_ICMPv6_MSG_LEN_MAX_NONE
+
+#define  NET_NDP_HDR_SIZE_ROUTER_SOL                      16
+#define  NET_NDP_MSG_LEN_MIN_ROUTER_SOL                  NET_ICMPv6_HDR_SIZE_DFLT
+#define  NET_NDP_MSG_LEN_MAX_ROUTER_SOL                  NET_ICMPv6_MSG_LEN_MAX_NONE
+
+#define  NET_NDP_HDR_SIZE_ROUTER_ADV                      32
+#define  NET_NDP_MSG_LEN_MIN_ROUTER_ADV                  NET_ICMPv6_HDR_SIZE_DFLT
+#define  NET_NDP_MSG_LEN_MAX_ROUTER_ADV                  NET_ICMPv6_MSG_LEN_MAX_NONE
+
+#define  NET_NDP_HDR_SIZE_REDIRECT                        48
+#define  NET_NDP_MSG_LEN_MIN_REDIRECT                    NET_ICMPv6_HDR_SIZE_DFLT
+#define  NET_NDP_MSG_LEN_MAX_REDIRECT                    NET_ICMPv6_MSG_LEN_MAX_NONE
+
+
+/*
+*********************************************************************************************************
+*                                      NDP OPTION TYPES DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_NDP_OPT_TYPE_NONE                             0u
+#define  NET_NDP_OPT_TYPE_ADDR_SRC                         1u
+#define  NET_NDP_OPT_TYPE_ADDR_TARGET                      2u
+#define  NET_NDP_OPT_TYPE_PREFIX_INFO                      3u
+#define  NET_NDP_OPT_TYPE_REDIRECT                         4u
+#define  NET_NDP_OPT_TYPE_MTU                              5u
+
+
+/*
+*********************************************************************************************************
+*                                     NDP CACHE STATES DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_NDP_CACHE_STATE_NONE                          0u
+#define  NET_NDP_CACHE_STATE_INCOMPLETE                    1u
+#define  NET_NDP_CACHE_STATE_REACHABLE                     2u
+#define  NET_NDP_CACHE_STATE_STALE                         3u
+#define  NET_NDP_CACHE_STATE_DLY                           4u
+#define  NET_NDP_CACHE_STATE_PROBE                         5u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_NDP_OPT_TYPE;
+typedef  CPU_INT08U  NET_NDP_OPT_LEN;
+typedef  CPU_INT16U  NET_NDP_OPT_RESERVED;
+
+
+/*
+*********************************************************************************************************
+*                                    NDP CACHE QUANTITY DATA TYPE
+*
+* Note(s) : (1) NET_NDP_CACHE_NBR_MAX  SHOULD be #define'd based on 'NET_NDP_CACHE_QTY' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_NDP_CACHE_QTY;                         /* Defines max qty of NDP caches to support.            */
+
+#define  NET_NDP_CACHE_NBR_MIN                             1
+#define  NET_NDP_CACHE_NBR_MAX                           DEF_INT_16U_MAX_VAL    /* See Note #1.                         */
+
+
+/*
+*********************************************************************************************************
+*                                        NDP TIMEOUT DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum net_ndp_timeout {
+    NET_NDP_TIMEOUT_REACHABLE,
+    NET_NDP_TIMEOUT_DELAY,
+    NET_NDP_TIMEOUT_SOLICIT,
+} NET_NDP_TIMEOUT;
+
+
+/*
+*********************************************************************************************************
+*                                  NDP SOLICITATION MESSAGE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum net_ndp_solicit {
+    NET_NDP_SOLICIT_MULTICAST,
+    NET_NDP_SOLICIT_UNICAST,
+    NET_NDP_SOLICIT_DAD,
+} NET_NDP_SOLICIT;
+
+
+/*
+*********************************************************************************************************
+*                                       NDP HEADERS DATA TYPE
+*
+* Note(s) : (1) See RFC #2461 for NDP message header formats.
+*********************************************************************************************************
+*/
+
+                                                                /* -------- NET NDP GENERIC OPTION FIELD IN HDR ------- */
+typedef  struct  net_ndp_opt_hdr {
+    NET_NDP_OPT_TYPE  Type;                                     /* NDP opt type.                                        */
+    NET_NDP_OPT_LEN   Len;                                      /* NDP opt len.                                         */
+} NET_NDP_OPT_HDR;
+
+
+                                                                /* ------------- NET NDP NEIGHBOR SOL HDR ------------- */
+typedef  struct  net_ndp_neighbor_sol_hdr {
+    CPU_INT08U      Type;                                       /* NDP msg type.                                        */
+    CPU_INT08U      Code;                                       /* NDP msg code.                                        */
+    CPU_INT16U      ChkSum;                                     /* NDP msg chk sum.                                     */
+    CPU_INT32U      Reserved;                                   /* NDP reserved bits.                                   */
+    NET_IPv6_ADDR   TargetAddr;                                 /* NDP target addr.                                     */
+    CPU_INT08U      Opt;                                        /* NDP opt data.                                        */
+} NET_NDP_NEIGHBOR_SOL_HDR;
+
+                                                                /* ------------- NET NDP NEIGHBOR ADV HDR ------------- */
+typedef  struct  net_ndp_neighbor_adv_hdr {
+    CPU_INT08U      Type;                                       /* NDP msg type.                                        */
+    CPU_INT08U      Code;                                       /* NDP msg code.                                        */
+    CPU_INT16U      ChkSum;                                     /* NDP msg chk sum.                                     */
+    CPU_INT32U      Flags;                                      /* NDP flags.                                           */
+    NET_IPv6_ADDR   TargetAddr;                                 /* NDP target addr.                                     */
+    CPU_INT08U      Opt;                                        /* NDP opt data.                                        */
+} NET_NDP_NEIGHBOR_ADV_HDR;
+
+                                                                /* -------------- NET NDP ROUTER SOL HDR -------------- */
+typedef  struct  net_ndp_router_sol_hdr {
+    CPU_INT08U        Type;                                     /* NDP msg type.                                        */
+    CPU_INT08U        Code;                                     /* NDP msg code.                                        */
+    CPU_INT16U        ChkSum;                                   /* NDP msg chk sum.                                     */
+    CPU_INT32U        Reserved;                                 /* NDP reserved bits.                                   */
+    CPU_INT08U        Opt;                                      /* NDP opt data.                                        */
+} NET_NDP_ROUTER_SOL_HDR;
+
+                                                                /* -------------- NET NDP ROUTER ADV HDR -------------- */
+typedef  struct  net_ndp_router_adv_hdr {
+    CPU_INT08U        Type;                                     /* NDP msg type.                                        */
+    CPU_INT08U        Code;                                     /* NDP msg code.                                        */
+    CPU_INT16U        ChkSum;                                   /* NDP msg chk sum.                                     */
+    CPU_INT08U        HopLimit;                                 /* NDP current hop limit.                               */
+    CPU_INT08U        Flags;                                    /* NDP flags.                                           */
+    CPU_INT16U        RouterLifetime;                           /* NDP router life time.                                */
+    CPU_INT32U        ReachableTime;                            /* NDP reachable time.                                  */
+    CPU_INT32U        ReTxTmr;                                  /* NDP re-tx timer.                                     */
+    CPU_INT08U        Opt;
+} NET_NDP_ROUTER_ADV_HDR;
+
+                                                                /* --------------- NET NDP REDIRECT HDR --------------- */
+typedef  struct  net_ndp_redirect_hdr {
+    CPU_INT08U        Type;                                     /* NDP msg type.                                        */
+    CPU_INT08U        Code;                                     /* NDP msg code.                                        */
+    CPU_INT16U        ChkSum;                                   /* NDP msg chk sum.                                     */
+    CPU_INT32U        Reserved;                                 /* NDP reserved bits.                                   */
+    NET_IPv6_ADDR     AddrTarget;                               /* NDP target      addr.                                */
+    NET_IPv6_ADDR     AddrDest;                                 /* NDP destination addr.                                */
+    CPU_INT08U        Opt;                                      /* NDP opt data.                                        */
+} NET_NDP_REDIRECT_HDR;
+
+
+#define  NET_NDP_OPT_DATA_OFFSET                        sizeof(NET_NDP_OPT_HDR)
+
+
+/*
+*********************************************************************************************************
+*                                  NDP NEIGHBOR CACHE ENTRY DATA TYPE
+*********************************************************************************************************
+*/
+
+                                                                /* -------------- NET NDP NEIGHBOR CACHE -------------- */
+typedef struct  net_ndp_neighbor_cache {
+    NET_CACHE_TYPE           Type;
+    NET_CACHE_ADDR_NDP      *CacheAddrPtr;                      /* Ptr to          NDP addr   cache.                    */
+    NET_TMR                 *TmrPtr;                            /* Ptr to neighbor cache TMR.                           */
+    CPU_INT08U               ReqAttemptsCtr;                    /* NDP req attempts ctr.                                */
+    CPU_INT08U               State;                             /* NDP neighbor cache state.                            */
+    CPU_INT16U               Flags;                             /* NDP neighbor cache flags.                            */
+} NET_NDP_NEIGHBOR_CACHE;
+
+
+/*
+*********************************************************************************************************
+*                                      ROUTER ENTRY DATA TYPE
+*********************************************************************************************************
+*/
+                                                                /* -------------------- NET ROUTER -------------------- */
+typedef  struct  net_ndp_router  NET_NDP_ROUTER;
+
+struct  net_ndp_router {
+NET_NDP_ROUTER          *PrevPtr;                               /* Pointer to previous NDP router entry.                */
+NET_NDP_ROUTER          *NextPtr;                               /* Pointer to next     NDP router entry.                */
+
+NET_IF_NBR               IF_Nbr;                                /* Interface number associated with router.             */
+
+NET_IPv6_ADDR            Addr;                                  /* IPv6 address of router.                              */
+
+CPU_BOOLEAN              RoundRobin;                            /* Indicate if router is currently selected for the ... */
+                                                                /* ... Round-Robin.                                     */
+
+CPU_INT16U               LifetimeSec;                           /* Router's lifetime in seconds.                        */
+
+NET_TMR                 *TmrPtr;                                /* Pointer to router Timer.                             */
+
+NET_NDP_NEIGHBOR_CACHE  *NDP_CachePtr;                          /* Pointer to Neighbor cache entry link with router.    */
+};
+
+
+/*
+*********************************************************************************************************
+*                                      PREFIX ENTRY DATA TYPE
+*********************************************************************************************************
+*/
+                                                                /* -------------------- NET ROUTER -------------------- */
+typedef  struct  net_ndp_prefix  NET_NDP_PREFIX;
+
+struct  net_ndp_prefix {
+NET_NDP_PREFIX       *PrevPtr;                                  /* Pointer to previous NDP prefix entry.                */
+NET_NDP_PREFIX       *NextPtr;                                  /* Pointer to next     NDP prefix entry.                */
+
+NET_IF_NBR            IF_Nbr;                                   /* Interface number associated with prefix.             */
+
+NET_IPv6_ADDR         Prefix;                                   /* Prefix IPv6 address.                                 */
+
+CPU_INT08U            PrefixLen;                                /* Prefix length.                                       */
+
+NET_TMR              *TmrPtr;                                   /* Pointer to prefix Timer.                             */
+};
+
+
+/*
+*********************************************************************************************************
+*                                    DESTINATION ENTRY DATA TYPE
+*********************************************************************************************************
+*/
+                                                                /* -------------------- NET ROUTER -------------------- */
+typedef  struct  net_ndp_dest_cache  NET_NDP_DEST_CACHE;
+
+struct  net_ndp_dest_cache {
+NET_NDP_DEST_CACHE   *PrevPtr;                                  /* Pointer to previous NDP destination cache entry.     */
+NET_NDP_DEST_CACHE   *NextPtr;                                  /* Pointer to next     NDP destination cache entry.     */
+
+NET_IF_NBR            IF_Nbr;                                   /* Interface number associated with destination cache.  */
+
+NET_IPv6_ADDR         AddrDest;                                 /* IPv6 destination address.                            */
+
+NET_IPv6_ADDR         AddrNextHop;                              /* IPv6 Next-Hop address for final destination.         */
+
+CPU_BOOLEAN           OnLink;                                   /* On-Link status.                                      */
+
+CPU_BOOLEAN           IsValid;                                  /* Valid destination address status.                    */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+NET_NDP_EXT  CPU_INT16U       NetNDP_NeighborCacheTimeout_sec;  /* NDP Neighbor cache timeout     (in secs ).           */
+NET_NDP_EXT  NET_TMR_TICK     NetNDP_NeighborCacheTimeout_tick; /* NDP Neighbor cache timeout     (in ticks).           */
+
+NET_NDP_EXT  CPU_INT16U       NetNDP_DelayTimeout_sec;          /* NDP Neighbor delay timeout     (in secs ).           */
+NET_NDP_EXT  NET_TMR_TICK     NetNDP_DelayTimeout_tick;         /* NDP Neighbor delay timeout     (in ticks).           */
+
+NET_NDP_EXT  CPU_INT16U       NetNDP_CacheAccessedTh_nbr;       /* Nbr successful srch's to promote NDP cache.          */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+                                                                /* --------- NDP NEIGHBOR CACHE CFG FUNCTIONS --------- */
+
+CPU_BOOLEAN          NetNDP_CfgNeighborCacheTimeout  (CPU_INT16U                timeout_sec);
+
+CPU_BOOLEAN          NetNDP_CfgReachabilityTimeout   (NET_NDP_TIMEOUT           timeout_type,
+                                                      CPU_INT16U                timeout_sec);
+
+CPU_BOOLEAN          NetNDP_CfgSolicitMaxNbr         (NET_NDP_SOLICIT           solicit_type,
+                                                      CPU_INT08U                max_nbr);
+
+CPU_BOOLEAN          NetNDP_CfgCacheTxQ_MaxTh        (NET_BUF_QTY               nbr_buf_max);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void                        NetNDP_Init                     (       NET_ERR                  *p_err);
+
+                                                                /* ---------- NDP NEIGHBOR CACHE FUNCTIONS ----------- */
+void                        NetNDP_NeighborCacheHandler     (const  NET_BUF                  *p_buf,
+                                                                    NET_ERR                  *p_err);
+
+
+                                                                /* -------------------- RX FUNCTIONS ------------------- */
+void                        NetNDP_Rx                       (const  NET_BUF                   *p_buf,
+                                                                    NET_BUF_HDR               *p_buf_hdr,
+                                                             const  NET_ICMPv6_HDR            *p_icmp_hdr,
+                                                                    NET_ERR                   *p_err);
+
+
+                                                                /* ------------------- TX FUNCTIONS ------------------- */
+void                        NetNDP_TxRouterSolicitation     (       NET_IF_NBR                if_nbr,
+                                                                    NET_IPv6_ADDR            *p_addr_src,
+                                                                    NET_ERR                  *p_err);
+
+
+                                                                /* ------------------ NDP FIND ROUTE ------------------ */
+const  NET_IPv6_ADDR       *NetNDP_NextHopByIF              (       NET_IF_NBR                if_nbr,
+                                                             const  NET_IPv6_ADDR            *p_addr_dest,
+                                                                    NET_ERR                  *p_err);
+
+const  NET_IPv6_ADDR       *NetNDP_NextHop                  (       NET_IF_NBR               *p_if_nbr,
+                                                             const  NET_IPv6_ADDR            *p_addr_src,
+                                                             const  NET_IPv6_ADDR            *p_addr_dest,
+                                                                    NET_ERR                  *p_err);
+
+
+                                                                /* ------- NDP NEIGHBOR CACHE TIMEOUT FUNCTIONS ------- */
+void                        NetNDP_CacheTimeout             (       void                     *p_cache_timeout);
+
+void                        NetNDP_DelayTimeout             (       void                     *p_cache_timeout);
+
+
+                                                                /* ---------------- NDP DAD FUNCTIONS ----------------- */
+
+#ifdef NET_DAD_MODULE_EN
+void                        NetNDP_DAD_Start                (       NET_IF_NBR                if_nbr,
+                                                                    NET_IPv6_ADDR            *p_addr,
+                                                                    NET_ERR                  *p_err);
+
+void                        NetNDP_DAD_Stop                 (       NET_IF_NBR                if_nbr,
+                                                                    NET_IPv6_ADDR            *p_addr);
+
+
+CPU_INT08U                  NetNDP_DAD_GetMaxAttemptsNbr    (       void);
+#endif
+
+                                                                /* ---------- RX ROUTER ADV SIGNAL FUNCTIONS ---------- */
+#ifdef  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+KAL_SEM_HANDLE             *NetNDP_RouterAdvSignalCreate    (       NET_IF_NBR               if_nbr,
+                                                                    NET_ERR                  *p_err);
+
+void                        NetNDP_RouterAdvSignalPend      (       KAL_SEM_HANDLE           *p_signal,
+                                                                    NET_ERR                  *p_err);
+
+void                        NetNDP_RouterAdvSignalRemove    (       KAL_SEM_HANDLE           *p_signal);
+#endif
+
+                                                                /* -------------- IxANVL TEST FUNCTIONS --------------- */
+NET_NDP_PREFIX             *NetNDP_PrefixAddCfg             (       NET_IF_NBR                if_nbr,
+                                                             const  NET_IPv6_ADDR            *p_addr_prefix,
+                                                                    CPU_INT08U                prefix_len,
+                                                                    CPU_BOOLEAN               timer_en,
+                                                                    CPU_FNCT_PTR              timeout_fnct,
+                                                                    NET_TMR_TICK              timeout_tick,
+                                                                    NET_ERR                  *p_err);
+
+NET_NDP_DEST_CACHE         *NetNDP_DestCacheAddCfg          (       NET_IF_NBR                if_nbr,
+                                                             const  NET_IPv6_ADDR            *p_addr_dest,
+                                                             const  NET_IPv6_ADDR            *p_addr_next_hop,
+                                                                    CPU_BOOLEAN               is_valid,
+                                                                    CPU_BOOLEAN               on_link,
+                                                                    NET_ERR                  *p_err);
+
+void                        NetNDP_DestCacheRemoveCfg       (       NET_IF_NBR                if_nbr,
+                                                             const  NET_IPv6_ADDR            *p_addr_dest,
+                                                                    NET_ERR                  *p_err);
+
+void                        NetNDP_CacheClrAll              (       void);
+
+CPU_INT08U                  NetNDP_CacheGetState            (       NET_IF_NBR                if_nbr,
+                                                             const  NET_IPv6_ADDR            *p_addr,
+                                                                    NET_ERR                  *p_err);
+
+CPU_BOOLEAN                 NetNDP_CacheGetIsRouterFlagState(       NET_IF_NBR                if_nbr,
+                                                             const  NET_IPv6_ADDR            *p_addr,
+                                                                    NET_ERR                  *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_NDP_CFG_CACHE_NBR
+#error  "NET_NDP_CFG_CACHE_NBR                         not #define'd in 'net_cfg.h'  "
+#error  "                                        [MUST be  >= NET_NDP_CACHE_NBR_MIN] "
+#error  "                                        [     &&  <= NET_NDP_CACHE_NBR_MAX] "
+
+#elif  ((NET_NDP_CFG_CACHE_NBR < NET_NDP_CACHE_NBR_MIN) || \
+        (NET_NDP_CFG_CACHE_NBR > NET_NDP_CACHE_NBR_MAX))
+#error  "NET_NDP_CFG_CACHE_NBR                   illegally #define'd in 'net_cfg.h'  "
+#error  "                                        [MUST be  >= NET_NDP_CACHE_NBR_MIN] "
+#error  "                                        [     &&  <= NET_NDP_CACHE_NBR_MAX] "
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_NDP_MODULE_EN       */
+#endif  /* NET_NDP_MODULE_PRESENT  */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_base64.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_base64.c
new file mode 100644
index 0000000..ae4806e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_base64.c
@@ -0,0 +1,362 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK BASE64 LIBRARY
+*
+* Filename      : net_base64.c
+* Version       : V3.04.02
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           INCLUDES FILES
+*********************************************************************************************************
+*/
+
+#include "net_base64.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*
+* Note(s): (1) This table represents the alphabet for the base-64 encoder.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+                                                                /* See Note #1.                                         */
+static  const  CPU_CHAR  NetBase64Alphabet[] = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/";
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL FUNCTION PROTOTYPTES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  NetBase64_ConvertTo6Bits(CPU_CHAR  b64_val);
+
+
+/*
+*********************************************************************************************************
+*                                          NetUtil_Base64Encode()
+*
+* Description : (1) Encode a buffer to the Base64 standard.
+*
+*                   (a) Calculate number of groups & output len
+*                   (b) Encode groups of 3 octets                                       See Note #2
+*                   (c) Encode remaining   octets, if any
+*                   (d) NULL terminate out buffer
+*
+*
+* Argument(s) : p_buf_in        Pointer to buffer holding data to encode.
+*
+*               buf_in_len      Length of data in buffer input.
+*
+*               p_buf_out       Pointer to a buffer that will receive the encoded data.
+*
+*               buf_out_len     Length of buffer output.
+*
+*               p_err           Pointer to variable that will hold the return error code from this function :
+*
+*                                   NET_ERR_NONE                        No error.
+*                                   NET_ERR_FAULT_NULL_PTR              Argument passed a NULL pointer.
+*                                   NET_UTIL_ERR_BUF_TOO_SMALL          Buffer too small.
+*                                   NET_UTIL_ERR_NULL_SIZE              Invalid buffer size
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a application programming interface (API) function & MAY be called
+                by application function(s).
+*
+* Note(s)     : (2) From RFC #4648, Section 4 'Base 64 Encoding' "The encoding process represents 24-bit
+*                   groups of input bits as output strings of 4 encoded characters.  Each of [these
+*                   encoded characters] is translated into a single character in the base 64 alphabet".
+*********************************************************************************************************
+*/
+
+void  NetBase64_Encode (CPU_CHAR     *p_buf_in,
+                        CPU_INT16U    buf_in_len,
+                        CPU_CHAR     *p_buf_out,
+                        CPU_INT16U    buf_out_len,
+                        NET_ERR      *p_err)
+{
+    CPU_INT16U  nbr_in_grp;
+    CPU_INT16U  nbr_octets_remaining;
+    CPU_INT16U  grp_ix;
+    CPU_INT16U  rd_ix;
+    CPU_INT16U  wr_ix;
+    CPU_INT16U  out_expect_len;
+
+
+                                                                /* ---------------- VALIDATE PTR & LEN ---------------- */
+    if ((p_buf_in  == DEF_NULL) ||
+        (p_buf_out == DEF_NULL)) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (buf_in_len == 0u) {
+       *p_err = NET_UTIL_ERR_NULL_SIZE ;
+        return;
+    }
+                                                                /* ------------- CALC NBR OF GRP'S & LEN -------------- */
+                                                                /* Nbr of grp's (see Note #2).                          */
+    nbr_in_grp           = buf_in_len / NET_BASE64_ENCODER_OCTETS_IN_GRP;
+    nbr_octets_remaining = buf_in_len % NET_BASE64_ENCODER_OCTETS_IN_GRP;
+
+                                                                /* Calc out buf size and validate.                      */
+    out_expect_len = (nbr_in_grp * NET_BASE64_ENCODER_OCTETS_OUT_GRP);
+    if (nbr_octets_remaining != 0u) {
+        out_expect_len = out_expect_len + NET_BASE64_ENCODER_OCTETS_OUT_GRP;
+    }
+    out_expect_len++;                                           /* Provision for termination NUL char.                  */
+
+    if (buf_out_len < out_expect_len) {                         /* If out buf len < than expected out ...               */
+       *p_err = NET_UTIL_ERR_BUF_TOO_SMALL;                     /* ... rtn err.                                         */
+        return;
+    }
+
+    grp_ix = 0u;
+    rd_ix  = 0u;
+    wr_ix  = 0u;
+
+                                                                /* -------------- ENC GRP'S OF 3 OCTETS --------------- */
+    while (grp_ix < nbr_in_grp) {
+        p_buf_out[wr_ix    ] = NetBase64Alphabet[ (p_buf_in[rd_ix    ] &  0xFC) >> 2];
+        p_buf_out[wr_ix + 1] = NetBase64Alphabet[((p_buf_in[rd_ix    ] &  0x03) << 4) | ((p_buf_in[rd_ix + 1] & 0xF0) >> 4)];
+        p_buf_out[wr_ix + 2] = NetBase64Alphabet[((p_buf_in[rd_ix + 1] &  0x0F) << 2) | ((p_buf_in[rd_ix + 2] & 0xC0) >> 6)];
+        p_buf_out[wr_ix + 3] = NetBase64Alphabet[p_buf_in[rd_ix + 2] &  0x3F];
+
+        wr_ix += NET_BASE64_ENCODER_OCTETS_OUT_GRP;
+        rd_ix += NET_BASE64_ENCODER_OCTETS_IN_GRP;
+        grp_ix++;
+    }
+
+                                                                /* --------------- ENC REMAINING OCTETS --------------- */
+    if (nbr_octets_remaining == 1) {
+        p_buf_out[wr_ix    ] = NetBase64Alphabet[(p_buf_in[rd_ix] &  0xFC) >> 2];
+        p_buf_out[wr_ix + 1] = NetBase64Alphabet[(p_buf_in[rd_ix] &  0x03) << 4];
+        p_buf_out[wr_ix + 2] = (CPU_CHAR)NET_BASE64_ENCODER_PAD_CHAR;
+        p_buf_out[wr_ix + 3] = (CPU_CHAR)NET_BASE64_ENCODER_PAD_CHAR;
+
+        wr_ix += NET_BASE64_ENCODER_OCTETS_OUT_GRP;
+
+    } else if (nbr_octets_remaining == 2) {
+        p_buf_out[wr_ix    ] = NetBase64Alphabet[(p_buf_in[rd_ix] &  0xFC) >> 2];
+        p_buf_out[wr_ix + 1] = NetBase64Alphabet[((p_buf_in[rd_ix    ] &  0x03) << 4) | ((p_buf_in[rd_ix + 1] & 0xF0) >> 4)];
+        p_buf_out[wr_ix + 2] = NetBase64Alphabet[ (p_buf_in[rd_ix + 1] &  0x0F) << 2];
+        p_buf_out[wr_ix + 3] = (CPU_CHAR)NET_BASE64_ENCODER_PAD_CHAR;
+
+        wr_ix += NET_BASE64_ENCODER_OCTETS_OUT_GRP;
+    }
+
+
+    p_buf_out[wr_ix] = ASCII_CHAR_NULL;                              /* NULL terminate out buf.                              */
+
+
+   *p_err = NET_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetUtil_Base64Decode()
+*
+* Description : (1) Decode a Base64 value to a hex value .
+*
+*                   (a) Calculate number of groups & output len
+*                   (b) Decode groups of 4 octets
+*                   (c) DEcode the last part of the string.
+*
+*
+* Argument(s) : p_buf_in        Pointer to buffer holding encoded data.
+*
+*               buf_in_len      Length of data in buffer input.
+*
+*               p_buf_out       Pointer to a buffer that will receive the decoded data.
+*
+*               buf_out_len     Length of buffer output.
+*
+*               p_err           Pointer to variable that will hold the return error code from this function :
+*
+*                                   NET_ERR_NONE                        No error.
+*                                   NET_ERR_FAULT_NULL_PTR              Argument passed a NULL pointer.
+*                                   NET_UTIL_ERR_BUF_TOO_SMALL          Buffer too small.
+*                                   NET_UTIL_ERR_NULL_SIZE              Invalid buffer size
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a application programming interface (API) function & MAY be called
+                by application function(s).
+*
+* Note(s)     : (2) From RFC #4648, Section 4 'Base 64 Encoding' "The encoding process represents 24-bit
+*                   groups of input bits as output strings of 4 encoded characters.  Each of [these
+*                   encoded characters] is translated into a single character in the base 64 alphabet".
+*********************************************************************************************************
+*/
+
+void  NetBase64_Decode (CPU_CHAR     *p_buf_in,
+                        CPU_INT16U    buf_in_len,
+                        CPU_CHAR     *p_buf_out,
+                        CPU_INT16U    buf_out_len,
+                        NET_ERR      *p_err)
+{
+    CPU_INT16U  nbr_in_grp;
+    CPU_INT16U  grp_ix;
+    CPU_INT16U  rd_ix;
+    CPU_INT16U  wr_ix;
+    CPU_INT16U  out_expect_len;
+    CPU_INT08U  tmp_val[NET_BASE64_DECODER_OCTETS_IN_GRP];
+    CPU_INT08U  i;
+
+                                                                /* ---------------- VALIDATE PTR & LEN ---------------- */
+    if ((p_buf_in  == DEF_NULL) ||
+        (p_buf_out == DEF_NULL)) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (buf_in_len == 0u) {
+       *p_err = NET_UTIL_ERR_NULL_SIZE ;
+        return;
+    }
+                                                                /* ------------- CALC NBR OF GRP'S & LEN -------------- */
+                                                                /* Nbr of grp's (see Note #2).                          */
+    nbr_in_grp = buf_in_len / NET_BASE64_DECODER_OCTETS_IN_GRP;
+                                                                /* Calc out buf size and validate.                      */
+    out_expect_len = (nbr_in_grp * NET_BASE64_DECODER_OCTETS_OUT_GRP);
+    if (p_buf_in[buf_in_len - 2] == '=') {
+        if (p_buf_in[buf_in_len - 3] == '=') {
+            out_expect_len -= 2;
+        } else {
+            out_expect_len -= 1;
+        }
+    }
+
+    if (buf_out_len < out_expect_len) {                         /* If out buf len < than expected out ...               */
+       *p_err = NET_UTIL_ERR_BUF_TOO_SMALL;                     /* ... rtn err.                                         */
+        return;
+    }
+
+
+    grp_ix = 0u;
+    rd_ix  = 0u;
+    wr_ix  = 0u;
+
+                                                                /* -------------- DEC GRP'S OF 3 OCTETS --------------- */
+    while (grp_ix < nbr_in_grp - 1) {
+        for (i = 0; i < NET_BASE64_DECODER_OCTETS_IN_GRP ; i++) {
+            tmp_val[i] = NetBase64_ConvertTo6Bits(p_buf_in[rd_ix + i]);
+        }
+        p_buf_out[wr_ix    ] = ((tmp_val[0] << 2) & 0xFC) + ((tmp_val[1] >> 4) & 0x03);
+        p_buf_out[wr_ix + 1] = ((tmp_val[1] << 4) & 0xF0) + ((tmp_val[2] >> 2) & 0x0F);
+        p_buf_out[wr_ix + 2] = ((tmp_val[2] << 6) & 0xC0) +  (tmp_val[3] & 0x3F);
+
+        wr_ix += NET_BASE64_DECODER_OCTETS_OUT_GRP;
+        rd_ix += NET_BASE64_DECODER_OCTETS_IN_GRP;
+        grp_ix++;
+    }
+
+                                                                /* --------------- DEC REMAINING OCTETS --------------- */
+    if (out_expect_len % NET_BASE64_DECODER_OCTETS_OUT_GRP == 2) {
+        for (i = 0; i < 3 ; i++) {
+            tmp_val[i] = NetBase64_ConvertTo6Bits(p_buf_in[rd_ix + i]);
+        }
+
+        p_buf_out[wr_ix    ] = ((tmp_val[0] << 2) & 0xFC) + ((tmp_val[1] >> 4) & 0x03);
+        p_buf_out[wr_ix + 1] = ((tmp_val[1] << 4) & 0xF0) + ((tmp_val[2] >> 2) & 0x0F);
+
+    } else if (out_expect_len % NET_BASE64_DECODER_OCTETS_OUT_GRP == 1) {
+
+        for (i = 0; i < 2 ; i++) {
+            tmp_val[i] = NetBase64_ConvertTo6Bits(p_buf_in[rd_ix + i]);
+        }
+        p_buf_out[wr_ix    ] = ((tmp_val[0] << 2) & 0xFC) + ((tmp_val[1] >> 4) & 0x03);
+    }
+
+
+   *p_err = NET_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        NetUtil_Base64To6Bits()
+*
+* Description : Convert a Base64 symbol to a 6-bits hex value..
+*
+* Argument(s) : b64_val     Base64 symbol to convert.
+*
+* Return(s)   : Converted base64 into a 6-bits hex value.
+*
+* Caller(s)   : NetUtil_Base64Decode().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+static CPU_INT08U NetBase64_ConvertTo6Bits (CPU_CHAR  b64_val)
+{
+
+    CPU_INT08U  result = 0u;
+
+    if ((b64_val >= 'A') && (b64_val <= 'Z')) {
+        result = b64_val - 0x41;
+    } else if ((b64_val >= 'a') && (b64_val <= 'z')) {
+        result = b64_val - 0x61 + 26;
+    } else if ((b64_val >= '0') && (b64_val <= '9')) {
+        result = b64_val - 0x30 + 52;
+    } else if (b64_val == '+') {
+        result = 62;
+    } else if (b64_val == '/') {
+        result = 63;
+    }
+
+    return result;
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_base64.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_base64.h
new file mode 100644
index 0000000..9f5e7ab
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_base64.h
@@ -0,0 +1,99 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK UTILITY LIBRARY
+*
+* Filename      : net_base64.h
+* Version       : V3.04.02
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) N O compiler-supplied standard library functions are used by the network protocol suite.
+*                     'net_util.*' implements ALL network-specific library functions.
+*
+*                     See also 'net.h  NETWORK INCLUDE FILES  Note #3'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#ifndef  NET_BASE64_MODULE_PRESENT
+#define  NET_BASE64_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*                                       BASE 64 ENCODER DEFINES
+*
+* Note(s) : (1) The size of the output buffer the base 64 encoder produces is typically bigger than the
+*               input buffer by a factor of (4 x 3).  However, when padding is necessary, up to 3
+*               additional characters could by appended.  Finally, one more character is used to NULL
+*               terminate the buffer.
+*********************************************************************************************************
+*/
+
+#define  NET_BASE64_ENCODER_OCTETS_IN_GRP                3
+#define  NET_BASE64_ENCODER_OCTETS_OUT_GRP               4
+
+#define  NET_BASE64_DECODER_OCTETS_IN_GRP                4
+#define  NET_BASE64_DECODER_OCTETS_OUT_GRP               3
+
+#define  NET_BASE64_ENCODER_PAD_CHAR                    '='
+                                                                /* See Note #1.                                         */
+#define  NET_BASE64_ENCODER_OUT_MAX_LEN(length)         (((length / 3) * 4) + ((length % 3) == 0 ? 0 : 4) + 1)
+
+
+
+void        NetBase64_Encode (CPU_CHAR               *pin_buf,
+                              CPU_INT16U              in_len,
+                              CPU_CHAR               *pout_buf,
+                              CPU_INT16U              out_len,
+                              NET_ERR                *p_err);
+
+void        NetBase64_Decode (CPU_CHAR               *pin_buf,
+                              CPU_INT16U              in_len,
+                              CPU_CHAR               *pout_buf,
+                              CPU_INT16U              out_len,
+                              NET_ERR                *p_err);
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_sha1.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_sha1.c
new file mode 100644
index 0000000..ffb91e3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_sha1.c
@@ -0,0 +1,440 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    NETWORK CRYPTO SHA1 UTILITY
+*
+* Filename      : net_sha1.c
+* Version       : V3.04.02
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           INCLUDES FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include "net_sha1.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+                                                                /* Define the SHA1 circular left shift macro.           */
+#define NET_SHA1_CIRCULAR_SHIFT(bits,word)             (((word) << (bits)) | ((word) >> (32-(bits))))
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL FUNCTION PROTOTYPTES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static void    NetSHA1_PadMessage          (NET_SHA1_CTX  *p_ctx);
+
+static void    NetSHA1_ProcessMessageBlock (NET_SHA1_CTX  *ptx);
+
+
+
+/*
+*********************************************************************************************************
+*                                        NetSHA1_Reset()
+*
+* Description : Initialize the NET_SHA1_CTX in preparation for computing a new SHA1 message digest.
+*
+* Argument(s) : p_ctx   Pointer to the SHA1 context.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SHA1_ERR_NONE            Operation is successful.
+*                               NET_SHA1_ERR_PTR_NULL        The Context pointer is invalid.
+*
+* Return(s)   : DEF_OK, if the the context is properly reset.
+*
+*               DEF_FAIL, if the operation failed.
+*
+* Caller(s)   : Application.
+*
+*               This function is a application programming interface (API) function & MAY be called
+                by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSHA1_Reset (NET_SHA1_CTX  *p_ctx,
+                            NET_SHA1_ERR  *p_err)
+{
+    if (p_ctx == DEF_NULL) {
+       *p_err = NET_SHA1_ERR_PTR_NULL;
+        return DEF_FAIL;
+    }
+
+    p_ctx->Length_Low             = 0;
+    p_ctx->Length_High            = 0;
+    p_ctx->Message_Block_Index    = 0;
+
+    p_ctx->Intermediate_Hash[0]   = 0x67452301;
+    p_ctx->Intermediate_Hash[1]   = 0xEFCDAB89;
+    p_ctx->Intermediate_Hash[2]   = 0x98BADCFE;
+    p_ctx->Intermediate_Hash[3]   = 0x10325476;
+    p_ctx->Intermediate_Hash[4]   = 0xC3D2E1F0;
+
+    p_ctx->Computed   = 0;
+    p_ctx->Corrupted  = NET_SHA1_ERR_NONE;
+
+   *p_err = NET_SHA1_ERR_NONE;
+    return DEF_OK;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetSHA1_Result()
+*
+* Description : This function returns the 160-bit message digest into the Message_Digest array  provided
+*               by the caller.
+*
+* Argument(s) : p_ctx         Pointer to the SHA1 context.
+*
+* *             p_msg_digest  Pointer to the buffer that receive the message digest.
+*
+*               p_err         Pointer to variable that will receive the return error code from this function :
+*
+*                                 NET_SHA1_ERR_NONE            Operation is successful.
+*                                 NET_SHA1_ERR_PTR_NULL        The Context pointer is invalid.
+*                                 NET_SHA1_ERR_CORRUPTION      Corruption is detected.
+*
+* Return(s)   : DEF_OK, if the the operation is successful.
+*
+*               DEF_FAIL, if the operation failed.
+*
+* Caller(s)   : Application.
+*
+*               This function is a application programming interface (API) function & MAY be called
+                by application function(s).
+*
+* Note(s)     : (1) The first octet of hash is stored in the 0th element, the last octet of hash in the
+*                   19th element.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSHA1_Result (NET_SHA1_CTX  *p_ctx,
+                             CPU_CHAR      *p_msg_digest,
+                             NET_SHA1_ERR  *p_err)
+{
+    int i;
+
+    if (p_ctx == DEF_NULL || p_msg_digest == DEF_NULL) {
+       *p_err = NET_SHA1_ERR_PTR_NULL;
+        return DEF_FAIL;
+    }
+
+    if (p_ctx->Corrupted != DEF_NULL) {
+       *p_err = NET_SHA1_ERR_CORRUPTION;
+        return DEF_FAIL;
+    }
+
+    if (p_ctx->Computed == DEF_NULL) {
+        NetSHA1_PadMessage(p_ctx);
+        for (i = 0; i<64; ++i) {
+            p_ctx->Message_Block[i] = 0;
+        }
+        p_ctx->Length_Low  = 0;
+        p_ctx->Length_High = 0;
+        p_ctx->Computed    = 1;
+
+    }
+
+    for (i = 0; i < NET_SHA1_HASH_SIZE; ++i) {
+        p_msg_digest[i] = p_ctx->Intermediate_Hash[i>>2] >> 8 * (3 - (i & 0x03));
+    }
+   *p_err = NET_SHA1_ERR_NONE;
+    return DEF_OK;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetSHA1_Input()
+*
+* Description : This function accepts an array of octets as the next portion of the message.
+*
+* Argument(s) : p_ctx   Pointer to the SHA1 context.
+*
+*               p_msg   Pointer to an array of characters representing the next portion of the message.
+*
+*               len     Length of the message.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                                 NET_SHA1_ERR_NONE            Operation is successful.
+*                                 NET_SHA1_ERR_PTR_NULL        The Context pointer is invalid.
+*                                 NET_SHA1_ERR_CORRUPTION      Corruption is detected.
+*
+* Return(s)   : DEF_OK, if the the operation is successful.
+*
+*               DEF_FAIL, if the operation failed.
+*
+* Caller(s)   : Application.
+*
+*               This function is a application programming interface (API) function & MAY be called
+                by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSHA1_Input (       NET_SHA1_CTX  *p_ctx,
+                            const  CPU_CHAR      *p_msg,
+                                   CPU_INT32U     len,
+                                   NET_SHA1_ERR  *p_err)
+{
+    if (len == DEF_NULL) {
+       *p_err = NET_SHA1_ERR_NONE;
+        return DEF_OK;
+    }
+
+    if (p_ctx == DEF_NULL || p_msg == DEF_NULL) {
+       *p_err = NET_SHA1_ERR_PTR_NULL;
+        return DEF_FAIL;
+    }
+
+    if (p_ctx->Computed != DEF_NULL){
+
+        p_ctx->Corrupted = NET_SHA1_ERR_STATE_ERROR;
+       *p_err            = NET_SHA1_ERR_STATE_ERROR;
+        return DEF_FAIL;
+    }
+
+    if (p_ctx->Corrupted != NET_SHA1_ERR_NONE) {
+       *p_err = p_ctx->Corrupted ;
+        return DEF_FAIL;
+    }
+
+    while ((len-- != DEF_NULL) && (p_ctx->Corrupted == NET_SHA1_ERR_NONE)) {
+        p_ctx->Message_Block[p_ctx->Message_Block_Index++] = *p_msg & 0xFF;
+        p_ctx->Length_Low += 8;
+
+        if (p_ctx->Length_Low == 0) {
+            p_ctx->Length_High++;
+
+            if (p_ctx->Length_High == 0) {
+                p_ctx->Corrupted = NET_SHA1_ERR_INPUT_TOO_LONG;
+            }
+        }
+
+        if (p_ctx->Message_Block_Index == 64) {
+            NetSHA1_ProcessMessageBlock(p_ctx);
+        }
+
+        p_msg++;
+    }
+
+    *p_err = NET_SHA1_ERR_NONE;
+     return DEF_OK;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                 NetSHA1_ProcessMessageBlock()
+*
+* Description : This function will process the next 512 bits of the message stored in the Message_Block array
+*
+* Argument(s) : p_ctx   Pointer to the SHA1 context.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSHA1_Input(),
+*               NetSHA1_PadMessage().
+*
+* Note(s)     : (1) Many of the variable names in this code, especially the single character names, were used
+*                   because those were the names used in the publication.
+*********************************************************************************************************
+*/
+
+static  void  NetSHA1_ProcessMessageBlock (NET_SHA1_CTX  *p_ctx)
+{
+    CPU_INT32U  K[4];
+    CPU_INT32U  t;                                              /* Loop counter                                         */
+    CPU_INT32U  temp;                                           /* Temporary word value                                 */
+    CPU_INT32U  W[80];                                          /* Word sequence                                        */
+    CPU_INT32U  A, B, C, D, E;                                  /* Word buffers                                         */
+
+
+                                                                /* Constants defined in SHA-1                           */
+    K[0] = 0x5A827999;
+    K[1] = 0x6ED9EBA1;
+    K[2] = 0x8F1BBCDC;
+    K[3] = 0xCA62C1D6;
+                                                                /* Initialize the first 16 words in the array W         */
+    for (t = 0; t < 16; t++) {
+        W[t] = p_ctx->Message_Block[t * 4] << 24;
+        W[t] |= p_ctx->Message_Block[t * 4 + 1] << 16;
+        W[t] |= p_ctx->Message_Block[t * 4 + 2] << 8;
+        W[t] |= p_ctx->Message_Block[t * 4 + 3];
+    }
+
+    for (t = 16; t < 80; t++) {
+       W[t] = NET_SHA1_CIRCULAR_SHIFT(1,W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16]);
+    }
+
+    A = p_ctx->Intermediate_Hash[0];
+    B = p_ctx->Intermediate_Hash[1];
+    C = p_ctx->Intermediate_Hash[2];
+    D = p_ctx->Intermediate_Hash[3];
+    E = p_ctx->Intermediate_Hash[4];
+
+    for (t = 0; t < 20; t++) {
+        temp =  NET_SHA1_CIRCULAR_SHIFT(5,A) +
+                ((B & C) | ((~B) & D)) + E + W[t] + K[0];
+        E = D;
+        D = C;
+        C = NET_SHA1_CIRCULAR_SHIFT(30,B);
+        B = A;
+        A = temp;
+    }
+
+    for (t = 20; t < 40; t++) {
+        temp = NET_SHA1_CIRCULAR_SHIFT(5,A) + (B ^ C ^ D) + E + W[t] + K[1];
+        E = D;
+        D = C;
+        C = NET_SHA1_CIRCULAR_SHIFT(30,B);
+        B = A;
+        A = temp;
+    }
+
+    for (t = 40; t < 60; t++) {
+        temp = NET_SHA1_CIRCULAR_SHIFT(5,A) +
+               ((B & C) | (B & D) | (C & D)) + E + W[t] + K[2];
+        E = D;
+        D = C;
+        C = NET_SHA1_CIRCULAR_SHIFT(30,B);
+        B = A;
+        A = temp;
+    }
+
+    for (t = 60; t < 80; t++) {
+        temp = NET_SHA1_CIRCULAR_SHIFT(5,A) + (B ^ C ^ D) + E + W[t] + K[3];
+        E = D;
+        D = C;
+        C = NET_SHA1_CIRCULAR_SHIFT(30,B);
+        B = A;
+        A = temp;
+    }
+
+    p_ctx->Intermediate_Hash[0] += A;
+    p_ctx->Intermediate_Hash[1] += B;
+    p_ctx->Intermediate_Hash[2] += C;
+    p_ctx->Intermediate_Hash[3] += D;
+    p_ctx->Intermediate_Hash[4] += E;
+
+    p_ctx->Message_Block_Index = 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetSHA1_PadMessage()
+*
+* Description : Pad the message according at the SHA-1 standard.
+*
+* Argument(s) : p_ctx   Pointer to the SHA1 context.
+*
+* Return(s)   : NONE.
+*
+* Caller(s)   : NetSHA1_Result().
+*
+* Note(s)     : (1) According to the standard, the message must be padded to an even 512 bits. The first
+*                   padding bit must be a '1'.  The last 64 bits represent the length of the original
+*                   message.  All bits in between should be 0.  This function will pad the message
+*                   according to those rules by filling the Message_Block array accordingly.  It will
+*                   also call the ProcessMessageBlock function provided appropriately.  When it returns,
+*                   it can be assumed that the message digest has been computed.
+*********************************************************************************************************
+*/
+
+static  void  NetSHA1_PadMessage (NET_SHA1_CTX  *p_ctx)
+{
+                                                                /* Check to see if the current message block is too...  */
+                                                                /* ...small to hold the initial padding bits and length.*/
+
+    if (p_ctx->Message_Block_Index > 55) {
+                                                                /* If so, we will pad the block, process it, and...     */
+                                                                /* ...then continue padding into a second block.        */
+        p_ctx->Message_Block[p_ctx->Message_Block_Index++] = 0x80;
+
+        while (p_ctx->Message_Block_Index < 64) {
+            p_ctx->Message_Block[p_ctx->Message_Block_Index++] = 0;
+        }
+
+        NetSHA1_ProcessMessageBlock(p_ctx);
+
+        while (p_ctx->Message_Block_Index < 56) {
+            p_ctx->Message_Block[p_ctx->Message_Block_Index++] = 0;
+        }
+    } else {
+        p_ctx->Message_Block[p_ctx->Message_Block_Index++] = 0x80;
+        while (p_ctx->Message_Block_Index < 56) {
+            p_ctx->Message_Block[p_ctx->Message_Block_Index++] = 0;
+        }
+    }
+
+
+                                                                /* Store the message length as the last 8 octets.       */
+    p_ctx->Message_Block[56] = p_ctx->Length_High >> 24;
+    p_ctx->Message_Block[57] = p_ctx->Length_High >> 16;
+    p_ctx->Message_Block[58] = p_ctx->Length_High >> 8;
+    p_ctx->Message_Block[59] = p_ctx->Length_High;
+    p_ctx->Message_Block[60] = p_ctx->Length_Low >> 24;
+    p_ctx->Message_Block[61] = p_ctx->Length_Low >> 16;
+    p_ctx->Message_Block[62] = p_ctx->Length_Low >> 8;
+    p_ctx->Message_Block[63] = p_ctx->Length_Low;
+
+    NetSHA1_ProcessMessageBlock(p_ctx);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_sha1.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_sha1.h
new file mode 100644
index 0000000..72114f3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_sha1.h
@@ -0,0 +1,158 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       NETWORK CRYPTO SHA1 UTILITY
+*
+* Filename      : net_sha1.h
+* Version       : V3.04.02
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) This is the header file for code which implements the Secure Hashing Algorithm 1 as
+*                     defined in FIPS PUB 180-1 published April 17, 1995.
+*
+*                     Many of the variable names in this code, especially the single character names, were
+*                     used because those were the names used in the publication.
+*
+*                     Please read the file net_sha1.c for more information.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#ifndef  NET_SHA1_MODULE_PRESENT
+#define  NET_SHA1_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_SHA1_HASH_SIZE                 20
+
+#define  NET_SHA1_INTERMEDIATE_HASH_SIZE    NET_SHA1_HASH_SIZE / 4
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            ENUMERATIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef enum
+{
+    NET_SHA1_ERR_NONE                 = 0,
+    NET_SHA1_ERR_PTR_NULL             = 1,
+    NET_SHA1_ERR_INPUT_TOO_LONG       = 2,
+    NET_SHA1_ERR_STATE_ERROR          = 3,
+    NET_SHA1_ERR_CORRUPTION           = 4,
+
+}NET_SHA1_ERR;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef struct net_sha1_context{
+
+    CPU_INT32U      Intermediate_Hash[NET_SHA1_INTERMEDIATE_HASH_SIZE];
+
+    CPU_INT32U      Length_Low;                                 /* Message length in bits                               */
+    CPU_INT32U      Length_High;                                /* Message length in bits                               */
+
+                                                                /* Index into message block array                       */
+    CPU_INT16U      Message_Block_Index;
+    CPU_INT08U      Message_Block[64];                          /* 512-bit message blocks                               */
+
+    CPU_BOOLEAN     Computed;                                   /* Is the digest computed?                              */
+    NET_SHA1_ERR    Corrupted;                                  /* Is the message digest corrupted?                     */
+
+} NET_SHA1_CTX;
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+CPU_BOOLEAN NetSHA1_Reset     (      NET_SHA1_CTX  *p_ctx,
+                                     NET_SHA1_ERR  *p_err);
+
+CPU_BOOLEAN NetSHA1_Input     (      NET_SHA1_CTX  *p_ctx,
+                               const CPU_CHAR      *p_msg,
+                                     CPU_INT32U     len,
+                                     NET_SHA1_ERR  *p_err);
+
+CPU_BOOLEAN NetSHA1_Result    (      NET_SHA1_CTX  *p_ctx,
+                                     CPU_CHAR      *p_msg_digest,
+                                     NET_SHA1_ERR  *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_SHA1_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM-Cortex-M3/IAR/net_util_a.asm b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM-Cortex-M3/IAR/net_util_a.asm
new file mode 100644
index 0000000..2146efb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM-Cortex-M3/IAR/net_util_a.asm
@@ -0,0 +1,199 @@
+;********************************************************************************************************
+;                                             uC/TCP-IP
+;                                      The Embedded TCP/IP Suite
+;
+;                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+;
+;                  All rights reserved.  Protected by international copyright laws.
+;
+;                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+;                  illegal to distribute this source code to any third party unless you receive
+;                  written permission by an authorized Micrium representative.  Knowledge of
+;                  the source code may NOT be used to develop a similar product.
+;
+;                  Please help us continue to provide the Embedded community with the finest
+;                  software available.  Your honesty is greatly appreciated.
+;
+;                  You can find our product's user manual, API reference, release notes and
+;                  more information at: https://doc.micrium.com
+;
+;                  You can contact us at: http://www.micrium.com
+;********************************************************************************************************
+
+;********************************************************************************************************
+;
+;                                       NETWORK UTILITY LIBRARY
+;
+;                                            ARM-Cortex-M3
+;                                            IAR Compiler
+;
+; Filename      : net_util_a.asm
+; Version       : V3.04.02
+; Programmer(s) : JDH
+;                 BAN
+;********************************************************************************************************
+; Note(s)       : (1) Assumes ARM CPU mode configured for Little Endian.
+;********************************************************************************************************
+
+
+;********************************************************************************************************
+;                                          PUBLIC FUNCTIONS
+;********************************************************************************************************
+
+        PUBLIC  NetUtil_16BitSumDataCalcAlign_32
+
+
+;********************************************************************************************************
+;                                     CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+        RSEG CODE:CODE:NOROOT(2)
+
+
+;********************************************************************************************************
+;                                 NetUtil_16BitSumDataCalcAlign_32()
+;
+; Description : Calculate 16-bit sum on 32-bit word-aligned data.
+;
+; Argument(s) : pdata_32    Pointer  to 32-bit word-aligned data (see Note #2).
+;
+;               size        Size of data.
+;
+; Return(s)   : 16-bit sum (see Notes #1 & #3).
+;
+; Caller(s)   : NetUtil_16BitSumDataCalc().
+;
+;               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+;               application function(s).
+;
+; Note(s)     : (1) Computes the sum of consecutive 16-bit values.
+;
+;               (2) Since many word-aligned processors REQUIRE  that multi-octet words be located on word-
+;                   aligned addresses, sum calculation REQUIREs that 32-bit words are accessed on addresses
+;                   that are multiples of 4 octets.
+;
+;               (3) The 16-bit sum MUST be returned in Big Endian/Network order.
+;
+;                   See 'net_util.c  NetUtil_16BitSumDataCalc()  Note #5b'.
+;
+;                   (a) Assumes Little Endian CPU Mode (see 'net_util_a.asm  Note #1') thus requiring the
+;                       16-bit octets of the 32-bit data to be swapped.
+;
+;                       #### However, the 16-bit octets COULD be swapped after the 16-bit sum is fully
+;                       calculated.
+;
+;               (4) (a) A "straightforward" assembly implementation would do the following for each
+;                       32-bit word:
+;
+;                       (1) Extract the lower  16-bit half-word from the 32-bit word.
+;                       (2) Swap    the lower  16-bit half-word's bytes.
+;                       (3) Add     the lower  16-bit half-word to the sum.
+;                       (4) Extract the higher 16-bit half-word from the 32-bit word.
+;                       (5) Swap    the higher 16-bit half-word's bytes.
+;                       (6) Add     the higher 16-bit half-word to the sum.
+;
+;                       If the initial 32-bit word were 0x11223344, then 0x2211 and 0x4433 would be the
+;                       two 16-bit half-words that eventually get added to the sum.
+;
+;                   (b) A faster assembly implementation which can accelerate this process would do the
+;                       following for each 32-bit word:
+;
+;                       (1) Rotate the 32-bit word right 8 bits.
+;                       (2) Extract the lower  16-bit half-word from the rotated 32-bit word.
+;                       (3) Add     the lower  16-bit half-word to the sum.
+;                       (4) Extract the higher 16-bit half-word from the rotated 32-bit word.
+;                       (5) Add     the higher 16-bit half-word to the sum.
+;
+;                       If the initial 32-bit word were 0x11223344, then 0x4411 and 0x2233 would be the
+;                       two 16-bit half-words that eventually get added to the sum.  Notice these
+;                       half-words are equal to those formed in the straightforward implementation with
+;                       the lower octets swapped.  Since the algorithm does not care about the order in
+;                       which the bytes are accumulated (only the position of the bytes), this does not
+;                       affect the outcome.
+;********************************************************************************************************
+; CPU_INT32U  NetUtil_16BitSumDataCalcAlign_32 (void        *pdata_32,   @       ==>  R0
+;                                               CPU_INT32U   size)       @       ==>  R1
+;                                                                        @  sum  ==>  R2
+
+NetUtil_16BitSumDataCalcAlign_32:
+        STMFD       SP!, {R2-R12}
+
+        MOV         R2, #0
+        B           NetUtil_16BitSumDataCalcAlign_32_0
+
+NetUtil_16BitSumDataCalcAlign_32_1:
+        LDMIA       R0!, {R5-R12}                           ; Calc sum of sixteen 16-bit words ...
+                                                            ; ... using eight 32-bit CPU regs.
+        MOV         R3,  R5,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R6,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R7,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R8,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R9,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R10, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R11, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R12, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        SUB         R1,  R1, #(4*8*1)
+
+NetUtil_16BitSumDataCalcAlign_32_0:
+        CMP         R1, #(4*8*1)                            ; end of loop
+        BCS         NetUtil_16BitSumDataCalcAlign_32_1
+
+        B           NetUtil_16BitSumDataCalcAlign_32_2
+
+
+
+NetUtil_16BitSumDataCalcAlign_32_3:
+        LDMIA       R0!, {R5}                               ; Calc sum of two 16-bit words ...
+                                                            ; ... using   one 32-bit CPU reg.
+
+        MOV         R3,  R5,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        SUB         R1, R1, #(4*1*1)
+
+NetUtil_16BitSumDataCalcAlign_32_2:
+
+        CMP         R1, #(4*1*1)                            ; end of loop
+        BCS         NetUtil_16BitSumDataCalcAlign_32_3
+
+        MOV         R0, R2
+        LDMFD       SP!, {R2-R12}
+        BX          LR                                      ; return
+
+
+        END
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM-Cortex-M3/RealView/net_util_a.asm b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM-Cortex-M3/RealView/net_util_a.asm
new file mode 100644
index 0000000..857da21
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM-Cortex-M3/RealView/net_util_a.asm
@@ -0,0 +1,205 @@
+;********************************************************************************************************
+;                                             uC/TCP-IP
+;                                      The Embedded TCP/IP Suite
+;
+;                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+;
+;                  All rights reserved.  Protected by international copyright laws.
+;
+;                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+;                  illegal to distribute this source code to any third party unless you receive
+;                  written permission by an authorized Micrium representative.  Knowledge of
+;                  the source code may NOT be used to develop a similar product.
+;
+;                  Please help us continue to provide the Embedded community with the finest
+;                  software available.  Your honesty is greatly appreciated.
+;
+;                  You can find our product's user manual, API reference, release notes and
+;                  more information at: https://doc.micrium.com
+;
+;                  You can contact us at: http://www.micrium.com
+;********************************************************************************************************
+
+;********************************************************************************************************
+;
+;                                       NETWORK UTILITY LIBRARY
+;
+;                                            ARM-Cortex-M3
+;                                     RealView Development Suite
+;                            RealView Microcontroller Development Kit (MDK)
+;                                      ARM Developer Suite (ADS)
+;                                            Keil uVision
+;
+; Filename      : net_util_a.asm
+; Version       : V3.04.02
+; Programmer(s) : JDH
+;                 BAN
+;********************************************************************************************************
+; Note(s)       : (1) Assumes ARM CPU mode configured for Little Endian.
+;********************************************************************************************************
+
+
+;********************************************************************************************************
+;                                          PUBLIC FUNCTIONS
+;********************************************************************************************************
+
+        EXPORT  NetUtil_16BitSumDataCalcAlign_32
+
+
+;********************************************************************************************************
+;                                     CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+        AREA |.text|, CODE, READONLY, ALIGN=2
+        THUMB
+        REQUIRE8
+        PRESERVE8
+
+
+;********************************************************************************************************
+;                                 NetUtil_16BitSumDataCalcAlign_32()
+;
+; Description : Calculate 16-bit sum on 32-bit word-aligned data.
+;
+; Argument(s) : pdata_32    Pointer  to 32-bit word-aligned data (see Note #2).
+;
+;               size        Size of data.
+;
+; Return(s)   : 16-bit sum (see Notes #1 & #3).
+;
+; Caller(s)   : NetUtil_16BitSumDataCalc().
+;
+;               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+;               application function(s).
+;
+; Note(s)     : (1) Computes the sum of consecutive 16-bit values.
+;
+;               (2) Since many word-aligned processors REQUIRE  that multi-octet words be located on word-
+;                   aligned addresses, sum calculation REQUIREs that 32-bit words are accessed on addresses
+;                   that are multiples of 4 octets.
+;
+;               (3) The 16-bit sum MUST be returned in Big Endian/Network order.
+;
+;                   See 'net_util.c  NetUtil_16BitSumDataCalc()  Note #5b'.
+;
+;                   (a) Assumes Little Endian CPU Mode (see 'net_util_a.asm  Note #1') thus requiring the
+;                       16-bit octets of the 32-bit data to be swapped.
+;
+;                       #### However, the 16-bit octets COULD be swapped after the 16-bit sum is fully
+;                       calculated.
+;
+;               (4) (a) A "straightforward" assembly implementation would do the following for each
+;                       32-bit word:
+;
+;                       (1) Extract the lower  16-bit half-word from the 32-bit word.
+;                       (2) Swap    the lower  16-bit half-word's bytes.
+;                       (3) Add     the lower  16-bit half-word to the sum.
+;                       (4) Extract the higher 16-bit half-word from the 32-bit word.
+;                       (5) Swap    the higher 16-bit half-word's bytes.
+;                       (6) Add     the higher 16-bit half-word to the sum.
+;
+;                       If the initial 32-bit word were 0x11223344, then 0x2211 and 0x4433 would be the
+;                       two 16-bit half-words that eventually get added to the sum.
+;
+;                   (b) A faster assembly implementation which can accelerate this process would do the
+;                       following for each 32-bit word:
+;
+;                       (1) Rotate the 32-bit word right 8 bits.
+;                       (2) Extract the lower  16-bit half-word from the rotated 32-bit word.
+;                       (3) Add     the lower  16-bit half-word to the sum.
+;                       (4) Extract the higher 16-bit half-word from the rotated 32-bit word.
+;                       (5) Add     the higher 16-bit half-word to the sum.
+;
+;                       If the initial 32-bit word were 0x11223344, then 0x4411 and 0x2233 would be the
+;                       two 16-bit half-words that eventually get added to the sum.  Notice these
+;                       half-words are equal to those formed in the straightforward implementation with
+;                       the lower octets swapped.  Since the algorithm does not care about the order in
+;                       which the bytes are accumulated (only the position of the bytes), this does not
+;                       affect the outcome.
+;********************************************************************************************************
+; CPU_INT32U  NetUtil_16BitSumDataCalcAlign_32 (void        *pdata_32,   @       ==>  R0
+;                                               CPU_INT32U   size)       @       ==>  R1
+;                                                                        @  sum  ==>  R2
+
+NetUtil_16BitSumDataCalcAlign_32
+        STMFD       SP!, {R2-R12}
+
+        MOV         R2, #0
+        B           NetUtil_16BitSumDataCalcAlign_32_0
+
+NetUtil_16BitSumDataCalcAlign_32_1
+        LDMIA       R0!, {R5-R12}                           ; Calc sum of sixteen 16-bit words ...
+                                                            ; ... using eight 32-bit CPU regs.
+        MOV         R3,  R5,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R6,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R7,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R8,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R9,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R10, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R11, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R12, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        SUB         R1, R1, #(4*8*1)
+
+NetUtil_16BitSumDataCalcAlign_32_0
+        CMP         R1, #(4*8*1)                            ; end of loop
+        BCS         NetUtil_16BitSumDataCalcAlign_32_1
+
+        B           NetUtil_16BitSumDataCalcAlign_32_2
+
+
+
+NetUtil_16BitSumDataCalcAlign_32_3
+        LDMIA       R0!, {R5}                               ; Calc sum of two 16-bit words ...
+                                                            ; ... using   one 32-bit CPU reg.
+
+        MOV         R3,  R5,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        SUB         R1, R1, #(4*1*1)
+
+NetUtil_16BitSumDataCalcAlign_32_2
+
+        CMP         R1, #(4*1*1)                            ; end of loop
+        BCS         NetUtil_16BitSumDataCalcAlign_32_3
+
+        MOV         R0, R2
+        LDMFD       SP!, {R2-R12}
+        BX          LR                                      ; return
+
+
+        END
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM/GNU/net_util_a.s b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM/GNU/net_util_a.s
new file mode 100644
index 0000000..b924681
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM/GNU/net_util_a.s
@@ -0,0 +1,202 @@
+@********************************************************************************************************
+@                                             uC/TCP-IP
+@                                      The Embedded TCP/IP Suite
+@
+@                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+@
+@                  All rights reserved.  Protected by international copyright laws.
+@
+@                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+@                  illegal to distribute this source code to any third party unless you receive
+@                  written permission by an authorized Micrium representative.  Knowledge of
+@                  the source code may NOT be used to develop a similar product.
+@
+@                  Please help us continue to provide the Embedded community with the finest
+@                  software available.  Your honesty is greatly appreciated.
+@
+@                  You can find our product's user manual, API reference, release notes and
+@                  more information at: https://doc.micrium.com
+@
+@                  You can contact us at: http://www.micrium.com
+@********************************************************************************************************
+
+
+
+@********************************************************************************************************
+@
+@                                       NETWORK UTILITY LIBRARY
+@
+@                                                ARM
+@                                            GNU Compiler
+@
+@ Filename      : net_util_a.s
+@ Version       : V3.04.02
+@ Programmer(s) : JDH
+@                 BAN
+@********************************************************************************************************
+@ Note(s)       : (1) Assumes ARM CPU mode configured for Little Endian.
+@********************************************************************************************************
+
+
+@********************************************************************************************************
+@                                          PUBLIC FUNCTIONS
+@********************************************************************************************************
+
+        .global  NetUtil_16BitSumDataCalcAlign_32
+
+
+@********************************************************************************************************
+@                                     CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+        .code 32
+
+
+@********************************************************************************************************
+@                                 NetUtil_16BitSumDataCalcAlign_32()
+@
+@ Description : Calculate 16-bit sum on 32-bit word-aligned data.
+@
+@ Argument(s) : pdata_32    Pointer  to 32-bit word-aligned data (see Note #2).
+@
+@               size        Size of data.
+@
+@ Return(s)   : 16-bit sum (see Notes #1 & #3).
+@
+@ Caller(s)   : NetUtil_16BitSumDataCalc().
+@
+@               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+@               application function(s).
+@
+@ Note(s)     : (1) Computes the sum of consecutive 16-bit values.
+@
+@               (2) Since many word-aligned processors REQUIRE  that multi-octet words be located on word-
+@                   aligned addresses, sum calculation REQUIREs that 32-bit words are accessed on addresses
+@                   that are multiples of 4 octets.
+@
+@               (3) The 16-bit sum MUST be returned in Big Endian/Network order.
+@
+@                   See 'net_util.c  NetUtil_16BitSumDataCalc()  Note #5b'.
+@
+@                   (a) Assumes Little Endian CPU Mode (see 'net_util_a.s  Note #1') thus requiring the
+@                       16-bit octets of the 32-bit data to be swapped.
+@
+@                       #### However, the 16-bit octets COULD be swapped after the 16-bit sum is fully
+@                       calculated.
+@
+@               (4) (a) A "straightforward" assembly implementation would do the following for each
+@                       32-bit word:
+@
+@                       (1) Extract the lower  16-bit half-word from the 32-bit word.
+@                       (2) Swap    the lower  16-bit half-word's bytes.
+@                       (3) Add     the lower  16-bit half-word to the sum.
+@                       (4) Extract the higher 16-bit half-word from the 32-bit word.
+@                       (5) Swap    the higher 16-bit half-word's bytes.
+@                       (6) Add     the higher 16-bit half-word to the sum.
+@
+@                       If the initial 32-bit word were 0x11223344, then 0x2211 and 0x4433 would be the
+@                       two 16-bit half-words that eventually get added to the sum.
+@
+@                   (b) A faster assembly implementation which can accelerate this process would do the
+@                       following for each 32-bit word:
+@
+@                       (1) Rotate the 32-bit word right 8 bits.
+@                       (2) Extract the lower  16-bit half-word from the rotated 32-bit word.
+@                       (3) Add     the lower  16-bit half-word to the sum.
+@                       (4) Extract the higher 16-bit half-word from the rotated 32-bit word.
+@                       (5) Add     the higher 16-bit half-word to the sum.
+@
+@                       If the initial 32-bit word were 0x11223344, then 0x4411 and 0x2233 would be the
+@                       two 16-bit half-words that eventually get added to the sum.  Notice these
+@                       half-words are equal to those formed in the straightforward implementation with
+@                       the lower octets swapped.  Since the algorithm does not care about the order in
+@                       which the bytes are accumulated (only the position of the bytes), this does not
+@                       affect the outcome.
+@********************************************************************************************************
+@ CPU_INT32U  NetUtil_16BitSumDataCalcAlign_32 (void        *pdata_32,   @       ==>  R0
+@                                               CPU_INT32U   size)       @       ==>  R1
+@                                                                        @  sum  ==>  R2
+
+NetUtil_16BitSumDataCalcAlign_32:
+        STMFD       SP!, {R2-R12}
+
+        MOV         R2, #0
+        B           NetUtil_16BitSumDataCalcAlign_32_0
+
+NetUtil_16BitSumDataCalcAlign_32_1:
+        LDMIA       R0!, {R5-R12}                           @ Calc sum of sixteen 16-bit words ...
+                                                            @ ... using eight 32-bit CPU regs.
+
+        MOV         R3,  R5,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R6,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R7,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R8,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R9,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R10, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R11, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R12, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        SUB         R1, R1, #(4*8*1)
+
+NetUtil_16BitSumDataCalcAlign_32_0:
+        CMP         R1, #(4*8*1)                            @ end of loop
+        BCS         NetUtil_16BitSumDataCalcAlign_32_1
+
+        B           NetUtil_16BitSumDataCalcAlign_32_2
+
+
+
+NetUtil_16BitSumDataCalcAlign_32_3:
+        LDMIA       R0!, {R5}                               @ Calc sum of two 16-bit words ...
+                                                            @ ... using   one 32-bit CPU reg.
+
+        MOV         R3,  R5,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        SUB         R1, R1, #(4*1*1)
+
+NetUtil_16BitSumDataCalcAlign_32_2:
+
+        CMP         R1, #(4*1*1)                            @ end of loop
+        BCS         NetUtil_16BitSumDataCalcAlign_32_3
+
+        MOV         R0, R2
+        LDMFD       SP!, {R2-R12}
+        BX          LR                                      @ return
+
+
+       .ltorg
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM/IAR/net_util_a.asm b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM/IAR/net_util_a.asm
new file mode 100644
index 0000000..b6e0060
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM/IAR/net_util_a.asm
@@ -0,0 +1,200 @@
+;********************************************************************************************************
+;                                             uC/TCP-IP
+;                                      The Embedded TCP/IP Suite
+;
+;                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+;
+;                  All rights reserved.  Protected by international copyright laws.
+;
+;                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+;                  illegal to distribute this source code to any third party unless you receive
+;                  written permission by an authorized Micrium representative.  Knowledge of
+;                  the source code may NOT be used to develop a similar product.
+;
+;                  Please help us continue to provide the Embedded community with the finest
+;                  software available.  Your honesty is greatly appreciated.
+;
+;                  You can find our product's user manual, API reference, release notes and
+;                  more information at: https://doc.micrium.com
+;
+;                  You can contact us at: http://www.micrium.com
+;********************************************************************************************************
+
+;********************************************************************************************************
+;
+;                                       NETWORK UTILITY LIBRARY
+;
+;                                                ARM
+;                                            IAR Compiler
+;
+; Filename      : net_util_a.asm
+; Version       : V3.04.02
+; Programmer(s) : JDH
+;                 BAN
+;********************************************************************************************************
+; Note(s)       : (1) Assumes ARM CPU mode configured for Little Endian.
+;********************************************************************************************************
+
+
+;********************************************************************************************************
+;                                          PUBLIC FUNCTIONS
+;********************************************************************************************************
+
+        PUBLIC  NetUtil_16BitSumDataCalcAlign_32
+
+
+;********************************************************************************************************
+;                                     CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+        RSEG CODE:CODE:NOROOT(2)
+        CODE32
+
+
+;********************************************************************************************************
+;                                 NetUtil_16BitSumDataCalcAlign_32()
+;
+; Description : Calculate 16-bit sum on 32-bit word-aligned data.
+;
+; Argument(s) : pdata_32    Pointer  to 32-bit word-aligned data (see Note #2).
+;
+;               size        Size of data.
+;
+; Return(s)   : 16-bit sum (see Notes #1 & #3).
+;
+; Caller(s)   : NetUtil_16BitSumDataCalc().
+;
+;               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+;               application function(s).
+;
+; Note(s)     : (1) Computes the sum of consecutive 16-bit values.
+;
+;               (2) Since many word-aligned processors REQUIRE  that multi-octet words be located on word-
+;                   aligned addresses, sum calculation REQUIREs that 32-bit words are accessed on addresses
+;                   that are multiples of 4 octets.
+;
+;               (3) The 16-bit sum MUST be returned in Big Endian/Network order.
+;
+;                   See 'net_util.c  NetUtil_16BitSumDataCalc()  Note #5b'.
+;
+;                   (a) Assumes Little Endian CPU Mode (see 'net_util_a.asm  Note #1') thus requiring the
+;                       16-bit octets of the 32-bit data to be swapped.
+;
+;                       #### However, the 16-bit octets COULD be swapped after the 16-bit sum is fully
+;                       calculated.
+;
+;               (4) (a) A "straightforward" assembly implementation would do the following for each
+;                       32-bit word:
+;
+;                       (1) Extract the lower  16-bit half-word from the 32-bit word.
+;                       (2) Swap    the lower  16-bit half-word's bytes.
+;                       (3) Add     the lower  16-bit half-word to the sum.
+;                       (4) Extract the higher 16-bit half-word from the 32-bit word.
+;                       (5) Swap    the higher 16-bit half-word's bytes.
+;                       (6) Add     the higher 16-bit half-word to the sum.
+;
+;                       If the initial 32-bit word were 0x11223344, then 0x2211 and 0x4433 would be the
+;                       two 16-bit half-words that eventually get added to the sum.
+;
+;                   (b) A faster assembly implementation which can accelerate this process would do the
+;                       following for each 32-bit word:
+;
+;                       (1) Rotate the 32-bit word right 8 bits.
+;                       (2) Extract the lower  16-bit half-word from the rotated 32-bit word.
+;                       (3) Add     the lower  16-bit half-word to the sum.
+;                       (4) Extract the higher 16-bit half-word from the rotated 32-bit word.
+;                       (5) Add     the higher 16-bit half-word to the sum.
+;
+;                       If the initial 32-bit word were 0x11223344, then 0x4411 and 0x2233 would be the
+;                       two 16-bit half-words that eventually get added to the sum.  Notice these
+;                       half-words are equal to those formed in the straightforward implementation with
+;                       the lower octets swapped.  Since the algorithm does not care about the order in
+;                       which the bytes are accumulated (only the position of the bytes), this does not
+;                       affect the outcome.
+;********************************************************************************************************
+; CPU_INT32U  NetUtil_16BitSumDataCalcAlign_32 (void        *pdata_32,   @       ==>  R0
+;                                               CPU_INT32U   size)       @       ==>  R1
+;                                                                        @  sum  ==>  R2
+
+NetUtil_16BitSumDataCalcAlign_32:
+        STMFD       SP!, {R2-R12}
+
+        MOV         R2, #0
+        B           NetUtil_16BitSumDataCalcAlign_32_0
+
+NetUtil_16BitSumDataCalcAlign_32_1:
+        LDMIA       R0!, {R5-R12}                           ; Calc sum of sixteen 16-bit words ...
+                                                            ; ... using eight 32-bit CPU regs.
+        MOV         R3,  R5,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R6,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R7,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R8,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R9,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R10, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R11, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R12, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        SUB         R1, R1, #(4*8*1)
+
+NetUtil_16BitSumDataCalcAlign_32_0:
+        CMP         R1, #(4*8*1)                            ; end of loop
+        BCS         NetUtil_16BitSumDataCalcAlign_32_1
+
+        B           NetUtil_16BitSumDataCalcAlign_32_2
+
+
+
+NetUtil_16BitSumDataCalcAlign_32_3:
+        LDMIA       R0!, {R5}                               ; Calc sum of two 16-bit words ...
+                                                            ; ... using   one 32-bit CPU reg.
+
+        MOV         R3,  R5,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        SUB         R1, R1, #(4*1*1)
+
+NetUtil_16BitSumDataCalcAlign_32_2:
+
+        CMP         R1, #(4*1*1)                            ; end of loop
+        BCS         NetUtil_16BitSumDataCalcAlign_32_3
+
+        MOV         R0, R2
+        LDMFD       SP!, {R2-R12}
+        BX          LR                                      ; return
+
+
+        END
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM/RealView/net_util_a.asm b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM/RealView/net_util_a.asm
new file mode 100644
index 0000000..360a25e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/ARM/RealView/net_util_a.asm
@@ -0,0 +1,206 @@
+;********************************************************************************************************
+;                                             uC/TCP-IP
+;                                      The Embedded TCP/IP Suite
+;
+;                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+;
+;                  All rights reserved.  Protected by international copyright laws.
+;
+;                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+;                  illegal to distribute this source code to any third party unless you receive
+;                  written permission by an authorized Micrium representative.  Knowledge of
+;                  the source code may NOT be used to develop a similar product.
+;
+;                  Please help us continue to provide the Embedded community with the finest
+;                  software available.  Your honesty is greatly appreciated.
+;
+;                  You can find our product's user manual, API reference, release notes and
+;                  more information at: https://doc.micrium.com
+;
+;                  You can contact us at: http://www.micrium.com
+;********************************************************************************************************
+
+;********************************************************************************************************
+;
+;                                       NETWORK UTILITY LIBRARY
+;
+;                                                ARM
+;                                     RealView Development Suite
+;                            RealView Microcontroller Development Kit (MDK)
+;                                      ARM Developer Suite (ADS)
+;                                            Keil uVision
+;
+; Filename      : net_util_a.asm
+; Version       : V3.04.02
+; Programmer(s) : JDH
+;                 BAN
+;********************************************************************************************************
+; Note(s)       : (1) Assumes ARM CPU mode configured for Little Endian.
+;********************************************************************************************************
+
+
+;********************************************************************************************************
+;                                          PUBLIC FUNCTIONS
+;********************************************************************************************************
+
+        EXPORT  NetUtil_16BitSumDataCalcAlign_32
+
+
+;********************************************************************************************************
+;                                     CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+        AREA |.text|, CODE, READONLY, ALIGN=2
+        ARM
+        REQUIRE8
+        PRESERVE8
+
+
+;********************************************************************************************************
+;                                 NetUtil_16BitSumDataCalcAlign_32()
+;
+; Description : Calculate 16-bit sum on 32-bit word-aligned data.
+;
+; Argument(s) : pdata_32    Pointer  to 32-bit word-aligned data (see Note #2).
+;
+;               size        Size of data.
+;
+; Return(s)   : 16-bit sum (see Notes #1 & #3).
+;
+; Caller(s)   : NetUtil_16BitSumDataCalc().
+;
+;               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+;               application function(s).
+;
+; Note(s)     : (1) Computes the sum of consecutive 16-bit values.
+;
+;               (2) Since many word-aligned processors REQUIRE  that multi-octet words be located on word-
+;                   aligned addresses, sum calculation REQUIREs that 32-bit words are accessed on addresses
+;                   that are multiples of 4 octets.
+;
+;               (3) The 16-bit sum MUST be returned in Big Endian/Network order.
+;
+;                   See 'net_util.c  NetUtil_16BitSumDataCalc()  Note #5b'.
+;
+;                   (a) Assumes Little Endian CPU Mode (see 'net_util_a.asm  Note #1') thus requiring the
+;                       16-bit octets of the 32-bit data to be swapped.
+;
+;                       #### However, the 16-bit octets COULD be swapped after the 16-bit sum is fully
+;                       calculated.
+;
+;               (4) (a) A "straightforward" assembly implementation would do the following for each
+;                       32-bit word:
+;
+;                       (1) Extract the lower  16-bit half-word from the 32-bit word.
+;                       (2) Swap    the lower  16-bit half-word's bytes.
+;                       (3) Add     the lower  16-bit half-word to the sum.
+;                       (4) Extract the higher 16-bit half-word from the 32-bit word.
+;                       (5) Swap    the higher 16-bit half-word's bytes.
+;                       (6) Add     the higher 16-bit half-word to the sum.
+;
+;                       If the initial 32-bit word were 0x11223344, then 0x2211 and 0x4433 would be the
+;                       two 16-bit half-words that eventually get added to the sum.
+;
+;                   (b) A faster assembly implementation which can accelerate this process would do the
+;                       following for each 32-bit word:
+;
+;                       (1) Rotate the 32-bit word right 8 bits.
+;                       (2) Extract the lower  16-bit half-word from the rotated 32-bit word.
+;                       (3) Add     the lower  16-bit half-word to the sum.
+;                       (4) Extract the higher 16-bit half-word from the rotated 32-bit word.
+;                       (5) Add     the higher 16-bit half-word to the sum.
+;
+;                       If the initial 32-bit word were 0x11223344, then 0x4411 and 0x2233 would be the
+;                       two 16-bit half-words that eventually get added to the sum.  Notice these
+;                       half-words are equal to those formed in the straightforward implementation with
+;                       the lower octets swapped.  Since the algorithm does not care about the order in
+;                       which the bytes are accumulated (only the position of the bytes), this does not
+;                       affect the outcome.
+;********************************************************************************************************
+; CPU_INT32U  NetUtil_16BitSumDataCalcAlign_32 (void        *pdata_32,   @       ==>  R0
+;                                               CPU_INT32U   size)       @       ==>  R1
+;                                                                        @  sum  ==>  R2
+
+NetUtil_16BitSumDataCalcAlign_32
+        STMFD       SP!, {R2-R12}
+
+        MOV         R2, #0
+        B           NetUtil_16BitSumDataCalcAlign_32_0
+
+NetUtil_16BitSumDataCalcAlign_32_1
+        LDMIA       R0!, {R5-R12}                           ; Calc sum of sixteen 16-bit words ...
+                                                            ; ... using eight 32-bit CPU regs.
+
+        MOV         R3,  R5,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R6,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R7,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R8,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R9,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R10, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R11, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        MOV         R3,  R12, ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        SUB         R1, R1, #(4*8*1)
+
+NetUtil_16BitSumDataCalcAlign_32_0
+        CMP         R1, #(4*8*1)                            ; end of loop
+        BCS         NetUtil_16BitSumDataCalcAlign_32_1
+
+        B           NetUtil_16BitSumDataCalcAlign_32_2
+
+
+
+NetUtil_16BitSumDataCalcAlign_32_3
+        LDMIA       R0!, {R5}                               ; Calc sum of two 16-bit words ...
+                                                            ; ... using   one 32-bit CPU reg.
+
+        MOV         R3,  R5,  ROR #8
+        MOV         R4,  R3,  LSL #16
+        ADD         R2,  R2,  R4,  LSR #16
+        ADD         R2,  R2,  R3,  LSR #16
+
+        SUB         R1, R1, #(4*1*1)
+
+NetUtil_16BitSumDataCalcAlign_32_2
+
+        CMP         R1, #(4*1*1)                            ; end of loop
+        BCS         NetUtil_16BitSumDataCalcAlign_32_3
+
+        MOV         R0, R2
+        LDMFD       SP!, {R2-R12}
+        BX          LR                                      ; return
+
+
+        END
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/AVR32/UC3/GNU/net_util_a.asm b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/AVR32/UC3/GNU/net_util_a.asm
new file mode 100644
index 0000000..30e8a95
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Ports/AVR32/UC3/GNU/net_util_a.asm
@@ -0,0 +1,167 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK UTILITY LIBRARY
+*
+*                                              AVR32 UC3
+*                                            GNU Compiler
+*
+* Filename      : net_util_a.asm
+* Version       : V3.04.02
+* Programmer(s) : FGK
+*********************************************************************************************************
+* Note(s)       : (1) Assumes AVR32 CPU mode configured for Big Endian.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          PUBLIC FUNCTIONS
+*********************************************************************************************************
+*/
+
+        .global  NetUtil_16BitSumDataCalcAlign_32
+
+
+/*
+*********************************************************************************************************
+*                                     CODE GENERATION DIRECTIVES
+*********************************************************************************************************
+*/
+
+        .section .text, "ax"
+
+
+/*
+*********************************************************************************************************
+*                                 NetUtil_16BitSumDataCalcAlign_32()
+*
+* Description : Calculate 16-bit sum on 32-bit word-aligned data.
+*
+* Argument(s) : pdata_32    Pointer  to 32-bit word-aligned data (see Note #2).
+*
+*               size        Size of data.
+*
+* Return(s)   : 16-bit sum (see Notes #1 & #3).
+*
+* Caller(s)   : NetUtil_16BitSumDataCalc().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Computes the sum of consecutive 16-bit values.
+*
+*               (2) Since many word-aligned processors REQUIRE  that multi-octet words be located on word-
+*                   aligned addresses, sum calculation REQUIREs that 32-bit words are accessed on addresses
+*                   that are multiples of 4 octets.
+*
+*               (3) The 16-bit sum MUST be returned in Big Endian/Network order.
+*
+*                   See 'net_util.c  NetUtil_16BitSumDataCalc()  Note #5b'.
+*********************************************************************************************************
+*/
+/*
+CPU_INT32U  NetUtil_16BitSumDataCalcAlign_32 (void        *pdata_32,   @       ==>  R0
+                                              CPU_INT32U   size)       @       ==>  R1
+                                                                       @  sum  ==>  R2
+*/
+
+NetUtil_16BitSumDataCalcAlign_32:
+        PUSHM   R0-R7, LR
+
+        MOV     R10, 0
+        SUB     R11, 4*9
+        BRLT    NetUtil_16BitSumDataCalcAlign_32_Chk_Rem
+
+NetUtil_16BitSumDataCalcAlign_32_36:
+        LDM     R12++, R0-R8                                    /* Load nine 32-bit registers.                          */
+
+        BFEXTU  R9,  R0,   0, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R0,  16, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R1,   0, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R1,  16, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R2,   0, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R2,  16, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R3,   0, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R3,  16, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R4,   0, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R4,  16, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R5,   0, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R5,  16, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R6,   0, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R6,  16, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R7,   0, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R7,  16, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R8,   0, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R8,  16, 16
+        ADD     R10, R9
+
+        SUB     R11, 4*9
+        BRGE    NetUtil_16BitSumDataCalcAlign_32_36
+
+NetUtil_16BitSumDataCalcAlign_32_Chk_Rem:
+        NEG     R11
+        ADD     PC, PC, R11 << 2                                /* Jump to remaining position.                          */
+
+        NOP
+        NOP
+        NOP
+        NOP
+        NOP
+        NOP
+
+        .rept   8
+        LD.W    R0,  R12
+        SUB     R12, -4
+        BFEXTU  R9,  R0,   0, 16
+        ADD     R10, R9
+        BFEXTU  R9,  R0,  16, 16
+        ADD     R10, R9
+        .endr
+
+        MOV     R12, R10
+        POPM    R0-R7, PC
+
+        .end
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Secure/Mocana/net_secure_mocana.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Secure/Mocana/net_secure_mocana.c
new file mode 100644
index 0000000..d1a03a0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Secure/Mocana/net_secure_mocana.c
@@ -0,0 +1,1964 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     NETWORK SECURITY PORT LAYER
+*
+*                                            Mocana nanoSSL
+*
+* Filename      : net_secure_mocana.c
+* Version       : V3.04.02
+* Programmer(s) : SL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) Mocana nanoSSL V5.5
+*                     (b) uC/Clk V3.09
+*
+*                     See also 'net.h  Note #1'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_SECURE_MODULE
+#include  "net_secure_mocana.h"
+#include  "../../Source/net_cfg_net.h"
+#include  "../../Source/net_sock.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_SECURE_MOCANA_MODULE
+#ifdef   NET_SECURE_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+typedef  struct  net_secure_server_desc {
+    certStorePtr     CertStorePtr;
+    certDescriptor   CertDesc;
+} NET_SECURE_SERVER_DESC;
+
+
+typedef  struct  net_secure_client_desc {
+    CPU_CHAR                          *CommonNamePtr;
+    NET_SOCK_SECURE_UNTRUSTED_REASON   UntrustedReason;
+    NET_SOCK_SECURE_TRUST_FNCT         TrustCallBackFnctPtr;
+#ifdef __ENABLE_MOCANA_SSL_MUTUAL_AUTH_SUPPORT__
+    certStorePtr                       CertStorePtr;
+    certDescriptor                     CertDesc;
+    CPU_INT08U                        *KeyPtr;
+#endif
+} NET_SECURE_CLIENT_DESC;
+
+
+typedef  struct  net_secure_session {
+    sbyte4                 ConnInstance;
+    NET_SOCK_SECURE_TYPE   Type;
+    void                  *DescPtr;
+} NET_SECURE_SESSION;
+
+
+                                                                /* ---------------- NET SECURE POOLS ------------------ */
+typedef  struct  net_secure_mem_pools {
+    MEM_DYN_POOL                SessionPool;
+    MEM_DYN_POOL                ServerDescPool;
+    MEM_DYN_POOL                ClientDescPool;
+} NET_SECURE_MEM_POOLS;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  certDescriptor               CaCertDesc;
+static  CPU_INT08U                   CaBuf[NET_SECURE_CFG_MAX_CA_CERT_LEN];
+
+static  NET_SECURE_MEM_POOLS         NetSecure_Pools;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+           void                      NetSecure_MocanaFnctLog            (       sbyte4                          module,
+                                                                                sbyte4                          severity,
+                                                                                sbyte                          *msg);
+
+static     sbyte4                    NetSecure_CertificateStoreLookup   (sbyte4                    connectionInstance,
+                                                                         certDistinguishedName    *pLookupCertDN,
+                                                                         certDescriptor           *pReturnCert);
+
+static     sbyte4                    NetSecure_CertificateStoreVerify   (sbyte4                    connectionInstance,
+                                                                         ubyte                    *pCertificate,
+                                                                         ubyte4                    certificateLength,
+                                                                         sbyte4                    isSelfSigned);
+
+static     certDescriptor            NetSecure_CertKeyConvert            (const  CPU_INT08U                     *p_cert,
+                                                                                 CPU_SIZE_T                      cert_size,
+                                                                          const  CPU_INT08U                     *p_key,
+                                                                                 CPU_SIZE_T                      key_size,
+                                                                                 NET_SOCK_SECURE_CERT_KEY_FMT    fmt,
+                                                                                 NET_ERR                        *p_err);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     NETWORK SECURITY FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     NetSecure_CA_CertIntall()
+*
+* Description : Install certificate autority's certificate.
+*
+* Argument(s) : p_ca_cert       Pointer to CA certificate.
+*
+*               ca_cert_len     Certificate lenght.
+*
+*               fmt             Certificate format:
+*
+*                                   NET_SOCK_SECURE_CERT_KEY_FMT_PEM
+*                                   NET_SOCK_SECURE_CERT_KEY_FMT_DER
+*
+*               Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SECURE_ERR_NONE         Certificate   successfully installed.
+*                               NET_SECURE_ERR_INSTALL      Certificate installation   failed.
+*                               NET_SECURE_ERR_INVALID_FMT  Certificate has invalid format.
+*
+* Return(s)   : DEF_OK,
+*
+*               DEF_FAIL.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (1) Net_Secure_CA_CertIntall() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSecure_CA_CertIntall (const  void                 *p_ca_cert,
+                                             CPU_INT32U            ca_cert_len,
+                                             NET_SECURE_CERT_FMT   fmt,
+                                             NET_ERR              *p_err)
+{
+    CPU_BOOLEAN  rtn_val;
+    CPU_INT32S   rc;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE CERT LEN ----------------- */
+    if (ca_cert_len > NET_SECURE_CFG_MAX_CA_CERT_LEN) {
+       *p_err = NET_SECURE_ERR_INSTALL;
+        rtn_val = DEF_FAIL;
+        goto exit_fault;
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetSecure_CA_CertIntall, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         rtn_val = DEF_FAIL;
+         goto exit_fault;
+    }
+
+    Mem_Copy(CaBuf, p_ca_cert, ca_cert_len);
+
+    rc = LAST_ERROR;
+
+    switch (fmt) {
+        case NET_SOCK_SECURE_CERT_KEY_FMT_PEM:
+             rc = CA_MGMT_decodeCertificate(CaBuf, ca_cert_len, &CaCertDesc.pCertificate, &CaCertDesc.certLength);
+             if (rc != OK) {
+                *p_err = NET_SECURE_ERR_INSTALL;
+                 rtn_val = DEF_FAIL;
+                 goto exit;
+             }
+             break;
+
+
+        case NET_SOCK_SECURE_CERT_KEY_FMT_DER:
+             CaCertDesc.pCertificate = CaBuf;
+             CaCertDesc.certLength   = ca_cert_len;
+             break;
+
+
+        case NET_SOCK_SECURE_CERT_KEY_FMT_NONE:
+        default:
+            *p_err = NET_ERR_FAULT_NOT_SUPPORTED;
+             rtn_val = DEF_FAIL;
+             goto exit;
+    }
+
+   *p_err = NET_SECURE_ERR_NONE;
+
+exit:
+    Net_GlobalLockRelease();
+
+exit_fault:
+    return (rtn_val);
+}
+
+/*
+*********************************************************************************************************
+*                                            NetSecure_Log()
+*
+* Description : log the given string.
+*
+* Argument(s) : p_str   Pointer to string to log.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetSecure_Log (CPU_CHAR  *p_str)
+{
+
+    SSL_TRACE_DBG(((CPU_CHAR *)msg));
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSecure_ExtractCertDN()
+*
+* Description : Extract certificate distinguished name into a string.
+*
+* Argument(s) : p_buf       Pointer to string fill.
+*
+*               buf_len     Buffer lenght.
+*
+*               p_dn        Pointer to distinguished name.
+*
+* Return(s)   : DEF_OK,   all distinguished name data printed sucessfully.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if 0
+CPU_BOOLEAN  NetSecure_ExtractCertDN (CPU_CHAR               *p_buf,
+                                      CPU_INT32U              buf_len,
+                                      certDistinguishedName  *p_dn)
+{
+    CPU_CHAR               *p_str;
+    relativeDN             *p_relative_dn;
+    nameAttr               *p_name_attr;
+    CPU_INT32U              dn_ctr;
+    CPU_INT32U              item_ctr;
+    CPU_INT32U              len;
+    CPU_INT32U              rem_len;
+    CPU_BOOLEAN             wr_started;
+
+
+    p_str         = p_buf;
+    rem_len       = buf_len;
+    wr_started    = DEF_NO;
+
+    p_relative_dn = p_dn->pDistinguishedName;
+
+    for (dn_ctr = 0; dn_ctr< p_dn->dnCount; dn_ctr++) {
+        p_name_attr = p_relative_dn->pNameAttr;
+        for (item_ctr = 0; item_ctr < p_relative_dn->nameAttrCount; item_ctr++) {
+            if (wr_started == DEF_YES) {
+                len = DEF_MIN(rem_len, 4);
+                Str_Copy_N(p_str, " - ", len);
+                rem_len -= 4;
+                p_str   += 3;
+            }
+
+            if (p_name_attr->type == 19) {
+                len = DEF_MIN(rem_len, p_name_attr->valueLen);
+                if (len == 0) {
+                    return (DEF_FAIL);
+                }
+                Str_Copy_N(p_str, (CPU_CHAR *)p_name_attr->value, len);
+                rem_len -= (p_name_attr->valueLen);
+                p_str   += (p_name_attr->valueLen);
+               *p_str    =  ASCII_CHAR_NULL;
+                if (wr_started != DEF_YES) {
+                    wr_started  = DEF_YES;
+                }
+            }
+
+            p_name_attr++;
+        }
+
+        p_relative_dn++;
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          NetSecure_Init()
+*
+* Description : (1) Initialize security port :
+*
+*                   (a) Initialize security memory pools
+*                   (b) Initialize CA descriptors
+*                   (c) Initialize Mocana
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetSecure_Init (NET_ERR  *p_err)
+{
+    CPU_INT32S  rc;
+    LIB_ERR     err;
+
+
+    SSL_TRACE_DBG(("%s: Start\n", __FUNCTION__));
+
+
+    Mem_DynPoolCreate("SSL Session pool",
+                      &NetSecure_Pools.SessionPool,
+                       DEF_NULL,
+                       sizeof(NET_SECURE_SESSION),
+                       sizeof(CPU_ALIGN),
+                       0u,
+                       LIB_MEM_BLK_QTY_UNLIMITED,
+                      &err);
+    if (err != LIB_MEM_ERR_NONE) {
+        SSL_TRACE_DBG(("Mem_DynPoolCreate() returned an error"));
+        return;
+    }
+
+    Mem_DynPoolCreate("SSL Server Descriptor pool",
+                      &NetSecure_Pools.ServerDescPool,
+                       DEF_NULL,
+                       sizeof(NET_SECURE_SERVER_DESC),
+                       sizeof(CPU_ALIGN),
+                       0u,
+                       LIB_MEM_BLK_QTY_UNLIMITED,
+                      &err);
+    if (err != LIB_MEM_ERR_NONE) {
+        SSL_TRACE_DBG(("Mem_DynPoolCreate() returned an error"));
+        return;
+    }
+
+
+    Mem_DynPoolCreate("SSL Client Descriptor pool",
+                      &NetSecure_Pools.ClientDescPool,
+                       DEF_NULL,
+                       sizeof(NET_SECURE_SERVER_DESC),
+                       sizeof(CPU_ALIGN),
+                       0u,
+                       LIB_MEM_BLK_QTY_UNLIMITED,
+                      &err);
+    if (err != LIB_MEM_ERR_NONE) {
+        SSL_TRACE_DBG(("Mem_DynPoolCreate() returned an error"));
+        return;
+    }
+
+
+
+ #ifdef NET_SECURE_MODULE_EN
+                                                                /* Init CA desc.                                        */
+    CaCertDesc.pCertificate = NULL;
+    CaCertDesc.certLength   = 0;
+#endif
+
+                                                                /* Init Mocana nanoSSL.                                 */
+    rc = -1;
+    rc =  MOCANA_initMocana();
+    if (rc != OK) {
+        SSL_TRACE_DBG(("MOCANA_initMocana() returned an error"));
+       *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+        return;
+    }
+
+    MOCANA_initLog(NetSecure_MocanaFnctLog);
+
+    rc = SSL_init(NET_SECURE_CFG_MAX_NBR_SOCK_SERVER, NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT);
+    if (rc != OK) {
+        SSL_TRACE_DBG(("%s: %s returned: %s\n", __FUNCTION__, "SSL_init", MERROR_lookUpErrorCode((MSTATUS)rc)));
+       *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+        return;
+    }
+
+    SSL_sslSettings()->funcPtrCertificateStoreVerify = NetSecure_CertificateStoreVerify;
+    SSL_sslSettings()->funcPtrCertificateStoreLookup = NetSecure_CertificateStoreLookup;
+
+   *p_err = NET_SECURE_ERR_NONE;
+
+    SSL_TRACE_DBG(("%s: Normal exit\n", __FUNCTION__));
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetSecure_InitSession()
+*
+* Description : Initalize a new secure session.
+*
+* Argument(s) : p_sock      Pointer to the accepted/connected socket.
+*               ------      Argument checked in NetSock_CfgSecure(),
+*                                               NetSecure_SockAccept().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SECURE_ERR_NONE         Secure session     available.
+*                               NET_SECURE_ERR_NOT_AVAIL    Secure session NOT available.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgSecure().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetSecure_InitSession (NET_SOCK  *p_sock,
+                             NET_ERR   *p_err)
+{
+#ifdef   NET_SECURE_MODULE_EN
+    NET_SECURE_SESSION  *p_blk;
+    LIB_ERR              err;
+
+
+    SSL_TRACE_DBG(("%s: Start\n", __FUNCTION__));
+                                                                /* Get SSL session buf.                             */
+    p_blk = Mem_DynPoolBlkGet(&NetSecure_Pools.SessionPool, &err);
+    if (err != LIB_MEM_ERR_NONE) {
+       *p_err = NET_SECURE_ERR_NOT_AVAIL;
+        return;
+    }
+
+
+    p_blk->ConnInstance   = 0u;
+    p_blk->DescPtr        = DEF_NULL;
+    p_blk->Type           = NET_SOCK_SECURE_TYPE_NONE;
+    p_sock->SecureSession = p_blk;
+
+
+    SSL_TRACE_DBG(("%s: Normal exit\n", __FUNCTION__));
+
+   *p_err = NET_SECURE_ERR_NONE;
+#else
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_CfgSecureServerCertKeyBuf()
+*
+* Description : Configure server secure socket's certificate and key from buffers:
+*
+*
+* Argument(s) : p_sock         p_sock      Pointer to the server's socker to configure certificate and key.
+*               ------         Argument checked in NetSock_CfgSecure(),
+*                                                  NetSock_CfgSecureServerCertKeyInstall().
+*
+*               pbuf_cert       Pointer to the certificate         buffer to install.
+*
+*               buf_cert_size   Size    of the certificate         buffer to install.
+*
+*               pbuf_key        Pointer to the key                 buffer to install.
+*
+*               buf_key_size    Size    of the key                 buffer to install.
+*
+*               fmt             Format  of the certificate and key buffer to install.
+*
+*                                   NET_SECURE_INSTALL_FMT_PEM      Certificate and Key format is PEM.
+*                                   NET_SECURE_INSTALL_FMT_DER      Certificate and Key format is DER.
+*
+*               cert_chain      Certificate point to a chain of certificate.
+*
+*                                   DEF_YES     Certificate points to a chain  of certificate.
+*                                   DEF_NO      Certificate points to a single    certificate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                       Server socket's certificate and key successfully
+*                                                                           installed.
+*                               NET_SOCK_ERR_NULL_PTR                   Invalid pointer.
+*                               NET_SOCK_ERR_SECURE_FMT                 Invalid certificate and key format.
+*                               NET_SECURE_ERR_INSTALL                  Certificate and/or Key NOT successfully installed.
+*
+* Return(s)   : DEF_OK,   Server socket's certificate and key successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetSock_CfgSecureServerCertKeyInstall().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) NetSock_CfgSecureServerCertKeyBuf() is called by application function(s) & ... :
+*
+*                   (a) MUST be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSecure_SockCertKeyCfg (       NET_SOCK                       *p_sock,
+                                              NET_SOCK_SECURE_TYPE            sock_type,
+                                       const  CPU_INT08U                     *p_buf_cert,
+                                              CPU_SIZE_T                      buf_cert_size,
+                                       const  CPU_INT08U                     *p_buf_key,
+                                              CPU_SIZE_T                      buf_key_size,
+                                              NET_SOCK_SECURE_CERT_KEY_FMT    fmt,
+                                              CPU_BOOLEAN                     cert_chain,
+                                              NET_ERR                        *p_err)
+{
+    CPU_BOOLEAN               rtn_val = DEF_OK;
+#ifdef   NET_SECURE_MODULE_EN
+    CPU_INT32S                rc;
+    NET_SECURE_SESSION       *p_session;
+    NET_SECURE_SERVER_DESC   *p_server_desc;
+    NET_SECURE_CLIENT_DESC   *p_client_desc;
+    SizedBuffer               certificate;
+    certStorePtr             *p_store;
+    certDescriptor            cert_desc;
+    LIB_ERR                   err;
+
+
+
+    SSL_TRACE_DBG(("%s: Start\n", __FUNCTION__));
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ------------------- VALIDATE ARGS ------------------ */
+    if (buf_cert_size > NET_SECURE_CFG_MAX_CERT_LEN) {
+       *p_err = NET_SECURE_ERR_INSTALL;
+        return (DEF_FAIL);
+    }
+
+    if (buf_key_size > NET_SECURE_CFG_MAX_KEY_LEN) {
+       *p_err = NET_SECURE_ERR_INSTALL;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+    p_session = (NET_SECURE_SESSION *)p_sock->SecureSession;
+    if (p_session == DEF_NULL) {
+       *p_err = NET_SOCK_ERR_NULL_PTR;
+        return (DEF_FAIL);
+    }
+
+
+    cert_desc = NetSecure_CertKeyConvert(p_buf_cert, buf_cert_size, p_buf_key, buf_key_size, fmt, p_err);
+    if (*p_err != NET_SECURE_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    switch(sock_type) {
+        case NET_SOCK_SECURE_TYPE_SERVER:
+                                                                        /* Get SSL session buffer.                              */
+             if (p_session->DescPtr) {
+                *p_err = NET_SECURE_ERR_INSTALL;
+                 return (DEF_FAIL);
+             }
+
+             p_server_desc = Mem_DynPoolBlkGet(&NetSecure_Pools.ServerDescPool, &err);
+             if (err != LIB_MEM_ERR_NONE) {
+                *p_err = NET_SECURE_ERR_INSTALL;
+                 return (DEF_FAIL);
+             }
+
+
+
+             p_session->Type         =  NET_SOCK_SECURE_TYPE_SERVER;
+             p_session->DescPtr      =  p_server_desc;
+             p_store                 = &p_server_desc->CertStorePtr;
+             p_server_desc->CertDesc =  cert_desc;
+             break;
+
+
+        case NET_SOCK_SECURE_TYPE_CLIENT:
+#ifdef __ENABLE_MOCANA_SSL_MUTUAL_AUTH_SUPPORT__
+
+             p_client_desc = p_session->DescPtr;
+             if (p_client_desc == DEF_NULL) {
+                 p_client_desc = Mem_DynPoolBlkGet(&NetSecure_Pools.ClientDescPool, &err);
+                 if (err != LIB_MEM_ERR_NONE) {
+                    *p_err = NET_SECURE_ERR_INSTALL;
+                     return (DEF_FAIL);
+                 }
+             }
+
+             p_session->Type =  NET_SOCK_SECURE_TYPE_CLIENT;
+             p_store         = &p_client_desc->CertStorePtr;
+             break;
+#else
+            *p_err = NET_ERR_FAULT_FEATURE_DIS;
+             return (DEF_FAIL);
+#endif
+
+        default:
+            *p_err = NET_SECURE_ERR_INSTALL;
+             return (DEF_FAIL);
+    }
+
+
+    rc = CERT_STORE_createStore(p_store);
+    if (rc != OK) {
+        SSL_TRACE_DBG(("CERT_STORE_createStore() returned an error"));
+       *p_err = NET_SECURE_ERR_INSTALL;
+        return (DEF_FAIL);
+    }
+
+    certificate.length = cert_desc.certLength;
+    certificate.data   = cert_desc.pCertificate;
+    rc = CERT_STORE_addIdentityWithCertificateChain(*p_store, &certificate, 1, cert_desc.pKeyBlob, cert_desc.keyBlobLength);
+    if (rc != OK) {
+        SSL_TRACE_DBG(("CERT_STORE_addIdentityWithCertificateChain() returned an error"));
+       *p_err = NET_SECURE_ERR_INSTALL;
+        return (DEF_FAIL);
+    }
+
+   *p_err = NET_SECURE_ERR_NONE;
+    SSL_TRACE_DBG(("%s: Normal exit\n", __FUNCTION__));
+
+#else
+    rtn_val = DEF_FAIL;
+   *p_err   = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+    return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetSecure_SockServerCertKeyFiles()
+*
+* Description : Configure server secure socket's certificate and key from buffers:
+*
+*
+* Argument(s) : p_sock         p_sock      Pointer to the server's socker to configure certificate and key.
+*               ------         Argument checked in NetSock_CfgSecure(),
+*                                                  NetSock_CfgSecureServerCertKeyInstall().
+*
+*               pbuf_cert       Pointer to the certificate     buffer to install.
+*
+*               buf_cert_size   Size    of the certificate     buffer to install.
+*
+*               pbuf_key        Pointer to the key             buffer to install.
+*
+*               buf_key_size    Size    of the key             buffer to install.
+*
+*               fmt             Format  of the certificate and key buffer to install.
+*
+*                                   NET_SECURE_INSTALL_FMT_PEM      Certificate and Key format is PEM.
+*                                   NET_SECURE_INSTALL_FMT_DER      Certificate and Key format is DER.
+*
+*               cert_chain      Certificate point to a chain of certificate.
+*
+*                                   DEF_YES     Certificate points to a chain  of certificate.
+*                                   DEF_NO      Certificate points to a single    certificate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                       Server socket's certificate and key successfully
+*                                                                           installed.
+*                               NET_SOCK_ERR_NULL_PTR                   Invalid buffer pointer.
+*                               NET_SOCK_ERR_SECURE_FMT                 Invalid certificate and key format.
+*
+* Return(s)   : DEF_OK,   Server socket's certificate and key successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : none.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) NetSock_CfgSecureServerCertKeyBuf() is called by application function(s) & ... :
+*
+*                   (a) MUST be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+#if 0
+#if ((NET_SECURE_CFG_MAX_NBR_SOCK_SERVER >  0u)         && \
+     (NET_SECURE_CFG_FS_EN               == DEF_ENABLED))
+CPU_BOOLEAN  NetSecure_SockServerCertKeyFiles (       NET_SOCK                       *p_sock,
+                                               const  void                           *p_filename_cert,
+                                               const  void                           *p_filename_key,
+                                                      NET_SOCK_SECURE_CERT_KEY_FMT    fmt,
+                                                      CPU_BOOLEAN                     cert_chain,
+                                                      NET_ERR                        *p_err)
+{
+    CPU_INT32S               rc;
+    NET_SECURE_SESSION      *p_session;
+    NET_SECURE_SERVER_DESC  *p_server_desc;
+    ubyte                   *p_buf_cert;
+    ubyte                   *p_buf_key;
+    CPU_INT32U               buf_cert_len;
+    CPU_INT32U               buf_key_len;
+    CPU_BOOLEAN              rtn_val;
+
+
+    p_session = (NET_SECURE_SESSION *)p_sock->SecureSession;
+    if (p_session == DEF_NULL) {
+       *p_err = NET_SOCK_ERR_FAULT;
+        return (DEF_FAIL);
+    }
+
+    switch(p_session->Type) {
+        case NET_SECURE_SOCK_TYPE_UNKNOWN:
+        case NET_SECURE_SOCK_TYPE_SERVER:
+             break;
+
+
+        case NET_SECURE_SOCK_TYPE_CLIENT:
+        case NET_SECURE_SOCK_TYPE_ACCEPT:
+        default:
+            *p_err = NET_SECURE_ERR_INSTALL;
+             return (DEF_FAIL);
+    }
+
+    SSL_TRACE_DBG(("%s: Start\n", __FUNCTION__));
+
+    rc = MOCANA_readFile((sbyte const *)p_filename_cert, &p_buf_cert, &buf_cert_len);
+    if (rc != OK) {
+        SSL_TRACE_DBG(("%s: failed to read file %s\n",  __FUNCTION__, p_filename_cert));
+        return (DEF_FAIL);
+    }
+
+    rc = MOCANA_readFile((sbyte const *)p_filename_key, &p_buf_key, &buf_key_len);
+    if (rc != OK) {
+        MOCANA_freeReadFile(&p_buf_cert);
+        SSL_TRACE_DBG(("%s: failed to read file %s\n",  __FUNCTION__, p_filename_cert));
+        return (DEF_FAIL);
+    }
+
+
+    rtn_val = NetSecure_SockCertKeyCfg(p_sock,
+                                             p_buf_cert,
+                                             buf_cert_len,
+                                             p_buf_key,
+                                             buf_key_len,
+                                             fmt,
+                                             cert_chain,
+                                             p_err);
+
+
+    MOCANA_freeReadFile(&p_buf_cert);
+    MOCANA_freeReadFile(&p_buf_key);
+
+    return (rtn_val);
+}
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetSecure_ClientCommonNameSet()
+*
+* Description : Configure client secure socket's common name.
+*
+* Argument(s) : p_sock          Pointer to the client's socket to configure common name.
+*               ------          Argument checked in NetSock_CfgSecure(),
+*                                                   NetSock_CfgSecureClientCommonName().
+*
+*               p_common_name   Pointer to the common name.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Close notify alert successfully transmitted.
+*                               NET_SECURE_ERR_NULL_PTR         Secure session pointer is NULL.
+*                               NET_SECURE_ERR_NOT_AVAIL
+*
+* Return(s)   : DEF_OK,   Client socket's common name successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetSock_CfgSecureClientCommonName().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     :  (1) NetSecure_ClientCommonNameSet() is called by application function(s) & ... :
+*
+*                   (a) MUST be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+#if (NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT > 0)
+CPU_BOOLEAN  NetSecure_ClientCommonNameSet (NET_SOCK  *p_sock,
+                                            CPU_CHAR  *p_common_name,
+                                            NET_ERR   *p_err)
+{
+#ifdef   NET_SECURE_MODULE_EN
+    NET_SECURE_SESSION      *p_session;
+    NET_SECURE_CLIENT_DESC  *p_desc_client;
+    LIB_ERR                  err;
+
+
+    p_session = (NET_SECURE_SESSION *)p_sock->SecureSession;
+    if (p_session == DEF_NULL) {
+       *p_err = NET_SOCK_ERR_FAULT;
+        return (DEF_FAIL);
+    }
+
+    switch(p_session->Type) {
+        case NET_SOCK_SECURE_TYPE_NONE:
+                                                                /* Get client desc.                                     */
+             p_desc_client = (NET_SECURE_CLIENT_DESC *)Mem_DynPoolBlkGet(&NetSecure_Pools.ClientDescPool, &err);
+             if (err != LIB_MEM_ERR_NONE) {
+                 *p_err = NET_SECURE_ERR_NOT_AVAIL;
+                  return (DEF_FAIL);
+             }
+             p_session->DescPtr = p_desc_client;
+             p_session->Type    = NET_SOCK_SECURE_TYPE_CLIENT;
+             break;
+
+
+        case NET_SOCK_SECURE_TYPE_CLIENT:
+             if (p_session->DescPtr == DEF_NULL) {
+                *p_err = NET_SECURE_ERR_INSTALL;
+                 return (DEF_FAIL);
+             }
+
+             p_desc_client = (NET_SECURE_CLIENT_DESC *)p_session->DescPtr;
+             break;
+
+
+        case NET_SOCK_SECURE_TYPE_SERVER:
+        default:
+            *p_err = NET_SECURE_ERR_INSTALL;
+             return (DEF_FAIL);
+    }
+
+    p_desc_client->CommonNamePtr = p_common_name;
+
+   *p_err = NET_SECURE_ERR_NONE;
+
+    return (DEF_OK);
+
+#else
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+    return (DEF_FAIL);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetSecure_ClientTrustCallBackSet()
+*
+* Description : Configure client secure socket's trust callback function.
+*
+* Argument(s) : p_sock              Pointer to the client's socket to configure trust call back function.
+*               ------              Argument checked in NetSock_CfgSecure(),
+*                                                       NetSock_CfgSecureClientTrustCallBack().
+*
+*               p_callback_fnct     Pointer to the trust call back function
+*               ---------------     Argument checked in NetSock_CfgSecureClientTrustCallBack(),
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Close notify alert successfully transmitted.
+*                               NET_SECURE_ERR_NULL_PTR         Secure session pointer is NULL.
+*
+* Return(s)   : DEF_OK,   Client socket's trust call back function successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetSock_CfgSecureClientTrustCallBack().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     :  (1) NetSecure_ClientTrustCallBackSet() is called by application function(s) & ... :
+*
+*                   (a) MUST be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+#if (NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT > 0)
+CPU_BOOLEAN  NetSecure_ClientTrustCallBackSet (NET_SOCK                    *p_sock,
+                                               NET_SOCK_SECURE_TRUST_FNCT   p_callback_fnct,
+                                               NET_ERR                     *p_err)
+{
+#ifdef   NET_SECURE_MODULE_EN
+    NET_SECURE_SESSION      *p_session;
+    NET_SECURE_CLIENT_DESC  *p_desc_client;
+    LIB_ERR                  err;
+
+
+    p_session = (NET_SECURE_SESSION *)p_sock->SecureSession;
+    if (p_session == DEF_NULL) {
+       *p_err = NET_SOCK_ERR_FAULT;
+        return (DEF_FAIL);
+    }
+
+    switch(p_session->Type) {
+        case NET_SOCK_SECURE_TYPE_NONE:
+                                                                        /* Get SSL session buffer.                              */
+             p_desc_client = (NET_SECURE_CLIENT_DESC *)Mem_DynPoolBlkGet(&NetSecure_Pools.ClientDescPool, &err);
+             if (err != LIB_MEM_ERR_NONE) {
+                 *p_err = NET_SECURE_ERR_NOT_AVAIL;
+                  return (DEF_FAIL);
+             }
+
+             p_session->Type = NET_SOCK_SECURE_TYPE_CLIENT;
+             break;
+
+
+        case NET_SOCK_SECURE_TYPE_CLIENT:
+             if (p_session->DescPtr == DEF_NULL) {
+                *p_err = NET_SECURE_ERR_INSTALL;
+                 return (DEF_FAIL);
+             }
+
+             p_desc_client = (NET_SECURE_CLIENT_DESC *)p_session->DescPtr;
+             break;
+
+
+        case NET_SOCK_SECURE_TYPE_SERVER:
+        default:
+            *p_err = NET_SECURE_ERR_INSTALL;
+             return (DEF_FAIL);
+    }
+
+    p_desc_client->TrustCallBackFnctPtr = p_callback_fnct;
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+    return (DEF_OK);
+
+#else
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+    return (DEF_FAIL);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetSecure_SockConn()
+*
+* Description : (1) Connect a socket to a remote host through an encryted SSL handshake :
+*
+*                   (a) Get & validate the SSL session of the connected socket
+*                   (b) Initialize the     SSL connect.
+*                   (c) Perform            SSL handshake.
+*
+*
+* Argument(s) : p_sock      Pointer to a connected socket.
+*               ------      Argument checked in NetSock_Conn().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Secure socket     successfully connected.
+*                               NET_SECURE_ERR_HANDSHAKE        Secure socket NOT successfully connected.
+*                               NET_SECURE_ERR_NULL_PTR         Secure session pointer is NULL.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Conn().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetSecure_SockConn (NET_SOCK  *p_sock,
+                          NET_ERR   *p_err)
+{
+#ifdef   NET_SECURE_MODULE_EN
+#ifdef __ENABLE_MOCANA_SSL_CLIENT__
+          CPU_INT32S               rc;
+          NET_SECURE_SESSION      *p_session;
+          NET_SECURE_CLIENT_DESC  *p_client_desc;
+    const sbyte                   *p_common_name;
+
+
+                                                                /* Get & validate SSL session of the connected sock.    */
+    p_session = (NET_SECURE_SESSION *)p_sock->SecureSession;
+    if (p_session->Type == NET_SOCK_SECURE_TYPE_CLIENT) {
+        p_client_desc = (NET_SECURE_CLIENT_DESC *)p_session->DescPtr;
+    }
+
+    if (p_client_desc != DEF_NULL) {
+        p_common_name = (const sbyte *)p_client_desc->CommonNamePtr;
+    } else {
+        p_common_name = (const sbyte *)DEF_NULL;
+    }
+
+    p_session->Type = NET_SOCK_SECURE_TYPE_CLIENT;
+
+
+
+
+                                                                /* Init SSL connect.                                    */
+                                                                /* Save the whole NET_SOCK because some NetOS ...       */
+                                                                /* ... functions require it.                            */
+    Net_GlobalLockRelease();
+    p_session->ConnInstance = SSL_connect(p_sock->ID,
+                                          0,
+                                          NULL,
+                                          NULL,
+                                          p_common_name);
+    Net_GlobalLockAcquire((void *)&NetSecure_SockConn, p_err);
+    if (p_session->ConnInstance < 0) {
+        SSL_TRACE_DBG(("%s: %s returned: %s\n", __FUNCTION__, "SSL_Connect", MERROR_lookUpErrorCode((MSTATUS)p_session->ConnInstance )));
+       *p_err = NET_SECURE_ERR_HANDSHAKE;
+        goto exit;
+    }
+
+#ifdef  __ENABLE_MOCANA_SSL_MUTUAL_AUTH_SUPPORT__
+    if (p_client_desc->CertStorePtr != DEF_NULL) {
+        SSL_assignCertificateStore(p_session->ConnInstance, p_client_desc->CertStorePtr);
+    }
+#endif
+
+
+                                                            /* Perform SSL handshake.                                   */
+    rc = -1;
+    Net_GlobalLockRelease();
+    rc = SSL_negotiateConnection(p_session->ConnInstance);
+    Net_GlobalLockAcquire((void *)&NetSecure_SockConn, p_err);
+    if (rc != OK) {
+        SSL_TRACE_DBG(("%s: %s returned: %s\n", __FUNCTION__, "SSL_negotiateConnection", MERROR_lookUpErrorCode((MSTATUS)rc)));
+       *p_err  = NET_SECURE_ERR_HANDSHAKE;
+        goto exit;
+    }
+
+    SSL_TRACE_DBG(("%s: Normal exit\n", __FUNCTION__));
+
+   *p_err = NET_SOCK_ERR_NONE;
+    goto exit;
+
+#else
+
+    *p_err = NET_SECURE_ERR_HANDSHAKE;                          /* Mocana code not compiled with SSL client support.    */
+     goto exit;
+#endif
+#else
+    *p_err = NET_ERR_FAULT_FEATURE_DIS;
+     goto exit;
+#endif
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetSecure_SockAccept()
+*
+* Description : (1) Return a new secure socket accepted from a listen socket :
+*
+*                   (a) Get & validate SSL session of listening socket
+*                   (b) Initialize     SSL session of accepted  socket              See Note #2
+*                   (c) Initialize     SSL accept
+*                   (d) Perform        SSL handshake
+*
+*
+* Argument(s) : p_sock_listen   Pointer to a listening socket.
+*               -------------   Argument validated in NetSock_Accept().
+*
+*               p_sock_accept   Pointer to an accepted socket.
+*               -------------   Argument checked   in NetSock_Accept().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Secure socket      successfully accepted.
+*                               NET_SECURE_ERR_HANDSHAKE        Secure socket  NOT successfully accepted.
+*                               NET_SECURE_ERR_NULL_PTR         Secure session pointer is NULL.
+*                               NET_SECURE_ERR_NOT_AVAIL        Secure session NOT available.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Accept().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) The SSL session of the listening socket has already been validated.  The session
+*                   pointer of the accepted socket is also assumed to be valid.
+*
+*               (3) The listening SSL session is not initialized with the context information.  Then,
+*                   the quiet shutdown option SHOULD be set to avoid trying to send encrypted data on
+*                   the listening session.
+*********************************************************************************************************
+*/
+
+void  NetSecure_SockAccept (NET_SOCK  *p_sock_listen,
+                            NET_SOCK  *p_sock_accept,
+                            NET_ERR   *p_err)
+
+{
+#ifdef   NET_SECURE_MODULE_EN
+#ifdef __ENABLE_MOCANA_SSL_SERVER__
+    CPU_INT32S               rc;
+    NET_SECURE_SESSION      *p_session_listen;
+    NET_SECURE_SESSION      *p_session_accept;
+    NET_SECURE_SERVER_DESC  *p_server_desc;
+    NET_ERR                  err;
+
+
+
+                                                                /* Get & validate SSL session of listening sock.        */
+    p_session_listen = (NET_SECURE_SESSION *)p_sock_listen->SecureSession;
+    if (p_session_listen->Type != NET_SOCK_SECURE_TYPE_SERVER) {
+       *p_err  = NET_ERR_INVALID_TYPE;
+        goto exit;
+    }
+
+    p_server_desc = (NET_SECURE_SERVER_DESC *)p_session_listen->DescPtr;
+    if (p_server_desc == DEF_NULL) {
+       *p_err  = NET_ERR_INVALID_STATE;
+        goto exit;
+    }
+
+    rc = -1;
+    SSL_TRACE_DBG(("%s: Start\n", __FUNCTION__));
+
+
+                                                                /* Initialize SSL session of accepted sock.             */
+    NetSecure_InitSession(p_sock_accept, p_err);
+    if (*p_err != NET_SECURE_ERR_NONE) {
+         SSL_TRACE_DBG(("Error: NO session available\n"));
+        *p_err  = NET_SECURE_ERR_NOT_AVAIL;
+         goto exit;
+    }
+
+
+    p_session_accept       = (NET_SECURE_SESSION *)p_sock_accept->SecureSession;
+    p_session_accept->Type =  NET_SOCK_SECURE_TYPE_SERVER;
+
+                                                                /* Init SSL accept.                                     */
+                                                                /* Save the whole NET_SOCK because some NetOS ...       */
+                                                                /* ... functions require it.                            */
+    p_session_accept->ConnInstance = SSL_acceptConnection((sbyte4)p_sock_accept->ID);
+    if (p_session_accept->ConnInstance < 0) {
+        SSL_TRACE_INFO(("%s: %s returned: %s\n", __FUNCTION__, "SSL_acceptConnection",
+                         MERROR_lookUpErrorCode((MSTATUS)p_session_accept->ConnInstance)));
+       *p_err = NET_SECURE_ERR_NOT_AVAIL;
+        goto exit;
+    } else {
+        SSL_TRACE_DBG(("SSL_acceptConnection() accepted connection: ConnInstance = %d\n", p_session_accept->ConnInstance));
+    }
+
+
+    rc = SSL_assignCertificateStore(p_session_accept->ConnInstance, p_server_desc->CertStorePtr);
+    if (rc != OK) {
+        SSL_TRACE_INFO(("%s: %s returned: %s\n", __FUNCTION__, "SSL_assignCertificateStore",
+                         MERROR_lookUpErrorCode((MSTATUS)p_session_accept->ConnInstance)));
+        goto exit;
+    }
+
+#ifdef __ENABLE_MOCANA_SSL_MUTUAL_AUTH_SUPPORT__
+    rc = SSL_setSessionFlags(p_session_accept->ConnInstance, SSL_FLAG_NO_MUTUAL_AUTH_REQUEST);
+    if (rc != OK) {
+        SSL_TRACE_INFO(("%s: %s returned: %s\n", __FUNCTION__, "SSL_setSessionFlags",
+                         MERROR_lookUpErrorCode((MSTATUS)p_session_accept->ConnInstance)));
+        goto exit;
+    }
+#endif
+
+    Net_GlobalLockRelease();
+                                                                /* Perform SSL handshake.                               */
+    rc = SSL_negotiateConnection(p_session_accept->ConnInstance);
+    Net_GlobalLockAcquire((void *)&NetSecure_SockAccept, &err);
+    if (rc != OK) {
+        NetSecure_SockClose(p_sock_accept, p_err);
+        SSL_TRACE_INFO(("%s: %s returned: %s\n", __FUNCTION__, "SSL_negotiateConnection", MERROR_lookUpErrorCode((MSTATUS)rc)));
+       *p_err  = NET_SECURE_ERR_HANDSHAKE;
+        goto exit;
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+    SSL_TRACE_DBG(("%s: Normal exit\n", __FUNCTION__));
+    goto exit;
+
+exit:
+    return;
+
+#else
+
+   *p_err = NET_SECURE_ERR_NOT_AVAIL;                           /* Mocana code not compiled with SSL server support.    */
+
+#endif
+#else
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetSecure_SockRxDataHandler()
+*
+* Description : Receive clear data through a secure socket :
+*
+*                   (a) Get & validate the SSL session of the receiving socket
+*                   (b) Receive the data
+*
+*
+* Argument(s) : p_sock          Pointer to a receive socket.
+*               ------          Argument checked in NetSock_RxDataHandler().
+*
+*               p_data_buf      Pointer to an application data buffer that will receive the socket's
+*               ----------         received data.
+*
+*                               Argument checked in NetSock_RxDataHandler().
+*
+*               data_buf_len    Size of the   application data buffer (in octets).
+*               ------------    Argument checked in NetSock_RxDataHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Clear data successfully received.
+*                               NET_SOCK_ERR_RX_Q_CLOSED        Socket receive queue closed.
+*
+*                               NET_SECURE_ERR_NULL_PTR         Secure session pointer is NULL.
+*                               NET_ERR_RX                      Receive error.
+*
+* Return(s)   : Number of positive data octets received, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_RX,                         otherwise.
+*
+* Caller(s)   : NetSock_RxDataHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSecure_SockRxDataHandler (NET_SOCK    *p_sock,
+                                                void        *p_data_buf,
+                                                CPU_INT16U   data_buf_len,
+                                                NET_ERR     *p_err)
+{
+#ifdef   NET_SECURE_MODULE_EN
+    NET_SECURE_SESSION  *p_session;
+    CPU_INT32S           rxd;
+    CPU_INT32S           rc;
+
+
+    rxd = 0;
+    rc = -1;
+
+    SSL_TRACE_DBG(("%s: Start\n", __FUNCTION__));
+
+
+
+    p_session = (NET_SECURE_SESSION *)p_sock->SecureSession;
+
+    Net_GlobalLockRelease();
+    rc = SSL_recv(          p_session->ConnInstance,
+                            p_data_buf,
+                            data_buf_len,
+                 (sbyte4 *)&rxd,
+                            0);
+    Net_GlobalLockAcquire((void *)&NetSecure_SockRxDataHandler, p_err);
+    if (OK != rc) {
+        if (ERR_TCP_SOCKET_CLOSED == rc) {
+           *p_err = NET_SOCK_ERR_CLOSED;
+            return NET_SOCK_BSD_RTN_CODE_CONN_CLOSED;
+        } else {
+            SSL_TRACE_DBG(("%s: %s returned: %s\n", __FUNCTION__, "SSL_recv", MERROR_lookUpErrorCode((MSTATUS)rc)));
+           *p_err = NET_ERR_RX;
+            return NET_SOCK_BSD_ERR_RX;
+        }
+    }
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+    SSL_TRACE_DBG(("%s: Normal exit\n", __FUNCTION__));
+
+    return (rxd);                                               /* if successful return the number of bytes read.       */
+
+#else
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+    return (0u);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetSecure_SockRxIsDataPending()
+*
+* Description : Is data pending in SSL receive queue.
+*
+* Argument(s) : p_sock  Pointer to a receive socket.
+*               ------  Argument checked in NetSock_IsAvailRxStream().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Return values is valid.
+*                               NET_SOCK_ERR_FAULT              Fault.
+*
+* Return(s)   : DEF_YES, If data is pending.
+*
+*               DEF_NO,  Otherwise
+*
+* Caller(s)   : NetSock_IsAvailRxStream().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+CPU_BOOLEAN  NetSecure_SockRxIsDataPending (NET_SOCK  *p_sock,
+                                            NET_ERR   *p_err)
+{
+    sbyte4               pending = DEF_NO;
+    sbyte4               status;
+    NET_SECURE_SESSION  *p_session;
+
+
+
+    p_session = (NET_SECURE_SESSION *)p_sock->SecureSession;
+    if (p_session == DEF_NULL) {
+       *p_err = NET_SOCK_ERR_FAULT;
+        goto exit;
+    }
+
+    status = SSL_recvPending(p_session->ConnInstance, &pending);
+    if (status != OK) {
+       *p_err = NET_SOCK_ERR_FAULT;
+        goto exit;
+    }
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+exit:
+    return ((CPU_BOOLEAN)pending);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetSecure_SockTxDataHandler()
+*
+* Description : Transmit clear data through a secure socket :
+*
+*                   (a) Get & validate the SSL session of the transmitting socket
+*                   (b) Transmit the data
+*
+*
+* Argument(s) : p_sock          Pointer to a transmit socket.
+*               ------          Argument checked in NetSock_TxDataHandler().
+*
+*               p_data_buf      Pointer to application data to transmit.
+*               ----------      Argument checked in NetSock_TxDataHandler().
+*
+*               data_buf_len    Length of  application data to transmit (in octets).
+*               ------------    Argument checked in NetSock_TxDataHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Clear data   successfully transmitted.
+*                               NET_SECURE_ERR_NULL_PTR         Secure session pointer is NULL.
+*                               NET_ERR_TX                      Transmit error.
+*
+* Return(s)   : Number of positive data octets transmitted, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_RX,                            otherwise.
+*
+* Caller(s)   : NetSock_TxDataHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSecure_SockTxDataHandler (NET_SOCK    *p_sock,
+                                                void        *p_data_buf,
+                                                CPU_INT16U   data_buf_len,
+                                                NET_ERR     *p_err)
+{
+#ifdef   NET_SECURE_MODULE_EN
+    NET_SECURE_SESSION  *p_session;
+    sbyte4               rc = -1;
+
+    SSL_TRACE_DBG(("%s: Start\n", __FUNCTION__));
+
+    p_session    = (NET_SECURE_SESSION *)p_sock->SecureSession;
+    Net_GlobalLockRelease();
+    rc = SSL_send(p_session->ConnInstance, p_data_buf, data_buf_len);
+    Net_GlobalLockAcquire((void *)&NetSecure_SockTxDataHandler, p_err);
+    if (0 > rc) {
+        SSL_TRACE_DBG(("%s: %s returned: %s\n", __FUNCTION__, "SSL_send", MERROR_lookUpErrorCode((MSTATUS)rc)));
+        *p_err = NET_ERR_TX;
+        return NET_SOCK_BSD_ERR_RX;
+    }
+
+    *p_err = NET_SOCK_ERR_NONE;
+
+    SSL_TRACE_DBG(("%s: Normal exit\n", __FUNCTION__));
+
+    return rc;
+#else
+    *p_err = NET_ERR_FAULT_FEATURE_DIS;
+     return (-1);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetSecure_SockClose()
+*
+* Description : (1) Close the secure socket :
+*
+*                   (a) Get & validate the SSL session of the socket to close
+*                   (b) Transmit close notify alert to the peer
+*                   (c) Free the SSL session buffer
+*
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument checked in NetSock_Close().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Secure session successfully closed.
+*                               NET_SECURE_ERR_NULL_PTR         Secure session pointer is NULL.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CloseSockHandler(),
+*               NetSecure_SockCloseNotify().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetSecure_SockClose (NET_SOCK  *p_sock,
+                           NET_ERR   *p_err)
+{
+#ifdef   NET_SECURE_MODULE_EN
+    sbyte4                   status;
+    NET_SECURE_SESSION      *p_session;
+    NET_SECURE_SERVER_DESC  *p_server_desc;
+    NET_SECURE_CLIENT_DESC  *p_client_desc;
+    LIB_ERR                  err;
+
+
+    SSL_TRACE_DBG(("%s: Start\n", __FUNCTION__));
+
+    p_session = (NET_SECURE_SESSION *)p_sock->SecureSession;
+
+    if (p_session != DEF_NULL) {
+        SSL_TRACE_DBG(("SSL_closeConnection: ConnInstance = %d\n", p_session->ConnInstance));
+        status = SSL_closeConnection(p_session->ConnInstance);
+        if (status != OK) {
+            SSL_TRACE_DBG(("SSL_closeConnection return error: %s\n", MERROR_lookUpErrorCode((MSTATUS)status)));
+        }
+
+        if (p_session->DescPtr != DEF_NULL) {
+            switch (p_session->Type) {
+                case NET_SOCK_SECURE_TYPE_SERVER:
+                     p_server_desc = (NET_SECURE_SERVER_DESC *)p_session->DescPtr;
+
+                     CA_MGMT_freeKeyBlob(&p_server_desc->CertDesc.pKeyBlob);
+                     CA_MGMT_freeCertificate(&p_server_desc->CertDesc);
+                     CERT_STORE_releaseStore(&p_server_desc->CertStorePtr);
+
+                     Mem_DynPoolBlkFree(&NetSecure_Pools.ServerDescPool, p_server_desc, &err);
+                     if (err != LIB_MEM_ERR_NONE) {
+                         SSL_TRACE_DBG(("Mem_DynPoolBlkFree() returned an error:\n"));
+                     }
+                     break;
+
+
+                case NET_SOCK_SECURE_TYPE_CLIENT:
+                     p_client_desc = (NET_SECURE_CLIENT_DESC *)p_session->DescPtr;
+
+#ifdef __ENABLE_MOCANA_SSL_MUTUAL_AUTH_SUPPORT__
+
+                     if (p_client_desc->CertDesc.pKeyBlob != DEF_NULL) {
+                         CA_MGMT_freeKeyBlob(&p_client_desc->CertDesc.pKeyBlob);
+                     }
+
+                     if (p_client_desc->CertDesc.pCertificate != DEF_NULL) {
+                         CA_MGMT_freeCertificate(&p_client_desc->CertDesc);
+                     }
+
+                     if (p_client_desc->CertStorePtr != DEF_NULL) {
+                         CERT_STORE_releaseStore(&p_client_desc->CertStorePtr);
+                     }
+#endif
+
+                     Mem_DynPoolBlkFree(&NetSecure_Pools.ClientDescPool, p_client_desc, &err);
+                     if (err != LIB_MEM_ERR_NONE) {
+                         SSL_TRACE_DBG(("Mem_DynPoolBlkFree() returned an error:\n"));
+                     }
+                     break;
+
+
+                case NET_SOCK_SECURE_TYPE_NONE:
+                default:
+                     break;
+            }
+        }
+
+        Mem_DynPoolBlkFree(&NetSecure_Pools.SessionPool, p_sock->SecureSession, &err);
+        if (err != LIB_MEM_ERR_NONE) {
+            SSL_TRACE_DBG(("Mem_DynPoolBlkFree() returned an error:\n"));
+        }
+    }
+
+    p_sock->SecureSession = DEF_NULL;
+
+    SSL_TRACE_DBG(("%s: Normal exit\n", __FUNCTION__));
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+#else
+   *p_err = NET_ERR_FAULT_FEATURE_DIS;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSecure_SockCloseNotify()
+*
+* Description : Transmit the close notify alert to the peer through a SSL session.
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument checked in NetSock_Close().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Close notify alert successfully transmitted.
+*                               NET_SECURE_ERR_NULL_PTR         Secure session pointer is NULL.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Close(),
+*               NetSecure_SockClose().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) If the server decides to close the connection, it SHOULD send a close notify
+*                   alert to the connected peer prior to perform the socket close operations.
+*
+*               (2) (a) This function will be called twice during a socket close process but the
+*                       close notify alert will only transmitted during the first call.
+*
+*                   (b) The error code that might me returned by 'SSL_shutdown()' is ignored because the
+*                       connection can be closed by the client. In that case, the SSL session will no
+*                       longer be valid and it will be impossible to send the close notify alert through
+*                       that session.
+*********************************************************************************************************
+*/
+
+void  NetSecure_SockCloseNotify (NET_SOCK  *p_sock,
+                                 NET_ERR   *p_err)
+{
+    SSL_TRACE_DBG(("%s: Start\n", __FUNCTION__));
+
+    NetSecure_SockClose(p_sock, p_err);
+
+    SSL_TRACE_DBG(("%s: Normal exit\n", __FUNCTION__));
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      MOCANA CERTIFICATE CALLBACK FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     NetSecure_MocanaFnctLog()
+*
+* Description : Mocana log call back function.
+*
+* Argument(s) : module      Mocana module.
+*
+*               severity    Error severity level.
+*
+*               p_msg       Error message to log.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetSecure_MocanaFnctLog (sbyte4   module,
+                               sbyte4   severity,
+                               sbyte   *p_msg)
+{
+    SSL_TRACE_DBG(((CPU_CHAR *)p_msg));
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSecure_CertificateStoreVerify()
+*
+* Description : Verify certificate in store.
+*
+* Argument(s) : connectionInstance  SSL connection instance.
+*
+*               p_cert              Pointer to the certificate to valid
+*
+*               cert_len            Certificate lenght.
+*
+*               isSelfSigned        Certificate is self self signed
+*
+* Return(s)   : OK, if certificate is trusted.
+*
+*               -1, otherwise.
+*
+* Caller(s)   : various Mocana function
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+static  sbyte4  NetSecure_CertificateStoreVerify (sbyte4   conn_instance,
+                                                  ubyte   *p_cert,
+                                                  ubyte4   cert_len,
+                                                  sbyte4   isSelfSigned)
+{
+#ifdef   NET_SECURE_MODULE_EN
+    NET_SOCK                *p_sock = DEF_NULL;
+    NET_SECURE_SESSION      *p_session;
+    NET_SECURE_CLIENT_DESC  *p_client_desc;
+    certDistinguishedName    dn;
+    CPU_BOOLEAN              trusted;
+    CPU_BOOLEAN              result;
+    sbyte4                   sock_id;
+    sbyte4                   status;
+
+
+    status = SSL_getSocketId(conn_instance, &sock_id);
+    if (status != OK) {
+        return (status);
+    }
+
+    status = -1;
+
+    p_sock = NetSock_GetObj(sock_id);
+    if (p_sock == DEF_NULL) {
+        return (status);
+    }
+
+    p_session = (NET_SECURE_SESSION *)p_sock->SecureSession;
+    if (p_session->Type != NET_SOCK_SECURE_TYPE_CLIENT) {
+        return (status);
+    }
+
+    if (isSelfSigned == DEF_YES) {
+        p_client_desc = (NET_SECURE_CLIENT_DESC *)p_session->DescPtr;
+        if (p_client_desc->TrustCallBackFnctPtr != DEF_NULL) {
+            status = CA_MGMT_extractCertDistinguishedName (p_cert, cert_len, FALSE, &dn);
+            if (status == OK) {
+                trusted = p_client_desc->TrustCallBackFnctPtr(&dn, NET_SOCK_SECURE_SELF_SIGNED);
+                if (trusted == DEF_YES) {
+                    status = OK;
+                }
+            }
+        }
+
+    } else {
+        result = Mem_Cmp(p_cert, CaCertDesc.pCertificate, cert_len);
+        if ((CaCertDesc.certLength == cert_len) &&
+            (result                == DEF_YES)) {
+            status = OK;                                        /* we trust this cert.                                  */
+        }
+    }
+
+    return (status);
+
+#else
+    return (-1);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSecure_CertificateStoreLookup()
+*
+* Description : Find CA certificate in store.
+*
+* Argument(s) : conn_instance           SSL connection instance.
+*
+*               certDistinguishedName   Received certificate distinguished name.
+*
+*               p_return_cert           Pointer to Certificate descriptor
+*
+* Return(s)   : OK.
+*
+* Caller(s)   : various Mocana function
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  sbyte4  NetSecure_CertificateStoreLookup(sbyte4                  conn_instance,
+                                                 certDistinguishedName  *p_lookup_cert_dn,
+                                                 certDescriptor         *p_return_cert)
+{
+    MOC_UNUSED(conn_instance);
+    MOC_UNUSED(p_lookup_cert_dn);
+
+
+                                                                /* For this implementation, we only recognize one ...   */
+                                                                /* ... cert authority.                                  */
+    p_return_cert->pCertificate = CaCertDesc.pCertificate;
+    p_return_cert->certLength   = CaCertDesc.certLength;
+    p_return_cert->cookie       = 0;
+
+
+    return (OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetSecure_CertKeyConvert()
+*
+* Description : (1) Convert Certificate and Key and allocate memory if needed to store converted certificate and key if needed.
+*
+*                   (a) DER certificate are not converted, the orignal certificate buffer is used.
+*                   (b) PEM certificate are converted to DER certificatr and it is stored in an internal buffer.
+*                   (c) All Keys are converted in Mocana KeyBlog and key is stored in internal buffer.
+*
+* Argument(s) : p_cert      Pointer to the certificate
+*
+*               cert_size   Certificate length
+*
+*               p_key       Pointer to the key
+*
+*               key_size    Key length
+*
+*               fmt         Certificate and key format
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : Certificate descriptor that contain the location of the certificate and the key.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  certDescriptor NetSecure_CertKeyConvert (const  CPU_INT08U                     *p_cert,
+                                                        CPU_SIZE_T                      cert_size,
+                                                 const  CPU_INT08U                     *p_key,
+                                                        CPU_SIZE_T                      key_size,
+                                                        NET_SOCK_SECURE_CERT_KEY_FMT    fmt,
+                                                        NET_ERR                        *p_err)
+{
+    certDescriptor  cert_desc;
+    CPU_INT32S      rc;
+
+
+
+    Mem_Set(&cert_desc, 0, sizeof(cert_desc));
+
+
+   *p_err = NET_SECURE_ERR_NONE;
+
+    switch (fmt) {
+        case NET_SOCK_SECURE_CERT_KEY_FMT_PEM:
+             rc = CA_MGMT_decodeCertificate((ubyte *)p_cert, cert_size, &cert_desc.pCertificate, &cert_desc.certLength);
+             if (rc != OK) {
+                *p_err = NET_SECURE_ERR_INSTALL;
+                 goto exit_fail;
+             }
+
+             rc = CA_MGMT_convertKeyPEM((ubyte *)p_key, key_size, &cert_desc.pKeyBlob, &cert_desc.keyBlobLength);
+             if (rc != OK) {
+                *p_err = NET_SECURE_ERR_INSTALL;
+                 goto exit_fail;
+             }
+             break;
+
+
+        case NET_SOCK_SECURE_CERT_KEY_FMT_DER:
+             cert_desc.pCertificate = (ubyte *)p_cert;
+             cert_desc.certLength   = cert_size;
+             rc = CA_MGMT_convertKeyDER((ubyte *)p_key, key_size, &cert_desc.pKeyBlob, &cert_desc.keyBlobLength);
+             if (rc != OK) {
+                *p_err = NET_SECURE_ERR_INSTALL;
+                 goto exit_fail;
+             }
+             break;
+
+#if 0
+        case NET_SOCK_SECURE_CERT_KEY_FMT_NATIVE:
+                                                                /* We can create a NATIVE format to avoid allocating    */
+                                                                /* memory                                               */
+             cert_desc.pCertificate  = (ubyte *)p_cert;
+             cert_desc.certLength    =  cert_size;
+             cert_desc.pKeyBlob      =  p_key;
+             cert_desc.keyBlobLength =  key_size;
+             break;
+#endif
+
+        default:
+            *p_err = NET_DEV_ERR_FAULT;
+             goto exit_fail;
+    }
+
+
+    goto exit;
+
+exit_fail:
+    CA_MGMT_freeCertificate(&cert_desc);
+    CA_MGMT_freeKeyBlob(&cert_desc.pKeyBlob);
+
+exit:
+    return (cert_desc);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_SECURE_MODULE_EN */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Secure/Mocana/net_secure_mocana.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Secure/Mocana/net_secure_mocana.h
new file mode 100644
index 0000000..4ee43fb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Secure/Mocana/net_secure_mocana.h
@@ -0,0 +1,132 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     NETWORK SECURITY PORT LAYER
+*
+*                                            Mocana nanoSSL
+*
+* Filename      : net_secure_mocana.h
+* Version       : V3.04.02
+* Programmer(s) : SL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) Mocana nanoSSl v5.5 or higher
+*                     (b) uC/Clk V3.09
+*
+*                     See also 'net.h  Note #1'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Network Security Manager module available ONLY for certain connection types :
+*
+*               (a) IPv4 Sockets
+*                   (1) TCP/Stream Sockets
+*
+*           (2) The following secure-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require Network Security Layer
+*               configuration (see 'net_cfg_net.h  NETWORK SECURITY MANAGER CONFIGURATION  Note #2b') :
+*
+*                   NET_SECURE_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#include "../net_secure.h"
+#include "../../Source/net_cfg_net.h"
+
+
+#ifndef  NET_SECURE_MOCANA_MODULE_PRESENT
+#define  NET_SECURE_MOCANA_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+                                                                /* Mocana includes.                                     */
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_SECURE_MEM_BLK_TYPE_MOCANA                 0u
+#define  NET_SECURE_MEM_BLK_TYPE_SSL_SESSION            1u
+#define  NET_SECURE_MEM_BLK_TYPE_SERVER_DESC            2u
+#define  NET_SECURE_MEM_BLK_TYPE_CLIENT_DESC            3u
+
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN         NetSecure_CA_CertIntall(const  void                   *p_ca_cert,
+                                                   CPU_INT32U              ca_cert_len,
+                                                   NET_SECURE_CERT_FMT     fmt,
+                                                   NET_ERR                *p_err);
+
+CPU_BOOLEAN         NetSecure_DN_Print      (      CPU_CHAR               *p_buf,
+                                                   CPU_INT32U              buf_len,
+                                                   certDistinguishedName  *p_dn);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+
+#endif  /* NET_SECURE_MOCANA_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Secure/net_secure.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Secure/net_secure.h
new file mode 100644
index 0000000..234e713
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Secure/net_secure.h
@@ -0,0 +1,339 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     NETWORK SECURITY PORT LAYER
+*
+*                                               uC/TCPIP
+*
+* Filename      : net_secure.h
+* Version       : V3.04.02
+* Programmer(s) : SL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) Network Security Module (e.g. Mocana nanoSSL)
+*                     (b) uC/Clk V3.09
+*
+*                     See also 'net.h  Note #1'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Network Security Manager module available ONLY for certain connection types :
+*
+*               (a) IPv4 Sockets
+*                   (1) TCP/Stream Sockets
+*
+*           (2) The following secure-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require Network Security Layer
+*               configuration (see 'net_cfg_net.h  NETWORK SECURITY MANAGER CONFIGURATION  Note #2b') :
+*
+*                   NET_SECURE_MODULE_PRESENT
+*********************************************************************************************************
+*/
+
+#include "../Source/net_cfg_net.h"
+#include "../Source/net_sock.h"
+
+
+
+#ifndef  NET_SECURITY_MODULE_PRESENT
+#define  NET_SECURITY_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef enum net_secure_cert_fmt {
+    NET_SECURE_CERT_FMT_NONE = NET_SOCK_SECURE_CERT_KEY_FMT_NONE,
+    NET_SECURE_CERT_FMT_PEM  = NET_SOCK_SECURE_CERT_KEY_FMT_PEM,
+    NET_SECURE_CERT_FMT_DER  = NET_SOCK_SECURE_CERT_KEY_FMT_DER,
+} NET_SECURE_CERT_FMT;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+#ifdef   NET_SECURE_MODULE_EN
+                                                                            /* -------------- INIT FNCTS -------------- */
+void                NetSecure_Init                  (       NET_ERR                       *p_err);
+
+void                NetSecure_InitSession           (       NET_SOCK                      *p_sock,
+                                                            NET_ERR                       *p_err);
+
+
+                                                                            /* ------------ SOCK CFG FNCTS ------------ */
+CPU_BOOLEAN         NetSecure_SockCertKeyCfg        (       NET_SOCK                       *p_sock,
+                                                            NET_SOCK_SECURE_TYPE            sock_type,
+                                                     const  CPU_INT08U                     *p_buf_cert,
+                                                            CPU_SIZE_T                      buf_cert_size,
+                                                     const  CPU_INT08U                     *p_buf_key,
+                                                            CPU_SIZE_T                      buf_key_size,
+                                                            NET_SOCK_SECURE_CERT_KEY_FMT    fmt,
+                                                            CPU_BOOLEAN                     cert_chain,
+                                                            NET_ERR                        *p_err);
+
+
+CPU_BOOLEAN         NetSecure_ClientCommonNameSet   (       NET_SOCK                      *p_sock,
+                                                            CPU_CHAR                      *p_common_name,
+                                                            NET_ERR                       *p_err);
+
+CPU_BOOLEAN         NetSecure_ClientTrustCallBackSet(       NET_SOCK                      *p_sock,
+                                                            NET_SOCK_SECURE_TRUST_FNCT     p_callback_fnct,
+                                                            NET_ERR                       *p_err);
+
+
+
+                                                                            /* ----------- SOCK HANDLER FNCTS --------- */
+void                NetSecure_SockClose             (       NET_SOCK                      *p_sock,
+                                                            NET_ERR                       *p_err);
+
+void                NetSecure_SockCloseNotify       (       NET_SOCK                      *p_sock,
+                                                            NET_ERR                       *p_err);
+
+void                NetSecure_SockConn              (       NET_SOCK                      *p_sock,
+                                                            NET_ERR                       *p_err);
+
+void                NetSecure_SockAccept            (       NET_SOCK                      *p_sock_listen,
+                                                            NET_SOCK                      *p_sock_accept,
+                                                            NET_ERR                       *p_err);
+
+
+NET_SOCK_RTN_CODE   NetSecure_SockRxDataHandler     (       NET_SOCK                      *p_sock,
+                                                            void                          *p_data_buf,
+                                                            CPU_INT16U                     data_buf_len,
+                                                            NET_ERR                       *p_err);
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+CPU_BOOLEAN         NetSecure_SockRxIsDataPending   (       NET_SOCK                      *p_sock,
+                                                            NET_ERR                       *p_err);
+#endif
+
+
+NET_SOCK_RTN_CODE   NetSecure_SockTxDataHandler     (       NET_SOCK                      *p_sock,
+                                                            void                          *p_data_buf,
+                                                            CPU_INT16U                     data_buf_len,
+                                                            NET_ERR                       *p_err);
+
+void                NetSecure_SockDNS_NameSet       (       NET_SOCK                      *p_sock,
+                                                            CPU_CHAR                      *p_dns_name,
+                                                            NET_ERR                       *p_err);
+
+                                                                            /* -------------- API FNCTS --------------- */
+CPU_BOOLEAN         NetSecure_CA_CertIntall         (const  void                          *p_ca_cert,
+                                                            CPU_INT32U                     ca_cert_len,
+                                                            NET_SECURE_CERT_FMT            fmt,
+                                                            NET_ERR                       *p_err);
+#endif /* NET_SECURE_MODULE_EN */
+
+/*
+*********************************************************************************************************
+*                                              TRACING
+*********************************************************************************************************
+*/
+
+#if 0
+#define  SSL_TRACE                                         printf
+#endif
+
+                                                           /* Trace level, default to TRACE_LEVEL_OFF              */
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                                   0
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                                  1
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                                   2
+#endif
+
+#ifndef  SSL_TRACE_LEVEL
+#define  SSL_TRACE_LEVEL                                   TRACE_LEVEL_OFF
+#endif
+
+
+#if ((defined(SSL_TRACE))       && \
+     (defined(SSL_TRACE_LEVEL)) && \
+     (SSL_TRACE_LEVEL >= TRACE_LEVEL_INFO))
+
+    #if (SSL_TRACE_LEVEL >= TRACE_LEVEL_DBG)
+        #define  SSL_TRACE_DBG(msg)          SSL_TRACE  msg
+    #else
+        #define  SSL_TRACE_DBG(msg)
+    #endif
+
+    #define  SSL_TRACE_INFO(msg)             SSL_TRACE  msg
+
+#else
+    #define  SSL_TRACE_DBG(msg)
+    #define  SSL_TRACE_INFO(msg)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  NET_SECURE_CFG_EN
+#error  "NET_SECURE_CFG_EN                         not #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be  DEF_DISABLED]           "
+#error  "                                    [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_SECURE_CFG_EN != DEF_DISABLED) && \
+        (NET_SECURE_CFG_EN != DEF_ENABLED ))
+#error  "NET_SECURE_CFG_EN                   illegally #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be  DEF_DISABLED]           "
+#error  "                                    [     ||  DEF_ENABLED ]           "
+
+
+
+#elif   (NET_SECURE_CFG_EN == DEF_ENABLED)
+
+
+
+
+
+#ifndef NET_SECURE_CFG_MAX_NBR_SOCK_SERVER
+#error  "NET_SECURE_CFG_MAX_NBR_SOCK_SERVER        not #define'd in 'net_cfg.h' "
+#error  "                                    [MUST be  >= 0                    ]"
+#error  "                                    [     &&  <= NET_SOCK_CFG_NBR_SOCK]"
+
+#elif  (NET_SECURE_CFG_MAX_NBR_SOCK_SERVER > 0)
+
+#ifndef  NET_SECURE_CFG_MAX_CERT_LEN
+#error  "NET_SECURE_CFG_MAX_CERT_LEN               not #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be  > 0]                    "
+
+#elif   (DEF_CHK_VAL_MIN(NET_SECURE_CFG_MAX_CERT_LEN, 1) != DEF_OK)
+#error  "NET_SECURE_CFG_MAX_CERT_LEN         illegally #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be  > 0]                    "
+#endif
+
+#ifndef  NET_SECURE_CFG_MAX_KEY_LEN
+#error  "NET_SECURE_CFG_MAX_KEY_LEN                not #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be  > 0]                    "
+
+#elif   (DEF_CHK_VAL_MIN(NET_SECURE_CFG_MAX_KEY_LEN, 1) != DEF_OK)
+#error  "NET_SECURE_CFG_MAX_KEY_LEN          illegally #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be  > 0]                    "
+#endif
+
+#endif
+
+
+#ifndef  NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT
+#error  "NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT        not #define'd in 'net_cfg.h' "
+#error  "                                    [MUST be  >= 0                    ]"
+#error  "                                    [     &&  <= NET_TCP_CFG_NBR_CONN ]"
+
+#elif  (NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT > 0)
+
+#ifndef  NET_SECURE_CFG_MAX_NBR_CA
+#error  "NET_SECURE_CFG_MAX_NBR_CA                 not #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be  = 1]                    "
+
+#elif   (NET_SECURE_CFG_MAX_NBR_CA != 1)
+#error  "NET_SECURE_CFG_MAX_NBR_CA           illegally #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be  = 1]                    "
+#endif
+
+
+#ifndef  NET_SECURE_CFG_MAX_CA_CERT_LEN
+#error  "NET_SECURE_CFG_MAX_CA_CERT_LEN            not #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be  > 0]                    "
+
+#elif   (DEF_CHK_VAL_MIN(NET_SECURE_CFG_MAX_CA_CERT_LEN, 1) != DEF_OK)
+#error  "NET_SECURE_CFG_MAX_CA_CERT_LEN      illegally #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be  > 0]                    "
+#endif
+
+#endif
+
+
+
+#if (NET_SECURE_CFG_MAX_NBR_SOCK_SERVER + \
+     NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT > NET_SOCK_CFG_SOCK_NBR_TCP)
+#error  "NET_SECURE_CFG_MAX_NBR_SOCK_SERVER and/or                              "
+#error  "NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT  illegally #define'd in 'net_cfg.h' "
+#error  "NET_SECURE_CFG_MAX_NBR_SOCK_SERVER + NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT"
+#error  "                                    [MUST be  <= NET_TCP_CFG_NBR_CONN ]"
+#endif
+
+
+#ifndef  NET_SECURE_CFG_MAX_NBR_CA
+#error  "NET_SECURE_CFG_MAX_NBR_CA                 not #define'd in 'net_cfg.h'"
+#error  "                                    [MUST be   define'd in 'net_cfg.h]"
+#endif
+
+
+#endif
+
+
+#endif  /* NET_SECURITY_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net.c
new file mode 100644
index 0000000..cd029e7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net.c
@@ -0,0 +1,826 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK SOURCE FILE
+*
+* Filename      : net.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 EHS
+*                 FGK
+*                 SL
+*                 AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_MODULE
+#include  "net.h"
+#include  "net_cfg_net.h"
+#include  
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_arp.h"
+#include  "../IP/IPv4/net_igmp.h"
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ndp.h"
+#include  "../IP/IPv6/net_mldp.h"
+#endif
+
+#ifdef NET_SECURE_MODULE_EN
+#include  "../Secure/net_secure.h"
+#endif
+
+#include  "net_conn.h"
+#include  "net_mgr.h"
+#include  "net_icmp.h"
+#include  "net_tcp.h"
+#include  "net_udp.h"
+#include  "net_util.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_SIGNAL_INIT_NAME               "Net Init Signal"
+#define  NET_LOCK_GLOBAL_NAME               "Net Global Lock"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  KAL_SEM_HANDLE     Net_InitSignal;
+static  KAL_LOCK_HANDLE    Net_GlobalLock;
+
+static  void              *Net_GlobaLockFcntPtr;
+
+        CPU_INT32U         Net_Version = NET_VERSION;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static void  Net_KAL_Init (NET_ERR  *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                             Net_Init()
+*
+* Description : (1) Initialize & startup network protocol suite :
+*
+*                   (a) Initialize network protocol suite default values
+*                   (b) Perform    network protocol suite/operating system initialization
+*                   (c) Initialize network protocol suite modules
+*                   (d) Signal ALL network protocol suite modules & tasks
+*                           that network initialization is complete
+*
+*
+* Argument(s) : p_rx_task_cfg   Pointer to the Rx Task Configuration Object.
+*
+*               p_tx_task_cfg   Pointer to the Tx Dealloc Task Configuration Object.
+*
+*               p_tmr_task_cfg  Pointer to the Timer Task Configuration Object.
+*
+* Return(s)   : NET_ERR_NONE,                                     if NO error(s).
+*
+*               Specific initialization error code (see Note #4), otherwise.
+*
+* Caller(s)   : Your Product's Application.
+*
+*               This function is a network protocol suite initialization function & MAY be called by
+*               application/initialization function(s).
+*
+* Note(s)     : (2) NetInit() MUST be called ... :
+*
+*                   (a) ONLY ONCE from a product's application; ...
+*                   (b) (1) AFTER :
+*                           (A) Product's OS   has been initialized
+*                           (B) Memory library has been initialized
+*                       (2) BEFORE product's application calls any network protocol suite function(s)
+*
+*               (3) The following initialization functions MUST be sequenced as follows :
+*
+*                   (a) Net_InitDflt()  MUST precede ALL other network initialization functions
+*                   (b) Net_KAL_Init()  MUST precede remaining network initialization functions
+*                   (c) NetIF_Init()    MUST follow  signaling network initialization complete
+*
+*               (4) (a) If any network initialization error occurs, any remaining network initialization
+*                       is immediately aborted & the specific initialization error code is returned.
+*
+*                   (b) Network error codes are listed in 'net_err.h', organized by network modules &/or
+*                       layers.  A search of the specific error code number(s) provides the corresponding
+*                       error code label(s).  A search of the error code label(s) provides the source code
+*                       location of the network initialization error(s).
+*
+*               (5) In order for network protocol suite initialization complete to be able to be verified
+*                   from interrupt service routines, 'Net_InitDone' MUST be accessed exclusively in critical
+*                   sections during initialization.
+*
+*                   See also 'net_if.c  NetIF_ISR_Handler()  Note #2'.
+*********************************************************************************************************
+*/
+
+NET_ERR  Net_Init (const  NET_TASK_CFG  *rx_task_cfg,
+                   const  NET_TASK_CFG  *tx_task_cfg,
+                   const  NET_TASK_CFG  *tmr_task_cfg)
+{
+    CPU_BOOLEAN  is_en;
+    NET_ERR      err;
+    CPU_INT08U   i;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();                                       /* See Note #5.                                         */
+    Net_InitDone = DEF_NO;                                      /* Block net fncts/tasks until init complete.           */
+    CPU_CRITICAL_EXIT();
+
+                                                                /* --------------- VALIDATE OS SERVICE ---------------- */
+    is_en  = KAL_FeatureQuery(KAL_FEATURE_DLY,          KAL_OPT_DLY_NONE);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_LOCK_CREATE,  KAL_OPT_CREATE_NONE);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_LOCK_ACQUIRE, KAL_OPT_PEND_NONE);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_LOCK_RELEASE, KAL_OPT_POST_NONE);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_Q_CREATE,     KAL_OPT_CREATE_NONE);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_Q_PEND,       KAL_OPT_PEND_BLOCKING);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_Q_POST,       KAL_OPT_POST_NONE);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_SEM_CREATE,   KAL_OPT_CREATE_NONE);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_SEM_PEND,     KAL_OPT_PEND_BLOCKING);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_SEM_POST,     KAL_OPT_PEND_BLOCKING);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_SEM_ABORT,    KAL_OPT_ABORT_NONE);
+    is_en &= KAL_FeatureQuery(KAL_FEATURE_TASK_CREATE,  KAL_OPT_CREATE_NONE);
+
+    if (is_en != DEF_YES) {
+        return (NET_INIT_ERR_OS_FEATURE_NOT_EN);
+    }
+
+
+                                                                /* ---------------- INIT NET DFLT VALS ---------------- */
+    Net_InitDflt();                                             /* Init cfg vals to dflt vals (see Note #3a).           */
+
+
+
+                                                                /* --------------- PERFORM NET/OS INIT ---------------- */
+    Net_KAL_Init(&err);                                         /* Create net obj(s) [see Note #3b].                    */
+    if (err != NET_ERR_NONE) {
+        goto exit_fail_delete_obj;
+    }
+
+                                                                /* ----------------- INIT NET MODULES ----------------- */
+                                                                /* Init net rsrc mgmt module(s).                        */
+    NetCtr_Init();
+    NetStat_Init();
+
+    NetTmr_Init(tmr_task_cfg, &err);
+    if (err != NET_TMR_ERR_NONE) {
+        goto exit_fail_delete_obj;
+    }
+
+    NetBuf_Init();
+    NetConn_Init();
+
+
+                                                                /* Init net layers.                                     */
+    NetMgr_Init(&err);
+    if (err != NET_MGR_ERR_NONE) {
+        goto exit_fail_delete_obj;
+    }
+
+    NetIP_Init(&err);
+    if (err != NET_ERR_NONE) {
+        goto exit_fail_delete_obj;
+    }
+
+    NetICMP_Init(&err);
+    if (err != NET_ICMP_ERR_NONE) {
+        goto exit_fail_delete_obj;
+    }
+
+#ifdef  NET_IGMP_MODULE_EN
+    NetIGMP_Init();
+#endif
+
+                                                                /* Init net transport layers.                           */
+    NetUDP_Init();
+
+#ifdef  NET_TCP_MODULE_EN
+    NetTCP_Init(&err);
+    if (err != NET_TCP_ERR_NONE) {
+        goto exit_fail_delete_obj;
+    }
+#endif
+
+                                                                /* Init net app layers.                                 */
+    NetSock_Init(&err);
+    if (err != NET_SOCK_ERR_NONE) {
+        goto exit_fail_delete_obj;
+    }
+
+                                                                /* Init net secure module.                              */
+#ifdef  NET_SECURE_MODULE_EN
+    NetSecure_Init(&err);
+    if (err != NET_SECURE_ERR_NONE) {
+        goto exit_fail_delete_obj;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();                                       /* See Note #5.                                         */
+    Net_InitDone = DEF_YES;                                     /* Signal net fncts/tasks that init complete.           */
+    CPU_CRITICAL_EXIT();
+
+                                                                /* Init   net IF module(s) [see Note #3d].              */
+    NetIF_Init(rx_task_cfg, tx_task_cfg, &err);
+    if (err != NET_IF_ERR_NONE) {
+        CPU_CRITICAL_ENTER();
+        Net_InitDone = DEF_NO;
+        CPU_CRITICAL_EXIT();
+        goto exit_fail_delete_obj;
+    }
+
+#ifdef  NET_NDP_MODULE_EN
+    NetNDP_Init(&err);
+    if (err != NET_NDP_ERR_NONE) {
+        goto exit_fail_delete_obj;
+
+    }
+    NetMLDP_Init();
+#endif
+
+
+
+                                                                /* ------------- SIGNAL NET INIT COMPLETE ------------- */
+    for (i = 0u; i < NET_TASK_NBR; i++) {                       /* Signal ALL net   tasks that init complete.           */
+        Net_InitCompSignal(&err);
+        if (err != NET_ERR_NONE) {
+            CPU_CRITICAL_ENTER();
+            Net_InitDone = DEF_NO;
+            CPU_CRITICAL_EXIT();
+            goto exit_fail_delete_obj;
+        }
+    }
+
+    err = NET_ERR_NONE;
+    goto exit;
+
+exit_fail_delete_obj:
+                                                                /* Not yet possible to free Pools, delete task, etc.    */
+exit:
+    return (err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            Net_KAL_Init()
+*
+* Description : (1) Perform network/OS initialization :
+*
+*                   (a) KAL initialization for the OS used.
+*
+*                   (b) Implement network initialization signal by creating a counting semaphore.
+*
+*                       (1) Initialize network initialization signal with no signal by setting the
+*                           semaphore count to 0 to block the semaphore.
+*
+*                   (c) Implement global network lock by creating a binary semaphore.
+*
+*                       (1) Initialize network   lock as released by setting the semaphore count to 1.
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_NONE                        Network/OS initialization successful.
+*
+*                               NET_INIT_ERR_SIGNAL_CREATE          Network    initialization signal
+*                                                                       NOT successfully initialized.
+*
+*                               NET_INIT_ERR_GLOBAL_LOCK_CREATE     Network    lock           signal
+*                                                                       NOT successfully initialized.
+*
+*                               NET_ERR_FAULT_MEM_ALLOC             Error in memory allocation.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static void  Net_KAL_Init (NET_ERR  *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_Init(DEF_NULL, &err_kal);
+    if (err_kal != KAL_ERR_NONE) {
+       *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+        return;
+    }
+
+                                                                /* ------------ INITIALIZE NETWORK SIGNAL ------------- */
+                                                                /* Create network initialization signal ...             */
+                                                                /* ... with NO network tasks signaled (see Note #1b1).  */
+    Net_InitSignal = KAL_SemCreate((const CPU_CHAR *)NET_SIGNAL_INIT_NAME,
+                                                     DEF_NULL,
+                                                    &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_MEM_ALLOC:
+             *p_err = NET_ERR_FAULT_MEM_ALLOC;
+              return;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_INIT_ERR_SIGNAL_CREATE;
+             return;
+    }
+
+
+                                                                /* ------------- INITIALIZE NETWORK LOCK -------------- */
+                                                                /* Create network lock signal (see Note #1c).           */
+    Net_GlobaLockFcntPtr = DEF_NULL;
+   (void)&Net_GlobaLockFcntPtr;
+    Net_GlobalLock       = KAL_LockCreate((const CPU_CHAR *)NET_LOCK_GLOBAL_NAME,
+                                                            DEF_NULL,
+                                                           &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_ERR_FAULT_MEM_ALLOC;
+             goto fail_del_init_signal;
+
+
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_INIT_ERR_GLOBAL_LOCK_CREATE;
+             goto fail_del_init_signal;
+    }
+
+
+   *p_err = NET_ERR_NONE;
+    return;
+
+fail_del_init_signal:
+    KAL_SemDel(Net_InitSignal,  &err_kal);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Net_InitCompWait()
+*
+* Description : Wait on signal indicating network initialization is complete.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_NONE                    Initialization signal     received.
+*                               NET_INIT_ERR_COMP_SIGNAL_FAULT  Initialization signal NOT received.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxTaskHandler(),
+*               NetTmr_TaskHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network initialization signal MUST be acquired--i.e. MUST wait for access; do NOT timeout.
+*
+*                   (a) Failure to acquire signal will prevent network task(s) from running.
+*********************************************************************************************************
+*/
+
+void  Net_InitCompWait (NET_ERR  *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_SemPend(Net_InitSignal, KAL_OPT_PEND_NONE, KAL_TIMEOUT_INFINITE, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_ABORT:
+        case KAL_ERR_ISR:
+        case KAL_ERR_WOULD_BLOCK:
+        case KAL_ERR_TIMEOUT:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_INIT_ERR_COMP_SIGNAL_FAULT;            /* See Note #1a.                                        */
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Net_InitCompSignal()
+*
+* Description : Signal that network initialization is complete.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_NONE                 Network initialization     successfully signaled.
+*                               NET_INIT_ERR_SIGNAL_COMPL    Network initialization NOT successfully signaled.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network initialization MUST be signaled--i.e. MUST signal without failure.
+*
+*                   (a) Failure to signal will prevent network task(s) from running.
+*********************************************************************************************************
+*/
+
+void  Net_InitCompSignal (NET_ERR  *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_SemPost(Net_InitSignal, KAL_OPT_PEND_NONE, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OVF:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_INIT_ERR_SIGNAL_COMPL;                 /* See Note #1a.                                        */
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Net_GlobalLockAcquire()
+*
+* Description : Acquire mutually exclusive access to network protocol suite.
+*
+* Argument(s) : p_fcnt  Pointer to the caller.
+*
+*               p_err   Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_ERR_NONE                  Network access     acquired.
+*                           NET_ERR_FAULT_LOCK_ACQUIRE    Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) Network access MUST be acquired--i.e. MUST wait for access; do NOT timeout.
+*
+*                       (1) Failure to acquire network access will prevent network task(s)/operation(s)
+*                           from functioning.
+*
+*                   (b) Network access MUST be acquired exclusively by only a single task at any one time.
+*********************************************************************************************************
+*/
+
+void  Net_GlobalLockAcquire (void     *p_fcnt,
+                             NET_ERR  *p_err)
+{
+    KAL_ERR  err_kal;
+
+                                                                /* Acquire exclusive network access (see Note #1b) ...  */
+                                                                /* ... without timeout              (see Note #1a) ...  */
+    KAL_LockAcquire(Net_GlobalLock, KAL_OPT_PEND_NONE, KAL_TIMEOUT_INFINITE, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             Net_GlobaLockFcntPtr = p_fcnt;
+            *p_err = NET_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_LOCK_OWNER:
+            *p_err = NET_ERR_FAULT_LOCK_ACQUIRE;
+             return;
+
+
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_ABORT:
+        case KAL_ERR_TIMEOUT:
+        case KAL_ERR_WOULD_BLOCK:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_ERR_FAULT_LOCK_ACQUIRE;                               /* See Note #1a1.                                       */
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        Net_GlobalLockRelease()
+*
+* Description : Release mutually exclusive access to network protocol suite.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network access MUST be released--i.e. MUST unlock access without failure.
+*
+*                   (a) Failure to release network access will prevent network task(s)/operation(s) from
+*                       functioning.  Thus, network access is assumed to be successfully released since
+*                       NO uC/OS-III error handling could be performed to counteract failure.
+*********************************************************************************************************
+*/
+
+void  Net_GlobalLockRelease (void)
+{
+    KAL_ERR  err_kal;
+
+
+    Net_GlobaLockFcntPtr = DEF_NULL;
+    KAL_LockRelease(Net_GlobalLock,  &err_kal);                 /* Release exclusive network access.                    */
+
+
+   (void)&err_kal;                                               /* See Note #1a.                                        */
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Net_InitDflt()
+*
+* Description : Initialize default values for network protocol suite configurable parameters.
+*
+*               (1) Network protocol suite configurable parameters MUST be initialized PRIOR to all other
+*                   network initialization.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function but MAY be called by
+*               application/initialization functions (see Note #2b1B).
+*
+* Note(s)     : (3) Ignores configuration functions' return value indicating configuration success/failure.
+*********************************************************************************************************
+*/
+
+void  Net_InitDflt (void)
+{
+                                                                /* ----------- CFG NET CONN INIT DFLT VALS ------------ */
+   (void)NetConn_CfgAccessedTh(NET_CONN_ACCESSED_TH_DFLT);
+
+
+
+
+
+                                                                /* ------------ CFG NET IF INIT DFLT VALS ------------- */
+   (void)NetIF_CfgPhyLinkPeriod(NET_IF_PHY_LINK_TIME_DFLT_MS);
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+   (void)NetIF_CfgPerfMonPeriod(NET_IF_PERF_MON_TIME_DFLT_MS);
+#endif
+
+
+
+
+#ifdef  NET_ARP_MODULE_EN                                  /* -------------- CFG ARP INIT DFLT VALS -------------- */
+   (void)NetARP_CfgCacheTimeout(NET_ARP_CACHE_TIMEOUT_DFLT_SEC);
+   (void)NetARP_CfgCacheTxQ_MaxTh(NET_ARP_CACHE_TX_Q_TH_DFLT);
+   (void)NetARP_CfgCacheAccessedTh(NET_ARP_CACHE_ACCESSED_TH_DFLT);
+   (void)NetARP_CfgReqTimeout(NET_ARP_REQ_RETRY_TIMEOUT_DFLT_SEC);
+   (void)NetARP_CfgReqMaxRetries(NET_ARP_REQ_RETRY_DFLT);
+#endif
+
+
+
+
+#ifdef  NET_NDP_MODULE_EN
+                                                                /* -------------- CFG NDP INIT DFLT VALS -------------- */
+   (void)NetNDP_CfgNeighborCacheTimeout(NET_NDP_CACHE_TIMEOUT_DFLT_SEC);
+   (void)NetNDP_CfgReachabilityTimeout(NET_NDP_TIMEOUT_REACHABLE, NET_NDP_REACHABLE_TIMEOUT_SEC);
+   (void)NetNDP_CfgReachabilityTimeout(NET_NDP_TIMEOUT_SOLICIT,   NET_NDP_RETRANS_TIMEOUT_SEC);
+   (void)NetNDP_CfgReachabilityTimeout(NET_NDP_TIMEOUT_DELAY,     NET_NDP_DELAY_FIRST_PROBE_TIMEOUT_SEC);
+   (void)NetNDP_CfgSolicitMaxNbr(NET_NDP_SOLICIT_MULTICAST,       NET_NDP_SOLICIT_MAX_MULTICAST);
+   (void)NetNDP_CfgSolicitMaxNbr(NET_NDP_SOLICIT_UNICAST,         NET_NDP_SOLICIT_MAX_UNICAST);
+#ifdef  NET_DAD_MODULE_EN
+   (void)NetNDP_CfgSolicitMaxNbr(NET_NDP_SOLICIT_DAD,             NET_NDP_CFG_DAD_MAX_NBR_ATTEMPTS);
+#endif
+   (void)NetCache_CfgAccessedTh(NET_CACHE_TYPE_NDP, NET_NDP_CACHE_ACCESSED_TH_DFLT);
+   (void)NetNDP_CfgCacheTxQ_MaxTh(NET_NDP_CACHE_TX_Q_TH_DFLT);
+#endif
+
+
+
+
+                                                                /* -------------- CFG IP INIT DFLT VALS --------------- */
+#ifdef  NET_IPv4_MODULE_EN
+   (void)NetIPv4_CfgFragReasmTimeout(NET_IPv4_FRAG_REASM_TIMEOUT_DFLT_SEC);
+#endif
+
+
+                                                                /* ------------- CFG ICMP INIT DFLT VALS -------------- */
+
+
+#ifdef  NET_TCP_MODULE_EN                                       /* -------------- CFG TCP INIT DFLT VALS -------------- */
+                                                                /* NOT yet implemented (remove if unnecessary).         */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          Net_VersionGet()
+*
+* Description : Get network protocol suite software version.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Network protocol suite software version (see Note #1b).
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) The network protocol suite software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*                   (b) The software version is returned as follows :
+*
+*                           ver = x.yyzz * 100 * 100
+*
+*                               where
+*                                       ver         denotes software version number scaled as an integer value
+*                                       x.yyzz      denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*
+*                   See also 'net.h  NETWORK VERSION NUMBER  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  Net_VersionGet (void)
+{
+    CPU_INT16U  ver;
+
+
+    ver = Net_Version;
+
+    return (ver);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Net_TimeDly()
+*
+* Description : Delay for specified time, in seconds & microseconds.
+*
+* Argument(s) : time_dly_sec    Time delay value, in      seconds (see Note #1).
+*
+*               time_dly_us     Time delay value, in microseconds (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_NONE                    Time delay successful.
+*                               NET_ERR_TIME_DLY_MAX            Time delay successful but limited to
+*                                                                   maximum OS time delay.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Sel().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) Time delay of 0 seconds/microseconds allowed.
+*
+*                   (b) Time delay limited to the maximum possible OS time delay
+*                             if greater than the maximum possible OS time delay.
+*
+*               (2) KAL does NOT support microsecond time values :
+*
+*                   (a) Microsecond timeout    values provided for network microsecond timeout values, but
+*                       are rounded to millisecond timeout values.
+*
+*                   (b) Microsecond time delay values NOT supported.
+*
+*               (3) To avoid macro integer overflow, an OS timeout tick threshold value MUST be configured
+*                   to avoid values that overflow the target CPU &/or compiler environment.
+*********************************************************************************************************
+*/
+
+void  Net_TimeDly (CPU_INT32U   time_dly_sec,
+                   CPU_INT32U   time_dly_us,
+                   NET_ERR     *p_err)
+{
+    CPU_INT32U  time_dly_ms;
+
+
+    if ((time_dly_sec < 1) &&                                   /* If zero time delay requested, ..                     */
+        (time_dly_us  < 1)) {
+       *p_err = NET_ERR_NONE;                                   /* .. exit time delay (see Note #1a).                   */
+        return;
+    }
+
+
+                                                                /* Calculate us time delay's millisecond value, ..      */
+                                                                /* .. rounded up to next millisecond.                   */
+    time_dly_ms = NetUtil_TimeSec_uS_To_ms(time_dly_sec, time_dly_us);
+    if (time_dly_ms == NET_TMR_TIME_INFINITE) {
+       *p_err = NET_ERR_TIME_DLY_MAX;
+    } else {
+       *p_err = NET_ERR_NONE;
+    }
+
+                                                                /* Delay for calculated time delay.                     */
+    KAL_Dly(time_dly_ms);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net.h
new file mode 100644
index 0000000..bf21562
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net.h
@@ -0,0 +1,401 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK HEADER FILE
+*
+* Filename      : net.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 EHS
+*                 FGK
+*                 SL
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/CPU V1.30
+*                     (b) uC/LIB V1.38.00
+*
+*                     See also 'NETWORK INCLUDE FILES  Notes #2 & #3'.
+*
+*
+*                 (2) (a) The following network protocols are supported/implemented :
+*
+*                                                                             ---- LINK LAYER PROTOCOLS -----
+*                         (1) (A) ARP     Address Resolution Protocol
+*                                                                             --- NETWORK LAYER PROTOCOLS ---
+*                         (2) (A) IPv4    Internet Protocol                    Version 4
+*                             (B) IPv6    Internet Protocol                    Version 6
+*                             (C) ICMPv4  Internet Control Message    Protocol Version 4
+*                             (D) ICMPv6  Internet Control Message    Protocol Version 6
+*                             (E) IGMP    Internet Group   Management Protocol
+*                                                                             -- TRANSPORT LAYER PROTOCOLS --
+*                         (3) (A) UDP     User Datagram Protocol
+*                             (B) TCP     Transmission Control Protocol
+*
+*                     (b) The following network protocols are intentionally NOT supported/implemented :
+*
+*                                                                             ---- LINK LAYER PROTOCOLS -----
+*                         (1) (A) RARP    Reverse Address Resolution Protocol
+*
+*
+*                 (3) To protect the validity & prevent the corruption of shared network protocol resources,
+*                     the primary tasks of the network protocol suite are prevented from running concurrently
+*                     through the use of a global network lock implementing protection by mutual exclusion.
+*
+*                     (a) The mechanism of protected mutual exclusion is irrelevant but MUST be implemented
+*                         in the following two functions :
+*
+*                             Net_GlobalLockAcquire()   acquire access to network protocol suite
+*                             Net_GlobalLockRelease()   release access to network protocol suite
+*
+*                     (b) Since this global lock implements mutual exclusion at the network protocol suite
+*                         task level, critical sections are NOT required to prevent task-level concurrency
+*                         in the network protocol suite.
+*
+*                 (4) To help debugging modules some value can be defined for internal usage:
+*
+*                     (a) To configure the initial value of sequence numbers the following define should be
+*                         added to net_cfg.h:
+*
+*                           #define  NET_UTIL_INIT_SEQ_NBR_0        value
+*
+*                     (b) To remove the increment value to the TCP initial sequence number the following
+*                         define should be added to net_cfg.h (See net_tcp.h Note #3):
+*
+*                           #define  NET_DBG_CFG_TEST_TCP
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This main network protocol suite header file is protected from multiple pre-processor
+*               inclusion through use of the network module present pre-processor macro definition.
+*
+*               See also 'NETWORK INCLUDE FILES  Note #5'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_MODULE_PRESENT                                     /* See Note #1.                                         */
+#define  NET_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       NETWORK VERSION NUMBER
+*
+* Note(s) : (1) (a) The network protocol suite software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_VERSION                                   30402u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        NETWORK INCLUDE FILES
+*
+* Note(s) : (1) The network protocol suite files are located in the following directories :
+*
+*               (a) (1) \\app_cfg.h
+*                   (2)                            \net_cfg.h
+*                   (3)                            \net_dev_cfg.*
+*                   (4)                            \net_bsp.*
+*
+*               (b) \\Source\net.h
+*                                                   \net_*.*
+*
+*               (c) \\Ports\\\net_*_a.*
+*
+*               (d) (1) \\IF\net_if.*
+*                   (2)                             \net_if_*.*
+*
+*               (e) \\Dev\\\net_dev_*.*
+*
+*               (f) (1)     \\Secure\net_secure_*.*
+*                   (2) (A) \\Secure\\net_secure.*
+*                       (B)                                 \\\net_secure_os.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for network protocol suite
+*                                                          directory name for specific processor         (CPU)
+*                                                     directory name for specific compiler
+*                                                           directory name for specific operating system  (OS)
+*                                                           directory name for specific network interface (IF)
+*                                                          directory name for specific network device
+*                                                       directory name for specific security layer
+*
+*           (2) CPU-configuration software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) NO compiler-supplied standard library functions are used by the network protocol suite.
+*
+*               (a) Standard library functions are implemented in the custom library module(s) :
+*
+*                       \\lib_*.*
+*
+*                           where
+*                                         directory path for custom library software
+*
+*               (b) Network-specific library functions are implemented in the Network Utility module,
+*                   'net_util.*' (see 'net_util.h  Note #1').
+*
+*           (4) (a) Compiler MUST be configured to include as additional include path directories :
+*
+*                   (1) '\\' directory                                See Note #1a
+*
+*                   (3) '\\' directory                                See Note #3a
+*
+*                   (4) Specific port directories :
+*
+*                       (A) (1) '\\'                    directory       See Note #2a
+*                           (2) '\\\\'   directory       See Note #2b
+*
+*                       (B) '\\Ports\\\' directory       See Note #1c
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for network protocol suite
+*                                     directory path for custom  library software
+*                                       directory path for common  CPU-compiler software
+*                                                          directory name for specific processor         (CPU)
+*                                                     directory name for specific compiler
+*                                                           directory name for specific network interface (IF)
+*                                                          directory name for specific network device
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  "net_err.h"
+#include  "net_type.h"
+
+
+
+#include  
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef NET_MODULE
+#define  NET_EXT
+#else
+#define  NET_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_TASK_NBR_IF                                   2u
+#define  NET_TASK_NBR_TMR                                  1u
+
+#define  NET_TASK_NBR                                   (NET_TASK_NBR_IF + \
+                                                         NET_TASK_NBR_TMR)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+NET_EXT  CPU_BOOLEAN  Net_InitDone;                             /* Indicates when network initialization is complete.   */
+
+extern   CPU_INT32U   Net_Version;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+NET_ERR     Net_Init      (const  NET_TASK_CFG  *rx_task_cfg,   /* Network startup function.                            */
+                           const  NET_TASK_CFG  *tx_task_cfg,
+                           const  NET_TASK_CFG  *tmr_task_cfg);
+
+CPU_INT16U  Net_VersionGet(       void);                        /* Get network protocol suite software version.         */
+
+void        Net_TimeDly   (       CPU_INT32U     time_dly_sec,  /* Time delay of seconds & microseconds.                */
+                                  CPU_INT32U     time_dly_us,
+                                  NET_ERR       *p_err);
+
+void        Net_InitDflt         (void);                        /* Initialize default values for configurable parameters.*/
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void        Net_InitCompWait     (NET_ERR       *p_err);        /* Wait  until network initialization is complete.      */
+
+void        Net_InitCompSignal   (NET_ERR       *p_err);        /* Signal that network initialization is complete.      */
+
+void        Net_GlobalLockAcquire(void          *p_fcnt,
+                                  NET_ERR       *p_err);        /* Acquire access to network protocol suite.            */
+
+void        Net_GlobalLockRelease(void);                        /* Release access to network protocol suite.            */
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                    NETWORK CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#ifndef  NET_CFG_OPTIMIZE_ASM_EN
+#error  "NET_CFG_OPTIMIZE_ASM_EN        not #define'd in 'net_cfg.h'"
+#error  "                         [MUST be  DEF_DISABLED]           "
+#error  "                         [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_CFG_OPTIMIZE_ASM_EN != DEF_DISABLED) && \
+        (NET_CFG_OPTIMIZE_ASM_EN != DEF_ENABLED ))
+#error  "NET_CFG_OPTIMIZE_ASM_EN  illegally #define'd in 'net_cfg.h'"
+#error  "                         [MUST be  DEF_DISABLED]           "
+#error  "                         [     ||  DEF_ENABLED ]           "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    LIBRARY CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* See 'net.h  Note #1a'.                               */
+#if     (CPU_CORE_VERSION < 13000u)
+#error  "CPU_CORE_VERSION      [SHOULD be >= V1.30]"
+#endif
+
+
+                                                                /* See 'net.h  Note #1b'.                               */
+#if     (LIB_VERSION < 13800u)
+#error  "LIB_VERSION           [SHOULD be >= V1.38.00]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_app.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_app.c
new file mode 100644
index 0000000..159b227
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_app.c
@@ -0,0 +1,2772 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                        NETWORK APPLICATION PROGRAMMING INTERFACE (API) LAYER
+*
+* Filename      : net_app.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_APP_MODULE
+#include  "net_app.h"
+#include  "net_util.h"
+#include  "net_ascii.h"
+#ifdef  NET_EXT_MODULE_DNS_EN
+#include  
+#endif
+
+/*
+*********************************************************************************************************
+*                                          NetApp_SockOpen()
+*
+* Description : Open an application socket, with error handling.
+*
+* Argument(s) : protocol_family     Socket protocol family :
+*
+*                                       NET_SOCK_PROTOCOL_FAMILY_IP_V4  Internet Protocol version 4 (IPv4).
+*                                       NET_SOCK_PROTOCOL_FAMILY_IP_V6  Internet Protocol version 6 (IPv6).
+*
+*                                   See also 'net_sock.c  Note #1a'.
+*
+*               sock_type           Socket type :
+*
+*                                       NET_SOCK_TYPE_DATAGRAM          Datagram-type socket.
+*                                       NET_SOCK_TYPE_STREAM            Stream  -type socket.
+*
+*                                   See also 'net_sock.c  Note #1b'.
+*
+*               protocol            Socket protocol :
+*
+*                                       NET_SOCK_PROTOCOL_DFLT          Default protocol for socket type.
+*                                       NET_SOCK_PROTOCOL_UDP           User Datagram        Protocol (UDP).
+*                                       NET_SOCK_PROTOCOL_TCP           Transmission Control Protocol (TCP).
+*
+*                                   See also 'net_sock.c  Note #1c'.
+*
+*               retry_max           Maximum number of consecutive socket open retries   (see Note #2).
+*
+*               time_dly_ms         Transitory socket open delay value, in milliseconds (see Note #2).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE                Application  socket successfully opened.
+*                               NET_APP_ERR_NONE_AVAIL          NO available sockets to allocate.
+*                               NET_APP_ERR_INVALID_ARG         Invalid argument(s) [see Note #1].
+*                               NET_APP_ERR_FAULT               Socket open fault(s); open aborted.
+*
+* Return(s)   : Socket descriptor/handle identifier, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_OPEN,               otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Socket arguments &/or operations validated in network socket handler functions.  Some
+*                   arguments validated only if validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_EXT_EN
+*                   is DEF_ENABLED in 'net_cfg.h').
+*
+*               (2) If a non-zero number of retries is requested then a non-zero time delay SHOULD also be
+*                   requested; otherwise, all retries will most likely fail immediately since no time will
+*                   elapse to wait for & allow socket operation(s) to successfully complete.
+*********************************************************************************************************
+*/
+
+NET_SOCK_ID  NetApp_SockOpen (NET_SOCK_PROTOCOL_FAMILY   protocol_family,
+                              NET_SOCK_TYPE              sock_type,
+                              NET_SOCK_PROTOCOL          protocol,
+                              CPU_INT16U                 retry_max,
+                              CPU_INT32U                 time_dly_ms,
+                              NET_ERR                   *p_err)
+{
+    NET_SOCK_ID  sock_id;
+    CPU_INT16U   retry_cnt;
+    CPU_BOOLEAN  done;
+    CPU_BOOLEAN  dly;
+    NET_ERR      err;
+    NET_ERR      err_rtn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_SOCK_ID)0);
+    }
+#endif
+                                                                /* ------------------ OPEN APP SOCK ------------------- */
+    retry_cnt = 0u;
+    done      = DEF_NO;
+    dly       = DEF_NO;
+    sock_id   = NET_SOCK_BSD_ERR_OPEN;
+    err_rtn   = NET_APP_ERR_NONE_AVAIL;
+
+    while ((retry_cnt <= retry_max) &&                          /* While open retry <= max retry ...                    */
+           (done      == DEF_NO)) {                             /* ... & open NOT done,          ...                    */
+
+        if (dly == DEF_YES) {                                   /* Dly open, on retries.                                */
+            NetApp_TimeDly_ms(time_dly_ms, &err);
+        }
+                                                                /* ... open sock.                                       */
+        sock_id = NetSock_Open((NET_SOCK_PROTOCOL_FAMILY) protocol_family,
+                               (NET_SOCK_TYPE           ) sock_type,
+                               (NET_SOCK_PROTOCOL       ) protocol,
+                               (NET_ERR                *)&err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_NONE;
+                 break;
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_SOCK_ERR_NONE_AVAIL:                       /* If transitory open err(s), ...                       */
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 retry_cnt++;
+                 dly     = DEF_YES;                             /* ... dly retry.                                       */
+                 err_rtn = NET_APP_ERR_NONE_AVAIL;
+                 break;
+
+
+            case NET_SOCK_ERR_INVALID_FAMILY:
+            case NET_SOCK_ERR_INVALID_PROTOCOL:
+            case NET_SOCK_ERR_INVALID_TYPE:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_ARG;             /* Rtn invalid arg err(s) [see Note #1].                */
+                 break;
+
+
+            default:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_FAULT;                   /* Rtn fatal err(s).                                    */
+                 break;
+        }
+    }
+
+   *p_err =  err_rtn;
+
+    return (sock_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetApp_SockClose()
+*
+* Description : (1) Close an application socket, with error handling :
+*
+*                   (a) Configure close timeout, if any
+*                   (b) Close application socket
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of application socket to close.
+*
+*               timeout_ms  Socket close timeout value :
+*
+*                               0,                              if current configured timeout value desired.
+*                               NET_TMR_TIME_INFINITE,          if infinite (i.e. NO timeout) value desired.
+*                               In number of milliseconds,      otherwise.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE                Application socket successfully closed.
+*                               NET_APP_ERR_INVALID_ARG         Invalid argument(s) [see Note #2].
+*                               NET_APP_ERR_FAULT_TRANSITORY    Transitory   fault(s); close aborted but
+*                                                                   MIGHT     close  in a subsequent attempt.
+*                               NET_APP_ERR_FAULT               Socket close fault(s); close aborted AND
+*                                                                   CANNOT be closed in a subsequent attempt.
+*
+* Return(s)   : DEF_OK,   application socket successfully closed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) Socket arguments &/or operations validated in network socket handler functions.  Some
+*                   arguments validated only if validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_EXT_EN
+*                   is DEF_ENABLED in 'net_cfg.h').
+*
+*               (3) (a) Once an application closes its socket, NO further operations on the socket are
+*                       allowed & the application MUST NOT continue to access the socket.
+*
+*                       See also 'net_sock.c  NetSock_Close()  Note #2'.
+*
+*                   (b) NO error is returned for any internal error while closing the socket.
+*
+*                       See also 'net_sock.c  NetSock_Close()  Note #4'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetApp_SockClose (NET_SOCK_ID   sock_id,
+                               CPU_INT32U    timeout_ms,
+                               NET_ERR      *p_err)
+{
+    NET_SOCK_RTN_CODE  rtn_code;
+    CPU_BOOLEAN        rtn_status;
+    NET_ERR            err;
+    NET_ERR            err_rtn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                /* ---------------- CFG CLOSE TIMEOUT ----------------- */
+    if (timeout_ms > 0) {                                       /* If timeout avail, ...                                */
+                                                                /* ... cfg close timeout.                               */
+        NetSock_CfgTimeoutConnCloseSet(sock_id, timeout_ms, &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 break;
+
+
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_ERR_INVALID_TIME:
+                *p_err =  NET_APP_ERR_INVALID_ARG;
+                 return (DEF_FAIL);
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                *p_err =  NET_APP_ERR_FAULT_TRANSITORY;
+                 return (DEF_FAIL);
+
+
+            default:
+                *p_err =  NET_APP_ERR_FAULT;
+                 return (DEF_FAIL);
+        }
+    }
+
+
+                                                                /* ------------------ CLOSE APP SOCK ------------------ */
+    rtn_code = NetSock_Close((NET_SOCK_ID) sock_id,
+                             (NET_ERR   *)&err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:
+        case NET_SOCK_ERR_CLOSED:
+        case NET_SOCK_ERR_CONN_CLOSE_IN_PROGRESS:
+             err_rtn = NET_APP_ERR_NONE;
+             break;
+
+
+        case NET_SOCK_ERR_INVALID_FAMILY:
+        case NET_SOCK_ERR_INVALID_TYPE:
+        case NET_SOCK_ERR_INVALID_STATE:
+        case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+        case NET_SOCK_ERR_CONN_FAIL:
+        case NET_SOCK_ERR_FAULT:
+        case NET_CONN_ERR_INVALID_CONN:
+        case NET_CONN_ERR_NOT_USED:
+             err_rtn = NET_APP_ERR_NONE;                        /* See Note #3b.                                        */
+             break;
+
+
+        case NET_SOCK_ERR_NOT_USED:
+        case NET_SOCK_ERR_INVALID_SOCK:
+             err_rtn = NET_APP_ERR_INVALID_ARG;                 /* Rtn invalid arg err(s) [see Note #2].                */
+             break;
+
+
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_ERR_FAULT_LOCK_ACQUIRE:
+             err_rtn = NET_APP_ERR_FAULT_TRANSITORY;            /* Rtn transitory  err(s).                              */
+             break;
+
+
+        default:
+             err_rtn = NET_APP_ERR_FAULT;                       /* Rtn fatal       err(s).                              */
+             break;
+    }
+
+    rtn_status = (rtn_code == NET_SOCK_BSD_ERR_NONE) ? DEF_OK : DEF_FAIL;
+   *p_err       =  err_rtn;
+
+    return (rtn_status);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetApp_SockBind()
+*
+* Description : Bind an application socket to a local address, with error handling.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of application socket to bind to a
+*                                   local address.
+*
+*               p_addr_local    Pointer to socket address structure (see Note #2).
+*
+*               addr_len        Length  of socket address structure (in octets).
+*
+*               retry_max       Maximum number of consecutive socket bind retries   (see Note #3).
+*
+*               time_dly_ms     Transitory socket bind delay value, in milliseconds (see Note #3).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE                Application socket successfully bound
+*                                                                   to a local address.
+*                               NET_APP_ERR_NONE_AVAIL          NO available resources to bind socket
+*                                                                   to a local address.
+*                               NET_APP_ERR_INVALID_ARG         Invalid argument(s)  [see Note #1].
+*                               NET_APP_ERR_INVALID_OP          Invalid operation(s) [see Note #1].
+*                               NET_APP_ERR_FAULT               Socket bind fault(s); bind aborted &
+*                                                                   socket SHOULD be closed.
+*
+* Return(s)   : DEF_OK,   application socket successfully bound to a local address.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Socket arguments &/or operations validated in network socket handler functions.  Some
+*                   arguments validated only if validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_EXT_EN
+*                   is DEF_ENABLED in 'net_cfg.h').
+*
+*               (2) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'
+*                          & 'net_sock.c  NetSock_Bind()                     Note #3'.
+*
+*               (3) If a non-zero number of retries is requested then a non-zero time delay SHOULD also be
+*                   requested; otherwise, all retries will most likely fail immediately since no time will
+*                   elapse to wait for & allow socket operation(s) to successfully complete.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetApp_SockBind (NET_SOCK_ID         sock_id,
+                              NET_SOCK_ADDR      *p_addr_local,
+                              NET_SOCK_ADDR_LEN   addr_len,
+                              CPU_INT16U          retry_max,
+                              CPU_INT32U          time_dly_ms,
+                              NET_ERR            *p_err)
+{
+    NET_SOCK_RTN_CODE  rtn_code;
+    CPU_BOOLEAN        rtn_status;
+    CPU_BOOLEAN        done;
+    CPU_BOOLEAN        dly;
+    CPU_INT16U         retry_cnt;
+    NET_ERR            err;
+    NET_ERR            err_rtn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_NO);
+    }
+#endif
+
+
+                                                                /* ------------------ BIND APP SOCK ------------------- */
+    retry_cnt = 0u;
+    done      = DEF_NO;
+    dly       = DEF_NO;
+    rtn_code  = NET_SOCK_BSD_ERR_BIND;
+    err_rtn   = NET_APP_ERR_NONE_AVAIL;
+
+    while ((retry_cnt <= retry_max) &&                          /* While bind retry <= max retry ...                    */
+           (done      == DEF_NO)) {                             /* ... & bind NOT done,          ...                    */
+
+        if (dly == DEF_YES) {                                   /* Dly bind, on retries.                                */
+            NetApp_TimeDly_ms(time_dly_ms, &err);
+        }
+                                                                /* ... bind sock.                                       */
+        rtn_code = NetSock_Bind((NET_SOCK_ID      ) sock_id,
+                                (NET_SOCK_ADDR   *) p_addr_local,
+                                (NET_SOCK_ADDR_LEN) addr_len,
+                                (NET_ERR         *)&err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_NONE;
+                 break;
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_SOCK_ERR_ADDR_IN_USE:                      /* If transitory bind err(s), ...                       */
+            case NET_SOCK_ERR_PORT_NBR_NONE_AVAIL:
+            case NET_CONN_ERR_NONE_AVAIL:
+            case NET_CONN_ERR_ADDR_IN_USE:
+            case NET_IPv4_ERR_ADDR_NONE_AVAIL:
+            case NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 retry_cnt++;
+                 dly     = DEF_YES;                             /* ... dly retry.                                       */
+                 err_rtn = NET_APP_ERR_NONE_AVAIL;
+                 break;
+
+
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_SOCK_ERR_INVALID_ADDR:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_ARG;             /* Rtn invalid arg err(s) [see Note #1].                */
+                 break;
+
+
+            case NET_SOCK_ERR_INVALID_OP:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_OP;              /* Rtn invalid op  err(s).                              */
+                 break;
+
+
+            case NET_IF_ERR_INVALID_IF:
+            case NET_SOCK_ERR_CLOSED:
+            case NET_SOCK_ERR_INVALID_FAMILY:
+            case NET_SOCK_ERR_INVALID_PROTOCOL:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_STATE:
+            case NET_SOCK_ERR_CONN_FAIL:
+            case NET_ERR_FAULT_NULL_FNCT:
+            case NET_CONN_ERR_NOT_USED:
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_TYPE:
+            case NET_CONN_ERR_INVALID_PROTOCOL_IX:
+            case NET_CONN_ERR_INVALID_ADDR_LEN:
+            case NET_CONN_ERR_ADDR_NOT_USED:
+            default:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_FAULT;                   /* Rtn fatal err(s).                                    */
+                 break;
+        }
+    }
+
+    rtn_status = (rtn_code == NET_SOCK_BSD_ERR_NONE) ? DEF_OK : DEF_FAIL;
+   *p_err       =  err_rtn;
+
+    return (rtn_status);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetApp_SockConn()
+*
+* Description : (1) Connect an application socket to a remote address, with error handling :
+*
+*                   (a) Configure connect timeout, if any
+*                   (b) Connect application socket to remote address
+*                   (c) Restore   connect timeout, if necessary
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of application socket to connect to
+*                                   a remote address.
+*
+*               p_addr_remote   Pointer to socket address structure (see Note #3).
+*
+*               addr_len        Length  of socket address structure (in octets).
+*
+*               retry_max       Maximum number of consecutive socket connect retries   (see Note #4a1).
+*
+*               timeout_ms      Socket connect timeout value per attempt/retry         (see Note #4b1) :
+*
+*                                   0,                          if current configured timeout value desired.
+*                                   NET_TMR_TIME_INFINITE,      if infinite (i.e. NO timeout) value desired.
+*                                   In number of milliseconds,  otherwise.
+*
+*               time_dly_ms     Transitory socket connect delay value, in milliseconds (see Note #4b2).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE                Application socket successfully connected
+*                                                                   to a remote address.
+*                               NET_APP_ERR_NONE_AVAIL          NO available resources to connect socket
+*                                                                   to a remote address OR remote address
+*                                                                   NOT available.
+*                               NET_APP_ERR_INVALID_ARG         Invalid argument(s)  [see Note #2].
+*                               NET_APP_ERR_INVALID_OP          Invalid operation(s) [see Note #2].
+*                               NET_APP_ERR_FAULT_TRANSITORY    Transitory     fault(s); connect aborted but
+*                                                                   MIGHT connect in a subsequent attempt.
+*                               NET_APP_ERR_FAULT               Socket connect fault(s); connect aborted &
+*                                                                   socket SHOULD be closed.
+*
+* Return(s)   : DEF_OK,   application socket successfully connected to a remote address.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) Socket arguments &/or operations validated in network socket handler functions.  Some
+*                   arguments validated only if validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_EXT_EN
+*                   is DEF_ENABLED in 'net_cfg.h').
+*
+*               (3) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'
+*                          & 'net_sock.c  NetSock_Conn()                     Note #3'.
+*
+*               (4) (a) (1) If a non-zero number of retries is requested                AND ...
+*                       (2) global socket blocking ('NET_SOCK_CFG_BLOCK_SEL') is configured ...
+*                           for non-blocking operation ('NET_SOCK_BLOCK_SEL_NO_BLOCK');     ...
+*
+*                   (b) ... then one or more of the following SHOULD also be requested; otherwise, all
+*                       retries will most likely fail immediately since no time will elapse to wait for
+*                       & allow socket operation(s) to successfully complete :
+*
+*                       (1) A non-zero timeout
+*                       (2) A non-zero time delay
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetApp_SockConn (NET_SOCK_ID         sock_id,
+                              NET_SOCK_ADDR      *p_addr_remote,
+                              NET_SOCK_ADDR_LEN   addr_len,
+                              CPU_INT16U          retry_max,
+                              CPU_INT32U          timeout_ms,
+                              CPU_INT32U          time_dly_ms,
+                              NET_ERR            *p_err)
+{
+    NET_SOCK_RTN_CODE  rtn_code;
+    CPU_BOOLEAN        rtn_status;
+    CPU_INT16U         retry_cnt;
+    CPU_INT32U         timeout_ms_cfgd;
+    CPU_BOOLEAN        timeout_cfgd;
+    CPU_BOOLEAN        done;
+    CPU_BOOLEAN        dly;
+    NET_ERR            err;
+    NET_ERR            err_rtn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                /* ----------------- CFG CONN TIMEOUT ----------------- */
+    if (timeout_ms > 0) {                                       /* If timeout avail,         ...                        */
+                                                                /* ... save cfg'd conn timeout ...                      */
+        timeout_ms_cfgd = NetSock_CfgTimeoutConnReqGet_ms(sock_id, &err);
+                                                                /* ... & cfg temp conn timeout.                         */
+        NetSock_CfgTimeoutConnReqSet(sock_id, timeout_ms, &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 timeout_cfgd = DEF_YES;
+                 break;
+
+
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_ERR_INVALID_TIME:
+                *p_err =  NET_APP_ERR_INVALID_ARG;
+                 return (DEF_FAIL);
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                *p_err =  NET_APP_ERR_FAULT_TRANSITORY;
+                 return (DEF_FAIL);
+
+
+            default:
+                *p_err =  NET_APP_ERR_FAULT;
+                 return (DEF_FAIL);
+        }
+
+    } else {
+        timeout_cfgd = DEF_NO;
+    }
+
+
+                                                                /* ------------------ CONN APP SOCK ------------------- */
+    retry_cnt = 0u;
+    done      = DEF_NO;
+    dly       = DEF_NO;
+    rtn_code  = NET_SOCK_BSD_ERR_CONN;
+    err_rtn   = NET_APP_ERR_NONE_AVAIL;
+
+    while ((retry_cnt <= retry_max) &&                          /* While conn retry <= max retry ...                    */
+           (done      == DEF_NO)) {                             /* ... & conn NOT done,          ...                    */
+
+        if (dly == DEF_YES) {                                   /* Dly conn, on retries.                                */
+            NetApp_TimeDly_ms(time_dly_ms, &err);
+        }
+                                                                /* ... conn sock.                                       */
+        rtn_code = NetSock_Conn((NET_SOCK_ID      ) sock_id,
+                                (NET_SOCK_ADDR   *) p_addr_remote,
+                                (NET_SOCK_ADDR_LEN)  addr_len,
+                                (NET_ERR         *)&err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_NONE;
+                 break;
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_SOCK_ERR_ADDR_IN_USE:                      /* If transitory conn err(s), ...                       */
+            case NET_SOCK_ERR_CONN_IN_USE:
+            case NET_SOCK_ERR_PORT_NBR_NONE_AVAIL:
+            case NET_SOCK_ERR_CONN_IN_PROGRESS:
+            case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+            case NET_CONN_ERR_NONE_AVAIL:
+            case NET_IPv4_ERR_ADDR_NONE_AVAIL:
+            case NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS:
+            case NET_ERR_IF_LINK_DOWN:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 retry_cnt++;
+                 dly     = DEF_YES;                             /* ... dly retry.                                       */
+                 err_rtn = NET_APP_ERR_NONE_AVAIL;
+                 break;
+
+
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_SOCK_ERR_INVALID_ADDR:
+            case NET_SOCK_ERR_INVALID_ADDR_LEN:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_ARG;             /* Rtn invalid arg err(s) [see Note #2].                */
+                 break;
+
+
+            case NET_SOCK_ERR_INVALID_OP:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_OP;              /* Rtn invalid op  err(s).                              */
+                 break;
+
+            case NET_SOCK_ERR_CONN_FAIL:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_CONN_FAIL;
+                 break;
+
+            case NET_IF_ERR_INVALID_IF:
+            case NET_SOCK_ERR_CLOSED:
+            case NET_SOCK_ERR_INVALID_FAMILY:
+            case NET_SOCK_ERR_INVALID_PROTOCOL:
+            case NET_SOCK_ERR_INVALID_STATE:
+            case NET_SOCK_ERR_FAULT:
+            case NET_ERR_FAULT_NULL_FNCT:
+            case NET_CONN_ERR_NOT_USED:
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_TYPE:
+            case NET_CONN_ERR_INVALID_PROTOCOL_IX:
+            case NET_CONN_ERR_INVALID_ADDR_LEN:
+            case NET_CONN_ERR_ADDR_NOT_USED:
+            case NET_CONN_ERR_ADDR_IN_USE:
+            default:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_FAULT;                   /* Rtn fatal err(s).                                    */
+                 break;
+        }
+    }
+
+
+                                                                /* --------- RESTORE PREV CFG'D CONN TIMEOUT ---------- */
+    if (timeout_cfgd == DEF_YES) {                              /* If timeout cfg'd, ...                                */
+                                                                /* ... restore prev'ly cfg'd conn timeout.              */
+        NetSock_CfgTimeoutConnReqSet(sock_id, timeout_ms_cfgd, &err);
+    }
+
+
+    rtn_status = (rtn_code == NET_SOCK_BSD_ERR_NONE) ? DEF_OK : DEF_FAIL;
+   *p_err       =  err_rtn;
+
+    return (rtn_status);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetApp_SockListen()
+*
+* Description : Set an application socket to listen for connection requests, with error handling.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to listen (see Note #2).
+*
+*               sock_q_size     Maximum number of connection requests to accept & queue on listen socket.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE                Application socket successfully set to
+*                                                                   listen.
+*                               NET_APP_ERR_INVALID_ARG         Invalid argument(s)  [see Note #1].
+*                               NET_APP_ERR_INVALID_OP          Invalid operation(s) [see Note #1].
+*                               NET_APP_ERR_FAULT_TRANSITORY    Transitory    fault(s); listen aborted but
+*                                                                   MIGHT listen in a subsequent attempt.
+*                               NET_APP_ERR_FAULT               Socket listen fault(s); listen aborted &
+*                                                                   socket SHOULD be closed.
+*
+* Return(s)   : DEF_OK,   application socket successfully set to listen.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Socket arguments &/or operations validated in network socket handler functions.  Some
+*                   arguments validated only if validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_EXT_EN
+*                   is DEF_ENABLED in 'net_cfg.h').
+*
+*               (2) Socket listen operation valid for stream-type sockets only.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetApp_SockListen (NET_SOCK_ID       sock_id,
+                                NET_SOCK_Q_SIZE   sock_q_size,
+                                NET_ERR          *p_err)
+{
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN                /* See Note #2.                                         */
+    NET_SOCK_RTN_CODE  rtn_code;
+    CPU_BOOLEAN        rtn_status;
+    NET_ERR            err;
+    NET_ERR            err_rtn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                /* -------------- SET APP SOCK TO LISTEN -------------- */
+    rtn_code = NetSock_Listen((NET_SOCK_ID    ) sock_id,
+                              (NET_SOCK_Q_SIZE) sock_q_size,
+                              (NET_ERR       *)&err);
+    switch (err) {
+        case NET_SOCK_ERR_NONE:
+             err_rtn = NET_APP_ERR_NONE;
+             break;
+
+
+        case NET_SOCK_ERR_NOT_USED:
+        case NET_SOCK_ERR_INVALID_TYPE:
+        case NET_SOCK_ERR_INVALID_SOCK:
+             err_rtn = NET_APP_ERR_INVALID_ARG;                 /* Rtn invalid arg err(s) [see Note #1].                */
+             break;
+
+
+        case NET_SOCK_ERR_INVALID_OP:
+             err_rtn = NET_APP_ERR_INVALID_OP;                  /* Rtn invalid op  err(s).                              */
+             break;
+
+
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_ERR_FAULT_LOCK_ACQUIRE:
+             err_rtn = NET_APP_ERR_FAULT_TRANSITORY;            /* Rtn transitory  err(s).                              */
+             break;
+
+
+        case NET_SOCK_ERR_CLOSED:
+        case NET_SOCK_ERR_INVALID_FAMILY:
+        case NET_SOCK_ERR_INVALID_PROTOCOL:
+        case NET_SOCK_ERR_INVALID_STATE:
+        case NET_SOCK_ERR_CONN_FAIL:
+        case NET_CONN_ERR_NOT_USED:
+        case NET_CONN_ERR_INVALID_CONN:
+        default:
+             err_rtn = NET_APP_ERR_FAULT;                       /* Rtn fatal       err(s).                              */
+             break;
+    }
+
+    rtn_status = (rtn_code == NET_SOCK_BSD_ERR_NONE) ? DEF_OK : DEF_FAIL;
+   *p_err       =  err_rtn;
+
+    return (rtn_status);
+
+
+#else
+   (void)&sock_id;                                              /* Prevent 'variable unused' compiler warnings.         */
+   (void)&sock_q_size;
+
+   *p_err =  NET_APP_ERR_INVALID_ARG;
+    return (DEF_FAIL);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetApp_SockAccept()
+*
+* Description : (1) Return a new application socket accepted from a listen application socket, with
+*                       error handling :
+*
+*                   (a) Configure accept timeout, if any
+*                   (b) Wait for  accept socket
+*                   (c) Restore   accept timeout, if necessary
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of listen socket (see Note #3).
+*
+*               p_addr_remote   Pointer to an address buffer that will receive the socket address structure
+*                                   of the accepted socket's remote address (see Note #4).
+*
+*               p_addr_len      Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address buffer pointed to by 'p_addr_remote'.
+*                                   (b) (1) Return the actual size of socket address structure with the
+*                                               accepted socket's remote address, if NO error(s);
+*                                       (2) Return 0,                             otherwise.
+*
+*               retry_max       Maximum number of consecutive socket accept retries   (see Note #5a1).
+*
+*               timeout_ms      Socket accept timeout value per attempt/retry         (see Note #5b1) :
+*
+*                                   0,                          if current configured timeout value desired.
+*                                   NET_TMR_TIME_INFINITE,      if infinite (i.e. NO timeout) value desired.
+*                                   In number of milliseconds,  otherwise.
+*
+*               time_dly_ms     Transitory socket accept delay value, in milliseconds (see Note #5b2).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE                New application socket successfully accepted.
+*                               NET_APP_ERR_NONE_AVAIL          NO available    sockets to accept.
+*                               NET_APP_ERR_INVALID_ARG         Invalid argument(s)  [see Note #2].
+*                               NET_APP_ERR_INVALID_OP          Invalid operation(s) [see Note #2].
+*                               NET_APP_ERR_FAULT_TRANSITORY    Transitory    fault(s); accept aborted but
+*                                                                   MIGHT accept in a subsequent attempt.
+*                               NET_APP_ERR_FAULT               Socket accept fault(s); accept aborted &
+*                                                                   socket SHOULD be closed.
+*
+* Return(s)   : Socket descriptor/handle identifier of new accepted socket, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_ACCEPT,                                    otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) Socket arguments &/or operations validated in network socket handler functions.  Some
+*                   arguments validated only if validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_EXT_EN
+*                   is DEF_ENABLED in 'net_cfg.h').
+*
+*               (3) Socket accept operation valid for stream-type sockets only.
+*
+*               (4) (a) Socket address structure 'AddrFamily' member returned in host-order & SHOULD NOT
+*                       be converted to network-order.
+*
+*                   (b) Socket address structure addresses returned in network-order & SHOULD be converted
+*                       from network-order to host-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'
+*                          & 'net_sock.c  NetSock_Accept()                   Note #3'.
+*
+*               (5) (a) (1) If a non-zero number of retries is requested                AND ...
+*                       (2) global socket blocking ('NET_SOCK_CFG_BLOCK_SEL') is configured ...
+*                           for non-blocking operation ('NET_SOCK_BLOCK_SEL_NO_BLOCK');     ...
+*
+*                   (b) ... then one or more of the following SHOULD also be requested; otherwise, all
+*                       retries will most likely fail immediately since no time will elapse to wait for
+*                       & allow socket operation(s) to successfully complete :
+*
+*                       (1) A non-zero timeout
+*                       (2) A non-zero time delay
+*
+*               (6) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+NET_SOCK_ID  NetApp_SockAccept (NET_SOCK_ID         sock_id,
+                                NET_SOCK_ADDR      *p_addr_remote,
+                                NET_SOCK_ADDR_LEN  *p_addr_len,
+                                CPU_INT16U          retry_max,
+                                CPU_INT32U          timeout_ms,
+                                CPU_INT32U          time_dly_ms,
+                                NET_ERR            *p_err)
+{
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN                /* See Note #3.                                         */
+    NET_SOCK_ADDR_LEN  addr_len;
+    NET_SOCK_ADDR_LEN  addr_len_unused;
+    NET_SOCK_ID        sock_id_accept;
+    CPU_INT16U         retry_cnt;
+    CPU_INT32U         timeout_ms_cfgd;
+    CPU_BOOLEAN        timeout_cfgd;
+    CPU_BOOLEAN        done;
+    CPU_BOOLEAN        dly;
+    NET_ERR            err;
+    NET_ERR            err_rtn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_SOCK_ID)0);
+    }
+#endif
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    if (p_addr_len != (NET_SOCK_ADDR_LEN *) 0) {                /* If avail,               ...                          */
+         addr_len  = *p_addr_len;                               /* ... save init addr len; ...                          */
+    } else {
+        p_addr_len  = (NET_SOCK_ADDR_LEN *)&addr_len_unused;    /* ... else re-cfg NULL rtn ptr to unused local var.    */
+         addr_len  =  0;
+       (void)&addr_len_unused;                                  /* Prevent possible 'variable unused' warning.          */
+    }
+   *p_addr_len = 0;                                             /* Cfg dflt addr len for err (see Note #6).             */
+
+
+                                                                /* ---------------- CFG ACCEPT TIMEOUT ---------------- */
+    if (timeout_ms > 0) {                                       /* If timeout avail,         ...                        */
+                                                                /* ... save cfg'd accept timeout ...                    */
+        timeout_ms_cfgd = NetSock_CfgTimeoutConnAcceptGet_ms(sock_id, &err);
+                                                                /* ... & cfg temp accept timeout.                       */
+        NetSock_CfgTimeoutConnAcceptSet(sock_id, timeout_ms, &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 timeout_cfgd = DEF_YES;
+                 break;
+
+
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_ERR_INVALID_TIME:
+                *p_err =  NET_APP_ERR_INVALID_ARG;
+                 return (NET_SOCK_BSD_ERR_ACCEPT);
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                *p_err =  NET_APP_ERR_FAULT_TRANSITORY;
+                 return (NET_SOCK_BSD_ERR_ACCEPT);
+
+
+            default:
+                *p_err =  NET_APP_ERR_FAULT;
+                 return (NET_SOCK_BSD_ERR_ACCEPT);
+        }
+
+    } else {
+        timeout_cfgd = DEF_NO;
+    }
+
+
+                                                                /* ------------- WAIT FOR APP ACCEPT SOCK ------------- */
+    retry_cnt      = 0u;
+    done           = DEF_NO;
+    dly            = DEF_NO;
+    sock_id_accept = NET_SOCK_BSD_ERR_ACCEPT;
+    err_rtn        = NET_APP_ERR_NONE_AVAIL;
+
+    while ((retry_cnt <= retry_max) &&                          /* While accept retry <= max retry ...                  */
+           (done      == DEF_NO)) {                             /* ... & accept NOT done,          ...                  */
+
+        if (dly == DEF_YES) {                                   /* Dly accept, on retries.                              */
+            NetApp_TimeDly_ms(time_dly_ms, &err);
+        }
+                                                                /* ... wait for accept sock.                            */
+       *p_addr_len     = addr_len;
+        sock_id_accept = NetSock_Accept((NET_SOCK_ID        ) sock_id,
+                                        (NET_SOCK_ADDR     *) p_addr_remote,
+                                        (NET_SOCK_ADDR_LEN *) p_addr_len,
+                                        (NET_ERR           *)&err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_NONE;
+                 break;
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_SOCK_ERR_NONE_AVAIL:                       /* If transitory accept err(s), ...                     */
+            case NET_SOCK_ERR_CONN_ACCEPT_Q_NONE_AVAIL:
+            case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 retry_cnt++;
+                 dly     = DEF_YES;                             /* ... dly retry.                                       */
+                 err_rtn = NET_APP_ERR_NONE_AVAIL;
+                 break;
+
+
+            case NET_ERR_FAULT_NULL_PTR:
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_SOCK_ERR_INVALID_ADDR_LEN:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_ARG;             /* Rtn invalid arg err(s) [see Note #2].                */
+                 break;
+
+
+            case NET_SOCK_ERR_INVALID_OP:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_OP;              /* Rtn invalid op  err(s).                              */
+                 break;
+
+
+            case NET_SOCK_ERR_CLOSED:
+            case NET_SOCK_ERR_INVALID_FAMILY:
+            case NET_SOCK_ERR_INVALID_STATE:
+            case NET_SOCK_ERR_CONN_FAIL:
+            case NET_SOCK_ERR_FAULT:
+            default:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_FAULT;                   /* Rtn fatal err(s).                                    */
+                 break;
+        }
+    }
+
+
+                                                                /* -------- RESTORE PREV CFG'D ACCEPT TIMEOUT --------- */
+    if (timeout_cfgd == DEF_YES) {                              /* If timeout cfg'd, ...                                */
+                                                                /* ... restore prev'ly cfg'd accept timeout.            */
+        NetSock_CfgTimeoutConnAcceptSet(sock_id, timeout_ms_cfgd, &err);
+    }
+
+
+   *p_err =  err_rtn;
+
+    return (sock_id_accept);
+
+
+#else
+   (void)&sock_id;                                              /* Prevent 'variable unused' compiler warnings.         */
+   (void)&p_addr_remote;
+   (void)&p_addr_len;
+   (void)&retry_max;
+   (void)&timeout_ms;
+   (void)&time_dly_ms;
+
+   *p_err =  NET_APP_ERR_INVALID_ARG;
+    return (NET_SOCK_BSD_ERR_ACCEPT);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetApp_SockRx()
+*
+* Description : (1) Receive application data via socket, with error handling :
+*
+*                   (a) Validate  receive arguments
+*                   (b) Configure receive timeout, if any
+*                   (c) Receive   application data via socket
+*                   (d) Restore   receive timeout, if necessary
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to receive application data.
+*
+*               p_data_buf      Pointer to an application data buffer that will  receive application data.
+*
+*               data_buf_len    Size of the   application data buffer (in octets).
+*
+*               data_rx_th      Application data receive threshold :
+*
+*                                   0,                                  NO minimum receive threshold; i.e.
+*                                                                           receive ANY amount of data.
+*                                                                           Recommended for datagram sockets
+*                                                                           (see Note #4a1).
+*                                   Minimum amount of application data
+*                                       to receive (in octets) within
+*                                       maximum number of retries,      otherwise.
+*
+*               flags           Flags to select receive options; bit-field flags logically OR'd :
+*
+*                                       NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                       NET_SOCK_FLAG_RX_DATA_PEEK      Receive socket data without consuming
+*                                                                           the socket data; i.e. socket data
+*                                                                           NOT removed from application receive
+*                                                                           queue(s).
+*                                       NET_SOCK_FLAG_RX_NO_BLOCK       Receive socket data without blocking.
+*
+*               p_addr_remote   Pointer to an address buffer that will receive the socket address structure
+*                                   with the received data's remote address (see Note #3), if NO error(s);
+*                                   recommended for datagram sockets, optional for stream sockets.
+*
+*               p_addr_len      Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address buffer pointed to by 'p_addr_remote'.
+*                                   (b) (1) Return the actual size of socket address structure with the
+*                                               received data's remote address, if NO error(s);
+*                                       (2) Return 0,                           otherwise.
+*
+*               retry_max       Maximum number of consecutive socket receive retries   (see Note #5a1).
+*
+*               timeout_ms      Socket receive timeout value per attempt/retry         (see Note #5b1) :
+*
+*                                   0,                          if current configured timeout value desired.
+*                                   NET_TMR_TIME_INFINITE,      if infinite (i.e. NO timeout) value desired.
+*                                   In number of milliseconds,  otherwise.
+*
+*               time_dly_ms     Transitory socket receive delay value, in milliseconds (see Note #5b2).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE                Application data successfully received; check
+*                                                                   return value for number of data octets
+*                                                                   received.
+*
+*                               NET_APP_ERR_DATA_BUF_OVF        Application data successfully received; check
+*                                                                   return value for number of data octets
+*                                                                   received.  However, some application data
+*                                                                   MAY have been discarded (see Note #4a).
+*
+*                               NET_APP_ERR_CONN_CLOSED         Socket connection closed.  However, some
+*                                                                   application data MAY have successfully
+*                                                                   been received; check return value for
+*                                                                   number of data octets received.
+*
+*                               NET_APP_ERR_FAULT_TRANSITORY    Transitory        fault(s); receive aborted
+*                                                                   but MIGHT receive in a subsequent attempt.
+*                               NET_APP_ERR_FAULT               Socket connection fault(s); connection(s)
+*                                                                   aborted & socket SHOULD be closed.
+*
+*                               NET_APP_ERR_INVALID_ARG         Invalid argument(s)  [see Note #2].
+*                               NET_APP_ERR_INVALID_OP          Invalid operation(s) [see Note #2].
+*
+*                               NET_ERR_RX                      Transitory receive error(s).  However, some
+*                                                                   application data MAY have successfully
+*                                                                   been received; check return value for
+*                                                                   number of data octets received.
+*
+* Return(s)   : Number of positive data octets received, if NO error(s).
+*
+*               0,                                       otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) Socket arguments &/or operations validated in network socket handler functions.  Some
+*                   arguments validated only if validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_EXT_EN
+*                   is DEF_ENABLED in 'net_cfg.h').
+*
+*               (3) (a) Socket address structure 'AddrFamily' member returned in host-order & SHOULD NOT
+*                       be converted to network-order.
+*
+*                   (b) Socket address structure addresses returned in network-order & SHOULD be converted
+*                       from network-order to host-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (4) (a) (1) (A) Datagram-type sockets transmit & receive all data atomically -- i.e. every
+*                               single, complete datagram transmitted MUST be received as a single, complete
+*                               datagram.
+*
+*                           (B) IEEE Std 1003.1, 2004 Edition, Section 'recvfrom() : DESCRIPTION' summarizes
+*                               that "for message-based sockets, such as ... SOCK_DGRAM ... the entire message
+*                               shall be read in a single operation.  If a message is too long to fit in the
+*                               supplied buffer, and MSG_PEEK is not set in the flags argument, the excess
+*                               bytes shall be discarded".
+*
+*                       (2) Thus if the socket's type is datagram & the receive data buffer size is
+*                           NOT large enough for the received data, the receive data buffer is maximally
+*                           filled with receive data but the remaining data octets are discarded &
+*                           NET_APP_ERR_DATA_BUF_OVF error is returned.
+*
+*                   (b) (1) (A) Stream-type sockets transmit & receive all data octets in one or more
+*                               non-distinct packets.  In other words, the application data is NOT
+*                               bounded by any specific packet(s); rather, it is contiguous & sequenced
+*                               from one packet to the next.
+*
+*                           (B) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes
+*                               that "for stream-based sockets, such as SOCK_STREAM, message boundaries
+*                               shall be ignored.  In this case, data shall be returned to the user as
+*                               soon as it becomes available, and no data shall be discarded".
+*
+*                       (2) Thus if the socket's type is stream & the receive data buffer size is NOT
+*                           large enough for the received data, the receive data buffer is maximally
+*                           filled with receive data & the remaining data octets remain queued for
+*                           later application receives.
+*
+*                   See also 'net_sock.c  NetSock_RxDataHandler()  Note #2'.
+*
+*               (5) (a) (1) If a non-zero number of retries is requested                    AND
+*                       (2) (A) global socket blocking ('NET_SOCK_CFG_BLOCK_SEL') is configured
+*                               for non-blocking operation ('NET_SOCK_BLOCK_SEL_NO_BLOCK'), OR
+*                           (B) socket 'flags' argument set to 'NET_SOCK_FLAG_RX_BLOCK';
+*
+*                   (b) ... then one or more of the following SHOULD also be requested; otherwise, all
+*                       retries will most likely fail immediately since no time will elapse to wait for
+*                       & allow socket operation(s) to successfully complete :
+*
+*                       (1) A non-zero timeout
+*                       (2) A non-zero time delay
+*
+*               (6) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetApp_SockRx (NET_SOCK_ID          sock_id,
+                           void                *p_data_buf,
+                           CPU_INT16U           data_buf_len,
+                           CPU_INT16U           data_rx_th,
+                           NET_SOCK_API_FLAGS   flags,
+                           NET_SOCK_ADDR       *p_addr_remote,
+                           NET_SOCK_ADDR_LEN   *p_addr_len,
+                           CPU_INT16U           retry_max,
+                           CPU_INT32U           timeout_ms,
+                           CPU_INT32U           time_dly_ms,
+                           NET_ERR             *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    NET_SOCK_ADDR_LEN  *p_addr_len_init;
+#endif
+    NET_SOCK_ADDR_LEN   addr_len;
+    NET_SOCK_ADDR_LEN   addr_len_unused;
+    NET_SOCK_ADDR_LEN   addr_len_temp;
+    NET_SOCK_ADDR       addr_temp;
+    CPU_INT08U         *p_data_buf_rem;
+    CPU_INT16U          data_buf_len_rem;
+    CPU_INT16S          rx_len;
+    CPU_INT16U          rx_len_tot;
+    CPU_INT16U          rx_th_actual;
+    CPU_INT16U          retry_cnt;
+    CPU_INT32U          timeout_ms_cfgd;
+    CPU_BOOLEAN         timeout_cfgd;
+    CPU_BOOLEAN         done;
+    CPU_BOOLEAN         dly;
+    NET_ERR             err;
+    NET_ERR             err_rtn;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(0u);
+    }
+                                                                /* ----------------- VALIDATE RX ADDR ----------------- */
+    p_addr_len_init = (NET_SOCK_ADDR_LEN *) p_addr_len;
+#endif
+    if (p_addr_len != (NET_SOCK_ADDR_LEN *) 0) {                /* If avail,               ...                          */
+         addr_len  = (NET_SOCK_ADDR_LEN  )*p_addr_len;          /* ... save init addr len; ...                          */
+    } else {
+        p_addr_len  = (NET_SOCK_ADDR_LEN *)&addr_len_unused;    /* ... else re-cfg NULL rtn ptr to unused local var.    */
+         addr_len  = (NET_SOCK_ADDR_LEN  ) 0;
+       (void)&addr_len_unused;                                  /* Prevent possible 'variable unused' warning.          */
+    }
+   *p_addr_len = 0;                                             /* Cfg dflt addr len for err (see Note #6).             */
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (((p_addr_remote   != (NET_SOCK_ADDR     *)0)  &&        /* If (remote addr         avail BUT ..                 */
+         (p_addr_len_init == (NET_SOCK_ADDR_LEN *)0)) ||        /* ..  remote addr len NOT avail) OR ..                 */
+        ((p_addr_remote   == (NET_SOCK_ADDR     *)0)  &&        /* .. (remote addr     NOT avail BUT ..                 */
+         (p_addr_len_init != (NET_SOCK_ADDR_LEN *)0))) {        /* ..  remote addr len     avail),   ..                 */
+         *p_err =  NET_APP_ERR_INVALID_ARG;                     /* ..  rtn err.                                         */
+          return (0u);
+    }
+#endif
+    if (p_addr_remote == (NET_SOCK_ADDR     *) 0) {             /* If remote addr/addr len NOT avail, ...               */
+        p_addr_remote  = (NET_SOCK_ADDR     *)&addr_temp;       /* ...   use temp addr                ...               */
+        p_addr_len     = (NET_SOCK_ADDR_LEN *)&addr_len_temp;   /* ...     & temp addr len.                             */
+         addr_len     = (NET_SOCK_ADDR_LEN  ) sizeof(addr_temp);/* Save init temp addr len.                             */
+    }
+
+                                                                /* --------------- VALIDATE DATA RX TH ---------------- */
+    if (data_rx_th   < 1) {
+        rx_th_actual = 1u;                                      /* Lim rx th to at least 1 octet ...                    */
+    } else if (data_rx_th > data_buf_len) {
+        rx_th_actual = data_buf_len;                            /* ... & max of app buf data len.                       */
+    } else {
+        rx_th_actual = data_rx_th;
+    }
+
+
+                                                                /* ------------------ CFG RX TIMEOUT ------------------ */
+    if (timeout_ms > 0) {                                       /* If timeout avail,         ...                        */
+                                                                /* ... save cfg'd rx timeout ...                        */
+        timeout_ms_cfgd = NetSock_CfgTimeoutRxQ_Get_ms(sock_id, &err);
+                                                                /* ... & cfg temp rx timeout.                           */
+        NetSock_CfgTimeoutRxQ_Set(sock_id, timeout_ms, &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 timeout_cfgd = DEF_YES;
+                 break;
+
+
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_ERR_INVALID_TIME:
+                *p_err =  NET_APP_ERR_INVALID_ARG;
+                 return (0u);
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                *p_err =  NET_APP_ERR_FAULT_TRANSITORY;
+                 return (0u);
+
+
+            case NET_SOCK_ERR_INVALID_PROTOCOL:
+            case NET_CONN_ERR_NOT_USED:
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_INVALID_CONN:
+            default:
+                *p_err =  NET_APP_ERR_FAULT;
+                 return (0u);
+        }
+
+    } else {
+        timeout_cfgd = DEF_NO;
+    }
+
+
+                                                                /* ------------------- RX APP DATA -------------------- */
+    rx_len_tot = 0u;
+    retry_cnt  = 0u;
+    done       = DEF_NO;
+    dly        = DEF_NO;
+    err_rtn    = NET_ERR_RX;
+
+    while ((rx_len_tot <  rx_th_actual) &&                      /* While rx tot len <  rx th     ...                    */
+           (retry_cnt  <= retry_max)    &&                      /* ... & rx retry   <= max retry ...                    */
+           (done       == DEF_NO)) {                            /* ... & rx NOT done,            ...                    */
+
+        if (dly == DEF_YES) {                                   /* Dly rx, on retries.                                  */
+            NetApp_TimeDly_ms(time_dly_ms, &err);
+        }
+                                                                /* ... rx app data.                                     */
+       *p_addr_len        = (NET_SOCK_ADDR_LEN) addr_len;
+        p_data_buf_rem    = (CPU_INT08U      *)p_data_buf    + rx_len_tot;
+        data_buf_len_rem  = (CPU_INT16U       )(data_buf_len - rx_len_tot);
+        rx_len            = (CPU_INT16S       ) NetSock_RxDataFrom((NET_SOCK_ID        ) sock_id,
+                                                                   (void              *) p_data_buf_rem,
+                                                                   (CPU_INT16U         ) data_buf_len_rem,
+                                                                   (NET_SOCK_API_FLAGS ) flags,
+                                                                   (NET_SOCK_ADDR     *) p_addr_remote,
+                                                                   (NET_SOCK_ADDR_LEN *) p_addr_len,
+                                                                   (void              *) 0,
+                                                                   (CPU_INT08U         ) 0u,
+                                                                   (CPU_INT08U        *) 0,
+                                                                   (NET_ERR           *)&err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+            case NET_SOCK_ERR_INVALID_DATA_SIZE:
+                 if (rx_len > 0) {                              /* If          rx len > 0, ...                          */
+                     rx_len_tot += (CPU_INT16U)rx_len;          /* ... inc tot rx len.                                  */
+                 }
+
+                 if (err == NET_SOCK_ERR_INVALID_DATA_SIZE) {   /* If app data buf NOT large enough for all rx'd data,  */
+                     done      = DEF_YES;
+                     err_rtn   = NET_APP_ERR_DATA_BUF_OVF;      /* .. rtn data buf ovf err (see Note #4a2).             */
+
+                 } else {
+                     retry_cnt = 0u;
+                     dly       = DEF_NO;
+                     err_rtn   = NET_APP_ERR_NONE;
+                 }
+                 break;
+
+
+            case NET_ERR_RX:                                    /* If transitory rx err(s), ...                         */
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_SOCK_ERR_RX_Q_EMPTY:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 retry_cnt++;
+                 dly     = DEF_YES;                             /* ... dly next rx.                                     */
+                 err_rtn = NET_ERR_RX;
+                 break;
+
+
+            case NET_SOCK_ERR_CLOSED:
+            case NET_SOCK_ERR_RX_Q_CLOSED:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_CONN_CLOSED;             /* Rtn conn closed.                                     */
+                 break;
+
+
+            case NET_ERR_FAULT_NULL_PTR:
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_SOCK_ERR_INVALID_FLAG:
+            case NET_SOCK_ERR_INVALID_ADDR_LEN:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_ARG;             /* Rtn invalid arg err(s) [see Note #1].                */
+                 break;
+
+
+            case NET_SOCK_ERR_INVALID_OP:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_OP;              /* Rtn invalid op  err(s).                              */
+                 break;
+
+
+            case NET_SOCK_ERR_INVALID_FAMILY:
+            case NET_SOCK_ERR_INVALID_PROTOCOL:
+            case NET_SOCK_ERR_INVALID_STATE:
+            case NET_SOCK_ERR_CONN_FAIL:
+            case NET_SOCK_ERR_FAULT:
+            case NET_ERR_FAULT_NULL_FNCT:
+            case NET_CONN_ERR_NOT_USED:
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_CONN_ERR_INVALID_ADDR_LEN:
+            case NET_CONN_ERR_ADDR_NOT_USED:
+            default:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_FAULT;                   /* Rtn fatal err(s).                                    */
+                 break;
+        }
+    }
+
+
+                                                                /* ---------- RESTORE PREV CFG'D RX TIMEOUT ----------- */
+    if (timeout_cfgd == DEF_YES) {                              /* If timeout cfg'd, ...                                */
+                                                                /* ... restore prev'ly cfg'd rx timeout.                */
+        NetSock_CfgTimeoutRxQ_Set(sock_id, timeout_ms_cfgd, &err);
+    }
+
+
+   *p_err =  err_rtn;
+
+    return (rx_len_tot);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetApp_SockTx()
+*
+* Description : (1) Transmit application data via socket, with error handling :
+*
+*                   (a) Configure transmit timeout, if any
+*                   (b) Transmit  application data via socket
+*                   (c) Restore   transmit timeout, if necessary
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to transmit application data.
+*
+*               p_data          Pointer to application data to transmit.
+*
+*               data_len        Length  of application data to transmit (in octets).
+*
+*               flags           Flags to select transmit options; bit-field flags logically OR'd :
+*
+*                                   NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                   NET_SOCK_FLAG_TX_NO_BLOCK       Transmit socket data without blocking.
+*
+*               p_addr_remote   Pointer to destination address buffer (see Note #3);
+*                                   required for datagram sockets, optional for stream sockets.
+*
+*               addr_len        Length of  destination address buffer (in octets).
+*
+*               retry_max       Maximum number of consecutive socket transmit retries   (see Note #4a1).
+*
+*               timeout_ms      Socket transmit timeout value per attempt/retry         (see Note #4b1) :
+*
+*                                   0,                          if current configured timeout value desired
+*                                                                   [or NO timeout for datagram sockets
+*                                                                   (see Note #5)].
+*                                   NET_TMR_TIME_INFINITE,      if infinite (i.e. NO timeout) value desired.
+*                                   In number of milliseconds,  otherwise.
+*
+*               time_dly_ms     Transitory socket transmit delay value, in milliseconds (see Note #4b2).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE                Application data successfully transmitted
+*                                                                   &/or queued for transmission; check
+*                                                                   return value for number of data octets
+*                                                                   transmitted.
+*
+*                               NET_APP_ERR_CONN_CLOSED         Socket connection closed.  However, some
+*                                                                   application data MAY have successfully
+*                                                                   transmitted; check return value for
+*                                                                   number of data octets transmitted.
+*
+*                               NET_APP_ERR_FAULT_TRANSITORY    Transitory        fault(s); transmit aborted
+*                                                                   but MIGHT transmit in a subsequent attempt.
+*                               NET_APP_ERR_FAULT               Socket connection fault(s); connection(s)
+*                                                                   aborted & socket SHOULD be closed.
+*
+*                               NET_APP_ERR_INVALID_ARG         Invalid argument(s)  [see Note #2].
+*                               NET_APP_ERR_INVALID_OP          Invalid operation(s) [see Note #2].
+*
+*                               NET_ERR_TX                      Transitory transmit error(s).  However, some
+*                                                                   application data MAY have successfully
+*                                                                   transmitted; check return value for
+*                                                                   number of data octets transmitted.
+*
+* Return(s)   : Number of positive data octets transmitted, if NO error(s).
+*
+*               0,                                          otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) Socket arguments &/or operations validated in network socket handler functions.  Some
+*                   arguments validated only if validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_EXT_EN
+*                   is DEF_ENABLED in 'net_cfg.h').
+*
+*               (3) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (4) (a) (1) If a non-zero number of retries is requested                    AND ...
+*                       (2) (A) global socket blocking ('NET_SOCK_CFG_BLOCK_SEL') is configured ...
+*                               for non-blocking operation ('NET_SOCK_BLOCK_SEL_NO_BLOCK'), OR  ...
+*                           (B) socket 'flags' argument set to 'NET_SOCK_FLAG_TX_BLOCK';        ...
+*
+*                   (b) ... then one or more of the following SHOULD also be requested; otherwise, all
+*                       retries will most likely fail immediately since no time will elapse to wait for
+*                       & allow socket operation(s) to successfully complete :
+*
+*                       (1) A non-zero timeout
+*                       (2) A non-zero time delay
+*
+*               (5) Datagram sockets NOT currently blocked during transmit & therefore require NO
+*                   transmit timeout.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutTxQ_Set()  Note #2b'.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetApp_SockTx (NET_SOCK_ID          sock_id,
+                           void                *p_data,
+                           CPU_INT16U           data_len,
+                           NET_SOCK_API_FLAGS   flags,
+                           NET_SOCK_ADDR       *p_addr_remote,
+                           NET_SOCK_ADDR_LEN    addr_len,
+                           CPU_INT16U           retry_max,
+                           CPU_INT32U           timeout_ms,
+                           CPU_INT32U           time_dly_ms,
+                           NET_ERR             *p_err)
+{
+    CPU_INT08U   *p_data_buf;
+    CPU_INT16U    data_buf_len;
+    CPU_INT16S    tx_len;
+    CPU_INT16U    tx_len_tot;
+    CPU_INT16U    retry_cnt;
+    CPU_INT32U    timeout_ms_cfgd;
+    CPU_BOOLEAN   timeout_cfgd;
+    CPU_BOOLEAN   done;
+    CPU_BOOLEAN   dly;
+    NET_ERR       err;
+    NET_ERR       err_rtn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(0u);
+    }
+#endif
+                                                                /* ------------------ CFG TX TIMEOUT ------------------ */
+    if (timeout_ms > 0) {                                       /* If timeout avail,         ...                        */
+                                                                /* ... save cfg'd tx timeout ...                        */
+        timeout_ms_cfgd = NetSock_CfgTimeoutTxQ_Get_ms(sock_id, &err);
+                                                                /* ... & cfg temp tx timeout.                           */
+        NetSock_CfgTimeoutTxQ_Set(sock_id, timeout_ms, &err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 timeout_cfgd = DEF_YES;
+                 break;
+
+
+            case NET_SOCK_ERR_INVALID_TYPE:                     /* Datagram sock timeout NOT avail (see Note #5).       */
+                 timeout_cfgd = DEF_NO;
+                 break;
+
+
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_ERR_INVALID_TIME:
+                *p_err =  NET_APP_ERR_INVALID_ARG;
+                 return (0u);
+
+
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                *p_err =  NET_APP_ERR_FAULT_TRANSITORY;
+                 return (0u);
+
+
+            case NET_SOCK_ERR_INVALID_PROTOCOL:
+            case NET_CONN_ERR_NOT_USED:
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_INVALID_CONN:
+            default:
+                *p_err =  NET_APP_ERR_FAULT;
+                 return (0u);
+        }
+
+    } else {
+        timeout_cfgd = DEF_NO;
+    }
+
+
+                                                                /* ------------------- TX APP DATA -------------------- */
+    tx_len_tot = 0u;
+    retry_cnt  = 0u;
+    done       = DEF_NO;
+    dly        = DEF_NO;
+    err_rtn    = NET_ERR_TX;
+
+    while ((tx_len_tot <  data_len ) &&                         /* While tx tot len <  app data len ...                 */
+           (retry_cnt  <= retry_max) &&                         /* ... & tx retry   <= max retry    ...                 */
+           (done       == DEF_NO)) {                            /* ... & tx NOT done,               ...                 */
+
+        if (dly == DEF_YES) {                                   /* Dly tx, on retries.                                  */
+            NetApp_TimeDly_ms(time_dly_ms, &err);
+        }
+                                                                /* ... tx app data.                                     */
+        p_data_buf    = (CPU_INT08U *)p_data     + tx_len_tot;
+        data_buf_len  = (CPU_INT16U  )( data_len - tx_len_tot);
+        tx_len        = (CPU_INT16S  )NetSock_TxDataTo((NET_SOCK_ID       ) sock_id,
+                                                       (void             *) p_data_buf,
+                                                       (CPU_INT16U        ) data_buf_len,
+                                                       (NET_SOCK_API_FLAGS) flags,
+                                                       (NET_SOCK_ADDR    *) p_addr_remote,
+                                                       (NET_SOCK_ADDR_LEN ) addr_len,
+                                                       (NET_ERR          *)&err);
+        switch (err) {
+            case NET_SOCK_ERR_NONE:
+                 if (tx_len > 0) {                              /* If          tx len > 0, ...                          */
+                     tx_len_tot += (CPU_INT16U)tx_len;          /* ... inc tot tx len.                                  */
+                 }
+                 retry_cnt = 0u;
+                 dly       = DEF_NO;
+                 err_rtn   = NET_APP_ERR_NONE;
+                 break;
+
+
+            case NET_ERR_TX:                                    /* If transitory tx err(s), ...                         */
+            case NET_INIT_ERR_NOT_COMPLETED:
+            case NET_SOCK_ERR_PORT_NBR_NONE_AVAIL:
+            case NET_CONN_ERR_NONE_AVAIL:
+            case NET_IPv4_ERR_ADDR_NONE_AVAIL:
+            case NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS:
+            case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 retry_cnt++;
+                 dly     = DEF_YES;                             /* ... dly next tx.                                     */
+                 err_rtn = NET_ERR_TX;
+                 break;
+
+
+            case NET_SOCK_ERR_CLOSED:
+            case NET_SOCK_ERR_TX_Q_CLOSED:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_CONN_CLOSED;             /* Rtn conn closed.                                     */
+                 break;
+
+
+            case NET_ERR_FAULT_NULL_PTR:
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_SOCK:
+            case NET_SOCK_ERR_INVALID_DATA_SIZE:
+            case NET_SOCK_ERR_INVALID_FLAG:
+            case NET_SOCK_ERR_INVALID_ADDR:
+            case NET_SOCK_ERR_INVALID_ADDR_LEN:
+            case NET_SOCK_ERR_INVALID_PORT_NBR:
+            case NET_SOCK_ERR_INVALID_CONN:
+            case NET_SOCK_ERR_ADDR_IN_USE:
+            case NET_CONN_ERR_ADDR_IN_USE:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_ARG;             /* Rtn invalid arg err(s) [see Note #1].                */
+                 break;
+
+
+            case NET_SOCK_ERR_INVALID_OP:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_INVALID_OP;              /* Rtn invalid op  err(s).                              */
+                 break;
+
+
+            case NET_IF_ERR_INVALID_IF:
+            case NET_SOCK_ERR_INVALID_FAMILY:
+            case NET_SOCK_ERR_INVALID_PROTOCOL:
+            case NET_SOCK_ERR_INVALID_STATE:
+            case NET_SOCK_ERR_CONN_FAIL:
+            case NET_SOCK_ERR_FAULT:
+            case NET_ERR_FAULT_NULL_FNCT:
+            case NET_CONN_ERR_NOT_USED:
+            case NET_CONN_ERR_INVALID_TYPE:
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_PROTOCOL_IX:
+            case NET_CONN_ERR_INVALID_ADDR_LEN:
+            case NET_CONN_ERR_ADDR_NOT_USED:
+            default:
+                 done    = DEF_YES;
+                 err_rtn = NET_APP_ERR_FAULT;                   /* Rtn fatal err(s).                                    */
+                 break;
+        }
+    }
+
+
+                                                                /* ---------- RESTORE PREV CFG'D TX TIMEOUT ----------- */
+    if (timeout_cfgd == DEF_YES) {                              /* If timeout cfg'd, ...                                */
+                                                                /* ... restore prev'ly cfg'd tx timeout.                */
+        NetSock_CfgTimeoutTxQ_Set(sock_id, timeout_ms_cfgd, &err);
+    }
+
+
+   *p_err =  err_rtn;
+
+    return (tx_len_tot);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetApp_SetSockAddr()
+*
+* Description : Setup a socket address from an IPv4 or an IPv6 address.
+*
+* Argument(s) : p_sock_addr     Pointer to the socket address that will be configure by this function :
+*
+*               addr_family     IP address family to configure, possible values:
+*
+*               port_nbr        Port number.
+*
+*               p_addr          Pointer to IP address to use.
+*
+*               addr_len        Length of the IP address to use.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE                        No error.
+*                               NET_ERR_FAULT_NULL_PTR                  Null pointer.
+*                               NET_APP_ERR_INVALID_ADDR_LEN            Invalid address length.
+*                               NET_APP_ERR_INVALID_ADDR_FAMILY         Invalid address family.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application,
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetApp_SetSockAddr (NET_SOCK_ADDR        *p_sock_addr,
+                          NET_SOCK_ADDR_FAMILY  addr_family,
+                          NET_PORT_NBR          port_nbr,
+                          CPU_INT08U           *p_addr,
+                          NET_IP_ADDR_LEN       addr_len,
+                          NET_ERR              *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_SOCK_ADDR_IPv4  *p_addr_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_SOCK_ADDR_IPv6  *p_addr_ipv6;
+#endif
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+
+    if (p_sock_addr == (NET_SOCK_ADDR *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (p_addr == (CPU_INT08U *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+    Mem_Clr(p_sock_addr, NET_SOCK_ADDR_SIZE);
+
+    switch(addr_family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_ADDR_FAMILY_IP_V4:
+            if (addr_len != NET_IPv4_ADDR_SIZE) {
+               *p_err = NET_APP_ERR_INVALID_ADDR_LEN;
+                return;
+            }
+
+            p_addr_ipv4             = (NET_SOCK_ADDR_IPv4 *)p_sock_addr;
+            p_addr_ipv4->AddrFamily =  NET_SOCK_ADDR_FAMILY_IP_V4;
+            p_addr_ipv4->Port       =  NET_UTIL_HOST_TO_NET_16(port_nbr);
+
+            NET_UTIL_VAL_COPY_GET_NET_32(&p_addr_ipv4->Addr, p_addr);
+            break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_ADDR_FAMILY_IP_V6:
+            if (addr_len != NET_IPv6_ADDR_SIZE) {
+               *p_err = NET_APP_ERR_INVALID_ADDR_LEN;
+                return;
+            }
+
+            p_addr_ipv6             = (NET_SOCK_ADDR_IPv6 *)p_sock_addr;
+            p_addr_ipv6->AddrFamily =  NET_SOCK_ADDR_FAMILY_IP_V6;
+            p_addr_ipv6->Port       =  NET_UTIL_HOST_TO_NET_16(port_nbr);
+
+            Mem_Copy((void     *)&p_addr_ipv6->Addr,
+                     (void     *) p_addr,
+                     (CPU_SIZE_T) addr_len);
+            break;
+#endif
+
+        default:
+            *p_err = NET_APP_ERR_INVALID_ADDR_FAMILY;
+             return;
+    }
+
+   *p_err = NET_APP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetApp_ClientStreamOpenByHostname()
+*
+* Description : (1) Connect a client to a server using his host name with a stream (TCP) socket
+*                   (select IP address automatically See Note #2):
+*
+*                   (a) Get IP address of the remote host from a string that contains either the IP address or
+*                       the host name that will be resolved using DNS (See Note #2).
+*
+*                   (b) Open a stream socket.
+*
+*                   (c) Connect a stream socket.
+*
+*
+* Argument(s) : p_sock_id           Pointer to a variable that will receive the socket ID opened from this function.
+*
+*               p_remote_host_name  Pointer to a string that contains the remote host name to resolve:*
+*                                       Can be an IP (IPv4 or IPv6) or a host name (resolved using DNS).
+*
+*               remote_port_nbr     Port of the remote host.
+*
+*               p_sock_addr         Pointer to a variable that will receive the socket address of the remote host.
+*
+*                                       DEF_NULL, if not required.
+*
+*               p_secure_cfg        Pointer to the secure configuration (TLS/SSL):
+*
+*                                       DEF_NULL, if no security enabled.
+*                                       Pointer to a structure that contains the parameters.
+*
+*                                       NOT used when socket type is NET_SOCK_TYPE_DATAGRAM
+*
+*               req_timeout_ms      Connection timeout in ms.
+*                                       NOT used when socket type is NET_SOCK_TYPE_DATAGRAM
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE
+*                               NET_ERR_FAULT_NULL_PTR
+*                               NET_ERR_FAULT_FEATURE_DIS
+*                               NET_APP_ERR_INVALID_ADDR_FAMILY
+*                               NET_APP_ERR_FAULT
+*
+* Return(s)   : NET_IP_ADDR_FAMILY_IPv4, if the connected successfully using an IPv4 address.
+*               NET_IP_ADDR_FAMILY_IPv6, if the connected successfully using an IPv6 address.
+*               NET_IP_ADDR_FAMILY_UNKNOWN, otherwise.
+*
+* Caller(s)   : Application,
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) When a host name is passed into the remote host name parameter, this function will try to
+*                   resolve the address of the remote host using DNS.
+*
+*                   (a) Obviously DNS must be present and enabled in the project to be possible.
+*
+*                   (b) If an IPv6 and an IPv4 address are found for the remote host. This function will first
+*                       try to connect to the remote host using the IPv6 address. If the connection fails using
+*                       IPv6 then a connection retry will occur using the IPv4 address.
+*
+*                   (c) This function always block, and the fail timeout depend of the DNS resolution timeout,
+*                       the number of remote address found and the connection timeout parameter.
+*
+*               (3) This function is in blocking mode, meaning that at the end of the function, the
+*                   socket will have succeed or failed to connect to the remote host.
+*********************************************************************************************************
+*/
+
+NET_IP_ADDR_FAMILY  NetApp_ClientStreamOpenByHostname (NET_SOCK_ID              *p_sock_id,
+                                                       CPU_CHAR                 *p_remote_host_name,
+                                                       NET_PORT_NBR              remote_port_nbr,
+                                                       NET_SOCK_ADDR            *p_sock_addr,
+                                                       NET_APP_SOCK_SECURE_CFG  *p_secure_cfg,
+                                                       CPU_INT32U                req_timeout_ms,
+                                                       NET_ERR                  *p_err)
+{
+    NET_IP_ADDR_FAMILY   addr_rtn = NET_IP_ADDR_FAMILY_UNKNOWN;
+    CPU_BOOLEAN          done     = DEF_NO;
+    CPU_INT08U           addr[NET_SOCK_BSD_ADDR_LEN_MAX];
+    NET_IP_ADDR_FAMILY   addr_family;
+    NET_SOCK_ADDR        sock_addr_local;
+    NET_SOCK_ADDR       *p_sock_addr_local;
+#ifdef  NET_EXT_MODULE_DNS_EN
+#if (defined(NET_IPv4_MODULE_EN) & \
+     defined(NET_IPv6_MODULE_EN))
+    CPU_BOOLEAN          switch_addr_type = DEF_NO;
+#endif
+    DNSc_STATUS          status;
+    DNSc_ERR             err;
+#endif
+
+
+                                                                /* ---------------- VALIDATE ARGUMENTS ---------------- */
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_sock_id == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_remote_host_name == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+
+#ifndef  NET_SECURE_MODULE_EN
+    if (p_secure_cfg != DEF_NULL) {
+       *p_err = NET_ERR_FAULT_FEATURE_DIS;
+        goto exit;
+    }
+#endif
+
+#endif
+
+                                                                /* -------------- SET ADDRESS IP FAMILY --------------- */
+#ifdef  NET_IPv6_MODULE_EN
+    addr_family = NET_IP_ADDR_FAMILY_IPv6;                      /* First try with IPv6 if enabled.                      */
+#else
+    addr_family = NET_IP_ADDR_FAMILY_IPv4;
+#endif
+
+                                                                /* ------------- SET SOCK ADDRESS POINTER ------------- */
+    if (p_sock_addr == DEF_NULL) {
+        p_sock_addr_local = &sock_addr_local;
+    } else {
+        p_sock_addr_local =  p_sock_addr;
+    }
+
+                                                                /* ------- RESOLVE ADDR, OPEN & CONNECT SOCKET -------- */
+    while (done == DEF_NO) {
+        CPU_BOOLEAN    connect;
+#ifdef  NET_EXT_MODULE_DNS_EN
+        DNSc_ADDR_OBJ  addr_dns;
+        DNSc_FLAGS     flags    = DNSc_FLAG_NONE;
+        CPU_INT08U     addr_nbr = 1u;
+
+                                                                /* ------------- RESOLVE REMOTE HOST ADDR ------------- */
+        switch (addr_family) {                                  /* Set DNS Parameters                                   */
+            case NET_IP_ADDR_FAMILY_IPv6:
+                 flags          |= DNSc_FLAG_IPv6_ONLY;         /* Get IPv6 address only.                               */
+                 break;
+
+            case NET_IP_ADDR_FAMILY_IPv4:
+                 flags          |= DNSc_FLAG_IPv4_ONLY;         /* Get IPv4 address only.                               */
+                 break;
+
+            default:
+                *p_err = NET_APP_ERR_INVALID_ADDR_FAMILY;
+                 goto exit;
+        }
+
+                                                                /* ------------------ DNS RESOLUTION ------------------ */
+        status = DNSc_GetHost(p_remote_host_name, &addr_dns, &addr_nbr, flags, DEF_NULL, &err);
+        switch (status) {
+            case DNSc_STATUS_RESOLVED:
+                 if (addr_nbr != 0) {
+                     Mem_Copy(addr, addr_dns.Addr, addr_dns.Len);
+                     connect = DEF_YES;
+                     switch (addr_dns.Len) {
+                         case NET_IPv4_ADDR_LEN:
+                              addr_family = NET_IP_ADDR_FAMILY_IPv4;
+                              break;
+
+                         case NET_IPv6_ADDR_LEN:
+                              addr_family = NET_IP_ADDR_FAMILY_IPv6;
+                              break;
+
+                         default:
+                             *p_err = NET_APP_ERR_FAULT;
+                              goto exit;
+
+                     }
+                 } else {
+                     connect = DEF_NO;
+                     if (addr_family == NET_IP_ADDR_FAMILY_IPv6) {
+                         addr_family  = NET_IP_ADDR_FAMILY_IPv4;
+                     } else {
+                        *p_err = NET_APP_ERR_FAULT;
+                         goto exit;
+                     }
+                 }
+                 break;
+
+
+            case DNSc_STATUS_FAILED:
+            case DNSc_STATUS_PENDING:
+            default:
+                 connect = DEF_NO;
+                 if (addr_family == NET_IP_ADDR_FAMILY_IPv6) {
+                     addr_family  = NET_IP_ADDR_FAMILY_IPv4;
+                 } else {
+                    *p_err = NET_APP_ERR_FAULT;
+                     goto exit;
+                 }
+                 break;
+        }
+
+#else
+                                                                /* ------------ CONVERT STRING IP ADDRESS ------------- */
+        addr_family = NetASCII_Str_to_IP(p_remote_host_name, addr, NET_SOCK_BSD_ADDR_LEN_MAX, p_err);
+        if (*p_err != NET_ASCII_ERR_NONE) {
+             goto exit;
+        }
+
+        switch (addr_family) {
+             case NET_IP_ADDR_FAMILY_IPv6:
+                  connect = DEF_YES;
+                  break;
+
+             case NET_IP_ADDR_FAMILY_IPv4:
+                  connect = DEF_YES;
+                  break;
+
+             default:
+                 *p_err = NET_APP_ERR_INVALID_ADDR_FAMILY;
+                  goto exit;
+        }
+#endif
+
+                                                                /* ------------ CONNECT TO THE REMOTE HOST ------------ */
+        if (connect == DEF_YES) {
+
+           *p_sock_id = NetApp_ClientStreamOpen(addr,
+                                                addr_family,
+                                                remote_port_nbr,
+                                                p_sock_addr_local,
+                                                p_secure_cfg,
+                                                req_timeout_ms,
+                                                p_err);
+            switch (*p_err) {
+                case NET_APP_ERR_NONE:
+                case NET_APP_ERR_CONN_IN_PROGRESS:
+                     done     = DEF_YES;
+                     addr_rtn = addr_family;
+                     goto exit;
+
+#if (defined(NET_EXT_MODULE_DNS_EN) & \
+     defined(NET_IPv4_MODULE_EN)    & \
+     defined(NET_IPv6_MODULE_EN))
+                case NET_SOCK_ERR_INVALID_ADDR:
+                case NET_APP_ERR_CONN_FAIL:                     /* If the connection fail, the                          */
+                     switch_addr_type = DEF_YES;                /* then retry with other IP type                        */
+                     break;
+#endif
+
+                default:
+                    goto exit;
+            }
+
+
+#if (defined(NET_EXT_MODULE_DNS_EN) & \
+     defined(NET_IPv4_MODULE_EN) & \
+     defined(NET_IPv6_MODULE_EN))
+            if (switch_addr_type == DEF_YES) {
+                if (addr_family == NET_IP_ADDR_FAMILY_IPv6) {
+                    addr_family  = NET_IP_ADDR_FAMILY_IPv4;
+                } else {
+                    goto exit;
+                }
+            }
+#endif
+        }
+    }
+
+
+exit:
+    return (addr_rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetApp_ClientDatagramOpenByHostname()
+*
+* Description : (1) Open a datagram type (UDP) socket to the server using its host name.
+*                   (select IP address automatically See Note #2):
+*
+*                   (a) Get IP address of the remote host from a string that contains either the IP address or
+*                       the host name that will be resolved using DNS (See Note #2).
+*
+*                   (b) Open a datagram socket.
+*
+*
+* Argument(s) : p_sock_id           Pointer to a variable that will receive the socket ID opened from this function.
+*
+*               p_remote_host_name  Pointer to a string that contains the remote host name to resolve:
+*                                       Can be an IP (IPv4 or IPv6) or a host name (resolved using DNS).
+*
+*               remote_port_nbr     Port of the remote host.
+*
+*               ip_family           Select IP family of addresses returned by DNS resolution.
+*
+*                                       NET_IP_ADDR_FAMILY_IPv4
+*                                       NET_IP_ADDR_FAMILY_IPv6
+*
+*               p_sock_addr         Pointer to a variable that will receive the socket address of the remote host.
+*
+*                                       DEF_NULL, if not required.
+*
+*               p_is_hostname       Pointer to variable that will received the boolean to indicate if the string
+*                                   passed in p_remote_host_name was a hostname or a IP address.
+*
+*                                   DEF_YES, hostanme was received.
+*                                   DEF_NO,  otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_APP_ERR_NONE                    Socket opening successful.
+*                                   NET_ERR_FAULT_NULL_PTR              Null pointer(s) was passed as argument.
+*                                   NET_APP_ERR_FAULT                   Operation faulted.
+*                                   NET_APP_ERR_INVALID_ADDR_FAMILY     Invalid IP family.
+*
+*                                   ------------ RETURNED BY NetApp_ClientDatagramOpen() ------------
+*                                   See NetApp_ClientDatagramOpen() for additional return error codes.
+*
+* Return(s)   : NET_IP_ADDR_FAMILY_IPv4,    if the opening was successful using an IPv4 address.
+*               NET_IP_ADDR_FAMILY_IPv6,    if the opening was successful using an IPv6 address.
+*               NET_IP_ADDR_FAMILY_UNKNOWN, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) When a host name is passed into the remote host name parameter, this function will try to
+*                   resolve the address of the remote host using DNS.
+*
+*                   (a) Obviously DNS must be present and enabled in the project to be possible.
+*
+*                   (b) the ip_family argument let the application choose the IP family of the addresses
+*                       returned by the DNS resolution.
+*
+*                   (c) This function always block, and the fail timeout depend of the DNS resolution timeout,
+*                       the number of remote address found and the connection timeout parameter.
+*********************************************************************************************************
+*/
+
+NET_IP_ADDR_FAMILY  NetApp_ClientDatagramOpenByHostname (NET_SOCK_ID         *p_sock_id,
+                                                         CPU_CHAR            *p_remote_host_name,
+                                                         NET_PORT_NBR         remote_port_nbr,
+                                                         NET_IP_ADDR_FAMILY   ip_family,
+                                                         NET_SOCK_ADDR       *p_sock_addr,
+                                                         CPU_BOOLEAN         *p_is_hostname,
+                                                         NET_ERR             *p_err)
+{
+    NET_SOCK_ADDR       *p_sock_addr_local;
+    NET_SOCK_ADDR        sock_addr_local;
+    NET_IP_ADDR_FAMILY   addr_family;
+    CPU_INT08U           addr[NET_SOCK_BSD_ADDR_LEN_MAX];
+    CPU_BOOLEAN          do_dns;
+#ifdef  NET_EXT_MODULE_DNS_EN
+    DNSc_ADDR_OBJ        addr_dns;
+    DNSc_STATUS          status;
+    DNSc_ERR             err_dns  = DNSc_ERR_NONE;
+    DNSc_FLAGS           flags    = DNSc_FLAG_NONE;
+    CPU_INT08U           addr_nbr = 1u;
+#endif
+
+
+                                                                /* ---------------- VALIDATE ARGUMENTS ---------------- */
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_sock_id == DEF_NULL) {
+        addr_family = NET_IP_ADDR_FAMILY_UNKNOWN;
+       *p_err       = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+
+    if (p_remote_host_name == DEF_NULL) {
+        addr_family = NET_IP_ADDR_FAMILY_UNKNOWN;
+       *p_err       = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+                                                                /* ------------- SET SOCK ADDRESS POINTER ------------- */
+    if (p_sock_addr == DEF_NULL) {
+        p_sock_addr_local = &sock_addr_local;
+    } else {
+        p_sock_addr_local =  p_sock_addr;
+    }
+
+                                                                /* ------------- RESOLVE REMOTE HOST ADDR ------------- */
+                                                                /* PARSE STRING FOR IP ADDR FORMAT                      */
+    addr_family = NetASCII_Str_to_IP(p_remote_host_name,
+                                     addr,
+                                     NET_SOCK_BSD_ADDR_LEN_MAX,
+                                     p_err);
+    if (*p_err != NET_ASCII_ERR_NONE) {
+#ifdef  NET_EXT_MODULE_DNS_EN
+        do_dns = DEF_YES;
+#else
+        addr_family   = NET_IP_ADDR_FAMILY_UNKNOWN;
+       *p_is_hostname = DEF_NO;
+       *p_err         = NET_APP_ERR_FAULT;
+        goto exit;
+#endif
+    } else {
+        switch (addr_family) {
+            case NET_IP_ADDR_FAMILY_IPv4:
+            case NET_IP_ADDR_FAMILY_IPv6:
+                *p_is_hostname = DEF_NO;
+                 do_dns        = DEF_NO;
+                 break;
+
+            default:
+#ifdef  NET_EXT_MODULE_DNS_EN
+                 do_dns = DEF_YES;
+                 break;
+#else
+                 addr_family   = NET_IP_ADDR_FAMILY_UNKNOWN;
+                *p_is_hostname = DEF_NO;
+                *p_err         = NET_APP_ERR_INVALID_ADDR_FAMILY;
+                 goto exit;
+#endif
+        }
+    }
+
+#ifdef  NET_EXT_MODULE_DNS_EN                                   /* DNS RESOLUTION                                       */
+    if (do_dns == DEF_YES) {
+                                                                /* Set DNS Parameters                                   */
+        DEF_BIT_SET(flags, DNSc_FLAG_FORCE_RESOLUTION);
+
+        switch (ip_family) {
+            case NET_IP_ADDR_FAMILY_IPv6:
+                 flags          |= DNSc_FLAG_IPv6_ONLY;         /* Get IPv6 address only.                               */
+                 break;
+
+            case NET_IP_ADDR_FAMILY_IPv4:
+                 flags          |= DNSc_FLAG_IPv4_ONLY;         /* Get IPv4 address only.                               */
+                 break;
+
+            default:
+                 addr_family   = NET_IP_ADDR_FAMILY_UNKNOWN;
+                *p_is_hostname = DEF_YES;
+                *p_err         = NET_APP_ERR_INVALID_ADDR_FAMILY;
+                 goto exit;
+        }
+
+        status = DNSc_GetHost(p_remote_host_name, &addr_dns, &addr_nbr, flags, DEF_NULL, &err_dns);
+        switch (status) {
+            case DNSc_STATUS_RESOLVED:
+                 if (addr_nbr != 0) {
+                     Mem_Copy(addr, addr_dns.Addr, addr_dns.Len);
+                     switch (addr_dns.Len) {
+                         case NET_IPv4_ADDR_LEN:
+                         case NET_IPv6_ADDR_LEN:
+                              addr_family   = ip_family;
+                             *p_is_hostname = DEF_YES;
+                              break;
+
+                         default:
+                              addr_family   = NET_IP_ADDR_FAMILY_UNKNOWN;
+                             *p_is_hostname = DEF_YES;
+                             *p_err         = NET_APP_ERR_FAULT;
+                              goto exit;
+                     }
+                 } else {
+                     addr_family   = NET_IP_ADDR_FAMILY_UNKNOWN;
+                    *p_is_hostname = DEF_YES;
+                    *p_err         = NET_APP_ERR_FAULT;
+                     goto exit;
+                 }
+                 break;
+
+
+            case DNSc_STATUS_FAILED:
+            case DNSc_STATUS_PENDING:
+            default:
+                 addr_family   = NET_IP_ADDR_FAMILY_UNKNOWN;
+                *p_is_hostname = DEF_YES;
+                *p_err         = NET_APP_ERR_FAULT;
+                 goto exit;
+        }
+    }
+#endif
+
+   (void)&do_dns;
+
+                                                                /* ------------ OPEN TO THE REMOTE HOST ------------ */
+   *p_sock_id = NetApp_ClientDatagramOpen(addr,
+                                          ip_family,
+                                          remote_port_nbr,
+                                          p_sock_addr_local,
+                                          p_err);
+    if (*p_err != NET_APP_ERR_NONE) {
+         addr_family = NET_IP_ADDR_FAMILY_UNKNOWN;
+         goto exit;
+    }
+
+   *p_err = NET_APP_ERR_NONE;
+
+
+exit:
+    return (addr_family);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetApp_ClientStreamOpen()
+*
+* Description : (1) Connect a client to a server using an IP address (IPv4 or IPv6) with a stream socket :
+*
+*                   (a) Open a stream socket.
+*
+*                   (b) Set Security parameter (TLS/SSL) if required.
+*
+*                   (c) Set connection timeout.
+*
+*                   (d) Connect to the remote host.
+*
+* Argument(s) : p_addr              Pointer to IP address.
+*
+*               addr_family         IP family of the address.
+*
+*               remote_port_nbr     Port of the remote host.
+*
+*               p_sock_addr         Pointer to a variable that will receive the socket address of the remote host.
+*
+*                                       DEF_NULL, if not required.
+*
+*               p_secure_cfg        Pointer to the secure configuration (TLS/SSL):
+*
+*                                       DEF_NULL, if no security enabled.
+*                                       Pointer to a structure that contains the parameters.
+*
+*               req_timeout_ms      Connection timeout in ms.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+* Return(s)   : Socket ID, if no error,
+*
+*               NET_SOCK_ID_NONE, otherwise.
+*
+* Caller(s)   : Application,
+*               NetApp_ClientStreamOpenByHostname().
+*
+*               This function is an application interface (API) function & MAY be called by application
+*               function(s).
+*
+* Note(s)     : (1) This function is in blocking mode, meaning that at the end of the function, the
+*                   socket will have succeed or failed to connect to the remote host.
+*********************************************************************************************************
+*/
+
+NET_SOCK_ID  NetApp_ClientStreamOpen (CPU_INT08U               *p_addr,
+                                      NET_IP_ADDR_FAMILY        addr_family,
+                                      NET_PORT_NBR              remote_port_nbr,
+                                      NET_SOCK_ADDR            *p_sock_addr,
+                                      NET_APP_SOCK_SECURE_CFG  *p_secure_cfg,
+                                      CPU_INT32U                req_timeout_ms,
+                                      NET_ERR                  *p_err)
+{
+    NET_SOCK_ID                sock_id = NET_SOCK_ID_NONE;
+    CPU_INT08U                 addr_len;
+    NET_SOCK_ADDR              sock_addr;
+    NET_SOCK_ADDR             *p_sock_addr_local;
+    NET_SOCK_PROTOCOL_FAMILY   protocol_family;
+    NET_SOCK_ADDR_FAMILY       sock_addr_family;
+    CPU_INT08U                 block_state;
+    NET_ERR                    err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_addr == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+
+#ifndef  NET_SECURE_MODULE_EN
+    if (p_secure_cfg != DEF_NULL) {
+        *p_err = NET_ERR_FAULT_FEATURE_DIS;
+    }
+#endif
+#endif
+
+    if (p_sock_addr == DEF_NULL) {
+        p_sock_addr_local = &sock_addr;
+    } else {
+        p_sock_addr_local = p_sock_addr;
+    }
+
+
+                                                                /* ---------- PREPARE PARAMETERS TO CONNECT ----------- */
+    switch (addr_family) {
+        case NET_IP_ADDR_FAMILY_IPv4:
+             protocol_family  = NET_SOCK_PROTOCOL_FAMILY_IP_V4;
+             sock_addr_family = NET_SOCK_ADDR_FAMILY_IP_V4;
+             addr_len         = NET_IPv4_ADDR_LEN;
+             break;
+
+        case NET_IP_ADDR_FAMILY_IPv6:
+             protocol_family  = NET_SOCK_PROTOCOL_FAMILY_IP_V6;
+             sock_addr_family = NET_SOCK_ADDR_FAMILY_IP_V6;
+             addr_len         = NET_IPv6_ADDR_LEN;
+             break;
+
+        default:
+           *p_err = NET_APP_ERR_INVALID_ADDR_FAMILY;
+            goto exit;
+    }
+
+
+                                                                /* ------------------ SET SOCK ADDR ------------------- */
+    NetApp_SetSockAddr(p_sock_addr_local, sock_addr_family, remote_port_nbr, p_addr, addr_len, p_err);
+    if (*p_err != NET_APP_ERR_NONE) {
+        *p_err  = NET_ERR_FAULT_UNKNOWN_ERR;
+         goto exit;
+    }
+
+                                                                /* -------------------- OPEN SOCK --------------------- */
+    sock_id = NetSock_Open(protocol_family, NET_SOCK_TYPE_STREAM, NET_SOCK_PROTOCOL_DFLT, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit;
+    }
+
+                                                                /* ---------------- CFG SOCK BLOCK OPT ---------------- */
+    block_state = NetSock_BlockGet(sock_id, p_err);             /* retrieve blocking mode of current socket.            */
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_close;
+    }
+
+                                                                /* Set mode to blocking for connect operation.          */
+   (void)NetSock_CfgBlock(sock_id, NET_SOCK_BLOCK_SEL_BLOCK, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_close;
+    }
+
+                                                                /* ----------------- SET CONN TIMEOUT ----------------- */
+    NetSock_CfgTimeoutConnReqSet(sock_id,
+                                 req_timeout_ms,
+                                 p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_close;
+    }
+
+                                                                /* ----------- SET SECURITY CONN PARAMETERS ----------- */
+#ifdef  NET_SECURE_MODULE_EN
+    if (p_secure_cfg != DEF_NULL) {
+        (void)NetSock_CfgSecure(sock_id,
+                                DEF_YES,
+                                p_err);
+         if (*p_err != NET_SOCK_ERR_NONE) {
+              goto exit_close;
+         }
+
+         NetSock_CfgSecureClientCommonName(            sock_id,
+                                           (CPU_CHAR *)p_secure_cfg->CommonName,
+                                                       p_err);
+         if (*p_err != NET_SOCK_ERR_NONE) {
+              goto exit_close;
+         }
+
+         NetSock_CfgSecureClientTrustCallBack(sock_id,
+                                              p_secure_cfg->TrustCallback,
+                                              p_err);
+         if (*p_err != NET_SOCK_ERR_NONE) {
+              goto exit_close;
+         }
+
+         if (p_secure_cfg->MutualAuthPtr != DEF_NULL) {
+             NetSock_CfgSecureClientCertKey(sock_id,
+                                            p_secure_cfg->MutualAuthPtr->CertPtr,
+                                            p_secure_cfg->MutualAuthPtr->CertSize,
+                                            p_secure_cfg->MutualAuthPtr->KeyPtr,
+                                            p_secure_cfg->MutualAuthPtr->KeySize,
+                                            p_secure_cfg->MutualAuthPtr->Fmt,
+                                            p_secure_cfg->MutualAuthPtr->CertChained,
+                                            p_err);
+             if (*p_err != NET_SOCK_ERR_NONE) {
+                  goto exit_close;
+             }
+         }
+
+    }
+#endif
+
+
+                                                                /* ------------- CONN TO THE REMOTE HOST -------------- */
+    NetSock_Conn(sock_id, p_sock_addr_local, addr_len, p_err);
+    switch (*p_err) {
+        case NET_SOCK_ERR_NONE:
+            *p_err = NET_APP_ERR_NONE;
+             break;
+
+        case NET_SOCK_ERR_CONN_IN_PROGRESS:
+            *p_err = NET_APP_ERR_CONN_IN_PROGRESS;
+             break;
+
+        case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+            *p_err = NET_APP_ERR_CONN_FAIL;
+             goto exit_close;
+
+        default:
+             goto exit_close;
+    }
+
+                                                                /* ---------------- CFG SOCK BLOCK OPT ---------------- */
+   (void)NetSock_CfgBlock(sock_id, block_state, &err);          /* re-configure blocking mode to one before connect.    */
+    if (err != NET_SOCK_ERR_NONE) {
+       *p_err = err;
+        goto exit_close;
+    }
+
+    (void)&p_secure_cfg;                                        /* Prevent 'variable unused' compiler warning.          */
+
+    goto exit;
+
+
+exit_close:
+    NetSock_Close(sock_id, &err);
+   (void)&err;                                                  /* Prevent 'variable unused' compiler warning.          */
+    sock_id = NET_SOCK_ID_NONE;
+
+exit:
+    return (sock_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetApp_ClientDatagramOpen()
+*
+* Description : (1) Connect a client to a server using an IP address (IPv4 or IPv6) with a datagram socket :
+*
+*                   (a) Open a datagram socket.
+*                   (b) Set connection timeout.
+*
+*
+* Argument(s) : p_addr              Pointer to IP address.
+*
+*               addr_family         IP family of the address.
+*
+*               remote_port_nbr     Port of the remote host.
+*
+*               p_sock_addr         Pointer to a variable that will receive the socket address of the remote host.
+*
+*                                       DEF_NULL, if not required.
+*
+*               p_err               Pointer to variable that will receive the return error code from this function :
+*
+*                                       NET_APP_ERR_NONE
+*                                       NET_ERR_FAULT_NULL_PTR
+*                                       NET_APP_ERR_INVALID_ADDR_FAMILY
+*
+* Return(s)   : Socket ID, if no error,
+*
+*               NET_SOCK_ID_NONE, otherwise.
+*
+* Caller(s)   : NetApp_ClientOpenByHostname().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+NET_SOCK_ID  NetApp_ClientDatagramOpen (CPU_INT08U          *p_addr,
+                                        NET_IP_ADDR_FAMILY   addr_family,
+                                        NET_PORT_NBR         remote_port_nbr,
+                                        NET_SOCK_ADDR       *p_sock_addr,
+                                        NET_ERR             *p_err)
+{
+    NET_SOCK_ID                sock_id = NET_SOCK_ID_NONE;
+    CPU_INT08U                 addr_len;
+    NET_SOCK_ADDR              sock_addr;
+    NET_SOCK_ADDR             *p_sock_addr_local;
+    NET_SOCK_PROTOCOL_FAMILY   protocol_family;
+    NET_SOCK_ADDR_FAMILY       sock_addr_family;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(;);
+    }
+
+    if (p_addr == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit;
+    }
+#endif
+
+    if (p_sock_addr == DEF_NULL) {
+        p_sock_addr_local = &sock_addr;
+    } else {
+        p_sock_addr_local = p_sock_addr;
+    }
+
+
+                                                                /* ---------- PREPARE PARAMETERS TO CONNECT ----------- */
+    switch (addr_family) {
+        case NET_IP_ADDR_FAMILY_IPv4:
+             protocol_family  = NET_SOCK_PROTOCOL_FAMILY_IP_V4;
+             sock_addr_family = NET_SOCK_ADDR_FAMILY_IP_V4;
+             addr_len         = NET_IPv4_ADDR_LEN;
+             break;
+
+        case NET_IP_ADDR_FAMILY_IPv6:
+             protocol_family  = NET_SOCK_PROTOCOL_FAMILY_IP_V6;
+             sock_addr_family = NET_SOCK_ADDR_FAMILY_IP_V6;
+             addr_len         = NET_IPv6_ADDR_LEN;
+             break;
+
+        default:
+           *p_err = NET_APP_ERR_INVALID_ADDR_FAMILY;
+            goto exit;
+    }
+
+
+                                                                /* ------------------ SET SOCK ADDR ------------------- */
+    NetApp_SetSockAddr(p_sock_addr_local, sock_addr_family, remote_port_nbr, p_addr, addr_len, p_err);
+    if (*p_err != NET_APP_ERR_NONE) {
+         goto exit;
+    }
+
+                                                                /* -------------------- OPEN SOCK --------------------- */
+    sock_id = NetSock_Open(protocol_family, NET_SOCK_TYPE_DATAGRAM, NET_SOCK_PROTOCOL_DFLT, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        *p_err  = NET_APP_ERR_FAULT;
+         goto exit;
+    }
+
+   *p_err = NET_APP_ERR_NONE;
+    goto exit;
+
+
+exit:
+    return (sock_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetApp_TimeDly_ms()
+*
+* Description : Delay for specified time, in milliseconds.
+*
+* Argument(s) : time_dly_ms     Time delay value, in milliseconds (see Note #1).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_APP_ERR_NONE                Time delay successful.
+*                               NET_APP_ERR_INVALID_ARG         Time delay invalid.
+*                               NET_APP_ERR_FAULT               Time delay fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application,
+*               NetApp_SockOpen(),
+*               NetApp_SockBind(),
+*               NetApp_SockConn(),
+*               NetApp_SockAccept(),
+*               NetApp_SockRx(),
+*               NetApp_SockTx().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) Time delay of 0 milliseconds allowed.
+*
+*                   (b) Time delay limited to the maximum possible OS time delay
+*                             if greater than the maximum possible OS time delay.
+*
+*                   See also 'KAL/kal.c  KAL_Dly()  Note #1'.
+*********************************************************************************************************
+*/
+
+void  NetApp_TimeDly_ms (CPU_INT32U   time_dly_ms,
+                         NET_ERR     *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+
+    KAL_Dly(time_dly_ms);
+
+   *p_err = NET_APP_ERR_NONE;
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_app.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_app.h
new file mode 100644
index 0000000..d86f0ec
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_app.h
@@ -0,0 +1,260 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                        NETWORK APPLICATION PROGRAMMING INTERFACE (API) LAYER
+*
+* Filename      : net_app.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Network Application Programming Interface (API) Layer module is required for :
+*
+*               (a) Applications that require network application programming interface (API) :
+*                   (1) Network socket API with error handling
+*                   (2) Network time delays
+*
+*               See also 'net_cfg.h  NETWORK APPLICATION PROGRAMMING INTERFACE (API) LAYER CONFIGURATION'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef   NET_APP_MODULE_PRESENT
+#define   NET_APP_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  "net_sock.h"
+#include  "net_type.h"
+#include  "net_ip.h"
+#include  "net_err.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                NETWORK APPLICATION TIME DELAY DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_APP_TIME_DLY_MIN_SEC                        DEF_INT_32U_MIN_VAL
+#define  NET_APP_TIME_DLY_MAX_SEC                        DEF_INT_32U_MAX_VAL
+
+#define  NET_APP_TIME_DLY_MIN_mS                         DEF_INT_32U_MIN_VAL
+#define  NET_APP_TIME_DLY_MAX_mS                        (DEF_TIME_NBR_mS_PER_SEC - 1u)
+
+
+typedef  struct  net_app_sock_secure_mutual_cfg {
+    NET_SOCK_SECURE_CERT_KEY_FMT  Fmt;
+    CPU_CHAR                     *CertPtr;
+    CPU_INT32U                    CertSize;
+    CPU_BOOLEAN                   CertChained;
+    CPU_CHAR                     *KeyPtr;
+    CPU_INT32U                    KeySize;
+} NET_APP_SOCK_SECURE_MUTUAL_CFG;
+
+
+typedef  struct  net_app_sock_secure_cfg {
+    CPU_CHAR                        *CommonName;
+    NET_SOCK_SECURE_TRUST_FNCT       TrustCallback;
+    NET_APP_SOCK_SECURE_MUTUAL_CFG  *MutualAuthPtr;
+} NET_APP_SOCK_SECURE_CFG;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- SOCK FNCTS -------------------- */
+NET_SOCK_ID         NetApp_SockOpen                     (NET_SOCK_PROTOCOL_FAMILY   protocol_family,
+                                                         NET_SOCK_TYPE              sock_type,
+                                                         NET_SOCK_PROTOCOL          protocol,
+                                                         CPU_INT16U                 retry_max,
+                                                         CPU_INT32U                 time_dly_ms,
+                                                         NET_ERR                   *p_err);
+
+CPU_BOOLEAN         NetApp_SockClose                    (NET_SOCK_ID                sock_id,
+                                                         CPU_INT32U                 timeout_ms,
+                                                         NET_ERR                   *p_err);
+
+
+CPU_BOOLEAN         NetApp_SockBind                     (NET_SOCK_ID                sock_id,
+                                                         NET_SOCK_ADDR             *p_addr_local,
+                                                         NET_SOCK_ADDR_LEN          addr_len,
+                                                         CPU_INT16U                 retry_max,
+                                                         CPU_INT32U                 time_dly_ms,
+                                                         NET_ERR                   *p_err);
+
+CPU_BOOLEAN         NetApp_SockConn                     (NET_SOCK_ID                sock_id,
+                                                         NET_SOCK_ADDR             *p_addr_remote,
+                                                         NET_SOCK_ADDR_LEN          addr_len,
+                                                         CPU_INT16U                 retry_max,
+                                                         CPU_INT32U                 timeout_ms,
+                                                         CPU_INT32U                 time_dly_ms,
+                                                         NET_ERR                   *p_err);
+
+
+CPU_BOOLEAN         NetApp_SockListen                   (NET_SOCK_ID                sock_id,
+                                                         NET_SOCK_Q_SIZE            sock_q_size,
+                                                         NET_ERR                   *p_err);
+
+NET_SOCK_ID         NetApp_SockAccept                   (NET_SOCK_ID                sock_id,
+                                                         NET_SOCK_ADDR             *p_addr_remote,
+                                                         NET_SOCK_ADDR_LEN         *p_addr_len,
+                                                         CPU_INT16U                 retry_max,
+                                                         CPU_INT32U                 timeout_ms,
+                                                         CPU_INT32U                 time_dly_ms,
+                                                         NET_ERR                   *p_err);
+
+
+CPU_INT16U          NetApp_SockRx                       (NET_SOCK_ID               sock_id,
+                                                         void                     *p_data_buf,
+                                                         CPU_INT16U                data_buf_len,
+                                                         CPU_INT16U                data_rx_th,
+                                                         NET_SOCK_API_FLAGS        flags,
+                                                         NET_SOCK_ADDR            *p_addr_remote,
+                                                         NET_SOCK_ADDR_LEN        *p_addr_len,
+                                                         CPU_INT16U                retry_max,
+                                                         CPU_INT32U                timeout_ms,
+                                                         CPU_INT32U                time_dly_ms,
+                                                         NET_ERR                  *p_err);
+
+CPU_INT16U          NetApp_SockTx                       (NET_SOCK_ID               sock_id,
+                                                         void                     *p_data,
+                                                         CPU_INT16U                data_len,
+                                                         NET_SOCK_API_FLAGS        flags,
+                                                         NET_SOCK_ADDR            *p_addr_remote,
+                                                         NET_SOCK_ADDR_LEN         addr_len,
+                                                         CPU_INT16U                retry_max,
+                                                         CPU_INT32U                timeout_ms,
+                                                         CPU_INT32U                time_dly_ms,
+                                                         NET_ERR                  *p_err);
+
+
+void                NetApp_SetSockAddr                  (NET_SOCK_ADDR            *p_sock_addr,
+                                                         NET_SOCK_ADDR_FAMILY      addr_family,
+                                                         NET_PORT_NBR              port_nbr,
+                                                         CPU_INT08U               *p_addr,
+                                                         NET_IP_ADDR_LEN           addr_len,
+                                                         NET_ERR                  *p_err);
+
+                                                                /* ---------- ADVANCED STREAM OPEN FUNCTION ----------- */
+NET_IP_ADDR_FAMILY  NetApp_ClientStreamOpenByHostname   (NET_SOCK_ID              *p_sock_id,
+                                                         CPU_CHAR                 *p_host_server,
+                                                         NET_PORT_NBR              port_nbr,
+                                                         NET_SOCK_ADDR            *p_sock_addr,
+                                                         NET_APP_SOCK_SECURE_CFG  *p_secure_cfg,
+                                                         CPU_INT32U                req_timeout_ms,
+                                                         NET_ERR                  *p_err);
+
+NET_IP_ADDR_FAMILY  NetApp_ClientDatagramOpenByHostname (NET_SOCK_ID              *p_sock_id,
+                                                         CPU_CHAR                 *p_remote_host_name,
+                                                         NET_PORT_NBR              remote_port_nbr,
+                                                         NET_IP_ADDR_FAMILY        ip_family,
+                                                         NET_SOCK_ADDR            *p_sock_addr,
+                                                         CPU_BOOLEAN              *p_is_hostname,
+                                                         NET_ERR                  *p_err);
+
+NET_SOCK_ID         NetApp_ClientStreamOpen             (CPU_INT08U               *p_addr,
+                                                         NET_IP_ADDR_FAMILY        addr_family,
+                                                         NET_PORT_NBR              remote_port_nbr,
+                                                         NET_SOCK_ADDR            *p_sock_addr,
+                                                         NET_APP_SOCK_SECURE_CFG  *p_secure_cfg,
+                                                         CPU_INT32U                req_timeout_ms,
+                                                         NET_ERR                  *p_err);
+
+
+NET_SOCK_ID         NetApp_ClientDatagramOpen           (CPU_INT08U               *p_addr,
+                                                         NET_IP_ADDR_FAMILY        addr_family,
+                                                         NET_PORT_NBR              remote_port_nbr,
+                                                         NET_SOCK_ADDR            *p_sock_addr,
+                                                         NET_ERR                  *p_err);
+
+
+                                                                /* ------------------ TIME DLY FNCTS ------------------ */
+void                NetApp_TimeDly_ms                   (CPU_INT32U                 time_dly_ms,
+                                                         NET_ERR                   *p_err);
+
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_APP_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ascii.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ascii.c
new file mode 100644
index 0000000..e85597c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ascii.c
@@ -0,0 +1,1711 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK ASCII LIBRARY
+*
+* Filename      : net_ascii.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_ASCII_MODULE
+#include  "net_ascii.h"
+
+#include  "net_cfg_net.h"
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_ipv4.h"
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ipv6.h"
+#endif
+
+#include  "net_util.h"
+#include  
+#include  
+#include  
+#include  
+#include  
+
+/*
+*********************************************************************************************************
+*                                        NetASCII_Str_to_MAC()
+*
+* Description : Convert an Ethernet MAC address ASCII string to an Ethernet MAC address.
+*
+* Argument(s) : p_addr_mac_ascii    Pointer to an ASCII string that contains a MAC address (see Note #1).
+*
+*               p_addr_mac          Pointer to a memory buffer that will receive the converted MAC address
+*                                       (see Note #2) :
+*
+*                                       MAC address represented by ASCII string,         if NO error(s).
+*
+*                                       MAC address cleared to all zeros (see Note #2c), otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ASCII_ERR_NONE                  MAC address successfully converted.
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'paddr_mac_ascii'/'paddr_mac'
+*                                                                       passed a NULL pointer.
+*                               NET_ASCII_ERR_INVALID_STR_LEN       Invalid ASCII string    length.
+*                               NET_ASCII_ERR_INVALID_CHAR          Invalid ASCII character.
+*                               NET_ASCII_ERR_INVALID_CHAR_LEN      Invalid ASCII character length.
+*                               NET_ASCII_ERR_INVALID_CHAR_SEQ      Invalid ASCII character sequence.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) (1) RFC #1700, Section 'ETHERNET VENDOR ADDRESS COMPONENTS' states that "Ethernet
+*                           addresses ... should be written hyphenated by octets (e.g., 12-34-56-78-9A-BC)".
+*
+*                       (2) In other words, the (Ethernet) MAC address notation separates six hexadecimal
+*                           octet values by the hyphen character ('-') or by the colon character (':').
+*                           Each hexadecimal value represents one octet of the MAC address starting with
+*                           the most significant octet in network-order.
+*
+*                               MAC Address Examples :
+*
+*                                      MAC ADDRESS NOTATION        HEXADECIMAL EQUIVALENT
+*
+*                                       "00-1A-07-AC-22-09"     =     0x001A07AC2209
+*                                       "76:4E:01:D2:8C:0B"     =     0x764E01D28C0B
+*                                       "80-Db-fE-0b-34-52"     =     0X80DBFE0B3452
+*                                        --             --              --        --
+*                                        ^               ^              ^          ^
+*                                        |               |              |          |
+*                                       MSO             LSO            MSO        LSO
+*
+*                               where
+*                                       MSO             Most  Significant Octet in MAC Address
+*                                       LSO             Least Significant Octet in MAC Address
+*
+*
+*                   (b) Therefore, the MAC address ASCII string MUST :
+*
+*                       (1) Include ONLY hexadecimal values & the hyphen character ('-') or the colon
+*                           character (':') ; ALL other characters are trapped as invalid, including
+*                           any leading or trailing characters.
+*
+*                       (2) (A) Include EXACTLY six hexadecimal values ...
+*                           (B) (1) ... separated by                   ...
+*                               (2) ... EXACTLY five                   ...
+*                                   (a) hyphen characters or           ...
+*                                   (b) colon  characters;             ...
+*                           (C) ... & MUST be terminated with the NULL character.
+*
+*                       (3) Ensure that each hexadecimal value's number of digits does NOT exceed the
+*                           maximum number of digits (2).
+*
+*                           (A) However, any hexadecimal value's number of digits MAY be less than the
+*                               maximum number of digits.
+*
+*               (2) (a) The size of the memory buffer that will receive the converted MAC address MUST
+*                       be greater than or equal to NET_ASCII_NBR_OCTET_ADDR_MAC.
+*
+*                   (b) MAC address memory buffer array accessed by octets.
+*
+*                   (c) MAC address memory buffer array cleared in case of any error(s).
+*********************************************************************************************************
+*/
+
+void  NetASCII_Str_to_MAC (CPU_CHAR    *p_addr_mac_ascii,
+                           CPU_INT08U  *p_addr_mac,
+                           NET_ERR     *p_err)
+{
+    CPU_CHAR    *p_char_cur;
+    CPU_CHAR    *p_char_prev;
+    CPU_INT08U  *p_addr_cur;
+    CPU_INT08U   addr_octet_val;
+    CPU_INT08U   addr_octet_val_dig;
+    CPU_INT08U   addr_nbr_octet;
+    CPU_INT08U   addr_nbr_octet_dig;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+                                                                        /* -------------- VALIDATE PTRS --------------- */
+    if (p_addr_mac == (CPU_INT08U *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (p_addr_mac_ascii == (CPU_CHAR *)0) {
+        Mem_Clr((void     *)p_addr_mac,                                  /* Clr rtn addr on err (see Note #2c).          */
+                (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+
+                                                                        /* ----------- CONVERT MAC ADDR STR ----------- */
+    p_char_cur         = (CPU_CHAR   *)p_addr_mac_ascii;
+    p_char_prev        = (CPU_CHAR   *)0;
+    p_addr_cur         = (CPU_INT08U *)p_addr_mac;
+    addr_octet_val     =  0x00u;
+    addr_nbr_octet     =  0u;
+    addr_nbr_octet_dig =  0u;
+
+    while ((p_char_cur != (CPU_CHAR *)  0 ) &&                          /* Parse ALL non-NULL chars in ASCII str.       */
+          (*p_char_cur != (CPU_CHAR  )'\0')) {
+
+        switch (*p_char_cur) {
+            case '0':
+            case '1':
+            case '2':
+            case '3':
+            case '4':
+            case '5':
+            case '6':
+            case '7':
+            case '8':
+            case '9':
+            case 'A':
+            case 'B':
+            case 'C':
+            case 'D':
+            case 'E':
+            case 'F':
+            case 'a':
+            case 'b':
+            case 'c':
+            case 'd':
+            case 'e':
+            case 'f':
+                 addr_nbr_octet_dig++;                                  /* If nbr digs > max (see Note #1b3); ...       */
+                 if (addr_nbr_octet_dig > NET_ASCII_CHAR_MAX_OCTET_ADDR_MAC) {
+                     Mem_Clr((void     *)p_addr_mac,                    /* ... clr rtn addr  (see Note #2c)   ...       */
+                             (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+                    *p_err = NET_ASCII_ERR_INVALID_CHAR_LEN;            /* ... & rtn err.                               */
+                     return;
+                 }
+
+                 switch (*p_char_cur) {                                 /* Convert ASCII char into hex val.             */
+                     case '0':
+                     case '1':
+                     case '2':
+                     case '3':
+                     case '4':
+                     case '5':
+                     case '6':
+                     case '7':
+                     case '8':
+                     case '9':
+                          addr_octet_val_dig = (CPU_INT08U) (*p_char_cur - '0');
+                          break;
+
+
+                     case 'A':
+                     case 'B':
+                     case 'C':
+                     case 'D':
+                     case 'E':
+                     case 'F':
+                          addr_octet_val_dig = (CPU_INT08U)((*p_char_cur - 'A') + 10u);
+                          break;
+
+
+                     case 'a':
+                     case 'b':
+                     case 'c':
+                     case 'd':
+                     case 'e':
+                     case 'f':
+                          addr_octet_val_dig = (CPU_INT08U)((*p_char_cur - 'a') + 10u);
+                          break;
+
+
+                     default:                                           /* See Note #1b1.                               */
+                          Mem_Clr((void     *)p_addr_mac,               /* Clr rtn addr on err (see Note #2c).          */
+                                  (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+                         *p_err = NET_ASCII_ERR_INVALID_CHAR;
+                          return;
+                 }
+                                                                        /* Merge ASCII char into hex val.               */
+                 addr_octet_val <<= DEF_NIBBLE_NBR_BITS;
+                 addr_octet_val  += addr_octet_val_dig;
+                 break;
+
+
+            case '-':
+            case ':':
+                 if (p_char_prev == (CPU_CHAR *)0) {                    /* If NO prev char  (see Note #1b2B1); ...      */
+                     Mem_Clr((void     *)p_addr_mac,                    /* ... clr rtn addr (see Note #2c)     ...      */
+                             (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+                    *p_err = NET_ASCII_ERR_INVALID_CHAR_SEQ;            /* ... & rtn err.                               */
+                     return;
+                 }
+
+                 if ((*p_char_prev == (CPU_CHAR)'-') ||                 /* If prev char a hyphen                   ...  */
+                     (*p_char_prev == (CPU_CHAR)':')) {                 /* ... or       a colon (see Note #1b2B1); ...  */
+                     Mem_Clr((void     *)p_addr_mac,                    /* ... clr rtn addr     (see Note #2c)     ...  */
+                             (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+                    *p_err = NET_ASCII_ERR_INVALID_CHAR_SEQ;            /* ... & rtn err.                               */
+                     return;
+                 }
+
+                 addr_nbr_octet++;
+                 if (addr_nbr_octet >= NET_ASCII_NBR_OCTET_ADDR_MAC) {  /* If nbr octets > max (see Note #1b2A); ...    */
+                     Mem_Clr((void     *)p_addr_mac,                    /* ... clr rtn addr    (see Note #2c)    ...    */
+                             (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+                    *p_err = NET_ASCII_ERR_INVALID_STR_LEN;             /* ... & rtn err.                               */
+                     return;
+                 }
+
+                                                                        /* Merge hex octet val into MAC addr.           */
+                *p_addr_cur++        = addr_octet_val;
+                 addr_octet_val     = 0x00u;
+                 addr_nbr_octet_dig = 0u;
+                 break;
+
+
+            default:                                                    /* See Note #1b1.                               */
+                 Mem_Clr((void     *)p_addr_mac,                        /* Clr rtn addr on err (see Note #2c).          */
+                         (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+                *p_err = NET_ASCII_ERR_INVALID_CHAR;
+                 return;
+        }
+
+        p_char_prev = p_char_cur;
+        p_char_cur++;
+    }
+
+    if (p_char_cur == (CPU_CHAR *)0) {                                  /* If NULL ptr in ASCII str (see Note #1b1); .. */
+        Mem_Clr((void     *)p_addr_mac,                                 /* .. clr rtn addr          (see Note #2c)   .. */
+                (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+       *p_err = NET_ERR_FAULT_NULL_PTR;                                 /* .. & rtn err.                                */
+        return;
+    }
+
+    if (p_char_prev == (CPU_CHAR *)0) {                                 /* If NULL        ASCII str (see Note #1b2); .. */
+        Mem_Clr((void     *)p_addr_mac,                                 /* .. clr rtn addr          (see Note #2c)   .. */
+                (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+       *p_err = NET_ASCII_ERR_INVALID_STR_LEN;                          /* .. & rtn err.                                */
+        return;
+    }
+
+    if ((*p_char_prev == (CPU_CHAR)'-') ||                              /* If last char a hyphen                   ..   */
+        (*p_char_prev == (CPU_CHAR)':')) {                              /* .. or        a colon (see Note #1b2B1); ..   */
+        Mem_Clr((void     *)p_addr_mac,                                 /* .. clr rtn addr      (see Note #2c)     ..   */
+                (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+       *p_err = NET_ASCII_ERR_INVALID_CHAR_SEQ;                         /* .. & rtn err.                                */
+        return;
+    }
+
+    addr_nbr_octet++;
+    if (addr_nbr_octet != NET_ASCII_NBR_OCTET_ADDR_MAC) {               /* If != nbr MAC addr octets (see Note #1b2A);  */
+        Mem_Clr((void     *)p_addr_mac,                                 /* .. clr rtn addr           (see Note #2c)  .. */
+                (CPU_SIZE_T)NET_ASCII_NBR_OCTET_ADDR_MAC);
+       *p_err = NET_ASCII_ERR_INVALID_STR_LEN;                          /* .. & rtn err.                                */
+        return;
+    }
+
+                                                                        /* Merge hex octet val into final MAC addr.     */
+   *p_addr_cur = addr_octet_val;
+
+   *p_err      = NET_ASCII_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetASCII_MAC_to_Str()
+*
+* Description : Convert an Ethernet MAC address into an Ethernet MAC address ASCII string.
+*
+* Argument(s) : paddr_mac           Pointer to a memory buffer that contains the MAC address (see Note #2).
+*
+*               paddr_mac_ascii     Pointer to an ASCII character array that will receive the return MAC
+*                                       address ASCII string from this function (see Note #1b).
+*
+*               hex_lower_case      Format alphabetic hexadecimal characters in lower case :
+*
+*                                       DEF_NO      Format alphabetic hexadecimal characters in upper case.
+*                                       DEF_YES     Format alphabetic hexadecimal characters in lower case.
+*
+*               hex_colon_sep       Separate hexadecimal values with a colon character :
+*
+*                                       DEF_NO      Separate hexadecimal values with a hyphen character
+*                                                       (see Note #1b1B2a).
+*                                       DEF_YES     Separate hexadecimal values with a colon  character
+*                                                       (see Note #1b1B2b).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ASCII_ERR_NONE                  ASCII string successfully formatted.
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'paddr_mac'/'paddr_mac_ascii'
+*                                                                       passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) (1) RFC #1700, Section 'ETHERNET VENDOR ADDRESS COMPONENTS' states that "Ethernet
+*                           addresses ... should be written hyphenated by octets (e.g., 12-34-56-78-9A-BC)".
+*
+*                       (2) In other words, the (Ethernet) MAC address notation separates six hexadecimal
+*                           octet values by the hyphen character ('-') or by the colon character (':').
+*                           Each hexadecimal value represents one octet of the MAC address starting with
+*                           the most significant octet in network-order.
+*
+*                               MAC Address Examples :
+*
+*                                      MAC ADDRESS NOTATION        HEXADECIMAL EQUIVALENT
+*
+*                                       "00-1A-07-AC-22-09"     =     0x001A07AC2209
+*                                       "76:4E:01:D2:8C:0B"     =     0x764E01D28C0B
+*                                       "80-Db-fE-0b-34-52"     =     0X80DBFE0B3452
+*                                        --             --              --        --
+*                                        ^               ^              ^          ^
+*                                        |               |              |          |
+*                                       MSO             LSO            MSO        LSO
+*
+*                               where
+*                                       MSO             Most  Significant Octet in MAC Address
+*                                       LSO             Least Significant Octet in MAC Address
+*
+*
+*                   (b) (1) The return MAC address ASCII string :
+*
+*                           (A) Formats EXACTLY six hexadecimal values ...
+*                           (B) (1) ... separated by                   ...
+*                               (2) ... EXACTLY five                   ...
+*                                   (a) hyphen characters or           ...
+*                                   (b) colon  characters;             ...
+*                           (C) ... & terminated with the NULL character.
+*
+*                       (2) The size of the ASCII character array that will receive the returned MAC address
+*                           ASCII string MUST be greater than or equal to NET_ASCII_LEN_MAX_ADDR_MAC.
+*
+*               (2) (a) The size of the memory buffer that contains the MAC address SHOULD be greater than
+*                       or equal to NET_ASCII_NBR_OCTET_ADDR_MAC.
+*
+*                   (b) MAC address memory buffer array accessed by octets.
+*********************************************************************************************************
+*/
+
+void  NetASCII_MAC_to_Str (CPU_INT08U   *p_addr_mac,
+                           CPU_CHAR     *p_addr_mac_ascii,
+                           CPU_BOOLEAN   hex_lower_case,
+                           CPU_BOOLEAN   hex_colon_sep,
+                           NET_ERR      *p_err)
+{
+    CPU_CHAR    *p_char;
+    CPU_INT08U  *p_addr;
+    CPU_INT08U   addr_octet_val;
+    CPU_INT08U   addr_octet_dig_val;
+    CPU_INT08U   addr_octet_nbr_shifts;
+    CPU_INT08U   i;
+    CPU_INT08U   j;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(;);
+    }
+#endif
+
+                                                                        /* -------------- VALIDATE PTRS --------------- */
+    if (p_addr_mac == (CPU_INT08U *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+    if (p_addr_mac_ascii == (CPU_CHAR *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+
+                                                                        /* ------------- CONVERT MAC ADDR ------------- */
+    p_addr = p_addr_mac;
+    p_char = p_addr_mac_ascii;
+
+    for (i = NET_ASCII_NBR_OCTET_ADDR_MAC; i > 0u; i--) {               /* Parse ALL addr octets (see Note #1b1A).      */
+
+        addr_octet_val = *p_addr;
+
+        for (j = NET_ASCII_CHAR_MAX_OCTET_ADDR_MAC; j > 0u; j--) {      /* Parse ALL octet's hex digs.                  */
+                                                                        /* Calc  cur octet's hex dig val.               */
+            addr_octet_nbr_shifts = (j - 1u) * DEF_NIBBLE_NBR_BITS;
+            addr_octet_dig_val    = (addr_octet_val >> addr_octet_nbr_shifts) & DEF_NIBBLE_MASK;
+                                                                        /* Insert    octet's hex val ASCII dig.         */
+            if (addr_octet_dig_val < 10u) {
+               *p_char++ = (CPU_CHAR)(addr_octet_dig_val + '0');
+
+            } else {
+                if (hex_lower_case != DEF_YES) {
+                   *p_char++ = (CPU_CHAR)((addr_octet_dig_val - 10u) + 'A');
+                } else {
+                   *p_char++ = (CPU_CHAR)((addr_octet_dig_val - 10u) + 'a');
+                }
+            }
+        }
+
+        if (i > 1u) {                                                   /* If NOT on last octet,                    ..  */
+            if (hex_colon_sep != DEF_YES) {
+               *p_char++ = '-';                                         /* .. insert hyphen char (see Note #1b1B2a) ..  */
+            } else {
+               *p_char++ = ':';                                         /* ..     or colon  char (see Note #1b1B2b).    */
+            }
+        }
+
+        p_addr++;
+    }
+
+   *p_char = (CPU_CHAR)'\0';                                            /* Append NULL char (see Note #1b1C).           */
+
+   *p_err  =  NET_ASCII_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetASCII_Str_to_IP()
+*
+* Description : Convert string representation of IP address (IPv4 or IPv6) to their TCP/IP stack intern
+*               representation.
+*
+* Argument(s) : p_addr_ip_ascii     Pointer to an ASCII string that contains a decimal IP address.
+*
+*               p_addr              Pointer to the variable that will received the converted IP address.
+*
+*               addr_max_len        Size of the variable that will received the converted IP address.
+*
+*                                       NET_IPv4_ADDR_SIZE
+*                                       NET_IPv6_ADDR_SIZE
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*                               NET_ASCII_ERR_INVALID_CHAR_SEQ  Invalid Character sequence.
+*
+*                               ------------ RETURNED BY NetASCII_Str_to_IPv4() ------------
+*                               See NetASCII_Str_to_IPv4() for additional return error code.
+*
+*                               ------------ RETURNED BY NetASCII_Str_to_IPv6() ------------
+*                               See NetASCII_Str_to_IPv6() for additional return error code.
+*
+* Return(s)   : the IP family of the converted address, if no errors:
+*                   NET_IP_ADDR_FAMILY_IPv4
+*                   NET_IP_ADDR_FAMILY_IPv6
+*               otherwise,
+*                   NET_IP_ADDR_FAMILY_UNKNOWN
+*
+* Caller(s)   : Application
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+NET_IP_ADDR_FAMILY  NetASCII_Str_to_IP (CPU_CHAR    *p_addr_ip_ascii,
+                                        void        *p_addr,
+                                        CPU_INT08U   addr_max_len,
+                                        NET_ERR     *p_err)
+{
+#ifdef NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR       *p_addr_ipv4;
+#endif
+#ifdef NET_IPv6_MODULE_EN
+    NET_IPv6_ADDR       *p_addr_ipv6;
+#endif
+    CPU_CHAR            *p_sep;
+    NET_IP_ADDR_FAMILY   addr_family;
+    CPU_INT16S           result;
+
+                                                                /* "localhost" string verfication.                      */
+    result = Str_Cmp(p_addr_ip_ascii, NET_ASCII_STR_LOCAL_HOST);
+    if (result == 0) {
+#ifdef NET_IPv4_MODULE_EN
+        addr_family = NET_IP_ADDR_FAMILY_IPv4;                  /* By default, return IPv4 local host address.          */
+        p_addr_ipv4 = (NET_IPv4_ADDR *)p_addr;
+       *p_addr_ipv4 = NET_IPv4_ADDR_LOCAL_HOST_ADDR;
+#else
+        addr_family = NET_IP_ADDR_FAMILY_IPv6;                  /* If IPv4 is not enabled, return IPv6 loopback address.*/
+        p_addr_ipv6 = (NET_IPv6_ADDR *)p_addr;
+       *p_addr_ipv6 = NET_IPv6_ADDR_LOOPBACK;
+#endif
+       *p_err = NET_ASCII_ERR_NONE;
+        return (addr_family);
+    }
+                                                                /* ----------- DETERMINE IP ADDRESS FAMILY ------------ */
+    p_sep = Str_Char(p_addr_ip_ascii, ASCII_CHAR_FULL_STOP);    /* Search for IPv4 separator '.'                        */
+    if (p_sep != DEF_NULL) {
+        addr_family = NET_IP_ADDR_FAMILY_IPv4;
+    } else {
+        p_sep = Str_Char(p_addr_ip_ascii, ASCII_CHAR_COLON);    /* Search for IPv6 separator ':'                        */
+        if (p_sep != DEF_NULL) {
+            addr_family = NET_IP_ADDR_FAMILY_IPv6;
+        } else {
+            addr_family = NET_IP_ADDR_FAMILY_UNKNOWN;
+           *p_err       = NET_ASCII_ERR_INVALID_CHAR_SEQ;
+            return (addr_family);
+        }
+    }
+
+    switch (addr_family) {
+        case NET_IP_ADDR_FAMILY_IPv4:
+#ifdef NET_IPv4_MODULE_EN
+             p_addr_ipv4 = (NET_IPv4_ADDR *)p_addr;
+            *p_addr_ipv4 = NetASCII_Str_to_IPv4(p_addr_ip_ascii, p_err);
+#else
+            *p_err = NET_ASCII_ERR_IP_FAMILY_NOT_PRESENT;
+#endif
+             break;
+
+
+        case NET_IP_ADDR_FAMILY_IPv6:
+#ifdef NET_IPv6_MODULE_EN
+            p_addr_ipv6 = (NET_IPv6_ADDR *)p_addr;
+           *p_addr_ipv6 = NetASCII_Str_to_IPv6(p_addr_ip_ascii, p_err);
+#else
+            *p_err = NET_ASCII_ERR_IP_FAMILY_NOT_PRESENT;
+#endif
+             break;
+
+
+        case NET_IP_ADDR_FAMILY_UNKNOWN:
+        default:
+            *p_err = NET_ASCII_ERR_INVALID_CHAR_SEQ;
+             break;
+    }
+
+   (void)&addr_max_len;
+
+    return (addr_family);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetASCII_Str_to_IPv4()
+*
+* Description : Convert an IPv4 address ASCII string in dotted-decimal notation to a network protocol
+*                   IPv4 address in host-order.
+*
+* Argument(s) : p_addr_ip_ascii     Pointer to an ASCII string that contains a dotted-decimal IPv4 address
+*                                       (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ASCII_ERR_NONE                  IPv4 address successfully converted.
+*                               NET_ASCII_ERR_INVALID_DOT_NBR       Invalid ASCII IPv4 addr dot count.
+*
+*                                                                   - RETURNED BY NetASCII_Str_to_IP_Handler() : -
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'paddr_ip_ascii' passed a
+*                                                                       NULL pointer.
+*                               NET_ASCII_ERR_INVALID_STR_LEN       Invalid ASCII string    length.
+*                               NET_ASCII_ERR_INVALID_CHAR          Invalid ASCII character.
+*                               NET_ASCII_ERR_INVALID_CHAR_LEN      Invalid ASCII character length.
+*                               NET_ASCII_ERR_INVALID_CHAR_VAL      Invalid ASCII character value.
+*                               NET_ASCII_ERR_INVALID_CHAR_SEQ      Invalid ASCII character sequence.
+*
+* Return(s)   : Host-order IPv4 address represented by ASCII string, if NO error(s).
+*
+*               NET_IPv4_ADDR_NONE,                                  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) (1) RFC #1983 states that "dotted decimal notation ... refers [to] IP addresses of the
+*                           form A.B.C.D; where each letter represents, in decimal, one byte of a four byte IP
+*                           address".
+*
+*                       (2) In other words, the dotted-decimal IP address notation separates four decimal octet
+*                           values by the dot, or period, character ('.').  Each decimal value represents one
+*                           octet of the IP address starting with the most significant octet in network-order.
+*
+*                               IP Address Examples :
+*
+*                                      DOTTED DECIMAL NOTATION     HEXADECIMAL EQUIVALENT
+*
+*                                           127.0.0.1           =       0x7F000001
+*                                           192.168.1.64        =       0xC0A80140
+*                                           255.255.255.0       =       0xFFFFFF00
+*                                           ---         -                 --    --
+*                                            ^          ^                 ^      ^
+*                                            |          |                 |      |
+*                                           MSO        LSO               MSO    LSO
+*
+*                                   where
+*                                           MSO        Most  Significant Octet in Dotted Decimal IP Address
+*                                           LSO        Least Significant Octet in Dotted Decimal IP Address
+*
+*
+*                   (b) Therefore, the dotted-decimal IP address ASCII string MUST :
+*
+*                       (1) Include ONLY decimal values & the dot, or period, character ('.') ; ALL other
+*                           characters are trapped as invalid, including any leading or trailing characters.
+*
+*                       (2) (A) Include UP TO four decimal values   ...
+*                           (B) (1) ... separated by                  ...
+*                               (2) ... UP TO three dot characters; ...
+*                           (C) ... & MUST be terminated with the NULL character.
+*
+*                       (3) Ensure that each decimal value's number of decimal digits, including leading
+*                           zeros, does NOT exceed      the maximum number of digits (10).
+*
+*                           (A) However, any decimal value's number of decimal digits, including leading
+*                               zeros, MAY be less than the maximum number of digits.
+*
+*                       (4) Ensure that each decimal value does NOT exceed the maximum value for its form:
+*
+*                           (1) a.b.c.d - 255.255.255.255
+*                           (2) a.b.c   - 255.255.65535
+*                           (3) a.b     - 255.16777215
+*                           (4) a       - 4294967295
+*
+*               (2) To avoid possible integer arithmetic overflow, the IP address octet arithmetic result
+*                   MUST be declared as an integer data type with a greater resolution -- i.e. greater
+*                   number of bits -- than the IP address octet data type(s).
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+NET_IPv4_ADDR  NetASCII_Str_to_IPv4 (CPU_CHAR  *p_addr_ip_ascii,
+                                     NET_ERR   *p_err)
+{
+    NET_IPv4_ADDR  ip_addr;
+    CPU_INT08U     dot_nbr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_IPv4_ADDR)0);
+    }
+#endif
+    ip_addr = NetASCII_Str_to_IPv4_Handler(p_addr_ip_ascii,
+                                          &dot_nbr,
+                                           p_err);
+
+    if (*p_err != NET_ASCII_ERR_NONE) {
+         return (NET_IPv4_ADDR_NONE);
+    }
+
+    if (dot_nbr != NET_ASCII_NBR_MAX_DOT_ADDR_IP) {
+       *p_err     = NET_ASCII_ERR_INVALID_DOT_NBR;
+        return (NET_IPv4_ADDR_NONE);
+    }
+
+    return (ip_addr);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetASCII_Str_to_IPv4_Handler()
+*
+* Description : Convert an IPv4 address ASCII string in dotted-decimal notation to a network protocol
+*                   IPv4 address in host-order.
+*
+* Argument(s) : paddr_ip_ascii      Pointer to an ASCII string that contains a dotted-decimal IPv4 address
+*                                       (see Note #1).
+*
+*               pdot_nbr            Pointer to the number of dot found in the ASCII string.
+*
+*               p_err               Pointer to variable that will receive the return error code from this function :
+*
+*                                       NET_ASCII_ERR_NONE                  IPv4 address successfully converted.
+*                                       NET_ERR_FAULT_NULL_PTR              Argument 'paddr_ip_ascii' passed a
+*                                                                       NULL pointer.
+*                                       NET_ASCII_ERR_INVALID_STR_LEN       Invalid ASCII string    length.
+*                                       NET_ASCII_ERR_INVALID_CHAR          Invalid ASCII character.
+*                                       NET_ASCII_ERR_INVALID_CHAR_LEN      Invalid ASCII character length.
+*                                       NET_ASCII_ERR_INVALID_CHAR_VAL      Invalid ASCII character value.
+*                                       NET_ASCII_ERR_INVALID_CHAR_SEQ      Invalid ASCII character sequence.
+*                                       NET_ASCII_ERR_INVALID_PART_LEN      Invalid ASCII part      length.
+*
+* Return(s)   : Host-order IPv4 address represented by ASCII string, if NO error(s).
+*
+*               NET_IPv4_ADDR_NONE,                                    otherwise.
+*
+* Caller(s)   : NetASCII_Str_to_IP(),
+*               inet_aton().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) (1) RFC #1983 states that "dotted decimal notation ... refers [to] IP addresses of the
+*                           form A.B.C.D; where each letter represents, in decimal, one byte of a four byte IP
+*                           address".
+*
+*                       (2) In other words, the dotted-decimal IP address notation separates four decimal octet
+*                           values by the dot, or period, character ('.').  Each decimal value represents one
+*                           octet of the IP address starting with the most significant octet in network-order.
+*
+*                               IP Address Examples :
+*
+*                                      DOTTED DECIMAL NOTATION     HEXADECIMAL EQUIVALENT
+*
+*                                           127.0.0.1           =       0x7F000001
+*                                           192.168.1.64        =       0xC0A80140
+*                                           255.255.255.0       =       0xFFFFFF00
+*                                           ---         -                 --    --
+*                                            ^          ^                 ^      ^
+*                                            |          |                 |      |
+*                                           MSO        LSO               MSO    LSO
+*
+*                                   where
+*                                           MSO        Most  Significant Octet in Dotted Decimal IP Address
+*                                           LSO        Least Significant Octet in Dotted Decimal IP Address
+*
+*               (2) IEEE Std 1003.1, 2004 Edition - inet_addr, inet_ntoa - IPv4 address manipulation:
+*
+*                   (a) Values specified using IPv4 dotted decimal notation take one of the following forms:
+*
+*                       (1) a.b.c.d - When four parts are specified, each shall be interpreted
+*                                     as a byte of data and assigned, from left to right,
+*                                     to the four bytes of an Internet address.
+*
+*                       (2) a.b.c   - When a three-part address is specified, the last part shall
+*                                     be interpreted as a 16-bit quantity and placed in the
+*                                     rightmost two bytes of the network address. This makes
+*                                     the three-part address format convenient for specifying
+*                                     Class B network addresses as "128.net.host".
+*
+*                       (3) a.b     - When a two-part address is supplied, the last part shall be
+*                                     interpreted as a 24-bit quantity and placed in the
+*                                     rightmost three bytes of the network address. This makes
+*                                     the two-part address format convenient for specifying
+*                                      Class A network addresses as "net.host".
+*
+*                       (4) a       - When only one part is given, the value shall be stored
+*                                     directly in the network address without any byte rearrangement.
+*
+*                   (b) IP Address Examples :
+*
+*                                      DOTTED DECIMAL NOTATION     HEXADECIMAL EQUIVALENT
+*
+*                                           127.0.0.1           =       0x7F000001
+*                                           192.168.1.64        =       0xC0A80140
+*                                           192.168.320         =       0xC0A80140
+*                                           192.11010368        =       0xC0A80140
+*                                           3232235840          =       0xC0A80140
+*                                           255.255.255.0       =       0xFFFFFF00
+*                                           ---         -                 --    --
+*                                            ^          ^                 ^      ^
+*                                            |          |                 |      |
+*                                           MSO        LSO               MSO    LSO
+*
+*                                   where
+*                                           MSO        Most  Significant Octet in Dotted Decimal IP Address
+*                                           LSO        Least Significant Octet in Dotted Decimal IP Address
+*
+*               (3) Therefore, the dotted-decimal IP address ASCII string MUST :
+*
+*                   (a) Include ONLY decimal values & the dot, or period, character ('.') ; ALL other
+*                           characters are trapped as invalid, including any leading or trailing characters.
+*
+*                   (b) (1) Include UP TO four decimal values   ...
+*                       (2) (A) ... separated by                ...
+*                           (B) ... UP TO three dot characters; ...
+*                       (3) ... & MUST be terminated with the NULL character.
+*
+*                   (c) Ensure that each decimal value's number of decimal digits, including leading
+*                       zeros, does NOT exceed      the maximum number of digits (10).
+*
+*                       (1) However, any decimal value's number of decimal digits, including leading
+*                           zeros, MAY be less than the maximum number of digits.
+*
+*                   (d) Ensure that each decimal value does NOT exceed the maximum value for its form:
+*
+*                       (1) a.b.c.d - 255.255.255.255
+*                       (2) a.b.c   - 255.255.65535
+*                       (3) a.b     - 255.16777215
+*                       (4) a       - 4294967295
+*
+*               (4) To avoid possible integer arithmetic overflow, the IP address octet arithmetic result
+*                   MUST be declared as an integer data type with a greater resolution -- i.e. greater
+*                   number of bits -- than the IP address octet data type(s).
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+NET_IPv4_ADDR  NetASCII_Str_to_IPv4_Handler (CPU_CHAR    *p_addr_ip_ascii,
+                                             CPU_INT08U  *p_dot_nbr,
+                                             NET_ERR     *p_err)
+{
+    CPU_INT64U      addr_parts[NET_ASCII_NBR_MAX_DEC_PARTS];
+    CPU_CHAR       *p_char_cur;
+    CPU_CHAR       *p_char_prev;
+    NET_IPv4_ADDR   addr_ip;
+    CPU_INT64U     *p_addr_part_val;                                       /* See Note #4.                                 */
+    CPU_INT08U      addr_nbr_octet;
+    CPU_INT08U      addr_nbr_part_dig;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_IPv4_ADDR)0);
+    }
+#endif
+                                                                        /* --------------- VALIDATE PTR --------------- */
+    if (p_addr_ip_ascii == (CPU_CHAR *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (NET_IPv4_ADDR_NONE);
+    }
+
+
+                                                                        /* ----------- CONVERT IP ADDR STR ------------ */
+    p_char_cur         =  p_addr_ip_ascii;
+    p_char_prev        = (CPU_CHAR *)0;
+    addr_ip            =  NET_IPv4_ADDR_NONE;
+    p_addr_part_val    = &addr_parts[0];
+   *p_addr_part_val    =  0u;
+    addr_nbr_octet     =  0u;
+    addr_nbr_part_dig  =  0u;
+   *p_dot_nbr          =  0u;
+
+    while ((p_char_cur != (CPU_CHAR *)  0 ) &&                          /* Parse ALL non-NULL chars in ASCII str.       */
+          (*p_char_cur != (CPU_CHAR  )'\0')) {
+
+        switch (*p_char_cur) {
+            case '0':
+            case '1':
+            case '2':
+            case '3':
+            case '4':
+            case '5':
+            case '6':
+            case '7':
+            case '8':
+            case '9':
+                 addr_nbr_part_dig++;                                   /* If nbr digs > max (see Note #1b3), ...       */
+                 if (addr_nbr_part_dig > NET_ASCII_CHAR_MAX_PART_ADDR_IP) {
+                    *p_err =  NET_ASCII_ERR_INVALID_CHAR_LEN;           /* ... rtn err.                                 */
+                     return (NET_IPv4_ADDR_NONE);
+                 }
+
+                                                                        /* Convert & merge ASCII char into decimal val. */
+                *p_addr_part_val *= (CPU_INT16U)10u;
+                *p_addr_part_val += (CPU_INT16U)(*p_char_cur - '0');
+
+                 if (*p_addr_part_val > NET_ASCII_VAL_MAX_PART_ADDR_IP) {   /* If octet val > max (see Note #1b4), ...  */
+                    *p_err =  NET_ASCII_ERR_INVALID_CHAR_VAL;               /* ... rtn err.                             */
+                     return (NET_IPv4_ADDR_NONE);
+                 }
+                 break;
+
+
+            case '.':
+                 if (p_char_prev == (CPU_CHAR *)0) {                    /* If NO prev char     (see Note #1b2B1), ...   */
+                    *p_err =  NET_ASCII_ERR_INVALID_CHAR_SEQ;           /* ... rtn err.                                 */
+                     return (NET_IPv4_ADDR_NONE);
+                 }
+
+                 if (*p_char_prev == (CPU_CHAR)'.') {                   /* If prev char a dot  (see Note #1b2B1), ...   */
+                     *p_err =  NET_ASCII_ERR_INVALID_CHAR_SEQ;          /* ... rtn err.                                 */
+                      return (NET_IPv4_ADDR_NONE);
+                 }
+
+                 addr_nbr_octet++;
+                 if (addr_nbr_octet >= NET_ASCII_NBR_OCTET_ADDR_IPv4) { /* If nbr octets > max (see Note #1b2A), ...    */
+                    *p_err =  NET_ASCII_ERR_INVALID_STR_LEN;            /* ... rtn err.                                 */
+                     return (NET_IPv4_ADDR_NONE);
+                 }
+
+                *p_dot_nbr         += 1;
+                 p_addr_part_val++;
+                *p_addr_part_val    = 0x0000000000000000u;
+                 addr_nbr_part_dig = 0u;
+                 break;
+
+
+            default:                                                    /* See Note #1b1.                               */
+                *p_err =  NET_ASCII_ERR_INVALID_CHAR;
+                 return (NET_IPv4_ADDR_NONE);
+        }
+
+        p_char_prev = p_char_cur;
+        p_char_cur++;
+    }
+
+
+    if (p_char_cur  == (CPU_CHAR *)0) {                                 /* If NULL ptr in ASCII str (see Note #1b1), .. */
+       *p_err =  NET_ERR_FAULT_NULL_PTR;                                /* .. rtn err.                                  */
+        return (NET_IPv4_ADDR_NONE);
+    }
+
+    if (p_char_prev == (CPU_CHAR *)0) {                                 /* If NULL        ASCII str (see Note #1b2), .. */
+       *p_err =  NET_ASCII_ERR_INVALID_STR_LEN;                         /* .. rtn err.                                  */
+        return (NET_IPv4_ADDR_NONE);
+    }
+
+    if (*p_char_prev == (CPU_CHAR)'.') {                                /* If last char a dot (see Note #1b2B1), ..     */
+        *p_err =  NET_ASCII_ERR_INVALID_CHAR_SEQ;                       /* .. rtn err.                                  */
+         return (NET_IPv4_ADDR_NONE);
+    }
+
+    addr_ip = (NET_IPv4_ADDR)addr_parts[0];
+
+    switch(*p_dot_nbr) {
+        case 0:                                                         /* IP addr format : a       - 32 bits.          */
+            if (addr_parts[0] > NET_ASCII_MASK_32_01_BIT) {             /* (See Note #3d4)                              */
+               *p_err = NET_ASCII_ERR_INVALID_PART_LEN;
+                return (NET_IPv4_ADDR_NONE);
+            }
+            *p_err = NET_ASCII_ERR_NONE;
+            return (addr_ip);
+
+
+        case 1:                                                         /* IP addr format : a.b     - 24 bits.          */
+            if ((addr_ip       > NET_ASCII_MASK_08_01_BIT)  |           /* (See Note #3d3)                              */
+                (addr_parts[1] > NET_ASCII_MASK_24_01_BIT)) {
+               *p_err = NET_ASCII_ERR_INVALID_PART_LEN;
+                return (NET_IPv4_ADDR_NONE);
+            }
+            addr_ip |= ((addr_parts[1] & NET_ASCII_MASK_08_01_BIT) << (DEF_OCTET_NBR_BITS * 3)) |
+                       ((addr_parts[1] & NET_ASCII_MASK_16_09_BIT) <<  DEF_OCTET_NBR_BITS     ) |
+                       ((addr_parts[1] & NET_ASCII_MASK_24_17_BIT) >>  DEF_OCTET_NBR_BITS     );
+            break;
+
+
+        case 2:                                                         /* IP addr format : a.b.c   - 16 bits.          */
+            if ((addr_ip       > NET_ASCII_MASK_08_01_BIT)  |           /* (See Note #3d2)                              */
+                (addr_parts[1] > NET_ASCII_MASK_08_01_BIT)  |
+                (addr_parts[2] > NET_ASCII_MASK_16_01_BIT)) {
+               *p_err = NET_ASCII_ERR_INVALID_PART_LEN;
+                return (NET_IPv4_ADDR_NONE);
+            }
+            addr_ip |= ((addr_parts[1] & NET_ASCII_MASK_08_01_BIT) <<  DEF_OCTET_NBR_BITS     ) |
+                       ((addr_parts[2] & NET_ASCII_MASK_08_01_BIT) << (DEF_OCTET_NBR_BITS * 3)) |
+                       ((addr_parts[2] & 0x0000FF00) <<  DEF_OCTET_NBR_BITS     );
+            break;
+
+
+        case 3:                                                         /* IP addr format : a.b.c.d -  8 bits.          */
+            if ((addr_ip       > NET_ASCII_MASK_08_01_BIT)  |           /* (See Note #3d1)                              */
+                (addr_parts[1] > NET_ASCII_MASK_08_01_BIT)  |
+                (addr_parts[2] > NET_ASCII_MASK_08_01_BIT)  |
+                (addr_parts[3] > NET_ASCII_MASK_08_01_BIT)) {
+               *p_err = NET_ASCII_ERR_INVALID_PART_LEN;
+                return (NET_IPv4_ADDR_NONE);
+            }
+            addr_ip |= ((addr_parts[1] & NET_ASCII_MASK_08_01_BIT) <<  DEF_OCTET_NBR_BITS     ) |
+                       ((addr_parts[2] & NET_ASCII_MASK_08_01_BIT) << (DEF_OCTET_NBR_BITS * 2)) |
+                       ((addr_parts[3] & NET_ASCII_MASK_08_01_BIT) << (DEF_OCTET_NBR_BITS * 3));
+            break;
+
+
+        default:
+           *p_err = NET_ASCII_ERR_INVALID_STR_LEN;
+            return (NET_IPv4_ADDR_NONE);
+    }
+
+    addr_ip =  NET_UTIL_VAL_SWAP_ORDER_32(addr_ip);
+
+   *p_err   =  NET_ASCII_ERR_NONE;
+    return (addr_ip);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetASCII_Str_to_IPv6()
+*
+* Description : Convert an IPv6 address ASCII string in common-decimal notation to a network protocol
+*                   IPv6 address in host-order.
+*
+* Argument(s) : p_addr_ip_ascii     Pointer to an ASCII string that contains a common-decimal IPv6 address
+*                                       (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ASCII_ERR_NONE                  IPv6 address successfully converted.
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'p_addr_ip_ascii' passed a
+*                                                                       NULL pointer.
+*                               NET_ASCII_ERR_INVALID_STR_LEN       Invalid ASCII string    length.
+*                               NET_ASCII_ERR_INVALID_CHAR          Invalid ASCII character.
+*                               NET_ASCII_ERR_INVALID_CHAR_LEN      Invalid ASCII character length.
+*                               NET_ASCII_ERR_INVALID_CHAR_VAL      Invalid ASCII character value.
+*                               NET_ASCII_ERR_INVALID_CHAR_SEQ      Invalid ASCII character sequence.
+*
+* Return(s)   : Host-order IPv6 address represented by ASCII string, if NO error(s).
+*
+*               NET_IPv6_ADDR_NONE,                                  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) (a)
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv6_MODULE_EN
+NET_IPv6_ADDR  NetASCII_Str_to_IPv6 (CPU_CHAR  *p_addr_ip_ascii,
+                                     NET_ERR   *p_err)
+{
+    CPU_CHAR       *p_char_cur;
+    CPU_CHAR       *p_char_next;
+    CPU_CHAR       *p_char_prev;
+    NET_IPv6_ADDR   addr_ip;
+    CPU_INT08U      addr_nbr_octet;
+    CPU_INT08U      addr_nbr_colon_cur;
+    CPU_INT08U      addr_nbr_colon_rem;
+    CPU_INT08U      addr_nbr_colon_tot;
+    CPU_BOOLEAN     addr_msb_octet;
+    CPU_INT08U      addr_nbr_octet_dig;
+    CPU_INT08U      addr_octet_val_dig;
+    CPU_INT08U      addr_nbr_lead_zero;
+    CPU_INT08U      addr_nbr_octet_zero;
+    CPU_INT08U      addr_nbr_dig_end;
+    CPU_INT08U      nbr_octet_zero_cnt;
+
+
+    NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+
+                                                                        /* --------------- VALIDATE PTR --------------- */
+    if (p_addr_ip_ascii == (CPU_CHAR *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (addr_ip);
+    }
+
+
+                                                                        /* ----------- CONVERT IP ADDR STR ------------ */
+    p_char_cur          = (CPU_CHAR *)p_addr_ip_ascii;
+    p_char_prev         = (CPU_CHAR *)0;
+    p_char_next         = (CPU_CHAR *)0;
+    addr_nbr_octet      =  0u;
+    addr_nbr_colon_cur  =  0u;
+    addr_nbr_colon_rem  =  0u;
+    addr_nbr_colon_tot  =  0u;
+    addr_nbr_octet_dig  =  0u;
+    addr_octet_val_dig  =  0u;
+    addr_nbr_lead_zero  =  0u;
+    addr_nbr_octet_zero =  0u;
+    addr_nbr_dig_end    =  0u;
+    addr_msb_octet      =  DEF_YES;
+    nbr_octet_zero_cnt  =  0u;
+
+
+
+    while ((p_char_cur != (CPU_CHAR *)  0 ) &&                          /* Parse ALL non-NULL chars in ASCII str.       */
+          (*p_char_cur != (CPU_CHAR  )'\0')) {
+
+        p_char_next = p_char_cur + 1u;
+        switch (*p_char_cur) {
+            case '0':
+            case '1':
+            case '2':
+            case '3':
+            case '4':
+            case '5':
+            case '6':
+            case '7':
+            case '8':
+            case '9':
+            case 'A':
+            case 'B':
+            case 'C':
+            case 'D':
+            case 'E':
+            case 'F':
+            case 'a':
+            case 'b':
+            case 'c':
+            case 'd':
+            case 'e':
+            case 'f':
+                 addr_nbr_octet_dig++;                                  /* If nbr digs > max (see Note #1b3), ...       */
+                 if (addr_nbr_octet_dig > NET_ASCII_CHAR_MAX_DIG_ADDR_IPv6) {
+                    *p_err = NET_ASCII_ERR_INVALID_CHAR_LEN;            /* ... rtn err.                                 */
+                     NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                     return (addr_ip);
+                 }
+
+                 switch (*p_char_cur) {                                 /* Convert ASCII char into hex val.             */
+                     case '0':
+                     case '1':
+                     case '2':
+                     case '3':
+                     case '4':
+                     case '5':
+                     case '6':
+                     case '7':
+                     case '8':
+                     case '9':
+                          addr_octet_val_dig = (CPU_INT08U) (*p_char_cur - '0');
+                          break;
+
+
+                     case 'A':
+                     case 'B':
+                     case 'C':
+                     case 'D':
+                     case 'E':
+                     case 'F':
+                          addr_octet_val_dig = (CPU_INT08U)((*p_char_cur - 'A') + 10u);
+                          break;
+
+
+                     case 'a':
+                     case 'b':
+                     case 'c':
+                     case 'd':
+                     case 'e':
+                     case 'f':
+                          addr_octet_val_dig = (CPU_INT08U)((*p_char_cur - 'a') + 10u);
+                          break;
+
+
+                     default:                                           /* See Note #x.                               */
+                          NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                         *p_err = NET_ASCII_ERR_INVALID_CHAR;
+                          return (addr_ip);
+                 }
+
+                 if (addr_msb_octet == DEF_YES) {
+                     addr_ip.Addr[addr_nbr_octet] =  addr_octet_val_dig;
+                     addr_ip.Addr[addr_nbr_octet] <<= DEF_NIBBLE_NBR_BITS;
+                     addr_msb_octet = DEF_NO;
+                 } else {
+                     addr_ip.Addr[addr_nbr_octet] |= addr_octet_val_dig;
+                     addr_msb_octet = DEF_YES;
+                     addr_nbr_octet++;
+                 }
+
+                 if (addr_nbr_octet > NET_ASCII_NBR_OCTET_ADDR_IPv6) {
+                    *p_err =  NET_ASCII_ERR_INVALID_CHAR_LEN;           /* ... rtn err.                                 */
+                     NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                     return (addr_ip);
+                 }
+                 break;
+
+
+            case ':':
+                 addr_nbr_colon_cur++;
+                 if (p_char_prev == (CPU_CHAR *)0) {                    /* If NO prev char     (see Note #1b2B1), ...   */
+                     if (p_char_next == (CPU_CHAR *)0) {
+                        *p_err =  NET_ASCII_ERR_INVALID_CHAR_SEQ;       /* ... rtn err.                                 */
+                         NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                         return (addr_ip);
+                     }
+
+                     if (*p_char_next != (CPU_CHAR)':') {
+                         *p_err =  NET_ASCII_ERR_INVALID_CHAR_SEQ;      /* ... rtn err.                                 */
+                          NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                          return (addr_ip);
+                     } else {
+                          break;
+                     }
+                 }
+
+                 if (addr_nbr_colon_cur > NET_ASCII_CHAR_MAX_COLON_IPv6) {
+                    *p_err =  NET_ASCII_ERR_INVALID_CHAR_SEQ;           /* .. rtn err.                                  */
+                     NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                     return (addr_ip);
+                 }
+
+                 if (*p_char_prev != (CPU_CHAR)':') {
+                     switch (addr_nbr_octet_dig) {
+                         case 0:
+                             *p_err =  NET_ASCII_ERR_INVALID_CHAR_SEQ;  /* .. rtn err.                                  */
+                              NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                              return (addr_ip);
+                              break;
+
+                         case 1:
+                              addr_ip.Addr[addr_nbr_octet +1] = addr_ip.Addr[addr_nbr_octet] >> DEF_NIBBLE_NBR_BITS;
+                              addr_ip.Addr[addr_nbr_octet]    = 0x00;
+                              addr_nbr_lead_zero = addr_nbr_lead_zero + 3u;
+                              addr_nbr_octet     = addr_nbr_octet     + 2u;
+                              addr_msb_octet     = DEF_YES;
+                              break;
+
+                         case 2:
+                              addr_ip.Addr[addr_nbr_octet]    = addr_ip.Addr[addr_nbr_octet -1];
+                              addr_ip.Addr[addr_nbr_octet -1] = 0x00;
+                              addr_nbr_lead_zero = addr_nbr_lead_zero + 2u;
+                              addr_nbr_octet     = addr_nbr_octet     + 1u;
+                              break;
+
+                         case 3:
+                              addr_ip.Addr[addr_nbr_octet]    >>= DEF_NIBBLE_NBR_BITS;
+                              addr_ip.Addr[addr_nbr_octet]     |= (addr_ip.Addr[addr_nbr_octet -1] << DEF_NIBBLE_NBR_BITS);
+                              addr_ip.Addr[addr_nbr_octet -1] >>= DEF_NIBBLE_NBR_BITS;
+                              addr_nbr_lead_zero = addr_nbr_lead_zero + 1u;
+                              addr_nbr_octet     = addr_nbr_octet     + 1u;
+                              addr_msb_octet     = DEF_YES;
+                              break;
+
+                         case 4:
+                         default:
+                              break;
+                     }
+
+                 } else {
+                     if (p_char_next == (CPU_CHAR *)0) {
+                        *p_err =  NET_ASCII_ERR_INVALID_CHAR_SEQ;       /* ... rtn err.                                 */
+                         NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                         return (addr_ip);
+                     }
+
+                     if (*p_char_next == ':') {
+                        *p_err =  NET_ASCII_ERR_INVALID_CHAR_SEQ;      /* .. rtn err.                                  */
+                         NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                         return (addr_ip);
+                     }
+
+                     if (*p_char_next == '\0') {
+                         addr_nbr_dig_end = 0;
+                     } else {
+                         addr_nbr_dig_end = 1;
+                     }
+
+                     while  ((p_char_next != (CPU_CHAR *)  0 ) &&        /* Parse ALL non-NULL chars in ASCII str.       */
+                            (*p_char_next != (CPU_CHAR  )'\0')) {
+                         if (*p_char_next == ':') {
+                             addr_nbr_colon_rem++;
+                         }
+                         p_char_next++;
+                     }
+
+                     addr_nbr_colon_tot  = addr_nbr_colon_cur + addr_nbr_colon_rem;
+                     addr_nbr_octet_zero = ((NET_ASCII_LEN_MAX_ADDR_IPv6 - addr_nbr_colon_tot
+                                                                         - (2 *  addr_nbr_octet)
+                                                                         - (4 * (addr_nbr_colon_rem       + addr_nbr_dig_end))
+                                                                         - (NET_ASCII_CHAR_MAX_COLON_IPv6 - addr_nbr_colon_tot)
+                                                                         -  NET_ASCII_CHAR_LEN_NUL) / 2);
+                     for (nbr_octet_zero_cnt = 0u; nbr_octet_zero_cnt < addr_nbr_octet_zero; nbr_octet_zero_cnt++ ) {
+                         addr_ip.Addr[addr_nbr_octet] = DEF_BIT_NONE;
+                         addr_nbr_octet++;
+                     }
+                 }
+
+                 if (addr_nbr_octet > NET_ASCII_NBR_OCTET_ADDR_IPv6) {  /* If nbr octets > max (see Note #1b2A), ...    */
+                    *p_err =  NET_ASCII_ERR_INVALID_STR_LEN;            /* ... rtn err.                                 */
+                     NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                     return (addr_ip);
+                 }
+
+                 addr_nbr_octet_dig = 0u;
+                 break;
+
+
+            default:                                                    /* See Note #1b1.                               */
+                *p_err =  NET_ASCII_ERR_INVALID_CHAR;
+                 NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+                 return (addr_ip);
+        }
+
+        p_char_prev = p_char_cur;
+        p_char_cur++;
+    }
+
+
+    if (p_char_cur == (CPU_CHAR *)0) {                                  /* If NULL ptr in ASCII str (see Note #1b1), .. */
+       *p_err =  NET_ERR_FAULT_NULL_PTR;                                /* .. rtn err.                                  */
+        NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+        return (addr_ip);
+    }
+
+    if (p_char_prev == (CPU_CHAR *)0) {                                 /* If NULL ptr in ASCII str (see Note #1b1), .. */
+       *p_err =  NET_ERR_FAULT_NULL_PTR;                                /* .. rtn err.                                  */
+        NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+        return (addr_ip);
+    }
+
+    if ((*p_char_prev == (CPU_CHAR)':') && (addr_nbr_dig_end == 1)) {   /* If last char a colon (see Note #1b2B1), ...  */
+        *p_err =  NET_ASCII_ERR_INVALID_CHAR_SEQ;                       /* .. rtn err.                                  */
+         NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+         return (addr_ip);
+    }
+
+    switch (addr_nbr_octet_dig) {
+        case 1:
+             addr_ip.Addr[addr_nbr_octet +1] = addr_ip.Addr[addr_nbr_octet] >> DEF_NIBBLE_NBR_BITS;
+             addr_ip.Addr[addr_nbr_octet]    = DEF_BIT_NONE;
+             addr_nbr_lead_zero = addr_nbr_lead_zero + 3u;
+             addr_nbr_octet     = addr_nbr_octet     + 2u;
+             addr_msb_octet     = DEF_YES;
+             break;
+
+        case 2:
+             addr_ip.Addr[addr_nbr_octet] = addr_ip.Addr[addr_nbr_octet -1];
+             addr_ip.Addr[addr_nbr_octet -1] = DEF_BIT_NONE;
+             addr_nbr_lead_zero = addr_nbr_lead_zero + 2u;
+             addr_nbr_octet     = addr_nbr_octet     + 1u;
+             break;
+
+        case 3:
+             addr_ip.Addr[addr_nbr_octet]    >>= DEF_NIBBLE_NBR_BITS;
+             addr_ip.Addr[addr_nbr_octet]     |= (addr_ip.Addr[addr_nbr_octet -1] << DEF_NIBBLE_NBR_BITS);
+             addr_ip.Addr[addr_nbr_octet -1] >>= DEF_NIBBLE_NBR_BITS;
+             addr_nbr_lead_zero = addr_nbr_lead_zero + 1u;
+             addr_nbr_octet     = addr_nbr_octet     + 1u;
+             addr_msb_octet     = DEF_YES;
+             break;
+
+         case 0:
+         case 4:
+         default:
+             break;
+     }
+
+    if (addr_nbr_octet != NET_ASCII_NBR_OCTET_ADDR_IPv6) {              /* If != nbr IPv6 addr octets (see Note #1b2A), */
+       *p_err =  NET_ASCII_ERR_INVALID_STR_LEN;                         /* .. rtn err.                                  */
+        NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr_ip);
+        return (addr_ip);
+    }
+
+   *p_err      =  NET_ASCII_ERR_NONE;
+
+    return (addr_ip);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetASCII_IPv4_to_Str()
+*
+* Description : Convert a network protocol IPv4 address in host-order into an IPv4 address ASCII string
+*                   in dotted-decimal notation.
+*
+* Argument(s) : addr_ip             IPv4 address.
+*
+*               p_addr_ip_ascii     Pointer to an ASCII character array that will receive the return IPv4
+*                                       address ASCII string from this function (see Note #1b).
+*
+*               lead_zeros          Prepend leading zeros option (see Note #2) :
+*
+*                                       DEF_NO      Do NOT prepend leading zeros to each decimal octet value.
+*                                       DEF_YES            Prepend leading zeros to each decimal octet value.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ASCII_ERR_NONE                  ASCII string successfully formatted.
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'paddr_ip_ascii' passed a
+*                                                                       NULL pointer.
+*                               NET_ASCII_ERR_INVALID_CHAR_LEN      Invalid ASCII character length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) (1) RFC #1983 states that "dotted decimal notation ... refers [to] IPv4 addresses of the
+*                           form A.B.C.D; where each letter represents, in decimal, one byte of a four byte IP
+*                           address".
+*
+*                       (2) In other words, the dotted-decimal IP address notation separates four decimal octet
+*                           values by the dot, or period, character ('.').  Each decimal value represents one
+*                           octet of the IP address starting with the most significant octet in network-order.
+*
+*                               IP Address Examples :
+*
+*                                      DOTTED DECIMAL NOTATION     HEXADECIMAL EQUIVALENT
+*
+*                                           127.0.0.1           =       0x7F000001
+*                                           192.168.1.64        =       0xC0A80140
+*                                           255.255.255.0       =       0xFFFFFF00
+*                                           ---         -                 --    --
+*                                            ^          ^                 ^      ^
+*                                            |          |                 |      |
+*                                           MSO        LSO               MSO    LSO
+*
+*                                   where
+*                                           MSO        Most  Significant Octet in Dotted Decimal IPv4 Address
+*                                           LSO        Least Significant Octet in Dotted Decimal IPv4 Address
+*
+*
+*                   (b) (1) The return dotted-decimal IPv4 address ASCII string :
+*
+*                           (A) Formats EXACTLY four decimal values   ...
+*                           (B) (1) ... separated by                  ...
+*                               (2) ... EXACTLY three dot characters; ...
+*                           (C) ... & terminated with the NULL character.
+*
+*                       (2) The size of the ASCII character array that will receive the returned IP address
+*                           ASCII string SHOULD be greater than or equal to NET_ASCII_LEN_MAX_ADDR_IP.
+*
+*               (2) (a) Leading zeros option prepends leading '0's prior to the first non-zero digit in each
+*                       decimal octet value.  The number of leading zeros is such that the decimal octet's
+*                       number of decimal digits is equal to the maximum number of digits (3).
+*
+*                   (b) (1) If leading zeros option DISABLED              ...
+*                       (2) ... & the decimal value of the octet is zero; ...
+*                       (3) ... then one digit of '0' value is formatted.
+*
+*                       This is NOT a leading zero; but a single decimal digit of '0' value.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+void  NetASCII_IPv4_to_Str (NET_IPv4_ADDR   addr_ip,
+                            CPU_CHAR       *p_addr_ip_ascii,
+                            CPU_BOOLEAN     lead_zeros,
+                            NET_ERR        *p_err)
+{
+    CPU_CHAR    *p_char;
+    CPU_INT08U   base_10_val_start;
+    CPU_INT08U   base_10_val;
+    CPU_INT08U   addr_octet_nbr_shifts;
+    CPU_INT08U   addr_octet_val;
+    CPU_INT08U   addr_octet_dig_nbr;
+    CPU_INT08U   addr_octet_dig_val;
+    CPU_INT08U   i;
+
+
+                                                                        /* -------------- VALIDATE PTR ---------------- */
+    if (p_addr_ip_ascii == (CPU_CHAR *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+                                                                        /* ------------ VALIDATE NBR CHAR ------------- */
+#if ((NET_ASCII_CHAR_MAX_OCTET_ADDR_IPv4 < NET_ASCII_CHAR_MIN_OCTET   ) || \
+     (NET_ASCII_CHAR_MAX_OCTET_ADDR_IPv4 > NET_ASCII_CHAR_MAX_OCTET_08))
+   *p_addr_ip_ascii = (CPU_CHAR)'\0';
+   *p_err           =  NET_ASCII_ERR_INVALID_CHAR_LEN;
+    return;
+#endif
+
+
+                                                                        /* ------------- CONVERT IP ADDR -------------- */
+    p_char = p_addr_ip_ascii;
+
+
+    base_10_val_start = 1u;
+    for (i = 1u; i < NET_ASCII_CHAR_MAX_OCTET_ADDR_IPv4; i++) {         /* Calc starting dig val.                       */
+        base_10_val_start *= 10u;
+    }
+
+
+    for (i = NET_ASCII_NBR_OCTET_ADDR_IPv4; i > 0u; i--) {              /* Parse ALL addr octets (see Note #1b1A).      */
+                                                                        /* Calc  cur addr octet val.                    */
+        addr_octet_nbr_shifts = (i - 1u) * DEF_OCTET_NBR_BITS;
+        addr_octet_val        = (CPU_INT08U)((addr_ip >> addr_octet_nbr_shifts) & DEF_OCTET_MASK);
+
+        base_10_val           =  base_10_val_start;
+        while (base_10_val > 0u) {                                      /* Parse ALL octet digs.                        */
+            addr_octet_dig_nbr = addr_octet_val / base_10_val;
+
+            if ((addr_octet_dig_nbr >  0u) ||                           /* If octet dig val > 0,                     .. */
+                (base_10_val        == 1u) ||                           /* .. OR on least-sig octet dig,             .. */
+                (lead_zeros == DEF_YES)) {                              /* .. OR lead zeros opt ENABLED (see Note #2),  */
+                                                                        /* .. calc & insert octet val ASCII dig.        */
+                 addr_octet_dig_val = (CPU_INT08U)(addr_octet_dig_nbr % 10u);
+                *p_char++           = (CPU_CHAR  )(addr_octet_dig_val + '0');
+            }
+
+            base_10_val /= 10u;                                         /* Shift to next least-sig octet dig.           */
+        }
+
+        if (i > 1u) {                                                   /* If NOT on last octet, ...                    */
+           *p_char++ = '.';                                             /* ... insert a dot char (see Note #1b1B2).     */
+        }
+    }
+
+   *p_char = (CPU_CHAR)'\0';                                            /* Append NULL char (see Note #1b1C).           */
+
+   *p_err  =  NET_ASCII_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetASCII_IPv6_to_Str()
+*
+* Description : Convert a network protocol IPv4 address in host-order into an IPv4 address ASCII string
+*                   in dotted-decimal notation.
+*
+* Argument(s) : paddr_ip            Pointer to IPv6 address.
+*
+*               paddr_ip_ascii      Pointer to an ASCII character array that will receive the return IPv6
+*                                       address ASCII string from this function (see Note #1b).
+*
+*               lead_zeros          Prepend leading zeros option (see Note #2) :
+*
+*                                       DEF_NO      Do NOT prepend leading zeros to each decimal octet value.
+*                                       DEF_YES            Prepend leading zeros to each decimal octet value.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ASCII_ERR_NONE                  ASCII string successfully formatted.
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'paddr_ip_ascii' passed a
+*                                                                       NULL pointer.
+*                               NET_ASCII_ERR_INVALID_CHAR_LEN      Invalid ASCII character length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) (a) (1) RFC #1983 states that "dotted decimal notation ... refers [to] IP addresses of the
+*                           form A.B.C.D; where each letter represents, in decimal, one byte of a four byte IP
+*                           address".
+*
+*                       (2) In other words, the dotted-decimal IP address notation separates four decimal octet
+*                           values by the dot, or period, character ('.').  Each decimal value represents one
+*                           octet of the IP address starting with the most significant octet in network-order.
+*
+*                               IP Address Examples :
+*
+*                                      DOTTED DECIMAL NOTATION     HEXADECIMAL EQUIVALENT
+*
+*                                           127.0.0.1           =       0x7F000001
+*                                           192.168.1.64        =       0xC0A80140
+*                                           255.255.255.0       =       0xFFFFFF00
+*                                           ---         -                 --    --
+*                                            ^          ^                 ^      ^
+*                                            |          |                 |      |
+*                                           MSO        LSO               MSO    LSO
+*
+*                                   where
+*                                           MSO        Most  Significant Octet in Dotted Decimal IP Address
+*                                           LSO        Least Significant Octet in Dotted Decimal IP Address
+*
+*
+*                   (b) (1) The return dotted-decimal IP address ASCII string :
+*
+*                           (A) Formats EXACTLY four decimal values   ...
+*                           (B) (1) ... separated by                  ...
+*                               (2) ... EXACTLY three dot characters; ...
+*                           (C) ... & terminated with the NULL character.
+*
+*                       (2) The size of the ASCII character array that will receive the returned IP address
+*                           ASCII string SHOULD be greater than or equal to NET_ASCII_LEN_MAX_ADDR_IP.
+*
+*               (2) (a) Leading zeros option prepends leading '0's prior to the first non-zero digit in each
+*                       decimal octet value.  The number of leading zeros is such that the decimal octet's
+*                       number of decimal digits is equal to the maximum number of digits (3).
+*
+*                   (b) (1) If leading zeros option DISABLED              ...
+*                       (2) ... & the decimal value of the octet is zero; ...
+*                       (3) ... then one digit of '0' value is formatted.
+*
+*                       This is NOT a leading zero; but a single decimal digit of '0' value.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv6_MODULE_EN
+void  NetASCII_IPv6_to_Str (NET_IPv6_ADDR  *p_addr_ip,
+                            CPU_CHAR       *p_addr_ip_ascii,
+                            CPU_BOOLEAN     hex_lower_case,
+                            CPU_BOOLEAN     lead_zeros,
+                            NET_ERR        *p_err)
+{
+    CPU_CHAR     *p_char;
+    CPU_INT08U   *p_addr;
+    CPU_INT08U    addr_octet_val;
+    CPU_INT08U    addr_octet_dig_val;
+    CPU_INT08U    addr_octet_nbr_shifts;
+    CPU_INT08U    addr_nbr_octet_dig;
+    CPU_INT08U    i;
+    CPU_INT08U    j;
+    CPU_BOOLEAN   addr_zero_lead;
+
+
+                                                                        /* -------------- VALIDATE PTRS --------------- */
+    if (p_addr_ip == (NET_IPv6_ADDR *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (p_addr_ip_ascii == (CPU_CHAR *)0) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+                                                                        /* ------------- CONVERT IP ADDR -------------- */
+    p_addr             = &p_addr_ip->Addr[0];
+    p_char             =  p_addr_ip_ascii;
+    addr_nbr_octet_dig =  0u;
+    addr_zero_lead     =  DEF_YES;
+
+    for (i = NET_ASCII_NBR_OCTET_ADDR_IPv6; i > 0; i--) {               /* Parse ALL addr octets (see Note #1b1A).      */
+
+        addr_octet_val = *p_addr;
+
+        for (j = NET_ASCII_CHAR_MAX_OCTET_ADDR_IPv6; j > 0; j--) {      /* Parse ALL octet's hex digs.                  */
+                                                                        /* Calc  cur octet's hex dig val.               */
+            addr_octet_nbr_shifts = (j - 1) * DEF_NIBBLE_NBR_BITS;
+            addr_octet_dig_val    = (addr_octet_val >> addr_octet_nbr_shifts) & DEF_NIBBLE_MASK;
+                                                                        /* Insert    octet's hex val ASCII dig.         */
+            addr_nbr_octet_dig++;
+            if (addr_octet_dig_val < 10) {
+                if ((lead_zeros         == DEF_YES) ||
+                    (addr_zero_lead     == DEF_NO)  ||
+                    (addr_nbr_octet_dig == NET_ASCII_CHAR_MAX_DIG_ADDR_IPv6) ||
+                    (addr_octet_dig_val != DEF_BIT_NONE)) {
+                   *p_char++       = (CPU_CHAR)(addr_octet_dig_val + '0');
+                    addr_zero_lead = DEF_NO;
+                }
+            } else {
+                if (hex_lower_case != DEF_YES) {
+                   *p_char++ = (CPU_CHAR)((addr_octet_dig_val - 10u) + 'A');
+                } else {
+                   *p_char++ = (CPU_CHAR)((addr_octet_dig_val - 10u) + 'a');
+                }
+                addr_zero_lead = DEF_NO;
+            }
+        }
+
+        if ((i % 2 != 0) &&
+            (i > 1)) {                                                  /* If NOT on last octet,                    ..  */
+            *p_char++          = ':';                                   /* .. insert colon char (see Note #1b1B2b).     */
+             addr_zero_lead    = DEF_YES;
+             addr_nbr_octet_dig = 0u;
+        }
+
+        p_addr++;
+    }
+
+   *p_char = (CPU_CHAR)'\0';                                            /* Append NULL char (see Note #1b1C).           */
+
+   *p_err  =  NET_ASCII_ERR_NONE;
+}
+#endif
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ascii.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ascii.h
new file mode 100644
index 0000000..16f0de7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ascii.h
@@ -0,0 +1,237 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK ASCII LIBRARY
+*
+* Filename      : net_ascii.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  
+#include  "net_type.h"
+#include  "net_err.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_ASCII_MODULE_PRESENT
+#define  NET_ASCII_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_ASCII_CHAR_LEN_DOT                            1u
+#define  NET_ASCII_CHAR_LEN_HYPHEN                         1u
+#define  NET_ASCII_CHAR_LEN_COLON                          1u
+#define  NET_ASCII_CHAR_LEN_NUL                            1u
+
+
+#define  NET_ASCII_CHAR_MIN_OCTET                          1u
+
+#define  NET_ASCII_CHAR_MAX_OCTET_08                     DEF_INT_08U_NBR_DIG_MAX
+#define  NET_ASCII_CHAR_MAX_OCTET_16                     DEF_INT_16U_NBR_DIG_MAX
+#define  NET_ASCII_CHAR_MAX_OCTET_32                     DEF_INT_32U_NBR_DIG_MAX
+
+#define  NET_ASCII_STR_LOCAL_HOST                        "localhost"
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK ASCII ADDRESS DEFINES
+*
+* Note(s) : (1) ONLY supports 48-bit Ethernet MAC addresses.
+*********************************************************************************************************
+*/
+
+#define  NET_ASCII_NBR_OCTET_ADDR_MAC                      6u   /* See Note #1.                                         */
+#define  NET_ASCII_CHAR_MAX_OCTET_ADDR_MAC                 2u
+
+#define  NET_ASCII_LEN_MAX_ADDR_MAC                    ((NET_ASCII_NBR_OCTET_ADDR_MAC       * NET_ASCII_CHAR_MAX_OCTET_ADDR_MAC) + \
+                                                       ((NET_ASCII_NBR_OCTET_ADDR_MAC - 1u) * NET_ASCII_CHAR_LEN_HYPHEN        ) + \
+                                                         NET_ASCII_CHAR_LEN_NUL                                                )
+
+
+                                                                /* IPv4 addresses.                                      */
+#define  NET_ASCII_CHAR_MAX_OCTET_ADDR_IPv4                3u
+#define  NET_ASCII_VAL_MAX_OCTET_ADDR_IPv4               255u
+
+#define  NET_ASCII_NBR_OCTET_ADDR_IPv4           (sizeof(NET_IPv4_ADDR))
+
+
+#define  NET_ASCII_LEN_MAX_ADDR_IPv4                   ((NET_ASCII_NBR_OCTET_ADDR_IPv4      * NET_ASCII_CHAR_MAX_OCTET_ADDR_IPv4) + \
+                                                       ((NET_ASCII_NBR_OCTET_ADDR_IPv4 - 1) * NET_ASCII_CHAR_LEN_DOT            ) + \
+                                                         NET_ASCII_CHAR_LEN_NUL                                                 )
+
+#define  NET_ASCII_NBR_MAX_DEC_PARTS                       4u
+#define  NET_ASCII_CHAR_MAX_PART_ADDR_IP                 DEF_INT_32U_NBR_DIG_MAX
+#define  NET_ASCII_VAL_MAX_PART_ADDR_IP                  DEF_INT_32U_MAX_VAL
+#define  NET_ASCII_NBR_MAX_DOT_ADDR_IP                     3u
+
+#define  NET_ASCII_MASK_32_01_BIT                      0xFFFFFFFFu
+#define  NET_ASCII_MASK_24_01_BIT                      0x00FFFFFFu
+#define  NET_ASCII_MASK_16_01_BIT                      0x0000FFFFu
+#define  NET_ASCII_MASK_08_01_BIT                      0x000000FFu
+#define  NET_ASCII_MASK_16_09_BIT                      0x0000FF00u
+#define  NET_ASCII_MASK_24_17_BIT                      0x00FF0000u
+
+
+                                                                /* IPv6 addresses.                                      */
+#define  NET_ASCII_CHAR_MAX_OCTET_ADDR_IPv6                2u
+#define  NET_ASCII_CHAR_MAX_DIG_ADDR_IPv6               (NET_ASCII_CHAR_MAX_OCTET_ADDR_IPv6 * 2)
+#define  NET_ASCII_CHAR_MIN_COLON_IPv6                     2u
+#define  NET_ASCII_CHAR_MAX_COLON_IPv6                     7u
+#define  NET_ASCII_VAL_MAX_OCTET_ADDR_IPv6               255u
+
+#define  NET_ASCII_NBR_OCTET_ADDR_IPv6           (sizeof(NET_IPv6_ADDR))
+
+
+#define  NET_ASCII_LEN_MAX_ADDR_IPv6                   (((NET_ASCII_CHAR_MAX_DIG_ADDR_IPv6 * 4)      * NET_ASCII_CHAR_MAX_OCTET_ADDR_IPv6) + \
+                                                       (((NET_ASCII_CHAR_MAX_DIG_ADDR_IPv6 * 2) - 1) * NET_ASCII_CHAR_LEN_COLON          ) + \
+                                                          NET_ASCII_CHAR_LEN_NUL                                                         )
+
+#ifdef   NET_IP_MODULE_EN
+
+#ifdef   NET_IPv4_MODULE_EN
+#undef   NET_ASCII_LEN_MAX_ADDR_IP
+#define  NET_ASCII_LEN_MAX_ADDR_IP                        NET_ASCII_LEN_MAX_ADDR_IPv4
+#endif
+
+#ifdef   NET_IPv6_MODULE_EN
+#undef   NET_ASCII_LEN_MAX_ADDR_IP
+#define  NET_ASCII_LEN_MAX_ADDR_IP                        NET_ASCII_LEN_MAX_ADDR_IPv6
+#endif
+
+#define  NET_ASCII_LEN_MAX_PORT                           DEF_INT_16U_NBR_DIG_MAX
+
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+void                NetASCII_Str_to_MAC         (CPU_CHAR       *p_addr_mac_ascii,
+                                                 CPU_INT08U     *p_addr_mac,
+                                                 NET_ERR        *p_err);
+
+void                NetASCII_MAC_to_Str         (CPU_INT08U     *p_addr_mac,
+                                                 CPU_CHAR       *p_addr_mac_ascii,
+                                                 CPU_BOOLEAN     hex_lower_case,
+                                                 CPU_BOOLEAN     hex_colon_sep,
+                                                 NET_ERR        *p_err);
+
+NET_IP_ADDR_FAMILY  NetASCII_Str_to_IP          (CPU_CHAR       *p_addr_ip_ascii,
+                                                 void           *p_addr,
+                                                 CPU_INT08U      addr_max_len,
+                                                 NET_ERR        *p_err);
+
+NET_IPv4_ADDR       NetASCII_Str_to_IPv4        (CPU_CHAR       *p_addr_ip_ascii,
+                                                 NET_ERR        *p_err);
+
+NET_IPv6_ADDR       NetASCII_Str_to_IPv6        (CPU_CHAR       *p_addr_ip_ascii,
+                                                 NET_ERR        *p_err);
+
+void                NetASCII_IPv4_to_Str        (NET_IPv4_ADDR   addr_ip,
+                                                 CPU_CHAR       *p_addr_ip_ascii,
+                                                 CPU_BOOLEAN     lead_zeros,
+                                                 NET_ERR        *p_err);
+
+NET_IPv4_ADDR       NetASCII_Str_to_IPv4_Handler(CPU_CHAR       *p_addr_ip_ascii,
+                                                 CPU_INT08U     *p_dot_nbr,
+                                                 NET_ERR        *p_err);
+
+void                NetASCII_IPv6_to_Str        (NET_IPv6_ADDR  *p_addr_ip,
+                                                 CPU_CHAR       *p_addr_ip_ascii,
+                                                 CPU_BOOLEAN     hex_lower_case,
+                                                 CPU_BOOLEAN     lead_zeros,
+                                                 NET_ERR        *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_ASCII_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_bsd.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_bsd.c
new file mode 100644
index 0000000..3769fcc
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_bsd.c
@@ -0,0 +1,1661 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            BSD 4.x LAYER
+*
+* Filename      : net_bsd.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+* Note(s)       : (1) Supports BSD 4.x Layer API with the following restrictions/constraints :
+*
+*                     (a) ONLY supports the following BSD layer functionality :
+*                         (1) BSD sockets                                           See 'net_sock.h  Note #1'
+*
+*                     (b) Return variable 'errno' NOT currently supported
+*
+*********************************************************************************************************
+* Notice(s)     : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given
+*                     us permission to reprint portions of their documentation.  Portions of this text are
+*                     reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition,
+*                     Standard for Information Technology -- Portable Operating System Interface (POSIX),
+*                     The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute
+*                     of Electrical and Electronics Engineers, Inc and The Open Group.  In the event of any
+*                     discrepancy between these versions and the original IEEE and The Open Group Standard,
+*                     the original IEEE and The Open Group Standard is the referee document.  The original
+*                     Standard can be obtained online at http://www.opengroup.org/unix/online.html.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_BSD_MODULE
+#include  "net_bsd.h"
+#include  "net_sock.h"
+#include  "net_util.h"
+#include  "net_err.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*
+* Note(s) : (1) BSD 4.x global variables are required only for applications that call BSD 4.x functions.
+*
+*               See also 'MODULE  Note #1b'
+*                      & 'STANDARD BSD 4.x FUNCTION PROTOTYPES  Note #1'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+                                                                /* See Note #1.                                 */
+static  CPU_CHAR   NetBSD_IP_to_Str_Array[NET_ASCII_LEN_MAX_ADDR_IPv4];
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     STANDARD BSD 4.x FUNCTIONS
+*
+* Note(s) : (1) BSD 4.x function definitions are required only for applications that call BSD 4.x functions.
+*
+*               See 'net_bsd.h  MODULE  Note #1b3'
+*                 & 'net_bsd.h  STANDARD BSD 4.x FUNCTION PROTOTYPES  Note #1'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              socket()
+*
+* Description : Create a socket.
+*
+* Argument(s) : protocol_family     Socket protocol family :
+*
+*                                       PF_INET                 Internet Protocol version 4 (IPv4).
+*
+*                                   See also 'net_sock.c  Note #1a'.
+*
+*               sock_type           Socket type :
+*
+*                                       SOCK_DGRAM              Datagram-type socket.
+*                                       SOCK_STREAM             Stream  -type socket.
+*
+*                                   See also 'net_sock.c  Note #1b'.
+*
+*               protocol            Socket protocol :
+*
+*                                       0                       Default protocol for socket type.
+*                                       IPPROTO_UDP             User Datagram        Protocol (UDP).
+*                                       IPPROTO_TCP             Transmission Control Protocol (TCP).
+*
+*                                   See also 'net_sock.c  Note #1c'.
+*
+* Return(s)   : Socket descriptor/handle identifier, if NO error(s).
+*
+*               -1,                                  otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+int  socket (int  protocol_family,
+             int  sock_type,
+             int  protocol)
+{
+    int      rtn_code;
+    NET_ERR  err;
+
+
+    rtn_code = (int)NetSock_Open((NET_SOCK_PROTOCOL_FAMILY)protocol_family,
+                                 (NET_SOCK_TYPE           )sock_type,
+                                 (NET_SOCK_PROTOCOL       )protocol,
+                                                          &err);
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                               close()
+*
+* Description : Close a socket.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to close.
+*
+* Return(s)   :  0, if NO error(s).
+*
+*               -1, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Once an application closes its socket, NO further operations on the socket are allowed
+*                   & the application MUST NOT continue to access the socket.
+*********************************************************************************************************
+*/
+
+int  close (int  sock_id)
+{
+    int      rtn_code;
+    NET_ERR  err;
+
+
+    rtn_code = (int)NetSock_Close(sock_id,
+                                 &err);
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                               bind()
+*
+* Description : Bind a socket to a local address.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to bind to a local address.
+*
+*               p_addr_local    Pointer to socket address structure             (see Notes #1b1B, #1b2, & #2).
+*
+*               addr_len        Length  of socket address structure (in octets) [see Note  #1b1C].
+*
+* Return(s)   :  0, if NO error(s) [see Note #1c1].
+*
+*               -1, otherwise      (see Note #1c2A).
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) (1) IEEE Std 1003.1, 2004 Edition, Section 'bind() : DESCRIPTION' states that "the bind()
+*                           function shall assign a local socket address ... to a socket".
+*
+*                       (2) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                           Section 4.4, Page 102 states that "bind() lets us specify the ... address, the port,
+*                           both, or neither".
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the bind()
+*                           function takes the following arguments" :
+*
+*                           (A) 'socket' - "Specifies the file descriptor of the socket to be bound."
+*
+*                           (B) 'address' - "Points to a 'sockaddr' structure containing the address to be bound
+*                                to the socket.  The length and format of the address depend on the address family
+*                                of the socket."
+*
+*                           (C) 'address_len' - "Specifies the length of the 'sockaddr' structure pointed to by
+*                                the address argument."
+*
+*                       (2) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                           Section 4.4, Page 102 states that "if ... bind() is called" with :
+*
+*                           (A) "A port number of 0, the kernel chooses an ephemeral port."
+*
+*                               (1) "bind() does not return the chosen value ... [of] an ephemeral port ... Call
+*                                    getsockname() to return the protocol address ... to obtain the value of the
+*                                    ephemeral port assigned by the kernel."
+*
+*                           (B) "A wildcard ... address, the kernel does not choose the local ... address until
+*                                either the socket is connected (TCP) or a datagram is sent on the socket (UDP)."
+*
+*                               (1) "With IPv4, the wildcard address is specified by the constant INADDR_ANY,
+*                                    whose value is normally 0."
+*
+*                   (c) IEEE Std 1003.1, 2004 Edition, Section 'bind() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, bind() shall return 0;" ...
+*
+*                       (2) (A) "Otherwise, -1 shall be returned," ...
+*                           (B) "and 'errno' shall be set to indicate the error."
+*                               'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   (d) (1) IEEE Std 1003.1, 2004 Edition, Section 'bind() : ERRORS' states that "the bind()
+*                           function shall fail if" :
+*
+*                           (A) "[EBADF] - The 'socket' argument is not a valid file descriptor."
+*
+*                           (B) "[EAFNOSUPPORT]  - The specified address is not a valid address for the address
+*                                family of the specified socket."
+*
+*                           (C) "[EADDRNOTAVAIL] - The specified address is not available from the local machine."
+*
+*                           (D) "[EADDRINUSE]    - The specified address is already in use."
+*
+*                           (E) "[EINVAL]" -
+*
+*                               (1) (a) "The socket is already bound to an address,"                  ...
+*                                   (b) "and the protocol does not support binding to a new address;" ...
+*
+*                               (2) "or the socket has been shut down."
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'bind() : ERRORS' states that "the bind()
+*                           function may fail if" :
+*
+*                           (A) "[EINVAL]  - The 'address_len' argument is not a valid length for the address
+*                                family."
+*
+*                           (B) "[EISCONN] - The socket is already connected."
+*
+*                           (C) "[ENOBUFS] - Insufficient resources were available to complete the call."
+*
+*                   See also 'net_sock.c  NetSock_BindHandler()  Note #2'.
+*
+*               (2) (a) Socket address structure 'sa_family' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'
+*                          & 'net_sock.c  NetSock_BindHandler()  Note #3'.
+*********************************************************************************************************
+*/
+
+int  bind (        int         sock_id,
+           struct  sockaddr   *p_addr_local,
+                   socklen_t   addr_len)
+{
+    int      rtn_code;
+    NET_ERR  err;
+
+
+    rtn_code = (int)NetSock_Bind(                 sock_id,
+                                 (NET_SOCK_ADDR *)p_addr_local,
+                                                  addr_len,
+                                                 &err);
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              connect()
+*
+* Description : Connect a socket to a remote server.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to connect.
+*
+*               p_addr_remote   Pointer to socket address structure (see Note #1).
+*
+*               addr_len        Length  of socket address structure (in octets).
+*
+* Return(s)   :  0, if NO error(s).
+*
+*               -1, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) Socket address structure 'sa_family' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*********************************************************************************************************
+*/
+
+int  connect (        int         sock_id,
+              struct  sockaddr   *p_addr_remote,
+                      socklen_t   addr_len)
+{
+    int      rtn_code;
+    NET_ERR  err;
+
+
+    rtn_code = (int)NetSock_Conn(                 sock_id,
+                                 (NET_SOCK_ADDR *)p_addr_remote,
+                                                  addr_len,
+                                                 &err);
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              listen()
+*
+* Description : Set socket to listen for connection requests.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to listen.
+*
+*               sock_q_size     Number of connection requests to queue on listen socket.
+*
+* Return(s)   :  0, if NO error(s).
+*
+*               -1, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+int  listen (int  sock_id,
+             int  sock_q_size)
+{
+    int      rtn_code;
+    NET_ERR  err;
+
+
+    rtn_code = (int)NetSock_Listen(sock_id,
+                                   sock_q_size,
+                                  &err);
+
+    return (rtn_code);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                              accept()
+*
+* Description : Get a new socket accepted from a socket set to listen for connection requests.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of listen socket.
+*
+*               p_addr_remote   Pointer to an address buffer that will receive the socket address structure
+*                                   of the accepted socket's remote address (see Note #1), if NO error(s).
+*
+*               p_addr_len      Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address buffer pointed to by 'p_addr_remote'.
+*                                   (b) (1) Return the actual size of socket address structure with the
+*                                               accepted socket's remote address, if NO error(s);
+*                                       (2) Return 0,                             otherwise.
+*
+* Return(s)   : Socket descriptor/handle identifier of new accepted socket, if NO error(s).
+*
+*               -1,                                                         otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) Socket address structure 'sa_family' member returned in host-order & SHOULD NOT
+*                       be converted to network-order.
+*
+*                   (b) Socket address structure addresses returned in network-order & SHOULD be converted
+*                       from network-order to host-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+int  accept (        int         sock_id,
+             struct  sockaddr   *p_addr_remote,
+                     socklen_t  *p_addr_len)
+{
+    int                rtn_code;
+    NET_SOCK_ADDR_LEN  addr_len;
+    NET_ERR            err;
+
+
+    addr_len   = (NET_SOCK_ADDR_LEN)*p_addr_len;
+    rtn_code   = (int)NetSock_Accept((NET_SOCK_ID        ) sock_id,
+                                     (NET_SOCK_ADDR     *) p_addr_remote,
+                                     (NET_SOCK_ADDR_LEN *)&addr_len,
+                                     (NET_ERR           *)&err);
+
+   *p_addr_len = (socklen_t)addr_len;
+
+    return (rtn_code);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             recvfrom()
+*
+* Description : Receive data from a socket.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to receive data.
+*
+*               p_data_buf      Pointer to an application data buffer that will receive the socket's received
+*                                   data.
+*
+*               data_buf_len    Size of the   application data buffer (in octets) [see Note #1].
+*
+*               flags           Flags to select receive options (see Note #2); bit-field flags logically OR'd :
+*
+*                                   0                           No socket flags selected.
+*                                   MSG_PEEK                    Receive socket data without consuming
+*                                                                   the socket data.
+*                                   MSG_DONTWAIT                Receive socket data without blocking.
+*
+*               p_addr_remote   Pointer to an address buffer that will receive the socket address structure
+*                                   with the received data's remote address (see Note #3), if NO error(s).
+*
+*               p_addr_len      Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address buffer pointed to by 'p_addr_remote'.
+*                                   (b) (1) Return the actual size of socket address structure with the
+*                                               received data's remote address, if NO error(s);
+*                                       (2) Return 0,                           otherwise.
+*
+* Return(s)   : Number of positive data octets received, if NO error(s)              [see Note #4a].
+*
+*                0,                                      if socket connection closed (see Note #4b).
+*
+*               -1,                                      otherwise                   (see Note #4c1).
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) (1) (A) Datagram-type sockets send & receive all data atomically -- i.e. every single,
+*                               complete datagram transmitted MUST be received as a single, complete datagram.
+*
+*                           (B) IEEE Std 1003.1, 2004 Edition, Section 'recvfrom() : DESCRIPTION' summarizes
+*                               that "for message-based sockets, such as ... SOCK_DGRAM ... the entire message
+*                               shall be read in a single operation.  If a message is too long to fit in the
+*                               supplied buffer, and MSG_PEEK is not set in the flags argument, the excess
+*                               bytes shall be discarded".
+*
+*                       (2) Thus if the socket's type is datagram & the receive data buffer size is NOT
+*                           large enough for the received data, the receive data buffer is maximally filled
+*                           with receive data but the remaining data octets are silently discarded & NO
+*                           error is returned.
+*
+*                           (A) IEEE Std 1003.1, 2004 Edition, Section 'send() : ERRORS' states to return an
+*                               'EMSGSIZE' error when "the message is too large to be sent all at once".
+*
+*                               Similarly, a socket receive whose receive data buffer size is NOT large
+*                               enough for the received data could return an 'EMSGSIZE' error.
+*
+*                   (b) (1) (A) (1) Stream-type sockets send & receive all data octets in one or more non-
+*                                   distinct packets.  In other words, the application data is NOT bounded
+*                                   by any specific packet(s); rather, it is contiguous & sequenced from
+*                                   one packet to the next.
+*
+*                               (2) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes
+*                                   that "for stream-based sockets, such as SOCK_STREAM, message boundaries
+*                                   shall be ignored.  In this case, data shall be returned to the user as
+*                                   soon as it becomes available, and no data shall be discarded".
+*
+*                           (B) Thus if the socket's type is stream & the receive data buffer size is NOT
+*                               large enough for the received data, the receive data buffer is maximally
+*                               filled with receive data & the remaining data octets remain queued for
+*                               later application-socket receives.
+*
+*                       (2) Thus it is typical -- but NOT absolutely required -- that a single application
+*                           task ONLY receive or request to receive data from a stream-type socket.
+*
+*                   See also 'net_sock.c  NetSock_RxDataHandler()  Note #2'.
+*
+*               (2) Only some socket receive flag options are implemented.  If other flag options are requested,
+*                   socket receive handler function(s) abort & return appropriate error codes so that requested
+*                   flag options are NOT silently ignored.
+*
+*               (3) (a) Socket address structure 'sa_family' member returned in host-order & SHOULD NOT
+*                       be converted to network-order.
+*
+*                   (b) Socket address structure addresses returned in network-order & SHOULD be converted
+*                       from network-order to host-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (4) IEEE Std 1003.1, 2004 Edition, Section 'recvfrom() : RETURN VALUE' states that :
+*
+*                   (a) "Upon successful completion, recvfrom() shall return the length of the message in
+*                        bytes."
+*
+*                   (b) "If no messages are available to be received and the peer has performed an orderly
+*                        shutdown, recvfrom() shall return 0."
+*
+*                   (c) (1) "Otherwise, [-1 shall be returned]" ...
+*                       (2) "and 'errno' set to indicate the error."
+*                           'errno' NOT currently supported (see 'net_bsd.c  Note #1b').
+*
+*                   See also 'net_sock.c  NetSock_RxDataHandler()  Note #7'.
+*********************************************************************************************************
+*/
+
+ssize_t  recvfrom (        int         sock_id,
+                           void       *p_data_buf,
+                          _size_t      data_buf_len,
+                           int         flags,
+                   struct  sockaddr   *p_addr_remote,
+                           socklen_t  *p_addr_len)
+{
+    ssize_t            rtn_code;
+    NET_SOCK_ADDR_LEN  addr_len;
+    NET_ERR            err;
+
+
+    if (data_buf_len > DEF_INT_16U_MAX_VAL) {
+        return (NET_BSD_ERR_DFLT);
+    }
+
+    addr_len   = (NET_SOCK_ADDR_LEN)*p_addr_len;
+    rtn_code   = (ssize_t)NetSock_RxDataFrom((NET_SOCK_ID        ) sock_id,
+                                             (void              *) p_data_buf,
+                                             (CPU_INT16U         ) data_buf_len,
+                                             (NET_SOCK_API_FLAGS ) flags,
+                                             (NET_SOCK_ADDR     *) p_addr_remote,
+                                             (NET_SOCK_ADDR_LEN *)&addr_len,
+                                             (void              *) 0,
+                                             (CPU_INT08U         ) 0u,
+                                             (CPU_INT08U        *) 0,
+                                             (NET_ERR           *)&err);
+
+   *p_addr_len = (socklen_t)addr_len;
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                               recv()
+*
+* Description : Receive data from a socket.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to receive data.
+*
+*               p_data_buf      Pointer to an application data buffer that will receive the socket's received
+*                                   data.
+*
+*               data_buf_len    Size of the   application data buffer (in octets) [see Note #1].
+*
+*               flags           Flags to select receive options (see Note #2); bit-field flags logically OR'd :
+*
+*                                   0                           No socket flags selected.
+*                                   MSG_PEEK                    Receive socket data without consuming
+*                                                                   the socket data.
+*                                   MSG_DONTWAIT                Receive socket data without blocking.
+*
+* Return(s)   : Number of positive data octets received, if NO error(s)              [see Note #3a].
+*
+*                0,                                      if socket connection closed (see Note #3b).
+*
+*               -1,                                      otherwise                   (see Note #3c1).
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) (1) (A) Datagram-type sockets send & receive all data atomically -- i.e. every single,
+*                               complete datagram transmitted MUST be received as a single, complete datagram.
+*
+*                           (B) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes that
+*                               "for message-based sockets, such as SOCK_DGRAM ... the entire message shall be
+*                               read in a single operation.  If a message is too long to fit in the supplied
+*                               buffer, and MSG_PEEK is not set in the flags argument, the excess bytes shall
+*                               be discarded".
+*
+*                       (2) Thus if the socket's type is datagram & the receive data buffer size is NOT
+*                           large enough for the received data, the receive data buffer is maximally filled
+*                           with receive data but the remaining data octets are silently discarded & NO
+*                           error is returned.
+*
+*                           (A) IEEE Std 1003.1, 2004 Edition, Section 'send() : ERRORS' states to return an
+*                               'EMSGSIZE' error when "the message is too large to be sent all at once".
+*
+*                               Similarly, a socket receive whose receive data buffer size is NOT large
+*                               enough for the received data could return an 'EMSGSIZE' error.
+*
+*                   (b) (1) (A) (1) Stream-type sockets send & receive all data octets in one or more non-
+*                                   distinct packets.  In other words, the application data is NOT bounded
+*                                   by any specific packet(s); rather, it is contiguous & sequenced from
+*                                   one packet to the next.
+*
+*                               (2) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes
+*                                   that "for stream-based sockets, such as SOCK_STREAM, message boundaries
+*                                   shall be ignored.  In this case, data shall be returned to the user as
+*                                   soon as it becomes available, and no data shall be discarded".
+*
+*                           (B) Thus if the socket's type is stream & the receive data buffer size is NOT
+*                               large enough for the received data, the receive data buffer is maximally
+*                               filled with receive data & the remaining data octets remain queued for
+*                               later application-socket receives.
+*
+*                       (2) Thus it is typical -- but NOT absolutely required -- that a single application
+*                           task ONLY receive or request to receive data from a stream-type socket.
+*
+*                   See also 'net_sock.c  NetSock_RxDataHandler()  Note #2'.
+*
+*               (2) Only some socket receive flag options are implemented.  If other flag options are requested,
+*                   socket receive handler function(s) abort & return appropriate error codes so that requested
+*                   flag options are NOT silently ignored.
+*
+*               (3) IEEE Std 1003.1, 2004 Edition, Section 'recv() : RETURN VALUE' states that :
+*
+*                   (a) "Upon successful completion, recv() shall return the length of the message in bytes."
+*
+*                   (b) "If no messages are available to be received and the peer has performed an orderly
+*                        shutdown, recv() shall return 0."
+*
+*                   (c) (1) "Otherwise, -1 shall be returned" ...
+*                       (2) "and 'errno' set to indicate the error."
+*                           'errno' NOT currently supported (see 'net_bsd.c  Note #1b').
+*
+*                   See also 'net_sock.c  NetSock_RxDataHandler()  Note #7'.
+*********************************************************************************************************
+*/
+
+ssize_t  recv (int      sock_id,
+               void    *p_data_buf,
+              _size_t   data_buf_len,
+               int      flags)
+{
+    ssize_t  rtn_code;
+    NET_ERR  err;
+
+
+    if (data_buf_len > DEF_INT_16U_MAX_VAL) {
+        return (NET_BSD_ERR_DFLT);
+    }
+
+    rtn_code = (ssize_t)NetSock_RxData((NET_SOCK_ID       ) sock_id,
+                                       (void             *) p_data_buf,
+                                       (CPU_INT16U        ) data_buf_len,
+                                       (NET_SOCK_API_FLAGS) flags,
+                                       (NET_ERR          *)&err);
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              sendto()
+*
+* Description : Send data through a socket.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to send data.
+*
+*               p_data          Pointer to application data to send.
+*
+*               data_len        Length of  application data to send (in octets) [see Note #1].
+*
+*               flags           Flags to select send options (see Note #2); bit-field flags logically OR'd :
+*
+*                                   0                           No socket flags selected.
+*                                   MSG_DONTWAIT                Send socket data without blocking.
+*
+*               p_addr_remote   Pointer to destination address buffer (see Note #3);
+*                                   required for datagram sockets, optional for stream sockets.
+*
+*               addr_len        Length of  destination address buffer (in octets).
+*
+* Return(s)   : Number of positive data octets sent, if NO error(s)              [see Note #4a1].
+*
+*                0,                                  if socket connection closed (see Note #4b).
+*
+*               -1,                                  otherwise                   (see Note #4a2A).
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) (1) (A) Datagram-type sockets send & receive all data atomically -- i.e. every single,
+*                               complete datagram  sent      MUST be received    as a single, complete datagram.
+*                               Thus each call to send data MUST be transmitted in a single, complete datagram.
+*
+*                           (B) (1) IEEE Std 1003.1, 2004 Edition, Section 'send() : DESCRIPTION' states that
+*                                   "if the message is too long to pass through the underlying protocol, send()
+*                                   shall fail and no data shall be transmitted".
+*
+*                               (2) Since IP transmit fragmentation is NOT currently supported (see 'net_ip.h
+*                                   Note #1d'), if the socket's type is datagram & the requested send data
+*                                   length is greater than the socket/transport layer MTU, then NO data is
+*                                   sent & NET_SOCK_ERR_INVALID_DATA_SIZE error is returned.
+*
+*                       (2) (A) (1) Stream-type sockets send & receive all data octets in one or more non-
+*                                   distinct packets.  In other words, the application data is NOT bounded
+*                                   by any specific packet(s); rather, it is contiguous & sequenced from
+*                                   one packet to the next.
+*
+*                               (2) Thus if the socket's type is stream & the socket's send data queue(s) are
+*                                   NOT large enough for the send data, the send data queue(s) are maximally
+*                                   filled with send data & the remaining data octets are discarded but may be
+*                                   re-sent by later application-socket sends.
+*
+*                               (3) Therefore, NO stream-type socket send data length should be "too long to
+*                                   pass through the underlying protocol" & cause the socket send to "fail ...
+*                                   [with] no data ... transmitted" (see Note #1a1B1).
+*
+*                           (B) Thus it is typical -- but NOT absolutely required -- that a single application
+*                               task ONLY send or request to send data to a stream-type socket.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*
+*                   See also 'net_sock.c  NetSock_TxDataHandler()  Note #2'.
+*
+*               (2) Only some socket send flag options are implemented.  If other flag options are requested,
+*                   socket send handler function(s) abort & return appropriate error codes so that requested
+*                   flag options are NOT silently ignored.
+*
+*               (3) (a) Socket address structure 'sa_family' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (4) (a) IEEE Std 1003.1, 2004 Edition, Section 'sendto() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, sendto() shall return the number of bytes sent."
+*
+*                           (A) Section 'sendto() : DESCRIPTION' elaborates that "successful completion
+*                               of a call to sendto() does not guarantee delivery of the message".
+*
+*                           (B) (1) Thus applications SHOULD verify the actual returned number of data
+*                                   octets transmitted &/or prepared for transmission.
+*
+*                               (2) In addition, applications MAY desire verification of receipt &/or
+*                                   acknowledgement of transmitted data to the remote host -- either
+*                                   inherently by the transport layer or explicitly by the application.
+*
+*                       (2) (A) "Otherwise, -1 shall be returned" ...
+*                               (1) Section 'sendto() : DESCRIPTION' elaborates that "a return value of
+*                                   -1 indicates only locally-detected errors".
+*
+*                           (B) "and 'errno' set to indicate the error."
+*                               'errno' NOT currently supported (see 'net_bsd.c  Note #1b').
+*
+*                   (b) Although NO socket send() specification states to return '0' when the socket's
+*                       connection is closed, it seems reasonable to return '0' since it is possible for the
+*                       socket connection to be close()'d or shutdown() by the remote host.
+*
+*                   See also 'net_sock.c  NetSock_TxDataHandler()  Note #5'.
+*********************************************************************************************************
+*/
+
+ssize_t  sendto (        int         sock_id,
+                         void       *p_data,
+                        _size_t      data_len,
+                         int         flags,
+                 struct  sockaddr   *p_addr_remote,
+                         socklen_t   addr_len)
+{
+    ssize_t  rtn_code;
+    NET_ERR  err;
+
+
+    rtn_code = (ssize_t)NetSock_TxDataTo((NET_SOCK_ID       ) sock_id,
+                                         (void             *) p_data,
+                                         (CPU_INT16U        ) data_len,
+                                         (NET_SOCK_API_FLAGS) flags,
+                                         (NET_SOCK_ADDR    *) p_addr_remote,
+                                         (NET_SOCK_ADDR_LEN ) addr_len,
+                                         (NET_ERR          *)&err);
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                               send()
+*
+* Description : Send data through a socket.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to send data.
+*
+*               p_data          Pointer to application data to send.
+*
+*               data_len        Length of  application data to send (in octets) [see Note #1].
+*
+*               flags           Flags to select send options (see Note #2); bit-field flags logically OR'd :
+*
+*                                   0                           No socket flags selected.
+*                                   MSG_DONTWAIT                Send socket data without blocking.
+*
+* Return(s)   : Number of positive data octets sent, if NO error(s)              [see Note #3a1].
+*
+*                0,                                  if socket connection closed (see Note #3b).
+*
+*               -1,                                  otherwise                   (see Note #3a2A).
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) (1) (A) Datagram-type sockets send & receive all data atomically -- i.e. every single,
+*                               complete datagram  sent      MUST be received    as a single, complete datagram.
+*                               Thus each call to send data MUST be transmitted in a single, complete datagram.
+*
+*                           (B) (1) IEEE Std 1003.1, 2004 Edition, Section 'send() : DESCRIPTION' states that
+*                                   "if the message is too long to pass through the underlying protocol, send()
+*                                   shall fail and no data shall be transmitted".
+*
+*                               (2) Since IP transmit fragmentation is NOT currently supported (see 'net_ip.h
+*                                   Note #1d'), if the socket's type is datagram & the requested send data
+*                                   length is greater than the socket/transport layer MTU, then NO data is
+*                                   sent & NET_SOCK_ERR_INVALID_DATA_SIZE error is returned.
+*
+*                       (2) (A) (1) Stream-type sockets send & receive all data octets in one or more non-
+*                                   distinct packets.  In other words, the application data is NOT bounded
+*                                   by any specific packet(s); rather, it is contiguous & sequenced from
+*                                   one packet to the next.
+*
+*                               (2) Thus if the socket's type is stream & the socket's send data queue(s) are
+*                                   NOT large enough for the send data, the send data queue(s) are maximally
+*                                   filled with send data & the remaining data octets are discarded but may be
+*                                   re-sent by later application-socket sends.
+*
+*                               (3) Therefore, NO stream-type socket send data length should be "too long to
+*                                   pass through the underlying protocol" & cause the socket send to "fail ...
+*                                   [with] no data ... transmitted" (see Note #1a1B1).
+*
+*                           (B) Thus it is typical -- but NOT absolutely required -- that a single application
+*                               task ONLY send or request to send data to a stream-type socket.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*
+*                   See also 'net_sock.c  NetSock_TxDataHandler()  Note #2'.
+*
+*               (2) Only some socket send flag options are implemented.  If other flag options are requested,
+*                   socket send handler function(s) abort & return appropriate error codes so that requested
+*                   flag options are NOT silently ignored.
+*
+*               (3) (a) IEEE Std 1003.1, 2004 Edition, Section 'send() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, send() shall return the number of bytes sent."
+*
+*                           (A) Section 'send() : DESCRIPTION' elaborates that "successful completion
+*                               of a call to sendto() does not guarantee delivery of the message".
+*
+*                           (B) (1) Thus applications SHOULD verify the actual returned number of data
+*                                   octets transmitted &/or prepared for transmission.
+*
+*                               (2) In addition, applications MAY desire verification of receipt &/or
+*                                   acknowledgement of transmitted data to the remote host -- either
+*                                   inherently by the transport layer or explicitly by the application.
+*
+*                       (2) (A) "Otherwise, -1 shall be returned" ...
+*                               (1) Section 'send() : DESCRIPTION' elaborates that "a return value of
+*                                   -1 indicates only locally-detected errors".
+*
+*                           (B) "and 'errno' set to indicate the error."
+*                               'errno' NOT currently supported (see 'net_bsd.c  Note #1b').
+*
+*                   (b) Although NO socket send() specification states to return '0' when the socket's
+*                       connection is closed, it seems reasonable to return '0' since it is possible for the
+*                       socket connection to be close()'d or shutdown() by the remote host.
+*
+*                   See also 'net_sock.c  NetSock_TxDataHandler()  Note #5'.
+*********************************************************************************************************
+*/
+
+ssize_t  send (int      sock_id,
+               void    *p_data,
+              _size_t   data_len,
+               int      flags)
+{
+    ssize_t  rtn_code;
+    NET_ERR  err;
+
+
+    rtn_code = (ssize_t)NetSock_TxData((NET_SOCK_ID       ) sock_id,
+                                       (void             *) p_data,
+                                       (CPU_INT16U        ) data_len,
+                                       (NET_SOCK_API_FLAGS) flags,
+                                       (NET_ERR          *)&err);
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              select()
+*
+* Description : Check multiple file descriptors for available resources &/or operations.
+*
+* Argument(s) : desc_nbr_max    Maximum number of file descriptors in the file descriptor sets
+*                                   (see Note #1b1).
+*
+*               p_desc_rd       Pointer to a set of file descriptors to :
+*
+*                                   (a) Check for available read  operation(s) [see Note #1b2A1].
+*
+*                                   (b) (1) Return the actual file descriptors ready for available
+*                                               read  operation(s), if NO error(s) [see Note #1b2B1a1];
+*                                       (2) Return the initial, non-modified set of file descriptors,
+*                                               on any error(s) [see Note #1c2A];
+*                                       (3) Return a null-valued (i.e. zero-cleared) descriptor set,
+*                                               if any timeout expires (see Note #1c2B).
+*
+*               p_desc_wr       Pointer to a set of file descriptors to :
+*
+*                                   (a) Check for available write operation(s) [see Note #1b2A2].
+*
+*                                   (b) (1) Return the actual file descriptors ready for available
+*                                               write operation(s), if NO error(s) [see Note #1b2B1a1];
+*                                       (2) Return the initial, non-modified set of file descriptors,
+*                                               on any error(s) [see Note #1c2A];
+*                                       (3) Return a null-valued (i.e. zero-cleared) descriptor set,
+*                                               if any timeout expires (see Note #1c2B).
+*
+*               p_desc_err      Pointer to a set of file descriptors to :
+*
+*                                   (a) Check for any error(s) &/or exception(s) [see Note #1b2A3].
+*
+*                                   (b) (1) Return the actual file descriptors flagged with any error(s)
+*                                               &/or exception(s), if NO non-descriptor-related error(s)
+*                                               [see Note #1b2B1a1];
+*                                       (2) Return the initial, non-modified set of file descriptors,
+*                                               on any error(s) [see Note #1c2A];
+*                                       (3) Return a null-valued (i.e. zero-cleared) descriptor set,
+*                                               if any timeout expires (see Note #1c2B).
+*
+*               p_timeout        Pointer to a timeout (see Note #1b3).
+*
+* Return(s)   : Number of file descriptors with available resources &/or operations, if any     (see Note #1c1A1).
+*
+*                0,                                                                  on timeout (see Note #1c1B).
+*
+*               -1,                                                                  otherwise  (see Note #1c1A2a).
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) (a) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that :
+*
+*                       (1) (A) "select() ... shall support" the following file descriptor types :
+*
+*                               (1) "regular files,"                        ...
+*                               (2) "terminal and pseudo-terminal devices," ...
+*                               (3) "STREAMS-based files,"                  ...
+*                               (4) "FIFOs,"                                ...
+*                               (5) "pipes,"                                ...
+*                               (6) "sockets."
+*
+*                           (B) "The behavior of ... select() on ... other types of ... file descriptors
+*                                ... is unspecified."
+*
+*                       (2) Network Socket Layer supports BSD 4.x select() functionality with the following
+*                           restrictions/constraints :
+*
+*                           (A) ONLY supports the following file descriptor types :
+*                               (1) Sockets
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that :
+*
+*                       (1) (A) "The 'nfds' argument ('desc_nbr_max') specifies the range of descriptors to
+*                                be tested.  The first 'nfds' descriptors shall be checked in each set; that
+*                                is, the descriptors from zero through nfds-1 in the descriptor sets shall
+*                                be examined."
+*
+*                           (B) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                               6th Printing, Section 6.3, Page 163 states that "the ['nfds'] argument"
+*                               specifies :
+*
+*                               (1) "the number of descriptors," ...
+*                               (2) "not the largest value."
+*
+*                       (2) "The select() function shall ... examine the file descriptor sets whose addresses
+*                            are passed in the 'readfds' ('p_desc_rd'), 'writefds' ('p_desc_wr'), and 'errorfds'
+*                            ('p_desc_err') parameters to see whether some of their descriptors are ready for
+*                            reading, are ready for writing, or have an exceptional condition pending,
+*                            respectively."
+*
+*                           (A) (1) (a) "If the 'readfds' argument ('p_desc_rd') is not a null pointer, it
+*                                        points to an object of type 'fd_set' that on input specifies the
+*                                        file descriptors to be checked for being ready to read, and on
+*                                        output indicates which file descriptors are ready to read."
+*
+*                                   (b) "A descriptor shall be considered ready for reading when a call to
+*                                        an input function ... would not block, whether or not the function
+*                                        would transfer data successfully.  (The function might return data,
+*                                        an end-of-file indication, or an error other than one indicating
+*                                        that it is blocked, and in each of these cases the descriptor shall
+*                                        be considered ready for reading.)" :
+*
+*                                       (1) "If the socket is currently listening, then it shall be marked
+*                                            as readable if an incoming connection request has been received,
+*                                            and a call to the accept() function shall complete without
+*                                            blocking."
+*
+*                                   (c) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                                       6th Printing, Section 6.3, Pages 164-165 states that "a socket is ready
+*                                       for reading if any of the following ... conditions is true" :
+*
+*                                       (1) "A read operation on the socket will not block and will return a
+*                                            value greater than 0 (i.e., the data that is ready to be read)."
+*
+*                                       (2) "The read half of the connection is closed (i.e., a TCP connection
+*                                            that has received a FIN).  A read operation ... will not block and
+*                                            will return 0 (i.e., EOF)."
+*
+*                                       (3) "The socket is a listening socket and the number of completed
+*                                            connections is nonzero.  An accept() on the listening socket
+*                                            will ... not block."
+*
+*                                       (4) "A socket error is pending.  A read operation on the socket will
+*                                            not block and will return an error (-1) with 'errno' set to the
+*                                            specific error condition."
+*
+*                               (2) (a) "If the 'writefds' argument ('p_desc_wr') is not a null pointer, it
+*                                        points to an object of type 'fd_set' that on input specifies the
+*                                        file descriptors to be checked for being ready to write, and on
+*                                        output indicates which file descriptors are ready to write."
+*
+*                                   (b) "A descriptor shall be considered ready for writing when a call to
+*                                        an output function ... would not block, whether or not the function
+*                                        would transfer data successfully" :
+*
+*                                       (1) "If a non-blocking call to the connect() function has been made
+*                                            for a socket, and the connection attempt has either succeeded
+*                                            or failed leaving a pending error, the socket shall be marked
+*                                            as writable."
+*
+*                                   (c) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                                       6th Printing, Section 6.3, Page 165 states that "a socket is ready for
+*                                       writing if any of the following ... conditions is true" :
+*
+*                                       (1) "A write operation will not block and will return a positive value
+*                                            (e.g., the number of bytes accepted by the transport layer)."
+*
+*                                       (2) "The write half of the connection is closed."
+*
+*                                       (3) "A socket using a non-blocking connect() has completed the
+*                                            connection, or the connect() has failed."
+*
+*                                       (4) "A socket error is pending.  A write operation on the socket will
+*                                            not block and will return an error (-1) with 'errno' set to the
+*                                            specific error condition."
+*
+*                               (3) (a) "If the 'errorfds' argument ('p_desc_err') is not a null pointer, it
+*                                        points to an object of type 'fd_set' that on input specifies the file
+*                                        descriptors to be checked for error conditions pending, and on output
+*                                        indicates which file descriptors have error conditions pending."
+*
+*                                   (b) "A file descriptor ... shall be considered to have an exceptional
+*                                        condition pending ... as noted below" :
+*
+*                                       (2) "If a socket has a pending error."
+*
+*                                       (3) "Other circumstances under which a socket may be considered to
+*                                            have an exceptional condition pending are protocol-specific
+*                                            and implementation-defined."
+*
+*                                   (d) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                                       6th Printing, Section 6.3, Page 165 states "that when an error occurs on
+*                                       a socket, it is [also] marked as both readable and writeable by select()".
+*
+*                           (B) (1) (a) "Upon successful completion, ... select() ... shall" :
+*
+*                                       (1) "modify the objects pointed to by the 'readfds' ('p_desc_rd'),
+*                                            'writefds' ('p_desc_wr'), and 'errorfds' ('p_desc_err') arguments
+*                                            to indicate which file descriptors are ready for reading, ready
+*                                            for writing, or have an error condition pending, respectively," ...
+*
+*                                       (2) "and shall return the total number of ready descriptors in all
+*                                            the output sets."
+*
+*                                   (b) (1) "For each file descriptor less than nfds ('desc_nbr_max'), the
+*                                            corresponding bit shall be set on successful completion" :
+*
+*                                           (A) "if it was set on input" ...
+*                                           (B) "and the associated condition is true for that file descriptor."
+*
+*                               (2) select() can NOT absolutely guarantee that descriptors returned as ready
+*                                   will still be ready during subsequent operations since any higher priority
+*                                   tasks or processes may asynchronously consume the descriptors' operations
+*                                   &/or resources.  This can occur since select() functionality & subsequent
+*                                   operations are NOT atomic operations protected by network, file system,
+*                                   or operating system mechanisms.
+*
+*                                   However, as long as no higher priority tasks or processes access any of
+*                                   the same descriptors, then a single task or process can assume that all
+*                                   descriptors returned as ready by select() will still be ready during
+*                                   subsequent operations.
+*
+*                       (3) (A) "The 'timeout' parameter ('p_timeout') controls how long ... select() ... shall
+*                                take before timing out."
+*
+*                               (1) (a) "If the 'timeout' parameter ('p_timeout') is not a null pointer, it
+*                                        specifies a maximum interval to wait for the selection to complete."
+*
+*                                       (1) "If none of the selected descriptors are ready for the requested
+*                                            operation, ... select() ... shall block until at least one of the
+*                                            requested operations becomes ready ... or ... until the timeout
+*                                            occurs."
+*
+*                                       (2) "If the specified time interval expires without any requested
+*                                            operation becoming ready, the function shall return."
+*
+*                                       (3) "To effect a poll, the 'timeout' parameter ('p_timeout') should not be
+*                                            a null pointer, and should point to a zero-valued timespec structure
+*                                            ('timeval')."
+*
+*                                   (b) (1) (A) "If the 'readfds' ('p_desc_rd'), 'writefds' ('p_desc_wr'), and
+*                                                'errorfds' ('p_desc_err') arguments are"                         ...
+*                                               (1) "all null pointers"                                          ...
+*                                               (2) [or all null-valued (i.e. no file descriptors set)]          ...
+*                                           (B) "and the 'timeout' argument ('p_timeout') is not a null pointer," ...
+*
+*                                       (2) ... then "select() ... shall block for the time specified".
+*
+*                               (2) "If the 'timeout' parameter ('p_timeout') is a null pointer, then the call to
+*                                    ... select() shall block indefinitely until at least one descriptor meets the
+*                                    specified criteria."
+*
+*                           (B) (1) "For the select() function, the timeout period is given ... in an argument
+*                                   ('p_timeout') of type struct 'timeval'" ... :
+*
+*                                   (a) "in seconds" ...
+*                                   (b) "and microseconds."
+*
+*                               (2) (a) (1) "Implementations may place limitations on the maximum timeout interval
+*                                            supported" :
+*
+*                                           (A) "All implementations shall support a maximum timeout interval of
+*                                                at least 31 days."
+*
+*                                               (1) However, since maximum timeout interval values are dependent
+*                                                   on the specific OS implementation; a maximum timeout interval
+*                                                   can NOT be guaranteed.
+*
+*                                           (B) "If the 'timeout' argument ('p_timeout') specifies a timeout interval
+*                                                greater than the implementation-defined maximum value, the maximum
+*                                                value shall be used as the actual timeout value."
+*
+*                                       (2) "Implementations may also place limitations on the granularity of
+*                                            timeout intervals" :
+*
+*                                           (A) "If the requested 'timeout' interval requires a finer granularity
+*                                                than the implementation supports, the actual timeout interval
+*                                                shall be rounded up to the next supported value."
+*
+*                   (c) (1) (A) IEEE Std 1003.1, 2004 Edition, Section 'select() : RETURN VALUE' states that :
+*
+*                               (1) "Upon successful completion, ... select() ... shall return the total
+*                                    number of bits set in the bit masks."
+*
+*                               (2) (a) "Otherwise, -1 shall be returned," ...
+*                                   (b) "and 'errno' shall be set to indicate the error."
+*                                       'errno' NOT currently supported (see 'net_bsd.c  Note #1b').
+*
+*                           (B) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                               6th Printing, Section 6.3, Page 161 states that BSD select() function
+*                               "returns ... 0 on timeout".
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that :
+*
+*                           (A) "On failure, the objects pointed to by the 'readfds' ('p_desc_rd'), 'writefds'
+*                                ('p_desc_wr'), and 'errorfds' ('p_desc_err') arguments shall not be modified."
+*
+*                           (B) "If the 'timeout' interval expires without the specified condition being
+*                                true for any of the specified file descriptors, the objects pointed to
+*                                by the 'readfds' ('p_desc_rd'), 'writefds' ('p_desc_wr'), and 'errorfds'
+*                                ('p_desc_err') arguments shall have all bits set to 0."
+*
+*                   (d) IEEE Std 1003.1, 2004 Edition, Section 'select() : ERRORS' states that "under the
+*                       following conditions, ... select() shall fail and set 'errno' to" :
+*
+*                       (1) "[EBADF] - One or more of the file descriptor sets specified a file descriptor
+*                            that is not a valid open file descriptor."
+*
+*                       (2) "[EINVAL]" -
+*
+*                           (A) "The 'nfds' argument ('desc_nbr_max') is" :
+*                               (1) "less than 0 or" ...
+*                               (2) "greater than FD_SETSIZE."
+*
+*                           (B) "An invalid timeout interval was specified."
+*
+*                           'errno' NOT currently supported (see 'net_bsd.c  Note #1b').
+*
+*                   See also 'net_sock.c  NetSock_Sel()  Note #3'.
+*********************************************************************************************************
+*/
+
+#if    (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+int  select (        int       desc_nbr_max,
+             struct  fd_set   *p_desc_rd,
+             struct  fd_set   *p_desc_wr,
+             struct  fd_set   *p_desc_err,
+             struct  timeval  *p_timeout)
+{
+    int      rtn_code;
+    NET_ERR  err;
+
+
+    rtn_code = (int)NetSock_Sel((NET_SOCK_QTY      ) desc_nbr_max,
+                                (NET_SOCK_DESC    *) p_desc_rd,
+                                (NET_SOCK_DESC    *) p_desc_wr,
+                                (NET_SOCK_DESC    *) p_desc_err,
+                                (NET_SOCK_TIMEOUT *) p_timeout,
+                                (NET_ERR          *)&err);
+
+    return (rtn_code);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             inet_addr()
+*
+* Description : Convert an IPv4 address in ASCII dotted-decimal notation to a network protocol IPv4 address
+*                   in network-order.
+*
+* Argument(s) : p_addr      Pointer to an ASCII string that contains a dotted-decimal IPv4 address (see Note #2).
+*
+* Return(s)   : Network-order IPv4 address represented by ASCII string, if NO error(s).
+*
+*               -1,                                                     otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) RFC #1983 states that "dotted decimal notation ... refers [to] IP addresses of the
+*                   form A.B.C.D; where each letter represents, in decimal, one byte of a four byte IP
+*                   address".
+*
+*                   In other words, the dotted-decimal notation separates four decimal octet values by
+*                   the dot, or period, character ('.').  Each decimal value represents one octet of
+*                   the IP address starting with the most significant octet in network-order.
+*
+*                       IP Address Examples :
+*
+*                              DOTTED DECIMAL NOTATION     HEXADECIMAL EQUIVALENT
+*
+*                                   127.0.0.1           =       0x7F000001
+*                                   192.168.1.64        =       0xC0A80140
+*                                   255.255.255.0       =       0xFFFFFF00
+*                                   ---         -                 --    --
+*                                    ^          ^                 ^      ^
+*                                    |          |                 |      |
+*                                   MSO        LSO               MSO    LSO
+*
+*                           where
+*                                   MSO        Most  Significant Octet in Dotted Decimal IP Address
+*                                   LSO        Least Significant Octet in Dotted Decimal IP Address
+*
+*               (2) The dotted-decimal ASCII string MUST :
+*
+*                   (a) Include ONLY decimal values & the dot, or period, character ('.') ; ALL other
+*                       characters trapped as invalid, including any leading or trailing characters.
+*
+*                   (b) (1) Include EXACTLY four decimal values ...
+*                       (2) ... separated ...
+*                       (3) ... by EXACTLY three dot characters.
+*
+*                   (c) Ensure that each decimal value does NOT exceed the maximum octet value (i.e. 255).
+*
+*                   (d) Ensure that each decimal value does NOT include leading zeros.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+in_addr_t  inet_addr (char  *p_addr)
+{
+    in_addr_t  addr;
+    NET_ERR    err;
+
+
+    addr = (in_addr_t)NetASCII_Str_to_IPv4((CPU_CHAR *) p_addr,
+                                           (NET_ERR  *)&err);
+    if (err !=  NET_ASCII_ERR_NONE) {
+        addr = (in_addr_t)NET_BSD_ERR_DFLT;
+    }
+    addr =  NET_UTIL_HOST_TO_NET_32(addr);
+
+    return (addr);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             inet_ntoa()
+*
+* Description : Convert a network protocol IPv4 address into a dotted-decimal notation ASCII string.
+*
+* Argument(s) : addr        IPv4 address.
+*
+* Return(s)   : Pointer to ASCII string of converted IPv4 address (see Note #2), if NO error(s).
+*
+*               Pointer to NULL,                                                 otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) RFC #1983 states that "dotted decimal notation ... refers [to] IP addresses of the
+*                   form A.B.C.D; where each letter represents, in decimal, one byte of a four byte IP
+*                   address".
+*
+*                   In other words, the dotted-decimal notation separates four decimal octet values by
+*                   the dot, or period, character ('.').  Each decimal value represents one octet of
+*                   the IP address starting with the most significant octet in network-order.
+*
+*                       IP Address Examples :
+*
+*                              DOTTED DECIMAL NOTATION     HEXADECIMAL EQUIVALENT
+*
+*                                   127.0.0.1           =       0x7F000001
+*                                   192.168.1.64        =       0xC0A80140
+*                                   255.255.255.0       =       0xFFFFFF00
+*                                   ---         -                 --    --
+*                                    ^          ^                 ^      ^
+*                                    |          |                 |      |
+*                                   MSO        LSO               MSO    LSO
+*
+*                           where
+*                                   MSO        Most  Significant Octet in Dotted Decimal IP Address
+*                                   LSO        Least Significant Octet in Dotted Decimal IP Address
+*
+*               (2) IEEE Std 1003.1, 2004 Edition, Section 'inet_ntoa() : DESCRIPTION' states that
+*                   "inet_ntoa() ... need not be reentrant ... [and] is not required to be thread-safe".
+*
+*                   Since the character string is returned in a single, global character string array,
+*                   this conversion function is NOT re-entrant.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+char  *inet_ntoa (struct  in_addr  addr)
+{
+    in_addr_t  addr_ip;
+    NET_ERR    err;
+
+
+    addr_ip = addr.s_addr;
+    addr_ip = NET_UTIL_NET_TO_HOST_32(addr_ip);
+
+    NetASCII_IPv4_to_Str((NET_IPv4_ADDR) addr_ip,
+                         (CPU_CHAR    *)&NetBSD_IP_to_Str_Array[0],
+                         (CPU_BOOLEAN  ) DEF_NO,
+                         (NET_ERR     *)&err);
+    if (err != NET_ASCII_ERR_NONE) {
+        return ((char *)0);
+    }
+
+    return ((char *)&NetBSD_IP_to_Str_Array[0]);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             inet_aton()
+*
+* Description : Convert an IPv4 address in ASCII dotted-decimal notation to a network protocol IPv4 address
+*                   in network-order.
+*
+* Argument(s) : p_addr_in   Pointer to an ASCII string that contains a dotted-decimal IPv4 address (see Note #2).
+*
+*               p_addr      Pointer to an IPv4 address.
+*
+* Return(s)   : 1  if the supplied address is valid,
+*
+*               0, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) RFC #1983 states that "dotted decimal notation ... refers [to] IP addresses of the
+*                   form A.B.C.D; where each letter represents, in decimal, one byte of a four byte IP
+*                   address".
+*
+*                   In other words, the dotted-decimal notation separates four decimal octet values by
+*                   the dot, or period, character ('.').  Each decimal value represents one octet of
+*                   the IP address starting with the most significant octet in network-order.
+*
+*                       IP Address Examples :
+*
+*                              DOTTED DECIMAL NOTATION     HEXADECIMAL EQUIVALENT
+*
+*                                   127.0.0.1           =       0x7F000001
+*                                   192.168.1.64        =       0xC0A80140
+*                                   255.255.255.0       =       0xFFFFFF00
+*                                   ---         -                 --    --
+*                                    ^          ^                 ^      ^
+*                                    |          |                 |      |
+*                                   MSO        LSO               MSO    LSO
+*
+*                           where
+*                                   MSO        Most  Significant Octet in Dotted Decimal IP Address
+*                                   LSO        Least Significant Octet in Dotted Decimal IP Address
+*
+*               (2) IEEE Std 1003.1, 2004 Edition - inet_addr, inet_ntoa - IPv4 address manipulation:
+*
+*                   (a) Values specified using IPv4 dotted decimal notation take one of the following forms:
+*
+*                       (1) a.b.c.d - When four parts are specified, each shall be interpreted ...
+*                                     ... as a byte of data and assigned, from left to right,  ...
+*                                     ... to the four bytes of an Internet address.
+*
+*                       (2) a.b.c   - When a three-part address is specified, the last part shall ...
+*                                     ... be interpreted as a 16-bit quantity and placed in the   ...
+*                                     ... rightmost two bytes of the network address. This makes  ...
+*                                     ... the three-part address format convenient for specifying ...
+*                                     ... Class B network addresses as "128.net.host".
+*
+*                       (3) a.b     - When a two-part address is supplied, the last part shall be  ...
+*                                     ... interpreted as a 24-bit quantity and placed in the       ...
+*                                     ... rightmost three bytes of the network address. This makes ...
+*                                     ... the two-part address format convenient for specifying    ...
+*                                     ... Class A network addresses as "net.host".
+*
+*                       (4) a       - When only one part is given, the value shall be stored ...
+*                                     ... directly in the network address without any byte rearrangement.
+*
+*               (3) The dotted-decimal ASCII string MUST :
+*
+*                   (a) Include ONLY decimal values & the dot, or period, character ('.') ; ALL other
+*                       characters trapped as invalid, including any leading or trailing characters.
+*
+*                   (b) (1) Include UP TO four decimal values ...
+*                       (2) ... separated ...
+*                       (3) ... by UP TO three dot characters.
+*
+*                   (c) Ensure that each decimal value does NOT exceed the maximum value for its form:
+*
+*                       (1) a.b.c.d - 255.255.255.255
+*                       (2) a.b.c   - 255.255.65535
+*                       (3) a.b     - 255.16777215
+*                       (4) a       - 4294967295
+*
+*                   (d) Ensure that each decimal value does NOT include leading zeros.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+int  inet_aton(       char     *p_addr_in,
+               struct in_addr  *p_addr)
+{
+    in_addr_t   addr;
+    CPU_INT08U  pdot_nbr;
+    NET_ERR     err;
+
+#if  (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+
+#endif
+
+    addr = (in_addr_t)NetASCII_Str_to_IPv4_Handler(p_addr_in,
+                                                  &pdot_nbr,
+                                                  &err);
+
+    if ((err      != NET_ASCII_ERR_NONE)            ||
+        (pdot_nbr  > NET_ASCII_NBR_MAX_DOT_ADDR_IP)) {
+
+        addr = (in_addr_t)NET_BSD_ERR_NONE;
+        p_addr->s_addr = addr;
+
+        return (DEF_FAIL);
+    }
+
+    addr =  NET_UTIL_HOST_TO_NET_32(addr);
+    p_addr->s_addr = addr;
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            setsockopt()
+*
+* Description : Set socket option.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set the option.
+*
+*               protocol    Protocol level at which the option resides.
+*
+*               opt_name    Name of the single socket option       to set.
+*
+*               p_opt_val   Pointer to the     socket option value to set.
+*
+*               opt_len     Option length.
+*
+* Return(s)   :  0, if NO error(s).
+*
+*               -1, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+int  setsockopt (int         sock_id,
+                 int         protocol,
+                 int         opt_name,
+                 void       *p_opt_val,
+                 socklen_t   opt_len)
+{
+    int      rtn_code;
+    NET_ERR  err;
+
+
+    rtn_code = (int)NetSock_OptSet((NET_SOCK_ID      ) sock_id,
+                                   (NET_SOCK_PROTOCOL) protocol,
+                                   (NET_SOCK_OPT_NAME) opt_name,
+                                   (void            *) p_opt_val,
+                                   (NET_SOCK_OPT_LEN ) opt_len,
+                                   (NET_ERR         *)&err);
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            getsockopt()
+*
+* Description : Get socket option.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get the option.
+*
+*               protocol    Protocol level at which the option resides.
+*
+*               opt_name    Name of the single socket option       to get.
+*
+*               p_opt_val   Pointer to the     socket option value to get.
+*
+*               opt_len     Option length.
+*
+* Return(s)   :  0, if NO error(s).
+*
+*               -1, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+int  getsockopt (int         sock_id,
+                 int         protocol,
+                 int         opt_name,
+                 void       *p_opt_val,
+                 socklen_t  *p_opt_len)
+{
+    int      rtn_code;
+    NET_ERR  err;
+
+
+    rtn_code = (int)NetSock_OptGet((NET_SOCK_ID       ) sock_id,
+                                   (NET_SOCK_PROTOCOL ) protocol,
+                                   (NET_SOCK_OPT_NAME ) opt_name,
+                                   (void             *) p_opt_val,
+                                   (NET_SOCK_OPT_LEN *) p_opt_len,
+                                   (NET_ERR          *)&err);
+
+    return (rtn_code);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_bsd.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_bsd.h
new file mode 100644
index 0000000..845657d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_bsd.h
@@ -0,0 +1,771 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            BSD 4.x LAYER
+*
+* Filename      : net_bsd.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+* Note(s)       : (1) Supports BSD 4.x Layer API with the following restrictions/constraints :
+*
+*                     (a) ONLY supports the following BSD layer functionality :
+*                         (1) BSD sockets                                           See 'net_sock.h  Note #1'
+*
+*                     (b) Return variable 'errno' NOT currently supported #### NET-799
+*
+*********************************************************************************************************
+* Notice(s)     : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given
+*                     us permission to reprint portions of their documentation.  Portions of this text are
+*                     reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition,
+*                     Standard for Information Technology -- Portable Operating System Interface (POSIX),
+*                     The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute
+*                     of Electrical and Electronics Engineers, Inc and The Open Group.  In the event of any
+*                     discrepancy between these versions and the original IEEE and The Open Group Standard,
+*                     the original IEEE and The Open Group Standard is the referee document.  The original
+*                     Standard can be obtained online at http://www.opengroup.org/unix/online.html.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_ipv4.h"
+#endif
+#include  "net_sock.h"
+#include  "net_util.h"
+#include  "net_def.h"
+#include  "net_ascii.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) BSD 4.x Layer module is required for :
+*
+*               (a) Network sockets
+*               (b) Applications that require BSD 4.x application programming interface (API) :
+*                   (1) Data Types
+*                   (2) Macro's
+*                   (3) Functions
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#ifndef  NET_BSD_MODULE_PRESENT
+#define  NET_BSD_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef MAX
+#define MAX(a, b)  (((a) > (b)) ? (a) : (b))
+#endif
+
+#ifndef MIN
+#define MIN(a, b)  (((a) < (b)) ? (a) : (b))
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  IN6ADDR_ANY_INIT                              { 0,   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
+#define  IN6ADDR_LOOPBACK_INIT                         { 0,   0,0,0,0,0,0,0,0,0,0,0,0,0,0,1 }
+#define  IN6ADDR_LINKLOCAL_ALLNODES_INIT               { 0xFF,2,0,0,0,0,0,0,0,0,0,0,0,0,0,1 }
+#define  IN6ADDR_LINKLOCAL_ALLROUTERS_INIT             { 0xFF,2,0,0,0,0,0,0,0,0,0,0,0,0,0,2 }
+
+
+/*
+*********************************************************************************************************
+*                              BSD 4.x SOCKET FAMILY & PROTOCOL DEFINES
+*
+* Note(s) : (1) The following socket values MUST be pre-#define'd in 'net_def.h' PRIOR to 'net_cfg.h'
+*               so that the developer can configure sockets for the correct socket family values (see
+*               'net_def.h  BSD 4.x & NETWORK SOCKET LAYER DEFINES  Note #1' & 'net_cfg_net.h  NETWORK
+*               SOCKET LAYER CONFIGURATION') :
+*
+*               (a) AF_INET
+*               (b) PF_INET
+*
+*           (2) Ideally, AF_&&& constants SHOULD be defined as unsigned constants since AF_&&& constants
+*               are used with the unsigned socket address family data type (see 'BSD 4.x SOCKET DATA TYPES
+*               Note #2a1A').  However, since PF_&&& constants are typically defined to their equivalent
+*               AF_&&& constants BUT PF_&&& constants are used with the signed socket protocol family data
+*               types; AF_&&& constants are defined as signed constants.
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+                                                                /* ------------ SOCK FAMILY/PROTOCOL TYPES ------------ */
+                                                                /* See Note #2.                                         */
+#ifdef   AF_INET
+#undef   AF_INET
+#endif
+#define  AF_INET                                           2
+
+#ifdef   PF_INET
+#undef   PF_INET
+#endif
+#define  PF_INET                                     AF_INET
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   BSD 4.x SOCKET ADDRESS DEFINES
+*********************************************************************************************************
+*/
+
+#ifdef   INADDR_ANY
+#undef   INADDR_ANY
+#endif
+
+#ifdef  NET_IPv4_MODULE_EN
+#define  INADDR_ANY                                      NET_IPv4_ADDR_NONE
+#endif
+
+#ifdef   INADDR_BROADCAST
+#undef   INADDR_BROADCAST
+#endif
+#define  INADDR_BROADCAST                                NET_IPv4_ADDR_BROADCAST
+
+#ifdef   IN6ADDR_ANY
+#undef   IN6ADDR_ANY
+#endif
+#define  IN6ADDR_ANY                                     NET_IPv6_ADDR_ANY
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      BSD 4.x SOCKET DATA TYPES
+*
+* Note(s) : (1) BSD 4.x data types are required only for applications that reference BSD 4.x data types.
+*
+*               See also 'MODULE  Note #1b2'.
+*
+*           (2) (a) (1) IEEE Std 1003.1, 2004 Edition, Section 'sys/socket.h : DESCRIPTION' states that :
+*
+*                       (A) "sa_family_t ... shall define [as an] unsigned integer type."
+*
+*                       (B) "socklen_t ... is an integer type of width of at least 32 bits."
+*
+*                           (1) IEEE Std 1003.1, 2004 Edition, Section 'sys/socket.h : APPLICATION USAGE'
+*                               states that "it is recommended that applications not use values larger
+*                               than (2^31 - 1) for the socklen_t type".
+*
+*                   (2) IEEE Std 1003.1, 2004 Edition, Section 'netinet/in.h : DESCRIPTION' states that :
+*
+*                       (A) "in_port_t - Equivalent to the type uint16_t."
+*
+*                       (B) "in_addr_t - Equivalent to the type uint32_t."
+*
+*               (b) (1) (A) IEEE Std 1003.1, 2004 Edition, Section 'sys/socket.h : DESCRIPTION' states
+*                           that "the sockaddr structure ... includes at least the following members" :
+*
+*                           (1) sa_family_t    sa_family    Address family
+*                           (2) char           sa_data[]    Socket address
+*
+*                       (B) (1) Socket address structure 'sa_family' member MUST be configured in host-
+*                               order & MUST NOT be converted to/from network-order.
+*
+*                           (2) Socket address structure addresses MUST be configured/converted from host-
+*                               order to network-order.
+*
+*                           See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*                   (2) IEEE Std 1003.1, 2004 Edition, Section 'netinet/in.h : DESCRIPTION' states that :
+*
+*                       (A) "The in_addr structure ... includes at least the following member" :
+*
+*                           (1) in_addr_t    s_addr
+*
+*                       (B) (1) "The sockaddr_in structure ... includes at least the following members" :
+*
+*                               (a) sa_family_t       sin_family    Address family (AF_INET)
+*                               (b) in_port_t         sin_port      Port number
+*                               (c) struct in_addr    sin_addr      IP   address
+*
+*                           (2) (a) "The sin_port and sin_addr members shall be in network byte order."
+*
+*                               (b) "The sin_zero member was removed from the sockaddr_in structure."
+*
+*                                   (1) However, this does NOT preclude the structure from including a
+*                                       'sin_zero' member.
+*
+*           (3) IEEE Std 1003.1, 2004 Edition, Section 'sys/types.h : DESCRIPTION' states that :
+*
+*               (a) (1) (A) "size_t - Used for sizes of objects."
+*
+*                       (B) "size_t shall be an unsigned integer type."
+*
+*                       (C) To avoid possible namespace conflict with commonly-defined 'size_t' data type,
+*                           '_size_t' data type is prefixed with a single underscore.
+*
+*                   (2) (A) "ssize_t - Used for a count of bytes or an error indication."
+*
+*                       (B) "ssize_t shall be [a] signed integer type ... capable of storing values at
+*                            least in the range [-1, {SSIZE_MAX}]."
+*
+*                           (1) IEEE Std 1003.1, 2004 Edition, Section 'limits.h : DESCRIPTION' states
+*                               that the "Minimum Acceptable Value ... [for] {SSIZE_MAX}" is "32767".
+*
+*               (b) (1) (A) "time_t - Used for time in seconds."
+*
+*                       (B) "time_t ... shall be integer or real-floating types."
+*
+*                       (C) To avoid possible namespace conflict with commonly-defined 'time_t' data type,
+*                           '_time_t' data type is prefixed with a single underscore.
+*
+*                   (2) (A) "suseconds_t - Used for time in microseconds."
+*
+*                       (B) "suseconds_t shall be a signed integer type capable of storing values at least
+*                            in the range [-1, 1000000]."
+*
+*               (c) "The implementation shall support ... size_t, ssize_t, suseconds_t ... widths ... no
+*                    greater than the width of type long."
+*
+*           (4) (a) IEEE Std 1003.1, 2004 Edition, Section 'sys/select.h : DESCRIPTION' states that "the
+*                   'timeval' structure ... includes at least the following members" :
+*
+*                   (1) time_t         tv_sec     Seconds
+*                   (2) suseconds_t    tv_usec    Microseconds
+*
+*               (b) Ideally, the BSD 4.x Layer's 'timeval' data type would be the basis for the Network
+*                   Socket Layer's 'NET_SOCK_TIMEOUT' data type definition.  However, since the BSD 4.x
+*                   Layer application programming interface (API) is NOT guaranteed to be present in the
+*                   project build (see 'MODULE  Note #1bA'); the Network Socket Layer's 'NET_SOCK_TIMEOUT'
+*                   data type MUST be independently defined.
+*
+*                   However, for correct interoperability between the BSD 4.x Layer 'timeval' data type
+*                   & the Network Socket Layer's 'NET_SOCK_TIMEOUT' data type; ANY modification to either
+*                   of these data types MUST be appropriately synchronized.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET TIMEOUT DATA TYPE  Note #1b'.
+*
+*           (5) (a) (1) IEEE Std 1003.1, 2004 Edition, Section 'sys/select.h : DESCRIPTION' states that
+*                       the "'fd_set' type ... shall [be] define[d] ... as a structure".
+*
+*                       (A) "The requirement for the 'fd_set' structure to have a member 'fds_bits' has
+*                            been removed."
+*
+*                           (1) However, this does NOT preclude the descriptor structure from including
+*                               an 'fds_bits' member.
+*
+*                       (B) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                           6th Printing, Section 6.3, Pages 162-163 states that "descriptor sets [are]
+*                           typically an array of integers, with each bit in each integer corresponding
+*                           to a descriptor".
+*
+*                   (2) (A) IEEE Std 1003.1, 2004 Edition, Section 'sys/select.h : DESCRIPTION' states
+*                           that "FD_SETSIZE ... shall be defined as a macro ... [as the] maximum number
+*                           of file descriptors in an 'fd_set' structure."
+*
+*                       (B) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                           6th Printing, Section 6.3, Page 163 states that "descriptors start at 0".
+*
+*               (b) Ideally, the BSD 4.x Layer's 'fd_set' data type would be the basis for the Network
+*                   Socket Layer's 'NET_SOCK_DESC' data type definition.  However, since the BSD 4.x
+*                   Layer application programming interface (API) is NOT guaranteed to be present in the
+*                   project build (see 'MODULE  Note #1bA'); the Network Socket Layer's 'NET_SOCK_DESC'
+*                   data type MUST be independently defined.
+*
+*                   However, for correct interoperability between the BSD 4.x Layer 'fd_set' data type
+*                   & the Network Socket Layer's 'NET_SOCK_DESC' data type; ANY modification to either
+*                   of these data types MUST be appropriately synchronized.
+*
+*               See also 'net_sock.h  NETWORK SOCKET (IDENTIFICATION) DESCRIPTOR SET DATA TYPE  Note #1'.
+*********************************************************************************************************
+*/
+
+
+                                                                        /* ---------------- SOCK ADDR ----------------- */
+typedef  CPU_INT16U       sa_family_t;                                  /* Sock addr family type (see Note #2a1A).      */
+
+typedef  CPU_INT32S       socklen_t;                                    /* Sock addr len    type (see Note #2a1B).      */
+
+typedef  CPU_INT16U       in_port_t;                                    /* Sock IP port nbr type (see Note #2a2A).      */
+typedef  CPU_INT32U       in_addr_t;                                    /* Sock IPv4 addr   type (see Note #2a2B).      */
+typedef  CPU_INT08U       in6_addr_t;                                   /* Sock IPv6 addr   type.                       */
+
+
+#define  NET_BSD_ADDR_LEN_MAX       NET_SOCK_BSD_ADDR_LEN_MAX
+
+struct  sockaddr {                                                      /* See Note #2b1.                               */
+    sa_family_t           sa_family;                                    /* Sock family.                                 */
+    CPU_CHAR              sa_data[NET_BSD_ADDR_LEN_MAX];                /* Sock addr.                                   */
+};
+
+
+struct  in_addr {                                                       /* See Note #2b2A.                              */
+    in_addr_t             s_addr;
+};
+
+#define  NET_BSD_ADDR_IPv4_NBR_OCTETS_UNUSED                NET_SOCK_ADDR_IPv4_NBR_OCTETS_UNUSED
+
+struct  sockaddr_in {                                                   /* See Note #2b2B.                              */
+            sa_family_t   sin_family;                                   /* AF_INET family.                              */
+            in_port_t     sin_port;                                     /* Port nbr              [see Note #2b2B2a].    */
+    struct  in_addr       sin_addr;                                     /* IPv4   addr           [see Note #2b2B2a].    */
+            CPU_CHAR      sin_zero[NET_BSD_ADDR_IPv4_NBR_OCTETS_UNUSED];/* Unused (MUST be zero) [see Note #2b2B2b].    */
+};
+
+
+struct  in6_addr {
+    in6_addr_t             s_addr[16];
+};
+
+
+struct  sock_addr_in6 {
+            sa_family_t   sin6_family;                                  /* AF_INET6   family.                           */
+            in_port_t     sin6_port;                                    /* Port nbr.                                    */
+            CPU_INT32U    sin6_flowinfo;                                /* Flow info.                                   */
+    struct  in6_addr      sin6_addr;                                    /* IPv6   addr.                                 */
+            CPU_INT32U    sin6_scope_id;                                /* Scope zone ix.                               */
+};
+
+static  const  struct  in6_addr  in6addr_any                  = {IN6ADDR_ANY_INIT};
+static  const  struct  in6_addr  in6addr_loopback             = {IN6ADDR_LOOPBACK_INIT};
+static  const  struct  in6_addr  in6addr_linklocal_allnodes   = {IN6ADDR_LINKLOCAL_ALLNODES_INIT};
+static  const  struct  in6_addr  in6addr_linklocal_allrouters = {IN6ADDR_LINKLOCAL_ALLROUTERS_INIT};
+
+
+                                                                        /* ----------- SOCK DATA/VAL SIZES ------------ */
+typedef    unsigned  int  _size_t;                                      /* Sock app data buf size type (see Note #3a1). */
+typedef      signed  int  ssize_t;                                      /* Sock rtn data/val size type (see Note #3a2). */
+
+                                                                        /* -------------- SOCK TIME VALS -------------- */
+typedef  CPU_INT32S       _time_t;                                      /* Signed time val in  sec (see Note #3b1).     */
+typedef  CPU_INT32S       suseconds_t;                                  /* Signed time val in usec (see Note #3b2).     */
+
+
+
+struct  timeval {                                                       /* See Note #4a.                                */
+   _time_t                tv_sec;                                       /* Time val in  sec (see Note #4a1).            */
+    suseconds_t           tv_usec;                                      /* Time val in usec (see Note #4a2).            */
+};
+
+
+                                                                        /* -------------- FILE DESC SETS -------------- */
+#define  FD_SETSIZE                NET_SOCK_NBR_SOCK                    /* See Note #5a2A.                              */
+#define  FD_MIN                                 0                       /* See Note #5a2B.                              */
+#define  FD_MAX                   (FD_SETSIZE - 1)
+#define  FD_ARRAY_SIZE          (((FD_SETSIZE - 1) / (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS)) + 1)
+
+struct  fd_set {                                                        /* See Note #5a1.                               */
+    CPU_DATA              fds_bits[FD_ARRAY_SIZE];
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                       BSD 4.x NETWORK WORD ORDER - TO - CPU WORD ORDER MACRO'S
+*
+* Description : Convert data values to & from network word order to host CPU word order.
+*
+* Argument(s) : val       Data value to convert (see Note #2).
+*
+* Return(s)   : Converted data value (see Note #2).
+*
+* Caller(s)   : Application.
+*
+*               These macro's are network protocol suite application programming interface (API) macro's
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) BSD 4.x macro's are required only for applications that call BSD 4.x macro's.
+*
+*                   See also 'MODULE  Note #1b1'.
+*
+*               (2) 'val' data value to convert & any variable to receive the returned conversion MUST
+*                   start on appropriate CPU word-aligned addresses.  This is required because most word-
+*                   aligned processors are more efficient & may even REQUIRE that multi-octet words start
+*                   on CPU word-aligned addresses.
+*
+*                   (a) For 16-bit word-aligned processors, this means that
+*
+*                           all 16- & 32-bit words MUST start on addresses that are multiples of 2 octets
+*
+*                   (b) For 32-bit word-aligned processors, this means that
+*
+*                           all 16-bit       words MUST start on addresses that are multiples of 2 octets
+*                           all 32-bit       words MUST start on addresses that are multiples of 4 octets
+*
+*                   See also 'net_util.h  NETWORK WORD ORDER - TO - CPU WORD ORDER MACRO'S  Note #1'.
+*********************************************************************************************************
+*/
+
+#define  ntohs(val)                      NET_UTIL_NET_TO_HOST_16(val)
+#define  ntohl(val)                      NET_UTIL_NET_TO_HOST_32(val)
+
+#define  htons(val)                      NET_UTIL_HOST_TO_NET_16(val)
+#define  htonl(val)                      NET_UTIL_HOST_TO_NET_32(val)
+
+
+
+/*
+*********************************************************************************************************
+*                                   BSD 4.x FILE DESCRIPTOR MACRO'S
+*
+* Description : Initialize, modify, & check file descriptor sets for multiplexed I/O functions.
+*
+* Argument(s) : fd          File descriptor number to initialize, modify, or check; when applicable.
+*
+*               fdsetp      Pointer to a file descriptor set.
+*
+* Return(s)   : Return values macro-dependent :
+*
+*                   none, for    file descriptor initialization & modification macro's (see Note #2a2A).
+*
+*                   1,    if any file descriptor condition(s) satisfied                (see Note #2a2B1).
+*
+*                   0,    otherwise                                                    (see Note #2a2B2).
+*
+* Caller(s)   : Application.
+*
+*               These macro's are network protocol suite application programming interface (API) macro's
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) BSD 4.x macro's are required only for applications that call BSD 4.x macro's.
+*
+*                   See also 'MODULE  Note #1b3'.
+*
+*               (2) (a) (1) (A) IEEE Std 1003.1, 2004 Edition, Section 'sys/select.h : DESCRIPTION' states that
+*                               "each of the following may be declared as a function, or defined as a macro, or
+*                                both" :
+*
+*                               (1) void  FD_ZERO (fd_set *fdset);
+*
+*                                  "Initializes the file descriptor set 'fdset' to have zero bits for all file
+*                                   descriptors."
+*
+*                               (2) void  FD_CLR  (int fd, fd_set *fdset);
+*
+*                                  "Clears the bit for the file descriptor 'fd' in the file descriptor set 'fdset'."
+*
+*                               (3) void  FD_SET  (int fd, fd_set *fdset);
+*
+*                                  "Sets   the bit for the file descriptor 'fd' in the file descriptor set 'fdset'."
+*
+*                               (4) int   FD_ISSET(int fd, fd_set *fdset);
+*
+*                                  "Returns a non-zero value if the bit for the file descriptor 'fd' is set in the
+*                                   file descriptor set by 'fdset', and 0 otherwise."
+*
+*                           (B) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' reiterates that
+*                               "file descriptor masks of type 'fd_set' can be initialized and tested with" :
+*
+*                               (1) "FD_ZERO(fdsetp) shall initialize the descriptor set pointed to by 'fdsetp'
+*                                    to the null set.  No error is returned if the set is not empty at the time
+*                                    FD_ZERO() is invoked."
+*
+*                               (2) "FD_CLR(fd, fdsetp) shall remove the file descriptor 'fd' from the set pointed
+*                                    to by 'fdsetp'.  If 'fd' is not a member of this set, there shall be no effect
+*                                    on the set, nor will an error be returned."
+*
+*                               (3) "FD_SET(fd, fdsetp) shall add the file descriptor 'fd' to the set pointed to by
+*                                    'fdsetp'.  If the file descriptor 'fd' is already in this set, there shall be
+*                                    no effect on the set, nor will an error be returned."
+*
+*                               (4) "FD_ISSET(fd, fdsetp) shall evaluate to non-zero if the file descriptor 'fd' is a
+*                                    member of the set pointed to by 'fdsetp', and shall evaluate to zero otherwise."
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : RETURN VALUE' states that :
+*
+*                           (A) The following macro's "do not return a value" :
+*
+*                               (1) "FD_CLR()," ...
+*                               (2) "FD_SET()," ...
+*                               (3) "FD_ZERO()."
+*
+*                           (B) "FD_ISSET() shall return" :
+*
+*                               (1) "a non-zero value if the bit for the file descriptor 'fd' is set in the file
+*                                    descriptor set pointed to by 'fdset'," ...
+*                               (2) "0 otherwise."
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'sys/select.h : DESCRIPTION' states that :
+*
+*                           (A) "If implemented as macros, these may evaluate their arguments more than once, so
+*                                applications should ensure that the arguments they supply are never expressions
+*                                with side effects."
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' also states that :
+*
+*                           (A) "It is unspecified whether each of these is a macro or a function.  If a macro
+*                                definition is suppressed in order to access an actual function, or a program
+*                                defines an external identifier with any of these names, the behavior is undefined."
+*
+*                           (B) "The behavior of these macros is undefined" :
+*
+*                               (1) "if the 'fd' argument is" :
+*                                   (a) "less than 0"                             ...
+*                                   (b) "or greater than or equal to FD_SETSIZE," ...
+*
+*                               (2) "or if 'fd' is not a valid file descriptor,"  ...
+*                               (3) "or if any of the arguments are expressions with side effects."
+*
+*                       (3) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                           Section 6.3, Page 163 adds that "it is important to initialize [a descriptor] set,
+*                           since unpredictable results can occur if the set is allocated as an automatic variable
+*                           and not initialized".
+*
+*                   See also 'BSD 4.x SOCKET DATA TYPES  Note #5b'.
+*
+*               (3) Ideally, the BSD 4.x Layer's file descriptor macro's ('FD_&&&()') would be the basis for
+*                   the Network Socket Layer's socket descriptor macro ('NET_SOCK_DESC_&&&()') definitions.
+*                   However, since the BSD 4.x Layer application programming interface (API) is NOT guaranteed
+*                   to be present in the project build (see 'MODULE  Note #1bA'); the Network Socket Layer's
+*                   socket descriptor macro's MUST be independently defined.
+*
+*                   However, for correct interoperability between the BSD 4.x Layer file descriptor macro's
+*                   & the Network Socket Layer's socket descriptor macro's; ANY modification to any of these
+*                   macro definitions MUST be appropriately synchronized.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET DESCRIPTOR MACRO'S  Note #1'.
+*********************************************************************************************************
+*/
+
+
+#define  FD_ZERO(fdsetp)    do {                                                                              \
+                                if (((struct fd_set *)(fdsetp)) != (struct fd_set *)0) {                      \
+                                    Mem_Clr ((void     *)      (&(((struct fd_set *)(fdsetp))->fds_bits[0])), \
+                                             (CPU_SIZE_T) (sizeof(((struct fd_set *)(fdsetp))->fds_bits)));   \
+                                }                                                                             \
+                            } while (0)
+
+
+#define  FD_CLR(fd, fdsetp)             do {                                                                                                              \
+                                            if (((fd) >= FD_MIN) && ((fd) <= FD_MAX) &&                                                                   \
+                                                                 (((struct fd_set *)(fdsetp)) != (struct fd_set *)0)) {                                   \
+                                                  DEF_BIT_CLR   ((((struct fd_set *)(fdsetp))->fds_bits[(fd) / (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS)]), \
+                                                  DEF_BIT                                              ((fd) % (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS))); \
+                                            }                                                                                                             \
+                                        } while (0)
+
+#define  FD_SET(fd, fdsetp)             do {                                                                                                              \
+                                            if (((fd) >= FD_MIN) && ((fd) <= FD_MAX) &&                                                                   \
+                                                                 (((struct fd_set *)(fdsetp)) != (struct fd_set *)0)) {                                   \
+                                                  DEF_BIT_SET   ((((struct fd_set *)(fdsetp))->fds_bits[(fd) / (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS)]), \
+                                                  DEF_BIT                                              ((fd) % (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS))); \
+                                            }                                                                                                             \
+                                        } while (0)
+
+#define  FD_ISSET(fd, fdsetp)                  ((((fd) >= FD_MIN) && ((fd) <= FD_MAX) &&                                                                  \
+                                                                 (((struct fd_set *)(fdsetp)) != (struct fd_set *)0)) ?                                   \
+                                               (((DEF_BIT_IS_SET((((struct fd_set *)(fdsetp))->fds_bits[(fd) / (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS)]), \
+                                                  DEF_BIT                                              ((fd) % (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS)))) \
+                                               == DEF_YES) ? 1 : 0)                                                                                       \
+                                                               : 0)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*                                 STANDARD BSD 4.x FUNCTION PROTOTYPES
+*
+* Note(s) : (1) BSD 4.x function prototypes are required only for applications that call BSD 4.x functions.
+*
+*               See also 'MODULE  Note #1b3'.
+*********************************************************************************************************
+*/
+
+
+
+                                                                        /* ------------- SOCK ALLOC FNCTS ------------- */
+int         socket    (        int         protocol_family,
+                               int         sock_type,
+                               int         protocol);
+
+int         close     (        int         sock_id);
+
+int         shutdown  (        int         sock_id,
+                               int         type);
+
+
+                                                                        /* ------------- LOCAL CONN FCNTS ------------- */
+int         bind      (        int         sock_id,
+                       struct  sockaddr   *p_addr_local,
+                               socklen_t   addr_len);
+
+
+                                                                        /* ------------ CLIENT CONN FCNTS ------------- */
+int         connect   (        int         sock_id,
+                       struct  sockaddr   *p_addr_remote,
+                               socklen_t   addr_len);
+
+
+                                                                        /* ------------ SERVER CONN FCNTS ------------- */
+int         listen    (        int         sock_id,
+                               int         sock_q_size);
+
+int         accept    (        int         sock_id,
+                       struct  sockaddr   *p_addr_remote,
+                               socklen_t  *p_addr_len);
+
+
+                                                                        /* ----------------- RX FNCTS ----------------- */
+ssize_t     recvfrom  (        int         sock_id,
+                               void       *p_data_buf,
+                              _size_t      data_buf_len,
+                               int         flags,
+                       struct  sockaddr   *p_addr_remote,
+                               socklen_t  *p_addr_len);
+
+ssize_t     recv      (        int         sock_id,
+                               void       *p_data_buf,
+                              _size_t      data_buf_len,
+                               int         flags);
+
+
+                                                                        /* ----------------- TX FNCTS ----------------- */
+ssize_t     sendto    (        int         sock_id,
+                               void       *p_data,
+                              _size_t      data_len,
+                               int         flags,
+                       struct  sockaddr   *p_addr_remote,
+                               socklen_t   addr_len);
+
+ssize_t     send      (        int         sock_id,
+                               void       *p_data,
+                              _size_t      data_len,
+                               int         flags);
+
+
+                                                                        /* ------------ MULTIPLEX I/O FNCTS ----------- */
+int         select    (        int         desc_nbr_max,
+                       struct  fd_set     *p_desc_rd,
+                       struct  fd_set     *p_desc_wr,
+                       struct  fd_set     *p_desc_err,
+                       struct  timeval    *p_timeout);
+
+
+                                                                        /* ---------------- CONV FCNTS ---------------- */
+in_addr_t   inet_addr (        char       *p_addr);
+
+
+#ifdef  NET_IPv4_MODULE_EN
+char       *inet_ntoa (struct  in_addr     addr);
+
+
+int         inet_aton (        char       *p_addr_in,
+                       struct  in_addr    *p_addr);
+#endif  /* NET_IPv4_MODULE_EN */
+
+
+                                                                        /* ------------ GET/SET SOCK OPTS ------------- */
+
+int         setsockopt(        int         sock_id,
+                               int         protocol,
+                               int         opt_name,
+                               void       *opt_val,
+                               socklen_t   opt_len);
+
+int         getsockopt(        int         sock_id,
+                               int         protocol,
+                               int         opt_name,
+                               void       *p_opt_val,
+                               socklen_t  *p_opt_len);
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif /* NET_BSD_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_buf.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_buf.c
new file mode 100644
index 0000000..da3089e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_buf.c
@@ -0,0 +1,3128 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      NETWORK BUFFER MANAGEMENT
+*
+* Filename      : net_buf.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 EHS
+*                 FGK
+*                 SR
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#ifdef  NET_BUF_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_BUF_MODULE
+#include  "net_buf.h"
+#include  "net_cfg_net.h"
+
+#include  "net.h"
+#include  "net_conn.h"
+#include  "net_tcp.h"
+#include  "net_util.h"
+#include  "../IF/net_if.h"
+
+#ifdef  NET_IF_LOOPBACK_MODULE_EN
+#include  "../IF/net_if_loopback.h"
+#endif
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+#include  "../IF/net_if_ether.h"
+#endif
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+#include  "../IF/net_if_wifi.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_BUF_POOLS  NetBuf_PoolsTbl[NET_IF_NBR_IF_TOT];
+
+static  NET_BUF_QTY    NetBuf_ID_Ctr;                      /* Global buf ID ctr.                                   */
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void  NetBuf_FreeHandler(NET_BUF        *p_buf);
+
+static  void  NetBuf_ClrHdr     (NET_BUF_HDR    *p_buf_hdr);
+
+static  void  NetBuf_Discard    (NET_IF_NBR      if_nbr,
+                                 void           *p_buf,
+                                 NET_STAT_POOL  *pstat_pool);
+
+
+/*
+*********************************************************************************************************
+*                                            NetBuf_Init()
+*
+* Description : (1) Initialize Network Buffer Management Module :
+*
+*                   (a) Initialize network buffer pools
+*                   (b) Initialize network buffer ID counter
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetBuf_Init (void)
+{
+    NET_BUF_POOLS  *ppool;
+    NET_IF_NBR      if_nbr;
+    NET_ERR         err_stat;
+    LIB_ERR         err_lib;
+
+                                                                /* ------------------ INIT BUF POOLS ------------------ */
+    if_nbr =  NET_IF_NBR_BASE;
+    ppool  = &NetBuf_PoolsTbl[if_nbr];
+    for ( ; if_nbr < NET_IF_NBR_IF_TOT; if_nbr++) {
+                                                                /* Clr net buf mem  pools.                              */
+        Mem_PoolClr(&ppool->NetBufPool,     &err_lib);
+        Mem_PoolClr(&ppool->RxBufLargePool, &err_lib);
+        Mem_PoolClr(&ppool->TxBufLargePool, &err_lib);
+        Mem_PoolClr(&ppool->TxBufSmallPool, &err_lib);
+                                                                /* Clr net buf stat pools.                              */
+        NetStat_PoolClr(&ppool->NetBufStatPool,     &err_stat);
+        NetStat_PoolClr(&ppool->RxBufLargeStatPool, &err_stat);
+        NetStat_PoolClr(&ppool->TxBufLargeStatPool, &err_stat);
+        NetStat_PoolClr(&ppool->TxBufSmallStatPool, &err_stat);
+        ppool++;
+    }
+
+                                                                /* ------------------ INIT BUF ID CTR ----------------- */
+    NetBuf_ID_Ctr = NET_BUF_ID_INIT;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetBuf_PoolInit()
+*
+* Description : (1) Allocate & initialize a network buffer pool :
+*
+*                   (a) Allocate   network buffer pool
+*                   (b) Initialize network buffer pool statistics
+*
+*
+* Argument(s) : if_nbr              Interface number to initialize network buffer pools.
+*
+*               type                Network buffer pool type :
+*
+*                                       NET_BUF_TYPE_BUF        Network buffer                pool.
+*                                       NET_BUF_TYPE_RX_LARGE   Network buffer large receive  pool.
+*                                       NET_BUF_TYPE_TX_LARGE   Network buffer large transmit pool.
+*                                       NET_BUF_TYPE_TX_SMALL   Network buffer small transmit pool.
+*
+*               pmem_base_addr      Network buffer memory pool base address :
+*
+*                                       Null (0) address        Network buffers allocated from general-
+*                                                                   purpose heap.
+*                                       Non-null address        Network buffers allocated from specified
+*                                                                   base address of dedicated memory.
+*
+*               mem_size            Size      of network buffer memory pool to initialize (in octets).
+*
+*               blk_nbr             Number    of network buffer blocks      to initialize.
+*
+*               blk_size            Size      of network buffer blocks      to initialize (in octets).
+*
+*               blk_align           Alignment of network buffer blocks      to initialize (in octets).
+*
+*               pmem_pool           Pointer to memory pool structure.
+*
+*               poctets_reqd        Pointer to a variable to ... :
+*
+*                                       (a) Return the number of octets required to successfully
+*                                               allocate the network buffer pool, if any error(s);
+*                                       (b) Return 0, otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_BUF_ERR_NONE                Network buffer pool successfully initialized.
+*                               NET_BUF_ERR_POOL_MEM_ALLOC           Network buffer pool initialization failed.
+*                               NET_BUF_ERR_INVALID_POOL_TYPE   Invalid network buffer pool type.
+*
+*                                                               --- RETURNED BY NetIF_IsValidHandler() : ----
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+*                                                               ----- RETURNED BY NetStat_PoolInit() : ------
+*                               NET_ERR_FAULT_NULL_PTR           Argument(s) passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_BufPoolInit().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetBuf_PoolInit (NET_IF_NBR   if_nbr,
+                       NET_BUF_TYPE type,
+                       void        *pmem_base_addr,
+                       CPU_SIZE_T   mem_size,
+                       CPU_SIZE_T   blk_nbr,
+                       CPU_SIZE_T   blk_size,
+                       CPU_SIZE_T   blk_align,
+                       CPU_SIZE_T  *poctets_reqd,
+                       NET_ERR     *p_err)
+{
+    NET_BUF_POOLS  *ppool;
+    NET_STAT_POOL  *pstat_pool;
+    MEM_POOL       *pmem_pool;
+    LIB_ERR         err_lib;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* ------------------ INIT BUF POOL ------------------- */
+    ppool = &NetBuf_PoolsTbl[if_nbr];
+    switch (type) {
+        case NET_BUF_TYPE_BUF:
+             pmem_pool  = &ppool->NetBufPool;
+             pstat_pool = &ppool->NetBufStatPool;
+             break;
+
+
+        case NET_BUF_TYPE_RX_LARGE:
+             pmem_pool  = &ppool->RxBufLargePool;
+             pstat_pool = &ppool->RxBufLargeStatPool;
+             break;
+
+
+        case NET_BUF_TYPE_TX_LARGE:
+             pmem_pool  = &ppool->TxBufLargePool;
+             pstat_pool = &ppool->TxBufLargeStatPool;
+             break;
+
+
+        case NET_BUF_TYPE_TX_SMALL:
+             pmem_pool  = &ppool->TxBufSmallPool;
+             pstat_pool = &ppool->TxBufSmallStatPool;
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        default:
+            *p_err = NET_BUF_ERR_INVALID_POOL_TYPE;
+             return;
+    }
+
+                                                                /* Create net buf mem pool.                             */
+    Mem_PoolCreate(pmem_pool,
+                   pmem_base_addr,
+                   mem_size,
+                   blk_nbr,
+                   blk_size,
+                   blk_align,
+                   poctets_reqd,
+                  &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = NET_BUF_ERR_POOL_MEM_ALLOC;
+        return;
+    }
+
+
+                                                                /* ---------------- INIT BUF STAT POOL ---------------- */
+    NetStat_PoolInit((NET_STAT_POOL   *)pstat_pool,
+                     (NET_STAT_POOL_QTY)blk_nbr,
+                     (NET_ERR         *)p_err);
+    if (*p_err != NET_STAT_ERR_NONE) {
+         return;
+    }
+
+
+   *p_err = NET_BUF_ERR_NONE;
+}
+
+
+NET_BUF_POOLS  *NetBuf_PoolsGet (NET_IF_NBR  if_nbr)
+{
+    NET_BUF_POOLS  *p_pool;
+
+
+    p_pool = &NetBuf_PoolsTbl[if_nbr];
+
+
+    return (p_pool);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetBuf_PoolCfgValidate()
+*
+* Description : (1) Validate network buffer pool configuration :
+*
+*                   (a) Validate configured number of network buffers
+*                   (b) Validate configured size   of network buffers
+*
+*
+* Argument(s) : pdev_cfg    Pointer to network interface's device configuration.
+*               --------    Argument validated in NetIF_BufPoolInit().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_BUF_ERR_NONE                    Network buffer pool configuration valid.
+*                               NET_BUF_ERR_INVALID_POOL_TYPE       Invalid network buffer pool type.
+*                               NET_BUF_ERR_INVALID_POOL_ADDR       Invalid network buffer pool address.
+*                               NET_BUF_ERR_INVALID_POOL_SIZE       Invalid network buffer pool size.
+*                               NET_BUF_ERR_INVALID_CFG_RX_NBR        Invalid network buffer pool number of
+*                                                                       buffers configured.
+*                               NET_BUF_ERR_INVALID_SIZE            Invalid network buffer data area size
+*                                                                       configured.
+*                               NET_BUF_ERR_INVALID_IX              Invalid offset from base index into
+*                                                                       network buffer data area configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_BufPoolInit().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Each network interface/device MUST configure :
+*
+*                   (a) At least one  (1) large receive  buffer.
+*                   (b) At least one  (1)       transmit buffer; however, zero (0) large OR zero (0)
+*                          small transmit buffers MAY be configured.
+*
+*               (3) (a) All   network  buffer data area sizes MUST be configured greater than or equal
+*                       to NET_BUF_DATA_SIZE_MIN.
+*
+*                   (b) Large transmit buffer data area sizes MUST be configured greater than or equal
+*                       to small transmit buffer data area sizes.
+*********************************************************************************************************
+*/
+
+void  NetBuf_PoolCfgValidate (NET_IF_TYPE   if_type,
+                              NET_DEV_CFG  *pdev_cfg,
+                              NET_ERR      *p_err)
+{
+    NET_BUF_QTY  nbr_bufs_tx;
+    CPU_INT32U   rx_buf_size_min;
+    CPU_INT32U   tx_buf_size_min;
+
+
+                                                                    /* -------------- VALIDATE NBR BUFS --------------- */
+    if (pdev_cfg->RxBufLargeNbr < NET_BUF_NBR_RX_LARGE_MIN) {       /* Validate nbr rx bufs (see Note #2a).             */
+       *p_err = NET_BUF_ERR_INVALID_CFG_RX_NBR;
+        return;
+    }
+                                                                    /* Validate nbr tx bufs (see Note #2b).             */
+    nbr_bufs_tx = pdev_cfg->TxBufLargeNbr +
+                  pdev_cfg->TxBufSmallNbr;
+    if (nbr_bufs_tx < NET_BUF_NBR_TX_MIN) {
+       *p_err = NET_BUF_ERR_INVALID_CFG_TX_NBR;
+        return;
+    }
+
+    switch (if_type) {
+        case NET_IF_TYPE_LOOPBACK:
+#ifdef NET_IF_LOOPBACK_MODULE_EN
+             rx_buf_size_min = NET_IF_LOOPBACK_BUF_RX_LEN_MIN;
+             tx_buf_size_min = NET_IF_LOOPBACK_BUF_TX_LEN_MIN;
+             break;
+#else
+            *p_err = NET_ERR_FAULT_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case NET_IF_TYPE_ETHER:
+#ifdef NET_IF_ETHER_MODULE_EN
+             rx_buf_size_min = NET_IF_ETHER_BUF_RX_LEN_MIN;
+             tx_buf_size_min = NET_IF_ETHER_BUF_TX_LEN_MIN;
+             break;
+#else
+            *p_err = NET_ERR_FAULT_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case NET_IF_TYPE_WIFI:
+#ifdef NET_IF_WIFI_MODULE_EN
+             rx_buf_size_min = NET_IF_WIFI_BUF_RX_LEN_MIN;
+             tx_buf_size_min = NET_IF_WIFI_BUF_TX_LEN_MIN;
+             break;
+#else
+            *p_err = NET_ERR_FAULT_FEATURE_DIS;
+             goto exit;
+#endif
+
+
+        case NET_IF_TYPE_SERIAL:
+        case NET_IF_TYPE_PPP:
+        case NET_IF_TYPE_NONE:
+        default:
+           *p_err = NET_ERR_FAULT_NOT_SUPPORTED;
+            goto exit;
+    }
+
+
+                                                                    /* ----------- VALIDATE BUF DATA SIZES ------------ */
+                                                                    /* See Note #3a.                                    */
+    if (pdev_cfg->RxBufLargeSize < rx_buf_size_min) {               /* Validate large rx buf data size.                 */
+       *p_err = NET_BUF_ERR_INVALID_SIZE;
+        goto exit;
+    }
+
+
+    if (pdev_cfg->TxBufLargeNbr > 0) {                              /* If any large tx bufs cfg'd, ...                  */
+        if (pdev_cfg->TxBufLargeSize < tx_buf_size_min) {           /* ... validate large tx buf size (see Note #3a).   */
+           *p_err = NET_BUF_ERR_INVALID_SIZE;
+            goto exit;
+        }
+    }
+
+    if (pdev_cfg->TxBufSmallNbr > 0) {                              /* If any small tx bufs cfg'd, ...                  */
+        if (pdev_cfg->TxBufSmallSize < tx_buf_size_min) {           /* ... validate small tx buf size (see Note #3a).   */
+           *p_err = NET_BUF_ERR_INVALID_SIZE;
+            goto exit;
+        }
+    }
+
+    if ((pdev_cfg->TxBufLargeNbr > 0) &&                            /* If both large tx bufs                     ...    */
+        (pdev_cfg->TxBufSmallNbr > 0)) {                            /* ... AND small tx bufs cfg'd,              ...    */
+        if (pdev_cfg->TxBufLargeSize < pdev_cfg->TxBufSmallSize) {  /* ... validate large vs. small tx buf sizes ...    */
+           *p_err = NET_BUF_ERR_INVALID_SIZE;                       /* ... (see Note #3b).                              */
+            goto exit;
+        }
+    }
+
+
+                                                                    /* --------- VALIDATE BUF DATA IX OFFSETS --------- */
+                                                                    /* Validate rx buf data ix offset.                  */
+                                                                    /* Validate tx buf data ix offset.                  */
+
+
+   *p_err = NET_BUF_ERR_NONE;
+
+exit:
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetBuf_Get()
+*
+* Description : (1) Allocate & initialize a network buffer :
+*
+*                   (a) Get        network buffer
+*                       (1) For transmit operations, also get network buffer data area
+*                   (b) Initialize network buffer
+*                   (c) Update     network buffer pool statistics
+*                   (d) Return pointer to buffer
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*
+* Argument(s) : if_nbr          Interface number to get network buffer.
+*
+*               transaction     Transaction type :
+*
+*                                   NET_TRANSACTION_RX          Receive  transaction.
+*                                   NET_TRANSACTION_TX          Transmit transaction.
+*
+*               size            Requested buffer size  to store buffer data (see Note #2).
+*
+*               ix              Requested buffer index to store buffer data; MUST NOT be pre-adjusted by
+*                                   interface's configured index offset(s)  [see Note #3].
+*
+*               pix_offset      Pointer to a variable to ... :
+*
+*                                   (a) Return the interface's receive/transmit index offset, if NO error(s);
+*                                   (b) Return 0,                                             otherwise.
+*
+*               flags           Flags to select buffer options; bit-field flags logically OR'd :
+*
+*                                   NET_BUF_FLAG_NONE           NO buffer flags selected.
+*                                   NET_BUF_FLAG_CLR_MEM        Clear buffer memory (i.e. set each buffer
+*                                                                   data octet to 0x00).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_BUF_ERR_NONE                Network buffer successfully allocated &
+*                                                                   initialized.
+*                               NET_BUF_ERR_NONE_AVAIL          NO available buffer data areas to allocate.
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                                                               ---- RETURNED BY NetBuf_GetDataPtr() : ----
+*                               NET_BUF_ERR_INVALID_IX          Invalid index.
+*                               NET_BUF_ERR_INVALID_SIZE        Invalid size.
+*                               NET_BUF_ERR_INVALID_LEN         Invalid requested size & start index.
+*
+*                                                               -------- RETURNED BY NetIF_Get() : --------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : Pointer to network buffer, if NO error(s).
+*
+*               Pointer to NULL,           otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) 'size' of 0 octets allowed.
+*
+*                   See also 'NetBuf_GetDataPtr()  Note #3'.
+*
+*               (3) 'ix' argument automatically adjusted for interface's configured network buffer data
+*                   area index offset(s) & MUST NOT be pre-adjusted by caller function(s).
+*
+*                   See also 'NetBuf_GetDataPtr()  Note #4'.
+*
+*               (4) (a) Buffer memory cleared                in NetBuf_GetDataPtr(), but ...
+*                   (b) buffer flag NET_BUF_FLAG_CLR_MEM set in NetBuf_Get().
+*
+*                   See also 'NetBuf_GetDataPtr()  Note #7'.
+*
+*               (5) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+NET_BUF  *NetBuf_Get (NET_IF_NBR        if_nbr,
+                      NET_TRANSACTION   transaction,
+                      NET_BUF_SIZE      size,
+                      NET_BUF_SIZE      ix,
+                      NET_BUF_SIZE     *pix_offset,
+                      NET_BUF_FLAGS     flags,
+                      NET_ERR          *p_err)
+{
+    NET_IF         *pif;
+    NET_DEV_CFG    *pdev_cfg;
+    NET_BUF        *p_buf;
+    NET_BUF_HDR    *p_buf_hdr;
+    NET_BUF_POOLS  *ppool;
+    NET_STAT_POOL  *pstat_pool;
+    MEM_POOL       *pmem_pool;
+    NET_BUF_SIZE    ix_offset_unused;
+    NET_BUF_SIZE    data_size;
+    NET_BUF_TYPE    type;
+    NET_ERR         err_stat;
+    LIB_ERR         err_lib;
+
+
+    if (pix_offset == (NET_BUF_SIZE *) 0) {                     /* If NOT avail, ...                                    */
+        pix_offset  = (NET_BUF_SIZE *)&ix_offset_unused;        /* ... re-cfg NULL rtn ptr to unused local var.         */
+       (void)&ix_offset_unused;                                 /* Prevent possible 'variable unused' warning.          */
+    }
+   *pix_offset = 0u;                                            /* Init ix for err (see Note #5).                       */
+
+
+                                                                /* --------------------- GET BUF ---------------------- */
+    pif = NetIF_Get(if_nbr, p_err);
+    if (*p_err !=  NET_IF_ERR_NONE) {
+         return ((NET_BUF *)0);
+    }
+
+    pdev_cfg   = (NET_DEV_CFG   *) pif->Dev_Cfg;
+    ppool      = (NET_BUF_POOLS *)&NetBuf_PoolsTbl[if_nbr];
+    pmem_pool  = (MEM_POOL      *)&ppool->NetBufPool;
+    pstat_pool = (NET_STAT_POOL *)&ppool->NetBufStatPool;
+    p_buf      = (NET_BUF       *) Mem_PoolBlkGet((MEM_POOL *) pmem_pool,
+                                                  (CPU_SIZE_T) sizeof(NET_BUF),
+                                                  (LIB_ERR  *)&err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.NoneAvailCtr);
+       *p_err =   NET_BUF_ERR_NONE_AVAIL;
+        return ((NET_BUF *)0);
+    }
+
+
+                                                                /* --------------------- INIT BUF --------------------- */
+    p_buf_hdr = &p_buf->Hdr;
+    NetBuf_ClrHdr(p_buf_hdr);
+    DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_USED);           /* Set buf as used.                                     */
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+    DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_CLR_MEM);        /* Set buf data area as clr (see Note #4).              */
+#endif
+    NET_BUF_GET_ID(p_buf_hdr->ID);                              /* Get buf ID.                                          */
+    p_buf_hdr->RefCtr   = 1u;                                   /* Set ref ctr to 1; NetBuf_Get() caller is first ref.  */
+    p_buf_hdr->IF_Nbr   = if_nbr;                               /* Set buf's IF nbrs.                                   */
+    p_buf_hdr->IF_NbrTx = if_nbr;
+   (void)&flags;                                                /* Prevent 'variable unused' warning (see Note #6).     */
+
+    switch (transaction) {
+        case NET_TRANSACTION_RX:                                /* Cfg buf for prev'ly alloc'd rx buf data area.        */
+             p_buf_hdr->Type = NET_BUF_TYPE_RX_LARGE;
+             p_buf_hdr->Size = pdev_cfg->RxBufLargeSize + pdev_cfg->RxBufIxOffset;
+            *pix_offset     = pdev_cfg->RxBufIxOffset;
+
+             ;                                                  /* Ptr to rx buf data area MUST be linked by caller.    */
+             break;
+
+
+        case NET_TRANSACTION_TX:                                /* Get/cfg tx buf & data area.                          */
+             p_buf->DataPtr = NetBuf_GetDataPtr(pif,
+                                                transaction,
+                                                size,
+                                                ix,
+                                                pix_offset,
+                                               &data_size,
+                                               &type,
+                                                p_err);
+             if (*p_err != NET_BUF_ERR_NONE) {
+                  Mem_PoolBlkFree(pmem_pool,
+                                  p_buf,
+                                 &err_lib);
+                  if (err_lib == LIB_MEM_ERR_NONE) {
+                      NetStat_PoolEntryUsedDec(pstat_pool, &err_stat);
+                  } else {
+                      NetBuf_Discard(if_nbr,
+                                     p_buf,
+                                     pstat_pool);
+                  }
+                  return ((NET_BUF *)0);
+             }
+
+             p_buf_hdr->Type = type;
+             p_buf_hdr->Size = data_size + *pix_offset;
+             break;
+
+
+        case NET_TRANSACTION_NONE:
+        default:
+             Mem_PoolBlkFree((MEM_POOL *) pmem_pool,
+                             (void     *) p_buf,
+                             (LIB_ERR  *)&err_lib);
+             if (err_lib == LIB_MEM_ERR_NONE) {
+                 NetStat_PoolEntryUsedDec(pstat_pool, &err_stat);
+             } else {
+                 NetBuf_Discard((NET_IF_NBR     )if_nbr,
+                                (void          *)p_buf,
+                                (NET_STAT_POOL *)pstat_pool);
+             }
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTransactionTypeCtr);
+            *p_err =   NET_ERR_INVALID_TRANSACTION;
+             return ((NET_BUF *)0);
+    }
+
+
+                                                                /* -------------- UPDATE BUF POOL STATS --------------- */
+    NetStat_PoolEntryUsedInc(pstat_pool, &err_stat);
+
+
+   *p_err =  NET_BUF_ERR_NONE;
+
+    return (p_buf);                                             /* --------------------- RTN BUF ---------------------- */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetBuf_GetDataPtr()
+*
+* Description : (1) Get network buffer data area of sufficient size :
+*
+*                   (a) Get    network buffer data area
+*                   (b) Update network buffer data area pool statistics
+*                   (c) Return pointer to network buffer data area
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*
+* Argument(s) : pif             Pointer to interface to get network buffer data area.
+*
+*               transaction     Transaction type :
+*
+*                                   NET_TRANSACTION_RX          Receive  transaction.
+*                                   NET_TRANSACTION_TX          Transmit transaction.
+*
+*               size            Requested buffer size  to store buffer data (see Note #3).
+*
+*               ix_start        Requested buffer index to store buffer data; MUST NOT be pre-adjusted by
+*                                   interface's configured index offset(s)  [see Note #4].
+*
+*               pix_offset      Pointer to a variable to ... :
+*
+*                                   (a) Return the interface's receive/transmit index offset, if NO error(s);
+*                                   (b) Return 0,                                             otherwise.
+*
+*               p_data_size     Pointer to a variable to ... :
+*
+*                                   (a) Return the size of the network buffer data area, if NO error(s);
+*                                   (b) Return 0,                                        otherwise.
+*
+*               ptype           Pointer to a variable to ... :
+*
+*                                   (a) Return the network buffer type, if NO error(s);
+*                                   (b) Return NET_BUF_TYPE_NONE,       otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_BUF_ERR_NONE                Network buffer data area successfully allocated
+*                                                                   & initialized.
+*                               NET_BUF_ERR_NONE_AVAIL          NO available buffer data areas to allocate.
+*                               NET_BUF_ERR_INVALID_IX          Invalid index.
+*                               NET_BUF_ERR_INVALID_SIZE        Invalid size; less than 0 or greater than the
+*                                                                   maximum network buffer data area size
+*                                                                   available.
+*                               NET_BUF_ERR_INVALID_LEN         Requested size & start index overflows network
+*                                                                   buffer's data area.
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+* Return(s)   : Pointer to network buffer data area, if NO error(s).
+*
+*               Pointer to NULL,                     otherwise.
+*
+* Caller(s)   : NetBuf_Get(),
+*               various device driver handler functions.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) but MAY be called by device driver handler function(s).
+*
+* Note(s)     : (2) 'size' & 'ix' argument check NOT required unless 'NET_BUF_SIZE's native data type
+*                   'CPU_INT16U' is incorrectly configured as a signed integer in 'cpu.h'.
+*
+*               (3) 'size' of 0 octets allowed.
+*
+*               (4) 'ix_start' argument automatically adjusted for interface's configured network buffer
+*                   data area index offset(s) & MUST NOT be pre-adjusted by caller function(s).
+*
+*               (5) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*               (6) Network transmit buffers are allocated an appropriately-sized network buffer data area
+*                   based on the total requested buffer size & index :
+*
+*                   (a) A small transmit buffer data area will be allocated if :
+*                       (1) any small transmit  buffer data areas are available, AND ...
+*                       (2) the total requested buffer size & index is less than or equal to small transmit
+*                               buffers' configured data area size.
+*
+*                   (b) A large transmit buffer data area will be allocated if :
+*                       (1)     NO  small transmit  buffer data areas are available; OR  ...
+*                       (2) (A) any large transmit  buffer data areas are available, AND ...
+*                           (B) the total requested buffer size & index is :
+*                               (1) greater than small transmit buffers' configured data area size AND ...
+*                               (2) less than or equal to large transmit buffers' configured data area size.
+*
+*                           See also 'NetBuf_PoolCfgValidate()  Note #3b'.
+*
+*               (7) Since each network buffer data area allocates additional octets for its configured
+*                   offset(s) [see 'net_if.c  NetIF_BufPoolInit()  Note #3'], the network buffer data
+*                   area size does NOT need to be adjusted by the number of additional offset octets.
+*
+*               (8) Buffer memory cleared in NetBuf_GetDataPtr() instead of in NetBuf_Free() handlers so
+*                   that the data in any freed buffer data area may be inspected until that buffer data
+*                   area is next allocated.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  *NetBuf_GetDataPtr (NET_IF           *pif,
+                                NET_TRANSACTION   transaction,
+                                NET_BUF_SIZE      size,
+                                NET_BUF_SIZE      ix_start,
+                                NET_BUF_SIZE     *pix_offset,
+                                NET_BUF_SIZE     *p_data_size,
+                                NET_BUF_TYPE     *ptype,
+                                NET_ERR          *p_err)
+{
+    NET_DEV_CFG    *pdev_cfg;
+    CPU_INT08U     *p_data;
+    NET_STAT_POOL  *pstat_pool;
+    NET_BUF_POOLS  *ppool;
+    MEM_POOL       *pmem_pool;
+    NET_BUF_SIZE    ix_offset;
+    NET_BUF_SIZE    ix_offset_unused;
+    NET_BUF_SIZE    data_size_unused;
+    NET_BUF_SIZE    size_len;
+    NET_BUF_SIZE    size_data;
+    NET_BUF_TYPE    type;
+    NET_BUF_TYPE    type_unused;
+    NET_ERR         err_stat;
+    LIB_ERR         err_lib;
+
+                                                                /* Init rtn vals for err (see Note #5).                 */
+    if (pix_offset  == (NET_BUF_SIZE *) 0) {                    /* If NOT avail, ...                                    */
+        pix_offset   = (NET_BUF_SIZE *)&ix_offset_unused;       /* ... re-cfg NULL rtn ptr to unused local var.         */
+       (void)&ix_offset_unused;                                 /* Prevent possible 'variable unused' warning.          */
+    }
+   *pix_offset  = 0u;
+
+    if (p_data_size == (NET_BUF_SIZE *) 0) {                    /* If NOT avail, ...                                    */
+        p_data_size  = (NET_BUF_SIZE *)&data_size_unused;       /* ... re-cfg NULL rtn ptr to unused local var.         */
+       (void)&data_size_unused;                                 /* Prevent possible 'variable unused' warning.          */
+    }
+   *p_data_size = 0u;
+
+    if (ptype == (NET_BUF_TYPE *) 0) {                          /* If NOT avail, ...                                    */
+        ptype  = (NET_BUF_TYPE *)&type_unused;                  /* ... re-cfg NULL rtn ptr to unused local var.         */
+       (void)&type_unused;                                      /* Prevent possible 'variable unused' warning.          */
+    }
+   *ptype = NET_BUF_TYPE_NONE;
+
+
+                                                                /* ------------------ VALIDATE IX's ------------------- */
+    pdev_cfg = (NET_DEV_CFG *)pif->Dev_Cfg;
+    switch (transaction) {
+        case NET_TRANSACTION_RX:
+             ix_offset = pdev_cfg->RxBufIxOffset;
+             break;
+
+
+        case NET_TRANSACTION_TX:
+             ix_offset = pdev_cfg->TxBufIxOffset;
+             break;
+
+
+        case NET_TRANSACTION_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTransactionTypeCtr);
+            *p_err = NET_ERR_INVALID_TRANSACTION;
+             return ((CPU_INT08U *)0);
+    }
+
+#if 0                                                           /* See Note #2.                                         */
+    if (ix_start < 0) {                                         /* If neg ix's req'd/cfg'd, rtn err.                    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.IxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return ((CPU_INT08U *)0);
+    }
+    if (ix_offset < 0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.IxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return ((CPU_INT08U *)0);
+    }
+#endif
+
+
+                                                                /* ------------------ VALIDATE SIZE ------------------- */
+#if 0                                                           /* See Note #2.                                         */
+    if (size < 0) {                                             /* If neg size req'd, rtn err.                          */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.SizeCtr);
+       *p_err = NET_BUF_ERR_INVALID_SIZE;
+        return ((CPU_INT08U *)0);
+    }
+#endif
+
+    size_len = size + ix_start;                                 /* Calc tot req'd size from start ix (see Note #7).     */
+                                                                /* Discard possible size len ovf's.                     */
+    if (size_len < size) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.LenCtr);
+       *p_err = NET_BUF_ERR_INVALID_LEN;
+        return ((CPU_INT08U *)0);
+    }
+    if (size_len < ix_start) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.LenCtr);
+       *p_err = NET_BUF_ERR_INVALID_LEN;
+        return ((CPU_INT08U *)0);
+    }
+
+
+                                                                /* ---------------- GET BUF DATA AREA ----------------- */
+    ppool     = (NET_BUF_POOLS *)&NetBuf_PoolsTbl[pif->Nbr];
+    p_data    = (CPU_INT08U    *) 0;
+    size_data = (NET_BUF_SIZE   ) 0u;
+
+    switch (transaction) {
+        case NET_TRANSACTION_RX:
+             if (size_len  <=  pdev_cfg->RxBufLargeSize) {
+                 size_data  =  pdev_cfg->RxBufLargeSize;
+                 type       =  NET_BUF_TYPE_RX_LARGE;
+                 pmem_pool  = &ppool->RxBufLargePool;
+                 pstat_pool = &ppool->RxBufLargeStatPool;
+
+                 p_data     = (CPU_INT08U *)Mem_PoolBlkGet((MEM_POOL *) pmem_pool,
+                                                           (CPU_SIZE_T) size_len,
+                                                           (LIB_ERR  *)&err_lib);
+
+             } else {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Buf.SizeCtr);
+                *p_err = NET_BUF_ERR_INVALID_SIZE;
+                 return ((CPU_INT08U *)0);
+             }
+             break;
+
+
+        case NET_TRANSACTION_TX:
+             if ((pdev_cfg->TxBufSmallNbr  >  0) &&             /* If small tx bufs avail         (see Note #6a1) & ..  */
+                 (pdev_cfg->TxBufSmallSize >= size_len)) {      /* .. small tx buf  >= req'd size (see Note #6a2),  ..  */
+                  size_data  =  pdev_cfg->TxBufSmallSize;
+                  type       =  NET_BUF_TYPE_TX_SMALL;
+                  pmem_pool  = &ppool->TxBufSmallPool;
+                  pstat_pool = &ppool->TxBufSmallStatPool;
+                                                                /* .. get a small tx buf data area.                     */
+                  p_data     = (CPU_INT08U *)Mem_PoolBlkGet((MEM_POOL *) pmem_pool,
+                                                            (CPU_SIZE_T) size_len,
+                                                            (LIB_ERR  *)&err_lib);
+             }
+
+             if ((p_data == (CPU_INT08U *)0)     &&             /* If small tx bufs NOT avail     (see Note #6b1); OR ..*/
+                 (pdev_cfg->TxBufLargeNbr  >  0) &&             /* .. large tx bufs     avail     (see Note #6b2A) &  ..*/
+                 (pdev_cfg->TxBufLargeSize >= size_len)) {      /* .. large tx buf  >= req'd size (see Note #6b2B),   ..*/
+                  size_data  =  pdev_cfg->TxBufLargeSize;
+                  type       =  NET_BUF_TYPE_TX_LARGE;
+                  pmem_pool  = &ppool->TxBufLargePool;
+                  pstat_pool = &ppool->TxBufLargeStatPool;
+                                                                /* .. get a large tx buf data area.                     */
+                  p_data     = (CPU_INT08U *)Mem_PoolBlkGet((MEM_POOL *) pmem_pool,
+                                                            (CPU_SIZE_T) size_len,
+                                                            (LIB_ERR  *)&err_lib);
+             }
+
+             if (size_len > size_data) {                        /* If tot req'd size > avail buf size, ...              */
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Buf.SizeCtr);
+                *p_err = NET_BUF_ERR_INVALID_SIZE;              /* ... rtn err.                                         */
+                 return ((CPU_INT08U *)0);
+             }
+             break;
+
+
+        case NET_TRANSACTION_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTransactionTypeCtr);
+            *p_err = NET_ERR_INVALID_TRANSACTION;
+             return ((CPU_INT08U *)0);
+    }
+
+
+    if (p_data == (CPU_INT08U *)0) {                            /* If NO appropriately-sized data area avail, ...       */
+       *p_err = NET_BUF_ERR_NONE_AVAIL;                         /* ... rtn err.                                         */
+        return ((CPU_INT08U *)0);
+    }
+
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)                     /* Clr ALL buf data octets (see Note #8).               */
+    Mem_Clr((void     *)p_data,
+            (CPU_SIZE_T)size_data);
+#endif
+
+
+                                                                /* -------------- UPDATE BUF POOL STATS --------------- */
+    NetStat_PoolEntryUsedInc(pstat_pool, &err_stat);
+
+
+                                                                /* ---------------- RTN BUF DATA AREA ----------------- */
+   *pix_offset  = ix_offset;
+   *p_data_size = size_data;
+   *ptype       = type;
+
+
+   *p_err =  NET_BUF_ERR_NONE;
+
+    return (p_data);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetBuf_GetMaxSize()
+*
+* Description : Get maximum possible buffer allocation size starting at a specific buffer index.
+*
+* Argument(s) : if_nbr          Interface number to get maximum network buffer size.
+*
+*               transaction     Transaction type :
+*
+*                                   NET_TRANSACTION_RX          Receive  transaction.
+*                                   NET_TRANSACTION_TX          Transmit transaction.
+*
+*               p_buf           Pointer to a network buffer.
+*
+*               ix_start        Requested buffer index to store buffer data.
+*
+* Return(s)   : Maximum buffer size for a specified network buffer or interface, if NO error(s).
+*
+*               0,                                                               otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Although network buffers' data area MAY be declared with an additional CPU word size
+*                   (see 'net_buf.h  NETWORK BUFFER DATA TYPE  Note #2b'), this additional CPU word size
+*                   does NOT increase the overall useable network buffer data area size.
+*
+*               (2) Since each network buffer data area allocates additional octets for its configured
+*                   offset(s) [see 'net_if.c  NetIF_BufPoolInit()  Note #3'], the network buffer data
+*                   area size does NOT need to be adjusted by the number of additional offset octets.
+*********************************************************************************************************
+*/
+
+NET_BUF_SIZE  NetBuf_GetMaxSize (NET_IF_NBR        if_nbr,
+                                 NET_TRANSACTION   transaction,
+                                 NET_BUF          *p_buf,
+                                 NET_BUF_SIZE      ix_start)
+{
+    NET_IF        *pif;
+    NET_BUF_HDR   *p_buf_hdr;
+    NET_DEV_CFG   *pdev_cfg;
+    NET_BUF_SIZE   max_size;
+    NET_ERR        err;
+
+
+    max_size = 0u;
+
+    if (p_buf != DEF_NULL) {                                /* Chk p_buf's max size.                                */
+        p_buf_hdr = &p_buf->Hdr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        switch (p_buf_hdr->Type) {
+            case NET_BUF_TYPE_BUF:
+            case NET_BUF_TYPE_RX_LARGE:
+            case NET_BUF_TYPE_TX_LARGE:
+            case NET_BUF_TYPE_TX_SMALL:
+                 break;
+
+
+            case NET_BUF_TYPE_NONE:
+            default:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+                 return (0u);
+        }
+#endif
+
+        if (ix_start < p_buf_hdr->Size) {
+            max_size = p_buf_hdr->Size - ix_start;
+        }
+
+    } else {                                                    /* Else chk specific IF's cfg'd max buf size.           */
+        pif = NetIF_Get(if_nbr, &err);
+        if (err != NET_IF_ERR_NONE) {
+            return (0u);
+        }
+
+        pdev_cfg = (NET_DEV_CFG *)pif->Dev_Cfg;
+        switch (transaction) {
+            case NET_TRANSACTION_RX:
+                 if (pdev_cfg->RxBufLargeNbr > 0u) {
+                     if (ix_start < pdev_cfg->RxBufLargeSize) {
+                         max_size = pdev_cfg->RxBufLargeSize - ix_start;
+                     }
+                 }
+                 break;
+
+
+            case NET_TRANSACTION_TX:
+                 if (pdev_cfg->TxBufLargeNbr > 0u) {
+                     if (ix_start < pdev_cfg->TxBufLargeSize) {
+                         max_size = pdev_cfg->TxBufLargeSize - ix_start;
+                     }
+                 } else if (pdev_cfg->TxBufSmallNbr > 0u) {
+                     if (ix_start < pdev_cfg->TxBufSmallSize) {
+                         max_size = pdev_cfg->TxBufSmallSize - ix_start;
+                     }
+                 } else {
+                     ;
+                 }
+                 break;
+
+
+            case NET_TRANSACTION_NONE:
+            default:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTransactionTypeCtr);
+                 return (0u);
+        }
+    }
+
+
+    return (max_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetBuf_Free()
+*
+* Description : (1) Free a network buffer :
+*
+*                   (a) Free network   buffer
+*                   (b) Free IP option buffer                   See Note #2
+*
+*
+* Argument(s) : p_buf       Pointer to a network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Since any single IP packet requires only a single network buffer to receive IP
+*                   options (see 'net_ip.c  NetIP_RxPktValidate()  Note #1bC'), then no more than ONE
+*                   network buffer should be linked as an IP options buffer from another buffer.
+*********************************************************************************************************
+*/
+
+void  NetBuf_Free (NET_BUF  *p_buf)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_BUF      *p_buf_ip_opt;
+#endif
+
+                                                                /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        return;
+    }
+
+                                                                /* ------------------ FREE NET BUF(s) ----------------- */
+#ifdef  NET_IPv4_MODULE_EN
+    p_buf_hdr    = &p_buf->Hdr;
+    p_buf_ip_opt =  p_buf_hdr->IP_OptPtr;
+#endif
+
+    NetBuf_FreeHandler(p_buf);                                  /* Free net buf.                                        */
+#ifdef  NET_IPv4_MODULE_EN
+    if (p_buf_ip_opt != (NET_BUF *)0) {                         /* If avail, ...                                        */
+        NetBuf_FreeHandler(p_buf_ip_opt);                       /* ... free IP opt buf (see Note #2).                   */
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetBuf_FreeBuf()
+*
+* Description : Free a network buffer.
+*
+* Argument(s) : p_buf       Pointer to a network buffer.
+*
+*               pctr        Pointer to possible error counter.
+*
+* Return(s)   : Number of network buffers freed.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Buffers are NOT validated for 'Type' or 'USED' before freeing. #### NET-808
+*
+*                   See also 'NetBuf_FreeHandler()  Note #2'.
+*
+*               (2) Buffers may be referenced by multiple layers.  Therefore, the buffer's reference
+*                   counter MUST be checked before freeing the buffer.
+*********************************************************************************************************
+*/
+
+NET_BUF_QTY  NetBuf_FreeBuf (NET_BUF  *p_buf,
+                             NET_CTR  *pctr)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_BUF_QTY   nbr_freed;
+
+
+    nbr_freed = 0u;
+
+    if (p_buf != (NET_BUF *)0) {
+        p_buf_hdr = &p_buf->Hdr;
+        if (p_buf_hdr->RefCtr > 1) {                            /* If     buf ref'd by multiple layers (see Note #2), ..*/
+            p_buf_hdr->RefCtr--;                                /* .. dec buf ref ctr.                                  */
+        } else {                                                /* Else free buf.                                       */
+            NetBuf_Free(p_buf);
+        }
+
+        if (pctr != (NET_CTR *)0) {                             /* If avail, ...                                        */
+            NET_CTR_ERR_INC(*pctr);                             /* ... inc err ctr.                                     */
+        }
+
+        nbr_freed++;
+    }
+
+    return (nbr_freed);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetBuf_FreeBufList()
+*
+* Description : Free a network buffer list.
+*
+*               (1) Network buffer lists are implemented as doubly-linked lists :
+*
+*                   (a) 'p_buf_list' points to the head of the buffer list.
+*
+*                   (b) Buffer's 'PrevBufPtr' & 'NextBufPtr' doubly-link each buffer in a buffer list.
+*
+*
+*                                     ---        Head of         -------
+*                                      ^       Buffer List  ---->|     |
+*                                      |                         |     |
+*                                      |     (see Note #1a)      |     |
+*                                      |                         |     |
+*                                      |                         |     |
+*                                      |                         -------
+*                                      |                           | ^
+*                                      |                           | |
+*                                      |                           v |
+*                                                                -------
+*                                 Buffer List                    |     |
+*                                (see Note #1)                   |     |
+*                                                                |     |
+*                                      |                         |     |
+*                                      |                         |     |
+*                                      |                         -------
+*                                      |                           | ^
+*                                      |           NextBufPtr ---> | | <--- PrevBufPtr
+*                                      |         (see Note #1b)    v |    (see Note #1b)
+*                                      |                         -------
+*                                      |                         |     |
+*                                      v                         |     |
+*                                     ---                        -------
+*
+*
+* Argument(s) : p_buf_list   Pointer to a buffer list.
+*
+*               pctr        Pointer to possible error counter.
+*
+* Return(s)   : Number of network buffers freed.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Buffers are NOT validated for 'Type' or 'USED' before freeing. #### NET-808
+*
+*                   See also 'NetBuf_FreeHandler()  Note #2'.
+*
+*               (3) Buffers may be referenced by multiple layers.  Therefore, the buffer's reference
+*                   counter MUST be checked before freeing the buffer.
+*
+*               (4) Buffers NOT freed are unlinked from other buffer fragment lists & compressed within
+*                   their own buffer list.  Ideally, buffer fragment lists SHOULD NEVER be compressed
+*                   but should be unlinked in their entirety.
+*********************************************************************************************************
+*/
+
+NET_BUF_QTY  NetBuf_FreeBufList (NET_BUF  *p_buf_list,
+                                 NET_CTR  *pctr)
+{
+    NET_BUF      *p_buf;
+    NET_BUF      *p_buf_prev;
+    NET_BUF      *p_buf_next;
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_BUF_HDR  *p_buf_prev_hdr;
+    NET_BUF_QTY   nbr_freed;
+
+
+    p_buf      = (NET_BUF   *)p_buf_list;
+    p_buf_prev = (NET_BUF   *)0;
+    nbr_freed  = (NET_BUF_QTY)0u;
+
+    while (p_buf  != (NET_BUF *)0) {                            /* Free ALL bufs in buf list.                           */
+        p_buf_hdr  = &p_buf->Hdr;
+        p_buf_next =  p_buf_hdr->NextBufPtr;
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        p_buf_hdr->PrevPrimListPtr = (NET_BUF *)0;
+        p_buf_hdr->NextPrimListPtr = (NET_BUF *)0;
+#endif
+
+        if (p_buf_hdr->RefCtr > 1) {                            /* If     buf ref'd by multiple layers (see Note #3), ..*/
+            p_buf_hdr->RefCtr--;                                /* .. dec buf ref ctr.                                  */
+            p_buf_hdr->PrevBufPtr = (NET_BUF *)p_buf_prev;
+            p_buf_hdr->NextBufPtr = (NET_BUF *)0;
+            if (p_buf_prev != (NET_BUF *)0) {                   /* If prev buf non-NULL, ...                            */
+                p_buf_prev_hdr             = &p_buf_prev->Hdr;
+                p_buf_prev_hdr->NextBufPtr =  p_buf;            /* ... set prev buf's next ptr to cur buf.              */
+            }
+            p_buf_prev = p_buf;                                 /* Set cur buf as new prev buf (see Note #4).           */
+
+        } else {                                                /* Else free buf.                                       */
+            NetBuf_Free(p_buf);
+        }
+
+        if (pctr != (NET_CTR *)0) {                             /* If avail, ...                                        */
+            NET_CTR_ERR_INC(*pctr);                             /* ... inc err ctr.                                     */
+        }
+
+        nbr_freed++;
+
+        p_buf = p_buf_next;
+    }
+
+    return (nbr_freed);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetBuf_FreeBufQ_PrimList()
+*
+* Description : Free a network buffer queue, organized by the buffers' primary buffer lists.
+*
+*               (1) Network buffer queues are implemented as multiply-linked lists :
+*
+*                   (a) 'p_buf_q' points to the head of the buffer queue.
+*
+*                   (b) Buffers are multiply-linked to form a queue of buffer lists.
+*
+*                       In the diagram below, ... :
+*
+*                       (1) The top horizontal row  represents the queue of buffer lists.
+*
+*                       (2) Each    vertical column represents buffer fragments in the same buffer list.
+*
+*                       (3) Buffers' 'PrevPrimListPtr' & 'NextPrimListPtr' doubly-link each buffer list's
+*                           head buffer to form the queue of buffer lists.
+*
+*                       (4) Buffer's 'PrevBufPtr'      & 'NextBufPtr'      doubly-link each buffer in a
+*                           buffer list.
+*
+*
+*                                                 |                                               |
+*                                                 |<--------------- Buffer Queue ---------------->|
+*                                                 |                (see Note #1b1)                |
+*
+*                                                             NextPrimListPtr
+*                                                             (see Note #1b3)
+*                                                                        |
+*                                                                        |
+*                      ---          Head of       -------       -------  v    -------       -------
+*                       ^            Buffer  ---->|     |------>|     |------>|     |------>|     |
+*                       |            Queue        |     |       |     |       |     |       |     |
+*                       |                         |     |<------|     |<------|     |<------|     |
+*                       |       (see Note #1a)    |     |       |     |  ^    |     |       |     |
+*                       |                         |     |       |     |  |    |     |       |     |
+*                       |                         -------       -------  |    -------       -------
+*                       |                           | ^                  |      | ^
+*                       |                           | |       PrevPrimListPtr   | |
+*                       |                           v |       (see Note #1b3)   v |
+*                       |                         -------                     -------
+*                                                 |     |                     |     |
+*                Fragments in the                 |     |                     |     |
+*                same Buffer List                 |     |                     |     |
+*                (see Note #1b2)                  |     |                     |     |
+*                                                 |     |                     |     |
+*                       |                         -------                     -------
+*                       |                           | ^                         | ^
+*                       |           NextBufPtr ---> | | <--- PrevBufPtr         | |
+*                       |        (see Note #1b4)    v |   (see Note #1b4)       v |
+*                       |                         -------                     -------
+*                       |                         |     |                     |     |
+*                       |                         |     |                     |     |
+*                       |                         |     |                     -------
+*                       |                         |     |
+*                       v                         |     |
+*                      ---                        -------
+*
+*
+* Argument(s) : p_buf_q     Pointer to a buffer queue.
+*
+*               pctr        Pointer to possible error counter.
+*
+* Return(s)   : Number of network buffers freed.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Buffers are NOT validated for 'Type' or 'USED' before freeing. #### NET-808
+*
+*                   See also 'NetBuf_FreeHandler()  Note #2'.
+*
+*               (3) Buffers may be referenced by multiple layers.  Therefore, the buffers' reference
+*                   counters MUST be checked before freeing the buffer(s).
+*
+*               (4) Buffers NOT freed are unlinked from other buffer fragment lists & compressed within
+*                   their own buffer list.  Ideally, buffer fragment lists SHOULD NEVER be compressed
+*                   but should be unlinked in their entirety.
+*********************************************************************************************************
+*/
+
+NET_BUF_QTY  NetBuf_FreeBufQ_PrimList (NET_BUF  *p_buf_q,
+                                       NET_CTR  *pctr)
+{
+    NET_BUF      *p_buf_list;
+    NET_BUF      *p_buf_list_next;
+    NET_BUF      *p_buf;
+    NET_BUF      *p_buf_prev;
+    NET_BUF      *p_buf_next;
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_BUF_QTY   nbr_freed;
+
+
+    p_buf_list = p_buf_q;
+    nbr_freed  = 0u;
+
+    while (p_buf_list != (NET_BUF *)0) {                        /* Free ALL buf lists in buf Q.                         */
+        p_buf_hdr                  = &p_buf_list->Hdr;
+        p_buf_list_next            = (NET_BUF *)p_buf_hdr->NextPrimListPtr;
+        p_buf_hdr->PrevPrimListPtr = (NET_BUF *)0;
+        p_buf_hdr->NextPrimListPtr = (NET_BUF *)0;
+
+        p_buf                      = (NET_BUF *)p_buf_list;
+        p_buf_prev                 = (NET_BUF *)0;
+
+        while (p_buf  != (NET_BUF *)0) {                        /* Free ALL bufs in buf list.                           */
+            p_buf_hdr  = &p_buf->Hdr;
+            p_buf_next =  p_buf_hdr->NextBufPtr;
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+            p_buf_hdr->PrevPrimListPtr = (NET_BUF *)0;
+            p_buf_hdr->NextPrimListPtr = (NET_BUF *)0;
+#endif
+
+            if (p_buf_hdr->RefCtr > 1) {                        /* If     buf ref'd by multiple layers (see Note #3), ..*/
+                p_buf_hdr->RefCtr--;                            /* .. dec buf ref ctr.                                  */
+                p_buf_hdr->PrevBufPtr = (NET_BUF *)p_buf_prev;
+                p_buf_hdr->NextBufPtr = (NET_BUF *)0;
+                if (p_buf_prev != (NET_BUF *)0) {               /* If prev buf non-NULL, ...                            */
+                    p_buf_hdr             = &p_buf_prev->Hdr;
+                    p_buf_hdr->NextBufPtr =  p_buf;             /* ... set prev buf's next ptr to cur buf.              */
+                }
+                p_buf_prev = p_buf;                             /* Set cur buf as new prev buf (see Note #4).           */
+
+            } else {                                            /* Else free buf.                                       */
+                NetBuf_Free(p_buf);
+            }
+
+            if (pctr != (NET_CTR *)0) {                         /* If avail, ...                                        */
+                NET_CTR_ERR_INC(*pctr);                         /* ... inc err ctr.                                     */
+            }
+
+            nbr_freed++;
+
+            p_buf  = p_buf_next;
+        }
+
+        p_buf_list = p_buf_list_next;
+    }
+
+    return (nbr_freed);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetBuf_FreeBufQ_SecList()
+*
+* Description : Free a network buffer queue, organized by the buffers' secondary buffer lists.
+*
+*               (1) Network buffer queues are implemented as multiply-linked lists :
+*
+*                   (a) 'p_buf_q' points to the head of the buffer queue.
+*
+*                   (b) Buffers are multiply-linked to form a queue of buffer lists.
+*
+*                       In the diagram below, ... :
+*
+*                       (1) The top horizontal row  represents the queue of buffer lists.
+*
+*                       (2) Each    vertical column represents buffer fragments in the same buffer list.
+*
+*                       (3) Buffers' 'PrevSecListPtr' & 'NextSecListPtr' doubly-link each buffer list's
+*                           head buffer to form the queue of buffer lists.
+*
+*                       (4) Buffer's 'PrevBufPtr'     & 'NextBufPtr'     doubly-link each buffer in a
+*                           buffer list.
+*
+*
+*                                                 |                                               |
+*                                                 |<--------------- Buffer Queue ---------------->|
+*                                                 |                (see Note #1b1)                |
+*
+*                                                              NextSecListPtr
+*                                                             (see Note #1b3)
+*                                                                        |
+*                                                                        |
+*                      ---          Head of       -------       -------  v    -------       -------
+*                       ^            Buffer  ---->|     |------>|     |------>|     |------>|     |
+*                       |            Queue        |     |       |     |       |     |       |     |
+*                       |                         |     |<------|     |<------|     |<------|     |
+*                       |       (see Note #1a)    |     |       |     |  ^    |     |       |     |
+*                       |                         |     |       |     |  |    |     |       |     |
+*                       |                         -------       -------  |    -------       -------
+*                       |                           | ^                  |      | ^
+*                       |                           | |        PrevSecListPtr   | |
+*                       |                           v |       (see Note #1b3)   v |
+*                       |                         -------                     -------
+*                                                 |     |                     |     |
+*                Fragments in the                 |     |                     |     |
+*                same Buffer List                 |     |                     |     |
+*                (see Note #1b2)                  |     |                     |     |
+*                                                 |     |                     |     |
+*                       |                         -------                     -------
+*                       |                           | ^                         | ^
+*                       |           NextBufPtr ---> | | <--- PrevBufPtr         | |
+*                       |        (see Note #1b4)    v |   (see Note #1b4)       v |
+*                       |                         -------                     -------
+*                       |                         |     |                     |     |
+*                       |                         |     |                     |     |
+*                       |                         |     |                     -------
+*                       |                         |     |
+*                       v                         |     |
+*                      ---                        -------
+*
+*
+* Argument(s) : p_buf_q         Pointer to a buffer queue.
+*
+*               pctr            Pointer to possible error counter.
+*
+*               pfnct_unlink    Pointer to possible unlink function.
+*
+* Return(s)   : Number of network buffers freed.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Buffers are NOT validated for 'Type' or 'USED' before freeing. #### NET-808
+*
+*                   See also 'NetBuf_FreeHandler()  Note #2'.
+*
+*               (3) Buffers may be referenced by multiple layers.  Therefore, the buffers' reference
+*                   counters MUST be checked before freeing the buffer(s).
+*
+*               (4) Buffers NOT freed are unlinked from other buffer fragment lists & compressed within
+*                   their own buffer list.  Ideally, buffer fragment lists SHOULD NEVER be compressed
+*                   but should be unlinked in their entirety.
+*
+*               (5) Since buffers' unlink functions are intended to unlink a buffer from a secondary
+*                   buffer queue list; the secondary buffer queue list's unlink function MUST be cleared
+*                   before freeing the buffer to avoid unlinking the buffer(s) from the secondary buffer
+*                   queue list multiple times.
+*
+*                   See also 'NetBuf_FreeHandler()  Note #3'.
+*********************************************************************************************************
+*/
+
+NET_BUF_QTY  NetBuf_FreeBufQ_SecList (NET_BUF       *p_buf_q,
+                                      NET_CTR       *pctr,
+                                      NET_BUF_FNCT   pfnct_unlink)
+{
+    NET_BUF      *p_buf_list;
+    NET_BUF      *p_buf_list_next;
+    NET_BUF      *p_buf;
+    NET_BUF      *p_buf_prev;
+    NET_BUF      *p_buf_next;
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_BUF_QTY   nbr_freed;
+
+
+    p_buf_list = p_buf_q;
+    nbr_freed  = 0u;
+
+    while (p_buf_list   != (NET_BUF *)0) {                      /* Free ALL buf lists in buf Q.                         */
+        p_buf_hdr        = &p_buf_list->Hdr;
+        p_buf_list_next  = (NET_BUF *)p_buf_hdr->NextSecListPtr;
+
+        p_buf            = (NET_BUF *)p_buf_list;
+        p_buf_prev       = (NET_BUF *)0;
+
+        while (p_buf    != (NET_BUF *)0) {                      /* Free ALL bufs in buf list.                           */
+            p_buf_hdr    = &p_buf->Hdr;
+            p_buf_next   =  p_buf_hdr->NextBufPtr;
+                                                                /* Clr unlink & sec list ptrs (see Note #5).            */
+            if (p_buf_hdr->UnlinkFnctPtr == (NET_BUF_FNCT)pfnct_unlink) {
+                p_buf_hdr->UnlinkFnctPtr  = (NET_BUF_FNCT)0;
+                p_buf_hdr->UnlinkObjPtr   = (void       *)0;
+                p_buf_hdr->PrevSecListPtr = (NET_BUF    *)0;
+                p_buf_hdr->NextSecListPtr = (NET_BUF    *)0;
+            }
+
+            if (p_buf_hdr->RefCtr > 1) {                        /* If     buf ref'd by multiple layers (see Note #3), ..*/
+                p_buf_hdr->RefCtr--;                            /* .. dec buf ref ctr.                                  */
+                p_buf_hdr->PrevBufPtr = (NET_BUF *)p_buf_prev;
+                p_buf_hdr->NextBufPtr = (NET_BUF *)0;
+                if (p_buf_prev != (NET_BUF *)0) {               /* If prev buf non-NULL, ...                            */
+                    p_buf_hdr             = &p_buf_prev->Hdr;
+                    p_buf_hdr->NextBufPtr =  p_buf;             /* ... set prev buf's next ptr to cur buf.              */
+                }
+                p_buf_prev = p_buf;                             /* Set cur buf as new prev buf (see Note #4).           */
+
+            } else {                                            /* Else free buf.                                       */
+                NetBuf_Free(p_buf);
+            }
+
+            if (pctr != (NET_CTR *)0) {                         /* If avail, ...                                        */
+                NET_CTR_ERR_INC(*pctr);                         /* ... inc err ctr.                                     */
+            }
+
+            nbr_freed++;
+
+            p_buf  = p_buf_next;
+        }
+
+        p_buf_list = p_buf_list_next;
+    }
+
+    return (nbr_freed);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetBuf_FreeBufDataAreaRx()
+*
+* Description : Free a receive network buffer data area.
+*
+* Argument(s) : if_nbr      Network interface number freeing network buffer data area.
+*               ------      Argument checked in NetIF_RxHandler().
+*
+*               p_buf_data  Pointer to network buffer data area to free.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIF_RxPkt(),
+*               Device driver receive function(s).
+*
+*               This function is an INTERNAL network protocol suite function but MAY be called by
+*               device driver receive function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetBuf_FreeBufDataAreaRx (NET_IF_NBR   if_nbr,
+                                CPU_INT08U  *p_buf_data)
+{
+    NET_BUF_POOLS  *ppool;
+    MEM_POOL       *pmem_pool;
+    NET_STAT_POOL  *pstat_pool;
+    NET_ERR         err;
+    LIB_ERR         err_lib;
+
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_buf_data == (CPU_INT08U *)0) {
+        return;
+    }
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+   (void)NetIF_IsValidHandler(if_nbr, &err);                    /* --------------- VALIDATE NET IF NBR ---------------- */
+    if (err != NET_IF_ERR_NONE) {
+        return;
+    }
+#endif
+
+                                                                /* -------------- FREE RX BUF DATA AREA --------------- */
+    ppool      = &NetBuf_PoolsTbl[if_nbr];
+    pmem_pool  = &ppool->RxBufLargePool;
+    pstat_pool = &ppool->RxBufLargeStatPool;
+
+    Mem_PoolBlkFree((MEM_POOL *) pmem_pool,
+                    (void     *) p_buf_data,
+                    (LIB_ERR  *)&err_lib);
+
+    if (err_lib == LIB_MEM_ERR_NONE) {                          /* If buf data area freed to pool, ...                  */
+        NetStat_PoolEntryUsedDec(pstat_pool, &err);             /* ... update buf pool stats;      ...                  */
+    } else {                                                    /* ... else discard buf data area.                      */
+        NetBuf_Discard((NET_IF_NBR     )if_nbr,
+                       (void          *)p_buf_data,
+                       (NET_STAT_POOL *)pstat_pool);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetBuf_DataRd()
+*
+* Description : (1) Read data from network buffer's DATA area :
+*
+*                   (a) Validate data read index & size
+*                   (b) Read     data from buffer
+*
+*
+* Argument(s) : p_buf       Pointer to a network buffer.
+*
+*               ix          Index into buffer's DATA area.
+*
+*               len         Number of octets to read (see Note #2).
+*
+*               pdest       Pointer to destination to read data into (see Note #3).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_BUF_ERR_NONE                Read from network buffer DATA area successful.
+*                               NET_ERR_FAULT_NULL_PTR          Argument 'p_buf'/'pdest' passed a NULL pointer.
+*                               NET_BUF_ERR_INVALID_TYPE        Argument 'p_buf's TYPE is invalid or unknown.
+*                               NET_BUF_ERR_INVALID_IX          Invalid index  (outside buffer's DATA area).
+*                               NET_BUF_ERR_INVALID_LEN         Invalid length (outside buffer's DATA area).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Data read of 0 octets allowed.
+*
+*               (3) Destination buffer size NOT validated; buffer overruns MUST be prevented by caller.
+*
+*               (4) 'ix' & 'len' argument check NOT required unless 'NET_BUF_SIZE's native data type
+*                   'CPU_INT16U' is incorrectly configured as a signed integer in 'cpu.h'.
+*
+*               (5) Buffer 'Size' is NOT re-validated; validated in NetBuf_Get().
+*********************************************************************************************************
+*/
+
+void  NetBuf_DataRd (NET_BUF       *p_buf,
+                     NET_BUF_SIZE   ix,
+                     NET_BUF_SIZE   len,
+                     CPU_INT08U    *pdest,
+                     NET_ERR       *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_BUF_HDR   *p_buf_hdr;
+    NET_BUF_SIZE   len_data;
+#endif
+    CPU_INT08U    *p_data;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE BUF PTR ------------------ */
+    if (p_buf == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+                                                                /* ---------------- VALIDATE BUF TYPE ----------------- */
+    p_buf_hdr = &p_buf->Hdr;
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* ----------------- VALIDATE DEST PTR ---------------- */
+    if (pdest == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* ----------------- VALIDATE IX/SIZE ----------------- */
+#if 0                                                           /* See Note #4.                                         */
+    if (ix < 0) {                                               /* If req'd ix  < 0,    rtn err.                        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.IxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+    if (len < 0) {                                              /* If req'd len < 0,    rtn err.                        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.LenCtr);
+       *p_err = NET_BUF_ERR_INVALID_LEN;
+        return;
+    }
+#endif
+    if (len < 1) {                                              /* If req'd len = 0,    rtn null rd (see Note #2).      */
+       *p_err = NET_BUF_ERR_NONE;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (ix >= p_buf_hdr->Size) {                                /* If req'd ix  > size, rtn err.                        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.IxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+    len_data = ix + len;
+    if (len_data > p_buf_hdr->Size) {                           /* If req'd len > size, rtn err.                        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.LenCtr);
+       *p_err = NET_BUF_ERR_INVALID_LEN;
+        return;
+    }
+#endif
+
+                                                                /* ------------------- RD BUF DATA -------------------- */
+                                                                /* Req'd ix & len within  buf DATA area; ...            */
+    p_data = &p_buf->DataPtr[ix];                                /* ... set ptr to ix into buf DATA area, ...            */
+    Mem_Copy((void     *)pdest,                                 /* ... & copy len nbr DATA buf octets to dest.          */
+             (void     *)p_data,
+             (CPU_SIZE_T)len);
+
+   *p_err = NET_BUF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetBuf_DataWr()
+*
+* Description : (1) Write data into network buffer's DATA area :
+*
+*                   (a) Validate data write index & size
+*                   (b) Write    data into buffer
+*
+*
+* Argument(s) : p_buf       Pointer to a network buffer.
+*
+*               ix          Index into buffer's DATA area.
+*
+*               len         Number of octets to write (see Note #2).
+*
+*               psrc        Pointer to data to write.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_BUF_ERR_NONE                Write to network buffer DATA area successful.
+*                               NET_ERR_FAULT_NULL_PTR          Argument 'p_buf'/'psrc' passed a NULL pointer.
+*                               NET_BUF_ERR_INVALID_TYPE        Argument 'p_buf's TYPE is invalid or unknown.
+*                               NET_BUF_ERR_INVALID_IX          Invalid index  (outside buffer's DATA area).
+*                               NET_BUF_ERR_INVALID_LEN         Invalid length (outside buffer's DATA area).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Data write of 0 octets allowed.
+*
+*               (3) 'ix' & 'len' argument check NOT required unless 'NET_BUF_SIZE's native data type
+*                   'CPU_INT16U' is incorrectly configured as a signed integer in 'cpu.h'.
+*
+*               (4) Buffer 'Size' is NOT re-validated; validated in NetBuf_Get().
+*********************************************************************************************************
+*/
+
+void  NetBuf_DataWr (NET_BUF       *p_buf,
+                     NET_BUF_SIZE   ix,
+                     NET_BUF_SIZE   len,
+                     CPU_INT08U    *psrc,
+                     NET_ERR       *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_BUF_HDR   *p_buf_hdr;
+    NET_BUF_SIZE   len_data;
+#endif
+    CPU_INT08U    *p_data;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE BUF PTR ------------------ */
+    if (p_buf == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+                                                                /* ---------------- VALIDATE BUF TYPE ----------------- */
+    p_buf_hdr = &p_buf->Hdr;
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* ----------------- VALIDATE SRC PTR ----------------- */
+    if (psrc == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+                                                                /* ----------------- VALIDATE IX/SIZE ----------------- */
+#if 0                                                           /* See Note #3.                                         */
+    if (ix < 0) {                                               /* If req'd ix  < 0,    rtn err.                        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.IxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+    if (len < 0) {                                              /* If req'd len < 0,    rtn err.                        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.LenCtr);
+       *p_err = NET_BUF_ERR_INVALID_LEN;
+        return;
+    }
+#endif
+    if (len < 1) {                                              /* If req'd len = 0,    rtn null wr (see Note #2).      */
+       *p_err = NET_BUF_ERR_NONE;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (ix >= p_buf_hdr->Size) {                                /* If req'd ix  > size, rtn err.                        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.IxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+    len_data = ix + len;
+    if (len_data > p_buf_hdr->Size) {                           /* If req'd len > size, rtn err.                        */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.LenCtr);
+       *p_err = NET_BUF_ERR_INVALID_LEN;
+        return;
+    }
+#endif
+
+                                                                /* ------------------- WR BUF DATA -------------------- */
+                                                                /* Req'd ix & len within  buf DATA area; ...            */
+    p_data = &p_buf->DataPtr[ix];                               /* ... set ptr to ix into buf DATA area, ...            */
+    Mem_Copy((void     *)p_data,                                /* ... & copy len nbr src octets into DATA buf.         */
+             (void     *)psrc,
+             (CPU_SIZE_T)len);
+
+   *p_err = NET_BUF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetBuf_DataCopy()
+*
+* Description : (1) Copy data from one network buffer's DATA area to another network buffer's DATA area :
+*
+*                   (a) Validate data copy indices & sizes
+*                   (b) Copy     data between buffers
+*
+*
+* Argument(s) : p_buf_dest  Pointer to destination network buffer.
+*
+*               p_buf_src   Pointer to source      network buffer.
+*
+*               ix_dest     Index into destination buffer's DATA area.
+*
+*               ix_src      Index into source      buffer's DATA area.
+*
+*               len         Number of octets to copy (see Note #2).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_BUF_ERR_NONE                Copy between network buffer DATA areas successful.
+*                               NET_ERR_FAULT_NULL_PTR          Argument 'p_buf_dest'/'p_buf_src' passed a NULL
+*                                                                   pointer.
+*                               NET_BUF_ERR_INVALID_TYPE        Argument 'p_buf_dest'/'p_buf_src's TYPE is invalid
+*                                                                   or unknown.
+*                               NET_BUF_ERR_INVALID_IX          Invalid index  [outside buffer(s)' DATA area(s)].
+*                               NET_BUF_ERR_INVALID_LEN         Invalid length [outside buffer(s)' DATA area(s)].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Data copy of 0 octets allowed.
+*
+*               (3) 'ix_&&&' & 'len' argument check NOT required unless 'NET_BUF_SIZE's native data type
+*                   'CPU_INT16U' is incorrectly configured as a signed integer in 'cpu.h'.
+*
+*               (4) Buffer 'Size's are NOT re-validated; validated in NetBuf_Get().
+*********************************************************************************************************
+*/
+
+void  NetBuf_DataCopy (NET_BUF       *p_buf_dest,
+                       NET_BUF       *p_buf_src,
+                       NET_BUF_SIZE   ix_dest,
+                       NET_BUF_SIZE   ix_src,
+                       NET_BUF_SIZE   len,
+                       NET_ERR       *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_BUF_HDR   *p_buf_hdr_dest;
+    NET_BUF_HDR   *p_buf_hdr_src;
+    NET_BUF_SIZE   len_data;
+#endif
+    CPU_INT08U    *p_data_dest;
+    CPU_INT08U    *p_data_src;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE BUF PTRS ----------------- */
+    if (p_buf_dest == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+    if (p_buf_src  == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+                                                                /* ---------------- VALIDATE BUF TYPES ---------------- */
+    p_buf_hdr_dest = &p_buf_dest->Hdr;
+    switch (p_buf_hdr_dest->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+    p_buf_hdr_src = &p_buf_src->Hdr;
+    switch (p_buf_hdr_src->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+#endif
+
+
+                                                                /* --------------- VALIDATE IX's/SIZES ---------------- */
+#if 0                                                           /* See Note #3.                                         */
+                                                                /* If req'd ix's < 0,    rtn err.                       */
+    if (ix_dest < 0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.IxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+    if (ix_src  < 0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.IxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+    if (len < 0) {                                              /* If req'd len  < 0,    rtn err.                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.LenCtr);
+       *p_err = NET_BUF_ERR_INVALID_LEN;
+        return;
+    }
+#endif
+    if (len < 1) {                                              /* If req'd len  = 0,    rtn null copy (see Note #2).   */
+       *p_err = NET_BUF_ERR_NONE;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* If req'd ix's > size, rtn err.                       */
+    if (ix_dest >= p_buf_hdr_dest->Size) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.IxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+    if (ix_src  >= p_buf_hdr_src->Size ) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.IxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+                                                                /* If req'd lens > size, rtn err.                       */
+    len_data = ix_dest + len;
+    if (len_data > p_buf_hdr_dest->Size) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.LenCtr);
+       *p_err = NET_BUF_ERR_INVALID_LEN;
+        return;
+    }
+    len_data = ix_src  + len;
+    if (len_data > p_buf_hdr_src->Size ) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.LenCtr);
+       *p_err = NET_BUF_ERR_INVALID_LEN;
+        return;
+    }
+#endif
+
+                                                                /* ------------------ COPY BUF DATA ------------------- */
+                                                                /* Req'd ix's & len within buf DATA areas; ...          */
+    p_data_dest = &p_buf_dest->DataPtr[ix_dest];                /* ... set ptrs to ix into buf DATA areas, ...          */
+    p_data_src  = &p_buf_src ->DataPtr[ix_src ];
+    Mem_Copy((void     *)p_data_dest,                           /* ... & copy len nbr DATA buf octets      ...          */
+             (void     *)p_data_src,                            /* ... from src to dest buf.                            */
+             (CPU_SIZE_T)len);
+
+   *p_err = NET_BUF_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetBuf_IsUsed()
+*
+* Description : Validate buffer in use.
+*
+* Argument(s) : p_buf       Pointer to object to validate as a network buffer in use.
+*
+* Return(s)   : DEF_YES, buffer   valid &      in use.
+*
+*               DEF_NO,  buffer invalid or NOT in use.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetBuf_IsUsed() MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetBuf_IsUsed (NET_BUF  *p_buf)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    CPU_BOOLEAN   used;
+
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        return  (DEF_NO);
+    }
+                                                                /* ------------------ VALIDATE TYPE ------------------- */
+    p_buf_hdr = &p_buf->Hdr;
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        default:
+             return (DEF_NO);
+    }
+
+                                                                /* ---------------- VALIDATE BUF USED ----------------- */
+    used =  DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_USED);
+
+    return (used);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetBuf_PoolStatGet()
+*
+* Description : Get network buffer statistics pool.
+*
+* Argument(s) : if_nbr      Interface number to get network buffer statistics.
+*
+* Return(s)   : Network buffer statistics pool, if NO error(s).
+*
+*               NULL           statistics pool, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetBuf_PoolStatGet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetBuf_PoolStatGet() blocked until network initialization completes.
+*
+*               (3) Return values MUST be initialized PRIOR to all other validation or function handling
+*                   in case of any error(s).
+*
+*               (4) 'NetBufStatPool's MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+NET_STAT_POOL  NetBuf_PoolStatGet (NET_IF_NBR  if_nbr)
+{
+    NET_BUF_POOLS  *ppool;
+    NET_STAT_POOL   stat_pool;
+    NET_ERR         err;
+    CPU_SR_ALLOC();
+
+
+    NetStat_PoolClr(&stat_pool, &err);                          /* Init rtn pool stat for err (see Note #3).            */
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetBuf_PoolStatGet, &err);   /* See Note #1b.                                        */
+    if (err != NET_ERR_NONE) {
+        return (stat_pool);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {
+        goto exit_release;
+    }
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        goto exit_release;
+    }
+#endif
+
+                                                                /* -------------- GET NET BUF STAT POOL --------------- */
+    ppool     = &NetBuf_PoolsTbl[if_nbr];
+    CPU_CRITICAL_ENTER();
+    stat_pool =  ppool->NetBufStatPool;
+    CPU_CRITICAL_EXIT();
+
+    goto exit_release;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+    return (stat_pool);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetBuf_PoolStatResetMaxUsed()
+*
+* Description : Reset network buffer statistics pool's maximum number of entries used.
+*
+* Argument(s) : if_nbr      Interface number to reset network buffer statistics.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetBuf_PoolStatResetMaxUsed() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetBuf_PoolStatResetMaxUsed() blocked until network initialization completes.
+*
+*                   (a) However, since 'NetBufStatPool's are reset when network initialization
+*                       completes; NO error is returned.
+*********************************************************************************************************
+*/
+
+void  NetBuf_PoolStatResetMaxUsed (NET_IF_NBR  if_nbr)
+{
+    NET_BUF_POOLS  *ppool;
+    NET_ERR         err;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetBuf_PoolStatResetMaxUsed, &err);
+    if (err != NET_ERR_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        goto exit_release;                                      /* ... rtn w/o err (see Note #2a).                      */
+    }
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        goto exit_release;
+    }
+#endif
+
+                                                                /* ------------- RESET NET BUF STAT POOL -------------- */
+    ppool = &NetBuf_PoolsTbl[if_nbr];
+    NetStat_PoolResetUsedMax(&ppool->NetBufStatPool, &err);
+
+    goto exit_release;
+
+exit_release:
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetBuf_RxLargePoolStatGet()
+*
+* Description : Get large receive network buffer statistics pool.
+*
+* Argument(s) : if_nbr      Interface number to get network buffer statistics.
+*
+* Return(s)   : Large receive network buffer statistics pool, if NO error(s).
+*
+*               NULL                         statistics pool, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetBuf_RxLargePoolStatGet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetBuf_RxLargePoolStatGet() blocked until network initialization completes.
+*
+*               (3) Return values MUST be initialized PRIOR to all other validation or function handling
+*                   in case of any error(s).
+*
+*               (4) 'RxBufLargeStatPool's MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+NET_STAT_POOL  NetBuf_RxLargePoolStatGet (NET_IF_NBR  if_nbr)
+{
+    NET_BUF_POOLS  *ppool;
+    NET_STAT_POOL   stat_pool;
+    NET_ERR         err;
+    CPU_SR_ALLOC();
+
+
+    NetStat_PoolClr(&stat_pool, &err);                          /* Init rtn pool stat for err (see Note #3).            */
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetBuf_RxLargePoolStatGet, &err);
+    if (err != NET_ERR_NONE) {
+        return (stat_pool);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {
+        goto exit_release;
+    }
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        goto exit_release;
+    }
+#endif
+
+                                                                /* -------------- GET NET BUF STAT POOL --------------- */
+    ppool     = &NetBuf_PoolsTbl[if_nbr];
+    CPU_CRITICAL_ENTER();
+    stat_pool =  ppool->RxBufLargeStatPool;
+    CPU_CRITICAL_EXIT();
+
+    goto exit_release;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+    return (stat_pool);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetBuf_RxLargePoolStatResetMaxUsed()
+*
+* Description : Reset large receive network buffer statistics pool's maximum number of entries used.
+*
+* Argument(s) : if_nbr      Interface number to reset network buffer statistics.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetBuf_RxLargePoolStatResetMaxUsed() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetBuf_RxLargePoolStatResetMaxUsed() blocked until network initialization completes.
+*
+*                   (a) However, since 'RxBufLargeStatPool's are reset when network initialization
+*                       completes; NO error is returned.
+*********************************************************************************************************
+*/
+
+void  NetBuf_RxLargePoolStatResetMaxUsed (NET_IF_NBR  if_nbr)
+{
+    NET_BUF_POOLS  *ppool;
+    NET_ERR         err;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetBuf_RxLargePoolStatResetMaxUsed, &err);
+    if (err != NET_ERR_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        goto exit_release;                                      /* ... rtn w/o err (see Note #2a).                      */
+    }
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        goto exit_release;
+    }
+#endif
+
+                                                                /* ------------- RESET NET BUF STAT POOL -------------- */
+    ppool = &NetBuf_PoolsTbl[if_nbr];
+    NetStat_PoolResetUsedMax(&ppool->RxBufLargeStatPool, &err);
+
+    goto exit_release;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetBuf_TxLargePoolStatGet()
+*
+* Description : Get large transmit network buffer statistics pool.
+*
+* Argument(s) : if_nbr      Interface number to get network buffer statistics.
+*
+* Return(s)   : Large transmit network buffer statistics pool, if NO error(s).
+*
+*               NULL                          statistics pool, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetBuf_TxLargePoolStatGet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetBuf_TxLargePoolStatGet() blocked until network initialization completes.
+*
+*               (3) Return values MUST be initialized PRIOR to all other validation or function handling
+*                   in case of any error(s).
+*
+*               (4) 'TxBufLargeStatPool's MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+NET_STAT_POOL  NetBuf_TxLargePoolStatGet (NET_IF_NBR  if_nbr)
+{
+    NET_BUF_POOLS  *ppool;
+    NET_STAT_POOL   stat_pool;
+    NET_ERR         err;
+    CPU_SR_ALLOC();
+
+
+    NetStat_PoolClr(&stat_pool, &err);                          /* Init rtn pool stat for err (see Note #3).            */
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetBuf_TxLargePoolStatGet, &err);
+    if (err != NET_ERR_NONE) {
+        return (stat_pool);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {
+        goto exit_release;
+    }
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        goto exit_release;
+    }
+#endif
+
+                                                                /* -------------- GET NET BUF STAT POOL --------------- */
+    ppool     = &NetBuf_PoolsTbl[if_nbr];
+    CPU_CRITICAL_ENTER();
+    stat_pool =  ppool->TxBufLargeStatPool;
+    CPU_CRITICAL_EXIT();
+
+    goto exit_release;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+    return (stat_pool);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetBuf_TxLargePoolStatResetMaxUsed()
+*
+* Description : Reset large receive network buffer statistics pool's maximum number of entries used.
+*
+* Argument(s) : if_nbr      Interface number to reset network buffer statistics.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetBuf_TxLargePoolStatResetMaxUsed() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetBuf_TxLargePoolStatResetMaxUsed() blocked until network initialization completes.
+*
+*                   (a) However, since 'TxBufLargeStatPool's are reset when network initialization
+*                       completes; NO error is returned.
+*********************************************************************************************************
+*/
+
+void  NetBuf_TxLargePoolStatResetMaxUsed (NET_IF_NBR  if_nbr)
+{
+    NET_BUF_POOLS  *ppool;
+    NET_ERR         err;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetBuf_TxLargePoolStatResetMaxUsed, &err);
+    if (err != NET_ERR_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        goto exit_release;                                            /* ... rtn w/o err (see Note #2a).                      */
+    }
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        goto exit_release;
+    }
+#endif
+
+                                                                /* ------------- RESET NET BUF STAT POOL -------------- */
+    ppool = &NetBuf_PoolsTbl[if_nbr];
+    NetStat_PoolResetUsedMax(&ppool->TxBufLargeStatPool, &err);
+
+    goto exit_release;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetBuf_TxSmallPoolStatGet()
+*
+* Description : Get small transmit network buffer statistics pool.
+*
+* Argument(s) : if_nbr      Interface number to get network buffer statistics.
+*
+* Return(s)   : Small transmit network buffer statistics pool, if NO error(s).
+*
+*               NULL                          statistics pool, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetBuf_TxSmallPoolStatGet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetBuf_TxSmallPoolStatGet() blocked until network initialization completes.
+*
+*               (3) Return values MUST be initialized PRIOR to all other validation or function handling
+*                   in case of any error(s).
+*
+*               (4) 'TxBufSmallStatPool's MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+NET_STAT_POOL  NetBuf_TxSmallPoolStatGet (NET_IF_NBR  if_nbr)
+{
+    NET_BUF_POOLS  *ppool;
+    NET_STAT_POOL   stat_pool;
+    NET_ERR         err;
+    CPU_SR_ALLOC();
+
+
+    NetStat_PoolClr(&stat_pool, &err);                          /* Init rtn pool stat for err (see Note #3).            */
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetBuf_TxSmallPoolStatGet, &err);
+    if (err != NET_ERR_NONE) {
+        return (stat_pool);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {
+        goto exit_release;
+    }
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        goto exit_release;
+    }
+#endif
+
+                                                                /* -------------- GET NET BUF STAT POOL --------------- */
+    ppool     = &NetBuf_PoolsTbl[if_nbr];
+    CPU_CRITICAL_ENTER();
+    stat_pool =  ppool->TxBufSmallStatPool;
+    CPU_CRITICAL_EXIT();
+
+    goto exit_release;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+    return (stat_pool);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetBuf_TxSmallPoolStatResetMaxUsed()
+*
+* Description : Reset small transmit network buffer statistics pool's maximum number of entries used.
+*
+* Argument(s) : if_nbr      Interface number to reset network buffer statistics.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetBuf_TxSmallPoolStatResetMaxUsed() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock.
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) NetBuf_TxSmallPoolStatResetMaxUsed() blocked until network initialization completes.
+*
+*                   (a) However, since 'TxBufSmallStatPool's are reset when network initialization
+*                       completes; NO error is returned.
+*********************************************************************************************************
+*/
+
+void  NetBuf_TxSmallPoolStatResetMaxUsed (NET_IF_NBR  if_nbr)
+{
+    NET_BUF_POOLS  *ppool;
+    NET_ERR         err;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #1b.                                        */
+    Net_GlobalLockAcquire((void *)&NetBuf_TxSmallPoolStatResetMaxUsed, &err);
+    if (err != NET_ERR_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        goto exit_release;                                      /* ... rtn w/o err (see Note #2a).                      */
+    }
+                                                                /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        goto exit_release;
+    }
+#endif
+
+                                                                /* ------------- RESET NET BUF STAT POOL -------------- */
+    ppool = &NetBuf_PoolsTbl[if_nbr];
+    NetStat_PoolResetUsedMax(&ppool->TxBufSmallStatPool, &err);
+
+    goto exit_release;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        NetBuf_FreeHandler()
+*
+* Description : (1) Free a network buffer :
+*
+*                   (a) Configure buffer free by buffer type
+*                   (b) Unlink    buffer from network layer(s)                          See Note #3
+*                   (c) Clear     buffer controls
+*                   (d) Free      buffer & data area back to buffer pools
+*                   (e) Update    buffer pool statistics
+*
+*
+* Argument(s) : p_buf       Pointer to a network buffer.
+*               ----        Argument checked in NetBuf_Free().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetBuf_Free().
+*
+* Note(s)     : (2) #### To prevent freeing a buffer already freed via auxiliary pointer(s),
+*                   NetBuf_FreeHandler() checks the buffer's 'USED' flag BEFORE freeing the buffer.
+*
+*                   This prevention is only best-effort since any invalid duplicate  buffer frees MAY be
+*                   asynchronous to potentially valid buffer gets.  Thus the invalid buffer free(s) MAY
+*                   corrupt the buffer's valid operation(s).
+*
+*                   However, since the primary tasks of the network protocol suite are prevented from
+*                   running concurrently (see 'net.h  Note #3'), it is NOT necessary to protect network
+*                   buffer resources from possible corruption since no asynchronous access from other
+*                   network tasks is possible.
+*
+*               (3) If a network buffer's unlink function is available, it is assumed that the function
+*                   correctly unlinks the network buffer from any other network layer(s).
+*********************************************************************************************************
+*/
+
+static  void  NetBuf_FreeHandler (NET_BUF  *p_buf)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN     used;
+#endif
+    NET_IF_NBR      if_nbr;
+    NET_BUF_HDR    *p_buf_hdr;
+    NET_BUF_POOLS  *ppool;
+    NET_STAT_POOL  *pstat_pool;
+    MEM_POOL       *pmem_pool;
+    NET_BUF_FNCT    unlink_fnct;
+    NET_ERR         err;
+    LIB_ERR         err_lib;
+
+
+    p_buf_hdr = &p_buf->Hdr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE BUF USED ----------------- */
+    used = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_USED);
+    if (used != DEF_YES) {                                      /* If buf NOT used, ...                                 */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Buf.NotUsedCtr);
+        return;                                                 /* ... rtn but do NOT free (see Note #2).               */
+    }
+#endif
+
+    if_nbr = p_buf_hdr->IF_Nbr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* --------------- VALIDATE NET IF NBR ---------------- */
+   (void)NetIF_IsValidHandler(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        return;
+    }
+#endif
+
+
+                                                                /* ------------------- CFG BUF FREE ------------------- */
+    ppool = &NetBuf_PoolsTbl[if_nbr];
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             pmem_pool  = &ppool->RxBufLargePool;
+             pstat_pool = &ppool->RxBufLargeStatPool;
+             break;
+
+
+        case NET_BUF_TYPE_TX_LARGE:
+             pmem_pool  = &ppool->TxBufLargePool;
+             pstat_pool = &ppool->TxBufLargeStatPool;
+             break;
+
+
+        case NET_BUF_TYPE_TX_SMALL:
+             pmem_pool  = &ppool->TxBufSmallPool;
+             pstat_pool = &ppool->TxBufSmallStatPool;
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        default:
+             NetBuf_Discard((NET_IF_NBR     )if_nbr,
+                            (NET_BUF       *)p_buf,
+                            (NET_STAT_POOL *)0);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+             return;
+    }
+
+
+                                                                /* -------------------- UNLINK BUF -------------------- */
+    unlink_fnct = p_buf_hdr->UnlinkFnctPtr;
+    if (unlink_fnct != (NET_BUF_FNCT)0) {                       /* If unlink fnct avail, ..                             */
+        unlink_fnct(p_buf);                                     /* .. unlink buf from other layer(s) [see Note #3].     */
+    }
+
+
+                                                                /* ---------------------- CLR BUF --------------------- */
+    DEF_BIT_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_USED);           /* Set buf as NOT used.                                 */
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+    NetBuf_ClrHdr(p_buf_hdr);
+#endif
+
+
+                                                                /* -------------- FREE NET BUF DATA AREA -------------- */
+    Mem_PoolBlkFree((MEM_POOL *) pmem_pool,
+                    (void     *) p_buf->DataPtr,
+                    (LIB_ERR  *)&err_lib);
+
+    if (err_lib == LIB_MEM_ERR_NONE) {                          /* If buf data area freed to pool, ...                  */
+        NetStat_PoolEntryUsedDec(pstat_pool, &err);             /* ... update buf pool stats;      ...                  */
+    } else {                                                    /* ... else discard buf data area.                      */
+        NetBuf_Discard((NET_IF_NBR     )if_nbr,
+                       (void          *)p_buf->DataPtr,
+                       (NET_STAT_POOL *)pstat_pool);
+    }
+
+                                                                /* ------------------- FREE NET BUF ------------------- */
+    Mem_PoolBlkFree((MEM_POOL *)&ppool->NetBufPool,
+                    (void     *) p_buf,
+                    (LIB_ERR  *)&err_lib);
+
+    if (err_lib == LIB_MEM_ERR_NONE) {                          /* If buf freed to pool,      ...                       */
+        NetStat_PoolEntryUsedDec(&ppool->NetBufStatPool, &err); /* ... update buf pool stats; ...                       */
+    } else {                                                    /* ... else discard buf.                                */
+        NetBuf_Discard((NET_IF_NBR     ) if_nbr,
+                       (void          *) p_buf,
+                       (NET_STAT_POOL *)&ppool->NetBufStatPool);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetBuf_ClrHdr()
+*
+* Description : Clear network buffer header controls.
+*
+* Argument(s) : p_buf_hdr   Pointer to network buffer header.
+*               --------    Argument validated in NetBuf_Get(),
+*                                                 NetBuf_FreeHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetBuf_Get(),
+*               NetBuf_FreeHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetBuf_ClrHdr (NET_BUF_HDR  *p_buf_hdr)
+{
+    p_buf_hdr->Type                     =  NET_BUF_TYPE_NONE;
+    p_buf_hdr->Size                     =  0u;
+    p_buf_hdr->Flags                    =  NET_BUF_FLAG_NONE;
+
+    p_buf_hdr->RefCtr                   =  0u;
+    p_buf_hdr->ID                       =  NET_BUF_ID_NONE;
+
+    p_buf_hdr->IF_Nbr                   =  NET_IF_NBR_NONE;
+    p_buf_hdr->IF_NbrTx                 =  NET_IF_NBR_NONE;
+
+    p_buf_hdr->PrevPrimListPtr          = (NET_BUF *)0;
+    p_buf_hdr->NextPrimListPtr          = (NET_BUF *)0;
+    p_buf_hdr->PrevSecListPtr           = (NET_BUF *)0;
+    p_buf_hdr->NextSecListPtr           = (NET_BUF *)0;
+    p_buf_hdr->PrevTxListPtr            = (NET_BUF *)0;
+    p_buf_hdr->NextTxListPtr            = (NET_BUF *)0;
+    p_buf_hdr->PrevBufPtr               = (NET_BUF *)0;
+    p_buf_hdr->NextBufPtr               = (NET_BUF *)0;
+
+    p_buf_hdr->TmrPtr                   = (NET_TMR *)0;
+
+    p_buf_hdr->UnlinkFnctPtr            = (NET_BUF_FNCT)0;
+    p_buf_hdr->UnlinkObjPtr             = (void       *)0;
+
+    p_buf_hdr->ProtocolHdrType          =  NET_PROTOCOL_TYPE_NONE;
+    p_buf_hdr->ProtocolHdrTypeIF        =  NET_PROTOCOL_TYPE_NONE;
+    p_buf_hdr->ProtocolHdrTypeIF_Sub    =  NET_PROTOCOL_TYPE_NONE;
+    p_buf_hdr->ProtocolHdrTypeNet       =  NET_PROTOCOL_TYPE_NONE;
+    p_buf_hdr->ProtocolHdrTypeNetSub    =  NET_PROTOCOL_TYPE_NONE;
+    p_buf_hdr->ProtocolHdrTypeTransport =  NET_PROTOCOL_TYPE_NONE;
+
+    p_buf_hdr->IF_HdrIx                 =  NET_BUF_IX_NONE;
+    p_buf_hdr->IF_HdrLen                =  0u;
+#ifdef  NET_ARP_MODULE_EN
+    p_buf_hdr->ARP_MsgIx                =  NET_BUF_IX_NONE;
+    p_buf_hdr->ARP_MsgLen               =  0u;
+#endif
+    p_buf_hdr->IP_HdrIx                 =  NET_BUF_IX_NONE;
+    p_buf_hdr->IP_HdrLen                =  0u;
+
+    p_buf_hdr->ICMP_MsgIx               =  NET_BUF_IX_NONE;
+    p_buf_hdr->ICMP_MsgLen              =  0u;
+    p_buf_hdr->ICMP_HdrLen              =  0u;
+#ifdef  NET_IGMP_MODULE_EN
+    p_buf_hdr->IGMP_MsgIx               =  NET_BUF_IX_NONE;
+    p_buf_hdr->IGMP_MsgLen              =  0u;
+#endif
+    p_buf_hdr->TransportHdrIx           =  NET_BUF_IX_NONE;
+    p_buf_hdr->TransportHdrLen          =  0u;
+    p_buf_hdr->TransportTotLen          =  0u;
+    p_buf_hdr->TransportDataLen         =  0u;
+    p_buf_hdr->DataIx                   =  NET_BUF_IX_NONE;
+    p_buf_hdr->DataLen                  =  0u;
+    p_buf_hdr->TotLen                   =  0u;
+
+#ifdef  NET_ARP_MODULE_EN
+    p_buf_hdr->ARP_AddrHW_Ptr           = (CPU_INT08U *)0;
+    p_buf_hdr->ARP_AddrProtocolPtr      = (CPU_INT08U *)0;
+#endif
+
+    p_buf_hdr->IP_TotLen                =  0u;
+    p_buf_hdr->IP_DataLen               =  0u;
+    p_buf_hdr->IP_DatagramLen           =  0u;
+    p_buf_hdr->IP_FragSizeTot           =  NET_IP_FRAG_SIZE_NONE;
+    p_buf_hdr->IP_FragSizeCur           =  0u;
+
+#ifdef  NET_IPv4_MODULE_EN
+    p_buf_hdr->IP_Flags_FragOffset      =  NET_IPv4_HDR_FLAG_NONE | NET_IPv4_HDR_FRAG_OFFSET_NONE;
+    p_buf_hdr->IP_ID                    =  NET_IPv4_ID_NONE;
+    p_buf_hdr->IP_AddrSrc               = (NET_IPv4_ADDR)NET_IPv4_ADDR_NONE;
+    p_buf_hdr->IP_AddrDest              = (NET_IPv4_ADDR)NET_IPv4_ADDR_NONE;
+    p_buf_hdr->IP_AddrNextRoute         = (NET_IPv4_ADDR)NET_IPv4_ADDR_NONE;
+    p_buf_hdr->IP_AddrNextRouteNetOrder = (NET_IPv4_ADDR)NET_UTIL_HOST_TO_NET_32(NET_IPv4_ADDR_NONE);
+    p_buf_hdr->IP_OptPtr                = (NET_BUF   *)0;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    p_buf_hdr->IPv6_Flags_FragOffset    = NET_IPv6_FRAG_NONE;
+    Mem_Clr(&p_buf_hdr->IPv6_AddrSrc,               NET_IPv6_ADDR_SIZE);
+    Mem_Clr(&p_buf_hdr->IPv6_AddrDest,              NET_IPv6_ADDR_SIZE);
+    Mem_Clr(&p_buf_hdr->IPv6_AddrNextRoute,         NET_IPv6_ADDR_SIZE);
+    p_buf_hdr->IP_HdrIx                 =  NET_BUF_IX_NONE;
+    p_buf_hdr->IPv6_ExtHdrLen           =  0u;
+    p_buf_hdr->IPv6_HopByHopHdrIx       =  NET_BUF_IX_NONE;
+    p_buf_hdr->IPv6_RoutingHdrIx        =  NET_BUF_IX_NONE;
+    p_buf_hdr->IPv6_FragHdrIx           =  NET_BUF_IX_NONE;
+    p_buf_hdr->IPv6_ESP_HdrIx           =  NET_BUF_IX_NONE;
+    p_buf_hdr->IPv6_AuthHdrIx           =  NET_BUF_IX_NONE;
+    p_buf_hdr->IPv6_DestHdrIx           =  NET_BUF_IX_NONE;
+    p_buf_hdr->IPv6_MobilityHdrIx       =  NET_BUF_IX_NONE;
+    p_buf_hdr->IPv6_ID                  =  0u;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+    p_buf_hdr->NDP_AddrHW_Ptr           =  DEF_NULL;
+    p_buf_hdr->NDP_AddrProtocolPtr      =  DEF_NULL;
+#endif
+
+    p_buf_hdr->TransportPortSrc         =  NET_PORT_NBR_NONE;
+    p_buf_hdr->TransportPortDest        =  NET_PORT_NBR_NONE;
+
+#ifdef  NET_TCP_MODULE_EN
+    p_buf_hdr->TCP_HdrLen_Flags         =  NET_TCP_HDR_LEN_NONE | NET_TCP_HDR_FLAG_NONE;
+    p_buf_hdr->TCP_SegLenInit           =  0u;
+    p_buf_hdr->TCP_SegLenLast           =  0u;
+    p_buf_hdr->TCP_SegLen               =  0u;
+    p_buf_hdr->TCP_SegLenData           =  0u;
+    p_buf_hdr->TCP_SegReTxCtr           =  0u;
+    p_buf_hdr->TCP_SegSync              =  DEF_NO;
+    p_buf_hdr->TCP_SegClose             =  DEF_NO;
+    p_buf_hdr->TCP_SegReset             =  DEF_NO;
+    p_buf_hdr->TCP_SegAck               =  DEF_NO;
+    p_buf_hdr->TCP_SegAckTxd            =  DEF_NO;
+    p_buf_hdr->TCP_SegAckTxReqCode      =  NET_TCP_CONN_TX_ACK_NONE;
+    p_buf_hdr->TCP_SeqNbrInit           =  NET_TCP_SEQ_NBR_NONE;
+    p_buf_hdr->TCP_SeqNbrLast           =  NET_TCP_SEQ_NBR_NONE;
+    p_buf_hdr->TCP_SeqNbr               =  NET_TCP_SEQ_NBR_NONE;
+    p_buf_hdr->TCP_AckNbr               =  NET_TCP_ACK_NBR_NONE;
+    p_buf_hdr->TCP_AckNbrLast           =  NET_TCP_ACK_NBR_NONE;
+    p_buf_hdr->TCP_MaxSegSize           =  NET_TCP_MAX_SEG_SIZE_NONE;
+    p_buf_hdr->TCP_WinSize              =  NET_TCP_WIN_SIZE_NONE;
+    p_buf_hdr->TCP_WinSizeLast          =  NET_TCP_WIN_SIZE_NONE;
+    p_buf_hdr->TCP_RTT_TS_Rxd_ms        =  NET_TCP_TX_RTT_TS_NONE;
+    p_buf_hdr->TCP_RTT_TS_Txd_ms        =  NET_TCP_TX_RTT_TS_NONE;
+    p_buf_hdr->TCP_Flags                =  NET_TCP_FLAG_NONE;
+#endif
+
+
+    p_buf_hdr->Conn_ID                  =  NET_CONN_ID_NONE;
+    p_buf_hdr->Conn_ID_Transport        =  NET_CONN_ID_NONE;
+    p_buf_hdr->Conn_ID_App              =  NET_CONN_ID_NONE;
+    p_buf_hdr->ConnType                 =  NET_CONN_TYPE_CONN_NONE;
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetBuf_Discard()
+*
+* Description : (1) Discard an invalid/corrupted network buffer or network buffer data area from
+*                       available buffer pools :
+*
+*                   (a) Discard buffer from available buffer pool                       See Note #2
+*                   (b) Update  buffer pool statistics                                  See Note #3
+*
+*               (2) Assumes buffer is invalid/corrupt & MUST be removed.  Buffer removed simply by
+*                   NOT returning the buffer back to any buffer pool.
+*
+*
+* Argument(s) : if_nbr      Interface number to discard   network buffer or network buffer data area.
+*               ------      Argument checked in NetBuf_Get(),
+*                                               NetBuf_FreeBufDataAreaRx(),
+*                                               NetBuf_FreeHandler().
+*
+*               p_buf       Pointer to an invalid/corrupt network buffer or network buffer data area.
+*
+*               pstat_pool  Pointer to a network buffer statistics pool.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetBuf_Get(),
+*               NetBuf_FreeBufDataAreaRx(),
+*               NetBuf_FreeHandler().
+*
+* Note(s)     : (3) (a) If the lost network buffer 'Type' is   known, then the unrecoverable buffer will
+*                       be removed from the interface's appropriate buffer statistic pools.
+*
+*                   (b) If the lost network buffer 'Type' is unknown, then the buffer pool that lost the
+*                       network buffer can NOT be determined.  Instead, a NULL statistics pool is passed
+*                       & the unrecoverable buffer will remain unaccounted for in one of the interface's
+*                       buffer pools.
+*********************************************************************************************************
+*/
+
+static  void  NetBuf_Discard (NET_IF_NBR      if_nbr,
+                              void           *p_buf,
+                              NET_STAT_POOL  *pstat_pool)
+{
+    NET_ERR  err;
+
+                                                                /* ------------------- DISCARD BUF -------------------- */
+   (void)&if_nbr;                                               /* Prevent possible 'variable unused' warnings.         */
+   (void)&p_buf;                                                 /* See Note #2.                                         */
+
+                                                                /* --------------- UPDATE DISCARD STATS --------------- */
+    if (pstat_pool != (NET_STAT_POOL *)0) {
+        NetStat_PoolEntryLostInc(pstat_pool, &err);             /* See Note #3a.                                        */
+    }
+
+    NET_CTR_ERR_INC(Net_ErrCtrs.IFs.IF[if_nbr].BufLostCtr);
+}
+
+#endif  /* NET_BUF_MODULE_EN */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_buf.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_buf.h
new file mode 100644
index 0000000..bae0c24
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_buf.h
@@ -0,0 +1,828 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      NETWORK BUFFER MANAGEMENT
+*
+* Filename      : net_buf.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 EHS
+*                 FGK
+*                 SR
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  "net_type.h"
+#include  "net_stat.h"
+#include  "net_tmr.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_BUF_MODULE_PRESENT
+#define  NET_BUF_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_BUF_ID_NONE                                   0u
+#define  NET_BUF_ID_INIT                     NET_BUF_ID_NONE
+
+
+/*
+*********************************************************************************************************
+*                                     NETWORK BUFFER FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET BUF FLAGS ------------------ */
+#define  NET_BUF_FLAG_NONE                        DEF_BIT_NONE
+#define  NET_BUF_FLAG_USED                        DEF_BIT_00    /* Buf cur used; i.e. NOT in free buf pool.             */
+#define  NET_BUF_FLAG_CLR_MEM                     DEF_BIT_01    /* Buf mem clr'd.                                       */
+
+#define  NET_BUF_FLAG_RX_BROADCAST                DEF_BIT_04    /* Indicates pkts rx'd via  broadcast.                  */
+#define  NET_BUF_FLAG_RX_MULTICAST                DEF_BIT_05    /* Indicates pkts rx'd via  multicast.                  */
+#define  NET_BUF_FLAG_RX_REMOTE                   DEF_BIT_06    /* Indicates pkts rx'd from remote host.                */
+#define  NET_BUF_FLAG_RX_UDP_CHK_SUM_VALID        DEF_BIT_07    /* Indicates UDP  rx chk sum valid.                     */
+
+#define  NET_BUF_FLAG_TX_BROADCAST                DEF_BIT_12    /* Indicates pkts to tx via broadcast.                  */
+#define  NET_BUF_FLAG_TX_MULTICAST                DEF_BIT_13    /* Indicates pkts to tx via multicast.                  */
+
+#define  NET_BUF_FLAG_TX_LOCK                     DEF_BIT_14    /* Protects  pkts from concurrent dev/hw tx.            */
+
+#define  NET_BUF_FLAG_IPv6_FRAME                  DEF_BIT_15    /* Indicates IPv6 frame.                                */
+
+
+/*
+*********************************************************************************************************
+*                                 NETWORK BUFFER INDEX & SIZE DEFINES
+*
+* Note(s) : (1) (a) (1) NET_BUF_DATA_PROTOCOL_HDR_SIZE_MIN's  value is pre-#define'd in 'net_cfg_net.h' :
+*
+*                       (A) NET_BUF_DATA_PROTOCOL_HDR_SIZE_MIN's ideal #define'tion :
+*
+*                               (1) min(IF Headers)  +  min(Protocol Headers)
+*
+*                       (B) NET_BUF_DATA_PROTOCOL_HDR_SIZE_MIN  #define'd with hard-coded knowledge that IF &/or
+*                           ARP, IP/ICMP, IP/IGMP, IP/UDP headers have the smallest combined minimum size of all
+*                           the protocol headers :
+*
+*                             ARP Hdr   28       IP Hdr   20      IP Hdr   20      IP Hdr   20     IP Hdr   20
+*                                              ICMP Hdr    8    IGMP Hdr    8     UDP Hdr    8    TCP Hdr   20
+*                             ------------     -------------    -------------     ------------    ------------
+*                             Total     28     Total      28    Total      28     Total     28    Total     40
+*
+*
+*                   (2) NET_BUF_DATA_PROTOCOL_HDR_SIZE_MAX's  value is pre-#define'd in 'net_cfg_net.h' :
+*
+*                       (A) NET_BUF_DATA_PROTOCOL_HDR_SIZE_MAX's ideal #define'tion :
+*
+*                               (1) max(IF Headers)  +  max(Protocol Headers)
+*
+*                       (B) NET_BUF_DATA_PROTOCOL_HDR_SIZE_MAX  #define'd with hard-coded knowledge that IF, IP,
+*                           & TCP headers have the largest combined maximum size of all the protocol headers :
+*
+*                             ARP Hdr   68       IP Hdr   60      IP Hdr   60      IP Hdr   60     IP Hdr   60
+*                                              ICMP Hdr   20    IGMP Hdr    8     UDP Hdr    8    TCP Hdr   60
+*                             ------------     -------------    -------------     ------------    ------------
+*                             Total     68     Total      80    Total      68     Total     68    Total    120
+*
+*
+*               (b) (1) Assumes minimum ARP header size of 28 octets based on Ethernet hardware & IP protocol
+*                       addresses.  Actual ARP header size depends on actual hardware & protocol address lengths.
+*
+*                   (2) Assumes maximum ARP header size of 68 octets based on maximum length hardware & protocol
+*                       addresses.  Actual ARP header size depends on actual hardware & protocol address lengths.
+*
+*                   See 'net_arp.h  Note #2' for supported hardware & protocol types.
+*
+*               (c) The minimum network buffer size MUST be configured greater than the maximum network packet
+*                   header sizes so that the first of any fragmented packets always contains a complete receipt
+*                   of all frame & network packet headers.
+*
+*           (2) (a) Since network data value macro's appropriately convert data values from any CPU addresses,
+*                   word-aligned or not; network receive & transmit packets are NOT required to ensure that
+*                   network packet headers (ARP/IP/UDP/TCP/etc.) & header members will locate on CPU word-
+*                   aligned addresses.  Therefore, network receive & transmit packets are NOT required to
+*                   start on any specific network buffer indices.
+*
+*                   See also 'net_util.h  NETWORK DATA VALUE MACRO'S  Note #2b'.
+*
+*               (b) However, many processors & network devices may be more efficient & may even REQUIRE that
+*                   memory transfers occur on CPU word-aligned addresses or on device-specific word-aligned
+*                   addresses [e.g. processors or devices with direct memory access (DMA) capability].
+*                   Therefore, network receive & transmit packets SHOULD start at the device layer on CPU
+*                   word-aligned or device-specific word-aligned indices(/addresses) in network buffer data
+*                   areas.
+*
+*                   (1) (A) Receive packet   index SHOULD be configured to ensure that the device layer receive
+*                           packet is word-aligned, either CPU word-aligned or device-specific word-aligned.
+*
+*                       (B) Network transmit index SHOULD be configured to ensure that the device layer transmit
+*                           packet is word-aligned, either CPU word-aligned or device-specific word-aligned.
+*
+*                           (1) However, this assumes that a single data index may be configured that can handle
+*                               all possible combinations of network packet header lengths while still ensuring
+*                               that each device's transmit packets are word-aligned.
+*
+*                               This assumption is valid if & only if all combinations of network packet header
+*                               lengths are multiples of the CPU's data word size &/or specific device's word
+*                               aligment.
+*
+*                   (2) These data indices also assume that each interface's network buffer data area(s) are
+*                       configured to be aligned to at least either the CPU's data word size &/or the device-
+*                       specific word alignment.
+*
+*                   See also 'net_dev_cfg.c  EXAMPLE NETWORK DEVICE CONFIGURATION  Note #4'
+*                          & 'lib_mem.h  MEMORY DATA VALUE MACRO'S  Note #1a'.
+*********************************************************************************************************
+*/
+
+#if  (defined(NET_IPv6_MODULE_EN))
+    #define  NET_BUF_IP_HDR_SIZE    NET_IPv6_HDR_SIZE
+
+#elif (defined  NET_IPv4_MODULE_EN)
+    #define  NET_BUF_IP_HDR_SIZE    NET_IPv4_HDR_SIZE
+
+#else
+    #define  NET_BUF_IP_HDR_SIZE    0
+#endif
+
+
+
+#define  NET_BUF_PROTOCOL_HDR_SIZE_MIN        NET_UDP_HDR_SIZE_MIN
+
+#if (defined(NET_TCP_MODULE_EN))
+    #define  NET_BUF_PROTOCOL_HDR_SIZE_MAX    NET_TCP_HDR_SIZE_MAX
+#else
+    #define  NET_BUF_PROTOCOL_HDR_SIZE_MAX    NET_UDP_HDR_SIZE_MAX
+#endif
+
+
+
+
+#define  NET_BUF_DATA_PROTOCOL_HDR_SIZE_MIN             (NET_IF_HDR_SIZE_MIN + \
+                                                         NET_BUF_IP_HDR_SIZE + \
+                                                         NET_BUF_PROTOCOL_HDR_SIZE_MIN)
+
+#define  NET_BUF_DATA_PROTOCOL_HDR_SIZE_MAX             (NET_IF_HDR_SIZE_MAX   + \
+                                                         NET_BUF_IP_HDR_SIZE   + \
+                                                         NET_BUF_PROTOCOL_HDR_SIZE_MAX)
+
+                                                                    /* ------------ NET BUF HDR/DATA IX's ------------- */
+#define  NET_BUF_DATA_BASE                         0
+#define  NET_BUF_DATA_PROTOCOL_HDR_BASE          NET_BUF_DATA_BASE
+                                                                    /* Data ix/sizes based on max pkt hdr sizes ...     */
+                                                                    /* ... (see Note #1a2).                             */
+#define  NET_BUF_DATA_IX                        (NET_BUF_DATA_PROTOCOL_HDR_BASE + NET_BUF_DATA_PROTOCOL_HDR_SIZE_MAX)
+#define  NET_BUF_DATA_IX_RX                      NET_BUF_DATA_BASE  /* See Note #2b1A.                                  */
+#define  NET_BUF_DATA_IX_TX                      NET_BUF_DATA_IX    /* See Note #2b1B.                                  */
+
+#define  NET_BUF_DATA_SIZE_MIN                   NET_BUF_DATA_IX
+#define  NET_BUF_DATA_PROTOCOL_HDR_SIZE          NET_BUF_DATA_IX
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  NETWORK BUFFER QUANTITY DATA TYPE
+*
+* Note(s) : (1) (a) 'NET_BUF_QTY' pre-defined in 'net_type.h' PRIOR to all other network modules that
+*                    require network interface queue size data type.
+*
+*               (b) The following network interface queue size values are pre-#define'd in 'net_type.h'
+*                   PRIOR to all other network modules that require network interface numbers values :
+*
+*                   (1) NET_BUF_NBR_MIN
+*                   (2) NET_BUF_NBR_MAX
+*
+*                       (A) NET_BUF_NBR_MAX  SHOULD be #define'd based on 'NET_BUF_QTY' data type declared.
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+typedef  CPU_INT16U  NET_BUF_QTY;                               /* Defines max qty of net bufs to support.              */
+
+#define  NET_BUF_NBR_MIN                                   1
+#define  NET_BUF_NBR_MAX                 DEF_INT_16U_MAX_VAL    /* See Note #1b2A.                                      */
+#endif
+
+#define  NET_BUF_NBR_RX_LARGE_MIN            NET_BUF_NBR_MIN
+#define  NET_BUF_NBR_RX_LARGE_MAX            NET_BUF_NBR_MAX
+
+#define  NET_BUF_NBR_TX_MIN                  NET_BUF_NBR_MIN
+#define  NET_BUF_NBR_TX_MAX                  NET_BUF_NBR_MAX
+
+#define  NET_BUF_NBR_TX_LARGE_MIN        DEF_INT_16U_MIN_VAL
+#define  NET_BUF_NBR_TX_LARGE_MAX            NET_BUF_NBR_MAX
+
+#define  NET_BUF_NBR_TX_SMALL_MIN        DEF_INT_16U_MIN_VAL
+#define  NET_BUF_NBR_TX_SMALL_MAX            NET_BUF_NBR_MAX
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK BUFFER SIZE DATA TYPE
+*
+* Note(s) : (1) NET_BUF_IX_NONE  SHOULD be #define'd based on 'NET_BUF_SIZE' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_BUF_SIZE;                              /* Defines   max size of net buf data.                  */
+
+#define  NET_BUF_IX_NONE                 DEF_INT_16U_MAX_VAL    /* Define as max unsigned val (see Note #1).            */
+
+
+/*
+*********************************************************************************************************
+*                              NETWORK BUFFER FUNCTION POINTER DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  void  (*NET_BUF_FNCT)(NET_BUF  *p_buf);
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK BUFFER FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_FLAGS  NET_BUF_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                     NETWORK BUFFER TYPE DEFINES
+*
+* Note(s) : (1) NET_BUF_TYPE_&&& #define values specifically chosen as ASCII representations of the network
+*               buffer types.  Memory displays of network buffers will display the network buffer TYPEs with
+*               their chosen ASCII names.
+*********************************************************************************************************
+*/
+
+
+typedef  enum  net_buf_type {
+    NET_BUF_TYPE_NONE  = 0,
+    NET_BUF_TYPE_BUF,
+    NET_BUF_TYPE_RX_LARGE,
+    NET_BUF_TYPE_TX_LARGE,
+    NET_BUF_TYPE_TX_SMALL
+} NET_BUF_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK BUFFER HEADER DATA TYPE
+*
+*                                            NET_BUF_HDR
+*                                          |-------------|
+*                                          | Buffer Type |
+*                                          |-------------|
+*                                          | Buffer Size |
+*                                          |-------------|
+*                                          |    Flags    |
+*                              Previous    |-------------|
+*                               Buffer <----------O      |
+*                                Lists     |-------------|      Next
+*                                          |      O----------> Buffer
+*                              Previous    |-------------|      Lists
+*                               Buffer <----------O      |
+*                                          |-------------|      Next
+*                                          |      O----------> Buffer
+*                                          |-------------|
+*                                          |      O----------> Buffer
+*                                          |-------------|      Timer
+*                                          |             |
+*                                          |      O----------> Unlink Fnct
+*                                          |             |      & Obj Ptrs
+*                                          |-------------|
+*                                          |  Reference  |
+*                                          |   Counter   |
+*                                          |-------------|
+*                                          |             |
+*                                          |             |
+*                                          |  Protocol   |
+*                                          |   Header    |
+*                                          |  Indices/   |
+*                                          |  Lengths    |
+*                                          |             |
+*                                          |             |
+*                                          |-------------|
+*                                          |             |
+*                                          |  Protocol   |
+*                                          |  Controls   |
+*                                          |             |
+*                                          | ----------- |
+*                                          |     ARP     |
+*                                          | ----------- |
+*                                          |     IP      |
+*                                          | ----------- |
+*                                          |   TCP/UDP   |
+*                                          | ----------- |
+*                                          |     TCP     |
+*                                          | ----------- |
+*                                          |    Conn     |
+*                                          |-------------|
+*
+*
+* Note(s) : (1) Protocol Header & Data indices into DATA area declared as 'CPU_INT16U' because current
+*               TCP/IPv4 header sizes do NOT exceed 'CPU_INT16U' index space.
+*
+*           (2) 'TotLen'/'DataLen' calculate total buffer data length & 'Application' data length.
+*
+*               For received buffers, total buffer data length is set to the incoming packet length;
+*               'Application' data length (& index) is calculated as total buffer data lengths minus
+*               all protocol header lengths found in the buffer.
+*
+*               For transmitted buffers, 'Application' data length (& index) is set by higher-layer
+*               network protocols or the application layer; total buffer data length is calculated
+*               as the 'Application' data length plus all protocol header lengths inserted into the
+*               buffer.
+*
+*           (3) The following variables ideally declared as specific TCP data types; declared as CPU
+*               data types because TCP data types NOT defined until 'net_tcp.h' (see 'net.h  NETWORK
+*               INCLUDE FILES') :
+*
+*               (a) TCP transmit acknowledgement code variables ideally declared as 'NET_TCP_ACK_CODE';
+*                       declared as 'CPU_INT08U'.
+*********************************************************************************************************
+*/
+
+                                                        /* ----------------------- NET BUF HDR ------------------------ */
+typedef  struct  net_buf_hdr {
+    NET_BUF_TYPE           Type;                        /* Buf type cfg'd @ init.                                       */
+    NET_BUF_SIZE           Size;                        /* Buf size cfg'd @ init.                                       */
+    NET_BUF_FLAGS          Flags;                       /* Buf flags.                                                   */
+
+    NET_BUF_QTY            ID;                          /* Buf id.                                                      */
+    CPU_INT08U             RefCtr;                      /* Nbr of ext refs pointing to this buf.                        */
+
+    NET_IF_NBR             IF_Nbr;                      /* Buf's rx or base IF nbr.                                     */
+    NET_IF_NBR             IF_NbrTx;                    /* Buf's tx         IF nbr.                                     */
+
+
+    NET_BUF               *PrevPrimListPtr;             /* Ptr to PREV prim list.                                       */
+    NET_BUF               *NextPrimListPtr;             /* Ptr to NEXT prim list.                                       */
+
+    NET_BUF               *PrevSecListPtr;              /* Ptr to PREV sec  list.                                       */
+    NET_BUF               *NextSecListPtr;              /* Ptr to NEXT sec  list.                                       */
+
+    NET_BUF               *PrevTxListPtr;               /* Ptr to NEXT tx   list buf.                                   */
+    NET_BUF               *NextTxListPtr;               /* Ptr to PREV tx   list buf.                                   */
+
+    NET_BUF               *PrevBufPtr;                  /* Ptr to PREV buf.                                             */
+    NET_BUF               *NextBufPtr;                  /* Ptr to NEXT buf.                                             */
+
+    NET_TMR               *TmrPtr;                      /* Ptr to buf TMR.                                              */
+
+    NET_BUF_FNCT           UnlinkFnctPtr;               /* Ptr to fnct used to unlink buf from multiple refs.           */
+    void                  *UnlinkObjPtr;                /* Ptr to obj       to unlink buf from.                         */
+
+
+
+    NET_PROTOCOL_TYPE      ProtocolHdrType;             /* Cur       hdr protocol type.                                 */
+    NET_PROTOCOL_TYPE      ProtocolHdrTypeIF;           /* IF        hdr protocol type.                                 */
+    NET_PROTOCOL_TYPE      ProtocolHdrTypeIF_Sub;       /* IF        sub-protocol type.                                 */
+    NET_PROTOCOL_TYPE      ProtocolHdrTypeNet;          /* Net       hdr protocol type.                                 */
+    NET_PROTOCOL_TYPE      ProtocolHdrTypeNetSub;       /* Net       sub-protocol type.                                 */
+    NET_PROTOCOL_TYPE      ProtocolHdrTypeTransport;    /* Transport hdr protocol type.                                 */
+
+
+    CPU_INT16U             IF_HdrIx;                    /* IF                   hdr  ix  (in DATA area).                */
+    CPU_INT16U             IF_HdrLen;                   /* IF                   hdr  len (in octets   ).                */
+
+#ifdef  NET_DAD_MODULE_EN
+    void                  *IF_HW_AddrSrcPtr;            /* Pointer to HW IF src  address.                               */
+    void                  *IF_HW_AddrDestPtr;           /* Pointer to HW IF dest address.                               */
+    CPU_INT08U             IF_HW_AddrLen;               /* Length of HW IF address.                                     */
+#endif
+
+#ifdef  NET_ARP_MODULE_EN
+    CPU_INT16U             ARP_MsgIx;                   /* ARP                  msg  ix  (in DATA area).                */
+    CPU_INT16U             ARP_MsgLen;                  /* ARP                  msg  len (in octets   ).                */
+#endif
+
+    CPU_INT16U             IP_HdrIx;                    /* IP                   hdr  ix  (in DATA area).                */
+    CPU_INT16U             IP_HdrLen;                   /* IP                   hdr  len (in octets   ).                */
+    CPU_INT16U             IP_TotLen;                   /* IP                   tot  len (in octets   ).                */
+    CPU_INT16U             IP_DataLen;                  /* IP pkt/frag          data len (in octets   ).                */
+    CPU_INT16U             IP_DatagramLen;              /* IP complete datagram data len (in octets   ).                */
+
+    CPU_INT16U             ICMP_MsgIx;                  /* ICMP                 msg  ix  (in DATA area).                */
+    CPU_INT16U             ICMP_MsgLen;                 /* ICMP                 msg  len (in octets   ).                */
+    CPU_INT16U             ICMP_HdrLen;                 /* ICMP                 hdr  len (in octets   ).                */
+
+#ifdef  NET_IGMP_MODULE_EN
+    CPU_INT16U             IGMP_MsgIx;                  /* IGMP                 msg  ix  (in DATA area).                */
+    CPU_INT16U             IGMP_MsgLen;                 /* IGMP                 msg  len (in octets   ).                */
+#endif
+
+    CPU_INT16U             TransportHdrIx;              /* Transport            hdr  ix  (in DATA area).                */
+    CPU_INT16U             TransportHdrLen;             /* Transport            hdr  len (in octets   ).                */
+    CPU_INT16U             TransportTotLen;             /* Transport        tot      len (in octets   ).                */
+    CPU_INT16U             TransportDataLen;            /* Transport        tot data len (in octets   ).                */
+
+
+    CPU_INT16U             DataIx;                      /* App                  DATA ix  (in DATA area).                */
+    NET_BUF_SIZE           DataLen;                     /* App                  DATA len (in octets   ).                */
+
+    NET_BUF_SIZE           TotLen;                      /* ALL                  DATA len (in octets   ).                */
+
+
+
+#ifdef  NET_ARP_MODULE_EN
+    CPU_INT08U            *ARP_AddrHW_Ptr;              /* Ptr to ARP hw       addr.                                    */
+    CPU_INT08U            *ARP_AddrProtocolPtr;         /* Ptr to ARP protocol addr.                                    */
+#endif
+
+    CPU_INT32U             IP_FragSizeTot;              /* Tot IP rx frag size.                                         */
+    CPU_INT32U             IP_FragSizeCur;              /* Cur IP rx frag size.                                         */
+
+
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_HDR_FLAGS     IP_Flags_FragOffset;         /* IP rx flags/frag offset.                                     */
+    CPU_INT16U             IP_ID;                       /* IP datagram id.                                              */
+    NET_IPv4_ADDR          IP_AddrSrc;                  /* IP src             addr.                                     */
+    NET_IPv4_ADDR          IP_AddrDest;                 /* IP dest            addr.                                     */
+    NET_IPv4_ADDR          IP_AddrNextRoute;            /* IP tx 'Next-Route' addr.                                     */
+    NET_IPv4_ADDR          IP_AddrNextRouteNetOrder;    /* IP tx 'Next-Route' addr in net-order.                        */
+    NET_BUF               *IP_OptPtr;                   /* Ptr to IP rx opts.                                           */
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_FRAG_FLAGS    IPv6_Flags_FragOffset;
+    NET_IPv6_ADDR          IPv6_AddrSrc;                /* IPv6 src             addr.                                   */
+    NET_IPv6_ADDR          IPv6_AddrDest;               /* IPv6 dest            addr.                                   */
+    NET_IPv6_ADDR          IPv6_AddrNextRoute;          /* IPv6 tx 'Next-Route' addr.                                   */
+
+    CPU_INT16U             IPv6_ExtHdrLen;              /* IP                   hdr  len (in octets   ).                */
+
+    CPU_INT16U             IPv6_HopByHopHdrIx;          /* IPv6 HopByHop        hdr  ix. (in DATA area).                */
+    CPU_INT16U             IPv6_RoutingHdrIx;           /* IPv6 Routing         hdr  ix. (in DATA area).                */
+    CPU_INT16U             IPv6_FragHdrIx;              /* IPv6 Fragmentation   hdr  ix. (in DATA area).                */
+    CPU_INT16U             IPv6_ESP_HdrIx;              /* IPv6 ESP             hdr  ix. (in DATA area).                */
+    CPU_INT16U             IPv6_AuthHdrIx;              /* IPv6 Authentication  hdr  ix. (in DATA area).                */
+    CPU_INT16U             IPv6_DestHdrIx;              /* IPv6 Destination     hdr  ix. (in DATA area).                */
+    CPU_INT16U             IPv6_MobilityHdrIx;          /* IPv6 Mobility        hdr  ix. (in DATA area).                */
+
+    CPU_INT32U             IPv6_ID;                     /* IPv6 ID from frag    hdr.                                    */
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+    CPU_INT08U            *NDP_AddrHW_Ptr;              /* Ptr to NDP hw       addr.                                    */
+    CPU_INT08U            *NDP_AddrProtocolPtr;         /* Ptr to NDP protocol addr.                                    */
+#endif
+
+#ifdef  NET_MLDP_MODULE_EN
+    CPU_INT16U             MLDP_MsgIx;                  /* MLDP                 msg  ix  (in DATA area).                */
+    CPU_INT16U             MLDP_MsgLen;                 /* MDLP                 msg  len (in octets   ).                */
+#endif
+
+    NET_PORT_NBR           TransportPortSrc;            /* Transport src  port.                                         */
+    NET_PORT_NBR           TransportPortDest;           /* Transport dest port.                                         */
+
+#ifdef  NET_TCP_MODULE_EN
+    NET_TCP_HDR_FLAGS      TCP_HdrLen_Flags;            /* TCP hdr len/flags.                                           */
+
+    NET_TCP_SEG_SIZE       TCP_SegLenInit;              /* TCP init  seg len.                                           */
+    NET_TCP_SEG_SIZE       TCP_SegLen;                  /* TCP       seg len [i.e. data len &/or sync/close ctrl(s)].   */
+    NET_TCP_SEG_SIZE       TCP_SegLenLast;              /* TCP last  seg len [i.e. last len tx'd].                      */
+    NET_TCP_SEG_SIZE       TCP_SegLenData;              /* TCP data  seg len [i.e. data len].                           */
+    NET_PKT_CTR            TCP_SegReTxCtr;              /* Indicates nbr seg re-tx's.                                   */
+    CPU_BOOLEAN            TCP_SegSync;                 /* Indicates TCP sync  seg.                                     */
+    CPU_BOOLEAN            TCP_SegClose;                /* Indicates TCP close seg.                                     */
+    CPU_BOOLEAN            TCP_SegReset;                /* Indicates TCP reset seg.                                     */
+    CPU_BOOLEAN            TCP_SegAck;                  /* Indicates TCP ack   seg.                                     */
+    CPU_BOOLEAN            TCP_SegAckTxd;               /* Indicates TCP ack tx'd        for rx'd seg.                  */
+    CPU_INT08U             TCP_SegAckTxReqCode;         /* Indicates TCP ack tx req code for rx'd seg (see Note #3a).   */
+
+    NET_TCP_SEQ_NBR        TCP_SeqNbrInit;              /* TCP init  seq nbr.                                           */
+    NET_TCP_SEQ_NBR        TCP_SeqNbrLast;              /* TCP last  seq nbr                                            */
+    NET_TCP_SEQ_NBR        TCP_SeqNbr;                  /* TCP       seq nbr                                            */
+    NET_TCP_SEQ_NBR        TCP_AckNbr;                  /* TCP       ack nbr                                            */
+    NET_TCP_SEQ_NBR        TCP_AckNbrLast;              /* TCP last  ack nbr                                            */
+    NET_TCP_SEG_SIZE       TCP_MaxSegSize;              /* TCP max   seg size.                                          */
+    NET_TCP_WIN_SIZE       TCP_WinSize;                 /* TCP       win size.                                          */
+    NET_TCP_WIN_SIZE       TCP_WinSizeLast;             /* TCP last  win size.                                          */
+
+    NET_TCP_TX_RTT_TS_MS   TCP_RTT_TS_Rxd_ms;           /* TCP RTT TS @ seg rx'd (in ms).                               */
+    NET_TCP_TX_RTT_TS_MS   TCP_RTT_TS_Txd_ms;           /* TCP RTT TS @ seg tx'd (in ms).                               */
+
+    NET_TCP_FLAGS          TCP_Flags;                   /* TCP tx flags.                                                */
+#endif
+
+
+    NET_CONN_ID            Conn_ID;                     /* Net             conn id.                                     */
+    NET_CONN_ID            Conn_ID_Transport;           /* Transport layer conn id.                                     */
+    NET_CONN_ID            Conn_ID_App;                 /* App       layer conn id.                                     */
+
+    CPU_INT08U             ConnType;                    /* Conn type.                                                   */
+} NET_BUF_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                      NETWORK BUFFER DATA TYPE
+*
+*                                              NET_BUF
+*                                          |-------------|
+*                                          |             |
+*                                          |   Buffer    |
+*                                          |   Header    |
+*                                          |             |
+*                                          |-------------|
+*                                          |             |
+*                                          |   Buffer    |
+*                                          |    Data     |
+*                                          |   Pointer   |
+*                                          |             |
+*                                          |-------------|
+*
+* Note(s) : (1) (a) 'DataPtr' buffer data area is storage for both Protocol Headers & Application data.
+*
+*               (b) 'DataPtr' buffer data area SHOULD be declared with an additional CPU data word size
+*                    so that devices may efficiently & safely read or write data without overflowing the
+*                    data area.
+*
+*                   This additional CPU data word size does NOT increase the overall useable network
+*                   buffer 'Data' size (see also 'net_buf.c  NetBuf_GetMaxSize()  Note #1').
+*********************************************************************************************************
+*/
+
+                                                                /* --------------------- NET BUF ---------------------- */
+struct  net_buf {
+    NET_BUF_HDR   Hdr;                                          /*        Net buf hdr.                                  */
+    CPU_INT08U   *DataPtr;                                      /* Ptr to net buf data area (see Note #1).              */
+};
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK BUFFER POOLS DATA TYPE
+*
+* Note(s) : (1) Each network interface & device configures & maintains its own network buffer pools.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ NET BUF POOLS ------------------- */
+typedef  struct  net_buf_pools {
+    MEM_POOL       NetBufPool;                                  /* Net buf                         pool.                */
+    MEM_POOL       RxBufLargePool;                              /* Net buf rx large data area      pool.                */
+    MEM_POOL       TxBufLargePool;                              /* Net buf tx large data area      pool.                */
+    MEM_POOL       TxBufSmallPool;                              /* Net buf tx small data area      pool.                */
+
+    NET_STAT_POOL  NetBufStatPool;                              /* Net buf                    stat pool.                */
+    NET_STAT_POOL  RxBufLargeStatPool;                          /* Net buf rx large data area stat pool.                */
+    NET_STAT_POOL  TxBufLargeStatPool;                          /* Net buf tx large data area stat pool.                */
+    NET_STAT_POOL  TxBufSmallStatPool;                          /* Net buf tx small data area stat pool.                */
+} NET_BUF_POOLS;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           NET_BUF_GET_ID()
+*
+* Description : Get next network buffer identification number.
+*
+* Argument(s) : id      Variable that will receive the returned identification number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetBuf_Get().
+*
+*               This macro is an INTERNAL network buffer suite macro & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network buffer identification number is returned in host-order.
+*********************************************************************************************************
+*/
+
+#define  NET_BUF_GET_ID(id)                     do { NET_UTIL_VAL_COPY_16(&(id), &NetBuf_ID_Ctr); \
+                                                     NetBuf_ID_Ctr++;                             } while (0)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+NET_STAT_POOL  NetBuf_PoolStatGet                (NET_IF_NBR        if_nbr);
+
+void           NetBuf_PoolStatResetMaxUsed       (NET_IF_NBR        if_nbr);
+
+
+NET_STAT_POOL  NetBuf_RxLargePoolStatGet         (NET_IF_NBR        if_nbr);
+
+void           NetBuf_RxLargePoolStatResetMaxUsed(NET_IF_NBR        if_nbr);
+
+
+NET_STAT_POOL  NetBuf_TxLargePoolStatGet         (NET_IF_NBR        if_nbr);
+
+void           NetBuf_TxLargePoolStatResetMaxUsed(NET_IF_NBR        if_nbr);
+
+
+NET_STAT_POOL  NetBuf_TxSmallPoolStatGet         (NET_IF_NBR        if_nbr);
+
+void           NetBuf_TxSmallPoolStatResetMaxUsed(NET_IF_NBR        if_nbr);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void            NetBuf_Init                       (void);
+
+
+NET_BUF_POOLS  *NetBuf_PoolsGet                  (NET_IF_NBR        if_nbr);
+
+
+                                                                            /* ----------- BUF ALLOC FNCTS ------------ */
+void           NetBuf_PoolInit                   (NET_IF_NBR        if_nbr,
+                                                  NET_BUF_TYPE      type,
+                                                  void             *p_mem_base_addr,
+                                                  CPU_SIZE_T        mem_size,
+                                                  CPU_SIZE_T        blk_nbr,
+                                                  CPU_SIZE_T        blk_size,
+                                                  CPU_SIZE_T        blk_align,
+                                                  CPU_SIZE_T       *p_octets_reqd,
+                                                  NET_ERR          *p_err);
+
+void           NetBuf_PoolCfgValidate            (NET_IF_TYPE       if_type,
+                                                  NET_DEV_CFG      *p_dev_cfg,
+                                                  NET_ERR          *p_err);
+
+
+NET_BUF       *NetBuf_Get                        (NET_IF_NBR        if_nbr,
+                                                  NET_TRANSACTION   transaction,
+                                                  NET_BUF_SIZE      size,
+                                                  NET_BUF_SIZE      ix,
+                                                  NET_BUF_SIZE     *p_ix_offset,
+                                                  NET_BUF_FLAGS     flags,
+                                                  NET_ERR          *p_err);
+
+CPU_INT08U    *NetBuf_GetDataPtr                 (NET_IF           *p_if,
+                                                  NET_TRANSACTION   transaction,
+                                                  NET_BUF_SIZE      size,
+                                                  NET_BUF_SIZE      ix_start,
+                                                  NET_BUF_SIZE     *p_ix_offset,
+                                                  NET_BUF_SIZE     *p__data_size,
+                                                  NET_BUF_TYPE     *p_type,
+                                                  NET_ERR          *p_err);
+
+NET_BUF_SIZE   NetBuf_GetMaxSize                 (NET_IF_NBR        if_nbr,
+                                                  NET_TRANSACTION   transaction,
+                                                  NET_BUF          *p_buf,
+                                                  NET_BUF_SIZE      ix_start);
+
+
+void           NetBuf_Free                       (NET_BUF          *p_buf);
+
+NET_BUF_QTY    NetBuf_FreeBuf                    (NET_BUF          *p_buf,
+                                                  NET_CTR          *p_ctr);
+
+
+NET_BUF_QTY    NetBuf_FreeBufList                (NET_BUF          *p_buf_list,
+                                                  NET_CTR          *p_ctr);
+
+NET_BUF_QTY    NetBuf_FreeBufQ_PrimList          (NET_BUF          *p_buf_q,
+                                                  NET_CTR          *p_ctr);
+
+NET_BUF_QTY    NetBuf_FreeBufQ_SecList           (NET_BUF          *p_buf_q,
+                                                  NET_CTR          *p_ctr,
+                                                  NET_BUF_FNCT      pfnct_unlink);
+
+
+void           NetBuf_FreeBufDataAreaRx          (NET_IF_NBR        if_nbr,
+                                                  CPU_INT08U       *p_buf_data);
+
+
+                                                                            /* ------------ BUF API FNCTS ------------- */
+void           NetBuf_DataRd                     (NET_BUF          *p_buf,
+                                                  NET_BUF_SIZE      ix,
+                                                  NET_BUF_SIZE      len,
+                                                  CPU_INT08U       *p_dest,
+                                                  NET_ERR          *p_err);
+
+void           NetBuf_DataWr                     (NET_BUF          *p_buf,
+                                                  NET_BUF_SIZE      ix,
+                                                  NET_BUF_SIZE      len,
+                                                  CPU_INT08U       *p_src,
+                                                  NET_ERR          *p_err);
+
+void           NetBuf_DataCopy                   (NET_BUF          *p_buf_dest,
+                                                  NET_BUF          *p_buf_src,
+                                                  NET_BUF_SIZE      ix_dest,
+                                                  NET_BUF_SIZE      ix_src,
+                                                  NET_BUF_SIZE      len,
+                                                  NET_ERR          *p_err);
+
+
+                                                                            /* ----------- BUF STATUS FNCTS ----------- */
+CPU_BOOLEAN    NetBuf_IsUsed                     (NET_BUF          *p_buf);
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_BUF_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_cache.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_cache.c
new file mode 100644
index 0000000..78caed9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_cache.c
@@ -0,0 +1,2090 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  NETWORK ADDRESS CACHE MANAGEMENT
+*
+* Filename      : net_cache.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SL
+*********************************************************************************************************
+* Note(s)       : (1) Address cache management module ONLY required for network interfaces that require
+*                     network-address-to-hardware-address bindings (see RFC #826 'Abstract').
+*
+*                 (2) Supports Address Resolution Protocol as described in RFC #826 with the following
+*                     restrictions/constraints :
+*
+*                     (a) ONLY supports the following hardware types :
+*                         (1) 48-bit Ethernet
+*
+*                     (b) ONLY supports the following protocol types :
+*                         (1)  32-bit IPv4
+*                         (2) 128-bit IPv6
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    NET_CACHE_MODULE
+#include  "net_cache.h"
+#include  "net_cfg_net.h"
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_arp.h"
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ndp.h"
+#endif
+
+#include  "net_type.h"
+#include  "net_stat.h"
+#include  "net_tmr.h"
+
+#include  "../IF/net_if.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_CACHE_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_CACHE_ADDR  *NetCache_AddrGet (NET_CACHE_TYPE   cache_type,
+                                           NET_ERR         *p_err);
+
+static  void             NetCache_AddrFree(NET_CACHE_ADDR  *pcache,
+                                           CPU_BOOLEAN      tmr_free);
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  CPU_BOOLEAN      NetCache_IsUsed   (NET_CACHE_ADDR   *pcache);
+
+static  void             NetCache_Discard  (NET_CACHE_ADDR  *pcache);
+#endif
+
+static  void             NetCache_Unlink   (NET_CACHE_ADDR  *pcache);
+
+static  void             NetCache_Clr      (NET_CACHE_ADDR  *pcache);
+
+
+/*
+*********************************************************************************************************
+*                                           NetCache_Init()
+*
+* Description : (1) Initialize address cache:
+*
+*                   (a) Demultiplex  parent cache type
+*                   (b) Set  address        cache type
+*                   (c) Set hardware address type
+*                   (d) Set hardware address length
+*                   (e) Set protocol address length
+*                   (f) Set protocol address length
+*                   (g) Free address cache to cache pool
+*
+* Argument(s) : pcache_parent   Pointer on the parent   cache to be associated with the address cache.
+*
+*               pcache_child    Pointer on the address cache to be initialized.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CACHE_ERR_NONE             Cache successfully initialized.
+*
+*                               NET_CACHE_ERR_INVALID_TYPE     Cache is NOT a valid cache type.
+*
+* Caller(s)   : NetARP_Init(),
+*               NetNDP_Init().
+*
+* Note(s)     : (2) Cache pool MUST be           initialized PRIOR to initializing the pool with pointers
+*                   to caches.
+*
+*               (3) Each NDP cache addr type are initialized to NET_CACHE_TYPE_NDP but will be modified to
+*                   their respective NDP type when used.
+*
+*                   See also 'net_cache.h  NETWORK CACHE TYPE DEFINES'.
+*********************************************************************************************************
+*/
+
+void  NetCache_Init (NET_CACHE_ADDR  *pcache_parent,
+                     NET_CACHE_ADDR  *pcache_addr,
+                     NET_ERR         *p_err)
+{
+
+    switch (pcache_parent->Type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:
+                                                                /* Init each ARP addr cache type--NEVER modify.         */
+             pcache_addr->Type             = NET_CACHE_TYPE_ARP;
+
+                                                                /* Init each ARP HW       type/addr len--NEVER modify.  */
+             pcache_addr->AddrHW_Type      = NET_ADDR_HW_TYPE_802x;
+             pcache_addr->AddrHW_Len       = NET_IF_HW_ADDR_LEN_MAX;
+
+                                                                /* Init each ARP protocol type/addr len--NEVER modify.  */
+             pcache_addr->AddrProtocolType = NET_PROTOCOL_TYPE_IP_V4;
+             pcache_addr->AddrProtocolLen  = NET_IPv4_ADDR_SIZE;
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+             NetCache_Clr((NET_CACHE_ADDR *)pcache_addr);
+#endif
+                                                                /* Free ARP cache to cache pool (see Note #2).          */
+             pcache_addr->NextPtr          = (NET_CACHE_ADDR     *)NetCache_AddrARP_PoolPtr;
+             NetCache_AddrARP_PoolPtr      = (NET_CACHE_ADDR_ARP *)pcache_addr;
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:
+                                                                /* Init each NDP addr cache type (see Note #3.)         */
+             pcache_addr->Type             = NET_CACHE_TYPE_NDP;
+
+                                                                /* Init each NDP HW       type/addr len--NEVER modify.  */
+             pcache_addr->AddrHW_Type      = NET_ADDR_HW_TYPE_802x;
+             pcache_addr->AddrHW_Len       = NET_IF_HW_ADDR_LEN_MAX;
+
+                                                                /* Init each NDP protocol type/addr len--NEVER modify.  */
+             pcache_addr->AddrProtocolType = NET_PROTOCOL_TYPE_IP_V6;
+             pcache_addr->AddrProtocolLen  = NET_IPv6_ADDR_SIZE;
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+             NetCache_Clr((NET_CACHE_ADDR *)pcache_addr);
+#endif
+                                                                /* Free NDP cache to cache pool (see Note #2).          */
+             pcache_addr->NextPtr          = (NET_CACHE_ADDR     *)NetCache_AddrNDP_PoolPtr;
+             NetCache_AddrNDP_PoolPtr      = (NET_CACHE_ADDR_NDP *)pcache_addr;
+             break;
+#endif
+
+        default:
+           *p_err = NET_CACHE_ERR_INVALID_TYPE;
+            return;
+    }
+
+    pcache_addr->AddrHW_Valid            = DEF_NO;
+    pcache_addr->AddrProtocolValid       = DEF_NO;
+    pcache_addr->AddrProtocolSenderValid = DEF_NO;
+                                                                /* Set ptr to parent cache.                             */
+    pcache_addr->ParentPtr               = (void *)pcache_parent;
+
+
+   *p_err = NET_CACHE_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetCache_CfgAccessedTh()
+*
+* Description : Configure cache access promotion threshold.
+*
+* Argument(s) : cache_type      Cache type:
+*
+*                                   NET_CACHE_TYPE_ARP           ARP          cache type
+*                                   NET_CACHE_TYPE_NDP           NDP neighbor cache type
+*
+*               nbr_access      Desired number of cache accesses before cache is promoted.
+*
+* Return(s)   : DEF_OK,   cache access promotion threshold configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Net_InitDflt(),
+*               Application.
+*
+*               This function is a network protocol suite application interface (API) function & MAY be
+*               called by application function(s).
+*
+* Note(s)     : (1) 'NetARP_CacheAccessedTh_nbr' & 'NetNDP_CacheAccessedTh_nbr'  MUST ALWAYS be accessed
+*                    exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetCache_CfgAccessedTh (NET_CACHE_TYPE  cache_type,
+                                     CPU_INT16U      nbr_access)
+{
+    CPU_SR_ALLOC();
+
+
+    switch (cache_type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:
+#if (NET_ARP_CACHE_ACCESSED_TH_MIN > DEF_INT_16U_MIN_VAL)
+             if (nbr_access < NET_ARP_CACHE_ACCESSED_TH_MIN) {
+                 return (DEF_FAIL);
+             }
+#endif
+#if (NET_ARP_CACHE_ACCESSED_TH_MAX < DEF_INT_16U_MAX_VAL)
+             if (nbr_access > NET_ARP_CACHE_ACCESSED_TH_MAX) {
+                 return (DEF_FAIL);
+             }
+#endif
+
+             CPU_CRITICAL_ENTER();
+             NetARP_CacheAccessedTh_nbr = nbr_access;
+             CPU_CRITICAL_EXIT();
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:
+#if (NET_NDP_CACHE_ACCESSED_TH_MIN > DEF_INT_16U_MIN_VAL)
+             if (nbr_access < NET_NDP_CACHE_ACCESSED_TH_MIN) {
+                 return (DEF_FAIL);
+             }
+#endif
+#if (NET_NDP_CACHE_ACCESSED_TH_MAX < DEF_INT_16U_MAX_VAL)
+             if (nbr_access > NET_NDP_CACHE_ACCESSED_TH_MAX) {
+                 return (DEF_FAIL);
+             }
+#endif
+
+             CPU_CRITICAL_ENTER();
+             NetNDP_CacheAccessedTh_nbr = nbr_access;
+             CPU_CRITICAL_EXIT();
+             break;
+#endif
+
+        default:
+             return (DEF_FAIL);
+
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetCache_CfgAddrs()
+*
+* Description : (1) Configure a cache :
+*
+*                   (a) Get cache from cache pool
+*                   (b) Get cache timer
+*                   (c) Configure cache :
+*                       (1) Configure interface number
+*                       (2) Configure cache addresses :
+*                           (A) Hardware address
+*                           (B) Protocol address(s)
+*                       (3) Configure cache controls
+*
+*
+* Argument(s) :
+*
+*               if_nbr                  Interface number for this cache entry.
+*               ------                  Argument validated in NetCache_AddResolved
+*                                                             NetARP_ProbeAddrOnNet(),
+*                                                             NetARP_CacheAddPend(),
+*                                                             NetNDP_CacheAddPend().
+*
+*               cache_type              Cache type:
+*
+*                                           NET_CACHE_TYPE_ARP     ARP          cache type
+*                                           NET_CACHE_TYPE_NDP     NDP neighbor cache type
+*
+*               paddr_hw                Pointer to hardware address        (see Note #2b).
+*
+*               addr_hw_len             Hardware address length.
+*
+*               paddr_protocol          Pointer to protocol address        (see Note #2c).
+*               --------------          Argument checked in   NetCache_AddResolved
+*                                                             NetARP_ProbeAddrOnNet(),
+*                                                             NetARP_CacheAddPend(),
+*                                                             NetNDP_CacheAddPend().
+*
+*               paddr_protocol_sender   Pointer to sender protocol address (see note #2a).
+*
+*               addr_protocol_len       Protocol address length.
+*
+*               timeout_fnct            Pointer to timeout function.
+*
+*               timeout_tick            Timeout value (in 'NET_TMR_TICK' ticks).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CACHE_ERR_NONE                  Cache successfully configured.
+*
+*                                                                   ----- RETURNED BY NetCache_AddrGet() : -----
+*                               NET_CACHE_ERR_NONE_AVAIL            NO available caches to allocate.
+*                               NET_CACHE_ERR_INVALID_TYPE          Cache is NOT a valid cache type.
+*
+*                                                                   -------- RETURNED BY NetTmr_Get() : --------
+*                               NET_ERR_FAULT_NULL_FNCT               Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL              NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE            Network timer is NOT a valid timer type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetCache_AddResolved
+*               NetARP_ProbeAddrOnNet(),
+*               NetARP_CacheAddPend(),
+*               NetNDP_CacheAddPend().
+*
+* Note(s)     : (2) (a) If 'paddr_protocol_sender' available, MUST point to a valid protocol address, in
+*                           network-order, configured on interface number 'if_nbr'.
+*
+*                   (b) If 'paddr_hw'              available, MUST point to a valid hardware address, in
+*                           network-order.
+*
+*                   (c) 'paddr_protocol' MUST point to a valid protocol address in network-order.
+*
+*                   See also 'net_arp.c NetARP_CacheHandler() Note #2e3' &
+*                            'net_ndp.c NetNDP_CacheHandler() Note #2e3'.
+*
+*               (3) On ANY error(s), network resources MUST be appropriately freed.
+*
+*               (4) During ARP cache initialization, some cache controls were previously initialized
+*                   in NetCache_AddrGet() when the cache was allocated from the cache pool.  These cache
+*                   controls do NOT need to be re-initialized but are shown for completeness.
+*********************************************************************************************************
+*/
+NET_CACHE_ADDR  *NetCache_CfgAddrs (NET_CACHE_TYPE       cache_type,
+                                    NET_IF_NBR           if_nbr,
+                                    CPU_INT08U          *paddr_hw,
+                                    NET_CACHE_ADDR_LEN   addr_hw_len,
+                                    CPU_INT08U          *paddr_protocol,
+                                    CPU_INT08U          *paddr_protocol_sender,
+                                    NET_CACHE_ADDR_LEN   addr_protocol_len,
+                                    CPU_BOOLEAN          timer_en,
+                                    CPU_FNCT_PTR         timeout_fnct,
+                                    NET_TMR_TICK         timeout_tick,
+                                    NET_ERR             *p_err)
+{
+#ifdef  NET_ARP_MODULE_EN
+    NET_CACHE_ADDR_ARP      *pcache_addr_arp;
+    NET_ARP_CACHE           *pcache_arp;
+#endif
+#ifdef  NET_NDP_MODULE_EN
+    NET_CACHE_ADDR_NDP      *pcache_addr_ndp;
+    NET_NDP_NEIGHBOR_CACHE  *pcache_ndp;
+#endif
+
+
+    (void)&addr_hw_len;                                         /* Prevent 'variable unused' compiler warning.          */
+    (void)&addr_protocol_len;
+
+
+    switch (cache_type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                    /* --------------- VALIDATE HW LEN ---------------- */
+             if (addr_hw_len != NET_IF_HW_ADDR_LEN_MAX) {
+                *p_err = NET_CACHE_ERR_INVALID_ADDR_HW_LEN;
+                 return ((NET_CACHE_ADDR *)0);
+             }
+                                                                    /* ------------ VALIDATE PROTOCOL LEN ------------- */
+             if (addr_protocol_len != NET_IPv4_ADDR_SIZE) {
+                *p_err = NET_CACHE_ERR_INVALID_ADDR_PROTO_LEN;
+                 return ((NET_CACHE_ADDR *)0);
+             }
+#endif
+                                                                    /* ---------------- GET ARP CACHE ----------------- */
+            pcache_addr_arp = (NET_CACHE_ADDR_ARP *)NetCache_AddrGet(cache_type, p_err);
+
+             if (pcache_addr_arp == DEF_NULL) {
+                 return (DEF_NULL);                                 /* Rtn err from NetCache_AddrGet().                 */
+             }
+
+             if (timer_en == DEF_ENABLED) {
+                                                                    /* -------------- GET ARP CACHE TMR --------------- */
+                 pcache_arp = (NET_ARP_CACHE *)NetCache_GetParent((NET_CACHE_ADDR *)pcache_addr_arp);
+                 if (pcache_arp == DEF_NULL) {
+                      return (DEF_NULL);                            /* Rtn err from NetCache_GetParent().               */
+                 }
+
+
+                 pcache_arp->TmrPtr = NetTmr_Get(timeout_fnct,
+                                                 pcache_arp,
+                                                 timeout_tick,
+                                                 NET_TMR_FLAG_NONE,
+                                                 p_err);
+                 if (*p_err != NET_TMR_ERR_NONE) {                  /* If tmr unavail, ...                              */
+                                                                    /* ... free ARP cache (see Note #3).                */
+                      NetCache_AddrFree((NET_CACHE_ADDR *)pcache_addr_arp, DEF_NO);
+                      return (DEF_NULL);
+                 }
+             }
+
+                                                                    /* ---------------- CFG ARP CACHE ----------------- */
+                                                                    /* Cfg ARP cache addr(s).                           */
+             if (paddr_hw != (CPU_INT08U *)0) {                     /* If hw addr avail (see Note #2b), ...             */
+                 Mem_Copy((void     *)&pcache_addr_arp->AddrHW[0],  /* ... copy into ARP cache.                         */
+                          (void     *) paddr_hw,
+                          (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+
+                 pcache_addr_arp->AddrHW_Valid = DEF_YES;
+             }
+
+             if (paddr_protocol_sender != (CPU_INT08U *)0) {        /* If sender protocol addr avail (see Note #2a), ...*/
+                 Mem_Copy((void     *)&pcache_addr_arp->AddrProtocolSender[0],
+                          (void     *) paddr_protocol_sender,       /* ... copy into ARP cache.                         */
+                          (CPU_SIZE_T) NET_IPv4_ADDR_SIZE);
+
+                 pcache_addr_arp->AddrProtocolSenderValid = DEF_YES;
+             }
+
+             Mem_Copy((void     *)&pcache_addr_arp->AddrProtocol[0],/* Copy protocol addr into ARP cache (see Note #2c).*/
+                      (void     *) paddr_protocol,
+                      (CPU_SIZE_T) NET_IPv4_ADDR_SIZE);
+
+             pcache_addr_arp->AddrProtocolValid = DEF_YES;
+
+                                                                    /* Cfg ARP cache ctrl(s).                           */
+             pcache_addr_arp->IF_Nbr         = if_nbr;
+
+#if 0                                                               /* Init'd in NetCache_AddrGet() [see Note #4].      */
+             pcache_addr_arp->AccessedCtr    =  0u;
+             pcache_addr_arp->ReqAttemptsCtr =  0u;
+
+             pcache_addr_arp->TxQ_Head       = (NET_BUF         *)0;
+             pcache_addr_arp->TxQ_Tail       = (NET_BUF         *)0;
+                                                                    /* Cfg'd  in NetCache_Insert().                     */
+             pcache_addr_arp->PrevPtr        = (NET_CACHE_ADDR *)0;
+             pcache_addr_arp->NextPtr        = (NET_CACHE_ADDR *)0;
+#endif
+
+            *p_err =  NET_CACHE_ERR_NONE;
+             return((NET_CACHE_ADDR *)pcache_addr_arp);
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                   /* --------------- VALIDATE HW LEN ---------------- */
+             if (addr_hw_len != NET_IF_HW_ADDR_LEN_MAX) {
+                *p_err = NET_CACHE_ERR_INVALID_ADDR_HW_LEN;
+                 return ((NET_CACHE_ADDR *)0);
+             }
+                                                                   /* ------------ VALIDATE PROTOCOL LEN -------------- */
+             if (addr_protocol_len != NET_IPv6_ADDR_SIZE) {
+                *p_err = NET_CACHE_ERR_INVALID_ADDR_PROTO_LEN;
+                 return ((NET_CACHE_ADDR *)0);
+             }
+#endif
+                                                                    /* ---------------- GET NDP CACHE ----------------- */
+             pcache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrGet(cache_type, p_err);
+
+             if (pcache_addr_ndp == (NET_CACHE_ADDR_NDP *)0) {
+                  return ((NET_CACHE_ADDR *)0);                     /* Rtn err from NetCache_AddrGet().                 */
+             }
+
+             if (timer_en == DEF_ENABLED) {
+                                                                    /* -------------- GET NDP CACHE TMR --------------- */
+                 pcache_ndp = (NET_NDP_NEIGHBOR_CACHE *)NetCache_GetParent((NET_CACHE_ADDR *)pcache_addr_ndp);
+                 if (pcache_ndp == (NET_NDP_NEIGHBOR_CACHE *)0) {
+                     return ((NET_CACHE_ADDR *)0);                  /* Rtn err from NetCache_GetParent().               */
+                 }
+
+                 pcache_ndp->TmrPtr = NetTmr_Get((CPU_FNCT_PTR)timeout_fnct,
+                                                 (void       *)pcache_ndp,
+                                                 (NET_TMR_TICK)timeout_tick,
+                                                 (CPU_INT16U  )NET_TMR_FLAG_NONE,
+                                                 (NET_ERR    *)p_err);
+                 if (*p_err != NET_TMR_ERR_NONE) {                  /* If tmr unavail, ...                              */
+                                                                    /* ... free NDP cache (see Note #3).                */
+                      NetCache_AddrFree((NET_CACHE_ADDR *)pcache_addr_ndp, DEF_NO);
+                      return ((NET_CACHE_ADDR *)0);
+                 }
+             }
+                                                                    /* ---------------- CFG NDP CACHE ----------------- */
+                                                                    /* Cfg NDP cache addr(s).                           */
+             if (paddr_hw != (CPU_INT08U *)0) {                     /* If hw addr avail (see Note #2b), ...             */
+                 Mem_Copy((void     *)&pcache_addr_ndp->AddrHW[0],  /* ... copy into NDP cache.                         */
+                          (void     *) paddr_hw,
+                          (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+
+                 pcache_addr_ndp->AddrHW_Valid = DEF_YES;
+             }
+
+             if (paddr_protocol_sender != (CPU_INT08U *)0) {        /* If sender protocol addr avail (see Note #2a), ...*/
+                 Mem_Copy((void     *)&pcache_addr_ndp->AddrProtocolSender[0],
+                          (void     *) paddr_protocol_sender,       /* ... copy into NDP cache.                         */
+                          (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+
+                 pcache_addr_ndp->AddrProtocolSenderValid = DEF_YES;
+             }
+
+             Mem_Copy((void     *)&pcache_addr_ndp->AddrProtocol[0],/* Copy protocol addr into NDP cache (see Note #2c).*/
+                      (void     *) paddr_protocol,
+                      (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+
+             pcache_addr_ndp->AddrProtocolValid     = DEF_YES;
+
+                                                                    /* Cfg NDP cache ctrl(s).                           */
+             pcache_addr_ndp->IF_Nbr         =  if_nbr;
+
+#if 0                                                               /* Init'd in NetNDP_CacheGet() [see Note #4].       */
+             pcache_addr_ndp->AccessedCtr    =  0u;
+             pcache_addr_ndp->ReqAttemptsCtr =  0u;
+
+             pcache_addr_ndp->TxQ_Head       = (NET_BUF       *)0;
+             pcache_addr_ndp->TxQ_Tail       = (NET_BUF       *)0;
+                                                                /* Cfg'd  in NetNDP_CacheInsert().                      */
+             pcache_addr_ndp->PrevPtr        = (NET_NDP_CACHE *)0;
+             pcache_addr_ndp->NextPtr        = (NET_NDP_CACHE *)0;
+#endif
+
+            *p_err =  NET_CACHE_ERR_NONE;
+             return((NET_CACHE_ADDR *)pcache_addr_ndp);
+#endif
+
+        default:
+            *p_err =  NET_CACHE_ERR_INVALID_TYPE;
+             return ((NET_CACHE_ADDR *)0);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetCache_GetParent()
+*
+* Description : Get a ptr on a parent cache.
+*
+* Argument(s) : pcache      Pointer to child cache.
+*
+* Return(s)   : Pointer on the parent cache, if valid.
+*
+*               Pointer to NULL,             otherwise.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  *NetCache_GetParent (NET_CACHE_ADDR  *pcache)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------ VALIDATE PTRS ------------------- */
+    if (pcache == (NET_CACHE_ADDR *)0) {
+        return ((void *)0);
+    }
+
+    if (pcache->ParentPtr == (void *)0) {
+        return ((void *)0);
+    }
+#endif
+
+    return (pcache->ParentPtr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetCache_AddrSrch()
+*
+* Description : Search cache list for cache with specific protocol address.
+*
+*               (1) (a) Cache List resolves protocol-address-to-hardware-address bindings based on the
+*                       following cache fields :
+*
+*                           (A) Some fields are configured at compile time
+*                                   (see 'net_arp.h  ARP CACHE  Note #3').
+*
+*                       (1) Cache    Type                Should be configured at compile time (see Note #1aA)
+*                       (2) Hardware Type                Should be configured at compile time (see Note #1aA)
+*                       (3) Hardware Address Length      Should be configured at compile time (see Note #1aA)
+*                       (4) Protocol Type                Should be configured at compile time (see Note #1aA)
+*                       (5) Protocol Address Length      Should be configured at compile time (see Note #1aA)
+*                       (6) Protocol Address             Should be generated  at run     time
+*
+*                   (b) Caches are linked to form Cache List.
+*
+*                       (1) In the diagram below, ... :
+*
+*                           (A) The top horizontal row represents the list of caches.
+*
+*                           (B) (1) 'NetCache_???_ListHead' points to the head of the Cache List;
+*                               (2) 'NetCache_???_ListTail' points to the tail of the Cache List.
+*
+*                           (C) Caches' 'PrevPtr' & 'NextPtr' doubly-link each cache to form the Cache List.
+*
+*                       (2) Caches in the 'PENDING' state are pending hardware address resolution by an
+*                           ARP Reply.  While in the 'PENDING' state, ALL transmit packet buffers are enqueued
+*                           for later transmission when the corresponding ARP Reply is received.
+*
+*                           In the diagram below, ... :
+*
+*                           (A) (1) ARP caches' 'TxQ_Head' points to the head of the pending transmit packet queue;
+*                               (2) ARP caches' 'TxQ_Tail' points to the tail of the pending transmit packet queue.
+*
+*                           (B) Buffer's 'PrevSecListPtr' & 'NextSecListPtr' link each buffer in a pending transmit
+*                               packet queue.
+*
+*                       (3) (A) For any ARP cache lookup, all ARP caches are searched in order to find the
+*                               ARP cache with the appropriate hardware address--i.e. the ARP cache with the
+*                               corresponding protocol address (see Note #1a5).
+*
+*                           (B) To expedite faster ARP cache lookup for recently added (or recently promoted)
+*                               ARP caches :
+*
+*                               (1) (a) (1) ARP caches are added at (or promoted to); ...
+*                                       (2) ARP caches are searched starting at       ...
+*                                   (b) ... the head of the ARP Cache List.
+*
+*                               (2) (a) As ARP caches are added into the list, older ARP caches migrate to the
+*                                       tail of the ARP Cache List.  Once an ARP cache expires or is discarded,
+*                                       it is removed from the ARP Cache List.
+*
+*                                   (b) Also if NO ARP cache is available & a new ARP cache is needed, then
+*                                       the oldest ARP cache at the tail of the ARP Cache List is removed for
+*                                       allocation.
+*
+*
+*                                          |                                               |
+*                                          |<-------------- List of Caches --------------->|
+*                                          |               (see Note #1b1A)                |
+*
+*                                        New caches                              Oldest cache in
+*                                     inserted at head                             Cache List
+*                                    (see Note #1b3B1b)                         (see Note #1b3B2)
+*
+*                                             |             NextPtr                     |
+*                                             |        (see Note #1b1C)                 |
+*                                             v                   |                     v
+*                                                                 |
+*                           Head of        -------       -------  v    -------       -------   (see Note #1b1B2)
+*                          Cache List ---->|     |------>|     |------>|     |------>|     |
+*                                          |     |       |     |       |     |       |     |        Tail of
+*                                          |     |<------|     |<------|     |<------|     |<----  Cache List
+*                     (see Note #1b1B1)    -------       -------  ^    -------       -------
+*                                            | |                  |      | |
+*                                            | |                  |      | |
+*                                            | ------       PrevPtr      | ------
+*                            TxQ_Head  --->  |      |  (see Note #1b1C)  |      | <---  TxQ_Tail
+*                        (see Note #1b2A1)   v      |                    v      |   (see Note #1b2A2)
+*               ---                        -------  |                  -------  |
+*                ^                         |     |  |                  |     |  |
+*                |                         |     |  |                  |     |  |
+*                |                         |     |  |                  |     |  |
+*                |                         |     |  |                  |     |  |
+*                |                         -------  |                  -------  |
+*                |                           | ^    |                    | ^    |
+*                |       NextSecListPtr ---> | |    |                    | | <----- PrevSecListPtr
+*                |      (see Note #1b2B)     v |    |                    v |    |  (see Note #1b2B)
+*                |                         -------  |                  -------  |
+*                                          |     |  |                  |     |<--
+*        Buffers pending on                |     |  |                  |     |
+*          cache resolution                |     |  |                  -------
+*         (see Note #1b2)                  |     |  |
+*                                          -------  |
+*                |                           | ^    |
+*                |                           | |    |
+*                |                           v |    |
+*                |                         -------  |
+*                |                         |     |<--
+*                |                         |     |
+*                |                         |     |
+*                v                         |     |
+*               ---                        -------
+*
+*
+* Argument(s) : cache_type          Cache type:
+*
+*                                       NET_CACHE_TYPE_ARP     ARP          cache type
+*                                       NET_CACHE_TYPE_NDP     NDP neighbor cache type
+*
+*               paddr_hw            Pointer to variable that will receive the hardware address (see Note #3).
+*
+*               addr_hw_len         Hardware address length.
+*
+*               paddr_protocol      Pointer to protocol address (see Note #2).
+*               --------------      Argument checked in NetARP_CacheHandler(),
+*                                                       NetNDP_CacheHandler(),
+*                                                       NetARP_ProbeAddrOnNet().
+*
+*               addr_protocol_len   Protocol address length.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CACHE_ERR_RESOLVED                  Protocol address successfully      resolved.
+*
+*                               NET_CACHE_ERR_PEND                      Protocol address     found but NOT resolved.
+*
+*                               NET_CACHE_ERR_NOT_FOUND                 Protocol address NOT found.
+*
+*                               NET_CACHE_ERR_INVALID_TYPE              Cache is NOT a valid cache type.
+*                               NET_CACHE_ERR_INVALID_ADDR_HW_LEN       Invalid hardware address length.
+*                               NET_CACHE_ERR_INVALID_ADDR_PROTO_LEN    Invalid hardware address length.
+*
+* Return(s)   : Pointer to cache with specific protocol address, if found.
+*
+*               Pointer to NULL,                                 otherwise.
+*
+* Caller(s)   : NetARP_CacheHandler(),
+*               NetNDP_CacheHandler(),
+*               NetNDP_ProbeAddrOnNet().
+*
+* Note(s)     : (2) 'paddr_protocol' MUST point to a protocol address in network-order.
+*
+*                   See also 'net_arp.c NetARP_CacheHandler() Note #2e3' &
+*                            'net_ndp.c NetNDP_CacheHandler() Note #2e3'.
+*
+*               (3) The hardware address is returned in network-order; i.e. the pointer to the hardware
+*                   address points to the highest-order octet.
+*********************************************************************************************************
+*/
+
+NET_CACHE_ADDR  *NetCache_AddrSrch (NET_CACHE_TYPE       cache_type,
+                                    NET_IF_NBR           if_nbr,
+                                    CPU_INT08U          *paddr_protocol,
+                                    NET_CACHE_ADDR_LEN   addr_protocol_len,
+                                    NET_ERR             *p_err)
+{
+#ifdef  NET_ARP_MODULE_EN
+    NET_CACHE_ADDR_ARP  *pcache_addr_arp;
+#endif
+#ifdef  NET_NDP_MODULE_EN
+    NET_CACHE_ADDR_NDP  *pcache_addr_ndp;
+#endif
+    NET_CACHE_ADDR      *pcache;
+    NET_CACHE_ADDR      *pcache_next;
+    CPU_INT08U          *pcache_addr;
+    CPU_INT16U           th;
+    CPU_BOOLEAN          found;
+    CPU_SR_ALLOC();
+
+
+    (void)&addr_protocol_len;                                   /* Prevent 'variable unused' compiler warning.          */
+    (void)&if_nbr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    switch (cache_type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:
+             if (addr_protocol_len != NET_IPv4_ADDR_SIZE) {
+                *p_err = NET_CACHE_ERR_INVALID_ADDR_PROTO_LEN;
+                 return ((NET_CACHE_ADDR *)0);
+             }
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:
+             if (addr_protocol_len != NET_IPv6_ADDR_SIZE) {
+                *p_err = NET_CACHE_ERR_INVALID_ADDR_PROTO_LEN;
+                 return ((NET_CACHE_ADDR *)0);
+             }
+             break;
+#endif
+
+        default:
+             *p_err = NET_CACHE_ERR_INVALID_TYPE;
+              return ((NET_CACHE_ADDR *)0);
+    }
+#endif
+
+    found  =  DEF_NO;
+   *p_err   =  NET_CACHE_ERR_NOT_FOUND;
+    pcache = (NET_CACHE_ADDR *)0;
+
+    switch (cache_type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:
+             pcache_addr_arp = (NET_CACHE_ADDR_ARP *)NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_ARP];
+             while ((pcache_addr_arp != (NET_CACHE_ADDR_ARP *)0) &&         /* Srch    ARP Cache List ...               */
+                    (found  ==  DEF_NO)) {                                  /* ... until cache found.                   */
+
+                 pcache_next     = (NET_CACHE_ADDR *) pcache_addr_arp->NextPtr;
+                 pcache_addr     = (CPU_INT08U     *)&pcache_addr_arp->AddrProtocol[0];
+
+                                                                            /* Cmp ARP cache protocol addr.             */
+                 found           =  Mem_Cmp((void     *)paddr_protocol,
+                                            (void     *)pcache_addr,
+                                            (CPU_SIZE_T)NET_IPv4_ADDR_SIZE);
+
+                 if (found != DEF_YES) {                                    /* If NOT found, ..                         */
+                     pcache_addr_arp = (NET_CACHE_ADDR_ARP *)pcache_next;   /* .. adv to next ARP cache.                */
+
+                 } else {                                                   /* Else rtn found NDP cache.                */
+                     pcache = (NET_CACHE_ADDR *)pcache_addr_arp;
+                     if (pcache_addr_arp->AddrHW_Valid == DEF_YES) {
+                        *p_err = NET_CACHE_ERR_RESOLVED;                    /* HW addr is     avail.                    */
+                     } else {
+                        *p_err = NET_CACHE_ERR_PEND;                        /* HW addr is NOT avail.                    */
+                     }
+
+                     pcache_addr_arp->AccessedCtr++;
+                     CPU_CRITICAL_ENTER();
+                     th = NetARP_CacheAccessedTh_nbr;
+                     CPU_CRITICAL_EXIT();
+                     if (pcache->AccessedCtr > th) {                        /* If ARP cache accessed > th, & ..         */
+                         pcache->AccessedCtr = 0u;
+                                                                            /* .. ARP cache NOT @ list head, ..         */
+                         if (pcache != NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_ARP]) {
+                             NetCache_Unlink(pcache);
+                             NetCache_Insert(pcache);                       /* .. promote ARP cache to list head.       */
+                         }
+                     }
+                 }
+             }
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:
+             pcache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_NDP];
+             while ((pcache_addr_ndp != (NET_CACHE_ADDR_NDP *)0) &&         /* Srch    NDP Cache List ...               */
+                    (found           ==  DEF_NO)) {                         /* ... until cache found.                   */
+
+                 pcache_next     = (NET_CACHE_ADDR *) pcache_addr_ndp->NextPtr;
+                 pcache_addr     = (CPU_INT08U     *)&pcache_addr_ndp->AddrProtocol[0];
+
+
+                 if (pcache_addr_ndp->Type != cache_type) {
+                     pcache_addr_ndp = (NET_CACHE_ADDR_NDP *)pcache_next;
+                     continue;
+                 }
+                                                                            /* Cmp NDP cache protocol addr.             */
+                 if (paddr_protocol != (CPU_INT08U *)0){
+                     if (pcache_addr_ndp->IF_Nbr == if_nbr){
+                         found =  Mem_Cmp((void     *)paddr_protocol,
+                                          (void     *)pcache_addr,
+                                          (CPU_SIZE_T)NET_IPv6_ADDR_SIZE);
+                     }
+                 } else {
+                    *p_err   =  NET_CACHE_ERR_NOT_FOUND;
+                     return (pcache);
+                 }
+
+                 if (found != DEF_YES) {                                    /* If NOT found, ..                         */
+                     pcache_addr_ndp = (NET_CACHE_ADDR_NDP *)pcache_next;   /* .. adv to next NDP cache.                */
+
+                 } else {                                                   /* Else rtn found NDP cache.                */
+                     pcache = (NET_CACHE_ADDR *)pcache_addr_ndp;
+                     if (pcache->AddrHW_Valid == DEF_YES) {
+                        *p_err = NET_CACHE_ERR_RESOLVED;                    /* HW addr is     avail.                    */
+                     } else {
+                        *p_err = NET_CACHE_ERR_PEND;                        /* HW addr is NOT avail.                    */
+                     }
+
+                     pcache_addr_ndp->AccessedCtr++;
+                     CPU_CRITICAL_ENTER();
+                     th = NetNDP_CacheAccessedTh_nbr;
+                     CPU_CRITICAL_EXIT();
+                     if (pcache->AccessedCtr > th) {                        /* If NDP cache accessed > th, & ..         */
+                         pcache->AccessedCtr = 0u;
+                                                                            /* .. NDP cache NOT @ list head, ..         */
+                         if (pcache != NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_NDP]) {
+                             NetCache_Unlink(pcache);
+                             NetCache_Insert(pcache);                       /* .. promote NDP cache to list head.       */
+                         }
+                     }
+                 }
+             }
+             break;
+#endif
+
+        default:
+           *p_err =  NET_CACHE_ERR_INVALID_TYPE;
+            return ((NET_CACHE_ADDR *)0);
+    }
+
+    return (pcache);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetCache_AddResolved()
+*
+* Description : (1) Add a 'RESOLVED' cache into the Cache List :
+*
+*                   (a) Configure cache :
+*                       (1) Get default-configured cache
+*                       (2) Cache state
+*                   (b) Insert    cache into Cache List
+*
+*
+* Argument(s) : if_nbr          Interface number for this cache entry.
+*
+*               paddr_hw        Pointer to hardware address (see Note #2a).
+*               --------        Argument checked in caller(s)
+*
+*               paddr_protocol  Pointer to protocol address (see Note #2b).
+*               --------------  Argument checked in caller(s)
+*
+*               cache_type      Cache type:
+*
+*                                   NET_CACHE_TYPE_ARP     ARP          cache type
+*                                   NET_CACHE_TYPE_NDP     NDP neighbor cache type
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CACHE_ERR_RESOLVED              Cache added in 'RESOLVED' state.
+*
+*                                                                   -- RETURNED BY NetCache_CfgAddrs() : --
+*                               NET_CACHE_ERR_NONE_AVAIL            NO available caches to allocate.
+*                               BET_CACHE_ERR_INVALID_TYPE          Cache is NOT a valid cache type.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL              NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE            Network timer is NOT a valid timer type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_CacheHandler(),
+*               NetARP_RxPktCacheUpdate().
+*
+* Note(s)     : (2) Addresses MUST be in network-order :
+*
+*                   (a) 'paddr_hw'       MUST point to valid hardware address in network-order.
+*                   (b) 'paddr_protocol' MUST point to valid protocol address in network-order.
+*
+*                   See also 'net_arp.c NetARP_CacheHandler() Note #2e3' &
+*                            'net_ndp.c NetNDP_CacheHandler() Note #2e3'.
+*********************************************************************************************************
+*/
+
+void  NetCache_AddResolved (NET_IF_NBR       if_nbr,
+                            CPU_INT08U      *paddr_hw,
+                            CPU_INT08U      *paddr_protocol,
+                            NET_CACHE_TYPE   cache_type,
+                            CPU_FNCT_PTR     fnct,
+                            NET_TMR_TICK     timeout_tick,
+                            NET_ERR         *p_err)
+{
+#ifdef  NET_ARP_MODULE_EN
+    NET_CACHE_ADDR_ARP      *pcache_addr_arp;
+    NET_ARP_CACHE           *pcache_arp;
+#endif
+#ifdef  NET_NDP_MODULE_EN
+    NET_CACHE_ADDR_NDP      *pcache_addr_ndp;
+    NET_NDP_NEIGHBOR_CACHE  *pcache_ndp;
+    CPU_SR_ALLOC();
+#endif
+
+
+
+    switch (cache_type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:
+
+             pcache_addr_arp = (NET_CACHE_ADDR_ARP *)NetCache_CfgAddrs(NET_CACHE_TYPE_ARP,
+                                                                       if_nbr,
+                                                                       paddr_hw,
+                                                                       NET_IF_HW_ADDR_LEN_MAX,
+                                                                       paddr_protocol,
+                                                                       0,
+                                                                       NET_IPv4_ADDR_SIZE,
+                                                                       DEF_YES,
+                                                                       fnct,
+                                                                       timeout_tick,
+                                                                       p_err);
+
+             if (*p_err != NET_CACHE_ERR_NONE) {
+                  return;
+             }
+
+             pcache_arp = (NET_ARP_CACHE *)NetCache_GetParent((NET_CACHE_ADDR *)pcache_addr_arp);
+             if (pcache_arp == ((NET_ARP_CACHE *)0)) {
+                *p_err = NET_ERR_FAULT_NULL_PTR;
+                 return;
+             }
+
+             DEF_BIT_SET(pcache_arp->Flags, NET_CACHE_FLAG_USED);
+             pcache_arp->State = NET_ARP_CACHE_STATE_RESOLVED;
+
+                                                                /* ------- INSERT ARP CACHE INTO ARP CACHE LIST ------- */
+             NetCache_Insert((NET_CACHE_ADDR *)pcache_addr_arp);
+
+            *p_err = NET_CACHE_ERR_RESOLVED;
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:
+             CPU_CRITICAL_ENTER();
+             timeout_tick = NetNDP_NeighborCacheTimeout_tick;
+             CPU_CRITICAL_EXIT();
+
+             pcache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_CfgAddrs(NET_CACHE_TYPE_NDP,
+                                                                       if_nbr,
+                                                                       paddr_hw,
+                                                                       NET_IF_HW_ADDR_LEN_MAX,
+                                                                       paddr_protocol,
+                                                                       0,
+                                                                       NET_IPv6_ADDR_SIZE,
+                                                                       DEF_YES,
+                                                                       fnct,
+                                                                       timeout_tick,
+                                                                       p_err);
+
+             if (*p_err != NET_CACHE_ERR_NONE) {
+                  return;
+             }
+
+             pcache_ndp = (NET_NDP_NEIGHBOR_CACHE *)NetCache_GetParent((NET_CACHE_ADDR *)pcache_addr_ndp);
+             if (pcache_ndp == ((NET_NDP_NEIGHBOR_CACHE *)0)) {
+                *p_err = NET_ERR_FAULT_NULL_PTR;
+                 return;
+             }
+
+             pcache_ndp->State = NET_NDP_CACHE_STATE_REACHABLE;
+
+                                                                         /* ------- INSERT NDP CACHE INTO NDP CACHE LIST ------- */
+             NetCache_Insert((NET_CACHE_ADDR *) pcache_addr_ndp);
+
+            *p_err = NET_CACHE_ERR_RESOLVED;
+
+             break;
+#endif
+
+        default:
+            *p_err = NET_CACHE_ERR_INVALID_TYPE;
+             return;
+    }
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetCache_Insert()
+*
+* Description : Insert a cache into the Cache List.
+*
+* Argument(s) : pcache      Pointer to a cache.
+*               ------      Argument checked in NetCache_AddrSrch(),
+*                                               NetCache_AddResolved(),
+*                                               NetARP_CacheAddPend(),
+*                                               NetNDP_CacheAddPend().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetCache_AddrSrch(),
+*               NetCache_AddResolved(),
+*               NetARP_CacheAddPend(),
+*               NetARP_ProbeAddrOnNet(),
+*               NetNDP_CacheAddPend().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetCache_Insert (NET_CACHE_ADDR  *pcache)
+{
+    switch (pcache->Type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:                                /* ---------------- CFG ARP CACHE PTRS ---------------- */
+             pcache->PrevPtr = (NET_CACHE_ADDR *)0;
+             pcache->NextPtr = NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_ARP];
+
+                                                                /* ------- INSERT ARP CACHE INTO ARP CACHE LIST ------- */
+                                                                /* If list NOT empty, insert before head.               */
+             if (NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_ARP] != (NET_CACHE_ADDR *)0) {
+                 NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_ARP]->PrevPtr = pcache;
+             } else {                                           /* Else add first ARP cache to list.                    */
+                 NetCache_AddrListTail[NET_CACHE_ADDR_LIST_IX_ARP]          = pcache;
+             }
+                                                                /* Insert ARP cache @ list head.                        */
+             NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_ARP] = pcache;
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:                                /* ---------------- CFG NDP CACHE PTRS ---------------- */
+             pcache->PrevPtr = (NET_CACHE_ADDR *)0;
+             pcache->NextPtr = NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_NDP];
+
+                                                                /* ------- INSERT NDP CACHE INTO NDP CACHE LIST ------- */
+                                                                /* If list NOT empty, insert before head.               */
+             if (NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_NDP] != (NET_CACHE_ADDR *)0) {
+                 NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_NDP]->PrevPtr = pcache;
+             } else {                                           /* Else add first NDP cache to list.                    */
+                 NetCache_AddrListTail[NET_CACHE_ADDR_LIST_IX_NDP] = pcache;
+             }
+                                                                /* Insert NDP cache @ list head.                        */
+             NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_NDP]     = pcache;
+             break;
+#endif
+
+        default:
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetCache_Remove()
+*
+* Description : (1) Remove a cache from the Cache List :
+*
+*                   (a) Remove cache from    Cache List
+*                   (b) Free   cache back to cache pool
+*
+*
+* Argument(s) : pcache      Pointer to a cache.
+*               ------      Argument checked in caller(s)
+*
+*               tmr_free    Indicate whether to free network timer :
+*
+*                               DEF_YES                Free network timer for cache.
+*                               DEF_NO          Do NOT free network timer for cache
+*                                                     [Freed by NetTmr_TaskHandler()].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_CacheGetAddrHW(),
+*               NetARP_CacheHandler(),
+*               NetARP_CacheProbeAddrOnNet(),
+*               NetARP_CacheReqTimeout(),
+*               NetARP_CacheTimeout(),
+*               NetARP_RxPktCacheUpdate(),
+*               NetCache_AddrGet(),
+*               NetCache_TxPktHandler(),
+*               NetNDP_CacheClrAll(),
+*               NetNDP_NeighborCacheRemoveEntry().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetCache_Remove (NET_CACHE_ADDR  *pcache,
+                       CPU_BOOLEAN      tmr_free)
+{
+                                                                /* ----------- REMOVE CACHE FROM CACHE LIST ----------- */
+    NetCache_Unlink(pcache);
+                                                                /* -------------------- FREE CACHE -------------------- */
+    NetCache_AddrFree(pcache, tmr_free);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetCache_UnlinkBuf()
+*
+* Description : Unlink a network buffer from a cache's transmit queue.
+*
+* Argument(s) : pbuf        Pointer to network buffer enqueued in a cache transmit buffer queue.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetARP_CacheHandler(),
+*                             NetARP_CacheAddPend(),
+*                             NetNDP_CacheHandler(),
+*                             NetNDP_CacheAddPend().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetCache_UnlinkBuf (NET_BUF  *pbuf)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN     used;
+#endif
+    NET_BUF             *pbuf_prev;
+    NET_BUF             *pbuf_next;
+    NET_BUF_HDR         *pbuf_hdr;
+    NET_BUF_HDR         *pbuf_hdr_prev;
+    NET_BUF_HDR         *pbuf_hdr_next;
+    NET_CACHE_ADDR      *pcache;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------- VALIDATE PTR ------------------- */
+    if (pbuf == (NET_BUF *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Cache.NullPtrCtr);
+        return;
+    }
+                                                                /* ------------------- VALIDATE BUF ------------------- */
+    used = NetBuf_IsUsed(pbuf);
+    if (used != DEF_YES) {
+        return;
+    }
+#endif
+
+    pbuf_hdr = (NET_BUF_HDR    *)&pbuf->Hdr;
+    pcache   = (NET_CACHE_ADDR *) pbuf_hdr->UnlinkObjPtr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------ VALIDATE CACHE ------------------ */
+    used = NetCache_IsUsed(pcache);
+    if (used != DEF_YES) {
+        return;
+    }
+#endif
+
+                                                                /* ------------ UNLINK BUF FROM CACHE TX Q ------------ */
+    pbuf_prev = pbuf_hdr->PrevSecListPtr;
+    pbuf_next = pbuf_hdr->NextSecListPtr;
+                                                                /* Point prev cache pending tx Q buf to next buf.       */
+    if (pbuf_prev != (NET_BUF *)0) {
+        pbuf_hdr_prev                 = &pbuf_prev->Hdr;
+        pbuf_hdr_prev->NextSecListPtr =  pbuf_next;
+    } else {
+        pcache->TxQ_Head              =  pbuf_next;
+    }
+                                                                /* Point next cache pending tx Q buf to prev buf.       */
+    if (pbuf_next != (NET_BUF *)0) {
+        pbuf_hdr_next                 = &pbuf_next->Hdr;
+        pbuf_hdr_next->PrevSecListPtr =  pbuf_prev;
+    } else {
+        pcache->TxQ_Tail              =  pbuf_prev;
+    }
+
+
+                                                                /* -------------- CLR BUF'S UNLINK CTRLS -------------- */
+    pbuf_hdr->PrevSecListPtr = (NET_BUF    *)0;                 /* Clr pending tx Q ptrs.                               */
+    pbuf_hdr->NextSecListPtr = (NET_BUF    *)0;
+
+    pbuf_hdr->UnlinkFnctPtr  = (NET_BUF_FNCT)0;                 /* Clr unlink ptrs.                                     */
+    pbuf_hdr->UnlinkObjPtr   = (void       *)0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetCache_TxPktHandler()
+*
+* Description : (1) Transmit packet buffers from cache transmit buffer queue :
+*
+*                   (a) Resolve  packet  buffer(s)' hardware address(s)
+*                   (b) Update   packet  buffer(s)' unlink/reference values
+*                   (c) Transmit packet  buffer(s)
+*
+*
+* Argument(s) : pbuf_q      Pointer to network buffer(s) to transmit.
+*
+*               paddr_hw    Pointer to sender's hardware address (see Note #2).
+*               --------    Argument checked in caller(s)
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_RxPktCacheUpdate(),
+*               NetNDP_RxNeighborAdvertisement().
+*
+* Note(s)     : (2) Addresses MUST be in network-order.
+*
+*               (3) RFC #1122, Section 2.3.2.2 states that "the link layer SHOULD" :
+*
+*                   (a) "Save (rather than discard) ... packets destined to the same unresolved
+*                        IP address and" ...
+*                   (b) "Transmit the saved packet[s] when the address has been resolved."
+*********************************************************************************************************
+*/
+
+void  NetCache_TxPktHandler (NET_PROTOCOL_TYPE   proto_type,
+                             NET_BUF            *pbuf_q,
+                             CPU_INT08U         *paddr_hw)
+{
+    NET_BUF                 *pbuf_list;
+    NET_BUF                 *pbuf_list_next;
+    NET_BUF                 *pbuf;
+    NET_BUF                 *pbuf_next;
+    NET_BUF_HDR             *pbuf_hdr;
+#ifdef  NET_NDP_MODULE_EN
+    NET_NDP_NEIGHBOR_CACHE  *pcache;
+    NET_CACHE_ADDR_NDP      *pcache_addr_ndp;
+    CPU_INT08U              *paddr_protocol;
+    CPU_INT08U               cache_state;
+    NET_TMR_TICK             timeout_tick;
+#endif
+    CPU_INT08U              *pbuf_addr_hw;
+#ifdef  NET_NDP_MODULE_EN
+    NET_IF_NBR               if_nbr;
+    CPU_SR_ALLOC();
+#endif
+    NET_ERR                  err;
+
+
+    pbuf_hdr = &pbuf_q->Hdr;
+
+
+    pbuf_list = pbuf_q;
+    while (pbuf_list  != (NET_BUF *)0) {                        /* Handle ALL buf lists in Q.                           */
+        pbuf_hdr       = &pbuf_list->Hdr;
+        pbuf_list_next = (NET_BUF *)pbuf_hdr->NextSecListPtr;
+
+        pbuf           = (NET_BUF *)pbuf_list;
+        while (pbuf   != (NET_BUF *)0) {                        /* Handle ALL bufs in buf list.                         */
+            pbuf_hdr   = &pbuf->Hdr;
+            pbuf_next  = (NET_BUF *)pbuf_hdr->NextBufPtr;
+
+            switch (proto_type) {
+#ifdef  NET_ARP_MODULE_EN
+                case NET_PROTOCOL_TYPE_ARP:
+                     pbuf_addr_hw = pbuf_hdr->ARP_AddrHW_Ptr;
+                     Mem_Copy((void     *)pbuf_addr_hw,         /* Copy hw addr into pkt buf.                           */
+                              (void     *)paddr_hw,
+                              (CPU_SIZE_T)NET_IF_HW_ADDR_LEN_MAX);
+                     break;
+#endif
+#ifdef  NET_NDP_MODULE_EN
+                case NET_PROTOCOL_TYPE_NDP:
+                     if_nbr       = pbuf_hdr->IF_Nbr;
+                     pbuf_addr_hw = pbuf_hdr->NDP_AddrHW_Ptr;
+                     Mem_Copy((void     *)pbuf_addr_hw,         /* Copy hw addr into pkt buf.                           */
+                              (void     *)paddr_hw,
+                              (CPU_SIZE_T)NET_IF_HW_ADDR_LEN_MAX);
+                     paddr_protocol    =  pbuf_hdr->NDP_AddrProtocolPtr;
+                     pcache_addr_ndp = (NET_CACHE_ADDR_NDP *)NetCache_AddrSrch(NET_CACHE_TYPE_NDP,
+                                                                               if_nbr,
+                                                                               paddr_protocol,
+                                                                               NET_IPv6_ADDR_SIZE,
+                                                                              &err);
+                     if (pcache_addr_ndp != (NET_CACHE_ADDR_NDP *)0) {           /* If NDP cache found, chk state.      */
+                         pcache = (NET_NDP_NEIGHBOR_CACHE *) pcache_addr_ndp->ParentPtr;
+                         cache_state = pcache->State;
+                         if (cache_state == NET_NDP_CACHE_STATE_STALE) {
+                             pcache->State = NET_NDP_CACHE_STATE_DLY;
+                             CPU_CRITICAL_ENTER();
+                             timeout_tick = NetNDP_DelayTimeout_tick;
+                             CPU_CRITICAL_EXIT();
+                             NetTmr_Set(pcache->TmrPtr,
+                                        NetNDP_DelayTimeout,
+                                        timeout_tick,
+                                       &err);
+                             if (err != NET_TMR_ERR_NONE) {                          /* If tmr unavail, free NDP cache. */
+                                 NetCache_Remove((NET_CACHE_ADDR *)pcache_addr_ndp,  /* Clr but do NOT free tmr.        */
+                                                                   DEF_YES);
+                                 return;
+                            }
+                        }
+                     }
+                     break;
+#endif
+
+                default:
+                     break;
+            }
+                                                                /* Clr buf sec list & unlink ptrs.                      */
+            pbuf_hdr->PrevSecListPtr = (NET_BUF    *)0;
+            pbuf_hdr->NextSecListPtr = (NET_BUF    *)0;
+            pbuf_hdr->UnlinkFnctPtr  = (NET_BUF_FNCT)0;
+            pbuf_hdr->UnlinkObjPtr   = (void       *)0;
+
+            NetIF_Tx(pbuf, &err);                               /* Tx pkt to IF (see Note #3b).                         */
+
+            pbuf  = pbuf_next;
+        }
+
+        pbuf_list = pbuf_list_next;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         NetCache_AddrGet()
+*
+* Description : (1) Allocate & initialize a cache :
+*
+*                   (a) Get a cache
+*                   (b) Validate   cache
+*                   (c) Initialize cache
+*                   (d) Update cache pool statistics
+*                   (e) Return pointer to cache
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*               (2) The cache pool is implemented as a stack :
+*
+*                   (a) Caches' 'PoolPtr's points to the head of the   cache pool.
+*
+*                   (b) Caches' 'NextPtr's link each cache to form the cache pool stack.
+*
+*                   (c) Caches are inserted & removed at the head of   cache pool stack.
+*
+*
+*                                         Caches are
+*                                     inserted & removed
+*                                        at the head
+*                                       (see Note #2c)
+*
+*                                             |                 NextPtr
+*                                             |             (see Note #2b)
+*                                             v                    |
+*                                                                  |
+*                                          -------       -------   v   -------       -------
+*                              Pool   ---->|     |------>|     |------>|     |------>|     |
+*                            Pointer       |     |       |     |       |     |       |     |
+*                                          |     |       |     |       |     |       |     |
+*                         (see Note #2a)   -------       -------       -------       -------
+*
+*                                          |                                               |
+*                                          |<------------ Pool of Free Caches ------------>|
+*                                          |                (see Note #2)                  |
+*
+*
+* Argument(s) : cache_type      Cache type:
+*
+*                                   NET_CACHE_TYPE_ARP     ARP cache type
+*                                   NET_CACHE_TYPE_NDP     NDP neighbor cache type
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CACHE_ERR_NONE                  Cache successfully allocated &
+*                                                                       initialized.
+*                               NET_CACHE_ERR_NONE_AVAIL            NO available caches to allocate.
+*                               NET_CACHE_ERR_INVALID_TYPE          Cache is NOT a valid cache type.
+*
+* Return(s)   : Pointer to cache, if NO error(s).
+*
+*               Pointer to NULL,  otherwise.
+*
+* Caller(s)   : NetCache_CfgAddrs().
+*
+* Note(s)     : (3) (a) Cache pool is accessed by 'NetARP_CachePoolPtr' during execution of
+*
+*                       (1) NetARP_Init()
+*                       (2) NetNDP_Init()
+*                       (3) NetCache_AddrGet()
+*                       (4) NetCache_AddrFree()
+*
+*                   (b) Since the primary tasks of the network protocol suite are prevented from running
+*                       concurrently (see 'net.h  Note #3'), it is NOT necessary to protect the shared
+*                       resources of the cache pool since no asynchronous access from other network
+*                       tasks is possible.
+*
+*               (4) 'No cache available' case NOT possible during correct operation of  the cache.
+*                   However, the 'else' case is included as an extra precaution in case the cache
+*                   list is incorrectly modified &/or corrupted.
+*********************************************************************************************************
+*/
+
+static  NET_CACHE_ADDR  *NetCache_AddrGet(NET_CACHE_TYPE   cache_type,
+                                          NET_ERR         *p_err)
+{
+#ifdef  NET_ARP_MODULE_EN
+    NET_CACHE_ADDR_ARP  *pcache_addr_arp;
+#endif
+#ifdef  NET_NDP_MODULE_EN
+    NET_CACHE_ADDR_NDP  *pcache_addr_ndp;
+#endif
+    NET_CACHE_ADDR      *pcache;
+    NET_ERR              err;
+
+
+    switch (cache_type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:                                        /* -------------- GET ARP CACHE --------------- */
+             if (NetCache_AddrARP_PoolPtr != DEF_NULL) {                /* If ARP cache pool NOT empty, ...             */
+                                                                        /* ...  get cache from pool.                    */
+                 pcache_addr_arp           = NetCache_AddrARP_PoolPtr;
+                 NetCache_AddrARP_PoolPtr  = (NET_CACHE_ADDR_ARP *)pcache_addr_arp->NextPtr;
+
+             } else {                                                   /* If ARP Cache List NOT empty, ...              */
+                                                                        /* ... get ARP cache from list tail.             */
+                 NET_CACHE_ADDR  *p_entry = NetCache_AddrListTail[NET_CACHE_ADDR_LIST_IX_ARP];
+
+
+                 while (p_entry != DEF_NULL) {
+
+                     if (p_entry->AddrHW_Valid == DEF_YES) {            /* Make sure to remove only a resolved entry.    */
+                         break;
+                     }
+
+                     p_entry = p_entry->NextPtr;
+                 }
+
+                 if (p_entry == DEF_NULL) {
+                     NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NoneAvailCtr);
+                    *p_err =   NET_CACHE_ERR_NONE_AVAIL;
+                     return (DEF_NULL);
+                 }
+
+                 NetCache_Remove(p_entry, DEF_YES);
+                 p_entry                   = (NET_CACHE_ADDR     *)NetCache_AddrARP_PoolPtr;
+                 NetCache_AddrARP_PoolPtr  = (NET_CACHE_ADDR_ARP *)p_entry->NextPtr;
+
+                 pcache_addr_arp = (NET_CACHE_ADDR_ARP  *)p_entry;
+             }
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                         /* ------------- VALIDATE CACHE --------------- */
+             if (pcache_addr_arp->Type != NET_CACHE_TYPE_ARP) {
+                 NetCache_Discard((NET_CACHE_ADDR *)pcache_addr_arp);
+                 NET_CTR_ERR_INC(Net_ErrCtrs.ARP.InvTypeCtr);
+                *p_err =   NET_CACHE_ERR_INVALID_TYPE;
+                 return ((NET_CACHE_ADDR *)0);
+             }
+#endif
+
+                                                                        /* ---------------- INIT CACHE ---------------- */
+             NetCache_Clr((NET_CACHE_ADDR *)pcache_addr_arp);
+             DEF_BIT_SET(pcache_addr_arp->Flags, NET_CACHE_FLAG_USED);  /* Set cache as used.                           */
+
+                                                                        /* --------- UPDATE CACHE POOL STATS ---------- */
+             NetStat_PoolEntryUsedInc(&NetCache_AddrARP_PoolStat, &err);
+
+             pcache = (NET_CACHE_ADDR *)pcache_addr_arp;
+
+            *p_err =  NET_CACHE_ERR_NONE;
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:                                        /* -------------- GET NDP CACHE --------------- */
+
+             if (NetCache_AddrNDP_PoolPtr != DEF_NULL) {                /* If ARP cache pool NOT empty, ...             */
+                                                                        /* ...  get cache from pool.                    */
+                 pcache_addr_ndp           = NetCache_AddrNDP_PoolPtr;
+                 NetCache_AddrNDP_PoolPtr  = (NET_CACHE_ADDR_NDP *)pcache_addr_ndp->NextPtr;
+
+             } else {                                                   /* If ARP Cache List NOT empty, ...              */
+                                                                        /* ... get ARP cache from list tail.             */
+                 NET_CACHE_ADDR  *p_entry = NetCache_AddrListTail[NET_CACHE_ADDR_LIST_IX_NDP];
+
+
+                 while (p_entry != DEF_NULL) {
+
+                     if (p_entry->AddrHW_Valid == DEF_YES) {            /* Make sure to remove only a resolved entry.    */
+                         break;
+                     }
+
+                     p_entry = p_entry->NextPtr;
+                 }
+
+                 if (p_entry == DEF_NULL) {
+                     NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NoneAvailCtr);
+                    *p_err =   NET_CACHE_ERR_NONE_AVAIL;
+                     return (DEF_NULL);
+                 }
+
+
+                 NetCache_Remove(p_entry, DEF_YES);
+                 pcache_addr_ndp           = NetCache_AddrNDP_PoolPtr;
+                 NetCache_AddrNDP_PoolPtr  = (NET_CACHE_ADDR_NDP *)p_entry->NextPtr;
+
+                 pcache_addr_ndp = (NET_CACHE_ADDR_NDP  *)p_entry;
+             }
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                         /* ------------- VALIDATE CACHE --------------- */
+             if (pcache_addr_ndp->Type != NET_CACHE_TYPE_NDP) {
+                 NetCache_Discard((NET_CACHE_ADDR *)pcache_addr_ndp);
+                 NET_CTR_ERR_INC(Net_ErrCtrs.NDP.InvTypeCtr);
+                *p_err =   NET_CACHE_ERR_INVALID_TYPE;
+                 return ((NET_CACHE_ADDR *)0);
+             }
+#endif
+
+                                                                        /* ---------------- INIT CACHE ---------------- */
+             NetCache_Clr((NET_CACHE_ADDR *)pcache_addr_ndp);
+             DEF_BIT_SET(pcache_addr_ndp->Flags, NET_CACHE_FLAG_USED);  /* Set cache as used.                           */
+
+                                                                        /* --------- UPDATE CACHE POOL STATS ---------- */
+             NetStat_PoolEntryUsedInc(&NetCache_AddrNDP_PoolStat, &err);
+
+             pcache       = (NET_CACHE_ADDR *)pcache_addr_ndp;
+             pcache->Type = cache_type;
+
+            *p_err   =  NET_CACHE_ERR_NONE;
+             break;
+#endif
+
+        default:
+            *p_err = NET_CACHE_ERR_INVALID_TYPE;
+             return ((NET_CACHE_ADDR *)0);
+    }
+
+    return (pcache);
+}
+
+/*
+*********************************************************************************************************
+*                                         NetCache_AddrFree()
+*
+* Description : (1) Free a cache :
+*
+*                   (a) Free   cache timer
+*                   (b) Free   cache buffer queue
+*                   (c) Clear  cache controls
+*                   (d) Free   cache back to cache pool
+*                   (e) Update cache pool statistics
+*
+*
+* Argument(s) : pcache      Pointer to a cache.
+*               ------      Argument checked in NetCache_CfgAddrs(),
+*                                               NetCache_Remove()
+*                                                 by NetCache_AddrGet(),
+*                                                    NetARP_CacheHandler(),
+*                                                    NetARP_CacheReqTimeout(),
+*                                                    NetARP_CacheTimeout(),
+*                                                    NetNDP_CacheHandler(),
+*                                                    NetNDP_CacheReqTimeout(),
+*                                                    NetNDP_CacheTimeout().
+*
+*               tmr_free    Indicate whether to free network timer :
+*
+*                               DEF_YES                Free network timer for cache.
+*                               DEF_NO          Do NOT free network timer for cache
+*                                                     [Freed by  NetTmr_TaskHandler()
+*                                                            via NetCache_Remove()].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetCache_CfgAddrs(),
+*               NetCache_Remove().
+*
+* Note(s)     : (2) #### To prevent freeing an cache already freed via previous cache free,
+*                   NetCache_AddrFree() checks the cache's 'USED' flag BEFORE freeing the cache.
+*
+*                   This prevention is only best-effort since any invalid duplicate cache frees
+*                   MAY be asynchronous to potentially valid cache gets.  Thus the invalid cache
+*                   free(s) MAY corrupt the cache's valid operation(s).
+*
+*                   However, since the primary tasks of the network protocol suite are prevented from
+*                   running concurrently (see 'net.h  Note #3'), it is NOT necessary to protect cache
+*                   resources from possible corruption since no asynchronous access from other network
+*                   tasks is possible.
+*
+*               (3) When a cache in the 'PENDING' state is freed, it discards its transmit packet
+*                   buffer queue.  The discard is performed by the network interface layer since it is
+*                   the last layer to initiate transmission for these packet buffers.
+*********************************************************************************************************
+*/
+
+static  void  NetCache_AddrFree (NET_CACHE_ADDR  *pcache,
+                                 CPU_BOOLEAN      tmr_free)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN              used;
+#endif
+#ifdef  NET_ARP_MODULE_EN
+    NET_ARP_CACHE           *pcache_arp;
+#endif
+#ifdef  NET_NDP_MODULE_EN
+    NET_NDP_NEIGHBOR_CACHE  *pcache_ndp;
+#endif
+    NET_CTR                 *pctr;
+    NET_ERR                  err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                    /* ------------ VALIDATE ARP CACHE USED ----------- */
+    used = DEF_BIT_IS_SET(pcache->Flags, NET_CACHE_FLAG_USED);
+    if (used != DEF_YES) {                                          /* If ARP cache NOT used, ...                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Cache.NotUsedCtr);
+        return;                                                     /* ... rtn but do NOT free (see Note #2).           */
+    }
+#endif
+
+    pcache->AddrHW_Valid            = DEF_NO;
+    pcache->AddrProtocolValid       = DEF_NO;
+    pcache->AddrProtocolSenderValid = DEF_NO;
+
+    switch (pcache->Type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:
+                                                                        /* ------------ FREE ARP CACHE TMR ------------ */
+            pcache_arp = (NET_ARP_CACHE *)NetCache_GetParent(pcache);
+            if (tmr_free == DEF_YES) {
+                 if (pcache_arp->TmrPtr != (NET_TMR *)0) {
+                     NetTmr_Free(pcache_arp->TmrPtr);
+                 }
+             }
+
+                                                                        /* ----------- FREE ARP CACHE BUF Q ----------- */
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+             pctr = &Net_ErrCtrs.Cache.TxPktDisCtr;                     /* See Note #3.                                 */
+#else
+             pctr = (NET_CTR *) 0;
+#endif
+            (void)NetBuf_FreeBufQ_SecList(pcache->TxQ_Head,
+                                          pctr,
+                                         &NetCache_UnlinkBuf);
+
+             pcache->TxQ_Nbr = 0;
+
+                                                                        /* --------------- CLR ARP CACHE -------------- */
+             pcache_arp->State = NET_ARP_CACHE_STATE_FREE;              /* Set ARP cache as freed/NOT used.             */
+             DEF_BIT_CLR(pcache->Flags, NET_CACHE_FLAG_USED);
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+             NetCache_Clr(pcache);
+#endif
+
+                                                                        /* -------------- FREE ARP CACHE -------------- */
+             pcache->NextPtr          = (NET_CACHE_ADDR     *)NetCache_AddrARP_PoolPtr;
+             NetCache_AddrARP_PoolPtr = (NET_CACHE_ADDR_ARP *)pcache;
+
+                                                                        /* ------- UPDATE ARP CACHE POOL STATS -------- */
+             NetStat_PoolEntryUsedDec(&NetCache_AddrARP_PoolStat, &err);
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:
+                                                                        /* ------------ FREE NDP CACHE TMR ------------ */
+             pcache_ndp = (NET_NDP_NEIGHBOR_CACHE *)NetCache_GetParent(pcache);
+             if (tmr_free == DEF_YES) {
+                 if (pcache_ndp->TmrPtr != (NET_TMR *)0) {
+                     NetTmr_Free(pcache_ndp->TmrPtr);
+                 }
+             }
+
+                                                                        /* ----------- FREE NDP CACHE BUF Q ----------- */
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+             pctr = &Net_ErrCtrs.Cache.TxPktDisCtr;                     /* See Note #3.                                 */
+#else
+             pctr = (NET_CTR *) 0;
+#endif
+            (void)NetBuf_FreeBufQ_SecList((NET_BUF    *)pcache->TxQ_Head,
+                                          (NET_CTR    *)pctr,
+                                          (NET_BUF_FNCT)NetCache_UnlinkBuf);
+
+            pcache->TxQ_Nbr = 0;
+                                                                        /* --------------- CLR NDP CACHE -------------- */
+             pcache_ndp->State = NET_NDP_CACHE_STATE_NONE;              /* Set NDP cache as freed/NOT used.             */
+             pcache_ndp->ReqAttemptsCtr = 0;
+             DEF_BIT_CLR(pcache->Flags, NET_CACHE_FLAG_USED);
+
+             pcache_ndp->CacheAddrPtr->AddrProtocolPrefixLen = 0u;      /* Clr prefix len.                              */
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+             NetCache_Clr(pcache);
+#endif
+
+                                                                        /* -------------- FREE NDP CACHE -------------- */
+             pcache->NextPtr          = (NET_CACHE_ADDR     *)NetCache_AddrNDP_PoolPtr;
+             NetCache_AddrNDP_PoolPtr = (NET_CACHE_ADDR_NDP *)pcache;
+
+             pcache->Type             = NET_CACHE_TYPE_NDP;
+                                                                        /* ------- UPDATE NDP CACHE POOL STATS -------- */
+             NetStat_PoolEntryUsedDec(&NetCache_AddrNDP_PoolStat, &err);
+             break;
+#endif
+
+        default:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+            NetCache_Discard(pcache);
+#endif
+            return;
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                          NetCache_Unlink()
+*
+* Description : Unlink a cache from the Cache List.
+*
+* Argument(s) : pcache      Pointer to a cache.
+*               ------      Argument checked in NetCache_AddrSrch();
+*                                               NetCache_Remove()
+*                                                 by NetCacheGet(),
+*                                                    NetARP_CacheHandler(),
+*                                                    NetARP_CacheReqTimeout(),
+*                                                    NetARP_CacheTimeout(),
+*                                                    NetNDP_CacheHandler(),
+*                                                    NetNDP_CacheReqTimeout(),
+*                                                    NetNDP_CacheTimeout().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetCache_AddrSrch(),
+*               NetCache_Remove().
+*
+* Note(s)     : (1) Since NetCache_Unlink() called ONLY to remove & then re-link or free caches,
+*                   it is NOT necessary to clear the entry's previous & next pointers.  However, pointers
+*                   cleared to NULL shown for correctness & completeness.
+*********************************************************************************************************
+*/
+
+static  void  NetCache_Unlink (NET_CACHE_ADDR  *pcache)
+{
+    NET_CACHE_ADDR  *pcache_next;
+    NET_CACHE_ADDR  *pcache_prev;
+
+
+    pcache_prev = pcache->PrevPtr;
+    pcache_next = pcache->NextPtr;
+
+    switch (pcache->Type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:                                /* ------- UNLINK ARP CACHE FROM ARP CACHE LIST ------- */
+                                                                /* Point prev ARP cache to next ARP cache.              */
+             if (pcache_prev != DEF_NULL) {
+                 pcache_prev->NextPtr                              = pcache_next;
+             } else {
+                 NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_ARP] = pcache_next;
+             }
+                                                                /* Point next ARP cache to prev ARP cache.              */
+             if (pcache_next != DEF_NULL) {
+                 pcache_next->PrevPtr                              = pcache_prev;
+             } else {
+                 NetCache_AddrListTail[NET_CACHE_ADDR_LIST_IX_ARP] = pcache_prev;
+             }
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)                     /* Clr ARP cache's ptrs (see Note #1).                  */
+             pcache->PrevPtr = (NET_CACHE_ADDR *)0;
+             pcache->NextPtr = (NET_CACHE_ADDR *)0;
+#endif
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:                                /* ------- UNLINK NDP CACHE FROM NDP CACHE LIST ------- */
+                                                                /* Point prev NDP cache to next NDP cache.              */
+             if (pcache_prev != (NET_CACHE_ADDR *)0) {
+                 pcache_prev->NextPtr                              = pcache_next;
+             } else {
+                 NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_NDP] = pcache_next;
+             }
+                                                                /* Point next NDP cache to prev NDP cache.              */
+             if (pcache_next != (NET_CACHE_ADDR *)0) {
+                 pcache_next->PrevPtr                              = pcache_prev;
+             } else {
+                 NetCache_AddrListTail[NET_CACHE_ADDR_LIST_IX_NDP] = pcache_prev;
+             }
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)                     /* Clr NDP cache's ptrs (see Note #1).                  */
+             pcache->PrevPtr = (NET_CACHE_ADDR *)0;
+             pcache->NextPtr = (NET_CACHE_ADDR *)0;
+#endif
+             break;
+#endif
+
+        default:
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetCache_IsUsed()
+*
+* Description : Validate cache in use.
+*
+* Argument(s) : pcache      Pointer to object to validate as a cache in use.
+*
+* Return(s)   : DEF_YES, cache   valid &      in use.
+*
+*               DEF_NO,  cache invalid or NOT in use.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) NetCache_IsUsed() MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  NetCache_IsUsed (NET_CACHE_ADDR  *pcache)
+{
+    CPU_BOOLEAN     used;
+
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (pcache == (NET_CACHE_ADDR *)0) {
+        return (DEF_NO);
+    }
+
+                                                                /* ------------------ VALIDATE TYPE ------------------- */
+    if ((pcache->Type != NET_CACHE_TYPE_ARP)  &&
+        (pcache->Type != NET_CACHE_TYPE_NDP)) {
+        return (DEF_NO);
+    }
+
+                                                                /* ------------- VALIDATE ARP CACHE USED -------------- */
+    used = DEF_BIT_IS_SET(pcache->Flags, NET_CACHE_FLAG_USED);
+
+    return (used);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         NetCache_Discard()
+*
+* Description : (1) Discard an invalid/corrupted cache :
+*
+*                   (a) Discard cache from available cache pool                     See Note #2
+*                   (b) Update  cache pool statistics
+*
+*               (2) Assumes cache is invalid/corrupt & MUST be removed.  Cache removed
+*                   simply by NOT returning the cache back to the cache pool.
+*
+*
+* Argument(s) : pcache      Pointer to an invalid/corrupted cache.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetCache_AddrGet(),
+*               NetCache_AddrFree().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+void  NetCache_Discard (NET_CACHE_ADDR  *pcache)
+{
+    NET_ERR  err;
+
+
+    switch (pcache->Type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:
+                                                                /* ---------------- DISCARD ARP CACHE ----------------- */
+             if (pcache == (NET_CACHE_ADDR *)0) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.ARP.NullPtrCtr);
+                 return;
+             }
+                                                                /* --------------- UPDATE DISCARD STATS --------------- */
+             NetStat_PoolEntryLostInc(&NetCache_AddrARP_PoolStat, &err);
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:
+                                                                /* ---------------- DISCARD NDP CACHE ----------------- */
+             if (pcache == (NET_CACHE_ADDR *)0) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.NDP.NullPtrCtr);
+                 return;
+             }
+                                                                /* --------------- UPDATE DISCARD STATS --------------- */
+             NetStat_PoolEntryLostInc(&NetCache_AddrNDP_PoolStat, &err);
+             break;
+#endif
+
+        default:
+             return;
+    }
+
+   (void)&pcache;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           NetCache_Clr()
+*
+* Description : Clear cache controls.
+*
+* Argument(s) : pcache      Pointer to a cache.
+*               ------      Argument validated in NetCache_AddrGet(),
+*                                                 NetCache_AddrFree(),
+*                                                 NetARP_Init(),
+*                                                 NetNDP_Init().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetCache_AddrGet(),
+*               NetCache_AddrFree(),
+*               NetARP_Init(),
+*               NetNDP_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetCache_Clr (NET_CACHE_ADDR  *pcache)
+{
+
+#ifdef  NET_ARP_MODULE_EN
+    NET_CACHE_ADDR_ARP  *pcache_addr_arp;
+#endif
+#ifdef  NET_NDP_MODULE_EN
+    NET_CACHE_ADDR_NDP  *pcache_addr_ndp;
+#endif
+
+
+    pcache->PrevPtr                 = (NET_CACHE_ADDR *)0;
+    pcache->NextPtr                 = (NET_CACHE_ADDR *)0;
+    pcache->TxQ_Head                = (NET_BUF *)0;
+    pcache->TxQ_Tail                = (NET_BUF *)0;
+    pcache->TxQ_Nbr                 =  0;
+    pcache->IF_Nbr                  =  NET_IF_NBR_NONE;
+    pcache->AccessedCtr             =  0u;
+    pcache->Flags                   =  NET_CACHE_FLAG_NONE;
+
+    pcache->AddrHW_Valid            = DEF_NO;
+    pcache->AddrProtocolValid       = DEF_NO;
+    pcache->AddrProtocolSenderValid = DEF_NO;
+
+
+    switch (pcache->Type) {
+#ifdef  NET_ARP_MODULE_EN
+        case NET_CACHE_TYPE_ARP:
+             pcache_addr_arp = (NET_CACHE_ADDR_ARP *)pcache;
+
+             Mem_Clr((void     *)&pcache_addr_arp->AddrHW[0],
+                     (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+             Mem_Clr((void     *)&pcache_addr_arp->AddrProtocol[0],
+                     (CPU_SIZE_T) NET_IPv4_ADDR_SIZE);
+             Mem_Clr((void     *)&pcache_addr_arp->AddrProtocolSender[0],
+                     (CPU_SIZE_T) NET_IPv4_ADDR_SIZE);
+             break;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+        case NET_CACHE_TYPE_NDP:
+             pcache_addr_ndp = (NET_CACHE_ADDR_NDP *)pcache;
+
+             Mem_Clr((void     *)&pcache_addr_ndp->AddrHW[0],
+                     (CPU_SIZE_T) NET_IF_HW_ADDR_LEN_MAX);
+             Mem_Clr((void     *)&pcache_addr_ndp->AddrProtocol[0],
+                     (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+             Mem_Clr((void     *)&pcache_addr_ndp->AddrProtocolSender[0],
+                     (CPU_SIZE_T) NET_IPv6_ADDR_SIZE);
+             break;
+#endif
+
+        default:
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* NET_CACHE_MODULE_EN */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_cache.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_cache.h
new file mode 100644
index 0000000..8cf0b31
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_cache.h
@@ -0,0 +1,423 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  NETWORK ADDRESS CACHE MANAGEMENT
+*
+* Filename      : net_cache.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SL
+*********************************************************************************************************
+* Note(s)       : (1) Address cache management module ONLY required for network interfaces that require
+*                     network-address-to-hardware-address bindings (see RFC #826 'Abstract').
+*
+*                 (2) Supports Address Resolution Protocol as described in RFC #826 with the following
+*                     restrictions/constraints :
+*
+*                     (a) ONLY supports the following hardware types :
+*                         (1) 48-bit Ethernet
+*
+*                     (b) ONLY supports the following protocol types :
+*                         (1)  32-bit IPv4
+*                         (2) 128-bit IPv6
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  "net_def.h"
+#include  "net_tmr.h"
+#include  "net_type.h"
+#include  "net_stat.h"
+#include  "net_err.h"
+#include  
+#include  
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) Address cache management module is required for some network interfaces (see 'net_cache.h  Note #1').
+*
+*           (2) (a) The following CACHE-module-present configuration value MUST be pre-#define'd
+*                   in 'net_cfg_net.h' PRIOR to all other network modules that require cache Layer
+*                   configuration (see 'net_cfg_net.h  NETWORK ADDRESS CACHE MANAGEMENT LAYER
+*                   CONFIGURATION  Note #1') :
+*
+*                       NET_CACHE_MODULE_EN
+*
+*               (b) Since CACHE-module-present configuration is already pre-#define'd in 'net_cfg_net.h'
+*                   (see Note #2a), the cache module is protected from multiple pre-processor inclusion
+*                   through use of a module-already-available pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  NET_CACHE_MODULE_PRESENT                               /* See Note #2b.                                        */
+#define  NET_CACHE_MODULE_PRESENT
+
+#ifdef   NET_CACHE_MODULE_EN                                    /* See Note #2a.                                        */
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef NET_CACHE_MODULE
+#define  NET_CACHE_EXT
+#else
+#define  NET_CACHE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  NETWORK CACHE LIST INDEX DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_CACHE_ADDR_LIST_IX_ARP                        0u
+#define  NET_CACHE_ADDR_LIST_IX_NDP                        1u
+
+#define  NET_CACHE_ADDR_LIST_IX_MAX                        2u
+
+
+/*
+*********************************************************************************************************
+*                                     NETWORK CACHE FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------- NET CACHE FLAGS ------------------ */
+#define  NET_CACHE_FLAG_NONE                      DEF_BIT_NONE
+#define  NET_CACHE_FLAG_USED                      DEF_BIT_00    /* Cache cur used; i.e. NOT in free cache pool.         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         NETWORK CACHE TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  net_cache_type {
+    NET_CACHE_TYPE_NONE = 0,
+    NET_CACHE_TYPE_ARP,
+    NET_CACHE_TYPE_NDP
+} NET_CACHE_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK CACHE ADDRESS LENGTH DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_CACHE_ADDR_LEN;
+
+
+/*
+*********************************************************************************************************
+*                                NETWORK CACHE ADDRESS TYPE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_CACHE_ADDR_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK CACHE ADDRESS DATA TYPES
+*********************************************************************************************************
+*/
+                                                                        /* --------------- NET CACHE ADDR ------------- */
+typedef  struct  net_cache_addr  NET_CACHE_ADDR;
+
+struct  net_cache_addr {
+    NET_CACHE_TYPE        Type;                                         /* Type cfg'd @ init.                           */
+
+    NET_CACHE_ADDR       *PrevPtr;                                      /* Ptr to PREV   addr cache.                    */
+    NET_CACHE_ADDR       *NextPtr;                                      /* Ptr to NEXT   addr cache.                    */
+    void                 *ParentPtr;                                    /* Ptr to parent addr cache.                    */
+
+    NET_BUF              *TxQ_Head;                                     /* Ptr to head of cache's buf Q.                */
+    NET_BUF              *TxQ_Tail;                                     /* Ptr to tail of cache's buf Q.                */
+    NET_BUF_QTY           TxQ_Nbr;
+
+    NET_IF_NBR            IF_Nbr;                                       /* IF nbr of     addr cache.                    */
+
+    CPU_INT16U            AccessedCtr;                                  /* Nbr successful srchs.                        */
+
+    CPU_INT16U            Flags;                                        /* Cache flags.                                 */
+
+    NET_CACHE_ADDR_TYPE   AddrHW_Type;                                  /* Remote hw       type     (see Note #2).      */
+    CPU_INT08U            AddrHW_Len;                                   /* Remote hw       addr len (see Note #2).      */
+    CPU_BOOLEAN           AddrHW_Valid;                                 /* Remote hw       addr        valid flag.      */
+
+    NET_CACHE_ADDR_TYPE   AddrProtocolType;                             /* Remote protocol type     (see Note #2).      */
+    CPU_INT08U            AddrProtocolLen;                              /* Remote protocol addr len (see Note #2).      */
+    CPU_BOOLEAN           AddrProtocolValid;                            /* Remote protocol addr        valid flag.      */
+
+    CPU_BOOLEAN           AddrProtocolSenderValid;                      /* Remote protocol addr sender valid flag.      */
+};
+
+
+#ifdef  NET_ARP_MODULE_EN
+                                                                        /* ------------- NET CACHE ADDR ARP ----------- */
+typedef  struct  net_cache_addr_arp  NET_CACHE_ADDR_ARP;
+
+struct  net_cache_addr_arp {
+    NET_CACHE_TYPE        Type;                                         /* Type cfg'd @ init : NET_ARP_TYPE_CACHE.      */
+
+    NET_CACHE_ADDR_ARP   *PrevPtr;                                      /* Ptr to PREV       ARP addr  cache.           */
+    NET_CACHE_ADDR_ARP   *NextPtr;                                      /* Ptr to NEXT       ARP addr  cache.           */
+    void                 *ParentPtr;                                    /* Ptr to the parent ARP       cache.           */
+
+    NET_BUF              *TxQ_Head;                                     /* Ptr to head of cache's buf Q.                */
+    NET_BUF              *TxQ_Tail;                                     /* Ptr to tail of cache's buf Q.                */
+    NET_BUF_QTY           TxQ_Nbr;
+
+    NET_IF_NBR            IF_Nbr;                                       /* IF nbr of         ARP addr  cache.           */
+
+    CPU_INT16U            AccessedCtr;                                  /* Nbr successful srchs.                        */
+
+    CPU_INT16U            Flags;                                        /* Cache flags.                                 */
+
+    NET_CACHE_ADDR_TYPE   AddrHW_Type;                                  /* Remote hw       type     (see Note #2).      */
+    CPU_INT08U            AddrHW_Len;                                   /* Remote hw       addr len (see Note #2).      */
+    CPU_BOOLEAN           AddrHW_Valid;                                 /* Remote hw       addr        valid flag.      */
+
+    NET_CACHE_ADDR_TYPE   AddrProtocolType;                             /* Remote protocol type     (see Note #2).      */
+    CPU_INT08U            AddrProtocolLen;                              /* Remote protocol addr len (see Note #2).      */
+    CPU_BOOLEAN           AddrProtocolValid;                            /* Remote protocol addr        valid flag.      */
+
+    CPU_BOOLEAN           AddrProtocolSenderValid;                      /* Remote protocol addr sender valid flag.      */
+
+    CPU_INT08U            AddrHW[NET_IF_HW_ADDR_LEN_MAX];               /* Remote hw       addr.                        */
+
+                                                                        /* Remote protocol addr.                        */
+    CPU_INT08U            AddrProtocol[NET_IPv4_ADDR_SIZE];
+
+                                                                        /* Sender protocol addr.                        */
+    CPU_INT08U            AddrProtocolSender[NET_IPv4_ADDR_SIZE];
+};
+#endif
+
+
+#ifdef  NET_NDP_MODULE_EN
+                                                                        /* ------------- NET CACHE ADDR NDP ----------- */
+typedef  struct  net_cache_addr_ndp  NET_CACHE_ADDR_NDP;
+
+struct  net_cache_addr_ndp {
+    NET_CACHE_TYPE       Type;                                          /* Type cfg'd @ init : NET_NDP_TYPE_CACHE.      */
+
+    NET_CACHE_ADDR_NDP  *PrevPtr;                                       /* Ptr to PREV       NDP addr  cache.           */
+    NET_CACHE_ADDR_NDP  *NextPtr;                                       /* Ptr to NEXT       NDP addr  cache.           */
+    void                *ParentPtr;                                     /* Ptr to the parent NDP       cache.           */
+
+    NET_BUF             *TxQ_Head;                                      /* Ptr to head of cache's buf Q.                */
+    NET_BUF             *TxQ_Tail;                                      /* Ptr to tail of cache's buf Q.                */
+    NET_BUF_QTY          TxQ_Nbr;
+
+    NET_IF_NBR           IF_Nbr;                                        /* IF nbr of         NDP addr  cache.           */
+
+    CPU_INT16U           AccessedCtr;                                   /* Nbr successful srchs.                        */
+
+    CPU_INT16U           Flags;                                         /* Cache flags.                                 */
+
+    NET_CACHE_ADDR_TYPE  AddrHW_Type;                                   /* Remote hw       type     (see Note #2).      */
+    CPU_INT08U           AddrHW_Len;                                    /* Remote hw       addr len (see Note #2).      */
+    CPU_BOOLEAN          AddrHW_Valid;                                  /* Remote hw       addr        valid flag.      */
+
+    NET_CACHE_ADDR_TYPE  AddrProtocolType;                              /* Remote protocol type     (see Note #2).      */
+    CPU_INT08U           AddrProtocolLen;                               /* Remote protocol addr len (see Note #2).      */
+    CPU_BOOLEAN          AddrProtocolValid;                             /* Remote protocol addr        valid flag.      */
+
+    CPU_BOOLEAN          AddrProtocolSenderValid;                       /* Remote protocol addr sender valid flag.      */
+
+    CPU_INT08U           AddrHW[NET_IF_HW_ADDR_LEN_MAX];                /* Remote hw       addr.                        */
+
+                                                                        /* Remote protocol addr.                        */
+    CPU_INT08U           AddrProtocol[NET_IPv6_ADDR_SIZE];
+
+                                                                        /* Sender protocol addr.                        */
+    CPU_INT08U           AddrProtocolSender[NET_IPv6_ADDR_SIZE];
+
+    CPU_INT08U           AddrProtocolPrefixLen;                         /* Remote protocol addr prefix len (in bits).   */
+
+    KAL_SEM_HANDLE      *RxQ_SignalPtr;
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_ARP_MODULE_EN
+NET_CACHE_EXT  NET_CACHE_ADDR_ARP   NetCache_AddrARP_Tbl[NET_ARP_CFG_CACHE_NBR];
+NET_CACHE_EXT  NET_CACHE_ADDR_ARP  *NetCache_AddrARP_PoolPtr;           /* Ptr to pool of free ARP caches.              */
+NET_CACHE_EXT  NET_STAT_POOL        NetCache_AddrARP_PoolStat;
+#endif
+
+#ifdef  NET_NDP_MODULE_EN
+NET_CACHE_EXT  NET_CACHE_ADDR_NDP   NetCache_AddrNDP_Tbl[NET_NDP_CFG_CACHE_NBR];
+NET_CACHE_EXT  NET_CACHE_ADDR_NDP  *NetCache_AddrNDP_PoolPtr;           /* Ptr to pool of free NDP caches.              */
+NET_CACHE_EXT  NET_STAT_POOL        NetCache_AddrNDP_PoolStat;
+#endif
+
+NET_CACHE_EXT  NET_CACHE_ADDR      *NetCache_AddrListHead[NET_CACHE_ADDR_LIST_IX_MAX];
+NET_CACHE_EXT  NET_CACHE_ADDR      *NetCache_AddrListTail[NET_CACHE_ADDR_LIST_IX_MAX];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+
+void                NetCache_Init         (NET_CACHE_ADDR      *p_cache_parent,
+                                           NET_CACHE_ADDR      *p_cache_addr,
+                                           NET_ERR             *p_err);
+
+                                                                            /* -------------- CFG FNCTS --------------- */
+CPU_BOOLEAN         NetCache_CfgAccessedTh(NET_CACHE_TYPE       cache_type,
+                                           CPU_INT16U           nbr_access);
+
+NET_CACHE_ADDR     *NetCache_CfgAddrs     (NET_CACHE_TYPE       cache_type,
+                                           NET_IF_NBR           if_nbr,
+                                           CPU_INT08U          *p_addr_hw,
+                                           NET_CACHE_ADDR_LEN   addr_hw_len,
+                                           CPU_INT08U          *p_addr_protocol,
+                                           CPU_INT08U          *p_addr_protocol_sender,
+                                           NET_CACHE_ADDR_LEN   addr_protocol_len,
+                                           CPU_BOOLEAN          timer_en,
+                                           CPU_FNCT_PTR         timeout_fnct,
+                                           NET_TMR_TICK         timeout_tick,
+                                           NET_ERR             *p_err);
+
+                                                                            /* -------------- MGMT FNCTS -------------- */
+void               *NetCache_GetParent    (NET_CACHE_ADDR      *p_cache);
+
+NET_CACHE_ADDR     *NetCache_AddrSrch     (NET_CACHE_TYPE       cache_type,
+                                           NET_IF_NBR           if_nbr,
+                                           CPU_INT08U          *p_addr_protocol,
+                                           NET_CACHE_ADDR_LEN   addr_protocol_len,
+                                           NET_ERR             *p_err);
+
+void                NetCache_AddResolved  (NET_IF_NBR           if_nbr,
+                                           CPU_INT08U          *p_addr_hw,
+                                           CPU_INT08U          *p_addr_protocol,
+                                           NET_CACHE_TYPE       cache_type,
+                                           CPU_FNCT_PTR         fnct,
+                                           NET_TMR_TICK         timeout_tick,
+                                           NET_ERR             *p_err);
+
+void                NetCache_Insert       (NET_CACHE_ADDR      *p_cache);
+
+void                NetCache_Remove       (NET_CACHE_ADDR      *p_cache,
+                                           CPU_BOOLEAN          tmr_free);
+
+void                NetCache_UnlinkBuf    (NET_BUF             *p_buf);
+
+                                                                            /* --------------- TX FNCTS --------------- */
+void                NetCache_TxPktHandler (NET_PROTOCOL_TYPE    proto_type,
+                                           NET_BUF             *p_buf_q,
+                                           CPU_INT08U          *p_addr_hw);
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif  /* NET_CACHE_MODULE_EN      */
+#endif  /* NET_CACHE_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_cfg_net.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_cfg_net.h
new file mode 100644
index 0000000..4a6f155
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_cfg_net.h
@@ -0,0 +1,503 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        NETWORK CONFIGURATION
+*
+* Filename      : net_cfg_net.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 SL
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_CFG_NET_MODULE_PRESENT
+#define  NET_CFG_NET_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                    NETWORK CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_ERR_CFG_ARG_CHK_EXT_EN
+#error  "NET_ERR_CFG_ARG_CHK_EXT_EN        not #define'd in 'net_cfg.h'"
+#error  "                            [MUST be  DEF_DISABLED]           "
+#error  "                            [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_ERR_CFG_ARG_CHK_EXT_EN != DEF_DISABLED) && \
+        (NET_ERR_CFG_ARG_CHK_EXT_EN != DEF_ENABLED ))
+#error  "NET_ERR_CFG_ARG_CHK_EXT_EN  illegally #define'd in 'net_cfg.h'"
+#error  "                            [MUST be  DEF_DISABLED]           "
+#error  "                            [     ||  DEF_ENABLED ]           "
+#endif
+
+
+
+#ifndef  NET_ERR_CFG_ARG_CHK_DBG_EN
+#error  "NET_ERR_CFG_ARG_CHK_DBG_EN        not #define'd in 'net_cfg.h'"
+#error  "                            [MUST be  DEF_DISABLED]           "
+#error  "                            [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_ERR_CFG_ARG_CHK_DBG_EN != DEF_DISABLED) && \
+        (NET_ERR_CFG_ARG_CHK_DBG_EN != DEF_ENABLED ))
+#error  "NET_ERR_CFG_ARG_CHK_DBG_EN  illegally #define'd in 'net_cfg.h'"
+#error  "                            [MUST be  DEF_DISABLED]           "
+#error  "                            [     ||  DEF_ENABLED ]           "
+#endif
+
+
+
+#if ((NET_IPv4_CFG_EN == DEF_DISABLED) && \
+     (NET_IPv6_CFG_EN == DEF_DISABLED))
+#error  "NET_IPv4_CFG_EN and NET_IPv6_CFG_EN    illegally #define'd in 'net_cfg.h'"
+#error  "NET_IPv4_CFG_EN and/or NET_IPv6_CFG_EN [MUST be  DEF_ENABLED]            "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                NETWORK INTERFACE LAYER CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure network interface parameters.
+*               DO NOT MODIFY.
+*
+*           (2) (a) (1) Loopback interface  required only if internal loopback communication is enabled.
+*
+*                   (2) Specific interfaces required only if devices are configured for the interface(s).
+*
+*               (b) Some network interface share common code to receive and transmit packets, implemented in
+*                   an 802x Protocol Layer (see 'net_if_802x.h' Note #1).
+*
+*               (c) Some network interfaces require network-address-to-hardware-address bindings, implemented
+*                   in an Address Resolution Protocol Layer (see 'net_arp.h  Note #1').
+*
+*                   Ideally, the ARP Layer would configure the network protocol suite for the inclusion of
+*                   the ARP Layer via the NET_ARP_MODULE_EN #define (see 'net_arp.h  MODULE  Note #2'
+*                   &  'ARP LAYER CONFIGURATION  Note #2b').
+*
+*                   However, since the ARP Layer is required only for SOME network interfaces, the presence
+*                   of the ARP Layer MUST be configured ...
+*
+*                   (a) By each network interface that requires the     ARP Layer
+*                         AND
+*                   (b) PRIOR to all other network modules that require ARP Layer configuration
+*
+*           (3) Ideally, the Network Interface layer would define ALL network interface numbers.  However,
+*               certain network interface numbers MUST be defined PRIOR to all other network modules that
+*               require network interface numbers.
+*
+*               See also 'net_if.h  NETWORK INTERFACE NUMBER DATA TYPE  Note #2b'.
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- CFG NET IF PARAMS ----------------- */
+#if  (NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+    #define  NET_IF_LOOPBACK_MODULE_EN                          /* See Note #2a1.                                       */
+#endif
+
+
+                                                                /* See Note #2a2.                                       */
+#if  (NET_IF_CFG_ETHER_EN == DEF_ENABLED)
+    #define  NET_IF_ETHER_MODULE_EN
+#endif
+
+
+#if  (NET_IF_CFG_WIFI_EN == DEF_ENABLED)
+    #define  NET_IF_WIFI_MODULE_EN
+#endif
+
+
+#if  (NET_IF_CFG_ETHER_EN    == DEF_ENABLED || \
+      NET_IF_CFG_WIFI_EN     == DEF_ENABLED || \
+      NET_IF_CFG_LOOPBACK_EN == DEF_ENABLED)
+
+    #define  NET_IF_802x_MODULE_EN                              /* See Note #2b.                                        */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       IP LAYER CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure IP parameters.  DO NOT MODIFY.
+*********************************************************************************************************
+*/
+
+
+
+#if (NET_IPv4_CFG_EN == DEF_ENABLED)
+
+    #define  NET_IPv4_MODULE_EN
+
+    #if     (defined(NET_IF_ETHER_MODULE_EN)) || \
+            (defined(NET_IF_WIFI_MODULE_EN))
+        #define  NET_ARP_MODULE_EN
+        #define  NET_ICMPv4_MODULE_EN
+    #endif
+
+
+    #if (NET_MCAST_CFG_IPv4_RX_EN == DEF_ENABLED)
+        #define  NET_IGMP_MODULE_EN                                /* See Note #2.                                         */
+
+    #elif (NET_MCAST_CFG_IPv4_TX_EN == DEF_ENABLED)
+        #define  NET_IGMP_MCAST_TX_MODULE_EN
+    #endif
+
+#ifndef  NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN
+    #define  NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN                 DEF_DISABLED
+#endif
+
+#ifndef  NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN
+    #define  NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN                 DEF_DISABLED
+#endif
+
+#if (NET_IPV4_CFG_CHK_SUM_OFFLOAD_RX_EN == DEF_ENABLED)
+    #define  NET_IPV4_CHK_SUM_OFFLOAD_RX
+#endif
+
+#if (NET_IPV4_CFG_CHK_SUM_OFFLOAD_TX_EN == DEF_ENABLED)
+    #define  NET_IPV4_CHK_SUM_OFFLOAD_TX
+#endif
+
+#endif
+
+
+
+
+#if     (NET_IPv6_CFG_EN == DEF_ENABLED)
+    #define  NET_IPv6_MODULE_EN
+
+    #if     (defined(NET_IF_ETHER_MODULE_EN)  || \
+             defined(NET_IF_WIFI_MODULE_EN))
+        #define  NET_ICMPv6_MODULE_EN
+        #define  NET_MLDP_MODULE_EN
+        #define  NET_NDP_MODULE_EN
+
+        #if (NET_IPv6_CFG_DAD_EN == DEF_ENABLED)
+            #define  NET_DAD_MODULE_EN
+        #endif
+
+        #if (NET_IPv6_CFG_ADDR_AUTO_CFG_EN == DEF_ENABLED)
+            #define  NET_IPv6_ADDR_AUTO_CFG_MODULE_EN
+        #endif
+
+    #endif
+
+#endif
+
+
+
+
+#if (defined(NET_IPv4_MODULE_EN) || \
+     defined(NET_IPv6_MODULE_EN))
+    #define  NET_IP_MODULE_EN
+
+#endif
+
+
+#if (defined(NET_IGMP_MODULE_EN) || \
+     defined(NET_MLDP_MODULE_EN))
+
+    #define  NET_MCAST_MODULE_EN
+    #define  NET_MCAST_RX_MODULE_EN
+    #define  NET_MCAST_TX_MODULE_EN
+
+
+#elif (defined(NET_IGMP_MCAST_TX_MODULE_EN))
+    #define  NET_MCAST_MODULE_EN
+    #define  NET_MCAST_TX_MODULE_EN
+#endif
+
+
+/*
+*********************************************************************************************************
+*                        NETWORK ADDRESS CACHE MANAGEMENT LAYER CONFIGURATION
+*
+* Note(s) : (1) Network Address Cache Management layer required by some network layers (see 'net_cache.h  Note #1').
+*********************************************************************************************************
+*/
+
+#if ((defined(NET_ARP_MODULE_EN)) || \
+     (defined(NET_NDP_MODULE_EN)))
+
+    #define  NET_CACHE_MODULE_EN                               /* See Note #1.                                         */
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      IGMP LAYER CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure IGMP parameters.  DO NOT MODIFY.
+*
+*           (2) Ideally, the IGMP Layer would configure the network protocol suite for the inclusion of
+*               the IGMP Layer via the NET_IGMP_MODULE_EN #define (see 'net_igmp.h  MODULE  Note #2').
+*               However, the presence of the IGMP Layer MUST be configured PRIOR to all other network
+*               modules that require IGMP Layer configuration.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      MLDP LAYER CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure MLDP parameters.  DO NOT MODIFY.
+*
+*           (2) Ideally, the MLDP Layer would configure the network protocol suite for the inclusion of
+*               the MLDP Layer via the NET_MLDP_MODULE_EN #define (see 'net_mldp.h  MODULE  Note #2').
+*               However, the presence of the MLDP Layer MUST be configured PRIOR to all other network
+*               modules that require MLDP Layer configuration.
+*********************************************************************************************************
+*/
+
+
+
+
+/*
+*********************************************************************************************************
+*                                       TCP LAYER CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure TCP parameters.  DO NOT MODIFY.
+*
+*           (2) (a) TCP Layer required only for some application interfaces (see 'net_tcp.h  MODULE
+*                   Note #1').
+*
+*               (b) Ideally, the TCP Layer would configure the network protocol suite for the inclusion of
+*                   the TCP Layer via the NET_TCP_MODULE_EN #define (see 'net_tcp.h  MODULE  Note #2').
+*                   However, the presence of the TCP Layer MUST be configured PRIOR to all other network
+*                   modules that require TCP Layer configuration.
+*********************************************************************************************************
+*/
+
+#if     (NET_TCP_CFG_EN == DEF_ENABLED)
+    #define  NET_TCP_MODULE_EN                                 /* See Note #2.                                         */
+
+    #ifndef  NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN
+        #define  NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN              DEF_DISABLED
+    #endif
+
+    #ifndef  NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN
+        #define  NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN              DEF_DISABLED
+    #endif
+
+    #if (NET_TCP_CFG_CHK_SUM_OFFLOAD_RX_EN == DEF_ENABLED)
+        #define  NET_TCP_CHK_SUM_OFFLOAD_RX
+    #endif
+
+    #if (NET_TCP_CFG_CHK_SUM_OFFLOAD_TX_EN == DEF_ENABLED)
+        #define  NET_TCP_CHK_SUM_OFFLOAD_TX
+    #endif
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       UDP LAYER CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifndef  NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN
+    #define  NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN                 DEF_DISABLED
+#endif
+
+#ifndef  NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN
+    #define  NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN                 DEF_DISABLED
+#endif
+
+#if (NET_UDP_CFG_CHK_SUM_OFFLOAD_RX_EN == DEF_ENABLED)
+    #define  NET_UDP_CHK_SUM_OFFLOAD_RX
+#endif
+
+#if (NET_UDP_CFG_CHK_SUM_OFFLOAD_TX_EN == DEF_ENABLED)
+    #define  NET_UDP_CHK_SUM_OFFLOAD_TX
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       UDP LAYER CONFIGURATION
+*********************************************************************************************************
+*/
+
+#ifndef  NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN
+    #define  NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN                 DEF_DISABLED
+#endif
+
+#ifndef  NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN
+    #define  NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN                 DEF_DISABLED
+#endif
+
+#if (NET_ICMP_CFG_CHK_SUM_OFFLOAD_RX_EN == DEF_ENABLED)
+    #define  NET_ICMP_CHK_SUM_OFFLOAD_RX
+#endif
+
+#if (NET_ICMP_CFG_CHK_SUM_OFFLOAD_TX_EN == DEF_ENABLED)
+    #define  NET_ICMP_CHK_SUM_OFFLOAD_TX
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 NETWORK SOCKET LAYER CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure network socket parameters.
+*               DO NOT MODIFY.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------ CFG SOCK MODULE INCLUSION ------------- */
+#if  (defined(NET_TCP_MODULE_EN))
+    #define  NET_SOCK_TYPE_STREAM_MODULE_EN
+
+                                                                /* ----------- CFG SECURE MODULE INCLUSION ------------ */
+    #if (NET_SECURE_CFG_EN  == DEF_ENABLED)
+        #define  NET_SECURE_MODULE_EN                           /* See Note #2.                                         */
+    #endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK SECURITY MANAGER CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure network security manager
+*               parameters.  DO NOT MODIFY.
+*
+*           (2) (a) Network Security Layer required only for some configurations (see 'net_secure_mgr.h
+*                   Note #1').
+*
+*               (b) Ideally, the Network Security Layer would configure the network protocol suite for
+*                   the inclusion of the Security Layer via the NET_SECURE_MODULE_EN #define (see
+*                   'net_secure_mgr.h  MODULE  Note #2').  However, the presence of the Security Layer
+*                   MUST be configured PRIOR to all other network modules that require  Security Layer
+*                   configuration.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK COUNTER MANAGEMENT CONFIGURATION
+*********************************************************************************************************
+*/
+
+#if    ((NET_CTR_CFG_STAT_EN == DEF_ENABLED) || \
+        (NET_CTR_CFG_ERR_EN  == DEF_ENABLED))
+
+    #define  NET_CTR_MODULE_EN
+#endif
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK BUFFER MANAGEMENT CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure network buffer parameters.
+*               DO NOT MODIFY.
+*
+*               (a) NET_BUF_DATA_PROTOCOL_HDR_SIZE_MAX's ideal #define'tion :
+*
+*                       (A) IF Hdr  +  max(Protocol Headers)
+*
+*               (b) NET_BUF_DATA_PROTOCOL_HDR_SIZE_MAX  #define'd with hard-coded knowledge that IF, IP,
+*                   & TCP headers have the largest combined maximum size of all the protocol headers :
+*
+*                     ARP Hdr   68       IP Hdr   60      IP Hdr   60      IP Hdr   60     IP Hdr   60
+*                                      ICMP Hdr    0    IGMP Hdr    0     UDP Hdr    8    TCP Hdr   60
+*                     ------------     -------------    -------------     ------------    ------------
+*                     Total     68     Total      60    Total      60     Total     68    Total    120
+*
+*               See also 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1'.
+*
+*           (3) Network interface minimum/maximum header sizes MUST be #define'd based on network interface
+*               type(s) configured in 'net_cfg.h'.  Assumes header sizes are fixed based on configured network
+*               interface type(s) [see any 'net_if_&&&.h  NETWORK INTERFACE HEADER DEFINES  Note #1'].
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK CONNECTION CONFIGURATION
+*
+* Note(s) : (1) The following pre-processor directives correctly configure network communication
+*               parameters.  DO NOT MODIFY.
+*
+*           (2) To balance network receive versus transmit packet loads for certain network connection
+*               types (e.g. stream-type connections), network receive & transmit packets SHOULD be
+*               handled in an APPROXIMATELY balanced ratio.
+*
+*               See also 'net_if.c  NetIF_RxPktInc()         Note #1',
+*                        'net_if.c  NetIF_RxPktDec()         Note #1',
+*                        'net_if.c  NetIF_TxSuspend()        Note #1',
+*                      & 'net_if.c  NetIF_TxSuspendSignal()  Note #1'.
+*********************************************************************************************************
+*/
+
+#if (defined(NET_TCP_MODULE_EN))
+    #define  NET_LOAD_BAL_MODULE_EN
+#endif
+
+
+#define  NET_BUF_MODULE_EN
+#define  NET_TMR_MODULE_EN
+
+#ifndef NET_EXT_MODULE_CFG_DNS_EN
+    #define  NET_EXT_MODULE_CFG_DNS_EN      DEF_DISABLED
+#endif
+
+#if (NET_EXT_MODULE_CFG_DNS_EN == DEF_ENABLED)
+#define  NET_EXT_MODULE_DNS_EN
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of net cfg net module include.                   */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_conn.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_conn.c
new file mode 100644
index 0000000..a23e538
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_conn.c
@@ -0,0 +1,4948 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    NETWORK CONNECTION MANAGEMENT
+*
+* Filename      : net_conn.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*********************************************************************************************************
+* Note(s)       : (1) Supports network connections for local & remote addresses of the following :
+*
+*                     (a) Families :
+*                         (1) IPv4 Connections
+*                             (A) BSD 4.x Sockets
+*
+*                     (b) Connection types :
+*                         (1) Datagram
+*                         (2) Stream
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_CONN_MODULE
+#include  "net_conn.h"
+#include  "net_cfg_net.h"
+#include  "net.h"
+#include  "net_tcp.h"
+#include  "net_util.h"
+#include  "../IF/net_if.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_CONN  *NetConn_ListSrch              (NET_CONN_FAMILY        family,
+                                                  NET_CONN             **p_conn_list,
+                                                  CPU_INT08U            *p_addr_local);
+
+
+static  NET_CONN  *NetConn_ChainSrch             (NET_CONN             **p_conn_list,
+                                                  NET_CONN              *p_conn_chain,
+                                                  CPU_INT08U            *p_addr_local,
+                                                  CPU_INT08U            *p_addr_wildcard,
+                                                  CPU_INT08U            *p_addr_remote,
+                                                  NET_ERR               *p_err);
+
+
+static  void       NetConn_ChainInsert           (NET_CONN             **p_conn_list,
+                                                  NET_CONN              *p_conn_chain);
+
+static  void       NetConn_ChainUnlink           (NET_CONN             **p_conn_list,
+                                                  NET_CONN              *p_conn_chain);
+
+
+static  void       NetConn_Add                   (NET_CONN             **p_conn_list,
+                                                  NET_CONN              *p_conn_chain,
+                                                  NET_CONN              *p_conn);
+
+static  void       NetConn_Unlink                (NET_CONN              *p_conn);
+
+
+
+static  void       NetConn_Close                 (NET_CONN              *p_conn);
+
+static  void       NetConn_CloseApp              (NET_CONN              *p_conn);
+
+static  void       NetConn_CloseTransport        (NET_CONN              *p_conn);
+
+
+static  void       NetConn_CloseAllConnsHandler  (NET_IF_NBR             if_nbr,
+                                                  CPU_INT08U            *p_addr,
+                                                  NET_CONN_ADDR_LEN      addr_len,
+                                                  NET_CONN_CLOSE_CODE    close_code);
+
+static  void       NetConn_CloseAllConnsCloseConn(NET_CONN              *p_conn,
+                                                  NET_IF_NBR             if_nbr,
+                                                  CPU_INT08U            *p_addr,
+                                                  NET_CONN_ADDR_LEN      addr_len,
+                                                  NET_CONN_CLOSE_CODE    close_code);
+
+
+
+static  void       NetConn_FreeHandler           (NET_CONN              *p_conn);
+
+
+static  void       NetConn_Clr                   (NET_CONN              *p_conn);
+
+
+/*
+*********************************************************************************************************
+*                                           NetConn_Init()
+*
+* Description : (1) Initialize Network Connection Management Module :
+*
+*                   (a) Initialize network connection pool
+*                   (b) Initialize network connection table
+*                   (c) Initialize network connection lists
+*                   (d) Initialize network connection wildcard address(s)
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Network connection pool MUST be initialized PRIOR to initializing the pool with
+*                   pointers to network connections.
+*
+*               (3) Network connection  addresses maintained in network-order.  Therefore, network
+*                   connection wildcard address(s) MUST be configured in network-order.
+*********************************************************************************************************
+*/
+
+void  NetConn_Init (void)
+{
+#ifdef  NET_IP_MODULE_EN
+    NET_CONN_ADDR_LEN    addr_len_ip;
+#endif
+    NET_CONN_ADDR_LEN    addr_len_wildcard;
+    NET_CONN            *p_conn;
+    NET_CONN           **p_conn_list;
+    CPU_INT16U           i;
+    NET_CONN_LIST_QTY    j;
+    NET_ERR              err;
+
+
+                                                                /* ------------- INIT NET CONN POOL/STATS ------------- */
+    NetConn_PoolPtr = (NET_CONN *)0;                            /* Init-clr net conn pool (see Note #2).                */
+
+    NetStat_PoolInit((NET_STAT_POOL   *)&NetConn_PoolStat,
+                     (NET_STAT_POOL_QTY) NET_CONN_NBR_CONN,
+                     (NET_ERR         *)&err);
+
+
+                                                                /* ---------------- INIT NET CONN TBL ----------------- */
+    p_conn = &NetConn_Tbl[0];
+    for (i = 0; i < NET_CONN_NBR_CONN; i++) {
+        p_conn->ID    = (NET_CONN_ID)i;
+
+        p_conn->Flags =  NET_CONN_FLAG_NONE;                    /* Init each net conn as NOT used.                      */
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        NetConn_Clr(p_conn);
+#endif
+
+        p_conn->NextConnPtr = NetConn_PoolPtr;                  /* Free each net conn to net conn pool (see Note #2).   */
+        NetConn_PoolPtr     = p_conn;
+
+        p_conn++;
+    }
+
+
+                                                                /* --------------- INIT NET CONN LISTS ---------------- */
+                                                                /* Init net conn lists.                                 */
+    p_conn_list = &NetConn_ConnListHead[0];
+    for (j = 0u; j < NET_CONN_PROTOCOL_NBR_MAX; j++) {
+       *p_conn_list = (NET_CONN *)0;
+        p_conn_list++;
+    }
+
+                                                                /* Init net conn list ptrs.                             */
+    NetConn_ConnListChainPtr     = (NET_CONN *)0;
+    NetConn_ConnListConnPtr      = (NET_CONN *)0;
+    NetConn_ConnListNextChainPtr = (NET_CONN *)0;
+    NetConn_ConnListNextConnPtr  = (NET_CONN *)0;
+
+
+                                                                /* ----------- INIT NET CONN WILDCARD ADDRS ----------- */
+                                                                /* See Note #3.                                         */
+#ifdef  NET_IPv4_MODULE_EN
+    addr_len_wildcard = sizeof(NetConn_AddrWildCardv4);
+    Mem_Clr((void     *)&NetConn_AddrWildCardv4[0],
+            (CPU_SIZE_T) addr_len_wildcard);
+
+    addr_len_ip = sizeof(NET_CONN_ADDR_IP_V4_WILDCARD);
+    if (addr_len_ip <= addr_len_wildcard) {
+        NET_UTIL_VAL_SET_NET_32(&NetConn_AddrWildCardv4[0], NET_CONN_ADDR_IP_V4_WILDCARD);
+        NetConn_AddrWildCardAvailv4 = DEF_YES;
+
+    } else {
+        NetConn_AddrWildCardAvailv4 = DEF_NO;
+    }
+
+#else
+    NetConn_AddrWildCardAvailv4 = DEF_NO;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    addr_len_wildcard = sizeof(NetConn_AddrWildCardv6);
+    Mem_Clr((void     *)&NetConn_AddrWildCardv6[0],
+            (CPU_SIZE_T) addr_len_wildcard);
+
+    addr_len_ip = sizeof(NET_CONN_ADDR_IP_V6_WILDCARD);
+    if (addr_len_ip <= addr_len_wildcard) {
+        Mem_Copy(&NetConn_AddrWildCardv6[0], &NET_CONN_ADDR_IP_V6_WILDCARD, addr_len_ip);
+        NetConn_AddrWildCardAvailv6 = DEF_YES;
+
+    } else {
+        NetConn_AddrWildCardAvailv6 = DEF_NO;
+    }
+
+#else
+    NetConn_AddrWildCardAvailv6 = DEF_NO;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_CfgAccessedTh()
+*
+* Description : Configure network connection access promotion threshold.
+*
+* Argument(s) : nbr_access      Desired number of accesses before network connection is promoted.
+*
+* Return(s)   : DEF_OK,   network connection access promotion threshold configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Net_InitDflt(),
+*               Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) 'NetConn_AccessedTh_nbr' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetConn_CfgAccessedTh (CPU_INT16U  nbr_access)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_CONN_ACCESSED_TH_MIN > DEF_INT_16U_MIN_VAL)
+    if (nbr_access < NET_CONN_ACCESSED_TH_MIN) {
+        return (DEF_FAIL);
+    }
+#endif
+#if (NET_CONN_ACCESSED_TH_MAX < DEF_INT_16U_MAX_VAL)
+    if (nbr_access > NET_CONN_ACCESSED_TH_MAX) {
+        return (DEF_FAIL);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    NetConn_AccessedTh_nbr = nbr_access;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetConn_Get()
+*
+* Description : (1) Allocate & initialize a network connection :
+*
+*                   (a) Get      a network connection
+*                   (b) Validate   network connection
+*                   (c) Initialize network connection
+*                   (d) Update     network connection pool statistics
+*                   (e) Return network connection handle identifier
+*                         OR
+*                       Null identifier & error code, on failure
+*
+*               (2) The network connection pool is implemented as a stack :
+*
+*                   (a) 'NetConn_PoolPtr' points to the head of the network connection pool.
+*
+*                   (b) Connections' 'NextConnPtr's link each connection to form the connection pool stack.
+*
+*                   (c) Connections are inserted & removed at the head of        the connection pool stack.
+*
+*
+*                                     Connections are
+*                                    inserted & removed
+*                                        at the head
+*                                      (see Note #2c)
+*
+*                                             |               NextConnPtr
+*                                             |             (see Note #2b)
+*                                             v                    |
+*                                                                  |
+*                                          -------       -------   v   -------       -------
+*                     Connection Pool ---->|     |------>|     |------>|     |------>|     |
+*                         Pointer          |     |       |     |       |     |       |     |
+*                                          |     |       |     |       |     |       |     |
+*                      (see Note #2a)      -------       -------       -------       -------
+*
+*                                          |                                               |
+*                                          |<--------- Pool of Free Connections ---------->|
+*                                          |                (see Note #2)                  |
+*
+*
+* Argument(s) : family          Network connection family type.
+*
+*               protocol_ix     Network connection protocol index.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE                   Network connection successfully allocated &
+*                                                                       initialized.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available network connections to allocate.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*
+* Return(s)   : Connection handle identifier, if NO error(s).
+*
+*               NET_CONN_ID_NONE,             otherwise.
+*
+* Caller(s)   : NetSock_BindHandler(),
+*               NetTCP_RxPktConnHandlerListen().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (3) (a) Network connection pool is accessed by 'NetConn_PoolPtr' during execution of
+*
+*                       (1) NetConn_Init()
+*                       (2) NetConn_Get()
+*                       (3) NetConn_FreeHandler()
+*
+*                   (b) Since the primary tasks of the network protocol suite are prevented from running
+*                       concurrently (see 'net.h  Note #3'), it is NOT necessary to protect the shared
+*                       resources of the network connection pool since no asynchronous access from other
+*                       network tasks is possible.
+*********************************************************************************************************
+*/
+
+NET_CONN_ID  NetConn_Get (NET_CONN_FAMILY        family,
+                          NET_CONN_PROTOCOL_IX   protocol_ix,
+                          NET_ERR               *p_err)
+{
+    NET_CONN     *p_conn;
+    NET_CONN_ID   conn_id;
+    NET_ERR       err;
+
+
+                                                                /* -------------- VALIDATE NET CONN ARGS -------------- */
+    switch (family) {
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_CONN_FAMILY_IP_V4_SOCK:
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_CONN_FAMILY_IP_V6_SOCK:
+#endif
+             switch (protocol_ix) {
+#ifdef  NET_IPv4_MODULE_EN
+                 case NET_CONN_PROTOCOL_IX_IP_V4_UDP:
+#ifdef  NET_TCP_MODULE_EN
+                 case NET_CONN_PROTOCOL_IX_IP_V4_TCP:
+#endif
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+                 case NET_CONN_PROTOCOL_IX_IP_V6_UDP:
+#ifdef  NET_TCP_MODULE_EN
+                 case NET_CONN_PROTOCOL_IX_IP_V6_TCP:
+#endif
+#endif
+
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvProtocolIxCtr);
+                     *p_err = NET_CONN_ERR_INVALID_PROTOCOL_IX;
+                      return (NET_CONN_ID_NONE);
+             }
+             break;
+#endif
+
+        case NET_CONN_FAMILY_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvFamilyCtr);
+            *p_err = NET_CONN_ERR_INVALID_FAMILY;
+             return (NET_CONN_ID_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (protocol_ix >= NET_CONN_PROTOCOL_NBR_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvProtocolIxCtr);
+       *p_err = NET_CONN_ERR_INVALID_PROTOCOL_IX;
+        return (NET_CONN_ID_NONE);
+    }
+#endif
+
+
+                                                                /* ------------------- GET NET CONN ------------------- */
+    if (NetConn_PoolPtr != (NET_CONN *)0) {                     /* If net conn pool NOT empty, get net conn from pool.  */
+        p_conn           = (NET_CONN *)NetConn_PoolPtr;
+        NetConn_PoolPtr  = (NET_CONN *)p_conn->NextConnPtr;
+
+    } else {                                                    /* If none avail, rtn err.                              */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NoneAvailCtr);
+       *p_err = NET_CONN_ERR_NONE_AVAIL;
+        return (NET_CONN_ID_NONE);
+    }
+
+
+                                                                /* ------------------ INIT NET CONN ------------------- */
+    NetConn_Clr(p_conn);
+    DEF_BIT_SET(p_conn->Flags, NET_CONN_FLAG_USED);             /* Set net conn as used.                                */
+    p_conn->Family     = family;
+    p_conn->ProtocolIx = protocol_ix;
+
+    switch (protocol_ix) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_CONN_PROTOCOL_IX_IP_V4_UDP:
+#ifdef  NET_TCP_MODULE_EN
+        case NET_CONN_PROTOCOL_IX_IP_V4_TCP:
+#endif
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_CONN_PROTOCOL_IX_IP_V6_UDP:
+#ifdef  NET_TCP_MODULE_EN
+        case NET_CONN_PROTOCOL_IX_IP_V6_TCP:
+#endif
+             DEF_BIT_SET(p_conn->TxIPv6Flags, NET_IPv6_FLAG);
+             break;
+#endif
+
+
+         default:
+              NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvProtocolIxCtr);
+             *p_err = NET_CONN_ERR_INVALID_PROTOCOL_IX;
+              return (NET_CONN_ID_NONE);
+     }
+
+                                                                /* ------------ UPDATE NET CONN POOL STATS ------------ */
+    NetStat_PoolEntryUsedInc(&NetConn_PoolStat, &err);
+
+                                                                /* ----------------- RTN NET CONN ID ------------------ */
+    conn_id = p_conn->ID;
+   *p_err   = NET_CONN_ERR_NONE;
+
+    return (conn_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetConn_Free()
+*
+* Description : Free a network connection.
+*
+*               (1) Network connection free ONLY frees but does NOT close any connections.
+*
+*
+* Argument(s) : conn_id     Handle identifier of network connection to free.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) #### To prevent freeing a network connection already freed via previous network
+*                   connection free, NetConn_Free() checks if the network connection is used BEFORE
+*                   freeing the network connection.
+*
+*                   This prevention is only best-effort since any invalid duplicate network connection
+*                   frees MAY be asynchronous to potentially valid network connection gets.  Thus the
+*                   invalid network connection free(s) MAY corrupt the network connection's valid
+*                   operation(s).
+*
+*                   However, since the primary tasks of the network protocol suite are prevented from
+*                   running concurrently (see 'net.h  Note #3'), it is NOT necessary to protect network
+*                   connection resources from possible corruption since no asynchronous access from
+*                   other network tasks is possible.
+*********************************************************************************************************
+*/
+
+void  NetConn_Free (NET_CONN_ID  conn_id)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_ERR    err;
+#endif
+    NET_CONN  *p_conn;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, &err);
+    if (err != NET_CONN_ERR_NONE) {                             /* If net conn NOT used, ...                            */
+        return;                                                 /* ... rtn but do NOT free (see Note #2).               */
+    }
+#endif
+
+                                                                /* ------------------ FREE NET CONN ------------------- */
+    p_conn = &NetConn_Tbl[conn_id];
+    NetConn_FreeHandler(p_conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetConn_Copy()
+*
+* Description : (1) Copy/clone a network connection :
+*
+*                   (a) IP transmit parameters :
+*                       (1) TOS
+*                       (2) TTL
+*                       (3) Flags
+*
+*
+* Argument(s) : conn_id_dest    Handle identifier of destination network connection to copy configured
+*                                   parameters to.
+*
+*               conn_id_src     Handle identifier of source      network connection to copy configured
+*                                   parameters from.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnCopy().
+*
+* Note(s)     : (2) The 'NET_CONN_CFG_FAMILY' pre-processor 'else'-conditional code will never be compiled/linked
+*                   since 'net_conn.h' ensures that the family type configuration constant (NET_CONN_CFG_FAMILY)
+*                   is configured with an appropriate family type value (see 'net_conn.h  CONFIGURATION ERRORS').
+*                   The 'else'-conditional code is included for completeness & as an extra precaution in case
+*                   'net_conn.h' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+void  NetConn_Copy (NET_CONN_ID  conn_id_dest,
+                    NET_CONN_ID  conn_id_src)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_ERR    err;
+#endif
+    NET_CONN  *p_conn_dest;
+    NET_CONN  *p_conn_src;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------- VALIDATE NET CONNS USED -------------- */
+   (void)NetConn_IsUsed(conn_id_dest, &err);
+    if (err != NET_CONN_ERR_NONE) {
+        return;
+    }
+   (void)NetConn_IsUsed(conn_id_src,  &err);
+    if (err != NET_CONN_ERR_NONE) {
+        return;
+    }
+#endif
+
+                                                                /* -------------- COPY NET CONN'S PARAMS -------------- */
+    p_conn_dest = &NetConn_Tbl[conn_id_dest];
+    p_conn_src  = &NetConn_Tbl[conn_id_src];
+
+#ifdef  NET_IPv4_MODULE_EN
+    p_conn_dest->TxIPv4Flags           = p_conn_src->TxIPv4Flags;
+    p_conn_dest->TxIPv4TOS             = p_conn_src->TxIPv4TOS;
+    p_conn_dest->TxIPv4TTL             = p_conn_src->TxIPv4TTL;
+#ifdef  NET_MCAST_TX_MODULE_EN
+    p_conn_dest->TxIPv4TTL_Multicast   = p_conn_src->TxIPv4TTL_Multicast;
+#endif
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    p_conn_dest->TxIPv6TrafficClass    = p_conn_src->TxIPv6TrafficClass;
+    p_conn_dest->TxIPv6FlowLabel       = p_conn_src->TxIPv6FlowLabel;
+    p_conn_dest->TxIPv6HopLim          = p_conn_src->TxIPv6HopLim;
+    p_conn_dest->TxIPv6Flags           = p_conn_src->TxIPv6Flags;
+#ifdef  NET_MCAST_TX_MODULE_EN
+    p_conn_dest->TxIPv6HopLimMulticast = p_conn_src->TxIPv6HopLimMulticast;
+#endif
+#endif
+
+#if (!defined(NET_IPv4_MODULE_EN) && \
+     !defined(NET_IPv6_MODULE_EN))                                 /* See Note #2.                                         */
+   (void)&p_conn_dest;                                          /* Prevent possible 'variable unused' warnings.         */
+   (void)&p_conn_src;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_CloseFromApp()
+*
+* Description : (1) Close a network connection from application layer :
+*
+*                   (a) Close transport connection, if requested                            See Note #3c
+*                   (b) Clear network   connection's reference to application connection    See Note #3c
+*                   (c) Free  network   connection, if necessary
+*
+*
+* Argument(s) : conn_id                 Handle identifier of network connection to close.
+*
+*               close_conn_transport    Indicate whether to close transport connection :
+*
+*                                           DEF_YES                    Close transport connection.
+*                                           DEF_NO              Do NOT close transport connection.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CloseConn(),
+*               NetSock_CloseSockHandler(),
+*               NetSock_ConnAcceptQ_Clr().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) #### To prevent closing a network connection already closed via previous network
+*                   connection close, NetConn_CloseFromApp() checks if the network connection is used
+*                   BEFORE closing the network connection.
+*
+*                   This prevention is only best-effort since any invalid duplicate network connection
+*                   closes MAY be asynchronous to potentially valid network connection gets.  Thus the
+*                   invalid network connection close(s) MAY corrupt the network connection's valid
+*                   operation(s).
+*
+*                   However, since the primary tasks of the network protocol suite are prevented from
+*                   running concurrently (see 'net.h  Note #3'), it is NOT necessary to protect network
+*                   connection resources from possible corruption since no asynchronous access from
+*                   other network tasks is possible.
+*
+*                   (a) Network connection(s) MAY already be closed AFTER other network connection
+*                       close operations & MUST be validated as used BEFORE any subsequent network
+*                       connection close operation(s).
+*
+*               (3) (a) Network connections are considered connected if any of the following network
+*                       connections are valid :
+*
+*                       (1) Application layer connection
+*                       (2) Transport   layer connection
+*
+*                               (A) Network connections which ONLY reference application layer clone
+*                                   connection(s) are NOT considered connected since the actual non-
+*                                   cloned application connection MAY or MAY NOT reference the cloned
+*                                   network connection.
+*
+*                   (b) Since NetConn_CloseFromApp() actively closes the application layer connection,
+*                       network connections need only validate the remaining transport layer connection
+*                       as connected.
+*
+*                   (c) Since network connection(s) connection validation determines, in part, when to
+*                       close the network connection (see Note #3a), & since NetConn_CloseFromTransport()
+*                       may indirectly call NetConn_CloseFromApp(); clearing the network connection's
+*                       application layer connection handle identifier MUST follow the closing of the
+*                       transport   layer connection to prevent re-closing the network connection.
+*********************************************************************************************************
+*/
+
+void  NetConn_CloseFromApp (NET_CONN_ID  conn_id,
+                            CPU_BOOLEAN  close_conn_transport)
+{
+    CPU_BOOLEAN   conn_connd;
+    CPU_BOOLEAN   conn_used;
+    CPU_BOOLEAN   conn_free;
+    NET_CONN     *p_conn;
+    NET_ERR       err;
+
+                                                                    /* -------------- VALIDATE NET CONN --------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE NET CONN USED ------------ */
+   (void)NetConn_IsUsed(conn_id, &err);
+    if (err != NET_CONN_ERR_NONE) {                                 /* If net conn NOT used, ...                        */
+        return;                                                     /* ... rtn but do NOT close (see Note #2).          */
+    }
+#endif
+
+
+    p_conn = &NetConn_Tbl[conn_id];
+
+                                                                    /* ------------- CLOSE TRANSPORT CONN ------------- */
+    if (close_conn_transport == DEF_YES) {
+        NetConn_CloseTransport(p_conn);                             /* Close transport conn, if req'd.                  */
+        conn_used  =  DEF_BIT_IS_SET(p_conn->Flags, NET_CONN_FLAG_USED);
+        conn_free  = (conn_used == DEF_YES) ? DEF_YES : DEF_NO;     /* ... since app & transport conns closed.          */
+
+    } else {                                                        /* Else chk net conn conn'd (see Note #3b).         */
+        conn_connd = (p_conn->ID_Transport != NET_CONN_ID_NONE) ? DEF_YES : DEF_NO;
+        conn_free  =  (conn_connd != DEF_YES) ? DEF_YES : DEF_NO;   /* Free net conn, if NOT conn'd.                    */
+    }
+
+                                                                    /* ---------------- CLOSE APP CONN ---------------- */
+    NetConn_ID_AppSet(conn_id, NET_CONN_ID_NONE, &err);             /* Clr net conn's app conn id (see Note #3c).       */
+
+                                                                    /* ---------------- FREE NET CONN ----------------- */
+    if (conn_free == DEF_YES) {
+        NetConn_FreeHandler(p_conn);                                /* Free net conn, if req'd.                         */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetConn_CloseFromTransport()
+*
+* Description : (1) Close a network connection from transport layer :
+*
+*                   (a) Close application connection, if requested                          See Note #3c
+*                   (b) Clear network     connection's reference to transport connection    See Note #3c
+*                   (c) Free  network     connection, if necessary
+*
+*
+* Argument(s) : conn_id             Handle identifier of network connection to close.
+*
+*               close_conn_app      Indicate whether to close application connection :
+*
+*                                       DEF_YES                        Close application connection.
+*                                       DEF_NO                  Do NOT close application connection.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnClose().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) #### To prevent closing a network connection already closed via previous network
+*                   connection close, NetConn_CloseFromTransport() checks if the network connection
+*                   is used BEFORE closing the network connection.
+*
+*                   This prevention is only best-effort since any invalid duplicate network connection
+*                   closes MAY be asynchronous to potentially valid network connection gets.  Thus the
+*                   invalid network connection close(s) MAY corrupt the network connection's valid
+*                   operation(s).
+*
+*                   However, since the primary tasks of the network protocol suite are prevented from
+*                   running concurrently (see 'net.h  Note #3'), it is NOT necessary to protect network
+*                   connection resources from possible corruption since no asynchronous access from
+*                   other network tasks is possible.
+*
+*                   (a) Network connection(s) MAY already be closed AFTER other network connection
+*                       close operations & MUST be validated as used BEFORE any subsequent network
+*                       connection close operation(s).
+*
+*               (3) (a) Network connections are considered connected if any of the following network
+*                       connections are valid :
+*
+*                       (1) Application layer connection
+*                       (2) Transport   layer connection
+*
+*                               (A) Network connections which ONLY reference application layer clone
+*                                   connection(s) are NOT considered connected since the actual non-
+*                                   cloned application connection MAY or MAY NOT reference the cloned
+*                                   network connection.
+*
+*                   (b) Since NetConn_CloseFromTransport() actively closes the transport layer connection,
+*                       network connections need only validate the remaining application layer connection
+*                       as connected.
+*
+*                   (c) Since network connection(s) connection validation determines, in part, when to
+*                       close the network connection (see Note #3a), & since NetConn_CloseFromApp() may
+*                       indirectly call NetConn_CloseFromTransport(); clearing the network connection's
+*                       transport   layer connection handle identifier MUST follow the closing of the
+*                       application layer connection to prevent re-closing the network connection.
+*********************************************************************************************************
+*/
+
+void  NetConn_CloseFromTransport (NET_CONN_ID  conn_id,
+                                  CPU_BOOLEAN  close_conn_app)
+{
+    CPU_BOOLEAN   conn_used;
+    CPU_BOOLEAN   conn_connd;
+    CPU_BOOLEAN   conn_free;
+    NET_CONN     *p_conn;
+    NET_ERR       err;
+
+                                                                    /* -------------- VALIDATE NET CONN --------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ------------ VALIDATE NET CONN USED ------------ */
+   (void)NetConn_IsUsed(conn_id, &err);
+    if (err != NET_CONN_ERR_NONE) {                                 /* If net conn NOT used, ...                        */
+        return;                                                     /* ... rtn but do NOT close (see Note #2).          */
+    }
+#endif
+
+
+    p_conn = &NetConn_Tbl[conn_id];
+
+                                                                    /* ---------------- CLOSE APP CONN ---------------- */
+    if (close_conn_app == DEF_YES) {
+        NetConn_CloseApp(p_conn);                                   /* Close app conn, if req'd.                        */
+        conn_used  =  DEF_BIT_IS_SET(p_conn->Flags, NET_CONN_FLAG_USED);
+        conn_free  = (conn_used == DEF_YES) ? DEF_YES : DEF_NO;     /* ... since app & transport conns closed.          */
+
+    } else {                                                        /* Else chk net conn conn'd (see Note #3b).         */
+        conn_connd = (p_conn->ID_App != NET_CONN_ID_NONE) ? DEF_YES : DEF_NO;
+        conn_free  = (conn_connd != DEF_YES) ? DEF_YES : DEF_NO;    /* Free net conn, if NOT conn'd.                    */
+    }
+
+                                                                    /* ------------- CLOSE TRANSPORT CONN ------------- */
+    NetConn_ID_TransportSet(conn_id, NET_CONN_ID_NONE, &err);       /* Clr net conn's transport conn id (see Note #3c). */
+
+                                                                    /* ---------------- FREE NET CONN ----------------- */
+    if (conn_free == DEF_YES) {
+        NetConn_FreeHandler(p_conn);                                /* Free net conn, if req'd.                         */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_CloseAllConns()
+*
+* Description : Close ALL network connections.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (1) Certain circumstances may require that :
+*
+*                   (a) ALL network protocol suite connections close; ...
+*                   (b) All pending network &/or application connection function(s) SHOULD :
+*                       (1) Abort, immediately if possible; ...
+*                       (2) Return appropriate closed error code(s).
+*
+*               (2) NetConn_CloseAllConns() is called by network protocol suite function(s) & MUST
+*                   be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+void  NetConn_CloseAllConns (void)
+{
+                                                                        /* Close ALL net conns.                         */
+    NetConn_CloseAllConnsHandler((NET_IF_NBR         )NET_IF_NBR_NONE,
+                                 (CPU_INT08U        *)0,
+                                 (NET_CONN_ADDR_LEN  )0,
+                                 (NET_CONN_CLOSE_CODE)NET_CONN_CLOSE_ALL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetConn_CloseAllConnsByIF()
+*
+* Description : Close ALL network connections for a specific interface.
+*
+* Argument(s) : if_nbr      Interface number to close connection :
+*
+*                               Interface number        Close ALL connections on interface.
+*                               NET_IF_NBR_WILDCARD,    Close ALL connections with a wildcard
+*                                                           address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (1) Certain circumstances may require that :
+*
+*                   (a) ALL network protocol suite connections for a specific interface close; ...
+*                   (b) All pending network &/or application connection function(s) SHOULD :
+*                       (1) Abort, immediately if possible; ...
+*                       (2) Return appropriate closed error code(s).
+*
+*               (2) NetConn_CloseAllConnsByIF() is called by network protocol suite function(s) &
+*                   MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+void  NetConn_CloseAllConnsByIF (NET_IF_NBR  if_nbr)
+{
+                                                                        /* Close ALL net conns for specific IF.         */
+    NetConn_CloseAllConnsHandler((NET_IF_NBR         )if_nbr,
+                                 (CPU_INT08U        *)0,
+                                 (NET_CONN_ADDR_LEN  )0,
+                                 (NET_CONN_CLOSE_CODE)NET_CONN_CLOSE_BY_IF);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetConn_CloseAllConnsByAddr()
+*
+* Description : Close ALL network connections for a specific address.
+*
+* Argument(s) : p_addr      Pointer to protocol address to close connection (see Note #4).
+*
+*               addr_len    Length  of protocol address (in octets).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Network Application.
+*
+*               This function is a network protocol suite function that SHOULD be called only by appropriate
+*               network application function(s) [see also Notes #1 & #2].
+*
+* Note(s)     : (1) (a) Certain circumstances may require that :
+*
+*                       (1) ALL network protocol suite connections for a specific local address close; ...
+*                       (2) All pending network &/or application connection function(s) SHOULD :
+*                           (A) Abort, immediately if possible; ...
+*                           (B) Return appropriate closed error code(s).
+*
+*                   (b) The following lists example(s) when to close all network connections for a given
+*                       local address :
+*
+*                       (1) RFC #2131, Section 4.4.5 states that "if the [DHCP] client is given a new
+*                           network address, it MUST NOT continue using the previous network address
+*                           and SHOULD notify the local users of the problem".
+*
+*                           Therefore, ALL network connections based on a previously configured local
+*                           address MUST be closed.
+*
+*               (2) NetConn_CloseAllConnsByAddr() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetConn_CloseAllConnsByAddrHandler()  Note #2'.
+*
+*               (3) NetConn_CloseAllConnsByAddr() blocked until network initialization completes.
+*
+*                   (a) However, since all network connections are closed when network initialization
+*                       completes; NO error is returned.
+*
+*               (4) Protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+void  NetConn_CloseAllConnsByAddr (CPU_INT08U         *p_addr,
+                                   NET_CONN_ADDR_LEN   addr_len)
+{
+    NET_ERR  err;
+
+
+                                                                /* Acquire net lock (see Note #2b).                     */
+    Net_GlobalLockAcquire((void *)&NetConn_CloseAllConnsByAddr, &err);
+    if (err != NET_ERR_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #3).            */
+        goto exit_release;
+    }
+#endif
+
+
+    NetConn_CloseAllConnsByAddrHandler(p_addr, addr_len);       /* Close ALL net conns for specific addr.               */
+
+    goto exit_release;
+
+exit_release:
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetConn_CloseAllConnsByAddrHandler()
+*
+* Description : Close ALL network connections for a specific address.
+*
+* Argument(s) : p_addr      Pointer to protocol address to close connection (see Note #3).
+*
+*               addr_len    Length  of protocol address (in octets).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_CloseAllConnsByAddr(),
+*               NetIPv4_CfgAddrAddDynamic(),
+*               NetIPv4_CfgAddrRemove().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (1) (a) Certain circumstances may require that :
+*
+*                       (1) ALL network protocol suite connections for a specific local address close; ...
+*                       (2) All pending network &/or application connection function(s) SHOULD :
+*                           (A) Abort, immediately if possible; ...
+*                           (B) Return appropriate closed error code(s).
+*
+*                   (b) The following lists example(s) when to close all network connections for a given
+*                       local address :
+*
+*                       (1) RFC #2131, Section 4.4.5 states that "if the [DHCP] client is given a new
+*                           network address, it MUST NOT continue using the previous network address
+*                           and SHOULD notify the local users of the problem".
+*
+*                           Therefore, ALL network connections based on a previously configured local
+*                           address MUST be closed.
+*
+*               (2) NetConn_CloseAllConnsByAddrHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetConn_CloseAllConnsByAddr()  Note #2'.
+*
+*               (3) Protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+void  NetConn_CloseAllConnsByAddrHandler (CPU_INT08U         *p_addr,
+                                          NET_CONN_ADDR_LEN   addr_len)
+{
+                                                                        /* Close ALL net conns for specific addr.       */
+    NetConn_CloseAllConnsHandler((NET_IF_NBR         )NET_IF_NBR_NONE,
+                                 (CPU_INT08U        *)p_addr,
+                                 (NET_CONN_ADDR_LEN  )addr_len,
+                                 (NET_CONN_CLOSE_CODE)NET_CONN_CLOSE_BY_ADDR);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetConn_IF_NbrGet()
+*
+* Description : Get network connection's interface number.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get interface number.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection interface number
+*                                                                   successfully returned.
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               - RETURNED BY NetIF_IsEnHandler() : --
+*                               NET_IF_ERR_INVALID_IF           Invalid OR disabled interface.
+*
+* Return(s)   : Network connection's interface number, if NO error(s).
+*
+*               NET_IF_NBR_NONE,                       otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_IF_NBR  NetConn_IF_NbrGet (NET_CONN_ID   conn_id,
+                               NET_ERR      *p_err)
+{
+    NET_CONN    *p_conn;
+    NET_IF_NBR   if_nbr;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_INVALID_CONN;
+        return (NET_IF_NBR_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return  (NET_IF_NBR_NONE);
+    }
+#endif
+
+                                                                /* -------------- GET NET CONN'S IF NBR --------------- */
+    p_conn = &NetConn_Tbl[conn_id];
+    if_nbr =  p_conn->IF_Nbr;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------ VALIDATE NET CONN'S IF NBR ------------ */
+    NetIF_IsEnHandler(if_nbr, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+         return  (NET_IF_NBR_NONE);
+    }
+#endif
+
+   *p_err =  NET_CONN_ERR_NONE;
+
+    return (if_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetConn_ID_AppGet()
+*
+* Description : Get network connection's application layer handle identifier.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get application layer handle identifier.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection handle identifier
+*                                                                   successfully returned.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : Network connection's application layer handle identifier, if NO error(s).
+*
+*               NET_CONN_ID_NONE,                                         otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_CONN_ID  NetConn_ID_AppGet (NET_CONN_ID   conn_id,
+                                NET_ERR      *p_err)
+{
+    NET_CONN     *p_conn;
+    NET_CONN_ID   conn_id_app;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_NONE;
+        return (NET_CONN_ID_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return  (NET_CONN_ID_NONE);
+    }
+#endif
+
+                                                                /* -------------- GET NET CONN'S APP ID --------------- */
+    p_conn      = &NetConn_Tbl[conn_id];
+    conn_id_app =  p_conn->ID_App;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+
+    return (conn_id_app);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetConn_ID_AppSet()
+*
+* Description : Set network connection's application layer handle identifier.
+*
+* Argument(s) : conn_id         Handle identifier of network connection to set application layer handle
+*                                   identifier.
+*
+*               conn_id_app     Connection's application layer handle identifier.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection handle identifier
+*                                                                   successfully set.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetConn_ID_AppSet (NET_CONN_ID   conn_id,
+                         NET_CONN_ID   conn_id_app,
+                         NET_ERR      *p_err)
+{
+    NET_CONN  *p_conn;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_NONE;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* --------------- VALIDATE APP CONN ID --------------- */
+    if (conn_id_app < NET_CONN_ID_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnCtr);
+       *p_err = NET_CONN_ERR_INVALID_CONN;
+        return;
+    }
+
+                                                                /* -------------- SET NET CONN'S APP ID --------------- */
+    p_conn         = &NetConn_Tbl[conn_id];
+    p_conn->ID_App =  conn_id_app;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetConn_ID_AppCloneGet()
+*
+* Description : Get network connection's application layer clone handle identifier.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get application layer clone handle
+*                               identifier.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection handle identifier
+*                                                                   successfully returned.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : Network connection's application layer clone handle identifier, if NO error(s).
+*
+*               NET_CONN_ID_NONE,                                               otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_CONN_ID  NetConn_ID_AppCloneGet (NET_CONN_ID   conn_id,
+                                     NET_ERR      *p_err)
+{
+    NET_CONN     *p_conn;
+    NET_CONN_ID   conn_id_app_clone;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_NONE;
+        return (NET_CONN_ID_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return  (NET_CONN_ID_NONE);
+    }
+#endif
+
+                                                                /* ----------- GET NET CONN'S APP CLONE ID ------------ */
+    p_conn            = &NetConn_Tbl[conn_id];
+    conn_id_app_clone =  p_conn->ID_AppClone;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+
+    return (conn_id_app_clone);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetConn_ID_AppCloneSet()
+*
+* Description : Set network connection's application layer clone handle identifier.
+*
+* Argument(s) : conn_id         Handle identifier of network connection to set application layer clone
+*                                   handle identifier.
+*
+*               conn_id_app     Connection's application layer handle identifier.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection handle identifier
+*                                                                   successfully set.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetConn_ID_AppCloneSet (NET_CONN_ID   conn_id,
+                              NET_CONN_ID   conn_id_app,
+                              NET_ERR      *p_err)
+{
+    NET_CONN  *p_conn;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_NONE;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* --------------- VALIDATE APP CONN ID --------------- */
+    if (conn_id_app < NET_CONN_ID_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnCtr);
+       *p_err = NET_CONN_ERR_INVALID_CONN;
+        return;
+    }
+
+                                                                /* ----------- SET NET CONN'S APP CLONE ID ------------ */
+    p_conn              = &NetConn_Tbl[conn_id];
+    p_conn->ID_AppClone =  conn_id_app;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetConn_ID_TransportGet()
+*
+* Description : Get network connection's transport layer handle identifier.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get transport layer handle identifier.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection handle identifier
+*                                                                   successfully returned.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : Network connection's transport layer handle identifier, if NO error(s).
+*
+*               NET_CONN_ID_NONE,                                       otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_CONN_ID  NetConn_ID_TransportGet (NET_CONN_ID   conn_id,
+                                      NET_ERR      *p_err)
+{
+    NET_CONN     *p_conn;
+    NET_CONN_ID   conn_id_transport;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_NONE;
+        return (NET_CONN_ID_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return  (NET_CONN_ID_NONE);
+    }
+#endif
+
+                                                                /* ----------- GET NET CONN'S TRANSPORT ID ------------ */
+    p_conn            = &NetConn_Tbl[conn_id];
+    conn_id_transport =  p_conn->ID_Transport;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+
+    return (conn_id_transport);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetConn_ID_TransportSet()
+*
+* Description : Set network connection's transport layer handle identifier.
+*
+* Argument(s) : conn_id             Handle identifier of network connection to set transport layer handle
+*                                       identifier.
+*
+*               conn_id_transport   Connection's transport layer handle identifier.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection handle identifier
+*                                                                   successfully set.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetConn_ID_TransportSet (NET_CONN_ID   conn_id,
+                               NET_CONN_ID   conn_id_transport,
+                               NET_ERR      *p_err)
+{
+    NET_CONN  *p_conn;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_NONE;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* ------------ VALIDATE TRANSPORT CONN ID ------------ */
+    if (conn_id_transport < NET_CONN_ID_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnCtr);
+       *p_err = NET_CONN_ERR_INVALID_CONN;
+        return;
+    }
+
+                                                                /* ----------- SET NET CONN'S TRANSPORT ID ------------ */
+    p_conn               = &NetConn_Tbl[conn_id];
+    p_conn->ID_Transport =  conn_id_transport;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_AddrLocalGet()
+*
+* Description : Get network connection's local address.
+*
+* Argument(s) : conn_id         Handle identifier of network connection to get local address.
+*
+*               p_addr_local    Pointer to variable that will receive the return  local address (see Note #1),
+*                                   if NO error(s).
+*
+*               p_addr_len      Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address buffer pointed to by 'p_addr_local'.
+*                                   (b) (1) Return the actual local address length, if NO error(s);
+*                                       (2) Return 0,                               otherwise.
+*
+*                               See also Note #2.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE                   Network connection address successfully
+*                                                                       returned.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument 'p_addr_local'/'p_addr_len'
+*                                                                       passed a NULL pointer.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*
+*                                                                   ----- RETURNED BY NetConn_IsUsed() : -----
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnHandlerStream(),
+*               NetSock_ConnHandlerAddrRemoteValidate(),
+*               NetSock_TxDataHandlerDatagram(),
+*               NetSock_FreeAddr(),
+*               NetTCP_TxConnPrepareSegAddrs().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network connection addresses maintained in network-order.
+*
+*               (2) Since 'p_addr_len' argument is both an input & output argument (see 'Argument(s) :
+*                   p_addr_len'), ... :
+*
+*                   (a) Its input value SHOULD be validated prior to use; ...
+*                       (1) In the case that the 'p_addr_len' argument is passed a null pointer,
+*                           NO input value is validated or used.
+*
+*                   (b) While its output value MUST be initially configured to return a default value
+*                       PRIOR to all other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+void  NetConn_AddrLocalGet (NET_CONN_ID         conn_id,
+                            CPU_INT08U         *p_addr_local,
+                            NET_CONN_ADDR_LEN  *p_addr_len,
+                            NET_ERR            *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_CONN_ADDR_LEN   addr_len;
+#endif
+    NET_CONN           *p_conn;
+
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_len == (NET_CONN_ADDR_LEN *)0) {                 /* See Note #2a1.                                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+     addr_len = *p_addr_len;
+#endif
+   *p_addr_len =  0u;                                           /* Cfg dflt addr len for err (see Note #2b).            */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (addr_len > NET_CONN_ADDR_LEN_MAX) {                     /* Validate initial addr len (see Note #2a).            */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnAddrLenCtr);
+       *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+    if (p_addr_local == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+                                                                /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+
+    p_conn = &NetConn_Tbl[conn_id];
+
+                                                                /* -------------- VALIDATE NET CONN ADDR -------------- */
+    if (p_conn->AddrLocalValid != DEF_YES) {                    /* If net conn local addr NOT avail, rtn err.           */
+       *p_err = NET_CONN_ERR_ADDR_NOT_USED;
+        return;
+    }
+
+                                                                /* ------------ GET NET CONN'S LOCAL ADDR ------------- */
+    NET_UTIL_VAL_COPY(p_addr_local,                             /* Copy & rtn net conn local addr.                      */
+                     &p_conn->AddrLocal[0],
+                      NET_CONN_ADDR_LEN_MAX);
+
+   *p_addr_len = NET_CONN_ADDR_LEN_MAX;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_AddrLocalSet()
+*
+* Description : Set network connection's local address.
+*
+* Argument(s) : conn_id         Handle identifier of network connection to set local address.
+*
+*               if_nbr          Interface number  of network connection with   local address.
+*
+*               p_addr_local    Pointer to local address (see Note #1).
+*
+*               addr_len        Length  of local address (in octets).
+*
+*               addr_over_wr    Allow      local address overwrite :
+*
+*                                   DEF_NO                          Do NOT overwrite local address.
+*                                   DEF_YES                                Overwrite local address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE                   Network connection address successfully set.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument 'p_addr_local' passed a NULL pointer.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+*                                                                   ------ RETURNED BY NetConn_IsUsed() : -------
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_BindHandler(),
+*               NetTCP_RxPktConnHandlerListen().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network connection addresses maintained in network-order.
+*********************************************************************************************************
+*/
+
+void  NetConn_AddrLocalSet (NET_CONN_ID         conn_id,
+                            NET_IF_NBR          if_nbr,
+                            CPU_INT08U         *p_addr_local,
+                            NET_CONN_ADDR_LEN   addr_len,
+                            CPU_BOOLEAN         addr_over_wr,
+                            NET_ERR            *p_err)
+{
+    NET_CONN  *p_conn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_conn = &NetConn_Tbl[conn_id];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------ VALIDATE ADDR ------------------- */
+    if (p_addr_local == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+    if (addr_len > NET_CONN_ADDR_LEN_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnAddrLenCtr);
+       *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+
+    if (addr_over_wr != DEF_YES) {                              /* If addr over-wr NOT req'd ...                        */
+        if (p_conn->AddrLocalValid != DEF_NO) {                 /* ... & local addr valid,   ...                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnAddrInUseCtr);
+           *p_err = NET_CONN_ERR_ADDR_IN_USE;                   /* ... rtn err.                                         */
+            return;
+        }
+    }
+
+#else
+   (void)&addr_len;                                             /* Prevent 'variable unused' compiler warnings.         */
+   (void)&addr_over_wr;
+#endif
+
+
+                                                                /* ------------ SET NET CONN'S LOCAL ADDR ------------- */
+    Mem_Clr ((void     *)&p_conn->AddrLocal[0],
+             (CPU_SIZE_T) NET_CONN_ADDR_LEN_MAX);
+
+    NET_UTIL_VAL_COPY(&p_conn->AddrLocal[0],                    /* Copy local addr to net conn addr.                    */
+                       p_addr_local,
+                       NET_CONN_ADDR_LEN_MAX);
+
+    p_conn->AddrLocalValid = DEF_YES;
+    p_conn->IF_Nbr         = if_nbr;                            /* Set IF nbr.                                          */
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_AddrRemoteGet()
+*
+* Description : Get network connection's remote address.
+*
+* Argument(s) : conn_id         Handle identifier of network connection to get remote address.
+*
+*               p_addr_remote   Pointer to variable that will receive the return  remote address (see Note #1),
+*                                   if NO error(s).
+*
+*               p_addr_len      Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address buffer pointed to by 'p_addr_remote'.
+*                                   (b) (1) Return the actual local address length, if NO error(s);
+*                                       (2) Return 0,                               otherwise.
+*
+*                               See also Note #2.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE                   Network connection address successfully
+*                                                                       returned.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument 'p_addr_local'/'p_addr_len'
+*                                                                       passed a NULL pointer.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*
+*                                                                   ----- RETURNED BY NetConn_IsUsed() : -----
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Accept(),
+*               NetSock_BindHandler(),
+*               NetSock_RxDataHandlerStream(),
+*               NetSock_TxDataHandlerDatagram(),
+*               NetTCP_TxConnPrepareSegAddrs().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network connection addresses maintained in network-order.
+*
+*               (2) Since 'p_addr_len' argument is both an input & output argument (see 'Argument(s) :
+*                   p_addr_len'), ... :
+*
+*                   (a) Its input value SHOULD be validated prior to use; ...
+*                       (1) In the case that the 'p_addr_len' argument is passed a null pointer,
+*                           NO input value is validated or used.
+*
+*                   (b) While its output value MUST be initially configured to return a default value
+*                       PRIOR to all other validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+void  NetConn_AddrRemoteGet (NET_CONN_ID         conn_id,
+                             CPU_INT08U         *p_addr_remote,
+                             NET_CONN_ADDR_LEN  *p_addr_len,
+                             NET_ERR            *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_CONN_ADDR_LEN   addr_len;
+#endif
+    NET_CONN           *p_conn;
+
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_addr_len == (NET_CONN_ADDR_LEN *)0) {                 /* See Note #2a1.                                       */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+     addr_len = *p_addr_len;
+#endif
+   *p_addr_len =  0u;                                           /* Cfg dflt addr len for err (see Note #2b).            */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (addr_len > NET_CONN_ADDR_LEN_MAX) {                     /* Validate initial addr len (see Note #2a).            */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnAddrLenCtr);
+       *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+    if (p_addr_remote == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+                                                                /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+
+    p_conn = &NetConn_Tbl[conn_id];
+
+                                                                /* -------------- VALIDATE NET CONN ADDR -------------- */
+    if (p_conn->AddrRemoteValid != DEF_YES) {                   /* If net conn remote addr NOT avail, rtn err.          */
+       *p_err = NET_CONN_ERR_ADDR_NOT_USED;
+        return;
+    }
+
+                                                                /* ------------ SET NET CONN'S REMOTE ADDR ------------ */
+    NET_UTIL_VAL_COPY(p_addr_remote,                            /* Copy & rtn net conn remote addr.                     */
+                     &p_conn->AddrRemote[0],
+                      NET_CONN_ADDR_LEN_MAX);
+
+   *p_addr_len = NET_CONN_ADDR_LEN_MAX;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_AddrRemoteSet()
+*
+* Description : Set network connection's remote address.
+*
+* Argument(s) : conn_id         Handle identifier of network connection to set remote address.
+*
+*               p_addr_remote   Pointer to remote address (see Note #1).
+*
+*               addr_len        Length  of remote address (in octets).
+*
+*               addr_over_wr    Allow      remote address overwrite :
+*
+*                                   DEF_NO                          Do NOT overwrite remote address.
+*                                   DEF_YES                                Overwrite remote address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE                   Network connection address successfully set.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument 'p_addr_local' passed a NULL pointer.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+*                                                                   ------ RETURNED BY NetConn_IsUsed() : -------
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnHandlerAddrRemoteSet(),
+*               NetTCP_RxPktConnHandlerListen().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network connection addresses maintained in network-order.
+*********************************************************************************************************
+*/
+
+void  NetConn_AddrRemoteSet (NET_CONN_ID         conn_id,
+                             CPU_INT08U         *p_addr_remote,
+                             NET_CONN_ADDR_LEN   addr_len,
+                             CPU_BOOLEAN         addr_over_wr,
+                             NET_ERR            *p_err)
+{
+    NET_CONN  *p_conn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_conn = &NetConn_Tbl[conn_id];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------ VALIDATE ADDR ------------------- */
+    if (p_addr_remote == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+    if (addr_len > NET_CONN_ADDR_LEN_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnAddrLenCtr);
+       *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+
+    if (addr_over_wr != DEF_YES) {                              /* If addr over-wr NOT req'd ...                        */
+        if (p_conn->AddrRemoteValid != DEF_NO) {                /* ... & remote addr valid,  ...                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnAddrInUseCtr);
+           *p_err = NET_CONN_ERR_ADDR_IN_USE;                   /* ... rtn err.                                         */
+            return;
+        }
+    }
+
+#else
+   (void)&addr_len;                                             /* Prevent 'variable unused' compiler warnings.         */
+   (void)&addr_over_wr;
+#endif
+
+                                                                /* ------------ GET NET CONN'S REMOTE ADDR ------------ */
+    NET_UTIL_VAL_COPY(&p_conn->AddrRemote[0],                   /* Copy remote addr to net conn addr.                   */
+                       p_addr_remote,
+                       NET_CONN_ADDR_LEN_MAX);
+
+    p_conn->AddrRemoteValid = DEF_YES;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_AddrRemoteCmp()
+*
+* Description : Compare an address to a network connection's remote address.
+*
+* Argument(s) : conn_id         Handle identifier of connection to compare.
+*
+*               p_addr_remote   Pointer to remote address to compare.
+*
+*               addr_len        Length  of remote address (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE                   Remote address successfully compared to
+*                                                                       network connection's remote address;
+*                                                                       check return value.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument 'p_addr_remote' passed a NULL
+*                                                                       pointer.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*
+*                                                                   ----- RETURNED BY NetConn_IsUsed() : -----
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+* Return(s)   : DEF_YES, if addresses successfully compare.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_IsValidAddrRemote().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetConn_AddrRemoteCmp (NET_CONN_ID         conn_id,
+                                    CPU_INT08U         *p_addr_remote,
+                                    NET_CONN_ADDR_LEN   addr_len,
+                                    NET_ERR            *p_err)
+{
+    NET_CONN     *p_conn;
+    CPU_BOOLEAN   cmp;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return  (DEF_NO);
+    }
+
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    if (p_addr_remote == (CPU_INT08U *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return (DEF_NO);
+    }
+    if (addr_len > NET_CONN_ADDR_LEN_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnAddrLenCtr);
+       *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+        return (DEF_NO);
+    }
+
+#else
+   (void)&addr_len;                                             /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+    p_conn = &NetConn_Tbl[conn_id];
+
+                                                                /* -------------- VALIDATE NET CONN ADDR -------------- */
+    if (p_conn->AddrRemoteValid != DEF_YES) {                   /* If conn local addr NOT avail, rtn err.               */
+       *p_err = NET_CONN_ERR_ADDR_NOT_USED;
+        return (DEF_NO);
+    }
+
+                                                                /* ------------ VALIDATE NET CONN ADDR LEN ------------- */
+    switch (p_conn->Family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_CONN_FAMILY_IP_V4_SOCK:
+             if (addr_len != NET_SOCK_ADDR_IP_V4_LEN_PORT_ADDR) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnAddrLenCtr);
+                *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+                 return (DEF_NO);
+             }
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_CONN_FAMILY_IP_V6_SOCK:
+             if (addr_len != NET_SOCK_ADDR_IP_V6_LEN_PORT_ADDR) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnAddrLenCtr);
+                *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+                 return (DEF_NO);
+             }
+             break;
+#endif
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvFamilyCtr);
+            *p_err = NET_CONN_ERR_INVALID_FAMILY;
+             return (DEF_NO);
+    }
+
+    cmp = Mem_Cmp((void     *) p_addr_remote,                   /* Cmp remote addr to conn addr.                        */
+                  (void     *)&p_conn->AddrRemote[0],
+                  (CPU_SIZE_T) addr_len);
+
+   *p_err = NET_CONN_ERR_NONE;
+
+    return (cmp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_IPv4TxParamsGet()
+*
+* Description : (1) Get network connection's configured transmit IPv4 parameters :
+*
+*                   (a) TOS
+*                   (b) TTL
+*                   (c) Flags
+*
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get configured transmit IPv4 parameters.
+*
+*               p_ip_flags  Pointer to variable that will receive the return transmit IPv4 flags, if NO error(s).
+*
+*               p_ip_tos    Pointer to variable that will receive the return transmit IPv4 TOS,   if NO error(s).
+*
+*               p_ip_ttl    Pointer to variable that will receive the return transmit IPv4 TTL,   if NO error(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection transmit IPv4 parameters
+*                                                                   successfully returned.
+*                               NET_ERR_FAULT_NULL_FNCT           Argument 'p_ip_tos'/'p_ip_ttl'/'p_ip_flags'
+*                                                                   passed a NULL pointer.
+*
+*                                                               ---- RETURNED BY NetConn_IsUsed() : -----
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+void  NetConn_IPv4TxParamsGet (NET_CONN_ID      conn_id,
+                               NET_IPv4_FLAGS  *p_ip_flags,
+                               NET_IPv4_TOS    *p_ip_tos,
+                               NET_IPv4_TTL    *p_ip_ttl,
+                               NET_ERR         *p_err)
+{
+    NET_CONN  *p_conn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* -------------- VALIDATE IP PARAM PTRS -------------- */
+    if (p_ip_flags == (NET_IPv4_FLAGS *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+    if (p_ip_tos == (NET_IPv4_TOS *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+    if (p_ip_ttl == (NET_IPv4_TTL *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+                                                                /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* ----------- GET NET CONN'S IP TX PARAMS ------------ */
+    p_conn     = &NetConn_Tbl[conn_id];
+   *p_ip_flags =  p_conn->TxIPv4Flags;
+   *p_ip_tos   =  p_conn->TxIPv4TOS;
+   *p_ip_ttl   =  p_conn->TxIPv4TTL;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_IPv4TxFlagsGet()
+*
+* Description : Get network connection's configured transmit IP flags.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get configured transmit IP flags.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection    transmit IP flags
+*                                                                   successfully returned.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ----
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : Network connection's configured transmit IP flags, if NO error(s).
+*
+*               NET_IPv4_FLAG_NONE,                                  otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+NET_IPv4_FLAGS  NetConn_IPv4TxFlagsGet (NET_CONN_ID   conn_id,
+                                        NET_ERR      *p_err)
+{
+    NET_CONN        *p_conn;
+    NET_IPv4_FLAGS   ip_flags;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_NONE;
+        return (NET_IPv4_FLAG_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return  (NET_IPv4_FLAG_NONE);
+    }
+#endif
+
+                                                                /* ------------ GET NET CONN'S IP TX FLAGS ------------ */
+    p_conn   = &NetConn_Tbl[conn_id];
+    ip_flags =  p_conn->TxIPv4Flags;
+
+
+   *p_err    =  NET_CONN_ERR_NONE;
+
+    return (ip_flags);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_IPv4TxFlagsSet()
+*
+* Description : Set network connection's configured transmit IP flags.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to set configured transmit IP flags.
+*
+*               ip_flags    Desired transmit IP flags.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection    transmit IP flags
+*                                                                   successfully set.
+*                               NET_CONN_ERR_INVALID_ARG        Invalid transmit IP flags.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ----
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+void  NetConn_IPv4TxFlagsSet (NET_CONN_ID      conn_id,
+                              NET_IPv4_FLAGS   ip_flags,
+                              NET_ERR         *p_err)
+{
+    NET_CONN     *p_conn;
+    CPU_BOOLEAN   valid;
+
+                                                                /* ---------------- VALIDATE IP FLAGS ----------------- */
+    valid = NetIPv4_IsValidFlags(ip_flags);
+    if (valid != DEF_YES) {
+       *p_err = NET_CONN_ERR_INVALID_ARG;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* ------------ SET NET CONN'S IP TX FLAGS ------------ */
+    p_conn              = &NetConn_Tbl[conn_id];
+    p_conn->TxIPv4Flags =  ip_flags;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_IPv4TxTOS_Get()
+*
+* Description : Get network connection's configured transmit IP TOS.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get configured transmit IP TOS.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection    transmit IP TOS
+*                                                                   successfully returned.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : Network connection's configured transmit IP TOS, if NO error(s).
+*
+*               NET_IPv4_TOS_NONE,                                 otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+NET_IPv4_TOS  NetConn_IPv4TxTOS_Get (NET_CONN_ID   conn_id,
+                                     NET_ERR      *p_err)
+{
+    NET_CONN      *p_conn;
+    NET_IPv4_TOS   ip_tos;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_NONE;
+        return (NET_IPv4_TOS_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return  (NET_IPv4_TOS_NONE);
+    }
+#endif
+
+                                                                /* ------------- GET NET CONN'S IP TX TOS ------------- */
+    p_conn = &NetConn_Tbl[conn_id];
+    ip_tos =  p_conn->TxIPv4TOS;
+
+
+   *p_err  =  NET_CONN_ERR_NONE;
+
+    return (ip_tos);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetConn_IPv4TxTOS_Set()
+*
+* Description : Set network connection's configured transmit IPv4 TOS.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to set configured transmit IPv4 TOS.
+*
+*               ip_tos      Desired transmit IPv4 TOS (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection    transmit IPv4 TOS
+*                                                                   successfully set.
+*                               NET_CONN_ERR_INVALID_ARG        Invalid transmit IPv4 TOS.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTxIP_TOS().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) RFC #1122, Section 4.1.4 states that "an application-layer program MUST be
+*                       able to set the ... [IP] TOS ... for sending a ... datagram, [which] must
+*                       be passed transparently to the IP layer".
+*
+*                   (b) RFC #1122, Section 4.2.4.2 reiterates that :
+*
+*                       (1) "The application layer MUST be able to specify the [IP] Type-of-Service
+*                            (TOS) for [packets] that are sent on a connection."
+*
+*                       (2) "It not required [sic], but the application SHOULD be able to change
+*                            the [IP] TOS during the connection lifetime."
+*
+*                   See also 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+void  NetConn_IPv4TxTOS_Set (NET_CONN_ID    conn_id,
+                             NET_IPv4_TOS   ip_tos,
+                             NET_ERR       *p_err)
+{
+    NET_CONN     *p_conn;
+    CPU_BOOLEAN   valid;
+
+                                                                /* ----------------- VALIDATE IP TOS ------------------ */
+    valid = NetIPv4_IsValidTOS(ip_tos);
+    if (valid != DEF_YES) {
+       *p_err = NET_CONN_ERR_INVALID_ARG;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* ------------- SET NET CONN'S IP TX TOS ------------- */
+    p_conn            = &NetConn_Tbl[conn_id];
+    p_conn->TxIPv4TOS =  ip_tos;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetConn_IPv4TxTTL_Get()
+*
+* Description : Get network connection's configured transmit IP TTL.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get configured transmit IP TTL.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection    transmit IP TTL
+*                                                                   successfully returned.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : Network connection's configured transmit IP TTL, if NO error(s).
+*
+*               NET_IPv4_TTL_NONE,                                 otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+NET_IPv4_TTL  NetConn_IPv4TxTTL_Get (NET_CONN_ID   conn_id,
+                                     NET_ERR      *p_err)
+{
+    NET_CONN      *p_conn;
+    NET_IPv4_TTL   ip_ttl;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_NONE;
+        return (NET_IPv4_TTL_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return (NET_IPv4_TTL_NONE);
+    }
+#endif
+
+                                                                /* ------------- GET NET CONN'S IP TX TTL ------------- */
+    p_conn = &NetConn_Tbl[conn_id];
+    ip_ttl =  p_conn->TxIPv4TTL;
+
+
+   *p_err  =  NET_CONN_ERR_NONE;
+
+    return (ip_ttl);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetConn_IPv4TxTTL_Set()
+*
+* Description : Set network connection's configured transmit IPv4 TTL.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to set configured transmit IPv4 TTL.
+*
+*               ip_ttl      Desired transmit IPv4 TTL (see Note #1) :
+*
+*                               NET_IPv4_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IPv4_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IPv4_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IPv4_TTL_NONE                 Replace with default TTL
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection transmit IPv4 TTL
+*                                                                   successfully set.
+*                               NET_CONN_ERR_INVALID_ARG        Invalid transmit IPv4 TTL.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTxIP_TTL().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) RFC #1122, Section 4.1.4 states that "an application-layer program MUST
+*                       be able to set the [IP] TTL ... for sending a ... datagram, [which] must
+*                       be passed transparently to the IP layer".
+*
+*                   (b) RFC #1122, Section 4.2.2.19 reiterates that "the [IP] TTL value used to
+*                       send ... [packets] MUST be configurable".
+*
+*                   See also 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+void  NetConn_IPv4TxTTL_Set (NET_CONN_ID    conn_id,
+                             NET_IPv4_TTL   ip_ttl,
+                             NET_ERR       *p_err)
+{
+    NET_CONN     *p_conn;
+    CPU_BOOLEAN   valid;
+
+                                                                /* ----------------- VALIDATE IP TTL ------------------ */
+    valid = NetIPv4_IsValidTTL(ip_ttl);
+    if (valid != DEF_YES) {
+       *p_err = NET_CONN_ERR_INVALID_ARG;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* ------------- SET NET CONN'S IP TX TTL ------------- */
+    p_conn            = &NetConn_Tbl[conn_id];
+    p_conn->TxIPv4TTL =  ip_ttl;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetConn_IPv4TxTTL_MulticastGet()
+*
+* Description : Get network connection's configured transmit IPv4 multicast TTL.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get configured transmit IPv4 multicast
+*                               TTL.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection    transmit IPv4 multicast
+*                                                                   TTL successfully returned.
+*
+*                                                               ----- RETURNED BY NetConn_IsUsed() : ------
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : Network connection's configured transmit IP multicast TTL, if NO error(s).
+*
+*               NET_IPv4_TTL_NONE,                                           otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if ((defined(NET_IPv4_MODULE_EN)) && \
+     (defined(NET_MCAST_TX_MODULE_EN)))
+NET_IPv4_TTL  NetConn_IPv4TxTTL_MulticastGet (NET_CONN_ID   conn_id,
+                                              NET_ERR      *p_err)
+{
+    NET_CONN      *p_conn;
+    NET_IPv4_TTL   ip_ttl;
+
+                                                                /* ---------------- VALIDATE NET CONN ----------------- */
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_NONE;
+        return (NET_IPv4_TTL_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return  (NET_IPv4_TTL_NONE);
+    }
+#endif
+
+                                                                /* -------- GET NET CONN'S IP TX MULTICAST TTL -------- */
+    p_conn = &NetConn_Tbl[conn_id];
+    ip_ttl =  p_conn->TxIPv4TTL_Multicast;
+
+
+   *p_err  =  NET_CONN_ERR_NONE;
+
+    return (ip_ttl);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NetConn_IPv4TxTTL_MulticastSet()
+*
+* Description : Set network connection's configured transmit IPv4 multicast TTL.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to set configured transmit IPv4 multicast
+*                               TTL.
+*
+*               ip_ttl      Desired transmit IP multicast TTL (see Note #1) :
+*
+*                               NET_IPv4_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IPv4_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IPv4_TTL_DFLT                 Default TTL transmit value   (1)
+*                               NET_IPv4_TTL_NONE                 Replace with default TTL
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection transmit IP multicast
+*                                                                   TTL successfully set.
+*                               NET_CONN_ERR_INVALID_ARG        Invalid transmit IP multicast TTL.
+*
+*                                                               ---- RETURNED BY NetConn_IsUsed() : ----
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTxIP_TTL_Multicast().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) RFC #1112, Section 6.1 states that "the service interface should provide a way for the
+*                   upper-layer protocol to specify the IP time-to-live of an outgoing multicast datagram".
+*
+*                   See also 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES'.
+*********************************************************************************************************
+*/
+
+#if ((defined(NET_IPv4_MODULE_EN)) && \
+     (defined(NET_MCAST_TX_MODULE_EN)))
+void  NetConn_IPv4TxTTL_MulticastSet (NET_CONN_ID    conn_id,
+                                      NET_IPv4_TTL   ip_ttl,
+                                      NET_ERR       *p_err)
+{
+    NET_CONN     *p_conn;
+    CPU_BOOLEAN   valid;
+
+                                                                /* ------------ VALIDATE IP MULTICAST TTL ------------- */
+    valid = NetIPv4_IsValidTTL(ip_ttl);
+    if (valid != DEF_YES) {
+       *p_err = NET_CONN_ERR_INVALID_ARG;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* -------- SET NET CONN'S IP TX MULTICAST TTL -------- */
+    p_conn                      = &NetConn_Tbl[conn_id];
+    p_conn->TxIPv4TTL_Multicast =  ip_ttl;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetConn_IPv6TxParamsGet()
+*
+* Description : (1) Get network connection's configured transmit IPv6 parameters :
+*
+*                   (a) Traffic Class
+*                   (b) Flow Label
+*                   (c) Hop Limit
+*                   (d) IPv6 Flags
+*
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get configured transmit IPv4 parameters.
+*
+*               p_ip_traffic_class  Pointer to variable that will receive the return transmit IPv4 flags, if NO error(s).
+*
+*               p_ip_flow_label     Pointer to variable that will receive the return transmit IPv4 TOS,   if NO error(s).
+*
+*               p_ip_hop_lim        Pointer to variable that will receive the return transmit IPv4 TTL,   if NO error(s).
+*
+*               p_ip_flags          Pointer to variable that will receive the return transmit IPv4 TTL,   if NO error(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection transmit IPv4 parameters
+*                                                                   successfully returned.
+*                               NET_ERR_FAULT_NULL_FNCT         Argument 'p_ip_tos'/'p_ip_ttl'/'p_ip_flags'
+*                                                                   passed a NULL pointer.
+*
+*                                                               ---- RETURNED BY NetConn_IsUsed() : -----
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv6_MODULE_EN
+void  NetConn_IPv6TxParamsGet (NET_CONN_ID              conn_id,
+                               NET_IPv6_TRAFFIC_CLASS  *p_ip_traffic_class,
+                               NET_IPv6_FLOW_LABEL     *p_ip_flow_label,
+                               NET_IPv6_HOP_LIM        *p_ip_hop_lim,
+                               NET_IPv6_FLAGS          *p_ip_flags,
+                               NET_ERR                 *p_err)
+{
+    NET_CONN  *p_conn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* -------------- VALIDATE IP PARAM PTRS -------------- */
+    if ((p_ip_traffic_class == (NET_IPv6_TRAFFIC_CLASS *)0) &&
+        (p_ip_flow_label    == (NET_IPv6_FLOW_LABEL    *)0) &&
+        (p_ip_hop_lim       == (NET_IPv6_HOP_LIM       *)0) &&
+        (p_ip_flags         == (NET_IPv6_FLAGS         *)0)) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+
+                                                                /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* ----------- GET NET CONN'S IP TX PARAMS ------------ */
+    p_conn = &NetConn_Tbl[conn_id];
+
+    if (p_ip_traffic_class != (NET_IPv6_TRAFFIC_CLASS *)0) {
+       *p_ip_traffic_class  = p_conn->TxIPv6TrafficClass;
+    }
+    if (p_ip_flow_label    != (NET_IPv6_FLOW_LABEL *)0) {
+       *p_ip_flow_label     = p_conn->TxIPv6FlowLabel;
+    }
+    if (p_ip_hop_lim       != (NET_IPv6_HOP_LIM *)0) {
+       *p_ip_hop_lim        = p_conn->TxIPv6HopLim;
+    }
+    if (p_ip_flags         != (NET_IPv6_FLAGS *)0) {
+       *p_ip_flags          = p_conn->TxIPv6Flags;
+    }
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetConn_IPv6TxHopLimMcastGet()
+*
+* Description : Get network connection's configured transmit IPv6 multicast hop limit.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to get configured transmit IPv6 multicast
+*                               hop limit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection    transmit IPv6 multicast
+*                                                                   hop limit successfully returned.
+*
+*                                                               ----- RETURNED BY NetConn_IsUsed() : ------
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : Network connection's configured transmit IP multicast hop limit, if NO error(s).
+*
+*               NET_IPv6_HOP_LIM_NONE,                          otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if ((defined(NET_IPv6_MODULE_EN)) && \
+     (defined(NET_MCAST_TX_MODULE_EN)))
+NET_IPv6_HOP_LIM  NetConn_IPv6TxHopLimMcastGet (NET_CONN_ID   conn_id,
+                                                NET_ERR      *p_err)
+{
+    NET_CONN          *p_conn;
+    NET_IPv6_HOP_LIM   ip_hop_lim;
+
+
+    if (conn_id == NET_CONN_ID_NONE) {
+       *p_err =  NET_CONN_ERR_NONE;
+        return (NET_IPv6_HOP_LIM_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return (NET_IPv6_HOP_LIM_NONE);
+    }
+#endif
+                                                                /* ------ GET NET CONN'S IP TX MULTICAST HOP LIM ------ */
+    p_conn     = &NetConn_Tbl[conn_id];
+    ip_hop_lim =  p_conn->TxIPv6HopLimMulticast;
+
+   *p_err      =  NET_CONN_ERR_NONE;
+    return (ip_hop_lim);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetConn_IPv6TxHopLimMcastSet()
+*
+* Description : Set network connection's configured transmit IPv6 multicast hop limit.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to set configured transmit IPv6 multicast
+*                               hop limit.
+*
+*               ip_hop_lim  Desired transmit IP multicast TTL (see Note #1) :
+*
+*                               NET_IPv6_HOP_LIM_MIN            Minimum hop limit transmit value   (1)
+*                               NET_IPv6_HOP_LIM_MAX            Maximum hop limit transmit value (255)
+*                               NET_IPv6_HOP_LIM_DFLT           Default hop limit transmit value   (1)
+*                               NET_IPv6_HOP_LIM_NONE           Replace with default hop limit
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection transmit IP multicast
+*                                                                   hop limit successfully set.
+*                               NET_CONN_ERR_INVALID_ARG        Invalid transmit IP multicast hop limit.
+*
+*                                                               ---- RETURNED BY NetConn_IsUsed() : ----
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTxIP_TTL_Multicast().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) RFC #1112, Section 6.1 states that "the service interface should provide a way for the
+*                   upper-layer protocol to specify the IP time-to-live of an outgoing multicast datagram".
+*
+*                   See also 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES'.
+*********************************************************************************************************
+*/
+#if ((defined(NET_IPv6_MODULE_EN)) && \
+     (defined(NET_MCAST_TX_MODULE_EN)))
+void  NetConn_IPv6TxHopLimMcastSet (NET_CONN_ID        conn_id,
+                                    NET_IPv6_HOP_LIM   ip_hop_lim,
+                                    NET_ERR           *p_err)
+{
+    NET_CONN     *p_conn;
+    CPU_BOOLEAN   valid;
+
+                                                                /* ------------ VALIDATE IP MULTICAST TTL ------------- */
+    valid = NetIPv6_IsValidHopLim(ip_hop_lim);
+    if (valid != DEF_YES) {
+       *p_err = NET_CONN_ERR_INVALID_ARG;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* -------- SET NET CONN'S IP TX MULTICAST TTL -------- */
+    p_conn                        = &NetConn_Tbl[conn_id];
+    p_conn->TxIPv6HopLimMulticast =  ip_hop_lim;
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          NetConn_IsUsed()
+*
+* Description : Validate network connection in use.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to validate.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection successfully validated
+*                                                                   as in use.
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : DEF_YES, network connection   valid &      in use.
+*
+*               DEF_NO,  network connection invalid or NOT in use.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetConn_IsUsed() MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetConn_IsUsed (NET_CONN_ID   conn_id,
+                             NET_ERR      *p_err)
+{
+    NET_CONN     *p_conn;
+    CPU_BOOLEAN   used;
+
+                                                                /* --------------- VALIDATE NET CONN ID --------------- */
+    if (conn_id < NET_CONN_ID_MIN) {
+       *p_err = NET_CONN_ERR_INVALID_CONN;
+        return (DEF_NO);
+    }
+    if (conn_id > (NET_CONN_ID)NET_CONN_ID_MAX) {
+       *p_err = NET_CONN_ERR_INVALID_CONN;
+        return (DEF_NO);
+    }
+
+                                                                /* -------------- VALIDATE NET CONN USED -------------- */
+    p_conn = &NetConn_Tbl[conn_id];
+    used   =  DEF_BIT_IS_SET(p_conn->Flags, NET_CONN_FLAG_USED);
+    if (used != DEF_YES) {
+       *p_err = NET_CONN_ERR_NOT_USED;
+        return (DEF_NO);
+    }
+
+
+   *p_err = NET_CONN_ERR_NONE;
+
+    return (DEF_YES);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                           NetConn_IsIPv6()
+*
+* Description : Determine IP address used.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to check.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE    No error
+*
+* Return(s)   : DEF_YES, network connection is     IPv6.
+*
+*               DEF_NO,  network connection is NOT IPv6.
+*
+* Caller(s)   : Various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetConn_IsIPv6() MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetConn_IsIPv6 (NET_CONN_ID   conn_id,
+                             NET_ERR      *p_err)
+{
+    NET_CONN     *p_conn;
+    CPU_BOOLEAN   ipv6 = DEF_NO;
+
+    p_conn = &NetConn_Tbl[conn_id];
+
+    if (p_conn->Family == NET_CONN_FAMILY_IP_V6_SOCK) {
+        ipv6 = DEF_YES;
+    }
+
+
+    *p_err = NET_CONN_ERR_NONE;
+
+    return (ipv6);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetConn_IsConn()
+*
+* Description : Determine network connection status.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to check.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_CONN_NONE          NO   network connection.
+*                               NET_CONN_ERR_CONN_HALF          Half network connection --
+*                                                                   local            address valid.
+*                               NET_CONN_ERR_CONN_FULL          Full network connection --
+*                                                                   local AND remote address valid.
+*
+*                                                               --- RETURNED BY NetConn_IsUsed() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetConn_IsConn() MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+void  NetConn_IsConn (NET_CONN_ID   conn_id,
+                      NET_ERR      *p_err)
+{
+    NET_CONN  *p_conn;
+
+                                                                /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+
+                                                                /* ----------------- GET CONN STATUS ------------------ */
+    p_conn = &NetConn_Tbl[conn_id];
+    if (p_conn->AddrLocalValid == DEF_YES) {
+        if (p_conn->AddrRemoteValid == DEF_YES) {
+           *p_err = NET_CONN_ERR_CONN_FULL;
+        } else {
+           *p_err = NET_CONN_ERR_CONN_HALF;
+        }
+    } else {
+       *p_err = NET_CONN_ERR_CONN_NONE;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetConn_IsPortUsed()
+*
+* Description : Verify that the specify port number is already used by a connection.
+*
+* Argument(s) : port_nbr    Port number to validate
+*
+*               protocol    Protocol type associated with the port usage:
+*                               NET_PROTOCOL_TYPE_UDP_V4
+*                               NET_PROTOCOL_TYPE_TCP_V4
+*                               NET_PROTOCOL_TYPE_UDP_V6
+*                               NET_PROTOCOL_TYPE_TCP_V6
+*
+*               p_err       Pointer to variable that will receive the return error code from this function.
+*
+* Return(s)   : $$$$ Add return value description.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetConn_IsPortUsed (NET_PORT_NBR        port_nbr,
+                                 NET_PROTOCOL_TYPE   protocol,
+                                 NET_ERR            *p_err)
+{
+    NET_CONN              *p_conn = &NetConn_Tbl[0];
+    NET_CONN_PROTOCOL_IX   protocol_ix;
+    CPU_INT32U             i;
+    CPU_BOOLEAN            used = DEF_YES;
+
+
+
+    switch (protocol) {
+        case NET_PROTOCOL_TYPE_UDP_V4:
+             protocol_ix = NET_CONN_PROTOCOL_IX_IP_V4_UDP;
+             break;
+
+        case NET_PROTOCOL_TYPE_TCP_V4:
+             protocol_ix = NET_CONN_PROTOCOL_IX_IP_V4_TCP;
+             break;
+
+        case NET_PROTOCOL_TYPE_UDP_V6:
+             protocol_ix = NET_CONN_PROTOCOL_IX_IP_V6_UDP;
+             break;
+
+        case NET_PROTOCOL_TYPE_TCP_V6:
+             protocol_ix = NET_CONN_PROTOCOL_IX_IP_V6_TCP;
+             break;
+
+        default:
+            *p_err = NET_CONN_ERR_INVALID_PROTOCOL;
+             goto exit;
+    }
+
+
+    for (i = 0; i < NET_CONN_NBR_CONN; i++) {
+        if (p_conn->ProtocolIx == protocol_ix) {
+            CPU_BOOLEAN   found;
+            NET_PORT_NBR  *p_port = (NET_PORT_NBR *)&p_conn->AddrLocal[0] + NET_CONN_ADDR_IP_IX_PORT;
+
+
+            found = Mem_Cmp((void *)&port_nbr,
+                            (void *)p_port,
+                             sizeof(port_nbr));
+            if (found == DEF_YES) {
+                used   = DEF_YES;
+               *p_err  = NET_CONN_ERR_NONE;
+                goto exit;
+            }
+        }
+
+        p_conn++;
+    }
+
+
+    used  = DEF_NO;
+   *p_err = NET_CONN_ERR_NONE;
+    goto exit;
+
+exit:
+    return (used);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetConn_PoolStatGet()
+*
+* Description : Get network connection statistics pool.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Network connection statistics pool, if NO error(s).
+*
+*               NULL               statistics pool, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) NetConn_PoolStatGet() blocked until network initialization completes; return NULL
+*                   statistics pool.
+*
+*               (2) 'NetConn_PoolStat' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+NET_STAT_POOL  NetConn_PoolStatGet (void)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    NET_ERR        err;
+#endif
+    NET_STAT_POOL  stat_pool;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        NetStat_PoolClr(&stat_pool, &err);
+        return (stat_pool);                                     /* ... rtn NULL stat pool (see Note #1).                */
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    stat_pool = NetConn_PoolStat;
+    CPU_CRITICAL_EXIT();
+
+    return (stat_pool);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetConn_PoolStatResetMaxUsed()
+*
+* Description : Reset network connection statistics pool's maximum number of entries used.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) NetConn_PoolStatResetMaxUsed() blocked until network initialization completes.
+*
+*                   (a) However, since 'NetConn_PoolStat' is reset when network initialization completes;
+*                       NO error is returned.
+*********************************************************************************************************
+*/
+
+void  NetConn_PoolStatResetMaxUsed (void)
+{
+    NET_ERR  err;
+
+
+                                                                /* Acquire net lock.                                    */
+    Net_GlobalLockAcquire((void *)&NetConn_PoolStatResetMaxUsed, &err);
+    if (err != NET_ERR_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        goto exit_release;                                      /* ... rtn w/o err (see Note #1a).                      */
+    }
+#endif
+
+
+    NetStat_PoolResetUsedMax(&NetConn_PoolStat, &err);          /* Reset net conn stat pool.                            */
+
+    goto exit_release;
+
+exit_release:
+
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetConn_Srch()
+*
+* Description : (1) Search connection list for network connection with specific local &/or remote addresses :
+*
+*                   (a) Get    network connection list  head pointer
+*                   (b) Search network connection list  for best-match  network connection chain
+*                   (c) Search network connection chain for best-match  network connection
+*                   (d) Return network connection handle identifier, if network connection     found
+*                         OR
+*                       Null identifier,                             if network connection NOT found
+*
+*               (2) Network connection are organized into connection lists & chains to expedite connection
+*                   searches.
+*
+*                   (a) (1) For each connection family & protocol type, one connection list is maintained.
+*
+*                       (2) (A) Each connection list is maintained as a list of connection lists.  Each
+*                               connection list is uniquely organized by the local port number.
+*
+*                               In other words, a connection list's top-level connections are each the heads
+*                               of their own connection list & each have a local port number that is unique
+*                               from all the other connection lists.
+*
+*                           (B) Each connection list maintained within a connection list is also referred to
+*                               as a connection chain.
+*
+*                       (3) Each connection chain is an organization of connections that all share the same
+*                           local port number but different local address &/or remote address.
+*
+*                           In other words, connections in a connection chain share the same local port number;
+*                           however, no two connections in a connection chain share the same local AND remote
+*                           connection address(s).
+*
+*                       (4) In the diagram below, ... :
+*
+*                           (A) The top horizontal row  represents a   connection list's list of connection chains.
+*
+*                           (B) Each    vertical column represents the connections in unique     connection chains.
+*
+*                           (C) Each connection list is a pointer that points to the head of the connection list.
+*
+*                           (D) Connections' 'PrevChainPtr' & 'NextChainPtr' doubly-link each connection chain to
+*                               form the list of connection chains.
+*
+*                           (E) Connections' 'PrevConnPtr'  & 'NextConnPtr'  doubly-link each connection to form
+*                               a connection chain.
+*
+*                   (b) (1) For any connection search, the specific family/protocol connection list is searched
+*                           primarily by the local port number to find the appropriate connection chain.  If a
+*                           connection chain with the local port number is found, then each connection in the
+*                           connection chain is searched in order to find the connection with the best match.
+*
+*                       (2) Network connection searches are resolved in order :
+*
+*                           (A) From greatest number of identical connection address fields ...
+*                           (B)   to least    number of identical connection address fields.
+*
+*                       (3) To expedite faster connection searches for recently added (or recently promoted)
+*                           network connections :
+*
+*                           (A) (1) (a) Network connection chains are added at (or promoted to); ...
+*                                   (b) network connection chains are searched starting at       ...
+*                               (2) ... the head of a network connection list.
+*
+*                           (B) (1) (a) Network connections       are added at (or promoted to); ...
+*                                   (b) network connections       are searched starting at       ...
+*                               (2) ... the head of a network connection chain.
+*
+*                           See also 'NetConn_Add()  Note #1'.
+*
+*
+*                                            |                                                             |
+*                                            |<---------------- List of Connection Chains ---------------->|
+*                                            |                      (see Note #2a4A)                       |
+*
+*                             New connection chains inserted at head
+*                              of connection list (see Note #2b3A2);
+*                              new connections inserted at head of
+*                                connection chain (see Note #2b3B2)
+*
+*                                               |              NextChainPtr
+*                                               |            (see Note #2a4D)
+*                                               v                    |
+*                                                                    |
+*                           Head of          -------       -------   v   -------       -------       -------
+*                       Connection List ---->|     |------>|     |------>|     |------>|     |------>|     |
+*                                            |     |       |     |       |     |       |     |       |     |
+*                      (see Note #2a4C)      |     |<------|     |<------|     |<------|     |<------|     |
+*                                            -------       -------   ^   -------       -------       -------
+*                                              | ^                   |                   | ^
+*                                              | |                   |                   | |
+*                                              v |             PrevChainPtr              v |
+*               ---                          -------         (see Note #2a4D)          -------
+*                ^                           |     |                                   |     |
+*                |                           |     |                                   |     |
+*                |                           |     |                                   |     |
+*                |                           -------                                   -------
+*                |                             | ^                                       | ^
+*                |           NextConnPtr ----> | |                                       | | <----  PrevConnPtr
+*                |        (see Note #2a4E)     v |                                       v |     (see Note #2a4E)
+*                                            -------                                   -------
+*      Connections organized                 |     |                                   |     |
+*     into a connection chain                |     |                                   |     |
+*        (see Note #2a4B)                    |     |                                   |     |
+*                                            -------                                   -------
+*                |                             | ^
+*                |                             | |
+*                |                             v |
+*                |                           -------
+*                |                           |     |
+*                |                           |     |
+*                v                           |     |
+*               ---                          -------
+*
+*
+* Argument(s) : family                  Network connection family type.
+*
+*               protocol_ix             Network connection protocol index.
+*
+*               p_addr_local            Pointer to local  address (see Note #3).
+*
+*               p_addr_remote           Pointer to remote address (see Note #3).
+*
+*               addr_len                Length  of search addresses (in octets).
+*
+*               p_conn_id_transport     Pointer to variable that will receive the returned network
+*                                           connection transport   handle identifier.
+*
+*               p_conn_id_app           Pointer to variable that will receive the returned network
+*                                           connection application handle identifier.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_CONN_NONE              NO   network connection found.
+*
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection list family.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid network connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*
+*                                                                   ------ RETURNED BY NetConn_ChainSrch() : ------
+*                               NET_CONN_ERR_CONN_HALF              Half network connection found --
+*                                                                       local            addresses match.
+*                               NET_CONN_ERR_CONN_HALF_WILDCARD     Half network connection found --
+*                                                                       local & wildcard addresses match.
+*                               NET_CONN_ERR_CONN_FULL              Full network connection found --
+*                                                                       local & remote   addresses match.
+*                               NET_CONN_ERR_CONN_FULL_WILDCARD     Full network connection found --
+*                                                                       local & wildcard addresses match
+*                                                                             & remote   addresses match.
+*
+* Return(s)   : Handle identifier of network connection with specific local &/or remote address, if found.
+*
+*               NET_CONN_ID_NONE,                                                                otherwise.
+*
+* Caller(s)   : NetSock_RxPktDemux(),
+*               NetSock_BindHandler(),
+*               NetSock_ConnHandlerAddrRemoteValidate(),
+*               NetTCP_RxPktDemuxSeg().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (3) Network connection addresses maintained in network-order.
+*
+*               (4) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*********************************************************************************************************
+*/
+
+NET_CONN_ID  NetConn_Srch (NET_CONN_FAMILY        family,
+                           NET_CONN_PROTOCOL_IX   protocol_ix,
+                           CPU_INT08U            *p_addr_local,
+                           CPU_INT08U            *p_addr_remote,
+                           NET_CONN_ADDR_LEN      addr_len,
+                           NET_CONN_ID           *p_conn_id_transport,
+                           NET_CONN_ID           *p_conn_id_app,
+                           NET_ERR               *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_CONN_ADDR_LEN   addr_len_chk_size;
+#endif
+    NET_CONN          **p_conn_list;
+    NET_CONN           *p_conn_chain;
+    NET_CONN           *p_conn;
+    NET_CONN_ID         conn_id;
+    CPU_INT08U          addr_wildcard[NET_CONN_ADDR_LEN_MAX];
+    CPU_INT08U         *p_addr_wildcard;
+
+
+                                                                /* Init conn id's for err or failed srch (see Note #4). */
+    if (p_conn_id_transport != DEF_NULL) {
+       *p_conn_id_transport  = NET_CONN_ID_NONE;
+    }
+
+    if (p_conn_id_app != DEF_NULL) {
+       *p_conn_id_app  =  NET_CONN_ID_NONE;
+    }
+
+
+                                                                /* --------------- VALIDATE LOCAL ADDR ---------------- */
+    if (p_addr_local == DEF_NULL) {
+       *p_err = NET_CONN_ERR_INVALID_ADDR;
+        return (NET_CONN_ID_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE ADDR LEN ----------------- */
+    switch (family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_CONN_FAMILY_IP_V4_SOCK:
+             addr_len_chk_size = NET_SOCK_ADDR_LEN_IP_V4;
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_CONN_FAMILY_IP_V6_SOCK:
+             addr_len_chk_size = NET_SOCK_ADDR_LEN_IP_V6;
+             break;
+#endif
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvProtocolIxCtr);
+            *p_err = NET_CONN_ERR_INVALID_PROTOCOL_IX;
+             return (NET_CONN_ID_NONE);
+    }
+
+    if (addr_len < addr_len_chk_size) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvConnAddrLenCtr);
+       *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+        return (NET_CONN_ID_NONE);
+    }
+#else
+   (void)&addr_len;                                             /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+                                                                /* ------ VALIDATE/CFG CONN LIST FAMILY/PROTOCOL ------ */
+    p_addr_wildcard = DEF_NULL;                                 /* Clr wildcard addr.                                   */
+
+    switch (family) {
+
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_CONN_FAMILY_IP_V4_SOCK:
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_CONN_FAMILY_IP_V6_SOCK:
+#endif
+#ifdef NET_IP_MODULE_EN
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+             switch (protocol_ix) {
+
+#ifdef  NET_IPv4_MODULE_EN
+                 case NET_CONN_PROTOCOL_IX_IP_V4_UDP:
+#ifdef  NET_TCP_MODULE_EN
+                 case NET_CONN_PROTOCOL_IX_IP_V4_TCP:
+#endif
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+                 case NET_CONN_PROTOCOL_IX_IP_V6_UDP:
+#ifdef  NET_TCP_MODULE_EN
+                 case NET_CONN_PROTOCOL_IX_IP_V6_TCP:
+#endif
+#endif
+                      break;
+
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvProtocolIxCtr);
+                     *p_err = NET_CONN_ERR_INVALID_PROTOCOL_IX;
+                      return (NET_CONN_ID_NONE);
+             }
+#endif
+
+
+             if (NetConn_AddrWildCardAvailv4 == DEF_YES) {        /* Cfg wildcard addr.                                   */
+#ifdef  NET_IPv4_MODULE_EN
+                 if (family == NET_CONN_FAMILY_IP_V4_SOCK) {
+                     Mem_Clr(&addr_wildcard, NET_SOCK_ADDR_LEN_MAX);
+
+                     Mem_Copy((void     *)&addr_wildcard[0],
+                              (void     *) p_addr_local,
+                              (CPU_SIZE_T) NET_SOCK_ADDR_LEN_IP_V4);
+
+                     Mem_Copy((void     *)&addr_wildcard[NET_CONN_ADDR_IP_V4_IX_ADDR],
+                              (void     *)&NetConn_AddrWildCardv4[0],
+                              (CPU_SIZE_T) NET_CONN_ADDR_IP_V4_LEN_ADDR);
+                 }
+#endif
+            }
+
+
+            if (NetConn_AddrWildCardAvailv6 == DEF_YES) {        /* Cfg wildcard addr.                                   */
+#ifdef  NET_IPv6_MODULE_EN
+                 if (family == NET_CONN_FAMILY_IP_V6_SOCK) {
+                     Mem_Clr(&addr_wildcard, NET_SOCK_ADDR_LEN_MAX);
+
+                     Mem_Copy((void     *)&addr_wildcard[0],
+                              (void     *) p_addr_local,
+                              (CPU_SIZE_T) NET_SOCK_ADDR_LEN_IP_V6);
+
+                     Mem_Copy((void     *)&addr_wildcard[NET_CONN_ADDR_IP_V6_IX_ADDR],
+                              (void     *)&NetConn_AddrWildCardv6[0],
+                              (CPU_SIZE_T) NET_CONN_ADDR_IP_V6_LEN_ADDR);
+                 }
+#endif
+             }
+
+             p_addr_wildcard = &addr_wildcard[0];
+
+             break;
+#endif
+
+        case NET_CONN_FAMILY_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvFamilyCtr);
+            *p_err = NET_CONN_ERR_INVALID_FAMILY;
+             return (NET_CONN_ID_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (protocol_ix >= NET_CONN_PROTOCOL_NBR_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvProtocolIxCtr);
+       *p_err = NET_CONN_ERR_INVALID_PROTOCOL_IX;
+        return (NET_CONN_ID_NONE);
+    }
+#endif
+
+
+                                                                /* ---------------- SRCH NET CONN LIST ---------------- */
+    p_conn_list  = &NetConn_ConnListHead[protocol_ix];
+    p_conn_chain =  NetConn_ListSrch(family,
+                                     p_conn_list,
+                                     p_addr_local);
+    if (p_conn_chain == DEF_NULL) {
+       *p_err = NET_CONN_ERR_CONN_NONE;
+        return (NET_CONN_ID_NONE);                              /* NO net conn chain found.                             */
+    }
+
+
+                                                                /* ---------------- SRCH NET CONN CHAIN --------------- */
+    p_conn = NetConn_ChainSrch(p_conn_list,
+                               p_conn_chain,
+                               p_addr_local,
+                               p_addr_wildcard,
+                               p_addr_remote,
+                               p_err);
+    if (p_conn == DEF_NULL) {                                   /* NO net conn       found.                             */
+        return (NET_CONN_ID_NONE);                              /* Rtn err from NetConn_ChainSrch().                    */
+    }
+
+
+                                                                /* If net conn       found, rtn conn id's.              */
+    if (p_conn_id_transport != DEF_NULL) {
+       *p_conn_id_transport  = p_conn->ID_Transport;
+    }
+
+    if (p_conn_id_app != DEF_NULL) {
+       *p_conn_id_app  = p_conn->ID_App;
+    }
+
+    conn_id = p_conn->ID;
+
+
+    return (conn_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetConn_ListAdd()
+*
+* Description : (1) Add a network connection into a connection list :
+*
+*                   (a) Get network connection's appropriate connection list
+*                   (b) Get network connection's appropriate connection chain
+*                   (c) Add network connection into          connection list
+*
+*
+* Argument(s) : conn_id     Handle identifier of network connection to add.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE                   Network connection successfully
+*                                                                       added to connection list.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid network connection address.
+*
+*                                                                   ------- RETURNED BY NetConn_IsUsed() : --------
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_BindHandler(),
+*               NetSock_ConnHandlerDatagram(),
+*               NetSock_ConnHandlerStream(),
+*               NetTCP_RxPktConnHandlerListen().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Network connection addresses maintained in network-order.
+*
+*               (3) Local address MUST be configured prior to network connection list add.
+*********************************************************************************************************
+*/
+
+void  NetConn_ListAdd (NET_CONN_ID   conn_id,
+                       NET_ERR      *p_err)
+{
+    NET_CONN               *p_conn;
+    NET_CONN               *p_conn_chain;
+    NET_CONN              **p_conn_list;
+    NET_CONN_PROTOCOL_IX    protocol_ix;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_conn = &NetConn_Tbl[conn_id];
+                                                                /* ------ VALIDATE/CFG CONN LIST FAMILY/PROTOCOL ------ */
+    switch (p_conn->Family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_CONN_FAMILY_IP_V4_SOCK:
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_CONN_FAMILY_IP_V6_SOCK:
+             break;
+#endif
+
+        case NET_CONN_FAMILY_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvFamilyCtr);
+            *p_err = NET_CONN_ERR_INVALID_FAMILY;
+             return;
+    }
+
+                                                                /* ----------- VALIDATE NET CONN LOCAL ADDR ----------- */
+    if (p_conn->AddrLocalValid != DEF_YES) {
+       *p_err = NET_CONN_ERR_INVALID_ADDR;
+        return;
+    }
+
+
+                                                                /* ---------------- GET NET CONN LIST ----------------- */
+    protocol_ix = p_conn->ProtocolIx;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (protocol_ix >= NET_CONN_PROTOCOL_NBR_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Conn.InvProtocolIxCtr);
+       *p_err = NET_CONN_ERR_INVALID_PROTOCOL_IX;
+        return;
+    }
+#endif
+
+                                                                /* ---------- GET NET CONN'S CONN LIST CHAIN ---------- */
+    p_conn_list  = &NetConn_ConnListHead[protocol_ix];
+    p_conn_chain =  NetConn_ListSrch((NET_CONN_FAMILY) p_conn->Family,
+                                     (NET_CONN     **) p_conn_list,
+                                     (CPU_INT08U    *)&p_conn->AddrLocal[0]);
+
+                                                                /* --------- ADD NET CONN INTO NET CONN LIST ---------- */
+    NetConn_Add(p_conn_list, p_conn_chain, p_conn);
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetConn_ListUnlink()
+*
+* Description : Unlink a network connection from a connection list.
+*
+* Argument(s) : conn_id     Handle identifier of network connection to unlink.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_NONE               Network connection successfully unlinked
+*                                                                   from connection list.
+*
+*                                                               ---- RETURNED BY NetConn_IsUsed() : ----
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_BindHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetConn_ListUnlink (NET_CONN_ID   conn_id,
+                          NET_ERR      *p_err)
+{
+    NET_CONN  *p_conn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE NET CONN USED -------------- */
+   (void)NetConn_IsUsed(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* -------- UNLINK NET CONN FROM NET CONN LIST -------- */
+    p_conn = &NetConn_Tbl[conn_id];
+    NetConn_Unlink(p_conn);
+
+
+   *p_err = NET_CONN_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         NetConn_ListSrch()
+*
+* Description : Search a network connection list for network connection chain with specific local port.
+*
+* Argument(s) : family          Network connection family type.
+*               ------          Argument checked   in NetConn_Srch()
+*                                                     NetConn_ListAdd().
+*
+*               p_conn_list     Pointer to a connection list.
+*               ----------      Argument validated in NetConn_Srch()
+*                                                     NetConn_ListAdd().
+*
+*               p_addr_local    Pointer to local address.
+*               -----------     Argument checked   in NetConn_Srch()
+*                                                     NetConn_ListAdd().
+*
+* Return(s)   : Pointer to connection chain with specific local port, if found.
+*
+*               Pointer to NULL,                                      otherwise.
+*
+* Caller(s)   : NetConn_Srch(),
+*               NetConn_ListAdd().
+*
+* Note(s)     : (1) Network connection addresses maintained in network-order.
+*
+*               (2) (a) Assumes ALL connection lists' network connections' local addresses are valid.
+*
+*                   (b) Any connections whose local addresses are NOT valid are closed & unlinked
+*                       from their respective connection list.  Such connections may be accessed by
+*                       the application layer but will NOT correctly receive demultiplexed packets
+*                       due to invalid/incomplete connection address(s).
+*********************************************************************************************************
+*/
+
+static  NET_CONN  *NetConn_ListSrch (NET_CONN_FAMILY    family,
+                                     NET_CONN         **p_conn_list,
+                                     CPU_INT08U        *p_addr_local)
+{
+#ifdef  NET_IP_MODULE_EN
+    CPU_INT08U         *p_port_nbr_addr_local;
+    CPU_INT08U         *p_port_nbr_conn_chain;
+    NET_CONN_ADDR_LEN   port_nbr_len;
+#endif
+    NET_CONN           *p_conn_chain;
+    NET_CONN           *p_conn_chain_next;
+    NET_CONN           *p_conn_next;
+    CPU_BOOLEAN         found;
+    CPU_INT16U          th;
+    CPU_SR_ALLOC();
+
+
+    switch (family) {                                                       /* Get local port nbr to srch.              */
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_CONN_FAMILY_IP_V4_SOCK:
+             p_port_nbr_addr_local = p_addr_local + NET_CONN_ADDR_IP_IX_PORT;
+             port_nbr_len          =                NET_CONN_ADDR_IP_LEN_PORT;
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_CONN_FAMILY_IP_V6_SOCK:
+             p_port_nbr_addr_local = p_addr_local + NET_CONN_ADDR_IP_IX_PORT;
+             port_nbr_len          =                NET_CONN_ADDR_IP_LEN_PORT;
+             break;
+#endif
+        case NET_CONN_FAMILY_NONE:                                          /* See Note #3.                             */
+        default:
+             return ((NET_CONN *)0);
+    }
+
+
+                                                                            /* ---------- SRCH NET CONN LIST ---------- */
+    p_conn_chain = (NET_CONN *)*p_conn_list;                                /* Start @ list head (see Note #3a).        */
+    found       =  DEF_NO;
+
+    while ((p_conn_chain != (NET_CONN *)0) &&                               /* Srch ALL net conn chains ..              */
+           (found       ==  DEF_NO)) {                                      /* .. until net conn chain found.           */
+
+        p_conn_chain_next = (NET_CONN *)p_conn_chain->NextChainPtr;
+
+        if (p_conn_chain->AddrLocalValid == DEF_YES) {                      /* If conn chain's local addr valid, ...    */
+            switch (p_conn_chain->Family) {                                 /* ... cmp local port nbrs.                 */
+#ifdef  NET_IPv4_MODULE_EN
+                case NET_CONN_FAMILY_IP_V4_SOCK:
+                     p_port_nbr_conn_chain = &p_conn_chain->AddrLocal[0] + NET_CONN_ADDR_IP_IX_PORT;
+                     found                 =  Mem_Cmp((void     *)p_port_nbr_addr_local,
+                                                      (void     *)p_port_nbr_conn_chain,
+                                                      (CPU_SIZE_T)port_nbr_len);
+                     break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+                case NET_CONN_FAMILY_IP_V6_SOCK:
+                     p_port_nbr_conn_chain = &p_conn_chain->AddrLocal[0] + NET_CONN_ADDR_IP_IX_PORT;
+                     found                 =  Mem_Cmp((void     *)p_port_nbr_addr_local,
+                                                      (void     *)p_port_nbr_conn_chain,
+                                                      (CPU_SIZE_T)port_nbr_len);
+                     break;
+#endif
+
+                case NET_CONN_FAMILY_NONE:                                  /* See Note #3.                             */
+                default:
+                     break;
+            }
+
+            if (found != DEF_YES) {                                         /* If NOT found, ...                        */
+                p_conn_chain = p_conn_chain_next;                           /* ... adv to next conn chain.              */
+            }
+
+        } else {                                                            /* If conn chain's local addr NOT valid, ...*/
+            p_conn_next =  p_conn_chain->PrevConnPtr;
+            NetConn_Close(p_conn_chain);                                    /* ... close conn (see Note #2b).           */
+
+            if (p_conn_next != (NET_CONN *)0) {                             /* If any conns rem in conn chain,     ...  */
+                p_conn_chain =  p_conn_next;                                /* ...      adv to next conn in chain; ...  */
+            } else {
+                p_conn_chain =  p_conn_chain_next;                          /* ... else adv to next conn chain.         */
+            }
+        }
+    }
+
+
+    if (found == DEF_YES) {                                                 /* If net conn chain found, ..              */
+        p_conn_chain->ConnChainAccessedCtr++;                               /* .. inc conn chain access ctr.            */
+        CPU_CRITICAL_ENTER();
+        th = NetConn_AccessedTh_nbr;
+        CPU_CRITICAL_EXIT();
+        if (p_conn_chain->ConnChainAccessedCtr > th) {                      /* If conn chain accessed > th           .. */
+            p_conn_chain->ConnChainAccessedCtr = 0u;
+            if (p_conn_chain != *p_conn_list) {                             /* .. & conn chain NOT    @ conn list head, */
+                NetConn_ChainUnlink(p_conn_list, p_conn_chain);             /* .. promote conn chain to conn list head  */
+                NetConn_ChainInsert(p_conn_list, p_conn_chain);             /* .. (see Note #3b).                       */
+            }
+        }
+    }
+
+
+    return (p_conn_chain);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetConn_ChainSrch()
+*
+* Description : Search a network connection chain for network connection with specific local & remote
+*               addresses.
+*
+* Argument(s) : p_conn_list         Pointer to a connection list.
+*               ----------          Argument validated in NetConn_Srch().
+*
+*               p_conn_chain        Pointer to a connection chain.
+*               -----------         Argument validated in NetConn_Srch().
+*
+*               p_addr_local        Pointer to local          address.
+*               -----------         Argument checked   in NetConn_Srch().
+*
+*               p_addr_wildcard     Pointer to local wildcard address.
+*               --------------      Argument validated in NetConn_Srch().
+*
+*               p_addr_remote       Pointer to remote         address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_CONN_ERR_CONN_NONE              NO   network connection found.
+*                               NET_CONN_ERR_CONN_HALF              Half network connection found --
+*                                                                       local            addresses match.
+*                               NET_CONN_ERR_CONN_HALF_WILDCARD     Half network connection found --
+*                                                                       local & wildcard addresses match.
+*                               NET_CONN_ERR_CONN_FULL              Full network connection found --
+*                                                                       local & remote   addresses match.
+*                               NET_CONN_ERR_CONN_FULL_WILDCARD     Full network connection found --
+*                                                                       local & wildcard addresses match
+*                                                                             & remote   addresses match.
+*
+* Return(s)   : Pointer to connection with specific local & remote address, if found.
+*
+*               Pointer to NULL,                                            otherwise.
+*
+* Caller(s)   : NetConn_Srch().
+*
+* Note(s)     : (1) Network connection addresses maintained in network-order.
+*
+*               (2) (a) Assumes ALL connection lists' network connections' local addresses are valid.
+*
+*                   (b) Any connections whose local addresses are NOT valid are closed & unlinked
+*                       from their respective connection list.  Such connections may be accessed by
+*                       the application layer but will NOT correctly receive demultiplexed packets
+*                       due to invalid/incomplete connection address(s).
+*
+*               (3) (a) See 'NetConn_Srch()  Note #2b3B1b'.
+*                   (b) See 'NetConn_Srch()  Note #2b3B1a'.
+*********************************************************************************************************
+*/
+
+static  NET_CONN  *NetConn_ChainSrch (NET_CONN    **p_conn_list,
+                                      NET_CONN     *p_conn_chain,
+                                      CPU_INT08U   *p_addr_local,
+                                      CPU_INT08U   *p_addr_wildcard,
+                                      CPU_INT08U   *p_addr_remote,
+                                      NET_ERR      *p_err)
+{
+    NET_CONN     *p_conn;
+    NET_CONN     *p_conn_next;
+    NET_CONN     *p_conn_half;
+    NET_CONN     *p_conn_half_wildcard;
+    NET_CONN     *p_conn_full_wildcard;
+    CPU_INT08U   *p_conn_addr_local;
+    CPU_INT08U   *p_conn_addr_remote;
+    CPU_INT16U    th;
+    CPU_BOOLEAN   found;
+    CPU_BOOLEAN   found_local;
+    CPU_BOOLEAN   found_local_wildcard;
+    CPU_BOOLEAN   found_remote;
+    CPU_BOOLEAN   addr_local_wildcard;
+    CPU_SIZE_T    addr_len;
+    CPU_SR_ALLOC();
+
+
+                                                                            /* --------- SRCH NET CONN CHAIN ---------- */
+    p_conn               = p_conn_chain;                        /* Start @ chain head (see Note #3a).       */
+    p_conn_half          = DEF_NULL;
+    p_conn_half_wildcard = DEF_NULL;
+    p_conn_full_wildcard = DEF_NULL;
+    found                = DEF_NO;
+
+    switch(p_conn->Family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_CONN_FAMILY_IP_V4_SOCK:
+             addr_len = (CPU_SIZE_T)NET_SOCK_ADDR_LEN_IP_V4;
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_CONN_FAMILY_IP_V6_SOCK:
+             addr_len = (CPU_SIZE_T)NET_SOCK_ADDR_LEN_IP_V6;
+             break;
+#endif
+
+        default:
+            *p_err =  NET_CONN_ERR_INVALID_FAMILY;
+             return (DEF_NULL);
+                                                                /* ... compiler warning.                                */
+    }
+
+    addr_local_wildcard =  Mem_Cmp((void     *)p_addr_local,
+                                   (void     *)p_addr_wildcard,
+                                               addr_len);
+
+    while ((p_conn != DEF_NULL) &&                              /* Srch ALL net conns in chain ..                       */
+           (found  ==  DEF_NO)) {                               /* .. until net conn found.                             */
+
+        p_conn_next = p_conn->NextConnPtr;
+
+        if (p_conn->AddrLocalValid == DEF_YES) {                /* If conn's local addr valid, ...                      */
+                                                                /* ... cmp to conn addrs.                               */
+            p_conn_addr_local  = &p_conn->AddrLocal[0];
+            p_conn_addr_remote = &p_conn->AddrRemote[0];
+
+            found_local       =  Mem_Cmp((void     *)p_addr_local,
+                                         (void     *)p_conn_addr_local,
+                                                     addr_len);
+            found_remote      =  Mem_Cmp((void     *)p_addr_remote,
+                                         (void     *)p_conn_addr_remote,
+                                                     addr_len);
+
+            if (found_local == DEF_YES) {                       /* If local addrs match;                ...             */
+                if ((p_addr_remote           != DEF_NULL) &&    /* ... &   remote addrs avail,          ...             */
+                    (p_conn->AddrRemoteValid == DEF_YES)) {
+
+                    found = found_remote;                       /* ... cmp remote addrs;                ...             */
+
+                } else if (p_conn->AddrRemoteValid == DEF_NO) { /* ... else if conn remote addr NOT avail,              */
+                    p_conn_half = p_conn;                       /* ... save half conn.                                  */
+                }
+                                                                /* Else if local addrs do NOT match,    ...             */
+            } else if ((p_addr_wildcard      != DEF_NULL) &&    /* ... & wildcard addr      avail,      ...             */
+                       (addr_local_wildcard ==  DEF_NO)) {      /* ... &   local  addr !=   wildcard addr;              */
+                                                                /* ... cmp local  addr with wildcard addr.              */
+                found_local_wildcard = Mem_Cmp((void     *)p_addr_wildcard,
+                                               (void     *)p_conn_addr_local,
+                                                           addr_len);
+
+                if (found_local_wildcard == DEF_YES) {          /* If local wildcard addrs match;       ...             */
+                    if ((p_addr_remote           != DEF_NULL) &&
+                        (p_conn->AddrRemoteValid == DEF_YES)) {
+
+                        if (found_remote == DEF_YES) {          /* ... & remote addrs avail & match,    ...             */
+                            p_conn_full_wildcard = p_conn;      /* ... save full-wildcard conn;         ...             */
+                        }
+
+                    } else if (p_conn->AddrRemoteValid == DEF_NO) { /* ... else if conn remote addr NOT avail,          */
+                        p_conn_half_wildcard = p_conn;          /* ... save half-wildcard conn.                         */
+                    } else {
+                        ;
+                    }
+                }
+            } else {
+                ;
+            }
+
+        } else {                                                /* If conn's local addr NOT valid, ...                  */
+            NetConn_Close(p_conn);                              /* ... close conn (see Note #2b).                       */
+        }
+
+        if (found != DEF_YES) {                                 /* If NOT found, ...                                    */
+            p_conn  = p_conn_next;                              /* ... adv to next conn.                                */
+        }
+    }
+
+
+    if (found == DEF_YES) {                                     /* Full conn found.                                     */
+       *p_err  = NET_CONN_ERR_CONN_FULL;
+
+    } else if (p_conn_full_wildcard != DEF_NULL) {              /* Full conn found with wildcard addr.                  */
+       *p_err  = NET_CONN_ERR_CONN_FULL_WILDCARD;
+        p_conn  = p_conn_full_wildcard;
+
+    } else if (p_conn_half          != DEF_NULL) {              /* Half conn found.                                     */
+       *p_err  = NET_CONN_ERR_CONN_HALF;
+        p_conn = p_conn_half;
+
+    } else if (p_conn_half_wildcard != DEF_NULL) {              /* Half conn found with wildcard addr.                  */
+       *p_err  = NET_CONN_ERR_CONN_HALF_WILDCARD;
+        p_conn = p_conn_half_wildcard;
+
+    } else {                                                    /* NO   conn found.                                     */
+       *p_err  = NET_CONN_ERR_CONN_NONE;
+    }
+
+
+    if (p_conn != DEF_NULL) {                                   /* If net conn found, ..                                */
+        p_conn->ConnAccessedCtr++;                              /* .. inc conn access ctr.                              */
+        CPU_CRITICAL_ENTER();
+        th = NetConn_AccessedTh_nbr;
+        CPU_CRITICAL_EXIT();
+        if (p_conn->ConnAccessedCtr > th) {                     /* If conn accessed > th               ..               */
+            p_conn->ConnAccessedCtr = 0u;
+            if (p_conn != p_conn_chain) {                       /* .. & conn  NOT   @ conn chain head, ..               */
+                NetConn_Unlink(p_conn);                         /* .. promote conn to conn chain head  ..               */
+                NetConn_Add(p_conn_list, p_conn_chain, p_conn); /* .. (see Note #3b).                                   */
+            }
+        }
+    }
+
+
+    return (p_conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetConn_ChainInsert()
+*
+* Description : (1) Insert a connection chain into a connection list :
+*
+*                   (a) Insert connection chain at the head of the connection list
+*                   (b) Set each chain connection's connection list
+*
+*
+* Argument(s) : p_conn_list     Pointer to a connection list.
+*               ----------      Argument validated in NetConn_ListSrch().
+*
+*               p_conn_chain    Pointer to a connection chain.
+*               -----------     Argument validated in NetConn_ListSrch().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_ListSrch().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_ChainInsert (NET_CONN  **p_conn_list,
+                                   NET_CONN   *p_conn_chain)
+{
+    NET_CONN  *p_conn;
+    NET_CONN  *p_conn_next;
+
+                                                                /* ------- INSERT CONN CHAIN AT CONN LIST HEAD -------- */
+    p_conn_chain->PrevChainPtr = (NET_CONN *)0;
+    p_conn_chain->NextChainPtr = (NET_CONN *)(*p_conn_list);
+
+    if (*p_conn_list != (NET_CONN *)0) {                        /* If conn list NOT empty,                         ...  */
+       (*p_conn_list)->PrevChainPtr = p_conn_chain;             /* ... insert conn chain before cur conn list head ...  */
+    }
+   *p_conn_list = p_conn_chain;                                 /*     Set    conn chain as     new conn list head.     */
+
+                                                                /* ------------ SET CHAIN CONNS' CONN LIST ------------ */
+    p_conn = p_conn_chain;
+    while (p_conn  != (NET_CONN *)0) {
+        p_conn->ConnList = p_conn_list;
+        p_conn_next      = p_conn->NextConnPtr;
+        p_conn           = p_conn_next;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetConn_ChainUnlink()
+*
+* Description : (1) Unlink a connection chain from a connection list :
+*
+*                   (a) Unlink connection chain
+*                   (b) Clear each chain connection's connection list
+*
+*
+* Argument(s) : p_conn_list     Pointer to a connection list.
+*               ----------      Argument validated in NetConn_ListSrch().
+*
+*               p_conn_chain    Pointer to a connection chain.
+*               -----------     Argument validated in NetConn_ListSrch().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_ListSrch().
+*
+* Note(s)     : (2) Since NetConn_ChainUnlink() called ONLY to remove & then re-link connection chains,
+*                   it is NOT necessary to clear the entry's previous & next chain pointers.  However,
+*                   pointers cleared to NULL shown for correctness & completeness.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_ChainUnlink (NET_CONN  **p_conn_list,
+                                   NET_CONN   *p_conn_chain)
+{
+    NET_CONN  *p_conn_chain_prev;
+    NET_CONN  *p_conn_chain_next;
+    NET_CONN  *p_conn;
+    NET_CONN  *p_conn_next;
+
+                                                                /* --------- UNLINK CONN CHAIN FROM CONN LIST --------- */
+    p_conn_chain_prev = p_conn_chain->PrevChainPtr;
+    p_conn_chain_next = p_conn_chain->NextChainPtr;
+                                                                /* Point prev conn chain to next conn chain.            */
+    if (p_conn_chain_prev != (NET_CONN *)0) {
+        p_conn_chain_prev->NextChainPtr = p_conn_chain_next;
+    } else {
+       *p_conn_list                     = p_conn_chain_next;
+    }
+                                                                /* Point next conn chain to prev conn chain.            */
+    if (p_conn_chain_next != (NET_CONN *)0) {
+        p_conn_chain_next->PrevChainPtr = p_conn_chain_prev;
+    }
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)                     /* Clr conn chain's chain ptrs (see Note #2).           */
+    p_conn_chain->PrevChainPtr = (NET_CONN *)0;
+    p_conn_chain->NextChainPtr = (NET_CONN *)0;
+#endif
+
+                                                                /* ------------ CLR CHAIN CONNS' CONN LIST ------------ */
+    p_conn = p_conn_chain;
+    while (p_conn  != (NET_CONN *)0) {
+        p_conn->ConnList = (NET_CONN **)0;
+        p_conn_next      = (NET_CONN  *)p_conn->NextConnPtr;
+        p_conn           = (NET_CONN  *)p_conn_next;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetConn_Add()
+*
+* Description : (1) Add a network connection into a network connection list :
+*
+*                   (a) Network connection chains are added at (or promoted to) the head of a
+*                       network connection list.
+*                   (b) Network connections       are added at (or promoted to) the head of a
+*                       network connection chain.
+*
+*
+* Argument(s) : p_conn_list     Pointer to a network connection list.
+*               ----------      Argument validated in NetConn_ListAdd(),
+*                                                     NetConn_ListSrch().
+*
+*               p_conn_chain    Pointer to a network connection chain.
+*               -----------     Argument validated in NetConn_ListAdd(),
+*                                                     NetConn_ListSrch().
+*
+*               p_conn          Pointer to a network connection.
+*               -----           Argument validated in NetConn_ListAdd(),
+*                                                     NetConn_ListSrch().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_ListAdd(),
+*               NetConn_ChainSrch().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_Add (NET_CONN  **p_conn_list,
+                           NET_CONN   *p_conn_chain,
+                           NET_CONN   *p_conn)
+{
+    NET_CONN  *p_conn_chain_prev;
+    NET_CONN  *p_conn_chain_next;
+
+
+    if (p_conn_chain == (NET_CONN *)0) {                            /* If conn chain empty, ...                         */
+                                                                    /* ... insert conn as new conn chain (see Note #1a).*/
+        p_conn->PrevChainPtr = (NET_CONN *)0;
+        p_conn->NextChainPtr = (NET_CONN *)(*p_conn_list);
+        p_conn->PrevConnPtr  = (NET_CONN *)0;
+        p_conn->NextConnPtr  = (NET_CONN *)0;
+
+        if (*p_conn_list != (NET_CONN *)0) {                        /* If conn list NOT empty,                   ...    */
+           (*p_conn_list)->PrevChainPtr = p_conn;                   /* ... insert conn before cur conn list head ...    */
+        }
+       *p_conn_list = p_conn;                                       /*     Set    conn as     new conn list head.       */
+
+    } else {                                                        /* Else add net conn into existing conn chain ...   */
+                                                                    /* ... as new conn chain head (see Note #1b).       */
+        p_conn_chain_prev          = (NET_CONN *)p_conn_chain->PrevChainPtr;
+        p_conn_chain_next          = (NET_CONN *)p_conn_chain->NextChainPtr;
+        p_conn_chain->PrevChainPtr = (NET_CONN *)0;
+        p_conn_chain->NextChainPtr = (NET_CONN *)0;
+        p_conn_chain->PrevConnPtr  = (NET_CONN *)p_conn;
+
+        p_conn->PrevConnPtr        = (NET_CONN *)0;
+        p_conn->NextConnPtr        = (NET_CONN *)p_conn_chain;
+
+        p_conn->PrevChainPtr       = (NET_CONN *)p_conn_chain_prev;
+        if (p_conn_chain_prev != (NET_CONN *)0) {
+            p_conn_chain_prev->NextChainPtr = p_conn;
+        } else {
+           *p_conn_list                     = p_conn;
+        }
+
+        p_conn->NextChainPtr   = (NET_CONN *)p_conn_chain_next;
+        if (p_conn_chain_next != (NET_CONN *)0) {
+            p_conn_chain_next->PrevChainPtr = p_conn;
+        }
+                                                                    /* Inherit conn chain accessed ctr.                 */
+        p_conn->ConnChainAccessedCtr        = p_conn_chain->ConnChainAccessedCtr;
+        p_conn_chain->ConnChainAccessedCtr  = 0u;
+    }
+
+    p_conn->ConnList = p_conn_list;                                 /* Mark conn's conn list ownership.                 */
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetConn_Unlink()
+*
+* Description : Unlink a network connection from its network connection list.
+*
+* Argument(s) : p_conn      Pointer to a network connection.
+*               -----       Argument validated in NetConn_ListUnlink(),
+*                                                 NetConn_ListSrch(),
+*                                                 NetConn_FreeHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_ListUnlink(),
+*               NetConn_ChainSrch(),
+*               NetConn_FreeHandler().
+*
+* Note(s)     : (1) Since NetConn_Unlink() called ONLY to remove & then re-link or free network
+*                   connections, it is NOT necessary to clear the entry's previous & next chain/
+*                   connection pointers.  However, pointers cleared to NULL shown for correctness
+*                   & completeness.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_Unlink (NET_CONN  *p_conn)
+{
+    NET_CONN  **p_conn_list;
+    NET_CONN   *p_conn_prev;
+    NET_CONN   *p_conn_next;
+    NET_CONN   *p_conn_chain_prev;
+    NET_CONN   *p_conn_chain_next;
+
+
+    p_conn_list = p_conn->ConnList;
+    if (p_conn_list == (NET_CONN **)0) {                                /* If net conn NOT in conn list, ...            */
+        return;                                                         /* ... exit unlink.                             */
+    }
+
+                                                                        /* ----- UNLINK NET CONN FROM CONN CHAIN ------ */
+    p_conn_prev = p_conn->PrevConnPtr;
+    p_conn_next = p_conn->NextConnPtr;
+
+    if (p_conn_prev != (NET_CONN *)0) {                                 /* If prev net conn non-NULL, ...               */
+                                                                        /* ... unlink conn from middle of conn chain.   */
+        p_conn_prev->NextConnPtr = p_conn_next;                         /* Point prev conn to next conn.                */
+
+        if (p_conn_next != (NET_CONN *)0) {                             /* If next net conn non-NULL, ...               */
+            p_conn_next->PrevConnPtr = p_conn_prev;                     /* ... point next conn to prev conn.            */
+        }
+
+    } else {                                                            /* Else unlink conn chain head.                 */
+        p_conn_chain_prev = (NET_CONN *)p_conn->PrevChainPtr;
+        p_conn_chain_next = (NET_CONN *)p_conn->NextChainPtr;
+
+        if (p_conn_next  != (NET_CONN *)0) {                            /* If next conn in conn chain non-NULL, ...     */
+                                                                        /* ... promote next conn to conn chain head.    */
+            p_conn_next->PrevChainPtr = p_conn_chain_prev;
+            if (p_conn_chain_prev != (NET_CONN *)0) {
+                p_conn_chain_prev->NextChainPtr = p_conn_next;
+            } else {
+               *p_conn_list                     = p_conn_next;
+            }
+
+            p_conn_next->NextChainPtr = p_conn_chain_next;
+            if (p_conn_chain_next != (NET_CONN *)0) {
+                p_conn_chain_next->PrevChainPtr = p_conn_next;
+            }
+
+            p_conn_next->PrevConnPtr          = (NET_CONN *)0;
+                                                                        /* Inherit conn chain accessed ctr.             */
+            p_conn_next->ConnChainAccessedCtr =  p_conn->ConnChainAccessedCtr;
+            p_conn->ConnChainAccessedCtr      =  0u;
+
+        } else {                                                        /* Else remove conn list entirely.              */
+            if (p_conn_chain_prev != (NET_CONN *)0) {
+                p_conn_chain_prev->NextChainPtr = p_conn_chain_next;
+            } else {
+               *p_conn_list                     = p_conn_chain_next;
+            }
+
+            if (p_conn_chain_next != (NET_CONN *)0) {
+                p_conn_chain_next->PrevChainPtr = p_conn_chain_prev;
+            }
+        }
+    }
+
+    p_conn->ConnList     = (NET_CONN **)0;                              /* Clr net conn's conn list ownership.          */
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)                             /* Clr net conn's chain/conn ptrs (see Note #1).*/
+    p_conn->PrevChainPtr = (NET_CONN  *)0;
+    p_conn->NextChainPtr = (NET_CONN  *)0;
+    p_conn->PrevConnPtr  = (NET_CONN  *)0;
+    p_conn->NextConnPtr  = (NET_CONN  *)0;
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetConn_Close()
+*
+* Description : (1) Close a network connection :
+*
+*                   (a) Update network connection close statistic(s)
+*
+*                   (b) Close  network connection(s) :
+*                       (1) Close application connection
+*                       (2) Close transport   connection
+*
+*                   (c) Free   network connection, if necessary
+*
+*
+* Argument(s) : p_conn      Pointer to a network connection.
+*               -----       Argument checked in NetConn_CloseAllConnsHandler(),
+*                                               NetConn_ListSrch(),
+*                                               NetConn_ChainSrch().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_CloseAllConnsHandler(),
+*               NetConn_ListSrch(),
+*               NetConn_ChainSrch().
+*
+* Note(s)     : (2) Network connection's handle identifier MUST be obtained PRIOR to any network
+*                   connection validation &/or close operations.
+*
+*               (3) (a) Network connection(s) MAY  already be closed BEFORE any  network connection
+*                       close operations & MUST be validated as used BEFORE each network connection
+*                       close operation.
+*
+*                   (b) Network connection SHOULD already be closed AFTER application & transport
+*                       layer connections have both closed.
+*
+*                       See also 'NetConn_CloseFromApp()        Note #1c'
+*                              & 'NetConn_CloseFromTransport()  Note #1c'.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_Close (NET_CONN  *p_conn)
+{
+    NET_CONN_ID  conn_id;
+    NET_ERR      err;
+    CPU_BOOLEAN  used;
+
+                                                                /* --------------- UPDATE CLOSE STATS ----------------- */
+    NET_CTR_ERR_INC(Net_ErrCtrs.Conn.CloseCtr);
+
+                                                                /* ------------------ CLOSE CONN(S) ------------------- */
+    conn_id = p_conn->ID;                                       /* Get net conn id (see Note #2).                       */
+
+    used = NetConn_IsUsed(conn_id, &err);
+    if (used == DEF_YES) {                                      /* If net conn used (see Note #3a), ...                 */
+        NetConn_CloseApp(p_conn);                               /* ... close app conn.                                  */
+    }
+
+    used = NetConn_IsUsed(conn_id, &err);
+    if (used == DEF_YES) {                                      /* If net conn used (see Note #3a), ...                 */
+        NetConn_CloseTransport(p_conn);                         /* ... close transport conn.                            */
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------ FREE NET CONN ------------------- */
+    used = NetConn_IsUsed(conn_id, &err);
+    if (used == DEF_YES) {                                      /* If net conn used (see Note #3b), ...                 */
+        NetConn_FreeHandler(p_conn);                            /* ... free net conn.                                   */
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetConn_CloseApp()
+*
+* Description : (1) Close a network connection's application connection :
+*
+*                   (a) Free  network     connection from application clone connection, if necessary
+*                   (b) Close application connection
+*
+*
+* Argument(s) : p_conn      Pointer to a network connection.
+*               -----       Argument validated in NetConn_Close(),
+*                                                 NetConn_CloseFromTransport().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_Close(),
+*               NetConn_CloseFromTransport().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_CloseApp (NET_CONN  *p_conn)
+{
+                                                                /* ---------------- CLOSE APP CONN(S) ----------------- */
+#ifdef  NET_IP_MODULE_EN
+    NetSock_FreeConnFromSock((NET_SOCK_ID)p_conn->ID_AppClone,  /* Free net conn from clone sock conn (see Note #1a).   */
+                             (NET_CONN_ID)p_conn->ID);
+
+    NetSock_CloseFromConn((NET_SOCK_ID)p_conn->ID_App);         /* Close sock app conn (see Note #1b).                  */
+#endif
+
+   (void)&p_conn;                                               /* Prevent possible 'variable unused' warning.          */
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetConn_CloseTransport()
+*
+* Description : Close a network connection's transport connection.
+*
+* Argument(s) : p_conn      Pointer to a network connection.
+*               -----       Argument validated in NetConn_Close(),
+*                                                 NetConn_CloseFromApp().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_Close(),
+*               NetConn_CloseFromApp().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_CloseTransport (NET_CONN  *p_conn)
+{
+                                                                /* --------------- CLOSE TRANSPORT CONN -------------- */
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+    NetTCP_ConnCloseFromConn((NET_TCP_CONN_ID)p_conn->ID_Transport);
+#endif
+#endif
+
+   (void)&p_conn;                                               /* Prevent possible 'variable unused' warning.          */
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetConn_CloseAllConnsHandler()
+*
+* Description : Close ALL network connections in ALL network connection lists for specified conditions.
+*
+* Argument(s) : if_nbr          Interface number to close connection :
+*
+*                                   Interface number        Close ALL connections on interface.
+*                                   NET_IF_NBR_WILDCARD,    Close ALL connections with a wildcard
+*                                                               address.
+*
+*               p_addr          Pointer to protocol address to close connection (see Note #1).
+*
+*               addr_len        Length  of protocol address (in octets).
+*
+*               close_code      Select which close action to perform :
+*
+*                                   NET_CONN_CLOSE_ALL          Close all network connections.
+*                                   NET_CONN_CLOSE_BY_IF        Close all network connections with
+*                                                                   specified interface number.
+*                                   NET_CONN_CLOSE_BY_ADDR      Close all network connections with
+*                                                                   specified local protocol address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_CloseAllConns(),
+*               NetConn_CloseAllConnsByIF().
+*               NetConn_CloseAllConnsByAddrHandler(),
+*
+* Note(s)     : (1) Protocol address MUST be in network-order.
+*
+*               (2) Since network connection close handlers execute asynchronously to NetConn_FreeHandler(),
+*                   network connection list pointers ('NetConn_ConnListChainPtr', 'NetConn_ConnListConnPtr',
+*                   etc.) MUST be coordinated with NetConn_FreeHandler() to avoid network connection list
+*                   corruption :
+*
+*                   (a) (1) Network connection list pointers typically advance to the next network connection
+*                           in a network connection list.
+*
+*                       (2) However, whenever a network connection list pointer connection is freed by an
+*                           asynchronous network connection close, the network connection list pointer(s)
+*                           MUST be advanced to the next valid & available network connection in the
+*                           network connection list.
+*
+*                           See also 'NetConn_FreeHandler()  Note #2a'.
+*
+*                   (b) Network connection list pointers MUST be cleared after handling the network
+*                       connection list.
+*
+*                       (1) However, network connection list pointers are implicitly cleared after
+*                           handling the network connection list.
+*
+*               (3) Invalid network connection(s) in the connection list MAY already be closed in other
+*                   validation functions.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_CloseAllConnsHandler (NET_IF_NBR            if_nbr,
+                                            CPU_INT08U           *p_addr,
+                                            NET_CONN_ADDR_LEN     addr_len,
+                                            NET_CONN_CLOSE_CODE   close_code)
+{
+    NET_CONN           **p_conn_list;
+    NET_CONN_LIST_QTY    i;
+
+                                                                        /* ---- CLOSE CONNS IN ALL NET CONN LISTS ----- */
+    p_conn_list = &NetConn_ConnListHead[0];
+    for (i = 0u; i < NET_CONN_PROTOCOL_NBR_MAX; i++) {
+        NetConn_ConnListChainPtr = *p_conn_list;                        /* Start @ conn list head.                      */
+        while (NetConn_ConnListChainPtr != (NET_CONN *)0) {             /* Close net conn chains ...                    */
+            NetConn_ConnListNextChainPtr = (NET_CONN *)NetConn_ConnListChainPtr->NextChainPtr;
+            NetConn_ConnListConnPtr      = (NET_CONN *)NetConn_ConnListChainPtr;
+
+            while (NetConn_ConnListConnPtr != (NET_CONN *)0) {          /* ... & net conns.                             */
+                NetConn_ConnListNextConnPtr = (NET_CONN *)NetConn_ConnListConnPtr->NextConnPtr;
+                                                                        /* Close net conn, if req'd.                    */
+                NetConn_CloseAllConnsCloseConn((NET_CONN          *)NetConn_ConnListConnPtr,
+                                               (NET_IF_NBR         )if_nbr,
+                                               (CPU_INT08U        *)p_addr,
+                                               (NET_CONN_ADDR_LEN  )addr_len,
+                                               (NET_CONN_CLOSE_CODE)close_code);
+
+                NetConn_ConnListConnPtr = NetConn_ConnListNextConnPtr;  /* Adv to next net conn       (see Note #2a1).  */
+            }
+
+            NetConn_ConnListChainPtr    = NetConn_ConnListNextChainPtr; /* Adv to next net conn chain (see Note #2a1).  */
+        }
+
+#if 0                                                                   /* Clr net conn list ptrs     (see Note #2b1).  */
+        NetConn_ConnListChainPtr     = (NET_CONN *)0;
+        NetConn_ConnListConnPtr      = (NET_CONN *)0;
+        NetConn_ConnListNextChainPtr = (NET_CONN *)0;
+        NetConn_ConnListNextConnPtr  = (NET_CONN *)0;
+#endif
+
+        p_conn_list++;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetConn_CloseAllConnsCloseConn()
+*
+* Description : Close network connection for specified conditions.
+*
+* Argument(s) : p_conn          Pointer to network connection to close.
+*               -----           Argument validated in NetConn_CloseAllConnsHandler().
+*
+*               if_nbr          Interface number to close connection :
+*
+*                                   Interface number        Close ALL connections on interface.
+*                                   NET_IF_NBR_WILDCARD,    Close ALL connections with a wildcard
+*                                                               address.
+*
+*               p_addr          Pointer to protocol address to close connection (see Note #1).
+*
+*               addr_len        Length  of protocol address (in octets).
+*
+*               close_code      Select which close action to perform :
+*
+*                                   NET_CONN_CLOSE_ALL          Close all network connections.
+*                                   NET_CONN_CLOSE_BY_IF        Close all network connections with
+*                                                                   specified interface number.
+*                                   NET_CONN_CLOSE_BY_ADDR      Close all network connections with
+*                                                                   specified local protocol address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_CloseAllConnsHandler().
+*
+* Note(s)     : (1) Protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_CloseAllConnsCloseConn (NET_CONN             *p_conn,
+                                              NET_IF_NBR            if_nbr,
+                                              CPU_INT08U           *p_addr,
+                                              NET_CONN_ADDR_LEN     addr_len,
+                                              NET_CONN_CLOSE_CODE   close_code)
+{
+#ifdef  NET_IP_MODULE_EN
+    CPU_INT08U   *p_addr_conn;
+#endif
+    CPU_BOOLEAN   close_conn;
+
+
+    close_conn = DEF_NO;
+
+    switch (close_code) {
+        case NET_CONN_CLOSE_ALL:
+             close_conn = DEF_YES;
+             break;
+
+
+        case NET_CONN_CLOSE_BY_IF:                                      /* Cmp IF   to conn's IF.                       */
+             close_conn = (p_conn->IF_Nbr == if_nbr) ? DEF_YES : DEF_NO;
+             break;
+
+
+        case NET_CONN_CLOSE_BY_ADDR:
+             switch (p_conn->Family) {
+#ifdef  NET_IPv4_MODULE_EN
+                 case NET_CONN_FAMILY_IP_V4_SOCK:
+                      if (addr_len != NET_CONN_ADDR_IP_V4_LEN_ADDR) {
+                          break;
+                      }
+                                                                        /* Cmp addr to conn's addr.                     */
+                      p_addr_conn = &p_conn->AddrLocal[0] + NET_CONN_ADDR_IP_V4_IX_ADDR;
+                      close_conn  =  Mem_Cmp((void     *)p_addr,
+                                             (void     *)p_addr_conn,
+                                             (CPU_SIZE_T)addr_len);
+                      break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+                 case NET_CONN_FAMILY_IP_V6_SOCK:
+                      if (addr_len != NET_CONN_ADDR_IP_V6_LEN_ADDR) {
+                          break;
+                      }
+                                                                        /* Cmp addr to conn's addr.                     */
+                      p_addr_conn = &p_conn->AddrLocal[0] + NET_CONN_ADDR_IP_V6_IX_ADDR;
+                      close_conn  =  Mem_Cmp((void     *)p_addr,
+                                             (void     *)p_addr_conn,
+                                             (CPU_SIZE_T)addr_len);
+                      break;
+#endif
+
+
+                 case NET_CONN_FAMILY_NONE:
+                 default:
+                      break;
+             }
+             break;
+
+
+        case NET_CONN_CLOSE_NONE:
+        default:
+             break;
+    }
+
+    if (close_conn == DEF_YES) {
+        NetConn_Close(p_conn);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetConn_FreeHandler()
+*
+* Description : (1) Free a network connection :
+*
+*                   (a) Remove network connection from a   network connection list :
+*                       (1) Update network connection list pointer(s)                       See Note #2
+*                       (2) Unlink network connection from network connection list
+*
+*                   (b) Clear  network connection values
+*                   (c) Free   network connection back to network connection pool
+*                   (d) Update network connection pool statistics
+*
+*
+* Argument(s) : p_conn      Pointer to a network connection.
+*               -----       Argument validated in NetConn_Free(),
+*                                                 NetConn_Close(),
+*                                                 NetConn_CloseFromApp(),
+*                                                 NetConn_CloseFromTransport().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_Free(),
+*               NetConn_Close(),
+*               NetConn_CloseFromApp(),
+*               NetConn_CloseFromTransport(),
+*
+* Note(s)     : (2) Since network connection close handlers execute asynchronously to NetConn_FreeHandler(),
+*                   network connection list pointers ('NetConn_ConnListChainPtr', 'NetConn_ConnListConnPtr',
+*                   etc.) MUST be coordinated with NetConn_FreeHandler() to avoid network connection list
+*                   corruption :
+*
+*                   (a) Whenever a network connection list pointer connection is freed, network connection
+*                       list pointers MUST be advanced to the next valid & available network connection in
+*                       the appropriate network connection list.
+*
+*                   See also 'NetConn_CloseAllConnsHandler()  Note #3'.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_FreeHandler (NET_CONN  *p_conn)
+{
+    NET_CONN  *p_conn_next;
+    NET_ERR    err;
+
+
+                                                                /* -------- REMOVE NET CONN FROM NET CONN LIST -------- */
+                                                                /* If net conn is next conn list conn to update, ...    */
+                                                                /* ... adv to skip this net conn (see Note #2a).        */
+    if (p_conn == NetConn_ConnListNextChainPtr) {
+        p_conn_next                  = NetConn_ConnListNextChainPtr->NextChainPtr;
+        NetConn_ConnListNextChainPtr = p_conn_next;
+    }
+    if (p_conn == NetConn_ConnListNextConnPtr) {
+        p_conn_next                  = NetConn_ConnListNextConnPtr->NextConnPtr;
+        NetConn_ConnListNextConnPtr  = p_conn_next;
+    }
+
+    NetConn_Unlink(p_conn);                                     /* Unlink net conn from net conn list.                  */
+
+
+                                                                /* ------------------- CLR NET CONN ------------------- */
+    DEF_BIT_CLR(p_conn->Flags, NET_CONN_FLAG_USED);             /* Set net conn as NOT used.                            */
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+    NetConn_Clr(p_conn);
+#endif
+
+                                                                /* ------------------ FREE NET CONN ------------------- */
+    p_conn->NextConnPtr = NetConn_PoolPtr;
+    NetConn_PoolPtr     = p_conn;
+
+                                                                /* ------------ UPDATE NET CONN POOL STATS ------------ */
+    NetStat_PoolEntryUsedDec(&NetConn_PoolStat, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetConn_Clr()
+*
+* Description : Clear network connection controls.
+*
+* Argument(s) : p_conn      Pointer to a network connection.
+*               -----       Argument validated in NetConn_Init(),
+*                                                 NetConn_Get(),
+*                                                 NetConn_FreeHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_Init(),
+*               NetConn_Get(),
+*               NetConn_FreeHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetConn_Clr (NET_CONN  *p_conn)
+{
+    p_conn->PrevChainPtr          = (NET_CONN  *)0;
+    p_conn->NextChainPtr          = (NET_CONN  *)0;
+    p_conn->PrevConnPtr           = (NET_CONN  *)0;
+    p_conn->NextConnPtr           = (NET_CONN  *)0;
+    p_conn->ConnList              = (NET_CONN **)0;
+    p_conn->ID_App                =  NET_CONN_ID_NONE;
+    p_conn->ID_AppClone           =  NET_CONN_ID_NONE;
+    p_conn->ID_Transport          =  NET_CONN_ID_NONE;
+    p_conn->IF_Nbr                =  NET_IF_NBR_NONE;
+    p_conn->Family                =  NET_CONN_FAMILY_NONE;
+    p_conn->ProtocolIx            =  NET_CONN_PROTOCOL_IX_NONE;
+    p_conn->AddrLocalValid        =  DEF_NO;
+    p_conn->AddrRemoteValid       =  DEF_NO;
+    p_conn->ConnChainAccessedCtr  =  0u;
+    p_conn->ConnAccessedCtr       =  0u;
+    p_conn->Flags                 =  NET_CONN_FLAG_NONE;
+
+#ifdef  NET_IPv4_MODULE_EN
+    p_conn->TxIPv4Flags           =  NET_IPv4_FLAG_NONE;
+    p_conn->TxIPv4TOS             =  NET_IPv4_TOS_DFLT;
+    p_conn->TxIPv4TTL             =  NET_IPv4_TTL_DFLT;
+#ifdef  NET_MCAST_TX_MODULE_EN
+    p_conn->TxIPv4TTL_Multicast   =  NET_IPv4_TTL_MULTICAST_DFLT;
+#endif
+#if 0
+    p_conn->TxIP_Opts             = (void *)0;
+#endif
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    p_conn->TxIPv6TrafficClass    =  NET_IPv6_TRAFFIC_CLASS_DFLT;
+    p_conn->TxIPv6FlowLabel       =  NET_IPv6_FLOW_LABEL_DFLT;
+    p_conn->TxIPv6HopLim          =  NET_IPv6_HDR_HOP_LIM_DFLT;
+    p_conn->TxIPv6Flags           =  NET_IPv6_FLAG_NONE;
+#ifdef  NET_MCAST_TX_MODULE_EN
+    p_conn->TxIPv6HopLimMulticast =  NET_IPv6_HOP_LIM_MULTICAST_DFLT;
+#endif
+#endif
+
+    Mem_Clr((void     *)&p_conn->AddrLocal[0],
+            (CPU_SIZE_T) NET_CONN_ADDR_LEN_MAX);
+    Mem_Clr((void     *)&p_conn->AddrRemote[0],
+            (CPU_SIZE_T) NET_CONN_ADDR_LEN_MAX);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_conn.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_conn.h
new file mode 100644
index 0000000..f5ffe65
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_conn.h
@@ -0,0 +1,826 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    NETWORK CONNECTION MANAGEMENT
+*
+* Filename      : net_conn.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*********************************************************************************************************
+* Note(s)       : (1) Supports network connections for local & remote addresses of the following :
+*
+*                     (a) Families :
+*                         (1) IPv4 Connections
+*                             (A) BSD 4.x Sockets
+*
+*                     (b) Connection types :
+*                         (1) Datagram
+*                         (2) Stream
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  "net_def.h"
+#include  "net_sock.h"
+#include  "net_type.h"
+#include  "net_err.h"
+#include  "net_stat.h"
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_CONN_MODULE_PRESENT
+#define  NET_CONN_MODULE_PRESENT
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef NET_CONN_MODULE
+#define  NET_CONN_EXT
+#else
+#define  NET_CONN_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (defined(NET_IPv6_MODULE_EN))
+    #define  NET_CONN_ADDR_LEN_MAX                      NET_SOCK_ADDR_LEN_IP_V6
+
+#elif (defined(NET_IPv4_MODULE_EN))
+    #define  NET_CONN_ADDR_LEN_MAX                      NET_SOCK_ADDR_LEN_IP_V4
+
+#else
+    #define  NET_CONN_ADDR_LEN_MAX                      0
+#endif
+
+
+#if (defined(NET_IPv4_MODULE_EN) && defined(NET_IPv6_MODULE_EN))
+    #define  NET_CONN_PROTOCOL_IP_NBR_MAX              2
+#else
+    #define  NET_CONN_PROTOCOL_IP_NBR_MAX              1
+#endif
+
+
+#ifdef NET_TCP_MODULE_EN
+    #define  NET_CONN_PROTOCOL_TRANSPORT_NBR_MAX       2
+#else
+    #define  NET_CONN_PROTOCOL_TRANSPORT_NBR_MAX       1
+#endif
+
+
+#define  NET_CONN_PROTOCOL_NBR_MAX              NET_CONN_PROTOCOL_TRANSPORT_NBR_MAX + NET_CONN_PROTOCOL_IP_NBR_MAX
+
+
+
+#define  NET_CONN_ACCESSED_TH_MIN                         10
+#define  NET_CONN_ACCESSED_TH_MAX                      65000
+#define  NET_CONN_ACCESSED_TH_DFLT                       100
+
+
+/*
+*********************************************************************************************************
+*                              NETWORK CONNECTION PROTOCOL INDEX DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_CONN_PROTOCOL_MAX_MIN                       NET_SOCK_PROTO_MAX_MIN
+
+
+#define  NET_CONN_PROTOCOL_IX_IP_V4_UDP                    0
+#define  NET_CONN_PROTOCOL_IX_IP_V4_TCP                    1
+
+#ifdef   NET_IPv4_MODULE_EN
+#define  NET_CONN_PROTOCOL_IX_OFFSET                       2
+#else
+#define  NET_CONN_PROTOCOL_IX_OFFSET                       0
+#endif
+
+
+#define  NET_CONN_PROTOCOL_IX_IP_V6_UDP                    0 + NET_CONN_PROTOCOL_IX_OFFSET
+#define  NET_CONN_PROTOCOL_IX_IP_V6_TCP                    1 + NET_CONN_PROTOCOL_IX_OFFSET
+
+
+
+/*
+*********************************************************************************************************
+*                                 NETWORK CONNECTION ADDRESS DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_CONN_ADDR_IP_LEN_PORT                       NET_SOCK_ADDR_IP_LEN_PORT
+
+#define  NET_CONN_ADDR_IP_IX_BASE                        NET_SOCK_ADDR_IP_IX_BASE
+#define  NET_CONN_ADDR_IP_IX_PORT                        NET_SOCK_ADDR_IP_IX_PORT
+
+#ifdef   NET_IPv4_MODULE_EN
+
+#define  NET_CONN_ADDR_IP_V4_IX_ADDR                     NET_SOCK_ADDR_IP_V4_IX_ADDR
+
+#define  NET_CONN_ADDR_IP_V4_LEN_ADDR                    NET_SOCK_ADDR_IP_V4_LEN_ADDR
+#define  NET_CONN_ADDR_IP_V4_WILDCARD                    NET_SOCK_ADDR_IP_V4_WILDCARD
+#define  NET_CONN_ADDR_IP_V4_BROADCAST                   NET_SOCK_ADDR_IP_V4_BROADCAST
+
+#endif
+
+#ifdef   NET_IPv6_MODULE_EN
+
+#define  NET_CONN_ADDR_IP_V6_IX_ADDR                     NET_SOCK_ADDR_IP_V6_IX_ADDR
+
+#define  NET_CONN_ADDR_IP_V6_LEN_ADDR                    NET_SOCK_ADDR_IP_V6_LEN_ADDR
+#define  NET_CONN_ADDR_IP_V6_WILDCARD                    NET_SOCK_ADDR_IP_V6_WILDCARD
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK CONNECTION FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ NET CONN FLAGS ------------------ */
+#define  NET_CONN_FLAG_NONE                       DEF_BIT_NONE
+#define  NET_CONN_FLAG_USED                       DEF_BIT_00    /* Conn cur used; i.e. NOT in free conn pool.           */
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK CONNECTION TYPE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_CONN_TYPE_CONN_NONE                           0u
+#define  NET_CONN_TYPE_CONN_HALF                           1u
+#define  NET_CONN_TYPE_CONN_FULL                           2u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                 NETWORK CONNECTION FAMILY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_CONN_FAMILY;
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK CONNECTION LIST INDEX DATA TYPE
+*
+* Note(s) : (1) NET_CONN_PROTOCOL_IX_NONE  SHOULD be #define'd based on 'NET_CONN_PROTOCOL_IX' data type
+*               declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_CONN_PROTOCOL_IX;
+
+#define  NET_CONN_PROTOCOL_IX_NONE      DEF_INT_08U_MAX_VAL     /* Define as max unsigned val (see Note #1).            */
+
+
+/*
+*********************************************************************************************************
+*                             NETWORK CONNECTION ADDRESS LENGTH DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_CONN_ADDR_LEN;
+
+
+/*
+*********************************************************************************************************
+*                             NETWORK CONNECTION LIST QUANTITY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_CONN_LIST_QTY;                         /* Defines max qty of conn lists to support.            */
+
+
+/*
+*********************************************************************************************************
+*                                NETWORK CONNECTION QUANTITY DATA TYPE
+*
+* Note(s) : (1) See also 'NETWORK CONNECTION IDENTIFICATION DATA TYPE  Note #2b'.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16S  NET_CONN_QTY;                              /* Defines max qty of conns      to support.            */
+
+
+/*
+*********************************************************************************************************
+*                             NETWORK CONNECTION IDENTIFICATION DATA TYPE
+*
+* Note(s) : (1) 'NET_CONN_ID' pre-defined in 'net_type.h' PRIOR to all other network modules that require
+*                network connection data type.
+*
+*           (2) (a) The following network connection values are pre-#define'd in 'net_cfg_net.h' PRIOR
+*                   to 'net_conn.h' based on other modules' configuration values :
+*
+*                   (1) NET_CONN_NBR_MIN
+*
+*               (b) (1) NET_CONN_NBR_MAX  SHOULD be #define'd based on 'NET_CONN_QTY' data type declared.
+*
+*                   (2) However, since network connection handle identifiers are data-typed as 16-bit
+*                       signed integers; the maximum number of valid network connection identifiers, &
+*                       therefore the maximum number of valid network connections, is the total number
+*                       of non-negative values that 16-bit signed integers support.
+*********************************************************************************************************
+*/
+
+                                                                /* CFG CONN NBR THs                                     */
+                                                                /* See Note #4.                                         */
+#ifdef   NET_TCP_MODULE_EN
+    #if (NET_TCP_NBR_CONN > NET_SOCK_NBR_SOCK)
+        #define NET_CONN_SOCK_TCP_NBR                 NET_SOCK_NBR_SOCK
+
+    #else
+        #define NET_CONN_SOCK_TCP_NBR                 NET_TCP_NBR_CONN
+    #endif
+
+#else
+    #define NET_CONN_SOCK_TCP_NBR                 0
+#endif
+
+
+#ifdef   NET_TCP_MODULE_EN
+    #define  NET_CONN_NBR_MIN                      (NET_SOCK_NBR_SOCK + \
+                                                    NET_TCP_NBR_CONN -  \
+                                                    NET_SOCK_CFG_SOCK_NBR_TCP)
+
+#else
+    #define  NET_CONN_NBR_MIN                       NET_SOCK_NBR_SOCK
+#endif
+
+
+#ifndef  NET_TCP_CFG_NBR_CONN
+#define  NET_TCP_CFG_NBR_CONN                           0u
+#endif
+
+#ifndef  NET_CONN_CFG_NBR_CONN
+#define  NET_CONN_NBR_CONN                          NET_SOCK_NBR_SOCK         + NET_TCP_CFG_NBR_CONN +             \
+                                                   (NET_SOCK_CFG_SOCK_NBR_TCP * NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX)
+#else
+#define  NET_CONN_NBR_CONN                          NET_CONN_CFG_NBR_CONN
+#endif
+
+
+
+
+#if 0                                                           /* See Note #1.                                         */
+typedef  CPU_INT16S  NET_CONN_ID;
+#endif
+
+#if 0                                                           /* See Note #2a1.                                       */
+#define  NET_CONN_NBR_MIN                                  1
+#endif
+#define  NET_CONN_NBR_MAX                DEF_INT_16S_MAX_VAL    /* See Note #2b.                                        */
+
+#define  NET_CONN_ID_MIN                                   0
+#define  NET_CONN_ID_MAX          (NET_CONN_NBR_CONN - 1)
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK CONNECTION LIST INDEX DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_CONN_QTY  NET_CONN_LIST_IX;
+
+#define  NET_CONN_LIST_IX_NONE                            -1
+#define  NET_CONN_LIST_IX_MIN                              0
+#define  NET_CONN_LIST_IX_MAX     (NET_CONN_NBR_CONN - 1)
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK CONNECTION CLOSE CODE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_CONN_CLOSE_CODE;
+
+#define  NET_CONN_CLOSE_NONE                               0u
+#define  NET_CONN_CLOSE_ALL                                1u
+#define  NET_CONN_CLOSE_BY_IF                              2u
+#define  NET_CONN_CLOSE_BY_ADDR                            3u
+
+#define  NET_CONN_CLOSE_HALF                              10u   /* Conn closed to tx's; open to rx's.                   */
+#define  NET_CONN_CLOSE_FULL                              11u
+
+
+/*
+*********************************************************************************************************
+*                                 NETWORK CONNECTION FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_FLAGS  NET_CONN_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK CONNECTION DATA TYPE
+*
+*                                             NET_CONN
+*                                          |-------------|
+*                                          |  Conn Type  |
+*                            Previous      |-------------|
+*                           Connection <----------O      |
+*                           Chain Lists    |-------------|        Next
+*                                          |      O----------> Connection
+*                            Previous      |-------------|     Chain Lists
+*                           Connection <----------O      |
+*                                          |-------------|        Next
+*                                          |      O----------> Connection
+*                                          |-------------|
+*                                          |      O----------> Connection
+*                                          |-------------|        List
+*                                          |  Conn IDs   |
+*                                          |-------------|
+*                                          |   IF Nbr    |
+*                                          |-------------|
+*                                          |   Family    |
+*                                          |  Protocol   |
+*                                          |-------------|
+*                                          |    Local    |
+*                                          |   Address   |
+*                                          |-------------|
+*                                          |   Remote    |
+*                                          |   Address   |
+*                                          |-------------|
+*                                          |  Accessed   |
+*                                          |  Counters   |
+*                                          |-------------|
+*                                          |IP Tx Params |
+*                                          |-------------|
+*                                          |    Flags    |
+*                                          |-------------|
+*
+*
+* Note(s) : (1) (a) (1) RFC #1122, Section 4.1.4 states that "an application-layer program MUST be
+*                       able to set the ... [IP] TOS ... for sending a ... datagram, [which] must
+*                       be passed transparently to the IP layer".
+*
+*                   (2) RFC #1122, Section 4.2.4.2 reiterates that :
+*
+*                       (A) "The application layer MUST be able to specify the [IP] Type-of-Service
+*                            (TOS) for [packets] that are sent on a connection."
+*
+*                       (B) "It not required [sic], but the application SHOULD be able to change the
+*                            [IP] TOS during the connection lifetime."
+*
+*               (b) (1) (A) RFC #1122, Section 4.1.4 states that "an application-layer program MUST
+*                           be able to set the [IP] TTL ... for sending a ... datagram, [which] must
+*                           be passed transparently to the IP layer".
+*
+*                       (B) RFC #1122, Section 4.2.2.19 reiterates that "the [IP] TTL value used to
+*                           send ... [packets] MUST be configurable".
+*
+*                   (2) RFC #1112, Section 6.1 states that "the service interface should provide a
+*                       way for the upper-layer protocol to specify the IP time-to-live of an outgoing
+*                       multicast datagram".
+*
+*               (c) (1) (A) RFC #1122, Section 4.1.4 states that "an application-layer program MUST
+*                           be able to set the ... IP options for sending a ... datagram, [which] must
+*                           be passed transparently to the IP layer".
+*
+*                       (B) RFC #1122, Section 4.1.3.2 reiterates that "an application MUST be able
+*                           to specify IP options to be sent ... and ... MUST pass these options to
+*                           the IP layer".
+*
+*                       (C) RFC #1122, Section 4.2.3.8 adds that :
+*
+*                           (1) "A TCP MAY support the [IP] Time Stamp and Record Route options."
+*
+*                           (2) "An application MUST be able to specify a [IP] source route when it
+*                                ... opens a TCP connection, and this MUST take precedence over a
+*                               source route received in a datagram."
+*
+*                   (2) IP transmit options currently NOT implemented      See 'net_tcp.h  Note #1d'
+*********************************************************************************************************
+*/
+
+                                                                /* --------------------- NET CONN --------------------- */
+typedef  struct  net_conn  NET_CONN;
+
+struct  net_conn {
+    NET_CONN                *PrevChainPtr;                      /* Ptr to PREV conn chain list.                         */
+    NET_CONN                *NextChainPtr;                      /* Ptr to NEXT conn chain list.                         */
+
+    NET_CONN                *PrevConnPtr;                       /* Ptr to PREV conn.                                    */
+    NET_CONN                *NextConnPtr;                       /* Ptr to NEXT conn.                                    */
+
+    NET_CONN               **ConnList;                          /* Conn list.                                           */
+
+
+    NET_CONN_ID              ID;                                /* Net             conn id.                             */
+    NET_CONN_ID              ID_App;                            /* App       layer conn id.                             */
+    NET_CONN_ID              ID_AppClone;                       /* App       layer conn id clone.                       */
+    NET_CONN_ID              ID_Transport;                      /* Transport layer conn id.                             */
+
+
+    NET_IF_NBR               IF_Nbr;                            /* IF nbr.                                              */
+
+    NET_CONN_FAMILY          Family;                            /* Conn family.                                         */
+    NET_CONN_PROTOCOL_IX     ProtocolIx;                        /* Conn protocol ix.                                    */
+
+
+    CPU_INT08U               AddrLocal[NET_CONN_ADDR_LEN_MAX];  /* Conn local  addr.                                    */
+    CPU_BOOLEAN              AddrLocalValid;                    /* Conn local  addr valid flag.                         */
+
+    CPU_INT08U               AddrRemote[NET_CONN_ADDR_LEN_MAX]; /* Conn remote addr.                                    */
+    CPU_BOOLEAN              AddrRemoteValid;                   /* Conn remote addr valid flag.                         */
+
+
+    CPU_INT16U               ConnChainAccessedCtr;              /* Nbr conn chain head accesses.                        */
+    CPU_INT16U               ConnAccessedCtr;                   /* Nbr conn            accesses (non-chain head).       */
+
+
+    NET_CONN_FLAGS           Flags;                             /* Conn flags.                                          */
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_FLAGS           TxIPv4Flags;                       /* Conn tx IPv4 flags.                                  */
+    NET_IPv4_TOS             TxIPv4TOS;                         /* Conn tx IPv4 TOS           (see Note #2a).           */
+    NET_IPv4_TTL             TxIPv4TTL;                         /* Conn tx IPv4 TTL           (see Note #2b1).          */
+#ifdef  NET_MCAST_TX_MODULE_EN
+    NET_IPv4_TTL             TxIPv4TTL_Multicast;               /* Conn tx IPv4 TTL multicast (see Note #2b2).          */
+#endif
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_FLAGS           TxIPv6Flags;                       /* Conn tx IPv6 flags.                                  */
+    NET_IPv6_TRAFFIC_CLASS   TxIPv6TrafficClass;                /* Conn tx IPv6 traffic class.                          */
+    NET_IPv6_FLOW_LABEL      TxIPv6FlowLabel;                   /* Conn tx IPv6 flow label.                             */
+    NET_IPv6_HOP_LIM         TxIPv6HopLim;                      /* Conn tx IPv6 hop lim.                                */
+#ifdef  NET_MCAST_TX_MODULE_EN
+    NET_IPv6_HOP_LIM         TxIPv6HopLimMulticast;             /* Conn tx IPv6 TTL multicast (see Note #2b2).          */
+#endif
+#endif
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+NET_CONN_EXT  NET_CONN          NetConn_Tbl[NET_CONN_NBR_CONN];
+NET_CONN_EXT  NET_CONN         *NetConn_PoolPtr;                    /* Ptr to pool of free net conns.                   */
+NET_CONN_EXT  NET_STAT_POOL     NetConn_PoolStat;
+
+                                                                    /* Array of ptrs to net conn lists.                 */
+NET_CONN_EXT  NET_CONN         *NetConn_ConnListHead[NET_CONN_PROTOCOL_NBR_MAX];
+
+NET_CONN_EXT  NET_CONN         *NetConn_ConnListChainPtr;           /* Ptr to cur  conn list chain to update.           */
+NET_CONN_EXT  NET_CONN         *NetConn_ConnListConnPtr;            /* Ptr to cur  conn list conn  to update.           */
+NET_CONN_EXT  NET_CONN         *NetConn_ConnListNextChainPtr;       /* Ptr to next conn list chain to update.           */
+NET_CONN_EXT  NET_CONN         *NetConn_ConnListNextConnPtr;        /* Ptr to next conn list conn  to update.           */
+
+
+NET_CONN_EXT  CPU_INT16U        NetConn_AccessedTh_nbr;             /* Nbr successful srch's to promote net conns.      */
+
+                                                                    /* Conn addr wildcard cfg.                          */
+NET_CONN_EXT  CPU_BOOLEAN       NetConn_AddrWildCardAvailv4;
+#ifdef  NET_IPv4_MODULE_EN
+NET_CONN_EXT  CPU_INT08U        NetConn_AddrWildCardv4[NET_CONN_ADDR_LEN_MAX];
+#endif
+
+
+NET_CONN_EXT  CPU_BOOLEAN       NetConn_AddrWildCardAvailv6;
+#ifdef  NET_IPv6_MODULE_EN
+NET_CONN_EXT  CPU_INT08U        NetConn_AddrWildCardv6[NET_CONN_ADDR_LEN_MAX];
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void              NetConn_Init                      (void);
+
+
+
+                                                                                /* ------------ CFG FNCTS ------------- */
+CPU_BOOLEAN       NetConn_CfgAccessedTh             (CPU_INT16U               nbr_access);
+
+
+
+                                                                                /* ---------- CONN API FNCTS ---------- */
+NET_CONN_ID       NetConn_Get                       (NET_CONN_FAMILY          family,
+                                                     NET_CONN_PROTOCOL_IX     protocol_ix,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_Free                      (NET_CONN_ID              conn_id);
+
+
+void              NetConn_Copy                      (NET_CONN_ID              conn_id_dest,
+                                                     NET_CONN_ID              conn_id_src);
+
+
+void              NetConn_CloseFromApp              (NET_CONN_ID              conn_id,
+                                                     CPU_BOOLEAN              close_conn_transport);
+
+void              NetConn_CloseFromTransport        (NET_CONN_ID              conn_id,
+                                                     CPU_BOOLEAN              close_conn_app);
+
+
+void              NetConn_CloseAllConns             (void);
+
+void              NetConn_CloseAllConnsByIF         (NET_IF_NBR               if_nbr);
+
+void              NetConn_CloseAllConnsByAddr       (CPU_INT08U              *p_addr,
+                                                     NET_CONN_ADDR_LEN        addr_len);
+
+void              NetConn_CloseAllConnsByAddrHandler(CPU_INT08U              *p_addr,
+                                                     NET_CONN_ADDR_LEN        addr_len);
+
+
+
+NET_IF_NBR        NetConn_IF_NbrGet                 (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+
+NET_CONN_ID       NetConn_ID_AppGet                 (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_ID_AppSet                 (NET_CONN_ID              conn_id,
+                                                     NET_CONN_ID              conn_id_app,
+                                                     NET_ERR                 *p_err);
+
+
+NET_CONN_ID       NetConn_ID_AppCloneGet            (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_ID_AppCloneSet            (NET_CONN_ID              conn_id,
+                                                     NET_CONN_ID              conn_id_app,
+                                                     NET_ERR                 *p_err);
+
+
+NET_CONN_ID       NetConn_ID_TransportGet           (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_ID_TransportSet           (NET_CONN_ID              conn_id,
+                                                     NET_CONN_ID              conn_id_transport,
+                                                     NET_ERR                 *p_err);
+
+
+void              NetConn_AddrLocalGet              (NET_CONN_ID              conn_id,
+                                                     CPU_INT08U              *p_addr_local,
+                                                     NET_CONN_ADDR_LEN       *p_addr_len,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_AddrLocalSet              (NET_CONN_ID              conn_id,
+                                                     NET_IF_NBR               if_nbr,
+                                                     CPU_INT08U              *p_addr_local,
+                                                     NET_CONN_ADDR_LEN        addr_len,
+                                                     CPU_BOOLEAN              addr_over_wr,
+                                                     NET_ERR                 *p_err);
+
+
+void              NetConn_AddrRemoteGet             (NET_CONN_ID              conn_id,
+                                                     CPU_INT08U              *p_addr_remote,
+                                                     NET_CONN_ADDR_LEN       *p_addr_len,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_AddrRemoteSet             (NET_CONN_ID              conn_id,
+                                                     CPU_INT08U              *p_addr_remote,
+                                                     NET_CONN_ADDR_LEN        addr_len,
+                                                     CPU_BOOLEAN              addr_over_wr,
+                                                     NET_ERR                 *p_err);
+
+CPU_BOOLEAN       NetConn_AddrRemoteCmp             (NET_CONN_ID              conn_id,
+                                                     CPU_INT08U              *p_addr_remote,
+                                                     NET_CONN_ADDR_LEN        addr_len,
+                                                     NET_ERR                 *p_err);
+
+
+#ifdef  NET_IPv4_MODULE_EN
+void              NetConn_IPv4TxParamsGet           (NET_CONN_ID              conn_id,
+                                                     NET_IPv4_FLAGS          *p_ip_flags,
+                                                     NET_IPv4_TOS            *p_ip_tos,
+                                                     NET_IPv4_TTL            *p_ip_ttl,
+                                                     NET_ERR                 *p_err);
+
+
+
+NET_IPv4_FLAGS    NetConn_IPv4TxFlagsGet            (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_IPv4TxFlagsSet            (NET_CONN_ID              conn_id,
+                                                     NET_IPv4_FLAGS           ip_flags,
+                                                     NET_ERR                 *p_err);
+
+
+NET_IPv4_TOS      NetConn_IPv4TxTOS_Get             (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_IPv4TxTOS_Set             (NET_CONN_ID              conn_id,
+                                                     NET_IPv4_TOS             ip_tos,
+                                                     NET_ERR                 *p_err);
+
+NET_IPv4_TTL      NetConn_IPv4TxTTL_Get             (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_IPv4TxTTL_Set             (NET_CONN_ID              conn_id,
+                                                     NET_IPv4_TTL             ip_ttl,
+                                                     NET_ERR                 *p_err);
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+NET_IPv4_TTL      NetConn_IPv4TxTTL_MulticastGet    (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_IPv4TxTTL_MulticastSet    (NET_CONN_ID              conn_id,
+                                                     NET_IPv4_TTL             ip_ttl,
+                                                     NET_ERR                 *p_err);
+#endif
+
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+
+void              NetConn_IPv6TxParamsGet           (NET_CONN_ID              conn_id,
+                                                     NET_IPv6_TRAFFIC_CLASS  *p_ip_traffic_class,
+                                                     NET_IPv6_FLOW_LABEL     *p_ip_flow_label,
+                                                     NET_IPv6_HOP_LIM        *p_ip_hop_lim,
+                                                     NET_IPv6_FLAGS          *p_ip_flags,
+                                                     NET_ERR                 *p_err);
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+NET_IPv6_HOP_LIM  NetConn_IPv6TxHopLimMcastGet      (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_IPv6TxHopLimMcastSet      (NET_CONN_ID              conn_id,
+                                                     NET_IPv6_HOP_LIM         ip_hop_lim,
+                                                     NET_ERR                 *p_err);
+#endif
+
+#endif
+
+
+                                                                                /* -------- CONN STATUS FNCTS --------- */
+CPU_BOOLEAN       NetConn_IsUsed                    (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+CPU_BOOLEAN       NetConn_IsIPv6                    (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+CPU_BOOLEAN       NetConn_IsPortUsed                (NET_PORT_NBR             port_nbr,
+                                                     NET_PROTOCOL_TYPE        protocol,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_IsConn                    (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+
+NET_STAT_POOL     NetConn_PoolStatGet               (void);
+
+void              NetConn_PoolStatResetMaxUsed      (void);
+
+
+
+                                                                                /* --------- CONN LIST FNCTS ---------- */
+NET_CONN_ID       NetConn_Srch                      (NET_CONN_FAMILY          family,
+                                                     NET_CONN_PROTOCOL_IX     protocol_ix,
+                                                     CPU_INT08U              *p_addr_local,
+                                                     CPU_INT08U              *p_addr_remote,
+                                                     NET_CONN_ADDR_LEN        addr_len,
+                                                     NET_CONN_ID             *p_conn_id_transport,
+                                                     NET_CONN_ID             *p_conn_id_app,
+                                                     NET_ERR                 *p_err);
+
+
+void              NetConn_ListAdd                   (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+void              NetConn_ListUnlink                (NET_CONN_ID              conn_id,
+                                                     NET_ERR                 *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_CONN_NBR_CONN
+#error  "NET_CONN_NBR_CONN            not #define'd in 'net_cfg_net.h'"
+#error  "                           [MUST be  >= NET_CONN_NBR_MIN]    "
+#error  "                           [     &&  <= NET_CONN_NBR_MAX]    "
+
+#elif   DEF_CHK_VAL(NET_CONN_NBR_CONN,     \
+                    NET_CONN_NBR_MIN,          \
+                    NET_CONN_NBR_MAX) != DEF_OK
+#error  "NET_CONN_NBR_CONN      illegally #define'd in 'net_cfg.h'"
+#error  "                           [MUST be  >= NET_CONN_NBR_MIN]    "
+#error  "                           [     &&  <= NET_CONN_NBR_MAX]    "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif /* NET_CONN_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ctr.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ctr.c
new file mode 100644
index 0000000..c245b64
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ctr.c
@@ -0,0 +1,187 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      NETWORK COUNTER MANAGEMENT
+*
+* Filename      : net_ctr.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_CTR_MODULE
+#include  "net_cfg_net.h"
+#include  "net_ctr.h"
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           STATISTIC COUNTERS
+*********************************************************************************************************
+*/
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+NET_CTR_STATS  Net_StatCtrs;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           ERROR COUNTERS
+*********************************************************************************************************
+*/
+
+#if (NET_CTR_CFG_ERR_EN  == DEF_ENABLED)
+NET_CTR_ERRS   Net_ErrCtrs;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            NetCtr_Init()
+*
+* Description : (1) Initialize Network Counter Management Module :
+*
+*                   (a) Initialize network statistics counters
+*                   (b) Initialize network error      counters
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetCtr_Init (void)
+{
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)                        /* ---------------- INIT NET STAT CTRS ---------------- */
+    Mem_Clr((void     *)      &Net_StatCtrs,
+            (CPU_SIZE_T)sizeof(Net_StatCtrs));
+#endif
+
+#if (NET_CTR_CFG_ERR_EN  == DEF_ENABLED)                        /* ---------------- INIT NET ERR  CTRS ---------------- */
+    Mem_Clr((void     *)      &Net_ErrCtrs,
+            (CPU_SIZE_T)sizeof(Net_ErrCtrs));
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetCtr_Inc()
+*
+* Description : Increment a network counter.
+*
+* Argument(s) : pctr        Pointer to a network counter.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NET_CTR_INC().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network counter variables MUST ALWAYS be accessed exclusively in critical sections.
+*
+*                   See also 'net_ctr.h  NETWORK COUNTER MACRO'S  Note #1a'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_CTR_MODULE_EN
+void  NetCtr_Inc (NET_CTR  *pctr)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+  (*pctr)++;
+    CPU_CRITICAL_EXIT();
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          NetCtr_IncLarge()
+*
+* Description : Increment a large network counter.
+*
+* Argument(s) : pctr_hi     Pointer to high half of a large network counter.
+*
+*               pctr_lo     Pointer to low  half of a large network counter.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NET_CTR_INC_LARGE().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network counter variables MUST ALWAYS be accessed exclusively in critical sections.
+*
+*                   See also 'net_ctr.h  NETWORK COUNTER MACRO'S  Note #1b'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_CTR_MODULE_EN
+void  NetCtr_IncLarge (NET_CTR  *pctr_hi,
+                       NET_CTR  *pctr_lo)
+{
+  (*pctr_lo)++;                                                 /* Inc lo-half ctr.                                     */
+    if (*pctr_lo == 0u) {                                       /* If  lo-half ctr ovfs, ...                            */
+       (*pctr_hi)++;                                            /* inc hi-half ctr.                                     */
+    }
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ctr.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ctr.h
new file mode 100644
index 0000000..ca82bde
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ctr.h
@@ -0,0 +1,1544 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      NETWORK COUNTER MANAGEMENT
+*
+* Filename      : net_ctr.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#include  
+#include  "net_cfg_net.h"
+#include  "net_def.h"
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_CTR_MODULE_PRESENT
+#define  NET_CTR_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_CTR_CFG_STAT_EN
+#error  "NET_CTR_CFG_STAT_EN        not #define'd in 'net_cfg.h'"
+#error  "                     [MUST be  DEF_DISABLED]           "
+#error  "                     [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_CTR_CFG_STAT_EN != DEF_DISABLED) && \
+        (NET_CTR_CFG_STAT_EN != DEF_ENABLED ))
+#error  "NET_CTR_CFG_STAT_EN  illegally #define'd in 'net_cfg.h'"
+#error  "                     [MUST be  DEF_DISABLED]           "
+#error  "                     [     ||  DEF_ENABLED ]           "
+#endif
+
+
+
+#ifndef  NET_CTR_CFG_ERR_EN
+#error  "NET_CTR_CFG_ERR_EN         not #define'd in 'net_cfg.h'"
+#error  "                     [MUST be  DEF_DISABLED]           "
+#error  "                     [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_CTR_CFG_ERR_EN != DEF_DISABLED) && \
+        (NET_CTR_CFG_ERR_EN != DEF_ENABLED ))
+#error  "NET_CTR_CFG_ERR_EN   illegally #define'd in 'net_cfg.h'"
+#error  "                     [MUST be  DEF_DISABLED]           "
+#error  "                     [     ||  DEF_ENABLED ]           "
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NETWORK COUNTER DATA TYPE
+*
+* Note(s) : (1) NET_CTR_MIN & NET_CTR_MAX  SHOULD be #define'd based on 'NET_CTR' data type declared.
+*
+*           (2) NET_CTR_PCT_NUMER_MAX_TH, NET_CTR_BIT_LO, & NET_CTR_BIT_HI  MUST be globally #define'd
+*               AFTER 'NET_CTR' data type declared.
+*
+*           (3) NET_CTR_PCT_NUMER_MAX_TH  #define's the maximum value for a counter that is used as a
+*               numerator in a percentage calculation.  This threshold is required since the numerator in
+*               a percentage calculation is multiplied by 100 (%) BEFORE division with the denominator :
+*
+*                                    Numerator * 100%
+*                   Percentage (%) = ----------------
+*                                      Denominator
+*
+*               Therefore, the numerator MUST be constrained by this threshold to prevent integer overflow
+*               from the multiplication BEFORE the division.
+*
+*               (a) The percentage threshold value is calculated as follows :
+*
+*                                                N
+*                                               2
+*                       Percentage Threshold = ---
+*                                              100
+*
+*               (b) To avoid macro integer overflow, the threshold value is modified by one less "divide-by-2"
+*                   left-shift compensated by dividing the numerator by 50, instead of 100 :
+*
+*                                               N-1     N
+*                                              2       2  / 2
+*                       Percentage Threshold = ---- = -------
+*                                               50    100 / 2
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  NET_CTR;                                   /* Defines   max nbr of errs/stats to cnt.              */
+
+#define  NET_CTR_MIN                    DEF_INT_32U_MIN_VAL     /* Define as min unsigned val (see Note #1).            */
+#define  NET_CTR_MAX                    DEF_INT_32U_MAX_VAL     /* Define as max unsigned val (see Note #1).            */
+
+
+#define  NET_CTR_PCT_NUMER_MAX_TH     ((NET_CTR)(((NET_CTR)1u << ((sizeof(NET_CTR) * DEF_OCTET_NBR_BITS) - 1u)) / (NET_CTR)50u))
+
+#define  NET_CTR_BIT_LO                          ((NET_CTR)DEF_BIT_00)
+#define  NET_CTR_BIT_HI               ((NET_CTR) ((NET_CTR)1u << ((sizeof(NET_CTR) * DEF_OCTET_NBR_BITS) - 1u)))
+
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK STATISTIC DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INTERFACE 802x STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+
+typedef  struct  net_ctr_if_802x_stats {
+        NET_CTR  RxCtr;
+        NET_CTR  RxPktCtr;                                  /* Nbr rx'd 802x  pkts.                                         */
+        NET_CTR  RxPktDisCtr;                               /* Nbr rx'd 802x  pkts discarded by the interface.              */
+
+
+        NET_CTR  TxPktCtr;                                  /* Nbr tx'd 802x  pkts.                                         */
+
+        NET_CTR  RxPktBcastCtr;                             /* Nbr rx'd 802x  pkts broadcast to this     dest.              */
+        NET_CTR  TxPktBcastCtr;                             /* Nbr tx'd 802x  pkts broadcast to multiple dest(s).           */
+
+    #ifdef  NET_MCAST_RX_MODULE_EN
+        NET_CTR  RxPktMcastCtr;                             /* Nbr rx'd 802x  pkts multicast to this     dest.              */
+    #endif
+
+    #ifdef  NET_MCAST_TX_MODULE_EN
+        NET_CTR  TxPktMcastCtr;                             /* Nbr tx'd 802x  pkts multicast to multiple dest(s).           */
+    #endif
+} NET_CTR_IF_802x_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                INTERFACE GENERIC STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_if_stats {
+    NET_CTR  RxNbrOctets;                                   /* Nbr      octets      rx'd      for a specific IF.        */
+    NET_CTR  RxNbrOctetsPrev;                               /* Nbr      octets prev rx'd      for a specific IF.        */
+    NET_CTR  RxNbrOctetsPerSec;                             /* Nbr rx'd octets per  sec       for a specific IF.        */
+    NET_CTR  RxNbrOctetsPerSecMax;                          /* Nbr rx'd octets per  sec max   for a specific IF.        */
+    NET_CTR  RxNbrPktCtr;                                   /* Nbr rx'd pkts                  for a specific IF.        */
+    NET_CTR  RxNbrPktCtrPerSec;                             /* Nbr rx'd pkts   per  sec       for a specific IF.        */
+    NET_CTR  RxNbrPktCtrPerSecMax;                          /* Nbr rx'd pkts   per  sec max   for a specific IF.        */
+    NET_CTR  RxNbrPktCtrProcessed;                          /* Nbr rx'd pkts        processed for a specific IF.        */
+    NET_CTR  RxNbrPktCtrProcessedPrev;                      /* Nbr rx'd pkts   prev processed for a specific IF.        */
+
+    NET_CTR  TxNbrOctets;                                   /* Nbr      octets      tx'd      for a specific IF.        */
+    NET_CTR  TxNbrOctetsPrev;                               /* Nbr      octets prev tx'd      for a specific IF.        */
+    NET_CTR  TxNbrOctetsPerSec;                             /* Nbr tx'd octets per  sec       for a specific IF.        */
+    NET_CTR  TxNbrOctetsPerSecMax;                          /* Nbr tx'd octets per  sec max   for a specific IF.        */
+    NET_CTR  TxNbrPktCtr;                                   /* Nbr tx'd pkts                  for a specific IF.        */
+    NET_CTR  TxNbrPktCtrPerSec;                             /* Nbr tx'd pkts   per  sec       for a specific IF.        */
+    NET_CTR  TxNbrPktCtrPerSecMax;                          /* Nbr tx'd pkts   per  sec max   for a specific IF.        */
+    NET_CTR  TxNbrPktCtrProcessed;                          /* Nbr tx'd pkts        processed for a specific IF.        */
+    NET_CTR  TxNbrPktCtrProcessedPrev;                      /* Nbr tx'd pkts   prev processed for a specific IF.        */
+} NET_CTR_IF_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                LOOPBACK INTERFACE STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_if_loopback_stats {
+    NET_CTR  RxPktCtr;                                      /* Nbr rx'd loopback pkts.                                  */
+    NET_CTR  RxPktCompCtr;                                  /* Nbr rx'd loopback pkts delivered to supported protocols. */
+
+    NET_CTR  TxPktCtr;                                      /* Nbr tx'd loopback pkts.                                  */
+} NET_CTR_IF_LOOPBACK_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                ETHERNET INTERFACE STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_if_ether_stats {
+    NET_CTR_IF_802x_STATS  IF_802xCtrs;                     /* Ether 802x stats ctrs.                                   */
+
+    NET_CTR                RxPktCtr;                        /* Nbr rx'd ether pkts.                                     */
+    NET_CTR                TxPktCtr;                        /* Nbr tx'd ether pkts.                                     */
+} NET_CTR_IF_ETHER_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  WIFI INTERFACE STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_if_wifi_stats {
+    NET_CTR_IF_802x_STATS  IF_802xCtrs;                     /* Wifi 802x stats ctrs.                                    */
+
+    NET_CTR                RxPktCtr;                        /* Nbr rx'd wifi pkts.                                      */
+    NET_CTR                RxMgmtCtr;                       /* Nbr rx'd wifi mgmt frame.                                */
+    NET_CTR                RxMgmtCompCtr;                   /* Nbr rx'd wifi mgmt frame delivered to wifi mgr.          */
+    NET_CTR                TxPktCtr;                        /* Nbr tx'd wifi pkts.                                      */
+} NET_CTR_IF_WIFI_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    INTERFACES STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_ifs_stats {
+        NET_CTR_IF_STATS           IF[NET_IF_NBR_IF_TOT];   /* IF stat ctrs.                                            */
+
+        NET_CTR                    RxPktCtr;                /* Nbr rx'd IF pkts.                                        */
+
+        NET_CTR                    TxPktCtr;                /* Nbr tx'd IF pkts.                                        */
+        NET_CTR                    TxPktDeallocCtr;         /* Nbr tx'd IF pkts successfully dealloc'd.                 */
+
+    #ifdef  NET_IF_LOOPBACK_MODULE_EN
+        NET_CTR_IF_LOOPBACK_STATS  Loopback;                /* Loopback interfaces statistics.                          */
+    #endif
+
+    #ifdef  NET_IF_ETHER_MODULE_EN
+        NET_CTR_IF_ETHER_STATS     Ether;                   /* Ethernet interfaces statistics.                          */
+    #endif
+
+    #ifdef  NET_IF_WIFI_MODULE_EN
+        NET_CTR_IF_WIFI_STATS      WiFi;                    /* WiFi interfaces statistics.                              */
+    #endif
+
+    #ifdef  NET_IF_802x_MODULE_EN
+        NET_CTR_IF_802x_STATS      IFs_802xCtrs;            /* 802x interface statistics.                               */
+    #endif
+} NET_CTR_IFs_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       ARP STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_arp_stats {
+    NET_CTR  RxPktCtr;                                      /* Nbr rx'd ARP       pkts.                                 */
+    NET_CTR  RxMsgCompCtr;                                  /* Nbr rx'd ARP       msgs successfully processed.          */
+    NET_CTR  RxMsgReqCompCtr;                               /* Nbr rx'd ARP req   msgs successfully processed.          */
+    NET_CTR  RxMsgReplyCompCtr;                             /* Nbr rx'd ARP reply msgs successfully processed.          */
+
+    NET_CTR  TxMsgCtr;                                      /* Nbr tx'd ARP       msgs.                                 */
+    NET_CTR  TxMsgReqCtr;                                   /* Nbr tx'd ARP req   msgs.                                 */
+    NET_CTR  TxMsgReplyCtr;                                 /* Nbr tx'd ARP reply msgs.                                 */
+} NET_CTR_ARP_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       NDP STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_ndp_stats {
+    NET_CTR  RxMsgCtr;
+    NET_CTR  RxMsgSolNborCtr;                               /* Nbr rx'd NDP neighbor solicitation  msgs.                    */
+    NET_CTR  RxMsgAdvNborCtr;                               /* Nbr rx'd NDP neighbor advertisement msgs.                    */
+    NET_CTR  RxMsgAdvRouterCtr;                             /* Nbr rx'd NDP router   advertisement msgs.                    */
+    NET_CTR  RxMsgRedirectCtr;                              /* Nbr rx'd NDP redirect               msgs.                    */
+} NET_CTR_NDP_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       IPv4 STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_ipv4_stats {
+        NET_CTR  RxPktCtr;                                  /* Nbr rx'd IPv4 datagrams.                                 */
+        NET_CTR  RxDgramCompCtr;                            /* Nbr rx'd IPv4 datagrams delivered to supported protocols.*/
+
+        NET_CTR  RxDestLocalHostCtr;                        /* Nbr rx'd IPv4 datagrams from localhost.                  */
+        NET_CTR  RxDestBcastCtr;                            /* Nbr rx'd IPv4 datagrams via  broadcast.                  */
+
+
+    #ifdef  NET_IGMP_MODULE_EN
+        NET_CTR  RxDestMcastCtr;                            /* Nbr rx'd IPv4 datagrams via  multicast.                  */
+    #endif
+
+        NET_CTR  RxFragCtr;                                 /* Nbr rx'd IPv4 frags.                                     */
+        NET_CTR  RxFragDgramReasmCtr;                       /* Nbr rx'd IPv4 frag'd datagrams reasm'd.                  */
+
+
+        NET_CTR  TxDgramCtr;                                /* Nbr tx'd IPv4 datagrams.                                 */
+        NET_CTR  TxDestThisHostCtr;                         /* Nbr tx'd IPv4 datagrams           to this host.          */
+        NET_CTR  TxDestLocalHostCtr;                        /* Nbr tx'd IPv4 datagrams           to localhost.          */
+        NET_CTR  TxDestLocalLinkCtr;                        /* Nbr tx'd IPv4 datagrams           to local  link addr(s).*/
+        NET_CTR  TxDestLocalNetCtr;                         /* Nbr tx'd IPv4 datagrams           to local  net.         */
+        NET_CTR  TxDestRemoteNetCtr;                        /* Nbr tx'd IPv4 datagrams           to remote net.         */
+        NET_CTR  TxDestBcastCtr;                            /* Nbr tx'd IPv4 datagrams broadcast to dest(s).            */
+
+    #ifdef  NET_MCAST_MODULE_EN
+        NET_CTR  TxDestMcastCtr;                            /* Nbr tx'd IPv4 datagrams multicast to dest(s).            */
+    #endif
+} NET_CTR_IPv4_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       IPv6 STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_ipv6_stats {
+    NET_CTR  RxPktCtr;                                      /* Nbr rx'd IPv6 datagrams.                                 */
+    NET_CTR  RxDgramCompCtr;                                /* Nbr rx'd IPv6 datagrams delivered to supported protocols.*/
+
+    NET_CTR  RxDestLocalHostCtr;                            /* Nbr rx'd IPv6 datagrams from localhost.                  */
+    NET_CTR  RxDestBcastCtr;                                /* Nbr rx'd IPv6 datagrams via  broadcast.                  */
+
+    NET_CTR  RxFragCtr;                                     /* Nbr rx'd IPv6 frags.                                     */
+    NET_CTR  RxFragDgramReasmCtr;                           /* Nbr rx'd IPv6 frag'd datagrams reasm'd.                  */
+
+
+    NET_CTR  TxDgramCtr;                                    /* Nbr tx'd IPv6 datagrams.                                 */
+    NET_CTR  TxDestThisHostCtr;                             /* Nbr tx'd IPv6 datagrams           to this host.          */
+    NET_CTR  TxDestLocalHostCtr;                            /* Nbr tx'd IPv6 datagrams           to localhost.          */
+    NET_CTR  TxDestLocalLinkCtr;                            /* Nbr tx'd IPv6 datagrams           to local  link addr(s).*/
+    NET_CTR  TxDestLocalNetCtr;                             /* Nbr tx'd IPv6 datagrams           to local  net.         */
+    NET_CTR  TxDestRemoteNetCtr;                            /* Nbr tx'd IPv6 datagrams           to remote net.         */
+    NET_CTR  TxDestBcastCtr;                                /* Nbr tx'd IPv6 datagrams broadcast to dest(s).            */
+} NET_CTR_IPv6_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       ICMPv4 STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_icmpv4_stats {
+    NET_CTR  RxMsgCtr;                                      /* Nbr rx'd ICMPv4       msgs.                                  */
+    NET_CTR  RxMsgCompCtr;                                  /* Nbr rx'd ICMPv4       msgs successfully processed.           */
+    NET_CTR  RxMsgErrCtr;                                   /* Nbr rx'd ICMPv4 err   msgs successfully processed.           */
+    NET_CTR  RxMsgReqCtr;                                   /* Nbr rx'd ICMPv4 req   msgs successfully processed.           */
+    NET_CTR  RxMsgReplyCtr;                                 /* Nbr rx'd ICMPv4 reply msgs successfully processed.           */
+    NET_CTR  RxMsgUnknownCtr;
+
+    NET_CTR  TxMsgCtr;                                      /* Nbr tx'd ICMPv4       msgs.                                  */
+    NET_CTR  TxMsgErrCtr;                                   /* Nbr tx'd ICMPv4 err   msgs.                                  */
+    NET_CTR  TxMsgReqCtr;                                   /* Nbr tx'd ICMPv4 req   msgs.                                  */
+    NET_CTR  TxMsgReplyCtr;                                 /* Nbr tx'd ICMPv4 reply msgs.                                  */
+} NET_CTR_ICMPv4_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       ICMPv6 STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_icmpv6_stats {
+    NET_CTR  RxMsgCtr;                                      /* Nbr rx'd ICMPv6       msgs.                              */
+    NET_CTR  RxMsgCompCtr;                                  /* Nbr rx'd ICMPv6       msgs successfully processed.       */
+    NET_CTR  RxMsgErrCtr;                                   /* Nbr rx'd ICMPv6 err   msgs successfully processed.       */
+    NET_CTR  RxMsgReqCtr;                                   /* Nbr rx'd ICMPv6 req   msgs successfully processed.       */
+    NET_CTR  RxMsgReplyCtr;                                 /* Nbr rx'd ICMPv6 reply msgs successfully processed.       */
+
+    NET_CTR  RxMsgUnknownCtr;
+
+    NET_CTR  TxMsgCtr;                                      /* Nbr tx'd ICMPv6       msgs.                              */
+    NET_CTR  TxMsgErrCtr;                                   /* Nbr tx'd ICMPv6 err   msgs.                              */
+    NET_CTR  TxMsgReqCtr;                                   /* Nbr tx'd ICMPv6 req   msgs.                              */
+    NET_CTR  TxMsgReplyCtr;                                 /* Nbr tx'd ICMPv6 reply msgs.                              */
+} NET_CTR_ICMPv6_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       IGMP STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_igmp_stats {
+    NET_CTR  RxMsgCtr;                                      /* Nbr rx'd IGMP        msgs.                               */
+    NET_CTR  RxMsgCompCtr;                                  /* Nbr rx'd IGMP        msgs successfully processed.        */
+    NET_CTR  RxMsgQueryCtr;                                 /* Nbr rx'd IGMP query  msgs successfully processed.        */
+    NET_CTR  RxMsgReportCtr;                                /* Nbr rx'd IGMP report msgs successfully processed.        */
+
+    NET_CTR  TxMsgCtr;                                      /* Nbr tx'd IGMP        msgs.                               */
+    NET_CTR  TxMsgReportCtr;                                /* Nbr tx'd IGMP report msgs.                               */
+} NET_CTR_IGMP_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       MLDP STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_mldp_stats {
+    NET_CTR  RxMsgCtr;                                      /* Nbr rx'd MLDP        msgs.                               */
+    NET_CTR  RxMsgCompCtr;                                  /* Nbr rx'd MLDP        msgs successfully processed.        */
+    NET_CTR  RxMsgQueryCtr;                                 /* Nbr rx'd MLDP query  msgs successfully processed.        */
+    NET_CTR  RxMsgReportCtr;                                /* Nbr rx'd MLDP report msgs successfully processed.        */
+
+    NET_CTR  TxMsgCtr;                                      /* Nbr tx'd MLDP        msgs.                               */
+    NET_CTR  TxMsgReportCtr;                                /* Nbr tx'd MLDP report msgs.                               */
+} NET_CTR_MLDP_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       UDP STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_udp_stats {
+    NET_CTR  RxPktCtr;                                      /* Nbr rx'd UDP datagrams.                                  */
+    NET_CTR  RxDgramCompCtr;                                /* Nbr rx'd UDP datagrams delivered to app layer.           */
+
+    NET_CTR  TxDgramCtr;                                    /* Nbr tx'd UDP datagrams.                                  */
+} NET_CTR_UDP_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       TCP STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_tcp_stats {
+    NET_CTR  RxPktCtr;                                      /* Nbr rx'd TCP segs.                                       */
+    NET_CTR  RxSegCompCtr;                                  /* Nbr rx'd TCP segs demux'd to app conn.                   */
+
+    NET_CTR  TxSegCtr;                                      /* Nbr tx'd TCP                 segs.                       */
+    NET_CTR  TxSegConnSyncCtr;                              /* Nbr tx'd TCP conn sync       segs.                       */
+    NET_CTR  TxSegConnCloseCtr;                             /* Nbr tx'd TCP conn close      segs.                       */
+    NET_CTR  TxSegConnAckCtr;                               /* Nbr tx'd TCP conn ack        segs.                       */
+    NET_CTR  TxSegConnResetCtr;                             /* Nbr tx'd TCP conn reset      segs.                       */
+    NET_CTR  TxSegConnProbeCtr;                             /* Nbr tx'd TCP conn probe      segs.                       */
+    NET_CTR  TxSegConnKAliveCtr;                            /* Nbr tx'd TCP conn keep-alive segs.                       */
+    NET_CTR  TxSegConnTxQ_Ctr;                              /* Nbr tx'd TCP conn    tx Q    segs.                       */
+    NET_CTR  TxSegConnReTxQ_Ctr;                            /* Nbr tx'd TCP conn re-tx Q    segs.                       */
+} NET_CTR_TCP_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       SOCKET STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_sock_stats {
+    NET_CTR  RxPktCtr;                                      /* Nbr rx'd sock pkts.                                      */
+    NET_CTR  RxPktCompCtr;                                  /* Nbr rx'd sock pkts delivered to apps.                    */
+} NET_CTR_SOCK_STATS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_stats {
+        NET_CTR_IFs_STATS     IFs;
+
+    #ifdef  NET_ARP_MODULE_EN
+        NET_CTR_ARP_STATS     ARP;
+    #endif
+
+    #ifdef  NET_NDP_MODULE_EN
+        NET_CTR_NDP_STATS     NDP;
+    #endif
+
+    #ifdef NET_IPv4_MODULE_EN
+        NET_CTR_IPv4_STATS    IPv4;
+    #endif
+
+    #ifdef  NET_IPv6_MODULE_EN
+        NET_CTR_IPv6_STATS    IPv6;
+    #endif
+
+    #ifdef  NET_ICMPv4_MODULE_EN
+        NET_CTR_ICMPv4_STATS  ICMPv4;
+    #endif
+
+    #ifdef  NET_ICMPv6_MODULE_EN
+        NET_CTR_ICMPv6_STATS  ICMPv6;
+    #endif
+
+    #ifdef  NET_IGMP_MODULE_EN
+        NET_CTR_IGMP_STATS    IGMP;
+    #endif
+
+    #ifdef  NET_MLDP_MODULE_EN
+        NET_CTR_MLDP_STATS    MLDP;
+    #endif
+
+       NET_CTR_UDP_STATS      UDP;
+
+    #ifdef  NET_TCP_MODULE_EN
+       NET_CTR_TCP_STATS      TCP;
+    #endif
+
+       NET_CTR_SOCK_STATS     Sock;
+} NET_CTR_STATS;
+
+
+
+/*
+*********************************************************************************************************
+*                                      NETWORK ERROR DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    802x INTERFACE ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_if_802x_errs {
+        NET_CTR  NullPtrCtr;                                /* Nbr null Ether IF ptr accesses.                          */
+
+        NET_CTR  RxInvFrameCtr;                             /* Nbr rx'd Ether pkts with invalid frame.                  */
+        NET_CTR  RxInvAddrDestCtr;                          /* Nbr rx'd Ether pkts with invalid dest addr.              */
+        NET_CTR  RxInvAddrSrcCtr;                           /* Nbr rx'd Ether pkts with invalid src  addr.              */
+        NET_CTR  RxInvProtocolCtr;                          /* Nbr rx'd Ether pkts with invalid/unsupported protocol.   */
+        NET_CTR  RxPktDisCtr;                               /* Nbr rx'd Ether pkts discarded.                           */
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  RxInvBufIxCtr;                             /* Nbr rx'd Ether pkts with invalid buf ix.                 */
+    #endif
+
+
+        NET_CTR  TxPktDisCtr;                               /* Nbr tx   Ether pkts discarded.                           */
+        NET_CTR  TxInvProtocolCtr;                          /* Nbr tx   Ether pkts with invalid/unsupported protocol.   */
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  TxInvBufIxCtr;                             /* Nbr tx   Ether pkts with invalid buf ix.                 */
+        NET_CTR  TxHdrDataLenCtr;
+    #endif
+
+} NET_CTR_IF_802x_ERRS;
+
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  INTERFACE GENERIC ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_if_errs {
+    NET_CTR  BufLostCtr;                                    /* Nbr      IF net bufs lost/discarded.                     */
+
+    NET_CTR  RxInvProtocolCtr;                              /* Nbr rx'd IF pkts with invalid/unsupported protocol.      */
+    NET_CTR  RxInvBufIxCtr;                                 /* Nbr rx'd IF pkts with invalid buf ix.                    */
+    NET_CTR  RxPktDisCtr;                                   /* Nbr rx'd IF pkts discarded for a specific IF.            */
+
+    NET_CTR  TxInvProtocolCtr;                              /* Nbr tx   IF pkts with invalid/unsupported protocol.      */
+    NET_CTR  TxInvBufIxCtr;                                 /* Nbr tx   IF pkts with invalid buf ix.                    */
+    NET_CTR  TxPktDisCtr;                                   /* Nbr tx   IF pkts discarded for a specific IF.            */
+} NET_CTR_IF_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  LOOPBACK INTERFACE ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_if_loopback_errs {
+        NET_CTR  RxPktDisCtr;                               /* Nbr rx'd loopback pkts discarded.                            */
+        NET_CTR  TxPktDisCtr;                               /* Nbr tx   loopback pkts discarded.                            */
+
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  NullPtrCtr;                                /* Nbr null loopback IF ptr accesses.                           */
+    #endif  /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+} NET_CTR_IF_LOOPBACK_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  ETHERNET INTERFACE ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_if_ether_errs {
+        NET_CTR_IF_802x_ERRS  IF_802xCtrs;                      /* Ether 802x err ctrs.                                 */
+
+        NET_CTR               RxPktDisCtr;                      /* Nbr rx'd Ether pkts discarded.                       */
+
+        NET_CTR               TxPktDisCtr;                      /* Nbr tx   Ether pkts discarded.                       */
+    #if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR               NullPtrCtr;                       /* Nbr null Ether IF ptr accesses.                      */
+    #endif
+} NET_CTR_IF_ETHER_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    WIFI INTERFACE ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_if_wifi_errs {
+    NET_CTR_IF_802x_ERRS  IF_802xCtrs;                      /* Wifi 802x err ctrs.                                      */
+
+    NET_CTR               RxDisCtr;                         /* Nbr rx'd Wifi pkts or mgmt frame discarded.              */
+    NET_CTR               RxPktDisCtr;                      /* Nbr rx'd Wifi pkts               discarded.              */
+    NET_CTR               RxMgmtDisCtr;                     /* Nbr rx'd Wifi         mgmt frame discarded.              */
+
+    NET_CTR               TxPktDisCtr;                      /* Nbr tx   Wifi pkts discarded.                            */
+    NET_CTR               TxNullPtrCtr;                     /* Nbr null Wifi IF ptr accesses.                           */
+
+} NET_CTR_IF_WIFI_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      INTERFACES ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_ifs_errs {
+    NET_CTR_IF_ERRS           IF[NET_IF_NBR_IF_TOT];    /* IF-Dev err ctrs.                                     */
+
+    NET_CTR                   RxPktDisCtr;              /* Nbr rx'd IF pkts discarded.                          */
+    NET_CTR                   TxPktDeallocCtr;          /* Nbr tx'd IF pkts NOT sucessfully dealloc'd.          */
+
+    NET_CTR                   TxPktDisCtr;              /* Nbr tx'd IF pkts discarded.                          */
+    NET_CTR                   InvTransactionTypeCtr;    /* Nbr invalid transaction type accesses.               */
+
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    NET_CTR                   NullPtrCtr;               /* Nbr null IF ptr accesses.                            */
+#endif /* NET_ERR_CFG_ARG_CHK_???_EN */
+
+
+#ifdef  NET_IF_LOOPBACK_MODULE_EN
+    NET_CTR_IF_LOOPBACK_ERRS  Loopback;
+#endif  /* NET_IF_LOOPBACK_MODULE_EN */
+
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+    NET_CTR_IF_ETHER_ERRS     Ether;
+#endif /* NET_IF_ETHER_MODULE_EN */
+
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+    NET_CTR_IF_WIFI_ERRS      WiFi;
+#endif  /* NET_IF_WIFI_MODULE_EN */
+
+#ifdef  NET_IF_802x_MODULE_EN
+    NET_CTR_IF_802x_ERRS      IFs_802x;                 /* Sum of 802x interfaces errors.                       */
+#endif /* NET_IF_802x_MODULE_EN */
+} NET_CTR_IFs_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                      STATISTIC ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+typedef  struct  net_ctr_stat_errs {
+    NET_CTR  NullPtrCtr;                            /* Nbr null    net stat ptr  accesses.                          */
+    NET_CTR  InvTypeCtr;                            /* Nbr invalid net stat type accesses.                          */
+} NET_CTR_STATS_ERRS;
+#endif
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                        TIMER ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_tmr_errs {
+    NET_CTR  NoneAvailCtr;                              /* Nbr unavail net tmr      accesses.                           */
+
+#if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+
+    NET_CTR  NullPtrCtr;                                /* Nbr null    net tmr      accesses.                           */
+    NET_CTR  NullFnctCtr;                               /* Nbr null    net tmr fnct accesses.                           */
+    NET_CTR  NotUsedCtr;                                /* Nbr unused  net tmr      accesses.                           */
+
+    NET_CTR  InvTypeCtr;                                /* Nbr invalid net tmr type accesses.                           */
+
+#endif /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+} NET_CTR_TMR_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  BUFFER MANAGEMENT ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_buf_errs {
+
+        NET_CTR  NoneAvailCtr;                              /* Nbr unavail net buf      accesses.                       */
+
+        NET_CTR  InvTypeCtr;                                /* Nbr invalid net buf type accesses.                       */
+
+        NET_CTR  SizeCtr;                                   /* Nbr         net bufs with invalid size.                  */
+        NET_CTR  LenCtr;                                    /* Nbr         net bufs with invalid len.                   */
+
+        NET_CTR  InvTransactionTypeCtr;
+
+    #if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+
+        NET_CTR  NullPtrCtr;                                /* Nbr null    net buf      accesses.                       */
+        NET_CTR  NotUsedCtr;                                /* Nbr unused  net buf      accesses.                       */
+        NET_CTR  IxCtr;                                     /* Nbr         net bufs with invalid ix.                    */
+
+    #endif /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+} NET_CTR_BUF_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                  CONNECTION MANAGEMENT ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_conn_errs {
+        NET_CTR  NoneAvailCtr;                              /* Nbr unavail net conn      accesses.                          */
+        NET_CTR  NotUsedCtr;                                /* Nbr unused  net conn      accesses.                          */
+
+        NET_CTR  CloseCtr;                                  /* Nbr         net conn closes.                                 */
+
+        NET_CTR  InvConnCtr;                                /* Nbr invalid net conn ID   accesses.                          */
+        NET_CTR  InvConnAddrLenCtr;                         /* Nbr         net conns with invalid addr len.                 */
+        NET_CTR  InvConnAddrInUseCtr;                       /* Nbr         net conns with         addr already in use.      */
+
+        NET_CTR  InvFamilyCtr;                              /* Nbr         net conns with invalid conn family.              */
+        NET_CTR  InvProtocolIxCtr;                          /* Nbr         net conns with invalid protocol ix.              */
+
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  NullPtrCtr;                                /* Nbr null    net conn      accesses.                          */
+        NET_CTR  InvTypeCtr;                                /* Nbr invalid net conn type accesses.                          */
+    #endif  /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+} NET_CTR_CONN_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         ARP ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef struct  net_ctr_arp_errs {
+        NET_CTR  NoneAvailCtr;                              /* Nbr unavail ARP cache      accesses.                     */
+
+        NET_CTR  RxInvHW_TypeCtr;                           /* Nbr rx'd ARP msgs with invalid hw       type.            */
+        NET_CTR  RxInvHW_AddrLenCtr;                        /* Nbr rx'd ARP msgs with invalid hw       addr len.        */
+        NET_CTR  RxInvHW_AddrCtr;                           /* Nbr rx'd ARP msgs with invalid hw       addr.            */
+        NET_CTR  RxInvProtocolTypeCtr;                      /* Nbr rx'd ARP msgs with invalid protocol type.            */
+        NET_CTR  RxInvLenCtr;                               /* Nbr rx'd ARP msgs with invalid protocol addr len.        */
+        NET_CTR  RxInvProtocolAddrCtr;                      /* Nbr rx'd ARP msgs with invalid protocol addr.            */
+        NET_CTR  RxInvOpCodeCtr;                            /* Nbr rx'd ARP msgs with invalid op code.                  */
+        NET_CTR  RxInvOpAddrCtr;                            /* Nbr rx'd ARP msgs with invalid op code/addr.             */
+        NET_CTR  RxInvMsgLenCtr;                            /* Nbr rx'd ARP msgs with invalid msg len.                  */
+        NET_CTR  RxPktInvDest;                              /* Nbr rx'd ARP msgs for  invalid           dest.           */
+
+        NET_CTR  RxPktTargetReplyCtr;                       /* Nbr rx'd ARP msgs for  invalid reply msg dest.           */
+
+        NET_CTR  RxPktDisCtr;                               /* Nbr rx'd ARP pkts discarded.                             */
+
+        NET_CTR  TxInvBufIxCtr;                             /* Nbr tx   ARP pkts with invalid buf ix.                   */
+        NET_CTR  TxPktDisCtr;                               /* Nbr tx   ARP pkts discarded.                             */
+
+
+    #if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+         (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+        NET_CTR  NullPtrCtr;                                /* Nbr null    ARP ptr        accesses.                     */
+    #endif /* NET_ERR_CFG_ARG_CHK_???_EN */
+
+
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  NotUsedCtr;                                /* Nbr unused  ARP cache      accesses.                     */
+
+        NET_CTR  InvTypeCtr;                                /* Nbr invalid ARP cache type accesses.                     */
+
+
+        NET_CTR  RxInvProtocolCtr;                          /* Nbr rx'd ARP pkts with invalid/unsupported protocol.     */
+        NET_CTR  RxInvBufIxCtr;                             /* Nbr rx   ARP pkts with invalid buf ix.                   */
+
+        NET_CTR  TxHdrOpCodeCtr;                            /* Nbr tx   ARP msgs with invalid op code.                  */
+    #endif /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+} NET_CTR_ARP_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         NDP ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_ndp_errs {
+        NET_CTR  NoneAvailCtr;                              /* Nbr unavail NDP cache      accesses.                     */
+        NET_CTR  RouterNoneAvailCtr;                        /* Nbr unavail NDP Router      pool accesses.               */
+        NET_CTR  PrefixNoneAvailCtr;                        /* Nbr unavail NDP Prefix      pool accesses.               */
+        NET_CTR  DestCacheNoneAvailCtr;                     /* Nbr unavail NDP Dest. cache pool accesses.               */
+
+    #if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+         (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+        NET_CTR  InvTypeCtr;                                /* Nbr invalid NDP cache type accesses.                     */
+        NET_CTR  NullPtrCtr;                                /* Nbr null NDP ptr accesses.                               */
+    #endif /* NET_ERR_CFG_ARG_CHK_???_EN */
+
+        NET_CTR  RxNeighborAdvAddrDuplicateCtr;
+        NET_CTR  RxInvalidRouterAdvCtr;
+} NET_CTR_NDP_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         CACHE ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_cache_errs {
+
+        NET_CTR  TxPktDisCtr;
+
+    #if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+    (NET_ERR_CFG_ARG_CHK_DBG_EN      == DEF_ENABLED))
+        NET_CTR  NullPtrCtr;                                /* Nbr null    cache ptr  accesses.                             */
+    #endif /* NET_ERR_CFG_ARG_CHK_???_EN */
+
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  NotUsedCtr;                                /* Nbr unused  cache      accesses.                             */
+    #endif /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+}NET_CTR_CACHE_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         IPv4 ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_ipv4_errs {
+    #if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+         (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+        NET_CTR  NullPtrCtr;                                /* Nbr null IPv4 ptr accesses.                              */
+    #endif /* NET_ERR_CFG_ARG_CHK_???_EN */
+
+
+        NET_CTR  CfgInvAddrHostCtr;                         /* Nbr invalid IPv4 host         addr cfg attempts.         */
+        NET_CTR  CfgInvGatewayCtr;                          /* Nbr invalid IPv4 dflt gateway addr cfg attempts.         */
+        NET_CTR  CfgInvAddrInUseCtr;                        /* Nbr in use  IPv4 host         addr cfg attempts.         */
+
+        NET_CTR  CfgAddrStateCtr;                           /* Nbr invalid IPv4 addr cfg state     accesses.            */
+        NET_CTR  CfgAddrNotFoundCtr;                        /* Nbr invalid IPv4 addr NOT found     accesses.            */
+        NET_CTR  CfgAddrTblSizeCtr;                         /* Nbr invalid IPv4 addr cfg tbl size  accesses.            */
+        NET_CTR  CfgAddrTblEmptyCtr;                        /* Nbr invalid IPv4 addr cfg tbl empty accesses.            */
+        NET_CTR  CfgAddrTblFullCtr;                         /* Nbr invalid IPv4 addr cfg tbl full  accesses.            */
+
+
+
+        NET_CTR  RxPktDisCtr;                               /* Nbr rx'd IPv4 pkts discarded.                            */
+        NET_CTR  RxInvVerCtr;                               /* Nbr rx'd IPv4 datagrams with inv IP ver.                 */
+        NET_CTR  RxInvLenCtr;                               /* Nbr rx'd IPv4 datagrams with inv hdr len.                */
+        NET_CTR  RxInvTotLenCtr;                            /* Nbr rx'd IPv4 datagrams with inv/inconsistent tot len.   */
+        NET_CTR  RxInvFlagsCtr;                             /* Nbr rx'd IPv4 datagrams with inv flags.                  */
+        NET_CTR  RxInvFragCtr;                              /* Nbr rx'd IPv4 datagrams with inv fragmentation.          */
+        NET_CTR  RxInvProtocolCtr;                          /* Nbr rx'd IPv4 datagrams with inv/unsupported protocol.   */
+        NET_CTR  RxInvChkSumCtr;                            /* Nbr rx'd IPv4 datagrams with inv chk sum.                */
+        NET_CTR  RxInvAddrSrcCtr;                           /* Nbr rx'd IPv4 datagrams with inv src addr.               */
+        NET_CTR  RxInvOptsCtr;                              /* Nbr rx'd IPv4 datagrams with unknown/invalid opts.       */
+        NET_CTR  RxOptsBufNoneAvailCtr;                     /* Nbr rx'd IPv4 datagrams with no options buf avail.       */
+        NET_CTR  RxOptsBufWrCtr;                            /* Nbr rx'd IPv4 datagrams with wr options buf err.         */
+        NET_CTR  RxDestCtr;                                 /* Nbr rx'd IPv4 datagrams NOT for this IP dest.            */
+        NET_CTR  RxDestBcastCtr;                            /* Nbr rx'd IPv4 datagrams illegally broadcast to this dest.*/
+        NET_CTR  RxFragSizeCtr;                             /* Nbr rx'd IPv4 frags with invalid size.                   */
+        NET_CTR  RxFragDisCtr;                              /* Nbr rx'd IPv4 frags            discarded.                */
+        NET_CTR  RxFragDgramDisCtr;                         /* Nbr rx'd IPv4 frag'd datagrams discarded.                */
+        NET_CTR  RxFragDgramTimeoutCtr;                     /* Nbr rx'd IPv4 frag'd datagrams timed out.                */
+    #if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  RxInvBufIxCtr;                             /* Nbr rx   IPv4 pkts  with invalid buf ix.                 */
+        NET_CTR  RxInvBufTypeCtr;
+
+        NET_CTR  RxInvDataLenCtr;                           /* Nbr rx'd IPv4 datagrams with invalid data len.           */
+
+        NET_CTR  RxInvFragFlagsCtr;                         /* Nbr rx'd IPv4 frags with invalid flag(s).                */
+        NET_CTR  RxInvFragOffsetCtr;                        /* Nbr rx'd IPv4 frags with invalid offset.                 */
+
+        NET_CTR  RxInvIF_Ctr;
+    #endif /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+
+
+
+        NET_CTR  TxPktDisCtr;                               /* Nbr tx   IPv4 pkts discarded.                            */
+        NET_CTR  TxInvProtocolCtr;                          /* Nbr tx   IPv4 pkts with invalid/unsupported protocol.    */
+        NET_CTR  TxInvOptTypeCtr;                           /* Nbr tx   IPv4 pkts with invalid opt type.                */
+        NET_CTR  TxInvDestCtr;                              /* Nbr tx   IPv4 datagrams with invalid dest addr.          */
+    #if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+         (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+        NET_CTR  TxInvBufIxCtr;                             /* Nbr tx   IPv4 pkts  with invalid buf ix.                 */
+        NET_CTR  TxInvTOS_Ctr;                              /* Nbr tx   IPv4 datagrams with invalid TOS.                */
+        NET_CTR  TxInvTTL_Ctr;                              /* Nbr tx   IPv4 datagrams with invalid TTL.                */
+        NET_CTR  TxInvDataLenCtr;                           /* Nbr tx   IPv4 datagrams with invalid protocol/data len.  */
+        NET_CTR  TxInvAddrSrcCtr;                           /* Nbr tx   IPv4 datagrams with invalid src  addr.          */
+        NET_CTR  TxInvAddrDestCtr;                          /* Nbr tx   IPv4 datagrams with invalid dest addr.          */
+        NET_CTR  TxInvFlagsCtr;                             /* Nbr tx   IPv4 datagrams with invalid flags.              */
+        NET_CTR  TxInvOptLenCtr;                            /* Nbr tx   IPv4 datagrams with invalid opt len.            */
+        NET_CTR  TxInvOptCfgCtr;                            /* Nbr tx   IPv4 datagrams with invalid opt cfg.            */
+    #endif /* NET_ERR_CFG_ARG_CHK_???_EN */
+} NET_CTR_IPv4_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         IPv6 ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_ipv6_errs {
+    #if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+         (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+        NET_CTR  NullPtrCtr;                                /* Nbr null IPv6 ptr accesses.                              */
+    #endif /* NET_ERR_CFG_ARG_CHK_???_EN */
+
+
+        NET_CTR  CfgInvAddrHostCtr;                         /* Nbr invalid IPv6 host         addr cfg attempts.         */
+        NET_CTR  CfgInvAddrInUseCtr;                        /* Nbr in use  IPv6 host         addr cfg attempts.         */
+
+        NET_CTR  CfgAddrStateCtr;                           /* Nbr invalid IPv6 addr cfg state     accesses.            */
+        NET_CTR  CfgAddrNotFoundCtr;                        /* Nbr invalid IPv6 addr NOT found     accesses.            */
+        NET_CTR  CfgAddrTblSizeCtr;                         /* Nbr invalid IPv6 addr cfg tbl size  accesses.            */
+        NET_CTR  CfgAddrTblEmptyCtr;                        /* Nbr invalid IPv6 addr cfg tbl empty accesses.            */
+        NET_CTR  CfgAddrTblFullCtr;                         /* Nbr invalid IPv6 addr cfg tbl full  accesses.            */
+
+
+
+        NET_CTR  RxPktDisCtr;                               /* Nbr rx'd IPv6 pkts discarded.                            */
+        NET_CTR  RxInvVerCtr;                               /* Nbr rx'd IPv6 datagrams with inv IP ver.                 */
+        NET_CTR  RxInvTrafficClassCtr;                      /* Nbr rx'd IPv6 datagrams with inv traffic class.          */
+        NET_CTR  RxInvFlowLabelCtr;                         /* Nbr rx'd IPv6 datagrams with inv flow label.             */
+        NET_CTR  RxInvLenCtr;                               /* Nbr rx'd IPv6 datagrams with inv hdr len.                */
+        NET_CTR  RxInvTotLenCtr;                            /* Nbr rx'd IPv6 datagrams with inv/inconsistent tot len.   */
+        NET_CTR  RxInvProtocolCtr;                          /* Nbr rx'd IPv6 datagrams with inv/unsupported protocol.   */
+        NET_CTR  RxInvAddrSrcCtr;                           /* Nbr rx'd IPv6 datagrams with inv src addr.               */
+        NET_CTR  RxInvOptsCtr;                              /* Nbr rx'd IPv6 datagrams with unknown/invalid opts.       */
+        NET_CTR  RxInvDestCtr;                              /* Nbr rx'd IPv6 datagrams NOT for this IP dest.            */
+        NET_CTR  RxFragSizeCtr;                             /* Nbr rx'd IPv6 frags with invalid size.                   */
+        NET_CTR  RxFragDisCtr;                              /* Nbr rx'd IPv6 frags            discarded.                */
+        NET_CTR  RxFragDgramDisCtr;                         /* Nbr rx'd IPv6 frag'd datagrams discarded.                */
+        NET_CTR  RxFragDgramTimeoutCtr;                     /* Nbr rx'd IPv6 frag'd datagrams timed out.                */
+    #if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+         (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+        NET_CTR  RxInvBufIxCtr;                             /* Nbr rx   IPv6 pkts  with invalid buf ix.                 */
+        NET_CTR  RxInvDataLenCtr;                           /* Nbr rx'd IPv6 datagrams with invalid data len.           */
+        NET_CTR  RxInvFragOffsetCtr;                        /* Nbr rx'd IPv6 frags with invalid offset.                 */
+        NET_CTR  RxInvIF_Ctr;
+    #endif  /* NET_ERR_CFG_ARG_CHK_???_EN */
+
+
+
+        NET_CTR  TxPktDisCtr;                               /* Nbr tx   IPv6 pkts discarded.                            */
+        NET_CTR  TxInvProtocolCtr;                          /* Nbr tx   IPv6 pkts with invalid/unsupported protocol.    */
+    #if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  TxInvBufIxCtr;                             /* Nbr tx   IPv6 pkts  with invalid buf ix.                 */
+        NET_CTR  TxInvTTL_Ctr;                              /* Nbr tx   IPv6 datagrams with invalid TTL.                */
+        NET_CTR  TxInvDataLenCtr;                           /* Nbr tx   IPv6 datagrams with invalid protocol/data len.  */
+    #endif /* NET_ERR_CFG_ARG_CHK_DBG_EN */
+        NET_CTR  TxInvAddrSrcCtr;                           /* Nbr tx   IPv6 datagrams with invalid src  addr.          */
+
+        NET_CTR  AddrStaticCfgFaultCtr;                     /* Nbr of Static Address Cfg that failed.                   */
+        NET_CTR  AddrAutoCfgFaultCtrl;                      /* Nbr of Auto-Cfg Address that failed.                     */
+} NET_CTR_IPv6_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         ICMPv4 ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_icmpv4_errs {
+        NET_CTR  RxPktDiscardedCtr;                         /* Nbr rx'd ICMPv4 pkts discarded.                          */
+        NET_CTR  RxInvTypeCtr;                              /* Nbr rx'd ICMPv4 msgs with unknown/invalid      msg type. */
+        NET_CTR  RxInvCodeCtr;                              /* Nbr rx'd ICMPv4 msgs with unknown/invalid      msg code. */
+        NET_CTR  RxInvMsgLenCtr;                            /* Nbr rx'd ICMPv4 msgs with invalid/inconsistent msg len.  */
+        NET_CTR  RxInvPtrCtr;                               /* Nbr rx'd ICMPv4 msgs with invalid              msg ptr.  */
+        NET_CTR  RxInvChkSumCtr;                            /* Nbr rx'd ICMPv4 msgs with invalid chk sum.               */
+        NET_CTR  RxBcastCtr;                                /* Nbr rx'd ICMPv4 msg  reqs rx'd via broadcast.            */
+        NET_CTR  RxMcastCtr;                                /* Nbr rx'd ICMPv4 msg  reqs rx'd via multicast.            */
+
+
+
+        NET_CTR  TxInvalidLenCtr;                           /* Nbr tx   ICMPv4 pkts discarded for invalid len.          */
+        NET_CTR  TxHdrTypeCtr;                              /* Nbr tx   ICMPv4 msgs with unknown/invalid msg type.      */
+        NET_CTR  TxHdrCodeCtr;                              /* Nbr tx   ICMPv4 msgs with unknown/invalid msg code.      */
+        NET_CTR  TxPktDiscardedCtr;                         /* Nbr tx   ICMPv4 pkts discarded.                          */
+
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  NullPtrCtr;                                /* Nbr null    ICMPv4 ptr                      accesses.    */
+        NET_CTR  NotUsedCtr;                                /* Nbr unused  ICMPv4 tx src quench entry      accesses.    */
+        NET_CTR  InvalidTypeCtr;                            /* Nbr invalid ICMPv4 tx src quench entry type accesses.    */
+
+        NET_CTR  RxInvalidProtocolCtr;                      /* Nbr rx'd ICMPv4 pkts with invalid/unsupported protocol.  */
+        NET_CTR  RxInvalidBufIxCtr;                         /* Nbr rx   ICMPv4 pkts with invalid buf ix.                */
+        NET_CTR  RxHdrDataLenCtr;                           /* Nbr rx'd ICMPv4 msgs with invalid msg data len.          */
+
+
+        NET_CTR  TxInvalidBufIxCtr;                         /* Nbr tx   ICMPv4 pkts with invalid buf ix.                */
+        NET_CTR  TxHdrPtrCtr;                               /* Nbr tx   ICMPv4 msgs with invalid msg ptr.               */
+    #endif
+} NET_CTR_ICMPv4_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         ICMPv6 ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_icmp_v6 {
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  NullPtrCtr;                                /* Nbr null    ICMPv6 ptr                      accesses.    */
+    #endif
+
+        NET_CTR  RxHdrTypeCtr;                              /* Nbr rx'd ICMPv6 msgs with unknown/invalid      msg type. */
+        NET_CTR  RxHdrCodeCtr;                              /* Nbr rx'd ICMPv6 msgs with unknown/invalid      msg code. */
+        NET_CTR  RxHdrMsgLenCtr;                            /* Nbr rx'd ICMPv6 msgs with invalid/inconsistent msg len.  */
+        NET_CTR  RxHdrPtrCtr;                               /* Nbr rx'd ICMPv6 msgs with invalid              msg ptr.  */
+        NET_CTR  RxHdrChkSumCtr;                            /* Nbr rx'd ICMPv6 msgs with invalid chk sum.               */
+
+        NET_CTR  RxMcastCtr;                                /* Nbr rx'd ICMPv6 msg  reqs rx'd via multicast.            */
+        NET_CTR  RxPktDiscardedCtr;                         /* Nbr rx'd ICMPv6 pkts discarded.                          */
+        NET_CTR  RxInvalidProtocolCtr;                      /* Nbr rx'd ICMPv6 pkts with invalid/unsupported protocol.  */
+        NET_CTR  RxInvalidBufIxCtr;                         /* Nbr rx   ICMPv6 pkts with invalid buf ix.                */
+        NET_CTR  RxHdrDataLenCtr;                           /* Nbr rx'd ICMPv6 msgs with invalid msg data len.          */
+
+        NET_CTR  TxInvalidLenCtr;                           /* Nbr tx   ICMPv6 pkts discarded for invalid len.          */
+        NET_CTR  TxHdrTypeCtr;                              /* Nbr tx   ICMPv6 msgs with unknown/invalid msg type.      */
+        NET_CTR  TxHdrCodeCtr;                              /* Nbr tx   ICMPv6 msgs with unknown/invalid msg code.      */
+        NET_CTR  TxPktDiscardedCtr;                         /* Nbr tx   ICMPv6 pkts discarded.                          */
+        NET_CTR  TxInvalidBufIxCtr;                         /* Nbr tx   ICMPv6 pkts with invalid buf ix.                */
+        NET_CTR  TxHdrPtrCtr;                               /* Nbr tx   ICMPv6 msgs with invalid msg ptr.               */
+} NET_CTR_ICMPv6_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         IGMP ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_igmp_errs {
+        NET_CTR  NoneAvailCtr;                              /* Nbr unavail IGMP host group accesses.                    */
+
+        NET_CTR  RxHdrTypeCtr;                              /* Nbr rx'd IGMP msgs with unknown/invalid msg type.        */
+        NET_CTR  RxHdrVerCtr;                               /* Nbr rx'd IGMP msgs with invalid IGMP ver.                */
+        NET_CTR  RxHdrMsgLenCtr;                            /* Nbr rx'd IGMP msgs with invalid msg len.                 */
+        NET_CTR  RxHdrChkSumCtr;                            /* Nbr rx'd IGMP msgs with invalid chk sum.                 */
+        NET_CTR  RxPktInvalidAddrDestCtr;                   /* Nbr rx'd IGMP msgs with invalid dest addr.               */
+        NET_CTR  RxPktDiscardedCtr;                         /* Nbr rx'd IGMP pkts discarded.                            */
+
+        NET_CTR  TxInvalidBufIxCtr;                         /* Nbr rx   IGMP pkts with invalid buf ix.                  */
+        NET_CTR  TxPktDiscardedCtr;                         /* Nbr tx   IGMP pkts discarded.                            */
+
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  NullPtrCtr;                                /* Nbr null    IGMP ptr           accesses.                 */
+        NET_CTR  InvalidTypeCtr;                            /* Nbr invalid IGMP host grp type accesses.                 */
+
+        NET_CTR  RxInvalidProtocolCtr;                      /* Nbr rx'd IGMP pkts with invalid/unsupported protocol.    */
+        NET_CTR  RxInvalidBufIxCtr;                         /* Nbr rx   IGMP pkts with invalid buf ix.                  */
+    #endif
+} NET_CTR_IGMP_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         MLDP ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_mldp_errs {
+        NET_CTR  NoneAvailCtr;                              /* Nbr unavail MLDP host group accesses.                    */
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+        NET_CTR  NullPtrCtr;                                /* Nbr null    MLDP ptr           accesses.                 */
+    #endif
+
+        NET_CTR  TxPktDisCtr;                               /* Nbr tx      MLDP pkts discarded.                         */
+} NET_CTR_MLDP_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         UDP ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_udp_errs {
+        NET_CTR  NullPtrCtr;                                /* Nbr null UDP ptr accesses.                               */
+        NET_CTR  InvalidFlagsCtr;                           /* Nbr reqs           for  invalid UDP flags.               */
+
+
+        NET_CTR  RxHdrDatagramLenCtr;                       /* Nbr rx'd UDP datagrams with invalid len.                 */
+        NET_CTR  RxHdrPortSrcCtr;                           /* Nbr rx'd UDP datagrams with invalid src  port.           */
+        NET_CTR  RxHdrPortDestCtr;                          /* Nbr rx'd UDP datagrams with invalid dest port.           */
+        NET_CTR  RxHdrChkSumCtr;                            /* Nbr rx'd UDP datagrams with invalid chk sum.             */
+        NET_CTR  RxDestCtr;                                 /* Nbr rx'd UDP datagrams for  unavail dest.                */
+        NET_CTR  RxPktDiscardedCtr;                         /* Nbr rx'd UDP pkts discarded.                             */
+
+
+        NET_CTR  TxPktDiscardedCtr;                         /* Nbr tx   UDP pkts discarded.                             */
+    #if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+        (NET_ERR_CFG_ARG_CHK_DBG_EN  == DEF_ENABLED))
+        NET_CTR  TxInvalidSizeCtr;                          /* Nbr tx   UDP reqs      with invalid data size.           */
+    #endif
+
+
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  RxInvalidProtocolCtr;                      /* Nbr rx'd UDP pkts      with invalid/unsupported protocol.*/
+        NET_CTR  RxInvalidBufIxCtr;                         /* Nbr rx   UDP pkts      with invalid buf ix.              */
+        NET_CTR  RxHdrDataLenCtr;                           /* Nbr rx'd UDP datagrams with invalid data len.            */
+
+        NET_CTR  TxInvalidProtocolCtr;                      /* Nbr tx   UDP pkts      with invalid/unsupported protocol.*/
+        NET_CTR  TxInvalidBufIxCtr;                         /* Nbr tx   UDP pkts      with invalid buf ix.              */
+        NET_CTR  TxHdrDataLenCtr;                           /* Nbr tx   UDP datagrams with invalid protocol/data len.   */
+        NET_CTR  TxHdrPortSrcCtr;                           /* Nbr tx   UDP datagrams with invalid src  port.           */
+        NET_CTR  TxHdrPortDestCtr;                          /* Nbr tx   UDP datagrams with invalid dest port.           */
+        NET_CTR  TxHdrFlagsCtr;                             /* Nbr tx   UDP datagrams with invalid flags.               */
+    #endif
+} NET_CTR_UDP_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         TCP ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct net_ctr_tcp_errs {
+        NET_CTR  NullPtrCtr;                                    /* Nbr null    TCP conn ptr  accesses.                  */
+
+        NET_CTR  NoneAvailCtr;                                  /* Nbr unavail TCP conn      accesses.                  */
+        NET_CTR  NotUsedCtr;                                    /* Nbr unused  TCP conn      accesses.                  */
+
+
+        NET_CTR  RxHdrLenCtr;                                   /* Nbr rx'd TCP segs with invalid hdr len.              */
+        NET_CTR  RxHdrSegLenCtr;                                /* Nbr rx'd TCP segs with invalid seg len.              */
+        NET_CTR  RxHdrPortSrcCtr;                               /* Nbr rx'd TCP segs with invalid src  port.            */
+        NET_CTR  RxHdrPortDestCtr;                              /* Nbr rx'd TCP segs with invalid dest port.            */
+        NET_CTR  RxHdrFlagsCtr;                                 /* Nbr rx'd TCP segs with invalid flags.                */
+        NET_CTR  RxHdrChkSumCtr;                                /* Nbr rx'd TCP segs with invalid chk sum.              */
+        NET_CTR  RxHdrOptsCtr;                                  /* Nbr rx'd TCP segs with unknown/invalid opts.         */
+        NET_CTR  RxDestCtr;                                     /* Nbr rx'd TCP segs for  unavail dest.                 */
+        NET_CTR  RxPktDiscardedCtr;                             /* Nbr rx'd TCP pkts discarded.                         */
+
+        NET_CTR  RxPktQ_FullCtr;                                /* Nbr of pkt received with a zero window               */
+
+        NET_CTR  TxOptTypeCtr;                                  /* Nbr tx   TCP pkts with invalid opt type.             */
+        NET_CTR  TxPktDiscardedCtr;                             /* Nbr tx   TCP pkts discarded.                         */
+
+        NET_CTR  ConnInvalidCtr;                                /* Nbr invalid TCP conn ID   accesses.                  */
+        NET_CTR  ConnInvalidOpCtr;                              /* Nbr invalid TCP conn ops.                            */
+        NET_CTR  ConnInvalidStateCtr;                           /* Nbr invalid TCP conn states.                         */
+        NET_CTR  ConnCloseCtr;                                  /* Nbr fault   TCP conn closes.                         */
+
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR  RxInvalidProtocolCtr;                          /* Nbr rx'd TCP pkts with invalid/unsupported protocol. */
+        NET_CTR  RxInvalidBufIxCtr;                             /* Nbr rx   TCP pkts with invalid buf ix.               */
+        NET_CTR  RxHdrDataLenCtr;                               /* Nbr rx'd TCP segs with invalid data len.             */
+
+        NET_CTR  TxInvalidProtocolCtr;                          /* Nbr tx   TCP pkts with invalid/unsupported protocol. */
+        NET_CTR  TxInvalidSizeCtr;                              /* Nbr tx   TCP reqs with invalid data size.            */
+        NET_CTR  TxInvalidBufIxCtr;                             /* Nbr tx   TCP pkts with invalid buf ix.               */
+        NET_CTR  TxHdrDataLenCtr;                               /* Nbr tx   TCP segs with invalid protocol/data len.    */
+        NET_CTR  TxHdrPortSrcCtr;                               /* Nbr tx   TCP segs with invalid src  port.            */
+        NET_CTR  TxHdrPortDestCtr;                              /* Nbr tx   TCP segs with invalid dest port.            */
+        NET_CTR  TxHdrFlagsCtr;                                 /* Nbr tx   TCP segs with invalid flags.                */
+        NET_CTR  TxHdrOptLenCtr;                                /* Nbr tx   TCP segs with invalid opt len.              */
+        NET_CTR  TxHdrOptCfgCtr;                                /* Nbr tx   TCP segs with invalid opt cfg.              */
+
+        NET_CTR  ConnInvalidTypeCtr;                            /* Nbr invalid TCP conn type accesses.                  */
+    #endif
+} NET_CTR_TCP_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                         SOCKET ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+typedef  struct  net_ctr_sock_errs {
+            NET_CTR  NullPtrCtr;                            /* Nbr null    sock ptr  accesses.                          */
+            NET_CTR  NullSizeCtr;
+            NET_CTR  NoneAvailCtr;                          /* Nbr unavail sock      accesses.                          */
+            NET_CTR  NotUsedCtr;                            /* Nbr unused  sock      accesses.                          */
+            NET_CTR  CloseCtr;                              /* Nbr fault   sock closes.                                 */
+
+
+            NET_CTR  InvalidFamilyCtr;                      /* Nbr socks with invalid sock family.                      */
+            NET_CTR  InvalidProtocolCtr;                    /* Nbr socks with invalid sock protocol.                    */
+            NET_CTR  InvalidSockTypeCtr;                    /* Nbr socks with invalid sock type.                        */
+            NET_CTR  InvalidSockCtr;                        /* Nbr            invalid sock ID accesses.                 */
+            NET_CTR  InvalidFlagsCtr;                       /* Nbr socks with invalid flags.                            */
+            NET_CTR  InvalidOpCtr;                          /* Nbr socks with invalid op.                               */
+            NET_CTR  InvalidStateCtr;                       /* Nbr socks with invalid state.                            */
+            NET_CTR  InvalidAddrCtr;                        /* Nbr socks with invalid addr.                             */
+            NET_CTR  InvalidAddrLenCtr;                     /* Nbr socks with invalid addr len.                         */
+            NET_CTR  InvalidAddrInUseCtr;                   /* Nbr socks with         addr already in use.              */
+            NET_CTR  InvalidPortNbrCtr;                     /* Nbr socks with invalid port nbr.                         */
+            NET_CTR  InvalidConnInUseCtr;                   /* Nbr socks with         conn already in use.              */
+
+
+    #ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+            NET_CTR  ConnAcceptQ_NoneAvailCtr;              /* Nbr unavail sock accept Q conn   accesses.               */
+    #endif
+            NET_CTR  RandomPortNbrNoneAvailCtr;             /* Nbr unavail sock random port nbr accesses.               */
+
+
+            NET_CTR  RxDestCtr;                             /* Nbr rx'd sock pkts for unavail dest.                     */
+            NET_CTR  RxPktDiscardedCtr;                     /* Nbr rx'd sock pkts discarded.                            */
+
+
+    #if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+         (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+            NET_CTR  TxInvalidSizeCtr;                      /* Nbr tx   sock reqs with invalid data size.               */
+    #endif
+
+
+    #if  (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+            NET_CTR  InvalidTypeCtr;                        /* Nbr invalid sock type accesses.                          */
+            NET_CTR  InvalidConnCtr;
+
+            NET_CTR  RxInvalidProtocolCtr;                  /* Nbr rx'd sock pkts with invalid/unsupported protocol.    */
+            NET_CTR  RxInvalidBufIxCtr;                     /* Nbr rx   sock pkts with invalid buf ix.                  */
+
+        #ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+            NET_CTR  ConnAcceptQ_MaxCtr;
+        #endif
+
+            NET_CTR  RandomPortNbrQ_UsedCtr;
+            NET_CTR  RandomPortNbrQ_NbrInQ_Ctr;
+    #endif
+
+} NET_CTR_SOCK_ERRS;
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                           ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+typedef  struct  net_ctr_errs {
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR_STATS_ERRS    Stat;
+#endif
+        NET_CTR_TMR_ERRS      Tmr;
+        NET_CTR_BUF_ERRS      Buf;
+        NET_CTR_CONN_ERRS     Conn;
+        NET_CTR_IFs_ERRS      IFs;
+
+    #ifdef  NET_ARP_MODULE_EN
+        NET_CTR_ARP_ERRS      ARP;
+    #endif
+
+    #ifdef  NET_NDP_MODULE_EN
+        NET_CTR_NDP_ERRS      NDP;
+    #endif
+
+    #ifdef  NET_CACHE_MODULE_EN
+        NET_CTR_CACHE_ERRS    Cache;
+    #endif
+
+    #ifdef  NET_IPv4_MODULE_EN
+        NET_CTR_IPv4_ERRS     IPv4;
+    #endif
+
+    #ifdef  NET_IPv6_MODULE_EN
+        NET_CTR_IPv6_ERRS     IPv6;
+    #endif
+
+    #ifdef  NET_ICMPv4_MODULE_EN
+        NET_CTR_ICMPv4_ERRS   ICMPv4;
+    #endif
+
+    #ifdef  NET_ICMPv6_MODULE_EN
+        NET_CTR_ICMPv6_ERRS   ICMPv6;
+    #endif
+
+
+    #ifdef  NET_IGMP_MODULE_EN
+        NET_CTR_IGMP_ERRS     IGMP;
+    #endif
+
+    #ifdef  NET_MLDP_MODULE_EN
+        NET_CTR_MLDP_ERRS     MLDP;
+    #endif
+
+        NET_CTR_UDP_ERRS      UDP;
+
+    #ifdef  NET_TCP_MODULE_EN
+        NET_CTR_TCP_ERRS      TCP;
+    #endif
+
+
+        NET_CTR_SOCK_ERRS     Sock;
+} NET_CTR_ERRS;
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                           STATISTIC COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+extern  NET_CTR_STATS  Net_StatCtrs;
+#endif
+
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                           ERROR COUNTERS
+*--------------------------------------------------------------------------------------------------------
+*/
+
+#if (NET_CTR_CFG_ERR_EN  == DEF_ENABLED)
+extern  NET_CTR_ERRS   Net_ErrCtrs;
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       NETWORK COUNTER MACRO'S
+*
+* Description : Handle network counter(s).
+*
+* Argument(s) : Various network counter variable(s) & values.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               These macro's are INTERNAL network protocol suite macro's & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network counter variables MUST ALWAYS be accessed exclusively in critical sections.
+*
+*                   Therefore, local variable 'cpu_sr' MUST be declared via the CPU_SR_ALLOC() macro
+*                   in the following functions in case the CPU critical section method is configured
+*                   as 'CPU_CRITICAL_METHOD_STATUS_LOCAL' :
+*
+*                   (a) NetCtr_Inc()
+*                   (b) ALL functions which call NET_CTR_&&&_INC_LARGE() macro's
+*********************************************************************************************************
+*/
+
+#define  NET_CTR_INC(ctr)                                       NetCtr_Inc(&(ctr));
+
+#define  NET_CTR_INC_LARGE(ctr_hi, ctr_lo)                do {  CPU_CRITICAL_ENTER();       \
+                                                                NetCtr_IncLarge(&(ctr_hi),  \
+                                                                                &(ctr_lo)); \
+                                                                CPU_CRITICAL_EXIT();        } while (0)
+
+
+#define  NET_CTR_ADD(ctr, val)                            do { (ctr) += (val); } while (0)
+
+
+
+#if     (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
+    #define  NET_CTR_STAT_INC(stat_ctr)                             NET_CTR_INC(stat_ctr)
+    #define  NET_CTR_STAT_INC_LARGE(stat_ctr_hi, stat_ctr_lo)       NET_CTR_INC_LARGE(stat_ctr_hi, stat_ctr_lo)
+
+    #define  NET_CTR_STAT_ADD(stat_ctr, val)                        NET_CTR_ADD(stat_ctr, val)
+
+#else
+    #define  NET_CTR_STAT_INC(stat_ctr)
+    #define  NET_CTR_STAT_INC_LARGE(stat_ctr_hi, stat_ctr_lo)
+
+    #define  NET_CTR_STAT_ADD(stat_ctr, val)
+
+#endif
+
+
+#if     (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+
+    #define  NET_CTR_ERR_INC(err_ctr)                               NET_CTR_INC(err_ctr)
+    #define  NET_CTR_ERR_INC_LARGE(err_ctr_hi, err_ctr_lo)          NET_CTR_INC_LARGE(err_ctr_hi,  err_ctr_lo)
+
+#else
+
+    #define  NET_CTR_ERR_INC(err_ctr)
+    #define  NET_CTR_ERR_INC_LARGE(err_ctr_hi, err_ctr_lo)
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void        NetCtr_Init        (void);
+
+
+                                                                        /* -------------- CTR API FNCTS --------------- */
+#ifdef NET_CTR_MODULE_EN
+void        NetCtr_Inc         (NET_CTR  *pctr);
+
+void        NetCtr_IncLarge    (NET_CTR  *pctr_hi,
+                                NET_CTR  *pctr_lo);
+#endif
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* NET_CTR_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_def.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_def.h
new file mode 100644
index 0000000..dc6b48b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_def.h
@@ -0,0 +1,681 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           NETWORK DEFINES
+*
+* Filename      : net_def.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DEF_MODULE_PRESENT
+#define  NET_DEF_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           NETWORK DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+#define  NET_FLAG_NONE                                   DEF_BIT_NONE
+
+#define  NET_TS_NONE                                       0u
+
+
+
+#define  NET_TIMEOUT_MIN_SEC                          DEF_INT_32U_MIN_VAL
+#define  NET_TIMEOUT_MIN_mS                           DEF_INT_32U_MIN_VAL
+#define  NET_TIMEOUT_MIN_uS                           DEF_INT_32U_MIN_VAL
+
+#define  NET_TIMEOUT_MAX_SEC                          DEF_INT_32U_MAX_VAL
+#define  NET_TIMEOUT_MAX_mS                           DEF_INT_32U_MAX_VAL
+#define  NET_TIMEOUT_MAX_uS                           DEF_INT_32U_MAX_VAL
+
+/*
+*********************************************************************************************************
+*                                    NETWORK PROTOCOL TYPE DEFINES
+*
+* Note(s) : (1) See 'net.h  Note #2'.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                NETWORK MODULE & LAYER GLOBAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*
+* Note(s) : (1) These module & layer global #define's are required PRIOR to network configuration.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   NETWORK INTERFACE LAYER DEFINES
+*
+* Note(s) : (1) See specific 'net_if_&&&.h  NETWORK INTERFACE HEADER DEFINES'.
+*********************************************************************************************************
+*/
+
+#define  NET_IF_NBR_IF_RESERVED               1
+#define  NET_IF_NBR_IF_TOT                 (NET_IF_CFG_MAX_NBR_IF + NET_IF_NBR_IF_RESERVED)
+
+
+#define  NET_IF_NONE_HW_ADD_LEN                            0
+#define  NET_IF_802x_HW_ADDR_LEN                           6
+
+                                                                /* See Note #1.                                         */
+#define  NET_IF_HDR_SIZE_LOOPBACK                         NET_IF_NONE_HW_ADD_LEN
+#define  NET_IF_HDR_SIZE_ETHER                            14
+
+
+#define  NET_IF_HW_ADDR_LEN_MAX                           NET_IF_802x_HW_ADDR_LEN
+
+
+#define  NET_IF_LOOPBACK_SIZE_MIN                          0
+
+
+/*
+*********************************************************************************************************
+*                                       CACHE MGR LAYER DEFINES
+*
+* Note(s) : (1) See 'net_cache.h  ARP HARDWARE & PROTOCOL DEFINES  Note #1'.
+*********************************************************************************************************
+*/
+
+#define  NET_CACHE_HW_ADDR_LEN_ETHER                       6
+
+
+
+/*
+*********************************************************************************************************
+*                                          ARP LAYER DEFINES
+*
+* Note(s) : (1) See 'net_arp.h  ARP HARDWARE & PROTOCOL DEFINES  Note #1'.
+*********************************************************************************************************
+*/
+
+#define  NET_ARP_HDR_SIZE_MIN                             12
+#define  NET_ARP_HDR_SIZE_MAX                             68
+#define  NET_ARP_HDR_SIZE_BASE                             8
+                                                                /* See Note #1a.                                        */
+#define  NET_ARP_HDR_SIZE                               (NET_ARP_HDR_SIZE_BASE        + \
+                                                        (NET_IF_HW_ADDR_LEN_MAX  * 2) + \
+                                                        (NET_IPv4_ADDR_SIZE      * 2))
+
+
+/*
+*********************************************************************************************************
+*                                          IP LAYER DEFINES
+*
+* Note(s) : (1) See 'net_ip.h  IP MULTICAST SELECT DEFINES  Note #1'.
+*********************************************************************************************************
+*/
+                                                                /* ------------------ IP VERSION SEL ------------------ */
+                                                                /* See Note #1.                                         */
+#define  NET_IP_VER_SEL_IPv4                               0u
+#define  NET_IP_VER_SEL_IPv6                               1u
+#define  NET_IP_VER_SEL_IPv4_IPv6                          2u
+
+
+                                                                /* ----------------- IP MULTICAST SEL ----------------- */
+                                                                /* See Note #2.                                         */
+#define  NET_IGMP_MCAST_SEL_NONE                         0u
+#define  NET_IGMP_MCAST_SEL_TX                           1u
+#define  NET_IGMP_MCAST_SEL_TX_RX                        2u
+
+
+
+#define  NET_IP_HW_ADDR_LEN                                NET_IF_HW_ADDR_LEN_MAX
+
+
+/*
+*********************************************************************************************************
+*                                         IPv4 LAYER DEFINES
+*
+* Note(s) : (1) See 'net_ipv4.h  IPv4 MULTICAST SELECT DEFINES  Note #1'.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv4_HDR_LEN_MIN                              5
+#define  NET_IPv4_HDR_LEN_MAX                             15
+#define  NET_IPv4_HDR_LEN_WORD_SIZE                      CPU_WORD_SIZE_32
+
+#define  NET_IPv4_HDR_SIZE_MIN                          (NET_IPv4_HDR_LEN_MIN * NET_IPv4_HDR_LEN_WORD_SIZE)
+
+#define  NET_IPv4_HDR_SIZE_MAX                            60    /* See 'net_ipv4.h  IPv4 HEADER DEFINES  Note #1'.      */
+
+
+/*
+*********************************************************************************************************
+*                                         IPv6 LAYER DEFINES
+*
+* Note(s) : (1) See 'net_ipv6.h  IPv6 MULTICAST SELECT DEFINES  Note #1'.
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_HDR_SIZE_MAX                            40    /* See 'net_ipv6.h  IPv6 HEADER DEFINES  Note #1'.      */
+
+#define  NET_IPv6_CFG_MLDP_VER_V1                         1u
+#define  NET_IPv6_CFG_MLDP_VER_V2                         2u
+
+
+#define  NET_IPv6_HDR_SIZE                               40u
+
+
+/*
+*********************************************************************************************************
+*                                       TRANSPORT LAYER DEFINES
+*
+* Note(s) : (1) The following transport layer values are pre-#define'd in 'net_type.h' (see 'net_type.h
+*               NETWORK TRANSPORT LAYER PORT NUMBER DATA TYPE  Note #1') :
+*
+*               (a) NET_PORT_NBR_MAX                     DEF_INT_16U_MAX_VAL
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ NET PORT NBRS ------------------- */
+#define  NET_PORT_NBR_RESERVED                             0u
+#define  NET_PORT_NBR_NONE                               NET_PORT_NBR_RESERVED
+
+#define  NET_PORT_NBR_MIN                                  1u
+#if 0                                                           /* See Note #1a.                                        */
+#define  NET_PORT_NBR_MAX                                DEF_INT_16U_MAX_VAL
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          UDP LAYER DEFINES
+*
+* Note(s) : (1) See 'net_udp.h  UDP APPLICATION-PROTOCOL-INTERFACE SELECT DEFINES  Note #1'.
+*********************************************************************************************************
+*/
+
+#define  NET_UDP_HDR_SIZE_MIN                              8    /* See 'net_udp.h  UDP HEADER DEFINES  Note #1a'.       */
+#define  NET_UDP_HDR_SIZE_MAX                              8    /* See 'net_udp.h  UDP HEADER DEFINES  Note #1b'.       */
+
+#define  NET_UDP_HDR_SIZE                                  8
+
+                                                                /* ----------------- UDP/APP API SEL ------------------ */
+                                                                /* See Note #1.                                         */
+#define  NET_UDP_APP_API_SEL_NONE                          0u
+#define  NET_UDP_APP_API_SEL_SOCK                          1u
+#define  NET_UDP_APP_API_SEL_APP                           2u
+#define  NET_UDP_APP_API_SEL_SOCK_APP                      3u
+
+
+/*
+*********************************************************************************************************
+*                                          IGMP LAYER DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_IGMP_HDR_SIZE                                 8
+#define  NET_IGMP_MSG_SIZE_MIN             NET_IGMP_HDR_SIZE    /* See Note #1.                                         */
+
+
+
+/*
+*********************************************************************************************************
+*                                          TCP LAYER DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_HDR_LEN_MIN                               5u
+#define  NET_TCP_HDR_LEN_MAX                              15
+#define  NET_TCP_HDR_LEN_WORD_SIZE                       CPU_WORD_SIZE_32
+
+#define  NET_TCP_HDR_SIZE_MIN                           (NET_TCP_HDR_LEN_MIN * NET_TCP_HDR_LEN_WORD_SIZE)
+#define  NET_TCP_HDR_SIZE_MAX                             60    /* See 'net_tcp.h  TCP HEADER DEFINES  Note #1'.        */
+
+
+/*
+*********************************************************************************************************
+*                                BSD 4.x & NETWORK SOCKET LAYER DEFINES
+*
+* Note(s) : (1) (a) See 'net_sock.h  NETWORK SOCKET FAMILY & PROTOCOL DEFINES  Note #1' &
+*                       'net_sock.h  NETWORK SOCKET ADDRESS DEFINES'.
+*
+*               (b) See 'net_sock.h  NETWORK SOCKET BLOCKING MODE SELECT DEFINES  Note #1'.
+*
+*           (2) Ideally, AF_&&& constants SHOULD be defined as unsigned constants since AF_&&& constants
+*               are used with the unsigned socket address family data type (see 'net_bsd.h  BSD 4.x SOCKET
+*               DATA TYPES  Note #2a1A').  However, since PF_&&& constants are typically defined to their
+*               equivalent AF_&&& constants BUT PF_&&& constants are used with the signed socket protocol
+*               family data types; AF_&&& constants are defined as signed constants.
+*
+*           (3) 'NET_SOCK_PROTOCOL_MAX' abbreviated to 'NET_SOCK_PROTO_MAX' to enforce ANSI-compliance of
+*                31-character symbol length uniqueness.
+*********************************************************************************************************
+*/
+
+
+#define  NET_SOCK_ADDR_LEN_IP_V4        6u                      /* TCP/IPv6 sock addr len =                             */
+                                                                /*             2-octet TCP/UDP port val                 */
+                                                                /*             4-octet IP      addr val                 */
+
+
+#define  NET_SOCK_ADDR_LEN_IP_V6       26u                      /* TCP/IPv6 sock addr len =                             */
+                                                                /*             2-octet TCP/UDP port val                 */
+                                                                /*             4-octet Flow Label   val                 */
+                                                                /*            16-octet IP      addr val                 */
+                                                                /*             4-octet Scope ID     val                 */
+
+
+                                                                /* ------------------- TCP/IP SOCKS ------------------- */
+                                                                /* See Note #2.                                         */
+#ifdef   AF_INET
+#undef   AF_INET
+#endif
+#define  AF_INET                                           2
+
+#ifdef   PF_INET
+#undef   PF_INET
+#endif
+#define  PF_INET                                     AF_INET
+
+
+
+
+                                                                /* ------------------ TCP/IPv6 SOCKS ------------------ */
+#ifdef   AF_INET6
+#undef   AF_INET6
+#endif
+#define  AF_INET6                                          6
+
+#ifdef   PF_INET6
+#undef   PF_INET6
+#endif
+#define  PF_INET6                                    AF_INET6
+
+
+
+                                                                /* ------------------ SOCK BLOCK SEL ------------------ */
+#define  NET_SOCK_BLOCK_SEL_NONE                           0u
+#define  NET_SOCK_BLOCK_SEL_DFLT                           1u   /* Sock ops block by dflt (see Note #1b).               */
+#define  NET_SOCK_BLOCK_SEL_BLOCK                          2u
+#define  NET_SOCK_BLOCK_SEL_NO_BLOCK                       3u
+
+
+
+                                                                /* -------------------- SOCK TYPES -------------------- */
+#ifdef   SOCK_STREAM
+#undef   SOCK_STREAM
+#endif
+#define  SOCK_STREAM                                       1
+
+#ifdef   SOCK_DGRAM
+#undef   SOCK_DGRAM
+#endif
+#define  SOCK_DGRAM                                        2
+
+
+                                                                /* -------------- TCP/IP SOCK PROTOCOLS --------------- */
+#ifdef   IPPROTO_TCP
+#undef   IPPROTO_TCP
+#endif
+#define  IPPROTO_TCP                                       6    /*  = NET_IPv4_HDR_PROTOCOL_TCP                         */
+
+#ifdef   IPPROTO_UDP
+#undef   IPPROTO_UDP
+#endif
+#define  IPPROTO_UDP                                      17    /*  = NET_IPv4_HDR_PROTOCOL_UDP                         */
+
+#ifdef   IPPROTO_IP
+#undef   IPPROTO_IP
+#endif
+#define  IPPROTO_IP                                   0x0800    /*  = NET_ARP_PROTOCOL_TYPE_IP_V4                       */
+
+
+/*
+*********************************************************************************************************
+*                                 BSD 4.x RETURN CODE / ERROR DEFINES
+*
+* Note(s) : (1) IEEE Std 1003.1, 2004 Edition states ... :
+*
+*               (a) ... to "return 0" :
+*
+*                   (1) "Upon successful completion" of the following BSD socket functions :
+*
+*                       (A) close()
+*                       (B) shutdown()
+*                       (C) bind()
+*                       (D) connect()
+*                       (E) listen()
+*
+*                   (2) "If no messages are available ... and the peer has performed an orderly shutdown"
+*                        for the following BSD socket functions :
+*
+*                       (A) recvfrom()
+*                       (B) recv()
+*
+*                   (3) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Page 161 states that BSD select() function "returns ... 0 on timeout".
+*
+*               (b) "Otherwise, -1 shall be returned and 'errno' set to indicate the error" ... for the
+*                    following BSD functions :
+*
+*                   (1) socket()
+*                   (2) close()
+*                   (3) shutdown()
+*                   (4) bind()
+*                   (5) listen()
+*                   (6) accept()
+*                   (7) connect()
+*                   (8) recvfrom()
+*                   (9) recv()
+*                  (10) sendto()
+*                  (11) send()
+*                  (12) select()
+*                  (13) inet_addr()
+*                  (14) inet_ntoa()
+*
+*                  'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*********************************************************************************************************
+*/
+
+#define  NET_BSD_ERR_NONE                                  0                    /* See Note #1a.                        */
+#define  NET_BSD_ERR_DFLT                                 -1                    /* See Note #1b.                        */
+
+#define  NET_BSD_RTN_CODE_OK                             NET_BSD_ERR_NONE       /* See Note #1a1.                       */
+#define  NET_BSD_RTN_CODE_TIMEOUT                        NET_BSD_RTN_CODE_OK    /* See Note #1a3.                       */
+#define  NET_BSD_RTN_CODE_CONN_CLOSED                    NET_BSD_RTN_CODE_OK    /* See Note #1a2.                       */
+
+
+/*
+*********************************************************************************************************
+*                                   BSD 4.x SOCKET OPTION DEFINES
+*
+* Note(s) : (1) Some socket options NOT currently supported.
+*********************************************************************************************************
+*/
+
+#ifdef   SO_DEBUG
+#undef   SO_DEBUG
+#endif
+#define  SO_DEBUG                                     0x0001    /*  = NET_SOCK_OPT_DEBUG                                */
+
+#ifdef   SO_ACCEPTCONN
+#undef   SO_ACCEPTCONN
+#endif
+#define  SO_ACCEPTCONN                                0x0002    /*  = NET_SOCK_OPT_ACCEPT_CONN                          */
+
+#ifdef   SO_REUSEADDR
+#undef   SO_REUSEADDR
+#endif
+#define  SO_REUSEADDR                                 0x0004    /*  = NET_SOCK_OPT_REUSE_ADDR                           */
+
+#ifdef   SO_KEEPALIVE
+#undef   SO_KEEPALIVE
+#endif
+#define  SO_KEEPALIVE                                 0x0008    /*  = NET_SOCK_OPT_KEEP_ALIVE                           */
+
+#ifdef   SO_DONTROUTE
+#undef   SO_DONTROUTE
+#endif
+#define  SO_DONTROUTE                                 0x0010    /*  = NET_SOCK_OPT_DONT_ROUTE                           */
+
+#ifdef   SO_REUSEPORT
+#undef   SO_REUSEPORT
+#endif
+#define  SO_REUSEPORT                                 0x000F    /*  = SO_REUSEPORT                                      */
+
+#ifdef   SO_BROADCAST
+#undef   SO_BROADCAST
+#endif
+#define  SO_BROADCAST                                 0x0020    /*  = NET_SOCK_OPT_BROADCAST                            */
+
+#ifdef   SO_USELOOPBACK
+#undef   SO_USELOOPBACK
+#endif
+#define  SO_USELOOPBACK                               0x0040    /*  = NET_SOCK_OPT_USE_LOOPBACK                         */
+
+#ifdef   SO_LINGER
+#undef   SO_LINGER
+#endif
+#define  SO_LINGER                                    0x0080    /*  = NET_SOCK_OPT_LINGER                               */
+
+#ifdef   SO_OOBINLINE
+#undef   SO_OOBINLINE
+#endif
+#define  SO_OOBINLINE                                 0x0100    /*  = NET_SOCK_OPT_OOB_INLINE                           */
+
+
+#ifdef   SO_SNDBUF
+#undef   SO_SNDBUF
+#endif
+#define  SO_SNDBUF                                    0x1001    /*  = NET_SOCK_OPT_TX_BUF_SIZE                          */
+
+#ifdef   SO_RCVBUF
+#undef   SO_RCVBUF
+#endif
+#define  SO_RCVBUF                                    0x1002    /*  = NET_SOCK_OPT_RX_BUF_SIZE                          */
+
+#ifdef   SO_SNDLOWAT
+#undef   SO_SNDLOWAT
+#endif
+#define  SO_SNDLOWAT                                  0x1003    /*  = NET_SOCK_OPT_RX_TIMEOUT                           */
+
+#ifdef   SO_RCVLOWAT
+#undef   SO_RCVLOWAT
+#endif
+#define  SO_RCVLOWAT                                  0x1004    /*  = NET_SOCK_OPT_TX_TIMEOUT                           */
+
+#ifdef   SO_SNDTIMEO
+#undef   SO_SNDTIMEO
+#endif
+#define  SO_SNDTIMEO                                  0x1005    /*  = NET_SOCK_OPT_TX_TIMEOUT                           */
+
+#ifdef   SO_RCVTIMEO
+#undef   SO_RCVTIMEO
+#endif
+#define  SO_RCVTIMEO                                  0x1006    /*  = NET_SOCK_OPT_RX_TIMEOUT                           */
+
+#ifdef   SO_ERROR
+#undef   SO_ERROR
+#endif
+#define  SO_ERROR                                     0x1007    /*  = NET_SOCK_OPT_ERROR                                */
+
+#ifdef   SO_TYPE
+#undef   SO_TYPE
+#endif
+#define  SO_TYPE                                      0x1008    /*  = NET_SOCK_OPT_TYPE                                 */
+
+#ifdef   TCP_NODELAY
+#undef   TCP_NODELAY
+#endif
+#define  TCP_NODELAY                                  0x1009    /*  = NET_SOCK_OPT_NO_DELAY                             */
+
+#ifdef   TCP_KEEPIDLE
+#undef   TCP_KEEPIDLE
+#endif
+#define  TCP_KEEPIDLE                                 0x100A    /*  = NET_SOCK_OPT_KEEP_IDLE                            */
+
+#ifdef   TCP_KEEPINTVL
+#undef   TCP_KEEPINTVL
+#endif
+#define  TCP_KEEPINTVL                                0x100B    /*  = NET_SOCK_OPT_KEEP_INTVL                           */
+
+#ifdef   TCP_KEEPCNT
+#undef   TCP_KEEPCNT
+#endif
+#define  TCP_KEEPCNT                                  0x100C    /*  = NET_SOCK_OPT_KEEP_CNT                             */
+
+#ifdef   IP_TOS
+#undef   IP_TOS
+#endif
+#define  IP_TOS                                           30
+
+#ifdef   IP_TTL
+#undef   IP_TTL
+#endif
+#define  IP_TTL                                           31
+
+#ifdef   IP_RECVIF
+#undef   IP_RECVIF
+#endif
+#define  IP_RECVIF                                        32
+
+#ifdef   IP_RECVDSTADDR
+#undef   IP_RECVDSTADDR
+#endif
+#define  IP_RECVDSTADDR                                   33
+
+#ifdef   IP_OPTIONS
+#undef   IP_OPTIONS
+#endif
+#define  IP_OPTIONS                                       34
+
+#ifdef   IP_HDRINCL
+#undef   IP_HDRINCL
+#endif
+#define  IP_HDRINCL                                       35
+
+#ifdef   IP_ADD_MEMBERSHIP
+#undef   IP_ADD_MEMBERSHIP
+#endif
+#define  IP_ADD_MEMBERSHIP                                36
+
+#ifdef   IP_DROP_MEMBERSHIP
+#undef   IP_DROP_MEMBERSHIP
+#endif
+#define  IP_DROP_MEMBERSHIP                               37
+
+#ifdef   SOL_SOCKET
+#undef   SOL_SOCKET
+#endif
+#define  SOL_SOCKET                                   0x7FFF
+
+
+/*
+*********************************************************************************************************
+*                                     BSD 4.x SOCKET FLAG DEFINES
+*
+* Note(s) : (1) Some socket flags NOT currently supported.
+*********************************************************************************************************
+*/
+
+#ifdef   MSG_OOB
+#undef   MSG_OOB
+#endif
+#define  MSG_OOB                                  DEF_BIT_00    /* See Note #1.                                         */
+
+#ifdef   MSG_PEEK
+#undef   MSG_PEEK
+#endif
+#define  MSG_PEEK                                 DEF_BIT_01
+
+#ifdef   MSG_DONTROUTE
+#undef   MSG_DONTROUTE
+#endif
+#define  MSG_DONTROUTE                            DEF_BIT_02    /* See Note #1.                                         */
+
+#ifdef   MSG_EOR
+#undef   MSG_EOR
+#endif
+#define  MSG_EOR                                  DEF_BIT_03    /* See Note #1.                                         */
+
+#ifdef   MSG_TRUNC
+#undef   MSG_TRUNC
+#endif
+#define  MSG_TRUNC                                DEF_BIT_04    /* See Note #1.                                         */
+
+#ifdef   MSG_CTRUNC
+#undef   MSG_CTRUNC
+#endif
+#define  MSG_CTRUNC                               DEF_BIT_05    /* See Note #1.                                         */
+
+#ifdef   MSG_WAITALL
+#undef   MSG_WAITALL
+#endif
+#define  MSG_WAITALL                              DEF_BIT_06    /* See Note #1.                                         */
+
+#ifdef   MSG_DONTWAIT
+#undef   MSG_DONTWAIT
+#endif
+#define  MSG_DONTWAIT                             DEF_BIT_07
+
+
+/*
+*********************************************************************************************************
+*                                NETWORK CONNECTION MANAGEMENT DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- CONN FAMILY TYPES ----------------- */
+#define  NET_CONN_FAMILY_NONE                              0
+                                                                /* Net sock cfg :                                       */
+#define  NET_CONN_FAMILY_IP_V4_SOCK                      NET_SOCK_FAMILY_IP_V4
+#define  NET_CONN_ADDR_LEN_IP_V4_SOCK                    NET_SOCK_ADDR_LEN_IP_V4
+#define  NET_CONN_PROTOCOL_MAX_IP_V4_SOCK                NET_SOCK_PROTO_MAX_IP_V4
+
+#define  NET_CONN_FAMILY_IP_V6_SOCK                      NET_SOCK_FAMILY_IP_V6
+#define  NET_CONN_ADDR_LEN_IP_V6_SOCK                    NET_SOCK_ADDR_LEN_IP_V6
+#define  NET_CONN_PROTOCOL_MAX_IP_V6_SOCK                NET_SOCK_PROTO_MAX_IP_V6
+
+#define  NET_CONN_ID_NONE                                 -1
+
+
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_DEF_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_err.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_err.h
new file mode 100644
index 0000000..fd2812f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_err.h
@@ -0,0 +1,1168 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    NETWORK ERROR CODE MANAGEMENT
+*
+* Filename      : net_err.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 SL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_ERR_MODULE_PRESENT
+#define  NET_ERR_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*                                         NETWORK ERROR CODES
+*
+* Note(s) : (1) All generic network error codes are #define'd in 'net_err.h';
+*               Any port-specific   error codes are #define'd in port-specific header files.
+*********************************************************************************************************
+*/
+
+
+typedef enum net_err {
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                      NETWORK-GENERIC ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_ERR_NONE                                =    1u,        /* Network operation completed successfully.            */
+
+    NET_ERR_FAULT_LOCK_ACQUIRE                  =   20u,        /* Error occurred while acquiring the Network Lock.     */
+    NET_ERR_FAULT_NULL_OBJ                      =   21u,        /* Program execution hit a NULL object in TCP/IP.       */
+    NET_ERR_FAULT_NULL_FNCT                     =   22u,        /* Program execution hit a NULL function in TCP/IP.     */
+    NET_ERR_FAULT_NULL_PTR                      =   23u,        /* Program execution hit a NULL pointer in TCP/IP.      */
+    NET_ERR_FAULT_MEM_ALLOC                     =   24u,        /* Memory allocation error occurred.                    */
+    NET_ERR_FAULT_NOT_SUPPORTED                 =   25u,        /* Requested feature is not supported.                  */
+    NET_ERR_FAULT_FEATURE_DIS                   =   26u,        /* Requested feature is disabled.                       */
+    NET_ERR_FAULT_UNKNOWN_ERR                   =   27u,        /* An unknown error occurred.                           */
+
+    NET_ERR_IF_LINK_DOWN                        =   30u,        /* Net IF link state down.                              */
+    NET_ERR_IF_LOOPBACK_DIS                     =   31u,        /* Loopback IF dis'd.                                   */
+
+    NET_ERR_INVALID_PROTOCOL                    =   40u,        /* Invalid/unknown/unsupported net protocol.            */
+    NET_ERR_INVALID_TRANSACTION                 =   41u,        /* Invalid transaction type.                            */
+    NET_ERR_INVALID_ADDR                        =   42u,        /* Invalid address encountered.                         */
+    NET_ERR_INVALID_TIME                        =   43u,        /* Invalid time/tick value.                             */
+    NET_ERR_INVALID_TYPE                        =   44u,        /* Invalid type encountered.                            */
+    NET_ERR_INVALID_STATE                       =   45u,        /* Invalid state encountered.                           */
+    NET_ERR_INVALID_LEN                         =   46u,        /* Invalid length encountered.                          */
+
+    NET_ERR_RX                                  =   50u,        /* Rx err.                                              */
+    NET_ERR_RX_DEST                             =   51u,        /* Invalid rx dest.                                     */
+
+    NET_ERR_TX                                  =   60u,        /* Tx err.                                              */
+    NET_ERR_TX_BUF_NONE_AVAIL                   =   61u,        /* No Tx buffer available.                              */
+    NET_ERR_TX_BUF_LOCK                         =   62u,        /* Invalid tx buf access; tx is locked.                 */
+
+    NET_ERR_TIME_DLY_FAULT                      =   70u,        /* Time dly fault.                                      */
+    NET_ERR_TIME_DLY_MAX                        =   71u,        /* Time dly max'd.                                      */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                      NETWORK-INIT ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_INIT_ERR_SIGNAL_CREATE                  =   100u,       /* Network Initialization complete successfully.        */
+
+    NET_INIT_ERR_SIGNAL_COMPL                   =   101u,       /* Net Init completion NOT successfully signl'd.        */
+    NET_INIT_ERR_NOT_COMPLETED                  =   102u,       /* Net Init NOT completed.                              */
+    NET_INIT_ERR_COMP_SIGNAL_FAULT              =   103u,       /* Net Init complete signal creation failed.            */
+    NET_INIT_ERR_OS_FEATURE_NOT_EN              =   104u,       /* A required OS feature is not enabled.                */
+    NET_INIT_ERR_GLOBAL_LOCK_CREATE             =   105u,       /* Net lock signal name NOT successfully cfg'd.         */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                 NETWORK UTILITY LIBRARY ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_UTIL_ERR_NONE                           =    200u,      /* Network Utility operation complete successfully.     */
+
+    NET_UTIL_ERR_NULL_SIZE                      =    210u,      /* Argument(s) passed a zero size.                      */
+    NET_UTIL_ERR_INVALID_PROTOCOL               =    211u,      /* Invalid/unknown/unsupported net protocol.            */
+    NET_UTIL_ERR_BUF_TOO_SMALL                  =    212u,
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                      ASCII LIBRARY ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_ASCII_ERR_NONE                          =    300u,      /* Network ASCII operation complete successfully.       */
+
+    NET_ASCII_ERR_INVALID_STR_LEN               =    310u,      /* Invalid ASCII str  len.                              */
+    NET_ASCII_ERR_INVALID_CHAR                  =    311u,      /* Invalid ASCII char.                                  */
+    NET_ASCII_ERR_INVALID_CHAR_LEN              =    312u,      /* Invalid ASCII char len.                              */
+    NET_ASCII_ERR_INVALID_CHAR_VAL              =    313u,      /* Invalid ASCII char val.                              */
+    NET_ASCII_ERR_INVALID_CHAR_SEQ              =    314u,      /* Invalid ASCII char seq.                              */
+    NET_ASCII_ERR_INVALID_PART_LEN              =    315u,      /* Invalid ASCII part len.                              */
+    NET_ASCII_ERR_INVALID_DOT_NBR               =    316u,      /* Invalid ASCII IP addr dot count.                     */
+
+    NET_ASCII_ERR_IP_FAMILY_NOT_PRESENT         =    320u,      /* IP family not present or disabled.                   */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                               NETWORK STATISTIC MANAGEMENT ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_STAT_ERR_NONE                           =    400u,      /* Network Statistic operation complete successfully.   */
+
+    NET_STAT_ERR_INVALID_TYPE                   =    410u,      /* Type specified invalid or unknown.                   */
+
+    NET_STAT_ERR_POOL_NONE_AVAIL                =    420u,      /* NO stat pool entries avail.                          */
+    NET_STAT_ERR_POOL_NONE_USED                 =    421u,      /* NO stat pool entries used.                           */
+    NET_STAT_ERR_POOL_NONE_REM                  =    422u,      /* NO stat pool entries rem'ing.                        */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                NETWORK TIMER MANAGEMENT ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_TMR_ERR_NONE                            =    500u,      /* Network Timer operation completed successfully.      */
+
+    NET_TMR_ERR_INIT_TASK_CREATE                =    510u,      /* Network timer task creation failed.                  */
+    NET_TMR_ERR_INIT_TASK_INVALID_ARG           =    511u,      /* Invalid argument in task allocation.                 */
+    NET_TMR_ERR_INIT_TASK_INVALID_FREQ          =    512u,      /* INvalid frequency for the timer task.                */
+
+    NET_TMR_ERR_NONE_AVAIL                      =    520u,      /* NO Network timers available.                         */
+    NET_TMR_ERR_INVALID_TYPE                    =    521u,      /* Type specified invalid or unknown.                   */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                NETWORK BUFFER MANAGEMENT ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_BUF_ERR_NONE                            =    600u,      /* Network Buffer operation completed successfully.     */
+
+    NET_BUF_ERR_NONE_AVAIL                      =    610u,      /* NO net bufs of req'd size avail.                     */
+    NET_BUF_ERR_NOT_USED                        =    611u,      /* Net buf NOT used.                                    */
+
+    NET_BUF_ERR_INVALID_TYPE                    =    620u,      /* Invalid buf type or unknown.                         */
+    NET_BUF_ERR_INVALID_SIZE                    =    621u,      /* Invalid buf size.                                    */
+    NET_BUF_ERR_INVALID_IX                      =    622u,      /* Invalid buf ix  outside DATA area.                   */
+    NET_BUF_ERR_INVALID_LEN                     =    623u,      /* Invalid buf len outside DATA area.                   */
+
+    NET_BUF_ERR_POOL_MEM_ALLOC                  =    630u,      /* Buf pool init      failed.                           */
+
+    NET_BUF_ERR_INVALID_POOL_TYPE               =    640u,      /* Invalid buf pool type.                               */
+    NET_BUF_ERR_INVALID_CFG_RX_NBR              =    643u,      /* Invalid Rx buf number configured.                    */
+    NET_BUF_ERR_INVALID_CFG_TX_NBR              =    644u,      /* Invalid Tx buf number configured.                    */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                              NETWORK CONNECTION MANAGEMENT ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_CONN_ERR_NONE                           =    700u,      /* Network Connection operation completed successfully. */
+
+    NET_CONN_ERR_NONE_AVAIL                     =    710u,      /* NO net conns avail.                                  */
+    NET_CONN_ERR_NOT_USED                       =    711u,      /* Net conn NOT used.                                   */
+
+    NET_CONN_ERR_INVALID_TYPE                   =    720u,      /* Invalid conn type.                                   */
+    NET_CONN_ERR_INVALID_CONN                   =    721u,      /* Invalid conn id.                                     */
+    NET_CONN_ERR_INVALID_FAMILY                 =    722u,      /* Invalid conn list family.                            */
+    NET_CONN_ERR_INVALID_PROTOCOL_IX            =    723u,      /* Invalid conn list protocol ix.                       */
+    NET_CONN_ERR_INVALID_ADDR                   =    724u,      /* Invalid conn addr.                                   */
+    NET_CONN_ERR_INVALID_ADDR_LEN               =    725u,      /* Invalid conn addr len.                               */
+    NET_CONN_ERR_INVALID_ARG                    =    726u,      /* Invalid conn arg.                                    */
+    NET_CONN_ERR_INVALID_PROTOCOL               =    727u,
+
+    NET_CONN_ERR_ADDR_NOT_USED                  =    730u,      /* Conn addr NOT    used.                               */
+    NET_CONN_ERR_ADDR_IN_USE                    =    731u,      /* Conn addr cur in use.                                */
+
+    NET_CONN_ERR_CONN_NONE                      =    740u,      /* NO   conn.                                           */
+    NET_CONN_ERR_CONN_HALF                      =    741u,      /* Half conn (local                   addr valid).      */
+    NET_CONN_ERR_CONN_HALF_WILDCARD             =    742u,      /* Half conn (local wildcard          addr valid).      */
+    NET_CONN_ERR_CONN_FULL                      =    743u,      /* Full conn (local          & remote addr valid).      */
+    NET_CONN_ERR_CONN_FULL_WILDCARD             =    744u,      /* Full conn (local wildcard & remote addr valid).      */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                           NETWORK BOARD SUPPORT PACKAGE (BSP) ERROR CODES
+-
+- Note(s) : (1) Specific BSP error codes #define'd (between 1000 and 1999) in their respective network-/board-specific
+-               header files ('net_bsp.h').
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_BSP_ERR_NONE                            =   1000u,      /* Network BSP operation completed successfully.        */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                     NETWORK DEVICE ERROR CODES
+-
+- Note(s) : (1) Specific device error codes #define'd (between 2000 and 2999) in their respective network device driver
+-               header files ('net_dev_&&&.h').
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_DEV_ERR_NONE                            =   2000u,      /* Network Device operation completed successfully.     */
+
+    NET_DEV_ERR_INIT                            =   2010u,      /* Dev init  failed.                                    */
+    NET_DEV_ERR_FAULT                           =   2011u,      /* Dev fault/failure.                                   */
+    NET_DEV_ERR_NULL_PTR                        =   2012u,      /* Ptr arg(s) passed NULL ptr(s).                       */
+    NET_DEV_ERR_MEM_ALLOC                       =   2013u,      /* Mem alloc failed.                                    */
+    NET_DEV_ERR_DEV_OFF                         =   2014u,      /* Dev status is 'OFF' or 'DOWN'.                       */
+    NET_DEV_ERR_NOT_SUPPORTED                   =   2015u,      /* Dev don't suppport the requested feature.            */
+
+    NET_DEV_ERR_INVALID_IF                      =   2020u,      /* Invalid dev/IF nbr.                                  */
+    NET_DEV_ERR_INVALID_CFG                     =   2021u,      /* Invalid dev cfg.                                     */
+    NET_DEV_ERR_INVALID_SIZE                    =   2022u,      /* Invalid size.                                        */
+    NET_DEV_ERR_INVALID_DATA_PTR                =   2023u,      /* Invalid dev drv data ptr.                            */
+
+    NET_DEV_ERR_ADDR_MCAST_ADD                  =   2030u,      /* Multicast addr add    failed.                        */
+    NET_DEV_ERR_ADDR_MCAST_REMOVE               =   2031u,      /* Multicast addr remove failed.                        */
+
+    NET_DEV_ERR_RX                              =   2040u,      /* Dev rx failed or fault.                              */
+    NET_DEV_ERR_RX_BUSY                         =   2041u,      /* Rx'r busy -- cannot rx data.                         */
+
+    NET_DEV_ERR_TX                              =   2050u,      /* Dev tx failed or fault.                              */
+    NET_DEV_ERR_TX_BUSY                         =   2051u,      /* Tx'r busy -- cannot tx data.                         */
+    NET_DEV_ERR_TX_RDY_SIGNAL                   =   2052u,      /* Tx rdy signal failed.                                */
+    NET_DEV_ERR_TX_RDY_SIGNAL_TIMEOUT           =   2053u,      /* Tx rdy signal timeout; NO signal rx'd from dev.      */
+    NET_DEV_ERR_TX_RDY_SIGNAL_FAULT             =   2054u,      /* Tx rdy signal fault.                                 */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                 NETWORK EXTENSION LAYER ERROR CODES
+-
+- Note(s) : (1) Specific extension layer error codes #define'd (between 3000 and 3999) in their respective extension
+-               layer driver header files ('net_phy_&&&.h').
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_PHY_ERR_NONE                            =   3000u,      /* Network PHY device operation completed successfully. */
+
+    NET_PHY_ERR_INVALID_CFG                     =   3010u,      /* Invalid phy cfg.                                     */
+    NET_PHY_ERR_INVALID_ADDR                    =   3011u,      /* Invalid phy addr.                                    */
+    NET_PHY_ERR_INVALID_BUS_MODE                =   3012u,      /* Invalid phy bus mode.                                */
+
+    NET_PHY_ERR_TIMEOUT_REG_RD                  =   3020u,      /* Phy reg rd           timeout.                        */
+    NET_PHY_ERR_TIMEOUT_REG_WR                  =   3021u,      /* Phy reg wr           timeout.                        */
+    NET_PHY_ERR_TIMEOUT_AUTO_NEG                =   3022u,      /* Phy auto-negotiation timeout.                        */
+    NET_PHY_ERR_TIMEOUT_RESET                   =   3023u,      /* Phy reset            timeout.                        */
+
+    NET_PHY_ERR_ADDR_PROBE                      =   3030u,      /* Phy addr detection   failed.                         */
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                 WIRELESS MANAGER LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_WIFI_MGR_ERR_NONE                       =   4000u,      /* WiFi Manager operation completed successfully.       */
+
+    NET_WIFI_MGR_ERR_MEM_ALLOC                  =   4010u,      /* Mem alloc failed.                                    */
+
+    NET_WIFI_MGR_ERR_NOT_STARTED                =   4020u,      /* Mgr not started.                                     */
+
+    NET_WIFI_MGR_ERR_LOCK_CREATE                =   4030u,      /* Mgr Lock creation failed.                            */
+    NET_WIFI_MGR_ERR_LOCK_ACQUIRE               =   4031u,      /* Acquire Mgr Lock failed.                             */
+
+    NET_WIFI_MGR_ERR_RESP_SIGNAL_CREATE         =   4040u,      /* Resp signal creation failed.                         */
+    NET_WIFI_MGR_ERR_RESP_SIGNAL_TIMEOUT        =   4041u,      /* Resp signal timeout.                                 */
+
+    NET_WIFI_MGR_ERR_CMD_FAULT                  =   4050u,      /* Mgmt cmd  fault.                                     */
+    NET_WIFI_MGR_ERR_RESP_FAULT                 =   4051u,      /* Mgmt Resp fault.                                     */
+
+    NET_WIFI_MGR_ERR_STATE                      =   4060u,      /* Mgmt err state.                                      */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                     WIRELESS LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_IF_WIFI_ERR_NONE                        =   5000u,      /* WiFi operation completed successfully.               */
+
+    NET_IF_WIFI_ERR_SCAN                        =   5010u,      /* Scan  wifi net available failed.                     */
+    NET_IF_WIFI_ERR_JOIN                        =   5011u,      /* Join  wifi net           failed.                     */
+    NET_IF_WIFI_ERR_CREATE                      =   5012u,      /* Create wifi net          failed.                     */
+    NET_IF_WIFI_ERR_LEAVE                       =   5013u,      /* Leave wifi net           failed.                     */
+    NET_IF_WIFI_ERR_GET_PEER_INFO               =   5014u,      /* Get Peer Info wifi net   failed.                     */
+
+    NET_IF_WIFI_ERR_INVALID_CH                  =   5020u,      /* Argument passed invalid ch.                          */
+    NET_IF_WIFI_ERR_INVALID_NET_TYPE            =   5021u,      /* Argument passed invalid net  type.                   */
+    NET_IF_WIFI_ERR_INVALID_DATA_RATE           =   5022u,      /* Argument passed invalid data rate.                   */
+    NET_IF_WIFI_ERR_INVALID_SECURITY            =   5023u,      /* Argument passed invalid security.                    */
+    NET_IF_WIFI_ERR_INVALID_PWR_LEVEL           =   5024u,      /* Argument passed invalid pwr  level.                  */
+    NET_IF_WIFI_ERR_INVALID_REG_DOMAIN          =   5025u,      /* Argument passed invalid pwr  level.                  */
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                 NETWORK INTERFACE LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_IF_ERR_NONE                             =   6000u,      /* Network Interface operation completed successfully.  */
+
+    NET_IF_ERR_TX_RDY_SIGNAL_TIMEOUT            =   6010u,      /* Tx Ready Signal not received before timeout.         */
+    NET_IF_ERR_TX_RDY_SIGNAL_FAULT              =   6011u,      /* Tx Ready Signal faulted.                             */
+
+    NET_IF_ERR_INIT_RX_Q_CREATE                 =   6020u,      /* IF Rx Queue creation failed.                         */
+    NET_IF_ERR_INIT_RX_Q_INVALID_ARG            =   6021u,      /* Invalid Argument in Rx Queue Init.                   */
+    NET_IF_ERR_INIT_RX_Q_MEM_ALLOC              =   6022u,      /* Memory allocation error in Rx Queue Init.            */
+    NET_IF_ERR_INIT_RX_TASK_CREATE              =   6023u,      /* IF Rx Task creation failed.                          */
+    NET_IF_ERR_INIT_RX_TASK_INVALID_ARG         =   6024u,      /* Invalid Argument in Rx Task Init.                    */
+    NET_IF_ERR_INIT_RX_TASK_MEM_ALLOC           =   6025u,      /* Memory allocation error in Rx Task Init.             */
+
+    NET_IF_ERR_INIT_TX_DEALLOC_Q_CREATE         =   6030u,      /* IF Tx Queue creation failed.                         */
+    NET_IF_ERR_INIT_TX_DEALLOC_Q_INVALID_ARG    =   6031u,      /* Invalid Argument in Tx Queue Init.                   */
+    NET_IF_ERR_INIT_TX_DEALLOC_Q_MEM_ALLOC      =   6032u,      /* Memory allocation error in Tx Queue Init.            */
+    NET_IF_ERR_INIT_TX_DEALLOC_TASK_CREATE      =   6033u,      /* IF Tx Task creation failed.                          */
+    NET_IF_ERR_INIT_TX_DEALLOC_TASK_INVALID_ARG =   6034u,      /* Invalid Argument in Tx Task Init.                    */
+    NET_IF_ERR_INIT_TX_DEALLOC_TASK_MEM_ALLOC   =   6035u,      /* Memory allocation error in Tx Task Init.             */
+
+    NET_IF_ERR_INIT_TX_SUSPEND_SEM_CREATE       =   6040u,      /* IF Tx Suspend semaphore creation failed.             */
+    NET_IF_ERR_INIT_TX_SUSPEND_MEM_ALLOC        =   6041u,      /* Memory allocation error in Tx Suspend sem creation.  */
+    NET_IF_ERR_INIT_TX_SUSPEND_SEM_INVALID_ARG  =   6042u,      /* Invalid argument in Tx Suspend sem creation.         */
+    NET_IF_ERR_INIT_TX_SUSPEND_TIMEOUT          =   6043u,      /* Failed to set Tx Suspend timeout.                    */
+
+    NET_IF_ERR_ALIGN_NOT_AVAIL                  =   6050u,      /* App data buf alignment NOT possible.                 */
+
+    NET_IF_ERR_LOOPBACK_RX_Q_EMPTY              =   6060u,      /* Loopback rx Q empty; i.e.       NO rx'd pkt(s) in Q. */
+    NET_IF_ERR_LOOPBACK_RX_Q_FULL               =   6061u,      /* Loopback rx Q full;  i.e. too many rx'd pkt(s) in Q. */
+    NET_IF_ERR_LOOPBACK_INVALID_MTU             =   6062u,      /* Loopback IF invalid MTU.                             */
+    NET_IF_ERR_LOOPBACK_INVALID_ADDR            =   6063u,      /* Loopback IF invalid address.                         */
+    NET_IF_ERR_LOOPBACK_DEMUX_PROTOCOL          =   6064u,      /* Loopback IF demuxed invalid protocol.                */
+
+    NET_IF_ERR_LINK_SUBSCRIBER_MEM_ALLOC        =   6070u,      /* Memory allocation error in Subscriber pool init.     */
+    NET_IF_ERR_LINK_SUBSCRIBER_NOT_FOUND        =   6071u,      /* IF Link Subscriber Not Found.                        */
+
+    NET_IF_ERR_DEV_FAULT                        =   6080u,      /* IF device faulted.                                   */
+    NET_IF_ERR_DEV_TX_RDY_VAL                   =   6081u,      /* Dev tx rdy  signal          NOT successfully init'd. */
+
+    NET_IF_ERR_INVALID_IF                       =   6100u,      /* Invalid IF nbr.                                      */
+    NET_IF_ERR_INVALID_CFG                      =   6101u,      /* Invalid IF API/Cfg/Data.                             */
+    NET_IF_ERR_INVALID_STATE                    =   6102u,      /* Invalid IF state.                                    */
+    NET_IF_ERR_INVALID_IO_CTRL_OPT              =   6103u,      /* Invalid/unsupported IO ctrl opt.                     */
+    NET_IF_ERR_INVALID_ISR_TYPE                 =   6104u,      /* Invalid/unsupported ISR type.                        */
+    NET_IF_ERR_INVALID_PROTOCOL                 =   6105u,      /* Invalid protocol.                                    */
+    NET_IF_ERR_INVALID_ADDR                     =   6106u,      /* Invalid addr.                                        */
+    NET_IF_ERR_INVALID_ADDR_LEN                 =   6107u,      /* Invalid addr len.                                    */
+    NET_IF_ERR_INVALID_ADDR_DEST                =   6108u,      /* Invalid addr dest.                                   */
+    NET_IF_ERR_INVALID_ADDR_SRC                 =   6109u,      /* Invalid addr sec.                                    */
+    NET_IF_ERR_INVALID_MTU                      =   6110u,      /* Invalid MTU.                                         */
+    NET_IF_ERR_INVALID_LEN_DATA                 =   6111u,      /* Invalid data  len.                                   */
+    NET_IF_ERR_INVALID_LEN_FRAME                =   6112u,      /* Invalid frame len.                                   */
+    NET_IF_ERR_INVALID_POOL_TYPE                =   6113u,      /* Invalid IF buf pool type.                            */
+    NET_IF_ERR_INVALID_POOL_ADDR                =   6114u,      /* Invalid IF buf pool addr.                            */
+    NET_IF_ERR_INVALID_POOL_SIZE                =   6115u,      /* Invalid IF buf pool size.                            */
+    NET_IF_ERR_INVALID_POOL_QTY                 =   6116u,      /* Invalid IF buf pool qty cfg'd.                       */
+    NET_IF_ERR_INVALID_ETHER_TYPE               =   6117u,      /* Invalid Ethernet type.                               */
+    NET_IF_ERR_INVALID_LLC_DSAP                 =   6118u,      /* Invalid IEEE 802.2 LLC  DSAP val.                    */
+    NET_IF_ERR_INVALID_LLC_SSAP                 =   6119u,      /* Invalid IEEE 802.2 LLC  SSAP val.                    */
+    NET_IF_ERR_INVALID_LLC_CTRL                 =   6120u,      /* Invalid IEEE 802.2 LLC  Ctrl val.                    */
+    NET_IF_ERR_INVALID_SNAP_CODE                =   6121u,      /* Invalid IEEE 802.2 SNAP OUI  val.                    */
+    NET_IF_ERR_INVALID_SNAP_TYPE                =   6122u,      /* Invalid IEEE 802.2 SNAP Type val.                    */
+
+    NET_IF_ERR_RX                               =   6200u,      /* Rx failed or fault.                                  */
+    NET_IF_ERR_RX_Q_EMPTY                       =   6201u,      /* Rx Q empty; i.e.       NO rx'd pkt(s) in Q.          */
+    NET_IF_ERR_RX_Q_FULL                        =   6202u,      /* Rx Q full;  i.e. too many rx'd pkt(s) in Q.          */
+    NET_IF_ERR_RX_Q_SIGNAL                      =   6203u,      /* Rx Q signal failed.                                  */
+    NET_IF_ERR_RX_Q_SIGNAL_TIMEOUT              =   6204u,      /* Rx Q signal timeout; NO pkt(s) rx'd from dev.        */
+    NET_IF_ERR_RX_Q_SIGNAL_FAULT                =   6205u,      /* Rx Q signal fault.                                   */
+
+    NET_IF_ERR_TX                               =   6300u,      /* Tx failed or fault.                                  */
+    NET_IF_ERR_TX_RDY                           =   6301u,      /* Tx to dev rdy.                                       */
+    NET_IF_ERR_TX_BROADCAST                     =   6302u,      /* Tx broadcast on local net.                           */
+    NET_IF_ERR_TX_MULTICAST                     =   6303u,      /* Tx multicast on local net.                           */
+    NET_IF_ERR_TX_ADDR_REQ                      =   6304u,      /* Tx req  for hw addr.                                 */
+    NET_IF_ERR_TX_ADDR_PEND                     =   6305u,      /* Tx pend on  hw addr.                                 */
+    NET_IF_ERR_TX_DEALLC_Q_EMPTY                =   6306u,      /* Tx dealloc Q empty; i.e.       NO tx completed pkts. */
+    NET_IF_ERR_TX_DEALLC_Q_FULL                 =   6307u,      /* Tx dealloc Q full;  i.e. too many tx completed pkts. */
+    NET_IF_ERR_TX_DEALLC_Q_SIGNAL               =   6308u,      /* Tx dealloc Q signal failed.                          */
+    NET_IF_ERR_TX_DEALLC_Q_SIGNAL_TIMEOUT       =   6309u,      /* Tx dealloc Q signal timeout.                         */
+    NET_IF_ERR_TX_DEALLC_Q_SIGNAL_FAULT         =   6310u,      /* Tx dealloc Q signal fault.                           */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                       CACHE LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_CACHE_ERR_NONE                          =   7000u,      /* Network Cache operation successful.                  */
+
+    NET_CACHE_ERR_NONE_AVAIL                    =   7010u,      /* Cache NOT avail.                                     */
+    NET_CACHE_ERR_INVALID_TYPE                  =   7011u,      /* Cache type invalid or unknown.                       */
+    NET_CACHE_ERR_NOT_FOUND                     =   7012u,      /* Cache NOT found.                                     */
+    NET_CACHE_ERR_PEND                          =   7013u,      /* Cache hw addr pending.                               */
+    NET_CACHE_ERR_RESOLVED                      =   7014u,      /* Cache hw addr resolved.                              */
+    NET_CACHE_ERR_UNRESOLVED                    =   7015u,      /* Cache hw addr un-resolved.                           */
+
+    NET_CACHE_ERR_INVALID_ADDR_PROTO_LEN        =   7020u,      /* Invalid protocol addr len (see Note #1a).            */
+    NET_CACHE_ERR_INVALID_ADDR_HW_LEN           =   7021u,      /* Invalid hw       addr len.                           */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                        ARP LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_ARP_ERR_NONE                            =   8000u,      /* Network ARP operation successful.                    */
+
+    NET_ARP_ERR_INVALID_HW_TYPE                 =   8010u,      /* Invalid ARP hw       type.                           */
+    NET_ARP_ERR_INVALID_HW_ADDR                 =   8011u,      /* Invalid ARP hw       addr.                           */
+    NET_ARP_ERR_INVALID_HW_ADDR_LEN             =   8012u,      /* Invalid ARP hw       addr len.                       */
+    NET_ARP_ERR_INVALID_PROTOCOL_TYPE           =   8013u,      /* Invalid ARP protocol type.                           */
+    NET_ARP_ERR_INVALID_PROTOCOL_ADDR           =   8014u,      /* Invalid ARP protocol addr.                           */
+    NET_ARP_ERR_INVALID_PROTOCOL_LEN            =   8015u,      /* Invalid ARP protocol addr len (see Note #1a).        */
+    NET_ARP_ERR_INVALID_OP_CODE                 =   8016u,      /* Invalid ARP op code.                                 */
+    NET_ARP_ERR_INVALID_OP_ADDR                 =   8017u,      /* Invalid ARP op code  addr.                           */
+    NET_ARP_ERR_INVALID_LEN_MSG                 =   8018u,      /* Invalid ARP msg len.                                 */
+
+    NET_ARP_ERR_CACHE_NONE_AVAIL                =   8020u,      /* NO ARP caches avail.                                 */
+    NET_ARP_ERR_CACHE_INVALID_TYPE              =   8021u,      /* ARP cache type invalid or unknown.                   */
+    NET_ARP_ERR_CACHE_NOT_FOUND                 =   8022u,      /* ARP cache NOT found.                                 */
+    NET_ARP_ERR_CACHE_PEND                      =   8023u,      /* ARP cache hw addr pending.                           */
+    NET_ARP_ERR_CACHE_RESOLVED                  =   8024u,      /* ARP cache hw addr resolved.                          */
+
+    NET_ARP_ERR_RX_TARGET_THIS_HOST             =   8030u,      /* Rx ARP msg     for this host.                        */
+    NET_ARP_ERR_RX_TARGET_NOT_THIS_HOST         =   8031u,      /* Rx ARP msg NOT for this host.                        */
+    NET_ARP_ERR_RX_TARGET_REPLY                 =   8032u,      /* Rx ARP Reply   for this host NOT in ARP cache.       */
+
+    NET_ARP_ERR_RX_REQ_TX_REPLY                 =   8040u,      /* Rx'd ARP Req;   tx ARP Reply.                        */
+    NET_ARP_ERR_RX_REPLY_TX_PKTS                =   8041u,      /* Rx'd ARP Reply; tx ARP cache pkts.                   */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                NETWORK LAYER MANAGEMENT ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_MGR_ERR_NONE                            =   9000u,      /* Network Manager operation successful.                */
+
+    NET_MGR_ERR_INVALID_PROTOCOL                =   9010u,      /* Invalid/unsupported protocol.                        */
+    NET_MGR_ERR_INVALID_PROTOCOL_ADDR           =   9011u,      /* Invalid protocol addr.                               */
+    NET_MGR_ERR_INVALID_PROTOCOL_LEN            =   9012u,      /* Invalid protocol addr len (see Note #1a).            */
+
+    NET_MGR_ERR_ADDR_CFG_IN_PROGRESS            =   9020u,      /* IF addr cfg in progress.                             */
+    NET_MGR_ERR_ADDR_TBL_SIZE                   =   9021u,      /* Invalid addr tbl size.                               */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                        IPv4 LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_IPv4_ERR_NONE                           =   10000u,     /* Network IPv4 operation successful.                   */
+
+    NET_IPv4_ERR_INVALID_VER                    =   10010u,     /* Invalid IP ver.                                      */
+    NET_IPv4_ERR_INVALID_LEN_HDR                =   10011u,     /* Invalid IP hdr  len.                                 */
+    NET_IPv4_ERR_INVALID_TOS                    =   10012u,     /* Invalid IP TOS.                                      */
+    NET_IPv4_ERR_INVALID_LEN_TOT                =   10013u,     /* Invalid IP tot  len.                                 */
+    NET_IPv4_ERR_INVALID_LEN_DATA               =   10014u,     /* Invalid IP data len.                                 */
+    NET_IPv4_ERR_INVALID_FLAG                   =   10015u,     /* Invalid IP flags.                                    */
+    NET_IPv4_ERR_INVALID_FRAG                   =   10016u,     /* Invalid IP fragmentation.                            */
+    NET_IPv4_ERR_INVALID_TTL                    =   10017u,     /* Invalid IP TTL.                                      */
+    NET_IPv4_ERR_INVALID_PROTOCOL               =   10018u,     /* Invalid/unknown protocol type.                       */
+    NET_IPv4_ERR_INVALID_CHK_SUM                =   10019u,     /* Invalid IP chk sum.                                  */
+    NET_IPv4_ERR_INVALID_ADDR_LEN               =   10020u,     /* Invalid IP           addr len.                       */
+    NET_IPv4_ERR_INVALID_ADDR_SRC               =   10021u,     /* Invalid IP src       addr.                           */
+    NET_IPv4_ERR_INVALID_ADDR_DEST              =   10022u,     /* Invalid IP dest      addr.                           */
+    NET_IPv4_ERR_INVALID_ADDR_BROADCAST         =   10023u,     /* Invalid IP broadcast addr.                           */
+    NET_IPv4_ERR_INVALID_ADDR_HOST              =   10025u,     /* Invalid IP host      addr.                           */
+    NET_IPv4_ERR_INVALID_ADDR_NET               =   10026u,     /* Invalid IP net       addr.                           */
+    NET_IPv4_ERR_INVALID_ADDR_GATEWAY           =   10027u,     /* Invalid IP gateway   addr.                           */
+    NET_IPv4_ERR_INVALID_OPT                    =   10028u,     /* Invalid IP opt.                                      */
+    NET_IPv4_ERR_INVALID_OPT_PTR                =   10029u,     /* Invalid IP opt ptr.                                  */
+    NET_IPv4_ERR_INVALID_OPT_LEN                =   10040u,     /* Invalid IP opt len.                                  */
+    NET_IPv4_ERR_INVALID_OPT_TYPE               =   10041u,     /* Invalid IP opt type.                                 */
+    NET_IPv4_ERR_INVALID_OPT_NBR                =   10042u,     /* Invalid IP opt nbr same opt.                         */
+    NET_IPv4_ERR_INVALID_OPT_CFG                =   10043u,     /* Invalid IP opt cfg.                                  */
+    NET_IPv4_ERR_INVALID_OPT_FLAG               =   10044u,     /* Invalid IP opt flag.                                 */
+    NET_IPv4_ERR_INVALID_OPT_ROUTE              =   10045u,     /* Invalid IP opt route.                                */
+    NET_IPv4_ERR_INVALID_OPT_END                =   10046u,     /* Invalid IP opt list ending.                          */
+
+    NET_IPv4_ERR_ADDR_CFG                       =   10100u,     /* Invalid IP addr cfg.                                 */
+    NET_IPv4_ERR_ADDR_CFG_STATE                 =   10101u,     /* Invalid IP addr cfg state.                           */
+    NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS           =   10102u,     /*         IF addr cfg in progress.                     */
+    NET_IPv4_ERR_ADDR_CFG_IN_USE                =   10103u,     /*         IP addr cur in use.                          */
+    NET_IPv4_ERR_ADDR_NONE_AVAIL                =   10104u,     /* NO      IP addr(s)  cfg'd.                           */
+    NET_IPv4_ERR_ADDR_NOT_FOUND                 =   10105u,     /*         IP addr NOT found.                           */
+    NET_IPv4_ERR_ADDR_TBL_SIZE                  =   10106u,     /* Invalid IP addr tbl size.                            */
+    NET_IPv4_ERR_ADDR_TBL_EMPTY                 =   10107u,     /*         IP addr tbl empty.                           */
+    NET_IPv4_ERR_ADDR_TBL_FULL                  =   10108u,     /*         IP addr tbl full.                            */
+
+    NET_IPv4_ERR_RX_FRAG_NONE                   =   10200u,     /* Rx'd datagram NOT frag'd.                            */
+    NET_IPv4_ERR_RX_FRAG_OFFSET                 =   10201u,     /* Invalid frag offset.                                 */
+    NET_IPv4_ERR_RX_FRAG_SIZE                   =   10202u,     /* Invalid frag     size.                               */
+    NET_IPv4_ERR_RX_FRAG_SIZE_TOT               =   10203u,     /* Invalid frag tot size.                               */
+    NET_IPv4_ERR_RX_FRAG_LEN_TOT                =   10204u,     /* Invalid frag tot len.                                */
+    NET_IPv4_ERR_RX_FRAG_DISCARD                =   10205u,     /* Invalid frag(s) discarded.                           */
+    NET_IPv4_ERR_RX_FRAG_REASM                  =   10206u,     /* Frag'd datagram reasm in progress.                   */
+    NET_IPv4_ERR_RX_FRAG_COMPLETE               =   10207u,     /* Frag'd datagram reasm'd.                             */
+
+    NET_IPv4_ERR_RX_OPT_BUF_NONE_AVAIL          =   10210u,     /* No bufs avail for IP opts.                           */
+    NET_IPv4_ERR_RX_OPT_BUF_LEN                 =   10211u,     /* IP opt buf len err.                                  */
+    NET_IPv4_ERR_RX_OPT_BUF_WR                  =   10212u,     /* IP opt buf wr  err.                                  */
+
+    NET_IPv4_ERR_TX_PKT                         =   10300u,     /* Tx pkt err.                                          */
+    NET_IPv4_ERR_TX_DEST_NONE                   =   10301u,     /* NO      tx dest.                                     */
+    NET_IPv4_ERR_TX_DEST_INVALID                =   10302u,     /* Invalid tx dest.                                     */
+    NET_IPv4_ERR_TX_DEST_LOCAL_HOST             =   10303u,     /* Tx to local host   addr.                             */
+    NET_IPv4_ERR_TX_DEST_BROADCAST              =   10304u,     /* Tx to local net broadcast.                           */
+    NET_IPv4_ERR_TX_DEST_MULTICAST              =   10305u,     /* Tx to local net multicast.                           */
+    NET_IPv4_ERR_TX_DEST_HOST_THIS_NET          =   10306u,     /* Tx to local net host.                                */
+    NET_IPv4_ERR_TX_DEST_DFLT_GATEWAY           =   10307u,     /* Tx to local net dflt gateway.                        */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                       IPv6 LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_IPv6_ERR_NONE                           =  11000u,      /* Network IPv6 operation successful.                   */
+    NET_IPv6_ERR_FAULT                          =  11001u,      /* IPv6 layer faulted.                                  */
+
+    NET_IPv6_ERR_INVALID_VER                    =  11010u,      /* Invalid IPv6 ver.                                    */
+    NET_IPv6_ERR_INVALID_TRAFFIC_CLASS          =  11011u,      /* Invalid IPv6 traffic class.                          */
+    NET_IPv6_ERR_INVALID_FLOW_LABEL             =  11012u,      /* Invalid IPv6 flow label.                             */
+    NET_IPv6_ERR_INVALID_LEN_HDR                =  11011u,      /* Invalid IP hdr  len.                                 */
+    NET_IPv6_ERR_INVALID_TOS                    =  11012u,      /* Invalid IP TOS.                                      */
+    NET_IPv6_ERR_INVALID_LEN_TOT                =  11013u,      /* Invalid IP tot  len.                                 */
+    NET_IPv6_ERR_INVALID_LEN_DATA               =  11014u,      /* Invalid IP data len.                                 */
+    NET_IPv6_ERR_INVALID_FLAG                   =  11015u,      /* Invalid IP flags.                                    */
+    NET_IPv6_ERR_INVALID_FRAG                   =  11016u,      /* Invalid IP fragmentation.                            */
+    NET_IPv6_ERR_INVALID_HOP_LIMIT              =  11017u,      /* Invalid IP TTL.                                      */
+    NET_IPv6_ERR_INVALID_PROTOCOL               =  11018u,      /* Invalid/unknown protocol type.                       */
+    NET_IPv6_ERR_INVALID_CHK_SUM                =  11019u,      /* Invalid IP chk sum.                                  */
+    NET_IPv6_ERR_INVALID_ADDR_LEN               =  11020u,      /* Invalid IP           addr len.                       */
+    NET_IPv6_ERR_INVALID_ADDR_SRC               =  11021u,      /* Invalid IP src       addr.                           */
+    NET_IPv6_ERR_INVALID_ADDR_DEST              =  11022u,      /* Invalid IP dest      addr.                           */
+    NET_IPv6_ERR_INVALID_ADDR_BROADCAST         =  11023u,      /* Invalid IP broadcast addr.                           */
+    NET_IPv6_ERR_INVALID_ADDR_HOST              =  11024u,      /* Invalid IP host      addr.                           */
+    NET_IPv6_ERR_INVALID_ADDR_NET               =  11025u,      /* Invalid IP net       addr.                           */
+    NET_IPv6_ERR_INVALID_EH                     =  11026u,      /* Invalid IP ext hdr.                                  */
+    NET_IPv6_ERR_INVALID_EH_LEN                 =  11027u,      /* Invalid IP ext hdr len.                              */
+    NET_IPv6_ERR_INVALID_EH_OPT                 =  11028u,      /* Invalid IP ext hdr opt.                              */
+    NET_IPv6_ERR_INVALID_EH_OPT_SEQ             =  11029u,      /* Invalid IP ext hdr sequence.                         */
+    NET_IPv6_ERR_INVALID_ADDR_ID_TYPE           =  11030u,      /* Invalid addr ID type.                                */
+    NET_IPv6_ERR_INVALID_ADDR_PREFIX_TYPE       =  11031u,      /* Invalid addr prefix type.                            */
+    NET_IPv6_ERR_INVALID_ADDR_PREFIX_LEN        =  11032u,      /* Invalid addr prefix len.                             */
+    NET_IPv6_ERR_INVALID_ADDR_CFG_MODE          =  11033u,      /* Invalid addr cfg mode.                               */
+
+    NET_IPv6_ERR_ADDR_CFG                       =  11100u,      /* Invalid IP addr cfg.                                 */
+    NET_IPv6_ERR_ADDR_CFG_STATE                 =  11101u,      /* Invalid IP addr cfg state.                           */
+    NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS           =  11102u,      /*         IF addr cfg in progress.                     */
+    NET_IPv6_ERR_ADDR_CFG_IN_USE                =  11103u,      /*         IP addr cur in use.                          */
+    NET_IPv6_ERR_ADDR_CFG_DUPLICATED            =  11104u,      /*         IP addr is duplicated on network.            */
+    NET_IPv6_ERR_ADDR_CFG_LINK_LOCAL            =  11105u,      /* Link-local connectivity only.                        */
+    NET_IPv6_ERR_ADDR_NONE_AVAIL                =  11106u,      /* NO      IP addr(s)  cfg'd.                           */
+    NET_IPv6_ERR_ADDR_NOT_FOUND                 =  11107u,      /*         IP addr NOT found.                           */
+    NET_IPv6_ERR_ADDR_TBL_SIZE                  =  11108u,      /* Invalid IP addr tbl size.                            */
+    NET_IPv6_ERR_ADDR_TBL_EMPTY                 =  11109u,      /*         IP addr tbl empty.                           */
+    NET_IPv6_ERR_ADDR_TBL_FULL                  =  11110u,      /*         IP addr tbl full.                            */
+
+    NET_IPv6_ERR_RX_FRAG_NONE                   =  11200u,      /* Rx'd datagram NOT frag'd.                            */
+    NET_IPv6_ERR_RX_FRAG_OFFSET                 =  11201u,      /* Invalid frag offset.                                 */
+    NET_IPv6_ERR_RX_FRAG_SIZE                   =  11202u,      /* Invalid frag     size.                               */
+    NET_IPv6_ERR_RX_FRAG_SIZE_TOT               =  11203u,      /* Invalid frag tot size.                               */
+    NET_IPv6_ERR_RX_FRAG_LEN_TOT                =  11204u,      /* Invalid frag tot len.                                */
+    NET_IPv6_ERR_RX_FRAG_DISCARD                =  11205u,      /* Invalid frag(s) discarded.                           */
+    NET_IPv6_ERR_RX_FRAG_REASM                  =  11206u,      /* Frag'd datagram reasm in progress.                   */
+    NET_IPv6_ERR_RX_FRAG_COMPLETE               =  11207u,      /* Frag'd datagram reasm'd.                             */
+
+    NET_IPv6_ERR_RX_OPT_BUF_NONE_AVAIL          =  11210u,      /* No bufs avail for IP opts.                           */
+    NET_IPv6_ERR_RX_OPT_BUF_LEN                 =  11211u,      /* IP opt buf len err.                                  */
+    NET_IPv6_ERR_RX_OPT_BUF_WR                  =  11212u,      /* IP opt buf wr  err.                                  */
+
+    NET_IPv6_ERR_TX_PKT                         =  11300u,      /* Tx pkt err.                                          */
+
+    NET_IPv6_ERR_TX_SRC_SEL_FAIL                =  11310u,      /* NO      tx src.                                      */
+    NET_IPv6_ERR_TX_SRC_INVALID                 =  11311u,      /* Invalid tx src.                                      */
+
+    NET_IPv6_ERR_TX_DEST_NONE                   =  11320u,      /* NO      tx dest.                                     */
+    NET_IPv6_ERR_TX_DEST_INVALID                =  11321u,      /* Invalid tx dest.                                     */
+    NET_IPv6_ERR_TX_DEST_LOCAL_HOST             =  11322u,      /* Tx to local host   addr.                             */
+    NET_IPv6_ERR_TX_DEST_MULTICAST              =  11323u,      /* Tx to local net multicast.                           */
+    NET_IPv6_ERR_TX_DEST_HOST_THIS_NET          =  11324u,      /* Tx to local net host.                                */
+
+    NET_IPv6_ERR_NEXT_HOP                       =  11340u,      /* No Next Hop.                                         */
+
+    NET_IPv6_ERR_AUTO_CFG_DISABLED              =  11400u,
+    NET_IPv6_ERR_AUTO_CFG_STARTED               =  11401u,
+    NET_IPv6_ERR_ROUTER_ADV_SIGNAL_TIMEOUT      =  11402u,
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                   GENERIC DAD LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_DAD_ERR_NONE                            =  11700u,
+    NET_DAD_ERR_IN_PROGRESS                     =  11701u,
+    NET_DAD_ERR_FAILED                          =  11702u,
+    NET_DAD_ERR_ADDR_NOT_FOUND                  =  11703u,
+    NET_DAD_ERR_SIGNAL_CREATE                   =  11704u,
+    NET_DAD_ERR_SIGNAL_FAULT                    =  11705u,
+    NET_DAD_ERR_SIGNAL_INVALID                  =  11706u,
+    NET_DAD_ERR_OBJ_POOL_CREATE                 =  11707u,
+    NET_DAD_ERR_OBJ_MEM_ALLOC                   =  11708u,
+    NET_DAD_ERR_OBJ_NOT_FOUND                   =  11709u,
+    NET_DAD_ERR_FAULT                           =  11710u,
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                   GENERIC ICMP LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_ICMP_ERR_NONE                           =  12000u,      /* Network ICMP operation successful.                   */
+
+    NET_ICMP_ERR_LOCK_CREATE                    =  12010u,      /* ICMP lock creation failed.                           */
+    NET_ICMP_ERR_LOCK_ACQUIRE                   =  12011u,      /* Acquiring ICMP lock failed.                          */
+
+    NET_ICMP_ERR_SIGNAL_TIMEOUT                 =  12020u,      /* ICMP signal timed out.                               */
+    NET_ICMP_ERR_SIGNAL_FAULT                   =  12021u,      /* ICMP signal faulted.                                 */
+
+    NET_ICMP_ERR_ECHO_REQ_TIMEOUT               =  12030u,      /* ICMP Echo Req signal timed out.                      */
+    NET_ICMP_ERR_ECHO_REQ_SIGNAL_FAULT          =  12031u,      /* ICMP Echo Req signal faulted.                        */
+    NET_ICMP_ERR_ECHO_REPLY_RX                  =  12032u,      /* ICMP Echo Reply rx doesn't matched any Echo Req.     */
+    NET_ICMP_ERR_ECHO_REPLY_DATA_CMP_FAIL       =  12033u,      /* ICMP Echo Reply rx data doesn't matched data send.   */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                      ICMPv4 LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_ICMPv4_ERR_NONE                         =  13000u,      /* Network ICMPv4 operation successful.                 */
+
+    NET_ICMPv4_ERR_INVALID_TYPE                 =  13010u,      /* Invalid ICMPv4 msg  type / ICMP data type.           */
+    NET_ICMPv4_ERR_INVALID_CODE                 =  13011u,      /* Invalid ICMPv4 msg  code.                            */
+    NET_ICMPv4_ERR_INVALID_PTR                  =  13012u,      /* Invalid ICMPv4 msg  ptr.                             */
+    NET_ICMPv4_ERR_INVALID_LEN                  =  13013u,      /* Invalid ICMPv4 msg  len.                             */
+    NET_ICMPv4_ERR_INVALID_LEN_DATA             =  13014u,      /* Invalid ICMPv4 data len.                             */
+    NET_ICMPv4_ERR_INVALID_CHK_SUM              =  13015u,      /* Invalid ICMPv4 chk  sum.                             */
+    NET_ICMPv4_ERR_INVALID_ARG                  =  13016u,      /* Invalid ICMPv4 argument.                             */
+
+
+    NET_ICMPv4_ERR_MSG_TYPE_ERR                 =  13020u,      /* ICMPv4 err   msg type.                               */
+    NET_ICMPv4_ERR_MSG_TYPE_REQ                 =  13021u,      /* ICMPv4 req   msg type.                               */
+    NET_ICMPv4_ERR_MSG_TYPE_REPLY               =  13022u,      /* ICMPv4 reply msg type.                               */
+
+    NET_ICMPv4_ERR_RX_BROADCAST                 =  13030u,      /* ICMPv4 rx invalid broadcast.                         */
+    NET_ICMPv4_ERR_RX_MCAST                     =  13031u,      /* ICMPv4 rx invalid multicast.                         */
+    NET_ICMPv4_ERR_RX_REPLY                     =  13032u,      /* ICMPv4 rx invalid reply.                             */
+
+    NET_ICMPv4_ERR_TX_INVALID_BROADCAST         =  13040u,      /* ICMPv4 tx invalid broadcast.                         */
+    NET_ICMPv4_ERR_TX_INVALID_MCAST             =  13041u,      /* ICMPv4 tx invalid multicast.                         */
+    NET_ICMPv4_ERR_TX_INVALID_FRAG              =  13042u,      /* ICMPv4 tx invalid frag.                              */
+    NET_ICMPv4_ERR_TX_INVALID_ADDR_SRC          =  13043u,      /* ICMPv4 tx invalid addr src.                          */
+    NET_ICMPv4_ERR_TX_INVALID_ERR_MSG           =  13044u,      /* ICMPv4 tx invalid err msg.                           */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                      ICMPv6 LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_ICMPv6_ERR_NONE                         =  14000u,      /* Network ICMPv6 operation successful.                 */
+    NET_ICMPv6_ERR_FAULT                        =  14001u,      /* ICMPv6 layer faulted.                                */
+
+    NET_ICMPv6_ERR_INVALID_TYPE                 =  14010u,      /* Invalid ICMPv6 msg  type / ICMP data type.           */
+    NET_ICMPv6_ERR_INVALID_CODE                 =  14011u,      /* Invalid ICMPv6 msg  code.                            */
+    NET_ICMPv6_ERR_INVALID_PTR                  =  14012u,      /* Invalid ICMPv6 msg  ptr.                             */
+    NET_ICMPv6_ERR_INVALID_LEN                  =  14013u,      /* Invalid ICMPv6 msg  len.                             */
+    NET_ICMPv6_ERR_INVALID_LEN_DATA             =  14014u,      /* Invalid ICMPv6 data len.                             */
+    NET_ICMPv6_ERR_INVALID_CHK_SUM              =  14015u,      /* Invalid ICMPv6 chk  sum.                             */
+
+    NET_ICMPv6_ERR_MSG_TYPE_ERR                 =  14020u,      /* ICMPv6 err   msg type.                               */
+    NET_ICMPv6_ERR_MSG_TYPE_REQ                 =  14021u,      /* ICMPv6 req   msg type.                               */
+    NET_ICMPv6_ERR_MSG_TYPE_REPLY               =  14022u,      /* ICMPv6 reply msg type.                               */
+    NET_ICMPv6_ERR_MSG_TYPE_NEIGHBOR_SOL        =  14023u,      /* ICMPv6 Neighbor Solicitation  msg type.              */
+    NET_ICMPv6_ERR_MSG_TYPE_NEIGHBOR_ADV        =  14024u,      /* ICMPv6 Neighbor Advertisement msg type.              */
+    NET_ICMPv6_ERR_MSG_TYPE_ROUTER_SOL          =  14025u,      /* ICMPv6 Router   Solicitation  msg type.              */
+    NET_ICMPv6_ERR_MSG_TYPE_ROUTER_ADV          =  14026u,      /* ICMPv6 Router   Advertisement msg type.              */
+    NET_ICMPv6_ERR_MSG_TYPE_REDIRECT            =  14027u,      /* ICMPv6 Router   Advertisement msg type.              */
+    NET_ICMPv6_ERR_MSG_TYPE_QUERY               =  14028u,      /* ICMPv6 MLDP     query         msg type.              */
+    NET_ICMPv6_ERR_MSG_TYPE_REPORT              =  14029u,      /* ICMPv6 MLDP     report        msg type.              */
+
+    NET_ICMPv6_ERR_RX_REPLY                     =  14100u,      /* IMCPv6 rx invalid reply message.                     */
+    NET_ICMPv6_ERR_RX_BCAST                     =  14101u,      /* ICMPv6 rx invalid broadcast.                         */
+    NET_ICMPv6_ERR_RX_MCAST                     =  14102u,      /* ICMPv6 rx invalid multicast.                         */
+
+    NET_ICMPv6_ERR_TX_INVALID_BCAST             =  14200u,      /* ICMPv6 tx invalid broadcast.                         */
+    NET_ICMPv6_ERR_TX_INVALID_MCAST             =  14201u,      /* ICMPv6 tx invalid multicast.                         */
+    NET_ICMPv6_ERR_TX_INVALID_FRAG              =  14202u,      /* ICMPv6 tx invalid frag.                              */
+    NET_ICMPv6_ERR_TX_INVALID_ADDR_SRC          =  14203u,      /* ICMPv6 tx invalid addr src.                          */
+    NET_ICMPv6_ERR_TX_INVALID_ERR_MSG           =  14204u,      /* ICMPv6 tx invalid err msg.                           */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                    NETWORK NDP LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_NDP_ERR_NONE                            =  15000u,      /* Network NDP operation successful.                    */
+
+    NET_NDP_ERR_LOCK                            =  15010u,      /* NDP lock error.                                      */
+    NET_NDP_ERR_FAULT                           =  15011u,      /* A NDP fault occurs.                                  */
+
+    NET_NDP_ERR_INVALID_TYPE                    =  15020u,      /* Invalid NDP type in NDP message.                     */
+    NET_NDP_ERR_OPT_TYPE                        =  15021u,      /* Invalid option type in NDP message.                  */
+    NET_NDP_ERR_OPT_LEN                         =  15022u,      /* Invalid option length in NDP message.                */
+    NET_NDP_ERR_HW_ADDR_LEN                     =  15023u,      /* Invalid Hardware Address Length in NDP message.      */
+    NET_NDP_ERR_HW_ADDR_THIS_HOST               =  15024u,      /* h/w addr specified same as host h/w addr.            */
+    NET_NDP_ERR_ADDR_SRC                        =  15025u,      /* Invalid address source.                              */
+    NET_NDP_ERR_ADDR_DEST                       =  15026u,      /* Invalid address destination.                         */
+    NET_NDP_ERR_ADDR_TARGET                     =  15027u,      /* Invalid address target.                              */
+    NET_NDP_ERR_HOP_LIMIT                       =  15028u,      /* Invalid Hop Limit in NDP message.                    */
+    NET_NDP_ERR_ADDR_CFG_FAILED                 =  15029u,      /* Configure addr from received prefix failed.          */
+    NET_NDP_ERR_ADDR_CFG_IN_PROGRESS            =  15030u,      /* Configure addr from received prefix not completed.   */
+
+    NET_NDP_ERR_INVALID_ARG                     =  15040u,      /* NDP function passed invalid argument.                */
+    NET_NDP_ERR_INVALID_PROTOCOL_LEN            =  15041u,      /* Invalid NDP protocol addr len.                       */
+    NET_NDP_ERR_INVALID_HW_ADDR_LEN             =  15042u,      /* Invalid NDP hw       addr len.                       */
+    NET_NDP_ERR_INVALID_PREFIX                  =  15043u,      /* Invalid NDP prefix.                                  */
+
+    NET_NDP_ERR_NEIGHBOR_CACHE_NONE_AVAIL       =  15050u,      /* NO NDP Neighbor cache available in pool.             */
+    NET_NDP_ERR_NEIGHBOR_CACHE_ADD_FAIL         =  15053u,      /* Failed to add NDP Neighbor cache to cache list.      */
+    NET_NDP_ERR_NEIGHBOR_CACHE_NOT_FOUND        =  15054u,      /* NDP Neighbor cache not found.                        */
+    NET_NDP_ERR_NEIGHBOR_CACHE_PEND             =  15055u,      /* NDP Neighbor cache addr resolution is pending.       */
+    NET_NDP_ERR_NEIGHBOR_CACHE_RESOLVED         =  15056u,      /* NDP Neighbor cache addr resolved.                    */
+    NET_NDP_ERR_NEIGHBOR_CACHE_STALE            =  15057u,      /* NDP Neighbor cache is in stale state.                */
+
+    NET_NDP_ERR_ROUTER_NONE_AVAIL               =  15060u,      /* NO NDP Router entry available.                       */
+    NET_NDP_ERR_PREFIX_NONE_AVAIL               =  15061u,      /* NO NDP Prefix entry available.                       */
+    NET_NDP_ERR_DEST_CACHE_NONE_AVAIL           =  15062u,      /* NO NDP Destination cache available.                  */
+
+    NET_NDP_ERR_ROUTER_DFLT_FIND                =  15070u,      /* NDP Default Router found.                            */
+    NET_NDP_ERR_ROUTER_DFLT_NONE                =  15071u,      /* NDP Router found (but not default).                  */
+    NET_NDP_ERR_ROUTER_NOT_FOUND                =  15072u,      /* NO corresponding NDP router found in list.           */
+
+    NET_NDP_ERR_PREFIX_NOT_FOUND                =  15080u,      /* NO corresponding NDP prefix found in list.           */
+
+    NET_NDP_ERR_DESTINATION_NOT_FOUND           =  15090u,      /* NO corresponding NDP dest cache found in list.       */
+
+    NET_NDP_ERR_TX_DEST_MULTICAST               =  15100u,      /* Destination is multicast.                            */
+    NET_NDP_ERR_TX_DEST_HOST_THIS_NET           =  15101u,      /* Destination is on same local network.                */
+    NET_NDP_ERR_TX_DFLT_GATEWAY                 =  15102u,      /* Packet is sent trough default gateway.               */
+    NET_NDP_ERR_TX_NO_DFLT_GATEWAY              =  15103u,      /* Packet is sent through a none default gateway.       */
+    NET_NDP_ERR_TX_NO_NEXT_HOP                  =  15104u,      /* NO valid Packet Nest Hop found.                      */
+    NET_NDP_ERR_TX                              =  15105u,      /* NDP Tx packet error.                                 */
+
+    NET_NDP_ERR_ADDR_DUPLICATE                  =  15201u,
+    NET_NDP_ERR_ADDR_TENTATIVE                  =  15202u,
+
+    NET_NDP_ERR_ROUTER_ADV_SIGNAL_CREATE        =  15300u,
+    NET_NDP_ERR_ROUTER_ADV_SIGNAL_FAULT         =  15301u,
+    NET_NDP_ERR_ROUTER_ADV_SIGNAL_TIMEOUT       =  15302u,
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                       IGMP LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_IGMP_ERR_NONE                           =  16000u,      /* Network IGMP operation successful.                   */
+
+    NET_IGMP_ERR_INVALID_VER                    =  16010u,      /* Invalid IGMP ver.                                    */
+    NET_IGMP_ERR_INVALID_TYPE                   =  16011u,      /* Invalid IGMP msg  type.                              */
+    NET_IGMP_ERR_INVALID_LEN                    =  16012u,      /* Invalid IGMP msg  len.                               */
+    NET_IGMP_ERR_INVALID_CHK_SUM                =  16013u,      /* Invalid IGMP chk  sum.                               */
+    NET_IGMP_ERR_INVALID_ADDR_SRC               =  16014u,      /* Invalid IGMP src  addr.                              */
+    NET_IGMP_ERR_INVALID_ADDR_DEST              =  16015u,      /* Invalid IGMP dest addr                               */
+    NET_IGMP_ERR_INVALID_ADDR_GRP               =  16016u,      /* Invalid IGMP grp  addr.                              */
+
+    NET_IGMP_ERR_MSG_TYPE_QUERY                 =  16020u,      /* IGMP query  msg type.                                */
+    NET_IGMP_ERR_MSG_TYPE_REPORT                =  16021u,      /* IGMP report msg type.                                */
+
+    NET_IGMP_ERR_HOST_GRP_NONE_AVAIL            =  16030u,      /* NO IGMP host grp avail.                              */
+    NET_IGMP_ERR_HOST_GRP_NOT_FOUND             =  16031u,      /*    IGMP host grp NOT found.                          */
+    NET_IGMP_ERR_HOST_GRP_INVALID_TYPE          =  16032u,      /*    IGMP host grp type invalid or unknown.            */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                       MLDP LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_MLDP_ERR_NONE                           =  17000u,       /* Network MLDP operation successful.                  */
+
+    NET_MLDP_ERR_HOP_LIMIT                      =  17010u,       /* Invalid Hop Limit in MLDP message.                  */
+
+    NET_MLDP_ERR_INVALID_ADDR_SRC               =  17020u,       /* Invalid address source in MLDP message.             */
+    NET_MLDP_ERR_INVALID_ADDR_DEST              =  17021u,       /* Invalid address destination in MLDP message.        */
+    NET_MLDP_ERR_INVALID_ADDR_GRP               =  17022u,       /* Invalid multicast MLDP address group.               */
+    NET_MLDP_ERR_INVALID_LEN                    =  17023u,       /* Invalid MDLP message length.                        */
+    NET_MDLP_ERR_INVALID_TYPE                   =  17024u,       /* Invalid MLDP message type.                          */
+    NET_MLDP_ERR_INVALID_CHK_SUM                =  17025u,       /* Invalid check sum in MLDP message.                  */
+    NET_MLDP_ERR_INVALID_HOP_HDR                =  17026u,       /* Invalid IPv6 Hop extension header in MLDP message.    */
+
+    NET_MLDP_ERR_HOST_GRP_NONE_AVAIL            =  17030u,       /* No more MLDP multicast group available.             */
+    NET_MLDP_ERR_HOST_GRP_NOT_FOUND             =  17031u,       /* MLDP multicast group not found.                     */
+
+    NET_MLDP_ERR_MSG_TYPE_QUERY                 =  17040u,       /* Rx a MLDP Query message.                            */
+    NET_MLDP_ERR_MSG_TYPE_REPORT                =  17041u,       /* Rx a MLDP Report message.                           */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                        UDP LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_UDP_ERR_NONE                            =  18000u,      /* Network UDP operation successful.                    */
+
+    NET_UDP_ERR_INVALID_DATA_SIZE               =  18010u,      /* Invalid UDP data size.                               */
+    NET_UDP_ERR_INVALID_ARG                     =  18011u,      /* Invalid UDP arg.                                     */
+    NET_UDP_ERR_INVALID_LEN                     =  18012u,      /* Invalid UDP datagram len.                            */
+    NET_UDP_ERR_INVALID_LEN_DATA                =  18013u,      /* Invalid UDP data     len.                            */
+    NET_UDP_ERR_INVALID_ADDR_SRC                =  18014u,      /* Invalid UDP src  addr.                               */
+    NET_UDP_ERR_INVALID_PORT_NBR                =  18015u,      /* Invalid UDP port nbr.                                */
+    NET_UDP_ERR_INVALID_CHK_SUM                 =  18016u,      /* Invalid UDP chk  sum.                                */
+    NET_UDP_ERR_INVALID_FLAG                    =  18017u,      /* Invalid UDP flags.                                   */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                        TCP LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_TCP_ERR_NONE                            =  19000u,      /* Network TCP operation successful.                    */
+
+    NET_TCP_ERR_INIT_RX_Q_FAULT                 =  19010u,      /* TCP Rx Q Init failed.                                */
+    NET_TCP_ERR_INIT_TX_Q_FAULT                 =  19010u,      /* TCP Tx Q Init failed.                                */
+
+    NET_TCP_ERR_NONE_AVAIL                      =  19020u,      /* NO TCP conns avail.                                  */
+
+    NET_TCP_ERR_INVALID_DATA_SIZE               =  19030u,      /* Invalid TCP data size.                               */
+    NET_TCP_ERR_INVALID_ARG                     =  19031u,      /* Invalid TCP arg.                                     */
+    NET_TCP_ERR_INVALID_LEN_HDR                 =  19032u,      /* Invalid TCP hdr  len.                                */
+    NET_TCP_ERR_INVALID_LEN_SEG                 =  19033u,      /* Invalid TCP seg  len.                                */
+    NET_TCP_ERR_INVALID_LEN_DATA                =  19034u,      /* Invalid TCP data len.                                */
+    NET_TCP_ERR_INVALID_PORT_NBR                =  19035u,      /* Invalid TCP port nbr.                                */
+    NET_TCP_ERR_INVALID_FLAG                    =  19036u,      /* Invalid TCP flags.                                   */
+    NET_TCP_ERR_INVALID_CHK_SUM                 =  19037u,      /* Invalid TCP chk sum.                                 */
+
+    NET_TCP_ERR_INVALID_OPT                     =  19040u,      /* Invalid TCP opt.                                     */
+    NET_TCP_ERR_INVALID_OPT_TYPE                =  19041u,      /* Invalid TCP opt type.                                */
+    NET_TCP_ERR_INVALID_OPT_NBR                 =  19042u,      /* Invalid TCP opt nbr same opt.                        */
+    NET_TCP_ERR_INVALID_OPT_LEN                 =  19043u,      /* Invalid TCP opt len.                                 */
+    NET_TCP_ERR_INVALID_OPT_CFG                 =  19044u,      /* Invalid TCP opt cfg.                                 */
+    NET_TCP_ERR_INVALID_OPT_END                 =  19045u,      /* Invalid TCP opt list ending.                         */
+
+    NET_TCP_ERR_INVALID_CONN_TYPE               =  19050u,      /* Invalid   TCP conn type.                             */
+    NET_TCP_ERR_INVALID_CONN                    =  19051u,      /* Invalid   TCP conn/id.                               */
+    NET_TCP_ERR_INVALID_CONN_ID                 =  19052u,      /* Invalid   TCP conn's conn id.                        */
+    NET_TCP_ERR_INVALID_CONN_OP                 =  19053u,      /* Invalid   TCP conn op.                               */
+    NET_TCP_ERR_INVALID_CONN_STATE              =  19054u,      /* Invalid   TCP conn state.                            */
+
+    NET_TCP_ERR_CONN_NONE                       =  19100u,      /* NO        TCP conn.                                  */
+    NET_TCP_ERR_CONN_NOT_USED                   =  19101u,      /*           TCP conn NOT used.                         */
+    NET_TCP_ERR_CONN_CLOSED                     =  19102u,      /*           TCP conn successfully closed.              */
+    NET_TCP_ERR_CONN_CLOSE                      =  19103u,      /*           TCP conn abort        closed.              */
+    NET_TCP_ERR_CONN_FAULT                      =  19104u,      /*           TCP conn fault        closed.              */
+    NET_TCP_ERR_CONN_FAIL                       =  19105u,      /*           TCP conn op failed.                        */
+    NET_TCP_ERR_CONN_TIMEOUT                    =  19106u,      /*           TCP conn timeout.                          */
+    NET_TCP_ERR_CONN_LISTEN_Q_MAX               =  19107u,      /*           TCP conn listen Q max lim.                 */
+    NET_TCP_ERR_CONN_PROTO_FAMILY               =  19108u,      /* Invalid   TCP conn protocol family.                  */
+
+    NET_TCP_ERR_CONN_SEQ_NONE                   =  19110u,      /* NO        TCP conn seq.                              */
+    NET_TCP_ERR_CONN_SEQ_SYNC                   =  19111u,      /*   Valid   TCP conn sync.                             */
+    NET_TCP_ERR_CONN_SEQ_SYNC_INVALID           =  19112u,      /* Invalid   TCP conn sync.                             */
+    NET_TCP_ERR_CONN_SEQ_VALID                  =  19113u,      /*   Valid   TCP conn seq.                              */
+    NET_TCP_ERR_CONN_SEQ_INVALID                =  19114u,      /* Invalid   TCP conn seq.                              */
+    NET_TCP_ERR_CONN_SEQ_FIN_VALID              =  19115u,      /*   Valid   TCP conn fin.                              */
+    NET_TCP_ERR_CONN_SEQ_FIN_INVALID            =  19116u,      /* Invalid   TCP conn fin.                              */
+
+    NET_TCP_ERR_CONN_ACK_NONE                   =  19120u,      /* NO        TCP conn ack.                              */
+    NET_TCP_ERR_CONN_ACK_VALID                  =  19121u,      /*   Valid   TCP conn ack.                              */
+    NET_TCP_ERR_CONN_ACK_INVALID                =  19122u,      /* Invalid   TCP conn ack.                              */
+    NET_TCP_ERR_CONN_ACK_DUP                    =  19123u,      /* Duplicate TCP conn ack.                              */
+    NET_TCP_ERR_CONN_ACK_DLYD                   =  19125u,      /* Dly'd     TCP conn ack.                              */
+    NET_TCP_ERR_CONN_ACK_PREVLY_TXD             =  19126u,      /*           TCP conn ack prev'ly tx'd.                 */
+
+    NET_TCP_ERR_CONN_RESET_NONE                 =  19130u,      /* NO        TCP conn reset.                            */
+    NET_TCP_ERR_CONN_RESET_VALID                =  19131u,      /*   Valid   TCP conn reset.                            */
+    NET_TCP_ERR_CONN_RESET_INVALID              =  19132u,      /* Invalid   TCP conn reset.                            */
+
+    NET_TCP_ERR_CONN_PROBE_INVALID              =  19140u,      /* Invalid   TCP conn probe.                            */
+
+    NET_TCP_ERR_CONN_DATA_NONE                  =  19150u,      /* NO        TCP conn data.                             */
+    NET_TCP_ERR_CONN_DATA_VALID                 =  19151u,      /*   Valid   TCP conn data.                             */
+    NET_TCP_ERR_CONN_DATA_INVALID               =  19152u,      /* Invalid   TCP conn data.                             */
+    NET_TCP_ERR_CONN_DATA_DUP                   =  19153u,      /* Duplicate TCP conn data.                             */
+
+    NET_TCP_ERR_RX                              =  19200u,      /*    Rx err.                                           */
+    NET_TCP_ERR_RX_Q_CLOSED                     =  19201u,      /*    Rx Q closed; i.e.   do NOT rx   pkt(s) to Q.      */
+    NET_TCP_ERR_RX_Q_EMPTY                      =  19202u,      /*    Rx Q empty;  i.e.      NO  rx'd pkt(s) in Q.      */
+    NET_TCP_ERR_RX_Q_FULL                       =  19203u,      /*    Rx Q full;   i.e. too many rx'd pkt(s) in Q.      */
+    NET_TCP_ERR_RX_Q_ABORT                      =  19204u,      /*    Rx Q abort      failed.                           */
+    NET_TCP_ERR_RX_Q_SIGNAL                     =  19205u,      /*    Rx Q signal     failed.                           */
+    NET_TCP_ERR_RX_Q_SIGNAL_CLR                 =  19206u,      /*    Rx Q signal clr failed.                           */
+    NET_TCP_ERR_RX_Q_SIGNAL_TIMEOUT             =  19207u,      /*    Rx Q signal timeout.                              */
+    NET_TCP_ERR_RX_Q_SIGNAL_ABORT               =  19208u,      /*    Rx Q signal aborted.                              */
+    NET_TCP_ERR_RX_Q_SIGNAL_FAULT               =  19209u,      /*    Rx Q signal fault.                                */
+
+    NET_TCP_ERR_TX_PKT                          =  19300u,      /*    Tx pkt err.                                       */
+    NET_TCP_ERR_TX_Q_CLOSED                     =  19301u,      /*    Tx Q closed; i.e.   do NOT Q tx   pkt(s) to Q.    */
+    NET_TCP_ERR_TX_Q_EMPTY                      =  19302u,      /*    Tx Q empty;  i.e.      NO    tx   pkt(s) in Q.    */
+    NET_TCP_ERR_TX_Q_FULL                       =  19303u,      /*    Tx Q full;   i.e. too many   tx'd pkt(s) in Q.    */
+    NET_TCP_ERR_TX_Q_ABORT                      =  19304u,      /*    Tx Q abort      failed.                           */
+    NET_TCP_ERR_TX_Q_SUSPEND                    =  19305u,      /*    Tx Q suspended.                                   */
+    NET_TCP_ERR_TX_Q_SIGNAL                     =  19306u,      /*    Tx Q signal     failed.                           */
+    NET_TCP_ERR_TX_Q_SIGNAL_CLR                 =  19307u,      /*    Tx Q signal clr failed.                           */
+    NET_TCP_ERR_TX_Q_SIGNAL_TIMEOUT             =  19308u,      /*    Tx Q signal timeout.                              */
+    NET_TCP_ERR_TX_Q_SIGNAL_ABORT               =  19309u,      /*    Tx Q signal aborted.                              */
+    NET_TCP_ERR_TX_Q_SIGNAL_FAULT               =  19310u,      /*    Tx Q signal fault.                                */
+
+    NET_TCP_ERR_TX_KEEP_ALIVE_TH                =  19400u,      /* Keep-alive seg(s)    tx'd > th.                      */
+
+    NET_TCP_ERR_RE_TX_SEG_TH                    =  19500u,      /* Re-tx Q    seg(s) re-tx'd > th.                      */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                  NETWORK SOCKET LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_SOCK_ERR_NONE                           =  20000u,      /* Network Socket operation successful.                 */
+
+    NET_SOCK_ERR_INIT_RX_Q_FAULT                =  20010u,      /* Sock Init OS object Rx Q failed.                     */
+    NET_SOCK_ERR_INIT_RX_Q_TIMEOUT_CFG          =  20011u,      /* Sock Init Rx Q timeout failed.                       */
+    NET_SOCK_ERR_INIT_CONN_REQ_FAULT            =  20012u,      /* Sock Init OS object Conn Req failed.                 */
+    NET_SOCK_ERR_INIT_CONN_REQ_INVALID_TIMEOUT  =  20013u,      /* Sock Init Conn Req timeout failed.                   */
+    NET_SOCK_ERR_INIT_CONN_ACCEPT_FAULT         =  20014u,      /* Sock Init OS object Conn Accept failed.              */
+    NET_SOCK_ERR_INIT_CONN_ACCEPT_TIMEOUT_CFG   =  20015u,      /* Sock Init Conn Accept timeout failed.                */
+    NET_SOCK_ERR_INIT_CONN_CLOSE_FAULT          =  20016u,      /* Sock Init OS object Conn Close failed.               */
+    NET_SOCK_ERR_INIT_CONN_CLOSE_TIMEOUT_CFG    =  20017u,      /* Sock Init Conn Close timeout failed.                 */
+    NET_SOCK_ERR_INIT_MEM_ALLOC                 =  20018u,
+
+    NET_SOCK_ERR_NONE_AVAIL                     =  20020u,      /* NO socks avail.                                      */
+    NET_SOCK_ERR_NOT_USED                       =  20021u,      /* Sock NOT used.                                       */
+    NET_SOCK_ERR_CLOSED                         =  20022u,      /* Sock       closed.                                   */
+    NET_SOCK_ERR_FAULT                          =  20023u,      /* Sock fault closed.                                   */
+    NET_SOCK_ERR_TIMEOUT                        =  20024u,      /* Sock op(s) timeout.                                  */
+
+    NET_SOCK_ERR_INVALID_DATA_SIZE              =  20100u,      /* Invalid sock data size.                              */
+    NET_SOCK_ERR_INVALID_ARG                    =  20101u,      /* Invalid sock arg.                                    */
+
+    NET_SOCK_ERR_INVALID_FAMILY                 =  20120u,      /* Invalid sock protocol family.                        */
+    NET_SOCK_ERR_INVALID_PROTOCOL               =  20121u,      /* Invalid sock protocol.                               */
+    NET_SOCK_ERR_INVALID_TYPE                   =  20122u,      /* Invalid sock type.                                   */
+    NET_SOCK_ERR_INVALID_SOCK                   =  20123u,      /* Invalid sock      id.                                */
+    NET_SOCK_ERR_INVALID_DESC                   =  20124u,      /* Invalid sock desc id(s).                             */
+    NET_SOCK_ERR_INVALID_CONN                   =  20125u,      /* Invalid sock conn/id.                                */
+    NET_SOCK_ERR_INVALID_STATE                  =  20126u,      /* Invalid sock state.                                  */
+    NET_SOCK_ERR_INVALID_OP                     =  20127u,      /* Invalid sock op.                                     */
+
+    NET_SOCK_ERR_INVALID_OPT                    =  20130u,      /* Invalid sock opt.                                    */
+    NET_SOCK_ERR_INVALID_FLAG                   =  20131u,      /* Invalid sock flag.                                   */
+    NET_SOCK_ERR_INVALID_TIMEOUT                =  20132u,      /* Invalid sock timeout val.                            */
+    NET_SOCK_ERR_INVALID_OPT_LEN                =  20133u,      /* Invalid sock opt len.                                */
+    NET_SOCK_ERR_INVALID_OPT_GET                =  20134u,      /* Error in sock opt get sub-fnct.                      */
+    NET_SOCK_ERR_INVALID_OPT_LEVEL              =  20135u,      /* Incompatible sock opt & opt level.                   */
+
+    NET_SOCK_ERR_INVALID_ADDR                   =  20140u,      /* Invalid sock addr.                                   */
+    NET_SOCK_ERR_INVALID_ADDR_LEN               =  20141u,      /* Invalid sock addr len.                               */
+    NET_SOCK_ERR_ADDR_IN_USE                    =  20142u,      /* Sock addr cur in use.                                */
+
+    NET_SOCK_ERR_INVALID_PORT_NBR               =  20150u,      /* Invalid port nbr.                                    */
+    NET_SOCK_ERR_INVALID_PORT_Q_NBR_USED        =  20151u,      /* Invalid nbr Q entries used.                          */
+    NET_SOCK_ERR_PORT_NBR_NONE_AVAIL            =  20153u,      /* Port nbr(s) NOT avail.                               */
+    NET_SOCK_ERR_PORT_NBR_IN_Q                  =  20154u,      /* Port nbr cur in Q.                                   */
+
+    NET_SOCK_ERR_CONN_IN_USE                    =  20200u,      /* Sock conn cur in use.                                */
+    NET_SOCK_ERR_CONN_IN_PROGRESS               =  20201u,      /* Sock conn        NOT complete.                       */
+    NET_SOCK_ERR_CONN_CLOSED                    =  20205u,      /* Sock conn closed.                                    */
+    NET_SOCK_ERR_CONN_CLOSE_IN_PROGRESS         =  20206u,      /* Sock conn close  NOT complete.                       */
+
+    NET_SOCK_ERR_CONN_FAIL                      =  20210u,      /* Sock conn op         failed.                         */
+    NET_SOCK_ERR_CONN_ABORT                     =  20212u,      /* Sock conn abort      failed.                         */
+
+    NET_SOCK_ERR_CONN_SIGNAL                    =  20220u,      /* Sock conn signal     failed.                         */
+    NET_SOCK_ERR_CONN_SIGNAL_CLR                =  20221u,      /* Sock conn signal clr failed.                         */
+    NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT            =  20222u,      /* Sock conn signal timeout.                            */
+    NET_SOCK_ERR_CONN_SIGNAL_ABORT              =  20223u,      /* Sock conn signal aborted.                            */
+    NET_SOCK_ERR_CONN_SIGNAL_FAULT              =  20224u,      /* Sock conn signal fault.                              */
+
+    NET_SOCK_ERR_CONN_ACCEPT_Q_NONE_AVAIL       =  20230u,      /* Sock conn accept Q conn id's NOT avail.              */
+    NET_SOCK_ERR_CONN_ACCEPT_Q_MAX              =  20232u,      /* Sock conn accept Q max  lim.                         */
+    NET_SOCK_ERR_CONN_ACCEPT_Q_DUP              =  20233u,      /* Sock conn accept Q conn id dup.                      */
+
+    NET_SOCK_ERR_SEL_SIGNAL_FAULT               =  20300u,      /* Create Socket Select signal failed.                  */
+
+    NET_SOCK_ERR_RX_Q_CLOSED                    =  20400u,      /* Rx Q closed; i.e.   do NOT rx   pkt(s) to Q.         */
+    NET_SOCK_ERR_RX_Q_EMPTY                     =  20401u,      /* Rx Q empty;  i.e.      NO  rx'd pkt(s) in Q.         */
+    NET_SOCK_ERR_RX_Q_FULL                      =  20402u,      /* Rx Q full;   i.e. too many rx'd pkt(s) in Q.         */
+    NET_SOCK_ERR_RX_Q_ABORT                     =  20405u,      /* Rx Q abort      failed.                              */
+
+    NET_SOCK_ERR_RX_Q_SIGNAL                    =  20510u,      /* Rx Q signal     failed.                              */
+    NET_SOCK_ERR_RX_Q_SIGNAL_CLR                =  20511u,      /* Rx Q signal clr failed.                              */
+    NET_SOCK_ERR_RX_Q_SIGNAL_TIMEOUT            =  20512u,      /* Rx Q signal timeout.                                 */
+    NET_SOCK_ERR_RX_Q_SIGNAL_ABORT              =  20513u,      /* Rx Q signal aborted.                                 */
+    NET_SOCK_ERR_RX_Q_SIGNAL_FAULT              =  20514u,      /* Rx Q signal fault.                                   */
+
+    NET_SOCK_ERR_TX_Q_CLOSED                    =  20600u,      /* Tx Q closed; i.e. do NOT Q pkt(s) to tx.             */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                    APPLICATION LAYER ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_APP_ERR_NONE                            =  21000u,      /* Network Application operation successful.            */
+
+    NET_APP_ERR_NONE_AVAIL                      =  21010u,      /* NO application resource(s) available.                */
+
+    NET_APP_ERR_INVALID_ARG                     =  21020u,      /* Invalid application argument(s).                     */
+    NET_APP_ERR_INVALID_OP                      =  21021u,      /* Invalid application operation(s).                    */
+    NET_APP_ERR_INVALID_ADDR_LEN                =  21022u,      /* Invalid/unknown/unsupported address length.          */
+    NET_APP_ERR_INVALID_ADDR_FAMILY             =  21023u,      /* Invalid/unknown/unsupported address family.          */
+
+    NET_APP_ERR_FAULT                           =  21030u,      /* Application fatal      fault.                        */
+    NET_APP_ERR_FAULT_TRANSITORY                =  21031u,      /* Application transitory fault.                        */
+
+    NET_APP_ERR_CONN_CLOSED                     =  21040u,      /* Application connection closed.                       */
+    NET_APP_ERR_CONN_IN_PROGRESS                =  21041u,      /* Application connection in progress.                  */
+
+    NET_APP_ERR_DATA_BUF_OVF                    =  21050u,      /* Application data buffer overflow ...                 */
+                                                                /* ... some data MAY have been discarded.               */
+
+    NET_APP_ERR_CONN_FAIL                      =   21060u,      /* Unable to connect with remote host.                  */
+
+
+/*
+---------------------------------------------------------------------------------------------------------
+-                                    NETWORK SECURITY ERROR CODES
+---------------------------------------------------------------------------------------------------------
+*/
+
+    NET_SECURE_ERR_NONE                         =  22000u,      /* Network security operation successful.               */
+
+    NET_SECURE_ERR_INIT_POOL                    =  22001u,      /* Failed to init mem pool.                             */
+    NET_SECURE_ERR_INIT_OS                      =  22002u,      /* Failed to init OS  rsrc(s).                          */
+    NET_SECURE_ERR_NOT_AVAIL                    =  22010u,      /* Failed to get secure obj(s) from mem pool.           */
+
+    NET_SECURE_ERR_LOCK_CREATE                  =  22060u,      /* Failed to create  lock.                              */
+    NET_SECURE_ERR_LOCK_DEL                     =  22061u,      /* Failed to del     lock.                              */
+    NET_SECURE_ERR_LOCK                         =  22062u,      /* Failed to acquire lock.                              */
+    NET_SECURE_ERR_UNLOCK                       =  22063u,      /* Failed to release lock.                              */
+
+    NET_SECURE_ERR_HANDSHAKE                    =  22100u,      /* Failed to perform secure handshake.                  */
+    NET_SECURE_ERR_BLK_GET                      =  22101u,      /* Failed to get  blk from mem pool.                    */
+    NET_SECURE_ERR_BLK_FREE                     =  22102u,      /* Failed to free blk to   mem pool.                    */
+
+    NET_SECURE_ERR_INSTALL                      =  22110u,      /* Keying material failed to install.                   */
+    NET_SECURE_ERR_INSTALL_NOT_TRUSTED          =  22111u,      /* Keying material is NOT trusted.                      */
+    NET_SECURE_ERR_INSTALL_DATE_EXPIRATION      =  22112u,      /* Keying material is expired.                          */
+    NET_SECURE_ERR_INSTALL_DATE_CREATION        =  22113u,      /* Keying material creation date invalid.               */
+    NET_SECURE_ERR_INSTALL_CA_SLOT              =  22114u       /* No more CA slot available.                           */
+
+} NET_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                   BACKWARD COMPATIBILITY DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_ERR_INIT_INCOMPLETE            NET_INIT_ERR_NOT_COMPLETED
+#define  NET_SOCK_ERR_NULL_PTR              NET_ERR_FAULT_NULL_PTR
+#define  NET_SOCK_ERR_API_DIS               NET_ERR_FAULT_FEATURE_DIS
+#define  NET_SOCK_ERR_NULL_SIZE             NET_ERR_FAULT_NULL_PTR
+#define  NET_SOCK_ERR_LINK_DOWN             NET_ERR_IF_LINK_DOWN
+
+
+#define  NET_APP_ERR_NULL_PTR               NET_ERR_FAULT_NULL_PTR
+#define  NET_SOCK_ERR_NULL_PTR              NET_ERR_FAULT_NULL_PTR
+#define  NET_CONN_ERR_NULL_PTR              NET_ERR_FAULT_NULL_PTR
+#define  NET_SOCK_ERR_NULL_SIZE             NET_ERR_FAULT_NULL_PTR
+#define  NET_ASCII_ERR_NULL_PTR             NET_ERR_FAULT_NULL_PTR
+#define  NET_SECURE_ERR_NULL_PTR            NET_ERR_FAULT_NULL_PTR
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_ERR_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_icmp.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_icmp.c
new file mode 100644
index 0000000..b5a2f4b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_icmp.c
@@ -0,0 +1,676 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      NETWORK ICMP GENERIC LAYER
+*                                 (INTERNET CONTROL MESSAGE PROTOCOL)
+*
+* Filename      : net_icmp.c
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    NET_ICMP_MODULE
+#include  "net_icmp.h"
+#include  "net_cfg_net.h"
+
+#ifdef  NET_ICMPv4_MODULE_EN
+#include  "../IP/IPv4/net_icmpv4.h"
+#endif
+#ifdef  NET_ICMPv6_MODULE_EN
+#include  "../IP/IPv6/net_icmpv6.h"
+#endif
+
+#include  
+#include  "net_type.h"
+#include  "net_ip.h"
+#include  "net_err.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_ICMP_LOCK_NAME                 "Net ICMP Lock"
+#define  NET_ICMP_INTERNAL_DATA_SEG_NAME    "Net ICMP internal data"
+#define  NET_ICMP_ECHO_REQ_SEM_NAME         "Net ICMP Echo Req Sem"
+#define  NET_ICMP_ECHO_REQ_POOL_NAME        "Net ICMP echo req pool"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct  net_icmp_echo_req  NET_ICMP_ECHO_REQ;
+
+struct  net_icmp_echo_req {
+    KAL_SEM_HANDLE      Sem;
+    CPU_INT16U          ID;
+    CPU_INT16U          Seq;
+    void               *SrcDataPtr;
+    CPU_INT16U          SrcDataLen;
+    CPU_BOOLEAN         DataCmp;
+    NET_ICMP_ECHO_REQ  *PrevPtr;
+    NET_ICMP_ECHO_REQ  *NextPtr;
+};
+
+typedef  struct  net_icmpv4_data {
+    MEM_SEG            *MemSegPtr;                             /* Mem Seg to alloc from.                               */
+
+    MEM_DYN_POOL        EchoReqPool;
+    NET_ICMP_ECHO_REQ  *EchoReqHandleListStartPtr;
+    NET_ICMP_ECHO_REQ  *EchoReqHandleListEndPtr;
+} NET_ICMP_DATA;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  KAL_LOCK_HANDLE    NetICMP_Lock;
+static  NET_ICMP_DATA     *NetICMP_DataPtr;
+static  CPU_INT16U         NetICMP_ID;
+
+
+/*
+*********************************************************************************************************
+*                                           NetICMP_Init()
+*
+* Description : (1) Initialize Internet Control Message Protocol Layer:
+*
+*                   (a) Initialize ICMP   OS objects
+*                   (b) Initialize ICMPv4 variables if IPv4 is present.
+*                   (c) Initialize ICMPv6 variables if IPv6 is present.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetICMP_Init (NET_ERR  *p_err)
+{
+    MEM_SEG  *p_seg;
+    LIB_ERR   err_lib;
+    KAL_ERR   err_kal;
+
+
+    NetICMP_ID      = 1u;
+    NetICMP_DataPtr = DEF_NULL;
+
+                                                                /* --------------- INITIALIZE ICMP LOCK --------------- */
+                                                                /* Create ICMP lock signal ...                          */
+                                                                /* ... with ICMP access available (see Note #1d1).      */
+    NetICMP_Lock = KAL_LockCreate((const CPU_CHAR *)NET_ICMP_LOCK_NAME,
+                                                    DEF_NULL,
+                                                   &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_MEM_ALLOC:
+             *p_err = NET_ERR_FAULT_MEM_ALLOC;
+              return;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_ICMP_ERR_LOCK_CREATE;
+             return;
+    }
+
+
+    p_seg = DEF_NULL;
+    NetICMP_DataPtr = (NET_ICMP_DATA *)Mem_SegAlloc(NET_ICMP_INTERNAL_DATA_SEG_NAME,
+                                                    p_seg,
+                                                    sizeof(NET_ICMP_DATA),
+                                                   &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = NET_ERR_FAULT_MEM_ALLOC;
+        return;
+    }
+
+    NetICMP_DataPtr->MemSegPtr                 = p_seg;
+    NetICMP_DataPtr->EchoReqHandleListStartPtr = DEF_NULL;
+    NetICMP_DataPtr->EchoReqHandleListEndPtr   = DEF_NULL;
+
+
+    Mem_DynPoolCreate(NET_ICMP_ECHO_REQ_POOL_NAME,
+                     &NetICMP_DataPtr->EchoReqPool,
+                      NetICMP_DataPtr->MemSegPtr,
+                      sizeof(NET_ICMP_ECHO_REQ),
+                      sizeof(CPU_ALIGN),
+                      0u,
+                      LIB_MEM_BLK_QTY_UNLIMITED,
+                     &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = NET_ERR_FAULT_MEM_ALLOC;
+        return;
+    }
+
+
+#ifdef  NET_ICMPv4_MODULE_EN
+    NetICMPv4_Init(p_err);
+    if (*p_err != NET_ICMPv4_ERR_NONE) {
+         return;
+    }
+#endif
+
+#ifdef  NET_ICMPv6_MODULE_EN
+    NetICMPv6_Init();
+#endif
+
+   *p_err = NET_ICMP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetICMP_LockAcquire()
+*
+* Description : Acquire mutually exclusive access to ICMP layer.
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMP_ERR_NONE               Network access     acquired.
+*                               NET_ICMP_ERR_LOCK_ACQUIRE       Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) ICMP access MUST be acquired--i.e. MUST wait for access; do NOT timeout.
+*
+*                       (1) Failure to acquire ICMP access will prevent network task(s)/operation(s)
+*                           from functioning.
+*
+*                   (b) ICMP access MUST be acquired exclusively by only a single task at any one time.
+*
+*                   See also 'NetICMP_LockRelease()  Note #1'.
+*********************************************************************************************************
+*/
+
+void  NetICMP_LockAcquire (NET_ERR  *p_err)
+{
+    KAL_ERR  err_kal;
+                                                                /* Acquire exclusive ICMP access    (see Note #1b) ...  */
+                                                                /* ... without timeout              (see Note #1a) ...  */
+    KAL_LockAcquire(NetICMP_Lock, KAL_OPT_PEND_NONE, KAL_TIMEOUT_INFINITE, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_ICMP_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_LOCK_OWNER:
+            *p_err = NET_ICMP_ERR_LOCK_ACQUIRE;
+             return;
+
+
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_ABORT:
+        case KAL_ERR_TIMEOUT:
+        case KAL_ERR_WOULD_BLOCK:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_ICMP_ERR_LOCK_ACQUIRE;                 /* See Note #1a1.                                       */
+             break;
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                              NetICMP_LockRelease()
+*
+* Description : Release mutually exclusive access to ICMP layer.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) ICMP access MUST be released--i.e. MUST unlock access without failure.
+*
+*                   (a) Failure to release ICMP access will prevent network task(s)/operation(s) from
+*                       functioning.  Thus, ICMP access is assumed to be successfully released since
+*                       NO OS error handling could be performed to counteract failure.
+*
+*                   See also 'NetICMP_LockAcquire()  Note #1'.
+*********************************************************************************************************
+*/
+
+void  NetICMP_LockRelease (void)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_LockRelease(NetICMP_Lock,  &err_kal);                   /* Release exclusive network access.                    */
+
+   (void)&err_kal;                                               /* See Note #1a.                                        */
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetICMP_TxEchoReq()
+*
+* Description : Transmit an ICMPv4 or ICMPv6 echo request message.
+*
+* Argument(s) : p_addr_dest     Pointer to IP destination address to send the ICMP echo request.
+*
+*               addr_len        IP address length :
+*                                   NET_IPv4_ADDR_SIZE
+*                                   NET_IPv6_ADDR_SIZE
+*
+*               timeout_ms      Timeout value to wait for ICMP echo response.
+*
+*               p_data          Pointer to the data buffer to include in the ICMP echo request.
+*
+*               data_len        Number of data buffer octets to include in the ICMP echo request.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMP_ERR_NONE                       ICMP echo request send and response received with success.
+*                               NET_ERR_INVALID_ADDR                    Invalid IP address.
+*                               NET_ERR_FAULT_MEM_ALLOC                 Error with memory allocation.
+*                               NET_ICMP_ERR_ECHO_REQ_TIMEOUT           Echo request timed out.
+*                               NET_ICMP_ERR_ECHO_REQ_SIGNAL_FAULT      Error with the Echo response received signal.
+*                               NET_ICMP_ERR_ECHO_REPLY_DATA_CMP_FAIL   Data received in echo response doesn't match data send.
+*
+*                               -- RETURNED BY NetICMP_LockAcquire() --
+*                               See NetICMP_LockAcquire() for additional returned error codes.
+*
+*                               -- RETURNED BY NetICMPv4_TxEchoReq() --
+*                               See NetICMPv4_TxEchoReq() for additional returned error codes.
+*
+*                               -- RETURNED BY NetICMPv6_TxEchoReq() --
+*                               See NetICMPv6_TxEchoReq() for additional returned error codes.
+*
+* Return(s)   : DEF_OK,   if ICMP echo request message successfully sent to remote host.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application,
+*               NetIxANVL_BgWkr(),
+*               NetIxANVL_Ping(),
+*               NetIxANVL_Ping6(),
+*               NetCmd_Ping4(),
+*               NetCmd_Ping6().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetICMP_TxEchoReq (CPU_INT08U       *p_addr_dest,
+                                NET_IP_ADDR_LEN   addr_len,
+                                CPU_INT32U        timeout_ms,
+                                void             *p_data,
+                                CPU_INT16U        data_len,
+                                NET_ERR          *p_err)
+{
+    NET_ICMP_ECHO_REQ  *p_echo_req_handle_new;
+    NET_ICMP_ECHO_REQ  *p_echo_req_handle_end;
+    CPU_INT16U          seq;
+    CPU_BOOLEAN         result = DEF_FAIL;
+    KAL_SEM_HANDLE      sem_handle;
+    LIB_ERR             lib_err;
+    KAL_ERR             kal_err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if ((addr_len != NET_IPv4_ADDR_SIZE) &&
+        (addr_len != NET_IPv6_ADDR_SIZE)) {
+        *p_err = NET_ERR_INVALID_ADDR;
+    }
+
+#ifndef  NET_IPv4_MODULE_EN
+    if (addr_len == NET_IPv4_ADDR_SIZE) {
+       *p_err = NET_ERR_INVALID_ADDR;
+        goto exit_return;
+    }
+#endif
+
+#ifndef  NET_IPv6_MODULE_EN
+    if (addr_len == NET_IPv6_ADDR_SIZE) {
+       *p_err = NET_ERR_INVALID_ADDR;
+        goto exit_return;
+    }
+#endif
+
+#endif
+
+    NetICMP_LockAcquire(p_err);
+    if (*p_err != NET_ICMP_ERR_NONE) {
+         result = DEF_FAIL;
+         goto exit_return;
+    }
+
+
+    p_echo_req_handle_new = (NET_ICMP_ECHO_REQ *)Mem_DynPoolBlkGet(&NetICMP_DataPtr->EchoReqPool,
+                                                                   &lib_err);
+    if(lib_err != LIB_MEM_ERR_NONE) {
+         result = DEF_FAIL;
+        *p_err  = NET_ERR_FAULT_MEM_ALLOC;
+         goto exit_release_lock;
+    }
+
+    sem_handle = KAL_SemCreate(NET_ICMP_ECHO_REQ_SEM_NAME, DEF_NULL, &kal_err);
+    if (kal_err != KAL_ERR_NONE) {
+        result = DEF_FAIL;
+       *p_err  = NET_ERR_FAULT_MEM_ALLOC;
+        goto exit_kal_fault;
+    }
+
+    p_echo_req_handle_new->Sem = sem_handle;
+
+    if (NetICMP_DataPtr->EchoReqHandleListStartPtr == DEF_NULL) {
+        p_echo_req_handle_new->NextPtr              = DEF_NULL;
+        p_echo_req_handle_new->PrevPtr              = DEF_NULL;
+        NetICMP_DataPtr->EchoReqHandleListStartPtr  = p_echo_req_handle_new;
+        NetICMP_DataPtr->EchoReqHandleListEndPtr    = p_echo_req_handle_new;
+
+    } else {
+        p_echo_req_handle_end                    = NetICMP_DataPtr->EchoReqHandleListEndPtr;
+        p_echo_req_handle_end->NextPtr           = p_echo_req_handle_new;
+
+        p_echo_req_handle_new->PrevPtr           = p_echo_req_handle_end;
+        p_echo_req_handle_new->NextPtr           = DEF_NULL;
+
+        NetICMP_DataPtr->EchoReqHandleListEndPtr = p_echo_req_handle_new;
+    }
+
+    p_echo_req_handle_new->ID = NetICMP_ID;
+    NetICMP_ID++;
+
+    p_echo_req_handle_new->SrcDataPtr = p_data;
+    p_echo_req_handle_new->SrcDataLen = data_len;
+    p_echo_req_handle_new->DataCmp    = DEF_FAIL;
+
+
+    if (addr_len == NET_IPv4_ADDR_SIZE) {
+#ifdef  NET_ICMPv4_MODULE_EN
+        seq = NetICMPv4_TxEchoReq((NET_IPv4_ADDR *)p_addr_dest,
+                                                   p_echo_req_handle_new->ID,
+                                                   p_data,
+                                                   data_len,
+                                                   p_err);
+        if (*p_err != NET_ICMPv4_ERR_NONE) {
+             NetICMP_LockRelease();
+             result = DEF_FAIL;
+             goto release;
+        }
+
+#else
+        NetICMP_LockRelease();
+        result = DEF_FAIL;
+       *p_err  = NET_ERR_INVALID_ADDR;
+        goto release;
+#endif
+
+    } else if (addr_len == NET_IPv6_ADDR_SIZE) {
+
+#ifdef  NET_ICMPv6_MODULE_EN
+        seq = NetICMPv6_TxEchoReq((NET_IPv6_ADDR *)p_addr_dest,
+                                                   p_echo_req_handle_new->ID,
+                                                   p_data,
+                                                   data_len,
+                                                   p_err);
+        if (*p_err != NET_ICMPv6_ERR_NONE) {
+             NetICMP_LockRelease();
+             result = DEF_FAIL;
+             goto release;
+        }
+
+#else
+        NetICMP_LockRelease();
+        result = DEF_FAIL;
+       *p_err  = NET_ERR_INVALID_ADDR;
+        goto release;
+#endif
+
+    } else {
+         NetICMP_LockRelease();
+         result = DEF_FAIL;
+        *p_err = NET_ERR_INVALID_ADDR;
+         goto release;
+    }
+
+    p_echo_req_handle_new->Seq = seq;
+
+    NetICMP_LockRelease();
+
+    KAL_SemPend(sem_handle, KAL_OPT_PEND_NONE, timeout_ms, &kal_err);
+    switch (kal_err) {
+        case KAL_ERR_NONE:
+             result = DEF_OK;
+            *p_err  = NET_ICMP_ERR_NONE;
+             goto release;
+
+        case KAL_ERR_TIMEOUT:
+             result = DEF_FAIL;
+            *p_err  = NET_ICMP_ERR_ECHO_REQ_TIMEOUT;
+             goto release;
+
+        case KAL_ERR_ABORT:
+        case KAL_ERR_ISR:
+        case KAL_ERR_WOULD_BLOCK:
+        case KAL_ERR_OS:
+        default:
+             result = DEF_FAIL;
+            *p_err  = NET_ICMP_ERR_ECHO_REQ_SIGNAL_FAULT;
+             goto release;
+    }
+
+
+release:
+    NetICMP_LockAcquire(p_err);
+
+    KAL_SemDel(sem_handle, &kal_err);
+
+    if (*p_err == NET_ICMP_ERR_NONE) {
+        if (data_len > 0) {
+            if (p_echo_req_handle_new->DataCmp != DEF_OK) {
+                *p_err = NET_ICMP_ERR_ECHO_REPLY_DATA_CMP_FAIL;
+            }
+        }
+    }
+
+    if ((NetICMP_DataPtr->EchoReqHandleListStartPtr == p_echo_req_handle_new) &&
+        (NetICMP_DataPtr->EchoReqHandleListEndPtr   == p_echo_req_handle_new)) {
+
+        NetICMP_DataPtr->EchoReqHandleListStartPtr = DEF_NULL;
+        NetICMP_DataPtr->EchoReqHandleListEndPtr   = DEF_NULL;
+
+    } else if (NetICMP_DataPtr->EchoReqHandleListStartPtr == p_echo_req_handle_new) {
+        NetICMP_DataPtr->EchoReqHandleListStartPtr = p_echo_req_handle_new->NextPtr;
+
+    } else if (NetICMP_DataPtr->EchoReqHandleListEndPtr == p_echo_req_handle_new) {
+        NetICMP_DataPtr->EchoReqHandleListEndPtr = p_echo_req_handle_new->PrevPtr;
+
+    } else {
+        p_echo_req_handle_end          = p_echo_req_handle_new->PrevPtr;
+        p_echo_req_handle_end->NextPtr = p_echo_req_handle_new->NextPtr;
+    }
+
+    p_echo_req_handle_new->NextPtr = DEF_NULL;
+    p_echo_req_handle_new->PrevPtr = DEF_NULL;
+
+
+
+exit_kal_fault:
+    Mem_DynPoolBlkFree(&NetICMP_DataPtr->EchoReqPool,
+                        p_echo_req_handle_new,
+                       &lib_err);
+
+
+exit_release_lock:
+    NetICMP_LockRelease();
+
+
+exit_return:
+    return (result);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetICMP_RxEchoReply()
+*
+* Description : (1) Received a ICMPv4 or ICMPv6 Echo Reply message.
+*               (2) Compare date received with data sent.
+*
+*
+* Argument(s) : id          ICMP message ID.
+*
+*               seq         ICMP sequence number.
+*
+*               p_data      Pointer to data received in the ICMP reply message.
+*
+*               data_len    ICMP reply message data length.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ICMP_ERR_NONE               ICMP echo reply received successfully.
+*                               NET_ICMP_ERR_SIGNAL_FAULT       Error in posting ICMP request semaphore.
+*                               NET_ICMP_ERR_ECHO_REPLY_RX      ICMP echo reply received does not match a echo
+*                                                                   request send.
+*
+*                               ------------- RETURNED BY NetICMP_LockAcquire() -------------
+*                               NET_ICMP_ERR_LOCK_ACQUIRE   Error in acquiring the ICMP lock.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetICMPv4_RxReplyDemux(),
+*               NetICMPv6_RxReplyDemux().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetICMP_RxEchoReply (CPU_INT16U   id,
+                           CPU_INT16U   seq,
+                           CPU_INT08U  *p_data,
+                           CPU_INT16U   data_len,
+                           NET_ERR     *p_err)
+{
+    NET_ICMP_ECHO_REQ  *p_icmp_echo_req;
+    KAL_ERR             kal_err;
+
+
+    NetICMP_LockAcquire(p_err);
+    if (*p_err != NET_ICMP_ERR_NONE) {
+         goto exit_fail;
+    }
+
+    p_icmp_echo_req = NetICMP_DataPtr->EchoReqHandleListStartPtr;
+    while (p_icmp_echo_req != DEF_NULL) {
+        if ((p_icmp_echo_req->ID  == id ) &&
+            (p_icmp_echo_req->Seq == seq)) {
+
+            if (p_icmp_echo_req->SrcDataPtr != DEF_NULL) {
+
+                if (p_icmp_echo_req->SrcDataLen != data_len) {
+                    p_icmp_echo_req->DataCmp = DEF_FAIL;
+                } else {
+                    p_icmp_echo_req->DataCmp = Mem_Cmp((void *)p_data,
+                                                               p_icmp_echo_req->SrcDataPtr,
+                                                               data_len);
+                }
+
+            } else if (data_len == 0u) {
+                p_icmp_echo_req->DataCmp = DEF_OK;
+
+            } else {
+                p_icmp_echo_req->DataCmp = DEF_FAIL;
+            }
+
+            KAL_SemPost(p_icmp_echo_req->Sem, KAL_OPT_PEND_NONE, &kal_err);
+            if (kal_err != KAL_ERR_NONE) {
+               *p_err = NET_ICMP_ERR_SIGNAL_FAULT;
+                goto exit_release_lock;
+            }
+
+           *p_err = NET_ICMP_ERR_NONE;
+            goto exit_release_lock;
+        }
+
+        p_icmp_echo_req = p_icmp_echo_req->NextPtr;
+    }
+
+   *p_err = NET_ICMP_ERR_ECHO_REPLY_RX;
+
+exit_release_lock:
+    NetICMP_LockRelease();
+
+exit_fail:
+    return;
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_icmp.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_icmp.h
new file mode 100644
index 0000000..391e151
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_icmp.h
@@ -0,0 +1,120 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      NETWORK ICMP GENERIC LAYER
+*                                 (INTERNET CONTROL MESSAGE PROTOCOL)
+*
+* Filename      : net_icmp.h
+* Version       : V3.04.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : none
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  "net_err.h"
+#include  "net_ip.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_ICMP_MODULE_PRESENT
+#define  NET_ICMP_MODULE_PRESENT
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetICMP_TxEchoReq(CPU_INT08U       *p_addr_dest,
+                               NET_IP_ADDR_LEN   addr_len,
+                               CPU_INT32U        timeout_ms,
+                               void             *p_data,
+                               CPU_INT16U        data_len,
+                               NET_ERR          *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+
+void  NetICMP_Init       (NET_ERR  *p_err);
+
+void  NetICMP_LockAcquire(NET_ERR  *p_err);
+
+void  NetICMP_LockRelease(void);
+
+void  NetICMP_RxEchoReply(CPU_INT16U   id,
+                          CPU_INT16U   seq,
+                          CPU_INT08U  *p_data,
+                          CPU_INT16U   data_len,
+                          NET_ERR     *p_err);
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+#endif  /* NET_ICMP_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ip.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ip.c
new file mode 100644
index 0000000..b8a73f6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ip.c
@@ -0,0 +1,147 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK IP GENERIC LAYER
+*                                         (INTERNET PROTOCOL)
+*
+* Filename      : net_ip.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SL
+*********************************************************************************************************
+* Note(s)       : (1) This module is responsible to initialize different IP version enabled.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_IP_MODULE
+#include  "net_ip.h"
+#include  "net_cfg_net.h"
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_ipv4.h"
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ipv6.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             NetIP_Init()
+*
+* Description : Initialize IP modules.
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetIP_Init (NET_ERR  *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NetIPv4_Init();
+   *p_err = NET_ERR_NONE;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    NetIPv6_Init(p_err);
+    if (*p_err == NET_IPv6_ERR_NONE) {
+        *p_err = NET_ERR_NONE;
+    }
+#endif
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                      NetIP_IF_Init()
+*
+* Description : Initialize IP objects for given Interface.
+*
+* Argument(s) : if_nbr      Network Interface number to initialize.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_NONE
+*
+*                               ----------- RETURNED BY NetIF_LinkStateSubscribeHandler() : ------------
+*                               See NetIF_LinkStateSubscribeHandler() for additional return error codes.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetIF_Add().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+void  NetIP_IF_Init (NET_IF_NBR   if_nbr,
+                     NET_ERR     *p_err)
+{
+
+#ifdef  NET_IPv4_MODULE_EN
+   *p_err = NET_ERR_NONE;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+                                                                /* --------- INIT IPv6 LINK CHANGE SUBSCRIBE ---------- */
+    NetIF_LinkStateSubscribeHandler(if_nbr,
+                                   &NetIPv6_LinkStateSubscriber,
+                                    p_err);
+    switch (*p_err) {
+        case NET_IF_ERR_NONE:
+            *p_err = NET_ERR_NONE;
+             break;
+
+
+        default:
+            return;
+    }
+#endif
+
+    (void)&if_nbr;
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ip.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ip.h
new file mode 100644
index 0000000..c7cfed9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ip.h
@@ -0,0 +1,267 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK IP LAYER
+*                                         (INTERNET PROTOCOL)
+*
+* Filename      : net_ip.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 SL
+*********************************************************************************************************
+* Note(s)       : (1) This module is responsible to initialize different IP version enabled.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  "net_def.h"
+#include  "net_type.h"
+#include  "../IF/net_if.h"
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IP_MODULE_PRESENT
+#define  NET_IP_MODULE_PRESENT
+
+#ifdef   NET_IP_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  IP HEADER PROTOCOL FIELD DEFINES
+*
+* Note(s) : (1) Supports ONLY a subset of allowed protocol numbers :
+*
+*               (a) ICMP
+*               (b) IGMP
+*               (c) UDP
+*               (d) TCP
+*               (e) ICMPv6
+*
+*               See also 'net.h  Note #2a';
+*                  & see 'RFC #1340  Assigned Numbers' for a complete list of protocol numbers,
+*                  & see 'RFC #2463,  Section 1' for ICMPv6 protocol number.
+*********************************************************************************************************
+*/
+
+
+#define  NET_IP_HDR_PROTOCOL_EXT_HOP_BY_HOP                0u
+#define  NET_IP_HDR_PROTOCOL_ICMP                          1u
+#define  NET_IP_HDR_PROTOCOL_IGMP                          2u
+#define  NET_IP_HDR_PROTOCOL_TCP                           6u
+#define  NET_IP_HDR_PROTOCOL_UDP                          17u
+#define  NET_IP_HDR_PROTOCOL_EXT_ROUTING                  43u
+#define  NET_IP_HDR_PROTOCOL_EXT_FRAG                     44u
+#define  NET_IP_HDR_PROTOCOL_EXT_ESP                      50u
+#define  NET_IP_HDR_PROTOCOL_EXT_AUTH                     51u
+#define  NET_IP_HDR_PROTOCOL_ICMPv6                       58u
+#define  NET_IP_HDR_PROTOCOL_EXT_NONE                     59u
+#define  NET_IP_HDR_PROTOCOL_EXT_DEST                     60u
+#define  NET_IP_HDR_PROTOCOL_EXT_MOBILITY                 135u
+
+
+
+/*
+*********************************************************************************************************
+*                                           IP FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET IP FLAGS ------------------- */
+#define  NET_IPv4_FLAG_NONE                           DEF_BIT_NONE
+
+#define  NET_IPv6_FLAG_NONE                           DEF_BIT_NONE
+#define  NET_IPv6_FLAG                                DEF_BIT_00
+
+                                                                /* IPv6 tx flags copied from IP hdr flags.              */
+#define  NET_IPv6_FLAG_TX_DONT_FRAG                   NET_IPv6_HDR_FLAG_FRAG_DONT
+
+#define  NET_IP_FRAG_SIZE_NONE                        DEF_INT_16U_MAX_VAL
+
+/*
+*********************************************************************************************************
+*                                        IP ADDRESS DATA DEFINES
+*********************************************************************************************************
+*/
+
+#if     (defined(NET_IPv4_MODULE_EN) && !defined(NET_IPv6_MODULE_EN))
+#define  NET_IP_MAX_ADDR_SIZE                        NET_IPv4_ADDR_SIZE
+#elif  (!defined(NET_IPv4_MODULE_EN) &&  defined(NET_IPv6_MODULE_EN))
+#define  NET_IP_MAX_ADDR_SIZE                        NET_IPv6_ADDR_SIZE
+#elif   (defined(NET_IPv4_MODULE_EN) &&  defined(NET_IPv6_MODULE_EN))
+#define  NET_IP_MAX_ADDR_SIZE                        NET_IPv6_ADDR_SIZE
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_IP_ADDR_LEN;
+
+
+/*
+*********************************************************************************************************
+*                                        IP ADDRESS DATA TYPES
+*
+* Note(s) : (1) 'NET_IP_ADDR' pre-defined in 'net_type.h' PRIOR to all other network modules that require
+*                IP address data type.
+*
+*           (2) 'NET_IP_ADDRS_QTY_MAX'  SHOULD be #define'd based on 'NET_IP_ADDRS_QTY' data type declared.
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+typedef  CPU_INT32U  NET_IP_ADDR;                               /* Defines IP IPv4 addr size.                           */
+#endif
+
+
+typedef  CPU_INT08U  NET_IP_ADDRS_QTY;                          /* Defines max qty of IP addrs per IF to support.       */
+
+#define  NET_IP_ADDRS_QTY_MIN                              1
+#define  NET_IP_ADDRS_QTY_MAX            DEF_INT_08U_MAX_VAL    /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void  NetIP_Init    (NET_ERR     *p_err);
+
+void  NetIP_IF_Init (NET_IF_NBR   if_nbr,
+                     NET_ERR     *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_IPv4_CFG_IF_MAX_NBR_ADDR
+#error  "NET_IPv4_CFG_IF_MAX_NBR_ADDR        not #define'd in 'net_cfg.h'"
+#error  "                              [MUST be  >= NET_IP_ADDRS_QTY_MIN]"
+#error  "                              [     &&  <= NET_IP_ADDRS_QTY_MAX]"
+
+#elif   (DEF_CHK_VAL(NET_IPv4_CFG_IF_MAX_NBR_ADDR,  \
+                     NET_IP_ADDRS_QTY_MIN,          \
+                     NET_IP_ADDRS_QTY_MAX) != DEF_OK)
+#error  "NET_IPv4_CFG_IF_MAX_NBR_ADDR  illegally #define'd in 'net_cfg.h'"
+#error  "                              [MUST be  >= NET_IP_ADDRS_QTY_MIN]"
+#error  "                              [     &&  <= NET_IP_ADDRS_QTY_MAX]"
+#endif
+
+
+
+#ifndef  NET_IPv6_CFG_IF_MAX_NBR_ADDR
+#error  "NET_IPv6_CFG_IF_MAX_NBR_ADDR        not #define'd in 'net_cfg.h'"
+#error  "                              [MUST be  >= NET_IP_ADDRS_QTY_MIN]"
+#error  "                              [     &&  <= NET_IP_ADDRS_QTY_MAX]"
+
+#elif   (DEF_CHK_VAL(NET_IPv6_CFG_IF_MAX_NBR_ADDR,  \
+                     NET_IP_ADDRS_QTY_MIN,          \
+                     NET_IP_ADDRS_QTY_MAX) != DEF_OK)
+#error  "NET_IPv6_CFG_IF_MAX_NBR_ADDR  illegally #define'd in 'net_cfg.h'"
+#error  "                              [MUST be  >= NET_IP_ADDRS_QTY_MIN]"
+#error  "                              [     &&  <= NET_IP_ADDRS_QTY_MAX]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+#endif                                                          /* End of net ip module include.                        */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_mgr.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_mgr.c
new file mode 100644
index 0000000..670a4b3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_mgr.c
@@ -0,0 +1,782 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      NETWORK LAYER MANAGEMENT
+*
+* Filename      : net_mgr.c
+* Version       : V3.04.02
+* Programmer(s) : SR
+*********************************************************************************************************
+* Note(s)       : (1) Network layer manager MAY eventually maintain each interface's network address(s)
+*                     & address configuration. #### NET-809
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_MGR_MODULE
+#include  "net_mgr.h"
+#include  "net_cfg_net.h"
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_ipv4.h"
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ipv6.h"
+#endif
+
+
+#include  "net_err.h"
+#include  "../IF/net_if.h"
+
+
+/*
+*********************************************************************************************************
+*                                            NetMgr_Init()
+*
+* Description : (1) Initialize Network Layer Management Module :
+*
+*                   Module initialization NOT yet required/implemented
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MGR_ERR_NONE            Network manager module successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetMgr_Init (NET_ERR  *p_err)
+{
+   *p_err = NET_MGR_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetMgr_GetHostAddrProtocol()
+*
+* Description : Get an interface's protocol address(s) [see Note #1].
+*
+* Argument(s) : if_nbr                      Interface number to get protocol address(s).
+*
+*               protocol_type               Protocol address type.
+*
+*               p_addr_protocol_tbl         Pointer to a protocol address table that will receive the protocol
+*                                               address(s) in network-order for this interface.
+*
+*               p_addr_protocol_tbl_qty     Pointer to a variable to ... :
+*
+*                                               (a) Pass the size of the protocol address table, in number of
+*                                                       protocol address(s), pointed to by 'p_addr_protocol_tbl'.
+*                                               (b) (1) Return the actual number of protocol address(s),
+*                                                           if NO error(s);
+*                                                   (2) Return 0, otherwise.
+*
+*               p_addr_protocol_len         Pointer to a variable to ... :
+*
+*                                               (a) Pass the length of the protocol address table address(s),
+*                                                       in octets.
+*                                               (b) (1) Return the actual length of the protocol  address(s),
+*                                                           in octets, if NO error(s);
+*                                                   (2) Return 0, otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MGR_ERR_NONE                    Interface's protocol address(s)
+*                                                                       successfully returned.
+*                               NET_ERR_FAULT_UNKNOWN_ERR           Interface's protocol address(s) NOT
+*                                                                       successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR              Argument(s) passed a NULL pointer.
+*                               NET_MGR_ERR_INVALID_PROTOCOL        Invalid/unsupported network protocol.
+*                               NET_MGR_ERR_INVALID_PROTOCOL_LEN    Invalid protocol address length.
+*                               NET_MGR_ERR_ADDR_TBL_SIZE           Invalid protocol address table size.
+*                               NET_MGR_ERR_ADDR_CFG_IN_PROGRESS    Interface in address configuration/
+*                                                                       initialization state.
+*
+*                                                                   - RETURNED BY Net&&&_GetHostAddrProtocol() : -
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_RxPktIsTargetThisHost().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Protocol address(s) returned in network-order.
+*********************************************************************************************************
+*/
+
+void  NetMgr_GetHostAddrProtocol (NET_IF_NBR          if_nbr,
+                                  NET_PROTOCOL_TYPE   protocol_type,
+                                  CPU_INT08U         *p_addr_protocol_tbl,
+                                  CPU_INT08U         *p_addr_protocol_tbl_qty,
+                                  CPU_INT08U         *p_addr_protocol_len,
+                                  NET_ERR            *p_err)
+{
+    NET_ERR  err;
+
+
+    switch (protocol_type) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V4:
+             NetIPv4_GetHostAddrProtocol(if_nbr,
+                                         p_addr_protocol_tbl,
+                                         p_addr_protocol_tbl_qty,
+                                         p_addr_protocol_len,
+                                        &err);
+             switch (err) {
+                 case NET_IF_ERR_INVALID_IF:
+                     *p_err = err;
+                      break;
+
+
+                 case NET_IPv4_ERR_NONE:
+                     *p_err = NET_MGR_ERR_NONE;
+                      break;
+
+
+                 case NET_ERR_FAULT_NULL_PTR:
+                     *p_err = NET_ERR_FAULT_NULL_PTR;
+                      break;
+
+
+                 case NET_IPv4_ERR_INVALID_ADDR_LEN:
+                     *p_err = NET_MGR_ERR_INVALID_PROTOCOL_LEN;
+                      break;
+
+
+                 case NET_IPv4_ERR_ADDR_TBL_SIZE:
+                     *p_err = NET_MGR_ERR_ADDR_TBL_SIZE;
+                      break;
+
+
+                 case NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS:
+                     *p_err = NET_MGR_ERR_ADDR_CFG_IN_PROGRESS;
+                      break;
+
+
+                 default:
+                     *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+                      break;
+             }
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V6:
+             NetIPv6_GetHostAddrProtocol(if_nbr,
+                                         p_addr_protocol_tbl,
+                                         p_addr_protocol_tbl_qty,
+                                         p_addr_protocol_len,
+                                        &err);
+             switch (err) {
+                 case NET_IF_ERR_INVALID_IF:
+                     *p_err = err;
+                      break;
+
+
+                 case NET_IPv6_ERR_NONE:
+                     *p_err = NET_MGR_ERR_NONE;
+                      break;
+
+
+                 case NET_ERR_FAULT_NULL_PTR:
+                     *p_err = NET_ERR_FAULT_NULL_PTR;
+                      break;
+
+
+                 case NET_IPv6_ERR_INVALID_ADDR_LEN:
+                     *p_err = NET_MGR_ERR_INVALID_PROTOCOL_LEN;
+                      break;
+
+
+                 case NET_IPv6_ERR_ADDR_TBL_SIZE:
+                     *p_err = NET_MGR_ERR_ADDR_TBL_SIZE;
+                      break;
+
+
+                 case NET_IPv6_ERR_ADDR_CFG_IN_PROGRESS:
+                     *p_err = NET_MGR_ERR_ADDR_CFG_IN_PROGRESS;
+                      break;
+
+
+                 default:
+                     *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+                      break;
+             }
+             break;
+#endif
+
+        default:
+            *p_addr_protocol_tbl_qty = 0u;
+            *p_addr_protocol_len     = 0u;
+            *p_err                   = NET_MGR_ERR_INVALID_PROTOCOL;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetMgr_GetHostAddrProtocolIF_Nbr()
+*
+* Description : Get the interface number for a protocol address.
+*
+* Argument(s) : protocol_type       Address    protocol type.
+*
+*               p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MGR_ERR_NONE                    Protocol address's interface number
+*                                                                           successfully returned.
+*                               NET_ERR_FAULT_UNKNOWN_ERR                   Protocol address's interface number
+*                                                                       NOT successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR                Argument(s) passed a NULL pointer.
+*                               NET_MGR_ERR_INVALID_PROTOCOL        Invalid/unsupported network protocol.
+*                               NET_MGR_ERR_INVALID_PROTOCOL_LEN    Invalid protocol address length.
+*                               NET_MGR_ERR_INVALID_PROTOCOL_ADDR   Protocol address NOT used by host.
+*
+* Return(s)   : Interface number for the protocol address, if configured on this host.
+*
+*               Interface number of  a   protocol address
+*                   in address initialization,             if any.
+*
+*               NET_IF_NBR_LOCAL_HOST,                     for a localhost address.
+*
+*               NET_IF_NBR_NONE,                           otherwise.
+*
+* Caller(s)   : NetARP_TxReqGratuitous(),
+*               NetARP_ProbeAddrOnNet().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+NET_IF_NBR  NetMgr_GetHostAddrProtocolIF_Nbr (NET_PROTOCOL_TYPE   protocol_type,
+                                              CPU_INT08U         *p_addr_protocol,
+                                              CPU_INT08U          addr_protocol_len,
+                                              NET_ERR            *p_err)
+{
+#ifdef  NET_IP_MODULE_EN
+    NET_ERR     err;
+#endif
+    NET_IF_NBR  if_nbr;
+
+
+    switch (protocol_type) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V4:
+             if_nbr = NetIPv4_GetAddrProtocolIF_Nbr(p_addr_protocol,
+                                                    addr_protocol_len,
+                                                   &err);
+             switch (err) {
+                 case NET_IPv4_ERR_NONE:
+                     *p_err = NET_MGR_ERR_NONE;
+                      break;
+
+
+                 case NET_ERR_FAULT_NULL_PTR:
+                     *p_err = NET_ERR_FAULT_NULL_PTR;
+                      break;
+
+
+                 case NET_IPv4_ERR_INVALID_ADDR_HOST:
+                     *p_err = NET_MGR_ERR_INVALID_PROTOCOL_ADDR;
+                      break;
+
+
+                 case NET_IPv4_ERR_INVALID_ADDR_LEN:
+                     *p_err = NET_MGR_ERR_INVALID_PROTOCOL_LEN;
+                      break;
+
+
+                 default:
+                     *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+                      break;
+             }
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V6:
+             if_nbr = NetIPv6_GetAddrProtocolIF_Nbr(p_addr_protocol,
+                                                    addr_protocol_len,
+                                                   &err);
+             switch (err) {
+                 case NET_IPv6_ERR_NONE:
+                     *p_err = NET_MGR_ERR_NONE;
+                      break;
+
+
+                 case NET_ERR_FAULT_NULL_PTR:
+                     *p_err = NET_ERR_FAULT_NULL_PTR;
+                      break;
+
+
+                 case NET_IPv6_ERR_INVALID_ADDR_HOST:
+                     *p_err = NET_MGR_ERR_INVALID_PROTOCOL_ADDR;
+                      break;
+
+
+                 case NET_IPv6_ERR_INVALID_ADDR_LEN:
+                     *p_err = NET_MGR_ERR_INVALID_PROTOCOL_LEN;
+                      break;
+
+
+                 default:
+                     *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+                      break;
+             }
+             break;
+#endif
+
+        default:
+             if_nbr = NET_IF_NBR_NONE;
+            *p_err  = NET_MGR_ERR_INVALID_PROTOCOL;
+             break;
+    }
+
+    return (if_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetMgr_IsValidAddrProtocol()
+*
+* Description : Validate a protocol address.
+*
+* Argument(s) : protocol_type       Address    protocol type.
+*
+*               p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+* Return(s)   : DEF_YES, if protocol address valid.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetARP_RxPktValidate().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetMgr_IsValidAddrProtocol (NET_PROTOCOL_TYPE   protocol_type,
+                                         CPU_INT08U         *p_addr_protocol,
+                                         CPU_INT08U          addr_protocol_len)
+{
+    CPU_BOOLEAN  valid;
+
+
+    switch (protocol_type) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V4:
+             valid = NetIPv4_IsValidAddrProtocol(p_addr_protocol, addr_protocol_len);
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V6:
+             valid = NetIPv6_IsValidAddrProtocol(p_addr_protocol, addr_protocol_len);
+             break;
+#endif
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             valid = DEF_NO;
+             break;
+    }
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetMgr_IsAddrsCfgdOnIF()
+*
+* Description : Check if any address(s) configured on an interface.
+*
+* Argument(s) : if_nbr      Interface number to check for configured address(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MGR_ERR_NONE                Configured address(s) availability
+*                                                                        successfully returned.
+*                               NET_ERR_FAULT_UNKNOWN_ERR               Interface's address(s) availability
+*                                                                    NOT successfully returned.
+*
+*                                                               - RETURNED BY Net&&&_IsAddrsCfgdOnIF() : -
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*
+* Return(s)   : DEF_YES, if any protocol address(s) configured on interface.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetIF_GetDflt().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network layer manager SHOULD check configured address(s) availability based on
+*                   address(s)' protocol type.
+*
+*                   See also 'net_mgr.c  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetMgr_IsAddrsCfgdOnIF (NET_IF_NBR   if_nbr,
+                                     NET_ERR     *p_err)
+{
+    CPU_BOOLEAN  addr_availv4;
+    CPU_BOOLEAN  addr_availv6;
+    NET_ERR      err;
+
+#ifdef  NET_IPv4_MODULE_EN
+    addr_availv4 = NetIPv4_IsAddrsCfgdOnIF_Handler(if_nbr, &err);
+    switch (err) {
+        case NET_IF_ERR_INVALID_IF:
+            *p_err = err;
+             break;
+
+
+        case NET_IPv4_ERR_NONE:
+            *p_err = NET_MGR_ERR_NONE;
+             break;
+
+
+        default:
+            *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+             break;
+    }
+#else
+    addr_availv4 = DEF_NO;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+    addr_availv6 = NetIPv6_IsAddrsCfgdOnIF_Handler(if_nbr, &err);
+    switch (err) {
+        case NET_IF_ERR_INVALID_IF:
+            *p_err = err;
+             break;
+
+
+        case NET_IPv6_ERR_NONE:
+            *p_err = NET_MGR_ERR_NONE;
+             break;
+
+
+        default:
+            *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+             break;
+    }
+#else
+    addr_availv6 = DEF_NO;
+#endif
+
+
+
+    return ((addr_availv4 || addr_availv6));
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetMgr_IsAddrProtocolInit()
+*
+* Description : Validate a protocol address as the initialization address.
+*
+* Argument(s) : protocol_type       Address    protocol type.
+*
+*               p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+* Return(s)   : DEF_YES, if protocol address is the protocol's initialization address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetARP_RxPktIsTargetThisHost().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetMgr_IsAddrProtocolInit (NET_PROTOCOL_TYPE   protocol_type,
+                                        CPU_INT08U         *p_addr_protocol,
+                                        CPU_INT08U          addr_protocol_len)
+{
+    CPU_BOOLEAN  addr_init;
+
+
+    switch (protocol_type) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V4:
+             addr_init = NetIPv4_IsAddrInit(p_addr_protocol, addr_protocol_len);
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V6:
+             addr_init = NetIPv6_IsAddrInit(p_addr_protocol, addr_protocol_len);
+             break;
+#endif
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             addr_init = DEF_NO;
+             break;
+    }
+
+    return (addr_init);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetMgr_IsAddrProtocolMulticast()
+*
+* Description : Validate a protocol address as a multicast address.
+*
+* Argument(s) : protocol_type       Address    protocol type.
+*
+*               p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length  of protocol address (in octets).
+*
+* Return(s)   : DEF_YES, if protocol address is a multicast address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetARP_CacheHandler().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_MCAST_MODULE_EN
+CPU_BOOLEAN  NetMgr_IsAddrProtocolMulticast (NET_PROTOCOL_TYPE   protocol_type,
+                                             CPU_INT08U         *p_addr_protocol,
+                                             CPU_INT08U          addr_protocol_len)
+{
+    CPU_BOOLEAN  addr_multicast;
+
+
+    switch (protocol_type) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V4:
+             addr_multicast = NetIPv4_IsAddrProtocolMulticast(p_addr_protocol, addr_protocol_len);
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V6:
+             addr_multicast = NetIPv6_IsAddrProtocolMulticast(p_addr_protocol, addr_protocol_len);
+             break;
+#endif
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             addr_multicast = DEF_NO;
+             break;
+    }
+
+    return (addr_multicast);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NetMgr_IsAddrProtocolConflict()
+*
+* Description : Get interface's protocol address conflict status.
+*
+* Argument(s) : if_nbr      Interface number to get protocol address conflict status.
+*
+* Return(s)   : DEF_YES, if protocol address conflict detected.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetARP_IsAddrProtocolConflict().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network layer manager SHOULD get address conflict status based on address's
+*                   protocol type.
+*
+*                   See also 'net_mgr.c  Note #1'.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+CPU_BOOLEAN  NetMgr_IsAddrProtocolConflict (NET_IF_NBR  if_nbr)
+{
+    CPU_BOOLEAN  addr_conflict;
+
+
+    addr_conflict = NetIPv4_IsAddrProtocolConflict(if_nbr);
+
+    return (addr_conflict);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetMgr_ChkAddrProtocolConflict()
+*
+* Description : Check for any protocol address conflict between this interface's host address(s) & other
+*                   host(s) on the local network.
+*
+* Argument(s) : if_nbr              Interface number to check protocol address conflict.
+*
+*               protocol_type       Protocol address type.
+*
+*               p_addr_protocol     Pointer to protocol address (see Note #1).
+*
+*               addr_protocol_len   Length of  protocol address (in octets).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_MGR_ERR_NONE                    Interface's protocol address conflict
+*                                                                            successfully checked.
+*                               NET_ERR_FAULT_UNKNOWN_ERR                   Interface's protocol address conflict
+*                                                                        NOT successfully returned.
+*                               NET_ERR_FAULT_NULL_PTR                Argument(s) passed a NULL pointer.
+*                               NET_MGR_ERR_INVALID_PROTOCOL        Invalid/unsupported network protocol.
+*                               NET_MGR_ERR_INVALID_PROTOCOL_LEN    Invalid protocol address length.
+*                               NET_MGR_ERR_ADDR_TBL_SIZE           Invalid protocol address table size.
+*                               NET_MGR_ERR_ADDR_CFG_IN_PROGRESS    Interface in address configuration/
+*                                                                       initialization state.
+*
+*                                                                   - RETURNED BY Net&&&_ChkAddrProtocolConflict() : -
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetARP_RxPktIsTargetThisHost().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Protocol address MUST be in network-order.
+*********************************************************************************************************
+*/
+
+void  NetMgr_ChkAddrProtocolConflict (NET_IF_NBR          if_nbr,
+                                      NET_PROTOCOL_TYPE   protocol_type,
+                                      CPU_INT08U         *p_addr_protocol,
+                                      CPU_INT08U          addr_protocol_len,
+                                      NET_ERR            *p_err)
+{
+#ifdef  NET_IP_MODULE_EN
+    NET_ERR  err;
+#endif
+
+    switch (protocol_type) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_IP_V4:
+             NetIPv4_ChkAddrProtocolConflict(if_nbr,
+                                             p_addr_protocol,
+                                             addr_protocol_len,
+                                            &err);
+             switch (err) {
+                 case NET_IF_ERR_INVALID_IF:
+                     *p_err = err;
+                      break;
+
+
+                 case NET_IPv4_ERR_NONE:
+                     *p_err = NET_MGR_ERR_NONE;
+                      break;
+
+
+                 case NET_ERR_FAULT_NULL_PTR:
+                     *p_err = NET_ERR_FAULT_NULL_PTR;
+                      break;
+
+
+                 case NET_IPv4_ERR_INVALID_ADDR_LEN:
+                     *p_err = NET_MGR_ERR_INVALID_PROTOCOL_LEN;
+                      break;
+
+
+                 case NET_IPv4_ERR_ADDR_TBL_SIZE:
+                     *p_err = NET_MGR_ERR_ADDR_TBL_SIZE;
+                      break;
+
+
+                 case NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS:
+                     *p_err = NET_MGR_ERR_ADDR_CFG_IN_PROGRESS;
+                      break;
+
+
+                 default:
+                     *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+                      break;
+             }
+             break;
+#endif
+
+        case NET_PROTOCOL_TYPE_IP_V6:
+        default:
+            *p_err = NET_MGR_ERR_INVALID_PROTOCOL;
+             break;
+    }
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_mgr.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_mgr.h
new file mode 100644
index 0000000..2fcabd9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_mgr.h
@@ -0,0 +1,153 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      NETWORK LAYER MANAGEMENT
+*
+* Filename      : net_mgr.h
+* Version       : V3.04.02
+* Programmer(s) : SR
+*********************************************************************************************************
+* Note(s)       : (1) Network layer manager MAY eventually maintain each interface's network address(s)
+*                     & address configuration. #### NET-809
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  "net_err.h"
+#include  "../IF/net_if.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_MGR_MODULE_PRESENT
+#define  NET_MGR_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void         NetMgr_Init                     (NET_ERR            *p_err);
+
+
+                                                                                    /* ------ NET MGR ADDR FNCTS ------ */
+void         NetMgr_GetHostAddrProtocol      (NET_IF_NBR          if_nbr,
+                                              NET_PROTOCOL_TYPE   protocol_type,
+                                              CPU_INT08U         *p_addr_protocol_tbl,
+                                              CPU_INT08U         *p_addr_protocol_tbl_qty,
+                                              CPU_INT08U         *p_addr_protocol_len,
+                                              NET_ERR            *p_err);
+
+NET_IF_NBR   NetMgr_GetHostAddrProtocolIF_Nbr(NET_PROTOCOL_TYPE   protocol_type,
+                                              CPU_INT08U         *p_addr_protocol,
+                                              CPU_INT08U          addr_protocol_len,
+                                              NET_ERR            *p_err);
+
+
+CPU_BOOLEAN  NetMgr_IsValidAddrProtocol      (NET_PROTOCOL_TYPE   protocol_type,
+                                              CPU_INT08U         *p_addr_protocol,
+                                              CPU_INT08U          addr_protocol_len);
+
+CPU_BOOLEAN  NetMgr_IsAddrsCfgdOnIF          (NET_IF_NBR          if_nbr,
+                                              NET_ERR            *p_err);
+
+CPU_BOOLEAN  NetMgr_IsAddrProtocolInit       (NET_PROTOCOL_TYPE   protocol_type,
+                                              CPU_INT08U         *p_addr_protocol,
+                                              CPU_INT08U          addr_protocol_len);
+
+#ifdef  NET_MCAST_MODULE_EN
+CPU_BOOLEAN  NetMgr_IsAddrProtocolMulticast  (NET_PROTOCOL_TYPE   protocol_type,
+                                              CPU_INT08U         *p_addr_protocol,
+                                              CPU_INT08U          addr_protocol_len);
+#endif
+
+#ifdef  NET_IPv4_MODULE_EN
+CPU_BOOLEAN  NetMgr_IsAddrProtocolConflict   (NET_IF_NBR          if_nbr);
+#endif
+
+void         NetMgr_ChkAddrProtocolConflict  (NET_IF_NBR          if_nbr,
+                                              NET_PROTOCOL_TYPE   protocol_type,
+                                              CPU_INT08U         *p_addr_protocol,
+                                              CPU_INT08U          addr_protocol_len,
+                                              NET_ERR            *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_MGR_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_sock.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_sock.c
new file mode 100644
index 0000000..72afdc4
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_sock.c
@@ -0,0 +1,23121 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK SOCKET LAYER
+*
+* Filename      : net_sock.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 SL
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Supports BSD 4.x Socket Layer with the following restrictions/constraints :
+*
+*                     (a) ONLY supports a single address family from the following families :
+*                         (1) IPv4 (AF_INET)
+*
+*                     (b) ONLY supports the following socket types :
+*                         (1) Datagram (SOCK_DGRAM)
+*                         (2) Stream   (SOCK_STREAM)
+*
+*                     (c) ONLY supports a single protocol family from the following families :
+*                         (1) IPv4 (PF_INET)
+*                             (A) ONLY supports the following protocols :
+*                                 (1) UDP (IPPROTO_UDP)
+*                                 (2) TCP (IPPROTO_TCP)
+*
+*                     (d) ONLY supports the following socket options :
+*
+*                             Blocking
+*                             Secure (TLS/SSL)
+*                             Rx Queue size
+*                             Tx Queue size
+*                             Time of server (IPv4-TOS)
+*                             Time to life   (IPv4-TTL)
+*                             Time to life multicast
+*                             UDP connection receive         timeout
+*                             TCP connection accept          timeout
+*                             TCP connection close           timeout
+*                             TCP connection connect request timeout
+*                             TCP connection receive         timeout
+*                             TCP connection transmit        timeout
+*                             TCP keep alive
+*                             TCP MSL
+*                             Force connection using a specific Interface
+*
+*                     (e) Multiple socket connections with the same local & remote address -- both
+*                         addresses & port numbers -- OR multiple socket connections with only a
+*                         local address but the same local address -- both address & port number --
+*                         is NOT currently supported.
+*
+*                         See 'NetSock_BindHandler()  Note #8'.
+*
+*********************************************************************************************************
+* Notice(s)     : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given
+*                     us permission to reprint portions of their documentation.  Portions of this text are
+*                     reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition,
+*                     Standard for Information Technology -- Portable Operating System Interface (POSIX),
+*                     The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute
+*                     of Electrical and Electronics Engineers, Inc and The Open Group.  In the event of any
+*                     discrepancy between these versions and the original IEEE and The Open Group Standard,
+*                     the original IEEE and The Open Group Standard is the referee document.  The original
+*                     Standard can be obtained online at http://www.opengroup.org/unix/online.html.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_SOCK_MODULE
+#include  "net_sock.h"
+#include  "net.h"
+#include  "net_tcp.h"
+#include  "net_udp.h"
+#include  "net_conn.h"
+#include  "../IF/net_if.h"
+#include  "net_buf.h"
+#include  "net_util.h"
+#include  "net_cfg_net.h"
+#include  "../IP/IPv4/net_igmp.h"
+
+#ifdef  NET_SECURE_MODULE_EN
+#include  "../Secure/net_secure.h"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_SOCK_RX_Q_NAME              "Net Sock Rx Q"
+#define  NET_SOCK_CONN_REQ_NAME          "Net Sock Conn Req"
+#define  NET_SOCK_CONN_ACCEPT_NAME       "Net Sock Conn Accept Q"
+#define  NET_SOCK_CONN_CLOSE_NAME        "Net Sock Conn Close"
+#define  NET_SOCK_TASK_SEL_SIGNAL_NAME   "Net Sock Sel Task"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_SOCK               NetSock_Tbl[NET_SOCK_NBR_SOCK];
+
+static  NET_PORT_NBR           NetSock_RandomPortNbrCur;
+
+static  MEM_DYN_POOL           NetSock_AcceptQ_ObjPool;
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  MEM_DYN_POOL           NetSock_SelObjPool;
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void                NetSock_InitObj        (NET_SOCK                   *p_sock,
+                                                    NET_ERR                    *p_err);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN         NetSock_ListenQ_IsAvail(NET_SOCK_ID                 sock_id,
+                                                    NET_ERR                    *p_err);
+#endif
+                                                                                    /* ----------- RX FNCTS ----------- */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void                NetSock_RxPktValidateBuf             (NET_BUF_HDR          *p_buf_hdr,
+                                                                  NET_ERR              *p_err);
+#endif
+
+static  void                NetSock_RxPktDemux                   (NET_BUF              *p_buf,
+                                                                  NET_BUF_HDR          *p_buf_hdr,
+                                                                  NET_ERR              *p_err);
+
+
+static  void                NetSock_RxPktDiscard                 (NET_BUF              *p_buf,
+                                                                  NET_ERR              *p_err);
+
+
+
+                                                                                    /* ------ SOCK STATUS FNCTS ------- */
+
+static  CPU_BOOLEAN         NetSock_IsValidAddrLocal             (NET_SOCK_PROTOCOL_FAMILY   protocol,
+                                                                  NET_SOCK_ADDR             *p_addr,
+                                                                  NET_SOCK_ADDR_LEN          addr_len,
+                                                                  NET_IF_NBR                *p_if_nbr,
+                                                                  NET_ERR                   *p_err);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+static  CPU_BOOLEAN         NetSock_IsValidAddrRemote            (NET_SOCK_ADDR        *p_addr,
+                                                                  NET_SOCK_ADDR_LEN     addr_len,
+                                                                  NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+#endif
+
+
+
+                                                                                    /* ------ SOCK HANDLER FNCTS ------ */
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  NET_SOCK_RTN_CODE   NetSock_CloseHandlerStream           (NET_SOCK_ID           sock_id,
+                                                                  NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+#endif
+
+
+static  NET_SOCK_RTN_CODE   NetSock_BindHandler                  (NET_SOCK_ID           sock_id,
+                                                                  NET_SOCK_ADDR        *p_addr_local,
+                                                                  NET_SOCK_ADDR_LEN     addr_len,
+                                                                  CPU_BOOLEAN           addr_random_reqd,
+                                                                  NET_SOCK_ADDR        *p_addr_dest,
+                                                                  NET_ERR              *p_err);
+
+
+
+static  NET_SOCK_RTN_CODE   NetSock_ConnHandlerDatagram          (NET_SOCK_ID           sock_id,
+                                                                  NET_SOCK             *p_sock,
+                                                                  NET_SOCK_ADDR        *p_addr_remote,
+                                                                  NET_ERR              *p_err);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  NET_SOCK_RTN_CODE   NetSock_ConnHandlerStream            (NET_SOCK_ID           sock_id,
+                                                                  NET_SOCK             *p_sock,
+                                                                  NET_SOCK_ADDR        *p_addr_remote,
+                                                                  NET_ERR              *p_err);
+
+static  NET_SOCK_RTN_CODE   NetSock_ConnHandlerStreamWait        (NET_SOCK_ID           sock_id,
+                                                                  NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+#endif
+
+
+static  void                NetSock_ConnHandlerAddr              (NET_SOCK_ID           sock_id,
+                                                                  NET_SOCK             *p_sock,
+                                                                  NET_SOCK_ADDR        *p_addr_remote,
+                                                                  CPU_BOOLEAN           addr_validate,
+                                                                  CPU_BOOLEAN           addr_over_wr,
+                                                                  NET_ERR              *p_err);
+
+static  void                NetSock_ConnHandlerAddrLocalBind     (NET_SOCK_ID           sock_id,
+                                                                  NET_SOCK_ADDR        *p_addr_remote,
+                                                                  NET_ERR              *p_err);
+
+static  void                NetSock_ConnHandlerAddrRemoteValidate(NET_SOCK             *p_sock,
+                                                                  NET_SOCK_ADDR        *p_addr_remote,
+                                                                  NET_ERR              *p_err);
+
+static  void                NetSock_ConnHandlerAddrRemoteSet     (NET_SOCK             *p_sock,
+                                                                  NET_SOCK_ADDR        *p_addr_remote,
+                                                                  CPU_BOOLEAN           addr_over_wr,
+                                                                  NET_ERR              *p_err);
+
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  void                    NetSock_ConnAcceptQ_Init             (NET_SOCK             *p_sock,
+                                                                      NET_SOCK_Q_SIZE       sock_q_size);
+
+static  void                    NetSock_ConnAcceptQ_Clr              (NET_SOCK             *p_sock);
+
+static  CPU_BOOLEAN             NetSock_ConnAcceptQ_IsAvail          (NET_SOCK             *p_sock,
+                                                                      NET_ERR              *p_err);
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  CPU_BOOLEAN             NetSock_ConnAcceptQ_IsRdy            (NET_SOCK             *p_sock,
+                                                                      NET_ERR              *p_err);
+#endif
+
+static  void                    NetSock_ConnAcceptQ_ConnID_Add       (NET_SOCK             *p_sock,
+                                                                      NET_CONN_ID           conn_id,
+                                                                      NET_ERR              *p_err);
+
+static  NET_CONN_ID             NetSock_ConnAcceptQ_ConnID_Get       (NET_SOCK             *p_sock,
+                                                                      NET_ERR              *p_err);
+
+static  NET_SOCK_ACCEPT_Q_OBJ  *NetSock_ConnAcceptQ_ConnID_Srch      (NET_SOCK             *p_sock,
+                                                                      NET_CONN_ID           conn_id);
+
+static  CPU_BOOLEAN             NetSock_ConnAcceptQ_ConnID_Remove    (NET_SOCK             *p_sock,
+                                                                      NET_CONN_ID           conn_id);
+#endif
+
+
+
+static  NET_SOCK_RTN_CODE   NetSock_RxDataHandler                (NET_SOCK_ID           sock_id,
+                                                                  void                 *p_data_buf,
+                                                                  CPU_INT16U            data_buf_len,
+                                                                  NET_SOCK_API_FLAGS    flags,
+                                                                  NET_SOCK_ADDR        *p_addr_remote,
+                                                                  NET_SOCK_ADDR_LEN    *p_addr_len,
+                                                                  void                 *p_ip_opts_buf,
+                                                                  CPU_INT08U            ip_opts_buf_len,
+                                                                  CPU_INT08U           *p_ip_opts_len,
+                                                                  NET_ERR              *p_err);
+
+
+static  NET_SOCK_RTN_CODE   NetSock_RxDataHandlerDatagram        (NET_SOCK_ID           sock_id,
+                                                                  NET_SOCK             *p_sock,
+                                                                  void                 *p_data_buf,
+                                                                  CPU_INT16U            data_buf_len,
+                                                                  NET_SOCK_API_FLAGS    flags,
+                                                                  NET_SOCK_ADDR        *p_addr_remote,
+                                                                  NET_SOCK_ADDR_LEN    *p_addr_len,
+                                                                  void                 *p_ip_opts_buf,
+                                                                  CPU_INT08U            ip_opts_buf_len,
+                                                                  CPU_INT08U           *p_ip_opts_len,
+                                                                  NET_ERR              *p_err);
+
+
+
+static  NET_SOCK_RTN_CODE   NetSock_TxDataHandler                (NET_SOCK_ID           sock_id,
+                                                                  void                 *p_data,
+                                                                  CPU_INT16U            data_len,
+                                                                  NET_SOCK_API_FLAGS    flags,
+                                                                  NET_SOCK_ADDR        *p_addr_remote,
+                                                                  NET_SOCK_ADDR_LEN     addr_len,
+                                                                  NET_ERR              *p_err);
+
+
+static  NET_SOCK_RTN_CODE   NetSock_TxDataHandlerDatagram        (NET_SOCK_ID           sock_id,
+                                                                  NET_SOCK             *p_sock,
+                                                                  void                 *p_data,
+                                                                  CPU_INT16U            data_len,
+                                                                  NET_SOCK_API_FLAGS    flags,
+                                                                  NET_SOCK_ADDR        *p_addr_remote,
+                                                                  NET_ERR              *p_err);
+
+
+
+
+#ifdef NET_SOCK_TYPE_STREAM_MODULE_EN
+static  void                NetSock_AppPostRx                    (NET_CONN_ID            conn_id_app);
+static  void                NetSock_AppPostTx                    (NET_CONN_ID            conn_id_app);
+#endif
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  void                NetSock_SelPost                      (NET_SOCK              *p_sock,
+                                                                  NET_SOCK_EVENT_TYPE    event);
+
+static  NET_SOCK_QTY        NetSock_SelDescHandler               (NET_SOCK_QTY           sock_nbr_max,
+                                                                  NET_SOCK_DESC         *p_sock_desc_rd,
+                                                                  NET_SOCK_DESC         *p_sock_desc_wr,
+                                                                  NET_SOCK_DESC         *p_sock_desc_err,
+                                                                  NET_ERR               *p_err);
+
+static  CPU_BOOLEAN         NetSock_SelDescHandlerRd             (NET_SOCK_ID           sock_id,
+                                                                  NET_ERR              *p_err);
+
+static  CPU_BOOLEAN         NetSock_SelDescHandlerRdDatagram     (NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN         NetSock_SelDescHandlerRdStream       (NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+#endif
+
+
+static  CPU_BOOLEAN         NetSock_SelDescHandlerWr             (NET_SOCK_ID           sock_id,
+                                                                  NET_ERR              *p_err);
+
+static  CPU_BOOLEAN         NetSock_SelDescHandlerWrDatagram     (NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN         NetSock_SelDescHandlerWrStream       (NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+#endif
+
+
+static  CPU_BOOLEAN         NetSock_SelDescHandlerErr            (NET_SOCK_ID           sock_id,
+                                                                  NET_ERR              *p_err);
+
+static  CPU_BOOLEAN         NetSock_SelDescHandlerErrDatagram    (NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN         NetSock_SelDescHandlerErrStream      (NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+#endif
+
+
+
+static  CPU_BOOLEAN         NetSock_IsAvailRxDatagram            (NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+
+static  CPU_BOOLEAN         NetSock_IsRdyTxDatagram              (NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN         NetSock_IsAvailRxStream              (NET_SOCK             *p_sock,
+                                                                  NET_CONN_ID           conn_id_transport,
+                                                                  NET_ERR              *p_err);
+
+static  CPU_BOOLEAN         NetSock_IsRdyTxStream                (NET_SOCK             *p_sock,
+                                                                  NET_CONN_ID           conn_id_transport,
+                                                                  NET_ERR              *p_err);
+#endif
+#endif
+
+
+
+                                                                                    /* ---------- SOCK FNCTS ---------- */
+
+static  NET_SOCK           *NetSock_Get                          (NET_ERR              *p_err);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  NET_CONN_ID         NetSock_GetConnTransport             (NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+#endif
+
+
+
+static  void                NetSock_CloseHandler                 (NET_SOCK             *p_sock,
+                                                                  CPU_BOOLEAN           close_conn,
+                                                                  CPU_BOOLEAN           close_conn_transport);
+
+static  void                NetSock_CloseSock                    (NET_SOCK             *p_sock,
+                                                                  CPU_BOOLEAN           close_conn,
+                                                                  CPU_BOOLEAN           close_conn_transport);
+
+static  void                NetSock_CloseSockHandler             (NET_SOCK             *p_sock,
+                                                                  CPU_BOOLEAN           close_conn,
+                                                                  CPU_BOOLEAN           close_conn_transport,
+                                                                  NET_ERR              *p_err);
+
+static  void                NetSock_CloseSockFromClose           (NET_SOCK             *p_sock);
+
+
+#if ( defined(NET_SOCK_TYPE_STREAM_MODULE_EN) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN  == DEF_ENABLED))
+static  void                NetSock_CloseConn                    (NET_CONN_ID           conn_id);
+
+static  void                NetSock_CloseConnFree                (NET_CONN_ID           conn_id);
+#endif
+
+
+
+static  void                NetSock_Free                         (NET_SOCK             *p_sock);
+
+static  void                NetSock_FreeHandler                  (NET_SOCK             *p_sock,
+                                                                  NET_ERR              *p_err);
+
+static  void                NetSock_FreeBufQ                     (NET_BUF             **p_buf_q_head,
+                                                                  NET_BUF             **p_buf_q_tail);
+
+
+
+static  void                NetSock_Clr                          (NET_SOCK             *p_sock);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  void                NetSock_Copy                         (NET_SOCK             *p_sock_dest,
+                                                                  NET_SOCK             *p_sock_src);
+#endif
+
+static  void                NetSock_Discard                      (NET_SOCK             *p_sock);
+
+
+
+                                                                                    /* ----- RANDOM PORT Q FNCTS ------ */
+static  NET_PORT_NBR        NetSock_RandomPortNbrGet             (NET_PROTOCOL_TYPE     protocol,
+                                                                  NET_ERR              *p_err);
+
+static  NET_SOCK_RTN_CODE   NetSock_OpGetSock                    (NET_SOCK             *p_sock,
+                                                                  NET_SOCK_OPT_NAME     opt_name,
+                                                                  void                 *p_opt_val,
+                                                                  NET_SOCK_OPT_LEN     *p_opt_len,
+                                                                  NET_ERR              *p_err);
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN         NetSock_CfgTxNagleEnHandler          (NET_SOCK_ID           sock_id,
+                                                                  CPU_BOOLEAN           nagle_en,
+                                                                  NET_ERR              *p_err);
+#endif
+
+static  CPU_BOOLEAN         NetSock_CfgIF_Handler                (NET_SOCK_ID           sock_id,
+                                                                  NET_IF_NBR            if_nbr,
+                                                                  NET_ERR              *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_Init()
+*
+* Description : (1) Initialize Network Socket Layer :
+*
+*                   (a) Perform    Socket/OS initialization
+*                   (b) Initialize socket pool
+*                   (c) Initialize socket table
+*                   (d) Initialize random port number queue
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket layer successfully initialized.
+*
+*                               ------------ RETURNED BY NetSock_InitObj() ------------
+*                               See NetSock_InitObj() for addtional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) The following network socket initialization MUST be sequenced as follows :
+*
+*                   (a) NetSock_Init()   MUST precede ALL other network socket initialization functions
+*                   (b) Network socket pool MUST be initialized PRIOR to initializing the pool with pointers
+*                            to sockets
+*********************************************************************************************************
+*/
+
+void  NetSock_Init (NET_ERR  *p_err)
+{
+    NET_SOCK          *p_sock;
+    NET_SOCK_QTY       i;
+    NET_ERR            err;
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    LIB_ERR            err_lib;
+#endif
+
+
+                                                                /* --------------- INIT SOCK POOL/STATS --------------- */
+    NetSock_PoolPtr = (NET_SOCK *)0;                            /* Init-clr sock pool (see Note #2b).                   */
+
+    NetStat_PoolInit((NET_STAT_POOL   *)&NetSock_PoolStat,
+                     (NET_STAT_POOL_QTY) NET_SOCK_NBR_SOCK,
+                     (NET_ERR         *)&err);
+
+
+                                                                /* ------------------ INIT SOCK TBL ------------------- */
+    p_sock = &NetSock_Tbl[0];
+    for (i = 0; i < NET_SOCK_NBR_SOCK; i++) {
+        p_sock->ID    = (NET_SOCK_ID)i;
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        p_sock->ID_SockParent =  NET_SOCK_ID_NONE;
+#endif
+
+        p_sock->State         =  NET_SOCK_STATE_FREE;            /* Init each sock as free/NOT used.                     */
+        p_sock->Flags         =  NET_SOCK_FLAG_SOCK_NONE;
+
+#ifdef  NET_SECURE_MODULE_EN
+        p_sock->SecureSession = (void *)0;                       /* Init each sock w/ NULL secure session.               */
+#endif
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        NetSock_Clr(p_sock);
+#endif
+
+        NetSock_InitObj(p_sock, p_err);
+        if (*p_err != NET_SOCK_ERR_NONE) {
+             return;
+        }
+
+
+                                                                /* --------------- CFG SOCK BLOCK MODE ---------------- */
+#if  (NET_SOCK_DFLT_NO_BLOCK_EN == DEF_ENABLED)
+        DEF_BIT_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+#else
+        DEF_BIT_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+#endif
+
+        p_sock->NextPtr = NetSock_PoolPtr;                     /* Free each sock to sock pool (see Note #2).           */
+        NetSock_PoolPtr = p_sock;
+
+        p_sock++;
+    }
+
+    Mem_DynPoolCreate("Accept Q object pool",
+                      &NetSock_AcceptQ_ObjPool,
+                       DEF_NULL,
+                       sizeof(NET_SOCK_ACCEPT_Q_OBJ),
+                       sizeof(CPU_ALIGN),
+                       1u,
+                       NET_SOCK_NBR_SOCK * NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err  = NET_SOCK_ERR_INIT_MEM_ALLOC;
+        return;
+    }
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    Mem_DynPoolCreate("Select object pool",
+                      &NetSock_SelObjPool,
+                       DEF_NULL,
+                       sizeof(NET_SOCK_SEL_OBJ),
+                       sizeof(CPU_ALIGN),
+                       0u,
+                       LIB_MEM_BLK_QTY_UNLIMITED,
+                      &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err  = NET_SOCK_ERR_INIT_MEM_ALLOC;
+        return;
+    }
+#endif
+
+                                                                /* -------------- INIT RANDOM PORT NBR Q -------------- */
+#ifndef NET_SOCK_CFG_PORT_RANDOM_START
+    NetSock_RandomPortNbrCur = (NET_PORT_NBR)NetUtil_RandomRangeGet(NET_SOCK_PORT_NBR_RANDOM_MIN,
+                                                                    NET_SOCK_PORT_NBR_RANDOM_MAX);
+#else
+    NetSock_RandomPortNbrCur = NET_SOCK_CFG_PORT_RANDOM_START;
+#endif
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_InitObj()
+*
+* Description : Initialize Socket OS objects.
+*
+* Argument(s) : p_sock      Pointer to socket descriptor/handle.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE
+*                               NET_ERR_FAULT_MEM_ALLOC
+*                               NET_SOCK_ERR_INIT_RX_Q_FAULT
+*                               NET_SOCK_ERR_INIT_CONN_REQ_FAULT
+*                               NET_SOCK_ERR_INIT_CONN_REQ_INVALID_TIMEOUT
+*                               NET_SOCK_ERR_INIT_CONN_ACCEPT_FAULT
+*                               NET_SOCK_ERR_INIT_CONN_ACCEPT_TIMEOUT_CFG
+*                               NET_SOCK_ERR_INIT_CONN_CLOSE_FAULT
+*                               NET_SOCK_ERR_INIT_CONN_CLOSE_TIMEOUT_CFG
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetSock_Init().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_InitObj (NET_SOCK  *p_sock,
+                               NET_ERR   *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    p_sock->RxQ_SignalObj = KAL_SemCreate((const  CPU_CHAR *)NET_SOCK_RX_Q_NAME,
+                                                             DEF_NULL,
+                                                            &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_ERR_FAULT_MEM_ALLOC;
+             return;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_SOCK_ERR_INIT_RX_Q_FAULT;
+             return;
+    }
+
+                                                                /* Initialize socket receive queue timeout values.      */
+    NetSock_RxQ_TimeoutDflt(p_sock, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        *p_err = NET_SOCK_ERR_INIT_RX_Q_TIMEOUT_CFG;
+         return;
+    }
+
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    p_sock->ConnReqSignalObj = KAL_SemCreate((const  CPU_CHAR *)NET_SOCK_CONN_REQ_NAME,
+                                                                DEF_NULL,
+                                                               &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_ERR_FAULT_MEM_ALLOC;
+             return;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_SOCK_ERR_INIT_CONN_REQ_FAULT;
+             return;
+    }
+
+                                                                /* Initialize socket connection signal timeout values.  */
+    NetSock_ConnReqTimeoutDflt(p_sock, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        *p_err = NET_SOCK_ERR_INIT_CONN_REQ_INVALID_TIMEOUT;
+         return;
+    }
+
+
+
+    p_sock->ConnAcceptQSignalObj = KAL_SemCreate((const  CPU_CHAR *)NET_SOCK_CONN_ACCEPT_NAME,
+                                                                    DEF_NULL,
+                                                                   &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_ERR_FAULT_MEM_ALLOC;
+             return;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_SOCK_ERR_INIT_CONN_ACCEPT_FAULT;
+             return;
+    }
+
+    NetSock_ConnAcceptQ_TimeoutDflt(p_sock, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        *p_err  = NET_SOCK_ERR_INIT_CONN_ACCEPT_TIMEOUT_CFG;
+         return;
+    }
+
+
+
+    p_sock->ConnCloseSignalObj = KAL_SemCreate((const  CPU_CHAR *)NET_SOCK_CONN_CLOSE_NAME,
+                                                                  DEF_NULL,
+                                                                 &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_ERR_FAULT_MEM_ALLOC;
+             return;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_CREATE:
+        default:
+            *p_err = NET_SOCK_ERR_INIT_CONN_CLOSE_FAULT;
+             return;
+    }
+
+    NetSock_ConnCloseTimeoutDflt(p_sock, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        *p_err  = NET_SOCK_ERR_INIT_CONN_CLOSE_TIMEOUT_CFG;
+         return;
+    }
+#endif
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    p_sock->SelObjTailPtr = DEF_NULL;                           /* Init Select Task Signal to NULL.                     */
+#endif
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetSock_RxQ_Clr()
+*
+* Description : Clear socket receive queue signal.
+*
+*               (1) Socket receive queue signals apply to the following socket type(s)/protocol(s) :
+*
+*                   (a) Datagram
+*                       (1) UDP
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to clear receive queue signal.
+*               -------     Argument validated in NetSock_FreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket receive queue signal successfully cleared.
+*                               NET_SOCK_ERR_RX_Q_SIGNAL_CLR    Socket receive queue signal NOT          cleared.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_FreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetSock_RxQ_Clr (NET_SOCK  *p_sock,
+                       NET_ERR   *p_err)
+{
+    KAL_ERR    err_kal;
+
+
+    KAL_SemSet(p_sock->RxQ_SignalObj, 0u, &err_kal);            /* Clear TCP connection receive queue signal.           */
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_RX_Q_SIGNAL_CLR;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetSock_RxQ_Wait()
+*
+* Description : Wait on socket receive queue.
+*
+*               (1) Socket receive queue signals apply to the following socket type(s)/protocol(s) :
+*
+*                   (a) Datagram
+*                       (1) UDP
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to wait on receive queue.
+*               -------     Argument checked in NetSock_RxDataHandlerDatagram().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket receive queue non-empty.
+*                               NET_SOCK_ERR_RX_Q_EMPTY             Socket receive queue still empty by
+*                                                                       timeout.
+*                               NET_SOCK_ERR_RX_Q_SIGNAL_ABORT      Socket receive queue signal aborted;
+*                                                                       socket closed/aborted.
+*                               NET_SOCK_ERR_RX_Q_SIGNAL_FAULT      Socket receive queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_RxDataHandlerDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) (a) If timeouts NOT desired, wait on socket receive queue forever (i.e. do NOT exit).
+*
+*                   (b) If timeout      desired, return NET_SOCK_ERR_RX_Q_EMPTY error on socket receive
+*                       queue timeout.  Implement timeout with OS-dependent functionality.
+*********************************************************************************************************
+*/
+
+void  NetSock_RxQ_Wait (NET_SOCK     *p_sock,
+                        NET_ERR      *p_err)
+{
+    CPU_INT32U  timeout_ms;
+    KAL_ERR     err_kal;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    timeout_ms = p_sock->RxQ_SignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+
+
+                                                                /* Wait on socket receive queue ...                     */
+                                                                /* ... with configured timeout (see Note #1b).          */
+    KAL_SemPend(p_sock->RxQ_SignalObj, KAL_OPT_PEND_NONE, timeout_ms, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_TIMEOUT:
+            *p_err = NET_SOCK_ERR_RX_Q_EMPTY;                   /* See Note #2b.                                        */
+             break;
+
+
+        case KAL_ERR_ABORT:
+            *p_err = NET_SOCK_ERR_RX_Q_SIGNAL_ABORT;
+             break;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_RX_Q_SIGNAL_FAULT;
+             break;
+    }
+
+}
+
+/*
+*********************************************************************************************************
+*                                        NetSock_RxQ_Signal()
+*
+* Description : Signal socket receive queue.
+*
+*               (1) Socket receive queue signals apply to the following socket type(s)/protocol(s) :
+*
+*                   (a) Datagram
+*                       (1) UDP
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to signal receive queue.
+*               -------     Argument validated in NetSock_RxPktDemux(),
+*                                                 NetSock_RxDataHandlerDatagram().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket receive queue successfully signaled.
+*                               NET_SOCK_ERR_RX_Q_FULL              Socket receive queue full.
+*                               NET_SOCK_ERR_RX_Q_SIGNAL_FAULT      Socket receive queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_RxPktDemux(),
+*               NetSock_RxDataHandlerDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetSock_RxQ_Signal (NET_SOCK  *p_sock,
+                          NET_ERR   *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_SemPost(p_sock->RxQ_SignalObj, KAL_OPT_PEND_NONE, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OVF:
+            *p_err = NET_SOCK_ERR_RX_Q_FULL;
+             break;
+
+
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_RX_Q_SIGNAL_FAULT;
+             break;
+    }
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_RX);
+#endif
+}
+
+/*
+*********************************************************************************************************
+*                                        NetSock_RxQ_Abort()
+*
+* Description : Abort wait on socket receive queue.
+*
+*               (1) Socket receive queue signals apply to the following socket type(s)/protocol(s) :
+*
+*                   (a) Datagram
+*                       (1) UDP
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to abort wait on socket receive
+*               -------         queue.
+*
+*                           Argument validated in NetSock_FreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Wait on socket receive queue successfully
+*                                                                   aborted.
+*                               NET_SOCK_ERR_RX_Q_ABORT         Socket receive queue abort failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_FreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetSock_RxQ_Abort (NET_SOCK  *p_sock,
+                         NET_ERR   *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+                                                                /* Abort wait on socket receive queue ...               */
+                                                                /* ... for ALL waiting tasks.                           */
+   KAL_SemPendAbort(p_sock->RxQ_SignalObj, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_RX_Q_ABORT;
+             break;
+    }
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_RX_ABORT);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_RxQ_TimeoutDflt()
+*
+* Description : Set socket receive queue to configured-default timeout value.
+*
+*               (1) Socket receive queue timeouts apply to the following socket type(s)/protocol(s) :
+*
+*                   (a) Datagram
+*                       (1) UDP
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set receive queue configured-
+*               -------         default timeout.
+*
+*                           Argument checked in NetSock_CfgTimeoutRxQ_Dflt(),
+*                                               NetSock_Clr(),
+*                                               NetSock_Init().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket receive queue configured-default timeout
+*                                                                   successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutRxQ_Dflt(),
+*               NetSock_Clr(),
+*               NetSock_Init().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutRxQ_Dflt()'.
+*
+* Note(s)     : (2) NetSock_RxQ_TimeoutDflt() is called by network protocol suite function(s) &
+*                   may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutRxQ_Dflt()  Note #2'.
+*********************************************************************************************************
+*/
+
+void  NetSock_RxQ_TimeoutDflt (NET_SOCK  *p_sock,
+                               NET_ERR   *p_err)
+{
+    CPU_INT32U  timeout_ms;
+                                                                /* Set socket receive queue  timeout ...                */
+                                                                /* ... to configured-default timeout value.             */
+    timeout_ms = NET_SOCK_DFLT_TIMEOUT_RX_Q_MS;
+
+    NetSock_RxQ_TimeoutSet(p_sock, timeout_ms, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return;
+    }
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_RxQ_TimeoutSet()
+*
+* Description : Set socket receive queue timeout value.
+*
+*               (1) Socket receive queue timeouts apply to the following socket type(s)/protocol(s) :
+*
+*                   (a) Datagram
+*                       (1) UDP
+*
+*
+* Argument(s) : p_sock      Pointer to socket object.
+*
+*               timeout_ms  Timeout value.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                           NET_SOCK_ERR_NONE                   Timeout successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_RxQ_TimeoutDflt().
+*
+*               This function is an INTERNAL function & MUST NOT be called by application function(s).
+*
+* Note(s)     : (2) NetSock_RxQ_TimeoutSet() is called by network protocol suite function(s) & may be
+*                   called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutRxQ_Set()  Note #2'.
+*********************************************************************************************************
+*/
+
+void  NetSock_RxQ_TimeoutSet (NET_SOCK    *p_sock,
+                              CPU_INT32U   timeout_ms,
+                              NET_ERR     *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+                                                                /* Set socket receive queue timeout value ...           */
+                                                                /* ... (in OS ticks).                                   */
+    p_sock->RxQ_SignalTimeout_ms = timeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                    NetSock_RxQ_TimeoutGet_ms()
+*
+* Description : Get socket receive queue timeout value.
+*
+*               (1) Socket receive queue timeouts apply to the following socket type(s)/protocol(s) :
+*
+*                   (a) Datagram
+*                       (1) UDP
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get receive queue timeout.
+*               -------     Argument checked in NetSock_CfgTimeoutRxQ_Get_ms().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket receive queue timeout successfully
+*                                                                   returned.
+*
+* Return(s)   : Socket receive queue network timeout value  :
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : NetSock_CfgTimeoutRxQ_Get_ms().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutRxQ_Get_ms()'.
+*
+* Note(s)     : (2) NetSock_RxQ_TimeoutGet_ms() is called by network protocol suite function(s) & may
+*                   be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutRxQ_Get_ms()  Note #3'.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetSock_RxQ_TimeoutGet_ms (NET_SOCK *p_sock,
+                                       NET_ERR  *p_err)
+{
+    CPU_INT32U  timeout_ms;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+                                                                /* Get socket receive queue timeout value ...           */
+    timeout_ms = p_sock->RxQ_SignalTimeout_ms;                /* ... (in OS ticks).                                   */
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+    return (timeout_ms);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetSock_ConnReqClr()
+*
+* Description : Clear socket connection request signal.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to clear connection request signal.
+*               -------     Argument validated in NetSock_FreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection request signal successfully cleared.
+*                               NET_SOCK_ERR_CONN_SIGNAL_CLR    Socket connection request signal NOT          cleared.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_FreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if  defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnReqClr (NET_SOCK  *p_sock,
+                          NET_ERR   *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+    KAL_SemSet(p_sock->ConnReqSignalObj, 0u, &err_kal);         /* Clear socket connection request signal.              */
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_CLR;
+             break;
+    }
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                       NetSock_ConnReqWait()
+*
+* Description : Wait on socket connection request signal.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to wait on connection request signal.
+*               -------     Argument checked in NetSock_ConnHandlerStream().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket connection request successfully
+*                                                                       signaled.
+*                               NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT    Socket connection request NOT signaled
+*                                                                       within timeout.
+*                               NET_SOCK_ERR_CONN_SIGNAL_ABORT      Socket connection request signal aborted;
+*                                                                       socket closed/aborted.
+*                               NET_SOCK_ERR_CONN_SIGNAL_FAULT      Socket connection request signal fault.
+
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnHandlerStreamWait().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) If timeouts NOT desired, wait on socket connection request signal forever
+*                       (i.e. do NOT exit).
+*
+*                   (b) If timeout      desired, return NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT error on socket
+*                       connection request timeout.  Implement timeout with OS-dependent functionality.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnReqWait (NET_SOCK  *p_sock,
+                           NET_ERR   *p_err)
+{
+    CPU_INT32U  timeout_ms;
+    KAL_ERR     err_kal;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    timeout_ms = p_sock->ConnReqSignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+                                                                /* Wait on socket connection request signal ...         */
+                                                                /* ... with configured timeout (see Note #1b).          */
+    KAL_SemPend(p_sock->ConnReqSignalObj, KAL_OPT_PEND_NONE, timeout_ms, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_TIMEOUT:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT;          /* See Note #1b.                                        */
+             break;
+
+
+        case KAL_ERR_ABORT:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_ABORT;
+             break;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_ConnReqSignal()
+*
+* Description : Signal socket that connection request complete; socket now connected.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to signal connection request complete.
+*               -------     Argument checked in NetSock_ConnSignalReq().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket connection request successfully
+*                                                                       signaled.
+*                               NET_SOCK_ERR_CONN_SIGNAL_FAULT      Socket connection request signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnSignalReq().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnReqSignal (NET_SOCK  *p_sock,
+                             NET_ERR   *p_err)
+{
+    KAL_ERR   err_kal;
+
+
+
+    KAL_SemPost(p_sock->ConnReqSignalObj, KAL_OPT_PEND_NONE, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OVF:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_CONN_REQ_SIGNAL);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_ConnReqAbort()
+*
+* Description : Abort wait on socket connection request signal.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to abort wait on connection request
+*               -------         signal.
+*
+*                           Argument validated in NetSock_FreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Wait on socket connection request signal
+*                                                                   successfully aborted.
+*                               NET_SOCK_ERR_CONN_ABORT         Socket connection request signal abort
+*                                                                   failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_FreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnReqAbort (NET_SOCK  *p_sock,
+                            NET_ERR   *p_err)
+{
+    KAL_ERR   err_kal;
+
+                                                                /* Abort wait on socket connection request signal ...   */
+                                                                /* ... for ALL waiting tasks.                           */
+    KAL_SemPendAbort(p_sock->ConnReqSignalObj, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_ABORT;
+             break;
+    }
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_CONN_REQ_ABORT);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_ConnReqTimeoutDflt()
+*
+* Description : Set socket connection request signal configured-default timeout value.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set connection request signal
+*               -------         configured-default timeout.
+*
+*                           Argument checked in NetSock_CfgTimeoutConnReqDflt(),
+*                                               NetSock_Clr(),
+*                                               NetSock_Init().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection request signal configured-
+*                                                                   default timeout successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutConnReqDflt(),
+*               NetSock_Clr(),
+*               NetSock_Init().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutConnReqDflt()'.
+*
+* Note(s)     : (1) NetSock_ConnReqTimeoutDflt() is called by network protocol suite function(s)
+*                   & may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutConnReqDflt()  Note #2'.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnReqTimeoutDflt (NET_SOCK  *p_sock,
+                                  NET_ERR   *p_err)
+{
+    CPU_INT32U  timeout_ms;
+                                                                /* Set socket connection request timeout ...            */
+                                                                /* ... to configured-default     timeout value.         */
+    timeout_ms = NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS;
+
+    NetSock_ConnReqTimeoutSet(p_sock, timeout_ms, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return;
+    }
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_ConnReqTimeoutSet()
+*
+* Description : Set socket connection request signal timeout value.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to set connection request
+*               -------             signal timeout.
+*
+*                               Argument checked in NetSock_CfgTimeoutConnReqSet(),
+*                                                   NetSock_ConnReqTimeoutDflt().
+*
+*               timeout_ms      Timeout value :
+*
+*                                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value desired.
+*
+*                                   In number of milliseconds, otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection request signal timeout
+*                                                                   successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutConnReqSet(),
+*               NetSock_ConnReqTimeoutDflt().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutConnReqSet()'.
+*
+* Note(s)     : (1) NetSock_ConnReqTimeoutSet() is called by network protocol suite function(s) &
+*                   may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutConnReqSet()  Note #2'.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnReqTimeoutSet (NET_SOCK    *p_sock,
+                                 CPU_INT32U   timeout_ms,
+                                 NET_ERR     *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+                                                                /* Set socket connection request timeout value ...      */
+                                                                /* ... (in OS ticks).                                   */
+    p_sock->ConnReqSignalTimeout_ms = timeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_ConnReqTimeoutGet_ms()
+*
+* Description : Get socket connection request signal timeout value.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get connection request signal
+*               -------         timeout.
+*
+*                           Argument checked in NetSock_CfgTimeoutConnReqGet_ms().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection request signal timeout
+*                                                                   successfully returned.
+*
+* Return(s)   : Socket connection request network timeout value  :
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : NetSock_CfgTimeoutConnReqGet_ms().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutConnReqGet_ms()'.
+*
+* Note(s)     : (1) NetSock_ConnReqTimeoutGet_ms() is called by network protocol suite function(s) &
+*                   may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutConnReqGet_ms()  Note #3'.
+*
+*               (2) 'NetSock_ConnReqTimeoutTbl_tick[]' variables MUST ALWAYS be accessed exclusively
+*                    in critical sections.
+*********************************************************************************************************
+*/
+
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+CPU_INT32U  NetSock_ConnReqTimeoutGet_ms (NET_SOCK  *p_sock,
+                                          NET_ERR   *p_err)
+{
+    CPU_INT32U  timeout_ms;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+                                                                /* Get socket connection request timeout value ...      */
+                                                                /* ... (in OS ticks).                                   */
+    timeout_ms = p_sock->ConnReqSignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err        = NET_SOCK_ERR_NONE;
+
+    return (timeout_ms);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_ConnAcceptQ_SemClr()
+*
+* Description : Clear socket connection accept queue signal.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to clear connection accept
+*               -------         queue signal.
+*
+*                           Argument validated in NetSock_FreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection accept queue signal
+*                                                                   successfully cleared.
+*                               NET_SOCK_ERR_CONN_SIGNAL_CLR    Socket connection accept queue signal
+*                                                                   NOT          cleared.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_FreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnAcceptQ_SemClr (NET_SOCK  *p_sock,
+                                  NET_ERR   *p_err)
+{
+    KAL_ERR    err_kal;
+
+
+
+    KAL_SemSet(p_sock->ConnAcceptQSignalObj, 0u, &err_kal);         /* Clear socket connection accept queue signal.         */
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_CLR;
+             break;
+    }
+}
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_ConnAcceptQ_Wait()
+*
+* Description : Wait on socket connection accept queue signal.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to wait on connection accept
+*               -------         queue signal.
+*
+*                           Argument checked in NetSock_Accept().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket connection accept queue successfully
+*                                                                       signaled.
+*                               NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT    Socket connection accept queue NOT signaled
+*                                                                       within timeout.
+*                               NET_SOCK_ERR_CONN_SIGNAL_ABORT      Socket connection accept queue signal aborted;
+*                                                                       socket closed/aborted.
+*                               NET_SOCK_ERR_CONN_SIGNAL_FAULT      Socket connection accept queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Accept().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) If timeouts NOT desired, wait on socket connection accept queue signal forever
+*                       (i.e. do NOT exit).
+*
+*                   (b) If timeout      desired, return NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT error on socket
+*                       connection accept queue timeout.  Implement timeout with OS-dependent functionality.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnAcceptQ_Wait (NET_SOCK  *p_sock,
+                                NET_ERR   *p_err)
+{
+    CPU_INT32U  timeout_ms;
+    KAL_ERR     err_kal;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    timeout_ms =  p_sock->ConnAcceptQSignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+
+
+                                                                /* Wait on socket connection accept queue signal ...    */
+                                                                /* ... with configured timeout (see Note #1b).          */
+    KAL_SemPend(p_sock->ConnAcceptQSignalObj, KAL_OPT_PEND_NONE, timeout_ms, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_TIMEOUT:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT;          /* See Note #1b.                                        */
+             break;
+
+
+        case KAL_ERR_ABORT:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_ABORT;
+             break;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_ConnAcceptQ_Signal()
+*
+* Description : Signal socket that connection request received; socket now available in accept queue.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to signal connection accept queue.
+*               -------     Argument checked in NetSock_ConnSignalAccept().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket connection accept queue successfully
+*                                                                       signaled.
+*                               NET_SOCK_ERR_CONN_SIGNAL_FAULT      Socket connection accept queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnSignalAccept().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnAcceptQ_Signal (NET_SOCK  *p_sock,
+                                  NET_ERR   *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+                                                                /* Signal socket accept queue.                          */
+    KAL_SemPost(p_sock->ConnAcceptQSignalObj, KAL_OPT_PEND_NONE, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OVF:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_CONN_ACCEPT_SIGNAL);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_ConnAcceptQ_Abort()
+*
+* Description : Abort wait on socket connection accept queue signal.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to abort wait on connection
+*               -------         accept queue signal.
+*
+*                           Argument validated in NetSock_FreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Wait on socket connection accept queue
+*                                                                   signal successfully aborted.
+*                               NET_SOCK_ERR_CONN_ABORT         Socket connection request accept queue
+*                                                                   signal abort failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_FreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnAcceptQ_Abort (NET_SOCK  *p_sock,
+                                 NET_ERR   *p_err)
+{
+    KAL_ERR   err_kal;
+
+                                                                /* Abort wait on socket connection accept queue signal  */
+                                                                /* ... for ALL waiting tasks.                           */
+    KAL_SemPendAbort(p_sock->ConnAcceptQSignalObj, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_ABORT;
+             break;
+    }
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_CONN_ACCEPT_ABORT);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_ConnAcceptQ_TimeoutDflt()
+*
+* Description : Set socket connection accept queue signal configured-default timeout value.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set connection accept queue
+*               -------          signal configured-default timeout.
+*
+*                           Argument checked in NetSock_CfgTimeoutConnAcceptDflt(),
+*                                               NetSock_Clr(),
+*                                               NetSock_Init().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection accept queue signal configured-
+*                                                                   default timeout successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutConnAcceptDflt(),
+*               NetSock_Clr(),
+*               NetSock_Init().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutConnAcceptDflt()'.
+*
+* Note(s)     : (1) Despite inconsistency with NetSock_CfgTimeoutConnAccept&&&() functions,
+*                   NetSock_ConnAcceptQ_TimeoutDflt() includes 'Q_' for consistency with other
+*                   NetSock_ConnAcceptQ_&&&() functions.
+*
+*               (2) NetSock_ConnAcceptQ_TimeoutDflt() is called by network protocol suite function(s)
+*                   & may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutConnAcceptDflt()  Note #2'.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnAcceptQ_TimeoutDflt (NET_SOCK  *p_sock,
+                                       NET_ERR   *p_err)
+{
+    CPU_INT32U  timeout_ms;
+                                                                /* Set socket connection accept queue timeout ...       */
+                                                                /* ... to configured-default          timeout value.    */
+    timeout_ms = NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS;
+
+    NetSock_ConnAcceptQ_TimeoutSet(p_sock, timeout_ms, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return;
+    }
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_ConnAcceptQ_TimeoutSet()
+*
+* Description : Set socket connection accept queue signal timeout value.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to set connection accept
+*               -------             queue signal timeout.
+*
+*                               Argument checked in NetSock_CfgTimeoutConnAcceptSet(),
+*                                                   NetSock_ConnAcceptQ_TimeoutDflt().
+*
+*               timeout_ms      Timeout value :
+*
+*                                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value desired.
+*
+*                                   In number of milliseconds, otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection accept queue signal timeout
+*                                                                   successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutConnAcceptSet(),
+*               NetSock_ConnAcceptQ_TimeoutDflt().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutConnAcceptSet()'.
+*
+* Note(s)     : (1) Despite inconsistency with NetSock_CfgTimeoutConnAccept&&&() functions,
+*                   NetSock_ConnAcceptQ_TimeoutSet() includes 'Q_' for consistency with other
+*                   NetSock_ConnAcceptQ_&&&() functions.
+*
+*               (2) NetSock_ConnAcceptQ_TimeoutSet() is called by network protocol suite function(s)
+*                   & may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutConnAcceptSet()  Note #2'.
+*
+*               (3) 'NetSock_ConnAcceptQ_TimeoutTbl_tick[]' variables MUST ALWAYS be accessed
+*                    exclusively in critical sections.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnAcceptQ_TimeoutSet (NET_SOCK    *p_sock,
+                                      CPU_INT32U   timeout_ms,
+                                      NET_ERR     *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+    CPU_CRITICAL_ENTER();
+                                                                /* Set socket connection accept queue timeout value ... */
+                                                                /* ... (in OS ticks).                                   */
+    p_sock->ConnAcceptQSignalTimeout_ms = timeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                NetSock_ConnAcceptQ_TimeoutGet_ms()
+*
+* Description : Get socket connection accept queue signal timeout value.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get connection accept queue
+*               -------         signal timeout.
+*
+*                           Argument checked in NetSock_CfgTimeoutConnAcceptGet_ms().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection accept queue signal
+*                                                                   timeout successfully returned.
+*
+* Return(s)   : Socket connection accept network timeout value :
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : NetSock_CfgTimeoutConnAcceptGet_ms().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutConnAcceptGet_ms()'.
+*
+* Note(s)     : (1) Despite inconsistency with NetSock_CfgTimeoutConnAccept&&&() functions,
+*                   NetSock_ConnAcceptQ_TimeoutGet_ms() includes 'Q_' for consistency with other
+*                   NetSock_ConnAcceptQ_&&&() functions.
+*
+*               (2) NetSock_ConnAcceptQ_TimeoutGet_ms() is called by network protocol suite function(s)
+*                   & may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutConnAcceptGet_ms()  Note #3'.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+CPU_INT32U  NetSock_ConnAcceptQ_TimeoutGet_ms (NET_SOCK  *p_sock,
+                                               NET_ERR   *p_err)
+{
+    CPU_INT32U  timeout_ms;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+                                                                /* Get socket connection accept queue timeout ...       */
+                                                                /* ... value (in OS ticks).                             */
+    timeout_ms      = p_sock->ConnAcceptQSignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err           = NET_SOCK_ERR_NONE;
+
+    return (timeout_ms);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_ConnCloseClr()
+*
+* Description : Clear socket connection close signal.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to clear connection close signal.
+*               -------     Argument validated in NetSock_FreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection close signal successfully cleared.
+*                               NET_SOCK_ERR_CONN_SIGNAL_CLR    Socket connection close signal NOT          cleared.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_FreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnCloseClr (NET_SOCK  *p_sock,
+                            NET_ERR   *p_err)
+{
+    KAL_ERR    err_kal;
+
+
+
+    KAL_SemSet(p_sock->ConnCloseSignalObj, 0u, &err_kal);       /* Clear socket connection close signal.                */
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+        case KAL_ERR_OS:                                        /* KAL_ERR_OS return when tasks are waiting on ...      */
+            *p_err = NET_SOCK_ERR_NONE;                         /* ... semaphore.                                       */
+             break;
+
+
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_CLR;
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_ConnCloseWait()
+*
+* Description : Wait on socket connection close signal.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to wait on connection close signal.
+*               -------     Argument checked in NetSock_CloseHandlerStream().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket connection close successfully
+*                                                                       signaled.
+*                               NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT    Socket connection close NOT signaled
+*                                                                       within timeout.
+*                               NET_SOCK_ERR_CONN_SIGNAL_ABORT      Socket connection close signal aborted;
+*                                                                       socket closed/aborted.
+*                               NET_SOCK_ERR_CONN_SIGNAL_FAULT      Socket connection close signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CloseHandlerStream().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) If timeouts NOT desired, wait on socket connection close signal forever
+*                       (i.e. do NOT exit).
+*
+*                   (b) If timeout      desired, return NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT error on socket
+*                       connection request timeout.  Implement timeout with OS-dependent functionality.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnCloseWait (NET_SOCK  *p_sock,
+                             NET_ERR   *p_err)
+{
+    CPU_INT32U  timeout_ms;
+    KAL_ERR     err_kal;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    timeout_ms = p_sock->ConnCloseSignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+
+
+                                                                /* Wait on socket connection close signal ...           */
+                                                                /* ... with configured timeout (see Note #1b).          */
+    KAL_SemPend(p_sock->ConnCloseSignalObj, KAL_OPT_PEND_NONE, timeout_ms, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_TIMEOUT:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT;          /* See Note #1b.                                        */
+             break;
+
+
+        case KAL_ERR_ABORT:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_ABORT;
+             break;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_ConnCloseSignal()
+*
+* Description : Signal socket that connection close complete; socket connection now closed.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to signal connection close complete.
+*               -------     Argument checked in NetSock_ConnSignalClose().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket connection close successfully
+*                                                                       signaled.
+*                               NET_SOCK_ERR_CONN_SIGNAL_FAULT      Socket connection close signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnSignalClose().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnCloseSignal (NET_SOCK  *p_sock,
+                               NET_ERR   *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+                                                                /* Signal socket close.                                 */
+    KAL_SemPost(p_sock->ConnCloseSignalObj, KAL_OPT_PEND_NONE, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OVF:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_SIGNAL_FAULT;
+             break;
+    }
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_CONN_CLOSE_SIGNAL);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_ConnCloseAbort()
+*
+* Description : Abort wait on socket connection close signal.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to abort wait on connection close
+*               -------         signal.
+*
+*                           Argument validated in NetSock_FreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Wait on socket connection close signal
+*                                                                   successfully aborted.
+*                               NET_SOCK_ERR_CONN_ABORT         Socket connection request close abort
+*                                                                   failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_FreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnCloseAbort (NET_SOCK  *p_sock,
+                              NET_ERR   *p_err)
+{
+    KAL_ERR   err_kal;
+
+
+                                                                /* Abort wait on socket connection close signal ...     */
+                                                                /* ... for ALL waiting tasks.                           */
+    KAL_SemPendAbort(p_sock->ConnCloseSignalObj, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_SOCK_ERR_CONN_ABORT;
+             break;
+    }
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_CONN_CLOSE_ABORT);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_ConnCloseTimeoutDflt()
+*
+* Description : Set socket connection close signal configured-default timeout value.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set connection close signal
+*               -------         configured-default timeout.
+*
+*                           Argument checked in NetSock_CfgTimeoutConnCloseDflt(),
+*                                               NetSock_Clr(),
+*                                               NetSock_Init().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetSock_ConnCloseTimeoutSet() : -
+*                               NET_SOCK_ERR_NONE               Socket connection close signal configured-
+*                                                                   default timeout successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutConnCloseDflt(),
+*               NetSock_Clr(),
+*               NetSock_Init().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutConnCloseDflt()'.
+*
+* Note(s)     : (1) NetSock_ConnCloseTimeoutDflt() is called by network protocol suite function(s)
+*                   & may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutConnCloseDflt()  Note #2'.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnCloseTimeoutDflt (NET_SOCK  *p_sock,
+                                    NET_ERR   *p_err)
+{
+    CPU_INT32U  timeout_ms;
+                                                                /* Set socket connection close timeout ...              */
+                                                                /* ... to configured-default   timeout value.           */
+    timeout_ms = NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS;
+
+    NetSock_ConnCloseTimeoutSet(p_sock, timeout_ms, p_err);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_ConnCloseTimeoutSet()
+*
+* Description : Set socket connection close signal timeout value.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set connection close
+*               -------             signal timeout.
+*
+*                               Argument checked in NetSock_CfgTimeoutConnCloseSet(),
+*                                                   NetSock_ConnCloseTimeoutDflt().
+*
+*               timeout_ms  Timeout value (in milliseconds).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection close signal timeout
+*                                                                   successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutConnCloseSet(),
+*               NetSock_ConnCloseTimeoutDflt().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutConnCloseSet()'.
+*
+* Note(s)     : (1) NetSock_ConnCloseTimeoutSet() is called by network protocol suite function(s) &
+*                   may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutConnCloseSet()  Note #2'.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+void  NetSock_ConnCloseTimeoutSet (NET_SOCK    *p_sock,
+                                   CPU_INT32U   timeout_ms,
+                                   NET_ERR     *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+                                                                /* Set socket connection close timeout value ...        */
+                                                                /* ... (in OS ticks).                                   */
+    p_sock->ConnCloseSignalTimeout_ms = timeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_ConnCloseTimeoutGet_ms()
+*
+* Description : Get socket connection close signal timeout value.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get connection close signal
+*               -------         timeout.
+*
+*                           Argument checked in NetSock_CfgTimeoutConnCloseGet_ms().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection close signal timeout
+*                                                                   successfully returned.
+*
+* Return(s)   : Socket connection close network timeout value :
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : NetSock_CfgTimeoutConnCloseGet_ms().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutConnCloseGet_ms()'.
+*
+* Note(s)     : (1) NetSock_ConnCloseTimeoutGet_ms() is called by network protocol suite function(s)
+*                   & may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutConnCloseGet_ms()  Note #3'.
+*********************************************************************************************************
+*/
+#if    defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+CPU_INT32U  NetSock_ConnCloseTimeoutGet_ms (NET_SOCK  *p_sock,
+                                            NET_ERR   *p_err)
+{
+    CPU_INT32U  timeout_ms;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+                                                                /* Get socket connection close timeout value ...        */
+                                                                /* ... (in OS ticks).                                   */
+    timeout_ms = p_sock->ConnCloseSignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err        = NET_SOCK_ERR_NONE;
+
+    return (timeout_ms);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            NetSock_Rx()
+*
+* Description : (1) Process received socket data & forward to application :
+*
+*                   (a) Demultiplex data to connection
+*                   (b) Update receive statistics
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer that received socket data.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket data successfully received & processed.
+*
+*                                                               ----- RETURNED BY NetSock_RxPktDemux() : -----
+*                               NET_ERR_RX_DEST                 Invalid destination; no socket connection
+*                                                                   available for received packet.
+*
+*                                                               ---- RETURNED BY NetSock_RxPktDiscard() : ----
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_RxPktDemuxDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Since RFC #792, Section 'Destination Unreachable Message : Description' states
+*                   that "if, in the destination host, the IP module cannot deliver the datagram
+*                   because the indicated ... process port is not active, the destination host may
+*                   send a destination unreachable message to the source host"; the network buffer
+*                   MUST NOT be freed by the socket layer but must be returned to the transport or
+*                   internet layer(s) to send an appropriate ICMP error message.
+*
+*                   See also 'net_udp.c  NetUDP_Rx()  Note #4'.
+*
+*               (3) Network buffer freed by lower layer (see Note #3); only increment error counter.
+*********************************************************************************************************
+*/
+
+void  NetSock_Rx (NET_BUF  *p_buf,
+                  NET_ERR  *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetSock_RxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.Sock.RxPktCtr);
+
+
+                                                                /* -------------- VALIDATE RX'D SOCK PKT -------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetSock_RxPktValidateBuf(p_buf_hdr, p_err);                   /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetSock_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+#endif
+
+
+                                                                /* --------- DEMUX SOCK PKT / UPDATE RX STATS --------- */
+    NetSock_RxPktDemux(p_buf, p_buf_hdr, p_err);
+    switch (*p_err) {
+        case NET_SOCK_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.Sock.RxPktCompCtr);
+             break;
+
+
+        case NET_ERR_RX_DEST:                                           /* See Note #2.                                 */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.RxPktDiscardedCtr); /* See Note #3.                                 */
+             return;
+
+
+        case NET_SOCK_ERR_NOT_USED:
+        case NET_SOCK_ERR_CLOSED:
+        case NET_SOCK_ERR_INVALID_SOCK:
+        case NET_SOCK_ERR_INVALID_FAMILY:
+        case NET_SOCK_ERR_INVALID_PROTOCOL:
+        case NET_SOCK_ERR_INVALID_OP:
+        case NET_SOCK_ERR_RX_Q_FULL:
+        case NET_SOCK_ERR_RX_Q_SIGNAL:
+        case NET_CONN_ERR_INVALID_CONN:
+        case NET_CONN_ERR_NOT_USED:
+        case NET_CONN_ERR_CONN_NONE:
+        default:
+             NetSock_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_Open()
+*
+* Description : (1) Open a socket :
+*
+*                   (a) Acquire  network lock
+*                   (b) Validate socket arguments :
+*                       (1) Socket protocol family
+*                       (2) Socket protocol
+*                       (3) Socket type
+*
+*                   (c) Get socket from socket pool
+*                   (d) Initialize socket
+*                   (e) Release network lock
+*                   (f) Return  socket descriptor/handle identifier
+*                         OR
+*                       NET_SOCK_BSD_ERR_OPEN & error code, on failure
+*
+*
+* Argument(s) : protocol_family     Socket protocol family :
+*
+*                                       NET_SOCK_PROTOCOL_FAMILY_IP_V4  Internet Protocol version 4 (IPv4).
+*                                       NET_SOCK_PROTOCOL_FAMILY_IP_V6  Internet Protocol version 6 (IPv6).
+*
+*                                   See also 'net_sock.c  Note #1a'.
+*
+*               sock_type           Socket type :
+*
+*                                       NET_SOCK_TYPE_DATAGRAM          Datagram-type socket.
+*                                       NET_SOCK_TYPE_STREAM            Stream  -type socket.
+*
+*                                   See also 'net_sock.c  Note #1b'.
+*
+*               protocol            Socket protocol :
+*
+*                                       NET_SOCK_PROTOCOL_DFLT          Default protocol for socket type.
+*                                       NET_SOCK_PROTOCOL_UDP           User Datagram        Protocol (UDP).
+*                                       NET_SOCK_PROTOCOL_TCP           Transmission Control Protocol (TCP).
+*
+*                                   See also 'net_sock.c  Note #1c'.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket successfully opened.
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_FAMILY     Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*
+*                                                               --- RETURNED BY NetSock_Get() : ----
+*                               NET_SOCK_ERR_NONE_AVAIL         NO available sockets to allocate.
+*
+*                                                               - RETURNED BY Net_GlobalLockAcquire() : -
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Socket descriptor/handle identifier, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_OPEN,               otherwise.
+*
+* Caller(s)   : socket(),
+*               NetApp_SockOpen().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) NetSock_Open() blocked until network initialization completes.
+*********************************************************************************************************
+*/
+
+NET_SOCK_ID  NetSock_Open (NET_SOCK_PROTOCOL_FAMILY   protocol_family,
+                           NET_SOCK_TYPE              sock_type,
+                           NET_SOCK_PROTOCOL          protocol,
+                           NET_ERR                   *p_err)
+{
+    NET_SOCK     *p_sock;
+    NET_SOCK_ID   sock_id;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_SOCK_ID)0);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetSock_Open, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_fail;
+    }
+#endif
+
+
+                                                                /* ---------------- VALIDATE SOCK ARGS ---------------- */
+    switch (protocol_family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+#endif
+             switch (sock_type) {
+                 case NET_SOCK_TYPE_DATAGRAM:
+                      switch (protocol) {
+                          case NET_SOCK_PROTOCOL_UDP:
+                               break;
+
+
+                          case NET_SOCK_PROTOCOL_DFLT:
+                               protocol = NET_SOCK_PROTOCOL_UDP;
+                               break;
+
+
+                          default:
+                               NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                              *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+                               goto exit_fail;
+                      }
+                      break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+                 case NET_SOCK_TYPE_STREAM:
+                      switch (protocol) {
+#ifdef  NET_TCP_MODULE_EN
+                          case NET_SOCK_PROTOCOL_TCP:
+                               break;
+
+
+                          case NET_SOCK_PROTOCOL_DFLT:
+                               protocol = NET_SOCK_PROTOCOL_TCP;
+                               break;
+#endif
+
+                          default:
+                               NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                              *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+                               goto exit_fail;
+                      }
+                      break;
+#endif
+
+                 case NET_SOCK_TYPE_NONE:
+                 case NET_SOCK_TYPE_FAULT:
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+                     *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+                      goto exit_fail;
+             }
+             break;
+
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+             goto exit_fail;
+    }
+
+
+                                                                /* --------------------- GET SOCK --------------------- */
+    p_sock = NetSock_Get(p_err);
+    if (p_sock == (NET_SOCK *)0) {
+        goto exit_fail;                                         /* Rtn err from NetSock_Get().                          */
+    }
+
+
+                                                                /* -------------------- INIT SOCK --------------------- */
+    p_sock->ProtocolFamily = protocol_family;
+    p_sock->Protocol       = protocol;
+    p_sock->SockType       = sock_type;
+    sock_id                = p_sock->ID;
+
+    p_sock->IF_Nbr         = NET_IF_NBR_NONE;
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+    return (NET_SOCK_BSD_ERR_OPEN);
+
+exit_fail:
+   sock_id = NET_SOCK_BSD_ERR_OPEN;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+   return (sock_id);                                            /* ------------------- RTN SOCK ID -------------------- */
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_Close()
+*
+* Description : (1) Close a socket :
+*
+*                   (a) Acquire  network lock
+*                   (b) Validate socket :
+*                       (1) Validate socket used
+*                       (2) Validate socket connection state
+*                   (c) Close    socket :
+*                       (1) Transmit secure close notify alert, if socket secure        See Note #5
+*                   (d) Release  network lock
+*
+*               (2) Once an application closes its socket, NO further operations on the socket are allowed
+*                   & the application MUST NOT continue to access the socket.
+*
+*                   Continued access to the closed socket by the application layer will likely corrupt
+*                   the network socket layer.
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to close.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                       Socket successfully closed.
+*                               NET_SOCK_ERR_NOT_USED                   Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                     Socket already closed.
+*                               NET_SOCK_ERR_INVALID_TYPE               Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE              Invalid socket state.
+*
+*                                                                       ------- RETURNED BY NetSock_IsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED                 Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK               Invalid socket number.
+*
+*                                                                       - RETURNED BY NetSock_CloseHandlerStream() : -
+*                               NET_SOCK_ERR_FAULT                      Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_INVALID_FAMILY             Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_CONN_CLOSE_IN_PROGRESS     Socket close already in progress.
+*                               NET_SOCK_ERR_CONN_FAIL                  Socket connection operation(s) failed.
+*                               NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT        Socket connection close NOT signaled by
+*                                                                           timeout.
+*
+*                               NET_CONN_ERR_INVALID_CONN               Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED                   Network connection NOT currently used.
+*
+*                                                                       ---- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE              Network access NOT acquired.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE,  if NO error(s) [see Note #4].
+*
+*               NET_SOCK_BSD_ERR_CLOSE, otherwise.
+*
+* Caller(s)   : close(),
+*               NetApp_SockClose().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (3) NetSock_Close() blocked until network initialization completes.
+*
+*                   See 'NetSock_IsUsed()  Note #1'.
+*
+*               (4) NO BSD socket error is returned for any internal error while closing the socket.
+*
+*               (5) If the socket is secure, a close notify alert MUST be transmitted to the remote
+*                   host before closing the socket.
+*
+*               (6) Default case already invalidated in NetSock_Open().  However, the default case
+*                   is included as an extra precaution in case 'SockType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSock_Close (NET_SOCK_ID   sock_id,
+                                  NET_ERR      *p_err)
+{
+#ifdef  NET_SECURE_MODULE_EN
+    CPU_BOOLEAN         secure;
+    NET_ERR             err;
+#endif
+    NET_SOCK           *p_sock;
+    NET_SOCK_RTN_CODE   rtn_code;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetSock_Close, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_err_close;
+    }
+#endif
+
+
+    p_sock = &NetSock_Tbl[sock_id];
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err =  NET_SOCK_ERR_NOT_USED;
+             goto exit_err_close;
+
+
+        case NET_SOCK_STATE_CLOSED:                             /* If CLOSED from init open  ...                        */
+        case NET_SOCK_STATE_CLOSED_FAULT:                       /* ... OR internal fault(s), ...                        */
+             NetSock_Free(p_sock);                              /* ... sock need ONLY be freed.                         */
+            *p_err =  NET_SOCK_ERR_CLOSED;                      /* Rtn net sock err but rtn NO BSD err (see Note #4).   */
+             goto exit_err_close;
+
+
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_LISTEN:
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+             NetSock_CloseSockFromClose(p_sock);
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;               /* Rtn net sock err but rtn NO BSD err (see Note #4).   */
+             goto exit_err_none;
+    }
+
+
+                                                                /* -------------------- CLOSE SOCK -------------------- */
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_DATAGRAM:
+             NetSock_CloseHandler(p_sock, DEF_YES, DEF_NO);
+             rtn_code = NET_SOCK_BSD_ERR_NONE;
+            *p_err    = NET_SOCK_ERR_NONE;
+             break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+#ifdef  NET_SECURE_MODULE_EN
+             secure = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+             if (secure == DEF_YES) {                           /* If sock secure, ...                                  */
+                 NetSecure_SockCloseNotify(p_sock, &err);       /* ... tx close notify alert (see Note #5).             */
+             }
+#endif
+             rtn_code = NetSock_CloseHandlerStream(sock_id, p_sock, p_err);
+             break;
+#endif
+
+        case NET_SOCK_TYPE_NONE:
+        case NET_SOCK_TYPE_FAULT:
+        default:                                                /* See Note #6.                                         */
+             NetSock_CloseSockFromClose(p_sock);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_TYPE;                /* Rtn net sock err but rtn NO BSD err (see Note #4).   */
+             goto exit_err_close;
+    }
+
+
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (NET_SOCK_BSD_ERR_CLOSE);
+
+
+exit_err_close:
+    rtn_code = NET_SOCK_BSD_ERR_CLOSE;
+    goto exit_release;
+
+exit_err_none:
+    rtn_code = NET_SOCK_BSD_ERR_NONE;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_CloseFromConn()
+*
+* Description : Close a socket via a network connection.
+*
+*               (1) When a network connection closes a socket, the socket :
+*
+*                   (a) (1) Closes NO other network connection(s),
+*                       (2) MUST NOT recursively re-close other network connection(s);
+*
+*                   (b) SHOULD clear network connection(s)' handle identifiers.
+*
+*                   See also             'NetSock_CloseSockHandler()  Note #2a',
+*                            'net_tcp.c   NetTCP_ConnCloseFromConn()  Note #1',
+*                          & 'net_conn.c  NetConn_CloseFromApp()      Note #1b'.
+*
+*               (2) Closes socket but does NOT free the socket since NO mechanism or API exists to close
+*                   an application's reference to the socket.
+*
+*                   See also 'NetSock_CloseSock()  Note #2b'.
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to close.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_CloseApp().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetSock_CloseFromConn (NET_SOCK_ID  sock_id)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_ERR    err;
+#endif
+    NET_SOCK  *p_sock;
+
+                                                                /* ------------------ VALIDATE SOCK ------------------- */
+    if (sock_id == NET_SOCK_ID_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        return;
+    }
+#endif
+
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+             return;
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+             return;
+
+
+        case NET_SOCK_STATE_NONE:
+        case NET_SOCK_STATE_CLOSED:
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_LISTEN:
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        default:
+             break;
+    }
+#endif
+
+
+                                                                /* -------------------- CLOSE SOCK -------------------- */
+    NetSock_CloseSock((NET_SOCK  *)p_sock,
+                      (CPU_BOOLEAN)DEF_YES,                     /* See Note #1b.                                        */
+                      (CPU_BOOLEAN)DEF_NO);                     /* See Note #1a.                                        */
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_FreeConnFromSock()
+*
+* Description : (1) Free/de-reference network connection from socket :
+*
+*                   (a) Remove connection handle identifier from socket's connection accept queue
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to free network connection.
+*
+*               conn_id     Handle identifier of network connection.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CloseConnFree(),
+*               NetConn_CloseApp().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) (a) When a network connection is fully connected/established, it is queued to an
+*                       application connection as a cloned network connection until the connection is
+*                       accepted & a new application connection is created.
+*
+*                       See also 'net_tcp.c  NetTCP_RxPktConnHandlerListen()  Note #5a2A1'.
+*
+*                   (b) Therefore, network connections need only be de-referenced from cloned socket
+*                       application connections.
+*********************************************************************************************************
+*/
+
+void  NetSock_FreeConnFromSock (NET_SOCK_ID  sock_id,
+                                NET_CONN_ID  conn_id)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_ERR    err;
+#endif
+    NET_SOCK  *p_sock;
+
+                                                                /* ------------------ VALIDATE SOCK ------------------- */
+    if (sock_id == NET_SOCK_ID_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, &err);
+    if (err != NET_SOCK_ERR_NONE) {
+        return;
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+             return;
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+             return;
+
+
+        case NET_SOCK_STATE_NONE:
+        case NET_SOCK_STATE_CLOSED:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_LISTEN:
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+        default:
+             break;
+    }
+#endif
+
+
+    if (DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE_NEGO) == DEF_YES) {
+        p_sock->State = NET_SOCK_STATE_CLOSED_FAULT;
+        return;
+    }
+
+                                                                /* --------------- FREE/DE-REF CONN ID ---------------- */
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NetSock_ConnAcceptQ_ConnID_Remove(p_sock, conn_id);
+#endif
+
+
+   (void)&p_sock;                                                /* Prevent possible 'variable unused' warnings.         */
+   (void)&conn_id;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_Bind()
+*
+* Description : (1) Bind a socket to a local address :
+*
+*                   (a) Acquire  network lock
+*                   (b) Validate socket  used
+*                   (c) Bind     socket  to a local address
+*                   (d) Release  network lock
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to bind to a local address.
+*
+*               p_addr_local     Pointer to socket address structure             (see Notes #3b1B, #3b2, & #4).
+*
+*               addr_len        Length  of socket address structure (in octets) [see Note  #3b1C].
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   ------- RETURNED BY NetSock_IsUsed() : --------
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*
+*                                                                   ----- RETURNED BY NetSock_BindHandler() : -----
+*                               NET_ERR_FAULT_NULL_PTR               Argument(s) passed a NULL pointer.
+*                               NET_SOCK_ERR_NONE                   Socket successfully bound to local address.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid local address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid local address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid local port number.
+*                               NET_SOCK_ERR_ADDR_IN_USE            Local address already in use.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL        NO        address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS   Interface address(s) configuration in progress.
+*
+*                               NET_ERR_FAULT_NULL_FNCT             Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_NOT_USED               Network connection(s) NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+*                                                                   ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE, if NO error(s) [see Note #3c1].
+*
+*               NET_SOCK_BSD_ERR_BIND, otherwise      (see Note #3c2A).
+*
+* Caller(s)   : bind(),
+*               NetApp_SockBind().
+*
+*               This function is a network protocol suite application programming interface (API) function & MAY
+*               be called by application function(s).
+*
+* Note(s)     : (2) NetSock_Bind() blocked until network initialization completes.
+*
+*                   See 'NetSock_IsUsed()  Note #1'.
+*
+*               (3) (a) (1) IEEE Std 1003.1, 2004 Edition, Section 'bind() : DESCRIPTION' states that "the bind()
+*                           function shall assign a local socket address ... to a socket".
+*
+*                       (2) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                           Section 4.4, Page 102 states that "bind() lets us specify the ... address, the port,
+*                           both, or neither".
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the bind()
+*                           function takes the following arguments" :
+*
+*                           (A) 'socket' - "Specifies the file descriptor of the socket to be bound."
+*
+*                           (B) 'address' - "Points to a 'sockaddr' structure containing the address to be bound
+*                                to the socket.  The length and format of the address depend on the address family
+*                                of the socket."
+*
+*                           (C) 'address_len' - "Specifies the length of the 'sockaddr' structure pointed to by
+*                                the address argument."
+*
+*                       (2) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                           Section 4.4, Page 102 states that "if ... bind() is called" with :
+*
+*                           (A) "A port number of 0, the kernel chooses an ephemeral port."
+*
+*                               (1) "bind() does not return the chosen value ... [of] an ephemeral port ... Call
+*                                    getsockname() to return the protocol address ... to obtain the value of the
+*                                    ephemeral port assigned by the kernel."
+*
+*                           (B) "A wildcard ... address, the kernel does not choose the local ... address until
+*                                either the socket is connected (TCP) or a datagram is sent on the socket (UDP)."
+*
+*                               (1) "With IPv4, the wildcard address is specified by the constant INADDR_ANY,
+*                                    whose value is normally 0."
+*
+*                   (c) IEEE Std 1003.1, 2004 Edition, Section 'bind() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, bind() shall return 0;" ...
+*
+*                       (2) (A) "Otherwise, -1 shall be returned," ...
+*                           (B) "and 'errno' shall be set to indicate the error."
+*                               'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   (d) (1) IEEE Std 1003.1, 2004 Edition, Section 'bind() : ERRORS' states that "the bind()
+*                           function shall fail if" :
+*
+*                           (A) "[EBADF] - The 'socket' argument is not a valid file descriptor."
+*
+*                           (B) "[EAFNOSUPPORT]  - The specified address is not a valid address for the address
+*                                family of the specified socket."
+*
+*                           (C) "[EADDRNOTAVAIL] - The specified address is not available from the local machine."
+*
+*                           (D) "[EADDRINUSE]    - The specified address is already in use."
+*
+*                           (E) "[EINVAL]" -
+*
+*                               (1) (a) "The socket is already bound to an address,"                  ...
+*                                   (b) "and the protocol does not support binding to a new address;" ...
+*
+*                               (2) "or the socket has been shut down."
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'bind() : ERRORS' states that "the bind()
+*                           function may fail if" :
+*
+*                           (A) "[EINVAL]  - The 'address_len' argument is not a valid length for the address
+*                                family."
+*
+*                           (B) "[EISCONN] - The socket is already connected."
+*
+*                           (C) "[ENOBUFS] - Insufficient resources were available to complete the call."
+*
+*                   See also 'NetSock_BindHandler()  Note #2'.
+*
+*               (4) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'
+*                          & 'net_sock.c  NetSock_BindHandler()              Note #3'.
+*********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSock_Bind (NET_SOCK_ID         sock_id,
+                                 NET_SOCK_ADDR      *p_addr_local,
+                                 NET_SOCK_ADDR_LEN   addr_len,
+                                 NET_ERR            *p_err)
+{
+   NET_SOCK_RTN_CODE  rtn_code;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                 /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+   }
+#endif
+                                                                 /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_Bind, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                  /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_err_bind;
+   }
+#endif
+
+                                                                 /* -------------------- BIND SOCK --------------------- */
+   rtn_code = NetSock_BindHandler((NET_SOCK_ID      )sock_id,
+                                  (NET_SOCK_ADDR   *)p_addr_local,
+                                  (NET_SOCK_ADDR_LEN)addr_len,
+                                  (CPU_BOOLEAN      )DEF_NO,
+                                  (NET_SOCK_ADDR   *)DEF_NULL,
+                                  (NET_ERR         *)p_err);
+
+   goto exit_release;
+
+exit_lock_fault:
+    rtn_code = NET_SOCK_BSD_ERR_BIND;
+    goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_err_bind:
+    rtn_code = NET_SOCK_BSD_ERR_BIND;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+exit:
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_Conn()
+*
+* Description : (1) Connect a socket to a remote host :
+*
+*                   (a) Acquire  network lock
+*                   (b) Validate socket  used
+*                   (c) Validate remote  host address
+*                   (d) Handle   socket  connection by socket type :
+*                       (1) Handle secure session, if any
+*                   (e) Release  network lock
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to connect.
+*
+*               p_addr_remote    Pointer to socket address structure (see Note #3).
+*
+*               addr_len        Length  of socket address structure (in octets).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket successfully connected to remote address.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*
+*                                                                   -------- RETURNED BY NetSock_IsUsed() : --------
+*                               NET_INIT_ERR_NOT_COMPLETED          Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*
+*                                                                   -- RETURNED BY NetSock_IsValidAddrRemote() : ---
+*                               NET_SOCK_ERR_INVALID_CONN           Invalid socket connection.
+*
+*                                                                   - RETURNED BY NetSock_ConnHandlerDatagram() : --
+*                                                                   -- RETURNED BY NetSock_ConnHandlerStream() : ---
+*                               NET_ERR_FAULT_NULL_PTR               Argument(s) passed a NULL pointer.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid socket address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid socket port number.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*                               NET_SOCK_ERR_ADDR_IN_USE            Socket address    already in use.
+*                               NET_SOCK_ERR_CONN_IN_USE            Socket connection already in use.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL        NO        address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS   Interface address(s) configuration in progress.
+*
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_NOT_USED               Network connection(s) NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+*                                                                   -- RETURNED BY NetSock_ConnHandlerStream() : ---
+*                               NET_SOCK_ERR_CONN_IN_PROGRESS       Socket connection in progress.
+*                               NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT    Socket connection request NOT signaled within
+*                                                                       timeout.
+*                               NET_ERR_IF_LINK_DOWN              Socket connection's interface link down.
+*
+*                                                                   ------ RETURNED BY NetSecure_SockConn() : ------
+*                               NET_SECURE_ERR_NULL_PTR             Secure session pointer is NULL.
+*                               NET_SECURE_ERR_HANDSHAKE            Secure socket NOT successfully connected.
+*
+*                                                                   See specific network security port for
+*                                                                       additional return error codes.
+*
+*                                                                   ---- RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_CONN, otherwise.
+*
+* Caller(s)   : connect(),
+*               NetApp_SockConn().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) NetSock_Conn() blocked until network initialization completes.
+*
+*                   See 'NetSock_IsUsed()  Note #1'.
+*
+*               (3) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (4) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'SockType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSock_Conn (NET_SOCK_ID         sock_id,
+                                 NET_SOCK_ADDR      *p_addr_remote,
+                                 NET_SOCK_ADDR_LEN   addr_len,
+                                 NET_ERR            *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_BOOLEAN         valid;
+#endif
+#ifdef  NET_SECURE_MODULE_EN
+    CPU_BOOLEAN         secure;
+#endif
+    NET_SOCK           *p_sock;
+    NET_SOCK_RTN_CODE   rtn_code;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetSock_Conn, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_err_conn;
+    }
+#endif
+
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* --------------- VALIDATE REMOTE ADDR --------------- */
+    valid = NetSock_IsValidAddrRemote(p_addr_remote, addr_len, p_sock, p_err);
+    if (valid != DEF_YES) {
+        goto exit_err_conn;
+    }
+#else
+   (void)&addr_len;                                             /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+                                                                /* -------------------- CONN SOCK --------------------- */
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_DATAGRAM:
+             rtn_code = NetSock_ConnHandlerDatagram(sock_id, p_sock, p_addr_remote, p_err);
+             break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+             rtn_code = NetSock_ConnHandlerStream(sock_id, p_sock, p_addr_remote, p_err);
+
+#ifdef  NET_SECURE_MODULE_EN
+             if (rtn_code != NET_SOCK_BSD_ERR_CONN) {
+                 secure = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+                 if (secure == DEF_YES) {                       /* If sock secure, ...                                  */
+                     DEF_BIT_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE_NEGO);
+                     NetSecure_SockConn(p_sock, p_err);         /* ... handle conn secure session.                      */
+                     DEF_BIT_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE_NEGO);
+                     if (*p_err != NET_SOCK_ERR_NONE) {
+                          NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+                          goto exit_err_conn;
+                     }
+                 }
+             }
+#endif
+             break;
+#endif
+
+        case NET_SOCK_TYPE_NONE:
+        case NET_SOCK_TYPE_FAULT:
+        default:                                                /* See Note #4.                                         */
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+             goto exit_err_conn;
+    }
+
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (NET_SOCK_BSD_ERR_CONN);
+
+exit_err_conn:
+    rtn_code = NET_SOCK_BSD_ERR_CONN;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_ConnSignalReq()
+*
+* Description : Signal socket that connection request complete; socket now connected.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to signal connection request.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket connection successfully signaled.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*
+*                                                                   ------ RETURNED BY NetSock_IsUsed() : ------
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*
+*                                                                   - RETURNED BY NetSock_ConnReqSignal() : -
+*                               NET_SOCK_ERR_CONN_SIGNAL_FAULT      Socket connection request signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSignalConn().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) See 'NetSock_ConnHandlerStream()  Note #2c3'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+void  NetSock_ConnSignalReq (NET_SOCK_ID   sock_id,
+                             NET_ERR      *p_err)
+{
+    NET_SOCK  *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE SOCK TYPE ---------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+       *p_err = NET_SOCK_ERR_INVALID_TYPE;
+        return;
+    }
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err = NET_SOCK_ERR_NOT_USED;
+             return;
+
+
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_LISTEN:                             /* See Note #1.                                         */
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+             break;
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err = NET_SOCK_ERR_CLOSED;
+             return;
+
+
+        case NET_SOCK_STATE_CLOSED:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CONN_DONE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+            *p_err = NET_SOCK_ERR_INVALID_OP;
+             return;
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err = NET_SOCK_ERR_INVALID_STATE;
+             return;
+    }
+#endif
+
+
+                                                                /* ----------------- SIGNAL SOCK CONN ----------------- */
+    NetSock_ConnReqSignal(p_sock, p_err);                       /* Signal sock conn req.                                */
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return;
+    }
+
+    p_sock->State = NET_SOCK_STATE_CONN_DONE;                    /* Update sock state as conn done.                      */
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_ConnChildAdd()
+*
+* Description : Signal socket to add a child connection.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to signal connection accept.
+*
+*               conn_id     Handle identifier of network connection.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket connection successfully signaled.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*
+*                                                                   --------- RETURNED BY NetSock_IsUsed() : ---------
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*
+*                                                                   - RETURNED BY NetSock_ConnAcceptQ_ConnID_Add() : -
+*                               NET_SOCK_ERR_CONN_ACCEPT_Q_MAX      Socket maximum connection accept limit exceeded.
+*                               NET_SOCK_ERR_CONN_ACCEPT_Q_DUP      Connection handle identifier already in socket
+*                                                                       connection accept queue.
+*
+*                                                                   - RETURNED BY NetSock_ConnAcceptQ_Signal() : --
+*                               NET_SOCK_ERR_CONN_SIGNAL_FAULT      Socket connection accept queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerListen().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) On any faults, network connection NOT freed/closed; caller function(s) SHOULD handle
+*                   fault condition(s).
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+void  NetSock_ConnChildAdd (NET_SOCK_ID   sock_id,
+                            NET_CONN_ID   conn_id,
+                            NET_ERR      *p_err)
+{
+    NET_SOCK  *p_sock;
+
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return;
+    }
+#endif
+
+    NetSock_ConnAcceptQ_ConnID_Add(p_sock, conn_id, p_err);       /* Add conn id to sock accept Q.                        */
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_ConnSignalAccept()
+*
+* Description : Signal socket that connection request received; socket accept now available.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to signal connection accept.
+*
+*               conn_id     Handle identifier of network connection.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket connection successfully signaled.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*
+*                                                                   --------- RETURNED BY NetSock_IsUsed() : ---------
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*
+*                                                                   - RETURNED BY NetSock_ConnAcceptQ_ConnID_Add() : -
+*                               NET_SOCK_ERR_CONN_ACCEPT_Q_MAX      Socket maximum connection accept limit exceeded.
+*                               NET_SOCK_ERR_CONN_ACCEPT_Q_DUP      Connection handle identifier already in socket
+*                                                                       connection accept queue.
+*
+*                                                                   - RETURNED BY NetSock_ConnAcceptQ_Signal() : --
+*                               NET_SOCK_ERR_CONN_SIGNAL_FAULT      Socket connection accept queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSignalConn().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) On any faults, network connection NOT freed/closed; caller function(s) SHOULD handle
+*                   fault condition(s).
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+void  NetSock_ConnSignalAccept (NET_SOCK_ID   sock_id,
+                                NET_CONN_ID   conn_id,
+                                NET_ERR      *p_err)
+{
+    NET_SOCK               *p_sock;
+    NET_SOCK_ACCEPT_Q_OBJ  *p_obj;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE SOCK TYPE ---------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+       *p_err = NET_SOCK_ERR_INVALID_TYPE;
+        return;
+    }
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err = NET_SOCK_ERR_NOT_USED;
+             return;
+
+
+        case NET_SOCK_STATE_LISTEN:
+             break;
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err = NET_SOCK_ERR_CLOSED;
+             return;
+
+
+        case NET_SOCK_STATE_CLOSED:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+            *p_err = NET_SOCK_ERR_INVALID_OP;
+             return;
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err = NET_SOCK_ERR_INVALID_STATE;
+             return;
+    }
+#endif
+
+    p_obj = NetSock_ConnAcceptQ_ConnID_Srch(p_sock, conn_id);
+    if (p_obj != DEF_NULL) {
+        p_obj->IsRdy = DEF_YES;
+    } else {
+       *p_err = NET_SOCK_ERR_INVALID_CONN;
+        return;
+    }
+
+    NetSock_ConnAcceptQ_Signal(p_sock, p_err);               /* Signal         sock accept Q.                        */
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         NetSock_ConnAcceptQ_Clr(p_sock);
+         return;
+    }
+
+
+   (void)&conn_id;
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_ConnSignalClose()
+*
+* Description : Signal socket that connection close complete; socket connection now closed.
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to signal connection close.
+*
+*               data_avail      Indicate whether application data is still available for the socket connection :
+*
+*                                   DEF_YES                         Application data is     available for the
+*                                                                       closing socket connection.
+*                                   DEF_NO                          Application data is NOT available for the
+*                                                                       closing socket connection.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket connection successfully signaled.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*
+*                                                                   ------- RETURNED BY NetSock_IsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*
+*                                                                   - RETURNED BY NetSock_ConnCloseSignal() : -
+*                               NET_SOCK_ERR_CONN_SIGNAL_FAULT      Socket connection close signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSignalClose().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) NetSock_ConnSignalClose() blocked until network initialization completes.
+*
+*               (2) Once a socket connection has been signaled of its close :
+*
+*                   (a) Close socket connection
+*                   (b) Close socket connection's reference to network connection
+*                   (c) Do NOT close transport connection(s); transport layer responsible for closing its
+*                           remaining connection(s)
+*
+*                   See also 'NetSock_CloseHandlerStream()  Note #2b'.
+*
+*               (3) (a) Since sockets that have already closed are NOT to be accessed (see 'NetSock_Close()
+*                       Note #2'), non-blocking socket close may NOT require close completion.
+*
+*                   (b) #### NET-798
+*
+*                   See Note 'NetSock_Close()  Note #2'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+void  NetSock_ConnSignalClose (NET_SOCK_ID   sock_id,
+                               CPU_BOOLEAN   data_avail,
+                               NET_ERR      *p_err)
+{
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   block;
+
+                                                                /* ------------------ VALIDATE SOCK ------------------- */
+    if (sock_id == NET_SOCK_ID_NONE) {
+       *p_err = NET_SOCK_ERR_NONE;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK TYPE ---------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+       *p_err = NET_SOCK_ERR_INVALID_TYPE;
+        return;
+    }
+#endif
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+            *p_err = NET_SOCK_ERR_NOT_USED;
+             return;
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err = NET_SOCK_ERR_CLOSED;
+             return;
+
+
+        case NET_SOCK_STATE_CLOSED:
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_LISTEN:
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+            *p_err = NET_SOCK_ERR_INVALID_OP;
+             return;
+
+
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err = NET_SOCK_ERR_INVALID_STATE;
+             return;
+    }
+
+
+                                                                /* ----------------- SIGNAL SOCK CONN ----------------- */
+    block = DEF_BIT_IS_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+    if (block != DEF_NO) {                                      /* If blocking sock conn, ...                           */
+        if (data_avail  != DEF_YES) {
+            p_sock->State = NET_SOCK_STATE_CLOSED;
+        } else {
+            p_sock->State = NET_SOCK_STATE_CLOSING_DATA_AVAIL;
+        }
+
+        NetSock_ConnCloseSignal(p_sock, p_err);              /* ...  signal sock conn close.                         */
+        if (*p_err != NET_SOCK_ERR_NONE) {
+             return;
+        }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    } else {                                                    /* Else complete sock close (see Note #3a).             */
+        if (data_avail != DEF_YES) {
+            NetSock_CloseHandler((NET_SOCK  *)p_sock,            /* See Note #2a.                                        */
+                                 (CPU_BOOLEAN)DEF_YES,          /* See Note #2b.                                        */
+                                 (CPU_BOOLEAN)DEF_NO);          /* See Note #2c.                                        */
+        } else {
+            p_sock->State = NET_SOCK_STATE_CLOSING_DATA_AVAIL;
+        }
+#endif
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_Listen()
+*
+* Description : (1) Set socket to listen for connection requests :
+*
+*                   (a) Acquire   network   lock
+*                   (b) Validate  socket :
+*                       (1) Validate socket used
+*                       (2) Validate socket type
+*                       (3) Validate socket connection state
+*                   (c) Configure transport connection
+*                   (d) Update    socket    connection state
+*                   (e) Release   network   lock
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to listen.
+*
+*               sock_q_size     Maximum number of connection requests to accept & queue on listen socket.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket successfully set to listen.
+*                               NET_SOCK_ERR_INVALID_FAMILY     Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection configuration failed.
+*
+*                                                               ------ RETURNED BY NetSock_IsUsed() : ------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*
+*                                                               - RETURNED BY NetSock_GetConnTransport() : -
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE,   if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_LISTEN, otherwise.
+*
+* Caller(s)   : listen(),
+*               NetApp_SockListen().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) NetSock_Listen() blocked until network initialization completes.
+*
+*                   See 'NetSock_IsUsed()  Note #1'.
+*
+*               (3) Socket listen operation valid for stream-type sockets only.
+*
+*               (4) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*               (5) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*
+*               (6) On ANY error(s) after the transport connection is allocated, the transport connection
+*                   MUST be freed.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+NET_SOCK_RTN_CODE  NetSock_Listen (NET_SOCK_ID       sock_id,
+                                   NET_SOCK_Q_SIZE   sock_q_size,
+                                   NET_ERR          *p_err)
+{
+   NET_SOCK           *p_sock;
+   NET_CONN_ID         conn_id_transport;
+   NET_SOCK_RTN_CODE   rtn_code;
+   NET_ERR             err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_Listen, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_err_listen;
+   }
+#endif
+
+
+   p_sock = &NetSock_Tbl[sock_id];
+                                                                /* ---------------- VALIDATE SOCK TYPE ---------------- */
+   switch (p_sock->SockType) {                                  /* Validate stream type sock(s) [see Note #3].          */
+       case NET_SOCK_TYPE_DATAGRAM:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_err_listen;
+
+
+       case NET_SOCK_TYPE_STREAM:
+            break;
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       default:                                                 /* See Note #4.                                         */
+            NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_err_listen;
+   }
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+   switch (p_sock->State) {
+       case NET_SOCK_STATE_FREE:
+       case NET_SOCK_STATE_DISCARD:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+           *p_err =  NET_SOCK_ERR_NOT_USED;
+            goto exit_err_listen;
+
+
+       case NET_SOCK_STATE_BOUND:
+            break;
+
+
+       case NET_SOCK_STATE_CLOSED_FAULT:
+           *p_err =  NET_SOCK_ERR_CLOSED;
+            goto exit_err_listen;
+
+
+       case NET_SOCK_STATE_CLOSED:
+       case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+       case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+       case NET_SOCK_STATE_LISTEN:
+       case NET_SOCK_STATE_CONN:
+       case NET_SOCK_STATE_CONN_IN_PROGRESS:
+       case NET_SOCK_STATE_CONN_DONE:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_OP;
+            goto exit_err_listen;
+
+
+       case NET_SOCK_STATE_NONE:
+       default:
+            NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_STATE;
+            goto exit_err_listen;
+   }
+
+
+                                                                /* ---------------- CFG TRANSPORT CONN ---------------- */
+                                                                /* Get transport conn.                                  */
+   conn_id_transport = NetSock_GetConnTransport(p_sock, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_err_listen;
+   }
+
+                                                                /* Cfg transport to LISTEN.                             */
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+   NetTCP_ConnSetStateListen(conn_id_transport,
+                            &NetSock_ListenQ_IsAvail,
+                            &err);
+   if (err != NET_TCP_ERR_NONE) {                               /* If any errs, free transport conn (see Note #6).      */
+       NetTCP_ConnFree((NET_TCP_CONN_ID)conn_id_transport);
+      *p_err = NET_SOCK_ERR_CONN_FAIL;
+   } else {
+      *p_err = NET_SOCK_ERR_NONE;
+   }
+
+#else
+   (void)&conn_id_transport;                                    /* Prevent 'variable unused' compiler warnings.         */
+   (void)&err;
+   *p_err = NET_SOCK_ERR_CONN_FAIL;
+#endif
+
+#else                                                           /* See Note #5.                                         */
+   NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+  *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+   goto exit_err_listen;
+#endif
+
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_err_listen;
+   }
+
+
+                                                                /* -------------- UPDATE SOCK CONN STATE -------------- */
+   NetSock_ConnAcceptQ_Init(p_sock, sock_q_size);               /* Init listen sock conn accept Q.                      */
+
+   p_sock->State = NET_SOCK_STATE_LISTEN;
+
+   rtn_code      = NET_SOCK_BSD_ERR_NONE;
+
+  *p_err         = NET_SOCK_ERR_NONE;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (NET_SOCK_BSD_ERR_LISTEN);
+
+exit_err_listen:
+   rtn_code = NET_SOCK_BSD_ERR_LISTEN;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+   return (rtn_code);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_ListenQ_IsAvail()
+*
+* Description : Check if socket's listen queue is available to queue a new connection.
+*
+*               (1) Socket connection accept queue synonymous with socket listen queue.
+*
+*
+* Argument(s) : conn_id_app     Connection handle identifier of socket to check listen queue.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket listen queue successfully checked;
+*                                                                   check return value for socket listen
+*                                                                   queue availability.
+*
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*
+*                                                               ---- RETURNED BY NetSock_IsUsed() : -----
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*
+* Return(s)   : DEF_YES, if socket listen queue is available to queue a new connection.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerListenQ_IsAvail().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) (a) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 18.11, Pages 257-258
+*                       states that :
+*
+*                       (1) "Each listening end point has a fixed length queue of connections that have been
+*                            accepted [i.e. connected] ... but not yet accepted by the application."
+*
+*                       (2) "The application specifies a limit to this queue, commonly called the backlog" :
+*
+*                           (A) "This backlog must be between 0 and 5, inclusive."
+*                           (B) "(Most applications specify the maximum value of 5.)"
+*
+*                   (b) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 15.9, Page 455
+*                       reiterates that :
+*
+*                       (2) A "listen ... socket ... specifies a limit on the number of connections that can
+*                           be queued on the socket," ...
+*
+*                       (5) "after which the socket layer refuses to queue additional connection requests."
+*
+*                   See also 'net_tcp.c  NetTCP_RxPktConnHandlerListenQ_IsAvail()  Note #1'.
+*********************************************************************************************************
+*/
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN  NetSock_ListenQ_IsAvail (NET_CONN_ID   conn_id_app,
+                                              NET_ERR      *p_err)
+{
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   q_avail;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(conn_id_app, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return (DEF_NO);
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[conn_id_app];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE SOCK TYPE ---------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+       *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+        return (DEF_NO);
+    }
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err =  NET_SOCK_ERR_NOT_USED;
+             return (DEF_NO);
+
+
+        case NET_SOCK_STATE_LISTEN:
+             break;
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;
+             return (DEF_NO);
+
+
+        case NET_SOCK_STATE_CLOSED:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_OP;
+             return (DEF_NO);
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;
+             return (DEF_NO);
+    }
+#endif
+                                                                /* ------------- CHK SOCK LISTEN Q AVAIL -------------- */
+    q_avail = NetSock_ConnAcceptQ_IsAvail(p_sock, p_err);         /* Chk if listen Q avail for new conns (see Note #2).   */
+
+    return (q_avail);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_Accept()
+*
+* Description : (1) Return a new socket accepted from a listen socket :
+*
+*                   (a) Validate address pointers
+*                   (b) Acquire  network lock
+*                   (c) Validate listen socket :
+*                       (1) Validate listen socket used
+*                       (2) Validate listen socket type
+*                       (3) Validate listen socket connection state                         See Note #10
+*
+*                   (d) Wait on  listen socket's connection accept queue
+*                   (e) Configure accept socket :
+*                       (1) Get    accept socket from socket pool
+*                       (2) Copy   accept socket from listen socket
+*                       (3) Update network   connection's application layer handle identifier
+*                               as accept socket's handle identifier
+*                       (4) Update transport connection, if necessary
+*                       (5) Update accept socket connection state
+*                       (6) Handle secure session, if any
+*
+*                   (f) Return accept socket connection's remote address
+*                   (g) Release network lock
+*                   (h) Return  socket descriptor/handle identifier of new accept socket
+*                         OR
+*                       NET_SOCK_BSD_ERR_ACCEPT & error code, on failure
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of listen socket.
+*
+*               p_addr_remote    Pointer to an address buffer that will receive the socket address structure
+*                                   of the accepted socket's remote address (see Note #3).
+*
+*               p_addr_len       Pointer to a variable to ... :
+*
+*                                   (a) Pass the size of the address buffer pointed to by 'p_addr_remote'.
+*                                   (b) (1) Return the actual size of socket address structure with the
+*                                               accepted socket's remote address, if NO error(s);
+*                                       (2) Return 0,                             otherwise.
+*
+*                               See also Note #4.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                       New socket successfully accepted.
+*                               NET_ERR_FAULT_NULL_PTR                   Argument 'p_addr_remote'/'p_addr_len' passed
+*                                                                           a NULL pointer.
+*                               NET_SOCK_ERR_NOT_USED                   Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                     Socket already closed.
+*                               NET_SOCK_ERR_FAULT                      Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_INVALID_FAMILY             Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_TYPE               Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE              Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP                 Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN           Invalid socket address structure length.
+*                               NET_SOCK_ERR_CONN_ACCEPT_Q_NONE_AVAIL   Accept connection handle identifier
+*                                                                           NOT available.
+*                               NET_SOCK_ERR_CONN_FAIL                  Socket connection operation(s) failed.
+*
+*                                                                       ------- RETURNED BY NetSock_IsUsed() : --------
+*                               NET_INIT_ERR_NOT_COMPLETED                 Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK               Invalid socket number.
+*
+*                                                                       --------- RETURNED BY NetSock_Get() : ---------
+*                               NET_SOCK_ERR_NONE_AVAIL                 NO available sockets to allocate.
+*
+*                                                                       - RETURNED BY NetSock_ConnAcceptQ_Wait() : -
+*                               NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT        Socket connection accept queue still empty
+*                                                                           within timeout.
+*
+*                                                                       ---- RETURNED BY NetSecure_SockAccept() : -----
+*                               NET_SECURE_ERR_NULL_PTR                 Secure session pointer is NULL.
+*                               NET_SECURE_ERR_NOT_AVAIL                Secure session NOT available.
+*                               NET_SECURE_ERR_HANDSHAKE                Secure socket  NOT successfully accepted.
+*
+*                                                                       See specific network security port for
+*                                                                           additional return error codes.
+*
+*                                                                       ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE              Network access NOT acquired.
+*
+* Return(s)   : Socket descriptor/handle identifier of new accepted socket, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_ACCEPT,                                    otherwise.
+*
+* Caller(s)   : accept(),
+*               NetApp_SockAccept().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) NetSock_Accept() blocked until network initialization completes.
+*
+*                   See 'NetSock_IsUsed()  Note #1'.
+*
+*               (3) (a) Socket address structure 'AddrFamily' member returned in host-order & SHOULD NOT
+*                       be converted to network-order.
+*
+*                   (b) Socket address structure addresses returned in network-order & SHOULD be converted
+*                       from network-order to host-order.
+*
+*                       See also Note #9.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (4) Since 'p_addr_len' argument is both an input & output argument (see 'Argument(s) :
+*                   p_addr_len'), ... :
+*
+*                   (a) Its input value SHOULD be validated prior to use; ...
+*                       (1) In the case that the 'p_addr_len' argument is passed a null pointer,
+*                           NO input value is validated or used.
+*
+*                   (b) While its output value MUST be initially configured to return a default value
+*                       PRIOR to all other validation or function handling in case of any error(s).
+*
+*               (5) Socket accept operation valid for stream-type sockets only.
+*
+*               (6) Default case already invalidated in NetSock_Open().  However, the default case
+*                   is included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*               (7) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*
+*               (8) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) PRIOR to network connection handle identifier dequeued from listen socket's
+*                       connection accept queue, only the listen socket need be freed for certain
+*                       errors; NO network resources need be freed.
+*
+*                   (b) After    network connection handle identifier dequeued from listen socket's
+*                       connection accept queue, free network connection.
+*
+*                   (c) After new accept socket allocated, free network connection & new socket.
+*                       (1) Socket close handler frees network connection (see 'NetSock_CloseSockHandler()
+*                           Note #2').
+*
+*               (9) (a) Socket connection addresses are maintained in network-order.
+*
+*                   (b) However, since the port number & address are copied from a network-order multi-
+*                       octet array directly into a network-order socket address structure, they do NOT
+*                       need to be converted from host-order to network-order.
+*
+*              (10) Socket descriptor read availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor read handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also  Note #1c3,
+*                            'NetSock_SelDescHandlerRdStream()   Note #3',
+*                          & 'NetSock_SelDescHandlerErrStream()  Note #3'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+NET_SOCK_ID  NetSock_Accept (NET_SOCK_ID         sock_id,
+                             NET_SOCK_ADDR      *p_addr_remote,
+                             NET_SOCK_ADDR_LEN  *p_addr_len,
+                             NET_ERR            *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+   NET_SOCK_ADDR_IPv4  *p_addr_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+   NET_SOCK_ADDR_IPv6  *p_addr_ipv6;
+#endif
+#ifdef  NET_SECURE_MODULE_EN
+   CPU_BOOLEAN          secure;
+#endif
+   NET_SOCK            *p_sock;
+   CPU_INT08U           addr_remote[NET_SOCK_ADDR_LEN_MAX];
+   NET_CONN_ADDR_LEN    addr_len;
+   NET_SOCK            *p_sock_listen;
+   NET_SOCK            *p_sock_accept;
+   NET_SOCK_ID          sock_id_accept;
+   NET_CONN_ID          conn_id_accept;
+   NET_CONN_ID          conn_id_transport;
+   CPU_BOOLEAN          block;
+   NET_ERR              err;
+
+
+                                                                        /* ------------ VALIDATE ADDR PTRS ------------ */
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                        /* ----------- VALIDATE RTN ERR PTR ----------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION((NET_SOCK_ID)0);
+   }
+                                                                        /* ------------ VALIDATE ADDR PTRS ------------ */
+   if (p_addr_len == (NET_SOCK_ADDR_LEN *)0) {                          /* See Note #4a1.                               */
+
+       NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NullPtrCtr);
+      *p_err =  NET_ERR_FAULT_NULL_PTR;
+       goto exit_lock_fault;
+   }
+
+   addr_len = (NET_CONN_ADDR_LEN)*p_addr_len;
+#endif
+  *p_addr_len = (NET_SOCK_ADDR_LEN) 0;                                  /* Cfg dflt addr len for err (see Note #4b).    */
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+#endif
+
+
+   p_sock = &NetSock_Tbl[sock_id];
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+   switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+       case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+            if (addr_len < (NET_SOCK_ADDR_LEN)NET_SOCK_ADDR_IPv4_SIZE) {    /* Validate initial addr len (see Note #6a).*/
+                NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrLenCtr);
+               *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+                goto exit_err_acccept;
+            }
+            break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+       case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+            if (addr_len < (NET_SOCK_ADDR_LEN)NET_SOCK_ADDR_IPv6_SIZE) {  /* Validate initial addr len (see Note #6a).            */
+                NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrLenCtr);
+               *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+                goto exit_err_acccept;
+            }
+            break;
+#endif
+
+       default:
+
+            break;
+   }
+
+   if (p_addr_remote == (NET_SOCK_ADDR *)0) {
+       NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NullPtrCtr);
+      *p_err =  NET_ERR_FAULT_NULL_PTR;
+       goto exit_err_acccept;
+   }
+#endif
+
+
+                                                                        /* ------------- ACQUIRE NET LOCK ------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_Accept,p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                         /* -------- VALIDATE LISTEN SOCK USED --------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_err_acccept;
+   }
+#endif
+
+
+   p_sock_listen = &NetSock_Tbl[sock_id];
+                                                                        /* -------- VALIDATE LISTEN SOCK TYPE --------- */
+   switch (p_sock_listen->SockType) {                                   /* Validate stream type sock(s) [see Note #5].  */
+       case NET_SOCK_TYPE_DATAGRAM:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_err_acccept;
+
+
+       case NET_SOCK_TYPE_STREAM:
+            break;
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       default:                                                        /* See Note #6.                                 */
+            NetSock_CloseSock(p_sock_listen, DEF_YES, DEF_YES);
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_err_acccept;
+   }
+
+
+                                                                       /* ----- VALIDATE LISTEN SOCK CONN STATE ------ */
+   switch (p_sock_listen->State) {
+       case NET_SOCK_STATE_FREE:
+       case NET_SOCK_STATE_DISCARD:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+           *p_err =  NET_SOCK_ERR_NOT_USED;
+            goto exit_err_acccept;
+
+
+       case NET_SOCK_STATE_LISTEN:
+            break;
+
+
+       case NET_SOCK_STATE_CLOSED_FAULT:
+           *p_err =  NET_SOCK_ERR_CLOSED;
+            goto exit_err_acccept;
+
+
+       case NET_SOCK_STATE_CLOSED:
+       case NET_SOCK_STATE_BOUND:
+       case NET_SOCK_STATE_CONN:
+       case NET_SOCK_STATE_CONN_IN_PROGRESS:
+       case NET_SOCK_STATE_CONN_DONE:
+       case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+       case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_OP;
+            goto exit_err_acccept;
+
+
+       case NET_SOCK_STATE_NONE:
+       default:
+            NetSock_CloseSock(p_sock_listen, DEF_YES, DEF_YES);
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_STATE;
+            goto exit_err_acccept;
+   }
+
+
+
+                                                                        /* ------- WAIT ON LISTEN SOCK ACCEPT Q ------- */
+   block = DEF_BIT_IS_CLR(p_sock_listen->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+   if (block != DEF_YES) {                                              /* If non-blocking sock rx  ...                 */
+       CPU_BOOLEAN  is_rdy_found;
+       NET_ERR      local_err;
+
+
+       is_rdy_found = NetSock_ConnAcceptQ_IsRdy(p_sock, &local_err);
+       if (is_rdy_found == DEF_NO) {
+          *p_err =  NET_SOCK_ERR_CONN_ACCEPT_Q_NONE_AVAIL;              /* ... rtn  conn accept Q empty err.            */
+           goto exit_err_acccept;
+       }
+   }
+
+
+   Net_GlobalLockRelease();
+   NetSock_ConnAcceptQ_Wait(p_sock, p_err);
+   Net_GlobalLockAcquire((void *)&NetSock_Accept, &err);
+   if (err != NET_ERR_NONE) {
+      *p_err  = err;
+       goto exit_lock_fault;
+   }
+
+   switch (*p_err) {
+       case NET_SOCK_ERR_NONE:
+            break;
+
+       case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+            goto exit_err_acccept;                                      /* Rtn err from NetSock_ConnAcceptQ_Wait().  */
+
+       case NET_SOCK_ERR_CONN_SIGNAL_ABORT:
+       case NET_SOCK_ERR_CONN_SIGNAL_FAULT:
+       default:
+           *p_err =  NET_SOCK_ERR_FAULT;
+            goto exit_err_acccept;
+   }
+
+                                                                       /* Get conn id from sock conn accept Q.         */
+   conn_id_accept = NetSock_ConnAcceptQ_ConnID_Get(p_sock_listen, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_err_acccept;
+   }
+   if  (conn_id_accept == NET_CONN_ID_NONE) {
+       *p_err  = NET_SOCK_ERR_CONN_FAIL;
+        goto exit_err_acccept;
+   }
+
+                                                                       /* Validate transport conn.                     */
+   conn_id_transport = NetConn_ID_TransportGet(conn_id_accept, &err);
+   if ( err != NET_CONN_ERR_NONE) {                                    /* See Note #8b.                                */
+       NetSock_CloseConn(conn_id_accept);
+      *p_err  = NET_SOCK_ERR_CONN_FAIL;
+       goto exit_err_acccept;
+   }
+   if (conn_id_transport == NET_CONN_ID_NONE) {
+       NetSock_CloseConn(conn_id_accept);
+      *p_err  = NET_SOCK_ERR_CONN_FAIL;
+       goto exit_err_acccept;
+   }
+
+
+
+                                                                        /* ----------- CFG NEW ACCEPT SOCK ------------ */
+   p_sock_accept = NetSock_Get(p_err);
+   if (p_sock_accept == (NET_SOCK *)0) {                                /* See Note #8b.                                */
+       NetSock_CloseConn(conn_id_accept);
+       goto exit_err_acccept;                                           /* Rtn err from NetSock_Get().                  */
+   }
+
+                                                                        /* Copy listen sock into new accept sock.       */
+   NetSock_Copy(p_sock_accept, p_sock_listen);
+
+                                                                        /* Set new conn & app id's.                     */
+   p_sock_listen->ConnChildQ_SizeCur++;
+   p_sock_accept->ID_SockParent = p_sock_listen->ID;
+   p_sock_accept->ID_Conn       = conn_id_accept;
+   sock_id_accept               = p_sock_accept->ID;
+   NetConn_ID_AppSet((NET_CONN_ID) conn_id_accept,
+                     (NET_CONN_ID) sock_id_accept,
+                     (NET_ERR   *)&err);
+   if ( err != NET_CONN_ERR_NONE) {                                     /* See Note #8c.                                */
+       NetSock_CloseHandler(p_sock_accept, DEF_YES, DEF_YES);
+      *p_err  = NET_SOCK_ERR_CONN_FAIL;
+       goto exit_err_acccept;
+   }
+
+
+#ifndef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+                                                                        /* Signal TCP that the connection is accepted.  */
+   NetTCP_ConnAppAcceptRdySignal(p_sock_listen->ID_Conn, conn_id_transport, &err);
+                                                                        /* Set the Rx Window (greater than 0).          */
+#endif
+                                                                        /* Update accept sock conn state.               */
+   p_sock_accept->State = NET_SOCK_STATE_CONN;
+
+#ifdef  NET_SECURE_MODULE_EN
+   secure = DEF_BIT_IS_SET(p_sock_accept->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+   if (secure == DEF_YES) {                                             /* If sock secure, ...                          */
+       DEF_BIT_SET(p_sock_accept->Flags, NET_SOCK_FLAG_SOCK_SECURE_NEGO);
+       NetSecure_SockAccept(p_sock_listen, p_sock_accept, p_err);       /* ... handle accept secure session.            */
+       DEF_BIT_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE_NEGO);
+       if (*p_err != NET_SOCK_ERR_NONE) {
+            NetSock_CloseHandler(p_sock_accept, DEF_YES, DEF_YES);
+            goto exit_err_acccept;
+       }
+   }
+#endif
+
+                                                                        /* ------ RTN ACCEPT CONN'S REMOTE ADDR ------- */
+                                                                        /* Get conn's remote addr.                      */
+   addr_len = sizeof(addr_remote);
+   NetConn_AddrRemoteGet((NET_CONN_ID        ) conn_id_accept,
+                         (CPU_INT08U        *)&addr_remote[0],
+                         (NET_CONN_ADDR_LEN *)&addr_len,
+                         (NET_ERR           *)&err);
+   if ( err != NET_CONN_ERR_NONE) {                                    /* See Note #8c.                                */
+       NetSock_CloseHandler(p_sock_accept, DEF_YES, DEF_YES);
+      *p_err  = NET_SOCK_ERR_CONN_FAIL;
+       goto exit_err_acccept;
+   }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+   if (addr_len > NET_SOCK_ADDR_LEN_MAX) {                             /* See Note #8c.                                */
+       NetSock_CloseHandler(p_sock_accept, DEF_YES, DEF_YES);
+      *p_err  = NET_SOCK_ERR_INVALID_ADDR_LEN;
+       goto exit_err_acccept;
+   }
+#endif
+
+                                                                        /* Cfg & rtn sock conn's remote addr.           */
+   switch (p_sock_listen->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+       case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+            p_addr_ipv4  = (NET_SOCK_ADDR_IPv4 *)p_addr_remote;          /* Cfg remote addr struct (see Notes #3 & #9b). */
+            NET_UTIL_VAL_SET_HOST_16(&p_addr_ipv4->AddrFamily, NET_SOCK_ADDR_FAMILY_IP_V4);
+            NET_UTIL_VAL_COPY_16(&p_addr_ipv4->Port, &addr_remote[NET_SOCK_ADDR_IP_IX_PORT]);
+            NET_UTIL_VAL_COPY_32(&p_addr_ipv4->Addr, &addr_remote[NET_SOCK_ADDR_IP_V4_IX_ADDR]);
+            Mem_Clr((void     *) &p_addr_ipv4->Unused[0],
+                    (CPU_SIZE_T)  NET_SOCK_ADDR_IPv4_NBR_OCTETS_UNUSED);
+
+           *p_addr_len = (NET_SOCK_ADDR_LEN )NET_SOCK_ADDR_IPv4_SIZE;
+            break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+       case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+            p_addr_ipv6  = (NET_SOCK_ADDR_IPv6 *)p_addr_remote;         /* Cfg remote addr struct (see Notes #3 & #9b). */
+            NET_UTIL_VAL_SET_HOST_16(&p_addr_ipv6->AddrFamily, NET_SOCK_ADDR_FAMILY_IP_V6);
+            NET_UTIL_VAL_COPY_16(&p_addr_ipv6->Port, &addr_remote[NET_SOCK_ADDR_IP_IX_PORT]);
+
+            Mem_Copy(&p_addr_ipv6->Addr, &addr_remote[NET_SOCK_ADDR_IP_V6_IX_ADDR], NET_IPv6_ADDR_SIZE);
+
+           *p_addr_len = (NET_SOCK_ADDR_LEN )NET_SOCK_ADDR_IPv6_SIZE;
+            break;
+#endif
+
+       default:
+                                                                        /* See Notes #7 & #8c.                          */
+            NetSock_CloseHandler(p_sock_accept, DEF_YES, DEF_YES);
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+            goto exit_err_acccept;
+   }
+
+  *p_err = NET_SOCK_ERR_NONE;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+    return (NET_SOCK_BSD_ERR_ACCEPT);
+
+exit_err_acccept:
+    sock_id_accept = NET_SOCK_BSD_ERR_ACCEPT;
+
+exit_release:
+                                                                        /* ------------- RELEASE NET LOCK ------------- */
+   Net_GlobalLockRelease();
+
+   return (sock_id_accept);                                             /* ------------- RTN NEW SOCK ID -------------- */
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetSock_RxDataFrom()
+*
+* Description : (1) Receive data from a socket :
+*
+*                   (a) Validate   receive address buffer                           See Notes #5 & 6
+*                   (b) Validate & receive socket  data
+*
+*                   See also 'NetSock_RxDataHandler()  Note #1'.
+*
+*
+* Argument(s) : sock_id             Socket descriptor/handle identifier of socket to receive data.
+*
+*               p_data_buf           Pointer to an application data buffer that will receive the socket's received
+*                                       data.
+*
+*               data_buf_len        Size of the   application data buffer (in octets) [see Note #3].
+*
+*               flags               Flags to select receive options (see Note #4); bit-field flags logically OR'd :
+*
+*                                       NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                       NET_SOCK_FLAG_RX_DATA_PEEK      Receive socket data without consuming
+*                                                                           the socket data; i.e. socket data
+*                                                                           NOT removed from application receive
+*                                                                           queue(s).
+*                                       NET_SOCK_FLAG_RX_NO_BLOCK       Receive socket data without blocking.
+*
+*               p_addr_remote       Pointer to an address buffer that will receive the socket address structure
+*                                       with the received data's remote address (see Note #5), if NO error(s).
+*
+*               p_addr_len          Pointer to a variable to ... :
+*
+*                                       (a) Pass the size of the address buffer pointed to by 'p_addr_remote'.
+*                                       (b) (1) Return the actual size of socket address structure with the
+*                                                   received data's remote address, if NO error(s);
+*                                           (2) Return 0,                           otherwise.
+*
+*                                   See also Note #6.
+*
+*               p_ip_opts_buf       Pointer to buffer to receive possible IP options (see Note #7a), if NO error(s).
+*
+*               ip_opts_buf_len     Size of IP options receive buffer (in octets)    [see Note #7b].
+*
+*               p_ip_opts_len       Pointer to variable that will receive the return size of any received IP options,
+*                                       if NO error(s).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*
+*                                                                   ---- RETURNED BY NetSock_RxDataHandler() : ----
+*                               NET_SOCK_ERR_NONE                   Socket data successfully received; check return
+*                                                                       value for number of data octets received.
+*
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE      Socket data receive buffer insufficient size;
+*                                                                       some, but not all, socket data deframed
+*                                                                       into receive buffer (see Note #3a2).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_addr_len'/'p_addr_remote'/
+*                                                                       'p_data_buf' passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'data_buf_len' passed a NULL size.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_FLAG           Invalid socket flags.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*
+*                               NET_SOCK_ERR_RX_Q_EMPTY             Socket receive queue empty.
+*                               NET_SOCK_ERR_RX_Q_CLOSED            Socket receive queue closed.
+*
+*                               NET_SECURE_ERR_NULL_PTR             Secure session pointer is NULL.
+*
+*                               NET_ERR_RX                          Receive error.
+*
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*
+* Return(s)   : Number of positive data octets received, if NO error(s)              [see Note #8a].
+*
+*               NET_SOCK_BSD_RTN_CODE_CONN_CLOSED,       if socket connection closed (see Note #8b).
+*
+*               NET_SOCK_BSD_ERR_RX,                     otherwise                   (see Note #8c1).
+*
+* Caller(s)   : recvfrom(),
+*               NetApp_SockRx().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) NetSock_RxDataFrom() blocked until network initialization completes.
+*
+*                   See 'NetSock_IsUsed()  Note #1'.
+*
+*               (3) (a) (1) (A) Datagram-type sockets transmit & receive all data atomically -- i.e. every
+*                               single, complete datagram transmitted MUST be received as a single, complete
+*                               datagram.
+*
+*                           (B) IEEE Std 1003.1, 2004 Edition, Section 'recvfrom() : DESCRIPTION' summarizes
+*                               that "for message-based sockets, such as ... SOCK_DGRAM ... the entire message
+*                               shall be read in a single operation.  If a message is too long to fit in the
+*                               supplied buffer, and MSG_PEEK is not set in the flags argument, the excess
+*                               bytes shall be discarded".
+*
+*                       (2) Thus if the socket's type is datagram & the receive data buffer size is
+*                           NOT large enough for the received data, the receive data buffer is maximally
+*                           filled with receive data but the remaining data octets are discarded &
+*                           NET_SOCK_ERR_INVALID_DATA_SIZE error is returned.
+*
+*                   (b) (1) (A) (1) Stream-type sockets transmit & receive all data octets in one or more
+*                                   non-distinct packets.  In other words, the application data is NOT
+*                                   bounded by any specific packet(s); rather, it is contiguous & sequenced
+*                                   from one packet to the next.
+*
+*                               (2) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes
+*                                   that "for stream-based sockets, such as SOCK_STREAM, message boundaries
+*                                   shall be ignored.  In this case, data shall be returned to the user as
+*                                   soon as it becomes available, and no data shall be discarded".
+*
+*                           (B) Thus if the socket's type is stream & the receive data buffer size is NOT
+*                               large enough for the received data, the receive data buffer is maximally
+*                               filled with receive data & the remaining data octets remain queued for
+*                               later application-socket receives.
+*
+*                       (2) Thus it is typical -- but NOT absolutely required -- that a single application
+*                           task ONLY receive or request to receive data from a stream-type socket.
+*
+*                   See also 'NetSock_RxDataHandler()  Note #2'.
+*
+*               (4) Only some socket receive flag options are implemented.  If other flag options are
+*                   requested, NetSock_RxData() handler function(s) abort & return appropriate error codes
+*                   so that requested flag options are NOT silently ignored.
+*
+*               (5) (a) Socket address structure 'AddrFamily' member returned in host-order & SHOULD NOT
+*                       be converted to network-order.
+*
+*                   (b) Socket address structure addresses returned in network-order & SHOULD be converted
+*                       from network-order to host-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (6) Since 'p_addr_len' argument is both an input & output argument (see 'Argument(s) :
+*                   p_addr_len'), ... :
+*
+*                   (a) Its input value SHOULD be validated prior to use; ...
+*                       (1) In the case that the 'p_addr_len' argument is passed a null pointer,
+*                           NO input value is validated or used.
+*
+*                   (b) While its output value MUST be initially configured to return a default value
+*                       PRIOR to all other validation or function handling in case of any error(s)
+*                       [see also Note #9].
+*
+*               (7) (a) If ...
+*
+*                       (1) NO IP options were received
+*                             OR
+*                       (2) NO IP options receive buffer is provided
+*                             OR
+*                       (3) IP options receive buffer NOT large enough for the received IP options
+*
+*                       ... then NO IP options are returned & any received IP options are silently discarded.
+*
+*                   (b) The IP options receive buffer size SHOULD be large enough to receive the maximum
+*                       IP options size, NET_IPv4_HDR_OPT_SIZE_MAX.
+*
+*                   (c) Received IP options should be provided/decoded via appropriate IP layer API.
+*
+*                   See also Note #10.
+*
+*               (8) IEEE Std 1003.1, 2004 Edition, Section 'recvfrom() : RETURN VALUE' states that :
+*
+*                   (a) "Upon successful completion, recvfrom() shall return the length of the message in
+*                        bytes."
+*
+*                   (b) "If no messages are available to be received and the peer has performed an orderly
+*                        shutdown, recvfrom() shall return 0."
+*
+*                   (c) (1) "Otherwise, [-1 shall be returned]" ...
+*                       (2) "and 'errno' set to indicate the error."
+*                            'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   See also 'NetSock_RxDataHandler()  Note #7'.
+*
+*               (9) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*                   (a) However, the following pointers MUST NOT be re-configured to unused local variables :
+*
+*                       (1) 'p_ip_opts_len'
+*
+*              (10) IP options arguments may NOT be necessary (remove if unnecessary).
+*********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSock_RxDataFrom (NET_SOCK_ID          sock_id,
+                                       void                *p_data_buf,
+                                       CPU_INT16U           data_buf_len,
+                                       NET_SOCK_API_FLAGS   flags,
+                                       NET_SOCK_ADDR       *p_addr_remote,
+                                       NET_SOCK_ADDR_LEN   *p_addr_len,
+                                       void                *p_ip_opts_buf,
+                                       CPU_INT08U           ip_opts_buf_len,
+                                       CPU_INT08U          *p_ip_opts_len,
+                                       NET_ERR             *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+   NET_SOCK           *p_sock;
+   NET_SOCK_ADDR_LEN   addr_len;
+#endif
+   NET_SOCK_RTN_CODE   rtn_code;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+   }
+#endif
+
+   if (p_ip_opts_len != (CPU_INT08U *)0) {                      /* Init len for err (see Note #9).                      */
+      *p_ip_opts_len  =  0u;
+   } else {                                                     /* MUST NOT re-cfg NULL rtn ptr to unused local var ... */
+       ;                                                        /* ... (see Note #9a1).                                 */
+   }
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_RxDataFrom, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+                                                                /* --------------- VALIDATE RX ADDR BUF --------------- */
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+   if (p_addr_len == (NET_SOCK_ADDR_LEN *)0) {                  /* See Note #6a1.                                       */
+       NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NullPtrCtr);
+      *p_err =  NET_ERR_FAULT_NULL_PTR;
+       return (NET_SOCK_BSD_ERR_RX);
+   }
+
+   addr_len = *p_addr_len;
+#endif
+  *p_addr_len =  0;                                             /* Cfg dflt addr len for err (see Note #6b).            */
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_err_rx;
+   }
+
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+       case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+            if (addr_len < (NET_SOCK_ADDR_LEN)NET_SOCK_ADDR_IPv4_SIZE) { /* Validate initial addr len (see Note #6a).   */
+                NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrLenCtr);
+               *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+                goto exit_err_rx;
+            }
+            break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+       case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+            if (addr_len < (NET_SOCK_ADDR_LEN)NET_SOCK_ADDR_IPv6_SIZE) { /* Validate initial addr len (see Note #6a).   */
+                NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrLenCtr);
+               *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+                goto exit_err_rx;
+            }
+            break;
+#endif
+
+       default:
+           *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+            goto exit_err_rx;
+   }
+
+   if (p_addr_remote == (NET_SOCK_ADDR *)0) {
+       NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NullPtrCtr);
+      *p_err =  NET_ERR_FAULT_NULL_PTR;
+       goto exit_err_rx;
+   }
+#endif
+
+
+                                                                /* -------------- VALIDATE/RX SOCK DATA --------------- */
+   rtn_code = NetSock_RxDataHandler((NET_SOCK_ID        )sock_id,
+                                    (void              *)p_data_buf,
+                                    (CPU_INT16U         )data_buf_len,
+                                    (NET_SOCK_API_FLAGS )flags,
+                                    (NET_SOCK_ADDR     *)p_addr_remote,
+                                    (NET_SOCK_ADDR_LEN *)p_addr_len,
+                                    (void              *)p_ip_opts_buf,
+                                    (CPU_INT08U         )ip_opts_buf_len,
+                                    (CPU_INT08U        *)p_ip_opts_len,
+                                    (NET_ERR           *)p_err);
+
+   goto exit_release;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_err_rx:
+    rtn_code = NET_SOCK_BSD_ERR_RX;
+#endif
+
+exit_release:
+                                                               /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+   goto exit;
+
+exit_lock_fault:
+    rtn_code = NET_SOCK_BSD_ERR_RX;
+    goto exit;
+
+exit:
+
+   return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_RxData()
+*
+* Description : (1) Receive data from a socket :
+*
+*                   (a) Validate & receive socket data
+*
+*                   See also 'NetSock_RxDataHandler()  Note #1'.
+*
+*
+* Argument(s) : sock_id             Socket descriptor/handle identifier of socket to receive data.
+*
+*               p_data_buf           Pointer to an application data buffer that will receive the socket's received
+*                                       data.
+*
+*               data_buf_len        Size of the   application data buffer (in octets) [see Note #3].
+*
+*               flags               Flags to select receive options (see Note #4); bit-field flags logically OR'd :
+*
+*                                       NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                       NET_SOCK_FLAG_RX_DATA_PEEK      Receive socket data without consuming
+*                                                                           the socket data; i.e. socket data
+*                                                                           NOT removed from application receive
+*                                                                           queue(s).
+*                                       NET_SOCK_FLAG_RX_NO_BLOCK       Receive socket data without blocking.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   ---- RETURNED BY NetSock_RxDataHandler() : ----
+*                               NET_SOCK_ERR_NONE                   Socket data successfully received; check return
+*                                                                       value for number of data octets received.
+*
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE      Socket data receive buffer insufficient size;
+*                                                                       some, but not all, socket data deframed
+*                                                                       into receive buffer (see Note #3a2).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_data_buf'    passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'data_buf_len' passed a NULL size.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_FLAG           Invalid socket flags.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*
+*                               NET_SOCK_ERR_RX_Q_EMPTY             Socket receive queue empty.
+*                               NET_SOCK_ERR_RX_Q_CLOSED            Socket receive queue closed.
+*
+*                               NET_SECURE_ERR_NULL_PTR             Secure session pointer is NULL.
+*
+*                               NET_ERR_RX                          Receive error.
+*
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Number of positive data octets received, if NO error(s)              [see Note #5a].
+*
+*               NET_SOCK_BSD_RTN_CODE_CONN_CLOSED,       if socket connection closed (see Note #5b).
+*
+*               NET_SOCK_BSD_ERR_RX,                     otherwise                   (see Note #5c1).
+*
+* Caller(s)   : recv().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) NetSock_RxData() blocked until network initialization completes.
+*
+*                   See 'NetSock_IsUsed()  Note #1'.
+*
+*               (3) (a) (1) (A) Datagram-type sockets transmit & receive all data atomically -- i.e. every
+*                               single, complete datagram transmitted MUST be received as a single, complete
+*                               datagram.
+*
+*                           (B) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes
+*                               that "for message-based sockets, such as SOCK_DGRAM ... the entire message
+*                               shall be read in a single operation.  If a message is too long to fit in
+*                               the supplied buffer, and MSG_PEEK is not set in the flags argument, the
+*                               excess bytes shall be discarded".
+*
+*                       (2) Thus if the socket's type is datagram & the receive data buffer size is
+*                           NOT large enough for the received data, the receive data buffer is maximally
+*                           filled with receive data but the remaining data octets are discarded &
+*                           NET_SOCK_ERR_INVALID_DATA_SIZE error is returned.
+*
+*                   (b) (1) (A) (1) Stream-type sockets transmit & receive all data octets in one or more
+*                                   non-distinct packets.  In other words, the application data is NOT
+*                                   bounded by any specific packet(s); rather, it is contiguous & sequenced
+*                                   from one packet to the next.
+*
+*                               (2) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes
+*                                   that "for stream-based sockets, such as SOCK_STREAM, message boundaries
+*                                   shall be ignored.  In this case, data shall be returned to the user as
+*                                   soon as it becomes available, and no data shall be discarded".
+*
+*                           (B) Thus if the socket's type is stream & the receive data buffer size is NOT
+*                               large enough for the received data, the receive data buffer is maximally
+*                               filled with receive data & the remaining data octets remain queued for
+*                               later application-socket receives.
+*
+*                       (2) Thus it is typical -- but NOT absolutely required -- that a single application
+*                           task ONLY receive or request to receive data from a stream-type socket.
+*
+*                   See also 'NetSock_RxDataHandler()  Note #2'.
+*
+*               (4) Only some socket receive flag options are implemented.  If other flag options are
+*                   requested, NetSock_RxData() handler function(s) abort & return appropriate error codes
+*                   so that requested flag options are NOT silently ignored.
+*
+*               (5) IEEE Std 1003.1, 2004 Edition, Section 'recv() : RETURN VALUE' states that :
+*
+*                   (a) "Upon successful completion, recv() shall return the length of the message in bytes."
+*
+*                   (b) "If no messages are available to be received and the peer has performed an orderly
+*                        shutdown, recv() shall return 0."
+*
+*                   (c) (1) "Otherwise, -1 shall be returned" ...
+*                       (2) "and 'errno' set to indicate the error."
+*                           'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   See also 'NetSock_RxDataHandler()  Note #7'.
+*********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSock_RxData (NET_SOCK_ID          sock_id,
+                                   void                *p_data_buf,
+                                   CPU_INT16U           data_buf_len,
+                                   NET_SOCK_API_FLAGS   flags,
+                                   NET_ERR             *p_err)
+{
+    NET_SOCK_RTN_CODE  rtn_code = NET_SOCK_BSD_ERR_RX;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+    }
+#endif
+
+    Net_GlobalLockAcquire((void *)&NetSock_RxData, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+                                                                /* -------------- VALIDATE/RX SOCK DATA --------------- */
+    rtn_code = NetSock_RxDataHandler((NET_SOCK_ID        )sock_id,
+                                     (void              *)p_data_buf,
+                                     (CPU_INT16U         )data_buf_len,
+                                     (NET_SOCK_API_FLAGS )flags,
+                                     (NET_SOCK_ADDR     *)0,
+                                     (NET_SOCK_ADDR_LEN *)0,
+                                     (void              *)0,
+                                     (CPU_INT08U         )0u,
+                                     (CPU_INT08U        *)0,
+                                     (NET_ERR           *)p_err);
+
+    Net_GlobalLockRelease();
+
+exit_lock_fault:
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetSock_TxDataTo()
+*
+* Description : (1) Transmit data through a socket :
+*
+*                   (a) Validate & transmit application data
+*
+*                   See also 'NetSock_TxDataHandler()  Note #1'.
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to transmit data.
+*
+*               p_data          Pointer to application data to transmit.
+*
+*               data_len        Length of  application data to transmit (in octets) [see Note #3].
+*
+*               flags           Flags to select transmit options (see Note #4); bit-field flags logically OR'd :
+*
+*                                   NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                   NET_SOCK_FLAG_TX_NO_BLOCK       Transmit socket data without blocking.
+*
+*               p_addr_remote    Pointer to destination address buffer (see Note #5);
+*                                   required for datagram sockets, optional for stream sockets.
+*
+*               addr_len        Length of  destination address buffer (in octets).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   ----- RETURNED BY NetSock_TxDataHandler() : -------
+*                               NET_SOCK_ERR_NONE                   Socket data successfully transmitted &/or prepared
+*                                                                       for transmission; check return value for number
+*                                                                       of data octets transmitted (see Note #6a1).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_data' passed a NULL pointer.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_FLAG           Invalid socket flags.
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE      Invalid data size (see Notes #3b & #3a1B2).
+*
+*                               NET_SOCK_ERR_INVALID_CONN           Invalid socket connection.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid socket address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid socket port number.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*                               NET_SOCK_ERR_ADDR_IN_USE            Socket address already in use.
+*
+*                               NET_SOCK_ERR_TX_Q_CLOSED            Socket transmit queue closed.
+*                               NET_ERR_IF_LINK_DOWN                Socket connection's interface link down.
+*
+*                               NET_SECURE_ERR_NULL_PTR             Secure session pointer is NULL.
+*
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL        NO address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS   Interface address(s) configuration in progress.
+*
+*                               NET_ERR_TX                          Transitory transmit error.
+*
+*                               NET_ERR_FAULT_NULL_FNCT             Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Number of positive data octets transmitted, if NO error(s)              [see Note #6a1].
+*
+*               NET_SOCK_BSD_RTN_CODE_CONN_CLOSED,          if socket connection closed (see Note #6b).
+*
+*               NET_SOCK_BSD_ERR_TX,                        otherwise                   (see Note #6a2A).
+*
+* Caller(s)   : sendto(),
+*               NetApp_SockTx().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) NetSock_TxDataTo() blocked until network initialization completes.
+*
+*                   See 'NetSock_IsUsed()  Note #1'.
+*
+*               (3) (a) (1) (A) Datagram-type sockets transmit & receive all data atomically -- i.e. every
+*                               single, complete datagram transmitted MUST be received as a single, complete
+*                               datagram.  Thus each call to transmit data MUST be transmitted in a single,
+*                               complete datagram.
+*
+*                           (B) (1) IEEE Std 1003.1, 2004 Edition, Section 'send() : DESCRIPTION' states
+*                                   that "if the message is too long to pass through the underlying protocol,
+*                                   send() shall fail and no data shall be transmitted".
+*
+*                               (2) Since IP transmit fragmentation is NOT currently supported (see 'net_ip.h
+*                                   Note #1d'), if the socket's type is datagram & the requested transmit
+*                                   data length is greater than the socket/transport layer MTU, then NO data
+*                                   is transmitted & NET_SOCK_ERR_INVALID_DATA_SIZE error is returned.
+*
+*                       (2) (A) (1) Stream-type sockets transmit & receive all data octets in one or more
+*                                   non-distinct packets.  In other words, the application data is NOT
+*                                   bounded by any specific packet(s); rather, it is contiguous & sequenced
+*                                   from one packet to the next.
+*
+*                               (2) Thus if the socket's type is stream & the socket's transmit data queue(s)
+*                                   are NOT large enough for the transmitted data, the  transmit data queue(s)
+*                                   are maximally filled with transmit data & the remaining data octets are
+*                                   discarded but may be re-transmitted by later application-socket transmits.
+*
+*                               (3) Therefore, NO stream-type socket transmit data length should be "too long
+*                                   to pass through the underlying protocol" & cause the socket transmit to
+*                                   "fail ... [with] no data ... transmitted" (see Note #3a1B1).
+*
+*                           (B) Thus it is typical -- but NOT absolutely required -- that a single application
+*                               task ONLY transmit or request to transmit data to a stream-type socket.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*
+*                   See also 'NetSock_TxDataHandler()  Note #2'.
+*
+*               (4) Only some socket transmit flag options are implemented.  If other flag options are
+*                   requested, NetSock_TxData() handler function(s) abort & return appropriate error codes
+*                   so that requested flag options are NOT silently ignored.
+*
+*               (5) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (6) (a) IEEE Std 1003.1, 2004 Edition, Section 'sendto() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, sendto() shall return the number of bytes sent."
+*
+*                           (A) Section 'sendto() : DESCRIPTION' elaborates that "successful completion
+*                               of a call to sendto() does not guarantee delivery of the message".
+*
+*                           (B) (1) Thus applications SHOULD verify the actual returned number of data
+*                                   octets transmitted &/or prepared for transmission.
+*
+*                               (2) In addition, applications MAY desire verification of receipt &/or
+*                                   acknowledgement of transmitted data to the remote host -- either
+*                                   inherently by the transport layer or explicitly by the application.
+*
+*                       (2) (A) "Otherwise, -1 shall be returned" ...
+*                               (1) Section 'sendto() : DESCRIPTION' elaborates that "a return value of
+*                                   -1 indicates only locally-detected errors".
+*
+*                           (B) "and 'errno' set to indicate the error."
+*                               'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   (b) Although NO socket send() specification states to return '0' when the socket's
+*                       connection is closed, it seems reasonable to return '0' since it is possible for the
+*                       socket connection to be close()'d or shutdown() by the remote host.
+*
+*                   See also 'NetSock_TxDataHandler()  Note #5'.
+**********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSock_TxDataTo (NET_SOCK_ID          sock_id,
+                                     void                *p_data,
+                                     CPU_INT16U           data_len,
+                                     NET_SOCK_API_FLAGS   flags,
+                                     NET_SOCK_ADDR       *p_addr_remote,
+                                     NET_SOCK_ADDR_LEN    addr_len,
+                                     NET_ERR             *p_err)
+{
+    NET_SOCK_RTN_CODE  rtn_code;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+    }
+#endif
+                                                                /* --------------- VALIDATE/TX APP DATA --------------- */
+    rtn_code = NetSock_TxDataHandler((NET_SOCK_ID       )sock_id,
+                                     (void             *)p_data,
+                                     (CPU_INT16U        )data_len,
+                                     (NET_SOCK_API_FLAGS)flags,
+                                     (NET_SOCK_ADDR    *)p_addr_remote,
+                                     (NET_SOCK_ADDR_LEN )addr_len,
+                                     (NET_ERR          *)p_err);
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_TxData()
+*
+* Description : (1) Transmit data through a socket :
+*
+*                   (a) Validate & transmit application data
+*
+*                   See also 'NetSock_TxDataHandler()  Note #1'.
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to transmit data.
+*
+*               p_data          Pointer to application data to transmit.
+*
+*               data_len        Length of  application data to transmit (in octets) [see Note #3].
+*
+*               flags           Flags to select transmit options (see Note #4); bit-field flags logically OR'd :
+*
+*                                   NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                   NET_SOCK_FLAG_TX_NO_BLOCK       Transmit socket data without blocking.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                                   ----- RETURNED BY NetSock_TxDataHandler() : -------
+*                               NET_SOCK_ERR_NONE                   Socket data successfully transmitted &/or prepared
+*                                                                       for transmission; check return value for number
+*                                                                       of data octets transmitted (see Note #5a1).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED          Network initialization NOT complete.
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'p_data' passed a NULL pointer.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_FLAG           Invalid socket flags.
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE      Invalid data size (see Notes #3b & #3a1B2).
+*
+*                               NET_SOCK_ERR_INVALID_CONN           Invalid socket connection.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid socket address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid socket port number.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*                               NET_SOCK_ERR_ADDR_IN_USE            Socket address already in use.
+*
+*                               NET_SOCK_ERR_TX_Q_CLOSED            Socket transmit queue closed.
+*                               NET_ERR_IF_LINK_DOWN                Socket connection's interface link down.
+*
+*                               NET_SECURE_ERR_NULL_PTR             Secure session pointer is NULL.
+*
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL        NO address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS   Interface address(s) configuration in progress.
+*
+*                               NET_ERR_TX                          Transitory transmit error.
+*
+*                               NET_ERR_FAULT_NULL_FNCT             Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Number of positive data octets transmitted, if NO error(s)              [see Note #5a1].
+*
+*               NET_SOCK_BSD_RTN_CODE_CONN_CLOSED,          if socket connection closed (see Note #5b).
+*
+*               NET_SOCK_BSD_ERR_TX,                        otherwise                   (see Note #5a2A).
+*
+* Caller(s)   : send().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) NetSock_TxData() blocked until network initialization completes.
+*
+*                   See 'NetSock_IsUsed()  Note #1'.
+*
+*               (3) (a) (1) (A) Datagram-type sockets transmit & receive all data atomically -- i.e. every
+*                               single, complete datagram transmitted MUST be received as a single, complete
+*                               datagram.  Thus each call to transmit data MUST be transmitted in a single,
+*                               complete datagram.
+*
+*                           (B) (1) IEEE Std 1003.1, 2004 Edition, Section 'send() : DESCRIPTION' states
+*                                   that "if the message is too long to pass through the underlying protocol,
+*                                   send() shall fail and no data shall be transmitted".
+*
+*                               (2) Since IP transmit fragmentation is NOT currently supported (see 'net_ip.h
+*                                   Note #1d'), if the socket's type is datagram & the requested transmit
+*                                   data length is greater than the socket/transport layer MTU, then NO data
+*                                   is transmitted & NET_SOCK_ERR_INVALID_DATA_SIZE error is returned.
+*
+*                       (2) (A) (1) Stream-type sockets transmit & receive all data octets in one or more
+*                                   non-distinct packets.  In other words, the application data is NOT
+*                                   bounded by any specific packet(s); rather, it is contiguous & sequenced
+*                                   from one packet to the next.
+*
+*                               (2) Thus if the socket's type is stream & the socket's transmit data queue(s)
+*                                   are NOT large enough for the transmitted data, the  transmit data queue(s)
+*                                   are maximally filled with transmit data & the remaining data octets are
+*                                   discarded but may be re-transmitted by later application-socket transmits.
+*
+*                               (3) Therefore, NO stream-type socket transmit data length should be "too long
+*                                   to pass through the underlying protocol" & cause the socket transmit to
+*                                   "fail ... [with] no data ... transmitted" (see Note #3a1B1).
+*
+*                           (B) Thus it is typical -- but NOT absolutely required -- that a single application
+*                               task ONLY transmit or request to transmit data to a stream-type socket.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*
+*                   See also 'NetSock_TxDataHandler()  Note #2'.
+*
+*               (4) Only some socket transmit flag options are implemented.  If other flag options are
+*                   requested, NetSock_TxData() handler function(s) abort & return appropriate error codes
+*                   so that requested flag options are NOT silently ignored.
+*
+*               (5) (a) IEEE Std 1003.1, 2004 Edition, Section 'send() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, send() shall return the number of bytes sent."
+*
+*                           (A) Section 'send() : DESCRIPTION' elaborates that "successful completion
+*                               of a call to sendto() does not guarantee delivery of the message".
+*
+*                           (B) (1) Thus applications SHOULD verify the actual returned number of data
+*                                   octets transmitted &/or prepared for transmission.
+*
+*                               (2) In addition, applications MAY desire verification of receipt &/or
+*                                   acknowledgement of transmitted data to the remote host -- either
+*                                   inherently by the transport layer or explicitly by the application.
+*
+*                       (2) (A) "Otherwise, -1 shall be returned" ...
+*                               (1) Section 'send() : DESCRIPTION' elaborates that "a return value of
+*                                   -1 indicates only locally-detected errors".
+*
+*                           (B) "and 'errno' set to indicate the error."
+*                               'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   (b) Although NO socket send() specification states to return '0' when the socket's
+*                       connection is closed, it seems reasonable to return '0' since it is possible for the
+*                       socket connection to be close()'d or shutdown() by the remote host.
+*
+*                   See also 'NetSock_TxDataHandler()  Note #5'.
+**********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSock_TxData (NET_SOCK_ID          sock_id,
+                                   void                *p_data,
+                                   CPU_INT16U           data_len,
+                                   NET_SOCK_API_FLAGS   flags,
+                                   NET_ERR             *p_err)
+{
+    NET_SOCK_RTN_CODE  rtn_code;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+    }
+#endif
+                                                                /* --------------- VALIDATE/TX APP DATA --------------- */
+    rtn_code = NetSock_TxDataHandler((NET_SOCK_ID       )sock_id,
+                                     (void             *)p_data,
+                                     (CPU_INT16U        )data_len,
+                                     (NET_SOCK_API_FLAGS)flags,
+                                     (NET_SOCK_ADDR    *)0,
+                                     (NET_SOCK_ADDR_LEN )0,
+                                     (NET_ERR          *)p_err);
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_Sel()
+*
+* Description : (1) Check multiple sockets for available resources &/or operations :
+*
+*                   (a) Acquire network lock
+*                   (b) Check sockets for available resources &/or operations :
+*                       (1) Validate socket descriptors' sockets
+*                       (2) Check    sockets for available resources &/or operations        See Note #3b2
+*                       (3) Prepare  sockets for wait on appropriate socket events
+*
+*                   (c) Handle timeout :                                                    See Note #3b3
+*                       (1) Prepare timeout
+*                       (2) Handle  time delay, if any
+*
+*                   (d) Wait on socket descriptor events :
+*                       (1) Demultiplex ready socket event(s) to appropriate socket descriptor(s)
+*
+*                   (e) Release network lock
+*
+*
+* Argument(s) : sock_nbr_max        Maximum number of socket descriptors/handle identifiers in the socket
+*                                       descriptor sets (see Note #3b1).
+*
+*               p_sock_desc_rd       Pointer to a set of socket descriptors/handle identifiers to :
+*
+*                                       (a) Check for available read  operation(s) [see Note #3b2A1].
+*
+*                                       (b) (1) Return the actual socket descriptors/handle identifiers
+*                                                   ready for available read  operation(s), if NO error(s)
+*                                                   [see Note #3b2B1a1];
+*                                           (2) Return the initial, non-modified set of socket descriptors/
+*                                                   handle identifiers, on any error(s) [see Note #3c2A];
+*                                           (3) Return a null-valued (i.e. zero-cleared) descriptor set,
+*                                                   if any timeout expires (see Note #3c2B).
+*
+*               p_sock_desc_wr       Pointer to a set of socket descriptors/handle identifiers to :
+*
+*                                       (a) Check for available write operation(s) [see Note #3b2A2].
+*
+*                                       (b) (1) Return the actual socket descriptors/handle identifiers
+*                                                   ready for available write operation(s), if NO error(s)
+*                                                   [see Note #3b2B1a1];
+*                                           (2) Return the initial, non-modified set of socket descriptors/
+*                                                   handle identifiers, on any error(s) [see Note #3c2A];
+*                                           (3) Return a null-valued (i.e. zero-cleared) descriptor set,
+*                                                   if any timeout expires (see Note #3c2B).
+*
+*               p_sock_desc_err      Pointer to a set of socket descriptors/handle identifiers to :
+*
+*                                       (a) Check for any error(s) &/or exception(s) [see Note #3b2A3].
+*
+*                                       (b) (1) Return the actual socket descriptors/handle identifiers
+*                                                   flagged with any error(s) &/or exception(s), if NO
+*                                                   non-descriptor-related error(s) [see Note #3b2B1a1];
+*                                           (2) Return the initial, non-modified set of socket descriptors/
+*                                                   handle identifiers, on any error(s) [see Note #3c2A];
+*                                           (3) Return a null-valued (i.e. zero-cleared) descriptor set,
+*                                                   if any timeout expires (see Note #3c2B).
+*
+*               p_timeout           Pointer to a timeout (see Note #3b3).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket descriptors successfully checked for
+*                                                                   available resources &/or operations;
+*                                                                   check return value for the number of
+*                                                                   ready socket descriptors with available
+*                                                                   resources &/or operations.
+*
+*                               NET_SOCK_ERR_TIMEOUT            Socket descriptors NOT ready within timeout
+*                                                                   (see Note #3b3A1a2).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_DESC       Invalid socket descriptor/number.
+*                               NET_SOCK_ERR_INVALID_TIMEOUT    Invalid timeout.
+*
+*                                                               - RETURNED BY NetSock_SelDescHandlerRd() : --
+*                                                               - RETURNED BY NetSock_SelDescHandlerWr() : --
+*                                                               - RETURNED BY NetSock_SelDescHandlerErr() : -
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Number of socket descriptors with available resources &/or operations, if any     (see Note #3c1A1).
+*
+*               NET_SOCK_BSD_RTN_CODE_TIMEOUT,                                         on timeout (see Note #3c1B).
+*
+*               NET_SOCK_BSD_ERR_SEL,                                                  otherwise  (see Note #3c1A2a).
+*
+* Caller(s)   : select().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (2) NetSock_Sel() blocked until network initialization completes.
+*
+*               (3) (a) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that :
+*
+*                       (1) (A) "select() ... shall support" the following file descriptor types :
+*
+*                               (1) "regular files,"                        ...
+*                               (2) "terminal and pseudo-terminal devices," ...
+*                               (3) "STREAMS-based files,"                  ...
+*                               (4) "FIFOs,"                                ...
+*                               (5) "pipes,"                                ...
+*                               (6) "sockets."
+*
+*                           (B) "The behavior of ... select() on ... other types of ... file descriptors
+*                                ... is unspecified."
+*
+*                       (2) Network Socket Layer supports BSD 4.x select() functionality with the following
+*                           restrictions/constraints :
+*
+*                           (A) ONLY supports the following file descriptor types :
+*                               (1) Sockets
+*
+*
+*                   (b) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that :
+*
+*                       (1) (A) "The 'nfds' argument ('sock_nbr_max') specifies the range of descriptors to be
+*                                tested.  The first 'nfds' descriptors shall be checked in each set; that is,
+*                                the [following] descriptors ... in the descriptor sets shall be examined" :
+*
+*                               (1) "from zero" ...
+*                               (2) "through nfds-1."
+*
+*                           (B) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                               6th Printing, Section 6.3, Page 163 states that :
+*
+*                               (1) ... since "descriptors start at 0" ...
+*
+*                               (2) "the ['nfds'] argument" specifies :
+*                                   (a) "the number of descriptors," ...
+*                                   (b) "not the largest value."
+*
+*                       (2) "The select() function shall ... examine the file descriptor sets whose addresses
+*                            are passed in the 'readfds' ('p_sock_desc_rd'), 'writefds' ('p_sock_desc_wr'), and
+*                            'errorfds' ('p_sock_desc_err') parameters to see whether some of their descriptors
+*                            are ready for reading, are ready for writing, or have an exceptional condition
+*                            pending, respectively."
+*
+*                           (A) (1) (a) "If the 'readfds'  argument ('p_sock_desc_rd')  is not a null pointer,
+*                                        it points to an object of type 'fd_set' ('NET_SOCK_DESC') that on
+*                                        input specifies the file descriptors to be checked for being ready
+*                                        to read,  and on output indicates which file descriptors are ready
+*                                        to read."
+*
+*                                   (b) "A descriptor shall be considered ready for reading when a call to
+*                                        an input function ... would not block, whether or not the function
+*                                        would transfer data successfully.  (The function might return data,
+*                                        an end-of-file indication, or an error other than one indicating
+*                                        that it is blocked, and in each of these cases the descriptor shall
+*                                        be considered ready for reading.)" :
+*
+*                                       (1) "If the socket is currently listening, then it shall be marked
+*                                            as readable if an incoming connection request has been received,
+*                                            and a call to the accept() function shall complete without
+*                                            blocking."
+*
+*                                   (c) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                                       6th Printing, Section 6.3, Pages 164-165 states that "a socket is ready
+*                                       for reading if any of the following ... conditions is true" :
+*
+*                                       (1) "A read operation on the socket will not block and will return a
+*                                            value greater than 0 (i.e., the data that is ready to be read)."
+*
+*                                       (2) "The read half of the connection is closed (i.e., a TCP connection
+*                                            that has received a FIN).  A read operation ... will not block and
+*                                            will return 0 (i.e., EOF)."
+*
+*                                       (3) "The socket is a listening socket and the number of completed
+*                                            connections is nonzero.  An accept() on the listening socket
+*                                            will ... not block."
+*
+*                                       (4) "A socket error is pending.  A read operation on the socket will
+*                                            not block and will return an error (-1) with 'errno' set to the
+*                                            specific error condition."
+*
+*                                           (A) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1,
+*                                               3rd Edition, 6th Printing, Section 6.3, Page 165 states "that
+*                                               when an error occurs on a socket, it is [also] marked as both
+*                                               readable and writeable by select()".
+*
+*                                               See also Notes #3b2A2c4A & #3b2A3d.
+*
+*                               (2) (a) "If the 'writefds' argument ('p_sock_desc_wr')  is not a null pointer,
+*                                        it points to an object of type 'fd_set' ('NET_SOCK_DESC') that on
+*                                        input specifies the file descriptors to be checked for being ready
+*                                        to write, and on output indicates which file descriptors are ready
+*                                        to write."
+*
+*                                   (b) "A descriptor shall be considered ready for writing when a call to
+*                                        an output function ... would not block, whether or not the function
+*                                        would transfer data successfully" :
+*
+*                                       (1) "If a non-blocking call to the connect() function has been made
+*                                            for a socket, and the connection attempt has either succeeded
+*                                            or failed leaving a pending error, the socket shall be marked
+*                                            as writable."
+*
+*                                   (c) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                                       6th Printing, Section 6.3, Page 165 states that "a socket is ready for
+*                                       writing if any of the following ... conditions is true" :
+*
+*                                       (1) "A write operation will not block and will return a positive value
+*                                            (e.g., the number of bytes accepted by the transport layer)."
+*
+*                                       (2) "The write half of the connection is closed."
+*
+*                                       (3) "A socket using a non-blocking connect() has completed the
+*                                            connection, or the connect() has failed."
+*
+*                                       (4) "A socket error is pending.  A write operation on the socket will
+*                                            not block and will return an error (-1) with 'errno' set to the
+*                                            specific error condition."
+*
+*                                           (A) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1,
+*                                               3rd Edition, 6th Printing, Section 6.3, Page 165 states "that
+*                                               when an error occurs on a socket, it is [also] marked as both
+*                                               readable and writeable by select()".
+*
+*                                               See also Notes #3b2A1c4A & #3b2A3d.
+*
+*                               (3) (a) "If the 'errorfds' argument ('p_sock_desc_err') is not a null pointer,
+*                                        it points to an object of type 'fd_set' ('NET_SOCK_DESC') that on
+*                                        input specifies the file descriptors to be checked for error
+*                                        conditions pending, and on output indicates which file descriptors
+*                                        have error conditions pending."
+*
+*                                   (b) "A file descriptor ... shall be considered to have an exceptional
+*                                        condition pending ... as noted below" :
+*
+*                                       (1) (A) "A socket ... receive operation ... [that] would return
+*                                                out-of-band data without blocking."
+*                                           (B) "A socket ... [with] out-of-band data ... present in the
+*                                                receive queue."
+*
+*                                           Out-of-band data NOT supported (see 'net_tcp.h  Note #1b').
+*
+*                                       (2) "If a socket has a pending error."
+*
+*                                       (3) "Other circumstances under which a socket may be considered to
+*                                            have an exceptional condition pending are protocol-specific
+*                                            and implementation-defined."
+*
+*                                   (c) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                                       6th Printing, Section 6.3, Page 165 states that "a socket has an
+*                                       exception condition pending if ... any of the following ... conditions
+*                                       is true" :
+*
+*                                       (1) (A) "Out-of-band data for the socket" is currently available; ...
+*                                           (B) "Or the socket is still at the out-of-band mark."
+*
+*                                           Out-of-band data NOT supported (see 'net_tcp.h  Note #1b').
+*
+*                                   (d) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                                       6th Printing, Section 6.3, Page 165 states "that when an error occurs on
+*                                       a socket, it is [also] marked as both readable and writeable by select()".
+*
+*                                       See also Notes #3b2A1c4A & #3b2A2c4A.
+*
+*                           (B) (1) (a) "Upon successful completion, ... select() ... shall" :
+*
+*                                       (1) "modify the objects pointed to by the 'readfds' ('p_sock_desc_rd'),
+*                                            'writefds' ('p_sock_desc_wr'), and 'errorfds' ('p_sock_desc_err')
+*                                            arguments to indicate which file descriptors are ready for
+*                                            reading, ready for writing, or have an error condition pending,
+*                                            respectively," ...
+*
+*                                       (2) "and shall return the total number of ready descriptors in all
+*                                            the output sets."
+*
+*                                            See also Note #3c1A1.
+*
+*                                   (b) (1) "For each file descriptor less than nfds ('sock_nbr_max'), the
+*                                            corresponding bit shall be set on successful completion" :
+*
+*                                           (A) "if it was set on input" ...
+*                                           (B) "and the associated condition is true for that file descriptor."
+*
+*                                       (2) Conversely, "for each file descriptor ... the corresponding bit
+*                                           shall be ... [clear] ... on ... completion" :
+*
+*                                           (A) If it was clear on input;                                         ...
+*                                           (B) If the associated condition is NOT true for that file descriptor; ...
+*                                           (C) Or it was set on input, but any timeout occurs (see Note #3c2B).
+*
+*                               (2) select() can NOT absolutely guarantee that descriptors returned as ready
+*                                   will still be ready during subsequent operations since any higher priority
+*                                   tasks or processes may asynchronously consume the descriptors' operations
+*                                   &/or resources.  This can occur since select() functionality & subsequent
+*                                   operations are NOT atomic operations protected by network, file system,
+*                                   or operating system mechanisms.
+*
+*                                   However, as long as no higher priority tasks or processes access any of
+*                                   the same descriptors, then a single task or process can assume that all
+*                                   descriptors returned as ready by select() will still be ready during
+*                                   subsequent operations.
+*
+*                       (3) (A) "The 'timeout' parameter ('ptimeout') controls how long ... select() ... shall
+*                                take before timing out."
+*
+*                               (1) (a) "If the 'timeout' parameter ('ptimeout') is not a null pointer, it
+*                                        specifies a maximum interval to wait for the selection to complete."
+*
+*                                       (1) "If none of the selected descriptors are ready for the requested
+*                                            operation, ... select() ... shall block until at least one of the
+*                                            requested operations becomes ready ... or ... until the timeout
+*                                            occurs."
+*
+*                                       (2) "If the specified time interval expires without any requested
+*                                            operation becoming ready, the function shall return."
+*
+*                                       (3) "To effect a poll, the 'timeout' parameter ('ptimeout') should not be
+*                                            a null pointer, and should point to a zero-valued timespec structure
+*                                            ('NET_SOCK_TIMEOUT')."
+*
+*                                   (b) (1) (A) "If the 'readfds' ('p_sock_desc_rd'), 'writefds' ('p_sock_desc_wr'),
+*                                                and 'errorfds' ('p_sock_desc_err') arguments are"                ...
+*                                               (1) "all null pointers"                                          ...
+*                                               (2) [or all null-valued (i.e. no file descriptors set)]          ...
+*                                           (B) "and the 'timeout' argument ('ptimeout') is not a null pointer," ...
+*
+*                                       (2) ... then "select() ... shall block for the time specified".
+*
+*                               (2) "If the 'timeout' parameter ('ptimeout') is a null pointer, then the call to
+*                                    ... select() shall block indefinitely until at least one descriptor meets the
+*                                    specified criteria."
+*
+*                                   (a) (1) Although IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION'
+*                                           states that select() may "block indefinitely until ... one of the
+*                                           requested operations becomes ready ... or until interrupted by a signal",
+*                                           it does NOT explicity specify how to handle the case where the descriptor
+*                                           arguments & the timeout parameter argument are all NULL pointers.
+*
+*                                           Therefore, it seems reasonable that select() should "block indefinitely
+*                                           ... until interrupted by a signal" if the descriptor arguments & the
+*                                           timeout parameter argument are all NULL pointers.
+*
+*                                       (2) However, since inter-process signals are NOT currently supported, it
+*                                           does NOT seem reasonable to block a task or process indefinitely (i.e.
+*                                           forever) if the descriptor arguments & the timeout parameter argument
+*                                           are all NULL pointers.  Instead, an 'invalid timeout interval' error
+*                                           should be returned.
+*
+*                                           See also Note #3d2B.
+*
+*                           (B) (1) "For the select() function, the timeout period is given ... in an argument
+*                                   ('ptimeout') of type struct 'timeval' ('NET_SOCK_TIMEOUT')" ... :
+*
+*                                   (a) "in seconds" ...
+*                                   (b) "and microseconds."
+*
+*                               (2) (a) (1) "Implementations may place limitations on the maximum timeout interval
+*                                            supported" :
+*
+*                                           (A) "All implementations shall support a maximum timeout interval of
+*                                                at least 31 days."
+*
+*                                               (1) However, since maximum timeout interval values are dependent
+*                                                   on the specific OS implementation; a maximum timeout interval
+*                                                   can NOT be guaranteed.
+*
+*                                           (B) "If the 'timeout' argument ('ptimeout') specifies a timeout interval
+*                                                greater than the implementation-defined maximum value, the maximum
+*                                                value shall be used as the actual timeout value."
+*
+*                                       (2) "Implementations may also place limitations on the granularity of
+*                                            timeout intervals" :
+*
+*                                           (A) "If the requested 'timeout' interval requires a finer granularity
+*                                                than the implementation supports, the actual timeout interval
+*                                                shall be rounded up to the next supported value."
+*
+*                                   (b) Operating systems may have different minimum/maximum ranges & resolutions
+*                                       for timeouts while pending or waiting on an operating system resource to
+*                                       become available (see Note #3b3A1a) versus time delays for suspending a
+*                                       task or process that is NOT pending or waiting for an operating system
+*                                       resource (see Note #3b3A1b).
+*
+*                   (c) (1) (A) IEEE Std 1003.1, 2004 Edition, Section 'select() : RETURN VALUE' states that :
+*
+*                               (1) "Upon successful completion, ... select() ... shall return the total
+*                                    number of bits set in the bit masks."
+*
+*                               (2) (a) "Otherwise, -1 shall be returned," ...
+*                                   (b) "and 'errno' shall be set to indicate the error."
+*                                       'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                           (B) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                               6th Printing, Section 6.3, Page 161 states that BSD select() function
+*                               "returns ... 0 on timeout".
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that :
+*
+*                           (A) "On failure, the objects pointed to by the 'readfds' ('p_sock_desc_rd'),
+*                                'writefds' ('p_sock_desc_wr'), and 'errorfds' ('p_sock_desc_err') arguments
+*                                shall not be modified."
+*
+*                               (1) Since 'p_sock_desc_rd', 'p_sock_desc_wr', & 'p_sock_desc_err' arguments
+*                                   are both input & output arguments; their input values, prior to use,
+*                                   MUST be copied to return their initial input values PRIOR to all other
+*                                   validation or function handling in case of any error(s).
+*
+*                           (B) "If the 'timeout' interval expires without the specified condition being
+*                                true for any of the specified file descriptors, the objects pointed to
+*                                by the 'readfds' ('p_sock_desc_rd'), 'writefds' ('p_sock_desc_wr'), and
+*                                'errorfds' ('p_sock_desc_err') arguments shall have all bits set to 0."
+*
+*                   (d) IEEE Std 1003.1, 2004 Edition, Section 'select() : ERRORS' states that "under the
+*                       following conditions, ... select() shall fail and set 'errno' to" :
+*
+*                       (1) "[EBADF] - One or more of the file descriptor sets specified a file descriptor
+*                            that is not a valid open file descriptor."
+*
+*                       (2) "[EINVAL]" -
+*
+*                           (A) "The 'nfds' argument ('sock_nbr_max') is" :
+*                               (1) "less than 0 or" ...
+*                               (2) "greater than FD_SETSIZE."
+*
+*                               See also Note #3b1.
+*
+*                           (B) "An invalid timeout interval was specified."
+*
+*                               See also Note #3b3.
+*
+*                           'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*               (4) A socket events table lists requested socket or connection ID numbers/handle identifiers
+*                   & their respective socket event operations.
+*
+*                   (a) Socket event tables are terminated with NULL table entry values.
+*
+*                   (b) (1) NET_SOCK_CFG_SEL_NBR_EVENTS_MAX configures socket event tables' maximum number
+*                           of socket events/operations.
+*
+*                       (2) This value is used to declare the size of the socket events tables.  Note that
+*                           one additional table entry is added for a terminating NULL table entry at a
+*                           maximum table index 'NET_SOCK_CFG_SEL_NBR_EVENTS_MAX' (see Note #4a).
+*
+*               (5) Since datagram-type sockets typically never wait on transmit operations, no socket
+*                   event should wait on datagram-type socket transmit operations or transmit errors.
+*
+*                   See also 'NetSock_IsRdyTxDatagram()            Note #3'
+*                          & 'NetSock_SelDescHandlerErrDatagram()  Note #4'.
+*********************************************************************************************************
+*/
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+NET_SOCK_RTN_CODE  NetSock_Sel (NET_SOCK_QTY       sock_nbr_max,
+                                NET_SOCK_DESC     *p_sock_desc_rd,
+                                NET_SOCK_DESC     *p_sock_desc_wr,
+                                NET_SOCK_DESC     *p_sock_desc_err,
+                                NET_SOCK_TIMEOUT  *p_timeout,
+                                NET_ERR           *p_err)
+{
+    NET_SOCK_SEL_OBJ   *p_sel_obj = DEF_NULL;
+    KAL_SEM_HANDLE      task_sem;
+    NET_SOCK           *p_sock;
+    NET_SOCK_ID         sock_id;
+    NET_SOCK_QTY        sock_nbr_max_actual;
+    NET_SOCK_RTN_CODE   sock_nbr_rdy;
+    NET_SOCK_DESC       sock_desc_rtn_rd;
+    NET_SOCK_DESC       sock_desc_rtn_wr;
+    NET_SOCK_DESC       sock_desc_rtn_err;
+    CPU_BOOLEAN         sock_desc_used_rd;
+    CPU_BOOLEAN         sock_desc_used_wr;
+    CPU_BOOLEAN         sock_desc_used_err;
+    NET_SOCK_SEL_OBJ   *p_sel_obj_cur  = DEF_NULL;
+    NET_SOCK_SEL_OBJ   *p_sel_obj_next = DEF_NULL;
+    CPU_INT32U          timeout_sec;
+    CPU_INT32U          timeout_us;
+    CPU_INT32U          timeout_ms;
+    LIB_ERR             lib_err;
+    KAL_ERR             err_kal;
+    KAL_ERR             err_kal_del;
+    NET_ERR             err;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+    }
+                                                                /* -------------- VALIDATE MAX SOCK DESC -------------- */
+#if (NET_SOCK_DESC_NBR_MIN_DESC > DEF_INT_16U_MIN_VAL)
+    if (sock_nbr_max < NET_SOCK_DESC_NBR_MIN_DESC) {            /* If max nbr sock desc < min, ...                      */
+       *p_err =  NET_SOCK_ERR_INVALID_DESC;                     /* ... rtn err (see Note #3d2A1).                       */
+        goto exit_lock_fault;
+    }
+#endif
+    if (sock_nbr_max > NET_SOCK_DESC_NBR_MAX_DESC) {            /* If max nbr sock desc > max (see Note #3b1B2a),       */
+       *p_err =  NET_SOCK_ERR_INVALID_DESC;                     /* ... rtn err (see Note #3d2A2).                       */
+        goto exit_lock_fault;
+    }
+
+                                                                /* ----------------- VALIDATE TIMEOUT ----------------- */
+    if (p_timeout != DEF_NULL) {
+        if (p_timeout->timeout_sec < 0) {
+           *p_err =  NET_SOCK_ERR_INVALID_TIMEOUT;
+            goto exit_lock_fault;
+        }
+        if (p_timeout->timeout_us  < 0) {
+           *p_err =  NET_SOCK_ERR_INVALID_TIMEOUT;
+            goto exit_lock_fault;
+        }
+    }
+#endif
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetSock_Sel, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #2).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        goto exit_err_sel;
+    }
+#endif
+
+
+
+                                                                /* ---- VALIDATE / CHK / CFG SOCK DESC(S) FOR RDY ----- */
+    sock_nbr_max_actual = DEF_MIN(sock_nbr_max, NET_SOCK_DESC_NBR_MAX_DESC);
+
+    if (sock_nbr_max_actual > 0) {
+        if (p_sock_desc_rd != DEF_NULL) {
+            NET_SOCK_DESC_COPY(&sock_desc_rtn_rd,  p_sock_desc_rd);
+        } else {
+            NET_SOCK_DESC_INIT(&sock_desc_rtn_rd);
+        }
+
+        if (p_sock_desc_wr != DEF_NULL) {
+            NET_SOCK_DESC_COPY(&sock_desc_rtn_wr,  p_sock_desc_wr);
+        } else {
+            NET_SOCK_DESC_INIT(&sock_desc_rtn_wr);
+        }
+
+        if (p_sock_desc_err != DEF_NULL) {
+            NET_SOCK_DESC_COPY(&sock_desc_rtn_err,  p_sock_desc_err);
+        } else {
+            NET_SOCK_DESC_INIT(&sock_desc_rtn_err);
+        }
+
+        sock_nbr_rdy = NetSock_SelDescHandler(sock_nbr_max_actual,
+                                             &sock_desc_rtn_rd,
+                                             &sock_desc_rtn_wr,
+                                             &sock_desc_rtn_err,
+                                              p_err);
+    } else {
+        sock_nbr_rdy = 0;
+    }
+
+
+
+
+
+
+
+    if (sock_nbr_rdy != 0) {                                     /* If any     sock desc's rdy,                  ..      */
+                                                                /* .. rtn rdy sock desc's (see Note #3b2B1a1) & ..      */
+        if (p_sock_desc_rd != DEF_NULL) {
+            NET_SOCK_DESC_COPY(p_sock_desc_rd,  &sock_desc_rtn_rd );
+        }
+
+        if (p_sock_desc_wr != DEF_NULL) {
+            NET_SOCK_DESC_COPY(p_sock_desc_wr,  &sock_desc_rtn_wr );
+        }
+
+        if (p_sock_desc_err != DEF_NULL) {
+            NET_SOCK_DESC_COPY(p_sock_desc_err, &sock_desc_rtn_err);
+        }
+
+       *p_err =   NET_SOCK_ERR_NONE;
+        goto exit_release;
+    }
+
+
+                                                                /* ---------- CFG TIMEOUT / HANDLE TIME DLY ----------- */
+    if (p_timeout != DEF_NULL) {                                /* If avail, cfg timeout vals    (see Note #3b3A1),     */
+        timeout_sec = (CPU_INT32U)p_timeout->timeout_sec;
+        timeout_us  = (CPU_INT32U)p_timeout->timeout_us;
+    } else {                                                    /* .. else  cfg timeout to block (see Note #3b3A2).     */
+        timeout_sec = NET_TMR_TIME_INFINITE;
+        timeout_us  = NET_TMR_TIME_INFINITE;
+    }
+
+
+    if ((timeout_sec == 0) && (timeout_us == 0)) {              /* If timeout = 0, handle as non-blocking poll ..       */
+                                                                /* .. timeout (see Note #3b3A1a3).                      */
+
+                                                                /* Zero-clr rtn sock desc's (see Note #3c2B).           */
+                                                                /* Clr because no sock is ready at this point.          */
+        if (p_sock_desc_rd != DEF_NULL) {
+            NET_SOCK_DESC_INIT(p_sock_desc_rd );
+        }
+
+        if (p_sock_desc_wr != DEF_NULL) {
+            NET_SOCK_DESC_INIT(p_sock_desc_wr );
+        }
+
+        if (p_sock_desc_err != DEF_NULL) {
+            NET_SOCK_DESC_INIT(p_sock_desc_err);
+        }
+
+       *p_err = NET_SOCK_ERR_TIMEOUT;
+        goto exit_err_timeout;
+    }
+
+
+    if (sock_nbr_max < 1) {                                     /* If NO sock events cfg'd to wait on ...               */
+
+        Net_GlobalLockRelease();
+        if (p_timeout == DEF_NULL) {                            /* ... & NO timeout req'd,            ...               */
+           *p_err = NET_SOCK_ERR_INVALID_TIMEOUT;               /* ... rtn err (see Note #3b3A2a2).                     */
+            sock_nbr_rdy = NET_SOCK_BSD_ERR_SEL;
+            goto exit;
+        }
+
+        Net_TimeDly(timeout_sec, timeout_us, &err);             /* Else dly for timeout (see Note #3b3A1b2).            */
+        switch (err) {
+            case NET_ERR_NONE:
+            case NET_ERR_TIME_DLY_MAX:
+                 break;
+
+            case NET_ERR_TIME_DLY_FAULT:
+            case NET_ERR_INVALID_TIME:
+            default:
+                *p_err =  NET_SOCK_ERR_INVALID_TIMEOUT;
+                 sock_nbr_rdy = NET_SOCK_BSD_ERR_SEL;
+                 goto exit;
+        }
+                                                                /* Zero-clr rtn sock desc's (see Note #3c2B).           */
+        if (p_sock_desc_rd != DEF_NULL) {
+            NET_SOCK_DESC_INIT(p_sock_desc_rd );
+        }
+
+        if (p_sock_desc_wr != DEF_NULL) {
+            NET_SOCK_DESC_INIT(p_sock_desc_wr );
+        }
+
+        if (p_sock_desc_err != DEF_NULL) {
+            NET_SOCK_DESC_INIT(p_sock_desc_err);
+        }
+
+       *p_err = NET_SOCK_ERR_TIMEOUT;
+        sock_nbr_rdy = NET_SOCK_BSD_RTN_CODE_TIMEOUT;
+        goto exit;
+    }
+
+
+
+    task_sem  =  KAL_SemCreate((const  CPU_CHAR  *)"Net Sock Sel Task",
+                                                    DEF_NULL,
+                                                   &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_MEM_ALLOC:
+             *p_err = NET_ERR_FAULT_MEM_ALLOC;
+              goto exit_err_sel;
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_CREATE:
+        default:
+           *p_err = NET_SOCK_ERR_SEL_SIGNAL_FAULT;
+            goto exit_err_sel;
+
+    }
+
+
+    for (sock_id = 0; sock_id < sock_nbr_max; sock_id++) {
+         p_sock = &NetSock_Tbl[sock_id];
+
+         if (p_sock_desc_rd != DEF_NULL) {
+             sock_desc_used_rd = NET_SOCK_DESC_IS_SET(sock_id, p_sock_desc_rd);
+         } else {
+             sock_desc_used_rd = DEF_NO;
+         }
+
+         if (p_sock_desc_wr != DEF_NULL) {
+             sock_desc_used_wr = NET_SOCK_DESC_IS_SET(sock_id, p_sock_desc_wr);
+         } else {
+             sock_desc_used_wr = DEF_NO;
+         }
+
+         if (p_sock_desc_err != DEF_NULL) {
+             sock_desc_used_err = NET_SOCK_DESC_IS_SET(sock_id, p_sock_desc_err);
+         } else {
+             sock_desc_used_err = DEF_NO;
+         }
+
+
+         if ((sock_desc_used_rd  == DEF_YES) ||
+             (sock_desc_used_wr  == DEF_YES) ||
+             (sock_desc_used_err == DEF_YES)) {
+
+             p_sel_obj = (NET_SOCK_SEL_OBJ *)Mem_DynPoolBlkGet(&NetSock_SelObjPool, &lib_err);
+             if (p_sel_obj == DEF_NULL) {
+                 KAL_SemDel(task_sem, &err_kal_del);
+                *p_err = NET_ERR_FAULT_MEM_ALLOC;
+                 goto exit_err_sel;
+             }
+
+             p_sel_obj->SockSelPendingFlags = NET_SOCK_SEL_EVENT_FLAG_NONE;
+
+             if (sock_desc_used_rd == DEF_YES) {
+                 p_sel_obj->SockSelPendingFlags |= NET_SOCK_SEL_EVENT_FLAG_RD;
+             }
+
+             if (sock_desc_used_wr == DEF_YES) {
+                 p_sel_obj->SockSelPendingFlags |= NET_SOCK_SEL_EVENT_FLAG_WR;
+             }
+
+             if (sock_desc_used_err == DEF_YES) {
+                 p_sel_obj->SockSelPendingFlags |= NET_SOCK_SEL_EVENT_FLAG_ERR;
+             }
+
+             p_sel_obj->SockSelTaskSignalObj = task_sem;
+             p_sel_obj->ObjPrevPtr           = p_sock->SelObjTailPtr;
+             p_sock->SelObjTailPtr           = p_sel_obj;
+         }
+    }
+
+
+    timeout_ms = NetUtil_TimeSec_uS_To_ms(timeout_sec, timeout_us);
+    if (timeout_ms == NET_TMR_TIME_INFINITE) {
+        timeout_ms =  KAL_TIMEOUT_INFINITE;
+    }
+
+                                                                /* ------ WAIT ON MULTIPLE SOCK DESC'S / EVENTS ------- */
+    Net_GlobalLockRelease();
+
+    KAL_SemPend(task_sem, KAL_OPT_PEND_NONE, timeout_ms, &err_kal);
+    Net_GlobalLockAcquire((void *)&NetSock_Sel, p_err);
+    if (*p_err != NET_ERR_NONE) {
+        *p_err  = err;                                          /* Rtn err from Net_GlobalLockAcquire().                */
+         goto exit_lock_fault;
+    }
+
+
+    for (sock_id = 0; sock_id < sock_nbr_max; sock_id++) {
+         p_sock         = &NetSock_Tbl[sock_id];
+
+
+         if (p_sock_desc_rd != DEF_NULL) {
+             sock_desc_used_rd = NET_SOCK_DESC_IS_SET(sock_id, p_sock_desc_rd);
+         } else {
+             sock_desc_used_rd = DEF_NO;
+         }
+
+         if (p_sock_desc_wr != DEF_NULL) {
+             sock_desc_used_wr = NET_SOCK_DESC_IS_SET(sock_id, p_sock_desc_wr);
+         } else {
+             sock_desc_used_wr = DEF_NO;
+         }
+
+         if (p_sock_desc_err != DEF_NULL) {
+             sock_desc_used_err = NET_SOCK_DESC_IS_SET(sock_id, p_sock_desc_err);
+         } else {
+             sock_desc_used_err = DEF_NO;
+         }
+
+
+         if (p_sock->SelObjTailPtr != DEF_NULL) {               /* Remove p_sel_obj from Socket Select objects list     */
+
+             p_sel_obj_cur  = p_sock->SelObjTailPtr;
+             p_sel_obj_next = DEF_NULL;
+
+             while (p_sel_obj_cur != DEF_NULL) {
+                 NET_SOCK_SEL_OBJ  *p_sel_obj_prev = p_sel_obj_cur->ObjPrevPtr;
+
+
+                 if (p_sel_obj_cur->SockSelTaskSignalObj.SemObjPtr == task_sem.SemObjPtr) {
+                     NET_SOCK_SEL_OBJ   *p_sel_obj_to_free  = DEF_NULL;
+
+
+                     if (p_sock->SelObjTailPtr == p_sel_obj_cur) {
+                         p_sock->SelObjTailPtr  = p_sel_obj_prev;
+
+                     } else if (p_sel_obj_next != DEF_NULL) {
+                         p_sel_obj_next->ObjPrevPtr = p_sel_obj_prev;
+                     }
+
+                     p_sel_obj_to_free = p_sel_obj_cur;
+                     p_sel_obj_cur  = p_sel_obj_cur->ObjPrevPtr;
+
+                     Mem_DynPoolBlkFree(&NetSock_SelObjPool, p_sel_obj_to_free, &lib_err);
+
+                 } else {
+                     p_sel_obj_next = p_sel_obj_cur;
+                     p_sel_obj_cur  = p_sel_obj_cur->ObjPrevPtr;
+                 }
+             }
+         }
+    }
+
+
+    KAL_SemDel(task_sem, &err_kal_del);
+   (void)&err_kal_del;
+
+
+
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+        case KAL_ERR_TIMEOUT:
+             if (p_sock_desc_rd != DEF_NULL) {
+                 NET_SOCK_DESC_INIT(p_sock_desc_rd );
+             }
+
+             if (p_sock_desc_wr != DEF_NULL) {
+                 NET_SOCK_DESC_INIT(p_sock_desc_wr );
+             }
+
+             if (p_sock_desc_err != DEF_NULL) {
+                 NET_SOCK_DESC_INIT(p_sock_desc_err);
+             }
+            *p_err = NET_SOCK_ERR_TIMEOUT;
+             goto exit_err_timeout;
+
+        case KAL_ERR_WOULD_BLOCK:
+        case KAL_ERR_ISR:
+        case KAL_ERR_ABORT:
+        case KAL_ERR_OS:
+        default:
+             goto exit_err_sel;
+    }
+
+
+
+    if (p_sock_desc_rd != DEF_NULL) {
+        NET_SOCK_DESC_COPY(&sock_desc_rtn_rd, p_sock_desc_rd);
+    } else {
+        NET_SOCK_DESC_INIT(&sock_desc_rtn_rd);
+    }
+
+    if (p_sock_desc_wr != DEF_NULL) {
+        NET_SOCK_DESC_COPY(&sock_desc_rtn_wr, p_sock_desc_wr);
+    } else {
+        NET_SOCK_DESC_INIT(&sock_desc_rtn_wr);
+    }
+
+    if (p_sock_desc_err != DEF_NULL) {
+        NET_SOCK_DESC_COPY(&sock_desc_rtn_err, p_sock_desc_err);
+    } else {
+        NET_SOCK_DESC_INIT(&sock_desc_rtn_err);
+    }
+
+
+    sock_nbr_rdy = NetSock_SelDescHandler(sock_nbr_max_actual,
+                                         &sock_desc_rtn_rd,
+                                         &sock_desc_rtn_wr,
+                                         &sock_desc_rtn_err,
+                                          p_err);
+    if (p_sock_desc_rd != DEF_NULL) {
+        NET_SOCK_DESC_COPY(p_sock_desc_rd, &sock_desc_rtn_rd);
+    }
+
+    if (p_sock_desc_wr != DEF_NULL) {
+        NET_SOCK_DESC_COPY(p_sock_desc_wr,  &sock_desc_rtn_wr );
+    }
+
+    if (p_sock_desc_err != DEF_NULL) {
+        NET_SOCK_DESC_COPY(p_sock_desc_err, &sock_desc_rtn_err);
+    }
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (NET_SOCK_BSD_ERR_SEL);
+
+exit_err_timeout:
+    sock_nbr_rdy = NET_SOCK_BSD_RTN_CODE_TIMEOUT;
+    goto exit_release;
+
+exit_err_sel:
+    sock_nbr_rdy = NET_SOCK_BSD_ERR_SEL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (sock_nbr_rdy);                                       /* Rtn nbr rdy sock desc's (see Note #3c1A1).           */
+}
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_SelAbort()
+*
+* Description : Abort (unblock) all tasks that are pending on a particular socket using the select.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to abort the select.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                 NET_SOCK_ERR_NONE     No error
+*
+*                                 NET_SOCK_ERR_INVALID_ARG  Invalid socket ID
+*                                 NET_SOCK_ERR_NONE_AVAIL   No task pending on the socket.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : None.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+void  NetSock_SelAbort (NET_SOCK_ID   sock_id,
+                        NET_ERR      *p_err)
+{
+    NET_SOCK           *p_sock;
+    NET_SOCK_SEL_OBJ   *p_sel_obj;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+    }
+#endif
+
+    p_sock = NetSock_GetObj(sock_id);
+    if (p_sock == DEF_NULL) {
+       *p_err = NET_SOCK_ERR_INVALID_ARG;
+        goto exit;
+    }
+
+    p_sel_obj = p_sock->SelObjTailPtr;
+    if (p_sel_obj == DEF_NULL) {
+       *p_err = NET_SOCK_ERR_NONE_AVAIL;
+        goto exit;
+    }
+
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_SEL_ABORT);
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_AppPostRx()
+*
+* Description : Signal application layer that something happen on a connection.
+*
+* Argument(s) : conn_id_app     Connection handle identifier of socket to signal.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_GetConnTransport().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef NET_SOCK_TYPE_STREAM_MODULE_EN
+static  void  NetSock_AppPostRx (NET_CONN_ID  conn_id_app)
+{
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NET_SOCK    *p_sock;
+
+    if (conn_id_app == NET_CONN_ID_NONE) {
+        return;
+    }
+
+    p_sock = &NetSock_Tbl[conn_id_app];
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_RX);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_AppPostTx()
+*
+* Description : Signal application layer that something happen on a connection.
+*
+* Argument(s) : conn_id_app     Connection handle identifier of socket to signal.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_GetConnTransport().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef NET_SOCK_TYPE_STREAM_MODULE_EN
+static  void  NetSock_AppPostTx (NET_CONN_ID  conn_id_app)
+{
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NET_SOCK    *p_sock;
+
+    if (conn_id_app == NET_CONN_ID_NONE) {
+        return;
+    }
+
+    p_sock = &NetSock_Tbl[conn_id_app];
+    NetSock_SelPost(p_sock, NET_SOCK_EVENT_TYPE_TX);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_SelPost()
+*
+* Description : Signal select pending object that something happened on the connection.
+*
+* Argument(s) : sem     Semaphore signal object.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_AppPost(),
+*               NetSock_ConnAcceptQ_Abort(),
+*               NetSock_ConnAcceptQ_Signal(),
+*               NetSock_ConnCloseAbort(),
+*               NetSock_ConnCloseSignal(),
+*               NetSock_ConnReqAbort(),
+*               NetSock_ConnReqSignal(),
+*               NetSock_RxQ_Abort(),
+*               NetSock_RxQ_Signal().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  void  NetSock_SelPost (NET_SOCK             *p_sock,
+                               NET_SOCK_EVENT_TYPE   event)
+{
+    NET_SOCK_SEL_EVENT_FLAG   flags_mask = NET_SOCK_SEL_EVENT_FLAG_NONE;
+    NET_SOCK_SEL_OBJ         *p_sel_obj  = p_sock->SelObjTailPtr;
+
+
+    if (p_sel_obj == DEF_NULL) {
+        goto exit;
+    }
+
+
+    switch (event) {
+        case NET_SOCK_EVENT_TYPE_CONN_REQ_SIGNAL:
+        case NET_SOCK_EVENT_TYPE_CONN_ACCEPT_SIGNAL:
+             flags_mask = NET_SOCK_SEL_EVENT_FLAG_RD
+                        | NET_SOCK_SEL_EVENT_FLAG_WR;
+             break;
+
+        case NET_SOCK_EVENT_TYPE_CONN_ACCEPT_ABORT:
+        case NET_SOCK_EVENT_TYPE_CONN_CLOSE_SIGNAL:
+        case NET_SOCK_EVENT_TYPE_CONN_REQ_ABORT:
+        case NET_SOCK_EVENT_TYPE_CONN_CLOSE_ABORT:
+        case NET_SOCK_EVENT_TYPE_SEL_ABORT:
+             flags_mask = NET_SOCK_SEL_EVENT_FLAG_RD
+                        | NET_SOCK_SEL_EVENT_FLAG_WR
+                        | NET_SOCK_SEL_EVENT_FLAG_ERR;
+              break;
+
+        case NET_SOCK_EVENT_TYPE_RX_ABORT:
+             flags_mask = NET_SOCK_SEL_EVENT_FLAG_RD
+                        | NET_SOCK_SEL_EVENT_FLAG_ERR;
+             break;
+
+        case NET_SOCK_EVENT_TYPE_RX:
+             flags_mask = NET_SOCK_SEL_EVENT_FLAG_RD;
+             break;
+
+        case NET_SOCK_EVENT_TYPE_TX:
+             flags_mask = NET_SOCK_SEL_EVENT_FLAG_WR;
+             break;
+
+        default:
+             break;
+    }
+
+
+    while (p_sel_obj != DEF_NULL) {
+        if ((p_sel_obj->SockSelPendingFlags & flags_mask) > 0) {
+            KAL_ERR      err_kal;
+
+
+            KAL_SemPost(p_sel_obj->SockSelTaskSignalObj, KAL_OPT_PEND_NONE, &err_kal);
+           (void)&err_kal;
+        }
+
+        p_sel_obj = p_sel_obj->ObjPrevPtr;
+    }
+
+exit:
+    return;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         NetSock_CfgBlock()
+*
+* Description : (1) Configure socket's blocking mode :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  blocking mode
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to configure blocking mode.
+*
+*               block       Desired value for socket blocking mode :
+*
+*                               NET_SOCK_BLOCK_SEL_DFLT /       Socket operations will     block.
+*                               NET_SOCK_BLOCK_SEL_BLOCK
+*
+*                               NET_SOCK_BLOCK_SEL_NO_BLOCK     Socket operations will NOT block.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket blocking mode successfully configured.
+*                               NET_SOCK_ERR_INVALID_ARG        Invalid socket blocking argument.
+*
+*                                                               ------ RETURNED BY NetSock_IsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket blocking mode successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgBlock() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgBlock (NET_SOCK_ID   sock_id,
+                               CPU_INT08U    block,
+                               NET_ERR      *p_err)
+{
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   rtn_val;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgBlock, p_err);     /* See Note #2b.                                        */
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* --------------- CFG SOCK BLOCK MODE ---------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (block) {
+       case NET_SOCK_BLOCK_SEL_DFLT:
+       case NET_SOCK_BLOCK_SEL_BLOCK:
+            DEF_BIT_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+            break;
+
+
+       case NET_SOCK_BLOCK_SEL_NO_BLOCK:
+            DEF_BIT_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+            break;
+
+
+       case NET_SOCK_BLOCK_SEL_NONE:
+       default:
+           *p_err =  NET_SOCK_ERR_INVALID_ARG;
+            goto exit_fail;
+   }
+
+
+   rtn_val = DEF_OK;
+  *p_err   = NET_SOCK_ERR_NONE;
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                               /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+   return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_BlockGet()
+*
+* Description : Get the blocking mode configuration of the specified socket.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get option from.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE       Operation was successful.
+*
+*                               ------------ RETURNED BY NetSock_IsUsed() ------------
+*                               See NetSock_IsUsed() for additional return error codes.
+*
+* Return(s)   : NET_SOCK_BLOCK_SEL_NO_BLOCK : Socket is in none blocking mode.
+*               NET_SOCK_BLOCK_SEL_BLOCK    : Socket is in blocking mode.
+*               NET_SOCK_BLOCK_SEL_NONE     : Error in operation.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_BlockGet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  NetSock_BlockGet (NET_SOCK_ID   sock_id,
+                              NET_ERR      *p_err)
+{
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   is_no_block;
+    CPU_INT08U    block;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == DEF_NULL) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgBlock, p_err);     /* See Note #2b.                                        */
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         block = NET_SOCK_BLOCK_SEL_NONE;
+         goto exit_release;
+    }
+#endif
+
+                                                                /* --------------- CFG SOCK BLOCK MODE ---------------- */
+    p_sock = &NetSock_Tbl[sock_id];
+
+    is_no_block = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+    if (is_no_block == DEF_YES) {
+        block = NET_SOCK_BLOCK_SEL_NO_BLOCK;
+    } else {
+        block = NET_SOCK_BLOCK_SEL_BLOCK;
+    }
+
+   *p_err = NET_SOCK_ERR_NONE;
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (NET_SOCK_BLOCK_SEL_NONE);
+
+exit_release:
+                                                                  /* ----------------- RELEASE NET LOCK ----------------- */
+      Net_GlobalLockRelease();
+
+   return (block);
+}
+
+
+/*
+*********************************************************************************************************
+
+*                                         NetSock_CfgIF()
+*
+* Description : (1) Configure the interface that must be used by the socket.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of the socket to configure the interface
+*               -------     number.
+*
+*               if_nbr      Interface number to bind to the socket.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Interface number successfully set.
+*
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network lock failure.
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization not completed.
+*                               NET_SOCK_ERR_INVALID_SOCK       Socket ID invalid.
+*                               NET_SOCK_ERR_NOT_USED           Socket ID not used.
+*                               NET_SOCK_ERR_INVALID_TYPE       Socket is not of the right type.
+*
+* Return(s)   : DEF_OK,   If the interface number was successfully set,
+*
+*               DEF_FAIL, Otherwise.
+*
+* Caller(s)   : Application
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgIF() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgIF (NET_SOCK_ID   sock_id,
+                            NET_IF_NBR    if_nbr,
+                            NET_ERR      *p_err)
+{
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgIF, p_err);        /* See Note #2b.                                        */
+   if (*p_err != NET_ERR_NONE) {
+       return (DEF_FAIL);
+   }
+
+  (void)NetSock_CfgIF_Handler(sock_id,                          /* ------------------- CFG SOCK IF -------------------- */
+                              if_nbr,
+                              p_err);
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+   if (*p_err == NET_SOCK_ERR_NONE) {
+       return (DEF_OK);
+   } else {
+       return (DEF_FAIL);
+   }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetSock_CfgSecure()
+*
+* Description : (1) Configure socket's secure mode :
+*
+*                   (a) Acquire network lock                                          See Note #2
+*                   (b) Validate socket :
+*                       (1) Validate socket used
+*                       (2) Validate socket type
+*                       (3) Validate socket connection state
+*                   (c) Configure socket secure mode
+*                   (d) Release network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to configure secure mode.
+*
+*               secure      Desired value for socket secure mode :
+*
+*                               DEF_ENABLED                     Socket operations will     be secured.
+*                               DEF_DISABLED                    Socket operations will NOT be secured.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket secure mode successfully configured.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_INVALID_ARG        Invalid socket secure argument.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_ERR_FAULT_FEATURE_DIS            Disabled API function.
+*
+*                                                               ----- RETURNED BY NetSock_IsUsed() : ------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*
+*                                                               -- RETURNED BY NetSecure_InitSession() : --
+*                               NET_SECURE_ERR_NOT_AVAIL        Secure session not avail.
+*
+*                                                               See specific network security port for
+*                                                                   additional return error codes.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket secure mode successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgSecure() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) A socket's secure session ('p_sock->SecureSession') will be initialized if a secure
+*                   port session buffer/object is available.
+*
+*               (4) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'SockType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgSecure (NET_SOCK_ID   sock_id,
+                                CPU_BOOLEAN   secure,
+                                NET_ERR      *p_err)
+{
+    CPU_BOOLEAN   rtn_val;
+#ifdef  NET_SECURE_MODULE_EN
+   NET_SOCK      *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgSecure, p_err);            /* See Note #2b.                                        */
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+   p_sock = &NetSock_Tbl[sock_id];
+
+                                                                /* ---------------- VALIDATE SOCK TYPE ---------------- */
+   switch (p_sock->SockType) {
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+       case NET_SOCK_TYPE_STREAM:
+            break;
+#endif
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       case NET_SOCK_TYPE_DATAGRAM:
+       default:                                                 /* See Note #4.                                         */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fail;
+   }
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+   switch (p_sock->State) {
+       case NET_SOCK_STATE_CLOSED:
+       case NET_SOCK_STATE_BOUND:
+            break;
+
+
+       case NET_SOCK_STATE_FREE:
+       case NET_SOCK_STATE_DISCARD:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+           *p_err =  NET_SOCK_ERR_NOT_USED;
+            goto exit_fail;
+
+
+       case NET_SOCK_STATE_LISTEN:
+       case NET_SOCK_STATE_CONN:
+       case NET_SOCK_STATE_CONN_IN_PROGRESS:
+       case NET_SOCK_STATE_CONN_DONE:
+       case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+       case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+       case NET_SOCK_STATE_CLOSED_FAULT:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_OP;
+            goto exit_fail;
+
+
+       case NET_SOCK_STATE_NONE:
+       default:
+            NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_STATE;
+            goto exit_fail;
+   }
+
+
+                                                                /* --------------- CFG SOCK SECURE MODE --------------- */
+   switch (secure) {
+       case DEF_ENABLED:
+            NetSecure_InitSession(p_sock, p_err);               /* Init new secure session (see Note #3).               */
+            if (*p_err != NET_SECURE_ERR_NONE) {
+                 goto exit_fail;
+            }
+            DEF_BIT_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+            break;
+
+
+       case DEF_DISABLED:
+            DEF_BIT_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+            break;
+
+
+       default:
+           *p_err =  NET_SOCK_ERR_INVALID_ARG;
+            goto exit_fail;
+   }
+
+
+   rtn_val = DEF_OK;
+  *p_err   = NET_SOCK_ERR_NONE;
+
+   goto exit_release;
+
+exit_lock_fault:
+    rtn_val = DEF_FAIL;
+    goto exit;
+
+exit_fail:
+    rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+#else
+   (void)&sock_id;                                              /* Prevent 'variable unused' compiler warning.          */
+   (void)&secure;
+
+   *p_err =  NET_ERR_FAULT_FEATURE_DIS;
+
+    rtn_val = DEF_FAIL;
+
+    goto exit;
+#endif
+exit:
+    return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_CfgSecureServerCertKeyInstall()
+*
+* Description : (1) Install certificate and key that must be used by a server socket :
+*
+*                   (a) Acquire network lock                                          See Note #2
+*                   (b) Validate socket :
+*                       (1) Validate socket used
+*                       (2) Validate socket type
+*                   (c) Configure server's socket certificate and key
+*                   (d) Release network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of server socket to configure secure certificate and key.
+*
+*               p_cert      Pointer to buffer that contains the certificate.
+*
+*               cert_len    Certificate length.
+*
+*               p_key       Pointer to buffer that contains the key.
+*
+*               key_len     Key length.
+*
+*               fmt         Certificate and key format:
+*
+*                               NET_SOCK_SECURE_CERT_KEY_FMT_PEM
+*                               NET_SOCK_SECURE_CERT_KEY_FMT_DER
+*
+*               cert_chain  Certificate point to a chain of certificate.
+*
+*                               DEF_YES     Certificate points to a chain  of certificate.
+*                               DEF_NO      Certificate points to a single    certificate.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket secure mode successfully configured.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_INVALID_ARG        Invalid socket secure argument.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_ERR_FAULT_FEATURE_DIS            Disabled API function.
+*
+*                                                               ----- RETURNED BY NetSock_IsUsed() : ------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*
+*                                                               -- RETURNED BY NetSecure_InitSession() : --
+*                               NET_SECURE_ERR_NOT_AVAIL        Secure session not avail.
+*
+*                                                               See specific network security port for
+*                                                                   additional return error codes.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   certificate and key successfully installed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgSecureServerCertKeyInstall() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) MUST BE CALLED ONLY AFTER NetSock_CfgSecure() has been called.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgSecureServerCertKeyInstall (       NET_SOCK_ID                    sock_id,
+                                                    const  void                          *p_cert,
+                                                           CPU_INT32U                     cert_len,
+                                                    const  void                          *p_key,
+                                                           CPU_INT32U                     key_len,
+                                                           NET_SOCK_SECURE_CERT_KEY_FMT   fmt,
+                                                           CPU_BOOLEAN                    cert_chain,
+                                                           NET_ERR                       *p_err)
+{
+#ifdef  NET_SECURE_MODULE_EN
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   secure;
+    CPU_BOOLEAN   rtn_val;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ------------------- VALIDATE ARG ------------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+
+    if (p_cert == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit_lock_fault;
+    }
+
+    if (p_key == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        goto exit_lock_fault;
+    }
+
+    if ((fmt != NET_SOCK_SECURE_CERT_KEY_FMT_PEM) &&
+        (fmt != NET_SOCK_SECURE_CERT_KEY_FMT_DER)) {
+        *p_err = NET_SOCK_ERR_INVALID_ARG;
+         goto exit_lock_fault;
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgSecureServerCertKeyInstall, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+
+                                                                /* ---------------- VALIDATE SOCK TYPE ---------------- */
+    secure = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+    if (secure != DEF_YES) {
+       *p_err = NET_SOCK_ERR_INVALID_OP;
+        goto exit_fail;
+    }
+
+
+                                                                /* ----------- CFG SERVER'S SOCK CERT & KEY ----------- */
+    NetSecure_SockCertKeyCfg(p_sock,
+                             NET_SOCK_SECURE_TYPE_SERVER,
+                             p_cert,
+                             cert_len,
+                             p_key,
+                             key_len,
+                             fmt,
+                             cert_chain,
+                             p_err);
+    if (*p_err == NET_SECURE_ERR_NONE) {
+        *p_err   = NET_SOCK_ERR_NONE;
+         rtn_val = DEF_OK;
+    }
+
+    goto exit_release;
+
+exit_fail:
+    rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+    return (rtn_val);
+#else
+   (void)&sock_id;                                              /* Prevent 'variable unused' compiler warning.          */
+   (void)&p_cert;
+   (void)&cert_len;
+   (void)&p_key;
+   (void)&key_len;
+   (void)&fmt;
+   (void)&cert_chain;
+
+   *p_err =  NET_ERR_FAULT_FEATURE_DIS;
+
+    goto exit_lock_fault;
+
+#endif
+
+exit_lock_fault:
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_CfgSecureClientCertKey()
+*
+* Description : (1) Install certificate and key that must be used by a server socket :
+*
+*                   (a) Acquire network lock                                          See Note #2
+*                   (b) Validate socket :
+*                       (1) Validate socket used
+*                       (2) Validate socket type
+*                   (c) Configure server's socket certificate and key
+*                   (d) Release network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of server socket to configure secure certificate and key.
+*
+*               p_cert      Pointer to buffer that contains the certificate.
+*
+*               cert_len    Certificate length.
+*
+*               p_key       Pointer to buffer that contains the key.
+*
+*               key_len     Key length.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket secure mode successfully configured.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_INVALID_ARG        Invalid socket secure argument.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_ERR_FAULT_FEATURE_DIS            Disabled API function.
+*
+*                                                               ----- RETURNED BY NetSock_IsUsed() : ------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*
+*                                                               -- RETURNED BY NetSecure_InitSession() : --
+*                               NET_SECURE_ERR_NOT_AVAIL        Secure session not avail.
+*
+*                                                               See specific network security port for
+*                                                                   additional return error codes.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   certificate and key successfully installed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgSecureServerCertKeyInstall() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) MUST BE CALLED ONLY AFTER NetSock_CfgSecure() has been called.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgSecureClientCertKey (NET_SOCK_ID                    sock_id,
+                                             CPU_CHAR                      *p_cert,
+                                             CPU_INT32U                     cert_size,
+                                             CPU_CHAR                      *p_key,
+                                             CPU_INT32U                     key_size,
+                                             NET_SOCK_SECURE_CERT_KEY_FMT   fmt,
+                                             CPU_BOOLEAN                    cert_chain,
+                                             NET_ERR                       *p_err)
+{
+    CPU_BOOLEAN   rtn_val;
+#if  ((defined(NET_SECURE_MODULE_EN)) && \
+      (NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT > 0u))
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   secure;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ------------------- VALIDATE ARG ------------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+
+    if (p_cert == DEF_NULL) {
+        *p_err = NET_ERR_FAULT_NULL_PTR;
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgSecureClientCertKey, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+                                                                /* ---------------- VALIDATE SOCK TYPE ---------------- */
+
+    secure = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+    if (secure != DEF_YES) {
+       *p_err = NET_SOCK_ERR_INVALID_OP;
+        goto exit_fail;
+    }
+
+                                                                /* CFG SOCK's TRUST CALL BACK FNCT                      */
+    NetSecure_SockCertKeyCfg(p_sock,
+                             NET_SOCK_SECURE_TYPE_CLIENT,
+                             p_cert,
+                             cert_size,
+                             p_key,
+                             key_size,
+                             fmt,
+                             cert_chain,
+                             p_err);
+    if (*p_err == NET_SECURE_ERR_NONE) {
+        *p_err   = NET_SOCK_ERR_NONE;
+         rtn_val = DEF_OK;
+    }
+    if (*p_err == NET_SECURE_ERR_NONE) {
+        *p_err =  NET_SOCK_ERR_NONE;
+         rtn_val = DEF_OK;
+    }
+
+    goto exit_release;
+
+
+exit_lock_fault:
+    rtn_val = DEF_FAIL;
+    goto exit;
+
+exit_fail:
+    rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+    goto exit;
+
+
+#else
+   (void)&sock_id;                                              /* Prevent 'variable unused' compiler warning.          */
+   (void)&p_cert;
+   (void)&cert_size;
+   (void)&p_key;
+   (void)&key_size;
+   (void)&fmt;
+   (void)&cert_chain;
+
+    rtn_val = DEF_FAIL;
+
+   *p_err   = NET_ERR_FAULT_FEATURE_DIS;
+
+    goto exit;
+#endif
+
+exit:
+    return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_CfgSecureClientCommonName()
+*
+* Description : (1) Configure client socket's common name :
+*
+*                   (a) Validate arguments
+*                   (b) Acquire network lock                                          See Note #2
+*                   (c) Validate socket :
+*                       (1) Validate socket used
+*                       (2) Validate socket type
+*                   (d) Configure client socket's common name.
+*                   (e) Release network lock
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of client socket to configure common name.
+*
+*               pcommon_name    Pointer to string that contain the common name.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket secure mode successfully configured.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_INVALID_ARG        Invalid socket secure argument.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_ERR_FAULT_FEATURE_DIS            Disabled API function.
+*
+*                                                               ----- RETURNED BY NetSock_IsUsed() : ------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*
+*                                                               -- RETURNED BY NetSecure_InitSession() : --
+*                               NET_SECURE_ERR_NOT_AVAIL        Secure session not avail.
+*
+*                                                               See specific network security port for
+*                                                                   additional return error codes.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   common name successfully installed.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgSecureClientCommonName() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) MUST BE CALLED ONLY AFTER NetSock_CfgSecure() has been called.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgSecureClientCommonName (NET_SOCK_ID   sock_id,
+                                                CPU_CHAR     *pcommon_name,
+                                                NET_ERR      *p_err)
+{
+#if  ((defined(NET_SECURE_MODULE_EN)) && \
+      (NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT > 0u))
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   secure;
+    CPU_BOOLEAN   rtn_val;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ------------------- VALIDATE ARG ------------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+
+    if (pcommon_name == DEF_NULL) {
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return (DEF_FAIL);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgSecureClientCommonName, p_err);
+    if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+                                                                /* ---------------- VALIDATE SOCK TYPE ---------------- */
+
+    secure = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+    if (secure != DEF_YES) {
+       *p_err = NET_SOCK_ERR_INVALID_OP;
+        goto exit_fail;
+    }
+
+                                                                /* CFG SOCK's COMMON NAME                               */
+
+    rtn_val = NetSecure_ClientCommonNameSet(p_sock,
+                                            pcommon_name,
+                                            p_err);
+
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    if (*p_err == NET_SECURE_ERR_NONE) {
+        *p_err =  NET_SOCK_ERR_NONE;
+         rtn_val = DEF_OK;
+    }
+
+    goto exit_release;
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+   return (rtn_val);
+
+#else
+   (void)&sock_id;                                              /* Prevent 'variable unused' compiler warning.          */
+   (void)&pcommon_name;
+
+   *p_err =  NET_ERR_FAULT_FEATURE_DIS;
+
+    goto exit_lock_fault;
+#endif
+
+exit_lock_fault:
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_CfgSecureClientTrustCallBack()
+*
+* Description : (1) Configure client socket's trust call back function :
+*
+*                   (a) Validate arguments
+*                   (b) Acquire network lock                                          See Note #2
+*                   (c) Validate socket :
+*                       (1) Validate socket used
+*                       (2) Validate socket type
+*                   (d) Configure socket trust call back function
+*                   (e) Release network lock
+*
+*
+* Argument(s) : sock_id             Socket descriptor/handle identifier of client socket to configure trust call back function.
+*
+*               call_back_fnct      Pointer to the trust call back function
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket secure mode successfully configured.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_INVALID_ARG        Invalid socket secure argument.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_ERR_FAULT_FEATURE_DIS            Disabled API function.
+*
+*                                                               ----- RETURNED BY NetSock_IsUsed() : ------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*
+*                                                               -- RETURNED BY NetSecure_InitSession() : --
+*                               NET_SECURE_ERR_NOT_AVAIL        Secure session not avail.
+*
+*                                                               See specific network security port for
+*                                                                   additional return error codes.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   trust call back function successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgSecureClientTrustCallBack() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) MUST BE CALLED ONLY AFTER NetSock_CfgSecure() has been called.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgSecureClientTrustCallBack (NET_SOCK_ID                  sock_id,
+                                                   NET_SOCK_SECURE_TRUST_FNCT   call_back_fnct,
+                                                   NET_ERR                     *p_err)
+{
+    CPU_BOOLEAN   rtn_val;
+#if  ((defined(NET_SECURE_MODULE_EN)) && \
+      (NET_SECURE_CFG_MAX_NBR_SOCK_CLIENT > 0u))
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   secure;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ------------------- VALIDATE ARG ------------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+
+    if (call_back_fnct == DEF_NULL) {
+        *p_err = NET_ERR_FAULT_NULL_PTR;
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgSecureClientTrustCallBack, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+                                                                /* ---------------- VALIDATE SOCK TYPE ---------------- */
+
+    secure = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+    if (secure != DEF_YES) {
+       *p_err = NET_SOCK_ERR_INVALID_OP;
+        goto exit_fail;
+    }
+
+                                                                /* CFG SOCK's TRUST CALL BACK FNCT                      */
+
+    rtn_val = NetSecure_ClientTrustCallBackSet(p_sock,
+                                               call_back_fnct,
+                                               p_err);
+    if (*p_err == NET_SECURE_ERR_NONE) {
+        *p_err =  NET_SOCK_ERR_NONE;
+         rtn_val = DEF_OK;
+    }
+
+    goto exit_release;
+
+
+exit_lock_fault:
+    rtn_val = DEF_FAIL;
+    goto exit;
+
+exit_fail:
+    rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+    goto exit;
+
+
+#else
+   (void)&sock_id;                                              /* Prevent 'variable unused' compiler warning.          */
+   (void)&call_back_fnct;
+
+    rtn_val = DEF_FAIL;
+
+   *p_err   = NET_ERR_FAULT_FEATURE_DIS;
+
+    goto exit;
+#endif
+
+exit:
+    return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_OptGet()
+*
+* Description : Get the specified socket option from the sock_id socket.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get option from.
+*
+*               level       Protocol level from which to retrieve the socket option.
+*
+*               opt_name    Socket option to get the   value.
+*
+*               p_opt_val    Pointer to a socket option value buffer.
+*
+*               p_opt_len    Pointer to a socket option value buffer length.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               No error.
+*
+*                               NET_SOCK_ERR_INVALID_OPT        Socket option not supported.
+*                               NET_SOCK_ERR_INVALID_ARG        One of the argument supplied is NULL or invalid.
+*                               NET_SOCK_ERR_INVALID_OPT_LEN    p_opt_len is not large enough for the return option value size.
+*                               NET_SOCK_ERR_INVALID_OPT_GET    An error occured while getting the socket option.
+*                               NET_SOCK_ERR_INVALID_OPT_LEVEL  The socket option is incompatible with the protocol argument.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE,    if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_OPT_GET, otherwise.
+*
+* Caller(s)   : getsockopt().
+*
+*                   This function is a network protocol suite application programming interface (API) function
+*                   & MAY be called by application function(s).
+*
+* Note(s)     : (1) The supported options are:
+*
+*                   (a) Level NET_SOCK_PROTOCOL_SOCK:
+*
+*                       Option name                     Returned data type    Option decription
+*                       ----------------------------    -------------------   ------------------
+*                       NET_SOCK_OPT_SOCK_TYPE          NET_SOCK_TYPE         Socket type:
+*                                                                                 NET_SOCK_TYPE_STREAM
+*                                                                                 NET_SOCK_TYPE_DATAGRAM
+*
+*                       NET_SOCK_OPT_SOCK_KEEP_ALIVE    CPU_BOOLEAN           Socket keep-alive status:
+*                                                                                 DEF_ENABLED
+*                                                                                 DEF_DISABLED
+*
+*                       NET_SOCK_OPT_SOCK_ACCEPT_CONN   CPU_BOOLEAN           Socket is in listen state:
+*                                                                                 DEF_YES
+*                                                                                 DEF_NO
+*
+*                       NET_SOCK_OPT_SOCK_TX_BUF_SIZE   NET_TCP_WIN_SIZE      TCP connection transmit windows size  value
+*                       NET_SOCK_OPT_SOCK_RX_BUF_SIZE   NET_TCP_WIN_SIZE      TCP connection receive  windows size  value
+*                       NET_SOCK_OPT_SOCK_TX_TIMEOUT    CPU_INT32U            TCP connection transmit queue timeout value
+*                       NET_SOCK_OPT_SOCK_RX_TIMEOUT    CPU_INT32U            TCP connection receive  queue timeout value
+*
+*                   (b) Level NET_SOCK_PROTOCOL_IP:
+*
+*                       Option name                     Returned data type    Option decription
+*                       -----------------------------   ------------------    ------------------
+*                       NET_SOCK_OPT_IP_TOS             NET_IPv4_TOS          TCP connection transmit IP TOS
+*                       NET_SOCK_OPT_IP_TTL             NET_IPv4_TTL          TCP connection transmit IP TTL
+*                       NET_SOCK_OPT_IP_RX_IF           NET_IF_NBR            Receive interface number
+*
+*                   (c) Level NET_SOCK_PROTOCOL_TCP:
+*
+*                       Option name                     Returned data type    Option decription
+*                       -----------------------------   ------------------    ------------------
+*                       NET_SOCK_OPT_TCP_NO_DELAY       CPU_BOOLEAN           TCP connection transmit Nagle algorithm status:
+*                                                                                 DEF_ENABLED
+*                                                                                 DEF_DISABLED
+*
+*                       NET_SOCK_OPT_TCP_KEEP_CNT       NET_PKT_CTR           TCP keep alive maximum probe value
+*                       NET_SOCK_OPT_TCP_KEEP_IDLE      NET_TCP_TIMEOUT_SEC   TCP keep alive timeout       value (in seconds)
+*                       NET_SOCK_OPT_TCP_KEEP_INTVL     NET_TCP_TIMEOUT_SEC   TCP keep alive probe re-transmit timeout
+*                                                                                                          value (in seconds)
+*********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSock_OptGet (NET_SOCK_ID         sock_id,
+                                   NET_SOCK_PROTOCOL   level,
+                                   NET_SOCK_OPT_NAME   opt_name,
+                                   void               *p_opt_val,
+                                   NET_SOCK_OPT_LEN   *p_opt_len,
+                                   NET_ERR            *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+   NET_IPv4_FLAGS      ip_flags;
+   NET_IPv4_TOS        ip_tos;
+   NET_IPv4_TTL        ip_ttl;
+   NET_SOCK_ADDR       net_sock_addr;
+#endif
+   NET_SOCK           *p_sock;
+   CPU_INT08U          addr_local[NET_CONN_ADDR_LEN_MAX];
+   NET_CONN_ADDR_LEN   addr_len;
+#ifdef  NET_TCP_MODULE_EN
+   NET_CONN_ID         conn_id;
+   NET_CONN_ID         conn_id_tcp;
+   NET_TCP_CONN       *p_conn;
+#endif
+   NET_SOCK_RTN_CODE   rtn_code;
+   NET_IF_NBR          if_nbr;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+  (void)NetSock_IsUsed(sock_id, p_err);                         /* -------------- VALIDATE SOCK ID USED --------------- */
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+   if (p_opt_val == (void *)0) {                                /* ------------ VALIDATE OPT VAL NULL PTR ------------- */
+      *p_err = NET_ERR_FAULT_NULL_PTR;
+       goto exit_lock_fault;
+   }
+
+   if (( p_opt_len == (void *)0)  ||                            /* ------------ VALIDATE OPT LEN NULL PTR ------------- */
+       (*p_opt_len ==         0)) {
+      *p_err = NET_ERR_FAULT_NULL_PTR;
+       goto exit_lock_fault;
+   }
+#endif
+
+                                                                /* -------------- VALIDATE OPTION LEVEL --------------- */
+   switch(opt_name) {
+       case NET_SOCK_OPT_IP_TOS:                                /* IP-level op.                                         */
+       case NET_SOCK_OPT_IP_TTL:
+       case NET_SOCK_OPT_IP_RX_IF:
+            if (level != NET_SOCK_PROTOCOL_IP) {
+               *p_err =  NET_SOCK_ERR_INVALID_OPT_LEVEL;
+                goto exit_lock_fault;                           /* Sock opt incompatible with protocol level.           */
+            }
+            break;
+
+
+       case NET_SOCK_OPT_TCP_NO_DELAY:                          /* TCP-level op.                                        */
+       case NET_SOCK_OPT_TCP_KEEP_CNT:
+       case NET_SOCK_OPT_TCP_KEEP_IDLE:
+       case NET_SOCK_OPT_TCP_KEEP_INTVL:
+            if (level != NET_SOCK_PROTOCOL_TCP) {
+               *p_err =  NET_SOCK_ERR_INVALID_OPT_LEVEL;
+                goto exit_lock_fault;                           /* Sock opt incompatible with protocol level.           */
+            }
+            break;
+
+
+       case NET_SOCK_OPT_SOCK_TYPE:                             /* Sock-level op.                                       */
+       case NET_SOCK_OPT_SOCK_TX_BUF_SIZE:
+       case NET_SOCK_OPT_SOCK_RX_BUF_SIZE:
+       case NET_SOCK_OPT_SOCK_TX_TIMEOUT:
+       case NET_SOCK_OPT_SOCK_RX_TIMEOUT:
+       case NET_SOCK_OPT_SOCK_ACCEPT_CONN:
+       case NET_SOCK_OPT_SOCK_KEEP_ALIVE:
+            if (level != NET_SOCK_PROTOCOL_SOCK) {
+               *p_err =  NET_SOCK_ERR_INVALID_OPT_LEVEL;
+                goto exit_lock_fault;                           /* Sock opt incompatible with protocol level.           */
+            }
+            break;
+
+
+       default:
+           *p_err =  NET_SOCK_ERR_INVALID_OPT;                  /* Sock opt not supported.                              */
+            goto exit_lock_fault;
+   }
+
+
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_OptGet, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch(opt_name) {
+                                                                /* ----------------- IP-LEVEL OPTIONS ----------------- */
+#ifdef  NET_IPv4_MODULE_EN
+       case NET_SOCK_OPT_IP_TOS:
+            if (*p_opt_len < (CPU_INT32S)sizeof(NET_IPv4_TOS)) {
+                *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                 break;
+            }
+
+           *p_opt_len = sizeof(NET_IPv4_TOS);
+
+            NetConn_IPv4TxParamsGet(p_sock->ID_Conn,            /* Get the conn's flags, TOS & TTL.                     */
+                                   &ip_flags,
+                                   &ip_tos,
+                                   &ip_ttl,
+                                    p_err);
+            if (*p_err != NET_CONN_ERR_NONE) {
+                *p_err = NET_SOCK_ERR_INVALID_OPT_GET;
+                 goto exit_err_opt_get;
+            }
+
+            Mem_Copy(             p_opt_val,
+                     (void     *)&ip_tos,
+                     (CPU_SIZE_T)*p_opt_len);
+
+           *p_err = NET_SOCK_ERR_NONE;
+            break;
+#endif
+#ifdef  NET_IPv4_MODULE_EN
+       case NET_SOCK_OPT_IP_TTL:
+            if (*p_opt_len < (CPU_INT32S)sizeof(NET_IPv4_TTL)) {
+                *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                 goto exit_err_opt_get;
+            }
+
+           *p_opt_len = sizeof(NET_IPv4_TTL);
+
+            NetConn_IPv4TxParamsGet(p_sock->ID_Conn,            /* Get the conn's flags, TOS & TTL.                     */
+                                   &ip_flags,
+                                   &ip_tos,
+                                   &ip_ttl,
+                                    p_err);
+
+            if (*p_err != NET_CONN_ERR_NONE) {
+                *p_err  = NET_SOCK_ERR_INVALID_OPT_GET;
+                 goto exit_err_opt_get;
+            }
+
+            Mem_Copy(             p_opt_val,
+                     (void     *)&ip_ttl,
+                     (CPU_SIZE_T)*p_opt_len);
+
+           *p_err = NET_SOCK_ERR_NONE;
+            break;
+#endif
+
+       case NET_SOCK_OPT_IP_RX_IF:
+            if (*p_opt_len < (CPU_INT32S)sizeof(NET_IF_NBR)) {
+                *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                 goto exit_err_opt_get;
+            }
+
+           *p_opt_len = sizeof(NET_IF_NBR);
+            addr_len = NET_CONN_ADDR_LEN_MAX;
+
+            NetConn_AddrLocalGet(p_sock->ID_Conn,               /* Get the local addr of the sock.                      */
+                                &addr_local[0],
+                                &addr_len,
+                                 p_err);
+            if (*p_err != NET_CONN_ERR_NONE) {
+                *p_err = NET_SOCK_ERR_INVALID_OPT_GET;
+                 goto exit_err_opt_get;
+            }
+
+#ifdef  NET_IPv4_MODULE_EN
+            net_sock_addr.AddrFamily = NET_SOCK_ADDR_FAMILY_IP_V4;
+
+            Mem_Copy((void     *)&net_sock_addr.Addr[0],
+                     (void     *)&addr_local[0],
+                     (CPU_SIZE_T) NET_CONN_ADDR_LEN_MAX);
+
+            addr_len = sizeof(NET_SOCK_ADDR);
+                                                                /* Get the IF corresponding to the net_sock_addr.       */
+
+           (void)NetSock_IsValidAddrLocal(                    NET_SOCK_PROTOCOL_FAMILY_IP_V4,
+                                                             &net_sock_addr,
+                                          (NET_SOCK_ADDR_LEN) addr_len,
+                                                             &if_nbr,
+                                                              p_err);
+#else
+           *p_err = NET_SOCK_ERR_INVALID_OPT_GET;
+#endif
+            if (*p_err != NET_SOCK_ERR_NONE) {
+                *p_err = NET_SOCK_ERR_INVALID_OPT_GET;
+                 goto exit_err_opt_get;
+            }
+
+            Mem_Copy(             p_opt_val,
+                     (void     *)&if_nbr,
+                     (CPU_SIZE_T)*p_opt_len);
+
+           *p_err = NET_SOCK_ERR_NONE;
+            break;
+
+#ifdef  NET_TCP_MODULE_EN
+       case NET_SOCK_OPT_TCP_NO_DELAY:                          /* ---------------- TCP-LEVEL OPTIONS ----------------- */
+            if (*p_opt_len < (CPU_INT32S)sizeof(CPU_BOOLEAN)) {
+                *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                 goto exit_err_opt_get;
+            }
+
+            conn_id     =  p_sock->ID_Conn;
+            conn_id_tcp =  NetConn_ID_TransportGet(conn_id, p_err);
+            p_conn       = &NetTCP_ConnTbl[conn_id_tcp];
+           *p_opt_len    =  sizeof(CPU_BOOLEAN);
+
+            Mem_Copy(             p_opt_val,
+                     (void     *)&p_conn->TxWinSizeNagleEn,
+                     (CPU_SIZE_T)*p_opt_len);
+
+           *p_err = NET_SOCK_ERR_NONE;
+            break;
+
+
+       case NET_SOCK_OPT_TCP_KEEP_CNT:
+            if (*p_opt_len < (CPU_INT32S)sizeof(NET_PKT_CTR)) {
+                *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                 goto exit_err_opt_get;
+            }
+
+            conn_id     =  p_sock->ID_Conn;
+            conn_id_tcp =  NetConn_ID_TransportGet(conn_id, p_err);
+            p_conn       = &NetTCP_ConnTbl[conn_id_tcp];
+           *p_opt_len    =  sizeof(NET_PKT_CTR);
+
+            Mem_Copy(             p_opt_val,
+                     (void     *)&p_conn->TxKeepAliveTh,
+                     (CPU_SIZE_T)*p_opt_len);
+
+           *p_err = NET_SOCK_ERR_NONE;
+            break;
+
+
+       case NET_SOCK_OPT_TCP_KEEP_IDLE:
+            if (*p_opt_len < (CPU_INT32S)sizeof(NET_TCP_TIMEOUT_SEC)) {
+                *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                 goto exit_err_opt_get;
+            }
+
+            conn_id     =  p_sock->ID_Conn;
+            conn_id_tcp =  NetConn_ID_TransportGet(conn_id, p_err);
+            p_conn       = &NetTCP_ConnTbl[conn_id_tcp];
+           *p_opt_len    =  sizeof(NET_TCP_TIMEOUT_SEC);
+
+            Mem_Copy(             p_opt_val,
+                     (void     *)&p_conn->TimeoutConn_sec,
+                     (CPU_SIZE_T)*p_opt_len);
+
+           *p_err = NET_SOCK_ERR_NONE;
+            break;
+
+
+       case NET_SOCK_OPT_TCP_KEEP_INTVL:
+            if (*p_opt_len < (CPU_INT32S)sizeof(NET_TCP_TIMEOUT_SEC)) {
+                *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                 goto exit_err_opt_get;
+            }
+
+            conn_id     =  p_sock->ID_Conn;
+            conn_id_tcp =  NetConn_ID_TransportGet(conn_id, p_err);
+            p_conn       = &NetTCP_ConnTbl[conn_id_tcp];
+           *p_opt_len    =  sizeof(NET_TCP_TIMEOUT_SEC);
+
+            Mem_Copy(             p_opt_val,
+                     (void     *)&p_conn->TxKeepAliveRetryTimeout_sec,
+                     (CPU_SIZE_T)*p_opt_len);
+
+           *p_err = NET_SOCK_ERR_NONE;
+            break;
+#endif
+
+       case NET_SOCK_OPT_SOCK_TYPE:                             /* ---------------- SOCK-LEVEL OPTIONS ---------------- */
+       case NET_SOCK_OPT_SOCK_TX_BUF_SIZE:
+       case NET_SOCK_OPT_SOCK_RX_BUF_SIZE:
+       case NET_SOCK_OPT_SOCK_TX_TIMEOUT:
+       case NET_SOCK_OPT_SOCK_RX_TIMEOUT:
+       case NET_SOCK_OPT_SOCK_ACCEPT_CONN:
+       case NET_SOCK_OPT_SOCK_KEEP_ALIVE:
+                                                                /* Get the sock-level opt.                              */
+           (void)NetSock_OpGetSock(p_sock,
+                                   opt_name,
+                                   p_opt_val,
+                                   p_opt_len,
+                                   p_err);
+            break;
+
+
+       default:
+           *p_err = NET_SOCK_ERR_INVALID_OPT;                   /* Invalid sock opt.                                    */
+            break;
+   }
+
+
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_err_opt_get;
+   }
+
+   rtn_code = NET_SOCK_BSD_ERR_NONE;
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (NET_SOCK_BSD_ERR_OPT_GET);
+
+exit_err_opt_get:
+   rtn_code = NET_SOCK_BSD_ERR_OPT_GET;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+   return (rtn_code);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_CfgConnChildQ_SizeSet()
+*
+* Description : (1) Configure socket's child connection queue size :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  connection child queue size                   See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to configure receive queue size.
+*
+*               queue_size  Desired child connection queue size :
+*
+*                               > 1                             Maximum       number of child connection that
+*                                                                       can be queued and accepted.
+*                               NET_SOCK_Q_SIZE_UNLIMITED       No limit, any number of child connection
+*                                                                       can be queued and accepted.
+*
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket receive queue size successfully
+*                                                                   configured.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE  Invalid socket receive queue size.
+*
+*                                                               ------- RETURNED BY NetSock_IsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ----- RETURNED BY NetTCP_ConnIsUsed() : ------
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid TCP connection receive window size.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -- RETURNED BY NetConn_ID_TransportGet() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket child connection queue size successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgConnChildQ_SizeSet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) NetSock_CfgConnChildQ_SizeSet() allows a listen socket to reject new incomming connection
+*                   when the number of connection already accepted ("currently being processed) plus the
+*                   listen queue reachs the maximum number of child connection.
+*
+*                   (a) It should be used when ressources such as number of received buffers are limited.
+*
+*                   (b) It doesn't remove any connection currently accepted. It becomes effective
+*                       for later connection request.
+*
+*               (4) (a) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgConnChildQ_SizeSet (NET_SOCK_ID       sock_id,
+                                            NET_SOCK_Q_SIZE   queue_size,
+                                            NET_ERR          *p_err)
+{
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   rtn;
+
+
+                                                                /* ------------ VALIDATE CHILD Q SIZE MAX ------------ */
+    if (queue_size <=  NET_SOCK_Q_SIZE_NONE) {
+       *p_err =  NET_SOCK_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgConnChildQ_SizeSet, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return (DEF_FAIL);
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_release_fail;
+    }
+#endif
+                                                                /* ---------- CFG SOCK CONN CHILD Q SIZE MAX ---------- */
+    p_sock = &NetSock_Tbl[sock_id];
+
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_DATAGRAM:
+            *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+             goto exit_release_fail;
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+             switch (p_sock->Protocol) {
+#ifdef  NET_TCP_MODULE_PRESENT
+                 case NET_SOCK_PROTOCOL_TCP:
+                      p_sock->ConnChildQ_SizeMax = queue_size;
+                      break;
+#endif
+                 case NET_SOCK_PROTOCOL_NONE:
+                 default:                                       /* See Note #4b.                                        */
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                     *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+                      goto exit_release_fail;
+             }
+             break;
+#endif
+
+
+        case NET_SOCK_TYPE_NONE:
+        case NET_SOCK_TYPE_FAULT:
+        default:                                                /* See Note #4a.                                        */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+            *p_err = NET_SOCK_ERR_INVALID_TYPE;
+             goto exit_release_fail;
+    }
+
+
+    rtn = DEF_OK;
+   *p_err = NET_SOCK_ERR_NONE;
+
+    goto exit_release;
+
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+exit_release_fail:
+    rtn = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_CfgConnChildQ_SizeGet()
+*
+* Description : (1) Get socket's connection child queue size value :
+*
+*                   (a) Acquire  network lock                                           See Note #3
+*                   (b) Validate socket  used
+*                   (c) Get      socket  connection child queue
+*                   (d) Release  network lock
+*                   (e) Return   socket  connection child queue
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to configure receive queue size.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket receive queue size successfully
+*                                                                   configured.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE  Invalid socket receive queue size.
+*
+*                                                               ------- RETURNED BY NetSock_IsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ----- RETURNED BY NetTCP_ConnIsUsed() : ------
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid TCP connection receive window size.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -- RETURNED BY NetConn_ID_TransportGet() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Socket's connection child queue size value :
+*
+*                   NET_SOCK_Q_SIZE_NONE,        on any error(s).
+*
+*                   NET_SOCK_Q_SIZE_UNLIMITED,   if unlimited (i.e. NO limit) value configured.
+*
+*                   child connection queue size, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) Despite inconsistency with other 'Get' status functions,
+*                   NetSock_CfgConnChildQ_SizeGet() includes 'Cfg' for consistency with other
+*                   NetSock_CfgConn&&&() functions.
+*
+*               (3) NetSock_CfgConnChildQ_SizeGet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (4) (a) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+NET_SOCK_Q_SIZE  NetSock_CfgConnChildQ_SizeGet (NET_SOCK_ID   sock_id,
+                                                NET_ERR      *p_err)
+{
+    NET_SOCK         *p_sock;
+    NET_SOCK_Q_SIZE   queue_size;
+
+
+                                                                /* ---------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgConnChildQ_SizeGet,
+                           p_err);
+    if (*p_err != NET_ERR_NONE) {
+         return (NET_SOCK_Q_SIZE_NONE);
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_release_fail;
+    }
+#endif
+                                                                /* ----------- GET SOCK CONN CHILD Q SIZE ------------ */
+    p_sock = &NetSock_Tbl[sock_id];
+
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_DATAGRAM:
+            *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+             goto exit_release_fail;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+             switch (p_sock->Protocol) {
+#ifdef  NET_TCP_MODULE_PRESENT
+                 case NET_SOCK_PROTOCOL_TCP:
+                      queue_size = p_sock->ConnChildQ_SizeMax;
+                      break;
+#endif
+                 case NET_SOCK_PROTOCOL_NONE:
+                 default:                                       /* See Note #4b.                                        */
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                     *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+                      goto exit_release_fail;
+             }
+             break;
+#endif
+
+
+        case NET_SOCK_TYPE_NONE:
+        case NET_SOCK_TYPE_FAULT:
+        default:                                                /* See Note #4a.                                        */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+            *p_err = NET_SOCK_ERR_INVALID_TYPE;
+             goto exit_release_fail;
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+    goto exit_release;
+
+
+exit_release_fail:
+    queue_size = NET_SOCK_Q_SIZE_NONE;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+    return (queue_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetSock_CfgRxQ_Size()
+*
+* Description : (1) Configure socket's receive queue size :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  receive queue size                            See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to configure receive queue size.
+*
+*               size        Desired receive queue size.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket receive queue size successfully
+*                                                                   configured.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE  Invalid socket receive queue size.
+*
+*                                                               ------- RETURNED BY NetSock_IsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ----- RETURNED BY NetTCP_ConnIsUsed() : ------
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid TCP connection receive window size.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -- RETURNED BY NetConn_ID_TransportGet() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket receive queue size successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgRxQ_Size() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) IEEE Std 1003.1, 2004 Edition, Section 'setsockopt() : DESCRIPTION' states that
+*                   "SO_RCVBUF ... sets receive buffer size ... socket option" :
+*
+*                   (a) For datagram sockets, configured size does NOT :
+*
+*                       (1) Limit or remove    any received data currently queued but becomes effective
+*                           for later received data.
+*                       (2) Partially truncate any received data but instead allows data from exactly one
+*                           received packet buffer to overflow the configured size since each datagram
+*                           MUST be received atomically (see 'NetSock_RxDataFrom()  Note #3a1A').
+*
+*                   (b) For stream   sockets, size MAY be required to be configured prior to connecting.
+*
+*                       See also 'NetTCP_ConnCfgRxWinSizeHandler()  Note #3a'.
+*
+*               (4) (a) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgRxQ_Size (NET_SOCK_ID          sock_id,
+                                  NET_SOCK_DATA_SIZE   size,
+                                  NET_ERR             *p_err)
+{
+    NET_SOCK     *p_sock;
+    NET_CONN_ID   conn_id;
+    NET_CONN_ID   conn_id_transport;
+    CPU_BOOLEAN   rtn_val;
+    NET_ERR       err;
+
+
+                                                                /* ---------------- VALIDATE RX Q SIZE ---------------- */
+   if (size  < NET_SOCK_DATA_SIZE_MIN) {
+      *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+       goto exit_lock_fault;
+   }
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgRxQ_Size, p_err);  /* See Note #2b.                                        */
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* ---------------- CFG SOCK RX Q SIZE ---------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->SockType) {
+       case NET_SOCK_TYPE_DATAGRAM:
+            p_sock->RxQ_SizeCfgd = size;
+           *p_err                = NET_SOCK_ERR_NONE;
+            break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+       case NET_SOCK_TYPE_STREAM:
+            switch (p_sock->Protocol) {
+#ifdef  NET_IPv4_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+                case NET_SOCK_PROTOCOL_TCP:
+                     conn_id = p_sock->ID_Conn;
+
+                     if (conn_id != NET_CONN_ID_NONE) {
+                         conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+                         if (*p_err != NET_CONN_ERR_NONE) {
+                              goto exit_fail;
+                         }
+
+                        (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                                                 p_err);
+                         if (*p_err != NET_TCP_ERR_NONE) {
+                              goto exit_fail;
+                         }
+
+                         NetTCP_ConnCfgRxWinSizeHandler((NET_TCP_CONN_ID )conn_id_transport,
+                                                                          size,
+                                                                         &err);
+                        *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE : err;
+                     } else {
+                         p_sock->RxQ_SizeCfgd = size;
+                        *p_err                = NET_SOCK_ERR_NONE;
+                     }
+                     break;
+#endif
+#endif
+                case NET_SOCK_PROTOCOL_NONE:
+                default:                                        /* See Note #4b.                                        */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                    *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+                     goto exit_fail;
+            }
+            break;
+#endif
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       default:                                                 /* See Note #4a.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fail;
+   }
+
+
+  (void)&conn_id;                                               /* Prevent possible 'variable unused' warnings.         */
+  (void)&conn_id_transport;
+  (void)&err;
+
+
+   rtn_val = DEF_OK;
+   goto exit_release;
+
+
+exit_lock_fault:
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                              /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+   return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetSock_CfgTxQ_Size()
+*
+* Description : (1) Configure socket's transmit queue size :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  transmit queue size                           See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to configure transmit queue size.
+*
+*               size        Desired transmit queue size.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket transmit queue size successfully
+*                                                                   configured.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE  Invalid socket receive queue size.
+*
+*                                                               ------- RETURNED BY NetSock_IsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ----- RETURNED BY NetTCP_ConnIsUsed() : ------
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid TCP connection receive window size.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -- RETURNED BY NetConn_ID_TransportGet() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket transmit queue size successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTxQ_Size() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) IEEE Std 1003.1, 2004 Edition, Section 'setsockopt() : DESCRIPTION' states that
+*                   "SO_SNDBUF ... sets send buffer size ... socket option" :
+*
+*                   (a) For datagram sockets, configured size does NOT :
+*
+*                       (2) Partially truncate any received data but instead allows data from exactly one
+*                           received packet buffer to overflow the configured size since each datagram
+*                           MUST be received atomically (see 'NetSock_RxDataFrom()  Note #3a1A').
+*
+*                   (b) For stream   sockets, size MAY be required to be configured prior to connecting.
+*
+*                       See also 'NetTCP_ConnCfgRxWinSizeHandler()  Note #3a'.
+*
+*               (4) (a) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgTxQ_Size (NET_SOCK_ID          sock_id,
+                                  NET_SOCK_DATA_SIZE   size,
+                                  NET_ERR             *p_err)
+{
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+   NET_CONN_ID   conn_id_transport;
+   CPU_BOOLEAN   rtn_val;
+   NET_ERR       err;
+
+
+                                                                /* ---------------- VALIDATE TX Q SIZE ---------------- */
+   if (size <  NET_SOCK_DATA_SIZE_MIN) {
+      *p_err =  NET_SOCK_ERR_INVALID_DATA_SIZE;
+       return (DEF_FAIL);
+   }
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTxQ_Size, p_err);  /* See Note #2b.                                        */
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* ---------------- CFG SOCK TX Q SIZE ---------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->SockType) {
+       case NET_SOCK_TYPE_DATAGRAM:
+            p_sock->TxQ_SizeCfgd = size;
+           *p_err                = NET_SOCK_ERR_NONE;
+            break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+       case NET_SOCK_TYPE_STREAM:
+            switch (p_sock->Protocol) {
+#ifdef  NET_IPv4_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+                case NET_SOCK_PROTOCOL_TCP:
+                     conn_id = p_sock->ID_Conn;
+
+                     if (conn_id != NET_CONN_ID_NONE) {
+                         conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+                         if (*p_err != NET_CONN_ERR_NONE) {
+                              goto exit_fail;
+                         }
+
+                        (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                                (NET_ERR       *)p_err);
+                         if (*p_err != NET_TCP_ERR_NONE) {
+                              goto exit_fail;
+                         }
+
+                         NetTCP_ConnCfgTxWinSizeHandler((NET_TCP_CONN_ID ) conn_id_transport,
+                                                        (NET_TCP_WIN_SIZE) size,
+                                                        (NET_ERR        *)&err);
+                        *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE : err;
+                     } else {
+                         p_sock->TxQ_SizeCfgd = size;
+                        *p_err                = NET_SOCK_ERR_NONE;
+                     }
+                     break;
+#endif
+#endif
+                case NET_SOCK_PROTOCOL_NONE:
+                default:                                        /* See Note #4b.                                        */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                    *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+                     goto exit_fail;
+            }
+            break;
+#endif
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       default:                                                 /* See Note #4a.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fail;
+   }
+
+
+  (void)&conn_id;                                               /* Prevent possible 'variable unused' warnings.         */
+  (void)&conn_id_transport;
+  (void)&err;
+
+   rtn_val = DEF_OK;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+   return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetSock_CfgTxIP_TOS()
+*
+* Description : (1) Configure socket's transmit IP TOS :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  transmit IP TOS                               See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to configure transmit IP TOS.
+*
+*               ip_tos      Desired transmit IP TOS (see Note #3).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket transmit IP TOS successfully configured.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*
+*                                                               ------- RETURNED BY NetSock_IsUsed() : --------
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*
+*                                                               ---- RETURNED BY NetConn_IP_TxTOS_Set() : -----
+*                               NET_CONN_ERR_INVALID_ARG        Invalid IP TOS argument.
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket transmit IP TOS successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTxIP_TOS() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) (a) RFC #1122, Section 4.1.4 states that "an application-layer program MUST be
+*                       able to set the ... [IP] TOS ... for sending a ... datagram, [which] must
+*                       be passed transparently to the IP layer".
+*
+*                   (b) RFC #1122, Section 4.2.4.2 reiterates that :
+*
+*                       (1) "The application layer MUST be able to specify the [IP] Type-of-Service
+*                            (TOS) for [packets] that are sent on a connection."
+*
+*                       (2) "It not required [sic], but the application SHOULD be able to change
+*                            the [IP] TOS during the connection lifetime."
+*
+*                   See also 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES'.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+CPU_BOOLEAN  NetSock_CfgTxIP_TOS (NET_SOCK_ID   sock_id,
+                                  NET_IPv4_TOS  ip_tos,
+                                  NET_ERR      *p_err)
+{
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+   CPU_BOOLEAN   rtn_val;
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTxIP_TOS, p_err);  /* See Note #2b.                                        */
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->State) {
+       case NET_SOCK_STATE_FREE:
+       case NET_SOCK_STATE_DISCARD:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+           *p_err =  NET_SOCK_ERR_NOT_USED;
+            goto exit_fail;
+
+
+       case NET_SOCK_STATE_BOUND:
+       case NET_SOCK_STATE_LISTEN:
+       case NET_SOCK_STATE_CONN:
+       case NET_SOCK_STATE_CONN_IN_PROGRESS:
+       case NET_SOCK_STATE_CONN_DONE:
+            break;
+
+
+       case NET_SOCK_STATE_CLOSED:
+       case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+       case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+       case NET_SOCK_STATE_CLOSED_FAULT:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_OP;
+            goto exit_fail;
+
+
+       case NET_SOCK_STATE_NONE:
+       default:
+            NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_STATE;
+            goto exit_fail;
+   }
+
+
+                                                                /* ---------------- CFG SOCK TX IP TOS ---------------- */
+   conn_id = p_sock->ID_Conn;
+   NetConn_IPv4TxTOS_Set(conn_id, ip_tos, p_err);
+   if (*p_err != NET_CONN_ERR_NONE) {
+        goto exit_fail;
+   }
+
+
+
+  *p_err   = NET_SOCK_ERR_NONE;
+   rtn_val = DEF_OK;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+   return (rtn_val);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetSock_CfgTxIP_TTL()
+*
+* Description : (1) Configure socket's transmit IP TTL :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  transmit IP TTL                               See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to configure transmit IP TTL.
+*
+*               ip_ttl      Desired transmit IP TTL (see Note #3) :
+*
+*                               NET_IPv4_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IPv4_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IPv4_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IPv4_TTL_NONE                 Replace with default TTL
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket transmit IP TTL successfully configured.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*
+*                                                               ------- RETURNED BY NetSock_IsUsed() : --------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*
+*                                                               ---- RETURNED BY NetConn_IP_TxTTL_Set() : -----
+*                               NET_CONN_ERR_INVALID_ARG        Invalid IP TTL argument.
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket transmit IP TTL successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTxIP_TTL() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) (a) RFC #1122, Section 4.1.4 states that "an application-layer program MUST
+*                       be able to set the [IP] TTL ... for sending a ... datagram, [which] must
+*                       be passed transparently to the IP layer".
+*
+*                   (b) RFC #1122, Section 4.2.2.19 reiterates that "the [IP] TTL value used to
+*                       send ... [packets] MUST be configurable".
+*
+*                   See also 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+CPU_BOOLEAN  NetSock_CfgTxIP_TTL (NET_SOCK_ID   sock_id,
+                                  NET_IPv4_TTL  ip_ttl,
+                                  NET_ERR      *p_err)
+{
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+   CPU_BOOLEAN   rtn_val;
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTxIP_TTL, p_err);  /* See Note #2b.                                        */
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->State) {
+       case NET_SOCK_STATE_FREE:
+       case NET_SOCK_STATE_DISCARD:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+           *p_err =  NET_SOCK_ERR_NOT_USED;
+            goto exit_fail;
+
+
+       case NET_SOCK_STATE_BOUND:
+       case NET_SOCK_STATE_LISTEN:
+       case NET_SOCK_STATE_CONN:
+       case NET_SOCK_STATE_CONN_IN_PROGRESS:
+       case NET_SOCK_STATE_CONN_DONE:
+            break;
+
+
+       case NET_SOCK_STATE_CLOSED:
+       case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+       case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+       case NET_SOCK_STATE_CLOSED_FAULT:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_OP;
+            goto exit_fail;
+
+
+       case NET_SOCK_STATE_NONE:
+       default:
+            NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_STATE;
+            goto exit_fail;
+   }
+
+
+                                                                /* ---------------- CFG SOCK TX IP TTL ---------------- */
+   conn_id = p_sock->ID_Conn;
+   NetConn_IPv4TxTTL_Set(conn_id, ip_ttl, p_err);
+   if (*p_err != NET_CONN_ERR_NONE) {
+        goto exit_fail;
+   }
+
+
+
+   rtn_val = DEF_OK;
+  *p_err   = NET_SOCK_ERR_NONE;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+   return (rtn_val);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_CfgTxIP_TTL_Multicast()
+*
+* Description : (1) Configure socket's    transmit IP multicast TTL :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  transmit IP multicast TTL                     See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to configure transmit IP multicast TTL.
+*
+*               ip_ttl      Desired transmit IP multicast TTL (see Note #3) :
+*
+*                               NET_IPv4_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IPv4_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IPv4_TTL_DFLT                 Default TTL transmit value   (1)
+*                               NET_IPv4_TTL_NONE                 Replace with default TTL
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket transmit IP multicast TTL successfully
+*                                                                   configured.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_ERR_FAULT_FEATURE_DIS            Disabled API function.
+*
+*                                                               -------- RETURNED BY NetSock_IsUsed() : ---------
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*
+*                                                               - RETURNED BY NetConn_IP_TxTTL_MulticastSet() : -
+*                               NET_CONN_ERR_INVALID_ARG        Invalid IP TTL argument.
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               ----- RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket transmit IP multicast TTL successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTxIP_TTL_Multicast() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) RFC #1112, Section 6.1 states that "the service interface should provide a way for the
+*                   upper-layer protocol to specify the IP time-to-live of an outgoing multicast datagram".
+*
+*                   See also 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES'.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+CPU_BOOLEAN  NetSock_CfgTxIP_TTL_Multicast (NET_SOCK_ID   sock_id,
+                                            NET_IPv4_TTL  ip_ttl,
+                                            NET_ERR      *p_err)
+{
+   CPU_BOOLEAN   rtn_val;
+#ifdef  NET_MCAST_TX_MODULE_EN
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTxIP_TTL_Multicast, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->State) {
+       case NET_SOCK_STATE_FREE:
+       case NET_SOCK_STATE_DISCARD:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+           *p_err =  NET_SOCK_ERR_NOT_USED;
+            goto exit_fail;
+
+
+       case NET_SOCK_STATE_BOUND:
+       case NET_SOCK_STATE_LISTEN:
+       case NET_SOCK_STATE_CONN:
+       case NET_SOCK_STATE_CONN_IN_PROGRESS:
+       case NET_SOCK_STATE_CONN_DONE:
+            break;
+
+
+       case NET_SOCK_STATE_CLOSED:
+       case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+       case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+       case NET_SOCK_STATE_CLOSED_FAULT:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_OP;
+            goto exit_fail;
+
+
+       case NET_SOCK_STATE_NONE:
+       default:
+            NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_STATE;
+            goto exit_fail;
+   }
+
+
+                                                                /* ----------- CFG SOCK TX IP MULTICAST TTL ----------- */
+   conn_id = p_sock->ID_Conn;
+   NetConn_IPv4TxTTL_MulticastSet(conn_id, ip_ttl, p_err);
+   if (*p_err != NET_CONN_ERR_NONE) {
+        goto exit_fail;
+   }
+
+
+   rtn_val = DEF_OK;
+  *p_err   = NET_SOCK_ERR_NONE;
+
+   goto exit_release;
+
+
+#else
+  (void)&sock_id;                                               /* Prevent 'variable unused' compiler warning.          */
+  (void)&ip_ttl;
+
+  *p_err =  NET_ERR_FAULT_FEATURE_DIS;
+
+   goto exit_lock_fault;
+#endif
+
+exit_lock_fault:
+   rtn_val = DEF_FAIL;
+   goto exit;
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+   goto exit;
+#endif
+
+exit:
+   return (rtn_val);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_CfgTimeoutRxQ_Dflt()
+*
+* Description : (1) Set socket's receive queue configured-default timeout value :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  receive queue default timeout
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set receive queue configured-
+*                               default timeout.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*
+*                                                               -- RETURNED BY NetSock_RxQ_TimeoutDflt() : ---
+*                                                               -- RETURNED BY NetTCP_RxQ_TimeoutDflt() : ----
+*                               NET_SOCK_ERR_NONE               Socket receive queue configured-default
+*                                                                   timeout successfully set.
+*
+*                                                               ------- RETURNED BY NetSock_IsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ----- RETURNED BY NetTCP_ConnIsUsed() : ------
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -- RETURNED BY NetConn_ID_TransportGet() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket receive queue configured-default timeout successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTimeoutRxQ_Dflt() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_RxQ_TimeoutDflt()  Note #2'
+*                          & 'NetTCP_RxQ_TimeoutDflt()   Note #1'.
+*
+*               (3) Configured timeout does NOT reschedule any current socket receive queue timeout in
+*                   progress but becomes effective the next time a socket pends on its receive queue
+*                   with timeout.
+*
+*               (4) (a) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgTimeoutRxQ_Dflt (NET_SOCK_ID   sock_id,
+                                         NET_ERR      *p_err)
+{
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+   NET_CONN_ID   conn_id_transport;
+   CPU_BOOLEAN   rtn_val;
+   NET_ERR       err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutRxQ_Dflt, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* ------------ CFG SOCK RX Q DFLT TIMEOUT ------------ */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->SockType) {
+       case NET_SOCK_TYPE_DATAGRAM:
+            NetSock_RxQ_TimeoutDflt(p_sock, p_err);
+            break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+       case NET_SOCK_TYPE_STREAM:
+            switch (p_sock->Protocol) {
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+                case NET_SOCK_PROTOCOL_TCP:
+                     conn_id           = p_sock->ID_Conn;
+                     conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+                     if (*p_err != NET_CONN_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                    (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                                             p_err);
+                     if (*p_err != NET_TCP_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                     NetTCP_RxQ_TimeoutDflt((NET_TCP_CONN_ID)conn_id_transport,
+                                                            &err);
+                    *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE : err;
+                     break;
+#endif
+#endif
+                case NET_SOCK_PROTOCOL_NONE:
+                default:                                        /* See Note #4b.                                        */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                    *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+                     goto exit_fail;
+            }
+            break;
+#endif
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       default:                                                 /* See Note #4a.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err = NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fail;
+   }
+
+
+  (void)&conn_id;                                               /* Prevent possible 'variable unused' warnings.         */
+  (void)&conn_id_transport;
+  (void)&err;
+
+
+   rtn_val = DEF_OK;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+   return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_CfgTimeoutRxQ_Set()
+*
+* Description : (1) Set socket's receive queue timeout value :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  receive queue timeout
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to set receive queue timeout.
+*
+*               timeout_ms      Desired timeout value :
+*
+*                                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value desired.
+*
+*                                   In number of milliseconds, otherwise.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*
+*                                                               ---- RETURNED BY NetSock_RxQ_TimeoutSet() : --
+*                                                               ---- RETURNED BY NetTCP_RxQ_TimeoutSet() : ---
+*                               NET_SOCK_ERR_NONE               Socket receive queue timeout successfully set.
+*
+*                                                               ------- RETURNED BY NetSock_IsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ----- RETURNED BY NetTCP_ConnIsUsed() : ------
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -- RETURNED BY NetConn_ID_TransportGet() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket receive queue timeout successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTimeoutRxQ_Set() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_RxQ_TimeoutSet()  Note #2'
+*                          & 'NetTCP_RxQ_TimeoutSet()   Note #1'.
+*
+*               (3) Configured timeout does NOT reschedule any current socket receive queue timeout in
+*                   progress but becomes effective the next time a socket pends on its receive queue
+*                   with timeout.
+*
+*               (4) (a) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgTimeoutRxQ_Set (NET_SOCK_ID   sock_id,
+                                        CPU_INT32U    timeout_ms,
+                                        NET_ERR      *p_err)
+{
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+   NET_CONN_ID   conn_id_transport;
+   CPU_BOOLEAN   rtn_val;
+   NET_ERR       err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutRxQ_Set, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* -------------- CFG SOCK RX Q TIMEOUT --------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->SockType) {
+       case NET_SOCK_TYPE_DATAGRAM:
+            NetSock_RxQ_TimeoutSet(p_sock, timeout_ms, p_err);
+            break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+       case NET_SOCK_TYPE_STREAM:
+            switch (p_sock->Protocol) {
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+                case NET_SOCK_PROTOCOL_TCP:
+                     conn_id           = p_sock->ID_Conn;
+                     conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+                     if (*p_err != NET_CONN_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                    (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                                             p_err);
+                     if (*p_err != NET_TCP_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                     NetTCP_RxQ_TimeoutSet((NET_TCP_CONN_ID)conn_id_transport,
+                                                            timeout_ms,
+                                                           &err);
+                    *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE : err;
+                     break;
+#endif
+#endif
+                case NET_SOCK_PROTOCOL_NONE:
+                default:                                        /* See Note #4b.                                        */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                    *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+                     goto exit_fail;
+            }
+            break;
+#endif
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       default:                                                 /* See Note #4a.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fail;
+   }
+
+
+  (void)&conn_id;                                               /* Prevent possible 'variable unused' warnings.         */
+  (void)&conn_id_transport;
+  (void)&err;
+
+
+   rtn_val = DEF_OK;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+   return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_CfgTimeoutRxQ_Get_ms()
+*
+* Description : (1) Get socket's receive queue timeout value :
+*
+*                   (a) Acquire  network lock                                           See Note #3
+*                   (b) Validate socket  used
+*                   (c) Get      socket  receive queue timeout
+*                   (d) Release  network lock
+*                   (e) Return   socket  receive queue timeout
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get receive queue timeout.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*
+*                                                               ---- RETURNED BY NetSock_RxQ_TimeoutGet_ms() : ----
+*                                                               ---- RETURNED BY NetTCP_RxQ_TimeoutGet_ms() : -----
+*                               NET_SOCK_ERR_NONE               Socket receive queue timeout successfully returned.
+*
+*                                                               --------- RETURNED BY NetSock_IsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               -------- RETURNED BY NetTCP_ConnIsUsed() : --------
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               ----- RETURNED BY NetConn_ID_TransportGet() : -----
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               ------- RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Socket's receive queue network timeout value :
+*
+*                   0,                         on any error(s).
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #3].
+*
+* Note(s)     : (2) Despite inconsistency with other 'Get' status functions,
+*                   NetSock_CfgTimeoutRxQ_Get_ms() includes 'Cfg' for consistency with other
+*                   NetSock_CfgTimeout&&&() functions.
+*
+*               (3) NetSock_CfgTimeoutRxQ_Get_ms() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_RxQ_TimeoutGet_ms()  Note #2'
+*                          & 'NetTCP_RxQ_TimeoutGet_ms()   Note #1'.
+*
+*               (4) (a) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetSock_CfgTimeoutRxQ_Get_ms (NET_SOCK_ID   sock_id,
+                                          NET_ERR      *p_err)
+{
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+   NET_CONN_ID   conn_id_transport;
+   NET_ERR       err;
+   CPU_INT32U    timeout_ms;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION((CPU_INT32U)0);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutRxQ_Get_ms, /* See Note #3b.                                        */
+                          p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* -------------- GET SOCK RX Q TIMEOUT --------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->SockType) {
+       case NET_SOCK_TYPE_DATAGRAM:
+            timeout_ms = NetSock_RxQ_TimeoutGet_ms(p_sock, p_err);
+            break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+       case NET_SOCK_TYPE_STREAM:
+            switch (p_sock->Protocol) {
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+                case NET_SOCK_PROTOCOL_TCP:
+                     conn_id           = p_sock->ID_Conn;
+                     conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+                     if (*p_err != NET_CONN_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                    (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                            (NET_ERR       *)p_err);
+                     if (*p_err != NET_TCP_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                     timeout_ms = NetTCP_RxQ_TimeoutGet_ms((NET_TCP_CONN_ID)conn_id_transport,
+                                                                           &err);
+                    *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE : err;
+                     break;
+#endif
+#endif
+                case NET_SOCK_PROTOCOL_NONE:
+                default:                                        /* See Note #4b.                                        */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                    *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+                     goto exit_fail;
+            }
+            break;
+#endif
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       default:                                                 /* See Note #4a.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fail;
+   }
+
+
+  (void)&conn_id;                                               /* Prevent possible 'variable unused' warnings.         */
+  (void)&conn_id_transport;
+  (void)&err;
+
+  goto exit_release;
+
+
+exit_lock_fault:
+   return (0u);
+
+exit_fail:
+   timeout_ms = 0u;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+   return (timeout_ms);                                         /* -------------- RTN SOCK RX Q TIMEOUT --------------- */
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_CfgTimeoutTxQ_Dflt()
+*
+* Description : (1) Set socket's transmit queue configured-default timeout value :
+*
+*                   (a) Acquire   network lock                                          See Note #3
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  transmit queue default timeout
+*                   (d) Release   network lock
+*
+*               (2) Socket transmit queues apply to the following socket type(s)/protocol(s) :
+*
+*                   (a) Stream
+*                       (1) TCP
+*
+*                   (b) Datagram sockets currently NOT blocked during transmit
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set transmit queue configured-
+*                               default timeout.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*
+*                                                               - RETURNED BY NetTCP_TxQ_TimeoutDflt() : -
+*                               NET_SOCK_ERR_NONE               Socket transmit queue configured-default
+*                                                                   timeout successfully set.
+*
+*                                                               ------ RETURNED BY NetSock_IsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ----- RETURNED BY NetTCP_ConnIsUsed() : -----
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -- RETURNED BY NetConn_ID_TransportGet() : --
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket transmit queue configured-default timeout successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #3].
+*
+* Note(s)     : (3) NetSock_CfgTimeoutTxQ_Dflt() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (4) Configured timeout does NOT reschedule any current socket transmit queue timeout in
+*                   progress but becomes effective the next time a socket pends on its transmit queue
+*                   with timeout.
+*
+*               (5) (a) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgTimeoutTxQ_Dflt (NET_SOCK_ID   sock_id,
+                                         NET_ERR      *p_err)
+{
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+   NET_CONN_ID   conn_id_transport;
+   CPU_BOOLEAN   rtn_val;
+   NET_ERR       err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #3b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutTxQ_Dflt, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* ------------ CFG SOCK TX Q DFLT TIMEOUT ------------ */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->SockType) {
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+       case NET_SOCK_TYPE_STREAM:
+            switch (p_sock->Protocol) {
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+                case NET_SOCK_PROTOCOL_TCP:
+                     conn_id           = p_sock->ID_Conn;
+                     conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+                     if (*p_err != NET_CONN_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                    (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                                             p_err);
+                     if (*p_err != NET_TCP_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                     NetTCP_TxQ_TimeoutDflt((NET_TCP_CONN_ID)conn_id_transport,
+                                                            &err);
+                    *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE : err;
+                     break;
+#endif
+#endif
+                case NET_SOCK_PROTOCOL_NONE:
+                default:                                        /* See Note #5b.                                        */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                    *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+                     goto exit_fail;
+            }
+            break;
+#endif
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       case NET_SOCK_TYPE_DATAGRAM:                             /* See Note #2b.                                        */
+       default:                                                 /* See Note #5a.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err = NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fail;
+   }
+
+
+  (void)&conn_id;                                               /* Prevent possible 'variable unused' warnings.         */
+  (void)&conn_id_transport;
+  (void)&err;
+
+
+   rtn_val = DEF_OK;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+   return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_CfgTimeoutTxQ_Set()
+*
+* Description : (1) Set socket's transmit queue timeout value :
+*
+*                   (a) Acquire   network lock                                          See Note #3
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  transmit queue timeout
+*                   (d) Release   network lock
+*
+*               (2) Socket transmit queues apply to the following socket type(s)/protocol(s) :
+*
+*                   (a) Stream
+*                       (1) TCP
+*
+*                   (b) Datagram sockets currently NOT blocked during transmit
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to set transmit queue timeout.
+*
+*               timeout_ms      Desired timeout value :
+*
+*                                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value desired.
+*
+*                                   In number of milliseconds, otherwise.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*
+*                                                               ---- RETURNED BY NetTCP_TxQ_TimeoutSet() : ----
+*                               NET_SOCK_ERR_NONE               Socket transmit queue timeout successfully set.
+*
+*                                                               ------- RETURNED BY NetSock_IsUsed() : --------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ------ RETURNED BY NetTCP_ConnIsUsed() : ------
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               --- RETURNED BY NetConn_ID_TransportGet() : ---
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket transmit queue timeout successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #3].
+*
+* Note(s)     : (3) NetSock_CfgTimeoutTxQ_Set() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_TxQ_TimeoutSet()  Note #1'.
+*
+*               (4) Configured timeout does NOT reschedule any current socket transmit queue timeout in
+*                   progress but becomes effective the next time a socket pends on its transmit queue
+*                   with timeout.
+*
+*               (5) (a) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgTimeoutTxQ_Set (NET_SOCK_ID   sock_id,
+                                        CPU_INT32U    timeout_ms,
+                                        NET_ERR      *p_err)
+{
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+   NET_CONN_ID   conn_id_transport;
+   CPU_BOOLEAN   rtn_val;
+   NET_ERR       err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+     CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #3b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutTxQ_Set, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* -------------- CFG SOCK TX Q TIMEOUT --------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->SockType) {
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+       case NET_SOCK_TYPE_STREAM:
+            switch (p_sock->Protocol) {
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+                case NET_SOCK_PROTOCOL_TCP:
+                     conn_id           = p_sock->ID_Conn;
+                     conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+                     if (*p_err != NET_CONN_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                    (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                            (NET_ERR       *)p_err);
+                     if (*p_err != NET_TCP_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                     NetTCP_TxQ_TimeoutSet((NET_TCP_CONN_ID)conn_id_transport,
+                                                            timeout_ms,
+                                                           &err);
+                    *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE : err;
+                     break;
+#endif
+#endif
+                case NET_SOCK_PROTOCOL_NONE:
+                default:                                        /* See Note #5b.                                        */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                    *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+                     goto exit_fail;
+            }
+            break;
+#endif
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       case NET_SOCK_TYPE_DATAGRAM:                             /* See Note #2b.                                        */
+       default:                                                 /* See Note #5a.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err = NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fail;
+   }
+
+
+  (void)&conn_id;                                               /* Prevent possible 'variable unused' warnings.         */
+  (void)&conn_id_transport;
+  (void)&err;
+  (void)&timeout_ms;
+
+
+   rtn_val = DEF_OK;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+   return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_CfgTimeoutTxQ_Get_ms()
+*
+* Description : (1) Get socket's transmit queue timeout value :
+*
+*                   (a) Acquire  network lock                                           See Note #4
+*                   (b) Validate socket  used
+*                   (c) Get      socket  transmit queue timeout
+*                   (d) Release  network lock
+*                   (e) Return   socket  transmit queue timeout
+*
+*               (2) Socket transmit queues apply to the following socket type(s)/protocol(s) :
+*
+*                   (a) Stream
+*                       (1) TCP
+*
+*                   (b) Datagram sockets currently NOT blocked during transmit
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get transmit queue timeout.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*
+*                                                               ---- RETURNED BY NetSock_RxQ_TimeoutGet_ms() : ----
+*                                                               ---- RETURNED BY NetTCP_TxQ_TimeoutGet_ms() : -----
+*                               NET_SOCK_ERR_NONE               Socket transmit queue timeout successfully returned.
+*
+*                                                               --------- RETURNED BY NetSock_IsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               -------- RETURNED BY NetTCP_ConnIsUsed() : --------
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               ----- RETURNED BY NetConn_ID_TransportGet() : -----
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               ------ RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Socket's transmit queue network timeout value :
+*
+*                   0,                         on any error(s).
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #4].
+*
+* Note(s)     : (3) Despite inconsistency with other 'Get' status functions,
+*                   NetSock_CfgTimeoutTxQ_Get_ms() includes 'Cfg' for consistency with other
+*                   NetSock_CfgTimeout&&&() functions.
+*
+*               (4) NetSock_CfgTimeoutTxQ_Get_ms() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_TxQ_TimeoutGet_ms()  Note #1'.
+*
+*               (5) (a) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is
+*                       included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetSock_CfgTimeoutTxQ_Get_ms (NET_SOCK_ID   sock_id,
+                                          NET_ERR      *p_err)
+{
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+   NET_CONN_ID   conn_id_transport;
+   NET_ERR       err;
+   CPU_INT32U    timeout_ms;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION((CPU_INT32U)0);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #4b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutTxQ_Get_ms, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* -------------- GET SOCK TX Q TIMEOUT --------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->SockType) {
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+       case NET_SOCK_TYPE_STREAM:
+            switch (p_sock->Protocol) {
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+                case NET_SOCK_PROTOCOL_TCP:
+                     conn_id           = p_sock->ID_Conn;
+                     conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+                     if (*p_err != NET_CONN_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                    (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                            (NET_ERR       *)p_err);
+                     if (*p_err != NET_TCP_ERR_NONE) {
+                          goto exit_fail;
+                     }
+
+                     timeout_ms = NetTCP_TxQ_TimeoutGet_ms((NET_TCP_CONN_ID)conn_id_transport,
+                                                                           &err);
+                    *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE : err;
+                     break;
+#endif
+#endif
+                case NET_SOCK_PROTOCOL_NONE:
+                default:                                        /* See Note #5b.                                        */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                    *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+                     goto exit_fail;
+            }
+            break;
+#endif
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       case NET_SOCK_TYPE_DATAGRAM:                             /* See Note #2b.                                        */
+       default:                                                 /* See Note #5a.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err = NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fail;
+   }
+
+
+  (void)&conn_id;                                               /* Prevent possible 'variable unused' warnings.         */
+  (void)&conn_id_transport;
+  (void)&err;
+
+
+   goto exit_release;
+
+
+exit_lock_fault:
+
+exit_fail:
+   timeout_ms = 0u;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+   return (timeout_ms);                                         /* -------------- RTN SOCK TX Q TIMEOUT --------------- */
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_CfgTimeoutConnReqDflt()
+*
+* Description : (1) Set socket's connection request configured-default timeout value :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  connection request default timeout
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set connection request
+*                               configured-default timeout.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetSock_ConnReqTimeoutDflt() : -
+*                               NET_SOCK_ERR_NONE               Socket connection request configured-default
+*                                                                    timeout successfully set.
+*
+*                                                               -------- RETURNED BY NetSock_IsUsed() : ---------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ----- RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket connection request configured-default timeout successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTimeoutConnReqDflt() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_ConnReqTimeoutDflt()  Note #1'.
+*
+*               (3) Configured timeout does NOT reschedule any current socket connection request timeout
+*                   in progress but becomes effective the next time a socket pends on a connection request
+*                   with timeout.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgTimeoutConnReqDflt (NET_SOCK_ID   sock_id,
+                                            NET_ERR      *p_err)
+{
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NET_SOCK  *p_sock;
+    CPU_BOOLEAN  rtn_val;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN  == DEF_ENABLED)
+                                                                 /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutConnReqDflt, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+                                                                 /* ---------- CFG SOCK CONN REQ DFLT TIMEOUT ---------- */
+    NetSock_ConnReqTimeoutDflt(p_sock, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+    }
+
+    rtn_val = DEF_OK;
+
+    goto exit_release;
+
+
+exit_fail:
+    rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+    return (rtn_val);
+#else
+   (void)&sock_id;                                              /* Prevent 'variable unused' compiler warning.          */
+   *p_err = NET_SOCK_ERR_NONE;
+    goto exit_lock_fault;
+#endif
+
+
+exit_lock_fault:
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_CfgTimeoutConnReqSet()
+*
+* Description : (1) Set socket's connection request timeout value :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  connection request timeout
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to set connection request timeout.
+*
+*               timeout_ms      Desired timeout value :
+*
+*                                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value desired.
+*
+*                                   In number of milliseconds, otherwise.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               ---- RETURNED BY NetSock_ConnReqTimeoutSet() : ----
+*                               NET_SOCK_ERR_NONE               Socket connection request timeout successfully set.
+*
+*                                                               --------- RETURNED BY NetSock_IsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ------ RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket connection request timeout successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTimeoutConnReqSet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_ConnReqTimeoutSet()  Note #1'.
+*
+*               (3) Configured timeout does NOT reschedule any current socket connection request timeout
+*                   in progress but becomes effective the next time a socket pends on a connection request
+*                   with timeout.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgTimeoutConnReqSet (NET_SOCK_ID   sock_id,
+                                           CPU_INT32U    timeout_ms,
+                                           NET_ERR      *p_err)
+{
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NET_SOCK    *p_sock;
+    CPU_BOOLEAN  rtn_val;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN  == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutConnReqSet, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+                                                                 /* ------------ CFG SOCK CONN REQ TIMEOUT ------------- */
+    NetSock_ConnReqTimeoutSet(p_sock, timeout_ms, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+    }
+
+    rtn_val = DEF_OK;
+
+    goto exit_release;
+
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+
+  return (rtn_val);
+
+#else
+  (void)&sock_id;                                               /* Prevent 'variable unused' compiler warnings.         */
+  (void)&timeout_ms;
+  *p_err = NET_SOCK_ERR_NONE;
+   goto exit_lock_fault;
+#endif
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_CfgTimeoutConnReqGet_ms()
+*
+* Description : (1) Get socket's connection request timeout value :
+*
+*                   (a) Acquire  network lock                                           See Note #3
+*                   (b) Validate socket  used
+*                   (c) Get      socket  connection request timeout
+*                   (d) Release  network lock
+*                   (e) Return   socket  connection request timeout
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get connection request timeout.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetSock_ConnReqTimeoutGet_ms() : -
+*                               NET_SOCK_ERR_NONE               Socket connection request timeout successfully
+*                                                                   returned.
+*
+*                                                               --------- RETURNED BY NetSock_IsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ------ RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Socket's connection request network timeout value :
+*
+*                   0,                         on any error(s).
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #3].
+*
+* Note(s)     : (2) Despite inconsistency with other 'Get' status functions,
+*                   NetSock_CfgTimeoutConnReqGet_ms() includes 'Cfg' for consistency with other
+*                   NetSock_CfgTimeout&&&() functions.
+*
+*               (3) NetSock_CfgTimeoutConnReqGet_ms() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_ConnReqTimeoutGet_ms()  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetSock_CfgTimeoutConnReqGet_ms (NET_SOCK_ID   sock_id,
+                                             NET_ERR      *p_err)
+{
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NET_SOCK    *p_sock;
+    CPU_INT32U   timeout_ms;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                 /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((CPU_INT32U)0);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #3b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutConnReqGet_ms, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+                                                                 /* ------------ GET SOCK CONN REQ TIMEOUT ------------- */
+    timeout_ms = NetSock_ConnReqTimeoutGet_ms(p_sock, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+    }
+
+    goto exit_release;
+
+exit_fail:
+    timeout_ms = 0u;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+    return (timeout_ms);                                         /* ------------ RTN SOCK CONN REQ TIMEOUT ------------- */
+
+
+exit_lock_fault:
+    return (0u);
+
+#else
+   (void)&sock_id;                                              /* Prevent 'variable unused' compiler warning.          */
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (0u);
+#endif
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_CfgTimeoutConnAcceptDflt()
+*
+* Description : (1) Set socket's connection accept configured-default timeout value :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  connection accept default timeout
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set connection accept
+*                               configured-default timeout.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetSock_ConnAcceptQ_TimeoutDflt() : -
+*                               NET_SOCK_ERR_NONE               Socket connection accept configured-default
+*                                                                    timeout successfully set.
+*
+*                                                               ----------- RETURNED BY NetSock_IsUsed() : -----------
+*                               NET_INIT_ERR_NOT_COMPLETED      Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ------- RETURNED BY Net_GlobalLockAcquire() : --------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket connection accept configured-default timeout successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTimeoutConnAcceptDflt() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_ConnAcceptQ_TimeoutDflt()  Note #2'.
+*
+*               (3) Configured timeout does NOT reschedule any current socket connection accept timeout
+*                   in progress but becomes effective the next time a socket pends on a connection accept
+*                   with timeout.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+CPU_BOOLEAN  NetSock_CfgTimeoutConnAcceptDflt (NET_SOCK_ID   sock_id,
+                                               NET_ERR      *p_err)
+{
+   CPU_BOOLEAN   rtn_val;
+   NET_SOCK     *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutConnAcceptDflt, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+   p_sock = &NetSock_Tbl[sock_id];
+                                                                /* -------- CFG SOCK CONN ACCEPT DFLT TIMEOUT --------- */
+   NetSock_ConnAcceptQ_TimeoutDflt(p_sock, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+       goto exit_fail;
+   }
+
+   rtn_val = DEF_OK;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+    rtn_val = DEF_FAIL;
+    goto exit;
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+    return (rtn_val);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_CfgTimeoutConnAcceptSet()
+*
+* Description : (1) Set socket's connection accept timeout value :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  connection accept timeout
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to set connection accept timeout.
+*
+*               timeout_ms      Desired timeout value :
+*
+*                                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value desired.
+*
+*                                   In number of milliseconds, otherwise.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               -- RETURNED BY NetSock_ConnAcceptQ_TimeoutSet() : ---
+*                               NET_SOCK_ERR_NONE               Socket connection accept timeout successfully set.
+*
+*                                                               ---------- RETURNED BY NetSock_IsUsed() : -----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ------- RETURNED BY Net_GlobalLockAcquire() : -------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket connection accept timeout successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTimeoutConnAcceptSet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_ConnAcceptQ_TimeoutSet()  Note #2'.
+*
+*               (3) Configured timeout does NOT reschedule any current socket connection accept timeout
+*                   in progress but becomes effective the next time a socket pends on a connection accept
+*                   with timeout.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+CPU_BOOLEAN  NetSock_CfgTimeoutConnAcceptSet (NET_SOCK_ID   sock_id,
+                                              CPU_INT32U    timeout_ms,
+                                              NET_ERR      *p_err)
+{
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   rtn_val;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutConnAcceptSet, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+   p_sock = &NetSock_Tbl[sock_id];
+
+                                                                /* ----------- CFG SOCK CONN ACCEPT TIMEOUT ----------- */
+   NetSock_ConnAcceptQ_TimeoutSet(p_sock, timeout_ms, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+       goto exit_fail;
+   }
+
+   rtn_val = DEF_OK;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+    rtn_val = DEF_FAIL;
+    goto exit;
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (rtn_val);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_CfgTimeoutConnAcceptGet_ms()
+*
+* Description : (1) Get socket's connection accept timeout value :
+*
+*                   (a) Acquire  network lock                                           See Note #3
+*                   (b) Validate socket  used
+*                   (c) Get      socket  connection accept timeout
+*                   (d) Release  network lock
+*                   (e) Return   socket  connection accept timeout
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get connection accept timeout.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               --- RETURNED BY NetSock_ConnAcceptQ_TimeoutGet_ms() : --
+*                               NET_SOCK_ERR_NONE               Socket connection accept timeout successfully
+*                                                                   returned.
+*
+*                                                               ------------ RETURNED BY NetSock_IsUsed() : ------------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               --------- RETURNED BY Net_GlobalLockAcquire() : --------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Socket's connection accept network timeout value :
+*
+*                   0,                         on any error(s).
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #3].
+*
+* Note(s)     : (2) Despite inconsistency with other 'Get' status functions,
+*                   NetSock_CfgTimeoutConnAcceptGet_ms() includes 'Cfg' for consistency with other
+*                   NetSock_CfgTimeout&&&() functions.
+*
+*               (3) NetSock_CfgTimeoutConnAcceptGet_ms() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_ConnAcceptQ_TimeoutGet_ms()  Note #2'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+CPU_INT32U  NetSock_CfgTimeoutConnAcceptGet_ms (NET_SOCK_ID   sock_id,
+                                                NET_ERR      *p_err)
+{
+   CPU_INT32U   timeout_ms;
+   NET_SOCK    *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION((CPU_INT32U)0);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #3b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutConnAcceptGet_ms, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+   p_sock = &NetSock_Tbl[sock_id];
+                                                                /* ----------- GET SOCK CONN ACCEPT TIMEOUT ----------- */
+   timeout_ms = NetSock_ConnAcceptQ_TimeoutGet_ms(p_sock, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+       goto exit_fail;
+   }
+
+   goto exit_release;
+
+
+exit_lock_fault:
+    timeout_ms = 0u;
+    goto exit;
+
+exit_fail:
+   timeout_ms = 0u;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+                                         /* ----------- RTN SOCK CONN ACCEPT TIMEOUT ----------- */
+
+exit:
+   return (timeout_ms);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_CfgTimeoutConnCloseDflt()
+*
+* Description : (1) Set socket's connection close configured-default timeout value :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  connection close default timeout
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to set connection close
+*                               configured-default timeout.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               -- RETURNED BY NetSock_ConnCloseTimeoutDflt() : ---
+*                               NET_SOCK_ERR_NONE               Socket connection close configured-default
+*                                                                    timeout successfully set.
+*
+*                                                               --------- RETURNED BY NetSock_IsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ------ RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket connection close configured-default timeout successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTimeoutConnCloseDflt() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_ConnCloseTimeoutDflt()  Note #1'.
+*
+*               (3) Configured timeout does NOT reschedule any current socket connection close timeout
+*                   in progress but becomes effective the next time a socket pends on a connection close
+*                   with timeout.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgTimeoutConnCloseDflt (NET_SOCK_ID   sock_id,
+                                              NET_ERR      *p_err)
+{
+    CPU_BOOLEAN  rtn_val;
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NET_SOCK  *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN  == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION(DEF_FAIL);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutConnCloseDflt, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+                                                                 /* --------- CFG SOCK CONN CLOSE DFLT TIMEOUT --------- */
+    NetSock_ConnCloseTimeoutDflt(p_sock, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+    }
+
+    rtn_val = DEF_OK;
+
+    goto exit_release;
+
+
+
+exit_fail:
+    rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+    goto exit;
+
+#else
+   (void)&sock_id;                                               /* Prevent 'variable unused' compiler warning.          */
+   *p_err = NET_SOCK_ERR_NONE;
+    goto exit_lock_fault;
+#endif
+
+exit_lock_fault:
+    rtn_val = DEF_FAIL;
+    goto exit;
+
+exit:
+    return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_CfgTimeoutConnCloseSet()
+*
+* Description : (1) Set socket's connection close timeout value :
+*
+*                   (a) Acquire   network lock                                          See Note #2
+*                   (b) Validate  socket  used
+*                   (c) Configure socket  connection close timeout
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to set connection close timeout.
+*
+*               timeout_ms      Desired timeout value :
+*
+*                                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value desired.
+*
+*                                   In number of milliseconds, otherwise.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               -- RETURNED BY NetSock_ConnCloseTimeoutSet() : ---
+*                               NET_SOCK_ERR_NONE               Socket connection close timeout successfully set.
+*
+*                                                               -------- RETURNED BY NetSock_IsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ----- RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   socket connection close timeout successfully set.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTimeoutConnCloseSet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_ConnCloseTimeoutSet()  Note #1'.
+*
+*               (3) Configured timeout does NOT reschedule any current socket connection close timeout
+*                   in progress but becomes effective the next time a socket pends on a connection close
+*                   with timeout.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_CfgTimeoutConnCloseSet (NET_SOCK_ID   sock_id,
+                                             CPU_INT32U    timeout_ms,
+                                             NET_ERR      *p_err)
+{
+    CPU_BOOLEAN   rtn_val;
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NET_SOCK     *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN  == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutConnCloseSet, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+   p_sock = &NetSock_Tbl[sock_id];
+
+                                                                /* ----------- CFG SOCK CONN CLOSE TIMEOUT ------------ */
+   NetSock_ConnCloseTimeoutSet(p_sock, timeout_ms, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+       goto exit_fail;
+   }
+
+    rtn_val = DEF_OK;
+
+    goto exit_release;
+
+
+
+exit_fail:
+   rtn_val = DEF_FAIL;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+   goto exit;
+
+
+#else
+   (void)&sock_id;                                              /* Prevent 'variable unused' compiler warnings.         */
+   (void)&timeout_ms;
+   *p_err = NET_SOCK_ERR_NONE;
+    goto exit_lock_fault;
+#endif
+
+exit_lock_fault:
+    rtn_val = DEF_FAIL;
+    goto exit;
+
+exit:
+    return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_CfgTimeoutConnCloseGet_ms()
+*
+* Description : (1) Get socket's connection close timeout value :
+*
+*                   (a) Acquire  network lock                                           See Note #3
+*                   (b) Validate socket  used
+*                   (c) Get      socket  connection close timeout
+*                   (d) Release  network lock
+*                   (e) Return   socket  connection close timeout
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get connection close timeout.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               --- RETURNED BY NetSock_ConnCloseTimeoutGet_ms() : --
+*                               NET_SOCK_ERR_NONE               Socket connection close timeout successfully
+*                                                                   returned.
+*
+*                                                               ---------- RETURNED BY NetSock_IsUsed() : -----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               ------- RETURNED BY Net_GlobalLockAcquire() : -------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Socket's connection close network timeout value :
+*
+*                   0,                         on any error(s).
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #3].
+*
+* Note(s)     : (2) Despite inconsistency with other 'Get' status functions,
+*                   NetSock_CfgTimeoutConnCloseGet_ms() includes 'Cfg' for consistency with other
+*                   NetSock_CfgTimeout&&&() functions.
+*
+*               (3) NetSock_CfgTimeoutConnCloseGet_ms() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*                   See also 'NetSock_ConnCloseTimeoutGet_ms()  Note #1'.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetSock_CfgTimeoutConnCloseGet_ms (NET_SOCK_ID   sock_id,
+                                               NET_ERR      *p_err)
+{
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    CPU_INT32U   timeout_ms;
+    NET_SOCK    *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((CPU_INT32U)0);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #3b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_CfgTimeoutConnCloseGet_ms, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+                                                                /* ----------- GET SOCK CONN CLOSE TIMEOUT ------------ */
+    timeout_ms = NetSock_ConnCloseTimeoutGet_ms(p_sock, p_err);
+
+    goto exit_release;
+
+
+exit_lock_fault:
+    return (0u);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+    timeout_ms = 0u;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+                                                                /* ----------- RTN SOCK CONN CLOSE TIMEOUT ------------ */
+   return (timeout_ms);
+
+
+#else
+  (void)&sock_id;                                               /* Prevent 'variable unused' compiler warning.          */
+  *p_err =  NET_SOCK_ERR_NONE;
+   return (0u);
+#endif
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_IsUsed()
+*
+* Description : Validate socket in use.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to validate.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket successfully validated as in use.
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+* Return(s)   : DEF_YES, socket   valid &      in use.
+*
+*               DEF_NO,  socket invalid or NOT in use.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (1) NetSock_IsUsed() blocked until network initialization completes.
+*
+*               (2) NetSock_IsUsed() MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_IsUsed (NET_SOCK_ID   sock_id,
+                             NET_ERR      *p_err)
+{
+    NET_SOCK     *p_sock;
+    CPU_BOOLEAN   used;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #1).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        return (DEF_NO);
+    }
+#endif
+
+                                                                /* ----------------- VALIDATE SOCK ID ----------------- */
+    if (sock_id < NET_SOCK_ID_MIN) {
+       *p_err =  NET_SOCK_ERR_INVALID_SOCK;
+        return (DEF_NO);
+    }
+    if (sock_id > NET_SOCK_ID_MAX) {
+       *p_err =  NET_SOCK_ERR_INVALID_SOCK;
+        return (DEF_NO);
+    }
+
+                                                                /* ---------------- VALIDATE SOCK USED ---------------- */
+    p_sock = &NetSock_Tbl[sock_id];
+    used  =  DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_USED);
+    if (used != DEF_YES) {
+       *p_err =  NET_SOCK_ERR_NOT_USED;
+        return (DEF_NO);
+    }
+
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_IsConn()
+*
+* Description : (1) Validate socket in use & connected :
+*
+*                   (a) Acquire  network lock                                           See Note #2
+*                   (b) Validate socket  used
+*                   (c) Get      socket  connection status
+*                   (d) Release  network lock
+*                   (e) Return   socket  connection status
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to validate.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket successfully checked; check return
+*                                                                   value for socket connection status.
+*
+*                                                               ---- RETURNED BY NetSock_IsUsed() : -----
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               - RETURNED BY Net_GlobalLockAcquire() : -
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_YES, socket   valid &      connected.
+*
+*               DEF_NO,  socket invalid or NOT connected.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_IsConn() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetSock_IsConn (NET_SOCK_ID   sock_id,
+                             NET_ERR      *p_err)
+{
+   NET_SOCK     *p_sock;
+   CPU_BOOLEAN   conn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_NO);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_IsConn, p_err);       /* See Note #2b.                                        */
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+                                                                /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+
+                                                                /* --------------- GET SOCK CONN STATUS --------------- */
+   p_sock = &NetSock_Tbl[sock_id];
+   switch (p_sock->State) {
+       case NET_SOCK_STATE_LISTEN:
+       case NET_SOCK_STATE_CONN:
+       case NET_SOCK_STATE_CONN_IN_PROGRESS:
+       case NET_SOCK_STATE_CONN_DONE:
+       case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+       case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+            conn = DEF_YES;
+            break;
+
+
+       case NET_SOCK_STATE_NONE:
+       case NET_SOCK_STATE_FREE:
+       case NET_SOCK_STATE_DISCARD:
+       case NET_SOCK_STATE_CLOSED:
+       case NET_SOCK_STATE_CLOSED_FAULT:
+       case NET_SOCK_STATE_BOUND:
+       default:
+            conn = DEF_NO;
+            break;
+   }
+
+
+  *p_err = NET_SOCK_ERR_NONE;
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (DEF_FAIL);
+
+exit_fail:
+   conn = DEF_NO;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+   return (conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetSock_GetObj()
+*
+* Description : Get socket object.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to validate.
+*
+* Return(s)   : Pointer to socket object, if not error.
+*
+*               DEF_NULL, otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #2]..
+*
+* Note(s)     : (2) NetSock_IsUsed() MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+NET_SOCK  *NetSock_GetObj (NET_SOCK_ID  sock_id)
+{
+    CPU_BOOLEAN   used;
+    NET_SOCK     *p_sock = DEF_NULL;
+    NET_ERR       err;
+
+
+    used = NetSock_IsUsed(sock_id, &err);
+    if (used != DEF_YES) {
+        goto exit;
+    }
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+exit:
+    return (p_sock);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_GetConnTransportID()
+*
+* Description : (1) Get a socket's transport layer handle identifier :
+*
+*                   (a) Acquire  network lock                                           See Note #2
+*                   (b) Validate socket  used
+*                   (c) Get      socket's transport layer handle identifier
+*                   (d) Release  network lock
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get transport layer handle
+*                               identifier.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket's transport layer handle identifier
+*                                                                   successfully returned.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*
+*                                                               ----- RETURNED BY NetSock_IsUsed() : ------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               - RETURNED BY NetConn_ID_TransportGet() : -
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Socket's transport layer handle identifier, if NO error(s).
+*
+*               NET_CONN_ID_NONE,                           otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_GetConnTransportID() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (3) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'SockType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+NET_CONN_ID  NetSock_GetConnTransportID (NET_SOCK_ID   sock_id,
+                                         NET_ERR      *p_err)
+{
+   NET_SOCK     *p_sock;
+   NET_CONN_ID   conn_id;
+   NET_CONN_ID   conn_id_transport;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION((NET_CONN_ID)0);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetSock_GetConnTransportID, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* ------------ GET SOCK TRANSPORT CONN ID ------------ */
+   p_sock = &NetSock_Tbl[sock_id];
+
+   switch (p_sock->SockType) {
+       case NET_SOCK_TYPE_DATAGRAM:
+       case NET_SOCK_TYPE_STREAM:
+            conn_id           = p_sock->ID_Conn;
+            conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+            if (*p_err != NET_CONN_ERR_NONE) {
+                 goto exit_fail;
+            }
+            break;
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       default:                                                 /* See Note #3.                                         */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fail;
+   }
+
+
+  *p_err = NET_SOCK_ERR_NONE;
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (NET_CONN_ID_NONE);
+
+exit_fail:
+   conn_id_transport = NET_CONN_ID_NONE;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+   return (conn_id_transport);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetSock_PoolStatGet()
+*
+* Description : Get socket statistics pool.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Socket statistics pool, if NO error(s).
+*
+*               NULL   statistics pool, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) NetSock_PoolStatGet() blocked until network initialization completes; return NULL
+*                   statistics pool.
+*
+*               (2) 'NetSock_PoolStat' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+NET_STAT_POOL  NetSock_PoolStatGet (void)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    NET_ERR        err;
+#endif
+    NET_STAT_POOL  stat_pool;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        NetStat_PoolClr(&stat_pool, &err);
+        return (stat_pool);                                     /* ... rtn NULL stat pool (see Note #1).                */
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    stat_pool = NetSock_PoolStat;
+    CPU_CRITICAL_EXIT();
+
+    return (stat_pool);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_PoolStatResetMaxUsed()
+*
+* Description : Reset socket statistics pool's maximum number of entries used.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) NetSock_PoolStatResetMaxUsed() blocked until network initialization completes.
+*
+*                   (a) However, since 'NetSock_PoolStat' is reset when network initialization completes;
+*                       NO error is returned.
+*********************************************************************************************************
+*/
+
+void  NetSock_PoolStatResetMaxUsed (void)
+{
+    NET_ERR  err;
+
+
+                                                                /* Acquire net lock.                                    */
+    Net_GlobalLockAcquire((void *)&NetSock_PoolStatResetMaxUsed, &err);
+    if (err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        goto exit_release;                                      /* ... rtn w/o err (see Note #1a).                      */
+    }
+#endif
+
+
+    NetStat_PoolResetUsedMax(&NetSock_PoolStat, &err);          /* Reset net sock stat pool.                            */
+
+    goto exit_release;
+
+exit_lock_fault:
+    return;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_GetLocalIPAddr()
+*
+* Description : Get the local IP addr used in the socket connection.
+*                   (a) Acquire  network lock                                           See Note #2
+*                   (b) Validate socket  used
+*                   (c) Get      socket connection identifier
+*                   (d) Get      socket local IP addr and family
+*                   (e) Release  network lock
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier.
+*
+*               p_buf_addr  Pointer to a buffer to return the local IP addr.
+*
+*               p_family    Pointer to variable that will receive the conn family type of the local IP addr.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket's transport layer handle identifier
+*                                                                   successfully returned.
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*
+*                                                               ----- RETURNED BY NetSock_IsUsed() : ------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+*                                                               -- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) 'p_buf_addr' must be a buffer at least of NET_CONN_ADDR_LEN_MAX bytes large.
+*
+*               (2) NetSock_GetLocalIPAddr() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*********************************************************************************************************
+*/
+
+void  NetSock_GetLocalIPAddr (NET_SOCK_ID        sock_id,
+                              CPU_INT08U        *p_buf_addr,
+                              NET_SOCK_FAMILY   *p_family,
+                              NET_ERR           *p_err)
+{
+    NET_SOCK     *p_sock;
+    NET_CONN_ID   conn_id;
+    NET_CONN     *p_conn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_CONN_ID)0);
+    }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetSock_GetLocalIPAddr, p_err);
+    if (*p_err != NET_ERR_NONE) {
+        return;
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+    (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_release;
+    }
+#endif
+                                                                /* ----------------- GET SOCK CONN ID ----------------- */
+    p_sock = &NetSock_Tbl[sock_id];
+
+    switch (p_sock->SockType) {
+       case NET_SOCK_TYPE_DATAGRAM:
+       case NET_SOCK_TYPE_STREAM:
+            conn_id = p_sock->ID_Conn;
+            break;
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       default:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err = NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_release;
+    }
+                                                                /* ------------ GET LOCAL IP ADDR & FAMILY ------------ */
+    p_conn   = &NetConn_Tbl[conn_id];
+   *p_family = (NET_SOCK_FAMILY)p_conn->Family;
+    switch (*p_family) {
+
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_FAMILY_IP_V4:
+             Mem_Copy(p_buf_addr, &p_conn->AddrLocal[NET_SOCK_ADDR_IP_V4_IX_ADDR], NET_IPv4_ADDR_SIZE);
+            *p_err = NET_SOCK_ERR_NONE;
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_FAMILY_IP_V6:
+            Mem_Copy(p_buf_addr, &p_conn->AddrLocal[NET_SOCK_ADDR_IP_V6_IX_ADDR], NET_IPv6_ADDR_SIZE);
+           *p_err = NET_SOCK_ERR_NONE;
+            break;
+#endif
+        default:
+           *p_err = NET_SOCK_ERR_INVALID_FAMILY;
+            break;
+
+    }
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     NetSock_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as socket layer.
+*
+* Argument(s) : p_buf_hdr    Pointer to network buffer header that received socket packet.
+*               ---------    Argument validated in NetSock_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Received buffer's socket/data header validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT socket.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Rx().
+*
+* Note(s)     : (1) Since lower network layers eventually demultiplex data to the application layer, the
+*                   socket layer must validate received packet's as application type, not socket type.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetSock_RxPktValidateBuf (NET_BUF_HDR  *p_buf_hdr,
+                                        NET_ERR      *p_err)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  valid;
+    NET_ERR      err;
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* -------------- VALIDATE SOCK/DATA HDR -------------- */
+    if (p_buf_hdr->ProtocolHdrType != NET_PROTOCOL_TYPE_APP) {   /* See Note #1.                                         */
+        if_nbr = p_buf_hdr->IF_Nbr;
+        valid  = NetIF_IsValidHandler(if_nbr, &err);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.RxInvalidProtocolCtr);
+        }
+       *p_err = NET_ERR_INVALID_PROTOCOL;
+        return;
+    }
+
+    if (p_buf_hdr->DataIx == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.RxInvalidBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetSock_RxPktDemux()
+*
+* Description : (1) Demultiplex received packet to appropriate socket :
+*
+*                   (a) Determine appropriate receive socket :
+*
+*                       (1) Packet's socket demultiplexed in previous transport layer.
+*
+*                       (2) Search connection list for socket identifier whose local &/or remote addresses
+*                           are identical to the received packet's destination & source addresses.
+*
+*                   (b) Validate socket connection
+*                   (c) Demultiplex received packet to appropriate socket
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer that received socket data.
+*               -----        Argument checked   in NetSock_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header.
+*               ---------    Argument validated in NetSock_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Received packet successfully demultiplexed
+*                                                                       to appropriate socket.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_ERR_RX_DEST                     Invalid destination; no socket connection
+*                                                                       available for received packet.
+*
+*                                                                   ----- RETURNED BY NetConn_IsConn() : -----
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*                               NET_CONN_ERR_CONN_NONE              NO connection.
+*
+*                                                                   --- RETURNED BY NetSock_RxQ_Signal() : ---
+*                               NET_SOCK_ERR_RX_Q_FULL              Socket receive queue full.
+*                               NET_SOCK_ERR_RX_Q_SIGNAL            Socket receive queue signal failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Rx().
+*
+* Note(s)     : (2) (a) Assumes packet buffer's internet protocol controls configured in previous layer(s).
+*
+*                   (b) Assumes packet's addresses & ports demultiplexed & decoded  in previous layer(s).
+*
+*               (3) (a) Since datagram-type sockets transmit & receive all data atomically, each datagram
+*                       socket receive MUST always receive exactly one datagram.  Therefore, the socket
+*                       receive queue  MUST be signaled for each datagram packet received.
+*
+*                   (b) Stream-type sockets transmit & receive all data octets in one or more non-distinct
+*                       packets.  In other words, the application data is NOT bounded by any specific
+*                       packet(s); rather, it is contiguous & sequenced from one packet to the next.
+*
+*                       Therefore, the socket receive queue is signaled ONLY when data is received for a
+*                       connection where data was previously unavailable.
+*
+*               (4) Default case already invalidated in earlier internet protocol layer function(s).
+*                   However, the default case is included as an extra precaution in case 'Protocol'
+*                   is incorrectly modified.
+*
+*               (5) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*
+*               (6) Default case already invalidated in NetSock_Open().  However, the default case
+*                   is included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*               (7) Socket connection addresses are maintained in network-order.
+*
+*               (8) Some buffer controls were previously initialized in NetBuf_Get() when the packet
+*                   was received at the network interface layer.  These buffer controls do NOT need
+*                   to be re-initialized but are shown for completeness.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_RxPktDemux (NET_BUF      *p_buf,
+                                  NET_BUF_HDR  *p_buf_hdr,
+                                  NET_ERR      *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN            used;
+    CPU_BOOLEAN            conn;
+#endif
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    CPU_BOOLEAN            q_prevly_empty;
+#endif
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_HDR          *pip_hdrv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_HDR          *pip_hdrv6;
+#endif
+    CPU_INT08U             addr_local[NET_SOCK_ADDR_LEN_MAX];
+    CPU_INT08U             addr_remote[NET_SOCK_ADDR_LEN_MAX];
+    NET_CONN_PROTOCOL_IX   protocol_ix;
+    NET_CONN_FAMILY        family;
+    NET_CONN_ID            conn_id;
+    NET_SOCK_ID            sock_id;
+    NET_SOCK              *p_sock;
+    NET_BUF               *p_buf_tail;
+    NET_BUF_HDR           *p_buf_hdr_tail;
+    NET_SOCK_DATA_SIZE     rx_q_size_max_rem;
+    NET_ERR                err;
+
+
+    sock_id = (NET_SOCK_ID)p_buf_hdr->Conn_ID_App;
+    conn_id = (NET_CONN_ID)p_buf_hdr->Conn_ID;
+
+                                                                /* --------------- CHK PREV SOCK DEMUX ---------------- */
+    if (sock_id != (NET_SOCK_ID)NET_CONN_ID_NONE) {             /* If sock id demux'd by prev layer (see Note #1a1), ...*/
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ... validate sock conn.                              */
+        NetConn_IsConn(conn_id, p_err);
+        switch (*p_err) {
+            case NET_CONN_ERR_CONN_HALF:
+                 conn = DEF_NO;
+                 break;
+
+
+            case NET_CONN_ERR_CONN_FULL:
+                 conn = DEF_YES;
+                 break;
+
+
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_CONN_ERR_NOT_USED:
+            case NET_CONN_ERR_CONN_NONE:
+            default:
+                                                                /* Rtn err from NetConn_IsConn().                       */
+                 return;
+        }
+#endif
+
+    } else {                                                        /* ---- SRCH CONN LIST(S) FOR PKT/SOCK ADDR(S) ---- */
+
+        if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+
+#ifdef  NET_IPv4_MODULE_EN
+            family    =  NET_CONN_FAMILY_IP_V4_SOCK;
+            pip_hdrv4 = (NET_IPv4_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+            switch (pip_hdrv4->Protocol) {
+                case NET_IP_HDR_PROTOCOL_UDP:
+                     protocol_ix = NET_CONN_PROTOCOL_IX_IP_V4_UDP;
+                     break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+                case NET_IP_HDR_PROTOCOL_TCP:
+                     protocol_ix = NET_CONN_PROTOCOL_IX_IP_V4_TCP;
+                     break;
+#endif
+
+                default:                                            /* See Note #4.                                     */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                    *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+                     return;
+            }
+
+            Mem_Clr(&addr_local,  NET_SOCK_ADDR_LEN_MAX);
+            Mem_Clr(&addr_remote, NET_SOCK_ADDR_LEN_MAX);
+                                                                    /* Cfg srch local  addr as pkt dest addr.           */
+            NET_UTIL_VAL_COPY_SET_NET_16(&addr_local [NET_SOCK_ADDR_IP_IX_PORT], &p_buf_hdr->TransportPortDest);
+            NET_UTIL_VAL_COPY_SET_NET_32(&addr_local [NET_SOCK_ADDR_IP_V4_IX_ADDR], &p_buf_hdr->IP_AddrDest);
+                                                                    /* Cfg srch remote addr as pkt src  addr.           */
+            NET_UTIL_VAL_COPY_SET_NET_16(&addr_remote[NET_SOCK_ADDR_IP_IX_PORT], &p_buf_hdr->TransportPortSrc);
+            NET_UTIL_VAL_COPY_SET_NET_32(&addr_remote[NET_SOCK_ADDR_IP_V4_IX_ADDR], &p_buf_hdr->IP_AddrSrc);
+
+#else                                                               /* See Note #5.                                     */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+           *p_err = NET_SOCK_ERR_INVALID_FAMILY;
+            return;
+#endif
+
+        } else {
+
+#ifdef  NET_IPv6_MODULE_EN
+            family    =  NET_CONN_FAMILY_IP_V6_SOCK;
+            pip_hdrv6 = (NET_IPv6_HDR *)&p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+            switch (pip_hdrv6->NextHdr) {
+                case NET_IP_HDR_PROTOCOL_UDP:
+                     protocol_ix = NET_CONN_PROTOCOL_IX_IP_V6_UDP;
+                     break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+                case NET_IP_HDR_PROTOCOL_TCP:
+                     protocol_ix = NET_CONN_PROTOCOL_IX_IP_V6_TCP;
+                     break;
+#endif
+
+                default:                                            /* See Note #4.                                     */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                    *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+                     return;
+            }
+
+            Mem_Clr(&addr_local,  NET_SOCK_ADDR_LEN_MAX);
+            Mem_Clr(&addr_remote, NET_SOCK_ADDR_LEN_MAX);
+                                                                    /* Cfg srch local  addr as pkt dest addr.           */
+            NET_UTIL_VAL_COPY_SET_NET_16(&addr_local [NET_SOCK_ADDR_IP_IX_PORT], &p_buf_hdr->TransportPortDest);
+            Mem_Copy(&addr_local [NET_SOCK_ADDR_IP_V6_IX_ADDR],
+                     &p_buf_hdr->IPv6_AddrDest,
+                      NET_IPv6_ADDR_SIZE);
+                                                                    /* Cfg srch remote addr as pkt src  addr.           */
+            NET_UTIL_VAL_COPY_SET_NET_16(&addr_remote[NET_SOCK_ADDR_IP_IX_PORT], &p_buf_hdr->TransportPortSrc);
+            Mem_Copy(&addr_remote [NET_SOCK_ADDR_IP_V6_IX_ADDR],
+                     &p_buf_hdr->IPv6_AddrSrc,
+                      NET_IPv6_ADDR_SIZE);
+#else                                                               /* See Note #5.                                     */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+           *p_err = NET_SOCK_ERR_INVALID_FAMILY;
+            return;
+#endif
+        }
+
+        conn_id = NetConn_Srch(family,                          /* Srch for conn'd OR non-conn'd sock.                  */
+                               protocol_ix,
+                              &addr_local[0],
+                              &addr_remote[0],
+                               NET_SOCK_ADDR_LEN_MAX,
+                               0,
+                              &sock_id,
+                              &err);
+        switch (err) {
+            case NET_CONN_ERR_CONN_FULL:                            /* Fully-conn'd sock found.                         */
+            case NET_CONN_ERR_CONN_FULL_WILDCARD:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                 conn = DEF_YES;                                    /* Validate full-conn.                              */
+#endif
+                 break;
+
+
+            case NET_CONN_ERR_CONN_HALF:                            /* Non-  conn'd sock found.                         */
+            case NET_CONN_ERR_CONN_HALF_WILDCARD:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                 conn = DEF_NO;                                     /* Validate half-conn.                              */
+#endif
+                 break;
+
+
+            case NET_CONN_ERR_CONN_NONE:                            /* If NO conn'd sock found, ...                     */
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_PROTOCOL_IX:
+            case NET_CONN_ERR_INVALID_ADDR:
+            case NET_CONN_ERR_INVALID_ADDR_LEN:
+            default:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.RxDestCtr);
+                *p_err = NET_ERR_RX_DEST;                           /* ... rtn dest err.                                */
+                 return;
+        }
+    }
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+    used = NetSock_IsUsed(sock_id, &err);
+    if (used != DEF_YES) {
+        NetSock_CloseConn(conn_id);
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockCtr);
+       *p_err = NET_SOCK_ERR_INVALID_SOCK;
+        return;
+    }
+#else
+   (void)&conn_id;                                              /* Prevent possible 'variable unused' warning.          */
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK CONN ---------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err = NET_SOCK_ERR_NOT_USED;
+             return;
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err = NET_SOCK_ERR_CLOSED;
+             break;
+
+
+        case NET_SOCK_STATE_CLOSED:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+            *p_err = NET_SOCK_ERR_INVALID_OP;
+             break;
+
+
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_LISTEN:
+             if (conn != DEF_NO) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+                *p_err = NET_SOCK_ERR_INVALID_OP;
+                 return;
+             }
+             break;
+
+
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+             if (conn != DEF_YES) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+                *p_err = NET_SOCK_ERR_INVALID_OP;
+                 return;
+             }
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err = NET_SOCK_ERR_INVALID_STATE;
+             return;
+    }
+#endif
+
+
+                                                                /* ---------------- DEMUX PKT TO SOCK ----------------- */
+    rx_q_size_max_rem = NET_SOCK_DATA_SIZE_MAX - p_sock->RxQ_SizeCur;
+                                                                /* If sock rx Q full, rtn err.                          */
+    if ((p_sock->RxQ_SizeCur >= p_sock->RxQ_SizeCfgd) ||
+        (rx_q_size_max_rem   <  p_buf_hdr->DataLen)) {
+       *p_err = NET_SOCK_ERR_RX_Q_FULL;
+        return;
+    }
+
+    p_sock->RxQ_SizeCur += p_buf_hdr->DataLen;                  /* Else inc cur rx Q size.                              */
+
+
+    p_buf_tail = p_sock->RxQ_Tail;
+    if (p_buf_tail != DEF_NULL) {                               /* If sock rx Q NOT empty, insert pkt after tail.       */
+        p_buf_hdr_tail                  = &p_buf_tail->Hdr;
+        p_buf_hdr_tail->NextPrimListPtr =  p_buf;
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        q_prevly_empty                 =  DEF_NO;
+#endif
+
+    } else {                                                    /* Else add first pkt to sock rx Q.                     */
+        p_sock->RxQ_Head = p_buf;
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        q_prevly_empty   = DEF_YES;
+#endif
+    }
+
+    p_sock->RxQ_Tail           = p_buf;                         /* Insert pkt @ Q tail.                                 */
+    p_buf_hdr->PrevPrimListPtr = p_buf_tail;
+
+
+
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_DATAGRAM:
+             NetSock_RxQ_Signal(p_sock, p_err);                 /* Signal rx Q for each datagram pkt (see Note #3a).    */
+             break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+             if (q_prevly_empty == DEF_YES) {                   /* If stream rx Q prev'ly empty, ...                    */
+                 NetSock_RxQ_Signal(p_sock, p_err);             /* .. signal rx Q now non-empty (see Note #3b).         */
+             }
+             break;
+#endif
+
+        case NET_SOCK_TYPE_NONE:
+        case NET_SOCK_TYPE_FAULT:
+        default:                                                /* See Note #6.                                         */
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+            *p_err = NET_SOCK_ERR_INVALID_TYPE;
+             return;
+    }
+
+    if (*p_err != NET_SOCK_ERR_NONE) {                          /* If sock rx Q signal failed, unlink      pkt from Q.  */
+        p_buf_tail = p_buf_hdr->PrevPrimListPtr;
+        if (p_buf_tail != DEF_NULL) {                           /* If sock rx Q NOT yet empty, unlink last pkt from Q.  */
+            p_buf_hdr_tail                  = &p_buf_tail->Hdr;
+            p_buf_hdr_tail->NextPrimListPtr =  DEF_NULL;
+        } else {                                                /* Else unlink last pkt from Q.                         */
+            p_sock->RxQ_Head = DEF_NULL;
+        }
+        p_sock->RxQ_Tail           = p_buf_tail;                /* Set new sock rx Q tail.                              */
+        p_buf_hdr->PrevPrimListPtr = DEF_NULL;
+                                                                /* Dec cur sock rx Q size.                              */
+         p_sock->RxQ_SizeCur      -= p_buf_hdr->DataLen;
+        return;                                                 /* Rtn err from NetSock_RxQ_Signal().                   */
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_RxPktDiscard()
+*
+* Description : On any socket receive error(s), discard socket packet(s) & buffer(s).
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Rx(),
+*               NetSock_RxDataHandlerDatagram().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_RxPktDiscard (NET_BUF  *p_buf,
+                                    NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.Sock.RxPktDiscardedCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBufQ_PrimList((NET_BUF *)p_buf,
+                                  (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_IsValidAddrLocal()
+*
+* Description : (1) Validate a socket address as a local address :
+*
+*                   (a) Validate socket address family type
+*                   (b) Validate socket address
+*                   (c) Validate socket port number
+*
+*
+* Argument(s) : p_addr       Pointer to socket address structure             (see Notes #2a1B, #2a2, & #3).
+*
+*               addr_len    Length  of socket address structure (in octets) [see Note  #2a1C].
+*
+*               p_if_nbr     Pointer to variable that will receive the network interface number with this
+*               --------         configured local address, if available.
+*
+*                           Argument validated in NetSock_BindHandler().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket address successfully validated.
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_addr' passed a NULL pointer.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket address family.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid socket address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid socket port number.
+*
+* Return(s)   : DEF_YES, if a valid local socket address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_BindHandler().
+*
+* Note(s)     : (2) (a) (1) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the bind()
+*                           function takes the following arguments" :
+*
+*                           (A) 'socket' - "Specifies the file descriptor of the socket to be bound."
+*
+*                           (B) 'address' - "Points to a 'sockaddr' structure containing the address to be bound
+*                                to the socket.  The length and format of the address depend on the address family
+*                                of the socket."
+*
+*                           (C) 'address_len' - "Specifies the length of the 'sockaddr' structure pointed to by
+*                                the address argument."
+*
+*                       (2) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                           Section 4.4, Page 102 states that "if ... bind() is called" with :
+*
+*                           (A) "A port number of 0, the kernel chooses an ephemeral port."
+*
+*                           (B) "A wildcard ... address, the kernel does not choose the local ... address."
+*
+*                               (1) "With IPv4, the wildcard address is specified by the constant INADDR_ANY,
+*                                    whose value is normally 0."
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'bind() : ERRORS' states that "the bind()
+*                           function shall fail if" :
+*
+*                           (B) "[EAFNOSUPPORT]  - The specified address is not a valid address for the address
+*                                family of the specified socket."
+*
+*                           (C) "[EADDRNOTAVAIL] - The specified address is not available from the local machine."
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'bind() : ERRORS' states that "the bind()
+*                           function may fail if" :
+*
+*                           (A) "[EINVAL] - The 'address_len' argument is not a valid length for the address
+*                                family."
+*
+*                   See also 'NetSock_BindHandler()  Note #2'.
+*
+*               (3) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order & MUST
+*                       NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order to
+*                       network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (4) Socket connection addresses are maintained in network-order.
+*
+*               (5) Pointers to variables that return values MUST be initialized PRIOR to all other validation
+*                   or function handling in case of any error(s).
+*
+*               (6) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be compiled/linked
+*                   since 'net_sock.h' ensures that the family type configuration constant (NET_SOCK_CFG_FAMILY)
+*                   is configured with an appropriate family type value (see 'net_sock.h  CONFIGURATION ERRORS').
+*                   The 'else'-conditional code is included for completeness & as an extra precaution in case
+*                   'net_sock.h' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetSock_IsValidAddrLocal (NET_SOCK_PROTOCOL_FAMILY   protocol,
+                                               NET_SOCK_ADDR             *p_addr,
+                                               NET_SOCK_ADDR_LEN          addr_len,
+                                               NET_IF_NBR                *p_if_nbr,
+                                               NET_ERR                   *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_SOCK_ADDR_IPv4    *p_addr_ipv4;
+    NET_IPv4_ADDR          addr_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_SOCK_ADDR_IPv6    *p_addr_ipv6;
+    NET_IPv6_ADDR          addr_ipv6;
+#endif
+    NET_SOCK_ADDR_FAMILY   addr_family;
+    NET_PORT_NBR           port_nbr;
+    CPU_BOOLEAN            port_nbr_random;
+    NET_IF_NBR             if_nbr;
+
+
+   *p_if_nbr = NET_IF_NBR_NONE;                                  /* Init IF nbr for err (see Note #5).                   */
+
+
+                                                                /* ------------------- VALIDATE PTR ------------------- */
+    if (p_addr == (NET_SOCK_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NullPtrCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (DEF_NO);
+    }
+
+
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    switch (protocol) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+                                                                /* ---------------- VALIDATE ADDR LEN ----------------- */
+                                                                /* Validate addr len (see Notes #2a1C & #2b2A).         */
+             if (addr_len < (NET_SOCK_ADDR_LEN)NET_SOCK_ADDR_IPv4_SIZE) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrLenCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+                 return (DEF_NO);
+             }
+
+             p_addr_ipv4 = (NET_SOCK_ADDR_IPv4 *)p_addr;
+                                                                /* Validate addr family (see Note #3a).                 */
+
+
+             NET_UTIL_VAL_COPY_GET_HOST_16(&addr_family, &p_addr_ipv4->AddrFamily);
+             if (addr_family != NET_SOCK_ADDR_FAMILY_IP_V4) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+                 return (DEF_NO);
+             }
+                                                                /* Validate addr     (see Note #3b).                    */
+             NET_UTIL_VAL_COPY_GET_NET_32(&addr_ipv4, &p_addr_ipv4->Addr);
+             if (addr_ipv4 == NET_SOCK_ADDR_IP_V4_WILDCARD) {   /* If req'd addr = wildcard addr (see Note #2a2B), ...  */
+                 if_nbr   = NET_IF_NBR_WILDCARD;                /* ... cfg wildcard IF nbr;                        ...  */
+
+             } else {                                           /* ... else if req'd addr                          ...  */
+                 if_nbr = NetIPv4_GetAddrHostIF_Nbr(addr_ipv4);
+                 if (if_nbr == NET_IF_NBR_NONE) {               /* ... NOT any of this host's addrs,               ...  */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrCtr);
+                    *p_err =  NET_SOCK_ERR_INVALID_ADDR;         /* ... rtn err (see Note #2b1C).                        */
+                     return (DEF_NO);
+                 }
+             }
+                                                                /* Validate port nbr (see Note #3b).                    */
+             NET_UTIL_VAL_COPY_GET_NET_16(&port_nbr, &p_addr_ipv4->Port);
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+                                                                /* ---------------- VALIDATE ADDR LEN ----------------- */
+                                                                /* Validate addr len (see Notes #2a1C & #2b2A).         */
+             if (addr_len < (NET_SOCK_ADDR_LEN)NET_SOCK_ADDR_IPv6_SIZE) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrLenCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+                 return (DEF_NO);
+             }
+             p_addr_ipv6 = (NET_SOCK_ADDR_IPv6 *)p_addr;
+                                                                /* Validate addr family (see Note #3a).                 */
+             NET_UTIL_VAL_COPY_GET_HOST_16(&addr_family, &p_addr_ipv6->AddrFamily);
+             if (addr_family != NET_SOCK_ADDR_FAMILY_IP_V6) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+                 return (DEF_NO);
+             }
+                                                                /* Validate addr     (see Note #3b).                    */
+             Mem_Copy(&addr_ipv6, &p_addr_ipv6->Addr, NET_IPv6_ADDR_SIZE);
+
+             if (NetIPv6_IsAddrWildcard(&addr_ipv6)) {
+                                                                /* If req'd addr = wildcard addr (see Note #2a2B), ...  */
+                 if_nbr   = NET_IF_NBR_WILDCARD;                /* ... cfg wildcard IF nbr;                        ...  */
+
+             } else {                                           /* ... else if req'd addr                          ...  */
+                 if_nbr = NetIPv6_GetAddrHostIF_Nbr(&addr_ipv6);
+                 if (if_nbr == NET_IF_NBR_NONE) {               /* ... NOT any of this host's addrs,               ...  */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrCtr);
+                    *p_err =  NET_SOCK_ERR_INVALID_ADDR;         /* ... rtn err (see Note #2b1C).                        */
+                     return (DEF_NO);
+                 }
+             }
+                                                                /* Validate port nbr (see Note #3b).                    */
+             NET_UTIL_VAL_COPY_GET_NET_16(&port_nbr, &p_addr_ipv6->Port);
+             break;
+#endif
+
+        default:                                                /* See Note #6.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+             (void)&addr_family;                                /* Prevent 'variable unused' compiler warnings.         */
+             (void)&port_nbr;
+             (void)&port_nbr_random;
+             *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+             return (DEF_NO);
+    }
+
+   *p_if_nbr = if_nbr;
+   *p_err    = NET_SOCK_ERR_NONE;
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_IsValidAddrRemote()
+*
+* Description : (1) Validate a socket address as an appopriate remote address :
+*
+*                   (a) Validate remote socket address :
+*
+*                       (1) Validate the following socket address fields :
+*
+*                           (A) Validate socket address family type
+*                           (B) Validate socket port number
+*
+*                       (2) Validation ignores the following socket address fields :
+*
+*                           (A) Address field(s)                    Addresses will be validated by other
+*                                                                       network layers
+*
+*                   (b) Validate remote socket address to socket's connection address
+*
+*
+* Argument(s) : p_addr       Pointer to socket address structure (see Note #2).
+*
+*               addr_len    Length  of socket address structure (in octets).
+*
+*               p_sock       Pointer to socket.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket address successfully validated.
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_addr' passed a NULL pointer.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket address family.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_CONN           Invalid socket connection.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid socket address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid socket port number.
+*
+* Return(s)   : DEF_YES, if a valid remote socket address.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_Conn(),
+*               NetSock_TxDataHandler().
+*
+* Note(s)     : (2) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (3) (a) Socket connection addresses are maintained in network-order.
+*
+*                   (b) However, since the port number & address are copied from a network-order socket
+*                       address structure directly into a network-order multi-octet array, they do NOT
+*                       need to be converted from host-order to network-order.
+*
+*               (4) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*
+*               (5) (a) For datagram-type sockets, the remote address is NOT required to be static --
+*                       even if the socket is in a connected state.  In other words, any datagram-type
+*                       socket may receive or transmit from or to different remote addresses on each
+*                       or any separate socket operation.
+*
+*                   (b) (1) For stream-type sockets, the remote address MUST be static.  In other words,
+*                           a stream-type socket MUST be connected to & use the same remote address for
+*                           ALL socket operations.
+*
+*                       (2) However, if the socket is NOT yet connected; then any valid remote address
+*                           may be validated for the socket connection.
+*
+*               (6) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'SockType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  NetSock_IsValidAddrRemote (NET_SOCK_ADDR      *p_addr,
+                                                NET_SOCK_ADDR_LEN   addr_len,
+                                                NET_SOCK           *p_sock,
+                                                NET_ERR            *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_SOCK_ADDR_IPv4    *p_addr_ipv4   = DEF_NULL;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_SOCK_ADDR_IPv6    *p_addr_ipv6   = DEF_NULL;
+#endif
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NET_CONN_ID            conn_id       = NET_CONN_ID_NONE;
+    NET_CONN_ADDR_LEN      conn_addr_len = 0u;
+    CPU_INT08U             addr[NET_SOCK_ADDR_LEN_MAX];
+    CPU_BOOLEAN            cmp           = DEF_FAIL;
+    NET_ERR                err           = NET_SOCK_ERR_NONE;
+#endif
+    NET_SOCK_ADDR_FAMILY   addr_family   = NET_SOCK_ADDR_FAMILY_IP_V4;
+    NET_PORT_NBR           port_nbr      = NET_PORT_NBR_NONE;
+
+
+                                                                /* ------------------- VALIDATE PTR ------------------- */
+    if (p_addr == (NET_SOCK_ADDR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NullPtrCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (DEF_NO);
+    }
+                                                                /* ---------------- VALIDATE ADDR LEN ----------------- */
+    if (addr_len > (NET_SOCK_ADDR_LEN)NET_SOCK_ADDR_SIZE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrLenCtr);
+       *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+        return (DEF_NO);
+    }
+
+
+
+                                                                /* ------------------ VALIDATE ADDR ------------------- */
+    switch (p_addr->AddrFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_ADDR_FAMILY_IP_V4:
+             p_addr_ipv4 = (NET_SOCK_ADDR_IPv4 *)p_addr;
+                                                                /* Validate addr family (see Note #2a).                 */
+             NET_UTIL_VAL_COPY_GET_HOST_16(&addr_family, &p_addr_ipv4->AddrFamily);
+             if (addr_family != NET_SOCK_ADDR_FAMILY_IP_V4) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+                 return (DEF_NO);
+             }
+                                                                /* Validate port nbr    (see Note #2b).                 */
+             NET_UTIL_VAL_COPY_GET_NET_16(&port_nbr, &p_addr_ipv4->Port);
+             if (port_nbr == NET_SOCK_PORT_NBR_RESERVED) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidPortNbrCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_PORT_NBR;
+                 return (DEF_NO);
+             }
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_FAMILY_IP_V6:
+             p_addr_ipv6 = (NET_SOCK_ADDR_IPv6 *)p_addr;
+                                                                /* Validate addr family (see Note #2a).                 */
+             NET_UTIL_VAL_COPY_GET_HOST_16(&addr_family, &p_addr_ipv6->AddrFamily);
+             if (addr_family != NET_SOCK_ADDR_FAMILY_IP_V6) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+                 return (DEF_NO);
+             }
+                                                                /* Validate port nbr    (see Note #2b).                 */
+             NET_UTIL_VAL_COPY_GET_NET_16(&port_nbr, &p_addr_ipv6->Port);
+             if (port_nbr == NET_SOCK_PORT_NBR_RESERVED) {
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidPortNbrCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_PORT_NBR;
+                 return (DEF_NO);
+             }
+             break;
+#endif
+
+        default:                                                /* See Note #4.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+             return (DEF_NO);
+    }
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    if (p_sock != (NET_SOCK *)0) {                              /* If sock avail, chk conn status/addr.                 */
+        switch (p_sock->SockType) {
+            case NET_SOCK_TYPE_DATAGRAM:
+                 switch (p_sock->State) {
+                     case NET_SOCK_STATE_FREE:
+                     case NET_SOCK_STATE_DISCARD:
+                          NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+                         *p_err =  NET_SOCK_ERR_NOT_USED;
+                          return (DEF_NO);
+
+
+                     case NET_SOCK_STATE_CLOSED:
+                     case NET_SOCK_STATE_BOUND:
+                     case NET_SOCK_STATE_CONN:
+                                                                /* Remote addr validation NOT req'd (see Note #5a).     */
+                          break;
+
+
+                     case NET_SOCK_STATE_NONE:
+                     case NET_SOCK_STATE_CLOSED_FAULT:
+                     case NET_SOCK_STATE_LISTEN:
+                     case NET_SOCK_STATE_CONN_IN_PROGRESS:
+                     case NET_SOCK_STATE_CONN_DONE:
+                     case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+                     case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+                     default:
+                          NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+                          NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+                         *p_err =  NET_SOCK_ERR_INVALID_STATE;
+                          return (DEF_NO);
+                 }
+                 break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+            case NET_SOCK_TYPE_STREAM:
+                 switch (p_sock->State) {
+                     case NET_SOCK_STATE_FREE:
+                     case NET_SOCK_STATE_DISCARD:
+                          NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+                         *p_err =  NET_SOCK_ERR_NOT_USED;
+                          return (DEF_NO);
+
+
+                     case NET_SOCK_STATE_CLOSED_FAULT:
+                         *p_err =  NET_SOCK_ERR_CLOSED;
+                          return (DEF_NO);
+
+
+                     case NET_SOCK_STATE_CLOSED:
+                     case NET_SOCK_STATE_BOUND:
+                     case NET_SOCK_STATE_LISTEN:
+                                                                /* Remote addr validation NOT req'd (see Note #5b2).    */
+                          break;
+
+
+                     case NET_SOCK_STATE_CONN:                  /* Validate sock's conn remote addr (see Note #5b1).    */
+                     case NET_SOCK_STATE_CONN_IN_PROGRESS:
+                     case NET_SOCK_STATE_CONN_DONE:
+                     case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+                     case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+                          conn_id = p_sock->ID_Conn;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                          if (conn_id == NET_CONN_ID_NONE) {
+                              NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidConnCtr);
+                             *p_err =  NET_SOCK_ERR_INVALID_CONN;
+                              return (DEF_NO);
+                          }
+#endif
+                          Mem_Clr(&addr, NET_CONN_ADDR_LEN_MAX);
+                          switch (p_addr->AddrFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+                              case NET_SOCK_ADDR_FAMILY_IP_V4:
+                                                                /* Cfg cmp addr in net-order (see Note #3).             */
+                                   NET_UTIL_VAL_COPY_16(&addr[NET_SOCK_ADDR_IP_IX_PORT], &p_addr_ipv4->Port);
+                                   NET_UTIL_VAL_COPY_32(&addr[NET_SOCK_ADDR_IP_V4_IX_ADDR], &p_addr_ipv4->Addr);
+                                   conn_addr_len = NET_SOCK_ADDR_IP_V4_LEN_PORT_ADDR;
+                                   break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+                              case NET_SOCK_ADDR_FAMILY_IP_V6:
+                                                                /* Cfg cmp addr in net-order (see Note #3).             */
+                                   NET_UTIL_VAL_COPY_16(&addr[NET_SOCK_ADDR_IP_IX_PORT], &p_addr_ipv6->Port);
+                                   Mem_Copy(&addr[NET_SOCK_ADDR_IP_V6_IX_ADDR], &p_addr_ipv6->Addr, NET_IPv6_ADDR_SIZE);
+                                   conn_addr_len = NET_SOCK_ADDR_IP_V6_LEN_PORT_ADDR;
+                                   break;
+#endif
+
+                              default:                          /* See Note #4.                                         */
+                                   NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                                  *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+                                   return (DEF_NO);
+                          }
+
+                          cmp = NetConn_AddrRemoteCmp((NET_CONN_ID      ) conn_id,
+                                                      (CPU_INT08U      *)&addr[0],
+                                                      (NET_CONN_ADDR_LEN) conn_addr_len,
+                                                      (NET_ERR         *)&err);
+                          if (cmp != DEF_YES) {                 /* If sock's remote addr does NOT cmp, rtn err.         */
+                              NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrCtr);
+                             *p_err =  NET_SOCK_ERR_INVALID_ADDR;
+                              return (DEF_NO);
+                          }
+                          break;
+
+
+                     case NET_SOCK_STATE_NONE:
+                     default:
+                          NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+                          NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+                         *p_err =  NET_SOCK_ERR_INVALID_STATE;
+                          return (DEF_NO);
+                 }
+                 break;
+#endif
+
+            case NET_SOCK_TYPE_NONE:
+            case NET_SOCK_TYPE_FAULT:
+            default:                                            /* See Note #6.                                         */
+                 NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+                 return (DEF_NO);
+        }
+    }
+
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (DEF_YES);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_CloseHandlerStream()
+*
+* Description : (1) Close a stream-type socket :
+*
+*                   (a) Validate socket connection state
+*                   (b) Request transport layer connection close
+*                   (c) Wait on transport layer connection close
+*                   (d) Close socket
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to close.
+*               -------     Argument checked   in NetSock_Close().
+*
+*               p_sock       Pointer to a socket.
+*               ------       Argument validated in NetSock_Close().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                       Socket successfully closed.
+*                               NET_SOCK_ERR_NOT_USED                   Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                     Socket already closed.
+*                               NET_SOCK_ERR_FAULT                      Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_INVALID_STATE              Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_FAMILY             Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_CONN_CLOSE_IN_PROGRESS     Socket close already in progress.
+*                               NET_SOCK_ERR_CONN_FAIL                  Socket connection operation(s) failed.
+*
+*                                                                       -- RETURNED BY NetSock_ConnCloseWait() : ---
+*                               NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT        Socket connection close NOT signaled by
+*                                                                           timeout.
+*
+*                                                                       - RETURNED BY NetConn_ID_TransportGet() : --
+*                               NET_CONN_ERR_INVALID_CONN               Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED                   Network connection NOT currently used.
+*
+*                                                                       -- RETURNED BY Net_GlobalLockAcquire() : ---
+*                               NET_ERR_FAULT_LOCK_ACQUIRE              Network access NOT acquired.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE,  if NO error(s) [see Note #3].
+*
+*               NET_SOCK_BSD_ERR_CLOSE, otherwise.
+*
+* Caller(s)   : NetSock_Close().
+*
+* Note(s)     : (2) Network resources MUST be appropriately closed :
+*
+*                   (a) For the following socket connection close conditions, close ALL socket connections :
+*
+*                       (1) Non-connected socket states
+*                       (2) On any socket          fault(s)
+*                       (3) On any transport layer fault(s)
+*
+*                   (b) For connection-closing socket states :
+*
+*                       (1) Close socket connection
+*                       (2) Do NOT close socket    connection's reference to network connection
+*                       (3) Do NOT close transport connection(s); transport layer responsible for
+*                            closing its remaining connection(s)
+*
+*                   (c) (1) For the following socket connection close conditions ... :
+*
+*                           (A) For non-blocking, connected socket states
+*                           (B) For connection-closed       socket states
+*
+*                       (2) ... perform the following close actions :
+*
+*                           (A) Close socket connection
+*                           (B) Close socket connection's reference to network connection
+*                           (C) Do NOT close transport connection(s); transport layer responsible for
+*                                closing its remaining connection(s)
+*
+*               (3) NO BSD socket error is returned for any internal error while closing the socket.
+*
+*               (4) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be compiled/linked
+*                   since 'net_sock.h' ensures that the family type configuration constant (NET_SOCK_CFG_FAMILY)
+*                   is configured with an appropriate family type value (see 'net_sock.h  CONFIGURATION ERRORS').
+*                   The 'else'-conditional code is included for completeness & as an extra precaution in case
+*                   'net_sock.h' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  NET_SOCK_RTN_CODE  NetSock_CloseHandlerStream (NET_SOCK_ID   sock_id,
+                                                       NET_SOCK     *p_sock,
+                                                       NET_ERR      *p_err)
+{
+   NET_CONN_ID        conn_id;
+   NET_CONN_ID        conn_id_transport;
+   CPU_BOOLEAN        block;
+   NET_SOCK_RTN_CODE  rtn_code;
+   NET_ERR            err;
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+   switch (p_sock->State) {
+       case NET_SOCK_STATE_FREE:
+       case NET_SOCK_STATE_DISCARD:
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+           *p_err =  NET_SOCK_ERR_NOT_USED;
+            goto exit_err_close;
+
+
+       case NET_SOCK_STATE_CLOSED_FAULT:                        /* If already CLOSED from internal fault(s), ...        */
+            NetSock_Free(p_sock);                               /* ... sock need ONLY be freed.                         */
+           *p_err =  NET_SOCK_ERR_CLOSED;                       /* Rtn net sock err but rtn NO BSD err.                 */
+            goto exit_err_none;
+
+
+       case NET_SOCK_STATE_CLOSED:
+       case NET_SOCK_STATE_BOUND:
+            NetSock_CloseHandler(p_sock, DEF_YES, DEF_YES);     /* See Note #2a1.                                       */
+           *p_err =  NET_SOCK_ERR_NONE;
+            goto exit_err_none;
+
+
+       case NET_SOCK_STATE_LISTEN:
+       case NET_SOCK_STATE_CONN:
+       case NET_SOCK_STATE_CONN_IN_PROGRESS:
+       case NET_SOCK_STATE_CONN_DONE:
+            p_sock->State = NET_SOCK_STATE_CLOSE_IN_PROGRESS;
+            break;
+
+
+       case NET_SOCK_STATE_CLOSE_IN_PROGRESS:                   /* See Note #2b.                                        */
+       case NET_SOCK_STATE_CLOSING_DATA_AVAIL:                  /* Net conn(s) prev'ly closed? (See Note #2b)           */
+            NetSock_CloseHandler((NET_SOCK  *)p_sock,           /* See Note #2b1.                                       */
+                                 (CPU_BOOLEAN)DEF_NO,           /* See Note #2b2.                                       */
+                                 (CPU_BOOLEAN)DEF_NO);          /* See Note #2b3.                                       */
+           *p_err =  NET_SOCK_ERR_CONN_CLOSE_IN_PROGRESS;       /* Rtn net sock err ...                                 */
+                                                                /* ...  but rtn NO BSD err (see Note #3).               */
+            goto exit_err_none;
+
+
+       case NET_SOCK_STATE_NONE:
+       default:                                                 /* See Note #2a2.                                       */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_STATE;                /* Rtn net sock err but rtn NO BSD err (see Note #3).   */
+            goto exit_fault;
+   }
+
+
+
+                                                                /* ------------- REQ TRANSPORT CONN CLOSE ------------- */
+   conn_id           = p_sock->ID_Conn;
+   conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+   if (*p_err != NET_CONN_ERR_NONE) {                           /* See Note #2a2.                                       */
+        goto exit_fault;
+   }
+   if  (conn_id_transport == NET_CONN_ID_NONE) {                /* See Note #2a2.                                       */
+       *p_err  = NET_SOCK_ERR_CONN_FAIL;
+        goto exit_fault;
+   }
+
+
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+   NetTCP_TxConnReqClose((NET_TCP_CONN_ID) conn_id_transport,
+                         (CPU_INT08U     ) NET_CONN_CLOSE_FULL,
+                         (NET_ERR       *)&err);
+  *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE
+                                    : NET_SOCK_ERR_CONN_FAIL;
+#else
+  (void)&conn_id_transport;                                     /* Prevent 'variable unused' compiler warning.          */
+  *p_err =  NET_SOCK_ERR_CONN_FAIL;
+#endif
+
+#else                                                           /* See Notes #4 & #2a2.                                 */
+   NetSock_CloseSockFromClose(p_sock);
+   NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+  *p_err =  NET_SOCK_ERR_INVALID_FAMILY;                        /* Rtn net sock err ...                                 */
+   goto exit_err_none;                                          /* ... but rtn NO BSD err (see Note #3).                */
+#endif
+
+   if (*p_err != NET_SOCK_ERR_NONE) {                           /* See Note #2a3.                                       */
+        goto exit_fault;                                        /* Rtn net sock err ...                                 */
+                                                                /* ... but rtn NO BSD err (see Note #3).                */
+   }
+
+
+
+                                                                /* ----------- WAIT ON TRANSPORT CONN CLOSE ----------- */
+   block = DEF_BIT_IS_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+   if (block != DEF_YES) {                                      /* If non-blocking sock conn, ...                       */
+       NetSock_CloseHandler((NET_SOCK  *)p_sock,                /* ... close sock (see Note #2c1A).                     */
+                            (CPU_BOOLEAN)DEF_YES,               /* See Note #2c2B.                                      */
+                            (CPU_BOOLEAN)DEF_NO);               /* See Note #2c2C.                                      */
+      *p_err =  NET_SOCK_ERR_NONE;
+       goto exit_err_none;
+   }
+
+   Net_GlobalLockRelease();
+   NetSock_ConnCloseWait(p_sock, p_err);
+   Net_GlobalLockAcquire((void *)&NetSock_CloseHandlerStream, &err);
+   if (err != NET_ERR_NONE) {
+       *p_err  = err;                                           /* Rtn err from Net_GlobalLockAcquire() ...             */
+        goto exit_lock_fault;                                   /* ... but rtn NO BSD err (see Note #3).                */
+   }
+
+   switch (*p_err) {
+       case NET_SOCK_ERR_NONE:
+            break;
+
+
+       case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+            goto exit_fault;                                    /* See Note #2a2.                                       */
+                                                                /* Rtn err from NetSock_ConnCloseWait() ...             */
+                                                                /* ... but rtn NO BSD err (see Note #3).                */
+
+
+
+       case NET_SOCK_ERR_CONN_SIGNAL_ABORT:
+       case NET_SOCK_ERR_CONN_SIGNAL_FAULT:
+       default:
+           *p_err =  NET_SOCK_ERR_FAULT;                        /* See Note #2a2.                                       */
+            goto exit_fault;                                    /* Rtn net sock err but rtn NO BSD err (see Note #3).   */
+   }
+
+
+
+                                                                /* -------------------- CLOSE SOCK -------------------- */
+   NetSock_CloseHandler((NET_SOCK  *)p_sock,                    /* See Note #2c1B.                                      */
+                        (CPU_BOOLEAN)DEF_YES,                   /* See Note #2c2B.                                      */
+                        (CPU_BOOLEAN)DEF_NO);                   /* See Note #2c2C.                                      */
+
+
+  *p_err =  NET_SOCK_ERR_NONE;
+
+  (void)&sock_id;
+
+   goto exit_err_none;
+
+exit_err_close:
+   rtn_code = NET_SOCK_BSD_ERR_CLOSE;
+   goto exit_release;
+
+exit_err_none:
+   rtn_code = NET_SOCK_BSD_ERR_NONE;
+   goto exit_release;
+
+exit_lock_fault:
+exit_fault:
+   NetSock_CloseSockFromClose(p_sock);
+   rtn_code = NET_SOCK_BSD_ERR_NONE;
+
+exit_release:
+   return (rtn_code);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetSock_BindHandler()
+*
+* Description : (1) Bind a local address to a socket :
+*
+*                   (a) Handle    socket type connection
+*                   (b) Validate  socket local address
+*                   (c) Configure socket local address
+*                   (d) Search for other socket(s) with same local address              See Note #8b
+*                   (e) Add local address into socket connection
+*                       (1) Get & configure socket connection, if necessary
+*                       (2) Set socket connection local address
+*                       (3) Add socket connection into connection list
+*                   (f) Update socket connection state
+*
+*
+* Argument(s) : sock_id             Socket descriptor/handle identifier of socket to bind to a local address.
+*               -------             Argument checked in NetSock_Bind(),
+*                                                       NetSock_ConnHandlerDatagram(),
+*                                                       NetSock_ConnHandlerStream(),
+*                                                       NetSock_TxDataHandlerDatagram().
+*
+*               p_addr_local        Pointer to socket address structure             (see Notes #2b1B, #2b2, & #3).
+*
+*               addr_len            Length  of socket address structure (in octets) [see Note  #2b1C].
+*
+*               addr_random_reqd    Indicate whether a random address is requested  (see Note  #5) :
+*
+*                                       DEF_NO                      Random address NOT requested.
+*                                       DEF_YES                     Random address is  requested.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket successfully bound to local address.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_ADDR_IN_USE            Local address already in use (see Note #8a).
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*
+*                                                                   -- RETURNED BY NetSock_IsValidAddrLocal() : ---
+*                               NET_ERR_FAULT_NULL_PTR               Argument(s) passed a NULL pointer.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid local address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid local address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid local port number.
+*
+*                                                                   -- RETURNED BY NetSock_RandomPortNbrGet() : ---
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*
+*                                                                   -- RETURNED BY NetIPv4_GetAddrHostHandler() : -
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL        NO   IPv4 address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS   Interface address(s) configuration in progress.
+*
+*                                                                   -- RETURNED BY NetIPv6_GetAddrHostHandler() : -
+*                               NET_IPv6_ERR_ADDR_TBL_SIZE          Invalid IPv6 address table size.
+*                               NET_IPv6_ERR_ADDR_NONE_AVAIL        NO   IPv6 address(s) configured on interface.
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*
+*                                                                   --------- RETURNED BY NetConn_Get() : ---------
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*
+*                                                                   ------ RETURNED BY NetConn_ID_AppSet() : ------
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection(s) NOT currently used.
+*
+*                                                                   ---- RETURNED BY NetConn_AddrLocalSet() : -----
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+*                                                                   ---- RETURNED BY NetConn_AddrRemoteGet() : ----
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE, if NO error(s) [see Note #2c1].
+*
+*               NET_SOCK_BSD_ERR_BIND, otherwise      (see Note #2c2A).
+*
+* Caller(s)   : NetSock_Bind(),
+*               NetSock_ConnHandlerAddr(),
+*               NetSock_TxDataHandlerDatagram().
+*
+* Note(s)     : (2) (a) (1) IEEE Std 1003.1, 2004 Edition, Section 'bind() : DESCRIPTION' states that "the bind()
+*                           function shall assign a local socket address ... to a socket".
+*
+*                       (2) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                           Section 4.4, Page 102 states that "bind() lets us specify the ... address, the port,
+*                           both, or neither".
+*
+*                   (b) (1) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the bind()
+*                           function takes the following arguments" :
+*
+*                           (A) 'socket' - "Specifies the file descriptor of the socket to be bound."
+*
+*                           (B) 'address' - "Points to a 'sockaddr' structure containing the address to be bound
+*                                to the socket.  The length and format of the address depend on the address family
+*                                of the socket."
+*
+*                           (C) 'address_len' - "Specifies the length of the 'sockaddr' structure pointed to by
+*                                the address argument."
+*
+*                       (2) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                           Section 4.4, Page 102 states that "if ... bind() is called" with :
+*
+*                           (A) "A port number of 0, the kernel chooses an ephemeral port."
+*
+*                               (1) "bind() does not return the chosen value ... [of] an ephemeral port ... Call
+*                                    getsockname() to return the protocol address ... to obtain the value of the
+*                                    ephemeral port assigned by the kernel."
+*
+*                           (B) "A wildcard ... address, the kernel does not choose the local ... address until
+*                                either the socket is connected (TCP) or a datagram is sent on the socket (UDP)."
+*
+*                               (1) "With IPv4, the wildcard address is specified by the constant INADDR_ANY,
+*                                    whose value is normally 0."
+*
+*                   (c) IEEE Std 1003.1, 2004 Edition, Section 'bind() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, bind() shall return 0;" ...
+*
+*                       (2) (A) "Otherwise, -1 shall be returned," ...
+*                           (B) "and 'errno' shall be set to indicate the error."
+*                               'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   (d) (1) IEEE Std 1003.1, 2004 Edition, Section 'bind() : ERRORS' states that "the bind()
+*                           function shall fail if" :
+*
+*                           (A) "[EBADF] - The 'socket' argument is not a valid file descriptor."
+*
+*                           (B) "[EAFNOSUPPORT]  - The specified address is not a valid address for the address
+*                                family of the specified socket."
+*
+*                           (C) "[EADDRNOTAVAIL] - The specified address is not available from the local machine."
+*
+*                           (D) "[EADDRINUSE]    - The specified address is already in use."
+*
+*                               See also Note #8a.
+*
+*                           (E) "[EINVAL]" -
+*
+*                               (1) (a) "The socket is already bound to an address,"                  ...
+*                                   (b) "and the protocol does not support binding to a new address;" ...
+*
+*                               (2) "or the socket has been shut down."
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'bind() : ERRORS' states that "the bind()
+*                           function may fail if" :
+*
+*                           (A) "[EINVAL]  - The 'address_len' argument is not a valid length for the address
+*                                family."
+*
+*                           (B) "[EISCONN] - The socket is already connected."
+*
+*                           (C) "[ENOBUFS] - Insufficient resources were available to complete the call."
+*
+*               (3) (a) Socket connection addresses MUST be maintained in network-order.
+*
+*                   (b) However, since the port number & address are copied from a network-order socket address
+*                       structure into local variables & then into a network-order multi-octet array, they do NOT
+*                       need to be converted from host-order to network-order.
+*
+*               (4) (a) For datagram-type sockets, the local & remote addresses are NOT required to be static --
+*                       even if the socket is in a "connected" state.  In other words, any datagram-type socket
+*                       may bind to different local addresses on each or any separate socket operation.
+*
+*                   (b) For stream-type sockets, the local & remote addresses MUST be static.  In other words,
+*                       a stream-type socket may bind only once to a single local address.
+*
+*               (5) If a random local address is requested, configure the local address with ...
+*
+*                   (a) A random port number obtained from the random port number queue; ...
+*                   (b) This host's primary/default protocol address.
+*
+*               (6) (a) Default case already invalidated in NetSock_Open().  However, the default case is included
+*                       as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*                   (b) Default case already invalidated in NetSock_Open().  However, the default case is included
+*                       as an extra precaution in case 'Protocol' is incorrectly modified.
+*
+*               (7) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be compiled/linked
+*                   since 'net_sock.h' ensures that the family type configuration constant (NET_SOCK_CFG_FAMILY)
+*                   is configured with an appropriate family type value (see 'net_sock.h  CONFIGURATION ERRORS').
+*                   The 'else'-conditional code is included for completeness & as an extra precaution in case
+*                   'net_sock.h' is incorrectly modified.
+*
+*               (8) (a) (1) Multiple socket connections with the same local & remote address -- both
+*                           addresses & port numbers -- is NOT currently supported.
+*
+*                       (2) Therefore, when updating a socket connection, it is necessary to search the
+*                           connection lists for any other connection with the same local & remote address.
+*
+*                       (3) Since datagram-type sockets' remote address is NOT required to be static,
+*                           datagram-type sockets in a "connected" state MUST search the connection lists
+*                           for a connection with the same local & remote address.
+*
+*                           See also 'NetSock_ConnHandlerDatagram()  Note #2b'.
+*
+*                   (b) (1) Also, multiple socket connections with only a local address but the same local
+*                           address -- both address & port number -- is NOT currently supported.
+*
+*                       (2) Therefore, when adding or updating a socket connection with only a local address,
+*                           it is necessary to search the connection lists for any other connection with the
+*                           same local address.
+*
+*                       (3) Thus the option for sockets to reuse the same local address is NOT currently
+*                           supported even if the socket reuse option (SO_REUSEADDR) is requested.
+*
+*                           See 'net_sock.c  Note #1d1'.
+*
+*                   See also 'NetSock_ConnHandlerAddrRemoteValidate()  Note #5'.
+*********************************************************************************************************
+*/
+
+static  NET_SOCK_RTN_CODE  NetSock_BindHandler (NET_SOCK_ID         sock_id,
+                                                NET_SOCK_ADDR      *p_addr_local,
+                                                NET_SOCK_ADDR_LEN   addr_len,
+                                                CPU_BOOLEAN         addr_random_reqd,
+                                                NET_SOCK_ADDR      *p_addr_dest,
+                                                NET_ERR            *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+          NET_SOCK_ADDR_IPv4    *p_addr_ipv4;
+          NET_IPv4_ADDR          addr_ip_hostv4;
+          NET_IPv4_ADDR          addr_ip_netv4;
+          NET_IPv4_ADDR          addr_ip_tblv4[NET_IPv4_CFG_IF_MAX_NBR_ADDR];
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+          NET_SOCK_ADDR_IPv6    *p_addr_ipv6;
+    const NET_IPv6_ADDRS        *p_addr_ip_hostv6;
+          NET_IPv6_ADDR          addr_ip_netv6;
+#endif
+#ifdef  NET_IP_MODULE_EN
+          NET_IP_ADDRS_QTY       addr_ip_tbl_qty;
+#endif
+          NET_PROTOCOL_TYPE      protocol;
+          CPU_BOOLEAN            valid;
+          CPU_BOOLEAN            conn_avail;
+          CPU_BOOLEAN            addr_over_wr;
+          CPU_BOOLEAN            port_random_reqd;
+          NET_PORT_NBR           port_nbr_host;
+          NET_PORT_NBR           port_nbr_net;
+          CPU_INT08U             addr_local[NET_SOCK_ADDR_LEN_MAX];
+          CPU_INT08U             addr_remote[NET_SOCK_ADDR_LEN_MAX];
+          NET_CONN_ADDR_LEN      addr_len_chk_size;
+          NET_CONN_ADDR_LEN      addr_remote_len;
+          CPU_INT08U            *p_addr_remote;
+          NET_SOCK              *p_sock;
+          NET_SOCK_STATE         sock_state;
+          NET_CONN_FAMILY        conn_family;
+          NET_CONN_PROTOCOL_IX   conn_protocol_ix;
+          NET_CONN_ID            conn_id;
+          NET_CONN_ID            conn_id_srch;
+          NET_IF_NBR             if_nbr;
+          NET_ERR                err;
+
+                                                                /* ----------------- HANDLE SOCK TYPE ----------------- */
+    p_sock = &NetSock_Tbl[sock_id];
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_DATAGRAM:                            /* See Note #4a.                                        */
+             switch (p_sock->State) {
+                 case NET_SOCK_STATE_FREE:
+                 case NET_SOCK_STATE_DISCARD:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+                     *p_err =  NET_SOCK_ERR_NOT_USED;
+                      return (NET_SOCK_BSD_ERR_BIND);
+
+
+                 case NET_SOCK_STATE_CLOSED_FAULT:
+                     *p_err =  NET_SOCK_ERR_CLOSED;
+                      return (NET_SOCK_BSD_ERR_BIND);
+
+
+                 case NET_SOCK_STATE_CLOSED:
+                      conn_avail    = DEF_NO;
+                      addr_over_wr  = DEF_NO;
+                      p_addr_remote = DEF_NULL;
+                      sock_state    = NET_SOCK_STATE_BOUND;
+                      break;
+
+
+                 case NET_SOCK_STATE_BOUND:
+                      conn_avail    = DEF_YES;
+                      addr_over_wr  = DEF_YES;
+                      p_addr_remote = DEF_NULL;
+                      sock_state    = NET_SOCK_STATE_BOUND;
+                      break;
+
+
+                 case NET_SOCK_STATE_CONN:
+                      conn_avail      =  DEF_YES;
+                      addr_over_wr    =  DEF_YES;
+                                                                /* Get sock's remote addr.                              */
+                      conn_id         =  p_sock->ID_Conn;
+                      addr_remote_len =  sizeof(addr_remote);
+                      NetConn_AddrRemoteGet((NET_CONN_ID        ) conn_id,
+                                            (CPU_INT08U        *)&addr_remote[0],
+                                            (NET_CONN_ADDR_LEN *)&addr_remote_len,
+                                            (NET_ERR           *) p_err);
+                      if (*p_err != NET_CONN_ERR_NONE) {
+                           return (NET_SOCK_BSD_ERR_BIND);
+                      }
+                      p_addr_remote = &addr_remote[0];
+
+                      sock_state    =  NET_SOCK_STATE_CONN;
+                      break;
+
+
+                 case NET_SOCK_STATE_NONE:
+                 case NET_SOCK_STATE_LISTEN:
+                 case NET_SOCK_STATE_CONN_IN_PROGRESS:
+                 case NET_SOCK_STATE_CONN_DONE:
+                 case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+                 case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+                 default:
+                      NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+                     *p_err =  NET_SOCK_ERR_INVALID_STATE;
+                      return (NET_SOCK_BSD_ERR_BIND);
+             }
+             break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:                              /* See Note #4b.                                        */
+             switch (p_sock->State) {
+                 case NET_SOCK_STATE_FREE:
+                 case NET_SOCK_STATE_DISCARD:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+                     *p_err =  NET_SOCK_ERR_NOT_USED;
+                      return (NET_SOCK_BSD_ERR_BIND);
+
+
+                 case NET_SOCK_STATE_CLOSED_FAULT:
+                     *p_err =  NET_SOCK_ERR_CLOSED;
+                      return (NET_SOCK_BSD_ERR_BIND);
+
+
+                 case NET_SOCK_STATE_CLOSED:
+                      conn_avail    =  DEF_NO;
+                      addr_over_wr  =  DEF_NO;
+                      p_addr_remote = (CPU_INT08U *)0;
+                      sock_state    =  NET_SOCK_STATE_BOUND;
+                      break;
+
+
+                 case NET_SOCK_STATE_BOUND:                     /* See Note #2d1E1.                                     */
+                 case NET_SOCK_STATE_LISTEN:
+                 case NET_SOCK_STATE_CONN:                      /* See Note #2d2B.                                      */
+                 case NET_SOCK_STATE_CONN_IN_PROGRESS:
+                 case NET_SOCK_STATE_CONN_DONE:
+                 case NET_SOCK_STATE_CLOSE_IN_PROGRESS:         /* See Note #2d1E2.                                     */
+                 case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+                     *p_err =  NET_SOCK_ERR_INVALID_OP;
+                      return (NET_SOCK_BSD_ERR_BIND);
+
+
+                 case NET_SOCK_STATE_NONE:
+                 default:
+                      NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+                     *p_err =  NET_SOCK_ERR_INVALID_STATE;
+                      return (NET_SOCK_BSD_ERR_BIND);
+             }
+             break;
+#endif
+
+        case NET_SOCK_TYPE_NONE:
+        case NET_SOCK_TYPE_FAULT:
+        default:                                                /* See Note #6a.                                        */
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+             return (NET_SOCK_BSD_ERR_BIND);
+    }
+
+
+
+                                                                /* --------------- VALIDATE LOCAL ADDR ---------------- */
+    if (addr_random_reqd != DEF_YES) {                          /* If random addr NOT req'd, ...                        */
+                                                                /* ... validate local addr (see Note #2b1B).            */
+        valid = NetSock_IsValidAddrLocal(p_sock->ProtocolFamily,
+                                         p_addr_local,
+                                         addr_len,
+                                        &if_nbr,
+                                         p_err);
+        if (valid != DEF_YES) {
+            return  (NET_SOCK_BSD_ERR_BIND);
+        }
+
+        if (if_nbr == NET_IF_NBR_WILDCARD) {                    /* If the IF is not defined (wildcard addr case), ...   */
+            if_nbr  = p_sock->IF_Nbr;                           /* ...set the IF to the one specified by the socket.    */
+        }
+    }
+
+
+                                                                /* ----------------- CFG LOCAL ADDR ------------------- */
+    switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+             if (addr_random_reqd != DEF_YES) {                 /* If random addr NOT req'd, ...                        */
+                 p_addr_ipv4 = (NET_SOCK_ADDR_IPv4 *)p_addr_local;/* ... cfg req'd local addr (see Note #3).            */
+                 NET_UTIL_VAL_COPY_16(&port_nbr_net,  &p_addr_ipv4->Port);
+                 NET_UTIL_VAL_COPY_32(&addr_ip_netv4, &p_addr_ipv4->Addr);
+                                                                /* Chk random port nbr req'd (see Note #2b2A).          */
+                 port_nbr_host    =  NET_UTIL_NET_TO_HOST_16(port_nbr_net);
+                 port_random_reqd = (port_nbr_host == NET_SOCK_PORT_NBR_RANDOM) ? DEF_YES : DEF_NO;
+
+             } else {                                           /* Else cfg random port/this host's addr (see Note #5). */
+                 port_random_reqd =  DEF_YES;
+
+                 if_nbr = p_sock->IF_Nbr;                       /* Set the IF to the one specified by the socket.       */
+                 if (if_nbr == NET_IF_NBR_NONE) {               /* IF not IF is defined in the socket structure, ...    */
+                     if_nbr  = NetIF_GetDflt();                 /* ... get the default IF.                              */
+                 }
+
+                 addr_ip_tbl_qty  =  sizeof(addr_ip_tblv4) / sizeof(NET_IPv4_ADDR);
+                (void)NetIPv4_GetAddrHostHandler((NET_IF_NBR        ) if_nbr,
+                                                 (NET_IPv4_ADDR    *)&addr_ip_tblv4[0],
+                                                 (NET_IP_ADDRS_QTY *)&addr_ip_tbl_qty,
+                                                 (NET_ERR          *) p_err);
+                 if (*p_err != NET_IPv4_ERR_NONE) {
+                      return (NET_SOCK_BSD_ERR_BIND);
+                 }
+
+                 addr_ip_hostv4 = addr_ip_tblv4[0];
+                 addr_ip_netv4  = NET_UTIL_HOST_TO_NET_32(addr_ip_hostv4);
+             }
+
+             switch (p_sock->SockType) {
+                 case NET_SOCK_TYPE_STREAM:
+                      protocol = NET_PROTOCOL_TYPE_TCP_V4;
+                      break;
+
+                 case NET_SOCK_TYPE_DATAGRAM:
+                      protocol = NET_PROTOCOL_TYPE_UDP_V4;
+                      break;
+
+                 default:
+                     *p_err = NET_SOCK_ERR_FAULT;
+                      return (NET_SOCK_BSD_ERR_BIND);
+             }
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+                                                                /* See Note #7.                                         */
+             if (addr_random_reqd != DEF_YES) {                 /* If random addr NOT req'd, ...                        */
+                 p_addr_ipv6 = (NET_SOCK_ADDR_IPv6 *)p_addr_local;/* ... cfg req'd local addr (see Note #3).            */
+                 NET_UTIL_VAL_COPY_16(&port_nbr_net,  &p_addr_ipv6->Port);
+
+                 Mem_Copy(&addr_ip_netv6, &p_addr_ipv6->Addr, NET_IPv6_ADDR_SIZE);
+                                                                /* Chk random port nbr req'd (see Note #2b2A).          */
+                 port_nbr_host    =  NET_UTIL_NET_TO_HOST_16(port_nbr_net);
+                 port_random_reqd = (port_nbr_host == NET_SOCK_PORT_NBR_RANDOM) ? DEF_YES : DEF_NO;
+
+             } else {                                           /* Else cfg random port/this host's addr (see Note #5). */
+                 port_random_reqd =  DEF_YES;
+                 p_addr_ipv6 =  (NET_SOCK_ADDR_IPv6 *)p_addr_dest;
+                 p_addr_ip_hostv6 = NetIPv6_GetAddrSrcHandler(                       &if_nbr,
+                                                             (const  NET_IPv6_ADDR *) DEF_NULL,
+                                                             (const  NET_IPv6_ADDR *)&p_addr_ipv6->Addr,
+                                                                                      DEF_NULL,
+                                                                                      p_err);
+                 if (*p_err != NET_IPv6_ERR_NONE) {
+                      return (NET_SOCK_BSD_ERR_BIND);
+                 }
+
+                 Mem_Copy(&addr_ip_netv6, p_addr_ip_hostv6->AddrHost.Addr, NET_IPv6_ADDR_SIZE);
+             }
+
+             switch (p_sock->SockType) {
+                 case NET_SOCK_TYPE_STREAM:
+                      protocol = NET_PROTOCOL_TYPE_TCP_V4;
+                      break;
+
+                 case NET_SOCK_TYPE_DATAGRAM:
+                      protocol = NET_PROTOCOL_TYPE_UDP_V4;
+                      break;
+
+                 default:
+                     *p_err = NET_SOCK_ERR_FAULT;
+                      return (NET_SOCK_BSD_ERR_BIND);
+             }
+             break;
+#endif
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+             return (NET_SOCK_BSD_ERR_BIND);
+    }
+
+    if (port_random_reqd == DEF_YES) {                          /* If random port req'd, ...                            */
+
+        port_nbr_host = NetSock_RandomPortNbrGet(protocol, p_err); /* ... get random port nbr (see Note #5a).           */
+        if (*p_err != NET_SOCK_ERR_NONE) {
+             return (NET_SOCK_BSD_ERR_BIND);
+        }
+        port_nbr_net  = NET_UTIL_HOST_TO_NET_16(port_nbr_host);
+    }
+
+
+
+                                                                /* ------- SRCH FOR LOCAL ADDR IN CONN LIST(S) -------- */
+    switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+                                                                /* Cfg local addr as net-order sock addr (see Note #3). */
+             Mem_Clr(&addr_local, NET_SOCK_ADDR_LEN_MAX);
+             NET_UTIL_VAL_COPY_16(&addr_local[NET_SOCK_ADDR_IP_IX_PORT], &port_nbr_net);
+             NET_UTIL_VAL_COPY_32(&addr_local[NET_SOCK_ADDR_IP_V4_IX_ADDR], &addr_ip_netv4);
+
+                                                                /* Cfg conn srch.                                       */
+             conn_family       = NET_CONN_FAMILY_IP_V4_SOCK;
+             addr_len_chk_size = NET_SOCK_ADDR_LEN_IP_V4;
+             switch (p_sock->Protocol) {
+                 case NET_SOCK_PROTOCOL_UDP:
+                      conn_protocol_ix = NET_CONN_PROTOCOL_IX_IP_V4_UDP;
+                      break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+                 case NET_SOCK_PROTOCOL_TCP:
+                      conn_protocol_ix = NET_CONN_PROTOCOL_IX_IP_V4_TCP;
+                      break;
+#endif
+
+                 case NET_SOCK_PROTOCOL_NONE:
+                 default:                                       /* See Note #6b.                                        */
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                     *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+                      return (NET_SOCK_BSD_ERR_BIND);
+             }
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+             Mem_Clr(&addr_local, NET_SOCK_ADDR_LEN_MAX);
+             NET_UTIL_VAL_COPY_16(&addr_local[NET_SOCK_ADDR_IP_IX_PORT], &port_nbr_net);
+             Mem_Copy(&addr_local[NET_SOCK_ADDR_IP_V6_IX_ADDR], &addr_ip_netv6, NET_IPv6_ADDR_SIZE);
+
+                                                                /* Cfg conn srch.                                       */
+             conn_family       = NET_CONN_FAMILY_IP_V6_SOCK;
+             addr_len_chk_size = NET_SOCK_ADDR_LEN_IP_V6;
+             switch (p_sock->Protocol) {
+                 case NET_SOCK_PROTOCOL_UDP:
+                      conn_protocol_ix = NET_CONN_PROTOCOL_IX_IP_V6_UDP;
+                      break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+                 case NET_SOCK_PROTOCOL_TCP:
+                      conn_protocol_ix = NET_CONN_PROTOCOL_IX_IP_V6_TCP;
+                      break;
+#endif
+
+                 case NET_SOCK_PROTOCOL_NONE:
+                 default:                                       /* See Note #6b.                                        */
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                     *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+                      return (NET_SOCK_BSD_ERR_BIND);
+             }
+             break;
+#endif
+
+        default:
+                                                                /* See Note #7.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+             return (NET_SOCK_BSD_ERR_BIND);
+    }
+
+                                                                /* Srch for sock conn with identical ...                */
+                                                                /* ... local &/or remote addrs (see Note #8).           */
+    conn_id_srch = NetConn_Srch(conn_family,
+                                conn_protocol_ix,
+                               &addr_local[0],
+                                p_addr_remote,
+                                addr_len_chk_size,
+                                0,
+                                0,
+                               &err);
+    switch (err) {
+        case NET_CONN_ERR_CONN_NONE:                            /* NO sock with identical local or remote addrs found.  */
+        case NET_CONN_ERR_CONN_HALF_WILDCARD:
+        case NET_CONN_ERR_CONN_FULL_WILDCARD:
+             break;
+
+
+        case NET_CONN_ERR_CONN_HALF:                            /* If  half- conn'd sock found                ...       */
+             if (p_addr_remote != (CPU_INT08U *)0) {             /* ... but remote addr avail (see Note #8b2), ...       */
+                 break;                                         /* ... allow valid bind.                                */
+             }
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_CONN_ERR_CONN_FULL'.       */
+
+        case NET_CONN_ERR_CONN_FULL:                            /* If  fully conn'd sock found; ...                     */
+             if (conn_id_srch == p_sock->ID_Conn) {              /* ... but = sock's conn,       ...                     */
+                *p_err =  NET_SOCK_ERR_NONE;
+                 return (NET_SOCK_BSD_ERR_NONE);                /* ... rtn valid bind;          ...                     */
+             }
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrInUseCtr);
+            *p_err =  NET_SOCK_ERR_ADDR_IN_USE;                  /* ... else rtn err (see Note #8a).                     */
+             return (NET_SOCK_BSD_ERR_BIND);
+
+
+        case NET_CONN_ERR_INVALID_ADDR:
+        case NET_CONN_ERR_INVALID_ADDR_LEN:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidAddrCtr);
+            *p_err =  NET_SOCK_ERR_CONN_FAIL;
+             return (NET_SOCK_BSD_ERR_BIND);
+    }
+
+
+                                                                /* ----------- ADD LOCAL ADDR TO SOCK CONN ------------ */
+    if (conn_avail != DEF_YES) {                                /* If NO conn prev'ly avail, get/cfg sock conn.         */
+        conn_id = NetConn_Get(conn_family, conn_protocol_ix, p_err);
+        if (*p_err != NET_CONN_ERR_NONE) {
+             return (NET_SOCK_BSD_ERR_BIND);
+        }
+
+        p_sock->ID_Conn = conn_id;                               /* Set sock's conn id.                                  */
+        NetConn_ID_AppSet((NET_CONN_ID)conn_id,
+                          (NET_CONN_ID)p_sock->ID,
+                          (NET_ERR   *)p_err);
+        if (*p_err != NET_CONN_ERR_NONE) {
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             return (NET_SOCK_BSD_ERR_BIND);
+        }
+
+    } else {
+        conn_id = p_sock->ID_Conn;                               /* Else get sock's conn id.                             */
+    }
+
+                                                                /* Set  sock's local addr.                              */
+    NetConn_AddrLocalSet(conn_id,
+                         if_nbr,
+                         addr_local,
+                         addr_len_chk_size,
+                         addr_over_wr,
+                         p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+         return (NET_SOCK_BSD_ERR_BIND);
+    }
+
+
+    NetConn_ListUnlink(conn_id, &err);                          /* Unlink sock conn from conn list, if necessary.       */
+    if (err != NET_CONN_ERR_NONE) {
+        NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+       *p_err = NET_SOCK_ERR_CONN_FAIL;
+        return (NET_SOCK_BSD_ERR_BIND);
+    }
+
+    NetConn_ListAdd(conn_id, &err);                             /* Add    sock conn into conn list (see Note #8b).      */
+    if (err != NET_CONN_ERR_NONE) {
+        NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+       *p_err = NET_SOCK_ERR_CONN_FAIL;
+        return (NET_SOCK_BSD_ERR_BIND);
+    }
+
+
+                                                                /* -------------- UPDATE SOCK CONN STATE -------------- */
+    p_sock->State = sock_state;
+
+
+    (void)&p_addr_dest;
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (NET_SOCK_BSD_ERR_NONE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_ConnHandlerDatagram()
+*
+* Description : (1) Connect a datagram-type socket to a remote address :
+*
+*                   (a) Validate socket connection state
+*                   (b) Prepare  socket connection address(s)
+*                   (c) Update   socket connection state
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to connect.
+*               -------         Argument checked   in NetSock_Conn().
+*
+*               p_sock           Pointer to socket.
+*               ------           Argument validated in NetSock_Conn().
+*
+*               p_addr_remote    Pointer to socket address structure.
+*               -------------    Argument checked   in NetSock_Conn().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket successfully connected.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*
+*                                                                   --- RETURNED BY NetSock_ConnHandlerAddr() : ---
+*                               NET_ERR_FAULT_NULL_PTR               Argument(s) passed a NULL pointer.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid socket address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid socket port number.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*                               NET_SOCK_ERR_ADDR_IN_USE            Socket address    already in use.
+*                               NET_SOCK_ERR_CONN_IN_USE            Socket connection already in use.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL          NO        address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS     Interface address(s) configuration in progress.
+*
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_NOT_USED               Network connection(s) NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT     in use.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_CONN, otherwise.
+*
+* Caller(s)   : NetSock_Conn().
+*
+* Note(s)     : (2) (a) For datagram-type sockets, the remote address does NOT require any connection.  The
+*                       pseudo-connection provides a remote address to allow datagram-type sockets to use
+*                       stream-type sockets' send & receive functions -- NetSock_RxData() & NetSock_TxData().
+*
+*                   (b) In addition, the remote address is NOT required to be static -- even if the socket
+*                       is in a "connected" state.  In other words, any datagram-type socket may "connect"
+*                       to different remote addresses on each or any separate socket operation.
+*********************************************************************************************************
+*/
+
+static  NET_SOCK_RTN_CODE  NetSock_ConnHandlerDatagram (NET_SOCK_ID     sock_id,
+                                                        NET_SOCK       *p_sock,
+                                                        NET_SOCK_ADDR  *p_addr_remote,
+                                                        NET_ERR        *p_err)
+{
+    CPU_BOOLEAN  addr_remote_validate;
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err =  NET_SOCK_ERR_NOT_USED;
+             return (NET_SOCK_BSD_ERR_CONN);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;
+             return (NET_SOCK_BSD_ERR_CONN);
+
+
+        case NET_SOCK_STATE_CLOSED:
+        case NET_SOCK_STATE_BOUND:
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+             addr_remote_validate = DEF_YES;
+#else
+             addr_remote_validate = DEF_NO;
+#endif
+             break;
+
+
+        case NET_SOCK_STATE_CONN:                               /* See Note #2b.                                        */
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+             addr_remote_validate = DEF_YES;
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        case NET_SOCK_STATE_LISTEN:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        default:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;
+             return (NET_SOCK_BSD_ERR_CONN);
+    }
+
+
+                                                                /* ------------ PREPARE SOCK CONN ADDR(S) ------------- */
+    NetSock_ConnHandlerAddr(sock_id, p_sock, p_addr_remote, addr_remote_validate, DEF_YES, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return (NET_SOCK_BSD_ERR_CONN);
+    }
+
+
+                                                                /* -------------- UPDATE SOCK CONN STATE -------------- */
+    p_sock->State = NET_SOCK_STATE_CONN;
+
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (NET_SOCK_BSD_ERR_NONE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_ConnHandlerStream()
+*
+* Description : (1) Connect a stream-type socket to a remote address :
+*
+*                   (a) Validate socket connection state                                See Note #4
+*                   (b) Prepare  socket connection address(s)
+*                   (c) Initiate transport layer connection :
+*                       (1) Get      transport connection
+*                       (2) Transmit transport connection request
+*                       (3) Wait on  transport connection to connect
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to connect.
+*               -------         Argument checked   in NetSock_Conn().
+*
+*               p_sock           Pointer to socket.
+*               ------           Argument validated in NetSock_Conn().
+*
+*               p_addr_remote    Pointer to socket address structure.
+*               -------------    Argument checked   in NetSock_Conn().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket successfully connected.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid socket address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_ERR_IF_LINK_DOWN              Socket connection's interface link down.
+*
+*                                                                   --- RETURNED BY NetSock_ConnHandlerStreamWait() : ----
+*                               NET_SOCK_ERR_CONN_IN_PROGRESS       Socket connection in progress.
+*                               NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT    Socket connection request NOT signaled within timeout.
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+*                                                                   ------ RETURNED BY NetSock_ConnHandlerAddr() : -------
+*                               NET_ERR_FAULT_NULL_PTR               Argument(s) passed a NULL pointer.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid socket port number.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*                               NET_SOCK_ERR_ADDR_IN_USE            Socket address    already in use.
+*                               NET_SOCK_ERR_CONN_IN_USE            Socket connection already in use.
+*
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL          NO        address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS     Interface address(s) configuration in progress.
+*
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_NOT_USED               Network connection(s) NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT     in use.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_CONN, otherwise.
+*
+* Caller(s)   : NetSock_Conn().
+*
+* Note(s)     : (2) (a) For stream-type sockets, the remote address MUST be static.  In other words,
+*                       a stream-type socket MUST be connected to & use the same remote address for
+*                       ALL socket operations.
+*
+*                   (b) In addition, the socket MUST be connected to the remote address PRIOR to any
+*                       data transmit or receive operation.
+*
+*                   (c) Stream-type sockets may connect to remote addresses from the following states :
+*
+*                       (1) CLOSED
+*                       (2) BOUND                                          See Note #2d
+*                       (3) LISTEN                                         See Note #2d
+*
+*                   (d) Stream-type sockets MUST be bound to a valid local address that is NOT a
+*                       protocol's wildcard address.
+*
+*               (3) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*
+*               (4) Socket descriptor write availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor write handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also  Note #1a,
+*                            'NetSock_SelDescHandlerWrStream()   Note #3',
+*                          & 'NetSock_SelDescHandlerErrStream()  Note #3'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  NET_SOCK_RTN_CODE  NetSock_ConnHandlerStream (NET_SOCK_ID     sock_id,
+                                                      NET_SOCK       *p_sock,
+                                                      NET_SOCK_ADDR  *p_addr_remote,
+                                                      NET_ERR        *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR      addr_srcv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_ADDR      addr_srcv6;
+    CPU_BOOLEAN        is_addr_wildcard;
+#endif
+#ifdef  NET_IP_MODULE_EN
+    NET_CONN_ADDR_LEN  addr_len;
+    CPU_INT08U         addr_local[NET_SOCK_ADDR_LEN_MAX];
+#endif
+    CPU_BOOLEAN        addr_remote_validate;
+    NET_CONN_ID        conn_id;
+    NET_CONN_ID        conn_id_transport;
+    NET_SOCK_RTN_CODE  rtn_code;
+    NET_ERR            err;
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err =  NET_SOCK_ERR_NOT_USED;
+             return (NET_SOCK_BSD_ERR_CONN);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;
+             return (NET_SOCK_BSD_ERR_CONN);
+
+
+        case NET_SOCK_STATE_CLOSED:                             /* See Note #2c1.                                       */
+             break;
+
+
+        case NET_SOCK_STATE_BOUND:                              /* Chk valid local addr (see Note #2d).                 */
+        case NET_SOCK_STATE_LISTEN:
+#ifdef  NET_IP_MODULE_EN
+             conn_id  = p_sock->ID_Conn;
+             addr_len = sizeof(addr_local);
+             NetConn_AddrLocalGet((NET_CONN_ID        ) conn_id,
+                                  (CPU_INT08U        *)&addr_local[0],
+                                  (NET_CONN_ADDR_LEN *)&addr_len,
+                                  (NET_ERR           *) p_err);
+             if (*p_err != NET_CONN_ERR_NONE) {
+                  return (NET_SOCK_BSD_ERR_CONN);
+             }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+             if (addr_len > NET_SOCK_ADDR_LEN_MAX) {
+                 NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+                *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+                 return (NET_SOCK_BSD_ERR_CONN);
+             }
+#endif
+
+            switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+                case NET_SOCK_FAMILY_IP_V4:
+                     NET_UTIL_VAL_COPY_GET_NET_32(&addr_srcv4, &addr_local[NET_SOCK_ADDR_IP_V4_IX_ADDR]);
+                                                                /* If wildcard addr, ...                                */
+                     if (addr_srcv4 == NET_SOCK_ADDR_IP_V4_WILDCARD) {
+                        *p_err =  NET_SOCK_ERR_INVALID_ADDR;    /* ... rtn invalid addr.                                */
+                         return (NET_SOCK_BSD_ERR_CONN);
+                     }
+                     break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+                case NET_SOCK_FAMILY_IP_V6:
+                     Mem_Copy(&addr_srcv6, &addr_local[NET_SOCK_ADDR_IP_V6_IX_ADDR], NET_IPv6_ADDR_SIZE);
+
+                     is_addr_wildcard = Mem_Cmp(&addr_srcv6, &NET_SOCK_ADDR_IP_V6_WILDCARD, NET_IPv6_ADDR_SIZE);
+
+                     if (is_addr_wildcard == DEF_YES) {         /* If wildcard addr, ...                                */
+                        *p_err =  NET_SOCK_ERR_INVALID_ADDR;    /* ... rtn invalid addr.                                */
+                         return (NET_SOCK_BSD_ERR_CONN);
+                     }
+                     break;
+#endif
+
+                default:
+                     NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+                     NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                    *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+                     return (NET_SOCK_BSD_ERR_CONN);
+
+             }
+             break;
+#else                                                           /* See Note #3.                                         */
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+             return (NET_SOCK_BSD_ERR_CONN);
+#endif
+
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+             rtn_code = NetSock_ConnHandlerStreamWait(sock_id, p_sock, p_err);
+             return (rtn_code);
+
+
+        case NET_SOCK_STATE_CONN_DONE:
+             p_sock->State = NET_SOCK_STATE_CONN;
+            *p_err         = NET_SOCK_ERR_NONE;
+             return (NET_SOCK_BSD_ERR_NONE);
+
+
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_OP;
+             return (NET_SOCK_BSD_ERR_CONN);
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+            (void)&conn_id;                                     /* Prevent possible 'variable unused' warning.          */
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;
+             return (NET_SOCK_BSD_ERR_CONN);
+    }
+
+
+
+                                                                /* ------------ PREPARE SOCK CONN ADDR(S) ------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    addr_remote_validate = DEF_YES;
+#else
+    addr_remote_validate = DEF_NO;
+#endif
+
+    NetSock_ConnHandlerAddr(sock_id, p_sock, p_addr_remote, addr_remote_validate, DEF_NO, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return (NET_SOCK_BSD_ERR_CONN);
+    }
+
+
+
+                                                                /* ---------------- GET TRANSPORT CONN ---------------- */
+    conn_id_transport = NetSock_GetConnTransport(p_sock, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+         return (NET_SOCK_BSD_ERR_CONN);
+    }
+
+                                                                /* ------- SET TRANSPORT CONNECTION PARAMETERS -------- */
+    if (p_sock->RxQ_SizeCfgd != NET_TCP_DFLT_RX_WIN_SIZE_OCTET) {
+        NetTCP_ConnCfgRxWinSizeHandler(conn_id_transport, p_sock->RxQ_SizeCfgd, p_err);
+        if (*p_err != NET_TCP_ERR_NONE) {
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             return (NET_SOCK_BSD_ERR_CONN);
+        }
+    }
+
+    if (p_sock->TxQ_SizeCfgd != NET_TCP_DFLT_TX_WIN_SIZE_OCTET) {
+        NetTCP_ConnCfgTxWinSizeHandler(conn_id_transport, p_sock->TxQ_SizeCfgd, p_err);
+        if (*p_err != NET_TCP_ERR_NONE) {
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             return (NET_SOCK_BSD_ERR_CONN);
+        }
+    }
+
+
+                                                                /* --------------- INIT TRANSPORT CONN ---------------- */
+#ifdef  NET_TCP_MODULE_EN
+    switch (p_addr_remote->AddrFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_ADDR_FAMILY_IP_V4:
+             NetTCP_TxConnReq(conn_id_transport, &err);
+             switch (err) {
+                 case NET_TCP_ERR_NONE:
+                     *p_err = NET_SOCK_ERR_NONE;
+                      break;
+
+
+                      case NET_TCP_ERR_CONN_NOT_USED:
+                      case NET_TCP_ERR_CONN_FAULT:
+                      case NET_TCP_ERR_CONN_CLOSE:
+                      case NET_TCP_ERR_INVALID_CONN:
+                      case NET_TCP_ERR_INVALID_CONN_STATE:
+                      case NET_TCP_ERR_TX_PKT:
+                          *p_err = NET_SOCK_ERR_FAULT;
+                           break;
+
+
+                      case NET_ERR_IF_LINK_DOWN:
+                      case NET_ERR_IF_LOOPBACK_DIS:
+                          *p_err = NET_ERR_IF_LINK_DOWN;
+                           break;
+
+
+        case NET_INIT_ERR_NOT_COMPLETED:
+                      default:
+                          *p_err = NET_ERR_TX;
+                           break;
+              }
+              break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_ADDR_FAMILY_IP_V6:
+             NetTCP_TxConnReq(conn_id_transport, &err);
+             switch (err) {
+                 case NET_TCP_ERR_NONE:
+                     *p_err = NET_SOCK_ERR_NONE;
+                      break;
+
+
+                      case NET_TCP_ERR_CONN_NOT_USED:
+                      case NET_TCP_ERR_CONN_FAULT:
+                      case NET_TCP_ERR_CONN_CLOSE:
+                      case NET_TCP_ERR_INVALID_CONN:
+                      case NET_TCP_ERR_INVALID_CONN_STATE:
+                      case NET_TCP_ERR_TX_PKT:
+                          *p_err = NET_SOCK_ERR_FAULT;
+                           break;
+
+
+                      case NET_ERR_IF_LINK_DOWN:
+                      case NET_ERR_IF_LOOPBACK_DIS:
+                          *p_err = NET_ERR_IF_LINK_DOWN;
+                           break;
+
+
+                      default:
+                          *p_err = NET_ERR_TX;
+                           break;
+              }
+              break;
+#endif
+
+        default:                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+             return (NET_SOCK_BSD_ERR_CONN);
+        }
+#else
+        (void)&conn_id_transport;                               /* Prevent 'variable unused' compiler warning.          */
+        *p_err =  NET_ERR_TX;
+#endif
+
+
+    switch (*p_err) {
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_SOCK_ERR_NONE:
+        case NET_ERR_TX:
+             break;
+
+
+        case NET_SOCK_ERR_FAULT:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             return (NET_SOCK_BSD_ERR_CONN);
+
+
+        default:
+             return (NET_SOCK_BSD_ERR_CONN);
+    }
+
+
+
+                                                                /* -------------- WAIT ON TRANSPORT CONN -------------- */
+    rtn_code = NetSock_ConnHandlerStreamWait(sock_id, p_sock, p_err);
+
+
+    return (rtn_code);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_ConnHandlerStreamWait()
+*
+* Description :  (1) Wait for a  stream-type socket to connect to a remote address :
+*
+*                    (a) Wait on stream-type socket to connect
+*                    (b) Update socket connection state
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to connect.
+*               -------     Argument checked   in NetSock_Conn().
+*
+*               p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_Conn().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket successfully connected.
+*                               NET_SOCK_ERR_CONN_IN_PROGRESS       Socket connection in progress.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*
+*                                                                   -- RETURNED BY NetSock_ConnReqWait() : ---
+*                               NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT    Socket connection request NOT signaled
+*                                                                       within timeout.
+*
+*                                                                   - RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE, if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_CONN, otherwise.
+*
+* Caller(s)   : NetSock_ConnHandlerStream().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  NET_SOCK_RTN_CODE  NetSock_ConnHandlerStreamWait (NET_SOCK_ID   sock_id,
+                                                          NET_SOCK     *p_sock,
+                                                          NET_ERR      *p_err)
+{
+    NET_SOCK_STATE     sock_state;
+    NET_SOCK_RTN_CODE  rtn_code;
+    CPU_BOOLEAN        block;
+    CPU_BOOLEAN        secure;
+    NET_ERR            err;
+
+
+                                                                /* ---------------- WAIT ON SOCK CONN ----------------- */
+    block         = DEF_BIT_IS_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+    sock_state    = p_sock->State;
+    secure        = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+    p_sock->State = NET_SOCK_STATE_CONN_IN_PROGRESS;
+    if ((block  != DEF_YES) &&
+        (secure != DEF_YES)){                                   /* If non-blocking sock conn and non-secure...         */
+        *p_err =  NET_SOCK_ERR_CONN_IN_PROGRESS;                /* ... rtn not-yet-conn'd err.                          */
+         goto exit_err_none;
+    }
+
+                                                                /* ---------------- WAIT ON SOCK CONN ----------------- */
+    sock_state = p_sock->State;
+    Net_GlobalLockRelease();
+    NetSock_ConnReqWait(p_sock, p_err);
+    Net_GlobalLockAcquire((void *)&NetSock_ConnHandlerStreamWait, &err);
+    if (err != NET_ERR_NONE) {
+       *p_err  = err;                                           /* Rtn err from Net_GlobalLockAcquire().                */
+        goto exit_lock_fault;
+    }
+    switch (*p_err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+
+        case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+                                                                /* Rtn err from NetSock_ConnReqWait().                  */
+             return (NET_SOCK_BSD_ERR_CONN);
+
+
+        case NET_SOCK_ERR_CONN_SIGNAL_ABORT:
+             p_sock->State = sock_state;
+            *p_err = NET_SOCK_ERR_CONN_FAIL;
+             goto exit_err_conn;
+
+
+        case NET_SOCK_ERR_CONN_SIGNAL_FAULT:
+        default:
+             p_sock->State = sock_state;
+            *p_err         = NET_SOCK_ERR_FAULT;
+             goto exit_err_conn;
+    }
+
+
+                                                                /* -------------- UPDATE SOCK CONN STATE -------------- */
+    p_sock->State = NET_SOCK_STATE_CONN;
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+   (void)&sock_id;
+
+    goto exit_err_none;
+
+
+exit_lock_fault:
+    return (NET_SOCK_BSD_ERR_CONN);
+
+exit_err_conn:
+    rtn_code = NET_SOCK_BSD_ERR_CONN;
+    goto exit_release;
+
+exit_err_none:
+   rtn_code = NET_SOCK_BSD_ERR_NONE;
+
+exit_release:
+    return (rtn_code);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_ConnHandlerAddr()
+*
+* Description : (1) Connect a socket to a remote address :
+*
+*                   (a) Validate remote address for socket connection
+*                   (b) Prepare  socket for remote connection :
+*                       (1) Bind to local address, if necessary
+*                   (c) Add remote address into socket connection
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to connect.
+*               -------         Argument checked   in NetSock_Conn().
+*
+*               p_sock          Pointer to socket.
+*               ------          Argument validated in NetSock_Conn().
+*
+*               p_addr_remote   Pointer to socket address structure.
+*               -------------   Argument checked   in NetSock_Conn().
+*
+*               addr_validate   Validate remote address :
+*               -------------
+*                                   DEF_NO                      Do NOT validate  remote address.
+*                                   DEF_YES                            Validate  remote address.
+*
+*                               Argument validated in NetSock_ConnHandlerDatagram(),
+*                                                     NetSock_ConnHandlerStream().
+*
+*               addr_over_wr    Allow remote address overwrite :
+*               ------------
+*                                   DEF_NO                      Do NOT overwrite remote address.
+*                                   DEF_YES                            Overwrite remote address.
+*
+*                               Argument validated in NetSock_ConnHandlerDatagram(),
+*                                                     NetSock_ConnHandlerStream().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket successfully connected.
+*
+*                                                                   - RETURNED BY NetSock_ConnHandlerAddrRemoteValidate() : -
+*                               NET_SOCK_ERR_CONN_IN_USE            Socket connection already in use.
+*
+*                                                                   --- RETURNED BY NetSock_ConnHandlerAddrLocalBind() : ----
+*                               NET_ERR_FAULT_NULL_PTR               Argument(s) passed a NULL pointer.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid local address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid local address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid local port number.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*                               NET_SOCK_ERR_ADDR_IN_USE            Local address already in use.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL          NO        address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS     Interface address(s) configuration in progress.
+*
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_NOT_USED               Network connection(s) NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT     in use.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnHandlerDatagram(),
+*               NetSock_ConnHandlerStream().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_ConnHandlerAddr (NET_SOCK_ID     sock_id,
+                                       NET_SOCK       *p_sock,
+                                       NET_SOCK_ADDR  *p_addr_remote,
+                                       CPU_BOOLEAN     addr_validate,
+                                       CPU_BOOLEAN     addr_over_wr,
+                                       NET_ERR        *p_err)
+{
+
+                                                                /* ---------- VALIDATE SOCK CONN REMOTE ADDR ---------- */
+    if (addr_validate == DEF_YES) {
+        NetSock_ConnHandlerAddrRemoteValidate(p_sock, p_addr_remote, p_err);
+        if (*p_err != NET_SOCK_ERR_NONE) {
+             return;
+        }
+    }
+
+                                                                /* ----------- PREPARE SOCK FOR REMOTE CONN ----------- */
+    if (p_sock->State == NET_SOCK_STATE_CLOSED) {                /* If sock closed, bind to local addr.                  */
+        NetSock_ConnHandlerAddrLocalBind(sock_id, p_addr_remote, p_err);
+        if (*p_err != NET_SOCK_ERR_NONE) {
+             return;
+        }
+    }
+                                                                /* ----------- ADD REMOTE ADDR TO SOCK CONN ----------- */
+                                                                /* Set sock's remote addr.                              */
+    NetSock_ConnHandlerAddrRemoteSet(p_sock, p_addr_remote, addr_over_wr, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return;
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_ConnHandlerAddrLocalBind()
+*
+* Description : (1) Bind a connecting socket to a local address :
+*
+*                   (a) Configure local address to :
+*                       (1) Specific host address for remote address, if available
+*                       (2) Default  host address,                    otherwise
+*
+*                   (b) Bind to   local address
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to connect.
+*               -------         Argument checked in NetSock_Conn().
+*
+*               p_addr_remote   Pointer to socket address structure.
+*               -------------   Argument checked in NetSock_Conn().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket successfully connected.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*
+*                                                                   ----- RETURNED BY NetSock_BindHandler() : -----
+*                               NET_ERR_FAULT_NULL_PTR               Argument(s) passed a NULL pointer.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid local address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid local address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid local port number.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*                               NET_SOCK_ERR_ADDR_IN_USE            Local address already in use.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL          NO        address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS     Interface address(s) configuration in progress.
+*
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_NOT_USED               Network connection(s) NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT     in use.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnHandlerAddr().
+*
+* Note(s)     : (2) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (3) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_ConnHandlerAddrLocalBind (NET_SOCK_ID     sock_id,
+                                                NET_SOCK_ADDR  *p_addr_remote,
+                                                NET_ERR        *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+           NET_SOCK_ADDR_IPv4  *p_addr_ipv4;
+           NET_SOCK_ADDR_IPv4   addr_ipv4_local;
+           NET_IPv4_ADDR        addr_ipv4_remote;
+           NET_IPv4_ADDR        addr_ipv4_host;
+#endif
+#ifdef NET_IPv6_MODULE_EN
+    const  NET_IPv6_ADDRS      *pipv6_addrs;
+           NET_SOCK_ADDR_IPv6  *p_addr_ipv6;
+           NET_SOCK_ADDR_IPv6   addr_ipv6_local;
+           NET_IF_NBR           if_nbr;
+           CPU_BOOLEAN          addr_ipv6_unspecified;
+#endif
+           NET_SOCK_ADDR       *p_addr_local;
+           NET_SOCK_ADDR_LEN    addr_len;
+           CPU_BOOLEAN          addr_random;
+
+                                                                    /* ---------------- CFG LOCAL ADDR ---------------- */
+    switch (p_addr_remote->AddrFamily) {
+ #ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_ADDR_FAMILY_IP_V4:
+
+             p_addr_ipv4 = (NET_SOCK_ADDR_IPv4 *)p_addr_remote;
+             NET_UTIL_VAL_COPY_GET_NET_32(&addr_ipv4_remote, &p_addr_ipv4->Addr);
+
+             addr_ipv4_host =  NetIPv4_GetAddrSrcHandler(addr_ipv4_remote);
+             if (addr_ipv4_host != NET_IPv4_ADDR_NONE) {
+                 p_addr_ipv4 = (NET_SOCK_ADDR_IPv4 *)&addr_ipv4_local;
+                 NET_UTIL_VAL_SET_HOST_16    (&p_addr_ipv4->AddrFamily, NET_SOCK_ADDR_FAMILY_IP_V4);
+                 NET_UTIL_VAL_SET_NET_16     (&p_addr_ipv4->Port,       NET_SOCK_PORT_NBR_RANDOM);
+                 NET_UTIL_VAL_COPY_SET_NET_32(&p_addr_ipv4->Addr,      &addr_ipv4_host);
+                 Mem_Clr((void     *)&p_addr_ipv4->Unused[0],
+                         (CPU_SIZE_T) NET_SOCK_ADDR_IPv4_NBR_OCTETS_UNUSED);
+
+                 p_addr_local = (NET_SOCK_ADDR   *)&addr_ipv4_local;
+                 addr_len    = (NET_SOCK_ADDR_LEN) sizeof(addr_ipv4_local);
+                 addr_random =  DEF_NO;
+
+             } else {
+                 p_addr_local = (NET_SOCK_ADDR   *)0;
+                 addr_len    = (NET_SOCK_ADDR_LEN)0;
+                 addr_random =  DEF_YES;
+             }
+             break;
+#endif
+
+#ifdef NET_IPv6_MODULE_EN
+        case NET_SOCK_ADDR_FAMILY_IP_V6:
+
+             p_addr_ipv6  = (NET_SOCK_ADDR_IPv6 *)p_addr_remote;
+             pipv6_addrs  = NetIPv6_GetAddrSrcHandler(                        &if_nbr,
+                                                      (const  NET_IPv6_ADDR *) DEF_NULL,
+                                                      (const  NET_IPv6_ADDR *)&p_addr_ipv6->Addr,
+                                                                               DEF_NULL,
+                                                                               p_err);
+             if (pipv6_addrs == (NET_IPv6_ADDRS *)0) {
+                 *p_err  = NET_SOCK_ERR_INVALID_ADDR;
+                  return;
+             }
+
+             addr_ipv6_unspecified = NetIPv6_IsAddrUnspecified(&pipv6_addrs->AddrHost);
+             if (addr_ipv6_unspecified == DEF_NO) {
+                 p_addr_ipv6 = (NET_SOCK_ADDR_IPv6 *)&addr_ipv6_local;
+                 NET_UTIL_VAL_SET_HOST_16(&p_addr_ipv6->AddrFamily, NET_SOCK_ADDR_FAMILY_IP_V6);
+                 NET_UTIL_VAL_SET_NET_16 (&p_addr_ipv6->Port,       NET_SOCK_PORT_NBR_RANDOM);
+
+                 Mem_Copy(&p_addr_ipv6->Addr, &pipv6_addrs->AddrHost, NET_IPv6_ADDR_SIZE);
+
+                 p_addr_ipv6->FlowInfo = 0u;
+                 p_addr_ipv6->ScopeID  = 0u;
+
+                 p_addr_local = (NET_SOCK_ADDR   *)&addr_ipv6_local;
+                 addr_len     = (NET_SOCK_ADDR_LEN) sizeof(addr_ipv6_local);
+                 addr_random  =  DEF_NO;
+             } else {
+                 p_addr_local = (NET_SOCK_ADDR   *)0;
+                 addr_len     = (NET_SOCK_ADDR_LEN)0;
+                 addr_random  =  DEF_YES;
+             }
+             break;
+#endif
+
+        default:                                                    /* See Note #3.                                     */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+            *p_err = NET_SOCK_ERR_INVALID_FAMILY;
+             return;
+    }
+
+                                                                    /* -------------- BIND TO LOCAL ADDR -------------- */
+   (void)NetSock_BindHandler((NET_SOCK_ID      )sock_id,
+                             (NET_SOCK_ADDR   *)p_addr_local,
+                             (NET_SOCK_ADDR_LEN)addr_len,
+                             (CPU_BOOLEAN      )addr_random,
+                             (NET_SOCK_ADDR   *)p_addr_remote,
+                             (NET_ERR         *)p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return;
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                               NetSock_ConnHandlerAddrRemoteValidate()
+*
+* Description : (1) Validate socket remote address :
+*
+*                   (a) Validate socket connection                                  See Note #5c
+*                   (b) Search for other socket connection(s) with same
+*                           local/remote addresses                                  See Note #5
+*
+*
+* Argument(s) : p_sock           Pointer to socket.
+*               ------           Argument validated in NetSock_Conn().
+*
+*               p_addr_remote    Pointer to socket address structure.
+*               -------------    Argument checked   in NetSock_Conn().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket remote address validated.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_CONN_IN_USE            Socket connection already in use.
+*
+*                                                                   -- RETURNED BY NetConn_AddrLocalGet() : --
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnHandlerAddr().
+*
+* Note(s)     : (2) (a) Socket connection addresses MUST be maintained in network-order.
+*
+*                   (b) However, since the port number & address are copied from a network-order socket
+*                       address structure directly into a network-order multi-octet array, they do NOT
+*                       need to be converted from host-order to network-order.
+*
+*               (3) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*
+*               (4) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'Protocol' is incorrectly modified.
+*
+*               (5) (a) (1) Multiple socket connections with the same local & remote address -- both
+*                           addresses & port numbers -- is NOT currently supported.
+*
+*                       (2) Therefore, when updating a socket connection, it is necessary to search the
+*                           connection lists for any other connection with the same local & remote address.
+*
+*                       (3) Since datagram-type sockets' remote address is NOT required to be static,
+*                           datagram-type sockets in a "connected" state MUST search the connection lists
+*                           for a connection with the same local & remote address.
+*
+*                           See also 'NetSock_ConnHandlerDatagram()  Note #2b'.
+*
+*                   (b) (1) Also, multiple socket connections with only a local address but the same local
+*                           address -- both address & port number -- is NOT currently supported.
+*
+*                       (2) Therefore, when adding or updating a socket connection with only a local address,
+*                           it is necessary to search the connection lists for any other connection with the
+*                           same local address.
+*
+*                       (3) Thus the option for sockets to reuse the same local address is NOT currently
+*                           supported even if the socket reuse option (SO_REUSEADDR) is requested.
+*
+*                           See 'net_sock.c  Note #1d1'.
+*
+*                   See also 'NetSock_BindHandler()  Note #8'.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_ConnHandlerAddrRemoteValidate (NET_SOCK       *p_sock,
+                                                     NET_SOCK_ADDR  *p_addr_remote,
+                                                     NET_ERR        *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_SOCK_ADDR_IPv4    *p_addr_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_SOCK_ADDR_IPv6    *p_addr_ipv6;
+#endif
+    CPU_INT08U             addr_remote[NET_SOCK_ADDR_LEN_MAX];
+    CPU_INT08U             addr_local[NET_SOCK_ADDR_LEN_MAX];
+    NET_CONN_ADDR_LEN      addr_local_len;
+    NET_CONN_ID            conn_id;
+    NET_CONN_ID            conn_id_srch;
+    NET_CONN_FAMILY        conn_family;
+    NET_CONN_PROTOCOL_IX   conn_protocol_ix;
+    NET_ERR                err;
+
+
+                                                                /* ---------------- VALIDATE SOCK CONN ---------------- */
+    conn_id = p_sock->ID_Conn;
+    if (conn_id == NET_CONN_ID_NONE) {                          /* If NO sock conn, rtn no err (see Note #5c).          */
+       *p_err = NET_SOCK_ERR_NONE;
+        return;
+    }
+
+
+                                                                /* --------------- CFG SOCK REMOTE ADDR --------------- */
+    switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_FAMILY_IP_V4:
+             p_addr_ipv4 = (NET_SOCK_ADDR_IPv4 *)p_addr_remote;   /* Cfg remote addr as net-order sock addr (see Note #2).*/
+             NET_UTIL_VAL_COPY_16(&addr_remote[NET_SOCK_ADDR_IP_IX_PORT], &p_addr_ipv4->Port);
+             NET_UTIL_VAL_COPY_32(&addr_remote[NET_SOCK_ADDR_IP_V4_IX_ADDR], &p_addr_ipv4->Addr);
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_FAMILY_IP_V6:
+             p_addr_ipv6 = (NET_SOCK_ADDR_IPv6 *)p_addr_remote;   /* Cfg remote addr as net-order sock addr (see Note #2).*/
+             NET_UTIL_VAL_COPY_16(&addr_remote[NET_SOCK_ADDR_IP_IX_PORT], &p_addr_ipv6->Port);
+             Mem_Copy(&addr_remote[NET_SOCK_ADDR_IP_V6_IX_ADDR], &p_addr_ipv6->Addr, NET_IPv6_ADDR_SIZE);
+             break;
+#endif
+
+        default:                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+            *p_err = NET_SOCK_ERR_INVALID_FAMILY;
+             return;
+    }
+
+
+                                                                /* ---- SRCH FOR LOCAL/REMOTE CONN IN CONN LIST(S) ---- */
+                                                                /* Get local  addr from sock conn.                      */
+    addr_local_len = sizeof(addr_local);
+    NetConn_AddrLocalGet((NET_CONN_ID        ) conn_id,
+                         (CPU_INT08U        *)&addr_local[0],
+                         (NET_CONN_ADDR_LEN *)&addr_local_len,
+                         (NET_ERR           *) p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+        return;
+    }
+    if (addr_local_len != NET_SOCK_ADDR_LEN_MAX) {
+       *p_err = NET_SOCK_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+
+                                                                /* Cfg conn srch.                                       */
+#ifdef  NET_IP_MODULE_EN
+    switch (p_sock->Protocol) {
+        case NET_SOCK_PROTOCOL_UDP:
+             switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+                 case NET_SOCK_FAMILY_IP_V4:
+                      conn_family      = NET_CONN_FAMILY_IP_V4_SOCK;
+                      conn_protocol_ix = NET_CONN_PROTOCOL_IX_IP_V4_UDP;
+                      break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+                 case NET_SOCK_FAMILY_IP_V6:
+                      conn_family      = NET_CONN_FAMILY_IP_V6_SOCK;
+                      conn_protocol_ix = NET_CONN_PROTOCOL_IX_IP_V6_UDP;
+                      break;
+#endif
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                     *p_err = NET_SOCK_ERR_INVALID_FAMILY;
+                      return;
+             }
+             break;
+
+
+#ifdef  NET_TCP_MODULE_EN
+        case NET_SOCK_PROTOCOL_TCP:
+             switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+                 case NET_SOCK_FAMILY_IP_V4:
+                      conn_family      = NET_CONN_FAMILY_IP_V4_SOCK;
+                      conn_protocol_ix = NET_CONN_PROTOCOL_IX_IP_V4_TCP;
+                      break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+                 case NET_SOCK_FAMILY_IP_V6:
+                      conn_family      = NET_CONN_FAMILY_IP_V6_SOCK;
+                      conn_protocol_ix = NET_CONN_PROTOCOL_IX_IP_V6_TCP;
+                      break;
+#endif
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                     *p_err = NET_SOCK_ERR_INVALID_FAMILY;
+                      return;
+             }
+             break;
+#endif
+
+        case NET_SOCK_PROTOCOL_NONE:
+        default:                                                /* See Note #4.                                         */
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+            *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+#else                                                           /* See Note #3.                                         */
+    NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+   *p_err = NET_SOCK_ERR_INVALID_FAMILY;
+    return;
+#endif
+
+                                                                /* Srch for sock conn with identical local/remote addrs.*/
+    conn_id_srch = NetConn_Srch((NET_CONN_FAMILY     ) conn_family,
+                                (NET_CONN_PROTOCOL_IX) conn_protocol_ix,
+                                (CPU_INT08U         *)&addr_local[0],
+                                (CPU_INT08U         *)&addr_remote[0],
+                                (NET_CONN_ADDR_LEN   ) NET_SOCK_ADDR_LEN_MAX,
+                                (NET_CONN_ID        *) 0,
+                                (NET_CONN_ID        *) 0,
+                                (NET_ERR            *)&err);
+    if ( err == NET_CONN_ERR_CONN_FULL) {                       /* If local/remote addrs already conn'd, ...            */
+        if (conn_id_srch == p_sock->ID_Conn) {                   /* ... but = sock's conn,                ...            */
+           *p_err = NET_SOCK_ERR_NONE;                           /* ... rtn valid conn remote addr;       ...            */
+            return;
+        }
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidConnInUseCtr);
+       *p_err = NET_SOCK_ERR_CONN_IN_USE;                        /* ... else rtn err (see Note #5).                      */
+        return;
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_ConnHandlerAddrRemoteSet()
+*
+* Description : Set socket's remote address.
+*
+* Argument(s) : p_sock              Pointer to socket.
+*               ------              Argument validated in NetSock_Conn().
+*
+*               p_addr_remote       Pointer to socket address structure.
+*               -------------       Argument checked   in NetSock_ConnHandlerAddrRemoteValidate().
+*
+*               addr_over_wr        Allow remote address overwrite :
+*               ------------
+*                                       DEF_NO                      Do NOT overwrite remote address.
+*                                       DEF_YES                            Overwrite remote address.
+*
+*                                   Argument validated in NetSock_ConnHandlerDatagram(),
+*                                                         NetSock_ConnHandlerStream().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket remote address successfully set.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*
+*                                                                   - RETURNED BY NetConn_AddrRemoteSet() : --
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnHandlerAddr().
+*
+* Note(s)     : (1) (a) Socket connection addresses MUST be maintained in network-order.
+*
+*                   (b) However, since the port number & address are copied from a network-order socket
+*                       address structure directly into a network-order multi-octet array, they do NOT
+*                       need to be converted from host-order to network-order.
+*
+*               (2) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_ConnHandlerAddrRemoteSet (NET_SOCK       *p_sock,
+                                                NET_SOCK_ADDR  *p_addr_remote,
+                                                CPU_BOOLEAN     addr_over_wr,
+                                                NET_ERR        *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_SOCK_ADDR_IPv4  *p_addr_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_SOCK_ADDR_IPv6  *p_addr_ipv6;
+#endif
+    CPU_INT08U           addr_remote[NET_SOCK_ADDR_LEN_MAX];
+    NET_CONN_ID          conn_id;
+
+                                                                /* --------------- CFG SOCK REMOTE ADDR --------------- */
+    Mem_Clr(&addr_remote, NET_SOCK_ADDR_LEN_MAX);
+    switch (p_addr_remote->AddrFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_FAMILY_IP_V4:
+             p_addr_ipv4 = (NET_SOCK_ADDR_IPv4 *)p_addr_remote;   /* Cfg remote addr as net-order sock addr (see Note #1).*/
+             NET_UTIL_VAL_COPY_16(&addr_remote[NET_SOCK_ADDR_IP_IX_PORT], &p_addr_ipv4->Port);
+             NET_UTIL_VAL_COPY_32(&addr_remote[NET_SOCK_ADDR_IP_V4_IX_ADDR], &p_addr_ipv4->Addr);
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_FAMILY_IP_V6:
+             p_addr_ipv6 = (NET_SOCK_ADDR_IPv6 *)p_addr_remote;   /* Cfg remote addr as net-order sock addr (see Note #1).*/
+             NET_UTIL_VAL_COPY_16(&addr_remote[NET_SOCK_ADDR_IP_IX_PORT], &p_addr_ipv6->Port);
+             Mem_Copy(&addr_remote[NET_SOCK_ADDR_IP_V6_IX_ADDR], &p_addr_ipv6->Addr, NET_IPv6_ADDR_SIZE);
+             break;
+#endif
+
+        default:                                                /* See Note #2.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+            *p_err = NET_SOCK_ERR_INVALID_FAMILY;
+             return;
+    }
+
+                                                                /* --------------- SET SOCK REMOTE ADDR --------------- */
+    conn_id = p_sock->ID_Conn;
+    NetConn_AddrRemoteSet((NET_CONN_ID      ) conn_id,
+                          (CPU_INT08U      *)&addr_remote[0],
+                          (NET_CONN_ADDR_LEN) NET_SOCK_ADDR_LEN_MAX,
+                          (CPU_BOOLEAN      ) addr_over_wr,
+                          (NET_ERR         *) p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+         return;
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_ConnAcceptQ_Init()
+*
+* Description : Initialize a stream-type socket's connection accept queue.
+*
+* Argument(s) : p_sock          Pointer to a socket.
+*               ------          Argument validated in NetSock_Listen().
+*
+*               sock_q_size     Maximum number of connection requests to accept & queue on listen socket.
+*
+*                                   NET_SOCK_Q_SIZE_NONE                    NO custom configuration for socket's
+*                                                                               connection accept queue maximum
+*                                                                               size; configure to default maximum :
+*                                                                               NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX.
+*
+*                                <= NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX     Custom configure socket's connection
+*                                                                               accept queue maximum size.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Listen().
+*
+* Note(s)     : (1) Some socket controls were previously initialized in NetSock_Clr() when the socket
+*                   was allocated.  These socket controls do NOT need to be re-initialized but are
+*                   shown for completeness.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  void  NetSock_ConnAcceptQ_Init (NET_SOCK         *p_sock,
+                                        NET_SOCK_Q_SIZE   sock_q_size)
+{
+    NET_SOCK_Q_SIZE  accept_q_size;
+
+
+    if (sock_q_size != NET_SOCK_Q_SIZE_NONE) {                      /* If     conn accept Q size cfg'd, ..              */
+        if (sock_q_size > 0) {                                      /* .. lim conn accept Q size;       ..              */
+            accept_q_size = (sock_q_size > NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX) ? NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX
+                                                                                : sock_q_size;
+        } else {
+            accept_q_size =  NET_SOCK_Q_SIZE_MIN;
+        }
+    } else {                                                        /* .. else cfg to dflt max size.                    */
+        accept_q_size = NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX;
+    }
+
+    p_sock->ConnAcceptQ_SizeMax = accept_q_size;                     /* Cfg listen sock conn accept Q max size.          */
+
+                                                                    /* Init conn accept Q ctrls.                        */
+#if 0                                                               /* Init'd in NetSock_Clr() [see Note #1].           */
+    p_sock->ConnAcceptQ_SizeCur = 0u;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_ConnAcceptQ_Clr()
+*
+* Description : Clear a stream-type socket's connection accept queue.
+*
+* Argument(s) : p_sock       Pointer to a socket.
+*               ------       Argument validated in NetSock_ConnSignalAccept(),
+*                                                  NetSock_FreeHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnSignalAccept(),
+*               NetSock_FreeHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  void  NetSock_ConnAcceptQ_Clr (NET_SOCK  *p_sock)
+{
+    NET_SOCK_ACCEPT_Q_OBJ  *p_obj = DEF_NULL;
+    CPU_BOOLEAN             done;
+
+
+                                                                    /* -------------- VALIDATE SOCK TYPE -------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+        return;
+    }
+
+                                                                    /* -------------- CLR CONN ACCEPT Q --------------- */
+    done = DEF_NO;
+    while (done == DEF_NO) {
+        SLIST_MEMBER  *p_node;
+        LIB_ERR        err_lib;
+
+
+        p_node = SList_Pop(&p_sock->ConnAcceptQ_Ptr);
+
+        if (p_node == DEF_NULL) {
+            done = DEF_YES;
+        } else {
+            p_obj = SLIST_ENTRY(p_node, NET_SOCK_ACCEPT_Q_OBJ, ListNode);
+
+            NetConn_CloseFromApp(p_obj->ConnID, DEF_YES);
+            p_sock->ConnChildQ_SizeCur--;
+
+            Mem_DynPoolBlkFree(&NetSock_AcceptQ_ObjPool, p_obj, &err_lib);
+        }
+    }
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_ConnAcceptQ_IsAvail()
+*
+* Description : Check if socket's connection accept queue is available to queue a new connection.
+*
+* Argument(s) : p_sock       Pointer to a socket.
+*               ------       Argument validated in NetSock_ListenQ_IsAvail().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection accept queue successfully
+*                                                                   checked; check return value for socket
+*                                                                   connection accept queue availability.
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type; i.e. NOT stream-type.
+*
+* Return(s)   : DEF_YES, if socket connection accept queue is available to queue a new connection.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_ListenQ_IsAvail().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN  NetSock_ConnAcceptQ_IsAvail (NET_SOCK  *p_sock,
+                                                  NET_ERR   *p_err)
+{
+    NET_SOCK_Q_SIZE  conn_q_size_cur;
+    NET_SOCK_Q_SIZE  conn_q_size_max;
+    CPU_BOOLEAN      q_avail;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* -------------- VALIDATE SOCK TYPE -------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+       *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+        return (DEF_NO);
+    }
+#endif
+
+                                                                    /* --------- CHK SOCK CONN ACCEPT Q AVAIL --------- */
+    if (p_sock->ConnChildQ_SizeMax == NET_SOCK_Q_SIZE_UNLIMITED) {
+        conn_q_size_cur = p_sock->ConnAcceptQ_SizeCur;
+        conn_q_size_max = p_sock->ConnAcceptQ_SizeMax;
+    } else {
+        conn_q_size_cur = p_sock->ConnChildQ_SizeCur + p_sock->ConnAcceptQ_SizeCur;
+        conn_q_size_max = p_sock->ConnChildQ_SizeMax;
+    }
+
+    q_avail = (conn_q_size_cur >= conn_q_size_max) ? DEF_NO : DEF_YES;
+
+   *p_err   =  NET_SOCK_ERR_NONE;
+
+    return (q_avail);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_ConnAcceptQ_IsRdy()
+*
+* Description : Check if socket's connection accept queue is ready with any available queued connection(s).
+*
+* Argument(s) : p_sock       Pointer to a socket.
+*               ------       Argument validated in NetSock_SelDescHandlerRd().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection accept queue successfully
+*                                                                   checked; check return value for socket
+*                                                                   connection accept queue availability.
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type; i.e. NOT stream-type.
+*
+* Return(s)   : DEF_YES, if socket connection accept queue has any available queued connection(s).
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerRdStream().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN  NetSock_ConnAcceptQ_IsRdy (NET_SOCK  *p_sock,
+                                                NET_ERR   *p_err)
+{
+    NET_SOCK_ACCEPT_Q_OBJ  *p_obj = DEF_NULL;
+    CPU_BOOLEAN             is_rdy = DEF_NO;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* -------------- VALIDATE SOCK TYPE -------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+       *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+        return (DEF_NO);
+    }
+#endif
+
+                                                                    /* ---------- CHK SOCK CONN ACCEPT Q RDY ---------- */
+    SLIST_FOR_EACH_ENTRY(&p_sock->ConnAcceptQ_Ptr, p_obj, NET_SOCK_ACCEPT_Q_OBJ, ListNode) {
+        if (p_obj->IsRdy == DEF_YES) {
+            is_rdy = DEF_YES;
+            break;
+        }
+    }
+
+   *p_err  =  NET_SOCK_ERR_NONE;
+
+    return (is_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_ConnAcceptQ_ConnID_Add()
+*
+* Description : Add a connection handle identifier into a stream-type socket's connection accept queue.
+*
+*               (1) A stream-type socket's connection accept queue is a FIFO Q implemented as a circular
+*                   ring array :
+*
+*                   (a) Sockets' 'ConnAcceptQ_HeadIx' points to the next available connection handle
+*                       identifier to accept.
+*
+*                   (b) Sockets' 'ConnAcceptQ_TailIx' points to the next available queue entry to insert
+*                       a connection handle identifier.
+*
+*                   (c) Sockets' 'ConnAcceptQ_HeadIx'/'ConnAcceptQ_TailIx' advance :
+*
+*                       (1) By increment;
+*                       (2) Reset to minimum index value when maximum index value reached.
+*
+*                           (A) Although a specific maximum array-size/index-value is configured for
+*                               each socket connection accept queue ('ConnAcceptQ_SizeMax'), the global
+*                               maximum array-size/index-value ('NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX')
+*                               is used as the maximum index value.  Although this uses the entire
+*                               queue array (not just a subset) for adding & removing connection handle
+*                               identifiers, it eliminates the need to redundantly validate the socket's
+*                               configured connection accept queue maximum array-size/index-value.
+*
+*
+*                                  Index to next available          Index to next available entry
+*                               connection handle identifier         to insert accept connection
+*                                      in accept queue                    handle identifier
+*                                      (see Note #1a)                      (see Note #1b)
+*
+*                                             |                                   |
+*                                             |                                   |
+*                                             v                                   v
+*                              -------------------------------------------------------------
+*                              |     |     |     |     |     |     |     |     |     |     |
+*                              |     |     |     |     |     |     |     |     |     |     |
+*                              |     |     |     |     |     |     |     |     |     |     |
+*                              -------------------------------------------------------------
+*
+*                                                       ---------->
+*                                                 FIFO indices advance by
+*                                                increment (see Note #1c1)
+*
+*                              |                                                           |
+*                              |<----------------- Circular Ring FIFO Q ------------------>|
+*                              |                      (see Note #1)                        |
+*
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_ConnSignalAccept().
+*
+*               conn_id     Handle identifier of network connection to insert into connection accept queue.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Accept connection handle identifier
+*                                                                       successfully added.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type; i.e. NOT stream-type.
+*                               NET_SOCK_ERR_CONN_ACCEPT_Q_DUP      Connection handle identifier already in socket
+*                                                                       connection accept queue.
+*                               NET_SOCK_ERR_CONN_ACCEPT_Q_MAX      Maximum or invalid number queue entries used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnSignalAccept().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  void  NetSock_ConnAcceptQ_ConnID_Add (NET_SOCK     *p_sock,
+                                              NET_CONN_ID   conn_id,
+                                              NET_ERR      *p_err)
+{
+    NET_SOCK_ACCEPT_Q_OBJ  *p_obj = DEF_NULL;
+    LIB_ERR                 lib_err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                            /* ---------- VALIDATE SOCK TYPE ---------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+       *p_err = NET_SOCK_ERR_INVALID_TYPE;
+        return;
+    }
+#endif
+                                                                            /* ---------- VALIDATE NBR USED ----------- */
+                                                                            /* Chk sock max conn accept Q lim.          */
+    if (p_sock->ConnAcceptQ_SizeCur >= p_sock->ConnAcceptQ_SizeMax) {
+       *p_err = NET_SOCK_ERR_CONN_ACCEPT_Q_MAX;
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_sock->ConnAcceptQ_SizeCur >= NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.ConnAcceptQ_MaxCtr);
+       *p_err = NET_SOCK_ERR_CONN_ACCEPT_Q_MAX;
+        return;
+    }
+#endif
+
+                                                                            /* ---- ADD CONN ID INTO CONN ACCEPT Q ---- */
+    p_obj = (NET_SOCK_ACCEPT_Q_OBJ *)Mem_DynPoolBlkGet(&NetSock_AcceptQ_ObjPool, &lib_err);
+    if (lib_err != LIB_MEM_ERR_NONE) {
+       *p_err = NET_SOCK_ERR_CONN_ACCEPT_Q_MAX;
+        return;
+    }
+
+    p_obj->ConnID = conn_id;
+    p_obj->IsRdy  = DEF_NO;
+
+    SList_PushBack(&p_sock->ConnAcceptQ_Ptr, &p_obj->ListNode);
+
+    p_sock->ConnAcceptQ_SizeCur++;
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_ConnAcceptQ_ConnID_Get()
+*
+* Description : Get a connection handle identifier from a stream-type socket's connection accept queue.
+*
+*               (1) A stream-type socket's connection accept queue is a FIFO Q implemented as a circular
+*                   ring array :
+*
+*                   (a) Sockets' 'ConnAcceptQ_HeadIx' points to the next available connection handle
+*                       identifier to accept.
+*
+*                   See also 'NetSock_ConnAcceptQ_ConnID_Add()  Note #1'.
+*
+*
+* Argument(s) : p_sock       Pointer to a socket.
+*               ------       Argument validated in NetSock_Accept().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                       Accept connection handle identifier
+*                                                                           successfully retrieved.
+*                               NET_SOCK_ERR_INVALID_TYPE               Invalid socket type; i.e. NOT stream-type.
+*                               NET_SOCK_ERR_CONN_ACCEPT_Q_NONE_AVAIL   Accept connection handle identifier NOT
+*                                                                           available.
+*
+* Return(s)   : Accept connection handle identifier, if NO error(s).
+*
+*               NET_CONN_ID_NONE,                    otherwise.
+*
+* Caller(s)   : NetSock_Accept().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  NET_CONN_ID  NetSock_ConnAcceptQ_ConnID_Get (NET_SOCK  *p_sock,
+                                                     NET_ERR   *p_err)
+{
+    NET_SOCK_ACCEPT_Q_OBJ  *p_obj   = DEF_NULL;
+    NET_CONN_ID             conn_id = NET_CONN_ID_NONE;
+    CPU_BOOLEAN             found   = DEF_NO;
+    LIB_ERR                 err_lib;
+
+                                                                            /* ---------- VALIDATE SOCK TYPE ---------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+       *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+        return (NET_CONN_ID_NONE);
+    }
+                                                                            /* ---------- VALIDATE NBR USED ----------- */
+    if (p_sock->ConnAcceptQ_SizeCur < 1) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.ConnAcceptQ_NoneAvailCtr);
+       *p_err =  NET_SOCK_ERR_CONN_ACCEPT_Q_NONE_AVAIL;
+        return (NET_CONN_ID_NONE);
+    }
+
+                                                                            /* ---- GET CONN ID FROM CONN ACCEPT Q ---- */
+    SLIST_FOR_EACH_ENTRY(&p_sock->ConnAcceptQ_Ptr, p_obj, NET_SOCK_ACCEPT_Q_OBJ, ListNode) {
+        if (p_obj->IsRdy == DEF_YES) {
+            conn_id = p_obj->ConnID;
+            found   = DEF_YES;
+            break;
+        }
+    }
+
+    if (found == DEF_NO) {
+       *p_err =  NET_SOCK_ERR_CONN_ACCEPT_Q_NONE_AVAIL;
+        return (NET_CONN_ID_NONE);
+    }
+
+    SList_Rem(&p_sock->ConnAcceptQ_Ptr, &p_obj->ListNode);
+
+    Mem_DynPoolBlkFree(&NetSock_AcceptQ_ObjPool, p_obj, &err_lib);
+
+    p_sock->ConnAcceptQ_SizeCur--;
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+    return (conn_id);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_ConnAcceptQ_ConnID_Srch()
+*
+* Description : Saerch for a connection handle identifier in a stream-type socket's connection accept queue.
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_ConnAcceptQ_ConnID_Add(),
+*                                                 NetSock_ConnAcceptQ_ConnID_Remove().
+*
+*               conn_id     Handle identifier of network connection to search for in connection accept queue.
+*
+*               p_conn_ix    Pointer to a variable to ... :
+*
+*                               (a) Return the connection accept queue array index of the network connection
+*                                       handle identifier,     if found;
+*                               (b) Return NET_SOCK_Q_IX_NONE, otherwise.
+*
+*               p_conn_nbr   Pointer to a variable to ... :
+*
+*                               (a) Return the number of connection accept queue handle identifiers ahead
+*                                       of the desired network connection handle identifier, if found;
+*                               (b) Return 0, otherwise.
+*
+* Return(s)   : DEF_YES, connection handle identifier found in socket's connection accept queue.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_ConnAcceptQ_ConnID_Add(),
+*               NetSock_ConnAcceptQ_ConnID_Remove().
+*
+* Note(s)     : (1) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*               (2) Assumes queue indices valid.
+*
+*               (3) If ALL connection handle identifiers in queue searched & queue tail index NOT found,
+*                   tail index MUST be invalid -- outside the range of table indices.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  NET_SOCK_ACCEPT_Q_OBJ  *NetSock_ConnAcceptQ_ConnID_Srch (NET_SOCK     *p_sock,
+                                                                 NET_CONN_ID   conn_id)
+{
+    NET_SOCK_ACCEPT_Q_OBJ  *p_obj = DEF_NULL;
+    CPU_BOOLEAN             found = DEF_NO;
+
+
+    SLIST_FOR_EACH_ENTRY(&p_sock->ConnAcceptQ_Ptr, p_obj, NET_SOCK_ACCEPT_Q_OBJ, ListNode) {
+        if (p_obj->ConnID == conn_id) {
+            found = DEF_YES;
+            break;
+        }
+    }
+
+    if (found == DEF_NO) {
+        p_obj = DEF_NULL;
+    }
+
+    return (p_obj);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_ConnAcceptQ_ConnID_Remove()
+*
+* Description : Remove a connection handle identifier from a stream-type socket's connection accept queue.
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_FreeConnFromSock().
+*
+*               conn_id     Handle identifier of network connection to remove from connection accept queue.
+*
+* Return(s)   : DEF_YES, connection handle identifier found & successfully removed from socket's connection
+*                   accept queue.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_FreeConnFromSock().
+*
+* Note(s)     : (1) Assumes queue indices valid.
+*
+*               (2) If ALL connection handle identifiers in queue searched & queue tail index NOT found,
+*                   tail index MUST be invalid -- outside the range of table indices.
+*********************************************************************************************************
+*/
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN  NetSock_ConnAcceptQ_ConnID_Remove (NET_SOCK     *p_sock,
+                                                        NET_CONN_ID   conn_id)
+{
+    NET_SOCK_ACCEPT_Q_OBJ  *p_obj;
+    CPU_BOOLEAN             found = DEF_NO;
+    LIB_ERR                 err_lib;
+
+
+                                                                            /* ---------- VALIDATE SOCK TYPE ---------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+        return (DEF_NO);
+    }
+                                                                            /* ----- VALIDATE CONN ACCEPT Q SIZE ------ */
+    if (p_sock->ConnAcceptQ_SizeCur < 1) {
+        return (DEF_NO);
+    }
+
+                                                                            /* ---- SRCH CONN ID IN CONN ACCEPT Q ----- */
+    SLIST_FOR_EACH_ENTRY(&p_sock->ConnAcceptQ_Ptr, p_obj, NET_SOCK_ACCEPT_Q_OBJ, ListNode) {
+        if (p_obj->ConnID == conn_id) {
+            found = DEF_YES;
+            break;
+        }
+    }
+
+    if (found != DEF_YES) {                                                 /* If conn id NOT found, exit remove.       */
+        return (DEF_NO);
+    }
+
+                                                                            /* -- REMOVE CONN ID FROM CONN ACCEPT Q --- */
+    SList_Rem(&p_sock->ConnAcceptQ_Ptr, &p_obj->ListNode);
+
+    Mem_DynPoolBlkFree(&NetSock_AcceptQ_ObjPool, p_obj, &err_lib);
+
+    p_sock->ConnAcceptQ_SizeCur--;                                          /* Dec conn accept Q cur size.              */
+
+    return (DEF_YES);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_RxDataHandler()
+*
+* Description : (1) Receive data from a socket :
+*
+*                   (a) Validate receive data buffer                                    See Note #2
+*                   (b) Validate receive flags                                          See Note #3
+*                   (c) Acquire  network lock
+*                   (d) Validate socket  used
+*                   (e) Receive  socket  data
+*                   (f) Release  network lock
+*
+*
+* Argument(s) : sock_id             Socket descriptor/handle identifier of socket to receive data.
+*
+*               p_data_buf           Pointer to an application data buffer that will receive the socket's received
+*                                       data.
+*
+*               data_buf_len        Size of the   application data buffer (in octets) [see Note #2].
+*
+*               flags               Flags to select receive options (see Note #3); bit-field flags logically OR'd :
+*
+*                                       NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                       NET_SOCK_FLAG_RX_DATA_PEEK      Receive socket data without consuming
+*                                                                           the socket data; i.e. socket data
+*                                                                           NOT removed from application receive
+*                                                                           queue(s).
+*                                       NET_SOCK_FLAG_RX_NO_BLOCK       Receive socket data without blocking.
+*
+*               p_addr_remote       Pointer to an address buffer that will receive the socket address structure
+*               -------------           with the received data's remote address (see Note #4), if NO error(s).
+*
+*                                   Argument checked     in NetSock_RxDataFrom();
+*                                            set to NULL in NetSock_RxData().
+*
+*               p_addr_len          Pointer to a variable, if available, to ... :
+*               ----------
+*                                       (a) Pass the size of the address buffer pointed to by 'p_addr_remote'.
+*                                       (b) (1) Return the actual size of socket address structure with the
+*                                                   received data's remote address, if NO error(s);
+*                                           (2) Return 0,                           otherwise.
+*
+*                                   Argument checked     in NetSock_RxDataFrom();
+*                                            set to NULL in NetSock_RxData().
+*
+*                                   See also Note #5.
+*
+*               p_ip_opts_buf        Pointer to buffer to receive possible IP options (see Note #6a), if NO error(s).
+*
+*               ip_opts_buf_len     Size of IP options receive buffer (in octets)    [see Note #6b].
+*
+*               p_ip_opts_len        Pointer to variable that will receive the return size of any received IP options,
+*                                       if NO error(s).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'p_data_buf'    passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_PTR              Argument 'data_buf_len' passed a NULL size.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_FLAG           Invalid socket flags.
+*
+*                                                                   -------- RETURNED BY NetSock_IsUsed() : ---------
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*
+*                                                                   - RETURNED BY NetSock_RxDataHandlerDatagram() : -
+*                                                                   -- RETURNED BY NetSock_RxDataHandlerStream() : --
+*                               NET_SOCK_ERR_NONE                   Socket data successfully received; check return
+*                                                                       value for number of data octets received.
+*
+*                               NET_SOCK_ERR_RX_Q_EMPTY             Socket receive queue empty.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_ERR_RX                          Receive error.
+*
+*                                                                   - RETURNED BY NetSock_RxDataHandlerDatagram() : -
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE      Socket data receive buffer insufficient size;
+*                                                                       some, but not all, socket data deframed
+*                                                                       into receive buffer (see Note #2a2).
+*
+*                                                                   -- RETURNED BY NetSock_RxDataHandlerStream() : --
+*                               NET_SOCK_ERR_RX_Q_CLOSED            Socket receive queue closed.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*
+*                                                                   -- RETURNED BY NetSecure_SockRxDataHandler() : --
+*                               NET_SECURE_ERR_NULL_PTR             Secure session pointer is NULL.
+*
+*                                                                   See specific network security port for
+*                                                                       additional return error codes.
+*
+*                                                                   ----- RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Number of positive data octets received, if NO error(s)              [see Note #7a].
+*
+*               NET_SOCK_BSD_RTN_CODE_CONN_CLOSED,       if socket connection closed (see Note #7b).
+*
+*               NET_SOCK_BSD_ERR_RX,                     otherwise                   (see Note #7c1).
+*
+* Caller(s)   : NetSock_RxDataFrom(),
+*               NetSock_RxData().
+*
+* Note(s)     : (2) (a) (1) (A) Datagram-type sockets transmit & receive all data atomically -- i.e. every
+*                               single, complete datagram transmitted MUST be received as a single, complete
+*                               datagram.
+*
+*                           (B) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes
+*                               that "for message-based sockets, such as SOCK_DGRAM ... the entire message
+*                               shall be read in a single operation.  If a message is too long to fit in
+*                               the supplied buffer, and MSG_PEEK is not set in the flags argument, the
+*                               excess bytes shall be discarded".
+*
+*                       (2) Thus if the socket's type is datagram & the receive data buffer size is
+*                           NOT large enough for the received data, the receive data buffer is maximally
+*                           filled with receive data but the remaining data octets are discarded &
+*                           NET_SOCK_ERR_INVALID_DATA_SIZE error is returned.
+*
+*                   (b) (1) (A) (1) Stream-type sockets transmit & receive all data octets in one or more
+*                                   non-distinct packets.  In other words, the application data is NOT
+*                                   bounded by any specific packet(s); rather, it is contiguous & sequenced
+*                                   from one packet to the next.
+*
+*                               (2) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes
+*                                   that "for stream-based sockets, such as SOCK_STREAM, message boundaries
+*                                   shall be ignored.  In this case, data shall be returned to the user as
+*                                   soon as it becomes available, and no data shall be discarded".
+*
+*                           (B) Thus if the socket's type is stream & the receive data buffer size is NOT
+*                               large enough for the received data, the receive data buffer is maximally
+*                               filled with receive data & the remaining data octets remain queued for
+*                               later application-socket receives.
+*
+*                       (2) Thus it is typical -- but NOT absolutely required -- that a single application
+*                           task ONLY receive or request to receive data from a stream-type socket.
+*
+*                   See also 'NetSock_RxDataHandlerDatagram()  Note #2',
+*                          & 'NetSock_RxDataHandlerStream()    Note #2'.
+*
+*               (3) Only some socket receive flag options are implemented.  If other flag options
+*                   are  requested, NetSock_RxDataHandler() aborts & returns appropriate error codes so
+*                   that requested flag options are NOT silently ignored.
+*
+*               (4) (a) Socket address structure 'AddrFamily' member returned in host-order & SHOULD NOT
+*                       be converted to network-order.
+*
+*                   (b) Socket address structure addresses returned in network-order & SHOULD be converted
+*                       from network-order to host-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (5) (a) Since 'p_addr_len' argument is both an input & output argument (see 'Argument(s) :
+*                       p_addr_len'), ...
+*
+*                       (1) Its input value SHOULD be validated prior to use; ...
+*                       (2) While its output value MUST be initially configured to return a default value
+*                           PRIOR to all other validation or function handling in case of any error(s).
+*
+*                   (b) However, if 'p_addr_len' is available, it SHOULD already be validated & initialized
+*                       by previous NetSock_RxData() function(s).
+*
+*                       See also 'NetSock_RxDataHandlerDatagram()  Note #4b'
+*                              & 'NetSock_RxDataHandlerStream()    Note #4b'.
+*
+*               (6) (a) If ...
+*
+*                       (1) NO IP options were received
+*                             OR
+*                       (2) NO IP options receive buffer is provided
+*                             OR
+*                       (3) IP options receive buffer NOT large enough for the received IP options
+*
+*                       ... then NO IP options are returned & any received IP options are silently discarded.
+*
+*                   (b) The IP options receive buffer size SHOULD be large enough to receive the maximum
+*                       IP options size, NET_IPv4_HDR_OPT_SIZE_MAX.
+*
+*                   (c) Received IP options should be provided/decoded via appropriate IP layer API.
+*
+*                   See also Note #10.
+*
+*               (7) IEEE Std 1003.1, 2004 Edition, Section 'recv() : RETURN VALUE' states that :
+*
+*                   (a) "Upon successful completion, recv() shall return the length of the message in bytes."
+*
+*                   (b) "If no messages are available to be received and the peer has performed an orderly
+*                        shutdown, recv() shall return 0."
+*
+*                   (c) (1) "Otherwise, -1 shall be returned" ...
+*                       (2) "and 'errno' set to indicate the error."
+*                           'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   See also 'NetSock_RxDataHandlerDatagram()  Note #7'
+*                          & 'NetSock_RxDataHandlerStream()    Note #7'.
+*
+*               (8) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*                   However, these pointed-to variables SHOULD already be validated & initialized by
+*                   previous NetSock_RxData() function(s).
+*
+*               (9) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'SockType' is incorrectly modified.
+*
+*              (10) IP options arguments may NOT be necessary (remove if unnecessary).
+*********************************************************************************************************
+*/
+
+static  NET_SOCK_RTN_CODE  NetSock_RxDataHandler (NET_SOCK_ID          sock_id,
+                                                  void                *p_data_buf,
+                                                  CPU_INT16U           data_buf_len,
+                                                  NET_SOCK_API_FLAGS   flags,
+                                                  NET_SOCK_ADDR       *p_addr_remote,
+                                                  NET_SOCK_ADDR_LEN   *p_addr_len,
+                                                  void                *p_ip_opts_buf,
+                                                  CPU_INT08U           ip_opts_buf_len,
+                                                  CPU_INT08U          *p_ip_opts_len,
+                                                  NET_ERR             *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN  == DEF_ENABLED)
+    NET_SOCK_FLAGS      flag_mask;
+#endif
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    CPU_BOOLEAN         secure;
+#endif
+    NET_SOCK           *p_sock;
+    NET_SOCK_RTN_CODE   rtn_code;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RX DATA BUF --------------- */
+    if (p_data_buf == (void *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NullPtrCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (NET_SOCK_BSD_ERR_RX);
+    }
+    if (data_buf_len < 1) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NullSizeCtr);
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (NET_SOCK_BSD_ERR_RX);
+    }
+
+                                                                /* ----------------- VALIDATE RX FLAGS ---------------- */
+    flag_mask = NET_SOCK_FLAG_NONE         |
+                NET_SOCK_FLAG_RX_DATA_PEEK |
+                NET_SOCK_FLAG_RX_NO_BLOCK;
+                                                                /* If any invalid flags req'd, rtn err (see Note #3).   */
+    if (((NET_SOCK_FLAGS)flags & (NET_SOCK_FLAGS)~flag_mask) != NET_SOCK_FLAG_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFlagsCtr);
+       *p_err =  NET_SOCK_ERR_INVALID_FLAG;
+        return (NET_SOCK_BSD_ERR_RX);
+    }
+#endif
+
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_err_rx;
+    }
+#endif
+
+
+                                                                /* ------------------- RX SOCK DATA ------------------- */
+    p_sock = &NetSock_Tbl[sock_id];
+
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_DATAGRAM:
+             rtn_code = NetSock_RxDataHandlerDatagram((NET_SOCK_ID        )sock_id,
+                                                      (NET_SOCK          *)p_sock,
+                                                      (void              *)p_data_buf,
+                                                      (CPU_INT16U         )data_buf_len,
+                                                      (NET_SOCK_API_FLAGS )flags,
+                                                      (NET_SOCK_ADDR     *)p_addr_remote,
+                                                      (NET_SOCK_ADDR_LEN *)p_addr_len,
+                                                      (void              *)p_ip_opts_buf,
+                                                      (CPU_INT08U         )ip_opts_buf_len,
+                                                      (CPU_INT08U        *)p_ip_opts_len,
+                                                      (NET_ERR           *)p_err);
+             break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+#ifdef  NET_SECURE_MODULE_EN
+             secure = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+#else
+             secure = DEF_NO;
+#endif
+             if (secure  != DEF_YES) {
+                 rtn_code = NetSock_RxDataHandlerStream((NET_SOCK_ID        )sock_id,
+                                                        (NET_SOCK          *)p_sock,
+                                                        (void              *)p_data_buf,
+                                                        (CPU_INT16U         )data_buf_len,
+                                                        (NET_SOCK_API_FLAGS )flags,
+                                                        (NET_SOCK_ADDR     *)p_addr_remote,
+                                                        (NET_SOCK_ADDR_LEN *)p_addr_len,
+                                                        (NET_ERR           *)p_err);
+             } else {
+#ifdef  NET_SECURE_MODULE_EN                               /* If sock secure, rx data via secure handler.          */
+                 rtn_code = NetSecure_SockRxDataHandler((NET_SOCK *)p_sock,
+                                                        (void     *)p_data_buf,
+                                                        (CPU_INT16U)data_buf_len,
+                                                        (NET_ERR  *)p_err);
+#else
+                 NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+                *p_err =  NET_SOCK_ERR_CONN_FAIL;
+                 goto exit_err_rx;
+#endif
+             }
+             break;
+#endif
+
+
+        case NET_SOCK_TYPE_NONE:
+        case NET_SOCK_TYPE_FAULT:
+        default:                                                /* See Note #9.                                         */
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+             goto exit_err_rx;
+    }
+
+    goto exit_release;
+
+
+
+exit_err_rx:
+    rtn_code = NET_SOCK_BSD_ERR_RX;
+
+exit_release:
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_RxDataHandlerDatagram()
+*
+* Description : (1) Receive data from a datagram-type socket :
+*
+*                   (a) Validate socket connection state                                See Note #13
+*                   (b) Wait on socket receive queue for packet buffer(s)
+*                   (c) Get remote host address                                         See Notes #4 & #5
+*                   (d) Configure socket transmit :
+*                       (1) Configure socket flags
+*                   (e) Receive socket data from appropriate transport layer
+*                   (f) Free    socket receive packet buffer(s)
+*                   (g) Return  socket data received
+*
+*
+* Argument(s) : sock_id             Socket descriptor/handle identifier of socket to receive data.
+*               -------             Argument checked   in NetSock_RxDataHandler().
+*
+*               p_sock              Pointer to a socket.
+*               ------              Argument validated in NetSock_RxDataHandler().
+*
+*               p_data_buf          Pointer to an application data buffer that will receive the socket's received
+*               ----------              data.
+*
+*                                   Argument checked   in NetSock_RxDataHandler().
+*
+*               data_buf_len        Size of the   application data buffer (in octets) [see Note #2b].
+*               ------------        Argument checked   in NetSock_RxDataHandler().
+*
+*               flags               Flags to select receive options; bit-field flags logically OR'd :
+*               -----
+*                                       NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                       NET_SOCK_FLAG_RX_DATA_PEEK      Receive socket data without consuming
+*                                                                           the socket data; i.e. socket data
+*                                                                           NOT removed from application receive
+*                                                                           queue(s).
+*                                       NET_SOCK_FLAG_RX_NO_BLOCK       Receive socket data without blocking
+*                                                                           (see Note #3).
+*
+*                                   Argument checked   in NetSock_RxDataHandler().
+*
+*               p_addr_remote       Pointer to an address buffer that will receive the socket address structure
+*               -------------           with the received data's remote address (see Notes #4 & #5), if NO error(s).
+*
+*                                   Argument checked     in NetSock_RxDataFrom();
+*                                            set to NULL in NetSock_RxData().
+*
+*               p_addr_len          Pointer to a variable to ... :
+*               ----------
+*                                       (a) Pass the size of the address buffer pointed to by 'p_addr_remote'.
+*                                       (b) (1) Return the actual size of socket address structure with the
+*                                                   received data's remote address, if NO error(s);
+*                                           (2) Return 0,                           otherwise.
+*
+*                                   Argument checked     in NetSock_RxDataFrom();
+*                                            set to NULL in NetSock_RxData().
+*
+*                                   See also Note #4b.
+*
+*               p_ip_opts_buf        Pointer to buffer to receive possible IP options (see Note #6a), if NO error(s).
+*
+*               ip_opts_buf_len     Size of IP options receive buffer (in octets)    [see Note #6b].
+*
+*               p_ip_opts_len        Pointer to variable that will receive the return size of any received IP options,
+*                                       if NO error(s).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket data successfully received; check return
+*                                                                       value for number of data octets received.
+*
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE      Socket data receive buffer insufficient size;
+*                                                                       some, but not all, socket data deframed
+*                                                                       into receive buffer (see Note #2b).
+*
+*                               NET_SOCK_ERR_RX_Q_EMPTY             Socket receive queue empty.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*
+*                               NET_ERR_RX                          Receive error.
+*
+*                                                                   ---- RETURNED BY Net_GlobalLockAcquire() : ----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Number of positive data octets received, if NO error(s) [see Note #7a].
+*
+*               NET_SOCK_BSD_ERR_RX,                     otherwise      (see Note #7c).
+*
+* Caller(s)   : NetSock_RxDataHandler().
+*
+* Note(s)     : (2) (a) (1) Datagram-type sockets transmit & receive all data atomically -- i.e. every single,
+*                           complete datagram transmitted MUST be received as a single, complete datagram.
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes that
+*                           "for message-based sockets, such as SOCK_DGRAM ... the entire message shall be
+*                           read in a single operation.  If a message is too long to fit in the supplied
+*                           buffer, and MSG_PEEK is not set in the flags argument, the excess bytes shall
+*                           be discarded".
+*
+*                   (b) Thus if the socket's type is datagram & the receive data buffer size is NOT large
+*                       enough for the received data, the receive data buffer is maximally filled with receive
+*                       data but the remaining data octets are discarded & NET_SOCK_ERR_INVALID_DATA_SIZE
+*                       error is returned.
+*
+*                   See also 'NetSock_RxDataHandler()  Note #2a'.
+*
+*               (3) If 'flags' argument set to 'NET_SOCK_FLAG_RX_NO_BLOCK'; socket receive does NOT block,
+*                   regardless if the socket is configured to block.
+*
+*               (4) (a) If a pointer to remote address buffer is provided, it is assumed that the remote
+*                       address buffer has been previously validated for the remote address to be returned.
+*
+*                   (b) If a pointer to remote address buffer is provided, it is assumed that a pointer to
+*                       an address length buffer is also available & has been previously validated.
+*
+*                   (c) The remote address is obtained from the first packet buffer.  In other words, if
+*                       multiple packet buffers are received for a fragmented datagram, the remote address
+*                       is obtained from the first fragment of the datagram.
+*
+*               (5) (a) Socket address structure 'AddrFamily' member returned in host-order & SHOULD NOT
+*                       be converted to network-order.
+*
+*                   (b) Socket address structure addresses returned in network-order & SHOULD be converted
+*                       from network-order to host-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (6) (a) If ...
+*
+*                       (1) NO IP options were received
+*                             OR
+*                       (2) NO IP options receive buffer is provided
+*                             OR
+*                       (3) IP options receive buffer NOT large enough for the received IP options
+*
+*                       ... then NO IP options are returned & any received IP options are silently discarded.
+*
+*                   (b) The IP options receive buffer size SHOULD be large enough to receive the maximum
+*                       IP options size, NET_IPv4_HDR_OPT_SIZE_MAX.
+*
+*                   (c) Received IP options should be provided/decoded via appropriate IP layer API.
+*
+*                   See also Note #14.
+*
+*               (7) IEEE Std 1003.1, 2004 Edition, Section 'recv() : RETURN VALUE' states that :
+*
+*                   (a) "Upon successful completion, recv() shall return the length of the message in bytes."
+*
+*                   (b) "If no messages are available to be received and the peer has performed an orderly
+*                        shutdown, recv() shall return 0."
+*
+*                       (1) Since the socket receive return value of '0' is reserved for socket connection
+*                           closes; NO socket receive -- fault or non-fault -- should ever return '0' octets
+*                           received.
+*
+*                       (2) However, since NO actual connections are implemented for datagram-type sockets
+*                           (see 'NetSock_ConnHandlerDatagram()  Note #2a'), NO actual socket connections
+*                           can be closed on datagram-type sockets.  Therefore, datagram-type socket
+*                           receives MUST NEVER return '0'.
+*
+*                   (c) (1) "Otherwise, -1 shall be returned" ...
+*                       (2) "and 'errno' set to indicate the error."
+*                           'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   See also 'NetSock_RxDataHandler()  Note #7'.
+*
+*               (8) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*                   However, these pointed-to variables SHOULD already be validated & initialized by
+*                   previous NetSock_RxData() function(s).
+*
+*               (9) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*
+*              (10) Default case already invalidated in NetSock_Open().  However, the default case
+*                   is included as an extra precaution in case 'Protocol' is incorrectly modified.
+*
+*              (11) (a) Transport layer SHOULD typically free &/or discard packet buffer(s) after
+*                       receiving application data.
+*
+*                   (b) However, if received packet buffer(s) NOT consumed AND any socket receive
+*                       queue error(s) occur; socket receive MUST free/discard packet buffer(s).
+*
+*              (12) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) NetSock_RxDataHandlerDatagram() assumes that datagram-type sockets have been
+*                       previously validated as configured by caller function(s).  Therefore, on any
+*                       internal socket connection error(s), the socket MUST be closed.
+*
+*              (13) Socket descriptor read availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor read handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also  Note #1a,
+*                            'NetSock_SelDescHandlerRdDatagram()   Note #3',
+*                          & 'NetSock_SelDescHandlerErrDatagram()  Note #3'.
+*
+*              (14) IP options arguments may NOT be necessary (remove if unnecessary).
+*********************************************************************************************************
+*/
+
+static  NET_SOCK_RTN_CODE  NetSock_RxDataHandlerDatagram (NET_SOCK_ID          sock_id,
+                                                          NET_SOCK            *p_sock,
+                                                          void                *p_data_buf,
+                                                          CPU_INT16U           data_buf_len,
+                                                          NET_SOCK_API_FLAGS   flags,
+                                                          NET_SOCK_ADDR       *p_addr_remote,
+                                                          NET_SOCK_ADDR_LEN   *p_addr_len,
+                                                          void                *p_ip_opts_buf,
+                                                          CPU_INT08U           ip_opts_buf_len,
+                                                          CPU_INT08U          *p_ip_opts_len,
+                                                          NET_ERR             *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_SOCK_ADDR_IPv4  *p_addr_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_SOCK_ADDR_IPv6  *p_addr_ipv6;
+#endif
+    CPU_BOOLEAN          no_block;
+    CPU_BOOLEAN          block;
+    CPU_BOOLEAN          peek;
+    CPU_BOOLEAN          free;
+    NET_BUF             *p_buf_head;
+    NET_BUF             *p_buf_head_next;
+    NET_BUF_HDR         *p_buf_head_hdr;
+    NET_BUF_HDR         *p_buf_head_next_hdr;
+    NET_FLAGS            flags_transport;
+    CPU_INT16U           data_len_tot;
+    NET_ERR              err;
+    NET_ERR              err_rtn;
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err =  NET_SOCK_ERR_NOT_USED;
+             return (NET_SOCK_BSD_ERR_RX);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;
+             return (NET_SOCK_BSD_ERR_RX);
+
+
+        case NET_SOCK_STATE_CLOSED:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_OP;
+             return (NET_SOCK_BSD_ERR_RX);
+
+
+        case NET_SOCK_STATE_BOUND:                              /* If sock NOT conn'd to remote addr       ...          */
+             if (p_addr_remote == (NET_SOCK_ADDR *)0) {         /* ... & remote addr rtn buf NOT provided, ...          */
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_OP;              /* ... rtn invalid op err.                              */
+                 return (NET_SOCK_BSD_ERR_RX);
+             }
+             break;
+
+
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+             p_sock->State = NET_SOCK_STATE_CONN;
+             break;
+
+
+        case NET_SOCK_STATE_CONN:
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        case NET_SOCK_STATE_LISTEN:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        default:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;
+             return (NET_SOCK_BSD_ERR_RX);
+    }
+
+
+
+                                                                /* ---------------- WAIT ON SOCK RX Q ----------------- */
+    no_block = DEF_BIT_IS_SET((NET_SOCK_FLAGS)flags, NET_SOCK_FLAG_RX_NO_BLOCK);
+    if (no_block == DEF_YES) {                                  /* If 'No Block' flag set,         ...                  */
+        block = DEF_NO;                                         /* ... do NOT block (see Note #3); ...                  */
+    } else {                                                    /* ... else chk sock's no-block flag.                   */
+        block = DEF_BIT_IS_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+    }
+
+    if (block != DEF_YES) {                                     /* If non-blocking sock rx  ...                         */
+        if (p_sock->RxQ_Head == (NET_BUF *)0) {                 /* ... & no rx'd data pkts, ...                         */
+           *p_err = NET_SOCK_ERR_RX_Q_EMPTY;                    /* ... rtn  rx Q empty err.                             */
+            return (NET_SOCK_BSD_ERR_RX);
+        }
+    }
+
+    Net_GlobalLockRelease();
+    NetSock_RxQ_Wait(p_sock, p_err);
+    Net_GlobalLockAcquire((void *)&NetSock_RxDataHandlerDatagram, &err);
+    if (err != NET_ERR_NONE) {
+       *p_err = err;                                            /* Rtn err from Net_GlobalLockAcquire().                */
+        return (NET_SOCK_BSD_ERR_RX);
+    }
+    switch (*p_err) {
+        case NET_SOCK_ERR_NONE:
+             break;
+
+
+        case NET_SOCK_ERR_RX_Q_EMPTY:
+                                                                /* Rtn err from NetSock_RxQ_Wait().                     */
+             return (NET_SOCK_BSD_ERR_RX);
+
+
+        case NET_SOCK_ERR_RX_Q_SIGNAL_ABORT:
+        case NET_SOCK_ERR_RX_Q_SIGNAL_FAULT:
+        default:
+            *p_err =  NET_SOCK_ERR_FAULT;
+             return (NET_SOCK_BSD_ERR_RX);
+    }
+
+    if (p_sock->RxQ_Head == (NET_BUF *)0) {                     /* If still NO rx'd data pkts, ...                      */
+       *p_err =  NET_SOCK_ERR_RX_Q_EMPTY;                       /* ... rtn rx Q empty err.                              */
+        return (NET_SOCK_BSD_ERR_RX);
+    }
+
+                                                                /* Cfg rx pkt buf ptrs.                                 */
+    p_buf_head      =  p_sock->RxQ_Head;
+    p_buf_head_hdr  = &p_buf_head->Hdr;
+    p_buf_head_next =  p_buf_head_hdr->NextPrimListPtr;
+
+
+
+                                                                /* ----------------- GET REMOTE ADDR ------------------ */
+    if (p_addr_remote != (NET_SOCK_ADDR *)0) {                  /* If remote addr buf avail, ...                        */
+                                                                /* ... rtn datagram src addr (see Note #4).             */
+#ifdef  NET_IP_MODULE_EN
+        if (DEF_BIT_IS_CLR(p_buf_head_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+            p_addr_ipv4  = (NET_SOCK_ADDR_IPv4 *)p_addr_remote; /* Cfg remote addr struct    (see Note #5).             */
+            NET_UTIL_VAL_SET_HOST_16(&p_addr_ipv4->AddrFamily, NET_SOCK_ADDR_FAMILY_IP_V4);
+            NET_UTIL_VAL_COPY_SET_NET_16(&p_addr_ipv4->Port,  &p_buf_head_hdr->TransportPortSrc);
+            NET_UTIL_VAL_COPY_SET_NET_32(&p_addr_ipv4->Addr,  &p_buf_head_hdr->IP_AddrSrc     );
+            Mem_Clr((void     *)&p_addr_ipv4->Unused[0],
+                    (CPU_SIZE_T) NET_SOCK_ADDR_IPv4_NBR_OCTETS_UNUSED);
+
+           *p_addr_len = (NET_SOCK_ADDR_LEN )NET_SOCK_ADDR_IPv4_SIZE; /* See Note  #4b.                                 */
+#endif
+
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            p_addr_ipv6  = (NET_SOCK_ADDR_IPv6 *)p_addr_remote; /* Cfg remote addr struct    (see Note #5).             */
+            NET_UTIL_VAL_SET_HOST_16(&p_addr_ipv6->AddrFamily, NET_SOCK_ADDR_FAMILY_IP_V6);
+            NET_UTIL_VAL_COPY_SET_NET_16(&p_addr_ipv6->Port,  &p_buf_head_hdr->TransportPortSrc);
+            p_addr_ipv6->Addr = p_buf_head_hdr->IPv6_AddrSrc;
+
+           *p_addr_len = (NET_SOCK_ADDR_LEN )NET_SOCK_ADDR_IPv6_SIZE; /* See Note  #4b.                                 */
+#endif
+       }
+#else                                                           /* See Notes #9 & #12a.                                 */
+        NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+       *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+        return (NET_SOCK_BSD_ERR_RX);
+#endif
+    }
+
+
+                                                                /* ------------------- CFG SOCK RX -------------------- */
+                                                                /* Cfg sock rx flags.                                   */
+    peek = DEF_BIT_IS_SET((NET_SOCK_FLAGS)flags, NET_SOCK_FLAG_RX_DATA_PEEK);
+
+
+                                                                /* ------------------- RX SOCK DATA ------------------- */
+    data_len_tot = 0u;
+    err_rtn      = NET_SOCK_ERR_FAULT;
+
+    switch (p_sock->Protocol) {                                 /* Rx app data from transport layer rx.                 */
+#ifdef  NET_IP_MODULE_EN
+        case NET_SOCK_PROTOCOL_UDP:
+                                                                /* Cfg transport rx flags.                              */
+             flags_transport = NET_UDP_FLAG_NONE;
+             if (peek == DEF_YES) {
+                 DEF_BIT_SET(flags_transport, NET_UDP_FLAG_RX_DATA_PEEK);
+             }
+
+             data_len_tot = NetUDP_RxAppData((NET_BUF     *) p_buf_head,
+                                             (void        *) p_data_buf,
+                                             (CPU_INT16U   ) data_buf_len,
+                                             (NET_UDP_FLAGS) flags_transport,
+                                             (void        *) p_ip_opts_buf,
+                                             (CPU_INT08U   ) ip_opts_buf_len,
+                                             (CPU_INT08U  *) p_ip_opts_len,
+                                             (NET_ERR     *)&err);
+             switch (err) {
+                 case NET_UDP_ERR_NONE:
+                      err_rtn = NET_SOCK_ERR_NONE;
+                      break;
+
+
+                 case NET_UDP_ERR_INVALID_DATA_SIZE:
+                      err_rtn = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                      break;
+
+
+                 case NET_INIT_ERR_NOT_COMPLETED:
+                 case NET_ERR_FAULT_NULL_PTR:
+                 case NET_UDP_ERR_INVALID_FLAG:
+                 case NET_UDP_ERR_INVALID_ARG:
+                 case NET_ERR_RX:
+                 default:
+                      err_rtn = NET_ERR_RX;
+                      break;
+             }
+             break;
+#endif
+
+
+        case NET_SOCK_PROTOCOL_NONE:
+        default:                                                /* See Notes #10 & #12a.                                */
+            (void)&flags_transport;                             /* Prevent possible 'variable unused' warnings.         */
+            (void)&peek;
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+             return (NET_SOCK_BSD_ERR_RX);
+    }
+
+
+    switch (err_rtn) {                                          /* Demux transport-to-sock layer err.                   */
+        case NET_SOCK_ERR_NONE:
+        case NET_SOCK_ERR_INVALID_DATA_SIZE:
+             break;
+
+
+        case NET_SOCK_ERR_FAULT:
+        case NET_ERR_RX:
+        default:
+            *p_err =  err_rtn;
+             return (NET_SOCK_BSD_ERR_RX);
+    }
+
+
+
+                                                                /* ---------------- FREE SOCK RX PKTS ----------------- */
+    free = DEF_NO;                                              /* Transport layer SHOULD free pkts (see Note #11a).    */
+
+    if (peek == DEF_YES) {                                      /* Signal sock rx Q to negate non-consuming peek.       */
+        NetSock_RxQ_Signal(p_sock, &err);
+        if (err != NET_SOCK_ERR_NONE) {                         /* If sock rx Q signal failed, ...                      */
+            peek = DEF_NO;                                      /* ... consume pkt buf(s);     ...                      */
+            free = DEF_YES;                                     /* ... i.e. free/discard pkt buf(s) [see Note #11b].    */
+        }
+    }
+
+    if (peek != DEF_YES) {                                      /* If peek opt NOT req'd, pkt buf(s) consumed : ...     */
+        if (p_buf_head_next != (NET_BUF *)0) {                  /* ... if rem'ing rx Q non-empty,               ...     */
+                                                                /* ... unlink from prev'ly q'd pkt buf(s);      ...     */
+            p_buf_head_next_hdr                  = (NET_BUF_HDR *)&p_buf_head_next->Hdr;
+            p_buf_head_next_hdr->PrevPrimListPtr = (NET_BUF     *) 0;
+        }
+                                                                /* ... & set new sock rx Q head.                        */
+        p_sock->RxQ_Head = (NET_BUF *)p_buf_head_next;
+        if (p_sock->RxQ_Head == (NET_BUF *)0) {                 /* If head now  points to NULL, ..                      */
+            p_sock->RxQ_Tail  = (NET_BUF *)0;                   /* .. tail also points to NULL.                         */
+        }
+
+        if (p_sock->RxQ_SizeCur >  (NET_SOCK_DATA_SIZE)data_len_tot) { /* If cur rx Q size >  tot data len, ..          */
+            p_sock->RxQ_SizeCur -= (NET_SOCK_DATA_SIZE)data_len_tot; /* .. dec rx Q size by tot data len.               */
+        } else {                                                /* Else lim to min rx Q size.                           */
+            p_sock->RxQ_SizeCur  = (NET_SOCK_DATA_SIZE)0;
+        }
+
+        if (free == DEF_YES) {                                  /* If NOT freed by transport layer, ...                 */
+            NetSock_RxPktDiscard(p_buf_head, p_err);            /* ... free/discard pkt buf(s) [see Note #11b].         */
+            return (NET_SOCK_BSD_ERR_RX);
+        }
+    }
+
+
+
+                                                                /* ---------------- RTN RX'D SOCK DATA ---------------- */
+    if (data_len_tot < 1) {                                     /* If rx'd data len < 1, ...                            */
+       *p_err =  NET_SOCK_ERR_RX_Q_EMPTY;                       /* ... rtn rx Q empty err (see Note #7b1).              */
+        return (NET_SOCK_BSD_ERR_RX);
+    }
+
+
+   *p_err =   err_rtn;
+
+   (void)&sock_id;
+
+    return ((NET_SOCK_RTN_CODE)data_len_tot);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_RxDataHandlerStream()
+*
+* Description : (1) Receive data from a stream-type socket :
+*
+*                   (a) Validate socket connection state                                See Note #11
+*                   (b) Get remote host address                                         See Notes #4 & #5
+*                   (c) Configure socket receive :
+*                       (1) Get       socket's transport connection identification handler
+*                       (2) Configure socket flags
+*                   (d) Receive socket data from appropriate transport layer
+*                   (e) Return  socket data received
+*
+*
+* Argument(s) : sock_id             Socket descriptor/handle identifier of socket to receive data.
+*               -------             Argument checked   in NetSock_RxDataHandler().
+*
+*               p_sock              Pointer to a socket.
+*               ------              Argument validated in NetSock_RxDataHandler().
+*
+*               p_data_buf          Pointer to an application data buffer that will receive the socket's received
+*               ----------             data.
+*
+*                                   Argument checked   in NetSock_RxDataHandler().
+*
+*               data_buf_len        Size of the   application data buffer (in octets).
+*               ------------        Argument checked   in NetSock_RxDataHandler().
+*
+*               flags               Flags to select receive options; bit-field flags logically OR'd :
+*               -----
+*                                       NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                       NET_SOCK_FLAG_RX_DATA_PEEK      Receive socket data without consuming
+*                                                                           the socket data; i.e. socket data
+*                                                                           NOT removed from application receive
+*                                                                           queue(s).
+*                                       NET_SOCK_FLAG_RX_NO_BLOCK       Receive socket data without blocking
+*                                                                           (see Note #3).
+*
+*                                   Argument checked   in NetSock_RxDataHandler().
+*
+*               p_addr_remote       Pointer to an address buffer that will receive the socket address structure
+*               -------------           with the received data's remote address (see Notes #4 & #5), if NO error(s).
+*
+*                                   Argument checked     in NetSock_RxDataFrom();
+*                                            set to NULL in NetSock_RxData().
+*
+*               p_addr_len           Pointer to a variable to ... :
+*               ----------
+*                                       (a) Pass the size of the address buffer pointed to by 'p_addr_remote'.
+*                                       (b) (1) Return the actual size of socket address structure with the
+*                                                   received data's remote address, if NO error(s);
+*                                           (2) Return 0,                           otherwise.
+*
+*                                   Argument checked     in NetSock_RxDataFrom();
+*                                            set to NULL in NetSock_RxData().
+*
+*                                   See Note #4b.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket data successfully received; check return
+*                                                                       value for number of data octets received.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_RX_Q_EMPTY             Socket receive queue empty.
+*                               NET_SOCK_ERR_RX_Q_CLOSED            Socket receive queue closed.
+*
+*                               NET_ERR_RX                          Receive error.
+*
+*                                                                   ---- RETURNED BY NetConn_AddrRemoteGet() : ----
+*                                                                   --- RETURNED BY NetConn_ID_TransportGet() : ---
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*
+* Return(s)   : Number of positive data octets received, if NO error(s)              [see Note #7a].
+*
+*               NET_SOCK_BSD_RTN_CODE_CONN_CLOSED,       if socket connection closed (see Note #7b).
+*
+*               NET_SOCK_BSD_ERR_RX,                     otherwise                   (see Note #7c1).
+*
+* Caller(s)   : NetSock_RxDataHandler(),
+*               Secure receive functions.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) but MAY be called by appropriate secure receive function(s).
+*
+* Note(s)     : (2) (a) (1) Stream-type sockets transmit & receive all data octets in one or more non-
+*                           distinct packets.  In other words, the application data is NOT bounded by
+*                           any specific packet(s); rather, it is contiguous & sequenced from one packet
+*                           to the next.
+*
+*                       (2) IEEE Std 1003.1, 2004 Edition, Section 'recv() : DESCRIPTION' summarizes
+*                           that "for stream-based sockets, such as SOCK_STREAM, message boundaries
+*                           shall be ignored.  In this case, data shall be returned to the user as
+*                           soon as it becomes available, and no data shall be discarded".
+*
+*                   (b) (1) Thus if the socket's type is stream & the receive data buffer size is NOT
+*                           large enough for the received data, the receive data buffer is maximally
+*                           filled with receive data & the remaining data octets remain queued for
+*                           later application-socket receives.
+*
+*                       (2) Therefore, a stream-type socket receive is signaled ONLY when data is
+*                           received for a socket connection where data was previously unavailable.
+*
+*                   (c) Consequently, it is typical -- but NOT absolutely required -- that a single
+*                       application task only receive or request to receive application data from a
+*                       stream-type socket.
+*
+*                   See also 'NetSock_RxDataHandler()  Note #2b'.
+*
+*               (3) If 'flags' argument set to 'NET_SOCK_FLAG_RX_NO_BLOCK'; socket receive does NOT configure
+*                   the transport layer receive to block, regardless if the socket is configured to block.
+*
+*               (4) (a) If a pointer to remote address buffer is provided, it is assumed that the remote
+*                       address buffer has been previously validated for the remote address to be returned.
+*
+*                   (b) If a pointer to remote address buffer is provided, it is assumed that a pointer to
+*                       an address length buffer is also available & has been previously validated.
+*
+*                   (c) The remote address is obtained from the socket connection's remote address.
+*
+*               (5) (a) Socket address structure 'AddrFamily' member returned in host-order & SHOULD NOT
+*                       be converted to network-order.
+*
+*                   (b) Socket address structure addresses returned in network-order & SHOULD be converted
+*                       from network-order to host-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (6) (a) Socket connection addresses are maintained in network-order.
+*
+*                   (b) However, since the port number & address are copied from a network-order multi-octet
+*                       array directly into a network-order socket address structure, they do NOT need to be
+*                       converted from host-order to network-order.
+*
+*               (7) IEEE Std 1003.1, 2004 Edition, Section 'recv() : RETURN VALUE' states that :
+*
+*                   (a) "Upon successful completion, recv() shall return the length of the message in bytes."
+*
+*                   (b) "If no messages are available to be received and the peer has performed an orderly
+*                        shutdown, recv() shall return 0."
+*
+*                       (1) Since the socket receive return value of '0' is reserved for socket connection
+*                           closes; NO socket receive -- fault or non-fault -- should ever return '0' octets
+*                           received.
+*
+*                   (c) (1) "Otherwise, -1 shall be returned" ...
+*                       (2) "and 'errno' set to indicate the error."
+*                           'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   See also 'NetSock_RxDataHandler()  Note #7'.
+*
+*               (8) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*
+*               (9) Default case already invalidated in NetSock_Open().  However, the default case
+*                   is included as an extra precaution in case 'Protocol' is incorrectly modified.
+*
+*              (10) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) NetSock_RxDataHandlerStream() assumes that stream-type sockets have been previously
+*                       validated as connected by caller function(s).  Therefore, on any internal socket
+*                       connection error(s), the socket MUST be closed.
+*
+*                   (b) Since transport layer error(s) may NOT be critical &/or may be transitory, NO network
+*                       or socket resource(s) are closed/freed.
+*
+*                   (c) If transport layer reports closed receive queue, socket layer is free to close/free
+*                       ALL network or transport connection resource(s).
+*
+*                       See also 'net_tcp.c  NetTCP_RxAppData()  Note #2e3A'.
+*
+*              (11) Socket descriptor read availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor read handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also  Note #1a,
+*                            'NetSock_SelDescHandlerRdStream()   Note #3',
+*                          & 'NetSock_SelDescHandlerErrStream()  Note #3'.
+*
+*              (12) 'sock_id' may NOT be necessary but is included for consistency.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+NET_SOCK_RTN_CODE  NetSock_RxDataHandlerStream (NET_SOCK_ID          sock_id,
+                                                NET_SOCK            *p_sock,
+                                                void                *p_data_buf,
+                                                CPU_INT16U           data_buf_len,
+                                                NET_SOCK_API_FLAGS   flags,
+                                                NET_SOCK_ADDR       *p_addr_remote,
+                                                NET_SOCK_ADDR_LEN   *p_addr_len,
+                                                NET_ERR             *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_SOCK_ADDR_IPv4  *p_addr_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_SOCK_ADDR_IPv6  *p_addr_ipv6;
+#endif
+
+    CPU_BOOLEAN          no_block;
+    CPU_BOOLEAN          block;
+    CPU_BOOLEAN          peek;
+    NET_CONN_ID          conn_id;
+    NET_CONN_ID          conn_id_transport;
+    NET_CONN_ADDR_LEN    addr_len;
+    CPU_INT08U           addr_remote[NET_SOCK_ADDR_LEN_MAX];
+    NET_FLAGS            flags_transport;
+    CPU_INT16U           data_len_tot;
+    NET_ERR              err;
+    NET_ERR              err_rtn;
+
+
+   (void)&sock_id;                                              /* Prevent 'variable unused' warning (see Note #12).    */
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err =  NET_SOCK_ERR_NOT_USED;
+             return (NET_SOCK_BSD_ERR_RX);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;
+             return (NET_SOCK_BSD_ERR_RX);
+
+
+        case NET_SOCK_STATE_CLOSED:
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_LISTEN:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_OP;
+             return (NET_SOCK_BSD_ERR_RX);
+
+
+        case NET_SOCK_STATE_CONN_DONE:
+             p_sock->State = NET_SOCK_STATE_CONN;
+             break;
+
+
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;
+             return (NET_SOCK_BSD_ERR_RX);
+    }
+
+
+
+                                                                /* ----------------- GET REMOTE ADDR ------------------ */
+    conn_id = p_sock->ID_Conn;
+    if (p_addr_remote != (NET_SOCK_ADDR *)0) {                   /* If remote addr buf avail, ...                        */
+                                                                /* ... rtn sock conn's remote addr (see Note #4c).      */
+        addr_len = sizeof(addr_remote);
+        NetConn_AddrRemoteGet((NET_CONN_ID        ) conn_id,
+                              (CPU_INT08U        *)&addr_remote[0],
+                              (NET_CONN_ADDR_LEN *)&addr_len,
+                              (NET_ERR           *) p_err);
+        if (*p_err != NET_CONN_ERR_NONE) {                       /* See Note #10a.                                       */
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             return (NET_SOCK_BSD_ERR_RX);
+        }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (addr_len != NET_SOCK_ADDR_LEN_MAX) {                /* See Note #10a.                                       */
+            NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+           *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+            return (NET_SOCK_BSD_ERR_RX);
+        }
+#endif
+
+        switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+            case NET_SOCK_FAMILY_IP_V4:
+                                                                /* Cfg remote addr struct (see Notes #5 & #6b).         */
+                 p_addr_ipv4  = (NET_SOCK_ADDR_IPv4 *)p_addr_remote;
+                 NET_UTIL_VAL_SET_HOST_16(&p_addr_ipv4->AddrFamily, NET_SOCK_ADDR_FAMILY_IP_V4);
+                 NET_UTIL_VAL_COPY_16(&p_addr_ipv4->Port, &addr_remote[NET_SOCK_ADDR_IP_IX_PORT]);
+                 NET_UTIL_VAL_COPY_32(&p_addr_ipv4->Addr, &addr_remote[NET_SOCK_ADDR_IP_V4_IX_ADDR]);
+                 Mem_Clr((void     *) &p_addr_ipv4->Unused[0],
+                         (CPU_SIZE_T)  NET_SOCK_ADDR_IPv4_NBR_OCTETS_UNUSED);
+                                                                /* See Note  #4b.                                       */
+                *p_addr_len = (NET_SOCK_ADDR_LEN )NET_SOCK_ADDR_IPv4_SIZE;
+                break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+            case NET_SOCK_FAMILY_IP_V6:
+                                                                /* Cfg remote addr struct (see Notes #5 & #6b).         */
+                 p_addr_ipv6  = (NET_SOCK_ADDR_IPv6 *)p_addr_remote;
+                 NET_UTIL_VAL_SET_HOST_16(&p_addr_ipv6->AddrFamily, NET_SOCK_ADDR_FAMILY_IP_V6);
+                 NET_UTIL_VAL_COPY_16(&p_addr_ipv6->Port, &addr_remote[NET_SOCK_ADDR_IP_IX_PORT]);
+                 Mem_Copy(&p_addr_ipv6->Addr, &addr_remote[NET_SOCK_ADDR_IP_V6_IX_ADDR], NET_IPv6_ADDR_SIZE);
+                                                                /* See Note  #4b.                                       */
+                *p_addr_len = (NET_SOCK_ADDR_LEN )NET_SOCK_ADDR_IPv6_SIZE;
+                 break;
+#endif
+
+            default:
+                                                                /* See Notes #8 & #10a.                                 */
+                NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+                NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+               *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+                return (NET_SOCK_BSD_ERR_RX);
+        }
+    }
+
+
+                                                                /* ------------------- CFG SOCK RX -------------------- */
+                                                                /* Get transport conn id.                               */
+    conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {                           /* See Note #10a.                                       */
+         NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+         return (NET_SOCK_BSD_ERR_RX);
+    }
+    if  (conn_id_transport == NET_CONN_ID_NONE) {               /* See Note #10a.                                       */
+         NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+        *p_err =  NET_SOCK_ERR_CONN_FAIL;
+         return (NET_SOCK_BSD_ERR_RX);
+    }
+
+                                                                /* Cfg sock rx   flags.                                 */
+    no_block = DEF_BIT_IS_SET((NET_SOCK_FLAGS)flags, NET_SOCK_FLAG_RX_NO_BLOCK);
+    if (no_block == DEF_YES) {                                  /* If 'No Block' flag set,         ...                  */
+        block = DEF_NO;                                         /* ... do NOT block (see Note #3); ...                  */
+    } else {                                                    /* ... else chk sock's no-block flag.                   */
+        block = DEF_BIT_IS_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+    }
+
+                                                                /* Chk sock peek flags.                                 */
+    peek = DEF_BIT_IS_SET((NET_SOCK_FLAGS)flags, NET_SOCK_FLAG_RX_DATA_PEEK);
+
+
+
+                                                                /* ------------------- RX SOCK DATA ------------------- */
+    data_len_tot = 0u;
+    err_rtn      = NET_SOCK_ERR_FAULT;
+
+    switch (p_sock->Protocol) {                                  /* Rx app data from transport layer rx.                 */
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+        case NET_SOCK_PROTOCOL_TCP:
+                                                                /* Cfg transport rx flags.                              */
+             flags_transport = NET_TCP_FLAG_NONE;
+             if (block == DEF_YES) {
+                 DEF_BIT_SET(flags_transport, NET_TCP_FLAG_RX_BLOCK);
+             }
+             if (peek  == DEF_YES) {
+                 DEF_BIT_SET(flags_transport, NET_TCP_FLAG_RX_DATA_PEEK);
+             }
+
+             data_len_tot = NetTCP_RxAppData(conn_id_transport,
+                                             p_data_buf,
+                                             data_buf_len,
+                                             flags_transport,
+                                            &err);
+             switch (err) {
+                 case NET_TCP_ERR_NONE:
+                      err_rtn = NET_SOCK_ERR_NONE;
+                      break;
+
+
+                 case NET_TCP_ERR_RX_Q_EMPTY:
+                      err_rtn = NET_SOCK_ERR_RX_Q_EMPTY;
+                      break;
+
+
+                 case NET_TCP_ERR_RX_Q_CLOSED:
+                      err_rtn = NET_SOCK_ERR_RX_Q_CLOSED;
+                      break;
+
+
+                 case NET_TCP_ERR_INVALID_CONN:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_RX_Q_SIGNAL_ABORT:
+                 case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+                      err_rtn = NET_SOCK_ERR_FAULT;
+                      break;
+
+
+                 case NET_INIT_ERR_NOT_COMPLETED:
+                 case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 default:
+                      err_rtn = NET_ERR_RX;
+                      break;
+             }
+             break;
+#endif
+#endif
+
+        case NET_SOCK_PROTOCOL_NONE:
+        default:                                                /* See Notes #9 & #10a.                                 */
+            (void)&conn_id_transport;                           /* Prevent possible 'variable unused' warnings.         */
+            (void)&flags_transport;
+            (void)&err;
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+             return (NET_SOCK_BSD_ERR_RX);
+    }
+
+
+    switch (err_rtn) {                                          /* Demux transport-to-sock layer err.                   */
+        case NET_SOCK_ERR_NONE:
+             break;
+
+
+        case NET_SOCK_ERR_RX_Q_CLOSED:                          /* If transport layer rx Q closed,               ...    */
+             if (p_sock->State == NET_SOCK_STATE_CLOSING_DATA_AVAIL) {
+                 NetSock_CloseHandler(p_sock, DEF_YES, DEF_YES); /* ... close/free sock's conn(s) [see Note #10c] ...    */
+             }
+            *p_err =  err_rtn;                                   /* ... & rtn closed code         (see Note #7b).        */
+             return (NET_SOCK_BSD_RTN_CODE_CONN_CLOSED);
+
+
+        case NET_SOCK_ERR_RX_Q_EMPTY:
+        case NET_SOCK_ERR_FAULT:
+        case NET_ERR_RX:
+        default:
+            *p_err =  err_rtn;
+             return (NET_SOCK_BSD_ERR_RX);
+    }
+
+
+
+                                                                /* ---------------- RTN RX'D SOCK DATA ---------------- */
+    if (data_len_tot < 1) {                                     /* If rx'd data len < 1, ...                            */
+       *p_err =  NET_SOCK_ERR_RX_Q_EMPTY;                        /* ... rtn rx Q empty err (see Note #7b1).              */
+        return (NET_SOCK_BSD_ERR_RX);
+    }
+
+
+   *p_err =   err_rtn;
+
+    return ((NET_SOCK_RTN_CODE)data_len_tot);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_TxDataHandler()
+*
+* Description : (1) Transmit data through a socket :
+*
+*                   (a) Validate transmit data                                          See Note #2
+*                   (b) Validate transmit flags                                         See Note #3
+*                   (c) Acquire  network  lock
+*                   (d) Validate socket   used
+*                   (e) Validate remote   address                                       See Note #4
+*                   (f) Transmit socket   data
+*                   (g) Release  network  lock
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to transmit data.
+*
+*               p_data          Pointer to application data to transmit.
+*
+*               data_len        Length of  application data to transmit (in octets) [see Note #2].
+*
+*               flags           Flags to select transmit options (see Note #3); bit-field flags logically OR'd :
+*
+*                                   NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                   NET_SOCK_FLAG_TX_NO_BLOCK       Transmit socket data without blocking.
+*
+*               p_addr_remote    Pointer to destination address buffer (see Note #4).
+*
+*               addr_len        Length of  destination address buffer (in octets).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_FAULT_NULL_PTR               Argument 'p_data' passed a NULL pointer.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_FLAG           Invalid socket flags.
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE      Invalid data size (see Notes #2b & #2a1B2).
+*
+*                                                                   --------- RETURNED BY NetSock_IsUsed() : ---------
+*                               NET_INIT_ERR_NOT_COMPLETED          Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK           Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*
+*                                                                   --- RETURNED BY NetSock_IsValidAddrRemote() : ----
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_CONN           Invalid socket connection.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid socket address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid socket port number.
+*
+*                                                                   - RETURNED BY NetSock_TxDataHandlerDatagram() : --
+*                                                                   -- RETURNED BY NetSock_TxDataHandlerStream() : ---
+*                               NET_SOCK_ERR_NONE                   Socket data successfully transmitted; check return
+*                                                                       value for number of data octets transmitted.
+*
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_ERR_IF_LINK_DOWN              Socket connection's interface link down.
+*
+*                               NET_ERR_TX                          Transitory transmit error.
+*
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+*                                                                   - RETURNED BY NetSock_TxDataHandlerDatagram() : --
+*                               NET_SOCK_ERR_ADDR_IN_USE            Socket address already in use.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL        NO        address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS   Interface address(s) configuration in progress.
+*                               NET_ERR_FAULT_NULL_FNCT             Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+*                                                                   -- RETURNED BY NetSock_TxDataHandlerStream() : ---
+*                               NET_SOCK_ERR_TX_Q_CLOSED            Socket transmit queue closed.
+*
+*                                                                   -- RETURNED BY NetSecure_SockTxDataHandler() : ---
+*                               NET_SECURE_ERR_NULL_PTR             Secure session pointer is NULL.
+*
+*                                                                   See specific network security port for
+*                                                                       additional return error codes.
+*
+*                                                                   ----- RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Number of positive data octets transmitted, if NO error(s)              [see Note #5a1].
+*
+*               NET_SOCK_BSD_RTN_CODE_CONN_CLOSED,          if socket connection closed (see Note #5b).
+*
+*               NET_SOCK_BSD_ERR_TX,                        otherwise                   (see Note #5a2A).
+*
+* Caller(s)   : NetSock_TxDataTo(),
+*               NetSock_TxData().
+*
+* Note(s)     : (2) (a) (1) (A) Datagram-type sockets transmit & receive all data atomically -- i.e. every
+*                               single, complete datagram transmitted MUST be received as a single, complete
+*                               datagram.  Thus each call to transmit data MUST be transmitted in a single,
+*                               complete datagram.
+*
+*                           (B) (1) IEEE Std 1003.1, 2004 Edition, Section 'send() : DESCRIPTION' states
+*                                   that "if the message is too long to pass through the underlying protocol,
+*                                   send() shall fail and no data shall be transmitted".
+*
+*                               (2) Since IP transmit fragmentation is NOT currently supported (see 'net_ip.h
+*                                   Note #1d'), if the socket's type is datagram & the requested transmit
+*                                   data length is greater than the socket/transport layer MTU, then NO data
+*                                   is transmitted & NET_SOCK_ERR_INVALID_DATA_SIZE error is returned.
+*
+*                       (2) (A) (1) Stream-type sockets transmit & receive all data octets in one or more
+*                                   non-distinct packets.  In other words, the application data is NOT
+*                                   bounded by any specific packet(s); rather, it is contiguous & sequenced
+*                                   from one packet to the next.
+*
+*                               (2) Thus if the socket's type is stream & the socket's transmit data queue(s)
+*                                   are NOT large enough for the transmitted data, the  transmit data queue(s)
+*                                   are maximally filled with transmit data & the remaining data octets are
+*                                   discarded but may be re-transmitted by later application-socket transmits.
+*
+*                               (3) Therefore, NO stream-type socket transmit data length should be "too long
+*                                   to pass through the underlying protocol" & cause the socket transmit to
+*                                   "fail ... [with] no data ... transmitted" (see Note #2a1B1).
+*
+*                           (B) Thus it is typical -- but NOT absolutely required -- that a single application
+*                               task ONLY transmit or request to transmit data to a stream-type socket.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*
+*                   See also 'NetSock_TxDataHandlerDatagram()  Note #2',
+*                          & 'NetSock_TxDataHandlerStream()    Note #3'.
+*
+*               (3) Only some socket transmit flag options are implemented.  If other flag options are
+*                   requested, NetSock_TxData() handler function(s) abort & return appropriate error codes
+*                   so that requested flag options are NOT silently ignored.
+*
+*               (4) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order &
+*                       MUST NOT be converted to/from network-order.
+*
+*                   (b) Socket address structure addresses MUST be configured/converted from host-order
+*                       to network-order.
+*
+*                   See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*
+*               (5) (a) IEEE Std 1003.1, 2004 Edition, Section 'send() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, send() shall return the number of bytes sent."
+*
+*                           (A) Section 'send() : DESCRIPTION' elaborates that "successful completion
+*                               of a call to sendto() does not guarantee delivery of the message".
+*
+*                           (B) (1) Thus applications SHOULD verify the actual returned number of data
+*                                   octets transmitted &/or prepared for transmission.
+*
+*                               (2) In addition, applications MAY desire verification of receipt &/or
+*                                   acknowledgement of transmitted data to the remote host -- either
+*                                   inherently by the transport layer or explicitly by the application.
+*
+*                       (2) (A) "Otherwise, -1 shall be returned" ...
+*                               (1) Section 'send() : DESCRIPTION' elaborates that "a return value of
+*                                   -1 indicates only locally-detected errors".
+*
+*                           (B) "and 'errno' set to indicate the error."
+*                               'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   (b) Although NO socket send() specification states to return '0' when the socket's
+*                       connection is closed, it seems reasonable to return '0' since it is possible for the
+*                       socket connection to be close()'d or shutdown() by the remote host.
+*
+*                       (1) Since the socket transmit return value of '0' is reserved for socket connection
+*                           closes; NO socket transmit -- fault or non-fault -- should ever return '0' octets
+*                           transmitted.
+*
+*                   See also 'NetSock_TxDataHandlerDatagram()  Note #6'
+*                          & 'NetSock_TxDataHandlerStream()    Note #5'.
+*
+*               (6) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'SockType' is incorrectly modified.
+**********************************************************************************************************
+*/
+
+static  NET_SOCK_RTN_CODE  NetSock_TxDataHandler (NET_SOCK_ID          sock_id,
+                                                  void                *p_data,
+                                                  CPU_INT16U           data_len,
+                                                  NET_SOCK_API_FLAGS   flags,
+                                                  NET_SOCK_ADDR       *p_addr_remote,
+                                                  NET_SOCK_ADDR_LEN    addr_len,
+                                                  NET_ERR             *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN  == DEF_ENABLED)
+   CPU_BOOLEAN         valid;
+   NET_SOCK_FLAGS      flag_mask;
+#endif
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+   CPU_BOOLEAN         secure;
+#endif
+   NET_SOCK           *p_sock;
+   NET_SOCK_RTN_CODE   rtn_code;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ----------------- VALIDATE TX DATA ----------------- */
+   if (p_data == (void *)0) {                                   /* Validate data ptr.                                   */
+       NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NullPtrCtr);
+      *p_err =  NET_ERR_FAULT_NULL_PTR;
+       return (NET_SOCK_BSD_ERR_TX);
+   }
+#if 0
+   if (data_len < NET_SOCK_DATA_SIZE_MIN) {                     /* Validate data len (see Note #2b).                    */
+       NET_CTR_ERR_INC(Net_ErrCtrs.Sock.TxInvalidSizeCtr);
+      *p_err =  NET_SOCK_ERR_INVALID_DATA_SIZE;
+       return (NET_SOCK_BSD_ERR_TX);
+   }
+#endif
+
+                                                                /* ---------------- VALIDATE TX FLAGS ----------------- */
+   flag_mask = NET_SOCK_FLAG_NONE       |
+               NET_SOCK_FLAG_TX_NO_BLOCK;
+                                                                /* If any invalid flags req'd, rtn err (see Note #3).   */
+   if (((NET_SOCK_FLAGS)flags & (NET_SOCK_FLAGS)~flag_mask) != NET_SOCK_FLAG_NONE) {
+       NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFlagsCtr);
+      *p_err =  NET_SOCK_ERR_INVALID_FLAG;
+       return (NET_SOCK_BSD_ERR_TX);
+   }
+#endif
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+   Net_GlobalLockAcquire((void *)&NetSock_TxDataHandler, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+  (void)NetSock_IsUsed(sock_id, p_err);
+   if (*p_err != NET_SOCK_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+   p_sock = &NetSock_Tbl[sock_id];
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* --------------- VALIDATE REMOTE ADDR --------------- */
+   if (p_addr_remote != (NET_SOCK_ADDR *)0) {
+       valid = NetSock_IsValidAddrRemote(p_addr_remote, addr_len, p_sock, p_err);
+       if (valid != DEF_YES) {
+           goto exit_fail;
+       }
+   }
+#else
+  (void)&addr_len;                                              /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+                                                                /* ------------------- TX SOCK DATA ------------------- */
+   switch (p_sock->SockType) {
+       case NET_SOCK_TYPE_DATAGRAM:
+            rtn_code = NetSock_TxDataHandlerDatagram((NET_SOCK_ID       )sock_id,
+                                                     (NET_SOCK         *)p_sock,
+                                                     (void             *)p_data,
+                                                     (CPU_INT16U        )data_len,
+                                                     (NET_SOCK_API_FLAGS)flags,
+                                                     (NET_SOCK_ADDR    *)p_addr_remote,
+                                                     (NET_ERR          *)p_err);
+            break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+       case NET_SOCK_TYPE_STREAM:
+#ifdef  NET_SECURE_MODULE_EN
+            secure = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE);
+#else
+            secure = DEF_NO;
+#endif
+            if (secure  != DEF_YES) {
+                rtn_code = NetSock_TxDataHandlerStream((NET_SOCK_ID       )sock_id,
+                                                       (NET_SOCK         *)p_sock,
+                                                       (void             *)p_data,
+                                                       (CPU_INT16U        )data_len,
+                                                       (NET_SOCK_API_FLAGS)flags,
+                                                       (NET_ERR          *)p_err);
+            } else {
+#ifdef  NET_SECURE_MODULE_EN                               /* If sock secure, tx data via secure handler.          */
+                rtn_code = NetSecure_SockTxDataHandler((NET_SOCK *)p_sock,
+                                                       (void     *)p_data,
+                                                       (CPU_INT16U)data_len,
+                                                       (NET_ERR  *)p_err);
+#else
+
+               *p_err =  NET_SOCK_ERR_FAULT;
+                goto exit_fault;
+#endif
+            }
+            break;
+#endif
+
+
+       case NET_SOCK_TYPE_NONE:
+       case NET_SOCK_TYPE_FAULT:
+       default:                                                 /* See Note #6.                                         */
+            NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+           *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+            goto exit_fault;
+   }
+
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   return (NET_SOCK_BSD_ERR_TX);
+
+exit_fault:
+    NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+#endif
+    rtn_code = NET_SOCK_BSD_ERR_TX;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+   return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetSock_TxDataHandlerDatagram()
+*
+* Description : (1) Transmit data through a datagram-type socket :
+*
+*                   (a) Validate  socket connection state                               See Note #10
+*                   (b) Configure socket transmit :
+*                       (1) Configure source/destination addresses for transmit
+*                       (2) Configure socket flags
+*                   (c) Transmit  socket data via appropriate transport layer
+*                   (d) Return    socket data transmitted length
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to receive data.
+*               -------         Argument checked   in NetSock_TxDataHandler().
+*
+*               p_sock          Pointer to a socket.
+*               ------          Argument validated in NetSock_TxDataHandler().
+*
+*               p_data          Pointer to application data.
+*               ------          Argument checked   in NetSock_TxDataHandler().
+*
+*               data_len        Length of  application data (in octets) [see Note #2].
+*               --------        Argument checked   in NetSock_TxDataHandler().
+*
+*               flags           Flags to select transmit options; bit-field flags logically OR'd :
+*               -----
+*                                   NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                   NET_SOCK_FLAG_TX_NO_BLOCK       Transmit socket data without blocking
+*                                                                       (see Note #3).
+*
+*                               Argument checked   in NetSock_TxDataHandler().
+*
+*               p_addr_remote   Pointer to destination address buffer (see Note #4).
+*               -------------   Argument checked   in NetSock_TxDataHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket data successfully transmitted.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_INVALID_FAMILY         Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE      Invalid data size (see Notes #2b & #2a2B).
+*                               NET_ERR_IF_LINK_DOWN              Socket connection's interface link down.
+*
+*                               NET_ERR_TX                          Transitory transmit error.
+*
+*                                                                   ------ RETURNED BY NetSock_BindHandler() : ------
+*                               NET_ERR_FAULT_NULL_PTR               Argument(s) passed a NULL pointer.
+*                               NET_SOCK_ERR_INVALID_TYPE           Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_ADDR           Invalid socket address.
+*                               NET_SOCK_ERR_INVALID_ADDR_LEN       Invalid socket address structure length.
+*                               NET_SOCK_ERR_INVALID_PORT_NBR       Invalid socket port number.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*                               NET_SOCK_ERR_ADDR_IN_USE            Socket address already in use.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_CONN_ERR_NONE_AVAIL             NO available connections to allocate.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_TYPE           Invalid network connection type.
+*                               NET_CONN_ERR_INVALID_PROTOCOL_IX    Invalid network connection list protocol index.
+*                               NET_CONN_ERR_ADDR_IN_USE            Network connection address already in use.
+*
+*                                                                   --- RETURNED BY NetIP_GetAddrHostHandler() : ----
+*                               NET_IF_ERR_INVALID_IF               Invalid network interface number.
+*                               NET_IPv4_ERR_ADDR_NONE_AVAIL          NO address(s) configured on interface.
+*                               NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS     Invalid interface configuration address.
+*
+*                                                                   ----- RETURNED BY NetConn_AddrLocalGet() : ------
+*                                                                   ----- RETURNED BY NetConn_AddrRemoteGet() : -----
+*                               NET_ERR_FAULT_NULL_FNCT               Argument(s) passed a NULL pointer.
+*                               NET_CONN_ERR_NOT_USED               Network connection(s) NOT currently used.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid network connection address length.
+*                               NET_CONN_ERR_ADDR_NOT_USED          Network connection address NOT in use.
+*
+* Return(s)   : Number of positive data octets transmitted, if NO error(s)              [see Note #6a1].
+*
+*               NET_SOCK_BSD_RTN_CODE_CONN_CLOSED,          if socket connection closed (see Note #6b).
+*
+*               NET_SOCK_BSD_ERR_TX,                        otherwise                   (see Note #6a2A).
+*
+* Caller(s)   : NetSock_TxDataHandler().
+*
+* Note(s)     : (2) (a) (1) Datagram-type sockets transmit & receive all data atomically -- i.e. every
+*                           single, complete datagram transmitted MUST be received as a single, complete
+*                           datagram.  Thus each call to transmit data MUST be transmitted in a single,
+*                           complete datagram.
+*
+*                       (2) (A) IEEE Std 1003.1, 2004 Edition, Section 'send() : DESCRIPTION' states that
+*                               "if the message is too long to pass through the underlying protocol, send()
+*                               shall fail and no data shall be transmitted".
+*
+*                           (B) Since IP transmit fragmentation is NOT currently supported (see 'net_ip.h
+*                               Note #1d'), if the socket's type is datagram & the requested transmit
+*                               data length is greater than the socket/transport layer MTU, then NO data
+*                               is transmitted & NET_SOCK_ERR_INVALID_DATA_SIZE error is returned.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*
+*                   See also 'NetSock_TxDataHandler()  Note #2a'.
+*
+*               (3) If 'flags' argument set to 'NET_SOCK_FLAG_TX_NO_BLOCK'; socket transmit does NOT configure
+*                   the transport layer transmit to block, regardless if the socket is configured to block.
+*
+*               (4) If a pointer to remote address buffer is provided, it is assumed that the remote
+*                   address buffer & remote address buffer length have been previously validated.
+*
+*               (5) (a) A socket's local address MUST be available in order to transmit.
+*
+*                   (b) If a protocol's wildcard address is specified in the socket connection's
+*                       local address structure, use the default host address on the default interface
+*                       when transmitting packets.
+*
+*               (6) (a) IEEE Std 1003.1, 2004 Edition, Section 'send() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, send() shall return the number of bytes sent."
+*
+*                           (A) Section 'send() : DESCRIPTION' elaborates that "successful completion
+*                               of a call to sendto() does not guarantee delivery of the message".
+*
+*                           (B) (1) Thus applications SHOULD verify the actual returned number of data
+*                                   octets transmitted &/or prepared for transmission.
+*
+*                               (2) In addition, applications MAY desire verification of receipt &/or
+*                                   acknowledgement of transmitted data to the remote host -- either
+*                                   inherently by the transport layer or explicitly by the application.
+*
+*                       (2) (A) "Otherwise, -1 shall be returned" ...
+*                               (1) Section 'send() : DESCRIPTION' elaborates that "a return value of
+*                                   -1 indicates only locally-detected errors".
+*
+*                           (B) "and 'errno' set to indicate the error."
+*                               'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   (b) Although NO socket send() specification states to return '0' when the socket's
+*                       connection is closed, it seems reasonable to return '0' since it is possible for the
+*                       socket connection to be close()'d or shutdown() by the remote host.
+*
+*                       (1) Since the socket transmit return value of '0' is reserved for socket connection
+*                           closes; NO socket transmit -- fault or non-fault -- should ever return '0' octets
+*                           transmitted.
+*
+*                       (2) However, since NO actual connections are implemented for datagram-type sockets
+*                           (see 'NetSock_ConnHandlerDatagram()  Note #2a'), NO actual socket connections
+*                           can be closed on datagram-type sockets.  Therefore, datagram-type socket
+*                           transmits MUST NEVER return '0'.
+*
+*                   See also 'NetSock_TxDataHandler()  Note #5'.
+*
+*               (7) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*
+*               (8) Default case already invalidated in NetSock_Open().  However, the default case
+*                   is included as an extra precaution in case 'Protocol' is incorrectly modified.
+*
+*               (9) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) NetSock_TxDataHandlerDatagram() assumes that internal socket configuration
+*                       has been previously validated by caller function(s).  Therefore, on any
+*                       internal socket configuration error(s), the socket MUST be closed.
+*
+*                   (b) NetSock_TxDataHandlerDatagram() assumes that any internal socket connection
+*                       error(s) on datagram-type sockets may NOT be critical &/or may be transitory;
+*                       thus NO network or socket resource(s) are closed/freed.
+*
+*                   (c) Since transport layer error(s) may NOT be critical &/or may be transitory, NO
+*                       network or socket resource(s) are closed/freed.
+*
+*              (10) Socket descriptor write availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor write handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also  Note #1a,
+*                            'NetSock_SelDescHandlerWrDatagram()   Note #3',
+*                          & 'NetSock_SelDescHandlerErrDatagram()  Note #3'.
+*
+*              (11) (a) RFC #1122, Section 4.1.4 states that "an application-layer program MUST be able
+*                       to set the TTL and TOS values as well as IP options for sending a ... datagram,
+*                       and these values must be passed transparently to the IP layer".
+*
+*                   (b) IP transmit options currently NOT implemented
+*
+*              (12) 'sock_id' may NOT be necessary but is included for consistency.
+*********************************************************************************************************
+*/
+
+static  NET_SOCK_RTN_CODE  NetSock_TxDataHandlerDatagram (NET_SOCK_ID          sock_id,
+                                                          NET_SOCK            *p_sock,
+                                                          void                *p_data,
+                                                          CPU_INT16U           data_len,
+                                                          NET_SOCK_API_FLAGS   flags,
+                                                          NET_SOCK_ADDR       *p_addr_remote,
+                                                          NET_ERR             *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+           NET_SOCK_ADDR_IPv4      *p_addr_ipv4;
+           NET_IPv4_ADDR            src_addrv4;
+           NET_IPv4_ADDR            src_addr_hostv4;
+           NET_IPv4_ADDR            dest_addrv4;
+           NET_IPv4_ADDR            addr_ip_tblv4[NET_IPv4_CFG_IF_MAX_NBR_ADDR];
+           CPU_BOOLEAN              addr_initv4;
+           NET_IPv4_TOS             TOS;
+           NET_IPv4_TTL             TTL;
+           NET_IPv4_FLAGS           flags_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+           NET_SOCK_ADDR_IPv6      *p_addr_ipv6;
+    const  NET_IPv6_ADDRS          *p_ipv6_addrs;
+           NET_IPv6_ADDR            src_addrv6;
+           NET_IPv6_ADDR            dest_addrv6;
+           CPU_BOOLEAN              is_addr_wildcard;
+           NET_IPv6_TRAFFIC_CLASS   traffic_class;
+           NET_IPv6_FLOW_LABEL      flow_label;
+           NET_IPv6_HOP_LIM         hop_lim;
+           NET_IPv6_FLAGS           flags_ipv6;
+#endif
+#ifdef  NET_IPv4_MODULE_EN
+           NET_IP_ADDRS_QTY         addr_ip_tbl_qty;
+#endif
+#ifdef  NET_MCAST_TX_MODULE_EN
+           CPU_BOOLEAN             addr_dest_multicast = DEF_NO;
+#endif
+           CPU_BOOLEAN              no_block;
+           CPU_BOOLEAN              block;
+           NET_CONN_ID              conn_id;
+           NET_IF_NBR               if_nbr;
+           CPU_INT08U               addr_local[NET_SOCK_ADDR_LEN_MAX];
+           CPU_INT08U               addr_remote[NET_SOCK_ADDR_LEN_MAX];
+           NET_CONN_ADDR_LEN        addr_len;
+           NET_PORT_NBR             src_port;
+           NET_PORT_NBR             dest_port;
+           NET_FLAGS                flags_transport;
+           CPU_INT16U               data_len_tot;
+           NET_ERR                  err;
+           NET_ERR                  err_rtn;
+
+
+   (void)&sock_id;                                              /* Prevent 'variable unused' warning (see Note #12).    */
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((NET_SOCK_RTN_CODE)0);
+    }
+#endif
+                                                                /* ----------------- VALIDATE TX DATA ----------------- */
+    if (data_len > p_sock->TxQ_SizeCfgd) {
+       *p_err =  NET_SOCK_ERR_INVALID_DATA_SIZE;
+        return (NET_SOCK_BSD_ERR_TX);
+    }
+
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err =  NET_SOCK_ERR_NOT_USED;
+             return (NET_SOCK_BSD_ERR_TX);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;
+             return (NET_SOCK_BSD_ERR_TX);
+
+
+        case NET_SOCK_STATE_CLOSED:                             /* If sock closed, bind to random local addr.           */
+            (void)NetSock_BindHandler((NET_SOCK_ID      )sock_id,
+                                      (NET_SOCK_ADDR   *)0,
+                                      (NET_SOCK_ADDR_LEN)0,
+                                      (CPU_BOOLEAN      )DEF_YES,
+                                      (NET_SOCK_ADDR   *)p_addr_remote,
+                                      (NET_ERR         *)p_err);
+             if (*p_err != NET_SOCK_ERR_NONE) {
+                  return (NET_SOCK_BSD_ERR_TX);
+             }
+             break;
+
+
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_CONN:
+             break;
+
+
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+             p_sock->State = NET_SOCK_STATE_CONN;
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        case NET_SOCK_STATE_LISTEN:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        default:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;
+             return (NET_SOCK_BSD_ERR_TX);
+    }
+
+
+
+                                                                /* -------------- CFG TX SRC/DEST ADDRS --------------- */
+#ifdef  NET_IP_MODULE_EN
+    conn_id  = p_sock->ID_Conn;
+
+                                                                /* Cfg remote/dest addr.                                */
+    if (p_addr_remote == (NET_SOCK_ADDR *)0) {                   /* If remote addr NOT provided, ...                     */
+                                                                /* ... get sock conn's remote addr.                     */
+        addr_len = sizeof(addr_remote);
+        NetConn_AddrRemoteGet((NET_CONN_ID        ) conn_id,
+                              (CPU_INT08U        *)&addr_remote[0],
+                              (NET_CONN_ADDR_LEN *)&addr_len,
+                              (NET_ERR           *) p_err);
+        if (*p_err != NET_CONN_ERR_NONE) {
+             return (NET_SOCK_BSD_ERR_TX);
+        }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (addr_len > NET_SOCK_ADDR_LEN_MAX) {                 /* See Note #9a.                                        */
+            NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+           *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+            return (NET_SOCK_BSD_ERR_TX);
+        }
+#endif
+
+        switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+            case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+                 NET_UTIL_VAL_COPY_GET_NET_16(&dest_port,   &addr_remote[NET_SOCK_ADDR_IP_IX_PORT]);
+                 NET_UTIL_VAL_COPY_GET_NET_32(&dest_addrv4, &addr_remote[NET_SOCK_ADDR_IP_V4_IX_ADDR]);
+                 break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+            case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+                 NET_UTIL_VAL_COPY_GET_NET_16(&dest_port,   &addr_remote[NET_SOCK_ADDR_IP_IX_PORT]);
+                 Mem_Copy(&dest_addrv6,
+                          &addr_remote[NET_SOCK_ADDR_IP_V6_IX_ADDR],
+                           NET_IPv6_ADDR_SIZE);
+                 break;
+#endif
+
+            default:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+                 return (NET_SOCK_BSD_ERR_TX);
+        }
+
+
+    } else {                                                    /* Else cfg remote addr (see Note #4).                  */
+
+        switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+            case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+                 p_addr_ipv4 = (NET_SOCK_ADDR_IPv4 *)p_addr_remote;
+                 NET_UTIL_VAL_COPY_GET_NET_16(&dest_port,   &p_addr_ipv4->Port);
+                 NET_UTIL_VAL_COPY_GET_NET_32(&dest_addrv4, &p_addr_ipv4->Addr);
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+                 addr_dest_multicast = NetIPv4_IsAddrMulticast(dest_addrv4);
+#endif
+                 break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+            case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+                 p_addr_ipv6  = (NET_SOCK_ADDR_IPv6 *)p_addr_remote;
+                 NET_UTIL_VAL_COPY_GET_NET_16(&dest_port, &p_addr_ipv6->Port);
+                 dest_addrv6 = p_addr_ipv6->Addr;
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+                 addr_dest_multicast = NetIPv6_IsAddrMcast(&dest_addrv6);
+#endif
+                 break;
+#endif
+
+            default:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+                 return (NET_SOCK_BSD_ERR_TX);
+        }
+
+
+    }
+
+                                                                /* Cfg local/src addr (see Note #5).                    */
+    addr_len = sizeof(addr_local);
+    NetConn_AddrLocalGet((NET_CONN_ID        ) conn_id,
+                         (CPU_INT08U        *)&addr_local[0],
+                         (NET_CONN_ADDR_LEN *)&addr_len,
+                         (NET_ERR           *) p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return (NET_SOCK_BSD_ERR_TX);
+    }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (addr_len > NET_SOCK_ADDR_LEN_MAX) {                     /* See Note #9a.                                        */
+        NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+       *p_err =  NET_SOCK_ERR_INVALID_ADDR_LEN;
+        return (NET_SOCK_BSD_ERR_TX);
+    }
+#endif
+
+    if_nbr = p_sock->IF_Nbr;                            /* Set the IF to the one specified by the socket.       */
+    if (if_nbr == NET_IF_NBR_NONE) {                    /* IF not IF is defined in the socket structure, ...    */
+        if_nbr  = NetIF_GetDflt();                      /* ... get the default IF.                              */
+    }
+
+    switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+             NET_UTIL_VAL_COPY_GET_NET_16(&src_port,   &addr_local[NET_SOCK_ADDR_IP_IX_PORT]);
+             NET_UTIL_VAL_COPY_GET_NET_32(&src_addrv4, &addr_local[NET_SOCK_ADDR_IP_V4_IX_ADDR]);
+
+             if (src_addrv4 == NET_SOCK_ADDR_IP_V4_WILDCARD) {  /* If wildcard addr,                                ... */
+                 src_addr_hostv4 = NetIPv4_GetAddrSrcHandler(dest_addrv4);
+                 if (src_addr_hostv4 != NET_IPv4_ADDR_NONE) {
+                     src_addrv4  = src_addr_hostv4;             /* ... subst cfg'd host addr for remote addr, if avail; */
+
+                 } else {
+                     addr_ip_tbl_qty = sizeof(addr_ip_tblv4) / sizeof(NET_IPv4_ADDR);
+                     NetIPv4_GetAddrHostHandler((NET_IF_NBR        ) if_nbr,
+                                                (NET_IPv4_ADDR    *)&addr_ip_tblv4[0],
+                                                (NET_IP_ADDRS_QTY *)&addr_ip_tbl_qty,
+                                                (NET_ERR          *) p_err);
+                     switch (*p_err) {
+                         case NET_IPv4_ERR_NONE:
+                              src_addrv4 = addr_ip_tblv4[0];    /* ... else subst dflt IF's dflt addr (see Note #5b).   */
+                              break;
+
+
+                         case NET_IPv4_ERR_ADDR_CFG_IN_PROGRESS:
+                                                                /* If addr cfg in progress, ...                         */
+                              addr_initv4 = NetIPv4_IsAddrThisHost(src_addrv4);
+                                                                /* ... allow init src addr.                             */
+                              if (addr_initv4 != DEF_YES) {
+                                  return (NET_SOCK_BSD_ERR_TX);
+                              }
+                              break;
+
+
+                         case NET_IF_ERR_INVALID_IF:
+                         case NET_IPv4_ERR_ADDR_NONE_AVAIL:
+                         default:
+                              return (NET_SOCK_BSD_ERR_TX);
+                     }
+                 }
+             }
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+             NET_UTIL_VAL_COPY_GET_NET_16(&src_port,   &addr_local[NET_SOCK_ADDR_IP_IX_PORT]);
+             Mem_Copy(&src_addrv6,
+                      &addr_local[NET_SOCK_ADDR_IP_V6_IX_ADDR],
+                       NET_IPv6_ADDR_SIZE);
+
+             is_addr_wildcard = Mem_Cmp(&src_addrv6, &NET_SOCK_ADDR_IP_V6_WILDCARD, NET_IPv6_ADDR_SIZE);
+
+             if (is_addr_wildcard) {                            /* If wildcard addr,                                ... */
+
+                 p_ipv6_addrs = NetIPv6_GetAddrSrcHandler(                        &if_nbr,
+                                                          (const  NET_IPv6_ADDR *)&src_addrv6,
+                                                          (const  NET_IPv6_ADDR *)&dest_addrv6,
+                                                                                   DEF_NULL,
+                                                                                   p_err);
+                 if (p_ipv6_addrs == (NET_IPv6_ADDRS *)0) {
+                     return (NET_SOCK_BSD_ERR_TX);              /* No cfgd address to use as src addr.                  */
+                 }
+                                                                /* ... subst cfg'd host addr for remote addr, if avail; */
+                 Mem_Copy(&src_addrv6, &p_ipv6_addrs->AddrHost, NET_IPv6_ADDR_SIZE);
+
+             }
+             break;
+#endif
+
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+             return (NET_SOCK_BSD_ERR_TX);
+    }
+
+
+
+#else                                                           /* See Notes #7 & #9a.                                  */
+   (void)&if_nbr;                                               /* Prevent possible 'variable unused' warning.          */
+    NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+    NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+   *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+    return (NET_SOCK_BSD_ERR_TX);
+#endif
+
+
+                                                                /* ------------------- CFG SOCK TX -------------------- */
+                                                                /* Cfg sock tx flags.                                   */
+    no_block = DEF_BIT_IS_SET((NET_SOCK_FLAGS)flags, NET_SOCK_FLAG_TX_NO_BLOCK);
+    if (no_block == DEF_YES) {                                  /* If 'No Block' flag set,         ...                  */
+        block = DEF_NO;                                         /* ... do NOT block (see Note #3); ...                  */
+    } else {                                                    /* ... else chk sock's no-block flag.                   */
+        block = DEF_BIT_IS_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+    }
+
+
+                                                                /* ------------------- TX SOCK DATA ------------------- */
+    data_len_tot = 0u;
+    err_rtn      = NET_SOCK_ERR_FAULT;
+
+    switch (p_sock->Protocol) {                                  /* Tx app data via transport layer tx.                  */
+#ifdef  NET_IP_MODULE_EN
+        case NET_SOCK_PROTOCOL_UDP:
+                                                                /* Cfg transport tx flags.                              */
+             flags_transport = NET_UDP_FLAG_NONE;
+             if (block == DEF_YES) {
+                 DEF_BIT_SET(flags_transport, NET_UDP_FLAG_TX_BLOCK);
+             }
+
+             switch (p_sock->ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+                 case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+
+                                                                /* Prepare IP params.                                   */
+                    NetConn_IPv4TxParamsGet(conn_id, &flags_ipv4, &TOS, &TTL, &err);
+                    if ( err != NET_CONN_ERR_NONE) {
+                       *p_err  = NET_SOCK_ERR_FAULT;
+                        return (NET_SOCK_BSD_ERR_TX);
+                    }
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+                     if (addr_dest_multicast == DEF_YES) {      /* If      multicast dest addr, ...                     */
+                                                                /* ... get multicast TTL.                               */
+                         TTL = NetConn_IPv4TxTTL_MulticastGet(conn_id, &err);
+                         if ( err != NET_CONN_ERR_NONE) {
+                            *p_err  = NET_SOCK_ERR_FAULT;
+                             return (NET_SOCK_BSD_ERR_TX);
+                         }
+                     }
+#endif
+
+                                                                /* See Note #11b.                                       */
+                      data_len_tot = NetUDP_TxAppDataHandlerIPv4((void            *) p_data,
+                                                                 (CPU_INT16U       ) data_len,
+                                                                 (NET_IPv4_ADDR    ) src_addrv4,
+                                                                 (NET_UDP_PORT_NBR ) src_port,
+                                                                 (NET_IPv4_ADDR    ) dest_addrv4,
+                                                                 (NET_UDP_PORT_NBR ) dest_port,
+                                                                 (NET_IPv4_TOS     ) TOS,
+                                                                 (NET_IPv4_TTL     ) TTL,
+                                                                 (NET_UDP_FLAGS    ) flags_transport,
+                                                                 (NET_IPv4_FLAGS   ) flags_ipv4,
+                                                                 (void            *) 0,
+                                                                 (NET_ERR         *)&err);
+                      break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+                 case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+
+                                                                /* Prepare IP params.                                   */
+                    NetConn_IPv6TxParamsGet(conn_id,
+                                            &traffic_class,
+                                            &flow_label,
+                                            &hop_lim,
+                                            &flags_ipv6,
+                                            &err);
+
+                    if ( err != NET_CONN_ERR_NONE) {
+                       *p_err  = NET_SOCK_ERR_FAULT;
+                        return (NET_SOCK_BSD_ERR_TX);
+                    }
+
+#ifdef  NET_MCAST_TX_MODULE_EN
+                     if (addr_dest_multicast == DEF_YES) {                      /* If      multicast dest addr, ...     */
+                         hop_lim = NetConn_IPv6TxHopLimMcastGet(conn_id, &err); /* ... get multicast TTL.               */
+                         if ( err != NET_CONN_ERR_NONE) {
+                            *p_err  = NET_SOCK_ERR_FAULT;
+                             return (NET_SOCK_BSD_ERR_TX);
+                         }
+                     }
+#endif
+
+                                                                /* See Note #11b.                                       */
+                      data_len_tot = NetUDP_TxAppDataHandlerIPv6((void                 *) p_data,
+                                                                 (CPU_INT16U            ) data_len,
+                                                                 (NET_IPv6_ADDR        *)&src_addrv6,
+                                                                 (NET_UDP_PORT_NBR      ) src_port,
+                                                                 (NET_IPv6_ADDR        *)&dest_addrv6,
+                                                                 (NET_UDP_PORT_NBR      ) dest_port,
+                                                                 (NET_IPv6_TRAFFIC_CLASS) traffic_class,
+                                                                 (NET_IPv6_FLOW_LABEL   ) flow_label,
+                                                                 (NET_IPv6_HOP_LIM      ) hop_lim,
+                                                                 (NET_UDP_FLAGS         ) flags_transport,
+                                                                 (NET_ERR              *)&err);
+                      break;
+#endif
+
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+                     *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+                      return (NET_SOCK_BSD_ERR_TX);
+             }
+
+             switch (err) {
+                 case NET_UDP_ERR_NONE:
+                      err_rtn = NET_SOCK_ERR_NONE;
+                      break;
+
+
+                 case NET_UDP_ERR_INVALID_DATA_SIZE:
+                      err_rtn = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                      break;
+
+
+                 case NET_ERR_IF_LINK_DOWN:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                      err_rtn = NET_ERR_IF_LINK_DOWN;
+                      break;
+
+
+                 case NET_ERR_FAULT_NULL_PTR:
+                 case NET_ERR_INVALID_PROTOCOL:
+                 case NET_ERR_INVALID_TRANSACTION:
+                 case NET_IF_ERR_INVALID_IF:
+                 case NET_UDP_ERR_INVALID_LEN_DATA:
+                 case NET_UDP_ERR_INVALID_PORT_NBR:
+                 case NET_UDP_ERR_INVALID_FLAG:
+                 case NET_BUF_ERR_NONE_AVAIL:
+                 case NET_BUF_ERR_INVALID_SIZE:
+                 case NET_BUF_ERR_INVALID_LEN:
+                 case NET_BUF_ERR_INVALID_IX:
+                 case NET_UTIL_ERR_NULL_SIZE:
+                 case NET_UTIL_ERR_INVALID_PROTOCOL:
+                 case NET_ERR_TX:
+                 default:
+                      err_rtn = NET_ERR_TX;
+                      break;
+             }
+             break;
+#endif
+
+
+        case NET_SOCK_PROTOCOL_NONE:
+        default:                                                /* See Notes #8 & #9a.                                  */
+            (void)&err;                                         /* Prevent possible 'variable unused' warning.          */
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+             return (NET_SOCK_BSD_ERR_TX);
+    }
+
+
+    switch (err_rtn) {                                          /* Demux transport-to-sock layer err.                   */
+        case NET_SOCK_ERR_NONE:
+             break;
+
+
+        case NET_SOCK_ERR_INVALID_DATA_SIZE:
+        case NET_SOCK_ERR_FAULT:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_TX:
+        default:
+            *p_err =  err_rtn;
+             return (NET_SOCK_BSD_ERR_TX);
+    }
+
+
+
+                                                                /* -------------- RTN TX'D SOCK DATA LEN -------------- */
+    if (data_len_tot <= NET_SOCK_DATA_SIZE_MIN) {               /* If tx'd data len < 1, ...                            */
+       *p_err =  NET_SOCK_ERR_INVALID_DATA_SIZE;                /* ... rtn invalid tx data size err (see Note #6b1).    */
+        return (NET_SOCK_BSD_ERR_TX);
+    }
+
+
+   *p_err =   err_rtn;
+
+    return ((NET_SOCK_RTN_CODE)data_len_tot);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_TxDataHandlerStream()
+*
+* Description : (1) Transmit data through a stream-type socket :
+*
+*                   (a) Validate  socket connection state                                   See Note #8
+*                   (b) Configure socket transmit :
+*                       (1) Get       socket's transport connection identification handler
+*                       (2) Configure socket flags
+*                   (c) Transmit  socket data via appropriate transport layer
+*                   (d) Return    socket data transmitted length
+*
+*
+* Argument(s) : sock_id         Socket descriptor/handle identifier of socket to receive data.
+*               -------         Argument checked   in NetSock_TxDataHandler().
+*
+*               p_sock          Pointer to a socket.
+*               ------          Argument validated in NetSock_TxDataHandler().
+*
+*               p_data          Pointer to application data.
+*               ------          Argument checked   in NetSock_TxDataHandler().
+*
+*               data_len        Length of  application data (in octets) [see Note #3].
+*               --------        Argument checked   in NetSock_TxDataHandler().
+*
+*               flags           Flags to select transmit options; bit-field flags logically OR'd :
+*               -----
+*                                   NET_SOCK_FLAG_NONE              No socket flags selected.
+*                                   NET_SOCK_FLAG_TX_NO_BLOCK       Transmit socket data without blocking
+*                                                                       (see Note #4).
+*
+*                               Argument checked   in NetSock_TxDataHandler().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket data successfully transmitted.
+*                               NET_SOCK_ERR_NOT_USED               Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED                 Socket already closed.
+*                               NET_SOCK_ERR_FAULT                  Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_CONN_FAIL              Socket connection operation(s) failed.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL       Invalid socket protocol.
+*                               NET_SOCK_ERR_INVALID_STATE          Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP             Invalid socket operation.
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE      Invalid data size (see Note #3b).
+*                               NET_SOCK_ERR_TX_Q_CLOSED            Socket transmit queue closed.
+*                               NET_ERR_IF_LINK_DOWN              Socket connection's interface link down.
+*
+*                               NET_ERR_TX                          Transitory transmit error.
+*
+*                                                                   - RETURNED BY NetConn_ID_TransportGet() : -
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+* Return(s)   : Number of positive data octets transmitted, if NO error(s)              [see Note #5a1].
+*
+*               NET_SOCK_BSD_RTN_CODE_CONN_CLOSED,          if socket connection closed (see Note #5b).
+*
+*               NET_SOCK_BSD_ERR_TX,                        otherwise                   (see Note #5a2A).
+*
+* Caller(s)   : NetSock_TxDataHandler(),
+*               Secure transmit functions.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) but MAY be called by appropriate secure transmit function(s).
+*
+* Note(s)     : (2) Stream-type sockets may transmit from the following states :
+*
+*                   (a) Unconnected states :
+*
+*                           (A) Unconnected state(s) transmit NOT yet implemented;
+*                               see also 'net_tcp.c  NetTCP_TxConnAppData()  Note #2bA' #### NET-800
+*
+*                       (1) CLOSED
+*                           (A) Bind to local port
+*                           (B) Connect to remote host
+*                           (C) (1) Transmit data with connection request(s)?
+*                                     OR
+*                               (2) Queue transmit data until connected to remote host?
+*
+*                       (2) BOUND
+*                           (A) Connect to remote host
+*                           (B) (1) Transmit data with connection request(s)?
+*                                     OR
+*                               (2) Queue transmit data until connected to remote host?
+*
+*                       (3) LISTEN
+*                           (A) Connect to remote host
+*                           (B) (1) Transmit data with connection request(s)?
+*                                     OR
+*                               (2) Queue transmit data until connected to remote host?
+*
+*                       (4) CONNECTION-IN-PROGRESS
+*                           (A) Queue transmit data until connected to remote host?
+*
+*                   (b) Connected states :
+*
+*                       (1) CONNECTED
+*
+*               (3) (a) (1) (A) Stream-type sockets transmit & receive all data octets in one or more
+*                               non-distinct packets.  In other words, the application data is NOT
+*                               bounded by any specific packet(s); rather, it is contiguous & sequenced
+*                               from one packet to the next.
+*
+*                           (B) Thus if the socket's type is stream & the socket's transmit data queue(s)
+*                               are NOT large enough for the transmitted data, the  transmit data queue(s)
+*                               are maximally filled with transmit data & the remaining data octets are
+*                               discarded but may be re-transmitted by later application-socket transmits.
+*
+*                           (C) Therefore, NO stream-type socket transmit data length should be "too long
+*                               to pass through the underlying protocol" & cause the socket transmit to
+*                               "fail ... [with] no data ... transmitted" (IEEE Std 1003.1, 2004 Edition,
+*                               Section 'send() : DESCRIPTION').
+*
+*                       (2) Thus it is typical -- but NOT absolutely required -- that a single application
+*                           task ONLY transmit or request to transmit data to a stream-type socket.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*
+*                   See also 'NetSock_TxDataHandler()  Note #2'.
+*
+*               (4) If 'flags' argument set to 'NET_SOCK_FLAG_TX_NO_BLOCK'; socket transmit does NOT configure
+*                   the transport layer transmit to block, regardless if the socket is configured to block.
+*
+*               (5) (a) IEEE Std 1003.1, 2004 Edition, Section 'send() : RETURN VALUE' states that :
+*
+*                       (1) "Upon successful completion, send() shall return the number of bytes sent."
+*
+*                           (A) Section 'send() : DESCRIPTION' elaborates that "successful completion
+*                               of a call to sendto() does not guarantee delivery of the message".
+*
+*                           (B) (1) Thus applications SHOULD verify the actual returned number of data
+*                                   octets transmitted &/or prepared for transmission.
+*
+*                               (2) In addition, applications MAY desire verification of receipt &/or
+*                                   acknowledgement of transmitted data to the remote host -- either
+*                                   inherently by the transport layer or explicitly by the application.
+*
+*                       (2) (A) "Otherwise, -1 shall be returned" ...
+*                               (1) Section 'send() : DESCRIPTION' elaborates that "a return value of
+*                                   -1 indicates only locally-detected errors".
+*
+*                           (B) "and 'errno' set to indicate the error."
+*                               'errno' NOT currently supported (see 'net_bsd.h  Note #1b').
+*
+*                   (b) Although NO socket send() specification states to return '0' when the socket's
+*                       connection is closed, it seems reasonable to return '0' since it is possible for the
+*                       socket connection to be close()'d or shutdown() by the remote host.
+*
+*                       (1) Since the socket transmit return value of '0' is reserved for socket connection
+*                           closes; NO socket transmit -- fault or non-fault -- should ever return '0' octets
+*                           transmitted.
+*
+*                   See also 'NetSock_TxDataHandler()  Note #5'.
+*
+*               (6) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'Protocol' is incorrectly modified.
+*
+*               (7) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) NetSock_TxDataHandlerStream() assumes that internal socket configuration
+*                       has been previously validated by caller function(s).  Therefore, on any
+*                       internal socket configuration error(s), the socket MUST be closed.
+*
+*                   (b) NetSock_TxDataHandlerStream() assumes that any internal socket connection
+*                       error(s) on stream-type sockets may NOT be critical &/or may be transitory;
+*                       thus NO network or socket resource(s) are closed/freed.
+*
+*                   (c) Since transport layer error(s) may NOT be critical &/or may be transitory, NO
+*                       network or socket resource(s) are closed/freed.
+*
+*               (8) Socket descriptor write availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor write handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also  Note #1a,
+*                            'NetSock_SelDescHandlerWrStream()   Note #3',
+*                          & 'NetSock_SelDescHandlerErrStream()  Note #3'.
+*
+*               (9) 'sock_id' may NOT be necessary but is included for consistency.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+NET_SOCK_RTN_CODE  NetSock_TxDataHandlerStream (NET_SOCK_ID          sock_id,
+                                                NET_SOCK            *p_sock,
+                                                void                *p_data,
+                                                CPU_INT16U           data_len,
+                                                NET_SOCK_API_FLAGS   flags,
+                                                NET_ERR             *p_err)
+{
+    CPU_BOOLEAN  no_block;
+    CPU_BOOLEAN  block;
+    NET_CONN_ID  conn_id;
+    NET_CONN_ID  conn_id_transport;
+    NET_FLAGS    flags_transport;
+    CPU_INT16U   data_len_tot;
+    NET_ERR      err;
+    NET_ERR      err_rtn;
+
+
+   (void)&sock_id;                                              /* Prevent 'variable unused' warning (see Note #9).     */
+
+                                                                /* ------------- VALIDATE SOCK CONN STATE ------------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+            *p_err =  NET_SOCK_ERR_NOT_USED;
+             return (NET_SOCK_BSD_ERR_TX);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;
+             return (NET_SOCK_BSD_ERR_TX);
+
+
+        case NET_SOCK_STATE_CLOSED:                             /* Bind to local port & ...                             */
+        case NET_SOCK_STATE_BOUND:                              /* ...  tx conn req to remote host; Q tx data?          */
+        case NET_SOCK_STATE_LISTEN:                             /* Q/tx data with  conn req?                            */
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:                   /* Q tx data until conn complete?                       */
+                                                                /* NOT yet implemented (see Note #2aA).                 */
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidOpCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_OP;
+             return (NET_SOCK_BSD_ERR_TX);
+
+
+        case NET_SOCK_STATE_CONN_DONE:
+             p_sock->State = NET_SOCK_STATE_CONN;
+             break;
+
+
+        case NET_SOCK_STATE_CONN:
+             break;
+
+
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:                  /* If sock already closing, ...                         */
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+            *p_err =  NET_SOCK_ERR_TX_Q_CLOSED;                 /* ... rtn closed code (see Note #5b).                  */
+             return (NET_SOCK_BSD_RTN_CODE_CONN_CLOSED);
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidStateCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;
+             return (NET_SOCK_BSD_ERR_TX);
+    }
+
+
+                                                                /* ------------------- CFG SOCK TX -------------------- */
+                                                                /* Get transport conn id.                               */
+    conn_id           = p_sock->ID_Conn;
+    conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {                          /* See Note #7a.                                        */
+         NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+         return (NET_SOCK_BSD_ERR_TX);
+    }
+    if  (conn_id_transport == NET_CONN_ID_NONE) {               /* See Note #7a.                                        */
+         NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+        *p_err =  NET_SOCK_ERR_CONN_FAIL;
+         return (NET_SOCK_BSD_ERR_TX);
+    }
+
+
+                                                                /* Cfg sock tx flags.                                   */
+    no_block = DEF_BIT_IS_SET((NET_SOCK_FLAGS)flags, NET_SOCK_FLAG_TX_NO_BLOCK);
+    if (no_block == DEF_YES) {                                  /* If 'No Block' flag set,         ...                  */
+        block = DEF_NO;                                         /* ... do NOT block (see Note #4); ...                  */
+    } else {                                                    /* ... else chk sock's no-block flag.                   */
+        block = DEF_BIT_IS_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_NO_BLOCK);
+    }
+
+
+
+                                                                /* ------------------- TX SOCK DATA ------------------- */
+    data_len_tot = 0u;
+    err_rtn      = NET_SOCK_ERR_FAULT;
+
+    switch (p_sock->Protocol) {                                 /* Tx app data via transport layer tx.                  */
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+        case NET_SOCK_PROTOCOL_TCP:
+                                                                /* Cfg transport tx flags.                              */
+             flags_transport = NET_TCP_FLAG_NONE;
+             if (block == DEF_YES) {
+                 DEF_BIT_SET(flags_transport, NET_TCP_FLAG_TX_BLOCK);
+             }
+
+             data_len_tot = NetTCP_TxConnAppData((NET_TCP_CONN_ID) conn_id_transport,
+                                                 (void          *) p_data,
+                                                 (CPU_INT16U     ) data_len,
+                                                 (NET_TCP_FLAGS  ) flags_transport,
+                                                 (NET_ERR       *)&err);
+             switch (err) {
+                 case NET_TCP_ERR_NONE:
+                      err_rtn = NET_SOCK_ERR_NONE;
+                      break;
+
+
+                 case NET_TCP_ERR_INVALID_DATA_SIZE:
+                      err_rtn = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_CLOSE:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_INVALID_CONN:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_TX_Q_SIGNAL_ABORT:
+                 case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_CONN_ERR_INVALID_FAMILY:
+                 case NET_CONN_ERR_INVALID_ADDR:
+                 case NET_CONN_ERR_INVALID_ADDR_LEN:
+                      err_rtn = NET_SOCK_ERR_FAULT;
+                      break;
+
+
+                 case NET_ERR_IF_LINK_DOWN:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                      err_rtn = NET_ERR_IF_LINK_DOWN;
+                      break;
+
+
+                 case NET_INIT_ERR_NOT_COMPLETED:
+                 case NET_ERR_FAULT_NULL_PTR:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 case NET_TCP_ERR_CONN_ACK_NONE:
+                 case NET_TCP_ERR_CONN_ACK_DLYD:
+                 case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_TCP_ERR_TX_Q_FULL:
+                 case NET_TCP_ERR_TX_Q_SUSPEND:
+                 case NET_ERR_FAULT_LOCK_ACQUIRE:
+                 case NET_ERR_TX:
+                 default:
+                      err_rtn = NET_ERR_TX;
+                      break;
+             }
+             break;
+#endif
+#endif
+
+        case NET_SOCK_PROTOCOL_NONE:
+        default:                                                /* See Notes #6 & #7a.                                  */
+            (void)&conn_id_transport;                           /* Prevent possible 'variable unused' warnings.         */
+            (void)&flags_transport;
+            (void)&err;
+             NetSock_CloseSock(p_sock, DEF_YES, DEF_YES);
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+            *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;
+             return (NET_SOCK_BSD_ERR_TX);
+    }
+
+
+    switch (err_rtn) {                                          /* Demux transport-to-sock layer err.                   */
+        case NET_SOCK_ERR_NONE:
+             break;
+
+
+        case NET_SOCK_ERR_INVALID_DATA_SIZE:
+        case NET_SOCK_ERR_FAULT:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_TX:
+        default:
+            *p_err =  err_rtn;
+             return (NET_SOCK_BSD_ERR_TX);
+    }
+
+
+#if 0
+                                                                /* -------------- RTN TX'D SOCK DATA LEN -------------- */
+    if (data_len_tot < 1) {                                     /* If tx'd data len < 1, ...                            */
+       *p_err =  NET_SOCK_ERR_INVALID_DATA_SIZE;                /* ... rtn invalid tx data size err (see Note #5b1).    */
+        return (NET_SOCK_BSD_ERR_TX);
+    }
+#endif
+
+
+   *p_err =   err_rtn;
+
+    return ((NET_SOCK_RTN_CODE)data_len_tot);
+}
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_SelDescHandler()
+*
+* Description : Handle socket descriptor for operation(s) :
+*
+* Argument(s) : sock_nbr_max        Maximum number of socket descriptors/handle identifiers in the socket.
+*
+*               p_sock_desc_rd      Pointer to a set of socket descriptors/handle identifiers to :
+*               ---------------     Argument validate by caller(s)
+*
+*               p_sock_desc_wr      Pointer to a set of socket descriptors/handle identifiers to :
+*               ---------------     Argument validate by caller(s)
+*
+*               p_sock_desc_err     Pointer to a set of socket descriptors/handle identifiers to :
+*               ---------------     Argument validate by caller(s)
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetSock_SelDescHandlerRdDatagram() : -
+*                                                               -- RETURNED BY NetSock_SelDescHandlerRdStream() : --
+*                               NET_SOCK_ERR_NONE               Socket successfully checked for read operation(s);
+*                                                                   check return value for read operation(s)
+*                                                                   availability.
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_FAULT              Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+*                                                               ---------- RETURNED BY NetSock_IsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+* Return(s)   : Number of socket descriptors with available resources &/or operations, if any.
+*
+*               NET_SOCK_BSD_RTN_CODE_TIMEOUT,                                         on timeout.
+*
+*               NET_SOCK_BSD_ERR_SEL,                                                  otherwise.
+*
+* Caller(s)   : NetSock_Sel().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  NET_SOCK_QTY  NetSock_SelDescHandler (NET_SOCK_QTY    sock_nbr_max,
+                                              NET_SOCK_DESC  *p_sock_desc_rd,
+                                              NET_SOCK_DESC  *p_sock_desc_wr,
+                                              NET_SOCK_DESC  *p_sock_desc_err,
+                                              NET_ERR        *p_err)
+{
+    NET_SOCK_ID    sock_id;
+    NET_SOCK_DESC  sock_desc_rtn_rd;
+    NET_SOCK_DESC  sock_desc_rtn_wr;
+    NET_SOCK_DESC  sock_desc_rtn_err;
+    NET_SOCK_QTY   sock_nbr_rdy;
+    CPU_BOOLEAN    sock_desc_used;
+    CPU_BOOLEAN    sock_rdy;
+
+
+    sock_nbr_rdy = 0;
+
+
+    if (p_sock_desc_rd != (NET_SOCK_DESC *)0) {              /* If avail, chk rd sock desc's (see Note #3b2A1).      */
+                                                             /* Copy    req'd rd sock desc's (see Note #3c2A1).      */
+        NET_SOCK_DESC_COPY(&sock_desc_rtn_rd, p_sock_desc_rd);
+                                                             /* Chk ALL avail rd sock desc's (see Note #3b1).        */
+        for (sock_id = 0; sock_id < sock_nbr_max; sock_id++) {
+             sock_desc_used = NET_SOCK_DESC_IS_SET(sock_id, p_sock_desc_rd);
+             if (sock_desc_used != 0) {                      /* If rd sock desc req'd, ...                           */
+                                                             /* ... chk/cfg for rdy rd op(s) [see Note #3b2A1].      */
+                 sock_rdy = NetSock_SelDescHandlerRd(sock_id, p_err);
+                 switch (*p_err) {
+                     case NET_SOCK_ERR_NONE:
+                     case NET_SOCK_ERR_CLOSED:
+                     case NET_SOCK_ERR_FAULT:
+                     case NET_SOCK_ERR_CONN_FAIL:
+                     case NET_SOCK_ERR_INVALID_STATE:
+                     case NET_SOCK_ERR_INVALID_OP:
+                          if (sock_rdy != DEF_YES) {         /* If sock NOT rdy, ...                                 */
+                                                             /* ... clr from rtn rd sock desc's (see #3b2B1b2B).     */
+                              NET_SOCK_DESC_CLR(sock_id, &sock_desc_rtn_rd);
+                          } else {                           /* Else inc nbr rdy    sock desc's (see #3b2B1a2).      */
+                              sock_nbr_rdy++;
+                          }
+                          break;
+
+
+                     case NET_INIT_ERR_NOT_COMPLETED:
+                     case NET_SOCK_ERR_INVALID_TYPE:         /* See Notes #3a2A1 & #3d1.                             */
+                     case NET_SOCK_ERR_INVALID_SOCK:
+                     case NET_SOCK_ERR_NOT_USED:
+                     default:
+                          goto exit_err;
+                 }
+             }
+        }
+
+    } else {                                                 /* Else if NO  rd sock desc's avail, ...                */
+        NET_SOCK_DESC_INIT(&sock_desc_rtn_rd);               /* ... clr rtn rd sock desc's.                          */
+    }
+
+
+    if (p_sock_desc_wr != (NET_SOCK_DESC *)0) {              /* If avail, chk wr sock desc's (see Note #3b2A2).      */
+                                                             /* Copy    req'd wr sock desc's (see Note #3c2A1).      */
+        NET_SOCK_DESC_COPY(&sock_desc_rtn_wr, p_sock_desc_wr);
+                                                             /* Chk ALL avail wr sock desc's (see Note #3b1).        */
+        for (sock_id = 0; sock_id < sock_nbr_max; sock_id++) {
+             sock_desc_used = NET_SOCK_DESC_IS_SET(sock_id, p_sock_desc_wr);
+             if (sock_desc_used != 0) {                      /* If wr sock desc req'd, ...                           */
+                                                             /* ... chk/cfg for rdy wr op(s) [see Note #3b2A2].      */
+                 sock_rdy = NetSock_SelDescHandlerWr(sock_id, p_err);
+                 switch (*p_err) {
+                     case NET_SOCK_ERR_NONE:
+                     case NET_SOCK_ERR_CLOSED:
+                     case NET_SOCK_ERR_FAULT:
+                     case NET_SOCK_ERR_CONN_FAIL:
+                     case NET_SOCK_ERR_INVALID_STATE:
+                     case NET_SOCK_ERR_INVALID_OP:
+                          if (sock_rdy != DEF_YES) {         /* If sock NOT rdy, ...                                 */
+                                                             /* ... clr from rtn wr sock desc's (see #3b2B1b2B).     */
+                              NET_SOCK_DESC_CLR(sock_id, &sock_desc_rtn_wr);
+                          } else {                           /* Else inc nbr rdy    sock desc's (see #3b2B1a2).      */
+                              sock_nbr_rdy++;
+                          }
+                          break;
+
+
+                     case NET_INIT_ERR_NOT_COMPLETED:
+                     case NET_SOCK_ERR_INVALID_TYPE:         /* See Notes #3a2A1 & #3d1.                             */
+                     case NET_SOCK_ERR_INVALID_SOCK:
+                     case NET_SOCK_ERR_NOT_USED:
+                     default:
+                          goto exit_err;
+                 }
+             }
+        }
+
+    } else {                                                 /* Else if NO  wr sock desc's avail, ...                */
+        NET_SOCK_DESC_INIT(&sock_desc_rtn_wr);               /* ... clr rtn wr sock desc's.                          */
+    }
+
+
+    if (p_sock_desc_err != (NET_SOCK_DESC *)0) {             /* If avail, chk err sock desc's (see Note #3b2A3).     */
+                                                             /* Copy    req'd err sock desc's (see Note #3c2A1).     */
+        NET_SOCK_DESC_COPY(&sock_desc_rtn_err, p_sock_desc_err);
+                                                             /* Chk ALL avail err sock desc's (see Note #3b1).       */
+        for (sock_id = 0; sock_id < sock_nbr_max; sock_id++) {
+             sock_desc_used = NET_SOCK_DESC_IS_SET(sock_id, p_sock_desc_err);
+             if (sock_desc_used != 0) {                      /* If err sock desc req'd, ...                          */
+                                                             /* ... chk/cfg for avail err(s)  [see Note #3b2A3].     */
+                 sock_rdy = NetSock_SelDescHandlerErr(sock_id, p_err);
+                 switch (*p_err) {
+                     case NET_SOCK_ERR_NONE:
+                     case NET_SOCK_ERR_CLOSED:
+                     case NET_SOCK_ERR_FAULT:
+                     case NET_SOCK_ERR_CONN_FAIL:
+                     case NET_SOCK_ERR_INVALID_STATE:
+                     case NET_SOCK_ERR_INVALID_OP:
+                          if (sock_rdy != DEF_YES) {         /* If sock NOT rdy, ...                                 */
+                                                             /* ... clr from rtn wr sock desc's (see #3b2B1b2B).     */
+                              NET_SOCK_DESC_CLR(sock_id, &sock_desc_rtn_err);
+                          } else {                           /* Else inc nbr rdy    sock desc's (see #3b2B1a2).      */
+                              sock_nbr_rdy++;
+                          }
+                          break;
+
+
+                     case NET_INIT_ERR_NOT_COMPLETED:
+                     case NET_SOCK_ERR_INVALID_TYPE:         /* See Notes #3a2A1 & #3d1.                             */
+                     case NET_SOCK_ERR_INVALID_SOCK:
+                     case NET_SOCK_ERR_NOT_USED:
+                     default:
+                          goto exit_err;
+                 }
+             }
+        }
+
+    } else {                                                 /* Else if NO  err sock desc's avail, ...               */
+        NET_SOCK_DESC_INIT(&sock_desc_rtn_err);              /* ... clr rtn err sock desc's.                         */
+    }
+
+    NET_SOCK_DESC_COPY(p_sock_desc_rd,  &sock_desc_rtn_rd);
+    NET_SOCK_DESC_COPY(p_sock_desc_wr,  &sock_desc_rtn_wr);
+    NET_SOCK_DESC_COPY(p_sock_desc_err, &sock_desc_rtn_err);
+
+    return (sock_nbr_rdy);
+
+
+exit_err:
+    return (0u);
+
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                     NetSock_SelDescHandlerRd()
+*
+* Description : (1) Handle socket descriptor for read operation(s) :
+*
+*                   (a) Check socket for available read operation(s) :
+*                       (1) Read data                                                   See Note #2b1
+*                       (2) Read connection closed                                      See Note #2b2
+*                       (3) Read connection(s) available                                See Note #2b3
+*                       (4) Socket error(s)                                             See Note #2b4
+*
+*                   (b) Configure socket event table to wait on appropriate read
+*                           operation(s), if necessary
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to check for available read operation(s).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetSock_SelDescHandlerRdDatagram() : -
+*                                                               -- RETURNED BY NetSock_SelDescHandlerRdStream() : --
+*                               NET_SOCK_ERR_NONE               Socket successfully checked for read operation(s);
+*                                                                   check return value for read operation(s)
+*                                                                   availability.
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_FAULT              Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+*                                                               ---------- RETURNED BY NetSock_IsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+* Return(s)   : DEF_YES, if socket has any available read operation(s) [see Notes #2b1 & #2b3]; OR ...
+*
+*                        if socket's read connection is closed         [see Note  #2b2];        OR ...
+*
+*                        if socket has any available socket error(s)   [see Note  #2b4].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_Sel().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the 'readfds' ... parameter
+*                   ... to see whether ... [any] descriptors are ready for reading" :
+*
+*                   (a) "A descriptor shall be considered ready for reading when a call to an input function
+*                        ... would not block, whether or not the function would transfer data successfully.
+*                        (The function might return data, an end-of-file indication, or an error other than
+*                        one indicating that it is blocked, and in each of these cases the descriptor shall
+*                        be considered ready for reading.)" :
+*
+*                       (1) "If the socket is currently listening, then it shall be marked as readable if
+*                            an incoming connection request has been received, and a call to the accept()
+*                            function shall complete without blocking."
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Pages 164-165 states that "a socket is ready for reading if any of the
+*                       following ... conditions is true" :
+*
+*                       (1) "A read operation on the socket will not block and will return a value greater
+*                            than 0 (i.e., the data that is ready to be read)."
+*
+*                       (2) "The read half of the connection is closed (i.e., a TCP connection that has
+*                            received a FIN).  A read operation ... will not block and will return 0 (i.e.,
+*                            EOF)."
+*
+*                       (3) "The socket is a listening socket and the number of completed connections is
+*                            nonzero.  An accept() on the listening socket will ... not block."
+*
+*                       (4) "A socket error is pending.  A read operation on the socket will not block and
+*                            will return an error (-1) with 'errno' set to the specific error condition."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A1'.
+*
+*               (3) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'SockType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  NetSock_SelDescHandlerRd (NET_SOCK_ID   sock_id,
+                                               NET_ERR      *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_BOOLEAN   sock_used;
+#endif
+    CPU_BOOLEAN   sock_rdy;
+    NET_SOCK     *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* -------------- VALIDATE SOCK USED -------------- */
+    sock_used = NetSock_IsUsed(sock_id, p_err);
+    if (sock_used != DEF_YES) {
+        return (DEF_YES);                                           /* Rtn sock err (see Note #2b4).                    */
+    }
+#endif
+
+                                                                    /* ------------- HANDLE SOCK DESC RD -------------- */
+    p_sock = &NetSock_Tbl[sock_id];
+
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_DATAGRAM:
+             sock_rdy = NetSock_SelDescHandlerRdDatagram(p_sock, p_err);
+             break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+             sock_rdy = NetSock_SelDescHandlerRdStream(p_sock, p_err);
+             break;
+#endif
+
+
+        case NET_SOCK_TYPE_FAULT:
+            *p_err =  NET_SOCK_ERR_FAULT;                            /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_TYPE_NONE:
+        default:                                                    /* See Note #3.                                     */
+            *p_err =  NET_SOCK_ERR_INVALID_TYPE;                     /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+    }
+
+
+    return (sock_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_SelDescHandlerRdDatagram()
+*
+* Description : (1) Handle datagram-type socket descriptor for read operation(s) :
+*
+*                   (a) Check datagram-type socket for available read operation(s) :
+*                       (1) Read data                                                   See Note #2b1
+*                       (2) Socket error(s)                                             See Note #2b4
+*
+*                   (b) Configure socket event table to wait on appropriate read
+*                           operation(s) :
+*
+*                       (1) Socket receive data
+*
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of datagram-type socket to
+*               -------         check for available read operation(s).
+*
+*                               Argument checked   in NetSock_SelDescHandlerRd().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Datagram-type socket successfully checked for
+*                                                                   read operation(s); check return value for
+*                                                                   read operation(s) availability.
+*
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+*                                                               - RETURNED BY NetSock_IsAvailRxDatagram() : -
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type; i.e. NOT datagram-type.
+*
+* Return(s)   : DEF_YES, if datagram-type socket has any available read operation(s) [see Note #2b1]; OR ...
+*
+*                        if datagram-type socket has any available socket error(s)   [see Note #2b4].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerRd().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the 'readfds' ... parameter
+*                   ... to see whether ... [any] descriptors are ready for reading" :
+*
+*                   (a) "A descriptor shall be considered ready for reading when a call to an input function
+*                        ... would not block, whether or not the function would transfer data successfully.
+*                        (The function might return data, an end-of-file indication, or an error other than
+*                        one indicating that it is blocked, and in each of these cases the descriptor shall
+*                        be considered ready for reading.)"
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Pages 164-165 states that "a socket is ready for reading if any of the
+*                       following ... conditions is true" :
+*
+*                       (1) "A read operation on the socket will not block and will return a value greater
+*                            than 0 (i.e., the data that is ready to be read)."
+*
+*                       (4) "A socket error is pending.  A read operation on the socket will not block and
+*                            will return an error (-1) with 'errno' set to the specific error condition."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A1'.
+*
+*               (3) Socket descriptor read availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor read handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also 'NetSock_RxDataHandlerDatagram()  Note #13'.
+*********************************************************************************************************
+*/
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  NetSock_SelDescHandlerRdDatagram (NET_SOCK     *p_sock,
+                                                       NET_ERR      *p_err)
+{
+    CPU_BOOLEAN  sock_rdy;
+    NET_ERR      err;
+
+
+                                                                /* ----------- HANDLE DATAGRAM SOCK DESC RD ----------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+            *p_err =  NET_SOCK_ERR_NOT_USED;                    /* Rtn sock err (see Note #2b4).                        */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;                      /* Rtn sock err (see Note #2b4).                        */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED:
+            *p_err =  NET_SOCK_ERR_INVALID_OP;                  /* Rtn sock err (see Note #2b4).                        */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_BOUND:                              /* Chk non-conn'd datagram socks ...                    */
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN:                               /* ... &   conn'd datagram socks ...                    */
+        case NET_SOCK_STATE_CONN_DONE:
+                                                                /* ... for rx data avail (see Note #2b1).               */
+             sock_rdy = NetSock_IsAvailRxDatagram(p_sock, &err);
+             switch (err) {
+                 case NET_SOCK_ERR_NONE:
+                      break;
+
+
+                 case NET_SOCK_ERR_INVALID_TYPE:
+                     *p_err =  err;                             /* Rtn sock err (see Note #2b4).                        */
+                      return (DEF_YES);
+
+
+                 default:
+                     *p_err =  NET_SOCK_ERR_CONN_FAIL;          /* Rtn sock err (see Note #2b4).                        */
+                      return (DEF_YES);
+             }
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        case NET_SOCK_STATE_LISTEN:                             /* Listen  datagram socks NOT allowed.                  */
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:                  /* Closing datagram socks NOT allowed.                  */
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        default:
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;               /* Rtn sock err (see Note #2b4).                        */
+             return (DEF_YES);
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+    return (sock_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_SelDescHandlerRdStream()
+*
+* Description : (1) Handle stream-type socket descriptor for read operation(s) :
+*
+*                   (a) Check stream-type socket for available read operation(s) :
+*                       (1) Read data                                                   See Note #2b1
+*                       (2) Read connection closed                                      See Note #2b2
+*                       (3) Read connection(s) available                                See Note #2b3
+*                       (4) Socket error(s)                                             See Note #2b4
+*
+*                   (b) Configure socket event table to wait on appropriate read
+*                           operation(s) :
+*
+*                       (1) Socket connection's transport layer receive operation(s)
+*                       (2) Socket accept connection(s) available
+*
+*
+* Argument(s) : sock_id                 Socket descriptor/handle identifier of stream-type socket to
+*               -------                     check for available read operation(s).
+*
+*                                       Argument checked   in NetSock_SelDescHandlerRd().
+*
+*               p_sock                  Pointer to a socket.
+*               ------                  Argument validated in NetSock_SelDescHandlerRd().
+*
+*               p_sock_event_tbl        Pointer to a socket event table to configure socket events
+*               ----------------            to wait on.
+*
+*                                       Argument validated in NetSock_Sel().
+*
+*               p_sock_event_nbr_cfgd   Pointer to the number of configured socket events.
+*               ---------------------   Argument validated in NetSock_Sel().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Stream-type socket successfully checked for
+*                                                                   read operation(s); check return value for
+*                                                                   read operation(s) availability.
+*
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+*                                                               -- RETURNED BY NetSock_IsAvailRxStream() : --
+*                                                               - RETURNED BY NetSock_ConnAcceptQ_IsRdy() : -
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type; i.e. NOT stream-type.
+*
+* Return(s)   : DEF_YES, if stream-type socket has any available read operation(s) [see Notes #2b1 & #2b3]; OR ...
+*
+*                        if stream-type socket's read connection is closed         [see Note  #2b2];        OR ...
+*
+*                        if stream-type socket has any available socket error(s)   [see Note  #2b4].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerRd().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the 'readfds' ... parameter
+*                   ... to see whether ... [any] descriptors are ready for reading" :
+*
+*                   (a) "A descriptor shall be considered ready for reading when a call to an input function
+*                        ... would not block, whether or not the function would transfer data successfully.
+*                        (The function might return data, an end-of-file indication, or an error other than
+*                        one indicating that it is blocked, and in each of these cases the descriptor shall
+*                        be considered ready for reading.)" :
+*
+*                       (1) "If the socket is currently listening, then it shall be marked as readable if
+*                            an incoming connection request has been received, and a call to the accept()
+*                            function shall complete without blocking."
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Pages 164-165 states that "a socket is ready for reading if any of the
+*                       following ... conditions is true" :
+*
+*                       (1) "A read operation on the socket will not block and will return a value greater
+*                            than 0 (i.e., the data that is ready to be read)."
+*
+*                       (2) "The read half of the connection is closed (i.e., a TCP connection that has
+*                            received a FIN).  A read operation ... will not block and will return 0 (i.e.,
+*                            EOF)."
+*
+*                       (3) "The socket is a listening socket and the number of completed connections is
+*                            nonzero.  An accept() on the listening socket will ... not block."
+*
+*                       (4) "A socket error is pending.  A read operation on the socket will not block and
+*                            will return an error (-1) with 'errno' set to the specific error condition."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A1'.
+*
+*               (3) Socket descriptor read availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor read handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also 'NetSock_RxDataHandlerStream()  Note #11'
+*                          & 'NetSock_Accept()               Note #10'.
+*********************************************************************************************************
+*/
+
+#if ((NET_SOCK_CFG_SEL_EN         == DEF_ENABLED) && \
+     defined(NET_SOCK_TYPE_STREAM_MODULE_EN))
+static  CPU_BOOLEAN  NetSock_SelDescHandlerRdStream (NET_SOCK     *p_sock,
+                                                     NET_ERR      *p_err)
+{
+    NET_CONN_ID  conn_id;
+    NET_CONN_ID  conn_id_transport;
+    CPU_BOOLEAN  sock_rdy;
+    NET_ERR      err;
+
+                                                                    /* ---------- HANDLE STREAM SOCK DESC RD ---------- */
+                                                                    /* Get transport conn id.                           */
+    conn_id           = p_sock->ID_Conn;
+    conn_id_transport = NetConn_ID_TransportGet(conn_id, &err);
+    if (err != NET_CONN_ERR_NONE) {
+        *p_err  = NET_SOCK_ERR_CONN_FAIL;
+         return (DEF_YES);                                          /* Rtn sock err (see Note #2b4).                    */
+    }
+
+    if (conn_id_transport == NET_CONN_ID_NONE) {
+        *p_err  = NET_SOCK_ERR_CONN_FAIL;
+         return (DEF_YES);                                          /* Rtn sock err (see Note #2b4).                    */
+    }
+
+
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+            *p_err =  NET_SOCK_ERR_NOT_USED;                         /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;                           /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED:                                 /* Closed     stream socks NOT allowed.             */
+        case NET_SOCK_STATE_BOUND:                                  /* Non-conn'd stream socks NOT allowed.             */
+            *p_err =  NET_SOCK_ERR_INVALID_OP;                       /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_LISTEN:                                 /* Chk listen stream socks ...                      */
+             sock_rdy = NetSock_ConnAcceptQ_IsRdy(p_sock, &err);     /* ... for any avail conn (see Note #2b3).          */
+             switch (err) {
+                 case NET_SOCK_ERR_NONE:
+                      break;
+
+
+                 case NET_SOCK_ERR_INVALID_TYPE:
+                     *p_err =  err;                                  /* Rtn sock err (see Note #2b4).                    */
+                      return (DEF_YES);
+
+
+                 default:
+                     *p_err =  NET_SOCK_ERR_CONN_FAIL;               /* Rtn sock err (see Note #2b4).                    */
+                      return (DEF_YES);
+             }
+             break;
+
+
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:                       /* Rtn conn-in-progress stream socks ...            */
+             sock_rdy = DEF_NO;                                     /* ... as NOT rdy.                                  */
+                                                                    /* Cfg sock event to wait on transport rx.          */
+             break;
+
+
+        case NET_SOCK_STATE_CONN:                                   /* Chk   conn'd  stream socks             ...       */
+        case NET_SOCK_STATE_CONN_DONE:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:                      /* ... & closing stream socks;            ...       */
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+                                                                    /* ... for rx data avail  (see Note #2b1) ...       */
+                                                                    /* ... OR  rx conn closed (see Note #2b2).          */
+             sock_rdy = NetSock_IsAvailRxStream(p_sock, conn_id_transport, &err);
+             switch (err) {
+                 case NET_SOCK_ERR_NONE:
+                      break;
+
+
+                 case NET_SOCK_ERR_INVALID_TYPE:
+                     *p_err = err;                                  /* Rtn sock err (see Note #2b4).                    */
+                      return (DEF_YES);
+
+
+                 case NET_SOCK_ERR_INVALID_PROTOCOL:
+                 case NET_SOCK_ERR_CONN_FAIL:
+                 case NET_CONN_ERR_INVALID_CONN:
+                 case NET_CONN_ERR_NOT_USED:
+                 default:
+                     *p_err = NET_SOCK_ERR_CONN_FAIL;               /* Rtn sock err (see Note #2b4).                    */
+                      return (DEF_YES);
+             }
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;                    /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+    return (sock_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_SelDescHandlerWr()
+*
+* Description : (1) Handle socket descriptor for write operation(s) :
+*
+*                   (a) Check socket for available write operation(s) :
+*                       (1) Write data                                                  See Note #2b1
+*                       (2) Write connection closed                                     See Note #2b2
+*                       (3) Write connection(s) available                               See Note #2b3
+*                       (4) Socket error(s)                                             See Note #2b4
+*
+*                   (b) Configure socket event table to wait on appropriate write
+*                           operation(s), if necessary
+*
+*
+* Argument(s) : sock_id                 Socket descriptor/handle identifier of socket to check for
+*                                           available write operation(s).
+*
+*               p_sock_event_tbl        Pointer to a socket event table to configure socket events
+*               ----------------            to wait on.
+*
+*                                       Argument validated in NetSock_Sel().
+*
+*               p_sock_event_nbr_cfgd   Pointer to the number of configured socket events.
+*               ---------------------   Argument validated in NetSock_Sel().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetSock_SelDescHandlerWrDatagram() : -
+*                                                               -- RETURNED BY NetSock_SelDescHandlerWrStream() : --
+*                               NET_SOCK_ERR_NONE               Socket successfully checked for write operation(s);
+*                                                                   check return value for write operation(s)
+*                                                                   availability.
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_FAULT              Socket fault; connection(s) aborted.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+*                                                               -- RETURNED BY NetSock_SelDescHandlerWrStream() : --
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*
+*                                                               ---------- RETURNED BY NetSock_IsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+* Return(s)   : DEF_YES, if socket has any available write operation(s) [see Notes #2b1 & #2b3]; OR ...
+*
+*                        if socket's write connection is closed         [see Note  #2b2];        OR ...
+*
+*                        if socket has any available socket error(s)    [see Note  #2b4].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_Sel().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the ... 'writefds' ...
+*                   parameter ... to see whether ... [any] descriptors ... are ready for writing" :
+*
+*                   (a) "A descriptor shall be considered ready for writing when a call to an output function
+*                        ... would not block, whether or not the function would transfer data successfully" :
+*
+*                       (1) "If a non-blocking call to the connect() function has been made for a socket, and
+*                            the connection attempt has either succeeded or failed leaving a pending error,
+*                            the socket shall be marked as writable."
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Page 165 states that "a socket is ready for writing if any of the
+*                       following ... conditions is true" :
+*
+*                       (1) "A write operation will not block and will return a positive value (e.g., the
+*                            number of bytes accepted by the transport layer)."
+*
+*                       (2) "The write half of the connection is closed."
+*
+*                       (3) "A socket using a non-blocking connect() has completed the connection, or the
+*                            connect() has failed."
+*
+*                       (4) "A socket error is pending.  A write operation on the socket will not block and
+*                            will return an error (-1) with 'errno' set to the specific error condition."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A2'.
+*
+*               (3) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'SockType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  NetSock_SelDescHandlerWr (NET_SOCK_ID           sock_id,
+                                               NET_ERR              *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_BOOLEAN   sock_used;
+#endif
+    CPU_BOOLEAN   sock_rdy;
+    NET_SOCK     *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* -------------- VALIDATE SOCK USED -------------- */
+    sock_used = NetSock_IsUsed(sock_id, p_err);
+    if (sock_used != DEF_YES) {
+        return (DEF_YES);                                           /* Rtn sock err (see Note #2b4).                    */
+    }
+#endif
+
+                                                                    /* ------------- HANDLE SOCK DESC WR -------------- */
+    p_sock = &NetSock_Tbl[sock_id];
+
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_DATAGRAM:
+             sock_rdy = NetSock_SelDescHandlerWrDatagram(p_sock, p_err);
+             break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+             sock_rdy = NetSock_SelDescHandlerWrStream(p_sock, p_err);
+             break;
+#endif
+
+
+        case NET_SOCK_TYPE_FAULT:
+            *p_err =  NET_SOCK_ERR_FAULT;                            /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_TYPE_NONE:
+        default:                                                    /* See Note #3.                                     */
+            *p_err =  NET_SOCK_ERR_INVALID_TYPE;                     /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+    }
+
+
+    return (sock_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_SelDescHandlerWrDatagram()
+*
+* Description : (1) Handle datagram-type socket descriptor for write operation(s) :
+*
+*                   (a) Check datagram-type socket for available write operation(s) :
+*                       (1) Write data                                                  See Note #2b1
+*                       (2) Socket error(s)                                             See Note #2b4
+*
+*                   (b) Configure socket event table to wait on appropriate write
+*                           operation(s) :
+*
+*                       (1) Socket transmit data
+*
+*
+* Argument(s) : sock_id                 Socket descriptor/handle identifier of datagram-type socket to
+*               -------                     check for available write operation(s).
+*
+*                                       Argument checked   in NetSock_SelDescHandlerWr().
+*
+*               p_sock                  Pointer to a socket.
+*               ------                  Argument validated in NetSock_SelDescHandlerWr().
+*
+*               p_sock_event_tbl        Pointer to a socket event table to configure socket events
+*               ----------------            to wait on.
+*
+*                                       Argument validated in NetSock_Sel().
+*
+*               p_sock_event_nbr_cfgd   Pointer to the number of configured socket events.
+*               ---------------------   Argument validated in NetSock_Sel().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Datagram-type socket successfully checked for
+*                                                                   write operation(s); check return value for
+*                                                                   write operation(s) availability.
+*
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+*                                                               -- RETURNED BY NetSock_IsRdyTxDatagram() : ---
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type; i.e. NOT datagram-type.
+*
+* Return(s)   : DEF_YES, if datagram-type socket has any available write operation(s) [see Note #2b1]; OR ...
+*
+*                        if datagram-type socket has any available socket error(s)    [see Note #2b4].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerWr().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the ... 'writefds' ...
+*                   parameter ... to see whether ... [any] descriptors ... are ready for writing" :
+*
+*                   (a) "A descriptor shall be considered ready for writing when a call to an output function
+*                        ... would not block, whether or not the function would transfer data successfully."
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Page 165 states that "a socket is ready for writing if any of the
+*                       following ... conditions is true" :
+*
+*                       (1) "A write operation will not block and will return a positive value (e.g., the
+*                            number of bytes accepted by the transport layer)."
+*
+*                       (4) "A socket error is pending.  A write operation on the socket will not block and
+*                            will return an error (-1) with 'errno' set to the specific error condition."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A2'.
+*
+*               (3) Socket descriptor write availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor write handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also 'NetSock_TxDataHandlerDatagram()  Note #10'.
+*********************************************************************************************************
+*/
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  NetSock_SelDescHandlerWrDatagram (NET_SOCK             *p_sock,
+                                                       NET_ERR              *p_err)
+{
+    CPU_BOOLEAN  sock_rdy;
+    NET_ERR      err;
+
+
+                                                                    /* --------- HANDLE DATAGRAM SOCK DESC WR --------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+            *p_err =  NET_SOCK_ERR_NOT_USED;                         /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;                           /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED:                                 /* Chk non-conn'd datagram socks ...                */
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN:                                   /* ... &   conn'd datagram socks ...                */
+        case NET_SOCK_STATE_CONN_DONE:
+                                                                    /* ... if rdy for tx (see Note #2b1).               */
+             sock_rdy = NetSock_IsRdyTxDatagram(p_sock, &err);
+             switch (err) {
+                 case NET_SOCK_ERR_NONE:
+                      break;
+
+
+                 case NET_SOCK_ERR_INVALID_TYPE:
+                     *p_err =  err;                                  /* Rtn sock err (see Note #2b4).                    */
+                      return (DEF_YES);
+
+
+                 default:
+                     *p_err =  NET_SOCK_ERR_CONN_FAIL;               /* Rtn sock err (see Note #2b4).                    */
+                      return (DEF_YES);
+             }
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        case NET_SOCK_STATE_LISTEN:                                 /* Listen  datagram socks NOT allowed.              */
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:                      /* Closing datagram socks NOT allowed.              */
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        default:
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;                    /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+    }
+
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (sock_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_SelDescHandlerWrStream()
+*
+* Description : (1) Handle stream-type socket descriptor for write operation(s) :
+*
+*                   (a) Check stream-type socket for available write operation(s) :
+*                       (1) Write data                                                  See Note #2b1
+*                       (2) Write connection closed                                     See Note #2b2
+*                       (3) Write connection(s) available                               See Note #2b3
+*                       (4) Socket error(s)                                             See Note #2b4
+*
+*                   (b) Configure socket event table to wait on appropriate write
+*                           operation(s) :
+*
+*                       (1) Socket connection's transport layer transmit operation(s)
+*                       (2) Socket connection(s) complete
+*
+*
+* Argument(s) : sock_id                 Socket descriptor/handle identifier of stream-type socket to
+*               -------                     check for available write operation(s).
+*
+*                                       Argument checked   in NetSock_SelDescHandlerWr().
+*
+*               p_sock                  Pointer to a socket.
+*               ------                  Argument validated in NetSock_SelDescHandlerWr().
+*
+*               p_sock_event_tbl        Pointer to a socket event table to configure socket events
+*               ----------------            to wait on.
+*
+*                                       Argument validated in NetSock_Sel().
+*
+*               p_sock_event_nbr_cfgd   Pointer to the number of configured socket events.
+*               ---------------------   Argument validated in NetSock_Sel().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Stream-type socket successfully checked for
+*                                                                   write operation(s); check return value for
+*                                                                   write operation(s) availability.
+*
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_INVALID_OP         Invalid socket operation.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+*                                                               --- RETURNED BY NetSock_IsRdyTxStream() : ----
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type; i.e. NOT stream-type.
+*
+* Return(s)   : DEF_YES, if stream-type socket has any available write operation(s) [see Notes #2b1 & #2b3]; OR ...
+*
+*                        if stream-type socket's write connection is closed         [see Note  #2b2];        OR ...
+*
+*                        if stream-type socket has any available socket error(s)    [see Note  #2b4].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerWr().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the ... 'writefds' ...
+*                   parameter ... to see whether ... [any] descriptors ... are ready for writing" :
+*
+*                   (a) "A descriptor shall be considered ready for writing when a call to an output function
+*                        ... would not block, whether or not the function would transfer data successfully" :
+*
+*                       (1) "If a non-blocking call to the connect() function has been made for a socket, and
+*                            the connection attempt has either succeeded or failed leaving a pending error,
+*                            the socket shall be marked as writable."
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Page 165 states that "a socket is ready for writing if any of the
+*                       following ... conditions is true" :
+*
+*                       (1) "A write operation will not block and will return a positive value (e.g., the
+*                            number of bytes accepted by the transport layer)."
+*
+*                       (2) "The write half of the connection is closed."
+*
+*                       (3) "A socket using a non-blocking connect() has completed the connection, or the
+*                            connect() has failed."
+*
+*                       (4) "A socket error is pending.  A write operation on the socket will not block and
+*                            will return an error (-1) with 'errno' set to the specific error condition."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A2'.
+*
+*               (3) Socket descriptor write availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor write handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also 'NetSock_TxDataHandlerStream()  Note #8'
+*                          & 'NetSock_ConnHandlerStream()    Note #4'.
+*********************************************************************************************************
+*/
+
+#if ((NET_SOCK_CFG_SEL_EN         == DEF_ENABLED)) && \
+     defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+static  CPU_BOOLEAN  NetSock_SelDescHandlerWrStream (NET_SOCK  *p_sock,
+                                                     NET_ERR   *p_err)
+{
+    NET_CONN_ID  conn_id;
+    NET_CONN_ID  conn_id_transport;
+    CPU_BOOLEAN  sock_rdy;
+    NET_ERR      err;
+
+                                                                    /* ---------- HANDLE STREAM SOCK DESC WR ---------- */
+                                                                    /* Get transport conn id.                           */
+    conn_id           = p_sock->ID_Conn;
+    conn_id_transport = NetConn_ID_TransportGet(conn_id, &err);
+    if (  err != NET_CONN_ERR_NONE) {
+        *p_err  = NET_SOCK_ERR_CONN_FAIL;
+         return (DEF_YES);                                          /* Rtn sock err (see Note #2b4).                    */
+    }
+    if  (conn_id_transport == NET_CONN_ID_NONE) {
+        *p_err  = NET_SOCK_ERR_CONN_FAIL;
+         return (DEF_YES);                                          /* Rtn sock err (see Note #2b4).                    */
+    }
+
+
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+            *p_err =  NET_SOCK_ERR_NOT_USED;                         /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;                           /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED:                                 /* Closed     stream socks NOT allowed.             */
+        case NET_SOCK_STATE_BOUND:                                  /* Non-conn'd stream socks NOT allowed.             */
+        case NET_SOCK_STATE_LISTEN:
+            *p_err =  NET_SOCK_ERR_INVALID_OP;                       /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:                       /* Rtn conn-in-progress stream socks ...            */
+             sock_rdy = DEF_NO;                                     /* ... as NOT rdy.                                  */
+             break;
+
+
+        case NET_SOCK_STATE_CONN_DONE:                              /* Rtn conn-completed stream socks ...              */
+             sock_rdy = DEF_YES;                                    /* ... as     rdy (see Note #2b3).                  */
+             break;
+
+
+        case NET_SOCK_STATE_CONN:                                   /* Chk conn'd stream socks               ...        */
+                                                                    /* ... if rdy for tx     (see Note #2b1) ...        */
+                                                                    /* ... OR tx conn closed (see Note #2b2).           */
+             sock_rdy = NetSock_IsRdyTxStream(p_sock, conn_id_transport, &err);
+             switch (err) {
+                 case NET_SOCK_ERR_NONE:
+                      break;
+
+
+                 case NET_SOCK_ERR_INVALID_TYPE:
+                     *p_err =  err;                                  /* Rtn sock err (see Note #2b4).                    */
+                      return (DEF_YES);
+
+
+                 case NET_SOCK_ERR_INVALID_PROTOCOL:
+                 case NET_SOCK_ERR_CONN_FAIL:
+                 case NET_CONN_ERR_INVALID_CONN:
+                 case NET_CONN_ERR_NOT_USED:
+                 default:
+                     *p_err =  NET_SOCK_ERR_CONN_FAIL;               /* Rtn sock err (see Note #2b4).                    */
+                      return (DEF_YES);
+             }
+             break;
+
+
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:                      /* Rtn closing stream socks ...                     */
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+             sock_rdy = DEF_YES;                                    /* ... as rdy   (see Note #2b2).                    */
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;                    /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+    }
+
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (sock_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_SelDescHandlerErr()
+*
+* Description : (1) Handle socket descriptor for error(s) &/or exception(s) :
+*
+*                   (a) Check socket for available error(s) &/or exception(s) :
+*                       (1) Socket error(s)                                         See Notes #2a2 & #2a3
+*
+*                   (b) Configure socket event table to wait on appropriate error
+*                           operation(s), if necessary
+*
+*
+* Argument(s) : sock_id                 Socket descriptor/handle identifier of socket to check for
+*                                           available error(s).
+*
+*               p_sock_event_tbl        Pointer to a socket event table to configure socket events
+*               ----------------            to wait on.
+*
+*                                       Argument validated in NetSock_Sel().
+*
+*               p_sock_event_nbr_cfgd   Pointer to the number of configured socket events.
+*               ---------------------   Argument validated in NetSock_Sel().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetSock_SelDescHandlerErrDatagram() : -
+*                                                               -- RETURNED BY NetSock_SelDescHandlerErrStream() : --
+*                               NET_SOCK_ERR_NONE               Socket successfully checked for error(s); check
+*                                                                   return value for error availability.
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type.
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_FAULT              Socket fault; connection(s) aborted.
+*
+*                                                               -- RETURNED BY NetSock_SelDescHandlerErrStream() : --
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+*                                                               ---------- RETURNED BY NetSock_IsUsed() : -----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_SOCK_ERR_INVALID_SOCK       Invalid socket number.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*
+* Return(s)   : DEF_YES, if socket has any available socket error(s) [see Note #2a].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_Sel().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the ... 'errorfds' ...
+*                   parameter ... to see whether ... [any] descriptors ... have an exceptional condition
+*                   pending" :
+*
+*                   (a) "A file descriptor ... shall be considered to have an exceptional condition pending
+*                        ... as noted below" :
+*
+*                       (1) (A) "A socket ... receive operation ... [that] would return out-of-band data
+*                                without blocking."
+*                           (B) "A socket ... [with] out-of-band data ... present in the receive queue."
+*
+*                       (2) "If a socket has a pending error."
+*
+*                       (3) "Other circumstances under which a socket may be considered to have an exceptional
+*                            condition pending are protocol-specific and implementation-defined."
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Page 165 states that "a socket has an exception condition pending if ...
+*                       any of the following ... conditions is true" :
+*
+*                       (1) (A) "Out-of-band data for the socket" is currently available; ...
+*                           (B) "Or the socket is still at the out-of-band mark."
+*
+*                   (c) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Page 165 states "that when an error occurs on a socket, it is [also]
+*                       marked as both readable and writeable by select()".
+*
+*                   See also 'NetSock_Sel()  Note #3b2A3'.
+*
+*               (3) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'SockType' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  NetSock_SelDescHandlerErr (NET_SOCK_ID  sock_id,
+                                                NET_ERR     *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    CPU_BOOLEAN   sock_used;
+#endif
+    CPU_BOOLEAN   sock_rdy;
+    NET_SOCK     *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                     /* -------------- VALIDATE SOCK USED -------------- */
+    sock_used = NetSock_IsUsed(sock_id, p_err);
+    if (sock_used != DEF_YES) {
+        return (DEF_YES);                                           /* Rtn sock err (see Note #2a3).                    */
+    }
+#endif
+
+                                                                    /* ------------- HANDLE SOCK DESC ERR ------------- */
+    p_sock = &NetSock_Tbl[sock_id];
+
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_DATAGRAM:
+             sock_rdy = NetSock_SelDescHandlerErrDatagram(p_sock, p_err);
+             break;
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+             sock_rdy = NetSock_SelDescHandlerErrStream(p_sock, p_err);
+             break;
+#endif
+
+
+        case NET_SOCK_TYPE_FAULT:
+            *p_err =  NET_SOCK_ERR_FAULT;                            /* Rtn sock err (see Note #2a3).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_TYPE_NONE:
+        default:                                                    /* See Note #3.                                     */
+            *p_err =  NET_SOCK_ERR_INVALID_TYPE;                     /* Rtn sock err (see Note #2a3).                    */
+             return (DEF_YES);
+    }
+
+
+    return (sock_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 NetSock_SelDescHandlerErrDatagram()
+*
+* Description : (1) Handle datagram-type socket descriptor for error(s) &/or exception(s) :
+*
+*                   (a) Check datagram-type socket for available error(s) &/or exception(s) :
+*
+*                       (1) Socket error(s)                                         See Notes #2a2 & #2a3
+*
+*                   (b) Configure socket event table to wait on appropriate error
+*                           operation(s), if necessary
+*
+*
+* Argument(s) : sock_id                 Socket descriptor/handle identifier of datagram-type socket to
+*               -------                     check for available error(s).
+*
+*                                       Argument checked   in NetSock_SelDescHandlerErr().
+*
+*               p_sock                  Pointer to a socket.
+*               ------                  Argument validated in NetSock_SelDescHandlerErr().
+*
+*               p_sock_event_tbl        Pointer to a socket event table to configure socket events
+*               ----------------            to wait on.
+*
+*                                       Argument validated in NetSock_Sel().
+*
+*               p_sock_event_nbr_cfgd   Pointer to the number of configured socket events.
+*               ---------------------   Argument validated in NetSock_Sel().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Datagram-type socket successfully checked for
+*                                                                   error(s); check return value for error
+*                                                                   availability.
+*
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*
+*
+* Return(s)   : DEF_YES, if datagram-type socket has any available socket error(s) [see Note #2a].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerErr().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the ... 'errorfds' ...
+*                   parameter ... to see whether ... [any] descriptors ... have an exceptional condition
+*                   pending" :
+*
+*                   (a) "A file descriptor ... shall be considered to have an exceptional condition pending
+*                        ... as noted below" :
+*
+*                       (2) "If a socket has a pending error."
+*
+*                       (3) "Other circumstances under which a socket may be considered to have an exceptional
+*                            condition pending are protocol-specific and implementation-defined."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A3'.
+*
+*               (3) Socket descriptor error availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor error handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also 'NetSock_RxDataHandlerDatagram()  Note #13'
+*                          & 'NetSock_TxDataHandlerDatagram()  Note #10'.
+*
+*               (4) Since datagram-type sockets typically never wait on transmit operations, no socket
+*                   event need be configured to wait on datagram-type socket transmit errors.
+*
+*                   See also 'NetSock_IsRdyTxDatagram()  Note #3'.
+*********************************************************************************************************
+*/
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  NetSock_SelDescHandlerErrDatagram (NET_SOCK  *p_sock,
+                                                        NET_ERR   *p_err)
+{
+    CPU_BOOLEAN  sock_rdy;
+
+
+                                                                    /* -------- HANDLE DATAGRAM SOCK DESC ERR --------- */
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+            *p_err =  NET_SOCK_ERR_NOT_USED;                         /* Rtn sock err (see Note #2a3).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;                           /* Rtn sock err (see Note #2a2).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED:                                 /* Rtn closed     datagram socks, ...               */
+        case NET_SOCK_STATE_BOUND:                                  /* ... non-conn'd datagram socks, ...               */
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN:                                   /* ... &   conn'd datagram socks  ...               */
+        case NET_SOCK_STATE_CONN_DONE:
+             sock_rdy = DEF_NO;                                     /* ... as NOT rdy w/ any err(s).                    */
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        case NET_SOCK_STATE_LISTEN:                                 /* Listen  datagram socks NOT allowed.              */
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:                      /* Closing datagram socks NOT allowed.              */
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        default:
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;                    /* Rtn sock err (see Note #2a3).                    */
+             return (DEF_YES);
+    }
+
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (sock_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                  NetSock_SelDescHandlerErrStream()
+*
+* Description : (1) Handle stream-type socket descriptor for error(s) &/or exception(s) :
+*
+*                   (a) Check stream-type socket for available error(s) &/or exception(s) :
+*
+*                       (1) Out-of-band data                                        See Note  #2b1
+*                       (2) Socket error(s)                                         See Notes #2a2 & #2a3
+*
+*                   (b) Configure socket event table to wait on appropriate error
+*                           operation(s), if necessary
+*
+*
+* Description : (1) Check stream-type socket for available error(s) :
+*
+*
+*
+* Argument(s) : sock_id                 Socket descriptor/handle identifier of stream-type socket to
+*               -------                     check for available error(s).
+*
+*                                       Argument checked   in NetSock_SelDescHandlerErr().
+*
+*               p_sock                  Pointer to a socket.
+*               ------                  Argument validated in NetSock_SelDescHandlerErr().
+*
+*               p_sock_event_tbl        Pointer to a socket event table to configure socket events
+*               ----------------            to wait on.
+*
+*                                       Argument validated in NetSock_Sel().
+*
+*               p_sock_event_nbr_cfgd   Pointer to the number of configured socket events.
+*               ---------------------   Argument validated in NetSock_Sel().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Stream-type socket successfully checked for
+*                                                                   error(s); check return value for error
+*                                                                   availability.
+*
+*                               NET_SOCK_ERR_INVALID_STATE      Invalid socket state.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+*
+* Return(s)   : DEF_YES, if stream-type socket has any available socket error(s) [see Note #2a].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerErr().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the ... 'errorfds' ...
+*                   parameter ... to see whether ... [any] descriptors ... have an exceptional condition
+*                   pending" :
+*
+*                   (a) "A file descriptor ... shall be considered to have an exceptional condition pending
+*                        ... as noted below" :
+*
+*                       (1) (A) "A socket ... receive operation ... [that] would return out-of-band data
+*                                without blocking."
+*                           (B) "A socket ... [with] out-of-band data ... present in the receive queue."
+*
+*                           Out-of-band data NOT supported (see 'net_tcp.h  Note #1b').
+*
+*                       (2) "If a socket has a pending error."
+*
+*                       (3) "Other circumstances under which a socket may be considered to have an exceptional
+*                            condition pending are protocol-specific and implementation-defined."
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Page 165 states that "a socket has an exception condition pending if ...
+*                       any of the following ... conditions is true" :
+*
+*                       (1) (A) "Out-of-band data for the socket" is currently available; ...
+*                           (B) "Or the socket is still at the out-of-band mark."
+*
+*                           Out-of-band data NOT supported (see 'net_tcp.h  Note #1b').
+*
+*                   See also 'NetSock_Sel()  Note #3b2A3'.
+*
+*               (3) Socket descriptor error availability determined by other socket handler function(s).
+*                   For correct interoperability between socket descriptor error handler functionality &
+*                   all other appropriate socket handler function(s); ANY modification to any of these
+*                   functions MUST be appropriately synchronized.
+*
+*                   See also 'NetSock_RxDataHandlerStream()  Note #11',
+*                            'NetSock_TxDataHandlerStream()  Note #8' ,
+*                            'NetSock_Accept()               Note #10',
+*                          & 'NetSock_ConnHandlerStream()    Note #4'.
+*********************************************************************************************************
+*/
+
+#if ((NET_SOCK_CFG_SEL_EN         == DEF_ENABLED)) && \
+     defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+static  CPU_BOOLEAN  NetSock_SelDescHandlerErrStream (NET_SOCK  *p_sock,
+                                                      NET_ERR   *p_err)
+{
+    NET_CONN_ID  conn_id;
+    NET_CONN_ID  conn_id_transport;
+    CPU_BOOLEAN  sock_rdy;
+    NET_ERR      err;
+
+                                                                    /* --------- HANDLE STREAM SOCK DESC ERR ---------- */
+                                                                    /* Get transport conn id.                           */
+    conn_id           = p_sock->ID_Conn;
+    conn_id_transport = NetConn_ID_TransportGet(conn_id, &err);
+    if (  err != NET_CONN_ERR_NONE) {
+        *p_err  = NET_SOCK_ERR_CONN_FAIL;
+         return (DEF_YES);                                          /* Rtn sock err (see Note #2a3).                    */
+    }
+    if  (conn_id_transport == NET_CONN_ID_NONE) {
+        *p_err  = NET_SOCK_ERR_CONN_FAIL;
+         return (DEF_YES);                                          /* Rtn sock err (see Note #2a3).                    */
+    }
+
+
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+            *p_err =  NET_SOCK_ERR_NOT_USED;                         /* Rtn sock err (see Note #2a3).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err =  NET_SOCK_ERR_CLOSED;                           /* Rtn sock err (see Note #2a2).                    */
+             return (DEF_YES);
+
+
+        case NET_SOCK_STATE_CLOSED:                                 /* Rtn closed       stream socks ...                */
+        case NET_SOCK_STATE_BOUND:                                  /* ... & non-conn'd stream socks ...                */
+             sock_rdy = DEF_NO;                                     /* ... as NOT rdy w/ any err(s).                    */
+             break;
+
+
+        case NET_SOCK_STATE_LISTEN:                                 /* Rtn listen stream socks ...                      */
+             sock_rdy = DEF_NO;                                     /* ... as NOT rdy w/ any err(s).                    */
+             break;
+
+
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:                       /* Rtn conn-in-progress stream socks ...            */
+             sock_rdy = DEF_NO;                                     /* ... as NOT rdy w/ any err(s).                    */
+             break;
+
+
+        case NET_SOCK_STATE_CONN:                                   /* Rtn conn'd stream socks ...                      */
+        case NET_SOCK_STATE_CONN_DONE:
+             sock_rdy = DEF_NO;                                     /* ... as NOT rdy w/ any err(s).                    */
+             break;
+
+
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:                      /* Rtn closing stream socks ...                     */
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+             sock_rdy = DEF_NO;                                     /* ... as NOT rdy w/ any err(s).                    */
+             break;
+
+
+        case NET_SOCK_STATE_NONE:
+        default:
+            *p_err =  NET_SOCK_ERR_INVALID_STATE;                    /* Rtn sock err (see Note #2a3).                    */
+             return (DEF_YES);
+    }
+
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (sock_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_IsAvailRxDatagram()
+*
+* Description : (1) Check datagram-type socket for available receive operation(s) :
+*
+*                   (a) Receive data                                                    See Note #2b1
+*                   (b) Socket error(s)                                                 See Note #2b4
+*
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_SelDescHandlerRd().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Datagram-type socket successfully checked for
+*                                                                   available receive data; check return value
+*                                                                   for receive data availability.
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type; i.e. NOT datagram-type.
+*
+* Return(s)   : DEF_YES, if datagram-type socket has any available receive data    [see Note #2b1]; OR ...
+*
+*                        if datagram-type socket has any available socket error(s) [see Note #2b4].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerRdDatagram().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the 'readfds' ... parameter
+*                   ... to see whether ... [any] descriptors are ready for reading" :
+*
+*                   (a) "A descriptor shall be considered ready for reading when a call to an input function
+*                        ... would not block, whether or not the function would transfer data successfully.
+*                        (The function might return data, an end-of-file indication, or an error other than
+*                        one indicating that it is blocked, and in each of these cases the descriptor shall
+*                        be considered ready for reading.)"
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Pages 164-165 states that "a socket is ready for reading if any of the
+*                       following ... conditions is true" :
+*
+*                       (1) "A read operation on the socket will not block and will return a value greater
+*                            than 0 (i.e., the data that is ready to be read)."
+*
+*                       (4) "A socket error is pending.  A read operation on the socket will not block and
+*                            will return an error (-1) with 'errno' set to the specific error condition."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A1'.
+*********************************************************************************************************
+*/
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  NetSock_IsAvailRxDatagram (NET_SOCK  *p_sock,
+                                                NET_ERR   *p_err)
+{
+    CPU_BOOLEAN  rx_avail;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* -------------- VALIDATE SOCK TYPE -------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_DATAGRAM) {
+       *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+        return (DEF_YES);                                           /* Rtn sock err (see Note #2b4).                    */
+    }
+#endif
+
+                                                                    /* -------------- CHK SOCK RX AVAIL --------------- */
+    rx_avail = (p_sock->RxQ_Head != (NET_BUF *)0) ? DEF_YES : DEF_NO;
+   *p_err     =  NET_SOCK_ERR_NONE;
+
+    return (rx_avail);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_IsAvailRxStream()
+*
+* Description : (1) Check stream-type socket for available receive operation(s) :
+*
+*                   (a) Receive data                                                    See Note #2b1
+*                   (b) Receive connection closed                                       See Note #2b2
+*                   (c) Socket  error(s)                                                See Note #2b4
+*
+*
+* Argument(s) : p_sock              Pointer to a socket.
+*               ------              Argument validated in NetSock_SelDescHandlerRd().
+*
+*               conn_id_transport   Connection's transport layer handle identifier.
+*               -----------------   Argument checked   in NetSock_SelDescHandlerRdStream().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Stream-type socket successfully checked for
+*                                                                   available receive data; check return
+*                                                                   value for receive data availability.
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type; i.e. NOT stream-type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+* Return(s)   : DEF_YES, if stream-type socket has any available receive data    [see Note #2b1]; OR ...
+*
+*                        if stream-type socket's receive connection is closed    [see Note #2b2]; OR ...
+*
+*                        if stream-type socket has any available socket error(s) [see Note #2b4].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerRdStream().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the 'readfds' ... parameter
+*                   ... to see whether ... [any] descriptors are ready for reading" :
+*
+*                   (a) "A descriptor shall be considered ready for reading when a call to an input function
+*                        ... would not block, whether or not the function would transfer data successfully.
+*                        (The function might return data, an end-of-file indication, or an error other than
+*                        one indicating that it is blocked, and in each of these cases the descriptor shall
+*                        be considered ready for reading.)"
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Pages 164-165 states that "a socket is ready for reading if any of the
+*                       following ... conditions is true" :
+*
+*                       (1) "A read operation on the socket will not block and will return a value greater
+*                            than 0 (i.e., the data that is ready to be read)."
+*
+*                       (2) "The read half of the connection is closed (i.e., a TCP connection that has
+*                            received a FIN).  A read operation ... will not block and will return 0 (i.e.,
+*                            EOF)."
+*
+*                       (4) "A socket error is pending.  A read operation on the socket will not block and
+*                            will return an error (-1) with 'errno' set to the specific error condition."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A1'.
+*
+*               (3) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+#if ((NET_SOCK_CFG_SEL_EN         == DEF_ENABLED)) && \
+     defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+static  CPU_BOOLEAN  NetSock_IsAvailRxStream (NET_SOCK     *p_sock,
+                                              NET_CONN_ID   conn_id_transport,
+                                              NET_ERR      *p_err)
+{
+    CPU_BOOLEAN  rx_avail;
+    NET_ERR      err;
+    NET_ERR      err_rtn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* -------------- VALIDATE SOCK TYPE -------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+       *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+        return (DEF_YES);                                           /* Rtn sock err (see Note #2b4).                    */
+    }
+#endif
+
+
+                                                                    /* -------------- CHK SOCK RX AVAIL --------------- */
+    rx_avail = DEF_NO;
+    err_rtn  = NET_SOCK_ERR_CONN_FAIL;
+
+    switch (p_sock->Protocol) {                                      /* Chk rx avail from transport layer.               */
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+        case NET_SOCK_PROTOCOL_TCP:
+             rx_avail = NetTCP_ConnIsAvailRx((NET_TCP_CONN_ID) conn_id_transport,
+                                             (NET_ERR       *)&err);
+             switch (err) {
+                 case NET_TCP_ERR_NONE:
+#ifdef  NET_SECURE_MODULE_EN
+                      if ((DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE)) &&
+                          (rx_avail == DEF_NO)) {
+                           rx_avail = NetSecure_SockRxIsDataPending(p_sock, &err);
+                      }
+#endif
+                      err_rtn = NET_SOCK_ERR_NONE;
+                      break;
+
+
+                 case NET_INIT_ERR_NOT_COMPLETED:
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_INVALID_CONN:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 default:
+                      err_rtn = NET_SOCK_ERR_CONN_FAIL;
+                      break;
+             }
+             break;
+#endif
+#endif
+
+        case NET_SOCK_PROTOCOL_NONE:
+        default:                                                    /* See Note #3.                                     */
+            (void)&err;                                             /* Prevent possible 'variable unused' warning.      */
+            *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;                 /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+    }
+
+
+    switch (err_rtn) {                                              /* Demux transport-to-sock layer err.               */
+        case NET_SOCK_ERR_NONE:                                     /* Sock rx data avail  (see Note #2b1) OR ...       */
+                                                                    /* ...  rx conn closed (see Note #2b2).             */
+             break;
+
+
+        case NET_SOCK_ERR_CONN_FAIL:
+        default:
+            *p_err =  err_rtn;                                       /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+    }
+
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (rx_avail);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetSock_IsRdyTxDatagram()
+*
+* Description : (1) Check datagram-type socket ready for transmit operation(s) :
+*
+*                   (a) Transmit data                                                   See Note #2b1
+*                   (b) Socket error(s)                                                 See Note #2b4
+*
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_SelDescHandlerWr().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Datagram-type socket successfully checked if
+*                                                                   ready for transmit; check return value
+*                                                                   for transmit ready availability.
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type; i.e. NOT datagram-type.
+*
+* Return(s)   : DEF_YES, if datagram-type socket is ready to transmit data         [see Note #2b1]; OR ...
+*
+*                        if datagram-type socket has any available socket error(s) [see Note #2b4].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerWrDatagram().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the ... 'writefds' ...
+*                   parameter ... to see whether ... [any] descriptors ... are ready for writing" :
+*
+*                   (a) "A descriptor shall be considered ready for writing when a call to an output function
+*                        ... would not block, whether or not the function would transfer data successfully."
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Page 165 states that "a socket is ready for writing if any of the
+*                       following ... conditions is true" :
+*
+*                       (1) "A write operation will not block and will return a positive value (e.g., the
+*                            number of bytes accepted by the transport layer)."
+*
+*                       (4) "A socket error is pending.  A write operation on the socket will not block and
+*                            will return an error (-1) with 'errno' set to the specific error condition."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A2'.
+*
+*               (3) Datagram-type sockets are typically always available for transmit operations.
+*********************************************************************************************************
+*/
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+static  CPU_BOOLEAN  NetSock_IsRdyTxDatagram (NET_SOCK  *p_sock,
+                                              NET_ERR   *p_err)
+{
+    CPU_BOOLEAN  tx_rdy;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* -------------- VALIDATE SOCK TYPE -------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_DATAGRAM) {
+       *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+        return (DEF_YES);                                           /* Rtn sock err (see Note #2b4).                    */
+    }
+#endif
+
+                                                                    /* --------------- CHK SOCK TX RDY ---------------- */
+   (void)&p_sock;                                                    /* Prevent possible 'variable unused' warning.      */
+
+    tx_rdy = DEF_YES;                                               /* See Note #3.                                     */
+   *p_err   = NET_SOCK_ERR_NONE;
+
+    return (tx_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_IsRdyTxStream()
+*
+* Description : (1) Check stream-type socket ready for transmit operation(s) :
+*
+*                   (a) Transmit data                                                   See Note #2b1
+*                   (b) Transmit connection closed                                      See Note #2b2
+*                   (c) Socket error(s)                                                 See Note #2b4
+*
+*
+* Argument(s) : p_sock              Pointer to a socket.
+*               ------              Argument validated in NetSock_SelDescHandlerWr().
+*
+*               conn_id_transport   Connection's transport layer handle identifier.
+*               -----------------   Argument checked   in NetSock_SelDescHandlerWrStream().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Stream-type socket successfully checked if
+*                                                                   ready for transmit; check return value
+*                                                                   for transmit ready availability.
+*
+*                               NET_SOCK_ERR_INVALID_TYPE       Invalid socket type; i.e. NOT stream-type.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket connection operation(s) failed.
+*
+* Return(s)   : DEF_YES, if stream-type socket is ready to transmit data         [see Note #2b1]; OR ...
+*
+*                        if stream-type socket's transmit connection is closed   [see Note #2b2]; OR ...
+*
+*                        if stream-type socket has any available socket error(s) [see Note #2b4].
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_SelDescHandlerWrStream().
+*
+* Note(s)     : (2) IEEE Std 1003.1, 2004 Edition, Section 'select() : DESCRIPTION' states that "the select()
+*                   function shall ... examine the file descriptor[s] ... passed in the ... 'writefds' ...
+*                   parameter ... to see whether ... [any] descriptors ... are ready for writing" :
+*
+*                   (a) "A descriptor shall be considered ready for writing when a call to an output function
+*                        ... would not block, whether or not the function would transfer data successfully."
+*
+*                   (b) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*                       Section 6.3, Page 165 states that "a socket is ready for writing if any of the
+*                       following ... conditions is true" :
+*
+*                       (1) "A write operation will not block and will return a positive value (e.g., the
+*                            number of bytes accepted by the transport layer)."
+*
+*                       (2) "The write half of the connection is closed."
+*
+*                       (4) "A socket error is pending.  A write operation on the socket will not block and
+*                            will return an error (-1) with 'errno' set to the specific error condition."
+*
+*                   See also 'NetSock_Sel()  Note #3b2A2'.
+*
+*               (3) Default case already invalidated in NetSock_Open().  However, the default case is
+*                   included as an extra precaution in case 'Protocol' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+#if ((NET_SOCK_CFG_SEL_EN         == DEF_ENABLED)) && \
+     defined(NET_SOCK_TYPE_STREAM_MODULE_EN)
+static  CPU_BOOLEAN  NetSock_IsRdyTxStream (NET_SOCK     *p_sock,
+                                            NET_CONN_ID   conn_id_transport,
+                                            NET_ERR      *p_err)
+{
+    CPU_BOOLEAN  tx_rdy;
+    NET_ERR      err;
+    NET_ERR      err_rtn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* -------------- VALIDATE SOCK TYPE -------------- */
+    if (p_sock->SockType != NET_SOCK_TYPE_STREAM) {
+       *p_err =  NET_SOCK_ERR_INVALID_TYPE;
+        return (DEF_YES);                                           /* Rtn sock err (see Note #2b4).                    */
+    }
+#endif
+
+
+                                                                    /* --------------- CHK SOCK TX RDY ---------------- */
+    tx_rdy  = DEF_NO;
+    err_rtn = NET_SOCK_ERR_CONN_FAIL;
+
+    switch (p_sock->Protocol) {                                      /* Chk tx rdy status from transport layer.          */
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+        case NET_SOCK_PROTOCOL_TCP:
+             tx_rdy = NetTCP_ConnIsRdyTx((NET_TCP_CONN_ID) conn_id_transport,
+                                         (NET_ERR       *)&err);
+             switch (err) {
+                 case NET_TCP_ERR_NONE:
+                      err_rtn = NET_SOCK_ERR_NONE;
+                      break;
+
+
+                 case NET_INIT_ERR_NOT_COMPLETED:
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_INVALID_CONN:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 default:
+                      err_rtn = NET_SOCK_ERR_CONN_FAIL;
+                      break;
+             }
+             break;
+#endif
+#endif
+
+        case NET_SOCK_PROTOCOL_NONE:
+        default:                                                    /* See Note #3.                                     */
+            (void)&err;                                             /* Prevent possible 'variable unused' warning.      */
+            *p_err =  NET_SOCK_ERR_INVALID_PROTOCOL;                 /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+    }
+
+
+    switch (err_rtn) {                                              /* Demux transport-to-sock layer err.               */
+        case NET_SOCK_ERR_NONE:                                     /* Sock rx data avail  (see Note #2b1) OR ...       */
+                                                                    /* ...  rx conn closed (see Note #2b2).             */
+             break;
+
+
+        case NET_SOCK_ERR_CONN_FAIL:
+        default:
+            *p_err =  err_rtn;                                       /* Rtn sock err (see Note #2b4).                    */
+             return (DEF_YES);
+    }
+
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (tx_rdy);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            NetSock_Get()
+*
+* Description : (1) Allocate & initialize a socket :
+*
+*                   (a) Get      a socket
+*                   (b) Validate   socket
+*                   (c) Initialize socket
+*                   (d) Update     socket pool statistics
+*                   (e) Return pointer to socket
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*               (2) The socket pool is implemented as a stack :
+*
+*                   (a) 'NetSock_PoolPtr' points to the head of the socket pool.
+*
+*                   (b) Sockets' 'NextPtr's link each socket to form  the socket pool stack.
+*
+*                   (c) Sockets are inserted & removed at the head of the socket pool stack.
+*
+*
+*                                        Sockets are
+*                                     inserted & removed
+*                                        at the head
+*                                       (see Note #2c)
+*
+*                                             |                 NextPtr
+*                                             |             (see Note #2b)
+*                                             v                    |
+*                                                                  |
+*                                          -------       -------   v   -------       -------
+*                         Socket Pool ---->|     |------>|     |------>|     |------>|     |
+*                           Pointer        |     |       |     |       |     |       |     |
+*                                          |     |       |     |       |     |       |     |
+*                        (see Note #2a)    -------       -------       -------       -------
+*
+*                                          |                                               |
+*                                          |<----------- Pool of Free Sockets ------------>|
+*                                          |                (see Note #2)                  |
+*
+*
+* Argument(s) : p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Socket successfully allocated & initialized.
+*                               NET_SOCK_ERR_NONE_AVAIL             NO available sockets to allocate.
+*                               NET_SOCK_ERR_INVALID_TYPE           Socket is NOT a valid type.
+*
+* Return(s)   : Pointer to socket, if NO error(s).
+*
+*               Pointer to NULL,   otherwise.
+*
+* Caller(s)   : NetSock_Open().
+*
+* Note(s)     : (3) (a) Socket pool is accessed by 'NetSock_PoolPtr' during execution of
+*
+*                       (1) NetSock_Init()
+*                       (2) NetSock_Get()
+*                       (3) NetSock_Free()
+*
+*                   (b) Since the primary tasks of the network protocol suite are prevented from running
+*                       concurrently (see 'net.h  Note #3'), it is NOT necessary to protect the shared
+*                       resources of the socket pool since no asynchronous access from other network
+*                       tasks is possible.
+*********************************************************************************************************
+*/
+
+static  NET_SOCK  *NetSock_Get (NET_ERR  *p_err)
+{
+    NET_SOCK  *p_sock;
+    NET_ERR    err;
+
+
+                                                                /* --------------------- GET SOCK --------------------- */
+    if (NetSock_PoolPtr != (NET_SOCK *)0) {                     /* If sock pool NOT empty, get sock from pool.          */
+        p_sock            = (NET_SOCK *)NetSock_PoolPtr;
+        NetSock_PoolPtr  = (NET_SOCK *)p_sock->NextPtr;
+
+    } else {                                                    /* If none avail, rtn err.                              */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NoneAvailCtr);
+       *p_err =   NET_SOCK_ERR_NONE_AVAIL;
+        return ((NET_SOCK *)0);
+    }
+
+
+                                                                /* -------------------- INIT SOCK --------------------- */
+    NetSock_Clr(p_sock);
+    DEF_BIT_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_USED);         /* Set sock as used.                                    */
+    p_sock->State = NET_SOCK_STATE_CLOSED;
+
+                                                                /* -------------- UPDATE SOCK POOL STATS -------------- */
+    NetStat_PoolEntryUsedInc(&NetSock_PoolStat, &err);
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (p_sock);                                             /* -------------------- RTN SOCK ---------------------- */
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_GetConnTransport()
+*
+* Description : (1) Allocate a transport layer connection :
+*
+*                   (a) Get a transport connection
+*                   (b) Set connection handle identifiers
+*
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_Listen(),
+*                                                 NetSock_ConnHandlerStream().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket transport connection successfully
+*                                                                   allocated.
+*                               NET_SOCK_ERR_CONN_FAIL          Socket transport connection allocation or
+*                                                                   configuration failed.
+*                               NET_SOCK_ERR_INVALID_FAMILY     Invalid socket protocol/address family.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Invalid socket protocol.
+*
+*                                                               - RETURNED BY NetConn_ID_TransportSet() : -
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : Transport connection handler identifer, if NO error(s).
+*
+*               NET_CONN_ID_NONE,                       otherwise.
+*
+* Caller(s)   : NetSock_Listen(),
+*               NetSock_ConnHandlerStream().
+*
+* Note(s)     : (2) The 'NET_SOCK_CFG_FAMILY' pre-processor 'else'-conditional code will never be
+*                   compiled/linked since 'net_sock.h' ensures that the family type configuration
+*                   constant (NET_SOCK_CFG_FAMILY) is configured with an appropriate family type
+*                   value (see 'net_sock.h  CONFIGURATION ERRORS').  The 'else'-conditional code
+*                   is included for completeness & as an extra precaution in case 'net_sock.h' is
+*                   incorrectly modified.
+*
+*               (3) On ANY error(s) after the transport connection is allocated, the transport connection
+*                   MUST be freed.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  NET_CONN_ID  NetSock_GetConnTransport (NET_SOCK  *p_sock,
+                                               NET_ERR   *p_err)
+{
+    NET_CONN_ID  conn_id_transport;
+    NET_CONN_ID  conn_id;
+    CPU_BOOLEAN  conn_err;
+    NET_ERR      err;
+
+
+                                                                    /* -------------- GET TRANSPORT CONN -------------- */
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+
+    conn_id_transport =  NetTCP_ConnGet(&NetSock_AppPostRx,
+                                        &NetSock_AppPostTx,
+                                        &err);
+
+
+   *p_err             = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE
+                                                  : NET_SOCK_ERR_CONN_FAIL;
+#else
+    NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+   (void)&conn_id_transport;                                        /* Prevent 'variable unused' compiler warnings.     */
+   (void)&err;
+   *p_err =  NET_SOCK_ERR_CONN_FAIL;
+#endif
+
+#else                                                               /* See Note #2.                                     */
+    NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+   *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+    return (NET_CONN_ID_NONE);
+#endif
+
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return (NET_CONN_ID_NONE);
+    }
+
+
+                                                                    /* ----------------- SET CONN IDs ----------------- */
+    conn_id  = p_sock->ID_Conn;
+    conn_err = DEF_NO;
+                                                                    /* Set conn's transport id.                         */
+    NetConn_ID_TransportSet(conn_id, conn_id_transport, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         conn_err = DEF_YES;
+    }
+
+                                                                    /* Set transport's conn id.                         */
+    if (conn_err == DEF_NO) {
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+        NetTCP_ConnSetID_Conn((NET_TCP_CONN_ID) conn_id_transport,
+                              (NET_CONN_ID    ) conn_id,
+                              (NET_ERR       *)&err);
+       *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE
+                                         : NET_SOCK_ERR_CONN_FAIL;
+#endif
+
+#else                                                               /* See Note #2.                                     */
+        conn_err = DEF_YES;
+#endif
+    }
+
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         conn_err = DEF_YES;
+    }
+
+
+    if (conn_err != DEF_NO) {                                       /* If any errs, free transport conn (see Note #3).  */
+#ifdef  NET_IP_MODULE_EN
+#ifdef  NET_TCP_MODULE_EN
+        NetTCP_ConnFree((NET_TCP_CONN_ID)conn_id_transport);
+#endif
+
+#else                                                               /* See Note #2.                                     */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidFamilyCtr);
+       *p_err =  NET_SOCK_ERR_INVALID_FAMILY;
+#endif
+
+        return (NET_CONN_ID_NONE);
+    }
+
+
+   *p_err =  NET_SOCK_ERR_NONE;
+
+    return (conn_id_transport);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_CloseHandler()
+*
+* Description : (1) Close a socket for valid socket close operations :
+*
+*                   (a) Close socket
+*                   (b) Free  socket
+*
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_Close(),
+*                                                 NetSock_CloseHandlerStream(),
+*                                                 NetSock_CloseSockFromClose(),
+*                                                 various.
+*
+*               close_conn              Indicate whether to close network   connection (see Note #2) :
+*
+*                                           DEF_YES                    Close network   connection.
+*                                           DEF_NO              Do NOT close network   connection.
+*
+*               close_conn_transport    Indicate whether to close transport connection (see Note #2) :
+*
+*                                           DEF_YES                    Close transport connection.
+*                                           DEF_NO              Do NOT close transport connection.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Close(),
+*               NetSock_CloseHandlerStream(),
+*               NetSock_CloseSockFromClose(),
+*               various.
+*
+* Note(s)     : (2) Except when closed from the network connection layer, a socket SHOULD close its
+*                   network connection(s).
+*
+*                   See also 'NetSock_CloseSockHandler()  Note #2a'.
+*
+*               (3) On any socket close handler error(s), socket already discarded in close handler
+*                   (see 'NetSock_FreeHandler()  Note #3').
+*
+*                   See also 'NetSock_Close()  Note #2'.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_CloseHandler (NET_SOCK     *p_sock,
+                                    CPU_BOOLEAN   close_conn,
+                                    CPU_BOOLEAN   close_conn_transport)
+{
+    NET_ERR  err;
+
+                                                                /* ------------------- CLOSE SOCK --------------------- */
+    NetSock_CloseSockHandler(p_sock, close_conn, close_conn_transport, &err);
+    if (err != NET_SOCK_ERR_NONE) {                             /* See Note #3.                                         */
+        return;
+    }
+                                                                /* -------------------- FREE SOCK --------------------- */
+    NetSock_Free(p_sock);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetSock_CloseSock()
+*
+* Description : (1) Close a socket due to socket connection fault(s) :
+*
+*                   (a) Update socket close statistic(s)
+*                   (b) Close  socket
+*
+*
+*               (2) (a) Socket connection closed when :
+*
+*                       (1) Socket parameters are corrupted :
+*                           (A) Family
+*                           (B) Protocol
+*                           (C) Type
+*                           (D) State
+*
+*                       (2) Certain valid socket operations fail
+*
+*                       (3) Socket connection(s) close internally (see Note #1c)
+*
+*                           See also 'NetSock_CloseFromConn()  Note #1'.
+*
+*                   (b) Frees socket resources, closes socket connection(s), & returns socket to CLOSED
+*                       state -- but does NOT free the socket since NO mechanism or API exists to close
+*                       an application's reference to the socket.
+*
+*                       When a socket is internally closed, ALL application-to-socket access fails &
+*                       forces the application to close the socket.
+*
+*                   (c) #### When socket connection operations fail & close the socket, the socket MUST
+*                       abort continued/further socket operations.  In other words, when certain fatal
+*                       socket errors are returned, the application MUST immediately close the socket :
+*
+*                       (1) NET_SOCK_ERR_NOT_USED
+*                       (2) NET_SOCK_ERR_INVALID_FAMILY
+*                       (3) NET_SOCK_ERR_INVALID_PROTOCOL
+*                       (4) NET_SOCK_ERR_INVALID_TYPE
+*                       (5) NET_SOCK_ERR_INVALID_STATE
+*                       (6) NET_SOCK_ERR_FAULT
+*
+*                       See also 'NetSock_Close()  Note #2'.
+*
+*
+* Argument(s) : p_sock                  Pointer to a socket.
+*               ------                  Argument validated in various.
+*
+*               close_conn              Indicate whether to close network   connection (see Note #3) :
+*
+*                                           DEF_YES                    Close network   connection.
+*                                           DEF_NO              Do NOT close network   connection.
+*
+*               close_conn_transport    Indicate whether to close transport connection (see Note #3) :
+*
+*                                           DEF_YES                    Close transport connection.
+*                                           DEF_NO              Do NOT close transport connection.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various,
+*               NetSock_CloseFromConn().
+*
+* Note(s)     : (3) Except when closed from the network connection layer, a socket SHOULD close its
+*                   network connection(s).
+*
+*                   See also 'NetSock_CloseSockHandler()  Note #2a'.
+*
+*               (4) If socket close handler fails, socket already discarded in close handler (see
+*                   'NetSock_FreeHandler()  Note #3').
+*********************************************************************************************************
+*/
+
+static  void  NetSock_CloseSock (NET_SOCK     *p_sock,
+                                 CPU_BOOLEAN   close_conn,
+                                 CPU_BOOLEAN   close_conn_transport)
+{
+    NET_ERR  err;
+
+                                                                /* ---------------- UPDATE CLOSE STATS ---------------- */
+    NET_CTR_ERR_INC(Net_ErrCtrs.Sock.CloseCtr);
+
+
+#ifdef  NET_SECURE_MODULE_EN                                    /* --------------- CLOSE SECURE SESSION --------------- */
+                                                                /* If sock secure, ...                                  */
+    if (DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE) == DEF_YES) {
+        if (DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_SECURE_NEGO) == DEF_YES) {
+            return;
+        } else {
+            NetSecure_SockClose(p_sock, &err);                      /* ... close secure session (see Note #5).              */
+        }
+    }
+#endif
+
+                                                                /* -------------------- CLOSE SOCK -------------------- */
+    NetSock_CloseSockHandler(p_sock, close_conn, close_conn_transport, &err);
+    if (err != NET_SOCK_ERR_NONE) {                             /* See Note #4.                                         */
+        return;
+    }
+                                                                /* Close sock (see Note #2b).                           */
+    p_sock->ProtocolFamily = NET_SOCK_PROTOCOL_FAMILY_NONE;
+    p_sock->Protocol       = NET_SOCK_PROTOCOL_NONE;
+    p_sock->SockType       = NET_SOCK_TYPE_FAULT;
+    p_sock->State          = NET_SOCK_STATE_CLOSED_FAULT;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_CloseSockHandler()
+*
+* Description : (1) Close a socket :
+*
+*                   (a) Close socket secure session                         See Note #5
+*                   (b) Free  socket
+*                   (c) Close socket connection(s)                          See Note #2
+*                   (d) Clear socket connection handle identifier           See Note #2b2
+*
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_CloseHandler(),
+*                                                 NetSock_CloseSockHandler().
+*
+*               close_conn              Indicate whether to close network   connection (see Note #2a) :
+*
+*                                           DEF_YES                    Close network   connection.
+*                                           DEF_NO              Do NOT close network   connection.
+*
+*               close_conn_transport    Indicate whether to close transport connection (see Note #2a) :
+*
+*                                           DEF_YES                    Close transport connection.
+*                                           DEF_NO              Do NOT close transport connection.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection successfully closed.
+*                               NET_SOCK_ERR_NOT_USED           Socket NOT currently used.
+*                               NET_SOCK_ERR_CLOSED             Socket already closed.
+*
+*                                                               -- RETURNED BY NetSock_FreeHandler() : --
+*                               NET_SOCK_ERR_INVALID_TYPE       Socket is NOT a valid socket type.
+*                               NET_SOCK_ERR_CONN_SIGNAL_CLR    Socket connection    signal clear failed.
+*                               NET_SOCK_ERR_RX_Q_SIGNAL_CLR    Socket receive queue signal clear failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CloseHandler(),
+*               NetSock_CloseSock().
+*
+* Note(s)     : (2) (a) When a socket closes, specified socket network connection(s) MAY be closed
+*                       &/or network connection handle identifier(s) MAY be cleared :
+*
+*                       (1) Network   connection
+*                       (2) Transport connection
+*
+*                       See also 'NetSock_CloseHandler()        Note #2',
+*                                'NetSock_CloseSock()           Note #3',
+*                                'NetSock_CloseSockFromClose()  Note #3',
+*                              & 'NetSock_CloseFromConn()       Note #1'.
+*
+*                           (A) A socket may maintain its network connection despite closing the transport
+*                               connection, but a socket MUST NOT close the network connection but expect
+*                               to maintain the transport connection.
+*
+*                           (B) Network connection(s) MAY be closed even if socket close fails (see also
+*                               Note #4).
+*
+*                   (b) Socket's network connection handle identifier MUST be :
+*
+*                       (1) Obtained PRIOR to any socket free operation
+*                       (2) Cleared  after :
+*                           (A) Socket connection(s) closed
+*                           (B) Socket free handler error(s) handled
+*                                 (see 'NetSock_FreeHandler()  Note #3')
+*
+*               (3) #### To prevent closing a socket already closed via previous socket close,
+*                   NetSock_CloseSockHandler() checks the socket's 'USED' flag BEFORE closing
+*                   the socket.
+*
+*                   This prevention is only best-effort since any invalid duplicate socket closes
+*                   MAY be asynchronous to potentially valid socket opens.  Thus the invalid socket
+*                   close(s) MAY corrupt the socket's valid operation(s).
+*
+*                   However, since the primary tasks of the network protocol suite are prevented
+*                   from running concurrently (see 'net.h  Note #3'), it is NOT necessary to protect
+*                   socket resources from possible corruption since no asynchronous access from
+*                   other network tasks is possible.
+*
+*               (4) On any socket close handler error(s), socket already discarded in close handler
+*                   (see 'NetSock_FreeHandler()  Note #3a').
+*
+*                   See also 'NetSock_Close()  Note #2'.
+*
+*               (5) If the socket is secure, secure session MUST be closed before closing the socket.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_CloseSockHandler (NET_SOCK     *p_sock,
+                                        CPU_BOOLEAN   close_conn,
+                                        CPU_BOOLEAN   close_conn_transport,
+                                        NET_ERR      *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN  used;
+#endif
+    NET_CONN_ID  conn_id;
+
+                                                                /* --------------- VALIDATE SOCK CLOSE ---------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    used = DEF_BIT_IS_SET(p_sock->Flags, NET_SOCK_FLAG_SOCK_USED);
+    if (used != DEF_YES) {                                      /* If sock NOT used, ...                                */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Sock.NotUsedCtr);
+       *p_err = NET_SOCK_ERR_NOT_USED;                          /* ... rtn but do NOT close (see Note #3).              */
+        return;
+    }
+#endif
+
+    switch (p_sock->State) {
+        case NET_SOCK_STATE_NONE:
+        case NET_SOCK_STATE_CLOSED:
+        case NET_SOCK_STATE_CLOSE_IN_PROGRESS:
+        case NET_SOCK_STATE_CLOSING_DATA_AVAIL:
+        case NET_SOCK_STATE_BOUND:
+        case NET_SOCK_STATE_LISTEN:
+        case NET_SOCK_STATE_CONN:
+        case NET_SOCK_STATE_CONN_IN_PROGRESS:
+        case NET_SOCK_STATE_CONN_DONE:
+        default:
+             break;
+
+                                                                /* Sock NOT re-closed if already free/closed.           */
+        case NET_SOCK_STATE_FREE:
+        case NET_SOCK_STATE_DISCARD:
+            *p_err = NET_SOCK_ERR_NOT_USED;
+             return;
+
+
+        case NET_SOCK_STATE_CLOSED_FAULT:
+            *p_err = NET_SOCK_ERR_NONE;
+             return;
+    }
+
+
+
+                                                                /* -------------------- FREE SOCK --------------------- */
+    conn_id = p_sock->ID_Conn;                                  /* Get sock's net conn id  (see Note #2b1).             */
+    NetSock_FreeHandler(p_sock, p_err);
+
+                                                                /* ------------------ CLOSE CONN(S) ------------------- */
+    if (close_conn == DEF_YES) {                                /* If req'd, close conn(s) [see Note #2a].              */
+        NetConn_CloseFromApp(conn_id, close_conn_transport);
+    }
+
+                                                                /* Chk free err(s) AFTER conn close(s) [see Note #2aB]. */
+    if (*p_err != NET_SOCK_ERR_NONE) {                          /* On  free err(s), abort sock close   (see Note #4).   */
+         return;
+    }
+
+                                                                /* ------------------ CLR SOCK CONN ------------------- */
+    p_sock->ID_Conn = NET_CONN_ID_NONE;                         /* Clr sock's net conn id (see Note #2b2).              */
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetSock_CloseSockFromClose()
+*
+* Description : (1) Close a socket due to socket close/closing faults :
+*
+*                   (a) Update socket close statistic(s)
+*                   (b) Close  socket
+*
+*
+*               (2) (a) (1) MUST ONLY be called by socket closing functions (see Note #2b).
+*
+*                       (2) Close socket connection for the following socket close/closing faults :
+*
+*                           (A) Socket close parameters are corrupted :
+*                               (1) Type
+*                               (2) State
+*
+*                   (b) Frees socket resources, closes socket connection(s), returns socket to CLOSED
+*                       state AND frees the socket since the close was initiated by the application.
+*
+*                       See also 'NetSock_CloseHandler()  Note #1'.
+*
+*                   See also 'NetSock_CloseSock()  Note #2'.
+*
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_Close(),
+*                                                 NetSock_CloseHandlerStream().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Close(),
+*               NetSock_CloseHandlerStream().
+*
+* Note(s)     : (3) A socket closing with fault(s) SHOULD close its network connection(s).
+*
+*                   See also 'NetSock_CloseSockHandler()  Note #2a'.
+*
+*               (4) If socket close handler fails, socket already discarded in close handler (see
+*                   'NetSock_FreeHandler()  Note #3').
+*
+*                   See also 'NetSock_Close()  Note #2'.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_CloseSockFromClose (NET_SOCK  *p_sock)
+{
+                                                                /* ---------------- UPDATE CLOSE STATS ---------------- */
+    NET_CTR_ERR_INC(Net_ErrCtrs.Sock.CloseCtr);
+                                                                /* -------------------- CLOSE SOCK -------------------- */
+    NetSock_CloseHandler(p_sock, DEF_YES, DEF_YES);             /* See Note #3.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetSock_CloseConn()
+*
+* Description : (1) Close a socket's network connection(s) :
+*
+*                   (a) Remove connection handle identifier from socket's connection accept queue
+*                   (b) Close  network connection(s)
+*
+*
+*               (2) Closes socket network connection(s) ONLY; does NOT free or close socket(s).
+*
+*
+* Argument(s) : conn_id     Handle identifier of network connection to close.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_RxPktDemux(),
+*               NetSock_Accept().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (defined(NET_SOCK_TYPE_STREAM_MODULE_EN) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN  == DEF_ENABLED))
+static  void  NetSock_CloseConn (NET_CONN_ID  conn_id)
+{
+    NetSock_CloseConnFree(conn_id);
+    NetConn_CloseFromApp(conn_id, DEF_YES);                     /* See Note #1b.                                        */
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetSock_CloseConnFree()
+*
+* Description : Close/free network connection from socket.
+*
+* Argument(s) : conn_id     Handle identifier of network connection.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CloseConn().
+*
+* Note(s)     : (1) Network connections are de-referenced from cloned socket application connections.
+*
+*                   See also 'NetSock_FreeConnFromSock()  Note #2b'.
+*********************************************************************************************************
+*/
+
+#if (defined(NET_SOCK_TYPE_STREAM_MODULE_EN) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN  == DEF_ENABLED))
+static  void  NetSock_CloseConnFree (NET_CONN_ID  conn_id)
+{
+    NET_SOCK_ID  sock_id;
+    NET_ERR      err;
+
+                                                                    /* ----------------- GET SOCK ID ------------------ */
+    sock_id = (NET_SOCK_ID)NetConn_ID_AppCloneGet(conn_id, &err);   /* Get clone sock app conn (see Note #1).           */
+    if (err != NET_CONN_ERR_NONE) {
+        return;
+    }
+                                                                    /* ------------- FREE CONN FROM SOCK -------------- */
+    NetSock_FreeConnFromSock(sock_id, conn_id);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_Free()
+*
+* Description : (1) Free a socket :
+*
+*                   (a) Remove connnection id from parent socket accept queue
+*                   (b) Clear  socket controls
+*                   (b) Free   socket back to socket pool
+*                   (c) Update socket pool statistics
+*
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_Close(),
+*                                                 NetSock_CloseHandler(),
+*                                                 NetSock_CloseHandlerStream().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Close(),
+*               NetSock_CloseHandler(),
+*               NetSock_CloseHandlerStream().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_Free (NET_SOCK  *p_sock)
+{
+    NET_ERR    err;
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NET_SOCK  *p_sock_parent;
+
+
+    if (p_sock->ID_SockParent != NET_SOCK_ID_NONE) {
+                                                                /* ----- REMOVE CONN ID FROM PARENT CONN ACCEPT Q ----- */
+        p_sock_parent = &NetSock_Tbl[p_sock->ID_SockParent];
+        p_sock_parent->ConnChildQ_SizeCur--;                    /* Dec conn accept Q cur size.                          */
+    }
+
+    p_sock->ID_SockParent = NET_SOCK_ID_NONE;
+#endif
+
+                                                                /* --------------------- CLR SOCK --------------------- */
+#ifdef  NET_SECURE_MODULE_EN
+    if (p_sock->SecureSession != DEF_NULL)  {
+        NetSecure_SockClose(p_sock, &err);
+    }
+    p_sock->SecureSession = (void *)0;                          /* Clr secure session.                                  */
+#endif
+
+    p_sock->State = NET_SOCK_STATE_FREE;                        /* Set sock as freed/NOT used.                          */
+    DEF_BIT_CLR(p_sock->Flags, NET_SOCK_FLAG_SOCK_USED);
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+    NetSock_Clr(p_sock);
+#endif
+
+                                                                /* -------------------- FREE SOCK --------------------- */
+    p_sock->NextPtr  = NetSock_PoolPtr;
+    NetSock_PoolPtr = p_sock;
+
+                                                                /* -------------- UPDATE SOCK POOL STATS -------------- */
+    NetStat_PoolEntryUsedDec(&NetSock_PoolStat, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetSock_FreeHandler()
+*
+* Description : (1) Free a socket :
+*
+*                   (a) Free  socket address                                    See Note #2
+*                   (b) Clear socket connection
+*                   (c) Free  socket packet buffer queues
+*
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument checked in NetSock_CloseSockHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function
+*                               (see Note #3) :
+*
+*                               NET_SOCK_ERR_NONE               Socket connection successfully freed.
+*                               NET_SOCK_ERR_INVALID_TYPE       Socket is NOT a valid socket type.
+*
+*                                                               --- RETURNED BY NetSock_ConnReqClr() : ----
+*                                                               - RETURNED BY NetSock_ConnAcceptQ_Clr() : -
+*                                                               -- RETURNED BY NetSock_ConnCloseClr() : ---
+*                               NET_SOCK_ERR_CONN_SIGNAL_CLR    Socket connection    signal clear failed.
+*
+*                                                               ----- RETURNED BY NetSock_RxQ_Clr() : -----
+*                               NET_SOCK_ERR_RX_Q_SIGNAL_CLR    Socket receive queue signal clear failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CloseSockHandler().
+*
+* Note(s)     : (2) Since connection address information is required to free the socket address,
+*                   the socket address MUST be freed PRIOR to the network connection.
+*
+*                   See also 'NetSock_FreeAddr()  Note #1'
+*                          & 'NetSock_CloseSockHandler()  Notes #1a & #1b'.
+*
+*               (3) (a) On ANY free socket connection handler error, socket is discarded & caller
+*                       function MUST NOT further handle or re-discard the socket.
+*
+*                   (b) ALL network resources linked to the socket MUST be freed PRIOR to socket
+*                       free or discard so that no network resources are lost.
+*
+*                   (c) Error code returned by 'p_err' for a socket discard refers to the last
+*                       free socket error ONLY.
+*
+*               (4) See 'net_sock.h  NETWORK SOCKET DATA TYPE  Note #2'.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_FreeHandler (NET_SOCK  *p_sock,
+                                   NET_ERR   *p_err)
+{
+    CPU_BOOLEAN  discard;
+    NET_ERR      err_discard = NET_ERR_FAULT_UNKNOWN_ERR;
+    NET_ERR      err;
+
+
+                                                                /* ------------------ CLR SOCK CONN ------------------- */
+    discard = DEF_NO;
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NetSock_ConnReqAbort(p_sock, &err);                         /* Abort wait on sock conn req.                         */
+
+    NetSock_ConnReqClr(p_sock, &err);
+    if (err != NET_SOCK_ERR_NONE) {                             /* If  sock conn req    NOT clr'd, ...                  */
+        discard     = DEF_YES;                                  /* ... discard sock (see Note #3b).                     */
+        err_discard = err;
+    }
+
+    NetSock_ConnAcceptQ_Abort(p_sock, &err);                    /* Abort wait on sock conn accept Q.                    */
+
+    NetSock_ConnAcceptQ_Clr(p_sock);                            /* Clr sock conn accept Q.                              */
+    NetSock_ConnAcceptQ_SemClr(p_sock, &err);
+    if (err != NET_SOCK_ERR_NONE) {                             /* If  sock conn accept Q NOT clr'd, ...                */
+        discard     = DEF_YES;                                  /* ... discard sock (see Note #3b).                     */
+        err_discard = err;
+    }
+
+    NetSock_ConnCloseAbort(p_sock, &err);                       /* Abort wait on sock conn close.                       */
+
+    NetSock_ConnCloseClr(p_sock, &err);
+    if (err != NET_SOCK_ERR_NONE) {                             /* If  sock conn close  NOT clr'd, ...                  */
+        discard     = DEF_YES;                                  /* ... discard sock (see Note #3b).                     */
+        err_discard = err;
+    }
+#endif
+
+
+                                                                /* FREE SOCK Q's                                        */
+    NetSock_FreeBufQ(&p_sock->RxQ_Head, &p_sock->RxQ_Tail);
+#if 0                                                           /* See Note #4.                                         */
+    NetSock_FreeBufQ(&p_sock->TxQ_Head, &p_sock->TxQ_Tail);
+#endif
+
+    NetSock_RxQ_Abort(p_sock, &err);                            /* Abort wait on sock rx Q.                             */
+
+    NetSock_RxQ_Clr(p_sock, &err);                              /* Clr sock rx Q.                                       */
+    if (err != NET_SOCK_ERR_NONE) {                             /* If  sock rx Q NOT clr'd, ...                         */
+        discard     = DEF_YES;                                  /* ... discard sock (see Note #3b).                     */
+        err_discard = err;
+    }
+
+
+                                                                /* -------------- DISCARD SOCK ON ERR(S) -------------- */
+    if (discard != DEF_NO) {                                    /* On sock free err(s), ...                             */
+        p_sock->State = NET_SOCK_STATE_DISCARD;
+        NetSock_Discard(p_sock);                                /* ... discard sock (see Note #3a).                     */
+       *p_err = err_discard;                                    /* See Note #3c.                                        */
+        return;
+    }
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetSock_FreeBufQ()
+*
+* Description : Free a socket's buffer queue.
+*
+* Argument(s) : p_buf_q_head     Pointer to a socket buffer queue's head pointer.
+*
+*               p_buf_q_tail     Pointer to a socket buffer queue's tail pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_FreeHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_FreeBufQ (NET_BUF  **p_buf_q_head,
+                                NET_BUF  **p_buf_q_tail)
+{
+    NET_BUF  *p_buf_q;
+
+                                                                /* Free buf Q.                                          */
+    p_buf_q = *p_buf_q_head;
+   (void)NetBuf_FreeBufQ_PrimList((NET_BUF *)p_buf_q,
+                                  (NET_CTR *)0);
+                                                                /* Clr  buf Q ptrs to NULL.                             */
+   *p_buf_q_head = (NET_BUF *)0;
+   *p_buf_q_tail = (NET_BUF *)0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetSock_Clr()
+*
+* Description : Clear socket controls.
+*
+* Argument(s) : p_sock      Pointer to a socket.
+*               ------      Argument validated in NetSock_Init(),
+*                                                 NetSock_Get(),
+*                                                 NetSock_Free().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Init(),
+*               NetSock_Get(),
+*               NetSock_Free().
+*
+* Note(s)     : (1) See 'net_sock.h  NETWORK SOCKET DATA TYPE  Note #2'.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_Clr (NET_SOCK  *p_sock)
+{
+#if ( defined(NET_SOCK_TYPE_STREAM_MODULE_EN) && \
+     (NET_DBG_CFG_MEM_CLR_EN  == DEF_ENABLED))
+    //NET_CONN_ID      *p_conn_id;
+    //NET_SOCK_Q_SIZE   i;
+#endif
+    NET_ERR           err;
+
+
+    p_sock->NextPtr          = (NET_SOCK *)0;
+    p_sock->RxQ_Head         = (NET_BUF  *)0;
+    p_sock->RxQ_Tail         = (NET_BUF  *)0;
+#if 0                                                           /* See Note #1.                                         */
+    p_sock->TxQ_Head         = (NET_BUF  *)0;
+    p_sock->TxQ_Tail         = (NET_BUF  *)0;
+#endif
+
+    p_sock->RxQ_SizeCfgd     =  NET_SOCK_CFG_RX_Q_SIZE_OCTET;
+    p_sock->RxQ_SizeCur      =  0;
+    p_sock->TxQ_SizeCfgd     =  NET_SOCK_CFG_TX_Q_SIZE_OCTET;
+#if 0                                                           /* See Note #1.                                         */
+    p_sock->TxQ_SizeCur      =  0;
+#endif
+
+    p_sock->ID_Conn          =  NET_CONN_ID_NONE;
+    p_sock->ProtocolFamily   =  NET_SOCK_PROTOCOL_FAMILY_NONE;
+    p_sock->Protocol         =  NET_SOCK_PROTOCOL_NONE;
+    p_sock->SockType         =  NET_SOCK_TYPE_NONE;
+
+#ifdef  NET_SECURE_MODULE_EN
+    p_sock->SecureSession    = (void *)0;
+#endif
+
+    p_sock->State            =  NET_SOCK_STATE_FREE;
+    p_sock->Flags            =  NET_SOCK_FLAG_SOCK_NONE;
+
+#if (NET_SOCK_DFLT_NO_BLOCK_EN == DEF_ENABLED)
+    DEF_BIT_SET(p_sock->Flags,  NET_SOCK_FLAG_SOCK_NO_BLOCK);
+#endif
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+                                                                /* ------------ CLR SOCK CONN ACCEPT Q VALS ----------- */
+    p_sock->ConnAcceptQ_SizeMax = NET_SOCK_Q_SIZE_NONE;
+    p_sock->ConnAcceptQ_SizeCur = 0u;
+
+    p_sock->ConnChildQ_SizeMax  = NET_SOCK_Q_SIZE_UNLIMITED;
+    p_sock->ConnChildQ_SizeCur  = 0u;
+
+    SList_Init(&p_sock->ConnAcceptQ_Ptr);
+#endif
+
+                                                                /* ------------ CFG SOCK DFLT TIMEOUT VALS ------------ */
+    NetSock_RxQ_TimeoutDflt(p_sock, &err);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NetSock_ConnReqTimeoutDflt(p_sock, &err);
+    NetSock_ConnAcceptQ_TimeoutDflt(p_sock, &err);
+    NetSock_ConnCloseTimeoutDflt(p_sock, &err);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_Copy()
+*
+* Description : Copy a socket.
+*
+* Argument(s) : p_sock_dest      Pointer to socket to receive socket copy.
+*               -----------      Argument validated in NetSock_Accept().
+*
+*               p_sock_src       Pointer to socket to copy.
+*               ----------       Argument validated in NetSock_Accept().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Accept().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  void  NetSock_Copy (NET_SOCK  *p_sock_dest,
+                            NET_SOCK  *p_sock_src)
+{
+    p_sock_dest->ProtocolFamily = p_sock_src->ProtocolFamily;
+    p_sock_dest->Protocol       = p_sock_src->Protocol;
+    p_sock_dest->SockType       = p_sock_src->SockType;
+
+    p_sock_dest->ID_Conn        = p_sock_src->ID_Conn;
+
+    p_sock_dest->State          = p_sock_src->State;
+
+    p_sock_dest->Flags          = p_sock_src->Flags;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_Discard()
+*
+* Description : (1) Discard an invalid/corrupted socket :
+*
+*                   (a) Discard socket from available socket pool               See Note #2
+*                   (b) Update  socket pool statistics
+*
+*               (2) Assumes socket is invalid/corrupt & MUST be removed.  Socket removed simply by NOT
+*                   returning the socket back to the socket pool.
+*
+*
+* Argument(s) : p_sock       Pointer to an invalid/corrupted socket.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Get(),
+*               NetSock_FreeHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetSock_Discard (NET_SOCK  *p_sock)
+{
+    NET_ERR  err;
+
+                                                                /* ------------------- DISCARD SOCK ------------------- */
+   (void)&p_sock;                                                /* Prevent 'variable unused' warning (see Note #2).     */
+
+                                                                /* --------------- UPDATE DISCARD STATS --------------- */
+    NetStat_PoolEntryLostInc(&NetSock_PoolStat, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_RandomPortNbrGet()
+*
+* Description : Get a random port number from the random port number queue.
+*
+*               (1) Random port number queue is a FIFO Q implemented as a circular ring array :
+*
+*                   (a) 'NetSock_RandomPortNbrQ_HeadIx' points to the next available port number.
+*
+*                   (b) 'NetSock_RandomPortNbrQ_TailIx' points to the next available queue entry
+*                       to insert freed port numbers.
+*
+*                   (c) 'NetSock_RandomPortNbrQ_HeadIx'/'NetSock_RandomPortNbrQ_TailIx' advance :
+*
+*                       (1) By increment;
+*                       (2) Reset to minimum index value when maximum index value reached.
+*
+*
+*                                  Index to next available
+*                                 port number in random port     Index to next available
+*                                       number queue            entry to free port number
+*                                      (see Note #1a)                (see Note #1b)
+*
+*                                             |                             |
+*                                             |                             |
+*                                             v                             v
+*                              -------------------------------------------------------
+*                              |     |     |     |     |     |     |     |     |     |
+*                              |     |     |     |     |     |     |     |     |     |
+*                              |     |     |     |     |     |     |     |     |     |
+*                              -------------------------------------------------------
+*
+*                                                    ---------->
+*                                               FIFO indices advance by
+*                                              increment (see Note #1c1)
+*
+*                              |                                                     |
+*                              |<-------------- Circular Ring FIFO Q --------------->|
+*                              |                   (see Note #1)                     |
+*
+*
+* Argument(s) : p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE                   Port number successfully retrieved.
+*                               NET_SOCK_ERR_PORT_NBR_NONE_AVAIL    Port number NOT available.
+*
+* Return(s)   : Random port number,     if NO error(s).
+*
+*               NET_SOCK_PORT_NBR_NONE, otherwise.
+*
+* Caller(s)   : NetSock_BindHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_PORT_NBR  NetSock_RandomPortNbrGet (NET_PROTOCOL_TYPE   protocol,
+                                                NET_ERR            *p_err)
+{
+    CPU_BOOLEAN   used     = DEF_YES;
+    NET_PORT_NBR  port_nbr = NetSock_RandomPortNbrCur;
+
+
+
+    while ((used     == DEF_YES) ||
+           (port_nbr == NET_SOCK_PORT_NBR_RANDOM_MAX)) {
+
+        used = NetConn_IsPortUsed(port_nbr, protocol, p_err);
+        if (*p_err != NET_CONN_ERR_NONE) {
+             goto exit;
+        }
+
+        if ((used     == DEF_YES)                      ||
+            (port_nbr == NET_SOCK_PORT_NBR_RANDOM_MAX)) {
+
+            NetSock_RandomPortNbrCur = (NET_PORT_NBR)NetUtil_RandomRangeGet(NET_SOCK_PORT_NBR_RANDOM_MIN,
+                                                                            NET_SOCK_PORT_NBR_RANDOM_MAX);
+
+            port_nbr = NetSock_RandomPortNbrCur;
+            used     = DEF_YES;
+        }
+    }
+
+    NetSock_RandomPortNbrCur++;
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+exit:
+    return (port_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetSock_OpGetSock()
+*
+* Description : Get the specified socket option from the p_sock socket.
+*
+* Argument(s) : p_sock       Pointer to socket to get the option from.
+*
+*               opt         Socket option to get the   value.
+*
+*               p_opt_val    Pointer to a socket option value buffer.
+*
+*               p_opt_len    Pointer to a socket option value buffer length.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               No error.
+*
+*                               NET_SOCK_ERR_INVALID_OPT        Socket option not supported.
+*                               NET_SOCK_ERR_INVALID_ARG        One of the argument supplied is NULL or invalid.
+*                               NET_SOCK_ERR_INVALID_OPT_LEN    p_opt_len is not large enough for the return option value size.
+*                               NET_SOCK_ERR_INVALID_OPT_GET    An error occured while getting the socket option.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE,    if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_OPT_GET, otherwise.
+*
+* Caller(s)   : NetSock_OptGet().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) The supported options are:
+*
+*                   (a) Level NET_SOCK_PROTOCOL_SOCK:
+*
+*                       Option name                     Returned data type    Option decription
+*                       -----------------------------   ------------------    ------------------
+*                       NET_SOCK_OPT_SOCK_TYPE          NET_SOCK_TYPE         Socket type:
+*                                                                                 NET_SOCK_TYPE_STREAM
+*                                                                                 NET_SOCK_TYPE_DATAGRAM
+*
+*                       NET_SOCK_OPT_SOCK_KEEP_ALIVE    CPU_BOOLEAN           Socket keep-alive status:
+*                                                                                 DEF_ENABLED
+*                                                                                 DEF_DISABLED
+*
+*                       NET_SOCK_OPT_SOCK_ACCEPT_CONN   CPU_BOOLEAN           Socket is in listen state:
+*                                                                                 DEF_YES
+*                                                                                 DEF_NO
+*
+*                       NET_SOCK_OPT_SOCK_TX_BUF_SIZE   NET_TCP_WIN_SIZE      TCP connection transmit windows size  value
+*                       NET_SOCK_OPT_SOCK_RX_BUF_SIZE   NET_TCP_WIN_SIZE      TCP connection receive  windows size  value
+*                       NET_SOCK_OPT_SOCK_TX_TIMEOUT    CPU_INT32U            TCP connection transmit queue timeout value
+*                       NET_SOCK_OPT_SOCK_RX_TIMEOUT    CPU_INT32U            TCP connection receive  queue timeout value
+*
+*               (2) NetLock must be aquired before calling this function.
+*********************************************************************************************************
+*/
+
+static  NET_SOCK_RTN_CODE  NetSock_OpGetSock(NET_SOCK           *p_sock,
+                                             NET_SOCK_OPT_NAME   opt_name,
+                                             void               *p_opt_val,
+                                             NET_SOCK_OPT_LEN   *p_opt_len,
+                                             NET_ERR            *p_err)
+{
+#ifdef  NET_TCP_MODULE_EN
+    NET_TCP_CONN  *p_conn;
+    NET_CONN_ID    conn_id;
+    NET_CONN_ID    conn_id_transport;
+    CPU_INT32U     timeout_ms;
+    CPU_BOOLEAN    sock_listen;
+#endif
+
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+    switch (p_sock->SockType) {
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+         case NET_SOCK_TYPE_STREAM:
+              switch (p_sock->Protocol) {
+#ifdef  NET_TCP_MODULE_EN
+                  case NET_SOCK_PROTOCOL_TCP:
+                       conn_id           = p_sock->ID_Conn;
+                       conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+                       if (*p_err != NET_CONN_ERR_NONE) {
+                           return (NET_SOCK_BSD_ERR_OPT_GET);
+                       }
+
+                      (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                              (NET_ERR       *)p_err);
+                       if (*p_err != NET_TCP_ERR_NONE) {
+                           return (NET_SOCK_BSD_ERR_OPT_GET);
+                       }
+
+                      *p_err = NET_SOCK_ERR_NONE;
+
+                       switch(opt_name) {
+                           case NET_SOCK_OPT_SOCK_TYPE:
+                                if (*p_opt_len < (CPU_INT32S)sizeof(NET_SOCK_TYPE)) {
+                                    *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                                     break;
+                                }
+
+                               *p_opt_len = sizeof(NET_SOCK_TYPE);
+
+                                Mem_Copy(             p_opt_val,
+                                         (void     *)&p_sock->SockType,
+                                         (CPU_SIZE_T)*p_opt_len);
+                                break;
+
+
+                           case NET_SOCK_OPT_SOCK_TX_BUF_SIZE:
+                                if (*p_opt_len < (CPU_INT32S)sizeof(NET_TCP_WIN_SIZE)) {
+                                    *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                                     break;
+                                }
+
+                               *p_opt_len =  sizeof(NET_TCP_WIN_SIZE);
+                                p_conn    = &NetTCP_ConnTbl[conn_id_transport];
+
+                                Mem_Copy(             p_opt_val,
+                                         (void     *)&p_conn->TxWinSizeCfgd,
+                                         (CPU_SIZE_T)*p_opt_len);
+                                break;
+
+
+                           case NET_SOCK_OPT_SOCK_RX_BUF_SIZE:
+                                if (*p_opt_len < (CPU_INT32S)sizeof(NET_TCP_WIN_SIZE)) {
+                                    *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                                     break;
+                                }
+
+                               *p_opt_len =  sizeof(NET_TCP_WIN_SIZE);
+                                p_conn    = &NetTCP_ConnTbl[conn_id_transport];
+
+                                Mem_Copy(             p_opt_val,
+                                         (void     *)&p_conn->RxWinSizeCfgd,
+                                         (CPU_SIZE_T)*p_opt_len);
+                                break;
+
+
+                           case NET_SOCK_OPT_SOCK_TX_TIMEOUT:
+                                if (*p_opt_len < (CPU_INT32S)sizeof(CPU_INT32U)) {
+                                    *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                                     break;
+                                }
+
+                               *p_opt_len  =  sizeof(CPU_INT32U);
+                                timeout_ms = NetTCP_TxQ_TimeoutGet_ms(conn_id_transport, p_err);
+                                if (*p_err != NET_TCP_ERR_NONE) {
+                                    *p_err  = NET_SOCK_ERR_NOT_USED;
+                                     goto exit;
+                                }
+
+                                Mem_Copy(             p_opt_val,
+                                         (void     *)&timeout_ms,
+                                         (CPU_SIZE_T)*p_opt_len);
+
+                                break;
+
+
+                           case NET_SOCK_OPT_SOCK_RX_TIMEOUT:
+                                if (*p_opt_len < (CPU_INT32S)sizeof(CPU_INT32U)) {
+                                    *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                                     break;
+                                }
+
+                               *p_opt_len  =  sizeof(CPU_INT32U);
+                                timeout_ms = NetTCP_RxQ_TimeoutGet_ms(conn_id_transport, p_err);
+                                if (*p_err != NET_TCP_ERR_NONE) {
+                                    *p_err  = NET_SOCK_ERR_NOT_USED;
+                                     goto exit;
+                                }
+
+                                Mem_Copy((void     *) p_opt_val,
+                                         (void     *)&timeout_ms,
+                                         (CPU_SIZE_T)*p_opt_len);
+                                break;
+
+
+                           case NET_SOCK_OPT_SOCK_ACCEPT_CONN:
+                                if (*p_opt_len < (CPU_INT32S)sizeof(CPU_BOOLEAN)) {
+                                    *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                                     break;
+                                }
+
+                                sock_listen = (p_sock->State == NET_SOCK_STATE_LISTEN);
+                               *p_opt_len    =  sizeof(CPU_BOOLEAN);
+
+                                Mem_Copy(             p_opt_val,
+                                         (void     *)&sock_listen,
+                                         (CPU_SIZE_T)*p_opt_len);
+
+                                break;
+
+
+                           case NET_SOCK_OPT_SOCK_KEEP_ALIVE:
+                                if (*p_opt_len < (CPU_INT32S)sizeof(CPU_BOOLEAN)) {
+                                    *p_err = NET_SOCK_ERR_INVALID_OPT_LEN;
+                                     break;
+                                }
+
+                                conn_id           =  p_sock->ID_Conn;
+                                conn_id_transport =  NetConn_ID_TransportGet(conn_id, p_err);
+                                p_conn             = &NetTCP_ConnTbl[conn_id_transport];
+                               *p_opt_len          =  sizeof(CPU_BOOLEAN);
+
+                                Mem_Copy(             p_opt_val,
+                                         (void     *)&p_conn->TxKeepAliveEn,
+                                         (CPU_SIZE_T)*p_opt_len);
+                                break;
+
+
+                           default:
+                               *p_err = NET_SOCK_ERR_INVALID_OPT;
+                                break;
+                       }
+                       break;
+#endif
+
+                       default:
+                           break;
+                   }
+
+                   break;
+
+#endif
+              default:
+                  *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+                   break;
+          }
+
+
+    goto exit;
+
+exit:
+    if (*p_err != NET_SOCK_ERR_NONE) {
+        return  (NET_SOCK_BSD_ERR_OPT_GET);
+    }
+
+    return (NET_SOCK_BSD_ERR_NONE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetSock_OptSet()
+*
+* Description : Set the specified socket option of the socket to a specified value.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of socket to get option from.
+*
+*               level       Protocol level at which the option resides.
+*
+*               opt         Name of the single option to set.
+*
+*               p_opt_val    Pointer to the value to set to the socket option.
+*
+*               opt_len     Option length.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               No error.
+*
+*                               NET_SOCK_ERR_INVALID_DATA_SIZE  Socket option length does not match the
+*                                                               expected length of the socket option.
+*                               NET_ERR_FAULT_NULL_PTR           p_opt_val is NULL.
+*                               NET_SOCK_ERR_INVALID_OP         Socket option is invalid.
+*
+* Return(s)   : NET_SOCK_BSD_ERR_NONE,    if NO error(s).
+*
+*               NET_SOCK_BSD_ERR_OPT_SET, otherwise.
+*
+* Caller(s)   : setsockopt().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) NetSock_OptSet() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access is
+*                   asynchronous to other network protocol tasks.
+*
+*               (2) The size of the p_opt_val and the value of opt_len must be equal to the size of
+*                   the socket option requested to be set.
+*
+*               (3) The supported options are:
+*
+*                   (a) Level NET_SOCK_PROTOCOL_SOCK:
+*
+*                       Option name                     Returned data type    Option decription
+*                       -----------------------------   ------------------    ------------------
+*                       NET_SOCK_OPT_SOCK_KEEP_ALIVE    CPU_BOOLEAN           Socket keep-alive status:
+*                                                                                 DEF_ENABLED
+*                                                                                 DEF_DISABLED
+*
+*                       NET_SOCK_OPT_SOCK_TX_BUF_SIZE   NET_TCP_WIN_SIZE      TCP connection transmit windows size  value
+*                       NET_SOCK_OPT_SOCK_RX_BUF_SIZE   NET_TCP_WIN_SIZE      TCP connection receive  windows size  value
+*                       NET_SOCK_OPT_SOCK_TX_TIMEOUT    CPU_INT32U            TCP connection transmit queue timeout value
+*                       NET_SOCK_OPT_SOCK_RX_TIMEOUT    CPU_INT32U            TCP connection receive  queue timeout value
+*
+*                   (b) Level NET_SOCK_PROTOCOL_IP:
+*
+*                       Option name                     Returned data type    Option decription
+*                       -----------------------------   ------------------    ------------------
+*                       NET_SOCK_OPT_IP_TOS             NET_IPv4_TOS          TCP connection transmit IP TOS
+*                       NET_SOCK_OPT_IP_TTL             NET_IPv4_TTL          TCP connection transmit IP TTL
+*                       NET_SOCK_OPT_IP_ADD_MEMBERSHIP  NET_IPv4_MREQ         Join  a multicast group
+*                       NET_SOCK_OPT_IP_DROP_MEMBERSHIP NET_IPv4_MREQ         Leave a multicast group
+*
+*                   (c) Level NET_SOCK_PROTOCOL_TCP:
+*
+*                       Option name                     Returned data type    Option decription
+*                       -----------------------------   ------------------    ------------------
+*                       NET_SOCK_OPT_TCP_NO_DELAY       CPU_BOOLEAN           TCP connection transmit Nagle algorithm status:
+*                                                                                 DEF_ENABLED
+*                                                                                 DEF_DISABLED
+*
+*                       NET_SOCK_OPT_TCP_KEEP_CNT       NET_PKT_CTR           TCP keep alive maximum probe value
+*                       NET_SOCK_OPT_TCP_KEEP_IDLE      NET_TCP_TIMEOUT_SEC   TCP keep alive timeout       value (in seconds)
+*                       NET_SOCK_OPT_TCP_KEEP_INTVL     NET_TCP_TIMEOUT_SEC   TCP keep alive probe re-transmit timeout
+*                                                                                                          value (in seconds)
+*********************************************************************************************************
+*/
+
+NET_SOCK_RTN_CODE  NetSock_OptSet (NET_SOCK_ID         sock_id,
+                                   NET_SOCK_PROTOCOL   level,
+                                   NET_SOCK_OPT_NAME   opt_name,
+                                   void               *p_opt_val,
+                                   NET_SOCK_OPT_LEN    opt_len,
+                                   NET_ERR            *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    CPU_INT08U         *p_int08u_val;
+#ifdef NET_IGMP_MODULE_EN
+    NET_IPv4_MREQ      *mcast_info;
+    NET_IPv4_ADDR       mcast_addr;
+    NET_IPv4_ADDR       if_ip_addr;
+    NET_IF_NBR          if_nbr;
+#endif
+#endif
+    NET_SOCK           *p_sock;
+    NET_SOCK_RTN_CODE   rtn_code;
+
+#ifdef  NET_TCP_MODULE_EN
+    NET_CONN_ID         conn_id_transport;
+    CPU_INT16U         *p_int16u_val;
+    CPU_INT32U         *p_int32u_val;
+    CPU_BOOLEAN        *p_bool_val;
+#endif
+                                                                /* -------------- VALIDATE OPTION LEVEL --------------- */
+    switch(opt_name) {
+        case NET_SOCK_OPT_IP_TOS:                               /* IP-level op.                                         */
+        case NET_SOCK_OPT_IP_TTL:
+        case NET_SOCK_OPT_IP_ADD_MEMBERSHIP:
+        case NET_SOCK_OPT_IP_DROP_MEMBERSHIP:
+            if (level != NET_SOCK_PROTOCOL_IP) {
+                *p_err =   NET_SOCK_ERR_INVALID_OPT_LEVEL;
+                 goto exit_lock_fault;                          /* Sock opt incompatible with protocol level.           */
+             }
+             break;
+
+
+        case NET_SOCK_OPT_TCP_NO_DELAY:                         /* TCP-level op.                                        */
+        case NET_SOCK_OPT_TCP_KEEP_CNT:
+        case NET_SOCK_OPT_TCP_KEEP_IDLE:
+        case NET_SOCK_OPT_TCP_KEEP_INTVL:
+             if (level != NET_SOCK_PROTOCOL_TCP) {
+                *p_err =   NET_SOCK_ERR_INVALID_OPT_LEVEL;
+                 goto exit_lock_fault;                          /* Sock opt incompatible with protocol level.           */
+             }
+             break;
+
+
+        case NET_SOCK_OPT_SOCK_TX_BUF_SIZE:                     /* Sock-level op.                                       */
+        case NET_SOCK_OPT_SOCK_RX_BUF_SIZE:
+        case NET_SOCK_OPT_SOCK_TX_TIMEOUT:
+        case NET_SOCK_OPT_SOCK_RX_TIMEOUT:
+        case NET_SOCK_OPT_SOCK_KEEP_ALIVE:
+             if (level != NET_SOCK_PROTOCOL_SOCK) {
+                *p_err =   NET_SOCK_ERR_INVALID_OPT_LEVEL;
+                 goto exit_lock_fault;                          /* Sock opt incompatible with protocol level.           */
+             }
+             break;
+
+
+        default:
+            *p_err  = NET_SOCK_ERR_INVALID_OPT;                 /* Sock opt not supported.                              */
+             goto exit_lock_fault;
+    }
+
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetSock_OptSet, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_err_opt_set;
+    }
+
+    if (p_opt_val == (void *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        goto exit_err_opt_set;
+    }
+#endif
+
+    p_sock = &NetSock_Tbl[sock_id];
+
+    switch (p_sock->SockType) {
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+
+            switch (p_sock->Protocol) {
+#ifdef  NET_TCP_MODULE_EN
+                case NET_SOCK_PROTOCOL_TCP:
+                     conn_id_transport = NetConn_ID_TransportGet(p_sock->ID_Conn, p_err);
+                     if (*p_err != NET_CONN_ERR_NONE) {
+                          goto exit_err_opt_set;
+                     }
+
+                    (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                                             p_err);
+
+                     if (*p_err != NET_TCP_ERR_NONE) {
+                         break;
+                     }
+
+                     switch (opt_name) {
+                         case NET_SOCK_OPT_TCP_NO_DELAY:
+                              if (opt_len != sizeof(CPU_BOOLEAN)) {
+                                 *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                                  break;
+                              }
+
+                              p_bool_val = (CPU_BOOLEAN *)p_opt_val;
+                             (void)NetSock_CfgTxNagleEnHandler(sock_id,
+                                                              *p_bool_val,
+                                                               p_err);
+                              break;
+
+
+                         case NET_SOCK_OPT_SOCK_TX_BUF_SIZE:
+                              if (opt_len != sizeof(NET_TCP_WIN_SIZE)) {
+                                 *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                                  break;
+                              }
+
+                              p_int16u_val = (CPU_INT16U *)p_opt_val;
+                             (void)NetTCP_ConnCfgTxWinSizeHandler(                   conn_id_transport,
+                                                                  (NET_TCP_WIN_SIZE)*p_int16u_val,
+                                                                                     p_err);
+                              if (*p_err == NET_TCP_ERR_NONE) {
+                                  *p_err  = NET_SOCK_ERR_NONE;
+                              }
+                              break;
+
+
+                         case NET_SOCK_OPT_SOCK_TX_TIMEOUT:
+                              if (opt_len != sizeof(CPU_INT32U)) {
+                                 *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                                  break;
+                              }
+
+                              p_int32u_val = (CPU_INT32U *)p_opt_val;
+                             (void)NetTCP_TxQ_TimeoutSet(conn_id_transport,
+                                                        *p_int32u_val,
+                                                         p_err);
+                              if (*p_err == NET_TCP_ERR_NONE) {
+                                  *p_err  = NET_SOCK_ERR_NONE;
+                              }
+                              break;
+
+
+                         case NET_SOCK_OPT_SOCK_RX_BUF_SIZE:
+                              if (opt_len != sizeof(NET_TCP_WIN_SIZE)) {
+                                 *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                                  break;
+                              }
+
+                              p_int16u_val = (CPU_INT16U *)p_opt_val;
+                             (void)NetTCP_ConnCfgRxWinSizeHandler(                   conn_id_transport,
+                                                                  (NET_TCP_WIN_SIZE)*p_int16u_val,
+                                                                                     p_err);
+                              if (*p_err == NET_TCP_ERR_NONE) {
+                                  *p_err  = NET_SOCK_ERR_NONE;
+                              }
+                              break;
+
+
+                         case NET_SOCK_OPT_SOCK_RX_TIMEOUT:
+                              if (opt_len != sizeof(CPU_INT32U)) {
+                                 *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                                  break;
+                              }
+
+                              p_int32u_val = (CPU_INT32U *)p_opt_val;
+                             (void)NetTCP_RxQ_TimeoutSet(conn_id_transport,
+                                                        *p_int32u_val,
+                                                         p_err);
+                              if (*p_err == NET_TCP_ERR_NONE) {
+                                  *p_err  = NET_SOCK_ERR_NONE;
+                              }
+                              break;
+
+
+                         case NET_SOCK_OPT_SOCK_KEEP_ALIVE:
+                              if (opt_len != sizeof(CPU_BOOLEAN)) {
+                                 *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                                  break;
+                              }
+
+                              p_bool_val = (CPU_BOOLEAN *)p_opt_val;
+                             (void)NetTCP_ConnCfgTxKeepAliveEnHandler(conn_id_transport,
+                                                                     *p_bool_val,
+                                                                      p_err);
+                              if (*p_err == NET_TCP_ERR_NONE) {
+                                  *p_err  = NET_SOCK_ERR_NONE;
+                              }
+                              break;
+
+                         case NET_SOCK_OPT_TCP_KEEP_CNT:
+                              if (opt_len != sizeof(NET_PKT_CTR)) {
+                                 *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                                  break;
+                              }
+
+                              p_int16u_val = (CPU_INT16U *)p_opt_val;
+                             (void)NetTCP_ConnCfgTxKeepAliveThHandler(                  conn_id_transport,
+                                                                      (NET_PKT_CTR    )*p_int16u_val,
+                                                                                        p_err);
+                              if (*p_err == NET_TCP_ERR_NONE) {
+                                  *p_err  = NET_SOCK_ERR_NONE;
+                              }
+                              break;
+
+
+                         case NET_SOCK_OPT_TCP_KEEP_IDLE:
+                              if (opt_len != sizeof(NET_TCP_TIMEOUT_SEC)) {
+                                 *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                                  break;
+                              }
+
+                              p_int16u_val = (CPU_INT16U *)p_opt_val;
+
+                              (void)NetTCP_ConnCfgIdleTimeoutHandler(                      conn_id_transport,
+                                                                     (NET_TCP_TIMEOUT_SEC)*p_int16u_val,
+                                                                                           p_err);
+                              if (*p_err == NET_TCP_ERR_NONE) {
+                                  *p_err  = NET_SOCK_ERR_NONE;
+                              }
+                              break;
+
+
+                         case NET_SOCK_OPT_TCP_KEEP_INTVL:
+                              if (opt_len != sizeof(NET_TCP_TIMEOUT_SEC)) {
+                                *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                                 break;
+                              }
+
+                              p_int16u_val = (CPU_INT16U *)p_opt_val;
+                             (void)NetTCP_ConnCfgTxKeepAliveRetryHandler((NET_TCP_CONN_ID    ) conn_id_transport,
+                                                                         (NET_TCP_TIMEOUT_SEC)*p_int16u_val,
+                                                                                               p_err);
+                              if (*p_err == NET_TCP_ERR_NONE) {
+                                  *p_err  = NET_SOCK_ERR_NONE;
+                              }
+                              break;
+
+
+                         default:                               /* Unsupported options.                                 */
+                             *p_err = NET_SOCK_ERR_INVALID_OP;
+                              break;
+                     }
+
+                     break;
+#endif
+
+                case NET_SOCK_PROTOCOL_NONE:
+                default:                                        /* Invalid or unspecified protocol.                     */
+                    *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+                     break;
+             }
+             break;
+#endif
+
+        case NET_SOCK_TYPE_NONE:
+        case NET_SOCK_TYPE_DATAGRAM:
+        default:
+            break;
+    }
+
+
+    switch (opt_name) {                                         /* ----------------- IP-LEVEL OPTIONS ----------------- */
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_OPT_IP_TOS:
+             if (opt_len != sizeof(NET_IPv4_TOS)) {
+                *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                 break;
+             }
+
+             p_int08u_val = p_opt_val;
+             NetConn_IPv4TxTOS_Set(               p_sock->ID_Conn,
+                                   (NET_IPv4_TOS)*p_int08u_val,
+                                                  p_err);
+             if (*p_err == NET_CONN_ERR_NONE) {
+                 *p_err  = NET_SOCK_ERR_NONE;
+             }
+             break;
+
+
+        case NET_SOCK_OPT_IP_TTL:
+             if (opt_len != sizeof(NET_IPv4_TTL)) {
+                *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                 break;
+             }
+
+             p_int08u_val = p_opt_val;
+             NetConn_IPv4TxTTL_Set(               p_sock->ID_Conn,
+                                   (NET_IPv4_TOS)*p_int08u_val,
+                                                  p_err);
+             if (*p_err == NET_CONN_ERR_NONE) {
+                 *p_err  = NET_SOCK_ERR_NONE;
+             }
+             break;
+
+        case NET_SOCK_OPT_IP_ADD_MEMBERSHIP:
+        case NET_SOCK_OPT_IP_DROP_MEMBERSHIP:
+#ifdef NET_IGMP_MODULE_EN
+             if (opt_len != sizeof(NET_IPv4_MREQ)) {
+                *p_err = NET_SOCK_ERR_INVALID_DATA_SIZE;
+                 break;
+             }
+             if (p_sock->SockType != NET_SOCK_TYPE_DATAGRAM) {  /* Multicast applies to datagram only                   */
+                *p_err = NET_SOCK_ERR_INVALID_TYPE;
+                 break;
+             }
+
+             mcast_info = p_opt_val;                            /* Obtain multicast address structure                   */
+             mcast_addr = mcast_info->mcast_addr;               /* Obtain multicast address of group                    */
+             if_ip_addr = mcast_info->if_ip_addr;               /* Obtain local interface IP address                    */
+
+             if (if_ip_addr == NET_IPv4_ADDR_NONE) {            /* If INADDR_ANY, determine the default interface       */
+                 if_nbr = NetIF_GetDflt();
+             }
+             else {                                             /* Determine IF number from provided local IP address   */
+                 if_nbr = NetIPv4_GetAddrHostIF_Nbr(if_ip_addr);
+             }
+
+             if (opt_name == NET_SOCK_OPT_IP_ADD_MEMBERSHIP) {
+                 NetIGMP_HostGrpJoinHandler(if_nbr, mcast_addr, p_err);
+             }
+             else {                                             /* NET_SOCK_OPT_IP_DROP_MEMBERSHIP                      */
+                 NetIGMP_HostGrpLeaveHandler(if_nbr, mcast_addr, p_err);
+             }
+             if (*p_err == NET_IGMP_ERR_NONE) {
+                 *p_err  = NET_SOCK_ERR_NONE;
+             }
+             break;
+#else
+             *p_err = NET_SOCK_ERR_INVALID_OP;
+             break;
+#endif
+#endif
+
+        default:
+             break;
+    }
+
+
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         goto exit_err_opt_set;
+    }
+
+    goto exit_err_none;
+
+exit_lock_fault:
+   return (NET_SOCK_BSD_ERR_OPT_SET);
+
+exit_err_opt_set:
+   rtn_code = NET_SOCK_BSD_ERR_OPT_SET;
+   goto exit_release;
+
+exit_err_none:
+    rtn_code = NET_SOCK_BSD_ERR_NONE;
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+
+    return (rtn_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetSock_CfgTxNagleEnHandler()
+*
+* Description : (1) Configure Scoket's TCP connection's transmit Nagle algorithm enable.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of the socket to configure the Nagle
+*               -------     TCP transmission algorithm enable.
+*
+*               nagle_en    Desired state the Nagle algorithm enable.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Nagle algorithm enable successfully set.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization not completed.
+*                               NET_SOCK_ERR_INVALID_SOCK       Socket ID invalid.
+*                               NET_SOCK_ERR_NOT_USED           Socket ID not used.
+*                               NET_SOCK_ERR_INVALID_PROTOCOL   Socket does not use TCP.
+*                               NET_SOCK_ERR_INVALID_TYPE       Socket is not of the right type.
+*
+* Return(s)   : DEF_OK,   If the Nagle algorithm was successfully set,
+*
+*               DEF_FAIL, Otherwise.
+*
+* Caller(s)   : NetSock_OptSet(),
+*               NetSock_CfgTxNagle().
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetSock_CfgTxNagleEnHandler() is called by application function(s) & ... :
+*
+*                   (a) MUST be called with the global network lock already acquired; ...
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgTxNagleEnHandler()'.
+*
+*               (3) RFC #1122, Section 4.2.3.4 also states that "a TCP SHOULD implement the Nagle
+*                   Algorithm ... However, there MUST be a way for an application to disable the
+*                   Nagle algorithm on an individual connection".
+*
+*                   See also 'NetTCP_TxConnTxQ()  Note #6'.
+*********************************************************************************************************
+*/
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+static  CPU_BOOLEAN  NetSock_CfgTxNagleEnHandler (NET_SOCK_ID   sock_id,
+                                                  CPU_BOOLEAN   nagle_en,
+                                                  NET_ERR      *p_err)
+{
+    NET_SOCK     *p_sock;
+    NET_CONN_ID   conn_id;
+    NET_CONN_ID   conn_id_transport;
+    NET_ERR       err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* ---------------- VALIDATE SOCK USED ---------------- */
+   (void)NetSock_IsUsed(sock_id, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* --------------- CFG TCP TX NAGLE EN ---------------- */
+    p_sock = &NetSock_Tbl[sock_id];
+
+    switch (p_sock->SockType) {
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+        case NET_SOCK_TYPE_STREAM:
+             switch (p_sock->Protocol) {
+#ifdef  NET_TCP_MODULE_EN
+                 case NET_SOCK_PROTOCOL_TCP:
+                      conn_id           = p_sock->ID_Conn;
+                      conn_id_transport = NetConn_ID_TransportGet(conn_id, p_err);
+                      if (*p_err != NET_CONN_ERR_NONE) {
+                           return (DEF_FAIL);
+                      }
+
+                     (void)NetTCP_ConnIsUsed((NET_TCP_CONN_ID)conn_id_transport,
+                                                              p_err);
+                      if (*p_err != NET_TCP_ERR_NONE) {
+                           return (DEF_FAIL);
+                      }
+
+                     (void)NetTCP_ConnCfgTxNagleEnHandler((NET_TCP_CONN_ID) conn_id_transport,
+                                                                            nagle_en,
+                                                                           &err);
+                     *p_err = (err == NET_TCP_ERR_NONE) ? NET_SOCK_ERR_NONE : err;
+                      break;
+#endif
+
+
+                 case NET_SOCK_PROTOCOL_NONE:
+                 default:
+                      NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidProtocolCtr);
+                     *p_err = NET_SOCK_ERR_INVALID_PROTOCOL;
+                      return (DEF_FAIL);
+             }
+             break;
+#endif
+
+
+        case NET_SOCK_TYPE_NONE:
+        case NET_SOCK_TYPE_DATAGRAM:
+        case NET_SOCK_TYPE_FAULT:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+            *p_err = NET_SOCK_ERR_INVALID_TYPE;
+             break;
+    }
+
+   (void)&conn_id;                                              /* Prevent possible 'variable unused' warnings.         */
+   (void)&conn_id_transport;
+   (void)&err;
+
+    if(*p_err == NET_SOCK_ERR_INVALID_TYPE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                     NetSock_CfgIF_Handler()
+*
+* Description : Configure the interface that must be used by the socket.
+*
+* Argument(s) : sock_id     Socket descriptor/handle identifier of the socket to configure the interface
+*               -------     number.
+*
+*               if_nbr      Interface number to bind to the socket.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_SOCK_ERR_NONE               Interface number successfully set.
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization not completed.
+*                               NET_IF_ERR_INVALID_IF           Invalid interface number.
+*                               NET_SOCK_ERR_INVALID_SOCK       Socket ID invalid.
+*                               NET_SOCK_ERR_NOT_USED           Socket ID not used.
+*                               NET_SOCK_ERR_INVALID_TYPE       Socket is not of the right type.
+*
+* Return(s)   : DEF_OK,   If the interface number was successfully set,
+*
+*               DEF_FAIL, Otherwise.
+*
+* Caller(s)   : NetSock_CfgIF().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : NetSock_CfgIF_Handler() is called by network protocol suite function(s)
+*               & MUST be called with the global network lock already acquired.
+*
+*               See also 'NetSock_CfgIF()  Note #2'.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetSock_CfgIF_Handler (NET_SOCK_ID   sock_id,
+                                            NET_IF_NBR    if_nbr,
+                                            NET_ERR      *p_err)
+{
+    NET_SOCK     *p_sock;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* ------------- VALIDATE NET INIT IS DONE ------------ */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        return (DEF_FAIL);
+    }
+
+   (void)NetSock_IsUsed(sock_id, p_err);                         /* ---------------- VALIDATE SOCK USED ---------------- */
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         return (DEF_FAIL);
+    }
+
+                                                                /* ----------------- VALIDATE IF NBR ------------------ */
+    if (if_nbr > NET_IF_CFG_MAX_NBR_IF) {
+       *p_err = NET_IF_ERR_INVALID_IF;
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ---------------- CFG SOCKET IF NBR ----------------- */
+    p_sock = &NetSock_Tbl[sock_id];
+
+    switch (p_sock->SockType) {
+        case NET_SOCK_TYPE_STREAM:
+        case NET_SOCK_TYPE_DATAGRAM:
+             p_sock->IF_Nbr = if_nbr;
+             break;
+
+
+        case NET_SOCK_TYPE_NONE:
+        case NET_SOCK_TYPE_FAULT:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Sock.InvalidSockTypeCtr);
+            *p_err = NET_SOCK_ERR_INVALID_TYPE;
+             return (DEF_FAIL);
+    }
+
+   *p_err = NET_SOCK_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_sock.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_sock.h
new file mode 100644
index 0000000..79fa3c7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_sock.h
@@ -0,0 +1,1771 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK SOCKET LAYER
+*
+* Filename      : net_sock.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SL
+*                 AA
+*********************************************************************************************************
+* Note(s)       : (1) Supports BSD 4.x Socket Layer with the following restrictions/constraints :
+*
+*                     (a) ONLY supports a single address family from the following families :
+*                         (1) IPv4 (AF_INET)
+*
+*                     (b) ONLY supports the following socket types :
+*                         (1) Datagram (SOCK_DGRAM)
+*                         (2) Stream   (SOCK_STREAM)
+*
+*                     (c) ONLY supports a single protocol family from the following families :
+*                         (1) IPv4 (PF_INET)
+*                             (A) ONLY supports the following protocols :
+*                                 (1) UDP (IPPROTO_UDP)
+*                                 (2) TCP (IPPROTO_TCP)
+*
+*                     (d) ONLY supports the following socket options :
+*
+*                             Blocking
+*                             Secure (TLS/SSL)
+*                             Rx Queue size
+*                             Tx Queue size
+*                             Time of server (IPv4-TOS)
+*                             Time to life   (IPv4-TTL)
+*                             Time to life multicast
+*                             UDP connection receive         timeout
+*                             TCP connection accept          timeout
+*                             TCP connection close           timeout
+*                             TCP connection connect request timeout
+*                             TCP connection receive         timeout
+*                             TCP connection transmit        timeout
+*                             TCP keep alive
+*                             TCP MSL
+*                             Force connection using a specific Interface
+*
+*                     (e) Multiple socket connections with the same local & remote address -- both
+*                         addresses & port numbers -- OR multiple socket connections with only a
+*                         local address but the same local address -- both address & port number --
+*                         is NOT currently supported.
+*
+*                         See 'NetSock_BindHandler()  Note #8'.
+*
+*********************************************************************************************************
+* Notice(s)     : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given
+*                     us permission to reprint portions of their documentation.  Portions of this text are
+*                     reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition,
+*                     Standard for Information Technology -- Portable Operating System Interface (POSIX),
+*                     The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute
+*                     of Electrical and Electronics Engineers, Inc and The Open Group.  In the event of any
+*                     discrepancy between these versions and the original IEEE and The Open Group Standard,
+*                     the original IEEE and The Open Group Standard is the referee document.  The original
+*                     Standard can be obtained online at http://www.opengroup.org/unix/online.html.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_ipv4.h"
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ipv6.h"
+#endif
+
+#include  "../IF/net_if.h"
+
+#include  "net_def.h"
+#include  "net_type.h"
+#include  "net_stat.h"
+#include  "net_err.h"
+
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_SOCK_MODULE_PRESENT
+#define  NET_SOCK_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef NET_SOCK_MODULE
+#define  NET_SOCK_EXT
+#else
+#define  NET_SOCK_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_SOCK_NBR_SOCK                          NET_SOCK_CFG_SOCK_NBR_UDP + \
+                                                   (NET_SOCK_CFG_SOCK_NBR_TCP)
+
+#if (NET_SOCK_CFG_SOCK_NBR_TCP > 0)
+#define  NET_SOCK_CONN_NBR                          NET_SOCK_CFG_SOCK_NBR_UDP + \
+                                                   (NET_SOCK_CFG_SOCK_NBR_TCP * NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX)
+#else
+#define  NET_SOCK_CONN_NBR                          NET_SOCK_CFG_SOCK_NBR_UDP
+#endif
+
+
+
+#if (defined(NET_IPv6_MODULE_EN))
+#define  NET_SOCK_ADDR_LEN_MAX                      NET_SOCK_ADDR_LEN_IP_V6
+
+#elif (defined(NET_IPv4_MODULE_EN))
+#define  NET_SOCK_ADDR_LEN_MAX                      NET_SOCK_ADDR_LEN_IP_V4
+
+#else
+#define  NET_SOCK_ADDR_LEN_MAX                      0
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK SOCKET PORT NUMBER DEFINES
+*
+* Note(s) : (1) Socket port numbers defined in host-order.
+*
+*               See also 'net_sock.h  NETWORK SOCKET ADDRESS DATA TYPES  Note #2'.
+*********************************************************************************************************
+*/
+
+#define  NET_SOCK_PORT_NBR_RESERVED                      NET_PORT_NBR_RESERVED
+#define  NET_SOCK_PORT_NBR_NONE                          NET_SOCK_PORT_NBR_RESERVED
+#define  NET_SOCK_PORT_NBR_RANDOM                        NET_SOCK_PORT_NBR_RESERVED
+
+#ifndef  NET_SOCK_DFLT_NO_BLOCK_EN
+    #define  NET_SOCK_DFLT_NO_BLOCK_EN  DEF_DISABLED
+#endif
+
+#ifndef  NET_SOCK_DFLT_PORT_NBR_RANDOM_BASE
+    #define  NET_SOCK_DFLT_PORT_NBR_RANDOM_BASE             49152u
+#endif
+
+#ifndef  NET_SOCK_DFLT_PORT_NBR_RANDOM_END
+    #define  NET_SOCK_DFLT_PORT_NBR_RANDOM_END              65535u
+#endif
+
+#define  NET_SOCK_PORT_NBR_RANDOM_MIN                    NET_SOCK_DFLT_PORT_NBR_RANDOM_BASE
+#define  NET_SOCK_PORT_NBR_RANDOM_MAX                    NET_SOCK_DFLT_PORT_NBR_RANDOM_END
+
+
+#ifndef  NET_SOCK_DFLT_TIMEOUT_RX_Q_MS
+                                                                /* Configure socket timeout values (see Note #5) :      */
+                                                                /* Configure (datagram) socket receive queue timeout.   */
+    #define  NET_SOCK_DFLT_TIMEOUT_RX_Q_MS           5000u
+#endif
+
+#ifndef  NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS
+                                                                /* Configure socket connection request timeout.         */
+    #define  NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS       5000u
+#endif
+
+
+#ifndef  NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS
+                                                                /* Configure socket connection accept  timeout.         */
+    #define  NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS        5000u
+#endif
+
+#ifndef  NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS
+                                                                /* Configure socket connection close   timeout.         */
+    #define  NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS            10000u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NETWORK SOCKET STATES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                             NETWORK SOCKET BLOCKING MODE SELECT DEFINES
+*
+* Note(s) : (1) The following socket values MUST be pre-#define'd in 'net_def.h' PRIOR to 'net_cfg.h'
+*               so that the developer can configure sockets for the desired socket blocing mode (see
+*               'net_def.h  BSD 4.x & NETWORK SOCKET LAYER DEFINES  Note #1b' & 'net_cfg_net.h  NETWORK
+*               SOCKET LAYER CONFIGURATION') :
+*
+*               (a) NET_SOCK_BLOCK_SEL_DFLT
+*               (b) NET_SOCK_BLOCK_SEL_BLOCK
+*               (c) NET_SOCK_BLOCK_SEL_NO_BLOCK
+*
+*           (2) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition, 6th Printing,
+*               Section 6.2 'Blocking I/O Model', Page 154 states that "by default, all sockets are
+*               blocking".
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+                                                                /* ------------------ SOCK BLOCK SEL ------------------ */
+#define  NET_SOCK_BLOCK_SEL_NONE                           0u
+#define  NET_SOCK_BLOCK_SEL_DFLT                           1u   /* Sock block mode determined by run-time sock opts ... */
+#define  NET_SOCK_BLOCK_SEL_BLOCK                          2u   /* ... but dflts to blocking (see Note #2).             */
+#define  NET_SOCK_BLOCK_SEL_NO_BLOCK                       3u
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                NETWORK SOCKET (OBJECT) FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- NET SOCK OBJ FLAGS ---------------- */
+#define  NET_SOCK_FLAG_SOCK_NONE                  DEF_BIT_NONE
+#define  NET_SOCK_FLAG_SOCK_USED                  DEF_BIT_08    /* Sock cur used; i.e. NOT in free sock pool.           */
+#define  NET_SOCK_FLAG_SOCK_NO_BLOCK              MSG_DONTWAIT  /* Sock blocking DISABLED.                              */
+#define  NET_SOCK_FLAG_SOCK_SECURE                DEF_BIT_09    /* Sock security ENABLED.                               */
+#define  NET_SOCK_FLAG_SOCK_SECURE_NEGO           DEF_BIT_10
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK SOCKET EVENT TYPE DEFINES
+*
+* Note(s) : (1) 'EVENT_TYPE' abbreviated to 'EVENT' to enforce ANSI-compliance of 31-character symbol
+*                length uniqueness.
+*********************************************************************************************************
+*/
+
+#define  NET_SOCK_EVENT_NONE                               0u
+#define  NET_SOCK_EVENT_ERR                                1u
+
+
+#define  NET_SOCK_EVENT_SOCK_RX                           10u
+#define  NET_SOCK_EVENT_SOCK_TX                           11u
+#define  NET_SOCK_EVENT_SOCK_ACCEPT                       12u
+#define  NET_SOCK_EVENT_SOCK_CONN                         13u
+#define  NET_SOCK_EVENT_SOCK_CLOSE                        14u
+
+#define  NET_SOCK_EVENT_SOCK_ERR_RX                       20u
+#define  NET_SOCK_EVENT_SOCK_ERR_TX                       21u
+#define  NET_SOCK_EVENT_SOCK_ERR_ACCEPT                   22u
+#define  NET_SOCK_EVENT_SOCK_ERR_CONN                     23u
+#define  NET_SOCK_EVENT_SOCK_ERR_CLOSE                    24u
+
+
+#define  NET_SOCK_EVENT_TRANSPORT_RX                      30u
+#define  NET_SOCK_EVENT_TRANSPORT_TX                      31u
+
+#define  NET_SOCK_EVENT_TRANSPORT_ERR_RX                  40u
+#define  NET_SOCK_EVENT_TRANSPORT_ERR_TX                  41u
+
+
+/*
+*********************************************************************************************************
+*                              NETWORK SOCKET FAMILY & PROTOCOL DEFINES
+*
+* Note(s) : (1) The following socket values MUST be pre-#define'd in 'net_def.h' PRIOR to 'net_cfg.h'
+*               so that the developer can configure sockets for the correct socket family values (see
+*               'net_def.h  BSD 4.x & NETWORK SOCKET LAYER DEFINES  Note #1' & 'net_cfg_net.h  NETWORK
+*               SOCKET LAYER CONFIGURATION') :
+*
+*               (a) (1) NET_SOCK_ADDR_FAMILY_IP_V4
+*                   (2) NET_SOCK_PROTOCOL_FAMILY_IP_V4
+*                   (3) NET_SOCK_FAMILY_IP_V4
+*
+*               (b) (1) NET_SOCK_ADDR_LEN_IP_V4
+*                   (2) NET_SOCK_PROTO_MAX_IP_V4
+*
+*           (2) 'NET_SOCK_PROTOCOL_MAX' abbreviated to 'NET_SOCK_PROTO_MAX' to enforce ANSI-compliance of
+*                31-character symbol length uniqueness.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK SOCKET ADDRESS DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ SOCK ADDR CFG ------------------- */
+
+#define  NET_SOCK_ADDR_IP_LEN_PORT                  (sizeof(NET_PORT_NBR))
+
+#define  NET_SOCK_ADDR_IP_IX_BASE                             0
+#define  NET_SOCK_ADDR_IP_IX_PORT                           NET_SOCK_ADDR_IP_IX_BASE
+
+                                                                /* ---------------- IPv4 SOCK ADDR CFG ---------------- */
+#ifdef   NET_IPv4_MODULE_EN
+
+#define  NET_SOCK_ADDR_IP_V4_LEN_ADDR               (sizeof(NET_IPv4_ADDR))
+#define  NET_SOCK_ADDR_IP_V4_LEN_PORT_ADDR                  NET_SOCK_ADDR_IP_V4_LEN_ADDR + NET_SOCK_ADDR_IP_LEN_PORT
+
+#define  NET_SOCK_ADDR_IP_V4_IX_ADDR                       (NET_SOCK_ADDR_IP_IX_PORT + NET_SOCK_ADDR_IP_LEN_PORT)
+
+#define  NET_SOCK_ADDR_IP_V4_WILDCARD                       NET_IPv4_ADDR_NONE
+#define  NET_SOCK_ADDR_IP_V4_BROADCAST                      INADDR_BROADCAST
+
+#endif
+
+                                                                /* ---------------- IPv6 SOCK ADDR CFG ---------------- */
+#ifdef   NET_IPv6_MODULE_EN
+
+#define  NET_SOCK_ADDR_IP_V6_LEN_FLOW               (sizeof(CPU_INT32U))
+#define  NET_SOCK_ADDR_IP_V6_LEN_ADDR               (sizeof(NET_IPv6_ADDR))
+#define  NET_SOCK_ADDR_IP_V6_LEN_PORT_ADDR                  NET_SOCK_ADDR_IP_V6_LEN_ADDR + NET_SOCK_ADDR_IP_LEN_PORT
+
+#define  NET_SOCK_ADDR_IP_V6_IX_FLOW                       (NET_SOCK_ADDR_IP_IX_PORT + NET_SOCK_ADDR_IP_LEN_PORT)
+#define  NET_SOCK_ADDR_IP_V6_IX_ADDR                       (NET_SOCK_ADDR_IP_V6_IX_FLOW + NET_SOCK_ADDR_IP_V6_LEN_FLOW)
+
+#define  NET_SOCK_ADDR_IP_V6_WILDCARD                       NET_IPv6_ADDR_ANY
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NETWORK SOCKET API DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_SOCK_BSD_ERR_NONE                           NET_BSD_ERR_NONE
+#define  NET_SOCK_BSD_ERR_DFLT                           NET_BSD_ERR_DFLT
+
+#define  NET_SOCK_BSD_ERR_OPEN                           NET_SOCK_BSD_ERR_DFLT
+#define  NET_SOCK_BSD_ERR_CLOSE                          NET_SOCK_BSD_ERR_DFLT
+#define  NET_SOCK_BSD_ERR_BIND                           NET_SOCK_BSD_ERR_DFLT
+#define  NET_SOCK_BSD_ERR_CONN                           NET_SOCK_BSD_ERR_DFLT
+#define  NET_SOCK_BSD_ERR_LISTEN                         NET_SOCK_BSD_ERR_DFLT
+#define  NET_SOCK_BSD_ERR_ACCEPT                         NET_SOCK_BSD_ERR_DFLT
+#define  NET_SOCK_BSD_ERR_RX                             NET_SOCK_BSD_ERR_DFLT
+#define  NET_SOCK_BSD_ERR_TX                             NET_SOCK_BSD_ERR_DFLT
+#define  NET_SOCK_BSD_ERR_SEL                            NET_SOCK_BSD_ERR_DFLT
+#define  NET_SOCK_BSD_ERR_OPT_SET                        NET_SOCK_BSD_ERR_DFLT
+#define  NET_SOCK_BSD_ERR_OPT_GET                        NET_SOCK_BSD_ERR_DFLT
+
+
+#define  NET_SOCK_BSD_RTN_CODE_OK                        NET_BSD_RTN_CODE_OK
+#define  NET_SOCK_BSD_RTN_CODE_TIMEOUT                   NET_BSD_RTN_CODE_TIMEOUT
+#define  NET_SOCK_BSD_RTN_CODE_CONN_CLOSED               NET_BSD_RTN_CODE_CONN_CLOSED
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK SOCKET (ARGUMENT) FLAG DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_SOCK_FLAG_NONE                       NET_SOCK_FLAG_SOCK_NONE
+
+#define  NET_SOCK_FLAG_RX_DATA_PEEK               MSG_PEEK
+
+#define  NET_SOCK_FLAG_NO_BLOCK                   MSG_DONTWAIT
+#define  NET_SOCK_FLAG_RX_NO_BLOCK                NET_SOCK_FLAG_NO_BLOCK
+#define  NET_SOCK_FLAG_TX_NO_BLOCK                NET_SOCK_FLAG_NO_BLOCK
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               NETWORK SOCKET ADDRESS FAMILY DATA TYPE
+*********************************************************************************************************
+*/
+
+
+
+
+#define  NET_SOCK_ADDR_FAMILY_IP_V4         AF_INET             /* TCP/IPv4 sock addr     family type.                  */
+#define  NET_SOCK_ADDR_FAMILY_IP_V6         AF_INET6            /* TCP/IPv6 sock addr     family type.                  */
+
+typedef  CPU_INT16U  NET_SOCK_ADDR_FAMILY;
+
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK SOCKET ADDRESS LENGTH DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef CPU_INT08U NET_SOCK_ADDR_LEN;
+
+
+/*
+*********************************************************************************************************
+*                              NETWORK SOCKET PROTOCOL FAMILY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  net_sock_protocol_family {
+    NET_SOCK_PROTOCOL_FAMILY_NONE  = 0,
+    NET_SOCK_PROTOCOL_FAMILY_IP_V4 = PF_INET,                   /* TCP/IPv4 sock protocol family type.                  */
+    NET_SOCK_PROTOCOL_FAMILY_IP_V6 = PF_INET6                   /* TCP/IPv6 sock protocol family type.                  */
+} NET_SOCK_PROTOCOL_FAMILY;
+
+
+/*
+*********************************************************************************************************
+*                              NETWORK SOCKET FAMILY DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  net_sock_family {
+    NET_SOCK_FAMILY_IP_V4 = NET_SOCK_PROTOCOL_FAMILY_IP_V4,
+    NET_SOCK_FAMILY_IP_V6 = NET_SOCK_PROTOCOL_FAMILY_IP_V6
+} NET_SOCK_FAMILY;
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK SOCKET PROTOCOL DATA TYPE
+*********************************************************************************************************
+*/
+
+
+typedef  enum  net_sock_protocol {
+    NET_SOCK_PROTOCOL_DFLT = 0,
+    NET_SOCK_PROTOCOL_NONE = NET_SOCK_PROTOCOL_DFLT,
+
+    NET_SOCK_PROTOCOL_TCP  = IPPROTO_TCP,
+    NET_SOCK_PROTOCOL_UDP  = IPPROTO_UDP,
+    NET_SOCK_PROTOCOL_IP   = IPPROTO_IP,
+    NET_SOCK_PROTOCOL_SOCK = SOL_SOCKET
+} NET_SOCK_PROTOCOL;
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK SOCKET TYPE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum net_sock_type {
+    NET_SOCK_TYPE_NONE     =  0,
+    NET_SOCK_TYPE_FAULT    = -1,
+    NET_SOCK_TYPE_DATAGRAM = SOCK_DGRAM,
+    NET_SOCK_TYPE_STREAM   = SOCK_STREAM
+} NET_SOCK_TYPE;
+
+#if 0
+/* -------------------- SOCK TYPES -------------------- */
+#define  NET_SOCK_TYPE_NONE                                0
+#define  NET_SOCK_TYPE_FAULT                              -1
+
+#if 0
+#define  NET_SOCK_TYPE_DATAGRAM                         SOCK_DGRAM
+#define  NET_SOCK_TYPE_STREAM                           SOCK_STREAM
+#endif
+
+typedef  CPU_INT16S  NET_SOCK_TYPE;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                     NETWORK SOCKET DATA LENGTH & (ERROR) RETURN CODE DATA TYPES
+*
+* Note(s) : (1) IEEE Std 1003.1, 2004 Edition, Section 'sys/types.h : DESCRIPTION' states that :
+*
+*               (a) "ssize_t - Used for a count of bytes or an error indication."
+*
+*               (b) "ssize_t shall be [a] signed integer type ... capable of storing values at least in
+*                    the range [-1, {SSIZE_MAX}]."
+*
+*                   (1) IEEE Std 1003.1, 2004 Edition, Section 'limits.h : DESCRIPTION' states that the
+*                       "Minimum Acceptable Value ... [for] {SSIZE_MAX}" is "32767".
+*
+*                   (2) To avoid possible integer overflow, the network socket return code data type MUST
+*                       be declared as a signed integer data type with a maximum positive value greater
+*                       than or equal to all transport layers' maximum positive return value.
+*
+*                       See also 'net_udp.c  NetUDP_RxAppData()      Return(s)',
+*                                'net_udp.c  NetUDP_TxAppData()      Return(s)',
+*                                'net_tcp.c  NetTCP_RxAppData()      Return(s)',
+*                              & 'net_tcp.c  NetTCP_TxConnAppData()  Return(s)'.
+*
+*           (2) NET_SOCK_DATA_SIZE_MAX  SHOULD be #define'd based on 'NET_SOCK_DATA_SIZE' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32S          NET_SOCK_DATA_SIZE;
+typedef  NET_SOCK_DATA_SIZE  NET_SOCK_RTN_CODE;
+
+#define  NET_SOCK_DATA_SIZE_MIN                            0
+#define  NET_SOCK_DATA_SIZE_MAX          DEF_INT_32S_MAX_VAL    /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK SOCKET STATE DATA TYPE
+*********************************************************************************************************
+*/
+
+/* typedef  CPU_INT08U  NET_SOCK_STATE; */
+typedef enum net_sock_state {
+    NET_SOCK_STATE_NONE               =  1u,
+
+    NET_SOCK_STATE_FREE               =  2u,
+    NET_SOCK_STATE_DISCARD            =  3u,
+    NET_SOCK_STATE_CLOSED             = 10u,
+    NET_SOCK_STATE_CLOSED_FAULT       = 11u,
+    NET_SOCK_STATE_CLOSE_IN_PROGRESS  = 15u,
+    NET_SOCK_STATE_CLOSING_DATA_AVAIL = 16u,
+    NET_SOCK_STATE_BOUND              = 20u,
+    NET_SOCK_STATE_LISTEN             = 30u,
+    NET_SOCK_STATE_CONN               = 40u,
+    NET_SOCK_STATE_CONN_IN_PROGRESS   = 41u,
+    NET_SOCK_STATE_CONN_DONE          = 42u
+} NET_SOCK_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK SOCKET QUANTITY DATA TYPE
+*
+* Note(s) : (1) See also 'NETWORK SOCKET IDENTIFICATION DATA TYPE  Note #1'.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16S  NET_SOCK_QTY;                              /* Defines max qty of socks to support.                 */
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK SOCKET IDENTIFICATION DATA TYPE
+*
+* Note(s) : (1) (a) NET_SOCK_NBR_MAX  SHOULD be #define'd based on 'NET_SOCK_QTY' data type declared.
+*
+*               (b) However, since socket handle identifiers are data-typed as 16-bit signed integers;
+*                   the maximum unique number of valid socket handle identifiers, & therefore the
+*                   maximum number of valid sockets, is the total number of non-negative values that
+*                   16-bit signed integers support.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16S  NET_SOCK_ID;
+
+#define  NET_SOCK_NBR_MIN                                  1
+#define  NET_SOCK_NBR_MAX                DEF_INT_16S_MAX_VAL    /* See Note #1.                                         */
+
+#define  NET_SOCK_ID_NONE                                 -1
+#define  NET_SOCK_ID_MIN                                   0
+#define  NET_SOCK_ID_MAX          (NET_SOCK_NBR_SOCK - 1)
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK SOCKET FLAGS DATA TYPES
+*
+* Note(s) : (1) Ideally, network socket API argument flags data type SHOULD be defined as   an unsigned
+*               integer data type since logical bitwise operations should be performed ONLY on unsigned
+*               integer data types.
+*********************************************************************************************************
+*/
+
+typedef  NET_FLAGS   NET_SOCK_FLAGS;
+typedef  CPU_INT16S  NET_SOCK_API_FLAGS;                        /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                 NETWORK SOCKET OPTION NAME DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  enum  net_sock_opt_name {
+    NET_SOCK_OPT_SOCK_TX_BUF_SIZE            = SO_SNDBUF,
+    NET_SOCK_OPT_SOCK_RX_BUF_SIZE            = SO_RCVBUF,
+    NET_SOCK_OPT_SOCK_RX_TIMEOUT             = SO_RCVTIMEO,
+    NET_SOCK_OPT_SOCK_TX_TIMEOUT             = SO_SNDTIMEO,
+    NET_SOCK_OPT_SOCK_ERROR                  = SO_ERROR,
+    NET_SOCK_OPT_SOCK_TYPE                   = SO_TYPE,
+    NET_SOCK_OPT_SOCK_KEEP_ALIVE             = SO_KEEPALIVE,
+    NET_SOCK_OPT_SOCK_ACCEPT_CONN            = SO_ACCEPTCONN,
+
+    NET_SOCK_OPT_TCP_NO_DELAY                = TCP_NODELAY,
+    NET_SOCK_OPT_TCP_KEEP_CNT                = TCP_KEEPCNT,
+    NET_SOCK_OPT_TCP_KEEP_IDLE               = TCP_KEEPIDLE,
+    NET_SOCK_OPT_TCP_KEEP_INTVL              = TCP_KEEPINTVL,
+
+    NET_SOCK_OPT_IP_TOS                      = IP_TOS,
+    NET_SOCK_OPT_IP_TTL                      = IP_TTL,
+    NET_SOCK_OPT_IP_RX_IF                    = IP_RECVIF,
+    NET_SOCK_OPT_IP_OPT                      = IP_OPTIONS,
+    NET_SOCK_OPT_IP_HDR_INCL                 = IP_HDRINCL,
+    NET_SOCK_OPT_IP_ADD_MEMBERSHIP           = IP_ADD_MEMBERSHIP,
+    NET_SOCK_OPT_IP_DROP_MEMBERSHIP          = IP_DROP_MEMBERSHIP
+} NET_SOCK_OPT_NAME;
+
+
+
+
+/*
+*********************************************************************************************************
+*                               NETWORK SOCKET ADDRESS LENGTH DATA TYPE
+*
+* Note(s) : (1) IEEE Std 1003.1, 2004 Edition, Section 'sys/socket.h : DESCRIPTION' states that
+*               "socklen_t ... is an integer type of width of at least 32 bits".
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32S  NET_SOCK_OPT_LEN;
+
+
+/*
+*********************************************************************************************************
+*                                 NETWORK SOCKET QUEUE SIZE DATA TYPE
+*
+* Note(s) : (1) (a) NET_SOCK_Q_SIZE #define's SHOULD be #define'd based on 'NET_SOCK_Q_SIZE'
+*                   data type declared.
+*
+*               (b) However, since socket/connection handle identifiers are data-typed as 16-bit
+*                   signed integers; the maximum unique number of valid socket/connection handle
+*                   identifiers, & therefore the maximum number of valid sockets/connections, is
+*                   the total number of non-negative values that 16-bit signed integers support.
+*
+*                   See also             'NETWORK SOCKET     IDENTIFICATION DATA TYPE  Note #1b'
+*                          & 'net_conn.h  NETWORK CONNECTION IDENTIFICATION DATA TYPE  Note #2b'.
+*
+*           (2) (a) NET_SOCK_Q_IX   #define's SHOULD be #define'd based on 'NET_SOCK_Q_SIZE'
+*                   data type declared.
+*
+*               (b) Since socket queue size is data typed as a 16-bit unsigned integer but the
+*                   maximum queue sizes are #define'd as 16-bit signed integer values ... :
+*
+*                   (1) Valid socket queue indices are #define'd within the range of     16-bit
+*                         signed integer values, ...
+*                   (2) but   socket queue indice exception values may be #define'd with 16-bit
+*                       unsigned integer values.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_SOCK_Q_SIZE;
+
+                                                                /* See Note #1.                                         */
+#define  NET_SOCK_Q_SIZE_NONE                              0
+#define  NET_SOCK_Q_SIZE_UNLIMITED                         0
+#define  NET_SOCK_Q_SIZE_MIN                NET_SOCK_NBR_MIN
+#define  NET_SOCK_Q_SIZE_MAX                NET_SOCK_NBR_MAX    /* See Note #1b.                                        */
+
+                                                                /* See Note #2.                                         */
+#define  NET_SOCK_Q_IX_NONE              DEF_INT_16U_MAX_VAL    /* See Note #2b.                                        */
+#define  NET_SOCK_Q_IX_MIN                                 0
+#define  NET_SOCK_Q_IX_MAX          (NET_SOCK_Q_SIZE_MAX - 1)
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK SOCKET ADDRESS DATA TYPES
+*
+* Note(s) : (1) See 'net_sock.h  Note #1a' for supported socket address families.
+*
+*           (2) (a) Socket address structure 'AddrFamily' member MUST be configured in host-order & MUST
+*                   NOT be converted to/from network-order.
+*
+*               (b) Socket address structure addresses MUST be configured/converted from host-order to
+*                   network-order.
+*
+*               See also 'net_bsd.h  BSD 4.x SOCKET DATA TYPES  Note #2b'.
+*********************************************************************************************************
+*/
+
+                                                                          /* ------------ NET SOCK ADDR IPv4 ------------ */
+#define  NET_SOCK_ADDR_IPv4_NBR_OCTETS_UNUSED        8
+
+typedef  struct  net_sock_addr_ipv4 {
+    NET_SOCK_ADDR_FAMILY    AddrFamily;                                   /* Sock addr family type (see Note #2a).        */
+    NET_PORT_NBR            Port;                                         /* UDP/TCP port nbr      (see Note #2b).        */
+    NET_IPv4_ADDR           Addr;                                         /* IPv6 addr             (see Note #2b).        */
+    CPU_INT08U              Unused[NET_SOCK_ADDR_IPv4_NBR_OCTETS_UNUSED]; /* Unused (MUST be zero).                       */
+} NET_SOCK_ADDR_IPv4;
+
+#define  NET_SOCK_ADDR_IPv4_SIZE            (sizeof(NET_SOCK_ADDR_IPv4))
+
+
+                                                                            /* ------------ NET SOCK ADDR IPv6 ------------ */
+
+typedef  struct  net_sock_addr_ipv6 {
+    NET_SOCK_ADDR_FAMILY    AddrFamily;                                     /* Sock addr family type (see Note #2a).                */
+    NET_PORT_NBR            Port;                                           /* UDP/TCP port nbr      (see Note #2b).                */
+    CPU_INT32U              FlowInfo;
+    NET_IPv6_ADDR           Addr;                                           /* IPv6 addr               (see Note #2b).              */
+    CPU_INT32U              ScopeID;                                        /* Unused (MUST be zero).                               */
+} NET_SOCK_ADDR_IPv6;
+
+#define  NET_SOCK_ADDR_IPv6_SIZE            (sizeof(NET_SOCK_ADDR_IPv6))
+
+
+
+                                                                        /* -------------- NET SOCK ADDR --------------- */
+#if   (defined(NET_IPv6_MODULE_EN))
+    #define  NET_SOCK_BSD_ADDR_LEN_MAX                  (NET_SOCK_ADDR_IPv6_SIZE  - sizeof(NET_SOCK_ADDR_FAMILY))
+
+#elif (defined(NET_IPv4_MODULE_EN))
+
+    #define  NET_SOCK_BSD_ADDR_LEN_MAX                  (NET_SOCK_ADDR_IPv4_SIZE  - sizeof(NET_SOCK_ADDR_FAMILY))
+
+#else
+    #define  NET_SOCK_BSD_ADDR_LEN_MAX                  0
+#endif
+
+
+typedef  struct  net_sock_addr {
+    NET_SOCK_ADDR_FAMILY    AddrFamily;                                 /* Sock addr family type (see Note #2a).        */
+    CPU_INT08U              Addr[NET_SOCK_BSD_ADDR_LEN_MAX];            /* Sock addr             (see Note #2b).        */
+} NET_SOCK_ADDR;
+
+#define  NET_SOCK_ADDR_SIZE                 (sizeof(NET_SOCK_ADDR))
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK SOCKET ACCEPT Q DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  net_sock_accept_q_obj {
+    NET_CONN_ID   ConnID;
+    CPU_BOOLEAN   IsRdy;
+    SLIST_MEMBER  ListNode;
+} NET_SOCK_ACCEPT_Q_OBJ;
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK SOCKET SEL EVENT DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  enum  net_sock_msg_type {
+    NET_SOCK_EVENT_TYPE_CONN_REQ_SIGNAL,
+    NET_SOCK_EVENT_TYPE_CONN_REQ_ABORT,
+    NET_SOCK_EVENT_TYPE_CONN_CLOSE_ABORT,
+    NET_SOCK_EVENT_TYPE_CONN_CLOSE_SIGNAL,
+    NET_SOCK_EVENT_TYPE_CONN_ACCEPT_SIGNAL,
+    NET_SOCK_EVENT_TYPE_CONN_ACCEPT_ABORT,
+    NET_SOCK_EVENT_TYPE_RX_ABORT,
+    NET_SOCK_EVENT_TYPE_RX,
+    NET_SOCK_EVENT_TYPE_TX,
+    NET_SOCK_EVENT_TYPE_SEL_ABORT
+} NET_SOCK_EVENT_TYPE;
+
+typedef  CPU_INT08U  NET_SOCK_SEL_EVENT_FLAG;
+
+#define  NET_SOCK_SEL_EVENT_FLAG_NONE           DEF_BIT_NONE
+#define  NET_SOCK_SEL_EVENT_FLAG_RD             DEF_BIT_00
+#define  NET_SOCK_SEL_EVENT_FLAG_WR             DEF_BIT_01
+#define  NET_SOCK_SEL_EVENT_FLAG_ERR            DEF_BIT_02
+
+
+/*
+*********************************************************************************************************
+*                                      NETWORK SOCKET DATA TYPE
+*
+*                             NET_SOCK
+*                          |-------------|
+*                          |  Sock Type  |
+*                          |-------------|      Next
+*                          |      O----------> Socket     Buffer Queue
+*                          |-------------|                    Heads      -------
+*                          |      O------------------------------------> |     |
+*                          |-------------|                               |     |
+*                          |      O----------------------                -------
+*                          |-------------|              |                  | ^
+*                          |  Conn IDs   |              |                  v |
+*                          |-------------|              |                -------
+*                          |    Sock     |              |                |     |
+*                          |   Family/   |              |                |     |
+*                          |  Protocol   |              |                -------
+*                          |-------------|              |                  | ^
+*                          | Conn Ctrls  |              | Buffer Queue     v |
+*                          |-------------|              |     Tails      -------
+*                          |    Flags    |              ---------------> |     |
+*                          |-------------|                               |     |
+*                          |    State    |                               -------
+*                          |-------------|
+*
+*
+* Note(s) : (1) (a) 'TxQ_Head'/'TxQ_Tail' may NOT be necessary but are included for consistency.
+*               (b) 'TxQ_SizeCur'         may NOT be necessary but is  included for consistency.
+*********************************************************************************************************
+*/
+typedef  struct  net_sock_sel_obj  NET_SOCK_SEL_OBJ;
+
+struct  net_sock_sel_obj {
+        KAL_SEM_HANDLE            SockSelTaskSignalObj;
+        NET_SOCK_SEL_EVENT_FLAG   SockSelPendingFlags;
+        NET_SOCK_SEL_OBJ         *ObjPrevPtr;
+};
+
+                                                                        /* ----------------- NET SOCK ----------------- */
+typedef  struct  net_sock  NET_SOCK;
+
+struct  net_sock {
+    NET_SOCK                   *NextPtr;                                /* Ptr to NEXT sock.                            */
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+    NET_SOCK_SEL_OBJ           *SelObjTailPtr;
+#endif
+
+    KAL_SEM_HANDLE              RxQ_SignalObj;
+    CPU_INT32U                  RxQ_SignalTimeout_ms;
+
+    NET_BUF                    *RxQ_Head;                               /* Ptr to head of sock's datagram rx buf Q.     */
+    NET_BUF                    *RxQ_Tail;                               /* Ptr to tail of sock's datagram rx buf Q.     */
+#if 0                                                                   /* See Note #2a.                                */
+    NET_BUF                    *TxQ_Head;                               /* Ptr to head of sock's datagram tx buf Q.     */
+    NET_BUF                    *TxQ_Tail;                               /* Ptr to tail of sock's datagram tx buf Q.     */
+#endif
+
+    NET_SOCK_DATA_SIZE          RxQ_SizeCfgd;                           /* Datagram rx buf Q size cfg'd (in octets).    */
+    NET_SOCK_DATA_SIZE          RxQ_SizeCur;                            /* Datagram rx buf Q size cur   (in octets).    */
+
+    NET_SOCK_DATA_SIZE          TxQ_SizeCfgd;                           /* Datagram tx buf Q size cfg'd (in octets).    */
+#if 0                                                                   /* See Note #2b.                                */
+    NET_SOCK_DATA_SIZE          TxQ_SizeCur;                            /* Datagram tx buf Q size cur   (in octets).    */
+#endif
+
+
+    NET_SOCK_ID                 ID;                                     /* Sock        id.                              */
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    NET_SOCK_ID                 ID_SockParent;                          /* Parent sock id.                              */
+#endif
+    NET_CONN_ID                 ID_Conn;                                /* Conn        id.                              */
+
+    NET_IF_NBR                  IF_Nbr;                                 /* IF nbr.                                      */
+
+
+    NET_SOCK_PROTOCOL_FAMILY    ProtocolFamily;                         /* Sock protocol family.                        */
+    NET_SOCK_PROTOCOL           Protocol;                               /* Sock protocol.                               */
+    NET_SOCK_TYPE               SockType;                               /* Sock type.                                   */
+
+
+#ifdef  NET_SECURE_MODULE_EN
+    void                       *SecureSession;                          /* Sock secure session.                         */
+#endif
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+    KAL_SEM_HANDLE              ConnReqSignalObj;
+    CPU_INT32U                  ConnReqSignalTimeout_ms;
+
+    KAL_SEM_HANDLE              ConnAcceptQSignalObj;
+    CPU_INT32U                  ConnAcceptQSignalTimeout_ms;
+
+    KAL_SEM_HANDLE              ConnCloseSignalObj;
+    CPU_INT32U                  ConnCloseSignalTimeout_ms;
+
+    SLIST_MEMBER               *ConnAcceptQ_Ptr;
+
+    NET_SOCK_Q_SIZE             ConnAcceptQ_SizeMax;                    /* Max Q size to accept rx'd conn reqs.         */
+    NET_SOCK_Q_SIZE             ConnAcceptQ_SizeCur;                    /* Cur Q size to accept rx'd conn reqs.         */
+
+    NET_SOCK_Q_SIZE             ConnChildQ_SizeMax;                     /* Max Q size to child conn.                    */
+    NET_SOCK_Q_SIZE             ConnChildQ_SizeCur;                     /* Cur Q size to child conn.                    */                                                                        /* Conn accept Q (conn id's q'd into array).    */
+#endif
+
+
+    NET_SOCK_STATE              State;                                  /* Sock state.                                  */
+
+    NET_SOCK_FLAGS              Flags;                                  /* Sock flags.                                  */
+};
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK SOCKET TIMEOUT DATA TYPE
+*
+* Note(s) : (1) (a) IEEE Std 1003.1, 2004 Edition, Section 'sys/select.h : DESCRIPTION' states that "the
+*                   timeval structure ... includes at least the following members" :
+*
+*                   (1) time_t         tv_sec     Seconds
+*                   (2) suseconds_t    tv_usec    Microseconds
+*
+*               (b) Ideally, the Network Socket Layer's 'NET_SOCK_TIMEOUT' data type would be based on the
+*                   BSD 4.x Layer's 'timeval' data type definition.  However, since BSD 4.x Layer application
+*                   programming interface (API) is NOT guaranteed to be present in the project build (see
+*                   'net_bsd.h  MODULE  Note #1bA'); the Network Socket Layer's 'NET_SOCK_TIMEOUT' data type
+*                   MUST be independently defined.
+*
+*                   However, for correct interoperability between the BSD 4.x Layer 'timeval' data type &
+*                   the Network Socket Layer's 'NET_SOCK_TIMEOUT' data type; ANY modification to either of
+*                   these data types MUST be appropriately synchronized.
+*
+*               See also 'net_bsd.h  BSD 4.x SOCKET DATA TYPES  Note #4'.
+*********************************************************************************************************
+*/
+
+typedef  struct  net_sock_timeout {                                     /* See Note #1a.                                */
+    CPU_INT32S      timeout_sec;
+    CPU_INT32S      timeout_us;
+} NET_SOCK_TIMEOUT;
+
+
+/*
+*********************************************************************************************************
+*                      NETWORK SOCKET (IDENTIFICATION) DESCRIPTOR SET DATA TYPE
+*
+* Note(s) : (1) (a) (1) IEEE Std 1003.1, 2004 Edition, Section 'sys/select.h : DESCRIPTION' states
+*                       that the "'fd_set' type ... shall [be] define[d] ... as a structure".
+*
+*                   (2) Stevens/Fenner/Rudoff, UNIX Network Programming, Volume 1, 3rd Edition,
+*                       6th Printing, Section 6.3, Pages 162-163 states that "descriptor sets [are]
+*                       typically an array of integers, with each bit in each integer corresponding
+*                       to a descriptor".
+*
+*               (b) Ideally, the Network Socket Layer's 'NET_SOCK_DESC' data type would be based on
+*                   the BSD 4.x Layer's 'fd_set' data type definition.  However, since BSD 4.x Layer
+*                   application programming interface (API) is NOT guaranteed to be present in the
+*                   project build (see 'net_bsd.h  MODULE  Note #1bA'); the Network Socket Layer's
+*                   'NET_SOCK_DESC' data type MUST be independently defined.
+*
+*                   However, for correct interoperability between the BSD 4.x Layer 'fd_set' data type
+*                   & the Network Socket Layer's 'NET_SOCK_DESC' data type; ANY modification to either
+*                   of these data types MUST be appropriately synchronized.
+*
+*               See also 'net_bsd.h  BSD 4.x SOCKET DATA TYPES  Note #5'.
+*********************************************************************************************************
+*/
+
+#define  NET_SOCK_DESC_NBR_MIN_DESC                               0
+#define  NET_SOCK_DESC_NBR_MAX_DESC           NET_SOCK_NBR_SOCK
+
+#define  NET_SOCK_DESC_NBR_MIN                                             0
+#define  NET_SOCK_DESC_NBR_MAX               (NET_SOCK_DESC_NBR_MAX_DESC - 1)
+
+#define  NET_SOCK_DESC_ARRAY_SIZE          (((NET_SOCK_DESC_NBR_MAX_DESC - 1) / (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS)) + 1)
+
+typedef  struct  net_sock_desc {                                                /* See Note #1a.                        */
+    CPU_DATA        SockID_DescNbrSet[NET_SOCK_DESC_ARRAY_SIZE];
+} NET_SOCK_DESC;
+
+
+/*
+*********************************************************************************************************
+*                       NETWORK SOCKET SECURITY CERTIFICATE & KEY INSTALLATION DEFINES
+*********************************************************************************************************
+*/
+
+typedef  enum  NET_SOCK_SECURE_TYPE {
+    NET_SOCK_SECURE_TYPE_NONE,
+    NET_SOCK_SECURE_TYPE_SERVER,
+    NET_SOCK_SECURE_TYPE_CLIENT
+} NET_SOCK_SECURE_TYPE;
+
+
+typedef enum net_sock_secure_cert_key_fmt {
+    NET_SOCK_SECURE_CERT_KEY_FMT_NONE,
+    NET_SOCK_SECURE_CERT_KEY_FMT_PEM,
+    NET_SOCK_SECURE_CERT_KEY_FMT_DER
+} NET_SOCK_SECURE_CERT_KEY_FMT;
+
+
+/*
+*********************************************************************************************************
+*                          NETWORK SECURE SOCKET FUNCTION POINTER DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef enum net_sock_secure_untrusted_reason {
+    NET_SOCK_SECURE_UNTRUSTED_BY_CA,
+    NET_SOCK_SECURE_EXPIRE_DATE,
+    NET_SOCK_SECURE_INVALID_DATE,
+    NET_SOCK_SECURE_SELF_SIGNED,
+    NET_SOCK_SECURE_UNKNOWN
+} NET_SOCK_SECURE_UNTRUSTED_REASON;
+
+typedef  CPU_BOOLEAN  (*NET_SOCK_SECURE_TRUST_FNCT)(void                              *,
+                                                    NET_SOCK_SECURE_UNTRUSTED_REASON   );
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+NET_SOCK_EXT  NET_SOCK          *NetSock_PoolPtr;                       /* Ptr to pool of free socks.                   */
+NET_SOCK_EXT  NET_STAT_POOL      NetSock_PoolStat;
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  NETWORK SOCKET DESCRIPTOR MACRO'S
+*
+* Description : Initialize, modify, & check network socket descriptor sets for multiplexed I/O functions.
+*
+* Argument(s) : desc_nbr    Socket descriptor number to initialize, modify, or check; when applicable.
+*
+*               p_desc_set  Pointer to a descriptor set.
+*
+* Return(s)   : Return values macro-dependent :
+*
+*                   none, for    network socket descriptor initialization & modification macro's.
+*
+*                   1,    if any network socket descriptor condition(s) satisfied.
+*
+*                   0,    otherwise.
+*
+*               See also 'net_bsd.h  BSD 4.x FILE DESCRIPTOR MACRO'S  Note #2a2'.
+*
+* Caller(s)   : Application.
+*
+*               These macro's are network protocol suite application programming interface (API) macro's
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) Ideally, network socket descriptor macro's ('NET_SOCK_DESC_&&&()') would be based
+*                   on the BSD 4.x Layer's file descriptor macro ('FD_&&&()') definitions.  However,
+*                   since  BSD 4.x Layer application programming interface (API) is NOT guaranteed to
+*                   be present in the project build (see 'net_bsd.h  MODULE  Note #1bA'); the network
+*                   socket descriptor macro's MUST be independently defined.
+*
+*                   However, for correct interoperability between network socket descriptor macro's
+*                   & BSD 4.x Layer file descriptor macro's; ANY modification to any of these macro
+*                   definitions MUST be appropriately synchronized.
+*
+*                   See also 'net_bsd.h  BSD 4.x FILE DESCRIPTOR MACRO'S  Note #3'.
+*********************************************************************************************************
+*/
+
+#define  NET_SOCK_DESC_COPY(p_desc_set_dest, p_desc_set_src)                                                                       \
+                                do {                                                                                               \
+                                    if ((((NET_SOCK_DESC *)(p_desc_set_dest)) != (NET_SOCK_DESC *)0) &&                            \
+                                        (((NET_SOCK_DESC *)(p_desc_set_src )) != (NET_SOCK_DESC *)0)) {                            \
+                                        Mem_Copy((void     *)     (&(((NET_SOCK_DESC *)(p_desc_set_dest))->SockID_DescNbrSet[0])), \
+                                                 (void     *)     (&(((NET_SOCK_DESC *)(p_desc_set_src ))->SockID_DescNbrSet[0])), \
+                                                 (CPU_SIZE_T)(sizeof(((NET_SOCK_DESC *)(p_desc_set_dest))->SockID_DescNbrSet)));   \
+                                    }                                                                                              \
+                                } while (0)
+
+#define  NET_SOCK_DESC_INIT(p_desc_set)                                                                                       \
+                                do {                                                                                          \
+                                    if  (((NET_SOCK_DESC *)(p_desc_set)) != (NET_SOCK_DESC *)0) {                             \
+                                        Mem_Clr ((void     *)     (&(((NET_SOCK_DESC *)(p_desc_set))->SockID_DescNbrSet[0])), \
+                                                 (CPU_SIZE_T)(sizeof(((NET_SOCK_DESC *)(p_desc_set))->SockID_DescNbrSet)));   \
+                                    }                                                                                         \
+                                } while (0)
+
+
+#define  NET_SOCK_DESC_CLR(desc_nbr, p_desc_set)                                                                                                                                \
+                                            do {                                                                                                                               \
+                                                if (((desc_nbr) >= NET_SOCK_DESC_NBR_MIN) &&                                                                                   \
+                                                    ((desc_nbr) <= NET_SOCK_DESC_NBR_MAX) &&                                                                                   \
+                                                                    (((NET_SOCK_DESC *)(p_desc_set)) != (NET_SOCK_DESC *)0)) {                                                  \
+                                                     DEF_BIT_CLR   ((((NET_SOCK_DESC *)(p_desc_set))->SockID_DescNbrSet[(desc_nbr) / (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS)]), \
+                                                     DEF_BIT                                                           ((desc_nbr) % (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS))); \
+                                                }                                                                                                                              \
+                                            } while (0)
+
+#define  NET_SOCK_DESC_SET(desc_nbr, p_desc_set)                                                                                                                                \
+                                            do {                                                                                                                               \
+                                                if (((desc_nbr) >= NET_SOCK_DESC_NBR_MIN) &&                                                                                   \
+                                                    ((desc_nbr) <= NET_SOCK_DESC_NBR_MAX) &&                                                                                   \
+                                                                    (((NET_SOCK_DESC *)(p_desc_set)) != (NET_SOCK_DESC *)0)) {                                                  \
+                                                     DEF_BIT_SET   ((((NET_SOCK_DESC *)(p_desc_set))->SockID_DescNbrSet[(desc_nbr) / (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS)]), \
+                                                     DEF_BIT                                                           ((desc_nbr) % (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS))); \
+                                                }                                                                                                                              \
+                                            } while (0)
+
+#define  NET_SOCK_DESC_IS_SET(desc_nbr, p_desc_set)                                                                                                                             \
+                                                  ((((desc_nbr) >= NET_SOCK_DESC_NBR_MIN) &&                                                                                   \
+                                                    ((desc_nbr) <= NET_SOCK_DESC_NBR_MAX) &&                                                                                   \
+                                                                    (((NET_SOCK_DESC *)(p_desc_set)) != (NET_SOCK_DESC *)0)) ?                                                  \
+                                                  (((DEF_BIT_IS_SET((((NET_SOCK_DESC *)(p_desc_set))->SockID_DescNbrSet[(desc_nbr) / (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS)]), \
+                                                     DEF_BIT                                                           ((desc_nbr) % (sizeof(CPU_DATA) * DEF_OCTET_NBR_BITS)))) \
+                                                  == DEF_YES) ? 1 : 0)                                                                                                         \
+                                                                  : 0)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Ideally, socket data handler functions should be defined as local functions.  However,
+*               since these handler functions are required as callback functions for network security
+*               manager port files; these handler functions MUST be defined as global functions.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+                                                                                        /* ------ SOCK API FNCTS ------ */
+NET_SOCK_ID         NetSock_Open                        (        NET_SOCK_PROTOCOL_FAMILY       protocol_family,
+                                                                 NET_SOCK_TYPE                  sock_type,
+                                                                 NET_SOCK_PROTOCOL              protocol,
+                                                                 NET_ERR                       *p_err);
+
+
+NET_SOCK_RTN_CODE   NetSock_Close                       (        NET_SOCK_ID                    sock_id,
+                                                                 NET_ERR                       *p_err);
+
+NET_SOCK_RTN_CODE   NetSock_Bind                        (        NET_SOCK_ID                    sock_id,
+                                                                 NET_SOCK_ADDR                 *paddr_local,
+                                                                 NET_SOCK_ADDR_LEN              addr_len,
+                                                                 NET_ERR                       *p_err);
+
+
+
+NET_SOCK_RTN_CODE   NetSock_Conn                        (        NET_SOCK_ID                    sock_id,
+                                                                 NET_SOCK_ADDR                 *paddr_remote,
+                                                                 NET_SOCK_ADDR_LEN              addr_len,
+                                                                 NET_ERR                       *p_err);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+NET_SOCK_RTN_CODE   NetSock_Listen                      (        NET_SOCK_ID                    sock_id,
+                                                                 NET_SOCK_Q_SIZE                sock_q_size,
+                                                                 NET_ERR                       *p_err);
+
+
+NET_SOCK_ID         NetSock_Accept                      (        NET_SOCK_ID                    sock_id,
+                                                                 NET_SOCK_ADDR                 *paddr_remote,
+                                                                 NET_SOCK_ADDR_LEN             *paddr_len,
+                                                                 NET_ERR                       *p_err);
+
+#endif  /* NET_SOCK_TYPE_STREAM_MODULE_EN */
+
+NET_SOCK_RTN_CODE   NetSock_RxDataFrom                  (        NET_SOCK_ID                    sock_id,
+                                                                 void                          *pdata_buf,
+                                                                 CPU_INT16U                     data_buf_len,
+                                                                 NET_SOCK_API_FLAGS             flags,
+                                                                 NET_SOCK_ADDR                 *paddr_remote,
+                                                                 NET_SOCK_ADDR_LEN             *paddr_len,
+                                                                 void                          *pip_opts_buf,
+                                                                 CPU_INT08U                     ip_opts_buf_len,
+                                                                 CPU_INT08U                    *pip_opts_len,
+                                                                 NET_ERR                       *p_err);
+
+NET_SOCK_RTN_CODE   NetSock_RxData                      (        NET_SOCK_ID                    sock_id,
+                                                                 void                          *pdata_buf,
+                                                                 CPU_INT16U                     data_buf_len,
+                                                                 NET_SOCK_API_FLAGS             flags,
+                                                                 NET_ERR                       *p_err);
+
+
+NET_SOCK_RTN_CODE   NetSock_TxDataTo                    (        NET_SOCK_ID                    sock_id,
+                                                                 void                          *p_data,
+                                                                 CPU_INT16U                     data_len,
+                                                                 NET_SOCK_API_FLAGS             flags,
+                                                                 NET_SOCK_ADDR                 *paddr_remote,
+                                                                 NET_SOCK_ADDR_LEN              addr_len,
+                                                                 NET_ERR                       *p_err);
+
+NET_SOCK_RTN_CODE   NetSock_TxData                      (        NET_SOCK_ID                    sock_id,
+                                                                 void                          *p_data,
+                                                                 CPU_INT16U                     data_len,
+                                                                 NET_SOCK_API_FLAGS             flags,
+                                                                 NET_ERR                       *p_err);
+
+#if (NET_SOCK_CFG_SEL_EN == DEF_ENABLED)
+NET_SOCK_RTN_CODE   NetSock_Sel                         (        NET_SOCK_QTY                   sock_nbr_max,
+                                                                 NET_SOCK_DESC                 *psock_desc_rd,
+                                                                 NET_SOCK_DESC                 *psock_desc_wr,
+                                                                 NET_SOCK_DESC                 *psock_desc_err,
+                                                                 NET_SOCK_TIMEOUT              *ptimeout,
+                                                                 NET_ERR                       *p_err);
+
+void                NetSock_SelAbort                    (        NET_SOCK_ID                    sock_id,
+                                                                 NET_ERR                       *p_err);
+#endif /* NET_SOCK_CFG_SEL_EN */
+
+
+CPU_BOOLEAN         NetSock_IsConn                      (        NET_SOCK_ID                    sock_id,
+                                                                 NET_ERR                       *p_err);
+
+
+                                                                                        /* ------ SOCK CFG FNCTS ------ */
+                                                                                        /* Cfg sock block  mode.        */
+CPU_BOOLEAN         NetSock_CfgBlock                    (        NET_SOCK_ID                    sock_id,
+                                                                 CPU_INT08U                     block,
+                                                                 NET_ERR                       *p_err);
+
+CPU_INT08U          NetSock_BlockGet                    (        NET_SOCK_ID                    sock_id,
+                                                                 NET_ERR                       *p_err);
+
+                                                                                        /* Cfg sock secure mode.        */
+CPU_BOOLEAN         NetSock_CfgSecure                   (        NET_SOCK_ID                    sock_id,
+                                                                 CPU_BOOLEAN                    secure,
+                                                                 NET_ERR                       *p_err);
+
+CPU_BOOLEAN         NetSock_CfgSecureServerCertKeyInstall(       NET_SOCK_ID                    sock_id,
+                                                          const  void                          *p_cert,
+                                                                 CPU_INT32U                     cert_len,
+                                                          const  void                          *p_key,
+                                                                 CPU_INT32U                     key_len,
+                                                                 NET_SOCK_SECURE_CERT_KEY_FMT   fmt,
+                                                                 CPU_BOOLEAN                    cert_chain,
+                                                                 NET_ERR                       *p_err);
+
+CPU_BOOLEAN         NetSock_CfgSecureClientCertKey       (       NET_SOCK_ID                    sock_id,
+                                                                 CPU_CHAR                       *p_cert,
+                                                                 CPU_INT32U                     cert_size,
+                                                                 CPU_CHAR                      *p_key,
+                                                                 CPU_INT32U                     key_size,
+                                                                 NET_SOCK_SECURE_CERT_KEY_FMT   fmt,
+                                                                 CPU_BOOLEAN                    cert_chain,
+                                                                 NET_ERR                       *p_err);
+
+
+CPU_BOOLEAN         NetSock_CfgSecureClientCommonName    (       NET_SOCK_ID                    sock_id,
+                                                                 CPU_CHAR                      *pcommon_name,
+                                                                 NET_ERR                       *p_err);
+
+CPU_BOOLEAN         NetSock_CfgSecureClientTrustCallBack (       NET_SOCK_ID                    sock_id,
+                                                                 NET_SOCK_SECURE_TRUST_FNCT     call_back_fnct,
+                                                                 NET_ERR                       *p_err);
+
+                                                                                        /* Cfg interface socket.        */
+CPU_BOOLEAN         NetSock_CfgIF                       (        NET_SOCK_ID                    sock_id,
+                                                                 NET_IF_NBR                     if_nbr,
+                                                                 NET_ERR                       *p_err);
+
+                                                                                        /* Cfg sock rx Q size.          */
+CPU_BOOLEAN         NetSock_CfgRxQ_Size                 (        NET_SOCK_ID                    sock_id,
+                                                                 NET_SOCK_DATA_SIZE             size,
+                                                                 NET_ERR                       *p_err);
+                                                                                        /* Cfg sock tx Q size.          */
+CPU_BOOLEAN         NetSock_CfgTxQ_Size                 (        NET_SOCK_ID                    sock_id,
+                                                                 NET_SOCK_DATA_SIZE             size,
+                                                                 NET_ERR                       *p_err);
+
+                                                                                    /* Cfg/set sock conn child Q size.  */
+CPU_BOOLEAN         NetSock_CfgConnChildQ_SizeSet       (        NET_SOCK_ID                    sock_id,
+                                                                 NET_SOCK_Q_SIZE                queue_size,
+                                                                 NET_ERR                       *p_err);
+
+                                                                                    /* Get     sock conn child Q size.  */
+NET_SOCK_Q_SIZE     NetSock_CfgConnChildQ_SizeGet       (        NET_SOCK_ID                    sock_id,
+                                                                 NET_ERR                       *p_err);
+
+CPU_BOOLEAN         NetSock_CfgTxNagle                  (        NET_SOCK_ID                   sock_id,
+                                                                 CPU_BOOLEAN                   nagle_en,
+                                                                 NET_ERR                      *p_err);
+
+
+#ifdef  NET_IPv4_MODULE_EN
+                                                                                        /* Cfg sock tx IP TOS.          */
+CPU_BOOLEAN         NetSock_CfgTxIP_TOS                 (        NET_SOCK_ID                   sock_id,
+                                                                 NET_IPv4_TOS                  ip_tos,
+                                                                 NET_ERR                      *p_err);
+
+                                                                                        /* Cfg sock tx IP TTL.          */
+CPU_BOOLEAN         NetSock_CfgTxIP_TTL                 (        NET_SOCK_ID                   sock_id,
+                                                                 NET_IPv4_TTL                  ip_ttl,
+                                                                 NET_ERR                      *p_err);
+
+                                                                                        /* Cfg sock tx IP TTL multicast.*/
+CPU_BOOLEAN         NetSock_CfgTxIP_TTL_Multicast       (        NET_SOCK_ID                   sock_id,
+                                                                 NET_IPv4_TTL                  ip_ttl,
+                                                                 NET_ERR                      *p_err);
+
+#endif  /* NET_IPv4_MODULE_EN */
+
+
+                                                                                        /* Cfg dflt sock rx Q   timeout.*/
+CPU_BOOLEAN         NetSock_CfgTimeoutRxQ_Dflt           (       NET_SOCK_ID                   sock_id,
+                                                                 NET_ERR                      *p_err);
+                                                                                        /* Cfg/set  sock rx Q   timeout.*/
+CPU_BOOLEAN         NetSock_CfgTimeoutRxQ_Set            (       NET_SOCK_ID                   sock_id,
+                                                                 CPU_INT32U                    timeout_ms,
+                                                                 NET_ERR                      *p_err);
+                                                                                        /* Get      sock rx Q   timeout.*/
+CPU_INT32U          NetSock_CfgTimeoutRxQ_Get_ms         (       NET_SOCK_ID                   sock_id,
+                                                                 NET_ERR                      *p_err);
+
+
+                                                                                        /* Cfg dflt sock tx Q   timeout.*/
+CPU_BOOLEAN         NetSock_CfgTimeoutTxQ_Dflt           (       NET_SOCK_ID                   sock_id,
+                                                                 NET_ERR                      *p_err);
+                                                                                        /* Cfg/set  sock tx Q   timeout.*/
+CPU_BOOLEAN         NetSock_CfgTimeoutTxQ_Set            (       NET_SOCK_ID                   sock_id,
+                                                                 CPU_INT32U                    timeout_ms,
+                                                                 NET_ERR                      *p_err);
+                                                                                        /* Get      sock tx Q   timeout.*/
+CPU_INT32U          NetSock_CfgTimeoutTxQ_Get_ms         (       NET_SOCK_ID                   sock_id,
+                                                                 NET_ERR                      *p_err);
+
+
+                                                                                        /* Cfg dflt sock conn   timeout.*/
+CPU_BOOLEAN         NetSock_CfgTimeoutConnReqDflt        (       NET_SOCK_ID                   sock_id,
+                                                                 NET_ERR                      *p_err);
+                                                                                        /* Cfg/set  sock conn   timeout.*/
+CPU_BOOLEAN         NetSock_CfgTimeoutConnReqSet         (       NET_SOCK_ID                   sock_id,
+                                                                 CPU_INT32U                    timeout_ms,
+                                                                 NET_ERR                      *p_err);
+                                                                                        /* Get      sock conn   timeout.*/
+CPU_INT32U          NetSock_CfgTimeoutConnReqGet_ms      (       NET_SOCK_ID                   sock_id,
+                                                                 NET_ERR                      *p_err);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+                                                                                        /* Cfg dflt sock accept timeout.*/
+CPU_BOOLEAN         NetSock_CfgTimeoutConnAcceptDflt     (       NET_SOCK_ID                   sock_id,
+                                                                 NET_ERR                      *p_err);
+                                                                                        /* Cfg/set  sock accept timeout.*/
+CPU_BOOLEAN         NetSock_CfgTimeoutConnAcceptSet      (       NET_SOCK_ID                   sock_id,
+                                                                 CPU_INT32U                    timeout_ms,
+                                                                 NET_ERR                      *p_err);
+                                                                                        /* Get      sock accept timeout.*/
+CPU_INT32U          NetSock_CfgTimeoutConnAcceptGet_ms   (       NET_SOCK_ID                   sock_id,
+                                                                 NET_ERR                      *p_err);
+#endif  /* NET_SOCK_TYPE_STREAM_MODULE_EN */
+
+                                                                                        /* Cfg dflt sock close  timeout.*/
+CPU_BOOLEAN         NetSock_CfgTimeoutConnCloseDflt      (       NET_SOCK_ID                   sock_id,
+                                                                 NET_ERR                      *p_err);
+                                                                                        /* Cfg/set  sock close  timeout.*/
+CPU_BOOLEAN         NetSock_CfgTimeoutConnCloseSet       (       NET_SOCK_ID                   sock_id,
+                                                                 CPU_INT32U                    timeout_ms,
+                                                                 NET_ERR                      *p_err);
+                                                                                        /* Get      sock close  timeout.*/
+CPU_INT32U          NetSock_CfgTimeoutConnCloseGet_ms    (       NET_SOCK_ID                   sock_id,
+                                                                 NET_ERR                      *p_err);
+
+
+NET_SOCK_RTN_CODE   NetSock_OptGet                       (       NET_SOCK_ID                   sock_id,
+                                                                 NET_SOCK_PROTOCOL             level,
+                                                                 NET_SOCK_OPT_NAME             opt_name,
+                                                                 void                         *popt_val,
+                                                                 NET_SOCK_OPT_LEN             *popt_len,
+                                                                 NET_ERR                      *p_err);
+
+NET_SOCK_RTN_CODE   NetSock_OptSet                       (       NET_SOCK_ID                   sock_id,
+                                                                 NET_SOCK_PROTOCOL             level,
+                                                                 NET_SOCK_OPT_NAME             opt_name,
+                                                                 void                         *popt_val,
+                                                                 NET_SOCK_OPT_LEN              opt_len,
+                                                                 NET_ERR                      *p_err);
+
+
+NET_STAT_POOL       NetSock_PoolStatGet                  (void);
+
+void                NetSock_PoolStatResetMaxUsed         (void);
+
+void                NetSock_GetLocalIPAddr               (       NET_SOCK_ID                   sock_id,
+                                                                 CPU_INT08U                   *p_buf_addr,
+                                                                 NET_SOCK_FAMILY              *p_family,
+                                                                 NET_ERR                      *p_err);
+
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void                NetSock_Init                        (        NET_ERR                       *p_err);
+
+
+                                                                                        /* --------- RX FNCTS --------- */
+void                NetSock_Rx                          (        NET_BUF                       *pbuf,
+                                                                 NET_ERR                       *p_err);
+
+
+void                NetSock_CloseFromConn               (        NET_SOCK_ID                    sock_id);
+
+
+void                NetSock_FreeConnFromSock            (        NET_SOCK_ID                    sock_id,
+                                                                 NET_CONN_ID                    conn_id);
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+void                NetSock_ConnChildAdd                (        NET_SOCK_ID                    sock_id,
+                                                                 NET_CONN_ID                    conn_id,
+                                                                 NET_ERR                       *p_err);
+
+void                NetSock_ConnSignalReq               (        NET_SOCK_ID                    sock_id,
+                                                                 NET_ERR                       *p_err);
+
+void                NetSock_ConnSignalAccept            (        NET_SOCK_ID                    sock_id,
+                                                                 NET_CONN_ID                    conn_id,
+                                                                 NET_ERR                       *p_err);
+
+void                NetSock_ConnSignalClose             (        NET_SOCK_ID                    sock_id,
+                                                                 CPU_BOOLEAN                    data_avail,
+                                                                 NET_ERR                       *p_err);
+
+NET_SOCK_RTN_CODE   NetSock_RxDataHandlerStream         (        NET_SOCK_ID                    sock_id,
+                                                                 NET_SOCK                      *psock,
+                                                                 void                          *pdata_buf,
+                                                                 CPU_INT16U                     data_buf_len,
+                                                                 NET_SOCK_API_FLAGS             flags,
+                                                                 NET_SOCK_ADDR                 *paddr_remote,
+                                                                 NET_SOCK_ADDR_LEN             *paddr_len,
+                                                                 NET_ERR                       *p_err);
+
+NET_SOCK_RTN_CODE   NetSock_TxDataHandlerStream         (        NET_SOCK_ID                    sock_id,
+                                                                 NET_SOCK                      *psock,
+                                                                 void                          *p_data,
+                                                                 CPU_INT16U                     data_len,
+                                                                 NET_SOCK_API_FLAGS             flags,
+                                                                 NET_ERR                       *p_err);
+#endif /* NET_SOCK_TYPE_STREAM_MODULE_EN */
+
+
+
+                                                                                        /* ---- SOCK STATUS FNCTS ----- */
+CPU_BOOLEAN         NetSock_IsUsed                   (NET_SOCK_ID   sock_id,
+                                                      NET_ERR      *p_err);
+
+NET_SOCK           *NetSock_GetObj                   (NET_SOCK_ID   sock_id);
+
+NET_CONN_ID         NetSock_GetConnTransportID       (NET_SOCK_ID   sock_id,
+                                                      NET_ERR      *p_err);
+
+                                                                                    /* Clr      sock rx Q signal.       */
+void                NetSock_RxQ_Clr                  (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Wait for sock rx Q signal.       */
+void                NetSock_RxQ_Wait                 (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Signal   sock rx Q.              */
+void                NetSock_RxQ_Signal               (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Abort    sock rx Q.              */
+void                NetSock_RxQ_Abort                (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+
+                                                                                    /* Set dflt sock rx Q timeout.      */
+void                NetSock_RxQ_TimeoutDflt          (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Set      sock rx Q timeout.      */
+void                NetSock_RxQ_TimeoutSet           (NET_SOCK     *p_sock,
+                                                      CPU_INT32U    timeout_ms,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Get      sock rx Q timeout.      */
+CPU_INT32U          NetSock_RxQ_TimeoutGet_ms        (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+                                                                                    /* Clr      sock conn signal.       */
+void                NetSock_ConnReqClr               (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Wait for sock conn signal.       */
+void                NetSock_ConnReqWait              (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Signal   sock conn.              */
+void                NetSock_ConnReqSignal            (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Abort    sock conn.              */
+void                NetSock_ConnReqAbort             (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+
+                                                                                    /* Set dflt sock conn timeout.      */
+void                NetSock_ConnReqTimeoutDflt       (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Set      sock conn timeout.      */
+void                NetSock_ConnReqTimeoutSet        (NET_SOCK     *p_sock,
+                                                      CPU_INT32U    timeout_ms,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Get      sock conn timeout.      */
+CPU_INT32U          NetSock_ConnReqTimeoutGet_ms     (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+
+
+                                                                                    /* Clr      sock accept Q signal.   */
+void                NetSock_ConnAcceptQ_SemClr        (NET_SOCK     *p_sock,
+                                                       NET_ERR      *p_err);
+                                                                                    /* Wait for sock accept Q signal.   */
+void                NetSock_ConnAcceptQ_Wait         (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Signal   sock accept Q.          */
+void                NetSock_ConnAcceptQ_Signal       (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Abort    sock accept Q wait.     */
+void                NetSock_ConnAcceptQ_Abort        (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+
+                                                                                    /* Set dflt sock accept Q timeout.  */
+void                NetSock_ConnAcceptQ_TimeoutDflt  (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Set      sock accept Q timeout.  */
+void                NetSock_ConnAcceptQ_TimeoutSet   (NET_SOCK     *p_sock,
+                                                      CPU_INT32U    timeout_ms,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Get      sock accept Q timeout.  */
+CPU_INT32U          NetSock_ConnAcceptQ_TimeoutGet_ms(NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+
+                                                                                    /* Clr      sock close signal.      */
+void                NetSock_ConnCloseClr             (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Wait for sock close signal.      */
+void                NetSock_ConnCloseWait            (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Signal   sock close.             */
+void                NetSock_ConnCloseSignal          (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Abort    sock close.             */
+void                NetSock_ConnCloseAbort           (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+
+                                                                                    /* Set dflt sock close timeout.     */
+void                NetSock_ConnCloseTimeoutDflt     (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Set      sock close timeout.     */
+void                NetSock_ConnCloseTimeoutSet      (NET_SOCK     *p_sock,
+                                                      CPU_INT32U    timeout_ms,
+                                                      NET_ERR      *p_err);
+                                                                                    /* Get      sock close timeout.     */
+CPU_INT32U          NetSock_ConnCloseTimeoutGet_ms   (NET_SOCK     *p_sock,
+                                                      NET_ERR      *p_err);
+#endif  /* NET_SOCK_TYPE_STREAM_MODULE_EN */
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#ifndef  NET_SOCK_NBR_SOCK
+#error  "NET_SOCK_NBR_SOCK                      not #define'd in 'net_cfg.h'"
+#error  "                                     [MUST be  >= NET_SOCK_NBR_MIN    ]"
+#error  "                                     [     &&  <= NET_SOCK_NBR_MAX    ]"
+
+#elif   (DEF_CHK_VAL(NET_SOCK_NBR_SOCK,     \
+                     NET_SOCK_NBR_MIN,          \
+                     NET_SOCK_NBR_MAX) != DEF_OK)
+#error  "NET_SOCK_NBR_SOCK                illegally #define'd in 'net_cfg.h'"
+#error  "                                     [MUST be  >= NET_SOCK_NBR_MIN    ]"
+#error  "                                     [     &&  <= NET_SOCK_NBR_MAX    ]"
+#endif
+
+
+
+
+#ifndef  NET_SOCK_CFG_SEL_EN
+#error  "NET_SOCK_CFG_SEL_EN                        not #define'd in 'net_cfg.h'"
+#error  "                                     [MUST be  DEF_DISABLED]           "
+#error  "                                     [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_SOCK_CFG_SEL_EN != DEF_DISABLED) && \
+        (NET_SOCK_CFG_SEL_EN != DEF_ENABLED ))
+#error  "NET_SOCK_CFG_SEL_EN                  illegally #define'd in 'net_cfg.h'"
+#error  "                                     [MUST be  DEF_DISABLED]           "
+#error  "                                     [     ||  DEF_ENABLED ]           "
+
+
+#endif
+
+
+#ifndef  NET_SOCK_CFG_RX_Q_SIZE_OCTET
+#error  "NET_SOCK_CFG_RX_Q_SIZE_OCTET               not #define'd in 'net_cfg.h'  "
+#error  "                                     [MUST be  >= NET_SOCK_DATA_SIZE_MIN]"
+#error  "                                     [     &&  <= NET_SOCK_DATA_SIZE_MIN]"
+
+#elif   (DEF_CHK_VAL(NET_SOCK_CFG_RX_Q_SIZE_OCTET,    \
+                     NET_SOCK_DATA_SIZE_MIN,          \
+                     NET_SOCK_DATA_SIZE_MAX) != DEF_OK)
+#error  "NET_SOCK_CFG_RX_Q_SIZE_OCTET         illegally #define'd in 'net_cfg.h'  "
+#error  "                                     [MUST be  >= NET_SOCK_DATA_SIZE_MIN]"
+#error  "                                     [     &&  <= NET_SOCK_DATA_SIZE_MIN]"
+#endif
+
+
+
+#ifndef  NET_SOCK_CFG_TX_Q_SIZE_OCTET
+#error  "NET_SOCK_CFG_TX_Q_SIZE_OCTET               not #define'd in 'net_cfg.h'  "
+#error  "                                     [MUST be  >= NET_SOCK_DATA_SIZE_MIN]"
+#error  "                                     [     &&  <= NET_SOCK_DATA_SIZE_MIN]"
+
+#elif   (DEF_CHK_VAL(NET_SOCK_CFG_TX_Q_SIZE_OCTET,    \
+                     NET_SOCK_DATA_SIZE_MIN,          \
+                     NET_SOCK_DATA_SIZE_MAX) != DEF_OK)
+#error  "NET_SOCK_CFG_TX_Q_SIZE_OCTET         illegally #define'd in 'net_cfg.h'  "
+#error  "                                     [MUST be  >= NET_SOCK_DATA_SIZE_MIN]"
+#error  "                                     [     &&  <= NET_SOCK_DATA_SIZE_MIN]"
+#endif
+
+
+
+
+
+#ifndef  NET_SOCK_DFLT_TIMEOUT_RX_Q_MS
+#error  "NET_SOCK_DFLT_TIMEOUT_RX_Q_MS               not #define'd in 'net_cfg.h' "
+#error  "                                     [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                     [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                     [     ||  == NET_TMR_TIME_INFINITE]"
+
+#elif  ((DEF_CHK_VAL(NET_SOCK_DFLT_TIMEOUT_RX_Q_MS,                                   \
+                     NET_TIMEOUT_MIN_mS,                                             \
+                     NET_TIMEOUT_MAX_mS) != DEF_OK)                  &&              \
+     (!((DEF_CHK_VAL_MIN(NET_SOCK_DFLT_TIMEOUT_RX_Q_MS, 0) == DEF_OK) &&              \
+                        (NET_SOCK_DFLT_TIMEOUT_RX_Q_MS     == NET_TMR_TIME_INFINITE))))
+#error  "NET_SOCK_DFLT_TIMEOUT_RX_Q_MS         illegally #define'd in 'net_cfg.h' "
+#error  "                                     [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                     [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                     [     ||  == NET_TMR_TIME_INFINITE]"
+#endif
+
+
+
+#ifdef  NET_SOCK_TYPE_STREAM_MODULE_EN
+
+#ifndef  NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS
+#error  "NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS           not #define'd in 'net_cfg.h' "
+#error  "                                     [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                     [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                     [     ||  == NET_TMR_TIME_INFINITE]"
+
+#elif  ((DEF_CHK_VAL(NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS,                                   \
+                     NET_TIMEOUT_MIN_mS,                                              \
+                     NET_TIMEOUT_MAX_mS) != DEF_OK)                   &&              \
+     (!((DEF_CHK_VAL_MIN(NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS, 0) == DEF_OK) &&              \
+                        (NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS     == NET_TMR_TIME_INFINITE))))
+#error  "NET_SOCK_DFLT_TIMEOUT_CONN_REQ_MS     illegally #define'd in 'net_cfg.h' "
+#error  "                                     [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                     [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                     [     ||  == NET_TMR_TIME_INFINITE]"
+#endif
+
+
+
+#ifndef  NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS
+#error  "NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS        not #define'd in 'net_cfg.h' "
+#error  "                                     [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                     [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                     [     ||  == NET_TMR_TIME_INFINITE]"
+
+#elif  ((DEF_CHK_VAL(NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS,                                   \
+                     NET_TIMEOUT_MIN_mS,                                                    \
+                     NET_TIMEOUT_MAX_mS) != DEF_OK)                         &&              \
+     (!((DEF_CHK_VAL_MIN(NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS, 0) == DEF_OK) &&              \
+                        (NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS     == NET_TMR_TIME_INFINITE))))
+#error  "NET_SOCK_DFLT_TIMEOUT_CONN_ACCEPT_MS  illegally #define'd in 'net_cfg.h' "
+#error  "                                     [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                     [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                     [     ||  == NET_TMR_TIME_INFINITE]"
+#endif
+
+
+#if 0
+#ifndef  NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS
+#error  "NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS         not #define'd in 'net_cfg.h' "
+#error  "                                     [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                     [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                     [     ||  == NET_TMR_TIME_INFINITE]"
+
+#elif  ((DEF_CHK_VAL(NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS,                                   \
+                    NET_TIMEOUT_MIN_mS,                                                    \
+                    NET_TIMEOUT_MAX_mS) != DEF_OK)                         &&              \
+     (!((DEF_CHK_VAL_MIN(NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS, 0) == DEF_OK) &&              \
+                        (NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS     == NET_TMR_TIME_INFINITE))))
+#error  "NET_SOCK_DFLT_TIMEOUT_CONN_CLOSE_MS   illegally #define'd in 'net_cfg.h' "
+#error  "                                     [MUST be  >= NET_TIMEOUT_MIN_mS]"
+#error  "                                     [     &&  <= NET_TIMEOUT_MAX_mS]"
+#error  "                                     [     ||  == NET_TMR_TIME_INFINITE]"
+#endif
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_SOCK_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_stat.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_stat.c
new file mode 100644
index 0000000..442d7d7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_stat.c
@@ -0,0 +1,821 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     NETWORK STATISTICS MANAGEMENT
+*
+* Filename      : net_stat.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_STAT_MODULE
+#include  "net_stat.h"
+#include  "net_ctr.h"
+#include  "net_err.h"
+
+
+/*
+*********************************************************************************************************
+*                                            NetStat_Init()
+*
+* Description : (1) Initialize Network Statistic Management Module :
+*
+*                   Module initialization NOT yet required/implemented
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetStat_Init (void)
+{
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetStat_CtrInit()
+*
+* Description : Initialize a statistics counter.
+*
+* Argument(s) : p_stat_ctr  Pointer to a statistics counter (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics counter successfully initialized.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_ctr' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Assumes 'p_stat_ctr' points to valid statistics counter (if non-NULL).
+*
+*               (2) Statistic counters MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_CtrInit (NET_STAT_CTR  *p_stat_ctr,
+                       NET_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_stat_ctr == (NET_STAT_CTR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    p_stat_ctr->CurCtr = 0u;
+    p_stat_ctr->MaxCtr = 0u;
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_STAT_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetStat_CtrClr()
+*
+* Description : Clear a statistics counter.
+*
+* Argument(s) : p_stat_ctr  Pointer to a statistics counter (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics counter successfully cleared.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_ctr' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Assumes 'p_stat_ctr' points to valid statistics counter (if non-NULL).
+*
+*               (2) Statistic counters MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_CtrClr (NET_STAT_CTR  *p_stat_ctr,
+                      NET_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_stat_ctr == (NET_STAT_CTR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    p_stat_ctr->CurCtr = 0u;
+    p_stat_ctr->MaxCtr = 0u;
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_STAT_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetStat_CtrReset()
+*
+* Description : Reset a statistics counter.
+*
+* Argument(s) : p_stat_ctr  Pointer to a statistics counter.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics counter successfully reset.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_ctr' passed a NULL pointer.
+*                               NET_STAT_ERR_INVALID_TYPE       Invalid statistics counter type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Statistic counters MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_CtrReset (NET_STAT_CTR  *p_stat_ctr,
+                        NET_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_stat_ctr == (NET_STAT_CTR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    p_stat_ctr->CurCtr = 0u;
+    p_stat_ctr->MaxCtr = 0u;
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_STAT_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetStat_CtrResetMax()
+*
+* Description : Reset a statistics counter's maximum number of counts.
+*
+*               (1) Resets maximum number of counts to the current number of counts.
+*
+*
+* Argument(s) : p_stat_ctr  Pointer to a statistics counter.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics counter's maximum number of
+*                                                                   counts successfully reset.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_ctr' passed a NULL pointer.
+*                               NET_STAT_ERR_INVALID_TYPE       Invalid statistics counter type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Statistic counters MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_CtrResetMax (NET_STAT_CTR  *p_stat_ctr,
+                           NET_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_stat_ctr == (NET_STAT_CTR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    p_stat_ctr->MaxCtr = p_stat_ctr->CurCtr;                    /* Reset max cnts (see Note #1).                        */
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_STAT_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetStat_CtrInc()
+*
+* Description : Increment a statistics counter.
+*
+* Argument(s) : p_stat_ctr  Pointer to a statistics counter.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics counter successfully incremented
+*                                                                   (see Note #2).
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_ctr' passed a NULL pointer.
+*                               NET_STAT_ERR_INVALID_TYPE       Invalid statistics counter type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Statistic counters MUST ALWAYS be accessed exclusively in critical sections.
+*
+*               (2) Statistic counter increment overflow prevented but ignored.
+*
+*                   See also 'NetStat_CtrDec()  Note #2'.
+*********************************************************************************************************
+*/
+
+void  NetStat_CtrInc (NET_STAT_CTR  *p_stat_ctr,
+                      NET_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_stat_ctr == (NET_STAT_CTR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    if (p_stat_ctr->CurCtr < NET_CTR_MAX) {                     /* See Note #2.                                         */
+        p_stat_ctr->CurCtr++;
+
+        if (p_stat_ctr->MaxCtr < p_stat_ctr->CurCtr) {          /* If max cnt < cur cnt, set new max cnt.               */
+            p_stat_ctr->MaxCtr = p_stat_ctr->CurCtr;
+        }
+    }
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_STAT_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetStat_CtrDec()
+*
+* Description : Decrement a statistics counter.
+*
+* Argument(s) : p_stat_ctr  Pointer to a statistics counter.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics counter successfully decremented
+*                                                                   (see Note #2).
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_ctr' passed a NULL pointer.
+*                               NET_STAT_ERR_INVALID_TYPE       Invalid statistics counter type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Statistic counters MUST ALWAYS be accessed exclusively in critical sections.
+*
+*               (2) Statistic counter decrement underflow prevented but ignored.
+*
+*                   See also 'NetStat_CtrInc()  Note #2'.
+*********************************************************************************************************
+*/
+
+void  NetStat_CtrDec (NET_STAT_CTR  *p_stat_ctr,
+                      NET_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_stat_ctr == (NET_STAT_CTR *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    if (p_stat_ctr->CurCtr > NET_CTR_MIN) {                     /* See Note #2.                                         */
+        p_stat_ctr->CurCtr--;
+    }
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_STAT_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetStat_PoolInit()
+*
+* Description : Initialize a statistics pool.
+*
+* Argument(s) : p_stat_pool Pointer to a statistics pool (see Note #1).
+*
+*               nbr_avail   Total number of available statistics pool entries.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics pool successfully initialized.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_pool' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Assumes 'p_stat_pool' points to valid statistics pool (if non-NULL).
+*
+*               (2) Pool statistic entries MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_PoolInit (NET_STAT_POOL      *p_stat_pool,
+                        NET_STAT_POOL_QTY   nbr_avail,
+                        NET_ERR            *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_stat_pool == (NET_STAT_POOL *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    p_stat_pool->EntriesInit       = nbr_avail;                 /* Init nbr of pool  entries is also ...                */
+    p_stat_pool->EntriesTot        = nbr_avail;                 /* Tot  nbr of pool  entries is also ...                */
+    p_stat_pool->EntriesAvail      = nbr_avail;                 /* Init nbr of avail entries.                           */
+    p_stat_pool->EntriesUsed       = 0u;
+    p_stat_pool->EntriesUsedMax    = 0u;
+    p_stat_pool->EntriesLostCur    = 0u;
+    p_stat_pool->EntriesLostTot    = 0u;
+    p_stat_pool->EntriesAllocCtr   = 0u;
+    p_stat_pool->EntriesDeallocCtr = 0u;
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_STAT_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetStat_PoolClr()
+*
+* Description : Clear a statistics pool.
+*
+* Argument(s) : p_stat_pool Pointer to a statistics pool (see Note #1).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics pool successfully cleared.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_pool' passed a NULL pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Assumes 'p_stat_pool' points to valid statistics pool (if non-NULL).
+*
+*               (2) Pool statistic entries MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_PoolClr (NET_STAT_POOL  *p_stat_pool,
+                       NET_ERR        *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_stat_pool == (NET_STAT_POOL *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    p_stat_pool->EntriesInit       = 0u;
+    p_stat_pool->EntriesTot        = 0u;
+    p_stat_pool->EntriesAvail      = 0u;
+    p_stat_pool->EntriesUsed       = 0u;
+    p_stat_pool->EntriesUsedMax    = 0u;
+    p_stat_pool->EntriesLostCur    = 0u;
+    p_stat_pool->EntriesLostTot    = 0u;
+    p_stat_pool->EntriesAllocCtr   = 0u;
+    p_stat_pool->EntriesDeallocCtr = 0u;
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_STAT_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetStat_PoolReset()
+*
+* Description : Reset a statistics pool.
+*
+*               (1) Assumes object pool is also reset; otherwise, statistics pool will NOT accurately
+*                   reflect the state of the object pool.
+*
+*
+* Argument(s) : p_stat_pool Pointer to a statistics pool.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics pool successfully reset.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_pool' passed a NULL pointer.
+*                               NET_STAT_ERR_INVALID_TYPE       Invalid statistics pool type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Pool statistic entries MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_PoolReset (NET_STAT_POOL  *p_stat_pool,
+                         NET_ERR        *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_stat_pool == (NET_STAT_POOL *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    p_stat_pool->EntriesAvail      = p_stat_pool->EntriesTot;
+    p_stat_pool->EntriesUsed       = 0u;
+    p_stat_pool->EntriesUsedMax    = 0u;
+    p_stat_pool->EntriesLostCur    = 0u;
+    p_stat_pool->EntriesAllocCtr   = 0u;
+    p_stat_pool->EntriesDeallocCtr = 0u;
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_STAT_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetStat_PoolResetUsedMax()
+*
+* Description : Reset a statistics pool's maximum number of entries used.
+*
+*               (1) Resets maximum number of entries used to the current number of entries used.
+*
+*
+* Argument(s) : p_stat_pool Pointer to a statistics pool.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics pool's maximum number of entries
+*                                                                   used successfully reset.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_pool' passed a NULL pointer.
+*                               NET_STAT_ERR_INVALID_TYPE       Invalid statistics pool type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) Pool statistic entries MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_PoolResetUsedMax (NET_STAT_POOL  *p_stat_pool,
+                                NET_ERR        *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_stat_pool == (NET_STAT_POOL *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    p_stat_pool->EntriesUsedMax = p_stat_pool->EntriesUsed;     /* Reset nbr max used (see Note #1).                    */
+    CPU_CRITICAL_EXIT();
+
+
+   *p_err = NET_STAT_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetStat_PoolEntryUsedInc()
+*
+* Description : Increment a statistics pool's number of 'Used' entries.
+*
+* Argument(s) : p_stat_pool  Pointer to a statistics pool.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics pool's number used
+*                                                                   successfully incremented.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_pool' passed a NULL pointer.
+*                               NET_STAT_ERR_INVALID_TYPE       Invalid statistics pool type.
+*                               NET_STAT_ERR_POOL_NONE_AVAIL    NO available statistics pool entries; i.e.
+*                                                                   number of available entries already zero.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Pool statistic entries MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_PoolEntryUsedInc (NET_STAT_POOL  *p_stat_pool,
+                                NET_ERR        *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_stat_pool == (NET_STAT_POOL *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    if (p_stat_pool->EntriesAvail > 0) {                            /* If any stat pool entry avail,             ...    */
+        p_stat_pool->EntriesAvail--;                                /* ... adj nbr of avail/used entries in pool ...    */
+        p_stat_pool->EntriesUsed++;
+        p_stat_pool->EntriesAllocCtr++;                             /* ... & inc tot nbr of alloc'd entries.            */
+        if (p_stat_pool->EntriesUsedMax < p_stat_pool->EntriesUsed) { /* If max used < nbr used, set new max used.      */
+            p_stat_pool->EntriesUsedMax = p_stat_pool->EntriesUsed;
+        }
+
+       *p_err = NET_STAT_ERR_NONE;
+
+    } else {
+       *p_err = NET_STAT_ERR_POOL_NONE_AVAIL;
+    }
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetStat_PoolEntryUsedDec()
+*
+* Description : Decrement a statistics pool's number of 'Used' entries.
+*
+* Argument(s) : p_stat_pool  Pointer to a statistics pool.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics pool's number used
+*                                                                   successfully decremented.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_pool' passed a NULL pointer.
+*                               NET_STAT_ERR_INVALID_TYPE       Invalid statistics pool type.
+*                               NET_STAT_ERR_POOL_NONE_USED     NO used statistics pool entries; i.e.
+*                                                                   number of used entries already zero.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Pool statistic entries MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_PoolEntryUsedDec (NET_STAT_POOL  *p_stat_pool,
+                                NET_ERR        *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_stat_pool == (NET_STAT_POOL *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    if (p_stat_pool->EntriesUsed > 0) {                         /* If any stat pool entry used,              ...        */
+        p_stat_pool->EntriesAvail++;                            /* ... adj nbr of avail/used entries in pool ...        */
+        p_stat_pool->EntriesUsed--;
+        p_stat_pool->EntriesDeallocCtr++;                       /* ... & inc tot nbr of dealloc'd entries.              */
+
+       *p_err = NET_STAT_ERR_NONE;
+
+    } else {
+       *p_err = NET_STAT_ERR_POOL_NONE_USED;
+    }
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetStat_PoolEntryLostInc()
+*
+* Description : Increment a statistics pool's number of 'Lost' entries.
+*
+* Argument(s) : p_stat_pool Pointer to a statistics pool.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_STAT_ERR_NONE               Statistics pool's number lost
+*                                                                   successfully incremented.
+*                               NET_ERR_FAULT_NULL_PTR           Argument 'p_stat_pool' passed a NULL pointer.
+*                               NET_STAT_ERR_INVALID_TYPE       Invalid statistics pool type.
+*                               NET_STAT_ERR_POOL_NONE_REM      NO statistics pool entries remaining; i.e.
+*                                                                   total number of entries already zero.
+*                               NET_STAT_ERR_POOL_NONE_USED     NO used statistics pool entries; i.e.
+*                                                                   number of used entries is zero.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Pool statistic entries MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+void  NetStat_PoolEntryLostInc (NET_STAT_POOL  *p_stat_pool,
+                                NET_ERR        *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_stat_pool == (NET_STAT_POOL *)0) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Stat.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    if (p_stat_pool->EntriesTot > 0) {                          /* If   tot stat pool entries > 0  ...                  */
+        if (p_stat_pool->EntriesUsed > 0) {                     /* ... & any stat pool entry used, ...                  */
+            p_stat_pool->EntriesUsed--;                         /* ... adj nbr used/total/lost entries in pool.         */
+            p_stat_pool->EntriesTot--;
+            p_stat_pool->EntriesLostCur++;
+            p_stat_pool->EntriesLostTot++;
+
+           *p_err = NET_STAT_ERR_NONE;
+        } else {
+           *p_err = NET_STAT_ERR_POOL_NONE_USED;
+        }
+
+    } else {
+       *p_err = NET_STAT_ERR_POOL_NONE_REM;
+    }
+    CPU_CRITICAL_EXIT();
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_stat.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_stat.h
new file mode 100644
index 0000000..88c51f7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_stat.h
@@ -0,0 +1,262 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     NETWORK STATISTICS MANAGEMENT
+*
+* Filename      : net_stat.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  
+#include  "net_ctr.h"
+#include  "net_err.h"
+#include  "net_type.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_STAT_MODULE_PRESENT
+#define  NET_STAT_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                              NETWORK STATISTICS POOL QUANTITY DATA TYPE
+*
+* Note(s) : (1) Statistics pool quantity data type MUST be configured with an appropriate-sized network
+*               data type large enough to perform calculations on the following data types :
+*
+*               (a) NET_BUF_QTY
+*               (b) NET_TMR_QTY
+*               (c) NET_CONN_QTY
+*               (d) NET_CONN_LIST_QTY
+*               (e) NET_ARP_CACHE_QTY
+*               (f) NET_ICMP_SRC_QUENCH_QTY
+*               (g) NET_TCP_CONN_QTY
+*               (h) NET_SOCK_QTY
+*
+*           (2) NET_STAT_POOL_NBR_MAX  SHOULD be #define'd based on 'NET_STAT_POOL_QTY' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_STAT_POOL_QTY;                         /* Defines max qty of stat pool entries to support.     */
+
+#define  NET_STAT_POOL_NBR_MIN                             1
+#define  NET_STAT_POOL_NBR_MAX           DEF_INT_16U_MAX_VAL    /* See Note #2.                                         */
+
+#define  NET_STAT_POOL_MIN_VAL                             0
+#define  NET_STAT_POOL_MAX_VAL    (NET_STAT_POOL_NBR_MAX - 1)
+
+
+/*
+*********************************************************************************************************
+*                                NETWORK STATISTICS COUNTER DATA TYPE
+*
+* Note(s) : (1) Counter statistic entries MUST ALWAYS be accessed exclusively in critical sections.
+*
+*           (2) (a) 'CurCtr' tracks the current counter value; & ...
+*               (b) 'MaxCtr' tracks the maximum counter value at any one time.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET STAT CTR ------------------- */
+typedef  struct  net_stat_ctr {
+    NET_CTR             CurCtr;                                 /* Cur ctr val.                                         */
+    NET_CTR             MaxCtr;                                 /* Max ctr val.                                         */
+} NET_STAT_CTR;
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK STATISTICS POOL DATA TYPE
+*
+* Note(s) : (1) Pool statistic entries MUST ALWAYS be accessed exclusively in critical sections.
+*
+*           (2) (a) 'EntriesInit'/'EntriesTot' indicate the initial/current total number of entries in
+*                    the statistics pool.
+*
+*               (b) 'EntriesAvail'/'EntriesUsed' track the current number of entries available/used
+*                    from the statistics pool, while 'EntriesUsedMax' tracks the maximum number of
+*                    entries used at any one time.
+*
+*               (c) 'EntriesLostCur'/'EntriesLostTot' track the current/total number of unrecoverable
+*                    invalid/corrupted entries lost from the statistics pool.  Lost entries MUST be
+*                    determined by the owner of the statistics pool.
+*
+*               (d) 'EntriesAllocCtr'/'EntriesDeallocCtr' track the current number of allocated/
+*                    deallocated entries in the statistics pool.
+*
+*           (3) Assuming statistics pool are always accessed in critical sections (see Note #2), the
+*               following equations for statistics pools are true at all times :
+*
+*                       EntriesInit = EntriesTot   + EntriesLostTot
+*
+*                       EntriesTot  = EntriesAvail + EntriesUsed
+*
+*                       EntriesUsed = EntriesAllocCtr - EntriesDeallocCtr - EntriesLostCur
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET STAT POOL ------------------ */
+typedef  struct  net_stat_pool {
+    NET_STAT_POOL_QTY   EntriesInit;                            /* Init  nbr entries      in   pool.                    */
+    NET_STAT_POOL_QTY   EntriesTot;                             /* Tot   nbr entries      in   pool.                    */
+    NET_STAT_POOL_QTY   EntriesAvail;                           /* Avail nbr entries      in   pool.                    */
+    NET_STAT_POOL_QTY   EntriesUsed;                            /* Used  nbr entries      from pool.                    */
+    NET_STAT_POOL_QTY   EntriesUsedMax;                         /* Max   nbr entries used from pool.                    */
+    NET_STAT_POOL_QTY   EntriesLostCur;                         /* Cur   nbr entries lost from pool.                    */
+    NET_STAT_POOL_QTY   EntriesLostTot;                         /* Tot   nbr entries lost from pool.                    */
+
+    NET_CTR             EntriesAllocCtr;                        /* Tot   nbr entries successfully   alloc'd.            */
+    NET_CTR             EntriesDeallocCtr;                      /* Tot   nbr entries successfully dealloc'd.            */
+} NET_STAT_POOL;
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void  NetStat_Init            (void);
+
+
+
+                                                                            /* --------- NET STAT CTR  FNCTS ---------- */
+void  NetStat_CtrInit         (NET_STAT_CTR       *p_stat_ctr,
+                               NET_ERR            *p_err);
+
+void  NetStat_CtrClr          (NET_STAT_CTR       *p_stat_ctr,
+                               NET_ERR            *p_err);
+
+
+void  NetStat_CtrReset        (NET_STAT_CTR       *p_stat_ctr,
+                               NET_ERR            *p_err);
+
+void  NetStat_CtrResetMax     (NET_STAT_CTR       *p_stat_ctr,
+                               NET_ERR            *p_err);
+
+
+void  NetStat_CtrInc          (NET_STAT_CTR       *p_stat_ctr,
+                               NET_ERR            *p_err);
+
+void  NetStat_CtrDec          (NET_STAT_CTR       *p_stat_ctr,
+                               NET_ERR            *p_err);
+
+
+
+                                                                            /* --------- NET STAT POOL FNCTS ---------- */
+void  NetStat_PoolInit        (NET_STAT_POOL      *p_stat_pool,
+                               NET_STAT_POOL_QTY   nbr_avail,
+                               NET_ERR            *p_err);
+
+void  NetStat_PoolClr         (NET_STAT_POOL      *p_stat_pool,
+                               NET_ERR            *p_err);
+
+
+void  NetStat_PoolReset       (NET_STAT_POOL      *p_stat_pool,
+                               NET_ERR            *p_err);
+
+void  NetStat_PoolResetUsedMax(NET_STAT_POOL      *p_stat_pool,
+                               NET_ERR            *p_err);
+
+
+void  NetStat_PoolEntryUsedInc(NET_STAT_POOL      *p_stat_pool,
+                               NET_ERR            *p_err);
+
+void  NetStat_PoolEntryUsedDec(NET_STAT_POOL      *p_stat_pool,
+                               NET_ERR            *p_err);
+
+void  NetStat_PoolEntryLostInc(NET_STAT_POOL      *p_stat_pool,
+                               NET_ERR            *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* NET_STAT_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tcp.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tcp.c
new file mode 100644
index 0000000..52360c5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tcp.c
@@ -0,0 +1,31235 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK TCP LAYER
+*                                   (TRANSMISSION CONTROL PROTOCOL)
+*
+* Filename      : net_tcp.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*********************************************************************************************************
+* Note(s)       : (1) Supports Transmission Control Protocol as described in RFC #793 with the following
+*                     restrictions/constraints :
+*
+*                     (a) TCP Security & Precedence NOT supported               RFC # 793, Section 3.6
+*
+*                     (b) TCP Urgent Data           NOT supported               RFC # 793, Section 3.7
+*                                                                                'The Communication of
+*                                                                                  Urgent Information'
+*
+*                     (c) The following TCP options NOT supported :
+*
+*                         (1) Window Scale                                      RFC #1072, Section 2
+*                                                                               RFC #1323, Section 2
+*                         (2) Selective Acknowledgement (SACK)                  RFC #1072, Section 3
+*                                                                               RFC #2018
+*                                                                               RFC #2883
+*                         (3) TCP Echo                                          RFC #1072, Section 4
+*                         (4) Timestamp                                         RFC #1323, Section 3.2
+*                         (5) Protection Against Wrapped Sequences (PAWS)       RFC #1323, Section 4
+*
+*                     (d) IP-Options-to-TCP-Connection                          RFC #1122, Section 4.2.3.8
+*                                Handling NOT supported #### NET-804
+*
+*                     (e) ICMP-Error-Message-to-TCP-Connection                  RFC #1122, Section 4.2.3.9
+*                                Handling NOT currently supported #### NET-805
+*
+*                 (2) TCP Layer assumes/requires Network Socket Layer (see 'net_sock.h  MODULE  Note #1a2').
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_TCP_MODULE
+#include  "net_tcp.h"
+#include  "net_cfg_net.h"
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_icmpv4.h"
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_icmpv6.h"
+#endif
+
+
+#include  "net.h"
+#include  "net_buf.h"
+#include  "net_conn.h"
+#include  "net_util.h"
+#include  "../IF/net_if.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_TCP_MODULE_EN
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_RX_Q_NAME               "Net TCP Rx Q signal"
+#define  NET_TCP_TX_Q_NAME               "Net TCP Tx Q signal"
+
+/*
+*********************************************************************************************************
+*                              TCP CONNECTION CONFIGURATION CODE DEFINES
+*
+* Note(s) : (1) (a) TCP connection configuration codes used as arguments for various NetTCP_ConnCfg() functions.
+*
+*               (b) TCP connection configuration codes bit-field flags logically OR'd.
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_CONN_CFG_NONE                           DEF_BIT_NONE
+
+
+#define  NET_TCP_CONN_CFG_MAX_SEG_SIZE_LOCAL             DEF_BIT_00
+#define  NET_TCP_CONN_CFG_MAX_SEG_SIZE_REMOTE            DEF_BIT_01
+#define  NET_TCP_CONN_CFG_MAX_SEG_SIZE_CONN              DEF_BIT_02
+#define  NET_TCP_CONN_CFG_MAX_SEG_SIZE_ALL              (NET_TCP_CONN_CFG_MAX_SEG_SIZE_LOCAL  | \
+                                                         NET_TCP_CONN_CFG_MAX_SEG_SIZE_REMOTE | \
+                                                         NET_TCP_CONN_CFG_MAX_SEG_SIZE_CONN   )
+
+#define  NET_TCP_CONN_CFG_MAX_SEG_SIZE_MASK              NET_TCP_CONN_CFG_MAX_SEG_SIZE_ALL
+
+
+#define  NET_TCP_CONN_CFG_WIN_SIZE_RX                    DEF_BIT_02
+#define  NET_TCP_CONN_CFG_WIN_SIZE_TX                    DEF_BIT_03
+#define  NET_TCP_CONN_CFG_WIN_SIZE_CONN                 (NET_TCP_CONN_CFG_WIN_SIZE_RX | \
+                                                         NET_TCP_CONN_CFG_WIN_SIZE_TX )
+#define  NET_TCP_CONN_CFG_WIN_SIZE_ALL                   NET_TCP_CONN_CFG_WIN_SIZE_CONN
+
+#define  NET_TCP_CONN_CFG_WIN_SIZE_MASK                  NET_TCP_CONN_CFG_WIN_SIZE_ALL
+
+
+#define  NET_TCP_CONN_CFG_TX_RTT_RTO                     DEF_BIT_04
+
+
+#define  NET_TCP_CONN_CFG_ALL                           (NET_TCP_CONN_CFG_NONE             | \
+                                                         NET_TCP_CONN_CFG_MAX_SEG_SIZE_ALL | \
+                                                         NET_TCP_CONN_CFG_WIN_SIZE_ALL     | \
+                                                         NET_TCP_CONN_CFG_TX_RTT_RTO       )
+
+
+/*
+*********************************************************************************************************
+*                               TCP CONNECTION CLOSE/FREE CODE DEFINES
+*
+* Note(s) : (1) (a) TCP connection close codes used as arguments for various NetTCP_ConnClose() functions.
+*
+*               (b) TCP connection close codes bit-field flags logically OR'd.
+*
+*           (2) Available TCP connection free codes are identical to TCP connection close codes.
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_CONN_CLOSE_NONE                         DEF_BIT_NONE
+
+
+#define  NET_TCP_CONN_CLOSE_CONN_NONE                    DEF_BIT_NONE
+#define  NET_TCP_CONN_CLOSE_CONN_TX_RESET                DEF_BIT_00
+#define  NET_TCP_CONN_CLOSE_CONN_ALL                    (NET_TCP_CONN_CLOSE_CONN_NONE    | \
+                                                         NET_TCP_CONN_CLOSE_CONN_TX_RESET)
+
+#define  NET_TCP_CONN_CLOSE_CONN_MASK                    NET_TCP_CONN_CLOSE_CONN_ALL
+
+
+#define  NET_TCP_CONN_CLOSE_TMR_NONE                     DEF_BIT_NONE
+#define  NET_TCP_CONN_CLOSE_TMR_TIMEOUT                  DEF_BIT_04
+#define  NET_TCP_CONN_CLOSE_TMR_TX_IDLE                  DEF_BIT_05
+#define  NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN             DEF_BIT_06
+#define  NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN              DEF_BIT_07
+#define  NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY               DEF_BIT_08
+#define  NET_TCP_CONN_CLOSE_TMR_RE_TX                    DEF_BIT_09
+
+#define  NET_TCP_CONN_CLOSE_TMR_ALL                     (NET_TCP_CONN_CLOSE_TMR_NONE          | \
+                                                         NET_TCP_CONN_CLOSE_TMR_TIMEOUT       | \
+                                                         NET_TCP_CONN_CLOSE_TMR_TX_IDLE       | \
+                                                         NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN  | \
+                                                         NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN   | \
+                                                         NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY    | \
+                                                         NET_TCP_CONN_CLOSE_TMR_RE_TX         )
+
+#define  NET_TCP_CONN_CLOSE_TMR_MASK                     NET_TCP_CONN_CLOSE_TMR_ALL
+
+
+#define  NET_TCP_CONN_CLOSE_ALL                         (NET_TCP_CONN_CLOSE_NONE     | \
+                                                         NET_TCP_CONN_CLOSE_CONN_ALL | \
+                                                         NET_TCP_CONN_CLOSE_TMR_ALL  )
+
+
+#define  NET_TCP_CONN_FREE_NONE                          NET_TCP_CONN_CLOSE_NONE
+
+#define  NET_TCP_CONN_FREE_TMR_NONE                      NET_TCP_CONN_CLOSE_TMR_NONE
+#define  NET_TCP_CONN_FREE_TMR_TIMEOUT                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT
+#define  NET_TCP_CONN_FREE_TMR_TX_IDLE                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE
+#define  NET_TCP_CONN_FREE_TMR_TX_SILLY_WIN              NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN
+#define  NET_TCP_CONN_FREE_TMR_TX_ZERO_WIN               NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN
+#define  NET_TCP_CONN_FREE_TMR_TX_ACK_DLY                NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY
+#define  NET_TCP_CONN_FREE_TMR_RE_TX                     NET_TCP_CONN_CLOSE_TMR_RE_TX
+#define  NET_TCP_CONN_FREE_TMR_ALL                       NET_TCP_CONN_CLOSE_TMR_ALL
+#define  NET_TCP_CONN_FREE_TMR_MASK                      NET_TCP_CONN_CLOSE_TMR_MASK
+
+#define  NET_TCP_CONN_FREE_ALL                           NET_TCP_CONN_CLOSE_ALL
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     TCP SEQUENCE CODE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U          NET_TCP_SEQ_CODE;
+
+
+/*
+*********************************************************************************************************
+*                                 TCP ACKNOWLEDGEMENT CODE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U          NET_TCP_ACK_CODE;
+
+
+/*
+*********************************************************************************************************
+*                                 TCP CONNECTION RESET CODE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U          NET_TCP_RESET_CODE;
+
+
+/*
+*********************************************************************************************************
+*                                      TCP WINDOW CODE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U          NET_TCP_WIN_CODE;
+
+
+/*
+*********************************************************************************************************
+*                                   TCP CALCULATION CODE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U          NET_TCP_CALC_CODE;
+
+
+/*
+*********************************************************************************************************
+*                                  TCP CONFIGURATION CODE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U          NET_TCP_CFG_CODE;
+
+
+/*
+*********************************************************************************************************
+*                                      TCP CLOSE CODE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U          NET_TCP_CLOSE_CODE;
+
+
+/*
+*********************************************************************************************************
+*                                       TCP FREE CODE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_TCP_CLOSE_CODE  NET_TCP_FREE_CODE;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  NET_TCP_SEQ_NBR   NetTCP_TxSeqNbrCtr;                   /* Global tx seq nbr ctr.                               */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*
+* Note(s) : (1) NetTCP_RxPktConnHandlerState&&&() abbreviated to NetTCP_RxPktConnHandler&&&() to enforce
+*               ANSI-compliance of 31-character symbol length uniqueness.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* --------------------- RX FNCTS --------------------- */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void                NetTCP_RxPktValidateBuf               (NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+#endif
+
+static  void                NetTCP_RxPktValidate                  (NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_TCP_HDR           *p_tcp_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktValidateOpt               (NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_TCP_HDR           *p_tcp_hdr,
+                                                                   CPU_INT08U             tcp_hdr_len_size,
+                                                                   NET_ERR               *p_err);
+
+static  CPU_BOOLEAN         NetTCP_RxPktValidateOptMaxSegSize     (NET_BUF_HDR           *p_buf_hdr,
+                                                                   CPU_INT08U            *p_opt,
+                                                                   CPU_INT08U            *p_opt_len,
+                                                                   NET_ERR               *p_err);
+
+
+
+static  void                NetTCP_RxPktDemuxSeg                  (NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+
+
+static  void                NetTCP_RxPktConnHandler               (NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+                                                                /* See Note #1.                                         */
+static  void                NetTCP_RxPktConnHandlerListen         (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerSyncRxd        (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerSyncTxd        (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerConn           (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerFinWait1       (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerFinWait2       (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerClosing        (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerTimeWait       (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerCloseWait      (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerLastAck        (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+
+static  void                NetTCP_RxPktConnHandlerSeg            (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_ACK_CODE       ack_code,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+
+
+static  void                NetTCP_RxPktConnHandlerCfgConn        (NET_TCP_CONN          *p_conn);
+
+
+
+static  void                NetTCP_RxPktConnHandlerRxQ_Sync       (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerRxQ_Conn       (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerRxQ_AppData    (NET_TCP_CONN          *p_conn,
+                                                                   NET_ERR               *p_err);
+
+
+
+static  void                NetTCP_RxPktConnHandlerTxWinRemote    (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_ACK_CODE       ack_code,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+
+static  void                NetTCP_RxPktConnHandlerReTxQ          (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_ACK_CODE       ack_code,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+
+
+static  CPU_BOOLEAN         NetTCP_RxPktConnHandlerListenQ_IsAvail(NET_TCP_CONN          *p_conn,
+                                                                   NET_ERR               *p_err);
+
+
+static  void                NetTCP_RxPktConnHandlerSignalConn     (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_CONN_STATE     state,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_RxPktConnHandlerSignalClose    (NET_TCP_CONN          *p_conn,
+                                                                   CPU_BOOLEAN            data_avail,
+                                                                   NET_ERR               *p_err);
+
+
+
+static  NET_TCP_SEQ_CODE    NetTCP_RxPktConnIsValidSeq            (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  NET_TCP_ACK_CODE    NetTCP_RxPktConnIsValidAck            (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  NET_TCP_RESET_CODE  NetTCP_RxPktConnIsValidReset          (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_ERR               *p_err);
+
+
+
+static  NET_BUF_QTY         NetTCP_RxPktFree                      (NET_BUF               *p_buf_q);
+
+static  void                NetTCP_RxPktDiscard                   (NET_BUF               *p_buf,
+                                                                   NET_ERR               *p_err);
+
+
+
+static  void                NetTCP_RxConnWinSizeCfg               (NET_TCP_CONN          *p_conn);
+
+
+static  void                NetTCP_RxConnWinSizeHandler           (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   CPU_INT16U             nbr_buf,
+                                                                   NET_TCP_WIN_CODE       win_update_code);
+
+
+
+                                                                /* --------------------- TX FNCTS --------------------- */
+
+static  void                NetTCP_TxConnWinSizeCfg               (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnWinSizeCfgCongCtrl       (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnWinSizeCfgMinTh          (NET_TCP_CONN          *p_conn);
+
+
+static  void                NetTCP_TxConnWinSizeHandlerCfgd       (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_WIN_SIZE       win_update_size,
+                                                                   NET_TCP_WIN_CODE       win_update_code,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_TxConnWinSizeHandlerCongCtrl   (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_TCP_ACK_CODE       ack_code,
+                                                                   NET_TCP_WIN_SIZE       win_update_size,
+                                                                   NET_TCP_WIN_CODE       win_update_code,
+                                                                   NET_ERR               *p_err);
+
+
+static  void                NetTCP_TxConnWinSizeCalcSlowStartTh   (NET_TCP_CONN          *p_conn);
+
+
+static  void                NetTCP_TxConnWinSizeCongSet           (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_WIN_CODE       win_inc_code);
+
+static  void                NetTCP_TxConnWinSizeCongInc           (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_TCP_WIN_SIZE       win_update_size,
+                                                                   NET_TCP_WIN_CODE       win_inc_code);
+
+
+static  void                NetTCP_TxConnWinSizeUpdateAvail       (NET_TCP_CONN          *p_conn);
+
+
+static  void                NetTCP_TxConnWinSizeDupAckCtrlReset   (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnWinSizeDupAckCtrlUpdate  (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   CPU_BOOLEAN            reset_ctr);
+
+
+static  void                NetTCP_TxConnWinSizeZeroWinHandler    (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_WIN_CODE       win_update_code,
+                                                                   NET_TCP_CLOSE_CODE     close_code);
+
+static  void                NetTCP_TxConnWinSizeZeroWinTimeout    (void                  *p_conn_timeout);
+
+
+
+static  void                NetTCP_TxConnSync                     (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_TCP_CONN_STATE     state,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_TxConnClose                    (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_CONN_STATE     state,
+                                                                   NET_ERR               *p_err);
+
+
+static  void                NetTCP_TxConnAck                      (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_TCP_ACK_CODE       tx_ack_code,
+                                                                   NET_TCP_CLOSE_CODE     close_code,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_TxConnAckDlyReset              (NET_TCP_CONN          *p_conn,
+                                                                   CPU_BOOLEAN            tmr_free);
+
+static  void                NetTCP_TxConnAckDlyTimeout            (void                  *p_conn_timeout);
+
+
+static  void                NetTCP_TxConnReset                    (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_TCP_RESET_CODE     tx_reset_code,
+                                                                   NET_TCP_CLOSE_CODE     close_code,
+                                                                   NET_ERR               *p_err);
+
+
+static  void                NetTCP_TxConnProbe                    (NET_TCP_CONN          *p_conn,
+                                                                   CPU_BOOLEAN            tx_probe_data_octet,
+                                                                   NET_TCP_CLOSE_CODE     close_code,
+                                                                   NET_ERR               *p_err);
+
+
+static  void                NetTCP_TxConnKeepAlive                (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_CLOSE_CODE     close_code,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_TxConnKeepAliveReset           (NET_TCP_CONN          *p_conn);
+
+
+
+static  void                NetTCP_TxConnTxQ                      (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_TCP_ACK_CODE       tx_ack_code,
+                                                                   CPU_BOOLEAN            tx_q_timeout,
+                                                                   NET_TCP_CLOSE_CODE     close_code,
+                                                                   CPU_BOOLEAN            tx_suspend_en,
+                                                                   NET_ERR               *p_err);
+
+
+static  void                NetTCP_TxConnTxQ_TimeoutIdle          (void                  *p_conn_timeout);
+
+static  void                NetTCP_TxConnTxQ_TimeoutIdleSet       (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnTxQ_TimeoutIdleClr       (NET_TCP_CONN          *p_conn);
+
+
+static  void                NetTCP_TxConnTxQ_TimeoutSillyWin      (void                  *p_conn_timeout);
+
+
+
+static  void                NetTCP_TxConnReTxQ                    (NET_TCP_CONN          *p_conn,
+                                                                   CPU_BOOLEAN            re_tx_q_timeout,
+                                                                   NET_TCP_CLOSE_CODE     close_code,
+                                                                   NET_ERR               *p_err);
+
+
+static  void                NetTCP_TxConnReTxQ_Timeout            (void                  *p_conn_timeout);
+
+static  void                NetTCP_TxConnReTxQ_TimeoutSet         (NET_TCP_CONN          *p_conn,
+                                                                   CPU_BOOLEAN            re_tx_q_timeout,
+                                                                   NET_TCP_CLOSE_CODE     close_code,
+                                                                   NET_ERR               *p_err);
+
+
+
+static  void                NetTCP_TxConnPrepareSegAddrs          (NET_TCP_CONN          *p_conn,
+                                                                   CPU_INT08U            *p_src_addr,
+                                                                   CPU_INT08U            *p_src_port,
+                                                                   CPU_INT16U             src_addr_len,
+                                                                   CPU_INT16U             src_port_len,
+                                                                   CPU_INT08U            *p_dest_addr,
+                                                                   CPU_INT08U            *p_dest_port,
+                                                                   CPU_INT16U             dest_addr_len,
+                                                                   CPU_INT16U             dest_port_len,
+                                                                   NET_ERR               *p_err);
+
+
+static  void                NetTCP_TxConnRTT_Init                 (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnRTT_Reset                (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnRTT_CalcUpdate           (NET_TCP_CONN          *p_conn);
+
+
+static  void                NetTCP_TxConnRTO_Init                 (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnRTO_CfgMaxTimeout        (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnRTO_CalcUpdate           (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnRTO_CalcUpdate_ms        (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnRTO_CalcUpdate_ms_scaled (NET_TCP_CONN          *p_conn);
+
+static  NET_TCP_TIMEOUT_MS  NetTCP_TxConnRTO_CalcBackOff          (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_TIMEOUT_MS     rto_ms);
+
+
+static  void                NetTCP_TxConnRTT_RTO_Init             (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_TxConnRTT_RTO_Calc             (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_CALC_CODE      calc_code,
+                                                                   NET_TCP_TX_RTT_TS_MS   rtt_ts_txd_ms,
+                                                                   NET_TCP_TX_RTT_TS_MS   rtt_ts_rxd_ms);
+
+
+#ifdef  NET_IPv4_MODULE_EN
+static  void                NetTCP_TxPktHandlerIPv4               (NET_BUF               *p_buf,
+                                                                   NET_IPv4_ADDR          src_addr,
+                                                                   NET_TCP_PORT_NBR       src_port,
+                                                                   NET_IPv4_ADDR          dest_addr,
+                                                                   NET_TCP_PORT_NBR       dest_port,
+                                                                   NET_TCP_SEQ_NBR        seq_nbr,
+                                                                   NET_TCP_SEQ_NBR        ack_nbr,
+                                                                   NET_TCP_WIN_SIZE       win_size,
+                                                                   NET_IPv4_TOS           TOS,
+                                                                   NET_IPv4_TTL           TTL,
+                                                                   NET_TCP_FLAGS          flags_tcp,
+                                                                   NET_IPv4_FLAGS         flags_ip,
+                                                                   void                  *p_opts_tcp,
+                                                                   void                  *p_opts_ip,
+                                                                   NET_ERR               *p_err);
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+static  void                NetTCP_TxPktHandlerIPv6               (NET_BUF                 *p_buf,
+                                                                   NET_IPv6_ADDR           *p_src_addr,
+                                                                   NET_TCP_PORT_NBR         src_port,
+                                                                   NET_IPv6_ADDR           *p_dest_addr,
+                                                                   NET_TCP_PORT_NBR         dest_port,
+                                                                   NET_TCP_SEQ_NBR          seq_nbr,
+                                                                   NET_TCP_SEQ_NBR          ack_nbr,
+                                                                   NET_TCP_WIN_SIZE         win_size,
+                                                                   NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                                                   NET_IPv6_FLOW_LABEL      flow_label,
+                                                                   NET_IPv6_HOP_LIM         hop_lim,
+                                                                   NET_TCP_FLAGS            flags_tcp,
+                                                                   void                    *p_opts_tcp,
+                                                                   NET_ERR                 *p_err);
+#endif
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void                NetTCP_TxPktValidate                  (NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_TCP_PORT_NBR       src_port,
+                                                                   NET_TCP_PORT_NBR       dest_port,
+                                                                   NET_TCP_SEQ_NBR        seq_nbr,
+                                                                   NET_TCP_SEQ_NBR        ack_nbr,
+                                                                   NET_TCP_WIN_SIZE       win_size,
+                                                                   NET_TCP_FLAGS          flags_tcp,
+                                                                   void                  *p_opts_tcp,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_TxPktValidateOpt               (void                  *p_opts_tcp,
+                                                                   NET_TCP_FLAGS          flags_tcp,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_TxPktValidateOptMaxSegSize     (void                  *p_opt_tcp,
+                                                                   CPU_INT08U            *p_opt_len,
+                                                                   void                 **p_opt_next,
+                                                                   NET_TCP_FLAGS          flags_tcp,
+                                                                   NET_ERR               *p_err);
+#endif
+
+
+
+#ifdef  NET_IPv4_MODULE_EN
+static  void                NetTCP_TxPktIPv4                      (NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   NET_IPv4_ADDR          src_addr,
+                                                                   NET_TCP_PORT_NBR       src_port,
+                                                                   NET_IPv4_ADDR          dest_addr,
+                                                                   NET_TCP_PORT_NBR       dest_port,
+                                                                   NET_TCP_SEQ_NBR        seq_nbr,
+                                                                   NET_TCP_SEQ_NBR        ack_nbr,
+                                                                   NET_TCP_WIN_SIZE       win_size,
+                                                                   NET_IPv4_TOS           TOS,
+                                                                   NET_IPv4_TTL           TTL,
+                                                                   NET_TCP_FLAGS          flags_tcp,
+                                                                   NET_IPv4_FLAGS         flags_ip,
+                                                                   void                  *p_opts_tcp,
+                                                                   void                  *p_opts_ip,
+                                                                   NET_ERR               *p_err);
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+static  void                NetTCP_TxPktIPv6                      (NET_BUF                 *p_buf,
+                                                                   NET_BUF_HDR             *p_buf_hdr,
+                                                                   NET_IPv6_ADDR           *p_src_addr,
+                                                                   NET_TCP_PORT_NBR         src_port,
+                                                                   NET_IPv6_ADDR           *p_dest_addr,
+                                                                   NET_TCP_PORT_NBR         dest_port,
+                                                                   NET_TCP_SEQ_NBR          seq_nbr,
+                                                                   NET_TCP_SEQ_NBR          ack_nbr,
+                                                                   NET_TCP_WIN_SIZE         win_size,
+                                                                   NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                                                   NET_IPv6_FLOW_LABEL      flow_label,
+                                                                   NET_IPv6_HOP_LIM         hop_lim,
+                                                                   NET_TCP_FLAGS            flags_tcp,
+                                                                   void                    *p_opts_tcp,
+                                                                   NET_ERR                 *p_err);
+#endif
+
+static  CPU_INT08U          NetTCP_TxPktPrepareOpt                (void                  *p_opts_tcp,
+                                                                   CPU_INT08U            *p_opt_hdr,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_TxPktPrepareOptMaxSegSize      (void                  *p_opts_tcp,
+                                                                   CPU_INT08U            *p_opt_hdr,
+                                                                   CPU_INT08U            *p_opt_len,
+                                                                   void                 **p_opt_next,
+                                                                   NET_ERR               *p_err);
+
+static  void                NetTCP_TxPktPrepareHdr                (NET_BUF               *p_buf,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   CPU_INT16U             tcp_hdr_len_tot,
+                                                                   CPU_INT08U             tcp_opt_len_tot,
+                                                                   CPU_INT16U             addr_size,
+                                                                   void                  *p_src_addr,
+                                                                   NET_TCP_PORT_NBR       src_port,
+                                                                   void                  *p_dest_addr,
+                                                                   NET_TCP_PORT_NBR       dest_port,
+                                                                   NET_TCP_SEQ_NBR        seq_nbr,
+                                                                   NET_TCP_SEQ_NBR        ack_nbr,
+                                                                   NET_TCP_WIN_SIZE       win_size,
+                                                                   NET_TCP_FLAGS          flags_tcp,
+                                                                   CPU_INT32U            *p_tcp_hdr_opts,
+                                                                   NET_ERR               *p_err);
+
+
+
+static  NET_BUF_QTY         NetTCP_TxPktFree                      (NET_BUF               *p_buf_q);
+
+static  void                NetTCP_TxPktDiscard                   (NET_BUF               *p_buf,
+                                                                   NET_ERR               *p_err);
+
+
+
+
+                                                                /* ------------------ TCP CONN FNCTS ------------------ */
+
+static  void                NetTCP_ConnCfg                        (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_CFG_CODE       cfg_code);
+
+static  void                NetTCP_ConnCfgMaxSegSize              (NET_TCP_CONN          *p_conn);
+
+
+
+static  void                NetTCP_ConnIdleTimeout                (void                  *p_conn_timeout);
+
+
+static  void                NetTCP_ConnClose                      (NET_TCP_CONN          *p_conn,
+                                                                   NET_BUF_HDR           *p_buf_hdr,
+                                                                   CPU_BOOLEAN            close_conn_app,
+                                                                   NET_TCP_CLOSE_CODE     close_code);
+
+static  void                NetTCP_ConnCloseHandler               (NET_TCP_CONN          *p_conn,
+                                                                   CPU_BOOLEAN            close_conn_app,
+                                                                   NET_TCP_CLOSE_CODE     close_code);
+
+static  void                NetTCP_ConnClosingTimeoutDataAvail    (void                  *p_conn_timeout);
+
+
+
+static  void                NetTCP_ConnFreeHandler                (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_FREE_CODE      free_code);
+
+static  void                NetTCP_ConnFreeTmr                    (NET_TCP_CONN          *p_conn,
+                                                                   NET_TCP_FREE_CODE      free_code);
+
+static  void                NetTCP_ConnFreeBufQ                   (NET_BUF              **p_buf_q_head,
+                                                                   NET_BUF              **p_buf_q_tail);
+
+
+
+static  void                NetTCP_ConnClr                        (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_ConnCopy                       (NET_TCP_CONN          *p_conn_dest,
+                                                                   NET_TCP_CONN          *p_conn_src);
+
+
+static  void                NetTCP_ConnDiscard                    (NET_TCP_CONN          *p_conn);
+
+static  void                NetTCP_GetTxDataIx                    (NET_IF_NBR             if_nbr,
+                                                                   NET_PROTOCOL_TYPE      protocol,
+                                                                   CPU_INT16U             additial_hdr_size,
+                                                                   CPU_INT16U             data_len,
+                                                                   NET_TCP_CONN          *p_conn,
+                                                                   CPU_INT16U            *p_ix,
+                                                                   NET_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                            NetTCP_Init()
+*
+* Description : (1) Initialize Transmission Control Protocol Layer :
+*
+*                   (a) Perform TCP Module/OS  initialization
+*                   (b) Perform TCP Module/BSP initialization
+*                   (c) Initialize TCP connection pool
+*                   (d) Initialize TCP connection table
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP layer successfully initialized.
+*                               NET_ERR_FAULT_MEM_ALLOC         Error in memory allocation of a semaphore.
+*                               NET_TCP_ERR_INIT_RX_Q_FAULT     Rx Q not successfully initialized.
+*                               NET_TCP_ERR_INIT_TX_Q_FAULT     Tx Q not successfully initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) The following TCP initialization MUST be sequenced as follows :
+*
+*                   (a) TCP connection pool MUST be initialized PRIOR to initializing the pool with pointers
+*                           to TCP connections
+*********************************************************************************************************
+*/
+
+void  NetTCP_Init (NET_ERR  *p_err)
+{
+    NET_TCP_CONN      *p_conn;
+    NET_TCP_CONN_QTY   i;
+    KAL_ERR            err_kal;
+    NET_ERR            err;
+
+                                                                /* --------------- PERFORM TCP/BSP INIT --------------- */
+    NetTCP_TxSeqNbrCtr = NetUtil_InitSeqNbrGet();               /* Init tx seq nbr ctr.                                 */
+
+
+                                                                /* ------------- INIT TCP CONN POOL/STATS ------------- */
+    NetTCP_ConnPoolPtr = DEF_NULL;                              /* Init-clr TCP conn pool (see Note #2b).               */
+
+    NetStat_PoolInit((NET_STAT_POOL   *)&NetTCP_ConnPoolStat,
+                     (NET_STAT_POOL_QTY) NET_TCP_NBR_CONN,
+                     (NET_ERR         *)&err);
+
+
+                                                                /* ---------------- INIT TCP CONN TBL ----------------- */
+    p_conn = &NetTCP_ConnTbl[0];
+    for (i = 0; i < (NET_TCP_CONN_QTY)NET_TCP_NBR_CONN; i++) {
+        p_conn->ID        = (NET_TCP_CONN_ID)i;
+
+        p_conn->ConnState =  NET_TCP_CONN_STATE_FREE;           /* Init each TCP conn as free/NOT used.                 */
+        p_conn->Flags     =  NET_TCP_FLAG_NONE;
+
+                                                                /* Initialize TCP connection receive queue.             */
+                                                                /* Create     TCP connection receive queue signals ...  */
+                                                                /* ... with NO pending signal.                          */
+        p_conn->RxQ_SignalObj = KAL_SemCreate((const CPU_CHAR *)&NET_TCP_RX_Q_NAME,
+                                                                 DEF_NULL,
+                                                                &err_kal);
+        switch (err_kal) {
+            case KAL_ERR_NONE:
+                 break;
+
+            case KAL_ERR_MEM_ALLOC:
+                *p_err = NET_ERR_FAULT_MEM_ALLOC;
+                 goto exit;
+
+            case KAL_ERR_INVALID_ARG:
+            case KAL_ERR_ISR:
+            case KAL_ERR_CREATE:
+            default:
+                 *p_err = NET_TCP_ERR_INIT_RX_Q_FAULT;
+                  goto exit;
+
+        }
+
+                                                                /* Initialize TCP connection receive queue timeout values.*/
+        NetTCP_RxQ_TimeoutDflt(i, p_err);
+        if (*p_err != NET_TCP_ERR_NONE) {
+             goto exit;
+        }
+
+
+                                                                /* Initialize TCP connection transmit queue.            */
+                                                                /* Create     TCP connection transmit queue signals ... */
+                                                                /* ... with NO pending signal.                          */
+        p_conn->TxQ_SignalObj = KAL_SemCreate((const CPU_CHAR *)&NET_TCP_TX_Q_NAME,
+                                                                 DEF_NULL,
+                                                                &err_kal);
+        switch (err_kal) {
+            case KAL_ERR_NONE:
+                 break;
+
+            case KAL_ERR_MEM_ALLOC:
+                *p_err = NET_ERR_FAULT_MEM_ALLOC;
+                 goto exit;
+
+            case KAL_ERR_INVALID_ARG:
+            case KAL_ERR_ISR:
+            case KAL_ERR_CREATE:
+            default:
+                 *p_err = NET_TCP_ERR_INIT_TX_Q_FAULT;
+                  goto exit;
+
+        }
+                                                                /* Initialize TCP connection transmit queue timeout values.*/
+        NetTCP_TxQ_TimeoutDflt(i, p_err);
+        if (*p_err != NET_TCP_ERR_NONE) {
+             goto exit;
+        }
+
+
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        NetTCP_ConnClr(p_conn);
+#endif
+                                                                /* Free each TCP conn to TCP conn pool (see Note #2).   */
+        p_conn->NextPtr    = NetTCP_ConnPoolPtr;
+        NetTCP_ConnPoolPtr = p_conn;
+
+        p_conn++;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+
+exit:
+   return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           NetTCP_RxQ_Clr()
+*
+* Description : Clear TCP connection receive queue signal.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to clear receive queue signal.
+*               -----------     Argument validated in NetTCP_RxAppData(),
+*                                                     NetTCP_RxPktConnHandlerRxQ_AppData(),
+*                                                     NetTCP_ConnFreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection receive queue signal
+*                                                                   successfully cleared.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_CLR     TCP connection receive queue signal
+*                                                                   NOT          cleared.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxAppData(),
+*               NetTCP_RxPktConnHandlerRxQ_AppData(),
+*               NetTCP_ConnFreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetTCP_RxQ_Clr (NET_TCP_CONN_ID   conn_id_tcp,
+                      NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    KAL_ERR        err_kal;
+
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    KAL_SemSet(p_conn->RxQ_SignalObj, 0u, &err_kal);            /* Clear TCP connection receive queue signal.           */
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_TCP_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_TCP_ERR_RX_Q_SIGNAL_CLR;
+             break;
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                           NetTCP_RxQ_Wait()
+*
+* Description : Wait on TCP connection receive queue.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to wait on receive queue.
+*               -----------     Argument checked in NetTCP_RxAppData().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection receive queue   non-empty.
+*                               NET_TCP_ERR_RX_Q_EMPTY          TCP connection receive queue still empty by
+*                                                                   timeout.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_ABORT   TCP connection receive queue signal aborted;
+*                                                                   TCP connection closed/aborted.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT   TCP connection receive queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxAppData().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) If timeouts NOT desired, wait on TCP connection receive queue forever
+*                       (i.e. do NOT exit).
+*
+*                   (b) If timeout      desired, return NET_TCP_ERR_RX_Q_EMPTY error on TCP connection
+*                       receive queue timeout.  Implement timeout with OS-dependent functionality.
+*********************************************************************************************************
+*/
+
+void  NetTCP_RxQ_Wait (NET_TCP_CONN_ID   conn_id_tcp,
+                       NET_ERR          *p_err)
+{
+    CPU_INT32U     timeout_ms;
+    NET_TCP_CONN  *p_conn;
+    KAL_ERR        err_kal;
+    CPU_SR_ALLOC();
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    CPU_CRITICAL_ENTER();
+    timeout_ms = p_conn->RxQ_SignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+
+                                                                /* Wait on TCP connection receive queue ...             */
+                                                                /* ... with configured timeout.                         */
+    KAL_SemPend(p_conn->RxQ_SignalObj, KAL_OPT_PEND_NONE, timeout_ms, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_TCP_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_TIMEOUT:
+            *p_err = NET_TCP_ERR_RX_Q_EMPTY;                    /* See Note #1b.                                        */
+             break;
+
+
+        case KAL_ERR_ABORT:
+            *p_err = NET_TCP_ERR_RX_Q_SIGNAL_ABORT;
+             break;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_TCP_ERR_RX_Q_SIGNAL_FAULT;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_RxQ_Signal()
+*
+* Description : Signal TCP connection receive queue.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to signal receive queue.
+*               -----------     Argument validated in NetTCP_RxAppData(),
+*                                                     NetTCP_RxPktConnHandlerRxQ_AppData().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection receive queue successfully
+*                                                                   signaled.
+*                               NET_TCP_ERR_RX_Q_FULL           TCP connection receive queue full.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT   TCP connection receive queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxAppData(),
+*               NetTCP_RxPktConnHandlerRxQ_AppData().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetTCP_RxQ_Signal (NET_TCP_CONN_ID   conn_id_tcp,
+                         NET_ERR          *p_err)
+{
+    NET_CONN      *p_net_conn;
+    NET_TCP_CONN  *p_tcp_conn;
+    KAL_ERR        err_kal;
+
+
+    p_tcp_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+                                                                /* Signal TCP connection receive queue.                 */
+    KAL_SemPost(p_tcp_conn->RxQ_SignalObj, KAL_OPT_PEND_NONE, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_TCP_ERR_NONE;
+             break;
+
+        case KAL_ERR_OVF:
+            *p_err = NET_TCP_ERR_RX_Q_FULL;
+             break;
+
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_TCP_ERR_RX_Q_SIGNAL_FAULT;
+             break;
+    }
+
+    p_net_conn = &NetConn_Tbl[p_tcp_conn->ID_Conn];
+    if (p_net_conn->ID_App != NET_CONN_ID_NONE) {
+        p_tcp_conn->FnctAppPostRx(p_net_conn->ID_App);
+
+    } else if (p_net_conn->ID_AppClone != NET_CONN_ID_NONE) {
+        p_tcp_conn->FnctAppPostRx(p_net_conn->ID_AppClone);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_RxQ_Abort()
+*
+* Description : Abort wait on TCP connection receive queue.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to abort wait on socket receive queue.
+*               -----------     Argument validated in NetTCP_ConnFreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                Wait on TCP connection receive queue
+*                                                                   successfully aborted.
+*                               NET_TCP_ERR_RX_Q_ABORT          TCP connection receive queue abort failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnFreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetTCP_RxQ_Abort (NET_TCP_CONN_ID   conn_id_tcp,
+                        NET_ERR          *p_err)
+{
+    NET_CONN      *p_net_conn;
+    NET_TCP_CONN  *p_tcp_conn;
+    NET_CONN_ID    net_conn_id;
+    KAL_ERR        err_kal;
+
+
+    p_tcp_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+                                                                /* Abort wait on TCP connection receive queue ...       */
+                                                                /* ... for ALL waiting tasks.                           */
+    KAL_SemPendAbort(p_tcp_conn->RxQ_SignalObj, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_TCP_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_TCP_ERR_RX_Q_ABORT;
+             break;
+    }
+
+    net_conn_id = p_tcp_conn->ID_Conn;
+    if (net_conn_id != NET_CONN_ID_NONE) {
+        p_net_conn = &NetConn_Tbl[p_tcp_conn->ID_Conn];
+        p_tcp_conn->FnctAppPostRx(p_net_conn->ID_App);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_RxQ_TimeoutDflt()
+*
+* Description : Set TCP connection receive queue to configured-default timeout value.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to set receive queue configured-default
+*   `           -----------         timeout.
+*
+*                               Argument checked in NetSock_CfgTimeoutRxQ_Dflt(),
+*                                                   NetTCP_ConnClr(),
+*                                                   NetTCP_Init().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection receive queue configured-
+*                                                                   default timeout successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutRxQ_Dflt(),
+*               NetTCP_ConnClr(),
+*               NetTCP_Init().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutRxQ_Dflt()'.
+*
+* Note(s)     : (1) NetTCP_RxQ_TimeoutDflt() is called by network protocol suite function(s) &
+*                   may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutRxQ_Dflt()  Note #2'.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_TCP_MODULE_EN
+void  NetTCP_RxQ_TimeoutDflt (NET_TCP_CONN_ID   conn_id_tcp,
+                              NET_ERR          *p_err)
+{
+    CPU_INT32U  timeout_ms;
+                                                                /* Set TCP connection receive queue timeout ...         */
+                                                                /* ... to configured-default        timeout value.      */
+    timeout_ms = NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS;
+
+    NetTCP_RxQ_TimeoutSet(conn_id_tcp, timeout_ms, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_RxQ_TimeoutSet()
+*
+* Description : Set TCP connection receive queue timeout value.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to set receive queue timeout.
+*               -----------     Argument checked in NetSock_CfgTimeoutRxQ_Set(),
+*                                                   NetTCP_RxQ_TimeoutDflt().
+*
+*               timeout_ms      Timeout value :
+*
+*                                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value desired.
+*
+*                                   In number of milliseconds, otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection receive queue timeout
+*                                                                   successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutRxQ_Set(),
+*               NetTCP_RxQ_TimeoutDflt().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutRxQ_Set()'.
+*
+* Note(s)     : (1) NetTCP_RxQ_TimeoutSet() is called by network protocol suite function(s) & may be
+*                   called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutRxQ_Set()  Note #2'.
+*
+*               (2) 'NetTCP_RxQ_TimeoutTbl_tick[]' variables MUST ALWAYS be accessed exclusively in
+*                    critical sections.
+*********************************************************************************************************
+*/
+
+void  NetTCP_RxQ_TimeoutSet (NET_TCP_CONN_ID   conn_id_tcp,
+                             CPU_INT32U        timeout_ms,
+                             NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    CPU_SR_ALLOC();
+
+
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    CPU_CRITICAL_ENTER();
+                                                                /* Set TCP connection receive queue timeout value.      */
+    p_conn->RxQ_SignalTimeout_ms = timeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_RxQ_TimeoutGet_ms()
+*
+* Description : Get TCP connection receive queue timeout value.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to get receive queue timeout.
+*               -----------     Argument checked in NetSock_CfgTimeoutRxQ_Get_ms().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection receive queue timeout
+*                                                                   successfully returned.
+*
+* Return(s)   : TCP connection receive queue network timeout value :
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : NetSock_CfgTimeoutRxQ_Get_ms().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutRxQ_Get_ms()'.
+*
+* Note(s)     : (1) NetTCP_RxQ_TimeoutGet_ms() is called by network protocol suite function(s) & may
+*                   be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutRxQ_Get_ms()  Note #3'.
+*
+*               (2) 'NetTCP_RxQ_TimeoutTbl_tick[]' variables MUST ALWAYS be accessed exclusively in
+*                    critical sections.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetTCP_RxQ_TimeoutGet_ms (NET_TCP_CONN_ID   conn_id_tcp,
+                                      NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    CPU_INT32U     timeout_ms;
+    CPU_SR_ALLOC();
+
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+    CPU_CRITICAL_ENTER();
+
+                                                                /* Get TCP connection receive queue timeout value ...   */
+                                                                /* ... (in OS ticks).                                   */
+    timeout_ms = p_conn->RxQ_SignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = NET_TCP_ERR_NONE;
+
+    return (timeout_ms);
+}
+
+/*
+*********************************************************************************************************
+*                                          NetTCP_TxQ_Clr()
+*
+* Description : Clear TCP connection transmit queue signal.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to clear transmit queue signal.
+*               -----------     Argument validated in NetTCP_TxConnAppData(),
+*                                                     NetTCP_ConnFreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit queue signal
+*                                                                   successfully cleared.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_CLR     TCP connection transmit queue signal
+*                                                                   NOT          cleared.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnAppData(),
+*               NetTCP_ConnFreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetTCP_TxQ_Clr (NET_TCP_CONN_ID   conn_id_tcp,
+                      NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    KAL_ERR        err_kal;
+
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+
+    KAL_SemSet(p_conn->TxQ_SignalObj, 0u, &err_kal);            /* Clear TCP connection transmit queue signal.          */
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_TCP_ERR_NONE;
+             break;
+
+        case KAL_ERR_NULL_PTR:
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_TCP_ERR_TX_Q_SIGNAL_CLR;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_TxQ_Wait()
+*
+* Description : Wait on TCP connection transmit queue.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to wait on transmit queue.
+*               -----------     Argument checked in NetTCP_TxConnAppData().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit queue NOT full.
+*                               NET_TCP_ERR_TX_Q_FULL           TCP connection transmit queue still full
+*                                                                   after timeout.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_ABORT   TCP connection transmit queue signal aborted;
+*                                                                   TCP connection closed/aborted.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT   TCP connection transmit queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnAppData().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) If timeouts NOT desired, wait on TCP connection transmit queue forever
+*                       (i.e. do NOT exit).
+*
+*                   (b) If timeout      desired, return NET_TCP_ERR_TX_Q_FULL error on TCP connection
+*                       transmit queue timeout.  Implement timeout with OS-dependent functionality.
+*********************************************************************************************************
+*/
+
+void  NetTCP_TxQ_Wait (NET_TCP_CONN_ID   conn_id_tcp,
+                       NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    CPU_INT32U     timeout_ms;
+    KAL_ERR        err_kal;
+    CPU_SR_ALLOC();
+
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    CPU_CRITICAL_ENTER();
+    timeout_ms = p_conn->TxQ_SignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+                                                                /* Wait on TCP connection transmit queue ...            */
+                                                                /* ... with configured timeout (see Note #1b).          */
+    KAL_SemPend(p_conn->TxQ_SignalObj, KAL_OPT_PEND_NONE, timeout_ms, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_TCP_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_TIMEOUT:
+            *p_err = NET_TCP_ERR_TX_Q_FULL;                     /* See Note #1b.                                        */
+             break;
+
+
+        case KAL_ERR_ABORT:
+            *p_err = NET_TCP_ERR_TX_Q_SIGNAL_ABORT;
+             break;
+
+
+        case KAL_ERR_ISR:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_TCP_ERR_TX_Q_SIGNAL_FAULT;
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_TxQ_Signal()
+*
+* Description : Signal TCP connection transmit queue.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to signal transmit queue.
+*               -----------     Argument validated in NetTCP_TxConnWinSizeHandlerCfgd().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit queue successfully
+*                                                                   signaled.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT   TCP connection transmit queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeHandlerCfgd().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetTCP_TxQ_Signal (NET_TCP_CONN_ID   conn_id_tcp,
+                         NET_ERR          *p_err)
+{
+    NET_CONN      *p_net_conn;
+    NET_TCP_CONN  *p_tcp_conn;
+    KAL_ERR        err_kal;
+
+
+    p_tcp_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+
+                                                                /* Signal TCP connection transmit queue.                */
+    KAL_SemPost(p_tcp_conn->TxQ_SignalObj, KAL_OPT_PEND_NONE, &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+            *p_err = NET_TCP_ERR_NONE;
+             break;
+
+
+        case KAL_ERR_OVF:
+        case KAL_ERR_OS:
+        default:
+            *p_err = NET_TCP_ERR_TX_Q_SIGNAL_FAULT;
+             break;
+    }
+
+    p_net_conn = &NetConn_Tbl[p_tcp_conn->ID_Conn];
+    p_tcp_conn->FnctAppPostTx(p_net_conn->ID_App);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_TxQ_Abort()
+*
+* Description : Abort wait on TCP connection transmit queue.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to abort wait on socket transmit queue.
+*               -----------     Argument validated in NetTCP_ConnFreeHandler().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                Wait on TCP connection transmit queue
+*                                                                   successfully aborted.
+*                               NET_TCP_ERR_TX_Q_ABORT          TCP connection transmit queue abort failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnFreeHandler().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetTCP_TxQ_Abort (NET_TCP_CONN_ID   conn_id_tcp,
+                        NET_ERR          *p_err)
+{
+    NET_CONN      *p_net_conn;
+    NET_TCP_CONN  *p_tcp_conn;
+    NET_CONN_ID    net_conn_id;
+    KAL_ERR        err_kal;
+
+
+    p_tcp_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+                                                                /* Abort wait on TCP connection transmit queue ...      */
+                                                                /* ... for ALL waiting tasks.                           */
+   KAL_SemPendAbort(p_tcp_conn->TxQ_SignalObj, &err_kal);
+   switch (err_kal) {
+       case KAL_ERR_NONE:
+           *p_err = NET_TCP_ERR_NONE;
+            break;
+
+
+       case KAL_ERR_OS:
+       default:
+           *p_err = NET_TCP_ERR_TX_Q_ABORT;
+            break;
+   }
+
+   net_conn_id = p_tcp_conn->ID_Conn;
+   if (net_conn_id != NET_CONN_ID_NONE) {
+       p_net_conn = &NetConn_Tbl[p_tcp_conn->ID_Conn];
+       p_tcp_conn->FnctAppPostRx(p_net_conn->ID_App);
+   }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_TxQ_TimeoutDflt()
+*
+* Description : Set TCP connection transmit queue to configured-default timeout value.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to set transmit queue configured-default
+*   `           -----------         timeout.
+*
+*                               Argument checked in NetSock_CfgTimeoutTxQ_Dflt(),
+*                                                   NetTCP_ConnClr(),
+*                                                   NetTCP_Init().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit queue configured-
+*                                                                   default timeout successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutTxQ_Dflt(),
+*               NetTCP_ConnClr(),
+*               NetTCP_Init().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutTxQ_Dflt()'.
+*
+* Note(s)     : (1) NetTCP_TxQ_TimeoutDflt() is called by network protocol suite function(s) &
+*                   may be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutTxQ_Dflt()  Note #3'.
+*********************************************************************************************************
+*/
+
+void  NetTCP_TxQ_TimeoutDflt (NET_TCP_CONN_ID   conn_id_tcp,
+                              NET_ERR          *p_err)
+{
+    CPU_INT32U  timeout_ms;
+                                                                /* Set TCP connection transmit queue timeout ...        */
+                                                                /* ... to configured-default         timeout value.     */
+    timeout_ms = NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS;
+
+    NetTCP_TxQ_TimeoutSet(conn_id_tcp, timeout_ms, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_TxQ_TimeoutSet()
+*
+* Description : Set TCP connection transmit queue timeout value.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to set transmit queue timeout.
+*               -----------     Argument checked in NetSock_CfgTimeoutTxQ_Set(),
+*                                                   NetTCP_TxQ_TimeoutDflt().
+*
+*               timeout_ms      Timeout value :
+*
+*                                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value desired.
+*
+*                                   In number of milliseconds, otherwise.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit queue timeout
+*                                                                   successfully set.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CfgTimeoutTxQ_Set(),
+*               NetTCP_TxQ_TimeoutDflt().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutTxQ_Set()'.
+*
+* Note(s)     : (1) NetTCP_TxQ_TimeoutSet() is called by network protocol suite function(s) & may be
+*                   called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutTxQ_Set()  Note #3'.
+*
+*               (2) 'NetTCP_TxQ_TimeoutTbl_tick[]' variables MUST ALWAYS be accessed exclusively in
+*                    critical sections.
+*********************************************************************************************************
+*/
+
+void  NetTCP_TxQ_TimeoutSet (NET_TCP_CONN_ID   conn_id_tcp,
+                             CPU_INT32U        timeout_ms,
+                             NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    CPU_SR_ALLOC();
+
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    CPU_CRITICAL_ENTER();
+                                                                /* Set TCP connection transmit queue timeout value ...  */
+                                                                /* ... (in OS ticks).                                   */
+    p_conn->TxQ_SignalTimeout_ms = timeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetTCP_TxQ_TimeoutGet_ms()
+*
+* Description : Get TCP connection transmit queue timeout value.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to get transmit queue timeout.
+*               -----------     Argument checked in NetSock_CfgTimeoutTxQ_Get_ms().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit queue timeout
+*                                                                   successfully returned.
+*
+* Return(s)   : TCP connection transmit queue network timeout value :
+*
+*                   NET_TMR_TIME_INFINITE,     if infinite (i.e. NO timeout) value configured.
+*
+*                   In number of milliseconds, otherwise.
+*
+* Caller(s)   : NetSock_CfgTimeoutTxQ_Get_ms().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).  See 'net_sock.c  NetSock_CfgTimeoutTxQ_Get_ms()'.
+*
+* Note(s)     : (1) NetTCP_TxQ_TimeoutGet_ms() is called by network protocol suite function(s) & may
+*                   be called either with OR without the global network lock already acquired.
+*
+*                   See also 'net_sock.c  NetSock_CfgTimeoutTxQ_Get_ms()  Note #4'.
+*
+*               (2) 'NetTCP_TxQ_TimeoutTbl_tick[]' variables MUST ALWAYS be accessed exclusively in
+*                    critical sections.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetTCP_TxQ_TimeoutGet_ms (NET_TCP_CONN_ID   conn_id_tcp,
+                                      NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    CPU_INT32U     timeout_ms;
+    CPU_SR_ALLOC();
+
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+    CPU_CRITICAL_ENTER();
+                                                                /* Get TCP connection transmit queue timeout value ...  */
+                                                                /* ... (in OS ticks).                                   */
+    timeout_ms = p_conn->TxQ_SignalTimeout_ms;
+    CPU_CRITICAL_EXIT();
+
+   *p_err = NET_TCP_ERR_NONE;
+
+    return (timeout_ms);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             NetTCP_Rx()
+*
+* Description : (1) Process received segments & demultiplex to socket or application layer connection :
+*
+*                   (a) Validate    TCP packet
+*                   (b) Demultiplex TCP packet to TCP connection
+*                   (c) Handle/Process TCP segment
+*                   (d) Return TCP error code(s)
+*
+*               (2) Although TCP data units are typically referred to as 'segments' (see RFC #793, Section 3.1),
+*                   the term 'TCP packet' (see RFC #1983, 'packet') is used for TCP Receive until the packet is
+*                   validated as a TCP segment.
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer that received TCP packet.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP segment successfully received & processed.
+*
+*                                                               ---- RETURNED BY NetTCP_RxPktDiscard() : -----
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIP_RxPktDemuxDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (3) TCP receive statistics already updated in NetTCP_RxPktConnHandler(); do NOT re-update.
+*
+*                   (a) Network buffer already freed & error counter already incremented in previous
+*                       function(s).
+*
+*                   See also 'NetTCP_RxPktConnHandler()  Note #2'.
+*********************************************************************************************************
+*/
+
+void  NetTCP_Rx (NET_BUF  *p_buf,
+                 NET_ERR  *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_TCP_HDR  *p_tcp_hdr;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == DEF_NULL) {
+        NetTCP_RxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxPktCtr);
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetTCP_RxPktValidateBuf(p_buf_hdr, p_err);                  /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetTCP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+#endif
+    p_tcp_hdr = (NET_TCP_HDR *)&p_buf->DataPtr[p_buf_hdr->TransportHdrIx];
+    NetTCP_RxPktValidate(p_buf, p_buf_hdr, p_tcp_hdr, p_err);   /* Validate rx'd pkt.                                   */
+
+
+                                                                /* -------------- DEMUX PKT TO TCP CONN --------------- */
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+             NetTCP_RxPktDemuxSeg(p_buf, p_buf_hdr, p_err);
+             break;
+
+
+        case NET_TCP_ERR_INVALID_PORT_NBR:
+        case NET_TCP_ERR_INVALID_LEN_HDR:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_INVALID_LEN_DATA:
+        case NET_TCP_ERR_INVALID_FLAG:
+        case NET_TCP_ERR_INVALID_CHK_SUM:
+        case NET_TCP_ERR_INVALID_OPT_LEN:
+        case NET_TCP_ERR_INVALID_OPT_END:
+        case NET_TCP_ERR_INVALID_OPT_NBR:
+        default:
+             NetTCP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                /* --------------- HANDLE TCP PKT/CONN ---------------- */
+    switch (*p_err) {                                           /* Chk err from NetTCP_RxPktDemuxSeg().                 */
+        case NET_TCP_ERR_NONE:
+             NetTCP_RxPktConnHandler(p_buf, p_buf_hdr, p_err);
+             break;
+
+
+        case NET_CONN_ERR_INVALID_FAMILY:
+        case NET_CONN_ERR_INVALID_CONN:
+        case NET_ERR_RX_DEST:
+        default:
+             NetTCP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                /* ---------------- RTN TCP ERR CODES ----------------- */
+    switch (*p_err) {                                           /* Chk err from NetTCP_RxPktConnHandler().              */
+        case NET_TCP_ERR_NONE:
+                                                                /* See Note #3.                                         */
+             break;
+
+
+        case NET_TCP_ERR_CONN_DATA_NONE:
+        case NET_TCP_ERR_CONN_DATA_VALID:
+        case NET_TCP_ERR_CONN_CLOSED:
+        case NET_TCP_ERR_CONN_RESET_VALID:
+            *p_err = NET_TCP_ERR_NONE;
+             break;
+
+
+        case NET_ERR_RX:
+                                                                /* See Note #3a.                                        */
+             return;
+
+
+        case NET_INIT_ERR_NOT_COMPLETED:
+        case NET_TCP_ERR_INVALID_CONN:
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        default:
+             NetTCP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_RxAppData()
+*
+* Description : (1) Deframe application data from TCP connection's enqueued TCP segment(s) :
+*
+*                   (a) Wait on TCP connection application receive queue for packet buffer(s)
+*                   (b) Deframe application data from enqueued TCP segment(s)
+*                   (c) Update  TCP connection application receive queue
+*                       (1) Free TCP packet buffer(s)
+*                   (d) Update TCP connection receive window
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to receive application data.
+*
+*               pdata_buf       Pointer to application buffer to receive application data.
+*               ---------       Argument validated in NetSock_RxDataHandlerStream().
+*
+*               data_buf_len    Size    of application receive buffer (in octets).
+*               ------------    Argument validated in NetSock_RxDataHandlerStream().
+*
+*               flags           Flags to select receive options; bit-field flags logically OR'd :
+*               -----
+*                                   NET_TCP_FLAG_NONE               No      TCP receive flags selected.
+*                                   NET_TCP_FLAG_RX_DATA_PEEK       Receive TCP application data without consuming
+*                                                                       the data; i.e. data NOT removed from TCP
+*                                                                       connection's application receive queue(s).
+*                                   NET_TCP_FLAG_RX_BLOCK           Receive TCP application data with blocking,
+*                                                                       if flag set; without blocking, if clear.
+*
+*                               Argument validated in NetSock_RxDataHandlerStream().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection application data successfully
+*                                                                       deframed; check return value for number of
+*                                                                       data octets received.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*                               NET_TCP_ERR_CONN_DATA_INVALID       TCP connection application receive queue contains
+*                                                                       invalid or improperly sequenced data.
+*
+*                               NET_TCP_ERR_RX_Q_CLOSED             TCP connection application receive queue closed
+*                                                                       (see Note #2e3B).
+*                               NET_TCP_ERR_RX_Q_EMPTY              TCP connection application receive queue empty
+*                                                                       (see Note #2e2B).
+*
+*                                                                   ------- RETURNED BY NetTCP_ConnIsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN            Invalid TCP connection number.
+*
+*                                                                   -------- RETURNED BY NetTCP_RxQ_Wait() : --------
+*                               NET_TCP_ERR_RX_Q_SIGNAL_ABORT       TCP connection receive queue signal aborted;
+*                                                                       TCP connection closed/aborted.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT       TCP connection receive queue signal fault.
+*
+*                                                                   ----- RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Total application data octets deframed into receive buffer, if NO error(s).
+*
+*               0,                                                          otherwise.
+*
+* Caller(s)   : NetSock_RxDataHandlerStream().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) RFC #793, Section 3.9 'Event Processing : RECEIVE Call' specifies how to handle receive
+*                   data requests from the application layer :
+*
+*                   (a) For the "CLOSED STATE ... return 'error: connection does not exist'".
+*
+*                   (b) (1) For the "LISTEN STATE, SYN-SENT STATE, SYN-RECEIVED STATE ... queue for processing
+*                           after entering ESTABLISHED state".
+*
+*                       (2) The application layer may request to receive application data before the TCP
+*                           connection enters the connected state.  Such requests will block or return
+*                           no data.
+*
+*                           See also 'NetTCP_RxPktConnHandlerRxQ_AppData()  Note #1bA'
+*                                  &  Note #4b2.
+*
+*                   (c) For the "ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2 STATE" :
+*
+*                       (1) "If insufficient incoming segments are queued to satisfy the request, queue
+*                            the request."
+*
+*                       (2) "Reassemble queued incoming segments into receive buffer and return to user."
+*
+*                   (d) For the "CLOSE-WAIT STATE ... since the remote side has already sent FIN, RECEIVEs
+*                       must be satisfied by the text already on hand, but not yet delivered to the user.
+*                       If no text is awaiting delivery, the RECEIVE will get a 'error: connection closing'
+*                       response.  Otherwise, any remaining text can be used to satisfy the RECEIVE".
+*
+*                   (e) (1) For the "CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE ... return 'error:
+*                           connection closing'".
+*
+*                       (2) Typically, these states will have already received ALL remaining closing
+*                           data from the closing remote host.
+*
+*                           (A) However, in case all receive data from the remote host has NOT yet been
+*                               received, application layer receives from these states are permitted until
+*                               the TCP connection's sequence receive state is closed & the TCP connection's
+*                               application receive queue is empty.
+*
+*                           (B) If all receive data from the remote host has NOT yet been received but the
+*                               application receive queue is currently empty, return application receive
+*                               queue empty error(s).
+*
+*                       (3) Once a TCP connection has closed & ALL receive data has been received by the
+*                           application layer :
+*
+*                           (A) Close the TCP connection;
+*                           (B) Return application receive queue closed error.
+*               (3) (a) RFC #793, Section 3.3 states that :
+*
+*                       (1) "Every octet of data sent over a TCP connection has a sequence number."
+*                       (2) In addition, "SYN and FIN ... control information ... [is] implicitly assign[ed]
+*                           sequence numbers ... [but] is not physically carried in the segment data space".
+*
+*                           (A) "For sequence number purposes, the SYN is considered to occur before the
+*                                first actual data octet of the segment in which it occurs," ...
+*                           (B) "While the FIN is considered to occur after the last actual data octet in
+*                                a segment in which it occurs."
+*
+*                       (3) "The segment length (SEG.LEN) includes both data and sequence space occupying
+*                            controls.
+*
+*
+*                                   -----          -----------------------        Synchronization
+*                                     ^            |  Initial SEQ #(SYN) |  <---  Sequence Number
+*                                     |            -----------------------        (see Note #3a2A)
+*                                     |            |    Data Octet #1    |  ---
+*                                     |            |    Data Octet #2    |   ^
+*                                                  |    Data Octet #3    |   |
+*                               TCP Connection     |          .          |   |       Data Octet
+*                                 Sequences        |          .          |   |   Sequence Number(s)
+*                               (see Note #3a)     |          .          |   |    (see Note #3a1)
+*                                                  | Data Octet #(N - 2) |   |
+*                                     |            | Data Octet #(N - 1) |   v
+*                                     |            | Data Octet #   N    |  ---       Closing
+*                                     |            -----------------------        Sequence Number
+*                                     v            |   Close SEQ #(FIN)  |  <---  (see Note #3a2B)
+*                                   -----          -----------------------
+*
+*
+*                       See also 'NetTCP_TxConnSync()   Note #3'
+*                              & 'NetTCP_TxConnClose()  Note #2'.
+*
+*                   (b) Therefore, since TCP synchronization or close sequence numbers are NOT actual data
+*                       sequences or octets that are transmitted or received; segments which include these
+*                       TCP control sequence numbers MUST adjust TCP data sequence numbers & TCP segment
+*                       lengths by these TCP control sequence numbers.
+*
+*                       (1) A TCP data segment MUST adjust its data index by the possible synchronization
+*                           control sequence.
+*
+*                           (A) On a received TCP segment's first data read, the segment's base data index
+*                               is NOT offset -- even though for a synchronization segment, this base data
+*                               index starts on the sequence number following the synchronization control
+*                               sequence.
+*
+*                           (B) On any additional received TCP segment data reads, the segment's base data
+*                               index MUST be offset by possible synchronization control sequence.
+*
+*                       (2) TCP connections & TCP data segments MUST advance their sequence numbers & adjust
+*                           their segment lengths by possible TCP control sequences.
+*
+*                           (A) A TCP connection MUST advance its sequence numbers by :
+*
+*                               (1) Possible synchronization sequence; but only on the first, initial access
+*                                   to a TCP synchronization segment; ...
+*                               (2) All accessed data sequence(s);    ...
+*                               (3) Possible closing         sequence; which SHOULD only occur once on the
+*                                   last access to a TCP closing segment.
+*
+*                           (B) (1) A received TCP segment MUST advance its sequence numbers by :
+*
+*                                   (a) Possible synchronization sequence; but only on the first, initial
+*                                       access to a TCP synchronization segment; ...
+*                                   (b) All accessed data sequence(s).
+*
+*                               (2) (a) A received TCP segment MUST adjust its total segment length by :
+*
+*                                       (1) Possible synchronization sequence; but only on the first, initial
+*                                           access to a TCP synchronization segment; ...
+*                                       (2) All accessed data sequence(s).
+*
+*                                       (3) Possible closing         sequence adjustment MAY be ignored since
+*                                           all effective segment data handling occurs prior to accessing any
+*                                           trailing closing sequence.
+*
+*                                   (b) A received TCP segment MUST adjust its data  segment length ONLY by :
+*
+*                                       (b) All accessed data sequence(s).
+*               (4) (a) Stream-type connections receive all data octets in one or more non-distinct packets.
+*                       In other words, the application data is NOT bounded by any specific packet(s); rather,
+*                       it is contiguous & sequenced from one packet to the next.
+*
+*                   (b) Therefore, the TCP connection receive queue is signaled ONLY when data is received for
+*                       a connection where data was previously unavailable.
+*
+*                   (c) Consequently, it is typical -- but NOT absolutely required -- that a single application
+*                       task only receive or request to receive application data from a TCP connection.
+*
+*                   See also 'net_sock.c  NetSock_RxDataHandlerStream()  Note #2'.
+*
+*               (5) Since pointer arithmetic is based on the specific pointer data type & inherent pointer
+*                   data type size, pointer arithmetic operands :
+*
+*                   (a) MUST be in terms of the specific pointer data type & data type size; ...
+*                   (b) SHOULD NOT & in some cases MUST NOT be cast to other data types or data type sizes.
+*
+*               (6) RFC #793, Section 3.7 'Data Communication : Managing the Window' states that "the window
+*                   sent in each segment indicates the range of sequence numbers the sender of the window
+*                   (the data receiver) is currently prepared to accept.  There is an assumption that this
+*                   is related to the currently available data buffer space available for this connection
+*                   ... One strategy would be to ... [update the] information when the window is larger".
+*
+*                   See also 'NetTCP_RxPktConnHandlerRxQ_Sync()  Note #5',
+*                            'NetTCP_RxPktConnHandlerRxQ_Conn()  Note #6',
+*                          & 'NetTCP_RxConnWinSizeHandler()      Note #2a'.
+*
+*               (7) (a) Since segments enqueued to a TCP connection's application receive queue have
+*                       already been acknowledged to the remote host & since no mechanism exists for a TCP
+*                       connection to re-request previously acknowledged segments, any TCP connection whose
+*                       application receive queue becomes corrupted MUST be closed to prevent the application
+*                       layer from receiving the corrupted data.
+*
+*                   (b) For any internal errors where the TCP connection's application receive queue is NOT
+*                       corrupted, the TCP connection is NOT closed.  Thus the application layer may try to
+*                       re-receive the application data.
+*
+*                       However, a TCP connection may deadlock due to persistent internal errors -- i.e. the
+*                       internal errors prevent the TCP connection from deframing application data from the
+*                       application receive queue which also prevents the TCP connection from receiving
+*                       additional application data.  Thus exception handling code in the application layer
+*                       SHOULD eventually detect & close any TCP connection deadlocked due to internal errors.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetTCP_RxAppData (NET_TCP_CONN_ID   conn_id_tcp,
+                              void             *pdata_buf,
+                              CPU_INT16U        data_buf_len,
+                              NET_TCP_FLAGS     flags,
+                              NET_ERR          *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_TCP_SEG_SIZE   seg_len_close      = 0u;
+    NET_TCP_SEQ_NBR    seq_nbr_cur        = 0u;
+#endif
+    CPU_BOOLEAN        block              = DEF_NO;
+    CPU_BOOLEAN        q_closed           = DEF_NO;
+    CPU_BOOLEAN        q_closed_empty     = DEF_NO;
+    CPU_BOOLEAN        q_prevly_empty     = DEF_NO;
+    CPU_BOOLEAN        peek               = DEF_NO;
+    CPU_BOOLEAN        frag_adv           = DEF_NO;
+    NET_TCP_CONN      *p_conn             = DEF_NULL;
+    NET_BUF           *p_buf_head         = DEF_NULL;
+    NET_BUF           *p_buf_seg          = DEF_NULL;
+    NET_BUF           *p_buf_seg_prev     = DEF_NULL;
+    NET_BUF           *p_buf_seg_next     = DEF_NULL;
+    NET_BUF           *p_buf_frag         = DEF_NULL;
+    NET_BUF           *p_buf_frag_next    = DEF_NULL;
+    NET_BUF_HDR       *p_buf_seg_hdr      = DEF_NULL;
+    NET_BUF_HDR       *p_buf_seg_prev_hdr = DEF_NULL;
+    NET_BUF_HDR       *p_buf_seg_next_hdr = DEF_NULL;
+    NET_BUF_HDR       *p_buf_frag_hdr     = DEF_NULL;
+    CPU_INT08U        *p_data             = DEF_NULL;
+    NET_BUF_SIZE       data_ix_frag       = 0u;
+    NET_BUF_SIZE       data_ix_pkt        = 0u;
+    NET_BUF_SIZE       data_len_pkt       = 0u;
+    CPU_INT16U         data_len_buf_rem   = 0u;
+    CPU_INT16U         data_len_tot       = 0u;
+    NET_TCP_SEG_SIZE   seg_len_avail      = 0u;
+    NET_TCP_SEG_SIZE   seg_len_data       = 0u;
+    NET_TCP_SEG_SIZE   seg_len_data_rem   = 0u;
+    NET_TCP_SEG_SIZE   seg_len_data_tot   = 0u;
+    NET_TCP_SEG_SIZE   seg_len_sync       = 0u;
+    NET_TCP_SEG_SIZE   seg_len_sync_init  = 0u;
+    NET_TCP_SEQ_NBR    seq_nbr_init       = 0u;
+    NET_TCP_SEQ_NBR    seq_nbr_ix         = 0u;
+    NET_BUF_QTY        buf_nbr_freed      = 0u;
+    NET_ERR            err                = NET_ERR_NONE;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return (0u);
+    }
+#endif
+
+                                                                /* ---------------- VALIDATE TCP CONN ----------------- */
+    p_conn    = &NetTCP_ConnTbl[conn_id_tcp];
+    q_closed =  DEF_NO;
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+             return (0u);
+
+
+        case NET_TCP_CONN_STATE_CLOSED:                         /* See Note #2a.                                        */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_OP;
+             return (0u);
+
+
+        case NET_TCP_CONN_STATE_LISTEN:                         /* See Note #2b.                                        */
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #2c.                                        */
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+             break;
+
+
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:                     /* See Note #2d.                                        */
+        case NET_TCP_CONN_STATE_CLOSING:                        /* See Note #2e.                                        */
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:             /* See Note #2e3.                                       */
+             if (p_conn->RxQ_State == NET_TCP_RX_Q_STATE_CLOSED) {
+                 q_closed = DEF_YES;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+             return (0u);
+    }
+
+
+
+                                                                /* ------------ WAIT ON TCP CONN APP RX Q ------------- */
+    if (p_conn->RxQ_App_Head == DEF_NULL) {                     /* If no rx'd data pkts;                           ...  */
+        if (q_closed != DEF_NO) {                               /* ... & rx q closed             (see Note #2e3),  ...  */
+            if (p_conn->ConnState == NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL) {
+                                                                /* ... close data-avail TCP conn (see Note #2e3A)  ...  */
+                NetTCP_ConnCloseHandler(p_conn, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            }
+
+           *p_err =  NET_TCP_ERR_RX_Q_CLOSED;                   /* ... & rtn rx Q closed err     (see Note #2e3B); ...  */
+            return (0u);
+        }
+
+        block = DEF_BIT_IS_SET(flags, NET_TCP_FLAG_RX_BLOCK);
+        if (block != DEF_YES) {                                 /* ... & non-blocking rx,                          ...  */
+           *p_err =  NET_TCP_ERR_RX_Q_EMPTY;                    /* ... rtn rx Q empty err.                              */
+            return (0u);
+        }
+
+        Net_GlobalLockRelease();
+        NetTCP_RxQ_Wait(conn_id_tcp, p_err);
+        Net_GlobalLockAcquire((void *)&NetTCP_RxAppData, &err);
+        if (err != NET_ERR_NONE) {
+            *p_err  = err;                                      /* Rtn err from Net_GlobalLockAcquire().                */
+             return (0u);
+        }
+
+        if (*p_err != NET_TCP_ERR_NONE) {
+             return (0u);                                       /* Rtn err from NetTCP_RxQ_Wait().                      */
+        }
+
+        if (p_conn->RxQ_App_Head == DEF_NULL) {                 /* If still NO rx'd data pkts, ...                      */
+           *p_err =  NET_TCP_ERR_RX_Q_EMPTY;                    /* ... rtn rx Q empty err.                              */
+            return (0u);
+        }
+
+        q_prevly_empty = DEF_YES;
+
+    } else {
+        NetTCP_RxQ_Clr(conn_id_tcp, &err);                      /* Clr any possible async rx Q signal.                  */
+        q_prevly_empty = DEF_NO;
+    }
+
+
+
+                                                                /* ----------- DEFRAME TCP CONN RX APP DATA ----------- */
+    p_buf_head         = (NET_BUF       *)p_conn->RxQ_App_Head;
+    p_buf_seg          = (NET_BUF       *)p_buf_head;
+    p_buf_seg_prev     = (NET_BUF       *)0;
+    p_data            = (CPU_INT08U    *)pdata_buf;
+    data_len_buf_rem  = (CPU_INT16U     )data_buf_len;
+    data_len_tot      = (CPU_INT16U     )0u;
+    p_buf_seg_next     = (NET_BUF       *)0;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    p_buf_seg_hdr      = (NET_BUF_HDR   *)&p_buf_seg->Hdr;
+    seq_nbr_cur       = (NET_TCP_SEQ_NBR) p_buf_seg_hdr->TCP_SeqNbr;
+#endif
+
+    while ((p_buf_seg != DEF_NULL) &&                           /* Copy app rx data from TCP conn q'd seg(s).           */
+           (data_len_buf_rem     > 0)) {
+
+        p_buf_seg_hdr  = &p_buf_seg->Hdr;
+        p_buf_seg_next =  p_buf_seg_hdr->NextPrimListPtr;
+        p_buf_frag     =  p_buf_seg;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (seq_nbr_cur != p_buf_seg_hdr->TCP_SeqNbr) {         /* If next q'd seg's seq nbr NOT consecutive, ...       */
+                                                                /* ... close TCP conn (see Note #7a).                   */
+            NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                             (NET_BUF_HDR      *)0,
+                             (CPU_BOOLEAN       )DEF_YES,
+                             (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+           *p_err =  NET_TCP_ERR_CONN_DATA_INVALID;
+            return (0u);
+        }
+#endif
+                                                                /* Init seg lens.                                       */
+        seg_len_data      = p_buf_seg_hdr->TCP_SegLenData;
+        seg_len_data_rem  = seg_len_data;
+        seg_len_data_tot  = 0u;
+
+        seg_len_sync      = 0u;
+        seg_len_sync_init = 0u;
+        if (p_buf_seg_hdr->TCP_SegSync  == DEF_YES) {
+            seg_len_sync  = NET_TCP_SEG_LEN_SYNC;
+        }
+                                                                /* If still init seg len, cfg init sync seg len.        */
+        if (p_buf_seg_hdr->TCP_SegLen == p_buf_seg_hdr->TCP_SegLenInit) {
+            seg_len_sync_init = seg_len_sync;
+        }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        seg_len_close     = 0u;
+        if (p_buf_seg_hdr->TCP_SegClose == DEF_YES) {
+            seg_len_close = NET_TCP_SEG_LEN_CLOSE;
+        }
+#endif
+                                                                /* Calc start seq nbr ix into seg data (see Note #3b1). */
+        seq_nbr_init = (NET_TCP_SEQ_NBR)(p_buf_seg_hdr->TCP_SeqNbrInit + seg_len_sync - seg_len_sync_init);
+        seq_nbr_ix   = (NET_TCP_SEQ_NBR)(p_buf_seg_hdr->TCP_SeqNbr     - seq_nbr_init);
+        data_ix_frag = (NET_BUF_SIZE   ) seq_nbr_ix;
+
+        frag_adv     =  DEF_YES;
+
+        while ((p_buf_frag != DEF_NULL) &&
+               (frag_adv   == DEF_YES )) {
+
+            p_buf_frag_hdr  = &p_buf_frag->Hdr;
+                                                                /* While seg's frag data ix >= cur frag data len ...    */
+            if (data_ix_frag >= p_buf_frag_hdr->DataLen) {
+                data_ix_frag   -= p_buf_frag_hdr->DataLen;
+                p_buf_frag_next = p_buf_frag_hdr->NextBufPtr;
+                p_buf_frag      = p_buf_frag_next;              /* ... adv to next seg frag.                            */
+
+            } else {
+                frag_adv       =  DEF_NO;
+            }
+        }
+
+
+        while ((p_buf_frag       != DEF_NULL) &&                /* Copy app rx data from avail seg pkt buf(s).          */
+               (data_len_buf_rem  > 0)        &&
+               (seg_len_data_rem  > 0)       ) {
+
+            p_buf_frag_hdr  = &p_buf_frag->Hdr;
+            p_buf_frag_next =  p_buf_frag_hdr->NextBufPtr;
+
+            seg_len_avail  = (NET_TCP_SEG_SIZE)(p_buf_frag_hdr->DataLen - data_ix_frag);
+            if (seg_len_avail > seg_len_data_rem) {             /* If seg frag pkt data len > rem seg len, ...          */
+                seg_len_avail = seg_len_data_rem;               /* ... lim copy to rem seg len.                         */
+            }
+
+            data_len_pkt =  DEF_MIN((NET_BUF_SIZE)data_len_buf_rem, /* Lim copy to min of rem'ing data buf len ...      */
+                                    (NET_BUF_SIZE)seg_len_avail); /* ... or avail seg len.                              */
+                                                                /* Calc ix into seg frag's data.                        */
+            data_ix_pkt  = (NET_BUF_SIZE)p_buf_frag_hdr->DataIx + data_ix_frag;
+            data_ix_frag =  0u;
+
+            NetBuf_DataRd((NET_BUF    *) p_buf_frag,
+                          (NET_BUF_SIZE) data_ix_pkt,
+                          (NET_BUF_SIZE) data_len_pkt,
+                          (CPU_INT08U *) p_data,
+                          (NET_ERR    *)&err);
+            if ( err != NET_BUF_ERR_NONE) {                     /* See Note #6b.                                        */
+               *p_err  = NET_TCP_ERR_CONN_FAIL;
+                return (0u);
+            }
+                                                                /* Update data ptr & lens.                              */
+            p_data           +=             data_len_pkt;       /* MUST NOT cast ptr operand (see Note #5b).            */
+            data_len_tot     += (CPU_INT16U)data_len_pkt;
+            data_len_buf_rem -= (CPU_INT16U)data_len_pkt;
+            seg_len_data_tot += (CPU_INT16U)data_len_pkt;
+            seg_len_data_rem -= (CPU_INT16U)data_len_pkt;
+
+            p_buf_frag         =  p_buf_frag_next;
+        }
+
+        if (data_len_buf_rem > 0) {                             /* If rem data buf len > 0, ...                         */
+            p_buf_seg_prev = p_buf_seg;
+            p_buf_seg      = p_buf_seg_next;                    /* ... adv to next q'd seg.                             */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+            if (seg_len_data_tot != seg_len_data) {             /* If calc'd seg data len != actual seg data len, ...   */
+                                                                /* ... close TCP conn (see Note #7a).                   */
+                NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                                 (NET_BUF_HDR      *)0,
+                                 (CPU_BOOLEAN       )DEF_YES,
+                                 (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+               *p_err =  NET_TCP_ERR_CONN_DATA_INVALID;
+                return (0u);
+            }
+                                                                /* Adv seq nbr by cur seg's :                ...        */
+            seq_nbr_cur += (NET_TCP_SEQ_NBR)seg_len_sync_init;  /* ... init sync  seg len (see Note #3b2A1), ...        */
+            seq_nbr_cur += (NET_TCP_SEQ_NBR)seg_len_data;       /* ...      data  seg len (see Note #3b2A2), ...        */
+            seq_nbr_cur += (NET_TCP_SEQ_NBR)seg_len_close;      /* ...    & close seg len (see Note #3b2A3).            */
+#endif
+        }
+    }
+
+    q_closed_empty = ((q_closed != DEF_NO) &&                   /* Chk rx q closed ...                                  */
+                      (data_len_tot < 1)) ? DEF_YES : DEF_NO;   /* ... & empty (i.e. no rx'd data).                     */
+
+
+
+                                                                /* ------------- UPDATE TCP CONN APP RX Q ------------- */
+    peek = DEF_BIT_IS_SET(flags, NET_TCP_FLAG_RX_DATA_PEEK);
+    if (peek == DEF_YES) {                                      /* If peek opt req'd                      ...           */
+        if (q_prevly_empty == DEF_YES) {                        /* ... & TCP conn app rx Q prev'ly empty, ...           */
+            NetTCP_RxQ_Signal(conn_id_tcp, &err);               /* ...     signal app rx Q                ...           */
+                                                                /* ... to negate non-consuming peek (see Note #4b).     */
+            if (err != NET_TCP_ERR_NONE) {                      /* If app rx Q signal failed, ...                       */
+                peek = DEF_NO;                                  /* ... consume pkt buf(s).                              */
+            }
+        }
+    }
+
+    if ((peek != DEF_YES) ||                                    /* If peek opt NOT req'd                         ..     */
+        (q_closed_empty != DEF_NO)) {                           /* .. or rx q closed & empty, unlink ALL seg pkt ..     */
+                                                                /* .. buf(s) whose data was entirely consumed.          */
+
+
+        if (p_buf_seg != DEF_NULL) {                            /* If TCP conn app rx Q NOT empty after data rd(s)      */
+            if (seg_len_data_rem > 0) {                         /* .. & cur seg's rem data len > 0;              ..     */
+                p_buf_seg_hdr->PrevPrimListPtr = DEF_NULL;      /* ..   unlink from prev q'd seg(s),             ..     */
+                p_conn->RxQ_App_Head           = p_buf_seg;     /* ..   set new TCP conn app rx Q head,          ..     */
+                                                                /* .. & update seg's seq nbr  (see Note #3b2B1)  ..     */
+                p_buf_seg_hdr->TCP_SeqNbr     += (seg_len_data_tot + seg_len_sync_init);
+                                                                /* ..        & seg's seg lens (see Note #3b2B2).        */
+                p_buf_seg_hdr->TCP_SegLen     -= (seg_len_data_tot + seg_len_sync_init);
+                p_buf_seg_hdr->TCP_SegLenData -=  seg_len_data_tot;
+
+                if (p_buf_seg_prev != DEF_NULL) {               /* If prev q'd seg(s) avail, ...                        */
+                                                                /* ... unlink from app rx Q  ...                        */
+                    p_buf_seg_prev_hdr                  = &p_buf_seg_prev->Hdr;
+                    p_buf_seg_prev_hdr->NextPrimListPtr = DEF_NULL;
+                    buf_nbr_freed += NetTCP_RxPktFree(p_buf_head); /* ... & free ALL rd seg pkt buf(s).                 */
+                }
+
+            } else {                                            /* Else if cur seg's rem data len = 0     ...           */
+                if (p_buf_seg_next != DEF_NULL) {               /* ... &    rem rx q'd seg(s) avail,      ...           */
+                                                                /* ... unlink cur seg from rem q'd seg(s) ...           */
+                    p_buf_seg_next_hdr                  = &p_buf_seg_next->Hdr;
+                    p_buf_seg_next_hdr->PrevPrimListPtr = DEF_NULL;
+                    p_buf_seg_hdr->NextPrimListPtr      = DEF_NULL;
+                                                                /* ... set new TCP conn app rx Q head;    ...           */
+                    p_conn->RxQ_App_Head                = p_buf_seg_next;
+
+
+                } else {                                        /* ... & NO rem rx q'd seg(s) avail,      ...           */
+                                                                /* ... unlink  ALL q'd seg(s);            ...           */
+                    p_conn->RxQ_App_Head                = DEF_NULL;
+                    p_conn->RxQ_App_Tail                = DEF_NULL;
+                }
+
+                buf_nbr_freed += NetTCP_RxPktFree(p_buf_head);  /* ... & free rd  seg pkt buf(s) from app rx Q.         */
+            }
+
+        } else {                                                /* Else clr app rx Q ...                                */
+            p_conn->RxQ_App_Head = DEF_NULL;
+            p_conn->RxQ_App_Tail = DEF_NULL;
+
+            buf_nbr_freed += NetTCP_RxPktFree(p_buf_head);      /* ... & free ALL seg pkt buf(s) from app rx Q.         */
+        }
+
+                                                                /* ----------- UPDATE TCP CONN RX WIN SIZE ------------ */
+                                                                /* Inc TCP conn's rx win size (see Note #6).            */
+#ifdef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+        NetTCP_RxConnWinSizeHandler(p_conn, DEF_NULL, data_len_tot, NET_TCP_CONN_RX_WIN_INC);
+#else
+        NetTCP_RxConnWinSizeHandler(p_conn, DEF_NULL, buf_nbr_freed, NET_TCP_CONN_RX_WIN_INC);
+#endif
+    }
+
+
+    if (q_closed_empty != DEF_NO) {                             /* If rx q closed & empty,                       ..     */
+        if (p_conn->ConnState == NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL) {
+                                                                /* .. close data-avail TCP conn (see Note #2e3A) ..     */
+            NetTCP_ConnCloseHandler(p_conn, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+        }
+
+       *p_err =  NET_TCP_ERR_RX_Q_CLOSED;                       /* .. & rtn rx Q closed err     (see Note #2e3B).       */
+        return (0u);
+    }
+
+
+#ifdef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+    (void)&buf_nbr_freed;
+#endif
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (data_len_tot);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_TxConnReq()
+*
+* Description : (1) Transmit TCP connection request :
+*
+*                   (a) Update   TCP connection state
+*                   (b) Transmit TCP connection request
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to transmit connection request.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                                                                   ---- RETURNED BY NetTCP_ConnIsUsed() : -----
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN            Invalid TCP connection number.
+*
+*                                                                   ---- RETURNED BY NetTCP_TxConnSync() : -----
+*                               NET_TCP_ERR_NONE                    TCP connection request successfully
+*                                                                       transmitted.
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_ERR_TX                              Transmit        error.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_ConnHandlerStream().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) On ANY error(s), return error to TCP connection caller & allow caller to retry or close
+*                   connection(s) but do NOT close TCP connection.
+*********************************************************************************************************
+*/
+
+void  NetTCP_TxConnReq (NET_TCP_CONN_ID   conn_id_tcp,
+                        NET_ERR          *p_err)
+{
+    NET_TCP_CONN        *p_conn;
+    NET_TCP_CONN_STATE   state;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------- VALIDATE TCP CONN STATE -------------- */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+             break;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_CONN_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+#endif
+
+
+                                                                /* -------------- UPDATE TCP CONN STATE --------------- */
+    state             = p_conn->ConnState;
+    p_conn->ConnState  = NET_TCP_CONN_STATE_SYNC_TXD;
+
+
+                                                                /* ----------------- TX TCP CONN REQ ------------------ */
+    NetTCP_TxConnSync((NET_TCP_CONN     *)p_conn,
+                      (NET_BUF_HDR      *)0,
+                      (NET_TCP_CONN_STATE)state,
+                      (NET_ERR          *)p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {                           /* See Note #2.                                         */
+         return;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_TxConnReqClose()
+*
+* Description : (1) Transmit TCP connection close :
+*
+*                   (a) Handle TCP connection close                             See Note #2a
+*                   (b) Update TCP connection timer                             See Note #2b
+*
+*
+* Argument(s) : conn_id_tcp         Handle identifier of TCP connection to transmit connection close.
+*
+*               conn_close_code     Indicate whether to close transport connection :
+*
+*                                       NET_CONN_CLOSE_FULL         Close TCP connection but do NOT allow
+*                                                                       closing receive data to be available.
+*                                       NET_CONN_CLOSE_HALF         Close TCP connection but        allow
+*                                                                       closing receive data to be available.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection close successfully transmitted
+*                                                                       or queued for transmit.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*                               NET_TCP_ERR_INVALID_CONN_ID         Invalid network connection handle identifier.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                                                                   ------ RETURNED BY NetTCP_ConnIsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN            Invalid TCP connection number.
+*
+*                                                                   ------ RETURNED BY NetTCP_TxConnClose() : ------
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_ACK_NONE           TCP connection acknowledgement NOT requested.
+*                               NET_TCP_ERR_CONN_ACK_DLYD           TCP connection acknowledgement transmit delayed.
+*                               NET_TCP_ERR_CONN_ACK_PREVLY_TXD     TCP connection acknowledgement previously
+*                                                                       transmitted for segment.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        TCP connection acknowledgement NOT valid for
+*                                                                       current TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_CloseHandlerStream().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) (a) RFC #793, Section 3.9 'Event Processing : CLOSE Call' specifies how to handle
+*                       close requests from the application layer :
+*
+*                       (1) For the "CLOSED STATE ... return 'error: connection does not exist'".
+*
+*                       (2) For the "LISTEN STATE ... any outstanding RECEIVEs are returned with 'error:
+*                           closing' responses.  Delete TCB [and] enter CLOSED state".
+*
+*                       (3) For the "SYN-SENT STATE ... Delete the TCB and return 'error: closing'
+*                           responses to any queued SENDs, or RECEIVEs".
+*
+*                       (4) For the "SYN-RECEIVED STATE" :
+*
+*                           (A) "If no SENDs have been issued and there is no pending data to send," ...
+*                               (1) "then form a FIN segment and send it,"                           ...
+*                               (2) "and enter FIN-WAIT-1 state;"                                    ...
+*
+*                           (B) "Otherwise queue for processing after entering ESTABLISHED state."
+*
+*                       (5) For the "ESTABLISHED STATE" :
+*
+*                           (A) "Queue this until all preceding SENDs have been segmentized," ...
+*                           (B) "then form a FIN segment and send it"                         ...
+*                           (C) "In any case, enter FIN-WAIT-1 state."
+*
+*                       (6) For the "FIN-WAIT-1 STATE, FIN-WAIT-2 STATE" :
+*
+*                           (A) "Strictly speaking, this is an error and should receive a 'error: connection
+*                                closing' response."
+*
+*                           (B) "An 'ok' response would be acceptable, too, as long as a second FIN is not
+*                                emitted (the first FIN may be retransmitted though)."
+*
+*                       (7) For the "CLOSE-WAIT STATE" :
+*
+*                           (A) "Queue this request until all preceding SENDs have been segmentized;" ...
+*                           (B) "then send a FIN segment,"                                            ...
+*                           (C) (1) "Enter CLOSING state."
+*                               (2) RFC #1122, Section 4.2.2.20.(a) amends the state transition to "enter
+*                                   LAST-ACK state, not CLOSING".
+*
+*                       (8) For the "CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE ... respond with 'error:
+*                           connection closing'".
+*
+*                   (b) RFC #793, Section 3.9 'Event Processing : CLOSE Call' does NOT specify which timeout
+*                       values to set for each state transition to closing state(s).
+*
+*                       #### Therefore, the following timeout values will be used for the following close
+*                       state transitions :
+*
+*                       (1) SYN-RECEIVED STATE  ->  FIN-WAIT-1 STATE                TCP Connection timeout
+*                           See also 'NetTCP_RxPktConnHandlerSyncRxd()  Note #3'.
+*
+*                       (2) ESTABLISHED  STATE  ->  FIN-WAIT-1 STATE                TCP Connection timeout
+*                           See also 'NetTCP_RxPktConnHandlerConn()     Note #3'.
+*
+*                       (3) CLOSE-WAIT   STATE  ->  LAST-ACK   STATE                TCP Time-Wait / Two TCP Maximum
+*                                                                                       Segment Lifetimes timeout
+*                           See also 'NetTCP_RxPktConnHandlerLastAck()  Note #3'.
+*
+*                   (c) RFC #1122, Section 4.2.2.13 states that "a TCP connection may terminate in two ways" :
+*
+*                       (1) "The normal TCP close sequence using a FIN handshake."
+*                       (2) "An 'abort' in which one or more RST segments are sent and the connection state
+*                            is immediately discarded."
+*
+*               (3) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                       FIN-WAIT-2 STATE' states that "if the retransmission queue is empty, the user's
+*                       CLOSE can be acknowledged".
+*
+*                   (b) However, TCP connection should signal the application layer that "the user's close
+*                       [is] acknowledged" whenever its re-transmit queue becomes &/or is empty :
+*
+*                       (1) Transition from LISTEN   to CLOSED
+*                       (2) Transition from SYN-SENT to CLOSED
+*
+*                   See also 'NetTCP_RxPktConnHandlerSignalClose()  Note #1'.
+*
+*               (4) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) Close the TCP connection.
+*********************************************************************************************************
+*/
+
+void  NetTCP_TxConnReqClose (NET_TCP_CONN_ID   conn_id_tcp,
+                             CPU_INT08U        conn_close_code,
+                             NET_ERR          *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN          used;
+    NET_CONN_ID          conn_id;
+    NET_CONN_ID          conn_id_transport;
+#endif
+    NET_TCP_CONN        *p_conn;
+    NET_TCP_CONN_STATE   state;
+    NET_TMR_TICK         timeout_tick;
+    NET_ERR              err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* VALIDATE CONN IDs                                    */
+    conn_id = p_conn->ID_Conn;
+    used    = NetConn_IsUsed(conn_id, &err);
+    if (used != DEF_YES) {
+       *p_err = NET_TCP_ERR_INVALID_CONN_ID;
+        return;
+    }
+
+    conn_id_transport =  NetConn_ID_TransportGet(conn_id, &err);
+    if (conn_id_tcp  != (NET_TCP_CONN_ID)conn_id_transport) {
+       *p_err = NET_TCP_ERR_INVALID_CONN_ID;
+        return;
+    }
+#endif
+
+
+                                                                /* -------------- HANDLE TCP CONN CLOSE --------------- */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:                         /* See Note #2a1.                                       */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_LISTEN:                         /* See Note #2a2.                                       */
+        case NET_TCP_CONN_STATE_SYNC_TXD:                       /* See Note #2a3.                                       */
+                                                                /* Signal app conn close (see Note #3b) ...             */
+             NetTCP_RxPktConnHandlerSignalClose(p_conn, DEF_NO, &err);
+                                                                /* ... & close TCP conn.                                */
+             NetTCP_ConnCloseHandler(p_conn, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_TCP_ERR_NONE;
+             return;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:                       /* See Note #2a4.                                       */
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #2a5.                                       */
+                                                                /* Enter fin-wait-1 state  (see Note #2a5C),        ... */
+             state                = p_conn->ConnState;
+             p_conn->ConnState     = NET_TCP_CONN_STATE_FIN_WAIT_1;
+             p_conn->TxQ_State     = NET_TCP_TX_Q_STATE_CLOSING;
+             p_conn->ConnCloseCode = conn_close_code;
+             timeout_tick         = p_conn->TimeoutConn_tick;   /* ... reset conn tmr      (see Notes #2b1 & #2b2), ... */
+
+             NetTCP_TxConnClose(p_conn, state, p_err);          /* ... & tx TCP conn close (see Note #2a5B).            */
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:                     /* See Note #2a7.                                       */
+                                                                /* Enter last-ack state    (see Note #2a7C2), ...       */
+             state                 = p_conn->ConnState;
+             p_conn->ConnState     = NET_TCP_CONN_STATE_LAST_ACK;
+             p_conn->TxQ_State     = NET_TCP_TX_Q_STATE_CLOSING;
+             p_conn->ConnCloseCode = conn_close_code;
+                                                                /* ... start time-wait tmr (see Note #2b3),   ...       */
+             timeout_tick          = p_conn->TimeoutConn_tick;
+
+             NetTCP_TxConnClose(p_conn, state, p_err);          /* ... & tx TCP conn close (see Note #2a7B).            */
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:                     /* See Note #2a6.                                       */
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:                      /* See Note #2a8.                                       */
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+
+
+                                                                /* -------------------- UPDATE TMR -------------------- */
+    if (p_conn->TimeoutTmr != DEF_NULL) {
+        NetTmr_Set((NET_TMR    *) p_conn->TimeoutTmr,
+                   (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+    } else {
+        p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_ConnIdleTimeout,
+                                       (void        *) p_conn,
+                                       (NET_TMR_TICK ) timeout_tick,
+                                       (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                       (NET_ERR     *)&err);
+    }
+
+    if (err != NET_TMR_ERR_NONE) {
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )p_conn->ConnCloseAppFlag,
+                         (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+       *p_err = NET_TCP_ERR_CONN_FAIL;
+        return;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_TxConnAppData()
+*
+* Description : (1) Prepare & transmit data from Application layer(s) via TCP connection :
+*
+*                   (a) Validate application data
+*
+*                   (b) Transmit application data via TCP Transmit :
+*                       (1) Validate TCP connection
+*                       (2) Wait on  TCP connection transmit queue
+*                       (3) Prepare  TCP data segment(s) :
+*                           (A) TCP segment addresses
+*                           (B) Prepare application data :
+*                               (1) Get buffer(s) for application data
+*                               (2) Copy application data into TCP packet buffer(s)
+*                               (3) Update TCP segment data controls
+*                               (4) Update application data controls
+*                       (4) Update TCP connection transmit window
+*
+*                   (c) Update TCP connection :
+*                       (1) Append TCP transmit segment(s) to TCP connection transmit queue
+*                       (2) Update TCP connection sequence number(s)
+*
+*                   (d) Transmit TCP data segment(s) via TCP Transmit
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of connection to transmit application data.
+*
+*               p_data          Pointer to application data.
+*               ------          Argument validated in NetSock_TxDataHandlerStream().
+*
+*               data_len        Length  of application data (in octets) [see Note #4].
+*               --------        Argument validated in NetSock_TxDataHandlerStream().
+*
+*               flags           Flags to select transmit options; bit-field flags logically OR'd :
+*               -----
+*                                   NET_TCP_FLAG_NONE               No       TCP transmit flags selected.
+*                                   NET_TCP_FLAG_TX_BLOCK           Transmit TCP application data with blocking,
+*                                                                       if flag set; without blocking, if clear.
+*
+*                               Argument validated in NetSock_TxDataHandlerStream().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    Application data successfully prepared &
+*                                                                       transmitted via TCP layer.
+*                               NET_ERR_FAULT_NULL_PTR                Argument 'p_data'   passed a NULL pointer.
+*                               NET_TCP_ERR_INVALID_DATA_SIZE       Argument 'data_len' passed an invalid size.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_CONN_DATA_INVALID       TCP connection application transmit queue contains
+*                                                                       invalid or improperly sequenced data.
+*                               NET_TCP_ERR_TX_Q_FULL               TCP connection transmit queue full.
+*                               NET_TCP_ERR_TX_Q_SUSPEND            TCP connection transmit queue temporarily suspended.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+*                                                                   -------- RETURNED BY NetTCP_ConnIsUsed() : ---------
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN            Invalid TCP connection number.
+*
+*                                                                   ---------- RETURNED BY NetTCP_TxQ_Wait() : ---------
+*                               NET_TCP_ERR_TX_Q_SIGNAL_ABORT       TCP connection transmit queue signal aborted;
+*                                                                       TCP connection closed/aborted.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT       TCP connection transmit queue signal fault.
+*
+*                                                                   -------- RETURNED BY NetTCP_TxConnTxQ() : ----------
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_ACK_NONE           TCP connection acknowledgement NOT requested.
+*                               NET_TCP_ERR_CONN_ACK_DLYD           TCP connection acknowledgement transmit delayed.
+*                               NET_TCP_ERR_CONN_ACK_PREVLY_TXD     TCP connection acknowledgement previously
+*                                                                       transmitted for segment.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        TCP connection acknowledgement NOT valid for
+*                                                                       current TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_ERR_TX                              Transmit        error.
+*
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*
+*                                                                   ------- RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE          Network access NOT acquired.
+*
+* Return(s)   : Number of data octets transmitted, if NO error(s).
+*
+*               0,                                 otherwise.
+*
+* Caller(s)   : NetSock_TxDataHandlerStream().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) RFC #793, Section 3.9 'Event Processing : SEND Call' specifies how to handle transmit
+*                   data requests from the application layer :
+*
+*                   (a) For the "CLOSED STATE ... return 'error: connection does not exist'".
+*
+*                   (b) For the "LISTEN STATE" :
+*
+*                           (A) TCP Listen state transmit NOT yet implemented;
+*                               see also 'net_sock.c  NetSock_TxDataHandlerStream()  Note #2aA'.
+*                               #### NET-815
+*
+*                       (1) "If the foreign socket is specified, then" :
+*
+*                           (A) "Change the connection from passive to active," ...
+*                           (B) "Select an ISS"                                 ...
+*                           (C) "Send a SYN segment,"                           ...
+*                           (D) "Set" :
+*                               (1) "SND.UNA to ISS," ...
+*                               (2) "SND.NXT to ISS+1."
+*                           (E) "Enter SYN-SENT state."
+*                           (F) "Data associated with SEND may be" ...
+*                               (1) "sent with SYN segment"        ...
+*                               (2) (a) "or queued for transmission after entering ESTABLISHED state."
+*                                   (b) "If there is no room to queue the request, respond with 'error:
+*                                        insufficient resources'."
+*
+*                       (2) "If Foreign [sic] socket was not specified, then return 'error: foreign socket
+*                            unspecified'."
+*
+*                   (c) For the "SYN-SENT STATE, SYN-RECEIVED STATE" :
+*
+*                       (1) "Queue the data for transmission after entering ESTABLISHED state."
+*                       (2) "If no space to queue, respond with 'error: insufficient resources'."
+*
+*                   (d) For the "ESTABLISHED STATE, CLOSE-WAIT STATE" :
+*
+*                       (1) (A) "Segmentize the buffer"                         ...
+*                           (B) "and send it with a piggybacked acknowledgment" ...
+*                               (1) "(acknowledgment value = RCV.NXT)"
+*                       (2) "If there is no insufficient space to remember this buffer, simply return
+*                           'error: insufficient resources'."
+*
+*                   (e) For the "FIN-WAIT-1 STATE, FIN-WAIT-2 STATE, CLOSING STATE, LAST-ACK STATE,
+*                       TIME-WAIT STATE" :
+*
+*                       (1) "Return 'error: connection closing'" ...
+*                       (2) "and do not service request."
+*               (3) TCP segments with transmit data are sequenced into the TCP connection's transmit
+*                   queue to await transmission at the appropriate time(s) [see 'NetTCP_TxConnTxQ()
+*                   Note #1b'].
+*
+*                   (a) Transmit TCP segments are inserted into a doubly-linked Transmit Queue, ordered
+*                       consecutively by sequence number(s) [see also Note #3b1].
+*
+*                       In the diagram below, ... :
+*
+*                       (1) (A) TCP connections' 'TxQ_Head' points to the head of a TCP connections'
+*                                   Transmit Queue;
+*                           (B) TCP connections' 'TxQ_Tail' points to the tail of a TCP connections'
+*                                   Transmit Queue.
+*
+*                       (2) Segment buffers' 'PrevPrimListPtr' & 'NextPrimListPtr' doubly-link each
+*                           segment to form the Transmit Queue.
+*
+*                   (b) (1) Transmit data is packetized into TCP segments in sequence-order.  Therefore,
+*                           new transmit segments are sequenced after previously packetized segments
+*                           starting at the tail of the Transmit Queue.
+*
+*                       (2) Segments at the head of the Transmit Queue are available & ready to be
+*                           transmitted via the Internet Transmit Layer.
+*
+*
+*                                      |                                               |
+*                                      |<------- TCP Connection Transmit Queue ------->|
+*                                      |                (see Note #3)                  |
+*
+*                                  Segments Ready                           Segments Sequenced
+*                                   to Transmit                             into Transmit Queue
+*                                  start at head                             starting at tail
+*                                 (see Note #3b2)                            (see Note #3b1)
+*
+*                                         |             NextPrimListPtr             |
+*                                         |             (see Note #3a2)             |
+*                                         v                    |                    v
+*                                                              |
+*                       Head of        -------       -------   v   -------       -------  (see Note #3a1B)
+*                       Transmit  ---->|     |------>|     |------>|     |------>|     |
+*                        Queue         |     |       |     |       |     |       |     |       Tail of
+*                                      |     |<------|     |<------|     |<------|     |<----  Transmit
+*                  (see Note #3a1A)    |     |       |     |   ^   |     |       |     |        Queue
+*                                      |     |       |     |   |   |     |       |     |
+*                                      -------       -------   |   -------       -------
+*                                                              |
+*                                                       PrevPrimListPtr
+*                                                       (see Note #3a2)
+*
+*               (4) 'data_len' of 0 octets NOT allowed.
+*
+*               (5) Certain network connections MUST periodically suspend network transmit(s) to handle
+*                   network receive packet(s).  To protect TCP connections from transmit corruption while
+*                   suspended, ALL TCP data transmits & TCP transmit queue handling MUST be blocked for
+*                   suspended connections until the connection is no longer suspended.
+*
+*                   See also 'NetTCP_TxConnTxQ()  Note #12b2A2'.
+*
+*               (6) (a) RFC #793, Section 3.8 'Interfaces : User/TCP Interface : TCP User Commands : Send'
+*                       states that :
+*
+*                       (1) "If the PUSH flag is set, the data must be transmitted promptly to the receiver,
+*                            and the PUSH bit will be set in the last TCP segment created from the buffer."
+*
+*                       (2) "If the PUSH flag is not set, the data may be combined with data from subsequent
+*                            SENDs for transmission efficiency."
+*
+*                   (b) RFC #1122, Section 4.2.2.2 states that :
+*
+*                       (1) "When an application issues a series of SEND calls without setting the PUSH
+*                            flag, the TCP MAY aggregate the data internally without sending it."
+*
+*                       (2) "The PSH bit is not a record marker and is independent of segment boundaries.
+*                            The transmitter SHOULD collapse successive PSH bits when it packetizes data,
+*                            to send the largest possible segment.
+*
+*                       (3) (A) "A TCP MAY implement PUSH flags on SEND calls."
+*
+*                           (B) (1) "If PUSH flags are not implemented, then the sending TCP : ...
+*
+*                                   (a) must not buffer data indefinitely, and ...
+*                                   (b) MUST set the PSH bit in the last buffered segment (i.e., when
+*                                       there is no more queued data to be sent)."
+*
+*                                       (1) However, NO RFC specifies whether the PUSH bit should be
+*                                           set ONLY in the last buffered segment.  Therefore, is is
+*                                           assumed that the PUSH bit MAY be set in the last buffered
+*                                           segment of each call to SEND.
+*
+*                               (2) "When the PUSH flag is not implemented on SEND calls, i.e., when
+*                                    the application/TCP interface uses a pure streaming model,
+*                                    responsibility for aggregating any tiny data fragments to form
+*                                    reasonable sized segments is partially borne by the application
+*                                    layer."
+*
+*                       (4) (A) "An application program is logically required to set the PUSH flag in a
+*                                SEND call whenever it needs to force delivery of the data to avoid a
+*                                communication deadlock.  However, a TCP SHOULD send a maximum-sized
+*                                segment whenever possible, to improve performance."
+*
+*                           (B) "Generally, an interactive application protocol must set the PUSH flag
+*                                at least in the last SEND call in each command or response sequence."
+*
+*               (7) Since pointer arithmetic is based on the specific pointer data type & inherent pointer
+*                   data type size, pointer arithmetic operands :
+*
+*                   (a) MUST be in terms of the specific pointer data type & data type size; ...
+*                   (b) SHOULD NOT & in some cases MUST NOT be cast to other data types or data type sizes.
+*
+*               (8) Network buffers allocated for TCP connection transmit SHOULD be fully used even if
+*                   the TCP connection's configured transmit window is zero.
+*
+*                   See also 'NetTCP_TxConnWinSizeHandlerCfgd()  Note #2'.
+*
+*               (9) Network buffers' reference counters MUST be incremented to include the queued TCP
+*                   segments as new  references to the network buffers.  However, these additional references
+*                   are handled when the TCP segments are enqueued to the TCP connection's re-transmit queue
+*                   (see 'NetTCP_TxConnTxQ()  Note #10').
+*
+*              (10) (a) Since segments enqueued to a TCP connection's transmit queue have already been
+*                       reported as transmitted to the application & since no mechanism exists for a TCP
+*                       connection to re-request previously transmitted data, any TCP connection whose
+*                       transmit queue becomes corrupted MUST be closed to force the application layer to
+*                       abort &/or recover from the corrupted data.
+*
+*                   (b) For any internal errors where the TCP connection's transmit queue is NOT corrupted,
+*                       the TCP connection is NOT closed.  Thus the application layer may try to re-transmit
+*                       the application data.
+*
+*                   (c) On ANY transmit error, any remaining application data transmit is immediately aborted.
+*
+*                   See also 'NetTCP_TxConnTxQ()    Note #14'.
+*                          & 'NetTCP_TxConnReTxQ()  Note #11'.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetTCP_TxConnAppData (NET_TCP_CONN_ID   conn_id_tcp,
+                                  void             *p_data,
+                                  CPU_INT16U        data_len,
+                                  NET_TCP_FLAGS     flags,
+                                  NET_ERR          *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR        src_addrv4             = NET_IPv4_ADDR_NONE;
+    NET_IPv4_ADDR        dest_addrv4            = NET_IPv4_ADDR_NONE;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_ADDR        src_addrv6             = NET_IPv6_ADDR_NONE;
+    NET_IPv6_ADDR        dest_addrv6            = NET_IPv6_ADDR_NONE;
+#endif
+    NET_TCP_CONN        *p_conn                 = DEF_NULL;
+    NET_TCP_PORT_NBR     src_port               = NET_PORT_NBR_NONE;
+    NET_TCP_PORT_NBR     dest_port              = NET_PORT_NBR_NONE;
+    NET_TCP_TX_Q_STATE   wait_state             = NET_TCP_TX_Q_STATE_NONE;
+    NET_CONN_ID          conn_id                = NET_CONN_ID_NONE;
+    NET_CONN            *p_net_conn             = DEF_NULL;
+    NET_IF_NBR           if_nbr                 = NET_IF_NBR_NONE;
+    NET_BUF             *p_buf                  = DEF_NULL;
+    NET_BUF             *p_buf_head             = DEF_NULL;
+    NET_BUF             *p_buf_tail             = DEF_NULL;
+    NET_BUF             *p_buf_q_tail           = DEF_NULL;
+    NET_BUF_HDR         *p_buf_hdr              = DEF_NULL;
+    NET_BUF_HDR         *p_buf_hdr_head         = DEF_NULL;
+    NET_BUF_HDR         *p_buf_hdr_tail         = DEF_NULL;
+    NET_BUF_HDR         *p_buf_hdr_q_tail       = DEF_NULL;
+    NET_BUF_SIZE         buf_size_max           = 0u;
+    NET_BUF_SIZE         buf_size_max_data      = 0u;
+    NET_BUF_SIZE         buf_size_max_tail      = 0u;
+    NET_BUF_SIZE         buf_size_max_tail_data = 0u;
+    NET_BUF_SIZE         data_ix_pkt            = 0u;
+    NET_BUF_SIZE         data_ix_pkt_offset     = 0u;
+    NET_BUF_SIZE         data_ix_pkt_tail       = 0u;
+    NET_BUF_SIZE         data_len_pkt_tail      = 0u;
+    NET_BUF_SIZE         data_len_pkt           = 0u;
+    NET_BUF_SIZE         data_len_pkt_rem       = 0u;
+    NET_BUF_SIZE         data_len_rem_min       = 0u;
+    NET_BUF_SIZE         data_len_mss           = 0u;
+    CPU_INT16U           data_len_rem           = 0u;
+    CPU_INT16U           data_len_tot           = 0u;
+    CPU_INT08U          *p_data_pkt             = DEF_NULL;
+    NET_TCP_FLAGS        flags_tcp              = NET_TCP_FLAG_NONE;
+    CPU_BOOLEAN          tx_q_append            = DEF_NO;
+    CPU_BOOLEAN          tx_data                = DEF_NO;
+    CPU_BOOLEAN          tx_err                 = DEF_NO;
+    CPU_BOOLEAN          block                  = DEF_NO;
+    NET_TCP_SEQ_NBR      seq_nbr                = 0u;
+    NET_PROTOCOL_TYPE    proto_type             = NET_PROTOCOL_TYPE_NONE;
+    NET_ERR              err                    = NET_ERR_NONE;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE APP DATA ----------------- */
+    if (p_data == DEF_NULL) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+    if (data_len < 1) {                                         /* Validate data len (see Note #4).                     */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxInvalidSizeCtr);
+       *p_err =  NET_TCP_ERR_INVALID_DATA_SIZE;
+        return (0u);
+    }
+
+                                                                /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return (0u);
+    }
+#endif
+
+
+                                                                /* ---------------- VALIDATE TCP CONN ----------------- */
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    switch (p_conn->ConnState) {                                /* Validate conn state.                                 */
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+             return (0u);
+
+
+        case NET_TCP_CONN_STATE_CLOSED:                         /* See Note #2a.                                        */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_OP;
+             return (0u);
+
+
+        case NET_TCP_CONN_STATE_LISTEN:                         /* See Note #2b.                                        */
+                                                                /* NOT yet implemented (see Note #2bA).                 */
+            *p_err =  NET_TCP_ERR_INVALID_CONN_OP;
+             return (0u);
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:                       /* See Note #2c.                                        */
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+             tx_data = DEF_NO;
+             break;
+
+
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #2d.                                        */
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+             tx_data = DEF_YES;
+             break;
+
+
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:                     /* See Note #2e.                                        */
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_OP;
+             return (0u);
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose(p_conn, DEF_NULL, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+             return (0u);
+    }
+
+
+    switch (p_conn->TxQ_State) {                                /* Validate tx Q state.                                 */
+        case NET_TCP_TX_Q_STATE_CONN:
+        case NET_TCP_TX_Q_STATE_CLOSING:
+             block = DEF_NO;
+             break;
+
+
+        case NET_TCP_TX_Q_STATE_SUSPEND:                        /* See Note #5.                                         */
+        case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+        case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+             block = DEF_BIT_IS_SET(flags, NET_TCP_FLAG_TX_BLOCK);
+             if (block != DEF_NO) {
+                 wait_state = p_conn->TxQ_State;
+             } else {
+                *p_err =  NET_TCP_ERR_TX_Q_SUSPEND;
+                 return (0u);
+             }
+             break;
+
+
+        case NET_TCP_TX_Q_STATE_NONE:
+        case NET_TCP_TX_Q_STATE_CLOSED:
+        default:
+            *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+             return (0u);
+    }
+
+
+    if (block != DEF_NO) {
+        while (p_conn->TxQ_State == wait_state) {
+            Net_GlobalLockRelease();
+            NetTCP_TxQ_Wait(conn_id_tcp, p_err);
+            Net_GlobalLockAcquire((void *)&NetTCP_TxConnAppData, &err);
+        }
+    }
+
+
+                                                                /* -------------- WAIT ON TCP CONN TX Q --------------- */
+    if (tx_data == DEF_YES) {                                   /* If tx rdy,                    ...                    */
+        if (data_len < 1) {                                     /* ... but  NO tx data avail,    ...                    */
+                                                                /* ... tx q'd data OR immed ack; ...                    */
+            NetTCP_TxConnTxQ(p_conn, 0, NET_TCP_CONN_TX_ACK_IMMED, DEF_NO, NET_TCP_CONN_CLOSE_ALL, DEF_YES,  p_err);
+            return (0u);
+        }
+                                                                /* ... Else if tx data avail,    ...                    */
+        if ((p_conn->TxWinSizeCfgdRem < 1) ||                   /* ... but tx Q full             ...                    */
+            (p_conn->MaxSegSizeConn   < 1)   ) {
+            block = DEF_BIT_IS_SET(flags, NET_TCP_FLAG_TX_BLOCK);
+            if (block != DEF_YES) {                             /* ... & non-blocking tx,        ...                    */
+               *p_err =  NET_TCP_ERR_TX_Q_FULL;                 /* ... rtn tx Q full err.                               */
+                return (0u);
+            }
+
+            Net_GlobalLockRelease();
+            NetTCP_TxQ_Wait(conn_id_tcp, p_err);
+            Net_GlobalLockAcquire((void *)&NetTCP_TxConnAppData, &err);
+            if (err != NET_ERR_NONE) {
+                *p_err  = err;                                  /* Rtn err from Net_GlobalLockAcquire().                */
+                 return (0u);
+            }
+
+            if (*p_err != NET_TCP_ERR_NONE) {
+                 return (0u);                                   /* Rtn err from NetTCP_TxQ_Wait().                      */
+            }
+
+            if (p_conn->TxWinSizeCfgdRem < 1) {                 /* If tx Q still full, ...                              */
+               *p_err =  NET_TCP_ERR_TX_Q_FULL;                 /* ... rtn tx Q full err.                               */
+                return (0u);
+            }
+        } else {
+            NetTCP_TxQ_Clr(conn_id_tcp, &err);                  /* Clr any possible async tx Q signal.                  */
+        }
+    }
+
+
+                                                                /* ------- PREPARE APP TX DATA INTO TCP SEG(S) -------- */
+                                                                /* Prepare seg addrs.                                   */
+    conn_id    =  p_conn->ID_Conn;
+    p_net_conn = &NetConn_Tbl[conn_id];
+
+    if (p_net_conn->Family == NET_SOCK_FAMILY_IP_V4) {
+#ifdef  NET_IPv4_MODULE_EN
+        NetTCP_TxConnPrepareSegAddrs(p_conn,
+                      (CPU_INT08U *)&src_addrv4,
+                      (CPU_INT08U *)&src_port,
+                                     sizeof(src_addrv4),
+                                     sizeof(src_port),
+                      (CPU_INT08U *)&dest_addrv4,
+                      (CPU_INT08U *)&dest_port,
+                                     sizeof(dest_addrv4),
+                                     sizeof(dest_port),
+                                    &err);
+#endif
+    } else if (p_net_conn->Family == NET_SOCK_FAMILY_IP_V6) {
+#ifdef  NET_IPv6_MODULE_EN
+        NetTCP_TxConnPrepareSegAddrs(p_conn,
+                      (CPU_INT08U *)&src_addrv6,
+                      (CPU_INT08U *)&src_port,
+                                     sizeof(src_addrv6),
+                                     sizeof(src_port),
+                      (CPU_INT08U *)&dest_addrv6,
+                      (CPU_INT08U *)&dest_port,
+                                     sizeof(dest_addrv6),
+                                     sizeof(dest_port),
+                                    &err);
+#endif
+    }
+
+    if (err != NET_TCP_ERR_NONE) {
+       *p_err = NET_TCP_ERR_CONN_FAULT;
+        return (0u);
+    }
+
+
+    conn_id = p_conn->ID_Conn;
+    if_nbr  = NetConn_IF_NbrGet(conn_id, &err);
+    if (err != NET_CONN_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, DEF_NULL, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+       *p_err = NET_TCP_ERR_CONN_FAULT;
+        return (0u);
+    }
+
+    p_buf_head   =  DEF_NULL;
+    p_buf_tail   =  DEF_NULL;
+    p_data_pkt   = (CPU_INT08U *)p_data;
+    tx_q_append  =  DEF_YES;
+
+    data_len_mss =  p_conn->MaxSegSizeConn;
+    data_len_rem =  data_len;
+    data_len_tot =  0u;
+                                                                /* Prepare TCP tx seg hdr ctrls.                        */
+    seq_nbr      =  p_conn->TxSeqNbrNextQ;
+    flags_tcp    =  NET_TCP_FLAG_NONE  |
+                    NET_TCP_FLAG_TX_ACK;
+
+    if (data_len_mss <= 0) {
+       *p_err = NET_TCP_ERR_NONE;
+        return (0u);
+    }
+
+    if (p_conn->TxQ_Tail != DEF_NULL) {                         /* If tx Q NOT empty;                            ...    */
+        p_buf                  =  p_conn->TxQ_Tail;
+        p_buf_hdr              = &p_buf->Hdr;
+
+        data_ix_pkt_tail       =  p_buf_hdr->DataIx;
+        data_len_pkt_tail      =  p_buf_hdr->TCP_SegLenData;
+                                                                /* ... calc tail seg's max data size,            ...    */
+        buf_size_max_tail      =  NetBuf_GetMaxSize(if_nbr, NET_TRANSACTION_TX, p_buf, data_ix_pkt_tail);
+
+        buf_size_max_tail_data =  DEF_MIN(buf_size_max_tail, data_len_mss);
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (data_len_pkt_tail > buf_size_max_tail_data) {       /* If seg len > max data size, tx Q data seg invalid,   */
+                                                                /* ... close TCP conn (see Note #10a).                  */
+            NetTCP_ConnClose(p_conn, DEF_NULL, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+           *p_err =  NET_TCP_ERR_CONN_DATA_INVALID;
+            return (0u);
+        }
+#endif
+
+        if (data_len_pkt_tail < buf_size_max_tail_data) {       /* ... & if avail data space on tx Q's tail seg, ...    */
+                                                                /* ... append data on tx Q tail seg (see Note #6b1).    */
+            data_ix_pkt      = data_ix_pkt_tail       + data_len_pkt_tail;
+            data_len_pkt_rem = buf_size_max_tail_data - data_len_pkt_tail;
+                                                                /* Lim pkt data len to min of rem'ing data len, ...     */
+                                                                /* ... pkt data len or cfg'd tx win size.               */
+            data_len_rem_min = DEF_MIN(data_len_pkt_rem, data_len_rem);
+            data_len_pkt     = DEF_MIN(data_len_rem_min, p_conn->TxWinSizeCfgdRem);
+
+                                                                /* Wr app data into TCP tx buf.                         */
+            NetBuf_DataWr(p_buf, data_ix_pkt, data_len_pkt, p_data_pkt, &err);
+            if ( err != NET_BUF_ERR_NONE) {                     /* If wr err, tx Q data corrupted; ...                  */
+                                                                /* ... close TCP conn (see Note #10a).                  */
+                NetTCP_ConnClose(p_conn, DEF_NULL, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+               *p_err  = NET_TCP_ERR_CONN_FAULT;
+                return (0u);
+            }
+
+                                                                /* Update TCP seg tx buf ctrls.                         */
+            p_buf_hdr->DataLen        += data_len_pkt;
+            p_buf_hdr->TotLen         += data_len_pkt;
+
+            p_buf_hdr->TCP_SegLenInit += data_len_pkt;
+            p_buf_hdr->TCP_SegLen     += data_len_pkt;
+            p_buf_hdr->TCP_SegLenData += data_len_pkt;
+
+
+            p_buf_head    = p_buf;                              /* Set tx Q tail as first seg in tx app data chain.     */
+            p_buf_tail    = p_buf;
+            tx_q_append   = DEF_NO;
+
+                                                                /* Update data ptr & lens.                              */
+            p_data_pkt   += data_len_pkt;                       /* MUST NOT cast ptr operand (see Note #7b).            */
+            data_len_tot += data_len_pkt;
+            data_len_rem -= data_len_pkt;
+
+            seq_nbr      += data_len_pkt;
+                                                                /* Dec TCP conn's tx win size (see Note #8).            */
+            NetTCP_TxConnWinSizeHandlerCfgd(p_conn, data_len_pkt, NET_TCP_CONN_TX_WIN_DEC, &err);
+            if ( err != NET_TCP_ERR_NONE) {
+               *p_err  = NET_TCP_ERR_CONN_FAULT;
+                return (0u);
+            }
+        }
+    }
+
+
+                                                                /* Calc max data size.                                  */
+#if 0
+    data_ix_pkt       = NET_BUF_DATA_IX_TX;
+#else
+    switch (p_net_conn->Family) {
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+             proto_type = NET_PROTOCOL_TYPE_TCP_V4;
+             break;
+
+
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+             proto_type = NET_PROTOCOL_TYPE_TCP_V6;
+             break;
+
+    }
+
+    data_ix_pkt = 0u;
+
+    NetTCP_GetTxDataIx(if_nbr,
+                       proto_type,
+                       0u,
+                       data_len,
+                       p_conn,
+                      &data_ix_pkt,
+                       p_err);
+#endif
+    buf_size_max      = NetBuf_GetMaxSize(if_nbr, NET_TRANSACTION_TX, DEF_NULL, data_ix_pkt);
+    buf_size_max_data = DEF_MIN(buf_size_max, data_len_mss);
+
+
+    tx_err = DEF_NO;
+    while ((data_len_rem             > 0) &&                    /* Prepare TCP seg(s) for ALL app data ...              */
+           (p_conn->TxWinSizeCfgdRem > 0) &&                    /* ... as net rsrc(s)/err(s) permit.                    */
+           (tx_err == DEF_NO)) {
+                                                                /* Reinit data_ix_pkt.                                  */
+        data_ix_pkt = 0u;
+        NetTCP_GetTxDataIx( if_nbr,
+                            proto_type,
+                            0u,
+                            data_len,
+                            p_conn,
+                           &data_ix_pkt,
+                            p_err);
+                                                                /* Lim pkt data len to min of max buf data size or ...  */
+                                                                /* ... rem'ing data len or cfg'd tx win size.           */
+        data_len_rem_min = DEF_MIN(buf_size_max_data, data_len_rem);
+        data_len_pkt     = DEF_MIN(data_len_rem_min,  p_conn->TxWinSizeCfgdRem);
+                                                                /* Get app data tx buf.                                 */
+        p_buf = NetBuf_Get(if_nbr,
+                           NET_TRANSACTION_TX,
+                           data_len_pkt,
+                           data_ix_pkt,
+                          &data_ix_pkt_offset,
+                           NET_BUF_FLAG_NONE,
+                          &err);
+        if (err == NET_BUF_ERR_NONE) {
+            data_ix_pkt += data_ix_pkt_offset;
+        } else {
+            tx_err       = DEF_YES;
+        }
+
+
+        if (tx_err == DEF_NO) {                                 /* Wr app data into TCP tx buf.                         */
+            NetBuf_DataWr(p_buf, data_ix_pkt, data_len_pkt, p_data_pkt, &err);
+            if (err != NET_BUF_ERR_NONE) {
+                NetTCP_TxPktDiscard(p_buf, &err);
+                tx_err = DEF_YES;
+            }
+        }
+
+
+        if (tx_err == DEF_NO) {
+                                                                /* Init TCP seg(s) tx buf ctrls.                        */
+            p_buf_hdr                  = &p_buf->Hdr;
+            p_buf_hdr->DataIx          =  data_ix_pkt;
+            p_buf_hdr->DataLen         =  data_len_pkt;
+            p_buf_hdr->TotLen          =  p_buf_hdr->DataLen;
+            p_buf_hdr->ProtocolHdrType =  NET_PROTOCOL_TYPE_APP;
+
+            switch (p_net_conn->Family) {
+#ifdef  NET_IPv4_MODULE_EN
+                case NET_SOCK_FAMILY_IP_V4:
+                     p_buf_hdr->IP_AddrSrc  = src_addrv4;
+                     p_buf_hdr->IP_AddrDest = dest_addrv4;
+                     break;
+#endif
+
+                case NET_SOCK_FAMILY_IP_V6:
+#ifdef  NET_IPv6_MODULE_EN
+                     p_buf_hdr->IPv6_AddrSrc  = src_addrv6;
+                     p_buf_hdr->IPv6_AddrDest = dest_addrv6;
+                     break;
+#endif
+                default:
+                     break;
+            }
+
+            p_buf_hdr->TransportPortSrc  = src_port;
+            p_buf_hdr->TransportPortDest = dest_port;
+
+            p_buf_hdr->TCP_SegLenInit    = data_len_pkt;
+            p_buf_hdr->TCP_SegLen        = p_buf_hdr->TCP_SegLenInit;
+            p_buf_hdr->TCP_SegLenData    = p_buf_hdr->TCP_SegLenInit;
+            p_buf_hdr->TCP_SegSync       = DEF_NO;
+            p_buf_hdr->TCP_SegClose      = DEF_NO;
+            p_buf_hdr->TCP_SegAck        = DEF_YES;
+            p_buf_hdr->TCP_SegReset      = DEF_NO;
+
+            p_buf_hdr->TCP_SeqNbrInit    = seq_nbr;
+            p_buf_hdr->TCP_SeqNbr        = p_buf_hdr->TCP_SeqNbrInit;
+
+            p_buf_hdr->TCP_Flags         = flags_tcp;
+
+
+            if (p_buf_tail != DEF_NULL) {                       /* If tx app data chain NOT empty, ...                  */
+                                                                /* ... append seg(s) @ Q tail (see Note #3b1).          */
+                p_buf_hdr_tail                  = &p_buf_tail->Hdr;
+                p_buf_hdr_tail->NextPrimListPtr =  p_buf;
+                p_buf_hdr->PrevPrimListPtr      =  p_buf_tail;
+                p_buf_tail                      =  p_buf;
+
+            } else {                                            /* Else add seg as first seg in tx app data chain.      */
+                p_buf_head                      =  p_buf;
+                p_buf_tail                      =  p_buf;
+            }
+
+                                                                /* Update data ptr & lens.                              */
+            p_data_pkt   += data_len_pkt;                       /* MUST NOT cast ptr operand (see Note #7b).            */
+            data_len_tot += data_len_pkt;
+            data_len_rem -= data_len_pkt;
+
+            seq_nbr      += data_len_pkt;
+
+                                                                /* Dec TCP conn's tx win size (see Note #8).            */
+            NetTCP_TxConnWinSizeHandlerCfgd(p_conn, data_len_pkt,  NET_TCP_CONN_TX_WIN_DEC, &err);
+            if (err != NET_TCP_ERR_NONE) {
+               *p_err = NET_TCP_ERR_CONN_FAULT;
+                return (0u);
+            }
+        }
+    }
+
+
+    if (p_buf_head == DEF_NULL) {                               /* If NO data seg'd, rtn no rsrc(s) err ...             */
+       *p_err = NET_TCP_ERR_NONE_AVAIL;                         /* ... (see Notes #2b1F2b, #2c2, & #2d2).               */
+        return (0u);
+    }
+
+    DEF_BIT_SET(p_buf_hdr->TCP_Flags, NET_TCP_FLAG_TX_PUSH);    /* Set PUSH flag in last q'd tx seg (see Note #6b3B1b). */
+
+
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+    if (p_conn->TxQ_Tail != DEF_NULL) {                         /* If tx Q NOT empty                            ...     */
+        if (tx_q_append == DEF_YES) {                           /* ... & tx app data chain NOT already on tx Q, ...     */
+                                                                /* ... append seg(s) @ Q tail (see Note #3b1).          */
+            p_buf_q_tail                      =  p_conn->TxQ_Tail;
+            p_buf_hdr_q_tail                  = &p_buf_q_tail->Hdr;
+            p_buf_hdr_q_tail->NextPrimListPtr =  p_buf_head;
+
+            p_buf_hdr_head                    = &p_buf_head->Hdr;
+            p_buf_hdr_head->PrevPrimListPtr   =  p_buf_q_tail;
+        }
+
+        p_conn->TxQ_Tail = p_buf_tail;
+
+    } else {                                                    /* Else add seg(s) to empty tx Q.                       */
+        p_conn->TxQ_Head = p_buf_head;
+        p_conn->TxQ_Tail = p_buf_tail;
+    }
+
+                                                                /* Update TCP conn tx seq nbr(s).                       */
+    p_conn->TxSeqNbrNextQ = seq_nbr;
+
+
+
+                                                                /* ---------------- TX TCP DATA SEG(S) ---------------- */
+    if (tx_data == DEF_YES) {
+        NetTCP_TxConnTxQ(p_conn, 0, NET_TCP_CONN_TX_ACK_NONE, DEF_NO, NET_TCP_CONN_CLOSE_ALL, DEF_YES, p_err);
+        switch (*p_err) {
+            case NET_TCP_ERR_NONE:
+            case NET_TCP_ERR_CONN_ACK_NONE:
+            case NET_TCP_ERR_CONN_ACK_DLYD:
+            case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+            case NET_ERR_TX:                                    /* Ignore transitory tx err(s).                         */
+            case NET_ERR_IF_LINK_DOWN:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_CONN_CLOSE:
+            case NET_TCP_ERR_CONN_FAULT:
+            case NET_TCP_ERR_CONN_FAIL:
+            case NET_TCP_ERR_CONN_ACK_INVALID:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_TCP_ERR_INVALID_LEN_SEG:
+            case NET_TCP_ERR_NONE_AVAIL:
+            case NET_TCP_ERR_TX_PKT:
+            case NET_ERR_IF_LOOPBACK_DIS:
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_ADDR:
+            case NET_CONN_ERR_INVALID_ADDR_LEN:
+            default:
+                 return (0u);
+        }
+    }
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (data_len_tot);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_ConnIsAvailRx()
+*
+* Description : (1) Check TCP connection for available receive operation(s) :
+*
+*                   (a) Application receive data
+*                   (b) Receive connection closed
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to check for available receive operation(s).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection successfully checked for
+*                                                                       available receive operation(s); check
+*                                                                       return value for receive availability.
+*
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                                                                   --- RETURNED BY NetTCP_ConnIsUsed() : ----
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN            Invalid TCP connection number.
+*
+* Return(s)   : DEF_YES, if TCP connection has any available receive operation(s).
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_IsAvailRxStream().
+*
+* Note(s)     : (2) RFC #793, Section 3.9 'Event Processing : RECEIVE Call' specifies how to handle receive
+*                   data requests from the application layer :
+*
+*                   (a) For the "CLOSED STATE ... return 'error: connection does not exist'".
+*
+*                   (b) (1) For the "LISTEN STATE, SYN-SENT STATE, SYN-RECEIVED STATE ... queue for processing
+*                           after entering ESTABLISHED state".
+*
+*                       (2) The application layer may request to receive application data before the TCP
+*                           connection enters the connected state.  Such requests will block or return
+*                           no data.
+*
+*                   (c) For the "ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2 STATE" :
+*
+*                       (1) "If insufficient incoming segments are queued to satisfy the request, queue
+*                            the request."
+*
+*                       (2) "Reassemble queued incoming segments into receive buffer and return to user."
+*
+*                   (d) For the "CLOSE-WAIT STATE ... since the remote side has already sent FIN, RECEIVEs
+*                       must be satisfied by the text already on hand, but not yet delivered to the user.
+*                       If no text is awaiting delivery, the RECEIVE will get a 'error: connection closing'
+*                       response.  Otherwise, any remaining text can be used to satisfy the RECEIVE".
+*
+*                   (e) (1) For the "CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE ... return 'error:
+*                           connection closing'".
+*
+*                       (2) Typically, these states will have already received ALL remaining closing
+*                           data from the closing remote host.
+*
+*                           (A) However, in case all receive data from the remote host has NOT yet been
+*                               received, application layer receives from these states are permitted until
+*                               the TCP connection's sequence receive state is closed & the TCP connection's
+*                               application receive queue is empty.
+*
+*                   See also 'NetTCP_RxAppData()  Note #2'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnIsAvailRx (NET_TCP_CONN_ID   conn_id_tcp,
+                                   NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    CPU_BOOLEAN    rx_avail;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return (DEF_NO);
+    }
+#endif
+
+                                                                /* -------------- CHK TCP CONN RX AVAIL --------------- */
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+            *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+             return (DEF_NO);
+
+
+        case NET_TCP_CONN_STATE_CLOSED:                         /* See Note #2a.                                        */
+            *p_err =  NET_TCP_ERR_INVALID_CONN_OP;
+             return (DEF_NO);
+
+
+        case NET_TCP_CONN_STATE_LISTEN:                         /* See Note #2b.                                        */
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+             rx_avail = DEF_NO;                                 /* See Note #2b2.                                       */
+             break;
+
+
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #2c.                                        */
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+                                                                /* Chk TCP conn rx data avail (see Note #2c).           */
+             rx_avail =  (p_conn->RxQ_App_Head != DEF_NULL) ? DEF_YES : DEF_NO;
+             break;
+
+
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:                     /* See Note #2d.                                        */
+        case NET_TCP_CONN_STATE_CLOSING:                        /* See Note #2e.                                        */
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+                                                                /* Chk TCP conn rx data avail (see Note #2d) OR ...     */
+             rx_avail = ((p_conn->RxQ_App_Head != DEF_NULL) ||
+                                                                /* ... TCP conn rx q closed   (see Note #2e2A).         */
+                        ((p_conn->RxQ_App_Head == DEF_NULL) &&
+                         (p_conn->RxQ_State    ==  NET_TCP_RX_Q_STATE_CLOSED))) ? DEF_YES : DEF_NO;
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+            *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+             return (DEF_NO);
+    }
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (rx_avail);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_ConnIsRdyTx()
+*
+* Description : Check if TCP connection ready to transmit.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to check if ready to transmit.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection successfully checked if
+*                                                                       ready for transmit; check return
+*                                                                       value for transmit ready availability.
+*
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                                                                   --- RETURNED BY NetTCP_ConnIsUsed() : ----
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN            Invalid TCP connection number.
+*
+* Return(s)   : DEF_YES, if TCP connection is ready to transmit.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetSock_IsRdyTxStream().
+*
+* Note(s)     : (1) RFC #793, Section 3.9 'Event Processing : SEND Call' specifies how to handle transmit
+*                   data requests from the application layer :
+*
+*                   (a) For the "CLOSED STATE ... return 'error: connection does not exist'".
+*
+*                   (b) For the "LISTEN STATE" :
+*
+*                           (A)TCP Listen state transmit NOT yet implemented. #### NET-815
+*
+*                       (1) "If the foreign socket is specified, then" :
+*
+*                           (F) "Data associated with SEND may be" ...
+*                               (1) "sent with SYN segment"        ...
+*                               (2) (a) "or queued for transmission after entering ESTABLISHED state."
+*
+*                   (c) For the "SYN-SENT STATE, SYN-RECEIVED STATE" :
+*
+*                       (1) "Queue the data for transmission after entering ESTABLISHED state."
+*
+*                   (d) For the "ESTABLISHED STATE, CLOSE-WAIT STATE" :
+*
+*                       (1) (A) "Segmentize the buffer" ...
+*                           (B) "and send it with a piggybacked acknowledgment."
+*
+*                   (e) For the "FIN-WAIT-1 STATE, FIN-WAIT-2 STATE, CLOSING STATE, LAST-ACK STATE,
+*                       TIME-WAIT STATE" :
+*
+*                       (1) "Return 'error: connection closing'" ...
+*                       (2) "and do not service request."
+*
+*                   See also 'NetTCP_TxConnAppData()  Note #2'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnIsRdyTx (NET_TCP_CONN_ID   conn_id_tcp,
+                                 NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    CPU_BOOLEAN    tx_rdy;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return (DEF_NO);
+    }
+#endif
+
+                                                                /* --------------- CHK TCP CONN TX RDY ---------------- */
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+            *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+             return (DEF_NO);
+
+
+        case NET_TCP_CONN_STATE_CLOSED:                         /* See Note #1a.                                        */
+        case NET_TCP_CONN_STATE_LISTEN:                         /* NOT yet implemented (see Note #1bA).                 */
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:                     /* See Note #1e.                                        */
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+            *p_err =  NET_TCP_ERR_INVALID_CONN_OP;
+             return (DEF_NO);
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:                       /* See Note #1c.                                        */
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+             tx_rdy = DEF_NO;
+             break;
+
+
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #1d.                                        */
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+                                                                /* Chk TCP conn tx data rdy status.                     */
+             tx_rdy = ((p_conn->TxWinSizeCfgdRem > 0) && (p_conn->MaxSegSizeConn > 0)) ? DEF_YES : DEF_NO;
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+            *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+             return (DEF_NO);
+    }
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (tx_rdy);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetTCP_ConnGet()
+*
+* Description : (1) Allocate & initialize a TCP connection :
+*
+*                   (a) Get      a TCP connection
+*                   (b) Validate   TCP connection
+*                   (c) Initialize TCP connection
+*                   (d) Update     TCP connection pool statistics
+*                   (e) Return TCP connection handle identifier
+*                         OR
+*                       Null identifier & error code, on failure
+*
+*               (2) The TCP connection pool is implemented as a stack :
+*
+*                   (a) 'NetTCP_ConnPoolPtr' points to the head of the TCP connection pool.
+*
+*                   (b) TCP connections' 'NextPtr's link each TCP connection to form the TCP connection pool stack.
+*
+*                   (c) TCP connections are inserted & removed at the head of        the TCP connection pool stack.
+*
+*
+*                                    TCP connections are
+*                                    inserted & removed
+*                                        at the head
+*                                      (see Note #2c)
+*
+*                                             |                 NextPtr
+*                                             |             (see Note #2b)
+*                                             v                    |
+*                                                                  |
+*                                          -------       -------   v   -------       -------
+*                     TCP Connection  ---->|     |------>|     |------>|     |------>|     |
+*                      Pool Pointer        |     |       |     |       |     |       |     |
+*                                          |     |       |     |       |     |       |     |
+*                     (see Note #2a)       -------       -------       -------       -------
+*
+*                                          |                                               |
+*                                          |<------- Pool of Free TCP Connections -------->|
+*                                          |                (see Note #2)                  |
+*
+*
+* Argument(s) : p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection successfully allocated &
+*                                                                       initialized.
+*                               NET_TCP_ERR_NONE_AVAIL              NO available TCP connections to allocate.
+*                               NET_TCP_ERR_INVALID_CONN_TYPE       TCP connection is NOT a valid type.
+*
+* Return(s)   : TCP connection handle identifier, if NO error(s).
+*
+*               NET_TCP_CONN_ID_NONE,             otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (3) (a) TCP connection pool is accessed by 'NetTCP_ConnPoolPtr' during execution of
+*
+*                       (1) NetTCP_Init()
+*                       (2) NetTCP_ConnGet()
+*                       (3) NetTCP_ConnFree()
+*
+*                   (b) Since the primary tasks of the network protocol suite are prevented from running
+*                       concurrently (see 'net.h  Note #3'), it is NOT necessary to protect the shared
+*                       resources of the connection pool since no asynchronous access from other network
+*                       tasks is possible.
+*********************************************************************************************************
+*/
+
+NET_TCP_CONN_ID  NetTCP_ConnGet (NET_TCP_APP_POST_FNCT  fnct_app_post_rx,
+                                 NET_TCP_APP_POST_FNCT  fnct_app_post_tx,
+                                 NET_ERR               *p_err)
+{
+    NET_TCP_CONN     *p_conn;
+    NET_TCP_CONN_ID   conn_id_tcp;
+    NET_ERR           err;
+
+                                                                /* ------------------- GET TCP CONN ------------------- */
+    if (NetTCP_ConnPoolPtr != DEF_NULL) {                       /* If TCP conn pool NOT empty, get TCP conn from pool.  */
+        p_conn               = (NET_TCP_CONN *)NetTCP_ConnPoolPtr;
+        NetTCP_ConnPoolPtr  = (NET_TCP_CONN *)p_conn->NextPtr;
+
+    } else {                                                    /* If none avail, rtn err.                              */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NoneAvailCtr);
+       *p_err =  NET_TCP_ERR_NONE_AVAIL;
+        return (NET_TCP_CONN_ID_NONE);
+    }
+
+                                                                /* ------------------ INIT TCP CONN ------------------- */
+    NetTCP_ConnClr(p_conn);
+    DEF_BIT_SET(p_conn->Flags, NET_TCP_FLAG_USED);              /* Set TCP conn as used.                                */
+    p_conn->ConnState   = NET_TCP_CONN_STATE_CLOSED;
+
+    p_conn->FnctAppPostRx = fnct_app_post_rx;
+    p_conn->FnctAppPostTx = fnct_app_post_tx;
+
+                                                                /* ------------ UPDATE TCP CONN POOL STATS ------------ */
+    NetStat_PoolEntryUsedInc(&NetTCP_ConnPoolStat, &err);
+
+                                                                /* ----------------- RTN TCP CONN ID ------------------ */
+    conn_id_tcp = p_conn->ID;
+   *p_err        = NET_TCP_ERR_NONE;
+
+    return (conn_id_tcp);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetTCP_ConnFree()
+*
+* Description : Free a TCP connection.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to free.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Listen(),
+*               NetSock_GetConnTransport().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) #### To prevent freeing a TCP connection already freed via previous TCP connection
+*                   free, NetTCP_ConnFree() checks if the TCP connection is used BEFORE freeing the
+*                   TCP connection.
+*
+*                   This prevention is only best-effort since any invalid duplicate TCP connection frees
+*                   MAY be asynchronous to potentially valid TCP connection gets.  Thus the invalid TCP
+*                   connection free(s) MAY corrupt the TCP connection's valid operation(s).
+*
+*                   However, since the primary tasks of the network protocol suite are prevented from
+*                   running concurrently (see 'net.h  Note #3'), it is NOT necessary to protect TCP
+*                   connection resources from possible corruption since no asynchronous access from
+*                   other network tasks is possible.
+*********************************************************************************************************
+*/
+
+void  NetTCP_ConnFree (NET_TCP_CONN_ID  conn_id_tcp)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_ERR        err;
+#endif
+    NET_TCP_CONN  *p_conn;
+
+                                                                /* ---------------- VALIDATE TCP CONN ----------------- */
+    if (conn_id_tcp == NET_TCP_CONN_ID_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, &err);
+    if (err != NET_TCP_ERR_NONE) {                              /* If TCP conn NOT used, ...                            */
+        return;                                                 /* ... rtn but do NOT free (see Note #1).               */
+    }
+#endif
+
+                                                                /* ------------------ FREE TCP CONN ------------------- */
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+    NetTCP_ConnFreeHandler(p_conn, NET_TCP_CONN_FREE_ALL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetTCP_ConnCloseFromConn()
+*
+* Description : Close a TCP connection via a network connection.
+*
+*               (1) When a network connection closes a TCP connection, the TCP connection :
+*
+*                   (a) (1) Closes NO other network connection(s),
+*                       (2) MUST NOT recursively re-close other network connection(s);
+*
+*                   (b) SHOULD clear network connection(s)' handle identifiers.
+*
+*                   See also 'net_sock.c  NetSock_CloseFromConn()       Note #1',
+*                          & 'net_conn.c  NetConn_CloseFromTransport()  Note #1b'.
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to close.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetConn_CloseTransport().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) #### To prevent closing a TCP connection already closed via previous TCP connection
+*                   close, NetTCP_ConnCloseFromConn() checks if the TCP connection is used BEFORE closing
+*                   the TCP connection.
+*
+*                   This prevention is only best-effort since any invalid duplicate TCP connection closes
+*                   MAY be asynchronous to potentially valid TCP connection gets.  Thus the invalid TCP
+*                   connection closes(s) MAY corrupt the TCP connection's valid operation(s).
+*
+*                   However, since the primary tasks of the network protocol suite are prevented from
+*                   running concurrently (see 'net.h  Note #3'), it is NOT necessary to protect TCP
+*                   connection resources from possible corruption since no asynchronous access from
+*                   other network tasks is possible.
+*********************************************************************************************************
+*/
+
+void  NetTCP_ConnCloseFromConn (NET_TCP_CONN_ID  conn_id_tcp)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_ERR        err;
+#endif
+    NET_TCP_CONN  *p_conn;
+
+                                                                /* ---------------- VALIDATE TCP CONN ----------------- */
+    if (conn_id_tcp == NET_TCP_CONN_ID_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, &err);
+    if (err != NET_TCP_ERR_NONE) {                              /* If TCP conn NOT used, ...                            */
+        return;                                                 /* ... rtn but do NOT close (see Note #2).              */
+    }
+#endif
+
+                                                                /* ------------------ CLOSE TCP CONN ------------------ */
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+    NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                     (NET_BUF_HDR      *)0,
+                     (CPU_BOOLEAN       )DEF_NO,                /* See Note #1.                                         */
+                     (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_ConnSetID_Conn()
+*
+* Description : Set a TCP connection's network connection handle identifier.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to set.
+*
+*               conn_id         Handle identifier of network connection.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection's network connection handle
+*                                                                   identifier successfully set.
+*                               NET_TCP_ERR_INVALID_CONN_ID     Invalid network connection handle identifier.
+*
+*                                                               ----- RETURNED BY NetTCP_ConnIsUsed() : -----
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               ------ RETURNED BY NetConn_IsUsed() : -------
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED           Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_GetConnTransport().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetTCP_ConnSetID_Conn (NET_TCP_CONN_ID   conn_id_tcp,
+                             NET_CONN_ID       conn_id,
+                             NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+
+                                                                /* --------------- VALIDATE NET CONN ID --------------- */
+    if (conn_id != NET_CONN_ID_NONE) {
+       (void)NetConn_IsUsed(conn_id, p_err);
+        if (*p_err != NET_CONN_ERR_NONE) {
+             return;
+        }
+    }
+#endif
+
+
+    p_conn          = &NetTCP_ConnTbl[conn_id_tcp];
+    p_conn->ID_Conn =  conn_id;                                 /* Set TCP conn's conn id.                              */
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetTCP_ConnSetStateListen()
+*
+* Description : Set TCP connection to LISTEN state.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to set LISTEN state.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection state successfully set to LISTEN.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_ID         Invalid network connection handle identifier.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                                                                   ------ RETURNED BY NetTCP_ConnIsUsed() : -------
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN            Invalid TCP connection number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetSock_Listen().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetTCP_ConnSetStateListen (NET_TCP_CONN_ID                      conn_id_tcp,
+                                 NET_TCP_APP_LISTEN_Q_IS_AVAIL_FNCT   tcp_app_listen_is_avail_fnct,
+                                 NET_ERR                             *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN    used;
+    NET_CONN_ID    conn_id;
+    NET_CONN_ID    conn_id_transport;
+    NET_ERR        err;
+#endif
+    NET_TCP_CONN  *p_conn;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* VALIDATE CONN IDs                                    */
+    conn_id = p_conn->ID_Conn;
+    used    = NetConn_IsUsed(conn_id, &err);
+    if (used != DEF_YES) {
+       *p_err  = NET_TCP_ERR_INVALID_CONN_ID;
+        return;
+    }
+
+    conn_id_transport =  NetConn_ID_TransportGet(conn_id, &err);
+    if (conn_id_tcp  != (NET_TCP_CONN_ID)conn_id_transport) {
+       *p_err = NET_TCP_ERR_INVALID_CONN_ID;
+        return;
+    }
+#endif
+
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+             p_conn->FnctAppListenQ_IsAvail = tcp_app_listen_is_avail_fnct;
+             p_conn->ConnState              = NET_TCP_CONN_STATE_LISTEN;
+             break;
+
+
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_ConnAppAcceptRdySignal()
+*
+* Description : Signal the TCP connection that the connection has been accepted by the application layer.
+*               The Receive window can be configured to let the remote host send data on this connection.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection.
+*
+*               p_err           Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_TCP_ERR_NONE                No error*
+*                                   NET_TCP_ERR_INVALID_CONN_ID     Invalid connection id.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : NetSock_Accept().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifndef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+void  NetTCP_ConnAppAcceptRdySignal (NET_CONN_ID       conn_id_parent,
+                                     NET_TCP_CONN_ID   conn_id_tcp,
+                                     NET_ERR          *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN    used;
+    NET_CONN_ID    conn_id;
+    NET_CONN_ID    conn_id_transport;
+    NET_ERR        err;
+#endif
+    NET_CONN      *p_conn_parent;
+    NET_TCP_CONN  *p_conn_tcp_parent;
+    NET_TCP_CONN  *p_conn_tcp;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+#endif
+
+    p_conn_tcp = &NetTCP_ConnTbl[conn_id_tcp];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* VALIDATE CONN IDs                                    */
+    conn_id = p_conn_tcp->ID_Conn;
+    used    = NetConn_IsUsed(conn_id, &err);
+    if (used != DEF_YES) {
+       *p_err  = NET_TCP_ERR_INVALID_CONN_ID;
+        return;
+    }
+
+    conn_id_transport =  NetConn_ID_TransportGet(conn_id, &err);
+    if (conn_id_tcp  != (NET_TCP_CONN_ID)conn_id_transport) {
+       *p_err = NET_TCP_ERR_INVALID_CONN_ID;
+        return;
+    }
+#endif
+
+    p_conn_parent = &NetConn_Tbl[conn_id_parent];
+
+    if (p_conn_parent->ID_Transport == NET_TCP_CONN_ID_NONE) {
+
+        NetTCP_RxConnWinSizeHandler(p_conn_tcp, DEF_NULL, NET_TCP_DFLT_RX_WIN_SIZE_OCTET, NET_TCP_CONN_RX_WIN_INIT);
+
+    } else {
+
+        p_conn_tcp_parent = &NetTCP_ConnTbl[p_conn_parent->ID_Transport];
+
+        if (p_conn_tcp_parent->RxWinSizeCfgd != 0) {
+            NetTCP_RxConnWinSizeHandler(p_conn_tcp, DEF_NULL, p_conn_tcp_parent->RxWinSizeCfgd, NET_TCP_CONN_RX_WIN_INIT);
+        } else {
+            NetTCP_RxConnWinSizeHandler(p_conn_tcp, DEF_NULL, NET_TCP_DFLT_RX_WIN_SIZE_OCTET, NET_TCP_CONN_RX_WIN_INIT);
+        }
+    }
+
+   *p_err = NET_TCP_ERR_NONE;
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetTCP_ConnCfgIdleTimeout()
+*
+* Description : (1) Configure TCP connection's   idle timeout :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection idle timeout
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure connection idle timeout.
+*
+*               timeout_sec     Desired value for TCP connection idle timeout (in seconds).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgIdleTimeoutHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection idle timeout successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid idle timeout.
+*
+*                                                               -------- RETURNED BY NetTCP_ConnIsUsed() : ---------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               ------- RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection idle timeout successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgIdleTimeout() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgIdleTimeoutHandler()  Note #2'.
+*
+*               (3) Configured timeout does NOT reschedule any current idle timeout in progress but
+*                   becomes effective the next time a TCP connection sets its idle timeout.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgIdleTimeout (NET_TCP_CONN_ID       conn_id_tcp,
+                                        NET_TCP_TIMEOUT_SEC   timeout_sec,
+                                        NET_ERR              *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgIdleTimeout, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* ----------- CFG TCP CONN TX IDLE TIMEOUT ----------- */
+   cfg_valid = NetTCP_ConnCfgIdleTimeoutHandler(conn_id_tcp, timeout_sec, p_err);
+   goto exit_release;
+
+
+exit_lock_fault:
+    cfg_valid = DEF_FAIL;
+    goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_ConnCfgIdleTimeoutHandler()
+*
+* Description : (1) Configure TCP connection's   idle timeout :
+*
+*                   (a) Validate  TCP connection idle timeout configuration
+*                   (b) Configure TCP connection idle timeout
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure connection idle timeout.
+*               -----------     Argument checked in NetTCP_ConnCfgIdleTimeout().
+*
+*               timeout_sec     Desired value for TCP connection idle timeout (in seconds).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection idle timeout
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid idle timeout.
+*
+* Return(s)   : DEF_OK,   TCP connection idle timeout successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgIdleTimeout().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgIdleTimeoutHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgIdleTimeout()  Note #2'.
+*
+*               (3) Configured timeout does NOT reschedule any current idle timeout in progress but
+*                   becomes effective the next time a TCP connection sets its idle timeout.
+*
+*               (4) Configured timeout converted to 'NET_TMR_TICK' ticks to avoid run-time conversion.
+*
+*               (5) TCP connections' 'TimeoutConn' variables MUST ALWAYS be accessed with the global
+*                   network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgIdleTimeoutHandler (NET_TCP_CONN_ID       conn_id_tcp,
+                                               NET_TCP_TIMEOUT_SEC   timeout_sec,
+                                               NET_ERR              *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+
+                                                                /* ---------- VALIDATE TCP CONN IDLE TIMEOUT ---------- */
+#if (NET_TCP_CONN_TIMEOUT_IDLE_MIN_SEC > 0)
+    if (timeout_sec < NET_TCP_CONN_TIMEOUT_IDLE_MIN_SEC) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+#if ((NET_TCP_CONN_TIMEOUT_IDLE_MAX_SEC < DEF_INT_08U_MAX_VAL)                                                               || \
+    ((NET_TCP_CONN_TIMEOUT_IDLE_MAX_SEC < DEF_INT_16U_MAX_VAL) && (NET_TCP_CONN_TIMEOUT_IDLE_MAX_SEC > DEF_INT_08U_MAX_VAL)) || \
+    ((NET_TCP_CONN_TIMEOUT_IDLE_MAX_SEC < DEF_INT_32U_MAX_VAL) && (NET_TCP_CONN_TIMEOUT_IDLE_MAX_SEC > DEF_INT_16U_MAX_VAL)))
+    if (timeout_sec > NET_TCP_CONN_TIMEOUT_IDLE_MAX_SEC) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ----------- CFG TCP CONN TX IDLE TIMEOUT ----------- */
+    p_conn                   = &NetTCP_ConnTbl[conn_id_tcp];
+    p_conn->TimeoutConn_sec  =  timeout_sec;
+    p_conn->TimeoutConn_tick =  timeout_sec * NET_TMR_TIME_TICK_PER_SEC;
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetTCP_ConnCfgMaxSegSizeLocal()
+*
+* Description : (1) Configure TCP connection's   local maximum segment size :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection local maximum segment size                 See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure local maximum segment size.
+*
+*               max_seg_size    Desired maximum segment size.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgMaxSegSizeLocalHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection local maximum segment size
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE  Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP     Invalid TCP connection operation.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid local maximum segment size.
+*
+*                                                               ---------- RETURNED BY NetTCP_ConnIsUsed() : -----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -------- RETURNED BY Net_GlobalLockAcquire() : ---------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection local maximum segment size successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgMaxSegSizeLocal() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgMaxSegSizeLocalHandler()  Note #2'.
+*
+*               (3) RFC #793, Section 3.1 'Header Format : Options : Maximum Segment Size' states that
+*                   a TCP connection advertises its "maximum receive segment size ... only ... in the
+*                   initial connection request (i.e., in segments with the SYN control bit set)".
+*
+*                   Thus any configuration of the local receive maximum segment size MUST be performed
+*                   by the application layer PRIOR to any TCP connection request/synchronization either
+*                   from a :
+*
+*                   (a) Actively- connected TCP connection
+*                   (b) Passively-connected TCP connection, which is cloned from its previously-
+*                           configured LISTEN-state TCP connection
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgMaxSegSizeLocal (NET_TCP_CONN_ID    conn_id_tcp,
+                                            NET_TCP_SEG_SIZE   max_seg_size,
+                                            NET_ERR           *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgMaxSegSizeLocal, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* --------- CFG TCP CONN LOCAL MAX SEG SIZE ---------- */
+   cfg_valid = NetTCP_ConnCfgMaxSegSizeLocalHandler(conn_id_tcp, max_seg_size, p_err);
+
+   goto exit_release;
+
+
+exit_lock_fault:
+    cfg_valid = DEF_FAIL;
+    goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+
+exit:
+    return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                               NetTCP_ConnCfgMaxSegSizeLocalHandler()
+*
+* Description : (1) Configure TCP connection's   local maximum segment size :
+*
+*                   (a) Validate  TCP connection local maximum segment size configuration
+*                   (b) Configure TCP connection local maximum segment size                 See Note #3
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure local maximum segment size.
+*               -----------     Argument checked by NetTCP_ConnCfgMaxSegSizeLocal().
+*
+*               max_seg_size    Desired maximum segment size.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection local maximum segment size
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE  Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP     Invalid TCP connection operation.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid local maximum segment size.
+*
+* Return(s)   : DEF_OK,   TCP connection local maximum segment size successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgMaxSegSizeLocal().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgMaxSegSizeLocalHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgMaxSegSizeLocal()  Note #2'.
+*
+*               (3) RFC #793, Section 3.1 'Header Format : Options : Maximum Segment Size' states that
+*                   a TCP connection advertises its "maximum receive segment size ... only ... in the
+*                   initial connection request (i.e., in segments with the SYN control bit set)".
+*
+*                   Thus any configuration of the local receive maximum segment size MUST be performed
+*                   by the application layer PRIOR to any TCP connection request/synchronization either
+*                   from a :
+*
+*                   (a) Actively- connected TCP connection
+*                   (b) Passively-connected TCP connection, which is cloned from its previously-
+*                           configured LISTEN-state TCP connection
+*
+*               (4) TCP connections' 'MaxSegSizeLocal' variables MUST ALWAYS be accessed with the global
+*                   network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgMaxSegSizeLocalHandler (NET_TCP_CONN_ID    conn_id_tcp,
+                                                   NET_TCP_SEG_SIZE   max_seg_size,
+                                                   NET_ERR           *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+
+                                                                /* -------------- VALIDATE MAX SEG SIZE --------------- */
+#if (NET_TCP_MAX_SEG_SIZE_MIN > 0)
+    if (max_seg_size < NET_TCP_MAX_SEG_SIZE_MIN) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+#if ((NET_TCP_MAX_SEG_SIZE_MAX < DEF_INT_08U_MAX_VAL)                                                      || \
+    ((NET_TCP_MAX_SEG_SIZE_MAX < DEF_INT_16U_MAX_VAL) && (NET_TCP_MAX_SEG_SIZE_MAX > DEF_INT_08U_MAX_VAL)) || \
+    ((NET_TCP_MAX_SEG_SIZE_MAX < DEF_INT_32U_MAX_VAL) && (NET_TCP_MAX_SEG_SIZE_MAX > DEF_INT_16U_MAX_VAL)))
+    if (max_seg_size > NET_TCP_MAX_SEG_SIZE_MAX) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------- VALIDATE TCP CONN STATE -------------- */
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+             return (DEF_FAIL);
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+             break;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_OP;
+             return (DEF_FAIL);
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_CONN_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+             return (DEF_FAIL);
+    }
+
+
+                                                                /* --------- CFG TCP CONN LOCAL MAX SEG SIZE ---------- */
+    p_conn->MaxSegSizeLocalCfgd = max_seg_size;
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_ConnCfgRxWinSize()
+*
+* Description : (1) Configure TCP connection's   receive window size :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection receive window size                        See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure receive window size.
+*
+*               win_size        Desired receive window size.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgRxWinSizeHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection receive window size successfully
+*                                                                   configured.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE  Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP     Invalid TCP connection operation.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid receive window size.
+*
+*                                                               ------- RETURNED BY NetTCP_ConnIsUsed() : --------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               ----- RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection receive window size successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgRxWinSize() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgRxWinSizeHandler()  Note #2'.
+*
+*               (3) A TCP connection's receive window size SHOULD NOT be updated after the TCP
+*                   connection is connected (see 'NetTCP_RxConnWinSizeHandler()  Notes #2b & #5').
+*                   Thus any configuration of the local receive window size MUST be performed
+*                   by the application layer PRIOR to any TCP connection request/synchronization
+*                   either from a :
+*
+*                   (a) Actively- connected TCP connection
+*                   (b) Passively-connected TCP connection, which is cloned from its previously-
+*                           configured LISTEN-state TCP connection
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgRxWinSize (NET_TCP_CONN_ID    conn_id_tcp,
+                                      NET_TCP_WIN_SIZE   win_size,
+                                      NET_ERR           *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+
+#if(NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgRxWinSize, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* ------------- CFG TCP CONN RX WIN SIZE ------------- */
+   cfg_valid = NetTCP_ConnCfgRxWinSizeHandler(conn_id_tcp, win_size, p_err);
+   goto exit_release;
+
+
+exit_lock_fault:
+    cfg_valid = DEF_FAIL;
+    goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_ConnCfgRxWinSizeHandler()
+*
+* Description : (1) Configure TCP connection's   receive window size :
+*
+*                   (a) Validate  TCP connection receive window size configuration
+*                   (b) Configure TCP connection receive window size                        See Note #3
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure receive window size.
+*               -----------     Argument checked by NetTCP_ConnCfgRxWinSize(),
+*                                                   NetSock_CfgRxQ_Size().
+*
+*               win_size        Desired receive window size.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection receive window size
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE  Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP     Invalid TCP connection operation.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid receive window size.
+*
+* Return(s)   : DEF_OK,   TCP connection receive window size successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgRxWinSize(),
+*               NetSock_CfgRxQ_Size().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgRxWinSizeHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgRxWinSize()  Note #2'.
+*
+*               (3) A TCP connection's receive window size SHOULD NOT be updated after the TCP
+*                   connection is connected (see 'NetTCP_RxConnWinSizeHandler()  Notes #2b & #5').
+*                   Thus any configuration of the local receive window size MUST be performed
+*                   by the application layer PRIOR to any TCP connection request/synchronization
+*                   either from a :
+*
+*                   (a) Actively- connected TCP connection
+*                   (b) Passively-connected TCP connection, which is cloned from its previously-
+*                           configured LISTEN-state TCP connection
+*
+*               (4) TCP connections' 'RxWinSizeCfgd' variables MUST ALWAYS be accessed with the global
+*                   network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgRxWinSizeHandler (NET_TCP_CONN_ID    conn_id_tcp,
+                                             NET_TCP_WIN_SIZE   win_size,
+                                             NET_ERR           *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+
+                                                                /* --------------- VALIDATE RX WIN SIZE --------------- */
+#if (NET_TCP_WIN_SIZE_MIN > 0)
+    if (win_size < NET_TCP_WIN_SIZE_MIN) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+#if ((NET_TCP_WIN_SIZE_MAX < DEF_INT_08U_MAX_VAL)                                                  || \
+    ((NET_TCP_WIN_SIZE_MAX < DEF_INT_16U_MAX_VAL) && (NET_TCP_WIN_SIZE_MAX > DEF_INT_08U_MAX_VAL)) || \
+    ((NET_TCP_WIN_SIZE_MAX < DEF_INT_32U_MAX_VAL) && (NET_TCP_WIN_SIZE_MAX > DEF_INT_16U_MAX_VAL)))
+    if (win_size > NET_TCP_WIN_SIZE_MAX) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ------------- VALIDATE TCP CONN STATE -------------- */
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+             return (DEF_FAIL);
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+             break;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_OP;
+             return (DEF_FAIL);
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose(p_conn, DEF_NULL, DEF_YES, NET_TCP_CONN_CLOSE_CONN_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+             return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------- CFG TCP CONN RX WIN SIZE ------------- */
+    p_conn->RxWinSizeCfgd = win_size;                           /* Cfg rx win size.                                     */
+    NetTCP_RxConnWinSizeCfg(p_conn);                            /* Cfg rx win ctrls.                                    */
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_ConnCfgTxWinSize()
+*
+* Description : (1) Configure TCP connection's   transmit window size :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection transmit window size                       See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure transmit window size.
+*
+*               win_size        Desired transmit window size.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgTxWinSizeHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection transmit window size successfully
+*                                                                   configured.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE  Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP     Invalid TCP connection operation.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid transmit window size.
+*
+*                                                               ------- RETURNED BY NetTCP_ConnIsUsed() : --------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               ------ RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit window size successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxWinSize() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgTxWinSizeHandler()  Note #2'.
+*
+*               (3) A TCP connection's transmit window size SHOULD NOT be updated after the TCP connection is
+*                   connected.  Thus any configuration of the local transmit window size MUST be performed by
+*                   the application layer PRIOR to any TCP connection request/synchronization either from a :
+*
+*                   (a) Actively- connected TCP connection
+*                   (b) Passively-connected TCP connection, which is cloned from its previously-
+*                           configured LISTEN-state TCP connection
+*
+*                   See also 'NetTCP_TxConnWinSizeHandlerCfgd()  Note #3'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxWinSize (NET_TCP_CONN_ID    conn_id_tcp,
+                                      NET_TCP_WIN_SIZE   win_size,
+                                      NET_ERR           *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgTxWinSize, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* ------------- CFG TCP CONN TX WIN SIZE ------------- */
+   cfg_valid = NetTCP_ConnCfgTxWinSizeHandler(conn_id_tcp, win_size, p_err);
+   goto exit_release;
+
+
+exit_lock_fault:
+   cfg_valid = DEF_FAIL;
+   goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_ConnCfgTxWinSizeHandler()
+*
+* Description : (1) Configure TCP connection's   transmit window size :
+*
+*                   (a) Validate  TCP connection transmit window size configuration
+*                   (b) Configure TCP connection transmit window size                       See Note #3
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure transmit window size.
+*               -----------     Argument checked by NetTCP_ConnCfgTxWinSize(),
+*                                                   NetSock_CfgTxQ_Size().
+*
+*               win_size        Desired transmit window size.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit window size
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE  Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP     Invalid TCP connection operation.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid transmit window size.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit window size successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgTxWinSize(),
+*               NetSock_CfgTxQ_Size().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxWinSizeHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgTxWinSize()  Note #2'.
+*
+*               (3) A TCP connection's transmit window size SHOULD NOT be updated after the TCP connection is
+*                   connected.  Thus any configuration of the local transmit window size MUST be performed by
+*                   the application layer PRIOR to any TCP connection request/synchronization either from a :
+*
+*                   (a) Actively- connected TCP connection
+*                   (b) Passively-connected TCP connection, which is cloned from its previously-
+*                           configured LISTEN-state TCP connection
+*
+*                   See also 'NetTCP_TxConnWinSizeHandlerCfgd()  Note #3'.
+*
+*               (4) TCP connections' 'TxWinSizeCfgd' variables MUST ALWAYS be accessed with the global
+*                   network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxWinSizeHandler (NET_TCP_CONN_ID    conn_id_tcp,
+                                             NET_TCP_WIN_SIZE   win_size,
+                                             NET_ERR           *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+
+                                                                /* --------------- VALIDATE TX WIN SIZE --------------- */
+#if (NET_TCP_WIN_SIZE_MIN > 0)
+    if (win_size < NET_TCP_WIN_SIZE_MIN) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+#if ((NET_TCP_WIN_SIZE_MAX < DEF_INT_08U_MAX_VAL)                                                  || \
+    ((NET_TCP_WIN_SIZE_MAX < DEF_INT_16U_MAX_VAL) && (NET_TCP_WIN_SIZE_MAX > DEF_INT_08U_MAX_VAL)) || \
+    ((NET_TCP_WIN_SIZE_MAX < DEF_INT_32U_MAX_VAL) && (NET_TCP_WIN_SIZE_MAX > DEF_INT_16U_MAX_VAL)))
+    if (win_size > NET_TCP_WIN_SIZE_MAX) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ------------- VALIDATE TCP CONN STATE -------------- */
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+             return (DEF_FAIL);
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+             break;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_OP;
+             return (DEF_FAIL);
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_CONN_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+             return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------- CFG TCP CONN TX WIN SIZE ------------- */
+    p_conn->TxWinSizeCfgd = win_size;                           /* Cfg tx win size.                                     */
+    NetTCP_TxConnWinSizeCfg(p_conn);                            /* Cfg tx win ctrls.                                    */
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_ConnCfgTxNagleEn()
+*
+* Description : (1) Configure TCP connection's   transmit Nagle algorithm enable :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection transmit Nagle algorithm enable            See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure transmit Nagle enable.
+*
+*               nagle_en        Desired value for TCP connection transmit Nagle enable :
+*
+*                                   DEF_ENABLED             TCP connections delay transmitting next data
+*                                                               segment(s) until all unacknowledged data
+*                                                               is acknowledged OR an MSS-sized segment
+*                                                               can be transmitted.
+*
+*                                   DEF_DISABLED            TCP connections transmit all data segment(s)
+*                                                               when permitted by local & remote hosts'
+*                                                               congestion controls.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgTxNagleEnHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection transmit Nagle enable successfully
+*                                                                   configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid enable/disable configuration.
+*
+*                                                               ------- RETURNED BY NetTCP_ConnIsUsed() : --------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               ------ RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit Nagle enable successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxNagleEn() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgTxNagleEnHandler()  Note #2'.
+*
+*               (3) RFC #1122, Section 4.2.3.4 also states that "a TCP SHOULD implement the Nagle
+*                   Algorithm ... However, there MUST be a way for an application to disable the
+*                   Nagle algorithm on an individual connection".
+*
+*                   See also 'NetTCP_TxConnTxQ()  Note #6'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxNagleEn (NET_TCP_CONN_ID   conn_id_tcp,
+                                      CPU_BOOLEAN       nagle_en,
+                                      NET_ERR          *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgTxNagleEn, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* ------------- CFG TCP CONN TX NAGLE EN ------------- */
+   cfg_valid = NetTCP_ConnCfgTxNagleEnHandler(conn_id_tcp, nagle_en, p_err);
+   goto exit_release;
+
+
+exit_lock_fault:
+   cfg_valid = DEF_FAIL;
+   goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_ConnCfgTxNagleEnHandler()
+*
+* Description : (1) Configure TCP connection's   transmit Nagle algorithm enable :
+*
+*                   (a) Validate  TCP connection transmit Nagle algorithm enable configuration
+*                   (b) Configure TCP connection transmit Nagle algorithm enable                See Note #3
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure transmit Nagle enable.
+*               -----------     Argument checked in NetTCP_ConnCfgTxNagleEn().
+*
+*               nagle_en        Desired value for TCP connection transmit Nagle enable :
+*
+*                                   DEF_ENABLED             TCP connections delay transmitting next data
+*                                                               segment(s) until all unacknowledged data
+*                                                               is acknowledged OR an MSS-sized segment
+*                                                               can be transmitted.
+*
+*                                   DEF_DISABLED            TCP connections transmit all data segment(s)
+*                                                               when permitted by local & remote hosts'
+*                                                               congestion controls.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit Nagle enable
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid enable/disable configuration.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit Nagle enable successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgTxNagleEn().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxNagleEnHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgTxNagleEn()  Note #2'.
+*
+*               (3) RFC #1122, Section 4.2.3.4 also states that "a TCP SHOULD implement the Nagle
+*                   Algorithm ... However, there MUST be a way for an application to disable the
+*                   Nagle algorithm on an individual connection".
+*
+*                   See also 'NetTCP_TxConnTxQ()  Note #6'.
+*
+*               (4) TCP connections' 'TxWinSizeNagleEn' variables MUST ALWAYS be accessed with the
+*                   global network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxNagleEnHandler (NET_TCP_CONN_ID   conn_id_tcp,
+                                             CPU_BOOLEAN       nagle_en,
+                                             NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+
+                                                                /* ---------------- VALIDATE NAGLE EN ----------------- */
+    switch (nagle_en) {
+        case DEF_ENABLED:
+        case DEF_DISABLED:
+             break;
+
+
+        default:
+            *p_err =  NET_TCP_ERR_INVALID_ARG;
+             return (DEF_FAIL);
+    }
+
+
+                                                                /* ------------- CFG TCP CONN TX NAGLE EN ------------- */
+    p_conn                   = &NetTCP_ConnTbl[conn_id_tcp];
+    p_conn->TxWinSizeNagleEn =  nagle_en;
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_ConnCfgTxAckImmedRxdPushEn()
+*
+* Description : (1) Configure TCP connection's   transmit immediate acknowledgement for received & pushed
+*                       TCP segments enable :
+*
+*                   (a) Validate  TCP connection transmit immediate acknowledgement enable configuration
+*                   (b) Acquire   network lock
+*                   (c) Validate  TCP connection used
+*                   (d) Configure TCP connection transmit immediate acknowledgement enable      See Note #3
+*                   (e) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp         Handle identifier of TCP connection to configure transmit immediate
+*                                       acknowledgement for received & pushed TCP segments enable.
+*
+*               tx_immed_ack_en     Desired value for TCP connection transmit immediate acknowledgement
+*                                       for received & pushed TCP segments enable :
+*
+*                                       DEF_ENABLED             TCP connection acknowledgements
+*                                                                   immediately transmitted for any
+*                                                                   pushed TCP segments received.
+*
+*                                       DEF_DISABLED            TCP connection acknowledgements NOT
+*                                                                   immediately transmitted for any
+*                                                                   pushed TCP segments received.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit immediate
+*                                                                   acknowledgement successfully configured.
+*
+*                               NET_TCP_ERR_INVALID_ARG         Invalid enable/disable configuration.
+*
+*                                                               ---- RETURNED BY NetTCP_ConnIsUsed() : -----
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               --- RETURNED BY Net_GlobalLockAcquire() : --
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit immediate acknowledgement for received & pushed TCP
+*                             segments enable successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxAckImmedRxdPushEn() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*               (3) RFC #813, Section 5 states that "the receiver of data will refrain from sending an
+*                   acknowledgement under certain circumstances ... The most obvious event on which to
+*                   depend is the arrival of another segment.  So, if a segment arrives, postpone sending
+*                   an acknowledgement if ... the push bit is not set in the segment, since it is a
+*                   reasonable assumption that there is more data coming in a subsequent segment."
+*
+*                   See also 'NetTCP_TxConnAck()  Note #4a4'.
+*
+*               (4) TCP connections' 'TxAckImmedRxdPushEn' variables MUST ALWAYS be accessed with the
+*                   global network lock already acquired (see Note #2b).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxAckImmedRxdPushEn (NET_TCP_CONN_ID   conn_id_tcp,
+                                                CPU_BOOLEAN       tx_immed_ack_en,
+                                                NET_ERR          *p_err)
+{
+   NET_TCP_CONN  *p_conn;
+   CPU_BOOLEAN    rtn_val;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ------------- VALIDATE TX IMMED ACK EN ------------- */
+   switch (tx_immed_ack_en) {
+       case DEF_ENABLED:
+       case DEF_DISABLED:
+            break;
+
+
+       default:
+           *p_err =  NET_TCP_ERR_INVALID_ARG;
+            return (DEF_FAIL);
+   }
+
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgTxAckImmedRxdPushEn, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+
+                                                                /* ----------- CFG TCP CONN TX IMMED ACK EN ----------- */
+   p_conn                      = &NetTCP_ConnTbl[conn_id_tcp];
+   p_conn->TxAckImmedRxdPushEn =  tx_immed_ack_en;
+
+
+   rtn_val = DEF_OK;
+  *p_err =  NET_TCP_ERR_NONE;
+   goto exit_release;
+
+
+exit_lock_fault:
+   rtn_val = DEF_FAIL;
+   goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   rtn_val = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetTCP_ConnCfgTxAckDlyTimeout()
+*
+* Description : (1) Configure TCP connection's   transmit acknowledgement delay timeout :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection transmit acknowledgement delay timeout     See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure transmit acknowledgement
+*                                   delay timeout.
+*
+*               timeout_ms      Desired value for TCP connection transmit acknowledgement delay timeout
+*                                   (in milliseconds).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgTxAckDlyTimeoutHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection transmit acknowledgement delay timeout
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid acknowledgement delay timeout.
+*
+*                                                               ---------- RETURNED BY NetTCP_ConnIsUsed() : -----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               --------- RETURNED BY Net_GlobalLockAcquire() : --------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit acknowledgement delay timeout successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxAckDlyTimeout() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgTxAckDlyTimeoutHandler()  Note #2'.
+*
+*               (3) (a) RFC #1122, Section 4.2.3.2 states that "an ACK should not be excessively delayed;
+*                       in particular, the delay MUST be less than 0.5 seconds".
+*
+*                   (b) RFC #2581, Section 4.2 reiterates that "an ACK ... MUST be generated within 500 ms
+*                       of the arrival of the first unacknowledged packet".
+*
+*                   See also 'NetTCP_TxConnAck()  Note #6a2'.
+*
+*               (4) Configured timeout does NOT reschedule any current acknowledgement delay timeout in
+*                   progress but becomes effective the next time a TCP connection sets an acknowledgement
+*                   delay timeout.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxAckDlyTimeout (NET_TCP_CONN_ID      conn_id_tcp,
+                                            NET_TCP_TIMEOUT_MS   timeout_ms,
+                                            NET_ERR             *p_err)
+{
+    CPU_BOOLEAN  cfg_valid;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+    Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgTxAckDlyTimeout, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         goto exit_fail;
+    }
+#endif
+
+                                                                /* --------- CFG TCP CONN TX ACK DLY TIMEOUT ---------- */
+    cfg_valid = NetTCP_ConnCfgTxAckDlyTimeoutHandler(conn_id_tcp, timeout_ms, p_err);
+    goto exit_release;
+
+
+exit_lock_fault:
+   cfg_valid = DEF_FAIL;
+   goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                               NetTCP_ConnCfgTxAckDlyTimeoutHandler()
+*
+* Description : (1) Configure TCP connection's   transmit acknowledgement delay timeout :
+*
+*                   (a) Validate  TCP connection transmit acknowledgement delay timeout configuration
+*                   (b) Configure TCP connection transmit acknowledgement delay timeout         See Note #3
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure transmit acknowledgement
+*               -----------         delay timeout.
+*
+*                               Argument checked   in NetTCP_ConnCfgTxAckDlyTimeout();
+*                                        validated in NetTCP_ConnClr().
+*
+*               timeout_ms      Desired value for TCP connection transmit acknowledgement delay timeout
+*                                   (in milliseconds).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit acknowledgement
+*                                                                   delay timeout successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid acknowledgement delay timeout.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit acknowledgement delay timeout successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgTxAckDlyTimeout(),
+*               NetTCP_ConnClr().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxAckDlyTimeoutHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgTxAckDlyTimeout()  Note #2'.
+*
+*               (3) (a) (1) RFC #1122, Section 4.2.3.2 states that "an ACK should not be excessively
+*                               delayed; in particular, the delay MUST be less than 0.5 seconds".
+*
+*                       (2) RFC #2581, Section 4.2 reiterates that "an ACK ... MUST be generated
+*                           within 500 ms of the arrival of the first unacknowledged packet".
+*
+*                   (b) If the acknowledgement delay timeout is configured with a non-zero value,
+*                       at least one timer tick MUST be set to ensure that the non-zero timeout
+*                       is implemented.
+*
+*                   See also 'NetTCP_TxConnAck()  Note #6a2'.
+*
+*               (4) Configured timeout does NOT reschedule any current acknowledgement delay timeout in
+*                   progress but becomes effective the next time a TCP connection sets an acknowledgement
+*                   delay timeout.
+*
+*               (5) Configured timeout converted to 'NET_TMR_TICK' ticks to avoid run-time conversion.
+*
+*               (6) TCP connections' 'TxAckDlyTimeout' variables MUST ALWAYS be accessed with the global
+*                   network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxAckDlyTimeoutHandler (NET_TCP_CONN_ID      conn_id_tcp,
+                                                   NET_TCP_TIMEOUT_MS   timeout_ms,
+                                                   NET_ERR             *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    NET_TMR_TICK   timeout_tick;
+
+
+                                                                /* ----------- VALIDATE TX ACK DLY TIMEOUT ------------ */
+#if (NET_TCP_ACK_DLY_TIME_MIN_MS > 0)
+    if (timeout_ms < NET_TCP_ACK_DLY_TIME_MIN_MS) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+#if ((NET_TCP_ACK_DLY_TIME_MAX_MS < DEF_INT_08U_MAX_VAL)                                                         || \
+    ((NET_TCP_ACK_DLY_TIME_MAX_MS < DEF_INT_16U_MAX_VAL) && (NET_TCP_ACK_DLY_TIME_MAX_MS > DEF_INT_08U_MAX_VAL)) || \
+    ((NET_TCP_ACK_DLY_TIME_MAX_MS < DEF_INT_32U_MAX_VAL) && (NET_TCP_ACK_DLY_TIME_MAX_MS > DEF_INT_16U_MAX_VAL)))
+    if (timeout_ms > NET_TCP_ACK_DLY_TIME_MAX_MS) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* --------- CFG TCP CONN TX ACK DLY TIMEOUT ---------- */
+    timeout_tick = (timeout_ms * NET_TMR_TIME_TICK_PER_SEC) / DEF_TIME_NBR_mS_PER_SEC;
+    if (timeout_tick < 1) {                                     /* If < 1 tick, ...                                     */
+        timeout_tick = 1u;                                      /* ... set at least 1 tick (see Note #3b).              */
+    }
+
+    p_conn                       = &NetTCP_ConnTbl[conn_id_tcp];
+    p_conn->TxAckDlyTimeout_ms   =  timeout_ms;
+    p_conn->TxAckDlyTimeout_tick =  timeout_tick;
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_ConnCfgTxKeepAliveEn()
+*
+* Description : (1) Configure TCP connection's   transmit keep-alive algorithm enable :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection transmit keep-alive algorithm enable       See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure transmit keep-alive enable.
+*
+*               keep_alive_en   Desired value for TCP connection transmit keep-alive enable :
+*
+*                                   DEF_ENABLED             TCP connections transmit periodic keep-alive
+*                                                               segments if NO data segments have been
+*                                                               received within the keep-alive timeout.
+*
+*                                   DEF_DISABLED            TCP connections transmit a reset segment &
+*                                                               close    if NO data segments have been
+*                                                               received within the keep-alive timeout.
+*
+*                               See also 'NetTCP_ConnCfgIdleTimeoutHandler()  Note #1'.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgTxKeepAliveEnHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection transmit keep-alive enable successfully
+*                                                                   configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid enable/disable configuration.
+*
+*                                                               --------- RETURNED BY NetTCP_ConnIsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -------- RETURNED BY Net_GlobalLockAcquire() : -------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit keep-alive enable successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxKeepAliveEn() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgTxKeepAliveEnHandler()  Note #2'.
+*
+*               (3) RFC #1122, Section 4.2.3.6 states that "if keep-alives are included, the application
+*                   MUST be able to turn them on or off for each TCP connection".
+*
+*                   See also 'NetTCP_TxConnKeepAlive()  Note #2a'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxKeepAliveEn (NET_TCP_CONN_ID   conn_id_tcp,
+                                          CPU_BOOLEAN       keep_alive_en,
+                                          NET_ERR          *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgTxKeepAliveEn, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* ---------- CFG TCP CONN TX KEEP-ALIVE EN ----------- */
+   cfg_valid = NetTCP_ConnCfgTxKeepAliveEnHandler(conn_id_tcp, keep_alive_en, p_err);
+
+   goto exit_release;
+
+
+exit_lock_fault:
+   cfg_valid = DEF_FAIL;
+   goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetTCP_ConnCfgTxKeepAliveEnHandler()
+*
+* Description : (1) Configure TCP connection's   transmit keep-alive algorithm enable :
+*
+*                   (a) Validate  TCP connection transmit keep-alive algorithm enable configuration
+*                   (b) Configure TCP connection transmit keep-alive algorithm enable           See Note #3
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure transmit keep-alive enable.
+*               -----------     Argument checked in NetTCP_ConnCfgTxKeepAliveEn().
+*
+*               keep_alive_en   Desired value for TCP connection transmit keep-alive enable :
+*
+*                                   DEF_ENABLED             TCP connections transmit periodic keep-alive
+*                                                               segments if NO data segments have been
+*                                                               received within the keep-alive timeout.
+*
+*                                   DEF_DISABLED            TCP connections transmit a reset segment &
+*                                                               close    if NO data segments have been
+*                                                               received within the keep-alive timeout.
+*
+*                               See also 'NetTCP_ConnCfgIdleTimeoutHandler()  Note #1'.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit keep-alive
+*                                                                   enable successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid enable/disable configuration.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit keep-alive enable successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgTxKeepAliveEn().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxKeepAliveEnHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgTxKeepAliveEn()  Note #2'.
+*
+*               (3) RFC #1122, Section 4.2.3.6 states that "if keep-alives are included, the application
+*                   MUST be able to turn them on or off for each TCP connection".
+*
+*                   See also 'NetTCP_TxConnKeepAlive()  Note #2a'.
+*
+*               (4) TCP connections' 'TxKeepAliveEn' variables MUST ALWAYS be accessed with the global
+*                   network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxKeepAliveEnHandler (NET_TCP_CONN_ID   conn_id_tcp,
+                                                 CPU_BOOLEAN       keep_alive_en,
+                                                 NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+
+                                                                /* ------------ VALIDATE TX KEEP-ALIVE EN ------------- */
+    switch (keep_alive_en) {
+        case DEF_ENABLED:
+        case DEF_DISABLED:
+             break;
+
+
+        default:
+            *p_err =  NET_TCP_ERR_INVALID_ARG;
+             return (DEF_FAIL);
+    }
+
+
+                                                                /* ---------- CFG TCP CONN TX KEEP-ALIVE EN ----------- */
+    p_conn                = &NetTCP_ConnTbl[conn_id_tcp];
+    p_conn->TxKeepAliveEn =  keep_alive_en;
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_ConnCfgTxKeepAliveTh()
+*
+* Description : (1) Configure TCP connection's maximum number of consecutive keep-alives to transmit :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection transmit keep-alive threshold              See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp             Handle identifier of TCP connection to configure transmit
+*                                           keep-alive threshold.
+*
+*               nbr_max_keep_alive      Desired maximum number of consecutive keep-alives to transmit.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgTxKeepAliveThHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection transmit keep-alive threshold
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid maximum number of keep-alives.
+*
+*                                                               --------- RETURNED BY NetTCP_ConnIsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -------- RETURNED BY Net_GlobalLockAcquire() : -------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit keep-alive threshold successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxKeepAliveTh() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgTxKeepAliveThHandler()  Note #2'.
+*
+*               (3) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 23.3 'Other End Crashes',
+*                   Pages 334-335 states "that the [remote host] ... send[s] ... [N] keepalive probes ...
+*                   before declaring the connection dead".
+*
+*                   See also 'NetTCP_TxConnKeepAlive()  Note #2c3'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxKeepAliveTh (NET_TCP_CONN_ID   conn_id_tcp,
+                                          NET_PKT_CTR       nbr_max_keep_alive,
+                                          NET_ERR          *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgTxKeepAliveTh, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* ---------- CFG TCP CONN TX KEEP-ALIVE TH ----------- */
+   cfg_valid = NetTCP_ConnCfgTxKeepAliveThHandler(conn_id_tcp, nbr_max_keep_alive, p_err);
+   goto exit_release;
+
+
+exit_lock_fault:
+   cfg_valid = DEF_FAIL;
+   goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetTCP_ConnCfgTxKeepAliveThHandler()
+*
+* Description : (1) Configure TCP connection's maximum number of consecutive keep-alives to transmit :
+*
+*                   (a) Validate  TCP connection transmit keep-alive threshold configuration
+*                   (b) Configure TCP connection transmit keep-alive threshold                  See Note #3
+*
+*
+* Argument(s) : conn_id_tcp             Handle identifier of TCP connection to configure transmit
+*               -----------                 keep-alive threshold.
+*
+*                                       Argument checked in NetTCP_ConnCfgTxKeepAliveTh().
+*
+*               nbr_max_keep_alive      Desired maximum number of consecutive keep-alives to transmit.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit keep-alive
+*                                                                   threshold successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid maximum number of keep-alives.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit keep-alive threshold successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgTxKeepAliveTh().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxKeepAliveThHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgTxKeepAliveTh()  Note #2'.
+*
+*               (3) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 23.3 'Other End Crashes',
+*                   Pages 334-335 states "that the [remote host] ... send[s] ... [N] keepalive probes ...
+*                   before declaring the connection dead".
+*
+*                   See also 'NetTCP_TxConnKeepAlive()  Note #2c3'.
+*
+*               (4) TCP connections' 'TxKeepAliveTh' variables MUST ALWAYS be accessed with the global
+*                   network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxKeepAliveThHandler (NET_TCP_CONN_ID   conn_id_tcp,
+                                                 NET_PKT_CTR       nbr_max_keep_alive,
+                                                 NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+
+                                                                /* ------------ VALIDATE TX KEEP-ALIVE TH ------------- */
+#if (NET_TCP_TX_KA_TH_MIN  > NET_PKT_CTR_MIN)
+    if (nbr_max_keep_alive < NET_TCP_TX_KA_TH_MIN) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+#if (NET_TCP_TX_KA_TH_MAX  < NET_PKT_CTR_MAX)
+    if (nbr_max_keep_alive > NET_TCP_TX_KA_TH_MAX) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ---------- CFG TCP CONN TX KEEP-ALIVE TH ----------- */
+    p_conn                = &NetTCP_ConnTbl[conn_id_tcp];
+    p_conn->TxKeepAliveTh =  nbr_max_keep_alive;
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                               NetTCP_ConnCfgTxKeepAliveRetryTimeout()
+*
+* Description : (1) Configure TCP connection's   transmit keep-alive retry timeout :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection transmit keep-alive retry timeout
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure transmit keep-alive retry
+*                                   timeout.
+*
+*               timeout_sec     Desired value for TCP connection transmit keep-alive retry timeout (in seconds).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgTxKeepAliveRetryHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection transmit keep-alive retry timeout
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid keep-alive retry timeout.
+*
+*                                                               ----------- RETURNED BY NetTCP_ConnIsUsed() : -----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               --------- RETURNED BY Net_GlobalLockAcquire() : ---------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit keep-alive retry timeout successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxKeepAliveRetryTimeout() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgTxKeepAliveRetryHandler()  Note #2'.
+*
+*               (3) Configured timeout does NOT reschedule any current keep-alive retry timeout in progress
+*                   but becomes effective the next time a TCP connection sets its keep-alive retry timeout.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxKeepAliveRetryTimeout (NET_TCP_CONN_ID       conn_id_tcp,
+                                                    NET_TCP_TIMEOUT_SEC   timeout_sec,
+                                                    NET_ERR              *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgTxKeepAliveRetryTimeout, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* ----- CFG TCP CONN TX KEEP-ALIVE RETRY TIMEOUT ----- */
+   cfg_valid = NetTCP_ConnCfgTxKeepAliveRetryHandler(conn_id_tcp, timeout_sec, p_err);
+   goto exit_release;
+
+
+exit_lock_fault:
+   cfg_valid = DEF_FAIL;
+   goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                               NetTCP_ConnCfgTxKeepAliveRetryHandler()
+*
+* Description : (1) Configure TCP connection's   transmit keep-alive retry timeout :
+*
+*                   (a) Validate  TCP connection transmit keep-alive retry timeout configuration
+*                   (b) Configure TCP connection transmit keep-alive retry timeout
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure transmit keep-alive retry
+*               -----------         timeout.
+*
+*                               Argument checked in NetTCP_ConnCfgTxKeepAliveRetryTimeout().
+*
+*               timeout_sec     Desired value for TCP connection transmit keep-alive retry timeout (in seconds).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection transmit keep-alive retry
+*                                                                   timeout successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid keep-alive retry timeout.
+*
+* Return(s)   : DEF_OK,   TCP connection transmit keep-alive retry timeout successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgTxKeepAliveRetryTimeout().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgTxKeepAliveRetryHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgTxKeepAliveRetryTimeout()  Note #2'.
+*
+*               (3) NetTCP_ConnCfgTxKeepAliveRetryTimeoutHandler() abbreviated to
+*                   NetTCP_ConnCfgTxKeepAliveRetryHandler() to enforce ANSI-compliance of 31-character
+*                   symbol length uniqueness.
+*
+*               (4) Configured timeout does NOT reschedule any current keep-alive retry timeout in progress
+*                   but becomes effective the next time a TCP connection sets its keep-alive retry timeout.
+*
+*               (5) TCP connections' 'TxKeepAliveRetryTimeout_sec' variables MUST ALWAYS be accessed with
+*                   the global network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgTxKeepAliveRetryHandler (NET_TCP_CONN_ID       conn_id_tcp,
+                                                    NET_TCP_TIMEOUT_SEC   timeout_sec,
+                                                    NET_ERR              *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+
+                                                                /* ------- VALIDATE TX KEEP-ALIVE RETRY TIMEOUT ------- */
+#if (NET_TCP_TX_KA_RETRY_TIMEOUT_MIN_SEC > 0)
+    if (timeout_sec < NET_TCP_TX_KA_RETRY_TIMEOUT_MIN_SEC) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+#if ((NET_TCP_TX_KA_RETRY_TIMEOUT_MAX_SEC < DEF_INT_08U_MAX_VAL)                                                                 || \
+    ((NET_TCP_TX_KA_RETRY_TIMEOUT_MAX_SEC < DEF_INT_16U_MAX_VAL) && (NET_TCP_TX_KA_RETRY_TIMEOUT_MAX_SEC > DEF_INT_08U_MAX_VAL)) || \
+    ((NET_TCP_TX_KA_RETRY_TIMEOUT_MAX_SEC < DEF_INT_32U_MAX_VAL) && (NET_TCP_TX_KA_RETRY_TIMEOUT_MAX_SEC > DEF_INT_16U_MAX_VAL)))
+    if (timeout_sec > NET_TCP_TX_KA_RETRY_TIMEOUT_MAX_SEC) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* ----- CFG TCP CONN TX KEEP-ALIVE RETRY TIMEOUT ----- */
+    p_conn                              = &NetTCP_ConnTbl[conn_id_tcp];
+    p_conn->TxKeepAliveRetryTimeout_sec =  timeout_sec;
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_ConnCfgReTxMaxTh()
+*
+* Description : (1) Configure TCP connection's   maximum number of same segment retransmissions :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection maximum number retransmissions             See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure maximum number of
+*                                   same segment retransmissions.
+*
+*               nbr_max_re_tx   Desired maximum number of same segment retransmissions.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgReTxMaxThHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection maximum number of retransmissions
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid maximum number of retransmissions.
+*
+*                                                               ------- RETURNED BY NetTCP_ConnIsUsed() : --------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               ----- RETURNED BY Net_GlobalLockAcquire() : ------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection maximum number of same segment retransmissions successfully
+*                             configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgReTxMaxTh() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgReTxMaxThHandler()  Note #2'.
+*
+*               (3) RFC #1122, Section 4.2.3.5 states that "when the number of transmissions of the
+*                   same segment reaches a threshold ... close the connection".
+*
+*                   See also 'NetTCP_TxConnReTxQ()  Note #3'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgReTxMaxTh (NET_TCP_CONN_ID   conn_id_tcp,
+                                      NET_PKT_CTR       nbr_max_re_tx,
+                                      NET_ERR          *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgReTxMaxTh, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* -------------- CFG TCP CONN RE-TX TH --------------- */
+   cfg_valid = NetTCP_ConnCfgReTxMaxThHandler(conn_id_tcp, nbr_max_re_tx, p_err);
+   goto exit_release;
+
+
+exit_lock_fault:
+   cfg_valid = DEF_FAIL;
+   goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_ConnCfgReTxMaxThHandler()
+*
+* Description : (1) Configure TCP connection's   maximum number of same segment retransmissions :
+*
+*                   (a) Validate  TCP connection maximum number retransmissions configuration
+*                   (b) Configure TCP connection maximum number retransmissions                 See Note #3
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure maximum number of
+*               -----------         same segment retransmissions.
+*
+*                               Argument checked in NetTCP_ConnCfgReTxMaxTh().
+*
+*               nbr_max_re_tx   Desired maximum number of same segment retransmissions.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection maximum number of
+*                                                                   retransmissions successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid maximum number of retransmissions.
+*
+* Return(s)   : DEF_OK,   TCP connection maximum number of same segment retransmissions successfully
+*                             configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgReTxMaxTh().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgReTxMaxThHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgReTxMaxTh()  Note #2'.
+*
+*               (3) RFC #1122, Section 4.2.3.5 states that "when the number of transmissions of the
+*                   same segment reaches a threshold ... close the connection".
+*
+*                   See also 'NetTCP_TxConnReTxQ()  Note #3'.
+*
+*               (4) TCP connections' 'TxSegReTxTh' variables MUST ALWAYS be accessed with the global
+*                   network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgReTxMaxThHandler (NET_TCP_CONN_ID   conn_id_tcp,
+                                             NET_PKT_CTR       nbr_max_re_tx,
+                                             NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+
+                                                                /* ---------------- VALIDATE RE-TX TH ----------------- */
+#if (NET_TCP_RE_TX_TH_MIN > NET_PKT_CTR_MIN)
+    if (nbr_max_re_tx < NET_TCP_RE_TX_TH_MIN) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+#if (NET_TCP_RE_TX_TH_MAX < NET_PKT_CTR_MAX)
+    if (nbr_max_re_tx > NET_TCP_RE_TX_TH_MAX) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* -------------- CFG TCP CONN RE-TX TH --------------- */
+    p_conn              = &NetTCP_ConnTbl[conn_id_tcp];
+    p_conn->TxSegReTxTh =  nbr_max_re_tx;
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetTCP_ConnCfgReTxMaxTimeout()
+*
+* Description : (1) Configure TCP connection's   maximum retransmission timeout :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection maximum retransmission timeout             See Note #3
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure maximum retransmission
+*                                   timeout value.
+*
+*               timeout_sec     Desired value for TCP connection maximum retransmission timeout (in seconds).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgReTxMaxTimeoutHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection maximum retransmission timeout
+*                                                                   successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid maximum retransmission timeout.
+*
+*                                                               ---------- RETURNED BY NetTCP_ConnIsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               -------- RETURNED BY Net_GlobalLockAcquire() : --------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection maximum retransmission timeout successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgReTxMaxTimeout() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgReTxMaxTimeoutHandler()  Note #2'.
+*
+*               (3) (a) RFC #2988, Section 2.4 states that "a maximum value MAY be placed on RTO provided
+*                       it is at least 60 seconds".
+*
+*                   (b) RFC #1122, Section 4.2.3.1 states that "the recommended ... RTO ... upper bound
+*                       should be 2*MSL".
+*
+*                   (c) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2, Page 299 states
+*                       that "the timeout value ... [has] an upper limit of 64 seconds".
+*
+*               (4) Configured timeout does NOT reschedule any current retransmission timeout in progress
+*                   but becomes effective the next time a TCP connection sets its retransmission timeout.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgReTxMaxTimeout (NET_TCP_CONN_ID       conn_id_tcp,
+                                           NET_TCP_TIMEOUT_SEC   timeout_sec,
+                                           NET_ERR              *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgReTxMaxTimeout, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* --------------- CFG TCP CONN RTO MAX --------------- */
+   cfg_valid = NetTCP_ConnCfgReTxMaxTimeoutHandler(conn_id_tcp, timeout_sec, p_err);
+   goto exit_release;
+
+
+exit_lock_fault:
+   cfg_valid = DEF_FAIL;
+   goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetTCP_ConnCfgReTxMaxTimeoutHandler()
+*
+* Description : (1) Configure TCP connection's   maximum retransmission timeout :
+*
+*                   (a) Validate  TCP connection maximum retransmission timeout configuration
+*                   (b) Configure TCP connection maximum retransmission timeout                 See Note #3
+*
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to configure maximum retransmission
+*               -----------         timeout value.
+*
+*                               Argument checked in NetTCP_ConnCfgReTxMaxTimeout().
+*
+*               timeout_sec     Desired value for TCP connection maximum retransmission timeout (in seconds).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection maximum retransmission
+*                                                                   timeout successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid maximum retransmission timeout.
+*
+* Return(s)   : DEF_OK,   TCP connection maximum retransmission timeout successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgReTxMaxTimeout().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgReTxMaxTimeoutHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgReTxMaxTimeout()  Note #2'.
+*
+*               (3) (a) RFC #2988, Section 2.4 states that "a maximum value MAY be placed on RTO provided
+*                       it is at least 60 seconds".
+*
+*                   (b) RFC #1122, Section 4.2.3.1 states that "the recommended ... RTO ... upper bound
+*                       should be 2*MSL".
+*
+*                   (c) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2, Page 299 states
+*                       that "the timeout value ... [has] an upper limit of 64 seconds".
+*
+*               (4) Configured timeout does NOT reschedule any current retransmission timeout in progress
+*                   but becomes effective the next time a TCP connection sets its retransmission timeout.
+*
+*               (5) TCP connections' 'TxRTT_RTO_Max_sec' variables MUST ALWAYS be accessed with the global
+*                   network lock already acquired (see Note #2).
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnCfgReTxMaxTimeoutHandler (NET_TCP_CONN_ID       conn_id_tcp,
+                                                  NET_TCP_TIMEOUT_SEC   timeout_sec,
+                                                  NET_ERR              *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+                                                                /* ----------------- VALIDATE RTO MAX ----------------- */
+                                                                /* See Note #3.                                         */
+#if (NET_TCP_TX_RTO_MAX_TIMEOUT_MIN_SEC > 0)
+    if (timeout_sec < NET_TCP_TX_RTO_MAX_TIMEOUT_MIN_SEC) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+#if ((NET_TCP_TX_RTO_MAX_TIMEOUT_MAX_SEC < DEF_INT_08U_MAX_VAL)                                                                || \
+    ((NET_TCP_TX_RTO_MAX_TIMEOUT_MAX_SEC < DEF_INT_16U_MAX_VAL) && (NET_TCP_TX_RTO_MAX_TIMEOUT_MAX_SEC > DEF_INT_08U_MAX_VAL)) || \
+    ((NET_TCP_TX_RTO_MAX_TIMEOUT_MAX_SEC < DEF_INT_32U_MAX_VAL) && (NET_TCP_TX_RTO_MAX_TIMEOUT_MAX_SEC > DEF_INT_16U_MAX_VAL)))
+    if (timeout_sec > NET_TCP_TX_RTO_MAX_TIMEOUT_MAX_SEC) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+
+                                                                /* --------------- CFG TCP CONN RTO MAX --------------- */
+    p_conn                    = &NetTCP_ConnTbl[conn_id_tcp];
+    p_conn->TxRTT_RTO_Max_sec =  timeout_sec;
+
+    NetTCP_TxConnRTO_CfgMaxTimeout(p_conn);                     /* Cfg RTO ctrls.                                       */
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetTCP_ConnCfgMSL_Timeout()
+*
+* Description : (1) Configure TCP connection's maximum segment lifetime (MSL) timeout :
+*
+*                   (a) Acquire   network lock
+*                   (b) Validate  TCP connection used
+*                   (c) Configure TCP connection MSL
+*                   (d) Release   network lock
+*
+*
+* Argument(s) : conn_id_tcp         Handle identifier of TCP connection to configure MSL value.
+*
+*               msl_timeout_sec     Desired value for TCP connection MSL timeout (in seconds).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                                                               - RETURNED BY NetTCP_ConnCfgReTxMaxTimeoutHandler() : -
+*                               NET_TCP_ERR_NONE                TCP connection MSL successfully configured.
+*                               NET_TCP_ERR_INVALID_ARG         Invalid MSL timeout.
+*
+*                                                              ---------- RETURNED BY NetTCP_ConnIsUsed() : ----------
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+*                                                               ------- RETURNED BY Net_GlobalLockAcquire() : --------
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : DEF_OK,   TCP connection MSL timeout successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgMSL_Timeout() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetTCP_ConnCfgMSL_TimeoutHandler()  Note #2'.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN NetTCP_ConnCfgMSL_Timeout(NET_TCP_CONN_ID      conn_id_tcp,
+                                      NET_TCP_TIMEOUT_SEC  msl_timeout_sec,
+                                      NET_ERR             *p_err)
+{
+   CPU_BOOLEAN  cfg_valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+   if (p_err == (NET_ERR *)0) {
+       CPU_SW_EXCEPTION(DEF_FAIL);
+   }
+#endif
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+                                                                /* See Note #2b.                                        */
+   Net_GlobalLockAcquire((void *)&NetTCP_ConnCfgMSL_Timeout, p_err);
+   if (*p_err != NET_ERR_NONE) {
+        goto exit_lock_fault;
+   }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+  (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+   if (*p_err != NET_TCP_ERR_NONE) {
+        goto exit_fail;
+   }
+#endif
+
+                                                                /* ----------------- CFG TCP CONN MSL ----------------- */
+   cfg_valid = NetTCP_ConnCfgMSL_TimeoutHandler(conn_id_tcp, msl_timeout_sec, p_err);
+   goto exit_release;
+
+
+exit_lock_fault:
+   cfg_valid = DEF_FAIL;
+   goto exit;
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+exit_fail:
+   cfg_valid = DEF_FAIL;
+#endif
+
+exit_release:
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+
+exit:
+   return (cfg_valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetTCP_ConnCfgMSL_TimeoutHandler()
+*
+* Description : (1) Configure TCP connection's   maximum segment lifetime (MSL):
+*
+*                   (a) Validate  TCP connection MSL configuration
+*                   (b) Configure TCP connection MSL
+*
+*
+* Argument(s) : conn_id_tcp         Handle identifier of TCP connection to configure MSL.
+*
+*                                   Argument checked in NetTCP_ConnCfgMSL_Timeout().
+*
+*               msl_timeout_sec     Desired value for TCP MSL timeout (in seconds).
+*
+*               p_err                Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_TCP_ERR_NONE                TCP connection MSL successfully configured.
+*                                   NET_TCP_ERR_INVALID_ARG         Invalid MSL timeout.
+*
+* Return(s)   : DEF_OK,   TCP connection maximum retransmission timeout successfully configured.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : NetTCP_ConnCfgMSL_Timeout().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetTCP_ConnCfgMSL_TimeoutHandler() is called by network protocol suite function(s)
+*                   & MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetTCP_ConnCfgMSL_Timeout()  Note #2'.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN NetTCP_ConnCfgMSL_TimeoutHandler(NET_TCP_CONN_ID      conn_id_tcp,
+                                             NET_TCP_TIMEOUT_SEC  msl_timeout_sec,
+                                             NET_ERR             *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+
+                                                                /* ------------------- VALIDATE MLS ------------------- */
+#if (NET_TCP_CONN_TIMEOUT_MAX_SEG_MIN_SEC > 0)
+    if (msl_timeout_sec < NET_TCP_CONN_TIMEOUT_MAX_SEG_MIN_SEC) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+#if ((NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC < DEF_INT_08U_MAX_VAL)                                                                  || \
+    ((NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC < DEF_INT_16U_MAX_VAL) && (NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC > DEF_INT_08U_MAX_VAL)) || \
+    ((NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC < DEF_INT_32U_MAX_VAL) && (NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC > DEF_INT_16U_MAX_VAL)))
+    if (msl_timeout_sec > NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC) {
+       *p_err =  NET_TCP_ERR_INVALID_ARG;
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* ----------------- CFG TCP CONN MSL ----------------- */
+    p_conn                            = &NetTCP_ConnTbl[conn_id_tcp];
+    p_conn->TimeoutMaxSeg_sec         =  msl_timeout_sec;
+    p_conn->TimeoutMaxSeg_tick_scaled = (NET_TMR_TICK)p_conn->TimeoutMaxSeg_sec * NET_TMR_TIME_TICK_PER_SEC * NET_TCP_CONN_TIMEOUT_MAX_SEG_SCALAR;
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_ConnIsUsed()
+*
+* Description : Validate TCP connection in use.
+*
+* Argument(s) : conn_id_tcp     Handle identifier of TCP connection to validate.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP connection successfully validated as
+*                                                                   in use.
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN        Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED       TCP connection NOT currently used.
+*
+* Return(s)   : DEF_YES, TCP connection   valid &      in use.
+*
+*               DEF_NO,  TCP connection invalid or NOT in use.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s) [see also Note #1].
+*
+* Note(s)     : (1) NetTCP_ConnIsUsed() blocked until network initialization completes.
+*
+*               (2) NetTCP_ConnIsUsed() MUST be called with the global network lock already acquired.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetTCP_ConnIsUsed (NET_TCP_CONN_ID   conn_id_tcp,
+                                NET_ERR          *p_err)
+{
+    NET_TCP_CONN  *p_conn;
+    CPU_BOOLEAN    used;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit (see Note #1).            */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        return (DEF_NO);
+    }
+#endif
+
+                                                                /* --------------- VALIDATE TCP CONN ID --------------- */
+    if (conn_id_tcp < NET_TCP_CONN_ID_MIN) {
+       *p_err =  NET_TCP_ERR_INVALID_CONN;
+        return (DEF_NO);
+    }
+    if (conn_id_tcp > (NET_TCP_CONN_QTY)NET_TCP_CONN_ID_MAX) {
+       *p_err =  NET_TCP_ERR_INVALID_CONN;
+        return (DEF_NO);
+    }
+
+                                                                /* -------------- VALIDATE TCP CONN USED -------------- */
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+    used  =  DEF_BIT_IS_SET(p_conn->Flags, NET_TCP_FLAG_USED);
+    if (used != DEF_YES) {
+       *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+        return (DEF_NO);
+    }
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (DEF_YES);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_ConnPoolStatGet()
+*
+* Description : Get TCP connection statistics pool.
+*
+* Argument(s) : none.
+*
+* Return(s)   : TCP connection statistics pool, if NO error(s).
+*
+*               NULL           statistics pool, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) NetTCP_ConnPoolStatGet() blocked until network initialization completes; return NULL
+*                   statistics pool.
+*********************************************************************************************************
+*/
+
+NET_STAT_POOL  NetTCP_ConnPoolStatGet (void)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    NET_ERR        err;
+#endif
+    NET_STAT_POOL  stat_pool;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        NetStat_PoolClr(&stat_pool, &err);
+        return (stat_pool);                                     /* ... rtn NULL stat pool (see Note #1).                */
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    stat_pool = NetTCP_ConnPoolStat;
+    CPU_CRITICAL_EXIT();
+
+    return (stat_pool);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_ConnPoolStatResetMaxUsed()
+*
+* Description : Reset TCP connection's statistics pool's maximum number of entries used.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) NetTCP_ConnPoolStatResetMaxUsed() blocked until network initialization completes.
+*
+*                   (a) However, since 'NetTCP_ConnPoolStat' is reset when network initialization
+*                       completes; NO error is returned.
+*********************************************************************************************************
+*/
+
+void  NetTCP_ConnPoolStatResetMaxUsed (void)
+{
+    NET_ERR  err;
+
+
+                                                                /* Acquire net lock.                                    */
+    Net_GlobalLockAcquire((void *)&NetTCP_ConnPoolStatResetMaxUsed, &err);
+    if (err != NET_ERR_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        Net_GlobalLockRelease();
+        return;                                                 /* ... rtn w/o err (see Note #1a).                      */
+    }
+#endif
+
+
+    NetStat_PoolResetUsedMax(&NetTCP_ConnPoolStat, &err);       /* Reset TCP conn stat pool.                            */
+
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_ConnStateGet()
+*
+* Description : Retrieve the TCP Connection State.
+*
+* Argument(s) : conn_id     TCP Connection ID number.
+*
+* Return(s)   : TCP Connection State.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_TCP_CONN_STATE  NetTCP_ConnStateGet (NET_TCP_CONN_ID  conn_id)
+{
+    NET_TCP_CONN        *p_conn_tcp;
+    NET_TCP_CONN_STATE   state;
+    NET_ERR              err;
+
+
+                                                                /* Acquire net lock.                                    */
+    Net_GlobalLockAcquire((void *)&NetTCP_ConnStateGet, &err);
+    if (err != NET_ERR_NONE) {
+        return (NET_TCP_CONN_STATE_NONE);
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, return                         */
+        Net_GlobalLockRelease();
+        return (NET_TCP_CONN_STATE_NONE);
+    }
+#endif
+
+    p_conn_tcp  = &NetTCP_ConnTbl[conn_id];
+    state       =  p_conn_tcp->ConnState;                       /* Get TCP Connection State.                            */
+
+
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (state);
+}
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as TCP protocol.
+*
+* Argument(s) : p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                Received buffer's TCP header validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT TCP.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetTCP_RxPktValidateBuf (NET_BUF_HDR  *p_buf_hdr,
+                                       NET_ERR      *p_err)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  valid;
+    NET_ERR      err;
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* --------------- VALIDATE TCP BUF HDR --------------- */
+    if (!((p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_TCP_V4) ||
+          (p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_TCP_V6))) {
+        if_nbr = p_buf_hdr->IF_Nbr;
+        valid  = NetIF_IsValidHandler(if_nbr, &err);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxInvalidProtocolCtr);
+        }
+       *p_err = NET_ERR_INVALID_PROTOCOL;
+        return;
+    }
+
+    if (p_buf_hdr->TransportHdrIx == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxInvalidBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_RxPktValidate()
+*
+* Description : (1) Validate received TCP packet :
+*
+*                   (a) Get TCP packet RTT timestamp received               See 'NetTCP_TxConnRTT_RTO_Calc()
+*                                                                                   Note #2a2A2'
+*
+*                   (b) (1) Validate the received packet's following TCP header fields :
+*
+*                           (A) Source      Port
+*                           (B) Destination Port
+*                           (C) Header  Length
+*                           (D) Segment Length                              See Note #4
+*                           (E) Flags
+*                           (F) Check-Sum                                   See Note #5
+*                           (G) Options
+*
+*                       (2) Validation ignores the following TCP header fields :
+*
+*                           (A) Sequence        Number
+*                           (B) Acknowledgement Number
+*                           (C) Window Advertisement
+*                           (D) Urgent Pointer                              See 'net_tcp.c  Note #1b'
+*
+*                   (c) Convert the following TCP header fields from network-order to host-order :
+*
+*                       (1) Source      Port                                See Note #1cB1
+*                       (2) Destination Port                                See Note #1cB2
+*                       (3) Sequence        Number                          See Note #1cB3
+*                       (4) Acknowledgement Number                          See Note #1cB4
+*                       (5) Header Length/Flags                             See Note #1cB5
+*                       (6) Window Advertisement                            See Note #1cB6
+*                       (7) Check-Sum                                       See Note #4f
+*                       (8) Urgent Pointer                                  See 'net_tcp.c  Note #1b'
+*
+*                           (A) These fields are NOT converted directly in the received packet buffer's
+*                               data area but are converted in local or network buffer variables ONLY.
+*
+*                           (B) The following TCP header fields are converted & stored in network buffer
+*                               variables :
+*
+*                               (1) Source      Port
+*                               (2) Destination Port
+*                               (3) Sequence        Number
+*                               (4) Acknowledgement Number
+*                               (5) Header Length/Flags
+*                               (6) Window Advertisement
+*
+*                   (d) Update network buffer's protocol controls
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_tcp_hdr    Pointer to received packet's TCP header.
+*               --------    Argument validated in NetTCP_Rx()/NetTCP_RxPktValidateBuf().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                Received packet validated.
+*                               NET_TCP_ERR_INVALID_PORT_NBR    Invalid TCP port number.
+*                               NET_TCP_ERR_INVALID_LEN_HDR     Invalid TCP header  length.
+*                               NET_TCP_ERR_INVALID_LEN_SEG     Invalid TCP segment length.
+*                               NET_TCP_ERR_INVALID_LEN_DATA    Invalid TCP data    length.
+*                               NET_TCP_ERR_INVALID_FLAG        Invalid TCP flags.
+*                               NET_TCP_ERR_INVALID_CHK_SUM     Invalid TCP check-sum.
+*
+*                                                               - RETURNED BY NetTCP_RxPktValidateOpt() : -
+*                               NET_TCP_ERR_INVALID_OPT_LEN     Invalid TCP option length.
+*                               NET_TCP_ERR_INVALID_OPT_END     Invalid TCP option list ending.
+*                               NET_TCP_ERR_INVALID_OPT_NBR     Invalid TCP option number of same option.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_Rx().
+*
+* Note(s)     : (2) See 'net_tcp.h  TCP HEADER' for TCP header format.
+*
+*               (3) The following TCP header fields MUST be decoded &/or converted from network-order to host-
+*                   order BEFORE any TCP Reset Segments are transmitted (see 'NetTCP_TxConnReset()  Note #2') :
+*
+*                   (a) Sequence        Number
+*                   (b) Acknowledgement Number
+*                   (c) Segment Length
+*
+*               (4) Since TCP segment headers do NOT contain a segment length field, the TCP Segment Length
+*                   is assumed to be the remaining IP Datagram Length.
+*
+*               (5) (a) TCP header Check-Sum field MUST be validated BEFORE (or AFTER) any multi-octet words
+*                       are converted from network-order to host-order since "the sum of 16-bit integers can
+*                       be computed in either byte order" [RFC #1071, Section 2.(B)].
+*
+*                       In other words, the TCP Segment Check-Sum CANNOT be validated AFTER SOME but NOT ALL
+*                       multi-octet words have been converted from network-order to host-order.
+*
+*                   (b) However, ALL received packets' multi-octet words are converted in local or network
+*                       buffer variables ONLY (see Note #1cA).  Therefore, TCP Segment Check-Sum may be
+*                       validated at any point.
+*
+*                   (c) The TCP Segment Check-Sum MUST be validated AFTER the TCP segment length has been
+*                       validated so that the total TCP Segment Length (in octets) will already be calculated
+*                       for the TCP Check-Sum calculation.
+*
+*                       For efficiency, the TCP Segment Check-Sum is validated AFTER all other TCP header
+*                       fields have been validated.  Thus the iteration-intensive TCP Segment Check-Sum is
+*                       calculated only after all other TCP header fields have been quickly validated.
+*
+*                   (d) (1) In addition to the TCP segment header & data, the TCP Check-Sum calculation
+*                           includes "a 96-bit pseudo header conceptually prefixed to the TCP header ...
+*                           [which] contains the Source Address, the Destination Address, the Protocol,
+*                           and TCP length" (see RFC #793, Section 3.1 'Header Format : Checksum').
+*
+*                       (2) Since network check-sum functions REQUIRE that 16-bit one's-complement check-
+*                           sum calculations be performed on headers & data arranged in network-order (see
+*                           'net_util.c  NetUtil_16BitOnesCplChkSumDataVerify()  Note #4'), TCP pseudo-header
+*                           values MUST be set or converted to network-order.
+*
+*                   (e) RFC #793, Section 3.1 'Header Format : Checksum' specifies that "if a segment contains
+*                       an odd number of header and text octets ... the last octet is padded ... with zeros to
+*                       form a 16-bit word for checksum purposes".
+*
+*                       See also 'net_util.c  NetUtil_16BitSumDataCalc()  Note #8'.
+*
+*                   (f) After the TCP Segment Check-Sum is validated, it is NOT necessary to convert the Check-
+*                       Sum from network-order to host-order since    it is NOT required for further processing.
+*
+*               (6) (a) Since the minimum network buffer size MUST be configured such that the entire TCP
+*                       header MUST be received in a single packet (see 'net_buf.h  NETWORK BUFFER INDEX &
+*                       SIZE DEFINES  Note #1c'), after the TCP header size is decremented from the first
+*                       packet buffer's remaining number of data octets, any remaining octets MUST be user
+*                       &/or application data octets.
+*
+*                       (1) Note that the 'Data' index is updated regardless of a null-size data length.
+*
+*                   (b) If additional packet buffers exist, the remaining IP datagram 'Data' MUST be user
+*                       &/or application data.  Therefore, the 'Data' length does NOT need to be adjusted
+*                       but the 'Data' index MUST be updated.
+*
+*                   (c) #### Total TCP Segment Length & Data Length is duplicated in ALL fragmented packet
+*                       buffers (may NOT be necessary; remove if unnecessary).
+*
+*               (7) (a) RFC #1122, Section 4.2.2.5 states that "[a] TCP MUST be prepared to handle an
+*                       illegal option length (e.g., zero) without crashing; a suggested procedure is
+*                       to reset the connection".  However, NO RFC specifies how TCP should handle
+*                       received segments with any other invalid TCP option fields.
+*
+*                       Therefore, it seems reasonable & is assumed that ALL TCP segments with ANY
+*                       invalid TCP option fields SHOULD transmit a TCP reset segment.
+*
+*                   (b) RFC #1122, Sections 3.2.1 & 3.2.2 require that IP & ICMP packets with certain
+*                       invalid header fields be "silently discarded".  However, NO RFC specifies how
+*                       TCP should handle received segments with invalid header fields.
+*
+*                       Therefore, it seems reasonable & is assumed that ALL TCP segments with ANY
+*                       invalid header fields [other than invalid TCP option fields (see Note #7a)]
+*                       SHOULD be silently discarded.
+*
+*               (8) (a) RFC #1122, Section 3.2.1.8 states that "all IP options ... received in datagrams
+*                       MUST be passed to the transport layer ... [which] MUST ... interpret those IP
+*                       options that they understand and silently ignore the others".
+*
+*                   (b) RFC #1122, Section 4.2.3.8 reiterates that "when received options are passed up
+*                       to TCP from the IP layer, TCP MUST ignore options that it does not understand".
+*
+*                       NOT currently implemented. #### NET-814
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktValidate (NET_BUF      *p_buf,
+                                    NET_BUF_HDR  *p_buf_hdr,
+                                    NET_TCP_HDR  *p_tcp_hdr,
+                                    NET_ERR      *p_err)
+{
+#if (( defined(NET_IPv4_MODULE_EN)) && \
+     (!defined(NET_TCP_CHK_SUM_OFFLOAD_RX)))
+    NET_TCP_PSEUDO_HDR   tcp_pseudo_hdrv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_PSEUDO_HDR  tcp_pseudo_hdrv6;
+#endif
+    CPU_INT08U           tcp_hdr_len_tot;
+    CPU_INT16U           tcp_hdr_len;
+    CPU_INT16U           tcp_tot_len;
+    CPU_INT16U           tcp_data_len;
+    NET_TCP_HDR_FLAGS    tcp_flags;
+    CPU_BOOLEAN          tcp_flags_reserved;
+    CPU_BOOLEAN          tcp_chk_sum_valid;
+    CPU_BOOLEAN          tcp_chk_sum_ipv6;
+    NET_BUF             *p_buf_next;
+    NET_BUF_HDR         *p_buf_next_hdr;
+    NET_ERR              err;
+
+
+
+                                                                /* ---------------- GET TCP RTT RX TS ----------------- */
+    p_buf_hdr->TCP_RTT_TS_Rxd_ms = (NET_TCP_TX_RTT_TS_MS)NetUtil_TS_Get_ms();
+
+
+
+                                                                /* ---------------- VALIDATE TCP PORTS ---------------- */
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->TransportPortSrc,  &p_tcp_hdr->PortSrc);
+    if (p_buf_hdr->TransportPortSrc  == NET_TCP_PORT_NBR_RESERVED) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrPortSrcCtr);
+       *p_err = NET_TCP_ERR_INVALID_PORT_NBR;
+        return;
+    }
+
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->TransportPortDest, &p_tcp_hdr->PortDest);
+    if (p_buf_hdr->TransportPortDest == NET_TCP_PORT_NBR_RESERVED) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrPortDestCtr);
+       *p_err = NET_TCP_ERR_INVALID_PORT_NBR;
+        return;
+    }
+
+
+                                                                /* --------------- VALIDATE TCP HDR LEN --------------- */
+                                                                /* See 'net_tcp.h  TCP HEADER  Note #2'.                */
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->TCP_HdrLen_Flags, &p_tcp_hdr->HdrLen_Flags);
+    tcp_hdr_len    = (CPU_INT16U)(p_buf_hdr->TCP_HdrLen_Flags & NET_TCP_HDR_LEN_MASK);
+    tcp_hdr_len  >>=  NET_TCP_HDR_LEN_SHIFT;
+    if (tcp_hdr_len < NET_TCP_HDR_LEN_MIN) {                    /* If hdr len < min hdr len, rtn err.                   */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrLenCtr);
+       *p_err = NET_TCP_ERR_INVALID_LEN_HDR;
+        return;
+    }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (tcp_hdr_len > NET_TCP_HDR_LEN_MAX) {                    /* If hdr len > max hdr len, rtn err.                   */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrLenCtr);
+       *p_err = NET_TCP_ERR_INVALID_LEN_HDR;
+        return;
+    }
+#endif
+
+    tcp_hdr_len_tot = (CPU_INT08U)(tcp_hdr_len * NET_TCP_HDR_LEN_WORD_SIZE);
+
+
+
+                                                                /* ------------- VALIDATE TCP SEG TOT LEN ------------- */
+    tcp_tot_len                = p_buf_hdr->IP_DatagramLen;     /* See Note #4.                                         */
+    p_buf_hdr->TransportTotLen = tcp_tot_len;
+    if (p_buf_hdr->TransportTotLen < NET_TCP_TOT_LEN_MIN) {     /* If seg tot len < min tot len, rtn err.               */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrSegLenCtr);
+       *p_err = NET_TCP_ERR_INVALID_LEN_SEG;
+        return;
+    }
+    if (p_buf_hdr->TransportTotLen > NET_TCP_TOT_LEN_MAX) {     /* If seg tot len > max tot len, rtn err.               */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrSegLenCtr);
+       *p_err = NET_TCP_ERR_INVALID_LEN_SEG;
+        return;
+    }
+
+
+                                                                /* ---------------- VALIDATE TCP FLAGS ---------------- */
+                                                                /* See 'net_tcp.h  TCP HEADER  Note #2'.                */
+#if 1                                                           /* Allow invalid reserved flags for rx'd segs.          */
+    tcp_flags          = p_buf_hdr->TCP_HdrLen_Flags  & NET_TCP_HDR_FLAG_MASK;
+    tcp_flags_reserved = DEF_BIT_IS_SET_ANY(tcp_flags, NET_TCP_HDR_FLAG_RESERVED);
+    if (tcp_flags_reserved != DEF_NO) {                         /* If reserved flag bits set, rtn err.                  */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrFlagsCtr);
+       *p_err = NET_TCP_ERR_INVALID_FLAG;
+        return;
+    }
+#endif
+
+    p_buf_hdr->TCP_SegSync  = DEF_BIT_IS_SET(p_buf_hdr->TCP_HdrLen_Flags, NET_TCP_HDR_FLAG_SYNC );
+    p_buf_hdr->TCP_SegClose = DEF_BIT_IS_SET(p_buf_hdr->TCP_HdrLen_Flags, NET_TCP_HDR_FLAG_CLOSE);
+    p_buf_hdr->TCP_SegAck   = DEF_BIT_IS_SET(p_buf_hdr->TCP_HdrLen_Flags, NET_TCP_HDR_FLAG_ACK  );
+    p_buf_hdr->TCP_SegReset = DEF_BIT_IS_SET(p_buf_hdr->TCP_HdrLen_Flags, NET_TCP_HDR_FLAG_RESET);
+
+
+                                                                /* --------------- VALIDATE TCP CHK SUM --------------- */
+                                                                /* See Note #5.                                         */
+
+    tcp_chk_sum_ipv6 = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);
+    if (tcp_chk_sum_ipv6 == DEF_NO) {
+#ifdef NET_IPv4_MODULE_EN
+#ifdef NET_TCP_CHK_SUM_OFFLOAD_RX
+        tcp_chk_sum_valid = DEF_YES;
+#else
+                                                                /* Prepare TCP chk sum pseudo-hdr (see Note #5d).       */
+        tcp_pseudo_hdrv4.AddrSrc  = (NET_IPv4_ADDR)NET_UTIL_HOST_TO_NET_32(p_buf_hdr->IP_AddrSrc);
+        tcp_pseudo_hdrv4.AddrDest = (NET_IPv4_ADDR)NET_UTIL_HOST_TO_NET_32(p_buf_hdr->IP_AddrDest);
+        tcp_pseudo_hdrv4.Zero     = (CPU_INT08U )0x00u;
+        tcp_pseudo_hdrv4.Protocol = (CPU_INT08U )NET_IP_HDR_PROTOCOL_TCP;
+        tcp_pseudo_hdrv4.TotLen   = (CPU_INT16U )NET_UTIL_HOST_TO_NET_16(p_buf_hdr->TransportTotLen);
+
+        tcp_chk_sum_valid         =  NetUtil_16BitOnesCplChkSumDataVerify((void     *) p_buf,
+                                                                          (void     *)&tcp_pseudo_hdrv4,
+                                                                          (CPU_INT16U) NET_TCP_PSEUDO_HDR_SIZE,
+                                                                          (NET_ERR  *) p_err);
+#endif
+#else
+        tcp_chk_sum_valid = DEF_FAIL;
+#endif
+
+    } else {
+#ifdef NET_IPv6_MODULE_EN
+#ifdef NET_TCP_CHK_SUM_OFFLOAD_RX
+        tcp_chk_sum_valid = DEF_YES;
+#else
+        tcp_pseudo_hdrv6.AddrSrc          = p_buf_hdr->IPv6_AddrSrc;
+        tcp_pseudo_hdrv6.AddrDest         = p_buf_hdr->IPv6_AddrDest;
+        tcp_pseudo_hdrv6.UpperLayerPktLen = (CPU_INT32U)NET_UTIL_HOST_TO_NET_32(p_buf_hdr->TransportTotLen);
+        tcp_pseudo_hdrv6.Zero             = (CPU_INT16U)0x00u;
+        tcp_pseudo_hdrv6.NextHdr          = (CPU_INT16U)NET_UTIL_NET_TO_HOST_16(NET_IP_HDR_PROTOCOL_TCP);
+        tcp_chk_sum_valid                 = NetUtil_16BitOnesCplChkSumDataVerify((void     *) p_buf,
+                                                                                 (void     *)&tcp_pseudo_hdrv6,
+                                                                                 (CPU_INT16U) NET_IPv6_PSEUDO_HDR_SIZE,
+                                                                                 (NET_ERR  *) p_err);
+#endif
+#else
+        tcp_chk_sum_valid = DEF_FAIL;
+#endif
+    }
+
+    if (tcp_chk_sum_valid != DEF_OK) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrChkSumCtr);
+       *p_err = NET_TCP_ERR_INVALID_CHK_SUM;
+        return;
+    }
+#if 0                                                           /* See Note #5f.                                        */
+   (void)NET_UTIL_VAL_GET_NET_16(&p_tcp_hdr->ChkSum);
+#endif
+
+
+                                                                /* ---------------- UDPATE TCP FIELDS ----------------- */
+                                                                /* See Notes #1c & #3.                                  */
+    NET_UTIL_VAL_COPY_GET_NET_32(&p_buf_hdr->TCP_SeqNbr,  &p_tcp_hdr->SeqNbr);
+    NET_UTIL_VAL_COPY_GET_NET_32(&p_buf_hdr->TCP_AckNbr,  &p_tcp_hdr->AckNbr);
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->TCP_WinSize, &p_tcp_hdr->WinSize);
+
+    p_buf_hdr->TransportHdrLen  = tcp_hdr_len_tot;
+    tcp_data_len                = tcp_tot_len - p_buf_hdr->TransportHdrLen;
+    p_buf_hdr->TransportDataLen = tcp_data_len;
+    p_buf_hdr->TCP_SegLenInit   = p_buf_hdr->TransportDataLen;
+    p_buf_hdr->TCP_SegLen       = p_buf_hdr->TCP_SegLenInit;
+
+
+                                                                /* ---------------- VALIDATE TCP OPTS ----------------- */
+    if (tcp_hdr_len_tot > NET_TCP_HDR_SIZE_MIN) {               /* If hdr len > min, validate/process TCP opts.         */
+        NetTCP_RxPktValidateOpt(p_buf_hdr, p_tcp_hdr, tcp_hdr_len_tot, p_err);
+        if (*p_err != NET_TCP_ERR_NONE) {                       /* If any TCP opt err(s), ...                           */
+             NetTCP_TxConnReset((NET_TCP_CONN     *) 0,         /* ... tx TCP conn reset (see Note #7a).                */
+                                (NET_BUF_HDR      *) p_buf_hdr,
+                                (NET_TCP_RESET_CODE) NET_TCP_CONN_TX_RESET,
+                                (NET_TCP_CLOSE_CODE) NET_TCP_CONN_CLOSE_ALL,
+                                (NET_ERR          *)&err);
+             return;
+        }
+    }
+
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+                                                                /* Calc TCP data len/ix (see Note #6a).                 */
+#if 0                                                           /* See Note #3c.                                        */
+    p_buf_hdr->TransportHdrLen = tcp_hdr_len_tot;
+#endif
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_buf_hdr->TransportHdrLen > tcp_tot_len) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrDataLenCtr);
+       *p_err = NET_TCP_ERR_INVALID_LEN_DATA;
+        return;
+    }
+    if (p_buf_hdr->TransportHdrLen > p_buf_hdr->DataLen) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrDataLenCtr);
+       *p_err = NET_TCP_ERR_INVALID_LEN_DATA;
+        return;
+    }
+#endif
+#if 0                                                           /* See Note #3c.                                        */
+    tcp_data_len               =  tcp_tot_len - p_buf_hdr->TransportHdrLen;
+    p_buf_hdr->TransportDataLen =  tcp_data_len;
+    p_buf_hdr->TCP_SegLenInit   =  p_buf_hdr->TransportDataLen;
+    p_buf_hdr->TCP_SegLen       =  p_buf_hdr->TCP_SegLenInit;
+#endif
+    p_buf_hdr->TCP_SegLenData   =  p_buf_hdr->TCP_SegLenInit;
+    p_buf_hdr->TCP_SeqNbrInit   =  p_buf_hdr->TCP_SeqNbr;
+
+    p_buf_hdr->DataLen         -= (NET_BUF_SIZE) p_buf_hdr->TransportHdrLen;
+    p_buf_hdr->DataIx           = (CPU_INT16U  )(p_buf_hdr->TransportHdrIx + p_buf_hdr->TransportHdrLen);
+    p_buf_hdr->ProtocolHdrType  =  NET_PROTOCOL_TYPE_APP;
+
+    p_buf_next = p_buf_hdr->NextBufPtr;
+    while (p_buf_next != DEF_NULL) {                            /* Calc ALL pkt bufs' data len/ix    (see Note #6b).    */
+        p_buf_next_hdr                   = &p_buf_next->Hdr;
+        p_buf_next_hdr->DataIx           =  p_buf_next_hdr->TransportHdrIx;
+        p_buf_next_hdr->TransportHdrLen  =  0u;                 /* NULL TCP hdr  len in each pkt buf.                   */
+        p_buf_next_hdr->TransportTotLen  =  tcp_tot_len;        /* Dup  TCP tot  len & ...                              */
+        p_buf_next_hdr->TransportDataLen =  tcp_data_len;       /* ...      data len in each pkt buf (see Note #6c).    */
+        p_buf_next_hdr->TCP_SegLenInit   =  p_buf_next_hdr->TransportDataLen;
+        p_buf_next_hdr->TCP_SegLen       =  p_buf_next_hdr->TCP_SegLenInit;
+        p_buf_next_hdr->TCP_SegLenData   =  p_buf_next_hdr->TCP_SegLenInit;
+        p_buf_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_APP;
+        p_buf_next                       =  p_buf_next_hdr->NextBufPtr;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_RxPktValidateOpt()
+*
+* Description : Validate & process received packet's TCP options.
+*
+* Argument(s) : p_buf_hdr            Pointer to network buffer header that received TCP packet.
+*               --------            Argument validated in NetTCP_Rx().
+*
+*               p_tcp_hdr            Pointer to received packet's TCP header.
+*               --------            Argument validated in NetTCP_Rx()/NetTCP_RxPktValidateBuf().
+*
+*               tcp_hdr_len_size    Length  of received packet's TCP header.
+*               ----------------    Argument validated in NetTCP_RxPktValidate().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP options validated & processed.
+*                               NET_TCP_ERR_INVALID_OPT_LEN     Invalid TCP option length.
+*                               NET_TCP_ERR_INVALID_OPT_END     Invalid TCP option list ending.
+*                               NET_TCP_ERR_INVALID_OPT_NBR     Invalid TCP option number of same option.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktValidate().
+*
+* Note(s)     : (1) (a) See 'net_tcp.h  TCP HEADER OPTIONS DEFINES' for   supported TCP options' summary.
+*
+*                   (b) See 'net_tcp.c  Note #1c'                   for unsupported TCP options.
+*
+*                       See also Note #2b3.
+*
+*               (2) (a) RFC # 793, Section 3.1 'Options' states that each option is "a multiple of 8 bits
+*                       in length" and "may begin on any octet boundary".
+*
+*                       (1) Since TCP options are NOT required or guaranteed to align multi-octet words on
+*                           appropriate word boundaries, ALL TCP options are decoded & processed a single
+*                           octet at a time.
+*
+*                   (b) RFC #1122, Section 4.2.2.5 states that :
+*
+*                       (1) "A TCP MUST be able to receive a TCP option in any segment."
+*
+*                       (2) "A TCP MUST ignore without error any TCP option it does not implement, assuming
+*                            that the option has a field length" ...
+*
+*                       (3) "All TCP options defined in the future will have length fields."
+*
+*                       See also 'net_tcp.h  TCP HEADER OPTIONS DEFINES  Note #2b'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktValidateOpt (NET_BUF_HDR  *p_buf_hdr,
+                                       NET_TCP_HDR  *p_tcp_hdr,
+                                       CPU_INT08U    tcp_hdr_len_size,
+                                       NET_ERR      *p_err)
+{
+    CPU_INT08U   *p_opts;
+    CPU_INT08U    opt_list_len_size;
+    CPU_INT08U    opt_list_len_rem;
+    CPU_INT08U    opt_len;
+    CPU_INT08U    opt_nbr_max_seg_size;
+    CPU_BOOLEAN   opt_err;
+    CPU_BOOLEAN   opt_list_end;
+
+
+    opt_list_len_size = tcp_hdr_len_size - NET_TCP_HDR_SIZE_MIN;/* Calc opt list len size.                              */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------- VALIDATE TCP HDR OPT LIST SIZE ---------- */
+    if (opt_list_len_size > NET_TCP_HDR_OPT_SIZE_MAX) {         /* If tot opt len > max opt size, ...                   */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrOptsCtr);
+       *p_err = NET_TCP_ERR_INVALID_OPT_LEN;                    /* ... rtn err.                                         */
+        return;
+    }
+
+    if ((opt_list_len_size % NET_TCP_HDR_OPT_SIZE_WORD) != 0u) {/* If tot opt len NOT multiple of opt size, ...         */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrOptsCtr);
+       *p_err = NET_TCP_ERR_INVALID_OPT_LEN;                    /* ... rtn err.                                         */
+        return;
+    }
+#endif
+
+
+                                                                /* ------------- DECODE/VALIDATE TCP OPTS ------------- */
+    opt_err              =  DEF_NO;
+    opt_list_end         =  DEF_NO;
+    opt_nbr_max_seg_size =  0u;
+
+    p_opts                = (CPU_INT08U *)&p_tcp_hdr->Opts[0];
+    opt_list_len_rem     =  opt_list_len_size;
+
+    while (opt_list_len_rem > 0) {                              /* Process each opt in list (see Notes #1 & #2).        */
+        switch (*p_opts) {
+            case NET_TCP_HDR_OPT_END_LIST:                      /* ------------------- END OPT LIST ------------------- */
+                 opt_list_end = DEF_YES;                        /* Mark end of opt list.                                */
+                 opt_len      = NET_TCP_HDR_OPT_LEN_END_LIST;
+                 break;
+
+
+            case NET_TCP_HDR_OPT_NOP:                           /* --------------------- NOP OPT ---------------------- */
+#if 1                                                           /* NOP's invalid after END.                             */
+                 if (opt_list_end != DEF_NO) {                  /* If opt found AFTER end of opt list, rtn err.         */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrOptsCtr);
+                    *p_err = NET_TCP_ERR_INVALID_OPT_END;
+                     return;
+                 }
+#endif
+                 opt_len = NET_TCP_HDR_OPT_LEN_NOP;
+                 break;
+
+
+            case NET_TCP_HDR_OPT_MAX_SEG_SIZE:                  /* ----------------- MAX SEG SIZE OPT ----------------- */
+                 if (opt_list_end != DEF_NO) {                  /* If opt found AFTER end of opt list, rtn err.         */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrOptsCtr);
+                    *p_err = NET_TCP_ERR_INVALID_OPT_END;
+                     return;
+                 }
+                 if (opt_nbr_max_seg_size > 0) {                /* If > 1 max seg size opt,            rtn err.         */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrOptsCtr);
+                    *p_err = NET_TCP_ERR_INVALID_OPT_NBR;
+                     return;
+                 }
+                 opt_nbr_max_seg_size++;
+
+                 opt_err = NetTCP_RxPktValidateOptMaxSegSize(p_buf_hdr, p_opts, &opt_len, p_err);
+                 break;
+                                                                /* --------------- UNSUPPORTED TCP OPTS --------------- */
+                                                                /* See Notes #1b & #2b2.                                */
+            case NET_TCP_HDR_OPT_WIN_SCALE:
+            case NET_TCP_HDR_OPT_SACK_PERMIT:
+            case NET_TCP_HDR_OPT_SACK:
+            case NET_TCP_HDR_OPT_ECHO_REQ:
+            case NET_TCP_HDR_OPT_ECHO_REPLY:
+            case NET_TCP_HDR_OPT_TS:
+            default:                                            /* ----------------- INVALID TCP OPTS ----------------- */
+                 opt_len = *(p_opts + 1);                       /* Ignore unknown opts      (see Note #2b2).            */
+                 if (opt_len < NET_TCP_HDR_OPT_LEN_MIN_LEN) {   /* If opt len < min opt len (see Note #2b3), rtn err.   */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrOptsCtr);
+                    *p_err = NET_TCP_ERR_INVALID_OPT_LEN;
+                     return;
+                 }
+                 break;
+        }
+
+        if (opt_err != DEF_NO) {                                /* If ANY opt errs,               rtn err.              */
+            return;
+        }
+
+        if (opt_len > opt_list_len_rem) {                       /* If opt len > rem opt list len, rtn err.              */
+            NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrOptsCtr);
+           *p_err = NET_TCP_ERR_INVALID_OPT_LEN;
+            return;
+        }
+
+        opt_list_len_rem -= opt_len;
+        p_opts            += opt_len;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_RxPktValidateOptMaxSegSize()
+*
+* Description : Validate & process received TCP Maximum Segment Size option.
+*
+* Argument(s) : p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_opt        Pointer to Maximum Segment Size option.
+*               ----        Argument validated in NetTCP_RxPktValidateOpt().
+*
+*               p_opt_len    Pointer to variable that will receive the TCP option length (in octets).
+*               --------    Argument validated in NetTCP_RxPktValidateOpt().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP option validated & processed.
+*                               NET_TCP_ERR_INVALID_OPT_LEN     Invalid TCP option length.
+*
+* Return(s)   : DEF_NO,  NO Maximum Segment Size option error.
+*
+*               DEF_YES, otherwise.
+*
+* Caller(s)   : NetTCP_RxPktValidateOpt().
+*
+* Note(s)     : (1) See 'net_tcp.h  TCP HEADER OPTIONS DEFINES  Note #2b1' for TCP Maximum Segment Size
+*                   option summary.
+*
+*               (2) (a) RFC # 793, Section 3.1 'Options' states that each option is "a multiple of 8 bits
+*                       in length" and "may begin on any octet boundary".
+*
+*                   (b) Since TCP options are NOT required or guaranteed to align multi-octet words on
+*                       appropriate word boundaries, ALL TCP options are decoded & processed a single
+*                       octet at a time.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetTCP_RxPktValidateOptMaxSegSize (NET_BUF_HDR  *p_buf_hdr,
+                                                        CPU_INT08U   *p_opt,
+                                                        CPU_INT08U   *p_opt_len,
+                                                        NET_ERR      *p_err)
+{
+    NET_TCP_SEG_SIZE  max_seg_size;
+
+
+   *p_opt_len = NET_TCP_HDR_OPT_LEN_MAX_SEG_SIZE;
+
+    p_opt++;
+    if (*p_opt != *p_opt_len) {                                 /* If opt len != max seg size opt len, rtn err.         */
+         NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrOptsCtr);
+        *p_err  = NET_TCP_ERR_INVALID_OPT_LEN;
+         return (DEF_YES);
+    }
+
+                                                                /* Calc max seg size (see Note #2b).                    */
+    p_opt++;
+    max_seg_size   = *p_opt;
+    max_seg_size <<=  DEF_OCTET_NBR_BITS;
+    p_opt++;
+    max_seg_size  += *p_opt;
+
+    if (max_seg_size > NET_TCP_MAX_SEG_SIZE_MAX) {              /* If max seg size > max, rtn err.                      */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxHdrOptsCtr);
+       *p_err =  NET_TCP_ERR_INVALID_OPT_LEN;
+        return (DEF_YES);
+    }
+
+    p_buf_hdr->TCP_MaxSegSize = max_seg_size;
+
+   *p_err                     = NET_TCP_ERR_NONE;
+
+    return (DEF_NO);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_RxPktDemuxSeg()
+*
+* Description : (1) Demultiplex received packet to appropriate TCP connection :
+*
+*                   (a) Search connection list for connection whose local &/or remote addresses are
+*                       identical to the received packet's destination & source addresses.
+*
+*                   (b) Update network buffer's connection controls.
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                Received packet successfully demultiplexed
+*                                                                   to appropriate TCP connection.
+*                               NET_CONN_ERR_INVALID_FAMILY     Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_CONN       Invalid network connection number(s).
+*                               NET_ERR_RX_DEST                 Invalid destination; no connection available
+*                                                                   for received packet.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_Rx().
+*
+* Note(s)     : (2) The 'SRCH CONN LIST FOR PKT/CONN ADDR(S)' pre-processor 'else'-conditional code will
+*                   never be compiled/linked since 'net_conn.h' ensures that the family type configuration
+*                   constant (NET_CONN_CFG_FAMILY) is configured with an appropriate family type value
+*                   (see 'net_conn.h  CONFIGURATION ERRORS').  The 'else'-conditional code is included for
+*                   completeness & as an extra precaution in case 'net_conn.h' is incorrectly modified.
+*
+*               (3) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : CLOSED [State]' states
+*                       that "an incoming segment ... causes a RST to be sent in response".
+*
+*                   (b) RFC #792, Section 'Destination Unreachable Message : Description' states that
+*                       "if, in the destination host, the IP module cannot deliver the datagram because
+*                       the indicated ... process port is not active, the destination host may send a
+*                       destination unreachable message to the source host".
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktDemuxSeg (NET_BUF      *p_buf,
+                                    NET_BUF_HDR  *p_buf_hdr,
+                                    NET_ERR      *p_err)
+{
+    CPU_INT08U             addr_local[NET_CONN_ADDR_LEN_MAX];
+    CPU_INT08U             addr_remote[NET_CONN_ADDR_LEN_MAX];
+    NET_CONN_ADDR_LEN      addr_len          = 0;
+    NET_CONN_PROTOCOL_IX   protocol_ix       = NET_CONN_PROTOCOL_IX_NONE;
+    NET_CONN_FAMILY        family            = NET_CONN_FAMILY_NONE;
+    NET_CONN_ID            conn_id           = NET_CONN_ID_NONE;
+    NET_CONN_ID            conn_id_transport = NET_CONN_ID_NONE;
+    NET_CONN_ID            conn_id_app       = NET_CONN_ID_NONE;
+    NET_ERR                err;
+
+                                                                /* ------- SRCH CONN LIST FOR PKT/CONN ADDR(S) -------- */
+#ifdef  NET_IP_MODULE_EN
+    p_buf_hdr = &p_buf->Hdr;
+
+    Mem_Clr((void     *)&addr_local,
+            (CPU_SIZE_T) NET_CONN_ADDR_LEN_MAX);
+
+    Mem_Clr((void     *)&addr_remote,
+            (CPU_SIZE_T) NET_CONN_ADDR_LEN_MAX);
+
+    if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+        family      = NET_CONN_FAMILY_IP_V4_SOCK;
+        protocol_ix = NET_CONN_PROTOCOL_IX_IP_V4_TCP;
+                                                                /* Cfg srch local  addr as pkt dest addr.               */
+        NET_UTIL_VAL_COPY_SET_NET_16(&addr_local [NET_CONN_ADDR_IP_IX_PORT],    &p_buf_hdr->TransportPortDest);
+        NET_UTIL_VAL_COPY_SET_NET_32(&addr_local [NET_CONN_ADDR_IP_V4_IX_ADDR], &p_buf_hdr->IP_AddrDest);
+                                                                /* Cfg srch remote addr as pkt src  addr.               */
+        NET_UTIL_VAL_COPY_SET_NET_16(&addr_remote[NET_CONN_ADDR_IP_IX_PORT],    &p_buf_hdr->TransportPortSrc);
+        NET_UTIL_VAL_COPY_SET_NET_32(&addr_remote[NET_CONN_ADDR_IP_V4_IX_ADDR], &p_buf_hdr->IP_AddrSrc);
+
+        addr_len = NET_SOCK_ADDR_LEN_IP_V4;
+#endif
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        family      = NET_CONN_FAMILY_IP_V6_SOCK;
+        protocol_ix = NET_CONN_PROTOCOL_IX_IP_V6_TCP;
+                                                                /* Cfg srch local  addr as pkt dest addr.               */
+        NET_UTIL_VAL_COPY_SET_NET_16(&addr_local [NET_CONN_ADDR_IP_IX_PORT], &p_buf_hdr->TransportPortDest);
+        Mem_Copy(&addr_local [NET_CONN_ADDR_IP_V6_IX_ADDR], &p_buf_hdr->IPv6_AddrDest, NET_IPv6_ADDR_SIZE);
+                                                                /* Cfg srch remote addr as pkt src  addr.               */
+        NET_UTIL_VAL_COPY_SET_NET_16(&addr_remote[NET_CONN_ADDR_IP_IX_PORT], &p_buf_hdr->TransportPortSrc);
+        Mem_Copy(&addr_remote[NET_CONN_ADDR_IP_V6_IX_ADDR], &p_buf_hdr->IPv6_AddrSrc, NET_IPv6_ADDR_SIZE);
+
+        addr_len = NET_SOCK_ADDR_LEN_IP_V6;
+#endif
+    }
+#else                                                           /* See Note #2.                                         */
+   *p_err = NET_CONN_ERR_INVALID_FAMILY;
+    return;
+#endif
+
+
+    conn_id = NetConn_Srch(family,                              /* Srch for TCP conn.                                   */
+                           protocol_ix,
+                          &addr_local[0],
+                          &addr_remote[0],
+                           addr_len,
+                          &conn_id_transport,
+                          &conn_id_app,
+                          &err);
+    switch (err) {
+        case NET_CONN_ERR_CONN_FULL:                            /* Complete TCP conn found.                             */
+             p_buf_hdr->ConnType = NET_CONN_TYPE_CONN_FULL;
+             break;
+
+
+        case NET_CONN_ERR_CONN_HALF:                            /* Half     TCP conn found.                             */
+        case NET_CONN_ERR_CONN_HALF_WILDCARD:
+             p_buf_hdr->ConnType = NET_CONN_TYPE_CONN_HALF;
+             break;
+
+
+        case NET_CONN_ERR_CONN_NONE:                            /* If NO    TCP conn found;                 ...         */
+        case NET_CONN_ERR_CONN_FULL_WILDCARD:
+        case NET_CONN_ERR_INVALID_FAMILY:
+        case NET_CONN_ERR_INVALID_PROTOCOL_IX:
+        case NET_CONN_ERR_INVALID_ADDR:
+        case NET_CONN_ERR_INVALID_ADDR_LEN:
+        default:
+             NetTCP_TxConnReset(DEF_NULL,                       /* ... tx TCP  conn reset   (see Note #3a), ...         */
+                                p_buf_hdr,
+                                NET_TCP_CONN_TX_RESET,
+                                NET_TCP_CONN_CLOSE_ALL,
+                               &err);
+             if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_ICMPv4_MODULE_EN
+                 NetICMPv4_TxMsgErr(p_buf,                      /* ... tx ICMP port unreach (see Note #3b), ...         */
+                                    NET_ICMPv4_MSG_TYPE_DEST_UNREACH,
+                                    NET_ICMPv4_MSG_CODE_DEST_PORT,
+                                    NET_ICMPv4_MSG_PTR_NONE,
+                                   &err);
+#endif
+             } else {
+#ifdef  NET_IPCMPv6_MODULE_EN
+                 NetICMPv6_TxMsgErr(p_buf,                      /* ... tx ICMP port unreach (see Note #3b), ...         */
+                                    NET_ICMPv6_MSG_TYPE_DEST_UNREACH,
+                                    NET_ICMPv6_MSG_CODE_DEST_PORT_UNREACHABLE,
+                                    NET_ICMPv6_MSG_PTR_NONE,
+                                   &err);
+#endif
+             }
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxDestCtr);
+            *p_err = NET_ERR_RX_DEST;                           /* ... & rtn dest err.                                  */
+             return;
+    }
+
+
+                                                                /* -------------- UPDATE BUF CONN CTRLS --------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (conn_id           == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_INVALID_CONN;
+        return;
+    }
+    if (conn_id_transport == NET_CONN_ID_NONE) {
+       *p_err = NET_CONN_ERR_INVALID_CONN;
+        return;
+    }
+#endif
+
+    p_buf_hdr->Conn_ID           = conn_id;
+    p_buf_hdr->Conn_ID_Transport = conn_id_transport;
+    p_buf_hdr->Conn_ID_App       = conn_id_app;
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_RxPktConnHandler()
+*
+* Description : (1) Handle received TCP packets for its TCP connection :
+*
+*                   (a) Demultiplex  TCP packet to appropriate TCP connection state handler
+*                   (b) Free/Discard TCP packet
+*                   (c) Update receive statistics                                           See Note #2
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid
+*                                                                       data queued for later processing.
+*                               NET_TCP_ERR_CONN_RESET_VALID        Received reset segment successfully handled;
+*                                                                       i.e. the TCP connection was reset.
+*                               NET_TCP_ERR_CONN_CLOSED             TCP connection successfully closed.
+*
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*
+*                                                                   ---- RETURNED BY NetTCP_ConnIsUsed() : -----
+*                               NET_INIT_ERR_NOT_COMPLETED             Network initialization NOT complete.
+*                               NET_TCP_ERR_INVALID_CONN            Invalid TCP connection number.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*
+*                                                                   --- RETURNED BY NetTCP_RxPktDiscard() : ----
+*                               NET_ERR_RX                          Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_Rx().
+*
+* Note(s)     : (2) (a) SOME   TCP receive statistics already updated in NetTCP_RxPktDiscard(); do NOT
+*                       re-update.
+*
+*                   (b) Update TCP receive statistics even if any transitory transmit error(s) occur in
+*                       TCP connection state handler functions.
+*
+*               (3) RFC #1122, Section 4.2.2.13 states that "a host MAY implement a 'half-duplex' TCP
+*                   close sequence ... i.e., closed in only one direction, and a host is permitted to
+*                   continue sending data in the open direction on a half-closed connection".
+*
+*                   (a) "A host ... that has called CLOSE cannot continue to read data from the
+*                        connection.  If such a host issues a CLOSE call while received data is
+*                        still pending ... its TCP SHOULD send a RST to show that data was lost."
+*
+*                       However, since it does NOT seem reasonable to allow a half-closed connection
+*                       "to continue sending data in the open direction" (i.e. from the host that did
+*                       NOT issue a CLOSE call) but prevent the receiving host (i.e. the host that DID
+*                       issue the CLOSE call) from receiving the transmitted data; it is assumed that
+*                       the host that issued the CLOSE call MUST be allowed to receive data transmitted
+*                       from the other host that has NOT yet issued its CLOSE.
+*
+*                   (b) However, "if such a host issues a CLOSE call ... [and] new data is received
+*                       after CLOSE is called, its TCP SHOULD send a RST to show that data was lost".
+*
+*                       In other words, since a TCP connection in the connection-closing-data-available
+*                       state is closed to further TCP data or controls, a TCP reset segment is
+*                       transmitted as for the CLOSED state.
+*
+*                   (c) "Some systems have not implemented half-closed connections."
+*
+*               (4) Network buffer already freed by lower layer/handler function(s).
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandler (NET_BUF      *p_buf,
+                                       NET_BUF_HDR  *p_buf_hdr,
+                                       NET_ERR      *p_err)
+{
+    NET_TCP_CONN_ID   conn_id_tcp;
+    NET_TCP_CONN     *p_conn;
+    NET_ERR           err;
+
+
+    conn_id_tcp = (NET_TCP_CONN_ID)p_buf_hdr->Conn_ID_Transport;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* -------------- VALIDATE TCP CONN USED -------------- */
+   (void)NetTCP_ConnIsUsed(conn_id_tcp, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+#endif
+
+                                                                /* ------------ DEMUX TCP PKT TO TCP CONN ------------- */
+    p_conn = &NetTCP_ConnTbl[conn_id_tcp];
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_LISTEN:
+             NetTCP_RxPktConnHandlerListen(p_conn, p_buf, p_buf_hdr, p_err);
+
+             switch (*p_err) {
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                      NetTCP_RxPktFree(p_buf);
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_TCP_ERR_CONN_DATA_VALID'.  */
+
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxSegCompCtr);
+                      break;
+
+
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_ERR_TX:
+                 case NET_ERR_IF_LINK_DOWN:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                      NetTCP_RxPktDiscard(p_buf,&err);
+                     *p_err = NET_ERR_RX;
+                      return;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_SEQ_INVALID:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_CONN_RESET_INVALID:
+                 case NET_TCP_ERR_CONN_SEQ_FIN_INVALID:
+                 case NET_TCP_ERR_CONN_LISTEN_Q_MAX:
+                 case NET_TCP_ERR_INVALID_CONN_ID:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_CONN_ERR_NOT_USED:
+                 case NET_CONN_ERR_INVALID_CONN:
+                 case NET_CONN_ERR_INVALID_FAMILY:
+                 case NET_CONN_ERR_INVALID_ADDR:
+                 case NET_CONN_ERR_INVALID_ADDR_LEN:
+                 default:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+             NetTCP_RxPktConnHandlerSyncRxd(p_conn, p_buf, p_buf_hdr, p_err);
+
+             switch (*p_err) {
+                 case NET_TCP_ERR_CONN_RESET_VALID:
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                      NetTCP_RxPktFree(p_buf);
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_TCP_ERR_CONN_DATA_VALID'.  */
+
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxSegCompCtr);
+                      break;
+
+
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_RE_TX_SEG_TH:
+                 case NET_ERR_TX:                               /* Ignore transitory err(s)?                            */
+                 case NET_ERR_IF_LINK_DOWN:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                     *p_err = NET_ERR_RX;
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_CLOSE:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_SEQ_SYNC_INVALID:
+                 case NET_TCP_ERR_CONN_SEQ_INVALID:
+                 case NET_TCP_ERR_CONN_ACK_NONE:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_CONN_RESET_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 case NET_CONN_ERR_INVALID_FAMILY:
+                 case NET_CONN_ERR_INVALID_ADDR:
+                 case NET_CONN_ERR_INVALID_ADDR_LEN:
+                 default:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+             NetTCP_RxPktConnHandlerSyncTxd(p_conn, p_buf, p_buf_hdr, p_err);
+
+             switch (*p_err) {
+                 case NET_TCP_ERR_CONN_RESET_VALID:
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                      NetTCP_RxPktFree(p_buf);
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_TCP_ERR_CONN_DATA_VALID'.  */
+
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxSegCompCtr);
+                      break;
+
+
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_RE_TX_SEG_TH:
+                 case NET_ERR_TX:                               /* Ignore transitory err(s)?                            */
+                 case NET_ERR_IF_LINK_DOWN:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                     *p_err = NET_ERR_RX;
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_CLOSE:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_SEQ_INVALID:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_CONN_RESET_INVALID:
+                 case NET_TCP_ERR_CONN_SEQ_FIN_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 case NET_CONN_ERR_INVALID_FAMILY:
+                 case NET_CONN_ERR_INVALID_ADDR:
+                 case NET_CONN_ERR_INVALID_ADDR_LEN:
+                 default:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CONN:
+             NetTCP_RxPktConnHandlerConn(p_conn, p_buf, p_buf_hdr, p_err);
+
+             switch (*p_err) {
+                 case NET_TCP_ERR_CONN_RESET_VALID:
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                      NetTCP_RxPktFree(p_buf);
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_TCP_ERR_CONN_DATA_VALID'.  */
+
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxSegCompCtr);
+                      break;
+
+
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_TCP_ERR_RX_Q_FULL:
+                 case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_RE_TX_SEG_TH:
+                 case NET_ERR_TX:                               /* Ignore transitory err(s)?                            */
+                 case NET_ERR_IF_LINK_DOWN:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                     *p_err = NET_ERR_RX;
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_CLOSE:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_SEQ_SYNC_INVALID:
+                 case NET_TCP_ERR_CONN_SEQ_INVALID:
+                 case NET_TCP_ERR_CONN_ACK_NONE:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_CONN_RESET_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 case NET_CONN_ERR_INVALID_FAMILY:
+                 case NET_CONN_ERR_INVALID_ADDR:
+                 case NET_CONN_ERR_INVALID_ADDR_LEN:
+                 default:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+             NetTCP_RxPktConnHandlerFinWait1(p_conn, p_buf, p_buf_hdr, p_err);
+
+             switch (*p_err) {
+                 case NET_TCP_ERR_CONN_RESET_VALID:
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                      NetTCP_RxPktFree(p_buf);
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_TCP_ERR_CONN_DATA_VALID'.  */
+
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxSegCompCtr);
+                      break;
+
+
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_TCP_ERR_RX_Q_FULL:
+                 case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_RE_TX_SEG_TH:
+                 case NET_ERR_TX:                               /* Ignore transitory err(s)?                            */
+                 case NET_ERR_IF_LINK_DOWN:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                     *p_err = NET_ERR_RX;
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_CLOSE:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_SEQ_SYNC_INVALID:
+                 case NET_TCP_ERR_CONN_SEQ_INVALID:
+                 case NET_TCP_ERR_CONN_ACK_NONE:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_CONN_RESET_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                 case NET_TCP_ERR_INVALID_CONN_ID:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 case NET_CONN_ERR_INVALID_FAMILY:
+                 case NET_CONN_ERR_INVALID_ADDR:
+                 case NET_CONN_ERR_INVALID_ADDR_LEN:
+                 case NET_CONN_ERR_INVALID_CONN:
+                 case NET_CONN_ERR_NOT_USED:
+                 default:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+             NetTCP_RxPktConnHandlerFinWait2(p_conn, p_buf, p_buf_hdr, p_err);
+
+             switch (*p_err) {
+                 case NET_TCP_ERR_CONN_RESET_VALID:
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                      NetTCP_RxPktFree(p_buf);
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_TCP_ERR_CONN_DATA_VALID'.  */
+
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxSegCompCtr);
+                      break;
+
+
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_TCP_ERR_RX_Q_FULL:
+                 case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                     *p_err = NET_ERR_RX;
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_SEQ_SYNC_INVALID:
+                 case NET_TCP_ERR_CONN_SEQ_INVALID:
+                 case NET_TCP_ERR_CONN_ACK_NONE:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_CONN_RESET_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 default:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CLOSING:
+             NetTCP_RxPktConnHandlerClosing(p_conn, p_buf, p_buf_hdr, p_err);
+
+             switch (*p_err) {
+                 case NET_TCP_ERR_CONN_RESET_VALID:
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                      NetTCP_RxPktFree(p_buf);
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_TCP_ERR_CONN_DATA_VALID'.  */
+
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxSegCompCtr);
+                      break;
+
+
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_TCP_ERR_RX_Q_FULL:
+                 case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_RE_TX_SEG_TH:
+                 case NET_ERR_TX:                               /* Ignore transitory err(s)?                            */
+                 case NET_ERR_IF_LINK_DOWN:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                     *p_err = NET_ERR_RX;
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_SEQ_SYNC_INVALID:
+                 case NET_TCP_ERR_CONN_SEQ_INVALID:
+                 case NET_TCP_ERR_CONN_ACK_NONE:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_CONN_RESET_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                 case NET_TCP_ERR_INVALID_CONN_ID:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 case NET_CONN_ERR_INVALID_FAMILY:
+                 case NET_CONN_ERR_INVALID_ADDR:
+                 case NET_CONN_ERR_INVALID_ADDR_LEN:
+                 case NET_CONN_ERR_INVALID_CONN:
+                 case NET_CONN_ERR_NOT_USED:
+                 default:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+             NetTCP_RxPktConnHandlerTimeWait(p_conn, p_buf, p_buf_hdr, p_err);
+
+             switch (*p_err) {
+                 case NET_TCP_ERR_CONN_RESET_VALID:
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                      NetTCP_RxPktFree(p_buf);
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_TCP_ERR_CONN_DATA_VALID'.  */
+
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxSegCompCtr);
+                      break;
+
+
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_TCP_ERR_RX_Q_FULL:
+                 case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                     *p_err = NET_ERR_RX;
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_SEQ_SYNC_INVALID:
+                 case NET_TCP_ERR_CONN_SEQ_INVALID:
+                 case NET_TCP_ERR_CONN_ACK_NONE:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_CONN_RESET_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 default:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+             NetTCP_RxPktConnHandlerCloseWait(p_conn, p_buf, p_buf_hdr, p_err);
+
+             switch (*p_err) {
+                 case NET_TCP_ERR_CONN_RESET_VALID:
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                      NetTCP_RxPktFree(p_buf);
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_TCP_ERR_CONN_DATA_VALID'.  */
+
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxSegCompCtr);
+                      break;
+
+
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_TCP_ERR_RX_Q_FULL:
+                 case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_RE_TX_SEG_TH:
+                 case NET_ERR_TX:                               /* Ignore transitory err(s)?                            */
+                 case NET_ERR_IF_LINK_DOWN:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                     *p_err = NET_ERR_RX;
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_SEQ_SYNC_INVALID:
+                 case NET_TCP_ERR_CONN_SEQ_INVALID:
+                 case NET_TCP_ERR_CONN_ACK_NONE:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_CONN_RESET_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 case NET_CONN_ERR_INVALID_FAMILY:
+                 case NET_CONN_ERR_INVALID_ADDR:
+                 case NET_CONN_ERR_INVALID_ADDR_LEN:
+                 default:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             NetTCP_RxPktConnHandlerLastAck(p_conn, p_buf, p_buf_hdr, p_err);
+
+             switch (*p_err) {
+                 case NET_TCP_ERR_CONN_RESET_VALID:
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                 case NET_TCP_ERR_CONN_CLOSED:
+                      NetTCP_RxPktFree(p_buf);
+                                                                /* 'break' intentionally omitted; MUST execute the ...  */
+                                                                /* ... following case : 'NET_TCP_ERR_CONN_DATA_VALID'.  */
+
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      NET_CTR_STAT_INC(Net_StatCtrs.TCP.RxSegCompCtr);
+                      break;
+
+
+                 case NET_TCP_ERR_NONE_AVAIL:
+                 case NET_TCP_ERR_RX_Q_FULL:
+                 case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+                 case NET_TCP_ERR_RE_TX_SEG_TH:
+                 case NET_ERR_TX:                               /* Ignore transitory err(s)?                            */
+                 case NET_ERR_IF_LINK_DOWN:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                     *p_err = NET_ERR_RX;
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_SEQ_SYNC_INVALID:
+                 case NET_TCP_ERR_CONN_SEQ_INVALID:
+                 case NET_TCP_ERR_CONN_ACK_NONE:
+                 case NET_TCP_ERR_CONN_ACK_INVALID:
+                 case NET_TCP_ERR_CONN_RESET_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 case NET_CONN_ERR_INVALID_FAMILY:
+                 case NET_CONN_ERR_INVALID_ADDR:
+                 case NET_CONN_ERR_INVALID_ADDR_LEN:
+                 default:
+                      NetTCP_RxPktDiscard(p_buf, p_err);
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NetTCP_TxConnReset((NET_TCP_CONN     *) 0,         /* Tx TCP conn reset (see Note #3b).                    */
+                                (NET_BUF_HDR      *) p_buf_hdr,
+                                (NET_TCP_RESET_CODE) NET_TCP_CONN_TX_RESET,
+                                (NET_TCP_CLOSE_CODE) NET_TCP_CONN_CLOSE_ALL,
+                                (NET_ERR          *)&err);
+
+             NetTCP_RxPktDiscard(p_buf, p_err);
+             return;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        case NET_TCP_CONN_STATE_CLOSED:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetTCP_RxPktConnHandlerListen()
+*
+* Description : (1) Handle TCP connection in LISTEN state :
+*
+*                   (a) Validate received TCP packet for current TCP connection state :
+*
+*                       (1) Reset           (RST)                                           See Note #2a
+*                       (2) Acknowledgement (ACK)                                           See Note #2b
+*                       (3) Synchronization (SYN)                                           See Note #2c
+*
+*                   (b) Check if TCP connection listen queue is available                   See Note #3
+*
+*                   (c) Prepare/configure TCP connection :
+*
+*                       (1) Clone new TCP connection from current TCP listen connection,    See Note #5a
+*                               if half-connection :
+*
+*                           (A) Get  connections
+*                           (B) Set  connection  identification handles
+*                           (C) Set  connection  addresses
+*                           (D) Add  connection  into connection list
+*                           (E) Copy connection  from half-connection
+*
+*                       (2) Reconfigure current TCP listen connection,                      See Note #5b
+*                               if full-connection
+*
+*                   (d) Update TCP connection :
+*                       (1) Handle received TCP segment                                     See Note #2c2
+*                       (2) Configure TCP connection remote host maximum segment size       See Note #7
+*                       (3) Update    TCP connection state                                  See Note #2c
+*
+*                   (e) Transmit TCP connection synchronization for valid received          See Note #2c3
+*                           TCP connection requests
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence        number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Received segment's acknowledgement number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_SEQ_FIN_INVALID    Received segment's finish/close flag is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      Received segment's reset        flag is
+*                                                                       NOT valid for current TCP connection.
+*
+*                               NET_TCP_ERR_CONN_LISTEN_Q_MAX       TCP connection listen queue is NOT available
+*                                                                       queue a new connection.
+*
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+*                               NET_TCP_ERR_INVALID_CONN_ID         Invalid application connection.
+*
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*
+*                                                                   ------ RETURNED BY NetTCP_RxPktConnIsValidReset() : ------
+*                                                                   ------- RETURNED BY NetTCP_RxPktConnIsValidAck() : -------
+*                                                                   ------- RETURNED BY NetTCP_RxPktConnIsValidSeq() : -------
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   - RETURNED BY NetTCP_RxPktConnHandlerListenQ_IsAvail() : -
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+*                                                                   ----------- RETURNED BY NetTCP_TxConnSync() : ------------
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_ERR_TX                              Transmit        error.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*
+*                                                                   ------- RETURNED BY NetTCP_RxPktConnHandlerSeg() : -------
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid
+*                                                                       data queued for later processing (see Note #2c2).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandler().
+*
+* Note(s)     : (2) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN [State]' states that :
+*
+*                   (a) "An incoming RST should be ignored."
+*
+*                   (b) "Any acknowledgment is bad if it arrives on a connection still in the LISTEN state.
+*                        An acceptable reset segment should be formed for any arriving ACK-bearing segment."
+*
+*                   (c) "If the SYN bit is set ... the connection state should be changed to SYN-RECEIVED" :
+*
+*                       (1) "Set RCV.NXT to SEG.SEQ+1, IRS is set to SEG.SEQ ..."
+*                           (A) See Note #2c3
+*
+*                       (2) "And any other control or text should be queued for processing later."
+*
+*                           (A) If any control or text is queued for later processing, the next sequence octet to
+*                               receive (RCV.NXT) MUST include the length of this received segment (SEG.LEN) :
+*
+*                               (1) RCV.NXT = SEG.SEQ + SEG.LEN + 1
+*
+*                       (3) "ISS should be selected and a SYN segment sent."
+*
+*                   (d) "Any other control or text-bearing segment (not containing SYN) must have an ACK and
+*                        thus would be discarded by the ACK processing ... So you are unlikely to get here,
+*                        but if you do, drop the segment, and return."
+*
+*                   (e) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states to
+*                       "not process the FIN if the state is CLOSED, LISTEN or SYN-SENT since the SEG.SEQ cannot
+*                       be validated; drop the segment".
+*
+*               (3) (a) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 18.11, Pages 257-258 states
+*                       that :
+*
+*                       (1) "Each listening end point has a fixed length queue of connections that have been
+*                            accepted by TCP (i.e., the three-way handshake is complete), but not yet accepted
+*                            by the application."
+*
+*                       (3) "When a connection request arrives (i.e., the SYN segment), ... the current number
+*                            of connections already queued for this listening end point [is checked] to see
+*                            whether to accept the connection or not."
+*
+*                       (4) "If there is room on this listening end point's queue for this new connection, ...
+*                            the TCP module ACKs the SYN and completes the connection."
+*
+*                       (5) "If there is not room on the queue for the new connection" :
+*
+*                           (A) "TCP just ignores the received SYN."
+*                           (B) "Nothing is sent back (i.e., no RST segment)."
+*
+*                   (b) (A) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 15.9, Page 455
+*                           reiterates that :
+*
+*                           (2) A "listen ... socket ... limit[s] ... the number of connections that can be
+*                               queued on the socket," ...
+*
+*                           (5) "after which the socket layer refuses to queue additional connection requests.
+*                                When this occurs, TCP ignores incoming connection requests."
+*
+*                       (B) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 28.2, Page 930
+*                           also states that :
+*
+*                           (5) (A) "By silently dropping the segment" ...
+*                               (B) "and not replying with an RST,"    ...
+*                               (C) "The client's connection request should time out, causing the client to
+*                                    retransmit the SYN."
+*
+*                       (C) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 18.11, Pages 259-260
+*                           summarizes that :
+*
+*                           (5) (A) "TCP ignores the incoming SYN when the queue is full," ...
+*                               (B) "and doesn't respond with an RST,"                     ...
+*
+*                               (C) (1) "because ... this condition could change in a short while ... [and] by
+*                                        ignoring the SYN, the server forces the client TCP to re-transmit the
+*                                        SYN later, hoping that the queue will then have room for the new
+*                                        connection".
+*
+*                                   (2) Whereas page 259-260 counters that "if the server's TCP responded with
+*                                       a reset, the client's active open would abort".
+*
+*                   See also 'NetTCP_RxPktConnHandlerListenQ_IsAvail()  Note #1'.
+*
+*               (4) The 'NET_CONN_CFG_FAMILY' pre-processor 'else'-conditional code will never be compiled/linked
+*                   since 'net_conn.h' ensures that the family type configuration constant (NET_CONN_CFG_FAMILY)
+*                   is configured with an appropriate family type value (see 'net_conn.h  CONFIGURATION ERRORS').
+*                   The 'else'-conditional code is included for completeness & as an extra precaution in case
+*                   'net_conn.h' is incorrectly modified.
+*
+*               (5) (a) (1) If any received TCP connection request to a LISTEN-state connection is a half-connection
+*                           -- i.e. a connection with ONLY the local address specified/configured -- then a new
+*                           connection is cloned from the LISTEN-state connection to handle each unique connection
+*                           request.
+*
+*                       (2) The following connection parameters are cloned/copied from the LISTEN-state connection :
+*
+*                           (A) Application connection handle identifier
+*                               (1) When the cloned connection is fully connected/established, it is queued to the
+*                                   LISTEN-state connection's application connection as a cloned network connection
+*                                   until the connection is accepted & a new application connection is created.
+*
+*                                   See also 'net_sock.c  NetSock_Accept()  Notes #1d & #1e'.
+*
+*                           (B) (1) TCP connection receive  parameters
+*                               (2) TCP connection transmit parameters
+*                               (3) TCP connection timeout  values
+*
+*                               See also 'NetTCP_ConnCopy()  Note #1a'.
+*
+*                   (b) If any received TCP connection request to a LISTEN-state connection is a full-connection --
+*                       i.e. a connection with BOTH the local & remote addresses specified/configured -- then the
+*                       LISTEN-state connection is reconfigured to handle the received connection request.
+*
+*               (6) On ANY TCP LISTEN-connection preparation error(s), network resources MUST be appropriately freed :
+*
+*                   (a) If NO TCP     connections available, NO           resources  need be freed.
+*                   (b) If NO network connections available, ONLY the TCP connection need be closed.
+*                   (c) If    network connection preparation fails, the TCP & network connection MUST both
+*                          be closed.  However, the TCP connection need NOT close application connection(s).
+*
+*                       See also 'NetTCP_ConnCloseHandler()  Note #2b1C1'.
+*
+*                   (d) If any remaining TCP connection preparation fails, the TCP & network connection MUST
+*                       both be closed.  The application connection(s) SHOULD NOT be closed since it is cloned
+*                       from the LISTEN-state connection (see Note #4), but network connections MAY need to be
+*                       de-referenced from the application connection(s).
+*
+*                       See also 'NetTCP_ConnCloseHandler()  Note #2b';
+*                              & 'net_conn.c  NetConn_CloseApp()          Note #1'
+*                              & 'net_sock.c  NetSock_FreeConnFromSock()  Note #2'.
+*
+*               (7) RFC #1122, Section 4.2.2.6 states that :
+*
+*                   (a) A "TCP SHOULD send an MSS (Maximum Segment Size) option in every SYN segment".
+*
+*                   (b) "If an MSS option is not received at connection setup, TCP MUST assume a default
+*                        send MSS of 536."
+*
+*               (8) TCP connection timeout for LISTEN state is implemented by TCP connection retransmission
+*                   function(s) (see 'NetTCP_TxConnReTxQ()  Note #3c').
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerListen (NET_TCP_CONN  *p_conn,
+                                             NET_BUF       *p_buf,
+                                             NET_BUF_HDR   *p_buf_hdr,
+                                             NET_ERR       *p_err)
+{
+    CPU_INT08U             addr_local[NET_CONN_ADDR_LEN_MAX];
+    CPU_INT08U             addr_remote[NET_CONN_ADDR_LEN_MAX];
+    CPU_BOOLEAN            q_avail           = DEF_NO;
+    NET_TCP_SEG_SIZE       mss_dflt_tx       = 0u;
+    NET_TCP_SEQ_CODE       seq_code          = 0u;
+    NET_TCP_ACK_CODE       ack_code          = 0u;
+    NET_TCP_RESET_CODE     reset_code        = 0u;
+    NET_IF_NBR             if_nbr            = NET_IF_NBR_NONE;
+    NET_CONN_FAMILY        conn_family       = NET_CONN_FAMILY_NONE;
+    NET_CONN_PROTOCOL_IX   conn_protocol_ix  = NET_CONN_PROTOCOL_IX_NONE;
+    NET_CONN_ID            conn_id           = NET_CONN_ID_NONE;
+    NET_CONN_ID            conn_id_clone     = NET_CONN_ID_NONE;
+    NET_CONN_ID            conn_id_clone_app = NET_CONN_ID_NONE;
+    NET_TCP_CONN_ID        conn_id_clone_tcp = NET_CONN_ID_NONE;
+    NET_TCP_CONN          *p_conn_clone      = DEF_NULL;
+    NET_TCP_CONN          *p_conn_tx_sync    = DEF_NULL;
+    NET_TCP_CONN_STATE     state             = NET_TCP_CONN_STATE_NONE;
+    NET_ERR                err               = NET_ERR_NONE;
+    NET_ERR                err_rtn           = NET_TCP_ERR_NONE;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+                                                                /* Chk for rx'd fin/close.                              */
+    if (p_buf_hdr->TCP_SegClose != DEF_NO) {                    /* If invalid   fin/close rx'd, ...                     */
+       *p_err = NET_TCP_ERR_CONN_SEQ_FIN_INVALID;
+        return;                                                 /* ... ignore TCP pkt    (see Note #2e).                */
+    }
+
+                                                                /* Chk for rx'd reset.                                  */
+    reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    if (reset_code != NET_TCP_CONN_RX_RESET_NONE) {             /* If reset    rx'd, ...                                */
+       *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+        return;                                                 /* ... ignore TCP pkt    (see Note #2a).                */
+    }
+
+                                                                /* Chk for rx'd ack.                                    */
+    ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    if (ack_code != NET_TCP_CONN_RX_ACK_NONE) {                 /* If ack      rx'd, ...                                */
+                                                                /* ... tx TCP conn reset (see Note #2b).                */
+        NetTCP_TxConnReset(p_conn, p_buf_hdr, NET_TCP_CONN_TX_RESET, NET_TCP_CONN_CLOSE_ALL, &err);
+       *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+        return;
+    }
+
+                                                                /* Chk     rx'd seq nbr.                                */
+    seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    if (seq_code != NET_TCP_CONN_RX_SEQ_SYNC) {                 /* If sync NOT rx'd, ...                                */
+       *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+        return;                                                 /* ... ignore TCP pkt    (see Note #2d).                */
+    }
+                                                                /* Else sync avail, update seg lens.                    */
+    p_buf_hdr->TCP_SegLenInit += NET_TCP_SEG_LEN_SYNC;
+    p_buf_hdr->TCP_SegLen     += NET_TCP_SEG_LEN_SYNC;
+
+
+
+                                                                /* -------------- CHK TCP CONN LISTEN Q --------------- */
+    q_avail = NetTCP_RxPktConnHandlerListenQ_IsAvail(p_conn, p_err); /* Chk TCP listen Q     avail.                     */
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+
+    if (q_avail != DEF_YES) {                                   /* If  TCP listen Q NOT avail (see Note #3a5),          */
+       *p_err = NET_TCP_ERR_CONN_LISTEN_Q_MAX;
+        return;                                                 /* ... ignore TCP pkt         (see Note #3a5A).         */
+    }
+
+
+
+                                                                /* ----------------- PREPARE TCP CONN ----------------- */
+    if (p_buf_hdr->ConnType != NET_CONN_TYPE_CONN_FULL) {       /* If pkt demux'd to half-conn, clone new conn          */
+                                                                /* .. from LISTEN    half-conn (see Note #5a).          */
+                                                                /* -------------------- GET CONNS --------------------- */
+
+        conn_id_clone_tcp =  NetTCP_ConnGet(p_conn->FnctAppPostRx,
+                                            p_conn->FnctAppPostTx,
+                                           &err);
+        if ( err != NET_TCP_ERR_NONE) {                         /* See Note #6a.                                        */
+           *p_err  = NET_TCP_ERR_NONE_AVAIL;
+            return;
+        }
+        p_conn_clone = &NetTCP_ConnTbl[conn_id_clone_tcp];
+
+
+#ifdef  NET_IP_MODULE_EN
+        if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+            conn_family      =  NET_CONN_FAMILY_IP_V4_SOCK;
+            conn_protocol_ix =  NET_CONN_PROTOCOL_IX_IP_V4_TCP;
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            conn_family      =  NET_CONN_FAMILY_IP_V6_SOCK;
+            conn_protocol_ix =  NET_CONN_PROTOCOL_IX_IP_V6_TCP;
+#endif
+        }
+#else                                                           /* See Notes #4 & #6d.                                  */
+        NetTCP_ConnClose(p_conn_clone, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+       *p_err = NET_CONN_ERR_INVALID_FAMILY;
+        return;
+#endif
+
+        conn_id_clone = NetConn_Get(conn_family, conn_protocol_ix, &err);
+        if ( err != NET_CONN_ERR_NONE) {                        /* See Note #6b.                                        */
+            NetTCP_ConnClose(p_conn_clone, p_buf_hdr, DEF_NO, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_NONE_AVAIL;
+            return;
+        }
+
+
+                                                                /* SET CONN IDs                                         */
+        p_conn_clone->ID_Conn = conn_id_clone;
+        NetConn_ID_TransportSet((NET_CONN_ID) conn_id_clone,
+                                (NET_CONN_ID) conn_id_clone_tcp,
+                                (NET_ERR   *)&err);
+        if ( err != NET_CONN_ERR_NONE) {                        /* See Note #6c.                                        */
+            NetTCP_ConnClose(p_conn_clone, p_buf_hdr, DEF_NO, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_CONN_FAIL;
+            return;
+        }
+
+
+        conn_id           = p_conn->ID_Conn;
+        conn_id_clone_app = NetConn_ID_AppGet((NET_CONN_ID) conn_id, /* Get half-conn's app conn id & ...               */
+                                              (NET_ERR   *)&err);
+        if ( err != NET_CONN_ERR_NONE) {                        /* See Note #6c.                                        */
+            NetTCP_ConnClose(p_conn_clone, p_buf_hdr, DEF_NO, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_CONN_FAIL;
+            return;
+        }
+        if (conn_id_clone_app == NET_CONN_ID_NONE) {
+           *p_err  = NET_TCP_ERR_INVALID_CONN_ID;
+            return;
+        }
+
+        NetConn_ID_AppCloneSet((NET_CONN_ID) conn_id_clone,     /* ... set as cloned conn's      ...                    */
+                               (NET_CONN_ID) conn_id_clone_app, /* ... app conn clone id (see Note #5a2A1).             */
+                               (NET_ERR   *)&err);
+        if ( err != NET_CONN_ERR_NONE) {                        /* See Note #6c.                                        */
+            NetTCP_ConnClose(p_conn_clone, p_buf_hdr, DEF_NO, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_CONN_FAIL;
+            return;
+        }
+
+
+                                                                /* ------------------ CFG CONN ADDRS ------------------ */
+#ifdef  NET_IP_MODULE_EN
+
+        Mem_Clr((void     *)&addr_local,
+                (CPU_SIZE_T) NET_CONN_ADDR_LEN_MAX);
+
+        Mem_Clr((void     *)&addr_remote,
+                (CPU_SIZE_T) NET_CONN_ADDR_LEN_MAX);
+
+        if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+                                                                /* Cfg local  addr as pkt dest addr.                    */
+            NET_UTIL_VAL_COPY_SET_NET_16(&addr_local [NET_CONN_ADDR_IP_IX_PORT], &p_buf_hdr->TransportPortDest);
+            NET_UTIL_VAL_COPY_SET_NET_32(&addr_local [NET_CONN_ADDR_IP_V4_IX_ADDR], &p_buf_hdr->IP_AddrDest);
+                                                                /* Cfg remote addr as pkt src  addr.                    */
+            NET_UTIL_VAL_COPY_SET_NET_16(&addr_remote[NET_CONN_ADDR_IP_IX_PORT], &p_buf_hdr->TransportPortSrc);
+            NET_UTIL_VAL_COPY_SET_NET_32(&addr_remote[NET_CONN_ADDR_IP_V4_IX_ADDR], &p_buf_hdr->IP_AddrSrc);
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+                                                                /* Cfg local  addr as pkt dest addr.                    */
+            NET_UTIL_VAL_COPY_SET_NET_16(&addr_local [NET_CONN_ADDR_IP_IX_PORT], &p_buf_hdr->TransportPortDest);
+            Mem_Copy(&addr_local [NET_CONN_ADDR_IP_V6_IX_ADDR], &p_buf_hdr->IPv6_AddrDest, NET_IPv6_ADDR_SIZE);
+                                                                /* Cfg remote addr as pkt src  addr.                    */
+            NET_UTIL_VAL_COPY_SET_NET_16(&addr_remote[NET_CONN_ADDR_IP_IX_PORT], &p_buf_hdr->TransportPortSrc);
+            Mem_Copy(&addr_remote [NET_CONN_ADDR_IP_V6_IX_ADDR], &p_buf_hdr->IPv6_AddrSrc, NET_IPv6_ADDR_SIZE);
+#endif
+        }
+
+#else                                                           /* See Notes #4 & #6d.                                  */
+        NetTCP_ConnClose(p_conn_clone, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+       *p_err = NET_CONN_ERR_INVALID_FAMILY;
+        return;
+#endif
+
+        if_nbr = p_buf_hdr->IF_Nbr;
+        NetConn_AddrLocalSet(conn_id_clone,
+                             if_nbr,
+                            &addr_local[0],
+                             NET_CONN_ADDR_LEN_MAX,
+                             DEF_NO,
+                            &err);
+        if ( err != NET_CONN_ERR_NONE) {                        /* See Note #6c.                                        */
+            NetTCP_ConnClose(p_conn_clone, p_buf_hdr, DEF_NO, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_CONN_FAIL;
+            return;
+        }
+
+        NetConn_AddrRemoteSet(conn_id_clone,
+                             &addr_remote[0],
+                              NET_CONN_ADDR_LEN_MAX,
+                              DEF_NO,
+                             &err);
+        if ( err != NET_CONN_ERR_NONE) {                        /* See Note #6c.                                        */
+            NetTCP_ConnClose(p_conn_clone, p_buf_hdr, DEF_NO, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_CONN_FAIL;
+            return;
+        }
+
+
+        NetConn_ListAdd(conn_id_clone, &err);                   /* Add conn into conn list.                             */
+        if ( err != NET_CONN_ERR_NONE) {                        /* See Note #6c.                                        */
+            NetTCP_ConnClose(p_conn_clone, p_buf_hdr, DEF_NO, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_CONN_FAIL;
+            return;
+        }
+
+
+                                                                /* Copy half-conn state to full conn.                   */
+        NetTCP_ConnCopy(p_conn_clone, p_conn);
+
+
+#ifndef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+        NetTCP_RxConnWinSizeHandler(p_conn_clone, DEF_NULL, 0, NET_TCP_CONN_RX_WIN_ZERO);
+#endif
+        p_conn_tx_sync = p_conn_clone;
+
+
+    } else {                                                    /* Else conn to listen TCP conn (see Note #5b).         */
+        p_conn_tx_sync = p_conn;
+    }
+
+
+
+                                                                /* ----------------- HANDLE RX'D SEG ------------------ */
+    NetTCP_RxPktConnHandlerSeg(p_conn_tx_sync, ack_code, p_buf, p_buf_hdr, &err_rtn);
+    switch (err_rtn) {
+        case NET_TCP_ERR_CONN_DATA_NONE:
+        case NET_TCP_ERR_CONN_DATA_VALID:
+             break;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        default:                                                /* See Note #6d.                                        */
+             NetTCP_ConnClose(p_conn_tx_sync, p_buf_hdr, p_conn_tx_sync->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = err_rtn;
+             return;
+    }
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+                                                                /* Cfg remote max seg size as advertised ...            */
+                                                                /* ... by remote host (see Note #7).                    */
+    if (DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME) == DEF_YES) {
+#ifdef  NET_IPv6_MODULE_EN
+        mss_dflt_tx = NET_TCP_MAX_SEG_SIZE_DFLT_V6;
+#else
+       *p_err = NET_ERR_FAULT_FEATURE_DIS;
+        NetTCP_ConnClose(p_conn_tx_sync, p_buf_hdr, p_conn_tx_sync->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+        return;
+#endif
+    } else {
+#ifdef  NET_IPv4_MODULE_EN
+        mss_dflt_tx = NET_TCP_MAX_SEG_SIZE_DFLT_V4;
+
+#else
+       *p_err = NET_ERR_FAULT_FEATURE_DIS;
+        NetTCP_ConnClose(p_conn_tx_sync, p_buf_hdr, p_conn_tx_sync->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+        return;
+#endif
+    }
+
+    p_conn_tx_sync->MaxSegSizeRemote = (p_buf_hdr->TCP_MaxSegSize != NET_TCP_MAX_SEG_SIZE_NONE)
+                                     ?  p_buf_hdr->TCP_MaxSegSize
+                                     :  mss_dflt_tx;
+
+    state                     = p_conn_tx_sync->ConnState;
+    p_conn_tx_sync->ConnState = NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE;
+
+
+                                                                /* ----------------- TX TCP CONN SYNC ----------------- */
+    NetTCP_TxConnSync(p_conn_tx_sync, p_buf_hdr, state, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {                           /* See Note #6d.                                        */
+         NetTCP_ConnClose(p_conn_tx_sync, p_buf_hdr, p_conn_tx_sync->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+         return;
+    }
+    NetSock_ConnChildAdd(conn_id_clone_app, conn_id_clone, p_err);
+    if (*p_err != NET_SOCK_ERR_NONE) {
+         NetTCP_ConnClose(p_conn_tx_sync, p_buf_hdr, p_conn_tx_sync->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+         return;
+    }
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_RxPktConnHandlerSyncRxd()
+*
+* Description : (1) Handle TCP connection in SYN-RECEIVED state :
+*
+*                   (a) Validate received TCP packet for current TCP connection state :
+*
+*                       (1) Sequence Number (SEQ)                                       See Note  #2a
+*                       (2) Reset           (RST)                                       See Note  #2b
+*                       (3) Synchronization (SYN)                                       See Note  #2c
+*                       (4) Acknowledgement (ACK)                                       See Note  #2d
+*                       (5) Finish/Close    (FIN)                                       See Note  #2e
+*
+*                   (b) Update TCP connection :
+*                       (1) Handle received TCP segment                                 See Note  #2d2A1
+*                       (2) Update    TCP connection state                              See Notes #2d2A1a & #2e4
+*                       (3) Update    TCP connection timer
+*
+*                   (c) Acknowledge   TCP connection
+*                       (1) Signal    TCP/application connection complete
+*                       (2) Handle    TCP connection  received data                     See Note  #2d2A1
+*                       (3) Transmit  TCP connection  data                              See Notes #2d2A2  & #2e3
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_SEQ_SYNC_INVALID   Received segment's synchronization        is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence        number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_ACK_NONE           Received segment's acknowledgement        is
+*                                                                       NOT available.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Received segment's acknowledgement number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_VALID        Received segment's reset flag is     valid
+*                                                                       for current TCP connection; i.e. reset
+*                                                                       the TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      Received segment's reset flag is NOT valid
+*                                                                       for current TCP connection.
+*
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidSeq() : -----
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidAck() : -----
+*                                                                   ---- RETURNED BY NetTCP_RxPktConnIsValidReset() : ----
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnHandlerSeg() : -----
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data to   queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid
+*                                                                       data processed (see Note #2d2A1).
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment
+*                                                                       data; NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment
+*                                                                       data; NOT queued to receive queue(s).
+*
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT       TCP connection transmit queue signal fault.
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*
+*                                                                   ---------- RETURNED BY NetTCP_TxConnTxQ() : ----------
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandler().
+*
+* Note(s)     : (2) TCP connections in the SYN-RECEIVED state are handled as follows :
+*
+*                   (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that in the "SYN-RECEIVED, ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2
+*                       STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE" that :
+*
+*                       (1) "Segments are processed in sequence ... processing is done in SEG.SEQ order."
+*
+*                       (2) "Initial tests on arrival are used to discard old duplicates."
+*
+*                       (3) "If a segment's contents straddle the boundary between old and new, only the
+*                            new parts should be processed."
+*
+*                       (4) (A) "If an incoming segment is not acceptable," ...
+*
+*                           (B) "an acknowledgment should be sent in reply" ...
+*
+*                           (C) "(unless the RST bit is set, if so drop the segment)".
+*
+*                               See also Notes #2b2Aa & #2b2C.
+*
+*                       See also 'NetTCP_RxPktConnIsValidSeq()  Note #1d'.
+*
+*                   (b) (1) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit :
+*                               SYN-RECEIVED STATE' states that "if the RST bit is set" and ...
+*
+*                               (1) "If this connection was initiated with a passive OPEN (i.e., came from
+*                                    the LISTEN state), then return this connection to the LISTEN state."
+*
+*                               (2) "If this connection was initiated with an active OPEN (i.e., came from
+*                                    the SYN-SENT state) then the connection was refused, signal the user
+*                                   'connection refused' ... enter the CLOSED state."
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing'
+*                               reiterates that "if the receiver ... of a RST ... was in SYN-RECEIVED state
+*                               and had previously been in the LISTEN state, then the receiver returns to
+*                               the LISTEN state, otherwise the receiver aborts the connection and goes to
+*                               the CLOSED state".
+*
+*                           (C) However, since TCP connections opened from the LISTEN state are cloned from
+*                               the original LISTEN-state TCP connection, it is NOT necessary to return ANY
+*                               reset TCP connection from the SYN-RECEIVED state back to the LISTEN state.
+*
+*                           See also 'NetTCP_RxPktConnIsValidReset()  Note #2a4B'.
+*
+*                       (2) (A) RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 amends the "handling of
+*                               a segment with the RST when in a synchronized state" to "provide some
+*                               protection against ... blind reset attack[s] using the RST bit" :
+*
+*                               (a) "If the RST bit is set and the sequence number is outside the expected
+*                                    window, silently drop the segment."
+*
+*                               (b) "If the RST bit is exactly the next expected sequence number [sic], reset
+*                                    the connection"; it is assumed that this should read "if the RST bit is
+*                                    set and the sequence number is exactly the next expected sequence number,
+*                                    reset the connection."
+*
+*                               (c) "If the RST bit is set and the sequence number does not exactly match
+*                                    the next expected sequence value, yet is within the acceptable window
+*                                    (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) send an acknowledgment."
+*
+*                           (B) Although RFC Draft-IETF-TCPm-TCPSecure #00 explicitly states that this
+*                               amendment applies only to the "handling of a ... RST ... when in a synchronized
+*                               state", it is assumed that this should also apply to the SYN-RECEIVED state.
+*
+*                               See also 'NetTCP_RxPktConnIsValidReset()  Note #2a5B'.
+*
+*                           (C) In addition, RFC Draft-IETF-TCPm-TCPSecure #00 does NOT provide a precedence
+*                               priority for handling TCP segments received with BOTH the RST & SYN bits set.
+*
+*                               Therefore, since it does NOT seem reasonable to reset a TCP connection
+*                               due to a TCP segment that also attempted to synchronize the  TCP connection,
+*                               it is assumed that the amended handling of the SYN bit should take precedence
+*                               over the amended handling of the RST bit.
+*
+*                               See also Note #2c2.
+*
+*                   (c) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN Bit'
+*                           states that in the "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT STATE-1,
+*                           FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that :
+*
+*                           (A) "If the SYN is in the window it is an error, send a reset, any outstanding
+*                                RECEIVEs and SEND[s] should receive 'reset' responses, all segment queues
+*                                should be flushed, the user should also receive an unsolicited general
+*                               'connection reset' signal[, and] enter the CLOSED state."
+*
+*                           (B) But "if the SYN is not in the window this step would not have been reached
+*                               and an ack would have been sent".
+*
+*                       (2) (A) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 3.2 amends the  "handling
+*                               of a segment with the SYN bit set in the synchronized state ... [by] handling
+*                               ... the SYN bit" as follows :
+*
+*                               (a) "If the SYN bit is set and the sequence number is outside the
+*                                    expected window, send an ACK back to the peer."
+*
+*                               (b) "If the SYN bit is set and the sequence number is an exact
+*                                    match to the next expected sequence (RCV.NXT == SEG.SEQ)
+*                                    then send an ACK segment ... but ... subtract one from
+*                                    value being acknowledged."
+*
+*                               (c) "If the SYN bit is set and the sequence number is acceptable,
+*                                    i.e.: (RCV.NXT <= SEG.SEQ <= RCV.NXT+RCV.WND) then send an
+*                                    ACK segment."
+*
+*                           (B) Although RFC Draft-IETF-TCPm-TCPSecure #00 explicitly states that this
+*                               amendment applies only to the "handling of a ... SYN ... in a synchronized
+*                               state", it is assumed that this should also apply to the SYN-RECEIVED state.
+*
+*                   (d) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field' states
+*                       that :
+*
+*                       (1) "If the ACK bit is off drop the segment."
+*
+*                       (2) "If the ACK bit is on [and in the] SYN-RECEIVED STATE" :
+*
+*                           (A) (1) "If SND.UNA < SEG.ACK <= SND.NXT then" :
+*
+*                                   (a) "Enter the ESTABLISHED state" ...
+*                                   (b) "and continue processing."
+*
+*                               (2) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT
+*                                   [State]' states to "send ... [any] data or controls which were queued
+*                                   for transmission" when the SYN-SENT state transitions to the ESTABLISHED
+*                                   state.
+*
+*                                   Although this section is the only section to state that any data or
+*                                   controls should be sent when transitioning from the SYN-SENT state
+*                                   to the ESTABLISHED state, it is assumed that any data or controls
+*                                   should also be sent for the transition from the SYN-RECEIVED state
+*                                   to the ESTABLISHED state.
+*
+*                           (B) "If the segment acknowledgment is not acceptable, form a reset segment ...
+*                                and send it."
+*
+*                   (e) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                       that "if the FIN bit is set" :
+*
+*                       (1) "Signal the user 'connection closing' and return any pending RECEIVEs with
+*                            same message," ...
+*
+*                       (2) "Advance RCV.NXT over the FIN," ...
+*
+*                       (3) "Send an acknowledgment for the FIN" ...
+*
+*                       (4) And the "SYN-RECEIVED STATE enter[s] the CLOSE-WAIT state".
+*
+*               (3) (a) (1) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : USER TIMEOUT' states that
+*                           "for any state if the user timeout expires, flush all queues, signal the user
+*                           'error : connection aborted due to user timeout' ... [and] enter the CLOSED state".
+*
+*                       (2) However, NO RFC specifies or suggests any mechanism to implement/handle user timeouts.
+*
+*                           Therefore, it is assumed that ANY TCP connection that receives a valid TCP data
+*                           or control segment should reset its connection timer.
+*
+*                   (b) (1) Once a TCP connection enters the connected state, most of its TCP connection timers
+*                           should be reset.
+*
+*                       (2) However, the following timers MAY already have been allocated & initialized, & MUST
+*                           NOT be reset :
+*
+*                           (A)    Transmit Idle timer              'TxQ_IdleTmr'
+*                           (B) Re-transmit      timer              'ReTxQ_Tmr'
+*
+*               (4) Some  transitory errors were ignored &/or not returned from previous handler function(s).
+*                   These transitory errors are included for completeness & as an extra precaution in case
+*                   these transitory errors are returned by handler function(s).
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerSyncRxd (NET_TCP_CONN  *p_conn,
+                                              NET_BUF       *p_buf,
+                                              NET_BUF_HDR   *p_buf_hdr,
+                                              NET_ERR       *p_err)
+{
+    NET_TCP_SEQ_CODE    seq_code;
+    NET_TCP_ACK_CODE    ack_code;
+    NET_TCP_RESET_CODE  reset_code;
+    NET_TCP_FREE_CODE   free_code;
+    NET_TCP_CONN_STATE  state;
+    NET_TMR_TICK        timeout_tick;
+    NET_ERR             err;
+    NET_ERR             err_rtn;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+                                                                /* Chk for rx'd fin/close.                              */
+    if (p_buf_hdr->TCP_SegClose == DEF_YES) {                   /* If fin/close avail, update seg lens.                 */
+        p_buf_hdr->TCP_SegLenInit += NET_TCP_SEG_LEN_CLOSE;
+        p_buf_hdr->TCP_SegLen     += NET_TCP_SEG_LEN_CLOSE;
+    }
+
+                                                                /* Chk rx'd seq nbr.                                    */
+    seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (seq_code) {
+        case NET_TCP_CONN_RX_SEQ_VALID:
+             break;
+
+
+        case NET_TCP_CONN_RX_SEQ_SYNC:                          /* If invalid sync rx'd, ...                            */
+        case NET_TCP_CONN_RX_SEQ_SYNC_INVALID:
+                                                                /* ... tx TCP conn ack  (see Notes #2c2 & #2b2C).       */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_SEQ_SYNC_INVALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_SEQ_NONE:
+        case NET_TCP_CONN_RX_SEQ_INVALID:                       /* If invalid seq  rx'd (see Note #2a4A), ...           */
+        default:
+             if (p_buf_hdr->TCP_SegReset != DEF_YES) {          /* ... & reset NOT rx'd (see Note #2a4C), ...           */
+                                                                /* ... tx TCP conn ack  (see Note #2a4B).               */
+                 NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+             }
+            *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd reset.                                  */
+    reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (reset_code) {
+        case NET_TCP_CONN_RX_RESET_NONE:
+             break;
+
+
+        case NET_TCP_CONN_RX_RESET_VALID:                       /* If   valid reset rx'd, ...                           */
+                                                                /* ...  close TCP conn (see Note #2b2Ab).               */
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_TCP_ERR_CONN_RESET_VALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_RESET_INVALID:                     /* If invalid reset rx'd, ...                           */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2b2Ac).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd ack.                                    */
+    ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (ack_code) {
+        case NET_TCP_CONN_RX_ACK_VALID:
+             break;
+
+
+        case NET_TCP_CONN_RX_ACK_NONE:                          /* If NO      ack rx'd, ...                             */
+            *p_err = NET_TCP_ERR_CONN_ACK_NONE;                 /* ... ignore TCP pkt    (see Note #2d1).               */
+             return;
+
+
+        case NET_TCP_CONN_RX_ACK_INVALID:                       /* If invalid ack rx'd, ...                             */
+        case NET_TCP_CONN_RX_ACK_DUP:
+        case NET_TCP_CONN_RX_ACK_PREV:
+        default:
+                                                                /* ... tx TCP conn reset (see Note #2d2B).              */
+             NetTCP_TxConnReset(p_conn, p_buf_hdr, NET_TCP_CONN_TX_RESET, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+             return;
+    }
+
+
+
+                                                                /* ----------------- HANDLE RX'D SEG ------------------ */
+    NetTCP_RxPktConnHandlerSeg(p_conn, ack_code, p_buf, p_buf_hdr, &err_rtn);
+    switch (err_rtn) {
+        case NET_TCP_ERR_CONN_DATA_NONE:
+        case NET_TCP_ERR_CONN_DATA_VALID:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s) [see Note #4].           */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_CONN_DATA_DUP:
+            *p_err = err_rtn;
+             return;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_FAIL:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_DATA_INVALID:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_TX_PKT:
+        case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+        case NET_TCP_ERR_RE_TX_SEG_TH:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = err_rtn;
+             return;
+    }
+
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+    state = p_conn->ConnState;
+    if (p_buf_hdr->TCP_SegClose != DEF_YES) {                   /* If fin/close NOT rx'd, ...                           */
+        p_conn->ConnState = NET_TCP_CONN_STATE_CONN;            /* ...  chng to conn'd     state (see Note #2d2A1a).    */
+    } else {                                                    /* Else chng to close-wait state (see Note #2e4).       */
+        p_conn->ConnState = NET_TCP_CONN_STATE_CLOSE_WAIT;
+    }
+
+    p_conn->TxQ_State = NET_TCP_TX_Q_STATE_CONN;
+
+
+                                                                /* UPDATE TMR's                                         */
+    free_code = NET_TCP_CONN_FREE_TMR_ALL;                      /* See Note #3c1.                                       */
+    DEF_BIT_CLR(free_code, NET_TCP_CONN_FREE_TMR_TX_IDLE);      /* See Note #3c2A.                                      */
+    DEF_BIT_CLR(free_code, NET_TCP_CONN_FREE_TMR_RE_TX);        /* See Note #3c2B.                                      */
+
+    NetTCP_ConnFreeTmr(p_conn, free_code);                      /* Free TCP conn tmr(s) [see Note #3b].                 */
+
+
+                                                                /* Get  TCP conn tmr.                                   */
+    timeout_tick       = p_conn->TimeoutConn_tick;              /* Start    conn tmr    (see Note #3a2).                */
+    p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_ConnIdleTimeout,
+                                   (void        *) p_conn,
+                                   (NET_TMR_TICK ) timeout_tick,
+                                   (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                   (NET_ERR     *)&err);
+    if ( err != NET_TMR_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+       *p_err  = NET_TCP_ERR_NONE_AVAIL;
+        return;
+    }
+
+
+
+                                                                /* ------------------- ACK TCP CONN ------------------- */
+    NetTCP_RxPktConnHandlerSignalConn(p_conn, state, &err);     /* Signal app conn (see Note #1c1).                     */
+    if ( err != NET_TCP_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+       *p_err  = NET_TCP_ERR_CONN_FAIL;
+        return;
+    }
+
+    NetTCP_RxPktConnHandlerRxQ_AppData(p_conn, &err);           /* Handle TCP conn rx'd data (see Note #2d2A1).         */
+    if (err != NET_TCP_ERR_NONE) {
+       *p_err = NET_TCP_ERR_CONN_FAIL;
+        return;
+    }
+
+    if (p_conn->ConnState == NET_TCP_CONN_STATE_CONN) {         /* If conn'd, tx any tx data (see Note #1c3).           */
+        NetTCP_TxConnTxQ(p_conn,
+                         p_buf_hdr,
+                         NET_TCP_CONN_TX_ACK_NONE,
+                         DEF_NO,
+                         NET_TCP_CONN_CLOSE_ALL,
+                         DEF_NO,
+                         p_err);
+        switch (*p_err) {
+            case NET_TCP_ERR_NONE:
+            case NET_TCP_ERR_CONN_ACK_NONE:
+            case NET_TCP_ERR_CONN_ACK_INVALID:
+            case NET_TCP_ERR_CONN_ACK_DLYD:
+            case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+            case NET_ERR_TX:                                    /* Ignore transitory tx err(s).                         */
+            case NET_ERR_IF_LINK_DOWN:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_CONN_CLOSE:
+            case NET_TCP_ERR_CONN_FAULT:
+            case NET_TCP_ERR_CONN_FAIL:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_TCP_ERR_INVALID_LEN_SEG:
+            case NET_TCP_ERR_NONE_AVAIL:
+            case NET_TCP_ERR_TX_PKT:
+            case NET_ERR_IF_LOOPBACK_DIS:
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_ADDR:
+            case NET_CONN_ERR_INVALID_ADDR_LEN:
+            default:
+                 return;
+        }
+
+    } else {                                                    /* Else tx TCP conn ack (see Note #2e3).                */
+        NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_IMMED, NET_TCP_CONN_CLOSE_ALL, p_err);
+        switch (*p_err) {
+            case NET_TCP_ERR_NONE:
+            case NET_TCP_ERR_CONN_ACK_NONE:
+            case NET_TCP_ERR_CONN_ACK_INVALID:
+            case NET_TCP_ERR_CONN_ACK_DLYD:
+            case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_CONN_FAULT:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_TCP_ERR_INVALID_LEN_SEG:
+            case NET_TCP_ERR_NONE_AVAIL:
+            default:
+                 return;
+        }
+    }
+
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_RxPktConnHandlerSyncTxd()
+*
+* Description : (1) Handle TCP connection in SYN-SENT state :
+*
+*                   (a) Validate received TCP packet for current TCP connection state :
+*
+*                       (1) Acknowledgement (ACK)                                           See Note  #2a
+*                       (2) Reset           (RST)                                           See Note  #2b
+*                       (3) Synchronization (SYN)                                           See Note  #2c
+*
+*                   (b) Update TCP connection :
+*                       (1) Configure TCP connection remote host maximum segment size       See Note  #3
+*                       (2) Handle received TCP segment                                     See Note  #2c
+*                       (3) Update    TCP connection state                                  See Notes #2c3A1 & #2c3B1
+*                       (4) Update    TCP connection timer
+*
+*                   (c) Acknowledge   TCP connection
+*                       (1) Signal    TCP/application connection complete
+*                       (2) Handle    TCP connection  received data                         See Note  #2c3A3
+*                       (3) Transmit  TCP connection  acknowledgement & data                See Note  #2c3A2
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence        number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Received segment's acknowledgement number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_SEQ_FIN_INVALID    Received segment's finish/close flag is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_VALID        Received segment's reset flag is     valid
+*                                                                       for current TCP connection; i.e. reset
+*                                                                       the TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      Received segment's reset flag is NOT valid
+*                                                                       for current TCP connection.
+*
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidSeq() : -----
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidAck() : -----
+*                                                                   ---- RETURNED BY NetTCP_RxPktConnIsValidReset() : ----
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnHandlerSeg() : -----
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data to   queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled &
+*                                                                       valid data queued for processing
+*                                                                       (see Notes #2c3A3 & #2c3B3).
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment
+*                                                                       data; NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment
+*                                                                       data; NOT queued to receive queue(s).
+*
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT       TCP connection transmit queue signal fault.
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*
+*                                                                   ---------- RETURNED BY NetTCP_TxConnTxQ() : ----------
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandler().
+*
+* Note(s)     : (2) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State]' states to :
+*
+*                   (a) "First check the ACK bit[;] if the ACK bit is set" :
+*
+*                       (1) "If SEG.ACK =< ISS, or SEG.ACK > SND.NXT, send a reset (unless the RST bit is
+*                            set) ... and discard the segment."
+*
+*                       (2) "If SND.UNA < SEG.ACK =< SND.NXT then the ACK is acceptable."
+*
+*                       See also 'NetTCP_RxPktConnIsValidAck()  Note #1c1A'.
+*
+*                   (b) "Second check the RST bit[;] if the RST bit is set [and] if the ACK was acceptable
+*                        then signal the user 'error: connection reset', drop the segment, [and] enter
+*                        CLOSED state."
+*
+*                        See also 'NetTCP_RxPktConnIsValidReset()  Notes #2a3 & #2a5C'.
+*
+*                   (c) "Fourth check the SYN bit[;] if the SYN bit is on and ... acceptable then" :
+*
+*                       (1) "RCV.NXT is set to SEG.SEQ+1, IRS is set to SEG.SEQ."
+*                           (A) See also Note #2c3B3a
+*
+*                       (2) (A) "SND.UNA should be advanced to equal SEG.ACK (if there is an ACK)" ...
+*
+*                           (B) "and any segments on the retransmission queue which are thereby acknowledged
+*                                should be removed."
+*
+*                       (3) (A) "If SND.UNA > ISS (our SYN has been ACKed)" :
+*
+*                               (1) "Change the connection state to ESTABLISHED" :
+*
+*                               (2) (a) "Form an ACK segment ... and send it."
+*
+*                                   (b) "Data or controls which were queued for transmission may be included."
+*
+*                               (3) "If there are other controls or text in the segment then continue processing."
+*
+*                               (4) RFC #1122, Section 4.2.2.20.(c) adds that "when the connection enters
+*                                   ESTABLISHED state, the following variables must be set" :
+*
+*                                   (a) SND.WND <- SEG.WND
+*                                   (b) SND.WL1 <- SEG.SEQ
+*                                   (c) SND.WL2 <- SEG.ACK
+*
+*                           (B) "Otherwise" :
+*
+*                               (1) "Enter SYN-RECEIVED," ...
+*
+*                               (2) "Form an SYN,ACK segment ... and send it."
+*
+*                               (3) "If there are other controls or text in the segment, queue them for later
+*                                    processing after the ESTABLISHED state has been reached."
+*
+*                                   (a) If any control or text is queued for later processing, the next sequence
+*                                       octet to receive (RCV.NXT) MUST include the length of this received
+*                                       segment (SEG.LEN) :
+*
+*                                       (1) RCV.NXT = SEG.SEQ + SEG.LEN + 1
+*
+*                   (d) "Fifth, if neither of the SYN or RST bits is set then drop the segment."
+*
+*                   (e) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                       to "not process the FIN if the state is CLOSED, LISTEN or SYN-SENT since the SEG.SEQ
+*                       cannot be validated; drop the segment".
+*
+*               (3) RFC #1122, Section 4.2.2.6 states that :
+*
+*                   (a) A "TCP SHOULD send an MSS (Maximum Segment Size) option in every SYN segment".
+*
+*                   (b) "If an MSS option is not received at connection setup, TCP MUST assume a default
+*                        send MSS of 536."
+*
+*               (4) (a) TCP connection timeout for SYN-SENT state is implemented by TCP connection retransmission
+*                       function(s) (see 'NetTCP_TxConnReTxQ()  Note #3c').
+*
+*                   (b) (1) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : USER TIMEOUT' states that
+*                           "for any state if the user timeout expires, flush all queues, signal the user
+*                           'error : connection aborted due to user timeout' ... [and] enter the CLOSED state".
+*
+*                       (2) However, NO RFC specifies or suggests any mechanism to implement/handle user timeouts.
+*
+*                           Therefore, it is assumed that ANY TCP connection that receives a valid TCP data
+*                           or control segment should reset its connection timer.
+*
+*                   (c) (1) Once a TCP connection enters the connected state, most of its TCP connection
+*                           timers should be reset.
+*
+*                       (2) However, the following timers MAY already have been allocated & initialized,
+*                           & MUST NOT be reset :
+*
+*                           (A)    Transmit Idle timer              'TxQ_IdleTmr'
+*                           (B) Re-transmit      timer              'ReTxQ_Tmr'
+*
+*               (5) Some  transitory errors were ignored &/or not returned from previous handler function(s).
+*                   These transitory errors are included for completeness & as an extra precaution in case
+*                   these transitory errors are returned by handler function(s).
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerSyncTxd (NET_TCP_CONN  *p_conn,
+                                              NET_BUF       *p_buf,
+                                              NET_BUF_HDR   *p_buf_hdr,
+                                              NET_ERR       *p_err)
+{
+    NET_TCP_SEG_SIZE    mss_dflt_tx;
+    NET_TCP_SEQ_CODE    seq_code;
+    NET_TCP_ACK_CODE    ack_code;
+    NET_TCP_RESET_CODE  reset_code;
+    NET_TCP_FREE_CODE   free_code;
+    NET_TCP_CONN_STATE  state;
+    NET_TMR_TICK        timeout_tick;
+    NET_ERR             err;
+    NET_ERR             err_rtn;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+                                                                /* Chk for rx'd fin/close.                              */
+    if (p_buf_hdr->TCP_SegClose != DEF_NO) {                    /* If invalid   fin/close rx'd, ...                     */
+       *p_err = NET_TCP_ERR_CONN_SEQ_FIN_INVALID;
+        return;                                                 /* ... ignore TCP pkt (see Note #2e).                   */
+    }
+
+                                                                /* Chk for rx'd ack.                                    */
+    ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    if (ack_code == NET_TCP_CONN_RX_ACK_INVALID) {              /* If invalid ack rx'd, ...                             */
+                                                                /* ... tx TCP conn reset (see Note #2a1).               */
+        NetTCP_TxConnReset(p_conn, p_buf_hdr, NET_TCP_CONN_TX_RESET, NET_TCP_CONN_CLOSE_ALL, &err);
+       *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+        return;
+    }
+
+                                                                /* Chk for rx'd reset.                                  */
+    reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (reset_code) {
+        case NET_TCP_CONN_RX_RESET_NONE:
+             break;
+
+
+        case NET_TCP_CONN_RX_RESET_VALID:                       /* If valid reset rx'd, close TCP conn (see Note #2b).  */
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_TCP_ERR_CONN_RESET_VALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_RESET_INVALID:
+        default:
+            *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+             return;
+    }
+
+                                                                /* Chk rx'd seq nbr.                                    */
+    seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    if (seq_code != NET_TCP_CONN_RX_SEQ_SYNC) {                 /* If sync NOT rx'd, ...                                */
+       *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+        return;                                                 /* ... ignore TCP pkt (see Note #2d).                   */
+    }
+                                                                /* Else sync avail, update seg lens.                    */
+    p_buf_hdr->TCP_SegLenInit += NET_TCP_SEG_LEN_SYNC;
+    p_buf_hdr->TCP_SegLen     += NET_TCP_SEG_LEN_SYNC;
+
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+                                                                /* Cfg remote max seg size ...                          */
+                                                                /* ... as advertised by remote host (see Note #3).      */
+    if (DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME) == DEF_YES) {
+#ifdef  NET_IPv6_MODULE_EN
+        mss_dflt_tx = NET_TCP_MAX_SEG_SIZE_DFLT_V6;
+#else
+       *p_err = NET_ERR_FAULT_FEATURE_DIS;
+        NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+        return;
+#endif
+    } else {
+#ifdef  NET_IPv4_MODULE_EN
+        mss_dflt_tx = NET_TCP_MAX_SEG_SIZE_DFLT_V4;
+#else
+       *p_err = NET_ERR_FAULT_FEATURE_DIS;
+        NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+        return;
+#endif
+    }
+
+    p_conn->MaxSegSizeRemote = (p_buf_hdr->TCP_MaxSegSize != NET_TCP_MAX_SEG_SIZE_NONE)
+                             ?  p_buf_hdr->TCP_MaxSegSize
+                             :  mss_dflt_tx;
+
+
+                                                                /* ----------------- HANDLE RX'D SEG ------------------ */
+    NetTCP_RxPktConnHandlerSeg(p_conn, ack_code, p_buf, p_buf_hdr, &err_rtn);
+    switch (err_rtn) {
+        case NET_TCP_ERR_CONN_DATA_NONE:
+        case NET_TCP_ERR_CONN_DATA_VALID:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s) [see Note #5].           */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_CONN_DATA_DUP:
+            *p_err = err_rtn;
+             return;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_FAIL:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_DATA_INVALID:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_TX_PKT:
+        case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+        case NET_TCP_ERR_RE_TX_SEG_TH:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = err_rtn;
+             return;
+    }
+
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+    state = p_conn->ConnState;
+    if (ack_code == NET_TCP_CONN_RX_ACK_VALID) {                /* If valid ack rx'd        (see Note #2a1), ...        */
+        p_conn->ConnState = NET_TCP_CONN_STATE_CONN;            /* ... chng to conn'd state (see Note #2c3A1).          */
+        p_conn->TxQ_State = NET_TCP_TX_Q_STATE_CONN;
+
+    } else {                                                    /* Else chng to sync rx'd state (see Note #2c3B1).      */
+        p_conn->ConnState = NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE;
+    }
+
+
+                                                                /* UPDATE TMR's                                         */
+    free_code = NET_TCP_CONN_FREE_TMR_ALL;                      /* See Note #4c1.                                       */
+    DEF_BIT_CLR(free_code, NET_TCP_CONN_FREE_TMR_TX_IDLE);      /* See Note #4c2A.                                      */
+    DEF_BIT_CLR(free_code, NET_TCP_CONN_FREE_TMR_RE_TX);        /* See Note #4c2B.                                      */
+
+    NetTCP_ConnFreeTmr(p_conn, free_code);                      /* Free TCP conn tmr(s) [see Note #4c].                 */
+
+
+    if (p_conn->ConnState == NET_TCP_CONN_STATE_CONN) {         /* If conn'd, get TCP conn tmr.                         */
+        timeout_tick      = p_conn->TimeoutConn_tick;           /* Start conn tmr (see Note #4b2).                      */
+        p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_ConnIdleTimeout,
+                                       (void        *) p_conn,
+                                       (NET_TMR_TICK ) timeout_tick,
+                                       (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                       (NET_ERR     *)&err);
+        if ( err != NET_TMR_ERR_NONE) {
+            NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_NONE_AVAIL;
+            return;
+        }
+    }
+
+
+
+                                                                /* ------------------- ACK TCP CONN ------------------- */
+    if (p_conn->ConnState == NET_TCP_CONN_STATE_CONN) {         /* If conn'd, ...                                       */
+        NetTCP_RxPktConnHandlerSignalConn(p_conn, state, &err); /* ... signal app conn           (see Note #1c1);   ... */
+        if ( err != NET_TCP_ERR_NONE) {
+            NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_CONN_FAIL;
+            return;
+        }
+
+        NetTCP_RxPktConnHandlerRxQ_AppData(p_conn, &err);       /* ... handle TCP conn rx'd data (see Note #2d2A1); ... */
+        if (err != NET_TCP_ERR_NONE) {
+           *p_err = NET_TCP_ERR_CONN_FAIL;
+            return;
+        }
+                                                                /* ... & tx ack & any tx data    (see Note #1c3).       */
+        NetTCP_TxConnTxQ(p_conn,
+                         p_buf_hdr,
+                         NET_TCP_CONN_TX_ACK_IMMED,
+                         DEF_NO,
+                         NET_TCP_CONN_CLOSE_ALL,
+                         DEF_NO,
+                         p_err);
+        switch (*p_err) {
+            case NET_TCP_ERR_NONE:
+            case NET_TCP_ERR_CONN_ACK_NONE:
+            case NET_TCP_ERR_CONN_ACK_INVALID:
+            case NET_TCP_ERR_CONN_ACK_DLYD:
+            case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+            case NET_ERR_TX:                                    /* Ignore transitory tx err(s).                         */
+            case NET_ERR_IF_LINK_DOWN:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_CONN_CLOSE:
+            case NET_TCP_ERR_CONN_FAULT:
+            case NET_TCP_ERR_CONN_FAIL:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_TCP_ERR_INVALID_LEN_SEG:
+            case NET_TCP_ERR_NONE_AVAIL:
+            case NET_TCP_ERR_TX_PKT:
+            case NET_ERR_IF_LOOPBACK_DIS:
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_ADDR:
+            case NET_CONN_ERR_INVALID_ADDR_LEN:
+            default:
+                 return;
+        }
+
+    } else {                                                    /* Else tx TCP conn sync/ack (see Note #2c3B2).         */
+        NetTCP_TxConnSync(p_conn, p_buf_hdr, state, &err);
+        if ( err != NET_TCP_ERR_NONE) {
+            NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_CONN_CLOSE;
+            return;
+        }
+    }
+
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_RxPktConnHandlerConn()
+*
+* Description : (1) Handle TCP connection in ESTABLISHED state :
+*
+*                   (a) Validate received TCP packet for current TCP connection state :
+*
+*                       (1) Sequence Number (SEQ)                                   See Note  #2a
+*                       (2) Reset           (RST)                                   See Note  #2b
+*                       (3) Synchronization (SYN)                                   See Note  #2c
+*                       (4) Acknowledgement (ACK)                                   See Note  #2d
+*                       (5) Finish/Close    (FIN)                                   See Note  #2f
+*
+*                   (b) Update TCP connection :
+*                       (1) Handle received TCP segment                             See Notes #2d & #2e
+*                       (2) Update TCP connection state                             See Note  #2f5
+*                       (3) Update TCP connection timer                             See Note  #3
+*
+*                   (c) Transmit TCP connection acknowledgement & data              See Notes #2e2A & #2f3
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_SEQ_SYNC_INVALID   Received segment's synchronization        is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence        number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_ACK_NONE           Received segment's acknowledgement        is
+*                                                                       NOT available.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Received segment's acknowledgement number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_VALID        Received segment's reset flag is     valid
+*                                                                       for current TCP connection; i.e. reset
+*                                                                       the TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      Received segment's reset flag is NOT valid
+*                                                                       for current TCP connection.
+*
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidSeq() : -----
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidAck() : -----
+*                                                                   ---- RETURNED BY NetTCP_RxPktConnIsValidReset() : ----
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnHandlerSeg() : -----
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data to   queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid
+*                                                                       data queued for processing.
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment
+*                                                                       data; NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment
+*                                                                       data; NOT queued to receive queue(s).
+*
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                               NET_TCP_ERR_RX_Q_FULL               TCP connection receive  queue full.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT       TCP connection receive  queue signal fault.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT       TCP connection transmit queue signal fault.
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*
+*                                                                   ---------- RETURNED BY NetTCP_TxConnTxQ() : ----------
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandler().
+*
+* Note(s)     : (2) TCP connections in the ESTABLISHED state are handled as follows :
+*
+*                   (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that in the "SYN-RECEIVED, ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2
+*                       STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE" that :
+*
+*                       (1) "Segments are processed in sequence ... processing is done in SEG.SEQ order."
+*
+*                       (2) "Initial tests on arrival are used to discard old duplicates."
+*
+*                       (3) "If a segment's contents straddle the boundary between old and new, only the
+*                            new parts should be processed."
+*
+*                       (4) (A) "If an incoming segment is not acceptable," ...
+*
+*                           (B) "an acknowledgment should be sent in reply" ...
+*
+*                           (C) "(unless the RST bit is set, if so drop the segment)".
+*
+*                               See also Notes #2b2Aa & #2b2B.
+*
+*                       See also 'NetTCP_RxPktConnIsValidSeq()  Note #1d'.
+*
+*                   (b) (1) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit' states
+*                               that in the "ESTABLISHED, FIN-WAIT-1, FIN-WAIT-2, CLOSE-WAIT" states that "if the
+*                               RST bit is set then, any outstanding RECEIVEs and SEND[s] should receive 'reset'
+*                               responses.  All segment queues should be flushed.  Users should also receive an
+*                               unsolicited general 'connection reset' signal[, and] enter the CLOSED state".
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing' reiterates
+*                               that "if the receiver ... of a RST ... was in any other state [other than LISTEN
+*                               or SYN-RECEIVED], it aborts the connection and advises the user and goes to the
+*                               CLOSED state".
+*
+*                       (2) (A) RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 amends the "handling of a segment
+*                               with the RST bit when in a synchronized state" to "provide some protection against
+*                               ... blind reset attack[s] using the RST bit" :
+*
+*                               (a) "If the RST bit is set and the sequence number is outside the expected
+*                                    window, silently drop the segment."
+*
+*                               (b) "If the RST bit is exactly the next expected sequence number [sic], reset
+*                                    the connection"; it is assumed that this should read "if the RST bit is
+*                                    set and the sequence number is exactly the next expected sequence number,
+*                                    reset the connection."
+*
+*                               (c) "If the RST bit is set and the sequence number does not exactly match
+*                                    the next expected sequence value, yet is within the acceptable window
+*                                    (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) send an acknowledgment."
+*
+*                           (B) In addition, RFC Draft-IETF-TCPm-TCPSecure #00 does NOT provide a precedence
+*                               priority for handling TCP segments received with BOTH the RST & SYN bits set.
+*
+*                               Therefore, since it does NOT seem reasonable to reset a TCP connection
+*                               due to a TCP segment that also attempted to synchronize the  TCP connection,
+*                               it is assumed that the amended handling of the SYN bit should take precedence
+*                               over the amended handling of the RST bit.
+*
+*                               See also Note #2c2.
+*
+*                   (c) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN Bit'
+*                           states that in the "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT STATE-1,
+*                           FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that :
+*
+*                           (A) "If the SYN is in the window it is an error, send a reset, any outstanding
+*                                RECEIVEs and SEND[s] should receive 'reset' responses, all segment queues
+*                                should be flushed, the user should also receive an unsolicited general
+*                               'connection reset' signal[, and] enter the CLOSED state."
+*
+*                           (B) But "if the SYN is not in the window this step would not have been reached
+*                               and an ack would have been sent".
+*
+*                       (2) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 3.2 amends the  "handling
+*                           of a segment with the SYN bit set in the synchronized state ... [by] handling
+*                           ... the SYN bit" as follows :
+*
+*                           (a) "If the SYN bit is set and the sequence number is outside the
+*                                expected window, send an ACK back to the peer."
+*
+*                           (b) "If the SYN bit is set and the sequence number is an exact
+*                                match to the next expected sequence (RCV.NXT == SEG.SEQ)
+*                                then send an ACK segment ... but ... subtract one from
+*                                value being acknowledged."
+*
+*                           (c) "If the SYN bit is set and the sequence number is acceptable,
+*                                i.e.: (RCV.NXT <= SEG.SEQ <= RCV.NXT+RCV.WND) then send an
+*                                ACK segment."
+*
+*                   (d) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field'
+*                       states that :
+*
+*                       (1) "If the ACK bit is off drop the segment."
+*
+*                       (2) "If the ACK bit is on [and in the] ESTABLISHED STATE" :
+*
+*                           (A) "If SND.UNA < SEG.ACK <= SND.NXT then" :
+*
+*                               (1) "Set SND.UNA <- SEG.ACK."
+*
+*                               (2) "Any segments on the retransmission queue which are thereby entirely
+*                                    acknowledged are removed."
+*
+*                               (3) "The send window should be updated" :
+*
+*                                   (a) (1) (A) "If ((SND.WL1 <  SEG.SEQ) or" ...
+*
+*                                           (B) (1) "(SND.WL1  = SEG.SEQ and" ...
+*                                               (2)  "SND.WL2 <= SEG.ACK)),"  ...
+*
+*                                       (2) (A) "Set SND.WND <- SEG.WND," ...
+*                                           (B) "Set SND.WL1 <- SEG.SEQ," ...
+*                                           (C) "Set SND.WL2 <- SEG.ACK."
+*
+*                                   (b) "Note that SND.WND is an offset from SND.UNA, that SND.WL1 records the
+*                                        sequence number of the last segment used to update SND.WND, and that
+*                                        SND.WL2 records the acknowledgment number of the last segment used to
+*                                        update SND.WND.  The check here prevents using old segments to update
+*                                        the window."
+*
+*                           (B) (1) "If the ACK is a duplicate (SEG.ACK <= SND.UNA), it can be ignored."
+*
+*                               (2) RFC #1122, Section 4.2.2.20.(g) amends the transmit window update criteria
+*                                   for the segment's acknowledgement to include SND.UNA : "The window should
+*                                   updated if SND.UNA <= SEG.ACK <= SND.NXT."
+*
+*                                   See also 'NetTCP_RxPktConnHandlerTxWinRemote()  Note #1b2'.
+*
+*                           (C) "If the ACK acks something not yet sent (SEG.ACK > SND.NXT) then send an ACK
+*                                [and] drop the segment."
+*
+*                   (e) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment Text'
+*                       states that for the "ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2 STATE ... it
+*                       is possible to deliver segment text to user RECEIVE buffers" :
+*
+*                       (1) "If the segment ... carries [a] PUSH flag, then the user is informed [and] the
+*                            buffer is returned."
+*
+*                       (2) (A) (1) "When the TCP takes responsibility for delivering the data to the user it
+*                                    must also acknowledge the receipt of the data."
+*
+*                               (2) "This acknowledgment should be piggybacked on a segment being transmitted
+*                                    if possible without incurring undue delay."
+*
+*                           (B) "Once the TCP takes responsibility for the data" :
+*
+*                               (1) "It advances RCV.NXT over the data accepted," ...
+*
+*                               (2) "Adjusts RCV.WND as appropriate to the current buffer availability" ...
+*
+*                               (3) (a) "The total of RCV.NXT and RCV.WND should not be reduced."
+*
+*                                   (b) RFC #793,  Section 3.7 'Data Communication : Managing the Window' &
+*                                       RFC #1122, Section 4.2.2.16 confirm that "a TCP receiver SHOULD NOT
+*                                       shrink the window"; i.e. "advertise a much smaller window without
+*                                       having accepted that much data".
+*
+*                   (f) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                       that "if the FIN bit is set" :
+*
+*                       (1) "Signal the user 'connection closing' and return any pending RECEIVEs with
+*                            same message," ...
+*
+*                       (2) "Advance RCV.NXT over the FIN," ...
+*
+*                       (3) "Send an acknowledgment for the FIN" ...
+*
+*                       (4) "FIN implies PUSH for any segment text not yet delivered to the user" ...
+*
+*                       (5) And the "ESTABLISHED STATE enter[s] the CLOSE-WAIT state".
+*
+*               (3) (a) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : USER TIMEOUT' states that
+*                       "for any state if the user timeout expires, flush all queues, signal the user
+*                       'error : connection aborted due to user timeout' ... [and] enter the CLOSED state".
+*
+*                   (b) However, NO RFC specifies or suggests any mechanism to implement/handle user timeouts.
+*
+*                       Therefore, it is assumed that ANY TCP connection that receives a valid TCP data
+*                       or control segment should reset its connection timer.
+*
+*               (4) Some  transitory errors were ignored &/or not returned from previous handler function(s).
+*                   These transitory errors are included for completeness & as an extra precaution in case
+*                   these transitory errors are returned by handler function(s).
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerConn (NET_TCP_CONN  *p_conn,
+                                           NET_BUF       *p_buf,
+                                           NET_BUF_HDR   *p_buf_hdr,
+                                           NET_ERR       *p_err)
+{
+    NET_TCP_SEQ_CODE    seq_code;
+    NET_TCP_ACK_CODE    ack_code;
+    NET_TCP_RESET_CODE  reset_code;
+    NET_TMR_TICK        timeout_tick;
+    CPU_BOOLEAN         keep_alive_rx = DEF_NO;
+    NET_ERR             err;
+    NET_ERR             err_rtn;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+                                                                /* Chk for rx'd fin/close.                              */
+    if (p_buf_hdr->TCP_SegClose == DEF_YES) {                   /* If fin/close avail, update seg lens.                 */
+        p_buf_hdr->TCP_SegLenInit += NET_TCP_SEG_LEN_CLOSE;
+        p_buf_hdr->TCP_SegLen     += NET_TCP_SEG_LEN_CLOSE;
+    }
+
+                                                                /* Chk rx'd seq nbr.                                    */
+    seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (seq_code) {
+        case NET_TCP_CONN_RX_SEQ_VALID:
+             break;
+
+        case NET_TCP_CONN_RX_SEQ_KEEP_ALIVE:
+             keep_alive_rx = DEF_YES;
+             break;
+
+
+        case NET_TCP_CONN_RX_SEQ_SYNC:                          /* If invalid sync rx'd, ...                            */
+        case NET_TCP_CONN_RX_SEQ_SYNC_INVALID:
+                                                                /* ... tx TCP conn ack  (see Notes #2c2 & #2b2B).       */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_SEQ_SYNC_INVALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_SEQ_NONE:
+        case NET_TCP_CONN_RX_SEQ_INVALID:                       /* If invalid seq  rx'd (see Note #2a4A), ...           */
+        default:
+             if (p_buf_hdr->TCP_SegReset != DEF_YES) {          /* ... & reset NOT rx'd (see Note #2a4C), ...           */
+                                                                /* ... tx TCP conn ack  (see Note #2a4B).               */
+                 NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+             }
+            *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd reset.                                  */
+    reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (reset_code) {
+        case NET_TCP_CONN_RX_RESET_NONE:
+             break;
+
+
+        case NET_TCP_CONN_RX_RESET_VALID:                       /* If   valid reset rx'd, ...                           */
+                                                                /* ...  close TCP conn (see Note #2b1A).                */
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_TCP_ERR_CONN_RESET_VALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_RESET_INVALID:                     /* If invalid reset rx'd, ...                           */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2b2Ac).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd ack.                                    */
+    ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (ack_code) {
+        case NET_TCP_CONN_RX_ACK_VALID:
+        case NET_TCP_CONN_RX_ACK_DUP:
+        case NET_TCP_CONN_RX_ACK_PREV:
+             break;
+
+
+        case NET_TCP_CONN_RX_ACK_NONE:                          /* If NO      ack rx'd, ...                             */
+            *p_err = NET_TCP_ERR_CONN_ACK_NONE;                 /* ... ignore TCP pkt  (see Note #2d1).                 */
+             return;
+
+        case NET_TCP_CONN_RX_ACK_OTW:
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_OTW, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+             return;
+
+        case NET_TCP_CONN_RX_ACK_INVALID:                       /* If invalid ack rx'd, ...                             */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2d2C).                */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+             return;
+    }
+
+
+    if (keep_alive_rx == DEF_NO) {
+                                                                /* ----------------- HANDLE RX'D SEG ------------------ */
+        NetTCP_RxPktConnHandlerSeg(p_conn, ack_code, p_buf, p_buf_hdr, &err_rtn);
+        switch (err_rtn) {
+            case NET_TCP_ERR_CONN_DATA_NONE:
+            case NET_TCP_ERR_CONN_DATA_VALID:
+            case NET_ERR_TX:                                    /* Ignore transitory tx err(s) [see Note #4].           */
+            case NET_ERR_IF_LINK_DOWN:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_DATA_DUP:
+                *p_err = err_rtn;
+                 return;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_CONN_FAIL:
+            case NET_TCP_ERR_CONN_FAULT:
+            case NET_TCP_ERR_CONN_ACK_INVALID:
+            case NET_TCP_ERR_CONN_DATA_INVALID:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_TCP_ERR_INVALID_LEN_SEG:
+            case NET_TCP_ERR_RX_Q_FULL:
+            case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+            case NET_TCP_ERR_TX_PKT:
+            case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+            case NET_TCP_ERR_RE_TX_SEG_TH:
+            case NET_ERR_IF_LOOPBACK_DIS:
+            default:
+                 NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+                *p_err = err_rtn;
+                 return;
+        }
+    }
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+    if (p_buf_hdr->TCP_SegClose == DEF_YES) {                   /* If fin/close rx'd, ...                               */
+        p_conn->ConnState = NET_TCP_CONN_STATE_CLOSE_WAIT;      /* ... chng to close-wait state (see Note #2f5).        */
+    }
+
+
+                                                                /* -------------------- UPDATE TMR -------------------- */
+    timeout_tick = p_conn->TimeoutConn_tick;                    /* Reset conn idle tmr (see Note #3b).                  */
+    if (p_conn->TimeoutTmr != DEF_NULL) {
+        NetTmr_Set((NET_TMR    *) p_conn->TimeoutTmr,
+                   (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+    } else {
+        p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_ConnIdleTimeout,
+                                       (void        *) p_conn,
+                                       (NET_TMR_TICK ) timeout_tick,
+                                       (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                       (NET_ERR     *)&err);
+    }
+
+    if ( err != NET_TMR_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+       *p_err  = NET_TCP_ERR_CONN_FAIL;
+        return;
+    }
+
+
+
+                                                                /* --------------- TX TCP CONN ACK/DATA --------------- */
+    ack_code = ((p_buf_hdr->TCP_SegAckTxReqCode == NET_TCP_CONN_TX_ACK_IMMED) ||
+                (p_buf_hdr->TCP_SegClose        == DEF_YES))    /* See Note #2f3.                                       */
+             ?   NET_TCP_CONN_TX_ACK_IMMED
+             :   NET_TCP_CONN_TX_ACK;
+                                                                /* Tx ack & any tx data (see Note #1c).                 */
+    NetTCP_TxConnTxQ(p_conn,
+                     p_buf_hdr,
+                     ack_code,
+                     DEF_NO,
+                     NET_TCP_CONN_CLOSE_ALL,
+                     DEF_NO,
+                     p_err);
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+        case NET_TCP_ERR_CONN_ACK_NONE:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_ACK_DLYD:
+        case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s).                         */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_CLOSE:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_CONN_FAIL:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_NONE_AVAIL:
+        case NET_TCP_ERR_TX_PKT:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        case NET_CONN_ERR_INVALID_FAMILY:
+        case NET_CONN_ERR_INVALID_ADDR:
+        case NET_CONN_ERR_INVALID_ADDR_LEN:
+        default:
+             return;
+    }
+
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_RxPktConnHandlerFinWait1()
+*
+* Description : (1) Handle TCP connection in FIN-WAIT-1 state :
+*
+*                   (a) Validate received TCP packet for current TCP connection state :
+*
+*                       (1) Sequence Number (SEQ)                                   See Note  #2a
+*                       (2) Reset           (RST)                                   See Note  #2b
+*                       (3) Synchronization (SYN)                                   See Note  #2c
+*                       (4) Acknowledgement (ACK)                                   See Note  #2d
+*                       (5) Finish/Close    (FIN)                                   See Note  #2f
+*
+*                   (b) Update TCP connection :
+*                       (1) Handle received TCP segment                             See Notes #2d   & #2e
+*                       (2) Signal TCP/application connection close                 See Note  #2d2B2
+*                       (3) Update TCP connection state :                           See Notes #2f5A1, #2f5A2b1, & #2f5B
+*                           (A) Configure TCP connection timeout value
+*                           (B) Configure TCP connection timeout function
+*                       (4) Update TCP connection timer(s)                          See Notes #2f5A1, #2f5A2b2, & #3
+*
+*                   (c) Transmit TCP connection acknowledgement & data              See Notes #2e2A & #2f3
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_SEQ_SYNC_INVALID   Received segment's synchronization        is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence        number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_ACK_NONE           Received segment's acknowledgement        is
+*                                                                       NOT available.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Received segment's acknowledgement number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_VALID        Received segment's reset flag is     valid
+*                                                                       for current TCP connection; i.e. reset
+*                                                                       the TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      Received segment's reset flag is NOT valid
+*                                                                       for current TCP connection.
+*
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidSeq() : -----
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidAck() : -----
+*                                                                   ---- RETURNED BY NetTCP_RxPktConnIsValidReset() : ----
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnHandlerSeg() : -----
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data to   queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid
+*                                                                       data queued for processing.
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment
+*                                                                       data; NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment
+*                                                                       data; NOT queued to receive queue(s).
+*
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                               NET_TCP_ERR_RX_Q_FULL               TCP connection receive  queue full.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT       TCP connection receive  queue signal fault.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT       TCP connection transmit queue signal fault.
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*
+*                                                                   - RETURNED BY NetTCP_RxPktConnHandlerSignalClose() : -
+*                               NET_TCP_ERR_INVALID_CONN_ID         Invalid application connection.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+*                                                                   ---------- RETURNED BY NetTCP_TxConnTxQ() : ----------
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandler().
+*
+* Note(s)     : (2) TCP connections in the FIN-WAIT-1 state are handled as follows :
+*
+*                   (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that in the "SYN-RECEIVED, ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2
+*                       STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE" that :
+*
+*                       (1) "Segments are processed in sequence ... processing is done in SEG.SEQ order."
+*
+*                       (2) "Initial tests on arrival are used to discard old duplicates."
+*
+*                       (3) "If a segment's contents straddle the boundary between old and new, only the
+*                            new parts should be processed."
+*
+*                       (4) (A) "If an incoming segment is not acceptable," ...
+*
+*                           (B) "an acknowledgment should be sent in reply" ...
+*
+*                           (C) "(unless the RST bit is set, if so drop the segment)".
+*
+*                               See also Notes #2b2Aa & #2b2B.
+*
+*                       See also 'NetTCP_RxPktConnIsValidSeq()  Note #1d'.
+*
+*                   (b) (1) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit' states
+*                               that in the "ESTABLISHED, FIN-WAIT-1, FIN-WAIT-2, CLOSE-WAIT" states that "if the
+*                               RST bit is set then, any outstanding RECEIVEs and SEND[s] should receive 'reset'
+*                               responses.  All segment queues should be flushed.  Users should also receive an
+*                               unsolicited general 'connection reset' signal[, and] enter the CLOSED state".
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing' reiterates
+*                               that "if the receiver ... of a RST ... was in any other state [other than LISTEN
+*                               or SYN-RECEIVED], it aborts the connection and advises the user and goes to the
+*                               CLOSED state".
+*
+*                       (2) (A) RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 amends the "handling of a segment
+*                               with the RST bit when in a synchronized state" to "provide some protection against
+*                               ... blind reset attack[s] using the RST bit" :
+*
+*                               (a) "If the RST bit is set and the sequence number is outside the expected
+*                                    window, silently drop the segment."
+*
+*                               (b) "If the RST bit is exactly the next expected sequence number [sic], reset
+*                                    the connection"; it is assumed that this should read "if the RST bit is
+*                                    set and the sequence number is exactly the next expected sequence number,
+*                                    reset the connection."
+*
+*                               (c) "If the RST bit is set and the sequence number does not exactly match
+*                                    the next expected sequence value, yet is within the acceptable window
+*                                    (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) send an acknowledgment."
+*
+*                           (B) In addition, RFC Draft-IETF-TCPm-TCPSecure #00 does NOT provide a precedence
+*                               priority for handling TCP segments received with BOTH the RST & SYN bits set.
+*
+*                               Therefore, since it does NOT seem reasonable to reset a TCP connection
+*                               due to a TCP segment that also attempted to synchronize the  TCP connection,
+*                               it is assumed that the amended handling of the SYN bit should take precedence
+*                               over the amended handling of the RST bit.
+*
+*                               See also Note #2c2.
+*
+*                   (c) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN Bit'
+*                           states that in the "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT STATE-1,
+*                           FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that :
+*
+*                           (A) "If the SYN is in the window it is an error, send a reset, any outstanding
+*                                RECEIVEs and SEND[s] should receive 'reset' responses, all segment queues
+*                                should be flushed, the user should also receive an unsolicited general
+*                               'connection reset' signal[, and] enter the CLOSED state."
+*
+*                           (B) But "if the SYN is not in the window this step would not have been reached
+*                               and an ack would have been sent".
+*
+*                       (2) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 3.2 amends the  "handling
+*                           of a segment with the SYN bit set in the synchronized state ... [by] handling
+*                           ... the SYN bit" as follows :
+*
+*                           (a) "If the SYN bit is set and the sequence number is outside the
+*                                expected window, send an ACK back to the peer."
+*
+*                           (b) "If the SYN bit is set and the sequence number is an exact
+*                                match to the next expected sequence (RCV.NXT == SEG.SEQ)
+*                                then send an ACK segment ... but ... subtract one from
+*                                value being acknowledged."
+*
+*                           (c) "If the SYN bit is set and the sequence number is acceptable,
+*                                i.e.: (RCV.NXT <= SEG.SEQ <= RCV.NXT+RCV.WND) then send an
+*                                ACK segment."
+*
+*                   (d) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field'
+*                       states that :
+*
+*                       (1) "If the ACK bit is off drop the segment."
+*
+*                       (2) "If the ACK bit is on" :
+*
+*                           (A) And in the "ESTABLISHED STATE" :
+*
+*                               (1) "If SND.UNA < SEG.ACK <= SND.NXT then" :
+*
+*                                   (a) "Set SND.UNA <- SEG.ACK."
+*
+*                                   (b) "Any segments on the retransmission queue which are thereby entirely
+*                                        acknowledged are removed."
+*
+*                                   (c) "The send window should be updated" :
+*
+*                                       (1) (A) (1) "If ((SND.WL1 <  SEG.SEQ) or" ...
+*
+*                                               (2) (a) "(SND.WL1  = SEG.SEQ and" ...
+*                                                   (b)  "SND.WL2 <= SEG.ACK)),"  ...
+*
+*                                           (B) (1) "Set SND.WND <- SEG.WND," ...
+*                                               (2) "Set SND.WL1 <- SEG.SEQ," ...
+*                                               (3) "Set SND.WL2 <- SEG.ACK."
+*
+*                                       (2) "Note that SND.WND is an offset from SND.UNA, that SND.WL1 records the
+*                                            sequence number of the last segment used to update SND.WND, and that
+*                                            SND.WL2 records the acknowledgment number of the last segment used to
+*                                            update SND.WND.  The check here prevents using old segments to update
+*                                            the window."
+*
+*                               (2) (a) "If the ACK is a duplicate (SEG.ACK <= SND.UNA), it can be ignored."
+*
+*                                   (b) RFC #1122, Section 4.2.2.20.(g) amends the transmit window update criteria
+*                                       for the segment's acknowledgement to include SND.UNA : "The window should
+*                                       updated if SND.UNA <= SEG.ACK <= SND.NXT."
+*
+*                                       See also 'NetTCP_RxPktConnHandlerTxWinRemote()  Note #1b2'.
+*
+*                               (3) "If the ACK acks something not yet sent (SEG.ACK > SND.NXT) then send an ACK
+*                                    [and] drop the segment."
+*
+*                           (B) (1) For the "FIN-WAIT-1 STATE" :
+*
+*                                   (a) "In addition to the processing for the ESTABLISHED state" ...
+*                                   (b) "If our FIN is now acknowledged then"                     ...
+*                                       (1) "Enter FIN-WAIT-2 [state] and continue processing in that state."
+*
+*                               (2) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                                       FIN-WAIT-2 STATE' states that "if the retransmission queue is empty, the user's
+*                                       CLOSE can be acknowledged".
+*
+*                                   (b) However, a TCP connection transitions into the FIN-WAIT-2 state if & only if
+*                                       the TCP connection's close request was previously acknowledged while in the
+*                                       FIN-WAIT-1 state.  Thus the TCP connection's re-transmit queue should
+*                                       already be empty prior to entering the FIN-WAIT-2 state.
+*
+*                                       Therefore, a TCP connection in the FIN-WAIT-1 state should :
+*
+*                                       (1) Signal the application layer that "the user's close [is] acknowledged"
+*                                           whenever its re-transmit queue becomes empty.
+*
+*                                       (2) Close all unused timers (see also Note #2f5A1b).
+*
+*                   (e) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment Text'
+*                       states that for the "ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2 STATE ... it
+*                       is possible to deliver segment text to user RECEIVE buffers" :
+*
+*                       (1) "If the segment ... carries [a] PUSH flag, then the user is informed [and] the
+*                            buffer is returned."
+*
+*                       (2) (A) (1) "When the TCP takes responsibility for delivering the data to the user it
+*                                    must also acknowledge the receipt of the data."
+*
+*                               (2) "This acknowledgment should be piggybacked on a segment being transmitted
+*                                    if possible without incurring undue delay."
+*
+*                           (B) "Once the TCP takes responsibility for the data" :
+*
+*                               (1) "It advances RCV.NXT over the data accepted," ...
+*
+*                               (2) "Adjusts RCV.WND as appropriate to the current buffer availability" ...
+*
+*                               (3) (a) "The total of RCV.NXT and RCV.WND should not be reduced."
+*
+*                                   (b) RFC #793,  Section 3.7 'Data Communication : Managing the Window' &
+*                                       RFC #1122, Section 4.2.2.16 confirm that "a TCP receiver SHOULD NOT
+*                                       shrink the window"; i.e. "advertise a much smaller window without
+*                                       having accepted that much data".
+*
+*                   (f) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                       that "if the FIN bit is set" :
+*
+*                       (1) "Signal the user 'connection closing' and return any pending RECEIVEs with
+*                            same message," ...
+*
+*                       (2) "Advance RCV.NXT over the FIN," ...
+*
+*                       (3) "Send an acknowledgment for the FIN" ...
+*
+*                       (4) "FIN implies PUSH for any segment text not yet delivered to the user" ...
+*
+*                       (5) For the "FIN-WAIT-1 STATE" :
+*
+*                           (A) "If our FIN has been ACKed (perhaps in this segment), then" :
+*
+*                               (1) "Enter TIME-WAIT [state]" ...
+*                                   (a) "Start the time-wait timer,  ...
+*                                       (1) A TCP connection should be closed WITHOUT fault following a TCP
+*                                           connection TIME-WAIT timeout.
+*
+*                                   (b) "Turn off the other timers;" ...
+*
+*                               (2) However, it is possible that some closing received data from the remote
+*                                   host is available but has NOT yet been received by the application layer.
+*
+*                                   (a) Therefore, if the application receive queue is closed, then enter the
+*                                       TIME-WAIT state.
+*
+*                                   (b) (1) But if the application receive queue is NOT closed, then enter the
+*                                           connection-closing-data-available state to allow the application
+*                                           layer to receive the remaining receive data.
+*
+*                                       (2) (A) To satisfy the required time-wait timeout of two maximum segment
+*                                               lifetimes (see Note #2f5A1a), the time-wait timeout is initially
+*                                               used to provide the application layer sufficient time to receive
+*                                               the closing received data.
+*
+*                                           (B) If after the time-wait timeout expires, the application receive
+*                                               queue is still not empty, the user connection timeout is used
+*                                               to provide the application layer additional time to receive the
+*                                               closing received data.
+*
+*                                           See also Note #3a.
+*
+*                           (B) "Otherwise, enter the CLOSING state."
+*
+*               (3) (a) (1) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : USER TIMEOUT' states that
+*                           "for any state if the user timeout expires, flush all queues, signal the user
+*                           'error : connection aborted due to user timeout' ... [and] enter the CLOSED state".
+*
+*                       (2) However, NO RFC specifies or suggests any mechanism to implement/handle user timeouts.
+*
+*                           Therefore, it is assumed that ANY TCP connection that receives a valid TCP data
+*                           or control segment should reset its connection timer.
+*
+*                   (b) (1) (A) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 18.6 'FIN_WAIT_2
+*                               State', Page 246 states that "in the FIN_WAIT_2 state we have sent our FIN and
+*                               the other end has acknowledged it ... [and] we are waiting for the application
+*                               on the other end to recognize that it has received an end-of-file notification
+*                               and close its end of the connection, which sends us a FIN.  Only when the
+*                               process at the other end does this will our end move from the FIN_WAIT_2 to
+*                               the TIME_WAIT state.  This means our end of the connection can remain in this
+*                               state forever.  The other end is still in the CLOSE_WAIT state, and can remain
+*                               there forever, until the application decides to issue its close".
+*
+*                           (B) "Many Berkeley-derived implementations prevent this infinite wait in the
+*                                FIN_WAIT_2 state" by :
+*
+*                                (1) "Mov[ing] the connection into the CLOSED state" ...
+*                                (2) "if the connection is idle for 10 minutes plus 75 seconds."
+*
+*                       (2) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.1 'A FIN_WAIT_2
+*                           timer', Page 818 states that "to avoid leaving a connection in the FIN_WAIT_2 state
+*                           forever, if the other end never sends a FIN" :
+*
+*                           (A) (1) "When a connection moves from the FIN_WAIT_1 state to the FIN_WAIT_2 state" ...
+*                               (2) "and the connection cannot receive any more data [implying the process called
+*                                    close(), instead of ... half-close ... shutdown()]," ...
+*
+*                           (B) (1)  The TCP connection's "timer is set to 10 minutes ... [and] 75 seconds," ...
+*                               (2) "and when it expires ... the connection is dropped".
+*
+*                       (3) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6 'FIN_WAIT_2
+*                           and 2MSL Timers : FIN_WAIT_2 timer', Pages 825-827 adds that "terminating an idle
+*                           connection after more than 10 minutes in the FIN_WAIT_2 state violates the protocol
+*                           specification, but this is practical ... [since] all outstanding data on the connection
+*                           has been sent and acknowledged, the other end has acknowledged the FIN, and TCP is
+*                           waiting for the process at the other end of the connection to issue its close().  If
+*                           the other process never closes its end of the connection, our end can remain in the
+*                           FIN_WAIT_2 [state] forever".
+*
+*               (4) Since the mechanisms of TCP connection close are independent of the application layer
+*                   close; any external application layer close error(s) are ignored.
+*
+*               (5) Some  transitory errors were ignored &/or not returned from previous handler function(s).
+*                   These transitory errors are included for completeness & as an extra precaution in case
+*                   these transitory errors are returned by handler function(s).
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerFinWait1 (NET_TCP_CONN  *p_conn,
+                                               NET_BUF       *p_buf,
+                                               NET_BUF_HDR   *p_buf_hdr,
+                                               NET_ERR       *p_err)
+{
+    NET_TCP_SEQ_CODE    seq_code;
+    NET_TCP_ACK_CODE    ack_code;
+    NET_TCP_RESET_CODE  reset_code;
+    CPU_BOOLEAN         data_avail;
+    NET_TMR_TICK        timeout_tick;
+    CPU_FNCT_PTR        timeout_fnct;
+    NET_TCP_FREE_CODE   free_code;
+    NET_ERR             err;
+    NET_ERR             err_rtn;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+                                                                /* Chk for rx'd fin/close.                              */
+    if (p_buf_hdr->TCP_SegClose == DEF_YES) {                   /* If fin/close avail, update seg lens.                 */
+        p_buf_hdr->TCP_SegLenInit += NET_TCP_SEG_LEN_CLOSE;
+        p_buf_hdr->TCP_SegLen     += NET_TCP_SEG_LEN_CLOSE;
+    }
+
+                                                                /* Chk rx'd seq nbr.                                    */
+    seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (seq_code) {
+        case NET_TCP_CONN_RX_SEQ_VALID:
+             break;
+
+
+        case NET_TCP_CONN_RX_SEQ_SYNC:                          /* If invalid sync rx'd, ...                            */
+        case NET_TCP_CONN_RX_SEQ_SYNC_INVALID:
+                                                                /* ... tx TCP conn ack  (see Notes #2c2 & #2b2B).       */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_SEQ_SYNC_INVALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_SEQ_NONE:
+        case NET_TCP_CONN_RX_SEQ_INVALID:                       /* If invalid seq  rx'd (see Note #2a4A), ...           */
+        default:
+             if (p_buf_hdr->TCP_SegReset != DEF_YES) {          /* ... & reset NOT rx'd (see Note #2a4C), ...           */
+                                                                /* ... tx TCP conn ack  (see Note #2a4B).               */
+                 NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+             }
+            *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd reset.                                  */
+    reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (reset_code) {
+        case NET_TCP_CONN_RX_RESET_NONE:
+             break;
+
+
+        case NET_TCP_CONN_RX_RESET_VALID:                       /* If   valid reset rx'd, ...                           */
+                                                                /* ...  close TCP conn (see Note #2b1A).                */
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_TCP_ERR_CONN_RESET_VALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_RESET_INVALID:                     /* If invalid reset rx'd, ...                           */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2b2Ac).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd ack.                                    */
+    ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (ack_code) {
+        case NET_TCP_CONN_RX_ACK_VALID:
+        case NET_TCP_CONN_RX_ACK_DUP:
+        case NET_TCP_CONN_RX_ACK_PREV:
+             break;
+
+
+        case NET_TCP_CONN_RX_ACK_NONE:                          /* If NO      ack rx'd, ...                             */
+            *p_err = NET_TCP_ERR_CONN_ACK_NONE;                 /* ... ignore TCP pkt  (see Note #2d1).                 */
+             return;
+
+
+        case NET_TCP_CONN_RX_ACK_INVALID:                       /* If invalid ack rx'd, ...                             */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2d2A3).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+             return;
+    }
+
+
+
+                                                                /* ----------------- HANDLE RX'D SEG ------------------ */
+    NetTCP_RxPktConnHandlerSeg(p_conn, ack_code, p_buf, p_buf_hdr, &err_rtn);
+    switch (err_rtn) {
+        case NET_TCP_ERR_CONN_DATA_NONE:
+        case NET_TCP_ERR_CONN_DATA_VALID:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s) [see Note #5].           */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_CONN_DATA_DUP:
+            *p_err = err_rtn;
+             return;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_FAIL:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_DATA_INVALID:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_RX_Q_FULL:
+        case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+        case NET_TCP_ERR_TX_PKT:
+        case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+        case NET_TCP_ERR_RE_TX_SEG_TH:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = err_rtn;
+             return;
+    }
+
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+    timeout_fnct = (CPU_FNCT_PTR)0;
+                                                                /* If local conn close ack'd (see Note #2f5A);      ... */
+    if ((p_conn->TxQ_State == NET_TCP_TX_Q_STATE_CLOSED        ) ||
+        (p_conn->TxQ_State == NET_TCP_TX_Q_STATE_CLOSED_SUSPEND)) {
+                                                                /* Closing data avail for half-closed conns ONLY.       */
+        data_avail = ((p_conn->ConnCloseCode !=  NET_CONN_CLOSE_HALF      ) ||
+                     ((p_conn->RxQ_State     ==  NET_TCP_RX_Q_STATE_CLOSED) &&
+                      (p_conn->RxQ_App_Head  == DEF_NULL))) ? DEF_NO : DEF_YES;
+
+                                                                /* ... signal app conn close (see Note #2d2B2b1);   ... */
+        NetTCP_RxPktConnHandlerSignalClose(p_conn, data_avail, &err);
+        switch (err) {
+            case NET_TCP_ERR_NONE:
+            case NET_TCP_ERR_CONN_FAIL:                         /* Ignore any app conn close err(s) [see Note #4].      */
+            case NET_TCP_ERR_INVALID_CONN_ID:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_CONN_ERR_NOT_USED:
+            default:
+                 NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+                *p_err = err;
+                 return;
+        }
+
+        if (p_buf_hdr->TCP_SegClose == DEF_YES) {               /* ... & if fin/close rx'd                          ... */
+
+            if (data_avail != DEF_YES) {                        /* ... & NO app data avail,                         ... */
+                                                                /* ... chng to time-wait state (see Note  #2f5A2a); ... */
+                p_conn->ConnState                 =  NET_TCP_CONN_STATE_TIME_WAIT;
+                p_conn->ConnCloseTimeoutFaultFlag =  DEF_NO;    /* ... clr close timeout fault (see Note  #2f5A1a1);... */
+                timeout_fnct                     = (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout;
+
+            } else {                                            /* ... else chng to conn-closing-data-avail state   ... */
+                                                                /* ...                         (see Note  #2f5A2b1);... */
+                p_conn->ConnState =  NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL;
+                timeout_fnct     = (CPU_FNCT_PTR)&NetTCP_ConnClosingTimeoutDataAvail;
+            }
+                                                                /* ... & start time-wait tmr   (see Notes #2f5A1a & ... */
+                                                                /* ...                                    #2f5A2b2A).   */
+            timeout_tick     =  p_conn->TimeoutMaxSeg_tick_scaled;
+
+        } else {
+            p_conn->ConnState =  NET_TCP_CONN_STATE_FIN_WAIT_2; /* ... else chng to fin-wait-2 state (see Note #2d2B1b1)*/
+                                                                /* ... & start      fin-wait-2 tmr   (see Note #3b).    */
+            timeout_tick     =  NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC * NET_TMR_TIME_TICK_PER_SEC;
+            timeout_fnct     = (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout;
+        }
+
+
+    } else {
+        if (p_buf_hdr->TCP_SegClose == DEF_YES) {               /* Else if fin/close rx'd,                     ...      */
+            p_conn->ConnState =  NET_TCP_CONN_STATE_CLOSING;    /* ... chng to closing state  (see Note #2f5B) ...      */
+            timeout_tick     =  p_conn->TimeoutConn_tick;       /* ... & start conn close tmr (see Note #3a2).          */
+            timeout_fnct     = (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout;
+        }
+    }
+
+
+                                                                /* UPDATE TMR's                                         */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_TIME_WAIT:                      /* If in time-wait            (see Note #2f5A1)    ...  */
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:             /* ... or closing state(s)    [see Note #2d2B2b2], ...  */
+             free_code = NET_TCP_CONN_FREE_TMR_ALL;             /* ... free all TCP conn tmrs (see Note #2f5A1b).       */
+             DEF_BIT_CLR(free_code, NET_TCP_CONN_FREE_TMR_TIMEOUT);
+             NetTCP_ConnFreeTmr(p_conn, free_code);
+             break;
+
+
+        default:                                                /* 'default' case intentionally empty.                  */
+             break;
+    }
+
+
+    if (timeout_fnct != (CPU_FNCT_PTR)0) {
+        if (p_conn->TimeoutTmr != DEF_NULL) {
+            NetTmr_Set((NET_TMR    *) p_conn->TimeoutTmr,
+                       (CPU_FNCT_PTR) timeout_fnct,
+                       (NET_TMR_TICK) timeout_tick,
+                       (NET_ERR    *)&err);
+        } else {
+            p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR ) timeout_fnct,
+                                           (void        *) p_conn,
+                                           (NET_TMR_TICK ) timeout_tick,
+                                           (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                           (NET_ERR     *)&err);
+        }
+
+        if ( err != NET_TMR_ERR_NONE) {
+            NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_CONN_FAIL;
+            return;
+        }
+    }
+
+
+
+                                                                /* --------------- TX TCP CONN ACK/DATA --------------- */
+    ack_code = ((p_buf_hdr->TCP_SegAckTxReqCode == NET_TCP_CONN_TX_ACK_IMMED) ||
+                (p_buf_hdr->TCP_SegClose        == DEF_YES))    /* See Note #2f3.                                       */
+             ?   NET_TCP_CONN_TX_ACK_IMMED
+             :   NET_TCP_CONN_TX_ACK;
+
+    if ((p_conn->ConnState == NET_TCP_CONN_STATE_FIN_WAIT_1) || /* If TCP conn tx Q NOT closed, ...                     */
+        (p_conn->ConnState == NET_TCP_CONN_STATE_CLOSING   )) { /* ... tx ack & any tx data (see Note #1c).             */
+        NetTCP_TxConnTxQ(p_conn,
+                         p_buf_hdr,
+                         ack_code,
+                         DEF_NO,
+                         NET_TCP_CONN_CLOSE_ALL,
+                         DEF_NO,
+                         p_err);
+        switch (*p_err) {
+            case NET_TCP_ERR_NONE:
+            case NET_TCP_ERR_CONN_ACK_NONE:
+            case NET_TCP_ERR_CONN_ACK_INVALID:
+            case NET_TCP_ERR_CONN_ACK_DLYD:
+            case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+            case NET_ERR_TX:                                    /* Ignore transitory tx err(s).                         */
+            case NET_ERR_IF_LINK_DOWN:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_CONN_CLOSE:
+            case NET_TCP_ERR_CONN_FAULT:
+            case NET_TCP_ERR_CONN_FAIL:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_TCP_ERR_INVALID_LEN_SEG:
+            case NET_TCP_ERR_NONE_AVAIL:
+            case NET_TCP_ERR_TX_PKT:
+            case NET_ERR_IF_LOOPBACK_DIS:
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_ADDR:
+            case NET_CONN_ERR_INVALID_ADDR_LEN:
+            default:
+                 return;
+        }
+
+    } else {                                                    /* Else tx TCP conn ack (see Note #2f3).                */
+        NetTCP_TxConnAck(p_conn, p_buf_hdr, ack_code, NET_TCP_CONN_CLOSE_ALL, p_err);
+        switch (*p_err) {
+            case NET_TCP_ERR_NONE:
+            case NET_TCP_ERR_CONN_ACK_NONE:
+            case NET_TCP_ERR_CONN_ACK_INVALID:
+            case NET_TCP_ERR_CONN_ACK_DLYD:
+            case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_CONN_FAULT:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_TCP_ERR_INVALID_LEN_SEG:
+            case NET_TCP_ERR_NONE_AVAIL:
+            default:
+                 return;
+        }
+    }
+
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_RxPktConnHandlerFinWait2()
+*
+* Description : (1) Handle TCP connection in FIN-WAIT-2 state :
+*
+*                   (a) Validate received TCP packet for current TCP connection state :
+*
+*                       (1) Sequence Number (SEQ)                                   See Note  #2a
+*                       (2) Reset           (RST)                                   See Note  #2b
+*                       (3) Synchronization (SYN)                                   See Note  #2c
+*                       (4) Acknowledgement (ACK)                                   See Note  #2d
+*                       (5) Finish/Close    (FIN)                                   See Note  #2f
+*
+*                   (b) Update TCP connection :
+*                       (1) Handle received TCP segment                             See Notes #2d   & #2e
+*                       (2) Update TCP connection state :                           See Notes #2f5A & #2f5B2a
+*                           (A) Configure TCP connection timeout value
+*                           (B) Configure TCP connection timeout function
+*                       (3) Update TCP connection timer(s)                          See Notes #2f5A,  #2f5B2b, & #3
+*
+*                   (c) Transmit TCP connection acknowledgement                     See Notes #2e2A & #2f3
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_SEQ_SYNC_INVALID   Received segment's synchronization        is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence        number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_ACK_NONE           Received segment's acknowledgement        is
+*                                                                       NOT available.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Received segment's acknowledgement number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_VALID        Received segment's reset flag is     valid
+*                                                                       for current TCP connection; i.e. reset
+*                                                                       the TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      Received segment's reset flag is NOT valid
+*                                                                       for current TCP connection.
+*
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*
+*                                                                   -- RETURNED BY NetTCP_RxPktConnIsValidSeq() : --
+*                                                                   -- RETURNED BY NetTCP_RxPktConnIsValidAck() : --
+*                                                                   - RETURNED BY NetTCP_RxPktConnIsValidReset() : -
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   -- RETURNED BY NetTCP_RxPktConnHandlerSeg() : --
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data to   queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid
+*                                                                       data queued for processing.
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment
+*                                                                       data; NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment
+*                                                                       data; NOT queued to receive queue(s).
+*
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                               NET_TCP_ERR_RX_Q_FULL               TCP connection receive queue full.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT       TCP connection receive queue signal fault.
+*
+*                                                                   ------- RETURNED BY NetTCP_TxConnAck() : -------
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandler().
+*
+* Note(s)     : (2) TCP connections in the FIN-WAIT-2 state are handled as follows :
+*
+*                   (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that in the "SYN-RECEIVED, ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2
+*                       STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE" that :
+*
+*                       (1) "Segments are processed in sequence ... processing is done in SEG.SEQ order."
+*
+*                       (2) "Initial tests on arrival are used to discard old duplicates."
+*
+*                       (3) "If a segment's contents straddle the boundary between old and new, only the
+*                            new parts should be processed."
+*
+*                       (4) (A) "If an incoming segment is not acceptable," ...
+*
+*                           (B) "an acknowledgment should be sent in reply" ...
+*
+*                           (C) "(unless the RST bit is set, if so drop the segment)".
+*
+*                               See also Notes #2b2Aa & #2b2B.
+*
+*                       See also 'NetTCP_RxPktConnIsValidSeq()  Note #1d'.
+*
+*                   (b) (1) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit' states
+*                               that in the "ESTABLISHED, FIN-WAIT-1, FIN-WAIT-2, CLOSE-WAIT" states that "if the
+*                               RST bit is set then, any outstanding RECEIVEs and SEND[s] should receive 'reset'
+*                               responses.  All segment queues should be flushed.  Users should also receive an
+*                               unsolicited general 'connection reset' signal[, and] enter the CLOSED state".
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing' reiterates
+*                               that "if the receiver ... of a RST ... was in any other state [other than LISTEN
+*                               or SYN-RECEIVED], it aborts the connection and advises the user and goes to the
+*                               CLOSED state".
+*
+*                       (2) (A) RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 amends the "handling of a segment
+*                               with the RST bit when in a synchronized state" to "provide some protection against
+*                               ... blind reset attack[s] using the RST bit" :
+*
+*                               (a) "If the RST bit is set and the sequence number is outside the expected
+*                                    window, silently drop the segment."
+*
+*                               (b) "If the RST bit is exactly the next expected sequence number [sic], reset
+*                                    the connection"; it is assumed that this should read "if the RST bit is
+*                                    set and the sequence number is exactly the next expected sequence number,
+*                                    reset the connection."
+*
+*                               (c) "If the RST bit is set and the sequence number does not exactly match
+*                                    the next expected sequence value, yet is within the acceptable window
+*                                    (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) send an acknowledgment."
+*
+*                           (B) In addition, RFC Draft-IETF-TCPm-TCPSecure #00 does NOT provide a precedence
+*                               priority for handling TCP segments received with BOTH the RST & SYN bits set.
+*
+*                               Therefore, since it does NOT seem reasonable to reset a TCP connection
+*                               due to a TCP segment that also attempted to synchronize the  TCP connection,
+*                               it is assumed that the amended handling of the SYN bit should take precedence
+*                               over the amended handling of the RST bit.
+*
+*                               See also Note #2c2.
+*
+*                   (c) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN Bit'
+*                           states that in the "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT STATE-1,
+*                           FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that :
+*
+*                           (A) "If the SYN is in the window it is an error, send a reset, any outstanding
+*                                RECEIVEs and SEND[s] should receive 'reset' responses, all segment queues
+*                                should be flushed, the user should also receive an unsolicited general
+*                               'connection reset' signal[, and] enter the CLOSED state."
+*
+*                           (B) But "if the SYN is not in the window this step would not have been reached
+*                               and an ack would have been sent".
+*
+*                       (2) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 3.2 amends the  "handling
+*                           of a segment with the SYN bit set in the synchronized state ... [by] handling
+*                           ... the SYN bit" as follows :
+*
+*                           (a) "If the SYN bit is set and the sequence number is outside the
+*                                expected window, send an ACK back to the peer."
+*
+*                           (b) "If the SYN bit is set and the sequence number is an exact
+*                                match to the next expected sequence (RCV.NXT == SEG.SEQ)
+*                                then send an ACK segment ... but ... subtract one from
+*                                value being acknowledged."
+*
+*                           (c) "If the SYN bit is set and the sequence number is acceptable,
+*                                i.e.: (RCV.NXT <= SEG.SEQ <= RCV.NXT+RCV.WND) then send an
+*                                ACK segment."
+*
+*                   (d) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field'
+*                       states that :
+*
+*                       (1) "If the ACK bit is off drop the segment."
+*
+*                       (2) "If the ACK bit is on" :
+*
+*                           (A) And in the "ESTABLISHED STATE" :
+*
+*                               (1) "If SND.UNA < SEG.ACK <= SND.NXT then" :
+*
+*                                   (a) "Set SND.UNA <- SEG.ACK."
+*
+*                                   (b) "Any segments on the retransmission queue which are thereby entirely
+*                                        acknowledged are removed."
+*
+*                                   (c) "The send window should be updated" :
+*
+*                                       (1) (A) (1) "If ((SND.WL1 <  SEG.SEQ) or" ...
+*
+*                                               (2) (a) "(SND.WL1  = SEG.SEQ and" ...
+*                                                   (b)  "SND.WL2 <= SEG.ACK)),"  ...
+*
+*                                           (B) (1) "Set SND.WND <- SEG.WND," ...
+*                                               (2) "Set SND.WL1 <- SEG.SEQ," ...
+*                                               (3) "Set SND.WL2 <- SEG.ACK."
+*
+*                                       (2) "Note that SND.WND is an offset from SND.UNA, that SND.WL1 records the
+*                                            sequence number of the last segment used to update SND.WND, and that
+*                                            SND.WL2 records the acknowledgment number of the last segment used to
+*                                            update SND.WND.  The check here prevents using old segments to update
+*                                            the window."
+*
+*                               (2) (a) "If the ACK is a duplicate (SEG.ACK <= SND.UNA), it can be ignored."
+*
+*                                   (b) RFC #1122, Section 4.2.2.20.(g) amends the transmit window update criteria
+*                                       for the segment's acknowledgement to include SND.UNA : "The window should
+*                                       updated if SND.UNA <= SEG.ACK <= SND.NXT."
+*
+*                                       See also 'NetTCP_RxPktConnHandlerTxWinRemote()  Note #1b2'.
+*
+*                               (3) "If the ACK acks something not yet sent (SEG.ACK > SND.NXT) then send an ACK
+*                                    [and] drop the segment."
+*
+*                           (B) For the "FIN-WAIT-2 STATE" :
+*
+*                               (1) "In addition to the processing for the ESTABLISHED state" ...
+*                               (2) "If the retransmission queue is empty,"                   ...
+*
+*                                   (a) (1) "The user's CLOSE can be acknowledged."
+*                                       (2) However, a TCP connection transitions into the FIN-WAIT-2 state if &
+*                                           only if the TCP connection's close request was previously acknowledged
+*                                           while in the FIN-WAIT-1 state.  Thus the TCP connection's re-transmit
+*                                           queue should already be empty prior to entering the FIN-WAIT-2 state.
+*
+*                                           See also 'NetTCP_RxPktConnHandlerFinWait1()  Note #2d2B2'.
+*
+*                   (e) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment Text'
+*                       states that for the "ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2 STATE ... it
+*                       is possible to deliver segment text to user RECEIVE buffers" :
+*
+*                       (1) "If the segment ... carries [a] PUSH flag, then the user is informed [and] the
+*                            buffer is returned."
+*
+*                       (2) (A) "When the TCP takes responsibility for delivering the data to the user it
+*                                must also acknowledge the receipt of the data."
+*
+*                           (B) "Once the TCP takes responsibility for the data" :
+*
+*                               (1) "It advances RCV.NXT over the data accepted," ...
+*
+*                               (2) "Adjusts RCV.WND as appropriate to the current buffer availability" ...
+*
+*                               (3) (a) "The total of RCV.NXT and RCV.WND should not be reduced."
+*
+*                                   (b) RFC #793,  Section 3.7 'Data Communication : Managing the Window' &
+*                                       RFC #1122, Section 4.2.2.16 confirm that "a TCP receiver SHOULD NOT
+*                                       shrink the window"; i.e. "advertise a much smaller window without
+*                                       having accepted that much data".
+*
+*                   (f) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                       that "if the FIN bit is set" :
+*
+*                       (1) "Signal the user 'connection closing' and return any pending RECEIVEs with
+*                            same message," ...
+*
+*                       (2) "Advance RCV.NXT over the FIN," ...
+*
+*                       (3) "Send an acknowledgment for the FIN" ...
+*
+*                       (4) "FIN implies PUSH for any segment text not yet delivered to the user" ...
+*
+*                       (5) For the "FIN-WAIT-2 STATE" :
+*
+*                           (A) "Enter the TIME-WAIT state"      ...
+*                               (1) "Start the time-wait timer," ...
+*                                   (a) A TCP connection should be closed WITHOUT fault following a TCP
+*                                       connection TIME-WAIT timeout.
+*
+*                               (2) "Turn off the other timers."
+*
+*                           (B) However, it is possible that some closing received data from the remote
+*                               host is available but has NOT yet been received by the application layer.
+*
+*                               (1) Therefore, if the application receive queue is closed, then enter the
+*                                   TIME-WAIT state.
+*
+*                               (2) (a) But if the application receive queue is NOT closed, then enter the
+*                                       connection-closing-data-available state to allow the application
+*                                       layer to receive the remaining receive data.
+*
+*                                   (b) (1) To satisfy the required time-wait timeout of two maximum segment
+*                                           lifetimes (see Note #2f5A1a), the time-wait timeout is initially
+*                                           used to provide the application layer sufficient time to receive
+*                                           the closing received data.
+*
+*                                       (2) If after the time-wait timeout expires, the application receive
+*                                           queue is still not empty, the user connection timeout is used
+*                                           to provide the application layer additional time to receive the
+*                                           closing received data.
+*
+*                                       See also Note #3a.
+*
+*               (3) (a) (1) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : USER TIMEOUT' states that
+*                           "for any state if the user timeout expires, flush all queues, signal the user
+*                           'error : connection aborted due to user timeout' ... [and] enter the CLOSED state".
+*
+*                       (2) However, NO RFC specifies or suggests any mechanism to implement/handle user timeouts.
+*
+*                           Therefore, it is assumed that ANY TCP connection that receives a valid TCP data
+*                           or control segment should reset its connection timer.
+*
+*                   (b) (1) (A) (1) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 18.6 'FIN_WAIT_2
+*                                   State', Page 246 states that "in the FIN_WAIT_2 state we have sent our FIN and
+*                                   the other end has acknowledged it ... [and] we are waiting for the application
+*                                   on the other end to recognize that it has received an end-of-file notification
+*                                   and close its end of the connection, which sends us a FIN.  Only when the
+*                                   process at the other end does this will our end move from the FIN_WAIT_2 to
+*                                   the TIME_WAIT state.  This means our end of the connection can remain in this
+*                                   state forever.  The other end is still in the CLOSE_WAIT state, and can remain
+*                                   there forever, until the application decides to issue its close".
+*
+*                               (2) "Many Berkeley-derived implementations prevent this infinite wait in the
+*                                    FIN_WAIT_2 state" by :
+*
+*                                    (a) "Mov[ing] the connection into the CLOSED state" ...
+*                                    (b) "if the connection is idle for 10 minutes plus 75 seconds."
+*
+*                           (B) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.1 'A FIN_WAIT_2
+*                               timer', Page 818 states that "to avoid leaving a connection in the FIN_WAIT_2 state
+*                               forever, if the other end never sends a FIN" :
+*
+*                               (1) (a) "When a connection moves from the FIN_WAIT_1 state to the FIN_WAIT_2 state" ...
+*                                   (b) "and the connection cannot receive any more data [implying the process called
+*                                        close(), instead of ... half-close ... shutdown()]," ...
+*
+*                               (2) (a)  The TCP connection's "timer is set to 10 minutes ... [and] 75 seconds," ...
+*                                   (b) "and when it expires ... the connection is dropped".
+*
+*                           (C) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6 'FIN_WAIT_2
+*                               and 2MSL Timers : FIN_WAIT_2 timer', Pages 825-827 adds that "terminating an idle
+*                               connection after more than 10 minutes in the FIN_WAIT_2 state violates the protocol
+*                               specification, but this is practical ... [since] all outstanding data on the connection
+*                               has been sent and acknowledged, the other end has acknowledged the FIN, and TCP is
+*                               waiting for the process at the other end of the connection to issue its close().  If
+*                               the other process never closes its end of the connection, our end can remain in the
+*                               FIN_WAIT_2 [state] forever".
+*
+*                       (2) However, NO RFC or reference specifies or suggests any mechanism to handle/reset any
+*                           FIN-WAIT-2 timeouts.
+*
+*                           Therefore, it is assumed that ANY TCP connection in  the FIN-WAIT-2 state that
+*                           receives a valid TCP data or control segment should reset its FIN-WAIT-2 timer.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerFinWait2 (NET_TCP_CONN  *p_conn,
+                                               NET_BUF       *p_buf,
+                                               NET_BUF_HDR   *p_buf_hdr,
+                                               NET_ERR       *p_err)
+{
+    NET_TCP_SEQ_CODE    seq_code;
+    NET_TCP_ACK_CODE    ack_code;
+    NET_TCP_RESET_CODE  reset_code;
+    CPU_BOOLEAN         data_avail;
+    NET_TMR_TICK        timeout_tick;
+    CPU_FNCT_PTR        timeout_fnct;
+    NET_TCP_FREE_CODE   free_code;
+    NET_ERR             err;
+    NET_ERR             err_rtn;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+                                                                /* Chk for rx'd fin/close.                              */
+    if (p_buf_hdr->TCP_SegClose == DEF_YES) {                   /* If fin/close avail, update seg lens.                 */
+        p_buf_hdr->TCP_SegLenInit += NET_TCP_SEG_LEN_CLOSE;
+        p_buf_hdr->TCP_SegLen     += NET_TCP_SEG_LEN_CLOSE;
+    }
+
+                                                                /* Chk rx'd seq nbr.                                    */
+    seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (seq_code) {
+        case NET_TCP_CONN_RX_SEQ_VALID:
+             break;
+
+
+        case NET_TCP_CONN_RX_SEQ_SYNC:                          /* If invalid sync rx'd, ...                            */
+        case NET_TCP_CONN_RX_SEQ_SYNC_INVALID:
+                                                                /* ... tx TCP conn ack  (see Notes #2c2 & #2b2B).       */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_SEQ_SYNC_INVALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_SEQ_NONE:
+        case NET_TCP_CONN_RX_SEQ_INVALID:                       /* If invalid seq  rx'd (see Note #2a4A), ...           */
+        default:
+             if (p_buf_hdr->TCP_SegReset != DEF_YES) {          /* ... & reset NOT rx'd (see Note #2a4C), ...           */
+                                                                /* ... tx TCP conn ack  (see Note #2a4B).               */
+                 NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+             }
+            *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd reset.                                  */
+    reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (reset_code) {
+        case NET_TCP_CONN_RX_RESET_NONE:
+             break;
+
+
+        case NET_TCP_CONN_RX_RESET_VALID:                       /* If   valid reset rx'd, ...                           */
+                                                                /* ...  close TCP conn (see Note #2b1A).                */
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_TCP_ERR_CONN_RESET_VALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_RESET_INVALID:                     /* If invalid reset rx'd, ...                           */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2b2Ac).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd ack.                                    */
+    ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (ack_code) {
+        case NET_TCP_CONN_RX_ACK_VALID:
+        case NET_TCP_CONN_RX_ACK_DUP:
+        case NET_TCP_CONN_RX_ACK_PREV:
+             break;
+
+
+        case NET_TCP_CONN_RX_ACK_NONE:                          /* If NO      ack rx'd, ...                             */
+            *p_err = NET_TCP_ERR_CONN_ACK_NONE;                 /* ... ignore TCP pkt  (see Note #2d1).                 */
+             return;
+
+
+        case NET_TCP_CONN_RX_ACK_OTW:                           /* If out-of-window ack rx'd, ...                       */
+                                                                /* ... tx TCP conn ack (see Note #2d2A3).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_OTW, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_ACK_INVALID:                       /* If invalid ack rx'd, ...                             */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2d2A3).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+             return;
+    }
+
+
+
+                                                                /* ----------------- HANDLE RX'D SEG ------------------ */
+    NetTCP_RxPktConnHandlerSeg(p_conn, ack_code, p_buf, p_buf_hdr, &err_rtn);
+    switch (err_rtn) {
+        case NET_TCP_ERR_CONN_DATA_NONE:
+        case NET_TCP_ERR_CONN_DATA_VALID:
+             break;
+
+
+        case NET_TCP_ERR_CONN_DATA_DUP:
+            *p_err = err_rtn;
+             return;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_DATA_INVALID:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_RX_Q_FULL:
+        case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = err_rtn;
+             return;
+    }
+
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+    if (p_buf_hdr->TCP_SegClose == DEF_YES) {                   /* If fin/close rx'd,                               ... */
+                                                                /* Closing data avail for half-closed conns ONLY.       */
+        data_avail = ((p_conn->ConnCloseCode !=  NET_CONN_CLOSE_HALF      ) ||
+                     ((p_conn->RxQ_State     ==  NET_TCP_RX_Q_STATE_CLOSED) &&
+                      (p_conn->RxQ_App_Head  == DEF_NULL))) ? DEF_NO : DEF_YES;
+
+        if (data_avail != DEF_YES) {                            /* ... & NO app data avail,                         ... */
+                                                                /* ... chng to time-wait state (see Note  #2f5B1);  ... */
+            p_conn->ConnState                 =  NET_TCP_CONN_STATE_TIME_WAIT;
+            p_conn->ConnCloseTimeoutFaultFlag =  DEF_NO;        /* ... clr close timeout fault (see Note  #2f5A1a); ... */
+            timeout_fnct                     = (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout;
+
+        } else {                                                /* ... else chng to conn-closing-data-avail state   ... */
+                                                                /* ...                         (see Note  #2f5B2a); ... */
+            p_conn->ConnState =  NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL;
+            timeout_fnct     = (CPU_FNCT_PTR)&NetTCP_ConnClosingTimeoutDataAvail;
+        }
+                                                                /* ... & start time-wait tmr   (see Notes #2f5A1 &  ... */
+        timeout_tick =  p_conn->TimeoutMaxSeg_tick_scaled;      /* ...                                    #2f5B2b1).    */
+
+    } else {
+                                                                /* Else reset fin-wait-2 tmr   (see Note #3b).          */
+        timeout_tick =  NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC * NET_TMR_TIME_TICK_PER_SEC;
+        timeout_fnct = (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout;
+    }
+
+
+                                                                /* UPDATE TMR's                                         */
+                                                                /* In time-wait or closing state(s) [see Note #2f5A],   */
+    free_code = NET_TCP_CONN_FREE_TMR_ALL;                      /* ... free all TCP conn tmrs       (see Note #2f5A2).  */
+    DEF_BIT_CLR(free_code, NET_TCP_CONN_FREE_TMR_TIMEOUT);
+    NetTCP_ConnFreeTmr(p_conn, free_code);
+
+
+    if (p_conn->TimeoutTmr != DEF_NULL) {
+        NetTmr_Set((NET_TMR    *) p_conn->TimeoutTmr,
+                   (CPU_FNCT_PTR) timeout_fnct,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+    } else {
+        p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR ) timeout_fnct,
+                                       (void        *) p_conn,
+                                       (NET_TMR_TICK ) timeout_tick,
+                                       (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                       (NET_ERR     *)&err);
+    }
+
+    if ( err != NET_TMR_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+       *p_err  = NET_TCP_ERR_CONN_FAIL;
+        return;
+    }
+
+
+                                                                /* ----------------- TC TCP CONN ACK ------------------ */
+                                                                /* Tx TCP conn ack (see Notes #1c).                     */
+    NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_IMMED, NET_TCP_CONN_CLOSE_ALL, p_err);
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+        case NET_TCP_ERR_CONN_ACK_NONE:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_ACK_DLYD:
+        case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+             break;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_NONE_AVAIL:
+        default:
+             return;
+    }
+
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_RxPktConnHandlerClosing()
+*
+* Description : (1) Handle TCP connection in CLOSING state :
+*
+*                   (a) Validate received TCP packet for current TCP connection state :
+*
+*                       (1) Sequence Number (SEQ)                                   See Note  #2a
+*                       (2) Reset           (RST)                                   See Note  #2b
+*                       (3) Synchronization (SYN)                                   See Note  #2c
+*                       (4) Acknowledgement (ACK)                                   See Note  #2d
+*                       (5) Finish/Close    (FIN)                                   See Note  #2f
+*
+*                   (b) Update TCP connection :
+*                       (1) Handle received TCP segment                             See Notes #2d    & #2e
+*                       (2) Update TCP connection state :                           See Note  #2d2B2a1A
+*                           (A) Configure TCP connection timeout value
+*                           (B) Configure TCP connection timeout function
+*                       (3) Update TCP connection timer(s)                          See Notes #2d2B2a1A, #2d2B2a1B2b,
+*                                                                                                    & #3
+*
+*                   (c) Transmit TCP connection acknowledgement & data              See Notes #2d2B1 & #2f3
+*
+* Argument(s) : p_conn      Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf       Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr   Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_SEQ_SYNC_INVALID   Received segment's synchronization        is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence        number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_ACK_NONE           Received segment's acknowledgement        is
+*                                                                       NOT available.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Received segment's acknowledgement number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_VALID        Received segment's reset flag is     valid
+*                                                                       for current TCP connection; i.e. reset
+*                                                                       the TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      Received segment's reset flag is NOT valid
+*                                                                       for current TCP connection.
+*
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidSeq() : -----
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidAck() : -----
+*                                                                   ---- RETURNED BY NetTCP_RxPktConnIsValidReset() : ----
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnHandlerSeg() : -----
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data to   queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid
+*                                                                       data queued for processing.
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment
+*                                                                       data; NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment
+*                                                                       data; NOT queued to receive queue(s).
+*
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                               NET_TCP_ERR_RX_Q_FULL               TCP connection receive  queue full.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT       TCP connection receive  queue signal fault.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT       TCP connection transmit queue signal fault.
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*
+*                                                                   - RETURNED BY NetTCP_RxPktConnHandlerSignalClose() : -
+*                               NET_TCP_ERR_INVALID_CONN_ID         Invalid application connection.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+*                                                                   ---------- RETURNED BY NetTCP_TxConnTxQ() : ----------
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandler().
+*
+* Note(s)     : (2) TCP connections in the CLOSING state are handled as follows :
+*
+*                   (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that in the "SYN-RECEIVED, ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2
+*                       STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE" that :
+*
+*                       (1) "Segments are processed in sequence ... processing is done in SEG.SEQ order."
+*
+*                       (2) "Initial tests on arrival are used to discard old duplicates."
+*
+*                       (3) "If a segment's contents straddle the boundary between old and new, only the
+*                            new parts should be processed."
+*
+*                       (4) (A) "If an incoming segment is not acceptable," ...
+*
+*                           (B) "an acknowledgment should be sent in reply" ...
+*
+*                           (C) "(unless the RST bit is set, if so drop the segment)".
+*
+*                               See also Notes #2b2Aa & #2b2B.
+*
+*                       See also 'NetTCP_RxPktConnIsValidSeq()  Note #1d'.
+*
+*                   (b) (1) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit'
+*                               states that in the "CLOSING, LAST-ACK, TIME-WAIT" states that "if the RST bit
+*                               is set then, enter the CLOSED state".
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing' reiterates
+*                               that "if the receiver ... of a RST ... was in any other state [other than LISTEN
+*                               or SYN-RECEIVED], it aborts the connection and advises the user and goes to the
+*                               CLOSED state".
+*
+*                       (2) (A) RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 amends the "handling of a segment
+*                               with the RST bit when in a synchronized state" to "provide some protection against
+*                               ... blind reset attack[s] using the RST bit" :
+*
+*                               (a) "If the RST bit is set and the sequence number is outside the expected
+*                                    window, silently drop the segment."
+*
+*                               (b) "If the RST bit is exactly the next expected sequence number [sic], reset
+*                                    the connection"; it is assumed that this should read "if the RST bit is
+*                                    set and the sequence number is exactly the next expected sequence number,
+*                                    reset the connection."
+*
+*                               (c) "If the RST bit is set and the sequence number does not exactly match
+*                                    the next expected sequence value, yet is within the acceptable window
+*                                    (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) send an acknowledgment."
+*
+*                           (B) In addition, RFC Draft-IETF-TCPm-TCPSecure #00 does NOT provide a precedence
+*                               priority for handling TCP segments received with BOTH the RST & SYN bits set.
+*
+*                               Therefore, since it does NOT seem reasonable to reset a TCP connection
+*                               due to a TCP segment that also attempted to synchronize the  TCP connection,
+*                               it is assumed that the amended handling of the SYN bit should take precedence
+*                               over the amended handling of the RST bit.
+*
+*                               See also Note #2c2.
+*
+*                   (c) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN Bit'
+*                           states that in the "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT STATE-1,
+*                           FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that :
+*
+*                           (A) "If the SYN is in the window it is an error, send a reset, any outstanding
+*                                RECEIVEs and SEND[s] should receive 'reset' responses, all segment queues
+*                                should be flushed, the user should also receive an unsolicited general
+*                               'connection reset' signal[, and] enter the CLOSED state."
+*
+*                           (B) But "if the SYN is not in the window this step would not have been reached
+*                               and an ack would have been sent".
+*
+*                       (2) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 3.2 amends the  "handling
+*                           of a segment with the SYN bit set in the synchronized state ... [by] handling
+*                           ... the SYN bit" as follows :
+*
+*                           (a) "If the SYN bit is set and the sequence number is outside the
+*                                expected window, send an ACK back to the peer."
+*
+*                           (b) "If the SYN bit is set and the sequence number is an exact
+*                                match to the next expected sequence (RCV.NXT == SEG.SEQ)
+*                                then send an ACK segment ... but ... subtract one from
+*                                value being acknowledged."
+*
+*                           (c) "If the SYN bit is set and the sequence number is acceptable,
+*                                i.e.: (RCV.NXT <= SEG.SEQ <= RCV.NXT+RCV.WND) then send an
+*                                ACK segment."
+*
+*                   (d) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field'
+*                       states that :
+*
+*                       (1) "If the ACK bit is off drop the segment."
+*
+*                       (2) "If the ACK bit is on" :
+*
+*                           (A) And in the "ESTABLISHED STATE" :
+*
+*                               (1) "If SND.UNA < SEG.ACK <= SND.NXT then" :
+*
+*                                   (a) "Set SND.UNA <- SEG.ACK."
+*
+*                                   (b) "Any segments on the retransmission queue which are thereby entirely
+*                                        acknowledged are removed."
+*
+*                                   (c) "The send window should be updated" :
+*
+*                                       (1) (A) (1) "If ((SND.WL1 <  SEG.SEQ) or" ...
+*
+*                                               (2) (a) "(SND.WL1  = SEG.SEQ and" ...
+*                                                   (b)  "SND.WL2 <= SEG.ACK)),"  ...
+*
+*                                           (B) (1) "Set SND.WND <- SEG.WND," ...
+*                                               (2) "Set SND.WL1 <- SEG.SEQ," ...
+*                                               (3) "Set SND.WL2 <- SEG.ACK."
+*
+*                                       (2) "Note that SND.WND is an offset from SND.UNA, that SND.WL1 records the
+*                                            sequence number of the last segment used to update SND.WND, and that
+*                                            SND.WL2 records the acknowledgment number of the last segment used to
+*                                            update SND.WND.  The check here prevents using old segments to update
+*                                            the window."
+*
+*                               (2) (a) "If the ACK is a duplicate (SEG.ACK <= SND.UNA), it can be ignored."
+*
+*                                   (b) RFC #1122, Section 4.2.2.20.(g) amends the transmit window update criteria
+*                                       for the segment's acknowledgement to include SND.UNA : "The window should
+*                                       updated if SND.UNA <= SEG.ACK <= SND.NXT."
+*
+*                                       See also 'NetTCP_RxPktConnHandlerTxWinRemote()  Note #1b2'.
+*
+*                               (3) "If the ACK acks something not yet sent (SEG.ACK > SND.NXT) then send an ACK
+*                                    [and] drop the segment."
+*
+*                           (B) For the "CLOSING STATE" :
+*
+*                               (1) "In addition to the processing for the ESTABLISHED state" ...
+*
+*                               (2) (a) "If the ACK acknowledges our FIN then" ...
+*
+*                                       (1) (A) "Enter the TIME-WAIT state," ...
+*
+*                                               (1) The following sections ... :
+*
+*                                                   (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES :
+*                                                           Check FIN Bit : FIN-WAIT-1 STATE'
+*                                                   (b) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES :
+*                                                           Check FIN Bit : FIN-WAIT-2 STATE'
+*
+*                                               (2) ... generalize that when entering "the TIME-WAIT state" to ...
+*
+*                                                   (a) "Start the time-wait timer," ...
+*                                                       (1) A TCP connection should be closed WITHOUT fault following
+*                                                           a TCP connection TIME-WAIT timeout.
+*
+*                                                   (b) "Turn off the other timers."
+*
+*                                               (3) Although these sections are the only sections to state that these
+*                                                   TCP connection timers should be updated when transitioning to the
+*                                                   TIME-WAIT state, it is assumed that these timers should also be
+*                                                   updated for the transition from the CLOSING state to the TIME-WAIT
+*                                                   state.
+*
+*                                           (B) However, it is possible that some closing received data from the remote
+*                                               host is available but has NOT yet been received by the application layer.
+*
+*                                               (1) Therefore, if the application receive queue is closed, then enter the
+*                                                   TIME-WAIT state.
+*
+*                                               (2) (a) But if the application receive queue is NOT closed, then enter the
+*                                                       connection-closing-data-available state to allow the application
+*                                                       layer to receive the remaining receive data.
+*
+*                                                   (b) (1) To satisfy the required time-wait timeout of two maximum segment
+*                                                           lifetimes (see Note #2f5A1a), the time-wait timeout is initially
+*                                                           used to provide the application layer sufficient time to receive
+*                                                           the closing received data.
+*
+*                                                       (2) If after the time-wait timeout expires, the application receive
+*                                                           queue is still not empty, the user connection timeout is used
+*                                                           to provide the application layer additional time to receive the
+*                                                           closing received data.
+*
+*                                                       See also Note #3.
+*
+*                                       (2) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check
+*                                               ACK Field : FIN-WAIT-2 STATE' states that "if the retransmission
+*                                               queue is empty, the user's CLOSE can be acknowledged".
+*
+*                                           (B) Although this section is the only section to state that the TCP
+*                                               connection should acknowledge the user's close, it is assumed that
+*                                               a TCP connection should signal the application layer that "the
+*                                               user's close [is] acknowledged" whenever its re-transmit queue
+*                                               becomes empty.
+*
+*                                   (b) (1) "Otherwise ignore the segment."
+*
+*                                       (2) However, it is possible that some but NOT all transmitted data has
+*                                           been received by the remote host.  In other words, the remote host may
+*                                           have received some but NOT ALL transmitted data preceding this host's
+*                                           connection close request.
+*
+*                                           Therefore, acknowledgements validated by as within the transmit
+*                                           window MUST be received & processed as in connected states.
+*
+*                                           See also 'NetTCP_RxPktConnIsValidAck()  Note #1d'.
+*
+*                                       See also Note #2e2.
+*
+*                   (e) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment Text'
+*                           states that in the "CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that "this should not occur, since a FIN has been received from the remote
+*                           side.  Ignore the segment text."
+*
+*                       (2) (A) However, it is possible that some but NOT all data has been received from
+*                               the remote host.  In other words, the remote host's  connection close request
+*                               may have received but ALL receive data preceding the connection close request
+*                               may NOT have been received.
+*
+*                               Therefore, receive data validated by sequence number as within the
+*                               receive window MUST be received & processed as in connected states.
+*
+*                           (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment
+*                               Text' states that "once in the ESTABLISHED state, it is possible to deliver
+*                               segment text to user RECEIVE buffers".
+*
+*                           See also Note #2d2B2b.
+*
+*                   (f) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                       that "if the FIN bit is set" :
+*
+*                       (1) "Signal the user 'connection closing' and return any pending RECEIVEs with
+*                            same message," ...
+*
+*                       (2) "Advance RCV.NXT over the FIN," ...
+*
+*                       (3) "Send an acknowledgment for the FIN" ...
+*
+*                       (4) "FIN implies PUSH for any segment text not yet delivered to the user" ...
+*
+*                       (5) And the "CLOSING STATE ... remain[s] in the CLOSING state".
+*
+*               (3) (a) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : USER TIMEOUT' states that
+*                       "for any state if the user timeout expires, flush all queues, signal the user
+*                       'error : connection aborted due to user timeout' ... [and] enter the CLOSED state".
+*
+*                   (b) However, NO RFC specifies or suggests any mechanism to implement/handle user timeouts.
+*
+*                       Therefore, it is assumed that ANY TCP connection that receives a valid TCP data
+*                       or control segment should reset its connection timer.
+*
+*               (4) Since the mechanisms of TCP connection close are independent of the application layer
+*                   close; any external application layer close error(s) are ignored.
+*
+*               (5) Some  transitory errors were ignored &/or not returned from previous handler function(s).
+*                   These transitory errors are included for completeness & as an extra precaution in case
+*                   these transitory errors are returned by handler function(s).
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerClosing (NET_TCP_CONN  *p_conn,
+                                              NET_BUF       *p_buf,
+                                              NET_BUF_HDR   *p_buf_hdr,
+                                              NET_ERR       *p_err)
+{
+    NET_TCP_SEQ_CODE    seq_code;
+    NET_TCP_ACK_CODE    ack_code;
+    NET_TCP_RESET_CODE  reset_code;
+    CPU_BOOLEAN         data_avail;
+    NET_TMR_TICK        timeout_tick;
+    CPU_FNCT_PTR        timeout_fnct;
+    NET_TCP_FREE_CODE   free_code;
+    NET_ERR             err;
+    NET_ERR             err_rtn;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+                                                                /* Chk for rx'd fin/close.                              */
+    if (p_buf_hdr->TCP_SegClose == DEF_YES) {                   /* If fin/close avail, update seg lens.                 */
+        p_buf_hdr->TCP_SegLenInit += NET_TCP_SEG_LEN_CLOSE;
+        p_buf_hdr->TCP_SegLen     += NET_TCP_SEG_LEN_CLOSE;
+    }
+
+                                                                /* Chk rx'd seq nbr.                                    */
+    seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (seq_code) {
+        case NET_TCP_CONN_RX_SEQ_VALID:
+             break;
+
+
+        case NET_TCP_CONN_RX_SEQ_SYNC:                          /* If invalid sync rx'd, ...                            */
+        case NET_TCP_CONN_RX_SEQ_SYNC_INVALID:
+                                                                /* ... tx TCP conn ack  (see Notes #2c2 & #2b2B).       */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_SEQ_SYNC_INVALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_SEQ_NONE:
+        case NET_TCP_CONN_RX_SEQ_INVALID:                       /* If invalid seq  rx'd (see Note #2a4A), ...           */
+        default:
+             if (p_buf_hdr->TCP_SegReset != DEF_YES) {          /* ... & reset NOT rx'd (see Note #2a4C), ...           */
+                                                                /* ... tx TCP conn ack  (see Note #2a4B).               */
+                 NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+             }
+            *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd reset.                                  */
+    reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (reset_code) {
+        case NET_TCP_CONN_RX_RESET_NONE:
+             break;
+
+
+        case NET_TCP_CONN_RX_RESET_VALID:                       /* If   valid reset rx'd, ...                           */
+                                                                /* ...  close TCP conn (see Note #2b1A).                */
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_TCP_ERR_CONN_RESET_VALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_RESET_INVALID:                     /* If invalid reset rx'd, ...                           */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2b2Ac).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd ack.                                    */
+    ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (ack_code) {
+        case NET_TCP_CONN_RX_ACK_VALID:
+        case NET_TCP_CONN_RX_ACK_DUP:
+        case NET_TCP_CONN_RX_ACK_PREV:
+             break;
+
+
+        case NET_TCP_CONN_RX_ACK_NONE:                          /* If NO      ack rx'd, ...                             */
+            *p_err = NET_TCP_ERR_CONN_ACK_NONE;                 /* ... ignore TCP pkt  (see Note #2d1).                 */
+             return;
+
+
+        case NET_TCP_CONN_RX_ACK_INVALID:                       /* If invalid ack rx'd, ...                             */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2d2A3).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+             return;
+    }
+
+
+
+                                                                /* ----------------- HANDLE RX'D SEG ------------------ */
+    NetTCP_RxPktConnHandlerSeg(p_conn, ack_code, p_buf, p_buf_hdr, &err_rtn);
+    switch (err_rtn) {
+        case NET_TCP_ERR_CONN_DATA_NONE:
+        case NET_TCP_ERR_CONN_DATA_VALID:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s) [see Note #5].           */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_CONN_DATA_DUP:
+            *p_err = err_rtn;
+             return;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_FAIL:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_DATA_INVALID:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_RX_Q_FULL:
+        case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+        case NET_TCP_ERR_TX_PKT:
+        case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+        case NET_TCP_ERR_RE_TX_SEG_TH:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = err_rtn;
+             return;
+    }
+
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+                                                                /* If local conn close ack'd (see Note #2d2B2a);     .. */
+    if ((p_conn->TxQ_State == NET_TCP_TX_Q_STATE_CLOSED        ) ||
+        (p_conn->TxQ_State == NET_TCP_TX_Q_STATE_CLOSED_SUSPEND)) {
+                                                                /* Closing data avail for half-closed conns ONLY.       */
+        data_avail = ((p_conn->ConnCloseCode !=  NET_CONN_CLOSE_HALF      ) ||
+                     ((p_conn->RxQ_State     ==  NET_TCP_RX_Q_STATE_CLOSED) &&
+                      (p_conn->RxQ_App_Head  == DEF_NULL))) ? DEF_NO : DEF_YES;
+
+                                                                /* .. signal app conn close (see Note #2d2B2a2B),    .. */
+        NetTCP_RxPktConnHandlerSignalClose(p_conn, data_avail, &err);
+        switch (err) {
+            case NET_TCP_ERR_NONE:
+            case NET_TCP_ERR_CONN_FAIL:                         /* Ignore any app conn close err(s) [see Note #4].      */
+            case NET_TCP_ERR_INVALID_CONN_ID:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_CONN:
+            case NET_CONN_ERR_NOT_USED:
+            default:
+                 NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+                *p_err = err;
+                 return;
+        }
+
+        if (data_avail != DEF_YES) {                            /* .. & if NO app data avail,                        .. */
+                                                                /* .. chng to time-wait state (see Note  #2d2B2a1B1),   */
+            p_conn->ConnState                 =  NET_TCP_CONN_STATE_TIME_WAIT;
+            p_conn->ConnCloseTimeoutFaultFlag =  DEF_NO;        /* .. clr close timeout fault (see Note  #2d2B2a1A2a1), */
+            timeout_fnct                     = (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout;
+
+        } else {                                                /* .. else chng to closing-data-avail state          .. */
+                                                                /* ..                         (see Note  #2d2B2a1B2a),  */
+            p_conn->ConnState =  NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL;
+            timeout_fnct     = (CPU_FNCT_PTR)&NetTCP_ConnClosingTimeoutDataAvail;
+        }
+                                                                /* .. & start time-wait tmr   (see Notes #2d2B2a1A2a &  */
+        timeout_tick =  p_conn->TimeoutMaxSeg_tick_scaled;      /* ..                                    #2d2B2a1B2b1). */
+
+
+    } else {
+        timeout_tick =  p_conn->TimeoutConn_tick;               /* Else start conn close tmr (see Note #3b).            */
+        timeout_fnct = (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout;
+    }
+
+
+
+                                                                /* UPDATE TMR's                                         */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_TIME_WAIT:                      /* If in time-wait            (see Note #2d2B2a1A)  ... */
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:             /* ... or closing state(s)    [see Note #2d2B2a1B], ... */
+             free_code = NET_TCP_CONN_FREE_TMR_ALL;             /* ... free all TCP conn tmrs (see Note #2d2B2a1A2b).   */
+             DEF_BIT_CLR(free_code, NET_TCP_CONN_FREE_TMR_TIMEOUT);
+             NetTCP_ConnFreeTmr(p_conn, free_code);
+             break;
+
+
+        default:                                                /* 'default' case intentionally empty.                  */
+             break;
+    }
+
+
+    if (p_conn->TimeoutTmr != DEF_NULL) {
+        NetTmr_Set((NET_TMR    *) p_conn->TimeoutTmr,
+                   (CPU_FNCT_PTR) timeout_fnct,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+    } else {
+        p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR ) timeout_fnct,
+                                       (void        *) p_conn,
+                                       (NET_TMR_TICK ) timeout_tick,
+                                       (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                       (NET_ERR     *)&err);
+    }
+
+    if ( err != NET_TMR_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+       *p_err  = NET_TCP_ERR_CONN_FAIL;
+        return;
+    }
+
+
+
+                                                                /* --------------- TX TCP CONN ACK/DATA --------------- */
+    ack_code = ((p_buf_hdr->TCP_SegAckTxReqCode == NET_TCP_CONN_TX_ACK_IMMED) ||
+                (p_buf_hdr->TCP_SegClose        == DEF_YES))    /* See Note #2f3.                                       */
+             ?   NET_TCP_CONN_TX_ACK_IMMED
+             :   NET_TCP_CONN_TX_ACK;
+
+    if (p_conn->ConnState == NET_TCP_CONN_STATE_CLOSING) {      /* If conn still closing, ...                           */
+                                                                /* ... tx ack & any tx data (see Note #1c).             */
+        NetTCP_TxConnTxQ(p_conn,
+                         p_buf_hdr,
+                         ack_code,
+                         DEF_NO,
+                         NET_TCP_CONN_CLOSE_ALL,
+                         DEF_NO,
+                         p_err);
+        switch (*p_err) {
+            case NET_TCP_ERR_NONE:
+            case NET_TCP_ERR_CONN_ACK_NONE:
+            case NET_TCP_ERR_CONN_ACK_INVALID:
+            case NET_TCP_ERR_CONN_ACK_DLYD:
+            case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+            case NET_ERR_TX:                                    /* Ignore transitory tx err(s).                         */
+            case NET_ERR_IF_LINK_DOWN:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_CONN_CLOSE:
+            case NET_TCP_ERR_CONN_FAULT:
+            case NET_TCP_ERR_CONN_FAIL:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_TCP_ERR_INVALID_LEN_SEG:
+            case NET_TCP_ERR_NONE_AVAIL:
+            case NET_TCP_ERR_TX_PKT:
+            case NET_ERR_IF_LOOPBACK_DIS:
+            case NET_CONN_ERR_INVALID_FAMILY:
+            case NET_CONN_ERR_INVALID_ADDR:
+            case NET_CONN_ERR_INVALID_ADDR_LEN:
+            default:
+                 return;
+        }
+
+    } else {                                                    /* Else tx TCP conn ack (see Note #2f3).                */
+        NetTCP_TxConnAck(p_conn, p_buf_hdr, ack_code, NET_TCP_CONN_CLOSE_ALL, p_err);
+        switch (*p_err) {
+            case NET_TCP_ERR_NONE:
+            case NET_TCP_ERR_CONN_ACK_NONE:
+            case NET_TCP_ERR_CONN_ACK_INVALID:
+            case NET_TCP_ERR_CONN_ACK_DLYD:
+            case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+                 break;
+
+
+            case NET_TCP_ERR_CONN_NOT_USED:
+            case NET_TCP_ERR_CONN_FAULT:
+            case NET_TCP_ERR_INVALID_CONN_STATE:
+            case NET_TCP_ERR_INVALID_CONN_OP:
+            case NET_TCP_ERR_INVALID_LEN_SEG:
+            case NET_TCP_ERR_NONE_AVAIL:
+            default:
+                 return;
+        }
+    }
+
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_RxPktConnHandlerTimeWait()
+*
+* Description : (1) Handle TCP connection in TIME-WAIT state :
+*
+*                   (a) Validate received TCP packet for current TCP connection state :
+*
+*                       (1) Sequence Number (SEQ)                                   See Note  #2a
+*                       (2) Reset           (RST)                                   See Note  #2b
+*                       (3) Synchronization (SYN)                                   See Note  #2c
+*                       (4) Acknowledgement (ACK)                                   See Note  #2d
+*                       (5) Finish/Close    (FIN)                                   See Note  #2f
+*
+*                   (b) Update TCP connection :
+*                       (1) Handle received TCP segment                             See Notes #2d    & #2e
+*                       (2) Update TCP connection timer                             See Notes #2d2C2
+*
+*                   (c) Transmit TCP connection acknowledgement                     See Notes #2d2C1 & #2f3
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_SEQ_SYNC_INVALID   Received segment's synchronization        is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence        number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_ACK_NONE           Received segment's acknowledgement        is
+*                                                                       NOT available.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Received segment's acknowledgement number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_VALID        Received segment's reset flag is     valid
+*                                                                       for current TCP connection; i.e. reset
+*                                                                       the TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      Received segment's reset flag is NOT valid
+*                                                                       for current TCP connection.
+*
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*
+*                                                                   -- RETURNED BY NetTCP_RxPktConnIsValidSeq() : --
+*                                                                   -- RETURNED BY NetTCP_RxPktConnIsValidAck() : --
+*                                                                   - RETURNED BY NetTCP_RxPktConnIsValidReset() : -
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   -- RETURNED BY NetTCP_RxPktConnHandlerSeg() : --
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data to   queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid
+*                                                                       data queued for processing.
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment
+*                                                                       data; NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment
+*                                                                       data; NOT queued to receive queue(s).
+*
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                               NET_TCP_ERR_RX_Q_FULL               TCP connection receive queue full.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT       TCP connection receive queue signal fault.
+*
+*                                                                   ------- RETURNED BY NetTCP_TxConnAck() : -------
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandler().
+*
+* Note(s)     : (2) TCP connections in the TIME-WAIT state are handled as follows :
+*
+*                   (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that in the "SYN-RECEIVED, ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2
+*                       STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE" that :
+*
+*                       (1) "Segments are processed in sequence ... processing is done in SEG.SEQ order."
+*
+*                       (2) "Initial tests on arrival are used to discard old duplicates."
+*
+*                       (3) "If a segment's contents straddle the boundary between old and new, only the
+*                            new parts should be processed."
+*
+*                       (4) (A) "If an incoming segment is not acceptable," ...
+*
+*                           (B) "an acknowledgment should be sent in reply" ...
+*
+*                           (C) "(unless the RST bit is set, if so drop the segment)".
+*
+*                               See also Notes #2b2Aa & #2b2B.
+*
+*                       See also 'NetTCP_RxPktConnIsValidSeq()  Note #1d'.
+*
+*                   (b) (1) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit'
+*                               states that in the "CLOSING, LAST-ACK, TIME-WAIT" states that "if the RST bit
+*                               is set then, enter the CLOSED state".
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing' reiterates
+*                               that "if the receiver ... of a RST ... was in any other state [other than LISTEN
+*                               or SYN-RECEIVED], it aborts the connection and advises the user and goes to the
+*                               CLOSED state".
+*
+*                       (2) (A) RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 amends the "handling of a segment
+*                               with the RST bit when in a synchronized state" to "provide some protection against
+*                               ... blind reset attack[s] using the RST bit" :
+*
+*                               (a) "If the RST bit is set and the sequence number is outside the expected
+*                                    window, silently drop the segment."
+*
+*                               (b) "If the RST bit is exactly the next expected sequence number [sic], reset
+*                                    the connection"; it is assumed that this should read "if the RST bit is
+*                                    set and the sequence number is exactly the next expected sequence number,
+*                                    reset the connection."
+*
+*                               (c) "If the RST bit is set and the sequence number does not exactly match
+*                                    the next expected sequence value, yet is within the acceptable window
+*                                    (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) send an acknowledgment."
+*
+*                           (B) In addition, RFC Draft-IETF-TCPm-TCPSecure #00 does NOT provide a precedence
+*                               priority for handling TCP segments received with BOTH the RST & SYN bits set.
+*
+*                               Therefore, since it does NOT seem reasonable to reset a TCP connection
+*                               due to a TCP segment that also attempted to synchronize the  TCP connection,
+*                               it is assumed that the amended handling of the SYN bit should take precedence
+*                               over the amended handling of the RST bit.
+*
+*                               See also Note #2c2.
+*
+*                   (c) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN Bit'
+*                           states that in the "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT STATE-1,
+*                           FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that :
+*
+*                           (A) "If the SYN is in the window it is an error, send a reset, any outstanding
+*                                RECEIVEs and SEND[s] should receive 'reset' responses, all segment queues
+*                                should be flushed, the user should also receive an unsolicited general
+*                               'connection reset' signal[, and] enter the CLOSED state."
+*
+*                           (B) But "if the SYN is not in the window this step would not have been reached
+*                               and an ack would have been sent".
+*
+*                       (2) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 3.2 amends the  "handling
+*                           of a segment with the SYN bit set in the synchronized state ... [by] handling
+*                           ... the SYN bit" as follows :
+*
+*                           (a) "If the SYN bit is set and the sequence number is outside the
+*                                expected window, send an ACK back to the peer."
+*
+*                           (b) "If the SYN bit is set and the sequence number is an exact
+*                                match to the next expected sequence (RCV.NXT == SEG.SEQ)
+*                                then send an ACK segment ... but ... subtract one from
+*                                value being acknowledged."
+*
+*                           (c) "If the SYN bit is set and the sequence number is acceptable,
+*                                i.e.: (RCV.NXT <= SEG.SEQ <= RCV.NXT+RCV.WND) then send an
+*                                ACK segment."
+*
+*                   (d) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field'
+*                       states that :
+*
+*                       (1) "If the ACK bit is off drop the segment."
+*
+*                       (2) "If the ACK bit is on" :
+*
+*                           (A) "If the ACK is a duplicate (SEG.ACK <= SND.UNA), it can be ignored."
+*
+*                           (B) "If the ACK acks something not yet sent ... then send an ACK [and] drop the segment."
+*
+*                           (C) For the "TIME-WAIT STATE ... the only thing that can arrive in this state is a
+*                               retransmission of the remote FIN" :
+*
+*                               (1) "Acknowledge it" ...
+*                               (2) "Restart the 2 MSL timeout."
+*
+*                   (e) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment Text'
+*                           states that in the "CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that "this should not occur, since a FIN has been received from the remote
+*                           side.  Ignore the segment text."
+*
+*                       (2) (A) However, it is possible that some but NOT all data has been received from
+*                               the remote host.  In other words, the remote host's  connection close request
+*                               may have received but ALL receive data preceding the connection close request
+*                               may NOT have been received.
+*
+*                               Therefore, receive data validated by sequence number as within the
+*                               receive window MUST be received & processed as in connected states.
+*
+*                           (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment
+*                               Text' states that "once in the ESTABLISHED state, it is possible to deliver
+*                               segment text to user RECEIVE buffers".
+*
+*                   (f) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                       that "if the FIN bit is set" :
+*
+*                       (1) "Signal the user 'connection closing' and return any pending RECEIVEs with
+*                            same message," ...
+*
+*                       (2) "Advance RCV.NXT over the FIN," ...
+*
+*                       (3) "Send an acknowledgment for the FIN" ...
+*
+*                       (4) "FIN implies PUSH for any segment text not yet delivered to the user" ...
+*
+*                       (5) For the "TIME-WAIT STATE" :
+*
+*                           (A) "Remain in the TIME-WAIT state" ...
+*                           (B) "Restart the 2 MSL time-wait timeout."
+*
+*               (3) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : TIME-WAIT TIMEOUT' states
+*                   that "if the time-wait timeout expires on a connection ... enter the CLOSED state".
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerTimeWait (NET_TCP_CONN  *p_conn,
+                                               NET_BUF       *p_buf,
+                                               NET_BUF_HDR   *p_buf_hdr,
+                                               NET_ERR       *p_err)
+{
+    NET_TCP_SEQ_CODE    seq_code;
+    NET_TCP_ACK_CODE    ack_code;
+    NET_TCP_RESET_CODE  reset_code;
+    NET_TMR_TICK        timeout_tick;
+    NET_ERR             err;
+    NET_ERR             err_rtn;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+   (void)&p_buf_hdr->TCP_SegClose;                              /* Ignore any rx'd fin (see Note #2f5A).                */
+
+                                                                /* Chk rx'd seq nbr.                                    */
+    seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (seq_code) {
+        case NET_TCP_CONN_RX_SEQ_VALID:
+             break;
+
+
+        case NET_TCP_CONN_RX_SEQ_SYNC:                          /* If invalid sync rx'd, ...                            */
+        case NET_TCP_CONN_RX_SEQ_SYNC_INVALID:
+                                                                /* ... tx TCP conn ack  (see Notes #2c2 & #2b2B).       */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_SEQ_SYNC_INVALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_SEQ_NONE:
+        case NET_TCP_CONN_RX_SEQ_INVALID:                       /* If invalid seq  rx'd (see Note #2a4A), ...           */
+        default:
+             if (p_buf_hdr->TCP_SegReset != DEF_YES) {          /* ... & reset NOT rx'd (see Note #2a4C), ...           */
+                                                                /* ... tx TCP conn ack  (see Note #2a4B).               */
+                 NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+             }
+            *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd reset.                                  */
+    reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (reset_code) {
+        case NET_TCP_CONN_RX_RESET_NONE:
+             break;
+
+
+        case NET_TCP_CONN_RX_RESET_VALID:                       /* If   valid reset rx'd, ...                           */
+                                                                /* ...  close TCP conn (see Note #2b1A).                */
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_TCP_ERR_CONN_RESET_VALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_RESET_INVALID:                     /* If invalid reset rx'd, ...                           */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2b2Ac).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd ack.                                    */
+    ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (ack_code) {
+        case NET_TCP_CONN_RX_ACK_VALID:
+        case NET_TCP_CONN_RX_ACK_DUP:
+        case NET_TCP_CONN_RX_ACK_PREV:
+             break;
+
+
+        case NET_TCP_CONN_RX_ACK_NONE:                          /* If NO      ack rx'd, ...                             */
+            *p_err = NET_TCP_ERR_CONN_ACK_NONE;                 /* ... ignore TCP pkt  (see Note #2d1).                 */
+             return;
+
+
+        case NET_TCP_CONN_RX_ACK_INVALID:                       /* If invalid ack rx'd, ...                             */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2d2B).                */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+             return;
+    }
+
+
+
+                                                                /* ----------------- HANDLE RX'D SEG ------------------ */
+    NetTCP_RxPktConnHandlerSeg(p_conn, ack_code, p_buf, p_buf_hdr, &err_rtn);
+    switch (err_rtn) {
+        case NET_TCP_ERR_CONN_DATA_NONE:
+        case NET_TCP_ERR_CONN_DATA_VALID:
+             break;
+
+
+        case NET_TCP_ERR_CONN_DATA_DUP:
+            *p_err = err_rtn;
+             return;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_DATA_INVALID:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_RX_Q_FULL:
+        case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = err_rtn;
+             return;
+    }
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+                                                                /* -------------------- UPDATE TMR -------------------- */
+    timeout_tick = p_conn->TimeoutMaxSeg_tick_scaled;           /* Reset time-wait tmr (see Note #2d2C2).               */
+    if (p_conn->TimeoutTmr != DEF_NULL) {
+        NetTmr_Set((NET_TMR    *) p_conn->TimeoutTmr,
+                   (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+    } else {
+        p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_ConnIdleTimeout,
+                                       (void        *) p_conn,
+                                       (NET_TMR_TICK ) timeout_tick,
+                                       (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                       (NET_ERR     *)&err);
+    }
+
+    if ( err != NET_TMR_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+       *p_err  = NET_TCP_ERR_CONN_FAIL;
+        return;
+    }
+
+
+                                                                /* ----------------- TX TCP CONN ACK ------------------ */
+                                                                /* Tx TCP conn ack (see Notes #1c).                     */
+    NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_IMMED, NET_TCP_CONN_CLOSE_ALL, p_err);
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+        case NET_TCP_ERR_CONN_ACK_NONE:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_ACK_DLYD:
+        case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+             break;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_NONE_AVAIL:
+        default:
+             return;
+    }
+
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_RxPktConnHandlerCloseWait()
+*
+* Description : (1) Handle TCP connection in CLOSE-WAIT state :
+*
+*                   (a) Validate received TCP packet for current TCP connection state :
+*
+*                       (1) Sequence Number (SEQ)                                   See Note  #2a
+*                       (2) Reset           (RST)                                   See Note  #2b
+*                       (3) Synchronization (SYN)                                   See Note  #2c
+*                       (4) Acknowledgement (ACK)                                   See Note  #2d
+*                       (5) Finish/Close    (FIN)                                   See Note  #2f
+*
+*                   (b) Update TCP connection :
+*                       (1) Handle received TCP segment                             See Notes #2d   & #2e
+*                       (2) Update TCP connection timer                             See Note  #3
+*
+*                   (c) Transmit TCP connection acknowledgement & data              See Notes #2d2B & #2f3
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_SEQ_SYNC_INVALID   Received segment's synchronization        is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence        number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_ACK_NONE           Received segment's acknowledgement        is
+*                                                                       NOT available.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Received segment's acknowledgement number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_VALID        Received segment's reset flag is     valid
+*                                                                       for current TCP connection; i.e. reset
+*                                                                       the TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      Received segment's reset flag is NOT valid
+*                                                                       for current TCP connection.
+*
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidSeq() : -----
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidAck() : -----
+*                                                                   ---- RETURNED BY NetTCP_RxPktConnIsValidReset() : ----
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnHandlerSeg() : -----
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data to   queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid
+*                                                                       data queued for processing.
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment
+*                                                                       data; NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment
+*                                                                       data; NOT queued to receive queue(s).
+*
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                               NET_TCP_ERR_RX_Q_FULL               TCP connection receive  queue full.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT       TCP connection receive  queue signal fault.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT       TCP connection transmit queue signal fault.
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*
+*                                                                   ---------- RETURNED BY NetTCP_TxConnTxQ() : ----------
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandler().
+*
+* Note(s)     : (2) TCP connections in the CLOSE-WAIT state are handled as follows :
+*
+*                   (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that in the "SYN-RECEIVED, ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2
+*                       STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE" that :
+*
+*                       (1) "Segments are processed in sequence ... processing is done in SEG.SEQ order."
+*
+*                       (2) "Initial tests on arrival are used to discard old duplicates."
+*
+*                       (3) "If a segment's contents straddle the boundary between old and new, only the
+*                            new parts should be processed."
+*
+*                       (4) (A) "If an incoming segment is not acceptable," ...
+*
+*                           (B) "an acknowledgment should be sent in reply" ...
+*
+*                           (C) "(unless the RST bit is set, if so drop the segment)".
+*
+*                               See also Notes #2b2Aa & #2b2B.
+*
+*                       See also 'NetTCP_RxPktConnIsValidSeq()  Note #1d'.
+*
+*                   (b) (1) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit' states
+*                               that in the "ESTABLISHED, FIN-WAIT-1, FIN-WAIT-2, CLOSE-WAIT" states that "if the
+*                               RST bit is set then, any outstanding RECEIVEs and SEND[s] should receive 'reset'
+*                               responses.  All segment queues should be flushed.  Users should also receive an
+*                               unsolicited general 'connection reset' signal[, and] enter the CLOSED state".
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing' reiterates
+*                               that "if the receiver ... of a RST ... was in any other state [other than LISTEN
+*                               or SYN-RECEIVED], it aborts the connection and advises the user and goes to the
+*                               CLOSED state".
+*
+*                       (2) (A) RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 amends the "handling of a segment
+*                               with the RST bit when in a synchronized state" to "provide some protection against
+*                               ... blind reset attack[s] using the RST bit" :
+*
+*                               (a) "If the RST bit is set and the sequence number is outside the expected
+*                                    window, silently drop the segment."
+*
+*                               (b) "If the RST bit is exactly the next expected sequence number [sic], reset
+*                                    the connection"; it is assumed that this should read "if the RST bit is
+*                                    set and the sequence number is exactly the next expected sequence number,
+*                                    reset the connection."
+*
+*                               (c) "If the RST bit is set and the sequence number does not exactly match
+*                                    the next expected sequence value, yet is within the acceptable window
+*                                    (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) send an acknowledgment."
+*
+*                           (B) In addition, RFC Draft-IETF-TCPm-TCPSecure #00 does NOT provide a precedence
+*                               priority for handling TCP segments received with BOTH the RST & SYN bits set.
+*
+*                               Therefore, since it does NOT seem reasonable to reset a TCP connection
+*                               due to a TCP segment that also attempted to synchronize the  TCP connection,
+*                               it is assumed that the amended handling of the SYN bit should take precedence
+*                               over the amended handling of the RST bit.
+*
+*                               See also Note #2c2.
+*
+*                   (c) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN Bit'
+*                           states that in the "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT STATE-1,
+*                           FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that :
+*
+*                           (A) "If the SYN is in the window it is an error, send a reset, any outstanding
+*                                RECEIVEs and SEND[s] should receive 'reset' responses, all segment queues
+*                                should be flushed, the user should also receive an unsolicited general
+*                               'connection reset' signal[, and] enter the CLOSED state."
+*
+*                           (B) But "if the SYN is not in the window this step would not have been reached
+*                               and an ack would have been sent".
+*
+*                       (2) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 3.2 amends the  "handling
+*                           of a segment with the SYN bit set in the synchronized state ... [by] handling
+*                           ... the SYN bit" as follows :
+*
+*                           (a) "If the SYN bit is set and the sequence number is outside the
+*                                expected window, send an ACK back to the peer."
+*
+*                           (b) "If the SYN bit is set and the sequence number is an exact
+*                                match to the next expected sequence (RCV.NXT == SEG.SEQ)
+*                                then send an ACK segment ... but ... subtract one from
+*                                value being acknowledged."
+*
+*                           (c) "If the SYN bit is set and the sequence number is acceptable,
+*                                i.e.: (RCV.NXT <= SEG.SEQ <= RCV.NXT+RCV.WND) then send an
+*                                ACK segment."
+*
+*                   (d) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field'
+*                       states that :
+*
+*                       (1) "If the ACK bit is off drop the segment."
+*
+*                       (2) "If the ACK bit is on" :
+*
+*                           (A) And in the "ESTABLISHED STATE" :
+*
+*                               (1) "If SND.UNA < SEG.ACK <= SND.NXT then" :
+*
+*                                   (a) "Set SND.UNA <- SEG.ACK."
+*
+*                                   (b) "Any segments on the retransmission queue which are thereby entirely
+*                                        acknowledged are removed."
+*
+*                                   (c) "The send window should be updated" :
+*
+*                                       (1) (A) (1) "If ((SND.WL1 <  SEG.SEQ) or" ...
+*
+*                                               (2) (a) "(SND.WL1  = SEG.SEQ and" ...
+*                                                   (b)  "SND.WL2 <= SEG.ACK)),"  ...
+*
+*                                           (B) (1) "Set SND.WND <- SEG.WND," ...
+*                                               (2) "Set SND.WL1 <- SEG.SEQ," ...
+*                                               (3) "Set SND.WL2 <- SEG.ACK."
+*
+*                                       (2) "Note that SND.WND is an offset from SND.UNA, that SND.WL1 records the
+*                                            sequence number of the last segment used to update SND.WND, and that
+*                                            SND.WL2 records the acknowledgment number of the last segment used to
+*                                            update SND.WND.  The check here prevents using old segments to update
+*                                            the window."
+*
+*                               (2) (a) "If the ACK is a duplicate (SEG.ACK <= SND.UNA), it can be ignored."
+*
+*                                   (b) RFC #1122, Section 4.2.2.20.(g) amends the transmit window update criteria
+*                                       for the segment's acknowledgement to include SND.UNA : "The window should
+*                                       updated if SND.UNA <= SEG.ACK <= SND.NXT."
+*
+*                                       See also 'NetTCP_RxPktConnHandlerTxWinRemote()  Note #1b2'.
+*
+*                               (3) "If the ACK acks something not yet sent (SEG.ACK > SND.NXT) then send an ACK
+*                                    [and] drop the segment."
+*
+*                           (B) For the "CLOSE-WAIT STATE ... do the same processing as for the ESTABLISHED state".
+*
+*                   (e) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment Text'
+*                           states that in the "CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that "this should not occur, since a FIN has been received from the remote
+*                           side.  Ignore the segment text."
+*
+*                       (2) (A) However, it is possible that some but NOT all data has been received from the
+*                               remote host.  In other words, the remote host's close request may have been
+*                               received but ALL receive data preceding the close request may NOT have been
+*                               received.
+*
+*                               Therefore, receive data validated by sequence number as within the receive
+*                               window MUST be received & processed as in connected states.
+*
+*                           (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment
+*                               Text' states that "once in the ESTABLISHED state, it is possible to deliver
+*                               segment text to user RECEIVE buffers".
+*
+*                           See also Note #2d2B.
+*
+*                   (f) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                       that "if the FIN bit is set" :
+*
+*                       (1) "Signal the user 'connection closing' and return any pending RECEIVEs with
+*                            same message," ...
+*
+*                       (2) "Advance RCV.NXT over the FIN," ...
+*
+*                       (3) "Send an acknowledgment for the FIN" ...
+*
+*                       (4) "FIN implies PUSH for any segment text not yet delivered to the user" ...
+*
+*                       (5) And the "CLOSE-WAIT STATE ... remain[s] in the CLOSE-WAIT state".
+*
+*               (3) (a) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : USER TIMEOUT' states that
+*                       "for any state if the user timeout expires, flush all queues, signal the user
+*                       'error : connection aborted due to user timeout' ... [and] enter the CLOSED state".
+*
+*                   (b) However, NO RFC specifies or suggests any mechanism to implement/handle user timeouts.
+*
+*                       Therefore, it is assumed that ANY TCP connection that receives a valid TCP data
+*                       or control segment should reset its connection timer.
+*
+*               (4) Some  transitory errors were ignored &/or not returned from previous handler function(s).
+*                   These transitory errors are included for completeness & as an extra precaution in case
+*                   these transitory errors are returned by handler function(s).
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerCloseWait (NET_TCP_CONN  *p_conn,
+                                                NET_BUF       *p_buf,
+                                                NET_BUF_HDR   *p_buf_hdr,
+                                                NET_ERR       *p_err)
+{
+    NET_TCP_SEQ_CODE    seq_code;
+    NET_TCP_ACK_CODE    ack_code;
+    NET_TCP_RESET_CODE  reset_code;
+    NET_TMR_TICK        timeout_tick;
+    NET_ERR             err;
+    NET_ERR             err_rtn;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+                                                                /* Chk for rx'd fin/close.                              */
+    if (p_buf_hdr->TCP_SegClose == DEF_YES) {                   /* If fin/close avail, update seg lens.                 */
+        p_buf_hdr->TCP_SegLenInit += NET_TCP_SEG_LEN_CLOSE;
+        p_buf_hdr->TCP_SegLen     += NET_TCP_SEG_LEN_CLOSE;
+    }
+
+                                                                /* Chk rx'd seq nbr.                                    */
+    seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (seq_code) {
+        case NET_TCP_CONN_RX_SEQ_VALID:
+             break;
+
+
+        case NET_TCP_CONN_RX_SEQ_SYNC:                          /* If invalid sync rx'd, ...                            */
+        case NET_TCP_CONN_RX_SEQ_SYNC_INVALID:
+                                                                /* ... tx TCP conn ack  (see Notes #2c2 & #2b2B).       */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_SEQ_SYNC_INVALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_SEQ_NONE:
+        case NET_TCP_CONN_RX_SEQ_INVALID:                       /* If invalid seq  rx'd (see Note #2a4A), ...           */
+        default:
+             if (p_buf_hdr->TCP_SegReset != DEF_YES) {          /* ... & reset NOT rx'd (see Note #2a4C), ...           */
+                                                                /* ... tx TCP conn ack  (see Note #2a4B).               */
+                 NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+             }
+            *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd reset.                                  */
+    reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (reset_code) {
+        case NET_TCP_CONN_RX_RESET_NONE:
+             break;
+
+
+        case NET_TCP_CONN_RX_RESET_VALID:                       /* If   valid reset rx'd, ...                           */
+                                                                /* ...  close TCP conn (see Note #2b1A).                */
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_TCP_ERR_CONN_RESET_VALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_RESET_INVALID:                     /* If invalid reset rx'd, ...                           */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2b2Ac).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd ack.                                    */
+    ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (ack_code) {
+        case NET_TCP_CONN_RX_ACK_VALID:
+        case NET_TCP_CONN_RX_ACK_DUP:
+        case NET_TCP_CONN_RX_ACK_PREV:
+             break;
+
+
+        case NET_TCP_CONN_RX_ACK_NONE:                          /* If NO      ack rx'd, ...                             */
+            *p_err = NET_TCP_ERR_CONN_ACK_NONE;                 /* ... ignore TCP pkt  (see Note #2d1).                 */
+             return;
+
+
+        case NET_TCP_CONN_RX_ACK_INVALID:                       /* If invalid ack rx'd, ...                             */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2d2A3).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+             return;
+    }
+
+
+
+                                                                /* ----------------- HANDLE RX'D SEG ------------------ */
+    NetTCP_RxPktConnHandlerSeg(p_conn, ack_code, p_buf, p_buf_hdr, &err_rtn);
+    switch (err_rtn) {
+        case NET_TCP_ERR_CONN_DATA_NONE:
+        case NET_TCP_ERR_CONN_DATA_VALID:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s) [see Note #4].           */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_CONN_DATA_DUP:
+            *p_err = err_rtn;
+             return;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_FAIL:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_DATA_INVALID:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_RX_Q_FULL:
+        case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+        case NET_TCP_ERR_TX_PKT:
+        case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+        case NET_TCP_ERR_RE_TX_SEG_TH:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = err_rtn;
+             return;
+    }
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+                                                                /* -------------------- UPDATE TMR -------------------- */
+    timeout_tick = p_conn->TimeoutConn_tick;                    /* Reset conn idle/close tmr (see Note #3b).            */
+    if (p_conn->TimeoutTmr != DEF_NULL) {
+        NetTmr_Set((NET_TMR    *) p_conn->TimeoutTmr,
+                   (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+    } else {
+        p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_ConnIdleTimeout,
+                                       (void        *) p_conn,
+                                       (NET_TMR_TICK ) timeout_tick,
+                                       (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                       (NET_ERR     *)&err);
+    }
+
+    if ( err != NET_TMR_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+       *p_err  = NET_TCP_ERR_CONN_FAIL;
+        return;
+    }
+
+
+
+                                                                /* --------------- TX TCP CONN ACK/DATA --------------- */
+    ack_code = ((p_buf_hdr->TCP_SegAckTxReqCode == NET_TCP_CONN_TX_ACK_IMMED) ||
+                (p_buf_hdr->TCP_SegClose        == DEF_YES))    /* See Note #2f3.                                       */
+             ?   NET_TCP_CONN_TX_ACK_IMMED
+             :   NET_TCP_CONN_TX_ACK;
+                                                                /* Tx ack & any tx data (see Note #1c).                 */
+    NetTCP_TxConnTxQ(p_conn,
+                     p_buf_hdr,
+                     ack_code,
+                     DEF_NO,
+                     NET_TCP_CONN_CLOSE_ALL,
+                     DEF_NO,
+                     p_err);
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+        case NET_TCP_ERR_CONN_ACK_NONE:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_ACK_DLYD:
+        case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s).                         */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_CLOSE:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_CONN_FAIL:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_NONE_AVAIL:
+        case NET_TCP_ERR_TX_PKT:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        case NET_CONN_ERR_INVALID_FAMILY:
+        case NET_CONN_ERR_INVALID_ADDR:
+        case NET_CONN_ERR_INVALID_ADDR_LEN:
+        default:
+             return;
+    }
+
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_RxPktConnHandlerLastAck()
+*
+* Description : (1) Handle TCP connection in LAST-ACK state :
+*
+*                   (a) Validate received TCP packet for current TCP connection state :
+*
+*                       (1) Sequence Number (SEQ)                                   See Note  #2a
+*                       (2) Reset           (RST)                                   See Note  #2b
+*                       (3) Synchronization (SYN)                                   See Note  #2c
+*                       (4) Acknowledgement (ACK)                                   See Note  #2d
+*                       (5) Finish/Close    (FIN)                                   See Note  #2f
+*
+*                   (b) Update TCP connection :
+*                       (1) Handle received TCP segment                             See Notes #2d       & #2e
+*                       (2) Update TCP connection state :                           See Notes #2d2A1a   & #2d2A1b2A
+*                           (A) Configure TCP connection timeout value
+*                       (3) Update TCP connection timer                             See Notes #2d2A1b2B & #3
+*
+*                   (c) Transmit TCP connection acknowledgement & data              See Notes #2d2B     & #2f3
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_SEQ_SYNC_INVALID   Received segment's synchronization        is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence        number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_ACK_NONE           Received segment's acknowledgement        is
+*                                                                       NOT available.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Received segment's acknowledgement number is
+*                                                                       NOT valid for current TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_VALID        Received segment's reset flag is     valid
+*                                                                       for current TCP connection; i.e. reset
+*                                                                       the TCP connection.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      Received segment's reset flag is NOT valid
+*                                                                       for current TCP connection.
+*
+*                               NET_TCP_ERR_CONN_CLOSED             TCP connection successfully closed.
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidSeq() : -----
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnIsValidAck() : -----
+*                                                                   ---- RETURNED BY NetTCP_RxPktConnIsValidReset() : ----
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxPktConnHandlerSeg() : -----
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO
+*                                                                       data to   queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid
+*                                                                       data queued for processing.
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment
+*                                                                       data; NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment
+*                                                                       data; NOT queued to receive queue(s).
+*
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                               NET_TCP_ERR_RX_Q_FULL               TCP connection receive  queue full.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT       TCP connection receive  queue signal fault.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT       TCP connection transmit queue signal fault.
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*
+*                                                                   ---------- RETURNED BY NetTCP_TxConnTxQ() : ----------
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandler().
+*
+* Note(s)     : (2) TCP connections in the LAST-ACK state are handled as follows :
+*
+*                   (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that in the "SYN-RECEIVED, ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2
+*                       STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT STATE" that :
+*
+*                       (1) "Segments are processed in sequence ... processing is done in SEG.SEQ order."
+*
+*                       (2) "Initial tests on arrival are used to discard old duplicates."
+*
+*                       (3) "If a segment's contents straddle the boundary between old and new, only the
+*                            new parts should be processed."
+*
+*                       (4) (A) "If an incoming segment is not acceptable," ...
+*
+*                           (B) "an acknowledgment should be sent in reply" ...
+*
+*                           (C) "(unless the RST bit is set, if so drop the segment)".
+*
+*                               See also Notes #2b2Aa & #2b2B.
+*
+*                       See also 'NetTCP_RxPktConnIsValidSeq()  Note #1d'.
+*
+*                   (b) (1) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit' states
+*                               that in the "ESTABLISHED, FIN-WAIT-1, FIN-WAIT-2, CLOSE-WAIT" states that "if the
+*                               RST bit is set then, any outstanding RECEIVEs and SEND[s] should receive 'reset'
+*                               responses.  All segment queues should be flushed.  Users should also receive an
+*                               unsolicited general 'connection reset' signal[, and] enter the CLOSED state".
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing' reiterates
+*                               that "if the receiver ... of a RST ... was in any other state [other than LISTEN
+*                               or SYN-RECEIVED], it aborts the connection and advises the user and goes to the
+*                               CLOSED state".
+*
+*                       (2) (A) RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 amends the "handling of a segment
+*                               with the RST bit when in a synchronized state" to "provide some protection against
+*                               ... blind reset attack[s] using the RST bit" :
+*
+*                               (a) "If the RST bit is set and the sequence number is outside the expected
+*                                    window, silently drop the segment."
+*
+*                               (b) "If the RST bit is exactly the next expected sequence number [sic], reset
+*                                    the connection"; it is assumed that this should read "if the RST bit is
+*                                    set and the sequence number is exactly the next expected sequence number,
+*                                    reset the connection."
+*
+*                               (c) "If the RST bit is set and the sequence number does not exactly match
+*                                    the next expected sequence value, yet is within the acceptable window
+*                                    (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) send an acknowledgment."
+*
+*                           (B) In addition, RFC Draft-IETF-TCPm-TCPSecure #00 does NOT provide a precedence
+*                               priority for handling TCP segments received with BOTH the RST & SYN bits set.
+*
+*                               Therefore, since it does NOT seem reasonable to reset a TCP connection
+*                               due to a TCP segment that also attempted to synchronize the  TCP connection,
+*                               it is assumed that the amended handling of the SYN bit should take precedence
+*                               over the amended handling of the RST bit.
+*
+*                               See also Note #2c2.
+*
+*                   (c) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN Bit'
+*                           states that in the "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT STATE-1,
+*                           FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that :
+*
+*                           (A) "If the SYN is in the window it is an error, send a reset, any outstanding
+*                                RECEIVEs and SEND[s] should receive 'reset' responses, all segment queues
+*                                should be flushed, the user should also receive an unsolicited general
+*                               'connection reset' signal[, and] enter the CLOSED state."
+*
+*                           (B) But "if the SYN is not in the window this step would not have been reached
+*                               and an ack would have been sent".
+*
+*                       (2) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 3.2 amends the  "handling
+*                           of a segment with the SYN bit set in the synchronized state ... [by] handling
+*                           ... the SYN bit" as follows :
+*
+*                           (a) "If the SYN bit is set and the sequence number is outside the
+*                                expected window, send an ACK back to the peer."
+*
+*                           (b) "If the SYN bit is set and the sequence number is an exact
+*                                match to the next expected sequence (RCV.NXT == SEG.SEQ)
+*                                then send an ACK segment ... but ... subtract one from
+*                                value being acknowledged."
+*
+*                           (c) "If the SYN bit is set and the sequence number is acceptable,
+*                                i.e.: (RCV.NXT <= SEG.SEQ <= RCV.NXT+RCV.WND) then send an
+*                                ACK segment."
+*
+*                   (d) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field'
+*                       states that :
+*
+*                       (1) "If the ACK bit is off drop the segment."
+*
+*                       (2) "If the ACK bit is on [and in the] LAST-ACK STATE" :
+*
+*                           (A) "The only thing that can arrive in this state is an acknowledgement of our FIN."
+*
+*                               (1) "If our FIN is now acknowledged" ...
+*
+*                                   (a) "Enter the CLOSED state."
+*
+*                                   (b) However, it is possible that some closing received data from the remote
+*                                       host is available but has NOT yet been received by the application layer.
+*
+*                                       (1) Therefore, if the application receive queue is closed, then close the
+*                                           TCP connection &/or enter the CLOSED state.
+*
+*                                       (2) (A) But if the application receive queue is NOT closed, then enter the
+*                                               connection-closing-data-available state to allow the application
+*                                               layer to receive the remaining receive data.
+*
+*                                           (B) To provide the application layer sufficient time to receive the
+*                                               closing received data, the user connection timeout is used as a
+*                                               connection closing timeout.
+*
+*                                       See also Note #2e2.
+*
+*                               (2) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                                       FIN-WAIT-2 STATE' states that "if the retransmission queue is empty, the
+*                                       user's CLOSE can be acknowledged".
+*
+*                                   (b) However, TCP connection should signal the application layer that "the user's
+*                                       close [is] acknowledged" whenever its re-transmit queue becomes &/or is
+*                                       empty :
+*
+*                                       (1) Transition from LAST-ACK to CLOSED
+*
+*                                   See also 'NetTCP_RxPktConnHandlerSignalClose()  Note #1'.
+*
+*                           (B) However, it is possible that some but NOT all transmitted data has been received
+*                               by the remote host.  In other words, the remote host may have received some but
+*                               NOT ALL receive data preceding this host's close request.
+*
+*                               Therefore, acknowledgements validated as within the transmit window MUST be
+*                               received & processed as in connected states.
+*
+*                               See also 'NetTCP_RxPktConnIsValidAck()  Note #1d'.
+*
+*                   (e) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment Text'
+*                           states that in the "CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                           STATE" that "this should not occur, since a FIN has been received from the remote
+*                           side.  Ignore the segment text."
+*
+*                       (2) (A) However, it is possible that some but NOT all data has been received from
+*                               the remote host.  In other words, the remote host's close request may have
+*                               received but ALL receive data preceding the close request may NOT have been
+*                               received.
+*
+*                               Therefore, receive data validated by sequence number as within the
+*                               receive window MUST be received & processed as in connected states.
+*
+*                           (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment
+*                               Text' states that "once in the ESTABLISHED state, it is possible to deliver
+*                               segment text to user RECEIVE buffers".
+*
+*                           See also Note #2d2A1b.
+*
+*                   (f) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                       that "if the FIN bit is set" :
+*
+*                       (1) "Signal the user 'connection closing' and return any pending RECEIVEs with
+*                            same message," ...
+*
+*                       (2) "Advance RCV.NXT over the FIN," ...
+*
+*                       (3) "Send an acknowledgment for the FIN" ...
+*
+*                       (4) "FIN implies PUSH for any segment text not yet delivered to the user" ...
+*
+*                       (5) And the "LAST-ACK STATE ... remain[s] in the LAST-ACK state".
+*
+*               (3) (a) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : USER TIMEOUT' states that
+*                       "for any state if the user timeout expires, flush all queues, signal the user
+*                       'error : connection aborted due to user timeout' ... [and] enter the CLOSED state".
+*
+*                   (b) (1) However, a TCP connection enters the LAST-ACK state ONLY after the remote host
+*                           has initiated an active close & enters the TIME-WAIT state, waiting for its
+*                           time-wait timer to expire before closing its TCP connection.
+*
+*                       (2) Therefore, a TCP connection in the LAST-ACK state should NOT wait for its
+*                           last acknowledgement from the remote host in the TIME-WAIT state longer than
+*                           the remote host's time-wait timeout of two TCP maximum segment lifetimes.
+*
+*                       (3) Therefore, it is assumed that ANY TCP connection in the LAST-ACK state
+*                           that receives a valid TCP data or control segment should reset its time-wait
+*                           timer for two TCP maximum segment lifetimes.
+*
+*               (4) Since the mechanisms of TCP connection close are independent of the application layer
+*                   close; any external application layer close error(s) are ignored.
+*
+*               (5) Some  transitory errors were ignored &/or not returned from previous handler function(s).
+*                   These transitory errors are included for completeness & as an extra precaution in case
+*                   these transitory errors are returned by handler function(s).
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerLastAck (NET_TCP_CONN  *p_conn,
+                                              NET_BUF       *p_buf,
+                                              NET_BUF_HDR   *p_buf_hdr,
+                                              NET_ERR       *p_err)
+{
+    NET_TCP_SEQ_CODE    seq_code;
+    NET_TCP_ACK_CODE    ack_code;
+    NET_TCP_RESET_CODE  reset_code;
+    CPU_BOOLEAN         data_avail;
+    CPU_BOOLEAN         close_conn;
+    NET_TMR_TICK        timeout_tick;
+    NET_ERR             err;
+    NET_ERR             err_rtn;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+                                                                /* Chk for rx'd fin/close.                              */
+    if (p_buf_hdr->TCP_SegClose == DEF_YES) {                   /* If fin/close avail, update seg lens.                 */
+        p_buf_hdr->TCP_SegLenInit += NET_TCP_SEG_LEN_CLOSE;
+        p_buf_hdr->TCP_SegLen     += NET_TCP_SEG_LEN_CLOSE;
+    }
+
+                                                                /* Chk rx'd seq nbr.                                    */
+    seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (seq_code) {
+        case NET_TCP_CONN_RX_SEQ_VALID:
+             break;
+
+
+        case NET_TCP_CONN_RX_SEQ_SYNC:                          /* If invalid sync rx'd, ...                            */
+        case NET_TCP_CONN_RX_SEQ_SYNC_INVALID:
+                                                                /* ... tx TCP conn ack  (see Notes #2c2 & #2b2B).       */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_SEQ_SYNC_INVALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_SEQ_NONE:
+        case NET_TCP_CONN_RX_SEQ_INVALID:                       /* If invalid seq  rx'd (see Note #2a4A), ...           */
+        default:
+             if (p_buf_hdr->TCP_SegReset != DEF_YES) {          /* ... & reset NOT rx'd (see Note #2a4C), ...           */
+                                                                /* ... tx TCP conn ack  (see Note #2a4B).               */
+                 NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+             }
+            *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd reset.                                  */
+    reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (reset_code) {
+        case NET_TCP_CONN_RX_RESET_NONE:
+             break;
+
+
+        case NET_TCP_CONN_RX_RESET_VALID:                       /* If   valid reset rx'd, ...                           */
+                                                                /* ...  close TCP conn (see Note #2b1A).                */
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_TCP_ERR_CONN_RESET_VALID;
+             return;
+
+
+        case NET_TCP_CONN_RX_RESET_INVALID:                     /* If invalid reset rx'd, ...                           */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2b2Ac).               */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+             return;
+    }
+
+                                                                /* Chk for rx'd ack.                                    */
+    ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+    switch (ack_code) {
+        case NET_TCP_CONN_RX_ACK_VALID:
+        case NET_TCP_CONN_RX_ACK_DUP:
+        case NET_TCP_CONN_RX_ACK_PREV:
+             break;
+
+
+        case NET_TCP_CONN_RX_ACK_NONE:                          /* If NO      ack rx'd, ...                             */
+            *p_err = NET_TCP_ERR_CONN_ACK_NONE;                 /* ... ignore TCP pkt  (see Note #2d1).                 */
+             return;
+
+
+        case NET_TCP_CONN_RX_ACK_INVALID:                       /* If invalid ack rx'd, ...                             */
+        default:
+                                                                /* ... tx TCP conn ack (see Note #2d2B).                */
+             NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+            *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+             return;
+    }
+
+
+
+                                                                /* ----------------- HANDLE RX'D SEG ------------------ */
+    NetTCP_RxPktConnHandlerSeg(p_conn, ack_code, p_buf, p_buf_hdr, &err_rtn);
+    switch (err_rtn) {
+        case NET_TCP_ERR_CONN_DATA_NONE:
+        case NET_TCP_ERR_CONN_DATA_VALID:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s) [see Note #5].           */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_CONN_DATA_DUP:
+            *p_err = err_rtn;
+             return;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_FAIL:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_DATA_INVALID:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_RX_Q_FULL:
+        case NET_TCP_ERR_RX_Q_SIGNAL_FAULT:
+        case NET_TCP_ERR_TX_Q_SIGNAL_FAULT:
+        case NET_TCP_ERR_RE_TX_SEG_TH:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+            *p_err = err_rtn;
+             return;
+    }
+
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+    close_conn = DEF_NO;
+    if (p_conn->RxQ_State == NET_TCP_RX_Q_STATE_CLOSED) {       /* If    remote conn closed      (see Note #2e2A)  ...  */
+                                                                /* ... & local  conn close ack'd (see Note #2d2A1) ...  */
+        if ((p_conn->TxQ_State == NET_TCP_TX_Q_STATE_CLOSED        ) ||
+            (p_conn->TxQ_State == NET_TCP_TX_Q_STATE_CLOSED_SUSPEND)) {
+            close_conn = DEF_YES;
+        }
+    }
+
+    if (close_conn == DEF_YES) {
+                                                                /* Closing data avail for half-closed conns ONLY.       */
+        data_avail = ((p_conn->ConnCloseCode !=  NET_CONN_CLOSE_HALF      ) ||
+                     ((p_conn->RxQ_State     ==  NET_TCP_RX_Q_STATE_CLOSED) &&
+                      (p_conn->RxQ_App_Head  == DEF_NULL))) ? DEF_NO : DEF_YES;
+                                                                /* ... signal app conn close (see Note #2d2A2b1);  ...  */
+                                                                /* Ignore any app conn close err(s) [see Note #4].      */
+        NetTCP_RxPktConnHandlerSignalClose(p_conn, data_avail, &err);
+
+
+        if (data_avail != DEF_YES) {                            /* ... & if NO app data avail,                     ...  */
+                                                                /* ... close TCP conn (see Note #2d2A1b1);         ...  */
+            NetTCP_ConnCloseHandler(p_conn, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+           *p_err = NET_TCP_ERR_CONN_CLOSED;
+            return;
+        }
+                                                                /* ... else chng to closing-data-avail state       ...  */
+                                                                /* ... (see Note #2d2A1b2A),                       ...  */
+        p_conn->ConnState = NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL;
+        timeout_tick     = p_conn->TimeoutUser_tick;            /* ... & set user tmr (see Note #2d2A1b2B).             */
+
+    } else {                                                    /* Else start time-wait tmr (see Note #3b3).            */
+        timeout_tick     = p_conn->TimeoutMaxSeg_tick_scaled;
+    }
+
+
+                                                                /* -------------------- UPDATE TMR -------------------- */
+    if (p_conn->TimeoutTmr != DEF_NULL) {
+        NetTmr_Set((NET_TMR    *) p_conn->TimeoutTmr,
+                   (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+    } else {
+        p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_ConnIdleTimeout,
+                                       (void        *) p_conn,
+                                       (NET_TMR_TICK ) timeout_tick,
+                                       (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                       (NET_ERR     *)&err);
+    }
+
+    if ( err != NET_TMR_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+       *p_err  = NET_TCP_ERR_CONN_FAIL;
+        return;
+    }
+
+
+
+                                                                /* --------------- TX TCP CONN ACK/DATA --------------- */
+    ack_code = ((p_buf_hdr->TCP_SegAckTxReqCode == NET_TCP_CONN_TX_ACK_IMMED) ||
+                (p_buf_hdr->TCP_SegClose        == DEF_YES))    /* See Note #2f3.                                       */
+             ?   NET_TCP_CONN_TX_ACK_IMMED
+             :   NET_TCP_CONN_TX_ACK;
+                                                                /* Tx ack & any tx data (see Note #1c).                 */
+    NetTCP_TxConnTxQ(p_conn,
+                     p_buf_hdr,
+                     ack_code,
+                     DEF_NO,
+                     NET_TCP_CONN_CLOSE_ALL,
+                     DEF_NO,
+                     p_err);
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+        case NET_TCP_ERR_CONN_ACK_NONE:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_ACK_DLYD:
+        case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s).                         */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_CLOSE:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_CONN_FAIL:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_NONE_AVAIL:
+        case NET_TCP_ERR_TX_PKT:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        case NET_CONN_ERR_INVALID_FAMILY:
+        case NET_CONN_ERR_INVALID_ADDR:
+        case NET_CONN_ERR_INVALID_ADDR_LEN:
+        default:
+             return;
+    }
+
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_RxPktConnHandlerSeg()
+*
+* Description : (1) Handle TCP connection's received segments :
+*
+*                   (a) Update TCP connection    transmit remote window                     See Note  #6
+*                   (b) Update TCP connection controls on transition to connected state(s)
+*                   (c) Handle TCP connection re-transmit queue                             See Notes #2b & #5
+*                   (d) Update TCP connection    transmit congestion controls               See Note  #7
+*                   (e) Handle TCP connection    receive  queue(s)                          See Note  #3
+*                   (f) Handle TCP connection    receive  data                              See Notes #2a & #3
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               ack_code    Indicates the received segment's acknowledgement condition :
+*               --------
+*                               NET_TCP_CONN_RX_ACK_NONE            NO received acknowledgement number.
+*
+*                               NET_TCP_CONN_RX_ACK_INVALID            Received acknowledgement number
+*                                                                      is invalid for the TCP connection.
+*
+*                               NET_TCP_CONN_RX_ACK_VALID              Received acknowledgement number
+*                                                                      is   valid for the TCP connection.
+*
+*                               NET_TCP_CONN_RX_ACK_DUP                Received acknowledgement number
+*                                                                      is a          duplicate for the
+*                                                                      TCP connection.
+*
+*                               NET_TCP_CONN_RX_ACK_PREV               Received acknowledgement number
+*                                                                      is a previous duplicate for the
+*                                                                      TCP connection.
+*
+*                           Argument validated in NetTCP_RxPktConnHandler() functions.
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Valid received segment acknowledgement NOT available.
+*
+*                                                                   -- RETURNED BY NetTCP_RxPktConnHandlerTxWinRemote() : -
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                                                                   ---- RETURNED BY NetTCP_RxPktConnHandlerReTxQ() : -----
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT       TCP connection transmit queue signal fault.
+*
+*                                                                   - RETURNED BY NetTCP_TxConnWinSizeHandlerCongCtrl() : -
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*
+*                                                                   --- RETURNED BY NetTCP_RxPktConnHandlerRxQ_Sync() : ---
+*                                                                   --- RETURNED BY NetTCP_RxPktConnHandlerRxQ_Conn() : ---
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but NO data
+*                                                                       to  queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled & valid data
+*                                                                       queued for application.
+*
+*                                                                   --- RETURNED BY NetTCP_RxPktConnHandlerRxQ_Conn() : ---
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment data;
+*                                                                       NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment data;
+*                                                                       NOT queued to receive queue(s).
+*
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence number is NOT
+*                                                                       valid for current TCP connection.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+*                                                                   -- RETURNED BY NetTCP_RxPktConnHandlerRxQ_AppData() : -
+*                               NET_TCP_ERR_RX_Q_FULL               TCP connection receive queue full.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT       TCP connection receive queue signal fault.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_CLR         TCP connection receive queue clear  failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Various NetTCP_RxPktConnHandler() functions.
+*
+* Note(s)     : (2) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that "segments are processed in sequence ... processing is done in SEG.SEQ
+*                       order" (see also Note #3).
+*
+*                   (b) The following sections generalize that for the SYN-SENT & ESTABLISHED states that
+*                       "any segments on the retransmission queue which are ... acknowledged should be
+*                       removed" :
+*
+*                       (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                               Check SYN Bit'
+*                       (2) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                               ESTABLISHED STATE'
+*
+*               (3) TCP segments with receive data are sequenced into the appropriate TCP connection
+*                   receive queue(s) to be made available & ready to be read by the application layer.
+*
+*                   See also 'NetTCP_RxPktConnHandlerRxQ_Conn()     Note #3'
+*                          & 'NetTCP_RxPktConnHandlerRxQ_AppData()  Note #2'.
+*
+*               (4) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6 'Connection
+*                   Establishment and Keepalive Timers', Page 828 states that "when a segment is received
+*                   on a connection", TCP "resets the keepalive timer for that connection".
+*
+*                   See also 'NetTCP_TxConnKeepAliveReset()  Note #1'.
+*
+*               (5) A TCP connection's re-transmit queue SHOULD be updated ONLY by valid received
+*                   acknowledgement segments.
+*
+*                   See also 'NetTCP_RxPktConnHandlerReTxQ()  Note #3'.
+*
+*               (6) RFC #1122, Section 4.2.2.20 generalizes that "when ... SND.UNA < SEG.ACK <= SND.NXT,
+*                   the send window should be updated".
+*
+*                   See also 'NetTCP_RxPktConnHandlerTxWinRemote()  Note #1'.
+*
+*               (7) RFC #2581, Section 3.1 states that "the slow start and congestion avoidance algorithms
+*                   ... [update] cwnd [TCP transmit congestion control window] for each ACK received that
+*                   acknowledges new data".
+*
+*                   (a) A TCP connection's transmit window congestion controls SHOULD be updated :
+*
+*                       (1) After    any possible updating of the TCP connection re-transmit queue.
+*                       (2) Prior to any possible queuing  of data segments into the TCP connection
+*                               receive queue(s).
+*
+*               (8) Some  transitory errors were ignored &/or not returned from previous handler function(s).
+*                   These transitory errors are included for completeness & as an extra precaution in case
+*                   these transitory errors are returned by handler function(s).
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerSeg (NET_TCP_CONN      *p_conn,
+                                          NET_TCP_ACK_CODE   ack_code,
+                                          NET_BUF           *p_buf,
+                                          NET_BUF_HDR       *p_buf_hdr,
+                                          NET_ERR           *p_err)
+{
+    NET_ERR  err_rtn;
+
+
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+
+        case NET_TCP_CONN_STATE_LISTEN:
+             NetTCP_RxPktConnHandlerRxQ_Sync(p_conn, p_buf, p_buf_hdr, &err_rtn);
+             break;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+             if (ack_code != NET_TCP_CONN_RX_ACK_VALID) {
+                *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+                 return;
+             }
+#endif
+
+             NetTCP_RxPktConnHandlerTxWinRemote(p_conn, ack_code, p_buf_hdr, p_err);
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+
+             NetTCP_RxPktConnHandlerCfgConn(p_conn);
+
+             NetTCP_RxPktConnHandlerReTxQ(p_conn, ack_code, p_buf_hdr, p_err);
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+
+             NetTCP_TxConnWinSizeHandlerCongCtrl(p_conn, p_buf_hdr, ack_code, 0u, NET_TCP_CONN_TX_WIN_SEG_RXD, p_err);
+             switch (*p_err) {
+                 case NET_TCP_ERR_NONE:
+                 case NET_ERR_TX:                               /* Ignore transitory tx err(s) [see Note #8].           */
+                 case NET_ERR_IF_LINK_DOWN:
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_TCP_ERR_RE_TX_SEG_TH:
+                 case NET_ERR_IF_LOOPBACK_DIS:
+                 default:
+                      return;
+             }
+
+             NetTCP_RxPktConnHandlerRxQ_Conn(p_conn, p_buf, p_buf_hdr, &err_rtn);
+             break;
+
+
+
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+             if (ack_code == NET_TCP_CONN_RX_ACK_VALID) {
+                 NetTCP_RxPktConnHandlerTxWinRemote(p_conn, ack_code, p_buf_hdr, p_err);
+                 if (*p_err != NET_TCP_ERR_NONE) {
+                      return;
+                 }
+
+                 NetTCP_RxPktConnHandlerCfgConn(p_conn);
+
+                 NetTCP_RxPktConnHandlerReTxQ(p_conn, ack_code, p_buf_hdr, p_err);
+                 if (*p_err != NET_TCP_ERR_NONE) {
+                      return;
+                 }
+
+                 NetTCP_TxConnWinSizeHandlerCongCtrl(p_conn, p_buf_hdr, ack_code, 0u, NET_TCP_CONN_TX_WIN_SEG_RXD, p_err);
+                 switch (*p_err) {
+                     case NET_TCP_ERR_NONE:
+                     case NET_ERR_TX:                           /* Ignore transitory tx err(s) [see Note #8].           */
+                     case NET_ERR_IF_LINK_DOWN:
+                          break;
+
+
+                     case NET_TCP_ERR_CONN_NOT_USED:
+                     case NET_TCP_ERR_CONN_FAIL:
+                     case NET_TCP_ERR_CONN_FAULT:
+                     case NET_TCP_ERR_INVALID_CONN_STATE:
+                     case NET_TCP_ERR_INVALID_CONN_OP:
+                     case NET_TCP_ERR_TX_PKT:
+                     case NET_TCP_ERR_RE_TX_SEG_TH:
+                     default:
+                          return;
+                 }
+
+                 NetTCP_RxPktConnHandlerRxQ_Conn(p_conn, p_buf, p_buf_hdr, &err_rtn);
+
+             } else {
+                 NetTCP_RxPktConnHandlerRxQ_Sync(p_conn, p_buf, p_buf_hdr, &err_rtn);
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+             switch (ack_code) {
+                 case NET_TCP_CONN_RX_ACK_VALID:
+                 case NET_TCP_CONN_RX_ACK_DUP:
+                 case NET_TCP_CONN_RX_ACK_PREV:
+                      break;
+
+
+                 case NET_TCP_CONN_RX_ACK_NONE:
+                 case NET_TCP_CONN_RX_ACK_INVALID:
+                 default:
+                     *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+                      return;
+             }
+#endif
+
+             NetTCP_TxConnKeepAliveReset(p_conn);
+
+
+             if ((p_buf_hdr->TCP_SegLenData  > 0u) &&           /* This check is added to avoid queuing data from       */
+                 (p_conn->RxWinSizeActual   == 0u)) {           /* remote host when the receive windows is 0.           */
+                                                                /* i.e. Remote stack doesn't respect RFCs.              */
+                 *p_err = NET_TCP_ERR_RX_Q_FULL;
+                  NET_CTR_ERR_INC(Net_ErrCtrs.TCP.RxPktQ_FullCtr);
+                  return;
+             }
+
+
+             NetTCP_RxPktConnHandlerTxWinRemote(p_conn, ack_code, p_buf_hdr, p_err);
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+
+             if (p_conn->MaxSegSizeConn <= 0) {                 /* Try set up again Conn if MSS was set to 0 in connect.*/
+                 NetTCP_RxPktConnHandlerCfgConn(p_conn);
+                 NetTCP_TxQ_Signal(p_conn->ID, p_err);
+                 if (*p_err != NET_TCP_ERR_NONE) {
+                      NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                                       (NET_BUF_HDR      *)0,
+                                       (CPU_BOOLEAN       )DEF_YES,
+                                       (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+                      return;
+                 }
+             }
+
+             switch (ack_code) {
+                 case NET_TCP_CONN_RX_ACK_VALID:                /* If valid ack, update re-tx Q (see Note #5).          */
+                 case NET_TCP_CONN_RX_ACK_DUP:
+                      NetTCP_RxPktConnHandlerReTxQ(p_conn, ack_code, p_buf_hdr, p_err);
+                      if (*p_err != NET_TCP_ERR_NONE) {
+                           return;
+                      }
+                      break;
+
+
+                 default:                                       /* 'default' case intentionally empty.                  */
+                      break;
+             }
+
+             NetTCP_TxConnWinSizeHandlerCongCtrl(p_conn, p_buf_hdr, ack_code, 0u, NET_TCP_CONN_TX_WIN_SEG_RXD, p_err);
+             switch (*p_err) {
+                 case NET_TCP_ERR_NONE:
+                 case NET_ERR_TX:                               /* Ignore transitory tx err(s) [see Note #8].           */
+                 case NET_ERR_IF_LINK_DOWN:
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_FAIL:
+                 case NET_TCP_ERR_CONN_FAULT:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_CONN_OP:
+                 case NET_TCP_ERR_TX_PKT:
+                 case NET_TCP_ERR_RE_TX_SEG_TH:
+                 default:
+                      return;
+             }
+
+             NetTCP_RxPktConnHandlerRxQ_Conn(p_conn, p_buf, p_buf_hdr, &err_rtn);
+             switch (err_rtn) {
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                     *p_err = err_rtn;
+                      return;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 default:
+                     *p_err = err_rtn;
+                      return;
+             }
+
+             NetTCP_RxPktConnHandlerRxQ_AppData(p_conn, p_err);
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+             switch (ack_code) {
+                 case NET_TCP_CONN_RX_ACK_VALID:
+                 case NET_TCP_CONN_RX_ACK_DUP:
+                      break;
+
+
+                 case NET_TCP_CONN_RX_ACK_NONE:
+                 case NET_TCP_CONN_RX_ACK_INVALID:
+                 default:
+                     *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+                      return;
+             }
+#endif
+
+             NetTCP_RxPktConnHandlerRxQ_Conn(p_conn, p_buf, p_buf_hdr, &err_rtn);
+             switch (err_rtn) {
+                 case NET_TCP_ERR_CONN_DATA_NONE:
+                 case NET_TCP_ERR_CONN_DATA_VALID:
+                      break;
+
+
+                 case NET_TCP_ERR_CONN_DATA_DUP:
+                     *p_err = err_rtn;
+                      return;
+
+
+                 case NET_TCP_ERR_CONN_NOT_USED:
+                 case NET_TCP_ERR_CONN_DATA_INVALID:
+                 case NET_TCP_ERR_INVALID_CONN_STATE:
+                 case NET_TCP_ERR_INVALID_LEN_SEG:
+                 default:
+                     *p_err = err_rtn;
+                      return;
+             }
+
+             NetTCP_RxPktConnHandlerRxQ_AppData(p_conn, p_err);
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+             break;
+
+
+
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        case NET_TCP_CONN_STATE_CLOSED:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_RxPktConnHandlerCfgConn()
+*
+* Description : (1) Configure TCP connection's controls on transition to connected state(s) :
+*
+*                   (a) Configure TCP connection maximum segment size control(s)
+*                   (b) Configure TCP connection window size controls
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSeg().
+*
+* Note(s)     : (2) During TCP connection initialization, some TCP connection controls were previously
+*                   configured in NetTCP_ConnGet() when the TCP connection was allocated from the TCP
+*                   connection pool.  These TCP connection controls do NOT need to be reconfigured
+*                   but are shown for completeness.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerCfgConn (NET_TCP_CONN  *p_conn)
+{
+    NET_TCP_CFG_CODE  cfg_code;
+
+                                                                /* Cfg conn (see Note #1).                              */
+    cfg_code = NET_TCP_CONN_CFG_NONE              |
+               NET_TCP_CONN_CFG_MAX_SEG_SIZE_CONN |
+               NET_TCP_CONN_CFG_WIN_SIZE_ALL;
+    NetTCP_ConnCfg(p_conn, cfg_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_RxPktConnHandlerRxQ_Sync()
+*
+* Description : (1) (a) Handle TCP connection's transport receive queue ... :
+*
+*                       (1) Update TCP connection initial receive sequence numbers          See Note #2b
+*                       (2) Queue  received TCP segments into transport receive queue       See Note #3
+*                       (3) Update TCP connection receive window
+*
+*                   (b) ... for the following connection-request/synchronization states :
+*
+*                       (1) LISTEN
+*                       (2) SYN-SENT
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but
+*                                                                       NO data to queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled &
+*                                                                          data    queued to receive queue(s)
+*                                                                       for later processing (see Note #2c).
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection receive queue
+*                                                                       state.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSeg().
+*
+* Note(s)     : (2) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that "segments are processed in sequence ... processing is done in SEG.SEQ
+*                       order."
+*
+*                   (b) The following sections generalize that for the LISTEN & SYN-SENT states that "if the
+*                       SYN bit is on and ... acceptable then ... RCV.NXT is set to SEG.SEQ+1, IRS is set to
+*                       SEG.SEQ" :
+*
+*                       (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN   [State] :
+*                               Check for SYN'
+*                       (2) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                               Check SYN Bit'
+*
+*                   (c) (1) The following sections generalize that for the LISTEN & SYN-SENT states that "if
+*                           there are other controls or text in the segment, queue them for later processing
+*                           after the ESTABLISHED state has been reached" :
+*
+*                           (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN   [State] :
+*                                   Check for SYN'
+*                           (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                                   Check SYN Bit'
+*
+*                       (2) If any control or text is queued for later processing, the next sequence octet to
+*                           receive (RCV.NXT) MUST include the length of this received segment (SEG.LEN) :
+*
+*                           (A) RCV.NXT = SEG.SEQ + SEG.LEN + 1
+*               (3) TCP segments with receive data are sequenced into the appropriate TCP connection
+*                   receive queue(s) to be made available & ready to be read by the application layer.
+*
+*                   See also 'NetTCP_RxPktConnHandlerRxQ_Conn()     Note #3'
+*                          & 'NetTCP_RxPktConnHandlerRxQ_AppData()  Note #2'.
+*
+*               (4) Some buffer controls were previously initialized in NetBuf_Get() when the buffer was
+*                   allocated.  These buffer controls do NOT need to be re-initialized but are shown for
+*                   completeness.
+*
+*               (5) RFC #793, Section 3.7 'Data Communication : Managing the Window' states that "the window
+*                   sent in each segment indicates the range of sequence numbers the sender of the window
+*                   (the data receiver) is currently prepared to accept.  There is an assumption that this
+*                   is related to the currently available data buffer space available for this connection
+*                   ... One strategy would be to ... [update the] information when the window" changes.
+*
+*                   See also 'NetTCP_RxAppData()                 Note #6',
+*                            'NetTCP_RxPktConnHandlerRxQ_Conn()  Note #6',
+*                          & 'NetTCP_RxConnWinSizeHandler()      Note #2a'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerRxQ_Sync (NET_TCP_CONN  *p_conn,
+                                               NET_BUF       *p_buf,
+                                               NET_BUF_HDR   *p_buf_hdr,
+                                               NET_ERR       *p_err)
+{
+    NET_TCP_SEG_SIZE  seg_len_data;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------- VALIDATE RX Q CONN STATE ------------- */
+    switch (p_conn->RxQ_State) {
+        case NET_TCP_RX_Q_STATE_CLOSED:
+             break;
+
+
+        case NET_TCP_RX_Q_STATE_NONE:
+        case NET_TCP_RX_Q_STATE_SYNC:
+        case NET_TCP_RX_Q_STATE_CONN:
+        case NET_TCP_RX_Q_STATE_CLOSING:
+        default:
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+#endif
+
+                                                                /* Update TCP conn rx seq nbrs (see Notes #2b & #2c2).  */
+    p_conn->RxSeqNbrSync =  p_buf_hdr->TCP_SeqNbr;
+    p_conn->RxSeqNbrNext = (p_buf_hdr->TCP_SeqNbr + p_buf_hdr->TCP_SegLen);
+    p_conn->RxQ_State    =  NET_TCP_RX_Q_STATE_SYNC;
+
+
+    seg_len_data = p_buf_hdr->TCP_SegLenData;
+    if (seg_len_data > 0) {                                     /* If rx'd seg len data > 0, ...                        */
+                                                                /* ... Q seg to TCP conn rx Q  (see Notes #3 & #2c1).   */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NetTCP_ConnFreeBufQ(&p_conn->RxQ_Transport_Head, &p_conn->RxQ_Transport_Tail);
+#endif
+        p_conn->RxQ_Transport_Head = p_buf;
+        p_conn->RxQ_Transport_Tail = p_buf;
+#if 0                                                           /* Init'd in NetBuf_Get() [see Note #4].                */
+        p_buf_hdr->PrevPrimListPtr = DEF_NULL;
+        p_buf_hdr->NextPrimListPtr = DEF_NULL;
+#endif
+                                                                /* Dec TCP conn's rx win size (see Note #5).            */
+#ifdef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+        NetTCP_RxConnWinSizeHandler(p_conn, p_buf_hdr, seg_len_data, NET_TCP_CONN_RX_WIN_DEC);
+#else
+        NetTCP_RxConnWinSizeHandler(p_conn, p_buf_hdr, 1, NET_TCP_CONN_RX_WIN_DEC);
+#endif
+       *p_err = NET_TCP_ERR_CONN_DATA_VALID;
+
+    } else {
+       *p_err = NET_TCP_ERR_CONN_DATA_NONE;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_RxPktConnHandlerRxQ_Conn()
+*
+* Description : (1) (a) Handle TCP connection's transport receive queue ... :
+*
+*                       (1) Update TCP connection receive sequence numbers          See Notes #2c  & #2e
+*                       (2) Insert received TCP segments in sequence order          See Notes #3   & #4
+*                       (3) Update TCP connection receive window
+*
+*                   (b) ... for the following connected states :
+*
+*                       (1) SYN-RECEIVED                                            See Notes #1bA & #2b2
+*                       (2) SYN-SENT                                                See Notes #1bA & #2b1
+*                       (3) ESTABLISHED                                             See Note  #1bB
+*                       (4) FIN-WAIT-1                                              See Note  #1bB
+*                       (5) FIN-WAIT-2                                              See Note  #1bB
+*                       (6) CLOSING                                                 See Note  #1bC
+*                       (7) TIME-WAIT                                               See Note  #1bC
+*                       (8) CLOSE-WAIT                                              See Note  #1bC
+*                       (9) LAST-ACK                                                See Note  #1bC
+*
+*
+*                           (A) For synchronization-to-connected state transitions, segments are queued to
+*                               the TCP connection's transport receive queue, but NOT to the TCP connection's
+*                               application receive queue, until the application layer is signaled that the
+*                               transport layer connection is complete.
+*
+*                               See also 'NetTCP_RxPktConnHandlerSyncRxd()  Note #1c1'
+*                                      & 'NetTCP_RxPktConnHandlerSyncTxd()  Note #1c1'.
+*
+*                           (B) For connected states,       segments are queued to the TCP connection's
+*                               transport &/or application receive queue(s) as appropriate (see Note #3).
+*
+*                           (C) For closing states; closing segments are queued to the TCP connection's
+*                               transport &/or application receive queue(s) as for connected states.
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_buf        Pointer to network buffer that received TCP packet.
+*               ----        Argument checked   in NetTCP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_CONN_DATA_NONE          Received packet successfully handled; but
+*                                                                       NO data to queue  to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_VALID         Received packet successfully handled &
+*                                                                          data    queued to receive queue(s)
+*                                                                       for later processing (see Note #3).
+*                               NET_TCP_ERR_CONN_DATA_INVALID       Received packet contains invalid   segment
+*                                                                       data; NOT queued to receive queue(s).
+*                               NET_TCP_ERR_CONN_DATA_DUP           Received packet contains duplicate segment
+*                                                                       data; NOT queued to receive queue(s)
+*                                                                       (see Note #2a2).
+*
+*                               NET_TCP_ERR_CONN_SEQ_INVALID        Received segment's sequence number is NOT
+*                                                                       valid for current TCP connection.
+*
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection receive queue state.
+*
+*                                                                   - RETURNED BY NetTCP_RxPktConnIsValidSeq() : -
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSeg().
+*
+* Note(s)     : (2) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence Number'
+*                       states that :
+*
+*                       (1) "Segments are processed in sequence ... processing is done in SEG.SEQ order."
+*
+*                           (A) Assumes received segment's sequences previously validated.
+*
+*                       (2) "Initial tests on arrival are used to discard old duplicates."
+*
+*                       (3) (A) (1) "If a segment's contents straddle the boundary between old and new,
+*                                    only the new parts should be processed."
+*
+*                               (2) "One could tailor actual segments to ... the idealized segment that
+*                                    begins at RCV.NXT and does not exceed the window ... by trimming off
+*                                    any portions that lie outside the window (including SYN and FIN),
+*                                    and only processing further if the segment then begins at RCV.NXT.
+*                                    Segments with higher beginning sequence numbers may be held for later
+*                                    processing."
+*
+*                           (B) (1) Sequencing     received segments with duplicate data that overlaps
+*                                   multiple previously-received segments' non-contiguous sequence numbers
+*                                   is data intensive/expensive.
+*
+*                               (2) Therefore, any received segment  with duplicate data that overlaps
+*                                   multiple previously-received segments' non-contiguous sequence numbers
+*                                   is trimmed of duplicate data starting from the end of the received
+*                                   segment's data.
+*
+*                                   In other words, only the first contiguous, non-duplicate data sequence
+*                                   starting from the start of the received segment's data is sequenced
+*                                   into the TCP connection's receive queue(s).
+*
+*                           (C) RFC #1122, Section 4.2.2.20 states that "a TCP SHOULD be capable of queueing
+*                               out-of-order TCP segments".
+*
+*                   (b) The following sections generalize that in the "SYN-SENT [or] ... SYN-RECEIVED
+*                       STATE[s], ... [that] if the ACK bit is on [and] our SYN has been ACKed ...
+*                       then enter the ESTABLISHED state and continue processing" :
+*
+*                       (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                               Check SYN Bit'
+*                       (2) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                               SYN-RECEIVED STATE'
+*
+*                   (c) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                       Check SYN Bit' states that "if the SYN bit is on and ... acceptable then ...
+*                       RCV.NXT is set to SEG.SEQ+1, IRS is set to SEG.SEQ".
+*
+*                   (d) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                           Check SYN Bit' states that "if there are other controls or text in the segment,
+*                           queue them for later processing after the ESTABLISHED state has been reached"
+*                           (see also Note #2b).
+*
+*                       (2) If any control or text is queued for later processing, the next sequence octet to
+*                           receive (RCV.NXT) MUST include the length of this received segment (SEG.LEN) :
+*
+*                           (A) RCV.NXT = SEG.SEQ + SEG.LEN + 1
+*
+*                   (e) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                           that "if the FIN bit is set ... advance RCV.NXT over the FIN".
+*
+*                       (2) However, the next octet to receive is NOT updated with the sequence number of the
+*                           last octet to receive.  Instead, the generic sequence algorithm maintains & updates
+*                           BOTH the next & last octets to receive for the closing TCP connection.
+*
+*               (3) TCP segments with receive data are sequenced first into the TCP connection's transport
+*                   receive queue to be made available & ready to be read by the application layer from the
+*                   TCP connection's application receive queue (see 'NetTCP_RxPktConnHandlerRxQ_AppData()
+*                   Note #2').
+*
+*                   (a) Received TCP segments are inserted into a doubly-linked Transport Receive Queue,
+*                       sorted by their sequence number(s).
+*
+*                       In the diagram below, ... :
+*
+*                       (1) (A) TCP connections' 'RxQ_Transport_Head' points to the head of a TCP connections'
+*                                   Transport Receive Queue;
+*                           (B) TCP connections' 'RxQ_Transport_Tail' points to the tail of a TCP connections'
+*                                   Transport Receive Queue.
+*
+*                       (2) Segment buffers' 'PrevPrimListPtr' & 'NextPrimListPtr'  doubly-link each
+*                           segment to form the Transport Receive Queue.
+*
+*                       (3) Fragmented segment buffer's 'PrevBufPtr' & 'NextBufPtr' doubly-link each
+*                           fragmented segment (see also 'net_ip.c  NetIP_RxPktFragReasm()  Note #2b1E').
+*
+*                   (b) (1) Typically & most-frequently, TCP segments will be received in sequence-order.
+*                           Therefore, the sequence sort algorithm starts at the tail of the Transport
+*                           Receive Queue.
+*
+*                       (2) As segments are inserted into the Transport Receive Queue, segments migrate to
+*                           the head of the Transport Receive Queue.  Queued segments with sequence numbers
+*                           that are contiguous from the next expected receive sequence number are ready to
+*                           be read by the application layer, so are immediately moved from the Transport
+*                           Receive Queue to the Application Receive Queue.
+*
+*                           See also 'NetTCP_RxPktConnHandlerRxQ_AppData()  Note #2'.
+*
+*
+*                                      |                                               |
+*                                      |<-- TCP Connection Transport Receive Queue --->|
+*                                      |                (see Note #3)                  |
+*
+*                                  Segments Moved                           Segments Sequenced
+*                                  to Application                             into Transport
+*                                  Receive Queue                              Receive Queue
+*                                 starting at head                           starting at tail
+*                                 (see Note #3b2)                            (see Note #3b1)
+*
+*                                         |        NextPrimListPtr                  |
+*                                         |        (see Note #3a2)                  |
+*                                         v                   |                     v
+*                                                             |
+*                        Head of       -------       -------  v    -------       -------   see Note #3a1B)
+*                        Receive  ---->|     |------>|     |------>|     |------>|     |
+*                         Queue        |     |       |     |       |     |       |     |       Tail of
+*                                      |     |<------|     |<------|     |<------|     |<----  Receive
+*                   (see Note #3a1A)   |     |       |     |  ^    |     |       |     |        Queue
+*                                      |     |       |     |  |    |     |       |     |
+*                                      -------       -------  |    -------       -------
+*                                        | ^                  |      | ^
+*                                        | |       PrevPrimListPtr   | |
+*                                        v |       (see Note #3a2)   v |
+*                                      -------                     -------
+*                                      |     |                     |     |
+*                                      |     |                     |     |
+*                                      |     |                     |     |
+*                                      |     |                     |     |
+*                                      |     |                     |     |
+*                                      -------                     -------
+*                                        | ^                         | ^
+*                        NextBufPtr ---> | | <--- PrevBufPtr         | |
+*                     (see Note #3a3)    v |   (see Note #3a3)       v |
+*                                      -------                     -------
+*                                      |     |                     |     |
+*                                      |     |                     |     |
+*                                      |     |                     -------
+*                                      |     |
+*                                      |     |
+*                                      -------
+*
+*
+*               (4) RFC #793 does NOT provide nor suggest any logic to determine/handle sequence number
+*                   comparisons for sequence number windows that overflow the sequence number space.
+*
+*                   (a) For example, the next sequence octet to receive (RCV.NXT) is typically less than
+*                       or equal to  the next received sequence octet (SEG.SEQ) :
+*
+*                           (1) RCV.NXT <= SEG.SEQ
+*
+*                       SEG.SEQ itself is also typically less than RCV.NXT plus the current receive window
+*                       size (RCV.WND) :
+*
+*                           (2) SEG.SEQ <  RCV.NXT + RCV.WND
+*
+*                       However, if (RCV.NXT + RCV.WND) or SEG.SEQ overflows the sequence number space,
+*                       these values will be MUCH less than SEG.SEQ or RCV.NXT, respectively, until
+*                       SEG.SEQ & RCV.NXT also overflow :
+*
+*                           (3) RCV.NXT + RCV.WND << RCV.NXT
+*                                                 << SEG.SEQ
+*
+*                           (4) SEG.SEQ           << RCV.NXT
+*
+*                   (b) Therefore, in order to determine if a received segment's sequence value precedes any
+*                       previously received segment(s) in the TCP connection's receive queue(s), the following
+*                       unsigned arithmetic comparisons MUST be checked :
+*
+*                           (1) RxQCur.SeqNbr - (SEG.SEQ + 1)  <   RX.WIN
+*
+*                           (2)     RX.NXT    - (SEG.SEQ + 1)  <  SEG.LEN
+*
+*                       Note that these comparisons bound any received segment's sequence within limits set
+*                       by the TCP connection's receive window size & next expected receive octet.
+*
+*                   (c) In order to determine if a received segment's sequence value overlaps any previously
+*                       received segment(s) in the TCP connection's receive queue, the following unsigned
+*                       arithmetic comparisons MUST be checked :
+*
+*                           (1) (   SEG.SEQ    +    SEG.LEN   )  -  (RxQNext.SeqNbr + 1)  <     SEG.LEN
+*
+*                           (2) (RxQCur.SeqNbr + RxQCur.SegLen)  -  (SEG.SEQ        + 1)  <  RxQCur.SegLen
+*
+*                   See also 'NetTCP_RxPktConnIsValidSeq()  Note #2'.
+*
+*               (5) (a) RFC #2581, Section 3.2 states that "a TCP receiver SHOULD send an immediate ACK" :
+*
+*                       (1) "When an out-of-order segment arrives.  The purpose of this ACK is to inform
+*                            the sender that a segment was received out-of-order and which sequence number
+*                            is expected."
+*
+*                       (2) "In addition, ... when the incoming segment fills in all or part of a gap in
+*                            the sequence space."
+*
+*                       See also 'NetTCP_TxConnAck()  Note #4a5'.
+*
+*                   (b) Since segments are typically received in sequence order (see Notes #5a1 & #3b1) &
+*                       since segments received in sequential order are immediately made available & ready
+*                       to be read by the application layer (see Note #3b2), received segments are out-of-
+*                       order AND/OR fill in sequence number gaps whenever :
+*
+*                       (1) A TCP connection's Transport Receive Queue is initially non-empty;
+*                              OR
+*                       (2) A TCP connection's Transport Receive Queue's head segment's sequence number
+*                           does NOT equal the TCP connection's next expected receive   sequence number.
+*
+*                   (c) However, since a TCP connection's next expected receive sequence numbers are NOT
+*                       updated until both of the TCP connection's transport & application receive queues
+*                       have been handled (see 'NetTCP_RxPktConnHandlerRxQ_AppData()  Note #1a3'), the
+*                       transmission of any immediate acknowledgement MUST follow the handling of BOTH
+*                       of the TCP connection's receive queues.
+*
+*                       See also 'NetTCP_RxPktConnHandlerRxQ_AppData()  Notes #1a3 & #4'.
+*
+*               (6) RFC #793, Section 3.7 'Data Communication : Managing the Window' states that "the window
+*                   sent in each segment indicates the range of sequence numbers the sender of the window
+*                   (the data receiver) is currently prepared to accept.  There is an assumption that this
+*                   is related to the currently available data buffer space available for this connection
+*                   ... One strategy would be to ... [update the] information when the window" changes.
+*
+*                   See also 'NetTCP_RxAppData()                 Note #6',
+*                            'NetTCP_RxPktConnHandlerRxQ_Sync()  Note #5',
+*                          & 'NetTCP_RxConnWinSizeHandler()      Note #2a'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerRxQ_Conn (NET_TCP_CONN  *p_conn,
+                                               NET_BUF       *p_buf,
+                                               NET_BUF_HDR   *p_buf_hdr,
+                                               NET_ERR       *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_TCP_SEQ_CODE   seq_code;
+#endif
+    NET_BUF           *p_buf_q;
+    NET_BUF           *p_buf_q_head;
+    NET_BUF           *p_buf_q_prev;
+    NET_BUF           *p_buf_q_next;
+    NET_BUF_HDR       *p_buf_q_hdr;
+    NET_BUF_HDR       *p_buf_q_hdr_head;
+    NET_BUF_HDR       *p_buf_q_hdr_next;
+    NET_TCP_SEQ_NBR    seq_nbr;
+    NET_TCP_SEQ_NBR    seq_nbr_next;
+    NET_TCP_SEQ_NBR    seq_nbr_dup;
+    NET_TCP_SEQ_NBR    seq_nbr_delta;
+    NET_TCP_SEQ_NBR    seq_nbr_win;
+    CPU_BOOLEAN        seq_srch_done;
+    CPU_BOOLEAN        seq_unordered_prev;
+    CPU_BOOLEAN        seq_unordered_cur;
+    CPU_BOOLEAN        seq_unordered;
+
+
+                                                                /* ----------- UPDATE TCP CONN RX SEQ NBRS ------------ */
+    if (p_conn->ConnState == NET_TCP_CONN_STATE_SYNC_TXD) {
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        switch (p_conn->RxQ_State) {
+            case NET_TCP_RX_Q_STATE_CLOSED:
+                 break;
+
+
+            case NET_TCP_RX_Q_STATE_NONE:
+            case NET_TCP_RX_Q_STATE_SYNC:
+            case NET_TCP_RX_Q_STATE_CONN:
+            case NET_TCP_RX_Q_STATE_CLOSING:
+            default:
+                *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+                 return;
+        }
+#endif
+                                                                /* Init SYN-SENT state (see Notes #2c & #2d2).          */
+        p_conn->RxSeqNbrSync = (NET_TCP_SEQ_NBR) p_buf_hdr->TCP_SeqNbr;
+        p_conn->RxSeqNbrNext = (NET_TCP_SEQ_NBR)(p_buf_hdr->TCP_SeqNbr + p_buf_hdr->TCP_SegLen);
+        p_conn->RxQ_State    =  NET_TCP_RX_Q_STATE_SYNC;
+
+
+    } else {
+        switch (p_conn->RxQ_State) {
+            case NET_TCP_RX_Q_STATE_SYNC:
+                 break;
+
+
+            case NET_TCP_RX_Q_STATE_CONN:
+                                                                /* Chk TCP conn closing (see Note #2e).                 */
+                 if (p_buf_hdr->TCP_SegClose == DEF_YES) {
+                     p_conn->RxSeqNbrLast  = (NET_TCP_SEQ_NBR)(p_buf_hdr->TCP_SeqNbr + p_buf_hdr->TCP_SegLen);
+                     p_conn->RxSeqNbrClose = (NET_TCP_SEQ_NBR)(p_conn->RxSeqNbrLast  - NET_TCP_SEG_LEN_CLOSE);
+                     p_conn->RxQ_State     =  NET_TCP_RX_Q_STATE_CLOSING;
+                 }
+                                                                /* 'break' intentionally omitted; MUST execute the ..   */
+                                                                /* .. following case : 'NET_TCP_RX_Q_STATE_CLOSED'.     */
+
+            case NET_TCP_RX_Q_STATE_CLOSED:
+            case NET_TCP_RX_Q_STATE_CLOSING:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* Chk valid rx'd seq nbr.                              */
+                 seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+                 if (*p_err != NET_TCP_ERR_NONE) {
+                      return;
+                 }
+                 if (seq_code != NET_TCP_CONN_RX_SEQ_VALID) {
+                    *p_err = NET_TCP_ERR_CONN_SEQ_INVALID;
+                     return;
+                 }
+#endif
+                 break;
+
+
+            case NET_TCP_RX_Q_STATE_NONE:
+            default:
+                *p_err = NET_TCP_ERR_CONN_DATA_INVALID;
+                 return;
+        }
+    }
+
+
+    if (p_buf_hdr->TCP_SegLenData < 1) {                        /* If seg data len < 1,             AND ...             */
+                                                                /* ... NOT in rx conn closing state OR  ...             */
+        if ((p_conn->RxQ_State       != NET_TCP_RX_Q_STATE_CLOSING) ||
+            (p_buf_hdr->TCP_SegClose != DEF_YES)) {             /* ... fin/close NOT rx'd;              ...             */
+            *p_err = NET_TCP_ERR_CONN_DATA_NONE;                /* ... rtn data  NOT avail.                             */
+             return;
+        }                                                       /* Else seq & handle closing-ctrl seg.                  */
+    }
+
+
+                                                                /* ------- INSERT SEG INTO SEQ'D TRANSPORT RX Q ------- */
+    p_buf_q             = (NET_BUF *)p_conn->RxQ_Transport_Tail;/* Start seq insert alg from rx Q tail (see Note #3b1). */
+    p_buf_q_next        = DEF_NULL;
+    seq_srch_done      =  DEF_NO;
+                                                                /* Chk init'l rx Q seq order (see Note #5b1).           */
+    seq_unordered_prev = (p_conn->RxQ_Transport_Head != DEF_NULL)
+                       ?  DEF_YES : DEF_NO;
+
+    while (seq_srch_done == DEF_NO) {                           /* Srch rx Q to insert rx'd seg into seq nbr position.  */
+        if (p_buf_q != DEF_NULL) {                              /* While NOT @ rx Q head, chk if seg ...                */
+
+            p_buf_q_hdr    = (NET_BUF_HDR   *)&p_buf_q->Hdr;
+            p_buf_q_prev   = (NET_BUF       *) p_buf_q_hdr->PrevPrimListPtr;
+                                                                /* ... before or after cur  rx Q seg (see Note #2a1).   */
+            seq_nbr_next  = (NET_TCP_SEQ_NBR) p_buf_q_hdr->TCP_SeqNbr;
+            seq_nbr       = (NET_TCP_SEQ_NBR)(p_buf_hdr->TCP_SeqNbr   + 1u);
+            seq_nbr_delta = (NET_TCP_SEQ_NBR)(seq_nbr_next           - seq_nbr);
+            seq_nbr_win   = (NET_TCP_SEQ_NBR) p_conn->RxWinSizeCfgd;
+
+            if (seq_nbr_delta < seq_nbr_win) {                  /* If seg's seq nbr < cur rx Q's seq nbr (see Note #4b1)*/
+                                                                /* ... adv to prev rx Q seg; but chk ...                */
+                                                                /* ... for dup seqs in next rx Q seg.                   */
+                seq_nbr_next  = (NET_TCP_SEQ_NBR)(p_buf_hdr->TCP_SeqNbr   + p_buf_hdr->TCP_SegLen);
+                seq_nbr       = (NET_TCP_SEQ_NBR)(p_buf_q_hdr->TCP_SeqNbr + 1u);
+                seq_nbr_delta = (NET_TCP_SEQ_NBR)(seq_nbr_next           - seq_nbr);
+                seq_nbr_win   = (NET_TCP_SEQ_NBR) p_buf_hdr->TCP_SegLen;
+
+                if (seq_nbr_delta < seq_nbr_win) {              /* If seg overlaps next rx Q seqs (see Note #4c1), ...  */
+
+                    seq_nbr_dup   = seq_nbr_delta + 1u;         /* ... trim dup seqs from seg     (see Note #2a3); ...  */
+                    if (p_buf_hdr->TCP_SegLenData  > (NET_TCP_SEG_SIZE)seq_nbr_dup) {
+                        p_buf_hdr->TCP_SegLenData -= (NET_TCP_SEG_SIZE)seq_nbr_dup;
+                        p_buf_hdr->TCP_SegLen     -= (NET_TCP_SEG_SIZE)seq_nbr_dup;
+
+                    } else {                                    /* ... else discard ALL dup seqs  (see Note #2a2).      */
+                       *p_err = NET_TCP_ERR_CONN_DATA_DUP;
+                        return;
+                    }
+                }
+                                                                /* Adv to prev rx Q seg.                                */
+                p_buf_q_next = p_buf_q;
+                p_buf_q      = p_buf_q_prev;
+
+
+            } else {                                            /* Else insert seg between cur/next rx Q segs.          */
+                                                                /* Chk for dup seqs in cur rx Q seg.                    */
+                seq_nbr_next  = (NET_TCP_SEQ_NBR)(p_buf_q_hdr->TCP_SeqNbr + p_buf_q_hdr->TCP_SegLen);
+                seq_nbr       = (NET_TCP_SEQ_NBR)(p_buf_hdr->TCP_SeqNbr   + 1u);
+                seq_nbr_delta = (NET_TCP_SEQ_NBR)(seq_nbr_next           - seq_nbr);
+                seq_nbr_win   = (NET_TCP_SEQ_NBR) p_buf_q_hdr->TCP_SegLen;
+
+                if (seq_nbr_delta < seq_nbr_win) {              /* If seg overlaps prev'ly rx'd seqs (see Note #4c2),   */
+                    seq_nbr_dup   = seq_nbr_delta + 1u;         /* ... trim dup seqs from seg    (see Note #2a3); ...   */
+                    if (p_buf_hdr->TCP_SegLenData  > (NET_TCP_SEG_SIZE)seq_nbr_dup) {
+                        p_buf_hdr->TCP_SegLenData -= (NET_TCP_SEG_SIZE)seq_nbr_dup;
+                        p_buf_hdr->TCP_SegLen     -= (NET_TCP_SEG_SIZE)seq_nbr_dup;
+                        p_buf_hdr->TCP_SeqNbr      = (NET_TCP_SEQ_NBR )seq_nbr_next;
+
+                    } else {                                    /* ... else discard ALL dup seqs (see Note #2a2).       */
+                       *p_err = NET_TCP_ERR_CONN_DATA_DUP;
+                        return;
+                    }
+                }
+
+                seq_srch_done = DEF_YES;
+            }
+
+        } else {                                                /* Else if @ head of rx Q, entire rx Q srch'd; ...      */
+                                                                /* ... chk for dup seqs prior to TCP conn's    ...      */
+                                                                /* ... next expected rx octet.                          */
+            seq_nbr_next  = (NET_TCP_SEQ_NBR) p_conn->RxSeqNbrNext;
+            seq_nbr       = (NET_TCP_SEQ_NBR)(p_buf_hdr->TCP_SeqNbr + 1u);
+            seq_nbr_delta = (NET_TCP_SEQ_NBR)(seq_nbr_next         - seq_nbr);
+            seq_nbr_win   = (NET_TCP_SEQ_NBR) p_buf_hdr->TCP_SegLen;
+
+            if (seq_nbr_delta < seq_nbr_win) {                  /* If seg overlaps prev'ly rx'd seqs (see Note #4b2),   */
+                seq_nbr_dup   = seq_nbr_delta + 1u;             /* ... trim dup seqs from seg    (see Note #2a3),       */
+                if (p_buf_hdr->TCP_SegLenData  > (NET_TCP_SEG_SIZE)seq_nbr_dup) {
+                    p_buf_hdr->TCP_SegLenData -= (NET_TCP_SEG_SIZE)seq_nbr_dup;
+                    p_buf_hdr->TCP_SegLen     -= (NET_TCP_SEG_SIZE)seq_nbr_dup;
+                    p_buf_hdr->TCP_SeqNbr      = (NET_TCP_SEQ_NBR )seq_nbr_next;
+
+                } else {                                        /* ... else discard ALL dup seqs (see Note #2a2).       */
+                   *p_err = NET_TCP_ERR_CONN_DATA_DUP;
+                    return;
+                }
+            }
+
+            seq_srch_done = DEF_YES;
+        }
+    }
+
+                                                                /* Insert rx'd seg between cur/next rx Q segs.          */
+    p_buf_hdr->PrevPrimListPtr = p_buf_q;
+    if (p_buf_q != DEF_NULL) {                                  /* If avail, insert rx'd seg after  cur  rx Q seg.      */
+        p_buf_q_hdr->NextPrimListPtr = p_buf;
+    } else {                                                    /* Else      insert rx'd seg @ rx Q head.               */
+        p_conn->RxQ_Transport_Head   = p_buf;
+    }
+
+    p_buf_hdr->NextPrimListPtr = p_buf_q_next;
+    if (p_buf_q_next != DEF_NULL) {                             /* If avail, insert rx'd seg before next rx Q seg.      */
+        p_buf_q_hdr_next                  = &p_buf_q_next->Hdr;
+        p_buf_q_hdr_next->PrevPrimListPtr =  p_buf;
+    } else {                                                    /* Else      insert rx'd seg @ rx Q tail.               */
+        p_conn->RxQ_Transport_Tail        =  p_buf;
+    }
+
+
+                                                                /* Chk rx'd out-of-order seg(s) [see Note #5a].         */
+    if (p_conn->RxQ_Transport_Head != DEF_NULL) {
+        p_buf_q_head        =  p_conn->RxQ_Transport_Head;
+        p_buf_q_hdr_head    = &p_buf_q_head->Hdr;
+                                                                /* Chk cur rx Q seq order       (see Note #5b2).        */
+        seq_unordered_cur  = (p_buf_q_hdr_head->TCP_SeqNbr
+                          !=  p_conn->RxSeqNbrNext)    ? DEF_YES : DEF_NO;
+    } else {
+        seq_unordered_cur  =  DEF_NO;
+    }
+
+    seq_unordered = ((seq_unordered_prev == DEF_YES) ||
+                     (seq_unordered_cur  == DEF_YES)) ? DEF_YES : DEF_NO;
+
+    if (seq_unordered != DEF_NO) {                              /* If out-of-order seg(s) rx'd   (see Note #5a) ...     */
+        if (p_conn->RxQ_State != NET_TCP_RX_Q_STATE_SYNC) {     /* ... in non-sync state,                       ...     */
+                                                                /* ... req immed TCP conn ack tx (see Note #5c).        */
+            p_buf_hdr->TCP_SegAckTxReqCode = NET_TCP_CONN_TX_ACK_IMMED;
+        }
+    }
+
+
+                                                                /* ----------- UPDATE TCP CONN RX WIN SIZE ------------ */
+                                                                /* Dec TCP conn's rx win size (see Note #6).            */
+#ifdef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+    NetTCP_RxConnWinSizeHandler(p_conn, p_buf_hdr, p_buf_hdr->TCP_SegLenData, NET_TCP_CONN_RX_WIN_DEC);
+#else
+    NetTCP_RxConnWinSizeHandler(p_conn, p_buf_hdr, 1, NET_TCP_CONN_RX_WIN_DEC);
+#endif
+
+   *p_err = NET_TCP_ERR_CONN_DATA_VALID;
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetTCP_RxPktConnHandlerRxQ_AppData()
+*
+* Description : (1) (a) Handle TCP connection's application receive queue ... :
+*
+*                       (1) Remove segments from  TCP connection's transport   receive queue    See Note #3b1B
+*                       (2) Update TCP connection transport receive queue
+*                       (3) Update TCP connection receive sequence numbers
+*                       (4) Move   segments into  TCP connection's application receive queue    See Note #2
+*                       (5) Update TCP connection receive window                                See Note #6
+*
+*                   (b) ... for the following connected states :
+*
+*                       (1) SYN-RECEIVED                                                        See Note #1bA
+*                       (2) SYN-SENT                                                            See Note #1bA
+*                       (3) ESTABLISHED                                                         See Note #1bB
+*                       (4) FIN-WAIT-1                                                          See Note #1bB
+*                       (5) FIN-WAIT-2                                                          See Note #1bB
+*                       (6) CLOSING                                                             See Note #1bC
+*                       (7) TIME-WAIT                                                           See Note #1bC
+*                       (8) CLOSE-WAIT                                                          See Note #1bC
+*                       (9) LAST-ACK                                                            See Note #1bC
+*
+*
+*                           (A) For synchronization-to-connected state transitions, segments are queued to
+*                               the TCP connection's transport receive queue, but NOT to the TCP connection's
+*                               application receive queue, until the application layer is signaled that the
+*                               transport layer connection is complete.
+*
+*                               See also 'NetTCP_RxPktConnHandlerSyncRxd()  Note #1c1'
+*                                      & 'NetTCP_RxPktConnHandlerSyncTxd()  Note #1c1'.
+*
+*                           (B) For connected states, segments are queued to the TCP connection's application
+*                               receive queue as appropriate (see Notes #2 & #3b).
+*
+*                           (C) For closing states; closing segments are queued to the TCP connection's
+*                               transport &/or application receive queue(s) as for connected states.
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection's application receive queue
+*                                                                       successfully handled.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection receive queue state.
+*
+*                                                                   ---- RETURNED BY NetTCP_RxQ_Signal() : ----
+*                               NET_TCP_ERR_RX_Q_FULL               TCP connection receive queue full.
+*                               NET_TCP_ERR_RX_Q_SIGNAL_FAULT       TCP connection receive queue signal fault.
+*
+*                                                                   ----- RETURNED BY NetTCP_RxQ_Clr() : ------
+*                               NET_TCP_ERR_RX_Q_SIGNAL_CLR         TCP connection receive queue clear failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSeg(),
+*               NetTCP_RxPktConnHandlerSyncRxd(),
+*               NetTCP_RxPktConnHandlerSyncTxd().
+*
+* Note(s)     : (2) TCP segments with receive data that are available & ready to be read by the application
+*                   layer are linked in a TCP connection's application receive queue.
+*
+*                   (a) Received TCP segments are moved from the doubly-linked Transport Receive Queue,
+*                       sorted by their sequence number(s), into the Application Receive Queue.
+*
+*                       In the diagram below, ... :
+*
+*                       (1) (A) TCP connections' 'RxQ_App_Head' points to the head of a TCP connections'
+*                                   Application Receive Queue;
+*                           (B) TCP connections' 'RxQ_App_Tail' points to the tail of a TCP connections'
+*                                   Application Receive Queue.
+*
+*                       (2) Segment buffers' 'PrevPrimListPtr' & 'NextPrimListPtr'  doubly-link each
+*                           segment to form the Application Receive Queue.
+*
+*                       (3) Fragmented segment buffer's 'PrevBufPtr' & 'NextBufPtr' doubly-link each
+*                           fragmented segment (see also 'net_ip.c  NetIP_RxPktFragReasm()  Note #2b1E').
+*
+*                   (b) (1) TCP segments are appended in sequence order from the head of a TCP connection's
+*                           Transport Receive Queue to the tail of the TCP connection's Application Receive
+*                           Queue.
+*
+*                           See also 'NetTCP_RxPktConnHandlerRxQ_Conn()  Note #3'.
+*
+*                       (2) Application data is read from segments starting from the head of the Application
+*                           Receive Queue.  Segments that are read by the application layer are removed from
+*                           the Application Receive Queue.
+*
+*
+*                                      |                                               |
+*                                      |<- TCP Connection Application Receive Queue -->|
+*                                      |                (see Note #2)                  |
+*
+*                                 Segments Read by                         Segments Appended to
+*                                 Application Layer                      Application Receive Queue
+*                                 starting at head                           starting at tail
+*                                 (see Note #2b2)                            (see Note #2b1)
+*
+*                                         |        NextPrimListPtr                  |
+*                                         |        (see Note #2a2)                  |
+*                                         v                   |                     v
+*                                                             |
+*                        Head of       -------       -------  v    -------       -------  (see Note #2a1B)
+*                        Receive  ---->|     |------>|     |------>|     |------>|     |
+*                         Queue        |     |       |     |       |     |       |     |       Tail of
+*                                      |     |<------|     |<------|     |<------|     |<----  Receive
+*                   (see Note #2a1A)   |     |       |     |  ^    |     |       |     |        Queue
+*                                      |     |       |     |  |    |     |       |     |
+*                                      -------       -------  |    -------       -------
+*                                        | ^                  |      | ^
+*                                        | |       PrevPrimListPtr   | |
+*                                        v |       (see Note #2a2)   v |
+*                                      -------                     -------
+*                                      |     |                     |     |
+*                                      |     |                     |     |
+*                                      |     |                     |     |
+*                                      |     |                     |     |
+*                                      |     |                     |     |
+*                                      -------                     -------
+*                                        | ^                         | ^
+*                        NextBufPtr ---> | | <--- PrevBufPtr         | |
+*                     (see Note #2a3)    v |   (see Note #2a3)       v |
+*                                      -------                     -------
+*                                      |     |                     |     |
+*                                      |     |                     |     |
+*                                      |     |                     -------
+*                                      |     |
+*                                      |     |
+*                                      -------
+*
+*               (3) (a) (1) RFC #793, Section 3.8 'Interfaces : User/TCP Interface : TCP User Commands :
+*                           Receive' states that :
+*
+*                           (A) "If enough data arrive [sic] to fill the buffer before a PUSH is seen,
+*                                the PUSH flag will not be set in the response to the RECEIVE.  The
+*                                buffer will be filled with as much data as it can hold."
+*
+*                           (B) "If the PUSH is seen before the buffer is filled the buffer will be
+*                                returned partially filled and PUSH indicated."
+*
+*                               See Notes #3b1B & #3b1B.
+*
+*                       (2) RFC #1122, Section 4.2.2.2 states that :
+*
+*                           (A) (1) "At the receiver, the PSH bit forces buffered data to be delivered to
+*                                    the application (even if less than a full buffer has been received)."
+*
+*                               (2) (a) "Conversely, the lack of a PSH bit can be used to avoid unnecessary
+*                                        wakeup calls to the application process; this can be an important
+*                                        performance optimization for large timesharing hosts."
+*
+*                                   (b) "When a series of segments is received without the PSH bit, a TCP
+*                                        MAY queue the data internally without passing it to the receiving
+*                                        application."
+*
+*                           (B) (1) "Passing the PSH bit to the receiving application allows an ...
+*                                    optimization within the application."
+*
+*                               (2) "RFC-793 ... erroneously implies that a received PSH flag must be passed
+*                                    to the application layer.  Passing a received PSH flag to the application
+*                                    layer is now OPTIONAL."
+*
+*                           (C) "The PSH bit is not a record marker and is independent of segment boundaries."
+*
+*                   (b) (1) (A) (1) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 20.5, Page 284
+*                                   states that "Berkeley-derived implementations ignore a received PUSH flag
+*                                   because they normally never delay the delivery of received data to the
+*                                   application".
+*
+*                               (2) Therefore, for TCP connections in any connected state, received TCP segment
+*                                   data is made available to the application receive queue as soon as it is
+*                                   enqueued to the application receive queue.
+*
+*                           (B) Thus for TCP connections in any connected state, TCP segments are moved from
+*                               a TCP connection's transport receive queue to its application receive queue
+*                               whenever the transport receive queue's enqueued TCP segments are consecutively
+*                               sequenced starting from the TCP connection's next expected receive octet.
+*
+*                       (2) Thus TCP application-receive PUSH feature is obsoleted & NOT implemented.
+*
+*                       See also 'NetTCP_TxConnAck()  Note #4a4'.
+*
+*               (4) A TCP connection's next expected receive sequence numbers are NOT updated until
+*                   both of the TCP connection's transport & application receive queues have been
+*                   handled.  Thus the transmission of any TCP connection data or acknowledgements
+*                   MUST follow the handling of BOTH of the TCP connection's receive queues.
+*
+*                   See also Note #1a3 & 'NetTCP_RxPktConnHandlerRxQ_Conn()  Note #5c'.
+*
+*               (5) Stream-type connections receive all data octets in one or more non-distinct
+*                   packets.  In other words, the application data is NOT bounded by any specific
+*                   packet(s); rather, it is contiguous & sequenced from one packet to the next.
+*
+*                   Therefore, the TCP connection receive queue is signaled ONLY when data is received
+*                   for a connection where data was previously unavailable.
+*
+*               (6) (a) RFC #793, Section 3.7 'Data Communication : Managing the Window' states that
+*                       "the window sent in each segment indicates the range of sequence numbers the
+*                       sender of the window (the data receiver) is currently prepared to accept.
+*                       There is an assumption that this is related to the currently available data
+*                       buffer space available for this connection".
+*
+*                   (b) (1) A TCP connection's advertised receive window MUST NEVER be decreased to zero
+*                           if NO receive data is available & ready to be read by the application layer.
+*
+*                           In other words, if NO received data starting from the next expected receive
+*                           sequence number(s) is queued, then NO data is available to be read by the
+*                           application layer.  Therefore, the receive window size MUST NOT be decreased
+*                           to zero, otherwise the receive window would deadlock since the application
+*                           layer would NOT be able to read & extract any data from the receive window
+*                           & the TCP connection would NOT be able to receive any more data into the
+*                           receive window.
+*
+*                       (2) (A) In case the advertised receive window size has decreased to zero, ...
+*                           (B) & NO data is available to be read by the application layer;       ...
+*                           (C) then remove & free the last received TCP segment from the tail
+*                                   of the TCP connection's transport receive queue,              ...
+*                           (D) & increase the advertised receive window size by this freed
+*                                   segment's length.
+*
+*                           This is permissible because removing the last received TCP segment from
+*                           the TCP connection's transport receive queue does NOT interfere with TCP
+*                           communications since the next expected receive sequence number(s) remains
+*                           unchanged.
+*
+*                       (3) (A) A TCP connection's receive window SHOULD NOT become deadlocked during
+*                               correct operation of TCP communication.  However, these TCP receive
+*                               zero-sized window cases are included as an extra precaution in the
+*                               case that TCP communication is incorrectly handled &/or corrupted.
+*
+*                           (B) A deadlocked TCP connection with a receive window of zero-size with
+*                               absolutely NO buffers queued in the TCP connection's transport receive
+*                               queue SHOULD NEVER occur.  However, the TCP receive window size reset
+*                               case is included as an extra precaution in the case that a TCP connection
+*                               receive window is incorrectly handled &/or corrupted.
+*
+*                       See also 'NetTCP_RxConnWinSizeHandler()  Note #2a1'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerRxQ_AppData (NET_TCP_CONN  *p_conn,
+                                                  NET_ERR       *p_err)
+{
+    NET_BUF          *p_buf;
+    NET_BUF          *p_buf_head;
+    NET_BUF          *p_buf_tail;
+    NET_BUF          *p_buf_q_head;
+    NET_BUF          *p_buf_q_tail;
+    NET_BUF_HDR      *p_buf_hdr;
+    NET_BUF_HDR      *p_buf_hdr_head;
+    NET_BUF_HDR      *p_buf_hdr_tail;
+    NET_BUF_HDR      *p_buf_hdr_q_head;
+    NET_BUF_HDR      *p_buf_hdr_q_tail;
+    NET_TCP_SEQ_NBR   seq_nbr;
+    NET_TCP_SEQ_NBR   seq_nbr_inc;
+    CPU_BOOLEAN       done;
+
+
+                                                                /* ------ REMOVE RX'D SEG(S) FROM TRANSPORT RX Q ------ */
+    switch (p_conn->RxQ_State) {                                /* Cfg starting seq nbr.                                */
+        case NET_TCP_RX_Q_STATE_SYNC:
+             if (p_conn->RxQ_Transport_Head == DEF_NULL) {      /* If   sync seg NOT      q'd with rx'd data, ...       */
+                 seq_nbr = p_conn->RxSeqNbrNext;                /* ...  start rx seq move from next rx seq.             */
+             } else {                                           /* Else sync seg possibly q'd with rx'd data.           */
+                 p_buf_q_head     =  p_conn->RxQ_Transport_Head;
+                 p_buf_hdr_q_head = &p_buf_q_head->Hdr;
+                                                                /* If sync seg q'd,                             ...     */
+                 seq_nbr          = (p_buf_hdr_q_head->TCP_SegSync == DEF_YES)
+                                  ?  p_conn->RxSeqNbrSync       /* ...      start rx seq move from sync rx seq; ...     */
+                                  :  p_conn->RxSeqNbrNext;      /* ... else start rx seq move from next rx seq.         */
+             }
+
+             p_conn->RxQ_State = NET_TCP_RX_Q_STATE_CONN;
+             break;
+
+
+        case NET_TCP_RX_Q_STATE_CONN:
+        case NET_TCP_RX_Q_STATE_CLOSING:
+             seq_nbr = p_conn->RxSeqNbrNext;
+             break;
+
+
+        case NET_TCP_RX_Q_STATE_CLOSED:
+            *p_err = NET_TCP_ERR_NONE;
+             return;
+
+
+        case NET_TCP_RX_Q_STATE_NONE:
+        default:
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+
+    p_buf      = p_conn->RxQ_Transport_Head;
+    p_buf_head = p_buf;
+    p_buf_tail = DEF_NULL;
+    done       = DEF_NO;
+
+    while (done == DEF_NO) {                                    /* Srch for ALL segs with consecutive seq nbrs ...      */
+                                                                /* ... from next expected rx seq.                       */
+        if (p_buf != DEF_NULL) {
+            p_buf_hdr = &p_buf->Hdr;
+            if (p_buf_hdr->TCP_SeqNbr == seq_nbr) {             /* If seq consecutive from next expected rx seq, ..     */
+                seq_nbr_inc  = p_buf_hdr->TCP_SegLen;
+                seq_nbr     += seq_nbr_inc;                     /* ..               update next expected rx seq.        */
+                p_buf_tail   = p_buf;
+                p_buf        = p_buf_hdr->NextPrimListPtr;
+            } else {
+                done = DEF_YES;
+            }
+        } else {
+            done = DEF_YES;
+        }
+    }
+
+
+                                                                /* ---------- UPDATE TCP CONN TRANSPORT RX Q ---------- */
+    if (p_buf != DEF_NULL) {                                    /* If transport rx Q NOT empty, update ..               */
+                                                                /* .. transport rx Q head.                              */
+        p_buf_hdr->PrevPrimListPtr = DEF_NULL;
+        p_conn->RxQ_Transport_Head = p_buf;
+
+    } else {                                                    /* Else clr transport rx Q.                             */
+        p_conn->RxQ_Transport_Head = DEF_NULL;
+        p_conn->RxQ_Transport_Tail = DEF_NULL;
+    }
+
+
+    p_conn->RxSeqNbrNext = seq_nbr;                             /* Update next expected rx seq.                         */
+    if (p_conn->RxQ_State == NET_TCP_RX_Q_STATE_CLOSING) {
+        if (p_conn->RxSeqNbrNext == p_conn->RxSeqNbrLast) {     /* If last seq rx'd, close TCP conn rx.                 */
+            p_conn->RxQ_State = NET_TCP_RX_Q_STATE_CLOSED;
+        }
+    }
+
+
+                                                                /* ---------- MOVE RX'D SEG(S) ONTO APP RX Q ---------- */
+    if (p_buf_tail != DEF_NULL) {                               /* If avail, move rx'd seg(s) from transport rx Q       */
+                                                                /* ... into app rx Q (see Note #3b1B).                  */
+        p_buf_hdr_head                  = &p_buf_head->Hdr;
+        p_buf_hdr_tail                  = &p_buf_tail->Hdr;
+        p_buf_hdr_head->PrevPrimListPtr =  p_conn->RxQ_App_Tail;
+        p_buf_hdr_tail->NextPrimListPtr =  DEF_NULL;
+
+        if (p_conn->RxQ_App_Tail != DEF_NULL) {                 /* If app rx Q NOT empty, ...                           */
+                                                                /* ... append seg(s) @ Q tail (see Note #2b1).          */
+            p_buf_q_tail                      =  p_conn->RxQ_App_Tail;
+            p_buf_hdr_q_tail                  = &p_buf_q_tail->Hdr;
+            p_buf_hdr_q_tail->NextPrimListPtr =  p_buf_head;
+            p_conn->RxQ_App_Tail              =  p_buf_tail;
+
+        } else {                                                /* Else add seg(s) to empty app rx Q ...                */
+            p_conn->RxQ_App_Head              =  p_buf_head;
+            p_conn->RxQ_App_Tail              =  p_buf_tail;
+
+            NetTCP_RxQ_Signal(p_conn->ID, p_err);               /* ...   & signal non-empty app rx Q (see Note #5).     */
+            if (*p_err != NET_TCP_ERR_NONE) {
+                 return;
+            }
+        }
+
+
+    } else {                                                    /* ----------------- CHK RX WIN SIZE ------------------ */
+        if (p_conn->RxWinSizeActual < 1) {                      /* If avail rx win size zero  (see Note #6b2A)  ...     */
+            if (p_conn->RxQ_App_Head == DEF_NULL) {             /* ... & NO avail app rx data (see Note #6b2B); ...     */
+                                                                /* ... inc rx win size (see Note #6b).                  */
+                p_buf = p_conn->RxQ_Transport_Tail;
+                if (p_buf != DEF_NULL) {                        /* If transport rx Q NOT empty;              ...        */
+                                                                /* ... remove last q'd seg (see Note #6b2C), ...        */
+                    p_buf_hdr    = &p_buf->Hdr;
+                    p_buf_q_tail =  p_buf_hdr->PrevPrimListPtr;
+                    if (p_buf_q_tail != DEF_NULL) {
+                        p_conn->RxQ_Transport_Tail        =  p_buf_q_tail;
+                        p_buf_hdr_q_tail                  = &p_buf_q_tail->Hdr;
+                        p_buf_hdr_q_tail->NextPrimListPtr =  DEF_NULL;
+
+                    } else {
+                        p_conn->RxQ_Transport_Head        =  DEF_NULL;
+                        p_conn->RxQ_Transport_Tail        =  DEF_NULL;
+
+                        NetTCP_RxQ_Clr(p_conn->ID, p_err);
+                        if (*p_err != NET_TCP_ERR_NONE) {
+                             NetTCP_ConnClose(p_conn, DEF_NULL, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_ALL);
+                             return;
+                        }
+                    }
+
+
+#ifdef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN                           /* ... inc win size by seg's len (see Note #6b2D),      */
+                    NetTCP_RxConnWinSizeHandler(p_conn, DEF_NULL, p_buf_hdr->TCP_SegLenData, NET_TCP_CONN_RX_WIN_SET);
+#else
+                    NetTCP_RxConnWinSizeHandler(p_conn, DEF_NULL, 1, NET_TCP_CONN_RX_WIN_INC);
+#endif
+                    NetTCP_RxPktFree(p_buf);                     /* ... & free seg (see Note #6b2C).                     */
+
+                } else {                                          /* Else reset TCP conn rx win size (see Note #6b3B).    */
+#ifdef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+                    NetTCP_RxConnWinSizeHandler(p_conn, DEF_NULL, 0u, NET_TCP_CONN_RX_WIN_RESET);
+#else
+                    NetTCP_RxConnWinSizeHandler(p_conn, DEF_NULL, 0u, NET_TCP_CONN_RX_WIN_RESET);
+#endif
+                }
+            }
+        }
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetTCP_RxPktConnHandlerTxWinRemote()
+*
+* Description : Handle TCP connection's transmit remote host window update.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               ack_code    Indicates the received segment's acknowledgement condition :
+*               --------
+*                               NET_TCP_CONN_RX_ACK_VALID           Received acknowledgement number is
+*                                                                       valid for the TCP connection.
+*
+*                               NET_TCP_CONN_RX_ACK_DUP             Received acknowledgement number is a
+*                                                                                duplicate for the TCP
+*                                                                       connection.
+*
+*                               NET_TCP_CONN_RX_ACK_PREV            Received acknowledgement number is a
+*                                                                       previous duplicate for the TCP
+*                                                                       connection.
+*
+*                           Argument validated in NetTCP_RxPktConnHandler() functions.
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection's transmit remote host
+*                                                                       window successfully handled.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSeg().
+*
+* Note(s)     : (1) (a) (1) The following sections ... :
+*
+*                           (A) RFC #1122, Section 4.2.2.20.(c)
+*                           (B) RFC #1122, Section 4.2.2.20.(f)
+*
+*                       (2) ... generalize that "when the connection enters ESTABLISHED STATE, the following
+*                           variables should be set" :
+*
+*                           (A) SND.WND <- SEG.WND
+*                           (B) SND.WL1 <- SEG.SEQ
+*                           (C) SND.WL2 <- SEG.ACK
+*
+*                   (b) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                           ESTABLISHED STATE' generalizes ...
+*
+*                           (A) ... that for the following connected states ... :
+*
+*                               (1) ESTABLISHED
+*                               (2) FIN-WAIT-1
+*                               (3) CLOSING
+*                               (4) CLOSE-WAIT
+*                               (5) LAST-ACK
+*                                   (a) See 'NetTCP_RxPktConnHandlerLastAck()  Notes #2d2B'.
+*
+*                           (B) ... that "if SND.UNA < SEG.ACK <= SND.NXT, the send window should be updated" :
+*
+*                               (1) If ...
+*
+*                                   (a)  ((SND.WL1 <  SEG.SEQ)  or
+*                                   (b)  ((SND.WL1 == SEG.SEQ)  and
+*                                   (c)   (SND.WL2 <= SEG.ACK)) ...
+*
+*                               (2) ... [then] set ...
+*
+*                                   (a) SND.WND <- SEG.WND
+*                                   (b) SND.WL1 <- SEG.SEQ
+*                                   (c) SND.WL2 <- SEG.ACK
+*
+*                       (2) (A) RFC #1122, Section 4.2.2.20.(g) amends the transmit window update criteria
+*                               for the segment's acknowledgement to include SND.UNA : "The window should
+*                               updated if SND.UNA <= SEG.ACK <= SND.NXT."
+*
+*                               This allows received segments that exactly acknowledge the TCP connection's
+*                               last acknowledged transmit sequence octet to update the transmit window in
+*                               case the remote host's receive window size is increasing or decreasing.
+*
+*                           (B) However, it does NOT seem reasonable to update a TCP connection's remote
+*                               transmit window for any received duplicate acknowledgement segment; i.e.
+*                               an acknowledgement with the exact same sequence numbers & receive window
+*                               size advertisement.  Otherwise, each received duplicate acknowledgement
+*                               would incorrectly update the TCP connection's remote transmit window size.
+*
+*                               Therefore, it seems reasonable & is assumed that the transmit window MUST
+*                               be updated for received acknowledgements that exactly acknowledge the TCP
+*                               connection's last acknowledged transmit sequence octet, if & only if the
+*                               received segment's receive window size advertisement has increased or
+*                               decreased since the last received acknowledgement segment.
+*
+*                           See also RFC #1122, Section 4.2.2.16 & 'NetTCP_TxConnAck()  Note #4b1B1'.
+*
+*                   See also 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Note #3'.
+*
+*               (2) RFC #793 does NOT provide nor suggest any logic to determine/handle sequence number
+*                   comparisons for sequence number windows that overflow the sequence number space.
+*
+*                   (a) (1) For example, in order to update the transmit window, a received segment's
+*                           acknowledgement value (SEG.ACK) MUST be greater than or equal to the last
+*                           received acknowledgement number that updated the transmit window (SND.WL2)
+*                           [see Note #1b1B1c] :
+*
+*                               (A) SEG.ACK >= SND.WL2
+*
+*                           However, if SEG.ACK overflows the sequence number space, it will be MUCH
+*                           less than SND.WL2 until SND.WL2 also overflows :
+*
+*                               (B) SEG.ACK << SND.WL2
+*
+*                       (2) Therefore, in order to validate a received segment's acknowledgement number
+*                           as valid for updating the TCP connection's transmit window, the following
+*                           unsigned arithmetic comparison MUST be true :
+*
+*                               (A) (SND.NXT - SEG.ACK)  <=  (SND.NXT - SND.WL2)
+*
+*                   (b) (1) Alternatively, to update the transmit window, a received segment's  sequence
+*                           number (SEG.SEQ) MUST be greater than or equal to the last received sequence
+*                           number that updated the transmit window (SND.WL1) [see Notes #1b1B1a & #1b1B1b] :
+*
+*                               (A) SEG.SEQ >= SND.WL1
+*
+*                       (2) Therefore, in order to validate a received segment's sequence number as valid
+*                           for updating the TCP connection's transmit window, the following unsigned
+*                           arithmetic comparison MUST be true :
+*
+*                               (A) (RCV.NXT + RCV.WND) - SEG.SEQ  <  (RCV.NXT + RCV.WND) - SND.WL1
+*
+*                       See also 'NetTCP_RxPktConnIsValidAck()  Note #3'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerTxWinRemote (NET_TCP_CONN      *p_conn,
+                                                  NET_TCP_ACK_CODE   ack_code,
+                                                  NET_BUF_HDR       *p_buf_hdr,
+                                                  NET_ERR           *p_err)
+{
+    CPU_BOOLEAN      tx_win_update;
+    NET_TCP_SEQ_NBR  ack_delta_next;
+    NET_TCP_SEQ_NBR  ack_delta_win_update;
+    NET_TCP_SEQ_NBR  seq_win;
+    NET_TCP_SEQ_NBR  seq_win_delta;
+    NET_TCP_SEQ_NBR  seq_win_update_delta;
+    NET_ERR          err;
+
+
+                                                                /* ------ VALIDATE TCP CONN TX REMOTE WIN UPDATE ------ */
+    tx_win_update = DEF_NO;
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* Validate TCP conn tx Q state.                        */
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                     *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+                      return;
+             }
+#endif
+
+             tx_win_update = DEF_YES;                           /* Update tx win ctrls (see Note #1a2).                 */
+             break;
+
+
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* Validate TCP conn tx Q state.                        */
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                     *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+                      return;
+             }
+#endif
+                                                                /* Chk tx win ctrls update      (see Note #1b1B1).      */
+                                                                /* If seq = last win update seq (see Note #1b1B1b),  .. */
+             if (p_buf_hdr->TCP_SeqNbr == p_conn->TxWinUpdateSeqNbr) {
+
+                 ack_delta_next       = (NET_TCP_SEQ_NBR)(p_conn->TxSeqNbrNext - p_buf_hdr->TCP_AckNbr);
+                 ack_delta_win_update = (NET_TCP_SEQ_NBR)(p_conn->TxSeqNbrNext - p_conn->TxWinUpdateAckNbr);
+                 if (ack_delta_next <= ack_delta_win_update) {  /* .. (next - ack) <= (next - last win update ack),  .. */
+                                                                /* .. & rx'd ack OR win != last rx'd ack or win,     .. */
+                                                                /* .. update tx win (see Notes #1b1B1c, #1b2B, & #2a2A),*/
+                     tx_win_update = ((p_buf_hdr->TCP_AckNbr  != p_conn->TxWinUpdateAckNbr ) ||
+                                      (p_buf_hdr->TCP_WinSize != p_conn->TxWinUpdateWinSize)) ? DEF_YES : DEF_NO;
+                 }
+
+             } else {
+                 seq_win              = (NET_TCP_SEQ_NBR)(p_conn->RxSeqNbrNext + p_conn->RxWinSizeActual);
+                 seq_win_delta        = (NET_TCP_SEQ_NBR)(seq_win             - p_buf_hdr->TCP_SeqNbr);
+                 seq_win_update_delta = (NET_TCP_SEQ_NBR)(seq_win             - p_conn->TxWinUpdateSeqNbr);
+
+                 if (seq_win_delta < seq_win_update_delta) {    /* .. else if [(next + win) -                 seq] < .. */
+                                                                /* ..         [(next + win) - last win update seq],  .. */
+                     tx_win_update = DEF_YES;                   /* .. update tx win (see Notes #1b1B1a & #2b2A).        */
+                 }
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        case NET_TCP_CONN_STATE_CLOSED:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+
+
+                                                                /* ---------- UPDATE TCP CONN TX REMOTE WIN ----------- */
+    if (tx_win_update == DEF_YES) {                             /* Update tx win ctrls (see Notes #1a2 & #1b1B2).       */
+        NetTCP_TxConnWinSizeHandlerCongCtrl(p_conn, p_buf_hdr, ack_code, 0, NET_TCP_CONN_TX_WIN_REMOTE_UPDATE, &err);
+       (void)&err;                                              /* Ignore err(s).                                       */
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetTCP_RxPktConnHandlerReTxQ()
+*
+* Description : (1) Handle received valid acknowledgement segments :
+*
+*                   (a) Update TCP connection re-transmit queue :
+*
+*                       (1) Update TCP connection's unacknowledged transmit sequences       See Note #2c1
+*                       (2) Remove acknowledged TCP segments from a TCP                     See Note #2c2
+*                               connection's re-transmit queue
+*                       (3) Update TCP connection's round-trip  time calculations
+*                               (see 'NetTCP_TxConnRTT_RTO_Calc()  Note #2a1')
+*                       (4) Update TCP connection's re-transmit timeout                     See Note #8b
+*                       (5) Free   TCP packet buffer(s)
+*                       (6) Start  TCP connection's    transmit idle timer
+*                               (see 'NetTCP_TxConnTxQ_TimeoutIdleSet()  Note #2a1')
+*
+*                   (b) Update TCP connection's transmit window(s) :
+*
+*                       (1) Increment TCP connection's configured         transmit window size
+*                       (2) Increment TCP connection's congestion control transmit window size
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandler().
+*
+*               ack_code    Indicates the received segment's acknowledgement condition :
+*               --------
+*                               NET_TCP_CONN_RX_ACK_VALID           Received acknowledgement number is
+*                                                                       valid     for the TCP connection.
+*
+*                               NET_TCP_CONN_RX_ACK_DUP             Received acknowledgement number is a
+*                                                                       duplicate for the TCP connection.
+*
+*                           Argument validated in NetTCP_RxPktConnHandler() functions.
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection's re-transmit queue
+*                                                                       successfully handled.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                               NET_TCP_ERR_CONN_ACK_INVALID        Invalid received segment acknowledgement.
+*                               NET_TCP_ERR_CONN_DATA_INVALID       TCP connection re-transmit queue contains
+*                                                                       invalid or improperly sequenced data.
+*
+*                                                                   ---- RETURNED BY NetTCP_TxConnReTxQ_TimeoutSet() : ----
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*
+*                                                                   --- RETURNED BY NetTCP_TxConnWinSizeHandlerCfgd() : ---
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT       TCP connection transmit queue signal fault.
+*
+*                                                                   - RETURNED BY NetTCP_TxConnWinSizeHandlerCongCtrl() : -
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSeg().
+*
+* Note(s)     : (2) (a) The following sections ... :
+*
+*                       (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                               Check SYN Bit'
+*                       (2) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                               ESTABLISHED STATE'
+*
+*                   (b) ... generalize that for ...
+*
+*                       (1) ... the following synchronization-to-connected state transitions ... :
+*
+*                           (A) SYN-RECEIVED to ESTABLISHED
+*                           (B) SYN-SENT     to ESTABLISHED
+*
+*                       (2) ... & for the following connected states ... :
+*
+*                           (A) ESTABLISHED
+*                           (B) FIN-WAIT-1
+*                           (C) CLOSING
+*                           (D) CLOSE-WAIT
+*                           (E) LAST-ACK
+*                               (1) See 'NetTCP_RxPktConnHandlerLastAck()  Notes #2d2B'.
+*
+*                   (c) ... that ...
+*
+*                       (1) "If SND.UNA < SEG.ACK <= SND.NXT, SND.UNA should be advanced to equal SEG.ACK" :
+*
+*                               (A) SND.UNA <- SEG.ACK
+*
+*                       (2) "Any segments on the retransmission queue which are thereby entirely acknowledged
+*                            are removed."
+*
+*               (3) A TCP connection's re-transmit queue SHOULD be updated ONLY by valid, non-duplicate
+*                   received acknowledgement segments.
+*
+*               (4) Since valid received acknowledgement segments update a TCP connection's last
+*                   unacknowledged transmit sequence number ('TxSeqNbrUnackd'), any controls &/or
+*                   calculations based on the TCP connection's last unacknowledged transmit sequence
+*                   number MUST use the saved/previous value of the TCP connection's last unacknowledged
+*                   transmit sequence number ('TxSeqNbrUnackdPrev').
+*
+*               (5) Since segments enqueued to a TCP connection's re-transmit queue have already been
+*                   transmitted to the remote host & reported to the application layer as having been
+*                   transmitted, any TCP connection whose re-transmit queue becomes corrupted MUST be
+*                   closed to prevent the further transmit of corrupted data.
+*
+*               (6) Although network packets are NOT required to ensure that network packet headers or
+*                   data will locate on CPU word-aligned addresses; many processors may be more efficient
+*                   & may even REQUIRE that memory transfers occur on CPU word-aligned addresses [e.g.
+*                   processors or devices with direct memory access (DMA) capability].
+*
+*                   Therefore, to ensure appropriate CPU word alignment; any segment in a TCP connection's
+*                   re-transmit queue whose transmit sequences are partially acknowledged MUST acknowledge
+*                   an exact number of sequences such that the remaining sequences are aligned on a CPU
+*                   word-aligned address.
+*
+*                   (a) Since RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check
+*                       Sequence Number' states that in the "SYN-RECEIVED, ESTABLISHED STATE,
+*                       FIN-WAIT-1 STATE, FIN-WAIT-2 STATE, CLOSE-WAIT STATE, CLOSING STATE,
+*                       LAST-ACK STATE, TIME-WAIT STATE" that "if a segment's contents straddle
+*                       the boundary between old and new, only the new parts should be processed";
+*                       any data segments partially acknowledged in a TCP connections' re-transmit
+*                       queue may be re-transmitted in full or in part since the retransmission of
+*                       previously received data is not processed.
+*
+*               (7) (a) RFC #1122, Section 4.2.3.5 states that "excessive retransmission of the same
+*                       segment by TCP indicates some failure of the remote host or the Internet path
+*                       ... When the number of transmissions of the same segment reaches a threshold
+*                       ... close the connection."
+*
+*                   (b) However, any segment in a TCP connection's re-transmit queue whose transmit
+*                       sequences are partially acknowledged SHOULD NOT be considered the same segment
+*                       for purposes of excessive retransmission.
+*
+*                       Therefore, it seems reasonable that whenever a TCP connection's re-transmit
+*                       queue segment's transmit sequences are partially acknowledged; that segment's
+*                       re-transmit counter should be reset.
+*
+*                   See also 'NetTCP_TxConnReTxQ()  Note #3'.
+*
+*               (8) (a) (1) (A) RFC #793, Section 3.7 'Data Communication : Retransmission Timeout' states
+*                               that "the Round Trip Time (RTT) ... [is] the elapsed time between" :
+*
+*                               (1) "sending a data octet with a particular sequence number and"   ...
+*                               (2) "receiving an acknowledgment that covers that sequence number" ...
+*                               (3) "(segments sent do not have to match segments received)".
+*
+*                           (B) (1) RFC #2988, Section 3 adds that :
+*
+*                                   (a) "Traditionally, TCP implementations have taken one RTT measurement at
+*                                        a time (typically once per RTT)."
+*
+*                               (2) RFC #2988, Section 1 states that "in some situations it may be beneficial
+*                                   for a TCP sender to be more conservative than the algorithms detailed in
+*                                   this document allow.  However, a TCP MUST NOT be more aggressive than the
+*                                   ... algorithms allow".
+*
+*                           See also 'NetTCP_TxConnRTT_RTO_Calc()  Note #2a2'.
+*
+*                       (2) RFC #2988, Section 3 states that "TCP MUST use Karn's algorithm ... for taking
+*                           RTT samples.  That is, RTT samples MUST NOT be made using segments that were
+*                           retransmitted (and thus for which it is ambiguous whether the reply was for
+*                           the first instance of the packet or a later instance)".
+*
+*                           (A) (1) To determine if any segment(s) from a TCP connection's re-transmit queue
+*                                   have been re-transmitted (i.e. transmitted more than once), the TCP
+*                                   connection's transmit unacknowledged & un-re-transmitted sequence numbers
+*                                   are compared :
+*
+*                                   (a) If NO  sequences in the TCP connection's re-transmit queue have been
+*                                          re-transmitted,  the TCP connection's    transmit unacknowledged &
+*                                       un-re-transmitted sequence numbers will be equal.
+*
+*                                   (b) If ANY sequences in the TCP connection's re-transmit queue have been
+*                                          re-transmitted,  the TCP connection's    transmit unacknowledged
+*                                          sequence number will be less than the un-re-transmitted sequence
+*                                          number.
+*
+*                               (2) If a received acknowledgement fully acknowledges ALL re-transmitted
+*                                   segment(s) from a TCP connection's re-transmit queue, the TCP connection
+*                                   advances its un-re-transmitted sequence number to the received segment's
+*                                   acknowledgement sequence number.
+*
+*                           (B) Although RTT measurements could be calculated for ALL transmitted segments;
+*                               to simplify implementation of Karn's algorithm :
+*
+*                               (1) Only a single RTT measurement is calculated, ...        See Note #8a1B1a
+*                               (2) (a) per TCP acknowledgement received         ...        See Note #8a1A2
+*                                         AND
+*                                   (b) the segment at the head of a TCP connection's
+*                                           re-transmit queue.                              See Note #8a1A1
+*
+*                           See also 'NetTCP_TxConnReTxQ()  Note #4'.
+*
+*                   (b) RFC #2988, Section 5 states that "the following is the RECOMMENDED algorithm for
+*                       managing the retransmission timer" :
+*
+*                       (2) "When all outstanding data has been acknowledged, turn off the retransmission
+*                            timer."
+*
+*                       (3) "When an ACK is received that acknowledges new data, restart the retransmission
+*                            timer so that it will expire after RTO seconds (for the current value of RTO)."
+*
+*                       See also 'NetTCP_TxConnReTxQ()  Note #2b1A'.
+*
+*               (9) RFC #793 does NOT provide nor suggest any logic to determine/handle sequence number
+*                   comparisons for sequence number windows that overflow the sequence number space.
+*
+*                   (a) For example, the next sequence octet to transmit (SND.NXT) is typically greater
+*                       than or equal to any received segment's acknowledgement number (SEG.ACK) :
+*
+*                           (1) SND.NXT >= SEG.ACK
+*
+*                       However, if SND.NXT overflows the sequence number space, it will be MUCH less
+*                       than SEG.ACK until SEG.ACK also overflows :
+*
+*                           (2) SND.NXT << SEG.ACK
+*
+*                   (b) (1) Therefore, in order to determine if a received segment's acknowledgement value
+*                           fully acknowledges previously transmitted segment(s) in the TCP connection's
+*                           re-transmit queue, the following unsigned arithmetic comparison MUST be checked :
+*
+*                               (A) (SND.NXT - SEG.ACK)  <=  SND.NXT - (ReTxQCur.SeqNbr + ReTxQCur.SegLen)
+*
+*                           See also 'NetTCP_RxPktConnIsValidAck()  Note #3a2'.
+*
+*                       (2) In order to determine if a received segment's acknowledgement partially
+*                           acknowledges a previously received segment in the TCP connection's re-
+*                           transmit queue, the following unsigned arithmetic comparison MUST be checked :
+*
+*                               (A) (ReTxQCur.SeqNbr + ReTxQCur.SegLen) - SEG.ACK  <  ReTxQCur.SegLen
+*
+*                           See also 'NetTCP_RxPktConnHandlerRxQ_Conn()  Note #4c2'.
+*
+*                       (3) In order to determine if a received segment's acknowledgement should
+*                           advance the TCP connection's un-re-transmitted sequence number(s), the
+*                           following unsigned arithmetic comparison MUST be true :
+*
+*                               (A) (SEG.ACK - ReTxQ.UnReTxdSeqNbr)  <=  (SND.NXT - ReTxQ.UnReTxdSeqNbr)
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerReTxQ (NET_TCP_CONN      *p_conn,
+                                            NET_TCP_ACK_CODE   ack_code,
+                                            NET_BUF_HDR       *p_buf_hdr,
+                                            NET_ERR           *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_TCP_SEQ_NBR        seq_nbr_cur                = 0u;
+    NET_TCP_SEQ_NBR        seq_nbr_delta              = 0u;
+    NET_TCP_SEQ_NBR        seq_nbr_next_qd            = 0u;
+#endif
+    NET_TCP_SEQ_NBR        ack_delta_seq              = 0u;
+    NET_TCP_SEQ_NBR        ack_delta_seq_align        = 0u;
+    NET_TCP_SEQ_NBR        ack_delta_seq_align_offset = 0u;
+    NET_TCP_SEQ_NBR        ack_delta_unretxd          = 0u;
+    NET_TCP_SEQ_NBR        ack_delta_next             = 0u;
+    NET_TCP_SEQ_NBR        seq_delta_unretxd          = 0u;
+    NET_TCP_SEQ_NBR        seq_delta_next             = 0u;
+    NET_TCP_SEQ_NBR        seq_nbr_next               = 0u;
+    NET_TCP_SEQ_NBR        seq_nbr                    = 0u;
+    NET_TCP_SEG_SIZE       seg_len                    = 0u;
+    NET_TCP_SEG_SIZE       seg_len_tot                = 0u;
+    NET_TCP_SEG_SIZE       seg_len_data               = 0u;
+    NET_TCP_SEG_SIZE       seg_len_data_tot           = 0u;
+    NET_TCP_TX_RTT_TS_MS   seg_rtt_ts_txd_ms          = 0u;
+    NET_TCP_TX_RTT_TS_MS   seg_rtt_ts_rxd_ms          = 0u;
+    CPU_BOOLEAN            segs_re_txd                = DEF_NO;
+    CPU_BOOLEAN            seqs_ackd                  = DEF_NO;
+    CPU_BOOLEAN            done                       = DEF_NO;
+    CPU_BOOLEAN            tmr_update                 = DEF_NO;
+    NET_BUF               *p_buf_q                    = DEF_NULL;
+    NET_BUF               *p_buf_q_head               = DEF_NULL;
+    NET_BUF               *p_buf_q_prev               = DEF_NULL;
+    NET_BUF               *p_buf_q_next               = DEF_NULL;
+    NET_BUF_HDR           *p_buf_q_hdr                = DEF_NULL;
+    NET_BUF_HDR           *p_buf_q_head_hdr           = DEF_NULL;
+    NET_BUF_HDR           *p_buf_q_prev_hdr           = DEF_NULL;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE TCP CONN ----------------- */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                      switch (ack_code) {
+                          case NET_TCP_CONN_RX_ACK_VALID:
+                               break;
+
+
+                          case NET_TCP_CONN_RX_ACK_NONE:
+                          case NET_TCP_CONN_RX_ACK_INVALID:
+                          case NET_TCP_CONN_RX_ACK_DUP:
+                          case NET_TCP_CONN_RX_ACK_PREV:
+                          default:
+                              *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+                               return;
+                      }
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                     *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                      switch (ack_code) {
+                          case NET_TCP_CONN_RX_ACK_VALID:
+                          case NET_TCP_CONN_RX_ACK_DUP:
+                               break;
+
+
+                          case NET_TCP_CONN_RX_ACK_NONE:
+                          case NET_TCP_CONN_RX_ACK_INVALID:
+                          case NET_TCP_CONN_RX_ACK_PREV:
+                          default:
+                              *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+                               return;
+                      }
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                     *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        case NET_TCP_CONN_STATE_CLOSED:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+#endif
+
+
+
+                                                                /* ------------- UPDATE UNACK'D TX SEQ(S) ------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    seq_nbr_cur                = p_conn->TxSeqNbrUnAckd;
+    seq_nbr_delta              = p_conn->TxSeqNbrUnAckdAlignDelta;
+#endif
+    p_conn->TxSeqNbrUnAckdPrev = p_conn->TxSeqNbrUnAckd;        /* Save prev tx unack'd seq nbr (see Note #4).          */
+    p_conn->TxSeqNbrUnAckd     = p_buf_hdr->TCP_AckNbr;         /* Ack  prev'ly unack'd tx segs (see Note #2c1).        */
+
+    if (p_conn->TxSeqNbrUnAckd == p_conn->TxSeqNbrLast) {       /* If last tx'd seq ack'd, close TCP conn tx.           */
+        switch (p_conn->TxQ_State) {
+            case NET_TCP_TX_Q_STATE_CLOSING:
+                 p_conn->TxQ_State = NET_TCP_TX_Q_STATE_CLOSED;
+                 break;
+
+
+            case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                 p_conn->TxQ_State = NET_TCP_TX_Q_STATE_CLOSED_SUSPEND;
+                 break;
+
+
+            default:                                            /* 'default' case intentionally empty.                  */
+                 break;
+        }
+    }
+
+
+                                                                /* --------- REMOVE ACK'D SEG(S) FROM RE-TX Q --------- */
+    if (ack_code != NET_TCP_CONN_RX_ACK_VALID) {                /* If ack NOT valid, non-dup ack; ...                   */
+       *p_err = NET_TCP_ERR_NONE;                               /* ... do NOT update re-tx Q (see Note #3).             */
+        return;
+    }
+
+    p_buf_q_head     = p_conn->ReTxQ_Head;
+    p_buf_q_prev     = DEF_NULL;
+    p_buf_q          = p_buf_q_head;
+    seg_len_tot      = 0u;
+    seg_len_data_tot = 0u;
+                                                                /* Chk re-tx'd seg(s) [see Notes #8a2A1 & #4].          */
+    segs_re_txd      = (p_conn->TxSeqNbrUnAckdPrev == p_conn->TxSeqNbrUnReTxd)
+                     ?  DEF_NO : DEF_YES;
+    seqs_ackd        =  DEF_NO;
+    done             =  DEF_NO;
+
+    while ((p_buf_q != DEF_NULL) &&                             /* While NOT @ re-tx Q tail, ...                        */
+           (done    ==  DEF_NO)) {                              /* ... srch for ack'd tx segs to remove (see Note #2c2).*/
+
+        p_buf_q_hdr  = &p_buf_q->Hdr;
+        p_buf_q_next =  p_buf_q_hdr->NextPrimListPtr;
+        seq_nbr      =  p_buf_q_hdr->TCP_SeqNbr;
+        seg_len      =  p_buf_q_hdr->TCP_SegLen;
+        seg_len_data =  seg_len;
+        if (p_buf_q_hdr->TCP_SegSync  == DEF_YES) {             /* If sync  seg                           ...           */
+            if (seg_len_data >= NET_TCP_SEG_LEN_SYNC) {         /* ... &        seg len >= sync  seg len, ...           */
+                seg_len_data -= NET_TCP_SEG_LEN_SYNC;           /* ... dec data seg len by sync  seg len.               */
+            }
+        }
+        if (p_buf_q_hdr->TCP_SegClose == DEF_YES) {             /* If close seg                           ...           */
+            if (seg_len_data >= NET_TCP_SEG_LEN_CLOSE) {        /* ... &        seg len >= close seg len, ...           */
+                seg_len_data -= NET_TCP_SEG_LEN_CLOSE;          /* ... dec data seg len by close seg len.               */
+            }
+        }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        seq_nbr_next_qd  = seq_nbr + p_conn->TxSeqNbrUnAckdAlignDelta;
+        if (seq_nbr_cur != seq_nbr_next_qd) {                   /* If next q'd seg's seq nbr NOT consecutive, ...       */
+                                                                /* ... close TCP conn (see Note #5).                    */
+            NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+           *p_err = NET_TCP_ERR_CONN_DATA_INVALID;
+            return;
+        }
+#endif
+                                                                /* Chk if rx'd seg acks cur re-tx Q seg.                */
+        ack_delta_next = (p_conn->TxSeqNbrNext - p_buf_hdr->TCP_AckNbr);
+        seq_nbr_next   = (seq_nbr + seg_len);
+        seq_delta_next = (p_conn->TxSeqNbrNext - seq_nbr_next);
+
+        if (ack_delta_next <= seq_delta_next) {                 /* If seg fully acks cur re-tx Q seg (see Note #9b1A),  */
+            p_buf_q_prev                     = p_buf_q;
+            p_buf_q                          = p_buf_q_next;    /* ... adv to next re-tx Q seg.                         */
+            p_conn->TxSeqNbrUnAckdAlignDelta = 0u;
+            seg_len_tot                     += seg_len;
+            seg_len_data_tot                += seg_len_data;
+            seqs_ackd                        = DEF_YES;
+
+            if (p_buf_q == p_buf_q_prev) {
+                done = DEF_YES;
+            }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+            seq_nbr_cur   += (seg_len - seq_nbr_delta);
+            seq_nbr_delta  = 0u;
+#endif
+
+        } else {                                                /* Else chk partial re-tx Q seg ack (see Note #9b2A) :  */
+            ack_delta_seq = p_buf_hdr->TCP_AckNbr - seq_nbr;
+            if (ack_delta_seq < 1) {                            /* If NO   seqs ack'd for cur re-tx Q seg, ...          */
+                ;                                               /* ... do NOT update seg.                               */
+
+            } else if (ack_delta_seq < seg_len) {               /* If SOME seqs ack'd for cur re-tx Q seg,  ...         */
+
+                                                                /* Align partial ack to word boundary (see Note #6).    */
+                ack_delta_seq_align_offset       = (ack_delta_seq % sizeof(CPU_ALIGN));
+                ack_delta_seq_align              = (ack_delta_seq - ack_delta_seq_align_offset);
+                p_conn->TxSeqNbrUnAckdAlignDelta =  ack_delta_seq_align_offset;
+
+                                                                /* ...   update cur seg's seq nbr & seg len ...         */
+                p_buf_q_hdr->TCP_SeqNbr         += ack_delta_seq_align;
+                p_buf_q_hdr->TCP_SegLen         -= ack_delta_seq_align;
+                p_buf_q_hdr->TCP_SegLenData     -= ack_delta_seq_align;
+                seg_len_tot                     += ack_delta_seq_align;
+                seg_len_data_tot                += ack_delta_seq_align;
+                                                                /* ... & update TCP tx buf ctrls.                       */
+                p_buf_q_hdr->DataIx             += ack_delta_seq_align;
+                p_buf_q_hdr->DataLen            -= ack_delta_seq_align;
+                p_buf_q_hdr->TotLen             -= ack_delta_seq_align;
+
+                p_buf_q_hdr->TCP_SegReTxCtr      = 0u;          /* Reset re-tx ctr (see Note #7b).                      */
+
+                seqs_ackd                        = DEF_YES;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+            } else {                                            /* Else fully-ack'd-seg chk failed?; close TCP conn?    */
+                NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+               *p_err = NET_TCP_ERR_CONN_DATA_INVALID;
+                return;
+#endif
+            }
+
+            done = DEF_YES;
+        }
+    }
+
+
+                                                                /* --------------- UPDATE TCP CONN RTO ---------------- */
+    if (seqs_ackd == DEF_YES) {                                 /* If ANY  re-tx Q seq(s) ack'd                     ..  */
+        if (segs_re_txd == DEF_NO) {                            /* .. & NO re-tx Q seg(s) re-tx'd (see Note #8a2);  ..  */
+                                                                /* ..   get tx'd seg RTT ts       (see Note #8a1A1) ..  */
+            p_buf_q_head_hdr  = &p_buf_q_head->Hdr;
+            seg_rtt_ts_txd_ms =  p_buf_q_head_hdr->TCP_RTT_TS_Txd_ms;
+                                                                /* ..   get rx'd ack RTT ts       (see Note #8a1A2) ..  */
+            seg_rtt_ts_rxd_ms =  p_buf_hdr->TCP_RTT_TS_Rxd_ms;
+                                                                /* .. & calc/update RTT/RTO       (see Note #1a3).      */
+            NetTCP_TxConnRTT_RTO_Calc(p_conn, NET_TCP_CONN_TX_RTT_RTO_CALC, seg_rtt_ts_txd_ms, seg_rtt_ts_rxd_ms);
+        }
+
+        ack_delta_unretxd = p_buf_hdr->TCP_AckNbr - p_conn->TxSeqNbrUnReTxd;
+        seq_delta_unretxd = p_conn->TxSeqNbrNext  - p_conn->TxSeqNbrUnReTxd;
+        if (ack_delta_unretxd <= seq_delta_unretxd) {           /* If (ack - un-re-tx'd) < (next - un-re-tx'd), ...     */
+                                                                /* ... acks ALL re-tx'd seg(s)        [see Note #9b3A], */
+            p_conn->TxSeqNbrUnReTxd = p_buf_hdr->TCP_AckNbr;    /* ... adv   un-re-tx'd seq(s) to ack (see Note #8a2A2).*/
+        }
+    }
+
+
+                                                                /* ------------- UPDATE TCP CONN RE-TX Q -------------- */
+    tmr_update  = seqs_ackd;                                    /* Update re-tx Q tmr if ANY re-tx Q seqs ack'd ...     */
+                                                                /* ... (see Note #8b3).                                 */
+    if (p_buf_q != p_buf_q_head) {                              /* If ANY re-tx Q segs fully ack'd, update re-tx Q.     */
+
+        if (p_buf_q != DEF_NULL) {                              /* If re-tx Q still NOT empty, . ..                     */
+            p_buf_q_prev_hdr                  = &p_buf_q_prev->Hdr;
+            p_buf_q_prev_hdr->NextPrimListPtr =  DEF_NULL;
+                                                                /* ... update re-tx Q head.                             */
+            p_conn->ReTxQ_Head                =  p_buf_q;
+            p_buf_q_hdr->PrevPrimListPtr      =  DEF_NULL;
+
+        } else {                                                /* Else clr   re-tx Q.                                  */
+            p_conn->ReTxQ_Head = DEF_NULL;
+            p_conn->ReTxQ_Tail = DEF_NULL;
+
+            if (p_conn->ReTxQ_Tmr != DEF_NULL) {                /* Free  re-tx Q      tmr (see Note #8b2).              */
+                NetTmr_Free(p_conn->ReTxQ_Tmr);
+            }
+            p_conn->ReTxQ_Tmr = DEF_NULL;
+            tmr_update        = DEF_NO;
+
+            NetTCP_TxConnTxQ_TimeoutIdleSet(p_conn);            /* Start    tx Q idle tmr (see Note #1a6).              */
+        }
+
+        (void)NetTCP_TxPktFree(p_buf_q_head);                   /* Free ALL fully ack'd seg pkt buf(s).                 */
+    }
+
+
+    if (tmr_update == DEF_YES) {                                /* Update re-tx Q tmr.                                  */
+        NetTCP_TxConnReTxQ_TimeoutSet(p_conn, DEF_NO, NET_TCP_CONN_CLOSE_ALL, p_err);
+        if (*p_err != NET_TCP_ERR_NONE) {
+             return;
+        }
+    }
+
+                                                                /* ----------- UPDATE TCP CONN TX WIN SIZES ----------- */
+                                                                /* Inc TCP conn's tx win sizes (see Note #1b).          */
+    NetTCP_TxConnWinSizeHandlerCfgd(p_conn, seg_len_data_tot, NET_TCP_CONN_TX_WIN_INC, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+
+    NetTCP_TxConnWinSizeHandlerCongCtrl(p_conn,
+                                        DEF_NULL,
+                                        NET_TCP_CONN_RX_ACK_NONE,
+                                        seg_len_data_tot,
+                                        NET_TCP_CONN_TX_WIN_INC,
+                                        p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                              NetTCP_RxPktConnHandlerListenQ_IsAvail()
+*
+* Description : Check if application layer listen queue is available to queue a new connection.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandlerListen().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    Application layer listen queue successfully
+*                                                                       checked; check return value for listen
+*                                                                       queue availability.
+*
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_ID         Invalid application connection.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*
+*                                                                   ---- RETURNED BY NetConn_ID_AppGet() : ----
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+* Return(s)   : DEF_YES, if application connection's listen queue is available to queue a new connection.
+*
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerListen().
+*
+* Note(s)     : (1) (a) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 18.11, Pages 257-258 states
+*                       that :
+*
+*                       (1) "Each listening end point has a fixed length queue of connections that have been
+*                            accepted by TCP (i.e., the three-way handshake is complete), but not yet accepted
+*                            by the application."
+*
+*                       (2) "The application specifies a limit to this queue, commonly called the backlog" :
+*
+*                           (A) "This backlog must be between 0 and 5, inclusive."
+*                           (B) "(Most applications specify the maximum value of 5.)"
+*
+*                       (3) "When a connection request arrives (i.e., the SYN segment), ... the current number
+*                            of connections already queued for this listening end point [is checked] to see
+*                            whether to accept the connection or not."
+*
+*                       (4) "If there is room on this listening end point's queue for this new connection, ...
+*                            the TCP module ACKs the SYN and completes the connection."
+*
+*                       (5) "If there is not room on the queue for the new connection" :
+*
+*                           (A) "TCP just ignores the received SYN."
+*                           (B) "Nothing is sent back (i.e., no RST segment)."
+*
+*                   (b) (A) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 15.9, Page 455
+*                           reiterates that :
+*
+*                           (2) A "listen ... socket ... specifies a limit on the number of connections that can
+*                               be queued on the socket," ...
+*
+*                           (5) "after which the socket layer refuses to queue additional connection requests.
+*                                When this occurs, TCP ignores incoming connection requests."
+*
+*                       (B) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 28.2, Page 930
+*                           also states that :
+*
+*                           (5) (A) "By silently dropping the segment" ...
+*                               (B) "and not replying with an RST,"    ...
+*                               (C) "The client's connection request should time out, causing the client to
+*                                    retransmit the SYN."
+*
+*                       (C) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 18.11, Pages 259-260
+*                           summarizes that :
+*
+*                           (5) (A) "TCP ignores the incoming SYN when the queue is full," ...
+*                               (B) "and doesn't respond with an RST,"                     ...
+*
+*                               (C) (1) "because ... this condition could change in a short while ... [and] by
+*                                        ignoring the SYN, the server forces the client TCP to re-transmit the
+*                                        SYN later, hoping that the queue will then have room for the new
+*                                        connection".
+*
+*                                   (2) Whereas page 259-260 counters that "if the server's TCP responded with
+*                                       a reset, the client's active open would abort".
+*
+*                   See also 'net_sock.c  NetSock_ListenQ_IsAvail()  Note #2'.
+*
+*               (2) The 'NET_CONN_CFG_FAMILY' pre-processor 'else'-conditional code will never be compiled/linked
+*                   since 'net_conn.h' ensures that the family type configuration constant (NET_CONN_CFG_FAMILY)
+*                   is configured with an appropriate family type value (see 'net_conn.h  CONFIGURATION ERRORS').
+*                   The 'else'-conditional code is included for completeness & as an extra precaution in case
+*                   'net_conn.h' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  NetTCP_RxPktConnHandlerListenQ_IsAvail (NET_TCP_CONN  *p_conn,
+                                                             NET_ERR       *p_err)
+{
+    NET_CONN_ID  conn_id;
+    NET_CONN_ID  conn_id_app;
+    CPU_BOOLEAN  q_avail;
+    NET_ERR      err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------- VALIDATE TCP CONN STATE -------------- */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+             return (DEF_NO);
+
+
+        case NET_TCP_CONN_STATE_LISTEN:
+             break;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_OP;
+             return (DEF_NO);
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+             return (DEF_NO);
+    }
+#endif
+
+
+    conn_id     = p_conn->ID_Conn;
+    conn_id_app = NetConn_ID_AppGet(conn_id, p_err);            /* Get TCP listen conn's app conn id.                   */
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return (DEF_NO);
+    }
+    if (conn_id_app == NET_CONN_ID_NONE) {
+       *p_err =  NET_TCP_ERR_INVALID_CONN_ID;
+        return (DEF_NO);
+    }
+
+
+                                                                /* -------------- CHK APP LISTEN Q AVAIL -------------- */
+    if (p_conn->FnctAppListenQ_IsAvail != DEF_NULL) {
+        q_avail = p_conn->FnctAppListenQ_IsAvail(conn_id_app, &err);
+    } else {
+       *p_err = NET_TCP_ERR_INVALID_CONN;
+        return (DEF_NO);
+    }
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (q_avail);
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_RxPktConnHandlerSignalConn()
+*
+* Description : (1) Signal application layer that TCP/transport layer connection's state is now connected :
+*
+*                   (a) From passive SYN-RECEIVED             state,  signal application layer that
+*                             connection request received; connection accept now available.
+*
+*                   (b) From active  SYN-RECEIVED or SYN-SENT states, signal application layer that
+*                             connection request complete.
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandlerSyncRxd(),
+*                                                 NetTCP_RxPktConnHandlerSyncTxd().
+*
+*               state       Current TCP connection state at time of connection signal.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    Application layer successfully signaled.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAIL               Application layer signal failed.
+*                               NET_TCP_ERR_INVALID_CONN_ID         Invalid application connection.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*
+*                                                                   --- RETURNED BY NetConn_ID_AppGet() : ----
+*                                                                   - RETURNED BY NetConn_ID_AppCloneGet() : -
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSyncRxd(),
+*               NetTCP_RxPktConnHandlerSyncTxd().
+*
+* Note(s)     : (2) The 'NET_CONN_CFG_FAMILY' pre-processor 'else'-conditional code will never be compiled/linked
+*                   since 'net_conn.h' ensures that the family type configuration constant (NET_CONN_CFG_FAMILY)
+*                   is configured with an appropriate family type value (see 'net_conn.h  CONFIGURATION ERRORS').
+*                   The 'else'-conditional code is included for completeness & as an extra precaution in case
+*                   'net_conn.h' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerSignalConn (NET_TCP_CONN        *p_conn,
+                                                 NET_TCP_CONN_STATE   state,
+                                                 NET_ERR             *p_err)
+{
+    NET_CONN_ID  conn_id;
+    NET_CONN_ID  conn_id_app;
+    NET_ERR      err;
+    CPU_BOOLEAN  err_conn;
+
+
+    conn_id = p_conn->ID_Conn;
+
+                                                                /* ------------------- SIGNAL CONN -------------------- */
+    switch (state) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:               /* See Note #1a.                                        */
+                                                                /* Get app conn id clone.                               */
+             conn_id_app = NetConn_ID_AppCloneGet(conn_id, p_err);
+             if (*p_err != NET_CONN_ERR_NONE) {
+                  return;
+             }
+             if (conn_id_app == NET_CONN_ID_NONE) {
+                *p_err = NET_TCP_ERR_INVALID_CONN_ID;
+                 return;
+             }
+                                                                /* Signal app conn accept.                              */
+#ifdef  NET_IP_MODULE_EN
+
+             NetSock_ConnSignalAccept((NET_SOCK_ID) conn_id_app,
+                                      (NET_CONN_ID) conn_id,
+                                      (NET_ERR   *)&err);
+            *p_err = (err == NET_SOCK_ERR_NONE) ? NET_TCP_ERR_NONE
+                                               : NET_TCP_ERR_CONN_FAIL;
+
+#else                                                           /* See Note #2.                                         */
+            (void)&err;                                         /* Prevent 'variable unused' compiler warning.          */
+            *p_err = NET_CONN_ERR_INVALID_FAMILY;
+             return;
+#endif
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+             break;
+
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:                /* See Note #1b.                                        */
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+                                                                /* Get app conn id.                                     */
+             conn_id_app = NetConn_ID_AppGet(conn_id, p_err);
+             if (*p_err != NET_CONN_ERR_NONE) {
+                  return;
+             }
+             if (conn_id_app == NET_CONN_ID_NONE) {
+                *p_err = NET_TCP_ERR_INVALID_CONN_ID;
+                 return;
+             }
+                                                                /* Signal app conn req.                                 */
+#ifdef  NET_IP_MODULE_EN
+             NetSock_ConnSignalReq((NET_SOCK_ID) conn_id_app,
+                                   (NET_ERR   *)&err);
+            *p_err = (err == NET_SOCK_ERR_NONE) ? NET_TCP_ERR_NONE
+                                               : NET_TCP_ERR_CONN_FAIL;
+
+#else                                                           /* See Note #2.                                         */
+            (void)&err;                                         /* Prevent 'variable unused' compiler warning.          */
+            *p_err = NET_CONN_ERR_INVALID_FAMILY;
+             return;
+#endif
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+             break;
+
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:                       /* See Notes #1a & #1b.                                 */
+                                                                /* Get app conn id.                                     */
+             err_conn    = DEF_NO;
+             conn_id_app = NetConn_ID_AppGet(conn_id, p_err);
+             if (*p_err != NET_CONN_ERR_NONE) {
+                 err_conn = DEF_YES;
+             }
+             if (conn_id_app == NET_CONN_ID_NONE) {
+                 err_conn = DEF_YES;
+             }
+
+             if (err_conn == DEF_YES) {                         /* If app conn id get failed, get app conn id clone.    */
+                 conn_id_app = NetConn_ID_AppCloneGet(conn_id, p_err);
+                 if (*p_err != NET_CONN_ERR_NONE) {
+                      return;
+                 }
+                 if (conn_id_app == NET_CONN_ID_NONE) {
+                    *p_err = NET_TCP_ERR_INVALID_CONN_ID;
+                     return;
+                 }
+             }
+
+#ifdef  NET_IP_MODULE_EN
+                                                                /* Signal app conn req.                                 */
+             NetSock_ConnSignalReq((NET_SOCK_ID) conn_id_app,
+                                   (NET_ERR   *)&err);
+            *p_err = (err == NET_SOCK_ERR_NONE) ? NET_TCP_ERR_NONE
+                                               : NET_TCP_ERR_CONN_FAIL;
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+
+                                                                /* Signal app conn accept.                              */
+             NetSock_ConnSignalAccept((NET_SOCK_ID) conn_id_app,
+                                      (NET_CONN_ID) conn_id,
+                                      (NET_ERR   *)&err);
+            *p_err = (err == NET_SOCK_ERR_NONE) ? NET_TCP_ERR_NONE
+                                               : NET_TCP_ERR_CONN_FAIL;
+
+#else                                                           /* See Note #2.                                         */
+            (void)&err;                                         /* Prevent 'variable unused' compiler warning.          */
+            *p_err = NET_CONN_ERR_INVALID_FAMILY;
+             return;
+#endif
+
+             if (*p_err != NET_TCP_ERR_NONE) {
+                  return;
+             }
+             break;
+
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_RxPktConnHandlerSignalClose()
+*
+* Description : Signal application layer that TCP/transport layer connection's state is now closed.
+*
+* Argument(s) : p_conn           Pointer to a TCP connection.
+*               -----           Argument validated in NetTCP_TxConnReqClose(),
+*                                                     NetTCP_RxPktConnHandlerFinWait1(),
+*                                                     NetTCP_RxPktConnHandlerClosing(),
+*                                                     NetTCP_RxPktConnHandlerLastAck().
+*
+*               data_avail      Indicate whether application data is still available on the TCP connection's
+*                                   application receive queue :
+*
+*                                   DEF_YES                         Application data is     available on the
+*                                                                       closing TCP connection's application
+*                                                                       receive queue.
+*                                   DEF_NO                          Application data is NOT available for the
+*                                                                       closing TCP connection's application
+*                                                                       receive queue.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    Application layer successfully signaled.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAIL               Application layer signal failed.
+*                               NET_TCP_ERR_INVALID_CONN_ID         Invalid application connection.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid network connection family.
+*
+*                                                                   -- RETURNED BY NetConn_ID_AppGet() : ---
+*                               NET_CONN_ERR_INVALID_CONN           Invalid network connection number.
+*                               NET_CONN_ERR_NOT_USED               Network connection NOT currently used.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnReqClose(),
+*               NetTCP_RxPktConnHandlerFinWait1(),
+*               NetTCP_RxPktConnHandlerClosing(),
+*               NetTCP_RxPktConnHandlerLastAck().
+*
+* Note(s)     : (1) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                       FIN-WAIT-2 STATE' states that "if the retransmission queue is empty, the user's
+*                       CLOSE can be acknowledged".
+*
+*                   (b) However, TCP connection should signal the application layer that "the user's close
+*                       [is] acknowledged" whenever its re-transmit queue becomes &/or is empty :
+*
+*                       (1) Transition from LISTEN     to CLOSED
+*                       (2) Transition from SYN-SENT   to CLOSED
+*
+*                       (3) Transition from FIN-WAIT-1 to ...           See also 'NetTCP_RxPktConnHandlerFinWait1()
+*                                                                                    Note #2d2B2'
+*                           (A) FIN-WAIT-2
+*                           (B) TIME-WAIT
+*
+*                       (4) Transition from CLOSING    to TIME-WAIT     See also 'NetTCP_RxPktConnHandlerClosing()
+*                                                                                    Note #2d2B2a2'
+*
+*                       (5) Transition from LAST-ACK   to CLOSED
+*
+*               (2) Once an application connection has been signaled of its close, the application connection is
+*                   responsible for closing its remaining connection(s).
+*
+*                   See also 'NetTCP_ConnCloseHandler()  Note #2b1B'.
+*
+*               (3) The 'NET_CONN_CFG_FAMILY' pre-processor 'else'-conditional code will never be compiled/linked
+*                   since 'net_conn.h' ensures that the family type configuration constant (NET_CONN_CFG_FAMILY)
+*                   is configured with an appropriate family type value (see 'net_conn.h  CONFIGURATION ERRORS').
+*                   The 'else'-conditional code is included for completeness & as an extra precaution in case
+*                   'net_conn.h' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktConnHandlerSignalClose (NET_TCP_CONN  *p_conn,
+                                                  CPU_BOOLEAN    data_avail,
+                                                  NET_ERR       *p_err)
+{
+    NET_CONN_ID  conn_id;
+    NET_CONN_ID  conn_id_app;
+    NET_ERR      err;
+
+                                                                /* Get conn id's.                                       */
+    conn_id     = p_conn->ID_Conn;
+    conn_id_app = NetConn_ID_AppGet(conn_id, p_err);
+    if (*p_err != NET_CONN_ERR_NONE) {
+         return;
+    }
+
+    if (conn_id_app == NET_CONN_ID_NONE) {
+       *p_err = NET_TCP_ERR_INVALID_CONN_ID;
+        return;
+    }
+
+
+                                                                /* ------------- VALIDATE TCP CONN STATE -------------- */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_LISTEN:                         /* See Note #1b1.                                       */
+        case NET_TCP_CONN_STATE_SYNC_TXD:                       /* See Note #1b2.                                       */
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:                     /* See Note #1b3.                                       */
+        case NET_TCP_CONN_STATE_CLOSING:                        /* See Note #1b4.                                       */
+        case NET_TCP_CONN_STATE_LAST_ACK:                       /* See Note #1b5.                                       */
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        case NET_TCP_CONN_STATE_CLOSED:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+
+
+                                                                /* ------------------- SIGNAL CLOSE ------------------- */
+#ifdef  NET_IP_MODULE_EN
+                                                                /* Signal app conn close.                               */
+    NetSock_ConnSignalClose((NET_SOCK_ID) conn_id_app,
+                            (CPU_BOOLEAN) data_avail,
+                            (NET_ERR   *)&err);
+   *p_err = (err == NET_SOCK_ERR_NONE) ? NET_TCP_ERR_NONE
+                                      : NET_TCP_ERR_CONN_FAIL;
+
+#else                                                           /* See Note #3.                                         */
+   (void)&data_avail;                                           /* Prevent 'variable unused' compiler warnings.         */
+   (void)&err;
+   *p_err = NET_CONN_ERR_INVALID_FAMILY;
+    return;
+#endif
+
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+
+                                                                /* Clr app close flag; ...                              */
+    p_conn->ConnCloseAppFlag = DEF_NO;                          /* ... app closes rem'ing conn(s) [see Note #2].        */
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_RxPktConnIsValidSeq()
+*
+* Description : Validate a received segment's sequence number with current TCP connection.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    Sequence number successfully validated;
+*                                                                       check return value.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+* Return(s)   : NET_TCP_CONN_RX_SEQ_INVALID,      if received sequence number invalid for the TCP connection.
+*
+*               NET_TCP_CONN_RX_SEQ_VALID,        if received sequence number   valid for the TCP connection.
+*
+*               NET_TCP_CONN_RX_SEQ_SYNC_INVALID, if received sequence number is an invalid synchronization
+*                                                    for the TCP connection.
+*
+*               NET_TCP_CONN_RX_SEQ_SYNC,         if received sequence number is a    valid synchronization
+*                                                    for the TCP connection.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) Validate received TCP connection sequence numbers :
+*
+*                       (A) Some TCP receive sequence number validation logic implemented in previous
+*                           functions; include duplicate validation logic in NetTCP_RxPktConnIsValidSeq()
+*                           only if debug/validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_DBG_EN is
+*                           DEF_ENABLED in 'net_cfg.h').
+*
+*                   (a) RFC #793, Section 3.4 'Establishing a Connection : Reset Generation : 1' states
+*                       that "if [a] connection [is] ... CLOSED then a reset is sent in response to any
+*                       incoming segment".  Thus ALL received segments are invalid.
+*
+*                   (b) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN [State]' :
+*
+*                       (1) "If the SYN bit is set ... the connection state should be changed to SYN-
+*                            RECEIVED ... and any other control or text should be queued for processing
+*                            later ... Note that any other incoming control or data ... will be processed
+*                            in the SYN-RECEIVED state."
+*
+*                           Therefore, the ONLY TCP segment data that may be queued in the LISTEN state
+*                           MUST be received in a TCP connection request segment.
+*
+*                       (2) Otherwise "any other control or text-bearing segment (not containing SYN)
+*                           must have an ACK and thus would be discarded by the ACK processing ...
+*                           [so] drop the segment".
+*
+*                   (c) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                       Check SYN Bit' :
+*
+*                       (1) "If ... our SYN has been ACKed ... change the connection state to
+*                            ESTABLISHED ... [and] if there are other controls or text in the
+*                            segment then continue processing" as for the ESTABLISHED state
+*                            (see Note #1d).
+*
+*                       (2) "Otherwise enter SYN-RECEIVED ... [and] if there are other controls or
+*                            text in the segment, queue them for processing after the ESTABLISHED
+*                            state has been reached."
+*
+*                       (3) Otherwise "if neither the SYN or RST bits is set then drop the segment".
+*
+*                           Therefore, the ONLY TCP segment data that may be queued in the SYN-SENT
+*                           state MUST be received in a TCP connection request segment.
+*
+*                   (d) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence
+*                       Number' states that for the "SYN-RECEIVED STATE, ESTABLISHED STATE, FIN-
+*                       WAIT-1 STATE, FIN-WAIT-2 STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK
+*                       STATE, TIME-WAIT STATE ... there are four cases for the acceptability test
+*                       for an incoming segment :
+*
+*                                      Local
+*                            Segment  Receive
+*                            Length   Window   Test
+*                            -------  -------  -------------------------------------------------------
+*
+*                       (1)     0        0        SEG.SEQ =  RCV.NXT
+*
+*                       (2)     0       >0        RCV.NXT =< SEG.SEQ               < RCV.NXT + RCV.WND
+*
+*                       (3)    >0        0        not acceptable
+*
+*                       (4)    >0       >0        RCV.NXT =< SEG.SEQ               < RCV.NXT + RCV.WND
+*                                              or RCV.NXT =< SEG.SEQ + SEG.LEN - 1 < RCV.NXT + RCV.WND
+*
+*
+*                       If the RCV.WND is zero, no segments will be acceptable, but special allowance
+*                       should be made to accept valid ACKs ... and RSTs.
+*
+*                       If an incoming segment is not acceptable, an acknowledgment should be sent in
+*                       reply".
+*
+*                       See also Note #2.
+*
+*                   (e) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN Bit'
+*                       states that in the "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT STATE-1,
+*                       FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-WAIT
+*                       STATE ... if the SYN is in the window it is an error, send a reset, any
+*                       outstanding RECEIVEs and SEND[s] should receive 'reset' responses, all segment
+*                       queues should be flushed, the user should also receive an unsolicited general
+*                      'connection reset' signal[, and] enter the CLOSED state".
+*
+*               (2) RFC #793 does NOT provide nor suggest any logic to determine/handle sequence number
+*                   comparisons for sequence number windows that overflow the sequence number space.
+*
+*                   (a) For example, the next sequence octet to receive (RCV.NXT) is typically less than
+*                       or equal to  the next received sequence octet (SEG.SEQ) :
+*
+*                           (1) RCV.NXT <= SEG.SEQ
+*
+*                       SEG.SEQ itself is also typically less than RCV.NXT plus the current receive window
+*                       size (RCV.WND) :
+*
+*                           (2) SEG.SEQ < (RCV.NXT + RCV.WND)
+*
+*                       However, if (RCV.NXT + RCV.WND) or SEG.SEQ overflows the sequence number space,
+*                       these values will be MUCH less than SEG.SEQ or RCV.NXT, respectively, until
+*                       SEG.SEQ & RCV.NXT also overflow :
+*
+*                           (3) RCV.NXT + RCV.WND << RCV.NXT
+*                                                 << SEG.SEQ
+*
+*                           (4) SEG.SEQ           << RCV.NXT
+*
+*                   (b) Therefore, in order to validate a received segment's sequence value as within the
+*                       TCP connection's current receive window, one of the following unsigned arithmetic
+*                       comparisons MUST be true :
+*
+*                           (1) (A) (RCV.NXT + RCV.WND) -  SEG.SEQ       <=  (RCV.NXT + RCV.WND) - RCV.NXT
+*
+*                               (B) (RCV.NXT + RCV.WND) -  SEG.SEQ       <=             RCV.WND
+*
+*                               (C) (RCV.NXT + RCV.WND) -  SEG.SEQ - 1   <   RCV.WND
+*
+*                               (D) (RCV.NXT + RCV.WND) - (SEG.SEQ + 1)  <   RCV.WND
+*
+*                                   (a) Comparison #2b1C's left-hand side decremented by one to modify the
+*                                       conditional test from less-than-or-equal-to to just less-than in
+*                                       order to satisfy the exact boundary conditions shown in the incoming
+*                                       segment acceptability test comparisons (see Notes #1d2 & #1d4).
+*
+*                           (2) Substituting (SEG.SEQ + SEG.LEN - 1) into SEG.SEQ :
+*
+*                               (A) (RCV.NXT + RCV.WND)  -  (SEG.SEQ + SEG.LEN - 1 + 1)  <  RCV.WND
+*
+*                               (B) (RCV.NXT + RCV.WND)  -  (SEG.SEQ + SEG.LEN)          <  RCV.WND
+*
+*                   (c) In order to determine if a received segment's sequence value is within but NOT
+*                       following a closing TCP connection's last valid receive sequence numbers, the
+*                       following unsigned arithmetic comparison MUST be checked :
+*
+*                           (1)  RX.LAST  - (SEG.SEQ + SEG.LEN)  <=  (RX.LAST - RX.NXT)
+*********************************************************************************************************
+*/
+
+static  NET_TCP_SEQ_CODE  NetTCP_RxPktConnIsValidSeq (NET_TCP_CONN  *p_conn,
+                                                      NET_BUF_HDR   *p_buf_hdr,
+                                                      NET_ERR       *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_TCP_ACK_CODE  ack_code;
+#endif
+    NET_TCP_SEQ_CODE  seq_code;
+    NET_TCP_SEQ_NBR   seq_nbr;
+    NET_TCP_SEQ_NBR   seq_win;
+    NET_TCP_SEQ_NBR   seq_win_next;
+    NET_TCP_SEQ_NBR   seq_win_delta;
+
+
+   *p_err     = NET_TCP_ERR_NONE;
+    seq_code = NET_TCP_CONN_RX_SEQ_INVALID;
+
+    if (p_conn != DEF_NULL) {
+        switch (p_conn->ConnState) {
+            case NET_TCP_CONN_STATE_FREE:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+                *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+                 return (NET_TCP_CONN_RX_SEQ_INVALID);
+
+
+            case NET_TCP_CONN_STATE_CLOSED:                     /* See Note #1a.                                        */
+                 break;
+
+
+            case NET_TCP_CONN_STATE_LISTEN:                     /* See Note #1b.                                        */
+                 if (p_buf_hdr->TCP_SegSync == DEF_YES) {       /* If sync rx'd, ..                                     */
+                     seq_code = NET_TCP_CONN_RX_SEQ_SYNC;       /* .. sync's seq nbr valid (see Note #1b1).             */
+                 }
+                 break;
+
+
+            case NET_TCP_CONN_STATE_SYNC_TXD:                   /* See Note #1c.                                        */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #1A.                                        */
+                 ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+                 if (*p_err != NET_TCP_ERR_NONE) {
+                      return (NET_TCP_CONN_RX_SEQ_INVALID);
+                 }
+                 if (!((ack_code == NET_TCP_CONN_RX_ACK_VALID) ||
+                       (ack_code == NET_TCP_CONN_RX_ACK_NONE))) {
+                     return (NET_TCP_CONN_RX_SEQ_INVALID);
+                 }
+#endif
+                 if (p_buf_hdr->TCP_SegSync == DEF_YES) {       /* If valid sync rx'd, ..                               */
+                     seq_code = NET_TCP_CONN_RX_SEQ_SYNC;       /* .. sync's seq nbr valid.                             */
+                 }
+                 break;
+
+
+            case NET_TCP_CONN_STATE_SYNC_RXD:                   /* See Notes #1d & #1e.                                 */
+            case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+            case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+            case NET_TCP_CONN_STATE_CONN:
+            case NET_TCP_CONN_STATE_FIN_WAIT_1:
+            case NET_TCP_CONN_STATE_FIN_WAIT_2:
+            case NET_TCP_CONN_STATE_CLOSING:
+            case NET_TCP_CONN_STATE_TIME_WAIT:
+            case NET_TCP_CONN_STATE_CLOSE_WAIT:
+            case NET_TCP_CONN_STATE_LAST_ACK:
+                 if (p_buf_hdr->TCP_SegSync != DEF_NO) {        /* If sync rx'd, ...                                    */
+                     return (NET_TCP_CONN_RX_SEQ_SYNC_INVALID); /* ... rtn invalid sync (see Note #1e).                 */
+                 }
+
+                 if (p_conn->RxWinSizeActual > 0) {             /* If rx win size > 0, ...                              */
+                                                                /* ... chk for seg seq within rx win.                   */
+                     switch (p_conn->RxQ_State) {
+                         case NET_TCP_RX_Q_STATE_SYNC:
+                         case NET_TCP_RX_Q_STATE_CONN:
+                              seq_win_next  = (NET_TCP_SEQ_NBR)(p_conn->RxSeqNbrNext  + p_conn->RxWinSizeActual);
+                              seq_nbr       = (NET_TCP_SEQ_NBR)(p_buf_hdr->TCP_SeqNbr + 1u);
+                              seq_win_delta = (NET_TCP_SEQ_NBR)(seq_win_next         - seq_nbr);
+
+                              if (seq_win_delta == p_conn->RxWinSizeActual) {
+                                                                /* Keep-Alive message received.                         */
+                                  seq_code = NET_TCP_CONN_RX_SEQ_KEEP_ALIVE;
+                              } else if (seq_win_delta < p_conn->RxWinSizeActual) {
+                                                                /* If [(next + win) -     seq    ] < win size,          */
+                                  seq_code = NET_TCP_CONN_RX_SEQ_VALID; /* .. seq nbr within rx win (see Note #1d2).    */
+
+                              } else if (p_buf_hdr->TCP_SegLen > 0) {
+                                  seq_nbr       = (NET_TCP_SEQ_NBR)(p_buf_hdr->TCP_SeqNbr + p_buf_hdr->TCP_SegLen);
+                                  seq_win_delta = (NET_TCP_SEQ_NBR)(seq_win_next         - seq_nbr);
+                                                                /* If [(next + win) - (seq + len)] < win size,          */
+                                  if (seq_win_delta < p_conn->RxWinSizeActual) {
+                                                                /* .. seq nbr within rx win (see Note #1d4).            */
+                                      seq_code = NET_TCP_CONN_RX_SEQ_VALID;
+                                  }
+                              } else {
+                                  ;
+                              }
+                              break;
+
+
+                         case NET_TCP_RX_Q_STATE_CLOSED:
+                         case NET_TCP_RX_Q_STATE_CLOSING:
+                              seq_win_next  = (NET_TCP_SEQ_NBR) p_conn->RxSeqNbrLast;
+                              seq_nbr       = (NET_TCP_SEQ_NBR)(p_buf_hdr->TCP_SeqNbr + p_buf_hdr->TCP_SegLen);
+                              seq_win_delta = (NET_TCP_SEQ_NBR)(seq_win_next         - seq_nbr);
+                              seq_win       = (NET_TCP_SEQ_NBR)(p_conn->RxSeqNbrLast  - p_conn->RxSeqNbrNext);
+                              if (seq_win_delta <= seq_win) {   /* If [last - (seq + len)] <= [last - next], ..         */
+                                  seq_code = NET_TCP_CONN_RX_SEQ_VALID; /* .. seq nbr within close win (see Note #2c1). */
+                              }
+                              break;
+
+
+                         case NET_TCP_RX_Q_STATE_NONE:
+                         default:
+                              return (NET_TCP_CONN_RX_SEQ_INVALID);
+                     }
+
+                 } else {                                       /* Else chk for valid, zero-len seg.                    */
+                     if (p_buf_hdr->TCP_SegLenData > 0) {       /* If seg len > 0, ...                                  */
+                        *p_err =  NET_TCP_ERR_INVALID_LEN_SEG;  /* ... rtn invalid seg len (see Note #1d3).             */
+                         return (NET_TCP_CONN_RX_SEQ_INVALID);
+                     }
+
+                     if (p_buf_hdr->TCP_SeqNbr == p_conn->RxSeqNbrNext) { /* If seq nbr equals next rx seq expected, .. */
+                         seq_code = NET_TCP_CONN_RX_SEQ_VALID;  /* .. seq nbr valid (see Note #1d1).                    */
+                     }
+                 }
+                 break;
+
+
+            case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+                 break;
+
+
+            case NET_TCP_CONN_STATE_NONE:
+            default:
+                 NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+                *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+                 return (NET_TCP_CONN_RX_SEQ_INVALID);
+        }
+    }
+
+    return (seq_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_RxPktConnIsValidAck()
+*
+* Description : Validate a received segment's acknowledgement number with current TCP connection.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    Acknowledgement number successfully
+*                                                                       validated; check return value.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*
+* Return(s)   : NET_TCP_CONN_RX_ACK_INVALID, if    received acknowledgement number invalid for the TCP connection.
+*
+*               NET_TCP_CONN_RX_ACK_VALID,   if    received acknowledgement number   valid for the TCP connection.
+*
+*               NET_TCP_CONN_RX_ACK_NONE,    if NO received acknowledgement number.
+*
+*               NET_TCP_CONN_RX_ACK_DUP,     if    received acknowledgement number is a          duplicate for the
+*                                               TCP connection.
+*
+*               NET_TCP_CONN_RX_ACK_PREV,    if    received acknowledgement number is a previous duplicate for the
+*                                               TCP connection.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) Validate received TCP connection acknowledgements :
+*
+*                   (a) RFC #793, Section 3.4 'Establishing a Connection : Reset Generation : 1' states
+*                       that "if [a] connection [is] ... CLOSED then a reset is sent in response to any
+*                       incoming segment".  Thus ALL received segments, including acknowledgement
+*                       segments, are invalid.
+*
+*                   (b) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN [State] :
+*                       Check for ACK' states that "any acknowledgment is bad if it arrives on a
+*                       connection still in the LISTEN state".
+*
+*                   (c) (1) The following sections generalize that "if SND.UNA < SEG.ACK =< SND.NXT then
+*                           the ACK is acceptable", whereas "if SEG.ACK =< SND.UNA, or SEG.ACK > SND.NXT"
+*                           then the acknowledgement is unacceptable :
+*
+*                           (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT
+*                                   [State] : Check ACK Bit'
+*                           (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK
+*                                   Field : SYN-RECEIVED STATE'
+*                           (C) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK
+*                                   Field : ESTABLISHED  STATE'
+*
+*                           Including states with similar "processing as for the ESTABLISHED STATE" (see
+*                           RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field') :
+*
+*                           (D) FIN-WAIT-1 STATE
+*                           (E) FIN-WAIT-2 STATE
+*                           (F) CLOSING    STATE
+*                           (G) CLOSE-WAIT STATE
+*
+*                           See also Note #3a.
+*
+*                       (2) However, RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT
+*                           [State] : Check SYN Bit' also states to "check the SYN bit ... if the ACK is
+*                           ok, or there is no ACK".
+*
+*                           Therefore, the lack of an acknowledgement in the SYN-SENT state is acceptable.
+*
+*                       (3) However, RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check
+*                           ACK Field : ESTABLISHED STATE' also states that in the "ESTABLISHED STATE"
+*                           or any state with similar "processing as for the ESTABLISHED STATE ... if
+*                           the ACK is a duplicate (SEG.ACK =< SND.UNA), it can be ignored".
+*
+*                           See also Note #3b.
+*
+*                   (d) (1) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                               TIME-WAIT STATE' states that "the only thing that can arrive in this state is
+*                               a retransmission of the remote FIN".
+*
+*                           (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                               LAST-ACK STATE' states that "the only thing that can arrive in this state is
+*                               an acknowledgement of our FIN".
+*
+*                       (2) However, it is possible that some but NOT all transmitted data has been received
+*                           by the remote host.  In other words, the remote host may have received some but
+*                           NOT ALL transmitted data preceding this host's connection close request.
+*
+*                           Therefore, acknowledgements validated by as within the transmit window MUST
+*                           be received & processed as in connected states.
+*
+*               (2) RFC #793 contains multiple errors/inconsistencies regarding the boundary conditions
+*                   of TCP sequence/acknowledgement inequalities -- i.e. some of the expressions incorrectly
+*                   include or exclude the equality condition.
+*
+*                   RFC #1122, Section 4.2.2.20 corrects some but NOT all of these errors/inconsistencies.
+*
+*               (3) RFC #793 does NOT provide nor suggest any logic to determine/handle sequence number
+*                   comparisons for sequence number windows that overflow the sequence number space.
+*
+*                   (a) (1) For example, the next sequence octet to transmit (SND.NXT) is typically greater
+*                           than or equal to the last unacknowledged transmit sequence octet (SND.UNA) :
+*
+*                               (A) SND.NXT >= SND.UNA
+*
+*                           However, when SND.NXT overflows the sequence number space, it will be MUCH less
+*                           than SND.UNA until SND.UNA also overflows :
+*
+*                               (B) SND.NXT << SND.UNA
+*
+*                       (2) Therefore, in order to validate a received segment's acknowledgement value
+*                           (SEG.ACK) as within the TCP connection's current transmit acknowledgement
+*                           window, the following unsigned arithmetic comparison MUST be true :
+*
+*                               (A) (SND.NXT - SEG.ACK)  <  (SND.NXT - SND.UNA)
+*
+*                   (b) (1) Typically, duplicate acknowledgements are less than or equal to the last
+*                           unacknowledged transmit sequence octet (SND.UNA) :
+*
+*                               (A) SEG.ACK <= SND.UNA
+*
+*                           However, when SND.UNA overflows the sequence number space, it will be MUCH less
+*                           than duplicate acknowledgements until these duplicates also overflow :
+*
+*                               (B) SEG.ACK >> SND.UNA
+*
+*                       (2) Therefore, in order to validate SEG.ACK as a recent duplicate acknowledgement
+*                           for the TCP connection's current transmit acknowledgement window, the following
+*                           unsigned arithmetic comparison MUST be true :
+*
+*                               (A) (SND.UNA - SEG.ACK)  <=  (WIN_SIZE_SCALE * TxWinSizeRemote)
+*
+*                                       where
+*
+*                                           WIN_SIZE_SCALE          is some window-size scalar multiplier
+*                                           TxWinSizeRemote         is the remote host's last-advertised
+*                                                                       receive window size, which is this
+*                                                                       host's transmit remote window size
+*********************************************************************************************************
+*/
+
+static  NET_TCP_ACK_CODE  NetTCP_RxPktConnIsValidAck (NET_TCP_CONN  *p_conn,
+                                                      NET_BUF_HDR   *p_buf_hdr,
+                                                      NET_ERR       *p_err)
+{
+    NET_TCP_ACK_CODE  ack_code;
+    NET_TCP_SEQ_NBR   ack_delta_next;
+    NET_TCP_SEQ_NBR   ack_delta_unackd;
+    NET_TCP_SEQ_NBR   ack_win;
+    NET_TCP_SEQ_NBR   ack_dup_win;
+
+
+   *p_err     = NET_TCP_ERR_NONE;
+    ack_code = NET_TCP_CONN_RX_ACK_INVALID;
+
+    if (p_conn != DEF_NULL) {
+        switch (p_conn->ConnState) {
+            case NET_TCP_CONN_STATE_FREE:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+                *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+                 return (NET_TCP_CONN_RX_ACK_INVALID);
+
+
+            case NET_TCP_CONN_STATE_CLOSED:                     /* See Note #1a.                                        */
+            case NET_TCP_CONN_STATE_LISTEN:                     /* See Note #1b.                                        */
+                 if (p_buf_hdr->TCP_SegAck != DEF_NO) {         /* If ack rx'd, ...                                     */
+                     return (NET_TCP_CONN_RX_ACK_INVALID);      /* ... rtn invalid ack.                                 */
+                 }
+                 ack_code = NET_TCP_CONN_RX_ACK_NONE;
+                 break;
+
+
+            case NET_TCP_CONN_STATE_SYNC_TXD:
+                 if (p_buf_hdr->TCP_SegAck == DEF_NO) {         /* If NO ack rx'd, ...                                  */
+                     return (NET_TCP_CONN_RX_ACK_NONE);         /* ... rtn valid ack (see Note #1c2).                   */
+                 }
+                                                                /* 'break' intentionally omitted; MUST execute ...      */
+                                                                /* ...  the following case (see Note #1c1A) :  ...      */
+                                                                /* -------- ... 'NET_TCP_CONN_STATE_SYNC_RXD'. -------- */
+            case NET_TCP_CONN_STATE_SYNC_RXD:                   /* See Note #1c1B.                                      */
+            case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+            case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+                 if (p_buf_hdr->TCP_SegAck != DEF_YES) {        /* If NO ack rx'd, ...                                  */
+                     return (NET_TCP_CONN_RX_ACK_NONE);         /* ... rtn NO ack.                                      */
+                 }
+
+
+
+                 ack_delta_next = p_conn->TxSeqNbrNext - p_buf_hdr->TCP_AckNbr;
+                 ack_win        = p_conn->TxSeqNbrNext - p_conn->TxSeqNbrUnAckd;
+
+                 if (p_buf_hdr->TCP_SegClose == DEF_YES) {
+                     ack_win++;
+                 }
+
+
+                 if (ack_delta_next < ack_win) {                /* If (next - ack) < ack win, ...                       */
+                     ack_code = NET_TCP_CONN_RX_ACK_VALID;      /* ... ack is within ack win (see Note #3a2A).          */
+                 }
+                 break;
+
+
+            case NET_TCP_CONN_STATE_CONN:                       /* See Note #1c1C.                                      */
+            case NET_TCP_CONN_STATE_FIN_WAIT_1:                 /* See Note #1c1D.                                      */
+            case NET_TCP_CONN_STATE_FIN_WAIT_2:                 /* See Note #1c1E.                                      */
+            case NET_TCP_CONN_STATE_CLOSING:                    /* See Note #1c1F.                                      */
+            case NET_TCP_CONN_STATE_CLOSE_WAIT:                 /* See Note #1c1G.                                      */
+            case NET_TCP_CONN_STATE_TIME_WAIT:                  /* See Note #1d2.                                       */
+            case NET_TCP_CONN_STATE_LAST_ACK:                   /* See Note #1d2.                                       */
+                 if (p_buf_hdr->TCP_SegAck != DEF_YES) {        /* If NO ack rx'd, ...                                  */
+                     return (NET_TCP_CONN_RX_ACK_NONE);         /* ... rtn NO ack.                                      */
+                 }
+
+                 ack_delta_next = p_conn->TxSeqNbrNext - p_buf_hdr->TCP_AckNbr;
+                 ack_win        = p_conn->TxSeqNbrNext - p_conn->TxSeqNbrUnAckd;
+
+                 if (p_buf_hdr->TCP_SegClose == DEF_YES) {
+                     ack_win++;
+                 }
+
+                 if (ack_delta_next < ack_win) {                /* If (next - ack) < ack win, ...                       */
+                     ack_code = NET_TCP_CONN_RX_ACK_VALID;      /* ... ack is within ack win (see Note #3a2A).          */
+
+                 } else {
+                     ack_delta_unackd = p_conn->TxSeqNbrUnAckd - p_buf_hdr->TCP_AckNbr;
+                     if (ack_delta_unackd < 1) {                /* If (unackd - ack) = 0, ...                           */
+                         ack_code = NET_TCP_CONN_RX_ACK_DUP;    /* ... ack is           dup ack.                        */
+                                                                /* ... (see Note  #1c3).                                */
+
+                     } else {
+                         ack_dup_win  = (NET_TCP_SEQ_NBR)(NET_TCP_ACK_NBR_DUP_WIN_SIZE_SCALE * p_conn->TxWinSizeRemote);
+                         if (ack_delta_unackd <= ack_dup_win) { /* If (unackd - ack) <= dup ack win, ...                */
+                             ack_code =  NET_TCP_CONN_RX_ACK_PREV; /* ... ack is recent    dup ack      ...             */
+                                                                /* ... (see Notes #1c3 & #3b2A).                        */
+                         } else {
+                             ack_code =  NET_TCP_CONN_RX_ACK_OTW;
+                         }
+                     }
+                 }
+                 break;
+
+
+            case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+                 break;
+
+
+            case NET_TCP_CONN_STATE_NONE:
+            default:
+                 NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+                *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+                 return (NET_TCP_CONN_RX_ACK_INVALID);
+        }
+    }
+
+    return (ack_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetTCP_RxPktConnIsValidReset()
+*
+* Description : Validate a received segment's reset flag, if any, with current TCP connection.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    Received segment's reset flag successfully
+*                                                                       validated; check return value.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*
+*                                                                   - RETURNED BY NetTCP_RxPktConnIsValidSeq() : -
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+* Return(s)   : NET_TCP_CONN_RX_RESET_INVALID, if    received reset flag invalid for the TCP connection.
+*
+*               NET_TCP_CONN_RX_RESET_VALID,   if    received reset flag   valid for the TCP connection;
+*                                                 i.e. reset the TCP connection.
+*
+*               NET_TCP_CONN_RX_RESET_NONE,    if NO received reset flag.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) See the following RFC's for TCP reset validation summary :
+*
+*                   (a) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing'
+*                   (b) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES'
+*                   (c) RFC Draft-IETF-TCPm-TCPSecure #00, Section 2
+*
+*               (2) Validate received TCP connection resets :
+*
+*                       (A) Some TCP receive reset validation logic implemented in previous functions; include
+*                           duplicate validation logic in NetTCP_RxPktConnIsValidReset() only if debug/validation
+*                           code is enabled (i.e. NET_ERR_CFG_ARG_CHK_DBG_EN is DEF_ENABLED in 'net_cfg.h').
+*
+*                   (a) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : CLOSED [State]' states
+*                           that "if the state is CLOSED ... an incoming segment containing a RST is discarded".
+*
+*                       (2) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN [State]'
+*                               states that if "the state is LISTEN ... an incoming RST should be ignored".
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing' reiterates
+*                               that "if the receiver ... of a RST ... was in the LISTEN state, it ignores it".
+*
+*                       (3) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                               Check RST Bit' states that "if the RST bit is set [and] if the ACK was
+*                               acceptable then ... enter CLOSED state".
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing' reiterates
+*                               that "in the SYN-SENT state (a RST received in response to an initial SYN), the
+*                               RST is acceptable if the ACK field acknowledges the SYN".
+*
+*                               (1) However, since receiving a TCP connection request/synchronization segment
+*                                   with no acknowledgement number in the SYN-SENT state is permitted, then
+*                                   a received TCP reset segment with no acknowledgement number MUST also be
+*                                   acceptable.
+*
+*                           See also Note #2a5C.
+*
+*                       (4) (A) (1) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing'
+*                                   summarizes that "in all states except SYN-SENT, all reset (RST) segments
+*                                   are validated by checking their SEQ-fields.  A reset is valid if its
+*                                   sequence number is in the window".
+*
+*                               (2) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit'
+*                                   reiterates that the received segment's reset is valid if and only if its
+*                                   sequence number is valid since it follows RFC #793, Section 3.9 'Event
+*                                   Processing : SEGMENT ARRIVES : Check Sequence Number'.
+*
+*                               (3) RFC #793, Section 3.3 states "that when the receive window is zero no
+*                                   segments should be acceptable except ACK segments ... However, even when
+*                                   the receive window is zero, a TCP must process the RST ... fields of all
+*                                   incoming segments".
+*
+*                                   However, this contradicts the following sections which state that a
+*                                   "received segment's reset is valid if and only if its sequence number if
+*                                   valid" & that "if an incoming segment is not acceptable ... [and] the RST
+*                                   bit is set, ... drop the segment" :
+*
+*                                   (a) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing'
+*                                   (b) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check
+*                                           Sequence Number'
+*
+*                               See also Note #2a5B.
+*
+*                           (B) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit'
+*                                   states that in the "SYN-RECEIVED STATE" that "if the RST bit is set [and]
+*                                   this connection was initiated with a passive OPEN (i.e., came from the
+*                                   LISTEN state), then return this connection to the LISTEN state ... If this
+*                                   connection was initiated with an active OPEN (i.e., came from SYN-SENT state)
+*                                   then the connection was refused, ... enter the CLOSED state".
+*
+*                               (2) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing'
+*                                   reiterates that "if the receiver ... of a RST ... was in SYN-RECEIVED state
+*                                   and had previously been in the LISTEN state, then the receiver returns to
+*                                   the LISTEN state, otherwise the receiver aborts the connection and goes to
+*                                   the CLOSED state".
+*
+*                               (3) However, since TCP connections opened from the LISTEN state are cloned from
+*                                   the original LISTEN-state TCP connection, it is NOT necessary to return ANY
+*                                   reset TCP connection from the SYN-RECEIVED state back to the LISTEN state.
+*
+*                               See also Note #2a5A.
+*
+*                           (C) (1) RFC #793, Section 3.4 'Establishing a Connection : Reset Processing' states
+*                                   that "if the receiver ... of a RST ... was in any other state [other than
+*                                   LISTEN or SYN-RECEIVED], it aborts the connection and advises the user and
+*                                   goes to the CLOSED state".
+*
+*                               (2) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit'
+*                                   states that in the "ESTABLISHED, FIN-WAIT-1, FIN-WAIT-2, CLOSE-WAIT" states
+*                                   that "if the RST bit is set then, any outstanding RECEIVEs and SEND[s] should
+*                                   receive 'reset' responses.  All segment queues should be flushed.  Users
+*                                   should also receive an unsolicited general 'connection reset' signal[, and]
+*                                   enter the CLOSED state".
+*
+*                               (3) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit'
+*                                   states that in the "CLOSING STATE, LAST-ACK STATE, TIME-WAIT" states that
+*                                   "if the RST bit is set then, enter the CLOSED state".
+*
+*                               See also Note #2a5A.
+*
+*                       (5) (A) RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 amends the "handling of a segment
+*                               with the RST bit when in a synchronized state" to "provide some protection against
+*                                ... blind reset attack[s] using the RST bit" :
+*
+*                               (a) "If the RST bit is set and the sequence number is outside the expected window,
+*                                    silently drop the segment."
+*
+*                               (b) "If the RST bit is exactly the next expected sequence number [sic], reset the
+*                                    connection"; it is assumed that this should read "if the RST bit is set and
+*                                    the sequence number is exactly the next expected sequence number, reset the
+*                                    connection."
+*
+*                               (c) "If the RST bit is set and the sequence number does not exactly match
+*                                    the next expected sequence value, yet is within the acceptable window
+*                                    (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) send an acknowledgment."
+*
+*                           (B) Although RFC Draft-IETF-TCPm-TCPSecure #00 explicitly states that this
+*                               amendment applies only to the "handling of a ... RST ... when in a synchronized
+*                               state", it is assumed that this should also apply to the SYN-RECEIVED state.
+*
+*                           (C) (1) In addition, it is assumed that a similar validation should also
+*                                   apply to the SYN-SENT state.  Since the SYN-SENT state validates a
+*                                   received TCP reset segment based only on the segment's acknowledgement,
+*                                   a similar validation could require that the acknowledgement "exactly
+*                                   match the next expected sequence value" -- i.e. the initial connection
+*                                   synchronization sequence number plus one.
+*
+*                               (2) However, a specific check for the exact acknowledgement is NOT necessary
+*                                   since NO data is transmitted from the SYN-SENT state.  Therefore, the ONLY
+*                                   value to be acknowledged is the initial connection synchronization sequence
+*                                   number.
+*
+*                           (D) In addition, RFC Draft-IETF-TCPm-TCPSecure #00 does NOT provide a precedence
+*                               priority for handling TCP segments received with BOTH the RST & SYN bits set.
+*
+*                               Therefore, since it does NOT seem reasonable to reset a TCP connection
+*                               due to a TCP segment that also attempted to synchronize the TCP connection,
+*                               it is assumed that the amended handling of the SYN bit should take precedence
+*                               over the amended handling of the RST bit.
+*
+*                   (b) RFC #1122, Section 4.2.2.12 states that "a TCP SHOULD allow a received RST segment
+*                       to include data".
+*********************************************************************************************************
+*/
+
+static  NET_TCP_RESET_CODE  NetTCP_RxPktConnIsValidReset (NET_TCP_CONN  *p_conn,
+                                                          NET_BUF_HDR   *p_buf_hdr,
+                                                          NET_ERR       *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_TCP_ACK_CODE    ack_code;
+    NET_TCP_SEQ_CODE    seq_code;
+#endif
+    NET_TCP_RESET_CODE  reset_code;
+
+
+   *p_err = NET_TCP_ERR_NONE;
+    if (p_buf_hdr->TCP_SegReset != DEF_YES) {                   /* If NO reset rx'd, ...                                */
+        return (NET_TCP_CONN_RX_RESET_NONE);                    /* ... rtn NONE.                                        */
+    }
+
+
+    reset_code = NET_TCP_CONN_RX_RESET_INVALID;
+
+    if (p_conn != DEF_NULL) {
+        switch (p_conn->ConnState) {
+            case NET_TCP_CONN_STATE_FREE:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+                *p_err =  NET_TCP_ERR_CONN_NOT_USED;
+                 return (NET_TCP_CONN_RX_RESET_INVALID);
+
+
+            case NET_TCP_CONN_STATE_CLOSED:                     /* See Note #2a1.                                       */
+            case NET_TCP_CONN_STATE_LISTEN:                     /* See Note #2a2.                                       */
+                 break;
+
+
+            case NET_TCP_CONN_STATE_SYNC_TXD:                   /* See Note #2a3.                                       */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #2A.                                        */
+                 ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+                 if (*p_err != NET_TCP_ERR_NONE) {
+                      return (NET_TCP_CONN_RX_RESET_INVALID);
+                 }
+                 if (ack_code == NET_TCP_CONN_RX_ACK_INVALID) {
+                     return (NET_TCP_CONN_RX_RESET_INVALID);
+                 }
+#endif
+                 reset_code = NET_TCP_CONN_RX_RESET_VALID;
+                 break;
+
+
+            case NET_TCP_CONN_STATE_SYNC_RXD:                   /* See Notes #2a4B & #2a5B.                             */
+            case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+            case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+            case NET_TCP_CONN_STATE_CONN:                       /* See Notes #2a4C & #2a5A.                             */
+            case NET_TCP_CONN_STATE_FIN_WAIT_1:
+            case NET_TCP_CONN_STATE_FIN_WAIT_2:
+            case NET_TCP_CONN_STATE_CLOSING:
+            case NET_TCP_CONN_STATE_TIME_WAIT:
+            case NET_TCP_CONN_STATE_CLOSE_WAIT:
+            case NET_TCP_CONN_STATE_LAST_ACK:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #2A.                                        */
+                 seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+                 if (*p_err != NET_TCP_ERR_NONE) {
+                      return (NET_TCP_CONN_RX_RESET_INVALID);
+                 }
+                 if (seq_code != NET_TCP_CONN_RX_SEQ_VALID) {
+                     return (NET_TCP_CONN_RX_RESET_INVALID);
+                 }
+#endif
+                 if (p_buf_hdr->TCP_SeqNbr == p_conn->RxSeqNbrNext) { /* If seq nbr equals next rx seq expected ...     */
+                     reset_code = NET_TCP_CONN_RX_RESET_VALID;  /* ... (see Note #2a5Ab), rtn valid reset.              */
+                 }
+                 break;
+
+
+            case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+                 break;
+
+
+            case NET_TCP_CONN_STATE_NONE:
+            default:
+                 NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_ALL);
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+                *p_err =  NET_TCP_ERR_INVALID_CONN_STATE;
+                 return (NET_TCP_CONN_RX_RESET_INVALID);
+        }
+    }
+
+    return (reset_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_RxPktFree()
+*
+* Description : Free network buffer(s).
+*
+* Argument(s) : p_buf_q      Pointer to network buffer queue.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxAppData(),
+*               NetTCP_RxPktConnHandler(),
+*               NetTCP_RxPktConnHandlerRxQ_AppData().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  NET_BUF_QTY  NetTCP_RxPktFree (NET_BUF  *p_buf_q)
+{
+    NET_BUF_QTY  nbr_freed;
+
+
+    nbr_freed = NetBuf_FreeBufQ_PrimList(p_buf_q, DEF_NULL);
+
+    return (nbr_freed);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_RxPktDiscard()
+*
+* Description : On any TCP receive error(s), discard TCP packet(s) & buffer(s).
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_Rx(),
+*               NetTCP_RxPktConnHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxPktDiscard (NET_BUF  *p_buf,
+                                   NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.TCP.RxPktDiscardedCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBufQ_PrimList((NET_BUF *)p_buf,
+                                  (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_RxConnWinSizeCfg()
+*
+* Description : (1) Configure TCP connection's receive window controls :
+*
+*                   (a) Configure TCP connection's receive window update threshold
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_ConnCfg().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnCfg().
+*
+* Note(s)     : (2) A TCP connection's receive window controls SHOULD be updated only after the
+*                   following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's configured receive window  size ('RxWinSizeCfgd')
+*                          [see 'NetTCP_RxConnWinSizeCfgUpdateTh()  Note #2a']
+*
+*                   (b) TCP connection's connection maximum segment size ('MaxSegSizeConn')
+*                          [see 'NetTCP_RxConnWinSizeCfgUpdateTh()  Note #2b']
+*
+*               (3) RFC #1122, Section 4.2.3.3 states that "the suggested SWS avoidance algorithm for
+*                   the receiver is ... to avoid advancing the right window edge RCV.NXT+RCV.WND ...
+*                   until the reduction satisfies" :
+*
+*                       (a) RCV.BUFF - RCV.USER - RCV.WND  >=  min(Fr * RCV.BUFF, Eff.snd.MSS)
+*
+*                               where
+*                                   (1) RCV.BUFF        Total receive buffer space
+*                                   (2) RCV.USER        Data  received but not yet consumed
+*                                   (3) RCV.WND         Space advertised to sender
+*                                   (4) Fr              Fraction whose recommended value is 1/2
+*                                   (5) Eff.snd.MSS     Effective send MSS for the connection
+*
+*               (4) A TCP connection's receive window update threshold SHOULD be updated only after
+*                   the following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's configured receive window  size ('RxWinSizeCfgd')
+*                           [see 'NetTCP_ConnClr()  Note #4']
+*
+*                   (b) TCP connection's connection maximum segment size ('MaxSegSizeConn')
+*                           [see 'NetTCP_ConnCfgMaxSegSize()  Note #1']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxConnWinSizeCfg (NET_TCP_CONN  *p_conn)
+{
+    NET_TCP_WIN_SIZE  rx_win_size_th;
+
+
+    p_conn->RxWinSizeCalcd    =  p_conn->RxWinSizeCfgd;
+    p_conn->RxWinSizeActual   =  p_conn->RxWinSizeCfgd;
+
+                                                                /* Cfg silly win min th (see Note #3a).                 */
+    rx_win_size_th            = (p_conn->RxWinSizeCfgd * NET_TCP_RX_SILLY_WIN_NUMER) / NET_TCP_RX_SILLY_WIN_DENOM;
+    p_conn->RxWinSizeUpdateTh =  DEF_MIN(p_conn->MaxSegSizeConn, rx_win_size_th);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_RxConnWinSizeHandler()
+*
+* Description : (1) Handle TCP connection's receive window :
+*
+*                   (a) Handle   TCP connection receive window                      See Notes #2 & #3
+*                   (b) Transmit TCP connection acknowledgment                      See Note  #4
+*
+*
+* Argument(s) : p_conn               Pointer to a TCP connection.
+*               -----               Argument validated in NetTCP_RxAppData(),
+*                                                         NetTCP_RxPktConnHandlerRxQ_Sync(),
+*                                                         NetTCP_RxPktConnHandlerRxQ_Conn(),
+*                                                         NetTCP_RxPktConnHandlerRxQ_AppData().
+*
+*               p_buf_hdr            Pointer to network buffer header that received TCP packet.
+*
+*               win_update_size     Size to update TCP connection's receive window (in octets).
+*
+*               win_update_code     Indicate how to update TCP connection receive window :
+*
+*                                       NET_TCP_CONN_RX_WIN_RESET   Reset     TCP connection's available
+*                                                                       receive window size.
+*                                       NET_TCP_CONN_RX_WIN_INC     Increment TCP connection's available
+*                                                                       receive window size.
+*                                       NET_TCP_CONN_RX_WIN_DEC     Decrement TCP connection's available
+*                                                                       receive window size.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxAppData(),
+*               NetTCP_RxPktConnHandlerRxQ_Sync(),
+*               NetTCP_RxPktConnHandlerRxQ_Conn(),
+*               NetTCP_RxPktConnHandlerRxQ_AppData().
+*
+* Note(s)     : (2) RFC #793, Section 3.7 'Data Communication : Managing the Window' states that :
+*
+*                   (a) "The window sent in each segment indicates the range of sequence numbers the
+*                        sender of the window (the data receiver) is currently prepared to accept.
+*                        There is an assumption that this is related to the currently available data
+*                        buffer space available for this connection."
+*
+*                       (1) A TCP connection's advertised receive window MUST NEVER be decreased to zero
+*                           if NO receive data is available & ready to be read by the application layer.
+*
+*                           In other words, if NO received data starting from the next expected receive
+*                           sequence number(s) is queued, then NO data is available to be read by the
+*                           application layer.  Therefore, the receive window size MUST NOT be decreased
+*                           to zero, otherwise the receive window would deadlock since the application
+*                           layer would NOT be able to read & extract any data from the receive window
+*                           & the TCP connection would NOT be able to receive any more data into the
+*                           receive window.
+*
+*                       See also 'NetTCP_RxPktConnHandlerRxQ_AppData()  Note #6b'.
+*
+*                   (b) "The mechanisms provided allow a TCP to advertise a large window and to
+*                        subsequently advertise a much smaller window without having accepted that
+*                        much data.  This ... 'shrinking the window' is strongly discouraged.  The
+*                        robustness principle dictates that TCPs will not shrink the window ... but
+*                        will be prepared for such behavior on the part of other TCPs."
+*
+*                   (c) "Note that ... acknowledgments should not be delayed or unnecessary
+*                        retransmissions will result.  One strategy would be to send an acknowledgment
+*                        when a small segment arrives (with out [sic] updating the window information),
+*                        and then to send another acknowledgment with new window information when the
+*                        window is larger."
+*
+*                       (1) However, the following sections retract this delayed acknowledgement
+*                           prohibition & state that "a TCP SHOULD implement a delayed ACK" :
+*
+*                           (A) RFC # 813, Section 5
+*                           (B) RFC #1122, Section 4.2.3.2
+*                           (C) RFC #2581, Section 4.2
+*
+*                       See also Note #4 & 'NetTCP_TxConnAck()  Note #6'.
+*
+*               (3) (a) RFC #813, Section 2 states that "a bad implementation of the window algorithm
+*                       can lead to extremely poor performance ... This particular phenomenon ... has
+*                       been given the name of Silly Window Syndrome, or SWS".
+*
+*                       Section 3 elaborates that "SWS is a degeneration in the throughput which develops
+*                       ... whenever the acknowledgement of a small segment ... cause[s] another segment
+*                       of the same small size to be sent, until ... the network ... becomes clogged with
+*                       many small segments, and an equal number of acknowledgements".
+*
+*                   (b) (1) RFC #813, Section 4 states that "the receiver of data can take a very simple
+*                           step to eliminate SWS.  When it disposes of a small amount of data, it can
+*                           artificially reduce the offered window in subsequent acknowledgements, so
+*                           that the useable window computed by the sender does not permit the sending
+*                           of any further data.
+*
+*                           At some later time, when the receiver has processed a substantially larger
+*                           amount of incoming data, the artificial limitation on the offered window
+*                           can be removed all at once, so that the sender computes a sudden large jump
+*                           rather than a sequence of small jumps in the useable window.
+*
+*                           For a simple implementation, ... artificially reduce the offered window until
+*                           the reduction constitutes one half of the available space ... [or] at least
+*                           permit one reasonably large segment".
+*
+*                       (2) RFC #1122, Section 4.2.3.3 reiterates that "a TCP MUST include a SWS avoidance
+*                           algorithm in the receiver ... This algorithm combines with the delayed ACK
+*                           algorithm ... to determine when an ACK segment containing the current window
+*                           will really be sent to the receiver [sic]".
+*
+*                          "The solution to receiver SWS is to avoid advancing the right window edge
+*                           RCV.NXT+RCV.WND in small increments, even if data is received from the
+*                           network in small segments ...  The suggested SWS avoidance algorithm for
+*                           the receiver is to keep RCV.NXT+RCV.WND fixed until the reduction satisfies :
+*
+*                               (A) RCV.BUFF - RCV.USER - RCV.WND  >=  min(Fr * RCV.BUFF, Eff.snd.MSS)
+*
+*                                       where
+*                                           (1) RCV.BUFF        Total receive buffer space
+*                                           (2) RCV.USER        Data  received but not yet consumed
+*                                           (3) RCV.WND         Space advertised to sender
+*                                           (4) Fr              Fraction whose recommended value is 1/2
+*                                           (5) Eff.snd.MSS     Effective send MSS for the connection
+*
+*
+*                           Note that the general effect of this algorithm is to advance RCV.WND in
+*                           increments of the Eff.snd.MSS."
+*
+*               (4) (a) RFC #813, Section 5 states that "the receiver of data will refrain from
+*                       sending an acknowledgement under certain circumstances ... Postpone
+*                       sending an acknowledgement if ... the following conditions hold" :
+*
+*                       (1) "There is no revised window information to be sent back."
+*
+*                           (A) However, if any local receive window size is available to update to
+*                               the remote host, an acknowledgement should be immediately transmitted.
+*
+*                               (1) HOWEVER, since  local receive window size updates will continually
+*                                   occur for "a host that is receiving a stream of TCP data segments"
+*                                   (RFC #1122, Section 4.2.3.2); it is NOT possible to both update the
+*                                   local receive window & implement a delayed acknowledgement.
+*
+*                                   (a) #### Therefore, in order to implement a delayed acknowledgement,
+*                                       the only local receive window size updates that SHOULD transmit
+*                                       an immediate acknowledgement :
+*
+*                                       (1) Local receive window size sets/resets
+*                                       (2) Local receive window size increases
+*                                       (3) Local receive window size decreases to zero-sized
+*
+*                                   (b) The following local receive window size updates SHOULD NOT
+*                                       transmit an immediate acknowledgement :
+*
+*                                       (1) Local receive window size decreases
+*
+*                   (b) RFC #1122, Section 4.2.3.2 states that "a delayed ACK gives the application an
+*                       opportunity to update the window and perhaps to send an immediate response".
+*
+*                   See also 'NetTCP_TxConnAck()  Notes #4b1, #6, & #7'.
+*
+*               (5) If the configured receive window size is allowed to be asynchronously modified by
+*                   the application layer (see 'NetTCP_ConnCfgRxWinSizeHandler()  Note #3'), changes in
+*                   the calculated &/or advertised receive window size MUST be appropriately validated
+*                   to any possible new value for the configured receive window size :
+*
+*                   (a) During receive window size increases, if the currently calculated receive
+*                       window size is already greater than the currently configured receive window
+*                       size; then the calculated window size is NOT increased, but is allowed to
+*                       remain greater than  the configured window size until the calculated window
+*                       size decreases below the configured window size.
+*
+*                   (b) During receive window size decreases, if the currently calculated receive
+*                       window size is already greater than the currently configured receive window
+*                       size; then the calculated window size is further decreased, but is allowed to
+*                       remain greater than  the configured window size until the calculated window
+*                       size decreases below the configured window size.
+*
+*                   (c) During receive window size decreases, if the currently configured receive
+*                       window size is less than the actual configured receive window size; then
+*                       the actual configured receive window size is also decremented by the window
+*                       size decrease.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_RxConnWinSizeHandler (NET_TCP_CONN      *p_conn,
+                                           NET_BUF_HDR       *p_buf_hdr,
+                                           CPU_INT16U         val,
+                                           NET_TCP_WIN_CODE   win_update_code)
+{
+    CPU_BOOLEAN        tx_ack = DEF_NO;
+    NET_TCP_ACK_CODE   tx_ack_code;
+    NET_TCP_WIN_SIZE   rx_payload_max;
+    NET_TCP_WIN_SIZE   win_size_calc;
+    NET_TCP_WIN_SIZE   win_size_avail;
+    NET_TCP_WIN_SIZE   win_size_delta;
+    NET_IF_NBR         if_nbr;
+    NET_PROTOCOL_TYPE  protocol = NET_PROTOCOL_TYPE_TCP_V4;
+    CPU_BOOLEAN        ipv6;
+    NET_ERR            err;
+
+
+
+#ifndef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+    ipv6 = NetConn_IsIPv6(p_conn->ID_Conn, &err);
+    if (ipv6 == DEF_YES) {
+        protocol = NET_PROTOCOL_TYPE_TCP_V6;
+    }
+
+    if (p_buf_hdr == DEF_NULL) {
+        if_nbr = NetConn_IF_NbrGet(p_conn->ID_Conn, &err);
+    } else {
+        if_nbr = p_buf_hdr->IF_Nbr;
+    }
+
+
+    rx_payload_max = NetIF_GetPayloadRxMax(if_nbr, protocol, &err);
+    win_size_calc  = rx_payload_max * val;
+#else
+
+    (void)&rx_payload_max;
+    (void)&win_size_calc;
+    (void)&if_nbr;
+    (void)&protocol;
+    (void)&ipv6;
+#endif
+
+    switch (win_update_code) {
+        case NET_TCP_CONN_RX_WIN_ZERO:
+             p_conn->RxWinSizeCalcd  = 0;
+             p_conn->RxWinSizeCfgd   = 0;
+             p_conn->RxWinSizeActual = 0;
+             break;
+
+
+        case NET_TCP_CONN_RX_WIN_INIT:
+             p_conn->RxWinSizeCalcd  = val;
+             p_conn->RxWinSizeCfgd   = val;
+             p_conn->RxWinSizeActual = val;
+             tx_ack                  = DEF_YES;
+             tx_ack_code             = NET_TCP_CONN_TX_ACK_IMMED;       /* See Note #4a1A1a1.                           */
+             break;
+
+
+        case NET_TCP_CONN_RX_WIN_SET:
+             if (p_conn->RxWinSizeActual < val) {                       /* If actual rx win size < win update, ...      */
+                 p_conn->RxWinSizeActual = val;                         /* ... set   rx win size.                       */
+                 p_conn->RxWinSizeCalcd  = val;
+                 tx_ack                  = DEF_YES;
+                 tx_ack_code             = NET_TCP_CONN_TX_ACK_IMMED;   /* See Note #4a1A1a1.                           */
+             }
+             break;
+
+
+        case NET_TCP_CONN_RX_WIN_INC:
+#ifdef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+             if (val < 1) {                                            /* If NO win update, MUST NOT update win.       */
+                 break;
+             }
+
+             if (p_conn->RxWinSizeCalcd <= p_conn->RxWinSizeCfgd) {     /* If <= cfg'd win size (see Note #5a), ...     */
+                                                                        /* ... inc  rx win size.                        */
+                 win_size_avail = p_conn->RxWinSizeCfgd - p_conn->RxWinSizeCalcd;
+                 if (win_size_avail > val) {                           /* If avail rx win size >  win update, ...      */
+                     p_conn->RxWinSizeCalcd += val;                    /* ... inc  rx win size by win update.          */
+                 } else {                                               /* Else lim to cfg'd rx win size.               */
+                     p_conn->RxWinSizeCalcd  = p_conn->RxWinSizeCfgd;
+                 }
+
+                 if (p_conn->RxWinSizeCalcd > p_conn->RxWinSizeActual) {
+                     win_size_delta = p_conn->RxWinSizeCalcd - p_conn->RxWinSizeActual;
+                     if (win_size_delta >= p_conn->RxWinSizeUpdateTh) {  /* If calc'd - actual rx win size >= th, ...   */
+                                                                         /* ... update rx win size (see Note #3b2).     */
+                         p_conn->RxWinSizeActual = p_conn->RxWinSizeCalcd;
+                         tx_ack                  = DEF_YES;
+                         tx_ack_code             = NET_TCP_CONN_TX_ACK_IMMED;    /* See Note #4a1A1a2.                   */
+                     }
+
+                 } else {                                               /* Prevent rx win shrink (see Note #2b).        */
+                     p_conn->RxWinSizeCalcd = p_conn->RxWinSizeActual;
+                 }
+             }
+             break;
+#else
+             if (val < 1) {                                 /* If NO win update, MUST NOT update win.               */
+                 break;
+             }
+
+
+             if (p_conn->RxWinSizeCalcd <= p_conn->RxWinSizeCfgd) { /* If <= cfg'd win size (see Note #5a), ...         */
+                                                                /* ... inc  rx win size.                                */
+                 win_size_avail = p_conn->RxWinSizeCfgd - p_conn->RxWinSizeCalcd;
+                 if (win_size_avail > win_size_calc) {          /* If avail rx win size >  win update, ...              */
+                     p_conn->RxWinSizeCalcd += win_size_calc;   /* ... inc  rx win size by win update.                  */
+                 } else {                                       /* Else lim to cfg'd rx win size.                       */
+                     p_conn->RxWinSizeCalcd  = p_conn->RxWinSizeCfgd;
+                 }
+
+                 if (p_conn->RxWinSizeCalcd > p_conn->RxWinSizeActual) {
+                     win_size_delta = p_conn->RxWinSizeCalcd - p_conn->RxWinSizeActual;
+                     if (win_size_delta >= p_conn->RxWinSizeUpdateTh) { /* If calc'd - actual rx win size >= th, ...    */
+                                                                /* ... update rx win size (see Note #3b2).              */
+                         p_conn->RxWinSizeActual = p_conn->RxWinSizeCalcd;
+                         tx_ack                  = DEF_YES;
+                         tx_ack_code             = NET_TCP_CONN_TX_ACK_IMMED; /* See Note #4a1A1a2.                     */
+                     }
+
+                 } else {                                       /* Prevent rx win shrink (see Note #2b).                */
+                     p_conn->RxWinSizeCalcd = p_conn->RxWinSizeActual;
+                 }
+             }
+             break;
+#endif
+
+
+        case NET_TCP_CONN_RX_WIN_DEC:
+#ifdef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+            if (val < 1) {                                            /* If NO win update, MUST NOT update win.       */
+                break;
+            }
+
+            if (p_conn->RxWinSizeCalcd >  val) {                      /* If calc'd rx win size >  win update, ...     */
+                p_conn->RxWinSizeCalcd -= val;                        /* ... dec   rx win size by win update.         */
+            } else {
+                p_conn->RxWinSizeCalcd  = 0u;                          /* Else lim to min rx win size.                 */
+            }
+
+            if (p_conn->RxWinSizeActual > 0) {
+                if (p_conn->RxWinSizeActual >  val) {                 /* If actual rx win size >  win update, ...     */
+                    p_conn->RxWinSizeActual -= val;                   /* ... dec   rx win size by win update.         */
+                    tx_ack_code             = NET_TCP_CONN_TX_ACK;     /*     See Note #4a1A1b1.                       */
+
+                } else {
+                    p_conn->RxWinSizeActual  = 0u;                         /* Else lim to min rx win size.             */
+                    tx_ack_code             = NET_TCP_CONN_TX_ACK_IMMED;   /* See Note #4a1A1a3.                       */
+                }
+
+                tx_ack = DEF_YES;
+            }
+
+#else
+             if (val < 1) {                                  /* If NO win update, MUST NOT update win.               */
+                 break;
+             }
+
+             if (p_conn->RxWinSizeCalcd >  win_size_calc) {     /* If calc'd rx win size >  win update, ...             */
+                 p_conn->RxWinSizeCalcd -= win_size_calc;       /* ... dec   rx win size by win update.                 */
+             } else {
+                 p_conn->RxWinSizeCalcd  = 0u;                  /* Else lim to min rx win size.                         */
+             }
+
+             if (p_conn->RxWinSizeActual > 0) {
+                 if (p_conn->RxWinSizeActual >  win_size_calc) {/* If actual rx win size >  win update, ...             */
+                     p_conn->RxWinSizeActual -= win_size_calc;  /* ... dec   rx win size by win update.                 */
+                     tx_ack_code              = NET_TCP_CONN_TX_ACK; /* See Note #4a1A1b1.                              */
+                 } else {
+                     p_conn->RxWinSizeActual = 0u;              /* Else lim to min rx win size.                         */
+                     tx_ack_code             = NET_TCP_CONN_TX_ACK_IMMED; /* See Note #4a1A1a3.                         */
+                 }
+                 tx_ack = DEF_YES;
+             }
+#endif
+             break;
+
+
+        case NET_TCP_CONN_RX_WIN_RESET:
+        default:
+             if (p_conn->RxWinSizeCalcd  < p_conn->RxWinSizeCfgd) {     /* If < cfg'd win size  (see Note #5a), ...     */
+                 p_conn->RxWinSizeCalcd  = p_conn->RxWinSizeCfgd;       /* ... reset calc'd win size to cfg'd win size. */
+             }
+             if (p_conn->RxWinSizeActual < p_conn->RxWinSizeCalcd) {    /* Do NOT shrink rx win (see Note #2b).         */
+                 p_conn->RxWinSizeActual = p_conn->RxWinSizeCalcd;
+                 tx_ack                  = DEF_YES;
+                 tx_ack_code             = NET_TCP_CONN_TX_ACK_IMMED;   /* See Note #4a1A1a1.                           */
+             }
+             break;
+    }
+
+
+                                                                /* ----------------- TX TCP CONN ACK ------------------ */
+    if (tx_ack == DEF_YES) {                                    /* If rx win updated, tx ack (see Note #4a1A).          */
+        if (p_buf_hdr != DEF_NULL) {                            /* If rx'd pkt avail, req tx ack; but ack ...           */
+            p_buf_hdr->TCP_SegAckTxReqCode = (CPU_INT08U)tx_ack_code; /* ... NOT tx'd until after rx'd pkt handling.    */
+        } else {
+            NetTCP_TxConnAck(p_conn, p_buf_hdr, tx_ack_code, NET_TCP_CONN_CLOSE_ALL, &err);
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_TxConnWinSizeCfg()
+*
+* Description : (1) Configure TCP connection's transmit window controls :
+*
+*                   (a) Configure TCP connection's transmit window congestion controls
+*                   (b) Configure TCP connection's transmit window minimum    threshold
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_ConnCfg().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnCfg().
+*
+* Note(s)     : (2) A TCP connection's transmit window controls SHOULD be updated only after the
+*                   following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's maximum   transmit remote window size ('TxWinSizeRemoteMax')
+*                          [see 'NetTCP_TxConnWinSizeCfgCongCtrl()  Note #5a'
+*                             & 'NetTCP_TxConnWinSizeCfgMinTh()     Note #2a']
+*
+*                   (b) TCP connection's remaining transmit remote window size ('TxWinSizeRemoteRem')
+*                          [see 'NetTCP_TxConnWinSizeCfgCongCtrl()  Note #5b']
+*
+*                   (c) TCP connection's connection maximum segment size ('MaxSegSizeConn')
+*                          [see 'NetTCP_TxConnWinSizeCfgCongCtrl()  Note #5c']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeCfg (NET_TCP_CONN  *p_conn)
+{
+    p_conn->TxWinSizeCfgdRem = p_conn->TxWinSizeCfgd;
+
+    NetTCP_TxConnWinSizeCfgCongCtrl(p_conn);
+    NetTCP_TxConnWinSizeCfgMinTh(p_conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_TxConnWinSizeCfgCongCtrl()
+*
+* Description : (1) Configure TCP connection's transmit window congestion controls :
+*
+*                   (a) Configure TCP connection's transmit window slow start threshold         See Note #2
+*                   (b) Configure TCP connection's transmit window congestion controls          See Note #3
+*                   (c) Reset     TCP connection's transmit window duplicate acknowledgement
+*                           controls
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnWinSizeCfg(),
+*                                                 NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeCfg(),
+*               NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Note(s)     : (2) RFC #2581, Section 3.1 states that "the initial value of ssthresh [slow start
+*                   threshold] MAY be arbitrarily high (for example, some implementations use the
+*                   size of the advertised window)".
+*
+*                   (a) This amends RFC #2001, Section 2.1 which previously stated that "initialization
+*                       for a given connection sets ... ssthresh to 65535 bytes".
+*
+*                   (b) To always ensure a sufficiently high initial value, the slow start threshold
+*                       initializes to the TCP connection's maximum remote window size.
+*
+*               (3) "The initial value of cwnd [congestion window], MUST be less than or equal to 2*SMSS
+*                    bytes and MUST NOT be more than 2 segments."
+*
+*                   (a) This amends RFC #2001, Section 2.1 which previously stated that "initialization
+*                       for a given connection sets cwnd to one segment".
+*
+*               (4) (a) RFC #2001, Section 2.2 states that "the TCP output routine never sends more than
+*                       the minimum of cwnd and the receiver's advertised window".
+*
+*                   (b) RFC #2581, Section 3.1 reiterates that "the minimum of cwnd and rwnd [receiver's
+*                       advertised window] governs data transmission".
+*
+*                   See also 'NetTCP_TxConnWinSizeUpdateAvail()  Note #1'.
+*
+*               (5) A TCP connection's transmit window congestion controls SHOULD be updated only after
+*                   the following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's maximum    transmit remote window size ('TxWinSizeRemoteMax')
+*                           [see 'NetTCP_RxPktConnHandlerTxWinRemote()   Note  #1a2A'
+*                              & 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Notes #3a2A & #3b']
+*
+*                   (b) TCP connection's remaining  transmit remote window size ('TxWinSizeRemoteRem')
+*                           [see 'NetTCP_RxPktConnHandlerTxWinRemote()   Note  #1a2A'
+*                              & 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Notes #3a2A']
+*
+*                   (c) TCP connection's connection maximum segment size ('MaxSegSizeConn')
+*                           [see 'NetTCP_ConnCfgMaxSegSize()  Note #1']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeCfgCongCtrl (NET_TCP_CONN  *p_conn)
+{
+                                                                /* Cfg tx slow start th (see Note #2b).                 */
+    p_conn->TxWinSizeSlowStartThInit = (NET_TCP_WIN_SIZE)p_conn->TxWinSizeRemoteMax;
+    p_conn->TxWinSizeSlowStartTh     = (NET_TCP_WIN_SIZE)p_conn->TxWinSizeSlowStartThInit;
+
+                                                                /* Cfg tx cong ctrls    (see Note #3a).                 */
+    p_conn->TxWinSizeCongInit        = (NET_TCP_WIN_SIZE)p_conn->MaxSegSizeConn * NET_TCP_CONG_WIN_MSS_SCALAR_INIT;
+    p_conn->TxWinSizeCongCalcdActual = (NET_TCP_WIN_SIZE)p_conn->TxWinSizeCongInit;
+    p_conn->TxWinSizeCongCalcdCur    = (NET_TCP_WIN_SIZE)0u;
+    p_conn->TxWinSizeCongRem         = (NET_TCP_WIN_SIZE)p_conn->TxWinSizeCongCalcdActual;
+
+                                                                /* Cfg tx win avail     (see Note #4).                  */
+    NetTCP_TxConnWinSizeUpdateAvail(p_conn);
+
+
+    NetTCP_TxConnWinSizeDupAckCtrlReset(p_conn);                /* Reset dup ack ctrls.                                 */
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetTCP_TxConnWinSizeCfgMinTh()
+*
+* Description : Configure TCP connection's transmit silly window minimum threshold.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnWinSizeCfg(),
+*                                                 NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeCfg(),
+*               NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Note(s)     : (1) RFC #1122, Section 4.2.3.4 states that "the sender's SWS avoidance algorithm is ...
+*                   [to] send data ... if at least a fraction Fs of the maximum window can be sent ...
+*                   Fs is a fraction whose recommended value is 1/2".
+*
+*               (2) A TCP connection's transmit window minimum threshold SHOULD be updated only after
+*                   the following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's maximum transmit remote window size ('TxWinSizeRemoteMax')
+*                           [see 'NetTCP_RxPktConnHandlerTxWinRemote()   Note  #1a2A'
+*                              & 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Notes #3a2A & #3b']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeCfgMinTh (NET_TCP_CONN  *p_conn)
+{
+                                                                /* Cfg silly win min th (see Note #1).                  */
+    p_conn->TxWinSizeMinTh = (NET_TCP_WIN_SIZE)(((CPU_INT32U)p_conn->TxWinSizeRemoteMax * NET_TCP_TX_SILLY_WIN_NUMER)
+                                                                                      / NET_TCP_TX_SILLY_WIN_DENOM);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_TxConnWinSizeHandlerCfgd()
+*
+* Description : (1) Handle TCP connection's configured transmit window :
+*
+*                   (a) Update TCP connection configured transmit window
+*                   (b) Update TCP connection total transmit data queued
+*
+*
+* Argument(s) : p_conn               Pointer to a TCP connection.
+*               -----               Argument validated in NetTCP_TxConnAppData(),
+*                                                         NetTCP_RxPktConnHandlerReTxQ().
+*
+*               win_update_size     Size to update TCP connection's transmit window (in octets).
+*
+*               win_update_code     Indicate how to update TCP connection transmit window :
+*
+*                                       NET_TCP_CONN_TX_WIN_RESET       Reset     TCP connection's available
+*                                                                           transmit window size.
+*                                       NET_TCP_CONN_TX_WIN_SET         Set       TCP connection's available
+*                                                                           transmit window size.
+*                                       NET_TCP_CONN_TX_WIN_INC         Increment TCP connection's available
+*                                                                           transmit window size.
+*                                       NET_TCP_CONN_TX_WIN_DEC         Decrement TCP connection's available
+*                                                                           transmit window size.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                        TCP connection's configured transmit window
+*                                                                           successfully updated.
+*
+*                                                                       --- RETURNED BY NetTCP_TxQ_Signal() : ---
+*                               NET_TCP_ERR_TX_Q_SIGNAL_FAULT           TCP connection transmit queue signal fault.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnAppData(),
+*               NetTCP_RxPktConnHandlerReTxQ().
+*
+* Note(s)     : (2) (a) RFC #793, Section 3.7 'Data Communication : Managing the Window' states
+*                       that "the window sent in each segment indicates the range of sequence
+*                       numbers the sender of the window (the data receiver) is currently
+*                       prepared to accept.  There is an assumption that this is related to the
+*                       currently available data buffer space available for this connection".
+*
+*                   (b) Thus a TCP connection's configured transmit window is constrained by
+*                       the available network resources; of which, network buffers are the
+*                       primary transmit window network resource.
+*
+*                       However, since network buffers are discrete resources with non-discrete
+*                       packet size; it is NOT necessary to enforce exact/strict compliance with
+*                       a TCP connection's configured transmit window.
+*
+*                       In other words, network buffers allocated for TCP connection transmit
+*                       SHOULD be fully used even if the TCP connection's configured transmit
+*                       window is zero.
+*
+*               (3) If the configured transmit window size is allowed to be asynchronously modified
+*                   by the application layer, changes in the remaining transmit window size MUST be
+*                   appropriately validated to any possible new value for the configured transmit
+*                   window size :
+*
+*                   (a) During transmit window size increases, if the remaining transmit window
+*                       size is already greater than the currently configured   transmit window
+*                       size; then the remaining window size is NOT increased, but is allowed to
+*                       remain greater than  the configured window size until the remaining window
+*                       size decreases below the configured window size.
+*
+*                   (b) During transmit window size decreases, if the remaining transmit window
+*                       size is already greater than the currently configured   transmit window
+*                       size; then the remaining window size is further decreased, but is allowed
+*                       to remain greater than the configured window size until the remaining
+*                       window size decreases below the configured window size.
+*
+*                   (c) Window size update is NOT validated for transmit window size resets.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeHandlerCfgd (NET_TCP_CONN      *p_conn,
+                                               NET_TCP_WIN_SIZE   win_update_size,
+                                               NET_TCP_WIN_CODE   win_update_code,
+                                               NET_ERR           *p_err)
+{
+    CPU_BOOLEAN       q_prevly_full;
+    NET_TCP_WIN_SIZE  win_size_avail;
+    NET_TCP_CONN_ID   conn_id_tcp;
+
+
+    switch (win_update_code) {
+        case NET_TCP_CONN_TX_WIN_RESET:                         /* Reset cfg'd tx win size (see Note #1c).              */
+        default:
+             p_conn->TxWinSizeCfgdRem = p_conn->TxWinSizeCfgd;
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_SET:
+             if (p_conn->TxWinSizeCfgdRem < win_update_size) {  /* If rem cfg'd win size < win update, ...              */
+                 p_conn->TxWinSizeCfgdRem = win_update_size;    /* .. set cfg'd win size.                               */
+                 break;
+             }                                                  /* Else inc; do NOT shrink win.                         */
+                                                                /* 'break' intentionally omitted; MUST ...              */
+                                                                /* ...  execute the following case :   ...              */
+                                                                /* ---------- ... 'NET_TCP_CONN_TX_WIN_INC'. ---------- */
+        case NET_TCP_CONN_TX_WIN_INC:
+             if (win_update_size < 1) {                         /* If NO win update, do NOT update win.                 */
+                 break;
+             }
+
+             q_prevly_full = (p_conn->TxWinSizeCfgdRem < 1) ? DEF_YES : DEF_NO;
+
+             if (p_conn->TxWinSizeCfgdRem < p_conn->TxWinSizeCfgd) {
+                                                                /* If < cfg'd  win size (see Note #3a), ...             */
+                                                                /* ... inc  tx win size.                                */
+                 win_size_avail = p_conn->TxWinSizeCfgd - p_conn->TxWinSizeCfgdRem;
+                 if (win_size_avail > win_update_size) {        /* If avail tx win size >  win update, ...              */
+                                                                /* ... inc  tx win size by win update.                  */
+                     p_conn->TxWinSizeCfgdRem += win_update_size;
+                 } else {
+                                                                /* Else lim to cfg'd tx win size.                       */
+                     p_conn->TxWinSizeCfgdRem  = p_conn->TxWinSizeCfgd;
+                 }
+             }
+
+             if (q_prevly_full == DEF_YES) {                    /* If tx Q prev'ly full, ...                            */
+                 conn_id_tcp = p_conn->ID;
+                 NetTCP_TxQ_Signal(conn_id_tcp, p_err);         /* ... signal tx Q.                                     */
+                 if (*p_err != NET_TCP_ERR_NONE) {
+                      NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                                       (NET_BUF_HDR      *)0,
+                                       (CPU_BOOLEAN       )DEF_YES,
+                                       (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+                      return;
+                 }
+             }
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_DEC:
+             if (win_update_size < 1) {                         /* If NO win update, do NOT update win.                 */
+                 break;
+             }
+
+             if (p_conn->TxWinSizeCfgdRem >  win_update_size) { /* If rem tx win size >  win update, ..                 */
+                 p_conn->TxWinSizeCfgdRem -= win_update_size;   /* .. dec tx win size by win update.                    */
+             } else {
+                 p_conn->TxWinSizeCfgdRem  = 0u;                /* Else lim to min tx  win size.                        */
+             }
+             break;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetTCP_TxConnWinSizeHandlerCongCtrl()
+*
+* Description : (1) Handle TCP connection's transmit window congestion controls :
+*
+*                   (a) Perform slow start / congestion avoidance algorithms            See Note #2c2A
+*                   (b) Perform fast re-transmit / fast recovery  algorithms            See Note #2c2B
+*                   (c) Handle  remote host's receive window updates                    See Note #3
+*
+*
+* Argument(s) : p_conn              Pointer to a TCP connection.
+*               ------              Argument validated in NetTCP_RxPktConnHandlerSeg(),
+*                                                         NetTCP_RxPktConnHandlerReTxQ(),
+*                                                         NetTCP_TxConnTxQ(),
+*                                                         NetTCP_TxConnTxQ_TimeoutIdleSet(),
+*                                                         NetTCP_TxConnTxQ_TimeoutIdle(),
+*                                                         NetTCP_TxConnReTxQ().
+*
+*               p_buf_hdr           Pointer to network buffer header that received TCP packet.
+*               ---------           Argument validated in NetTCP_Rx().
+*
+*               ack_code            Indicates the received segment's acknowledgement condition :
+*
+*                                       NET_TCP_CONN_RX_ACK_NONE            NO received acknowledgement number.
+*
+*                                       NET_TCP_CONN_RX_ACK_INVALID            Received acknowledgement number
+*                                                                              is invalid for the TCP connection.
+*
+*                                       NET_TCP_CONN_RX_ACK_VALID              Received acknowledgement number
+*                                                                              is   valid for the TCP connection.
+*
+*                                       NET_TCP_CONN_RX_ACK_DUP                Received acknowledgement number
+*                                                                              is a          duplicate for the
+*                                                                              TCP connection.
+*
+*                                       NET_TCP_CONN_RX_ACK_PREV               Received acknowledgement number
+*                                                                              is a previous duplicate for the
+*                                                                              TCP connection.
+*
+*               win_update_size     Size to update TCP connection's transmit window (in octets).
+*
+*               win_update_code     Indicate how to update TCP connection transmit window :
+*
+*                                       NET_TCP_CONN_TX_WIN_RESET           Reset     TCP connection's congestion
+*                                                                               control transmit window size.
+*                                       NET_TCP_CONN_TX_WIN_SEG_RXD         Update    TCP connection's congestion
+*                                                                               control transmit window size
+*                                                                               based on received segment.
+*                                       NET_TCP_CONN_TX_WIN_TIMEOUT         Update    TCP connection's congestion
+*                                                                               control transmit window size
+*                                                                               based on transmission timeout.
+*                                       NET_TCP_CONN_TX_WIN_INC             Increment TCP connection's congestion
+*                                                                               control transmit window sizes.
+*                                       NET_TCP_CONN_TX_WIN_DEC             Decrement TCP connection's
+*                                                                                       transmit window sizes.
+*                                       NET_TCP_CONN_TX_WIN_REMOTE_UPDATE   Update    TCP connection's remote
+*                                                                                       receive  window size.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection's transmit window congestion controls
+*                                                                       successfully updated.
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*
+*                                                                   ---------- RETURNED BY NetTCP_TxConnTxQ() : ----------
+*                                                                   --------- RETURNED BY NetTCP_TxConnReTxQ() : ---------
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*
+*                                                                   ---------- RETURNED BY NetTCP_TxConnTxQ() : ----------
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+*                                                                   --------- RETURNED BY NetTCP_TxConnReTxQ() : ---------
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSeg(),
+*               NetTCP_RxPktConnHandlerReTxQ(),
+*               NetTCP_RxPktConnHandlerTxWinRemote(),
+*               NetTCP_TxConnTxQ(),
+*               NetTCP_TxConnTxQ_TimeoutIdleSet(),
+*               NetTCP_TxConnTxQ_TimeoutIdle(),
+*               NetTCP_TxConnReTxQ().
+*
+* Note(s)     : (2) (a) (1) The following sections define, specify, &/or require "TCP's four intertwined congestion
+*                           control algorithms: slow start, congestion avoidance, fast retransmit, and fast recovery" :
+*
+*                           (A) RFC #2001                                               See Note  #2c1
+*                           (B) RFC #2581                                               See Notes #2c2, #2a2, & #2e
+*                           (C) RFC #1122
+*                               (1) Section 4.2.2.15
+*                               (2) Section 4.2.2.21
+*                               (3) Section 4.2.3.9                                     See 'net_tcp.c  Note #1e'
+*                                   (a) 'Source Quench'                                 See Note #2e2
+*                                   (b) 'Destination Unreachable -- Codes 2-4'
+*
+*
+*                       (2) Although RFC #2581, Section 1 states that "this document is an update of [RFC #2001]";
+*                           both references are included as complementary specifications of the congestion control
+*                           algorithms.
+*
+*                           However, since RFC #2581 is the update to RFC #2001, its specifications supercede
+*                           those of RFC #2001; & ALL differences are implemented by RFC #2581 specifications.
+*
+*                   (b) (1) (A) RFC #2581, Section 3.1 states that "the slow start and congestion avoidance
+*                               algorithms MUST be used by a TCP sender to control the amount of outstanding
+*                               data being injected into the network".
+*
+*                           (B) RFC #1122, Section 4.2.2.15 reiterates that "a TCP MUST implement ... 'slow
+*                               start' with 'congestion avoidance'".
+*
+*                       (2) (A) RFC #2001, Section 1 states that "the sender's ... congestion window ... is
+*                               flow control imposed by the sender, while the advertised window is flow control
+*                               imposed by the receiver.  The former is based on the sender's assessment of
+*                               perceived network congestion; the latter is related to the amount of available
+*                               buffer space at the receiver for this connection".
+*
+*                           (B) RFC #2581, Section 3.1 reiterates that "the congestion window ... is a sender-
+*                               side limit on the amount of data the sender can transmit into the network
+*                               before receiving an acknowledgment (ACK), while the receiver's advertised
+*                               window ... is a receiver-side limit on the amount of outstanding data."
+*
+*                       (3) (A) (1) RFC #2001, Section 1 states that "the sender can transmit up to the minimum
+*                                   of the congestion window and the advertised window."
+*
+*                               (2) RFC #2001, Section 2.2 reiterates that "the TCP output routine never sends
+*                                   more than the minimum of cwnd and the receiver's advertised window".
+*
+*                               (3) RFC #2581, Section 3.1 also reiterates that "the minimum of cwnd and rwnd
+*                                   [receiver's advertised window] governs data transmission".
+*
+*                           (B) RFC #2581, Section 3 also states that "a TCP MUST NOT be more aggressive than
+*                               the [congestion control] algorithms allow (that is, MUST NOT send data when
+*                               the value of cwnd computed by the [congestion control] algorithms would not
+*                               allow the data to be sent)".
+*
+*                           (C) TCP transmit resulting from TCP congestion controls update handled by appropriate
+*                               TCP connection state receive handler function(s).
+*
+*                               See 'NetTCP_RxPktConnHandlerSyncRxd()    Note #1c3',
+*                                   'NetTCP_RxPktConnHandlerSyncTxd()    Note #1c3',
+*                                   'NetTCP_RxPktConnHandlerConn()       Note #1c',
+*                                   'NetTCP_RxPktConnHandlerFinWait1()   Note #1c',
+*                                   'NetTCP_RxPktConnHandlerClosing()    Note #1c',
+*                                   'NetTCP_RxPktConnHandlerCloseWait()  Note #1c',
+*                                 & 'NetTCP_RxPktConnHandlerLastAck()    Note #1c'.
+*
+*                       (4) (A) RFC #2001, Sections 3 & 4 state that "since ... a duplicate ACK is caused by
+*                               a lost segment or just a reordering of segments, ... [fast retransmit] waits
+*                               for a small number of duplicate ACKs to be received ... [as] a strong indication
+*                               that a segment has been lost ... [and] then performs a retransmission of what
+*                               appears to be the missing segment, without waiting for a retransmission timer
+*                               to expire.
+*
+*                               After fast retransmit sends ... the missing segment, congestion avoidance,
+*                               but not slow start is performed.  This is the fast recovery algorithm".
+*
+*                           (B) RFC #2581, Section 3.2 reiterates that "the TCP sender SHOULD use the 'fast
+*                               retransmit' algorithm to detect and repair loss, based on ... the arrival of
+*                               3 duplicate ACKs (4 identical ACKs without the arrival of any other intervening
+*                               packets) as an indication that a segment has been lost.  After receiving 3
+*                               duplicate ACKs, TCP performs a retransmission of what appears to be the missing
+*                               segment, without waiting for the retransmission timer to expire.
+*
+*                               After the fast retransmit algorithm sends ... the missing segment, the 'fast
+*                               recovery' algorithm ... can continue to transmit new segments ... (using a
+*                               reduced cwnd) ... until a non-duplicate ACK arrives".
+*
+*                   (c) (1) (A) RFC #2001, Section 2 states that the "congestion avoidance and slow start ...
+*                               combined algorithm operates as follows" :
+*
+*                               (1) "Initialization for a given connection sets" :
+*
+*                                   (a) "cwnd to one segment" ...
+*                                   (b) "and ssthresh to 65535 bytes."
+*
+*                               (3) (a) (1) "When congestion occurs (indicated by" :
+*
+*                                           (A) "a timeout"                            ...
+*                                           (B) "or the reception of duplicate ACKs)," ...
+*
+*                                       (2) "one-half of the current window size" :
+*
+*                                           (A) "the minimum of" :
+*                                               (1) "cwnd"                                 ...
+*                                               (2) "and the receiver's advertised window" ...
+*                                           (B) "but at least two segments" ...
+*
+*                                       (3) "is saved in ssthresh [slow start threshold]."
+*
+*                                   (b) (1) "Additionally, if the congestion is indicated by a timeout," ...
+*                                       (2) "cwnd is set to one segment (i.e., slow start)."
+*
+*                               (4) "When new data is acknowledged by the other end, increase cwnd, but the way
+*                                    it increases depends on whether TCP is performing slow start or congestion
+*                                    avoidance" :
+*
+*                                   (a) (1) (A) (1) (a) "If cwnd is less than or equal to ssthresh," ...
+*                                                   (b) "TCP is in slow start."
+*
+*                                               (2) "Slow start continues until TCP is halfway to where it was
+*                                                    when congestion occurred (since it recorded half of the
+*                                                    window size that caused the problem)."
+*
+*                                           (B) (1) "Slow start has cwnd" :
+*
+*                                                   (a) "Begin at one segment," ...
+*
+*                                                   (b) (1) "and be incremented by one segment" ...
+*                                                       (2) "every time an ACK is received."
+*
+*                                               (2) "The increase in cwnd ... [for] slow start increments cwnd
+*                                                    by the number of ACKs received in a round-trip time ...
+*                                                    [which] opens the window exponentially: send one segment,
+*                                                    then two, then four, and so on."
+*
+*                                       (2) RFC #2001, Section 1 states that :
+*
+*                                           (A) "Early implementations performed slow start only if the other
+*                                                end was on a different network."
+*
+*                                           (B) "Current implementations always perform slow start."
+*
+*                                   (b) (1) (A) "If cwnd is [not] less than or equal to ssthresh," ...
+*                                           (B) "TCP is performing congestion avoidance."
+*
+*                                       (2) (A) (1) "cwnd [is] incremented by segsize*segsize/cwnd" ...
+*                                                   (a) "where segsize is the segment size" ...
+*                                                   (b) "and cwnd is maintained in bytes";  ...
+*                                               (2) "each time an ACK is received."
+*
+*                                           (B) "This is a linear growth of cwnd ... The increase in cwnd should
+*                                                be at most one segment each round-trip time (regardless how many
+*                                                ACKs are received in that RTT)."
+*
+*                           (B) RFC #2001, Section 4 states that "the fast retransmit and fast recovery
+*                               algorithms are usually implemented together as follows" :
+*
+*                               (1) "When the third duplicate ACK in a row is received" :
+*
+*                                   (a) "Set ssthresh to" :
+*                                       (1) "one-half the current congestion window, cwnd" ...
+*                                       (2) "but no less than two segments."
+*
+*                                   (b) "Retransmit the missing segment."
+*
+*                                   (c) "Set cwnd to ssthresh plus 3 times the segment size."
+*
+*                               (2) "Each time another duplicate ACK arrives" :
+*
+*                                   (a) "Increment cwnd by the segment size."
+*                                   (b) "Transmit a packet, if allowed by the new value of cwnd."
+*
+*                               (3) "When the next ACK arrives that acknowledges new data" :
+*
+*                                   (a) "Set cwnd to ssthresh" (see Note #2c1B1a).
+*
+*                       (2) (A) RFC #2581, Section 3.1 defines the "slow start and congestion avoidance algorithms"
+*                               as follows :
+*
+*                               (1) (a) "The initial value of cwnd, MUST be" :
+*
+*                                       (1) "less than or equal to 2*SMSS bytes" ...
+*                                       (2) "and MUST NOT be more than 2 segments."
+*
+*                                   (b) "The initial value of ssthresh MAY be arbitrarily high" :
+*                                       (1) "some implementations use the size of the advertised window."
+*
+*                               (2) (a) "The slow start algorithm is used when cwnd < ssthresh," ...
+*                                   (b) "While the congestion avoidance algorithm is used when cwnd > ssthresh."
+*                                   (c) "When cwnd and ssthresh are equal the sender may use either slow start or
+*                                        congestion avoidance."
+*
+*                               (3) (a) "During slow start" :
+*
+*                                       (1) "a TCP increments cwnd by at most SMSS bytes" ...
+*                                       (2) "for each ACK received that acknowledges new data."
+*
+*                                   (b) "Slow start ends when" :
+*
+*                                       (1) "cwnd exceeds ... or ... reaches ... ssthresh" ...
+*                                       (2) "or when congestion is observed."
+*
+*                               (4) (a) "During congestion avoidance" :
+*
+*                                       (1) "cwnd is incremented by 1 full-sized segment per round-trip time (RTT)."
+*
+*                                       (2) (A) "One formula commonly used to update cwnd during congestion avoidance
+*                                                is given" by :
+*
+*                                               (2) cwnd += (SMSS * SMSS) / cwnd
+*
+*                                           (B) "Another acceptable way to increase cwnd during congestion avoidance
+*                                                is to count the number of bytes that have been acknowledged by ACKs
+*                                                for new data" :
+*
+*                                               (1) "When the number of bytes acknowledged reaches cwnd," ...
+*                                               (2) "then cwnd can be incremented by up to SMSS bytes."
+*
+*                                       (3) "This adjustment is executed on every incoming non-duplicate ACK."
+*
+*                                   (b) "Congestion avoidance continues until congestion is detected."
+*
+*                               (5) "When a TCP sender detects segment loss using the retransmission timer" :
+*
+*                                   (a) "the value of ssthresh MUST be set to no more than" :
+*
+*                                       (3) ssthresh = max (FlightSize / 2, 2 * SMSS)
+*
+*                                           (A) "FlightSize is the amount of outstanding data ... that has been
+*                                                sent but not yet acknowledged."
+*
+*                                   (b) "cwnd MUST be set to no more than ... 1 full-sized segment."
+*
+*                                   (c) "Therefore, after retransmitting the dropped segment the TCP sender uses
+*                                        the slow start algorithm to increase the window."
+*
+*                           (B) RFC #2581, Section 3.2 states that "the fast retransmit and fast recovery algorithms
+*                               are usually implemented together as follows" :
+*
+*                               (1) "When the third duplicate ACK is received" (see Note #2d1) :
+*
+*                                   (a) "Set ssthresh to no more than the value given [by the] equation"
+*                                           (see Note #2c2A5a3), ...
+*
+*                                   (b) "Retransmit the lost segment"
+*                                           (see Note #2d2),     ...
+*
+*                                   (c) "Set cwnd to ssthresh plus 3*SMSS."
+*                                       (1) "This artificially 'inflates' the congestion window by the number of
+*                                            segments (three) that have left the network and which the receiver
+*                                            has buffered."
+*
+*                               (2) "For each additional duplicate ACK received" :
+*
+*                                   (a) "Increment cwnd by SMSS."
+*                                       (1) "This artificially inflates the congestion window in order to reflect
+*                                            the additional segment that has left the network."
+*
+*                                   (b) (1) "Transmit a segment, if allowed by" :
+*
+*                                           (A) "the new value of cwnd" ...
+*                                           (B) "and the receiver's advertised window."
+*
+*                                       (2) TCP transmit resulting from TCP congestion controls update handled by
+*                                           appropriate TCP connection state receive handler function(s).
+*
+*                                           See also Note #2b3C.
+*
+*                               (3) (a) "When the next ACK arrives that acknowledges new data," ...
+*                                   (b) "Set cwnd to ssthresh" (see Note #2c2B1a).
+*
+*                   (d) (1) (A) RFC #1122, Section 4.2.2.21 states that "'fast retransmit' ... counts the number of
+*                               ... 'redundant' ACK's ... received with" :
+*
+*                               (1) "the same value of SEG.ACK and" ...
+*                               (2) "the same right window edge".
+*
+*                           (B) Although it is not directly stated, it is inferred that duplicate acknowledgements
+*                               SHOULD be :
+*
+*                               (1) Acknowledgement-only segments
+*                                   (a) i.e. with NO transmit data                              See Note #2d1C1
+*                                       (1) i.e. with NO TCP segment length
+*                               (2) With NO sequence number      update
+*                               (3) With NO receive  window size update                         See Note #2d1C2
+*
+*                           (C) Also although RFC #2581, Section 3.2 states that "the TCP sender SHOULD use the
+*                               'fast retransmit' algorithm ... based on ... the arrival of ... 4 identical ACKs
+*                               without the arrival of any other intervening packets"; it seems reasonable that
+*                               the TCP fast retransmit algorithm MUST NOT consider the arrival of non-duplicate
+*                               acknowledgement segments as "intervening packets".
+*
+*                               In other words, TCP fast retransmit MUST ignore the following TCP packets as
+*                               duplicate acknowledgement packets :
+*
+*                               (1) TCP data segments
+*                               (2) Remote host receive window updates
+*
+*                       (2) RFC #1122, Section 4.2.2.21 reiterates that "with this ... 'fast retransmit' ...
+*                           algorithm, the sender uses the redundant ACK's to deduce that a segment has been
+*                           lost before the retransmission timer has expired.  If more than a threshold number
+*                           of such ACK's is received, then the segment containing the octets starting at
+*                           SEG.ACK is assumed to have been lost and is retransmitted, without awaiting a
+*                           timeout".
+*
+*                   (e) (1) RFC #2581, Section 4.1 states that "after TCP has been idle for a relatively long period
+*                           of time ... use slow start to restart transmission" :
+*
+*                           (A) (1) "If the TCP has not sent data in an interval exceeding the retransmission timeout"
+*                               (2) "cwnd is reduced to ... no more than ... the value of the restart window"
+*                                       (see Note #2c2A1).
+*
+*                               See also 'NetTCP_TxConnTxQ_TimeoutIdle()  Note #2a'.
+*
+*                           (B) Although NO RFC specifies that a TCP connection's slow start threshold should be
+*                               reset following a TCP transmit idle timeout; it seems reasonable to reset the slow
+*                               start threshold whenever the TCP transmit congestion window is reset.
+*
+*                           See also 'NetTCP_TxConnWinSizeCfgCongCtrl()  Notes #2 & #3'.
+*
+*                       (2) RFC #1122, Section 4.2.3.9 'Source Quench' states that "TCP MUST react to a Source Quench
+*                           by slowing transmission on the connection.  The RECOMMENDED procedure is ... to trigger a
+*                           'slow start', as if a retransmission timeout had occurred".
+*
+*               (3) (a) (1) The following sections ... :
+*
+*                           (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                                   ESTABLISHED STATE'
+*                           (B) RFC #1122, Section 4.2.2.20.(c)
+*                           (C) RFC #1122, Section 4.2.2.20.(f)
+*
+*                       (2) ... generalize that "the following variables should be set ... [when] the send
+*                           window should be updated" :
+*
+*                           (A) SND.WND <- SEG.WND
+*
+*                               (1) A TCP connection's remote host receive window advertisements are relative
+*                                   to the received window advertisement acknowledgement sequence number, &
+*                                   are asynchronous to the TCP connection's recent transmitted sequences.
+*
+*                                   Therefore, the actual transmit remote window size MUST be compensated by
+*                                   the difference in the remote host receive window advertisement & the TCP
+*                                   connection's number of recently transmitted sequences :
+*
+*                                       (a) TxWinSizeRemoteActual  =  SEG.WIN  -  (SND.NXT - SEG.ACK)
+*
+*                                               where
+*
+*                                                   TxWinSizeRemoteActual   TCP connection's actual transmit
+*                                                                               remote window size
+*
+*                           (B) SND.WL1 <- SEG.SEQ
+*                           (C) SND.WL2 <- SEG.ACK
+*
+*                   (b) RFC #1122, Section 4.2.3.4 'IMPLEMENTATION' states that "because the sender does not
+*                       know (directly) the receiver's total buffer space RCV.BUFF ... An approach [that] has
+*                       been found to work well is for the sender to calculate Max(SND.WND), the maximum send
+*                       window it has seen so far on the connection, and to use this value as an estimate of
+*                       RCV.BUFF".
+*
+*                   (c) RFC #1122, Section 4.2.2.17 states that although "a TCP MAY keep its offered receive
+*                       window closed indefinitely ... the sending TCP MUST allow the connection to stay open
+*                       ... as long as the receiving TCP continues to send acknowledgments in response to ...
+*                       probe segments".
+*
+*                       See also 'NetTCP_TxConnWinSizeZeroWinHandler()  Note #1'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeHandlerCongCtrl (NET_TCP_CONN      *p_conn,
+                                                   NET_BUF_HDR       *p_buf_hdr,
+                                                   NET_TCP_ACK_CODE   ack_code,
+                                                   NET_TCP_WIN_SIZE   win_update_size,
+                                                   NET_TCP_WIN_CODE   win_update_code,
+                                                   NET_ERR           *p_err)
+{
+    CPU_BOOLEAN       ack_dup;
+    NET_TCP_WIN_SIZE  tx_win_size_remote_actual;
+    NET_TCP_WIN_SIZE  tx_win_size_remote_actual_min;
+
+
+    switch (win_update_code) {
+        case NET_TCP_CONN_TX_WIN_RESET:
+        default:
+             NetTCP_TxConnWinSizeCfgCongCtrl(p_conn);           /* Reset tx cong ctrls (see Note #2e).                  */
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_SEG_RXD:
+             switch (ack_code) {
+                 case NET_TCP_CONN_RX_ACK_VALID:
+                                                                /* ------------------ FAST RECOVERY ------------------- */
+                                                                /* If valid ack rx'd after fast re-tx th, ..            */
+                      if (p_conn->TxWinRxdAckDupCtr >= NET_TCP_FAST_RE_TX_ACK_DUP_TH) {
+                                                                /* .. perform fast recovery (see Note #2c2B3) :         */
+                                                                /* .. set cong win to slow start th       ..            */
+                                                                /* ..                       (see Note #2c2B3b).         */
+                          NetTCP_TxConnWinSizeCongSet(p_conn, NET_TCP_CONN_TX_WIN_CONG_SET_SLOW_START);
+                          NetTCP_TxConnWinSizeUpdateAvail(p_conn); /* Update avail tx win (see Note #2b3).              */
+
+
+                      } else {                                  /* ----------- SLOW START / CONG AVOIDANCE ------------ */
+                                                                /* If cong win <  slow start th ..                      */
+                                                                /* .. (see Notes #2c2A2a),      ..                      */
+                          if (p_conn->TxWinSizeCongCalcdActual < p_conn->TxWinSizeSlowStartTh) {
+                                                                /* .. perform slow start  (see Note #2c2A3) :           */
+                                                                /* .. inc cong win by MSS (see Note #2c2A3a1).          */
+                              NetTCP_TxConnWinSizeCongInc(p_conn, p_buf_hdr, 0u, NET_TCP_CONN_TX_WIN_CONG_INC_SLOW_START);
+
+                          } else {                              /* If cong win >= slow start th     ..                  */
+                                                                /* .. (see Note #2c2A2b & #2c2A2c), ..                  */
+                                                                /* .. perform cong avoid  (see Note #2c2A4) :           */
+                                                                /* .. inc cong win        (see Note #2c2A4a2B).         */
+                              NetTCP_TxConnWinSizeCongInc(p_conn, p_buf_hdr, 0u, NET_TCP_CONN_TX_WIN_CONG_INC_CONG_AVOID);
+                          }
+
+                          NetTCP_TxConnWinSizeUpdateAvail(p_conn); /* Update avail tx win (see Note #2b3A).             */
+                      }
+
+#if 0                                                           /* Tx avail seg(s)     [see Note #2b3C].                */
+                      NetTCP_TxConnTxQ(p_conn, p_buf_hdr, ack_code, DEF_NO, NET_TCP_CONN_CLOSE_ALL, DEF_YES, p_err);
+                      switch (*p_err) {
+                          case NET_TCP_ERR_NONE:
+                          case NET_TCP_ERR_CONN_ACK_NONE:
+                          case NET_TCP_ERR_CONN_ACK_INVALID:
+                          case NET_TCP_ERR_CONN_ACK_DLYD:
+                          case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+                          case NET_ERR_TX:                      /* Ignore transitory tx err(s).                         */
+                          case NET_ERR_IF_LINK_DOWN:
+                               break;
+
+
+                          case NET_TCP_ERR_CONN_NOT_USED:
+                          case NET_TCP_ERR_CONN_CLOSE:
+                          case NET_TCP_ERR_CONN_FAULT:
+                          case NET_TCP_ERR_CONN_FAIL:
+                          case NET_TCP_ERR_INVALID_CONN_STATE:
+                          case NET_TCP_ERR_INVALID_CONN_OP:
+                          case NET_TCP_ERR_INVALID_LEN_SEG:
+                          case NET_TCP_ERR_NONE_AVAIL:
+                          case NET_TCP_ERR_TX_PKT:
+                          case NET_ERR_IF_LOOPBACK_DIS:
+                          case NET_CONN_ERR_INVALID_FAMILY:
+                          case NET_CONN_ERR_INVALID_ADDR:
+                          case NET_CONN_ERR_INVALID_ADDR_LEN:
+                          default:
+                               return;
+                      }
+#endif
+                                                                /* Reset dup ack ctrls.                                 */
+                      NetTCP_TxConnWinSizeDupAckCtrlUpdate(p_conn, p_buf_hdr, DEF_YES);
+                      break;
+
+
+                 case NET_TCP_CONN_RX_ACK_DUP:                  /* ------------ FAST RE-TX / FAST RECOVERY ------------ */
+                                                                /* Chk dup ack (see Notes #2b4 & #2d1).                 */
+                      ack_dup = ((p_buf_hdr->TCP_SeqNbr  == p_conn->TxWinRxdLastSeqNbr ) &&
+                                 (p_buf_hdr->TCP_AckNbr  == p_conn->TxWinRxdLastAckNbr ) &&
+                                 (p_buf_hdr->TCP_WinSize == p_conn->TxWinRxdLastWinSize) &&
+                                 (p_buf_hdr->TCP_SegLen  <  1                         )) ? DEF_YES : DEF_NO;
+
+                      if (ack_dup == DEF_YES) {                 /* If     dup ack, ..                                   */
+                          p_conn->TxWinRxdAckDupCtr++;          /* .. inc dup ack ctr.                                  */
+
+                                                                /* If equal to fast re-tx th,                ..         */
+                          if (p_conn->TxWinRxdAckDupCtr == NET_TCP_FAST_RE_TX_ACK_DUP_TH) {
+                                                                /* .. perform fast re-tx (see Note #2c2B1) : ..         */
+                                                                /* .. calc slow start th (see Note #2c2B1a); ..         */
+                              NetTCP_TxConnWinSizeCalcSlowStartTh(p_conn);
+                                                                /* .. re-tx unack'd seg  (see Note #2c2B1b); ..         */
+                              NetTCP_TxConnReTxQ(p_conn, DEF_NO, NET_TCP_CONN_CLOSE_ALL, p_err);
+                              switch (*p_err) {
+                                  case NET_TCP_ERR_NONE:
+                                  case NET_ERR_TX:              /* Ignore transitory re-tx err(s).                      */
+                                  case NET_ERR_IF_LINK_DOWN:
+                                  case NET_ERR_TX_BUF_LOCK:
+                                       break;
+
+
+                                  case NET_TCP_ERR_CONN_NOT_USED:
+                                  case NET_TCP_ERR_CONN_FAULT:
+                                  case NET_TCP_ERR_INVALID_CONN_STATE:
+                                  case NET_TCP_ERR_INVALID_CONN_OP:
+                                  case NET_TCP_ERR_TX_PKT:
+                                  case NET_TCP_ERR_RE_TX_SEG_TH:
+                                  case NET_ERR_IF_LOOPBACK_DIS:
+                                  default:
+                                       return;
+                              }
+                                                                /* .. set cong win to fast recovery th      ..          */
+                                                                /* ..                    (see Note #2c2B1c).            */
+                              NetTCP_TxConnWinSizeCongSet(p_conn, NET_TCP_CONN_TX_WIN_CONG_SET_FAST_RECOVERY);
+                              NetTCP_TxConnWinSizeUpdateAvail(p_conn); /* Update avail tx win   (see Note #2b3).        */
+
+
+                                                                /* Else if  > fast re-tx th,                ..          */
+                          } else if (p_conn->TxWinRxdAckDupCtr > NET_TCP_FAST_RE_TX_ACK_DUP_TH) {
+                                                                /* .. perform fast recovery (see Note #2c2B2) :         */
+                                                                /* .. inc cong win by MSS   (see Note #2c2B2a),         */
+                              NetTCP_TxConnWinSizeCongInc(p_conn, p_buf_hdr, 0u, NET_TCP_CONN_TX_WIN_CONG_INC_SLOW_START);
+                              NetTCP_TxConnWinSizeUpdateAvail(p_conn); /* .. update avail tx win   (see Note #2b3) ..   */
+#if 0                                                           /* .. & tx avail seg(s)     [see Note #2c2B2b].         */
+                              NetTCP_TxConnTxQ(p_conn, p_buf_hdr, ack_code, DEF_NO, NET_TCP_CONN_CLOSE_ALL, DEF_YES, p_err);
+                              switch (*p_err) {
+                                  case NET_TCP_ERR_NONE:
+                                  case NET_TCP_ERR_CONN_ACK_NONE:
+                                  case NET_TCP_ERR_CONN_ACK_INVALID:
+                                  case NET_TCP_ERR_CONN_ACK_DLYD:
+                                  case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+                                  case NET_ERR_TX:              /* Ignore transitory tx err(s).                         */
+                                  case NET_ERR_IF_LINK_DOWN:
+                                       break;
+
+
+                                  case NET_TCP_ERR_CONN_NOT_USED:
+                                  case NET_TCP_ERR_CONN_CLOSE:
+                                  case NET_TCP_ERR_CONN_FAULT:
+                                  case NET_TCP_ERR_CONN_FAIL:
+                                  case NET_TCP_ERR_INVALID_CONN_STATE:
+                                  case NET_TCP_ERR_INVALID_CONN_OP:
+                                  case NET_TCP_ERR_INVALID_LEN_SEG:
+                                  case NET_TCP_ERR_NONE_AVAIL:
+                                  case NET_TCP_ERR_TX_PKT:
+                                  case NET_ERR_IF_LOOPBACK_DIS:
+                                  case NET_CONN_ERR_INVALID_FAMILY:
+                                  case NET_CONN_ERR_INVALID_ADDR:
+                                  case NET_CONN_ERR_INVALID_ADDR_LEN:
+                                  default:
+                                       return;
+                              }
+#endif
+                          } else {
+                              ;
+                          }
+
+
+                      } else {                                  /* Else update dup ack ctrls (see Note #2d1C).          */
+                          NetTCP_TxConnWinSizeDupAckCtrlUpdate(p_conn, p_buf_hdr, DEF_NO);
+                      }
+                      break;
+
+
+                 case NET_TCP_CONN_RX_ACK_PREV:                 /* Ignore prev dup acks.                                */
+                     *p_err = NET_TCP_ERR_NONE;
+                      return;
+
+
+                 case NET_TCP_CONN_RX_ACK_NONE:
+                 case NET_TCP_CONN_RX_ACK_INVALID:
+                 default:
+                     *p_err = NET_TCP_ERR_CONN_FAIL;
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_TIMEOUT:                       /* -------------------- SLOW START -------------------- */
+                                                                /* On timeout (see Note #2c2A5),             ..         */
+                                                                /* .. perform slow start (see Note #2c2A5c) :           */
+             NetTCP_TxConnWinSizeCalcSlowStartTh(p_conn);       /* .. calc slow start th (see Note #2c2A5a); ..         */
+                                                                /* .. set cong win to timeout th             ..         */
+                                                                /* ..                    (see Note #2c2A5b).            */
+             NetTCP_TxConnWinSizeCongSet(p_conn, NET_TCP_CONN_TX_WIN_CONG_SET_TIMEOUT);
+             NetTCP_TxConnWinSizeUpdateAvail(p_conn);           /* Update avail tx win   (see Note #2b3).               */
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_INC:
+             if (win_update_size < 1) {                         /* If NO win update, do NOT update win.                 */
+                 break;
+             }
+                                                                /* Inc rem cong win size.                               */
+             NetTCP_TxConnWinSizeCongInc(p_conn, p_buf_hdr, win_update_size, NET_TCP_CONN_TX_WIN_CONG_INC_REM);
+             NetTCP_TxConnWinSizeUpdateAvail(p_conn);           /* Update avail tx win (see Note #2b3).                 */
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_DEC:
+             if (win_update_size < 1) {                         /* If NO win update, do NOT update win.                 */
+                 break;
+             }
+
+             if (p_conn->TxWinSizeCongRem >  win_update_size) { /* If rem cong   win size >  win update, ..             */
+                 p_conn->TxWinSizeCongRem -= win_update_size;   /* .. dec cong   win size by win update.                */
+             } else {
+                 p_conn->TxWinSizeCongRem  = 0u;                /* Else lim to min cong   win size.                     */
+             }
+
+             if (p_conn->TxWinSizeRemoteRem >  win_update_size) { /* If rem remote win size >  win update, ..           */
+                 p_conn->TxWinSizeRemoteRem -= win_update_size; /* .. dec remote win size by win update.                */
+             } else {
+                 p_conn->TxWinSizeRemoteRem  = 0u;              /* Else lim to min remote win size.                     */
+             }
+
+             NetTCP_TxConnWinSizeUpdateAvail(p_conn);           /* Update avail tx win (see Note #2b3).                 */
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_REMOTE_UPDATE:
+                                                                /* Calc actual tx remote win (see Note #3a2A1a).        */
+             tx_win_size_remote_actual     = (NET_TCP_WIN_SIZE)(p_buf_hdr->TCP_WinSize - (p_conn->TxSeqNbrNext - p_buf_hdr->TCP_AckNbr));
+             tx_win_size_remote_actual_min = (NET_TCP_WIN_SIZE) DEF_MIN(p_buf_hdr->TCP_WinSize, tx_win_size_remote_actual);
+                                                                /* Update      tx remote win (see Note #3a2).           */
+             p_conn->TxWinSizeRemote        = (NET_TCP_WIN_SIZE) p_buf_hdr->TCP_WinSize;
+             p_conn->TxWinSizeRemoteActual  = (NET_TCP_WIN_SIZE) tx_win_size_remote_actual_min;
+             p_conn->TxWinSizeRemoteRem     = (NET_TCP_WIN_SIZE) p_conn->TxWinSizeRemoteActual;
+             p_conn->TxWinUpdateSeqNbr      = (NET_TCP_SEQ_NBR ) p_buf_hdr->TCP_SeqNbr;
+             p_conn->TxWinUpdateAckNbr      = (NET_TCP_SEQ_NBR ) p_buf_hdr->TCP_AckNbr;
+             p_conn->TxWinUpdateWinSize     = (NET_TCP_WIN_SIZE) p_buf_hdr->TCP_WinSize;
+
+             if (p_conn->TxWinSizeRemoteMax < p_conn->TxWinSizeRemote) { /* If max < updated remote win size, ...       */
+                 p_conn->TxWinSizeRemoteMax = p_conn->TxWinSizeRemote; /* ... set as new max   (see Note #3b).          */
+
+                 NetTCP_TxConnWinSizeCfgMinTh(p_conn);          /* Cfg new tx silly win min th.                         */
+             }
+                                                                /* Handle zero win size (see Note #3c).                 */
+             NetTCP_TxConnWinSizeZeroWinHandler(p_conn, NET_TCP_CONN_TX_WIN_REMOTE_UPDATE, NET_TCP_CONN_CLOSE_ALL);
+
+             NetTCP_TxConnWinSizeUpdateAvail(p_conn);           /* Update avail tx win  (see Note #2b3).                */
+             break;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetTCP_TxConnWinSizeCalcSlowStartTh()
+*
+* Description : Calculate TCP connection's transmit slow start threshold.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Note(s)     : (1) RFC #2581, Section 3.1 states that :
+*
+*                   (a) "the value of ssthresh MUST be set to no more than" :
+*
+*                       (3) ssthresh = max (FlightSize / 2, 2 * SMSS)
+*
+*                           (A) "FlightSize is the amount of outstanding data ... that has been sent but
+*                                not yet acknowledged."
+*
+*                   See also 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Note #2c2A5a'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeCalcSlowStartTh (NET_TCP_CONN  *p_conn)
+{
+    NET_TCP_SEQ_NBR   tx_data_unackd;
+    NET_TCP_SEQ_NBR   tx_data_unackd_th;
+    NET_TCP_SEG_SIZE  max_seg_size_th;
+
+                                                                /* Calc slow start th (see Note #1a3).                  */
+    tx_data_unackd              = (NET_TCP_SEQ_NBR ) (p_conn->TxSeqNbrNext - p_conn->TxSeqNbrUnAckd);
+    tx_data_unackd_th           = (NET_TCP_SEQ_NBR )((tx_data_unackd * NET_TCP_SST_UNACKD_DATA_NUMER)
+                                                                     / NET_TCP_SST_UNACKD_DATA_DENOM);
+
+    max_seg_size_th             = (NET_TCP_SEG_SIZE)p_conn->MaxSegSizeConn * NET_TCP_SST_MSS_SCALAR;
+
+    p_conn->TxWinSizeSlowStartTh = (NET_TCP_WIN_SIZE)DEF_MAX(tx_data_unackd_th,
+                                                            max_seg_size_th);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_TxConnWinSizeCongSet()
+*
+* Description : Set TCP connection's transmit congestion window.
+*
+* Argument(s) : p_conn           Pointer to a TCP connection.
+*               -----           Argument validated in NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+*               win_inc_code    Indicate how to set TCP connection transmit congestion window :
+*
+*                                   NET_TCP_CONN_TX_WIN_CONG_SET_SLOW_START         Set TCP connection's congestion
+*                                                                                       control transmit window size
+*                                                                                       based on slow start.
+*
+*                                   NET_TCP_CONN_TX_WIN_CONG_SET_FAST_RECOVERY      Set TCP connection's congestion
+*                                                                                       control transmit window size
+*                                                                                       based on fast recovery
+*                                                                                       (see Note #1a).
+*
+*                                   NET_TCP_CONN_TX_WIN_CONG_SET_TIMEOUT            Set TCP connection's congestion
+*                                                                                       control transmit window size
+*                                                                                       based on transmission timeout
+*                                                                                       (see Note #1b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Note(s)     : (1) (a) RFC #2581, Section 3.2 states that "when the third duplicate ACK is received ...
+*                       [for] fast recovery ... set cwnd to ssthresh plus 3*SMSS".
+*
+*                       See also 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Note #2c2B1c'.
+*
+*                   (b) RFC #2581, Section 3.1 states that "when a TCP sender detects segment loss using the
+*                       retransmission timer ... cwnd MUST be set to no more than ... 1 full-sized segment".
+*
+*                       See also 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Note #2c2A5b'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeCongSet (NET_TCP_CONN      *p_conn,
+                                           NET_TCP_WIN_CODE   win_inc_code)
+{
+    NET_TCP_WIN_SIZE  win_size_set;
+
+
+    switch (win_inc_code) {
+        case NET_TCP_CONN_TX_WIN_CONG_SET_SLOW_START:
+             win_size_set  = (NET_TCP_WIN_SIZE)p_conn->TxWinSizeSlowStartTh;
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_CONG_SET_FAST_RECOVERY:        /* See Note #1a.                                        */
+             win_size_set  = (NET_TCP_WIN_SIZE)p_conn->TxWinSizeSlowStartTh;
+             win_size_set += (NET_TCP_WIN_SIZE)p_conn->MaxSegSizeConn * NET_TCP_FAST_RECOVERY_MSS_SCALAR;
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_CONG_SET_TIMEOUT:              /* See Note #1b.                                        */
+        default:
+             win_size_set  = (NET_TCP_WIN_SIZE)p_conn->MaxSegSizeConn * NET_TCP_CONG_WIN_MSS_SCALAR_TIMEOUT;
+             break;
+    }
+
+    p_conn->TxWinSizeCongCalcdActual = win_size_set;
+    p_conn->TxWinSizeCongCalcdCur    = 0u;
+    p_conn->TxWinSizeCongRem         = p_conn->TxWinSizeCongCalcdActual;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_TxConnWinSizeCongInc()
+*
+* Description : Increment TCP connection's transmit congestion window.
+*
+* Argument(s) : p_conn               Pointer to a TCP connection.
+*               -----               Argument validated in NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+*               p_buf_hdr            Pointer to network buffer header that received TCP packet.
+*               --------            Argument validated in NetTCP_Rx().
+*
+*               win_update_size     Size to increment TCP connection's transmit congestion window (in octets).
+*
+*               win_inc_code    Indicate how to increment TCP connection transmit congestion window :
+*
+*                                   NET_TCP_CONN_TX_WIN_CONG_INC_SLOW_START     Increment TCP connection's congestion
+*                                                                                   control transmit window size
+*                                                                                   based on slow start
+*                                                                                   (see Note #1a).
+*
+*                                   NET_TCP_CONN_TX_WIN_CONG_INC_CONG_AVOID     Increment TCP connection's congestion
+*                                                                                   control transmit window size
+*                                                                                   based on congestion avoidance
+*                                                                                   (see Note #1b).
+*
+*                                   NET_TCP_CONN_TX_WIN_CONG_INC_REM            Increment TCP connection's congestion
+*                                                                                   control transmit window size
+*                                                                                   remaining.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Note(s)     : (1) RFC #2581, Section 3.1 states that :
+*
+*                   (a) "During slow start, a TCP increments cwnd by at most SMSS bytes for each ACK received
+*                        that acknowledges new data."
+*
+*                       See also 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Note #2c2A3a'.
+*
+*                   (b) "During congestion avoidance, cwnd is incremented by 1 full-sized segment per round-
+*                        trip time (RTT) ... [An] acceptable way to increase cwnd during congestion avoidance
+*                        is to" :
+*
+*                       (1) "Count the number of bytes that have been acknowledged by ACKs for new data."
+*
+*                           (A) The following equation calculates the number of octets that acknowledge
+*                               new data for a TCP connection :
+*
+*                                   Number of Octets Acknowledged  =  (SEG.ACK - SND.UNA)
+*
+*                           (B) However, since TCP connection transmit congestion controls are
+*                               updated following any TCP connection re-transmit queue handling
+*                               (see 'NetTCP_RxPktConnHandlerSeg()  Notes #1c & #1d'); the saved
+*                               previous value of the TCP connection's last unacknowledged
+*                               transmit sequence number ('TxSeqNbrUnackdPrev') MUST be used
+*                               (see 'NetTCP_RxPktConnHandlerReTxQ()  Note #4').
+*
+*                       (2) "When the number of bytes acknowledged reaches cwnd," ...
+*                       (3) "then cwnd can be incremented by up to SMSS bytes."
+*
+*                       See also 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Note #2c2A4'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeCongInc (NET_TCP_CONN      *p_conn,
+                                           NET_BUF_HDR       *p_buf_hdr,
+                                           NET_TCP_WIN_SIZE   win_update_size,
+                                           NET_TCP_WIN_CODE   win_inc_code)
+{
+    CPU_BOOLEAN       win_size_rem_update;
+    NET_TCP_WIN_SIZE  win_size_inc;
+    NET_TCP_WIN_SIZE  win_size_inc_mss;
+    NET_TCP_WIN_SIZE  win_size_inc_rem;
+    NET_TCP_WIN_SIZE  win_size_avail;
+
+
+    win_size_rem_update =  DEF_NO;
+    win_size_inc_mss    = (NET_TCP_WIN_SIZE)p_conn->MaxSegSizeConn * NET_TCP_CONG_WIN_MSS_SCALAR_INC;
+
+    switch (win_inc_code) {
+        case NET_TCP_CONN_TX_WIN_CONG_INC_SLOW_START:           /* See Note #1a.                                        */
+        default:
+             win_size_avail = NET_TCP_WIN_SIZE_MAX - p_conn->TxWinSizeCongCalcdActual;
+             if (win_size_inc_mss < win_size_avail) {           /* If inc < max avail, ..                               */
+                 p_conn->TxWinSizeCongCalcdActual += win_size_inc_mss; /* .. inc cong win by MSS (see Note #1a).        */
+             } else {
+                 p_conn->TxWinSizeCongCalcdActual  = NET_TCP_WIN_SIZE_MAX; /* Else set cong win to max.                 */
+             }
+
+             p_conn->TxWinSizeCongCalcdCur = 0u;
+             win_size_rem_update          = DEF_YES;
+             win_size_inc_rem             = win_size_inc_mss;
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_CONG_INC_CONG_AVOID:           /* See Note #1b.                                        */
+                                                                /* Calc nbr ack'd octets   (see Note #1b1).             */
+             win_size_inc   = (NET_TCP_WIN_SIZE)(p_buf_hdr->TCP_AckNbr - p_conn->TxSeqNbrUnAckdPrev);
+
+             win_size_avail =  NET_TCP_WIN_SIZE_MAX - p_conn->TxWinSizeCongCalcdActual;
+             if (win_size_inc < win_size_avail) {               /* If inc < max avail, ..                               */
+                 p_conn->TxWinSizeCongCalcdCur += win_size_inc; /* .. inc nbr ack'd octets (see Note #1b1).             */
+                                                                /* If  >= cong win         (see Note #1b2),             */
+                                                                /* .. inc cong win by MSS  (see Note #1b3).             */
+                 if (p_conn->TxWinSizeCongCalcdCur >= p_conn->TxWinSizeCongCalcdActual) {
+                     p_conn->TxWinSizeCongCalcdCur -= p_conn->TxWinSizeCongCalcdActual;
+
+                     win_size_avail = NET_TCP_WIN_SIZE_MAX - p_conn->TxWinSizeCongCalcdActual;
+                     if (win_size_inc_mss < win_size_avail) {
+                          p_conn->TxWinSizeCongCalcdActual += win_size_inc_mss;
+                     } else {
+                          p_conn->TxWinSizeCongCalcdActual  = NET_TCP_WIN_SIZE_MAX;
+                     }
+                                                                /* Cfg rem cong win inc by MSS.                         */
+                     win_size_rem_update = DEF_YES;
+                     win_size_inc_rem    = win_size_inc_mss;
+                 }
+
+             } else {                                           /* Else set cong win to max.                            */
+                 p_conn->TxWinSizeCongCalcdActual = NET_TCP_WIN_SIZE_MAX;
+
+                 win_size_avail = NET_TCP_WIN_SIZE_MAX - p_conn->TxWinSizeCongCalcdCur;
+                 if (win_size_inc < win_size_avail) {           /* If inc < max avail, ..                               */
+                     p_conn->TxWinSizeCongCalcdCur += win_size_inc; /* .. inc nbr ack'd octets (see Note #1b1).         */
+
+                 } else {                                       /* Else set nbr ack'd octets to inc ovf ...             */
+                     p_conn->TxWinSizeCongCalcdCur  = win_size_inc - win_size_avail;
+                                                                /* ... & cfg rem cong win inc by MSS.                   */
+                     win_size_rem_update           = DEF_YES;
+                     win_size_inc_rem              = win_size_inc_mss;
+                 }
+             }
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_CONG_INC_REM:                  /* Cfg rem cong win inc by win update size.             */
+             win_size_rem_update = DEF_YES;
+             win_size_inc_rem    = win_update_size;
+             break;
+    }
+
+
+    if (win_size_rem_update == DEF_YES) {                       /* If rem tx cong win update req'd  ...                 */
+        if (p_conn->TxWinSizeCongRem < p_conn->TxWinSizeCongCalcdActual) { /* ... & < actual tx cong win size, ...      */
+                                                                /* ... inc rem tx cong win size.                        */
+            win_size_avail = p_conn->TxWinSizeCongCalcdActual - p_conn->TxWinSizeCongRem;
+            if (win_size_inc_rem < win_size_avail) {            /* If avail win size > rem inc, ...                     */
+                p_conn->TxWinSizeCongRem += win_size_inc_rem;   /* ... inc rem tx cong win size by rem inc.             */
+            } else {                                            /* Else lim to actual tx cong win size.                 */
+                p_conn->TxWinSizeCongRem  = p_conn->TxWinSizeCongCalcdActual;
+            }
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_TxConnWinSizeUpdateAvail()
+*
+* Description : Update TCP connection's available transmit window.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeCfgCongCtrl(),
+*               NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Note(s)     : (1) (a) RFC #2001, Section 1 states that "the sender can transmit up to the minimum
+*                       of the congestion window and the advertised window."
+*
+*                   (b) RFC #2001, Section 2.2 reiterates that "the TCP output routine never sends
+*                       more than the minimum of cwnd and the receiver's advertised window".
+*
+*                   (c) RFC #2581, Section 3.1 also reiterates that "the minimum of cwnd and rwnd
+*                       [receiver's advertised window] governs data transmission".
+*
+*                   See also 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Note #2b3'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeUpdateAvail (NET_TCP_CONN  *p_conn)
+{
+                                                                /* Calc avail tx win (see Note #1).                     */
+    p_conn->TxWinSizeAvail = DEF_MIN(p_conn->TxWinSizeCongRem,
+                                    p_conn->TxWinSizeRemoteRem);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetTCP_TxConnWinSizeDupAckCtrlReset()
+*
+* Description : Reset TCP connection's transmit window duplicate acknowledgement controls.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnWinSizeCfgCongCtrl().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeCfgCongCtrl().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeDupAckCtrlReset (NET_TCP_CONN  *p_conn)
+{
+    p_conn->TxWinRxdLastSeqNbr  = p_conn->RxSeqNbrNext;
+    p_conn->TxWinRxdLastAckNbr  = p_conn->TxSeqNbrNext;
+    p_conn->TxWinRxdLastWinSize = p_conn->TxWinSizeRemote;
+    p_conn->TxWinRxdAckDupCtr   = 0u;
+}
+
+
+/*
+*********************************************************************************************************
+*                               NetTCP_TxConnWinSizeDupAckCtrlUpdate()
+*
+* Description : Update TCP connection's transmit window duplicate acknowledgment controls.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+*               p_buf_hdr    Pointer to network buffer header that received TCP packet.
+*               --------    Argument validated in NetTCP_Rx().
+*
+*               reset_ctr   Indicate whether to reset the duplicate acknowledgment counter :
+*
+*                               DEF_YES                Reset duplicate acknowledgment counter.
+*                               DEF_NO          Do NOT reset duplicate acknowledgment counter.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeDupAckCtrlUpdate (NET_TCP_CONN  *p_conn,
+                                                    NET_BUF_HDR   *p_buf_hdr,
+                                                    CPU_BOOLEAN    reset_ctr)
+{
+    p_conn->TxWinRxdLastSeqNbr  = p_buf_hdr->TCP_SeqNbr;
+    p_conn->TxWinRxdLastAckNbr  = p_buf_hdr->TCP_AckNbr;
+    p_conn->TxWinRxdLastWinSize = p_buf_hdr->TCP_WinSize;
+
+    if (reset_ctr == DEF_YES) {
+        p_conn->TxWinRxdAckDupCtr = 0u;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_TxConnWinSizeZeroWinHandler()
+*
+* Description : Handle TCP connection's transmit queue zero window.
+*
+* Argument(s) : p_conn              Pointer to TCP connection.
+*               -----               Argument validated in NetTCP_TxConnWinSizeHandlerCongCtrl(),
+*                                                         NetTCP_TxConnWinSizeZeroWinTimeout().
+*
+*               win_update_code     Indicate how to update TCP connection transmit window :
+*
+*                                       NET_TCP_CONN_TX_WIN_REMOTE_UPDATE   Handle TCP connection's remote
+*                                                                               receive      window size update.
+*                                       NET_TCP_CONN_TX_WIN_TIMEOUT         Handle TCP connection's remote
+*                                                                               receive zero window size timeout.
+*
+*               close_code      Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_CLOSE_NONE                 Perform NO  close actions.
+*                                   NET_TCP_CONN_CLOSE_ALL                  Perform ALL close actions.
+*
+*                                   NET_TCP_CONN_CLOSE_CONN_TX_RESET        Perform close connection transmit reset.
+*                                   NET_TCP_CONN_CLOSE_CONN_ALL             Perform ALL   connection close    actions.
+*
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE          Close    transmit idle                  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN     Close    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN      Close    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY       Close    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_RE_TX            Close re-transmit                       timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_KEEP_ALIVE       Close connection keep-alive             timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_ALL              Close ALL                               timers.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeZeroWinTimeout(),
+*               NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Note(s)     : (1) RFC #1122, Section 4.2.2.17 states that although "a TCP MAY keep its offered receive
+*                   window closed indefinitely ... the sending TCP MUST allow the connection to stay open
+*                   ... as long as the receiving TCP continues to send acknowledgments in response to ...
+*                   probe segments".
+*
+*                   (a) "Probing of zero (offered) windows MUST be supported."
+*
+*                       (1) "If zero window probing is not supported, a connection may hang forever when
+*                            an ACK segment that re-opens the window is lost."
+*
+*                           See also Note #1c2.
+*
+*                   (b) (1) "The transmitting host SHOULD send the first zero-window probe when a zero
+*                            window has existed for the retransmission timeout period," ...
+*
+*                       (2) "and SHOULD increase exponentially the interval between successive probes."
+*
+*                           (A) "Exponential backoff is recommended ... similar to ... the retransmission
+*                                algorithm, and it may be possible to combine the two procedures in the
+*                                implementation."
+*
+*                               See also 'NetTCP_TxConnRTO_CalcBackOff()  Notes #1 & #2'.
+*
+*                           (B) (1) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 22.2,
+*                                   Page 325 reiterates that "the normal TCP exponential backoff is used
+*                                   when calculating the persist timer".
+*
+*                               (2) However, "the persist timer is always bounded between 5 and 60 seconds".
+*
+*                           (C) Therefore, it seems reasonable to implement TCP zero window probes with
+*                               the same algorithm as TCP retransmissions, including limiting zero window
+*                               probes' minimum & maximum timeout values.
+*
+*                               See also 'NetTCP_TxConnRTT_RTO_Calc()  Note #2b1'.
+*
+*                   (c) (1) (A) "It is extremely important to remember that ACK (acknowledgment) segments
+*                                that contain no data are not reliably transmitted by TCP."
+*
+*                           (B) "This procedure minimizes delay if the zero-window condition is due to a
+*                                lost ACK segment containing a window-opening update."
+*
+*                           (C) Thus Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 22.2,
+*                               Page 325 adds that "window probes contain 1 byte of data" but unlike TCP
+*                               "retransmission ... TCP never gives up sending window probes ... [which]
+*                               continue to be sent ... until the window opens up or either of the
+*                               applications using the connection is terminated".
+*
+*                       (2) RFC #793, Section 3.7 'Data Communication : Managing the Window : Window
+*                           Management Suggestions' states that "if a segment containing a single data
+*                           octet sent to probe a zero window is accepted, it consumes one octet of the
+*                           window now available ... As time goes on, occasional pauses in the receiver
+*                           making window allocation available will result in ... the transmitted data
+*                           will be[ing] broken into alternating big and small segments ... And after
+*                           a while the data transmission will be in mostly small segments ... but TCP
+*                           implementations need to actively attempt to combine small window allocations
+*                           into larger windows, since the mechanisms for managing the window tend to
+*                           lead to many small windows".
+*
+*                       (3) So although it is suggested, NO RFC requires that a TCP zero window probe
+*                           include data.  Therefore, it seems reasonable to transmit TCP zero window
+*                           probes similar to TCP Keep-Alive probes, i.e. without any data from the TCP
+*                           connection's transmit queue.
+*
+*                           See also 'NetTCP_TxConnProbe()  Note #2b2'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeZeroWinHandler (NET_TCP_CONN        *p_conn,
+                                                  NET_TCP_WIN_CODE     win_update_code,
+                                                  NET_TCP_CLOSE_CODE   close_code)
+{
+    CPU_BOOLEAN         tmr_update;
+    NET_TCP_TIMEOUT_MS  timeout_ms;
+    NET_TMR_TICK        timeout_tick;
+    NET_ERR             err;
+
+
+                                                                /* ------------- VALIDATE TCP CONN STATE -------------- */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             return;
+
+
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+             return;
+    }
+
+
+                                                                /* ----------- HANDLE TCP CONN TX ZERO WIN ------------ */
+    tmr_update = DEF_NO;
+
+    switch (win_update_code) {
+        case NET_TCP_CONN_TX_WIN_REMOTE_UPDATE:
+        default:
+             if (p_conn->TxWinSizeRemote > 0) {                 /* If remote win size > 0, ...                          */
+                 if (p_conn->TxQ_ZeroWinTmr != DEF_NULL) {      /* ... free zero win tmr.                               */
+                     NetTmr_Free(p_conn->TxQ_ZeroWinTmr);
+                     p_conn->TxQ_ZeroWinTmr  = DEF_NULL;
+                 }
+
+             } else {                                           /* Else if remote win size zero            ...          */
+                 if (p_conn->TxQ_ZeroWinTmr == DEF_NULL) {      /* ... & NO zero win tmr;                  ...          */
+                                                                /* ... set first tx zero win probe timeout ...          */
+                     timeout_ms   = p_conn->TxRTT_RTO_ms;       /* ... = RTO (see Note #1b1).                           */
+                     timeout_tick = p_conn->TxRTT_RTO_tick;
+                     tmr_update   = DEF_YES;
+                 }
+             }
+             break;
+
+
+        case NET_TCP_CONN_TX_WIN_TIMEOUT:                       /* On timeout,                             ...          */
+             NetTCP_TxConnProbe((NET_TCP_CONN     *) p_conn,    /* ... tx zero-win probe   (see Note #1c3) ...          */
+                                (CPU_BOOLEAN       ) DEF_NO,
+                                (NET_TCP_CLOSE_CODE) close_code,
+                                (NET_ERR          *)&err);      /* Ignore transitory tx err(s).                         */
+                                                                /* ... & calc next timeout (see Note #1b2).             */
+             timeout_ms   =  (NET_TCP_TIMEOUT_MS)NetTCP_TxConnRTO_CalcBackOff(p_conn, p_conn->TxWinZeroWinTimeout_ms);
+             timeout_tick = ((NET_TMR_TICK      )timeout_ms * NET_TMR_TIME_TICK_PER_SEC) / DEF_TIME_NBR_mS_PER_SEC;
+             tmr_update   =   DEF_YES;
+             break;
+    }
+
+
+    if (tmr_update == DEF_YES) {                                /* If tx probe tmr update req'd, ...                    */
+                                                                /* ... get tx zero win probe tmr.                       */
+        p_conn->TxQ_ZeroWinTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_TxConnWinSizeZeroWinTimeout,
+                                           (void        *) p_conn,
+                                           (NET_TMR_TICK ) timeout_tick,
+                                           (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                           (NET_ERR     *)&err);
+
+        if (err == NET_TMR_ERR_NONE) {                          /* If NO err(s), cfg tx zero win probe timeout.         */
+            p_conn->TxWinZeroWinTimeout_ms = timeout_ms;
+        }                                                       /* Else ignore transitory rsrc err(s) ...               */
+                                                                /* ... [see Note #1a1].                                 */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_TxConnWinSizeZeroWinTimeout()
+*
+* Description : (1) (a) Handle TCP connection's transmit queue zero window persist timeout ... :
+*
+*                       (1) Clear  TCP connection's transmit zero window persist timer      See Notes #4a1A & #4a2
+*                       (2) Handle TCP connection   transmit zero window                    See Note  #2
+*
+*                   (b) ... for the following states :
+*
+*                       (1) ESTABLISHED
+*                       (2) FIN-WAIT-1
+*                       (3) CLOSING
+*                       (4) CLOSE-WAIT
+*                       (5) LAST-ACK
+*
+*
+* Argument(s) : p_conn_timeout       Pointer to TCP connection (see Note #3b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetTCP_TxConnWinSizeZeroWinHandler().
+*
+* Note(s)     : (2) RFC #1122, Section 4.2.2.17 states that the "probing of zero (offered) windows
+*                   ... SHOULD send the first zero-window probe when a zero window has existed for
+*                   the retransmission timeout period and SHOULD increase exponentially the interval
+*                   between successive probes".
+*
+*                   See also 'NetTCP_TxConnWinSizeZeroWinHandler()  Note #1'.
+*
+*               (3) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_TCP_CONN' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (4) This function is a network timer callback function :
+*
+*                   (a) (1) For the following connection timer(s) ... :
+*
+*                           (A) TCP connection transmit zero window persist timer ('TxQ_ZeroWinTmr')
+*
+*                       (2) (A) Clear the timer pointer ... :
+*                               (1) Cleared prior to next handler function(s); ...
+*                               (2) Cleared prior to invalid state fault exit.
+*
+*                           (B) but do NOT re-free the timer.
+*
+*                   (b) Do NOT set the following close timer flag(s) :
+*
+*                       (1) NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN
+*
+*               (5) Certain network connections MUST periodically suspend network transmit(s) to handle
+*                   network receive packet(s).  To protect TCP connections from transmit corruption while
+*                   suspended, ALL TCP data transmits & TCP transmit queue handling MUST be blocked for
+*                   suspended connections until the connection is no longer suspended.
+*
+*                   However, handling the TCP connection's transmit zero window timeout is permitted since
+*                   NO new TCP data is prepared from the TCP connection's transmit queue (see Note #1a).
+*
+*                   See also 'NetTCP_TxConnTxQ()                  Note #12b2A2',
+*                            'NetTCP_TxConnTxQ_TimeoutIdle()      Note #5',
+*                            'NetTCP_TxConnTxQ_TimeoutSillyWin()  Note #5',
+*                          & 'NetTCP_TxConnReTxQ_Timeout()        Note #5'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnWinSizeZeroWinTimeout (void  *p_conn_timeout)
+{
+    NET_TCP_CONN        *p_conn;
+    NET_TCP_CLOSE_CODE   close_code;
+
+
+    p_conn      = (NET_TCP_CONN *)p_conn_timeout;               /* See Note #3b2A.                                      */
+
+    close_code =  NET_TCP_CONN_CLOSE_ALL;
+    DEF_BIT_CLR(close_code, NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN);/* See Note #4b1.                                       */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE TCP CONN ----------------- */
+    if (p_conn == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NullPtrCtr);
+        return;
+    }
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             p_conn->TxQ_ZeroWinTmr = DEF_NULL;                 /* See Note #4a2A2.                                     */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #1.                                         */
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:               /* See Note #5.                                         */
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                      p_conn->TxQ_ZeroWinTmr = DEF_NULL;        /* See Note #4a2A2.                                     */
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)close_code);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+             return;
+    }
+#endif
+
+
+                                                                /* ------- HANDLE TCP CONN TX ZERO WIN TIMEOUT -------- */
+    p_conn->TxQ_ZeroWinTmr = DEF_NULL;                          /* Clr    tx zero win tmr (see Note #4a2A1).            */
+
+                                                                /* Handle tx zero win     (see Note #2).                */
+    NetTCP_TxConnWinSizeZeroWinHandler(p_conn, NET_TCP_CONN_TX_WIN_TIMEOUT, close_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_TxConnSync()
+*
+* Description : (1) Prepare & transmit a TCP connection synchronization :
+*
+*                   (a) Validate TCP connection state
+*                   (b) Prepare  TCP connection synchronization :
+*                       (1) Get  timer
+*                       (2) Get  buffer
+*                       (3) Prepare TCP segment :
+*                           (A) TCP segment  addresses
+*                           (B) TCP segment  sequence numbers
+*                           (C) TCP segment  transmit flags :
+*                               (1) SYN
+*                               (2) ACK
+*                           (D) TCP segment  window size
+*                           (E) TCP segment  options
+*                           (F) IP  datagram parameters
+*                           (G) TCP segment  packet buffer controls
+*                   (c) Update  TCP connection :
+*                       (1) Queue  TCP connection synchronization packet
+*                       (2) Update TCP connection sequence numbers
+*                   (d) Transmit   TCP connection synchronization
+*
+*
+*               (2) (a) RFC #793, Section 3.3 'Sequence Numbers : Initial Sequence Number Selection' states
+*                       that "for a [TCP] connection to be established or initialized, ... two TCP's must
+*                       synchronize ... each other's initial sequence numbers" by transmitting initial
+*                       connection request segments (i.e., segments with the SYN control bit set).
+*
+*                       RFC #793, Section 3.4 states that "this procedure normally is initiated by one TCP
+*                       and responded to by another TCP ... [but] works if two TCP simultaneously initiate
+*                       the procedure".
+*
+*                   (b) RFC #793, Section 3.9 'Event Processing : OPEN Call : CLOSED STATE' states that after
+*                       "a SYN segment ... is sent ... [to] set SND.UNA to ISS [initial send sequence number],
+*                       SND.NXT to ISS+1".
+*
+*                       The following sections confirm these sequence number configurations summary :
+*
+*                       (1) RFC #793, Section 3.9 'Event Processing : OPEN Call : LISTEN STATE'
+*                       (2) RFC #793, Section 3.9 'Event Processing : SEND Call : LISTEN STATE'
+*                       (3) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN [State] :
+*                               Check for SYN'
+*
+*               (3) A TCP connection's transmit sequences are initialized when the initial TCP synchronization
+*                   segment is queued for transmission :
+*
+*                   (a) 'TxSeqNbrSync' points to the initial, synchronization (SYN) transmit sequence number.
+*
+*                   (b) (1) 'TxSeqNbrNextQ' points to the next transmit sequence number to enqueue data octets.
+*                       (2) 'TxSeqNbrNext'  points to the next transmit sequence number to transmit.
+*
+*
+*                               -----          -----------------------        Initial Synchronization
+*                                 ^            |  Initial SEQ #(SYN) |  <---  Transmit Sequence Number
+*                                 |            -----------------------            (see Note #3a)
+*                                 |            |    Data Octet #1    |  ---
+*                                 |            |    Data Octet #2    |   ^
+*                                 |            |    Data Octet #3    |   |
+*                                              |          .          |   |         Next / Queued
+*                           TCP Connection     |          .          |   |   Transmit Sequence Number(s)
+*                         Transmit Sequences   |          .          |   |         (see Note #3b)
+*                           (see Note #3)      | Data Octet #(N - 2) |   |
+*                                              | Data Octet #(N - 1) |   v
+*                                 |            | Data Octet #   N    |  ---
+*                                 |            -----------------------
+*                                 |            |   Close SEQ #(FIN)  |
+*                                 |            -----------------------
+*                                 v            |    Last SEQ #       |
+*                               -----          -----------------------
+*
+*
+*                   See also 'NetTCP_TxConnClose()  Note #2'.
+*
+*
+* Argument(s) : p_conn      Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnReq(),
+*                                                 NetTCP_RxPktConnHandlerListen().
+*
+*               p_buf_hdr   Pointer to network buffer header that received TCP packet.
+*
+*               state       Current TCP connection state at time of connection request.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection synchronization successfully
+*                                                                       transmitted.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+*                                                                   - RETURNED BY NetTCP_TxConnPrepareSegAddrs() : -
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+*                                                                   ----- RETURNED BY NetTCP_TxPktHandler() : ------
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnReq(),
+*               NetTCP_RxPktConnHandlerListen(),
+*               NetTCP_RxPktConnHandlerSyncTxd().
+*
+* Note(s)     : (4) RFC #1122, Section 4.2.2.6 states that a "TCP SHOULD send an MSS (Maximum Segment Size)
+*                   option in every SYN segment".
+*
+*               (5) Network resources MUST be appropriately allocated/deallocated :
+*
+*                   (a) Increment network buffer's reference counter to include the TCP connection
+*                       synchronization segment now enqueued to the TCP connection's re-transmit
+*                       queue as a new reference to the network buffer.
+*
+*                       This differs from the handling of TCP connection   close segment's reference counter
+*                       since NetTCP_TxConnClose() defers incrementing the close segment's reference counter
+*                       to NetTCP_TxConnTxQ() when it enqueues the   TCP connection close segment to the TCP
+*                       connection's re-transmit queue (see 'NetTCP_TxConnClose()  Note #3a'); whereas
+*                       NetTCP_TxConnSync() immediately enqueues the TCP connection synchronization segment
+*                       to the TCP connection's re-transmit queue & transmits the segment.
+*
+*                   (b) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                       (1) For any network resources NOT  yet       linked to the TCP connection, each
+*                           network resource  MUST be freed by appropriate function(s).
+*                       (2) For all network resources that have been linked to the TCP connection, ALL
+*                           network resources are     freed by NetTCP_ConnClose().
+*
+*               (6) If transmitting a TCP synchronization packet from the SYN-SENT state :
+*
+*                   (a) Connection timeout is reset to initial synchronization timeout value
+*                   (b) Previous synchronization sequence number MUST be re-used
+*                   (c) Previous synchronization packet in TCP connection's re-transmit queue is freed
+*
+*                   See also 'NetTCP_RxPktConnHandlerSyncTxd()  Note #2c3B2'.
+*
+*               (7) IP transmit options currently NOT implemented      See 'net_tcp.h  Note #1d'
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnSync (NET_TCP_CONN        *p_conn,
+                                 NET_BUF_HDR         *p_buf_hdr,
+                                 NET_TCP_CONN_STATE   state,
+                                 NET_ERR             *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_TTL                   TTL;
+    NET_IPv4_TOS                   TOS;
+    NET_IPv4_ADDR                  src_addrv4;
+    NET_IPv4_ADDR                  dest_addrv4;
+    NET_IPv4_FLAGS                 flags_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_TRAFFIC_CLASS         traffic_class;
+    NET_IPv6_FLOW_LABEL            flow_label;
+    NET_IPv6_HOP_LIM               hop_lim;
+    NET_IPv6_ADDR                  src_addrv6;
+    NET_IPv6_ADDR                  dest_addrv6;
+    NET_IPv6_FLAGS                 flags_ipv6;
+#endif
+    NET_CONN_ID                    conn_id;
+    NET_CONN                      *p_net_conn;
+    NET_IF_NBR                     if_nbr;
+    NET_BUF                       *pseg_sync;
+    NET_BUF_HDR                   *pseg_sync_hdr;
+    NET_BUF_SIZE                   data_len;
+    NET_BUF_SIZE                   data_ix;
+    NET_BUF_SIZE                   data_ix_offset;
+    NET_TCP_PORT_NBR               src_port;
+    NET_TCP_PORT_NBR               dest_port;
+    NET_TCP_SEQ_NBR                seq_nbr;
+    NET_TCP_SEQ_NBR                ack_nbr;
+    NET_TCP_WIN_SIZE               win_size;
+    NET_PROTOCOL_TYPE              protocol;
+    CPU_INT16U                     payload_max;
+    NET_TCP_OPT_CFG_MAX_SEG_SIZE  *p_opt_cfg_max_seg_size;
+    NET_TCP_OPT_CFG_MAX_SEG_SIZE   opt_cfg_max_seg_size;
+    NET_TCP_FLAGS                  flags_tcp;
+    NET_PROTOCOL_TYPE              proto_type = NET_PROTOCOL_TYPE_NONE;
+    NET_ERR                        err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------- VALIDATE TCP CONN STATE -------------- */
+    switch (state) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+             break;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_CONN_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+#endif
+
+
+                                                                /* ------------ PREPARE TCP CONN SYNC SEG ------------- */
+                                                                /* --------------------- GET TMR ---------------------- */
+    NetTCP_TxConnReTxQ_TimeoutSet(p_conn, DEF_NO, NET_TCP_CONN_CLOSE_ALL, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* --------------------- GET BUF ---------------------- */
+    conn_id    = p_conn->ID_Conn;
+    p_net_conn = (NET_CONN *)&NetConn_Tbl[conn_id];
+    if_nbr  = NetConn_IF_NbrGet(conn_id, &err);
+    if ( err != NET_CONN_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_CONN_ALL);
+       *p_err  = NET_TCP_ERR_CONN_FAULT;
+        return;
+    }
+
+    data_len  = NET_TCP_DATA_LEN_TX_SYNC;
+
+    switch (p_net_conn->Family) {
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+             proto_type = NET_PROTOCOL_TYPE_TCP_V4;
+             break;
+
+
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+             proto_type = NET_PROTOCOL_TYPE_TCP_V6;
+             break;
+
+    }
+
+    data_ix = 0u;
+
+    NetTCP_GetTxDataIx(if_nbr, proto_type, 4u, data_len, p_conn, &data_ix, p_err);
+    pseg_sync = NetBuf_Get(if_nbr, NET_TRANSACTION_TX, data_len, data_ix, &data_ix_offset, NET_BUF_FLAG_NONE, &err);
+    if ( err != NET_BUF_ERR_NONE) {                             /* See Note #5b1.                                       */
+       *p_err  = NET_TCP_ERR_NONE_AVAIL;
+        return;
+    }
+
+    data_ix       += data_ix_offset;
+    pseg_sync_hdr  = &pseg_sync->Hdr;
+                                                                /* ----------------- PREPARE TCP HDR ------------------ */
+                                                                /* Prepare seg addrs.                                   */
+    if (p_buf_hdr != DEF_NULL) {                                /* If TCP pkt rx'd, cfg TCP tx                ...       */
+                                                                /* ...  src  addr from rx'd TCP pkt dest addr ...       */
+        if (DEF_BIT_IS_CLR(p_buf_hdr->Flags,   NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+            src_addrv4  = (NET_IPv4_ADDR   )p_buf_hdr->IP_AddrDest;
+                                                                /* .. & dest addr from rx'd TCP pkt src  addr.          */
+            dest_addrv4 = (NET_IPv4_ADDR   )p_buf_hdr->IP_AddrSrc;
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            DEF_BIT_SET(pseg_sync_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);
+
+            src_addrv6  = p_buf_hdr->IPv6_AddrDest;
+                                                                /* .. & dest addr from rx'd TCP pkt src  addr.          */
+            dest_addrv6 = p_buf_hdr->IPv6_AddrSrc;
+#endif
+        }
+        src_port        = (NET_TCP_PORT_NBR)p_buf_hdr->TransportPortDest;
+        dest_port       = (NET_TCP_PORT_NBR)p_buf_hdr->TransportPortSrc;
+    } else {                                                    /* Else cfg TCP tx pkt addrs from TCP conn addrs.       */
+
+        if (p_net_conn->Family == NET_CONN_FAMILY_IP_V4_SOCK) {
+
+#ifdef  NET_IPv4_MODULE_EN
+            NetTCP_TxConnPrepareSegAddrs((NET_TCP_CONN *) p_conn,
+                                         (CPU_INT08U   *)&src_addrv4,
+                                         (CPU_INT08U   *)&src_port,
+                                         (CPU_INT16U    ) sizeof(src_addrv4),
+                                         (CPU_INT16U    ) sizeof(src_port),
+                                         (CPU_INT08U   *)&dest_addrv4,
+                                         (CPU_INT08U   *)&dest_port,
+                                         (CPU_INT16U    ) sizeof(dest_addrv4),
+                                         (CPU_INT16U    ) sizeof(dest_port),
+                                         (NET_ERR      *) p_err);
+#endif
+        } else if (p_net_conn->Family == NET_CONN_FAMILY_IP_V6_SOCK) {
+#ifdef  NET_IPv6_MODULE_EN
+            DEF_BIT_SET(pseg_sync_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);
+            NetTCP_TxConnPrepareSegAddrs((NET_TCP_CONN *) p_conn,
+                                         (CPU_INT08U   *)&src_addrv6,
+                                         (CPU_INT08U   *)&src_port,
+                                         (CPU_INT16U    ) sizeof(src_addrv6),
+                                         (CPU_INT16U    ) sizeof(src_port),
+                                         (CPU_INT08U   *)&dest_addrv6,
+                                         (CPU_INT08U   *)&dest_port,
+                                         (CPU_INT16U    ) sizeof(dest_addrv6),
+                                         (CPU_INT16U    ) sizeof(dest_port),
+                                         (NET_ERR      *) p_err);
+#endif
+        }
+        if (*p_err != NET_TCP_ERR_NONE) {                       /* See Note #5b1.                                       */
+             NetBuf_Free(pseg_sync);
+             return;
+        }
+    }
+
+
+                                                                /* Prepare TCP sync seq nbrs.                           */
+    if (state != NET_TCP_CONN_STATE_SYNC_TXD) {                 /* For non-sync-tx'd states (see Note #6b), ...         */
+        NET_TCP_TX_GET_SEQ_NBR(seq_nbr);                        /* ... get sync seq nbr.                                */
+    } else {
+        seq_nbr = p_conn->TxSeqNbrSync;
+    }
+    ack_nbr = (state != NET_TCP_CONN_STATE_CLOSED) ? p_conn->RxSeqNbrNext
+                                                   : NET_TCP_ACK_NBR_NONE;
+
+                                                                /* Prepare TCP tx flags (see Note #1b3C).               */
+    flags_tcp  = NET_TCP_FLAG_NONE   |
+                 NET_TCP_FLAG_TX_SYNC;
+    if (state != NET_TCP_CONN_STATE_CLOSED) {                   /* For non-CLOSED state, ...                            */
+        DEF_BIT_SET(flags_tcp, NET_TCP_FLAG_TX_ACK);            /* ... tx ACK.                                          */
+    }
+
+                                                                /* Prepare TCP rx win size.                             */
+    win_size = p_conn->RxWinSizeActual;
+
+
+
+                                                                /* Prepare TCP max seg size opt (see Note #4).          */
+                                                                /* Get IF's MTU's.                                      */
+    if (DEF_BIT_IS_CLR(pseg_sync_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+        protocol = NET_PROTOCOL_TYPE_TCP_V4;
+    } else {
+        protocol = NET_PROTOCOL_TYPE_TCP_V6;
+    }
+
+    payload_max = NetIF_GetPayloadTxMax(if_nbr, protocol, &err);
+    if (err != NET_IF_ERR_NONE) {
+       *p_err  = NET_TCP_ERR_CONN_FAIL;
+        return;
+    }
+
+                                                                /* Calc TCP conn's local max seg size.                  */
+    p_conn->MaxSegSizeLocalActual      =  payload_max;
+
+    p_opt_cfg_max_seg_size             = &opt_cfg_max_seg_size;
+    p_opt_cfg_max_seg_size->Type       =  NET_TCP_OPT_TYPE_MAX_SEG_SIZE;
+    p_opt_cfg_max_seg_size->MaxSegSize =  p_conn->MaxSegSizeLocalActual;
+    p_opt_cfg_max_seg_size->NextOptPtr =  DEF_NULL;
+
+    if (DEF_BIT_IS_CLR(pseg_sync_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+                                                                /* Prepare IP params.                                   */
+    NetConn_IPv4TxParamsGet(conn_id, &flags_ipv4, &TOS, &TTL, &err);
+    if ( err != NET_CONN_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_CONN_ALL);
+       *p_err  = NET_TCP_ERR_CONN_FAULT;
+        return;
+    }
+#endif
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        NetConn_IPv6TxParamsGet(conn_id, &traffic_class, &flow_label, &hop_lim, &flags_ipv6, &err);
+        if ( err != NET_CONN_ERR_NONE) {
+            NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, NET_TCP_CONN_CLOSE_CONN_ALL);
+           *p_err  = NET_TCP_ERR_CONN_FAULT;
+            return;
+        }
+#endif
+    }
+
+
+                                                                /* Init buf ctrls.                                      */
+    pseg_sync_hdr                           = &pseg_sync->Hdr;
+    pseg_sync_hdr->DataIx                   = (CPU_INT16U  )data_ix;
+    pseg_sync_hdr->DataLen                  = (NET_BUF_SIZE)data_len;
+    pseg_sync_hdr->TotLen                   = (NET_BUF_SIZE)pseg_sync_hdr->DataLen;
+
+
+    if (DEF_BIT_IS_CLR(pseg_sync_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+        pseg_sync_hdr->ProtocolHdrType          =  NET_PROTOCOL_TYPE_TCP_V4;
+        pseg_sync_hdr->ProtocolHdrTypeTransport =  NET_PROTOCOL_TYPE_TCP_V4;
+        pseg_sync_hdr->IP_AddrSrc               = (NET_IPv4_ADDR)src_addrv4;
+        pseg_sync_hdr->IP_AddrDest              = (NET_IPv4_ADDR)dest_addrv4;
+#endif
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        pseg_sync_hdr->ProtocolHdrType          =  NET_PROTOCOL_TYPE_TCP_V6;
+        pseg_sync_hdr->ProtocolHdrTypeTransport =  NET_PROTOCOL_TYPE_TCP_V6;
+        pseg_sync_hdr->IPv6_AddrSrc             = src_addrv6;
+        pseg_sync_hdr->IPv6_AddrDest            = dest_addrv6;
+#endif
+    }
+
+
+    pseg_sync_hdr->TransportPortSrc          = (NET_PORT_NBR )src_port;
+    pseg_sync_hdr->TransportPortDest         = (NET_PORT_NBR )dest_port;
+
+    pseg_sync_hdr->TCP_SegLenInit           = (NET_TCP_SEG_SIZE)NET_TCP_SEG_LEN_SYNC;
+    pseg_sync_hdr->TCP_SegLen               = (NET_TCP_SEG_SIZE)pseg_sync_hdr->TCP_SegLenInit;
+    pseg_sync_hdr->TCP_SegLenLast           = (NET_TCP_SEG_SIZE)pseg_sync_hdr->TCP_SegLenInit;
+    pseg_sync_hdr->TCP_SegLenData           = (NET_TCP_SEG_SIZE)0u;
+    pseg_sync_hdr->TCP_SegSync              = (CPU_BOOLEAN     )DEF_YES;
+    pseg_sync_hdr->TCP_SegClose             = (CPU_BOOLEAN     )DEF_NO;
+    pseg_sync_hdr->TCP_SegAck               = (CPU_BOOLEAN     )DEF_BIT_IS_SET(flags_tcp, NET_TCP_FLAG_TX_ACK);
+    pseg_sync_hdr->TCP_SegReset             = (CPU_BOOLEAN     )DEF_NO;
+
+    pseg_sync_hdr->TCP_SeqNbrInit           = (NET_TCP_SEQ_NBR )seq_nbr;
+    pseg_sync_hdr->TCP_SeqNbrLast           = (NET_TCP_SEQ_NBR )pseg_sync_hdr->TCP_SeqNbrInit;
+    pseg_sync_hdr->TCP_SeqNbr               = (NET_TCP_SEQ_NBR )pseg_sync_hdr->TCP_SeqNbrInit;
+    pseg_sync_hdr->TCP_AckNbr               = (NET_TCP_SEQ_NBR )ack_nbr;
+    pseg_sync_hdr->TCP_AckNbrLast           = (NET_TCP_SEQ_NBR )pseg_sync_hdr->TCP_AckNbr;
+
+    pseg_sync_hdr->TCP_WinSizeLast          = (NET_TCP_WIN_SIZE)win_size;
+
+    pseg_sync_hdr->TCP_Flags                = (NET_TCP_FLAGS   )flags_tcp;
+
+    pseg_sync_hdr->TCP_SegReTxCtr           = (NET_PKT_CTR     )0u;
+    pseg_sync_hdr->RefCtr++;                                    /* TCP maintains ref until seg ack'd (see Note #5a).    */
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+                                                                /* Q conn sync seg to TCP re-tx Q.                      */
+    NetTCP_ConnFreeBufQ(&p_conn->ReTxQ_Head, &p_conn->ReTxQ_Tail); /* Free re-tx Q (see Note #6c).                      */
+    p_conn->ReTxQ_Head         =  pseg_sync;
+    p_conn->ReTxQ_Tail         =  pseg_sync;
+                                                                /* Update TCP conn seq nbrs (see Notes #2 & #3).        */
+    p_conn->TxSeqNbrSync       = (NET_TCP_SEQ_NBR) seq_nbr;
+    p_conn->TxSeqNbrNext       = (NET_TCP_SEQ_NBR)(seq_nbr + pseg_sync_hdr->TCP_SegLen);
+    p_conn->TxSeqNbrNextQ      = (NET_TCP_SEQ_NBR) p_conn->TxSeqNbrNext;
+    p_conn->TxSeqNbrUnAckdPrev = (NET_TCP_SEQ_NBR) p_conn->TxSeqNbrUnAckd;
+    p_conn->TxSeqNbrUnAckd     = (NET_TCP_SEQ_NBR) p_conn->TxSeqNbrSync;
+    p_conn->TxSeqNbrUnReTxd    = (NET_TCP_SEQ_NBR) p_conn->TxSeqNbrUnAckd;
+
+
+
+                                                                /* --------------- TX TCP CONN SYNC SEG --------------- */
+    if (DEF_BIT_IS_CLR(pseg_sync_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+        NetTCP_TxPktHandlerIPv4((NET_BUF        *)pseg_sync,
+                                (NET_IPv4_ADDR   )src_addrv4,
+                                (NET_TCP_PORT_NBR)src_port,
+                                (NET_IPv4_ADDR   )dest_addrv4,
+                                (NET_TCP_PORT_NBR)dest_port,
+                                (NET_TCP_SEQ_NBR )seq_nbr,
+                                (NET_TCP_SEQ_NBR )ack_nbr,
+                                (NET_TCP_WIN_SIZE)win_size,
+                                (NET_IPv4_TOS    )TOS,
+                                (NET_IPv4_TTL    )TTL,
+                                (NET_TCP_FLAGS   )flags_tcp,
+                                (NET_IPv4_FLAGS  )flags_ipv4,
+                                (void           *)p_opt_cfg_max_seg_size,
+                                (void           *)0,            /* See Note #7.                                         */
+                                (NET_ERR        *)p_err);
+#endif
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        NetTCP_TxPktHandlerIPv6((NET_BUF              *) pseg_sync,
+                                (NET_IPv6_ADDR        *)&src_addrv6,
+                                (NET_TCP_PORT_NBR      ) src_port,
+                                (NET_IPv6_ADDR        *)&dest_addrv6,
+                                (NET_TCP_PORT_NBR      ) dest_port,
+                                (NET_TCP_SEQ_NBR       ) seq_nbr,
+                                (NET_TCP_SEQ_NBR       ) ack_nbr,
+                                (NET_TCP_WIN_SIZE      ) win_size,
+                                (NET_IPv6_TRAFFIC_CLASS) traffic_class,
+                                (NET_IPv6_FLOW_LABEL   ) flow_label,
+                                (NET_IPv6_HOP_LIM      ) hop_lim,
+                                (NET_TCP_FLAGS         ) flags_tcp,
+                                (void                 *) p_opt_cfg_max_seg_size,
+                                (NET_ERR              *) p_err);
+#endif
+    }
+
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s).                         */
+             NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegConnSyncCtr);
+             break;
+
+
+        case NET_ERR_IF_LINK_DOWN:
+             NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegConnSyncCtr);
+             return;
+
+
+        case NET_TCP_ERR_TX_PKT:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, NET_TCP_CONN_CLOSE_CONN_ALL);
+             return;
+    }
+
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_TxConnClose()
+*
+* Description : (1) Prepare & transmit a TCP connection close :
+*
+*                   (a) Validate TCP connection state
+*                   (b) Prepare  TCP connection close segment :
+*                       (1) Get  buffer
+*                       (2) Prepare TCP segment :
+*                           (A) TCP segment  addresses
+*                           (B) TCP segment  sequence numbers
+*                           (C) TCP segment  transmit flags :
+*                               (1) ACK
+*                               (2) FIN
+*                           (D) TCP segment  window size
+*                           (E) IP  datagram parameters
+*                           (F) TCP segment  packet buffer controls
+*                   (c) Update  TCP connection :
+*                       (1) Queue  TCP connection close packet
+*                       (2) Update TCP connection sequence number(s)
+*                   (d) Transmit   TCP connection close segment
+*
+*
+*               (2) A TCP connection's transmit sequences are closed when the closing TCP segment is queued
+*                   for transmission :
+*
+*                   (a) 'TxSeqNbrClose' points to the closing (FIN) transmit sequence number.
+*
+*                   (b) 'TxSeqNbrLast'  points to the last sequence number used to close the TCP connection
+*                                           transmit sequences when acknowledged.
+*
+*
+*                                  -----          -----------------------
+*                                    ^            |  Initial SEQ #(SYN) |
+*                                    |            -----------------------
+*                                    |            |    Data Octet #1    |
+*                                    |            |    Data Octet #2    |
+*                                    |            |    Data Octet #3    |
+*                                                 |          .          |
+*                              TCP Connection     |          .          |
+*                            Transmit Sequences   |          .          |
+*                              (see Note #2)      | Data Octet #(N - 2) |
+*                                                 | Data Octet #(N - 1) |
+*                                    |            | Data Octet #   N    |        Closing Transmit
+*                                    |            -----------------------        Sequence Number
+*                                    |            |   Close SEQ #(FIN)  |  <---  (see Note #2a)
+*                                    |            -----------------------
+*                                    v            |    Last SEQ #       |  <---   Last Transmit
+*                                  -----          -----------------------        Sequence Number
+*                                                                                (see Note #2b)
+*
+*
+*                   See also 'NetTCP_TxConnSync()  Note #3'.
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnReqClose().
+*
+*               state       Current TCP connection state at time of connection close.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection close successfully
+*                                                                       transmitted.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+*                                                                   ------- RETURNED BY NetTCP_TxConnTxQ() : -------
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_ACK_NONE           TCP connection acknowledgement NOT requested.
+*                               NET_TCP_ERR_CONN_ACK_DLYD           TCP connection acknowledgement transmit delayed.
+*                               NET_TCP_ERR_CONN_ACK_PREVLY_TXD     TCP connection acknowledgement previously
+*                                                                       transmitted for segment.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        TCP connection acknowledgement NOT valid for
+*                                                                       current TCP connection state.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnReqClose().
+*
+* Note(s)     : (3) Network resources MUST be appropriately allocated/deallocated :
+*
+*                   (a) Network buffer's reference counter MUST be incremented to include the queued TCP
+*                       connection close segment as a new reference to the network buffer.  However, this
+*                       additional reference is handled when the TCP connection close segment is enqueued
+*                       to the TCP connection's re-transmit queue (see 'NetTCP_TxConnTxQ()  Note #10').
+*
+*                   (b) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                       (1) For any network resources NOT  yet       linked to the TCP connection, each
+*                           network resource  MUST be freed by appropriate function(s).
+*                       (2) For all network resources that have been linked to the TCP connection, ALL
+*                           network resources are     freed by NetTCP_ConnClose().
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnClose (NET_TCP_CONN        *p_conn,
+                                  NET_TCP_CONN_STATE   state,
+                                  NET_ERR             *p_err)
+{
+    NET_TCP_SEG_SIZE   seg_len;
+    NET_BUF_SIZE       data_len;
+    NET_BUF_SIZE       data_ix;
+    NET_BUF_SIZE       data_ix_offset;
+    NET_CONN_ID        conn_id;
+
+    NET_IF_NBR         if_nbr;
+    NET_BUF           *pseg_close;
+    NET_BUF_HDR       *pseg_close_hdr;
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR      src_addrv4;
+    NET_IPv4_ADDR      dest_addrv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_ADDR      src_addrv6;
+    NET_IPv6_ADDR      dest_addrv6;
+    NET_IPv6_FLAGS     ip_flags;
+#endif
+    NET_TCP_PORT_NBR   src_port;
+    NET_TCP_PORT_NBR   dest_port;
+    NET_TCP_SEQ_NBR    seq_nbr;
+    NET_TCP_FLAGS      flags_tcp;
+    CPU_BOOLEAN        flag_ipv6;
+    NET_PROTOCOL_TYPE  proto_type = NET_PROTOCOL_TYPE_TCP_V4;
+    NET_ERR            err;
+
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------- VALIDATE TCP CONN STATE -------------- */
+    switch (state) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+#else
+   (void)&state;                                                /* Prevent 'variable unused' compiler warning.          */
+#endif
+
+
+                                                                /* ------------ PREPARE TCP CONN CLOSE SEG ------------ */
+    seg_len  = NET_TCP_SEG_LEN_CLOSE;
+    data_len = NET_TCP_DATA_LEN_TX_CLOSE;
+
+    if (p_conn->TxQ_Tail != DEF_NULL) {                         /* If tx Q NOT empty ...                                */
+        pseg_close                      =  p_conn->TxQ_Tail;    /* ... update tx Q tail seg as close seg.               */
+        pseg_close_hdr                  = &pseg_close->Hdr;
+
+        pseg_close_hdr->DataLen        += (NET_BUF_SIZE    )data_len;
+        pseg_close_hdr->TotLen         += (NET_BUF_SIZE    )data_len;
+
+        pseg_close_hdr->TCP_SegLenInit += (NET_TCP_SEG_SIZE)seg_len;
+        pseg_close_hdr->TCP_SegLen     += (NET_TCP_SEG_SIZE)seg_len;
+        pseg_close_hdr->TCP_SegLenData += (NET_TCP_SEG_SIZE)data_len;
+
+        DEF_BIT_SET(pseg_close_hdr->TCP_Flags, NET_TCP_FLAG_TX_CLOSE);
+
+
+    } else {                                                    /* Else get/cfg close seg buf.                          */
+                                                                /* Get buf.                                             */
+        conn_id = p_conn->ID_Conn;
+        if_nbr  = NetConn_IF_NbrGet(conn_id, &err);
+        if ( err != NET_CONN_ERR_NONE) {
+            NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                             (NET_BUF_HDR      *)0,
+                             (CPU_BOOLEAN       )DEF_YES,
+                             (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+           *p_err  = NET_TCP_ERR_CONN_FAULT;
+            return;
+        }
+
+
+                                                                /* Find conn IP family.                                 */
+        flag_ipv6 = DEF_NO;
+
+#ifdef  NET_IPv6_MODULE_EN
+        NetConn_IPv6TxParamsGet(                            conn_id,
+                                (NET_IPv6_TRAFFIC_CLASS  *) DEF_NULL,
+                                (NET_IPv6_FLOW_LABEL     *) DEF_NULL,
+                                (NET_IPv6_HOP_LIM        *) DEF_NULL,
+                                (NET_IPv6_FLAGS          *)&ip_flags,
+                                                           &err);
+        if (err != NET_CONN_ERR_NONE) {
+           *p_err = err;
+            return;
+        }
+
+        if (DEF_BIT_IS_CLR(ip_flags, NET_IPv6_FLAG)) {
+            proto_type = NET_PROTOCOL_TYPE_TCP_V4;
+        } else {
+            flag_ipv6 = DEF_YES;
+            proto_type = NET_PROTOCOL_TYPE_TCP_V6;
+        }
+#endif
+
+        data_ix = 0u;
+        NetTCP_GetTxDataIx(if_nbr,
+                           proto_type,
+                           0u,
+                           data_len,
+                           p_conn,
+                          &data_ix,
+                           p_err);
+
+        pseg_close = NetBuf_Get((NET_IF_NBR     ) if_nbr,
+                                (NET_TRANSACTION) NET_TRANSACTION_TX,
+                                (NET_BUF_SIZE   ) data_len,
+                                (NET_BUF_SIZE   ) data_ix,
+                                (NET_BUF_SIZE  *)&data_ix_offset,
+                                (NET_BUF_FLAGS  ) NET_BUF_FLAG_NONE,
+                                (NET_ERR       *)&err);
+        if ( err != NET_BUF_ERR_NONE) {
+           *p_err  = NET_TCP_ERR_NONE_AVAIL;
+            return;
+        }
+
+        data_ix        +=                 data_ix_offset;
+        pseg_close_hdr  = (NET_BUF_HDR *)&pseg_close->Hdr;
+                                                                /* ----------------- PREPARE TCP HDR ------------------ */
+
+                                                                /* Prepare seg addrs.                                   */
+        if (flag_ipv6 == DEF_NO) {
+#ifdef  NET_IPv4_MODULE_EN
+            NetTCP_TxConnPrepareSegAddrs((NET_TCP_CONN *) p_conn,
+                                         (CPU_INT08U   *)&src_addrv4,
+                                         (CPU_INT08U   *)&src_port,
+                                         (CPU_INT16U    ) sizeof(src_addrv4),
+                                         (CPU_INT16U    ) sizeof(src_port),
+                                         (CPU_INT08U   *)&dest_addrv4,
+                                         (CPU_INT08U   *)&dest_port,
+                                         (CPU_INT16U    ) sizeof(dest_addrv4),
+                                         (CPU_INT16U    ) sizeof(dest_port),
+                                         (NET_ERR      *)&err);
+
+            pseg_close_hdr->IP_AddrSrc   = (NET_IPv4_ADDR )src_addrv4;
+            pseg_close_hdr->IP_AddrDest  = (NET_IPv4_ADDR )dest_addrv4;
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            NetTCP_TxConnPrepareSegAddrs((NET_TCP_CONN *) p_conn,
+                                         (CPU_INT08U   *)&src_addrv6,
+                                         (CPU_INT08U   *)&src_port,
+                                         (CPU_INT16U    ) sizeof(src_addrv6),
+                                         (CPU_INT16U    ) sizeof(src_port),
+                                         (CPU_INT08U   *)&dest_addrv6,
+                                         (CPU_INT08U   *)&dest_port,
+                                         (CPU_INT16U    ) sizeof(dest_addrv6),
+                                         (CPU_INT16U    ) sizeof(dest_port),
+                                         (NET_ERR      *)&err);
+
+
+#endif
+        }
+        if ( err != NET_TCP_ERR_NONE) {                         /* See Note #3b1.                                       */
+            NetBuf_Free(pseg_close);
+           *p_err  = NET_TCP_ERR_CONN_FAULT;
+            return;
+        }
+
+
+                                                                /* Prepare TCP seq nbr(s).                              */
+        seq_nbr   = p_conn->TxSeqNbrNextQ;
+
+                                                                /* Prepare TCP tx flags (see Note #1b2C).               */
+        flags_tcp = NET_TCP_FLAG_NONE    |
+                    NET_TCP_FLAG_TX_ACK  |
+                    NET_TCP_FLAG_TX_CLOSE;
+
+
+                                                                /* Init buf ctrls.                                      */
+        pseg_close_hdr                   = &pseg_close->Hdr;
+        pseg_close_hdr->DataIx           = (CPU_INT16U  )data_ix;
+        pseg_close_hdr->DataLen          = (NET_BUF_SIZE)data_len;
+        pseg_close_hdr->TotLen           = (NET_BUF_SIZE)pseg_close_hdr->DataLen;
+        pseg_close_hdr->TransportPortSrc  = (NET_PORT_NBR)src_port;
+        pseg_close_hdr->TransportPortDest = (NET_PORT_NBR)dest_port;
+
+        if (flag_ipv6 == DEF_NO) {
+#ifdef  NET_IPv4_MODULE_EN
+            pseg_close_hdr->ProtocolHdrType          =  NET_PROTOCOL_TYPE_TCP_V4;
+            pseg_close_hdr->ProtocolHdrTypeTransport =  NET_PROTOCOL_TYPE_TCP_V4;
+            pseg_close_hdr->IP_AddrSrc               = (NET_IPv4_ADDR)src_addrv4;
+            pseg_close_hdr->IP_AddrDest              = (NET_IPv4_ADDR)dest_addrv4;
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            pseg_close_hdr->ProtocolHdrType          =  NET_PROTOCOL_TYPE_TCP_V6;
+            pseg_close_hdr->ProtocolHdrTypeTransport =  NET_PROTOCOL_TYPE_TCP_V6;
+            Mem_Copy(&pseg_close_hdr->IPv6_AddrSrc,  &src_addrv6,  NET_IPv6_ADDR_SIZE);
+            Mem_Copy(&pseg_close_hdr->IPv6_AddrDest, &dest_addrv6, NET_IPv6_ADDR_SIZE);
+#endif
+        }
+
+        pseg_close_hdr->TCP_SegLenInit           = (NET_TCP_SEG_SIZE)seg_len;
+        pseg_close_hdr->TCP_SegLen               = (NET_TCP_SEG_SIZE)pseg_close_hdr->TCP_SegLenInit;
+        pseg_close_hdr->TCP_SegLenData           = (NET_TCP_SEG_SIZE)data_len;
+        pseg_close_hdr->TCP_SegSync              = (CPU_BOOLEAN     )DEF_NO;
+        pseg_close_hdr->TCP_SegClose             = (CPU_BOOLEAN     )DEF_YES;
+        pseg_close_hdr->TCP_SegAck               = (CPU_BOOLEAN     )DEF_YES;
+        pseg_close_hdr->TCP_SegReset             = (CPU_BOOLEAN     )DEF_NO;
+
+        pseg_close_hdr->TCP_SeqNbrInit           = (NET_TCP_SEQ_NBR )seq_nbr;
+        pseg_close_hdr->TCP_SeqNbr               = (NET_TCP_SEQ_NBR )pseg_close_hdr->TCP_SeqNbrInit;
+
+        pseg_close_hdr->TCP_Flags                = (NET_TCP_FLAGS   )flags_tcp;
+    }
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+                                                                /* Q conn close seg to TCP tx Q : ...                   */
+    if (p_conn->TxQ_Tail == DEF_NULL) {                         /* ... if tx Q empty, add close seg to empty tx Q.      */
+        p_conn->TxQ_Head  = (NET_BUF *)pseg_close;
+        p_conn->TxQ_Tail  = (NET_BUF *)pseg_close;
+    }
+
+                                                                /* Update TCP conn seq nbrs (see Note #2).              */
+    p_conn->TxSeqNbrNextQ += (NET_TCP_SEQ_NBR) seg_len;         /* Update next tx Q seq nbr by close seg len.           */
+    p_conn->TxSeqNbrLast   = (NET_TCP_SEQ_NBR) p_conn->TxSeqNbrNextQ;
+    p_conn->TxSeqNbrClose  = (NET_TCP_SEQ_NBR)(p_conn->TxSeqNbrLast - seg_len);
+
+
+
+                                                                /* -------------- TX TCP CONN CLOSE SEG --------------- */
+    NetTCP_TxConnTxQ(p_conn,
+                     0,
+                     NET_TCP_CONN_TX_ACK_NONE,
+                     DEF_NO,
+                     NET_TCP_CONN_CLOSE_ALL,
+                     DEF_YES,
+                     p_err);
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+        case NET_TCP_ERR_CONN_ACK_NONE:
+        case NET_TCP_ERR_CONN_ACK_INVALID:
+        case NET_TCP_ERR_CONN_ACK_DLYD:
+        case NET_TCP_ERR_CONN_ACK_PREVLY_TXD:
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s).                         */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_CONN_NOT_USED:
+        case NET_TCP_ERR_CONN_CLOSE:
+        case NET_TCP_ERR_CONN_FAULT:
+        case NET_TCP_ERR_CONN_FAIL:
+        case NET_TCP_ERR_INVALID_CONN_STATE:
+        case NET_TCP_ERR_INVALID_CONN_OP:
+        case NET_TCP_ERR_INVALID_LEN_SEG:
+        case NET_TCP_ERR_NONE_AVAIL:
+        case NET_TCP_ERR_TX_PKT:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        case NET_CONN_ERR_INVALID_FAMILY:
+        case NET_CONN_ERR_INVALID_ADDR:
+        case NET_CONN_ERR_INVALID_ADDR_LEN:
+        default:
+             return;
+    }
+
+    NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegConnCloseCtr);
+
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_TxConnAck()
+*
+* Description : (1) Prepare & transmit a TCP connection acknowledgement :
+*
+*                   (a) Validate TCP connection for TCP acknowledgement         See Notes #2, #4, #5, & #6
+*                   (b) Prepare  TCP acknowledgement segment :
+*                       (1) Get  buffer
+*                       (2) Prepare TCP segment :
+*                           (A) TCP segment  addresses
+*                           (B) TCP segment  sequence numbers                   See Notes #4a1D1a1, #4a2A1
+*                                                                                       & #4a1D3b1B,
+*                           (C) TCP segment  transmit flags :
+*                               (1) ACK
+*                           (D) TCP segment  window size
+*                           (E) IP  datagram parameters                         See Note #9
+*                           (F) TCP segment  packet buffer controls
+*                   (c) Transmit TCP connection acknowledgement
+*
+*
+*               (2) NetTCP_TxConnAck() transmits TCP connection acknowledgements in response to certain
+*                   received TCP packets or TCP connection events (see Note #4).  TCP acknowledgements
+*                   transmitted with other TCP controls &/or data SHOULD NOT be transmitted with
+*                   NetTCP_TxConnAck().
+*
+*                   See also 'NetTCP_TxConnTxQ()  Note #2'.
+*
+*
+* Argument(s) : p_conn           Pointer to a TCP connection.
+*               -----           Argument validated in various.
+*
+*               p_buf_hdr        Pointer to network buffer header that received TCP packet.
+*               --------        Argument validated in NetTCP_Rx().
+*
+*               tx_ack_code     Indicate whether & how to transmit a TCP acknowledgement segment :
+*
+*                                   NET_TCP_CONN_TX_ACK_NONE        Do NOT transmit a TCP acknowledgement segment.
+*                                   NET_TCP_CONN_TX_ACK                    Transmit a TCP acknowledgement segment.
+*                                   NET_TCP_CONN_TX_ACK_IMMED              Transmit a TCP acknowledgement segment
+*                                                                              immediately (see Note #4a5).
+*                                   NET_TCP_CONN_TX_ACK_FAULT              Transmit a TCP acknowledgement segment
+*                                                                              immediately in response to an invalid
+*                                                                              received TCP packet (see Note #4a1).
+*                                   NET_TCP_CONN_TX_ACK_TIMEOUT            Transmit a TCP acknowledgement segment
+*                                                                              immediately in response to a delayed
+*                                                                              acknowledgement timeout (see Note #6).
+*
+*               close_code      Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_CLOSE_NONE                 Perform NO  close actions.
+*                                   NET_TCP_CONN_CLOSE_ALL                  Perform ALL close actions.
+*
+*                                   NET_TCP_CONN_CLOSE_CONN_TX_RESET        Perform close connection transmit reset.
+*                                   NET_TCP_CONN_CLOSE_CONN_ALL             Perform ALL   connection close    actions.
+*
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE          Close    transmit idle                  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN     Close    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN      Close    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY       Close    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_RE_TX            Close re-transmit                       timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_ALL              Close ALL                               timers.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection acknowledgement successfully
+*                                                                       transmitted.
+*                               NET_TCP_ERR_CONN_ACK_NONE           TCP connection acknowledgement NOT requested.
+*                               NET_TCP_ERR_CONN_ACK_DLYD           TCP connection acknowledgement transmit delayed
+*                                                                       (see Note #6).
+*                               NET_TCP_ERR_CONN_ACK_PREVLY_TXD     TCP connection acknowledgement previously
+*                                                                       transmitted for segment (see Note #7).
+*                               NET_TCP_ERR_CONN_ACK_INVALID        TCP connection acknowledgement NOT valid for
+*                                                                       current TCP connection state.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+*                                                                   -- RETURNED BY NetTCP_RxPktConnIsValidSeq() : --
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (3) See the following RFC's for TCP acknowledgement generation summary :
+*
+*                   (a) RFC # 793, Section  3.9 'Event Processing : SEGMENT ARRIVES'
+*                   (b) RFC # 813, Section  5
+*                   (c) RFC #1122, Section  4.2.3.2
+*                   (d) RFC #2581, Sections 3.2 & 4.2
+*                   (e) RFC Draft-IETF-TCPm-TCPSecure #00, Sections 2 & 3
+*
+*               (4) (a) TCP connection acknowledgements are transmitted when certain segments are received :
+*
+*                               (A) Some TCP transmit acknowledgement validation logic implemented in previous
+*                                   functions; include duplicate validation logic in NetTCP_TxConnAck() only
+*                                   if debug/validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_DBG_EN is
+*                                   DEF_ENABLED in 'net_cfg.h').
+*
+*                       (1) (A) RFC #793, Section 3.4 'Establishing a Connection : Reset Generation : 1' states that
+*                               "if [a] connection does not exist (CLOSED) then a reset is sent in response to any
+*                               incoming segment except another reset".
+*
+*                               Thus ONLY resets are transmitted from the CLOSED state; never acknowledgements.
+*
+*                           (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN [State]' allows
+*                               for the transmission of TCP connection reset & connection synchronization segments
+*                               ONLY; never acknowledgement-only segments (see also Note #2).
+*
+*                           (C) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                               Check SYN Bit' states that "if ... our SYN has been ACKed ... change the
+*                               connection state to ESTABLISHED, form an ACK segment ... and send it".
+*
+*                               Thus acknowledgements MUST be immediately transmitted in reply to all valid
+*                               synchronization segments received.
+*
+*                           (D) (1) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence
+*                                   Number' states that for the "SYN-RECEIVED STATE, ESTABLISHED STATE, FIN-WAIT-1
+*                                   STATE, FIN-WAIT-2 STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK STATE, TIME-
+*                                   WAIT STATE ... if an incoming segment is not acceptable" :
+*
+*                                   (a) "An acknowledgment should be sent in reply" :
+*
+*                                           (1)   
+*
+*                                   (b) (1) "(unless the RST bit is set)".
+*
+*                                       (2) However, RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 requires
+*                                           transmitting a TCP acknowledgement upon receipt of certain TCP
+*                                           segments regardless of whether "the RST bit" is set (see Notes
+*                                           #4a1D2b1c & #4a1D2b3).
+*
+*                                   See also Notes #4a1D2b & #4a1D3b.
+*
+*                               (2) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check RST Bit'
+*                                       states that "if the RST bit is set ... enter the CLOSED state".
+*
+*                                       Note this check is placed following the sequence check to prevent a segment
+*                                       from an old connection ... from causing an abort of the current connection".
+*
+*                                   (b) (1) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 2.2 amends the "handling
+*                                           of a segment with the RST bit when in a synchronized state" to "provide some
+*                                           protection against ... blind reset attack[s] using the RST bit" :
+*
+*                                           (a) "If the RST bit is set and the sequence number is outside the
+*                                                expected window, silently drop the segment."
+*
+*                                           (b) "If the RST bit is exactly the next expected sequence number [sic],
+*                                                reset the connection"; it is assumed that this should read "if the
+*                                                RST bit is set and the sequence number is exactly the next expected
+*                                                sequence number, reset the connection."
+*
+*                                           (c) "If the RST bit is set and the sequence number does not exactly
+*                                                match the next expected sequence value, yet is within the
+*                                                acceptable window (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) send
+*                                                an acknowledgment."
+*
+*                                       (2) Although RFC Draft-IETF-TCPm-TCPSecure #00 explicitly states that this
+*                                           amendment applies only to the "handling of a ... RST when in a synchronized
+*                                           state", it is assumed that this should also apply to the SYN-RECEIVED state.
+*
+*                                       (3) In addition, RFC Draft-IETF-TCPm-TCPSecure #00 does NOT provide a
+*                                           precedence priority for handling TCP segments received with BOTH the RST
+*                                           & SYN bits set.
+*
+*                                           Therefore, since it does NOT seem reasonable to reset a TCP connection
+*                                           due to a TCP segment that also attempted to synchronize the  TCP connection,
+*                                           it is assumed that the amended handling of the SYN bit should take precedence
+*                                           over the amended handling of the RST bit.
+*
+*                                           See also Note #4a1D3b.
+*
+*                               (3) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN
+*                                       Bit' states that for "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT
+*                                       STATE-1, FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK
+*                                       STATE, TIME-WAIT STATE ... [to next] check the SYN bit ... [and] if
+*                                       the SYN is in the window it is an error, send a reset ... [and] enter
+*                                       the CLOSED state ...
+*
+*                                       [But] if the SYN is not in the window this step would not have been
+*                                       reached and an ack would have been sent".
+*
+*                                   (b) (1) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 3.2 amends the
+*                                           "handling of a segment with the SYN bit set in the synchronized state
+*                                            ... [by] handling ... the SYN bit" as follows :
+*
+*                                           (a) "If the SYN bit is set and the sequence number is outside the
+*                                                expected window, send an ACK back to the peer."
+*
+*                                           (b) "If the SYN bit is set and the sequence number is an exact match to
+*                                                the next expected sequence (RCV.NXT == SEG.SEQ) then send an ACK
+*                                                segment ... but ... subtract one from value being acknowledged."
+*
+*                                           (c) "If the SYN bit is set and the sequence number is acceptable, i.e.:
+*                                                (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND) then send an ACK segment."
+*
+*                                       (2) Although RFC Draft-IETF-TCPm-TCPSecure #00 explicitly states that
+*                                           this amendment applies only to the "handling of a ... SYN ... in a
+*                                           synchronized state", it is assumed that this should also apply to the
+*                                           SYN-RECEIVED state.
+*
+*                               (4) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field'
+*                                   states that if in the "ESTABLISHED STATE" or any state with similar "processing
+*                                   as for the ESTABLISHED STATE", that "if the ACK acks something not yet sent
+*                                   (SEG.ACK > SND.NXT) then send an ACK".
+*
+*                       (2) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Process Segment Text',
+*                           states that in the "ESTABLISHED STATE, FIN-WAIT-1 STATE, FIN-WAIT-2 STATE ... when
+*                           ... TCP takes responsibility for ... data ... it must also acknowledge ... the data" :
+*
+*                           (A) "Send an acknowledgment of the form" :
+*
+*                                   (1)   
+*
+*                           (B) "This acknowledgment should be piggybacked on a segment being transmitted if
+*                                possible without incurring undue delay."
+*
+*                               See also Note #6.
+*
+*                       (3) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check FIN Bit' states
+*                           that "if the FIN bit is set, ... send an acknowledgment for the FIN".
+*
+*                       (4) RFC #813, Section 5 states that "the receiver of data will refrain from sending an
+*                           acknowledgement under certain circumstances ... The most obvious event on which to
+*                           depend is the arrival of another segment.  So, if a segment arrives, postpone sending
+*                           an acknowledgement if ... the following conditions hold" :
+*
+*                           (A) "The push bit is not set in the segment, since it is a reasonable assumption
+*                                that there is more data coming in a subsequent segment."
+*
+*                               (1) However, if the PUSH bit is set in any received segment, an acknowledgement
+*                                   should be immediately transmitted.
+*
+*                           See also Notes #4b1, #5b2, & #6.
+*
+*                       (5) (A) RFC #2581, Section 3.2 states that "a TCP receiver SHOULD send an immediate ACK" :
+*
+*                               (1) "When an out-of-order segment arrives.  The purpose of this ACK is to
+*                                    inform the sender that a segment was received out-of-order and which
+*                                    sequence number is expected."
+*
+*                               (2) "In addition, ... when the incoming segment fills in all or part of a
+*                                    gap in the sequence space.  This will generate more timely information
+*                                    for a sender recovering from a ... retransmission timeout ... [or] a
+*                                    fast retransmit."
+*
+*                           (B) RFC #1122, Section 4.2.2.21 reiterates that "a TCP MAY send an ACK segment
+*                               acknowledging RCV.NXT when a valid segment arrives that is in the window
+*                               but not at the left window edge ... One reason for ACKing out-of-order
+*                               segments [is] to support ... 'fast retransmit'".
+*
+*                   (b) TCP connection acknowledgements are transmitted for certain TCP connection events :
+*
+*                       (1) RFC #813, Section 5 states that "the receiver of data will refrain from sending an
+*                           acknowledgement under certain circumstances ... Postpone sending an acknowledgement
+*                           if ... the following conditions hold" :
+*
+*                           (B) "There is no revised window information to be sent back."
+*
+*                               (1) However, if any local receive window size is available to update to the
+*                                   remote host, an acknowledgement should be immediately transmitted.
+*
+*                           See also Note #4a4 & 'NetTCP_RxConnWinSizeHandler()  Note #4'.
+*
+*               (5) (a) Although NO RFC specifies whether an acknowledgement should or should NOT
+*                       be transmitted in response to a received acknowledgement-only segment, it
+*                       seems reasonable & is assumed that NO TCP connection acknowledgement should
+*                       be transmitted in response to any acknowledgement-only segment(s) received.
+*
+*                       (1) A received TCP segment is considered an acknowledgement-only segment if
+*                           the segment was received with zero segment length, i.e. NO received TCP
+*                           sequences :
+*
+*                           (A) NO synchronization or close controls)
+*                           (B) NO TCP data
+*
+*                   (b) (1) However, since acknowledgements are transmitted in response to various
+*                           invalid segments received, some acknowledgements MUST be transmitted
+*                           even for certain invalid acknowledgement-only segments.
+*
+*                           See also Note #4a1.
+*
+*                       (2) Also, acknowledgements SHOULD be transmitted for received segments with
+*                           the PUSH bit set, even for segments with NO received TCP data.
+*
+*                           See also Note #4a4.
+*
+*                       (3) (A) Also, RFC #1122, Section 4.2.2.17 states that the "probing of zero
+*                               (offered) windows MUST be supported.  A TCP MAY keep its offered
+*                               receive window closed indefinitely.  As long as the receiving TCP
+*                               continues to send acknowledgements in response to the probe segments".
+*
+*                           (B) In order to always acknowledge a remote host's probing of the local
+*                               TCP connection's receive window size :
+*
+*                               (1) Since probe segments :
+*
+*                                   (a) may or may NOT contain data, ...
+*                                   (b) sequence values may or may NOT be within the TCP connection's
+*                                           current receive window;  ...
+*
+*                                   See also Note #4a1D1a1 & 'NetTCP_RxPktConnIsValidSeq()  Note #1d3'.
+*
+*                               (2) ... acknowledgements SHOULD be transmitted in reply to ALL valid
+*                                   & SOME invalid received segments from the remote host whenever
+*                                   the TCP connection's local receive window is zero-sized.
+*
+*               (6) (a) The following sections state that "a TCP SHOULD implement a delayed ACK" :
+*
+*                           (A) RFC # 813, Section 5
+*                           (B) RFC #1122, Section 4.2.3.2
+*                           (C) RFC #2581, Section 4.2
+*
+*                       (1) (A) (1) RFC #1122, Section 4.2.3.2 states that "in a stream of full-sized segments
+*                                   there SHOULD be an ACK for at least every second segment".
+*
+*                               (2) RFC #2581, Section 4.2 reiterates that "an ACK SHOULD be generated for at
+*                                   least every second full-sized segment".
+*
+*                           (B) However, RFC #2581, Section 4.2 states that "an implementation is deemed to
+*                               comply with this requirement ... by acknowledging at least every second segment,
+*                               regardless of size".
+*
+*                       (2) (A) RFC #813, Section 5 states that "the receiver of data will refrain from
+*                               sending an acknowledgement under certain circumstances, in which case it
+*                               must set a timer which will cause the acknowledgement to be sent later".
+*
+*                           (B) (1) (a) RFC #1122, Section 4.2.3.2 states that "an ACK should not
+*                                       be excessively delayed; in particular, the delay MUST be
+*                                       less than 0.5 seconds".
+*
+*                                   (b) RFC #2581, Section 4.2 reiterates that "an ACK ... MUST
+*                                       be generated within 500 ms of the arrival of the first
+*                                       unacknowledged packet".
+*
+*                               (2) However, Stevens, TCP/IP Illustrated, Volume 1, 8th Printing,
+*                                   Section 19.3, Page 265 states that "most implementations use
+*                                   a 200-ms delay".
+*
+*                   (b) However, if NO network timer is available to delay the acknowledgement, the TCP
+*                       connection acknowledgement SHOULD be immediately transmitted.
+*
+*               (7) (a) (1) RFC #1122, Section 4.2.2.14 states that "a careless implementation can send
+*                           two or more acknowledgment segments per data segment received".
+*
+*                       (2) RFC #1122, Section 4.2.2.20 states that "in general, the processing of
+*                           received segments MUST be implemented to aggregate ACK segments whenever
+*                           possible.  For example, if the TCP is processing a series of queued
+*                           segments, it MUST process them all before sending any ACK segments".
+*
+*                       (3) Thus no more than one acknowledgement SHOULD be transmitted in response
+*                           to any received segment.
+*
+*                   (b) RFC #1122, Section 4.2.2.14 also states that "when the application program
+*                       subsequently consumes the data and increases the available receive buffer
+*                       space again, the receiver may send a second acknowledgement segment to update
+*                       the window at the sender".
+*
+*                       However, the application layer receives data from a TCP connection's application
+*                       receive queue asynchronously & irrespective of distinct or specific TCP packets
+*                       (see 'NetTCP_RxAppData()  Note #4a').  Thus any acknowledgement transmissions
+*                       triggered during asynchronous application receives CANNOT be associated with, &
+*                       thereby limited by, any specific received segments.
+*
+*               (8) (a) (1) (A) RFC #793, Sections 3.7 & 2.6 state that "TCP uses retransmission ... to
+*                               ensure delivery of every segment".
+*
+*                           (B) However, RFC #1122, Section 4.2.2.17 'DISCUSSION' states that "it is
+*                               extremely important to remember that ACK (acknowledgment) segments that
+*                               contain no data are not reliably transmitted by TCP".
+*
+*                       (2) Therefore, it is assumed that TCP acknowledgement-ONLY segments should NOT be
+*                           queued for retransmission but SHOULD be silently discarded.
+*
+*                   (b) (1) The network buffer's reference counter is NOT incremented since the TCP layer
+*                           does NOT maintain a reference to any transmitted TCP acknowledgement segments.
+*
+*                       (2) Therefore, the network buffer MUST be freed by lower layer(s).
+*
+*                   See also 'NetTCP_TxConnReset()  Note #7',
+*                          & 'NetTCP_TxConnProbe()  Note #3'.
+*
+*               (9) (a) RFC #1122, Section 4.2.4.2 states that "the [IP] TOS will be specified independently
+*                       in each direction on the connection, so that the receiver application will specify
+*                       the TOS used for ACK segments." #### NET-807
+*
+*                   (b) (1) IP  transmit options currently NOT implemented     See 'net_tcp.c  Note #1d'
+*                       (2) TCP transmit options currently NOT implemented     See 'net_tcp.c  Note #1c'
+*
+*                       See also 'NetTCP_TxPktHandler()  Note #2'.
+*
+*              (10) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) For any network resources NOT linked to the TCP connection, each network resource
+*                       MUST be freed by appropriate function(s).
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnAck (NET_TCP_CONN        *p_conn,
+                                NET_BUF_HDR         *p_buf_hdr,
+                                NET_TCP_ACK_CODE     tx_ack_code,
+                                NET_TCP_CLOSE_CODE   close_code,
+                                NET_ERR             *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_TCP_SEQ_CODE         seq_code;
+    NET_TCP_RESET_CODE       reset_code;
+#endif
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR            src_addrv4;
+    NET_IPv4_ADDR            dest_addrv4;
+    NET_IPv4_TOS             TOS;
+    NET_IPv4_TTL             TTL;
+    NET_IPv4_FLAGS           flags_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_ADDR            src_addrv6;
+    NET_IPv6_ADDR            dest_addrv6;
+    NET_IPv6_TRAFFIC_CLASS   traffic_class;
+    NET_IPv6_FLOW_LABEL      flow_label;
+    NET_IPv6_HOP_LIM         hop_lim;
+    NET_IPv4_FLAGS           flags_ipv6;
+#endif
+    CPU_BOOLEAN              tx_ack;
+    CPU_BOOLEAN              tmr_free;
+    CPU_BOOLEAN              push_avail;
+    NET_TMR_TICK             timeout_tick;
+    NET_BUF_SIZE             data_len;
+    NET_BUF_SIZE             data_ix;
+    NET_BUF_SIZE             data_ix_offset;
+    NET_CONN_ID              conn_id;
+    NET_IF_NBR               if_nbr;
+    NET_BUF                 *pseg_ack;
+    NET_BUF_HDR             *pseg_ack_hdr;
+    NET_TCP_PORT_NBR         src_port;
+    NET_TCP_PORT_NBR         dest_port;
+    NET_TCP_SEQ_NBR          seq_nbr;
+    NET_TCP_SEQ_NBR          ack_nbr;
+    NET_TCP_SEQ_NBR          ack_nbr_delta;
+    NET_TCP_WIN_SIZE         win_size;
+    NET_TCP_FLAGS            flags_tcp;
+    NET_PROTOCOL_TYPE        proto_type;
+    NET_CONN                *p_conn_conn;
+    CPU_BOOLEAN              is_ipv6;
+    NET_ERR                  err;
+
+
+                                                                /* ------------- VALIDATE TCP CONN TX ACK ------------- */
+    tx_ack        = DEF_NO;
+    tmr_free      = DEF_YES;
+    ack_nbr_delta = 0u;
+    is_ipv6       = DEF_NO;
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:                         /* See Note #4a1A.                                      */
+        case NET_TCP_CONN_STATE_LISTEN:                         /* See Note #4a1B.                                      */
+             break;
+
+
+        case NET_TCP_CONN_STATE_SYNC_TXD:                       /* See Note #4a1C.                                      */
+             if (p_buf_hdr != DEF_NULL) {
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #4aA.                                       */
+                 seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+                 if (*p_err != NET_TCP_ERR_NONE) {
+                      return;
+                 }
+                 if (seq_code == NET_TCP_CONN_RX_SEQ_SYNC) {    /* If valid sync rx'd, ...                              */
+                     tx_ack = DEF_YES;                          /* ... tx TCP conn ack.                                 */
+                 }
+#else
+                 tx_ack = DEF_YES;
+#endif
+                 if (p_buf_hdr->TCP_SegAckTxd != DEF_NO) {      /* If prev'ly tx'd TCP conn ack for rx'd seg, ..        */
+                    *p_err = NET_TCP_ERR_CONN_ACK_PREVLY_TXD;   /* .. do NOT re-tx TCP conn ack (see Note #7a3).        */
+                     return;
+                 }
+
+             } else {
+                 tx_ack = DEF_YES;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             if (p_buf_hdr != DEF_NULL) {
+                 if (p_buf_hdr->TCP_SegAckTxd != DEF_NO) {      /* If prev'ly tx'd TCP conn ack for rx'd seg, ..        */
+                    *p_err = NET_TCP_ERR_CONN_ACK_PREVLY_TXD;   /* .. do NOT re-tx TCP conn ack (see Note #7a3).        */
+                     return;
+                 }
+             }
+
+             switch (tx_ack_code) {
+                 case NET_TCP_CONN_TX_ACK_NONE:
+                     *p_err = NET_TCP_ERR_CONN_ACK_NONE;
+                      return;
+
+
+                 case NET_TCP_CONN_TX_ACK:
+                 case NET_TCP_CONN_TX_ACK_IMMED:
+                      if (p_buf_hdr != DEF_NULL) {
+                          push_avail = DEF_BIT_IS_SET(p_buf_hdr->TCP_HdrLen_Flags, NET_TCP_HDR_FLAG_PUSH);
+                          if (push_avail == DEF_YES) {          /* If rx'd seg push'd & en'd, ..                        */
+                              if (p_conn->TxAckImmedRxdPushEn != DEF_DISABLED) {
+                                  tx_ack  = DEF_YES;            /* .. tx TCP conn ack (see Note #4a4A1).                */
+                                  break;
+                              }
+                          }
+
+                          if (p_buf_hdr->TCP_SegLen < 1) {      /* If ack-ONLY seg       (see Note #5a1);   ..          */
+                              if (p_conn->RxWinSizeActual > 0) {/* .. & local rx win > 0,                   ..          */
+                                 *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+                                  return;                       /* .. do NOT tx ack      (see Note #5a);    ..          */
+
+                              } else {                          /* .. & local rx win = 0 (see Note #5b3B2), ..          */
+                                  tx_ack = DEF_YES;             /* .. tx TCP conn ack.                                  */
+                                  break;
+                              }
+                          }
+                      }
+
+                      if (tx_ack_code == NET_TCP_CONN_TX_ACK_IMMED) { /* If immed ack req'd, ...                        */
+                          tx_ack = DEF_YES;                     /* ... tx TCP conn ack.                                 */
+                          break;
+                      }
+
+                      if (p_conn->TxAckDlyTimeout_ms == 0) {    /* If ack dly timeout zero, ...                         */
+                          tx_ack = DEF_YES;                     /* ... tx TCP conn ack.                                 */
+                          break;
+                      }
+
+                      p_conn->TxAckDlyCnt++;                    /* If ack dly cnt >= th, ...                            */
+                      if (p_conn->TxAckDlyCnt >= NET_TCP_ACK_DLY_CNT_TH) {
+                          tx_ack = DEF_YES;                     /* ... tx TCP conn ack (see Note #6a1B).                */
+                          break;
+                      }
+
+                      if (p_conn->TxAckDlyTmr != DEF_NULL) {    /* If ack dly tmr prev'ly started, ...                  */
+                         *p_err = NET_TCP_ERR_CONN_ACK_DLYD;    /* ... continue ack dly (see Note #6a2A).               */
+                          return;
+                      }
+
+                      timeout_tick       = p_conn->TxAckDlyTimeout_tick;
+                      p_conn->TxAckDlyTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_TxConnAckDlyTimeout,
+                                                      (void        *) p_conn,
+                                                      (NET_TMR_TICK ) timeout_tick,
+                                                      (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                                      (NET_ERR     *)&err);
+                      if ( err == NET_TMR_ERR_NONE) {           /* If ack dly tmr avail, ...                            */
+                         *p_err  = NET_TCP_ERR_CONN_ACK_DLYD;   /* ... start ack dly (see Note #6a2A).                  */
+                          return;
+
+                      } else {                                  /* Else tx TCP conn ack (see Note #6b).                 */
+                          tx_ack = DEF_YES;
+                      }
+                      break;
+
+
+                 case NET_TCP_CONN_TX_ACK_FAULT:                /* See Note #4a1D.                                      */
+                      if (p_buf_hdr != DEF_NULL) {
+                          if (p_buf_hdr->TCP_SegSync == DEF_YES) { /* If sync rx'd (see Note #4a1D3b1), ...             */
+                              tx_ack = DEF_YES;                 /* ... tx TCP conn ack; ignore possible reset.          */
+                                                                /* If rx'd sync equal to next rx seq nbr, ...           */
+                              if (p_buf_hdr->TCP_SeqNbr == p_conn->RxSeqNbrNext) {
+                                  ack_nbr_delta = 1u;           /* ... sub 1 from ack (see Note #4a1D3b1B).             */
+                              }
+
+                          } else {
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #4aA.                                       */
+                              seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+                              if (*p_err != NET_TCP_ERR_NONE) {
+                                   return;
+                              }
+                              reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+                              if (*p_err != NET_TCP_ERR_NONE) {
+                                   return;
+                              }
+                              switch (seq_code) {
+                                  case NET_TCP_CONN_RX_SEQ_VALID: /* If       valid seq   rx'd  ..                      */
+                                                                /* .. but invalid reset rx'd, ..                        */
+                                       if (reset_code == NET_TCP_CONN_RX_RESET_INVALID) {
+                                           tx_ack = DEF_YES;    /* .. tx TCP conn ack  (see Note #4a1D2b1c).            */
+                                       }
+                                       break;
+
+
+                                  case NET_TCP_CONN_RX_SEQ_SYNC:/* If invalid sync rx'd, ..                             */
+                                  case NET_TCP_CONN_RX_SEQ_SYNC_INVALID:
+                                       tx_ack = DEF_YES;        /* .. tx TCP conn ack  (see Note #4a1D3b1).             */
+                                       break;
+
+
+                                  case NET_TCP_CONN_RX_SEQ_NONE:
+                                  case NET_TCP_CONN_RX_SEQ_INVALID: /* If invalid seq rx'd (see Note #4a1D1)    ..      */
+                                  default:
+                                                                /* .. & reset NOT rx'd (see Note #4a1D1b1), ..          */
+                                       if (reset_code == NET_TCP_CONN_RX_RESET_NONE) {
+                                           tx_ack = DEF_YES;    /* .. tx TCP conn ack  (see Note #4a1D1a).              */
+                                       }
+                                       break;
+                              }
+#else
+                              tx_ack = DEF_YES;
+#endif
+                          }
+                      } else {
+                          tx_ack = DEF_YES;
+                      }
+                      break;
+
+
+                 case NET_TCP_CONN_TX_ACK_OTW:                  /* See Note #4a1D.                                      */
+                      if (p_buf_hdr != DEF_NULL) {
+                          if (p_buf_hdr->TCP_SegSync == DEF_YES) { /* If sync rx'd (see Note #4a1D3b1), ...             */
+                              tx_ack = DEF_YES;                 /* ... tx TCP conn ack; ignore possible reset.          */
+                                                                /* If rx'd sync equal to next rx seq nbr, ...           */
+                              if (p_buf_hdr->TCP_SeqNbr == p_conn->RxSeqNbrNext) {
+                                  ack_nbr_delta = 1u;           /* ... sub 1 from ack (see Note #4a1D3b1B).             */
+                              }
+
+                          } else {
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #4aA.                                       */
+                              seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+                              if (*p_err != NET_TCP_ERR_NONE) {
+                                   return;
+                              }
+                              reset_code = NetTCP_RxPktConnIsValidReset(p_conn, p_buf_hdr, p_err);
+                              if (*p_err != NET_TCP_ERR_NONE) {
+                                   return;
+                              }
+                              switch (seq_code) {
+                                  case NET_TCP_CONN_RX_SEQ_VALID: /* If       valid seq   rx'd  ..                      */
+                                       tx_ack = DEF_YES;
+                                       break;
+
+
+                                  case NET_TCP_CONN_RX_SEQ_SYNC:/* If invalid sync rx'd, ..                             */
+                                  case NET_TCP_CONN_RX_SEQ_SYNC_INVALID:
+                                       tx_ack = DEF_YES;        /* .. tx TCP conn ack  (see Note #4a1D3b1).             */
+                                       break;
+
+
+                                  case NET_TCP_CONN_RX_SEQ_NONE:
+                                  case NET_TCP_CONN_RX_SEQ_INVALID: /* If invalid seq rx'd (see Note #4a1D1)    ..      */
+                                  default:
+                                                                /* .. & reset NOT rx'd (see Note #4a1D1b1), ..          */
+                                       if (reset_code == NET_TCP_CONN_RX_RESET_NONE) {
+                                           tx_ack = DEF_YES;    /* .. tx TCP conn ack  (see Note #4a1D1a).              */
+                                       }
+                                       break;
+                              }
+#else
+                              tx_ack = DEF_YES;
+#endif
+                          }
+                      } else {
+                          tx_ack = DEF_YES;
+                      }
+                      break;
+
+
+                 case NET_TCP_CONN_TX_ACK_TIMEOUT:
+                      tx_ack   = DEF_YES;
+                      tmr_free = DEF_NO;
+                      break;
+
+
+                 default:
+                      break;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, close_code);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+
+    if (tx_ack != DEF_YES) {                                    /* If NOT valid, abort tx TCP conn ack.                 */
+       *p_err = NET_TCP_ERR_CONN_ACK_INVALID;
+        return;
+    }
+
+
+    NetTCP_TxConnAckDlyReset(p_conn, tmr_free);                 /* Reset ack dly ctrls.                                 */
+
+    if (p_buf_hdr != DEF_NULL) {
+        p_buf_hdr->TCP_SegAckTxd = DEF_YES;                     /* Set ack tx'd for rx'd seg (see Note #7a).            */
+    }
+
+
+                                                                /* ------------- PREPARE TCP CONN ACK SEG ------------- */
+                                                                /* If valid, prepare & tx TCP conn ack.                 */
+                                                                /* Get buf.                                             */
+    conn_id = p_conn->ID_Conn;
+    if_nbr  = NetConn_IF_NbrGet(conn_id, &err);
+    if ( err != NET_CONN_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, close_code);
+       *p_err  = NET_TCP_ERR_CONN_FAULT;
+        return;
+    }
+
+    data_len = NET_TCP_DATA_LEN_TX_ACK;
+#if 0
+    data_ix = NET_BUF_DATA_IX_TX;
+#else
+    if (p_buf_hdr == DEF_NULL) {
+        p_conn_conn = &NetConn_Tbl[p_conn->ID_Conn];
+
+        switch (p_conn_conn->Family) {
+            case NET_CONN_FAMILY_IP_V4_SOCK:
+                 proto_type = NET_PROTOCOL_TYPE_TCP_V4;
+                 is_ipv6    = DEF_NO;
+                 break;
+
+
+            case NET_CONN_FAMILY_IP_V6_SOCK:
+                 proto_type = NET_PROTOCOL_TYPE_TCP_V6;
+                 is_ipv6    = DEF_YES;
+                 break;
+
+
+            default:
+                *p_err = NET_TCP_ERR_CONN_PROTO_FAMILY;
+                return;
+        }
+    } else {
+        if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+            proto_type = NET_PROTOCOL_TYPE_TCP_V4;
+            is_ipv6    = DEF_NO;
+        } else {
+            proto_type = NET_PROTOCOL_TYPE_TCP_V6;
+            is_ipv6    = DEF_YES;
+        }
+    }
+
+    data_ix = 0u;
+
+    NetTCP_GetTxDataIx(if_nbr,
+                       proto_type,
+                       0u,
+                       data_len,
+                       p_conn,
+                      &data_ix,
+                       p_err);
+#endif
+    pseg_ack = NetBuf_Get((NET_IF_NBR     ) if_nbr,
+                          (NET_TRANSACTION) NET_TRANSACTION_TX,
+                          (NET_BUF_SIZE   ) data_len,
+                          (NET_BUF_SIZE   ) data_ix,
+                          (NET_BUF_SIZE  *)&data_ix_offset,
+                          (NET_BUF_FLAGS  ) NET_BUF_FLAG_NONE,
+                          (NET_ERR       *)&err);
+    if ( err != NET_BUF_ERR_NONE) {
+       *p_err  = NET_TCP_ERR_NONE_AVAIL;
+        return;
+    }
+
+    data_ix += data_ix_offset;
+
+                                                                /* ----------------- PREPARE TCP HDR ------------------ */
+                                                                /* Prepare seg addrs.                                   */
+    if (p_buf_hdr != DEF_NULL) {                                /* If TCP pkt rx'd, cfg TCP tx                ...       */
+                                                                /* ...  src  addr from rx'd TCP pkt dest addr ...       */
+        if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+            src_addrv4  = p_buf_hdr->IP_AddrDest;
+            dest_addrv4 = p_buf_hdr->IP_AddrSrc;
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            src_addrv6  = p_buf_hdr->IPv6_AddrDest;
+            dest_addrv6 = p_buf_hdr->IPv6_AddrSrc;
+#endif
+        }
+
+        src_port        = p_buf_hdr->TransportPortDest;
+                                                                /* .. & dest addr from rx'd TCP pkt src  addr.          */
+        dest_port       = p_buf_hdr->TransportPortSrc;
+
+    } else {                                                    /* Else cfg TCP tx pkt addrs from TCP conn addrs.       */
+
+        if (is_ipv6 == DEF_NO) {
+
+#ifdef  NET_IPv4_MODULE_EN
+            NetTCP_TxConnPrepareSegAddrs(p_conn,
+                          (CPU_INT08U *)&src_addrv4,
+                          (CPU_INT08U *)&src_port,
+                                         sizeof(src_addrv4),
+                                         sizeof(src_port),
+                          (CPU_INT08U *)&dest_addrv4,
+                          (CPU_INT08U *)&dest_port,
+                                         sizeof(dest_addrv4),
+                                         sizeof(dest_port),
+                                        &err);
+#endif
+
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            NetTCP_TxConnPrepareSegAddrs(p_conn,
+                          (CPU_INT08U *)&src_addrv6,
+                          (CPU_INT08U *)&src_port,
+                                         sizeof(src_addrv6),
+                                         sizeof(src_port),
+                          (CPU_INT08U *)&dest_addrv6,
+                          (CPU_INT08U *)&dest_port,
+                                         sizeof(dest_addrv6),
+                                         sizeof(dest_port),
+                                        &err);
+#endif
+
+        }
+
+        if ( err != NET_TCP_ERR_NONE) {                         /* See Note #10a.                                       */
+            NetBuf_Free(pseg_ack);
+           *p_err  = NET_TCP_ERR_CONN_FAULT;
+            return;
+        }
+    }
+
+
+                                                                /* Prepare TCP seq nbrs (see Note #1b2B).               */
+    seq_nbr   = p_conn->TxSeqNbrNext;
+    ack_nbr   = p_conn->RxSeqNbrNext - ack_nbr_delta;
+
+                                                                /* Prepare TCP tx flags (see Note #1b2C).               */
+    flags_tcp = NET_TCP_FLAG_NONE  |
+                NET_TCP_FLAG_TX_ACK;
+
+                                                                /* Prepare TCP win size.                                */
+    win_size  = p_conn->RxWinSizeActual;
+
+
+
+                                                                /* Prepare IP params (see Note #9).                     */
+    if (is_ipv6 == DEF_NO) {
+#ifdef  NET_IPv4_MODULE_EN
+
+        NetConn_IPv4TxParamsGet(conn_id, &flags_ipv4, &TOS, &TTL, &err);
+        if ( err != NET_CONN_ERR_NONE) {
+            NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, close_code);
+           *p_err  = NET_TCP_ERR_CONN_FAULT;
+            return;
+        }
+#endif
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        NetConn_IPv6TxParamsGet(conn_id, &traffic_class, &flow_label, &hop_lim, &flags_ipv6, &err);
+        if ( err != NET_CONN_ERR_NONE) {
+            NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, close_code);
+           *p_err  = NET_TCP_ERR_CONN_FAULT;
+            return;
+        }
+#endif
+    }
+
+                                                                /* Init buf ctrls.                                      */
+    pseg_ack_hdr                           = &pseg_ack->Hdr;
+    pseg_ack_hdr->DataIx                   = (CPU_INT16U  )data_ix;
+    pseg_ack_hdr->DataLen                  = (NET_BUF_SIZE)data_len;
+    pseg_ack_hdr->TotLen                   = (NET_BUF_SIZE)pseg_ack_hdr->DataLen;
+
+    pseg_ack_hdr->TCP_SegSync              = (CPU_BOOLEAN  )DEF_NO;
+    pseg_ack_hdr->TCP_SegClose             = (CPU_BOOLEAN  )DEF_NO;
+    pseg_ack_hdr->TCP_SegAck               = (CPU_BOOLEAN  )DEF_YES;
+    pseg_ack_hdr->TCP_SegReset             = (CPU_BOOLEAN  )DEF_NO;
+
+    pseg_ack_hdr->TCP_Flags                = (NET_TCP_FLAGS)flags_tcp;
+
+
+
+
+                                                                /* --------------- TX TCP CONN ACK SEG ---------------- */
+    if (is_ipv6 == DEF_NO) {
+
+#ifdef  NET_IPv4_MODULE_EN
+        pseg_ack_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_TCP_V4;
+        pseg_ack_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_TCP_V4;
+
+        NetTCP_TxPktHandlerIPv4(pseg_ack,
+                                src_addrv4,
+                                src_port,
+                                dest_addrv4,
+                                dest_port,
+                                seq_nbr,
+                                ack_nbr,
+                                win_size,
+                                TOS,
+                                TTL,
+                                flags_tcp,
+                                flags_ipv4,
+                                DEF_NULL,                       /* See Note #9b2.                                       */
+                                DEF_NULL,                       /* See Note #9b1.                                       */
+                               &err);                           /* Ignore transitory tx err(s).                         */
+#endif
+
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        DEF_BIT_SET(pseg_ack_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);
+
+        pseg_ack_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_TCP_V6;
+        pseg_ack_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_TCP_V6;
+
+        NetTCP_TxPktHandlerIPv6(pseg_ack,
+              (NET_IPv6_ADDR *)&src_addrv6,
+                                src_port,
+              (NET_IPv6_ADDR *)&dest_addrv6,
+                                dest_port,
+                                seq_nbr,
+                                ack_nbr,
+                                win_size,
+                                traffic_class,
+                                flow_label,
+                                hop_lim,
+                                flags_tcp,
+                                DEF_NULL,
+                                &err);
+
+#endif
+    }
+#if 0                                                           /* Tx buf freed by lower layer(s) [see Note #8b2].      */
+    NetTCP_TxPktFree(pseg_ack);
+#endif
+    NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegConnAckCtr);
+
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetTCP_TxConnAckDlyReset()
+*
+* Description : Reset TCP connection's delayed acknowledgement controls.
+*
+* Argument(s) : p_conn       Pointer to TCP connection to reset delayed acknowledgement controls.
+*               -----       Argument validated in NetTCP_TxConnAck(),
+*                                                 NetTCP_TxConnTxQ(),
+*                                                 NetTCP_TxConnReTxQ_Timeout().
+*
+*               tmr_free    Indicate whether to free network timer :
+*
+*                               DEF_YES                Free network timer for delayed acknowledgement.
+*                               DEF_NO          Do NOT free network timer for delayed acknowledgement
+*                                                     [Freed by  NetTmr_TaskHandler()
+*                                                            via NetTCP_TxConnAckDlyTimeout()].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnAck(),
+*               NetTCP_TxConnTxQ(),
+*               NetTCP_TxConnReTxQ().
+*
+* Note(s)     : (1) A TCP connection's delayed acknowledgement controls SHOULD be reset whenever :
+*
+*                   (a) TCP data segment(s) are    transmitted
+*                   (b) TCP data segment(s) are re-transmitted
+*
+*                   ... since any transmitted or re-transmitted data segment(s) always transmit an
+*                   accompanying acknowledgement.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnAckDlyReset (NET_TCP_CONN  *p_conn,
+                                        CPU_BOOLEAN    tmr_free)
+{
+    p_conn->TxAckDlyCnt = 0u;                                   /* Reset ack dly cnts ...                               */
+    if (p_conn->TxAckDlyTmr != DEF_NULL) {                      /* ... & free/clr ack dly tmr.                          */
+        if (tmr_free == DEF_YES) {
+            NetTmr_Free(p_conn->TxAckDlyTmr);
+        }
+        p_conn->TxAckDlyTmr  = DEF_NULL;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_TxConnAckDlyTimeout()
+*
+* Description : (1) Handle TCP connection's delayed acknowledgement transmit for the following connected
+*                   states :
+*
+*                   (a) SYN-RECEIVED
+*                   (b) ESTABLISHED
+*                   (c) FIN-WAIT-1
+*                   (d) FIN-WAIT-2
+*                   (e) CLOSING
+*                   (f) TIME-WAIT
+*                   (g) CLOSE-WAIT
+*                   (h) LAST-ACK
+*
+*
+* Argument(s) : p_conn_timeout       Pointer to TCP connection to transmit delayed acknowledgement (see Note #2b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetTCP_TxConnAck().
+*
+* Note(s)     : (2) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_TCP_CONN' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (3) This function is a network timer callback function :
+*
+*                   (a) (1) For the following connection timer(s) ... :
+*
+*                           (A) TCP connection transmit acknowledgement delay timer ('TxAckDlyTmr')
+*
+*                       (2) (A) Clear the timer pointer ... :
+*                               (1) Cleared prior to next handler function(s); ...
+*                               (2) Cleared prior to invalid state fault exit.
+*
+*                           (B) but do NOT re-free the timer.
+*
+*                   (b) Do NOT set the following close timer flag(s) :
+*
+*                       (1) NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnAckDlyTimeout (void  *p_conn_timeout)
+{
+    NET_TCP_CONN        *p_conn;
+    NET_TCP_CLOSE_CODE   close_code;
+    NET_ERR              err;
+
+
+    p_conn      = (NET_TCP_CONN *)p_conn_timeout;               /* See Note #2b2A.                                      */
+
+    close_code =  NET_TCP_CONN_CLOSE_ALL;
+    DEF_BIT_CLR(close_code, NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY); /* See Note #3b1.                                       */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE TCP CONN ----------------- */
+    if (p_conn == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NullPtrCtr);
+        return;
+    }
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             p_conn->TxAckDlyTmr = DEF_NULL;                    /* See Note #3a2A2.                                     */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:                       /* See Note #1.                                         */
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)close_code);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+             return;
+    }
+#endif
+
+
+                                                                /* ---------- HANDLE TCP CONN TX ACK TIMEOUT ---------- */
+    p_conn->TxAckDlyTmr = DEF_NULL;                             /* Clr tx ack dly tmr (see Note #3a2A1).                */
+
+    NetTCP_TxConnAck((NET_TCP_CONN     *) p_conn,
+                     (NET_BUF_HDR      *) 0,
+                     (NET_TCP_ACK_CODE  ) NET_TCP_CONN_TX_ACK_TIMEOUT,
+                     (NET_TCP_CLOSE_CODE) close_code,
+                     (NET_ERR          *)&err);                 /* Ignore transitory tx err(s).                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_TxConnReset()
+*
+* Description : (1) Prepare & transmit a TCP connection reset :
+*
+*                   (a) Validate received TCP packet  for TCP reset                     See Note #5
+*                   (b) Validate TCP connection state for TCP reset                     See Note #4
+*                   (c) Prepare  TCP reset segment :
+*                       (1) Get  buffer
+*                       (2) Prepare TCP segment :
+*                           (A) TCP segment addresses
+*                           (B) TCP segment sequence numbers                            See Note #6
+*                           (C) TCP segment transmit flags :
+*                               (1) RESET
+*                               (2) ACK                                                 See Note #6a2A
+*                           (D) TCP segment window size
+*                           (E) TCP segment packet buffer controls
+*                   (d) Transmit TCP connection reset
+*
+*
+* Argument(s) : p_conn           Pointer to a TCP connection.
+*
+*               p_buf_hdr        Pointer to network buffer header that received TCP packet, if available.
+*
+*               tx_reset_code   Indicate whether & how to transmit a TCP reset segment :
+*
+*                                   NET_TCP_CONN_TX_RESET           Transmit a TCP reset segment, if permitted
+*                                                                       (see Notes #4 & #5).
+*                                   NET_TCP_CONN_TX_RESET_FAULT     Transmit a TCP reset segment immediately for
+*                                                                       a closing TCP connection fault.
+*
+*               close_code      Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_CLOSE_NONE                 Perform NO  close actions.
+*                                   NET_TCP_CONN_CLOSE_ALL                  Perform ALL close actions.
+*
+*                                   NET_TCP_CONN_CLOSE_CONN_TX_RESET        Perform close connection transmit reset.
+*                                   NET_TCP_CONN_CLOSE_CONN_ALL             Perform ALL   connection close    actions.
+*
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE          Close    transmit idle                  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN     Close    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN      Close    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY       Close    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_RE_TX            Close re-transmit                       timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_ALL              Close ALL                               timers.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection reset successfully transmitted.
+*                               NET_TCP_ERR_CONN_RESET_INVALID      TCP connection reset NOT valid for current TCP
+*                                                                       connection state.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+*                                                                   - RETURNED BY NetTCP_RxPktConnIsValidSeq() : -
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (2) The following TCP header fields MUST be decoded &/or converted from network-order to host-
+*                   order BEFORE any TCP Reset Segments are transmitted (see 'NetTCP_RxPktValidate()  Note #3') :
+*
+*                   (a) Sequence        Number
+*                   (b) Acknowledgement Number
+*                   (c) Segment Length
+*
+*               (3) See the following RFC's for TCP reset generation summary :
+*
+*                   (a) RFC #793, Section 3.4 'Establishing a Connection : Reset Generation'
+*                   (b) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES'
+*                   (c) RFC Draft-IETF-TCPm-TCPSecure #00, Section 3
+*
+*               (4) TCP connection resets are transmitted :
+*
+*                   (a) When certain invalid segments are received :
+*
+*                               (A) Some TCP transmit reset validation logic implemented in previous functions;
+*                                   include duplicate validation logic in NetTCP_TxConnReset() only if debug/
+*                                   validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_DBG_EN is DEF_ENABLED
+*                                   in 'net_cfg.h').
+*
+*                       (1) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : CLOSED [State]'
+*                               states that if the current TCP connection "state is CLOSED", then ...
+*
+*                               (1) "An incoming segment     containing a RST is discarded".
+*                               (2) "An incoming segment NOT containing a RST causes a RST to be sent".
+*
+*                           (B) RFC #793, Section 3.4 'Establishing a Connection : Reset Generation : 1'
+*                               reiterates that "if [a] connection does not exist (CLOSED) then a reset is
+*                               sent in response to any incoming segment except another reset".
+*
+*                       (2) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN [State] :
+*                               Check for ACK' states that "any acknowledgment is bad if it arrives on a
+*                               connection still in the LISTEN state.  An acceptable reset segment should
+*                               be formed for any arriving ACK-bearing segment".
+*
+*                           (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN [State] :
+*                               Check for SYN' also states that "if the security/compartment on the incoming
+*                               segment does not exactly match the security/compartment in the TCB ... [or]
+*                               if the SEG.PRC is ... not allowed [then] send a reset".
+*
+*                               However, these checks for invalid connection permissions are NOT necessary
+*                               since TCP security & precedence NOT supported (see 'net_tcp.c  Note #1a').
+*
+*                       (3) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                           Check ACK Bit' states that "if the state is SYN-SENT" & "the ACK bit is set" &
+*                           the incoming segment's "SEG.ACK =< ISS, or SEG.ACK > SND.NXT, send a reset".
+*
+*                       (4) (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check Sequence
+*                               Number' states that for the "SYN-RECEIVED STATE, ESTABLISHED STATE, FIN-
+*                               WAIT-1 STATE, FIN-WAIT-2 STATE, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK
+*                               STATE, TIME-WAIT STATE", to "first check [the] sequence number ... [and if
+*                               it] is not acceptable, an acknowledgment should be sent in reply ... unless
+*                               the RST bit is set".
+*
+*                           (B) (1) (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check SYN
+*                                       Bit' states that for "SYN-RECEIVED [STATE], ESTABLISHED STATE, FIN-WAIT
+*                                       STATE-1, FIN-WAIT STATE-2, CLOSE-WAIT STATE, CLOSING STATE, LAST-ACK
+*                                       STATE, TIME-WAIT STATE ... [to next] check the SYN bit ... [and] if
+*                                       the SYN is in the window it is an error, send a reset, any outstanding
+*                                       RECEIVEs and SEND[s] should receive 'reset' responses, all segment
+*                                       queues should be flushed, the user should also receive an unsolicited
+*                                       general 'connection reset' signal[, and] enter the CLOSED state".
+*
+*                                   (b) But "if the SYN is not in the window this step would not have been
+*                                       reached and an ack would have been sent" (see Note #4a4A).
+*
+*                               (2) (a) HOWEVER, RFC Draft-IETF-TCPm-TCPSecure #00, Section 3.2 amends the
+*                                       "handling of a segment with the SYN bit set in the synchronized state
+*                                        ... [by] handling ... the SYN bit" as follows :
+*
+*                                       (a) "If the SYN bit is set and the sequence number is outside the
+*                                            expected window, send an ACK back to the peer."
+*
+*                                       (b) "If the SYN bit is set and the sequence number is an exact
+*                                            match to the next expected sequence (RCV.NXT == SEG.SEQ)
+*                                            then send an ACK segment ... but ... subtract one from
+*                                            value being acknowledged."
+*
+*                                       (c) "If the SYN bit is set and the sequence number is acceptable,
+*                                            i.e.: (RCV.NXT <= SEG.SEQ <= RCV.NXT+RCV.WND) then send an
+*                                            ACK segment."
+*
+*                                   (b) Although RFC Draft-IETF-TCPm-TCPSecure #00 explicitly states that
+*                                       this amendment applies only to the "handling of a ... SYN ... in a
+*                                       synchronized state", it is assumed that this should also apply to the
+*                                       SYN-RECEIVED state.
+*
+*                           (C) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field'
+*                               states to next "check the ACK Field" :
+*
+*                               (1) If in the "SYN-RECEIVED STATE ... [and] if the segment acknowledgment
+*                                   is not acceptable, form a reset segment".
+*
+*                               (2) If in the "ESTABLISHED STATE" or any state with similar "processing as
+*                                   for the ESTABLISHED STATE", that "if the ACK acks something not yet sent
+*                                   (SEG.ACK >  SND.NXT) then send an ACK" but "if the ACK is a duplicate
+*                                   (SEG.ACK =< SND.UNA), it can be ignored".
+*
+*                           (D) RFC #793, Section 3.4 'Establishing a Connection : Reset Generation : 3'
+*                               reiterates that for any TCP "connection ... in a synchronized state
+*                               (ESTABLISHED, FIN-WAIT-1, FIN-WAIT-2, CLOSE-WAIT, CLOSING, LAST-ACK,
+*                               TIME-WAIT), any unacceptable segment (out of window sequence number
+*                               or unacceptible [sic] acknowledgment number) must elicit only an empty
+*                               acknowledgment segment containing the current send-sequence number and
+*                               an acknowledgment indicating the next sequence number expected to be
+*                               received".
+*
+*                   (b) (1) When TCP connection fault-closes from the following synchronization/connected/
+*                           closing states :
+*
+*                           (A) SYN-RECEIVED
+*                           (B) SYN-SENT
+*                           (C) ESTABLISHED
+*                           (D) FIN-WAIT-1
+*                           (E) FIN-WAIT-2
+*                           (F) CLOSING
+*                           (G) TIME_WAIT
+*                           (H) CLOSE-WAIT
+*                           (I) LAST-ACK
+*
+*                       (2) Although NO RFC directly states to transmit a TCP reset segment when a TCP
+*                           connection fault-closes, it is inferred & seems reasonable that a TCP reset
+*                           segment SHOULD be transmitted whenever a TCP connection closes abnormally.
+*
+*               (5) The following sections reiterate the generalization that "a reset is sent in response
+*                   to any [unacceptable segment] ... EXCEPT* another reset"; also "send a reset (UNLESS*
+*                   the RST bit is set, if so drop the segment)" :                      [*emphasis added]
+*
+*                   (a) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN   [State] :
+*                           Check for RST'
+*                   (b) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State] :
+*                           Check ACK Bit'
+*                   (c) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                           SYN-RECEIVED STATE' (see Note #5A)
+*
+*                       (A) This confirms that the received segment does NOT contain a TCP reset control
+*                           since it follows RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES :
+*                           Check RST Bit'.
+*
+*               (6) (a) (1) The following sections ... :
+*
+*                           (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : CLOSED   [State]'
+*                           (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : LISTEN   [State]'
+*                               (1) Amended by RFC #1122, Section 4.2.2.20.(b)
+*                           (C) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : SYN-SENT [State]'
+*                           (D) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES : Check ACK Field :
+*                                   SYN-RECEIVED STATE'
+*
+*                       (2) ... generalize that "the acknowledgment and sequence field values [for the reset
+*                           segment to transmit] are selected to make the reset sequence acceptable to the
+*                           TCP that sent the offending segment" (see Note #4a) :
+*
+*                           (A) "If the ACK bit is off, sequence number zero is used,
+*
+*                                    "
+*
+*                           (B) "If the ACK bit is on,
+*
+*                                   "
+*
+*                   (b) However, NO RFC specifies the sequence & acknowledgement numbers to use when
+*                       transmitting a reset segment for a TCP connection that closes due to any fault
+*                       condition(s) [see Note #4b].
+*
+*                       (1) #### Therefore, TCP transmit reset segments for fault-closing TCP connections
+*                           should be prepared as follows :
+*
+*                           (A) With the following TCP sequence numbers :
+*
+*                               (1) TCP_SeqNbr  =  TxSeqNbrUnAckd
+*
+*                               (2) TCP_AckNbr  =  RxSeqNbrNext
+*
+*                                       where
+*
+*                                           TCP_SeqNbr          TCP transmit reset segment sequence        number
+*                                           TCP_AckNbr          TCP transmit reset segment acknowledgement number
+*                                           TxSeqNbrUnAckd      TCP connection's currently unacknowledged transmit
+*                                                                   sequence number
+*                                           RxSeqNbrNext        TCP connection's currently expected next  receive
+*                                                                   sequence number
+*
+*                           (B) With the following TCP segment header flags set :
+*
+*                               (1) RESET
+*
+*                       (2) This TCP transmit reset segment format complies with TCP connection received
+*                           reset segment handling as specified in RFC #793, Section 3.9 'Event Processing :
+*                           SEGMENT ARRIVES'.
+*
+*                           See also 'NetTCP_RxPktConnIsValidReset()  Notes #2a2, 2a3, 2a4A1, & 2a4B1'.
+*
+*               (7) (a) (1) RFC #793, Sections 3.7 & 2.6 state that "TCP uses retransmission ... to ensure
+*                           delivery of every segment".
+*
+*                       (2) However, NO RFC specifies whether TCP connection reset segments should be queued
+*                           for retransmission.  Therefore, it is assumed that ALL TCP connection reset
+*                           segments SHOULD NOT be queued for retransmission but SHOULD be silently discarded.
+*
+*                   (b) (1) The network buffer's reference counter is NOT incremented since the TCP layer
+*                           does NOT maintain a reference to any transmitted TCP connection reset segments.
+*
+*                       (2) Therefore, the network buffer MUST be freed by lower layer(s).
+*
+*                   See also 'NetTCP_TxConnAck()    Note #8',
+*                          & 'NetTCP_TxConnProbe()  Note #3'.
+*
+*               (8) On ANY error(s) :
+*
+*                   (a) Network resources MUST be appropriately freed :
+*
+*                       (1) For any network resources NOT linked to the TCP connection, each network resource
+*                           MUST be freed by appropriate function(s).
+*
+*                   (b) TCP connection MUST NOT be re-closed.
+*
+*                       See also 'NetTCP_ConnClose()  Note #5'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnReset (NET_TCP_CONN        *p_conn,
+                                  NET_BUF_HDR         *p_buf_hdr,
+                                  NET_TCP_RESET_CODE   tx_reset_code,
+                                  NET_TCP_CLOSE_CODE   close_code,
+                                  NET_ERR             *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_TCP_ACK_CODE           ack_code;
+    NET_TCP_SEQ_CODE           seq_code;
+#endif
+    CPU_BOOLEAN                tx_reset;
+    CPU_BOOLEAN                conn_if_nbr_avail;
+    NET_CONN_ID                conn_id;
+    NET_CONN                  *p_net_conn = DEF_NULL;
+    NET_IF_NBR                 if_nbr;
+    NET_BUF_SIZE               data_len;
+    NET_BUF_SIZE               data_ix;
+    NET_BUF_SIZE               data_ix_offset;
+    NET_BUF                   *pseg_reset;
+    NET_BUF_HDR               *pseg_reset_hdr;
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR              src_addrv4;
+    NET_IPv4_ADDR              dest_addrv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_ADDR              src_addrv6;
+    NET_IPv6_ADDR              dest_addrv6;
+#endif
+    NET_TCP_PORT_NBR           src_port;
+    NET_TCP_PORT_NBR           dest_port;
+    NET_TCP_SEQ_NBR            seq_nbr;
+    NET_TCP_SEQ_NBR            ack_nbr;
+    NET_TCP_WIN_SIZE           win_size;
+    NET_TCP_FLAGS              flags_tcp;
+    NET_PROTOCOL_TYPE          proto_type;
+    NET_CONN_FAMILY            proto_family = NET_CONN_FAMILY_IP_V4_SOCK;
+    NET_ERR                    err;
+
+
+                                                                /* -------------- VALIDATE RX'D TCP PKT --------------- */
+    if (p_buf_hdr != DEF_NULL) {
+        if (p_buf_hdr->TCP_SegReset != DEF_NO) {                /* If TCP reset pkt rx'd, ...                           */
+           *p_err = NET_TCP_ERR_CONN_RESET_INVALID;             /* ... do NOT tx TCP conn reset (see Note #5).          */
+            return;
+        }
+    }
+
+
+                                                                /* ------------- VALIDATE TCP CONN STATE -------------- */
+    tx_reset = DEF_NO;
+
+    if (p_conn != DEF_NULL) {
+        switch (p_conn->ConnState) {
+            case NET_TCP_CONN_STATE_FREE:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+                *p_err = NET_TCP_ERR_CONN_NOT_USED;
+                 return;
+
+
+            case NET_TCP_CONN_STATE_CLOSED:                     /* See Note #4a1.                                       */
+                 tx_reset          = DEF_YES;
+                 conn_if_nbr_avail = DEF_NO;
+                 break;
+
+
+            case NET_TCP_CONN_STATE_LISTEN:                     /* See Note #4a2.                                       */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #4aA.                                       */
+                 if (p_buf_hdr != DEF_NULL) {                   /* If seg rx'd                 ...                      */
+                     ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+                     if (*p_err != NET_TCP_ERR_NONE) {
+                          return;
+                     }
+                     if (ack_code != NET_TCP_CONN_RX_ACK_NONE) {/* ... with ANY (invalid) ack, ...                      */
+                         tx_reset  = DEF_YES;                   /* ... tx TCP conn reset (see Note #4a2A).              */
+                     }
+                 }
+
+#else
+                 tx_reset          = DEF_YES;
+#endif
+                 conn_if_nbr_avail = DEF_NO;
+                 break;
+
+
+            case NET_TCP_CONN_STATE_SYNC_TXD:                   /* See Note #4a3.                                       */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #4aA.                                       */
+                 switch (tx_reset_code) {
+                     case NET_TCP_CONN_TX_RESET:
+                     default:
+                          if (p_buf_hdr != DEF_NULL) {          /* If seg rx'd            ...                           */
+                              ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+                              if (*p_err != NET_TCP_ERR_NONE) {
+                                   return;
+                              }
+                                                                /* ...  with invalid ack, ...                           */
+                              if (ack_code == NET_TCP_CONN_RX_ACK_INVALID) {
+                                  tx_reset  = DEF_YES;          /* ...  tx TCP conn reset (see Note #4a3).              */
+                              }
+
+                          } else {                              /* Else no seg rx'd, ...                                */
+                              tx_reset = DEF_YES;               /* ...  tx TCP conn reset (see Note #4b1B).             */
+                          }
+                          break;
+
+
+                     case NET_TCP_CONN_TX_RESET_FAULT:
+                          tx_reset = DEF_YES;
+                          break;
+                 }
+
+#else
+                (void)&tx_reset_code;                           /* Prevent 'variable unused' compiler warning.          */
+                 tx_reset          = DEF_YES;
+#endif
+                 conn_if_nbr_avail = DEF_YES;
+                 break;
+
+
+            case NET_TCP_CONN_STATE_SYNC_RXD:                   /* See Note #4a4.                                       */
+            case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+            case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #4aA.                                       */
+                 switch (tx_reset_code) {
+                     case NET_TCP_CONN_TX_RESET:
+                     default:
+                          if (p_buf_hdr != DEF_NULL) {          /* If seg rx'd                                  ...     */
+                              seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+                              if (*p_err != NET_TCP_ERR_NONE) {
+                                   return;
+                              }
+                                                                /* ... with   invalid seq/sync,                 ...     */
+                              if (seq_code != NET_TCP_CONN_RX_SEQ_VALID) {
+                                                                /* ... tx TCP conn ack (see Notes #4a4A & #4a4B2),      */
+                                  NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+                                 *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+                                  return;
+                              }
+
+                              ack_code = NetTCP_RxPktConnIsValidAck(p_conn, p_buf_hdr, p_err);
+                              if (*p_err != NET_TCP_ERR_NONE) {
+                                   return;
+                              }
+                                                                /* ...  without valid ack,                      ...     */
+                              if (ack_code != NET_TCP_CONN_RX_ACK_VALID) {
+                                  tx_reset  = DEF_YES;          /* ...  tx TCP conn reset (see Note #4a4C1).            */
+                              }
+
+                          } else {                              /* Else no seg rx'd, ...                                */
+                              tx_reset = DEF_YES;               /* ...  tx TCP conn reset (see Note #4b1A).             */
+                          }
+                          break;
+
+
+                     case NET_TCP_CONN_TX_RESET_FAULT:
+                          tx_reset = DEF_YES;
+                          break;
+                 }
+
+#else
+                (void)&tx_reset_code;                           /* Prevent 'variable unused' compiler warning.          */
+                 tx_reset          = DEF_YES;
+#endif
+                 conn_if_nbr_avail = DEF_YES;
+                 break;
+
+
+            case NET_TCP_CONN_STATE_CONN:                       /* See Note #4a4.                                       */
+            case NET_TCP_CONN_STATE_FIN_WAIT_1:
+            case NET_TCP_CONN_STATE_FIN_WAIT_2:
+            case NET_TCP_CONN_STATE_CLOSING:
+            case NET_TCP_CONN_STATE_TIME_WAIT:
+            case NET_TCP_CONN_STATE_CLOSE_WAIT:
+            case NET_TCP_CONN_STATE_LAST_ACK:
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #4aA.                                       */
+                 switch (tx_reset_code) {
+                     case NET_TCP_CONN_TX_RESET:
+                     default:
+                          if (p_buf_hdr != DEF_NULL) {          /* If seg rx'd                ...                       */
+                              seq_code = NetTCP_RxPktConnIsValidSeq(p_conn, p_buf_hdr, p_err);
+                              if (*p_err != NET_TCP_ERR_NONE) {
+                                   return;
+                              }
+                                                                /* ... with invalid seq/sync, ...                       */
+                              if (seq_code != NET_TCP_CONN_RX_SEQ_VALID) {
+                                                                /* ... tx TCP conn ack (see Notes #4a4A & #4a4B2).      */
+                                  NetTCP_TxConnAck(p_conn, p_buf_hdr, NET_TCP_CONN_TX_ACK_FAULT, NET_TCP_CONN_CLOSE_ALL, &err);
+                                 *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+                                  return;
+                              }
+
+                          } else {                              /* Else no seg rx'd, ...                                */
+                              tx_reset = DEF_YES;               /* ...  tx TCP conn reset (see Notes #4b1C - #4b1I).    */
+                          }
+                          break;
+
+
+                     case NET_TCP_CONN_TX_RESET_FAULT:
+                          tx_reset = DEF_YES;
+                          break;
+                 }
+
+#else
+                (void)&tx_reset_code;                           /* Prevent 'variable unused' compiler warning.          */
+                 tx_reset          = DEF_YES;
+#endif
+                 conn_if_nbr_avail = DEF_YES;
+                 break;
+
+
+            case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+                 tx_reset          = DEF_YES;
+                 conn_if_nbr_avail = DEF_YES;
+                 break;
+
+
+            case NET_TCP_CONN_STATE_NONE:
+            default:
+                 if (close_code != NET_TCP_CONN_CLOSE_NONE) {   /* If tx reset NOT req'd by TCP conn close fnct(s),     */
+                                                                /* ... close TCP conn (see Note #8b).                   */
+                     DEF_BIT_CLR(close_code, NET_TCP_CONN_CLOSE_CONN_TX_RESET);
+                     NetTCP_ConnClose(p_conn, DEF_NULL, DEF_YES, close_code);
+                 }
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+                *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+                 return;
+        }
+
+    } else {                                                    /* If NO demux'd TCP conn avail, handle as CLOSED.      */
+        if (p_buf_hdr != DEF_NULL) {                            /* If rx'd pkt avail, ...                               */
+            tx_reset  =  DEF_YES;                               /* ... tx reset.                                        */
+        }
+        conn_if_nbr_avail = DEF_NO;
+    }
+
+
+    if (tx_reset != DEF_YES) {                                  /* If NOT valid, abort tx TCP conn reset.               */
+       *p_err = NET_TCP_ERR_CONN_RESET_INVALID;
+        return;
+    }
+
+
+                                                                /* ------------ PREPARE TCP CONN RESET SEG ------------ */
+                                                                /* If valid, prepare & tx TCP conn reset.               */
+    if ((p_conn            != DEF_NULL) &&                      /* If avail, ...                                        */
+        (conn_if_nbr_avail == DEF_YES )) {
+         conn_id = p_conn->ID_Conn;
+         if_nbr  = NetConn_IF_NbrGet(conn_id, &err);            /* ...  get TCP conn's IF nbr.                          */
+         if ( err != NET_CONN_ERR_NONE) {
+             NetTCP_ConnClose(p_conn, DEF_NULL, DEF_YES, close_code);
+            *p_err = NET_TCP_ERR_CONN_FAULT;
+             return;
+         }
+
+    } else if (p_buf_hdr != DEF_NULL) {                         /* Else get rx'd pkt's IF nbr.                          */
+
+         if_nbr = p_buf_hdr->IF_Nbr;
+
+    } else if (p_conn != DEF_NULL) {
+        conn_id = p_conn->ID_Conn;
+        if_nbr  = NetConn_IF_NbrGet(conn_id, &err);
+        if (err != NET_CONN_ERR_NONE) {
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)close_code);
+            *p_err  = NET_TCP_ERR_CONN_FAULT;
+             return;
+         }
+
+         if (if_nbr == NET_IF_NBR_NONE) {                           /* Set IF nbr to default if conn IF is not defined. */
+             if_nbr = NetIF_GetDflt();
+         }
+
+    } else {
+        *p_err  = NET_TCP_ERR_CONN_FAULT;
+         return;
+    }
+
+    proto_family = NET_SOCK_PROTOCOL_FAMILY_NONE;
+
+    if (p_conn != DEF_NULL) {
+        conn_id      =  p_conn->ID_Conn;
+        p_net_conn   = &NetConn_Tbl[conn_id];
+        proto_family =  p_net_conn->Family;
+
+    } else {
+        switch(p_buf_hdr->ProtocolHdrTypeNet) {
+#ifdef  NET_IPv4_MODULE_EN
+            case NET_PROTOCOL_TYPE_IP_V4:
+            case NET_PROTOCOL_TYPE_IP_V4_OPT:
+                 proto_family = NET_SOCK_PROTOCOL_FAMILY_IP_V4;
+                 break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+            case NET_PROTOCOL_TYPE_IP_V6:
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_HOP_BY_HOP:
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_ROUTING:
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_FRAG:
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_ESP:
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_AUTH:
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_NONE:
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_DEST:
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_MOBILITY:
+                 proto_family = NET_SOCK_PROTOCOL_FAMILY_IP_V6;
+                 break;
+#endif
+
+            default:
+                 break;
+        }
+    }
+
+                                                                /* Get buf.                                             */
+    data_len = NET_TCP_DATA_LEN_TX_RESET;
+    data_ix  = 0u;
+
+    switch (proto_family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+             proto_type = NET_PROTOCOL_TYPE_TCP_V4;
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+             case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+             proto_type = NET_PROTOCOL_TYPE_TCP_V6;
+             break;
+#endif
+
+        default:
+            break;
+    }
+
+    NetTCP_GetTxDataIx(if_nbr,
+                       proto_type,
+                       0u,
+                       data_len,
+                       p_conn,
+                      &data_ix,
+                       p_err);
+
+    pseg_reset = NetBuf_Get(if_nbr,
+                            NET_TRANSACTION_TX,
+                            data_len,
+                            data_ix,
+                           &data_ix_offset,
+                            NET_BUF_FLAG_NONE,
+                           &err);
+    if (err  != NET_BUF_ERR_NONE) {
+       *p_err = NET_TCP_ERR_NONE_AVAIL;
+        return;
+    }
+
+    data_ix    +=  data_ix_offset;
+
+
+                                                                /* ----------------- PREPARE TCP HDR ------------------ */
+                                                                /* Prepare seg addrs.                                   */
+    if (p_buf_hdr != DEF_NULL) {                                /* If TCP pkt rx'd, cfg TCP tx                ...       */
+                                                                /* ...  src  addr from rx'd TCP pkt dest addr ...       */
+                                                                /* .. & dest addr from rx'd TCP pkt src  addr.          */
+        if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+            src_addrv4  = p_buf_hdr->IP_AddrDest;
+            dest_addrv4 = p_buf_hdr->IP_AddrSrc;
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            src_addrv6  = p_buf_hdr->IPv6_AddrDest;
+            dest_addrv6 = p_buf_hdr->IPv6_AddrSrc;
+#endif
+        }
+
+        src_port  = p_buf_hdr->TransportPortDest;
+        dest_port = p_buf_hdr->TransportPortSrc;
+
+    } else {                                                    /* Else cfg TCP tx pkt addrs from TCP conn addrs.       */
+
+        switch (p_net_conn->Family) {
+#ifdef  NET_IPv4_MODULE_EN
+            case NET_CONN_FAMILY_IP_V4_SOCK:
+                 NetTCP_TxConnPrepareSegAddrs(p_conn,
+                               (CPU_INT08U *)&src_addrv4,
+                               (CPU_INT08U *)&src_port,
+                                              sizeof(src_addrv4),
+                                              sizeof(src_port),
+                               (CPU_INT08U *)&dest_addrv4,
+                               (CPU_INT08U *)&dest_port,
+                                              sizeof(dest_addrv4),
+                                              sizeof(dest_port),
+                                             &err);
+                 break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+            case NET_CONN_FAMILY_IP_V6_SOCK:
+                 NetTCP_TxConnPrepareSegAddrs(p_conn,
+                               (CPU_INT08U *)&src_addrv6,
+                               (CPU_INT08U *)&src_port,
+                                              sizeof(src_addrv6),
+                                              sizeof(src_port),
+                               (CPU_INT08U *)&dest_addrv6,
+                               (CPU_INT08U *)&dest_port,
+                                              sizeof(dest_addrv6),
+                                              sizeof(dest_port),
+                                             &err);
+                 break;
+#endif
+            default:
+                *p_err = NET_TCP_ERR_CONN_PROTO_FAMILY;
+                 return;
+        }
+
+        if ( err != NET_TCP_ERR_NONE) {                         /* See Note #8a.                                        */
+            NetBuf_Free(pseg_reset);
+           *p_err  = NET_TCP_ERR_CONN_FAULT;
+            return;
+        }
+    }
+
+
+                                                                /* Prepare TCP tx flags (see Note #1c2C).               */
+    flags_tcp = NET_TCP_FLAG_NONE    |
+                NET_TCP_FLAG_TX_RESET;
+
+                                                                /* Prepare TCP seq nbrs (see Note #6).                  */
+    if (p_buf_hdr != DEF_NULL) {
+        if (p_buf_hdr->TCP_SegAck != DEF_NO) {                  /* If TCP ack rx'd  (see Note #6a2B), ...               */
+            seq_nbr = p_buf_hdr->TCP_AckNbr;                    /* .. tx  seq = ack                   ...               */
+            ack_nbr = NET_TCP_ACK_NBR_NONE;                     /* .. &   ack = none.                                   */
+
+        } else {                                                /* Otherwise        (see Note #6a2A), ...               */
+            seq_nbr = NET_TCP_SEQ_NBR_NONE;                     /* .. tx  seq = 0 (none)              ...               */
+            ack_nbr = p_buf_hdr->TCP_SeqNbr                     /* .. &   ack = seg seq               ...               */
+                    + p_buf_hdr->TCP_SegLen;                    /* ..         + seg len.                                */
+
+            if (p_buf_hdr->TCP_SegSync == DEF_YES) {
+                ack_nbr += 1;
+            }
+
+            if (p_buf_hdr->TCP_SegClose == DEF_YES) {
+                ack_nbr += 1;
+            }
+
+            DEF_BIT_SET(flags_tcp, NET_TCP_FLAG_TX_ACK);
+        }
+
+    } else {                                                    /* Else no seg rx'd (see Note #6b1A), ...               */
+        seq_nbr = p_conn->TxSeqNbrUnAckd;                       /* .. tx  seq = tx unack'd            ...               */
+        ack_nbr = p_conn->RxSeqNbrNext;                         /* .. &   ack = rx next.                                */
+#ifdef  TEST_TCP_3_18
+        DEF_BIT_SET(flags_tcp, NET_TCP_FLAG_TX_ACK);
+#endif
+    }
+
+                                                                /* Prepare TCP win size.                                */
+    win_size = NET_TCP_WIN_SIZE_NONE;
+
+
+                                                                /* Init buf ctrls.                                      */
+    pseg_reset_hdr               = &pseg_reset->Hdr;
+    pseg_reset_hdr->DataIx       =  data_ix;
+    pseg_reset_hdr->DataLen      =  data_len;
+    pseg_reset_hdr->TotLen       =  pseg_reset_hdr->DataLen;
+
+    pseg_reset_hdr->TCP_SegSync  =  DEF_NO;
+    pseg_reset_hdr->TCP_SegClose =  DEF_NO;
+    pseg_reset_hdr->TCP_SegAck   =  DEF_BIT_IS_SET(flags_tcp, NET_TCP_FLAG_TX_ACK);
+    pseg_reset_hdr->TCP_SegReset =  DEF_YES;
+
+    pseg_reset_hdr->TCP_Flags    =  flags_tcp;
+
+
+
+                                                                /* -------------- TX TCP CONN RESET SEG --------------- */
+    switch (proto_family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_CONN_FAMILY_IP_V4_SOCK:
+             pseg_reset_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_TCP_V4;
+             pseg_reset_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_TCP_V4;
+
+             NetTCP_TxPktHandlerIPv4(pseg_reset,
+                                     src_addrv4,
+                                     src_port,
+                                     dest_addrv4,
+                                     dest_port,
+                                     seq_nbr,
+                                     ack_nbr,
+                                     win_size,
+                                     NET_IPv4_TOS_DFLT,
+                                     NET_IPv4_TTL_DFLT,
+                                     flags_tcp,
+                                     NET_IPv4_FLAG_NONE,
+                                     DEF_NULL,
+                                     DEF_NULL,
+                                    &err);                      /* Ignore transitory tx err(s).                         */
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_CONN_FAMILY_IP_V6_SOCK:
+             pseg_reset_hdr->ProtocolHdrType          =  NET_PROTOCOL_TYPE_TCP_V6;
+             pseg_reset_hdr->ProtocolHdrTypeTransport =  NET_PROTOCOL_TYPE_TCP_V6;
+
+             NetTCP_TxPktHandlerIPv6(pseg_reset,
+                   (NET_IPv6_ADDR *)&src_addrv6,
+                                     src_port,
+                   (NET_IPv6_ADDR *)&dest_addrv6,
+                                     dest_port,
+                                     seq_nbr,
+                                     ack_nbr,
+                                     win_size,
+                                     NET_IPv6_TRAFFIC_CLASS_DFLT,
+                                     NET_IPv6_FLOW_LABEL_DFLT,
+                                     NET_IPv6_HOP_LIM_DFLT,
+                                     flags_tcp,
+                                     DEF_NULL,
+                                     &err);                     /* Ignore transitory tx err(s).                         */
+             break;
+#endif
+        default:
+            *p_err = NET_TCP_ERR_CONN_PROTO_FAMILY;
+             return;
+    }
+
+#if 0                                                           /* Tx buf freed by lower layer(s) [see Note #7b2].      */
+    NetTCP_TxPktFree(pseg_reset);
+#endif
+    NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegConnResetCtr);
+
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_TxConnProbe()
+*
+* Description : (1) Prepare & transmit a TCP connection probe :
+*
+*                   (a) Validate TCP connection state for TCP probe
+*                   (b) Prepare  TCP probe segment :                                See Note #2
+*                       (1) Get  buffer
+*                       (2) Prepare TCP segment :
+*                           (A) TCP segment  addresses
+*                           (B) TCP segment  sequence numbers                       See Note #2b1
+*                           (C) TCP segment  transmit flags :
+*                               (1) ACK
+*                           (D) TCP segment  window size
+*                           (E) IP  datagram parameters
+*                           (F) TCP segment  packet buffer controls
+*                   (c) Transmit TCP connection probe
+*
+*
+* Argument(s) : p_conn                   Pointer to a TCP connection.
+*
+*               tx_probe_data_octet     Indicate whether to transmit a single data probe octet (see Note #2b2) :
+*
+*                                           DEF_YES                Transmit data probe octet.
+*                                           DEF_NO          Do NOT transmit data probe octet.
+*
+*               close_code      Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_CLOSE_NONE                 Perform NO  close actions.
+*                                   NET_TCP_CONN_CLOSE_ALL                  Perform ALL close actions.
+*
+*                                   NET_TCP_CONN_CLOSE_CONN_TX_RESET        Perform close connection transmit reset.
+*                                   NET_TCP_CONN_CLOSE_CONN_ALL             Perform ALL   connection close    actions.
+*
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE          Close    transmit idle                  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN     Close    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN      Close    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY       Close    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_RE_TX            Close re-transmit                       timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_ALL              Close ALL                               timers.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection probe successfully transmitted.
+*                               NET_TCP_ERR_CONN_PROBE_INVALID      TCP connection probe NOT valid for current
+*                                                                       TCP connection state.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_CONN_FAIL               TCP connection operation(s) failed.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnWinSizeZeroWinHandler(),
+*               NetTCP_TxConnKeepAlive().
+*
+* Note(s)     : (2) TCP connection probes are transmitted for certain TCP conditions :
+*
+*                       (A) Some TCP transmit probe validation logic implemented in previous functions;
+*                           include duplicate validation logic in NetTCP_TxConnProbe() only if debug/
+*                           validation code is enabled (i.e. NET_ERR_CFG_ARG_CHK_DBG_EN is DEF_ENABLED
+*                           in 'net_cfg.h').
+*
+*                   (a) RFC #1122, Section 4.2.3.6 specifies a "mechanism [that] periodically probes the
+*                       other end of a connection" for the following TCP connection conditions :
+*
+*                       (1) Probing Zero Windows                                RFC #1122, Section 4.2.2.17
+*                               (see 'NetTCP_TxConnWinSizeZeroWinHandler()  Note #1b')
+*
+*                       (2) TCP Keep-Alives                                     RFC #1122, Section 4.2.3.6
+*                               (see 'NetTCP_TxConnKeepAlive()  Note #2c')
+*
+*                   (b) "Send a probe segment ... to elicit a response from the peer TCP" :
+*
+*                       (1) (A) (1) "Such a segment generally contains SEG.SEQ = SND.NXT-1" ...
+*
+*                                   (a) "Note that on a quiet connection SND.NXT = RCV.NXT, so that this SEG.SEQ
+*                                        will be outside the window.  Therefore, the probe causes the receiver
+*                                        to return an acknowledgment segment, confirming that the connection is
+*                                        still live.  If the peer has dropped the connection ... it will respond
+*                                        with a RST instead of an acknowledgment segment."
+*
+*                                   (b) However, this contradicts Wright/Stevens, TCP/IP Illustrated, Volume 2,
+*                                       3rd Printing, Section 25.6 'Connection Establishment and Keepalive Timers :
+*                                       Send a keepalive probe', Page 830 which states that "the sequence number
+*                                       field of the keepalive packet ... contains [SND.UNA] minus 1, which is
+*                                       the sequence number of a byte of data that the other end has already
+*                                       acknowledged ... Since this sequence number is outside the window, the
+*                                       other end must respond with an ACK, specifying the next sequence number
+*                                       it expects".
+*
+*                               (2) (a) Although on an idle TCP connection, the next sequence octet to transmit
+*                                       (SND.NXT) is equal to the last unacknowledged transmit sequence octet
+*                                       (SND.UNA); on a TCP connection whose remote host has zero-window closed
+*                                       its receive window, the next sequence octet to transmit is NOT equal to
+*                                       the last unacknowledged transmit sequence octet.
+*
+*                                   (b) Therefore, it seems reasonable to transmit probe segments with a sequence
+*                                       number (SEQ.SEQ) that is one less than the last unacknowledged transmit
+*                                       sequence octet (SND.UNA).
+*
+*                           (B) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                               'Connection Establishment and Keepalive Timers : Send a keepalive probe',
+*                               Page 830 states that "the acknowledgment  field of the keepalive packet ...
+*                               contains [RCV.NXT], the next sequence number expected on the connection".
+*
+*                       (2) "and may or may not contain one garbage octet of data."
+*
+*                           (A) "An implementation SHOULD send a [probe] segment with no data."
+*
+*                           (B) (1) "Unfortunately, some misbehaved TCP implementations fail to respond to
+*                                    a segment with SEG.SEQ = SND.NXT-1 unless the segment contains data."
+*
+*                               (2) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 23.3 'Other
+*                                   End Crashes', Page 335 reiterates that "some older implementations based
+*                                   on 4.2BSD do not respond to these ... probes unless the segment contains
+*                                   data".
+*
+*                           (C) Therefore, RFC #1122, Section 4.2.3.6 states that a TCP "implementation ...
+*                               MAY be configurable to send a [probe] segment containing one garbage octet,
+*                               for compatibility with erroneous TCP implementations".
+*
+*                           See also 'NetTCP_TxConnKeepAlive()  Note #2d2'.
+*
+*               (3) (a) (1) (A) RFC #793, Sections 3.7 & 2.6 state that "TCP uses retransmission ... to ensure
+*                               delivery of every segment".
+*
+*                           (B) (1) However, RFC #1122, Section 4.2.2.17 'DISCUSSION' states that "it is
+*                                   extremely important to remember that ACK (acknowledgment) segments that
+*                                   contain no data are not reliably transmitted by TCP".
+*
+*                               (2) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                                   'Connection Establishment and Keepalive Timers : Drop connection when no
+*                                   response', Page 830 reiterates that "one reason TCP must send multiple
+*                                   keepalive probes before considering the connection dead is that the
+*                                   ACKs sent in response do not contain data and therefore are not reliably
+*                                   transmitted by TCP.  An ACK that is a response to a keepalive probe can
+*                                   get lost".
+*
+*                       (2) Therefore, it is assumed that TCP acknowledgement/probe segments should NOT be
+*                           queued for retransmission but SHOULD be silently discarded.
+*
+*                   (b) (1) The network buffer's reference counter is NOT incremented since the TCP layer
+*                           does NOT maintain a reference to any transmitted TCP probe segments.
+*
+*                       (2) Therefore, the network buffer MUST be freed by lower layer(s).
+*
+*                   See also 'NetTCP_TxConnAck()    Note #8',
+*                          & 'NetTCP_TxConnReset()  Note #7'.
+*
+*               (4) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) For any network resources NOT linked to the TCP connection, each network resource
+*                       MUST be freed by appropriate function(s).
+*
+*               (5) (a) IP  transmit options currently NOT implemented     See 'net_tcp.c  Note #1d'
+*                   (b) TCP transmit options currently NOT implemented     See 'net_tcp.c  Note #1c'
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnProbe (NET_TCP_CONN        *p_conn,
+                                  CPU_BOOLEAN          tx_probe_data_octet,
+                                  NET_TCP_CLOSE_CODE   close_code,
+                                  NET_ERR             *p_err)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN              tx_probe;
+#endif
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR            src_addrv4;
+    NET_IPv4_ADDR            dest_addrv4;
+    NET_IPv4_TOS             TOS;
+    NET_IPv4_TTL             TTL;
+    NET_IPv4_FLAGS           flags_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_ADDR            src_addrv6;
+    NET_IPv6_ADDR            dest_addrv6;
+    NET_IPv6_TRAFFIC_CLASS   traffic_class;
+    NET_IPv6_FLOW_LABEL      flow_label;
+    NET_IPv6_HOP_LIM         hop_lim;
+    NET_IPv6_FLAGS           flags_ipv6;
+#endif
+    NET_BUF_SIZE             data_len;
+    NET_BUF_SIZE             data_ix;
+    NET_BUF_SIZE             data_ix_offset;
+    NET_CONN_ID              conn_id;
+    NET_CONN                *p_net_conn;
+    NET_IF_NBR               if_nbr;
+    NET_BUF                 *pseg_probe;
+    NET_BUF_HDR             *pseg_probe_hdr;
+    NET_TCP_PORT_NBR         src_port;
+    NET_TCP_PORT_NBR         dest_port;
+    NET_TCP_SEQ_NBR          seq_nbr;
+    NET_TCP_SEQ_NBR          ack_nbr;
+    NET_TCP_WIN_SIZE         win_size;
+    NET_TCP_FLAGS            flags_tcp;
+    CPU_INT08U               probe_data[NET_TCP_DATA_LEN_TX_PROBE_DATA];
+    NET_PROTOCOL_TYPE        proto_type = NET_PROTOCOL_TYPE_NONE;
+    NET_ERR                  err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* See Note #2A.                                        */
+                                                                /* ------------- VALIDATE TCP CONN STATE -------------- */
+    tx_probe = DEF_NO;
+
+    if (p_conn != DEF_NULL) {
+        switch (p_conn->ConnState) {
+            case NET_TCP_CONN_STATE_FREE:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+                *p_err = NET_TCP_ERR_CONN_NOT_USED;
+                 return;
+
+
+            case NET_TCP_CONN_STATE_CLOSED:
+            case NET_TCP_CONN_STATE_LISTEN:
+            case NET_TCP_CONN_STATE_SYNC_RXD:
+            case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+            case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+            case NET_TCP_CONN_STATE_SYNC_TXD:
+            case NET_TCP_CONN_STATE_TIME_WAIT:
+            case NET_TCP_CONN_STATE_LAST_ACK:
+            case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+                *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+                 return;
+
+
+            case NET_TCP_CONN_STATE_CONN:
+            case NET_TCP_CONN_STATE_FIN_WAIT_1:
+            case NET_TCP_CONN_STATE_FIN_WAIT_2:
+            case NET_TCP_CONN_STATE_CLOSING:
+            case NET_TCP_CONN_STATE_CLOSE_WAIT:
+                 tx_probe = DEF_YES;
+                 break;
+
+
+            case NET_TCP_CONN_STATE_NONE:
+            default:
+                 NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                                  (NET_BUF_HDR      *)0,
+                                  (CPU_BOOLEAN       )DEF_YES,
+                                  (NET_TCP_CLOSE_CODE)close_code);
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+                *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+                 return;
+        }
+    }
+
+
+    if (tx_probe != DEF_YES) {                                  /* If NOT valid, abort tx TCP conn probe.               */
+       *p_err = NET_TCP_ERR_CONN_PROBE_INVALID;
+        return;
+    }
+#endif
+
+
+                                                                /* ------------ PREPARE TCP CONN PROBE SEG ------------ */
+                                                                /* If valid, prepare & tx TCP conn probe.               */
+                                                                /* Get buf.                                             */
+    conn_id = p_conn->ID_Conn;
+    if_nbr  = NetConn_IF_NbrGet(conn_id, &err);
+    if ( err != NET_CONN_ERR_NONE) {
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )DEF_YES,
+                         (NET_TCP_CLOSE_CODE)close_code);
+       *p_err  = NET_TCP_ERR_CONN_FAULT;
+        return;
+    }
+
+    data_len   = (tx_probe_data_octet == DEF_YES)               /* Cfg data len for probe data (see Note #2b2C).        */
+               ?  NET_TCP_DATA_LEN_TX_PROBE_DATA
+               :  NET_TCP_DATA_LEN_TX_PROBE_NO_DATA;
+
+    p_net_conn = &NetConn_Tbl[conn_id];
+
+    switch (p_net_conn->Family) {
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+             proto_type = NET_PROTOCOL_TYPE_TCP_V4;
+             break;
+
+
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+             proto_type = NET_PROTOCOL_TYPE_TCP_V6;
+             break;
+
+    }
+
+    data_ix = 0u;
+
+    NetTCP_GetTxDataIx(if_nbr,
+                       proto_type,
+                       0u,
+                       data_len,
+                       p_conn,
+                      &data_ix,
+                       p_err);
+
+    pseg_probe = NetBuf_Get((NET_IF_NBR     ) if_nbr,
+                            (NET_TRANSACTION) NET_TRANSACTION_TX,
+                            (NET_BUF_SIZE   ) data_len,
+                            (NET_BUF_SIZE   ) data_ix,
+                            (NET_BUF_SIZE  *)&data_ix_offset,
+                            (NET_BUF_FLAGS  ) NET_BUF_FLAG_NONE,
+                            (NET_ERR       *)&err);
+    if ( err != NET_BUF_ERR_NONE) {
+       *p_err  = NET_TCP_ERR_NONE_AVAIL;
+        return;
+    }
+
+    data_ix += data_ix_offset;
+
+    if (tx_probe_data_octet == DEF_YES) {                       /* If tx probe data req'd,          ...                 */
+        probe_data[0] = NET_TCP_TX_PROBE_DATA;                  /* ... prepare data (see Note #2b2) ...                 */
+        NetBuf_DataWr((NET_BUF    *) pseg_probe,                /* ... & wr    data into TCP tx buf.                    */
+                      (NET_BUF_SIZE) data_ix,
+                      (NET_BUF_SIZE) data_len,
+                      (CPU_INT08U *)&probe_data[0],
+                      (NET_ERR    *)&err);
+        if ( err != NET_BUF_ERR_NONE) {                         /* See Note #4a.                                        */
+            NetBuf_Free(pseg_probe);
+           *p_err  = NET_TCP_ERR_CONN_FAIL;
+            return;
+        }
+    }
+
+                                                                /* ----------------- PREPARE TCP HDR ------------------ */
+                                                                /* Prepare seg addrs.                                   */
+    pseg_probe_hdr = &pseg_probe->Hdr;
+
+    if (p_net_conn->Family == NET_SOCK_PROTOCOL_FAMILY_IP_V6) {
+        DEF_BIT_SET(pseg_probe_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);
+    }
+
+    if (DEF_BIT_IS_CLR(pseg_probe_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+        NetTCP_TxConnPrepareSegAddrs((NET_TCP_CONN *) p_conn,
+                                     (CPU_INT08U   *)&src_addrv4,
+                                     (CPU_INT08U   *)&src_port,
+                                     (CPU_INT16U    ) sizeof(src_addrv4),
+                                     (CPU_INT16U    ) sizeof(src_port),
+                                     (CPU_INT08U   *)&dest_addrv4,
+                                     (CPU_INT08U   *)&dest_port,
+                                     (CPU_INT16U    ) sizeof(dest_addrv4),
+                                     (CPU_INT16U    ) sizeof(dest_port),
+                                     (NET_ERR      *)&err);
+#endif
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        NetTCP_TxConnPrepareSegAddrs((NET_TCP_CONN *) p_conn,
+                                     (CPU_INT08U   *)&src_addrv6,
+                                     (CPU_INT08U   *)&src_port,
+                                     (CPU_INT16U    ) sizeof(src_addrv6),
+                                     (CPU_INT16U    ) sizeof(src_port),
+                                     (CPU_INT08U   *)&dest_addrv6,
+                                     (CPU_INT08U   *)&dest_port,
+                                     (CPU_INT16U    ) sizeof(dest_addrv6),
+                                     (CPU_INT16U    ) sizeof(dest_port),
+                                     (NET_ERR      *)&err);
+#endif
+    }
+
+    if ( err != NET_TCP_ERR_NONE) {                             /* See Note #4a.                                        */
+        NetBuf_Free(pseg_probe);
+       *p_err  = NET_TCP_ERR_CONN_FAULT;
+        return;
+    }
+
+
+                                                                /* Prepare TCP seq nbrs.                                */
+    seq_nbr   = p_conn->TxSeqNbrUnAckd;
+    ack_nbr   = p_conn->RxSeqNbrNext;                           /* Cfg ACK w/ next    rx seq nbr (see Note #2b1B).      */
+
+                                                                /* Prepare TCP tx flags (see Note #1b2C).               */
+    flags_tcp = NET_TCP_FLAG_NONE  |
+                NET_TCP_FLAG_TX_ACK;
+
+                                                                /* Prepare TCP win size.                                */
+    win_size  = p_conn->RxWinSizeActual;
+
+                                                                /* Prepare IP params.                                   */
+    if (DEF_BIT_IS_CLR(pseg_probe_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+        NetConn_IPv4TxParamsGet(conn_id, &flags_ipv4, &TOS, &TTL, &err);
+        if ( err != NET_CONN_ERR_NONE) {
+            NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                             (NET_BUF_HDR      *)0,
+                             (CPU_BOOLEAN       )DEF_YES,
+                             (NET_TCP_CLOSE_CODE)close_code);
+           *p_err  = NET_TCP_ERR_CONN_FAULT;
+            return;
+        }
+#endif
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        NetConn_IPv6TxParamsGet(conn_id, &traffic_class, &flow_label, &hop_lim, &flags_ipv6, &err);
+        if ( err != NET_CONN_ERR_NONE) {
+            NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                             (NET_BUF_HDR      *)0,
+                             (CPU_BOOLEAN       )DEF_YES,
+                             (NET_TCP_CLOSE_CODE)close_code);
+           *p_err  = NET_TCP_ERR_CONN_FAULT;
+            return;
+        }
+#endif
+    }
+
+
+                                                                /* Init buf ctrls.                                      */
+    pseg_probe_hdr                           = &pseg_probe->Hdr;
+    pseg_probe_hdr->DataIx                   = (CPU_INT16U  )data_ix;
+    pseg_probe_hdr->DataLen                  = (NET_BUF_SIZE)data_len;
+    pseg_probe_hdr->TotLen                   = (NET_BUF_SIZE)pseg_probe_hdr->DataLen;
+
+    pseg_probe_hdr->TCP_SegSync              = (CPU_BOOLEAN  )DEF_NO;
+    pseg_probe_hdr->TCP_SegClose             = (CPU_BOOLEAN  )DEF_NO;
+    pseg_probe_hdr->TCP_SegAck               = (CPU_BOOLEAN  )DEF_YES;
+    pseg_probe_hdr->TCP_SegReset             = (CPU_BOOLEAN  )DEF_NO;
+
+    pseg_probe_hdr->TCP_Flags                = (NET_TCP_FLAGS)flags_tcp;
+
+
+
+                                                                /* -------------- TX TCP CONN PROBE SEG --------------- */
+    if (DEF_BIT_IS_CLR(pseg_probe_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+       pseg_probe_hdr->ProtocolHdrType          =  NET_PROTOCOL_TYPE_TCP_V4;
+       pseg_probe_hdr->ProtocolHdrTypeTransport =  NET_PROTOCOL_TYPE_TCP_V4;
+
+       NetTCP_TxPktHandlerIPv4((NET_BUF        *) pseg_probe,
+                               (NET_IPv4_ADDR   ) src_addrv4,
+                               (NET_TCP_PORT_NBR) src_port,
+                               (NET_IPv4_ADDR   ) dest_addrv4,
+                               (NET_TCP_PORT_NBR) dest_port,
+                               (NET_TCP_SEQ_NBR ) seq_nbr,
+                               (NET_TCP_SEQ_NBR ) ack_nbr,
+                               (NET_TCP_WIN_SIZE) win_size,
+                               (NET_IPv4_TOS    ) TOS,
+                               (NET_IPv4_TTL    ) TTL,
+                               (NET_TCP_FLAGS   ) flags_tcp,
+                               (NET_IPv4_FLAGS  ) flags_ipv4,
+                               (void           *) 0,
+                               (void           *) 0,            /* See Note #5.                                         */
+                               (NET_ERR        *)&err);         /* Ignore transitory tx err(s).                         */
+#endif
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        pseg_probe_hdr->ProtocolHdrType          =  NET_PROTOCOL_TYPE_TCP_V6;
+        pseg_probe_hdr->ProtocolHdrTypeTransport =  NET_PROTOCOL_TYPE_TCP_V6;
+
+        NetTCP_TxPktHandlerIPv6((NET_BUF              *) pseg_probe,
+                                (NET_IPv6_ADDR        *)&src_addrv6,
+                                (NET_TCP_PORT_NBR      ) src_port,
+                                (NET_IPv6_ADDR        *)&dest_addrv6,
+                                (NET_TCP_PORT_NBR      ) dest_port,
+                                (NET_TCP_SEQ_NBR       ) seq_nbr,
+                                (NET_TCP_SEQ_NBR       ) ack_nbr,
+                                (NET_TCP_WIN_SIZE      ) win_size,
+                                (NET_IPv6_TRAFFIC_CLASS) NET_IPv6_TRAFFIC_CLASS_DFLT,
+                                (NET_IPv6_FLOW_LABEL   ) NET_IPv6_FLOW_LABEL_DFLT,
+                                (NET_IPv6_HOP_LIM      ) NET_IPv6_HOP_LIM_DFLT,
+                                (NET_TCP_FLAGS         ) flags_tcp,
+                                (void                 *) 0,
+                                (NET_ERR              *)&err);  /* Ignore transitory tx err(s).                         */
+#endif
+    }
+
+#if 0                                                           /* Tx buf freed by lower layer(s) [see Note #3b2].      */
+    NetTCP_TxPktFree(pseg_probe);
+#endif
+    NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegConnProbeCtr);
+
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_TxConnKeepAlive()
+*
+* Description : (1) Prepare & transmit a TCP connection keep-alive :
+*
+*                   (a) Validate transmit keep-alive threshold                      See Note #2c3
+*                   (b) Prepare  TCP keep-alive probe :
+*                       (1) Garbage dummy data                                      See Note #2d2
+*                   (c) Transmit TCP keep-alive probe
+*
+*
+* Argument(s) : p_conn           Pointer to a TCP connection.
+*               -----           Argument validated in NetTCP_ConnIdleTimeout().
+*
+*               close_code      Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_CLOSE_NONE                 Perform NO  close actions.
+*                                   NET_TCP_CONN_CLOSE_ALL                  Perform ALL close actions.
+*
+*                                   NET_TCP_CONN_CLOSE_CONN_TX_RESET        Perform close connection transmit reset.
+*                                   NET_TCP_CONN_CLOSE_CONN_ALL             Perform ALL   connection close    actions.
+*
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE          Close    transmit idle                  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN     Close    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN      Close    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY       Close    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_RE_TX            Close re-transmit                       timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_ALL              Close ALL                               timers.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection keep-alive successfully
+*                                                                       transmitted.
+*                               NET_TCP_ERR_TX_KEEP_ALIVE_TH        TCP connection closed due to no response
+*                                                                       following transmission of configured
+*                                                                       number of TCP keep-alive probes.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnIdleTimeout().
+*
+* Note(s)     : (2) RFC #1122, Section 4.2.3.6 states that "TCP implementations ... MAY include 'keep-alives'
+*                   ... although this practice is not universally accepted ... A 'keep-alive' mechanism
+*                   periodically probes the other end of a connection when the connection is otherwise idle,
+*                   even when there is no data to be sent".
+*
+*                   (a) RFC #1122, Section 4.2.3.6 states that "if keep-alives are included" :
+*
+*                       (1) "The application MUST be able to turn them on or off for each TCP connection,"
+*                       (2) "and they MUST default to off."
+*
+*                   (b) (1) RFC #1122, Section 4.2.3.6 states that "keep-alive packets MUST only be sent when
+*                           no data or acknowledgement packets have been received for the connection within an
+*                           interval" :
+*
+*                           (A) "This interval MUST be configurable" ...
+*                           (B) "and MUST default to no less than two hours."
+*
+*                       (2) (A) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 23.2, Page 333
+*                               states that :
+*
+*                               (1) "The keepalive ... 2-hour idle time value" ...
+*                               (2) "can usually be changed, but ... is [typically] a system-wide value, so
+*                                    changing it affects all" TCP connections.
+*
+*                           (B) However, NO RFC requires that the configurable keep-alive, idle timeout be a
+*                               single, system-wide value.  Therefore, it seems reasonable to permit each TCP
+*                               connection to maintain its    own configurable keep-alive, idle timeout value.
+*
+*                       See also 'NetTCP_ConnCfgIdleTimeoutHandler()  Note #1'.
+*
+*                   (c) (1) (A) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 23.2, Pages 332-333
+*                               states that "if there is no activity on a given connection for 2 hours" (see
+*                               Note #2b), TCP "sends a probe segment to the" remote host :
+*
+*                               (1) (a) If "the [remote] host is still up and running and reachable ... [and]
+*                                       responds normally ... [then TCP] knows that the other end is still up" :
+*                                   (b) (1) "TCP will reset the keepalive timer for 2 hours" ...
+*                                       (2) "If there is application traffic across the connection before the
+*                                            next 2-hour timer expires, the timer is reset for 2 hours in the
+*                                            future, following the exchange of data."
+*
+*                               (2) (a) If "the [remote] host has crashed [or] is ... unreachable ... [and]
+*                                       not responding" ...
+*                                   (b) (1) Then "the [TCP] sends a total of 10 ... probes," ...
+*                                       (2) "75 seconds apart,"                              ...
+*                                   (c) (1) "and if it doesn't receive a response, [then TCP] considers the
+*                                           [remote] host as down"          ...
+*                                       (2) "and terminates the connection" ...
+*                                       (3) The "error ... returned to the ... application by ... TCP ... is
+*                                           ... 'connection timed out'".
+*
+*                               (3) (a) If "the [remote] host has crashed and rebooted"     ...
+*                                   (b) (1) Then its "response will be a reset,"            ...
+*                                       (2) "causing the [TCP] to terminate the connection" ...
+*                                       (3) The "error ... returned to the ... application by ... TCP ... is
+*                                           ... 'connection reset by peer'".
+*
+*                           (B) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                               'Connection Establishment and Keepalive Timers', Page 828 also states that :
+*
+*                               (1) (a) "When a segment is received on a connection," ...
+*                                   (b)  TCP "resets the keepalive timer for that connection to 2 hours".
+*                               (a) (a) (1) "If the keepalive timer expires (2 hours after the last segment
+*                                            was received on the connection)," ...
+*                                       (2) "and if the socket option is set," ...
+*                                   (b) "a keepalive probe is sent to the other end."
+*
+*                           (C) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                               'Connection Establishment and Keepalive Timers : Keepalive timer expires
+*                               after 2 hours of idle time', Page 829 adds that :
+*
+*                               (1) "Probes are sent only if the connection is in the" ...
+*                                   (a) "ESTABLISHED or" ...
+*                                   (b) "CLOSE_WAIT states."
+*                               (2) "Keepalive probes are not sent ... once the process calls close()
+*                                    ... even if the connection is idle for 2 hours."
+*
+*                       (2) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                           'Connection Establishment and Keepalive Timers : Drop connection when no
+*                           response', Page 830 states that :
+*
+*                           (A) (1) "If the total idle time for the connection is greater than or equal
+*                                    to 2 hours" ...
+*                               (2) (a) "plus ... [the] limit of nine keepalive probes," ...
+*                                   (b) "75 seconds apart,"                              ...
+*                           (B) (1) "with no response" ...
+*                               (2)  then the TCP "connection is dropped".
+*
+*                       (3) (A) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                               'Connection Establishment and Keepalive Timers : Send a keepalive probe',
+*                               Page 830 states that "after 2 hours of idle time ... [a TCP] connection ...
+*                               sends ... nine keepalive probes".
+*
+*                               See also Note #2c2A2a.
+*
+*                           (B) However, this contradicts the TCP keep-alive example in Figure 23.1 of
+*                               Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 23.3 'Other
+*                               End Crashes', Pages 334-335 which shows "that the [remote host] ... send[s]
+*                               10 keepalive probes ... before declaring the connection dead".
+*
+*                               See also Note #2c1A2b1.
+*
+*                   (d) RFC #1122, Section 4.2.3.6 states that "to confirm that an idle connection is still
+*                       active ... send a probe segment ... to elicit a response from the peer TCP" :
+*
+*                       (1) (A) "Such a segment generally contains SEG.SEQ = SND.NXT-1" ...
+*
+*                               (1) "Note that on a quiet connection SND.NXT = RCV.NXT, so that this SEG.SEQ
+*                                    will be outside the window.  Therefore, the probe causes the receiver
+*                                    to return an acknowledgment segment, confirming that the connection is
+*                                    still live.  If the peer has dropped the connection ... it will respond
+*                                    with a RST instead of an acknowledgment segment."
+*
+*                               (2) However, this contradicts Wright/Stevens, TCP/IP Illustrated, Volume 2,
+*                                   3rd Printing, Section 25.6 'Connection Establishment and Keepalive Timers :
+*                                   Send a keepalive probe', Page 830 which states that "the sequence number
+*                                   field of the keepalive packet ... contains [SND.UNA] minus 1, which is
+*                                   the sequence number of a byte of data that the other end has already
+*                                   acknowledged ... Since this sequence number is outside the window, the
+*                                   other end must respond with an ACK, specifying the next sequence number
+*                                   it expects".
+*
+*                           (B) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                               'Connection Establishment and Keepalive Timers : Send a keepalive probe',
+*                               Page 830 states that "the acknowledgment field of the keepalive packet ...
+*                               contains [RCV.NXT], the next sequence number expected on the connection".
+*
+*                           See also 'NetTCP_TxConnProbe()  Note #2b1'.
+*
+*                       (2) "and may or may not contain one garbage octet of data."
+*
+*                           (A) "An implementation SHOULD send a keep-alive segment with no data".
+*
+*                               (1) (a) "Unfortunately, some misbehaved TCP implementations fail to respond to
+*                                        a segment with SEG.SEQ = SND.NXT-1 unless the segment contains data."
+*
+*                                   (b) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 23.3 'Other
+*                                       End Crashes', Page 335 reiterates that "some older implementations based
+*                                       on 4.2BSD donot respond to these keepalive probes unless the segment
+*                                       contains data".
+*
+*                               (2) (a) Therefore, RFC #1122, Section 4.2.3.6 states that a TCP "implementation ...
+*                                       MAY be configurable to send a keep-alive segment containing one garbage
+*                                       octet, for compatibility with erroneous TCP implementations".
+*
+*                                   (b) (1) (A) "Alternatively, an implementation could determine whether a peer
+*                                                responded correctly to keep-alive packets with no garbage data
+*                                                octet."
+*
+*                                           (B) Or as Stevens, TCP/IP Illustrated, Volume 1, 8th Printing,
+*                                               Section 23.3 'Other End Crashes', Page 335 states, some
+*                                               "systems send" :
+*
+*                                               (1) "The 4.3BSD-style segment (no data) for the first half of
+*                                                    the probe period," ...
+*                                               (2) "and if no response is received, switch to the 4.2BSD-style
+*                                                    segment for the last half."
+*
+*                                       (2) Therefore, it seems reasonable to implement the combined BSD 4.3/4.2
+*                                           solution since it does NOT require any non-standard configuration
+*                                           for the garbage data octet & SHOULD be backwards-compatible with
+*                                           all other systems.
+*
+*                       (3) (A) RFC #1122, Section 4.2.3.6 states that "it is extremely important to remember
+*                               that ACK segments that contain no data are not reliably transmitted by TCP.
+*                               Consequently, if a keep-alive mechanism is implemented it MUST NOT interpret
+*                               failure to respond to any specific probe as a dead connection".
+*
+*                           (B) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                               'Connection Establishment and Keepalive Timers : Drop connection when no
+*                               response', Page 830 reiterates that "one reason TCP must send multiple
+*                               keepalive probes before considering the connection dead is that the
+*                               ACKs sent in response do not contain data and therefore are not reliably
+*                               transmitted by TCP.  An ACK that is a response to a keepalive probe can
+*                               get lost".
+*
+*                           See also 'NetTCP_TxConnProbe()  Note #3a'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnKeepAlive (NET_TCP_CONN        *p_conn,
+                                      NET_TCP_CLOSE_CODE   close_code,
+                                      NET_ERR             *p_err)
+{
+    CPU_BOOLEAN          tx_probe_data_octet;
+    NET_PKT_CTR          tx_probe_data_th;
+    NET_TCP_TIMEOUT_SEC  timeout_sec;
+    NET_TMR_TICK         timeout_tick;
+    NET_ERR              err;
+
+
+                                                                /* -------------- VALIDATE TX KEEP-ALIVE -------------- */
+    p_conn->TxKeepAliveCtr++;
+    if (p_conn->TxKeepAliveCtr > p_conn->TxKeepAliveTh) {       /* If nbr keep-alives tx'd > th, ...                    */
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,            /* ... close TCP conn (see Note #2c2B2).                */
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )p_conn->ConnCloseAppFlag,
+                         (NET_TCP_CLOSE_CODE)close_code);
+       *p_err = NET_TCP_ERR_TX_KEEP_ALIVE_TH;
+        return;
+    }
+
+
+                                                                /* ----------- SET TCP CONN KEEP-ALIVE TMR ------------ */
+    timeout_sec  =  p_conn->TxKeepAliveRetryTimeout_sec;        /* Set keep-alive tmr (see Notes #2c1A2b2 & #2c2A2b).   */
+    timeout_tick = (NET_TMR_TICK)timeout_sec * NET_TMR_TIME_TICK_PER_SEC;
+
+    if (p_conn->TimeoutTmr != DEF_NULL) {
+        NetTmr_Set((NET_TMR    *) p_conn->TimeoutTmr,
+                   (CPU_FNCT_PTR)&NetTCP_ConnIdleTimeout,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+    } else {
+        p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_ConnIdleTimeout,
+                                       (void        *) p_conn,
+                                       (NET_TMR_TICK ) timeout_tick,
+                                       (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                       (NET_ERR     *)&err);
+    }
+
+    if ( err != NET_TMR_ERR_NONE) {
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )p_conn->ConnCloseAppFlag,
+                         (NET_TCP_CLOSE_CODE)close_code);
+       *p_err  = NET_TCP_ERR_CONN_FAULT;
+        return;
+    }
+
+    p_conn->TxSeqNbrUnAckd -= 1;                                /* Decrement the sequence number.                       */
+
+                                                                /* ------------------ TX KEEP-ALIVE ------------------- */
+    tx_probe_data_th    = (p_conn->TxKeepAliveTh + 1u) / 2u;    /* Cfg garbage octet (see Note #2d2A2b2).               */
+    tx_probe_data_octet = (p_conn->TxKeepAliveCtr <= tx_probe_data_th) ? DEF_NO : DEF_YES;
+    NetTCP_TxConnProbe(p_conn, tx_probe_data_octet, close_code, &err);
+   (void)&err;                                                  /* Ignore transitory tx err(s).                         */
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegConnKAliveCtr);
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_TxConnKeepAliveReset()
+*
+* Description : Reset TCP connection's transmit keep-alive controls.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandlerSeg().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerSeg().
+*
+* Note(s)     : none.
+*
+* Note(s)     : (1) A TCP connection's transmit keep-alive controls SHOULD be reset whenever any valid
+*                   segment(s) are received :
+*
+*                   (a) (1) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 23.2,
+*                           Pages 332-333 states that after TCP "sends ... probe segment[s] to the"
+*                           remote host :
+*
+*                           (A) If "the [remote] host ... responds normally ... [then TCP] knows
+*                               that the other end is still up" :
+*                           (B) (1) "TCP will reset the keepalive timer" ...
+*                               (2) "If there is application traffic across the connection before
+*                                    the next 2-hour timer expires, the timer is reset ... following
+*                                    the exchange of data."
+*
+*                       (2) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                           'Connection Establishment and Keepalive Timers', Page 828 reiterates that :
+*
+*                           (A) "When a segment is received on a connection," ...
+*                           (B)  TCP "resets the keepalive timer for that connection".
+*
+*                   (b) (1) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                           'Connection Establishment and Keepalive Timers : Keepalive timer expires
+*                           after 2 hours of idle time', Page 829 states that TCP "keepalive probes
+*                           ... are sent only if the connection is in the" :
+*
+*                           (A) "ESTABLISHED or" ...
+*                           (B) "CLOSE_WAIT states."
+*
+*                       (2) However, it seems reasonable to permit any TCP connected states to reset
+*                           a TCP connection's transmit keep-alive controls.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnKeepAliveReset (NET_TCP_CONN  *p_conn)
+{
+    p_conn->TxKeepAliveCtr = 0u;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_TxConnTxQ()
+*
+* Description : (1) Transmit TCP data segment(s) from TCP connection transmit queue :
+*
+*                   (a) Configure TCP connection transmit :
+*
+*                       (1) Configure TCP connection transmit acknowledgement request :     See Note #1d1
+*
+*                           (A) Do NOT transmit TCP data/acknowledgement if ...
+*                               (1) NO TCP transmit data available or allowed to transmit
+*                                      AND
+*                               (2) NO transmit acknowledgement requested
+*
+*                           (B)        Transmit TCP      acknowledgement if ...
+*                               (1) NO TCP transmit data available or allowed to transmit
+*                                      BUT
+*                               (2)    Transmit acknowledgement requested
+*
+*                       (2) Configure TCP connection transmit free timer request            See Note #1d4
+*
+*                   (b) Transmit TCP connection transmit queue data :
+*
+*                       (1) Control TCP connection transmit versus transmit congestion controls :
+*
+*                               (a) See also 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Note #2'
+*                                          & 'NetTCP_TxConnWinSizeUpdateAvail()      Note #1'
+*
+*                           (A) Available Transmit Window                            See Note  #1b1a
+*                           (B) Transmit Queue Segment                               See Notes #5         & #8
+*                           (C) Nagle Algorithm                                      See Notes #6, #7b2B, & #8
+*                           (D) Silly Window Syndrome                                See Notes     #7     & #8
+*
+*                       (2) Update TCP connection transmit queue :
+*                           (A) Remove TCP transmit segment(s) from
+*                                      TCP connection    transmit queue                     See Note #3
+*                           (B) Append TCP transmit segment(s) to
+*                                      TCP connection re-transmit queue                     See Note #4
+*                           (C) Update TCP connection re-transmit queue timer
+*
+*                       (3) Update TCP connection :
+*                           (A) Update TCP connection sequence number(s)
+*                           (B) Update TCP connection transmit congestion window
+*
+*                       (4) Prepare  TCP data/acknowledgement segment(s) :
+*                           (A) TCP segment  addresses
+*                           (B) TCP segment  sequence numbers
+*                           (C) TCP segment  transmit flags :
+*                               (1) ACK
+*                           (D) TCP segment  window size
+*                           (E) IP  datagram parameters
+*                           (F) TCP segment  packet buffer controls
+*
+*                       (5) Transmit TCP data/acknowledgement segment(s)
+*
+*                   (c) Suspend TCP transmit :                                              See Note #10
+*
+*                       (1) Handle any network receive packet(s)                            See Note #10b2A
+*
+*                   (d) Complete TCP connection transmit :
+*
+*                       (1) Transmit TCP connection acknowledgement                         See Note #1a1
+*                       (2) Clear    TCP connection transmit idle timer
+*                               (see 'NetTCP_TxConnTxQ_TimeoutIdleClr()  Note #2b2')
+*                       (3) Reset    TCP connection delayed  acknowledgement controls
+*                       (4) Free     TCP connection transmit queue persist timer            See Note #1a2
+*
+*
+*               (2) NetTCP_TxConnTxQ() transmits TCP connection data & acknowledgements.  TCP acknowledgements
+*                   transmitted independently of TCP controls &/or data MAY be transmitted with NetTCP_TxConnAck().
+*
+*                   See also 'NetTCP_TxConnAck()  Note #2'.
+*
+* Argument(s) : p_conn          Pointer to a TCP connection.
+*               -----           Argument validated in various.
+*
+*               p_buf_hdr       Pointer to network buffer header that received TCP packet.
+*
+*               tx_ack_code     Indicate whether & how to transmit a TCP acknowledgement segment :
+*
+*                                   NET_TCP_CONN_TX_ACK_NONE            Do NOT transmit a TCP acknowledgement
+*                                                                          segment          if TCP transmit data
+*                                                                          NOT available.
+*                                   NET_TCP_CONN_TX_ACK                 Transmit a TCP acknowledgement segment
+*                                                                          even if TCP transmit data NOT available.
+*                                   NET_TCP_CONN_TX_ACK_IMMED           Transmit a TCP acknowledgement segment
+*                                                                          immediately even if TCP transmit data
+*                                                                          NOT available.
+*
+*               tx_q_timeout    Indicate whether the TCP connection transmit queue timed out :
+*
+*                                   DEF_NO                              TCP connection transmit queue did
+*                                                                           NOT time  out.
+*                                   DEF_YES                             TCP connection transmit queue
+*                                                                               timed out.
+*
+*               close_code      Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_CLOSE_NONE                 Perform NO  close actions.
+*                                   NET_TCP_CONN_CLOSE_ALL                  Perform ALL close actions.
+*
+*                                   NET_TCP_CONN_CLOSE_CONN_TX_RESET        Perform close connection transmit reset.
+*                                   NET_TCP_CONN_CLOSE_CONN_ALL             Perform ALL   connection close    actions.
+*
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE          Close    transmit idle                  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN     Close    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN      Close    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY       Close    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_RE_TX            Close re-transmit                       timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_ALL              Close ALL                               timers.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection transmit queue successfully
+*                                                                       handled.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_CLOSE              TCP connection closed.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                                                                   ------- RETURNED BY NetTCP_TxConnAck() : -------
+*                               NET_TCP_ERR_CONN_ACK_NONE           TCP connection acknowledgement NOT requested.
+*                               NET_TCP_ERR_CONN_ACK_DLYD           TCP connection acknowledgement transmit delayed.
+*                               NET_TCP_ERR_CONN_ACK_PREVLY_TXD     TCP connection acknowledgement previously
+*                                                                       transmitted for segment.
+*                               NET_TCP_ERR_CONN_ACK_INVALID        TCP connection acknowledgement NOT valid for
+*                                                                       current TCP connection state.
+*                               NET_TCP_ERR_NONE_AVAIL              Resources NOT available.
+*                               NET_TCP_ERR_INVALID_LEN_SEG         Invalid TCP sequence-segment length.
+*                               NET_CONN_ERR_INVALID_FAMILY         Invalid     connection family.
+*                               NET_CONN_ERR_INVALID_ADDR           Invalid TCP connection address.
+*                               NET_CONN_ERR_INVALID_ADDR_LEN       Invalid TCP connection address length.
+*
+*                                                                   ----- RETURNED BY NetTCP_TxPktHandler() : ------
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error (see Note #14a).
+*                               NET_ERR_TX                              Transmit        error.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (3) See 'NetTCP_TxConnAppData()  Note #3' for TCP connection Transmit Queue diagram.
+*
+*               (4) TCP segments that have been transmitted but NOT yet acknowledged are sequenced into
+*                   the TCP connection's re-transmit queue to await acknowledgement or retransmission.
+*
+*                   (a) Transmitted TCP segments are inserted into a doubly-linked Re-Transmit Queue,
+*                       ordered consecutively by sequence number(s) [see also Note #4b].
+*
+*                       In the diagram below, ... :
+*
+*                       (1) (A) TCP connections' 'ReTxQ_Head' points to the head of a TCP connections'
+*                                   Re-Transmit Queue;
+*                           (B) TCP connections' 'ReTxQ_Tail' points to the tail of a TCP connections'
+*                                   Re-Transmit Queue.
+*
+*                       (2) Segment buffers' 'PrevPrimListPtr' & 'NextPrimListPtr'  doubly-link each
+*                           segment to form the Re-Transmit Queue.
+*
+*                   (b) (1) Transmit segments are transmitted & await acknowledgement in sequence-order.
+*                           Therefore, newly-transmitted segments are sequenced after previously
+*                           transmitted segments starting at the tail of the Re-Transmit Queue.
+*
+*                       (2) Segments at the head of the Re-Transmit Queue are awaiting acknowledgement
+*                           & removal from the Re-Transmit Queue; & are ready to be re-transmitted until
+*                           acknowledged & removed from the queue.
+*
+*
+*                                      |                                               |
+*                                      |<----- TCP Connection Re-Transmit Queue ------>|
+*                                      |                (see Note #4)                  |
+*
+*                                 Segments Awaiting
+*                                 Acknowledgement or                        Segments Sequenced
+*                                    Re-Transmit                          into Re-Transmit Queue
+*                                   start at head                           starting at tail
+*                                  (see Note #4b2)                            (see Note #4b1)
+*
+*                                         |             NextPrimListPtr             |
+*                                         |             (see Note #4a2)             |
+*                                         v                    |                    v
+*                                                              |
+*                      Head of         -------       -------   v   -------       -------    (see Note #4a1B)
+*                    Re-Transmit  ---->|     |------>|     |------>|     |------>|     |
+*                       Queue          |     |       |     |       |     |       |     |         Tail of
+*                                      |     |<------|     |<------|     |<------|     |<----  Re-Transmit
+*                (see Note #4a1A)      |     |       |     |   ^   |     |       |     |          Queue
+*                                      |     |       |     |   |   |     |       |     |
+*                                      -------       -------   |   -------       -------
+*                                                              |
+*                                                       PrevPrimListPtr
+*                                                       (see Note #4a2)
+*
+*
+*               (5) In order to simply TCP transmit buffer management, TCP transmit does NOT transmit
+*                   partial network-buffer segments (i.e. portions of  TCP segments in the same network
+*                   buffer).  This avoids the complexity of queuing & handling partially transmitted
+*                   segments on both the TCP transmit & re-transmit queues.
+*
+*                   (a) However, in order to avoid transmit window deadlock with a remote host's receive
+*                       window, the TCP connection's connection maximum segment size MUST be configured
+*                       to ensure that full, maximum-segment-sized segments will transmit even for receive
+*                       windows less than the default maximum segment size.
+*
+*                       See also 'NetTCP_ConnCfgMaxSegSize()  Note #2'.
+*
+*               (6) (a) (1) RFC #896, Section 'The small-packet problem' states that "there is a special
+*                           problem associated with small packets ... the congestion ... can result in
+*                           lost datagrams and retransmissions, as well as excessive propagation time ...
+*                           In practice, throughput may drop so low that TCP connections are aborted".
+*
+*                       (2) RFC #896, Section 'The solution to the small-packet problem' states that "the
+*                           solution to the small-packet problem ... is" :
+*
+*                           (A) "to inhibit the sending of new TCP segments when new outgoing data arrives
+*                                from the user" ...
+*
+*                           (B) "if any previously transmitted data on the connection remains unacknowledged."
+*
+*                           (C) "This inhibition is to be unconditional;" :
+*                               (1) "no timers,"                       ...
+*                               (2) "tests for size of data received," ...
+*                               (3) "or other conditions are required."
+*
+*                   (b) (1) RFC #1122, Section 4.2.3.4 states that "the Nagle algorithm is ... as follows" :
+*
+*                           (A) "If there is unacknowledged data (i.e., SND.NXT > SND.UNA)," ...
+*                           (B) "then the sending TCP buffers all user data" ...
+*                               (1) "(regardless of the PSH bit)," ...
+*                               (2) "until" :
+*                                   (a) "the outstanding data has been acknowledged" ...
+*                                   (b) "or until the TCP can send a full-sized segment."
+*
+*                       (2) (A) (1) "A TCP SHOULD implement the Nagle Algorithm ... to coalesce short segments."
+*
+*                               (2) "However, there MUST be a way for an application to disable the Nagle
+*                                    algorithm on an individual connection."
+*
+*                           (B) Thus it is assumed from these two requirements that the Nagle algorithm
+*                               should be enabled by default.
+*
+*                       See also Note #7b2Ba2A.
+*
+*               (7) (a) RFC #813, Section 2 states that "a bad implementation of the window algorithm can
+*                       lead to extremely poor performance ... This particular phenomenon ... has been
+*                       given the name of Silly Window Syndrome, or SWS".
+*
+*                       Section 3 elaborates that "SWS is a degeneration in the throughput which develops
+*                       ... whenever the acknowledgement of a small segment ... cause[s] another segment
+*                       of the same small size to be sent, until ... the network ... becomes clogged with
+*                       many small segments, and an equal number of acknowledgements".
+*
+*                   (b) (1) RFC #813, Section 4 states that "there is an algorithm that the sender can use
+*                           ... [which] compares the useable window to the offered window, and refrains from
+*                           anything if the ratio of useable to offered is less than a certain fraction ...
+*                           Until the useable window reaches a certain amount, the sender should simply refuse
+*                           to send anything".
+*
+*                       (2) (A) RFC #1122, Section 4.2.3.4 reiterates that "a TCP MUST include a SWS avoidance
+*                               algorithm in the sender".  However, "the SWS avoidance algorithm ... specified"
+*                               in RFC #1122 "is to be used instead of the sender-side algorithm contained in
+*                               [RFC #813]".
+*
+*                           (B) (a) RFC #1122, Section 4.2.3.4 states that "the sender's SWS avoidance algorithm
+*                                   is ... [to] send data" :
+*
+*                                   (1) "If a maximum-sized segment can be sent, i.e, [sic] if" :
+*
+*                                       (A) "min(D,U) >= Eff.snd.MSS"
+*                                           (1) (a) This threshold subtly assumes that the amount of data queued
+*                                                   on the TCP connection's transmit queue is queued in maximum-
+*                                                   sized segments.
+*                                               (b) Although this assumption is typically satisfied since all
+*                                                   new TCP transmit data is usually aggregated & appended into
+*                                                   the TCP connection's transmit queue in maximum-sized segments
+*                                                   (see 'NetTCP_TxConnAppData()  Note #6b1'); to ensure that the
+*                                                   maximum-sized-segment threshold is satisfied the transmit
+*                                                   segment's length is also checked.
+*
+*                                   (2) "Or if the data is pushed and all queued data can be sent now, i.e., if" :
+*
+*                                       (A) "[SND.NXT = SND.UNA and]" ...
+*                                           (1) "(the bracketed condition is imposed by the Nagle algorithm)"
+*                                                (a) This condition is required ONLY if the Nagle algorithm
+*                                                    is enabled (see Note #6b2B).
+*
+*                                       (B) "PUSHED and"             ...
+*                                           (1) See also 'NetTCP_TxConnAppData()  Note #6b3B1b'.
+*
+*                                       (C) "D <= U"
+*                                           (1) (a) This threshold subtly assumes that the amount of data queued
+*                                                   on the TCP connection's transmit queue is queued in maximum-
+*                                                   sized segments.
+*                                               (b) To ensure that the next actual transmit segment is compared
+*                                                   to the available transmit window, the following threshold is
+*                                                   actually checked :
+*
+*                                                   (1) min(D, SEG.LEN) <= U
+*
+*                                               See also Note #7b2Ba1A1.
+*
+*                                   (3) "Or if at least a fraction Fs of the maximum window can be sent, i.e., if" :
+*
+*                                       (A) "[SND.NXT = SND.UNA and]" ...
+*                                           (1) This condition is required ONLY if the Nagle algorithm is enabled
+*                                               (see Note #6b2B).
+*
+*                                       (B) "min(D,U) >= Fs * Max(SND.WND)"
+*
+*                                   (4) "or if" :
+*
+*                                       (A) "data is PUSHed and" ...
+*                                           (1) Although it is not directly stated, it is inferred that if
+*                                               the segment(s)' data is NOT pushed, the segment transmit
+*                                               SHOULD be postponed until the previous transmit silly
+*                                               window syndrome avoidance conditions have been satisfied
+*                                               (see Notes #7b2Ba1, #7b2Ba2, & #7b2Ba3).
+*
+*                                           (2) See also 'NetTCP_TxConnAppData()  Note #6b3B1b'.
+*
+*                                       (B) "the override timeout occurs."
+*                                           (1) Although it is not directly stated, it is inferred that the
+*                                               transmit silly window override timer should be set when :
+*
+*                                               (a) The previous transmit silly window syndrome avoidance
+*                                                   conditions have NOT been satisfied (see Notes #7b2Ba1,
+*                                                   #7b2Ba2, & #7b2Ba3) ...
+*                                               (b) BUT                                ...
+*                                                   (1) the TCP segment data is pushed ...
+*                                                   (2) & no current timeout exists.
+*
+*                                           (2) However, if NO network timer is available to delay the TCP
+*                                               data segment(s), the TCP data segment(s) SHOULD be immediately
+*                                               transmitted.
+*
+*                                           See also Note #7b2Bb.
+*
+*
+*                                   where
+*                                       (A) D               Amount of data queued in the sending TCP but not
+*                                                               yet sent
+*
+*                                       (B) U              'Useable window' ... i.e., the offered window less
+*                                                               the amount of data sent but not acknowledged :
+*
+*                                                           (1) U = SND.UNA + SND.WND - SND.NXT
+*
+*                                                           (2) The 'useable window' is also constrained by the
+*                                                               available window & other TCP congestion controls
+*                                                               (see 'NetTCP_TxConnWinSizeUpdateAvail()  Note #1').
+*
+*                                       (C) Eff.snd.MSS     Effective send MSS for the connection
+*                                       (D) SND.NXT         Next sequence number to transmit
+*                                       (E) SND.UNA         Oldest unacknowledged sequence number
+*                                       (F) Max(SND.WND)    Maximum send window ... seen ... on the connection
+*                                       (G) Fs              Fraction whose recommended value is 1/2
+*
+*
+*                               (b) (1) Although RFC #813, Section 4 stated "that it is not necessary to set
+*                                       a timer to protect against protocol lockup when postponing the send
+*                                       operation"; RFC #1122, Section 4.2.3.4 amends that "to avoid a ...
+*                                       deadlock, it is necessary to have a timeout to force transmission of
+*                                       data, overriding the SWS avoidance algorithm".
+*
+*                                   (2) "The override timeout should be in the range 0.1 - 1.0 seconds."
+*
+*                                   (3) "In practice, this timeout should seldom occur."
+*
+*               (8) (a) Although it is not directly stated, it is inferred that the limitations of
+*                       the Nagle & transmit silly window syndrome avoidance algorithms apply only
+*                       to discrete, individually-queued data segments & NOT to any stream of data
+*                       segments.
+*
+*                       Therefore, a data segment -- especially the last queued data segment in the
+*                       TCP connection's transmit queue -- should NOT be constrained by the Nagle &
+*                       transmit silly window syndrome avoidance algorithms if this last queued data
+*                       segment is immediately transmitted after the transmission of the preceding
+*                       queued data segments.
+*
+*                       See also 'NetTCP_TxConnAppData()  Notes #6b1 & #6b3B2'.
+*
+*                   (b) Also, although NO RFC specifies the Nagle algorithm's or the transmit silly
+*                       window syndrome avoidance algorithm's compliance, effect, or limitation on
+*                       TCP connection closes; it does NOT seem reasonable for the Nagle algorithm
+*                       or the transmit silly window syndrome avoidance algorithm to inhibit or
+*                       delay the transmission of a TCP connection close segment.
+*
+*               (9) The following TCP transmit parameters are configured once PRIOR to transmitting
+*                   any TCP segment(s) :
+*
+*                   (a) IP transmit parameters :
+*                       (1) TOS
+*                       (2) TTL
+*                       (3) Flags
+*
+*              (10) Increment network buffer's reference counter to include the TCP segment now enqueued
+*                   to the TCP connection's re-transmit queue as a new reference to the network buffer.
+*
+*              (11) (a) IP  transmit options currently NOT implemented     See 'net_tcp.c  Note #1d'
+*                   (b) TCP transmit options currently NOT implemented     See 'net_tcp.c  Note #1c'
+*
+*              (12) To balance network receive versus transmit packet loads for certain network connection
+*                   types (e.g. stream-type connections), network receive & transmit packets SHOULD be
+*                   handled in an APPROXIMATELY balanced ratio.
+*
+*                   (a) Network task priorities & lock mechanisms partially maintain a balanced ratio
+*                       between network receive versus transmit packet handling.
+*
+*                       However, the handling of network receive & transmit packets :
+*
+*                       (1) SHOULD be interleaved so that for every few packet(s) received & handled,
+*                           several packet(s) should be transmitted; & vice versa.
+*
+*                       (2) SHOULD NOT exclusively handle receive nor transmit packets, even for a
+*                           short period of time, but especially for a prolonged period of time.
+*
+*                   (b) To implement network receive versus transmit load balancing :
+*
+*                       (2) Certain network connections MUST periodically suspend network transmit(s)
+*                           to handle network interface(s)' receive packet(s) :
+*
+*                           (A) Suspend network connection transmit(s) if any receive packets are
+*                               available on a network interface.
+*
+*                               (1) To approximate a balanced ratio of network receive versus transmit
+*                                   packets handled; the number of consecutive times that a network
+*                                   connection transmit suspends itself to check for & handle any
+*                                   network receive packet(s) SHOULD APPROXIMATELY correspond to the
+*                                   number of queued receive packet(s) available.
+*
+*                               (2) To protect TCP connections from transmit corruption while suspended,
+*                                   ALL TCP data transmits & TCP transmit queue handling MUST be blocked
+*                                   for suspended connections until the connection is no longer suspended.
+*
+*                           (B) Signal or timeout network connection transmit suspend(s) to restart
+*                               transmit(s).
+*
+*                   See also 'net_if.c  NetIF_RxPktIsAvail()  Notes #1 & #2'
+*                          & 'net_if.c  NetIF_TxSuspend()     Notes #1 & #2'.
+*
+*              (13) On ANY error(s), network resources MUST be appropriately freed :
+*
+*                   (a) For all network resources that have been linked to the TCP connection, ALL
+*                       network resources are freed by NetTCP_ConnClose().
+*
+*              (14) (a) Since segments enqueued to a TCP connection's transmit queue have already been
+*                       reported as transmitted to the application & since no mechanism exists for a TCP
+*                       connection to re-request previously transmitted data, any TCP connection whose
+*                       transmit queue(s) becomes corrupted MUST be closed to force the application layer
+*                       to abort &/or recover from the corrupted data.
+*
+*                   (b) For any internal errors where the TCP connection's transmit queue is NOT corrupted,
+*                       the TCP connection is NOT closed.
+*
+*                   See also 'NetTCP_TxConnAppData()  Note #10'
+*                          & 'NetTCP_TxConnReTxQ()    Note #11'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnTxQ (NET_TCP_CONN        *p_conn,
+                                NET_BUF_HDR         *p_buf_hdr,
+                                NET_TCP_ACK_CODE     tx_ack_code,
+                                CPU_BOOLEAN          tx_q_timeout,
+                                NET_TCP_CLOSE_CODE   close_code,
+                                CPU_BOOLEAN          tx_suspend_en,
+                                NET_ERR             *p_err)
+{
+    NET_BUF                 *pseg;
+    NET_BUF                 *pseg_next;
+    NET_BUF                 *p_buf_q_tail;
+    NET_BUF_HDR             *pseg_hdr;
+    NET_BUF_HDR             *pseg_next_hdr;
+    NET_BUF_HDR             *p_buf_q_tail_hdr;
+    NET_CONN_ID              conn_id;
+    NET_CONN                *p_net_conn;
+    NET_IF_NBR               if_nbr;
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR            src_addrv4  = NET_IPv4_ADDR_NONE;
+    NET_IPv4_ADDR            dest_addrv4 = NET_IPv4_ADDR_NONE;
+    NET_IPv4_TOS             TOS;
+    NET_IPv4_TTL             TTL;
+    NET_IPv4_FLAGS           flags_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_ADDR            src_addrv6;
+    NET_IPv6_ADDR            dest_addrv6;
+    NET_IPv6_TRAFFIC_CLASS   traffic_class;
+    NET_IPv6_FLOW_LABEL      flow_label;
+    NET_IPv6_HOP_LIM         hop_lim;
+    NET_IPv6_FLAGS           flags_ipv6;
+#endif
+    NET_TCP_PORT_NBR         src_port;
+    NET_TCP_PORT_NBR         dest_port;
+    NET_TCP_SEQ_NBR          seq_nbr;
+    NET_TCP_SEQ_NBR          ack_nbr;
+    NET_TCP_WIN_SIZE         win_size;
+    NET_TCP_WIN_SIZE         tx_data_qd;
+    NET_TCP_WIN_SIZE         tx_data_min;
+    NET_TCP_WIN_SIZE         tx_th_q_min;
+    NET_TMR_TICK             timeout_tick;
+    NET_TCP_FLAGS            flags_tcp;
+    CPU_BOOLEAN              tx_ack;
+    CPU_BOOLEAN              tx_seg;
+    CPU_BOOLEAN              tx_seg_push;
+    CPU_BOOLEAN              tx_seg_close;
+    CPU_BOOLEAN              tx_segs_txd;
+    CPU_BOOLEAN              tx_segs;
+    CPU_BOOLEAN              tx_done;
+    CPU_BOOLEAN              tx_nagle;
+    CPU_BOOLEAN              tx_th_seg;
+    CPU_BOOLEAN              tx_th_mss;
+    CPU_BOOLEAN              tx_th_nagle;
+    CPU_BOOLEAN              tx_th_silly_win;
+    CPU_BOOLEAN              tx_tmr_free;
+    CPU_BOOLEAN              net_rx_avail;
+    NET_CTR                  net_rx_nbr;
+    NET_CTR                  tx_seg_nbr;
+    NET_ERR                  err;
+    NET_ERR                  err_rtn;
+
+
+                                                                /* -------------------- CFG TCP TX -------------------- */
+    switch (tx_ack_code) {                                      /* Cfg tx ack req.                                      */
+        case NET_TCP_CONN_TX_ACK_NONE:
+        default:
+             tx_ack = DEF_NO;
+             break;
+
+
+        case NET_TCP_CONN_TX_ACK:
+        case NET_TCP_CONN_TX_ACK_IMMED:
+             tx_ack = DEF_YES;
+             break;
+    }
+
+                                                                /* Cfg tx tmr free req.                                 */
+    tx_tmr_free = (p_conn->TxQ_Head == DEF_NULL) ? DEF_YES : DEF_NO;
+
+
+    switch (p_conn->ConnState) {                                /* Cfg tx Q seg(s).                                     */
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                      tx_segs = DEF_YES;
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                 default:
+                     *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                      tx_segs = DEF_YES;
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:               /* See Note #12b2A2.                                    */
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                      tx_segs = DEF_NO;
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 default:
+                     *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        case NET_TCP_CONN_STATE_CLOSED:
+        default:
+             NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, close_code);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+
+
+    err_rtn = NET_TCP_ERR_NONE;
+
+
+
+                                                                /* ------------ TX DATA FROM TCP CONN TX Q ------------ */
+    conn_id = p_conn->ID_Conn;
+    if_nbr  = NetConn_IF_NbrGet(conn_id, &err);
+    if ( err != NET_CONN_ERR_NONE) {
+        NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, close_code);
+       *p_err  = NET_TCP_ERR_CONN_FAULT;
+        return;
+    }
+
+    p_net_conn = &NetConn_Tbl[conn_id];
+                                                                /* Prepare IP params (see Note #9a).                    */
+    switch (p_net_conn->Family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_SOCK_FAMILY_IP_V4:
+
+             NetConn_IPv4TxParamsGet(conn_id, &flags_ipv4, &TOS, &TTL, &err);
+             if ( err != NET_CONN_ERR_NONE) {
+                 NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, close_code);
+                *p_err  = NET_TCP_ERR_CONN_FAULT;
+                 return;
+             }
+             break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_SOCK_FAMILY_IP_V6:
+
+             NetConn_IPv6TxParamsGet(conn_id, &traffic_class, &flow_label, &hop_lim, &flags_ipv6, &err);
+             if ( err != NET_CONN_ERR_NONE) {
+                 NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, close_code);
+                *p_err  = NET_TCP_ERR_CONN_FAULT;
+                 return;
+             }
+             break;
+#endif
+
+        default:
+             break;
+    }
+
+    pseg_next   =  p_conn->TxQ_Head;
+
+    tx_done     = (tx_segs == DEF_YES) ? DEF_NO : DEF_YES;
+    tx_segs_txd =  DEF_NO;
+    tx_seg_nbr  =  0u;
+
+    while (tx_done == DEF_NO) {                                 /* Tx ALL TCP conn tx Q seg(s) ...                      */
+                                                                /* ... allowed by cong ctrls (see Note #1b1).           */
+        tx_seg = DEF_NO;
+
+        pseg   = pseg_next;
+        if (pseg != DEF_NULL) {
+            pseg_hdr  = &pseg->Hdr;
+            pseg_next =  pseg_hdr->NextPrimListPtr;
+                                                                /* ------------------- CTRL TCP TX -------------------- */
+                                                                /* Validate tx win cong th's :                  ...     */
+            if (p_conn->TxWinSizeAvail >= pseg_hdr->TCP_SegLenData) { /* ... chk avail tx win >= seg len (see Note #5), */
+                tx_seg = DEF_YES;
+                                                                /* ... chk prev'ly tx'd  seg(s) [see Note #8a]; ...     */
+                                                                /* ... or TCP conn close seg    [see Note #8b]; ...     */
+                tx_seg_close = DEF_BIT_IS_SET(pseg_hdr->TCP_Flags, NET_TCP_FLAG_TX_CLOSE);
+                tx_th_seg    = ((tx_segs_txd  == DEF_YES) ||
+                                (tx_seg_close == DEF_YES)) ? DEF_OK : DEF_FAIL;
+
+                if (tx_th_seg != DEF_OK) {
+                    NET_BUF_SIZE  buf_size;
+
+
+                    buf_size = NetBuf_GetMaxSize(if_nbr, NET_TRANSACTION_TX, pseg, pseg_hdr->DataIx);
+                    if (buf_size == pseg_hdr->DataLen) {        /* If the buffer is full then send it.                  */
+                        tx_th_mss = DEF_YES;
+
+                    } else {
+                                                                /* ... chk MSS       th (see Note #7b2Ba1);     ...     */
+                        tx_data_qd  = p_conn->TxSeqNbrNextQ - p_conn->TxSeqNbrNext;
+                        tx_data_min = DEF_MIN(tx_data_qd,    pseg_hdr->TCP_SegLenData);
+                        tx_th_q_min = DEF_MIN(tx_data_min,   p_conn->TxWinSizeAvail);
+
+                        tx_th_mss   = (tx_th_q_min >= p_conn->MaxSegSizeConn) ? DEF_OK : DEF_FAIL;
+                    }
+
+
+                    if (tx_th_mss != DEF_OK) {
+                                                                /* ... chk Nagle     th (see Note #7b2Ba2);     ...     */
+                        tx_seg_push = DEF_BIT_IS_SET(pseg_hdr->TCP_Flags, NET_TCP_FLAG_TX_PUSH);
+                        tx_nagle    = ((p_conn->TxWinSizeNagleEn == DEF_DISABLED         ) ||
+                                       (p_conn->TxSeqNbrNext     == p_conn->TxSeqNbrUnAckd)) ? DEF_YES : DEF_NO;
+                        tx_th_nagle = ((tx_nagle    == DEF_YES) &&
+                                       (tx_seg_push == DEF_YES) &&
+                                       (tx_data_min <= p_conn->TxWinSizeAvail)) ? DEF_OK : DEF_FAIL;
+
+                        if (tx_th_nagle != DEF_OK) {
+                                                                /* ... chk silly win th (see Note #7b2Ba3);     ...     */
+                            tx_th_silly_win = ((tx_nagle    == DEF_YES) &&
+                                               (tx_th_q_min >= p_conn->TxWinSizeMinTh)) ? DEF_OK : DEF_FAIL;
+
+                            if (tx_th_silly_win != DEF_OK) {
+                                                                /* ... chk push timeout (see Note #7b2Ba4).             */
+                                if (tx_seg_push == DEF_YES) {   /* If data seg pushed   (see Note #7b2Ba4A),    ...     */
+                                    if (tx_q_timeout == DEF_NO) { /* ... & no cur timeout (see Note #7b2Ba4B1b2), ...   */
+                                                                /* ... & tx Q tmr NOT yet cfg'd,                ...     */
+                                        if (p_conn->TxQ_SillyWinTmr == DEF_NULL) {
+                                            timeout_tick            =  p_conn->TxWinSillyWinTimeout_tick;
+                                            p_conn->TxQ_SillyWinTmr =  NetTmr_Get(&NetTCP_TxConnTxQ_TimeoutSillyWin,
+                                                                           (void *)p_conn,
+                                                                                   timeout_tick,
+                                                                                   NET_TMR_FLAG_NONE,
+                                                                                  &err);
+                                                                /* ... & tx Q tmr avail,                        ...     */
+                                            if (err == NET_TMR_ERR_NONE) {
+                                                tx_seg = DEF_NO;/* ... dly  tx seg (see Note #7b2Ba4B1);        ...     */
+                                            }                   /* ... else tx seg (see Note #7b2Ba4B2).                */
+
+                                        } else {                /* Else  tx Q tmr already cfg'd, ...                    */
+                                            tx_seg = DEF_NO;    /* ... dly  tx seg (see Note #7b2Ba4B1).                */
+                                        }
+                                    }
+
+                                } else {                        /* If data seg NOT pushed, ...                          */
+                                    tx_seg = DEF_NO;            /* ... dly tx seg (see Note #7b2Ba4A1).                 */
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+        }
+
+
+                                                                /* ------------------- TX TCP SEGS -------------------- */
+        if (tx_seg == DEF_YES) {                                /* If avail & rdy, tx Q seg(s).                         */
+
+                                                                /* UPDATE TCP CONN TX Q's                               */
+                                                                /* Move seg from tx Q to re-tx Q :                      */
+
+            if (pseg_next != DEF_NULL) {                        /* If tx Q next seg(s) avail, ...                       */
+                                                                /* ... update TCP conn tx Q.                            */
+                pseg_next_hdr                  = &pseg_next->Hdr;
+                pseg_next_hdr->PrevPrimListPtr =  DEF_NULL;
+                p_conn->TxQ_Head               =  pseg_next;
+
+            } else {                                            /* Else clr tx Q.                                       */
+                p_conn->TxQ_Head = DEF_NULL;
+                p_conn->TxQ_Tail = DEF_NULL;
+
+                tx_tmr_free     =  DEF_YES;
+            }
+
+            pseg_hdr->PrevPrimListPtr = p_conn->ReTxQ_Tail;
+            pseg_hdr->NextPrimListPtr = DEF_NULL;
+
+            if (p_conn->ReTxQ_Tail != DEF_NULL) {               /* If re-tx Q NOT empty, ...                            */
+                                                                /* ... append seg(s) @ Q tail (see Note #4b1).          */
+                p_buf_q_tail                      =  p_conn->ReTxQ_Tail;
+                p_buf_q_tail_hdr                  = &p_buf_q_tail->Hdr;
+                p_buf_q_tail_hdr->NextPrimListPtr =  pseg;
+
+                p_conn->ReTxQ_Tail                =  pseg;
+
+            } else {                                            /* Else add seg to empty re-tx Q.                       */
+                p_conn->ReTxQ_Head                =  pseg;
+                p_conn->ReTxQ_Tail                =  pseg;
+            }
+
+
+            if (p_conn->ReTxQ_Tmr == DEF_NULL) {                /* If unavail, get & update re-tx Q tmr.                */
+                NetTCP_TxConnReTxQ_TimeoutSet(p_conn, DEF_NO, close_code, p_err);
+                if (*p_err != NET_TCP_ERR_NONE) {
+                     return;
+                }
+            }
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+                                                                /* Update TCP conn tx seq nbr(s).                       */
+            p_conn->TxSeqNbrNext += pseg_hdr->TCP_SegLen;
+
+                                                                /* Update TCP conn tx win ctrls.                        */
+            NetTCP_TxConnWinSizeHandlerCongCtrl(p_conn,
+                                                DEF_NULL,
+                                                NET_TCP_CONN_RX_ACK_NONE,
+                                                pseg_hdr->TCP_SegLenData,
+                                                NET_TCP_CONN_TX_WIN_DEC,
+                                               &err);
+            if ( err != NET_TCP_ERR_NONE) {
+               *p_err  = NET_TCP_ERR_CONN_FAULT;
+                return;
+            }
+
+
+                                                                /* ----------- PREPARE TCP TX DATA/ACK SEG ------------ */
+                                                                /* Prepare TCP seg addrs.                               */
+
+            switch (p_net_conn->Family) {
+#ifdef  NET_IPv4_MODULE_EN
+                case NET_SOCK_FAMILY_IP_V4:
+                     src_addrv4  = pseg_hdr->IP_AddrSrc;
+                     dest_addrv4 = pseg_hdr->IP_AddrDest;
+                     break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+                case NET_SOCK_FAMILY_IP_V6:
+                     src_addrv6  = pseg_hdr->IPv6_AddrSrc;
+                     dest_addrv6 = pseg_hdr->IPv6_AddrDest;
+                     DEF_BIT_SET(pseg_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);
+                     break;
+#endif
+                default:
+#if 0
+                    *p_err = NET_TCP_ERR_CONN_PROTO_FAMILY;
+                     return;
+#endif
+                     break;
+            }
+
+            src_port  = pseg_hdr->TransportPortSrc;
+            dest_port = pseg_hdr->TransportPortDest;
+
+                                                                /* Prepare TCP seq nbrs.                                */
+            seq_nbr   = pseg_hdr->TCP_SeqNbr;
+            ack_nbr   = p_conn->RxSeqNbrNext;
+
+                                                                /* Prepare TCP tx flags.                                */
+            flags_tcp = pseg_hdr->TCP_Flags;
+
+                                                                /* Prepare TCP win size.                                */
+            win_size  = p_conn->RxWinSizeActual;
+
+                                                                /* Prepare IP params (see Note #9a).                    */
+
+            switch (p_net_conn->Family) {
+#ifdef  NET_IPv4_MODULE_EN
+                case NET_SOCK_FAMILY_IP_V4:
+                     NetConn_IPv4TxParamsGet(conn_id, &flags_ipv4, &TOS, &TTL, &err);
+                     if ( err != NET_CONN_ERR_NONE) {
+                         NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, close_code);
+                        *p_err  = NET_TCP_ERR_CONN_FAULT;
+                         return;
+                     }
+                     break;
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+                case NET_SOCK_FAMILY_IP_V6:
+                     NetConn_IPv6TxParamsGet(conn_id, &traffic_class, &flow_label, &hop_lim, &flags_ipv6, &err);
+                     if ( err != NET_CONN_ERR_NONE) {
+                         NetTCP_ConnClose(p_conn, p_buf_hdr, DEF_YES, close_code);
+                        *p_err  = NET_TCP_ERR_CONN_FAULT;
+                         return;
+                     }
+                     break;
+#endif
+
+                default:
+#if 0
+                    *p_err = NET_TCP_ERR_CONN_PROTO_FAMILY;
+                     return;
+#endif
+                     break;
+
+            }
+
+                                                                /* Update TCP tx buf ctrls.                             */
+            pseg_hdr->TCP_SeqNbrLast  = seq_nbr;
+            pseg_hdr->TCP_AckNbrLast  = ack_nbr;
+            pseg_hdr->TCP_SegLenLast  = pseg_hdr->TCP_SegLen;
+            pseg_hdr->TCP_WinSizeLast = win_size;
+
+            pseg_hdr->TCP_SegReTxCtr  = 0u;
+            pseg_hdr->RefCtr++;                                 /* TCP maintains ref until seg ack'd (see Note #10).    */
+
+
+                                                                /* --------------- TX TCP DATA/ACK SEG ---------------- */
+            if (DEF_BIT_IS_CLR(pseg_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+                NetTCP_TxPktHandlerIPv4(pseg,
+                                        src_addrv4,
+                                        src_port,
+                                        dest_addrv4,
+                                        dest_port,
+                                        seq_nbr,
+                                        ack_nbr,
+                                        win_size,
+                                        TOS,
+                                        TTL,
+                                        flags_tcp,
+                                        flags_ipv4,
+                                        DEF_NULL,
+                                        DEF_NULL,               /* See Note #9b.                                        */
+                                       &err_rtn);               /* Ignore transitory tx err(s).                         */
+#endif
+            } else {
+#ifdef  NET_IPv6_MODULE_EN
+                NetTCP_TxPktHandlerIPv6(pseg,
+                                       &src_addrv6,
+                                        src_port,
+                                       &dest_addrv6,
+                                        dest_port,
+                                        seq_nbr,
+                                        ack_nbr,
+                                        win_size,
+                                        traffic_class,
+                                        flow_label,
+                                        hop_lim,
+                                        flags_tcp,
+                                        DEF_NULL,               /* See Note #9b.                                        */
+                                       &err_rtn);
+#endif
+            }
+
+            switch (err_rtn) {
+                case NET_TCP_ERR_NONE:                          /* If NO tx err(s);         ...                         */
+                     tx_segs_txd = DEF_YES;                     /* ... indicate seg(s) tx'd ...                         */
+                     tx_seg_nbr++;                              /* ... & inc tx ctrs.                                   */
+                     NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegConnTxQ_Ctr);
+                     break;
+
+
+                case NET_ERR_TX:                                /* Else indicate tx done.                               */
+                case NET_ERR_IF_LINK_DOWN:
+                     tx_done = DEF_YES;
+                     break;
+
+
+                case NET_TCP_ERR_TX_PKT:                        /* See Note #14a.                                       */
+                case NET_ERR_IF_LOOPBACK_DIS:
+                default:
+                     NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, close_code);
+                    *p_err = err_rtn;
+                     return;
+            }
+
+
+        } else {                                                /* Else if seg NOT tx'd, ...                            */
+            tx_done = DEF_YES;                                  /* ... indicate tx done.                                */
+        }
+
+
+                                                                /* ------------------ SUSPEND TCP TX ------------------ */
+        if ((tx_suspend_en == DEF_YES) &&
+            (tx_done       == DEF_NO)  &&                       /* If tx NOT done &                            ..       */
+            (tx_seg_nbr     > 1))       {                       /* .. tx'd > 1 seg,                            ..       */
+             net_rx_nbr   = 0u;
+             net_rx_avail = NetIF_RxPktIsAvail(if_nbr, net_rx_nbr);
+             if (net_rx_avail == DEF_YES) {                     /* .. & rx pkt(s) avail;                       ..       */
+                 switch (p_conn->TxQ_State) {                   /* .. set TCP conn tx Q state to SUSPEND,      ..       */
+                     case NET_TCP_TX_Q_STATE_CONN:
+                     case NET_TCP_TX_Q_STATE_SUSPEND:
+                          p_conn->TxQ_State = NET_TCP_TX_Q_STATE_SUSPEND;
+                          break;
+
+
+                     case NET_TCP_TX_Q_STATE_CLOSING:
+                     case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                          p_conn->TxQ_State = NET_TCP_TX_Q_STATE_CLOSING_SUSPEND;
+                          break;
+
+
+                     case NET_TCP_TX_Q_STATE_CLOSED:
+                     case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                          p_conn->TxQ_State = NET_TCP_TX_Q_STATE_CLOSED_SUSPEND;
+                          break;
+
+
+                     case NET_TCP_TX_Q_STATE_NONE:
+                     default:
+                          NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, close_code);
+                         *p_err = NET_TCP_ERR_CONN_CLOSE;
+                          return;
+                 }
+
+
+                 Net_GlobalLockRelease();
+                 do {
+                     NetIF_TxSuspend(if_nbr);                   /* .. & suspend TCP tx       (see Note #12b2A) ..       */
+
+                     net_rx_nbr++;
+                     net_rx_avail = NetIF_RxPktIsAvail(if_nbr, net_rx_nbr);
+                 } while (net_rx_avail == DEF_YES);             /* .. while     net rx avail (see Note #12b2A1).        */
+
+                 Net_GlobalLockAcquire((void *)&NetTCP_TxConnTxQ, &err);
+                 if (err != NET_ERR_NONE) {
+                     NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, close_code);
+                    *p_err  = NET_TCP_ERR_CONN_CLOSE;
+                     return;
+                 }
+
+                 switch (p_conn->TxQ_State) {                   /* Restore TCP conn tx Q state.                         */
+                     case NET_TCP_TX_Q_STATE_SUSPEND:
+                          p_conn->TxQ_State = NET_TCP_TX_Q_STATE_CONN;
+                          break;
+
+
+                     case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                          p_conn->TxQ_State = NET_TCP_TX_Q_STATE_CLOSING;
+                          break;
+
+
+                     case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                          p_conn->TxQ_State = NET_TCP_TX_Q_STATE_CLOSED;
+                          break;
+
+
+                     case NET_TCP_TX_Q_STATE_CLOSED:            /* If prev'ly CLOSED, don't re-close TCP conn.          */
+                         *p_err = NET_TCP_ERR_CONN_CLOSE;
+                          return;
+
+
+                     case NET_TCP_TX_Q_STATE_CLOSING:
+                          break;
+
+
+                     case NET_TCP_TX_Q_STATE_NONE:
+                     case NET_TCP_TX_Q_STATE_CONN:
+                     default:
+                          NetTCP_ConnClose(p_conn, p_buf_hdr, p_conn->ConnCloseAppFlag, close_code);
+                         *p_err = NET_TCP_ERR_CONN_CLOSE;
+                          return;
+                 }
+             }
+        }
+    }
+
+
+                                                                /* ----------------- COMPLETE TCP TX ------------------ */
+    if (tx_segs_txd != DEF_YES) {                               /* If NO   tx Q seg(s) tx'd, ...                        */
+        if (tx_ack  == DEF_YES) {                               /* ... but tx ack req'd;     ...                        */
+                                                                /* ... tx TCP conn ack (see Note #1c1).                 */
+            NetTCP_TxConnAck(p_conn, p_buf_hdr, tx_ack_code, close_code, &err_rtn);
+        }
+
+    } else {                                                    /* Else if ANY tx Q seg(s) tx'd;         ..             */
+        NetTCP_TxConnTxQ_TimeoutIdleClr(p_conn);                /* .. clr tx Q idle tmr (see Note #1c2), ..             */
+        NetTCP_TxConnAckDlyReset(p_conn, DEF_YES);              /* .. reset ack dly ctrls,               ..             */
+        tx_tmr_free  = DEF_YES;                                 /* .. free tx Q tmr.                                    */
+    }
+
+
+    if (tx_tmr_free == DEF_YES) {                               /* If free tx Q tmr req'd, ..                           */
+        if (p_conn->TxQ_SillyWinTmr != DEF_NULL) {              /* .. &    tx Q tmr avail, ..                           */
+            if (tx_q_timeout == DEF_NO) {                       /* .. & NOT timed out,     ..                           */
+                                                                /* .. free tx Q tmr.                                    */
+                NetTmr_Free(p_conn->TxQ_SillyWinTmr);
+            }
+            p_conn->TxQ_SillyWinTmr  = DEF_NULL;
+        }
+    }
+
+
+
+   *p_err = err_rtn;                                            /* Rtn err from tx handler(s).                          */
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetTCP_TxConnTxQ_TimeoutIdle()
+*
+* Description : (1) (a) Handle TCP connection's transmit queue idle timeout ... :
+*
+*                       (1) Clear TCP connection's transmit idle timer                      See Notes #4a1A & #4a2
+*                       (2) Reset TCP connection's transmit congestion window controls      See Note  #2a
+*                       (3) Reset TCP connection's transmit round-trip time   controls      See Note  #2b
+*
+*                   (b) ... for the following states :
+*
+*                       (1) ESTABLISHED
+*                       (2) FIN-WAIT-1
+*                       (3) CLOSING
+*                       (4) CLOSE-WAIT
+*                       (5) LAST-ACK
+*
+*
+* Argument(s) : p_conn_timeout       Pointer to TCP connection (see Note #3b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetTCP_TxConnTxQ_TimeoutIdleSet().
+*
+* Note(s)     : (2) (a) RFC #2581, Section 4.1 states that "after TCP has been idle for a relatively long period
+*                       of time ... use slow start to restart transmission" :
+*
+*                       (1) (A) "When TCP has not received a segment for more than one retransmission timeout," ...
+*                           (B) "cwnd is reduced to the value of the restart window."
+*
+*                       (2) However, RFC #2581, Section 4.1 re-states that "using the last time a segment was
+*                           received to determine whether or not to decrease cwnd fails to deflate cwnd in the
+*                           common case of persistent ... connections ... The reception of [segments] makes the
+*                           test for an idle connection fail, and allows the TCP to begin transmission with a
+*                           possibly inappropriately large cwnd."
+*
+*                           (A) "Therefore, ... if the TCP has not sent data ... in an interval exceeding the
+*                                retransmission timeout" ...
+*
+*                           (B) "a TCP SHOULD set cwnd to no more than RW before beginning transmission."
+*
+*                       See also 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Note #2e1'.
+*
+*                   (b) Similarly, although NO RFC specifies that a TCP connection's RTT average & deviation
+*                       should be reset following a TCP transmit idle timeout; it seems reasonable to reset a
+*                       TCP connection's RTT average & deviation controls whenever a TCP connection's transmit
+*                       is idle for a period exceeding the re-transmit timeout.
+*
+*                       See also 'NetTCP_TxConnRTT_RTO_Calc()  Note #2a4A2'.
+*
+*               (3) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_TCP_CONN' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (4) This function is a network timer callback function :
+*
+*                   (a) (1) For the following connection timer(s) ... :
+*
+*                           (A) TCP connection transmit queue idle timer ('TxQ_IdleTmr')
+*
+*                       (2) (A) Clear the timer pointer ... :
+*                               (1) Cleared prior to next handler function(s); ...
+*                               (2) Cleared prior to invalid state fault exit.
+*
+*                           (B) but do NOT re-free the timer.
+*
+*                   (b) Do NOT set the following close timer flag(s) :
+*
+*                       (1) NET_TCP_CONN_CLOSE_TMR_TX_IDLE
+*
+*               (5) Certain network connections MUST periodically suspend network transmit(s) to handle
+*                   network receive packet(s).  To protect TCP connections from transmit corruption while
+*                   suspended, ALL TCP data transmits & TCP transmit queue handling MUST be blocked for
+*                   suspended connections until the connection is no longer suspended.
+*
+*                   However, handling the TCP connection's transmit queue idle timeout is permitted since
+*                   NO new TCP data is prepared from the TCP connection's transmit queue (see Note #1a).
+*
+*                   See also 'NetTCP_TxConnTxQ()                    Note #12b2A2',
+*                            'NetTCP_TxConnTxQ_TimeoutSillyWin()    Note #5',
+*                            'NetTCP_TxConnReTxQ_Timeout()          Note #5',
+*                          & 'NetTCP_TxConnWinSizeZeroWinTimeout()  Note #5'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnTxQ_TimeoutIdle (void  *p_conn_timeout)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NET_TCP_CLOSE_CODE   close_code;
+#endif
+    NET_TCP_CONN        *p_conn;
+    NET_ERR              err;
+
+
+    p_conn      = (NET_TCP_CONN *)p_conn_timeout;               /* See Note #3b2A.                                      */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    close_code =  NET_TCP_CONN_CLOSE_ALL;
+    DEF_BIT_CLR(close_code, NET_TCP_CONN_CLOSE_TMR_TX_IDLE);    /* See Note #4b1.                                       */
+
+                                                                /* ---------------- VALIDATE TCP CONN ----------------- */
+    if (p_conn == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NullPtrCtr);
+        return;
+    }
+
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             p_conn->TxQ_IdleTmr = DEF_NULL;                    /* See Note #4a2A2.                                     */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #1.                                         */
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:               /* See Note #5.                                         */
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                      p_conn->TxQ_IdleTmr = DEF_NULL;           /* See Note #4a2A2.                                     */
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)close_code);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+             return;
+    }
+#endif
+
+
+                                                                /* -------- HANDLE TCP CONN TX Q IDLE TIMEOUT --------- */
+    p_conn->TxQ_IdleTmr = DEF_NULL;                             /* Clr tx Q idle tmr  (see Note #4a2A1).                */
+
+                                                                /* Reset tx win ctrls (see Note #2a2B).                 */
+    NetTCP_TxConnWinSizeHandlerCongCtrl((NET_TCP_CONN   *) p_conn,
+                                        (NET_BUF_HDR    *) 0,
+                                        (NET_TCP_ACK_CODE) NET_TCP_CONN_RX_ACK_NONE,
+                                        (NET_TCP_WIN_SIZE) 0u,
+                                        (NET_TCP_WIN_CODE) NET_TCP_CONN_TX_WIN_RESET,
+                                        (NET_ERR        *)&err);
+
+                                                                /* Reset RTT ctrls (see Note #2b).                      */
+    NetTCP_TxConnRTT_RTO_Calc(p_conn, NET_TCP_CONN_TX_RTT_RESET, NET_TCP_TX_RTT_NONE, NET_TCP_TX_RTT_NONE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_TxConnTxQ_TimeoutIdleSet()
+*
+* Description : (1) Start TCP connection's transmit queue idle timeout for the following states :
+*
+*                   (a) SYN-RECEIVED
+*                   (b) SYN-SENT
+*                   (c) ESTABLISHED
+*                   (d) FIN-WAIT-1
+*                   (e) CLOSING
+*                   (f) CLOSE-WAIT
+*                   (g) LAST-ACK
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandlerReTxQ().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerReTxQ().
+*
+* Note(s)     : (2) (a) RFC #2581, Section 4.1 states that "after TCP has been idle for a relatively long period
+*                       of time ... use slow start to restart transmission" :
+*
+*                       (1) "If the TCP has not sent data in an interval exceeding the retransmission timeout" ...
+*                       (2) "cwnd is reduced to ... no more than ... the value of the restart window."
+*
+*                       See also 'NetTCP_TxConnTxQ_TimeoutIdle()  Note #2a'.
+*
+*                   (b) However, if NO network timer is available to time the transmit queue idle interval, the
+*                       TCP connection SHOULD be immediately slow started.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnTxQ_TimeoutIdleSet (NET_TCP_CONN  *p_conn)
+{
+    NET_TMR_TICK  timeout_tick;
+    NET_ERR       err;
+
+
+                                                                /* ---------------- VALIDATE TCP CONN ----------------- */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:                       /* See Note #1a.                                        */
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:                       /* See Note #1b.                                        */
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #1c.                                        */
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+             return;
+    }
+
+
+                                                                /* ----------- START TCP CONN TX Q IDLE TMR ----------- */
+    timeout_tick = p_conn->TxRTT_RTO_tick;                      /* Tx Q idle timeout = RTO (see Note #2a1).             */
+    if (p_conn->TxQ_IdleTmr == DEF_NULL) {                      /* If       tx Q idle tmr NOT avail, ...                */
+                                                                /* ...  get tx Q idle tmr.                              */
+        p_conn->TxQ_IdleTmr  =  NetTmr_Get((CPU_FNCT_PTR )&NetTCP_TxConnTxQ_TimeoutIdle,
+                                          (void        *) p_conn,
+                                          (NET_TMR_TICK ) timeout_tick,
+                                          (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                          (NET_ERR     *)&err);
+    } else {                                                    /* Else set tx Q idle tmr.                              */
+        NetTmr_Set((NET_TMR    *) p_conn->TxQ_IdleTmr,
+                   (CPU_FNCT_PTR)&NetTCP_TxConnTxQ_TimeoutIdle,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+    }
+
+    if (err != NET_TMR_ERR_NONE) {                              /* If any err(s), ...                                   */
+                                                                /* ... reset tx win ctrls (see Note #2b).               */
+        NetTCP_TxConnWinSizeHandlerCongCtrl((NET_TCP_CONN   *) p_conn,
+                                            (NET_BUF_HDR    *) 0,
+                                            (NET_TCP_ACK_CODE) NET_TCP_CONN_RX_ACK_NONE,
+                                            (NET_TCP_WIN_SIZE) 0u,
+                                            (NET_TCP_WIN_CODE) NET_TCP_CONN_TX_WIN_RESET,
+                                            (NET_ERR        *)&err);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_TxConnTxQ_TimeoutIdleClr()
+*
+* Description : (1) Clear TCP connection's transmit queue idle timer for the following states :
+*
+*                   (a) ESTABLISHED
+*                   (b) FIN-WAIT-1
+*                   (c) CLOSING
+*                   (d) CLOSE-WAIT
+*                   (e) LAST-ACK
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnTxQ().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnTxQ().
+*
+* Note(s)     : (2) (a) RFC #2581, Section 4.1 states that "after TCP has been idle for a relatively long period
+*                       of time ... use slow start to restart transmission" :
+*
+*                       (1) "If the TCP has not sent data in an interval exceeding the retransmission timeout" ...
+*                       (2) "cwnd is reduced to ... no more than ... the value of the restart window."
+*
+*                       See also 'NetTCP_TxConnTxQ_TimeoutIdle()  Note #2a'.
+*
+*                   (b) (1) However, if the TCP connection's re-transmit queue is NOT empty, then TCP data has
+*                           has been transmitted & is awaiting acknowledgement.
+*
+*                       (2) Therefore, NO transmit queue idle timeout is currently needed.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnTxQ_TimeoutIdleClr (NET_TCP_CONN  *p_conn)
+{
+    CPU_BOOLEAN  tmr_free;
+
+
+                                                                /* ---------------- VALIDATE TCP CONN ----------------- */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #1.                                         */
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+             return;
+    }
+
+
+                                                                /* ------------ CLR TCP CONN TX Q IDLE TMR ------------ */
+    tmr_free = (p_conn->ReTxQ_Head != DEF_NULL) ? DEF_YES : DEF_NO;
+
+    if (tmr_free == DEF_YES) {                                  /* If re-tx Q NOT empty   (see Note #2b1), ...          */
+        if (p_conn->TxQ_IdleTmr != DEF_NULL) {
+            NetTmr_Free(p_conn->TxQ_IdleTmr);                   /* ... free tx Q idle tmr (see Note #2b2).              */
+            p_conn->TxQ_IdleTmr  = DEF_NULL;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_TxConnTxQ_TimeoutSillyWin()
+*
+* Description : (1) (a) Handle TCP connection's transmit queue silly window timeout ... :
+*
+*                       (1) Clear    TCP connection's transmit silly window persist timer   See Notes #4a1A & #4a2
+*                       (2) Transmit TCP connection's transmit data                         See Note  #2
+*
+*                   (b) ... for the following states :
+*
+*                       (1) ESTABLISHED
+*                       (2) FIN-WAIT-1
+*                       (3) CLOSING
+*                       (4) CLOSE-WAIT
+*                       (5) LAST-ACK
+*
+*
+* Argument(s) : p_conn_timeout       Pointer to TCP connection (see Note #3b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetTCP_TxConnTxQ().
+*
+* Note(s)     : (2) RFC #1122, Section 4.2.3.4 states that on "timeout ... force transmission of data,
+*                   overriding the SWS avoidance algorithm".
+*
+*                   See also 'NetTCP_TxConnTxQ()  Note #7b2Bb'.
+*
+*               (3) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_TCP_CONN' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (4) This function is a network timer callback function :
+*
+*                   (a) (1) For the following connection timer(s) ... :
+*
+*                           (A) TCP connection transmit silly window persist timer ('TxQ_SillyWinTmr')
+*
+*                       (2) (A) Clear the timer pointer ... :
+*                               (1) Cleared prior to next handler function(s); ...
+*                               (2) Cleared prior to invalid state fault exit.
+*
+*                           (B) but do NOT re-free the timer.
+*
+*                   (b) Do NOT set the following close timer flag(s) :
+*
+*                       (1) NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN
+*
+*               (5) Certain network connections MUST periodically suspend network transmit(s) to handle
+*                   network receive packet(s).  To protect TCP connections from transmit corruption while
+*                   suspended, ALL TCP data transmits & TCP transmit queue handling MUST be blocked for
+*                   suspended connections until the connection is no longer suspended.
+*
+*                   (a) The transmit queue silly window timeout is reconfigured with one timer tick to
+*                       ensure that a non-zero delay is implemented.
+*
+*                   (b) If NO timer is available, a TCP connection will NOT be able to re-schedule the
+*                       transmission of its TCP transmit queue data.  Thus the TCP transmit queue data
+*                       will be delayed until triggered by any received acknowledgement packets or by
+*                       additional data transmits from the applications layer.
+*
+*                   See also 'NetTCP_TxConnTxQ()                    Note #12b2A2',
+*                            'NetTCP_TxConnTxQ_TimeoutIdle()        Note #5',
+*                            'NetTCP_TxConnReTxQ_Timeout()          Note #5',
+*                          & 'NetTCP_TxConnWinSizeZeroWinTimeout()  Note #5'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnTxQ_TimeoutSillyWin (void  *p_conn_timeout)
+{
+    NET_TCP_CONN        *p_conn;
+    NET_TCP_CLOSE_CODE   close_code;
+    NET_TMR_TICK         timeout_tick;
+    NET_ERR              err;
+
+
+    p_conn      = (NET_TCP_CONN *)p_conn_timeout;               /* See Note #3b2A.                                      */
+
+    close_code =  NET_TCP_CONN_CLOSE_ALL;
+    DEF_BIT_CLR(close_code, NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN); /* See Note #4b1.                                     */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE TCP CONN ----------------- */
+    if (p_conn == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NullPtrCtr);
+        return;
+    }
+#endif
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             p_conn->TxQ_SillyWinTmr = DEF_NULL;                /* See Note #4a2A2.                                     */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #1.                                         */
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_SUSPEND:               /* See Note #5.                                         */
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                      timeout_tick           = (NET_TMR_TICK)1u;/* See Note #5a.                                        */
+                      p_conn->TxQ_SillyWinTmr =  NetTmr_Get((CPU_FNCT_PTR )&NetTCP_TxConnTxQ_TimeoutSillyWin,
+                                                           (void        *) p_conn,
+                                                           (NET_TMR_TICK ) timeout_tick,
+                                                           (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                                           (NET_ERR     *)&err);
+                     (void)&err;                                /* Ignore transitory rsrc err(s) [see Note #5b].        */
+                      return;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                      p_conn->TxQ_SillyWinTmr = DEF_NULL;       /* See Note #4a2A2.                                     */
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)close_code);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+             return;
+    }
+
+
+                                                                /* ------ HANDLE TCP CONN TX Q SILL WIN TIMEOUT ------- */
+    p_conn->TxQ_SillyWinTmr = DEF_NULL;                         /* Clr tx Q silly win tmr (see Note #4a2A1).            */
+
+    NetTCP_TxConnTxQ(p_conn,                                    /* Tx Q data          (see Note #2).                    */
+                     0,
+                     NET_TCP_CONN_TX_ACK_NONE,
+                     DEF_YES,
+                     close_code,
+                     DEF_NO,
+                    &err);                                      /* Ignore ALL tx err(s), transitory or fatal.           */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_TxConnReTxQ()
+*
+* Description : (1) Re-transmit  TCP data segment(s) from TCP connection re-transmit queue :
+*
+*                   (a) Validate TCP connection re-transmit :
+*                       (1) Validate re-transmit segment available
+*                       (2) Validate re-transmit segment threshold                          See Note #3
+*
+*                   (b) Update TCP connection :
+*                       (1) Update     TCP connection's re-transmit queue timeout :
+*                           (A) Update TCP connection's re-transmit queue timer             See Note #2b
+*                           (B) Reset  TCP connection's    transmit round-trip time         See Note #2b2A2
+*                                   controls
+*                       (2) Update     TCP connection's    transmit congestion controls :
+*                           (A) Update TCP connection's transmit congestion window          See Note #5
+*                           (B) Reset  TCP connection's delayed acknowledgement controls    See Note #6
+*
+*                   (c) Prepare TCP segment re-transmit :
+*                       (1) Prepare unchanged TCP segment for re-transmit                   See Note #7
+*
+*                       (2) Prepare updated   TCP segment for re-transmit :
+*                           (A) TCP segment   sequence numbers
+*                           (B) TCP segment   window size
+*                           (C) TCP segment   addresses
+*                           (D) TCP segment   transmit flags
+*                           (E) IP  datagram  parameters
+*                           (F) Update TCP    segment's last transmit values :
+*                               (1) Sequence        Number
+*                               (2) Acknowledgement Number
+*                               (3) Segment Length
+*                               (4) Window  Size
+*                           (G) Unlink TCP segment packet buffer from any other network layer(s)
+*                           (H) Update TCP segment packet buffer controls
+*
+*                   (d) Re-transmit TCP segment                                             See Note #2a
+*
+*
+* Argument(s) : p_conn               Pointer to a TCP connection.
+*               -----               Argument validated in NetTCP_TxConnReTxQ_Timeout(),
+*                                                         NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+*               re_tx_q_timeout     Indicate whether the TCP connection re-transmit queue timed out :
+*
+*                                       DEF_NO                      TCP connection re-transmit queue did
+*                                                                       NOT time  out.
+*                                       DEF_YES                     TCP connection re-transmit queue
+*                                                                           timed out.
+*
+*               close_code      Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_CLOSE_NONE                 Perform NO  close actions.
+*                                   NET_TCP_CONN_CLOSE_ALL                  Perform ALL close actions.
+*
+*                                   NET_TCP_CONN_CLOSE_CONN_TX_RESET        Perform close connection transmit reset.
+*                                   NET_TCP_CONN_CLOSE_CONN_ALL             Perform ALL   connection close    actions.
+*
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE          Close    transmit idle                  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN     Close    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN      Close    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY       Close    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_RE_TX            Close re-transmit                       timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_ALL              Close ALL                               timers.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection re-transmit queue successfully handled.
+*                               NET_TCP_ERR_RE_TX_SEG_TH            TCP connection closed due to excessive retransmission.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_ERR_TX_BUF_LOCK                 Network buffer transmit lock still locked.
+*
+*                                                                   --- RETURNED BY NetTCP_TxConnReTxQ_TimeoutSet() : ----
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+*                                                                   -------- RETURNED BY NetTCP_TxPktHandler() : ---------
+*                                                                   ------------- RETURNED BY NetIP_ReTx() : -------------
+*                               NET_ERR_TX                          Transmit error.
+*                               NET_ERR_IF_LOOPBACK_DIS             Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN                Network  interface link state down (i.e.
+*                                                                       NOT available for receive or transmit).
+*
+*                                                                   -------- RETURNED BY NetTCP_TxPktHandler() : ---------
+*                               NET_TCP_ERR_TX_PKT                  TCP transmit packet error (see Note #11a).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnReTxQ_Timeout(),
+*               NetTCP_TxConnWinSizeHandlerCongCtrl().
+*
+* Note(s)     : (2) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : RETRANSMISSION TIMEOUT'
+*                   states that "for any state if the retransmission timeout expires on a segment in
+*                   the retransmission queue" :
+*
+*                       (A) RFC #1122, Section 4.2.3.1 reiterates that "retransmission of SYN segments
+*                           SHOULD use the same algorithm as data segments".
+*
+*                   (a) "Send the segment at the front of the retransmission queue."
+*
+*                           (A) RFC #2988, Section 5.4 reiterates that "when the retransmission timer
+*                               expires ... retransmit the earliest segment that has not been acknowledged
+*                               by the TCP receiver".
+*
+*                       (1) RFC #1122, Section 4.2.2.16 states that "a TCP receiver SHOULD NOT shrink the
+*                           window ... However, a sending TCP MUST be robust against window shrinking ...
+*                           If this happens, the sender SHOULD NOT send new data, but SHOULD retransmit
+*                           normally the old unacknowledged data between SND.UNA and SND.UNA+SND.WND.  The
+*                           sender MAY also retransmit old data beyond SND.UNA+SND.WND, but SHOULD NOT time
+*                           out the connection if data beyond the right window edge is not acknowledged".
+*
+*                           Therefore, ALL data segments previously transmitted & awaiting acknowledgement
+*                           in a TCP connections' re-transmit queue may be re-transmitted regardless of the
+*                           TCP connection's current transmit congestion control window size or the remote
+*                           host's receive window size.
+*
+*                       (2) (A) RFC #2581, Section 3.2 states that "the fast retransmit algorithm uses the
+*                               arrival of 3 duplicate ACKs ... as an indication that a segment has been
+*                               lost ... [and] performs a retransmission of what appears to be the missing
+*                               segment".
+*
+*                           (B) RFC #1122, Section 4.2.2.21 reiterates that "'fast retransmit' ... uses the
+*                               redundant ACK's to deduce that a segment has been lost ... If more than a
+*                               threshold number of such ACK's is received, then the segment containing the
+*                               octets starting at SEG.ACK is assumed to have been lost and is retransmitted".
+*
+*                   (b) "Reinitialize the retransmission timer."
+*
+*                       (1) RFC #2988, Section 5 states that "an implementation MUST manage the retransmission
+*                           timer(s) in such a way that a segment is never retransmitted too early, i.e. less
+*                           than one RTO after the previous transmission of that segment".
+*
+*                           (A) "The following is the RECOMMENDED algorithm for managing the retransmission
+*                                timer" :
+*
+*                               (1) "Every time a packet containing data is sent (including a retransmission),
+*                                    if the timer is not running, start it running so that it will expire after
+*                                    RTO seconds (for the current value of RTO)."
+*
+*                                    Therefore, the TCP connection re-transmit queue timer is reset whenever a
+*                                    segment is re-transmitted.
+*
+*                               (2) "When all outstanding data has been acknowledged, turn off the retransmission
+*                                    timer."
+*
+*                               (3) "When an ACK is received that acknowledges new data, restart the retransmission
+*                                    timer so that it will expire after RTO seconds (for the current value of RTO)."
+*
+*                           (B) "When the retransmission timer expires, do the following" :
+*
+*                               (5) "The host MUST set RTO <- RTO * 2 ('back off the timer')."
+*
+*                                    See also Note #2b2A1.
+*
+*                               (6) "Start the retransmission timer, such that it expires after RTO seconds
+*                                    (for the value of RTO after the doubling operation)."
+*
+*                       (2) (A) (1) RFC #1122, Section 4.2.3.1 reiterates that an "implementation MUST also
+*                                   include 'exponential backoff' for successive RTO values for the same
+*                                   segment".
+*
+*                                   (a) RFC #2988, Section 5.5 states that "when the retransmission timer
+*                                       expires ... the host MUST set RTO <- RTO * 2 ('back off the timer')".
+*
+*                                       Thus the TCP retransmission timer exponential back-off scalar
+*                                       value is 2.
+*
+*                                   (b) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2,
+*                                       Page 299 reiterates that "this doubling is called an 'exponential
+*                                       backoff'".
+*
+*                                   See also 'NetTCP_TxConnRTT_RTO_Calc()  Note #2b2'.
+*
+*                               (2) RFC #2988, Section 5 adds "that a TCP implementation MAY clear SRTT [TCP
+*                                   smoothed round-trip time] and RTTVAR [TCP round-trip time variance] after
+*                                   backing off the timer multiple times as it is likely that the current SRTT
+*                                   and RTTVAR are bogus in this situation.  Once SRTT and RTTVAR are cleared
+*                                   they should be initialized with the next RTT sample taken".
+*
+*                                   See also 'NetTCP_TxConnRTT_RTO_Calc()  Note #2a4A1'.
+*
+*                           (B) (1) (a) RFC #2581, Section 3.2 states that "after receiving 3 duplicate ACKs
+*                                       ... the fast retransmit algorithm ... performs a retransmission of
+*                                       what appears to be the missing segment, without waiting for the
+*                                       retransmission timer to expire".
+*
+*                                   (b) RFC #1122, Section 4.2.2.21 reiterates that with "'fast retransmit' ...
+*                                       the [lost] segment ... is retransmitted, without awaiting a timeout".
+*
+*                               (2) If a segment is re-transmitted due to the TCP fast re-transmit algorithm
+*                                   & NOT due to the TCP connection's re-transmit queue timer expiring, the
+*                                   TCP connection's re-transmit queue timer is :
+*
+*                                   (a) NOT backed-off because the re-transmit queue        See Note #2b2B1
+*                                           timer did NOT expire
+*                                   (b) Restarted with its current RTO value                See Note #2b1A1
+*
+*                           (C) A TCP connection's RTO timeout controls do NOT need to be explicitly reset
+*                               since RFC #2988, Section 5 states that "once a new RTT measurement is obtained
+*                               (which can only happen when new data has been sent and acknowledged), the
+*                               computations ... of RTO ... are performed ... which may result in 'collapsing'
+*                               RTO back down after it has been subject to exponential backoff".
+*
+*                               See also 'NetTCP_TxConnRTT_RTO_Calc()  Note #2a4B'.
+*
+*               (3) RFC #1122, Section 4.2.3.5 states that "excessive retransmission of the same segment
+*                   by TCP indicates some failure of the remote host or the Internet path ... The following
+*                   procedure MUST be used to handle excessive retransmissions of data segments" :
+*
+*                   (c) "When the number of transmissions of the same segment reaches a threshold ...
+*                        close the connection."
+*
+*                   See also 'NetTCP_RxPktConnHandlerReTxQ()  Note #7'.
+*
+*               (4) RFC #2988, Section 3 states that "TCP MUST use Karn's algorithm ... for taking RTT samples.
+*                   That is, RTT samples MUST NOT be made using segments that were retransmitted (and thus for
+*                   which it is ambiguous whether the reply was for the first instance of the packet or a later
+*                   instance)".
+*
+*                   (a) To ensure implementation of Karn's algorithm, while ANY re-transmitted segment(s)
+*                       remain unacknowledged in a TCP connection's re-transmit queue :
+*
+*                       (1) (A) NO RTT calculations are performed; ...                      See Note #4
+*
+*                           (B) The TCP connection's re-transmit timeout :
+*                               (1) MAY be backed-off ...                                   See Note  #2b1B5
+*                                     OR
+*                               (2) MAY be latched at a previously backed-off value;        See Notes #2b2B2 & #2b2C
+*                                     BUT
+*                               (3) MUST NOT be updated by RTT calculations.                See Note  #4a1A
+*
+*                       (2) Each time a TCP connection re-transmits a segment, the TCP connection advances
+*                           its un-re-transmitted sequence number to the TCP connection's next sequence
+*                           number to transmit.  This ensures that NO RTT or RTO calculations are performed
+*                           until ALL re-transmitted data is acknowledged & removed from the TCP connection's
+*                           re-transmit queue.
+*
+*               (5) RFC #2581, Section 3.1 states that "when a TCP sender detects segment loss using the
+*                   retransmission timer, the value of ssthresh [TCP transmit congestion control slow start
+*                   threshold] ... [and] cwnd [TCP transmit congestion control window] MUST be set".
+*
+*                   See also 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Notes #2c2A5a & #2c2A5b'.
+*
+*               (6) A TCP connection's delayed acknowledgement controls :
+*
+*                   (a) SHOULD be reset whenever a TCP connection re-transmits data segment(s) since
+*                           any re-transmit always transmits an accompanying acknowledgement;
+*                   (b) MAY    be reset whenever a TCP connection re-transmits a connection request
+*                           segment since NO delayed acknowledgement controls should be active.
+*
+*                   See also 'NetTCP_TxConnAckDlyReset()  Note #1'.
+*
+*               (7) RFC #1122, Section 4.2.2.15 states that "if a retransmitted packet is identical to the
+*                   original packet (which implies not only that the data boundaries have not changed, but
+*                   also that the window and acknowledgment fields of the header have not changed), then
+*                   the same IP Identification field MAY be used".
+*
+*                   In other words, if the following TCP segment header values are unchanged since the
+*                   last transmission of the TCP segment, then the TCP segment may be transmitted without
+*                   re-calculation of the TCP header :
+*
+*                       (a) Sequence        Number
+*                       (b) Acknowledgement Number
+*                       (c) Segment Length
+*                       (d) Window  Size
+*
+*               (8) (a) Some network interfaces require a minimum packet size & may also require that
+*                       packets smaller than the minimum packet size be appended with trailing pad
+*                       octets.  Therefore, all network transmit packets MUST be prepared to satisfy
+*                       a possible network interface minimum packet size requirement.
+*
+*                   (b) To ensure that TCP re-transmit segments will be properly prepared to satisfy
+*                       a network interface minimum packet size requirement, the following equations
+*                       are used to validate a TCP re-transmit segment size :
+*
+*                           (A) (1) TCP Re-transmit Segment Size  =  Segment's Re-transmit Protocol Header Sizes +
+*                                                                    Segment's Remaining   Segment  Data   Size
+*
+*                               (2)                               =  Segment's Previous    Protocol Header Sizes +
+*                                                                    Segment's Remaining   Segment  Data   Size
+*
+*                               (3)                               = (Segment's Previous    Total    Packet Size  -
+*                                                                    Segment's Previous             Data   Size) +
+*                                                                    Segment's Remaining   Segment  Data   Size
+*
+*                           (B) (1) TCP Re-transmit Minimum Segment Size         =  Network Interface Minimum Packet Size
+*
+*                               (2) [(Segment's          Total   Packet Size  -
+*                                     Segment's                  Data   Size) +
+*                                     Segment's Minimum  Segment Data   Size ]   =  Network Interface Minimum Packet Size
+*
+*                               (3)   Segment's Minimum  Segment Data   Size     =  Network Interface Minimum Packet Size  -
+*                                                                                  (Segment's         Total   Packet Size  -
+*                                                                                   Segment's                 Data   Size)
+*
+*                       (1) Equation #8bA2 subtly assumes that the TCP re-transmit segment's network
+*                           protocol header sizes equal the segment's previously transmitted network
+*                           protocol header sizes.  In other words, it is assumed that a TCP transmit
+*                           segment's network protocol header sizes will remain constant for the
+*                           segment's initial transmission & any subsequent retransmissions.
+*
+*                           This assumption is true if & only if the TCP segment is re-transmitted
+*                           with no changes in any of the segment's network protocol header sizes,
+*                           which typically vary only for changes in the network protocol header
+*                           types or in the number of network protocol header options.
+*
+*                           However, since TCP segments that have already been transmitted can
+*                           NOT modify their segment data (see 'NetTCP_TxConnAppData()  Note #10a'),
+*                           it seems reasonable that TCP segments that have already been transmitted
+*                           will NOT likely modify their network protocol header types & SHOULD NOT
+*                           modify their network protocol header options.
+*
+*                           Therefore, it seems reasonable that TCP segments that have already
+*                           been transmitted will NOT likely vary their network protocol header sizes.
+*                           Thus TCP segments may validate their re-transmit segment size versus any
+*                           possible network interface minimum packet size requirement based on their
+*                           previously transmitted network protocol header & packet sizes.
+*
+*                       (2) (A) Equation #8bB calculates a TCP re-transmit segment's minimum data size
+*                               as required by a possible network interface minimum packet size.  If
+*                               the TCP re-transmit segment's data size is smaller than the network
+*                               interface minimum packet size, the network buffer MUST be checked for
+*                               sufficient & available trailing octets, as required by the network
+*                               interface layer to append pad octets.
+*
+*                           (B) (1) (a) (1) If the TCP re-transmit segment's minimum data size is smaller
+*                                           than the required network interface minimum packet size ...
+*                                             AND
+*                                       (2) there is insufficient network buffer octets available for
+*                                           the network interface layer to append pad octets, ...
+*
+*                                   (b) then the TCP segment's remaining data octets MUST be moved to
+*                                       the network buffer's transmit index to provide sufficient
+*                                       network buffer data octets for the network interface layer to
+*                                       append pad octets.
+*
+*                               (2) A network interface that appends cleared trailing pad octets MAY be
+*                                   optimized to skip clearing the trailing pad octets if the network
+*                                   buffer's memory clear flag is set.  Since a partially-acknowledged
+*                                   TCP segment's network buffer contains previously acknowledged data
+*                                   octets, the network buffer's memory clear flag MUST be cleared to
+*                                   ensure that the network interface layer clears the trailing pad
+*                                   octets.
+*
+*               (9) If a packet buffer's unlink function is available, it is assumed that the function ...
+*
+*                   (a) Correctly unlinks the packet buffer from any other network protocol layers
+*                         AND
+*                   (b) Correctly updates the network buffer's reference counter to decrement the
+*                       number of network protocol layers that no longer maintain a reference to
+*                       the packet buffer.
+*                         AND
+*                   (c) Clears both the unlink function & object pointers.
+*
+*              (10) Increment network buffer's reference counter to include the TCP segment STILL enqueued
+*                   to the TCP connection's re-transmit queue as a reference to the network buffer.
+*
+*              (11) (a) Since segments enqueued to a TCP connection's transmit queue have already been
+*                       reported as transmitted to the application & since no mechanism exists for a TCP
+*                       connection to re-request previously transmitted data, any TCP connection whose
+*                       transmit queue(s) becomes corrupted MUST be closed to force the application layer
+*                       to abort &/or recover from the corrupted data.
+*
+*                   (b) For any internal errors where the TCP connection's transmit queue is NOT corrupted,
+*                       the TCP connection is NOT closed.
+*
+*                   See also 'NetTCP_TxConnAppData()  Note #10'
+*                          & 'NetTCP_TxConnTxQ()      Note #14'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnReTxQ (NET_TCP_CONN        *p_conn,
+                                  CPU_BOOLEAN          re_tx_q_timeout,
+                                  NET_TCP_CLOSE_CODE   close_code,
+                                  NET_ERR             *p_err)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR            src_addrv4;
+    NET_IPv4_ADDR            dest_addrv4;
+    NET_IPv4_TOS             TOS;
+    NET_IPv4_TTL             TTL;
+    NET_IPv4_FLAGS           flags_ipv4;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_ADDR            src_addrv6;
+    NET_IPv6_ADDR            dest_addrv6;
+    NET_IPv6_TRAFFIC_CLASS   traffic_class;
+    NET_IPv6_FLOW_LABEL      flow_label;
+    NET_IPv6_HOP_LIM         hop_lim;
+    NET_IPv6_FLAGS           flags_ipv6;
+#endif
+    NET_BUF                 *pseg;
+    NET_BUF_HDR             *pseg_hdr;
+    NET_BUF_FNCT             unlink_fnct;
+    NET_CONN_ID              conn_id;
+    NET_CONN                *p_net_conn;
+    NET_IF_NBR               if_nbr;
+    NET_TCP_PORT_NBR         src_port;
+    NET_TCP_PORT_NBR         dest_port;
+    NET_TCP_SEQ_NBR          seq_nbr;
+    NET_TCP_SEQ_NBR          ack_nbr;
+    NET_TCP_SEG_SIZE         seg_len;
+    NET_TCP_WIN_SIZE         win_size;
+    NET_BUF_SIZE             min_pkt_size;
+    NET_BUF_SIZE             seg_len_tot;
+    NET_BUF_SIZE             seg_len_hdr;
+    NET_BUF_SIZE             seg_len_data_min;
+    NET_BUF_SIZE             buf_size_max;
+    NET_BUF_SIZE             data_ix_cur;
+    NET_BUF_SIZE             data_ix_re_tx;
+    NET_BUF_SIZE             data_len_cur;
+    NET_TCP_FLAGS            flags_tcp;
+    CPU_INT08U              *pdata_re_tx;
+    CPU_BOOLEAN              seg_chngd;
+    CPU_BOOLEAN              seg_updated;
+    CPU_BOOLEAN              seg_data_moved;
+    CPU_BOOLEAN              tx_lock;
+    NET_PROTOCOL_TYPE        proto_type = NET_PROTOCOL_TYPE_NONE;
+    NET_ERR                  err;
+    NET_ERR                  err_rtn = NET_ERR_FAULT_UNKNOWN_ERR;
+
+
+                                                                /* ----------------- VALIDATE RE-TX Q ----------------- */
+    if (p_conn->ReTxQ_Head == DEF_NULL) {
+       *p_err = NET_TCP_ERR_NONE;
+        return;
+    }
+
+    pseg     =  p_conn->ReTxQ_Head;                             /* Re-tx seg @ head of re-tx Q (see Note #2a).          */
+    pseg_hdr = &pseg->Hdr;
+
+    pseg_hdr->TCP_SegReTxCtr++;
+    if (pseg_hdr->TCP_SegReTxCtr > p_conn->TxSegReTxTh) {       /* If nbr re-tx's > th, close TCP conn (see Note #3).   */
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )p_conn->ConnCloseAppFlag,
+                         (NET_TCP_CLOSE_CODE)close_code);
+       *p_err = NET_TCP_ERR_RE_TX_SEG_TH;
+        return;
+    }
+
+
+                                                                /* ----------------- UPDATE TCP CONN ------------------ */
+    if (re_tx_q_timeout != DEF_NO) {                            /* If           re-tx Q timeout,                  ...   */
+                                                                /* ... back-off re-tx Q timeout (see Note #2b1B5) ...   */
+        NetTCP_TxConnRTT_RTO_Calc(p_conn, NET_TCP_CONN_TX_RTO_BACKOFF, NET_TCP_TX_RTT_NONE, NET_TCP_TX_RTT_NONE);
+#if 0                                                           /* Implemented with backoff     (see Note #2b2A2).      */
+                                                                /* ... & reset RTT ctrls        (see Note #2b2A2).      */
+        NetTCP_TxConnRTT_RTO_Calc(p_conn, NET_TCP_CONN_TX_RTT_RESET,   NET_TCP_TX_RTT_NONE, NET_TCP_TX_RTT_NONE);
+#endif
+    }
+                                                                /* Update re-tx Q tmr (see Note #2b1A1).                */
+    NetTCP_TxConnReTxQ_TimeoutSet(p_conn, re_tx_q_timeout, close_code, p_err);
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+                                                                /* Adv   un-re-tx'd seq(s) to ...                       */
+    p_conn->TxSeqNbrUnReTxd = p_conn->TxSeqNbrNext;             /* ... not-yet-tx'd seq(s) [see Note #4a2].             */
+
+
+    if (re_tx_q_timeout != DEF_NO) {                            /* If re-tx Q timeout, ...                              */
+                                                                /* ... update tx cong win  (see Note #5).               */
+        NetTCP_TxConnWinSizeHandlerCongCtrl((NET_TCP_CONN   *) p_conn,
+                                            (NET_BUF_HDR    *) 0,
+                                            (NET_TCP_ACK_CODE) NET_TCP_CONN_RX_ACK_NONE,
+                                            (NET_TCP_WIN_SIZE) 0u,
+                                            (NET_TCP_WIN_CODE) NET_TCP_CONN_TX_WIN_TIMEOUT,
+                                            (NET_ERR        *)&err);
+       (void)&err;                                              /* Ignore err(s).                                       */
+    }
+
+    NetTCP_TxConnAckDlyReset(p_conn, DEF_YES);                  /* Reset ack dly ctrls (see Note #6).                   */
+
+                                                                /* ------------- CHK RE-TX SEG'S TX LOCK -------------- */
+    tx_lock = DEF_BIT_IS_SET(pseg_hdr->Flags, NET_BUF_FLAG_TX_LOCK);
+    if (tx_lock != DEF_NO) {                                    /* If buf tx locked, CANNOT cur'ly re-tx seg.           */
+       *p_err = NET_ERR_TX_BUF_LOCK;
+        return;
+    }
+
+                                                                /* -------------- PREPARE TCP RE-TX SEG --------------- */
+                                                                /* Prepare TCP seq nbrs.                                */
+    seq_nbr     = pseg_hdr->TCP_SeqNbr;
+    ack_nbr     = p_conn->RxSeqNbrNext;
+
+    seg_len     = pseg_hdr->TCP_SegLen;
+                                                                /* Prepare TCP win size.                                */
+    win_size    = p_conn->RxWinSizeActual;
+
+                                                                /* Chk for re-tx seg update (see Note #7).              */
+    seg_updated = ((pseg_hdr->TCP_SeqNbrLast  != seq_nbr ) ||
+                   (pseg_hdr->TCP_AckNbrLast  != ack_nbr ) ||
+                   (pseg_hdr->TCP_SegLenLast  != seg_len ) ||
+                   (pseg_hdr->TCP_WinSizeLast != win_size)) ? DEF_YES : DEF_NO;
+
+
+    seg_data_moved =  DEF_NO;
+    seg_len_tot    = (NET_BUF_SIZE)pseg_hdr->TotLen        -    /* Seg cur tot len = prev'ly tx'd/ack'd pkt tot  len    */
+                     (NET_BUF_SIZE)pseg_hdr->DataLen       +    /* ...               prev'ly tx'd/ack'd pkt data len +  */
+                     (NET_BUF_SIZE)pseg_hdr->TCP_SegLenData;    /* ...               rem'ing            seg data len    */
+                                                                /* ... (see Note #8bA).                                 */
+
+    conn_id = p_conn->ID_Conn;
+    if_nbr  = NetConn_IF_NbrGet(conn_id, &err);
+    if ( err != NET_CONN_ERR_NONE) {
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )DEF_YES,
+                         (NET_TCP_CLOSE_CODE)close_code);
+       *p_err  = NET_TCP_ERR_CONN_FAULT;
+        return;
+    }
+
+    min_pkt_size = NetIF_GetPktSizeMin(if_nbr, &err);
+    if (err != NET_IF_ERR_NONE) {
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )DEF_YES,
+                         (NET_TCP_CLOSE_CODE)close_code);
+       *p_err = NET_TCP_ERR_CONN_FAULT;
+        return;
+    }
+
+    if (seg_len_tot < min_pkt_size) {                           /* If TCP re-tx seg tot len                         ... */
+                                                                /* ...    < min IF pkt size (see Note #8b2B1a2),    ... */
+                                                                /* ... calc min IF seg data len (see Note #8bB);    ... */
+        seg_len_hdr      = pseg_hdr->TotLen - pseg_hdr->DataLen;
+        seg_len_data_min = min_pkt_size     - seg_len_hdr;
+
+        buf_size_max     = NetBuf_GetMaxSize((NET_IF_NBR     )if_nbr,
+                                             (NET_TRANSACTION)NET_TRANSACTION_TX,
+                                             (NET_BUF       *)pseg,
+                                             (NET_BUF_SIZE   )pseg_hdr->DataIx);
+
+        if (seg_len_data_min > buf_size_max) {                  /* ... & if min IF seg data len                     ... */
+                                                                /* ...    > max buf size       (see Note #8b2B1a2), ... */
+            data_ix_cur   = (NET_BUF_SIZE) pseg_hdr->DataIx;
+
+#if 0
+            data_ix_re_tx = (NET_BUF_SIZE) NET_BUF_DATA_IX_TX;
+#else
+    p_net_conn = &NetConn_Tbl[conn_id];
+
+    switch (p_net_conn->Family) {
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+             proto_type = NET_PROTOCOL_TYPE_TCP_V4;
+             break;
+
+
+        case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+             proto_type = NET_PROTOCOL_TYPE_TCP_V6;
+             break;
+
+    }
+
+    data_ix_re_tx = 0u;
+
+    NetTCP_GetTxDataIx(if_nbr,
+                       proto_type,
+                       0u,
+                       pseg_hdr->DataLen,
+                       p_conn,
+                      &data_ix_re_tx,
+                       p_err);
+#endif
+            data_len_cur  = (NET_BUF_SIZE) pseg_hdr->TCP_SegLenData;
+            pdata_re_tx   = (CPU_INT08U *)&pseg->DataPtr[data_ix_re_tx];
+
+            NetBuf_DataRd((NET_BUF    *) pseg,                  /* ... rd rem'ing TCP seg data                      ... */
+                          (NET_BUF_SIZE) data_ix_cur,
+                          (NET_BUF_SIZE) data_len_cur,
+                          (CPU_INT08U *) pdata_re_tx,           /* ... & move to base re-tx ix (see Note #8b2B1b).      */
+                          (NET_ERR    *)&err);
+            if (err != NET_BUF_ERR_NONE) {                      /* See Note #11a.                                       */
+                NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                                 (NET_BUF_HDR      *)0,
+                                 (CPU_BOOLEAN       )DEF_YES,
+                                 (NET_TCP_CLOSE_CODE)close_code);
+               *p_err = NET_TCP_ERR_CONN_FAULT;
+                return;
+            }
+
+            DEF_BIT_CLR(pseg_hdr->Flags, NET_BUF_FLAG_CLR_MEM); /* MUST clr buf mem clr flag (see Note #8b2B2).         */
+
+            seg_data_moved = DEF_YES;
+        }
+    }
+
+
+    seg_chngd = ((seg_updated    != DEF_NO) ||
+                 (seg_data_moved != DEF_NO)) ? DEF_YES : DEF_NO;
+
+
+    if (seg_chngd != DEF_NO) {                                  /* If chng'd, prepare seg for re-tx (see Note #1c2).    */
+                                                                /* Prepare TCP seg addrs.                               */
+        if (DEF_BIT_IS_CLR(pseg_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+            src_addrv4  = (NET_IPv4_ADDR   )pseg_hdr->IP_AddrSrc;
+            dest_addrv4 = (NET_IPv4_ADDR   )pseg_hdr->IP_AddrDest;
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            src_addrv6  = pseg_hdr->IPv6_AddrSrc;
+            dest_addrv6 = pseg_hdr->IPv6_AddrDest;
+#endif
+        }
+
+        src_port  = (NET_TCP_PORT_NBR)pseg_hdr->TransportPortSrc;
+        dest_port = (NET_TCP_PORT_NBR)pseg_hdr->TransportPortDest;
+
+                                                                /* Prepare TCP tx flags.                                */
+        flags_tcp =  pseg_hdr->TCP_Flags;
+
+                                                                /* Prepare IP params.                                   */
+        if (DEF_BIT_IS_CLR(pseg_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+            NetConn_IPv4TxParamsGet(conn_id, &flags_ipv4, &TOS, &TTL, &err);
+            if ( err != NET_CONN_ERR_NONE) {
+                NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                                 (NET_BUF_HDR      *)0,
+                                 (CPU_BOOLEAN       )DEF_YES,
+                                 (NET_TCP_CLOSE_CODE)close_code);
+               *p_err  = NET_TCP_ERR_CONN_FAULT;
+                return;
+            }
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+            NetConn_IPv6TxParamsGet(conn_id, &traffic_class, &flow_label, &hop_lim, &flags_ipv6, &err);
+            if ( err != NET_CONN_ERR_NONE) {
+                NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                                 (NET_BUF_HDR      *)0,
+                                 (CPU_BOOLEAN       )DEF_YES,
+                                 (NET_TCP_CLOSE_CODE)close_code);
+               *p_err  = NET_TCP_ERR_CONN_FAULT;
+                return;
+            }
+#endif
+        }
+
+                                                                /* Update re-tx seg's last tx ctrls (see Note #1c2F).   */
+        pseg_hdr->TCP_SeqNbrLast  = seq_nbr;
+        pseg_hdr->TCP_AckNbrLast  = ack_nbr;
+        pseg_hdr->TCP_SegLenLast  = seg_len;
+        pseg_hdr->TCP_WinSizeLast = win_size;
+
+                                                                /* Reset protocol & tot len for re-tx.                  */
+        pseg_hdr->TotLen          = pseg_hdr->DataLen;
+    }
+
+
+
+    unlink_fnct = pseg_hdr->UnlinkFnctPtr;
+    if (unlink_fnct != (NET_BUF_FNCT)0) {                       /* If unlink fnct avail, ..                             */
+        unlink_fnct(pseg);                                      /* .. unlink seg from other layer(s) [see Note #9].     */
+    }
+
+    if (pseg_hdr->RefCtr <= 1) {
+        pseg_hdr->RefCtr++;                                     /* TCP STILL maintains ref to seg    (see Note #10).    */
+    }
+
+
+
+                                                                /* ---------------- RE-TX TCP CONN SEG ---------------- */
+
+    if (DEF_BIT_IS_CLR(pseg_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+        pseg_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_TCP_V4;
+        pseg_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_TCP_V4;
+
+        if (seg_chngd == DEF_NO) {                              /* If unchng'd,                               ...       */
+            NetIPv4_ReTx((NET_BUF *) pseg,                      /* ...      re-tx unchng'd seg (see Note #7); ...       */
+                         (NET_ERR *)&err_rtn);
+
+        } else {                                                /* ... else re-tx updated  seg.                         */
+            NetTCP_TxPktHandlerIPv4((NET_BUF        *) pseg,
+                                    (NET_IPv4_ADDR   ) src_addrv4,
+                                    (NET_TCP_PORT_NBR) src_port,
+                                    (NET_IPv4_ADDR   ) dest_addrv4,
+                                    (NET_TCP_PORT_NBR) dest_port,
+                                    (NET_TCP_SEQ_NBR ) seq_nbr,
+                                    (NET_TCP_SEQ_NBR ) ack_nbr,
+                                    (NET_TCP_WIN_SIZE) win_size,
+                                    (NET_IPv4_TOS    ) TOS,
+                                    (NET_IPv4_TTL    ) TTL,
+                                    (NET_TCP_FLAGS   ) flags_tcp,
+                                    (NET_IPv4_FLAGS  ) flags_ipv4,
+                                    (void           *) 0,
+                                    (void           *) 0,
+                                    (NET_ERR        *)&err_rtn);
+        }
+#endif
+
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        pseg_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_TCP_V6;
+        pseg_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_TCP_V6;
+        if (seg_chngd == DEF_NO) {                              /* If unchng'd,                               ...       */
+            NetIPv6_ReTx((NET_BUF *) pseg,                      /* ...      re-tx unchng'd seg (see Note #7); ...       */
+                         (NET_ERR *)&err_rtn);
+
+        } else {                                                /* ... else re-tx updated  seg.                         */
+            NetTCP_TxPktHandlerIPv6((NET_BUF              *) pseg,
+                                    (NET_IPv6_ADDR        *)&src_addrv6,
+                                    (NET_TCP_PORT_NBR      ) src_port,
+                                    (NET_IPv6_ADDR        *)&dest_addrv6,
+                                    (NET_TCP_PORT_NBR      ) dest_port,
+                                    (NET_TCP_SEQ_NBR       ) seq_nbr,
+                                    (NET_TCP_SEQ_NBR       ) ack_nbr,
+                                    (NET_TCP_WIN_SIZE      ) win_size,
+                                    (NET_IPv6_TRAFFIC_CLASS) traffic_class,
+                                    (NET_IPv6_FLOW_LABEL   ) flow_label,
+                                    (NET_IPv6_HOP_LIM      ) hop_lim,
+                                    (CPU_INT16U            ) flags_tcp,
+                                    (void                 *) 0,
+                                    (NET_ERR              *)&err_rtn);
+        }
+#endif
+    }
+
+    switch (err_rtn) {
+        case NET_TCP_ERR_NONE:
+        case NET_IPv4_ERR_NONE:
+        case NET_IPv6_ERR_NONE:
+             err_rtn = NET_TCP_ERR_NONE;
+             break;
+
+
+        case NET_ERR_TX:                                        /* Ignore transitory tx err(s).                         */
+        case NET_ERR_IF_LINK_DOWN:
+             break;
+
+
+        case NET_TCP_ERR_TX_PKT:                                /* See Note #11a.                                       */
+        case NET_ERR_IF_LOOPBACK_DIS:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )p_conn->ConnCloseAppFlag,
+                              (NET_TCP_CLOSE_CODE)close_code);
+            *p_err = err_rtn;
+             return;
+    }
+
+    NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegConnReTxQ_Ctr);
+
+
+
+   *p_err = err_rtn;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_TxConnReTxQ_Timeout()
+*
+* Description : (1) (a) Handle TCP connection re-transmit queue timeout ... :
+*
+*                       (1) Clear  TCP connection's re-transmit timer                   See Notes #4a1A & #4a2
+*                       (2) Handle TCP connection   re-transmit                         See Note  #2
+*
+*                   (b) (1) ... unconditionally for the following synchronization states :
+*
+*                           (A) SYN-RECEIVED
+*                           (B) SYN-SENT
+*
+*                       (2) ... but for the following connected states only when the TCP connection
+*                               transmit queue is NOT closed  :
+*
+*                           (A) ESTABLISHED
+*                           (B) FIN-WAIT-1
+*                           (C) CLOSING
+*                           (D) CLOSE-WAIT
+*                           (E) LAST-ACK
+*
+*
+* Argument(s) : p_conn_timeout       Pointer to TCP connection to perform re-transmit (see Note #3b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetTCP_TxConnReTxQ_TimeoutSet().
+*
+* Note(s)     : (2) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : RETRANSMISSION TIMEOUT'
+*                   states that "if the retransmission timeout expires ... send the segment at the
+*                   front of the retransmission queue ... [and] reinitialize the retransmission timer".
+*
+*                   See also 'NetTCP_TxConnReTxQ()  Note #2'.
+*
+*               (3) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_TCP_CONN' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (4) This function is a network timer callback function :
+*
+*                   (a) (1) For the following connection timer(s) ... :
+*
+*                           (A) TCP connection re-transmit queue timer ('ReTxQ_Tmr')
+*
+*                       (2) (A) Clear the timer pointer ... :
+*                               (1) Cleared prior to next handler function(s); ...
+*                               (2) Cleared prior to invalid state fault exit.
+*
+*                           (B) but do NOT re-free the timer.
+*
+*                   (b) Do NOT set the following close timer flag(s) :
+*
+*                       (1) NET_TCP_CONN_CLOSE_TMR_RE_TX
+*
+*               (5) Certain network connections MUST periodically suspend network transmit(s) to handle
+*                   network receive packet(s).  To protect TCP connections from transmit corruption while
+*                   suspended, ALL TCP data transmits & TCP transmit queue handling MUST be blocked for
+*                   suspended connections until the connection is no longer suspended.
+*
+*                   However, handling the TCP connection's re-transmit timeout is permitted since NO new
+*                   TCP data is prepared from the TCP connection's transmit queue (see Note #1a).
+*
+*                   See also 'NetTCP_TxConnTxQ()                    Note #12b2A2',
+*                            'NetTCP_TxConnTxQ_TimeoutIdle()        Note #5',
+*                            'NetTCP_TxConnTxQ_TimeoutSillyWin()    Note #5',
+*                          & 'NetTCP_TxConnWinSizeZeroWinTimeout()  Note #5'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnReTxQ_Timeout (void  *p_conn_timeout)
+{
+    NET_TCP_CONN        *p_conn;
+    NET_TCP_CLOSE_CODE   close_code;
+    NET_ERR              err;
+
+
+    p_conn      = (NET_TCP_CONN *)p_conn_timeout;               /* See Note #3b2A.                                      */
+
+    close_code =  NET_TCP_CONN_CLOSE_ALL;
+    DEF_BIT_CLR(close_code, NET_TCP_CONN_CLOSE_TMR_RE_TX);      /* See Note #4b1.                                       */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE TCP CONN ----------------- */
+    if (p_conn == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NullPtrCtr);
+        return;
+    }
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             p_conn->ReTxQ_Tmr = DEF_NULL;                      /* See Note #4a2A2.                                     */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_SYNC_RXD:                       /* See Note #1b1.                                       */
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                      p_conn->ReTxQ_Tmr = DEF_NULL;             /* See Note #4a2A2.                                     */
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #1b2.                                       */
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             switch (p_conn->TxQ_State) {
+                 case NET_TCP_TX_Q_STATE_CONN:
+                 case NET_TCP_TX_Q_STATE_SUSPEND:               /* See Note #5.                                         */
+                 case NET_TCP_TX_Q_STATE_CLOSING:
+                 case NET_TCP_TX_Q_STATE_CLOSING_SUSPEND:
+                      break;
+
+
+                 case NET_TCP_TX_Q_STATE_NONE:
+                 case NET_TCP_TX_Q_STATE_CLOSED:
+                 case NET_TCP_TX_Q_STATE_CLOSED_SUSPEND:
+                 default:
+                      p_conn->ReTxQ_Tmr = DEF_NULL;             /* See Note #4a2A2.                                     */
+                      return;
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)close_code);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+             return;
+    }
+#endif
+
+
+                                                                /* --------- HANDLE TCP CONN RE-TX Q TIMEOUT ---------- */
+    p_conn->ReTxQ_Tmr = DEF_NULL;                               /* Clr    re-tx Q tmr (see Note #4a2A1).                */
+
+    NetTCP_TxConnReTxQ(p_conn, DEF_YES, close_code, &err);      /* Handle re-tx Q     (see Note #2).                    */
+   (void)&err;                                                  /* Ignore ALL re-tx err(s), transitory or fatal.        */
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_TxConnReTxQ_TimeoutSet()
+*
+* Description : (1) (a) Set TCP connection's re-transmit queue timer for the following synchronization/
+*                       connected states :
+*
+*                       (1) CLOSED
+*                       (2) LISTEN
+*                       (3) SYN-RECEIVED
+*                       (4) SYN-SENT
+*                       (5) ESTABLISHED
+*                       (6) FIN-WAIT-1
+*                       (7) CLOSING
+*                       (8) CLOSE-WAIT
+*                       (9) LAST-ACK
+*
+*                           (A) (1) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : RETRANSMISSION
+*                               TIMEOUT' reiterates that "for any state if the retransmission timeout expires
+*                               on a segment in the retransmission queue ... reinitialize the retransmission
+*                               timer".
+*
+*                   (b) However, since a TCP connection's transmit & re-transmit queue SHOULD be closed for
+*                       the following states, it does NOT seem reasonable to set or reset a TCP connection's
+*                       re-transmit queue timer for these states :
+*
+*                       (1) FIN-WAIT-2
+*                       (2) TIME-WAIT
+*
+*
+* Argument(s) : p_conn               Pointer to a TCP connection.
+*               -----               Argument validated in NetTCP_TxConnSync(),
+*                                                         NetTCP_TxConnTxQ(),
+*                                                         NetTCP_TxConnReTxQ(),
+*                                                         NetTCP_RxPktConnHandlerReTxQ().
+*
+*               re_tx_q_timeout     Indicate whether the TCP connection re-transmit queue timed out :
+*
+*                                       DEF_NO                      TCP connection re-transmit queue did
+*                                                                       NOT time  out.
+*                                       DEF_YES                     TCP connection re-transmit queue
+*                                                                           timed out.
+*
+*               close_code      Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_CLOSE_NONE                 Perform NO  close actions.
+*                                   NET_TCP_CONN_CLOSE_ALL                  Perform ALL close actions.
+*
+*                                   NET_TCP_CONN_CLOSE_CONN_TX_RESET        Perform close connection transmit reset.
+*                                   NET_TCP_CONN_CLOSE_CONN_ALL             Perform ALL   connection close    actions.
+*
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE          Close    transmit idle                  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN     Close    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN      Close    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY       Close    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_RE_TX            Close re-transmit                       timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_ALL              Close ALL                               timers.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                    TCP connection re-transmit queue timer
+*                                                                       successfully set.
+*                               NET_TCP_ERR_CONN_NOT_USED           TCP connection NOT currently used.
+*                               NET_TCP_ERR_CONN_FAULT              TCP connection fault; connection(s) aborted.
+*                               NET_TCP_ERR_INVALID_CONN_STATE      Invalid TCP connection state.
+*                               NET_TCP_ERR_INVALID_CONN_OP         Invalid TCP connection operation.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnSync(),
+*               NetTCP_TxConnTxQ(),
+*               NetTCP_TxConnReTxQ(),
+*               NetTCP_RxPktConnHandlerReTxQ().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnReTxQ_TimeoutSet (NET_TCP_CONN        *p_conn,
+                                             CPU_BOOLEAN          re_tx_q_timeout,
+                                             NET_TCP_CLOSE_CODE   close_code,
+                                             NET_ERR             *p_err)
+{
+    NET_TMR_TICK  timeout_tick;
+    NET_ERR       err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------- VALIDATE TCP CONN STATE -------------- */
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+            *p_err = NET_TCP_ERR_CONN_NOT_USED;
+             return;
+
+
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:                     /* See Note #1b.                                        */
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_OP;
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:                         /* See Note #1a.                                        */
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)close_code);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+            *p_err = NET_TCP_ERR_INVALID_CONN_STATE;
+             return;
+    }
+#endif
+
+
+                                                                /* ------------- SET TCP CONN RE-TX Q TMR ------------- */
+    timeout_tick = p_conn->TxRTT_RTO_tick;
+
+    if ((p_conn->ReTxQ_Tmr != DEF_NULL) &&                      /* If re-tx Q tmr avail  ..                             */
+        (re_tx_q_timeout  ==  DEF_NO)) {                        /* .. but NOT timed out, ..                             */
+        NetTmr_Set((NET_TMR    *) p_conn->ReTxQ_Tmr,            /* .. reset re-tx Q tmr.                                */
+                   (CPU_FNCT_PTR)&NetTCP_TxConnReTxQ_Timeout,
+                   (NET_TMR_TICK) timeout_tick,
+                   (NET_ERR    *)&err);
+    } else {                                                    /* Else get re-tx Q tmr.                                */
+        p_conn->ReTxQ_Tmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_TxConnReTxQ_Timeout,
+                                      (void        *) p_conn,
+                                      (NET_TMR_TICK ) timeout_tick,
+                                      (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                      (NET_ERR     *)&err);
+    }
+
+    if (err != NET_TMR_ERR_NONE) {
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )p_conn->ConnCloseAppFlag,
+                         (NET_TCP_CLOSE_CODE)close_code);
+       *p_err = NET_TCP_ERR_CONN_FAULT;
+        return;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetTCP_TxConnPrepareSegAddrs()
+*
+* Description : Prepare TCP transmit segment addresses from TCP connection addresses.
+*
+* Argument(s) : p_conn           Pointer to a TCP connection.
+*               -----           Argument validated in NetTCP_TxConnAppData();
+*                                        checked   in NetTCP_TxConnSync(),
+*                                                     NetTCP_TxConnClose(),
+*                                                     NetTCP_TxConnAck(),
+*                                                     NetTCP_TxConnReset(),
+*                                                     NetTCP_TxConnProbe().
+*
+*               p_src_addr       Pointer to  variable buffer that will receive the return source      address
+*               ---------           (see Note #1), if NO error(s).
+*
+*                               Argument validated in NetTCP_TxConnAppData(),
+*                                                     NetTCP_TxConnSync(),
+*                                                     NetTCP_TxConnClose(),
+*                                                     NetTCP_TxConnAck(),
+*                                                     NetTCP_TxConnReset(),
+*                                                     NetTCP_TxConnProbe().
+*
+*               p_src_port       Pointer to  variable buffer that will receive the return source      port number
+*               ---------           (see Note #1), if NO error(s).
+*
+*                               Argument validated in NetTCP_TxConnAppData(),
+*                                                     NetTCP_TxConnSync(),
+*                                                     NetTCP_TxConnClose(),
+*                                                     NetTCP_TxConnAck(),
+*                                                     NetTCP_TxConnReset(),
+*                                                     NetTCP_TxConnProbe().
+*
+*               src_addr_len    Size of the variable buffer that will receive the return source      address.
+*
+*               src_port_len    Size of the variable buffer that will receive the return source      port number.
+*
+*               p_dest_addr      Pointer to  variable buffer that will receive the return destination address
+*               ----------          (see Note #1), if NO error(s).
+*
+*                               Argument validated in NetTCP_TxConnAppData(),
+*                                                     NetTCP_TxConnSync(),
+*                                                     NetTCP_TxConnClose(),
+*                                                     NetTCP_TxConnAck(),
+*                                                     NetTCP_TxConnReset(),
+*                                                     NetTCP_TxConnProbe().
+*
+*               p_dest_port      Pointer to  variable buffer that will receive the return destination port number
+*               ----------          (see Note #1), if NO error(s).
+*
+*                               Argument validated in NetTCP_TxConnAppData(),
+*                                                     NetTCP_TxConnSync(),
+*                                                     NetTCP_TxConnClose(),
+*                                                     NetTCP_TxConnAck(),
+*                                                     NetTCP_TxConnReset(),
+*                                                     NetTCP_TxConnProbe().
+*
+*               dest_addr_len   Size of the variable buffer that will receive the return destination address.
+*
+*               dest_port_len   Size of the variable buffer that will receive the return destination port number.
+*
+*               p_err            Pointer to variable that will receive the return error code from this function :
+*
+*                                   NET_TCP_ERR_NONE                TCP connection addresses successfully
+*                                                                       prepared.
+*
+*                                   NET_CONN_ERR_INVALID_FAMILY     Invalid     connection family.
+*                                   NET_CONN_ERR_INVALID_ADDR       Invalid TCP connection address.
+*                                   NET_CONN_ERR_INVALID_ADDR_LEN   Invalid TCP connection address length.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnAppData(),
+*               NetTCP_TxConnSync(),
+*               NetTCP_TxConnClose(),
+*               NetTCP_TxConnAck(),
+*               NetTCP_TxConnReset(),
+*               NetTCP_TxConnProbe().
+*
+* Note(s)     : (1) Variable buffers to receive the returned port & address values may start on any CPU address,
+*                   word-aligned or not.
+*
+*                   See also 'net_util.h  NETWORK DATA VALUE MACRO'S  Note #2b'.
+*
+*               (2) The 'NET_CONN_CFG_FAMILY' pre-processor 'else'-conditional code will never be compiled/linked
+*                   since 'net_conn.h' ensures that the family type configuration constant (NET_CONN_CFG_FAMILY)
+*                   is configured with an appropriate family type value (see 'net_conn.h  CONFIGURATION ERRORS').
+*                   The 'else'-conditional code is included for completeness & as an extra precaution in case
+*                   'net_conn.h' is incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnPrepareSegAddrs (NET_TCP_CONN  *p_conn,
+                                            CPU_INT08U    *p_src_addr,
+                                            CPU_INT08U    *p_src_port,
+                                            CPU_INT16U     src_addr_len,
+                                            CPU_INT16U     src_port_len,
+                                            CPU_INT08U    *p_dest_addr,
+                                            CPU_INT08U    *p_dest_port,
+                                            CPU_INT16U     dest_addr_len,
+                                            CPU_INT16U     dest_port_len,
+                                            NET_ERR       *p_err)
+{
+    NET_CONN_ID         conn_id;
+    NET_CONN           *p_net_conn;
+    NET_CONN_ADDR_LEN   addr_len;
+    CPU_INT08U          addr_local[NET_CONN_ADDR_LEN_MAX];
+    CPU_INT08U          addr_remote[NET_CONN_ADDR_LEN_MAX];
+    NET_ERR             err;
+
+
+    conn_id    =  p_conn->ID_Conn;
+    p_net_conn = &NetConn_Tbl[conn_id];
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ---------------- VALIDATE ADDR LENS ---------------- */
+    if (p_net_conn->Family == NET_CONN_FAMILY_IP_V4_SOCK) {
+#ifdef  NET_IPv4_MODULE_EN
+        if (src_addr_len  != NET_CONN_ADDR_IP_V4_LEN_ADDR) {
+           *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+            return;
+        }
+        if (src_port_len  != NET_CONN_ADDR_IP_LEN_PORT) {
+           *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+            return;
+        }
+
+        if (dest_addr_len != NET_CONN_ADDR_IP_V4_LEN_ADDR) {
+           *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+            return;
+        }
+        if (dest_port_len != NET_CONN_ADDR_IP_LEN_PORT) {
+           *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+            return;
+        }
+#endif
+    } else if (p_net_conn->Family == NET_CONN_FAMILY_IP_V6_SOCK) {
+#ifdef  NET_IPv6_MODULE_EN
+        if (src_addr_len  != NET_CONN_ADDR_IP_V6_LEN_ADDR) {
+           *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+            return;
+        }
+        if (src_port_len  != NET_CONN_ADDR_IP_LEN_PORT) {
+           *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+            return;
+        }
+
+        if (dest_addr_len != NET_CONN_ADDR_IP_V6_LEN_ADDR) {
+           *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+            return;
+        }
+        if (dest_port_len != NET_CONN_ADDR_IP_LEN_PORT) {
+           *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+            return;
+        }
+#endif
+    } else {
+
+                                                                /* See Note #2.                                         */
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )DEF_YES,
+                         (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+       *p_err = NET_CONN_ERR_INVALID_FAMILY;
+        return;
+    }
+
+#else                                                           /* Prevent 'variable unused' compiler warnings.         */
+   (void)&src_addr_len;
+   (void)&src_port_len;
+   (void)&dest_addr_len;
+   (void)&dest_port_len;
+#endif
+
+
+                                                                /* ------------------ PREPARE ADDRS ------------------- */
+    conn_id  = p_conn->ID_Conn;
+
+    addr_len = sizeof(addr_local);
+    NetConn_AddrLocalGet((NET_CONN_ID        ) conn_id,         /* Get local/src addr.                                  */
+                         (CPU_INT08U        *)&addr_local[0],
+                         (NET_CONN_ADDR_LEN *)&addr_len,
+                         (NET_ERR           *)&err);
+    if ( err != NET_CONN_ERR_NONE) {
+       *p_err  = NET_CONN_ERR_INVALID_ADDR;
+        return;
+    }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (addr_len > NET_CONN_ADDR_LEN_MAX) {
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )DEF_YES,
+                         (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+       *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+#endif
+
+    addr_len = sizeof(addr_remote);
+    NetConn_AddrRemoteGet((NET_CONN_ID        ) conn_id,        /* Get remote/dest addr.                                */
+                          (CPU_INT08U        *)&addr_remote[0],
+                          (NET_CONN_ADDR_LEN *)&addr_len,
+                          (NET_ERR           *)&err);
+    if ( err != NET_CONN_ERR_NONE) {
+       *p_err  = NET_CONN_ERR_INVALID_ADDR;
+        return;
+    }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (addr_len > NET_CONN_ADDR_LEN_MAX) {
+        NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                         (NET_BUF_HDR      *)0,
+                         (CPU_BOOLEAN       )DEF_YES,
+                         (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+       *p_err = NET_CONN_ERR_INVALID_ADDR_LEN;
+        return;
+    }
+#endif
+
+
+                                                                /* Prepare src/dest addrs (see Note #1).                */
+    switch (p_net_conn->Family) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_CONN_FAMILY_IP_V4_SOCK:
+                                                                /* Cfg local  addr as pkt src  addr.                    */
+             NET_UTIL_VAL_COPY_GET_NET_16(p_src_port,  &addr_local [NET_CONN_ADDR_IP_IX_PORT]);
+             NET_UTIL_VAL_COPY_GET_NET_32(p_src_addr,  &addr_local [NET_CONN_ADDR_IP_V4_IX_ADDR]);
+                                                                /* Cfg remote addr as pkt dest addr.                    */
+             NET_UTIL_VAL_COPY_GET_NET_16(p_dest_port, &addr_remote[NET_CONN_ADDR_IP_IX_PORT]);
+             NET_UTIL_VAL_COPY_GET_NET_32(p_dest_addr, &addr_remote[NET_CONN_ADDR_IP_V4_IX_ADDR]);
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_CONN_FAMILY_IP_V6_SOCK:
+             NET_UTIL_VAL_COPY_GET_NET_16(p_src_port,  &addr_local [NET_CONN_ADDR_IP_IX_PORT]);
+             Mem_Copy(p_src_addr, &addr_local [NET_CONN_ADDR_IP_V6_IX_ADDR], src_addr_len);
+                                                                /* Cfg remote addr as pkt dest addr.                    */
+             NET_UTIL_VAL_COPY_GET_NET_16(p_dest_port, &addr_remote[NET_CONN_ADDR_IP_IX_PORT]);
+             Mem_Copy(p_dest_addr, &addr_remote [NET_CONN_ADDR_IP_V6_IX_ADDR], dest_addr_len);
+             break;
+#endif
+        default:
+                                                                /* See Note #2.                                         */
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)NET_TCP_CONN_CLOSE_ALL);
+            *p_err = NET_CONN_ERR_INVALID_FAMILY;
+             return;
+    }
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_TxConnRTT_Init()
+*
+* Description : Initialize TCP connection's transmit round-trip time (RTT) controls.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnRTT_Reset(),
+*                                                 NetTCP_TxConnRTT_RTO_Init().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnRTT_Reset(),
+*               NetTCP_TxConnRTT_RTO_Init().
+*
+* Note(s)     : (1) (A) RFC #1122, Section 4.2.3.1 states that "the following values SHOULD be
+*                       used to initialize the estimation parameters for a new connection" :
+*
+*                           (a) RTT = 0 seconds
+*
+*                                   where
+*                                           RTT                 Round-Trip Time
+*
+*                       (1) Furthermore, RFC #1122, Section 4.2.3.1.(b) states that "the
+*                           smoothed variance is to be initialized to the value that will
+*                           result in" these values.
+*
+*                   (B) However, since RFC #2988, Section 2.2 amends the RFC #1122, Section
+*                       4.2.3.1 RTT initialization; the smoothed RTT average & deviation do
+*                       NOT truly require explicit initialization.  Nonetheless, these RTT
+*                       values are initialized to conform with RFC #1122, Section 4.2.3.1.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnRTT_Init (NET_TCP_CONN  *p_conn)
+{
+                                                                /* Init RTT     (see Note #1).                          */
+    p_conn->TxRTT_Avg_ms_scaled = NET_TCP_TX_RTT_AVG_INIT_MS_SCALED; /* Init RTT avg (see Note #1Aa).                   */
+    p_conn->TxRTT_Dev_ms_scaled = NET_TCP_TX_RTT_DEV_INIT_MS_SCALED; /* Init RTT dev (see Note #1A1).                   */
+
+    NetTCP_TxConnRTT_CalcUpdate(p_conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_TxConnRTT_Reset()
+*
+* Description : Reset TCP connection's transmit round-trip time (RTT) controls.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnRTT_RTO_Calc().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnRTT_RTO_Calc().
+*
+* Note(s)     : (1) (a) RFC #2988, Section 5 states "that a TCP implementation MAY clear SRTT and
+*                       RTTVAR after backing off the timer multiple times as it is likely that the
+*                       current SRTT and RTTVAR are bogus in this situation.  Once SRTT and RTTVAR
+*                       are cleared they should be initialized with the next RTT sample taken".
+*
+*                   (b) RFC #2581, Section 4.1 states that "after TCP has been idle for ... an
+*                       interval exceeding the retransmission timeout ... use slow start to
+*                       restart transmission".
+*
+*                       Similarly, although NO RFC specifies that a TCP connection's RTT average &
+*                       deviation should be reset following a TCP transmit idle timeout; it seems
+*                       reasonable to reset a TCP connection's RTT average & deviation controls
+*                       whenever a TCP connection's transmit is idle for a period exceeding the
+*                       re-transmit timeout.
+*
+*                   See also 'NetTCP_TxConnRTT_RTO_Calc()  Note #2a4A'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnRTT_Reset (NET_TCP_CONN  *p_conn)
+{
+    NetTCP_TxConnRTT_Init(p_conn);
+
+    p_conn->TxRTT_RTO_State = NET_TCP_TX_RTT_RTO_STATE_RESET;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_TxConnRTT_CalcUpdate()
+*
+* Description : Update TCP connection's transmit round-trip time (RTT) control calculations.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnRTT_Init(),
+*                                                 NetTCP_TxConnRTT_RTO_Calc().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnRTT_Init(),
+*               NetTCP_TxConnRTT_RTO_Calc().
+*
+* Note(s)     : (1) A TCP connection's transmit round-trip time controls should NOT be updated until
+*                   after the following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's transmit round-trip time average   (in scaled milliseconds)
+*                                                                            ['TxRTT_Avg_ms_scaled']
+*
+*                   (b) TCP connection's transmit round-trip time deviation (in scaled milliseconds)
+*                                                                            ['TxRTT_Dev_ms_scaled']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnRTT_CalcUpdate (NET_TCP_CONN  *p_conn)
+{
+    p_conn->TxRTT_Avg_ms = (NET_TCP_TIMEOUT_MS)(p_conn->TxRTT_Avg_ms_scaled / NET_TCP_TX_RTT_SCALE);
+    p_conn->TxRTT_Dev_ms = (NET_TCP_TIMEOUT_MS)(p_conn->TxRTT_Dev_ms_scaled / NET_TCP_TX_RTT_SCALE);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_TxConnRTO_Init()
+*
+* Description : (1) Initialize TCP connection's re-transmit timeout (RTO) controls :
+*
+*                   (a) Initialize RTO                                      See Note #2
+*                   (b) Configure  RTO maximum timeout                      See Note #3
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnRTT_RTO_Init().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnRTT_RTO_Init().
+*
+* Note(s)     : (2) RFC #1122, Section 4.2.3.1 states that "the following values SHOULD be
+*                   used to initialize the estimation parameters for a new connection" :
+*
+*                       (b) RTO = 3 seconds
+*
+*                               where
+*                                       RTO                 Retransmission Timeout
+*
+*                   (A) RFC #2988, Section 2.1 reiterates that "until a round-trip time (RTT)
+*                       measurement has been made ... the sender SHOULD set RTO <- 3 seconds".
+*
+*               (3) A TCP connection's re-transmit timeout controls should NOT be updated until
+*                   after the following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's maximum re-transmit timeout (in seconds)  ['TxRTT_RTO_Max_sec']
+*                          [see 'NetTCP_TxConnRTO_CfgMaxTimeout()  Note #2a']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnRTO_Init (NET_TCP_CONN  *p_conn)
+{
+    p_conn->TxRTT_RTO_ms_scaled = NET_TCP_TX_RTT_RTO_INIT_MS_SCALED; /* Init RTO (see Note #2).                         */
+
+    NetTCP_TxConnRTO_CalcUpdate_ms_scaled(p_conn);
+
+
+    NetTCP_TxConnRTO_CfgMaxTimeout(p_conn);                     /* Cfg RTO max timeout (see Note #3).                   */
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_TxConnRTO_CfgMaxTimeout()
+*
+* Description : Configure TCP connection's maximum re-transmit timeout (RTO).
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnRTO_Init(),
+*                                                 NetTCP_ConnCfgReTxMaxTimeout().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnRTO_Init(),
+*               NetTCP_ConnCfgReTxMaxTimeout().
+*
+* Note(s)     : (1) (a) RFC #2988, Section 2.4 states that "a maximum value MAY be placed on RTO provided
+*                       it is at least 60 seconds".
+*
+*                   (b) RFC #1122, Section 4.2.3.1 states that "the recommended ... RTO ... upper bound
+*                       should be 2*MSL".
+*
+*                   (c) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2, Page 299 states
+*                       that "the timeout value ... [has] an upper limit of 64 seconds".
+*
+*               (2) A TCP connection's maximum re-transmit timeouts (in scaled milliseconds or milliseconds)
+*                   should NOT be updated until after the following TCP connection control(s) have been
+*                   configured :
+*
+*                   (a) TCP connection's maximum re-transmit timeout (in seconds)  ['TxRTT_RTO_Max_sec']
+*                           [see 'NetTCP_ConnClr()  Note #12'
+*                              & 'NetTCP_ConnCfgReTxMaxTimeout()  Note #3']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnRTO_CfgMaxTimeout (NET_TCP_CONN  *p_conn)
+{
+    p_conn->TxRTT_RTO_Max_ms_scaled = (NET_TCP_TX_RTT_MS_SCALED)p_conn->TxRTT_RTO_Max_sec * NET_TCP_TX_RTT_MS_SCALE;
+    p_conn->TxRTT_RTO_Max_ms        = (NET_TCP_TIMEOUT_MS      )p_conn->TxRTT_RTO_Max_sec * DEF_TIME_NBR_mS_PER_SEC;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTCP_TxConnRTO_CalcUpdate()
+*
+* Description : Update TCP connection's re-transmit timeout (RTO) control calculations (see Note #1a).
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnRTO_CalcUpdate_ms(),
+*                                                 NetTCP_TxConnRTO_CalcUpdate_ms_scaled().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnRTO_CalcUpdate_ms(),
+*               NetTCP_TxConnRTO_CalcUpdate_ms_scaled().
+*
+* Note(s)     : (1) A TCP connection's re-transmit timeout controls should NOT be updated until
+*                   after the following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's re-transmit timeout (in milliseconds)
+*                                                             ['TxRTT_RTO_ms']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnRTO_CalcUpdate (NET_TCP_CONN  *p_conn)
+{
+    p_conn->TxRTT_RTO_sec  =  (NET_TCP_TIMEOUT_SEC)(p_conn->TxRTT_RTO_ms / DEF_TIME_NBR_mS_PER_SEC);
+    p_conn->TxRTT_RTO_tick = ((NET_TMR_TICK       ) p_conn->TxRTT_RTO_ms * NET_TMR_TIME_TICK_PER_SEC) / DEF_TIME_NBR_mS_PER_SEC;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetTCP_TxConnRTO_CalcUpdate_ms()
+*
+* Description : Update TCP connection's re-transmit timeout (RTO) control calculations for updated
+*                   millisecond RTO ('TxRTT_RTO_ms') [see Note #1a].
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnRTT_RTO_Calc().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnRTT_RTO_Calc().
+*
+* Note(s)     : (1) A TCP connection's re-transmit timeout controls should NOT be updated until
+*                   after the following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's re-transmit timeout (in milliseconds)
+*                                                             ['TxRTT_RTO_ms']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnRTO_CalcUpdate_ms (NET_TCP_CONN  *p_conn)
+{
+    p_conn->TxRTT_RTO_ms_scaled = (NET_TCP_TX_RTT_MS_SCALED)(p_conn->TxRTT_RTO_ms * NET_TCP_TX_RTT_SCALE);
+    NetTCP_TxConnRTO_CalcUpdate(p_conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                               NetTCP_TxConnRTO_CalcUpdate_ms_scaled()
+*
+* Description : Update TCP connection's re-transmit timeout (RTO) control calculations for updated scaled
+*                   millisecond RTO ('TxRTT_RTO_ms_scaled') [see Note #1a].
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnRTO_Init(),
+*                                                 NetTCP_TxConnRTT_RTO_Calc().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnRTO_Init(),
+*               NetTCP_TxConnRTT_RTO_Calc().
+*
+* Note(s)     : (1) A TCP connection's re-transmit timeout controls should NOT be updated until
+*                   after the following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's re-transmit timeout (in scaled milliseconds)
+*                                                             ['TxRTT_RTO_ms_scaled']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnRTO_CalcUpdate_ms_scaled (NET_TCP_CONN  *p_conn)
+{
+    p_conn->TxRTT_RTO_ms = (NET_TCP_TIMEOUT_MS)(p_conn->TxRTT_RTO_ms_scaled / NET_TCP_TX_RTT_SCALE);
+    NetTCP_TxConnRTO_CalcUpdate(p_conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   NetTCP_TxConnRTO_CalcBackOff()
+*
+* Description : Calculate next backed-off re-transmit timeout (RTO) value.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_TxConnRTT_RTO_Calc(),
+*                                                 NetTCP_TxConnWinSizeZeroWinHandler().
+*
+*               rto_ms      Current re-transmit timeout value (in milliseconds).
+*
+* Return(s)   : Backed-off re-transmit timeout value (in milliseconds).
+*
+* Caller(s)   : NetTCP_TxConnRTT_RTO_Calc(),
+*               NetTCP_TxConnWinSizeZeroWinHandler().
+*
+* Note(s)     : (1) (a) RFC #1122, Section 4.2.3.1 states that an "implementation MUST also include
+*                       'exponential backoff' for successive RTO values for the same segment".
+*
+*                       (1) RFC #2988, Section 5.5 states that "when the retransmission timer expires
+*                           ... the host MUST set RTO <- RTO * 2 ('back off the timer')".
+*
+*                           Thus the TCP retransmission timer exponential back-off scalar value is 2.
+*
+*                       (2) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2, Page 299
+*                           reiterates that "this doubling is called an 'exponential backoff'".
+*
+*                   (b) (1) RFC #2988, Section 2.4 adds that "a maximum value MAY be placed on RTO
+*                           provided it is at least 60 seconds".
+*
+*                       (2) RFC #1122, Section 4.2.3.1 states that "the recommended ... RTO ... upper
+*                           bound should be 2*MSL".
+*
+*                       (3) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2, Page 299
+*                           states that "the timeout value is doubled for each retransmission, with an
+*                           upper limit of 64 seconds".
+*
+*                       See also 'NetTCP_TxConnRTO_CfgMaxTimeout()  Note #1'.
+*
+*               (2) RFC #1122, Section 4.2.2.17 states that "zero-window probe[s] ... SHOULD increase
+*                   exponentially the interval between successive probes ... Exponential backoff is
+*                   recommended ... similar to ... the retransmission algorithm, and it may be possible
+*                   to combine the two procedures in the implementation".
+*
+*                   See also 'NetTCP_TxConnWinSizeZeroWinHandler()  Note #1b2'.
+*********************************************************************************************************
+*/
+
+static  NET_TCP_TIMEOUT_MS  NetTCP_TxConnRTO_CalcBackOff (NET_TCP_CONN        *p_conn,
+                                                          NET_TCP_TIMEOUT_MS   rto_ms)
+{
+    NET_TCP_TIMEOUT_MS  rto_ms_backoff_calcd;
+    NET_TCP_TIMEOUT_MS  rto_ms_backoff;
+
+                                                                /* Calc  backed-off RTO timeout val (see Note #1a).     */
+    rto_ms_backoff_calcd = (rto_ms < p_conn->TxRTT_RTO_Max_ms)
+                         ? (rto_ms * NET_TCP_TX_RTO_TIMEOUT_BACKOFF_SCALAR)
+                         :  p_conn->TxRTT_RTO_Max_ms;
+                                                                /* Limit backed-off RTO timeout val (see Note #1b).     */
+    rto_ms_backoff       =  DEF_MIN(rto_ms_backoff_calcd, p_conn->TxRTT_RTO_Max_ms);
+
+    return (rto_ms_backoff);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetTCP_TxConnRTT_RTO_Init()
+*
+* Description : Initialize TCP connection's transmit round-trip time (RTT) & re-transmit timeout (RTO) values.
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_ConnCfg().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnCfg().
+*
+* Note(s)     : (1) A TCP connection's re-transmit timeout controls should NOT be updated until
+*                   after the following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's maximum re-transmit timeout (in seconds)  ['TxRTT_RTO_Max_sec']
+*                          [see 'NetTCP_TxConnRTO_Init()  Note #3']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnRTT_RTO_Init (NET_TCP_CONN  *p_conn)
+{
+    NetTCP_TxConnRTT_Init(p_conn);
+    NetTCP_TxConnRTO_Init(p_conn);
+
+    p_conn->TxRTT_RTO_State = NET_TCP_TX_RTT_RTO_STATE_INIT;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetTCP_TxConnRTT_RTO_Calc()
+*
+* Description : (1) Calculate TCP connection's transmit round-trip time (RTT) & re-transmit timeout (RTO) values :
+*
+*                   (a) Perform requested RTT/RTO calculation operation(s)
+*                   (b) Prepare & perform RTT     calculations
+*                   (c) Prepare & perform RTO     calculations
+*
+*
+* Argument(s) : p_conn           Pointer to a TCP connection.
+*               -----           Argument validated in NetTCP_RxPktConnHandlerReTxQ(),
+*                                                     NetTCP_TxConnReTxQ(),
+*                                                     NetTCP_TxConnTxQ_TimeoutIdle().
+*
+*               calc_code       Indicate which TCP connection transmit round-trip time (RTT) & re-transmit
+*                                   timeout (RTO) calculations to perform (see Note #1a) :
+*
+*                                   NET_TCP_CONN_TX_RTT_RTO_INIT    Initialize TCP connection's RTT & RTO controls
+*                                                                       (see 'NetTCP_TxConnRTT_Init()  Note #1'
+*                                                                          & 'NetTCP_TxConnRTO_Init()  Note #2').
+*
+*                                   NET_TCP_CONN_TX_RTT_RESET       Reset      TCP connection's RTT       controls.
+*
+*                                   NET_TCP_CONN_TX_RTT_RTO_CALC    Calculate  TCP connection's RTT & RTO controls.
+*
+*                                   NET_TCP_CONN_TX_RTO_BACKOFF     Back-off   TCP connection's       RTO controls.
+*
+*               rtt_ts_txd_ms   Round-trip timestamp when TCP segment/packet  transmitted (in milliseconds).
+*
+*               rtt_ts_rxd_ms   Round-trip timestamp when TCP acknowledgement received    (in milliseconds).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerReTxQ(),
+*               NetTCP_TxConnReTxQ(),
+*               NetTCP_TxConnTxQ_TimeoutIdle().
+*
+* Note(s)     : (2) (a) (1) RFC #2988, Section 2 states that "the rules governing the computation of SRTT
+*                           (smoothed round-trip time), RTTVAR RTTVAR (round-trip time variation), and RTO
+*                           are as follows" :
+*
+*                           (A) RFC #2988, Section 2.2 states that for "the first RTT measurement R ...
+*                               the host MUST set" :
+*
+*                                   (1) SRTT    <-  R
+*                                   (2) RTTVAR  <-  R/2
+*                                   (3) RTO     <-  SRTT  +  max(G, K * RTTVAR)
+*
+*                                            where
+*                                                   SRTT                    RTT Smoothed Average
+*                                                   RTTVAR                  RTT Variance/Deviation
+*                                                   RTO                         Retransmission Timeout
+*                                                   R                       RTT First Measurement
+*                                   (4)             R   = R * 1             RTT First Average   Gain
+*                                   (5)             R/2 = R * 1/2           RTT First Deviation Gain
+*                                                   G                       RTT Clock Granularity (resolution)
+*                                   (6)             K = 4                   RTT-RTO Gain
+*
+*
+*                           (B) RFC #2988, Section 2.3 states that for "subsequent RTT measurement R' ...
+*                               a host MUST set" :
+*
+*                                   (1) RTTVAR  <-  (1 - beta ) * RTTVAR  +  beta  * |SRTT - R'|
+*                                   (2) SRTT    <-  (1 - alpha) * SRTT    +  alpha * R'
+*                                   (3) RTO     <-  SRTT  +  max(G, K * RTTVAR)
+*
+*                                            where
+*                                                   SRTT                    RTT Smoothed Average
+*                                                   RTTVAR                  RTT Variance/Deviation
+*                                                   RTO                         Retransmission Timeout
+*                                                   R'                      RTT Subsequent Measurement(s)
+*                                   (4)             alpha = 1/8             RTT-Average    Gain
+*                                   (5)             beta  = 1/4             RTT-Deviation  Gain
+*                                                   G                       RTT Clock Granularity (resolution)
+*                                   (6)             K = 4                   RTT-RTO Gain
+*
+*
+*                               (a) RFC #2988, Section 2.3 states tht "updating RTTVAR and SRTT MUST be
+*                                   computed in ... order ... [since] the value of SRTT used in the update
+*                                   to RTTVAR is its value before updating SRTT itself".
+*
+*                               (b) To reduce the total number of operations for both RTT calculations,
+*                                   the equations SHOULD be factored & rearranged as follows :
+*
+*                                       (1) (A) RTTVAR  <-       (1 - beta) * RTTVAR  +  beta * |SRTT - R'|
+*
+*                                           (B) RTTVAR  <-  RTTVAR  -  beta * RTTVAR  +  beta * |SRTT - R'|
+*
+*                                           (C) RTTVAR  <-  RTTVAR  +  beta * (|SRTT - R'| - RTTVAR)
+*
+*                                           (D) RTTVAR  <-  RTTVAR  +  beta * (|R' - SRTT| - RTTVAR)
+*
+*
+*                                       (2) (A) SRTT    <-     (1 - alpha) * SRTT  +  alpha * R'
+*
+*                                           (B) SRTT    <-  SRTT  -  alpha * SRTT  +  alpha * R'
+*
+*                                           (C) SRTT    <-  SRTT  +  alpha * (R' - SRTT)
+*
+*
+*                       (2) (A) RFC #793, Section 3.7 'Data Communication : Retransmission Timeout' states
+*                               that "the Round Trip Time (RTT) ... [is] the elapsed time between" :
+*
+*                               (1) "sending a data octet with a particular sequence number and"   ...
+*                               (2) "receiving an acknowledgment that covers that sequence number" ...
+*                               (3) "(segments sent do not have to match segments received)".
+*
+*                           (B) (1) RFC #2988, Section 3 adds that :
+*
+*                                   (a) "Traditionally, TCP implementations have taken one RTT measurement at
+*                                        a time (typically once per RTT)."
+*                                   (b) "A TCP implementation MUST take at least one RTT measurement per RTT
+*                                        (unless that is not possible per Karn's algorithm) [see Note #2a5]".
+*                                   (c) "For fairly modest congestion window sizes research suggests that
+*                                        timing each segment does not lead to a better RTT estimator."
+*                                   (d) "Additionally, when multiple samples are taken per RTT the alpha and
+*                                        beta ... may keep an inadequate RTT history."
+*
+*                               (2) RFC #2988, Section 1 states that "in some situations it may be beneficial
+*                                   for a TCP sender to be more conservative than the algorithms detailed in
+*                                   this document allow.  However, a TCP MUST NOT be more aggressive than the
+*                                   ... algorithms allow".
+*
+*                                   Thus the following TCP algorithm(s) are permitted; even if the algorithms
+*                                   delay or decrease the number of received acknowledgements, which thereby
+*                                   increases the measured time values for RTT samples :
+*
+*                                       (a) Karn's Algorithm                    See  Note #2a5
+*                                       (b) TCP Delayed Acknowledgements        See 'NetTCP_TxConnAck()  Note #6'
+*
+*                       (3) Jacobson/Karels, "Congestion Avoidance and Control", Appendix A.2 states that RTT
+*                           calculations "should be done in integer arithmetic".  RFC #2988, Section 2.3 adds
+*                           that RTT calculations "SHOULD be computed using ... 1/8 and ... 1/4" gains (see
+*                           Notes #2a1B4 & #2a1B5).
+*
+*                       (4) (A) (1) RFC #2988, Section 5 states "that a TCP implementation MAY clear SRTT and
+*                                   RTTVAR after backing off the timer multiple times as it is likely that the
+*                                   current SRTT and RTTVAR are bogus in this situation.  Once SRTT and RTTVAR
+*                                   are cleared they should be initialized with the next RTT sample taken per
+*                                   [Note #2a1A] rather than using [Note #2a1B]".
+*
+*                               (2) RFC #2581, Section 4.1 states that "after TCP has been idle for ... an
+*                                   interval exceeding the retransmission timeout ... use slow start to
+*                                   restart transmission".
+*
+*                                   Similarly, although NO RFC specifies that a TCP connection's RTT average
+*                                   & deviation should be reset following a TCP transmit idle timeout; it
+*                                   seems reasonable to reset a TCP connection's RTT average & deviation
+*                                   controls whenever a TCP connection's transmit is idle for a period
+*                                   exceeding the re-transmit timeout.
+*
+*                               See also 'NetTCP_TxConnTxQ_TimeoutIdle()  Note #2b'.
+*
+*                           (B) However, a TCP connection's RTO timeout controls do NOT need to also be
+*                               explicitly reset since RFC #2988, Section 5 states that "once a new RTT
+*                               measurement is obtained (which can only happen when new data has been
+*                               sent and acknowledged), the computations ... of RTO ... are performed".
+*
+*                       (5) RFC #2988, Section 3 states that "TCP MUST use Karn's algorithm ... for
+*                           taking RTT samples.  That is, RTT samples MUST NOT be made using segments
+*                           that were retransmitted (and thus for which it is ambiguous whether the
+*                           reply was for the first instance of the packet or a later instance)".
+*
+*                   (b) (1) (A) (1) RFC #2988, Section 2.4 states that "whenever RTO is computed, if it
+*                                   is less than 1 second then the RTO SHOULD be rounded up to 1 second".
+*
+*                                   (a) This amends RFC #1122, Section 4.2.3.1 which previously stated
+*                                       that "the recommended ... RTO ... lower bound ... SHOULD be
+*                                       measured in fractions of a second".
+*
+*                               (2) RFC #2988, Section 4 states that "there is no requirement for the
+*                                   clock granularity G used for computing RTT measurements ... However,
+*                                   if the K*RTTVAR term in the RTO calculation equals zero, the variance
+*                                   term MUST be rounded to G seconds".
+*
+*                                   See also Notes #2a1A3 & #2a1B3.
+*
+*                           (B) (1) RFC #2988, Section 2.4 adds that "a maximum value MAY be placed on
+*                                   RTO provided it is at least 60 seconds".
+*
+*                               (2) RFC #1122, Section 4.2.3.1 states that "the recommended ... RTO ...
+*                                   upper bound should be 2*MSL".
+*
+*                               (3) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2,
+*                                   Page 299 states that "the timeout value ... [has] an upper limit of
+*                                   64 seconds".
+*
+*                               See also 'net_tcp.c  NetTCP_TxConnRTO_CfgMaxTimeout()  Note #1'.
+*
+*                       (2) RFC #1122, Section 4.2.3.1 reiterates that an "implementation MUST also
+*                           include 'exponential backoff' for successive RTO values for the same
+*                           segment".
+*
+*                           (a) RFC #2988, Section 5.5 states that "when the retransmission timer
+*                               expires ... the host MUST set RTO <- RTO * 2 ('back off the timer')".
+*
+*                               Thus the TCP retransmission timer exponential back-off scalar
+*                               value is 2.
+*
+*                           (b) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2,
+*                               Page 299 reiterates that "this doubling is called an 'exponential
+*                               backoff'".
+*
+*                           See also 'NetTCP_TxConnRTO_CalcBackOff()  Note #1'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxConnRTT_RTO_Calc (NET_TCP_CONN          *p_conn,
+                                         NET_TCP_CALC_CODE      calc_code,
+                                         NET_TCP_TX_RTT_TS_MS   rtt_ts_txd_ms,
+                                         NET_TCP_TX_RTT_TS_MS   rtt_ts_rxd_ms)
+{
+    NET_TCP_TX_RTT_MS         rtt_cur_ms;
+    NET_TCP_TX_RTT_MS_SCALED  rtt_cur_ms_scaled;
+    NET_TCP_TX_RTT_MS_SCALED  rtt_err_ms_scaled;
+    NET_TCP_TX_RTT_MS_SCALED  rtt_err_ms_scaled_abs;
+    NET_TCP_TX_RTT_MS_SCALED  rtt_avg_ms_scaled;
+    NET_TCP_TX_RTT_MS_SCALED  rtt_dev_ms_scaled;
+    NET_TCP_TX_RTT_MS_SCALED  rtt_dev_ms_scaled_gain;
+    NET_TCP_TX_RTT_MS_SCALED  rtt_dev_ms_scaled_max;
+    NET_TCP_TX_RTT_MS_SCALED  rto_ms_scaled;
+
+
+
+                                                                /* ---------------- PERFORM CALC CODE ----------------- */
+    switch (calc_code) {
+        case NET_TCP_CONN_TX_RTT_RTO_CALC:
+             break;
+
+
+        case NET_TCP_CONN_TX_RTO_BACKOFF:                       /* Back-off RTO (see Note #2b2).                        */
+             p_conn->TxRTT_RTO_ms = NetTCP_TxConnRTO_CalcBackOff(p_conn, p_conn->TxRTT_RTO_ms);
+             NetTCP_TxConnRTO_CalcUpdate_ms(p_conn);
+                                                                /* 'break' intentionally omitted; MUST execute ...      */
+                                                                /* ...  the following case (see Note #1c1A) :  ...      */
+                                                                /* --------- ... 'NET_TCP_CONN_TX_RTT_RESET'. --------- */
+        case NET_TCP_CONN_TX_RTT_RESET:                         /* See Note #2a4.                                       */
+             NetTCP_TxConnRTT_Reset(p_conn);
+             return;
+
+
+        case NET_TCP_CONN_TX_RTT_RTO_INIT:
+        default:
+             NetTCP_TxConnRTT_RTO_Init(p_conn);
+             return;
+    }
+
+
+
+                                                                /* ---------------- PREPARE RTT CALCS ----------------- */
+    switch (p_conn->TxRTT_RTO_State) {
+        case NET_TCP_TX_RTT_RTO_STATE_INIT:
+        case NET_TCP_TX_RTT_RTO_STATE_RESET:
+        case NET_TCP_TX_RTT_RTO_STATE_CALC:
+             rtt_cur_ms        = (NET_TCP_TX_RTT_MS       )(rtt_ts_rxd_ms - rtt_ts_txd_ms);
+             rtt_cur_ms_scaled = (NET_TCP_TX_RTT_MS_SCALED)(rtt_cur_ms    * NET_TCP_TX_RTT_SCALE);
+             break;
+
+
+        case NET_TCP_TX_RTT_RTO_STATE_NONE:
+        case NET_TCP_TX_RTT_RTO_STATE_RE_TX:                    /* See Note #2a5.                                       */
+        default:
+             return;
+    }
+
+                                                                /* ---------------- PERFORM RTT CALCS ----------------- */
+    switch (p_conn->TxRTT_RTO_State) {
+        case NET_TCP_TX_RTT_RTO_STATE_INIT:                     /* Init   RTT calcs (see Notes #2a1A1 & #2a1A2).        */
+        case NET_TCP_TX_RTT_RTO_STATE_RESET:
+             rtt_avg_ms_scaled      = (rtt_cur_ms_scaled * NET_TCP_TX_RTT_GAIN_AVG_INIT_NUMER)
+                                                         / NET_TCP_TX_RTT_GAIN_AVG_INIT_DENOM;
+
+             rtt_dev_ms_scaled      = (rtt_cur_ms_scaled * NET_TCP_TX_RTT_GAIN_DEV_INIT_NUMER)
+                                                         / NET_TCP_TX_RTT_GAIN_DEV_INIT_DENOM;
+
+             p_conn->TxRTT_RTO_State =  NET_TCP_TX_RTT_RTO_STATE_CALC;
+             break;
+
+
+        case NET_TCP_TX_RTT_RTO_STATE_CALC:                     /* Update RTT calcs (see Notes #2a1Bb1D & #2a1Bb2C).    */
+             rtt_err_ms_scaled     =         rtt_cur_ms_scaled  - p_conn->TxRTT_Avg_ms_scaled;
+             rtt_err_ms_scaled_abs = DEF_ABS(rtt_err_ms_scaled);
+
+             rtt_dev_ms_scaled     = p_conn->TxRTT_Dev_ms_scaled + (((rtt_err_ms_scaled_abs - p_conn->TxRTT_Dev_ms_scaled) * NET_TCP_TX_RTT_GAIN_DEV_NUMER)
+                                                                                                                         / NET_TCP_TX_RTT_GAIN_DEV_DENOM);
+
+             rtt_avg_ms_scaled     = p_conn->TxRTT_Avg_ms_scaled +  ((rtt_err_ms_scaled                                   * NET_TCP_TX_RTT_GAIN_AVG_NUMER)
+                                                                                                                         / NET_TCP_TX_RTT_GAIN_AVG_DENOM);
+             break;
+
+
+        case NET_TCP_TX_RTT_RTO_STATE_NONE:
+        case NET_TCP_TX_RTT_RTO_STATE_RE_TX:                    /* See Note #2a5.                                       */
+        default:
+             return;
+    }
+
+                                                                /* -------------------- UPDATE RTT -------------------- */
+    p_conn->TxRTT_Avg_ms_scaled = rtt_avg_ms_scaled;
+    p_conn->TxRTT_Dev_ms_scaled = rtt_dev_ms_scaled;
+
+    NetTCP_TxConnRTT_CalcUpdate(p_conn);
+
+
+                                                                /* --------------------- CALC RTO --------------------- */
+                                                                /* Calc  RTO     (see Note #2a1B3).                     */
+    rtt_dev_ms_scaled_gain = (p_conn->TxRTT_Dev_ms_scaled * NET_TCP_TX_RTT_GAIN_RTO_NUMER)
+                                                         / NET_TCP_TX_RTT_GAIN_RTO_DENOM;
+                                                                /* Limit RTT dev (see Note #2b1A2).                     */
+    rtt_dev_ms_scaled_max  =  DEF_MAX(NET_TCP_TX_RTT_TS_CLK_MS_SCALED,
+                                      rtt_dev_ms_scaled_gain);
+
+    rto_ms_scaled          =  p_conn->TxRTT_Avg_ms_scaled + rtt_dev_ms_scaled_max;
+
+                                                                /* Limit RTO (see Note #2b1).                           */
+    if (rto_ms_scaled < NET_TCP_TX_RTO_MIN_TIMEOUT_MS_SCALED) {
+        rto_ms_scaled = NET_TCP_TX_RTO_MIN_TIMEOUT_MS_SCALED;
+    }
+    if (rto_ms_scaled > p_conn->TxRTT_RTO_Max_ms_scaled) {
+        rto_ms_scaled = p_conn->TxRTT_RTO_Max_ms_scaled;
+    }
+
+                                                                /* -------------------- UPDATE RTO -------------------- */
+    p_conn->TxRTT_RTO_ms_scaled = rto_ms_scaled;
+
+    NetTCP_TxConnRTO_CalcUpdate_ms_scaled(p_conn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_TxPktHandlerIPv4()
+*
+* Description : (1) Prepare & transmit TCP packet(s) :
+*
+*                   (a) Validate transmit packet
+*                   (b) Transmit TCP packet
+*                   (c) Free   transmit packet buffer(s)
+*                   (d) Update transmit statistics
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer to transmit TCP packet.
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      TCP port.
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination TCP port.
+*
+*               seq_nbr     TCP segment                 sequence number.
+*
+*               ack_nbr     TCP segment acknowledgement sequence number.
+*
+*               win_size    TCP receive window advertisement size.
+*
+*               TOS         Specific TOS to transmit TCP/IP packet
+*                               (see Note #2a & 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit TCP/IP packet
+*                               (see Note #2b & 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IP_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IP_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IP_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IP_TTL_NONE                 Replace with default TTL
+*
+*               flags_tcp   Flags to select TCP transmit options; bit-field flags logically OR'd :
+*
+*                               NET_TCP_FLAG_NONE               No  TCP transmit flags selected.
+*                               NET_TCP_FLAG_TX_FIN             Set TCP 'FIN'    flag.
+*                               NET_TCP_FLAG_TX_SYNC            Set TCP 'SYN'    flag.
+*                               NET_TCP_FLAG_TX_RESET           Set TCP 'RESET'  flag.
+*                               NET_TCP_FLAG_TX_PUSH            Set TCP 'PUSH'   flag.
+*                               NET_TCP_FLAG_TX_ACK             Set TCP 'ACK'    flag.
+*                               NET_TCP_FLAG_TX_URGENT          Set TCP 'URGENT' flag.
+*
+*               flags_ip    Flags to select IP  transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IP_FLAG_NONE                No  IP transmit flags selected.
+*                               NET_IP_FLAG_TX_DONT_FRAG        Set IP 'Don't Frag' flag.
+*
+*               p_opts_tcp   Pointer to one or more TCP options configuration data structures :
+*
+*                               NULL                            NO  TCP transmit         options configuration.
+*                               NET_TCP_OPT_CFG_MAX_SEG_SIZE    TCP Maximum Segment Size options configuration.
+*
+*               p_opts_ip    Pointer to one or more IP  options configuration data structures
+*                               (see Note #2c & 'net_ip.h  IP HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IP_OPT_CFG_ROUTE_TS         Route &/or Internet Timestamp options configuration.
+*                               NET_IP_OPT_CFG_SECURITY         Security options configuration
+*                                                                   (see 'net_ip.c  Note #1e').
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP segments(s) successfully prepared &
+*                                                                   transmitted to network layer.
+*                               NET_TCP_ERR_TX_PKT              TCP transmit packet error; TCP segment
+*                                                                   buffer(s) discarded.
+*
+*                                                               ------ RETURNED BY NetTCP_TxPkt() : -------
+*                               NET_ERR_TX                      Transmit error.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnSync(),
+*               NetTCP_TxConnAck(),
+*               NetTCP_TxConnReset(),
+*               NetTCP_TxConnProbe(),
+*               NetTCP_TxConnTxQ(),
+*               NetTCP_TxConnReTxQ().
+*
+* Note(s)     : (2) The following parameters are configured & maintained by a TCP connection's network
+*                   connection (see 'net_conn.h  NETWORK CONNECTION DATA TYPE  Note #2') :
+*
+*                   (a) RFC #1122, Section 4.2.4.2 states that :
+*
+*                       (1) "The application layer MUST be able to specify the [IP] Type-of-Service (TOS)
+*                            for segments that are sent on a connection ... TCP SHOULD pass the current
+*                            TOS value without change to the IP layer, when it sends segments on the
+*                            connection."
+*
+*                       (2) "It not required [sic], but the application SHOULD be able to change the [IP]
+*                            TOS during the connection lifetime."
+*
+*                       (3) "The TOS will be specified independently in each direction on the connection,
+*                            so that the receiver application will specify the TOS used for ACK segments."
+*
+*                   (b) RFC #1122, Section 4.2.2.19 states that "the [IP] TTL value used to send TCP
+*                       segments MUST be configurable".
+*
+*                   (c) (1) (A) RFC #1122, Section 4.1.3.2 reiterates that "an application MUST be able
+*                               to specify IP options to be sent ... and ... MUST pass these options to
+*                               the IP layer".
+*
+*                           (B) RFC #1122, Section 4.2.3.8 adds that :
+*
+*                               (1) "A TCP MAY support the [IP] Time Stamp and Record Route options."
+*
+*                               (2) (a) "An application MUST be able to specify a [IP] source route when
+*                                        it actively opens a TCP connection, and this MUST take precedence
+*                                        over a source route received in a datagram."
+*
+*                                   (b) (1) "When a ... connection is OPENed passively and a packet
+*                                            arrives with a completed IP Source Route option (containing
+*                                            a return route), ... all segments sent on this connection
+*                                            ... MUST save ... and use ... [this] return route."
+*
+*                                       (2) "If a different source route arrives in a later segment, the
+*                                            later definition SHOULD override the earlier one."
+*
+*                       (2) IP transmit options currently NOT implemented      See 'net_tcp.c  Note #1d'
+*
+*               (3) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+static  void  NetTCP_TxPktHandlerIPv4 (NET_BUF           *p_buf,
+                                       NET_IPv4_ADDR      src_addr,
+                                       NET_TCP_PORT_NBR   src_port,
+                                       NET_IPv4_ADDR      dest_addr,
+                                       NET_TCP_PORT_NBR   dest_port,
+                                       NET_TCP_SEQ_NBR    seq_nbr,
+                                       NET_TCP_SEQ_NBR    ack_nbr,
+                                       NET_TCP_WIN_SIZE   win_size,
+                                       NET_IPv4_TOS       TOS,
+                                       NET_IPv4_TTL       TTL,
+                                       NET_TCP_FLAGS      flags_tcp,
+                                       NET_IPv4_FLAGS     flags_ip,
+                                       void              *p_opts_tcp,
+                                       void              *p_opts_ip,
+                                       NET_ERR           *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_ERR       err;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == DEF_NULL) {
+        NetTCP_TxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+                                                                /* --------------- VALIDATE TX TCP PKT ---------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetTCP_TxPktValidate(p_buf_hdr,
+                         src_port,
+                         dest_port,
+                         seq_nbr,
+                         ack_nbr,
+                         win_size,
+                         flags_tcp,
+                         p_opts_tcp,
+                         p_err);
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_TCP_ERR_INVALID_LEN_DATA:
+        case NET_TCP_ERR_INVALID_PORT_NBR:
+        case NET_TCP_ERR_INVALID_FLAG:
+        case NET_TCP_ERR_INVALID_OPT_TYPE:
+        case NET_TCP_ERR_INVALID_OPT_CFG:
+        default:
+             NetTCP_TxPktDiscard(p_buf, &err);
+            *p_err = NET_TCP_ERR_TX_PKT;
+             return;
+    }
+#endif
+
+
+                                                                /* -------------------- TX TCP PKT -------------------- */
+    NetTCP_TxPktIPv4(p_buf,
+                     p_buf_hdr,
+                     src_addr,
+                     src_port,
+                     dest_addr,
+                     dest_port,
+                     seq_nbr,
+                     ack_nbr,
+                     win_size,
+                     TOS,
+                     TTL,
+                     flags_tcp,
+                     flags_ip,
+                     p_opts_tcp,
+                     p_opts_ip,
+                     p_err);
+
+
+                                                                /* ---------- FREE TX PKT / UPDATE TX STATS ----------- */
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegCtr);
+            *p_err = NET_TCP_ERR_NONE;
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+        case NET_IF_ERR_INVALID_IF:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxPktDiscardedCtr);
+                                                                /* Rtn err from NetTCP_TxPkt().                         */
+             return;
+
+
+        case NET_IPv4_ERR_TX_PKT:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxPktDiscardedCtr);
+            *p_err = NET_TCP_ERR_TX_PKT;
+             return;
+
+
+        case NET_TCP_ERR_INVALID_LEN_HDR:
+        case NET_TCP_ERR_INVALID_OPT_TYPE:
+        case NET_TCP_ERR_INVALID_OPT_LEN:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_BUF_ERR_INVALID_LEN:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_UTIL_ERR_NULL_SIZE:
+        case NET_UTIL_ERR_INVALID_PROTOCOL:
+        default:
+             NetTCP_TxPktDiscard(p_buf, &err);
+            *p_err = NET_TCP_ERR_TX_PKT;
+             return;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_TxPktHandlerIPv6()
+*
+* Description : (1) Prepare & transmit TCP packet(s) :
+*
+*                   (a) Validate transmit packet
+*                   (b) Transmit TCP packet
+*                   (c) Free   transmit packet buffer(s)
+*                   (d) Update transmit statistics
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer to transmit TCP packet.
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      TCP port.
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination TCP port.
+*
+*               seq_nbr     TCP segment                 sequence number.
+*
+*               ack_nbr     TCP segment acknowledgement sequence number.
+*
+*               win_size    TCP receive window advertisement size.
+*
+*               TOS         Specific TOS to transmit TCP/IP packet
+*                               (see Note #2a & 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit TCP/IP packet
+*                               (see Note #2b & 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IP_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IP_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IP_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IP_TTL_NONE                 Replace with default TTL
+*
+*               flags_tcp   Flags to select TCP transmit options; bit-field flags logically OR'd :
+*
+*                               NET_TCP_FLAG_NONE               No  TCP transmit flags selected.
+*                               NET_TCP_FLAG_TX_FIN             Set TCP 'FIN'    flag.
+*                               NET_TCP_FLAG_TX_SYNC            Set TCP 'SYN'    flag.
+*                               NET_TCP_FLAG_TX_RESET           Set TCP 'RESET'  flag.
+*                               NET_TCP_FLAG_TX_PUSH            Set TCP 'PUSH'   flag.
+*                               NET_TCP_FLAG_TX_ACK             Set TCP 'ACK'    flag.
+*                               NET_TCP_FLAG_TX_URGENT          Set TCP 'URGENT' flag.
+*
+*               flags_ip    Flags to select IP  transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IP_FLAG_NONE                No  IP transmit flags selected.
+*                               NET_IP_FLAG_TX_DONT_FRAG        Set IP 'Don't Frag' flag.
+*
+*               p_opts_tcp   Pointer to one or more TCP options configuration data structures :
+*
+*                               NULL                            NO  TCP transmit         options configuration.
+*                               NET_TCP_OPT_CFG_MAX_SEG_SIZE    TCP Maximum Segment Size options configuration.
+*
+*               p_opts_ip    Pointer to one or more IP  options configuration data structures
+*                               (see Note #2c & 'net_ip.h  IP HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IP_OPT_CFG_ROUTE_TS         Route &/or Internet Timestamp options configuration.
+*                               NET_IP_OPT_CFG_SECURITY         Security options configuration
+*                                                                   (see 'net_ip.c  Note #1e').
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP segments(s) successfully prepared &
+*                                                                   transmitted to network layer.
+*                               NET_TCP_ERR_TX_PKT              TCP transmit packet error; TCP segment
+*                                                                   buffer(s) discarded.
+*
+*                                                               ------ RETURNED BY NetTCP_TxPkt() : -------
+*                               NET_ERR_TX                      Transmit error.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnSync(),
+*               NetTCP_TxConnAck(),
+*               NetTCP_TxConnReset(),
+*               NetTCP_TxConnProbe(),
+*               NetTCP_TxConnTxQ(),
+*               NetTCP_TxConnReTxQ().
+*
+* Note(s)     : (2) The following parameters are configured & maintained by a TCP connection's network
+*                   connection (see 'net_conn.h  NETWORK CONNECTION DATA TYPE  Note #2') :
+*
+*                   (a) RFC #1122, Section 4.2.4.2 states that :
+*
+*                       (1) "The application layer MUST be able to specify the [IP] Type-of-Service (TOS)
+*                            for segments that are sent on a connection ... TCP SHOULD pass the current
+*                            TOS value without change to the IP layer, when it sends segments on the
+*                            connection."
+*
+*                       (2) "It not required [sic], but the application SHOULD be able to change the [IP]
+*                            TOS during the connection lifetime."
+*
+*                       (3) "The TOS will be specified independently in each direction on the connection,
+*                            so that the receiver application will specify the TOS used for ACK segments."
+*
+*                   (b) RFC #1122, Section 4.2.2.19 states that "the [IP] TTL value used to send TCP
+*                       segments MUST be configurable".
+*
+*                   (c) (1) (A) RFC #1122, Section 4.1.3.2 reiterates that "an application MUST be able
+*                               to specify IP options to be sent ... and ... MUST pass these options to
+*                               the IP layer".
+*
+*                           (B) RFC #1122, Section 4.2.3.8 adds that :
+*
+*                               (1) "A TCP MAY support the [IP] Time Stamp and Record Route options."
+*
+*                               (2) (a) "An application MUST be able to specify a [IP] source route when
+*                                        it actively opens a TCP connection, and this MUST take precedence
+*                                        over a source route received in a datagram."
+*
+*                                   (b) (1) "When a ... connection is OPENed passively and a packet
+*                                            arrives with a completed IP Source Route option (containing
+*                                            a return route), ... all segments sent on this connection
+*                                            ... MUST save ... and use ... [this] return route."
+*
+*                                       (2) "If a different source route arrives in a later segment, the
+*                                            later definition SHOULD override the earlier one."
+*
+*                       (2) IP transmit options currently NOT implemented      See 'net_tcp.c  Note #1d'
+*
+*               (3) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+static  void  NetTCP_TxPktHandlerIPv6 (NET_BUF                 *p_buf,
+                                       NET_IPv6_ADDR           *p_src_addr,
+                                       NET_TCP_PORT_NBR         src_port,
+                                       NET_IPv6_ADDR           *p_dest_addr,
+                                       NET_TCP_PORT_NBR         dest_port,
+                                       NET_TCP_SEQ_NBR          seq_nbr,
+                                       NET_TCP_SEQ_NBR          ack_nbr,
+                                       NET_TCP_WIN_SIZE         win_size,
+                                       NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                       NET_IPv6_FLOW_LABEL      flow_label,
+                                       NET_IPv6_HOP_LIM         hop_lim,
+                                       NET_TCP_FLAGS            flags_tcp,
+                                       void                    *p_opts_tcp,
+                                       NET_ERR                 *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_ERR       err;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == DEF_NULL) {
+        NetTCP_TxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+                                                                /* --------------- VALIDATE TX TCP PKT ---------------- */
+    p_buf_hdr = &p_buf->Hdr;
+    DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetTCP_TxPktValidate(p_buf_hdr,
+                         src_port,
+                         dest_port,
+                         seq_nbr,
+                         ack_nbr,
+                         win_size,
+                         flags_tcp,
+                         p_opts_tcp,
+                         p_err);
+    switch (*p_err) {
+        case NET_TCP_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_TCP_ERR_INVALID_LEN_DATA:
+        case NET_TCP_ERR_INVALID_PORT_NBR:
+        case NET_TCP_ERR_INVALID_FLAG:
+        case NET_TCP_ERR_INVALID_OPT_TYPE:
+        case NET_TCP_ERR_INVALID_OPT_CFG:
+        default:
+             NetTCP_TxPktDiscard(p_buf, &err);
+            *p_err = NET_TCP_ERR_TX_PKT;
+             return;
+    }
+#endif
+
+
+                                                                /* -------------------- TX TCP PKT -------------------- */
+    NetTCP_TxPktIPv6(p_buf,
+                     p_buf_hdr,
+                     p_src_addr,
+                     src_port,
+                     p_dest_addr,
+                     dest_port,
+                     seq_nbr,
+                     ack_nbr,
+                     win_size,
+                     traffic_class,
+                     flow_label,
+                     hop_lim,
+                     flags_tcp,
+                     p_opts_tcp,
+                     p_err);
+
+
+                                                                /* ---------- FREE TX PKT / UPDATE TX STATS ----------- */
+    switch (*p_err) {
+        case NET_IPv4_ERR_NONE:
+        case NET_IPv6_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.TCP.TxSegCtr);
+            *p_err = NET_TCP_ERR_NONE;
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxPktDiscardedCtr);
+                                                                /* Rtn err from NetTCP_TxPkt().                         */
+             return;
+
+
+        case NET_IPv4_ERR_TX_PKT:
+        case NET_IPv6_ERR_TX_PKT:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxPktDiscardedCtr);
+            *p_err = NET_TCP_ERR_TX_PKT;
+             return;
+
+
+        case NET_TCP_ERR_INVALID_LEN_HDR:
+        case NET_TCP_ERR_INVALID_OPT_TYPE:
+        case NET_TCP_ERR_INVALID_OPT_LEN:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_BUF_ERR_INVALID_LEN:
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_UTIL_ERR_NULL_SIZE:
+        case NET_UTIL_ERR_INVALID_PROTOCOL:
+        default:
+             NetTCP_TxPktDiscard(p_buf, &err);
+            *p_err = NET_TCP_ERR_TX_PKT;
+             return;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetTCP_TxPktValidate()
+*
+* Description : (1) Validate TCP transmit packet parameters & options :
+*
+*                   (a) Validate the following transmit packet parameters :
+*
+*                       (1) Supported protocols :
+*                           (A) BSD Sockets
+*                           (B) TCP                                         See Note #2
+*
+*                       (2) Buffer protocol index
+*                       (3) Data Length
+*                       (4) Source      Port
+*                       (5) Destination Port
+*                       (6) Flags
+*
+*                   (b) The following parameters are inherently assumed to be valid :
+*
+*                       (1) Sequence        Number
+*                       (2) Acknowledgement Number
+*                       (3) Receive Window  Size
+*
+*
+* Argument(s) : p_buf_hdr    Pointer to network buffer header.
+*               --------    Argument validated in NetTCP_TxPktHandler().
+*
+*               src_port    Source      TCP port.
+*
+*               dest_port   Destination TCP port.
+*
+*               seq_nbr     TCP segment                 sequence number.
+*
+*               ack_nbr     TCP segment acknowledgement sequence number.
+*
+*               win_size    TCP receive window advertisement size.
+*
+*               flags_tcp   Flags to select TCP transmit options; bit-field flags logically OR'd :
+*
+*                               NET_TCP_FLAG_NONE               No  TCP transmit flags selected.
+*                               NET_TCP_FLAG_TX_FIN             Set TCP 'FIN'    flag.
+*                               NET_TCP_FLAG_TX_SYNC            Set TCP 'SYN'    flag.
+*                               NET_TCP_FLAG_TX_RESET           Set TCP 'RESET'  flag.
+*                               NET_TCP_FLAG_TX_PUSH            Set TCP 'PUSH'   flag.
+*                               NET_TCP_FLAG_TX_ACK             Set TCP 'ACK'    flag.
+*                               NET_TCP_FLAG_TX_URGENT          Set TCP 'URGENT' flag.
+*
+*               p_opts_tcp   Pointer to one or more TCP options configuration data structures :
+*
+*                               NULL                            NO  TCP transmit         options configuration.
+*                               NET_TCP_OPT_CFG_MAX_SEG_SIZE    TCP Maximum Segment Size options configuration.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                Transmit packet validated.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer   type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*                               NET_TCP_ERR_INVALID_LEN_DATA    Invalid protocol/data length.
+*                               NET_TCP_ERR_INVALID_PORT_NBR    Invalid TCP port number.
+*                               NET_TCP_ERR_INVALID_FLAG        Invalid TCP flag(s).
+*
+*                                                               - RETURNED BY NetTCP_TxPktValidateOpt() : -
+*                               NET_TCP_ERR_INVALID_OPT_TYPE    Invalid TCP option type.
+*                               NET_TCP_ERR_INVALID_OPT_CFG     Invalid TCP option configuration.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxPktHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetTCP_TxPktValidate (NET_BUF_HDR       *p_buf_hdr,
+                                    NET_TCP_PORT_NBR   src_port,
+                                    NET_TCP_PORT_NBR   dest_port,
+                                    NET_TCP_SEQ_NBR    seq_nbr,
+                                    NET_TCP_SEQ_NBR    ack_nbr,
+                                    NET_TCP_WIN_SIZE   win_size,
+                                    NET_TCP_FLAGS      flags_tcp,
+                                    void              *p_opts_tcp,
+                                    NET_ERR           *p_err)
+{
+    CPU_INT16U     ix;
+    CPU_INT16U     len;
+    NET_TCP_FLAGS  flag_mask;
+    CPU_BOOLEAN    flags_tcp_fin_syn;
+
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_RX_LARGE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+                                                                /* ---------------- VALIDATE PROTOCOL ----------------- */
+    switch (p_buf_hdr->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_APP:
+        case NET_PROTOCOL_TYPE_SOCK:
+        case NET_PROTOCOL_TYPE_TCP_V4:
+        case NET_PROTOCOL_TYPE_TCP_V6:
+             ix  = (CPU_INT16U)p_buf_hdr->DataIx;
+             len = (CPU_INT16U)p_buf_hdr->DataLen;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxInvalidProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    if (ix == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxInvalidBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+    if (ix <  NET_TCP_HDR_SIZE_MIN) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxInvalidBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+
+
+                                                                /* -------------- VALIDATE TOT DATA LEN --------------- */
+    if (len != p_buf_hdr->TotLen) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrDataLenCtr);
+       *p_err = NET_TCP_ERR_INVALID_LEN_DATA;
+        return;
+    }
+
+
+
+                                                                /* ---------------- VALIDATE TCP PORTS ---------------- */
+    if (src_port  == NET_TCP_PORT_NBR_RESERVED) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrPortSrcCtr);
+       *p_err = NET_TCP_ERR_INVALID_PORT_NBR;
+        return;
+    }
+
+    if (dest_port == NET_TCP_PORT_NBR_RESERVED) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrPortDestCtr);
+       *p_err = NET_TCP_ERR_INVALID_PORT_NBR;
+        return;
+    }
+
+
+
+                                                                /* ---------------- VALIDATE TCP FLAGS ---------------- */
+    flag_mask = NET_TCP_FLAG_NONE     |
+                NET_TCP_FLAG_TX_CLOSE |
+                NET_TCP_FLAG_TX_SYNC  |
+                NET_TCP_FLAG_TX_RESET |
+                NET_TCP_FLAG_TX_PUSH  |
+                NET_TCP_FLAG_TX_ACK   |
+                NET_TCP_FLAG_TX_URGENT;
+                                                                /* If any invalid flags req'd, rtn err.                 */
+    if ((flags_tcp & (NET_TCP_FLAGS)~flag_mask) != NET_TCP_FLAG_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrFlagsCtr);
+       *p_err = NET_TCP_ERR_INVALID_FLAG;
+        return;
+    }
+
+#if 1                                                           /* Allow invalid 'SYN'/'FIN' flag combo.                */
+    flag_mask         = NET_TCP_FLAG_TX_SYNC |
+                        NET_TCP_FLAG_TX_FIN;
+    flags_tcp_fin_syn = DEF_BIT_IS_SET(flags_tcp, flag_mask);
+    if (flags_tcp_fin_syn != DEF_NO) {                          /* If invalid 'SYN'/'FIN' flag combo req'd, rtn err.    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrFlagsCtr);
+       *p_err = NET_TCP_ERR_INVALID_FLAG;
+        return;
+    }
+#endif
+
+
+
+                                                                /* ---------------- VALIDATE TCP OPTS ----------------- */
+    if (p_opts_tcp != (void *)0) {
+        NetTCP_TxPktValidateOpt(p_opts_tcp, flags_tcp, p_err);
+        if (*p_err != NET_TCP_ERR_NONE) {
+             return;
+        }
+    }
+
+
+
+                                                                /* ------------- IGNORE VALID TCP FIELDS -------------- */
+   (void)&seq_nbr;                                              /* Prevent 'variable unused' compiler warnings.         */
+   (void)&ack_nbr;
+   (void)&win_size;
+
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_TxPktValidateOpt()
+*
+* Description : Validate TCP transmit option configurations.
+*
+*               (1) TCP transmit options MUST be configured by appropriate transmit options configuration
+*                   data structure(s) passed via 'p_opts_tcp'; see 'net_tcp.h  TCP HEADER OPTION CONFIGURATION
+*                   DATA TYPES' for TCP options configuration.
+*
+*               (2) TCP header allows for a maximum option size of 40 octets (see 'net_tcp.h  TCP HEADER
+*                   OPTIONS DEFINES  Note #3').
+*
+*
+* Argument(s) : p_opts_tcp   Pointer to one or more TCP options configuration data structures (see Note #1) :
+*
+*                               NULL                            NO  TCP transmit         options configuration.
+*                               NET_TCP_OPT_CFG_MAX_SEG_SIZE    TCP Maximum Segment Size options configuration.
+*
+*               flags_tcp   Flags to select TCP transmit options; bit-field flags logically OR'd :
+*
+*                               NET_TCP_FLAG_NONE               No  TCP transmit flags selected.
+*                               NET_TCP_FLAG_TX_FIN             Set TCP 'FIN'    flag.
+*                               NET_TCP_FLAG_TX_SYNC            Set TCP 'SYN'    flag.
+*                               NET_TCP_FLAG_TX_RESET           Set TCP 'RESET'  flag.
+*                               NET_TCP_FLAG_TX_PUSH            Set TCP 'PUSH'   flag.
+*                               NET_TCP_FLAG_TX_ACK             Set TCP 'ACK'    flag.
+*                               NET_TCP_FLAG_TX_URGENT          Set TCP 'URGENT' flag.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP transmit option configurations validated.
+*                               NET_TCP_ERR_INVALID_OPT_TYPE    Invalid TCP option type.
+*                               NET_TCP_ERR_INVALID_OPT_CFG     Invalid TCP option configuration.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxPktValidate().
+*
+* Note(s)     : (3) (a) See 'net_tcp.h  TCP HEADER OPTIONS DEFINES' for   supported TCP options' summary.
+*
+*                   (b) See 'net_tcp.c  Note #1c'                   for unsupported TCP options.
+*
+*               (4) The following TCP transmit options MUST be configured exclusively--i.e. only one
+*                   of each of the following TCP options may be configured for any one TCP segment :
+*
+*                   (a) NET_TCP_OPT_TYPE_MAX_SEG_SIZE
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetTCP_TxPktValidateOpt (void           *p_opts_tcp,
+                                       NET_TCP_FLAGS   flags_tcp,
+                                       NET_ERR        *p_err)
+{
+    CPU_INT08U         opt_len_size;
+    CPU_INT08U         opt_len;
+    CPU_INT08U         opt_nbr_max_seg_size;
+    NET_TCP_OPT_TYPE  *p_opt_cfg_type;
+    void              *p_opt_cfg;
+    void              *p_opt_next;
+
+
+    opt_len_size         = 0u;
+    opt_nbr_max_seg_size = 0u;
+    p_opt_cfg             = p_opts_tcp;
+
+    while (p_opt_cfg  != (void *)0) {
+        p_opt_cfg_type = (NET_TCP_OPT_TYPE *)p_opt_cfg;
+        switch (*p_opt_cfg_type) {
+            case NET_TCP_OPT_TYPE_MAX_SEG_SIZE:                 /* ----------------- MAX SEG SIZE OPT ----------------- */
+                 if (opt_nbr_max_seg_size > 0) {                /* If > 1 max seg size opt, rtn err.                    */
+                     NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrOptCfgCtr);
+                    *p_err = NET_TCP_ERR_INVALID_OPT_CFG;
+                     return;
+                 }
+                 opt_nbr_max_seg_size++;
+
+                 NetTCP_TxPktValidateOptMaxSegSize(p_opt_cfg, &opt_len, &p_opt_next, flags_tcp, p_err);
+                 break;
+                                                                /* --------------- UNSUPPORTED TCP OPTS --------------- */
+                                                                /* See Note #3b.                                        */
+            case NET_TCP_OPT_TYPE_WIN_SCALE:
+            case NET_TCP_OPT_TYPE_SACK_PERMIT:
+            case NET_TCP_OPT_TYPE_SACK:
+            case NET_TCP_OPT_TYPE_ECHO_REQ:
+            case NET_TCP_OPT_TYPE_ECHO_REPLY:
+            case NET_TCP_OPT_TYPE_TS:
+            case NET_TCP_OPT_TYPE_NONE:                         /* ----------------- INVALID TCP OPTS ----------------- */
+            default:
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxOptTypeCtr);
+                *p_err = NET_TCP_ERR_INVALID_OPT_TYPE;
+                 return;
+        }
+
+        if (*p_err != NET_TCP_ERR_NONE) {
+             return;
+        }
+
+        opt_len_size += opt_len;
+        if (opt_len_size > NET_TCP_HDR_OPT_SIZE_MAX) {          /* If tot opt len exceeds max opt len, rtn err.         */
+            NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrOptLenCtr);
+           *p_err = NET_TCP_ERR_INVALID_OPT_LEN;
+            return;
+        }
+
+        p_opt_cfg = p_opt_next;                                 /* Validate next cfg opt.                               */
+    }
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_TxPktValidateOptMaxSegSize()
+*
+* Description : Validate TCP Maximum Segment Size option configuration.
+*
+*               (1) See 'net_tcp.h  TCP MAXIMUM SEGMENT SIZE OPTION CONFIGURATION DATA TYPE' for valid
+*                   TCP Maximum Segment Size option configuration.
+*
+*               (2) Return option values.
+*
+*
+* Argument(s) : p_opt_tcp    Pointer to TCP Maximum Segment Size option configuration data structure.
+*               --------    Argument checked   in NetTCP_TxPktValidateOpt().
+*
+*               p_opt_len    Pointer to variable that will receive the TCP Maximum Segment Size option length
+*               --------        (in octets).
+*
+*                           Argument validated in NetTCP_TxPktValidateOpt().
+*
+*               p_opt_next   Pointer to variable that will receive the pointer to the next TCP transmit option.
+*               ---------   Argument validated in NetTCP_TxPktValidateOpt().
+*
+*               flags_tcp   Flags to select TCP transmit options; bit-field flags logically OR'd :
+*
+*                               NET_TCP_FLAG_NONE               No  TCP transmit flags selected.
+*                               NET_TCP_FLAG_TX_FIN             Set TCP 'FIN'    flag.
+*                               NET_TCP_FLAG_TX_SYNC            Set TCP 'SYN'    flag.
+*                               NET_TCP_FLAG_TX_RESET           Set TCP 'RESET'  flag.
+*                               NET_TCP_FLAG_TX_PUSH            Set TCP 'PUSH'   flag.
+*                               NET_TCP_FLAG_TX_ACK             Set TCP 'ACK'    flag.
+*                               NET_TCP_FLAG_TX_URGENT          Set TCP 'URGENT' flag.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP Maximum Segment Size option
+*                                                                   configuration validated.
+*                               NET_TCP_ERR_INVALID_OPT_TYPE    Invalid TCP option type.
+*                               NET_TCP_ERR_INVALID_OPT_CFG     Invalid TCP option configuration.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxPktValidateOpt().
+*
+* Note(s)     : (3) RFC #793, Section 3.1 'Header Format : Options : Maximum Segment Size' states that a
+*                   TCP Maximum Segment Size option "must only be sent in the initial connection request
+*                   (i.e., in segments with the SYN control bit set)".
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetTCP_TxPktValidateOptMaxSegSize (void            *p_opt_tcp,
+                                                 CPU_INT08U      *p_opt_len,
+                                                 void           **p_opt_next,
+                                                 NET_TCP_FLAGS    flags_tcp,
+                                                 NET_ERR         *p_err)
+{
+    NET_TCP_OPT_CFG_MAX_SEG_SIZE  *p_opt_cfg_max_seg_size;
+    CPU_BOOLEAN                    flags_tcp_syn;
+
+
+    p_opt_cfg_max_seg_size = (NET_TCP_OPT_CFG_MAX_SEG_SIZE *)p_opt_tcp;
+
+
+                                                                /* -------------- VALIDATE MAX SEG SIZE --------------- */
+                                                                /* If max seg size > max, rtn err.                      */
+    if (p_opt_cfg_max_seg_size->MaxSegSize > NET_TCP_MAX_SEG_SIZE_MAX) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrOptCfgCtr);
+       *p_err = NET_TCP_ERR_INVALID_OPT_CFG;
+        return;
+    }
+
+                                                                /* -------------- VALIDATE OPT CFG/CTRL --------------- */
+    flags_tcp_syn = DEF_BIT_IS_SET(flags_tcp, NET_TCP_HDR_FLAG_SYNC);
+    if (flags_tcp_syn != DEF_YES) {                             /* If 'SYN' bit NOT set, rtn err (see Note #3).         */
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrOptCfgCtr);
+       *p_err = NET_TCP_ERR_INVALID_OPT_CFG;
+        return;
+    }
+
+
+                                                                /* ------------------- RTN OPT VALS ------------------- */
+   *p_opt_len  = NET_TCP_HDR_OPT_LEN_MAX_SEG_SIZE;
+   *p_opt_next = p_opt_cfg_max_seg_size->NextOptPtr;
+   *p_err      = NET_TCP_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           NetTCP_TxPktIPv4
+*
+* Description : (1) Prepare TCP header & transmit TCP packet to network layer :
+*
+*                   (a) Prepare   TCP options (if any)
+*                   (b) Calculate TCP header buffer controls
+*                   (c) Prepare   TCP header
+*                   (d) Transmit  TCP packet
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer to transmit TCP packet.
+*               ----        Argument checked   in NetTCP_TxPktHandler().
+*
+*               p_buf_hdr    Pointer to network buffer header.
+*               --------    Argument validated in NetTCP_TxPktHandler().
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      TCP port.
+*               --------    Argument checked   in NetTCP_TxPktValidate().
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination TCP port.
+*               ---------   Argument checked   in NetTCP_TxPktValidate().
+*
+*               seq_nbr     TCP segment                 sequence number.
+*               -------     Argument validated in NetTCP_TxPktValidate().
+*
+*               ack_nbr     TCP segment acknowledgement sequence number.
+*               -------     Argument validated in NetTCP_TxPktValidate().
+*
+*               win_size    TCP receive window advertisement size.
+*               --------    Argument validated in NetTCP_TxPktValidate().
+*
+*               TOS         Specific TOS to transmit TCP/IP packet
+*                               (see 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit TCP/IP packet
+*                               (see 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IP_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IP_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IP_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IP_TTL_NONE                 Replace with default TTL
+*
+*               flags_tcp   Flags to select TCP transmit options; bit-field flags logically OR'd :
+*               ---------
+*                               NET_TCP_FLAG_NONE               No  TCP transmit flags selected.
+*                               NET_TCP_FLAG_TX_FIN             Set TCP 'FIN'    flag.
+*                               NET_TCP_FLAG_TX_SYNC            Set TCP 'SYN'    flag.
+*                               NET_TCP_FLAG_TX_RESET           Set TCP 'RESET'  flag.
+*                               NET_TCP_FLAG_TX_PUSH            Set TCP 'PUSH'   flag.
+*                               NET_TCP_FLAG_TX_ACK             Set TCP 'ACK'    flag.
+*                               NET_TCP_FLAG_TX_URGENT          Set TCP 'URGENT' flag.
+*
+*                           Argument checked   in NetTCP_TxPktValidate().
+*
+*               flags_ip    Flags to select IP  transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IP_FLAG_NONE                No  IP transmit flags selected.
+*                               NET_IP_FLAG_TX_DONT_FRAG        Set IP 'Don't Frag' flag.
+*
+*               p_opts_tcp   Pointer to one or more TCP options configuration data structures :
+*               ---------
+*                               NULL                            NO  TCP transmit         options configuration.
+*                               NET_TCP_OPT_CFG_MAX_SEG_SIZE    TCP Maximum Segment Size options configuration.
+*
+*                           Argument checked   in NetTCP_TxPktValidate().
+*
+*               p_opts_ip    Pointer to one or more IP  options configuration data structures
+*                               (see 'net_ip.h  IP HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IP_OPT_CFG_ROUTE_TS         Route &/or Internet Timestamp options configuration.
+*                               NET_IP_OPT_CFG_SECURITY         Security options configuration
+*                                                                   (see 'net_ip.c  Note #1e').
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_INVALID_LEN_HDR     Invalid TCP header length.
+*
+*                                                               - RETURNED BY NetTCP_TxPktPrepareOpt() : --
+*                               NET_TCP_ERR_INVALID_OPT_TYPE    Invalid TCP option type.
+*                               NET_TCP_ERR_INVALID_OPT_LEN     Invalid TCP option length.
+*
+*                                                               - RETURNED BY NetTCP_TxPktPrepareHdr() : --
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*                               NET_BUF_ERR_INVALID_LEN         Invalid buffer length.
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*
+*                                                               -------- RETURNED BY NetIP_Tx() : ---------
+*                               NET_IP_ERR_NONE                 TCP/IP packet     successfully transmitted.
+*                               NET_IP_ERR_TX_PKT               TCP/IP packet NOT successfully prepared or
+*                                                                   transmitted.
+*                               NET_ERR_TX                      Transmit error.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxPktHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IPv4_MODULE_EN
+static  void  NetTCP_TxPktIPv4 (NET_BUF           *p_buf,
+                                NET_BUF_HDR       *p_buf_hdr,
+                                NET_IPv4_ADDR      src_addr,
+                                NET_TCP_PORT_NBR   src_port,
+                                NET_IPv4_ADDR      dest_addr,
+                                NET_TCP_PORT_NBR   dest_port,
+                                NET_TCP_SEQ_NBR    seq_nbr,
+                                NET_TCP_SEQ_NBR    ack_nbr,
+                                NET_TCP_WIN_SIZE   win_size,
+                                NET_IPv4_TOS       TOS,
+                                NET_IPv4_TTL       TTL,
+                                NET_TCP_FLAGS      flags_tcp,
+                                NET_IPv4_FLAGS     flags_ip,
+                                void              *p_opts_tcp,
+                                void              *p_opts_ip,
+                                NET_ERR           *p_err)
+{
+    CPU_INT08U         tcp_opt_len_size;
+    CPU_INT16U         tcp_hdr_len_size;
+    NET_TCP_OPT_SIZE   tcp_hdr_opts[NET_TCP_HDR_OPT_NBR_MAX];
+
+
+                                                                /* ----------------- PREPARE TCP OPTS ----------------- */
+    if (p_opts_tcp != (void *)0) {
+        tcp_opt_len_size = NetTCP_TxPktPrepareOpt((void       *) p_opts_tcp,
+                                                  (CPU_INT08U *)&tcp_hdr_opts[0],
+                                                  (NET_ERR    *) p_err);
+        if (*p_err != NET_TCP_ERR_NONE) {
+             return;
+        }
+    } else {
+        tcp_opt_len_size = 0u;
+    }
+
+                                                                /* ---------------- CALC TCP HDR CTRLS ---------------- */
+                                                                /* Calc tot TCP hdr len (in octets).                    */
+    tcp_hdr_len_size = (CPU_INT16U)(NET_TCP_HDR_SIZE_MIN + tcp_opt_len_size);
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (tcp_hdr_len_size > NET_TCP_HDR_SIZE_MAX) {
+       *p_err = NET_TCP_ERR_INVALID_LEN_HDR;
+        return;
+    }
+#endif
+
+
+                                                                /* ----------------- PREPARE TCP HDR ------------------ */
+    NetTCP_TxPktPrepareHdr(p_buf,
+                           p_buf_hdr,
+                           tcp_hdr_len_size,
+                           tcp_opt_len_size,
+                           sizeof(NET_IPv4_ADDR),
+                          &src_addr,
+                           src_port,
+                          &dest_addr,
+                           dest_port,
+                           seq_nbr,
+                           ack_nbr,
+                           win_size,
+                           flags_tcp,
+                          &tcp_hdr_opts[0],
+                           p_err);
+
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* -------------------- TX TCP PKT -------------------- */
+    NetIPv4_Tx( p_buf,
+                src_addr,
+                dest_addr,
+                TOS,
+                TTL,
+                flags_ip,
+                p_opts_ip,
+                p_err);
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                          NetTCP_TxPktIPv6()
+*
+* Description : (1) Prepare TCP header & transmit TCP packet to network layer :
+*
+*                   (a) Prepare   TCP options (if any)
+*                   (b) Calculate TCP header buffer controls
+*                   (c) Prepare   TCP header
+*                   (d) Transmit  TCP packet
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer to transmit TCP packet.
+*               ----        Argument checked   in NetTCP_TxPktHandler().
+*
+*               p_buf_hdr    Pointer to network buffer header.
+*               --------    Argument validated in NetTCP_TxPktHandler().
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      TCP port.
+*               --------    Argument checked   in NetTCP_TxPktValidate().
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination TCP port.
+*               ---------   Argument checked   in NetTCP_TxPktValidate().
+*
+*               seq_nbr     TCP segment                 sequence number.
+*               -------     Argument validated in NetTCP_TxPktValidate().
+*
+*               ack_nbr     TCP segment acknowledgement sequence number.
+*               -------     Argument validated in NetTCP_TxPktValidate().
+*
+*               win_size    TCP receive window advertisement size.
+*               --------    Argument validated in NetTCP_TxPktValidate().
+*
+*               TOS         Specific TOS to transmit TCP/IP packet
+*                               (see 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit TCP/IP packet
+*                               (see 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IP_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IP_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IP_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IP_TTL_NONE                 Replace with default TTL
+*
+*               flags_tcp   Flags to select TCP transmit options; bit-field flags logically OR'd :
+*               ---------
+*                               NET_TCP_FLAG_NONE               No  TCP transmit flags selected.
+*                               NET_TCP_FLAG_TX_FIN             Set TCP 'FIN'    flag.
+*                               NET_TCP_FLAG_TX_SYNC            Set TCP 'SYN'    flag.
+*                               NET_TCP_FLAG_TX_RESET           Set TCP 'RESET'  flag.
+*                               NET_TCP_FLAG_TX_PUSH            Set TCP 'PUSH'   flag.
+*                               NET_TCP_FLAG_TX_ACK             Set TCP 'ACK'    flag.
+*                               NET_TCP_FLAG_TX_URGENT          Set TCP 'URGENT' flag.
+*
+*                           Argument checked   in NetTCP_TxPktValidate().
+*
+*               flags_ip    Flags to select IP  transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IP_FLAG_NONE                No  IP transmit flags selected.
+*                               NET_IP_FLAG_TX_DONT_FRAG        Set IP 'Don't Frag' flag.
+*
+*               p_opts_tcp  Pointer to one or more TCP options configuration data structures :
+*               ---------
+*                               NULL                            NO  TCP transmit         options configuration.
+*                               NET_TCP_OPT_CFG_MAX_SEG_SIZE    TCP Maximum Segment Size options configuration.
+*
+*                           Argument checked   in NetTCP_TxPktValidate().
+*
+*               p_opts_ip   Pointer to one or more IP  options configuration data structures
+*                               (see 'net_ip.h  IP HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IP_OPT_CFG_ROUTE_TS         Route &/or Internet Timestamp options configuration.
+*                               NET_IP_OPT_CFG_SECURITY         Security options configuration
+*                                                                   (see 'net_ip.c  Note #1e').
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_INVALID_LEN_HDR     Invalid TCP header length.
+*
+*                                                               - RETURNED BY NetTCP_TxPktPrepareOpt() : --
+*                               NET_TCP_ERR_INVALID_OPT_TYPE    Invalid TCP option type.
+*                               NET_TCP_ERR_INVALID_OPT_LEN     Invalid TCP option length.
+*
+*                                                               - RETURNED BY NetTCP_TxPktPrepareHdr() : --
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*                               NET_BUF_ERR_INVALID_LEN         Invalid buffer length.
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*
+*                                                               -------- RETURNED BY NetIP_Tx() : ---------
+*                               NET_IP_ERR_NONE                 TCP/IP packet     successfully transmitted.
+*                               NET_IP_ERR_TX_PKT               TCP/IP packet NOT successfully prepared or
+*                                                                   transmitted.
+*                               NET_ERR_TX                      Transmit error.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxPktHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+static  void  NetTCP_TxPktIPv6 (NET_BUF                 *p_buf,
+                                NET_BUF_HDR             *p_buf_hdr,
+                                NET_IPv6_ADDR           *p_src_addr,
+                                NET_TCP_PORT_NBR         src_port,
+                                NET_IPv6_ADDR           *p_dest_addr,
+                                NET_TCP_PORT_NBR         dest_port,
+                                NET_TCP_SEQ_NBR          seq_nbr,
+                                NET_TCP_SEQ_NBR          ack_nbr,
+                                NET_TCP_WIN_SIZE         win_size,
+                                NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                NET_IPv6_FLOW_LABEL      flow_label,
+                                NET_IPv6_HOP_LIM         hop_lim,
+                                NET_TCP_FLAGS            flags_tcp,
+                                void                    *p_opts_tcp,
+                                NET_ERR                 *p_err)
+{
+    CPU_INT08U         tcp_opt_len_size;
+    CPU_INT16U         tcp_hdr_len_size;
+    NET_TCP_OPT_SIZE   tcp_hdr_opts[NET_TCP_HDR_OPT_NBR_MAX];
+
+
+                                                                /* ----------------- PREPARE TCP OPTS ----------------- */
+    if (p_opts_tcp != (void *)0) {
+        tcp_opt_len_size = NetTCP_TxPktPrepareOpt((void       *) p_opts_tcp,
+                                                  (CPU_INT08U *)&tcp_hdr_opts[0],
+                                                  (NET_ERR    *) p_err);
+        if (*p_err != NET_TCP_ERR_NONE) {
+             return;
+        }
+    } else {
+        tcp_opt_len_size = 0u;
+    }
+
+                                                                /* ---------------- CALC TCP HDR CTRLS ---------------- */
+                                                                /* Calc tot TCP hdr len (in octets).                    */
+    tcp_hdr_len_size = (CPU_INT16U)(NET_TCP_HDR_SIZE_MIN + tcp_opt_len_size);
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (tcp_hdr_len_size > NET_TCP_HDR_SIZE_MAX) {
+       *p_err = NET_TCP_ERR_INVALID_LEN_HDR;
+        return;
+    }
+#endif
+
+
+                                                                /* ----------------- PREPARE TCP HDR ------------------ */
+    NetTCP_TxPktPrepareHdr(p_buf,
+                           p_buf_hdr,
+                           tcp_hdr_len_size,
+                           tcp_opt_len_size,
+                           sizeof(NET_IPv6_ADDR),
+                           p_src_addr,
+                           src_port,
+                           p_dest_addr,
+                           dest_port,
+                           seq_nbr,
+                           ack_nbr,
+                           win_size,
+                           flags_tcp,
+                          &tcp_hdr_opts[0],
+                           p_err);
+
+    if (*p_err != NET_TCP_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* -------------------- TX TCP PKT -------------------- */
+
+    NetIPv6_Tx(                        p_buf,
+                                       p_src_addr,
+                                       p_dest_addr,
+               (NET_IPv6_EXT_HDR     *)0,
+                                       traffic_class,
+                                       flow_label,
+                                       hop_lim,
+                                       p_err);
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_TxPktPrepareOpt()
+*
+* Description : (1) Prepare TCP header with TCP transmit options :
+*
+*                   (a) Prepare ALL TCP options from configuration
+*                           data structure(s)
+*                   (b) Pad remaining TCP header octets                     See RFC #793, Section 3.1
+*                                                                               'Header Format : Padding'
+*
+*               (2) TCP transmit options MUST be configured by appropriate options configuration data
+*                   structure(s) passed via 'p_opts_tcp'; see 'net_tcp.h  TCP HEADER OPTION CONFIGURATION
+*                   DATA TYPES' for TCP options configuration.
+*
+*
+* Argument(s) : p_opts_tcp   Pointer to one or more TCP options configuration data structures :
+*               ---------
+*                               NULL                            NO  TCP transmit         options configuration.
+*                               NET_TCP_OPT_CFG_MAX_SEG_SIZE    TCP Maximum Segment Size options configuration.
+*
+*                           Argument checked   in NetTCP_TxPkt().
+*
+*               p_opt_hdr    Pointer to TCP transmit option buffer to prepare TCP options.
+*               --------    Argument validated in NetTCP_TxPkt().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP header options successfully prepared.
+*                               NET_TCP_ERR_INVALID_OPT_TYPE    Invalid TCP option type.
+*                               NET_TCP_ERR_INVALID_OPT_LEN     Invalid TCP option length.
+*
+* Return(s)   : Total TCP option length (in octets), if NO error(s).
+*
+*               0,                                   otherwise.
+*
+* Caller(s)   : NetTCP_TxPkt().
+*
+* Note(s)     : (3) (a) See 'net_tcp.h  TCP HEADER OPTIONS DEFINES' for   supported TCP options' summary.
+*
+*                   (b) See 'net_tcp.c  Note #1c'                   for unsupported TCP options.
+*
+*               (4) Transmit arguments & options validated in NetTCP_TxPktValidate()/NetTCP_TxPktValidateOpt() :
+*
+*                   (a) Assumes ALL   transmit arguments & options are valid.
+*                   (b) Assumes total transmit options' lengths    are valid.
+*
+*               (5) TCP header allows for a maximum option size of 40 octets (see 'net_tcp.h  TCP HEADER
+*                   OPTIONS DEFINES  Note #3').
+*
+*               (6) (a) RFC # 793, Section 3.1 'Options' states that each option is "a multiple of 8 bits
+*                       in length" and "may begin on any octet boundary".
+*
+*                   (b) Since TCP options are NOT required or guaranteed to align multi-octet words on
+*                       appropriate word boundaries, ALL TCP options are prepared a single octet at a time.
+*
+*               (7) Default case already invalidated in NetTCP_TxPktValidateOpt().  However, the default
+*                   case is included as an extra precaution in case any of the TCP transmit options types
+*                   are incorrectly modified.
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  NetTCP_TxPktPrepareOpt (void        *p_opts_tcp,
+                                            CPU_INT08U  *p_opt_hdr,
+                                            NET_ERR     *p_err)
+{
+    CPU_INT08U         tcp_opt_len_tot;
+    CPU_INT08U         tcp_opt_len;
+    CPU_INT08U        *p_opt_cfg_hdr;
+    NET_TCP_OPT_TYPE  *p_opt_cfg_type;
+    void              *p_opt_next;
+    void              *p_opt_cfg;
+
+
+    tcp_opt_len_tot = 0u;
+    p_opt_cfg        = p_opts_tcp;
+    p_opt_cfg_hdr    = p_opt_hdr;
+                                                                /* ----------------- PREPARE TCP OPTS ----------------- */
+    while (p_opt_cfg  != (void *)0) {                           /* Prepare ALL cfg'd TCP opts (see Note #1a).           */
+        p_opt_cfg_type = (NET_TCP_OPT_TYPE *)p_opt_cfg;
+        switch (*p_opt_cfg_type) {
+            case NET_TCP_OPT_TYPE_MAX_SEG_SIZE:
+                 NetTCP_TxPktPrepareOptMaxSegSize(p_opt_cfg, p_opt_cfg_hdr, &tcp_opt_len, &p_opt_next, p_err);
+                 break;
+                                                                /* --------------- UNSUPPORTED TCP OPTS --------------- */
+                                                                /* See Note #3b.                                        */
+            case NET_TCP_OPT_TYPE_WIN_SCALE:
+            case NET_TCP_OPT_TYPE_SACK_PERMIT:
+            case NET_TCP_OPT_TYPE_SACK:
+            case NET_TCP_OPT_TYPE_ECHO_REQ:
+            case NET_TCP_OPT_TYPE_ECHO_REPLY:
+            case NET_TCP_OPT_TYPE_TS:
+            case NET_TCP_OPT_TYPE_NONE:                         /* ----------------- INVALID TCP OPTS ----------------- */
+            default:                                            /* See Note #7.                                         */
+                 NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxOptTypeCtr);
+                *p_err =  NET_TCP_ERR_INVALID_OPT_TYPE;
+                 return (0u);
+        }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (*p_err != NET_TCP_ERR_NONE) {                       /* See Note #4a.                                        */
+             return (0u);
+        }
+        if (tcp_opt_len_tot > NET_TCP_HDR_OPT_SIZE_MAX) {       /* See Note #4b.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrOptLenCtr);
+           *p_err =  NET_TCP_ERR_INVALID_OPT_LEN;
+            return (0u);
+        }
+#endif
+
+        tcp_opt_len_tot += tcp_opt_len;
+        p_opt_cfg_hdr    += tcp_opt_len;
+
+        p_opt_cfg         = p_opt_next;                         /* Prepare next cfg opt.                                */
+    }
+
+
+                                                                /* ------------------- PAD TCP HDR -------------------- */
+    if (tcp_opt_len_tot > 0) {
+                                                                /* Pad rem'ing TCP hdr octets (see Note #1b).           */
+        while ((tcp_opt_len_tot %  NET_TCP_HDR_OPT_SIZE_WORD) &&
+               (tcp_opt_len_tot <= NET_TCP_HDR_OPT_SIZE_MAX )) {
+           *p_opt_cfg_hdr = NET_TCP_HDR_OPT_PAD;
+            p_opt_cfg_hdr++;
+            tcp_opt_len_tot++;
+        }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (tcp_opt_len_tot > NET_TCP_HDR_OPT_SIZE_MAX) {       /* See Note #4b.                                        */
+            NET_CTR_ERR_INC(Net_ErrCtrs.TCP.TxHdrOptLenCtr);
+           *p_err =  NET_TCP_ERR_INVALID_OPT_LEN;
+            return (0u);
+        }
+#endif
+    }
+
+
+   *p_err =  NET_TCP_ERR_NONE;
+
+    return (tcp_opt_len_tot);
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                 NetTCP_TxPktPrepareOptMaxSegSize()
+*
+* Description : (1) Prepare TCP header with TCP Maximum Segment Size option :
+*
+*                   (a) Prepare TCP Maximum Segment Size option
+*                   (b) Return option values
+*
+*
+* Argument(s) : p_opts_tcp   Pointer to TCP Maximum Segment Size option configuration data structure.
+*               ---------   Argument checked   in NetTCP_TxPkt().
+*
+*               p_opt_hdr    Pointer to TCP transmit option buffer to prepare TCP Maximum Segment Size option.
+*               --------    Argument validated in NetTCP_TxPkt().
+*
+*               p_opt_len    Pointer to variable that will receive the returned TCP option length (in octets).
+*               --------    Argument validated in NetTCP_TxPktPrepareOpt().
+*
+*               p_opt_next   Pointer to variable that will receive the pointer to the next TCP transmit option.
+*               --------    Argument validated in NetTCP_TxPktPrepareOpt().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP Maximum Segment Size option successfully
+*                                                                   prepared.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxPktPrepareOpt().
+*
+* Note(s)     : (2) See 'net_tcp.h  TCP HEADER OPTIONS DEFINES  Note #2b1' for TCP Maximum Segment Size
+*                   option summary.
+*
+*               (3) Transmit arguments & options validated in NetTCP_TxPktValidate()/NetTCP_TxPktValidateOpt() :
+*                   (a) Assumes ALL   transmit arguments & options are valid.
+*                   (b) Assumes total transmit options' lengths    are valid.
+*
+*               (4) (a) RFC # 793, Section 3.1 'Options' states that each option is "a multiple of 8 bits
+*                       in length" and "may begin on any octet boundary".
+*
+*                   (b) Since TCP options are NOT required or guaranteed to align multi-octet words on
+*                       appropriate word boundaries, ALL TCP options are prepared a single octet at a time.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxPktPrepareOptMaxSegSize (void         *p_opts_tcp,
+                                                CPU_INT08U   *p_opt_hdr,
+                                                CPU_INT08U   *p_opt_len,
+                                                void        **p_opt_next,
+                                                NET_ERR      *p_err)
+{
+    NET_TCP_OPT_CFG_MAX_SEG_SIZE  *p_opt_cfg_max_seg_size;
+    CPU_INT08U                    *p_opt_cfg_hdr;
+    CPU_INT08U                     opt_len;
+    CPU_INT08U                     max_seg_size_hi;
+    CPU_INT08U                     max_seg_size_lo;
+
+
+                                                                /* ------------- PREPARE MAX SEG SIZE OPT ------------- */
+    p_opt_cfg_max_seg_size = (NET_TCP_OPT_CFG_MAX_SEG_SIZE *)p_opts_tcp;
+    p_opt_cfg_hdr          =  p_opt_hdr;
+
+    opt_len                =  NET_TCP_HDR_OPT_LEN_MAX_SEG_SIZE;
+    max_seg_size_hi        = (CPU_INT08U)(p_opt_cfg_max_seg_size->MaxSegSize >> DEF_OCTET_NBR_BITS);
+    max_seg_size_lo        = (CPU_INT08U) p_opt_cfg_max_seg_size->MaxSegSize;
+
+
+   *p_opt_cfg_hdr = NET_TCP_HDR_OPT_MAX_SEG_SIZE;               /* Prepare opt type.                                    */
+    p_opt_cfg_hdr++;
+
+   *p_opt_cfg_hdr = opt_len;                                    /* Prepare opt len.                                     */
+    p_opt_cfg_hdr++;
+
+   *p_opt_cfg_hdr = max_seg_size_hi;                            /* Prepare max seg size val.                            */
+    p_opt_cfg_hdr++;
+
+   *p_opt_cfg_hdr = max_seg_size_lo;
+
+
+                                                                /* ------------------- RTN OPT VALS ------------------- */
+   *p_opt_len  = opt_len;
+   *p_opt_next = p_opt_cfg_max_seg_size->NextOptPtr;
+
+   *p_err      = NET_TCP_ERR_NONE;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_TxPktPrepareHdr()
+*
+* Description : (1) Prepare TCP header :
+*
+*                   (a) Update network buffer's protocol index & length controls
+*
+*                   (b) Prepare the transmit packet's following TCP header fields :
+*
+*                       (1) Source      Port
+*                       (2) Destination Port
+*                       (3) Sequence        Number
+*                       (4) Acknowledgement Number
+*                       (5) Header Length/Flags
+*                       (6) Window Advertisement
+*                       (7) Check-Sum                                       See Note #3
+*                       (8) Urgent Pointer                                  See Note #2
+*                       (9) Options
+*
+*                   (c) Convert the following TCP header fields from host-order to network-order :
+*
+*                       (1) Source      Port
+*                       (2) Destination Port
+*                       (3) Sequence        Number
+*                       (4) Acknowledgement Number
+*                       (5) Header Length/Flags
+*                       (6) Window Advertisement
+*                       (7) Check-Sum                                       See Note #3e
+*                       (8) Urgent Pointer                                  See Note #2
+*
+*                   (d) Get TCP packet RTT timestamp transmitted            See 'NetTCP_TxConnRTT_RTO_Calc()
+*                                                                                   Note #2a2A1'
+*
+*
+* Argument(s) : p_buf               Pointer to network buffer to transmit TCP packet.
+*               ----                Argument checked   in NetTCP_TxPktHandler().
+*
+*               p_buf_hdr           Pointer to network buffer header.
+*               --------            Argument validated in NetTCP_TxPktHandler().
+*
+*               tcp_hdr_len_tot     Total TCP header length.
+*               ---------------     Argument checked   in NetTCP_TxPkt().
+*
+*               tcp_opt_len_tot     Total TCP header options' length.
+*               ---------------     Argument checked   in NetTCP_TxPktPrepareOpt().
+*
+*               src_addr            Source      IP  address.
+*
+*               src_port            Source      TCP port.
+*               --------            Argument checked   in NetTCP_TxPktValidate().
+*
+*               dest_addr           Destination IP  address.
+*
+*               dest_port           Destination TCP port.
+*               ---------           Argument checked   in NetTCP_TxPktValidate().
+*
+*               seq_nbr             TCP segment                 sequence number.
+*               -------             Argument validated in NetTCP_TxPktValidate().
+*
+*               ack_nbr             TCP segment acknowledgment sequence number.
+*               -------             Argument validated in NetTCP_TxPktValidate().
+*
+*               win_size            TCP receive window advertisement size.
+*               --------            Argument validated in NetTCP_TxPktValidate().
+*
+*               flags_tcp           Flags to select TCP transmit options; bit-field flags logically OR'd :
+*               ---------
+*                                       NET_TCP_FLAG_NONE               No  TCP transmit flags selected.
+*                                       NET_TCP_FLAG_TX_FIN             Set TCP 'FIN'    flag.
+*                                       NET_TCP_FLAG_TX_SYNC            Set TCP 'SYN'    flag.
+*                                       NET_TCP_FLAG_TX_RESET           Set TCP 'RESET'  flag.
+*                                       NET_TCP_FLAG_TX_PUSH            Set TCP 'PUSH'   flag.
+*                                       NET_TCP_FLAG_TX_ACK             Set TCP 'ACK'    flag.
+*                                       NET_TCP_FLAG_TX_URGENT          Set TCP 'URGENT' flag.
+*
+*                                   Argument checked   in NetTCP_TxPktValidate().
+*
+*               p_tcp_hdr_opts      Pointer to TCP options buffer.
+*               -------------       Argument checked   in NetTCP_TxPktPrepareOpt().
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TCP_ERR_NONE                TCP header successfully prepared.
+*
+*                                                               ----------- RETURNED BY NetBuf_DataWr() : ------------
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index  for transmit options.
+*                               NET_BUF_ERR_INVALID_LEN         Invalid buffer length for transmit options.
+*
+*                                                               - RETURNED BY NetUtil_16BitOnesCplChkSumDataCalc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxPkt().
+*
+* Note(s)     : (2) Urgent pointer & data NOT supported (see 'net_tcp.c  Note #1b').
+*
+*               (3) (a) TCP header Check-Sum MUST be calculated AFTER the entire TCP header has been prepared.
+*                       In addition, ALL multi-octet words are converted from host-order to network-order
+*                       since "the sum of 16-bit integers can be computed in either byte order" [RFC #1071,
+*                       Section 2.(B)].
+*
+*                   (b) TCP header Check-Sum field MUST be cleared to '0' BEFORE the TCP header Check-Sum is
+*                       calculated (see RFC #793, Section 3.1 'Header Format : Checksum').
+*
+*                   (c) (1) In addition to the TCP segment header & data, the TCP Check-Sum calculation
+*                           includes "a 96-bit pseudo header conceptually prefixed to the TCP header ...
+*                           [which] contains the Source Address, the Destination Address, the Protocol,
+*                           and TCP length" (see RFC #793, Section 3.1 'Header Format : Checksum').
+*
+*                       (2) Since network check-sum functions REQUIRE that 16-bit one's-complement check-
+*                           sum calculations be performed on headers & data arranged in network-order (see
+*                           'net_util.c  NetUtil_16BitOnesCplChkSumDataCalc()  Note #3'), TCP pseudo-header
+*                           values MUST be set or converted to network-order.
+*
+*                   (d) RFC #793, Section 3.1 'Header Format : Checksum' specifies that "if a segment contains
+*                       an odd number of header and text octets ... the last octet is padded ... with zeros to
+*                       form a 16-bit word for checksum purposes".
+*
+*                       See also 'net_util.c  NetUtil_16BitSumDataCalc()  Note #8'.
+*
+*                   (e) The TCP header Check-Sum field is returned in network-order & MUST NOT be re-
+*                       converted back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumDataCalc()
+*                       Note #4').
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxPktPrepareHdr (NET_BUF           *p_buf,
+                                      NET_BUF_HDR       *p_buf_hdr,
+                                      CPU_INT16U         tcp_hdr_len_tot,
+                                      CPU_INT08U         tcp_opt_len_tot,
+                                      CPU_INT16U         addr_size,
+                                      void              *p_src_addr,
+                                      NET_TCP_PORT_NBR   src_port,
+                                      void              *p_dest_addr,
+                                      NET_TCP_PORT_NBR   dest_port,
+                                      NET_TCP_SEQ_NBR    seq_nbr,
+                                      NET_TCP_SEQ_NBR    ack_nbr,
+                                      NET_TCP_WIN_SIZE   win_size,
+                                      NET_TCP_FLAGS      flags_tcp,
+                                      CPU_INT32U        *p_tcp_hdr_opts,
+                                      NET_ERR           *p_err)
+{
+#if (( defined(NET_IPv4_MODULE_EN)) && \
+     (!defined(NET_TCP_CHK_SUM_OFFLOAD_TX)))
+    NET_IPv4_ADDR        *p_src_addrv4;
+    NET_IPv4_ADDR        *p_dest_addrv4;
+    NET_TCP_PSEUDO_HDR    tcp_pseudo_hdr;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_PSEUDO_HDR   ipv6_pseudo_hdr;
+#endif
+    NET_TCP_HDR          *p_tcp_hdr;
+    CPU_INT16U            tcp_hdr_len;
+    NET_TCP_HDR_FLAGS     tcp_flags;
+    NET_TCP_HDR_FLAGS     tcp_hdr_len_flags;
+    CPU_INT16U            tcp_opt_ix;
+    NET_CHK_SUM           tcp_chk_sum;
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+    p_buf_hdr->TransportHdrLen   =  tcp_hdr_len_tot;
+    p_buf_hdr->TransportHdrIx    =  p_buf_hdr->DataIx - p_buf_hdr->TransportHdrLen;
+
+    p_buf_hdr->TotLen           += (NET_BUF_SIZE)p_buf_hdr->TransportHdrLen;
+    p_buf_hdr->TransportTotLen   = (CPU_INT16U  )p_buf_hdr->TotLen;
+    p_buf_hdr->TransportDataLen  = (CPU_INT16U  )p_buf_hdr->DataLen;
+
+
+
+
+                                                                /* ----------------- PREPARE TCP HDR ------------------ */
+    p_tcp_hdr = (NET_TCP_HDR *)&p_buf->DataPtr[p_buf_hdr->TransportHdrIx];
+
+
+
+                                                                /* ---------------- PREPARE TCP PORTS ----------------- */
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_tcp_hdr->PortSrc,  &src_port);
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_tcp_hdr->PortDest, &dest_port);
+
+
+
+                                                                /* --------------- PREPARE TCP SEQ NBRS --------------- */
+    NET_UTIL_VAL_COPY_SET_NET_32(&p_tcp_hdr->SeqNbr, &seq_nbr);
+    NET_UTIL_VAL_COPY_SET_NET_32(&p_tcp_hdr->AckNbr, &ack_nbr);
+
+
+
+                                                                /* ------------ PREPARE TCP HDR LEN/FLAGS ------------- */
+    tcp_hdr_len        =  p_buf_hdr->TransportHdrLen / NET_TCP_HDR_LEN_WORD_SIZE;
+    tcp_hdr_len      <<=  NET_TCP_HDR_LEN_SHIFT;
+
+    tcp_flags          = (NET_TCP_HDR_FLAGS)NET_TCP_HDR_FLAG_NONE;
+    tcp_flags         |= (NET_TCP_HDR_FLAGS)flags_tcp;
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    tcp_hdr_len       &=  NET_TCP_HDR_LEN_MASK;
+    tcp_flags         &=  NET_TCP_HDR_FLAG_MASK;
+#endif
+
+    tcp_hdr_len_flags  = (NET_TCP_HDR_FLAGS)tcp_hdr_len  | tcp_flags;
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_tcp_hdr->HdrLen_Flags, &tcp_hdr_len_flags);
+
+
+
+                                                                /* ----------------- PREPARE TCP WIN ------------------ */
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_tcp_hdr->WinSize, &win_size);
+
+
+                                                                /* -------------- PREPARE TCP URGENT PTR -------------- */
+                                                                /* See Note #2.                                         */
+    NET_UTIL_VAL_SET_NET_16(&p_tcp_hdr->UrgentPtr, NET_TCP_HDR_URG_PTR_NONE);
+
+
+
+                                                                /* ----------------- PREPARE TCP OPTS ----------------- */
+    if (tcp_opt_len_tot > 0) {
+        tcp_opt_ix = p_buf_hdr->TransportHdrIx + NET_TCP_HDR_OPT_IX;
+        NetBuf_DataWr((NET_BUF    *)p_buf,
+                      (NET_BUF_SIZE)tcp_opt_ix,
+                      (NET_BUF_SIZE)tcp_opt_len_tot,
+                      (CPU_INT08U *)p_tcp_hdr_opts,
+                      (NET_ERR    *)p_err);
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (*p_err != NET_BUF_ERR_NONE) {
+             return;
+        }
+#endif
+    }
+
+
+
+                                                                /* --------------- PREPARE TCP CHK SUM ---------------- */
+    NET_UTIL_VAL_SET_NET_16(&p_tcp_hdr->ChkSum, 0x0000u);       /* Clr TCP chk sum            (see Note #3b).           */
+                                                                /* Cfg TCP chk sum pseudo-hdr (see Note #3c).           */
+    if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+        p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_TCP_V4;
+        p_buf_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_TCP_V4;
+
+#ifdef NET_TCP_CHK_SUM_OFFLOAD_TX
+        tcp_chk_sum = 0u;
+#else
+        p_src_addrv4            = (NET_IPv4_ADDR *)p_src_addr;
+        p_dest_addrv4           = (NET_IPv4_ADDR *)p_dest_addr;
+        tcp_pseudo_hdr.AddrSrc  = (NET_IPv4_ADDR  )NET_UTIL_HOST_TO_NET_32(*p_src_addrv4);
+        tcp_pseudo_hdr.AddrDest = (NET_IPv4_ADDR  )NET_UTIL_HOST_TO_NET_32(*p_dest_addrv4);
+        tcp_pseudo_hdr.Zero     = 0x00u;
+        tcp_pseudo_hdr.Protocol = NET_IP_HDR_PROTOCOL_TCP;
+        tcp_pseudo_hdr.TotLen   = NET_UTIL_HOST_TO_NET_16(p_buf_hdr->TransportTotLen);
+                                                                /* Calc TCP chk sum.                                    */
+        tcp_chk_sum             =  NetUtil_16BitOnesCplChkSumDataCalc((void *) p_buf,
+                                                                      (void *)&tcp_pseudo_hdr,
+                                                                               NET_TCP_PSEUDO_HDR_SIZE,
+                                                                               p_err);
+#endif
+#endif
+
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_TCP_V6;
+        p_buf_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_TCP_V6;
+
+        Mem_Copy(&p_buf_hdr->IPv6_AddrSrc,  p_src_addr,  NET_IPv6_ADDR_SIZE);
+        Mem_Copy(&p_buf_hdr->IPv6_AddrDest, p_dest_addr, NET_IPv6_ADDR_SIZE);
+
+        ipv6_pseudo_hdr.AddrSrc          =                                     p_buf_hdr->IPv6_AddrSrc;
+        ipv6_pseudo_hdr.AddrDest         =                                     p_buf_hdr->IPv6_AddrDest;
+        ipv6_pseudo_hdr.UpperLayerPktLen = (CPU_INT32U)NET_UTIL_HOST_TO_NET_32(p_buf_hdr->TransportTotLen);
+        ipv6_pseudo_hdr.Zero             = (CPU_INT16U)0x00u;
+        ipv6_pseudo_hdr.NextHdr          = (CPU_INT32U)NET_UTIL_HOST_TO_NET_16(NET_IP_HDR_PROTOCOL_TCP);
+
+#ifdef NET_TCP_CHK_SUM_OFFLOAD_TX
+        tcp_chk_sum = 0u;
+#else
+        tcp_chk_sum                      = NetUtil_16BitOnesCplChkSumDataCalc((void     *) p_buf,
+                                                                              (void     *)&ipv6_pseudo_hdr,
+                                                                              (CPU_INT16U) NET_IPv6_PSEUDO_HDR_SIZE,
+                                                                              (NET_ERR  *) p_err);
+#endif
+#endif
+    }
+
+#ifndef NET_TCP_CHK_SUM_OFFLOAD_TX
+    if (*p_err != NET_UTIL_ERR_NONE) {
+         return;
+    }
+#endif
+
+    NET_UTIL_VAL_COPY_16(&p_tcp_hdr->ChkSum, &tcp_chk_sum);     /* Copy TCP chk sum in net order (see Note #3e).        */
+
+
+
+                                                                /* ---------------- GET TCP RTT TX TS ----------------- */
+    p_buf_hdr->TCP_RTT_TS_Txd_ms = (NET_TCP_TX_RTT_TS_MS)NetUtil_TS_Get_ms();
+
+
+   (void)&addr_size;
+
+   *p_err = NET_TCP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_TxPktFree()
+*
+* Description : Free network buffer(s).
+*
+* Argument(s) : p_buf_q      Pointer to network buffer queue.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerReTxQ(),
+*               NetTCP_TxConnAck(),
+*               NetTCP_TxConnReset().
+*
+* Note(s)     : (1) (a) Although TCP Transmit initially requests the network buffer for transmit, the
+*                       TCP layer maintains a reference to the buffer for possible retransmission.
+*
+*                   (b) Therefore, even though the network interface transmit deallocation task frees
+*                       ALL unreferenced buffers after successful transmission, the TCP layer MUST free
+*                       buffers which are still referenced.
+*
+*                       See also 'net_if.c  NetIF_TxDeallocTaskHandler()  Note #1c'.
+*********************************************************************************************************
+*/
+
+static  NET_BUF_QTY  NetTCP_TxPktFree (NET_BUF  *p_buf_q)
+{
+    NET_BUF_QTY  qty;
+
+
+    qty = NetBuf_FreeBufQ_PrimList(p_buf_q, DEF_NULL);
+
+    return (qty);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_TxPktDiscard()
+*
+* Description : On any TCP transmit packet error(s), discard TCP packet(s) & buffer(s).
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnAppData(),
+*               NetTCP_TxPktHandler().
+*
+* Note(s)     : (1) Since some TCP Transmit packets are passed the network buffer from other TCP functions,
+*                   they may NOT be the buffers' only references & MUST therefore check buffers' reference
+*                   counter before freeing buffers.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_TxPktDiscard (NET_BUF  *p_buf,
+                                   NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.TCP.TxPktDiscardedCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBufQ_PrimList((NET_BUF *)p_buf,
+                                  (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetTCP_ConnCfg()
+*
+* Description : (1) Configure TCP connection's controls :
+*
+*                   (a) Configure  TCP connection's connection maximum segment size         See Note #2
+*                   (b) Configure  TCP connection's receive  window controls                See Note #3
+*                   (c) Configure  TCP connection's transmit window controls                See Note #4
+*                   (d) Initialize TCP connection's transmit round-trip time &
+*                                                re-transmit timeout controls
+*
+*
+* Argument(s) : p_conn       Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_RxPktConnHandlerCfgConn(),
+*                                                 NetTCP_ConnClr().
+*
+*               cfg_code    Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                               NET_TCP_CONN_CFG_NONE                   Perform NO  configuration actions.
+*                               NET_TCP_CONN_CFG_ALL                    Perform ALL configuration actions.
+*
+*                               NET_TCP_CONN_CFG_MAX_SEG_SIZE_LOCAL     Configure local      maximum segment size.
+*                               NET_TCP_CONN_CFG_MAX_SEG_SIZE_REMOTE    Configure remote     maximum segment size.
+*                               NET_TCP_CONN_CFG_MAX_SEG_SIZE_CONN      Configure connection maximum segment size.
+*                               NET_TCP_CONN_CFG_MAX_SEG_SIZE_ALL       Configure ALL        maximum segment sizes.
+*
+*                               NET_TCP_CONN_CFG_WIN_SIZE_RX            Configure receive    window size(s).
+*                               NET_TCP_CONN_CFG_WIN_SIZE_TX            Configure transmit   window size(s).
+*                               NET_TCP_CONN_CFG_WIN_SIZE_CONN          Configure connection window size(s).
+*                               NET_TCP_CONN_CFG_WIN_SIZE_ALL           Configure ALL        window sizes.
+*
+*                               NET_TCP_CONN_CFG_TX_RTT_RTO             Configure transmit round-trip time (RTT)
+*                                                                           & re-transmit timeout (RTO) control(s).
+*
+*                           See also 'TCP CONNECTION CONFIGURATION CODE DEFINES'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerCfgConn(),
+*               NetTCP_ConnClr().
+*
+* Note(s)     : (2) A TCP connection's connection maximum segment size should NOT be updated until
+*                   after certain other TCP connection control(s) have been configured.
+*
+*                   See also 'NetTCP_ConnCfgMaxSegSize()   Note #3'.
+*
+*               (3) A TCP connection's receive  window controls should NOT be updated until after
+*                   certain other TCP connection control(s) have been configured.
+*
+*                   See also 'NetTCP_RxConnWinSizeCfg()    Note #2'.
+*
+*               (4) A TCP connection's transmit window controls should NOT be updated until after
+*                   certain other TCP connection control(s) have been configured.
+*
+*                   See also 'NetTCP_TxConnWinSizeCfg()    Note #2'.
+*
+*               (5) A TCP connection's transmit round-trip time & re-transmit timeout controls
+*                   should NOT be updated until after certain other TCP connection control(s)
+*                   have been configured.
+*
+*                   See also 'NetTCP_TxConnRTT_RTO_Init()  Note #1'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnCfg (NET_TCP_CONN      *p_conn,
+                              NET_TCP_CFG_CODE   cfg_code)
+{
+    CPU_BOOLEAN  cfg_conn_max_seg_size;
+    CPU_BOOLEAN  cfg_conn_win_size;
+    CPU_BOOLEAN  cfg_conn_tx_rtt_rto;
+
+
+    cfg_conn_max_seg_size = DEF_BIT_IS_SET(cfg_code, NET_TCP_CONN_CFG_MAX_SEG_SIZE_CONN);
+    if (cfg_conn_max_seg_size == DEF_YES) {
+        NetTCP_ConnCfgMaxSegSize(p_conn);                       /* Cfg  conn max seg size  (see Note #2).               */
+    }
+
+    cfg_conn_win_size = DEF_BIT_IS_SET(cfg_code, NET_TCP_CONN_CFG_WIN_SIZE_RX);
+    if (cfg_conn_win_size == DEF_YES) {
+        NetTCP_RxConnWinSizeCfg(p_conn);                        /* Cfg  rx win ctrls       (see Note #3).               */
+    }
+
+    cfg_conn_win_size = DEF_BIT_IS_SET(cfg_code, NET_TCP_CONN_CFG_WIN_SIZE_TX);
+    if (cfg_conn_win_size == DEF_YES) {
+        NetTCP_TxConnWinSizeCfg(p_conn);                        /* Cfg  tx win ctrls       (see Note #4).               */
+    }
+
+    cfg_conn_tx_rtt_rto = DEF_BIT_IS_SET(cfg_code, NET_TCP_CONN_CFG_TX_RTT_RTO);
+    if (cfg_conn_tx_rtt_rto == DEF_YES) {
+        NetTCP_TxConnRTT_RTO_Init(p_conn);                      /* Init tx RTT / RTO ctrls (see Note #5).               */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetTCP_ConnCfgMaxSegSize()
+*
+* Description : Configure TCP connection's maximum segment size.
+*
+* Argument(s) : p_conn      Pointer to a TCP connection.
+*               -----       Argument validated in NetTCP_ConnCfg().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnCfg().
+*
+* Note(s)     : (1) RFC #1122, Section 4.2.2.6 states that "the maximum size of a segment that TCP really
+*                   sends, the 'effective send MSS', MUST be the smaller of the send MSS ... and ... less
+*                   than or equal to ... the maximum size ... that can be received".
+*
+*               (2) In order to avoid transmit window deadlock with a remote host's receive window, the
+*                   TCP connection's connection maximum segment size MUST be configured to ensure that
+*                   full, maximum-segment-sized segments will transmit even for receive windows less than
+*                   the default maximum segment size.
+*
+*                   (a) RFC #1122, Section 4.2.3.4.(3) states to "send data ... if at least a fraction Fs
+*                       of the maximum window can be sent ... Fs is a fraction whose recommended value is
+*                       1/2".
+*
+*                       Thus it seems reasonable to calculate & limit the remote host's maximum window
+*                       size by a similar fraction.
+*
+*               (3) A TCP connection's connection maximum segment size should NOT be updated until after
+*                   the following TCP connection control(s) have been configured :
+*
+*                   (a) TCP connection's local  maximum segment size ('MaxSegSizeLocal')
+*                           [see 'NetTCP_ConnClr()  Note #3a']
+*
+*                   (b) TCP connection's remote maximum segment size ('MaxSegSizeRemote')
+*                           [see 'NetTCP_RxPktConnHandlerListen()   Note #7'
+*                              & 'NetTCP_RxPktConnHandlerSyncTxd()  Note #3']
+*
+*                   (c) TCP connection's maximum transmit remote window size ('TxWinSizeRemoteMax')
+*                           [see 'NetTCP_RxPktConnHandlerTxWinRemote()   Note  #1a2A'
+*                              & 'NetTCP_TxConnWinSizeHandlerCongCtrl()  Notes #3a2A & #3b']
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnCfgMaxSegSize (NET_TCP_CONN  *p_conn)
+{
+    NET_TCP_WIN_SIZE  remote_win_size_th;
+    NET_TCP_SEG_SIZE  remote_max_seg_size;
+
+                                                                /* Calc remote max seg size (see Note #2).              */
+    remote_win_size_th     = (NET_TCP_WIN_SIZE)(((CPU_INT32U)p_conn->TxWinSizeRemoteMax * NET_TCP_TX_SILLY_WIN_NUMER)
+                                                                                        / NET_TCP_TX_SILLY_WIN_DENOM);
+    remote_max_seg_size    = (NET_TCP_SEG_SIZE)DEF_MIN(p_conn->MaxSegSizeRemote,
+                                                       remote_win_size_th);
+
+                                                                /* Cfg conn max seg size    (see Note #1).              */
+    p_conn->MaxSegSizeConn = (NET_TCP_SEG_SIZE)DEF_MIN(p_conn->MaxSegSizeLocalActual,
+                                                       remote_max_seg_size);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_ConnIdleTimeout()
+*
+* Description : (1) Handle an idle TCP connection on timeout :
+*
+*                   (a) Clear TCP connection's idle connection timer            See Notes #4a1A & #4a2
+*
+*                   (b) (1) If enabled,  handle TCP connection keep-alive for the following states :
+*
+*                           (A) ESTABLISHED                                     See Note  #2b1
+*                           (B) CLOSE-WAIT                                      See Note  #2b2
+*
+*                       (2) Otherwise, close TCP connection
+*
+*
+* Argument(s) : p_conn_timeout       Pointer to a TCP connection (see Note #3b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetTCP_TxConnReqClose(),
+*                             NetTCP_ConnClosingTimeoutDataAvail(),
+*                     various NetTCP_RxPktConnHandler() functions.
+*
+* Note(s)     : (2) RFC #1122, Section 4.2.3.6 states that "TCP ... MAY ... periodically [probe]
+*                   the other end of a connection when the connection is ... idle".
+*
+*                   (a) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 23.2,
+*                       Pages 332-333 adds that "if there is no activity on a given connection
+*                       for 2 hours", TCP "sends a [keep-alive] probe segment to the" remote host.
+*
+*                   (b) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.6
+*                       'Connection Establishment and Keepalive Timers : Keepalive timer expires
+*                       after 2 hours of idle time', Page 829 states that TCP "keepalive probes
+*                       ... are sent only if the connection is in the" :
+*
+*                       (1) "ESTABLISHED or" ...
+*                       (2) "CLOSE_WAIT states."
+*
+*                   (c) Although NO RFC explicitly states that a TCP connection should or should
+*                       not transmit a TCP reset segment when  a TCP connection is closed due to
+*                       a lack of response to all keep-alive probe segments from the remote host,
+*                       it seems implied & reasonable that a TCP reset is unnecessary since the
+*                       remote host has not replied to any TCP keep-alive probe segments.
+*
+*                       See also 'NetTCP_TxConnKeepAlive()  Note #2c2B'.
+*
+*                   See also 'NetTCP_TxConnKeepAlive()  Note #2'.
+*
+*               (3) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_TCP_CONN' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (4) This function is a network timer callback function :
+*
+*                   (a) (1) For the following connection timer(s) ... :
+*
+*                           (A) TCP connection timeout timer ('TimeoutTmr')
+*
+*                       (2) (A) Clear the timer pointer ... :
+*                               (1) Cleared prior to next handler function(s).
+*
+*                           (B) but do NOT re-free the timer.
+*
+*                   (b) Do NOT set the following close timer flag(s) :
+*
+*                       (1) NET_TCP_CONN_CLOSE_TMR_TIMEOUT
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnIdleTimeout (void  *p_conn_timeout)
+{
+    NET_TCP_CONN        *p_conn;
+    NET_TCP_CLOSE_CODE   close_code;
+    NET_ERR              err;
+
+
+    p_conn = (NET_TCP_CONN *)p_conn_timeout;                    /* See Note #3b2A.                                      */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE TCP CONN ----------------- */
+    if (p_conn == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+                                                                /* --------------- HANDLE IDLE TCP CONN --------------- */
+    close_code = NET_TCP_CONN_CLOSE_ALL;
+    DEF_BIT_CLR(close_code, NET_TCP_CONN_CLOSE_TMR_TIMEOUT);    /* See Note #4b1.                                       */
+
+    p_conn->TimeoutTmr = DEF_NULL;                              /* Clr TCP conn tmr (see Note #4a2A1).                  */
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_FREE:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+             return;
+
+
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidOpCtr);
+             return;
+
+                                                                /* ----------- HANDLE TCP CONN KEEP-ALIVES ------------ */
+        case NET_TCP_CONN_STATE_CONN:                           /* See Note #1b1.                                       */
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:                     /* See Note #1b2.                                       */
+             if (p_conn->TxKeepAliveEn == DEF_ENABLED) {        /* If en'd, ...                                         */
+                 DEF_BIT_CLR(close_code, NET_TCP_CONN_CLOSE_CONN_TX_RESET); /* See Note #2c.                            */
+                 NetTCP_TxConnKeepAlive(p_conn, close_code, &err); /* ... handle keep-alives (see Note #2).             */
+                (void)&err;                                     /* Ignore ALL err(s), transitory or fatal.              */
+                 return;
+             }
+                                                                /* 'break' intentionally omitted; MUST ...              */
+                                                                /* ... execute the following code block :               */
+                                                                /* -------------- ... 'CLOSE TCP CONN'. --------------- */
+                                                                /* ------------------ CLOSE TCP CONN ------------------ */
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             if (p_conn->ConnCloseTimeoutFaultFlag != DEF_NO) { /* If TCP conn timeout fault, ...                       */
+                                                                /* ... fault-close TCP conn.                            */
+                 NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                                  (NET_BUF_HDR      *)0,
+                                  (CPU_BOOLEAN       )p_conn->ConnCloseAppFlag,
+                                  (NET_TCP_CLOSE_CODE)close_code);
+
+             } else {                                           /* Else      close TCP conn.                            */
+                 NetTCP_ConnCloseHandler((NET_TCP_CONN     *)p_conn,
+                                         (CPU_BOOLEAN       )p_conn->ConnCloseAppFlag,
+                                         (NET_TCP_CLOSE_CODE)close_code);
+             }
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:
+        default:
+             NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                              (NET_BUF_HDR      *)0,
+                              (CPU_BOOLEAN       )DEF_YES,
+                              (NET_TCP_CLOSE_CODE)close_code);
+             NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnInvalidStateCtr);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTCP_ConnClose()
+*
+* Description : (1) Close a TCP connection due to TCP connection fault(s) :
+*
+*                   (a) Update   TCP connection close statistic(s)
+*                   (b) Transmit TCP connection reset to remote host                    See Note #4
+*                   (c) Close    TCP connection
+*
+*
+*               (2) TCP connection closed internally by TCP layer when certain TCP connection parameters
+*                   are corrupted or when certain valid TCP connection operations fail.
+*
+*               (3) Since the mechanisms of TCP connection close are independent of the application layer
+*                   close; TCP connection MAY need to close application layer connection(s).
+*
+*                   See also 'NetTCP_ConnCloseHandler()  Note #2b'.
+*
+*
+* Argument(s) : p_conn               Pointer to a TCP connection.
+*               -----               Argument validated in various.
+*
+*               p_buf_hdr            Pointer to network buffer header that received TCP packet.
+*
+*               close_conn_app      Indicate whether to close application connection (see Note #3):
+*
+*                                       DEF_YES                        Close application connection.
+*                                       DEF_NO                  Do NOT close application connection.
+*
+*               close_code      Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_CLOSE_NONE                 Perform NO  close actions.
+*                                   NET_TCP_CONN_CLOSE_ALL                  Perform ALL close actions.
+*
+*                                   NET_TCP_CONN_CLOSE_CONN_TX_RESET        Perform close connection transmit reset.
+*                                   NET_TCP_CONN_CLOSE_CONN_ALL             Perform ALL   connection close    actions.
+*
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE          Close    transmit idle                  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN     Close    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN      Close    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY       Close    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_RE_TX            Close re-transmit                       timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_ALL              Close ALL                               timers.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (4) Although NO RFC directly states to transmit a TCP reset segment when a TCP connection
+*                   fault-closes, it is inferred & seems reasonable that a TCP reset segment SHOULD be
+*                   transmitted whenever a TCP connection closes abnormally from any of the following
+*                   synchronization/connected/closing states :
+*
+*                   (a) SYN-RECEIVED
+*                   (b) SYN-SENT
+*                   (c) ESTABLISHED
+*                   (d) FIN-WAIT-1
+*                   (e) FIN-WAIT-2
+*                   (f) CLOSING
+*                   (g) TIME_WAIT
+*                   (h) CLOSE-WAIT
+*                   (i) LAST-ACK
+*
+*                   See also 'NetTCP_TxConnReset()  Note #4b'.
+*
+*               (5) On any TCP connection handler function fault(s), TCP connection MUST NEVER be re-closed.
+*
+*                   See also 'NetTCP_ConnCloseHandler()  Note #4'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnClose (NET_TCP_CONN        *p_conn,
+                                NET_BUF_HDR         *p_buf_hdr,
+                                CPU_BOOLEAN          close_conn_app,
+                                NET_TCP_CLOSE_CODE   close_code)
+{
+    CPU_BOOLEAN  tx_reset;
+    NET_ERR      err;
+
+                                                                /* ---------------- UPDATE CLOSE STATS ---------------- */
+    NET_CTR_ERR_INC(Net_ErrCtrs.TCP.ConnCloseCtr);
+
+                                                                /* ---------------- TX TCP CONN RESET ----------------- */
+    tx_reset = DEF_BIT_IS_SET(close_code, NET_TCP_CONN_CLOSE_CONN_TX_RESET);
+    if (tx_reset == DEF_YES) {                                  /* Tx TCP conn reset (see Note #4).                     */
+        NetTCP_TxConnReset((NET_TCP_CONN     *) p_conn,
+                           (NET_BUF_HDR      *) p_buf_hdr,
+                           (NET_TCP_RESET_CODE) NET_TCP_CONN_TX_RESET_FAULT,
+                           (NET_TCP_CLOSE_CODE) NET_TCP_CONN_CLOSE_NONE, /* MUST NOT re-close TCP conn (see Note #5).   */
+                           (NET_ERR          *)&err);
+    }
+
+                                                                /* ------------------ CLOSE TCP CONN ------------------ */
+    NetTCP_ConnCloseHandler(p_conn, close_conn_app, close_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_ConnCloseHandler()
+*
+* Description : (1) Close a TCP connection :
+*
+*                   (a) Close network connection(s)                                 See Note #2
+*                   (b) Free  TCP     connection
+*
+*
+*               (2) (a) TCP connection's network     connection(s) MUST be closed BEFORE the TCP connection
+*                       is closed/freed.
+*
+*                   (b) TCP connection's application connection(s) :
+*
+*                       (1) MAY be CLOSED &/or reset :
+*
+*                           (A) For the following TCP connection condition(s), the TCP connection MUST
+*                               close the application connection(s) :
+*
+*                               (1) (a) Invalid TCP connection parameters :
+*                                       (1) Invalid TCP connection state(s)
+*                                       (2) Invalid/corrupted TCP data queue(s) :
+*                                           (A) Invalid sequence numbers
+*                                           (B) Invalid segment  lengths
+*
+*                                   (b) Fatal TCP transmit     fault(s)
+*                                   (c) TCP connection closing fault(s)
+*
+*                               (2) Invalid network connection configuration
+*
+*                           (B) For the following TCP connection condition(s), the TCP connection SHOULD
+*                               close the application connection(s) based on its application close flag
+*                               ('ConnCloseAppFlag') :
+*
+*                               (1) Valid TCP connection closing states/timeouts
+*
+*                           (C) For the following TCP connection condition(s), the TCP connection MAY --
+*                               but is NOT required to -- close the application connection(s) :
+*
+*                               (1) Initial TCP connection configuration/preparation
+*
+*                       (2) But possibly NOT freed, since some application connections have NO mechanism
+*                           or API to close an application's reference to the connection.
+*
+*                       See also specific application connection close function(s) for additional notes.
+*
+*
+* Argument(s) : p_conn               Pointer to a TCP connection.
+*               -----               Argument validated in NetTCP_ConnClose(),
+*                                                         NetTCP_ConnIdleTimeout(),
+*                                                         various.
+*
+*               close_conn_app      Indicate whether to close application connection (see Note #2b):
+*
+*                                       DEF_YES                        Close application connection.
+*                                       DEF_NO                  Do NOT close application connection.
+*
+*               close_code      Select which close action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_CLOSE_NONE                 Perform NO  close actions.
+*                                   NET_TCP_CONN_CLOSE_ALL                  Perform ALL close actions.
+*
+*                                   NET_TCP_CONN_CLOSE_CONN_TX_RESET        Perform close connection transmit reset.
+*                                   NET_TCP_CONN_CLOSE_CONN_ALL             Perform ALL   connection close    actions.
+*
+*                                   NET_TCP_CONN_CLOSE_TMR_TIMEOUT          Close connection                        timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_IDLE          Close    transmit idle                  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_SILLY_WIN     Close    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ZERO_WIN      Close    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_TX_ACK_DLY       Close    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_RE_TX            Close re-transmit                       timer.
+*                                   NET_TCP_CONN_CLOSE_TMR_ALL              Close ALL                               timers.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnClose(),
+*               NetTCP_ConnIdleTimeout(),
+*               various.
+*
+* Note(s)     : (3) TCP connection free codes are identical to TCP connection close codes.
+*
+*                   See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES  Note #2'.
+*
+*               (4) On any TCP connection close, TCP connection MUST NEVER be re-closed.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnCloseHandler (NET_TCP_CONN        *p_conn,
+                                       CPU_BOOLEAN          close_conn_app,
+                                       NET_TCP_CLOSE_CODE   close_code)
+{
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN        used;
+#endif
+    NET_CONN_ID        conn_id = p_conn->ID_Conn;
+    NET_TCP_FREE_CODE  free_code;
+
+                                                                /* ------------- VALIDATE TCP CONN CLOSE -------------- */
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    used = DEF_BIT_IS_SET(p_conn->Flags, NET_TCP_FLAG_USED);
+    if (used != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NotUsedCtr);
+        return;
+    }
+#endif
+
+    switch (p_conn->ConnState) {
+        case NET_TCP_CONN_STATE_CLOSED:
+        case NET_TCP_CONN_STATE_LISTEN:
+        case NET_TCP_CONN_STATE_SYNC_RXD:
+        case NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE:
+        case NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE:
+        case NET_TCP_CONN_STATE_SYNC_TXD:
+        case NET_TCP_CONN_STATE_CONN:
+        case NET_TCP_CONN_STATE_FIN_WAIT_1:
+        case NET_TCP_CONN_STATE_FIN_WAIT_2:
+        case NET_TCP_CONN_STATE_CLOSING:
+        case NET_TCP_CONN_STATE_TIME_WAIT:
+        case NET_TCP_CONN_STATE_CLOSE_WAIT:
+        case NET_TCP_CONN_STATE_LAST_ACK:
+        case NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL:
+             break;
+
+
+        case NET_TCP_CONN_STATE_NONE:                           /* MUST NOT re-close TCP conn if already ...            */
+        case NET_TCP_CONN_STATE_FREE:                           /* ... freed/closed (see Note #4).                      */
+        default:
+             return;
+    }
+                                                                /* ------------------ FREE TCP CONN ------------------- */
+    free_code = (NET_TCP_FREE_CODE)close_code;                  /* See Note #3.                                         */
+    NetTCP_ConnFreeHandler(p_conn, free_code);
+
+                                                                /* ------------------ CLOSE CONN(S) ------------------- */
+    NetConn_CloseFromTransport(conn_id, close_conn_app);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetTCP_ConnClosingTimeoutDataAvail()
+*
+* Description : (1) Handle closing TCP connection with available application data :
+*
+*                   (a) If TCP connection's application receive queue is       now empty,
+*                           close the TCP connection
+*                   (b) If TCP connection's application receive queue is still NOT empty
+*                           after the time-wait timeout, set the user connection timeout
+*
+*                   See also 'NetTCP_RxPktConnHandlerFinWait1()  Note #2f5A2b',
+*                            'NetTCP_RxPktConnHandlerFinWait2()  Note #2f5B2',
+*                          & 'NetTCP_RxPktConnHandlerClosing()   Note #2d2B2a1B2'.
+*
+*
+* Argument(s) : p_conn_timeout       Pointer to a TCP connection (see Note #2b).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Referenced in NetTCP_RxPktConnHandlerFinWait1(),
+*                             NetTCP_RxPktConnHandlerFinWait2(),
+*                             NetTCP_RxPktConnHandlerClosing().
+*
+* Note(s)     : (2) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); &       ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers; ...
+*                           (A) in this case, a 'NET_TCP_CONN' pointer.
+*
+*                   See also 'net_tmr.c  NetTmr_Get()  Note #3'.
+*
+*               (3) This function is a network timer callback function :
+*
+*                   (a) (1) For the following connection timer(s) ... :
+*
+*                           (A) TCP connection timeout timer ('TimeoutTmr')
+*
+*                       (2) (A) Clear the timer pointer ... :
+*                               (1) Cleared in NetTCP_ConnFreeTmr() via NetTCP_ConnCloseHandler(),
+*                                                                       NetTCP_ConnClose(); or
+*                               (2) Reset   by NetTmr_Get().
+*
+*                           (B) but do NOT re-free the timer.
+*
+*                   (b) Do NOT set the following close timer flag(s) :
+*
+*                       (1) NET_TCP_CONN_CLOSE_TMR_TIMEOUT
+*
+*               (4) RFC #793, Section 3.9 'Event Processing : USER TIMEOUT : USER TIMEOUT' states that
+*                   "for any state if the user timeout expires, flush all queues, signal the user
+*                   'error : connection aborted due to user timeout' ... [and] enter the CLOSED state".
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnClosingTimeoutDataAvail (void  *p_conn_timeout)
+{
+    NET_TCP_CONN        *p_conn;
+    NET_TCP_CLOSE_CODE   close_code;
+    CPU_BOOLEAN          data_avail;
+    NET_TMR_TICK         timeout_tick;
+    NET_ERR              err;
+
+
+    p_conn      = (NET_TCP_CONN *)p_conn_timeout;               /* See Note #2b2A.                                      */
+
+    close_code =  NET_TCP_CONN_CLOSE_ALL;
+    DEF_BIT_CLR(close_code, NET_TCP_CONN_CLOSE_TMR_TIMEOUT);    /* See Note #3b1.                                       */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE TCP CONN ----------------- */
+    if (p_conn == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.TCP.NullPtrCtr);
+        return;
+    }
+#endif
+
+                                                                /* Closing data avail for half-closed conns ONLY.       */
+    data_avail = ((p_conn->ConnCloseCode !=  NET_CONN_CLOSE_HALF      ) ||
+                 ((p_conn->RxQ_State     ==  NET_TCP_RX_Q_STATE_CLOSED) &&
+                  (p_conn->RxQ_App_Head  == DEF_NULL))) ? DEF_NO : DEF_YES;
+
+    if (data_avail != DEF_YES) {                                /* If NO app data avail, ...                            */
+                                                                /* ... close TCP conn  (see Note  #1a).                 */
+        NetTCP_ConnCloseHandler((NET_TCP_CONN     *)p_conn,
+                                (CPU_BOOLEAN       )p_conn->ConnCloseAppFlag,
+                                (NET_TCP_CLOSE_CODE)close_code);
+
+    } else {                                                    /* Else reset user tmr (see Notes #1b & #4).            */
+        timeout_tick      = p_conn->TimeoutUser_tick;
+        p_conn->TimeoutTmr = NetTmr_Get((CPU_FNCT_PTR )&NetTCP_ConnIdleTimeout,
+                                       (void        *) p_conn,
+                                       (NET_TMR_TICK ) timeout_tick,
+                                       (NET_TMR_FLAGS) NET_TMR_FLAG_NONE,
+                                       (NET_ERR     *)&err);
+        if (err != NET_TMR_ERR_NONE) {
+            NetTCP_ConnClose((NET_TCP_CONN     *)p_conn,
+                             (NET_BUF_HDR      *)0,
+                             (CPU_BOOLEAN       )p_conn->ConnCloseAppFlag,
+                             (NET_TCP_CLOSE_CODE)close_code);
+            return;
+        }
+
+        p_conn->ConnCloseAppFlag = DEF_YES;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetTCP_ConnFreeHandler()
+*
+* Description : (1) Free a TCP connection :
+*
+*                   (a) Free   TCP connection timers
+*                   (b) Free   TCP connection packet buffer queues
+*                   (c) Clear  TCP connection controls
+*                   (d) Free   TCP connection back to TCP connection pool
+*                   (e) Update TCP connection pool statistics
+*
+*
+* Argument(s) : p_conn           Pointer to a TCP connection.
+*               -----           Argument validated in NetTCP_ConnFree(),
+*                                                     NetTCP_ConnClose().
+*
+*               free_code       Select which free action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_FREE_TMR_NONE              Free NO                                timers.
+*                                   NET_TCP_CONN_FREE_TMR_ALL               Free ALL                               timers.
+*
+*                                   NET_TCP_CONN_FREE_TMR_TIMEOUT           Free connection                        timer.
+*                                   NET_TCP_CONN_FREE_TMR_TX_IDLE           Free    transmit idle                  timer.
+*                                   NET_TCP_CONN_FREE_TMR_TX_SILLY_WIN      Free    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_FREE_TMR_TX_ZERO_WIN       Free    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_FREE_TMR_TX_ACK_DLY        Free    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_FREE_TMR_RE_TX             Free re-transmit                       timer.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnFree(),
+*               NetTCP_ConnCloseHandler().
+*
+* Note(s)     : (2) ALL network resources linked to the TCP connection MUST be freed PRIOR to TCP connection
+*                   free or discard so that no network resources are lost.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnFreeHandler (NET_TCP_CONN       *p_conn,
+                                      NET_TCP_FREE_CODE   free_code)
+{
+    CPU_BOOLEAN  discard;
+    NET_ERR      err;
+
+
+                                                                /* FREE TCP CONN TMR's                                  */
+    NetTCP_ConnFreeTmr(p_conn, free_code);
+
+
+                                                                /* FREE TCP CONN Q's                                    */
+    NetTCP_ConnFreeBufQ(&p_conn->RxQ_Transport_Head, &p_conn->RxQ_Transport_Tail);
+    NetTCP_ConnFreeBufQ(&p_conn->RxQ_App_Head      , &p_conn->RxQ_App_Tail      );
+    NetTCP_ConnFreeBufQ(&p_conn->TxQ_Head          , &p_conn->TxQ_Tail          );
+    NetTCP_ConnFreeBufQ(&p_conn->ReTxQ_Head        , &p_conn->ReTxQ_Tail        );
+
+
+    discard = DEF_NO;
+
+    NetTCP_RxQ_Clr(p_conn->ID, &err);                           /* Clr TCP conn rx Q.                                   */
+    if (err != NET_TCP_ERR_NONE) {                              /* If  TCP conn rx Q NOT clr'd, ...                     */
+        discard = DEF_YES;                                      /* ... discard TCP conn (see Note #2b).                 */
+    }
+
+    NetTCP_RxQ_Abort(p_conn->ID, &err);                         /* Abort wait on TCP conn rx Q.                         */
+
+
+    NetTCP_TxQ_Clr(p_conn->ID, &err);                           /* Clr TCP conn tx Q.                                   */
+    if (err != NET_TCP_ERR_NONE) {                              /* If  TCP conn tx Q NOT clr'd, ...                     */
+        discard = DEF_YES;                                      /* ... discard TCP conn (see Note #2b).                 */
+    }
+
+    NetTCP_TxQ_Abort(p_conn->ID, &err);                         /* Abort wait on TCP conn tx Q.                         */
+
+
+                                                                /* ------------ DISCARD TCP CONN ON ERR(S) ------------ */
+    if (discard != DEF_NO) {                                    /* On TCP conn free err(s), ...                         */
+        NetTCP_ConnDiscard(p_conn);                             /* ... discard TCP conn (see Note #2a).                 */
+        return;
+    }
+
+
+                                                                /* ------------------- CLR TCP CONN ------------------- */
+    p_conn->ConnState = NET_TCP_CONN_STATE_FREE;                /* Set TCP conn as freed/NOT used.                      */
+    DEF_BIT_CLR(p_conn->Flags, NET_TCP_FLAG_USED);
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+    NetTCP_ConnClr(p_conn);
+#endif
+
+
+    p_conn->ID_Conn = NET_CONN_ID_NONE;                         /* Clr TCP conn's net conn id.                          */
+
+                                                                /* ------------------ FREE TCP CONN ------------------- */
+    p_conn->NextPtr     = NetTCP_ConnPoolPtr;
+    NetTCP_ConnPoolPtr = p_conn;
+
+
+                                                                /* ------------ UPDATE TCP CONN POOL STATS ------------ */
+    NetStat_PoolEntryUsedDec(&NetTCP_ConnPoolStat, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_ConnFreeTmr()
+*
+* Description : Clear TCP connection's timers.
+*
+* Argument(s) : p_conn           Pointer to a TCP connection.
+*               -----           Argument validated in NetTCP_ConnFreeHandler(),
+*                                                     various NetTCP_ConnHandler() functions.
+*
+*               free_code       Select which free action(s) to perform; bit-field flags logically OR'd :
+*
+*                                   NET_TCP_CONN_FREE_TMR_NONE              Free NO                                timers.
+*                                   NET_TCP_CONN_FREE_TMR_ALL               Free ALL                               timers.
+*
+*                                   NET_TCP_CONN_FREE_TMR_TIMEOUT           Free connection                        timer.
+*                                   NET_TCP_CONN_FREE_TMR_TX_IDLE           Free    transmit idle                  timer.
+*                                   NET_TCP_CONN_FREE_TMR_TX_SILLY_WIN      Free    transmit silly window persist  timer.
+*                                   NET_TCP_CONN_FREE_TMR_TX_ZERO_WIN       Free    transmit zero  window persist  timer.
+*                                   NET_TCP_CONN_FREE_TMR_TX_ACK_DLY        Free    transmit acknowledgement delay timer.
+*                                   NET_TCP_CONN_FREE_TMR_RE_TX             Free re-transmit                       timer.
+*
+*                               See also 'TCP CONNECTION CLOSE/FREE CODE DEFINES'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnFreeHandler(),
+*               various NetTCP_ConnHandler() functions.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnFreeTmr (NET_TCP_CONN       *p_conn,
+                                  NET_TCP_FREE_CODE   free_code)
+{
+    CPU_BOOLEAN  free_tmr;
+
+
+    free_tmr = DEF_BIT_IS_SET(free_code, NET_TCP_CONN_FREE_TMR_TIMEOUT);
+    if (free_tmr == DEF_YES) {
+        if (p_conn->TimeoutTmr != DEF_NULL) {
+            NetTmr_Free(p_conn->TimeoutTmr);
+            p_conn->TimeoutTmr  = DEF_NULL;
+        }
+    }
+
+
+    free_tmr = DEF_BIT_IS_SET(free_code, NET_TCP_CONN_FREE_TMR_TX_IDLE);
+    if (free_tmr == DEF_YES) {
+        if (p_conn->TxQ_IdleTmr != DEF_NULL) {
+            NetTmr_Free(p_conn->TxQ_IdleTmr);
+            p_conn->TxQ_IdleTmr  = DEF_NULL;
+        }
+    }
+
+    free_tmr = DEF_BIT_IS_SET(free_code, NET_TCP_CONN_FREE_TMR_TX_SILLY_WIN);
+    if (free_tmr == DEF_YES) {
+        if (p_conn->TxQ_SillyWinTmr != DEF_NULL) {
+            NetTmr_Free(p_conn->TxQ_SillyWinTmr);
+            p_conn->TxQ_SillyWinTmr  = DEF_NULL;
+        }
+    }
+
+    free_tmr = DEF_BIT_IS_SET(free_code, NET_TCP_CONN_FREE_TMR_TX_ZERO_WIN);
+    if (free_tmr == DEF_YES) {
+        if (p_conn->TxQ_ZeroWinTmr != DEF_NULL) {
+            NetTmr_Free(p_conn->TxQ_ZeroWinTmr);
+            p_conn->TxQ_ZeroWinTmr  = DEF_NULL;
+        }
+    }
+
+    free_tmr = DEF_BIT_IS_SET(free_code, NET_TCP_CONN_FREE_TMR_TX_ACK_DLY);
+    if (free_tmr == DEF_YES) {
+        if (p_conn->TxAckDlyTmr != DEF_NULL) {
+            NetTmr_Free(p_conn->TxAckDlyTmr);
+            p_conn->TxAckDlyTmr  = DEF_NULL;
+        }
+    }
+
+
+    free_tmr = DEF_BIT_IS_SET(free_code, NET_TCP_CONN_FREE_TMR_RE_TX);
+    if (free_tmr == DEF_YES) {
+        if (p_conn->ReTxQ_Tmr != DEF_NULL) {
+            NetTmr_Free(p_conn->ReTxQ_Tmr);
+            p_conn->ReTxQ_Tmr  = DEF_NULL;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_ConnFreeBufQ()
+*
+* Description : Free a TCP connection's buffer queue.
+*
+* Argument(s) : p_buf_q_head     Pointer to a TCP connection buffer queue's head pointer.
+*
+*               p_buf_q_tail     Pointer to a TCP connection buffer queue's tail pointer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerRxQ_Sync(),
+*               NetTCP_TxConnSync(),
+*               NetTCP_ConnFreeHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnFreeBufQ (NET_BUF  **p_buf_q_head,
+                                   NET_BUF  **p_buf_q_tail)
+{
+    NET_BUF  *p_buf_q;
+
+                                                                /* Free buf Q.                                          */
+    p_buf_q = *p_buf_q_head;
+   (void)NetBuf_FreeBufQ_PrimList(p_buf_q, DEF_NULL);
+                                                                /* Clr  buf Q ptrs to NULL.                             */
+   *p_buf_q_head = DEF_NULL;
+   *p_buf_q_tail = DEF_NULL;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetTCP_ConnClr()
+*
+* Description : Clear TCP connection controls.
+*
+* Argument(s) : p_conn      Pointer to a TCP connection.
+*               ------      Argument validated in NetTCP_Init(),
+*                                                 NetTCP_ConnGet(),
+*                                                 NetTCP_ConnFreeHandler().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_Init(),
+*               NetTCP_ConnGet(),
+*               NetTCP_ConnFreeHandler().
+*
+* Note(s)     : (1) Configured in NetTCP_ConnCfg() :
+*
+*                   (a) Configured  in NetTCP_ConnCfgMaxSegSize().
+*
+*                   (b) Configured  in NetTCP_RxConnWinSizeCfg() :
+*                       (1) Configured in NetTCP_RxConnWinSizeCfgUpdateTh().
+*
+*                   (c) Configured  in NetTCP_TxConnWinSizeCfg() :
+*                       (1) Configured in NetTCP_TxConnWinSizeCfgCongCtrl().
+*                       (2) Configured in NetTCP_TxConnWinSizeCfgMinTh().
+*
+*                   (d) Initialized in NetTCP_TxConnRTT_RTO_Init().
+*                       (1) Configured in NetTCP_TxConnRTO_CfgMaxTimeout().
+*
+*               (2) See 'NetTCP_RxPktConnHandler()  Note #3c'.
+*
+*               (3) (a) See 'net_tcp.h  TCP SEGMENT SIZE DEFINES  Note #1b1'.
+*                   (b) See 'net_tcp.h  TCP SEGMENT SIZE DEFINES  Note #1b2'.
+*
+*               (4) See 'net_cfg.h  TRANSMISSION CONTROL PROTOCOL LAYER CONFIGURATION  Note #2'.
+*
+*               (5) See 'NetTCP_TxConnTxQ()  Note #6b2B'.
+*
+*               (6) See 'net_tcp.h  TCP CONGESTION CONTROL DEFINES  Note #5b4'.
+*
+*               (7) See 'NetTCP_TxConnWinSizeZeroWinHandler()  Note #1b'.
+*
+*               (8) See 'net_tcp.h  TCP CONGESTION CONTROL DEFINES  Note #6b'.
+*
+*               (9) See 'NetTCP_TxConnAck()  Note #4a4A1'.
+*
+*              (10) (a) See 'NetTCP_TxConnKeepAlive()  Note #2a2'.
+*                   (b) See 'net_tcp.h  TCP CONNECTION KEEP-ALIVE & PROBE DEFINES  Note #1a1'.
+*                   (c) See 'net_tcp.h  TCP CONNECTION KEEP-ALIVE & PROBE DEFINES  Note #1a2'.
+*
+*              (11) See 'net_tcp.h  TCP CONGESTION CONTROL DEFINES  Note #7'.
+*
+*              (12) See 'NetTCP_ConnCfgReTxMaxTimeout()  Note #3'.
+*
+*              (13) (a) See 'net_tcp.h  TCP CONNECTION TIMEOUT DEFINES  Note #2'.
+*                   (b) See 'net_tcp.h  TCP CONNECTION TIMEOUT DEFINES  Note #1b'.
+*                   (c) See 'NetTCP_RxPktConnHandlerConn()  Note #3a'.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnClr (NET_TCP_CONN  *p_conn)
+{
+    NET_TCP_CONN_ID  conn_id_tcp;
+    NET_ERR          err;
+
+
+    conn_id_tcp                          =  p_conn->ID;
+                                                                /* -------------- CLR/INIT TCP CONN VALS -------------- */
+    p_conn->NextPtr                      =  DEF_NULL;
+
+    p_conn->ID_Conn                      =  NET_CONN_ID_NONE;
+
+    p_conn->ConnState                    =  NET_TCP_CONN_STATE_FREE;
+
+    p_conn->ConnCloseCode                =  NET_CONN_CLOSE_FULL;/* See Note #2.                                         */
+    p_conn->ConnCloseAppFlag             =  DEF_YES;
+    p_conn->ConnCloseTimeoutFaultFlag    =  DEF_YES;
+
+
+
+    p_conn->MaxSegSizeLocalCfgd          =  NET_TCP_MAX_SEG_SIZE_DFLT_RX; /* See Note #3a.                              */
+    p_conn->MaxSegSizeLocalActual        =  p_conn->MaxSegSizeLocalCfgd;
+    p_conn->MaxSegSizeRemote             =  NET_TCP_MAX_SEG_SIZE_DFLT_TX; /* See Note #3b.                              */
+#if 0                                                           /* See Note #1a.                                        */
+    p_conn->MaxSegSizeConn               =  NET_TCP_MAX_SEG_SIZE_NONE;
+#endif
+
+    p_conn->RxSeqNbrSync                 =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->RxSeqNbrNext                 =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->RxSeqNbrLast                 =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->RxSeqNbrClose                =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->RxWinSizeCfgd                =  NET_TCP_DFLT_RX_WIN_SIZE_OCTET; /* See Note #4.                             */
+#if 0                                                           /* See Note #1b.                                        */
+    p_conn->RxWinSizeCalcd               =  p_conn->RxWinSizeCfgd;
+    p_conn->RxWinSizeActual              =  p_conn->RxWinSizeCfgd;
+    p_conn->RxWinSizeUpdateTh            =  NET_TCP_WIN_SIZE_NONE; /* See Note #1b1.                                    */
+#endif
+
+    p_conn->RxQ_State                    =  NET_TCP_RX_Q_STATE_CLOSED;
+    p_conn->RxQ_Transport_Head           =  DEF_NULL;
+    p_conn->RxQ_Transport_Tail           =  DEF_NULL;
+    p_conn->RxQ_App_Head                 =  DEF_NULL;
+    p_conn->RxQ_App_Tail                 =  DEF_NULL;
+
+    p_conn->TxSeqNbrSync                 =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->TxSeqNbrNext                 =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->TxSeqNbrNextQ                =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->TxSeqNbrUnReTxd              =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->TxSeqNbrUnAckd               =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->TxSeqNbrUnAckdPrev           =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->TxSeqNbrUnAckdAlignDelta     =  0u;
+    p_conn->TxSeqNbrLast                 =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->TxSeqNbrClose                =  NET_TCP_SEQ_NBR_NONE;
+
+    p_conn->TxWinUpdateSeqNbr            =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->TxWinUpdateAckNbr            =  NET_TCP_ACK_NBR_NONE;
+    p_conn->TxWinUpdateWinSize           =  NET_TCP_WIN_SIZE_NONE;
+    p_conn->TxWinSizeCfgd                =  NET_TCP_DFLT_TX_WIN_SIZE_OCTET; /* See Note #4.                             */
+    p_conn->TxWinSizeRemote              =  NET_TCP_WIN_SIZE_NONE;
+    p_conn->TxWinSizeRemoteMax           =  p_conn->TxWinSizeRemote;
+    p_conn->TxWinSizeRemoteActual        =  p_conn->TxWinSizeRemote;
+    p_conn->TxWinSizeRemoteRem           =  p_conn->TxWinSizeRemote;
+    p_conn->TxWinSizeNagleEn             =  DEF_ENABLED;        /* See Note #5.                                         */
+    p_conn->TxWinSillyWinTimeout_ms      =  NET_TCP_TX_SILLY_WIN_TIMEOUT_DFLT_MS; /* See Note #6.                       */
+    p_conn->TxWinZeroWinTimeout_ms       =  0u;                 /* See Note #7.                                         */
+    p_conn->TxWinSillyWinTimeout_tick    =  (p_conn->TxWinSillyWinTimeout_ms * NET_TMR_TIME_TICK_PER_SEC)
+                                                                             / DEF_TIME_NBR_mS_PER_SEC;
+#if 0                                                           /* See Note #1c.                                        */
+    p_conn->TxWinSizeCfgdRem             =  p_conn->TxWinSizeCfgd;
+    p_conn->TxWinRxdAckDupCtr            =  0u;
+    p_conn->TxWinRxdLastSeqNbr           =  NET_TCP_SEQ_NBR_NONE;
+    p_conn->TxWinRxdLastAckNbr           =  NET_TCP_ACK_NBR_NONE;
+    p_conn->TxWinRxdLastWinSize          =  NET_TCP_WIN_SIZE_NONE;
+    p_conn->TxWinSizeSlowStartTh         =  NET_TCP_WIN_SIZE_NONE;
+    p_conn->TxWinSizeSlowStartThInit     =  NET_TCP_WIN_SIZE_NONE;
+    p_conn->TxWinSizeCongInit            =  NET_TCP_WIN_SIZE_NONE;
+    p_conn->TxWinSizeCongCalcdActual     =  NET_TCP_WIN_SIZE_NONE;
+    p_conn->TxWinSizeCongCalcdCur        =  NET_TCP_WIN_SIZE_NONE;
+    p_conn->TxWinSizeCongRem             =  NET_TCP_WIN_SIZE_NONE;
+    p_conn->TxWinSizeAvail               =  NET_TCP_WIN_SIZE_NONE;
+    p_conn->TxWinSizeMinTh               =  NET_TCP_WIN_SIZE_NONE;
+#endif
+
+    NetTCP_ConnCfgTxAckDlyTimeoutHandler(conn_id_tcp,
+                                         NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS, /* See Note #8.                          */
+                                        &err);
+
+    p_conn->TxAckDlyTmr                  =  DEF_NULL;
+    p_conn->TxAckDlyCnt                  =  0u;
+
+    p_conn->TxAckImmedRxdPushEn          =  DEF_ENABLED;        /* See Note #9.                                         */
+
+
+    p_conn->TxKeepAliveEn                =  DEF_DISABLED;       /* See Note #10a.                                       */
+    p_conn->TxKeepAliveCtr               =  0u;
+    p_conn->TxKeepAliveTh                =  NET_TCP_TX_KA_TH_DFLT; /* See Note #10b.                                    */
+    p_conn->TxKeepAliveRetryTimeout_sec  =  NET_TCP_TX_KA_RETRY_TIMEOUT_DFLT_SEC; /* See Note #10c.                     */
+
+
+    p_conn->TxSegReTxTh                  =  NET_TCP_RE_TX_TH_DFLT; /* See Note #11.                                     */
+
+
+    p_conn->TxRTT_RTO_Max_sec            =  NET_TCP_TX_RTO_MAX_TIMEOUT_DFLT_SEC; /* See Note #12.                       */
+#if 0                                                           /* See Note #1d.                                        */
+    p_conn->TxRTT_Avg_ms_scaled          =  NET_TCP_TX_RTT_NONE;
+    p_conn->TxRTT_Dev_ms_scaled          =  NET_TCP_TX_RTT_NONE;
+    p_conn->TxRTT_RTO_ms_scaled          =  NET_TCP_TX_RTO_NONE;
+    p_conn->TxRTT_RTO_Max_ms_scaled      =  NET_TCP_TX_RTO_NONE;/* See Note #1d1.                                       */
+    p_conn->TxRTT_Avg_ms                 =  NET_TCP_TX_RTT_NONE;
+    p_conn->TxRTT_Dev_ms                 =  NET_TCP_TX_RTT_NONE;
+    p_conn->TxRTT_RTO_ms                 =  NET_TCP_TX_RTO_NONE;
+    p_conn->TxRTT_RTO_Max_ms             =  NET_TCP_TX_RTO_NONE;/* See Note #1d1.                                       */
+    p_conn->TxRTT_RTO_sec                =  NET_TCP_TX_RTO_NONE;
+    p_conn->TxRTT_RTO_tick               =  NET_TMR_TIME_0S;
+    p_conn->TxRTT_RTO_State              =  NET_TCP_TX_RTT_RTO_STATE_NONE;
+#endif
+
+
+    p_conn->TxQ_State                    =  NET_TCP_TX_Q_STATE_CLOSED;
+    p_conn->TxQ_Head                     =  DEF_NULL;
+    p_conn->TxQ_Tail                     =  DEF_NULL;
+    p_conn->TxQ_IdleTmr                  =  DEF_NULL;
+    p_conn->TxQ_SillyWinTmr              =  DEF_NULL;
+    p_conn->TxQ_ZeroWinTmr               =  DEF_NULL;
+    p_conn->ReTxQ_Head                   =  DEF_NULL;
+    p_conn->ReTxQ_Tail                   =  DEF_NULL;
+    p_conn->ReTxQ_Tmr                    =  DEF_NULL;
+
+
+
+    p_conn->TimeoutTmr                   =  DEF_NULL;
+    p_conn->TimeoutConn_sec              =  NET_TCP_CONN_TIMEOUT_IDLE_DFLT_SEC; /* See Note #13a.                       */
+    p_conn->TimeoutUser_sec              =  NET_TCP_CONN_TIMEOUT_USER_DFLT_SEC; /* See Note #13c.                       */
+    p_conn->TimeoutMaxSeg_sec            =  NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC; /* See Note #13b.                    */
+    p_conn->TimeoutConn_tick             =  p_conn->TimeoutConn_sec   * NET_TMR_TIME_TICK_PER_SEC;
+    p_conn->TimeoutUser_tick             =  p_conn->TimeoutUser_sec   * NET_TMR_TIME_TICK_PER_SEC;
+    p_conn->TimeoutMaxSeg_tick_scaled    =  p_conn->TimeoutMaxSeg_sec * NET_TMR_TIME_TICK_PER_SEC * NET_TCP_CONN_TIMEOUT_MAX_SEG_SCALAR;
+
+
+
+    p_conn->Flags                        =  NET_TCP_FLAG_NONE;
+
+    p_conn->FnctAppListenQ_IsAvail       =  DEF_NULL;
+    p_conn->FnctAppPostRx                =  DEF_NULL;
+    p_conn->FnctAppPostTx                =  DEF_NULL;
+
+
+    NetTCP_ConnCfg(p_conn, NET_TCP_CONN_CFG_ALL);               /* See Note #1.                                         */
+
+
+
+                                                                /* -------------- CFG DFLT TIMEOUT VALS --------------- */
+    NetTCP_RxQ_TimeoutDflt(conn_id_tcp, &err);
+    NetTCP_TxQ_TimeoutDflt(conn_id_tcp, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetTCP_ConnCopy()
+*
+* Description : (1) Copy/clone a TCP connection :
+*
+*                   (a) Copy connection parameters :
+*
+*                       (1) TCP connection state
+*
+*                       (2) Receive  parameters :
+*                           (A)    Receive  window size
+*
+*                       (3) Transmit parameters :
+*                           (A)    Transmit window size
+*                           (B)    Transmit acknowledgement
+*                           (C)    Transmit keep-alive
+*
+*                           (D) Re-transmit parameters :
+*                               (1) Threshold
+*                               (2) Maximum timeout
+*
+*                           (E) IP transmit parameters :
+*                               (1) TOS
+*                               (2) TTL
+*                               (3) IP flags
+*
+*                       (4) TCP connection timeout values
+*
+*                   (b) Configure copied connection parameters :
+*
+*                       (1)    Receive  controls
+*                       (2)    Transmit controls
+*                       (3) Re-transmit controls
+*
+*
+* Argument(s) : p_conn_dest      Pointer to TCP connection to receive TCP connection copy.
+*               ----------      Argument validated in NetTCP_RxPktConnHandlerListen().
+*
+*               p_conn_src       Pointer to TCP connection to copy.
+*               ---------       Argument validated in NetTCP_RxPktConnHandlerListen().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_RxPktConnHandlerListen().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnCopy (NET_TCP_CONN  *p_conn_dest,
+                               NET_TCP_CONN  *p_conn_src)
+{
+    NET_TCP_CFG_CODE  cfg_code;
+
+
+    p_conn_dest->ConnState                   = p_conn_src->ConnState;
+
+
+    p_conn_dest->MaxSegSizeLocalCfgd         = p_conn_src->MaxSegSizeLocalCfgd;
+
+
+    p_conn_dest->RxWinSizeCfgd               = p_conn_src->RxWinSizeCfgd;
+
+
+    p_conn_dest->TxWinSizeCfgd               = p_conn_src->TxWinSizeCfgd;
+    p_conn_dest->TxWinSizeNagleEn            = p_conn_src->TxWinSizeNagleEn;
+
+    p_conn_dest->TxAckDlyTimeout_ms          = p_conn_src->TxAckDlyTimeout_ms;
+    p_conn_dest->TxAckDlyTimeout_tick        = p_conn_src->TxAckDlyTimeout_tick;
+    p_conn_dest->TxAckImmedRxdPushEn         = p_conn_src->TxAckImmedRxdPushEn;
+
+    p_conn_dest->TxKeepAliveEn               = p_conn_src->TxKeepAliveEn;
+    p_conn_dest->TxKeepAliveTh               = p_conn_src->TxKeepAliveTh;
+    p_conn_dest->TxKeepAliveRetryTimeout_sec = p_conn_src->TxKeepAliveRetryTimeout_sec;
+
+    p_conn_dest->TxSegReTxTh                 = p_conn_src->TxSegReTxTh;
+    p_conn_dest->TxRTT_RTO_Max_sec           = p_conn_src->TxRTT_RTO_Max_sec;
+
+
+    p_conn_dest->TimeoutConn_sec             = p_conn_src->TimeoutConn_sec;
+    p_conn_dest->TimeoutUser_sec             = p_conn_src->TimeoutUser_sec;
+    p_conn_dest->TimeoutMaxSeg_sec           = p_conn_src->TimeoutMaxSeg_sec;
+    p_conn_dest->TimeoutConn_tick            = p_conn_src->TimeoutConn_tick;
+    p_conn_dest->TimeoutUser_tick            = p_conn_src->TimeoutUser_tick;
+    p_conn_dest->TimeoutMaxSeg_tick_scaled   = p_conn_src->TimeoutMaxSeg_tick_scaled;
+
+
+    NetConn_Copy(p_conn_dest->ID_Conn,
+                 p_conn_src->ID_Conn);
+
+                                                                /* Cfg conn (see Note #1b).                             */
+    cfg_code = NET_TCP_CONN_CFG_NONE         |
+               NET_TCP_CONN_CFG_WIN_SIZE_ALL |
+               NET_TCP_CONN_CFG_TX_RTT_RTO;
+    NetTCP_ConnCfg(p_conn_dest, cfg_code);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_ConnDiscard()
+*
+* Description : (1) Discard an invalid/corrupted TCP connection :
+*
+*                   (a) Discard TCP connection from available TCP connection pool           See Note #2
+*                   (b) Update  TCP connection pool statistics
+*
+*               (2) Assumes TCP connection is invalid/corrupt & MUST be removed.  TCP connection removed
+*                   simply by NOT returning the TCP connection back to the TCP connection pool.
+*
+*
+* Argument(s) : p_conn       Pointer to an invalid/corrupted TCP connection.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_ConnGet(),
+*               NetTCP_ConnFree().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetTCP_ConnDiscard (NET_TCP_CONN  *p_conn)
+{
+    NET_ERR  err;
+
+                                                                /* ----------------- DISCARD TCP CONN ----------------- */
+   (void)&p_conn;                                               /* Prevent 'variable unused' warning (see Note #2).     */
+
+                                                                /* --------------- UPDATE DISCARD STATS --------------- */
+    NetStat_PoolEntryLostInc(&NetTCP_ConnPoolStat, &err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetUDP_GetTxDataIx()
+*
+* Description : Get the offset of a buffer at which the UDP data can be written.
+*
+* Argument(s) : if_nbr
+*
+*               protocol
+*
+*               data_len
+*
+*               flags
+*
+*               p_ix
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+static  void  NetTCP_GetTxDataIx (NET_IF_NBR          if_nbr,
+                                  NET_PROTOCOL_TYPE   protocol,
+                                  CPU_INT16U          additial_hdr_size,
+                                  CPU_INT16U          data_len,
+                                  NET_TCP_CONN       *p_conn,
+                                  CPU_INT16U         *p_ix,
+                                  NET_ERR            *p_err)
+{
+    NET_MTU  mtu;
+
+
+   *p_ix += (NET_TCP_HDR_SIZE_MIN + additial_hdr_size);
+
+#if 0
+    remove extra tcp header option length.
+#endif
+
+    switch (protocol) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_TCP_V4:
+             mtu = NetIF_MTU_GetProtocol(if_nbr, NET_PROTOCOL_TYPE_TCP_V4, NET_IF_FLAG_NONE, p_err);
+
+             NetIPv4_TxIxDataGet(if_nbr,
+                                 data_len,
+                                 mtu,
+                                 p_ix,
+                                 p_err);
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_PROTOCOL_TYPE_TCP_V6:
+             mtu = NetIF_MTU_GetProtocol(if_nbr, NET_PROTOCOL_TYPE_TCP_V6, NET_IF_FLAG_NONE, p_err);
+
+             if (*p_err != NET_IF_ERR_NONE) {
+                return;
+             }
+
+             NetIPv6_GetTxDataIx(if_nbr,
+                                 DEF_NULL,
+                                 data_len,
+                                 mtu,
+                                 p_ix,
+                                 p_err);
+             break;
+#endif
+
+        default:
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+   (void)&p_conn;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif                                                          /* ---------------- NET_TCP_MODULE_EN ----------------- */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tcp.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tcp.h
new file mode 100644
index 0000000..731b845
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tcp.h
@@ -0,0 +1,2301 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK TCP LAYER
+*                                   (TRANSMISSION CONTROL PROTOCOL)
+*
+* Filename      : net_tcp.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+* Note(s)       : (1) Supports Transmission Control Protocol as described in RFC #793 with the following
+*                     restrictions/constraints :
+*
+*                     (a) TCP Security & Precedence NOT supported               RFC # 793, Section 3.6
+*
+*                     (b) TCP Urgent Data           NOT supported               RFC # 793, Section 3.7
+*                                                                                'The Communication of
+*                                                                                  Urgent Information'
+*
+*                     (c) The following TCP options NOT supported :
+*
+*                         (1) Window Scale                                      RFC #1072, Section 2
+*                                                                               RFC #1323, Section 2
+*                         (2) Selective Acknowledgement (SACK)                  RFC #1072, Section 3
+*                                                                               RFC #2018
+*                                                                               RFC #2883
+*                         (3) TCP Echo                                          RFC #1072, Section 4
+*                         (4) Timestamp                                         RFC #1323, Section 3.2
+*                         (5) Protection Against Wrapped Sequences (PAWS)       RFC #1323, Section 4
+*
+*                     (d) IP-Options-to-TCP-Connection                          RFC #1122, Section 4.2.3.8
+*                                Handling NOT supported #### NET-804
+*
+*                     (e) ICMP-Error-Message-to-TCP-Connection                  RFC #1122, Section 4.2.3.9
+*                                Handling NOT currently supported #### NET-805
+*
+*                 (2) TCP Layer assumes/requires Network Socket Layer (see 'net_sock.h  MODULE  Note #1a2').
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  "net_def.h"
+#include  "net_type.h"
+#include  "net_conn.h"
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_ipv4.h"
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ipv6.h"
+#endif
+
+#include  "cpu_def.h"
+#include  "net_tmr.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) TCP Layer module is NOT required for UDP-to-Application API configuration.
+*
+*               See also 'net_cfg.h  TRANSPORT LAYER CONFIGURATION'
+*                      & 'net_cfg.h  USER DATAGRAM PROTOCOL LAYER CONFIGURATION'.
+*
+*               See also 'net_tcp.h  Note #2'.
+*
+*           (2) The following TCP-module-present configuration value MUST be pre-#define'd in
+*               'net_cfg_net.h' PRIOR to all other network modules that require TCP Layer
+*               configuration (see 'net_cfg_net.h  TCP LAYER CONFIGURATION  Note #2b') :
+*
+*                   NET_TCP_MODULE_EN
+*********************************************************************************************************
+*/
+
+#ifndef  NET_TCP_MODULE_PRESENT
+#define  NET_TCP_MODULE_PRESENT
+
+#ifdef   NET_TCP_MODULE_EN                                 /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef NET_TCP_MODULE
+#define  NET_TCP_EXT
+#else
+#define  NET_TCP_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#ifndef  NET_TCP_CFG_NEW_WINDOW_MGMT_EN
+#define  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+#endif
+
+
+#define  NET_TCP_NBR_CONN                              (NET_TCP_CFG_NBR_CONN      + \
+                                                        NET_SOCK_CFG_SOCK_NBR_TCP + \
+                                                       (NET_SOCK_CFG_SOCK_NBR_TCP * \
+                                                        NET_SOCK_CFG_CONN_ACCEPT_Q_SIZE_MAX))
+
+
+#ifndef  NET_TCP_DFLT_RX_WIN_SIZE_OCTET
+    #define  NET_TCP_DFLT_RX_WIN_SIZE_OCTET              NET_SOCK_CFG_RX_Q_SIZE_OCTET
+#endif
+
+#ifndef  NET_TCP_DFLT_TX_WIN_SIZE_OCTET
+    #define  NET_TCP_DFLT_TX_WIN_SIZE_OCTET              NET_SOCK_CFG_TX_Q_SIZE_OCTET
+#endif
+
+
+
+#ifndef  NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC
+                                                                /* Configure TCP connections' default maximum ...       */
+                                                                /* ... segment lifetime timeout (MSL) value,  ...       */
+    #define  NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC          0u  /* ... in integer seconds (see Note #3).                */
+#endif
+
+
+#ifndef  NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC
+                                                                /* Configure TCP connections' default FIN-WAIT-2 ...    */
+    #define  NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC      15u  /* ... timeout value, in integer seconds (see Note #4). */
+#endif
+
+
+#ifndef  NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS
+
+                                                                /* Configure TCP acknowledgement delay ...              */
+    #define  NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS         500u   /* ... in integer milliseconds (see Note #5).           */
+#endif
+
+
+#ifndef  NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS
+                                                                /* Configure TCP timeouts (see Note #6) :               */
+                                                                /* Configure TCP connection receive  queue timeout.     */
+    #define  NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS           1000u
+#endif
+
+#ifndef  NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS
+                                                                /* Configure TCP connection transmit queue timeout.     */
+    #define  NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS           1000u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         TCP HEADER DEFINES
+*
+* Note(s) : (1) The following TCP value MUST be pre-#define'd in 'net_def.h' PRIOR to 'net_buf.h' so that
+*               the Network Buffer Module can configure maximum buffer header size (see 'net_def.h  TCP
+*               LAYER DEFINES' & 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1a2') :
+*
+*               (a) NET_TCP_HDR_SIZE_MAX                  60        (NET_TCP_HDR_LEN_MAX
+*                                                                  * NET_TCP_HDR_LEN_WORD_SIZE)
+*
+*           (2) Urgent pointer & data NOT supported (see 'net_tcp.h  Note #1b').
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_HDR_LEN_MASK                         0xF000u
+#define  NET_TCP_HDR_LEN_SHIFT                            12u
+#define  NET_TCP_HDR_LEN_NONE                              0
+
+#if 0                                                           /* See Note #1a.                                        */
+#define  NET_TCP_HDR_SIZE_MAX                           (NET_TCP_HDR_LEN_MAX * NET_TCP_HDR_LEN_WORD_SIZE)
+#endif
+
+#define  NET_TCP_HDR_SIZE_TOT_MIN                       (NET_IP_HDR_SIZE_TOT_MIN + NET_TCP_HDR_SIZE_MIN)
+#define  NET_TCP_HDR_SIZE_TOT_MAX                       (NET_IP_HDR_SIZE_TOT_MAX + NET_TCP_HDR_SIZE_MAX)
+
+
+#define  NET_TCP_PSEUDO_HDR_SIZE                          12    /*  = sizeof(NET_TCP_PSEUDO_HDR)                        */
+
+
+#define  NET_TCP_PORT_NBR_RESERVED                       NET_PORT_NBR_RESERVED
+#define  NET_TCP_PORT_NBR_NONE                           NET_TCP_PORT_NBR_RESERVED
+
+
+#define  NET_TCP_HDR_URG_PTR_NONE                     0x0000u   /* See Note #2.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                       TCP HEADER FLAG DEFINES
+*
+* Note(s) : (1) See 'TCP HEADER  Note #2' for flag fields.
+*
+*           (2) Urgent pointer & data NOT supported (see 'net_tcp.h  Note #1b').
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_HDR_FLAG_MASK                        0x0FFFu
+
+#define  NET_TCP_HDR_FLAG_NONE                    DEF_BIT_NONE
+#define  NET_TCP_HDR_FLAG_RESERVED                    0x0FE0u   /* MUST be '0'.                                         */
+#define  NET_TCP_HDR_FLAG_URGENT                  DEF_BIT_05    /* See Note #2.                                         */
+#define  NET_TCP_HDR_FLAG_ACK                     DEF_BIT_04
+#define  NET_TCP_HDR_FLAG_PUSH                    DEF_BIT_03
+#define  NET_TCP_HDR_FLAG_RESET                   DEF_BIT_02
+#define  NET_TCP_HDR_FLAG_SYNC                    DEF_BIT_01
+#define  NET_TCP_HDR_FLAG_FIN                     DEF_BIT_00
+#define  NET_TCP_HDR_FLAG_CLOSE                   NET_TCP_HDR_FLAG_FIN
+
+
+/*
+*********************************************************************************************************
+*                                          TCP FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ NET TCP FLAGS ------------------- */
+#define  NET_TCP_FLAG_NONE                        DEF_BIT_NONE
+#define  NET_TCP_FLAG_USED                        DEF_BIT_00    /* TCP conn cur used; i.e. NOT in free TCP conn pool.   */
+
+
+                                                                /* ------------------ TCP TX  FLAGS ------------------- */
+                                                                /* TCP tx flags copied from TCP hdr flags.              */
+#define  NET_TCP_FLAG_TX_FIN                      NET_TCP_HDR_FLAG_FIN
+#define  NET_TCP_FLAG_TX_CLOSE                    NET_TCP_FLAG_TX_FIN
+#define  NET_TCP_FLAG_TX_SYNC                     NET_TCP_HDR_FLAG_SYNC
+#define  NET_TCP_FLAG_TX_RESET                    NET_TCP_HDR_FLAG_RESET
+#define  NET_TCP_FLAG_TX_PUSH                     NET_TCP_HDR_FLAG_PUSH
+#define  NET_TCP_FLAG_TX_ACK                      NET_TCP_HDR_FLAG_ACK
+#define  NET_TCP_FLAG_TX_URGENT                   NET_TCP_HDR_FLAG_URGENT
+
+#define  NET_TCP_FLAG_TX_BLOCK                    DEF_BIT_07
+
+                                                                /* ------------------ TCP RX  FLAGS ------------------- */
+#define  NET_TCP_FLAG_RX_DATA_PEEK                DEF_BIT_08
+#define  NET_TCP_FLAG_RX_BLOCK                    DEF_BIT_15
+
+
+/*
+*********************************************************************************************************
+*                                     TCP SEQUENCE NUMBER DEFINES
+*
+* Note(s) : (1) TCP initial transmit sequence number is incremented by a fixed value, preferably a large
+*               prime value or a large value with multiple unique factors.
+*
+*               (a) One reasonable TCP initial transmit sequence number increment value example :
+*
+*                       65527  =  37 * 23 * 11 * 7
+*
+*
+*               NET_TCP_TX_SEQ_NBR_CTR_INC could be developer-configured in 'net_cfg.h'.
+*
+*               See also 'NET_TCP_TX_GET_SEQ_NBR()  Notes #1b2 & #1c2'.
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_SEQ_NBR_NONE                          0u
+#define  NET_TCP_ACK_NBR_NONE                          NET_TCP_SEQ_NBR_NONE
+
+#ifndef  NET_TCP_DFLT_TX_SEQ_NBR_CTR_INC
+#define  NET_TCP_TX_SEQ_NBR_CTR_INC                    65527u   /* See Note #1.                                         */
+#else
+#define  NET_TCP_TX_SEQ_NBR_CTR_INC                    NET_TCP_DFLT_TX_SEQ_NBR_CTR_INC
+#endif
+
+#define  NET_TCP_ACK_NBR_DUP_WIN_SIZE_SCALE                4
+
+
+/*
+*********************************************************************************************************
+*                                    TCP DATA/TOTAL LENGTH DEFINES
+*
+* Note(s) : (1) (a) TCP total length #define's (NET_TCP_TOT_LEN)  relate to the total size of a complete
+*                   TCP packet, including the packet's TCP header.  Note that a complete TCP packet MAY
+*                   be fragmented in multiple Internet Protocol packets.
+*
+*               (b) TCP data  length #define's (NET_TCP_DATA_LEN) relate to the data  size of a complete
+*                   TCP packet, equal to the total TCP packet length minus its TCP header size.  Note
+*                   that a complete TCP packet MAY be fragmented in multiple Internet Protocol packets.
+*********************************************************************************************************
+*/
+
+                                                                                /* See Notes #1a & #1b.                 */
+#define  NET_TCP_DATA_LEN_MIN                              0
+
+#define  NET_TCP_TOT_LEN_MIN                            (NET_TCP_HDR_SIZE_MIN  + NET_TCP_DATA_LEN_MIN)
+#if    defined(NET_IPv4_MODULE_EN)
+#define  NET_TCP_TOT_LEN_MAX                            (NET_IPv4_TOT_LEN_MAX  - NET_IPv4_HDR_SIZE_MIN)
+#elif  defined(NET_IPv6_MODULE_EN)
+#define  NET_TCP_TOT_LEN_MAX                            (NET_IPv6_TOT_LEN_MAX  - NET_IPv6_HDR_SIZE)
+#endif
+
+#define  NET_TCP_DATA_LEN_MAX                           (NET_TCP_TOT_LEN_MAX  - NET_TCP_HDR_SIZE_MIN)
+
+
+/*
+*********************************************************************************************************
+*                                      TCP SEGMENT SIZE DEFINES
+*
+* Note(s) : (1) (a) RFC # 879, Section 3 states that the TCP Maximum Segment Size "counts only
+*                   data octets in the segment, ... not the TCP header or the IP header".
+*
+*               (b) RFC #1122, Section 4.2.2.6 requires that :
+*
+*                   (1) "The MSS value to be sent in an MSS option must be less than or equal to
+*
+*                        (A) MMS_R - 20
+*
+*                        where MMS_R is the maximum size for a transport-layer message that can
+*                        be received."
+*
+*                   (2) "If an MSS option is not received at connection setup, TCP MUST assume a
+*                        default send MSS of 536 (576 - 40)."
+*
+*                   See also 'net_ip.h  IP DATA/TOTAL LENGTH DEFINES  Note #1'.
+*********************************************************************************************************
+*/
+
+                                                                                        /* See Note #1.                 */
+#ifdef   NET_IPv4_MODULE_EN
+#define  NET_TCP_MAX_SEG_SIZE_DFLT_V4                   (NET_IPv4_MAX_DATAGRAM_SIZE_DFLT - NET_IPv4_HDR_SIZE_MIN - NET_TCP_HDR_SIZE_MIN)
+#endif
+
+#ifdef   NET_IPv6_MODULE_EN
+#define  NET_TCP_MAX_SEG_SIZE_DFLT_V6                   (NET_IPv6_MAX_DATAGRAM_SIZE_DFLT - NET_IPv6_HDR_SIZE - NET_TCP_HDR_SIZE_MIN)
+#endif
+
+#if    defined(NET_IPv4_MODULE_EN) && defined(NET_IPv6_MODULE_EN)
+#define  NET_TCP_MAX_SEG_SIZE_DFLT                       NET_TCP_MAX_SEG_SIZE_DFLT_V6
+#elif  defined(NET_IPv4_MODULE_EN)
+#define  NET_TCP_MAX_SEG_SIZE_DFLT                       NET_TCP_MAX_SEG_SIZE_DFLT_V4
+#elif  defined(NET_IPv6_MODULE_EN)
+#define  NET_TCP_MAX_SEG_SIZE_DFLT                       NET_TCP_MAX_SEG_SIZE_DFLT_V6
+#endif
+
+#define  NET_TCP_MAX_SEG_SIZE_DFLT_RX                    NET_TCP_DATA_LEN_MAX           /* See Note #1b1.               */
+#define  NET_TCP_MAX_SEG_SIZE_DFLT_TX                    NET_TCP_MAX_SEG_SIZE_DFLT      /* See Note #1b2.               */
+
+#define  NET_TCP_MAX_SEG_SIZE_NONE                         0
+#define  NET_TCP_MAX_SEG_SIZE_MIN                        NET_TCP_MAX_SEG_SIZE_DFLT
+#define  NET_TCP_MAX_SEG_SIZE_MAX                        NET_TCP_DATA_LEN_MAX
+
+
+#define  NET_TCP_SEG_LEN_MIN                             NET_TCP_DATA_LEN_MIN
+#define  NET_TCP_SEG_LEN_MAX                             NET_TCP_DATA_LEN_MAX
+
+#define  NET_TCP_SEG_LEN_SYNC                              1
+#define  NET_TCP_SEG_LEN_FIN                               1
+#define  NET_TCP_SEG_LEN_CLOSE                           NET_TCP_SEG_LEN_FIN
+#define  NET_TCP_SEG_LEN_ACK                               0
+#define  NET_TCP_SEG_LEN_RESET                             0
+#define  NET_TCP_SEG_LEN_PROBE                             0
+
+#define  NET_TCP_DATA_LEN_TX_SYNC                          0
+#define  NET_TCP_DATA_LEN_TX_FIN                           0
+#define  NET_TCP_DATA_LEN_TX_CLOSE                       NET_TCP_DATA_LEN_TX_FIN
+#define  NET_TCP_DATA_LEN_TX_ACK                           0
+#define  NET_TCP_DATA_LEN_TX_PROBE_NO_DATA                 0
+#define  NET_TCP_DATA_LEN_TX_PROBE_DATA                    1
+#define  NET_TCP_DATA_LEN_TX_RESET                         0
+
+
+/*
+*********************************************************************************************************
+*                                       TCP WINDOW SIZE DEFINES
+*
+* Note(s) : (1) Although NO RFC specifies the absolute minimum TCP connection window size value allowed,
+*               RFC #793, Section 3.7 'Data Communication : Managing the Window' states that for "the
+*               window ... there is an assumption that this is related to the currently available data
+*               buffer space available for this connection".
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_WIN_SIZE_NONE                             0
+
+#define  NET_TCP_WIN_SIZE_MIN                            NET_TCP_MAX_SEG_SIZE_MIN
+#define  NET_TCP_WIN_SIZE_MAX                            DEF_INT_16U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                     TCP HEADER OPTIONS DEFINES
+*
+* Note(s) : (1) See the following RFC's for TCP options summary :
+*
+*               (a) RFC # 793, Section  3.1 'Header Format : Options'
+*               (b) RFC #1122; Sections 4.2.2.5, 4.2.2.6
+*
+*           (2) TCP option types are encoded in the first octet for each TCP option as follows :
+*
+*                           --------
+*                           | TYPE |
+*                           --------
+*
+*               The TCP option type value determines the TCP option format :
+*
+*               (a) The following TCP option types are single-octet TCP options -- i.e. the option type
+*                   octet is the ONLY octet for the TCP option.
+*
+*                   (1) TYPE =  0   End of Options List
+*                   (2) TYPE =  1   No Operation
+*
+*
+*               (b) All other TCP options MUST be multi-octet TCP options (see RFC #1122, Section 4.2.2.5) :
+*
+*                           ------------------------------
+*                           | TYPE | LEN  |   TCP OPT    |
+*                           ------------------------------
+*
+*                       where
+*                               TYPE        Indicates the specific TCP option type
+*                               LEN         Indicates the total    TCP option length, in octets, including
+*                                                the option type & the option length octets
+*                               TCP OPT     Additional TCP option octets, if any, that contain the remaining
+*                                                TCP option information
+*
+*                   The following TCP option types are multi-octet TCP options where the option's second
+*                   octet specify the total TCP option length, in octets, including the option type & the
+*                   option length octets :
+*
+*                   (1) TYPE =  2   Maximum Segment Size        See RFC # 793, Section  3.1 'Header Format :
+*                                                                   Options : Maximum Segment Size';
+*                                                                   RFC #1122, Section 4.2.2.6;
+*                                                                   RFC # 879, Section 3
+*
+*                   (2) TYPE =  3   Window  Scale               See 'net_tcp.h  Note #1c1'
+*                   (3) TYPE =  4   SACK Allowed                See 'net_tcp.h  Note #1c2'
+*                   (4) TYPE =  5   SACK Option                 See 'net_tcp.h  Note #1c2'
+*                   (5) TYPE =  6   Echo Request                See 'net_tcp.h  Note #1c3'
+*                   (6) TYPE =  7   Echo Reply                  See 'net_tcp.h  Note #1c3'
+*                   (7) TYPE =  8   Timestamp                   See 'net_tcp.h  Note #1c4'
+*
+*           (3) TCP header allows for a maximum option list length of 40 octets :
+*
+*                   NET_TCP_HDR_OPT_SIZE_MAX = NET_TCP_HDR_SIZE_MAX - NET_TCP_HDR_SIZE_MIN
+*
+*                                            = 60 - 20
+*
+*                                            = 40
+*
+*           (4) 'NET_TCP_OPT_SIZE'  MUST be pre-defined PRIOR to all definitions that require TCP option
+*                size data type.
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_HDR_OPT_END_LIST                          0u
+#define  NET_TCP_HDR_OPT_NOP                               1u
+#define  NET_TCP_HDR_OPT_MAX_SEG_SIZE                      2u
+#define  NET_TCP_HDR_OPT_WIN_SCALE                         3u
+#define  NET_TCP_HDR_OPT_SACK_PERMIT                       4u
+#define  NET_TCP_HDR_OPT_SACK                              5u
+#define  NET_TCP_HDR_OPT_ECHO_REQ                          6u
+#define  NET_TCP_HDR_OPT_ECHO_REPLY                        7u
+#define  NET_TCP_HDR_OPT_TS                                8u
+
+#define  NET_TCP_HDR_OPT_PAD                             NET_TCP_HDR_OPT_END_LIST
+
+
+#define  NET_TCP_HDR_OPT_LEN_END_LIST                      1
+#define  NET_TCP_HDR_OPT_LEN_NOP                           1
+#define  NET_TCP_HDR_OPT_LEN_MAX_SEG_SIZE                  4
+#define  NET_TCP_HDR_OPT_LEN_WIN_SCALE                     3
+#define  NET_TCP_HDR_OPT_LEN_SACK_PERMIT                   2
+#define  NET_TCP_HDR_OPT_LEN_ECHO_REQ                      6
+#define  NET_TCP_HDR_OPT_LEN_ECHO_REPLY                    6
+#define  NET_TCP_HDR_OPT_LEN_TS                           10
+
+#define  NET_TCP_HDR_OPT_LEN_SACK_MIN                      6
+#define  NET_TCP_HDR_OPT_LEN_SACK_MAX                     38
+
+#define  NET_TCP_HDR_OPT_LEN_MIN                           1
+#define  NET_TCP_HDR_OPT_LEN_MIN_LEN                       2
+#define  NET_TCP_HDR_OPT_LEN_MAX                          38
+
+
+
+typedef  CPU_INT32U  NET_TCP_OPT_SIZE;                          /* TCP opt size data type (see Note #4).                */
+
+#define  NET_TCP_HDR_OPT_SIZE_WORD               (sizeof(NET_TCP_OPT_SIZE))
+#define  NET_TCP_HDR_OPT_SIZE_MAX                       (NET_TCP_HDR_SIZE_MAX - NET_TCP_HDR_SIZE_MIN)
+
+
+#define  NET_TCP_HDR_OPT_NBR_MIN                           0
+#define  NET_TCP_HDR_OPT_NBR_MAX                        (NET_TCP_HDR_OPT_SIZE_MAX / NET_TCP_HDR_OPT_SIZE_WORD)
+
+
+#define  NET_TCP_HDR_OPT_IX                              NET_TCP_HDR_SIZE_MIN
+
+
+/*
+*********************************************************************************************************
+*                                TCP OPTION CONFIGURATION TYPE DEFINES
+*
+* Note(s) : (1) NET_TCP_OPT_CFG_TYPE_&&& #define values specifically chosen as ASCII representations of
+*               the TCP option configuration types.  Memory displays of TCP option configuration buffers
+*               will display the TCP option configuration TYPEs with their chosen ASCII names.
+*********************************************************************************************************
+*/
+
+typedef  enum  net_tcp_opt_type {
+    NET_TCP_OPT_TYPE_NONE,
+    NET_TCP_OPT_TYPE_MAX_SEG_SIZE,
+    NET_TCP_OPT_TYPE_WIN_SCALE,                             /* See 'net_tcp.h  Note #1c1'.  */
+    NET_TCP_OPT_TYPE_SACK_PERMIT,                           /* See 'net_tcp.h  Note #1c2'.  */
+    NET_TCP_OPT_TYPE_SACK,                                  /* See 'net_tcp.h  Note #1c2'.  */
+    NET_TCP_OPT_TYPE_ECHO_REQ,                              /* See 'net_tcp.h  Note #1c3'.  */
+    NET_TCP_OPT_TYPE_ECHO_REPLY,                            /* See 'net_tcp.h  Note #1c3'.  */
+    NET_TCP_OPT_TYPE_TS                                     /* See 'net_tcp.h  Note #1c4'.  */
+} NET_TCP_OPT_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                   TCP CONNECTION TIMEOUT DEFINES
+*
+* Note(s) : (1) (a) (1) RFC #1122, Section 4.2.2.13 'DISCUSSION' states that "the graceful close algorithm
+*                       of TCP requires that the connection state remain defined on (at least) one end of
+*                       the connection, for a timeout period of 2xMSL ... During this period, the (remote
+*                       socket, local socket) pair that defines the connection is busy and cannot be reused".
+*
+*                   (2) The following sections reiterate that the TIME-WAIT state timeout scalar is two
+*                       maximum segment lifetimes (2 MSL) :
+*
+*                       (A) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES :
+*                               Check Sequence Number : TIME-WAIT STATE'
+*                       (B) RFC #793, Section 3.9 'Event Processing : SEGMENT ARRIVES :
+*                               Check FIN Bit         : TIME-WAIT STATE'
+*
+*               (b) (1) RFC #793, Section 3.3 'Sequence Numbers : Knowing When to Keep Quiet' states that
+*                       "the Maximum Segment Lifetime (MSL) is ... to be 2 minutes.  This is an engineering
+*                       choice, and may be changed if experience indicates it is desirable to do so".
+*
+*                   (2) Microsoft Corporation's Windows XP defaults MSL to 15 seconds.
+*
+*           (2) RFC #1122, Section 4.2.3.6 states that a "connection ... [may be] dropped ... when no data
+*               or acknowledgement packets have been received for the connection within an interval ... [of]
+*               no less than two hours".
+*
+*           (3) (a) (1) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 18.6 'FIN_WAIT_2 State',
+*                       Page 246 states that "many Berkeley-derived implementations prevent [an] infinite
+*                       wait in the FIN_WAIT_2 state ... [by] mov[ing] the connection into the CLOSED state
+*                       ... if the connection is idle for 10 minutes plus 75 seconds".
+*
+*                   (2) Wright/Stevens, TCP/IP Illustrated, Volume 2, 3rd Printing, Section 25.1 'A FIN_WAIT_2
+*                       timer', Page 818 reiterates that "to avoid leaving a connection in the FIN_WAIT_2
+*                       state forever ... when a connection moves from the FIN_WAIT_1 state to the FIN_WAIT_2
+*                       state ... [the TCP connection's] timer is set to 10 minutes ... [and] 75 seconds, and
+*                       when it expires ... the connection is dropped".
+*
+*               (b) 'FIN_WAIT_2' abbreviated to 'FW2' for TCP FIN-WAIT-2 state constants to enforce
+*                    ANSI-compliance of 31-character symbol length uniqueness.
+*********************************************************************************************************
+*/
+
+                                                                                    /* Max seg timeout (see Note #1b) : */
+#define  NET_TCP_CONN_TIMEOUT_MAX_SEG_MIN_SEC    ( 0                             )  /* ... min  =  0 sec                */
+#define  NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC    ( 2  *  DEF_TIME_NBR_SEC_PER_MIN)  /* ... max  =  2 min                */
+#define  NET_TCP_CONN_TIMEOUT_MAX_SEG_DFLT_SEC   (15                             )  /* ... dflt = 15 sec (see Note #1b2)*/
+
+#define  NET_TCP_CONN_TIMEOUT_MAX_SEG_SCALAR       2                                /* ... scalar (see Note #1a)        */
+
+
+                                                                                    /* TCP conn timeout :               */
+#define  NET_TCP_CONN_TIMEOUT_IDLE_MIN_SEC         1                                /* ... min  = 1s                    */
+#define  NET_TCP_CONN_TIMEOUT_IDLE_MAX_SEC       (12  *  DEF_TIME_NBR_SEC_PER_HR )  /* ... max  = 12 hr                 */
+#define  NET_TCP_CONN_TIMEOUT_IDLE_DFLT_SEC      ( 2  *  DEF_TIME_NBR_SEC_PER_HR )  /* ... dflt =  2 hr (see Note #2)   */
+
+                                                                                    /* Dflt user timeout                */
+#define  NET_TCP_CONN_TIMEOUT_USER_DFLT_SEC      (30  *  DEF_TIME_NBR_SEC_PER_MIN)  /* ...      = 30 min                */
+
+
+                                                                                    /* FIN-WAIT-2 timeout (see Note #3) */
+#define  NET_TCP_CONN_TIMEOUT_FW2_MIN_SEC        ( 0                             )
+#define  NET_TCP_CONN_TIMEOUT_FW2_MAX_SEC        NET_TCP_CONN_TIMEOUT_IDLE_MAX_SEC
+#define  NET_TCP_CONN_TIMEOUT_FW2_DFLT_SEC      ((10  *  DEF_TIME_NBR_SEC_PER_MIN) + \
+                                                  75                             )  /* ... dflt = 675 sec (see Note #3a)*/
+
+
+/*
+*********************************************************************************************************
+*                              TCP CONNECTION KEEP-ALIVE & PROBE DEFINES
+*
+* Note(s) : (1) (a) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 23.2, Page 332 states
+*                   that "if there is no activity on a given connection for 2 hours, ... [TCP] sends" :
+*
+*                   (1) "a total of 10 ... probes," ...
+*                   (2) "75 seconds apart."
+*
+*                   See also 'NetTCP_TxConnKeepAlive()  Notes #2c1A2b, #2c2A2, & #2c3'.
+*
+*               (b) RFC #1122, Section 4.2.3.6 states that "a [keep-alive] probe segment ... may or may
+*                   not contain one garbage octet of data".
+*
+*                   See also 'NetTCP_TxConnProbe()  Note #2b2'.
+*
+*           (2) 'KEEP_ALIVE' abbreviated to 'KA' for TCP keep-alive constants to enforce ANSI-compliance
+*                of 31-character symbol length uniqueness.
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_TX_KA_TH_MIN                              2u
+#define  NET_TCP_TX_KA_TH_MAX                             20u
+#define  NET_TCP_TX_KA_TH_DFLT                            10u   /* See Note #1a1.                                       */
+
+#define  NET_TCP_TX_KA_RETRY_TIMEOUT_MIN_SEC               5
+#define  NET_TCP_TX_KA_RETRY_TIMEOUT_MAX_SEC             300
+#define  NET_TCP_TX_KA_RETRY_TIMEOUT_DFLT_SEC             75    /* See Note #1a2.                                       */
+
+
+#define  NET_TCP_TX_PROBE_DATA                          0x00u   /* See Note #1b.                                        */
+
+
+/*
+*********************************************************************************************************
+*                                     TCP CONNECTION QUEUE STATES
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_RX_Q_STATE_NONE                           0u
+#define  NET_TCP_RX_Q_STATE_CLOSED                       100u
+#define  NET_TCP_RX_Q_STATE_CLOSING                      101u
+#define  NET_TCP_RX_Q_STATE_SYNC                         110u
+#define  NET_TCP_RX_Q_STATE_CONN                         111u
+
+
+#define  NET_TCP_TX_Q_STATE_NONE                           0u
+#define  NET_TCP_TX_Q_STATE_CLOSED                       200u
+#define  NET_TCP_TX_Q_STATE_CLOSING                      201u
+#define  NET_TCP_TX_Q_STATE_SYNC                         210u
+#define  NET_TCP_TX_Q_STATE_CONN                         211u
+#define  NET_TCP_TX_Q_STATE_SUSPEND                      215u
+#define  NET_TCP_TX_Q_STATE_CLOSED_SUSPEND               220u
+#define  NET_TCP_TX_Q_STATE_CLOSING_SUSPEND              221u
+
+
+/*
+*********************************************************************************************************
+*                                     TCP CONNECTION CODE DEFINES
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_CONN_RX_SEQ_NONE                         10u   /* NO        rx'd TCP conn seq.                         */
+#define  NET_TCP_CONN_RX_SEQ_SYNC_INVALID                 11u   /* Invalid   rx'd TCP conn sync.                        */
+#define  NET_TCP_CONN_RX_SEQ_SYNC                         12u   /*   Valid   rx'd TCP conn sync.                        */
+#define  NET_TCP_CONN_RX_SEQ_INVALID                      15u   /* Invalid   rx'd TCP conn seq.                         */
+#define  NET_TCP_CONN_RX_SEQ_VALID                        16u   /*   Valid   rx'd TCP conn seq.                         */
+#define  NET_TCP_CONN_RX_SEQ_KEEP_ALIVE                   17u   /*   Valid   rx'd TCP conn seq for a keep-alive.        */
+
+#define  NET_TCP_CONN_RX_ACK_NONE                         20u   /* NO        rx'd TCP conn ack.                         */
+#define  NET_TCP_CONN_RX_ACK_INVALID                      21u   /* Invalid   rx'd TCP conn ack.                         */
+#define  NET_TCP_CONN_RX_ACK_VALID                        22u   /*   Valid   rx'd TCP conn ack.                         */
+#define  NET_TCP_CONN_RX_ACK_DUP                          23u   /* Duplicate rx'd TCP conn ack.                         */
+#define  NET_TCP_CONN_RX_ACK_PREV                         24u   /* Prev'ly   rx'd TCP conn ack.                         */
+#define  NET_TCP_CONN_RX_ACK_OTW                          25u   /* Outside The Window rx'd TCP conn ack.                */
+
+#define  NET_TCP_CONN_RX_RESET_NONE                       30u   /* NO        rx'd TCP conn reset.                       */
+#define  NET_TCP_CONN_RX_RESET_INVALID                    31u   /* Invalid   rx'd TCP conn reset.                       */
+#define  NET_TCP_CONN_RX_RESET_VALID                      32u   /*   Valid   rx'd TCP conn reset.                       */
+
+#define  NET_TCP_CONN_RX_WIN_RESET                        50u   /* Reset cur rx win size.                               */
+#define  NET_TCP_CONN_RX_WIN_SET                          51u   /* Set   cur rx win size.                               */
+#define  NET_TCP_CONN_RX_WIN_INC                          52u   /* Inc   cur rx win size.                               */
+#define  NET_TCP_CONN_RX_WIN_DEC                          53u   /* Dec   cur rx win size.                               */
+#define  NET_TCP_CONN_RX_WIN_INIT                         54u   /* Init the current rx window size.                     */
+#define  NET_TCP_CONN_RX_WIN_ZERO                         55u
+
+#define  NET_TCP_CONN_TX_ACK_NONE                        120u   /* Do NOT tx TCP conn ack.                              */
+#define  NET_TCP_CONN_TX_ACK                             121u   /*        Tx TCP conn ack.                              */
+#define  NET_TCP_CONN_TX_ACK_IMMED                       122u   /*        Tx TCP conn ack immed'ly.                     */
+#define  NET_TCP_CONN_TX_ACK_FAULT                       123u   /*        Tx TCP conn ack on fault.                     */
+#define  NET_TCP_CONN_TX_ACK_TIMEOUT                     124u   /*        Tx TCP conn ack on timeout.                   */
+#define  NET_TCP_CONN_TX_ACK_OTW                         125u   /* Outside The Window tx'd TCP conn ack.                */
+
+#define  NET_TCP_CONN_TX_RESET_NONE                      130u   /* Do NOT tx TCP conn reset.                            */
+#define  NET_TCP_CONN_TX_RESET                           131u   /*        Tx TCP conn reset.                            */
+#define  NET_TCP_CONN_TX_RESET_FAULT                     133u   /*        Tx TCP conn reset on fault.                   */
+
+#define  NET_TCP_CONN_TX_WIN_RESET                       150u   /* Reset   cur tx        win size.                      */
+#define  NET_TCP_CONN_TX_WIN_SET                         151u   /* Set     cur tx        win size.                      */
+#define  NET_TCP_CONN_TX_WIN_INC                         152u   /* Inc     cur tx        win size.                      */
+#define  NET_TCP_CONN_TX_WIN_DEC                         153u   /* Dec     cur tx        win size.                      */
+
+#define  NET_TCP_CONN_TX_WIN_SEG_RXD                     155u   /* Update  cur tx        win size based on rx'd seg.    */
+#define  NET_TCP_CONN_TX_WIN_TIMEOUT                     156u   /* Timeout cur tx        win size.                      */
+#define  NET_TCP_CONN_TX_WIN_REMOTE_UPDATE               157u   /* Update  cur tx remote win size.                      */
+
+#define  NET_TCP_CONN_TX_WIN_CONG_INC_SLOW_START         160u   /* Inc         tx cong   win size based on slow start.  */
+#define  NET_TCP_CONN_TX_WIN_CONG_INC_CONG_AVOID         161u   /* Inc         tx cong   win size based on cong avoid.  */
+#define  NET_TCP_CONN_TX_WIN_CONG_INC_REM                162u   /* Inc     rem tx cong   win size.                      */
+#define  NET_TCP_CONN_TX_WIN_CONG_SET_SLOW_START         165u   /* Set         tx cong   win size to slow start    th.  */
+#define  NET_TCP_CONN_TX_WIN_CONG_SET_FAST_RECOVERY      166u   /* Set         tx cong   win size to fast recovery th.  */
+#define  NET_TCP_CONN_TX_WIN_CONG_SET_TIMEOUT            167u   /* Set         tx cong   win size to timeout       th.  */
+
+#define  NET_TCP_CONN_TX_RTT_RESET                       170u   /* Reset    tx RTT     ctrls.                           */
+#define  NET_TCP_CONN_TX_RTT_RTO_INIT                    171u   /* Init     tx RTT/RTO ctrls.                           */
+#define  NET_TCP_CONN_TX_RTT_RTO_CALC                    175u   /* Calc     tx RTT/RTO ctrls.                           */
+#define  NET_TCP_CONN_TX_RTO_BACKOFF                     176u   /* Back-off tx     RTO ctrls.                           */
+
+
+/*
+*********************************************************************************************************
+*                                   TCP CONGESTION CONTROL DEFINES
+*
+* Note(s) : (1) See the following RFC's for TCP Congestion Control summary :
+*
+*               (a) (1) RFC #2001                       TCP Congestion Control
+*                   (2) RFC #2581                           Slow Start                      See Note #2
+*                                                           Congestion Avoidance            See Note #3
+*                                                           Fast Re-transmit                See Note #4
+*                                                           Fast Recovery                   See Note #4
+*
+*               (b) (1) RFC # 813                       Silly Window Syndrome (SWS)         See Note #5
+*                   (2) RFC #1122
+*                       (A) Section 4.2.2.14
+*                       (B) Section 4.2.3.3             Receive  SWS (RSWS)                 See Note #5a
+*                       (C) Section 4.2.3.4             Transmit SWS (TSWS)                 See Note #5b
+*
+*               (c) (1) RFC # 896                       Nagle's Algorithm
+*                   (2) RFC #1122
+*                       (A) Section 4.2.2.14
+*                       (B) Section 4.2.3.4
+*
+*               (d) (1) RFC # 813, Section 5            Delayed TCP Acknowledgments         See Note #6
+*                   (2) RFC #1122, Section 4.2.3.2
+*                   (3) RFC #2581, Section 4.2
+*
+*               (e) RFC #1122
+*                   (1) Section 4.2.2.2                 TCP Segment PUSH
+*                   (2) Section 4.2.2.17                Probing Zero Windows /
+*                                                       TCP  Persist Timer
+*                   (3) Section 4.2.3.5                 TCP  Connection Failures            See  Note #7
+*                   (4) Section 4.2.3.9                 ICMP Error Message   /              See 'net_tcp.h
+*                                                       TCP  Congestion Recovery                 Note #1e'
+*
+*
+*           (2) (a) RFC #2581, Section 3.1 states that "the initial value of ssthresh [slow start threshold]
+*                   MAY be arbitrarily high (for example, some implementations use the size of the advertised
+*                   window)".
+*
+*                   (1) This amends RFC #2001, Section 2.1 which previously stated that "initialization for
+*                       a given connection sets ... ssthresh to 65535 bytes".
+*
+*               (b) RFC #2581, Section 3.1, states that "when a TCP sender detects segment loss using the
+*                   retransmission timer, the value of ssthresh MUST be set to no more than" :
+*
+*                       (3) ssthresh  =  max (FlightSize / 2, 2 * SMSS)
+*
+*                               where
+*                                   (A) FlightSize          Amount of outstanding data in the network
+*                                   (B) SMSS                Sender Maximum Segment Size -- the size of the
+*                                                               largest segment that the sender can transmit
+*
+*               (c) 'SLOW_START_TH' (i.e. 'Slow Start Threshold') abbreviated to 'SST' for some TCP control
+*                    constants to enforce ANSI-compliance of 31-character symbol length uniqueness.
+*
+*               See also 'net_tcp.c  NetTCP_TxConnWinSizeHandlerCongCtrl()  Notes #2c1A1b & #2c2A1b'.
+*
+*           (3) RFC #2581, Section 3.1 states that :
+*
+*               (a) "The initial value of cwnd [congestion window], MUST be less than or equal to 2*SMSS
+*                    bytes and MUST NOT be more than 2 segments."
+*
+*                   (1) This amends RFC #2001, Section 2.1 which previously stated that "initialization
+*                       for a given connection sets cwnd to one segment".
+*
+*               (b) "During congestion avoidance, cwnd MUST NOT be increased by more than ... 1 full-sized
+*                    segment per RTT [TCP segment round-trip time]."
+*
+*               (c) "Upon a timeout cwnd MUST be set to no more than ... 1 full-sized segment."
+*
+*               See also 'net_tcp.c  NetTCP_TxConnWinSizeHandlerCongCtrl()  Notes #2c1A1a, #2c1A4b2,
+*                                                                                 #2c2A1a, & #2c2A4'.
+*
+*           (4) RFC #2581, Section 3.2 states that :
+*
+*               (a) "The fast retransmit algorithm uses the arrival of 3 duplicate ACKs ... as an indication
+*                    ... [to perform] a retransmission".
+*
+*               (b) "When the third duplicate ACK is received" :
+*
+*                   (1) "Set ssthresh to no more than the value given in equation 3" (see Note #2b).
+*
+*                   (2) "Set cwnd to ssthresh plus 3*SMSS.  This artificially 'inflates' the congestion
+*                        window by the number of segments (three) that have left the network."
+*
+*               (c) "For each additional duplicate ACK received, increment cwnd by SMSS."
+*
+*               See also 'net_tcp.c  NetTCP_TxConnWinSizeHandlerCongCtrl()  Notes #2c1B & #2c2B'.
+*
+*           (5) (a) RFC #1122, Section 4.2.3.3 states that "the suggested SWS avoidance algorithm for the
+*                   receiver is ... to avoid advancing the right window edge RCV.NXT+RCV.WND ... until the
+*                   reduction satisfies" :
+*
+*                       (1) RCV.BUFF - RCV.USER - RCV.WND  >=  min(Fr * RCV.BUFF, Eff.snd.MSS)
+*
+*                               where
+*                                   (A) RCV.BUFF        Total receive buffer space
+*                                   (B) RCV.USER        Data  received but not yet consumed
+*                                   (C) RCV.WND         Space advertised to sender
+*                                   (D) Fr              Fraction whose recommended value is 1/2
+*                                   (E) Eff.snd.MSS     Effective send MSS for the connection
+*
+*
+*                   See also 'net_tcp.c  NetTCP_RxConnWinSizeCfgUpdateTh()  Note #1'.
+*                          & 'net_tcp.c  NetTCP_RxConnWinSizeHandler()      Note #3'.
+*
+*               (b) RFC #1122, Section 4.2.3.4 states that "the sender's SWS avoidance algorithm is ...
+*                   [to] send data" :
+*
+*                   (3) "If at least a fraction Fs of the maximum window can be sent ... Fs is a fraction
+*                        whose recommended value is 1/2."
+*
+*                   (4) "If data is PUSHed and the override timeout occurs ... The override timeout should
+*                        be in the range 0.1 - 1.0 seconds."
+*
+*                   See also 'net_tcp.c  NetTCP_TxConnTxQ()  Note #7b2'.
+*
+*           (6) The following sections state that "a TCP SHOULD implement a delayed ACK" :
+*
+*                       (A) RFC # 813, Section 5
+*                       (B) RFC #1122, Section 4.2.3.2
+*                       (C) RFC #2581, Section 4.2
+*
+*               (a) (1) (A) RFC #1122, Section 4.2.3.2 states that "in a stream of full-sized segments there
+*                           SHOULD be an ACK for at least every second segment".
+*
+*                       (B) RFC #2581, Section 4.2 reiterates that "an ACK SHOULD be generated for at least
+*                           every second full-sized segment".
+*
+*                   (2) However, RFC #2581, Section 4.2 states that "an implementation is deemed to comply
+*                       with this requirement ... by acknowledging at least every second segment, regardless
+*                       of size".
+*
+*               (b) (1) (A) RFC #1122, Section 4.2.3.2 states that "an ACK should not be excessively delayed;
+*                           in particular, the delay MUST be less than 0.5 seconds".
+*
+*                       (B) RFC #2581, Section 4.2 reiterates that "an ACK ... MUST be generated within 500 ms
+*                           of the arrival of the first unacknowledged packet".
+*
+*                   (2) However, Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 19.3, Page 265
+*                       states that "most implementations use a 200-ms delay".
+*
+*               See also 'net_tcp.c  NetTCP_TxConnAck()  Note #6'.
+*
+*           (7) RFC #1122, Section 4.2.3.5 states that "excessive retransmission of the same segment by TCP
+*               indicates some failure of the remote host or the Internet path".
+*
+*               (a) "The following procedure MUST be used to handle excessive retransmissions of data segments" :
+*
+*                   (a) "There are ... thresholds ... measuring the amount of retransmission that has occurred
+*                        for the same segment ... measured in time units or as a count of retransmissions."
+*
+*                   (c) "When the number of transmissions of the same segment reaches a threshold ... close the
+*                        connection."
+*
+*                   (d) "An application MUST be able to set the [threshold] value ... for a particular connection.
+*                        For example, an interactive application might set [the threshold value] to 'infinity'."
+*
+*                   See also 'net_tcp.c  NetTCP_TxConnReTxQ()  Note #3'.
+*
+*               (b) (1) (A) "The value of ... [the threshold] SHOULD correspond to at least 100 seconds."
+*
+*                       (B) Therefore, the minimum threshold value is calculated as follows :
+*
+*                           (1)    [                                                                ]
+*                                  [ Exponential * (Exponential ^ i)  ,  when < Maximum Exponential ]
+*                                  [   Scalar          Base                        Timeout Value    ]         Minimum
+*                    Summation     [                                                                ]  >=  Retransmission
+*                 i = 0 --> i = N  [ Maximum Exponential                                            ]        Threshold
+*                                  [    Timeout Value                 ,  otherwise                  ]
+*                                  [                                                                ]
+*
+*                                  [                                    ]
+*                                  [  3 * (2 ^ i)  ,  when < 64 seconds ]
+*                    Summation     [                                    ]  >=  100 seconds
+*                 i = 0 --> i = N  [ 64 seconds    ,  otherwise         ]
+*                                  [                                    ]
+*
+*                                                                       N  >=  4.11
+*
+*                           (2)                                         N   =  5
+*
+*                                   where
+*                                           N                           Minimum Excessive Retransmission Threshold
+*                                                                           (in number of retransmissions)
+*                                           Exponential Scalar          Exponential Scalar = 3 (see 'TCP ROUND-TRIP
+*                                                                           TIME (RTT) / RE-TRANSMIT TIMEOUT (RTO)
+*                                                                           DEFINES  Note #3a1A1b')
+*                                           Exponential Base            Exponential Base   = 2 (see 'TCP ROUND-TRIP
+*                                                                           TIME (RTT) / RE-TRANSMIT TIMEOUT (RTO)
+*                                                                           DEFINES  Note #3b2')
+*                                           Minimum Retransmission      Minimum Excessive Retransmission Threshold
+*                                                 Threshold                 (in seconds; see Note #7b1A)
+*
+*                   (2) (A) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2, Page 299
+*                           states that "on most implementations this total timeout value is not tunable
+*                           ... and its default is ... the more common 9 minutes".
+*
+*                       (B) Therefore, the default threshold value is calculated as follows :
+*
+*                           (1)    [                                                                ]
+*                                  [ Exponential * (Exponential ^ i)  ,  when < Maximum Exponential ]
+*                                  [   Scalar          Base                        Timeout Value    ]          Common
+*                    Summation     [                                                                ]  >=  Retransmission
+*                 i = 0 --> i = M  [ Maximum Exponential                                            ]        Threshold
+*                                  [    Timeout Value                 ,  otherwise                  ]
+*                                  [                                                                ]
+*
+*                                  [                                    ]
+*                                  [  3 * (2 ^ i)  ,  when < 64 seconds ]
+*                    Summation     [                                    ]  >=  9 minutes
+*                 i = 0 --> i = M  [ 64 seconds    ,  otherwise         ]
+*                                  [                                    ]
+*
+*                                                                       M  >=  10.98
+*
+*                           (2)                                         M   =  11
+*
+*                                   where
+*                                           M                           Default Excessive Retransmission Threshold
+*                                                                           (in number of retransmissions)
+*                                           Exponential Scalar          Exponential Scalar = 3 (see 'TCP ROUND-TRIP
+*                                                                           TIME (RTT) / RE-TRANSMIT TIMEOUT (RTO)
+*                                                                           DEFINES  Note #3a1A1b')
+*                                           Exponential Base            Exponential Base   = 2 (see 'TCP ROUND-TRIP
+*                                                                           TIME (RTT) / RE-TRANSMIT TIMEOUT (RTO)
+*                                                                           DEFINES  Note #3b2')
+*                                           Maximum Exponential         Maximum Exponential Timeout Value (see
+*                                              Timeout Value                'TCP ROUND-TRIP TIME (RTT) / RE-TRANSMIT
+*                                                                           TIMEOUT (RTO) DEFINES  Note #3b1B')
+*                                           Common Retransmission       Common Default Retransmission Threshold
+*                                                Threshold                  (in minutes; see Note #7b2A)
+*********************************************************************************************************
+*/
+
+                                                                                /* See Note #2b3.                       */
+#define  NET_TCP_SST_UNACKD_DATA_NUMER                     1
+#define  NET_TCP_SST_UNACKD_DATA_DENOM                     2
+
+#define  NET_TCP_SST_MSS_SCALAR                            2
+
+
+
+#define  NET_TCP_CONG_WIN_MSS_SCALAR_INIT                  2                    /* See Note  #3a.                       */
+#define  NET_TCP_CONG_WIN_MSS_SCALAR_INC                   1                    /* See Notes #3b & #4c.                 */
+#define  NET_TCP_CONG_WIN_MSS_SCALAR_TIMEOUT               1                    /* See Note  #3c.                       */
+
+
+
+#define  NET_TCP_FAST_RE_TX_ACK_DUP_TH                     3                    /* See Note #4a.                        */
+                                                                                /* See Note #4b2.                       */
+#define  NET_TCP_FAST_RECOVERY_MSS_SCALAR                NET_TCP_FAST_RE_TX_ACK_DUP_TH
+
+
+                                                                                /* See Note #5a1D.                      */
+#define  NET_TCP_RX_SILLY_WIN_NUMER                        1
+#define  NET_TCP_RX_SILLY_WIN_DENOM                        2
+
+                                                                                /* See Note #5b3.                       */
+#define  NET_TCP_TX_SILLY_WIN_NUMER                        1
+#define  NET_TCP_TX_SILLY_WIN_DENOM                        2
+                                                                                /* See Note #5b4.                       */
+#define  NET_TCP_TX_SILLY_WIN_TIMEOUT_MIN_MS             100
+#define  NET_TCP_TX_SILLY_WIN_TIMEOUT_MAX_MS            1000
+#define  NET_TCP_TX_SILLY_WIN_TIMEOUT_DFLT_MS            NET_TCP_TX_SILLY_WIN_TIMEOUT_MAX_MS
+
+
+
+#define  NET_TCP_ACK_DLY_CNT_TH                            2                    /* See Note #6a.                        */
+
+#define  NET_TCP_ACK_DLY_TIME_MIN_MS                       0
+#define  NET_TCP_ACK_DLY_TIME_MAX_MS                     500                    /* See Note #6b1.                       */
+#define  NET_TCP_ACK_DLY_TIME_DFLT_MS                    200                    /* See Note #6b2.                       */
+
+
+#define  NET_TCP_RE_TX_TH_MIN                              5                    /* See Note #7b1B2.                     */
+#define  NET_TCP_RE_TX_TH_MAX      (DEF_INT_16U_MAX_VAL -  1)                   /* See Note #7ad.                       */
+#define  NET_TCP_RE_TX_TH_DFLT                            12                    /* See Note #7b2B2. Dflt val set to ... */
+                                                                                /* .. M + 1 for validation purposes.    */
+
+
+/*
+*********************************************************************************************************
+*                    TCP ROUND-TRIP TIME (RTT) / RE-TRANSMIT TIMEOUT (RTO) DEFINES
+*
+* Note(s) : (1) See the following RFC's for TCP Round-Trip Times (RTT) & Re-transmit Timeout (RTO) summary :
+*
+*               (a) RFC #2988                               TCP Round-Trip Time Calculations (RTT) /
+*               (b) RFC #1122                               TCP Retransmission Timeout       (RTO)
+*                   (1) Section 4.2.2.15
+*                   (2) Section 4.2.3.1
+*               (c) RFC # 793, Section 3.7 'Retransmission Timeout'
+*               (d) Jacobson/Karels, "Congestion Avoidance and Control"
+*               (e) Karn/Partridge,  "Improving Round-Trip Time Estimates in Reliable Transport Protocols"
+*
+*
+*           (2) (a) RFC #793, Section 3.7 'Data Communication : Retransmission Timeout' states that
+*                   "because of the variability of the networks that compose an internetwork system
+*                   and the wide range of uses of TCP connections the retransmission timeout must be
+*                   dynamically determined.  One procedure for determining a retransmission time out
+*                   is given here as an illustration".
+*
+*               (b) However, RFC #1122, Section 4.2.2.15 states that "the algorithm suggested in
+*                   RFC-793 for calculating the retransmission timeout is now known to be inadequate"
+*                   & Section 4.2.3.1 states that "a host TCP MUST implement Karn's algorithm and
+*                   Jacobson's algorithm for computing the retransmission timeout".
+*
+*               (c) Further, RFC #2988, Section 1 states that "this document codifies the algorithm
+*                   for setting the RTO ... expands on the discussion in section 4.2.3.1 of RFC 1122
+*                    ... [but] does not alter the ... retransmission ... behavior outlined in RFC 2581".
+*
+*           (3) (a) (1) (A) (1) RFC #1122, Section 4.2.3.1 states that "the following values SHOULD be
+*                               used to initialize the estimation parameters for a new connection" :
+*
+*                                   (a) RTT = 0 seconds
+*                                   (b) RTO = 3 seconds
+*
+*                                           where
+*                                                   RTO                 Retransmission Timeout
+*                                                   RTT                 Round-Trip Time
+*
+*                               (A) RFC #2988, Section 2.1 reiterates that "until a round-trip time (RTT)
+*                                   measurement has been made ... the sender SHOULD set RTO <- 3 seconds".
+*
+*                               (B) Furthermore, RFC #1122, Section 4.2.3.1.(b) states that "the smoothed
+*                                   variance is to be initialized to the value that will result in" these
+*                                   values.
+*
+*                                   Since computing the RTT retransmit timer      is given by the following
+*                                   equation (see RFC #2988, Section 2.3) :
+*
+*                                       (1) RTO     =  RTT_Avg + (RTT_RTO_Gain * RTT_Dev)
+*
+*                                   then the RTT deviation, or smoothed variance, is given by the following
+*                                   equation :
+*
+*                                       (2) RTT_Dev = (RTO - RTT_Avg) / RTT_RTO_Gain
+*
+*                                               where
+*                                                       RTT_Avg                 RTT Average
+*                                                       RTT_Dev                 RTT Deviation
+*                                                       RTT_RTO_Gain            RTT-RTO Gain
+*
+*
+*                           (2) However, since RFC #2988, Section 2.2 amends the RFC #1122, Section
+*                               4.2.3.1 RTT initialization; the smoothed RTT average & deviation do
+*                               NOT truly require explicit initialization.  Nonetheless, these RTT
+*                               values are initialized to conform with RFC #1122, Section 4.2.3.1.
+*
+*                           See also 'net_tcp.c  NetTCP_TxConnRTT_Init()  Note #1'
+*                                  & 'net_tcp.c  NetTCP_TxConnRTO_Init()  Note #2'.
+*
+*                       (B) RFC #2988, Section 2 states that "the rules governing the computation of SRTT
+*                           (smoothed round-trip time), RTTVAR RTTVAR (round-trip time variation), and RTO
+*                           are as follows" :
+*
+*                           (a) RFC #2988, Section 2.2 states that for "the first RTT measurement R ...
+*                               the host MUST set" :
+*
+*                                   (1) SRTT    <-  R
+*                                   (2) RTTVAR  <-  R/2
+*                                   (3) RTO     <-  SRTT  +  max(G, K * RTTVAR)
+*
+*                                            where
+*                                                   SRTT                    RTT Smoothed Average
+*                                                   RTTVAR                  RTT Variance/Deviation
+*                                                   RTO                         Retransmission Timeout
+*                                                   R                       RTT First Measurement
+*                                   (4)             R   = R * 1             RTT First Average   Gain
+*                                   (5)             R/2 = R * 1/2           RTT First Deviation Gain
+*                                                   G                       RTT Clock Granularity (resolution)
+*                                   (6)             K = 4                   RTT-RTO Gain
+*
+*
+*                           (b) RFC #2988, Section 2.3 states that for "subsequent RTT measurement R' ...
+*                               a host MUST set" :
+*
+*                                   (1) RTTVAR  <-  (1 - beta ) * RTTVAR  +  beta  * |SRTT - R'|
+*                                   (2) SRTT    <-  (1 - alpha) * SRTT    +  alpha * R'
+*                                   (3) RTO     <-  SRTT  +  max(G, K * RTTVAR)
+*
+*                                            where
+*                                                   SRTT                    RTT Smoothed Average
+*                                                   RTTVAR                  RTT Variance/Deviation
+*                                                   RTO                         Retransmission Timeout
+*                                                   R'                      RTT Subsequent Measurement(s)
+*                                   (4)             alpha = 1/8             RTT-Average   Gain
+*                                   (5)             beta  = 1/4             RTT-Deviation Gain
+*                                                   G                       RTT Clock Granularity (resolution)
+*                                   (6)             K = 4                   RTT-RTO Gain
+*
+*
+*                           See also 'net_tcp.c  NetTCP_TxConnRTT_RTO_Calc()  Note #2a1'.
+*
+*                   (2) (A) Jacobson/Karels, "Congestion Avoidance and Control", Appendix A.2 states that RTT
+*                           calculations "should be done in integer arithmetic".  RFC #2988, Section 2.3 adds
+*                           that RTT calculations "SHOULD be computed using ... 1/8 and ... 1/4" gains (see
+*                           Notes #3a1Bb4 & #3a1Bb5).
+*
+*                       (B) (a) Therefore, the RTT integer calculations SHOULD be scaled by 8, the least
+*                               common denominator for the RTT fractional gains.
+*
+*                           (b) However, ONLY the RTT measurements, average, & deviation are scaled.  RTT
+*                               gains MUST NOT be scaled since scaling the multiplicative gains incorrectly
+*                               exponentiates the RTT calculations :
+*
+*                                   (1) (RTT_Gain * RTT)  =  (RTT_Gain * RTT) * (RTT_Scale / RTT_Scale)
+*
+*                                   (2)                   =  (RTT_Gain * RTT  * RTT_Scale) / RTT_Scale
+*
+*                                   (3)                   =  [RTT_Gain * (RTT * RTT_Scale)] / RTT_Scale
+*
+*                                   (4)                  !=  [(RTT_Gain * RTT_Scale) * (RTT * RTT_Scale)] / RTT_Scale
+*
+*
+*                       See also 'net_tcp.c  NetTCP_TxConnRTT_RTO_Calc()  Note #2a3'.
+*
+*               (b) (1) (A) (1) (a) (1) RFC #1122, Section 4.2.3.1 states that "the recommended ... RTO ...
+*                                       lower bound ... SHOULD be measured in fractions of a second".
+*
+*                                   (2) RFC #2988, Section 2.4 amends that "whenever RTO is computed, if it
+*                                       is less than 1 second then the RTO SHOULD be rounded up to 1 second".
+*
+*                               (b) However, most modern TCP/IP implementations limit RTO's lower bound
+*                                   to a range of 30-200 milliseconds.
+*
+*                           (2) RFC #2988, Section 4 states that "there is no requirement for the clock
+*                               granularity G used for computing RTT measurements ... However, if the
+*                               K*RTTVAR term in the RTO calculation equals zero, the variance term MUST
+*                               be rounded to G seconds".
+*
+*                               See also Notes #3a1Ba3 & #3a1Bb3.
+*
+*                           See also 'net_tcp.c  NetTCP_TxConnRTT_RTO_Calc()  Note #2b1A'.
+*
+*                       (B) (1) RFC #2988, Section 2.4 adds that "a maximum value MAY be placed on RTO
+*                               provided it is at least 60 seconds".
+*
+*                           (2) RFC #1122, Section 4.2.3.1 states that "the recommended ... RTO ... upper
+*                               bound should be 2*MSL".
+*
+*                           (3) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2, Page 299
+*                               states that "the timeout value is doubled for each retransmission, with an
+*                               upper limit of 64 seconds".
+*
+*                           See also 'net_tcp.c  NetTCP_TxConnRTO_CfgMaxTimeout()  Note #1',
+*                                    'net_tcp.c  NetTCP_TxConnRTO_CalcBackOff()    Note #1b',
+*                                  & 'net_tcp.c  NetTCP_TxConnRTT_RTO_Calc()       Note #2b1B'.
+*
+*                   (2) RFC #1122, Section 4.2.3.1 states that an "implementation MUST also include
+*                       'exponential backoff' for successive RTO values for the same segment".
+*
+*                       (A) (1) RFC #2988, Section 5.5 states that "when the retransmission timer expires
+*                               ... the host MUST set RTO <- RTO * 2 ('back off the timer')".
+*
+*                           (2) Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 21.2, Page 299
+*                               reiterates that "this doubling is called an 'exponential backoff'".
+*
+*                       (B) Thus the TCP retransmission timer exponential back-off scalar value is 2.
+*
+*                       See also 'net_tcp.c  NetTCP_TxConnRTO_CalcBackOff()  Note #1a'.
+*********************************************************************************************************
+*/
+
+#define  NET_TCP_TX_RTT_AVG_INIT_SEC                       0    /* RTT avg init = 0 sec     (see Note #3a1A1a).         */
+#define  NET_TCP_TX_RTT_RTO_INIT_SEC                       3    /* RTT RTO init = 3 sec     (see Note #3a1A1b).         */
+
+
+                                                                /* RTT avg init gain = 1    (see Note #3a1Ba4).         */
+#define  NET_TCP_TX_RTT_GAIN_AVG_INIT                      1
+#define  NET_TCP_TX_RTT_GAIN_AVG_INIT_NUMER                1
+#define  NET_TCP_TX_RTT_GAIN_AVG_INIT_DENOM                1
+                                                                /* RTT dev init gain = 1/2  (see Note #3a1Ba5).         */
+#define  NET_TCP_TX_RTT_GAIN_DEV_INIT_NUMER                1
+#define  NET_TCP_TX_RTT_GAIN_DEV_INIT_DENOM                2
+
+                                                                /* RTT avg      gain = 1/8  (see Note #3a1Bb4).         */
+#define  NET_TCP_TX_RTT_GAIN_AVG_NUMER                     1
+#define  NET_TCP_TX_RTT_GAIN_AVG_DENOM                     8
+                                                                /* RTT dev      gain = 1/4  (see Note #3a1Bb5).         */
+#define  NET_TCP_TX_RTT_GAIN_DEV_NUMER                     1
+#define  NET_TCP_TX_RTT_GAIN_DEV_DENOM                     4
+                                                                /* RTT dev RTO  gain = 4    (see Note #3a1Bb6).         */
+#define  NET_TCP_TX_RTT_GAIN_RTO                           4
+#define  NET_TCP_TX_RTT_GAIN_RTO_NUMER                     4
+#define  NET_TCP_TX_RTT_GAIN_RTO_DENOM                     1
+
+
+
+#define  NET_TCP_TX_RTT_SCALE                              8    /* RTT vals int-scaled-by-8 (see Note #3a2Ba).          */
+#define  NET_TCP_TX_RTT_MS_SCALE                       ((NET_TCP_TX_RTT_MS_SCALED)DEF_TIME_NBR_mS_PER_SEC * NET_TCP_TX_RTT_SCALE)
+
+#define  NET_TCP_TX_RTT_AVG_INIT_SEC_SCALED             (NET_TCP_TX_RTT_AVG_INIT_SEC * NET_TCP_TX_RTT_SCALE)
+#define  NET_TCP_TX_RTT_RTO_INIT_SEC_SCALED             (NET_TCP_TX_RTT_RTO_INIT_SEC * NET_TCP_TX_RTT_SCALE)
+
+                                                                /* RTT dev init scaled      (see Note #3a1A1B2).        */
+#define  NET_TCP_TX_RTT_DEV_INIT_SEC_SCALED           (((NET_TCP_TX_RTT_RTO_INIT_SEC - NET_TCP_TX_RTT_AVG_INIT_SEC) * NET_TCP_TX_RTT_SCALE) \
+                                                                                                                    / NET_TCP_TX_RTT_GAIN_RTO)
+
+
+#define  NET_TCP_TX_RTT_AVG_INIT_MS_SCALED              (NET_TCP_TX_RTT_AVG_INIT_SEC_SCALED * (NET_TCP_TX_RTT_MS_SCALED)DEF_TIME_NBR_mS_PER_SEC)
+#define  NET_TCP_TX_RTT_DEV_INIT_MS_SCALED              (NET_TCP_TX_RTT_DEV_INIT_SEC_SCALED * (NET_TCP_TX_RTT_MS_SCALED)DEF_TIME_NBR_mS_PER_SEC)
+#define  NET_TCP_TX_RTT_RTO_INIT_MS_SCALED              (NET_TCP_TX_RTT_RTO_INIT_SEC_SCALED * (NET_TCP_TX_RTT_MS_SCALED)DEF_TIME_NBR_mS_PER_SEC)
+
+
+
+#define  NET_TCP_TX_RTT_NONE                               0
+#define  NET_TCP_TX_RTT_TS_NONE                            0
+
+                                                                /* RTT clk resolution (see Note #3b1A2).                */
+#if     (NET_TMR_TASK_PERIOD_mS > 0)
+#define  NET_TCP_TX_RTT_TS_CLK_MS                        NET_TMR_TASK_PERIOD_mS
+#else
+#define  NET_TCP_TX_RTT_TS_CLK_MS                        NET_TMR_TIME_TICK
+#endif
+#define  NET_TCP_TX_RTT_TS_CLK_MS_SCALED               ((NET_TCP_TX_RTT_TS_MS_SCALED)NET_TCP_TX_RTT_TS_CLK_MS * NET_TCP_TX_RTT_SCALE)
+
+
+
+#define  NET_TCP_TX_RTO_NONE                               0
+
+#define  NET_TCP_TX_RTO_MIN_TIMEOUT_MS                   100    /* RTO min timeout      = 100 ms   (see Note #3b1A1).   */
+#define  NET_TCP_TX_RTO_MIN_TIMEOUT_MS_SCALED           (NET_TCP_TX_RTO_MIN_TIMEOUT_MS  * NET_TCP_TX_RTT_SCALE)
+
+
+#define  NET_TCP_TX_RTO_MAX_TIMEOUT_MIN_SEC               60    /* RTO max timeout min  =  60 sec  (see Note #3b1B1).   */
+                                                                /* RTO max timeout max  =   2 MSL  (see Note #3b1B2).   */
+#define  NET_TCP_TX_RTO_MAX_TIMEOUT_MAX_SEC              NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC
+#define  NET_TCP_TX_RTO_MAX_TIMEOUT_DFLT_SEC              64    /* RTO max timeout dflt =  64 sec  (see Note #3b1B3).   */
+
+
+#define  NET_TCP_TX_RTO_TIMEOUT_BACKOFF_SCALAR             2    /* RTO exponential back-off scalar (see Note #3b2B).    */
+
+
+
+#define  NET_TCP_TX_RTT_RTO_STATE_NONE                     0u
+#define  NET_TCP_TX_RTT_RTO_STATE_INIT                    10u
+#define  NET_TCP_TX_RTT_RTO_STATE_RESET                   11u
+#define  NET_TCP_TX_RTT_RTO_STATE_CALC                    20u
+#define  NET_TCP_TX_RTT_RTO_STATE_RE_TX                   30u
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      TCP PORT NUMBER DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_PORT_NBR  NET_TCP_PORT_NBR;                        /* Defines TCP port nbr size.                           */
+
+
+/*
+*********************************************************************************************************
+*                                    TCP SEQUENCE NUMBER DATA TYPE
+*
+* Note(s) : (1) 'NET_TCP_SEQ_NBR'  pre-defined in 'net_type.h' PRIOR to all other network modules that
+*                require TCP sequence number data type(s).
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+typedef  CPU_INT32U  NET_TCP_SEQ_NBR;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     TCP SEGMENT SIZE DATA TYPE
+*
+* Note(s) : (1) 'NET_TCP_SEG_SIZE' pre-defined in 'net_type.h' PRIOR to all other network modules that
+*                require TCP segment size data type(s).
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+typedef  CPU_INT16U  NET_TCP_SEG_SIZE;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      TCP WINDOW SIZE DATA TYPE
+*
+* Note(s) : (1) 'NET_TCP_WIN_SIZE' pre-defined in 'net_type.h' PRIOR to all other network modules that
+*                require TCP window size data type(s).
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+typedef  CPU_INT16U  NET_TCP_WIN_SIZE;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   TCP CONNECTION STATE DATA TYPE
+*
+* Note(s) : (1) See the following RFC's for TCP state machine summary :
+*
+*               (a) RFC # 793; Sections 3.2, 3.4, 3.5, 3.9
+*               (b) RFC #1122; Sections 4.2.2.8, 4.2.2.10, 4.2.2.11, 4.2.2.13, 4.2.2.18, 4.2.2.20
+*
+*           (2) (a) Additional closing-data-available state used for closing connections to allow the
+*                   application layer to receive any remaining data.
+*
+*                   See also 'net_tcp.c  NetTCP_RxPktConnHandlerFinWait1()  Note #2f5A2',
+*                            'net_tcp.c  NetTCP_RxPktConnHandlerFinWait2()  Note #2f5B',
+*                            'net_tcp.c  NetTCP_RxPktConnHandlerClosing()   Note #2d2B2a1B',
+*                          & 'net_tcp.c  NetTCP_RxPktConnHandlerLastAck()   Note #2d2A1b'.
+*********************************************************************************************************
+*/
+
+typedef  enum  net_tcp_state {
+    NET_TCP_CONN_STATE_NONE               = 1u,
+    NET_TCP_CONN_STATE_FREE               = 2u,
+
+    NET_TCP_CONN_STATE_CLOSED             = 10u,
+
+    NET_TCP_CONN_STATE_LISTEN             = 20u,
+
+    NET_TCP_CONN_STATE_SYNC_RXD           = 30u,
+    NET_TCP_CONN_STATE_SYNC_RXD_PASSIVE   = 31u,
+    NET_TCP_CONN_STATE_SYNC_RXD_ACTIVE    = 32u,
+
+    NET_TCP_CONN_STATE_SYNC_TXD           = 35u,
+
+    NET_TCP_CONN_STATE_CONN               = 40u,
+
+    NET_TCP_CONN_STATE_FIN_WAIT_1         = 50u,
+    NET_TCP_CONN_STATE_FIN_WAIT_2         = 51u,
+    NET_TCP_CONN_STATE_CLOSING            = 52u,
+    NET_TCP_CONN_STATE_TIME_WAIT          = 53u,
+
+    NET_TCP_CONN_STATE_CLOSE_WAIT         = 55u,
+    NET_TCP_CONN_STATE_LAST_ACK           = 56u,
+
+    NET_TCP_CONN_STATE_CLOSING_DATA_AVAIL = 59u
+} NET_TCP_CONN_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                  TCP RECEIVE QUEUE STATE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_TCP_RX_Q_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                 TCP TRANSMIT QUEUE STATE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_TCP_TX_Q_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                   TCP RTT MEASUREMENT DATA TYPES
+*
+* Note(s) : (1) RTT measurement data types MUST be defined to ensure sufficient range for both scaled
+*               & un-scaled, signed & unsigned time measurement values.
+*
+*           (2) 'NET_TCP_TX_RTT_TS_MS' pre-defined in 'net_type.h' PRIOR to all other network modules
+*                that require TCP Transmit Round-Trip Time data type(s).
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_TCP_TX_RTT_STATE;
+
+                                                                /* See Note #1.                                         */
+typedef  NET_TS_MS   NET_TCP_TX_RTT_MS;
+typedef  CPU_INT32S  NET_TCP_TX_RTT_MS_SCALED;
+
+#if 0                                                           /* See Note #2.                                         */
+typedef  NET_TS_MS   NET_TCP_TX_RTT_TS_MS;
+#endif
+typedef  CPU_INT32S  NET_TCP_TX_RTT_TS_MS_SCALED;
+
+
+/*
+*********************************************************************************************************
+*                                       TCP TIMEOUT DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  NET_TCP_TIMEOUT_MS;
+typedef  CPU_INT16U  NET_TCP_TIMEOUT_SEC;
+
+
+/*
+*********************************************************************************************************
+*                                  TCP CONNECTION QUANTITY DATA TYPE
+*
+* Note(s) : (1) See also 'TCP CONNECTION IDENTIFICATION DATA TYPE  Note #1'.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16S  NET_TCP_CONN_QTY;                          /* Defines max qty of TCP conns to support.             */
+
+
+/*
+*********************************************************************************************************
+*                               TCP CONNECTION IDENTIFICATION DATA TYPE
+*
+* Note(s) : (1) (a) NET_TCP_CONN_NBR_MAX  SHOULD be #define'd based on 'NET_TCP_CONN_QTY' data type declared.
+*
+*               (b) However, since TCP connection handle identifiers are data-typed as 16-bit signed integers;
+*                   the maximum number of valid TCP connection identifiers, & therefore the maximum number
+*                   of valid TCP connections, is the total number of non-negative values that 16-bit signed
+*                   integers support.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16S  NET_TCP_CONN_ID;
+
+#define  NET_TCP_CONN_NBR_MIN                              1
+#define  NET_TCP_CONN_NBR_MAX            DEF_INT_16S_MAX_VAL    /* See Note #1.                                         */
+
+#define  NET_TCP_CONN_ID_NONE                             -1
+#define  NET_TCP_CONN_ID_MIN                               0
+#define  NET_TCP_CONN_ID_MAX       (NET_TCP_NBR_CONN - 1)
+
+
+/*
+*********************************************************************************************************
+*                                        TCP FLAGS DATA TYPES
+*
+* Note(s) : (1) 'NET_TCP_FLAGS'/'NET_TCP_HDR_FLAGS' pre-defined in 'net_type.h' PRIOR to all other network
+*                modules that require TCP flags data types.
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+typedef  NET_FLAGS   NET_TCP_FLAGS;
+typedef  CPU_INT16U  NET_TCP_HDR_FLAGS;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             TCP HEADER
+*
+* Note(s) : (1) See RFC #793, Section 3.1 for TCP segment header format.
+*
+*           (2) TCP Header Length & Flags are encoded in the thirteenth & fourteenth octets of a TCP header
+*               as follows :
+*
+*                        15 14 13 12 11 10 9 8 7 6  5   4   3   2   1   0
+*                       ---------------------------------------------------
+*                       |  H L E N  |   Z E R O   |URG|ACK|PSH|RST|SYN|FIN|
+*                       ---------------------------------------------------
+*
+*                   where
+*                           HLEN        TCP Headers' length in 32-bit words; MUST be at least 5 (20-octet header)
+*                                           & MUST be less than or equal to 15 (60-octet header)
+*                           ZERO        MUST be zero; i.e. '000000'
+*                           URG         Segment Urgent Data Pointer Valid (see Note #3) :
+*                                           '0' - Urgent Data                NOT available (default)
+*                                           '1' - Urgent Data                    available
+*                           ACK         Segment Acknowledgement Number Valid :
+*                                           '0' - Acknowledgement Number     NOT available
+*                                           '1' - Acknowledgement Number         available
+*                           PSH         Segment Push Data Request :
+*                                           '0' - Push Data                  NOT requested (default)
+*                                           '1' - Push Data                      requested
+*                           RST         Connection Reset Request :
+*                                           '0' - Connection Reset           NOT requested (default)
+*                                           '1' - Connection Reset               requested
+*                           SYN         Connection Synchronization Request :
+*                                           '0' - Connection Synchronization NOT requested (default)
+*                                           '1' - Connection Synchronization     requested
+*                           FIN         Connection Close Request :
+*                                           '0' - Connection Close           NOT requested (default)
+*                                           '1' - Connection Close               requested
+*
+*           (3) Urgent pointer & data NOT supported (see 'net_tcp.h  Note #1b').
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET TCP HDR -------------------- */
+typedef  struct  net_tcp_hdr {
+    NET_TCP_PORT_NBR        PortSrc;                            /* TCP seg  src  port.                                  */
+    NET_TCP_PORT_NBR        PortDest;                           /* TCP seg  dest port.                                  */
+    NET_TCP_SEQ_NBR         SeqNbr;                             /* TCP seg  seq  nbr.                                   */
+    NET_TCP_SEQ_NBR         AckNbr;                             /* TCP seg  ack  nbr.                                   */
+    NET_TCP_HDR_FLAGS       HdrLen_Flags;                       /* TCP seg  hdr  len/flags (see Note #2).               */
+    NET_TCP_WIN_SIZE        WinSize;                            /* TCP conn win size.                                   */
+    NET_CHK_SUM             ChkSum;                             /* TCP seg  chk sum.                                    */
+    CPU_INT16U              UrgentPtr;                          /* TCP seg  urgent ptr     (see Note #3).               */
+    NET_TCP_OPT_SIZE        Opts[NET_TCP_HDR_OPT_NBR_MAX];      /* TCP seg  opts (if any).                              */
+} NET_TCP_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                          TCP PSEUDO-HEADER
+*
+* Note(s) : (1) See RFC #793, Section 3.1 'Header Format : Checksum' for TCP pseudo-header format.
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- NET TCP PSEUDO-HDR ---------------- */
+typedef  struct  net_tcp_pseudo_hdr {
+    NET_IPv4_ADDR           AddrSrc;                            /* TCP seg src  addr.                                   */
+    NET_IPv4_ADDR           AddrDest;                           /* TCP seg dest addr.                                   */
+    CPU_INT08U              Zero;                               /* Field MUST be zero'd; i.e. ALL bits clr'd.           */
+    CPU_INT08U              Protocol;                           /* TCP protocol.                                        */
+    CPU_INT16U              TotLen;                             /* TCP seg tot len.                                     */
+} NET_TCP_PSEUDO_HDR;
+
+
+/*
+*********************************************************************************************************
+*                              TCP HEADER OPTION CONFIGURATION DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                       TCP MAXIMUM SEGMENT SIZE OPTION CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  net_tcp_opt_cfg_max_seg_size {
+    NET_TCP_OPT_TYPE        Type;
+    NET_TCP_SEG_SIZE        MaxSegSize;                         /* TCP max seg size.                                    */
+    void                   *NextOptPtr;                         /* Ptr to next TCP opt cfg.                             */
+} NET_TCP_OPT_CFG_MAX_SEG_SIZE;
+
+
+/*
+*********************************************************************************************************
+*                                   APP CALLBACK FUNCTION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_BOOLEAN  (*NET_TCP_APP_LISTEN_Q_IS_AVAIL_FNCT)(NET_CONN_ID   conn_id_app,
+                                                            NET_ERR      *p_err);
+
+typedef  void         (*NET_TCP_APP_POST_FNCT)             (NET_CONN_ID   conn_id_app);
+
+
+/*
+*********************************************************************************************************
+*                                      TCP CONNECTION DATA TYPE
+*
+*                                    NET_TCP_CONN
+*                                   |-------------|
+*                                   |  Conn Type  |
+*                                   |-------------|      Next TCP
+*                                   |      O----------> Connection
+*                                   |-------------|
+*                                   |     IDs     |
+*                                   |-------------|
+*                                   | Conn State  |
+*                                   |-------------|
+*                                   |   Rx Ctrl   |
+*                                   |   Rx Q's    |
+*                                   |-------------|
+*                                   |   Tx Ctrl   |
+*                                   |   Tx Q's    |
+*                                   |   Tx Tmrs   |
+*                                   |-------------|
+*                                   |   Timeouts  |
+*                                   |-------------|
+*                                   |    Flags    |
+*                                   |-------------|
+*
+*
+* Note(s) : (1) (a) Most TCP connection timeouts are pre-computed/converted to 'NET_TMR_TICK' ticks when
+*                   initialized &/or configured to avoid run-time conversion.
+*
+*               (b) Some TCP connection timeouts are dynamically calculated at run-time & CANNOT &/or are
+*                   NOT necessary to pre-compute/convert to 'NET_TMR_TICK' ticks.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET TCP CONN ------------------- */
+typedef  struct  net_tcp_conn  NET_TCP_CONN;
+
+struct  net_tcp_conn {
+    NET_TCP_CONN                        *NextPtr;                       /* Ptr to NEXT conn.                                    */
+
+
+    NET_TCP_CONN_ID                      ID;                            /* TCP conn id.                                         */
+    NET_CONN_ID                          ID_Conn;                       /*     Conn id.                                         */
+
+
+    NET_TCP_CONN_STATE                   ConnState;                     /* TCP conn state.                                      */
+
+    CPU_INT08U                           ConnCloseCode;                 /* Conn close code.                                     */
+    CPU_BOOLEAN                          ConnCloseAppFlag;              /* Conn close app           flag.                       */
+    CPU_BOOLEAN                          ConnCloseTimeoutFaultFlag;     /* Conn close timeout fault flag.                       */
+
+
+                                                                        /*       Max seg sizes (in octets) :                    */
+    NET_TCP_SEG_SIZE                     MaxSegSizeLocalCfgd;           /* Local max seg size cfg'd.                            */
+    NET_TCP_SEG_SIZE                     MaxSegSizeLocalActual;         /* Local max seg size actual/advertised to remote host. */
+    NET_TCP_SEG_SIZE                     MaxSegSizeRemote;              /*       Max seg size        advertised by remote host. */
+    NET_TCP_SEG_SIZE                     MaxSegSizeConn;                /*       Max seg size calc'd for conn.                  */
+
+
+
+    NET_TCP_SEQ_NBR                      RxSeqNbrSync;                  /* Sync  rx seq nbr.                                    */
+    NET_TCP_SEQ_NBR                      RxSeqNbrNext;                  /* Next  rx seq nbr.                                    */
+    NET_TCP_SEQ_NBR                      RxSeqNbrLast;                  /* Last  rx seq nbr.                                    */
+    NET_TCP_SEQ_NBR                      RxSeqNbrClose;                 /* Close rx seq nbr.                                    */
+                                                                        /* Rx win sizes (in octets) :                           */
+    NET_TCP_WIN_SIZE                     RxWinSizeCfgd;                 /* Rx win size cfg'd.                                   */
+    NET_TCP_WIN_SIZE                     RxWinSizeCalcd;                /* Rx win size calc'd.                                  */
+    NET_TCP_WIN_SIZE                     RxWinSizeActual;               /* Rx win size actual/advertised to remote host.        */
+
+    NET_TCP_WIN_SIZE                     RxWinSizeUpdateTh;             /* Rx win size update th (rx silly win ctrl).           */
+
+
+    NET_TCP_RX_Q_STATE                   RxQ_State;                     /*                   Rx Q state.                        */
+
+    KAL_SEM_HANDLE                       RxQ_SignalObj;
+    CPU_INT32U                           RxQ_SignalTimeout_ms;
+
+    NET_BUF                             *RxQ_Transport_Head;            /* Head of transport rx Q to q TCP pkts until seq'd.    */
+    NET_BUF                             *RxQ_Transport_Tail;            /* Tail of transport rx Q to q TCP pkts until seq'd.    */
+
+    NET_BUF                             *RxQ_App_Head;                  /* Head of app data  rx Q to q TCP pkts until app rd(s).*/
+    NET_BUF                             *RxQ_App_Tail;                  /* Tail of app data  rx Q to q TCP pkts until app rd(s).*/
+
+
+
+    NET_TCP_SEQ_NBR                      TxSeqNbrSync;                  /* Sync  tx seq nbr.                                    */
+    NET_TCP_SEQ_NBR                      TxSeqNbrNext;                  /* Next  tx seq nbr.                                    */
+    NET_TCP_SEQ_NBR                      TxSeqNbrNextQ;                 /* Next  tx seq nbr NOT yet tx'd; i.e. in tx Q.         */
+    NET_TCP_SEQ_NBR                      TxSeqNbrUnReTxd;               /* Last  tx seq nbr NOT re- tx'd.                       */
+    NET_TCP_SEQ_NBR                      TxSeqNbrUnAckd;                /* Last  tx seq nbr NOT yet ack'd.                      */
+    NET_TCP_SEQ_NBR                      TxSeqNbrUnAckdPrev;            /* Prev  tx seq nbr NOT yet ack'd.                      */
+    NET_TCP_SEQ_NBR                      TxSeqNbrUnAckdAlignDelta;      /*       Tx seq nbr NOT yet ack'd alignment delta.      */
+    NET_TCP_SEQ_NBR                      TxSeqNbrLast;                  /* Last  tx seq nbr.                                    */
+    NET_TCP_SEQ_NBR                      TxSeqNbrClose;                 /* Close tx seq nbr.                                    */
+
+
+    NET_TCP_SEQ_NBR                      TxWinUpdateSeqNbr;             /* Last  rx seq nbr  that updated remote rx win size.   */
+    NET_TCP_SEQ_NBR                      TxWinUpdateAckNbr;             /* Last  rx ack nbr  that updated remote rx win size.   */
+    NET_TCP_WIN_SIZE                     TxWinUpdateWinSize;            /* Last  rx win size that updated remote rx win size.   */
+
+    NET_PKT_CTR                          TxWinRxdAckDupCtr;             /*       Rx'd duplicate ack ctr.                        */
+    NET_TCP_SEQ_NBR                      TxWinRxdLastSeqNbr;            /* Last  rx'd seq nbr.                                  */
+    NET_TCP_SEQ_NBR                      TxWinRxdLastAckNbr;            /* Last  rx'd ack nbr.                                  */
+    NET_TCP_WIN_SIZE                     TxWinRxdLastWinSize;           /* Last  rx'd win size.                                 */
+                                                                        /* Tx  win sizes (in octets) :                          */
+    NET_TCP_WIN_SIZE                     TxWinSizeCfgd;                 /* Tx  win size cfg'd.                                  */
+    NET_TCP_WIN_SIZE                     TxWinSizeCfgdRem;              /* Tx  win size rem'ing to q tx app data.               */
+
+    NET_TCP_WIN_SIZE                     TxWinSizeRemote;               /*     Win size advertised by  remote host.             */
+    NET_TCP_WIN_SIZE                     TxWinSizeRemoteMax;            /* Max win size advertised by  remote host.             */
+    NET_TCP_WIN_SIZE                     TxWinSizeRemoteActual;         /* Tx  win size actual     for remote host.             */
+    NET_TCP_WIN_SIZE                     TxWinSizeRemoteRem;            /* Tx  win size rem'ing    for remote host.             */
+
+    NET_TCP_WIN_SIZE                     TxWinSizeSlowStartTh;          /* Tx  win size slow start      th.                     */
+    NET_TCP_WIN_SIZE                     TxWinSizeSlowStartThInit;      /* Tx  win size slow start init th.                     */
+    NET_TCP_WIN_SIZE                     TxWinSizeCongInit;             /* Tx  win size        init'd by cong ctrl.             */
+    NET_TCP_WIN_SIZE                     TxWinSizeCongCalcdActual;      /* Tx  win size actual calc'd    cong ctrl.             */
+    NET_TCP_WIN_SIZE                     TxWinSizeCongCalcdCur;         /* Tx  win size cur    calc'd    cong ctrl.             */
+    NET_TCP_WIN_SIZE                     TxWinSizeCongRem;              /* Tx  win size rem'ing       by cong ctrl.             */
+
+    NET_TCP_WIN_SIZE                     TxWinSizeAvail;                /* Tx  win size avail.                                  */
+
+    NET_TCP_WIN_SIZE                     TxWinSizeMinTh;                /* Tx  win size min th (tx silly win ctrl).             */
+    CPU_BOOLEAN                          TxWinSizeNagleEn;              /* Tx  win size Nagle alg en.                           */
+
+    NET_TCP_TIMEOUT_MS                   TxWinSillyWinTimeout_ms;       /* Tx  silly win timeout (in ms   ).                    */
+    NET_TCP_TIMEOUT_MS                   TxWinZeroWinTimeout_ms;        /* Tx  zero  win timeout (in ms   ).                    */
+    NET_TMR_TICK                         TxWinSillyWinTimeout_tick;     /* Tx  silly win timeout (in ticks).                    */
+
+
+    NET_TCP_TIMEOUT_MS                   TxAckDlyTimeout_ms;            /* Tx  ack dly timeout (in ms   ).                      */
+    NET_TMR_TICK                         TxAckDlyTimeout_tick;          /* Tx  ack dly timeout (in ticks).                      */
+    NET_TMR                             *TxAckDlyTmr;                   /* Tx  ack dly tmr.                                     */
+    CPU_INT16U                           TxAckDlyCnt;                   /* Tx  ack dly cur cnt.                                 */
+
+    CPU_BOOLEAN                          TxAckImmedRxdPushEn;           /* Tx  immed ack for rx'd TCP push seg(s) en.           */
+
+
+    CPU_BOOLEAN                          TxKeepAliveEn;                 /* Tx  keep-alive alg en.                               */
+    NET_PKT_CTR                          TxKeepAliveCtr;                /* Nbr of keep-alives tx'd ctr.                         */
+    NET_PKT_CTR                          TxKeepAliveTh;                 /* Nbr of keep-alives tx'd th.                          */
+    NET_TCP_TIMEOUT_SEC                  TxKeepAliveRetryTimeout_sec;   /* Tx  keep-alive retry timeout (in secs).              */
+
+
+    NET_PKT_CTR                          TxSegReTxTh;                   /* Nbr of seg re-tx's th.                               */
+
+
+    NET_TCP_TX_RTT_MS_SCALED             TxRTT_Avg_ms_scaled;           /* RTT smoothed avg      (in int-scaled ms   ).         */
+    NET_TCP_TX_RTT_MS_SCALED             TxRTT_Dev_ms_scaled;           /* RTT mean     dev      (in int-scaled ms   ).         */
+    NET_TCP_TX_RTT_MS_SCALED             TxRTT_RTO_ms_scaled;           /* RTT re-tx timeout     (in int-scaled ms   ).         */
+    NET_TCP_TX_RTT_MS_SCALED             TxRTT_RTO_Max_ms_scaled;       /* RTT re-tx timeout max (in int-scaled ms   ).         */
+    NET_TCP_TIMEOUT_MS                   TxRTT_Avg_ms;                  /* RTT smoothed avg      (in            ms   ).         */
+    NET_TCP_TIMEOUT_MS                   TxRTT_Dev_ms;                  /* RTT mean     dev      (in            ms   ).         */
+    NET_TCP_TIMEOUT_MS                   TxRTT_RTO_ms;                  /* RTT re-tx timeout     (in            ms   ).         */
+    NET_TCP_TIMEOUT_MS                   TxRTT_RTO_Max_ms;              /* RTT re-tx timeout max (in            ms   ).         */
+    NET_TCP_TIMEOUT_SEC                  TxRTT_RTO_sec;                 /* RTT re-tx timeout     (in            secs ).         */
+    NET_TCP_TIMEOUT_SEC                  TxRTT_RTO_Max_sec;             /* RTT re-tx timeout max (in            secs ).         */
+    NET_TMR_TICK                         TxRTT_RTO_tick;                /* RTT re-tx timeout     (in            ticks).         */
+    NET_TCP_TX_RTT_STATE                 TxRTT_RTO_State;               /* RTT-RTO state.                                       */
+
+
+    NET_TCP_TX_Q_STATE                   TxQ_State;                     /*      Tx Q state.                                     */
+
+    KAL_SEM_HANDLE                       TxQ_SignalObj;
+    CPU_INT32U                           TxQ_SignalTimeout_ms;
+
+    NET_BUF                             *TxQ_Head;                      /* Head of Q of TCP pkts to    tx.                      */
+    NET_BUF                             *TxQ_Tail;                      /* Tail of Q of TCP pkts to    tx.                      */
+    NET_TMR                             *TxQ_IdleTmr;                   /*      Tx Q idle              tmr.                     */
+    NET_TMR                             *TxQ_SillyWinTmr;               /*      Tx Q silly win persist tmr.                     */
+    NET_TMR                             *TxQ_ZeroWinTmr;                /*      Tx Q zero  win persist tmr.                     */
+
+    NET_BUF                             *ReTxQ_Head;                    /* Head of Q of TCP pkts to re-tx on timeout.           */
+    NET_BUF                             *ReTxQ_Tail;                    /* Tail of Q of TCP pkts to re-tx on timeout.           */
+    NET_TMR                             *ReTxQ_Tmr;                     /*   Re-tx Q         tmr.                               */
+
+
+
+    NET_TMR                             *TimeoutTmr;                    /* TCP conn    timeout tmr.                             */
+
+    NET_TCP_TIMEOUT_SEC                  TimeoutConn_sec;               /* TCP conn    timeout (in        secs ).               */
+    NET_TCP_TIMEOUT_SEC                  TimeoutUser_sec;               /* TCP user    timeout (in        secs ).               */
+    NET_TCP_TIMEOUT_SEC                  TimeoutMaxSeg_sec;             /* TCP max seg timeout (in        secs ).               */
+    NET_TMR_TICK                         TimeoutConn_tick;              /* TCP conn    timeout (in        ticks).               */
+    NET_TMR_TICK                         TimeoutUser_tick;              /* TCP user    timeout (in        ticks).               */
+    NET_TMR_TICK                         TimeoutMaxSeg_tick_scaled;     /* TCP max seg timeout (in scaled ticks).               */
+
+
+    NET_TCP_FLAGS                        Flags;                         /* TCP conn flags.                                      */
+
+
+    NET_TCP_APP_LISTEN_Q_IS_AVAIL_FNCT   FnctAppListenQ_IsAvail;        /* Is connection should be accepted callback function.  */
+    NET_TCP_APP_POST_FNCT                FnctAppPostRx;                 /* Notify RX Data                   callback function.  */
+    NET_TCP_APP_POST_FNCT                FnctAppPostTx;                 /* Notify TX Q  is available        callback function.  */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+NET_TCP_EXT  NET_TCP_CONN      NetTCP_ConnTbl[NET_TCP_NBR_CONN];
+NET_TCP_EXT  NET_TCP_CONN     *NetTCP_ConnPoolPtr;              /* Ptr to pool of free TCP conns.                       */
+NET_TCP_EXT  NET_STAT_POOL     NetTCP_ConnPoolStat;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NET_TCP_TX_GET_SEQ_NBR()
+*
+* Description : Get next TCP transmit sequence number.
+*
+* Argument(s) : seq_nbr     Variable that will receive the returned TCP transmit sequence number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_TxConnSync().
+*
+*               This macro is an INTERNAL network protocol suite macro & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) (a) RFC #1122, Section 4.2.2.9 states that "a TCP MUST use the specified clock-driven
+*                       selection of initial sequence numbers".
+*
+*                   (b) However; Stevens, TCP/IP Illustrated, Volume 1, 8th Printing, Section 18.2, Page 232
+*                       states that for "4.4BSD (and most Berkeley-derived implementations)" ... :
+*
+*                       (1) "When the system is initialized the initial send sequence number is initialized
+*                            to 1.  This practice violates the Host Requirements RFC [#1122]."
+*
+*                       (2) "This variable is then incremented by 64,000" ... :
+*                           (A) "every half-second" and ...
+*                           (B) "additionally, each time a connection is established."
+*
+*                   (c) As a compromise :
+*
+*                       (1) The developer is required to configure the TCP transmit initial sequence number
+*                           counter (see 'net_util.c  NetUtil_InitSeqNbrGet()  Note #1').
+*
+*                       (2) However, the TCP initial transmit sequence number is incremented by a fixed
+*                           value each time a new TCP connection is established (see also Note #2b2B).
+*
+*               (2) Return TCP sequence number is NOT converted from host-order to network-order.
+*
+*               (3) Adding NET_DBG_CFG_TEST_TCP in net_cfg.h allow to remove the increment value to the
+*                   TCP sequence number, this can be use for debug purpose.
+*********************************************************************************************************
+*/
+
+#ifndef NET_DBG_CFG_TEST_TCP
+
+#define  NET_TCP_TX_GET_SEQ_NBR(seq_nbr)        do { NET_UTIL_VAL_COPY_32(&(seq_nbr), &NetTCP_TxSeqNbrCtr); \
+                                                     NetTCP_TxSeqNbrCtr += NET_TCP_TX_SEQ_NBR_CTR_INC;      } while (0)
+
+#else
+
+#define  NET_TCP_TX_GET_SEQ_NBR(seq_nbr)        do { NET_UTIL_VAL_COPY_32(&(seq_nbr), &NetTCP_TxSeqNbrCtr); } while (0)
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN         NetTCP_ConnCfgIdleTimeout            (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          NET_TCP_TIMEOUT_SEC                  timeout_sec,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgMaxSegSizeLocal        (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          NET_TCP_SEG_SIZE                     max_seg_size,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgRxWinSize              (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          NET_TCP_WIN_SIZE                     win_size,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgTxWinSize              (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          NET_TCP_WIN_SIZE                     win_size,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgTxNagleEn              (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          CPU_BOOLEAN                          nagle_en,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgTxAckImmedRxdPushEn    (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          CPU_BOOLEAN                          tx_immed_ack_en,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgTxAckDlyTimeout        (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          NET_TCP_TIMEOUT_MS                   timeout_ms,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgTxKeepAliveEn          (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          CPU_BOOLEAN                          keep_alive_en,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgTxKeepAliveTh          (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          NET_PKT_CTR                          nbr_max_keep_alive,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgReTxMaxTh              (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          NET_PKT_CTR                          nbr_max_re_tx,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgReTxMaxTimeout         (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          NET_TCP_TIMEOUT_SEC                  timeout_sec,
+                                                          NET_ERR                             *p_err);
+
+CPU_BOOLEAN         NetTCP_ConnCfgMSL_Timeout            (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                          NET_TCP_TIMEOUT_SEC                  msl_timeout_sec,
+                                                          NET_ERR                             *p_err);
+
+NET_STAT_POOL       NetTCP_ConnPoolStatGet               (void);
+
+void                NetTCP_ConnPoolStatResetMaxUsed      (void);
+
+NET_TCP_CONN_STATE  NetTCP_ConnStateGet                  (NET_TCP_CONN_ID                      conn_id);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void             NetTCP_Init                          (NET_ERR              *p_err);
+
+void             NetCP_RxQ_TimeoutSet                 (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       CPU_INT32U            timeout_ms,
+                                                       NET_ERR              *p_err);
+
+
+                                                                                    /* ----------- RX FNCTS ----------- */
+void             NetTCP_Rx                            (NET_BUF              *pbuf,
+                                                       NET_ERR              *p_err);
+
+CPU_INT16U       NetTCP_RxAppData                     (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       void                 *pdata_buf,
+                                                       CPU_INT16U            data_buf_len,
+                                                       NET_TCP_FLAGS         flags,
+                                                       NET_ERR              *p_err);
+
+
+
+                                                                                    /* ----------- TX FNCTS ----------- */
+void             NetTCP_TxConnReq                     (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+
+void             NetTCP_TxConnReqClose                (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       CPU_INT08U            conn_close_code,
+                                                       NET_ERR              *p_err);
+
+
+CPU_INT16U       NetTCP_TxConnAppData                 (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       void                 *p_data,
+                                                       CPU_INT16U            data_len,
+                                                       NET_TCP_FLAGS         flags,
+                                                       NET_ERR              *p_err);
+
+
+
+                                                                                    /* ---- TCP RX/TX STATUS FNCTS ---- */
+CPU_BOOLEAN      NetTCP_ConnIsAcceptRdy               (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+
+CPU_BOOLEAN      NetTCP_ConnIsAvailRx                 (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+
+CPU_BOOLEAN      NetTCP_ConnIsRdyTx                   (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+
+
+
+                                                                                    /* ------ TCP CONN API FNCTS ------ */
+NET_TCP_CONN_ID  NetTCP_ConnGet                       (NET_TCP_APP_POST_FNCT                fnct_app_post_rx,
+                                                       NET_TCP_APP_POST_FNCT                fnct_app_post_tx,
+                                                       NET_ERR                             *p_err);
+
+void             NetTCP_ConnFree                      (NET_TCP_CONN_ID                      conn_id_tcp);
+
+
+void             NetTCP_ConnCloseFromConn             (NET_TCP_CONN_ID                      conn_id_tcp);
+
+
+void             NetTCP_ConnSetID_Conn                (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_CONN_ID                          conn_id,
+                                                       NET_ERR                             *p_err);
+
+
+void             NetTCP_ConnSetStateListen            (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_TCP_APP_LISTEN_Q_IS_AVAIL_FNCT   tcp_app_listen_is_avail_fnct,
+                                                       NET_ERR                             *p_err);
+
+#ifndef  NET_TCP_CFG_OLD_WINDOW_MGMT_EN
+void             NetTCP_ConnAppAcceptRdySignal        (NET_CONN_ID                          conn_id_parent,
+                                                       NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_ERR                             *p_err);
+#endif
+
+                                                                                    /* ------ TCP CONN CFG FNCTS ------ */
+CPU_BOOLEAN      NetTCP_ConnCfgIdleTimeoutHandler     (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_TCP_TIMEOUT_SEC                  timeout_sec,
+                                                       NET_ERR                             *p_err);
+
+
+
+CPU_BOOLEAN      NetTCP_ConnCfgMaxSegSizeLocalHandler (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_TCP_SEG_SIZE                     max_seg_size,
+                                                       NET_ERR                             *p_err);
+
+
+CPU_BOOLEAN      NetTCP_ConnCfgRxWinSizeHandler       (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_TCP_WIN_SIZE                     win_size,
+                                                       NET_ERR                             *p_err);
+
+
+CPU_BOOLEAN      NetTCP_ConnCfgTxWinSizeHandler       (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_TCP_WIN_SIZE                     win_size,
+                                                       NET_ERR                             *p_err);
+
+
+CPU_BOOLEAN      NetTCP_ConnCfgTxNagleEnHandler       (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       CPU_BOOLEAN                          nagle_en,
+                                                       NET_ERR                             *p_err);
+
+CPU_BOOLEAN      NetTCP_ConnCfgTxAckDlyTimeoutHandler (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_TCP_TIMEOUT_MS                   timeout_ms,
+                                                       NET_ERR                             *p_err);
+
+
+CPU_BOOLEAN      NetTCP_ConnCfgTxKeepAliveEnHandler   (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       CPU_BOOLEAN                          keep_alive_en,
+                                                       NET_ERR                             *p_err);
+
+CPU_BOOLEAN      NetTCP_ConnCfgTxKeepAliveThHandler   (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_PKT_CTR                          nbr_max_keep_alive,
+                                                       NET_ERR                             *p_err);
+
+CPU_BOOLEAN      NetTCP_ConnCfgTxKeepAliveRetryTimeout(NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_TCP_TIMEOUT_SEC                  timeout_sec,
+                                                       NET_ERR                             *p_err);
+
+CPU_BOOLEAN      NetTCP_ConnCfgTxKeepAliveRetryHandler(NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_TCP_TIMEOUT_SEC                  timeout_sec,
+                                                       NET_ERR                             *p_err);
+
+CPU_BOOLEAN      NetTCP_ConnCfgReTxMaxThHandler       (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_PKT_CTR                          nbr_max_re_tx,
+                                                       NET_ERR                             *p_err);
+
+CPU_BOOLEAN      NetTCP_ConnCfgReTxMaxTimeoutHandler  (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_TCP_TIMEOUT_SEC                  timeout_sec,
+                                                       NET_ERR                             *p_err);
+
+CPU_BOOLEAN      NetTCP_ConnCfgMSL_TimeoutHandler     (NET_TCP_CONN_ID                      conn_id_tcp,
+                                                       NET_TCP_TIMEOUT_SEC                  msl_timeout_sec,
+                                                       NET_ERR                             *p_err);
+
+
+                                                                                    /* ---- TCP CONN STATUS FNCTS ----- */
+CPU_BOOLEAN      NetTCP_ConnIsUsed                    (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+
+
+
+                                                                                    /* --------- TCP Q FNCTS ---------- */
+                                                                                    /* Clr      TCP conn rx Q signal.   */
+void             NetTCP_RxQ_Clr                       (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+                                                                                    /* Wait for TCP conn rx Q signal.   */
+void             NetTCP_RxQ_Wait                      (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+                                                                                    /* Signal   TCP conn rx Q.          */
+void             NetTCP_RxQ_Signal                    (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+                                                                                    /* Abort    TCP conn rx Q.          */
+void             NetTCP_RxQ_Abort                     (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+
+                                                                                    /* Set dflt TCP conn rx Q timeout.  */
+void             NetTCP_RxQ_TimeoutDflt               (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+                                                                                    /* Set      TCP conn rx Q timeout.  */
+void             NetTCP_RxQ_TimeoutSet                (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       CPU_INT32U            timeout_ms,
+                                                       NET_ERR              *p_err);
+                                                                                    /* Get      TCP conn rx Q timeout.  */
+CPU_INT32U       NetTCP_RxQ_TimeoutGet_ms             (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+
+                                                                                    /* Clr      TCP conn tx Q signal.   */
+void             NetTCP_TxQ_Clr                       (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+                                                                                    /* Wait for TCP conn tx Q signal.   */
+void             NetTCP_TxQ_Wait                      (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+                                                                                    /* Signal   TCP conn tx Q.          */
+void             NetTCP_TxQ_Signal                    (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+                                                                                    /* Abort    TCP conn tx Q.          */
+void             NetTCP_TxQ_Abort                     (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+
+                                                                                    /* Set dflt TCP conn tx Q timeout.  */
+void             NetTCP_TxQ_TimeoutDflt               (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+                                                                                    /* Set      TCP conn tx Q timeout.  */
+void             NetTCP_TxQ_TimeoutSet                (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       CPU_INT32U            timeout_ms,
+                                                       NET_ERR              *p_err);
+                                                                                    /* Get      TCP conn tx Q timeout.  */
+CPU_INT32U       NetTCP_TxQ_TimeoutGet_ms             (NET_TCP_CONN_ID       conn_id_tcp,
+                                                       NET_ERR              *p_err);
+
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_TCP_NBR_CONN
+#error  "NET_TCP_NBR_CONN                           not #define'd in 'net_cfg.h'"
+#error  "                                         [MUST be  >= NET_TCP_CONN_NBR_MIN]"
+#error  "                                         [     &&  <= NET_TCP_CONN_NBR_MAX]"
+
+#elif   (DEF_CHK_VAL(NET_TCP_NBR_CONN,     \
+                     NET_TCP_CONN_NBR_MIN, \
+                     NET_TCP_CONN_NBR_MAX) != DEF_OK)
+#error  "NET_TCP_NBR_CONN                     illegally #define'd in 'net_cfg.h'"
+#error  "                                         [MUST be  >= NET_TCP_CONN_NBR_MIN]"
+#error  "                                         [     &&  <= NET_TCP_CONN_NBR_MAX]"
+#endif
+
+
+#ifndef  NET_TCP_DFLT_RX_WIN_SIZE_OCTET
+#error  "NET_TCP_DFLT_RX_WIN_SIZE_OCTET                  not #define'd in 'net_cfg.h'"
+#error  "                                         [MUST be  >= NET_TCP_WIN_SIZE_MIN]"
+#error  "                                         [     &&  <= NET_TCP_WIN_SIZE_MAX]"
+
+#elif   (DEF_CHK_VAL(NET_TCP_DFLT_RX_WIN_SIZE_OCTET, \
+                     NET_TCP_WIN_SIZE_MIN,           \
+                     NET_TCP_WIN_SIZE_MAX) != DEF_OK)
+#error  "NET_TCP_DFLT_RX_WIN_SIZE_OCTET            illegally #define'd in 'net_cfg.h'"
+#error  "                                         [MUST be  >= NET_TCP_WIN_SIZE_MIN]"
+#error  "                                         [     &&  <= NET_TCP_WIN_SIZE_MAX]"
+#endif
+
+
+#ifndef  NET_TCP_DFLT_TX_WIN_SIZE_OCTET
+#error  "NET_TCP_DFLT_TX_WIN_SIZE_OCTET                  not #define'd in 'net_cfg.h'"
+#error  "                                         [MUST be  >= NET_TCP_WIN_SIZE_MIN]"
+#error  "                                         [     &&  <= NET_TCP_WIN_SIZE_MAX]"
+
+#elif   (DEF_CHK_VAL(NET_TCP_DFLT_TX_WIN_SIZE_OCTET, \
+                     NET_TCP_WIN_SIZE_MIN,           \
+                     NET_TCP_WIN_SIZE_MAX) != DEF_OK)
+#error  "NET_TCP_DFLT_TX_WIN_SIZE_OCTET            illegally #define'd in 'net_cfg.h'"
+#error  "                                         [MUST be  >= NET_TCP_WIN_SIZE_MIN]"
+#error  "                                         [     &&  <= NET_TCP_WIN_SIZE_MAX]"
+#endif
+
+
+#ifndef  NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC
+#error  "NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC           not #define'd in 'net_cfg.h'                "
+#error  "                                         [MUST be  >= NET_TCP_CONN_TIMEOUT_MAX_SEG_MIN_SEC]"
+#error  "                                         [     &&  <= NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC]"
+
+#elif   (DEF_CHK_VAL(NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC,          \
+                     NET_TCP_CONN_TIMEOUT_MAX_SEG_MIN_SEC,          \
+                     NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC) != DEF_OK)
+#error  "NET_TCP_DFLT_TIMEOUT_CONN_MAX_SEG_SEC     illegally #define'd in 'net_cfg.h'                "
+#error  "                                         [MUST be  >= NET_TCP_CONN_TIMEOUT_MAX_SEG_MIN_SEC]"
+#error  "                                         [     &&  <= NET_TCP_CONN_TIMEOUT_MAX_SEG_MAX_SEC]"
+#endif
+
+
+
+#ifndef  NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC
+#error  "NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC        not #define'd in 'net_cfg.h'            "
+#error  "                                         [MUST be  >= NET_TCP_CONN_TIMEOUT_FW2_MIN_SEC]"
+#error  "                                         [     &&  <= NET_TCP_CONN_TIMEOUT_FW2_MAX_SEC]"
+
+#elif   (DEF_CHK_VAL(NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC,   \
+                     NET_TCP_CONN_TIMEOUT_FW2_MIN_SEC,          \
+                     NET_TCP_CONN_TIMEOUT_FW2_MAX_SEC) != DEF_OK)
+#error  "NET_TCP_DFLT_TIMEOUT_CONN_FIN_WAIT_2_SEC  illegally #define'd in 'net_cfg.h'            "
+#error  "                                         [MUST be  >= NET_TCP_CONN_TIMEOUT_FW2_MIN_SEC]"
+#error  "                                         [     &&  <= NET_TCP_CONN_TIMEOUT_FW2_MAX_SEC]"
+#endif
+
+
+
+#ifndef  NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS
+#error  "NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS            not #define'd in 'net_cfg.h'       "
+#error  "                                         [MUST be  >= NET_TCP_ACK_DLY_TIME_MIN_MS]"
+#error  "                                         [     &&  <= NET_TCP_ACK_DLY_TIME_MAX_MS]"
+
+#elif   (DEF_CHK_VAL(NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS,  \
+                     NET_TCP_ACK_DLY_TIME_MIN_MS,          \
+                     NET_TCP_ACK_DLY_TIME_MAX_MS) != DEF_OK)
+#error  "NET_TCP_DFLT_TIMEOUT_CONN_ACK_DLY_MS      illegally #define'd in 'net_cfg.h'       "
+#error  "                                         [MUST be  >= NET_TCP_ACK_DLY_TIME_MIN_MS]"
+#error  "                                         [     &&  <= NET_TCP_ACK_DLY_TIME_MAX_MS]"
+#endif
+
+
+
+
+#ifndef  NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS
+#error  "NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS               not #define'd in 'net_cfg.h' "
+#error  "                                         [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                         [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                         [     ||  == NET_TMR_TIME_INFINITE]"
+
+#elif  ((DEF_CHK_VAL(NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS,                                   \
+                     NET_TIMEOUT_MIN_mS,                                                 \
+                     NET_TIMEOUT_MAX_mS) != DEF_OK)                      &&              \
+     (!((DEF_CHK_VAL_MIN(NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS, 0) == DEF_OK) &&              \
+                        (NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS     == NET_TMR_TIME_INFINITE))))
+#error  "NET_TCP_DFLT_TIMEOUT_CONN_RX_Q_MS         illegally #define'd in 'net_cfg.h' "
+#error  "                                         [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                         [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                         [     ||  == NET_TMR_TIME_INFINITE]"
+#endif
+
+
+
+#ifndef  NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS
+#error  "NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS               not #define'd in 'net_cfg.h' "
+#error  "                                         [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                         [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                         [     ||  == NET_TMR_TIME_INFINITE]"
+
+#elif  ((DEF_CHK_VAL(NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS,                                   \
+                     NET_TIMEOUT_MIN_mS,                                                 \
+                     NET_TIMEOUT_MAX_mS) != DEF_OK)                      &&              \
+     (!((DEF_CHK_VAL_MIN(NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS, 0) == DEF_OK) &&              \
+                        (NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS     == NET_TMR_TIME_INFINITE))))
+#error  "NET_TCP_DFLT_TIMEOUT_CONN_TX_Q_MS         illegally #define'd in 'net_cfg.h' "
+#error  "                                         [MUST be  >= NET_TIMEOUT_MIN_mS]   "
+#error  "                                         [     &&  <= NET_TIMEOUT_MAX_mS]   "
+#error  "                                         [     ||  == NET_TMR_TIME_INFINITE]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_TCP_MODULE_EN      */
+#endif  /* NET_TCP_MODULE_PRESENT */
\ No newline at end of file
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tmr.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tmr.c
new file mode 100644
index 0000000..84f74ed
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tmr.c
@@ -0,0 +1,998 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK TIMER MANAGEMENT
+*
+* Filename      : net_tmr.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_TMR_MODULE
+#include  "net.h"
+#include  "net_tmr.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- TASK NAMES -------------------- */
+#define  NET_TMR_TASK_NAME                  "Net Tmr Task"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  KAL_TASK_HANDLE  NetTmr_TaskHandle;
+
+static  NET_TMR         NetTmr_Tbl[NET_TMR_CFG_NBR_TMR];
+static  NET_TMR        *NetTmr_PoolPtr;                    /* Ptr to pool of free net tmrs.                        */
+static  NET_STAT_POOL   NetTmr_PoolStat;
+
+static  NET_TMR        *NetTmr_TaskListHead;               /* Ptr to head of Tmr Task List.                        */
+static  NET_TMR        *NetTmr_TaskListPtr;                /* Ptr to cur     Tmr Task List tmr to update.          */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  void  NetTmr_TaskInit      (const  NET_TASK_CFG  *p_tmr_task_cfg,
+                                           NET_ERR       *p_err);
+
+static  void  NetTmr_Task          (       void          *p_data);
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+static  void  NetTmr_Clr           (       NET_TMR       *p_tmr);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            NetTmr_Init()
+*
+* Description : (1) Initialize Network Timer Management Module :
+*
+*                   (a) Perform Timer Module/OS initialization
+*                   (b) Initialize timer pool
+*                   (c) Initialize timer table
+*                   (d) Initialize timer task list pointer
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TMR_ERR_NONE                Network timer module successfully initialized.
+*
+*                               ------------ RETURNED BY NetTmr_TaskInit() : -----------
+*                               See NetTmr_TaskInit() for additional return error codes.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) The following network timer initialization MUST be sequenced as follows :
+*
+*                   (a) NetTmr_Init()      MUST precede ALL other network timer initialization functions
+*                   (b) Network timer pool MUST be initialized PRIOR to initializing the pool with pointers
+*                            to timers
+*********************************************************************************************************
+*/
+
+void  NetTmr_Init (const  NET_TASK_CFG  *p_tmr_task_cfg,
+                          NET_ERR       *p_err)
+{
+    NET_TMR      *p_tmr;
+    NET_TMR_QTY   i;
+    NET_ERR       err;
+
+
+                                                                /* --------------- PERFORM TMR/OS INIT ---------------- */
+    NetTmr_TaskInit(p_tmr_task_cfg, p_err);                     /* Create Tmr Task       (see Note #2a).                */
+    if (*p_err != NET_TMR_ERR_NONE) {
+         return;
+    }
+
+
+                                                                /* ------------------ INIT TMR POOL ------------------- */
+    NetTmr_PoolPtr = DEF_NULL;                                  /* Init-clr net tmr pool (see Note #2b).                */
+
+    NetStat_PoolInit((NET_STAT_POOL   *)&NetTmr_PoolStat,
+                     (NET_STAT_POOL_QTY) NET_TMR_CFG_NBR_TMR,
+                     (NET_ERR         *)&err);
+
+
+                                                                /* ------------------ INIT TMR TBL -------------------- */
+    p_tmr = &NetTmr_Tbl[0];
+    for (i = 0u; i < NET_TMR_CFG_NBR_TMR; i++) {
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+        NetTmr_Clr(p_tmr);
+#endif
+
+        p_tmr->NextPtr  = NetTmr_PoolPtr;                       /* Free each tmr to tmr pool (see Note #2).             */
+        NetTmr_PoolPtr = p_tmr;
+
+        p_tmr++;
+    }
+
+
+                                                                /* -------------- INIT TMR TASK LIST PTR -------------- */
+    NetTmr_TaskListHead = DEF_NULL;
+    NetTmr_TaskListPtr  = DEF_NULL;
+
+
+   *p_err = NET_TMR_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetTmr_TaskInit()
+*
+* Description : (1) Perform Timer/OS initialization :
+*
+*                   (a) Validate network timer/OS configuration :
+*
+*                       (1) OS ticker / Network Timer Task frequency
+*
+*                   (b) Create Network Timer Task
+*
+*
+* Argument(s) : p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TMR_ERR_NONE                    Network timer/OS initialization successful.
+*                               NET_TMR_ERR_INIT_TASK_INVALID_FREQ  Invalid OS ticker frequency configured; MUST
+*                                                                       be greater than (or equal to) configured
+*                                                                       network timer task frequency.
+*                               NET_TMR_ERR_INIT_TASK_INVALID_ARG   Invalid argument to init timer task.
+*                               NET_ERR_FAULT_MEM_ALLOC             Error in memory allocation.
+*                               NET_ERR_FAULT_UNKNOWN_ERR           Unknown error code encounter.
+*                               NET_TMR_ERR_INIT_TASK_CREATE        Network timer task NOT successfully
+*                                                                       initialized.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTmr_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetTmr_TaskInit (const  NET_TASK_CFG  *p_tmr_task_cfg,
+                                      NET_ERR       *p_err)
+{
+    KAL_ERR  err_kal;
+
+
+
+                                                                /* ----- VALIDATE NETWORK TIMER/OS CONFIGURATION ------ */
+    if (KAL_TickRate < NET_TMR_CFG_TASK_FREQ) {                 /* If OS ticker frequency < network timer task ...      */
+       *p_err = NET_TMR_ERR_INIT_TASK_INVALID_FREQ;             /* ... frequency, return error (see Note #1a1).         */
+        return;
+    }
+
+
+                                                                /* ------------ CREATE NETWORK TIMER TASK ------------- */
+    NetTmr_TaskHandle = KAL_TaskAlloc((const  CPU_CHAR *)NET_TMR_TASK_NAME,
+                                                         p_tmr_task_cfg->StkPtr,
+                                                         p_tmr_task_cfg->StkSizeBytes,
+                                                         DEF_NULL,
+                                                        &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_INVALID_ARG:
+            *p_err = NET_TMR_ERR_INIT_TASK_INVALID_ARG;
+             return;
+
+
+        case KAL_ERR_MEM_ALLOC:
+            *p_err = NET_ERR_FAULT_MEM_ALLOC;
+             return;
+
+
+        default:
+            *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+             return;
+    }
+
+
+
+    KAL_TaskCreate(NetTmr_TaskHandle,
+                   NetTmr_Task,
+                   DEF_NULL,
+                   p_tmr_task_cfg->Prio,
+                   DEF_NULL,
+                  &err_kal);
+    switch (err_kal) {
+        case KAL_ERR_NONE:
+             break;
+
+
+        case KAL_ERR_INVALID_ARG:
+        case KAL_ERR_ISR:
+        case KAL_ERR_OS:
+            *p_err = NET_TMR_ERR_INIT_TASK_CREATE;
+             return;
+
+
+        default:
+            *p_err = NET_ERR_FAULT_UNKNOWN_ERR;
+             return;
+    }
+
+
+   *p_err = NET_TMR_ERR_NONE;
+}
+
+/*
+*********************************************************************************************************
+*                                            NetTmr_Task()
+*
+* Description : Shell task to schedule & run Timer Task handler.
+*
+*               (1) Shell task's primary purpose is to schedule & run NetTmr_TaskHandler(); shell task
+*                   should run NetTmr_TaskHandler() at NET_TMR_CFG_TASK_FREQ rate forever (i.e. shell
+*                   task should NEVER exit).
+*
+*
+* Argument(s) : p_data      Pointer to task initialization data.
+*
+* Return(s)   : none.
+*
+* Created by  : NetTmr_Init().
+*
+* Note(s)     : (2) Assumes KAL_TickRate frequency is greater than NET_TMR_CFG_TASK_FREQ. Otherwise,
+*                   timer task scheduling rate will NOT be correct.
+*
+*               (3) Timer task MUST delay without failure.
+*
+*                   (a) Failure to delay timer task will prevent some network task(s)/operation(s) from
+*                       functioning correctly.  Thus, timer task is assumed to be successfully delayed
+*                       since NO error handling could be performed to counteract failure.
+*********************************************************************************************************
+*/
+
+static  void  NetTmr_Task (void  *p_data)
+{
+    KAL_TICK  dly;
+
+
+   (void)&p_data;                                               /* Prevent 'variable unused' compiler warning.          */
+
+    dly = KAL_TickRate / NET_TMR_CFG_TASK_FREQ;                 /* Delay task at NET_TMR_CFG_TASK_FREQ rate.            */
+
+    while (DEF_ON) {
+        KAL_DlyTick(dly, KAL_OPT_DLY_PERIODIC);
+        NetTmr_TaskHandler();
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                         NetTmr_TaskHandler()
+*
+* Description : (1) Handle network timers in the Timer Task List :
+*
+*                   (a) Acquire network lock                                            See Note #4
+*
+*                   (b) Handle every  network timer in Timer Task List :
+*                       (1) Decrement network timer(s)
+*                       (2) For any timer that expires :                                See Note #8
+*                           (A) Execute timer's callback function
+*                           (B) Free from Timer Task List
+*
+*                   (c) Release network lock
+*
+*
+*               (2) (a) Timers are managed in a doubly-linked Timer List.
+*
+*                       (1) 'NetTmr_TaskListHead' points to the head of the Timer List.
+*
+*                       (2) Timers' 'PrevPtr' & 'NextPtr' doubly-link each timer to form the Timer List.
+*
+*                   (b) New timers are added at the head of the Timer List.
+*
+*                   (c) As timers are added into the list, older timers migrate to the tail of the Timer
+*                       List.  Once a timer expires or is discarded, it is removed from the Timer List.
+*
+*
+*                                        |                                               |
+*                                        |<-------------- List of Timers --------------->|
+*                                        |                (see Note #2a)                 |
+*
+*                                      New Timers
+*                                   inserted at head                         Oldest Timer in List
+*                                    (see Note #2b)                            (see Note #2c)
+*
+*                                           |                 NextPtr                 |
+*                                           |             (see Note #2a2)             |
+*                                           v                    |                    v
+*                                                                |
+*                        Head of         -------       -------   v   -------       -------
+*                       Timer List  ---->|     |------>|     |------>|     |------>|     |
+*                                        |     |<------|     |<------|     |<------|     |
+*                    (see Note #2a1)     -------       -------   ^   -------       -------
+*                                                                |
+*                                                                |
+*                                                             PrevPtr
+*                                                         (see Note #2a2)
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTmr_Task().
+*
+*               This function is a network protocol suite to operating system (OS) function & SHOULD be
+*               called only by appropriate network-operating system port function(s).
+*
+* Note(s)     : (3) NetTmr_TaskHandler() blocked until network initialization completes.
+*
+*               (4) NetTmr_TaskHandler() blocks ALL other network protocol tasks by pending on & acquiring
+*                   the global network lock (see 'net.h  Note #3').
+*
+*               (5) (a) NetTmr_TaskHandler() handles all valid timers in Timer Task List, up to the first
+*                       corrupted timer in the Timer Task List, if any.
+*
+*                   (b) If ANY timer(s) in Timer Task List are corrupted :
+*
+*                       (1) Discard/unlink current Timer Task timer.
+*                           (A) Consequently, any remaining valid timers in Timer Task List are :
+*                               (1) Unlinked from Timer Task List, ...
+*                               (2) NOT handled.
+*
+*                       (2) Timer Task is aborted.
+*
+*               (6) Since NetTmr_TaskHandler() is asynchronous to NetTmr_Free() [via execution of certain
+*                   timer callback functions], the Timer Task List timer ('NetTmr_TaskListPtr') MUST be
+*                   coordinated with NetTmr_Free() to avoid Timer Task List corruption :
+*
+*                   (a) (1) Timer Task List timer is typically advanced by NetTmr_TaskHandler() to the next
+*                           timer in the Timer Task List.
+*
+*                       (2) However, whenever the Timer Task List timer is freed by an asynchronous timer
+*                           callback function, the Timer Task List timer MUST be advanced to the next
+*                           valid & available timer in the Timer Task List.
+*
+*                           See also 'NetTmr_Free()  Note #3a'.
+*
+*                   (b) Timer Task List timer MUST be cleared after handling the Timer Task List.
+*
+*                       (1) However, Timer Task List timer is implicitly cleared after handling the
+*                           Timer Task List.
+*
+*
+*               (7) Since NetTmr_TaskHandler() is asynchronous to ANY timer Get/Set, one additional tick
+*                   is added to each timer's count-down so that the requested timeout is ALWAYS satisfied.
+*                   This additional tick is added by NOT checking for zero ticks after decrementing; any
+*                   timer that expires is recognized at the next tick.
+*
+*               (8) When a network timer expires, the timer SHOULD be freed PRIOR to executing the timer
+*                   callback function.  This ensures that at least one timer is available if the timer
+*                   callback function requires a timer.
+*********************************************************************************************************
+*/
+
+void  NetTmr_TaskHandler (void)
+{
+    NET_TMR       *p_tmr;
+    void          *obj;
+    CPU_FNCT_PTR   fnct;
+    NET_ERR        err;
+    CPU_SR_ALLOC();
+
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        Net_InitCompWait(&err);                                 /* ... wait on net init (see Note #3).                  */
+        if (err != NET_ERR_NONE) {
+            return;
+        }
+    }
+
+                                                                /* ----------------- ACQUIRE NET LOCK ----------------- */
+    Net_GlobalLockAcquire((void *)&NetTmr_TaskHandler, &err);   /* See Note #4.                                         */
+    if (err != NET_ERR_NONE) {
+        return;                                                 /* Could not acquire the Global Network Lock.           */
+    }
+
+                                                                /* --------------- HANDLE TMR TASK LIST --------------- */
+    CPU_CRITICAL_ENTER();
+    NetTmr_TaskListPtr = NetTmr_TaskListHead;                   /* Start @ Tmr Task List head.                          */
+    p_tmr              = NetTmr_TaskListPtr;
+    CPU_CRITICAL_EXIT();
+
+    while (p_tmr != DEF_NULL) {                                 /* Handle  Tmr Task List tmrs (see Note #5a).           */
+        CPU_CRITICAL_ENTER();
+        NetTmr_TaskListPtr = NetTmr_TaskListPtr->NextPtr;       /* Set next tmr to update (see Note #6a1).              */
+
+        if (p_tmr->TmrVal > 0) {                                /* If tmr val > 0, dec tmr val (see Note #7).           */
+            p_tmr->TmrVal--;
+
+        } else {                                                /* Else tmr expired;           ...                      */
+
+            obj  = p_tmr->Obj;                                  /* Get obj for ...                                      */
+            fnct = p_tmr->Fnct;                                 /* ... tmr callback fnct.                               */
+
+            NetTmr_Free(p_tmr);                                 /* ... free tmr (see Note #8); ...                      */
+
+            CPU_CRITICAL_EXIT();
+            if (fnct != DEF_NULL) {                             /* ... & if avail,             ...                      */
+                fnct(obj);                                      /* ... exec tmr callback fnct.                          */
+
+            }
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+            else {
+                NET_CTR_ERR_INC(Net_ErrCtrs.Tmr.NotUsedCtr);    /* A timer without a callback is considered unused.     */
+            }
+#endif
+            CPU_CRITICAL_ENTER();
+        }
+        p_tmr = NetTmr_TaskListPtr;
+        CPU_CRITICAL_EXIT();
+    }
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+   Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetTmr_Get()
+*
+* Description : (1) Allocate & initialize a network timer :
+*
+*                   (a) Get        timer
+*                   (b) Validate   timer
+*                   (c) Initialize timer
+*                   (d) Insert     timer at head of Timer Task List
+*                   (e) Update timer pool statistics
+*                   (f) Return pointer to timer
+*                         OR
+*                       Null pointer & error code, on failure
+*
+*               (2) The timer pool is implemented as a stack :
+*
+*                   (a) 'NetTmr_PoolPtr' points to the head of the timer pool.
+*
+*                   (b) Timers' 'NextPtr's link each timer to form   the timer pool stack.
+*
+*                   (c) Timers are inserted & removed at the head of the timer pool stack.
+*
+*
+*                                        Timers are
+*                                    inserted & removed
+*                                        at the head
+*                                      (see Note #2c)
+*
+*                                             |                NextPtr
+*                                             |            (see Note #2b)
+*                                             v                   |
+*                                                                 |
+*                                          -------       -------  v    -------       -------
+*                         Timer Pool  ---->|     |------>|     |------>|     |------>|     |
+*                          Pointer         |     |       |     |       |     |       |     |
+*                                          |     |       |     |       |     |       |     |
+*                       (see Note #2a)     -------       -------       -------       -------
+*
+*                                          |                                               |
+*                                          |<------------ Pool of Free Timers ------------>|
+*                                          |                 (see Note #2)                 |
+*
+*
+* Argument(s) : fnct        Pointer to callback function to execute when timer expires (see Note #3).
+*
+*               obj         Pointer to object that requests a timer (MAY be NULL).
+*
+*               time        Initial timer value (in 'NET_TMR_TICK' ticks) [see Note #4].
+*
+*               flags       Flags to select timer options; bit-field flags logically OR'd :
+*
+*                               NET_TMR_FLAG_NONE               NO timer flags selected.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TMR_ERR_NONE                Network timer successfully allocated & initialized.
+*                               NET_ERR_FAULT_NULL_FNCT           Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_NONE_AVAIL          NO available timers to allocate.
+*                               NET_TMR_ERR_INVALID_TYPE        Network timer is NOT a valid timer type.
+*
+* Return(s)   : Pointer to network timer, if NO error(s).
+*
+*               Pointer to NULL,          otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (3) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); & ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers.
+*
+*               (4) Timer value of 0 ticks/seconds allowed; next tick will expire timer.
+*
+*                   See also 'NetTmr_TaskHandler()  Note #7'.
+*
+*               (6) See 'NetTmr_TaskHandler()  Note #2b'.
+*********************************************************************************************************
+*/
+
+NET_TMR  *NetTmr_Get (CPU_FNCT_PTR    fnct,
+                      void           *obj,
+                      NET_TMR_TICK    time,
+                      NET_TMR_FLAGS   flags,
+                      NET_ERR        *p_err)
+{
+    NET_TMR  *p_tmr;
+    NET_ERR   err;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ---------------- VALIDATE FNCT PTR ----------------- */
+    if (fnct == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Tmr.NullFnctCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return (DEF_NULL);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+                                                                /* --------------------- GET TMR ---------------------- */
+    if (NetTmr_PoolPtr != DEF_NULL) {                           /* If tmr pool NOT empty, get tmr from pool.            */
+        p_tmr           = (NET_TMR *)NetTmr_PoolPtr;
+        NetTmr_PoolPtr  = (NET_TMR *)p_tmr->NextPtr;
+
+    } else {                                                    /* If none avail, rtn err.                              */
+        NET_CTR_ERR_INC(Net_ErrCtrs.Tmr.NoneAvailCtr);
+        CPU_CRITICAL_EXIT();
+       *p_err = NET_TMR_ERR_NONE_AVAIL;
+        return (DEF_NULL);
+    }
+
+    if (p_tmr->Fnct != DEF_NULL) {                              /* A timer fresh from the pool should never indicate... */
+        CPU_SW_EXCEPTION();                                     /* ...that it is in use.                                */
+    }
+
+                                                                /* --------------------- INIT TMR --------------------- */
+    p_tmr->PrevPtr = DEF_NULL;
+    p_tmr->NextPtr = (NET_TMR *)NetTmr_TaskListHead;
+    p_tmr->Obj     =  obj;
+    p_tmr->Fnct    =  fnct;
+    p_tmr->TmrVal  =  time;                                     /* Set tmr val (in ticks).                              */
+   (void)&flags;                                                /* Prevent 'variable unused' warning (see Note #5).     */
+
+
+                                                                /* ---------- INSERT TMR INTO TMR TASK LIST ----------- */
+    if (NetTmr_TaskListHead != DEF_NULL) {                      /* If list NOT empty, insert before head.               */
+        NetTmr_TaskListHead->PrevPtr = p_tmr;
+    }
+    NetTmr_TaskListHead = p_tmr;                                /* Insert tmr @ list head (see Note #6).                */
+
+                                                                /* --------------- UPDATE TMR POOL STATS -------------- */
+    NetStat_PoolEntryUsedInc(&NetTmr_PoolStat, &err);
+
+    CPU_CRITICAL_EXIT();
+
+   *p_err =  NET_TMR_ERR_NONE;
+
+    return (p_tmr);                                             /* --------------------- RTN TMR ---------------------- */
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetTmr_Free()
+*
+* Description : (1) Free a network timer :
+*
+*                   (a) Remove timer from Timer Task List
+*                   (b) Clear  timer controls
+*                   (c) Free   timer back to timer pool
+*                   (d) Update timer pool statistics
+*
+*
+* Argument(s) : p_tmr       Pointer to a network timer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) #### To prevent freeing a timer already freed via previous timer free, NetTmr_Free()
+*                   checks the'.Fnct' field in the timer structure BEFORE freeing the timer.
+*
+*                   This prevention is only best-effort since any invalid duplicate timer frees MAY be
+*                   asynchronous to potentially valid timer gets.  Thus the invalid timer free(s) MAY
+*                   corrupt the timer's valid operation(s).
+*
+*                   However, since the primary tasks of the network protocol suite are prevented from
+*                   running concurrently (see 'net.h  Note #3'), it is NOT necessary to protect network
+*                   timer resources from possible corruption since no asynchronous access from other
+*                   network tasks is possible.
+*
+*               (3) Since NetTmr_TaskHandler() is asynchronous to NetTmr_Free() [via execution of certain
+*                   timer callback functions], the Timer Task List timer ('NetTmr_TaskListPtr') MUST be
+*                   coordinated with NetTmr_Free() to avoid Timer Task List corruption :
+*
+*                   (a) Whenever the Timer Task List timer is freed, the Timer Task List timer MUST be
+*                       advanced to the next valid & available timer in the Timer Task List.
+*
+*                       See also 'NetTmr_TaskHandler()  Note #6a2'.
+*********************************************************************************************************
+*/
+
+void  NetTmr_Free (NET_TMR  *p_tmr)
+{
+    NET_TMR  *p_tmr_prev;
+    NET_TMR  *p_tmr_next;
+    NET_ERR   err;
+    CPU_SR_ALLOC();
+
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_tmr == DEF_NULL) {
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();
+
+    if (p_tmr->Fnct == DEF_NULL) {                              /* Prevent situation where timer might get doubly freed.*/
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        NET_CTR_ERR_INC(Net_ErrCtrs.Tmr.NotUsedCtr);
+#endif
+        CPU_CRITICAL_EXIT();
+        return;                                                 /* Timer has already been freed. (see Note #2).         */
+    }
+
+                                                                /* ----------- REMOVE TMR FROM TMR TASK LIST ---------- */
+    if (p_tmr == NetTmr_TaskListPtr) {                          /* If tmr is next Tmr Task tmr to update, ...           */
+        p_tmr_next          = NetTmr_TaskListPtr->NextPtr;
+        NetTmr_TaskListPtr  = p_tmr_next;                       /* ... adv Tmr Task ptr to skip this tmr (see Note #3a).*/
+    }
+
+    p_tmr_prev = p_tmr->PrevPtr;
+    p_tmr_next = p_tmr->NextPtr;
+    if (p_tmr_prev != DEF_NULL) {                               /* If tmr is NOT    the head of Tmr Task List, ...      */
+        p_tmr_prev->NextPtr  = p_tmr_next;                      /* ...  set prev tmr to skip tmr.                       */
+    } else {                                                    /* Else set next tmr as head of Tmr Task List.          */
+        NetTmr_TaskListHead = p_tmr_next;
+
+        if (p_tmr_next != DEF_NULL) {                           /* Clear the new head's prev tmr.                       */
+            p_tmr_next->PrevPtr = DEF_NULL;
+        }
+
+    }
+    if (p_tmr_next != DEF_NULL) {                               /* If tmr is NOT @  the tail of Tmr Task List, ...      */
+        p_tmr_next->PrevPtr  = p_tmr_prev;                      /* ...  set next tmr to skip tmr.                       */
+    } else {
+        if (p_tmr_prev != DEF_NULL) {
+            p_tmr_prev->NextPtr = DEF_NULL;                     /* Clear the new tail's next tmr.                       */
+        }
+    }
+
+                                                                /* --------------------- FREE TMR --------------------- */
+    p_tmr->NextPtr = NetTmr_PoolPtr;
+    NetTmr_PoolPtr = p_tmr;
+    p_tmr->Fnct    = (CPU_FNCT_PTR)0u;
+
+                                                                /* -------------- UPDATE TMR POOL STATS --------------- */
+    NetStat_PoolEntryUsedDec(&NetTmr_PoolStat, &err);
+
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+*********************************************************************************************************
+*                                            NetTmr_Set()
+*
+* Description : Update a network timer with a new callback function & timer value.
+*
+* Argument(s) : p_tmr        Pointer to a network timer.
+*
+*               fnct        Pointer to callback function to execute when timer expires (see Note #2).
+*
+*               time        Update timer value (in seconds expressed in 'NET_TMR_TICK' ticks)
+*                               [see also Note #3].
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_TMR_ERR_NONE                Network timer time successfully updated.
+*                               NET_ERR_FAULT_NULL_PTR            Argument 'p_tmr' passed a NULL pointer.
+*                               NET_ERR_FAULT_NULL_FNCT           Argument 'fnct' passed a NULL pointer.
+*                               NET_TMR_ERR_INVALID_TYPE        Invalid timer type.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Assumes network timer is ALREADY owned by a valid network object.
+*
+*               (2) Ideally, network timer callback functions could be defined as '[(void) (OBJECT *)]'
+*                   type functions -- even though network timer API functions cast callback functions
+*                   to generic 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]').
+*
+*                   (a) (1) Unfortunately, ISO/IEC 9899:TC2, Section 6.3.2.3.(7) states that "a pointer
+*                           to an object ... may be converted to a pointer to a different object ...
+*                           [but] if the resulting pointer is not correctly aligned ... the behavior
+*                           is undefined".
+*
+*                           And since compilers may NOT correctly convert 'void' pointers to non-'void'
+*                           pointer arguments, network timer callback functions MUST avoid incorrect
+*                           pointer conversion behavior between 'void' pointer parameters & non-'void'
+*                           pointer arguments & therefore CANNOT be defined as '[(void) (OBJECT *)]'.
+*
+*                       (2) However, Section 6.3.2.3.(1) states that "a pointer to void may be converted
+*                           to or from a pointer to any ... object ... A pointer to any ... object ...
+*                           may be converted to a pointer to void and back again; the result shall
+*                           compare equal to the original pointer".
+*
+*                   (b) Therefore, to correctly convert 'void' pointer objects back to appropriate
+*                       network object pointer objects, network timer callback functions MUST :
+*
+*                       (1) Be defined as 'CPU_FNCT_PTR' type (i.e. '[(void) (void *)]'); & ...
+*                       (2) Explicitly cast 'void' pointer arguments to specific object pointers.
+*
+*                   See also 'NetTmr_Get()  Note #3'.
+*
+*               (3) Timer value of 0 ticks/seconds allowed; next tick will expire timer.
+*
+*                   See also 'NetTmr_TaskHandler()  Note #7'.
+*********************************************************************************************************
+*/
+
+void  NetTmr_Set (NET_TMR       *p_tmr,
+                  CPU_FNCT_PTR   fnct,
+                  NET_TMR_TICK   time,
+                  NET_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTRS ------------------- */
+    if (p_tmr == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Tmr.NullPtrCtr);
+       *p_err = NET_ERR_FAULT_NULL_PTR;
+        return;
+    }
+
+    if (fnct == DEF_NULL) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.Tmr.NullFnctCtr);
+       *p_err = NET_ERR_FAULT_NULL_FNCT;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+
+    if (p_tmr->Fnct == DEF_NULL) {
+        CPU_SW_EXCEPTION();                                     /* Trying to update a timer that's been freed           */
+    }
+
+    p_tmr->Fnct   = fnct;
+    p_tmr->TmrVal = time;
+
+    CPU_CRITICAL_EXIT();
+
+   *p_err        = NET_TMR_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetTmr_PoolStatGet()
+*
+* Description : Get network timer statistics pool.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Network timer statistics pool, if NO error(s).
+*
+*               NULL          statistics pool, otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) NetTmr_PoolStatGet() blocked until network initialization completes; return NULL
+*                   statistics pool.
+*
+*               (2) 'NetTmr_PoolStat' MUST ALWAYS be accessed exclusively in critical sections.
+*********************************************************************************************************
+*/
+
+NET_STAT_POOL  NetTmr_PoolStatGet (void)
+{
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    NET_ERR        err;
+#endif
+    NET_STAT_POOL  stat_pool;
+    CPU_SR_ALLOC();
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        NetStat_PoolClr(&stat_pool, &err);
+        return (stat_pool);                                     /* ... rtn NULL stat pool (see Note #1).                */
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    stat_pool = NetTmr_PoolStat;
+    CPU_CRITICAL_EXIT();
+
+    return (stat_pool);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    NetTmr_PoolStatResetMaxUsed()
+*
+* Description : Reset network timer statistics pool's maximum number of entries used.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) NetTmr_PoolStatResetMaxUsed() blocked until network initialization completes.
+*
+*                   (a) However, since 'NetTmr_PoolStat' is reset when network initialization completes;
+*                       NO error is returned.
+*********************************************************************************************************
+*/
+
+void  NetTmr_PoolStatResetMaxUsed (void)
+{
+    NET_ERR  err;
+
+                                                                /* Acquire net lock.                                    */
+    Net_GlobalLockAcquire((void *)&NetTmr_PoolStatResetMaxUsed, &err);
+    if (err != NET_ERR_NONE) {
+        return;
+    }
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, ...                            */
+        Net_GlobalLockRelease();                                /* ... rtn w/o err (see Note #1a).                      */
+        return;
+    }
+#endif
+
+
+    NetStat_PoolResetUsedMax(&NetTmr_PoolStat, &err);           /* Reset net tmr stat pool.                             */
+
+                                                                /* ----------------- RELEASE NET LOCK ----------------- */
+    Net_GlobalLockRelease();
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            NetTmr_Clr()
+*
+* Description : Clear network timer controls.
+*
+* Argument(s) : p_tmr       Pointer to a network timer.
+*               ----        Argument validated in NetTmr_Init(),
+*                                                 NetTmr_Free().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTmr_Init(),
+*               NetTmr_Free().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_DBG_CFG_MEM_CLR_EN == DEF_ENABLED)
+static  void  NetTmr_Clr (NET_TMR  *p_tmr)
+{
+    p_tmr->PrevPtr = DEF_NULL;
+    p_tmr->NextPtr = DEF_NULL;
+    p_tmr->Obj     = DEF_NULL;
+    p_tmr->Fnct    = DEF_NULL;
+    p_tmr->TmrVal  = NET_TMR_TIME_0S;
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tmr.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tmr.h
new file mode 100644
index 0000000..41b578a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tmr.h
@@ -0,0 +1,301 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK TIMER MANAGEMENT
+*
+* Filename      : net_tmr.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net.h"
+#include  "net_cfg_net.h"
+#include  "net_type.h"
+#include  "net_stat.h"
+#include  "net_err.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_TMR_MODULE_PRESENT
+#define  NET_TMR_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     NETWORK TIMER FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ NET TMR FLAGS ------------------- */
+#define  NET_TMR_FLAG_NONE                        DEF_BIT_NONE
+#define  NET_TMR_FLAG_USED                        DEF_BIT_00    /* Tmr cur used; i.e. NOT in free tmr pool.             */
+
+
+/*
+*********************************************************************************************************
+*                                   NETWORK TIMER TASK TIME DEFINES
+*
+* Note(s) : (1) Time constants based on NET_TMR_CFG_TASK_FREQ, NetTmr_TaskHandler()'s frequency [i.e. how
+*               often NetTmr_TaskHandler() is scheduled to run per second as implemented in NetTmr_Task()].
+*
+*           (2) NET_TMR_CFG_TASK_FREQ  MUST NOT be configured as a floating-point frequency.
+*********************************************************************************************************
+*/
+
+#define  NET_TMR_TIME_0S                                   0
+#define  NET_TMR_TIME_1S                                  (1  *  NET_TMR_CFG_TASK_FREQ)
+
+#define  NET_TMR_TIME_TICK                                 1
+#define  NET_TMR_TIME_TICK_PER_SEC                       NET_TMR_TIME_1S
+
+
+
+#define  NET_TMR_TASK_PERIOD_SEC                                 NET_TMR_CFG_TASK_FREQ
+#define  NET_TMR_TASK_PERIOD_mS     (DEF_TIME_NBR_mS_PER_SEC  /  NET_TMR_CFG_TASK_FREQ)
+#define  NET_TMR_TASK_PERIOD_uS     (DEF_TIME_NBR_uS_PER_SEC  /  NET_TMR_CFG_TASK_FREQ)
+#define  NET_TMR_TASK_PERIOD_nS     (DEF_TIME_NBR_nS_PER_SEC  /  NET_TMR_CFG_TASK_FREQ)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  NETWORK TIMER QUANTITY DATA TYPE
+*
+* Note(s) : (1) NET_TMR_NBR_MAX  SHOULD be #define'd based on 'NET_TMR_QTY' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_TMR_QTY;                               /* Defines max qty of net tmrs to support.              */
+
+#define  NET_TMR_NBR_MIN                                  1
+#define  NET_TMR_NBR_MAX                DEF_INT_16U_MAX_VAL     /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK TIMER TICK DATA TYPE
+*
+* Note(s) : (1) 'NET_TMR_TIME_INFINITE_TICK' & 'NET_TMR_TIME_INFINITE'  MUST be globally #define'd AFTER
+*               'NET_TMR_TICK' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U    NET_TMR_TICK;
+
+#define  NET_TMR_TIME_INFINITE          DEF_INT_32U_MAX_VAL     /* Define as max unsigned val (see Note #1).            */
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK TIMER FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_FLAGS  NET_TMR_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                       NETWORK TIMER DATA TYPE
+*
+*                                    NET_TMR
+
+*                     Previous   |-------------|
+*                      Timer <----------O      |
+*                                |-------------|     Next
+*                                |      O----------> Timer
+*                                |-------------|                    -------------
+*                                |      O-------------------------> |           |
+*                                |-------------|       Object       |  Object   |
+*                                |      O----------> Expiration     |   that    |
+*                                |-------------|      Function      | requested |
+*                                |   Current   |                    |   Timer   |
+*                                | Timer value |                    |           |
+*                                |-------------|                    -------------
+*
+*********************************************************************************************************
+*/
+
+                                                                /* --------------------- NET TMR ---------------------- */
+typedef  struct  net_tmr  NET_TMR;
+
+struct  net_tmr {
+    NET_TMR        *PrevPtr;                                    /* Ptr to PREV tmr.                                     */
+    NET_TMR        *NextPtr;                                    /* Ptr to NEXT tmr.                                     */
+
+    void           *Obj;                                        /* Ptr to obj  using TMR.                               */
+    CPU_FNCT_PTR    Fnct;                                       /* Ptr to fnct used on obj when TMR expires.            */
+
+    NET_TMR_TICK    TmrVal;                                     /* Cur tmr val (in NET_TMR_TICK ticks).                 */
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                             PUBLIC API
+*********************************************************************************************************
+*/
+
+                                                                /* ----------------- TMR STATUS FNCTS ----------------- */
+NET_STAT_POOL   NetTmr_PoolStatGet         (void);
+
+void            NetTmr_PoolStatResetMaxUsed(void);
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+
+void            NetTmr_Init                (const NET_TASK_CFG  *p_tmr_task_cfg,
+                                                  NET_ERR       *p_err);
+
+void            NetTmr_TaskHandler         (      void);
+
+
+                                                                /* --------------- TMR ALLOCATION FNCTS --------------- */
+NET_TMR        *NetTmr_Get                 (      CPU_FNCT_PTR    fnct,
+                                                  void           *obj,
+                                                  NET_TMR_TICK    time,
+                                                  NET_TMR_FLAGS   flags,
+                                                  NET_ERR        *p_err);
+
+void            NetTmr_Free                (      NET_TMR        *p_tmr);
+
+
+                                                                /* ------------------ TMR API FNCTS ------------------- */
+void            NetTmr_Set                 (      NET_TMR        *p_tmr,
+                                                  CPU_FNCT_PTR    fnct,
+                                                  NET_TMR_TICK    time,
+                                                  NET_ERR        *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  NET_TMR_CFG_NBR_TMR
+#error  "NET_TMR_CFG_NBR_TMR          not #define'd in 'net_cfg.h'"
+#error  "                       [MUST be  >= NET_TMR_NBR_MIN]     "
+#error  "                       [     &&  <= NET_TMR_NBR_MAX]     "
+
+#elif   (DEF_CHK_VAL(NET_TMR_CFG_NBR_TMR,      \
+                     NET_TMR_NBR_MIN,          \
+                     NET_TMR_NBR_MAX) != DEF_OK)
+#error  "NET_TMR_CFG_NBR_TMR    illegally #define'd in 'net_cfg.h'"
+#error  "                       [MUST be  >= NET_TMR_NBR_MIN]     "
+#error  "                       [     &&  <= NET_TMR_NBR_MAX]     "
+#endif
+
+
+
+
+#ifndef  NET_TMR_CFG_TASK_FREQ
+#error  "NET_TMR_CFG_TASK_FREQ        not #define'd in 'net_cfg.h'"
+#error  "                       [MUST be  > 0 Hz]                 "
+
+#elif   (DEF_CHK_VAL_MIN(NET_TMR_CFG_TASK_FREQ, 1) != DEF_OK)
+#error  "NET_TMR_CFG_TASK_FREQ  illegally #define'd in 'net_cfg.h'"
+#error  "                       [MUST be  > 0 Hz]                 "
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_TMR_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_type.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_type.h
new file mode 100644
index 0000000..65badee
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_type.h
@@ -0,0 +1,443 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         NETWORK DATA TYPES
+*
+* Filename      : net_type.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_TYPE_MODULE_PRESENT
+#define  NET_TYPE_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*
+* Note(s) : (1) Ideally, each network module &/or protocol layer would define all its own data types.
+*               However, some network module &/or protocol layer data types MUST be defined PRIOR to
+*               all other network modules/layers that require their definitions.
+*
+*               See also 'net.h  NETWORK INCLUDE FILES'.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                NETWORK TASK CONFIGURATION DATA TYPE
+*
+* Note(s): (1) When the Stack pointer is defined as null pointer (DEF_NULL), the task's stack should be
+*              automatically allowed on the heap of uC/LIB.
+*********************************************************************************************************
+*/
+
+typedef  struct  net_task_cfg {
+    CPU_INT32U   Prio;                                          /* Task priority.                                       */
+    CPU_INT32U   StkSizeBytes;                                  /* Size of the stack.                                   */
+    void        *StkPtr;                                        /* Pointer to base of the stack (see Note #1).          */
+} NET_TASK_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                       NETWORK FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK TRANSACTION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  net_transaction {
+   NET_TRANSACTION_NONE =   0,
+   NET_TRANSACTION_RX   = 100,
+   NET_TRANSACTION_TX   = 200
+} NET_TRANSACTION;
+
+/*
+*********************************************************************************************************
+*                          NETWORK MAXIMUM TRANSMISSION UNIT (MTU) DATA TYPE
+*
+* Note(s) : (1) NET_MTU_MIN_VAL & NET_MTU_MAX_VAL  SHOULD be #define'd based on 'NET_MTU' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_MTU;
+                                                                /* See Note #1.                                         */
+#define  NET_MTU_MIN_VAL                DEF_INT_16U_MIN_VAL
+#define  NET_MTU_MAX_VAL                DEF_INT_16U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                     NETWORK CHECK-SUM DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_CHK_SUM;
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK TIMESTAMP DATA TYPES
+*
+* Note(s) : (1) RFC #791, Section 3.1 'Options : Internet Timestamp' states that "the Timestamp is a
+*               right-justified, 32-bit timestamp in milliseconds since midnight UT [Universal Time]".
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  NET_TS;
+typedef  NET_TS      NET_TS_MS;
+
+
+/*
+*********************************************************************************************************
+*                                      NETWORK BUFFER DATA TYPES
+*
+* Note(s) : (1) NET_BUF_NBR_MAX  SHOULD be #define'd based on 'NET_BUF_QTY' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_BUF_QTY;                               /* Defines max qty of net bufs to support.              */
+
+#define  NET_BUF_NBR_MIN                                   1
+#define  NET_BUF_NBR_MAX                 DEF_INT_16U_MAX_VAL    /* See Note #1.                                         */
+
+
+typedef  struct  net_buf  NET_BUF;
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK PACKET COUNTER DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_BUF_QTY  NET_PKT_CTR;                              /* Defines max nbr of pkts to cnt.                      */
+
+#define  NET_PKT_CTR_MIN                NET_BUF_NBR_MIN
+#define  NET_PKT_CTR_MAX                NET_BUF_NBR_MAX
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK CONNECTION DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16S  NET_CONN_ID;
+
+
+/*
+*********************************************************************************************************
+*                                     NETWORK PROTOCOL DATA TYPE
+*
+* Note(s) : (1) See 'net.h  Note #2'.
+*********************************************************************************************************
+*/
+
+typedef  enum  net_protocol_type {
+
+                                                                /* ---------------- NET PROTOCOL TYPES ---------------- */
+    NET_PROTOCOL_TYPE_NONE                 = 0,
+    NET_PROTOCOL_TYPE_ALL                  = 1,
+
+                                                                /* --------------- LINK LAYER PROTOCOLS --------------- */
+    NET_PROTOCOL_TYPE_LINK                 = 10,
+
+                                                                /* -------------- NET IF LAYER PROTOCOLS -------------- */
+    NET_PROTOCOL_TYPE_IF                   = 20,
+    NET_PROTOCOL_TYPE_IF_FRAME             = 21,
+
+    NET_PROTOCOL_TYPE_IF_ETHER             = 25,
+    NET_PROTOCOL_TYPE_IF_IEEE_802          = 26,
+
+    NET_PROTOCOL_TYPE_ARP                  = 30,
+    NET_PROTOCOL_TYPE_NDP                  = 35,
+
+                                                                /* ---------------- NET LAYER PROTOCOLS --------------- */
+    NET_PROTOCOL_TYPE_IP_V4                = 40,
+    NET_PROTOCOL_TYPE_IP_V4_OPT            = 41,
+
+    NET_PROTOCOL_TYPE_IP_V6                = 42,
+    NET_PROTOCOL_TYPE_IP_V6_EXT_HOP_BY_HOP = 43,
+    NET_PROTOCOL_TYPE_IP_V6_EXT_ROUTING    = 44,
+    NET_PROTOCOL_TYPE_IP_V6_EXT_FRAG       = 45,
+    NET_PROTOCOL_TYPE_IP_V6_EXT_ESP        = 46,
+    NET_PROTOCOL_TYPE_IP_V6_EXT_AUTH       = 47,
+    NET_PROTOCOL_TYPE_IP_V6_EXT_NONE       = 48,
+    NET_PROTOCOL_TYPE_IP_V6_EXT_DEST       = 49,
+    NET_PROTOCOL_TYPE_IP_V6_EXT_MOBILITY   = 50,
+
+
+    NET_PROTOCOL_TYPE_ICMP_V4              = 60,
+    NET_PROTOCOL_TYPE_ICMP_V6              = 61,
+
+    NET_PROTOCOL_TYPE_IGMP                 = 62,
+
+
+                                                                /* ------------- TRANSPORT LAYER PROTOCOLS ------------ */
+    NET_PROTOCOL_TYPE_UDP_V4               = 70,
+    NET_PROTOCOL_TYPE_TCP_V4               = 71,
+
+    NET_PROTOCOL_TYPE_UDP_V6               = 72,
+    NET_PROTOCOL_TYPE_TCP_V6               = 73,
+
+                                                                /* ---------------- APP LAYER PROTOCOLS --------------- */
+    NET_PROTOCOL_TYPE_APP                  = 80,
+    NET_PROTOCOL_TYPE_SOCK                 = 81
+
+} NET_PROTOCOL_TYPE;
+
+
+typedef  enum  net_addr_hw_type {
+    NET_ADDR_HW_TYPE_NONE,
+    NET_ADDR_HW_TYPE_802x
+} NET_ADDR_HW_TYPE;
+
+
+
+/*
+*********************************************************************************************************
+*                           NETWORK TRANSPORT LAYER PORT NUMBER DATA TYPES
+*
+* Note(s) : (1) NET_PORT_NBR_MAX  SHOULD be #define'd based on 'NET_PORT_NBR' data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  NET_PORT_NBR;
+typedef  CPU_INT16U  NET_PORT_NBR_QTY;                          /* Defines max qty of port nbrs to support.             */
+
+#define  NET_PORT_NBR_MAX               DEF_INT_16U_MAX_VAL     /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                NETWORK INTERFACE & DEVICE DATA TYPES
+*
+* Note(s) : (1) NET_IF_NBR_MIN_VAL & NET_IF_NBR_MAX_VAL  SHOULD be #define'd based on 'NET_IF_NBR'
+*               data type declared.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  NET_IF_NBR;
+                                                                /* See Note #1.                                         */
+#define  NET_IF_NBR_MIN_VAL             DEF_INT_08U_MIN_VAL
+#define  NET_IF_NBR_MAX_VAL             DEF_INT_08U_MAX_VAL
+
+typedef  CPU_INT16U  NET_IF_FLAG;
+
+#define  NET_IF_FLAG_NONE               DEF_INT_16U_MIN_VAL
+#define  NET_IF_FLAG_FRAG               DEF_BIT_00
+
+typedef  NET_BUF_QTY  NET_IF_Q_SIZE;                            /* Defines max size of net IF q's to support.           */
+
+#define  NET_IF_Q_SIZE_MIN              NET_BUF_NBR_MIN
+#define  NET_IF_Q_SIZE_MAX              NET_BUF_NBR_MAX
+
+
+
+typedef  struct  net_if       NET_IF;
+typedef  struct  net_if_api   NET_IF_API;
+
+
+typedef  struct  net_dev_cfg  NET_DEV_CFG;
+
+
+typedef  enum  net_if_type {
+    NET_IF_TYPE_NONE,
+    NET_IF_TYPE_LOOPBACK,
+    NET_IF_TYPE_SERIAL,
+    NET_IF_TYPE_PPP,
+    NET_IF_TYPE_ETHER,
+    NET_IF_TYPE_WIFI
+} NET_IF_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                     NETWORK IPv4 LAYER DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  NET_IPv4_ADDR;                             /* Defines IPv4 IP addr size.                           */
+
+#define  NET_IPv4_ADDR_LEN                       (sizeof(NET_IPv4_ADDR))
+#define  NET_IPv4_ADDR_SIZE                      (sizeof(NET_IPv4_ADDR))
+
+
+typedef  CPU_INT08U  NET_IPv4_TOS;
+typedef  CPU_INT08U  NET_IPv4_TTL;
+
+typedef  NET_FLAGS   NET_IPv4_FLAGS;
+typedef  CPU_INT16U  NET_IPv4_HDR_FLAGS;
+
+typedef enum {
+    NET_IP_ADDR_FAMILY_UNKNOWN,
+    NET_IP_ADDR_FAMILY_NONE,
+    NET_IP_ADDR_FAMILY_IPv4,
+    NET_IP_ADDR_FAMILY_IPv6
+} NET_IP_ADDR_FAMILY;
+
+typedef  struct  net_ipv4_mreq {                                /* IPv4 Multicast Membership Request (socket option)    */
+    NET_IPv4_ADDR  mcast_addr;                                  /* IP Address of the multicast group                    */
+    NET_IPv4_ADDR  if_ip_addr;                                  /* IP Address of the IF on which to join the group      */
+} NET_IPv4_MREQ;
+
+/*
+*********************************************************************************************************
+*                                     NETWORK IPv6 LAYER DATA TYPES
+*********************************************************************************************************
+*/
+
+#define  NET_IPv6_ADDR_LEN             (4 * sizeof(CPU_INT32U))
+
+
+
+typedef  struct  net_ipv6_addr {                                /* Defines IPv6 IP addr size.                           */
+    CPU_INT08U  Addr[NET_IPv6_ADDR_LEN];
+} NET_IPv6_ADDR;
+
+#define  NET_IPv6_ADDR_SIZE            (sizeof(NET_IPv6_ADDR))
+
+#define  NET_IPv6_ADDR_LEN_NBR_BITS     NET_IPv6_ADDR_LEN * DEF_OCTET_NBR_BITS
+
+typedef  CPU_INT16U  NET_IPv6_TRAFFIC_CLASS;
+
+typedef  CPU_INT32U  NET_IPv6_FLOW_LABEL;
+
+typedef  CPU_INT08U  NET_IPv6_HOP_LIM;
+
+typedef  NET_FLAGS   NET_IPv6_FLAGS;
+
+typedef  CPU_INT16U  NET_IPv6_FRAG_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK TCP LAYER DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    TCP SEQUENCE NUMBER DATA TYPE
+*
+* Note(s) : (1) 'NET_TCP_SEQ_NBR'  pre-defined in 'net_type.h' PRIOR to all other network modules that
+*                require TCP sequence number data type(s).
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #1.                                         */
+typedef  CPU_INT32U  NET_TCP_SEQ_NBR;
+
+
+
+/*
+*********************************************************************************************************
+*                                     TCP SEGMENT SIZE DATA TYPE
+*
+* Note(s) : (1) 'NET_TCP_SEG_SIZE' pre-defined in 'net_type.h' PRIOR to all other network modules that
+*                require TCP segment size data type(s).
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #1.                                         */
+typedef  CPU_INT16U  NET_TCP_SEG_SIZE;
+
+typedef  NET_FLAGS   NET_TCP_FLAGS;
+typedef  CPU_INT16U  NET_TCP_HDR_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                      TCP WINDOW SIZE DATA TYPE
+*
+* Note(s) : (1) 'NET_TCP_WIN_SIZE' pre-defined in 'net_type.h' PRIOR to all other network modules that
+*                require TCP window size data type(s).
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #1.                                         */
+typedef  CPU_INT16U  NET_TCP_WIN_SIZE;
+
+/*
+*********************************************************************************************************
+*                                   TCP RTT MEASUREMENT DATA TYPES
+*
+* Note(s) : (1) RTT measurement data types MUST be defined to ensure sufficient range for both scaled
+*               & un-scaled, signed & unsigned time measurement values.
+*
+*           (2) 'NET_TCP_TX_RTT_TS_MS' pre-defined in 'net_type.h' PRIOR to all other network modules
+*                that require TCP Transmit Round-Trip Time data type(s).
+*********************************************************************************************************
+*/
+                                                                /* See Note #2.                                         */
+typedef  NET_TS_MS   NET_TCP_TX_RTT_TS_MS;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* NET_TYPE_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_udp.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_udp.c
new file mode 100644
index 0000000..b97c730
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_udp.c
@@ -0,0 +1,3103 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK UDP LAYER
+*                                      (USER DATAGRAM PROTOCOL)
+*
+* Filename      : net_udp.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 SR
+*                 AOP
+*********************************************************************************************************
+* Note(s)       : (1) Supports User Datagram Protocol as described in RFC #768.
+*
+*********************************************************************************************************
+* Notice(s)     : (1) The Institute of Electrical and Electronics Engineers and The Open Group, have given
+*                     us permission to reprint portions of their documentation.  Portions of this text are
+*                     reprinted and reproduced in electronic form from the IEEE Std 1003.1, 2004 Edition,
+*                     Standard for Information Technology -- Portable Operating System Interface (POSIX),
+*                     The Open Group Base Specifications Issue 6, Copyright (C) 2001-2004 by the Institute
+*                     of Electrical and Electronics Engineers, Inc and The Open Group.  In the event of any
+*                     discrepancy between these versions and the original IEEE and The Open Group Standard,
+*                     the original IEEE and The Open Group Standard is the referee document.  The original
+*                     Standard can be obtained online at http://www.opengroup.org/unix/online.html.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_UDP_MODULE
+#include  "net_udp.h"
+#include  "net_cfg_net.h"
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  "../IP/IPv4/net_ipv4.h"
+#include  "../IP/IPv4/net_icmpv4.h"
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  "../IP/IPv6/net_ipv6.h"
+#include  "../IP/IPv6/net_icmpv6.h"
+#endif
+
+#include  "net.h"
+#include  "net_stat.h"
+#include  "net_buf.h"
+#include  "net_ip.h"
+#include  "net_util.h"
+#include  "net_sock.h"
+#include  "../IF/net_if.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                            /* --------------- RX FNCTS --------------- */
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetUDP_RxPktValidateBuf  (NET_BUF_HDR       *p_buf_hdr,
+                                        NET_ERR           *p_err);
+#endif
+
+static  void  NetUDP_RxPktValidate     (NET_BUF           *p_buf,
+                                        NET_BUF_HDR       *p_buf_hdr,
+                                        NET_UDP_HDR       *p_udp_hdr,
+                                        NET_ERR           *p_err);
+
+
+static  void  NetUDP_RxPktDemuxDatagram(NET_BUF           *p_buf,
+                                        NET_ERR           *p_err);
+
+
+static  void  NetUDP_RxPktFree         (NET_BUF           *p_buf);
+
+static  void  NetUDP_RxPktDiscard      (NET_BUF           *p_buf,
+                                        NET_ERR           *p_err);
+
+
+                                                                            /* --------------- TX FNCTS --------------- */
+#ifdef  NET_IPv4_MODULE_EN
+static  void  NetUDP_TxIPv4            (NET_BUF            *p_buf,
+                                        NET_IPv4_ADDR       src_addr,
+                                        NET_UDP_PORT_NBR    src_port,
+                                        NET_IPv4_ADDR       dest_addr,
+                                        NET_UDP_PORT_NBR    dest_port,
+                                        NET_IPv4_TOS        TOS,
+                                        NET_IPv4_TTL        TTL,
+                                        NET_UDP_FLAGS       flags_udp,
+                                        NET_IPv4_FLAGS      flags_ip,
+                                        void               *p_opts_ip,
+                                        NET_ERR            *p_err);
+#endif
+
+#ifdef  NET_IPv6_MODULE_EN
+static  void  NetUDP_TxIPv6            (NET_BUF                 *p_buf,
+                                        NET_IPv6_ADDR           *p_src_addr,
+                                        NET_UDP_PORT_NBR         src_port,
+                                        NET_IPv6_ADDR           *p_dest_addr,
+                                        NET_UDP_PORT_NBR         dest_port,
+                                        NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                        NET_IPv6_FLOW_LABEL      flow_label,
+                                        NET_IPv6_HOP_LIM         hop_lim,
+                                        NET_UDP_FLAGS            flags_udp,
+                                        NET_ERR                 *p_err);
+#endif
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetUDP_TxPktValidate     (NET_BUF_HDR             *p_buf_hdr,
+                                        NET_UDP_PORT_NBR         src_port,
+                                        NET_UDP_PORT_NBR         dest_port,
+                                        NET_UDP_FLAGS            flags_udp,
+                                        NET_ERR                 *p_err);
+#endif
+
+static  void  NetUDP_TxPktPrepareHdr   (NET_BUF                 *p_buf,
+                                        NET_BUF_HDR             *p_buf_hdr,
+                                        void                    *p_src_addr,
+                                        NET_UDP_PORT_NBR         src_port,
+                                        void                    *p_dest_addr,
+                                        NET_UDP_PORT_NBR         dest_port,
+                                        NET_UDP_FLAGS            flags_udp,
+                                        NET_ERR                 *p_err);
+
+static  void  NetUDP_TxPktFree         (NET_BUF                 *p_buf);
+
+static  void  NetUDP_TxPktDiscard      (NET_BUF                 *p_buf,
+                                        NET_ERR                 *p_err);
+
+static  void  NetUDP_GetTxDataIx       (NET_IF_NBR               if_nbr,
+                                        NET_PROTOCOL_TYPE        protocol,
+                                        CPU_INT16U               data_len,
+                                        NET_UDP_FLAGS            flags,
+                                        CPU_INT16U              *p_ix,
+                                        NET_ERR                 *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                            NetUDP_Init()
+*
+* Description : (1) Initialize User Datagram Protocol Layer :
+*
+*                   (a)
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Net_Init().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  NetUDP_Init (void)
+{
+}
+
+
+/*
+*********************************************************************************************************
+*                                             NetUDP_Rx()
+*
+* Description : (1) Process received datagrams & forward to socket or application layer :
+*
+*                   (a) Validate UDP packet
+*                   (b) Demultiplex datagram to socket/application connection
+*                   (c) Update receive statistics
+*
+*               (2) Although UDP data units are typically referred to as 'datagrams' (see RFC #768, Section
+*                   'Introduction'), the term 'UDP packet' (see RFC #1983, 'packet') is used for UDP Receive
+*                   until the packet is validated as a UDP datagram.
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer that received UDP packet.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UDP_ERR_NONE                UDP datagram successfully received & processed.
+*
+*                                                               ----- RETURNED BY NetUDP_RxPktDiscard() : -----
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetIP_RxPktDemuxDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s).
+*
+* Note(s)     : (3) Network buffer already freed by higher layer; only increment error counter.
+*
+*               (4) RFC #792, Section 'Destination Unreachable Message : Description' states that
+*                   "if, in the destination host, the IP module cannot deliver the datagram because
+*                   the indicated ... process port is not active, the destination host may send a
+*                   destination unreachable message to the source host".
+*********************************************************************************************************
+*/
+
+void  NetUDP_Rx (NET_BUF  *p_buf,
+                 NET_ERR  *p_err)
+{
+    NET_BUF_HDR  *p_buf_hdr;
+    NET_UDP_HDR  *p_udp_hdr;
+    NET_ERR       msg_err;
+
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                 /* ------------------- VALIDATE PTR ------------------- */
+    if (p_buf == (NET_BUF *)0) {
+        NetUDP_RxPktDiscard(p_buf, p_err);
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.NullPtrCtr);
+        return;
+    }
+#endif
+
+
+    NET_CTR_STAT_INC(Net_StatCtrs.UDP.RxPktCtr);
+
+
+                                                                /* -------------- VALIDATE RX'D UDP PKT --------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetUDP_RxPktValidateBuf(p_buf_hdr, p_err);                    /* Validate rx'd buf.                                   */
+    switch (*p_err) {
+        case NET_UDP_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetUDP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+#endif
+    p_udp_hdr = (NET_UDP_HDR *)&p_buf->DataPtr[p_buf_hdr->TransportHdrIx];
+    NetUDP_RxPktValidate(p_buf, p_buf_hdr, p_udp_hdr, p_err);       /* Validate rx'd pkt.                                   */
+
+
+                                                                /* ------------------ DEMUX DATAGRAM ------------------ */
+    switch (*p_err) {
+        case NET_UDP_ERR_NONE:
+             NetUDP_RxPktDemuxDatagram(p_buf, p_err);
+             break;
+
+
+        case NET_UDP_ERR_INVALID_PORT_NBR:
+            *p_err = NET_ERR_RX_DEST;
+             break;
+
+
+        case NET_UDP_ERR_INVALID_LEN:
+        case NET_UDP_ERR_INVALID_LEN_DATA:
+        case NET_UDP_ERR_INVALID_CHK_SUM:
+        default:
+             NetUDP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+
+
+                                                                /* ----------------- UPDATE RX STATS ------------------ */
+    switch (*p_err) {                                            /* Chk err from NetUDP_RxPktDemuxDatagram().            */
+        case NET_APP_ERR_NONE:
+        case NET_SOCK_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.UDP.RxDgramCompCtr);
+            *p_err = NET_UDP_ERR_NONE;
+             break;
+
+
+        case NET_ERR_RX:
+                                                                /* See Note #4.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxPktDiscardedCtr);
+                                                                /* Rtn err from NetUDP_RxPktDemuxDatagram().            */
+             return;
+
+
+        case NET_ERR_RX_DEST:
+             NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxDestCtr);
+
+             if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_ICMPv4_MODULE_EN
+                 NetICMPv4_TxMsgErr(p_buf,                             /* Tx ICMP port unreach (see Note #5).                  */
+                                    NET_ICMPv4_MSG_TYPE_DEST_UNREACH,
+                                    NET_ICMPv4_MSG_CODE_DEST_PORT,
+                                    NET_ICMPv4_MSG_PTR_NONE,
+                                   &msg_err);
+#endif
+             } else {
+#ifdef  NET_ICMPv6_MODULE_EN
+                NetICMPv6_TxMsgErr(p_buf,
+                                   NET_ICMPv6_MSG_TYPE_DEST_UNREACH,
+                                   NET_ICMPv6_MSG_CODE_DEST_PORT_UNREACHABLE,
+                                   NET_ICMPv6_MSG_PTR_NONE,
+                                  &msg_err);
+#endif
+             }
+             (void)msg_err;
+
+             NetUDP_RxPktDiscard(p_buf, p_err);
+             return;
+
+
+        case NET_INIT_ERR_NOT_COMPLETED:
+        default:
+             NetUDP_RxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetUDP_RxAppData()
+*
+* Description : (1) Deframe application data from received UDP packet buffer(s) :
+*
+*                   (a) Validate receive packet buffer(s)
+*                   (b) Validate receive data buffer                                        See Note #4
+*                   (c) Validate receive flags                                              See Note #5
+*                   (d) Get any received IP options                                         See Note #6
+*                   (e) Deframe application data from UDP packet buffer(s)
+*                   (f) Free UDP packet buffer(s)
+*
+*
+* Argument(s) : p_buf                Pointer to network buffer that received UDP datagram.
+*
+*               pdata_buf           Pointer to application buffer to receive application data.
+*
+*               data_buf_len        Size    of application receive buffer (in octets) [see Note #4].
+*
+*               flags               Flags to select receive options (see Note #5); bit-field flags logically OR'd :
+*
+*                                       NET_UDP_FLAG_NONE               No      UDP receive flags selected.
+*                                       NET_UDP_FLAG_RX_DATA_PEEK       Receive UDP application data without consuming
+*                                                                           the data; i.e. do NOT free any UDP receive
+*                                                                           packet buffer(s).
+*
+*               pip_opts_buf        Pointer to buffer to receive possible IP options (see Note #6a), if NO error(s).
+*
+*               ip_opts_buf_len     Size of IP options receive buffer (in octets)    [see Note #6b].
+*
+*               pip_opts_len        Pointer to variable that will receive the return size of any received IP options,
+*                                       if NO error(s).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UDP_ERR_NONE                UDP application data successfully deframed; check
+*                                                                   return value for number of data octets received.
+*                               NET_UDP_ERR_INVALID_DATA_SIZE   UDP data receive buffer insufficient size; some,
+*                                                                   but not all, UDP application data deframed
+*                                                                   into receive buffer (see Note #4b).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_ERR_FAULT_NULL_PTR            Argument 'p_buf'/'pdata_buf' passed a NULL pointer.
+*                               NET_UDP_ERR_INVALID_FLAG        Invalid UDP flags.
+*                               NET_UDP_ERR_INVALID_ARG         Invalid argument(s).
+*
+*                                                               ------- RETURNED BY NetUDP_RxPktDiscard() : --------
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : Total application data octets deframed into receive buffer, if NO error(s).
+*
+*               0,                                                          otherwise.
+*
+* Caller(s)   : NetUDP_RxAppDataHandler(),
+*               NetSock_RxDataHandlerDatagram().
+*
+*               This function is a network protocol suite application programming interface (API) function & MAY
+*               be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetUDP_RxAppData() MUST be called with the global network lock already acquired.
+*
+*                   See also 'NetUDP_RxPktDemuxAppData()  Note #1a1A1b'.
+*
+*               (3) NetUDP_RxAppData() blocked until network initialization completes.
+*
+*               (4) (a) Application data receive buffer should be large enough to receive either ...
+*
+*                       (1) The maximum UDP datagram size (i.e. 65,507 octets)
+*                             OR
+*                       (2) The application's expected maximum UDP datagram size
+*
+*                   (b) If the application receive buffer size is NOT large enough for the received UDP datagram,
+*                       the remaining application data octets are discarded & NET_UDP_ERR_INVALID_DATA_SIZE error
+*                       is returned.
+*
+*               (5) If UDP receive flag options that are NOT implemented are requested, NetUDP_RxAppData() aborts
+*                   & returns appropriate error codes so that requested flag options are NOT silently ignored.
+*
+*               (6) (a) If ...
+*
+*                       (1) NO IP options were received with the UDP datagram
+*                             OR
+*                       (2) NO IP options receive buffer is provided by the application
+*                             OR
+*                       (3) IP options receive buffer NOT large enough for the received IP options
+*
+*                       ... then NO IP options are returned & any received IP options are silently discarded.
+*
+*                   (b) The IP options receive buffer size SHOULD be large enough to receive the maximum
+*                       IP options size, NET_IP_HDR_OPT_SIZE_MAX.
+*
+*                   (c) IP options are received from the first packet buffer.  In other words, if multiple
+*                       packet buffers are received for a fragmented datagram, IP options are received from
+*                       the first fragment of the datagram.
+*
+*                   (d) (1) (A) RFC #1122, Section 3.2.1.8 states that "all IP options ... received in
+*                               datagrams MUST be passed to the transport layer ... [which] MUST ... interpret
+*                               those IP options that they understand and silently ignore the others".
+*
+*                           (B) RFC #1122, Section 4.1.3.2 adds that "UDP MUST pass any IP option that it
+*                               receives from the IP layer transparently to the application layer".
+*
+*                       (2) Received IP options should be provided/decoded via appropriate IP layer API. #### NET-811
+*
+*               (7) Pointers to variables that return values MUST be initialized PRIOR to all other
+*                   validation or function handling in case of any error(s).
+*
+*               (8) Since pointer arithmetic is based on the specific pointer data type & inherent pointer
+*                   data type size, pointer arithmetic operands :
+*
+*                   (a) MUST be in terms of the specific pointer data type & data type size; ...
+*                   (b) SHOULD NOT & in some cases MUST NOT be cast to other data types or data type sizes.
+*
+*               (9) (a) On any internal receive     errors, UDP receive packets are     discarded.
+*
+*                   (b) On any external application errors, UDP receive packets are NOT discarded;
+*                       the application MAY continue to attempt to receive the application data
+*                       via NetUDP_RxAppData().
+*
+*              (10) IP options arguments may NOT be necessary.
+*********************************************************************************************************
+*/
+
+CPU_INT16U  NetUDP_RxAppData (NET_BUF        *p_buf,
+                              void           *pdata_buf,
+                              CPU_INT16U      data_buf_len,
+                              NET_UDP_FLAGS   flags,
+                              void           *pip_opts_buf,
+                              CPU_INT08U      ip_opts_buf_len,
+                              CPU_INT08U     *pip_opts_len,
+                              NET_ERR        *p_err)
+{
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    CPU_INT08U     *pip_opts_len_init;
+    NET_UDP_FLAGS   flag_mask;
+    CPU_BOOLEAN     used;
+#endif
+#ifdef  NET_IPv4_MODULE_EN
+    CPU_INT08U     *pip_opts;
+    CPU_INT08U      ip_opts_len;
+    CPU_INT08U      ip_opts_len_unused;
+#endif
+    CPU_BOOLEAN     peek;
+    NET_BUF        *p_buf_head;
+    NET_BUF        *p_buf_next;
+    NET_BUF_HDR    *p_buf_head_hdr;
+    NET_BUF_HDR    *p_buf_hdr;
+    NET_BUF_SIZE    data_len_pkt;
+    CPU_INT16U      data_len_buf_rem;
+    CPU_INT16U      data_len_tot;
+    CPU_INT08U     *p_data;
+
+    NET_ERR         err;
+    NET_ERR         err_rtn;
+
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((CPU_INT16U)0);
+    }
+
+    pip_opts_len_init =  (CPU_INT08U *) pip_opts_len;
+#endif
+#ifdef  NET_IPv4_MODULE_EN
+    if (pip_opts_len ==  (CPU_INT08U *) 0) {                    /* If NOT avail, ...                                    */
+        pip_opts_len  =  (CPU_INT08U *)&ip_opts_len_unused;     /* ... re-cfg NULL rtn ptr to unused local var.         */
+       (void)&ip_opts_len_unused;                               /* Prevent possible 'variable unused' warning.          */
+    }
+   *pip_opts_len = 0u;                                          /* Init len for err (see Note #7).                      */
+#endif
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit rx (see Notes #3 & #9b).  */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        return (0u);
+    }
+
+                                                                /* --------------- VALIDATE RX PKT BUFS --------------- */
+    if (p_buf == (NET_BUF *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;                           /* See Note #9b.                                        */
+        return (0u);
+    }
+
+    used = NetBuf_IsUsed(p_buf);
+    if (used != DEF_YES) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxPktDiscardedCtr);
+       *p_err =  NET_ERR_RX;                                     /* See Note #9b.                                        */
+        return (0u);
+    }
+
+                                                                /* --------------- VALIDATE RX DATA BUF --------------- */
+    if (pdata_buf == (CPU_INT08U *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;                           /* See Note #9b.                                        */
+        return (0u);
+    }
+    if (data_buf_len < 1) {
+       *p_err =  NET_UDP_ERR_INVALID_DATA_SIZE;                  /* See Note #9b.                                        */
+        return (0u);
+    }
+
+                                                                /* ---------------- VALIDATE RX FLAGS ----------------- */
+    flag_mask = NET_UDP_FLAG_NONE        |
+                NET_UDP_FLAG_RX_DATA_PEEK;
+                                                                /* If any invalid flags req'd, rtn err (see Note #5).   */
+    if ((flags & (NET_UDP_FLAGS)~flag_mask) != NET_UDP_FLAG_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.InvalidFlagsCtr);
+       *p_err =  NET_UDP_ERR_INVALID_FLAG;                       /* See Note #9b.                                        */
+        return (0u);
+    }
+
+                                                                /* --------------- VALIDATE RX IP OPTS ---------------- */
+    if (((pip_opts_buf      != (void       *)0)  &&             /* If (IP opts buf         avail BUT ..                 */
+         (pip_opts_len_init == (CPU_INT08U *)0)) ||             /* ..  IP opts buf len NOT avail) OR ..                 */
+        ((pip_opts_buf      == (void       *)0)  &&             /* .. (IP opts buf     NOT avail BUT ..                 */
+         (pip_opts_len_init != (CPU_INT08U *)0))) {             /* ..  IP opts buf len     avail),   ..                 */
+         *p_err =  NET_UDP_ERR_INVALID_ARG;                      /* ..  rtn err.                                         */
+          return (0u);
+    }
+#endif
+
+
+                                                                /* ----------------- GET RX'D IP OPTS ----------------- */
+                                                                /* See Note #6.                                         */
+    p_buf_hdr = &p_buf->Hdr;
+#ifdef  NET_IPv4_MODULE_EN
+    if (p_buf_hdr->IP_OptPtr != (NET_BUF *)0) {                  /* If IP opts rx'd,                 & ...               */
+        if (pip_opts_buf    != (void    *)0) {                  /* .. IP opts rx buf avail,         & ...               */
+            if (ip_opts_buf_len >= p_buf_hdr->IP_HdrLen) {       /* .. IP opts rx buf size sufficient, ...               */
+                pip_opts     = &p_buf->DataPtr[p_buf_hdr->IP_HdrIx];
+                ip_opts_len  = (CPU_INT08U)p_buf_hdr->IP_HdrLen;
+                Mem_Copy((void     *)pip_opts_buf,              /* .. copy IP opts into rx buf.                         */
+                         (void     *)pip_opts,
+                         (CPU_SIZE_T) ip_opts_len);
+
+               *pip_opts_len = ip_opts_len;
+            }
+        }
+    }
+#endif
+
+                                                                /* ------------- DEFRAME UDP APP RX DATA -------------- */
+    p_buf_head       =  p_buf;
+    p_buf_head_hdr   = &p_buf_head->Hdr;
+    p_data           = (CPU_INT08U *)pdata_buf;
+    data_len_buf_rem =  data_buf_len;
+    data_len_tot     =  0u;
+    err_rtn          =  NET_UDP_ERR_NONE;
+
+    while ((p_buf != (NET_BUF *)0) &&                            /* Copy app rx data from avail pkt buf(s).              */
+           (data_len_buf_rem > 0)) {
+
+        p_buf_hdr  = &p_buf->Hdr;
+        p_buf_next =  p_buf_hdr->NextBufPtr;
+
+        if (data_len_buf_rem >= p_buf_hdr->DataLen) {            /* If rem data buf len >= pkt buf data len, ...         */
+            data_len_pkt = (NET_BUF_SIZE)p_buf_hdr->DataLen;     /* ...      copy all      pkt buf data len.             */
+        } else {
+            data_len_pkt = (NET_BUF_SIZE)data_len_buf_rem;      /* Else lim copy to rem data buf len ...                */
+            err_rtn      =  NET_UDP_ERR_INVALID_DATA_SIZE;      /* ... & rtn data size err code (see Note #4b).         */
+        }
+
+        NetBuf_DataRd(p_buf,
+                      p_buf_hdr->DataIx,
+                      data_len_pkt,
+                      p_data,
+                     &err);
+        if (err != NET_BUF_ERR_NONE) {                          /* See Note #9a.                                        */
+            NetUDP_RxPktDiscard(p_buf_head, p_err);
+            return (0u);
+        }
+                                                                /* Update data ptr & lens.                              */
+        p_data           +=             data_len_pkt;           /* MUST NOT cast ptr operand (see Note #8b).            */
+        data_len_tot     += (CPU_INT16U)data_len_pkt;
+        data_len_buf_rem -= (CPU_INT16U)data_len_pkt;
+
+        p_buf              =  p_buf_next;
+    }
+
+
+                                                                /* ----------------- FREE UDP RX PKTS ----------------- */
+    peek = DEF_BIT_IS_SET(flags, NET_UDP_FLAG_RX_DATA_PEEK);
+    if (peek != DEF_YES) {                                      /* If peek opt NOT req'd, pkt buf(s) consumed : ...     */
+        p_buf_head_hdr->NextPrimListPtr = (NET_BUF *)0;          /* ... unlink from any other pkt bufs/chains    ...     */
+        NetUDP_RxPktFree(p_buf_head);                            /* ... & free pkt buf(s).                               */
+    }
+
+
+   *p_err =  err_rtn;
+
+    return (data_len_tot);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetUDP_TxAppData()
+*
+* Description : (1) Transmit data from Application layer(s) via UDP layer :
+*
+*                   (a) Acquire  network lock
+*                   (b) Transmit application data via UDP Transmit
+*                   (c) Release  network lock
+*
+*
+* Argument(s) : p_data      Pointer to application data.
+*
+*               data_len    Length  of application data (in octets) [see Note #5].
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      UDP port.
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination UDP port.
+*
+*               TOS         Specific TOS to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IP_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IP_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IP_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IP_TTL_NONE                 Replace with default TTL
+*
+*               flags_udp   Flags to select UDP transmit options (see Note #4); bit-field flags logically OR'd :
+*
+*                               NET_UDP_FLAG_NONE               No UDP  transmit flags selected.
+*                               NET_UDP_FLAG_TX_CHK_SUM_DIS     DISABLE transmit check-sums.
+*                               NET_UDP_FLAG_TX_BLOCK           Transmit UDP application data with blocking,
+*                                                                   if flag set; without blocking, if clear
+*                                                                   (see Note #4a).
+*
+*               flags_ip    Flags to select IP  transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IP_FLAG_NONE                No  IP transmit flags selected.
+*                               NET_IP_FLAG_TX_DONT_FRAG        Set IP 'Don't Frag' flag.
+*
+*               p_opts_ip    Pointer to one or more IP options configuration data structures
+*                               (see 'net_ip.h  IP HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IP_OPT_CFG_ROUTE_TS         Route &/or Internet Timestamp options configuration.
+*                               NET_IP_OPT_CFG_SECURITY         Security options configuration
+*                                                                   (see 'net_ip.c  Note #1e').
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               ---- RETURNED BY NetUDP_TxAppDataHandler() : -----
+*                               NET_UDP_ERR_NONE                Application data successfully prepared &
+*                                                                   transmitted via UDP layer.
+*
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                               NET_ERR_FAULT_NULL_PTR            Argument 'p_data'   passed a NULL pointer.
+*                               NET_UDP_ERR_INVALID_DATA_SIZE   Argument 'data_len' passed an invalid size
+*                                                                   (see Notes #5b & #5a2B).
+*                               NET_UDP_ERR_INVALID_LEN_DATA    Invalid protocol/data length.
+*                               NET_UDP_ERR_INVALID_ADDR_SRC    Argument 'src_addr' passed an invalid address.
+*                               NET_UDP_ERR_INVALID_PORT_NBR    Invalid UDP port number.
+*                               NET_UDP_ERR_INVALID_FLAG        Invalid UDP flag(s).
+*
+*                               NET_ERR_FAULT_NULL_PTR            Argument(s) passed a NULL pointer.
+*                               NET_BUF_ERR_NONE_AVAIL          NO available buffers to allocate.
+*                               NET_BUF_ERR_INVALID_SIZE        Requested size is greater then the maximum buffer
+*                                                                   size available.
+*                               NET_BUF_ERR_INVALID_LEN         Requested size & start index calculation overflows
+*                                                                   buffer's DATA area.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*
+*                               NET_ERR_TX                      Transmit error; packet(s) discarded.
+*
+*                                                               ----- RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Number of data octets transmitted, if NO error(s).
+*
+*               0,                                 otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetUDP_TxAppData() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetUDP_TxAppDataHandler()  Note #2'.
+*
+*               (3) NetUDP_TxAppData() blocked until network initialization completes.
+*
+*                   See      'NetUDP_TxAppDataHandler()  Note #3'.
+*
+*               (4) Some UDP transmit flag options NOT yet implemented :
+*
+*                   (a) NET_UDP_FLAG_TX_BLOCK
+*
+*                   See also 'NetUDP_TxPktValidate()  Note #2b'.
+*
+*               (5) (a) (1) Datagram transmission & reception MUST be atomic -- i.e. every single, complete
+*                           datagram transmitted SHOULD be received as a single, complete datagram.  Thus
+*                           each call to transmit data MUST be transmitted in a single, complete datagram.
+*
+*                       (2) (A) IEEE Std 1003.1, 2004 Edition, Section 'send() : DESCRIPTION' states that
+*                               "if the message is too long to pass through the underlying protocol, send()
+*                               shall fail and no data shall be transmitted".
+*
+*                           (B) Since IP transmit fragmentation is NOT currently supported (see 'net_ip.h
+*                               Note #1d'), if the requested datagram transmit data length is greater than
+*                               the UDP MTU, then NO data is transmitted & NET_UDP_ERR_INVALID_DATA_SIZE
+*                               error is returned.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+CPU_INT16U  NetUDP_TxAppDataIPv4 (void              *p_data,
+                                  CPU_INT16U         data_len,
+                                  NET_IPv4_ADDR      src_addr,
+                                  NET_UDP_PORT_NBR   src_port,
+                                  NET_IPv4_ADDR      dest_addr,
+                                  NET_UDP_PORT_NBR   dest_port,
+                                  NET_IPv4_TOS       TOS,
+                                  NET_IPv4_TTL       TTL,
+                                  NET_UDP_FLAGS      flags_udp,
+                                  NET_IPv4_FLAGS     flags_ip,
+                                  void              *p_opts_ip,
+                                  NET_ERR           *p_err)
+{
+    CPU_INT16U  data_len_tot;
+
+
+                                                                /* Acquire net lock (see Note #2b).                     */
+    Net_GlobalLockAcquire((void *)&NetUDP_TxAppDataIPv4, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+                                                                /* Tx UDP app data.                                     */
+    data_len_tot = NetUDP_TxAppDataHandlerIPv4(p_data,
+                                               data_len,
+                                               src_addr,
+                                               src_port,
+                                               dest_addr,
+                                               dest_port,
+                                               TOS,
+                                               TTL,
+                                               flags_udp,
+                                               flags_ip,
+                                               p_opts_ip,
+                                               p_err);
+
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (data_len_tot);
+
+exit_lock_fault:
+   return (0u);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        NetUDP_TxAppDataIPv6()
+*
+* Description : (1) Transmit data from Application layer(s) via UDP layer :
+*
+*                   (a) Acquire  network lock
+*                   (b) Transmit application data via UDP Transmit
+*                   (c) Release  network lock
+*
+*
+* Argument(s) : p_data      Pointer to application data.
+*
+*               data_len    Length  of application data (in octets) [see Note #5].
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      UDP port.
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination UDP port.
+*
+*               TOS         Specific TOS to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IP_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IP_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IP_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IP_TTL_NONE                 Replace with default TTL
+*
+*               flags_udp   Flags to select UDP transmit options (see Note #4); bit-field flags logically OR'd :
+*
+*                               NET_UDP_FLAG_NONE               No UDP  transmit flags selected.
+*                               NET_UDP_FLAG_TX_CHK_SUM_DIS     DISABLE transmit check-sums.
+*                               NET_UDP_FLAG_TX_BLOCK           Transmit UDP application data with blocking,
+*                                                                   if flag set; without blocking, if clear
+*                                                                   (see Note #4a).
+*
+*               flags_ip    Flags to select IP  transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IP_FLAG_NONE                No  IP transmit flags selected.
+*                               NET_IP_FLAG_TX_DONT_FRAG        Set IP 'Don't Frag' flag.
+*
+*               p_opts_ip    Pointer to one or more IP options configuration data structures
+*                               (see 'net_ip.h  IP HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IP_OPT_CFG_ROUTE_TS         Route &/or Internet Timestamp options configuration.
+*                               NET_IP_OPT_CFG_SECURITY         Security options configuration
+*                                                                   (see 'net_ip.c  Note #1e').
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                                                               ---- RETURNED BY NetUDP_TxAppDataHandler() : -----
+*                               NET_UDP_ERR_NONE                Application data successfully prepared &
+*                                                                   transmitted via UDP layer.
+*
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                               NET_ERR_FAULT_NULL_PTR            Argument 'p_data'   passed a NULL pointer.
+*                               NET_UDP_ERR_INVALID_DATA_SIZE   Argument 'data_len' passed an invalid size
+*                                                                   (see Notes #5b & #5a2B).
+*                               NET_UDP_ERR_INVALID_LEN_DATA    Invalid protocol/data length.
+*                               NET_UDP_ERR_INVALID_ADDR_SRC    Argument 'src_addr' passed an invalid address.
+*                               NET_UDP_ERR_INVALID_PORT_NBR    Invalid UDP port number.
+*                               NET_UDP_ERR_INVALID_FLAG        Invalid UDP flag(s).
+*
+*                               NET_ERR_FAULT_NULL_PTR            Argument(s) passed a NULL pointer.
+*                               NET_BUF_ERR_NONE_AVAIL          NO available buffers to allocate.
+*                               NET_BUF_ERR_INVALID_SIZE        Requested size is greater then the maximum buffer
+*                                                                   size available.
+*                               NET_BUF_ERR_INVALID_LEN         Requested size & start index calculation overflows
+*                                                                   buffer's DATA area.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*
+*                               NET_ERR_TX                      Transmit error; packet(s) discarded.
+*
+*                                                               ----- RETURNED BY Net_GlobalLockAcquire() : -----
+*                               NET_ERR_FAULT_LOCK_ACQUIRE      Network access NOT acquired.
+*
+* Return(s)   : Number of data octets transmitted, if NO error(s).
+*
+*               0,                                 otherwise.
+*
+* Caller(s)   : Application.
+*
+*               This function is a network protocol suite application programming interface (API) function
+*               & MAY be called by application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetUDP_TxAppData() is called by application function(s) & ... :
+*
+*                   (a) MUST NOT be called with the global network lock already acquired; ...
+*                   (b) MUST block ALL other network protocol tasks by pending on & acquiring the global
+*                       network lock (see 'net.h  Note #3').
+*
+*                   This is required since an application's network protocol suite API function access
+*                   is asynchronous to other network protocol tasks.
+*
+*                   See also 'NetUDP_TxAppDataHandler()  Note #2'.
+*
+*               (3) NetUDP_TxAppData() blocked until network initialization completes.
+*
+*                   See      'NetUDP_TxAppDataHandler()  Note #3'.
+*
+*               (4) Some UDP transmit flag options NOT yet implemented :
+*
+*                   (a) NET_UDP_FLAG_TX_BLOCK
+*
+*                   See also 'NetUDP_TxPktValidate()  Note #2b'.
+*
+*               (5) (a) (1) Datagram transmission & reception MUST be atomic -- i.e. every single, complete
+*                           datagram transmitted SHOULD be received as a single, complete datagram.  Thus
+*                           each call to transmit data MUST be transmitted in a single, complete datagram.
+*
+*                       (2) (A) IEEE Std 1003.1, 2004 Edition, Section 'send() : DESCRIPTION' states that
+*                               "if the message is too long to pass through the underlying protocol, send()
+*                               shall fail and no data shall be transmitted".
+*
+*                           (B) Since IP transmit fragmentation is NOT currently supported (see 'net_ip.h
+*                               Note #1d'), if the requested datagram transmit data length is greater than
+*                               the UDP MTU, then NO data is transmitted & NET_UDP_ERR_INVALID_DATA_SIZE
+*                               error is returned.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+CPU_INT16U  NetUDP_TxAppDataIPv6 (void                    *p_data,
+                                  CPU_INT16U               data_len,
+                                  NET_IPv6_ADDR           *p_src_addr,
+                                  NET_UDP_PORT_NBR         src_port,
+                                  NET_IPv6_ADDR           *p_dest_addr,
+                                  NET_UDP_PORT_NBR         dest_port,
+                                  NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                  NET_IPv6_FLOW_LABEL      flow_label,
+                                  NET_IPv6_HOP_LIM         hop_lim,
+                                  NET_UDP_FLAGS            flags_udp,
+                                  NET_ERR                 *p_err)
+{
+    CPU_INT16U  data_len_tot;
+
+
+                                                                /* Acquire net lock (see Note #2b).                     */
+    Net_GlobalLockAcquire((void *)&NetUDP_TxAppDataIPv6, p_err);
+    if (*p_err != NET_ERR_NONE) {
+         goto exit_lock_fault;
+    }
+                                                                /* Tx UDP app data.                                     */
+    data_len_tot = NetUDP_TxAppDataHandlerIPv6(p_data,
+                                               data_len,
+                                               p_src_addr,
+                                               src_port,
+                                               p_dest_addr,
+                                               dest_port,
+                                               traffic_class,
+                                               flow_label,
+                                               hop_lim,
+                                               flags_udp,
+                                               p_err);
+
+    Net_GlobalLockRelease();                                    /* Release net lock.                                    */
+
+    return (data_len_tot);
+
+exit_lock_fault:
+    return (0u);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetUDP_TxAppDataHandlerIPv4()
+*
+* Description : (1) Prepare & transmit data from Application layer(s) via UDP layer :
+*
+*                   (a) Validate application data
+*                   (b) Transmit application data via UDP Transmit :
+*                       (1) Calculate/validate application data buffer size
+*                       (2) Get buffer(s) for application data
+*                       (3) Copy application data into UDP packet buffer(s)
+*                       (4) Initialize UDP packet buffer controls
+*                       (5) Free UDP packet buffer(s)
+*
+*
+* Argument(s) : p_data      Pointer to application data.
+*
+*               data_len    Length  of application data (in octets) [see Note #5].
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      UDP port.
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination UDP port.
+*
+*               TOS         Specific TOS to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IP_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IP_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IP_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IP_TTL_NONE                 Replace with default TTL
+*
+*               flags_udp   Flags to select UDP transmit options (see Note #4); bit-field flags logically OR'd :
+*
+*                               NET_UDP_FLAG_NONE               No UDP  transmit flags selected.
+*                               NET_UDP_FLAG_TX_CHK_SUM_DIS     DISABLE transmit check-sums.
+*                               NET_UDP_FLAG_TX_BLOCK           Transmit UDP application data with blocking,
+*                                                                   if flag set; without blocking, if clear
+*                                                                   (see Note #4a).
+*
+*               flags_ip    Flags to select IP  transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IP_FLAG_NONE                No  IP transmit flags selected.
+*                               NET_IP_FLAG_TX_DONT_FRAG        Set IP 'Don't Frag' flag.
+*
+*               p_opts_ip    Pointer to one or more IP options configuration data structures
+*                               (see 'net_ip.h  IP HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IP_OPT_CFG_ROUTE_TS         Route &/or Internet Timestamp options configuration.
+*                               NET_IP_OPT_CFG_SECURITY         Security options configuration
+*                                                                   (see 'net_ip.c  Note #1e').
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UDP_ERR_NONE                Application data successfully prepared &
+*                                                                   transmitted via UDP layer.
+*                               NET_ERR_FAULT_NULL_PTR            Argument 'p_data'   passed a NULL pointer.
+*                               NET_UDP_ERR_INVALID_DATA_SIZE   Argument 'data_len' passed an invalid size
+*                                                                   (see Notes #5b & #5a2B).
+*                               NET_UDP_ERR_INVALID_ADDR_SRC    Argument 'src_addr' passed an invalid address.
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               ----- RETURNED BY NetIF_MTU_GetProtocol() : ------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               ----------- RETURNED BY NetBuf_Get() : -----------
+*                               NET_BUF_ERR_NONE_AVAIL          NO available buffers to allocate.
+*                               NET_BUF_ERR_INVALID_SIZE        Requested size is greater then the maximum buffer
+*                                                                   size available.
+*                               NET_BUF_ERR_INVALID_LEN         Requested size & start index calculation overflows
+*                                                                   buffer's DATA area.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                                                               --------- RETURNED BY NetBuf_DataWr() : ----------
+*                               NET_ERR_FAULT_NULL_PTR            Argument(s) passed a NULL pointer.
+*
+*                                                               ----------- RETURNED BY NetUDP_Tx() : ------------
+*                               NET_ERR_TX                      Transmit error; packet(s) discarded.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_UDP_ERR_INVALID_LEN_DATA    Invalid protocol/data length.
+*                               NET_UDP_ERR_INVALID_PORT_NBR    Invalid UDP port number.
+*                               NET_UDP_ERR_INVALID_FLAG        Invalid UDP flag(s).
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : Number of data octets transmitted, if NO error(s).
+*
+*               0,                                 otherwise.
+*
+* Caller(s)   : NetUDP_TxAppData(),
+*               NetSock_TxDataHandlerDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetUDP_TxAppDataHandler() is called by network protocol suite function(s) & MUST
+*                   be called with the global network lock already acquired.
+*
+*                   See also 'NetUDP_TxAppData()  Note #2'.
+*
+*               (3) NetUDP_TxAppDataHandler() blocked until network initialization completes.
+*
+*               (4) Some UDP transmit flag options NOT yet implemented :
+*
+*                   (a) NET_UDP_FLAG_TX_BLOCK
+*
+*                   See also 'NetUDP_TxPktValidate()  Note #2b'.
+*
+*               (5) (a) (1) Datagram transmission & reception MUST be atomic -- i.e. every single, complete
+*                           datagram transmitted SHOULD be received as a single, complete datagram.  Thus,
+*                           each call to transmit data MUST be transmitted in a single, complete datagram.
+*
+*                       (2) (A) IEEE Std 1003.1, 2004 Edition, Section 'send() : DESCRIPTION' states that
+*                               "if the message is too long to pass through the underlying protocol, send()
+*                               shall fail and no data shall be transmitted".
+*
+*                           (B) Since IP transmit fragmentation is NOT currently supported (see 'net_ip.h
+*                               Note #1d'), if the requested datagram transmit data length is greater than
+*                               the UDP MTU, then NO data is transmitted & NET_UDP_ERR_INVALID_DATA_SIZE
+*                               error is returned.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*
+*               (6) On ANY transmit error, any remaining application data transmit is immediately aborted.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+CPU_INT16U  NetUDP_TxAppDataHandlerIPv4 (void               *p_data,
+                                         CPU_INT16U          data_len,
+                                         NET_IPv4_ADDR       src_addr,
+                                         NET_UDP_PORT_NBR    src_port,
+                                         NET_IPv4_ADDR       dest_addr,
+                                         NET_UDP_PORT_NBR    dest_port,
+                                         NET_IPv4_TOS        TOS,
+                                         NET_IPv4_TTL        TTL,
+                                         NET_UDP_FLAGS       flags_udp,
+                                         NET_IPv4_FLAGS      flags_ip,
+                                         void               *p_opts_ip,
+                                         NET_ERR            *p_err)
+{
+    NET_BUF        *p_buf;
+    NET_BUF_HDR    *p_buf_hdr;
+    NET_IF_NBR      if_nbr;
+    NET_MTU         udp_mtu;
+    NET_BUF_SIZE    buf_size_max;
+    NET_BUF_SIZE    buf_size_max_data;
+    NET_BUF_SIZE    data_ix_pkt;
+    NET_BUF_SIZE    data_ix_pkt_offset;
+    NET_BUF_SIZE    data_len_pkt;
+    CPU_INT16U      data_len_tot;
+    CPU_INT08U     *p_data_pkt;
+    NET_ERR         err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((CPU_INT16U)0);
+    }
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit tx (see Note #3).         */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        return (0u);
+    }
+#endif
+
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+                                                                /* ---------------- VALIDATE APP DATA ----------------- */
+    if (p_data == (void *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+    if (data_len <= NET_UDP_DATA_LEN_MIN) {                     /* Validate data len (see Note #5b).                    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxInvalidSizeCtr);
+       *p_err =  NET_UDP_ERR_INVALID_DATA_SIZE;
+        return (0u);
+    }
+#endif
+
+
+
+    if_nbr = NetIPv4_GetAddrHostIF_Nbr(src_addr);               /* Get IF nbr of src addr.                              */
+    if (if_nbr == NET_IF_NBR_NONE) {
+        NetUDP_TxPktDiscard(DEF_NULL,
+                           &err);
+    *p_err =  NET_UDP_ERR_INVALID_ADDR_SRC;
+        return (0u);
+    }
+                                                                /* Get IF's UDP MTU.                                    */
+    udp_mtu = NetIF_MTU_GetProtocol(if_nbr,
+                                    NET_PROTOCOL_TYPE_UDP_V4,
+                                    NET_IF_FLAG_NONE,
+                                    p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+        NetUDP_TxPktDiscard((NET_BUF *) 0,
+                            (NET_ERR *)&err);
+        return (0u);
+    }
+
+                                                                /* ------------------- TX APP DATA -------------------- */
+                                                                /* Calc buf max data size.                              */
+#if 0
+    data_ix_pkt  = NET_BUF_DATA_IX_TX;
+#else
+    data_ix_pkt = 0u;
+    NetUDP_GetTxDataIx(if_nbr,
+                       NET_PROTOCOL_TYPE_UDP_V4,
+                       data_len,
+                       flags_udp,
+                      &data_ix_pkt,
+                      &err);
+#endif
+
+
+    buf_size_max = NetBuf_GetMaxSize(if_nbr,
+                                     NET_TRANSACTION_TX,
+                                     DEF_NULL,
+                                     data_ix_pkt);
+
+    buf_size_max_data = (NET_BUF_SIZE)DEF_MIN(buf_size_max, udp_mtu);
+
+    if (data_len > buf_size_max_data) {                         /* If data len > max data size, abort tx ...            */
+       *p_err = NET_UDP_ERR_INVALID_DATA_SIZE;                  /* ... & rtn size err (see Note #5a2B).                 */
+        return (0u);
+
+    } else {                                                    /* Else lim pkt data len to data len.                   */
+        data_len_pkt = (NET_BUF_SIZE)data_len;
+    }
+
+    data_len_tot =  0u;
+    p_data_pkt   = (CPU_INT08U *)p_data;
+                                                                /* Get app data tx buf.                                 */
+    p_buf = NetBuf_Get(if_nbr,
+                       NET_TRANSACTION_TX,
+                       data_len_pkt,
+                       data_ix_pkt,
+                       &data_ix_pkt_offset,
+                       NET_BUF_FLAG_NONE,
+                       p_err);
+    if (*p_err != NET_BUF_ERR_NONE) {
+         NetUDP_TxPktDiscard(p_buf, &err);
+         return (data_len_tot);
+    }
+
+    data_ix_pkt += data_ix_pkt_offset;
+    NetBuf_DataWr(p_buf,                           /* Wr app data into app data tx buf.                    */
+                  data_ix_pkt,
+                  data_len_pkt,
+                  p_data_pkt,
+                  p_err);
+    if (*p_err != NET_BUF_ERR_NONE) {
+         NetUDP_TxPktDiscard(p_buf, &err);
+         return (data_len_tot);
+    }
+
+                                                                /* Init app data tx buf ctrls.                          */
+    p_buf_hdr                  = &p_buf->Hdr;
+    p_buf_hdr->DataIx          =  data_ix_pkt;
+    p_buf_hdr->DataLen         =  data_len_pkt;
+    p_buf_hdr->TotLen          =  p_buf_hdr->DataLen;
+    p_buf_hdr->ProtocolHdrType =  NET_PROTOCOL_TYPE_UDP_V4;
+
+
+    NetUDP_TxIPv4(p_buf,                                        /* Tx app data buf via UDP tx.                          */
+                  src_addr,
+                  src_port,
+                  dest_addr,
+                  dest_port,
+                  TOS,
+                  TTL,
+                  flags_udp,
+                  flags_ip,
+                  p_opts_ip,
+                  p_err);
+    if (*p_err != NET_UDP_ERR_NONE) {
+         return (data_len_tot);
+    }
+
+    NetUDP_TxPktFree(p_buf);                                    /* Free app data tx buf.                                */
+
+
+    data_len_tot += data_len_pkt;                               /* Calc tot app data len tx'd.                          */
+
+   *p_err = NET_UDP_ERR_NONE;
+
+    return (data_len_tot);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     NetUDP_TxAppDataHandlerIPv6()
+*
+* Description : (1) Prepare & transmit data from Application layer(s) via UDP layer :
+*
+*                   (a) Validate application data
+*                   (b) Transmit application data via UDP Transmit :
+*                       (1) Calculate/validate application data buffer size
+*                       (2) Get buffer(s) for application data
+*                       (3) Copy application data into UDP packet buffer(s)
+*                       (4) Initialize UDP packet buffer controls
+*                       (5) Free UDP packet buffer(s)
+*
+*
+* Argument(s) : p_data      Pointer to application data.
+*
+*               data_len    Length  of application data (in octets) [see Note #5].
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      UDP port.
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination UDP port.
+*
+*               TOS         Specific TOS to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IP_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IP_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IP_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IP_TTL_NONE                 Replace with default TTL
+*
+*               flags_udp   Flags to select UDP transmit options (see Note #4); bit-field flags logically OR'd :
+*
+*                               NET_UDP_FLAG_NONE               No UDP  transmit flags selected.
+*                               NET_UDP_FLAG_TX_CHK_SUM_DIS     DISABLE transmit check-sums.
+*                               NET_UDP_FLAG_TX_BLOCK           Transmit UDP application data with blocking,
+*                                                                   if flag set; without blocking, if clear
+*                                                                   (see Note #4a).
+*
+*               flags_ip    Flags to select IP  transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IP_FLAG_NONE                No  IP transmit flags selected.
+*                               NET_IP_FLAG_TX_DONT_FRAG        Set IP 'Don't Frag' flag.
+*
+*               p_opts_ip    Pointer to one or more IP options configuration data structures
+*                               (see 'net_ip.h  IP HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IP_OPT_CFG_ROUTE_TS         Route &/or Internet Timestamp options configuration.
+*                               NET_IP_OPT_CFG_SECURITY         Security options configuration
+*                                                                   (see 'net_ip.c  Note #1e').
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UDP_ERR_NONE                Application data successfully prepared &
+*                                                                   transmitted via UDP layer.
+*                               NET_ERR_FAULT_NULL_PTR            Argument 'p_data'   passed a NULL pointer.
+*                               NET_UDP_ERR_INVALID_DATA_SIZE   Argument 'data_len' passed an invalid size
+*                                                                   (see Notes #5b & #5a2B).
+*                               NET_UDP_ERR_INVALID_ADDR_SRC    Argument 'src_addr' passed an invalid address.
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+*                                                               ----- RETURNED BY NetIF_MTU_GetProtocol() : ------
+*                               NET_IF_ERR_INVALID_IF           Invalid network interface number.
+*                               NET_IF_ERR_INVALID_CFG          Invalid/NULL API configuration.
+*                               NET_ERR_FAULT_NULL_FNCT            Invalid NULL function pointer.
+*
+*                                                               ----------- RETURNED BY NetBuf_Get() : -----------
+*                               NET_BUF_ERR_NONE_AVAIL          NO available buffers to allocate.
+*                               NET_BUF_ERR_INVALID_SIZE        Requested size is greater then the maximum buffer
+*                                                                   size available.
+*                               NET_BUF_ERR_INVALID_LEN         Requested size & start index calculation overflows
+*                                                                   buffer's DATA area.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*                               NET_ERR_INVALID_TRANSACTION     Invalid transaction type.
+*
+*                                                               --------- RETURNED BY NetBuf_DataWr() : ----------
+*                               NET_ERR_FAULT_NULL_PTR            Argument(s) passed a NULL pointer.
+*
+*                                                               ----------- RETURNED BY NetUDP_Tx() : ------------
+*                               NET_ERR_TX                      Transmit error; packet(s) discarded.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_UDP_ERR_INVALID_LEN_DATA    Invalid protocol/data length.
+*                               NET_UDP_ERR_INVALID_PORT_NBR    Invalid UDP port number.
+*                               NET_UDP_ERR_INVALID_FLAG        Invalid UDP flag(s).
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : Number of data octets transmitted, if NO error(s).
+*
+*               0,                                 otherwise.
+*
+* Caller(s)   : NetUDP_TxAppData(),
+*               NetSock_TxDataHandlerDatagram().
+*
+*               This function is an INTERNAL network protocol suite function & MUST NOT be called by
+*               application function(s) [see also Note #2].
+*
+* Note(s)     : (2) NetUDP_TxAppDataHandler() is called by network protocol suite function(s) & MUST
+*                   be called with the global network lock already acquired.
+*
+*                   See also 'NetUDP_TxAppData()  Note #2'.
+*
+*               (3) NetUDP_TxAppDataHandler() blocked until network initialization completes.
+*
+*               (4) Some UDP transmit flag options NOT yet implemented :
+*
+*                   (a) NET_UDP_FLAG_TX_BLOCK
+*
+*                   See also 'NetUDP_TxPktValidate()  Note #2b'.
+*
+*               (5) (a) (1) Datagram transmission & reception MUST be atomic -- i.e. every single, complete
+*                           datagram transmitted SHOULD be received as a single, complete datagram.  Thus,
+*                           each call to transmit data MUST be transmitted in a single, complete datagram.
+*
+*                       (2) (A) IEEE Std 1003.1, 2004 Edition, Section 'send() : DESCRIPTION' states that
+*                               "if the message is too long to pass through the underlying protocol, send()
+*                               shall fail and no data shall be transmitted".
+*
+*                           (B) Since IP transmit fragmentation is NOT currently supported (see 'net_ip.h
+*                               Note #1d'), if the requested datagram transmit data length is greater than
+*                               the UDP MTU, then NO data is transmitted & NET_UDP_ERR_INVALID_DATA_SIZE
+*                               error is returned.
+*
+*                   (b) 'data_len' of 0 octets NOT allowed.
+*
+*               (6) On ANY transmit error, any remaining application data transmit is immediately aborted.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+CPU_INT16U  NetUDP_TxAppDataHandlerIPv6(void                    *p_data,
+                                        CPU_INT16U               data_len,
+                                        NET_IPv6_ADDR           *p_src_addr,
+                                        NET_UDP_PORT_NBR         src_port,
+                                        NET_IPv6_ADDR           *p_dest_addr,
+                                        NET_UDP_PORT_NBR         dest_port,
+                                        NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                        NET_IPv6_FLOW_LABEL      flow_label,
+                                        NET_IPv6_HOP_LIM         hop_lim,
+                                        NET_UDP_FLAGS            flags_udp,
+                                        NET_ERR                 *p_err)
+{
+    NET_BUF        *p_buf;
+    NET_BUF_HDR    *p_buf_hdr;
+    NET_IF_NBR      if_nbr;
+    NET_MTU         udp_mtu;
+    NET_BUF_SIZE    buf_size_max;
+    NET_BUF_SIZE    buf_size_max_data;
+    NET_BUF_SIZE    data_ix_pkt;
+    NET_BUF_SIZE    data_ix_pkt_offset;
+    NET_BUF_SIZE    data_len_pkt;
+    CPU_INT16U      data_len_tot;
+    CPU_INT08U     *p_data_pkt;
+    NET_ERR         err;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* --------------- VALIDATE RTN ERR PTR --------------- */
+    if (p_err == (NET_ERR *)0) {
+        CPU_SW_EXCEPTION((CPU_INT16U)0);
+    }
+
+    if (Net_InitDone != DEF_YES) {                              /* If init NOT complete, exit tx (see Note #3).         */
+       *p_err =  NET_INIT_ERR_NOT_COMPLETED;
+        return (0u);
+    }
+#endif
+
+
+#if ((NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED) || \
+     (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED))
+                                                                /* ---------------- VALIDATE APP DATA ----------------- */
+    if (p_data == (void *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+    if (data_len < 1) {                                         /* Validate data len (see Note #5b).                    */
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxInvalidSizeCtr);
+       *p_err =  NET_UDP_ERR_INVALID_DATA_SIZE;
+        return (0u);
+    }
+#endif
+
+
+
+    if_nbr = NetIPv6_GetAddrHostIF_Nbr(p_src_addr);             /* Get IF nbr of src addr.                              */
+    if (if_nbr == NET_IF_NBR_NONE) {
+        NetUDP_TxPktDiscard((NET_BUF *) 0,
+                            (NET_ERR *)&err);
+       *p_err =  NET_UDP_ERR_INVALID_ADDR_SRC;
+        return (0u);
+    }
+                                                                /* Get IF's UDP MTU.                                    */
+    udp_mtu = NetIF_MTU_GetProtocol(if_nbr, NET_PROTOCOL_TYPE_UDP_V6, NET_IF_FLAG_NONE, p_err);
+    if (*p_err != NET_IF_ERR_NONE) {
+        NetUDP_TxPktDiscard((NET_BUF *) 0,
+                            (NET_ERR *)&err);
+        return (0u);
+    }
+
+                                                                /* ------------------- TX APP DATA -------------------- */
+                                                                /* Calc buf max data size.                              */
+#if 0
+    data_ix_pkt  = NET_BUF_DATA_IX_TX;
+#else
+    data_ix_pkt = 0u;
+    NetUDP_GetTxDataIx(if_nbr, NET_PROTOCOL_TYPE_UDP_V6, data_len, flags_udp, &data_ix_pkt, &err);
+#endif
+    buf_size_max = NetBuf_GetMaxSize((NET_IF_NBR     )if_nbr,
+                                     (NET_TRANSACTION)NET_TRANSACTION_TX,
+                                     (NET_BUF       *)0,
+                                     (NET_BUF_SIZE   )data_ix_pkt);
+
+    buf_size_max_data = (NET_BUF_SIZE)DEF_MIN(buf_size_max, udp_mtu);
+
+    if (data_len > buf_size_max_data) {                         /* If data len > max data size, abort tx ...            */
+       *p_err =  NET_UDP_ERR_INVALID_DATA_SIZE;                  /* ... & rtn size err (see Note #5a2B).                 */
+        return (0u);
+
+    } else {                                                    /* Else lim pkt data len to data len.                   */
+        data_len_pkt = (NET_BUF_SIZE)data_len;
+    }
+
+    data_len_tot =  0u;
+    p_data_pkt   = (CPU_INT08U *)p_data;
+                                                                /* Get app data tx buf.                                 */
+    p_buf = NetBuf_Get((NET_IF_NBR     ) if_nbr,
+                      (NET_TRANSACTION) NET_TRANSACTION_TX,
+                      (NET_BUF_SIZE   ) data_len_pkt,
+                      (NET_BUF_SIZE   ) data_ix_pkt,
+                      (NET_BUF_SIZE  *)&data_ix_pkt_offset,
+                      (NET_BUF_FLAGS  ) NET_BUF_FLAG_NONE,
+                      (NET_ERR       *) p_err);
+    if (*p_err != NET_BUF_ERR_NONE) {
+         NetUDP_TxPktDiscard(p_buf, &err);
+         return (data_len_tot);
+    }
+
+    data_ix_pkt += data_ix_pkt_offset;
+    NetBuf_DataWr((NET_BUF    *)p_buf,                           /* Wr app data into app data tx buf.                    */
+                  (NET_BUF_SIZE)data_ix_pkt,
+                  (NET_BUF_SIZE)data_len_pkt,
+                  (CPU_INT08U *)p_data_pkt,
+                  (NET_ERR    *)p_err);
+    if (*p_err != NET_BUF_ERR_NONE) {
+         NetUDP_TxPktDiscard(p_buf, &err);
+         return (data_len_tot);
+    }
+
+                                                                /* Init app data tx buf ctrls.                          */
+    p_buf_hdr                  = &p_buf->Hdr;
+    p_buf_hdr->DataIx          = (CPU_INT16U  )data_ix_pkt;
+    p_buf_hdr->DataLen         = (NET_BUF_SIZE)data_len_pkt;
+    p_buf_hdr->TotLen          = (NET_BUF_SIZE)p_buf_hdr->DataLen;
+    p_buf_hdr->ProtocolHdrType =  NET_PROTOCOL_TYPE_UDP_V6;
+
+
+    DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);
+
+
+    NetUDP_TxIPv6(p_buf,                                             /* Tx app data buf via UDP tx.                          */
+                  p_src_addr,
+                  src_port,
+                  p_dest_addr,
+                  dest_port,
+                  traffic_class,
+                  flow_label,
+                  hop_lim,
+                  flags_udp,
+                  p_err);
+
+    if (*p_err != NET_UDP_ERR_NONE) {
+         return (data_len_tot);
+    }
+
+    NetUDP_TxPktFree(p_buf);                                     /* Free app data tx buf.                                */
+
+
+    data_len_tot += data_len_pkt;                               /* Calc tot app data len tx'd.                          */
+
+
+
+   *p_err =  NET_UDP_ERR_NONE;
+
+    return (data_len_tot);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NetUDP_RxPktValidateBuf()
+*
+* Description : Validate received buffer header as UDP protocol.
+*
+* Argument(s) : p_buf_hdr    Pointer to network buffer header that received UDP packet.
+*               --------    Argument validated in NetUDP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UDP_ERR_NONE                Received buffer's UDP header validated.
+*                               NET_ERR_INVALID_PROTOCOL        Buffer's protocol type is NOT UDP.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer  index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_Rx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetUDP_RxPktValidateBuf (NET_BUF_HDR  *p_buf_hdr,
+                                       NET_ERR      *p_err)
+{
+    NET_IF_NBR   if_nbr;
+    CPU_BOOLEAN  valid;
+    NET_ERR      err;
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_RX_LARGE:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+                                                                /* --------------- VALIDATE UDP BUF HDR --------------- */
+    if (!((p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_UDP_V4)  ||
+          (p_buf_hdr->ProtocolHdrType == NET_PROTOCOL_TYPE_UDP_V6))) {
+        if_nbr = p_buf_hdr->IF_Nbr;
+        valid  = NetIF_IsValidHandler(if_nbr, &err);
+        if (valid == DEF_YES) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxInvalidProtocolCtr);
+        }
+       *p_err = NET_ERR_INVALID_PROTOCOL;
+        return;
+    }
+
+    if (p_buf_hdr->TransportHdrIx == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxInvalidBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+   *p_err = NET_UDP_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetUDP_RxPktValidate()
+*
+* Description : (1) Validate received UDP packet :
+*
+*                   (a) Validate the received packet's following UDP header fields :
+*
+*                       (1) Source      Port
+*                       (2) Destination Port
+*                       (3) Datagram Length                                 See Note #3
+*                       (4) Check-Sum                                       See Note #4
+*
+*                   (b) Convert the following UDP header fields from network-order to host-order :
+*
+*                       (1) Source      Port                                See Notes #1bB1
+*                       (2) Destination Port                                See Notes #1bB2
+*                       (3) Datagram Length                                 See Notes #1bB3
+*                       (4) Check-Sum                                       See Note  #4d
+*
+*                           (A) These fields are NOT converted directly in the received packet buffer's
+*                               data area but are converted in local or network buffer variables ONLY.
+*
+*                           (B) The following UDP header fields are converted & stored in network buffer
+*                               variables :
+*
+*                               (1) Source      Port
+*                               (2) Destination Port
+*                               (3) Datagram Length
+*
+*                   (c) Update network buffer's protocol controls
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer that received UDP packet.
+*               ----        Argument checked   in NetUDP_Rx().
+*
+*               p_buf_hdr    Pointer to network buffer header.
+*               --------    Argument validated in NetUDP_Rx().
+*
+*               p_udp_hdr    Pointer to received packet's UDP header.
+*               --------    Argument validated in NetUDP_Rx()/NetUDP_RxPktValidateBuf().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UDP_ERR_NONE                Received packet validated.
+*                               NET_UDP_ERR_INVALID_PORT_NBR    Invalid UDP port number.
+*                               NET_UDP_ERR_INVALID_LEN         Invalid UDP datagram      length.
+*                               NET_UDP_ERR_INVALID_LEN_DATA    Invalid UDP datagram data length.
+*                               NET_UDP_ERR_INVALID_CHK_SUM     Invalid UDP check-sum.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_Rx().
+*
+* Note(s)     : (2) See 'net_udp.h  UDP HEADER' for UDP header format.
+*
+*               (3) In addition to validating that the UDP Datagram Length is greater than or equal to the
+*                   minimum UDP header length,     the UDP Datagram Length is compared to the remaining IP
+*                   Datagram Length which should be identical.
+*
+*               (4) (a) UDP header Check-Sum field MUST be validated BEFORE (or AFTER) any multi-octet words
+*                       are converted from network-order to host-order since "the sum of 16-bit integers can
+*                       be computed in either byte order" [RFC #1071, Section 2.(B)].
+*
+*                       In other words, the UDP Datagram Check-Sum CANNOT be validated AFTER SOME but NOT ALL
+*                       multi-octet words have been converted from network-order to host-order.
+*
+*                   (b) However, ALL received packets' multi-octet words are converted in local or network
+*                       buffer variables ONLY (see Note #1bA).  Therefore, UDP Datagram Check-Sum may be
+*                       validated at any point.
+*
+*                   (c) The UDP Datagram Check-Sum MUST be validated AFTER the datagram length field has been
+*                       validated so that the total UDP Datagram Length (in octets) will already be calculated
+*                       for the UDP Check-Sum calculation.
+*
+*                       For efficiency, the UDP Datagram Check-Sum is validated AFTER all other UDP header
+*                       fields have been validated.  Thus the iteration-intensive UDP Datagram Check-Sum is
+*                       calculated only after all other UDP header fields have been quickly validated.
+*
+*                   (d) (1) Before the UDP Datagram Check-Sum is validated, it is necessary to convert the
+*                           Check-Sum from network-order to host-order to verify whether the received UDP
+*                           datagram's Check-Sum is valid -- i.e. whether the UDP datagram was transmitted
+*                           with or without a computed Check-Sum (see RFC #768, Section 'Fields : Checksum').
+*
+*                       (2) Since the value that indicates no check-sum was computed for the received UDP
+*                           datagram is one's-complement positive zero -- all check-sum bits equal to zero,
+*                           a value that is endian-order independent -- it is NOT absolutely necessary to
+*                           convert the UDP Datagram Check-Sum from network-order to host-order.
+*
+*                           However, network data value macro's inherently convert data words from network
+*                           word order to CPU word order.
+*
+*                           See also 'net_util.h  NETWORK DATA VALUE MACRO'S  Note #1a1'.
+*
+*                       (3) (A) Any UDP datagram received with NO computed check-sum is flagged so that "an
+*                               application MAY optionally ... discard ... UDP datagrams without checksums"
+*                               (see RFC #1122, Section 4.1.3.4).
+*
+*                               Run-time API to handle/discard UDP datagrams without checksums NOT yet
+*                               implemented. #### NET-819
+*
+*                           (B) UDP buffer flag value to clear was previously initialized in NetBuf_Get() when
+*                               the buffer was allocated.  This buffer flag value does NOT need to be re-cleared
+*                               but is shown for completeness.
+*
+*                   (e) (1) In addition to the UDP datagram header & data, the UDP Check-Sum calculation
+*                           includes "a pseudo header of information from the IP header ... conceptually
+*                           prefixed to the UDP header [which] contains the source address, the destination
+*                           address, the protocol, and the UDP length" (see RFC #768, Section 'Fields :
+*                           Checksum').
+*
+*                       (2) Since network check-sum functions REQUIRE that 16-bit one's-complement check-
+*                           sum calculations be performed on headers & data arranged in network-order (see
+*                           'net_util.c  NetUtil_16BitOnesCplChkSumDataVerify()  Note #4'), UDP pseudo-header
+*                           values MUST be set or converted to network-order.
+*
+*                   (f) RFC #768, Section 'Fields : Checksum' specifies that "the data [is] padded with zero
+*                       octets at the end (if necessary) to make a multiple of two octets".
+*
+*                       See also 'net_util.c  NetUtil_16BitSumDataCalc()  Note #8'.
+*
+*               (5) (a) Since the minimum network buffer size MUST be configured such that the entire UDP
+*                       header MUST be received in a single packet (see 'net_buf.h  NETWORK BUFFER INDEX &
+*                       SIZE DEFINES  Note #1c'), after the UDP header size is decremented from the first
+*                       packet buffer's remaining number of data octets, any remaining octets MUST be user
+*                       &/or application data octets.
+*
+*                       (1) Note that the 'Data' index is updated regardless of a null-size data length.
+*
+*                   (b) If additional packet buffers exist, the remaining IP datagram 'Data' MUST be user
+*                       &/or application data.  Therefore, the 'Data' length does NOT need to be adjusted
+*                       but the 'Data' index MUST be updated.
+*
+*                   (c) #### Total UDP Datagram Length & Data Length is duplicated in ALL fragmented packet
+*                       buffers (may NOT be necessary; remove if unnecessary).
+*
+*               (6) RFC #1122, Sections 3.2.1 & 3.2.2 require that IP & ICMP packets with certain invalid
+*                   header fields be "silently discarded".  However, NO RFC specifies how UDP should handle
+*                   received datagrams with invalid header fields.
+*
+*                   In addition, UDP is a "transaction oriented" protocol that does NOT guarantee "delivery
+*                   and duplicate protection" of UDP datagrams (see RFC #768, Section 'Introduction').
+*
+*                   Therefore, it is assumed that ALL UDP datagrams with ANY invalid header fields SHOULD
+*                   be silently discarded.
+*
+*               (7) (a) RFC #1122, Section 3.2.1.8 states that "all IP options ... received in datagrams
+*                       MUST be passed to the transport layer ... [which] MUST ... interpret those IP
+*                       options that they understand and silently ignore the others".
+*
+*                   (b) RFC #1122, Section 4.1.3.2 adds that "UDP MUST pass any IP option that it receives
+*                       from the IP layer transparently to the application layer".
+*
+*                   See also 'NetUDP_RxAppData()  Note #6d'.
+*********************************************************************************************************
+*/
+
+static  void  NetUDP_RxPktValidate (NET_BUF      *p_buf,
+                                    NET_BUF_HDR  *p_buf_hdr,
+                                    NET_UDP_HDR  *p_udp_hdr,
+                                    NET_ERR      *p_err)
+{
+    NET_UDP_PSEUDO_HDR   udp_pseudo_hdr;
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_PSEUDO_HDR  ipv6_pseudo_hdr;
+#endif
+    CPU_INT16U           udp_tot_len;
+    CPU_INT16U           udp_data_len;
+    NET_CHK_SUM          udp_chk_sum;
+    CPU_BOOLEAN          udp_chk_sum_valid;
+    NET_BUF             *p_buf_next;
+    NET_BUF_HDR         *p_buf_next_hdr;
+    CPU_BOOLEAN          udp_chk_sum_ipv6;
+
+
+
+                                                                /* ---------------- VALIDATE UDP PORTS ---------------- */
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->TransportPortSrc,  &p_udp_hdr->PortSrc);
+    if (p_buf_hdr->TransportPortSrc  == NET_UDP_PORT_NBR_RESERVED) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxHdrPortSrcCtr);
+       *p_err = NET_UDP_ERR_INVALID_PORT_NBR;
+        return;
+    }
+
+    NET_UTIL_VAL_COPY_GET_NET_16(&p_buf_hdr->TransportPortDest, &p_udp_hdr->PortDest);
+    if (p_buf_hdr->TransportPortDest == NET_UDP_PORT_NBR_RESERVED) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxHdrPortDestCtr);
+       *p_err = NET_UDP_ERR_INVALID_PORT_NBR;
+        return;
+    }
+
+
+                                                                /* ------------ VALIDATE UDP DATAGRAM LEN ------------- */
+                                                                /* See Note #3.                                         */
+    NET_UTIL_VAL_COPY_GET_NET_16(&udp_tot_len, &p_udp_hdr->DatagramLen);
+    p_buf_hdr->TransportTotLen = udp_tot_len;
+    if (p_buf_hdr->TransportTotLen < NET_UDP_TOT_LEN_MIN) {      /* If datagram len <  min tot     len, rtn err.         */
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxHdrDatagramLenCtr);
+       *p_err = NET_UDP_ERR_INVALID_LEN;
+        return;
+    }
+    if (p_buf_hdr->TransportTotLen > NET_UDP_TOT_LEN_MAX) {      /* If datagram len >  max tot     len, rtn err.         */
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxHdrDatagramLenCtr);
+       *p_err = NET_UDP_ERR_INVALID_LEN;
+        return;
+    }
+
+    if (p_buf_hdr->TransportTotLen != p_buf_hdr->IP_DatagramLen) {/* If datagram len != IP datagram len, rtn err.         */
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxHdrDatagramLenCtr);
+       *p_err = NET_UDP_ERR_INVALID_LEN;
+        return;
+    }
+
+
+                                                                /* --------------- VALIDATE UDP CHK SUM --------------- */
+                                                                /* See Note #4.                                         */
+    NET_UTIL_VAL_COPY_GET_NET_16(&udp_chk_sum, &p_udp_hdr->ChkSum);
+
+    udp_chk_sum_ipv6 = DEF_BIT_IS_SET(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME);
+
+    if (udp_chk_sum != NET_UDP_HDR_CHK_SUM_NONE) {              /* If chk sum rx'd, verify chk sum (see Note #4d).      */
+                                                                /* Prepare UDP chk sum pseudo-hdr  (see Note #4e).      */
+
+        if (udp_chk_sum_ipv6 == DEF_NO) {
+#ifdef NET_IPv4_MODULE_EN
+#ifdef NET_UDP_CHK_SUM_OFFLOAD_RX
+            udp_chk_sum_valid          =  DEF_YES;
+           (void)&udp_chk_sum_valid;
+#else
+            udp_pseudo_hdr.AddrSrc     = (NET_IPv4_ADDR)NET_UTIL_HOST_TO_NET_32(p_buf_hdr->IP_AddrSrc);
+            udp_pseudo_hdr.AddrDest    = (NET_IPv4_ADDR)NET_UTIL_HOST_TO_NET_32(p_buf_hdr->IP_AddrDest);
+            udp_pseudo_hdr.Zero        = (CPU_INT08U )0x00u;
+            udp_pseudo_hdr.Protocol    = (CPU_INT08U )NET_IP_HDR_PROTOCOL_UDP;
+            udp_pseudo_hdr.DatagramLen = (CPU_INT16U )NET_UTIL_HOST_TO_NET_16(p_buf_hdr->TransportTotLen);
+            udp_chk_sum_valid          =  NetUtil_16BitOnesCplChkSumDataVerify((void     *) p_buf,
+                                                                               (void     *)&udp_pseudo_hdr,
+                                                                               (CPU_INT16U) NET_UDP_PSEUDO_HDR_SIZE,
+                                                                               (NET_ERR  *) p_err);
+#endif
+#else
+            udp_chk_sum_valid          = DEF_FAIL;
+#endif
+        } else {
+#ifdef NET_IPv6_MODULE_EN
+#ifdef NET_UDP_CHK_SUM_OFFLOAD_RX
+            udp_chk_sum_valid                = DEF_YES;
+           (void)&udp_chk_sum_valid;
+#else
+            ipv6_pseudo_hdr.AddrSrc          = p_buf_hdr->IPv6_AddrSrc;
+            ipv6_pseudo_hdr.AddrDest         = p_buf_hdr->IPv6_AddrDest;
+            ipv6_pseudo_hdr.UpperLayerPktLen = NET_UTIL_HOST_TO_NET_32(p_buf_hdr->TransportTotLen);
+            ipv6_pseudo_hdr.Zero             = 0x00u;
+            ipv6_pseudo_hdr.NextHdr          = NET_UTIL_NET_TO_HOST_16(NET_IP_HDR_PROTOCOL_UDP);
+            udp_chk_sum_valid                = NetUtil_16BitOnesCplChkSumDataVerify((void     *) p_buf,
+                                                                                    (void     *)&ipv6_pseudo_hdr,
+                                                                                                 NET_IPv6_PSEUDO_HDR_SIZE,
+                                                                                                 p_err);
+#endif
+#else
+            udp_chk_sum_valid = DEF_FAIL;
+#endif
+        }
+
+#ifndef NET_UDP_CHK_SUM_OFFLOAD_RX
+        if (udp_chk_sum_valid != DEF_OK) {
+            NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxHdrChkSumCtr);
+           *p_err = NET_UDP_ERR_INVALID_CHK_SUM;
+            return;
+        }
+#endif
+
+        DEF_BIT_SET(p_buf_hdr->Flags, NET_BUF_FLAG_RX_UDP_CHK_SUM_VALID);
+
+    } else {                                                    /* Else discard or flag NO rx'd chk sum (see Note #4d3).*/
+#if (NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN != DEF_DISABLED)
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxHdrChkSumCtr);
+       *p_err = NET_UDP_ERR_INVALID_CHK_SUM;
+        return;
+#endif
+#if 0                                                           /* Clr'd in NetBuf_Get() [see Note #4d3B].              */
+        DEF_BIT_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_RX_UDP_CHK_SUM_VALID);
+#endif
+    }
+
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+                                                                /* Calc UDP data len/ix (see Note #5a).                 */
+    p_buf_hdr->TransportHdrLen = NET_UDP_HDR_SIZE;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    if (p_buf_hdr->TransportHdrLen > udp_tot_len) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxHdrDataLenCtr);
+       *p_err = NET_UDP_ERR_INVALID_LEN_DATA;
+        return;
+    }
+    if (p_buf_hdr->TransportHdrLen > p_buf_hdr->DataLen) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.RxHdrDataLenCtr);
+       *p_err = NET_UDP_ERR_INVALID_LEN_DATA;
+        return;
+    }
+#endif
+    udp_data_len                 =  udp_tot_len - p_buf_hdr->TransportHdrLen;
+    p_buf_hdr->TransportDataLen  =  udp_data_len;
+
+    p_buf_hdr->DataLen          -= (NET_BUF_SIZE) p_buf_hdr->TransportHdrLen;
+    p_buf_hdr->DataIx            = (CPU_INT16U  )(p_buf_hdr->TransportHdrIx + p_buf_hdr->TransportHdrLen);
+    p_buf_hdr->ProtocolHdrType   =  NET_PROTOCOL_TYPE_APP;
+
+    p_buf_next = p_buf_hdr->NextBufPtr;
+    while (p_buf_next != (NET_BUF *)0) {                         /* Calc ALL pkt bufs' data len/ix    (see Note #5b).    */
+        p_buf_next_hdr                   = &p_buf_next->Hdr;
+        p_buf_next_hdr->DataIx           =  p_buf_next_hdr->TransportHdrIx;
+        p_buf_next_hdr->TransportHdrLen  =  0u;                  /* NULL UDP hdr  len in each pkt buf.                   */
+        p_buf_next_hdr->TransportTotLen  =  udp_tot_len;         /* Dup  UDP tot  len & ...                              */
+        p_buf_next_hdr->TransportDataLen =  udp_data_len;        /* ...      data len in each pkt buf (see Note #5c).    */
+        p_buf_hdr->ProtocolHdrType       =  NET_PROTOCOL_TYPE_APP;
+        p_buf_next                       =  p_buf_next_hdr->NextBufPtr;
+    }
+
+
+   (void)&udp_chk_sum_valid;
+   (void)&udp_pseudo_hdr;
+
+   *p_err = NET_UDP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetUDP_RxPktDemuxDatagram()
+*
+* Description : Demultiplex UDP datagram to appropriate socket or application connection.
+*
+* Argument(s) : p_buf        Pointer to network buffer that received UDP datagram.
+*               ----        Argument checked in NetUDP_Rx().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*                               NET_ERR_RX_DEST                 Invalid destination; no connection available
+*                                                                   for received packet.
+*
+*                                                               -------- RETURNED BY NetSock_Rx() : --------
+*                               NET_SOCK_ERR_NONE               UDP datagram successfully received to
+*                                                                   socket      connection.
+*
+*                                                               - RETURNED BY NetUDP_RxPktDemuxAppData() : -
+*                               NET_APP_ERR_NONE                UDP datagram successfully received to
+*                                                                   application connection.
+*                               NET_INIT_ERR_NOT_COMPLETED         Network initialization NOT complete.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_Rx().
+*
+* Note(s)     : (1) (a) Attempt demultiplex of received UDP datagram to socket connections first, if enabled.
+*
+*                   (b) On any error(s), attempt demultiplex to application connections, if enabled.
+*
+*               (2) When network buffer is demultiplexed to socket or application receive, the buffer's reference
+*                   counter is NOT incremented since the UDP layer does NOT maintain a reference to the buffer.
+*********************************************************************************************************
+*/
+
+static  void  NetUDP_RxPktDemuxDatagram (NET_BUF  *p_buf,
+                                         NET_ERR  *p_err)
+{
+    NetSock_Rx(p_buf, p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetUDP_RxPktFree()
+*
+* Description : Free network buffer(s).
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_RxAppData().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetUDP_RxPktFree (NET_BUF  *p_buf)
+{
+   (void)NetBuf_FreeBufList((NET_BUF *)p_buf,
+                            (NET_CTR *)0);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetUDP_RxPktDiscard()
+*
+* Description : On any UDP receive error(s), discard UDP packet(s) & buffer(s).
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_Rx(),
+*               NetUDP_RxAppData().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetUDP_RxPktDiscard (NET_BUF  *p_buf,
+                                   NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.UDP.RxPktDiscardedCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBufList((NET_BUF *)p_buf,
+                            (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_RX;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             NetUDP_Tx()
+*
+* Description : (1) Prepare & transmit UDP datagram packet(s) :
+*
+*                   (a) Validate transmit packet
+*                   (b) Prepare  UDP datagram header
+*                   (c) Transmit UDP packet
+*                   (d) Update   transmit statistics
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer to transmit UDP packet.
+*               ----        Argument validated in NetUDP_TxAppDataHandler().
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      UDP port.
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination UDP port.
+*
+*               TOS         Specific TOS to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IP_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IP_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IP_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IP_TTL_NONE                 Replace with default TTL
+*
+*               flags_udp   Flags to select UDP transmit options (see Note #2); bit-field flags logically OR'd :
+*
+*                               NET_UDP_FLAG_NONE               No UDP  transmit flags selected.
+*                               NET_UDP_FLAG_TX_CHK_SUM_DIS     DISABLE transmit check-sums.
+*                               NET_UDP_FLAG_TX_BLOCK           Transmit UDP application data with blocking,
+*                                                                   if flag set; without blocking, if clear
+*                                                                   (see Note #2a).
+*
+*               flags_ip    Flags to select IP  transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IP_FLAG_NONE                No  IP transmit flags selected.
+*                               NET_IP_FLAG_TX_DONT_FRAG        Set IP 'Don't Frag' flag.
+*
+*               p_opts_ip    Pointer to one or more IP options configuration data structures
+*                               (see 'net_ip.h  IP HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IP_OPT_CFG_ROUTE_TS         Route &/or Internet Timestamp options configuration.
+*                               NET_IP_OPT_CFG_SECURITY         Security options configuration
+*                                                                   (see 'net_ip.c  Note #1e').
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UDP_ERR_NONE                UDP datagram(s) successfully prepared &
+*                                                                   transmitted to network layer.
+*
+*                                                               -- RETURNED BY NetUDP_TxPktValidate() : ---
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*                               NET_UDP_ERR_INVALID_LEN_DATA    Invalid protocol/data length.
+*                               NET_UDP_ERR_INVALID_PORT_NBR    Invalid UDP port number.
+*                               NET_UDP_ERR_INVALID_FLAG        Invalid UDP flag(s).
+*
+*                                                               -- RETURNED BY NetUDP_TxPktPrepareHdr() : -
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*
+*                                                               --- RETURNED BY NetUDP_TxPktDiscard() : ---
+*                               NET_ERR_TX                      Transmit error; packet(s) discarded.
+*
+*                                                               -------- RETURNED BY NetIP_Tx() : ---------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_TxAppDataHandler().
+*
+* Note(s)     : (2) Some UDP transmit flag options NOT yet implemented :
+*
+*                   (a) NET_UDP_FLAG_TX_BLOCK
+*
+*                   See also 'NetUDP_TxPktValidate()  Note #2b'.
+*
+*               (3) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv4_MODULE_EN
+static  void  NetUDP_TxIPv4 (NET_BUF           *p_buf,
+                             NET_IPv4_ADDR      src_addr,
+                             NET_UDP_PORT_NBR   src_port,
+                             NET_IPv4_ADDR      dest_addr,
+                             NET_UDP_PORT_NBR   dest_port,
+                             NET_IPv4_TOS       TOS,
+                             NET_IPv4_TTL       TTL,
+                             NET_UDP_FLAGS      flags_udp,
+                             NET_IPv4_FLAGS     flags_ip,
+                             void              *p_opts_ip,
+                             NET_ERR           *p_err)
+{
+    NET_BUF_HDR    *p_buf_hdr;
+    NET_ERR         err;
+
+
+                                                                /* --------------- VALIDATE UDP TX PKT ---------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetUDP_TxPktValidate(p_buf_hdr,
+                         src_port,
+                         dest_port,
+                         flags_udp,
+                         p_err);
+    switch (*p_err) {
+        case NET_UDP_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_UDP_ERR_INVALID_LEN_DATA:
+        case NET_UDP_ERR_INVALID_PORT_NBR:
+        case NET_UDP_ERR_INVALID_FLAG:
+        default:
+             NetUDP_TxPktDiscard(p_buf, &err);
+             return;
+    }
+#endif
+
+
+                                                                /* ------------------ PREPARE UDP HDR ----------------- */
+    NetUDP_TxPktPrepareHdr(p_buf,
+                           p_buf_hdr,
+                          &src_addr,
+                           src_port,
+                          &dest_addr,
+                           dest_port,
+                           flags_udp,
+                           p_err);
+
+
+                                                                /* -------------------- TX UDP PKT -------------------- */
+    switch (*p_err) {
+        case NET_UDP_ERR_NONE:
+             NetIPv4_Tx(p_buf,
+                        src_addr,
+                        dest_addr,
+                        TOS,
+                        TTL,
+                        flags_ip,
+                        p_opts_ip,
+                        p_err);
+             break;
+
+
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_UTIL_ERR_NULL_SIZE:
+        case NET_UTIL_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetUDP_TxPktDiscard(p_buf, &err);
+             return;
+    }
+
+
+                                                                /* ----------------- UPDATE TX STATS ------------------ */
+    switch (*p_err) {                                            /* Chk err from NetIP_Tx().                             */
+        case NET_IPv4_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.UDP.TxDgramCtr);
+            *p_err = NET_UDP_ERR_NONE;
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxPktDiscardedCtr);
+                                                                /* Rtn err from NetIP_Tx().                             */
+             return;
+
+
+        case NET_IPv4_ERR_TX_PKT:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxPktDiscardedCtr);
+            *p_err = NET_ERR_TX;
+             return;
+
+
+        default:
+             NetUDP_TxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            NetUDP_TxIPv6()
+*
+* Description : (1) Prepare & transmit UDP datagram packet(s) :
+*
+*                   (a) Validate transmit packet
+*                   (b) Prepare  UDP datagram header
+*                   (c) Transmit UDP packet
+*                   (d) Update   transmit statistics
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer to transmit UDP packet.
+*               ----        Argument validated in NetUDP_TxAppDataHandler().
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      UDP port.
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination UDP port.
+*
+*               TOS         Specific TOS to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TYPE OF SERVICE (TOS) DEFINES').
+*
+*               TTL         Specific TTL to transmit UDP/IP packet
+*                               (see 'net_ip.h  IP HEADER TIME-TO-LIVE (TTL) DEFINES') :
+*
+*                               NET_IP_TTL_MIN                  Minimum TTL transmit value   (1)
+*                               NET_IP_TTL_MAX                  Maximum TTL transmit value (255)
+*                               NET_IP_TTL_DFLT                 Default TTL transmit value (128)
+*                               NET_IP_TTL_NONE                 Replace with default TTL
+*
+*               flags_udp   Flags to select UDP transmit options (see Note #2); bit-field flags logically OR'd :
+*
+*                               NET_UDP_FLAG_NONE               No UDP  transmit flags selected.
+*                               NET_UDP_FLAG_TX_CHK_SUM_DIS     DISABLE transmit check-sums.
+*                               NET_UDP_FLAG_TX_BLOCK           Transmit UDP application data with blocking,
+*                                                                   if flag set; without blocking, if clear
+*                                                                   (see Note #2a).
+*
+*               flags_ip    Flags to select IP  transmit options; bit-field flags logically OR'd :
+*
+*                               NET_IP_FLAG_NONE                No  IP transmit flags selected.
+*                               NET_IP_FLAG_TX_DONT_FRAG        Set IP 'Don't Frag' flag.
+*
+*               p_opts_ip    Pointer to one or more IP options configuration data structures
+*                               (see 'net_ip.h  IP HEADER OPTION CONFIGURATION DATA TYPES') :
+*
+*                               NULL                            NO IP transmit options configuration.
+*                               NET_IP_OPT_CFG_ROUTE_TS         Route &/or Internet Timestamp options configuration.
+*                               NET_IP_OPT_CFG_SECURITY         Security options configuration
+*                                                                   (see 'net_ip.c  Note #1e').
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UDP_ERR_NONE                UDP datagram(s) successfully prepared &
+*                                                                   transmitted to network layer.
+*
+*                                                               -- RETURNED BY NetUDP_TxPktValidate() : ---
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*                               NET_UDP_ERR_INVALID_LEN_DATA    Invalid protocol/data length.
+*                               NET_UDP_ERR_INVALID_PORT_NBR    Invalid UDP port number.
+*                               NET_UDP_ERR_INVALID_FLAG        Invalid UDP flag(s).
+*
+*                                                               -- RETURNED BY NetUDP_TxPktPrepareHdr() : -
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*
+*                                                               --- RETURNED BY NetUDP_TxPktDiscard() : ---
+*                               NET_ERR_TX                      Transmit error; packet(s) discarded.
+*
+*                                                               -------- RETURNED BY NetIP_Tx() : ---------
+*                               NET_ERR_IF_LOOPBACK_DIS         Loopback interface disabled.
+*                               NET_ERR_IF_LINK_DOWN            Network  interface link state down (i.e.
+*                                                                   NOT available for receive or transmit).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_TxAppDataHandler().
+*
+* Note(s)     : (2) Some UDP transmit flag options NOT yet implemented :
+*
+*                   (a) NET_UDP_FLAG_TX_BLOCK
+*
+*                   See also 'NetUDP_TxPktValidate()  Note #2b'.
+*
+*               (3) Network buffer already freed by lower layer; only increment error counter.
+*********************************************************************************************************
+*/
+#ifdef  NET_IPv6_MODULE_EN
+static  void  NetUDP_TxIPv6(NET_BUF                 *p_buf,
+                            NET_IPv6_ADDR           *p_src_addr,
+                            NET_UDP_PORT_NBR         src_port,
+                            NET_IPv6_ADDR           *p_dest_addr,
+                            NET_UDP_PORT_NBR         dest_port,
+                            NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                            NET_IPv6_FLOW_LABEL      flow_label,
+                            NET_IPv6_HOP_LIM         hop_lim,
+                            NET_UDP_FLAGS            flags_udp,
+                            NET_ERR                 *p_err)
+{
+    NET_BUF_HDR    *p_buf_hdr;
+    NET_ERR         err;
+
+
+                                                                /* --------------- VALIDATE UDP TX PKT ---------------- */
+    p_buf_hdr = &p_buf->Hdr;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    NetUDP_TxPktValidate(p_buf_hdr,
+                         src_port,
+                         dest_port,
+                         flags_udp,
+                         p_err);
+    switch (*p_err) {
+        case NET_UDP_ERR_NONE:
+             break;
+
+
+        case NET_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_TYPE:
+        case NET_BUF_ERR_INVALID_IX:
+        case NET_UDP_ERR_INVALID_LEN_DATA:
+        case NET_UDP_ERR_INVALID_PORT_NBR:
+        case NET_UDP_ERR_INVALID_FLAG:
+        default:
+             NetUDP_TxPktDiscard(p_buf, &err);
+             return;
+    }
+#endif
+
+
+                                                                /* ------------------ PREPARE UDP HDR ----------------- */
+    NetUDP_TxPktPrepareHdr(p_buf,
+                           p_buf_hdr,
+                           p_src_addr,
+                           src_port,
+                           p_dest_addr,
+                           dest_port,
+                           flags_udp,
+                           p_err);
+
+
+                                                                /* -------------------- TX UDP PKT -------------------- */
+    switch (*p_err) {
+        case NET_UDP_ERR_NONE:
+             NetIPv6_Tx(                    p_buf,
+                                            p_src_addr,
+                                            p_dest_addr,
+                        (NET_IPv6_EXT_HDR *)0,
+                                            traffic_class,
+                                            flow_label,
+                                            hop_lim,
+                                            p_err);
+             break;
+
+
+        case NET_ERR_FAULT_NULL_PTR:
+        case NET_UTIL_ERR_NULL_SIZE:
+        case NET_UTIL_ERR_INVALID_PROTOCOL:
+        case NET_BUF_ERR_INVALID_IX:
+        default:
+             NetUDP_TxPktDiscard(p_buf, &err);
+             return;
+    }
+
+
+                                                                /* ----------------- UPDATE TX STATS ------------------ */
+    switch (*p_err) {                                            /* Chk err from NetIP_Tx().                             */
+        case NET_IPv6_ERR_NONE:
+             NET_CTR_STAT_INC(Net_StatCtrs.UDP.TxDgramCtr);
+            *p_err = NET_UDP_ERR_NONE;
+             break;
+
+
+        case NET_ERR_TX:
+        case NET_ERR_IF_LINK_DOWN:
+        case NET_ERR_IF_LOOPBACK_DIS:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxPktDiscardedCtr);
+                                                                /* Rtn err from NetIP_Tx().                             */
+             return;
+
+
+        case NET_IPv6_ERR_TX_PKT:
+                                                                /* See Note #3.                                         */
+             NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxPktDiscardedCtr);
+            *p_err = NET_ERR_TX;
+             return;
+
+
+        default:
+             NetUDP_TxPktDiscard(p_buf, p_err);
+             return;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       NetUDP_TxPktValidate()
+*
+* Description : (1) Validate UDP transmit packet parameters & options :
+*
+*                   (a) Validate the following transmit packet parameters :
+*
+*                       (1) Supported protocols :
+*                           (A) Application
+*                           (B) BSD Sockets
+*
+*                       (2) Buffer protocol index
+*                       (3) Data Length
+*                       (4) Source      Port
+*                       (5) Destination Port
+*                       (6) Flags
+*
+*
+* Argument(s) : p_buf_hdr    Pointer to network buffer header.
+*               --------    Argument validated in NetUDP_Tx().
+*
+*               src_port    Source      UDP port.
+*
+*               dest_port   Destination UDP port.
+*
+*               flags_udp   Flags to select UDP transmit options (see Note #2); bit-field flags logically OR'd :
+*
+*                               NET_UDP_FLAG_NONE               No UDP  transmit flags selected.
+*                               NET_UDP_FLAG_TX_CHK_SUM_DIS     DISABLE transmit check-sums.
+*                               NET_UDP_FLAG_TX_BLOCK           Transmit UDP application data with blocking,
+*                                                                   if flag set; without blocking, if clear
+*                                                                   (see Note #2b1).
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UDP_ERR_NONE                Transmit packet validated.
+*                               NET_ERR_INVALID_PROTOCOL        Invalid/unknown protocol type.
+*                               NET_BUF_ERR_INVALID_TYPE        Invalid network buffer   type.
+*                               NET_BUF_ERR_INVALID_IX          Invalid/insufficient buffer index.
+*                               NET_UDP_ERR_INVALID_LEN_DATA    Invalid protocol/data length.
+*                               NET_UDP_ERR_INVALID_PORT_NBR    Invalid UDP port number.
+*                               NET_UDP_ERR_INVALID_FLAG        Invalid UDP flag(s).
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_Tx().
+*
+* Note(s)     : (2) (a) Only some UDP transmit flag options are implemented.  If other flag options
+*                       are requested, NetUDP_Tx() handler function(s) abort & return appropriate error
+*                       codes so that requested flag options are NOT silently ignored.
+*
+*                   (b) Some UDP transmit flag options NOT yet implemented :
+*
+*                       (1) NET_UDP_FLAG_TX_BLOCK
+*********************************************************************************************************
+*/
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+static  void  NetUDP_TxPktValidate (NET_BUF_HDR       *p_buf_hdr,
+                                    NET_UDP_PORT_NBR   src_port,
+                                    NET_UDP_PORT_NBR   dest_port,
+                                    NET_UDP_FLAGS      flags_udp,
+                                    NET_ERR           *p_err)
+{
+    CPU_INT16U     ix;
+    CPU_INT16U     len;
+    NET_UDP_FLAGS  flag_mask;
+
+
+                                                                /* -------------- VALIDATE NET BUF TYPE --------------- */
+    switch (p_buf_hdr->Type) {
+        case NET_BUF_TYPE_TX_LARGE:
+        case NET_BUF_TYPE_TX_SMALL:
+             break;
+
+
+        case NET_BUF_TYPE_NONE:
+        case NET_BUF_TYPE_BUF:
+        case NET_BUF_TYPE_RX_LARGE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.Buf.InvTypeCtr);
+            *p_err = NET_BUF_ERR_INVALID_TYPE;
+             return;
+    }
+
+
+                                                                /* ----------------- VALIDATE PROTOCOL ---------------- */
+    switch (p_buf_hdr->ProtocolHdrType) {
+        case NET_PROTOCOL_TYPE_APP:
+        case NET_PROTOCOL_TYPE_SOCK:
+        case NET_PROTOCOL_TYPE_UDP_V4:
+        case NET_PROTOCOL_TYPE_UDP_V6:
+             ix  = (CPU_INT16U)p_buf_hdr->DataIx;
+             len = (CPU_INT16U)p_buf_hdr->DataLen;
+             break;
+
+
+        case NET_PROTOCOL_TYPE_NONE:
+        default:
+             NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxInvalidProtocolCtr);
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+    if (ix == NET_BUF_IX_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxInvalidBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+    if (ix <  NET_UDP_HDR_SIZE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxInvalidBufIxCtr);
+       *p_err = NET_BUF_ERR_INVALID_IX;
+        return;
+    }
+
+
+
+                                                                /* -------------- VALIDATE TOT DATA LEN --------------- */
+    if (len != p_buf_hdr->TotLen) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxHdrDataLenCtr);
+       *p_err = NET_UDP_ERR_INVALID_LEN_DATA;
+        return;
+    }
+
+
+
+                                                                /* ---------------- VALIDATE UDP PORTS ---------------- */
+    if (src_port  == NET_UDP_PORT_NBR_RESERVED) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxHdrPortSrcCtr);
+       *p_err = NET_UDP_ERR_INVALID_PORT_NBR;
+        return;
+    }
+
+    if (dest_port == NET_UDP_PORT_NBR_RESERVED) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxHdrPortDestCtr);
+       *p_err = NET_UDP_ERR_INVALID_PORT_NBR;
+        return;
+    }
+
+
+
+                                                                /* ---------------- VALIDATE UDP FLAGS ---------------- */
+    flag_mask = NET_UDP_FLAG_NONE           |
+                NET_UDP_FLAG_TX_CHK_SUM_DIS |
+                NET_UDP_FLAG_TX_BLOCK;                          /* See Note #2b1.                                       */
+                                                                /* If any invalid flags req'd, rtn err (see Note #2a).  */
+    if ((flags_udp & (NET_UDP_FLAGS)~flag_mask) != NET_UDP_FLAG_NONE) {
+        NET_CTR_ERR_INC(Net_ErrCtrs.UDP.TxHdrFlagsCtr);
+       *p_err = NET_UDP_ERR_INVALID_FLAG;
+        return;
+    }
+
+
+   *p_err = NET_UDP_ERR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      NetUDP_TxPktPrepareHdr()
+*
+* Description : (1) Prepare UDP header :
+*
+*                   (a) Update network buffer's protocol index & length controls
+*
+*                   (b) Prepare the transmit packet's following UDP header fields :
+*
+*                       (1) Source      Port
+*                       (2) Destination Port
+*                       (3) Datagram Length
+*                       (4) Check-Sum                                   See Note #3
+*
+*                   (c) Convert the following UDP header fields from host-order to network-order :
+*
+*                       (1) Source      Port
+*                       (2) Destination Port
+*                       (3) Datagram Length
+*                       (4) Check-Sum                                   See Note #3g
+*
+*
+* Argument(s) : p_buf        Pointer to network buffer to transmit UDP packet.
+*               ----        Argument checked   in NetUDP_Tx().
+*
+*               p_buf_hdr    Pointer to network buffer header.
+*               --------    Argument validated in NetUDP_Tx().
+*
+*               src_addr    Source      IP  address.
+*
+*               src_port    Source      UDP port.
+*               --------    Argument validated in NetUDP_TxPktValidate().
+*
+*               dest_addr   Destination IP  address.
+*
+*               dest_port   Destination UDP port.
+*               ---------   Argument validated in NetUDP_TxPktValidate().
+*
+*               flags_udp   Flags to select UDP transmit options (see Note #2); bit-field flags logically OR'd :
+*               ---------
+*                               NET_UDP_FLAG_NONE               No UDP  transmit flags selected.
+*                               NET_UDP_FLAG_TX_CHK_SUM_DIS     DISABLE transmit check-sums.
+*                               NET_UDP_FLAG_TX_BLOCK           Transmit UDP application data with blocking,
+*                                                                   if flag set; without blocking, if clear
+*                                                                   (see Note #2a).
+*
+*                           Argument checked    in NetUDP_TxPktValidate().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UDP_ERR_NONE                UDP header successfully prepared.
+*
+*                                                               - RETURNED BY NetUtil_16BitOnesCplChkSumDataCalc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Check-sum passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Check-sum passed a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_Tx().
+*
+* Note(s)     : (2) Some UDP transmit flag options NOT yet implemented :
+*
+*                   (a) NET_UDP_FLAG_TX_BLOCK
+*
+*                   See also 'NetUDP_TxPktValidate()  Note #2b'.
+*
+*               (3) (a) UDP header Check-Sum MUST be calculated AFTER the entire UDP header has been prepared.
+*                       In addition, ALL multi-octet words are converted from host-order to network-order
+*                       since "the sum of 16-bit integers can be computed in either byte order" [RFC #1071,
+*                       Section 2.(B)].
+*
+*                   (b) RFC #1122, Section 4.1.3.4 states that "an application MAY optionally be able to
+*                       control whether a UDP checksum will be generated".
+*
+*                   (c) Although neither RFC #768 nor RFC #1122, Sections 4.1 expressly specifies, it is
+*                       assumed that that the UDP header Check-Sum field MUST be cleared to '0' BEFORE the
+*                       UDP header Check-Sum is calculated.
+*
+*                       See also 'net_ip.c    NetIP_TxPktPrepareHdr()   Note #6b',
+*                                'net_icmp.c  NetICMP_TxMsgErr()        Note #6b',
+*                                'net_icmp.c  NetICMP_TxMsgReq()        Note #7b',
+*                                'net_icmp.c  NetICMP_TxMsgReply()      Note #5b',
+*                                'net_tcp.c   NetTCP_TxPktPrepareHdr()  Note #3b'.
+*
+*                   (d) (1) In addition to the UDP datagram header & data, the UDP Check-Sum calculation
+*                           includes "a pseudo header of information from the IP header ... conceptually
+*                           prefixed to the UDP header [which] contains the source address, the destination
+*                           address, the protocol, and the UDP length" (see RFC #768, Section 'Fields :
+*                           Checksum').
+*
+*                       (2) Since network check-sum functions REQUIRE that 16-bit one's-complement check-
+*                           sum calculations be performed on headers & data arranged in network-order (see
+*                           'net_util.c  NetUtil_16BitOnesCplChkSumDataCalc()  Note #3'), UDP pseudo-header
+*                           values MUST be set or converted to network-order.
+*
+*                   (e) RFC #768, Section 'Fields : Checksum' specifies that "the data [is] padded with zero
+*                       octets at the end (if necessary) to make a multiple of two octets".
+*
+*                       See also 'net_util.c  NetUtil_16BitSumDataCalc()  Note #8'.
+*
+*                   (f) "If the computed checksum is zero" (i.e. one's-complement positive zero -- all
+*                        bits equal to zero), then "it is transmitted as all ones (the equivalent in
+*                        one's complement arithmetic" (i.e. one's-complement negative zero -- all bits
+*                        equal to one) [RFC #768, Section 'Fields : Checksum'].
+*
+*                   (g) The UDP header Check-Sum field is returned in network-order & MUST NOT be re-
+*                       converted back to host-order (see 'net_util.c  NetUtil_16BitOnesCplChkSumDataCalc()
+*                       Note #4').
+*********************************************************************************************************
+*/
+
+static  void  NetUDP_TxPktPrepareHdr (NET_BUF           *p_buf,
+                                      NET_BUF_HDR       *p_buf_hdr,
+                                      void              *p_src_addr,
+                                      NET_UDP_PORT_NBR   src_port,
+                                      void              *p_dest_addr,
+                                      NET_UDP_PORT_NBR   dest_port,
+                                      NET_UDP_FLAGS      flags_udp,
+                                      NET_ERR           *p_err)
+{
+#ifndef  NET_UDP_CHK_SUM_OFFLOAD_TX
+#ifdef  NET_IPv4_MODULE_EN
+    NET_UDP_PSEUDO_HDR    udp_pseudo_hdr;
+    NET_IPv4_ADDR        *p_src_addrv4;
+    NET_IPv4_ADDR        *p_dest_addrv4;
+#endif  /* NET_IPv4_MODULE_EN           */
+#ifdef  NET_IPv6_MODULE_EN
+    NET_IPv6_PSEUDO_HDR   ipv6_pseudo_hdr;
+#endif  /* NET_IPv6_MODULE_EN           */
+#endif  /* NET_UDP_CHK_SUM_OFFLOAD_TX   */
+    NET_UDP_HDR          *p_udp_hdr;
+    NET_CHK_SUM           udp_chk_sum;
+    CPU_BOOLEAN           tx_chk_sum;
+
+
+                                                                /* ----------------- UPDATE BUF CTRLS ----------------- */
+    p_buf_hdr->TransportHdrLen   =  NET_UDP_HDR_SIZE;
+    p_buf_hdr->TransportHdrIx    =  p_buf_hdr->DataIx - p_buf_hdr->TransportHdrLen;
+
+    p_buf_hdr->TotLen          += (NET_BUF_SIZE)p_buf_hdr->TransportHdrLen;
+    p_buf_hdr->TransportTotLen   = (CPU_INT16U  )p_buf_hdr->TotLen;
+    p_buf_hdr->TransportDataLen  = (CPU_INT16U  )p_buf_hdr->DataLen;
+
+
+
+
+                                                                /* ----------------- PREPARE UDP HDR ------------------ */
+    p_udp_hdr = (NET_UDP_HDR *)&p_buf->DataPtr[p_buf_hdr->TransportHdrIx];
+
+
+
+                                                                /* ---------------- PREPARE UDP PORTS ----------------- */
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_udp_hdr->PortSrc,  &src_port);
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_udp_hdr->PortDest, &dest_port);
+
+
+
+                                                                /* ------------- PREPARE UDP DATAGRAM LEN ------------- */
+    NET_UTIL_VAL_COPY_SET_NET_16(&p_udp_hdr->DatagramLen, &p_buf_hdr->TransportTotLen);
+
+
+
+                                                                /* --------------- PREPARE UDP CHK SUM ---------------- */
+#if (NET_UDP_CFG_TX_CHK_SUM_EN == DEF_ENABLED)
+    tx_chk_sum = DEF_BIT_IS_CLR(flags_udp, NET_UDP_FLAG_TX_CHK_SUM_DIS);
+#else
+    tx_chk_sum = DEF_NO;
+#endif
+
+    if (tx_chk_sum == DEF_YES) {                                /* If en'd (see Note #3b), prepare UDP tx chk sum.      */
+        NET_UTIL_VAL_SET_NET_16(&p_udp_hdr->ChkSum, 0x0000u);    /* Clr UDP chk sum            (see Note #3c).           */
+                                                                /* Cfg UDP chk sum pseudo-hdr (see Note #3d).           */
+        if (DEF_BIT_IS_CLR(p_buf_hdr->Flags, NET_BUF_FLAG_IPv6_FRAME)) {
+#ifdef  NET_IPv4_MODULE_EN
+                                                                    /* Calc UDP chk sum.                                    */
+#ifdef NET_UDP_CHK_SUM_OFFLOAD_TX
+            udp_chk_sum                =  0u;
+#else
+            p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_UDP_V4;
+            p_buf_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_UDP_V4;
+
+            p_src_addrv4               = (NET_IPv4_ADDR *)p_src_addr;
+            p_dest_addrv4              = (NET_IPv4_ADDR *)p_dest_addr;
+            udp_pseudo_hdr.AddrSrc     = (NET_IPv4_ADDR)NET_UTIL_HOST_TO_NET_32(*p_src_addrv4);
+            udp_pseudo_hdr.AddrDest    = (NET_IPv4_ADDR)NET_UTIL_HOST_TO_NET_32(*p_dest_addrv4);
+            udp_pseudo_hdr.Zero        = (CPU_INT08U )0x00u;
+            udp_pseudo_hdr.Protocol    = (CPU_INT08U )NET_IP_HDR_PROTOCOL_UDP;
+            udp_pseudo_hdr.DatagramLen = (CPU_INT16U )NET_UTIL_HOST_TO_NET_16(p_buf_hdr->TransportTotLen);
+
+            udp_chk_sum                =  NetUtil_16BitOnesCplChkSumDataCalc((void     *) p_buf,
+                                                                             (void     *)&udp_pseudo_hdr,
+                                                                             (CPU_INT16U) NET_UDP_PSEUDO_HDR_SIZE,
+                                                                             (NET_ERR  *) p_err);
+#endif
+#endif
+        } else {
+#ifdef  NET_IPv6_MODULE_EN
+
+
+#ifdef NET_UDP_CHK_SUM_OFFLOAD_TX
+            udp_chk_sum = 0u;
+#else
+            Mem_Copy(&p_buf_hdr->IPv6_AddrSrc,  p_src_addr,  NET_IPv6_ADDR_SIZE);
+            Mem_Copy(&p_buf_hdr->IPv6_AddrDest, p_dest_addr, NET_IPv6_ADDR_SIZE);
+
+            p_buf_hdr->ProtocolHdrType          = NET_PROTOCOL_TYPE_UDP_V6;
+            p_buf_hdr->ProtocolHdrTypeTransport = NET_PROTOCOL_TYPE_UDP_V6;
+
+            ipv6_pseudo_hdr.AddrSrc          = p_buf_hdr->IPv6_AddrSrc;
+            ipv6_pseudo_hdr.AddrDest         = p_buf_hdr->IPv6_AddrDest;
+            ipv6_pseudo_hdr.UpperLayerPktLen = (CPU_INT32U)NET_UTIL_HOST_TO_NET_32(p_buf_hdr->TransportTotLen);
+            ipv6_pseudo_hdr.Zero             = (CPU_INT16U)0x00u;
+            ipv6_pseudo_hdr.NextHdr          = (CPU_INT32U)NET_UTIL_HOST_TO_NET_16(NET_IP_HDR_PROTOCOL_UDP);
+            udp_chk_sum = NetUtil_16BitOnesCplChkSumDataCalc((void     *) p_buf,
+                                                             (void     *)&ipv6_pseudo_hdr,
+                                                             (CPU_INT16U) NET_IPv6_PSEUDO_HDR_SIZE,
+                                                             (NET_ERR  *) p_err);
+#endif
+#endif
+        }
+
+#ifndef  NET_UDP_CHK_SUM_OFFLOAD_TX
+        if (*p_err != NET_UTIL_ERR_NONE) {
+             return;
+        }
+#endif
+
+        if (udp_chk_sum == NET_UDP_HDR_CHK_SUM_POS_ZERO) {      /* If equal to one's-cpl pos zero, ...                  */
+            udp_chk_sum  = NET_UDP_HDR_CHK_SUM_NEG_ZERO;        /* ...  set to one's-cpl neg zero (see Note #3f).       */
+        }
+
+    } else {                                                    /* Else tx NO chk sum.                                  */
+        udp_chk_sum = NET_UTIL_HOST_TO_NET_16(NET_UDP_HDR_CHK_SUM_NONE);
+    }
+
+    NET_UTIL_VAL_COPY_16(&p_udp_hdr->ChkSum, &udp_chk_sum);      /* Copy UDP chk sum in net order  (see Note #3g).       */
+
+
+
+   *p_err = NET_UDP_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetUDP_TxPktFree()
+*
+* Description : Free network buffer.
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_Tx(),
+*               NetUDP_TxAppDataHandler().
+*
+* Note(s)     : (1) (a) Although UDP Transmit initially requests the network buffer for transmit, the UDP
+*                       layer does NOT maintain a reference to the buffer.
+*
+*                   (b) Also, since the network interface transmit deallocation task frees ALL unreferenced
+*                       buffers after successful transmission, the UDP layer must NOT free the buffer.
+*
+*                       See also 'net_if.c  NetIF_TxDeallocTaskHandler()  Note #1c'.
+*********************************************************************************************************
+*/
+
+static  void  NetUDP_TxPktFree (NET_BUF  *p_buf)
+{
+   (void)&p_buf;                                                 /* Prevent 'variable unused' warning (see Note #1).     */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetUDP_TxPktDiscard()
+*
+* Description : On any UDP transmit packet error(s), discard packet & buffer.
+*
+* Argument(s) : p_buf        Pointer to network buffer.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_Tx(),
+*               NetUDP_TxAppDataHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetUDP_TxPktDiscard (NET_BUF  *p_buf,
+                                   NET_ERR  *p_err)
+{
+    NET_CTR  *pctr;
+
+
+#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
+    pctr = (NET_CTR *)&Net_ErrCtrs.UDP.TxPktDiscardedCtr;
+#else
+    pctr = (NET_CTR *) 0;
+#endif
+   (void)NetBuf_FreeBuf((NET_BUF *)p_buf,
+                        (NET_CTR *)pctr);
+
+   *p_err = NET_ERR_TX;
+}
+
+/*
+*********************************************************************************************************
+*                                         NetUDP_GetTxDataIx()
+*
+* Description : Get the offset of a buffer at which the UDP data can be written.
+*
+* Argument(s) : if_nbr
+*
+*               protocol
+*
+*               data_len
+*
+*               flags
+*
+*               p_ix
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_ERR_TX                      Transmit error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_TxAppDataHandlerIPv4(),
+*               NetUDP_TxAppDataHandlerIPv6.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+static  void  NetUDP_GetTxDataIx (NET_IF_NBR          if_nbr,
+                                  NET_PROTOCOL_TYPE   protocol,
+                                  CPU_INT16U          data_len,
+                                  NET_UDP_FLAGS       flags,
+                                  CPU_INT16U         *p_ix,
+                                  NET_ERR            *p_err)
+{
+    NET_MTU  mtu;
+
+
+    *p_ix += NET_UDP_HDR_SIZE_MAX;
+
+    switch (protocol) {
+#ifdef  NET_IPv4_MODULE_EN
+        case NET_PROTOCOL_TYPE_UDP_V4:
+             mtu = NetIF_MTU_GetProtocol(if_nbr, NET_PROTOCOL_TYPE_UDP_V4, NET_IF_FLAG_NONE, p_err);
+
+             if (*p_err != NET_IF_ERR_NONE) {
+                return;
+             }
+
+             NetIPv4_TxIxDataGet(if_nbr,
+                                 data_len,
+                                 mtu,
+                                 p_ix,
+                                 p_err);
+             break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+        case NET_PROTOCOL_TYPE_UDP_V6:
+             mtu = NetIF_MTU_GetProtocol(if_nbr, NET_PROTOCOL_TYPE_UDP_V6, NET_IF_FLAG_NONE, p_err);
+
+             if (*p_err != NET_IF_ERR_NONE) {
+                return;
+             }
+
+             NetIPv6_GetTxDataIx(if_nbr,
+                                 DEF_NULL,
+                                 data_len,
+                                 mtu,
+                                 p_ix,
+                                 p_err);
+             break;
+#endif
+
+        default:
+            *p_err = NET_ERR_INVALID_PROTOCOL;
+             return;
+    }
+
+   (void)&flags;
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_udp.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_udp.h
new file mode 100644
index 0000000..d52192e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_udp.h
@@ -0,0 +1,380 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          NETWORK UDP LAYER
+*                                      (USER DATAGRAM PROTOCOL)
+*
+* Filename      : net_udp.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 AOP
+*********************************************************************************************************
+* Note(s)       : (1) Supports User Datagram Protocol as described in RFC #768.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  "net_def.h"
+#include  "net_type.h"
+#include  "net_err.h"
+#include  
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_UDP_MODULE_PRESENT
+#define  NET_UDP_MODULE_PRESENT
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                          UDP APPLICATION-PROTOCOL-INTERFACE SELECT DEFINES
+*
+* Note(s) : (1) The following UDP values MUST be pre-#define'd in 'net_def.h' PRIOR to 'net_cfg.h' so
+*               that the developer can configure UDP for the desired application receive demultiplex
+*               selection (see 'net_def.h  UDP LAYER DEFINES  Note #1') :
+*
+*                   NET_UDP_APP_API_SEL_SOCK
+*                   NET_UDP_APP_API_SEL_APP
+*                   NET_UDP_APP_API_SEL_SOCK_APP
+*********************************************************************************************************
+*/
+
+#if 0                                                           /* See Note #1.                                         */
+#define  NET_UDP_APP_API_SEL_NONE                          0u
+#define  NET_UDP_APP_API_SEL_SOCK                          1u
+#define  NET_UDP_APP_API_SEL_APP                           2u
+#define  NET_UDP_APP_API_SEL_SOCK_APP                      3u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         UDP HEADER DEFINES
+*
+* Note(s) : (1) The following UDP values MUST be pre-#define'd in 'net_def.h' PRIOR to 'net_buf.h' so that
+*               the Network Buffer Module can configure minimum/maximum buffer header sizes (see 'net_def.h
+*               UDP LAYER DEFINES' & 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #1a') :
+*
+*               (a) NET_UDP_HDR_SIZE_MIN                   8
+*               (b) NET_UDP_HDR_SIZE_MAX                   8
+*********************************************************************************************************
+*/
+
+
+#if 0                                                           /* See Note #1.                                         */
+#define  NET_UDP_HDR_SIZE_MIN                            NET_UDP_HDR_SIZE
+#define  NET_UDP_HDR_SIZE_MAX                            NET_UDP_HDR_SIZE
+#endif
+
+
+#define  NET_UDP_PSEUDO_HDR_SIZE                          12    /*  = sizeof(NET_UDP_PSEUDO_HDR)                        */
+
+
+#define  NET_UDP_PORT_NBR_RESERVED                       NET_PORT_NBR_RESERVED
+#define  NET_UDP_PORT_NBR_NONE                           NET_UDP_PORT_NBR_RESERVED
+
+
+#define  NET_UDP_HDR_CHK_SUM_POS_ZERO                 0x0000u
+#define  NET_UDP_HDR_CHK_SUM_NEG_ZERO                 0xFFFFu
+#define  NET_UDP_HDR_CHK_SUM_NONE                        NET_UDP_HDR_CHK_SUM_POS_ZERO
+
+
+/*
+*********************************************************************************************************
+*                                    UDP DATA/TOTAL LENGTH DEFINES
+*
+* Note(s) : (1) (a) UDP total length #define's (NET_UDP_TOT_LEN)  relate to the total size of a complete
+*                   UDP packet, including the packet's UDP header.  Note that a complete UDP packet MAY
+*                   be fragmented in multiple Internet Protocol packets.
+*
+*               (b) UDP data  length #define's (NET_UDP_DATA_LEN) relate to the data  size of a complete
+*                   UDP packet, equal to the total UDP packet length minus its UDP header size.  Note
+*                   that a complete UDP packet MAY be fragmented in multiple Internet Protocol packets.
+*********************************************************************************************************
+*/
+
+                                                                                /* See Notes #1a & #1b.                 */
+#define  NET_UDP_DATA_LEN_MIN                              0
+
+#define  NET_UDP_TOT_LEN_MIN                            (NET_UDP_HDR_SIZE      + NET_UDP_DATA_LEN_MIN )
+#if    defined(NET_IPv4_MODULE_EN)
+#define  NET_UDP_TOT_LEN_MAX                            (NET_IPv4_TOT_LEN_MAX  - NET_IPv4_HDR_SIZE_MIN)
+#define  NET_UDP_DATA_LEN_MAX                           (NET_UDP_TOT_LEN_MAX   - NET_UDP_HDR_SIZE     )
+#elif  defined(NET_IPv6_MODULE_EN)
+#define  NET_UDP_TOT_LEN_MAX                            (NET_IPv6_TOT_LEN_MAX  - NET_IPv6_HDR_SIZE)
+#define  NET_UDP_DATA_LEN_MAX                           (NET_UDP_TOT_LEN_MAX   - NET_UDP_HDR_SIZE     )
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          UDP FLAG DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ NET UDP FLAGS ------------------- */
+#define  NET_UDP_FLAG_NONE                        DEF_BIT_NONE
+
+                                                                /* ------------------ UDP TX  FLAGS ------------------- */
+#define  NET_UDP_FLAG_TX_CHK_SUM_DIS              DEF_BIT_00    /* DISABLE tx        chk sums.                          */
+#define  NET_UDP_FLAG_TX_BLOCK                    DEF_BIT_07
+
+                                                                /* ------------------ UDP RX  FLAGS ------------------- */
+#define  NET_UDP_FLAG_RX_CHK_SUM_NONE_DISCARD     DEF_BIT_08    /* Discard rx'd NULL chk sum UDP datagrams.             */
+#define  NET_UDP_FLAG_RX_DATA_PEEK                DEF_BIT_09
+#define  NET_UDP_FLAG_RX_BLOCK                    DEF_BIT_15
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      UDP PORT NUMBER DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_PORT_NBR  NET_UDP_PORT_NBR;                        /* Defines UDP port nbr size.                           */
+
+
+/*
+*********************************************************************************************************
+*                                         UDP FLAGS DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  NET_FLAGS  NET_UDP_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                                             UDP HEADER
+*
+* Note(s) : (1) See RFC #768, Section 'Format' for UDP datagram header format.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- NET UDP HDR -------------------- */
+typedef  struct  net_udp_hdr {
+    NET_UDP_PORT_NBR        PortSrc;                            /* UDP datagram src  port.                              */
+    NET_UDP_PORT_NBR        PortDest;                           /* UDP datagram dest port.                              */
+    CPU_INT16U              DatagramLen;                        /* UDP datagram msg len.                                */
+    NET_CHK_SUM             ChkSum;                             /* UDP datagram chk sum.                                */
+} NET_UDP_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                          UDP PSEUDO-HEADER
+*
+* Note(s) : (1) See RFC #768, Section 'Fields : Checksum' for UDP datagram pseudo-header format.
+*********************************************************************************************************
+*/
+
+                                                                /* ---------------- NET UDP PSEUDO-HDR ---------------- */
+typedef  struct  net_udp_pseudo_hdr {
+    NET_IPv4_ADDR           AddrSrc;                            /* UDP datagram src  addr.                              */
+    NET_IPv4_ADDR           AddrDest;                           /* UDP datagram dest addr.                              */
+    CPU_INT08U              Zero;                               /* Field MUST be zero'd; i.e. ALL bits clr'd.           */
+    CPU_INT08U              Protocol;                           /* UDP datagram protocol.                               */
+    CPU_INT16U              DatagramLen;                        /* UDP datagram tot len.                                */
+} NET_UDP_PSEUDO_HDR;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+
+void        NetUDP_Init            (void);
+
+
+                                                                /* --------------------- RX FNCTS --------------------- */
+void        NetUDP_Rx              (NET_BUF           *pbuf,
+                                    NET_ERR           *p_err);
+
+CPU_INT16U  NetUDP_RxAppData       (NET_BUF           *pbuf,
+                                    void              *pdata_buf,
+                                    CPU_INT16U         data_buf_len,
+                                    NET_UDP_FLAGS      flags,
+                                    void              *pip_opts_buf,
+                                    CPU_INT08U         ip_opts_buf_len,
+                                    CPU_INT08U        *pip_opts_len,
+                                    NET_ERR           *p_err);
+
+
+                                                                /* --------------------- TX FNCTS --------------------- */
+CPU_INT16U  NetUDP_TxAppDataIPv4 (void              *p_data,
+                                  CPU_INT16U         data_len,
+                                  NET_IPv4_ADDR      src_addr,
+                                  NET_UDP_PORT_NBR   src_port,
+                                  NET_IPv4_ADDR      dest_addr,
+                                  NET_UDP_PORT_NBR   dest_port,
+                                  NET_IPv4_TOS       TOS,
+                                  NET_IPv4_TTL       TTL,
+                                  NET_UDP_FLAGS      flags_udp,
+                                  NET_IPv4_FLAGS     flags_ip,
+                                  void              *popts_ip,
+                                  NET_ERR           *p_err);
+
+CPU_INT16U  NetUDP_TxAppDataIPv6 (void                    *p_data,
+                                  CPU_INT16U               data_len,
+                                  NET_IPv6_ADDR           *p_src_addr,
+                                  NET_UDP_PORT_NBR         src_port,
+                                  NET_IPv6_ADDR           *p_dest_addr,
+                                  NET_UDP_PORT_NBR         dest_port,
+                                  NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                  NET_IPv6_FLOW_LABEL      flow_label,
+                                  NET_IPv6_HOP_LIM         hop_lim,
+                                  NET_UDP_FLAGS            flags_udp,
+                                  NET_ERR                 *p_err);
+
+CPU_INT16U  NetUDP_TxAppDataHandlerIPv4(void               *p_data,
+                                        CPU_INT16U          data_len,
+                                        NET_IPv4_ADDR       src_addr,
+                                        NET_UDP_PORT_NBR    src_port,
+                                        NET_IPv4_ADDR       dest_addr,
+                                        NET_UDP_PORT_NBR    dest_port,
+                                        NET_IPv4_TOS        TOS,
+                                        NET_IPv4_TTL        TTL,
+                                        NET_UDP_FLAGS       flags_udp,
+                                        NET_IPv4_FLAGS      flags_ip,
+                                        void               *popts_ip,
+                                        NET_ERR            *p_err);
+
+CPU_INT16U  NetUDP_TxAppDataHandlerIPv6(void                    *p_data,
+                                        CPU_INT16U               data_len,
+                                        NET_IPv6_ADDR           *p_src_addr,
+                                        NET_UDP_PORT_NBR         src_port,
+                                        NET_IPv6_ADDR           *p_dest_addr,
+                                        NET_UDP_PORT_NBR         dest_port,
+                                        NET_IPv6_TRAFFIC_CLASS   traffic_class,
+                                        NET_IPv6_FLOW_LABEL      flow_label,
+                                        NET_IPv6_HOP_LIM         hop_lim,
+                                        NET_UDP_FLAGS            flags_udp,
+                                        NET_ERR                 *p_err);
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#ifndef  NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN
+#error  "NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN        not #define'd in 'net_cfg.h'"
+#error  "                                   [MUST be  DEF_DISABLED]           "
+#error  "                                   [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN != DEF_DISABLED) && \
+        (NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN != DEF_ENABLED ))
+#error  "NET_UDP_CFG_RX_CHK_SUM_DISCARD_EN  illegally #define'd in 'net_cfg.h'"
+#error  "                                   [MUST be  DEF_DISABLED]           "
+#error  "                                   [     ||  DEF_ENABLED ]           "
+#endif
+
+
+
+#ifndef  NET_UDP_CFG_TX_CHK_SUM_EN
+#error  "NET_UDP_CFG_TX_CHK_SUM_EN                not #define'd in 'net_cfg.h'"
+#error  "                                   [MUST be  DEF_DISABLED]           "
+#error  "                                   [     ||  DEF_ENABLED ]           "
+
+#elif  ((NET_UDP_CFG_TX_CHK_SUM_EN != DEF_DISABLED) && \
+        (NET_UDP_CFG_TX_CHK_SUM_EN != DEF_ENABLED ))
+#error  "NET_UDP_CFG_TX_CHK_SUM_EN          illegally #define'd in 'net_cfg.h'"
+#error  "                                   [MUST be  DEF_DISABLED]           "
+#error  "                                   [     ||  DEF_ENABLED ]           "
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif /* NET_UDP_MODULE_PRESENT */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_util.c b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_util.c
new file mode 100644
index 0000000..be03239
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_util.c
@@ -0,0 +1,1698 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK UTILITY LIBRARY
+*
+* Filename      : net_util.c
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*                 EHS
+*********************************************************************************************************
+* Note(s)       : (1) NO compiler-supplied standard library functions are used by the network protocol suite.
+*                     'net_util.*' implements ALL network-specific library functions.
+*
+*                     See also 'net.h  NETWORK INCLUDE FILES  Note #3'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_UTIL_MODULE
+#include  
+#include  
+#include  "net_util.h"
+#include  "net_buf.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  NET_UTIL_16_BIT_ONES_CPL_NEG_ZERO            0xFFFFu
+#define  NET_UTIL_32_BIT_ONES_CPL_NEG_ZERO        0xFFFFFFFFu
+
+#define  NET_UTIL_16_BIT_SUM_ERR_NONE             DEF_BIT_NONE
+#define  NET_UTIL_16_BIT_SUM_ERR_NULL_SIZE        DEF_BIT_01
+#define  NET_UTIL_16_BIT_SUM_ERR_LAST_OCTET       DEF_BIT_02
+
+
+/*
+*********************************************************************************************************
+*                                           CRC-32 DEFINES
+*
+* Note(s) : (1) IEEE 802.3 CRC-32 uses the following binary polynomial :
+*
+*               (a) x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10
+*                        + x^8  + x^7  + x^5  + x^4  + x^2  + x^1  + x^0
+*********************************************************************************************************
+*/
+
+#define  NET_UTIL_32_BIT_CRC_POLY                 0x04C11DB7u   /*  = 0000 0100 1100 0001 0001 1101 1011 0111           */
+#define  NET_UTIL_32_BIT_CRC_POLY_REFLECT         0xEDB88320u   /*  = 1110 1101 1011 1000 1000 0011 0010 0000           */
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*
+* Note(s): (1) This table represents the alphabet for the base-64 encoder.
+*********************************************************************************************************
+*/
+                                                                /* See Note #1.                                         */
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+
+static  void        NetUtil_RandSetSeed            (void);
+
+
+static  CPU_INT32U  NetUtil_16BitSumHdrCalc        (void         *phdr,
+                                                    CPU_INT16U    hdr_size);
+
+static  CPU_INT32U  NetUtil_16BitSumDataCalc       (void         *p_data,
+                                                    CPU_INT16U    data_size,
+                                                    CPU_INT08U   *poctet_prev,
+                                                    CPU_INT08U   *poctet_last,
+                                                    CPU_BOOLEAN   prev_octet_valid,
+                                                    CPU_BOOLEAN   last_pkt_buf,
+                                                    CPU_INT08U   *psum_err);
+
+static  CPU_INT16U  NetUtil_16BitOnesCplSumDataCalc(void         *pdata_buf,
+                                                    void         *ppseudo_hdr,
+                                                    CPU_INT16U    pseudo_hdr_size,
+                                                    NET_ERR      *p_err);
+
+/*
+*********************************************************************************************************
+*                                 NetUtil_16BitOnesCplChkSumHdrCalc()
+*
+* Description : Calculate 16-bit one's-complement check-sum on packet header.
+*
+*               (1) See RFC #1071, Sections 1, 2.(1), & 4.1 for summary of 16-bit one's-complement
+*                   check-sum & algorithm.
+*
+*               (2) To correctly calculate 16-bit one's-complement check-sums on memory buffers of any
+*                   octet-length & word-alignment, the check-sums MUST be calculated in network-order
+*                   on headers that are arranged in network-order (see also 'NetUtil_16BitSumHdrCalc()
+*                   Note #5b').
+*
+*
+* Argument(s) : phdr        Pointer to packet header.
+*
+*               hdr_size    Size    of packet header.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UTIL_ERR_NONE           Check-sum calculated; check return value.
+*                               NET_UTIL_ERR_NULL_PTR       Argument 'phdr'     passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE      Argument 'hdr_size' passed a zero size.
+*
+* Return(s)   : 16-bit one's-complement check-sum, if NO error(s).
+*
+*               0,                                 otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (3) (a) Since the 16-bit sum calculation is returned as a 32-bit network-order value
+*                       (see 'NetUtil_16BitSumHdrCalc()  Note #5c1'), ...
+*
+*                   (b) ... the final check-sum MUST be converted to host-order but MUST NOT be re-
+*                       converted back to network-order (see 'NetUtil_16BitSumHdrCalc()  Note #5c3').
+*********************************************************************************************************
+*/
+
+NET_CHK_SUM  NetUtil_16BitOnesCplChkSumHdrCalc (void        *phdr,
+                                                CPU_INT16U   hdr_size,
+                                                NET_ERR     *p_err)
+{
+    CPU_INT32U   sum;
+    NET_CHK_SUM  chk_sum;
+    NET_CHK_SUM  chk_sum_host;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (phdr == (void *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+                                                                /* ------------------ VALIDATE SIZE ------------------- */
+    if (hdr_size < 1) {
+       *p_err =  NET_UTIL_ERR_NULL_SIZE;
+        return (0u);
+    }
+#endif
+
+                                                                /* --------- CALC HDR'S 16-BIT ONE'S-CPL SUM ---------- */
+    sum = NetUtil_16BitSumHdrCalc(phdr, hdr_size);              /* Calc  16-bit sum (see Note #3a).                     */
+
+    while (sum >> 16u) {                                        /* While 16-bit sum ovf's, ...                          */
+        sum = (sum & 0x0000FFFFu) + (sum >> 16u);               /* ... sum ovf bits back into 16-bit one's-cpl sum.     */
+    }
+
+
+    chk_sum      = (NET_CHK_SUM)(~((NET_CHK_SUM)sum));          /* Perform one's cpl on one's-cpl sum.                  */
+    chk_sum_host =  NET_UTIL_NET_TO_HOST_16(chk_sum);           /* Conv back to host-order (see Note #3b).              */
+
+   *p_err        =  NET_UTIL_ERR_NONE;
+
+    return (chk_sum_host);                                      /* Rtn 16-bit chk sum (see Note #3).                    */
+}
+
+
+/*
+*********************************************************************************************************
+*                                 NetUtil_16BitOnesCplChkSumHdrVerify()
+*
+* Description : (1) Verify 16-bit one's-complement check-sum on packet header :
+*
+*                   (a) Calculate one's-complement sum on packet header
+*                   (b) Verify check-sum by comparison of one's-complement sum to one's-complement
+*                         '-0' value (negative zero)
+*
+*               (2) See RFC #1071, Sections 1, 2.(1), & 4.1 for summary of 16-bit one's-complement
+*                   check-sum & algorithm.
+*
+*               (3) To correctly calculate 16-bit one's-complement check-sums on memory buffers of any
+*                   octet-length & word-alignment, the check-sums MUST be calculated in network-order
+*                   on headers that are arranged in network-order (see also 'NetUtil_16BitSumHdrCalc()
+*                   Note #5b').
+*
+*
+* Argument(s) : phdr        Pointer to packet header.
+*
+*               hdr_size    Size    of packet header.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UTIL_ERR_NONE           Check-sum verified; check return value.
+*                               NET_UTIL_ERR_NULL_PTR       Argument 'phdr'     passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE      Argument 'hdr_size' passed a zero size.
+*
+* Return(s)   : DEF_OK,   if valid check-sum.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (4) (a) Since the 16-bit sum calculation is returned as a 32-bit network-order value
+*                       (see 'NetUtil_16BitSumHdrCalc()  Note #5c1'), ...
+*
+*                   (b) ... the check-sum MUST be converted to host-order but MUST NOT be re-converted
+*                       back to network-order for the final check-sum comparison
+*                       (see 'NetUtil_16BitSumHdrCalc()  Note #5c3').
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetUtil_16BitOnesCplChkSumHdrVerify (void        *phdr,
+                                                  CPU_INT16U   hdr_size,
+                                                  NET_ERR     *p_err)
+{
+    CPU_INT32U   sum;
+    NET_CHK_SUM  chk_sum;
+    NET_CHK_SUM  chk_sum_host;
+    CPU_BOOLEAN  valid;
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (phdr == (void *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (DEF_FAIL);
+    }
+                                                                /* ------------------ VALIDATE SIZE ------------------- */
+    if (hdr_size < 1) {
+       *p_err =  NET_UTIL_ERR_NULL_SIZE;
+        return (DEF_FAIL);
+    }
+#endif
+
+                                                                /* -------- VERIFY HDR'S 16-BIT ONE'S-CPL SUM --------- */
+    sum = NetUtil_16BitSumHdrCalc(phdr, hdr_size);              /* Calc 16-bit sum (see Note #4a).                      */
+
+    while (sum >> 16u) {                                        /* While 16-bit sum ovf's, ...                          */
+        sum = (sum & 0x0000FFFFu) + (sum >> 16u);               /* ... sum ovf bits back into 16-bit one's-cpl sum.     */
+    }
+
+    chk_sum      = (NET_CHK_SUM)sum;
+    chk_sum_host =  NET_UTIL_NET_TO_HOST_16(chk_sum);           /* Conv back to host-order (see Note #4b).              */
+
+                                                                /* Verify chk sum (see Note #1b).                       */
+    valid        = (chk_sum_host == NET_UTIL_16_BIT_ONES_CPL_NEG_ZERO) ? DEF_OK : DEF_FAIL;
+
+   *p_err        =  NET_UTIL_ERR_NONE;
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                NetUtil_16BitOnesCplChkSumDataCalc()
+*
+* Description : Calculate 16-bit one's-complement check-sum on packet data.
+*
+*               (1) See RFC #1071, Sections 1, 2.(1), & 4.1 for summary of 16-bit one's-complement
+*                   check-sum & algorithm.
+*
+*               (2) Check-sum calculated on packet data encapsulated in :
+*
+*                   (a) One or more network buffers             Support non-fragmented & fragmented packets
+*                   (b) Transport layer pseudo-header           See RFC #768, Section 'Fields : Checksum' &
+*                                                                   RFC #793, Section 3.1 'Header Format :
+*                                                                       Checksum'.
+*
+*               (3) To correctly calculate 16-bit one's-complement check-sums on memory buffers of any
+*                   octet-length & word-alignment, the check-sums MUST be calculated in network-order on
+*                   data & headers that are arranged in network-order (see also 'NetUtil_16BitSumDataCalc()
+*                   Note #5b').
+*
+*
+* Argument(s) : pdata_buf           Pointer to packet data network buffer(s) (see Note #2a).
+*
+*               ppseudo_hdr         Pointer to transport layer pseudo-header (see Note #2b).
+*
+*               pseudo_hdr_size     Size    of transport layer pseudo-header.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UTIL_ERR_NONE               Check-sum calculated; check return value.
+*
+*                                                               - RETURNED BY NetUtil_16BitOnesCplSumDataCalc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Packet data is a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index.
+*
+* Return(s)   : 16-bit one's-complement check-sum, if NO error(s).
+*
+*               0,                                 otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (4) (a) Since the 16-bit one's-complement check-sum calculations are returned in host-
+*                       order, ...
+*
+*                   (b) ... the returned check-sum MUST NOT be re-converted back to network-order.
+*
+*                   See also 'NetUtil_16BitSumDataCalc()         Note #5c3' &
+*                            'NetUtil_16BitOnesCplSumDataCalc()  Note #5'.
+*********************************************************************************************************
+*/
+
+NET_CHK_SUM  NetUtil_16BitOnesCplChkSumDataCalc (void        *pdata_buf,
+                                                 void        *ppseudo_hdr,
+                                                 CPU_INT16U   pseudo_hdr_size,
+                                                 NET_ERR     *p_err)
+{
+    CPU_INT16U   sum;
+    NET_CHK_SUM  chk_sum;
+
+                                                                /* Calc 16-bit one's-cpl sum (see Note #4a).            */
+    sum = NetUtil_16BitOnesCplSumDataCalc(pdata_buf, ppseudo_hdr, pseudo_hdr_size, p_err);
+    if (*p_err != NET_UTIL_ERR_NONE) {
+         return (0u);
+    }
+
+    chk_sum = (NET_CHK_SUM)(~((NET_CHK_SUM)sum));               /* Perform one's cpl on one's-cpl sum.                  */
+
+   *p_err   =  NET_UTIL_ERR_NONE;
+
+    return (chk_sum);                                           /* Rtn 16-bit chk sum (see Note #4).                    */
+}
+
+
+/*
+*********************************************************************************************************
+*                               NetUtil_16BitOnesCplChkSumDataVerify()
+*
+* Description : (1) Verify 16-bit one's-complement check-sum on packet data :
+*
+*                   (a) Calculate one's-complement sum on packet data & packet pseudo-header
+*                   (b) Verify check-sum by comparison of one's-complement sum to one's-complement
+*                         '-0' value (negative zero)
+*
+*               (2) See RFC #1071, Sections 1, 2.(1), & 4.1 for summary of 16-bit one's-complement
+*                   check-sum & algorithm.
+*
+*               (3) Check-sum calculated on packet data encapsulated in :
+*
+*                   (a) One or more network buffers             Support non-fragmented & fragmented packets
+*                   (b) Transport layer pseudo-header           See RFC #768, Section 'Fields : Checksum' &
+*                                                                   RFC #793, Section 3.1 'Header Format :
+*                                                                       Checksum'.
+*
+*               (4) To correctly calculate 16-bit one's-complement check-sums on memory buffers of any
+*                   octet-length & word-alignment, the check-sums MUST be calculated in network-order on
+*                   data & headers that are arranged in network-order (see also 'NetUtil_16BitSumDataCalc()
+*                   Note #5b').
+*
+*
+* Argument(s) : pdata_buf           Pointer to packet data network buffer(s) (see Note #3a).
+*
+*               ppseudo_hdr         Pointer to transport layer pseudo-header (see Note #3b).
+*
+*               pseudo_hdr_size     Size    of transport layer pseudo-header.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UTIL_ERR_NONE               Check-sum calculated; check return value.
+*
+*                                                               - RETURNED BY NetUtil_16BitOnesCplSumDataCalc() : -
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Packet data is a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index.
+*
+* Return(s)   : DEF_OK,   if valid check-sum.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (5) (a) Since the 16-bit one's-complement check-sum calculations are returned in host-
+*                       order, ...
+*
+*                   (b) ... the returned check-sum MUST NOT be re-converted back to network-order for
+*                       the final check-sum comparison.
+*
+*                   See also 'NetUtil_16BitSumDataCalc()         Note #5c3' &
+*                            'NetUtil_16BitOnesCplSumDataCalc()  Note #5'.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  NetUtil_16BitOnesCplChkSumDataVerify (void        *pdata_buf,
+                                                   void        *ppseudo_hdr,
+                                                   CPU_INT16U   pseudo_hdr_size,
+                                                   NET_ERR     *p_err)
+{
+    CPU_INT16U   sum;
+    NET_CHK_SUM  chk_sum;
+    CPU_BOOLEAN  valid;
+
+                                                                /* Calc 16-bit one's-cpl sum (see Note #5a).            */
+    sum = NetUtil_16BitOnesCplSumDataCalc(pdata_buf, ppseudo_hdr, pseudo_hdr_size, p_err);
+    if (*p_err != NET_UTIL_ERR_NONE) {
+         return (DEF_FAIL);
+    }
+                                                                /* Verify chk sum (see Notes #1b & #5b).                */
+    chk_sum = (NET_CHK_SUM)sum;
+    valid   = (chk_sum == NET_UTIL_16_BIT_ONES_CPL_NEG_ZERO) ? DEF_OK : DEF_FAIL;
+
+   *p_err   =  NET_UTIL_ERR_NONE;
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetUtil_32BitCRC_Calc()
+*
+* Description : Calculate 32-bit CRC.
+*
+* Argument(s) : p_data      Pointer to data to CRC.
+*
+*               data_len    Length  of data to CRC.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UTIL_ERR_NONE               32-bit CRC successfully calculated;
+*                                                                   check return value.
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'p_data'   passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'data_len' passed a NULL size.
+*
+* Return(s)   : 32-bit CRC, if NO error(s).
+*
+*               0,          otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function but MAY be called by
+*               application function(s).
+*
+* Note(s)     : (1) IEEE 802.3 CRC-32 uses the following binary polynomial :
+*
+*                   (a) x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10
+*                            + x^8  + x^7  + x^5  + x^4  + x^2  + x^1  + x^0
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetUtil_32BitCRC_Calc (CPU_INT08U  *p_data,
+                                   CPU_INT32U   data_len,
+                                   NET_ERR     *p_err)
+{
+    CPU_INT32U   crc;
+    CPU_INT32U   poly;
+    CPU_INT32U   crc_data_val;
+    CPU_INT32U   crc_data_val_bit_zero;
+    CPU_INT32U   i;
+    CPU_INT32U   j;
+    CPU_INT08U  *pdata_val;
+
+
+#if (NET_ERR_CFG_ARG_CHK_EXT_EN == DEF_ENABLED)
+                                                                /* ------------------ VALIDATE PTR -------------------- */
+    if (p_data == (CPU_INT08U *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+                                                                /* ------------------ VALIDATE SIZE ------------------- */
+    if (data_len < 1) {
+       *p_err =  NET_UTIL_ERR_NULL_SIZE;
+        return (0u);
+    }
+#endif
+
+                                                                /* ----------------- CALC 32-BIT CRC ------------------ */
+    crc  = NET_UTIL_32_BIT_ONES_CPL_NEG_ZERO;                   /* Init CRC to neg zero.                                */
+    poly = NET_UTIL_32_BIT_CRC_POLY_REFLECT;                    /* Init reflected poly.                                 */
+
+    pdata_val = p_data;
+    for (i = 0u; i < data_len; i++) {
+        crc_data_val = (CPU_INT32U)((crc ^ *pdata_val) & DEF_OCTET_MASK);
+
+        for (j = 0u; j < DEF_OCTET_NBR_BITS; j++) {
+            crc_data_val_bit_zero = crc_data_val & DEF_BIT_00;
+            if (crc_data_val_bit_zero > 0) {
+                crc_data_val = (crc_data_val >> 1u) ^ poly;
+            } else {
+                crc_data_val = (crc_data_val >> 1u);
+            }
+        }
+
+        crc = (crc >> DEF_OCTET_NBR_BITS) ^ crc_data_val;
+        pdata_val++;
+    }
+
+
+   *p_err =  NET_UTIL_ERR_NONE;
+
+    return (crc);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetUtil_32BitCRC_CalcCpl()
+*
+* Description : Calculate 32-bit CRC with complement.
+*
+* Argument(s) : p_data      Pointer to data to CRC.
+*
+*               data_len    Length  of data to CRC.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UTIL_ERR_NONE               32-bit complemented CRC successfully
+*                                                                   calculated; check return value.
+*
+*                                                               - RETURNED BY NetUtil_32BitCRC_Calc() : --
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'p_data'   passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Argument 'data_len' passed a NULL size.
+*
+* Return(s)   : 32-bit complemented CRC, if NO error(s).
+*
+*               0,                       otherwise.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function but MAY be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetUtil_32BitCRC_CalcCpl (CPU_INT08U  *p_data,
+                                      CPU_INT32U   data_len,
+                                      NET_ERR     *p_err)
+{
+    CPU_INT32U  crc;
+
+
+    crc = NetUtil_32BitCRC_Calc(p_data, data_len, p_err);       /* Calc CRC.                                            */
+    if (*p_err != NET_UTIL_ERR_NONE) {
+         return (0u);
+    }
+
+    crc ^= NET_UTIL_32_BIT_ONES_CPL_NEG_ZERO;                   /* Cpl  CRC.                                            */
+
+   *p_err = NET_UTIL_ERR_NONE;
+
+    return (crc);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetUtil_32BitReflect()
+*
+* Description : Calculate 32-bit reflection.
+*
+* Argument(s) : val       32-bit value to reflect.
+*
+* Return(s)   : 32-bit reflection.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function but MAY be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetUtil_32BitReflect (CPU_INT32U  val)
+{
+    CPU_INT32U  val_reflect;
+    CPU_INT32U  bit;
+    CPU_INT32U  bit_nbr;
+    CPU_INT32U  bit_val;
+    CPU_INT32U  bit_reflect;
+    CPU_DATA    i;
+
+
+    val_reflect = 0u;
+    bit_nbr     = sizeof(val) * DEF_OCTET_NBR_BITS;
+    bit         = DEF_BIT(0u);
+    bit_reflect = DEF_BIT(bit_nbr - 1u);
+
+    for (i = 0u; i < bit_nbr; i++) {
+        bit_val = val & bit;
+        if (bit_val > 0) {                                      /* If val's bit set, ...                                */
+            val_reflect |= bit_reflect;                         /* ... set corresponding reflect bit.                   */
+        }
+        bit         <<= 1u;
+        bit_reflect >>= 1u;
+    }
+
+    return (val_reflect);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetUtil_TS_Get()
+*
+* Description : Get current Internet Timestamp.
+*
+*               (1) "The Timestamp is a right-justified, 32-bit timestamp in milliseconds since midnight
+*                    UT [Universal Time]" (RFC #791, Section 3.1 'Options : Internet Timestamp').
+*
+*               (2) The developer is responsible for providing a real-time clock with correct time-zone
+*                   configuration to implement the Internet Timestamp, if possible.
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : Internet Timestamp.
+*
+* Caller(s)   : various.
+*
+*               This function is an INTERNAL network protocol suite function but MAY be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+NET_TS  NetUtil_TS_Get (void)
+{
+    NET_TS  ts;
+
+
+    ts = (NET_TS) NetUtil_TS_Get_ms();
+
+    return (ts);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetUtil_TS_Get_ms()
+*
+* Description : Get current millisecond timestamp.
+*
+*               (1) (a) (1) Although RFC #2988, Section 4 states that "there is no requirement for the
+*                           clock granularity G used for computing [TCP] RTT measurements ... experience
+*                           has shown that finer clock granularities (<= 100 msec) perform somewhat
+*                           better than more coarse granularities".
+*
+*                       (2) (A) RFC #2988, Section 2.4 states that "whenever RTO is computed, if it is
+*                               less than 1 second then the RTO SHOULD be rounded up to 1 second".
+*
+*                           (B) RFC #1122, Section 4.2.3.1 states that "the recommended ... RTO ... upper
+*                               bound should be 2*MSL" where RFC #793, Section 3.3 'Sequence Numbers :
+*                               Knowing When to Keep Quiet' states that "the Maximum Segment Lifetime
+*                               (MSL) is ... to be 2 minutes".
+*
+*                               Therefore, the required upper bound is :
+*
+*                                   2 * MSL = 2 * 2 minutes = 4 minutes = 240 seconds
+*
+*                   (b) Therefore, the developer is responsible for providing a timestamp clock with
+*                       adequate resolution to satisfy the clock granularity (see Note #1a1) & adequate
+*                       range to satisfy the minimum/maximum TCP RTO values  (see Note #1a2).
+*
+* Argument(s) : none.
+*
+* Return(s)   : Timestamp, in milliseconds.
+*
+* Caller(s)   : NetIF_PerfMonHandler(),
+*               NetTCP_RxPktValidate(),
+*               NetTCP_TxPktPrepareHdr().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (2) (a) To avoid  timestamp calculation overflow, timestamps are updated by continually
+*                       summing OS time tick delta differences converted into milliseconds :
+*
+*                                  Total                       [                        1000 ms/sec  ]
+*                           (A)  Timestamp  =    Summation     [ (time  - time   )  *  ------------- ]
+*                                 (in ms)     i = 1 --> i = N  [      i       i-1       M ticks/sec  ]
+*
+*
+*                                   where
+*                                           time        Instantaneous time value (in OS ticks/second)
+*                                           M           Number of OS time ticks per second
+*
+*
+*                       (1) However, multiplicative overflow is NOT totally avoided if the product of
+*                           the OS time tick delta difference & the constant time scalar (i.e. 1000
+*                           milliseconds per second) overflows the integer data type :
+*
+*                           (A)                 (time_delta * time_scalar)  >=  2^N
+*
+*                                   where
+*                                           time_delta      Calculated time delta difference
+*                                           time_scalar     Constant   time scalar (e.g. 1000 ms/1 sec)
+*                                           N               Number of data type bits (e.g. 32)
+*
+*
+*                   (b) To ensure timestamp calculation accuracy, timestamp calculations sum timestamp
+*                       integer remainders back into total accumulated timestamp :
+*
+*                                  Total                         [                        1000 ms/sec  ]
+*                           (A)  Timestamp  =      Summation     [ (time  - time   )  *  ------------- ]
+*                                 (in ms)       i = 1 --> i = N  [      i       i-1       M ticks/sec  ]
+*
+*                                                                [                                     ]
+*                                                  Summation     [ (time  - time   )  *   1000 ms/sec  ]  modulo  (M ticks/sec)
+*                                               i = 1 --> i = N  [      i       i-1                    ]
+*                                           +  ---------------------------------------------------------------------------------
+*
+*                                                                                M ticks/sec
+*
+*
+*                                   where
+*                                           time        Instantaneous time value (in OS ticks/second)
+*                                           M           Number of OS time ticks per second
+*
+*
+*                       (1) However, these calculations are required only when the OS time ticks per
+*                           second rate is not an integer multiple of the constant time scalar (i.e.
+*                           1000 milliseconds per second).
+*********************************************************************************************************
+*/
+
+NET_TS_MS  NetUtil_TS_Get_ms (void)
+{
+#if CPU_CFG_TS_32_EN == DEF_ENABLED
+    static  CPU_BOOLEAN      ts_active           = DEF_NO;
+            CPU_INT32U       ts_delta;
+    static  CPU_INT32U       ts_prev             = 0u;
+            CPU_TS32         ts_cur;
+            CPU_TS_TMR_FREQ  ts_tmr_freq;
+    static  NET_TS_MS        ts_ms_tot           = 0u;
+    static  NET_TS_MS        ts_ms_delta_rem_tot = 0u;
+            NET_TS_MS        ts_ms_delta_rem_ovf;
+            NET_TS_MS        ts_ms_delta_rem;
+            NET_TS_MS        ts_ms_delta_num;
+            NET_TS_MS        ts_ms_delta;
+            CPU_ERR          err;
+
+
+    ts_cur      = CPU_TS_Get32();
+    ts_tmr_freq = CPU_TS_TmrFreqGet(&err);
+    if (err != CPU_ERR_NONE) {
+        ts_tmr_freq = 0;
+    }
+
+
+    if (ts_tmr_freq > 0u) {
+        if (ts_active == DEF_YES) {                                     /* If active, calc & update ts :                */
+            ts_delta = ts_cur - ts_prev;                                /*     Calc time delta (in TS).                 */
+
+            if ((DEF_TIME_NBR_mS_PER_SEC >= ts_tmr_freq) &&
+               ((DEF_TIME_NBR_mS_PER_SEC %  ts_tmr_freq) == 0u)) {
+                                                                        /*     Calc   ts delta (in ms).                 */
+                ts_ms_delta          = (NET_TS_MS)(ts_delta * (DEF_TIME_NBR_mS_PER_SEC / ts_tmr_freq));
+                ts_ms_tot           += (NET_TS_MS) ts_ms_delta;         /*     Update ts tot   (in ms) [see Note #2a].  */
+
+            } else {
+                                                                        /*     Calc   ts delta (in ms) [see Note #2a1]. */
+                ts_ms_delta_num      = (NET_TS_MS)(ts_delta        * DEF_TIME_NBR_mS_PER_SEC);
+                ts_ms_delta          = (NET_TS_MS)(ts_ms_delta_num / ts_tmr_freq);
+                ts_ms_tot           += (NET_TS_MS) ts_ms_delta;         /*     Update ts tot   (in ms) [see Note #2a].  */
+                                                                        /*     Calc   ts delta rem ovf (in ms) ...      */
+                ts_ms_delta_rem      = (NET_TS_MS)(ts_ms_delta_num % ts_tmr_freq);
+                ts_ms_delta_rem_tot +=  ts_ms_delta_rem;
+                ts_ms_delta_rem_ovf  =  ts_ms_delta_rem_tot / ts_tmr_freq;
+                ts_ms_delta_rem_tot -=  ts_ms_delta_rem_ovf * ts_tmr_freq;
+                ts_ms_tot           +=  ts_ms_delta_rem_ovf;            /* ... & adj  ts tot by ovf    (see Note #2b).  */
+            }
+
+        } else {
+            ts_active = DEF_YES;
+        }
+
+        ts_prev  = ts_cur;                                              /* Save cur time for next ts update.            */
+
+    } else {
+        ts_ms_tot += (NET_TS_MS)ts_cur;
+    }
+
+
+    return (ts_ms_tot);
+#else
+    static  NET_TS_MS    ts_ms_delta_rem_tot = 0u;
+    static  CPU_BOOLEAN  ts_active           = DEF_NO;
+            NET_TS_MS    ts_ms_delta;
+    static  NET_TS_MS    ts_ms_tot           = 0u;
+            KAL_TICK     tick_cur;
+    static  KAL_TICK     tick_prev           = 0u;
+            KAL_TICK     tick_delta;
+            KAL_ERR      err;
+
+
+    tick_cur = KAL_TickGet(&err);
+   (void)&err;
+
+    if (KAL_TickRate > 0) {
+        if (ts_active == DEF_YES) {                             /* If active, calc & update ts :                        */
+
+            tick_delta =  tick_cur - tick_prev;                 /* Calc time delta (in OS ticks).                       */
+
+            if ( (DEF_TIME_NBR_mS_PER_SEC > KAL_TickRate)        &&
+                ((DEF_TIME_NBR_mS_PER_SEC % KAL_TickRate) == 0u)) {
+                                                                /* Calc   ts delta (in ms).                             */
+                ts_ms_delta          = (NET_TS_MS)(tick_delta  * (DEF_TIME_NBR_mS_PER_SEC / KAL_TickRate));
+                ts_ms_tot           += (NET_TS_MS) ts_ms_delta; /* Update ts tot   (in ms) [see Note #2a].              */
+
+            } else {
+                NET_TS_MS    ts_ms_delta_rem_ovf;
+                NET_TS_MS    ts_ms_delta_rem;
+                NET_TS_MS    ts_ms_delta_num;
+
+
+                                                                /* Calc   ts delta (in ms) [see Note #2a1].             */
+                ts_ms_delta_num      =  tick_delta   * DEF_TIME_NBR_mS_PER_SEC;
+                ts_ms_delta          =  ts_ms_delta_num / KAL_TickRate;
+                ts_ms_tot           +=  ts_ms_delta; /* Update ts tot   (in ms) [see Note #2a].              */
+                                                                /* Calc   ts delta rem ovf (in ms) ...                  */
+                ts_ms_delta_rem      =  ts_ms_delta_num % KAL_TickRate;
+                ts_ms_delta_rem_tot +=  ts_ms_delta_rem;
+                ts_ms_delta_rem_ovf  =  ts_ms_delta_rem_tot / KAL_TickRate;
+                ts_ms_delta_rem_tot -=  ts_ms_delta_rem_ovf * KAL_TickRate;
+                ts_ms_tot           +=  ts_ms_delta_rem_ovf;    /* ... & adj  ts tot by ovf    (see Note #2b).          */
+            }
+
+        } else {
+            ts_active = DEF_YES;
+        }
+
+        tick_prev = tick_cur;                                   /* Save cur time for next ts update.                    */
+
+    } else {
+        ts_ms_tot += tick_cur;
+    }
+
+    return (ts_ms_tot);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetUtil_TimeSec_uS_To_ms()
+*
+* Description : Convert seconds and microseconds values to milliseconds.
+*
+* Argument(s) : time_sec    seconds
+*
+*               time_us     microseconds
+*
+* Return(s)   : Number of milliseconds
+*
+* Caller(s)   : NetSock_Sel(),
+*               Net_TimeDly().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetUtil_TimeSec_uS_To_ms (CPU_INT32U  time_sec,
+                                      CPU_INT32U  time_us)
+{
+    CPU_INT32U  time_us_to_ms;
+    CPU_INT32U  time_us_to_ms_max;
+    CPU_INT32U  time_sec_to_ms;
+    CPU_INT32U  time_sec_to_ms_max;
+    CPU_INT32U  time_dly_ms;
+
+
+    if ((time_sec == NET_TMR_TIME_INFINITE) &&
+        (time_us  == NET_TMR_TIME_INFINITE)) {
+        time_dly_ms = NET_TMR_TIME_INFINITE;
+        goto exit;
+    }
+                                                                /* Calculate us time delay's millisecond value, ..      */
+                                                                /* .. rounded up to next millisecond.                   */
+    time_us_to_ms  = ((time_us % DEF_TIME_NBR_uS_PER_SEC) + ((DEF_TIME_NBR_uS_PER_SEC / DEF_TIME_NBR_mS_PER_SEC) - 1u))
+                                                          /  (DEF_TIME_NBR_uS_PER_SEC / DEF_TIME_NBR_mS_PER_SEC);
+    time_sec_to_ms =  time_sec * DEF_TIME_NBR_mS_PER_SEC;
+
+
+    time_us_to_ms_max  = DEF_INT_32U_MAX_VAL - time_sec_to_ms;
+    time_sec_to_ms_max = DEF_INT_32U_MAX_VAL - time_us_to_ms;
+
+    if ((time_us_to_ms  < time_us_to_ms_max) &&                 /* If NO        time delay integer overflow.            */
+        (time_sec_to_ms < time_sec_to_ms_max)) {
+
+         time_dly_ms = time_sec_to_ms + time_us_to_ms;
+
+    } else {                                                    /* Else limit to maximum time delay values.             */
+         time_dly_ms = NET_TMR_TIME_INFINITE;
+    }
+
+
+exit:
+    return (time_dly_ms);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetUtil_InitSeqNbrGet()
+*
+* Description : Initialize the TCP Transmit Initial Sequence Counter, 'NetTCP_TxSeqNbrCtr'.
+*
+*               (1) Possible initialization methods include :
+*
+*                   (a) Time-based initialization is one preferred method since it more appropriately
+*                       provides a pseudo-random initial sequence number.
+*                   (b) Hardware-generated random number initialization is NOT a preferred method since it
+*                       tends to produce a discrete set of pseudo-random initial sequence numbers--often
+*                       the same initial sequence number.
+*                   (c) Hard-coded initial sequence number is NOT a preferred method since it is NOT random.
+*
+*                   See also 'net_tcp.h  NET_TCP_TX_GET_SEQ_NBR()  Note #1'.
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_Init().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetUtil_InitSeqNbrGet (void)
+{
+#ifndef  NET_UTIL_INIT_SEQ_NBR_0
+    CPU_INT32U  val;
+    NetUtil_RandSetSeed();
+    val = Math_Rand();
+
+    return (val);
+#else
+    return (0u);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetUtil_RandomRangeGet()
+*
+* Description : Get a random value in a specific range
+*
+* Argument(s) : min     Minimum value
+*
+*               max     Maximum value
+*
+* Return(s)   : Random value in the specified range.
+*
+* Caller(s)   : NetSock_Init(),
+*               NetSock_RandomPortNbrGet().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  NetUtil_RandomRangeGet (CPU_INT32U  min,
+                                    CPU_INT32U  max)
+{
+    CPU_INT32U  val;
+    CPU_INT32U  diff;
+    CPU_INT32U  rand;
+
+
+
+    NetUtil_RandSetSeed();
+
+    diff = (max - min) + 1;
+    rand =  Math_Rand();
+
+    val  = rand % diff + min;
+
+    return (val);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         NetUtil_RandSetSeed()
+*
+* Description : Set the current pseudo-random number generator seed.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUtil_InitSeqNbrGet(),
+*               NetUtil_RandRange().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetUtil_RandSetSeed (void)
+{
+    CPU_INT32U  val;
+    KAL_ERR     err_kal;
+
+
+    val  = Math_Rand();
+#if CPU_CFG_TS_32_EN == DEF_ENABLED
+    val += (CPU_INT32U)CPU_TS_Get32();
+#else
+    val += (CPU_INT32U)KAL_TickGet(&err_kal);
+#endif
+
+   (void)&err_kal;
+
+   Math_RandSetSeed(val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetUtil_16BitSumHdrCalc()
+*
+* Description : Calculate 16-bit sum on packet header memory buffer.
+*
+*               (1) Calculates the sum of consecutive 16-bit values.
+*
+*               (2) 16-bit sum is returned as a 32-bit value to preserve possible 16-bit summation overflow
+*                   in the upper 16-bits.
+*
+*
+* Argument(s) : phdr        Pointer to packet header.
+*               ----        Argument checked in NetUtil_16BitOnesCplChkSumHdrCalc(),
+*                                               NetUtil_16BitOnesCplChkSumHdrVerify(),
+*                                               NetUtil_16BitOnesCplSumDataCalc().
+*
+*               hdr_size    Size    of packet header.
+*
+* Return(s)   : 16-bit sum (see Note #2), if NO error(s).
+*
+*               0,                        otherwise.
+*
+* Caller(s)   : NetUtil_16BitOnesCplChkSumHdrCalc(),
+*               NetUtil_16BitOnesCplChkSumHdrVerify(),
+*               NetUtil_16BitOnesCplSumDataCalc().
+*
+* Note(s)     : (3) Since many word-aligned processors REQUIRE that multi-octet words be located on word-
+*                   aligned addresses, 16-bit sum calculation MUST ensure that 16-bit words are accessed
+*                   on addresses that are multiples of 2 octets.
+*
+*                   If packet header memory buffer does NOT start on a 16-bit word address boundary, then
+*                   16-bit sum calculation MUST be performed by concatenating two consecutive 8-bit values.
+*
+*               (4) Modulo arithmetic is used to determine whether a memory buffer starts on the desired
+*                   word-aligned address boundary.
+*
+*                   Modulo arithmetic in ANSI-C REQUIREs operations performed on integer values.  Thus
+*                   address values MUST be cast to an appropriately-sized integer value PRIOR to any
+*                   modulo arithmetic operation.
+*
+*               (5) (a) Although "the sum of 16-bit integers can be computed in either byte order"
+*                       [RFC #1071, Section 2.(B)], the handling of odd-length &/or off-word-boundary
+*                       memory buffers is performed assuming network-order.
+*
+*                   (b) However, to correctly & consistently calculate 16-bit integer sums for even-/
+*                       odd-length & word-/off-word-boundary memory buffers, the sums MUST be calculated
+*                       in network-order.
+*
+*                   (c) (1) To preserve possible 16-bit summation overflow (see Note #2) during all check-
+*                           sum calculations, the 16-bit sum is returned as a 32-bit network-order value.
+*
+*                       (2) To encapsulate the network-order transform to the 16-bit check-sum calculations
+*                           ONLY, the final check-sum MUST be converted to host-order.
+*
+*                           See 'NetUtil_16BitOnesCplChkSumHdrCalc()    Note #3b' &
+*                               'NetUtil_16BitOnesCplChkSumHdrVerify()  Note #4b').
+*
+*                       (3) However, since network-to-host-order conversion & host-order memory access are
+*                           inverse operations, the final host-order check-sum value MUST NOT be converted
+*                           back to network-order for calculation or comparison.
+*
+*               (6) RFC #1071, Section 4.1 explicitly casts & sums the last odd-length octet in a check-sum
+*                   calculation as a 16-bit value.
+*
+*                   However, this contradicts the following sections which state that "if the total
+*                   length is odd, ... the last octet is padded on the right with ... one octet of zeros
+*                   ... to form a 16 bit word for ... purposes ... [of] computing the checksum" :
+*
+*                   (a) RFC #768, Section     'Fields                     : Checksum'
+*                   (b) RFC #792, Section     'Echo or Echo Reply Message : Checksum'
+*                   (c) RFC #793, Section 3.1 'Header Format              : Checksum'
+*
+*                   See also 'NetUtil_16BitSumDataCalc()  Note #8'.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetUtil_16BitSumHdrCalc (void        *phdr,
+                                             CPU_INT16U   hdr_size)
+{
+    CPU_INT32U   sum_32;
+    CPU_INT32U   sum_val_32;
+    CPU_INT16U   hdr_val_16;
+    CPU_INT16U   size_rem;
+    CPU_INT16U  *phdr_16;
+    CPU_INT08U  *phdr_08;
+    CPU_DATA     mod_16;
+
+                                                                    /* ---------------- VALIDATE SIZE ----------------- */
+    if (hdr_size < 1) {
+        return (0u);
+    }
+
+
+    size_rem =  hdr_size;
+    sum_32   =  0u;
+
+    mod_16   = (CPU_INT08U)((CPU_ADDR)phdr % sizeof(CPU_INT16U));   /* See Note #4.                                     */
+    if (mod_16 == 0u) {                                             /* If pkt hdr on 16-bit word boundary (see Note #3),*/
+        phdr_16 = (CPU_INT16U *)phdr;
+        while (size_rem >=  sizeof(CPU_INT16U)) {
+            hdr_val_16   = (CPU_INT16U)*phdr_16++;
+            sum_val_32   = (CPU_INT32U) NET_UTIL_HOST_TO_NET_16(hdr_val_16);    /* Conv to net-order (see Note #5b).    */
+            sum_32      += (CPU_INT32U) sum_val_32;                 /* ... calc sum with 16-bit data words.             */
+            size_rem    -= (CPU_INT16U) sizeof(CPU_INT16U);
+        }
+        phdr_08 = (CPU_INT08U *)phdr_16;
+
+    } else {                                                        /* Else if pkt hdr NOT on 16-bit word boundary, ... */
+        phdr_08 = (CPU_INT08U *)phdr;
+        while (size_rem >=  sizeof(CPU_INT16U)) {
+            sum_val_32   = (CPU_INT32U)*phdr_08++;
+            sum_val_32 <<=  DEF_OCTET_NBR_BITS;
+            sum_val_32  += (CPU_INT32U)*phdr_08++;
+            sum_32      += (CPU_INT32U) sum_val_32;                 /* ... calc sum with  8-bit data vals.              */
+            size_rem    -= (CPU_INT16U) sizeof(CPU_INT16U);
+        }
+    }
+
+    if (size_rem > 0) {                                             /* Sum last octet, if any (see Note #6).            */
+        sum_32 += ((CPU_INT32U)*phdr_08 << 8);
+    }
+
+
+    return (sum_32);                                                /* Rtn 16-bit sum (see Note #5c1).                  */
+}
+
+
+/*
+*********************************************************************************************************
+*                                     NetUtil_16BitSumDataCalc()
+*
+* Description : Calculate 16-bit sum on packet data memory buffer.
+*
+*               (1) Calculates the sum of consecutive 16-bit values.
+*
+*               (2) 16-bit sum is returned as a 32-bit value to preserve possible 16-bit summation overflow
+*                   in the upper 16-bits.
+*
+*
+* Argument(s) : p_data              Pointer to packet data.
+*               ------              Argument validated in NetUtil_16BitOnesCplSumDataCalc().
+*
+*               data_size           Size    of packet data (in this network buffer only
+*                                                           [see 'NetUtil_16BitOnesCplSumDataCalc()  Note #1a']).
+*
+*               poctet_prev         Pointer to last octet from a fragmented packet's previous buffer.
+*               -----------         Argument validated in NetUtil_16BitOnesCplSumDataCalc().
+*
+*               poctet_last         Pointer to variable that will receive the value of the last octet from a
+*               -----------             fragmented packet's current buffer.
+*
+*                                   Argument validated in NetUtil_16BitOnesCplSumDataCalc().
+*
+*               prev_octet_valid    Indicate whether pointer to the last octet of the packet's previous
+*               ----------------        buffer is valid.
+*
+*                                   Argument validated in NetUtil_16BitOnesCplSumDataCalc().
+*
+*               last_pkt_buf        Indicate whether the current packet buffer is the last packet buffer.
+*               ------------        Argument validated in NetUtil_16BitOnesCplSumDataCalc().
+*
+*               psum_err            Pointer to variable that will receive the error return code(s) from this function :
+*
+*                                       NET_UTIL_16_BIT_SUM_ERR_NONE            No error return codes.
+*
+*                                   The following error return codes are bit-field codes logically OR'd & MUST
+*                                       be individually tested by bit-wise tests :
+*
+*                                       NET_UTIL_16_BIT_SUM_ERR_NULL_SIZE       Packet buffer's data size is
+*                                                                                   a zero size.
+*                                       NET_UTIL_16_BIT_SUM_ERR_LAST_OCTET      Last odd-length octet in packet
+*                                                                                   buffer is available; check
+*                                                                                   'poctet_last' return value.
+*
+* Return(s)   : 16-bit sum (see Note #2), if NO error(s).
+*
+*               0,                        otherwise.
+*
+* Caller(s)   : NetUtil_16BitOnesCplSumDataCalc().
+*
+* Note(s)     : (3) Since many word-aligned processors REQUIRE that multi-octet words be located on word-
+*                   aligned addresses, 16-bit sum calculation MUST ensure that 16-bit words are accessed
+*                   on addresses that are multiples of 2 octets.
+*
+*                   If packet data memory buffer does NOT start on a 16-bit word address boundary, then
+*                   16-bit sum calculation MUST be performed by concatenating two consecutive 8-bit values.
+*
+*               (4) Modulo arithmetic is used to determine whether a memory buffer starts on the desired
+*                   word-aligned address boundary.
+*
+*                   Modulo arithmetic in ANSI-C REQUIREs operations performed on integer values.  Thus
+*                   address values MUST be cast to an appropriately-sized integer value PRIOR to any
+*                   modulo arithmetic operation.
+*
+*               (5) (a) Although "the sum of 16-bit integers can be computed in either byte order"
+*                       [RFC #1071, Section 2.(B)], the handling of odd-length &/or off-word-boundary
+*                       memory buffers is performed assuming network-order.
+*
+*                   (b) However, to correctly & consistently calculate 16-bit integer sums for even-/
+*                       odd-length & word-/off-word-boundary memory buffers, the sums MUST be calculated
+*                       in network-order so that the last octet of any packet buffer is correctly pre-
+*                       pended to the first octet of the next packet buffer.
+*
+*                   (c) (1) To preserve possible 16-bit summation overflow (see Note #2) during all check-
+*                           sum calculations, the 16-bit sum is returned as a 32-bit network-order value.
+*
+*                       (2) To encapsulate the network-order transform to the 16-bit check-sum calculations
+*                           ONLY, the final check-sum MUST be converted to host-order
+*                           (see 'NetUtil_16BitOnesCplSumDataCalc()  Note #5').
+*
+*                       (3) However, since network-to-host-order conversion & host-order memory access are
+*                           inverse operations, the final host-order check-sum value MUST NOT be converted
+*                           back to network-order for calculation or comparison.
+*
+*               (6) Optimized 32-bit sum calculations implemented in the network protocol suite's network-
+*                   specific library port optimization file(s).
+*
+*                   See also 'net_util.h  FUNCTION PROTOTYPES  DEFINED IN PRODUCT'S  net_util_a.*  Note #1'.
+*
+*               (7) Since pointer arithmetic is based on the specific pointer data type & inherent pointer
+*                   data type size, pointer arithmetic operands :
+*
+*                   (a) MUST be in terms of the specific pointer data type & data type size; ...
+*                   (b) SHOULD NOT & in some cases MUST NOT be cast to other data types or data type sizes.
+*
+*               (8) The following sections state that "if the total length is odd, ... the last octet
+*                   is padded on the right with ... one octet of zeros ... to form a 16 bit word for
+*                   ... purposes ... [of] computing the checksum" :
+*
+*                   (a) RFC #768, Section     'Fields                     : Checksum'
+*                   (b) RFC #792, Section     'Echo or Echo Reply Message : Checksum'
+*                   (c) RFC #793, Section 3.1 'Header Format              : Checksum'
+*
+*                   See also 'NetUtil_16BitSumHdrCalc()  Note #6'.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetUtil_16BitSumDataCalc (void         *p_data,
+                                              CPU_INT16U    data_size,
+                                              CPU_INT08U   *poctet_prev,
+                                              CPU_INT08U   *poctet_last,
+                                              CPU_BOOLEAN   prev_octet_valid,
+                                              CPU_BOOLEAN   last_pkt_buf,
+                                              CPU_INT08U   *psum_err)
+{
+    CPU_INT08U    mod_32;
+#if (NET_CFG_OPTIMIZE_ASM_EN == DEF_ENABLED)
+    CPU_INT16U    size_rem_32_offset;
+    CPU_INT16U    size_rem_32;
+#else
+    CPU_INT32U   *pdata_32;
+    CPU_INT32U    data_val_32;
+#endif
+    CPU_INT32U    sum_32;
+    CPU_INT32U    sum_val_32;
+    CPU_INT16U    data_val_16;
+    CPU_INT16U    size_rem;
+    CPU_INT16U   *pdata_16;
+    CPU_INT08U   *pdata_08;
+    CPU_DATA      mod_16;
+    CPU_BOOLEAN   pkt_aligned_16;
+
+
+    sum_32 = 0u;
+
+
+    if (data_size < 1) {                                        /* ------------ HANDLE NULL-SIZE DATA PKT ------------- */
+       *psum_err = NET_UTIL_16_BIT_SUM_ERR_NULL_SIZE;
+
+        if (prev_octet_valid != DEF_NO) {                       /* If null size & last octet from prev pkt buf avail .. */
+
+            if (last_pkt_buf != DEF_NO) {                       /* ...   & on last pkt buf,              ...            */
+                sum_val_32   = (CPU_INT32U)*poctet_prev;        /* ...   cast prev pkt buf's last octet, ...            */
+                sum_val_32 <<=  DEF_OCTET_NBR_BITS;             /* ... pad odd-len pkt len (see Note #5) ...            */
+                sum_32       =  sum_val_32;                     /* ...  & rtn prev pkt buf's last octet as last sum.    */
+
+            } else {                                            /* ... & NOT on last pkt buf, ...                       */
+               *poctet_last = *poctet_prev;                     /* ... rtn last octet from prev pkt buf as last octet.  */
+                DEF_BIT_SET(*psum_err, NET_UTIL_16_BIT_SUM_ERR_LAST_OCTET);
+
+            }
+
+        } else {
+            ;                                                   /* If null size & NO prev octet, NO action(s) req'd.    */
+        }
+
+        return (sum_32);                                        /* Rtn 16-bit sum (see Note #5c1).                      */
+    }
+
+
+                                                                    /* ----------- HANDLE NON-NULL DATA PKT ----------- */
+    size_rem       =  data_size;
+   *psum_err       =  NET_UTIL_16_BIT_SUM_ERR_NONE;
+
+                                                                    /* See Notes #3 & #4.                               */
+    mod_16         = (CPU_INT08U)((CPU_ADDR)p_data % sizeof(CPU_INT16U));
+    pkt_aligned_16 = (((mod_16 == 0u) && (prev_octet_valid == DEF_NO )) ||
+                      ((mod_16 != 0u) && (prev_octet_valid == DEF_YES))) ? DEF_YES : DEF_NO;
+
+
+    pdata_08 = (CPU_INT08U *)p_data;
+    if (prev_octet_valid == DEF_YES) {                              /* If last octet from prev pkt buf avail,   ...     */
+        sum_val_32   = (CPU_INT32U)*poctet_prev;
+        sum_val_32 <<=  DEF_OCTET_NBR_BITS;                         /* ... prepend last octet from prev pkt buf ...     */
+
+        sum_val_32  += (CPU_INT32U)*pdata_08++;
+        sum_32      += (CPU_INT32U) sum_val_32;                     /* ... to first octet in cur pkt buf.               */
+
+        size_rem    -= (CPU_INT16U) sizeof(CPU_INT08U);
+    }
+
+    if (pkt_aligned_16 == DEF_YES) {                                /* If pkt data aligned on 16-bit boundary, ..       */
+                                                                    /* .. calc sum with 16- & 32-bit data words.        */
+        pdata_16 = (CPU_INT16U *)pdata_08;
+        mod_32   = (CPU_INT08U  )((CPU_ADDR)pdata_16 % sizeof(CPU_INT32U)); /* See Note #4.                             */
+        if ((mod_32       !=  0u) &&                                /* If leading 16-bit pkt data avail, ..             */
+            (size_rem     >=  sizeof(CPU_INT16U))) {
+             data_val_16   = (CPU_INT16U)*pdata_16++;
+             sum_val_32    = (CPU_INT32U) NET_UTIL_HOST_TO_NET_16(data_val_16); /* Conv to net-order (see Note #5b).    */
+             sum_32       += (CPU_INT32U) sum_val_32;               /* .. start calc sum with leading 16-bit data word. */
+             size_rem     -= (CPU_INT16U) sizeof(CPU_INT16U);
+        }
+
+#if (NET_CFG_OPTIMIZE_ASM_EN == DEF_ENABLED)
+                                                                    /* Calc optimized 32-bit size rem.                  */
+        size_rem_32_offset = (CPU_INT16U)(size_rem % sizeof(CPU_INT32U));
+        size_rem_32        = (CPU_INT16U)(size_rem - size_rem_32_offset);
+                                                                    /* Calc optimized 32-bit sum (see Note #6).         */
+        sum_val_32         = (CPU_INT32U)NetUtil_16BitSumDataCalcAlign_32((void     *)pdata_16,
+                                                                          (CPU_INT32U)size_rem_32);
+        sum_32            += (CPU_INT32U)sum_val_32;
+        size_rem          -= (CPU_INT32U)size_rem_32;
+
+        pdata_08  = (CPU_INT08U *)pdata_16;
+        pdata_08 +=               size_rem_32;                      /* MUST NOT cast ptr operand (see Note #7b).        */
+        pdata_16  = (CPU_INT16U *)pdata_08;
+
+#else
+        pdata_32 = (CPU_INT32U *)pdata_16;
+        while (size_rem >=  sizeof(CPU_INT32U)) {                   /* While pkt data aligned on 32-bit boundary; ...   */
+            data_val_32  = (CPU_INT32U) *pdata_32++;                /* ... get sum data with 32-bit data words,   ...   */
+
+            data_val_16  = (CPU_INT16U)((data_val_32 >> 16u) & 0x0000FFFFu);
+            sum_val_32   = (CPU_INT32U)  NET_UTIL_HOST_TO_NET_16(data_val_16);  /* Conv to net-order (see Note #5b).    */
+            sum_32      += (CPU_INT32U)  sum_val_32;                /* ... & calc sum with upper 16-bit data word ...   */
+
+            data_val_16  = (CPU_INT16U) (data_val_32         & 0x0000FFFFu);
+            sum_val_32   = (CPU_INT32U)  NET_UTIL_HOST_TO_NET_16(data_val_16);  /* Conv to net-order (see Note #5b).    */
+            sum_32      += (CPU_INT32U)  sum_val_32;                /* ...               & lower 16-bit data word.      */
+
+            size_rem    -= (CPU_INT16U)  sizeof(CPU_INT32U);
+        }
+        pdata_16 = (CPU_INT16U *)pdata_32;
+#endif
+
+        while (size_rem >=  sizeof(CPU_INT16U)) {                   /* While pkt data aligned on 16-bit boundary; ..    */
+            data_val_16  = (CPU_INT16U)*pdata_16++;
+            sum_val_32   = (CPU_INT32U) NET_UTIL_HOST_TO_NET_16(data_val_16);   /* Conv to net-order (see Note #5b).    */
+            sum_32      += (CPU_INT32U) sum_val_32;                 /* .. calc sum with 16-bit data words.              */
+            size_rem    -= (CPU_INT16U) sizeof(CPU_INT16U);
+        }
+        if (size_rem > 0) {
+            sum_val_32   = (CPU_INT32U)(*((CPU_INT08U *)pdata_16));
+        }
+
+    } else {                                                        /* Else pkt data NOT aligned on 16-bit boundary, .. */
+        while (size_rem >=  sizeof(CPU_INT16U)) {
+            sum_val_32   = (CPU_INT32U)*pdata_08++;
+            sum_val_32 <<=  DEF_OCTET_NBR_BITS;
+            sum_val_32  += (CPU_INT32U)*pdata_08++;
+            sum_32      += (CPU_INT32U) sum_val_32;                 /* .. calc sum with  8-bit data vals.               */
+            size_rem    -= (CPU_INT16U) sizeof(CPU_INT16U);
+        }
+        if (size_rem > 0) {
+            sum_val_32   = (CPU_INT32U)*pdata_08;
+        }
+    }
+
+
+    if (size_rem > 0) {
+        if (last_pkt_buf !=  DEF_NO) {                              /* If last pkt buf, ...                             */
+            sum_val_32  <<=  DEF_OCTET_NBR_BITS;                    /* ... pad odd-len pkt len (see Note #8).           */
+            sum_32       += (CPU_INT32U)sum_val_32;
+        } else {
+           *poctet_last   = (CPU_INT08U)sum_val_32;                 /* Else rtn last octet.                             */
+            DEF_BIT_SET(*psum_err, NET_UTIL_16_BIT_SUM_ERR_LAST_OCTET);
+        }
+    }
+
+
+    return (sum_32);                                                /* Rtn 16-bit sum (see Note #5c1).                  */
+}
+
+
+/*
+*********************************************************************************************************
+*                                  NetUtil_16BitOnesCplSumDataCalc()
+*
+* Description : Calculate 16-bit one's-complement sum on packet data.
+*
+*               (1) Calculates the 16-bit one's-complement sum of packet data encapsulated in :
+*
+*                   (a) One or more network buffers             Support non-fragmented & fragmented packets
+*                   (b) Transport layer pseudo-header           See RFC #768, Section 'Fields : Checksum' &
+*                                                                   RFC #793, Section 3.1 'Header Format :
+*                                                                       Checksum'.
+*
+* Argument(s) : pdata_buf           Pointer to packet data network buffer(s) (see Notes #1a & #2).
+*
+*               ppseudo_hdr         Pointer to transport layer pseudo-header (see Note  #1b).
+*
+*               pseudo_hdr_size     Size    of transport layer pseudo-header.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_UTIL_ERR_NONE               16-bit one's-complement sum calculated;
+*                                                                   check return value.
+*                               NET_UTIL_ERR_NULL_PTR           Argument 'pdata_buf' passed a NULL pointer.
+*                               NET_UTIL_ERR_NULL_SIZE          Packet data is a zero size.
+*                               NET_UTIL_ERR_INVALID_PROTOCOL   Invalid data packet protocol.
+*                               NET_BUF_ERR_INVALID_IX          Invalid buffer index.
+*
+* Return(s)   : 16-bit one's-complement sum, if NO error(s).
+*
+*               0,                           otherwise.
+*
+* Caller(s)   : NetUtil_16BitOnesCplChkSumDataCalc(),
+*               NetUtil_16BitOnesCplChkSumDataVerify().
+*
+* Note(s)     : (2) Pointer to network buffer packet NOT validated as a network buffer.  However, no memory
+*                   corruption occurs since no write operations are performed.
+*
+*               (3) (a) The following network buffer packet header fields MUST be configured BEFORE any
+*                       packet data checksum is calculated :
+*
+*                       (1) Packet's currently configured protocol index
+*                       (2) Packet's currently configured protocol header length
+*                       (3) Packet's current data length
+*
+*                   (b) The network buffer packet's currently configured protocol header length & current
+*                       data length do NOT need to be individually correct but MUST be synchronized such
+*                       that their sum equals the current protocol's total length--i.e. the total number
+*                       of octets in the packet for the current protocol.
+*
+*                       For example, a protocol layer receive may NOT yet have configured a packet's
+*                       protocol header length which would still be set to zero (0).  However, it will
+*                       NOT have offset the current protocol header length from the packet's current
+*                       data length.  Therefore, the sum of the packet's current protocol header length
+*                       & current data length will still equal the current protocol's total length.
+*
+*               (4) Default case already invalidated in earlier functions.  However, the default case is
+*                   included as an extra precaution in case 'ProtocolHdrType' is incorrectly modified.
+*
+*               (5) (a) Since the 16-bit sum calculations are returned as 32-bit network-order values
+*                       (see 'NetUtil_16BitSumDataCalc()  Note #5c1'), ...
+*
+*                   (b) ... the one's-complement sum MUST be converted to host-order but MUST NOT be re-
+*                       converted back to network-order (see 'NetUtil_16BitSumDataCalc()  Note #5c3').
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  NetUtil_16BitOnesCplSumDataCalc (void        *pdata_buf,
+                                                     void        *ppseudo_hdr,
+                                                     CPU_INT16U   pseudo_hdr_size,
+                                                     NET_ERR     *p_err)
+{
+    NET_BUF      *pbuf;
+    NET_BUF      *pbuf_next;
+    NET_BUF_HDR  *pbuf_hdr;
+    void         *p_data;
+    CPU_INT32U    sum;
+    CPU_INT32U    sum_val;
+    CPU_INT16U    sum_ones_cpl;
+    CPU_INT16U    sum_ones_cpl_host;
+    CPU_INT16U    data_ix;
+    CPU_INT16U    data_len;
+    CPU_INT08U    sum_err;
+    CPU_INT08U    octet_prev;
+    CPU_INT08U    octet_last;
+    CPU_BOOLEAN   octet_prev_valid;
+    CPU_BOOLEAN   octet_last_valid;
+    CPU_BOOLEAN   mem_buf_last;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    CPU_BOOLEAN   mem_buf_first;
+    CPU_BOOLEAN   mem_buf_null_size;
+#endif
+
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)                     /* ----------------- VALIDATE PTR ----------------- */
+    if (pdata_buf == (void *)0) {
+       *p_err =  NET_ERR_FAULT_NULL_PTR;
+        return (0u);
+    }
+#endif
+
+
+                                                                    /* ------ CALC PKT DATA 16-BIT ONE'S-CPL SUM ------ */
+    pbuf             = (NET_BUF *)pdata_buf;
+    sum              =  0u;
+    octet_prev       =  0u;
+    octet_last       =  0u;
+    octet_prev_valid =  DEF_NO;
+    octet_last_valid =  DEF_NO;
+    mem_buf_last     =  DEF_NO;
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+    mem_buf_first    =  DEF_YES;
+#endif
+
+    if (ppseudo_hdr != (void *)0) {                                 /* Calc pkt's pseudo-hdr 16-bit sum (see Note #1b). */
+        sum_val  = NetUtil_16BitSumDataCalc((void       *) ppseudo_hdr,
+                                            (CPU_INT16U  ) pseudo_hdr_size,
+                                            (CPU_INT08U *)&octet_prev,
+                                            (CPU_INT08U *)&octet_last,
+                                            (CPU_BOOLEAN ) octet_prev_valid,
+                                            (CPU_BOOLEAN ) mem_buf_last,
+                                            (CPU_INT08U *)&sum_err);
+        sum     += sum_val;
+
+        octet_last_valid = DEF_BIT_IS_SET(sum_err, NET_UTIL_16_BIT_SUM_ERR_LAST_OCTET);
+        if (octet_last_valid == DEF_YES) {                          /* If last octet from pseudo-hdr avail, ...         */
+            octet_prev        = octet_last;                         /* ... prepend last octet to first pkt buf.         */
+            octet_prev_valid  = DEF_YES;
+        } else {
+            octet_prev        = 0u;
+            octet_prev_valid  = DEF_NO;
+        }
+    }
+
+    while (pbuf  != (NET_BUF *)0) {                                 /* Calc ALL data pkts' 16-bit sum  (see Note #1a).  */
+        pbuf_hdr  = &pbuf->Hdr;
+        switch (pbuf_hdr->ProtocolHdrType) {                        /* Demux pkt buf's protocol ix/len (see Note #3b).  */
+            case NET_PROTOCOL_TYPE_ICMP_V4:
+            case NET_PROTOCOL_TYPE_ICMP_V6:
+                 data_ix  = pbuf_hdr->ICMP_MsgIx;
+                 data_len = pbuf_hdr->ICMP_HdrLen    + (CPU_INT16U)pbuf_hdr->DataLen;
+                 break;
+
+
+            case NET_PROTOCOL_TYPE_UDP_V4:
+            case NET_PROTOCOL_TYPE_UDP_V6:
+#ifdef  NET_TCP_MODULE_EN
+            case NET_PROTOCOL_TYPE_TCP_V4:
+            case NET_PROTOCOL_TYPE_TCP_V6:
+#endif
+                 data_ix  = pbuf_hdr->TransportHdrIx;
+                 data_len = pbuf_hdr->TransportHdrLen + (CPU_INT16U)pbuf_hdr->DataLen;
+                 break;
+
+            case NET_PROTOCOL_TYPE_IP_V6_EXT_NONE:
+                data_ix  = pbuf_hdr->TotLen - pbuf_hdr->DataLen;
+                data_len = pbuf_hdr->DataLen;
+                break;
+
+
+            default:                                                /* See Note #4.                                     */
+                *p_err =  NET_UTIL_ERR_INVALID_PROTOCOL;
+                 return (0u);
+        }
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (data_ix == NET_BUF_IX_NONE) {
+           *p_err =  NET_BUF_ERR_INVALID_IX;
+            return (0u);
+        }
+#endif
+
+        p_data       = (void    *)&pbuf->DataPtr[data_ix];
+        pbuf_next    = (NET_BUF *) pbuf_hdr->NextBufPtr;
+        mem_buf_last = (pbuf_next == (NET_BUF *)0) ? DEF_YES : DEF_NO;
+                                                                    /* Calc pkt buf's 16-bit sum.                       */
+        sum_val      =  NetUtil_16BitSumDataCalc((void       *) p_data,
+                                                 (CPU_INT16U  ) data_len,
+                                                 (CPU_INT08U *)&octet_prev,
+                                                 (CPU_INT08U *)&octet_last,
+                                                 (CPU_BOOLEAN ) octet_prev_valid,
+                                                 (CPU_BOOLEAN ) mem_buf_last,
+                                                 (CPU_INT08U *)&sum_err);
+
+#if (NET_ERR_CFG_ARG_CHK_DBG_EN == DEF_ENABLED)
+        if (mem_buf_first == DEF_YES) {
+            mem_buf_first  = DEF_NO;
+            if (mem_buf_last == DEF_YES) {
+                mem_buf_null_size = DEF_BIT_IS_SET(sum_err, NET_UTIL_16_BIT_SUM_ERR_NULL_SIZE);
+                if (mem_buf_null_size != DEF_NO) {                  /* If ONLY mem buf & null size, rtn err.            */
+                   *p_err =  NET_UTIL_ERR_NULL_SIZE;
+                    return (0u);
+                }
+            }
+        }
+#endif
+
+        if (mem_buf_last != DEF_YES) {                              /* If NOT on last pkt buf &                     ... */
+            octet_last_valid = DEF_BIT_IS_SET(sum_err, NET_UTIL_16_BIT_SUM_ERR_LAST_OCTET);
+            if (octet_last_valid == DEF_YES) {                      /* ...         last octet from cur  pkt buf avail,  */
+                octet_prev        = octet_last;                     /* ... prepend last octet to   next pkt buf.        */
+                octet_prev_valid  = DEF_YES;
+            } else {
+                octet_prev        = 0u;
+                octet_prev_valid  = DEF_NO;
+            }
+        }
+
+        sum  += sum_val;
+        pbuf  = pbuf_next;
+    }
+
+
+    while (sum >> 16u) {                                            /* While 16-bit sum ovf's, ...                      */
+        sum = (sum & 0x0000FFFFu) + (sum >> 16u);                   /* ... sum ovf bits back into 16-bit one's-cpl sum. */
+    }
+
+    sum_ones_cpl      = (CPU_INT16U)sum;
+    sum_ones_cpl_host =  NET_UTIL_NET_TO_HOST_16(sum_ones_cpl);     /* Conv back to host-order  (see Note #5b).         */
+   *p_err             =  NET_UTIL_ERR_NONE;
+
+
+    return (sum_ones_cpl_host);                                     /* Rtn 16-bit one's-cpl sum (see Note #1).          */
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_util.h b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_util.h
new file mode 100644
index 0000000..217a607
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_util.h
@@ -0,0 +1,507 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       NETWORK UTILITY LIBRARY
+*
+* Filename      : net_util.h
+* Version       : V3.04.02
+* Programmer(s) : ITJ
+*********************************************************************************************************
+* Note(s)       : (1) NO compiler-supplied standard library functions are used by the network protocol suite.
+*                     'net_util.*' implements ALL network-specific library functions.
+*
+*                     See also 'net.h  NETWORK INCLUDE FILES  Note #3'.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "net_cfg_net.h"
+#include  
+#include  "net_tmr.h"
+#include  "net_type.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_UTIL_MODULE_PRESENT
+#define  NET_UTIL_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                              MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                           NETWORK WORD ORDER - TO - CPU WORD ORDER MACRO'S
+*
+* Description : Convert data values to & from network word order to host CPU word order.
+*
+* Argument(s) : val       Data value to convert (see Note #1).
+*
+* Return(s)   : Converted data value (see Note #1).
+*
+* Caller(s)   : various.
+*
+*               These macro's are network protocol suite application programming interface (API) macro's
+*               & MAY be called by application function(s).
+*
+* Note(s)     : (1) 'val' data value to convert & any variable to receive the returned conversion MUST
+*                   start on appropriate CPU word-aligned addresses.  This is required because most word-
+*                   aligned processors are more efficient & may even REQUIRE that multi-octet words start
+*                   on CPU word-aligned addresses.
+*
+*                   (a) For 16-bit word-aligned processors, this means that
+*
+*                           all 16- & 32-bit words MUST start on addresses that are multiples of 2 octets
+*
+*                   (b) For 32-bit word-aligned processors, this means that
+*
+*                           all 16-bit       words MUST start on addresses that are multiples of 2 octets
+*                           all 32-bit       words MUST start on addresses that are multiples of 4 octets
+*
+*                   See also 'lib_mem.h  MEMORY DATA VALUE MACRO'S  Note #1a'
+*                          & 'lib_mem.h  ENDIAN WORD ORDER MACRO'S  Note #2'.
+*********************************************************************************************************
+*/
+
+#define  NET_UTIL_NET_TO_HOST_32(val)                   MEM_VAL_BIG_TO_HOST_32(val)
+#define  NET_UTIL_NET_TO_HOST_16(val)                   MEM_VAL_BIG_TO_HOST_16(val)
+
+#define  NET_UTIL_HOST_TO_NET_32(val)                   MEM_VAL_HOST_TO_BIG_32(val)
+#define  NET_UTIL_HOST_TO_NET_16(val)                   MEM_VAL_HOST_TO_BIG_16(val)
+
+#define  NET_UTIL_VAL_SWAP_ORDER_16(val)                MEM_VAL_BIG_TO_LITTLE_16(val)
+#define  NET_UTIL_VAL_SWAP_ORDER_32(val)                MEM_VAL_BIG_TO_LITTLE_32(val)
+
+
+/*
+*********************************************************************************************************
+*                                     NETWORK DATA VALUE MACRO'S
+*
+* Description : Encode/decode data values to & from any CPU memory addresses.
+*
+* Argument(s) : various.
+*
+* Return(s)   : various.
+*
+* Caller(s)   : various.
+*
+*               These macro's are INTERNAL network protocol suite macro's & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : (1) Network data value macro's appropriately convert data words :
+*
+*                   (a) (1) From network  word order to host CPU word order
+*                       (2) From host CPU word order to network  word order
+*
+*                   (b) NO network-to-host word-order conversion performed
+*
+*               (2) (a) Some network data values MUST start on appropriate CPU word-aligned addresses :
+*
+*                       (1) Data values
+*                       (2) Variables to receive data values
+*
+*                   (b) Some network data values may start on any CPU address, word-aligned or not :
+*
+*                       (1) Addresses to         data values
+*                       (2) Addresses to receive data values
+*
+*                   See also 'lib_mem.h  MEMORY DATA VALUE MACRO'S  Note #1'.
+*********************************************************************************************************
+*/
+                                                                                        /* See Notes #1a1, #2a2, & #2b1.*/
+#define  NET_UTIL_VAL_GET_NET_16(addr)                          MEM_VAL_GET_INT16U_BIG(addr)
+#define  NET_UTIL_VAL_GET_NET_32(addr)                          MEM_VAL_GET_INT32U_BIG(addr)
+                                                                                        /* See Notes #1a2, #2a1, & #2b2.*/
+#define  NET_UTIL_VAL_SET_NET_16(addr, val)                     MEM_VAL_SET_INT16U_BIG(addr, val)
+#define  NET_UTIL_VAL_SET_NET_32(addr, val)                     MEM_VAL_SET_INT32U_BIG(addr, val)
+
+                                                                                        /* See Notes #1a1 & #2b.        */
+#define  NET_UTIL_VAL_COPY_GET_NET_16(addr_dest, addr_src)      MEM_VAL_COPY_GET_INT16U_BIG(addr_dest, addr_src)
+#define  NET_UTIL_VAL_COPY_GET_NET_32(addr_dest, addr_src)      MEM_VAL_COPY_GET_INT32U_BIG(addr_dest, addr_src)
+#define  NET_UTIL_VAL_COPY_GET_NET(addr_dest, addr_src, size)   MEM_VAL_COPY_GET_INTU_BIG(addr_dest, addr_src, size)
+                                                                                        /* See Notes #1a2 & #2b.        */
+#define  NET_UTIL_VAL_COPY_SET_NET_16(addr_dest, addr_src)      MEM_VAL_COPY_SET_INT16U_BIG(addr_dest, addr_src)
+#define  NET_UTIL_VAL_COPY_SET_NET_32(addr_dest, addr_src)      MEM_VAL_COPY_SET_INT32U_BIG(addr_dest, addr_src)
+#define  NET_UTIL_VAL_COPY_SET_NET(addr_dest, addr_src, size)   MEM_VAL_COPY_SET_INTU_BIG(addr_dest, addr_src, size)
+
+
+                                                                                        /* See Notes #1b, #2a2, & #2b1. */
+#define  NET_UTIL_VAL_GET_HOST_16(addr)                         MEM_VAL_GET_INT16U(addr)
+#define  NET_UTIL_VAL_GET_HOST_32(addr)                         MEM_VAL_GET_INT32U(addr)
+                                                                                        /* See Notes #1b, #2a1, & #2b2. */
+#define  NET_UTIL_VAL_SET_HOST_16(addr, val)                    MEM_VAL_SET_INT16U(addr, val)
+#define  NET_UTIL_VAL_SET_HOST_32(addr, val)                    MEM_VAL_SET_INT32U(addr, val)
+
+                                                                                        /* See Notes #1b & #2b.         */
+#define  NET_UTIL_VAL_COPY_GET_HOST_16(addr_dest, addr_src)     MEM_VAL_COPY_GET_INT16U(addr_dest, addr_src)
+#define  NET_UTIL_VAL_COPY_GET_HOST_32(addr_dest, addr_src)     MEM_VAL_COPY_GET_INT32U(addr_dest, addr_src)
+#define  NET_UTIL_VAL_COPY_GET_HOST(addr_dest, addr_src, size)  MEM_VAL_COPY_GET_INTU(addr_dest, addr_src, size)
+                                                                                        /* See Notes #1b & #2b.         */
+#define  NET_UTIL_VAL_COPY_SET_HOST_16(addr_dest, addr_src)     MEM_VAL_COPY_SET_INT16U(addr_dest, addr_src)
+#define  NET_UTIL_VAL_COPY_SET_HOST_32(addr_dest, addr_src)     MEM_VAL_COPY_SET_INT32U(addr_dest, addr_src)
+#define  NET_UTIL_VAL_COPY_SET_HOST(addr_dest, addr_src, size)  MEM_VAL_COPY_SET_INTU(addr_dest, addr_src, size)
+
+
+                                                                                        /* See Notes #1b & #2b.         */
+#define  NET_UTIL_VAL_COPY_16(addr_dest, addr_src)              MEM_VAL_COPY_16(addr_dest, addr_src)
+#define  NET_UTIL_VAL_COPY_32(addr_dest, addr_src)              MEM_VAL_COPY_32(addr_dest, addr_src)
+#define  NET_UTIL_VAL_COPY(addr_dest, addr_src, size)           MEM_VAL_COPY(addr_dest, addr_src, size)
+
+
+#define  NET_UTIL_VAL_SWAP_ORDER(addr)                          MEM_VAL_BIG_TO_LITTLE_32(addr)
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK IPv6 ADDRESS MACRO'S
+*
+* Description : Set and validate different type of IPv6 addresses.
+*
+* Argument(s) : various.
+*
+* Return(s)   : various.
+*
+* Caller(s)   : various.
+*
+*               These macro's are INTERNAL network protocol suite macro's & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#define  NET_UTIL_IPv6_ADDR_COPY(addr_src, addr_dest)           addr_dest.Addr[0]  = addr_src.Addr[0];  \
+                                                                addr_dest.Addr[1]  = addr_src.Addr[1];  \
+                                                                addr_dest.Addr[2]  = addr_src.Addr[2];  \
+                                                                addr_dest.Addr[3]  = addr_src.Addr[3];  \
+                                                                addr_dest.Addr[4]  = addr_src.Addr[4];  \
+                                                                addr_dest.Addr[5]  = addr_src.Addr[5];  \
+                                                                addr_dest.Addr[6]  = addr_src.Addr[6];  \
+                                                                addr_dest.Addr[7]  = addr_src.Addr[7];  \
+                                                                addr_dest.Addr[8]  = addr_src.Addr[8];  \
+                                                                addr_dest.Addr[9]  = addr_src.Addr[9];  \
+                                                                addr_dest.Addr[10] = addr_src.Addr[10]; \
+                                                                addr_dest.Addr[11] = addr_src.Addr[11]; \
+                                                                addr_dest.Addr[12] = addr_src.Addr[12]; \
+                                                                addr_dest.Addr[13] = addr_src.Addr[13]; \
+                                                                addr_dest.Addr[14] = addr_src.Addr[14]; \
+                                                                addr_dest.Addr[15] = addr_src.Addr[15];
+
+#define  NET_UTIL_IPv6_ADDR_SET_UNSPECIFIED(addr)               addr.Addr[0]   = DEF_BIT_NONE; \
+                                                                addr.Addr[1]   = DEF_BIT_NONE; \
+                                                                addr.Addr[2]   = DEF_BIT_NONE; \
+                                                                addr.Addr[3]   = DEF_BIT_NONE; \
+                                                                addr.Addr[4]   = DEF_BIT_NONE; \
+                                                                addr.Addr[5]   = DEF_BIT_NONE; \
+                                                                addr.Addr[6]   = DEF_BIT_NONE; \
+                                                                addr.Addr[7]   = DEF_BIT_NONE; \
+                                                                addr.Addr[8]   = DEF_BIT_NONE; \
+                                                                addr.Addr[9]   = DEF_BIT_NONE; \
+                                                                addr.Addr[10]  = DEF_BIT_NONE; \
+                                                                addr.Addr[11]  = DEF_BIT_NONE; \
+                                                                addr.Addr[12]  = DEF_BIT_NONE; \
+                                                                addr.Addr[13]  = DEF_BIT_NONE; \
+                                                                addr.Addr[14]  = DEF_BIT_NONE; \
+                                                                addr.Addr[15]  = DEF_BIT_NONE;
+
+#define  NET_UTIL_IPv6_ADDR_IS_UNSPECIFIED(addr)              ((addr.Addr[0]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[1]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[2]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[3]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[4]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[5]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[6]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[7]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[8]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[9]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[10] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[11] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[12] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[13] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[14] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[15] == DEF_BIT_NONE))
+
+#define  NET_UTIL_IPv6_ADDR_SET_LOOPBACK(addr)                  addr.Addr[0]   = DEF_BIT_NONE; \
+                                                                addr.Addr[1]   = DEF_BIT_NONE; \
+                                                                addr.Addr[2]   = DEF_BIT_NONE; \
+                                                                addr.Addr[3]   = DEF_BIT_NONE; \
+                                                                addr.Addr[4]   = DEF_BIT_NONE; \
+                                                                addr.Addr[5]   = DEF_BIT_NONE; \
+                                                                addr.Addr[6]   = DEF_BIT_NONE; \
+                                                                addr.Addr[7]   = DEF_BIT_NONE; \
+                                                                addr.Addr[8]   = DEF_BIT_NONE; \
+                                                                addr.Addr[9]   = DEF_BIT_NONE; \
+                                                                addr.Addr[10]  = DEF_BIT_NONE; \
+                                                                addr.Addr[11]  = DEF_BIT_NONE; \
+                                                                addr.Addr[12]  = DEF_BIT_NONE; \
+                                                                addr.Addr[13]  = DEF_BIT_NONE; \
+                                                                addr.Addr[14]  = DEF_BIT_NONE; \
+                                                                addr.Addr[15]  = DEF_BIT_00;
+
+#define  NET_UTIL_IPv6_ADDR_IS_LOOPBACK(addr)                 ((addr.Addr[0]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[1]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[2]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[3]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[4]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[5]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[6]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[7]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[8]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[9]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[10] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[11] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[12] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[13] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[14] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[15] == DEF_BIT_00))
+
+#define  NET_UTIL_IPv6_ADDR_SET_MCAST_ALL_NODES(addr)           addr.Addr[0]   = 0xFF;         \
+                                                                addr.Addr[1]   = 0x02;         \
+                                                                addr.Addr[2]   = DEF_BIT_NONE; \
+                                                                addr.Addr[3]   = DEF_BIT_NONE; \
+                                                                addr.Addr[4]   = DEF_BIT_NONE; \
+                                                                addr.Addr[5]   = DEF_BIT_NONE; \
+                                                                addr.Addr[6]   = DEF_BIT_NONE; \
+                                                                addr.Addr[7]   = DEF_BIT_NONE; \
+                                                                addr.Addr[8]   = DEF_BIT_NONE; \
+                                                                addr.Addr[9]   = DEF_BIT_NONE; \
+                                                                addr.Addr[10]  = DEF_BIT_NONE; \
+                                                                addr.Addr[11]  = DEF_BIT_NONE; \
+                                                                addr.Addr[12]  = DEF_BIT_NONE; \
+                                                                addr.Addr[13]  = DEF_BIT_NONE; \
+                                                                addr.Addr[14]  = DEF_BIT_NONE; \
+                                                                addr.Addr[15]  = 0x01;
+
+#define  NET_UTIL_IPv6_ADDR_IS_MCAST_ALL_NODES(addr)          ((addr.Addr[0]  == 0xFF)         && \
+                                                               (addr.Addr[1]  == 0x02)         && \
+                                                               (addr.Addr[2]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[3]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[4]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[5]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[6]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[7]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[8]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[9]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[10] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[11] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[12] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[13] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[14] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[15] == 0x01))
+
+#define  NET_UTIL_IPv6_ADDR_SET_MCAST_ALL_ROUTERS(addr)         addr.Addr[0]   = 0xFF;         \
+                                                                addr.Addr[1]   = 0x02;         \
+                                                                addr.Addr[2]   = DEF_BIT_NONE; \
+                                                                addr.Addr[3]   = DEF_BIT_NONE; \
+                                                                addr.Addr[4]   = DEF_BIT_NONE; \
+                                                                addr.Addr[5]   = DEF_BIT_NONE; \
+                                                                addr.Addr[6]   = DEF_BIT_NONE; \
+                                                                addr.Addr[7]   = DEF_BIT_NONE; \
+                                                                addr.Addr[8]   = DEF_BIT_NONE; \
+                                                                addr.Addr[9]   = DEF_BIT_NONE; \
+                                                                addr.Addr[10]  = DEF_BIT_NONE; \
+                                                                addr.Addr[11]  = DEF_BIT_NONE; \
+                                                                addr.Addr[12]  = DEF_BIT_NONE; \
+                                                                addr.Addr[13]  = DEF_BIT_NONE; \
+                                                                addr.Addr[14]  = DEF_BIT_NONE; \
+                                                                addr.Addr[15]  = 0x02;
+
+#define  NET_UTIL_IPv6_ADDR_IS_MCAST_ALL_ROUTERS(addr)        ((addr.Addr[0]  == 0xFF)         && \
+                                                               (addr.Addr[1]  == 0x02)         && \
+                                                               (addr.Addr[2]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[3]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[4]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[5]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[6]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[7]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[8]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[9]  == DEF_BIT_NONE) && \
+                                                               (addr.Addr[10] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[11] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[12] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[13] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[14] == DEF_BIT_NONE) && \
+                                                               (addr.Addr[15] == 0x02))
+
+#define  NET_UTIL_IPv6_ADDR_IS_LINK_LOCAL(addr)               ((addr.Addr[0]  == 0xFE) && \
+                                                               (addr.Addr[1]  == 0x80))
+
+#define  NET_UTIL_IPv6_ADDR_IS_SITE_LOCAL(addr)               ((addr.Addr[0]  == 0xFE) && \
+                                                               (addr.Addr[1]  == 0xC0))
+
+#define  NET_UTIL_IPv6_ADDR_IS_MULTICAST(addr)                 (addr.Addr[0]  == 0xFF)
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+                                                                /* ------------------ CHK SUM FNCTS ------------------- */
+NET_CHK_SUM  NetUtil_16BitOnesCplChkSumHdrCalc   (void        *phdr,
+                                                  CPU_INT16U   hdr_size,
+                                                  NET_ERR     *p_err);
+
+CPU_BOOLEAN  NetUtil_16BitOnesCplChkSumHdrVerify (void        *phdr,
+                                                  CPU_INT16U   hdr_size,
+                                                  NET_ERR     *p_err);
+
+NET_CHK_SUM  NetUtil_16BitOnesCplChkSumDataCalc  (void        *pdata_buf,
+                                                  void        *ppseudo_hdr,
+                                                  CPU_INT16U   pseudo_hdr_size,
+                                                  NET_ERR     *p_err);
+
+CPU_BOOLEAN  NetUtil_16BitOnesCplChkSumDataVerify(void        *pdata_buf,
+                                                  void        *ppseudo_hdr,
+                                                  CPU_INT16U   pseudo_hdr_size,
+                                                  NET_ERR     *p_err);
+
+
+                                                                /* -------------------- CRC FNCTS --------------------- */
+CPU_INT32U   NetUtil_32BitCRC_Calc               (CPU_INT08U  *p_data,
+                                                  CPU_INT32U   data_len,
+                                                  NET_ERR     *p_err);
+
+CPU_INT32U   NetUtil_32BitCRC_CalcCpl            (CPU_INT08U  *p_data,
+                                                  CPU_INT32U   data_len,
+                                                  NET_ERR     *p_err);
+
+CPU_INT32U   NetUtil_32BitReflect                (CPU_INT32U   val);
+
+                                                                /* -------------------- TIME FNCTS -------------------- */
+CPU_INT32U   NetUtil_TimeSec_uS_To_ms            (CPU_INT32U   time_sec,
+                                                  CPU_INT32U   time_us);
+
+                                                                /* --------------------- TS FNCTS --------------------- */
+NET_TS      NetUtil_TS_Get                       (void);
+
+NET_TS_MS   NetUtil_TS_Get_ms                    (void);
+
+
+
+CPU_INT32U  NetUtil_InitSeqNbrGet                (void);
+
+CPU_INT32U  NetUtil_RandomRangeGet               (CPU_INT32U   min,
+                                                  CPU_INT32U   max);
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                 DEFINED IN PRODUCT'S  net_util_a.*
+*
+* Note(s) : (1) The network protocol suite's network-specific library port optimization file(s) are located
+*               in the following directories :
+*
+*               (a) \\Ports\\\net_util_a.*
+*
+*                       where
+*                                       directory path for network protocol suite
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*********************************************************************************************************
+*/
+
+#if (NET_CFG_OPTIMIZE_ASM_EN == DEF_ENABLED)
+                                                                        /* Optimize 16-bit sum for 32-bit.              */
+CPU_INT32U  NetUtil_16BitSumDataCalcAlign_32(void        *pdata_32,
+                                             CPU_INT32U   size);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                   DEFINED IN PRODUCT'S  net_bsp.c
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef  __cplusplus
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of net util module include.                      */
diff --git a/src/ucos_v1_42/micrium_source/uC-TCPIP/subdir.mk b/src/ucos_v1_42/micrium_source/uC-TCPIP/subdir.mk
new file mode 100644
index 0000000..07164c3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TCPIP/subdir.mk
@@ -0,0 +1,43 @@
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_app.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ascii.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_bsd.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_buf.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_cache.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_conn.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ctr.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_icmp.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_ip.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_mgr.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_sock.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_stat.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tcp.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_tmr.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_udp.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Source/net_util.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_base64.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Modules/Common/net_sha1.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_dad.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_icmpv6.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ipv6.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_mldp.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv6/net_ndp.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_arp.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_icmpv4.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_igmp.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IP/IPv4/net_ipv4.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_802x.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_ether.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_loopback.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/IF/net_if_wifi.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_dma.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/Template/net_dev_ether_template_pio.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/PHY/88E1111/net_phy_88e1111.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Dev/Ether/GEM/net_dev_gem64.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_args_parser.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/Cmd/net_cmd_output.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_ether.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uC-TCPIP/BSP/Template/net_bsp_wifi.c
diff --git a/src/ucos_v1_42/micrium_source/uC-TELNETs/Cfg/Template/telnet-s_cfg.h b/src/ucos_v1_42/micrium_source/uC-TELNETs/Cfg/Template/telnet-s_cfg.h
new file mode 100644
index 0000000..f0e0fd0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TELNETs/Cfg/Template/telnet-s_cfg.h
@@ -0,0 +1,118 @@
+/*
+*********************************************************************************************************
+*                                             uC/TELNETs
+*                                           Telnet (server)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TELNETs is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  TELNET SERVER CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : telnet-s_cfg.h
+* Version       : V1.05.02
+* Programmer(s) : SR
+*                 SL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           TASKS PRIORITIES
+*********************************************************************************************************
+*/
+
+#define  TELNETs_OS_CFG_SERVER_TASK_PRIO                  15
+#define  TELNETs_OS_CFG_SESSION_TASK_PRIO                 16
+
+
+/*
+*********************************************************************************************************
+*                                              STACK SIZES
+*                             Size of the task stacks (# of OS_STK entries)
+*********************************************************************************************************
+*/
+
+#define  TELNETs_OS_CFG_SERVER_TASK_STK_SIZE             512
+#define  TELNETs_OS_CFG_SESSION_TASK_STK_SIZE            512
+
+
+/*
+*********************************************************************************************************
+*                                                TELNETs
+*
+* Note(s) : (1) Default server port for TELNET server is 23.
+*
+*           (2) Default secure port for TELNET server is 992.
+*
+*           (3) The inactivity timeout defines the maximum amount of time the server waits for a client
+*               to transmit data.  Once this time has expired, the server closes the connection and waits
+*               for other client to connect.
+*
+*           (4) The receive buffer is used to hold the data as well as the incoming option requests and
+*               replies.  Its size should hence be slightly larger than the NVT buffer.  This later should
+*               be defined to be as large as the longest line of data transmitted by the client.
+*
+*           (5) Configure TELNETs_CFG_FS_EN to enable/disable file system in this module.  If enabled,
+*               make sure a file system in included in your product application BEFORE including
+*               uC/TELNETs.
+*
+*           (6) The maximum path name configuration define should be set in accordance with the file
+*               system being used on your target, and only applies if a file system is configured with
+*               this module.  This default setting is the appropriate one for uC/FS V3 & V4.
+*********************************************************************************************************
+*/
+
+#define  TELNETs_CFG_PORT_SERVER                          23    /* Cfg TELNETs server port. Dflt is  23.                */
+#define  TELNETs_CFG_PORT_SERVER_SECURE                  992    /* Cfg TELNETs secure port. Dflt is 992.                */
+
+#define  TELNETs_CFG_INACTIVITY_TIMEOUT_S                 30    /* Cfg TELNET inactivity time (see Note #3).            */
+#define  TELNETs_CFG_MAX_TX_TRIES                          3    /* Cfg max number of tries on tx.                       */
+
+#define  TELNETs_CFG_RX_BUF_LEN                          100    /* Cfg TELNET rx  buf len     (see Note #4).            */
+#define  TELNETs_CFG_NVT_BUF_LEN                          80    /* Cfg TELNET NVT buf len     (see Note #4).            */
+
+#define  TELNETs_CFG_MAX_USR_NAME_LEN                     32    /* Cfg max len for usr name.                            */
+#define  TELNETs_CFG_MAX_PW_LEN                           32    /* Cfg max len for pw.                                  */
+
+#define  TELNETs_CFG_MAX_LOGIN_TRIES                       3    /* Cfg max number of tries on login.                    */
+
+                                                                /* Cfg FS presence            (see Note #5) :           */
+#define  TELNETs_CFG_FS_EN                       DEF_DISABLED
+                                                                /*   DEF_DISABLED  FS DISABLED for this module.         */
+                                                                /*   DEF_ENABLED   FS ENABLED  for this module.         */
+
+                                                                /* Cfg Echo.                                            */
+#define  TELNETs_CFG_ECHO_EN                     DEF_ENABLED
+                                                                /*   DEF_DISABLED  Echo DISABLED.                       */
+                                                                /*   DEF_ENABLED   Echo ENABLED.                        */
+
+                                                                /* Cfg max path name len      (see Note #6).            */
+#define  TELNETs_CFG_FS_MAX_PATH_NAME_LEN               256u
+
+                                                                /* Cfg TELNET welcome msg.                              */
+#define  TELNETs_CFG_WELCOME_MSG_STR              "\x0D\x0A\x0D\x0A"  \
+                                                  "Welcome to Micrium Telnet Server\x0D\x0A\x0D\x0A\x0D\x0A"
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TELNETs/Examples/telnet-s_init.c b/src/ucos_v1_42/micrium_source/uC-TELNETs/Examples/telnet-s_init.c
new file mode 100644
index 0000000..1514c02
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TELNETs/Examples/telnet-s_init.c
@@ -0,0 +1,192 @@
+/*
+*********************************************************************************************************
+*                                              EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find information about uC/TCP-IP by visiting https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                               EXAMPLE
+*
+*                                             TELNET Server
+
+*
+* Filename      : telnet-s_init.c
+* Version       : V1.05.02
+* Programmer(s) : AL
+*********************************************************************************************************
+* Note(s)       : (1) This example show how intialize the TELNET server in standard or secure mode.
+*                     It includes also a simple implementation of the uc/TELNETs callBack.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  SERVER_CERT_DER        "\\server-cert.der"
+#define  SERVER_KEY_PEM         "\\server-key.pem"
+
+#define  APP_TELNETS_USERNAME    "admin"
+#define  APP_TELNETS_PWD         "password"
+#define  APP_TELNET_CMD_TEST     "test"
+#define  APP_TELNET_SUCCESS_STR  "\r\ntest command recognized. This is a simple example.\r\n\r\n"
+#define  APP_TELNET_FAILURE_STR  "Command not found.\r\n\r\n"
+
+#define  APP_TELNET_IP_FAMILY    NET_SOCK_ADDR_FAMILY_IP_V4
+
+
+/*
+*********************************************************************************************************
+*                                          AppTELNETs_Init()
+*
+* Description : Initialize the TELNET server.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_FAIL,   Operation failed.
+*               DEF_OK,     Operation is successful
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN AppTELNETs_Init (void)
+{
+    CPU_BOOLEAN           init;
+    NET_SOCK_ADDR_FAMILY  ip_family;
+
+
+    ip_family = APP_TELNET_IP_FAMILY;                           /* Choose IP Family.                                    */
+
+    init = TELNETs_Init(&ip_family, DEF_NULL);                  /* Initialize TELNET in non-secure mode.                */
+    if (init == DEF_OK) {
+        printf("Init successful\n\r");
+    } else {
+        printf("Init failed\n\r");
+    }
+
+    return (init);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TELNETs_AuthUser()
+*
+* Description : Telnet server callback to authenticate a user during connection request.
+*
+* Argument(s) : user_name   Pointer to a string that contains the username.
+*
+*               pw          Pointer to a string that contains the password.
+*
+* Return(s)   : DEF_OK,   Authentication success.
+*
+*               DEF_FAIL, Connection is refused.
+*
+* Caller(s)   : TELNETs_NVTLogin().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_AuthUser (CPU_CHAR  *user_name,
+                               CPU_CHAR  *pw)
+{
+    if ((Str_Cmp(APP_TELNETS_USERNAME, user_name) == 0) &&              /* Validate username and password.              */
+        (Str_Cmp(APP_TELNETS_PWD, pw)             == 0)) {
+        return (DEF_OK);                                                /* DEF_OK,   Authentication success             */
+    }
+
+    return (DEF_FAIL);                                                  /* DEF_FAIL, Connection is refused.             */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        TELNETs_CmdHandlerExt()
+*
+* Description : Telnet server callback to execute external command.
+*
+* Argument(s) : pcmd_line           Pointer to a string that contains the command line received.
+*
+*               pcwd                Pointer to the current working directory.
+*
+*               psession_active     Active session or not.
+*
+*               pout_opt            Pointer to output option.
+*
+*               pout_fnct           Pointer to the output function.
+*
+*               perr                Pointer to variable that will receive the return error code from this:
+*
+*                                       TELNETs_ERR_NONE
+*                                       TELNETs_ERR_CMD_EXEC
+*
+* Return(s)   : Command specific return value.
+*
+* Caller(s)   : TELNETs_Cmd().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  TELNETs_CmdHandlerExt (CPU_CHAR         *pcmd_line,
+                                   void             *pcwd,
+                                   CPU_BOOLEAN      *psession_active,
+                                   void             *pout_opt,
+                                   TELNET_OUT_FNCT   pout_fnct,
+                                   TELNETs_ERR      *perr)
+{
+    CPU_INT16S           rtn;
+
+
+    if (Str_Cmp(APP_TELNET_CMD_TEST, pcmd_line) == 0) {         /* Check the command.                                   */
+                                                                /* If the test command is recognized...                 */
+        pout_fnct(APP_TELNET_SUCCESS_STR, sizeof(APP_TELNET_SUCCESS_STR), pout_opt);
+        rtn = sizeof(APP_TELNET_SUCCESS_STR);
+       *perr = TELNETs_ERR_NONE;
+    } else {
+                                                                /* If no command is recognized...                       */
+        pout_fnct(APP_TELNET_FAILURE_STR, sizeof(APP_TELNET_FAILURE_STR), pout_opt);
+        rtn = DEF_NULL;
+       *perr = TELNETs_ERR_CMD_EXEC;
+    }
+
+     return (rtn);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TELNETs/OS/uCOS-II/telnet-s_os.c b/src/ucos_v1_42/micrium_source/uC-TELNETs/OS/uCOS-II/telnet-s_os.c
new file mode 100644
index 0000000..c7c0148
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TELNETs/OS/uCOS-II/telnet-s_os.c
@@ -0,0 +1,503 @@
+/*
+*********************************************************************************************************
+*                                             uC/TELNETs
+*                                           Telnet (server)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TELNETs is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                TELNET SERVER OPERATING SYSTEM LAYER
+*
+*                                          Micrium uC/OS-II
+*
+* Filename      : telnet-s_os.c
+* Version       : V1.05.02
+* Programmer(s) : SR
+*                 SL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/OS-II V2.86 (or more recent version) is included in the project build.
+*
+*                 (2) REQUIREs the following uC/OS-II feature(s) to be ENABLED :
+*
+*                         --------- FEATURE --------    -- MINIMUM CONFIGURATION FOR TELNETs/OS PORT --
+*
+*                     (a) Tasks
+*                         (1) OS_TASK_DEL_EN            Enabled
+*                         (2) OS_TASK_SUSPEND_EN        Enabled
+*
+*                     (b) Time Delay
+*                         (1) OS_TIME_DLY_HMSM_EN       Enabled
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include                                      /* See this 'telnet-s_os.c  Note #1'.                   */
+
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+                                                                /* See this 'telnet-s_os.c  Note #1'.                   */
+#if     (OS_VERSION < 286u)
+#error  "OS_VERSION [SHOULD be >= V2.86]"
+#endif
+
+
+
+                                                                /* See this 'telnet-s_os.c  Note #2a'.                  */
+#if     (OS_TASK_DEL_EN < 1u)
+#error  "OS_TASK_DEL_EN illegally #define'd in 'os_cfg.h' [MUST be  > 0, (see 'telnet-s_os.c  Note #2a1')]"
+#endif
+
+#if     (OS_TASK_SUSPEND_EN < 1u)
+#error  "OS_TASK_SUSPEND_EN illegally #define'd in 'os_cfg.h' [MUST be  > 0, (see 'telnet-s_os.c  Note #2a2')]"
+#endif
+
+
+
+                                                                /* See this 'telnet-s_os.c  Note #2b'.                  */
+#if     (OS_TIME_DLY_HMSM_EN < 1u)
+#error  "OS_TIME_DLY_HMSM_EN illegally #define'd in 'os_cfg.h' [MUST be  > 0, (see 'telnet-s_os.c  Note #2b1')]"
+#endif
+
+
+
+
+#ifndef  TELNETs_OS_CFG_SERVER_TASK_PRIO
+#error  "TELNETs_OS_CFG_SERVER_TASK_PRIO not #define'd in 'telnet-s_cfg.h' [MUST be  >= 0u]"
+
+#elif   (TELNETs_OS_CFG_SERVER_TASK_PRIO < 0u)
+#error  "TELNETs_OS_CFG_SERVER_TASK_PRIO illegally #define'd in 'telnet-s_cfg.h' [MUST be  >= 0u]"
+#endif
+
+
+#ifndef  TELNETs_OS_CFG_SESSION_TASK_PRIO
+#error  "TELNETs_OS_CFG_SESSION_TASK_PRIO not #define'd in 'telnet-s_cfg.h' [MUST be  >= 0u]"
+
+#elif   (TELNETs_OS_CFG_SESSION_TASK_PRIO   < 0u)
+#error  "TELNETs_OS_CFG_SESSION_TASK_PRIO illegally #define'd in 'telnet-s_cfg.h' [MUST be  >= 0u]"
+#endif
+
+
+
+#ifndef  TELNETs_OS_CFG_SERVER_TASK_STK_SIZE
+#error  "TELNETs_OS_CFG_SERVER_TASK_STK_SIZE not #define'd in 'telnet-s_cfg.h' [MUST be  > 0u]"
+
+#elif   (TELNETs_OS_CFG_SERVER_TASK_STK_SIZE < 1u)
+#error  "TELNETs_OS_CFG_SERVER_TASK_STK_SIZE illegally #define'd in 'telnet-s_cfg.h' [MUST be  > 0u]"
+#endif
+
+
+#ifndef  TELNETs_OS_CFG_SESSION_TASK_STK_SIZE
+#error  "TELNETs_OS_CFG_SESSION_TASK_STK_SIZE not #define'd in 'telnet-s_cfg.h' [MUST be  > 0u]"
+
+#elif   (TELNETs_OS_CFG_SESSION_TASK_STK_SIZE   < 1u)
+#error  "TELNETs_OS_CFG_SESSION_TASK_STK_SIZE illegally #define'd in 'telnet-s_cfg.h' [MUST be  > 0u]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     OS TASK/OBJECT NAME DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- TASK NAMES -------------------- */
+                                          /*           1         2 */
+                                          /* 012345678901234567890 */
+#define  TELNETs_OS_SERVER_TASK_NAME        "TELNET (Server) "
+#define  TELNETs_OS_SESSION_TASK_NAME       "TELNET (Session)"
+
+#define  TELNETs_OS_OBJ_NAME_SIZE_MAX                     20    /* Maximum of ALL TELNETs object name sizes.            */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- TASK STACKS -------------------- */
+static  OS_STK  TELNETs_OS_ServerTaskStk[TELNETs_OS_CFG_SERVER_TASK_STK_SIZE];
+static  OS_STK  TELNETs_OS_SessionTaskStk[TELNETs_OS_CFG_SESSION_TASK_STK_SIZE];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* --------- TELNETs TASK MANAGEMENT FUNCTION --------- */
+static  void  TELNETs_OS_ServerTask (void  *p_data);
+
+                                                                /* ----- TELNETs SESSION TASK MANAGEMENT FUNCTION ----- */
+static  void  TELNETs_OS_SessionTask(void  *p_data);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          TELNETs FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     TELNETs_OS_ServerTaskInit()
+*
+* Description : (1) Perform TELNET server/OS initialization :
+*
+*                   (a) Create TELNET server task
+*
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-II).
+*
+* Return(s)   : DEF_OK,   if server task successfully created.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : TELNETs_Init().
+*
+*               This function is an INTERNAL telnet server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_OS_ServerTaskInit (void  *p_data)
+{
+    INT8U  os_err;
+
+
+                                                                /* Create TELNET server         task.                   */
+#if (OS_TASK_CREATE_EXT_EN > 0u)
+    #if (OS_STK_GROWTH == 1u)
+    os_err = OSTaskCreateExt((void (*)(void *)) TELNETs_OS_ServerTask,
+                             (void          * ) p_data,
+                                                                                                    /* Set Top-Of-Stack.    */
+                             (OS_STK        * )&TELNETs_OS_ServerTaskStk[TELNETs_OS_CFG_SERVER_TASK_STK_SIZE - 1],
+                             (INT8U           ) TELNETs_OS_CFG_SERVER_TASK_PRIO,
+                             (INT16U          ) TELNETs_OS_CFG_SERVER_TASK_PRIO,
+                             (OS_STK        * )&TELNETs_OS_ServerTaskStk[0],                        /* Set Bottom-Of-Stack. */
+                             (INT32U          ) TELNETs_OS_CFG_SERVER_TASK_STK_SIZE,
+                             (void          * ) 0,
+                             (INT16U          ) OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);
+    #else
+    os_err = OSTaskCreateExt((void (*)(void *)) TELNETs_OS_ServerTask,
+                             (void          * ) p_data,
+                             (OS_STK        * )&TELNETs_OS_ServerTaskStk[0],                        /* Set Top-Of-Stack.    */
+                             (INT8U           ) TELNETs_OS_CFG_SERVER_TASK_PRIO,
+                             (INT16U          ) TELNETs_OS_CFG_SERVER_TASK_PRIO,
+                                                                                                    /* Set Bottom-Of-Stack. */
+                             (OS_STK        * )&TELNETs_OS_ServerTaskStk[TELNETs_OS_CFG_SERVER_TASK_STK_SIZE - 1],/
+                             (INT32U          ) TELNETs_OS_CFG_SERVER_TASK_STK_SIZE,
+                             (void          * ) 0,                                                  /* No TCB extension.    */
+                             (INT16U          ) OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);
+    #endif
+#else
+    #if (OS_STK_GROWTH == 1)
+    os_err = OSTaskCreate( TELNETs_OS_ServerTask,
+    os_err = OSTaskCreate((void (*)(void *)) TELNETs_OS_ServerTask,
+                          (void          * ) p_data,
+                                                                                                    /* Set Bottom-Of-Stack. */
+                          (OS_STK        * )&TELNETs_OS_ServerTaskStk[TELNETs_OS_CFG_SERVER_TASK_STK_SIZE - 1],
+                          (INT8U           ) TELNETs_OS_CFG_SERVER_TASK_PRIO);
+    #else
+    os_err = OSTaskCreate((void (*)(void *)) TELNETs_OS_ServerTask,
+                          (void          * ) p_data,
+                          (OS_STK        * )&TELNETs_OS_ServerTaskStk[0],                           /* Set Top-Of-Stack.    */
+                          (INT8U           ) TELNETs_OS_CFG_SERVER_TASK_PRIO);
+    #endif
+#endif
+
+    if (os_err != OS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+#if (((OS_VERSION >= 288u) && (OS_TASK_NAME_EN   >  0u)) || \
+     ((OS_VERSION <  288u) && (OS_TASK_NAME_SIZE >= TELNETs_OS_OBJ_NAME_SIZE_MAX)))
+    OSTaskNameSet((INT8U  ) TELNETs_OS_CFG_SERVER_TASK_PRIO,
+                  (INT8U *) TELNETs_OS_SERVER_TASK_NAME,
+                  (INT8U *)&os_err);
+#endif
+
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TELNETs_OS_ServerTask()
+*
+* Description : OS-dependent FTP server task.
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-II).
+*
+* Return(s)   : none.
+*
+* Created by  : TELNETs_OS_ServerTaskInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  TELNETs_OS_ServerTask (void  *p_data)
+{
+    TELNETs_ServerTask(p_data);                                 /* Call TELNET server           task.                   */
+}
+
+
+/*
+*********************************************************************************************************
+*                                    TELNETs_OS_SessionTaskInit()
+*
+* Description : (1) Perform TELNET server/OS session task initialization :
+*
+*                   (a) Create TELNET server session task
+*
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-II).
+*
+* Return(s)   : DEF_OK,   if server task successfully created.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : TELNETs_ServerTask().
+*
+*               This function is an INTERNAL TELNET server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_OS_SessionTaskInit (void  *p_data)
+{
+    INT8U  os_err;
+
+
+                                                                /* Create TELNET server session task.                   */
+#if (OS_TASK_CREATE_EXT_EN > 0u)
+    #if (OS_STK_GROWTH == 1u)
+    os_err = OSTaskCreateExt((void (*)(void *)) TELNETs_OS_SessionTask,
+                             (void          * ) p_data,
+                                                                                                    /* Set Top-Of-Stack.    */
+                             (OS_STK        * )&TELNETs_OS_SessionTaskStk[TELNETs_OS_CFG_SESSION_TASK_STK_SIZE - 1],
+                             (INT8U           ) TELNETs_OS_CFG_SESSION_TASK_PRIO,
+                             (INT16U          ) TELNETs_OS_CFG_SESSION_TASK_PRIO,
+                             (OS_STK        * )&TELNETs_OS_SessionTaskStk[0],                       /* Set Bottom-Of-Stack. */
+                             (INT32U          ) TELNETs_OS_CFG_SESSION_TASK_STK_SIZE,
+                             (void          * ) 0,
+                             (INT16U          ) OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);
+    #else
+    os_err = OSTaskCreateExt((void (*)(void *)) TELNETs_OS_SessionTask,
+                             (void          * ) p_data,
+                             (OS_STK        * )&TELNETs_OS_SessionTaskStk[0],                       /* Set Top-Of-Stack.    */
+                             (INT8U           ) TELNETs_OS_CFG_SESSION_TASK_PRIO,
+                             (INT16U          ) TELNETs_OS_CFG_SESSION_TASK_PRIO,
+                                                                                                    /* Set Bottom-Of-Stack. */
+                             (OS_STK        * )&TELNETs_OS_SessionTaskStk[TELNETs_OS_CFG_SESSION_TASK_STK_SIZE - 1],/
+                             (INT32U          ) TELNETs_OS_CFG_SESSION_TASK_STK_SIZE,
+                             (void          * ) 0,                                                  /* No TCB extension.    */
+                             (INT16U          ) OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);
+    #endif
+#else
+    #if (OS_STK_GROWTH == 1)
+    os_err = OSTaskCreate((void (*)(void *)) TELNETs_OS_SessionTask,
+                          (void          * ) p_data,
+                                                                                                    /* Set Bottom-Of-Stack. */
+                          (OS_STK        * )&TELNETs_OS_SessionTaskStk[TELNETs_OS_CFG_SESSION_TASK_STK_SIZE - 1],
+                          (INT8U           ) TELNETs_OS_CFG_SESSION_TASK_PRIO);
+    #else
+    os_err = OSTaskCreate((void (*)(void *)) TELNETs_OS_SessionTask,
+                          (void          * ) p_data,
+                          (OS_STK        * )&TELNETs_OS_SessionTaskStk[0],                          /* Set Top-Of-Stack.    */
+                          (INT8U           ) TELNETs_OS_CFG_SESSION_TASK_PRIO);
+    #endif
+#endif
+
+    if (os_err != OS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+#if (((OS_VERSION >= 288u) && (OS_TASK_NAME_EN   >  0u)) || \
+     ((OS_VERSION <  288u) && (OS_TASK_NAME_SIZE >= TELNETs_OS_OBJ_NAME_SIZE_MAX)))
+    OSTaskNameSet((INT8U  ) TELNETs_OS_CFG_SESSION_TASK_PRIO,
+                  (INT8U *) TELNETs_OS_SESSION_TASK_NAME,
+                  (INT8U *)&os_err);
+#endif
+
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      TELNETs_OS_SessionTask()
+*
+* Description : OS-dependent FTP server task.
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-III).
+*
+* Return(s)   : none.
+*
+* Created by  : TELNETs_OS_SessionTaskInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  TELNETs_OS_SessionTask (void  *p_data)
+{
+    TELNETs_SessionTask(p_data);                                /* Call TELNET session          task.                   */
+}
+
+
+/*
+*********************************************************************************************************
+*                                      TELNETs_OS_TaskSuspend()
+*
+* Description : Suspend the TELNET server task.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_Task().
+*
+*               This function is an INTERNAL TELNET server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  TELNETs_OS_TaskSuspend (void)
+{
+    OSTaskSuspend(OS_PRIO_SELF);                                /* Suspend TELNET server    task.                       */
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TELNETs_OS_TaskDelete()
+*
+* Description : Delete the TELNET server session task.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_Session_Task().
+*
+*               This function is an INTERNAL telnet server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  TELNETs_OS_TaskDelete (void)
+{
+    OSTaskDel(OS_PRIO_SELF);                                    /* Delete TELNET server session task.                   */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        TELNETs_OS_TimeDly()
+*
+* Description : Delay for specified time, in hours, minutes, seconds & milliseconds.
+*
+* Argument(s) : time_hr     Specifies the number of hours that the task will be delayed (max. is 255).
+*               time_min    Specifies the number of minutes (max. 59).
+*               time_sec    Specifies the number of seconds (max. 59).
+*               time_ms     Specifies the number of milliseconds (max. 999).
+*
+* Return(s)   : DEF_OK,   if delay successfully inserted.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : TELNETs_Tx(),
+*               TELNETs_NVTLogin().
+*
+*               This function is an INTERNAL FTP server function & SHOULD NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_OS_TimeDly (INT8U  time_hr,
+                                 INT8U  time_min,
+                                 INT8U  time_sec,
+                                 INT8U  time_ms)
+{
+    CPU_BOOLEAN  rtn_val;
+    INT8U        os_err;
+
+
+    os_err = OSTimeDlyHMSM((INT8U) time_hr,
+                           (INT8U) time_min,
+                           (INT8U) time_sec,
+                           (INT8U) time_ms);
+
+    if (os_err == OS_ERR_NONE) {
+        rtn_val = DEF_OK;
+    } else {
+        rtn_val = DEF_FAIL;
+    }
+
+    return (rtn_val);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TELNETs/OS/uCOS-III/telnet-s_os.c b/src/ucos_v1_42/micrium_source/uC-TELNETs/OS/uCOS-III/telnet-s_os.c
new file mode 100644
index 0000000..8db86fb
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TELNETs/OS/uCOS-III/telnet-s_os.c
@@ -0,0 +1,462 @@
+/*
+*********************************************************************************************************
+*                                             uC/TELNETs
+*                                           Telnet (server)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TELNETs is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                TELNET SERVER OPERATING SYSTEM LAYER
+*
+*                                          Micrium uC/OS-III
+*
+* Filename      : telnet-s_os.c
+* Version       : V1.05.02
+* Programmer(s) : SR
+*                 SL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes uC/OS-III V3.01.0 (or more recent version) is included in the project build.
+*
+*                 (2) REQUIREs the following uC/OS-III feature(s) to be ENABLED :
+*
+*                         --------- FEATURE --------    -- MINIMUM CONFIGURATION FOR TELNETs/OS PORT --
+*
+*                     (a) Tasks
+*                         (1) OS_CFG_TASK_DEL_EN        Enabled
+*                         (2) OS_CFG_TASK_SUSPEND_EN    Enabled
+*
+*                     (b) Time Delay
+*                         (1) OS_CFG_TIME_DLY_HMSM_EN   Enabled
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../../Source/telnet-s.h"
+#include                                           /* See this 'telnet-s_os.c  Note #1'.                   */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* See this 'telnet-s_os.c  Note #1'.                   */
+#if     (OS_VERSION < 3010u)
+#error  "OS_VERSION [SHOULD be >= V3.01.0]"
+#endif
+
+
+
+                                                                /* See this 'telnet-s_os.c  Note #2a'.                  */
+#if     (OS_CFG_TASK_DEL_EN < 1u)
+#error  "OS_CFG_TASK_DEL_EN illegally #define'd in 'os_cfg.h'               "
+#error  "                                       [MUST be  > 0, (see 'telnet-s_os.c  Note #2a1')]"
+#endif
+
+#if     (OS_CFG_TASK_SUSPEND_EN < 1u)
+#error  "OS_CFG_TASK_SUSPEND_EN illegally #define'd in 'os_cfg.h' [MUST be  > 0, (see 'telnet-s_os.c  Note #2a2')]"
+#endif
+
+
+
+                                                                /* See this 'telnet-s_os.c  Note #2b'.                  */
+#if     (OS_CFG_TIME_DLY_HMSM_EN < 1u)
+#error  "OS_CFG_TIME_DLY_HMSM_EN illegally #define'd in 'os_cfg.h' [MUST be  > 0, (see 'telnet-s_os.c  Note #2b1')]"
+#endif
+
+
+
+
+#ifndef  TELNETs_OS_CFG_SERVER_TASK_PRIO
+#error  "TELNETs_OS_CFG_SERVER_TASK_PRIO not #define'd in 'telnet-s_cfg.h' [MUST be  >= 0u]"
+
+#elif   (TELNETs_OS_CFG_SERVER_TASK_PRIO < 0u)
+#error  "TELNETs_OS_CFG_SERVER_TASK_PRIO illegally #define'd in 'telnet-s_cfg.h' [MUST be  >= 0u]"
+#endif
+
+
+#ifndef  TELNETs_OS_CFG_SESSION_TASK_PRIO
+#error  "TELNETs_OS_CFG_SESSION_TASK_PRIO not #define'd in 'telnet-s_cfg.h' [MUST be  >= 0u]"
+
+#elif   (TELNETs_OS_CFG_SESSION_TASK_PRIO   < 0u)
+#error  "TELNETs_OS_CFG_SESSION_TASK_PRIO illegally #define'd in 'telnet-s_cfg.h' [MUST be  >= 0u]"
+#endif
+
+
+
+#ifndef  TELNETs_OS_CFG_SERVER_TASK_STK_SIZE
+#error  "TELNETs_OS_CFG_SERVER_TASK_STK_SIZE not #define'd in 'telnet-s_cfg.h' [MUST be  > 0u]"
+
+#elif   (TELNETs_OS_CFG_SERVER_TASK_STK_SIZE < 1u)
+#error  "TELNETs_OS_CFG_SERVER_TASK_STK_SIZE illegally #define'd in 'telnet-s_cfg.h' [MUST be  > 0u]"
+#endif
+
+
+#ifndef  TELNETs_OS_CFG_SESSION_TASK_STK_SIZE
+#error  "TELNETs_OS_CFG_SESSION_TASK_STK_SIZE not #define'd in 'telnet-s_cfg.h' [MUST be  > 0u]"
+
+#elif   (TELNETs_OS_CFG_SESSION_TASK_STK_SIZE   < 1u)
+#error  "TELNETs_OS_CFG_SESSION_TASK_STK_SIZE illegally #define'd in 'telnet-s_cfg.h' [MUST be  > 0u]"
+#endif
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     OS TASK/OBJECT NAME DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- TASK NAMES -------------------- */
+                                          /*           1         2 */
+                                          /* 012345678901234567890 */
+#define  TELNETs_OS_SERVER_TASK_NAME        "TELNET (Server)"
+#define  TELNETs_OS_SESSION_TASK_NAME       "TELNET (Session)"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- TASK TCBs --------------------- */
+static  OS_TCB   TELNETs_OS_ServerTaskTCB;
+static  OS_TCB   TELNETs_OS_SessionTaskTCB;
+
+
+                                                                /* ------------------- TASK STACKS -------------------- */
+static  CPU_STK  TELNETs_OS_ServerTaskStk[TELNETs_OS_CFG_SERVER_TASK_STK_SIZE];
+static  CPU_STK  TELNETs_OS_Session_TaskStk[TELNETs_OS_CFG_SESSION_TASK_STK_SIZE];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* --------- TELNETs TASK MANAGEMENT FUNCTION --------- */
+static  void  TELNETs_OS_ServerTask (void  *p_data);
+
+                                                                /* ----- TELNETs SESSION TASK MANAGEMENT FUNCTION ----- */
+static  void  TELNETs_OS_SessionTask(void  *p_data);
+
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          TELNETs FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     TELNETs_OS_ServerTaskInit()
+*
+* Description : (1) Perform TELNET server/OS initialization :
+*
+*                   (a) Create TELNET server task
+*
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-III).
+*
+* Return(s)   : DEF_OK,   if server task successfully created.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : TELNETs_Init().
+*
+*               This function is an INTERNAL telnet server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_OS_ServerTaskInit (void  *p_data)
+{
+    OS_ERR  os_err;
+
+
+                                                                /* Create TELNET server             task.               */
+    OSTaskCreate((OS_TCB     *)&TELNETs_OS_ServerTaskTCB,
+                 (CPU_CHAR   *) TELNETs_OS_SERVER_TASK_NAME,
+                 (OS_TASK_PTR ) TELNETs_OS_ServerTask,
+                 (void       *) p_data,
+                 (OS_PRIO     ) TELNETs_OS_CFG_SERVER_TASK_PRIO,
+                 (CPU_STK    *)&TELNETs_OS_ServerTaskStk[0],
+                 (CPU_STK_SIZE)(TELNETs_OS_CFG_SERVER_TASK_STK_SIZE / 10u),
+                 (CPU_STK_SIZE) TELNETs_OS_CFG_SERVER_TASK_STK_SIZE,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    if (os_err != OS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TELNETs_OS_ServerTask()
+*
+* Description : OS-dependent FTP server task.
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-III).
+*
+* Return(s)   : none.
+*
+* Created by  : TELNETs_OS_ServerTaskInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  TELNETs_OS_ServerTask (void  *p_data)
+{
+    TELNETs_ServerTask(p_data);                                 /* Call TELNET server  task body.                       */
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                    TELNETs_OS_SessionTaskInit()
+*
+* Description : (1) Perform TELNET server/OS session task initialization :
+*
+*                   (a) Create TELNET server session task
+*
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-III).
+*
+* Return(s)   : DEF_OK,   if server task successfully created.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : TELNETs_ServerTask().
+*
+*               This function is an INTERNAL telnet server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_OS_SessionTaskInit (void  *p_data)
+{
+    OS_ERR  os_err;
+
+
+                                                                /* Create TELNET server session     task.               */
+    OSTaskCreate((OS_TCB     *)&TELNETs_OS_SessionTaskTCB,
+                 (CPU_CHAR   *) TELNETs_OS_SESSION_TASK_NAME,
+                 (OS_TASK_PTR ) TELNETs_OS_SessionTask,
+                 (void       *) p_data,
+                 (OS_PRIO     ) TELNETs_OS_CFG_SESSION_TASK_PRIO,
+                 (CPU_STK    *)&TELNETs_OS_Session_TaskStk[0],
+                 (CPU_STK_SIZE)(TELNETs_OS_CFG_SESSION_TASK_STK_SIZE / 10u),
+                 (CPU_STK_SIZE) TELNETs_OS_CFG_SESSION_TASK_STK_SIZE,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    if (os_err != OS_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      TELNETs_OS_SessionTask()
+*
+* Description : OS-dependent FTP server task.
+*
+* Argument(s) : p_data      Pointer to task initialization data (required by uC/OS-III).
+*
+* Return(s)   : none.
+*
+* Created by  : TELNETs_OS_SessionTaskInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  TELNETs_OS_SessionTask (void  *p_data)
+{
+    TELNETs_SessionTask(p_data);                                /* Call TELNET session task body.                       */
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                      TELNETs_OS_TaskSuspend()
+*
+* Description : Suspend the TELNET server task.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_Task().
+*
+*               This function is an INTERNAL telnet server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  TELNETs_OS_TaskSuspend (void)
+{
+    OS_ERR  os_err;
+
+
+    OSTaskSuspend((OS_TCB *)&TELNETs_OS_ServerTaskTCB,          /* Suspend the TELNET server        task.               */
+                  (OS_ERR *)&os_err);
+
+   (void)&os_err;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       TELNETs_OS_TaskDelete()
+*
+* Description : Delete the TELNET server session task.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_Session_Task().
+*
+*               This function is an INTERNAL telnet server function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  TELNETs_OS_TaskDelete (void)
+{
+    OS_ERR  os_err;
+
+
+    OSTaskDel((OS_TCB *)&TELNETs_OS_SessionTaskTCB,             /* Delete the TELNET server session task.               */
+              (OS_ERR *)&os_err);
+
+   (void)&os_err;
+}
+
+
+
+/*
+*********************************************************************************************************
+*                                        TELNETs_OS_TimeDly()
+*
+* Description : Delay for specified time, in hours, minutes, seconds & milliseconds.
+*
+* Argument(s) : time_hr     Specifies the number of hours that the task will be delayed (max. is 255).
+*               time_min    Specifies the number of minutes (max. 59).
+*               time_sec    Specifies the number of seconds (max. 59).
+*               time_ms     Specifies the number of milliseconds (max. 999).
+*
+* Return(s)   : DEF_OK,   if delay successfully inserted.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : TELNETs_Tx(),
+*               TELNETs_NVTLogin().
+*
+*               This function is an INTERNAL telnet server function & SHOULD NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_OS_TimeDly (CPU_INT08U  time_hr,
+                                 CPU_INT08U  time_min,
+                                 CPU_INT08U  time_sec,
+                                 CPU_INT08U  time_ms)
+{
+    CPU_BOOLEAN  rtn_val;
+    OS_ERR       os_err;
+
+
+    OSTimeDlyHMSM((CPU_INT16U) time_hr,
+                  (CPU_INT16U) time_min,
+                  (CPU_INT16U) time_sec,
+                  (CPU_INT32U) time_ms,
+                  (OS_OPT    ) OS_OPT_TIME_HMSM_NON_STRICT,
+                  (OS_ERR   *)&os_err);
+
+    if (os_err == OS_ERR_NONE) {
+        rtn_val = DEF_OK;
+    } else {
+        rtn_val = DEF_FAIL;
+    }
+
+    return (rtn_val);
+}
+
diff --git a/src/ucos_v1_42/micrium_source/uC-TELNETs/Shell/telnet-s_shell.c b/src/ucos_v1_42/micrium_source/uC-TELNETs/Shell/telnet-s_shell.c
new file mode 100644
index 0000000..e35a2c2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TELNETs/Shell/telnet-s_shell.c
@@ -0,0 +1,287 @@
+/*
+*********************************************************************************************************
+*                                             uC/TELNETs
+*                                           Telnet (server)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TELNETs is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   TELNET SERVER CMD SOURCE CODE
+*
+* Filename      : telnet-s_shell.c
+* Version       : V1.05.02
+* Programmer(s) : AA
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V3.00.00
+*                     (b) uC/OS-II  V2.90.00 or
+*                         uC/OS-III V3.03.01
+*                     (c) uC/Shell  V1.03.01
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#define  TELNETs_CMD_MODULE
+
+#include  "../Source/telnet-s.h"
+#include  "telnet-s_shell.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#define  TELNETs_CMD_DFLT_USER         ("DUT")
+#define  TELNETs_CMD_DFLT_PASSWORD     ("micrium")
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  struct telnets_cmd_output {
+    TELNET_OUT_FNCT   OutFnct;
+    void             *OutOpt_Ptr;
+} TELNETs_CMD_OUTPUT;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_CHAR  UserName[TELNETs_CFG_MAX_USR_NAME_LEN];
+CPU_CHAR  Password[TELNETs_CFG_MAX_PW_LEN];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  TELNETsShell_Output (CPU_CHAR    *p_buf,
+                                         CPU_INT16U   buf_len,
+                                         void        *p_opt);
+
+
+/*
+*********************************************************************************************************
+*                                          TELNETsSHELL_Init()
+*
+* Description : (1) Initialize Telnet implmentation with uC/Shell:
+*
+*                       (a) Set Telnet User and password for the authentication module.
+*
+*
+* Argument(s) : user_name   Pointer to a string that contain the login username.
+*
+*               password    Pointer to a string that contain the login password.
+*
+*               ip_type     Value of the IP version (IPv4/IPv6) to use for the TELNET server.
+*
+*               p_err       is a pointer to an error code which will be returned to your application:
+*
+*                             TEMPLATE_TEST_ERR_NONE            No error.
+*
+*                             TEMPLATE_TEST_ERR_SHELL_INIT    Command table not added to uC-Shell
+*
+* Return(s)   : none.
+*
+* Caller(s)   : AppTaskStart().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  TELNETsShell_Init (CPU_CHAR  *user_name,
+                         CPU_CHAR  *password)
+{
+
+                                                                /* Set user & password for Authentication mechanism.    */
+    if (user_name[0] != ASCII_CHAR_NULL) {
+        Str_Copy_N(UserName, user_name, TELNETs_CFG_MAX_USR_NAME_LEN);
+    } else {
+        Str_Copy_N(UserName, TELNETs_CMD_DFLT_USER, TELNETs_CFG_MAX_USR_NAME_LEN);
+    }
+
+    if (password[0] != ASCII_CHAR_NULL) {
+        Str_Copy_N(Password, password, TELNETs_CFG_MAX_PW_LEN);
+    } else {
+        Str_Copy_N(Password, TELNETs_CMD_DFLT_PASSWORD, TELNETs_CFG_MAX_PW_LEN);
+    }
+}
+
+/*
+*********************************************************************************************************
+*                                          TELNETs_AuthUser()
+*
+* Description : Telnet server callback to authenticate a user during connection request.
+*
+* Argument(s) : user_name   Pointer to a string that contains the username.
+*
+*               pw          Pointer to a string that contains the password.
+*
+* Return(s)   : DEF_OK,   Authentication success.
+*
+*               DEF_FAIL, Connection is refused.
+*
+* Caller(s)   : TELNETs_NVTLogin().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_AuthUser (CPU_CHAR  *user_name,
+                               CPU_CHAR  *pw)
+{
+    if ((Str_Cmp(UserName, user_name) == 0) &&
+        (Str_Cmp(Password, pw)        == 0)) {
+        return (DEF_OK);
+    }
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        TELNETs_CmdHandlerExt()
+*
+* Description : Telnet server callback to execute external command. The command received is passed to uC/Shell.
+*
+* Argument(s) : pcmd_line           Pointer to a string that contains the command line received.
+*
+*               pcwd                Pointer to the current working directory.
+*
+*               psession_active     Active session or not.
+*
+*               pout_opt            Pointer to output option.
+*
+*               pout_fnct           Pointer to the output function.
+*
+*               perr                Pointer to variable that will receive the return error code from this:
+*
+*                                       TELNETs_ERR_NONE
+*                                       TELNETs_ERR_CMD_EXEC
+*
+* Return(s)   : Command specific return value.
+*
+* Caller(s)   : TELNETs_Cmd().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_INT16S  TELNETs_CmdHandlerExt (CPU_CHAR         *pcmd_line,
+                                   void             *pcwd,
+                                   CPU_BOOLEAN      *psession_active,
+                                   void             *pout_opt,
+                                   TELNET_OUT_FNCT   pout_fnct,
+                                   TELNETs_ERR      *perr)
+{
+    CPU_INT16S           rtn;
+    TELNETs_CMD_OUTPUT   outparam;
+    SHELL_CMD_PARAM      param;
+    SHELL_ERR            err;
+
+
+    outparam.OutFnct    = pout_fnct;
+    outparam.OutOpt_Ptr = pout_opt;
+    param.pout_opt      = &outparam;
+
+
+    rtn = Shell_Exec( pcmd_line,
+                      TELNETsShell_Output,
+                     ¶m,
+                     &err);
+    if (rtn > 0) {
+       *perr = TELNETs_ERR_NONE;
+
+    } else {
+        pout_fnct("Shell Exec Error\n\r\n\r", 20 ,pout_opt);
+       *perr = TELNETs_ERR_CMD_EXEC;
+    }
+
+    return (rtn);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TELNETsCmd_Output()
+*
+* Description : Callback function used by uC-Shell to output data via a Telnet session.
+*
+* Argument(s) : p_buf       Pointer to the buffer that contains the string to send via telnet.
+*
+*               buf_len     Data length to send.
+*
+*               p_opt       Pointer to output option/parameter.
+*
+* Return(s)   : Number of byte send by Telnet.
+*
+* Caller(s)   : Referenced by TELNETs_CmdHandlerExt().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  TELNETsShell_Output (CPU_CHAR    *p_buf,
+                                         CPU_INT16U   buf_len,
+                                         void        *p_opt)
+{
+    TELNETs_CMD_OUTPUT  *poutparam;
+    CPU_INT16S           rtn_val;
+
+
+    poutparam = (TELNETs_CMD_OUTPUT *)p_opt;
+
+    rtn_val   =  poutparam->OutFnct(p_buf, buf_len, poutparam->OutOpt_Ptr);
+
+    return (rtn_val);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TELNETs/Shell/telnet-s_shell.h b/src/ucos_v1_42/micrium_source/uC-TELNETs/Shell/telnet-s_shell.h
new file mode 100644
index 0000000..b080a86
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TELNETs/Shell/telnet-s_shell.h
@@ -0,0 +1,107 @@
+/*
+*********************************************************************************************************
+*                                             uC/TELNETs
+*                                           Telnet (server)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TELNETs is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   TELNET SERVER TEST SOURCE CODE
+*
+* Filename      : telnet-s_shell.h
+* Version       : V1.05.02
+* Programmer(s) : AA
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                     (a) uC/TCP-IP V3.00.00
+*                     (b) uC/OS-II  V2.90.00 or
+*                         uC/OS-III V3.03.01
+*                     (c) uC/Shell  V1.03.01
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  TELNETs_SHELL_MODULE_PRESENT
+#define  TELNETs_SHELL_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The following common software files are located in the following directories :
+*
+*               (a) \\lib*.*
+*
+*               (b) (1) \\cpu_def.h
+*
+*                   (2) \\\\cpu*.*
+*
+*                   where
+*                         directory path for custom   library      software
+*                           directory path for common   CPU-compiler software
+*                                              directory name for specific processor (CPU)
+*                                         directory name for specific compiler
+*
+*           (3) NO compiler-supplied standard library functions SHOULD be used.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void       TELNETsShell_Init (CPU_CHAR              *user_name,
+                              CPU_CHAR              *password);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-TELNETs/Source/telnet-s.c b/src/ucos_v1_42/micrium_source/uC-TELNETs/Source/telnet-s.c
new file mode 100644
index 0000000..8106cd6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TELNETs/Source/telnet-s.c
@@ -0,0 +1,2250 @@
+/*
+*********************************************************************************************************
+*                                             uC/TELNETs
+*                                           Telnet (server)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TELNETs is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            TELNET SERVER
+*
+* Filename      : telnet-s.c
+* Version       : V1.05.02
+* Programmer(s) : SR
+*                 SL
+*                 AOP
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define    TELNETs_MODULE
+#include  "telnet-s.h"
+#include  
+
+#ifdef  NET_IPv4_MODULE_EN
+#include  
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+#include  
+#endif
+
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+#define  TELNETs_BS_CHAR                                  "\b"  /* Backspace  char.                                     */
+#define  TELNETs_BS_CHAR_LEN                               2u   /* Baskspace  char len.                                 */
+
+#define  TELNETs_WS_CHAR                                  " "   /* Whitespace char.                                     */
+#define  TELNETs_WS_CHAR_LEN                               1u   /* Whitespace char len.                                 */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* Used to know if the server is initialized in ...     */
+                                                                /* Secure cfg.                                          */
+static  const  TELNETs_SECURE_CFG        *TELNETs_SecureCfgPtr = (TELNETs_SECURE_CFG *)DEF_NULL;
+
+static         NET_SOCK_PROTOCOL_FAMILY   TELNETs_ProtocolFamily;
+
+
+/*
+*********************************************************************************************************
+*                                           INITIALIZED DATA
+*
+* Note(s) : (1) This constant table defines the supported telnet options.  Those options should be
+*               defined in telnet-s.h, under the "TELNET OPTION DEFINES" section.  Also, the number
+*               of options in this table MUST match the TELNET_NBR_OPT_SUPPORTED constant define in
+*               the header file.
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #1.                                         */
+static  const  CPU_INT08U  TELNETs_SupportedOptTbl[] = {
+    TELNET_OPT_ECHO,
+    TELNET_OPT_SUPPRESS_GA
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                            /* ---------------- RX FNCT --------------- */
+static  CPU_BOOLEAN   TELNETs_RxSessionData(TELNETs_SESSION         *psession,
+                                            CPU_BOOLEAN              echo_en,
+                                            TELNETs_ERR             *perr);
+
+static  void          TELNETs_RxOptHandler (TELNETs_SESSION         *psession,
+                                            TELNETs_OPT_STATUS_CMD   opt_cmd_rx,
+                                            CPU_INT08U               opt_code_rx,
+                                            TELNETs_ERR             *perr);
+
+static  CPU_INT32S    TELNETs_Rx           (NET_SOCK_ID              sock_id,
+                                            CPU_CHAR                *pdata_buf,
+                                            CPU_INT16U               data_buf_len,
+                                            TELNETs_ERR             *perr);
+
+
+                                                                            /* ---------------- TX FNCT --------------- */
+static  void          TELNETs_TxOptReq     (TELNETs_SESSION         *psession,
+                                            TELNETs_OPT_STATUS_CMD   opt_status,
+                                            CPU_INT08U               opt_code,
+                                            TELNETs_ERR             *perr);
+
+static  void          TELNETs_TxOptRep     (TELNETs_SESSION         *psession,
+                                            TELNETs_OPT_STATUS_CMD   opt_status_req,
+                                            CPU_INT08U               opt_code,
+                                            TELNETs_OPT             *popt_cur,
+                                            TELNETs_ERR             *perr);
+
+static  CPU_BOOLEAN   TELNETs_TxGA         (TELNETs_SESSION         *psesssion,
+                                            TELNETs_ERR             *perr);
+
+static  CPU_BOOLEAN   TELNETs_TxCmd        (NET_SOCK_ID              sock_id,
+                                            CPU_INT08U               cmd_code,
+                                            CPU_INT08U               opt_code,
+                                            TELNETs_ERR             *perr);
+
+static  CPU_BOOLEAN   TELNETs_Tx           (NET_SOCK_ID              sock_id,
+                                            CPU_CHAR                *pdata_buf,
+                                            CPU_INT16U               data_buf_len,
+                                            TELNETs_ERR             *perr);
+
+
+                                                                            /* --------------- NVT FNCTS -------------- */
+static  CPU_BOOLEAN   TELNETs_NVTInit      (TELNETs_SESSION         *psession,
+                                            TELNETs_ERR             *perr);
+
+static  CPU_BOOLEAN   TELNETs_NVTLogin     (TELNETs_SESSION         *psession,
+                                            TELNETs_ERR             *perr);
+
+static  void          TELNETs_NVTPrint     (TELNETs_SESSION         *psession,
+                                            CPU_BOOLEAN              echo,
+                                            TELNETs_ERR             *perr);
+
+static  void          TELNETs_NVTTxPrompt  (TELNETs_SESSION         *psession,
+                                            TELNETs_ERR             *perr);
+
+static  void          TELNETs_NVTGetBuf    (TELNETs_SESSION         *psession,
+                                            CPU_CHAR                *dest_buf,
+                                            CPU_INT16U               dest_buf_len,
+                                            CPU_BOOLEAN              remove_eol,
+                                            TELNETs_ERR             *perr);
+
+static  CPU_BOOLEAN   TELNETs_NVTTerminate (TELNETs_SESSION         *psession);
+
+
+                                                                            /* --------------- CMD FNCT --------------- */
+static  CPU_INT16S    TELNETs_Cmd          (CPU_CHAR                *pcmd_line,
+                                            TELNETs_SESSION         *psession,
+                                            TELNETs_ERR             *perr);
+
+static  CPU_INT16S    TELNETs_CmdHandlerInt(CPU_CHAR                *pcmd_line,
+                                            void                    *pcwd,
+                                            CPU_BOOLEAN             *psession_active,
+                                            void                    *pout_opt,
+                                            TELNET_OUT_FNCT          pout_fnct,
+                                            TELNETs_ERR             *perr);
+
+
+                                                                            /* -------------- UTIL FNCTS -------------- */
+static  TELNETs_OPT  *TELNETs_GetOpt       (TELNETs_SESSION         *psession,
+                                            CPU_INT08U               opt_code);
+
+
+                                                                            /* ------------ SHELL OUT FNCT ------------ */
+static  CPU_INT16S    TELNETs_OutFnct      (CPU_CHAR                *pbuf,
+                                            CPU_INT16U               buf_len,
+                                            void                    *popt);
+
+
+/*
+*********************************************************************************************************
+*                                             TELNETs_Init()
+*
+* Description : Initialize the TELNET server.
+*
+* Argument(s) : p_secure_cfg    Desired value for server secure mode :
+*
+*                                   Secure Configuration Pointer    Server operations will     be secured.
+*                                   DEF_NULL                        Server operations will NOT be secured.
+*
+* Returns     : DEF_OK,   TELNET server initialization successful.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Your Product's Application.
+*
+*               This function is a TELNET server initialization function & MAY be called by
+*               application/initialization function(s).
+*
+* Note(s)     : (1) TELNETs_Init() MUST be called ...
+*
+*                   (a) AFTER  product's OS and network have been initialized.
+*
+*               (2) TELNETs_Init() MUST ONLY be called ONCE from product's application.
+*
+*               (3) Network security manager MUST be available & enabled to initialize the server in
+*                   secure mode.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_Init (       NET_SOCK_ADDR_FAMILY   family,
+                           const  TELNETs_SECURE_CFG    *p_secure_cfg)
+{
+    CPU_INT16U   nbr_opt;
+    CPU_BOOLEAN  rtn_val;
+    CPU_SR_ALLOC();
+
+
+#ifndef  NET_SECURE_MODULE_EN                                   /* See Note #3.                                         */
+    if (p_secure_cfg != DEF_NULL) {
+        TELNETs_TRACE_DBG(("TELNETs init failed. Security manager NOT available.\n"));
+        return (DEF_FAIL);
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    TELNETs_SecureCfgPtr = p_secure_cfg;                        /* Save secure mode cfg.                                */
+    switch (family) {
+        case NET_SOCK_ADDR_FAMILY_IP_V4:
+             TELNETs_ProtocolFamily = NET_SOCK_PROTOCOL_FAMILY_IP_V4;
+             break;
+
+        case NET_SOCK_ADDR_FAMILY_IP_V6:
+             TELNETs_ProtocolFamily = NET_SOCK_PROTOCOL_FAMILY_IP_V6;
+             break;
+
+        default:
+             CPU_CRITICAL_EXIT();
+             return (DEF_FAIL);
+    }
+    CPU_CRITICAL_EXIT();
+
+    TELNETs_NbrActiveSessionTask = 0;
+
+    nbr_opt = sizeof(TELNETs_SupportedOptTbl);                  /* Make sure the nbr of opt is consistent.              */
+    if (nbr_opt != TELNET_NBR_OPT_SUPPORTED) {
+        TELNETs_TRACE_DBG(("Telnet server initialization failed : inconsistent number of options\n\r"));
+        return (DEF_FAIL);
+    }
+
+
+    TELNETs_TRACE_INFO(("Telnet server initialization\n\r"));
+    rtn_val = TELNETs_OS_ServerTaskInit((void *)&family);
+    if (rtn_val == DEF_FAIL) {
+        TELNETs_TRACE_DBG(("Telnet server initialization failed\n\r"));
+    }
+
+    return (rtn_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TELNETs_ServerTask()
+*
+* Description : (1) Main TELNET server code :
+*
+*                   (a) Prepare socket and listen for clients
+*                   (b) Accept incoming connections
+*                   (c) Process connection
+*
+*
+* Argument(s) : p_arg           Argument passed to the task.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_OS_Task().
+*
+* Note(s)     : (2) On fatal error, close the server socket, break accept loop and re-open listen
+*                   (server) socket.
+*
+*               (3) If all available sessions are in use, reply to the client that the service is not
+*                   currently available and close the session socket.
+*********************************************************************************************************
+*/
+
+void  TELNETs_ServerTask (void  *p_arg)
+{
+#ifdef  NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR              ipv4_addr;
+#endif
+    CPU_INT08U                *p_addr;
+    NET_IP_ADDR_LEN            addr_len;
+    NET_PORT_NBR               port_nbr;
+    NET_SOCK_ID                sock_id_listen;
+    NET_SOCK_ID                sock_id_session;
+    NET_SOCK_ADDR              addr_server;
+    NET_SOCK_ADDR_LEN          addr_server_size;
+    NET_SOCK_ADDR              addr_client;
+    NET_SOCK_ADDR_LEN          addr_client_size;
+    CPU_INT16U                 msg_len;
+    CPU_BOOLEAN                rtn_val;
+    TELNETs_ERR                err_telnet;
+    NET_ERR                    net_err;
+
+
+
+   (void)&p_arg;
+
+    while (DEF_ON) {
+                                                                /* -------- PREPARE SOCKET & LISTEN FOR CLIENTS ------- */
+                                                                /* Open a sock.                                         */
+        sock_id_listen = NetSock_Open(TELNETs_ProtocolFamily,
+                                      NET_SOCK_TYPE_STREAM,
+                                      NET_SOCK_PROTOCOL_TCP,
+                                     &net_err);
+        if (net_err != NET_SOCK_ERR_NONE) {
+            TELNETs_OS_TaskSuspend();
+        }
+
+#ifdef  NET_SECURE_MODULE_EN                               /* Set or clear socket secure mode.                     */
+        if (TELNETs_SecureCfgPtr != DEF_NULL) {
+            (void)NetSock_CfgSecure(sock_id_listen,
+                                    DEF_YES,
+                                   &net_err);
+
+            if (net_err != NET_SOCK_ERR_NONE) {
+                TELNETs_TRACE_INFO(("TELNETs NetSock_Open() failed: No secure socket available.\n"));
+                NetSock_Close(sock_id_listen, &net_err);
+                TELNETs_OS_TaskSuspend();
+            }
+
+            (void)NetSock_CfgSecureServerCertKeyInstall(sock_id_listen,
+                                                        TELNETs_SecureCfgPtr->CertPtr,
+                                                        TELNETs_SecureCfgPtr->CertLen,
+                                                        TELNETs_SecureCfgPtr->KeyPtr,
+                                                        TELNETs_SecureCfgPtr->KeyLen,
+                                                        TELNETs_SecureCfgPtr->Fmt,
+                                                        TELNETs_SecureCfgPtr->CertChain,
+                                                       &net_err);
+
+            if (net_err != NET_SOCK_ERR_NONE) {
+                TELNETs_TRACE_INFO(("TELNETs NetSock_Open() failed: No secure socket available.\n"));
+                NetSock_Close(sock_id_listen, &net_err);
+                TELNETs_OS_TaskSuspend();
+            }
+        }
+#endif
+                                                                /* Set Sock Cfg to Block mode.                          */
+        NetSock_CfgBlock( sock_id_listen,
+                          DEF_YES,
+                         &net_err);
+        if (net_err != NET_SOCK_ERR_NONE) {
+            TELNETs_OS_TaskSuspend();
+        }
+
+        Mem_Set(&addr_server, (CPU_CHAR)0, NET_SOCK_ADDR_SIZE); /* Bind a local address so the client can send to us.   */
+
+        switch (TELNETs_ProtocolFamily) {
+#ifdef  NET_IPv4_MODULE_EN
+            case NET_SOCK_PROTOCOL_FAMILY_IP_V4:
+                 ipv4_addr = NET_UTIL_HOST_TO_NET_32(NET_IPv4_ADDR_ANY);
+                 p_addr    = (CPU_INT08U *)&ipv4_addr;
+                 addr_len  = NET_IPv4_ADDR_SIZE;
+                 break;
+#endif
+#ifdef  NET_IPv6_MODULE_EN
+            case NET_SOCK_PROTOCOL_FAMILY_IP_V6:
+                 p_addr    = (CPU_INT08U *)&NET_IPv6_ADDR_ANY;
+                 addr_len  = NET_IPv6_ADDR_SIZE;
+                 break;
+#endif
+
+            default:
+                TELNETs_OS_TaskSuspend();
+    }
+
+        if (TELNETs_SecureCfgPtr != DEF_NULL) {                 /* Set the port according to the secure mode cfg.       */
+            port_nbr = TELNETs_CFG_PORT_SERVER_SECURE;
+        } else {
+            port_nbr = TELNETs_CFG_PORT_SERVER;
+        }
+
+        NetApp_SetSockAddr(&addr_server,
+                            TELNETs_ProtocolFamily,
+                            port_nbr,
+                            p_addr,
+                            addr_len,
+                           &net_err);
+
+        addr_server_size = NET_SOCK_ADDR_SIZE;
+                                                                /* Bind to local addr and TELNETs port.                 */
+        NetSock_Bind((NET_SOCK_ID      ) sock_id_listen,
+                     (NET_SOCK_ADDR   *)&addr_server,
+                     (NET_SOCK_ADDR_LEN) addr_server_size,
+                     (NET_ERR         *)&net_err);
+        if (net_err != NET_SOCK_ERR_NONE) {
+            NetSock_Close(sock_id_listen, &net_err);
+            TELNETs_OS_TaskSuspend();
+        }
+
+                                                                /* Listen for clients.                                  */
+        NetSock_Listen( sock_id_listen,
+                        TELNETs_CONN_Q_SIZE,
+                       &net_err);
+        if (net_err != NET_SOCK_ERR_NONE) {
+            NetSock_Close(sock_id_listen, &net_err);
+            TELNETs_OS_TaskSuspend();
+        }
+
+        while (DEF_ON) {
+            CPU_BOOLEAN  flag = DEF_DISABLED;
+
+                                                                /* ---------------- ACCEPT INCOMING CONN -------------- */
+            addr_client_size = sizeof(addr_client);
+
+                                                                /* Accept conn.                                         */
+            sock_id_session = NetSock_Accept( sock_id_listen,
+                                             &addr_client,
+                                             &addr_client_size,
+                                             &net_err);
+            switch (net_err) {
+                case NET_SOCK_ERR_NONE:
+                     NetSock_OptSet(sock_id_session,
+                                    NET_SOCK_PROTOCOL_TCP,
+                                    NET_SOCK_OPT_TCP_NO_DELAY,
+                                   &flag,
+                                    sizeof(flag),
+                                   &net_err);
+                     break;
+
+                case NET_INIT_ERR_NOT_COMPLETED:
+                case NET_ERR_FAULT_NULL_PTR:
+                case NET_SOCK_ERR_NONE_AVAIL:
+                case NET_SOCK_ERR_CONN_ACCEPT_Q_NONE_AVAIL:
+                case NET_SOCK_ERR_CONN_SIGNAL_TIMEOUT:
+                case NET_ERR_FAULT_LOCK_ACQUIRE:
+                     continue;                                  /* Ignore transitory sock err.                          */
+
+                case NET_SOCK_ERR_NOT_USED:
+                case NET_SOCK_ERR_INVALID_SOCK:
+                case NET_SOCK_ERR_INVALID_TYPE:
+                case NET_SOCK_ERR_INVALID_FAMILY:
+                case NET_SOCK_ERR_INVALID_STATE:
+                case NET_SOCK_ERR_INVALID_OP:
+                case NET_SOCK_ERR_CONN_FAIL:
+                default:
+                     break;
+            }
+
+            if (net_err != NET_SOCK_ERR_NONE) {                 /* See Note #2.                                         */
+                NetSock_Close(sock_id_listen, &net_err);
+                break;
+            }
+
+                                                                /* -------------------- PROCESS CONN ------------------ */
+                                                                /* See Note #3.                                         */
+            if (TELNETs_NbrActiveSessionTask >= TELNETs_SESSION_TASKS_MAX) {
+                msg_len = Str_Len((CPU_CHAR *)TELNETs_NO_SERVICE_STR);
+                TELNETs_Tx((NET_SOCK_ID) sock_id_session,
+                           (CPU_CHAR  *) TELNETs_NO_SERVICE_STR,
+                           (CPU_INT16U ) msg_len,
+                           (TELNETs_ERR *)&err_telnet);
+
+                NetSock_Close(sock_id_session, &net_err);
+                continue;
+            }
+
+            TELNETs_NbrActiveSessionTask++;
+            TELNETs_ActiveSession.sock_id = sock_id_session;
+            rtn_val = TELNETs_OS_SessionTaskInit((void *)&TELNETs_ActiveSession);
+            if (rtn_val == DEF_FAIL) {
+                msg_len = Str_Len((CPU_CHAR *)TELNETs_NO_SERVICE_STR);
+                TELNETs_Tx((NET_SOCK_ID) sock_id_session,
+                           (CPU_CHAR  *) TELNETs_NO_SERVICE_STR,
+                           (CPU_INT16U ) msg_len,
+                           (TELNETs_ERR *)&err_telnet);
+
+                NetSock_Close(sock_id_session, &net_err);
+            }
+        }
+
+        if (net_err != NET_SOCK_ERR_NONE) {
+            continue;                                           /* Re-open sock on accept err.                          */
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         TELNETs_SessionTask()
+*
+* Description : (1) Main TELNET session code :
+*
+*                   (a) Initialize NVT
+*                   (b) Receive data from client
+*                   (c) Process received data
+*                   (d) Terminate session when needed
+*
+*
+* Argument(s) : p_arg           Argument passed to the task.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_OS_Task().
+*
+* Note(s)     : (1) If TELNETs_CmdProcess() returns TELNETs_ERR_CMD_EXEC, meaning there was an error
+*                   while executing command, NO error message is transmitted by the session task.  It is
+*                   the command responsibility to output such error to the client.
+*********************************************************************************************************
+*/
+
+void  TELNETs_SessionTask (void  *p_arg)
+{
+    TELNETs_SESSION  *psession;
+    CPU_BOOLEAN       init_done;
+    CPU_INT16U        tx_str_len;
+    TELNETs_ERR       err_telnet;
+    TELNETs_ERR       err_cmd;
+    NET_ERR           err_net;
+#if (TELNETs_CFG_FS_EN == DEF_ENABLED)
+    CPU_CHAR          working_dir[TELNETs_CFG_FS_MAX_PATH_NAME_LEN];
+#endif
+
+
+    psession                 = p_arg;
+    psession->session_active = DEF_NO;
+
+                                                                /* ---------------------- INIT NVT -------------------- */
+    init_done = TELNETs_NVTInit(psession, &err_telnet);
+    if (init_done == DEF_OK) {
+        psession->session_active = DEF_YES;
+
+#if (TELNETs_CFG_FS_EN == DEF_ENABLED)
+        Str_Copy(working_dir, (CPU_CHAR *)"\\");
+        psession->pcur_working_dir = (void *)working_dir;
+#else
+        psession->pcur_working_dir = (void *)0;
+#endif
+    }
+
+
+    while (psession->session_active == DEF_YES) {
+                                                                /* ---------------- RX DATA FROM CLIENT --------------- */
+        TELNETs_RxSessionData(psession, DEF_YES, &err_telnet);
+
+                                                                /* ----------------- PROCESS RX'D DATA ---------------- */
+        switch (err_telnet) {
+            case TELNETs_ERR_NONE:
+            TELNETs_NVTPrint(psession, DEF_YES, &err_telnet);
+
+                 if (err_telnet == TELNETs_ERR_NONE_EOL_RX) {   /* If EOL received ...                                  */
+                                                                /* ... parse and invoke user fnct.                      */
+                     if (psession->nvt_buf_len > TELNETs_EOL_STR_LEN) {
+                                                                /* Rem EOL.                                             */
+                         psession->nvt_buf[psession->nvt_buf_len - 2] = (CPU_CHAR)0;
+                         psession->nvt_buf_len = psession->nvt_buf_len - 2;
+
+                         TELNETs_Cmd( psession->nvt_buf,
+                                      psession,
+                                     &err_cmd);
+
+                         switch (err_cmd) {
+                             case TELNETs_ERR_NONE:             /* No err ...                                           */
+                                  break;                        /* ... nothing to do.                                   */
+
+                             case TELNETs_ERR_CMD_PROCESS:      /* Err processing cmd ...                               */
+                                                                /* ... tx err msg.                                      */
+                                  tx_str_len = Str_Len((CPU_CHAR *)TELNETs_CMD_PROCESS_ERR_STR);
+                                  TELNETs_Tx((NET_SOCK_ID  ) psession->sock_id,
+                                             (CPU_CHAR    *) TELNETs_CMD_PROCESS_ERR_STR,
+                                             (CPU_INT16U   ) tx_str_len,
+                                             (TELNETs_ERR *)&err_telnet);
+                                  break;
+
+                             case TELNETs_ERR_CMD_EXEC:         /* Err executing cmd ...                                */
+                                  break;                        /* ... nothing to do (see Note #1).                     */
+
+                             default:
+                                  break;
+                         }
+                     }
+
+                     psession->nvt_buf_len = 0;
+                                                                /* Tx cmd prompt and GA.                                */
+                     if (psession->session_active == DEF_YES) {
+                        TELNETs_NVTTxPrompt(psession, &err_telnet);
+                        TELNETs_TxGA(psession, &err_telnet);
+                     }
+                 }
+                 break;
+
+            case TELNETs_ERR_RX_TIMEOUT:
+            case TELNETs_ERR_CONN_CLOSED:
+            case TELNETs_ERR_RX:
+
+            default:
+                 psession->session_active = DEF_NO;
+                 break;
+        }
+    }
+
+                                                                /* ----------------- TERMINATE SESSION ---------------- */
+    TELNETs_TRACE_INFO(("Telnet server closing session socket.\n\r"));
+    NetSock_Close(psession->sock_id, &err_net);
+
+    TELNETs_NVTTerminate(psession);
+
+    TELNETs_TRACE_INFO(("Telnet server deleting session task.\n\r"));
+    TELNETs_NbrActiveSessionTask--;
+    TELNETs_OS_TaskDelete();
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          TELNETs_RxSessionData()
+*
+* Description : Receive data from telnet session.
+*
+* Argument(s) : psession        Pointer to session structure.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE            No error.
+*
+*                                                                       ----- RETURNED BY TELNETs_Rx() : -----
+*                               TELNETs_ERR_NONE            No error.
+*                               TELNETs_ERR_SOCK            Socket error.
+*                               TELNETs_ERR_CONN_CLOSED     Connection to client closed.
+*                               TELNETs_ERR_RX_TIMEOUT      No data received before inactivity timeout
+*                                                           expired.
+*                               TELNETs_ERR_RX              Other receive error.
+*
+* Return(s)   : DEF_OK          Reception successful.
+*               DEF_FAIL        Reception failed.
+*
+* Caller(s)   : TELNETs_SessionTask(),
+*               TELNETs_NVTLogin().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  TELNETs_RxSessionData (TELNETs_SESSION  *psession,
+                                            CPU_BOOLEAN       echo_en,
+                                            TELNETs_ERR      *perr)
+{
+#if  (TELNETs_CFG_ECHO_EN == DEF_ENABLED)
+    TELNETs_ERR  err;
+#endif
+    CPU_INT32S   rx_data_len;
+
+
+                                                                /* ---------------------- RX DATA --------------------- */
+    rx_data_len = TELNETs_Rx(psession->sock_id,
+                             psession->rx_buf + psession->rx_buf_len,
+                             TELNETs_CFG_RX_BUF_LEN - psession->rx_buf_len,
+                             perr);
+
+    if (*perr != TELNETs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+#if  (TELNETs_CFG_ECHO_EN == DEF_ENABLED)
+    if (echo_en == DEF_YES) {
+        TELNETs_Tx(psession->sock_id, psession->rx_buf + psession->rx_buf_len, rx_data_len, &err);
+    }
+#else
+    (void)&echo_en;
+#endif
+
+    psession->rx_buf_len += rx_data_len;                        /* Inc rx buf len.                                      */
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            TELNETs_RxOptHandler()
+*
+* Description : Receive option request or reply :
+*
+*               (a) Get current option status, if any
+*               (b) If option supported, determine if it is a reply
+*               (c) Process option
+*
+*
+* Argument(s) : psession        Pointer to session structure.
+*               opt_cmd_rx      Option status command received.
+*               opt_code_rx     Option code           received.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE                           No error.
+*                               TELNETs_ERR_OPT_STATUS_UNKNOWN             Unknown option status.
+*
+*                                                                       -------- RETURNED BY TELNETs_TxCmd(): --------
+*                               TELNETs_ERR_TX                             Error transmitting.
+*
+*                                                                       ------ RETURNED BY TELNETs_TxOptRep() : ------
+*                               TELNETs_ERR_NONE_OPT_STATUS_NOT_CHANGED    Request not asking for status change.
+*                               TELNETs_ERR_OPT_STATUS_UNKNOWN             Unknown option status.
+*                               TELNETs_ERR_TX                             Error transmitting.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_NVTPrint().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  TELNETs_RxOptHandler (TELNETs_SESSION         *psession,
+                                    TELNETs_OPT_STATUS_CMD   opt_cmd_rx,
+                                    CPU_INT08U               opt_code_rx,
+                                    TELNETs_ERR             *perr)
+{
+    TELNETs_OPT             *popt_cur;
+    TELNETs_OPT_STATUS_CMD   int_opt_status;
+    CPU_BOOLEAN              is_opt_rep;
+    TELNETs_OPT_STATUS_CMD  *pstatus;
+    CPU_BOOLEAN             *pstatus_req_tx;
+
+
+   *perr       = TELNETs_ERR_NONE;
+    is_opt_rep = DEF_NO;
+
+
+                                                                /* ---------------- GET CUR OPT STATUS ---------------- */
+    popt_cur = TELNETs_GetOpt(psession, opt_code_rx);
+
+
+                                                                /* ------------- DETERMINE IF OPT IS A REP ------------ */
+    if (popt_cur != (TELNETs_OPT *)0) {
+        switch (opt_cmd_rx) {
+            case TELNETs_OPT_STATUS_CMD_WILL:                               /* Client-side (peer host) opt.                         */
+            case TELNETs_OPT_STATUS_CMD_WONT:
+                 if (popt_cur->client_status_req_tx == DEF_YES) {
+                     is_opt_rep     =  DEF_YES;
+                     pstatus        = &popt_cur->client_status;
+                     pstatus_req_tx = &popt_cur->client_status_req_tx;
+
+                     int_opt_status = opt_cmd_rx == TELNETs_OPT_STATUS_CMD_WILL ? TELNETs_OPT_STATUS_CMD_DO :
+                                                                                  TELNETs_OPT_STATUS_CMD_DONT;
+                 }
+                 break;
+
+            case TELNETs_OPT_STATUS_CMD_DO:                                 /* Server-side (this host) opt.                         */
+            case TELNETs_OPT_STATUS_CMD_DONT:
+                 if (popt_cur->server_status_req_tx == DEF_YES) {
+                     is_opt_rep     =  DEF_YES;
+                     pstatus        = &popt_cur->server_status;
+                     pstatus_req_tx = &popt_cur->server_status_req_tx;
+
+                     int_opt_status = opt_cmd_rx == TELNETs_OPT_STATUS_CMD_DO ? TELNETs_OPT_STATUS_CMD_WILL :
+                                                                                TELNETs_OPT_STATUS_CMD_WONT;
+                 }
+                 break;
+
+            default:
+                *perr = TELNETs_ERR_OPT_STATUS_UNKNOWN;
+                 break;
+            }
+    }
+
+    if (*perr != TELNETs_ERR_NONE) {                            /* Rtn if opt status unknown.                           */
+        return;
+    }
+
+
+                                                                /* -------------------- PROCESS OPT ------------------- */
+    if (is_opt_rep == DEF_YES) {                                /* If opt is a rep ...                                  */
+        if (*pstatus == int_opt_status) {                       /* If current status identical to rx'd one ...          */
+            TELNETs_TxCmd(psession->sock_id,                    /* ... req refused, tx ack.                             */
+                          int_opt_status,
+                          opt_code_rx,
+                          perr);
+        } else {                                                /* Else ...                                             */
+           *pstatus = int_opt_status;                           /* ... req accepted.                                    */
+        }
+
+       *pstatus_req_tx = DEF_NO;                                /* Req serviced, unset flag.                            */
+
+    } else {                                                    /* Else ...                                             */
+        TELNETs_TxOptRep(psession,                              /* ... opt is a req, tx rep.                            */
+                         opt_cmd_rx,
+                         opt_code_rx,
+                         popt_cur,
+                         perr);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                               TELNETs_Rx()
+*
+* Description : (1) Receive data from socket :
+*
+*                   (a) Configure receive timeout value
+*                   (b) Receive data
+*
+*
+* Argument(s) : sock_id         Session socket id.
+*               pdata_buf       Pointer to data buffer that will receive client data.
+*               data_buf_len    Size of the data buffer (in octets).
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE            No error.
+*                               TELNETs_ERR_SOCK            Socket error.
+*                               TELNETs_ERR_CONN_CLOSED     Connection to client closed.
+*                               TELNETs_ERR_RX_TIMEOUT      No data received before inactivity timeout
+*                                                           expired.
+*                               TELNETs_ERR_RX              Other receive error.
+*
+* Return(s)   : Number of positive data octets received, if NO errors.
+*
+*               NET_SOCK_BSD_RTN_CODE_CONN_CLOSED (0),   if socket connection closed.
+*
+*               NET_SOCK_BSD_ERR_RX (-1),                otherwise.
+*
+* Caller(s)   : TELNETs_RxSessionData().
+*
+* Note(s)     : (2) The receive timeout value is configured using the TELNETs_CFG_INACTIVITY_TIMEOUT_S
+*                   configuration variable.
+*
+*               (3) At this point, the function will return when either:
+*
+*                   (a) data is received from the client
+*                   (b) the connection is closed.
+*                   (c) the receive timeout expired
+*********************************************************************************************************
+*/
+
+static  CPU_INT32S  TELNETs_Rx (NET_SOCK_ID   sock_id,
+                                CPU_CHAR     *pdata_buf,
+                                CPU_INT16U    data_buf_len,
+                                TELNETs_ERR  *perr)
+{
+    CPU_INT32S  rx_data_len;
+    NET_ERR     err;
+
+
+                                                                /* ------------------ SET RX TIMEOUT ------------------ */
+                                                                /* See Note #2.                                         */
+    NetSock_CfgTimeoutRxQ_Set((NET_SOCK_ID) sock_id,
+                              (CPU_INT32U ) TELNETs_CFG_INACTIVITY_TIMEOUT_S * DEF_TIME_NBR_mS_PER_SEC,
+                              (NET_ERR   *)&err);
+
+    if (err != NET_SOCK_ERR_NONE) {
+       *perr = TELNETs_ERR_SOCK;
+        return (NET_SOCK_BSD_ERR_RX);
+    }
+
+
+                                                                /* ---------------------- RX DATA --------------------- */
+                                                                /* See Note #3.                                         */
+    rx_data_len = NetSock_RxData((NET_SOCK_ID) sock_id,
+                                 (void      *) pdata_buf,
+                                 (CPU_INT16S ) data_buf_len,
+                                 (CPU_INT16S ) NET_SOCK_FLAG_NONE,
+                                 (NET_ERR   *)&err);
+
+    if (rx_data_len > 0) {                                      /* Data rx'd.                                           */
+       *perr = TELNETs_ERR_NONE;
+
+    } else if (rx_data_len == NET_SOCK_BSD_RTN_CODE_CONN_CLOSED) {
+       *perr = TELNETs_ERR_CONN_CLOSED;                         /* Conn has been closed.                                */
+
+    } else {                                                    /* Nothing rx'd ...                                     */
+        if (err == NET_SOCK_ERR_RX_Q_EMPTY) {                   /* ... and rx Q empty.                                  */
+           *perr = TELNETs_ERR_RX_TIMEOUT;
+        } else {                                                /* ... and other rx error.                              */
+           *perr = TELNETs_ERR_RX;
+        }
+    }
+
+    return (rx_data_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TELNETs_TxOptReq()
+*
+* Description : (1) Transmit option request.
+*
+*                   (a) Get current option status structure
+*                   (b) Get current option status
+*                   (c) Validate request
+*                   (d) Transmit request
+*
+*
+* Argument(s) : psession        Pointer to session structure.
+*               opt_status      Option status command for the request.
+*               opt_code        Option code           for the request.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE                         No error.
+*                               TELNETs_ERR_NONE_OPT_STATUS_NOT_CHANGED  Request not asking for status change.
+*                               TELNETs_ERR_OPT_NOT_SUPPORTED            Unsupported option.
+*                               TELNETs_ERR_OPT_STATUS_UNKNOWN           Unknown     option status.
+*
+*                                                                       ----- RETURNED BY TELNETs_Tx() : -----
+*                               TELNETs_ERR_TX                           Error transmitting.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_NVTInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  TELNETs_TxOptReq (TELNETs_SESSION         *psession,
+                                TELNETs_OPT_STATUS_CMD   opt_status,
+                                CPU_INT08U               opt_code,
+                                TELNETs_ERR             *perr)
+{
+    TELNETs_OPT             *popt_cur;
+    TELNETs_OPT_STATUS_CMD  *pstatus;
+    CPU_BOOLEAN             *preq_tx;
+
+
+   *perr = TELNETs_ERR_NONE;
+
+                                                                /* ------------ GET CUR OPT STATUS STRUCT ------------- */
+    popt_cur = TELNETs_GetOpt(psession, opt_code);
+
+    if (popt_cur == (TELNETs_OPT *)0) {                         /* Rtn if opt not supported.                            */
+       *perr = TELNETs_ERR_OPT_NOT_SUPPORTED;
+        return;
+    }
+
+
+                                                                /* ---------------- GET CUR OPT STATUS ---------------- */
+    switch (opt_status) {
+            case TELNETs_OPT_STATUS_CMD_DO:                     /* Client-side (peer host) opt.                         */
+            case TELNETs_OPT_STATUS_CMD_DONT:
+                 pstatus = &popt_cur->client_status;
+                 preq_tx = &popt_cur->client_status_req_tx;
+                 break;
+
+            case TELNETs_OPT_STATUS_CMD_WILL:                   /* Server-side (this host) opt.                         */
+            case TELNETs_OPT_STATUS_CMD_WONT:
+                 pstatus = &popt_cur->server_status;
+                 preq_tx = &popt_cur->server_status_req_tx;
+                 break;
+
+            default:
+                *perr = TELNETs_ERR_OPT_STATUS_UNKNOWN;
+                 break;
+    }
+
+    if (*perr != TELNETs_ERR_NONE) {                            /* Rtn if opt status unknown.                           */
+        return;
+    }
+
+
+                                                                /* ------------------- VALIDATE REQ ------------------- */
+    if (opt_status == *pstatus) {                               /* If req'd opt status already set ...                  */
+       *perr = TELNETs_ERR_NONE_OPT_STATUS_NOT_CHANGED;         /* ... no not tx req and rtn.                           */
+        return;
+    }
+
+
+                                                                /* ---------------------- TX REQ ---------------------- */
+    TELNETs_TxCmd(psession->sock_id,
+                  opt_status,
+                  opt_code,
+                  perr);
+
+    if (*perr == TELNETs_ERR_NONE) {
+       *preq_tx = DEF_YES;                                      /* Set req_tx flag so reply are identified.             */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                             TELNETs_TxOptRep()
+*
+* Description : (1) Transmit option reply and set current option accordingly :
+*
+*                   (a) Validate    option request and set reply
+*                   (b) Transmit    option reply
+*                   (c) Set current option status
+*
+*
+* Argument(s) : psession        Pointer to session structure.
+*               opt_status_req  Option reply status command.
+*               opt_code        Option reply code.
+*               popt_cur        Pointer to current option status.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE                           No error.
+*                               TELNETs_ERR_NONE_OPT_STATUS_NOT_CHANGED    Request not asking for status change.
+*                               TELNETs_ERR_OPT_STATUS_UNKNOWN             Unknown option status.
+*
+*                                                                       -------- RETURNED BY TELNETs_TxCmd(): --------
+*                               TELNETs_ERR_TX                             Error transmitting.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_RxOptHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  TELNETs_TxOptRep (TELNETs_SESSION         *psession,
+                                TELNETs_OPT_STATUS_CMD   opt_status_req,
+                                CPU_INT08U               opt_code,
+                                TELNETs_OPT             *popt_cur,
+                                TELNETs_ERR             *perr)
+{
+    TELNETs_OPT_STATUS_CMD   opt_status;
+    TELNETs_OPT_STATUS_CMD  *popt_status;
+    CPU_INT08U               opt_code_rep;
+    CPU_INT08U               opt_status_rep;
+
+
+    opt_code_rep = opt_code;
+    opt_status   = TELNETs_OPT_STATUS_CMD_DONT;
+    popt_status  = (void *)0;
+   *perr         = TELNETs_ERR_NONE;
+
+                                                                /* ------------- VALIDATE OPT REQ & SET REP ----------- */
+    if (popt_cur != (TELNETs_OPT *)0) {                         /* If popt_cur not NULL ...                             */
+        switch (opt_status_req) {                               /* ... opt is supported, treat it.                      */
+            case TELNETs_OPT_STATUS_CMD_WILL:                   /* Client-side (peer host) opt.                         */
+            case TELNETs_OPT_STATUS_CMD_WONT:
+                 opt_status = opt_status_req == TELNETs_OPT_STATUS_CMD_WILL ? TELNETs_OPT_STATUS_CMD_DO:
+                                                                              TELNETs_OPT_STATUS_CMD_DONT;
+                 if (opt_status != popt_cur->client_status) {
+                     popt_status    = &popt_cur->client_status;
+                     opt_status_rep =  opt_status;
+                 } else {
+                    *perr = TELNETs_ERR_NONE_OPT_STATUS_NOT_CHANGED;
+                 }
+                 break;
+
+            case TELNETs_OPT_STATUS_CMD_DO:                     /* Server-side (this host) opt.                         */
+            case TELNETs_OPT_STATUS_CMD_DONT:
+                 opt_status = opt_status_req == TELNETs_OPT_STATUS_CMD_DO ? TELNETs_OPT_STATUS_CMD_WILL :
+                                                                            TELNETs_OPT_STATUS_CMD_WONT;
+                 if (opt_status != popt_cur->server_status) {
+                     popt_status    = &popt_cur->server_status;
+                     opt_status_rep =  opt_status;
+                 } else {
+                    *perr = TELNETs_ERR_NONE_OPT_STATUS_NOT_CHANGED;
+                 }
+                 break;
+
+            default:
+                *perr = TELNETs_ERR_OPT_STATUS_UNKNOWN;
+                 break;
+        }
+
+    } else {                                                    /* Else ...                                             */
+        switch (opt_status_req) {                               /* ... opt is NOT supported, refuse it.                 */
+            case TELNETs_OPT_STATUS_CMD_WILL:
+                 opt_status_rep = TELNETs_OPT_STATUS_CMD_DONT;
+                 break;
+
+            case TELNETs_OPT_STATUS_CMD_DO:
+                 opt_status_rep = TELNETs_OPT_STATUS_CMD_WONT;
+                 break;
+
+            default:
+                *perr = TELNETs_ERR_OPT_STATUS_UNKNOWN;
+                 break;
+        }
+    }
+
+
+    if (*perr != TELNETs_ERR_NONE) {
+        return;
+    }
+
+                                                                /* -------------------- TX OPT REP -------------------- */
+    TELNETs_TxCmd(psession->sock_id,
+                  opt_status_rep,
+                  opt_code_rep,
+                  perr);
+
+                                                                /* ---------------- SET CUR OPT STATUS ---------------- */
+    if (*perr == TELNETs_ERR_NONE) {
+        if (popt_status != (void *)0) {                         /* If  ptr not NULL ...                                 */
+           *popt_status = opt_status;                           /* ... set the ptr value.                               */
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                             TELNETs_TxGA()
+*
+* Description : Transmit Go Ahead, if SUPPRESS_GA not enabled.
+*
+* Argument(s) : psession        Pointer to session structure.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE            No error.
+*
+*                                                                       --------- RETURNED BY TELNETs_TxCmd() : ---------
+*                               TELNETs_ERR_TX              Error transmitting.
+*
+* Return(s)   : DEF_YES, Go Ahead transmitted (or attempted).
+*               DEF_NO,  otherwise.
+*
+* Caller(s)   : TELNETs_SessionTask().
+*
+* Note(s)     : (1) Returning 'DEF_YES' does not guarantee that a Go Ahead has been transmitted.  Check
+*                   the variable receiving the return error code to make sure the transmission was
+*                   completed.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN   TELNETs_TxGA (TELNETs_SESSION  *psession,
+                                    TELNETs_ERR      *perr)
+{
+    TELNETs_OPT      *popt;
+
+
+    popt = TELNETs_GetOpt(psession, TELNET_OPT_SUPPRESS_GA);
+
+    if (popt != (TELNETs_OPT *)0) {
+        if (popt->server_status == TELNETs_OPT_STATUS_CMD_WILL) {
+           *perr = TELNETs_ERR_NONE;
+            return (DEF_NO);
+        }
+    }
+
+
+    TELNETs_TxCmd(psession->sock_id,
+                  TELNETs_OPT_STATUS_CMD_GA,
+                  TELNET_NO_OPT,
+                  perr);
+
+    return (DEF_YES);                                           /* See Note #1.                                         */
+}
+
+
+/*
+*********************************************************************************************************
+*                                              TELNETs_TxCmd()
+*
+* Description : Transmit command
+*
+* Argument(s) : sock_id         Session socket id.
+*               cmd_code        Command         code.
+*               opt_code        Optional option code.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                                                                       --------- RETURNED BY TELNETs_Tx() : ---------
+*                               TELNETs_ERR_NONE            No error.
+*                               TELNETs_ERR_TX              Error transmitting.
+*
+* Return(s)   : DEF_OK          Transmission successful.
+*               DEF_FAIL        Transmission failed.
+*
+* Caller(s)   : TELNETs_SessionTask(),
+*               TELNETs_RxOptHandler(),
+*               TELNETs_TxOptRep(),
+*               TELNETs_TxOptReq().
+*
+* Note(s)     : (1) If a stand-alone command is to be sent (by opposition to an option command), the
+*                   opt_code parameter SHOULD be passed TELNET_NO_OPT.  Indeed, when the cmd_code is not
+*                   one of these:
+*
+*                       (a) TELNET_CMD_WILL
+*                       (b) TELNET_CMD_WONT
+*                       (c) TELNET_CMD_DO
+*                       (d) TELNET_CMD_DONT
+*
+*                   the opt_code parameter is not taken into account.
+*
+*               (2) No command validation is performed by this function.  It is the caller's
+*                   responsibility to make sure the specified command transmitted is valid and is
+*                   supported.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  TELNETs_TxCmd (NET_SOCK_ID   sock_id,
+                                    CPU_INT08U    cmd_code,
+                                    CPU_INT08U    opt_code,
+                                    TELNETs_ERR  *perr)
+{
+    CPU_CHAR     opt_tx_buf[TELNETs_CMD_MAX_BUF_LEN];
+    CPU_INT16U   len;
+
+                                                                /* Set IAC and cmd code.                                */
+    opt_tx_buf[TELNETs_CMD_IAC_OFFSET] = TELNETs_OPT_STATUS_CMD_IAC;
+    opt_tx_buf[TELNETs_CMD_CMD_OFFSET] = cmd_code;
+
+
+    switch(cmd_code) {
+        case TELNETs_OPT_STATUS_CMD_WILL:
+        case TELNETs_OPT_STATUS_CMD_WONT:
+        case TELNETs_OPT_STATUS_CMD_DO:
+        case TELNETs_OPT_STATUS_CMD_DONT:
+             opt_tx_buf[TELNETs_CMD_OPT_OFFSET] = opt_code;     /* Set opt code.                                        */
+             len = TELNETs_CMD_BUF_LEN_WITH_OPT;
+             break;
+
+        default:
+             len = TELNETs_CMD_BUF_LEN_NO_OPT;                  /* No opt code.                                         */
+             break;
+    }
+
+
+    TELNETs_Tx(sock_id,
+               opt_tx_buf,
+               len,
+               perr);
+    if (*perr != TELNETs_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             TELNETs_Tx()
+*
+* Description : Transmit data to socket, handling transient errors and incomplete buffer transmit.
+*
+* Argument(s) : sock_id         Session socket id.
+*               pdata_buf       Pointer to data buffer to send.
+*               data_buf_len    Length of  data buffer to send.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE            No error.
+*                               TELNETs_ERR_TX              Error transmitting.
+*
+* Return(s)   : DEF_OK          Transmission successful.
+*               DEF_FAIL        Transmission failed.
+*
+* Caller(s)   : TELNETs_ServerTask(),
+*               TELNETs_TxCmd(),
+*               TELNETs_NVTInit(),
+*               TELNETs_NVTLogin(),
+*               TELNETs_NVTPrint(),
+*               TELNETs_NVTTxPrompt(),
+*               TELNETs_OutFnct().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  TELNETs_Tx (NET_SOCK_ID   sock_id,
+                                 CPU_CHAR     *pdata_buf,
+                                 CPU_INT16U    data_buf_len,
+                                 TELNETs_ERR  *perr)
+{
+    void         *tx_buf;
+    CPU_INT16S    tx_buf_len;
+    CPU_INT16S    tx_len;
+    CPU_INT16S    tx_len_tot;
+    CPU_INT08U    tx_retry_cnt;
+    CPU_BOOLEAN   tx_done;
+    CPU_BOOLEAN   tx_dly;
+    NET_ERR       err_net;
+
+
+    tx_len_tot   = 0;
+    tx_retry_cnt = 0;
+    tx_done      = DEF_NO;
+    tx_dly       = DEF_NO;
+
+    while ((tx_len_tot   <  data_buf_len)           &&          /* While tx tot len < data buf len ...                  */
+           (tx_retry_cnt <  TELNETs_CFG_MAX_TX_TRIES) &&        /* ... & tx try     < MAX     ...                       */
+           (tx_done      == DEF_NO)) {                          /* ... & tx NOT done;         ...                       */
+
+        if (tx_dly == DEF_YES) {                                /* Dly tx, if req'd.                                    */
+            TELNETs_OS_TimeDly(0, 0, 0, 10);
+        }
+
+        tx_buf     = pdata_buf    + tx_len_tot;
+        tx_buf_len = data_buf_len - tx_len_tot;
+        tx_len     = NetSock_TxData( sock_id,                   /* ... tx data.                                         */
+                                     tx_buf,
+                                     tx_buf_len,
+                                     NET_SOCK_FLAG_NONE,
+                                    &err_net);
+        switch (err_net) {
+            case NET_SOCK_ERR_NONE:
+                 if (tx_len > 0) {                              /* If          tx len > 0, ...                          */
+                     tx_len_tot += tx_len;                      /* ... inc tot tx len.                                  */
+                     tx_dly      = DEF_NO;
+                 } else {                                       /* Else dly next tx.                                    */
+                     tx_dly      = DEF_YES;
+                 }
+                 tx_retry_cnt = 0;
+                 break;
+
+            case NET_SOCK_ERR_NOT_USED:
+            case NET_SOCK_ERR_INVALID_TYPE:
+            case NET_SOCK_ERR_INVALID_FAMILY:
+            case NET_SOCK_ERR_INVALID_STATE:
+                 tx_done = DEF_YES;
+                 break;
+
+            case NET_ERR_TX:                                    /* If transitory tx err, ...                            */
+            default:
+                 tx_dly = DEF_YES;                              /* ... dly next tx.                                     */
+                 tx_retry_cnt++;
+                 break;
+        }
+    }
+
+    if (err_net != NET_SOCK_ERR_NONE) {
+       *perr = TELNETs_ERR_TX;
+        return (DEF_FAIL);
+    }
+
+   *perr = TELNETs_ERR_NONE;
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TELNETs_NVTInit()
+*
+* Description : (1) Initialize Network Virtual Terminal (NVT) :
+*
+*                   (a) Initialize session structure
+*                   (b) Send system message
+*                   (c) Set mode
+*                   (d) Proceed with login
+*
+*
+* Argument(s) : psession        Pointer to session structure.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE            No error.
+*
+*                                                                       ---- RETURNED BY TELNETs_Tx() : ---
+*                               TELNETs_ERR_TX              Error transmitting.
+*
+* Return(s)   : DEF_OK          Initialization successful.
+*               DEF_FAIL        Initialization failed.
+*
+* Caller(s)   : TELNETs_SessionTask().
+*
+* Note(s)     : (1) The server tries to operate in the character at a time mode, meaning that each
+*                   character is separately transmitted and echoed by it.  For this purpose, both the
+*                   echo and the suppress go ahead options are to be enabled by the server.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  TELNETs_NVTInit (TELNETs_SESSION  *psession,
+                                      TELNETs_ERR      *perr)
+{
+    CPU_BOOLEAN  rtn_val;
+    CPU_SIZE_T   sys_msg_str_len;
+    CPU_INT16U   i;
+
+
+                                                                /* ---------------- INIT SESSION STRUCT --------------- */
+    psession->rx_buf_len       =  0;
+    psession->nvt_buf_len      =  0;
+    psession->nvt_state        =  TELNETs_NVT_STATE_GRAPHIC;
+
+
+    for (i = 0; i < TELNET_NBR_OPT_SUPPORTED; i++) {            /* Set opt.                                             */
+        psession->opt[i].code                 = TELNETs_SupportedOptTbl[i];
+        psession->opt[i].server_status        = TELNETs_OPT_STATUS_CMD_WONT;
+        psession->opt[i].client_status        = TELNETs_OPT_STATUS_CMD_DONT;
+        psession->opt[i].server_status_req_tx = DEF_NO;
+        psession->opt[i].client_status_req_tx = DEF_NO;
+    }
+
+
+                                                                /* --------------------- TX SYS MSG ------------------- */
+    sys_msg_str_len = Str_Len((CPU_CHAR *)TELNETs_SYS_MSG_STR);
+
+    rtn_val = TELNETs_Tx((NET_SOCK_ID  )psession->sock_id,
+                         (CPU_CHAR    *)TELNETs_SYS_MSG_STR,
+                         (CPU_INT16U   )sys_msg_str_len,
+                         (TELNETs_ERR *)perr);
+    if (rtn_val == DEF_FAIL) {
+       return (DEF_FAIL);
+    }
+
+                                                                /* --------------------- SET MODE --------------------- */
+                                                                /* See Note #1.                                         */
+    TELNETs_TxOptReq(psession, TELNETs_OPT_STATUS_CMD_WILL, TELNET_OPT_ECHO, perr);
+
+
+
+                                                                /* ----------------------- LOGIN ---------------------- */
+    rtn_val = TELNETs_NVTLogin(psession, perr);
+    if (rtn_val == DEF_FAIL) {                                  /* If error ...                                         */
+        return (DEF_FAIL);                                      /* ... let error message go through.                    */
+    }
+
+
+   *perr = TELNETs_ERR_NONE;
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TELNETs_NVTLogin()
+*
+* Description : (1) Process with user login on the system :
+*
+*                   (a) Request username
+*                   (b) Request password
+*                   (c) Validate credential
+*
+*
+* Argument(s) : psession        Pointer to session structure.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE            No error.
+*
+*                                                                       ---- RETURNED BY TELNETs_Tx() : ---
+*                               TELNETs_ERR_TX              Error transmitting.
+*
+*
+* Return(s)   : DEF_OK          Login successful.
+*               DEF_FAIL        Login failed.
+*
+* Caller(s)   : TELNETs_NVTInit().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  TELNETs_NVTLogin (TELNETs_SESSION  *psession,
+                                       TELNETs_ERR      *perr)
+{
+    CPU_BOOLEAN  rtn_val;
+    CPU_SIZE_T   tx_str_len;
+    CPU_CHAR     username[TELNETs_CFG_MAX_USR_NAME_LEN];
+    CPU_CHAR     password[TELNETs_CFG_MAX_PW_LEN];
+    CPU_BOOLEAN  logged;
+    CPU_INT08U   login_retry_cnt;
+
+
+    logged          = DEF_FAIL;
+    login_retry_cnt = 0;
+
+    while ((logged          == DEF_FAIL)                    &&  /* While not logged in ...                              */
+           (login_retry_cnt <  TELNETs_CFG_MAX_LOGIN_TRIES)) {  /* ... & login tries < MAX.                             */
+
+                                                                /* ------------------- REQ USERNAME ------------------- */
+        tx_str_len = Str_Len((CPU_CHAR *)TELNETs_LOGIN_STR);
+
+        rtn_val = TELNETs_Tx((NET_SOCK_ID  )psession->sock_id,  /* Tx login msg.                                        */
+                             (CPU_CHAR    *)TELNETs_LOGIN_STR,
+                             (CPU_INT16U   )tx_str_len,
+                             (TELNETs_ERR *)perr);
+        if (rtn_val == DEF_FAIL) {
+            return (DEF_FAIL);
+        }
+
+        do {
+                                                                /* Rx login name.                                       */
+            rtn_val = TELNETs_RxSessionData(psession, DEF_YES, perr);
+            if (*perr != TELNETs_ERR_NONE) {
+                return (DEF_FAIL);
+            }
+
+            TELNETs_NVTPrint(psession, DEF_YES, perr);
+        } while (*perr != TELNETs_ERR_NONE_EOL_RX);
+
+                                                                /* Get login from psession struct.                      */
+        TELNETs_NVTGetBuf(psession, username, TELNETs_CFG_MAX_USR_NAME_LEN, DEF_YES, perr);
+        if (*perr != TELNETs_ERR_NONE) {
+            return (DEF_FAIL);
+        }
+
+
+                                                                /* ---------------------- REQ PW ---------------------- */
+        tx_str_len = Str_Len((CPU_CHAR *)TELNETs_PW_STR);
+
+        rtn_val = TELNETs_Tx((NET_SOCK_ID  )psession->sock_id,  /* Tx pw msg.                                           */
+                             (CPU_CHAR    *)TELNETs_PW_STR,
+                             (CPU_INT16U   )tx_str_len,
+                             (TELNETs_ERR *)perr);
+        if (rtn_val == DEF_FAIL) {
+            return (DEF_FAIL);
+        }
+
+
+        do {
+                                                                /* Rx pw.                                               */
+            rtn_val = TELNETs_RxSessionData(psession, DEF_NO, perr);
+            if (*perr != TELNETs_ERR_NONE) {
+                return (DEF_FAIL);
+            }
+
+            TELNETs_NVTPrint(psession, DEF_NO, perr);
+        } while (*perr != TELNETs_ERR_NONE_EOL_RX);
+
+        TELNETs_Tx((NET_SOCK_ID  )psession->sock_id,
+                   (CPU_CHAR    *)TELNETs_EOL_STR,
+                   (CPU_INT16U   )TELNETs_EOL_STR_LEN,
+                   (TELNETs_ERR *)perr);
+
+                                                                /* Get pw from psession struct.                         */
+        TELNETs_NVTGetBuf(psession, password, TELNETs_CFG_MAX_PW_LEN, DEF_YES, perr);
+        if (*perr != TELNETs_ERR_NONE) {
+            return (DEF_FAIL);
+        }
+
+
+                                                                /* --------------- VALIDATE CREDENTIALS --------------- */
+        logged = TELNETs_AuthUser(username, password);
+
+        if (logged == DEF_OK) {                                 /* If logged ...                                        */
+                                                                /* ... tx welcome msg ...                               */
+            tx_str_len = Str_Len((CPU_CHAR *)TELNETs_CFG_WELCOME_MSG_STR);
+
+            rtn_val = TELNETs_Tx((NET_SOCK_ID  )psession->sock_id,
+                                 (CPU_CHAR    *)TELNETs_CFG_WELCOME_MSG_STR,
+                                 (CPU_INT16U   )tx_str_len,
+                                 (TELNETs_ERR *)perr);
+            if (rtn_val == DEF_FAIL) {
+                return (DEF_FAIL);
+            }
+
+            TELNETs_NVTTxPrompt(psession, perr);                /* ... and tx cmd prompt.                               */
+            if (*perr != TELNETs_ERR_NONE) {
+                return (DEF_FAIL);
+            }
+
+        } else {                                                /* Else dly and retry.                                  */
+            TELNETs_OS_TimeDly(0, 0, 0, TELNETs_FAILED_LOGIN_DLY_MS);
+            login_retry_cnt++;
+                                                                /* Tx login failure msg.                                */
+            tx_str_len = Str_Len((CPU_CHAR *)TELNETs_LOGIN_FAILURE_STR);
+
+            rtn_val = TELNETs_Tx((NET_SOCK_ID  )psession->sock_id,
+                                 (CPU_CHAR    *)TELNETs_LOGIN_FAILURE_STR,
+                                 (CPU_INT16U   )tx_str_len,
+                                 (TELNETs_ERR *)perr);
+            if (rtn_val == DEF_FAIL) {
+                return (DEF_FAIL);
+            }
+        }
+    }
+
+    return (logged);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TELNETs_NVTPrint()
+*
+* Description : Process received data from telnet session.
+*
+* Argument(s) : psession        Pointer to session structure.
+*               echo            Whether or not 'echo' are allowed (see Note #3).
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE            No error.
+*                               TELNETs_ERR_NONE_EOL_RX     No error, command ready to be executed.
+*
+* Return(s)   : void.
+*
+* Caller(s)   : TELNETs_SessionTask(),
+*               TELNETs_NVTLogin().
+*
+* Note(s)     : (2) The data received from the telnet session is parsed using a state machine consisting
+*                   of the following states:
+*
+*                   (a) TELNETs_NVT_STATE_GRAPHIC
+*
+*                       In this state, graphic ASCII are being sent to the printer and other meaningful
+*                       code have the machine be switched into another state.  This is the state the
+*                       machine enters by default.
+*
+*                       (1) If the NVT buffer is full while processing graphic codes, the last characters
+*                           are ignored until the EOL sequence is encounter.  That line is hence incomplete,
+*                           and its processing is most likely going to introduce an error.  It is the
+*                           developer's responsibility to ensure that TELNETs_CFG_NVT_BUF_LEN be defined with
+*                           a value large enough to provide room for the longest line transmitted.
+*
+*                   (b) TELNETs_NVT_STATE_CR
+*
+*                       State entered whenever a 'CR' character is encounter in the TELNETs_NVT_STATE_GRAPHIC
+*                       state.  From there, you should either have a 'LF' following next (end of line), or a
+*                       NUL meaning a 'CR' alone was intended.
+*
+*                       (1) However, some telnet client transmit 'CR NUL' at the end of a line.  Hence,
+*                           this implementation also accept this sequence as an EOL marker.  Note that
+*                           this 'CR NUL' is echoed to the client as 'CR LF'.
+*
+*                   (c) TELNETs_NVT_STATE_IAC
+*
+*                       State entered when an Interpret as Command character ('255') is found in the
+*                       TELNETs_NVT_STATE_GRAPHIC state.
+*
+*                   (d) TELNETs_NVT_STATE_OPTION
+*
+*                       The machine enters this state when an option verb follows the IAC command (DO,
+*                       DON'T, WILL, WON'T).  Appropriate action is then taken to either response to
+*                       a request or confirm a reply.
+*
+*                   (e) TELNETs_NVT_STATE_CODE
+*
+*                       When the character following the IAC is neither another IAC nor an option verb,
+*                       it is considered as being a defined telnet command, and this state deals with
+*                       their meaning.
+*
+*               (3)     Echoing of received data is performed only when the echo option (TELNET_OPT_ECHO)
+*                       is enabled, and when the function's 'echo' parameter is passed DEF_YES.
+*********************************************************************************************************
+*/
+
+static  void  TELNETs_NVTPrint (TELNETs_SESSION  *psession,
+                                CPU_BOOLEAN       echo,
+                                TELNETs_ERR      *perr)
+{
+    TELNETs_NVT_STATE   state;
+    CPU_INT32U          rd_ix;
+    CPU_INT32U          wr_ix;
+    CPU_INT08U          cur_char;
+    TELNETs_OPT        *popt_echo;
+    TELNETs_ERR         err_telnets;
+    CPU_CHAR           *p_cmd;
+    CPU_CHAR            bs_cmd[TELNETs_BS_CHAR_LEN + TELNETs_WS_CHAR_LEN];
+    CPU_BOOLEAN         bs_pressed;
+
+
+    state      = psession->nvt_state;
+    rd_ix      = 0;
+    wr_ix      = psession->nvt_buf_len;
+    bs_pressed = DEF_NO;
+   *perr       = TELNETs_ERR_NONE;
+
+    while ( rd_ix < psession->rx_buf_len    &&
+           *perr != TELNETs_ERR_NONE_EOL_RX) {
+
+        cur_char = psession->rx_buf[rd_ix];
+        switch (state) {
+            case TELNETs_NVT_STATE_GRAPHIC:                     /* See Note 2a.                                         */
+                                                                /* ------------------ USASCII GRAPHIC ----------------- */
+                 if (cur_char >= TELNET_ASCII_GRAPHIC_LOWER &&
+                         cur_char <= TELNET_ASCII_GRAPHIC_HIGHER) {
+                                                                /* See Note 2a1.                                */
+                     if (wr_ix < TELNETs_CFG_NVT_BUF_LEN) {     /* If NVT buf not full ...                      */
+                         psession->nvt_buf[wr_ix] = cur_char;   /* ... wr char.                                 */
+                         wr_ix++;
+                     }
+
+                 } else {
+                     switch (cur_char) {
+                                                                /* ------------------ REQUIRED CODES ------------------ */
+                         case ASCII_CHAR_CARRIAGE_RETURN:       /* Cur char is 'CR'.                                    */
+                              state = TELNETs_NVT_STATE_CR;
+                              break;
+
+                         case ASCII_CHAR_LINE_FEED:             /* Cur char is 'LF'.                                    */
+                              break;                            /* Do nothing.                                          */
+
+                         case ASCII_CHAR_NULL:                  /* Cur char is 'NULL'.                                  */
+                              break;                            /* Do nothing.                                          */
+
+                                                                /* --------------------- IAC CODE --------------------- */
+                         case TELNETs_OPT_STATUS_CMD_IAC:
+                             state = TELNETs_NVT_STATE_IAC;
+                             break;
+
+                         case ASCII_CHAR_BACKSPACE:             /*Moves the print head 1 char pos towards left margin.  */
+                             if (psession->nvt_buf_len > 0) {
+                                 bs_pressed = DEF_YES;
+                                 psession->nvt_buf_len--;
+                                 wr_ix--;
+                             }
+                             break;
+
+                                                                /* -------------------- OTHER CODE -------------------- */
+                         case ASCII_CHAR_BELL:                  /* Audible or visible signal without moving the  head.  */
+                         case ASCII_CHAR_CHARACTER_TABULATION:  /* Moves the printer to the next horizontal tab stop.   */
+                         case ASCII_CHAR_LINE_TABULATION:       /* Moves the printer to the next vertical   tab stop.   */
+                         case ASCII_CHAR_FORM_FEED:             /* Moves to top of the next page, keep horizontal.      */
+                             break;                             /* Do nothing.                                          */
+
+                         default:
+                             break;
+                     }
+                 }
+
+                 rd_ix++;
+                 break;
+
+            case TELNETs_NVT_STATE_CR:                          /* See Note 2b.                                         */
+                 switch(cur_char) {
+                     case ASCII_CHAR_LINE_FEED:
+                     case ASCII_CHAR_NULL:                      /* See Note 2b1.                                        */
+                          psession->nvt_buf[wr_ix++] = ASCII_CHAR_CARRIAGE_RETURN;
+                          psession->nvt_buf[wr_ix++] = ASCII_CHAR_LINE_FEED;
+                          psession->nvt_buf[wr_ix]   = (CPU_CHAR)0;
+
+                          TELNETs_TRACE_DBG(("Line: %s\n\r", psession->nvt_buf));
+                         *perr = TELNETs_ERR_NONE_EOL_RX;
+                          break;
+
+                     default:                                   /* Should never happen.                                 */
+                          break;
+                 }
+
+                 rd_ix++;
+                 state = TELNETs_NVT_STATE_GRAPHIC;
+                 break;
+
+            case TELNETs_NVT_STATE_IAC:                         /* See Note #2c.                                        */
+                 switch(cur_char) {
+                     case TELNETs_OPT_STATUS_CMD_WILL:
+                     case TELNETs_OPT_STATUS_CMD_WONT:
+                     case TELNETs_OPT_STATUS_CMD_DO:
+                     case TELNETs_OPT_STATUS_CMD_DONT:
+                          psession->rx_opt_status_cmd = cur_char;
+                          rd_ix++;
+                          state = TELNETs_NVT_STATE_OPTION;
+                          break;
+
+                     case TELNETs_OPT_STATUS_CMD_IAC:               /* Escape IAC, second should be displayed.          */
+                          if (wr_ix < TELNETs_CFG_NVT_BUF_LEN) {    /* If NVT buf not full ...                          */
+                                                                    /* ... wr char.                                     */
+                              psession->nvt_buf[wr_ix] = cur_char;
+                              wr_ix++;
+                          }
+
+                          rd_ix++;
+                          state = TELNETs_NVT_STATE_GRAPHIC;
+                          break;
+
+                     default:                                       /* Presume next char is a code.                     */
+                          state = TELNETs_NVT_STATE_CODE;
+                          break;
+                 }
+
+                 break;
+
+            case TELNETs_NVT_STATE_OPTION:                      /* See Note #2d.                                        */
+                 psession->rx_opt_code = cur_char;
+                 TELNETs_TRACE_DBG(("Option: %u; Command: %u\n\r",
+                                   (unsigned int)psession->rx_opt_code,
+                                   (unsigned int)psession->rx_opt_status_cmd));
+
+                 TELNETs_RxOptHandler(psession,
+                                      psession->rx_opt_status_cmd,
+                                      psession->rx_opt_code,
+                                     &err_telnets);
+
+                 rd_ix++;
+                 state = TELNETs_NVT_STATE_GRAPHIC;
+                 break;
+
+            case TELNETs_NVT_STATE_CODE:                        /* See Note 2e.                                         */
+                 switch (cur_char) {
+                     case TELNETs_OPT_STATUS_CMD_EC:            /* Erase char.                                          */
+                          if (psession->nvt_buf_len > 0) {
+                              psession->nvt_buf_len--;
+                              wr_ix--;
+                          }
+                          break;
+
+                     case TELNETs_OPT_STATUS_CMD_EL:            /* Erase line.                                          */
+                          if (psession->nvt_buf_len > 0) {
+                              psession->nvt_buf_len = 0;
+                              wr_ix                 = 0;
+                          }
+                          break;
+
+                     case TELNETs_OPT_STATUS_CMD_NOP:
+                     case TELNETs_OPT_STATUS_CMD_DM:
+                     case TELNETs_OPT_STATUS_CMD_BRK:
+                     case TELNETs_OPT_STATUS_CMD_IP:
+                     case TELNETs_OPT_STATUS_CMD_AO:
+                     case TELNETs_OPT_STATUS_CMD_AYT:
+                     case TELNETs_OPT_STATUS_CMD_GA:
+                     default:
+                          break;                                /* Unsupported / no opt cmd's, do nothing.              */
+                 }
+
+                 rd_ix++;
+                 state = TELNETs_NVT_STATE_GRAPHIC;
+                 break;
+
+            default:                                            /* Should never happen.                                 */
+                 break;
+        }
+    }
+
+
+                                                                /* ---------------------- TX ECHO --------------------- */
+    popt_echo = TELNETs_GetOpt(psession, TELNET_OPT_ECHO);      /* See Note #3.                                         */
+    if (popt_echo != (TELNETs_OPT *)0) {
+        if (popt_echo->server_status == TELNETs_OPT_STATUS_CMD_WILL  &&
+            echo                     == DEF_YES) {
+            if (wr_ix > psession->nvt_buf_len) {
+                TELNETs_Tx((NET_SOCK_ID  ) psession->sock_id,
+                           (CPU_CHAR    *)(psession->nvt_buf + psession->nvt_buf_len),
+                           (CPU_INT16U   ) wr_ix - psession->nvt_buf_len,
+                           (TELNETs_ERR *)&err_telnets);
+            }
+
+            if (bs_pressed == DEF_YES) {                        /* If backspace pressed,                     ...        */
+                p_cmd =  &bs_cmd[0];
+               (void)Str_Copy_N(p_cmd, (const CPU_CHAR *)TELNETs_BS_CHAR, TELNETs_BS_CHAR_LEN + TELNETs_WS_CHAR_LEN);
+               (void)Str_Cat_N( p_cmd, (const CPU_CHAR *)TELNETs_WS_CHAR, TELNETs_WS_CHAR_LEN);
+
+                TELNETs_Tx((NET_SOCK_ID  ) psession->sock_id,   /* ... replace previous char by a whitespace ...        */
+                           (CPU_CHAR    *) p_cmd,
+                           (CPU_INT16U   )(TELNETs_BS_CHAR_LEN + TELNETs_WS_CHAR_LEN),
+                           (TELNETs_ERR *)&err_telnets);
+
+                TELNETs_Tx((NET_SOCK_ID  ) psession->sock_id,   /* ... & place the cursor before the whitespace.        */
+                           (CPU_CHAR    *) TELNETs_BS_CHAR,
+                           (CPU_INT16U   ) TELNETs_BS_CHAR_LEN,
+                           (TELNETs_ERR *)&err_telnets);
+            }
+        }
+    }
+
+
+                                                                /* Copy remaining rx_buf at beginning.                  */
+    if (rd_ix < psession->rx_buf_len) {
+        Mem_Copy(psession->rx_buf, psession->rx_buf + rd_ix, psession->rx_buf_len - rd_ix);
+    }
+
+    psession->rx_buf_len  = psession->rx_buf_len - rd_ix;
+    psession->nvt_buf_len = wr_ix;
+    psession->nvt_state   = state;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TELNETs_NVTTxPrompt()
+*
+* Description : Print the command prompt on the NVT.
+*
+* Argument(s) : psession        Pointer to session structure.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                                                                       ----- RETURNED BY TELNETs_Tx() : -----
+*                               TELNETs_ERR_NONE            No error.
+*                               TELNETs_ERR_TX              Error transmitting.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_SessionTask(),
+*               TELNETs_NVTLogin().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  TELNETs_NVTTxPrompt (TELNETs_SESSION  *psession,
+                                   TELNETs_ERR      *perr)
+{
+    CPU_SIZE_T  prompt_len;
+
+
+    prompt_len = Str_Len((CPU_CHAR *)TELNETs_PROMPT_STR);
+
+    TELNETs_Tx((NET_SOCK_ID  )psession->sock_id,
+               (CPU_CHAR    *)TELNETs_PROMPT_STR,
+               (CPU_INT16U   )prompt_len,
+               (TELNETs_ERR *)perr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TELNETs_NVTGetBuf()
+*
+* Description : Copy NVT buf into parameter dest_buf, appending the final NULL character.
+*
+* Argument(s) : psession        Pointer to session structure.
+*               dest_buf        Pointer to destination buffer to receive NVT buffer copy.
+*               dest_buf_len    Length of  destination buffer.
+*               remove_eol      Whether or not to remove the EOL termination characters.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE            No error.
+*                               TELNETs_ERR_NULL_PTR        Pointer to destination buffer NULL.
+*                               TELNETs_ERR_LEN_ZERO        Destination buffer length of zero.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : TELNETs_NVTLogin().
+*
+* Note(s)     : (1) Buffer copy terminates when :
+*
+*                   (a) Destination buffer pointer is passed NULL pointers.
+*                       (1) No buffer copy performed.
+*
+*                   (b) Entire source copied into destination buffer.
+*                       (1) Termination NULL character appended to destination buffer.
+*********************************************************************************************************
+*/
+
+static  void  TELNETs_NVTGetBuf (TELNETs_SESSION  *psession,
+                                 CPU_CHAR         *dest_buf,
+                                 CPU_INT16U        dest_buf_len,
+                                 CPU_BOOLEAN       remove_eol,
+                                 TELNETs_ERR      *perr)
+{
+    CPU_CHAR  *peol;
+
+
+    if (dest_buf == (CPU_CHAR *)0) {                            /* Rtn if dest_buf ptr(s) NULL.                         */
+       *perr = TELNETs_ERR_NULL_PTR;
+        return;
+    }
+
+    if (dest_buf_len == 0) {                                    /* Rtn if dest_buf len equals zero.                     */
+       *perr = TELNETs_ERR_LEN_ZERO;
+        return;
+    }
+
+    if (psession->nvt_buf_len >= dest_buf_len) {                /* Rtn if dest_buf less than NVT len.                   */
+       *perr = TELNETs_ERR_BUF_TOO_SMALL;
+        return;
+    }
+
+
+    if (psession->nvt_buf_len == 0) {                           /* If NVT buf empty ...                                 */
+       *dest_buf = (CPU_CHAR)0;                                 /* ... copy termination char and rtn.                   */
+       *perr = TELNETs_ERR_NONE;
+        return;
+    }
+
+
+                                                                /* ------------------- COPY NVT BUF ------------------- */
+    Mem_Copy((void     *)dest_buf,
+             (void     *)psession->nvt_buf,
+             (CPU_SIZE_T)psession->nvt_buf_len);
+
+    dest_buf[psession->nvt_buf_len] = (CPU_CHAR)0;              /* Append termination NULL char.                        */
+
+
+                                                                /* -------------- REMOVING EOL DELIMITER -------------- */
+    if (remove_eol == DEF_YES) {
+        peol = Str_Str((CPU_CHAR *)dest_buf,
+                       (CPU_CHAR *)TELNETs_EOL_STR);
+        if (peol != (CPU_CHAR *)0) {
+            *peol = (CPU_CHAR)0;
+        }
+    }
+
+                                                                /* ------------------ UPDATE NVT BUF ------------------ */
+    psession->nvt_buf_len = 0;
+
+
+   *perr = TELNETs_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TELNETs_NVTTerminate()
+*
+* Description : Terminate Network Virtual Terminal (NVT)
+*
+* Argument(s) : psession        Pointer to session structure.
+*
+* Return(s)   : DEF_OK          Termination successful.
+*               DEF_FAIL        Termination failed.
+*
+* Caller(s)   : TELNETs_SessionTask().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static CPU_BOOLEAN  TELNETs_NVTTerminate (TELNETs_SESSION  *psession)
+{
+    psession->sock_id = (NET_SOCK_ID)NET_SOCK_ID_NONE;
+
+#if (TELNETs_CFG_FS_EN == DEF_ENABLED)
+    psession->pcur_working_dir = (void *)0;
+#endif
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              TELNETs_Cmd()
+*
+* Description : (1) Process the received command line :
+*
+*                   (a) Handle internal command
+*                   (b) Handle external command, if necessary
+*
+*
+* Arguments   : pcmd_line       Pointer to command line.
+*               psession        Pointer to telnet session structure.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                                                                       --------- RETURNED BY TELNETs_CmdHandlerInt() : ---------
+*                                                                       ------------ OR BY TELNETs_CmdHandlerExt() : ------------
+*                               TELNETs_ERR_NONE                No error.
+*                               TELNETs_ERR_CMD_PROCESS         Error processing command.
+*                               TELNETs_ERR_CMD_EXEC            Error executing  command.
+*
+* Return(s)   : TELNETs_CMDPROCESS_ERR,        if an error occurred.
+*
+*               Command specific return value, otherwise.
+*
+* Caller(s)   : TELNETs_SessionTask().
+*
+* Note(s)     : (1) The function first look for a match in the internal telnet command.  If co such
+*                   command if found, TELNETs_CmdHandlerInt() returns TELNETs_ERR_CMD_PROCESS, and
+*                   the external command handler comes in.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  TELNETs_Cmd (CPU_CHAR         *pcmd_line,
+                                 TELNETs_SESSION  *psession,
+                                 TELNETs_ERR      *perr)
+{
+    CPU_INT16S   ret_val;
+    NET_SOCK_ID  sock;
+
+
+   (void)&pcmd_line;                                            /* Prevent 'variable unused' compiler warning.          */
+
+    sock = psession->sock_id;
+
+                                                                /* ------------------ HANDLE INT CMD ------------------ */
+    ret_val = TELNETs_CmdHandlerInt((CPU_CHAR      *) psession->nvt_buf,
+                                    (void          *) psession->pcur_working_dir,
+                                    (CPU_BOOLEAN   *)&psession->session_active,
+                                    (void          *)&sock,
+                                    (TELNET_OUT_FNCT)&TELNETs_OutFnct,
+                                    (TELNETs_ERR   *) perr);
+
+                                                                /* ------------------ HANDLE EXT CMD ------------------ */
+    if (*perr == TELNETs_ERR_CMD_PROCESS) {                     /* See Note #1.                                         */
+    ret_val = TELNETs_CmdHandlerExt((CPU_CHAR      *) psession->nvt_buf,
+                                    (void          *) psession->pcur_working_dir,
+                                    (CPU_BOOLEAN   *)&psession->session_active,
+                                    (void          *)&sock,
+                                    (TELNET_OUT_FNCT)&TELNETs_OutFnct,
+                                    (TELNETs_ERR   *) perr);
+    }
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                              TELNETs_CmdHandlerInt()
+*
+* Description : Process received internal command.
+*
+* Arguments   : pcmd_line       Pointer to command line.
+*               pcwd            Pointer to current working directory.
+*               psession_active Pointer to variable indicating whether the session is active or not.
+*               pout_opt        Pointer to output function optional parameter.
+*               pout_fnct       Pointer to output function.
+*               perr            Pointer to variable that will receive the return error code from this
+*                               function :
+*
+*                               TELNETs_ERR_NONE                No error.
+*                               TELNETs_ERR_CMD_PROCESS         Error processing command (command NOT found).
+*                               TELNETs_ERR_CMD_EXEC            Error executing  command.
+*
+* Return(s)   : TELNETs_CMDPROCESS_ERR,        if an error occurred.
+*
+*               Command specific return value, otherwise.
+*
+* Caller(s)   : TELNETs_Cmd().
+*
+* Note(s)     : (1) This implementation only support the 'logout' internal command.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  TELNETs_CmdHandlerInt (CPU_CHAR         *pcmd_line,
+                                           void             *pcwd,
+                                           CPU_BOOLEAN      *psession_active,
+                                           void             *pout_opt,
+                                           TELNET_OUT_FNCT   pout_fnct,
+                                           TELNETs_ERR      *perr)
+{
+    CPU_INT16S  cmp;
+    CPU_INT16S  ret_val;
+
+
+   (void)&pcwd;                                                 /* Prevent 'variable unused' compiler warnings.         */
+   (void)&pout_opt;
+   (void)&pout_fnct;
+
+    cmp = Str_Cmp(TELNETs_INT_CMD_LOGOUT, pcmd_line);
+
+    if (cmp == 0) {                                             /* If cmd is 'logout' ...                               */
+       *psession_active = DEF_NO;                               /* ... terminate the session.                           */
+        ret_val = TELNETs_CMDPROCESS_ERR_NONE;
+       *perr    = TELNETs_ERR_NONE;
+
+    } else {                                                    /* Else ...                                             */
+        ret_val = TELNETs_CMDPROCESS_ERR;                       /* ... cmd not found.                                   */
+       *perr    = TELNETs_ERR_CMD_PROCESS;
+    }
+
+    return (ret_val);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            TELNETs_GetOpt()
+*
+* Description : Get the telnet option structure.
+*
+* Argument(s) : psession        Pointer to session structure.
+*               opt_code        Option code requested.
+*
+* Return(s)   : Pointer to a TELNETs_OPT    if successful;
+*               NULL                        if option not supported.
+*
+* Caller(s)   : TELNETs_RxOptHandler(),
+*               TELNETs_TxOptReq().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  TELNETs_OPT  *TELNETs_GetOpt (TELNETs_SESSION  *psession,
+                                      CPU_INT08U        opt_code)
+{
+    TELNETs_OPT  *popt;
+    CPU_INT16U    i;
+
+
+                                                                /* ---------------- GET CUR OPT STATUS ---------------- */
+    popt = (TELNETs_OPT *)0;
+    for (i = 0; i < TELNET_NBR_OPT_SUPPORTED; i++) {
+        if (opt_code == psession->opt[i].code) {
+            popt = &psession->opt[i];
+            break;
+        }
+    }
+
+    return (popt);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            TELNETs_OutFnct()
+*
+* Description : Output function used by command to transmit data to Telnet session.
+*
+* Argument(s) : pbuf            Pointer to buffer containing data to send.
+*               buf_len         Length of buffer.
+*               psock_id        Pointer to socket id.
+*
+* Return(s)   : Number of positive data octets transmitted, if NO errors.
+*               TELNETs_SHELL_ERR_TX,                       otherwise.
+*
+* Caller(s)   : Various commands.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16S  TELNETs_OutFnct (CPU_CHAR   *pbuf,
+                                     CPU_INT16U  buf_len,
+                                     void       *psock_id)
+{
+    NET_SOCK_ID  sock;
+    CPU_INT16S   ret_val;
+    TELNETs_ERR  err;
+
+
+    sock = *((NET_SOCK_ID *)psock_id);
+
+    TELNETs_Tx(sock, pbuf, buf_len, &err);
+    if (err != TELNETs_ERR_NONE) {
+        ret_val = TELNETs_SHELL_ERR_TX;
+    } else {
+        ret_val = buf_len;
+    }
+
+    return (ret_val);
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-TELNETs/Source/telnet-s.h b/src/ucos_v1_42/micrium_source/uC-TELNETs/Source/telnet-s.h
new file mode 100644
index 0000000..35b4f37
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-TELNETs/Source/telnet-s.h
@@ -0,0 +1,732 @@
+/*
+*********************************************************************************************************
+*                                             uC/TELNETs
+*                                           Telnet (server)
+*
+*                         (c) Copyright 2004-2017; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TELNETs is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                            TELNET SERVER
+*
+* Filename      : telnet-s.h
+* Version       : V1.05.02
+* Programmer(s) : SR
+*                 SL
+*                 AOP
+*********************************************************************************************************
+*
+*
+*
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This header file is protected from multiple pre-processor inclusion through use of the
+*               TELNETs present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  TELNETs_PRESENT                                        /* See Note #1.                                         */
+#define  TELNETs_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                       TELNETs VERSION NUMBER
+*
+* Note(s) : (1) (a) The TELNETs module software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes     major software version revision number
+*                                   yy              denotes     minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The TELNETs software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*/
+
+#define  TELNETs_VERSION                               10502u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef   TELNETs_MODULE
+#define  TELNETs_EXT
+#else
+#define  TELNETs_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*
+* Note(s) : (1) The TELNETs module files are located in the following directories :
+*
+*               (a) \\telnet-s_cfg.h
+*
+*               (b) (1) \\Source\net_*.*
+*
+*                   (2) If network security manager is to be used:
+*
+*                       (A) \\Secure\net_secure_mgr.*
+*
+*                       (B) \\Secure\\net_secure.*
+*
+*               (c) (1) \\Source\telnet-s.h
+*                                        \telnet-s.c
+*
+*                   (2) \\OS\\telnet-s_os.*
+*
+*                       where
+*                                     directory path for Your Product's Application
+*                                       directory path for network protocol suite
+*                                                      directory path for TELNETs module
+*                                                           directory name for specific operating system (OS)
+*
+*           (2) CPU-configuration software files are located in the following directories :
+*
+*               (a) \\cpu_*.*
+*               (b) \\\\cpu*.*
+*
+*                       where
+*                                       directory path for common CPU-compiler software
+*                                                          directory name for specific processor (CPU)
+*                                                     directory name for specific compiler
+*
+*           (3) NO compiler-supplied standard library functions SHOULD be used.
+*
+*               (a) Standard library functions are implemented in the custom library module(s) :
+*
+*                       \\lib_*.*
+*
+*                           where
+*                                         directory path for custom library software
+*
+*           (4) Compiler MUST be configured to include as additional include path directories :
+*
+*               (a) '\\'                                          See Note #1a
+*
+*               (b) (1) '\\                                         See Note #1b1
+*
+*                   (2) (A) '\\Secure\'                             See Note #1b2A
+*                       (B) '\\Secure\\'    See Note #1b2B
+*
+*               (c) '\\' directories                                               See Note #1c
+*
+*               (d) (1) '\\'                                        See Note #2a
+*                   (2) '\\\\'                       See Note #2b
+*
+*               (e) '\\'                                          See Note #3a
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                                 /* CPU Configuration              (see Note #2b)        */
+#include                                            /* CPU Core Library               (see Note #2a)        */
+
+#include                                             /* Standard        Defines        (see Note #3a)        */
+#include                                             /* Standard String Library        (see Note #3a)        */
+
+#include                                        /* Telnet Configuration File      (see Note #1a)        */
+
+#include                                          /* Network Protocol Suite         (see Note #1b)        */
+#include  
+
+#if 1
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                                DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  TELNETs_SHELL_ERR_TX                             -1
+
+
+/*
+*********************************************************************************************************
+*                                      TELNETs ERROR CODES DEFINES
+*
+* Note(s) : (1) The TELNETs_CmdProcess() function MUST return TELNETs_CMDPROCESS_ERR when an error occurred.
+*               Any other return value means the processing of the command was successful.
+*********************************************************************************************************
+*/
+
+#define  TELNETs_CMDPROCESS_ERR_NONE                       0
+#define  TELNETs_CMDPROCESS_ERR                           -1    /* See Note #1.                                         */
+
+typedef enum {
+    TELNETs_ERR_NONE                        =  0,
+    TELNETs_ERR_NONE_EOL_RX,
+    TELNETs_ERR_NONE_OPT_STATUS_NOT_CHANGED,
+    TELNETs_ERR_SOCK,
+    TELNETs_ERR_CONN_CLOSED,
+    TELNETs_ERR_RX_TIMEOUT,
+    TELNETs_ERR_RX,
+    TELNETs_ERR_TX,
+    TELNETs_ERR_OPT_NOT_SUPPORTED,
+    TELNETs_ERR_OPT_CODE_UNKNOWN,
+    TELNETs_ERR_OPT_STATUS_UNKNOWN,
+    TELNETs_ERR_NULL_PTR,
+    TELNETs_ERR_LEN_ZERO,
+    TELNETs_ERR_BUF_TOO_SMALL,
+    TELNETs_ERR_CMD_PROCESS,
+    TELNETs_ERR_CMD_EXEC
+} TELNETs_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                 TELNETs SESSION AND CONNECTION DEFINES
+*
+* Note(s) : (1) This defines the maximum number of session task(s) supported.
+*
+*               (a) #### This current version of TELNETs only supports 1 client at a time.  Therefore,
+*                   this define should always be set to '1'.
+*********************************************************************************************************
+*/
+
+#define  TELNETs_SESSION_TASKS_MAX                         1    /* See Note #1.                                         */
+
+#define  TELNETs_CONN_Q_SIZE                               3
+
+#define  TELNETs_FAILED_LOGIN_DLY_MS                     200    /* Dly between login tries.                             */
+
+
+/*
+*********************************************************************************************************
+*                                      TELNET USASCII GRAPHIC CODES
+*
+* Note(s) : From RFC #1938, section 'The NVT printer and keyboard', "The NVT can produce representations
+*           of all 95 USASCII graphics (codes 32 through 126)".  The lower and higher codes are here
+*           defined to help determine if they should be sent to the printer or not.
+*********************************************************************************************************
+*/
+
+#define  TELNET_ASCII_GRAPHIC_LOWER                       32    /* Lower  graphic code displayed by the NVT.            */
+#define  TELNET_ASCII_GRAPHIC_HIGHER                     126    /* Higher graphic code displayed by the NVT.            */
+
+
+/*
+*********************************************************************************************************
+*                                        TELNET COMMAND DEFINES
+*
+* Note(s) : (1) According to RFC #854, 'TELNET PROTOCOL SPECIFICATION', This should always be accompanied
+*               by a TCP Urgent notification.
+*
+*           (2) The 'SB' command indicates that what follows is sub-negotiation of the indicated option.
+*
+*           (3) From RFC #854, 'TELNET PROTOCOL SPECIFICATION', section 'General Considerations', "The
+*               principle of negotiated options takes cognizance of the fact that many hosts will wish
+*               to provide additional services over and above those available within an NVT [and these
+*               options] may be used with the DO, DON'T, WILL, and WON'T structure to allow a user and
+*               server to agree to use a more elaborate set of conventions for their TELNET connection".
+*
+*               WILL XXX is sent to indicate a party's desire (offer) to begin performing option XXX.
+*                        DO    XXX    positive response
+*                        DON'T XXX    negative response
+*
+*               DO   XXX is sent to indicate a desire (request) that the other party begin performing
+*               option XXX
+*                        WILL  XXX    positive acknowledgment
+*                        WON'T XXX    negative acknowledgment
+*
+*               Since a basic NVT is what is left when no options are enabled, responding with DON'T and
+*               WON'T guarantees to leave the connection in a state which both hosts can handle.
+*
+*           (4) When calling function TELNETs_TxCmd() with a command not related to any option, this
+*               define should be passed as the third parameter.
+*********************************************************************************************************
+*/
+
+
+
+typedef enum {                                                  /* See Note #3.                                         */
+         TELNETs_OPT_STATUS_CMD_SE   =                   240,   /* End of subnegotiation parameters.                    */
+         TELNETs_OPT_STATUS_CMD_NOP  =                   241,   /* No operation.                                        */
+         TELNETs_OPT_STATUS_CMD_DM   =                   242,   /* Data stream portion of a Synch (see Note #1).        */
+         TELNETs_OPT_STATUS_CMD_BRK  =                   243,   /* NVT character BRK (Break).                           */
+         TELNETs_OPT_STATUS_CMD_IP   =                   244,   /* The function IP   (Interrupt Process).               */
+         TELNETs_OPT_STATUS_CMD_AO   =                   245,   /* The function AO   (Abord Output).                    */
+         TELNETs_OPT_STATUS_CMD_AYT  =                   246,   /* The function AYT  (Are You There).                   */
+         TELNETs_OPT_STATUS_CMD_EC   =                   247,   /* The function EC   (Erase Character).                 */
+         TELNETs_OPT_STATUS_CMD_EL   =                   248,   /* The function EL   (Erase Line).                      */
+         TELNETs_OPT_STATUS_CMD_GA   =                   249,   /* The GA signal     (Go Ahead).                        */
+         TELNETs_OPT_STATUS_CMD_SB   =                   250,   /* Beginning of subnegotiation (see Note #2).           */
+         TELNETs_OPT_STATUS_CMD_WILL =                   251,
+         TELNETs_OPT_STATUS_CMD_WONT =                   252,
+         TELNETs_OPT_STATUS_CMD_DO   =                   253,
+         TELNETs_OPT_STATUS_CMD_DONT =                   254,
+         TELNETs_OPT_STATUS_CMD_IAC  =                   255    /* The IAC command   (Indicate As Command).             */
+}  TELNETs_OPT_STATUS_CMD;
+
+
+
+
+#define  TELNET_NO_OPT                                    -1    /* See Note #4.                                         */
+
+
+#define  TELNETs_CMD_MAX_BUF_LEN                           3    /* Cmd buf defines.                                     */
+#define  TELNETs_CMD_BUF_LEN_NO_OPT                        2
+#define  TELNETs_CMD_BUF_LEN_WITH_OPT                      3
+
+#define  TELNETs_CMD_IAC_OFFSET                            0
+#define  TELNETs_CMD_CMD_OFFSET                            1
+#define  TELNETs_CMD_OPT_OFFSET                            2
+
+
+/*
+*********************************************************************************************************
+*                                        TELNET OPTION DEFINES
+*
+* Note(s) : (1) This section defines some telnet option codes.  This list is not intended to be exhaustive,
+*               and the listed options codes are not necessarily supported and implemented.  Indeed, the
+*               list of supported options can be found in the file telnet-s.c, under the "INITIALIZED DATA"
+*               section.
+*********************************************************************************************************
+*/
+
+#define  TELNET_OPT_TX_BINARY                              0
+#define  TELNET_OPT_ECHO                                   1
+#define  TELNET_OPT_SUPPRESS_GA                            3
+#define  TELNET_OPT_STATUS                                 5
+#define  TELNET_OPT_TIMING_MARK                            6
+#define  TELNET_OPT_EXT_OPT_LIST                         255
+
+
+/*
+*********************************************************************************************************
+*                                    TELNET SUPPORTED OPTIONS DEFINE
+*
+* Note(s) : (1) This defines the number of supported options in this current implementation.  The particular
+*                options are defined in the TELNETs_SupportedOptTbl table in the implementation file.  This
+*                define MUST match the number of options appearing in previously mentioned table.
+*********************************************************************************************************
+*/
+
+#define  TELNET_NBR_OPT_SUPPORTED                          2    /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                 TELNETs STRING AND CHARACTER DEFINES
+*********************************************************************************************************
+*/
+
+#define  TELNETs_SYS_MSG_STR                       "\x0D\x0A"  \
+                                                   "Micrium Telnet Server\x0D\x0A\x0D\x0A"
+
+#define  TELNETs_NO_SERVICE_STR                    "Service not available, try again later\x0D\x0A"
+
+#define  TELNETs_PROMPT_STR                        ">"
+
+#define  TELNETs_LOGIN_STR                         "login: "
+#define  TELNETs_PW_STR                            "password: "
+#define  TELNETs_LOGIN_FAILURE_STR                 "Login incorrect\x0D\x0A"
+
+#define  TELNETs_CMD_PROCESS_ERR_STR               "Command not recognized\x0D\x0A"
+
+#define  TELNETs_EOL_STR                           "\x0D\x0A"
+#define  TELNETs_EOL_STR_LEN                               2
+
+
+/*
+*********************************************************************************************************
+*                                  TELNETs INTERNAL COMMANDS DEFINES
+*********************************************************************************************************
+*/
+
+#define  TELNETs_INT_CMD_LOGOUT                    "logout"
+
+
+/*
+*********************************************************************************************************
+*                                       TELNET NVT PARSE STATES
+*
+* Note(s) : (1) The TELNETs_NVTPrint() function relies on a state machine in to parse incoming data in
+*               order to treat them as telnet command or as regular USASCII graphic characters.  The
+*               TELNETs_NVT_STATE enum defines the various states the machine may be in.
+*********************************************************************************************************
+*/
+
+typedef enum {
+    TELNETs_NVT_STATE_GRAPHIC  = 1,
+    TELNETs_NVT_STATE_CR       = 2,
+    TELNETs_NVT_STATE_IAC      = 3,
+    TELNETs_NVT_STATE_CODE     = 4,
+    TELNETs_NVT_STATE_OPTION   = 5
+} TELNETs_NVT_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                     TELNETs OPTION STATUS DATA TYPES
+*
+* Note(s) : (1) This structure contains the option status for both sides of the connection (server and
+*               client), as well as a flag indicating whether or not we have sent a request for a change
+*               in option status not yet acknowledged for.
+*********************************************************************************************************
+*/
+
+typedef struct  TELNETs_Opt {
+    CPU_INT08U              code;                               /* Num code   for the opt.                              */
+    TELNETs_OPT_STATUS_CMD  server_status;                      /* Status     for the opt (server side).                */
+    TELNETs_OPT_STATUS_CMD  client_status;                      /* Status     for the opt (client side).                */
+    CPU_BOOLEAN             server_status_req_tx;               /* Server status change req tx'd.                       */
+    CPU_BOOLEAN             client_status_req_tx;               /* Client status change req tx'd.                       */
+}  TELNETs_OPT;
+
+
+/*
+*********************************************************************************************************
+*                                      TELNETs SESSION DATA TYPE
+*
+* Note(s) : (1) This structure is used by the session tasks to maintain their connection information.
+*
+*           (2) The reception buffer has its size set to a configurable length.
+*
+*           (3) The NVT printer buffer is used to simulate the presence of a console.  What this buffer
+*               contains is the last line (current one) of the terminal.  The character in this buffer
+*               should match the ones on the client's terminal.
+*
+*           (4) The list of the options is set when initializing the TELNETs_SESSION structure instance
+*                in the TELNETs_NVTInit() function.  When option are supported, the NVT will accept request
+*                from the client to change their status, and will allow the server to issue such a request.
+*********************************************************************************************************
+*/
+
+typedef struct  TELNETs_Session {
+    CPU_BOOLEAN             session_active;                     /* Whether the session is active or not.                */
+    NET_SOCK_ID             sock_id;                            /* Sock id for this session.                            */
+
+    void                   *pcur_working_dir;                   /* Cur working dir ptr.                                 */
+
+    CPU_CHAR                rx_buf[TELNETs_CFG_RX_BUF_LEN];     /* Rx buf          (see Note #2).                       */
+    CPU_INT32U              rx_buf_len;                         /* Len of valid data in rx buf.                         */
+
+                                                                /* NVT printer buf (see Note #3).                       */
+    CPU_CHAR                nvt_buf[TELNETs_CFG_NVT_BUF_LEN + TELNETs_EOL_STR_LEN + 1];
+    CPU_INT32U              nvt_buf_len;                        /* Len of valid data in nvt buf.                        */
+
+    CPU_INT08U              rx_opt_code;                        /* Last rx'd opt code.                                  */
+    TELNETs_OPT_STATUS_CMD  rx_opt_status_cmd;                  /* Last rx'd opt status cmd.                            */
+
+    TELNETs_NVT_STATE       nvt_state;                          /* Last NVT state.                                      */
+
+    TELNETs_OPT             opt[TELNET_NBR_OPT_SUPPORTED];      /* Supported opt   (See Note #4).                       */
+}  TELNETs_SESSION;
+
+
+/*
+*********************************************************************************************************
+*                              TELNET OUTPUT FUNCTION POINTER DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16S  (*TELNET_OUT_FNCT)(CPU_CHAR   *,
+                                        CPU_INT16U  ,
+                                        void       *);
+
+
+/*
+*********************************************************************************************************
+*                            TELNETs SECURE SESSION CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  TELNETs_SecureCfg {
+    CPU_CHAR                      *CertPtr;
+    CPU_INT32U                     CertLen;
+    CPU_CHAR                      *KeyPtr;
+    CPU_INT32U                     KeyLen;
+    NET_SOCK_SECURE_CERT_KEY_FMT   Fmt;
+    CPU_BOOLEAN                    CertChain;
+} TELNETs_SECURE_CFG;
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*
+* Note(s) : (1) The current implementation of this TELNET server only support one session (client) at the
+*               time.  When future release gets rid of this limitation, the TELNETs_ActiveSession global
+*               variable will have to be changed to an array of structure, and an allocation mechanism
+*               will have to be included in the server task.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+TELNETs_EXT  CPU_INT32U       TELNETs_NbrActiveSessionTask;     /* Nbr of active session tasks.                         */
+TELNETs_EXT  TELNETs_SESSION  TELNETs_ActiveSession;            /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_Init       (       NET_SOCK_ADDR_FAMILY   family,
+                                 const  TELNETs_SECURE_CFG    *p_secure_cfg);   /* TELNET server startup function.      */
+
+void         TELNETs_ServerTask (       void                  *p_arg);          /* TELNET server  main loop.            */
+
+void         TELNETs_SessionTask(       void                  *p_arg);          /* TELNET session main loop.            */
+
+
+/*
+*********************************************************************************************************
+*                                APPLICATION CALLBACK FUNCTION PROTOTYPES
+*                                      (see user application app.c)
+*********************************************************************************************************
+*/
+
+                                                                /* Authenticate usr.                                    */
+CPU_BOOLEAN  TELNETs_AuthUser     (CPU_CHAR         *user_name,
+                                   CPU_CHAR         *pw);
+
+                                                                /* Process ext cmd.                                     */
+CPU_INT16S   TELNETs_CmdHandlerExt(CPU_CHAR         *pcmd_line,
+                                   void             *pcwd,
+                                   CPU_BOOLEAN      *psession_active,
+                                   void             *pout_opt,
+                                   TELNET_OUT_FNCT   pout_fnct,
+                                   TELNETs_ERR      *perr);
+
+
+/*
+*********************************************************************************************************
+*                                       RTOS INTERFACE FUNCTIONS
+*                                          (see telnet-s_os.c)
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  TELNETs_OS_ServerTaskInit (void        *p_arg);    /* Perform TELNET OS init.                              */
+
+CPU_BOOLEAN  TELNETs_OS_SessionTaskInit(void        *p_arg);    /* Create session task.                                 */
+
+void         TELNETs_OS_TaskSuspend    (void);                  /* Suspend   current task.                              */
+void         TELNETs_OS_TaskDelete     (void);                  /* Terminate current task.                              */
+
+                                                                /* Delay     current task.                              */
+CPU_BOOLEAN  TELNETs_OS_TimeDly        (CPU_INT08U   hours,
+                                        CPU_INT08U   minutes,
+                                        CPU_INT08U   seconds,
+                                        CPU_INT08U   milli);
+
+
+/*
+*********************************************************************************************************
+*                                              TRACING
+*********************************************************************************************************
+*/
+                                                                /* Trace level, default to TRACE_LEVEL_OFF.             */
+#ifndef  TRACE_LEVEL_OFF
+#define  TRACE_LEVEL_OFF                                   0
+#endif
+
+#ifndef  TRACE_LEVEL_INFO
+#define  TRACE_LEVEL_INFO                                  1
+#endif
+
+#ifndef  TRACE_LEVEL_DBG
+#define  TRACE_LEVEL_DBG                                   2
+#endif
+
+#ifndef  TELNETs_TRACE_LEVEL
+#define  TELNETs_TRACE_LEVEL                               TRACE_LEVEL_OFF
+#endif
+
+#ifndef  TELNETs_TRACE
+#define  TELNETs_TRACE                                     printf
+#endif
+
+#if ((defined(TELNETs_TRACE))       && \
+(defined(TELNETs_TRACE_LEVEL)) && \
+(TELNETs_TRACE_LEVEL >= TRACE_LEVEL_INFO))
+
+#if (TELNETs_TRACE_LEVEL >= TRACE_LEVEL_LOG)
+#define  TELNETs_TRACE_LOG(msg)     TELNETs_TRACE  msg
+#else
+#define  TELNETs_TRACE_LOG(msg)
+#endif
+
+
+#if (TELNETs_TRACE_LEVEL >= TRACE_LEVEL_DBG)
+#define  TELNETs_TRACE_DBG(msg)     TELNETs_TRACE  msg
+#else
+#define  TELNETs_TRACE_DBG(msg)
+#endif
+
+#define  TELNETs_TRACE_INFO(msg)        TELNETs_TRACE  msg
+
+#else
+#define  TELNETs_TRACE_LOG(msg)
+#define  TELNETs_TRACE_DBG(msg)
+#define  TELNETs_TRACE_INFO(msg)
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  TELNETs_CFG_PORT_SERVER
+#error  "TELNETs_CFG_PORT_SERVER not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+#endif
+
+
+#ifndef  TELNETs_CFG_PORT_SERVER_SECURE
+#error  "TELNETs_CFG_PORT_SERVER_SECURE  not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+#endif
+
+
+#ifndef  TELNETs_CFG_INACTIVITY_TIMEOUT_S
+#error  "TELNETs_CFG_INACTIVITY_TIMEOUT_S not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+
+#elif  ((TELNETs_CFG_INACTIVITY_TIMEOUT_S <                   1) || \
+        (TELNETs_CFG_INACTIVITY_TIMEOUT_S > DEF_INT_16U_MAX_VAL))
+#error  "TELNETs_CFG_INACTIVITY_TIMEOUT_S illegally #define'd in 'telnet-s_cfg.h' [MUST be >= 1 && <= 65535]"
+#endif
+
+
+#ifndef  TELNETs_CFG_MAX_TX_TRIES
+#error  "TELNETs_CFG_MAX_TX_TRIES not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+
+#elif  ((TELNETs_CFG_MAX_TX_TRIES <                   1) || \
+        (TELNETs_CFG_MAX_TX_TRIES > DEF_INT_08U_MAX_VAL))
+#error  "TELNETs_CFG_MAX_TX_TRIES illegally #define'd in 'telnet-s_cfg.h'[MUST be >= 1 && <= 255]"
+#endif
+
+
+#ifndef  TELNETs_CFG_RX_BUF_LEN
+#error  "TELNETs_CFG_RX_BUF_LEN not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+
+#elif  ( TELNETs_CFG_RX_BUF_LEN < 1)
+#error  "TELNETs_CFG_RX_BUF_LEN illegally #define'd in 'telnet-s_cfg.h' [MUST be >=   1]"
+#endif
+
+
+#ifndef  TELNETs_CFG_NVT_BUF_LEN
+#error  "TELNETs_CFG_NVT_BUF_LEN not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+
+#elif  ( TELNETs_CFG_NVT_BUF_LEN < 1)
+#error  "TELNETs_CFG_NVT_BUF_LEN illegally #define'd in 'telnet-s_cfg.h' [MUST be >= 1]"
+#endif
+
+
+#ifndef  TELNETs_CFG_MAX_LOGIN_TRIES
+#error  "TELNETs_CFG_MAX_LOGIN_TRIES not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+
+#elif  ((TELNETs_CFG_MAX_LOGIN_TRIES <                   0) || \
+        (TELNETs_CFG_MAX_LOGIN_TRIES > DEF_INT_08U_MAX_VAL))
+#error  "TELNETs_CFG_MAX_LOGIN_TRIES illegally #define'd in 'telnet-s_cfg.h' [MUST be >= 0 && <= 255]"
+#endif
+
+
+#ifndef  TELNETs_CFG_MAX_USR_NAME_LEN
+#error  "TELNETs_CFG_MAX_USR_NAME_LEN not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+
+#elif  ((TELNETs_CFG_MAX_USR_NAME_LEN <                   1) || \
+        (TELNETs_CFG_MAX_USR_NAME_LEN > DEF_INT_08U_MAX_VAL))
+#error  "TELNETs_CFG_MAX_USR_NAME_LEN illegally #define'd in 'telnet-s_cfg.h' [MUST be >= 1 && <= 255] "
+#endif
+
+
+#ifndef  TELNETs_CFG_MAX_PW_LEN
+#error  "TELNETs_CFG_MAX_PW_LEN not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+
+#elif  ((TELNETs_CFG_MAX_PW_LEN <                   1) || \
+        (TELNETs_CFG_MAX_PW_LEN > DEF_INT_08U_MAX_VAL))
+#error  "TELNETs_CFG_MAX_PW_LEN illegally #define'd in 'telnet-s_cfg.h' [MUST be >= 1 && <= 255]"
+#endif
+
+
+#ifndef  TELNETs_CFG_FS_EN
+#error  "TELNETs_CFG_FS_EN not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+#endif
+
+
+#ifndef  TELNETs_CFG_WELCOME_MSG_STR
+#error  "TELNETs_CFG_WELCOME_MSG_STR not #define'd in 'telnet-s_cfg.h' see template file in package named 'telnet-s_cfg.h'"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    NETWORK CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if     (NET_TCP_CFG_EN != DEF_ENABLED)
+#error  "NET_TCP_CFG_EN illegally #define'd in 'net_cfg.h' [MUST be  DEF_ENABLED]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif                                                          /* End of TELNETs module include.                       */
+
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_audio_dev_cfg.c b/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_audio_dev_cfg.c
new file mode 100644
index 0000000..759284a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_audio_dev_cfg.c
@@ -0,0 +1,232 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   USB AUDIO DEVICE CONFIGURATION FILE
+*
+* File          : usbd_audio_dev_cfg.c
+* Version       : V4.05.00
+* Programmer(s) : CM
+*********************************************************************************************************
+* Note(s) : (1) This audio configuration file allows to build the following topologies:
+*
+*               (a) Speaker
+*
+*                   IT (USB OUT) ---------------> FU ---------------> OT (speaker)
+*
+*               (b) Microphone
+*
+*                   OT (USB IN)  <--------------- FU <--------------- IT (microphone)
+*
+*               (a) Headset
+*
+*                   IT (USB OUT) ---------------> FU ---------------> OT (speaker)
+*                   OT (USB IN)  <--------------- FU <--------------- IT (microphone)
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                    USB AUDIO DEVICE CONFIGURATION
+*
+* Note(s) : (1) Type I format type descriptor reports the sampling frequency capabilities of the
+*               isochronous data endpoint with the field 'bSamFreqType'. The possible values are:
+*
+*               (a) USBD_AUDIO_FMT_TYPE_I_SAM_FREQ_CONTINUOUS   Continuous sampling frequency
+*
+*               (b) 1..255                                      number of discrete sampling frequencies
+*                                                               supported by the isochronous data endpoint.
+*
+*           (2) These fields relates to 'bLockDelayUnits' and 'wLockDelay' fields of Class-Specific AS
+*               Isochronous Audio Data Endpoint Descriptor.  'bLockDelayUnits' and 'wLockDelay' indicate
+*               to the Host how long it takes for the clock recovery circuitry of this endpoint to lock
+*               and reliably produce or consume the audio data stream. Only applicable for synchronous
+*               and adaptive endpoints.
+*               See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               section 4.6.1.2 for more details about class-specific endpoint descriptor.
+*
+*           (3) Feedback endpoint refresh rate represents the exponent of power of 2 ms. The value must
+*               be between 1 (2 ms) and 9 (512 ms).
+*********************************************************************************************************
+*/
+
+#define  COUNT_OF(a)                              (sizeof(a)/sizeof((a)[0u]))
+
+CPU_INT08U  Mic_IT_ID;
+CPU_INT08U  Mic_OT_USB_IN_ID;
+CPU_INT08U  Mic_FU_ID;
+#if (APP_CFG_USBD_AUDIO_SIMULATION_LOOP_EN == DEF_ENABLED)
+CPU_INT08U  Speaker_IT_USB_OUT_ID;
+CPU_INT08U  Speaker_OT_ID;
+CPU_INT08U  Speaker_FU_ID;
+#endif
+
+                                                                /* --------------- INPUT TERMINAL CFG ----------------- */
+const  USBD_AUDIO_IT_CFG  USBD_IT_MIC_Cfg = {                   /* MICROPHONE.                                          */
+    USBD_AUDIO_TERMINAL_TYPE_MIC,
+    USBD_AUDIO_MONO,                                            /* Nbr of log output ch in Terminal Output.             */
+    USBD_AUDIO_SPATIAL_LOCATION_LEFT_FRONT,                     /* Spatial location of log ch.                          */
+    DEF_DISABLED,                                               /* Dis or En Copy Protection.                           */
+    USBD_AUDIO_CPL_NONE,                                        /* Copy Protection Level.                               */
+    "IT Microphone"                                             /* Str describing IT. Obtained by Str Desc.             */
+};
+
+const  USBD_AUDIO_IT_CFG  USBD_IT_USB_OUT_Cfg = {               /* USB STREAMING OUT.                                   */
+    USBD_AUDIO_TERMINAL_TYPE_USB_STREAMING,
+    USBD_AUDIO_MONO,                                            /* Nbr of log output ch in Terminal Output.             */
+    USBD_AUDIO_SPATIAL_LOCATION_LEFT_FRONT,                     /* Spatial location of log ch.                          */
+    DEF_DISABLED,                                               /* Dis or En Copy Protection.                           */
+    USBD_AUDIO_CPL_NONE,                                        /* Copy Protection Level.                               */
+    "IT USB OUT"                                                /* Str describing IT. Obtained by Str Desc.             */
+};
+
+                                                                /* -------------- OUTPUT TERMINAL CFG ----------------- */
+const  USBD_AUDIO_OT_CFG  USBD_OT_USB_IN_Cfg = {
+    USBD_AUDIO_TERMINAL_TYPE_USB_STREAMING,
+    DEF_DISABLED,                                               /* Dis or En Copy Protection.                           */
+    "OT USB IN"                                                 /* Str describing OT. Obtained by Str Desc.             */
+};
+
+const  USBD_AUDIO_OT_CFG  USBD_OT_SPEAKER_Cfg = {
+    USBD_AUDIO_TERMINAL_TYPE_SPEAKER,
+    DEF_DISABLED,                                               /* Dis or En Copy Protection.                           */
+    "OT Speaker"                                                /* Str describing OT. Obtained by Str Desc.             */
+};
+
+                                                                /* ---------------- FEATURE UNIT CFG ------------------ */
+CPU_INT16U  FU_LogChCtrlTbl[] = {
+   (USBD_AUDIO_FU_CTRL_MUTE | USBD_AUDIO_FU_CTRL_VOL),          /* Master ch.                                           */
+    USBD_AUDIO_FU_CTRL_NONE,                                    /* Log ch #1.                                           */
+    USBD_AUDIO_FU_CTRL_NONE                                     /* Log ch #2.                                           */
+};
+
+
+const  USBD_AUDIO_FU_CFG  USBD_FU_SPEAKER_Cfg = {
+    USBD_AUDIO_MONO,                                            /* Nbr of log ch.                                       */
+   &FU_LogChCtrlTbl[0u],                                        /* Ptr to Feature Unit Controls tbl.                    */
+    "FU Speaker"                                                /* Str describing FU. Obtained by Str Desc.             */
+};
+
+const  USBD_AUDIO_FU_CFG  USBD_FU_MIC_Cfg = {
+    USBD_AUDIO_MONO,                                            /* Nbr of log ch.                                       */
+   &FU_LogChCtrlTbl[0u],                                        /* Ptr to Feature Unit Controls tbl.                    */
+    "FU Microphone"                                             /* Str describing FU. Obtained by Str Desc.             */
+};
+
+                                                                /* -------------- AUDIO STREAMING IF CFG -------------- */
+const  USBD_AUDIO_STREAM_CFG  USBD_MicStreamCfg = {
+    APP_CFG_USBD_AUDIO_RECORD_NBR_BUF,
+    APP_CFG_USBD_AUDIO_RECORD_CORR_PERIOD
+};
+
+#if (APP_CFG_USBD_AUDIO_SIMULATION_LOOP_EN == DEF_ENABLED)
+const  USBD_AUDIO_STREAM_CFG  USBD_SpeakerStreamCfg = {
+    APP_CFG_USBD_AUDIO_PLAYBACK_NBR_BUF,
+    APP_CFG_USBD_AUDIO_PLAYBACK_CORR_PERIOD
+};
+#endif
+
+
+CPU_INT32U  AS_SamFreqTbl[] = {
+#if (APP_CFG_USBD_AUDIO_SIMULATION_LOOP_EN == DEF_DISABLED)
+    USBD_AUDIO_FMT_TYPE_I_SAMFREQ_44_1KHZ,
+#endif
+    USBD_AUDIO_FMT_TYPE_I_SAMFREQ_48KHZ
+};
+
+const  USBD_AUDIO_AS_ALT_CFG  USBD_AS_IF1_Alt1_SpeakerCfg = {
+                                                                /* AS IF RELATED:                                       */
+    1u,                                                         /* Delay introduced by the data path.                   */
+    USBD_AUDIO_DATA_FMT_TYPE_I_PCM,                             /* Audio data fmt used to comm with this IF.            */
+    USBD_AUDIO_MONO,                                            /* Nbr of physical ch in the audio data stream.         */
+    USBD_AUDIO_FMT_TYPE_I_SUBFRAME_SIZE_2,                      /* Nbr of bytes occupied by one audio subframe.         */
+    USBD_AUDIO_FMT_TYPE_I_BIT_RESOLUTION_16,                    /* Effectively used bits in an audio subframe.          */
+    COUNT_OF(AS_SamFreqTbl),                                    /* Nbr of sampling frequencies (see Note #1).           */
+    0u,                                                         /* Lower bound in Hz of the sampling freq range.        */
+    0u,                                                         /* Upper bound in Hz of the sampling freq range.        */
+   &AS_SamFreqTbl[0u],                                          /* Tbl of discrete sampling frequencies.                */
+                                                                /* ENDPOINT CONFIG:                                     */
+    DEF_NO,                                                     /* Direction OUT                                        */
+    USBD_EP_TYPE_SYNC_ADAPTIVE,                                 /* Synchronization type supported by Isoc EP.           */
+                                                                /* CLASS SPECIFIC EP RELATED:                           */
+    USBD_AUDIO_AS_EP_CTRL_SAMPLING_FREQ,                        /* Class specific controls supported by Isoc EP.        */
+    USBD_AUDIO_AS_EP_LOCK_DLY_UND,                              /* See Note #2.                                         */
+    0u,                                                         /* See Note #2.                                         */
+                                                                /* SYNCH EP RELATED:                                    */
+    0u,                                                         /* Refresh Rate (see Note #3).                          */
+};
+
+const  USBD_AUDIO_AS_ALT_CFG  USBD_AS_IF2_Alt1_MicCfg = {
+                                                                /* AS IF RELATED:                                       */
+    1u,                                                         /* Delay introduced by the data path.                   */
+    USBD_AUDIO_DATA_FMT_TYPE_I_PCM,                             /* Audio data fmt used to comm with this IF.            */
+                                                                /* TYPE I FMT RELATED:                                  */
+    USBD_AUDIO_MONO,                                            /* Nbr of physical ch in the audio data stream.         */
+    USBD_AUDIO_FMT_TYPE_I_SUBFRAME_SIZE_2,                      /* Nbr of bytes occupied by one audio subframe.         */
+    USBD_AUDIO_FMT_TYPE_I_BIT_RESOLUTION_16,                    /* Effectively used bits in an audio subframe.          */
+    COUNT_OF(AS_SamFreqTbl),                                    /* Nbr of sampling frequencies (see Note #1).           */
+    0u,                                                         /* Lower bound in Hz of the sampling freq range.        */
+    0u,                                                         /* Upper bound in Hz of the sampling freq range.        */
+   &AS_SamFreqTbl[0u],                                          /* Tbl of discrete sampling frequencies.                */
+                                                                /* ENDPOINT CONFIG:                                     */
+    DEF_YES,                                                    /* Direction IN                                         */
+    USBD_EP_TYPE_SYNC_ASYNC,                                    /* Synchronization type supported by Isoc EP.           */
+                                                                /* CLASS SPECIFIC EP RELATED:                           */
+    USBD_AUDIO_AS_EP_CTRL_SAMPLING_FREQ,                        /* Class specific controls supported by Isoc EP.        */
+    USBD_AUDIO_AS_EP_LOCK_DLY_UND,                              /* See Note #2.                                         */
+    0u,                                                         /* See Note #2.                                         */
+                                                                /* SYNCH EP RELATED:                                    */
+    0u,                                                         /* Refresh Rate (see Note #3).                          */
+};
+
+USBD_AUDIO_AS_ALT_CFG  *USBD_AS_IF1_Alt_SpeakerCfgTbl[] = {
+   &USBD_AS_IF1_Alt1_SpeakerCfg,
+};
+
+USBD_AUDIO_AS_ALT_CFG  *USBD_AS_IF2_Alt_MicCfgTbl[] = {
+   &USBD_AS_IF2_Alt1_MicCfg,
+};
+
+USBD_AUDIO_AS_IF_CFG  USBD_AS_IF1_SpeakerCfg = {
+   &USBD_AS_IF1_Alt_SpeakerCfgTbl[0u],
+    COUNT_OF(USBD_AS_IF1_Alt_SpeakerCfgTbl),
+};
+
+USBD_AUDIO_AS_IF_CFG  USBD_AS_IF2_MicCfg = {
+   &USBD_AS_IF2_Alt_MicCfgTbl[0u],
+    COUNT_OF(USBD_AS_IF2_Alt_MicCfgTbl),
+};
+
+USBD_AUDIO_AS_IF_CFG  *USBD_AS_IF_Cfg_Tbl[] = {
+   &USBD_AS_IF1_SpeakerCfg,
+   &USBD_AS_IF2_MicCfg,
+};
+
+CPU_INT08U  USBD_AS_IF_Cfg_Nbr = COUNT_OF(USBD_AS_IF_Cfg_Tbl);
+
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_audio_dev_cfg.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_audio_dev_cfg.h
new file mode 100644
index 0000000..a8fb59d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_audio_dev_cfg.h
@@ -0,0 +1,115 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   USB AUDIO DEVICE CONFIGURATION FILE
+*
+* File          : usbd_audio_dev_cfg.h
+* Version       : V4.05.00
+* Programmer(s) : CM
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_AUDIO_DEV_CFG_MODULE_PRESENT                            /* See Note #1.                                         */
+#define  USBD_AUDIO_DEV_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  APP_CFG_USBD_AUDIO_RECORD_NBR_BUF                 USBD_AUDIO_STREAM_NBR_BUF_18
+
+#if (APP_CFG_USBD_AUDIO_SIMULATION_LOOP_EN == DEF_ENABLED)
+#define  APP_CFG_USBD_AUDIO_PLAYBACK_NBR_BUF               USBD_AUDIO_STREAM_NBR_BUF_18
+#endif
+
+
+/*
+*********************************************************************************************************
+*                            USB AUDIO FUNCTION TOPOLOGY 1 CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* -------------- TERMINAL AND UNIT IDS --------------- */
+extern         CPU_INT08U             Mic_IT_ID;
+extern         CPU_INT08U             Mic_OT_USB_IN_ID;
+extern         CPU_INT08U             Mic_FU_ID;
+#if (APP_CFG_USBD_AUDIO_SIMULATION_LOOP_EN == DEF_ENABLED)
+extern         CPU_INT08U             Speaker_IT_USB_OUT_ID;
+extern         CPU_INT08U             Speaker_OT_ID;
+extern         CPU_INT08U             Speaker_FU_ID;
+#endif
+
+
+                                                                /* ----------- TERMINAL, UNIT AND AS IF CFG ----------- */
+extern  const  USBD_AUDIO_IT_CFG      USBD_IT_MIC_Cfg;
+extern  const  USBD_AUDIO_OT_CFG      USBD_OT_USB_IN_Cfg;
+extern  const  USBD_AUDIO_FU_CFG      USBD_FU_MIC_Cfg;
+extern  const  USBD_AUDIO_STREAM_CFG  USBD_MicStreamCfg;
+extern  const  USBD_AUDIO_AS_IF_CFG   USBD_AS_IF2_MicCfg;
+#if (APP_CFG_USBD_AUDIO_SIMULATION_LOOP_EN == DEF_ENABLED)
+extern  const  USBD_AUDIO_IT_CFG      USBD_IT_USB_OUT_Cfg;
+extern  const  USBD_AUDIO_OT_CFG      USBD_OT_SPEAKER_Cfg;
+extern  const  USBD_AUDIO_FU_CFG      USBD_FU_SPEAKER_Cfg;
+extern  const  USBD_AUDIO_STREAM_CFG  USBD_SpeakerStreamCfg;
+extern  const  USBD_AUDIO_AS_IF_CFG   USBD_AS_IF1_SpeakerCfg;
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_cfg.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_cfg.h
new file mode 100644
index 0000000..ae1c825
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_cfg.h
@@ -0,0 +1,464 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    USB DEVICE CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* File          : usbd_cfg.h
+* Version       : V4.05.00
+* Programmer(s) : FT
+*                 FGK
+*                 OD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This USB configuration header file is protected from multiple pre-processor inclusion
+*               through use of the USB configuration module present pre-processor macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_CFG_MODULE_PRESENT                                /* See Note #1.                                         */
+#define  USBD_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                  USB DEVICE GENERIC CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* uC/USB-Device Code Optimization.                     */
+#define  USBD_CFG_OPTIMIZE_SPD                  DEF_ENABLED
+                                                                /* DEF_ENABLED  Optimizes uC/USBD for speed performance.*/
+                                                                /* DEF_DISABLED Optimizes uC/USBD for memory footprint. */
+
+                                                                /* Maximum Number of Devices.                           */
+#define  USBD_CFG_MAX_NBR_DEV                              1u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Buffer Alignment in uC/USB-Device.                   */
+#define  USBD_CFG_BUF_ALIGN_OCTETS                         4u
+                                                                /* Must be between 1u and 2^(CPU_CFG_DATA_SIZE * 8).    */
+
+
+/*
+*********************************************************************************************************
+*                                USB DEVICE ARGUMENT CHECK CONFIGURATION
+*
+* Note(s) : (1) Configure USBD_ERR_CFG_ARG_CHK_EXT_EN to enable or disable argument checks.
+*
+*               (a) When DEF_ENABLED,  ALL arguments received from any API provided by the developer
+*                   or application are checked/validated.
+*               (b) When DEF_DISABLED, NO  arguments received from any API provided by the developer
+*                   or application are checked/validated.
+*********************************************************************************************************
+*/
+
+                                                                /* Argument Check Feature.                              */
+#define  USBD_CFG_ERR_ARG_CHK_EXT_EN            DEF_ENABLED
+                                                                /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                          USB DEVICE MICROSOFT OS DESCRIPTOR CONFIGURATION
+*
+* Note(s) : (1) Configure USBD_CFG_MS_OS_DESC_EN to enable or disable Microsoft OS descriptor.
+*
+*               (a) When DEF_ENABLED,  Microsoft descriptors and MS OS string descriptor are enabled.
+*               (b) When DEF_DISABLED, Microsoft descriptors and MS OS string descriptor are disabled.
+*********************************************************************************************************
+*/
+
+                                                                /* Microsoft Descriptor Support.                        */
+#define  USBD_CFG_MS_OS_DESC_EN                 DEF_DISABLED
+                                                                /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                      USB DEVICE CONFIGURATIONS
+*
+* Note(s) : (1) This configuration should be set to DEF_ENABLED if the USB device controller supports
+*               high-speed, or to DEF_DISABLED if otherwise.
+*********************************************************************************************************
+*/
+
+                                                                /* Maximum Number of Configurations.                    */
+#define  USBD_CFG_MAX_NBR_CFG                              2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Configure Isochronous Support in uC/USB-Device.      */
+#define  USBD_CFG_EP_ISOC_EN                    DEF_DISABLED
+                                                                /* DEF_ENABLED  Isochronous enpoints are     available. */
+                                                                /* DEF_DISABLED Isochronous enpoints are not available. */
+
+                                                                /* Configure High-Speed Support in uC/USB-Device.       */
+#define  USBD_CFG_HS_EN                         DEF_ENABLED
+                                                                /* See Note #1.                                         */
+
+                                                                /* Timeout for Data/Status Phases of Control Transfer.  */
+#define  USBD_CFG_CTRL_REQ_TIMEOUT_mS                   5000u
+                                                                /* Must be between 1u and 65535u.                       */
+
+
+/*
+*********************************************************************************************************
+*                                 USB DEVICE INTERFACES CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* Maximum Number of Interfaces.                        */
+#define  USBD_CFG_MAX_NBR_IF                               2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Alternate Interfaces.              */
+#define  USBD_CFG_MAX_NBR_IF_ALT                           2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Interface Groups.                  */
+#define  USBD_CFG_MAX_NBR_IF_GRP                           0u
+                                                                /* Must be between 0u and 255u.                         */
+
+                                                                /* Maximum Number of Endpoint Descriptors.              */
+#define  USBD_CFG_MAX_NBR_EP_DESC                          2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Opened Endpoints.                  */
+#define  USBD_CFG_MAX_NBR_EP_OPEN                          4u
+                                                                /* Must be between 2u and 255u.                         */
+
+                                                                /* Maximum Number of Additional URBs.                   */
+                                                                /* These URBs are used for async queueing.              */
+#define  USBD_CFG_MAX_NBR_URB_EXTRA                        0u
+                                                                /* Must be between 0u and 255u.                         */
+
+
+/*
+*********************************************************************************************************
+*                                   USB DEVICE STRING CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* Maximum Number of String Descriptors.                */
+#define  USBD_CFG_MAX_NBR_STR                             10u
+                                                                /* Must be between 0u and 255u.                         */
+
+
+/*
+*********************************************************************************************************
+*                                   USB DEVICE DEBUG CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* Debug Module Trace Support.                          */
+#define  USBD_CFG_DBG_TRACE_EN                 DEF_DISABLED
+                                                                /* DEF_ENABLED  Trace debug module is     available.    */
+                                                                /* DEF_DISABLED Trace debug module is not available.    */
+
+                                                                /* Maximum Number of Trace Events.                      */
+#define  USBD_CFG_DBG_TRACE_NBR_EVENTS                    10u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Debug Module Built-In Statistics Support.            */
+#define  USBD_CFG_DBG_STATS_EN                  DEF_DISABLED
+                                                                /* DEF_ENABLED  Built-in statistics are     available.  */
+                                                                /* DEF_DISABLED Built-in statistics are not available.  */
+
+                                                                /* Debug Module Built-In Statistics Counter Data Type.  */
+#define  USBD_CFG_DBG_STATS_CNT_TYPE            CPU_INT08U
+                                                                /* CPU_INT08U, CPU_INT16U or CPU_INT32U.                */
+
+
+/*
+*********************************************************************************************************
+*                                      AUDIO CLASS CONFIGURATION
+*
+* Note(s) : (1) Among all class-specific requests supported by Audio 1.0 class, Graphic Equalizer control
+*               of the Feature Unit use the longest payload size for the SET_CUR request.
+*               See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               Table 5-27 for more details.
+*
+*           (2) Audio buffers allocated for each AudioStreaming interface requires to be aligned
+*               properly according to DMA requirement. Most of the time, a DMA is used to transfer
+*               audio data between the codec and the USB stack in order to offload the CPU.
+*********************************************************************************************************
+*/
+
+                                                                /* Audio Playback Support.                              */
+#define  USBD_AUDIO_CFG_PLAYBACK_EN               DEF_ENABLED
+                                                                /* DEF_ENABLED  Enable  audio playback capabilities.    */
+                                                                /* DEF_DISABLED Disable audio playback capabilities.    */
+
+                                                                /* Audio Record Support.                                */
+#define  USBD_AUDIO_CFG_RECORD_EN                 DEF_ENABLED
+                                                                /* DEF_ENABLED  Enable  audio record capabilities.      */
+                                                                /* DEF_DISABLED Disable audio record capabilities.      */
+
+                                                                /* Feature Unit with all or Minimum of Controls.        */
+#define  USBD_AUDIO_CFG_FU_MAX_CTRL               DEF_DISABLED
+                                                                /* DEF_ENABLED  FU with all ctrls.                      */
+                                                                /* DEF_DISABLED FU with only mute & vol ctrls.          */
+
+                                                                /* Maximum Number of Audio Class Instances.             */
+#define  USBD_AUDIO_CFG_MAX_NBR_AIC                        1u
+                                                                /* Must be between 1u and 254u.                         */
+
+                                                                /* Maximum Number of Configurations per Class Instance. */
+#define  USBD_AUDIO_CFG_MAX_NBR_CFG                        2u
+                                                                /* Must be between 1u and 254u.                         */
+
+                                                                /* Maximum Number of Input Terminals.                   */
+#define  USBD_AUDIO_CFG_MAX_NBR_IT                         2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Output Terminals.                  */
+#define  USBD_AUDIO_CFG_MAX_NBR_OT                         2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Feature Units.                     */
+#define  USBD_AUDIO_CFG_MAX_NBR_FU                         2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Mixer Units.                       */
+#define  USBD_AUDIO_CFG_MAX_NBR_MU                         0u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Selector Units.                    */
+#define  USBD_AUDIO_CFG_MAX_NBR_SU                         0u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Playback AudioStreaming Interfaces */
+                                                                /* per Class Instance.                                  */
+#define  USBD_AUDIO_CFG_MAX_NBR_AS_IF_PLAYBACK             1u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Record AudioStreaming Interfaces   */
+                                                                /* per Class Instance.                                  */
+#define  USBD_AUDIO_CFG_MAX_NBR_AS_IF_RECORD               1u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Operational Alternate Interfaces   */
+                                                                /* per Class Instance.                                  */
+#define  USBD_AUDIO_CFG_MAX_NBR_IF_ALT                     2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Class Specific Payload Length.               */
+#define  USBD_AUDIO_CFG_CLASS_REQ_MAX_LEN                  4u
+                                                                /* Must be between 1u and 34u (see Note #1).            */
+
+                                                                /* Audio Buffer Alignment Requirement.                  */
+#define  USBD_AUDIO_CFG_BUF_ALIGN_OCTETS          USBD_CFG_BUF_ALIGN_OCTETS
+                                                                /* See Note #2.                                         */
+
+                                                                /* Playback Feedback Support.                           */
+#define  USBD_AUDIO_CFG_PLAYBACK_FEEDBACK_EN      DEF_DISABLED
+                                                                /* DEF_ENABLED  Enable  playback feedback.              */
+                                                                /* DEF_DISABLED Disable playback feedback.              */
+
+                                                                /* Playback Stream Correction Support.                  */
+#define  USBD_AUDIO_CFG_PLAYBACK_CORR_EN          DEF_DISABLED
+                                                                /* DEF_ENABLED  Enable  playback stream correction.     */
+                                                                /* DEF_DISABLED Disable playback stream correction.     */
+
+                                                                /* Record Stream Correction Support.                    */
+#define  USBD_AUDIO_CFG_RECORD_CORR_EN            DEF_DISABLED
+                                                                /* DEF_ENABLED  Enable  record stream correction.       */
+                                                                /* DEF_DISABLED Disable record stream correction.       */
+
+                                                                /* Audio Statistics Support.                            */
+#define  USBD_AUDIO_CFG_STAT_EN                   DEF_DISABLED
+                                                                /* DEF_ENABLED  Enable  audio class statistics.         */
+                                                                /* DEF_DISABLED Disable audio class statistics.         */
+
+
+/*
+*********************************************************************************************************
+*                           COMMUNICATION DEVICE CLASS (CDC) CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* Maximum Number of CDC Class Instances.               */
+#define  USBD_CDC_CFG_MAX_NBR_DEV                          1u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Configurations per Class Instance. */
+#define  USBD_CDC_CFG_MAX_NBR_CFG                          2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of CDC Data Interfaces.               */
+#define  USBD_CDC_CFG_MAX_NBR_DATA_IF                      1u
+                                                                /* Must be between 1u and 255u.                         */
+
+
+/*
+*********************************************************************************************************
+*                     CDC ABSTRACT CONTROL MODEL (ACM) SERIAL CLASS CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* Maximum Number of ACM Sub-Class Instances.           */
+#define  USBD_ACM_SERIAL_CFG_MAX_NBR_DEV                   1u
+                                                                /* Must be between 1u and 255u.                         */
+
+
+/*
+*********************************************************************************************************
+*                       CDC ETHERNET EMULATION MODEL (EEM) CLASS CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* Maximum Number of Class Instances                    */
+#define  USBD_CDC_EEM_CFG_MAX_NBR_DEV                      1u
+
+                                                                /* Maximum Number of Configurations per Class Instance  */
+#define  USBD_CDC_EEM_CFG_MAX_NBR_CFG                      2u
+
+                                                                /* Length of receive buffer(s).                         */
+#define  USBD_CDC_EEM_CFG_RX_BUF_LEN                    1520u
+
+                                                                /* Length of buffer used for echo response command.     */
+#define  USBD_CDC_EEM_CFG_ECHO_BUF_LEN                    64u
+
+
+/*
+*********************************************************************************************************
+*                                       HID CLASS CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* Maximum Number of HID Class Instances.               */
+#define  USBD_HID_CFG_MAX_NBR_DEV                          1u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Configurations per Class Instance. */
+#define  USBD_HID_CFG_MAX_NBR_CFG                          2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Report ID.                         */
+#define  USBD_HID_CFG_MAX_NBR_REPORT_ID                    1u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Push/Pop Items.                    */
+#define  USBD_HID_CFG_MAX_NBR_REPORT_PUSHPOP               0u
+                                                                /* Must be between 0u and 255u.                         */
+
+
+/*
+*********************************************************************************************************
+*                               MASS STORAGE CLASS (MSC) CONFIGURATION
+*
+* Note(s) : (1) This constant is only used when MSC class interfaces with uC/FS. This constant should
+*               be DEF_ENABLED when using a removable media such as SD card. Fixed media such as RAMDisk,
+*               NAND should have this constant set to DEF_DISABLED.
+*
+*               DEF_ENABLED      Create FS Refresh task for polling media status.
+*               DEF_DISABLED     Do not create FS Refresh task.
+*********************************************************************************************************
+*/
+
+                                                                /* Maximum Number of MSC Class Instances.               */
+#define  USBD_MSC_CFG_MAX_NBR_DEV                          1u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Configurations per Class Instance. */
+#define  USBD_MSC_CFG_MAX_NBR_CFG                          2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Logical Units.                     */
+#define  USBD_MSC_CFG_MAX_LUN                              1u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Data Buffer Length, in octets.                       */
+#define  USBD_MSC_CFG_DATA_LEN                          2048u
+                                                                /* Must be between 1u and DEF_INT_32U_MAX_VAL.          */
+
+                                                                /* Removable Device Refresh Task.                       */
+#define  USBD_MSC_CFG_FS_REFRESH_TASK_EN        DEF_DISABLED
+                                                                /* See Note #1.                                         */
+
+                                                                /* Removable Device Refresh Task Polling Delay.         */
+#define  USBD_MSC_CFG_DEV_POLL_DLY_mS                    100u
+                                                                /* Must be between 1u and DEF_INT_32U_MAX_VAL.          */
+
+
+/*
+*********************************************************************************************************
+*                        PERSONAL HEALTHCARE DEVICE CLASS (PHDC) CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* Maximum Number of PHDC Class Instances.              */
+#define  USBD_PHDC_CFG_MAX_NBR_DEV                         1u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Configurations per Class Instance. */
+#define  USBD_PHDC_CFG_MAX_NBR_CFG                         2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Opaque Data Buffer Length.                           */
+#define  USBD_PHDC_CFG_DATA_OPAQUE_MAX_LEN                43u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* QoS Scheduler.                                       */
+#define  USBD_PHDC_OS_CFG_SCHED_EN              DEF_ENABLED
+                                                                /* DEF_ENABLED  Enable  QoS scheduler.                  */
+                                                                /* DEF_DISABLED Disable QoS scheduler.                  */
+
+
+/*
+*********************************************************************************************************
+*                                     VENDOR CLASS CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /* Maximum Number of Vendor Class Instances.            */
+#define  USBD_VENDOR_CFG_MAX_NBR_DEV                       1u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Configurations per Class Instance. */
+#define  USBD_VENDOR_CFG_MAX_NBR_CFG                       2u
+                                                                /* Must be between 1u and 255u.                         */
+
+                                                                /* Maximum Number of Microsoft Extended Properties.     */
+#define  USBD_VENDOR_CFG_MAX_NBR_MS_EXT_PROPERTY           1u
+                                                                /* Must be between 1u and 255u.                         */
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_dev_cfg.c b/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_dev_cfg.c
new file mode 100644
index 0000000..1cff5aa
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_dev_cfg.c
@@ -0,0 +1,75 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    USB DEVICE CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* File          : usbd_dev_cfg.c
+* Version       : V4.05.00
+* Programmer(s) : FGK
+*                 OD
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                      USB DEVICE CONFIGURATION
+*********************************************************************************************************
+*/
+
+const USBD_DEV_CFG  USBD_DevCfg_Template = {
+    0xFFFE,                                                     /* Vendor  ID.                                          */
+    0x1234,                                                     /* Product ID.                                          */
+    0x0100,                                                     /* Device release number.                               */
+   "MICRIUM MANUFACTURER",                                      /* Manufacturer  string.                                */
+   "MICRIUM PRODUCT",                                           /* Product       string.                                */
+   "1234567890ABCDEF",                                          /* Serial number string.                                */
+    USBD_LANG_ID_ENGLISH_US                                     /* String language ID.                                  */
+};
+
+
+/*
+*********************************************************************************************************
+*                                   USB DEVICE DRIVER CONFIGURATION
+*********************************************************************************************************
+*/
+
+const USBD_DRV_CFG  USBD_DrvCfg_Template = {
+    0x00000000,                                                 /* Base addr   of device controller hw registers.       */
+    0x00000000,                                                 /* Base addr   of device controller dedicated mem.      */
+             0u,                                                /* Size        of device controller dedicated mem.      */
+
+    USBD_DEV_SPD_FULL,                                          /* Speed       of device controller.                    */
+
+    USBD_DrvEP_InfoTbl_Template                                 /* EP Info tbl of device controller.                    */
+};
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_dev_cfg.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_dev_cfg.h
new file mode 100644
index 0000000..cf18547
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Cfg/Template/usbd_dev_cfg.h
@@ -0,0 +1,76 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    USB DEVICE CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* File          : usbd_dev_cfg.h
+* Version       : V4.05.00
+* Programmer(s) : FGK
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This USB device configuration header file is protected from multiple pre-processor
+*               inclusion through use of the USB device configuration module present pre-processor
+*               macro definition.
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_DEV_CFG_MODULE_PRESENT                            /* See Note #1.                                         */
+#define  USBD_DEV_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                      USB DEVICE CONFIGURATION
+*********************************************************************************************************
+*/
+
+extern  const USBD_DEV_CFG  USBD_DevCfg_Template;
+
+
+/*
+*********************************************************************************************************
+*                                   USB DEVICE DRIVER CONFIGURATION
+*********************************************************************************************************
+*/
+
+extern  const USBD_DRV_CFG  USBD_DrvCfg_Template;
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio.h
new file mode 100644
index 0000000..e63e8f3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio.h
@@ -0,0 +1,1118 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        USB DEVICE AUDIO CLASS
+*
+* File          : usbd_audio.h
+* Version       : V4.05.00
+* Programmer(s) : CM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_AUDIO_MODULE_PRESENT
+#define  USBD_AUDIO_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                            /* Device Configuration file.                           */
+#include  "../../Source/usbd_core.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef   USBD_AUDIO_MODULE
+#define  USBD_AUDIO_EXT
+#else
+#define  USBD_AUDIO_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  USBD_AUDIO_STREAM_NBR_BUF_6                            6u
+#define  USBD_AUDIO_STREAM_NBR_BUF_12                          12u
+#define  USBD_AUDIO_STREAM_NBR_BUF_18                          18u
+#define  USBD_AUDIO_STREAM_NBR_BUF_24                          24u
+#define  USBD_AUDIO_STREAM_NBR_BUF_30                          30u
+#define  USBD_AUDIO_STREAM_NBR_BUF_36                          36u
+#define  USBD_AUDIO_STREAM_NBR_BUF_42                          42u
+
+#define  USBD_AUDIO_TERMINAL_NO_ASSOCIATION                     0u
+
+
+/*
+*********************************************************************************************************
+*                                      AUDIO CLASS-SPECIFIC REQ
+*
+* Note(s):  (1) See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               section 5.2.1.1 and appendix A.9 for more details about Audio class-specific SET_XXX
+*               requests.
+*
+*           (2) See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               section 5.2.1.2 and appendix A.9 for more details about Audio class-specific GET_XXX
+*               requests.
+*********************************************************************************************************
+*/
+                                                                /* See Note #1.                                         */
+#define  USBD_AUDIO_REQ_SET_CUR                         0x01u
+#define  USBD_AUDIO_REQ_SET_MIN                         0x02u
+#define  USBD_AUDIO_REQ_SET_MAX                         0x03u
+#define  USBD_AUDIO_REQ_SET_RES                         0x04u
+#define  USBD_AUDIO_REQ_SET_MEM                         0x05u
+                                                                /* See Note #2.                                         */
+#define  USBD_AUDIO_REQ_GET_CUR                         0x81u
+#define  USBD_AUDIO_REQ_GET_MIN                         0x82u
+#define  USBD_AUDIO_REQ_GET_MAX                         0x83u
+#define  USBD_AUDIO_REQ_GET_RES                         0x84u
+#define  USBD_AUDIO_REQ_GET_MEM                         0x85u
+#define  USBD_AUDIO_REQ_GET_STAT                        0xFFu
+
+
+/*
+*********************************************************************************************************
+*                                           TERMINAL TYPES
+*
+* Note(s) : (1) See 'USB Device Class Definition for Terminal Types, Release 1.0, March 18, 1998',
+*               section 2.1 for more details about audio terminal types.
+*********************************************************************************************************
+*/
+
+                                                                /* USB Terminal types.                                  */
+#define  USBD_AUDIO_TERMINAL_TYPE_USB_STREAMING                 0x0101u
+#define  USBD_AUDIO_TERMINAL_TYPE_USB_VENDOR                    0x01FFu
+
+                                                                /* Input Terminal types.                                */
+#define  USBD_AUDIO_TERMINAL_TYPE_IT_UNDEFINED                  0x0200u
+#define  USBD_AUDIO_TERMINAL_TYPE_MIC                           0x0201u
+#define  USBD_AUDIO_TERMINAL_TYPE_DESKTOP_MIC                   0x0202u
+#define  USBD_AUDIO_TERMINAL_TYPE_PERSONAL_MIC                  0x0203u
+#define  USBD_AUDIO_TERMINAL_TYPE_OMNI_DIR_MIC                  0x0204u
+#define  USBD_AUDIO_TERMINAL_TYPE_MIC_ARRAY                     0x0205u
+#define  USBD_AUDIO_TERMINAL_TYPE_PROC_MIC_ARRAY                0x0206u
+
+                                                                /* Output Terminal types.                               */
+#define  USBD_AUDIO_TERMINAL_TYPE_OT_UNDEFINED                  0x0300u
+#define  USBD_AUDIO_TERMINAL_TYPE_SPEAKER                       0x0301u
+#define  USBD_AUDIO_TERMINAL_TYPE_HEADPHONES                    0x0302u
+#define  USBD_AUDIO_TERMINAL_TYPE_HEAD_MOUNTED                  0x0303u
+#define  USBD_AUDIO_TERMINAL_TYPE_DESKTOP_SPEAKER               0x0304u
+#define  USBD_AUDIO_TERMINAL_TYPE_ROOM_SPEAKER                  0x0305u
+#define  USBD_AUDIO_TERMINAL_TYPE_COMM_SPEAKER                  0x0306u
+#define  USBD_AUDIO_TERMINAL_TYPE_LOW_FREQ_SPEAKER              0x0307u
+
+                                                                /* Bi-directional Terminal types.                       */
+#define  USBD_AUDIO_TERMINAL_TYPE_BI_DIR_UNDEFINED              0x0400u
+#define  USBD_AUDIO_TERMINAL_TYPE_HANDSET                       0x0401u
+#define  USBD_AUDIO_TERMINAL_TYPE_HEADSET                       0x0402u
+#define  USBD_AUDIO_TERMINAL_TYPE_SPEAKERPHONE                  0x0403u
+#define  USBD_AUDIO_TERMINAL_TYPE_ECHO_SUP_SPEAKERPHONE         0x0404u
+#define  USBD_AUDIO_TERMINAL_TYPE_ECHO_CANCEL_SPEAKERPHONE      0x0405u
+
+                                                                /* Telephony Terminal types.                            */
+#define  USBD_AUDIO_TERMINAL_TYPE_PHONELINE                     0x0501u
+#define  USBD_AUDIO_TERMINAL_TYPE_TEL                           0x0502u
+#define  USBD_AUDIO_TERMINAL_TYPE_DOWN_LINE_PHONE               0x0503u
+
+                                                                /* External Terminal types.                             */
+#define  USBD_AUDIO_TERMINAL_TYPE_ANALOG_CONNECTOR              0x0601u
+#define  USBD_AUDIO_TERMINAL_TYPE_DIGITAL_IF                    0x0602u
+#define  USBD_AUDIO_TERMINAL_TYPE_LINE_CONNECTOR                0x0603u
+#define  USBD_AUDIO_TERMINAL_TYPE_LEGACY_CONNECTOR              0x0604u
+#define  USBD_AUDIO_TERMINAL_TYPE_SPDIF_IF                      0x0605u
+#define  USBD_AUDIO_TERMINAL_TYPE_1394_DA_STREAM                0x0606u
+#define  USBD_AUDIO_TERMINAL_TYPE_1394_DV_STREAM                0x0607u
+
+                                                                /* Embedded Function Terminal types.                    */
+#define  USBD_AUDIO_TERMINAL_TYPE_LOW_CALIBRATION_NOISE_SRC     0x0701u
+#define  USBD_AUDIO_TERMINAL_TYPE_EQUALIZATION_NOISE            0x0702u
+#define  USBD_AUDIO_TERMINAL_TYPE_CD_PLAYER                     0x0703u
+#define  USBD_AUDIO_TERMINAL_TYPE_DAT                           0x0704u
+#define  USBD_AUDIO_TERMINAL_TYPE_DCC                           0x0705u
+#define  USBD_AUDIO_TERMINAL_TYPE_MINIDISK                      0x0706u
+#define  USBD_AUDIO_TERMINAL_TYPE_ANALOG_TAPE                   0x0707u
+#define  USBD_AUDIO_TERMINAL_TYPE_PHONOGRAPH                    0x0708u
+#define  USBD_AUDIO_TERMINAL_TYPE_VCR                           0x0709u
+#define  USBD_AUDIO_TERMINAL_TYPE_VIDEO_DISC                    0x070Au
+#define  USBD_AUDIO_TERMINAL_TYPE_DVD                           0x070Bu
+#define  USBD_AUDIO_TERMINAL_TYPE_TC_TUNER                      0x070Cu
+#define  USBD_AUDIO_TERMINAL_TYPE_SATELLITE_RECEIVER            0x070Du
+#define  USBD_AUDIO_TERMINAL_TYPE_CABLE_TUNER                   0x070Eu
+#define  USBD_AUDIO_TERMINAL_TYPE_DSS                           0x070Fu
+#define  USBD_AUDIO_TERMINAL_TYPE_RADIO_RECEIVER                0x0710u
+#define  USBD_AUDIO_TERMINAL_TYPE_RADIO_TRANSMITTER             0x0711u
+#define  USBD_AUDIO_TERMINAL_TYPE_MULTITRACK_RECORDER           0x0712u
+#define  USBD_AUDIO_TERMINAL_TYPE_SYNTHESIZER                   0x0713u
+
+                                                                /* General terminal type define.                        */
+#define  USBD_AUDIO_INVALID_ID                                  0u
+
+#define  USBD_AUDIO_TERMINAL_LINK_MAX_NBR                       DEF_INT_08U_MAX_VAL
+#define  USBD_AUDIO_TERMINAL_LINK_NONE                          0u
+
+
+/*
+*********************************************************************************************************
+*                                       LOG CH SPACIAL LOCATION
+
+* Note(s) : (1) See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               section 3.7.2.3 for more details about logical channel spacial locations.
+*********************************************************************************************************
+*/
+
+#define  USBD_AUDIO_SPATIAL_LOCATION_LEFT_FRONT                 DEF_BIT_00
+#define  USBD_AUDIO_SPATIAL_LOCATION_RIGHT_FRONT                DEF_BIT_01
+#define  USBD_AUDIO_SPATIAL_LOCATION_CENTER_FRONT               DEF_BIT_02
+#define  USBD_AUDIO_SPATIAL_LOCATION_LFE                        DEF_BIT_03
+#define  USBD_AUDIO_SPATIAL_LOCATION_LEFT_SURROUND              DEF_BIT_04
+#define  USBD_AUDIO_SPATIAL_LOCATION_RIGHT_SURROUND             DEF_BIT_05
+#define  USBD_AUDIO_SPATIAL_LOCATION_LEFT_CENTER                DEF_BIT_06
+#define  USBD_AUDIO_SPATIAL_LOCATION_RIGHT_CENTER               DEF_BIT_07
+#define  USBD_AUDIO_SPATIAL_LOCATION_SURROUND                   DEF_BIT_08
+#define  USBD_AUDIO_SPATIAL_LOCATION_SIDE_LEFT                  DEF_BIT_09
+#define  USBD_AUDIO_SPATIAL_LOCATION_SIDE_RIGHT                 DEF_BIT_10
+#define  USBD_AUDIO_SPATIAL_LOCATION_TOP                        DEF_BIT_11
+
+                                                                /* General spatial location define.                     */
+#define  USBD_AUDIO_LOG_CH_NBR_MAX                             10u
+#define  USBD_AUDIO_LOG_CH_CFG_MAX                             11u
+
+#define  USBD_AUDIO_MONO                                        1u
+#define  USBD_AUDIO_STEREO                                      2u
+#define  USBD_AUDIO_5_1                                         6u
+#define  USBD_AUDIO_7_1                                         8u
+
+#define  USBD_AUDIO_LOG_CH_NBR_1                                1u
+#define  USBD_AUDIO_LOG_CH_NBR_2                                2u
+#define  USBD_AUDIO_LOG_CH_NBR_3                                3u
+#define  USBD_AUDIO_LOG_CH_NBR_4                                4u
+#define  USBD_AUDIO_LOG_CH_NBR_5                                5u
+#define  USBD_AUDIO_LOG_CH_NBR_6                                6u
+#define  USBD_AUDIO_LOG_CH_NBR_7                                7u
+#define  USBD_AUDIO_LOG_CH_NBR_8                                8u
+#define  USBD_AUDIO_LOG_CH_NBR_9                                9u
+#define  USBD_AUDIO_LOG_CH_NBR_10                              10u
+
+
+/*
+*********************************************************************************************************
+*                                        AUDIO DATA FMT TYPE I
+*
+* Note(s) : (1) See 'USB Device Class Definition for Audio Data Formats, Release 1.0, March 18, 1998',
+*               section 2.2.6 and appendix A.1.1 for more details about Type I Audio Data Formats.
+*********************************************************************************************************
+*/
+                                                                /* Data format type.                                    */
+#define  USBD_AUDIO_DATA_FMT_TYPE_I_UNDEFINED                   0u
+#define  USBD_AUDIO_DATA_FMT_TYPE_I_PCM                         1u
+#define  USBD_AUDIO_DATA_FMT_TYPE_I_PCM8                        2u
+#define  USBD_AUDIO_DATA_FMT_TYPE_I_IEEE_FLOAT                  3u
+#define  USBD_AUDIO_DATA_FMT_TYPE_I_ALAW                        4u
+#define  USBD_AUDIO_DATA_FMT_TYPE_I_MULAW                       5u
+
+                                                                /* Type I fmt characteristics.                          */
+#define  USBD_AUDIO_FMT_TYPE_I_SAM_FREQ_CONTINUOUS              0u
+#define  USBD_AUDIO_FMT_TYPE_I_SUBFRAME_SIZE_1                  1u
+#define  USBD_AUDIO_FMT_TYPE_I_SUBFRAME_SIZE_2                  2u
+#define  USBD_AUDIO_FMT_TYPE_I_SUBFRAME_SIZE_3                  3u
+#define  USBD_AUDIO_FMT_TYPE_I_SUBFRAME_SIZE_4                  4u
+#define  USBD_AUDIO_FMT_TYPE_I_BIT_RESOLUTION_8                 8u
+#define  USBD_AUDIO_FMT_TYPE_I_BIT_RESOLUTION_16               16u
+#define  USBD_AUDIO_FMT_TYPE_I_BIT_RESOLUTION_24               24u
+#define  USBD_AUDIO_FMT_TYPE_I_BIT_RESOLUTION_32               32u
+#define  USBD_AUDIO_FMT_TYPE_I_SAMFREQ_8KHZ                  8000u
+#define  USBD_AUDIO_FMT_TYPE_I_SAMFREQ_11KHZ                11025u
+#define  USBD_AUDIO_FMT_TYPE_I_SAMFREQ_16KHZ                16000u
+#define  USBD_AUDIO_FMT_TYPE_I_SAMFREQ_22KHZ                22050u
+#define  USBD_AUDIO_FMT_TYPE_I_SAMFREQ_32KHZ                32000u
+#define  USBD_AUDIO_FMT_TYPE_I_SAMFREQ_44_1KHZ              44100u
+#define  USBD_AUDIO_FMT_TYPE_I_SAMFREQ_48KHZ                48000u
+#define  USBD_AUDIO_FMT_TYPE_I_SAMFREQ_88_2KHZ              88200u
+#define  USBD_AUDIO_FMT_TYPE_I_SAMFREQ_96KHZ                96000u
+#define  USBD_AUDIO_FMT_TYPE_I_SAMFREQ_MAX                      USBD_AUDIO_FMT_TYPE_I_SAMFREQ_96KHZ
+
+
+/*
+*********************************************************************************************************
+*                                     TERMINAL & UNIT'S CONTROLS
+*
+* Note(s) : (1) See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               section 5.2.2.1.3.1 for more details about Copy Protect Control used by Terminals.
+*
+*           (2) See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               Table 4-7 for more details about Feature Unit Controls.
+*
+*               (a) See See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*                   Table 5-18 for more details about volume value.
+*
+*           (3) See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               section 4.3.2.3 for more details about Mixer Unit Controls.
+*********************************************************************************************************
+*/
+                                                                /* Terminal Copy Pro Ctrl (see Note #1).                */
+#define  USBD_AUDIO_CPL_NONE                                  255u
+#define  USBD_AUDIO_CPL0                                        0u
+#define  USBD_AUDIO_CPL1                                        1u
+#define  USBD_AUDIO_CPL2                                        2u
+
+                                                                /* Feature Unit Controls bitmap (see Note #2).          */
+#define  USBD_AUDIO_FU_CTRL_NONE                                DEF_BIT_NONE
+#define  USBD_AUDIO_FU_CTRL_MUTE                                DEF_BIT_00
+#define  USBD_AUDIO_FU_CTRL_VOL                                 DEF_BIT_01
+#define  USBD_AUDIO_FU_CTRL_BASS                                DEF_BIT_02
+#define  USBD_AUDIO_FU_CTRL_MID                                 DEF_BIT_03
+#define  USBD_AUDIO_FU_CTRL_TREBLE                              DEF_BIT_04
+#define  USBD_AUDIO_FU_CTRL_GRAPHIC_EQUALIZER                   DEF_BIT_05
+#define  USBD_AUDIO_FU_CTRL_AUTO_GAIN                           DEF_BIT_06
+#define  USBD_AUDIO_FU_CTRL_DELAY                               DEF_BIT_07
+#define  USBD_AUDIO_FU_CTRL_BASS_BOOST                          DEF_BIT_08
+#define  USBD_AUDIO_FU_CTRL_LOUDNESS                            DEF_BIT_09
+                                                                /* See Note #2a.                                        */
+#define  USBD_AUDIO_FU_CTRL_VOL_SILENCE                    0x8000u
+
+                                                                /* Graphic Equalizer frequency bands.                   */
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_14                DEF_BIT_00
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_15                DEF_BIT_01
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_16                DEF_BIT_02
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_17                DEF_BIT_03
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_18                DEF_BIT_04
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_19                DEF_BIT_05
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_20                DEF_BIT_06
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_21                DEF_BIT_07
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_22                DEF_BIT_08
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_23                DEF_BIT_09
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_24                DEF_BIT_10
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_25                DEF_BIT_11
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_26                DEF_BIT_12
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_27                DEF_BIT_13
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_28                DEF_BIT_14
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_29                DEF_BIT_15
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_30                DEF_BIT_16
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_31                DEF_BIT_17
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_32                DEF_BIT_18
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_33                DEF_BIT_19
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_34                DEF_BIT_20
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_35                DEF_BIT_21
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_36                DEF_BIT_22
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_37                DEF_BIT_23
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_38                DEF_BIT_24
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_39                DEF_BIT_25
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_40                DEF_BIT_26
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_41                DEF_BIT_27
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_42                DEF_BIT_28
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_43                DEF_BIT_29
+#define  USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_ALL     0x3FFFFFFFu
+#define  USBD_AUDIO_FU_OCTAVE_EQUALIZER_BANDS                  (USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_15 |  \
+                                                                USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_18 |  \
+                                                                USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_21 |  \
+                                                                USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_24 |  \
+                                                                USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_27 |  \
+                                                                USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_30 |  \
+                                                                USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_33 |  \
+                                                                USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_36 |  \
+                                                                USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_39 |  \
+                                                                USBD_AUDIO_FU_GRAPHIC_EQUALIZER_BAND_42)
+
+                                                                /* Mixer Unit Controls (see Note #3).                   */
+#define  USBD_AUDIO_MU_CTRL_NONE                                DEF_BIT_NONE
+
+
+/*
+*********************************************************************************************************
+*                                       ISOC AUDIO DATA EP INFO
+*
+* Note(s) : (1) See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               Table 4-21 for more details about Endpoint Controls.
+*********************************************************************************************************
+*/
+
+                                                                /* EP ctrl (see Note #1).                               */
+#define  USBD_AUDIO_AS_EP_CTRL_NONE                             DEF_BIT_NONE
+#define  USBD_AUDIO_AS_EP_CTRL_SAMPLING_FREQ                    DEF_BIT_00
+#define  USBD_AUDIO_AS_EP_CTRL_PITCH                            DEF_BIT_01
+#define  USBD_AUDIO_AS_EP_CTRL_MAX_PKT_ONLY                     DEF_BIT_07
+
+                                                                /* bLockDelayUnits (see Note #1).                       */
+#define  USBD_AUDIO_AS_EP_LOCK_DLY_UND                          DEF_BIT_NONE
+#define  USBD_AUDIO_AS_EP_LOCK_DLY_MS                           DEF_BIT_01
+#define  USBD_AUDIO_AS_EP_LOCK_DLY_PCM                          DEF_BIT_02
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       AUDIO STREAMING HANDLE
+*
+* Note(s) : (1) The audio handle is a 16-bit wide value that contains the AudioStreaming interface index:
+*
+*                           MSB                                                               LSB
+*               ----------------------------------------------------------------------------------
+*               | POSITION | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
+*               ----------------------------------------------------------------------------------
+*               | USAGE    |           Validate Count            |          AS IF Index          |
+*               ----------------------------------------------------------------------------------
+*********************************************************************************************************
+*/
+
+typedef  void       *USBD_AUDIO_AS_IF_HANDLE;                   /* Handle for Audio Transport & app.                    */
+
+typedef  CPU_INT16U  USBD_AUDIO_AS_HANDLE;                      /* Handle for Audio Transport/Processing & codec drv... */
+                                                                /* ...see Note #1.                                      */
+
+
+/*
+*********************************************************************************************************
+*                                        FORWARD DECLARATIONS
+*********************************************************************************************************
+*/
+
+typedef  struct  usbd_audio_drv  USBD_AUDIO_DRV;
+
+
+/*
+*********************************************************************************************************
+*                                        AUDIO EVENT CALLBACKS
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_audio_event_fncts {
+
+    void  (*Conn)   (CPU_INT08U            dev_nbr,             /* Notify app that cfg is active.                       */
+                     CPU_INT08U            cfg_nbr,
+                     CPU_INT08U            terminal_id,
+                     USBD_AUDIO_AS_HANDLE  as_handle);
+
+    void  (*Disconn)(CPU_INT08U            dev_nbr,             /* Notify class that cfg is not active.                 */
+                     CPU_INT08U            cfg_nbr,
+                     CPU_INT08U            terminal_id,
+                     USBD_AUDIO_AS_HANDLE  as_handle);
+} USBD_AUDIO_EVENT_FNCTS;
+
+
+/*
+*********************************************************************************************************
+*                                          AUDIO STATISTICS
+*********************************************************************************************************
+*/
+
+#if (USBD_AUDIO_CFG_STAT_EN == DEF_ENABLED)
+typedef  struct  usbd_audio_stat {
+    CPU_INT32U  AudioProc_Playback_NbrIsocRxSubmitSuccess;      /* Nbr of isoc OUT xfer submitted w/ success to core.   */
+    CPU_INT32U  AudioProc_Playback_NbrIsocRxSubmitErr;          /* Nbr of isoc OUT xfer submitted w/ err.               */
+    CPU_INT32U  AudioProc_Playback_NbrIsocRxSubmitPlaybackTask; /* Nbr of isoc OUT xfer submitted by playback task.     */
+    CPU_INT32U  AudioProc_Playback_NbrIsocRxSubmitCoreTask;     /* Nbr of isoc OUT xfer submitted by core task.         */
+    CPU_INT32U  AudioProc_Playback_NbrIsocRxCmpl;               /* Nbr of isoc OUT xfer completed w/ or w/o err.        */
+    CPU_INT32U  AudioProc_Playback_NbrIsocRxCmplErrOther;       /* Nbr of isoc OUT xfer completed with error.           */
+    CPU_INT32U  AudioProc_Playback_NbrIsocRxCmplErrAbort;       /* Nbr of isoc OUT xfer completed with err EP_ABORT.    */
+    CPU_INT32U  AudioProc_Playback_NbrIsocRxBufNotAvail;        /* Nbr of times no buf avail.                           */
+    CPU_INT32U  AudioProc_Playback_NbrReqPostPlaybackTask;      /* Nbr of req submitted to playback task.               */
+    CPU_INT32U  AudioProc_Playback_NbrReqPendPlaybackTask;      /* Nbr of req gotten by playback task.                  */
+    CPU_INT32U  AudioProc_Playback_NbrIsocRxOngoingCnt;         /* Nbr of ongoing isoc OUT xfers.                       */
+#if (USBD_AUDIO_CFG_PLAYBACK_FEEDBACK_EN == DEF_ENABLED)
+    CPU_INT32U  AudioProc_Playback_SynchNbrBufGet;              /* Nbr of synch buf gotten from pool.                   */
+    CPU_INT32U  AudioProc_Playback_SynchNbrBufFree;             /* Nbr of synch buf returned to pool.                   */
+    CPU_INT32U  AudioProc_Playback_SynchNbrBufNotAvail;         /* Nbr of synch buf not avail.                          */
+    CPU_INT32U  AudioProc_Playback_SynchNbrSafeZone;            /* Nbr of normal situations without corr.               */
+    CPU_INT32U  AudioProc_Playback_SynchNbrOverrun;             /* Nbr of overrun situations requiring corr.            */
+    CPU_INT32U  AudioProc_Playback_SynchNbrLightOverrun;        /* Nbr of light overrun situations.                     */
+    CPU_INT32U  AudioProc_Playback_SynchNbrHeavyOverrun;        /* Nbr of heavy overrun situations.                     */
+    CPU_INT32U  AudioProc_Playback_SynchNbrUnderrun;            /* Nbr of underrun situations requiring corr.           */
+    CPU_INT32U  AudioProc_Playback_SynchNbrLightUnderrun;       /* Nbr of light underrun situations.                    */
+    CPU_INT32U  AudioProc_Playback_SynchNbrHeavyUnderrun;       /* Nbr of heavy underrun situations.                    */
+    CPU_INT32U  AudioProc_Playback_SynchNbrRefreshPeriodReached;/* Nbr of times refresh period is reached.              */
+    CPU_INT32U  AudioProc_Playback_SynchNbrIsocTxSubmitted;     /* Nbr of isoc IN xfer submitted to core.               */
+    CPU_INT32U  AudioProc_Playback_SynchNbrIsocTxCmpl;          /* Nbr of isoc IN xfer completed.                       */
+#endif
+
+    CPU_INT32U  AudioProc_Record_NbrIsocTxSubmitSuccess;        /* Nbr of isoc IN xfer submitted w/ success to core.    */
+    CPU_INT32U  AudioProc_Record_NbrIsocTxSubmitErr;            /* Nbr of isoc IN xfer submitted w/ err.                */
+    CPU_INT32U  AudioProc_Record_NbrIsocTxSubmitRecordTask;     /* Nbr of isoc IN xfer submitted by record task.        */
+    CPU_INT32U  AudioProc_Record_NbrIsocTxSubmitCoreTask;       /* Nbr of isoc IN xfer submitted by core task.          */
+    CPU_INT32U  AudioProc_Record_NbrIsocTxCmpl;                 /* Nbr of isoc IN xfer completed w/ or w/o err.         */
+    CPU_INT32U  AudioProc_Record_NbrIsocTxCmplErrOther;         /* Nbr of isoc IN xfer completed with err.              */
+    CPU_INT32U  AudioProc_Record_NbrIsocTxCmplErrAbort;         /* Nbr of isoc IN xfer completed with err EP_ABORT.     */
+    CPU_INT32U  AudioProc_Record_NbrIsocTxBufNotAvail;          /* Nbr of times no buf avail.                           */
+    CPU_INT32U  AudioProc_Record_NbrReqPostRecordTask;          /* Nbr of ready buf signaled to record task.            */
+    CPU_INT32U  AudioProc_Record_NbrReqPendRecordTask;          /* Nbr of ready buf signals received by record task.    */
+
+    CPU_INT32U  AudioProc_RingBufQ_NbrProducerStartIxCatchUp;   /* Nbr of catch of prev and/or nxt ix by ProducerStart. */
+    CPU_INT32U  AudioProc_RingBufQ_NbrProducerEndIxCatchUp;     /* Nbr of catch of prev and/or nxt ix by ProducerEnd.   */
+    CPU_INT32U  AudioProc_RingBufQ_NbrConsumerStartIxCatchUp;   /* Nbr of catch of prev and/or nxt ix by ConsumerStart. */
+    CPU_INT32U  AudioProc_RingBufQ_NbrConsumerEndIxCatchUp;     /* Nbr of catch of prev and/or nxt ix by ConsumerEnd.   */
+    CPU_INT32U  AudioProc_RingBufQ_NbrProducerStartIxWrapAround;/* Nbr of wrap-around for ix ProducerStart.             */
+    CPU_INT32U  AudioProc_RingBufQ_NbrProducerEndIxWrapAround;  /* Nbr of wrap-around for ix ProducerEnd.               */
+    CPU_INT32U  AudioProc_RingBufQ_NbrConsumerStartIxWrapAround;/* Nbr of wrap-around for ix ConsumerStart.             */
+    CPU_INT32U  AudioProc_RingBufQ_NbrConsumerEndIxWrapAround;  /* Nbr of wrap-around for ix ConsumerEnd.               */
+    CPU_INT32U  AudioProc_RingBufQ_NbrBufDescInUse;             /* Nbr of buf desc in use by playback or record.        */
+    CPU_INT32U  AudioProc_RingBufQ_NbrErr;                      /* Nbr of err while getting buf from ring buf queue.    */
+
+    CPU_INT32U  AudioProc_NbrStreamOpen;                        /* Nbr of stream openings.                              */
+    CPU_INT32U  AudioProc_NbrStreamClosed;                      /* Nbr of stream closings.                              */
+#if (((USBD_AUDIO_CFG_PLAYBACK_CORR_EN == DEF_ENABLED)  && \
+      (USBD_AUDIO_CFG_PLAYBACK_EN      == DEF_ENABLED)) || \
+     ((USBD_AUDIO_CFG_RECORD_CORR_EN   == DEF_ENABLED)  && \
+      (USBD_AUDIO_CFG_RECORD_EN        == DEF_ENABLED)))
+    CPU_INT32U  AudioProc_CorrNbrUnderrun;                      /* Nbr of underrun situations requiring stream corr.    */
+    CPU_INT32U  AudioProc_CorrNbrOverrun;                       /* Nbr of overrun situations requiring stream corr.     */
+    CPU_INT32U  AudioProc_CorrNbrSafeZone;                      /* Nbr of normal situations without stream corr.        */
+#endif
+
+    CPU_INT32U  AudioDrv_Playback_DMA_NbrXferCmpl;              /* Nbr of playback buf consumed by codec drv.           */
+    CPU_INT32U  AudioDrv_Playback_DMA_NbrSilenceBuf;            /* Nbr of silence buf consumed by codec drv.            */
+    CPU_INT32U  AudioDrv_Record_DMA_NbrXferCmpl;                /* Nbr of record buf produced by codec drv.             */
+    CPU_INT32U  AudioDrv_Record_DMA_NbrDummyBuf;                /* Nbr of dummy buf used by codec drv because no...     */
+                                                                /* ...empty record buf avail.                           */
+} USBD_AUDIO_STAT;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            TERMINAL CFG
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_audio_it_cfg {                     /* Input Terminal.                                      */
+    CPU_INT16U    TerminalType;
+    CPU_INT08U    LogChNbr;                                     /* Nbr of log output ch in Terminal Output.             */
+    CPU_INT16U    LogChCfg;                                     /* Spatial location of log ch.                          */
+    CPU_BOOLEAN   CopyProtEn;                                   /* Dis or En Copy Protection.                           */
+    CPU_INT08U    CopyProtLevel;                                /* Copy Protection Level.                               */
+    CPU_CHAR     *StrPtr;                                       /* Str describing IT. Obtained by Str Desc.             */
+} USBD_AUDIO_IT_CFG;
+
+
+
+typedef  const  struct  usbd_audio_ot_cfg {                     /* Output Terminal.                                     */
+    CPU_INT16U    TerminalType;
+    CPU_BOOLEAN   CopyProtEn;                                   /* Copy Protect Control enable.                         */
+    CPU_CHAR     *StrPtr;                                       /* Str describing OT. Obtained by Str Desc.             */
+} USBD_AUDIO_OT_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                              UNIT CFG
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_audio_fu_cfg {                     /* Feature Unit.                                        */
+    CPU_INT08U   LogChNbr;                                      /* Nbr of log ch.                                       */
+    CPU_INT16U  *LogChCtrlPtr;                                  /* Ptr to Feature Unit Controls tbl.                    */
+    CPU_CHAR    *StrPtr;                                        /* Str describing FU. Obtained by Str Desc.             */
+} USBD_AUDIO_FU_CFG;
+
+typedef  const  struct  usbd_audio_mu_cfg {                     /* Mixer Unit.                                          */
+    CPU_INT08U   NbrInPins;                                     /* Nbr of Input Pins.                                   */
+    CPU_INT08U   LogInChNbr;                                    /* Nbr of log input ch.                                 */
+    CPU_INT08U   LogOutChNbr;                                   /* Nbr of log output ch.                                */
+    CPU_INT16U   LogOutChCfg;                                   /* Spatial location of log output ch.                   */
+    CPU_CHAR    *StrPtr;                                        /* Str describing MU. Obtained by Str Desc.             */
+} USBD_AUDIO_MU_CFG;
+
+typedef  const  struct  usbd_audio_su_cfg {                     /* Selector Unit.                                       */
+    CPU_INT08U   NbrInPins;                                     /* Nbr of Input Pins.                                   */
+    CPU_CHAR    *StrPtr;                                        /* Str describing SU. Obtained by Str Desc.             */
+} USBD_AUDIO_SU_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                         AUDIO STREAMING CFG
+*
+* Note(s) : (1) This structure contains relevant fields for Type I data format only. Type II and III are
+*               not supported.
+*
+*           (2) The Delay holds a value that is a measure for the delay that is introduced in the audio
+*               data stream due to internal processing of the signal within the audio function. The value
+*               of the delay is expressed in number of frames (i.e. in ms).
+*               See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               section 4.5.2 for more details about class-specific AudioStreaming descriptor.
+*
+*           (3) Type I format type descriptor reports the sampling frequency capabilities of the
+*               isochronous data endpoint with the field 'bSamFreqType'. The possible values are:
+*
+*               (a) USBD_AUDIO_FMT_TYPE_I_SAM_FREQ_CONTINUOUS   Continuous sampling frequency
+*
+*               (b) 1..255                                      number of discrete sampling frequencies
+*                                                               supported by the isochronous data endpoint.
+*
+*           (4) These fields relate to 'bLockDelayUnits' and 'wLockDelay' fields of Class-Specific AS
+*               Isochronous Audio Data Endpoint Descriptor. 'bLockDelayUnits' and 'wLockDelay' indicate
+*               to the Host how long it takes for the clock recovery circuitry of this endpoint to lock
+*               and reliably produce or consume the audio data stream. Only applicable for synchronous
+*               and adaptive endpoints.
+*               See 'USB Device Class Definition for Audio Devices, Release 1.0, March 18, 1998',
+*               section 4.6.1.2 for more details about class-specific endpoint descriptor.
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_audio_as_alt_cfg {                 /* AudioStreaming alt IF (see Note #1).                 */
+                                                                /* AS IF RELATED:                                       */
+    CPU_INT08U               Dly;                               /* See Note #2.                                         */
+    CPU_INT16U               FmtTag;                            /* Audio data fmt used to comm with this IF.            */
+                                                                /* TYPE I FMT RELATED:                                  */
+    CPU_INT08U               NbrCh;                             /* Nbr of physical ch in the audio data stream.         */
+    CPU_INT08U               SubframeSize;                      /* Nbr of bytes occupied by one audio subframe.         */
+    CPU_INT08U               BitRes;                            /* Effectively used bits in an audio subframe.          */
+    CPU_INT08U               NbrSamplingFreq;                   /* Nbr of sampling frequencies (see Note #3).           */
+    CPU_INT32U               LowerSamplingFreq;                 /* Lower bound in Hz of the sampling freq range.        */
+    CPU_INT32U               UpperSamplingFreq;                 /* Upper bound in Hz of the sampling freq range.        */
+    CPU_INT32U              *SamplingFreqTblPtr;                /* Tbl of discrete sampling frequencies.                */
+                                                                /* AS EP RELATED:                                       */
+    CPU_BOOLEAN              EP_DirIn;                          /* Flag indicating direction IN or OUT.                 */
+    CPU_INT08U               EP_SynchType;                      /* Synchronization type supported by Isoc EP.           */
+                                                                /* CLASS SPECIFIC EP RELATED:                           */
+    CPU_INT08U               EP_Attrib;                         /* Class specific controls supported by Isoc EP.        */
+    CPU_INT08U               EP_LockDlyUnits;                   /* See Note #4.                                         */
+    CPU_INT16U               EP_LockDly;                        /* See Note #4.                                         */
+                                                                /* SYNCH EP RELATED:                                    */
+    CPU_INT08U               EP_SynchRefresh;                   /* Refresh Rate                                         */
+} USBD_AUDIO_AS_ALT_CFG;
+
+typedef  const  struct  usbd_audio_as_if_cfg {                  /* AudioStreaming IF.                                   */
+    USBD_AUDIO_AS_ALT_CFG  **AS_CfgPtrTbl;                      /* Tbl of ptr to AS IF alternate settings Config.       */
+    CPU_INT08U               AS_CfgAltSettingNbr;               /* Nbr of alternate settings for given AS IF.           */
+} USBD_AUDIO_AS_IF_CFG;
+
+typedef  const  struct  usbd_audio_stream_cfg {                 /* General audio stream cfg.                            */
+    CPU_INT16U               MaxBufNbr;                         /* Max buf nbr.                                         */
+    CPU_INT16U               CorrPeriodMs;                      /* Period at which corr must be monitored.              */
+} USBD_AUDIO_STREAM_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                    PLAYBACK CORRECTION CALLBACK
+*
+* Note(s) : (1) Application callback used for custom playback correction algorithm provided by user
+*               if available.
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT16U  (*USBD_AUDIO_PLAYBACK_CORR_FNCT)(USBD_AUDIO_AS_ALT_CFG  *p_as_alt_cfg,
+                                                      CPU_BOOLEAN             is_underrun,
+                                                      void                   *p_buf,
+                                                      CPU_INT16U              buf_len_cur,
+                                                      CPU_INT16U              buf_len_total,
+                                                      USBD_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                         STATISTICS CALLBACK
+*
+* Note(s) : (1) Statistics callback called upon device connection. It allows the user to get audio
+*               statistics for a given AudioStreaming.
+*********************************************************************************************************
+*/
+
+#if (USBD_AUDIO_CFG_STAT_EN == DEF_ENABLED)
+typedef  void  (*USBD_AUDIO_AS_IF_STAT_FNCT)(CPU_INT08U        class_nbr,
+                                             CPU_INT08U        terminal_id,
+                                             USBD_AUDIO_STAT  *p_as_stat);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          AUDIO DRIVER APIs
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- COMMON API -------------------- */
+typedef  struct  usbd_audio_drv_common_api {
+    void         (*Init)                      (USBD_AUDIO_DRV        *p_audio_drv,
+                                               USBD_ERR              *p_err);
+} USBD_AUDIO_DRV_COMMON_API;
+
+                                                                /* -------------------- AC OT API --------------------- */
+typedef  struct  usbd_audio_drv_ac_ot_api {
+    CPU_BOOLEAN  (*OT_CopyProtSet)            (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             terminal_id,
+                                               CPU_INT08U             copy_prot_level);
+} USBD_AUDIO_DRV_AC_OT_API;
+                                                                /* -------------------- AC FU API --------------------- */
+typedef  struct  usbd_audio_drv_ac_fu_api {
+    CPU_BOOLEAN  (*FU_MuteManage)             (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_ch_nbr,
+                                               CPU_BOOLEAN            set_en,
+                                               CPU_BOOLEAN           *p_mute);
+
+    CPU_BOOLEAN  (*FU_VolManage)              (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             req,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_ch_nbr,
+                                               CPU_INT16U            *p_vol);
+
+    CPU_BOOLEAN  (*FU_BassManage)             (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             req,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_ch_nbr,
+                                               CPU_INT08U            *p_bass);
+
+    CPU_BOOLEAN  (*FU_MidManage)              (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             req,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_ch_nbr,
+                                               CPU_INT08U            *p_mid);
+
+    CPU_BOOLEAN  (*FU_TrebleManage)           (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             req,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_ch_nbr,
+                                               CPU_INT08U            *p_treble);
+
+    CPU_BOOLEAN  (*FU_GraphicEqualizerManage) (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             req,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_ch_nbr,
+                                               CPU_INT08U             nbr_bands_present,
+                                               CPU_INT32U            *p_bm_bands_present,
+                                               CPU_INT08U            *p_buf);
+
+    CPU_BOOLEAN  (*FU_AutoGainManage)         (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_ch_nbr,
+                                               CPU_BOOLEAN            set_en,
+                                               CPU_BOOLEAN           *p_auto_gain);
+
+    CPU_BOOLEAN  (*FU_DlyManage)              (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             req,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_ch_nbr,
+                                               CPU_INT16U            *p_dly);
+
+    CPU_BOOLEAN  (*FU_BassBoostManage)        (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_ch_nbr,
+                                               CPU_BOOLEAN            set_en,
+                                               CPU_BOOLEAN           *p_bass_boost);
+
+    CPU_BOOLEAN  (*FU_LoudnessManage)         (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_ch_nbr,
+                                               CPU_BOOLEAN            set_en,
+                                               CPU_BOOLEAN           *p_loudness);
+} USBD_AUDIO_DRV_AC_FU_API;
+                                                                /* -------------------- AC MU API --------------------- */
+typedef  struct  usbd_audio_drv_ac_mu_api {
+    CPU_BOOLEAN  (*MU_CtrlManage)             (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             req,
+                                               CPU_INT08U             unit_id,
+                                               CPU_INT08U             log_in_ch_nbr,
+                                               CPU_INT08U             log_out_ch_nbr,
+                                               CPU_INT16U            *p_ctrl);
+} USBD_AUDIO_DRV_AC_MU_API;
+                                                                /* -------------------- AC SU API --------------------- */
+typedef  struct  usbd_audio_drv_ac_su_api {
+    CPU_BOOLEAN  (*SU_InPinManage)            (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             unit_id,
+                                               CPU_BOOLEAN            set_en,
+                                               CPU_INT08U            *p_in_pin_nbr);
+} USBD_AUDIO_DRV_AC_SU_API;
+                                                                /* ---------------------- AS API ---------------------- */
+typedef  struct  usbd_audio_drv_as_api {
+    CPU_BOOLEAN   (*AS_SamplingFreqManage)    (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             terminal_id_link,
+                                               CPU_BOOLEAN            set_en,
+                                               CPU_INT32U            *p_sampling_freq);
+
+    CPU_BOOLEAN   (*AS_PitchManage)           (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             terminal_id_link,
+                                               CPU_BOOLEAN            set_en,
+                                               CPU_BOOLEAN           *p_pitch);
+
+    CPU_BOOLEAN   (*StreamStart)              (USBD_AUDIO_DRV        *p_audio_drv,
+                                               USBD_AUDIO_AS_HANDLE   as_handle,
+                                               CPU_INT08U             terminal_id_link);
+
+    CPU_BOOLEAN   (*StreamStop)               (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             terminal_id_link);
+
+    void          (*StreamRecordRx)           (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             terminal_id_link,
+                                               void                  *p_buf,
+                                               CPU_INT16U            *p_buf_len,
+                                               USBD_ERR              *p_err);
+
+    void          (*StreamPlaybackTx)         (USBD_AUDIO_DRV        *p_audio_drv,
+                                               CPU_INT08U             terminal_id_link,
+                                               void                  *p_buf,
+                                               CPU_INT16U             buf_len,
+                                               USBD_ERR              *p_err);
+} USBD_AUDIO_DRV_AS_API;
+
+
+/*
+*********************************************************************************************************
+*                                       AUDIO DRIVER DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  usbd_audio_drv {
+    void  *DataPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void                     USBD_Audio_Init           (       CPU_INT16U                      msg_qty,
+                                                           USBD_ERR                       *p_err);
+
+CPU_INT08U               USBD_Audio_Add            (       CPU_INT08U                      entity_cnt,
+                                                    const  USBD_AUDIO_DRV_COMMON_API      *p_audio_drv_common_api,
+                                                    const  USBD_AUDIO_EVENT_FNCTS         *p_audio_app_fnct,
+                                                           USBD_ERR                       *p_err);
+
+void                     USBD_Audio_CfgAdd         (       CPU_INT08U                      class_nbr,
+                                                           CPU_INT08U                      dev_nbr,
+                                                           CPU_INT08U                      cfg_nbr,
+                                                           USBD_ERR                       *p_err);
+
+CPU_BOOLEAN              USBD_Audio_IsConn         (       CPU_INT08U                      class_nbr);
+
+CPU_INT08U               USBD_Audio_IT_Add         (       CPU_INT08U                      class_nbr,
+                                                    const  USBD_AUDIO_IT_CFG              *p_it_cfg,
+                                                           USBD_ERR                       *p_err);
+
+CPU_INT08U               USBD_Audio_OT_Add         (       CPU_INT08U                      class_nbr,
+                                                    const  USBD_AUDIO_OT_CFG              *p_ot_cfg,
+                                                    const  USBD_AUDIO_DRV_AC_OT_API       *p_ot_api,
+                                                           USBD_ERR                       *p_err);
+
+CPU_INT08U               USBD_Audio_FU_Add         (       CPU_INT08U                      class_nbr,
+                                                    const  USBD_AUDIO_FU_CFG              *p_fu_cfg,
+                                                    const  USBD_AUDIO_DRV_AC_FU_API       *p_fu_api,
+                                                           USBD_ERR                       *p_err);
+
+#if (USBD_AUDIO_CFG_MAX_NBR_MU > 0u)
+CPU_INT08U               USBD_Audio_MU_Add         (       CPU_INT08U                      class_nbr,
+                                                    const  USBD_AUDIO_MU_CFG              *p_mu_cfg,
+                                                    const  USBD_AUDIO_DRV_AC_MU_API       *p_mu_api,
+                                                           USBD_ERR                       *p_err);
+#endif
+
+#if (USBD_AUDIO_CFG_MAX_NBR_SU > 0u)
+CPU_INT08U               USBD_Audio_SU_Add         (       CPU_INT08U                      class_nbr,
+                                                    const  USBD_AUDIO_SU_CFG              *p_su_cfg,
+                                                    const  USBD_AUDIO_DRV_AC_SU_API       *p_su_api,
+                                                           USBD_ERR                       *p_err);
+#endif
+
+void                    USBD_Audio_IT_Assoc        (       CPU_INT08U                      class_nbr,
+                                                           CPU_INT08U                      it_id,
+                                                           CPU_INT08U                      assoc_terminal_id,
+                                                           USBD_ERR                       *p_err);
+
+void                    USBD_Audio_OT_Assoc        (       CPU_INT08U                      class_nbr,
+                                                           CPU_INT08U                      ot_id,
+                                                           CPU_INT08U                      entity_id_src,
+                                                           CPU_INT08U                      assoc_terminal_id,
+                                                           USBD_ERR                       *p_err);
+
+void                    USBD_Audio_FU_Assoc        (       CPU_INT08U                      class_nbr,
+                                                           CPU_INT08U                      fu_id,
+                                                           CPU_INT08U                      src_entity_id,
+                                                           USBD_ERR                       *p_err);
+
+#if (USBD_AUDIO_CFG_MAX_NBR_MU > 0u)
+void                    USBD_Audio_MU_Assoc        (       CPU_INT08U                      class_nbr,
+                                                           CPU_INT08U                      mu_id,
+                                                           CPU_INT08U                     *p_src_entity_id,
+                                                           CPU_INT08U                      nbr_input_pins,
+                                                           USBD_ERR                       *p_err);
+#endif
+
+#if (USBD_AUDIO_CFG_MAX_NBR_SU > 0u)
+void                    USBD_Audio_SU_Assoc        (       CPU_INT08U                      class_nbr,
+                                                           CPU_INT08U                      su_id,
+                                                           CPU_INT08U                     *p_src_entity_id,
+                                                           CPU_INT08U                      nbr_input_pins,
+                                                           USBD_ERR                       *p_err);
+#endif
+
+#if (USBD_AUDIO_CFG_MAX_NBR_MU > 0u)
+void                    USBD_Audio_MU_MixingCtrlSet(       CPU_INT08U                      class_nbr,
+                                                           CPU_INT08U                      mu_id,
+                                                           CPU_INT08U                      log_in_ch_nbr,
+                                                           CPU_INT08U                      log_out_ch_nbr,
+                                                           USBD_ERR                       *p_err);
+#endif
+
+#if (USBD_AUDIO_CFG_PLAYBACK_EN == DEF_ENABLED) || \
+    (USBD_AUDIO_CFG_RECORD_EN   == DEF_ENABLED)
+USBD_AUDIO_AS_IF_HANDLE  USBD_Audio_AS_IF_Cfg      (const  USBD_AUDIO_STREAM_CFG          *p_stream_cfg,
+                                                    const  USBD_AUDIO_AS_IF_CFG           *p_as_if_cfg,
+                                                    const  USBD_AUDIO_DRV_AS_API          *p_as_api,
+                                                           MEM_SEG                        *p_seg,
+                                                           CPU_INT08U                      terminal_ID,
+                                                           USBD_AUDIO_PLAYBACK_CORR_FNCT   corr_callback,
+                                                           USBD_ERR                       *p_err);
+
+void                     USBD_Audio_AS_IF_Add      (       CPU_INT08U                      class_nbr,
+                                                           CPU_INT08U                      cfg_nbr,
+                                                           USBD_AUDIO_AS_IF_HANDLE         as_if_handle,
+                                                    const  USBD_AUDIO_AS_IF_CFG           *p_as_if_cfg,
+                                                    const  CPU_CHAR                       *p_as_cfg_name,
+                                                           USBD_ERR                       *p_err);
+#endif
+
+#if (USBD_AUDIO_CFG_STAT_EN == DEF_ENABLED)
+USBD_AUDIO_STAT  *USBD_Audio_AS_IF_StatGet         (       USBD_AUDIO_AS_HANDLE            as_handle);
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_AUDIO_CFG_PLAYBACK_EN
+#error  "USBD_AUDIO_CFG_PLAYBACK_EN not #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#if    ((USBD_AUDIO_CFG_PLAYBACK_EN != DEF_ENABLED) && \
+        (USBD_AUDIO_CFG_PLAYBACK_EN != DEF_DISABLED))
+#error  "USBD_AUDIO_CFG_PLAYBACK_EN illegally #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_RECORD_EN
+#error  "USBD_AUDIO_CFG_RECORD_EN not #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#if    ((USBD_AUDIO_CFG_RECORD_EN != DEF_ENABLED) && \
+        (USBD_AUDIO_CFG_RECORD_EN != DEF_DISABLED))
+#error  "USBD_AUDIO_CFG_RECORD_EN illegally #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#if    (((USBD_AUDIO_CFG_PLAYBACK_EN == DEF_ENABLED) || \
+         (USBD_AUDIO_CFG_RECORD_EN   == DEF_ENABLED)) && \
+         (USBD_CFG_EP_ISOC_EN        == DEF_DISABLED))
+#error  "USBD_CFG_EP_ISOC_EN illegally #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_MAX_NBR_AIC
+#error  "USBD_AUDIO_CFG_MAX_NBR_AIC not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_AUDIO_CFG_MAX_NBR_AIC < 1u)
+#error  "USBD_AUDIO_CFG_MAX_NBR_AIC illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_MAX_NBR_CFG
+#error  "USBD_AUDIO_CFG_MAX_NBR_CFG not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_AUDIO_CFG_MAX_NBR_CFG < 1u)
+#error  "USBD_AUDIO_CFG_MAX_NBR_CFG illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_MAX_NBR_AS_IF_PLAYBACK
+#error  "USBD_AUDIO_CFG_MAX_NBR_AS_IF_PLAYBACK not #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+#if     (USBD_AUDIO_CFG_MAX_NBR_AS_IF_PLAYBACK < 0u)
+#error  "USBD_AUDIO_CFG_MAX_NBR_AS_IF_PLAYBACK illegally #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_MAX_NBR_AS_IF_RECORD
+#error  "USBD_AUDIO_CFG_MAX_NBR_AS_IF_RECORD not #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+#if     (USBD_AUDIO_CFG_MAX_NBR_AS_IF_RECORD < 0u)
+#error  "USBD_AUDIO_CFG_MAX_NBR_AS_IF_RECORD illegally #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_MAX_NBR_IF_ALT
+#error  "USBD_AUDIO_CFG_MAX_NBR_IF_ALT not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_AUDIO_CFG_MAX_NBR_IF_ALT < 1u)
+#error  "USBD_AUDIO_CFG_MAX_NBR_IF_ALT illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_MAX_NBR_IT
+#error  "USBD_AUDIO_CFG_MAX_NBR_IT not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_AUDIO_CFG_MAX_NBR_IT < 1u)
+#error  "USBD_AUDIO_CFG_MAX_NBR_IT illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_MAX_NBR_OT
+#error  "USBD_AUDIO_CFG_MAX_NBR_OT not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_AUDIO_CFG_MAX_NBR_OT < 1u)
+#error  "USBD_AUDIO_CFG_MAX_NBR_OT illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_MAX_NBR_FU
+#error  "USBD_AUDIO_CFG_MAX_NBR_FU not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_AUDIO_CFG_MAX_NBR_FU < 1u)
+#error  "USBD_AUDIO_CFG_MAX_NBR_FU illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_FU_MAX_CTRL
+#error  "USBD_AUDIO_CFG_FU_MAX_CTRL not #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#if    ((USBD_AUDIO_CFG_FU_MAX_CTRL != DEF_ENABLED) && \
+        (USBD_AUDIO_CFG_FU_MAX_CTRL != DEF_DISABLED))
+#error  "USBD_AUDIO_CFG_FU_MAX_CTRL illegally #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_MAX_NBR_MU
+#error  "USBD_AUDIO_CFG_MAX_NBR_MU not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+
+#elif     (USBD_AUDIO_CFG_MAX_NBR_MU < 0u)
+#error  "USBD_AUDIO_CFG_MAX_NBR_MU illegally #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_MAX_NBR_SU
+#error  "USBD_AUDIO_CFG_MAX_NBR_SU not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_AUDIO_CFG_MAX_NBR_SU < 0u)
+#error  "USBD_AUDIO_CFG_MAX_NBR_SU illegally #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_CLASS_REQ_MAX_LEN
+#error  "USBD_AUDIO_CFG_CLASS_REQ_MAX_LEN not #define'd in 'usbd_cfg.h' [MUST be >= 4] "
+#endif
+
+#if     (USBD_AUDIO_CFG_CLASS_REQ_MAX_LEN < 4u)
+#error  "USBD_AUDIO_CFG_CLASS_REQ_MAX_LEN illegally #define'd in 'usbd_cfg.h' [MUST be >= 4]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_BUF_ALIGN_OCTETS
+#error  "USBD_AUDIO_CFG_BUF_ALIGN_OCTETS not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_PLAYBACK_CORR_EN
+#error  "USBD_AUDIO_CFG_PLAYBACK_CORR_EN not #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#if    ((USBD_AUDIO_CFG_PLAYBACK_CORR_EN != DEF_ENABLED) && \
+        (USBD_AUDIO_CFG_PLAYBACK_CORR_EN != DEF_DISABLED))
+#error  "USBD_AUDIO_CFG_PLAYBACK_CORR_EN illegally #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_PLAYBACK_FEEDBACK_EN
+#error  "USBD_AUDIO_CFG_PLAYBACK_FEEDBACK_EN not #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#if    ((USBD_AUDIO_CFG_PLAYBACK_FEEDBACK_EN != DEF_ENABLED) && \
+        (USBD_AUDIO_CFG_PLAYBACK_FEEDBACK_EN != DEF_DISABLED))
+#error  "USBD_AUDIO_CFG_PLAYBACK_FEEDBACK_EN illegally #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#ifndef  USBD_AUDIO_CFG_RECORD_CORR_EN
+#error  "USBD_AUDIO_CFG_RECORD_CORR_EN not #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+#if    ((USBD_AUDIO_CFG_RECORD_CORR_EN != DEF_ENABLED) && \
+        (USBD_AUDIO_CFG_RECORD_CORR_EN != DEF_DISABLED))
+#error  "USBD_AUDIO_CFG_RECORD_CORR_EN illegally #define'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio_internal.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio_internal.h
new file mode 100644
index 0000000..0156ae3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio_internal.h
@@ -0,0 +1,610 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        USB DEVICE AUDIO CLASS
+*
+* File          : usbd_audio_internal.h
+* Version       : V4.05.00
+* Programmer(s) : CM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_AUDIO_INTERNAL_MODULE_PRESENT
+#define  USBD_AUDIO_INTERNAL_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "usbd_audio.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             RING BUF Q
+*********************************************************************************************************
+*/
+
+#define  USBD_AUDIO_AS_IF_RING_BUF_Q_INVALID_IX             0xFFFF
+
+
+/*
+*********************************************************************************************************
+*                                         AUDIO CLASS SYNCH EP
+*
+* Note(s):  (1) The information carried over the synch path consists of a 3-byte data packet.
+*               See 'USB Device Class Definition for Audio Data Formats, Release 1.0, March 18, 1998',
+*               section 3.7.2.2 for more details about Isochronous Synch Endpoint.
+*
+*           (2) Tests on Windows showed that the transfer length should be the same, no matter the speed
+*               of the device.
+*********************************************************************************************************
+*/
+
+                                                                /* See Note #1.                                         */
+#define  USBD_AUDIO_FS_SYNCH_EP_XFER_LEN                   3u   /* Full-speed synch xfer len.                           */
+#define  USBD_AUDIO_HS_SYNCH_EP_XFER_LEN                   3u   /* High-speed synch xfer len. See Note #2.              */
+
+#define  USBD_AUDIO_PLAYBACK_SYNCH_BUF_NBR                 1u   /* Nbr of synch buf per AudioStreaming IF.              */
+
+
+/*
+*********************************************************************************************************
+*                                         AUDIO STREAMING IF
+*
+* Note(s):  (1) The audio class uses 2 internal important types of structure for its functioning:
+*               AudioStreaming Interface (AS IF) and AudioStreaming Interface Settings (AS IF Settings).
+*
+*               The following figure shows the device/configuration/interface/endpoint topology and how
+*               the AudioStreaming Interface and AudioStreaming Interface Settings fit in this topology.
+*               Let's consider the following high-speed capable device topology:
+*
+*               Device HS
+*                   Configuration HS
+*                      +--------------------------------------+
+*                      |                                      |
+*                      | AudioControl Interface               |
+*                      | AudioStreaming Interface             | -> AS IF #1     -> AS IF Settings #1
+*                      |     Isochronous OUT EP               |
+*                      | AudioStreaming Interface             | -> AS IF #2     -> AS IF Settings #2
+*                      |     Isochronous IN EP                |
+*                      |                                      |
+*                      +---- AUDIO INTERFACE COLLECTION 0 ----+ = class instance #0
+*                   Configuration FS
+*                      +--------------------------------------+
+*                      |                                      |
+*                      | AudioControl Interface               |
+*                      | AudioStreaming Interface             | -> AS IF #3     -> AS IF Settings #1
+*                      |     Isochronous OUT EP               |
+*                      | AudioStreaming Interface             | -> AS IF #4     -> AS IF Settings #2
+*                      |     Isochronous IN EP                |
+*                      |                                      |
+*                      +---- AUDIO INTERFACE COLLECTION 0 ----+ = class instance #0
+*
+*               2 configurations are needed, one high-speed and the other full-speed. Each configuration
+*               contains the same playback and record AudioStreaming interfaces. To handle this topology,
+*               the audio class will use 4 different AS IF structures and 2 different AS IF Settings
+*               structures.
+*               The AS IF structure is associated to the ischronous endpoint. Since an endpoint can have
+*               different characteristics depending of the speed, each time an AudioStreaming interface
+*               is added to a configuration, a new AS IF structure is allocated.
+*               Since the AS IF Settings contains information that is more stream-specific and the same
+*               stream can be added to different configurations, thus the same AS IF Settings structure
+*               can also be added to different configurations.
+*********************************************************************************************************
+*/
+
+                                                                /* Max nbr of comm struct.                              */
+#define  USBD_AUDIO_MAX_NBR_COMM                           (USBD_AUDIO_CFG_MAX_NBR_AIC * \
+                                                            USBD_AUDIO_CFG_MAX_NBR_CFG)
+
+                                                                /* Max nbr of alt setting struct.                       */
+#define  USBD_AUDIO_MAX_NBR_IF_ALT                         (USBD_AUDIO_CFG_MAX_NBR_AIC * \
+                                                            USBD_AUDIO_CFG_MAX_NBR_CFG * \
+                                                            USBD_AUDIO_CFG_MAX_NBR_IF_ALT)
+
+                                                                /* Max nbr of AudioStreaming IF EP.                     */
+#define  USBD_AUDIO_MAX_NBR_AS_IF_EP                       ( USBD_AUDIO_CFG_MAX_NBR_AIC * \
+                                                             USBD_AUDIO_CFG_MAX_NBR_CFG * \
+                                                            (USBD_AUDIO_CFG_MAX_NBR_AS_IF_PLAYBACK + USBD_AUDIO_CFG_MAX_NBR_AS_IF_RECORD))
+
+                                                                /* Maximum Number of AudioStreaming IF Settings.        */
+#define  USBD_AUDIO_MAX_NBR_AS_IF_SETTINGS                 ( USBD_AUDIO_CFG_MAX_NBR_AIC * \
+                                                            (USBD_AUDIO_CFG_MAX_NBR_AS_IF_PLAYBACK + USBD_AUDIO_CFG_MAX_NBR_AS_IF_RECORD))
+
+
+/*
+*********************************************************************************************************
+*                                           SYNCH ENDPOINT
+*
+* Note(s):  (1) Synch endpoint was known as feedback endpoint in the audio 1.0 specification. Synch
+*               endpoint is the official name now.
+*
+*           (2) Tests on Windows showed that the bit shift amount should be the same, no matter the speed
+*               of the device.
+*
+*           (3) The maximum adjustment allows to add (underrun) or remove (overrun) 1 sample.
+*               The medium  adjustment allows to add (underrun) or remove (overrun) 1/2 sample.
+*               The min     adjustment allows to add (underrun) or remove (overrun) 1/2048 sample.
+*********************************************************************************************************
+*/
+
+#define  USBD_AUDIO_STREAM_CORR_BOUNDARY_INTERVAL          6u
+
+#define  USBD_AUDIO_PLAYBACK_FS_BIT_SHIFT                 14u   /* Full-speed synch bit shift amount.                   */
+#define  USBD_AUDIO_PLAYBACK_HS_BIT_SHIFT                 14u   /* High-speed synch bit shift amount. See Note #2.      */
+
+                                                                /* Min, med and max cst for feedback value (see Note #3)*/
+#define  USBD_AUDIO_PLAYBACK_SYNCH_MIN_ADJ(bit_shift)   (1u << (bit_shift - 11u))
+#define  USBD_AUDIO_PLAYBACK_SYNCH_MED_ADJ(bit_shift)   (1u << (bit_shift -  1u))
+#define  USBD_AUDIO_PLAYBACK_SYNCH_MAX_ADJ(bit_shift)   (1u <<  bit_shift)
+
+
+/*
+*********************************************************************************************************
+*                                            AS IF HANDLE
+*********************************************************************************************************
+*/
+
+#define  USBD_AUDIO_AS_IF_HANDLE_CREATE(as_if, ix)          DEF_BIT_FIELD_WR((as_if)->Handle, \
+                                                                             ((ix) & 0x00FFu) , \
+                                                                              0x00FFu)
+
+#define  USBD_AUDIO_AS_IF_HANDLE_VALIDATE(as_if, as_handle) (((as_handle) == (as_if)->Handle) ? DEF_OK : DEF_FAIL)
+
+#define  USBD_AUDIO_AS_IF_HANDLE_INVALIDATE(as_if)          ((as_if)->Handle = ((as_if)->Handle + 0x0100u))
+
+#define  USBD_AUDIO_AS_IF_HANDLE_IX_GET(as_handle)          ((CPU_INT08U)(as_handle & 0x00FFu))
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+typedef  enum  usbd_audio_state {                               /* Audio class states.                                  */
+    USBD_AUDIO_STATE_NONE = 0u,
+    USBD_AUDIO_STATE_INIT,
+    USBD_AUDIO_STATE_CFG
+} USBD_AUDIO_STATE;
+
+typedef  enum  usbd_audio_stream_dir {                          /* Audio stream dir.                                    */
+    USBD_AUDIO_STREAM_NONE = 0u,
+    USBD_AUDIO_STREAM_IN,
+    USBD_AUDIO_STREAM_OUT
+} USBD_AUDIO_STREAM_DIR;
+
+typedef  enum  usbd_audio_entity_type {                          /* Audio entity type.                                  */
+    USBD_AUDIO_ENTITY_UNKNOWN = 0u,
+    USBD_AUDIO_ENTITY_IT,
+    USBD_AUDIO_ENTITY_OT,
+    USBD_AUDIO_ENTITY_FU,
+    USBD_AUDIO_ENTITY_MU,
+    USBD_AUDIO_ENTITY_SU
+} USBD_AUDIO_ENTITY_TYPE;
+
+
+/*
+*********************************************************************************************************
+*                                        FORWARD DECLARATIONS
+*********************************************************************************************************
+*/
+
+typedef  struct  usbd_audio_ctrl      USBD_AUDIO_CTRL;
+typedef  struct  usbd_audio_comm      USBD_AUDIO_COMM;
+typedef  struct  usbd_audio_entity    USBD_AUDIO_ENTITY;
+typedef  struct  usbd_audio_it        USBD_AUDIO_IT;
+typedef  struct  usbd_audio_ot        USBD_AUDIO_OT;
+typedef  struct  usbd_audio_fu        USBD_AUDIO_FU;
+typedef  struct  usbd_audio_mu        USBD_AUDIO_MU;
+typedef  struct  usbd_audio_su        USBD_AUDIO_SU;
+typedef  struct  usbd_audio_as_if     USBD_AUDIO_AS_IF;
+typedef  struct  usbd_audio_buf_desc  USBD_AUDIO_BUF_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                        AUDIO CLASS CTRL INFO
+*********************************************************************************************************
+*/
+
+struct  usbd_audio_ctrl {
+    CPU_INT08U                DevNbr;                           /* Dev   nbr.                                           */
+    CPU_INT08U                ClassNbr;                         /* Class nbr.                                           */
+    USBD_AUDIO_STATE          State;                            /* Audio class state.                                   */
+    USBD_AUDIO_COMM          *CommPtr;                          /* Comm info ptr.                                       */
+    USBD_AUDIO_COMM          *CommHeadPtr;                      /* Comm list head ptr.                                  */
+    USBD_AUDIO_COMM          *CommTailPtr;                      /* Comm list tail ptr.                                  */
+    CPU_INT08U                CommCnt;                          /* Nbr of Comm Struct for this class instance.          */
+    CPU_INT08U               *ReqBufPtr;                        /* Pointer to class req buf.                            */
+    USBD_AUDIO_DRV            DrvInfo;                          /* Audio driver info.                                   */
+    USBD_AUDIO_EVENT_FNCTS   *EventFnctPtr;                     /* Pointer to the audio event callbacks.                */
+
+    CPU_INT08U                EntityID_Nxt;                     /* Index used for entity ID assignment.                 */
+    CPU_INT08U                EntityCnt;                        /* Nbr of Terminals and Units.                          */
+    USBD_AUDIO_ENTITY       **EntityID_TblPtr;                  /* Table used for ID management.                        */
+};
+
+
+/*
+*********************************************************************************************************
+*                                        AUDIO CLASS COMM INFO
+*********************************************************************************************************
+*/
+
+struct  usbd_audio_comm {
+    USBD_AUDIO_CTRL   *CtrlPtr;                                 /* Pointer to ctrl info.                                */
+    CPU_INT08U         CfgNbr;                                  /* Cfg number.                                          */
+    CPU_INT08U         AS_IF_Cnt;                               /* Nbr of AudioStreaming IFs.                           */
+    USBD_AUDIO_AS_IF  *AS_IF_HeadPtr;                           /* AudioStreaming IFs list head ptr.                    */
+    USBD_AUDIO_AS_IF  *AS_IF_TailPtr;                           /* AudioStreaming IFs list tail ptr.                    */
+    USBD_AUDIO_COMM   *NextPtr;                                 /* Pointer to the next Comm Info structure.             */
+};
+
+
+/*
+*********************************************************************************************************
+*                                    UNIT AND TERMINAL INFO STRUCT
+*********************************************************************************************************
+*/
+
+struct  usbd_audio_entity {                                     /* Overlay struct used mainly for ID management.        */
+    USBD_AUDIO_ENTITY_TYPE            EntityType;               /* Terminal or unit type.                               */
+};
+
+struct  usbd_audio_it {
+           USBD_AUDIO_ENTITY_TYPE     EntityType;               /* Terminal type.                                       */
+           CPU_INT08U                 ID;                       /* Unique ID identifying Terminal within audio fnct.    */
+           CPU_INT08U                 AssociatedOT_ID;          /* Output Terminal ID associated to this Input Terminal.*/
+           USBD_AUDIO_IT_CFG         *IT_CfgPtr;                /* Ptr to the Input Terminal cfg.                       */
+};
+
+struct  usbd_audio_ot {
+           USBD_AUDIO_ENTITY_TYPE     EntityType;               /* Terminal type.                                       */
+           CPU_INT08U                 ID;                       /* Unique ID identifying Terminal within audio fnct.    */
+           CPU_INT08U                 AssociatedIT_ID;          /* Input Terminal ID associated to this Output Terminal.*/
+           CPU_INT08U                 SourceID;                 /* Unit or Terminal ID to which Terminal is connected.  */
+           USBD_AUDIO_OT_CFG         *OT_CfgPtr;                /* Ptr to the Output Terminal cfg.                      */
+    const  USBD_AUDIO_DRV_AC_OT_API  *OT_API_Ptr;               /* Ptr to Audio Drv OT API.                             */
+           USBD_AUDIO_DRV            *DrvInfoPtr;               /* Ptr to audio drv info.                               */
+};
+
+struct  usbd_audio_fu {
+           USBD_AUDIO_ENTITY_TYPE     EntityType;               /* Unit type.                                           */
+           CPU_INT08U                 ID;                       /* Unique ID identifying Unit within audio fnct.        */
+           CPU_INT08U                 SourceID;                 /* Unit or Terminal ID to which Unit is connected to.   */
+           USBD_AUDIO_FU_CFG         *FU_CfgPtr;                /* Ptr to the Feature Unit cfg.                         */
+    const  USBD_AUDIO_DRV_AC_FU_API  *FU_API_Ptr;               /* Ptr to Audio Drv FU API.                             */
+           USBD_AUDIO_DRV            *DrvInfoPtr;               /* Ptr to audio drv info.                               */
+};
+
+struct  usbd_audio_mu {
+           USBD_AUDIO_ENTITY_TYPE     EntityType;               /* Unit type.                                           */
+           CPU_INT08U                 ID;                       /* Unique ID identifying Unit within audio fnct.        */
+           CPU_INT08U                *SourceID_TblPtr;          /* Tbl of Unit or Terminal ID to which Unit is connected*/
+           CPU_INT32U                 ControlsSize;             /* bmControls tbl size.                                 */
+           CPU_INT08U                *ControlsTblPtr;           /* Bitmap tbl indicating which mixing Ctrls are ...     */
+                                                                /* ...programmable.                                     */
+           USBD_AUDIO_MU_CFG         *MU_CfgPtr;                /* Ptr to the Mixer Unit cfg.                           */
+    const  USBD_AUDIO_DRV_AC_MU_API  *MU_API_Ptr;               /* Ptr to Audio Drv MU API.                             */
+    USBD_AUDIO_DRV                   *DrvInfoPtr;               /* Ptr to audio drv info.                               */
+};
+
+struct  usbd_audio_su {
+           USBD_AUDIO_ENTITY_TYPE     EntityType;               /* Unit type.                                           */
+           CPU_INT08U                 ID;                       /* Unique ID identifying Unit within audio fnct.        */
+           CPU_INT08U                *SourceID_TblPtr;          /* Tbl of Unit or Terminal ID to which Unit is connected*/
+           USBD_AUDIO_SU_CFG         *SU_CfgPtr;                /* Ptr to the Selector Unit cfg.                        */
+    const  USBD_AUDIO_DRV_AC_SU_API  *SU_API_Ptr;               /* Ptr to Audio Drv SU API.                             */
+           USBD_AUDIO_DRV            *DrvInfoPtr;               /* Ptr to audio drv info.                               */
+};
+
+
+/*
+*********************************************************************************************************
+*                                         AUDIO STREAMING IF
+*
+* Note(s) : (1) Each AudioStreaming interface has a ring buffer queue managed by four indexes. It allows
+*               to manage a producer/consumer communication model between the USB and codec sides:
+*
+*               Producer -> Consumer
+*               USB      -> Codec (Playback)
+*               Codec    -> USB   (Record)
+*
+*               The meaning of indexes is the following depending of playback or record stream:
+*
+*                PLAYBACK
+*                ProducerStartIx    Core or Playback task submits a USB transfer
+*                ProducerEndIx      Core task calls USBD_Audio_PlaybackIsocCmpl() to finish a USB transfer
+*                ConsumerStartIx    Playback task submits an audio buffer to the codec driver
+*                ConsumerEndIx      Codec driver has finished an audio transfer
+*
+*                RECORD
+*                ProducerStartIx    Codec driver starts an audio transfer
+*                ProducerEndIx      Codec driver has finished an audio transfer
+*                ConsumerStartIx    Core or Record task submits a USB transfer
+*                ConsumerEndIx      Core task calls USBD_Audio_RecordIsocCmpl() to finish a USB transfer
+*
+*           (2) The structure USBD_AUDIO_AS_IF_SETTINGS contains stream characteristics that will
+*               be the same across different device configurations.
+*
+*           (3) For certain sampling frequencies (i.e. 11.025, 22.050 and 44.1 KHz), a data rate
+*               adjustment is necessary because the number of audio samples per ms is not an
+*               integer number. Partial audio samples are not possible. For those sampling
+*               frequencies, the table below gives the required adjustment:
+*
+*               Samples per frm/ms | Typical Packet Size | Adjustment
+*               11.025             | 11 samples          | 12 samples every 40 packets (i.e. ms)
+*               22.050             | 22 samples          | 23 samples every 20 packets (i.e. ms)
+*               44.1               | 44 samples          | 45 samples every 10 packets (i.e. ms)
+*********************************************************************************************************
+*/
+
+                                                                /* AudioStreaming IF ring buf queue (see Note #1).      */
+typedef struct  usbd_audio_as_if_ring_buf_q {
+           USBD_AUDIO_BUF_DESC            *BufDescTblPtr;
+           CPU_INT16U                      ProducerStartIx;
+           CPU_INT16U                      ProducerEndIx;
+           CPU_INT16U                      ConsumerStartIx;
+           CPU_INT16U                      ConsumerEndIx;
+} USBD_AUDIO_AS_IF_RING_BUF_Q;
+
+                                                                /* AudioStreaming alt settings (see Note #2).           */
+typedef struct  usbd_audio_as_if_alt {
+           USBD_AUDIO_AS_ALT_CFG          *AS_CfgPtr;           /* Pointer to the Audiostreaming cfg.                   */
+           CPU_INT08U                      DataIsocAddr;        /* Data isoc EP addr.                                   */
+           CPU_INT08U                      SynchIsocAddr;       /* Synchronization isoc EP addr.                        */
+           CPU_INT16U                      MaxPktLen;           /* Max pkt len in byte.                                 */
+} USBD_AUDIO_AS_IF_ALT;
+
+                                                                /* Audio playback synch struct.                         */
+typedef  struct  usbd_audio_playback_synch {
+           CPU_INT16U                      SynchFrameNbr;       /* Frame nbr used to track bRefresh period synch EP.    */
+                                                                /* Nbr of buff diff at which light feedback is applied. */
+           CPU_INT08S                      SynchBoundaryLightPos;
+           CPU_INT08S                      SynchBoundaryLightNeg;
+
+           CPU_INT32U                      FeedbackNominalVal;  /* Nominal feedback val (already bit-shifted).          */
+           CPU_INT32U                      FeedbackCurVal;      /* Current feedback val (already bit-shifted).          */
+           CPU_BOOLEAN                     FeedbackValUpdate;   /* Flag indicating if a new feedback val must be sent.  */
+
+           CPU_INT08S                      PrevBufDiff;         /* Prev diff between nbr of rx'd and consumed bufs.     */
+           CPU_INT16U                      PrevFrameNbr;        /* Prev frame nbr during which a situation occurred.    */
+
+           CPU_INT32U                     *SynchBufPtr;         /* Ptr to single synch buf.                             */
+           CPU_BOOLEAN                     SynchBufFree;        /* Flag indicating if synch buf free.                   */
+} USBD_AUDIO_PLAYBACK_SYNCH;
+
+typedef struct  usbd_audio_as_if_settings {                     /* See Note #1.                                         */
+    const  USBD_AUDIO_DRV_AS_API          *AS_API_Ptr;          /* Ptr to Audio Drv AS API.                             */
+           USBD_AUDIO_DRV                 *DrvInfoPtr;          /* Ptr to audio drv info.                               */
+           CPU_INT08U                      Ix;                  /* AS IF Settings ix.                                   */
+           CPU_INT08U                      TerminalID;          /* Terminal ID associated to this AS IF.                */
+           CPU_INT16U                      BufTotalNbr;         /* Nbr of buf allocated for this stream.                */
+           CPU_INT16U                      BufTotalLen;         /* Total len of a buf.                                  */
+           CPU_INT08U                     *BufMemPtr;           /* Ptr to mem region containing buf.                    */
+
+           USBD_AUDIO_STREAM_DIR           StreamDir;           /* Stream dir: IN or OUT.                               */
+           CPU_BOOLEAN                     StreamStarted;       /* Flag indicating stream start.                        */
+           CPU_INT16U                      StreamPreBufMax;     /* Max buf to acculumate for pre-buffering stream.      */
+           CPU_BOOLEAN                     StreamPrimingDone;   /* Flag indicating stream priming done.                 */
+           USBD_AUDIO_AS_IF_RING_BUF_Q     StreamRingBufQ;      /* Ring Buf Q.                                          */
+                                                                /* PLAYBACK STATE:                                      */
+#if (USBD_AUDIO_CFG_PLAYBACK_EN          == DEF_ENABLED) && \
+    (USBD_AUDIO_CFG_PLAYBACK_FEEDBACK_EN == DEF_ENABLED)
+           USBD_AUDIO_PLAYBACK_SYNCH       PlaybackSynch;       /* Struct containing synch infos.                       */
+#endif
+                                                                /* RECORD STATE:                                        */
+#if (USBD_AUDIO_CFG_RECORD_EN == DEF_ENABLED)
+           CPU_INT16U                      RecordBufLen;        /* Buf len used during stream comm.                     */
+           CPU_INT16U                      RecordRateAdjMs;     /* Data rate adjustment in milliseconds (see Note #2).  */
+           CPU_INT32U                      RecordRateAdjXferCtr;/* Ctr tracking data rate adjustment.                   */
+           CPU_INT16S                      RecordIsocTxOngoingCnt;  /* Nbr of isoc IN xfer in progress.                 */
+#endif
+                                                                /* BUILT-IN STREAM CORR:                                */
+#if (USBD_AUDIO_CFG_PLAYBACK_CORR_EN == DEF_ENABLED) || \
+    (USBD_AUDIO_CFG_RECORD_CORR_EN   == DEF_ENABLED)
+           CPU_INT16U                      CorrPeriod;          /* Period at which corr must be monitored.              */
+           CPU_INT16U                      CorrFrameNbr;        /* Last frame used to track corr period.                */
+           USBD_AUDIO_PLAYBACK_CORR_FNCT   CorrCallbackPtr;     /* Ptr to app callback for playback corr.               */
+#endif
+#if (USBD_AUDIO_CFG_PLAYBACK_FEEDBACK_EN == DEF_ENABLED) || \
+    (USBD_AUDIO_CFG_PLAYBACK_CORR_EN     == DEF_ENABLED) || \
+    (USBD_AUDIO_CFG_RECORD_CORR_EN       == DEF_ENABLED)
+                                                               /* Nbr of buff diff at which heavy correction is applied.*/
+           CPU_INT08S                      CorrBoundaryHeavyPos;
+           CPU_INT08S                      CorrBoundaryHeavyNeg;
+#endif
+#if (USBD_AUDIO_CFG_STAT_EN == DEF_ENABLED)
+           USBD_AUDIO_STAT                *StatPtr;             /* Statistics for given AS IF.                          */
+#endif
+} USBD_AUDIO_AS_IF_SETTINGS;
+
+struct  usbd_audio_as_if {
+           USBD_AUDIO_AS_HANDLE            Handle;              /* AudioStreaming IF handle.                            */
+           USBD_AUDIO_COMM                *CommPtr;             /* Ptr to comm struct.                                  */
+           CPU_INT08U                      DevNbr;              /* Dev nbr.                                             */
+           CPU_INT08U                      ClassNbr;            /* Class nbr.                                           */
+           CPU_INT08U                      AS_IF_Nbr;           /* AudioStreaming IF nbr attributed by the core.        */
+           USBD_AUDIO_AS_IF_SETTINGS      *AS_IF_SettingsPtr;   /* Ptr to AS settings.                                  */
+                                                                /* ALTERNATE SETTINGS:                                  */
+           USBD_AUDIO_AS_IF_ALT           *AS_IF_AltCurPtr;     /* Alt setting cur ptr.                                 */
+
+           USBD_AUDIO_AS_IF               *NextPtr;             /* Ptr to nxt AudioStreaming IF struct.                 */
+};
+
+                                                                /* Buf desc used during streaming.                      */
+struct  usbd_audio_buf_desc {
+           void                           *BufPtr;
+           CPU_INT16U                      BufLen;
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#define  USBD_AUDIO_BIT_SET_CNT(nbr_bit_set, var_to_test)   do {                                                                      \
+                                                                CPU_INT32U  __bitmap;                                                 \
+                                                                                                                                      \
+                                                                __bitmap = (var_to_test);                                             \
+                                                                for ((nbr_bit_set) = 0u; (nbr_bit_set) < __bitmap; (nbr_bit_set)++) { \
+                                                                    __bitmap &= (__bitmap - 1u);                                      \
+                                                                }                                                                     \
+                                                            } while (0);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+                                                                /* Implemented in usbd_audio_processing.c.              */
+void                 USBD_Audio_ProcessingInit     (       CPU_INT16U               msg_qty,
+                                                           USBD_ERR                *p_err);
+
+#if (USBD_AUDIO_CFG_PLAYBACK_EN == DEF_ENABLED) || \
+    (USBD_AUDIO_CFG_RECORD_EN   == DEF_ENABLED)
+USBD_AUDIO_AS_IF    *USBD_Audio_AS_IF_Alloc        (       USBD_ERR                *p_err);
+#endif
+
+void                 USBD_Audio_AC_TerminalCtrl    (       CPU_INT08U               terminal_id,
+                                                           USBD_AUDIO_ENTITY_TYPE   recipient,
+                                                    const  void                    *p_recipient_info,
+                                                           CPU_INT08U               b_req,
+                                                           CPU_INT16U               w_val,
+                                                           CPU_INT08U              *p_buf,
+                                                           CPU_INT16U               req_len,
+                                                           USBD_ERR                *p_err);
+
+void                 USBD_Audio_AC_UnitCtrl        (       CPU_INT08U               unit_id,
+                                                           USBD_AUDIO_ENTITY_TYPE   recipient,
+                                                    const  void                    *p_recipient_info,
+                                                           CPU_INT08U               b_req,
+                                                           CPU_INT16U               w_val,
+                                                           CPU_INT08U              *p_buf,
+                                                           CPU_INT16U               req_len,
+                                                           USBD_ERR                *p_err);
+
+#if (USBD_AUDIO_CFG_PLAYBACK_EN == DEF_ENABLED) || \
+    (USBD_AUDIO_CFG_RECORD_EN   == DEF_ENABLED)
+void                 USBD_Audio_AS_EP_CtrlProcess  (       USBD_AUDIO_AS_IF        *p_as_if,
+                                                    const  USBD_AUDIO_AS_ALT_CFG   *p_as_cfg,
+                                                           CPU_INT16U               ep_addr,
+                                                           CPU_INT08U               b_req,
+                                                           CPU_INT16U               w_val,
+                                                           CPU_INT08U              *p_buf,
+                                                           CPU_INT16U               req_len,
+                                                           USBD_ERR                *p_err);
+#endif
+
+#if (USBD_AUDIO_CFG_RECORD_EN == DEF_ENABLED)
+void                 USBD_Audio_RecordTaskHandler  (void);
+#endif
+
+#if (USBD_AUDIO_CFG_PLAYBACK_EN == DEF_ENABLED)
+void                 USBD_Audio_PlaybackTaskHandler(void);
+#endif
+
+#if (USBD_AUDIO_CFG_PLAYBACK_EN == DEF_ENABLED) || \
+    (USBD_AUDIO_CFG_RECORD_EN   == DEF_ENABLED)
+void                 USBD_Audio_AS_IF_Start        (       USBD_AUDIO_AS_IF        *p_as_if,
+                                                           USBD_ERR                *p_err);
+
+void                 USBD_Audio_AS_IF_Stop         (       USBD_AUDIO_AS_IF        *p_as_if,
+                                                           USBD_ERR                *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio_os.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio_os.h
new file mode 100644
index 0000000..7ba746a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio_os.h
@@ -0,0 +1,167 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       USB DEVICE AUDIO CLASS
+*
+* File          : usbd_audio_os.h
+* Version       : V4.05.00
+* Programmer(s) : CM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_AUDIO_OS_MODULE_PRESENT
+#define  USBD_AUDIO_OS_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+void   USBD_Audio_OS_Init               (CPU_INT16U   msg_qty,
+                                         USBD_ERR    *p_err);
+
+void   USBD_Audio_OS_AS_IF_LockCreate   (CPU_INT08U   as_if_nbr,
+                                         USBD_ERR    *p_err);
+
+void   USBD_Audio_OS_AS_IF_LockAcquire  (CPU_INT08U   as_if_nbr,
+                                         CPU_INT16U   timeout_ms,
+                                         USBD_ERR    *p_err);
+
+void   USBD_Audio_OS_AS_IF_LockRelease  (CPU_INT08U   as_if_nbr);
+
+void   USBD_Audio_OS_RingBufQLockCreate (CPU_INT08U   as_if_settings_ix,
+                                         USBD_ERR    *p_err);
+
+void   USBD_Audio_OS_RingBufQLockAcquire(CPU_INT08U   as_if_settings_ix,
+                                         CPU_INT16U   timeout_ms,
+                                         USBD_ERR    *p_err);
+
+void   USBD_Audio_OS_RingBufQLockRelease(CPU_INT08U   as_if_settings_ix);
+
+#if (USBD_AUDIO_CFG_RECORD_EN == DEF_ENABLED)
+void   USBD_Audio_OS_RecordReqPost      (void        *p_msg,
+                                         USBD_ERR    *p_err);
+
+void  *USBD_Audio_OS_RecordReqPend      (USBD_ERR    *p_err);
+#endif
+
+#if (USBD_AUDIO_CFG_PLAYBACK_EN == DEF_ENABLED)
+void   USBD_Audio_OS_PlaybackReqPost    (void        *p_msg,
+                                         USBD_ERR    *p_err);
+
+void  *USBD_Audio_OS_PlaybackReqPend    (USBD_ERR    *p_err);
+#endif
+
+void   USBD_Audio_OS_DlyMs              (CPU_INT32U   ms);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio_processing.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio_processing.h
new file mode 100644
index 0000000..2e7ecb9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Audio/usbd_audio_processing.h
@@ -0,0 +1,241 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        USB DEVICE AUDIO CLASS
+*
+* File          : usbd_audio_processing.h
+* Version       : V4.05.00
+* Programmer(s) : CM
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_AUDIO_PROCESSING_MODULE_PRESENT
+#define  USBD_AUDIO_PROCESSING_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+#include  "usbd_audio.h"
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef   USBD_AUDIO_PROCESSING_MODULE
+#define  USBD_AUDIO_PROCESSING_EXT
+#else
+#define  USBD_AUDIO_PROCESSING_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (USBD_AUDIO_CFG_RECORD_EN == DEF_ENABLED)
+void             *USBD_Audio_RecordBufGet  (USBD_AUDIO_AS_HANDLE   as_handle,
+                                            CPU_INT16U            *p_buf_len);
+
+void              USBD_Audio_RecordRxCmpl  (USBD_AUDIO_AS_HANDLE   as_handle);
+
+void              USBD_Audio_RecordBufFree (USBD_AUDIO_AS_HANDLE   as_handle,
+                                            void                  *p_buf);
+#endif
+
+#if (USBD_AUDIO_CFG_PLAYBACK_EN == DEF_ENABLED)
+void             USBD_Audio_PlaybackTxCmpl (USBD_AUDIO_AS_HANDLE   as_handle);
+
+void             USBD_Audio_PlaybackBufFree(USBD_AUDIO_AS_HANDLE   as_handle,
+                                            void                  *p_buf);
+#endif
+
+#if (USBD_AUDIO_CFG_STAT_EN == DEF_ENABLED)
+USBD_AUDIO_STAT  *USBD_Audio_StatGet       (USBD_AUDIO_AS_HANDLE   as_handle);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      AUDIO STATISTICS MACRO'S
+*********************************************************************************************************
+*/
+
+#if (USBD_AUDIO_CFG_STAT_EN == DEF_ENABLED)
+#define  USBD_AUDIO_STAT_INC(ctr)                   {                                                       \
+                                                        (ctr)++;                                            \
+                                                    }
+
+#define  USBD_AUDIO_STAT_PROT_INC(ctr)              {                                                       \
+                                                        CPU_CRITICAL_ENTER();                               \
+                                                        (ctr)++;                                            \
+                                                        CPU_CRITICAL_EXIT();                                \
+                                                    }
+
+#define  USBD_AUDIO_DRV_STAT_INC(as_handle, ctr)    {                                                       \
+                                                        USBD_AUDIO_STAT  *__p_audio_stat;                   \
+                                                                                                            \
+                                                        __p_audio_stat = USBD_Audio_StatGet((as_handle));   \
+                                                        __p_audio_stat->ctr++;                            \
+                                                    }
+
+#define  USBD_AUDIO_STAT_DEC(ctr)                   {                                                       \
+                                                        (ctr)--;                                            \
+                                                    }
+
+#define  USBD_AUDIO_STAT_PROT_DEC(ctr)              {                                                       \
+                                                        CPU_CRITICAL_ENTER();                               \
+                                                        (ctr)--;                                            \
+                                                        CPU_CRITICAL_EXIT();                                \
+                                                    }
+
+#define  USBD_AUDIO_STAT_MAX(ctr, max)              {                                                       \
+                                                        if ((ctr) > (max)) {                                \
+                                                            (max) = (ctr);                                  \
+                                                        }                                                   \
+                                                    }
+
+#define  USBD_AUDIO_STAT_PROT_MAX(ctr, max)         {                                                       \
+                                                        CPU_CRITICAL_ENTER();                               \
+                                                        if ((ctr) > (max)) {                                \
+                                                            (max) = (ctr);                                  \
+                                                        }                                                   \
+                                                        CPU_CRITICAL_EXIT();                                \
+                                                    }
+
+#define  USBD_AUDIO_STAT_MIN(ctr, min)              {                                                       \
+                                                        if ((ctr) < (min)) {                                \
+                                                            (min) = (ctr);                                  \
+                                                        }                                                   \
+                                                    }
+
+#define  USBD_AUDIO_STAT_PROT_MIN(ctr, min)         {                                                       \
+                                                        CPU_CRITICAL_ENTER();                               \
+                                                        if ((ctr) < (min)) {                                \
+                                                            (min) = (ctr);                                  \
+                                                        }                                                   \
+                                                        CPU_CRITICAL_EXIT();                                \
+                                                    }
+
+#define  USBD_AUDIO_STAT_ADD(ctr, add)              {                                                       \
+                                                        (ctr) += (add);                                     \
+                                                    }
+
+#define  USBD_AUDIO_STAT_RESET(ctr)                 {                                                       \
+                                                        (ctr) = 0u;                                         \
+                                                    }
+
+#else
+#define  USBD_AUDIO_STAT_INC(ctr)
+#define  USBD_AUDIO_STAT_PROT_INC(ctr)
+#define  USBD_AUDIO_DRV_STAT_INC(as_handle, ctr)
+#define  USBD_AUDIO_STAT_DEC(ctr)
+#define  USBD_AUDIO_STAT_PROT_DEC(ctr)
+#define  USBD_AUDIO_STAT_MAX(ctr, max)
+#define  USBD_AUDIO_STAT_PROT_MAX(ctr, max)
+#define  USBD_AUDIO_STAT_ADD(ctr, add)
+#define  USBD_AUDIO_STAT_RESET(ctr)
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/CDC-EEM/usbd_cdc_eem.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/CDC-EEM/usbd_cdc_eem.h
new file mode 100644
index 0000000..852ab99
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/CDC-EEM/usbd_cdc_eem.h
@@ -0,0 +1,237 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                USB COMMUNICATIONS DEVICE CLASS (CDC)
+*                                   ETHERNET EMULATION MODEL (EEM)
+*
+* File          : usbd_cdc_eem.h
+* Version       : V4.05.00
+* Programmer(s) : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_CDC_EEM_MODULE_PRESENT
+#define  USBD_CDC_EEM_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBD_CDC_EEM_MODULE
+#define  USBD_CDC_EEM_EXT
+#else
+#define  USBD_CDC_EEM_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBD_CDC_EEM_HDR_LEN                              2u   /* CDC EEM data header length.                          */
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                           CDC EEM CLASS INSTANCE CONFIGURATION STRUCTURE
+*********************************************************************************************************
+*/
+
+typedef  struct  usbd_cdc_eem_cfg {
+    CPU_INT08U  RxBufQSize;                                     /* Size of rx buffer Q.                                 */
+    CPU_INT08U  TxBufQSize;                                     /* Size of tx buffer Q.                                 */
+} USBD_CDC_EEM_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                           CDC EEM DRIVER
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_cdc_eem_drv {
+                                                                /* Retrieve a Rx buffer.                                */
+    CPU_INT08U  *(*RxBufGet)   (CPU_INT08U   class_nbr,
+                                void        *p_arg,
+                                CPU_INT16U  *p_buf_len);
+
+                                                                /* Signal that a rx buffer is ready.                    */
+    void         (*RxBufRdy)   (CPU_INT08U   class_nbr,
+                                void        *p_arg);
+
+                                                                /* Free a tx buffer.                                    */
+    void         (*TxBufFree)  (CPU_INT08U   class_nbr,
+                                void        *p_arg,
+                                CPU_INT08U  *p_buf,
+                                CPU_INT16U   buf_len);
+} USBD_CDC_EEM_DRV;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void          USBD_CDC_EEM_Init           (       USBD_ERR          *p_err);
+
+CPU_INT08U    USBD_CDC_EEM_Add            (       USBD_ERR          *p_err);
+
+void          USBD_CDC_EEM_CfgAdd         (       CPU_INT08U         class_nbr,
+                                                  CPU_INT08U         dev_nbr,
+                                                  CPU_INT08U         cfg_nbr,
+                                           const  CPU_CHAR          *p_if_name,
+                                                  USBD_ERR          *p_err);
+
+CPU_BOOLEAN   USBD_CDC_EEM_IsConn         (       CPU_INT08U         class_nbr);
+
+void          USBD_CDC_EEM_InstanceInit   (       CPU_INT08U         class_nbr,
+                                                  USBD_CDC_EEM_CFG  *p_cfg,
+                                                  USBD_CDC_EEM_DRV  *p_cdc_eem_drv,
+                                                  void              *p_arg,
+                                                  USBD_ERR          *p_err);
+
+void          USBD_CDC_EEM_Start          (       CPU_INT08U         class_nbr,
+                                                  USBD_ERR          *p_err);
+
+void          USBD_CDC_EEM_Stop           (       CPU_INT08U         class_nbr,
+                                                  USBD_ERR          *p_err);
+
+CPU_INT08U    USBD_CDC_EEM_DevNbrGet      (       CPU_INT08U         class_nbr,
+                                                  USBD_ERR          *p_err);
+
+CPU_INT08U   *USBD_CDC_EEM_RxDataPktGet   (       CPU_INT08U         class_nbr,
+                                                  CPU_INT16U        *p_rx_len,
+                                                  CPU_BOOLEAN       *p_crc_computed,
+                                                  USBD_ERR          *p_err);
+
+void          USBD_CDC_EEM_TxDataPktSubmit(       CPU_INT08U         class_nbr,
+                                                  CPU_INT08U        *p_buf,
+                                                  CPU_INT32U         buf_len,
+                                                  CPU_BOOLEAN        crc_computed,
+                                                  USBD_ERR          *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_CDC_EEM_CFG_MAX_NBR_DEV
+#error  "USBD_CDC_EEM_CFG_MAX_NBR_DEV          not #define'd in 'usbd_cfg.h'"
+#error  "                                [MUST be  >= 1]                    "
+#endif
+
+#if     (USBD_CDC_EEM_CFG_MAX_NBR_DEV < 1u)
+#error  "USBD_CDC_EEM_CFG_MAX_NBR_DEV    illegally #define'd in 'usbd_cfg.h'"
+#error  "                                [MUST be  >= 1]                    "
+#endif
+
+#ifndef  USBD_CDC_EEM_CFG_MAX_NBR_CFG
+#error  "USBD_CDC_EEM_CFG_MAX_NBR_CFG          not #define'd in 'usbd_cfg.h'"
+#error  "                                [MUST be  >= 1]                    "
+#endif
+
+#if     (USBD_CDC_EEM_CFG_MAX_NBR_CFG < 1u)
+#error  "USBD_CDC_EEM_CFG_MAX_NBR_CFG    illegally #define'd in 'usbd_cfg.h'"
+#error  "                                [MUST be  >= 1]                    "
+#endif
+
+#ifdef USBD_CDC_EEM_CFG_RX_BUF_QTY_PER_DEV
+#if ((USBD_CDC_EEM_CFG_RX_BUF_QTY_PER_DEV - 1u) > USBD_CFG_MAX_NBR_URB_EXTRA)
+#error  "USBD_CDC_EEM_CFG_RX_BUF_QTY_PER_DEV    illegally #define'd in 'usbd_cfg.h'"
+#error  "                                       [MUST be   <= USBD_CFG_MAX_NBR_URB_EXTRA + 1]                    "
+#endif
+#endif
+
+#ifndef  USBD_CDC_EEM_CFG_ECHO_BUF_LEN
+#error  "USBD_CDC_EEM_CFG_ECHO_BUF_LEN         not #define'd in 'usbd_cfg.h'"
+#error  "                                [MUST be  >= 2u]                   "
+#endif
+
+#if     (USBD_CDC_EEM_CFG_ECHO_BUF_LEN < 2u)
+#error  "USBD_CDC_EEM_CFG_ECHO_BUF_LEN   illegally #define'd in 'usbd_cfg.h'"
+#error  "                                [MUST be  >= 2]                    "
+#endif
+
+#ifndef  USBD_CDC_EEM_CFG_RX_BUF_LEN
+#error  "USBD_CDC_EEM_CFG_RX_BUF_LEN           not #define'd in 'usbd_cfg.h'"
+#error  "                                [MUST be  >= 2u]                   "
+#endif
+
+#if     (USBD_CDC_EEM_CFG_RX_BUF_LEN < 2u)
+#error  "USBD_CDC_EEM_CFG_RX_BUF_LEN     illegally #define'd in 'usbd_cfg.h'"
+#error  "                                [MUST be  >= 2]                    "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/CDC/ACM/usbd_acm_serial.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/CDC/ACM/usbd_acm_serial.h
new file mode 100644
index 0000000..f98297a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/CDC/ACM/usbd_acm_serial.h
@@ -0,0 +1,287 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   USB COMMUNICATIONS DEVICE CLASS (CDC)
+*                                        ABSTRACT CONTROL MODEL (ACM)
+*                                             SERIAL EMULATION
+*
+* File          : usbd_acm_serial.h
+* Version       : V4.05.00
+* Programmer(s) : FT
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_ACM_SERIAL_MODULE_PRESENT
+#define  USBD_ACM_SERIAL_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../usbd_cdc.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBD_ACM_SERIAL_NBR_NONE            DEF_INT_08U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                        PORT SETTINGS DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBD_ACM_SERIAL_PARITY_NONE                       0u
+#define  USBD_ACM_SERIAL_PARITY_ODD                        1u
+#define  USBD_ACM_SERIAL_PARITY_EVEN                       2u
+#define  USBD_ACM_SERIAL_PARITY_MARK                       3u
+#define  USBD_ACM_SERIAL_PARITY_SPACE                      4u
+
+
+#define  USBD_ACM_SERIAL_STOP_BIT_1                        0u
+#define  USBD_ACM_SERIAL_STOP_BIT_1_5                      1u
+#define  USBD_ACM_SERIAL_STOP_BIT_2                        2u
+
+
+/*
+*********************************************************************************************************
+*                                      LINE EVENTS FLAGS DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBD_ACM_SERIAL_CTRL_BREAK                   DEF_BIT_00
+#define  USBD_ACM_SERIAL_CTRL_RTS                     DEF_BIT_01
+#define  USBD_ACM_SERIAL_CTRL_DTR                     DEF_BIT_02
+
+#define  USBD_ACM_SERIAL_STATE_DCD                    DEF_BIT_00
+#define  USBD_ACM_SERIAL_STATE_DSR                    DEF_BIT_01
+#define  USBD_ACM_SERIAL_STATE_BREAK                  DEF_BIT_02
+#define  USBD_ACM_SERIAL_STATE_RING                   DEF_BIT_03
+#define  USBD_ACM_SERIAL_STATE_FRAMING                DEF_BIT_04
+#define  USBD_ACM_SERIAL_STATE_PARITY                 DEF_BIT_05
+#define  USBD_ACM_SERIAL_STATE_OVERUN                 DEF_BIT_06
+
+
+/*
+*********************************************************************************************************
+*                                    CALL MANAGEMENT CAPABILITIES
+*
+* Note(s) : (1) See 'USB, Communications Class, Subclass Specification for PSTN Devices, Revision 1.2,
+*               February 9 2007', section '5.3.1 Call Management Functional Descriptor' for more details
+*               about the Call Management capabilities.
+*********************************************************************************************************
+*/
+
+#define  USBD_ACM_SERIAL_CALL_MGMT_DEV                DEF_BIT_00
+#define  USBD_ACM_SERIAL_CALL_MGMT_DATA_CCI_DCI       DEF_BIT_01
+#define  USBD_ACM_SERIAL_CALL_MGMT_DATA_OVER_DCI     (DEF_BIT_01 | DEF_BIT_00)
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        LINE CODING DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  struct  usbd_acm_serial_line_coding {
+    CPU_INT32U  BaudRate;
+    CPU_INT08U  Parity;
+    CPU_INT08U  StopBits;
+    CPU_INT08U  DataBits;
+} USBD_ACM_SERIAL_LINE_CODING;
+
+
+/*
+*********************************************************************************************************
+*                                 LINE CTRL CHANGE CALLBACK DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  void   (*USBD_ACM_SERIAL_LINE_CTRL_CHNGD) (CPU_INT08U   subclass_nbr,
+                                                    CPU_INT08U   event,
+                                                    CPU_INT08U   event_chngd,
+                                                    void        *p_arg);
+
+
+
+/*
+*********************************************************************************************************
+*                                LINE CODING CHANGE CALLBACK DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  CPU_BOOLEAN  (*USBD_ACM_SERIAL_LINE_CODING_CHNGD) (CPU_INT08U                    subclass_nbr,
+                                                            USBD_ACM_SERIAL_LINE_CODING  *p_line_coding,
+                                                            void                         *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void         USBD_ACM_SerialInit         (USBD_ERR                           *p_err);
+
+CPU_INT08U   USBD_ACM_SerialAdd          (CPU_INT16U                          line_state_interval,
+                                          CPU_INT16U                          call_mgmt_capabilities,
+                                          USBD_ERR                           *p_err);
+
+CPU_BOOLEAN  USBD_ACM_SerialCfgAdd       (CPU_INT08U                          subclass_nbr,
+                                          CPU_INT08U                          dev_nbr,
+                                          CPU_INT08U                          cfg_nbr,
+                                          USBD_ERR                           *p_err);
+
+CPU_BOOLEAN  USBD_ACM_SerialIsConn       (CPU_INT08U                          subclass_nbr);
+
+CPU_INT32U   USBD_ACM_SerialRx           (CPU_INT08U                          subclass_nbr,
+                                          CPU_INT08U                         *p_buf,
+                                          CPU_INT32U                          buf_len,
+                                          CPU_INT16U                          timeout,
+                                          USBD_ERR                           *p_err);
+
+CPU_INT32U   USBD_ACM_SerialTx           (CPU_INT08U                          subclass_nbr,
+                                          CPU_INT08U                         *p_buf,
+                                          CPU_INT32U                          buf_len,
+                                          CPU_INT16U                          timeout,
+                                          USBD_ERR                           *p_err);
+
+#if 0
+CPU_INT32U   USBD_ACM_SerialRxAsync      (CPU_INT08U                          subclass_nbr,
+                                          CPU_INT08U                         *p_buf,
+                                          CPU_INT32U                          buf_len,
+                                          USBD_ACM_SERIAL_ASYNC               async,
+                                          void                               *p_async_arg,
+                                          USBD_ERR                           *p_err);
+
+CPU_INT32U   USBD_ACM_SerialTxAsync      (CPU_INT08U                          subclass_nbr,
+                                          CPU_INT08U                         *p_buf,
+                                          CPU_INT32U                          buf_len,
+                                          USBD_ACM_SERIAL_ASYNC               async,
+                                          void                               *p_async_arg,
+                                          USBD_ERR                           *p_err);
+#endif
+
+CPU_INT08U   USBD_ACM_SerialLineCtrlGet  (CPU_INT08U                          subclass_nbr,
+                                          USBD_ERR                           *p_err);
+
+void         USBD_ACM_SerialLineCtrlReg  (CPU_INT08U                          subclass_nbr,
+                                          USBD_ACM_SERIAL_LINE_CTRL_CHNGD     line_ctrl_chngd,
+                                          void                               *p_arg,
+                                          USBD_ERR                           *p_err);
+
+void         USBD_ACM_SerialLineCodingGet(CPU_INT08U                          subclass_nbr,
+                                          USBD_ACM_SERIAL_LINE_CODING        *p_line_coding,
+                                          USBD_ERR                           *p_err);
+
+void         USBD_ACM_SerialLineCodingSet(CPU_INT08U                          subclass_nbr,
+                                          USBD_ACM_SERIAL_LINE_CODING        *p_line_coding,
+                                          USBD_ERR                           *p_err);
+
+void         USBD_ACM_SerialLineCodingReg(CPU_INT08U                          subclass_nbr,
+                                          USBD_ACM_SERIAL_LINE_CODING_CHNGD   line_coding_chngd,
+                                          void                               *p_arg,
+                                          USBD_ERR                           *p_err);
+
+void         USBD_ACM_SerialLineStateSet (CPU_INT08U                          subclass_nbr,
+                                          CPU_INT08U                          events,
+                                          USBD_ERR                           *p_err);
+
+void         USBD_ACM_SerialLineStateClr (CPU_INT08U                          subclass_nbr,
+                                          CPU_INT08U                          events,
+                                          USBD_ERR                           *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                 DEFINED IN OS'S usbd_acm_serial_os.c
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_ACM_SERIAL_CFG_MAX_NBR_DEV
+#error  "USBD_ACM_SERIAL_CFG_MAX_NBR_DEV not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+
+#elif   (USBD_ACM_SERIAL_CFG_MAX_NBR_DEV < 1u)
+#error  "USBD_ACM_SERIAL_CFG_MAX_NBR_DEV illegally #define'd in 'usbd_cfg.h'[MUST be >= 1]"
+
+#elif   (USBD_ACM_SERIAL_CFG_MAX_NBR_DEV > USBD_CDC_CFG_MAX_NBR_DEV)
+#error  "USBD_ACM_SERIAL_CFG_MAX_NBR_DEV illegally #define'd in 'usbd_cfg.h' [MUST be >= USBD_CDC_CFG_MAX_NBR_DEV]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/CDC/usbd_cdc.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/CDC/usbd_cdc.h
new file mode 100644
index 0000000..368e06b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/CDC/usbd_cdc.h
@@ -0,0 +1,419 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                USB COMMUNICATIONS DEVICE CLASS (CDC)
+*
+* File          : usbd_cdc.h
+* Version       : V4.05.00
+* Programmer(s) : FT
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_CDC_MODULE_PRESENT
+#define  USBD_CDC_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                CDC INVALID INSTANCE NUMBERS DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBD_CDC_NBR_NONE                      DEF_INT_08U_MAX_VAL
+#define  USBD_CDC_DATA_IF_NBR_NONE              DEF_INT_08U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                             COMMUNICATIONS CLASS SUBCLASS CODES DEFINES
+*
+* Note(s) : (1) Communication class subclass codes are defined in table 4 from the CDC specification
+*               revision 1.2.
+*********************************************************************************************************
+*/
+
+#define  USBD_CDC_SUBCLASS_RSVD                        0x00u    /* Reserved.                                            */
+#define  USBD_CDC_SUBCLASS_DLCM                        0x01u    /* Direct line         control model.                   */
+#define  USBD_CDC_SUBCLASS_ACM                         0x02u    /* Abstract            control model.                   */
+#define  USBD_CDC_SUBCLASS_TCM                         0x03u    /* Telephone           control model.                   */
+#define  USBD_CDC_SUBCLASS_MCCM                        0x04u    /* Multi-channel       control model.                   */
+#define  USBD_CDC_SUBCLASS_CAPICM                      0x05u    /* CAPI                control model.                   */
+#define  USBD_CDC_SUBCLASS_ENCM                        0x06u    /* Ethernet networking control model.                   */
+#define  USBD_CDC_SUBCLASS_ATM                         0x07u    /* ATM networking      control model.                   */
+#define  USBD_CDC_SUBCLASS_WHCM                        0x08u    /* Wireless handset    control model.                   */
+#define  USBD_CDC_SUBCLASS_DEV_MGMT                    0x09u    /* Device management.                                   */
+#define  USBD_CDC_SUBCLASS_MDLM                        0x0Au    /* Mobile direct line model.                            */
+#define  USBD_CDC_SUBCLASS_OBEX                        0x0Bu    /* OBEX.                                                */
+#define  USBD_CDC_SUBCLASS_EEM                         0x0Cu    /* Ethernet emulation model.                            */
+#define  USBD_CDC_SUBCLASS_NCM                         0x0Du    /* Network             control model.                   */
+#define  USBD_CDC_SUBCLASS_VENDOR                      0xFEu    /* Vendor specific.                                     */
+
+
+/*
+*********************************************************************************************************
+*                             COMMUNICATION CLASS PROTOCOL CODES DEFINES
+*
+* Note(s) : (1) Communication class protocol codes are defined in table 5 from the CDC specification
+*               revision 1.2.
+*********************************************************************************************************
+*/
+
+#define  USBD_CDC_COMM_PROTOCOL_NONE                   0x00u    /* No class specific protocol required.                 */
+#define  USBD_CDC_COMM_PROTOCOL_AT_V250                0x01u    /* AT Commands: V.250 etc.                              */
+#define  USBD_CDC_COMM_PROTOCOL_AT_PCCA_101            0x02u    /* AT Commands defined by PCCA-101.                     */
+#define  USBD_CDC_COMM_PROTOCOL_AT_PCCA_101_ANNEX      0x03u    /* AT Commands defined by PCCA-101 & Annex O.           */
+#define  USBD_CDC_COMM_PROTOCOL_AT_GSM_7_07            0x04u    /* AT Commands defined by GSM 07.07                     */
+#define  USBD_CDC_COMM_PROTOCOL_AT_3GPP_27_07          0x05u    /* AT Commands defined by 3GPP 27.007                   */
+#define  USBD_CDC_COMM_PROTOCOL_AT_TIA_CDMA            0x06u    /* AT Commands defined by TIA for CDMA                  */
+#define  USBD_CDC_COMM_PROTOCOL_EEM                    0x07u    /* Ethernet Emulation Model.                            */
+#define  USBD_CDC_COMM_PROTOCOL_EXT                    0xFEu    /* External Protocol: Commands defined by command ...   */
+                                                                /* ... set functional descriptor.                       */
+#define  USBD_CDC_COMM_PROTOCOL_VENDOR                 0xFFu    /* Vendor-specific.                                     */
+
+
+/*
+*********************************************************************************************************
+*                             DATA INTERFACE CLASS PROTOCOL CODES DEFINES
+*
+* Note(s) : (1) Data interface class protocol codes are defined in table 7 from the CDC specification
+*               revision 1.2.
+*********************************************************************************************************
+*/
+
+#define  USBD_CDC_DATA_PROTOCOL_NONE                   0x00u    /* No class specific protocol required.                 */
+#define  USBD_CDC_DATA_PROTOCOL_NTB                    0x01u    /* Network transfer block.                              */
+#define  USBD_CDC_DATA_PROTOCOL_PHY                    0x30u    /* Physical interface protocol for ISDN BRI.            */
+#define  USBD_CDC_DATA_PROTOCOL_HDLC                   0x31u    /* Physical interface protocol for ISDN BRI.            */
+#define  USBD_CDC_DATA_PROTOCOL_TRANS                  0x32u    /* Transparent.                                         */
+#define  USBD_CDC_DATA_PROTOCOL_Q921M                  0x50u    /* Management protocol for Q.921 data link protocol.    */
+#define  USBD_CDC_DATA_PROTOCOL_Q921                   0x51u    /* Data link protocol for Q.931.                        */
+#define  USBD_CDC_DATA_PROTOCOL_Q921TM                 0x52u    /* TEI-multiplexor for Q.921 data link protocol.        */
+#define  USBD_CDC_DATA_PROTOCOL_COMPRES                0x90u    /* Data compression procedures.                         */
+#define  USBD_CDC_DATA_PROTOCOL_Q9131                  0x91u    /* Q.931/Euro- ISDN Euro-ISDN protocol control.         */
+#define  USBD_CDC_DATA_PROTOCOL_V24                    0x92u    /* V.24 rate adaptation to ISDN.                        */
+#define  USBD_CDC_DATA_PROTOCOL_CAPI                   0x93u    /* CAPI commands.                                       */
+#define  USBD_CDC_DATA_PROTOCOL_HOST                   0xFDu    /* Host based drivers.                                  */
+#define  USBD_CDC_DATA_PROTOCOL_CDC                    0xFEu    /* The protocol(s) are described using a protocol ...   */
+                                                                /* ... unit functional descriptors on communications... */
+                                                                /* ... class.                                           */
+#define  USBD_CDC_DATA_PROTOCOL_VENDOR                 0xFFu    /* Vendor-specific.                                     */
+
+
+/*
+*********************************************************************************************************
+*                                MANAGEMENT ELEMENTS REQUESTS DEFINES
+*
+* Note(s) : (1) Management elements requests are defined in table 19 from the CDC specification
+*               revision 1.2.
+*********************************************************************************************************
+*/
+
+#define  USBD_CDC_REQ_SEND_ENCAP_COMM                  0x00u
+#define  USBD_CDC_REQ_GET_ENCAP_RESP                   0x01u
+#define  USBD_CDC_REQ_SET_COMM_FEATURE                 0x02u
+#define  USBD_CDC_REQ_GET_COMM_FEATURE                 0x03u
+#define  USBD_CDC_REQ_CLR_COMM_FEATURE                 0x04u
+#define  USBD_CDC_REQ_SET_AUX_LINE_STATE               0x10u
+#define  USBD_CDC_REQ_SET_HOOK_STATE                   0x11u
+#define  USBD_CDC_REQ_PULSE_SETUP                      0x12u
+#define  USBD_CDC_REQ_SEND_PULSE                       0x13u
+#define  USBD_CDC_REQ_SET_PULSE_TIME                   0x14u
+#define  USBD_CDC_REQ_RING_AUX_JACK                    0x15u
+#define  USBD_CDC_REQ_SET_LINE_CODING                  0x20u
+#define  USBD_CDC_REQ_GET_LINE_CODING                  0x21u
+#define  USBD_CDC_REQ_SET_CTRL_LINE_STATE              0x22u
+#define  USBD_CDC_REQ_SEND_BREAK                       0x23u
+#define  USBD_CDC_REQ_SET_RINGER_PAARMS                0x30u
+#define  USBD_CDC_REQ_GET_RINGER_PARAMS                0x31u
+#define  USBD_CDC_REQ_SET_OPERATION_PARAMS             0x32u
+#define  USBD_CDC_REQ_GET_OPERATION_PARAMS             0x33u
+#define  USBD_CDC_REQ_SET_LINE_PARAMS                  0x34u
+#define  USBD_CDC_REQ_GET_LINE_PARAMS                  0x35u
+#define  USBD_CDC_REQ_DIAL_DIGITS                      0x36u
+#define  USBD_CDC_REQ_SET_UNIT_PARAM                   0x37u
+#define  USBD_CDC_REQ_GET_UNIT_PARAM                   0x38u
+#define  USBD_CDC_REQ_CLR_UNUT_PARAM                   0x39u
+#define  USBD_CDC_REQ_GET_PROFILE                      0x3Au
+#define  USBD_CDC_REQ_SET_ETHER_MULTI_FILTER           0x40u
+#define  USBD_CDC_REQ_SET_ETHER_PWR_MGT_FILTER         0x41u
+#define  USBD_CDC_REQ_GET_ETHER_PWR_MGT_FILTER         0x42u
+#define  USBD_CDC_REQ_SET_ETHER_PKT_FILTER             0x43u
+#define  USBD_CDC_REQ_GET_ETHER_STAT                   0x44u
+#define  USBD_CDC_REQ_SET_ATM_DATA_FMT                 0x50u
+#define  USBD_CDC_REQ_GET_ATM_DATA_FMT                 0x51u
+#define  USBD_CDC_REQ_GET_ATM_DEV_STAT                 0x52u
+#define  USBD_CDC_REQ_SET_ATM_DFLT_VC                  0x53u
+#define  USBD_CDC_REQ_GET_ATM_VC_STAT                  0x54u
+#define  USBD_CDC_REQ_GET_NTB_PARAM2                   0x80u
+#define  USBD_CDC_REQ_GET_NET_ADDR                     0x81u
+#define  USBD_CDC_REQ_SET_NET_ADDR                     0x82u
+#define  USBD_CDC_REQ_GET_NTB_FMT                      0x83u
+#define  USBD_CDC_REQ_SET_NTB_FMT                      0x84u
+#define  USBD_CDC_REQ_GET_NTB_INPUT_SIZE               0x85u
+#define  USBD_CDC_REQ_SET_NTB_INPUT_SIZE               0x86u
+#define  USBD_CDC_REQ_GET_MAX_DATAGRAM_SIZE            0x87u
+#define  USBD_CDC_REQ_SET_MAX_DATAGRAM_SIZE            0x88u
+#define  USBD_CDC_REQ_GET_CRC_MODE                     0x89u
+#define  USBD_CDC_REQ_SET_CRC_MODE                     0x8Au
+
+
+/*
+*********************************************************************************************************
+*                               CDC FUNCTIONAL DESCRIPTOR TYPE DEFINES
+*
+* Note(s) : (1) Functional descriptors types are defined in table 12 from the CDC specification revision
+*               1.2.
+*********************************************************************************************************
+*/
+
+#define  USBD_CDC_DESC_TYPE_CS_IF                      0x24u
+#define  USBD_CDC_DESC_TYPE_CS_EP                      0x25u
+
+
+/*
+*********************************************************************************************************
+*                              CDC FUNCTIONAL DESCRIPTOR SUBTYPE DEFINES
+*
+* Note(s) : (1) Functional descriptors subtypes are defined in table 13 from the CDC specification
+*               revision 1.2.
+*********************************************************************************************************
+*/
+
+#define  USBD_CDC_DESC_SUBTYPE_HEADER                  0x00u    /* Header functional descriptor, which marks the ...    */
+                                                                /* ... beginning of the concatenated set of      ...    */
+                                                                /* ... functional descriptors for the interface.        */
+#define  USBD_CDC_DESC_SUBTYPE_CALL_MGMT               0x01u    /* Call management                functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_ACM                     0x02u    /* Abstract control management    functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_DLM                     0x03u    /* Direct line management         functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_TEL_RINGER              0x04u    /* Telephone Ringer               functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_TEL_CALL_LINE           0x05u    /* Telephone call and line state reporting ...          */
+                                                                /* ... capabilities               functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_UNION                   0x06u    /* Union functional descriptor.                         */
+#define  USBD_CDC_DESC_SUBTYPE_COUNTRY_SEL             0x07u    /* Country selection              functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_TEL_OPERA               0x08u    /* Telephone operational modes    functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_USB_TERM                0x09u    /* USB terminal                   functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_NET_CH_TERM             0x0Au    /* Network channel terminal descriptor.                 */
+#define  USBD_CDC_DESC_SUBTYPE_PROTOCOL_UNIT           0x0Bu    /* Protocol unit                  functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_EXT_UNIT                0x0Cu    /* Extension unit                 functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_MULTI_CH_MGMT           0x0Du    /* Multi-Channel management       functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_CAPI_CTRL               0x0Eu    /* CAPI control management        functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_ETHER_NET               0x0Fu    /* Ethernet networking            functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_ATM_NET                 0x10u    /* ATM networking                 functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_WIRELESS_CTRL           0x11u    /* Wireless handset control model functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_MOBILE DLM              0x12u    /* Mobile Direct Line Model       functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_DETAIL                  0x13u    /* MDLM Detail                    functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_DEV_MGMT                0x14u    /* Device management model        functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_OBEX                    0x15u    /* OBEX                           functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_CMD_SET                 0x16u    /* Command set                    functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_CMD_SET_DETAIL          0x17u    /* Command set detail             functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_TCM                     0x18u    /* Telephone control model        functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_OBEX_SERV               0x19u    /* OBEX service identifier        functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_NCM                     0x1Au    /* NCM                            functional descriptor.*/
+#define  USBD_CDC_DESC_SUBTYPE_VENDOR                  0xFEu    /* Vendor specific.                                     */
+
+
+/*
+*********************************************************************************************************
+*                                      CDC NOTIFIACTION DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBD_CDC_NOTIFICATION_HEADER                     8u
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         CDC SUBCLASS DRIVER
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_cdc_subclass_drv {
+                                                                /* Callback to handle management requests.              */
+    CPU_BOOLEAN  (*MngmtReq)       (       CPU_INT08U       dev_nbr,
+                                    const  USBD_SETUP_REQ  *p_setup_req,
+                                           void            *p_subclass_arg);
+
+                                                                /* Callback to handle notification completion.          */
+    void         (*NotifyCmpl)     (       CPU_INT08U      dev_nbr,
+                                           void           *p_subclass_arg);
+
+                                                                /* Callback to build functional desc.                   */
+//    void         (*FnctDesc)       (       CPU_INT08U       dev_nbr,
+//                                           void            *p_subclass_arg); // CPU_INT08U         IF_Nbr
+    void         (*FnctDesc)       (       CPU_INT08U       dev_nbr,
+                                           void            *p_subclass_arg,
+                                           CPU_INT08U       first_dci_if_nbr);
+
+                                                                /* Callback to get the size of the functional desc.     */
+    CPU_INT16U   (*FnctDescSizeGet)(       CPU_INT08U      dev_nbr,
+                                           void           *p_subclass_arg);
+} USBD_CDC_SUBCLASS_DRV;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void         USBD_CDC_Init      (USBD_ERR               *p_err);
+
+CPU_INT08U   USBD_CDC_Add       (CPU_INT08U              subclass,
+                                 USBD_CDC_SUBCLASS_DRV  *p_subclass_drv,
+                                 void                   *p_subclass_arg,
+                                 CPU_INT08U              protocol,
+                                 CPU_BOOLEAN             notify_en,
+                                 CPU_INT16U              notify_interval,
+                                 USBD_ERR               *p_err);
+
+CPU_BOOLEAN  USBD_CDC_CfgAdd    (CPU_INT08U              class_nbr,
+                                 CPU_INT08U              dev_nbr,
+                                 CPU_INT08U              cfg_nbr,
+                                 USBD_ERR               *p_err);
+
+CPU_BOOLEAN  USBD_CDC_IsConn    (CPU_INT08U              class_nbr);
+
+                                                                /* ---------- DATA INTERFACE CLASS FUNCTIONS ---------- */
+CPU_INT08U   USBD_CDC_DataIF_Add(CPU_INT08U              class_nbr,
+                                 CPU_BOOLEAN             isoc_en,
+                                 CPU_INT08U              protocol,
+                                 USBD_ERR               *p_err);
+
+CPU_INT32U   USBD_CDC_DataRx    (CPU_INT08U              class_nbr,
+                                 CPU_INT08U              data_if_nbr,
+                                 CPU_INT08U             *p_buf,
+                                 CPU_INT32U              buf_len,
+                                 CPU_INT16U              timeout,
+                                 USBD_ERR               *p_err);
+
+CPU_INT32U   USBD_CDC_DataTx    (CPU_INT08U              class_nbr,
+                                 CPU_INT08U              data_if_nbr,
+                                 CPU_INT08U             *p_buf,
+                                 CPU_INT32U              buf_len,
+                                 CPU_INT16U              timeout,
+                                 USBD_ERR               *p_err);
+
+                                                                /* ------------- NOTIFICATION FUNCTIONS -------------- */
+CPU_BOOLEAN  USBD_CDC_Notify    (CPU_INT08U              class_nbr,
+                                 CPU_INT08U              notification,
+                                 CPU_INT16U              value,
+                                 CPU_INT08U             *p_buf,
+                                 CPU_INT16U              data_len,
+                                 USBD_ERR               *p_err);
+
+#if 0
+void         USBD_CDC_GrpCreate (CPU_INT08               class_nbr,
+                                 USBD_ERR               *p_err);
+
+void         USBD_CDC_GrpAdd    (CPU_INT08U              class_nbr,
+                                 CPU_INT08U              nbr_slave,
+                                 USBD_ERR               *p_err);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_CDC_CFG_MAX_NBR_DEV
+#error  "USBD_CDC_CFG_MAX_NBR_DEV not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+
+#elif   ((USBD_CDC_CFG_MAX_NBR_DEV  < 1u              ) || \
+         (USBD_CDC_CFG_MAX_NBR_DEV >= USBD_IF_NBR_NONE))
+#error  "USBD_CDC_CFG_MAX_NBR_DEV illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_CDC_CFG_MAX_NBR_CFG
+#error  "USBD_CDC_CFG_MAX_NBR_CFG not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+
+#elif  ((USBD_CDC_CFG_MAX_NBR_CFG <  1u               ) || \
+        (USBD_CDC_CFG_MAX_NBR_CFG >= USBD_CFG_NBR_NONE))
+#error  "USBD_CDC_CFG_MAX_NBR_CFG illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_CDC_CFG_MAX_NBR_DATA_IF
+#error  "USBD_CDC_CFG_MAX_NBR_DATA_IF not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+
+#elif   ((USBD_CDC_CFG_MAX_NBR_DATA_IF <  1u              ) || \
+         (USBD_CDC_CFG_MAX_NBR_DATA_IF >= USBD_IF_NBR_NONE))
+#error  "USBD_CDC_CFG_MAX_NBR_DATA_IF illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+
+/*
+**********************************************************************************************************
+*                                             MODULE END
+**********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/HID/usbd_hid.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/HID/usbd_hid.h
new file mode 100644
index 0000000..82b8b64
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/HID/usbd_hid.h
@@ -0,0 +1,277 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        USB DEVICE HID CLASS
+*
+* File          : usbd_hid.h
+* Version       : V4.05.00
+* Programmer(s) : PW
+*                 CM
+*                 FGK
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_HID_MODULE_PRESENT
+#define  USBD_HID_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+#include  "usbd_hid_report.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBD_HID_MODULE
+#define  USBD_HID_EXT
+#else
+#define  USBD_HID_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11',
+*               section 6.2.1 for more details about HID descriptor country code.
+*
+*               (a) The country code identifies which country the hardware is localized for. Most
+*                   hardware is not localized and thus this value would be zero (0). However, keyboards
+*                   may use the field to indicate the language of the key caps.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------ COUNTRY CODES (see Note #1) ----------- */
+typedef  enum  usbd_hid_country_code {
+    USBD_HID_COUNTRY_CODE_NOT_SUPPORTED      =  0u,             /* See Note #1a.                                        */
+    USBD_HID_COUNTRY_CODE_ARABIC             =  1u,
+    USBD_HID_COUNTRY_CODE_BELGIAN            =  2u,
+    USBD_HID_COUNTRY_CODE_CANADIAN_BILINGUAL =  3u,
+    USBD_HID_COUNTRY_CODE_CANADIAN_FRENCH    =  4u,
+    USBD_HID_COUNTRY_CODE_CZECH_REPUBLIC     =  5u,
+    USBD_HID_COUNTRY_CODE_DANISH             =  6u,
+    USBD_HID_COUNTRY_CODE_FINNISH            =  7u,
+    USBD_HID_COUNTRY_CODE_FRENCH             =  8u,
+    USBD_HID_COUNTRY_CODE_GERMAN             =  9u,
+    USBD_HID_COUNTRY_CODE_GREEK              = 10u,
+    USBD_HID_COUNTRY_CODE_HEBREW             = 11u,
+    USBD_HID_COUNTRY_CODE_HUNGARY            = 12u,
+    USBD_HID_COUNTRY_CODE_INTERNATIONAL      = 13u,
+    USBD_HID_COUNTRY_CODE_ITALIAN            = 14u,
+    USBD_HID_COUNTRY_CODE_JAPAN_KATAKANA     = 15u,
+    USBD_HID_COUNTRY_CODE_KOREAN             = 16u,
+    USBD_HID_COUNTRY_CODE_LATIN_AMERICAN     = 17u,
+    USBD_HID_COUNTRY_CODE_NETHERLANDS_DUTCH  = 18u,
+    USBD_HID_COUNTRY_CODE_NORWEGIAN          = 19u,
+    USBD_HID_COUNTRY_CODE_PERSIAN_FARSI      = 20u,
+    USBD_HID_COUNTRY_CODE_POLAND             = 21u,
+    USBD_HID_COUNTRY_CODE_PORTUGUESE         = 22u,
+    USBD_HID_COUNTRY_CODE_RUSSIA             = 23u,
+    USBD_HID_COUNTRY_CODE_SLOVAKIA           = 24u,
+    USBD_HID_COUNTRY_CODE_SPANISH            = 25u,
+    USBD_HID_COUNTRY_CODE_SWEDISH            = 26u,
+    USBD_HID_COUNTRY_CODE_SWISS_FRENCH       = 27u,
+    USBD_HID_COUNTRY_CODE_SWISS_GERMAN       = 28u,
+    USBD_HID_COUNTRY_CODE_SWITZERLAND        = 29u,
+    USBD_HID_COUNTRY_CODE_TAIWAN             = 30u,
+    USBD_HID_COUNTRY_CODE_TURKISH_Q          = 31u,
+    USBD_HID_COUNTRY_CODE_UK                 = 32u,
+    USBD_HID_COUNTRY_CODE_US                 = 33u,
+    USBD_HID_COUNTRY_CODE_YUGOSLAVIA         = 34u,
+    USBD_HID_COUNTRY_CODE_TURKISH_F          = 35u
+} USBD_HID_COUNTRY_CODE;
+
+
+/*
+*********************************************************************************************************
+*                         HUMAN INTERFACE DEVICE CLASS SUBCLASS CODES DEFINES
+*
+* Note(s) : (1) Human interface device class subclass codes are defined in section 4.2 of HID
+*               specification revision 1.11.
+*********************************************************************************************************
+*/
+
+#define  USBD_HID_SUBCLASS_NONE                        0x00u    /* No subclass.                                         */
+#define  USBD_HID_SUBCLASS_BOOT                        0x01u    /* Boot interface.                                      */
+
+
+/*
+*********************************************************************************************************
+*                         HUMAN INTERFACE DEVICE CLASS PROTOCOL CODES DEFINES
+*
+* Note(s) : (1) Human interface device class protocol codes are defined in section 4.3 of HID
+*               specification revision 1.11.
+*********************************************************************************************************
+*/
+
+#define  USBD_HID_PROTOCOL_NONE                        0x00u    /* No class specific protocol.                          */
+#define  USBD_HID_PROTOCOL_KBD                         0x01u    /* Keyboard protocol.                                   */
+#define  USBD_HID_PROTOCOL_MOUSE                       0x02u    /* Mouse protocol.                                      */
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* Async comm callback.                                 */
+typedef  void  (*USBD_HID_ASYNC_FNCT)(CPU_INT08U   class_nbr,
+                                      void        *p_buf,
+                                      CPU_INT32U   buf_len,
+                                      CPU_INT32U   xfer_len,
+                                      void        *p_callback_arg,
+                                      USBD_ERR     err);
+
+                                                                /* HID desc and req callbacks.                          */
+typedef  const  struct  usbd_hid_callback {
+    CPU_BOOLEAN  (*FeatureReportGet)(CPU_INT08U   class_nbr,
+                                     CPU_INT08U     report_id,
+                                     CPU_INT08U  *p_report_buf,
+                                     CPU_INT16U     report_len);
+
+    CPU_BOOLEAN  (*FeatureReportSet)(CPU_INT08U   class_nbr,
+                                     CPU_INT08U     report_id,
+                                     CPU_INT08U  *p_report_buf,
+                                     CPU_INT16U     report_len);
+
+    CPU_INT08U   (*ProtocolGet)     (CPU_INT08U   class_nbr,
+                                     USBD_ERR    *p_err);
+
+    void         (*ProtocolSet)     (CPU_INT08U   class_nbr,
+                                     CPU_INT08U   protocol,
+                                     USBD_ERR    *p_err);
+
+    void         (*ReportSet)       (CPU_INT08U   class_nbr,
+                                     CPU_INT08U     report_id,
+                                     CPU_INT08U  *p_report_buf,
+                                     CPU_INT16U     report_len);
+} USBD_HID_CALLBACK;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                /* HID class initialization.                            */
+void         USBD_HID_Init   (USBD_ERR               *p_err);
+
+                                                                /* Add new instance of the HID class.                   */
+CPU_INT08U   USBD_HID_Add    (CPU_INT08U              subclass,
+                              CPU_INT08U              protocol,
+                              USBD_HID_COUNTRY_CODE   country_code,
+                              CPU_INT08U             *p_report_desc,
+                              CPU_INT16U              report_desc_len,
+                              CPU_INT08U             *p_phy_desc,
+                              CPU_INT16U              phy_desc_len,
+                              CPU_INT16U              interval_in,
+                              CPU_INT16U              interval_out,
+                              CPU_BOOLEAN             ctrl_rd_en,
+                              USBD_HID_CALLBACK      *p_hid_callback,
+                              USBD_ERR               *p_err);
+
+CPU_BOOLEAN  USBD_HID_CfgAdd (CPU_INT08U              class_nbr,
+                              CPU_INT08U              dev_nbr,
+                              CPU_INT08U              cfg_nbr,
+                              USBD_ERR               *p_err);
+
+CPU_BOOLEAN  USBD_HID_IsConn (CPU_INT08U              class_nbr);
+
+CPU_INT32U   USBD_HID_Wr     (CPU_INT08U              class_nbr,
+                              void                   *p_buf,
+                              CPU_INT32U              buf_len,
+                              CPU_INT16U              timeout,
+                              USBD_ERR               *p_err);
+
+void         USBD_HID_WrAsync(CPU_INT08U              class_nbr,
+                              void                   *p_buf,
+                              CPU_INT32U              buf_len,
+                              USBD_HID_ASYNC_FNCT     async_fnct,
+                              void                   *p_async_arg,
+                              USBD_ERR               *p_err);
+
+CPU_INT32U   USBD_HID_Rd     (CPU_INT08U              class_nbr,
+                              void                   *p_buf,
+                              CPU_INT32U              buf_len,
+                              CPU_INT16U              timeout,
+                              USBD_ERR               *p_err);
+
+void         USBD_HID_RdAsync(CPU_INT08U              class_nbr,
+                              void                   *p_buf,
+                              CPU_INT32U              buf_len,
+                              USBD_HID_ASYNC_FNCT     async_fnct,
+                              void                   *p_async_arg,
+                              USBD_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/HID/usbd_hid_os.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/HID/usbd_hid_os.h
new file mode 100644
index 0000000..c329ea5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/HID/usbd_hid_os.h
@@ -0,0 +1,147 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                USB HID CLASS OPERATING SYSTEM LAYER
+*
+* File          : usbd_hid_os.h
+* Version       : V4.05.00
+* Programmer(s) : FGK
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_HID_OS_MODULE_PRESENT
+#define  USBD_HID_OS_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  USBD_HID_OS_Init               (USBD_ERR    *p_err);
+
+
+void  USBD_HID_OS_InputLock          (CPU_INT08U   class_nbr,
+                                      USBD_ERR    *p_err);
+
+void  USBD_HID_OS_InputUnlock        (CPU_INT08U   class_nbr);
+
+void  USBD_HID_OS_InputDataPend      (CPU_INT08U   class_nbr,
+                                      CPU_INT16U   timeout_ms,
+                                      USBD_ERR    *p_err);
+
+void  USBD_HID_OS_InputDataPendAbort (CPU_INT08U   class_nbr);
+
+void  USBD_HID_OS_InputDataPost      (CPU_INT08U   class_nbr);
+
+
+void  USBD_HID_OS_OutputLock         (CPU_INT08U   class_nbr,
+                                      USBD_ERR    *p_err);
+
+void  USBD_HID_OS_OutputUnlock       (CPU_INT08U   class_nbr);
+
+void  USBD_HID_OS_OutputDataPendAbort(CPU_INT08U   class_nbr);
+
+void  USBD_HID_OS_OutputDataPend     (CPU_INT08U   class_nbr,
+                                      CPU_INT16U   timeout_ms,
+                                      USBD_ERR    *p_err);
+
+void  USBD_HID_OS_OutputDataPost     (CPU_INT08U   class_nbr);
+
+
+void  USBD_HID_OS_TxLock             (CPU_INT08U   class_nbr,
+                                      USBD_ERR    *p_err);
+
+void  USBD_HID_OS_TxUnlock           (CPU_INT08U   class_nbr);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/HID/usbd_hid_report.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/HID/usbd_hid_report.h
new file mode 100644
index 0000000..bf873ab
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/HID/usbd_hid_report.h
@@ -0,0 +1,401 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        USB DEVICE HID REPORT
+*
+* File          : usbd_hid_report.h
+* Version       : V4.05.00
+* Programmer(s) : FGK
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_HID_REPORT_MODULE_PRESENT
+#define  USBD_HID_REPORT_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBD_HID_REPORT_MODULE
+#define  USBD_HID_REPORT_EXT
+#else
+#define  USBD_HID_REPORT_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11'
+*               for more details about :
+*
+*               (a) SHORT  ITEM TYPES          (Section 6.2.2.2)
+*
+*               (e) MAIN   ITEMS               (Section 6.2.2.4)
+*
+*               (f) INPUT/OUTPUT/FEATURE ITEMS (Section 6.2.2.5)
+*
+*               (g) COLLECTION ITEMS           (Section 6.2.2.6)
+*
+*               (h) GLOBAL     ITEMS           (Section 6.2.2.7)
+*
+*               (i) LOCAL      ITEMS           (Section 6.2.2.7)
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ HID REPORT DESC ----------------- */
+#define  USBD_HID_ITEM_LONG                             0xFE
+                                                                /* Short item types (see Note #1a).                     */
+#define  USBD_HID_ITEM_TYPE_MAIN                        0x00
+#define  USBD_HID_ITEM_TYPE_GLOBAL                      0x04
+#define  USBD_HID_ITEM_TYPE_LOCAL                       0x08
+#define  USBD_HID_ITEM_TYPE_RESERVED                    0x0C
+                                                                /* Main item (see Note #1e).                            */
+#define  USBD_HID_MAIN_INPUT                            0x80
+#define  USBD_HID_MAIN_OUTPUT                           0x90
+#define  USBD_HID_MAIN_COLLECTION                       0xA0
+#define  USBD_HID_MAIN_FEATURE                          0xB0
+#define  USBD_HID_MAIN_ENDCOLLECTION                    0xC0
+                                                                /* Input/output/feature item (see Note #1f).            */
+#define  USBD_HID_MAIN_CONSTANT                         0x01
+#define  USBD_HID_MAIN_DATA                             0x00
+#define  USBD_HID_MAIN_VARIABLE                         0x02
+#define  USBD_HID_MAIN_ARRAY                            0x00
+#define  USBD_HID_MAIN_RELATIVE                         0x04
+#define  USBD_HID_MAIN_ABSOLUTE                         0x00
+#define  USBD_HID_MAIN_WRAP                             0x08
+#define  USBD_HID_MAIN_NOWRAP                           0x00
+#define  USBD_HID_MAIN_NONLINEAR                        0x10
+#define  USBD_HID_MAIN_LINEAR                           0x00
+#define  USBD_HID_MAIN_NOPREFERRED                      0x20
+#define  USBD_HID_MAIN_PREFERREDSTATE                   0x00
+#define  USBD_HID_MAIN_NULLSTATE                        0x40
+#define  USBD_HID_MAIN_NONULLPOSITION                   0x00
+#define  USBD_HID_MAIN_VOLATILE                         0x80
+#define  USBD_HID_MAIN_NONVOLATILE                      0x00
+#define  USBD_HID_MAIN_BUFFEREDBYTES                  0x0100
+#define  USBD_HID_MAIN_BITFIELD                       0x0000
+                                                                /* Collection item (see Note #1g).                      */
+#define  USBD_HID_COLLECTION_PHYSICAL                   0x00
+#define  USBD_HID_COLLECTION_APPLICATION                0x01
+#define  USBD_HID_COLLECTION_LOGICAL                    0x02
+#define  USBD_HID_COLLECTION_REPORT                     0x03
+#define  USBD_HID_COLLECTION_NAMEDARRAY                 0x04
+#define  USBD_HID_COLLECTION_USAGESWITCH                0x05
+#define  USBD_HID_COLLECTION_USAGEMODIFIER              0x06
+                                                                /* Global item (see Note #1h).                          */
+#define  USBD_HID_GLOBAL_USAGE_PAGE                     0x04
+#define  USBD_HID_GLOBAL_LOG_MIN                        0x14
+#define  USBD_HID_GLOBAL_LOG_MAX                        0x24
+#define  USBD_HID_GLOBAL_PHY_MIN                        0x34
+#define  USBD_HID_GLOBAL_PHY_MAX                        0x44
+#define  USBD_HID_GLOBAL_UNIT_EXPONENT                  0x54
+#define  USBD_HID_GLOBAL_UNIT                           0x64
+#define  USBD_HID_GLOBAL_REPORT_SIZE                    0x74
+#define  USBD_HID_GLOBAL_REPORT_ID                      0x84
+#define  USBD_HID_GLOBAL_REPORT_COUNT                   0x94
+#define  USBD_HID_GLOBAL_PUSH                           0xA4
+#define  USBD_HID_GLOBAL_POP                            0xB4
+                                                                /* Local item (see Note #1i).                            */
+#define  USBD_HID_LOCAL_USAGE                           0x08
+#define  USBD_HID_LOCAL_USAGE_MIN                       0x18
+#define  USBD_HID_LOCAL_USAGE_MAX                       0x28
+#define  USBD_HID_LOCAL_DESIGNATOR_INDEX                0x38
+#define  USBD_HID_LOCAL_DESIGNATOR_MIN                  0x48
+#define  USBD_HID_LOCAL_DESIGNATOR_MAX                  0x58
+#define  USBD_HID_LOCAL_STRING_INDEX                    0x78
+#define  USBD_HID_LOCAL_STRING_MIN                      0x88
+#define  USBD_HID_LOCAL_STRING_MAX                      0x98
+#define  USBD_HID_LOCAL_DELIMITER                       0xA8
+
+/*
+*********************************************************************************************************
+*                                   HID PHYSICAL DESCRIPTOR DEFINES
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices Version 1.11', Section 6.2.3.
+*********************************************************************************************************
+*/
+
+                                                                /* ---------- HID PHYSICAL DESC (see Note #1) --------- */
+                                                                /* Bias values.                                         */
+#define  USBD_HID_BIAS_NOT_APPLICABLE                      0
+#define  USBD_HID_BIAS_RIGHT_HAND                          1
+#define  USBD_HID_BIAS_LEFT_HAND                           2
+#define  USBD_HID_BIAS_BOTH_HANDS                          3
+#define  USBD_HID_BIAS_EITHER_HAND                         4
+                                                                /* Designator values.                                   */
+#define  USBD_HID_DESIGNATOR_NONE                       0x00
+#define  USBD_HID_DESIGNATOR_HAND                       0x01
+#define  USBD_HID_DESIGNATOR_EYEBALL                    0x02
+#define  USBD_HID_DESIGNATOR_EYEBROW                    0x03
+#define  USBD_HID_DESIGNATOR_EYELID                     0x04
+#define  USBD_HID_DESIGNATOR_EAR                        0x05
+#define  USBD_HID_DESIGNATOR_NOSE                       0x06
+#define  USBD_HID_DESIGNATOR_MOUTH                      0x07
+#define  USBD_HID_DESIGNATOR_UPPER_LIP                  0x08
+#define  USBD_HID_DESIGNATOR_LOWER_LIP                  0x09
+#define  USBD_HID_DESIGNATOR_JAW                        0x0A
+#define  USBD_HID_DESIGNATOR_NECK                       0x0B
+#define  USBD_HID_DESIGNATOR_UPPER_ARM                  0x0C
+#define  USBD_HID_DESIGNATOR_ELBOW                      0x0D
+#define  USBD_HID_DESIGNATOR_FOREARM                    0x0E
+#define  USBD_HID_DESIGNATOR_WRIST                      0x0F
+#define  USBD_HID_DESIGNATOR_PALM                       0x10
+#define  USBD_HID_DESIGNATOR_THUMB                      0x11
+#define  USBD_HID_DESIGNATOR_INDEX_FINGER               0x12
+#define  USBD_HID_DESIGNATOR_MIDDLE_FINGER              0x13
+#define  USBD_HID_DESIGNATOR_RING_FINGER                0x14
+#define  USBD_HID_DESIGNATOR_LITTLE_FINGER              0x15
+#define  USBD_HID_DESIGNATOR_HEAD                       0x16
+#define  USBD_HID_DESIGNATOR_SHOULDER                   0x17
+#define  USBD_HID_DESIGNATOR_HIP                        0x18
+#define  USBD_HID_DESIGNATOR_WAIST                      0x19
+#define  USBD_HID_DESIGNATOR_THIGH                      0x1A
+#define  USBD_HID_DESIGNATOR_KNEE                       0x1B
+#define  USBD_HID_DESIGNATOR_CALF                       0x1C
+#define  USBD_HID_DESIGNATOR_ANKLE                      0x1D
+#define  USBD_HID_DESIGNATOR_FOOT                       0x1E
+#define  USBD_HID_DESIGNATOR_HEEL                       0x1F
+#define  USBD_HID_DESIGNATOR_BALL_OF_FOOT               0x20
+#define  USBD_HID_DESIGNATOR_BIG_TOE                    0x21
+#define  USBD_HID_DESIGNATOR_SECOND_TOE                 0x22
+#define  USBD_HID_DESIGNATOR_THIRD_TOE                  0x23
+#define  USBD_HID_DESIGNATOR_FOURTH_TOE                 0x24
+#define  USBD_HID_DESIGNATOR_LITTLE_TOE                 0x25
+#define  USBD_HID_DESIGNATOR_BROW                       0x26
+#define  USBD_HID_DESIGNATOR_CHEEK                      0x27
+                                                                /* Qualifier values.                                    */
+#define  USBD_HID_QUALIFIER_NOT_APPLICABLE                 0
+#define  USBD_HID_QUALIFIER_RIGHT                          1
+#define  USBD_HID_QUALIFIER_LEFT                           2
+#define  USBD_HID_QUALIFIER_BOTH                           3
+#define  USBD_HID_QUALIFIER_EITHER                         4
+#define  USBD_HID_QUALIFIER_CENTER                         5
+
+/*
+*********************************************************************************************************
+*                                           HID USAGE PAGES
+*
+* Note(s) : (1) See 'Universal Serial Bus HID Usage Tables', Version 1.12, Section 3 for more details
+*               about Usage Pages.
+*
+*           (2) See 'Universal Serial Bus HID Usage Tables', Version 1.12, Section 4 for more details
+*               about Generic Desktop Page usages and controls.
+*********************************************************************************************************
+*/
+                                                                /* ------------- USAGE PAGES (see Note #1) ------------ */
+#define  USBD_HID_USAGE_PAGE_UNDEFINED                  0x00
+#define  USBD_HID_USAGE_PAGE_GENERIC_DESKTOP_CONTROLS   0x01
+#define  USBD_HID_USAGE_PAGE_SIMULATION_CONTROLS        0x02
+#define  USBD_HID_USAGE_PAGE_VR_CONTROLS                0x03
+#define  USBD_HID_USAGE_PAGE_SPORT_CONTROLS             0x04
+#define  USBD_HID_USAGE_PAGE_GAME_CONTROLS              0x05
+#define  USBD_HID_USAGE_PAGE_GENERIC_DEVICE_CONTROLS    0x06
+#define  USBD_HID_USAGE_PAGE_KEYBOARD                   0x07
+#define  USBD_HID_USAGE_PAGE_LEDS                       0x08
+#define  USBD_HID_USAGE_PAGE_BUTTON                     0x09
+#define  USBD_HID_USAGE_PAGE_ORDINAL                    0x0A
+#define  USBD_HID_USAGE_PAGE_TELEPHONY                  0x0B
+#define  USBD_HID_USAGE_PAGE_CONSUMER                   0x0C
+#define  USBD_HID_USAGE_PAGE_DIGITIZER                  0x0D
+#define  USBD_HID_USAGE_PAGE_PID_PAGE                   0x0F
+#define  USBD_HID_USAGE_PAGE_UNICODE                    0x10
+#define  USBD_HID_USAGE_PAGE_ALPHANUMERIC_DISPLAY       0x14
+#define  USBD_HID_USAGE_PAGE_MEDICAL_INSTRUMENTS        0x40
+#define  USBD_HID_USAGE_PAGE_MONITOR_0                  0x80
+#define  USBD_HID_USAGE_PAGE_MONITOR_1                  0x81
+#define  USBD_HID_USAGE_PAGE_MONITOR_2                  0x82
+#define  USBD_HID_USAGE_PAGE_MONITOR_3                  0x83
+#define  USBD_HID_USAGE_PAGE_POWER_0                    0x84
+#define  USBD_HID_USAGE_PAGE_POWER_1                    0x85
+#define  USBD_HID_USAGE_PAGE_POWER_2                    0x86
+#define  USBD_HID_USAGE_PAGE_POWER_3                    0x87
+#define  USBD_HID_USAGE_PAGE_BAR_CODE_SCANNER_PAGE      0x8C
+#define  USBD_HID_USAGE_PAGE_SCALE_PAGE                 0x8D
+#define  USBD_HID_USAGE_PAGE_MSR_DEVICES                0x8E
+#define  USBD_HID_USAGE_PAGE_POINT_OF_SALE_PAGES        0x8F
+#define  USBD_HID_USAGE_PAGE_CAMERA_CONTROL_PAGE        0x90
+#define  USBD_HID_USAGE_PAGE_ARCADE_PAGE                0x91
+
+                                                                /* -------- GENERIC DESKTOP PAGE USAGES & CTRL -------- */
+                                                                /* See Note #2.                                         */
+#define  USBD_HID_CP_POINTER                            0x01
+#define  USBD_HID_CA_MOUSE                              0x02
+#define  USBD_HID_CA_JOYSTICK                           0x04
+#define  USBD_HID_CA_GAME_PAD                           0x05
+#define  USBD_HID_CA_KEYBOARD                           0x06
+#define  USBD_HID_CA_KEYPAD                             0x07
+#define  USBD_HID_CA_MULTI_AXIS_CONTROLLER              0x08
+#define  USBD_HID_DV_X                                  0x30
+#define  USBD_HID_DV_Y                                  0x31
+#define  USBD_HID_DV_Z                                  0x32
+#define  USBD_HID_DV_WHEEL                              0x38
+#define  USBD_HID_CA_SYSTEM_CONTROL                     0x80
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  enum  usbd_hid_report_type {
+    USBD_HID_REPORT_TYPE_NONE = 0,
+    USBD_HID_REPORT_TYPE_INPUT,
+    USBD_HID_REPORT_TYPE_OUTPUT,
+    USBD_HID_REPORT_TYPE_FEATURE
+} USBD_HID_REPORT_TYPE;
+
+
+typedef  struct  usbd_hid_report_id    USBD_HID_REPORT_ID;
+
+
+struct  usbd_hid_report_id {
+    CPU_INT08U             ID;
+    CPU_INT16U             Size;
+    CPU_INT08U            *DataPtr;
+    USBD_HID_REPORT_ID    *NextPtr;
+
+    CPU_INT08U             ClassNbr;
+    CPU_INT08U             IdleCnt;
+    CPU_INT08U             IdleRate;
+    CPU_BOOLEAN            Update;
+    USBD_HID_REPORT_ID    *TmrNextPtr;
+};
+
+
+typedef  struct  usbd_hid_report {
+    CPU_BOOLEAN            HasReports;
+    CPU_INT16U             MaxInputReportSize;
+    CPU_INT16U             MaxFeatureReportSize;
+    CPU_INT08U            *MaxFeatureReportPtr;
+    CPU_INT16U             MaxOutputReportSize;
+    CPU_INT08U            *MaxOutputReportPtr;
+    USBD_HID_REPORT_ID    *Reports[3];                          /* Index 0: Input Reports; 1: Output; 2: Feature.       */
+} USBD_HID_REPORT;
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        USBD_HID_Report_Init           (       USBD_ERR               *p_err);
+
+void        USBD_HID_Report_Parse          (       CPU_INT08U              class_nbr,
+                                            const  CPU_INT08U             *p_report_data,
+                                                   CPU_INT16U                report_data_len,
+                                                   USBD_HID_REPORT        *p_report,
+                                                   USBD_ERR               *p_err);
+
+CPU_INT16U  USBD_HID_ReportID_InfoGet      (const  USBD_HID_REPORT        *p_report,
+                                                   USBD_HID_REPORT_TYPE      report_type,
+                                                   CPU_INT08U                report_id,
+                                                   CPU_INT08U            **p_buf,
+                                                   CPU_BOOLEAN            *p_is_largest,
+                                                   USBD_ERR               *p_err);
+
+CPU_INT08U  USBD_HID_ReportID_IdleGet      (const  USBD_HID_REPORT        *p_report,
+                                                   CPU_INT08U                report_id,
+                                                   USBD_ERR               *p_err);
+
+void         USBD_HID_ReportID_IdleSet     (const  USBD_HID_REPORT        *p_report,
+                                                   CPU_INT08U                report_id,
+                                                   CPU_INT08U              idle_rate,
+                                                   USBD_ERR               *p_err);
+
+CPU_BOOLEAN  USBD_HID_ReportID_IsLargestIn (const  USBD_HID_REPORT        *p_report,
+                                                   CPU_INT08U                report_id,
+                                                   USBD_ERR               *p_err);
+
+void         USBD_HID_Report_RemoveAllIdle (const  USBD_HID_REPORT        *p_report);
+
+void         USBD_HID_Report_TmrTaskHandler(void);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_HID_CFG_MAX_NBR_REPORT_ID
+#error  "USBD_HID_CFG_MAX_NBR_REPORT_ID not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_HID_CFG_MAX_NBR_REPORT_ID < 1u)
+#error  "USBD_HID_CFG_MAX_NBR_REPORT_ID illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_HID_CFG_MAX_NBR_REPORT_PUSHPOP
+#error  "USBD_HID_CFG_MAX_NBR_REPORT_PUSHPOP not #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+#if     (USBD_HID_CFG_MAX_NBR_REPORT_PUSHPOP < 0)
+#error  "USBD_HID_CFG_MAX_NBR_REPORT_PUSHPOP illegally #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/Storage/RAMDisk/usbd_storage.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/Storage/RAMDisk/usbd_storage.h
new file mode 100644
index 0000000..f4c3f87
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/Storage/RAMDisk/usbd_storage.h
@@ -0,0 +1,175 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 USB DEVICE MSC CLASS STORAGE DRIVER
+*
+*                                               RAMDISK
+*
+* File           : usbd_storage.h
+* Version        : V4.05.00
+* Programmer(s)  : FT
+*                  PW
+*                  CM
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBF_STORAGE_H
+#define  USBF_STORAGE_H
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  "../../../../Source/usbd_core.h"
+#include  "../../usbd_scsi.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  USBD_StorageInit       (USBD_ERR          *p_err);
+
+void  USBD_StorageAdd        (USBD_STORAGE_LUN  *p_storage_lun,
+                              USBD_ERR          *p_err);
+
+void  USBD_StorageCapacityGet(USBD_STORAGE_LUN  *p_storage_lun,
+                              CPU_INT64U        *p_nbr_blks,
+                              CPU_INT32U        *p_blk_size,
+                              USBD_ERR          *p_err);
+
+void  USBD_StorageRd         (USBD_STORAGE_LUN  *p_storage_lun,
+                              CPU_INT64U         blk_addr,
+                              CPU_INT32U         nbr_blks,
+                              CPU_INT08U        *p_data_buf,
+                              USBD_ERR          *p_err);
+
+void  USBD_StorageWr         (USBD_STORAGE_LUN  *p_storage_lun,
+                              CPU_INT64U         blk_addr,
+                              CPU_INT32U         nbr_blks,
+                              CPU_INT08U        *p_data_buf,
+                              USBD_ERR          *p_err);
+
+void  USBD_StorageStatusGet  (USBD_STORAGE_LUN  *p_storage_lun,
+                              USBD_ERR          *p_err);
+
+void  USBD_StorageLock       (USBD_STORAGE_LUN  *p_storage_lun,
+                              CPU_INT32U         timeout_ms,
+                              USBD_ERR          *p_err);
+
+void  USBD_StorageUnlock     (USBD_STORAGE_LUN  *p_storage_lun,
+                              USBD_ERR          *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_RAMDISK_CFG_BLK_SIZE
+#error   "USBD_RAMDISK_CFG_BLK_SIZE not #defined'd in 'app_cfg.h' [MUST be > 0]"
+
+#elif   (USBD_RAMDISK_CFG_BLK_SIZE < 1u)
+#error  "USBD_RAMDISK_CFG_BLK_SIZE illegally #define'd in 'usbd_cfg.h' [MUST be > 0]"
+#endif
+
+
+#ifndef  USBD_RAMDISK_CFG_NBR_BLKS
+#error  "USBD_RAMDISK_CFG_NBR_BLKS not #defined'd in 'app_cfg.h' [MUST be > 0]"
+
+#elif   (USBD_RAMDISK_CFG_NBR_BLKS < 1u)
+#error  "USBD_RAMDISK_CFG_NBR_BLKS illegally #define'd in 'usbd_cfg.h' [MUST be > 0]"
+#endif
+
+#ifndef  USBD_RAMDISK_CFG_NBR_UNITS
+#error  "USBD_RAMDISK_CFG_NBR_UNITS not #defined'd in 'app_cfg.h' [MUST be > 0]"
+
+#elif   (USBD_RAMDISK_CFG_NBR_UNITS < 1u)
+#error  "USBD_RAMDISK_CFG_NBR_UNITS illegally #define'd in 'usbd_cfg.h' [MUST be > 0]"
+#endif
+
+#ifndef  USBD_RAMDISK_CFG_BASE_ADDR
+#error  "USBD_RAMDISK_CFG_BASE_ADDR not #defined'd in 'app_cfg.h' [MUST be >= 0]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/Storage/uC-FS/V4/usbd_storage.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/Storage/uC-FS/V4/usbd_storage.h
new file mode 100644
index 0000000..7307bd4
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/Storage/uC-FS/V4/usbd_storage.h
@@ -0,0 +1,162 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 USB DEVICE MSC CLASS STORAGE DRIVER
+*
+*                                              uC/FS V4
+*
+* File           : usbd_storage.h
+* Version        : V4.05.00
+* Programmer(s)  : PW
+*                  JB
+*                  CM
+*********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                                  MODULE
+**********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../../../Source/usbd_core.h"
+#include  "../../../usbd_scsi.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                                 EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   STORAGE_MODULE
+#define  STORAGE_EXT
+#else
+#define  STORAGE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                                 DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                 MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  USBD_StorageInit              (USBD_ERR          *p_err);
+
+void  USBD_StorageAdd               (USBD_STORAGE_LUN  *p_storage_lun,
+                                     USBD_ERR          *p_err);
+
+void  USBD_StorageCapacityGet       (USBD_STORAGE_LUN  *p_storage_lun,
+                                     CPU_INT64U        *p_nbr_blks,
+                                     CPU_INT32U        *p_blk_size,
+                                     USBD_ERR          *p_err);
+
+void  USBD_StorageRd                (USBD_STORAGE_LUN  *p_storage_lun,
+                                     CPU_INT64U         blk_addr,
+                                     CPU_INT32U         nbr_blks,
+                                     CPU_INT08U        *p_data_buf,
+                                     USBD_ERR          *p_err);
+
+void  USBD_StorageWr                (USBD_STORAGE_LUN  *p_storage_lun,
+                                     CPU_INT64U         blk_addr,
+                                     CPU_INT32U         nbr_blks,
+                                     CPU_INT08U        *p_data_buf,
+                                     USBD_ERR          *p_err);
+
+void  USBD_StorageStatusGet         (USBD_STORAGE_LUN  *p_storage_lun,
+                                     USBD_ERR          *p_err);
+
+void  USBD_StorageLock              (USBD_STORAGE_LUN  *p_storage_lun,
+                                     CPU_INT32U         timeout_ms,
+                                     USBD_ERR          *p_err);
+
+void  USBD_StorageUnlock            (USBD_STORAGE_LUN  *p_storage_lun,
+                                     USBD_ERR          *p_err);
+
+#if (USBD_MSC_CFG_FS_REFRESH_TASK_EN == DEF_ENABLED)
+void  USBD_StorageRefreshTaskHandler(void *p_arg);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_MSC_CFG_FS_REFRESH_TASK_EN
+#error  "USBD_MSC_CFG_FS_REFRESH_TASK_EN not #defined'd in 'usbd_cfg.h' [MUST be DEF_ENABLED or DEF_DISABLED]"
+#endif
+
+
+/*
+**********************************************************************************************************
+*                                           MODULE END
+**********************************************************************************************************
+*/
+
+
+
+
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/usbd_msc.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/usbd_msc.h
new file mode 100644
index 0000000..6d01bae
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/usbd_msc.h
@@ -0,0 +1,183 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        USB DEVICE MSC CLASS
+*
+* File           : usbd_msc.h
+* Version        : V4.05.00
+* Programmer(s)  : PW
+*                  CM
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_MSC_MODULE_PRESENT
+#define  USBD_MSC_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBD_MSC_MODULE
+#define  USBD_MSC_EXT
+#else
+#define  USBD_MSC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                                DEFINES
+*
+* Note(s) : (1) The T10 VENDOR IDENTIFICATION field contains 8 bytes of left-aligned ASCII data
+*               identifying the vendor of the product. The T10 vendor identification shall be one
+*               assigned by INCITS.
+*               The PRODUCT IDENTIFICATION field contains 16 bytes of left-aligned ASCII data
+*               defined by the vendor.
+*               See 'SCSI Primary Commands - 3 (SPC-3)', section 6.4.2 for more details about
+*               Standard INQUIRY data format.
+*********************************************************************************************************
+*/
+
+                                                                /* ---- STANDARD INQUIRY DATA FORMAT (see Note #1) ---- */
+#define  USBD_MSC_DEV_MAX_VEND_ID_LEN                      8u
+#define  USBD_MSC_DEV_MAX_PROD_ID_LEN                     16u
+
+
+/*
+**********************************************************************************************************
+*                                             DATA TYPES
+**********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+void         USBD_MSC_Init       (       USBD_ERR    *p_err);
+
+CPU_INT08U   USBD_MSC_Add        (       USBD_ERR    *p_err);
+
+CPU_BOOLEAN  USBD_MSC_CfgAdd     (       CPU_INT08U   class_nbr,
+                                         CPU_INT08U   dev_nbr,
+                                         CPU_INT08U   cfg_nbr,
+                                         USBD_ERR    *p_err);
+
+void         USBD_MSC_LunAdd     (const  CPU_CHAR    *p_store_name,
+                                         CPU_INT08U   class_nbr,
+                                         CPU_CHAR    *p_vend_id,
+                                         CPU_CHAR    *p_prod_id,
+                                         CPU_INT32U   prod_rev_level,
+                                         CPU_BOOLEAN  rd_only,
+                                         USBD_ERR    *p_err);
+
+CPU_BOOLEAN  USBD_MSC_IsConn     (       CPU_INT08U   class_nbr);
+
+void         USBD_MSC_TaskHandler(       CPU_INT08U   class_nbr);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_MSC_CFG_MAX_NBR_DEV
+#error  "USBD_MSC_CFG_MAX_NBR_DEV not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_MSC_CFG_MAX_NBR_DEV < 1u)
+#error  "USBD_MSC_CFG_MAX_NBR_DEV illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_MSC_CFG_MAX_NBR_CFG
+#error  "USBD_MSC_CFG_MAX_NBR_CFG not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_MSC_CFG_MAX_NBR_CFG < 1u)
+#error  "USBD_MSC_CFG_MAX_NBR_CFG illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_MSC_CFG_MAX_LUN
+#error  "USBD_MSC_CFG_MAX_LUN not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_MSC_CFG_MAX_LUN < 1u)
+#error  "USBD_MSC_CFG_MAX_LUN illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_MSC_CFG_DATA_LEN
+#error  "USBD_MSC_CFG_DATA_LEN not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_MSC_CFG_DATA_LEN < 1u)
+#error  "USBD_MSC_CFG_DATA_LEN illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/usbd_msc_os.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/usbd_msc_os.h
new file mode 100644
index 0000000..8573b4b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/usbd_msc_os.h
@@ -0,0 +1,127 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                USB MSC CLASS OPERATING SYSTEM LAYER
+*
+* File          : usbd_msc_os.h
+* Version       : V4.05.00
+* Programmer(s) : PW
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_MSC_OS_MODULE_PRESENT
+#define  USBD_MSC_OS_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  USBD_MSC_OS_Init          (USBD_ERR     *p_err);
+
+void  USBD_MSC_OS_CommSignalPost(CPU_INT08U    class_nbr,
+                                 USBD_ERR     *p_err);
+
+void  USBD_MSC_OS_CommSignalPend(CPU_INT08U    class_nbr,
+                                 CPU_INT32U    timeout,
+                                 USBD_ERR     *p_err);
+
+void  USBD_MSC_OS_CommSignalDel (CPU_INT08U    class_nbr,
+                                 USBD_ERR     *p_err);
+
+void  USBD_MSC_OS_EnumSignalPost(USBD_ERR     *p_err);
+
+void  USBD_MSC_OS_EnumSignalPend(CPU_INT32U    timeout,
+                                 USBD_ERR     *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/usbd_scsi.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/usbd_scsi.h
new file mode 100644
index 0000000..f4ba33b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/MSC/usbd_scsi.h
@@ -0,0 +1,192 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          USB DEVICE MSC SCSI
+*
+* File           : usbd_scsi.h
+* Version        : V4.05.00
+* Programmer(s)  : PW
+*                  CM
+*********************************************************************************************************
+*/
+
+/*
+**********************************************************************************************************
+*                                                 MODULE
+**********************************************************************************************************
+*/
+
+#ifndef  USBD_SCSI_H
+#define  USBD_SCSI_H
+
+
+/*
+**********************************************************************************************************
+*                                              INCLUDE FILES
+**********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+#include  "usbd_msc.h"
+
+
+/*
+**********************************************************************************************************
+*                                                 EXTERNS
+**********************************************************************************************************
+*/
+
+#ifdef   USBD_SCSI_MODULE
+#define  USBD_SCSI_EXT
+#else
+#define  USBD_SCSI_EXT  extern
+#endif
+
+
+/*
+**********************************************************************************************************
+*                                                 DEFINES
+**********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                               DATA TYPES
+**********************************************************************************************************
+*/
+
+/*
+**********************************************************************************************************
+*                                          STORAGE UNIT CONTROL
+**********************************************************************************************************
+*/
+
+typedef  struct  usbd_storage_lun {
+    CPU_INT08U    LunNbr;                                       /* Logical Unit Number.                                 */
+    CPU_CHAR     *VolStrPtr;                                    /* String uniquely identifying a logical unit.          */
+    CPU_BOOLEAN   MediumPresent;                                /* Flag indicating presence of logical unit.            */
+    CPU_BOOLEAN   LockFlag;                                     /* Flag indicating logical unit locked or not.          */
+    CPU_BOOLEAN   EjectFlag;                                    /* Flag indicating logical unit ejected by host or not. */
+} USBD_STORAGE_LUN;
+
+
+/*
+**********************************************************************************************************
+*                                        LOGICAL UNIT CHARACTERISTICS
+**********************************************************************************************************
+*/
+
+typedef  struct  usbd_lun_info {
+    CPU_INT08U   VendorId[USBD_MSC_DEV_MAX_VEND_ID_LEN];        /* Dev vendor info.                                     */
+    CPU_INT08U   ProdId[USBD_MSC_DEV_MAX_PROD_ID_LEN];          /* Dev prod ID.                                         */
+    CPU_INT32U   ProdRevisionLevel;                             /* Revision level of product.                           */
+    CPU_BOOLEAN  ReadOnly;                                      /* Wr protected or not.                                 */
+} USBD_LUN_INFO;
+
+
+/*
+**********************************************************************************************************
+*                                            LOGICAL UNIT CONTROL
+**********************************************************************************************************
+*/
+
+typedef  struct  usbd_msc_lun_ctrl {
+    CPU_INT08U       LunNbr;                                    /* LUN given by MSC IF.                                 */
+    USBD_LUN_INFO    LunInfo;                                   /* Logical unit info.                                   */
+    CPU_INT64U       NbrBlocks;                                 /* Nbr of blks supported by logical unit.               */
+    CPU_INT32U       BlockSize;                                 /* Blk size supported by logical unit.                  */
+    void            *LunArgPtr;                                 /* Ptr to the LUN specific argument.                    */
+} USBD_MSC_LUN_CTRL;
+
+
+/*
+**********************************************************************************************************
+*                                            GLOBAL VARIABLES
+**********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                                 MACRO'S
+**********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                           FUNCTION PROTOTYPES
+**********************************************************************************************************
+*/
+
+void  USBD_SCSI_Init      (      USBD_ERR          *p_err);
+
+void  USBD_SCSI_LunAdd    (      CPU_INT08U         lun_nbr,
+                                 CPU_CHAR          *p_vol_str,
+                                 USBD_ERR          *p_err);
+
+void  USBD_SCSI_CmdProcess(      USBD_MSC_LUN_CTRL  *p_lun,
+                           const CPU_INT08U         *p_cbwcb,
+                                 CPU_INT32U         *p_resp_len,
+                                 CPU_INT08U         *p_data_dir,
+                                 USBD_ERR           *p_err);
+
+void  USBD_SCSI_DataRd    (const USBD_MSC_LUN_CTRL  *p_lun,
+                                 CPU_INT08U          scsi_cmd,
+                                 CPU_INT08U         *p_data_buf,
+                                 CPU_INT32U          data_len,
+                                 CPU_INT32U         *p_ret_len,
+                                 USBD_ERR           *p_err);
+
+void  USBD_SCSI_DataWr    (const USBD_MSC_LUN_CTRL  *p_lun,
+                                 CPU_INT08U          scsi_cmd,
+                                 void               *p_data_buf,
+                                 CPU_INT32U          data_len,
+                                 USBD_ERR           *p_err);
+
+void  USBD_SCSI_Reset     (      void);
+
+void  USBD_SCSI_Conn      (const USBD_MSC_LUN_CTRL  *p_lun);
+
+void  USBD_SCSI_Unlock    (const USBD_MSC_LUN_CTRL  *p_lun,
+                                 USBD_ERR           *p_err);
+
+
+/*
+**********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+**********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                              MODULE END
+**********************************************************************************************************
+*/
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/PHDC/usbd_phdc.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/PHDC/usbd_phdc.h
new file mode 100644
index 0000000..30e6d74
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/PHDC/usbd_phdc.h
@@ -0,0 +1,239 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2013; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        USB DEVICE PHDC CLASS
+*
+* File          : usbd_phdc.h
+* Version       : V4.05.00
+* Programmer(s) : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_PHDC_CLASS_MODULE_PRESENT
+#define  USBD_PHDC_CLASS_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBD_PHDC_MODULE
+#define  USBD_PHDC_EXT
+#else
+#define  USBD_PHDC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBD_PHDC_NBR_NONE                   DEF_INT_08U_MAX_VAL
+
+
+
+/*
+*********************************************************************************************************
+*                                    LATENCY / RELIABILITY BITMAPS
+*********************************************************************************************************
+*/
+
+#define  USBD_PHDC_LATENCY_VERYHIGH_RELY_BEST           DEF_BIT_05
+#define  USBD_PHDC_LATENCY_HIGH_RELY_BEST               DEF_BIT_04
+#define  USBD_PHDC_LATENCY_MEDIUM_RELY_BEST             DEF_BIT_03
+#define  USBD_PHDC_LATENCY_MEDIUM_RELY_BETTER           DEF_BIT_02
+#define  USBD_PHDC_LATENCY_MEDIUM_RELY_GOOD             DEF_BIT_01
+#define  USBD_PHDC_LATENCY_LOW_RELY_GOOD                DEF_BIT_00
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  LATENCY_RELY_FLAGS;
+
+
+/*
+*********************************************************************************************************
+*                         ASYNCHRONOUS CALLBACK FUNCTION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  void  (*USBD_PHDC_PREAMBLE_EN_NOTIFY)(CPU_INT08U   class_nbr,
+                                               CPU_BOOLEAN  preamble_en);
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   APPLICATION FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void         USBD_PHDC_Init        (       USBD_ERR                      *p_err);
+
+CPU_INT08U   USBD_PHDC_Add         (       CPU_BOOLEAN                    data_fmt_11073,
+                                           CPU_BOOLEAN                    preamble_capable,
+                                           USBD_PHDC_PREAMBLE_EN_NOTIFY   preamble_en_notify,
+                                           CPU_INT16U                     low_latency_interval,
+                                           USBD_ERR                      *p_err);
+
+CPU_BOOLEAN  USBD_PHDC_CfgAdd      (       CPU_INT08U                     class_nbr,
+                                           CPU_INT08U                     dev_nbr,
+                                           CPU_INT08U                     cfg_nbr,
+                                           USBD_ERR                      *p_err);
+
+CPU_BOOLEAN  USBD_PHDC_IsConn      (       CPU_INT08U                     class_nbr);
+
+void         USBD_PHDC_RdCfg       (       CPU_INT08U                     class_nbr,
+                                           LATENCY_RELY_FLAGS             latency_rely,
+                                    const  CPU_INT08U                    *p_data_opaque,
+                                           CPU_INT08U                     data_opaque_len,
+                                           USBD_ERR                      *p_err);
+
+void         USBD_PHDC_WrCfg       (       CPU_INT08U                     class_nbr,
+                                           LATENCY_RELY_FLAGS             latency_rely,
+                                    const  CPU_INT08U                    *p_data_opaque,
+                                           CPU_INT08U                     data_opaque_len,
+                                           USBD_ERR                      *p_err);
+
+void         USBD_PHDC_11073_ExtCfg(       CPU_INT08U                     class_nbr,
+                                           CPU_INT16U                    *p_dev_specialization,
+                                           CPU_INT08U                     nbr_dev_specialization,
+                                           USBD_ERR                      *p_err);
+
+CPU_INT08U   USBD_PHDC_PreambleRd  (       CPU_INT08U                     class_nbr,
+                                           void                          *p_buf,
+                                           CPU_INT08U                     buf_len,
+                                           CPU_INT08U                    *p_nbr_xfer,
+                                           CPU_INT16U                     timeout,
+                                           USBD_ERR                      *p_err);
+
+CPU_INT16U   USBD_PHDC_Rd          (       CPU_INT08U                     class_nbr,
+                                           void                          *p_buf,
+                                           CPU_INT16U                     buf_len,
+                                           CPU_INT16U                     timeout,
+                                           USBD_ERR                      *p_err);
+
+void         USBD_PHDC_PreambleWr  (       CPU_INT08U                     class_nbr,
+                                           void                          *p_data_opaque,
+                                           CPU_INT08U                     data_opaque_len,
+                                           LATENCY_RELY_FLAGS             latency_rely,
+                                           CPU_INT08U                     nbr_xfers,
+                                           CPU_INT16U                     timeout,
+                                           USBD_ERR                      *p_err);
+
+void         USBD_PHDC_Wr          (       CPU_INT08U                     class_nbr,
+                                           void                          *p_buf,
+                                           CPU_INT16U                     buf_len,
+                                           LATENCY_RELY_FLAGS             latency_rely,
+                                           CPU_INT16U                     timeout,
+                                           USBD_ERR                      *p_err);
+
+void         USBD_PHDC_Reset       (       CPU_INT08U                     class_nbr);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+#ifndef  USBD_PHDC_CFG_MAX_NBR_DEV
+#error  "USBD_PHDC_CFG_MAX_NBR_DEV not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if  (USBD_PHDC_CFG_MAX_NBR_DEV < 1u)
+#error  "USBD_PHDC_CFG_MAX_NBR_DEV illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_PHDC_CFG_MAX_NBR_CFG
+#error  "USBD_PHDC_CFG_MAX_NBR_CFG not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if  (USBD_PHDC_CFG_MAX_NBR_CFG < 1u)
+#error  "USBD_PHDC_CFG_MAX_NBR_CFG illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_PHDC_CFG_DATA_OPAQUE_MAX_LEN
+#error  "USBD_PHDC_CFG_DATA_OPAQUE_MAX_LEN not #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+#if  (USBD_PHDC_CFG_DATA_OPAQUE_MAX_LEN < 0u)
+#error  "USBD_PHDC_CFG_DATA_OPAQUE_MAX_LEN illegally #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/PHDC/usbd_phdc_os.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/PHDC/usbd_phdc_os.h
new file mode 100644
index 0000000..4df4d40
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/PHDC/usbd_phdc_os.h
@@ -0,0 +1,134 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2013; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                USB PHDC CLASS OPERATING SYSTEM LAYER
+*
+* File          : usbd_phdc_os.h
+* Version       : V4.05.00
+* Programmer(s) : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_PHDC_OS_MODULE_PRESENT
+#define  USBD_PHDC_OS_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  USBD_PHDC_OS_Init        ( USBD_ERR   *p_err);
+
+void  USBD_PHDC_OS_RdLock      (CPU_INT08U   class_nbr,
+                                CPU_INT16U   timeout,
+                                USBD_ERR    *p_err);
+
+void  USBD_PHDC_OS_RdUnlock    (CPU_INT08U   class_nbr);
+
+
+void  USBD_PHDC_OS_WrBulkLock  (CPU_INT08U   class_nbr,
+                                CPU_INT08U   prio,
+                                CPU_INT16U   timeout,
+                                USBD_ERR    *p_err);
+
+void  USBD_PHDC_OS_WrBulkUnlock(CPU_INT08U   class_nbr);
+
+void  USBD_PHDC_OS_WrIntrLock  (CPU_INT08U   class_nbr,
+                                CPU_INT16U   timeout,
+                                USBD_ERR    *p_err);
+
+void  USBD_PHDC_OS_WrIntrUnlock(CPU_INT08U   class_nbr);
+
+void  USBD_PHDC_OS_Reset       (CPU_INT08U   class_nbr);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Vendor/usbd_vendor.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Vendor/usbd_vendor.h
new file mode 100644
index 0000000..e25f7dd
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Class/Vendor/usbd_vendor.h
@@ -0,0 +1,236 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        USB DEVICE VENDOR CLASS
+*
+* File          : usbd_vendor.h
+* Version       : V4.05.00
+* Programmer(s) : CM
+*                 FGK
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_VENDOR_MODULE_PRESENT
+#define  USBD_VENDOR_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbd_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBD_VENDOR_MODULE
+#define  USBD_VENDOR_EXT
+#else
+#define  USBD_VENDOR_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* App callback used for vendor-specific req.           */
+typedef  CPU_BOOLEAN  (*USBD_VENDOR_REQ_FNCT)  (       CPU_INT08U       class_nbr,
+                                                       CPU_INT08U       dev_nbr,
+                                                const  USBD_SETUP_REQ  *p_setup_req);
+
+                                                                /* App callback used for async comm.                    */
+typedef  void         (*USBD_VENDOR_ASYNC_FNCT)(       CPU_INT08U       class_nbr,
+                                                       void            *p_buf,
+                                                       CPU_INT32U       buf_len,
+                                                       CPU_INT32U       xfer_len,
+                                                       void            *p_callback_arg,
+                                                       USBD_ERR         err);
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+void         USBD_Vendor_Init             (       USBD_ERR                *p_err);
+
+CPU_INT08U   USBD_Vendor_Add              (       CPU_BOOLEAN              intr_en,
+                                                  CPU_INT16U               interval,
+                                                  USBD_VENDOR_REQ_FNCT     req_callback,
+                                                  USBD_ERR                *p_err);
+
+void         USBD_Vendor_CfgAdd           (       CPU_INT08U               class_nbr,
+                                                  CPU_INT08U               dev_nbr,
+                                                  CPU_INT08U               cfg_nbr,
+                                                  USBD_ERR                *p_err);
+
+CPU_BOOLEAN  USBD_Vendor_IsConn           (       CPU_INT08U               class_nbr);
+
+#if (USBD_CFG_MS_OS_DESC_EN == DEF_ENABLED)
+void         USBD_Vendor_MS_ExtPropertyAdd(       CPU_INT08U               class_nbr,
+                                                  CPU_INT08U               property_type,
+                                           const  CPU_INT08U              *p_property_name,
+                                                  CPU_INT16U               property_name_len,
+                                           const  CPU_INT08U              *p_property,
+                                                  CPU_INT32U               property_len,
+                                                  USBD_ERR                *p_err);
+#endif
+
+CPU_INT32U   USBD_Vendor_Rd               (       CPU_INT08U               class_nbr,
+                                                  void                    *p_buf,
+                                                  CPU_INT32U               buf_len,
+                                                  CPU_INT16U               timeout,
+                                                  USBD_ERR                *p_err);
+
+CPU_INT32U   USBD_Vendor_Wr               (       CPU_INT08U               class_nbr,
+                                                  void                    *p_buf,
+                                                  CPU_INT32U               buf_len,
+                                                  CPU_INT16U               timeout,
+                                                  CPU_BOOLEAN              end,
+                                                  USBD_ERR                *p_err);
+
+void         USBD_Vendor_RdAsync          (       CPU_INT08U               class_nbr,
+                                                  void                    *p_buf,
+                                                  CPU_INT32U               buf_len,
+                                                  USBD_VENDOR_ASYNC_FNCT   async_fnct,
+                                                  void                    *p_async_arg,
+                                                  USBD_ERR                *p_err);
+
+void         USBD_Vendor_WrAsync          (       CPU_INT08U               class_nbr,
+                                                  void                    *p_buf,
+                                                  CPU_INT32U               buf_len,
+                                                  USBD_VENDOR_ASYNC_FNCT   async_fnct,
+                                                  void                    *p_async_arg,
+                                                  CPU_BOOLEAN              end,
+                                                  USBD_ERR                *p_err);
+
+CPU_INT32U   USBD_Vendor_IntrRd           (       CPU_INT08U               class_nbr,
+                                                  void                    *p_buf,
+                                                  CPU_INT32U               buf_len,
+                                                  CPU_INT16U               timeout,
+                                                  USBD_ERR                *p_err);
+
+CPU_INT32U   USBD_Vendor_IntrWr           (       CPU_INT08U               class_nbr,
+                                                  void                     *p_buf,
+                                                  CPU_INT32U               buf_len,
+                                                  CPU_INT16U               timeout,
+                                                  CPU_BOOLEAN              end,
+                                                  USBD_ERR                *p_err);
+
+void         USBD_Vendor_IntrRdAsync      (       CPU_INT08U               class_nbr,
+                                                  void                    *p_buf,
+                                                  CPU_INT32U               buf_len,
+                                                  USBD_VENDOR_ASYNC_FNCT   async_fnct,
+                                                  void                    *p_async_arg,
+                                                  USBD_ERR                *p_err);
+
+void         USBD_Vendor_IntrWrAsync      (       CPU_INT08U               class_nbr,
+                                                  void                    *p_buf,
+                                                  CPU_INT32U               buf_len,
+                                                  USBD_VENDOR_ASYNC_FNCT   async_fnct,
+                                                  void                    *p_async_arg,
+                                                  CPU_BOOLEAN              end,
+                                                  USBD_ERR                *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_VENDOR_CFG_MAX_NBR_DEV
+#error  "USBD_VENDOR_CFG_MAX_NBR_DEV not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_VENDOR_CFG_MAX_NBR_DEV < 1u)
+#error  "USBD_VENDOR_CFG_MAX_NBR_DEV illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#ifndef  USBD_VENDOR_CFG_MAX_NBR_CFG
+#error  "USBD_VENDOR_CFG_MAX_NBR_CFG not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_VENDOR_CFG_MAX_NBR_CFG < 1u)
+#error  "USBD_VENDOR_CFG_MAX_NBR_CFG illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if (USBD_CFG_MS_OS_DESC_EN == DEF_ENABLED)
+#ifndef  USBD_VENDOR_CFG_MAX_NBR_MS_EXT_PROPERTY
+#error  "USBD_VENDOR_CFG_MAX_NBR_MS_EXT_PROPERTY not #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+
+#if     (USBD_VENDOR_CFG_MAX_NBR_MS_EXT_PROPERTY < 1u)
+#error  "USBD_VENDOR_CFG_MAX_NBR_MS_EXT_PROPERTY illegally #define'd in 'usbd_cfg.h' [MUST be >= 1]"
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Drivers/drv_lib/usbd_drv_lib.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Drivers/drv_lib/usbd_drv_lib.h
new file mode 100644
index 0000000..d0e7252
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Drivers/drv_lib/usbd_drv_lib.h
@@ -0,0 +1,139 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          USB DEVICE DRIVER
+*
+*                                           Common library
+*
+* File          : usbd_drv_lib.h
+* Version       : V4.05.00.00
+* Programmer(s) : OD
+*                 JFD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                                MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_DRV_LIB_MODULE_PRESENT
+#define  USBD_DRV_LIB_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBD_DRV_LIB_MODULE
+#define  USBD_DRV_LIB_EXT
+#else
+#define  USBD_DRV_LIB_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------- SETUP PACKET ------------------- */
+typedef  struct  usbd_drv_lib_setup_pkt {
+    CPU_INT32U  SetupPkt[2u];                                   /* Setup req buf: |Request|Value|Index|Length|          */
+} USBD_DRV_LIB_SETUP_PKT;
+
+
+                                                                /* ---------------- SETUP PACKET QUEUE ---------------- */
+typedef  struct  usbd_drv_lib_setup_pkt_q {
+    USBD_DRV_LIB_SETUP_PKT  *SetupPktTblPtr;                    /* Ptr to table that contains the Q'd setup pkt.        */
+
+    CPU_INT08U               IxIn;                              /* Ix where to put the next rxd setup pkt.              */
+    CPU_INT08U               IxOut;                             /* Ix where to get the next setup pkt to give to core.  */
+    CPU_INT08U               Nbr;                               /* Actual nbr of pkts in the buf.                       */
+    CPU_INT08U               TblLen;                            /* Len of setup pkt tbl.                                */
+} USBD_DRV_LIB_SETUP_PKT_Q;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+void  USBD_DrvLib_SetupPktQInit      (USBD_DRV_LIB_SETUP_PKT_Q  *p_setup_pkt_q,
+                                      CPU_INT08U                 q_size,
+                                      USBD_ERR                  *p_err);
+
+void  USBD_DrvLib_SetupPktQClr       (USBD_DRV_LIB_SETUP_PKT_Q  *p_setup_pkt_q);
+
+void  USBD_DrvLib_SetupPktQAdd       (USBD_DRV_LIB_SETUP_PKT_Q  *p_setup_pkt_q,
+                                      USBD_DRV                  *p_drv,
+                                      CPU_INT32U                *p_setup_pkt_buf);
+
+void  USBD_DrvLib_SetupPktQSubmitNext(USBD_DRV_LIB_SETUP_PKT_Q  *p_setup_pkt_q,
+                                      USBD_DRV                  *p_drv);
+
+
+/*
+*********************************************************************************************************
+*                                              MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Drivers/synopsys_otg_hs/usbd_drv_synopsys_otg_hs.c b/src/ucos_v1_42/micrium_source/uC-USB-Device/Drivers/synopsys_otg_hs/usbd_drv_synopsys_otg_hs.c
new file mode 100644
index 0000000..853ec50
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Drivers/synopsys_otg_hs/usbd_drv_synopsys_otg_hs.c
@@ -0,0 +1,2733 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         USB DEVICE DRIVER
+*                              SYNOPSYS (CHIPIDEA) CORE USB 2.0 OTG (HS)
+*
+* File          : usbd_drv_synopsys_otg_hs.c
+* Version       : V4.05.00.01
+* Programmer(s) : FGK
+*                 FT
+*                 OD
+*                 CM
+*********************************************************************************************************
+* Note(s)       : (1) You can find specific information about this driver at:
+*                     https://doc.micrium.com/display/USBDDRV/Synopsys_OTG_HS
+*
+*                 (2) With an appropriate BSP, this device driver will support the Full-speed and
+*                     High-speed Device Interface module on the following MCUs:
+*
+*                         NXP LPC313x series
+*                         NXP LPC185x series
+*                         NXP LPC183x series
+*                         NXP LPC182x series
+*                         NXP LPC435x series
+*                         NXP LPC433x series
+*                         NXP LPC432x series
+*                         Xilinx Zynq-7000
+*
+*                 (3) This driver has not been tested with LPC18xx/LPC43xx USB1 controller in High-Speed
+*                     mode using an external ULPI PHY.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#include  
+#include  "../../Source/usbd_core.h"
+#include  "usbd_drv_synopsys_otg_hs.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*
+* Note(s) : (1) The device controller has the following endpoint (EP) characteristics on these platforms:
+*
+*               Manufacturer | MCU or Soc   | Nbr of logical EPs | Nbr of physical EPs
+*               -------------|--------------|--------------------|--------------------
+*               NXP          | LPC313x      |       4            |         8
+*               NXP          | LPC18xx      |       6            |        12
+*               NXP          | LPC43xx      |       6            |        12
+*               xilinx       | Zinq-7000    |      12            |        24
+*
+*               Each logical endpoint is bidirectional : direction IN and OUT.
+*********************************************************************************************************
+*/
+
+                                                                /* ------------- USB CONTROLLER CONSTRAINS ------------ */
+#define  USBD_OTGHS_REG_TO                           0x0000FFFFu
+#define  USBD_OTGHS_MAX_RETRIES                             100u
+#define  USBD_OTGHS_dTD_LST_INSERT_NBR_TRIES_MAX            100u
+#define  USBD_OTGHS_dTD_NBR_PAGES                             5u
+#define  USBD_OTGHS_EP_LOG_NBR_MAX                           12u/* Max of log EPs among all platforms supported by...   */
+                                                                /* ...this drv (see Note #1).                           */
+#define  USBD_OTGHS_EP_PHY_NBR_MAX                  (USBD_OTGHS_EP_LOG_NBR_MAX * 2u)
+
+#define  USBD_OTGHS_dTD_EXT_ATTRIB_IS_COMPLETED     DEF_BIT_00
+
+#define  USBD_OTGHS_ALIGN_OCTECTS_dQH               ( 2u * (1024u))
+#define  USBD_OTGHS_ALIGN_OCTECTS_dTD               (64u * (   1u))
+#define  USBD_OTGHS_ALIGN_OCTECTS_BUF               ( 1u * (   1u))
+
+#define  USBD_OTGHS_MAX_NBR_EP_OPEN                 DEF_MIN(USBD_CFG_MAX_NBR_EP_OPEN, USBD_OTGHS_EP_PHY_NBR_MAX)
+#define  USBD_OTGHS_dTD_NBR                        (USBD_CFG_MAX_NBR_URB_EXTRA + \
+                                                    USBD_OTGHS_MAX_NBR_EP_OPEN )
+
+                                                                /* ---------- USB DEVICE REGISTER BIT DEFINES --------- */
+#define  USBD_OTGHS_DEV_ADDR_USBADDRA               DEF_BIT_24  /* Device Address Advance                               */
+                                                                /* Device Address Mask                                  */
+#define  USBD_OTGHS_DEV_ADDR_USBADDR_MASK           DEF_BIT_FIELD_32(7u, 25u)
+
+#define  USBD_OTGHS_PORTSC1_HSP                     DEF_BIT_09  /* High-Speed port                                      */
+#define  USBD_OTGHS_PORTSC1_FPR                     DEF_BIT_06  /* Force port resume.                                   */
+#define  USBD_OTGHS_PORTSC1_PFSC                    DEF_BIT_24  /* Full-Speed port                                      */
+
+                                                                /* ------ USB INTERRUPT AND STATUS REGISTER BITS ------ */
+#define  USBD_OTGHS_USBSTS_NAKI                     DEF_BIT_16  /* NAK Interrupt Bit.                                   */
+#define  USBD_OTGHS_USBSTS_AS                       DEF_BIT_15  /* Asynchronous Schedule Status.                        */
+#define  USBD_OTGHS_USBSTS_PS                       DEF_BIT_14  /* Periodic Schedule Status.                            */
+#define  USBD_OTGHS_USBSTS_RCL                      DEF_BIT_13  /* Reclamation.                                         */
+#define  USBD_OTGHS_USBSTS_HCH                      DEF_BIT_12  /* HCHaIted.                                            */
+#define  USBD_OTGHS_USBSTS_ULPI                     DEF_BIT_10  /* ULPI Interrupt.                                      */
+#define  USBD_OTGHS_USBSTS_SLI                      DEF_BIT_08  /* DCSuspend.                                           */
+#define  USBD_OTGHS_USBSTS_SRI                      DEF_BIT_07  /* SOF Received.                                        */
+#define  USBD_OTGHS_USBSTS_URI                      DEF_BIT_06  /* USB Reset Received.                                  */
+#define  USBD_OTGHS_USBSTS_AAI                      DEF_BIT_05  /* Interrupt on Async Advance.                          */
+#define  USBD_OTGHS_USBSTS_SEI                      DEF_BIT_04  /* System Error.                                        */
+#define  USBD_OTGHS_USBSTS_FRI                      DEF_BIT_03  /* Frame List Rollover.                                 */
+#define  USBD_OTGHS_USBSTS_PCI                      DEF_BIT_02  /* Port Change Detect.                                  */
+#define  USBD_OTGHS_USBSTS_UEI                      DEF_BIT_01  /* USB Error Interrupt.                                 */
+#define  USBD_OTGHS_USBSTS_UI                       DEF_BIT_00  /* USB Interrupt.                                       */
+
+                                                                /* ------ USB INTERRUPT REGISTER (USBINTR) BITS ------- */
+#define  USBD_OTGHS_USBSTS_NAKE                     DEF_BIT_16  /* NAK Interrupt enable                                 */
+#define  USBD_OTGHS_USBSTS_ULPIE                    DEF_BIT_10  /* ULPI enable                                          */
+#define  USBD_OTGHS_USBSTS_SLE                      DEF_BIT_08  /* Sleep enable                                         */
+#define  USBD_OTGHS_USBSTS_SRE                      DEF_BIT_07  /* SOF received enable                                  */
+#define  USBD_OTGHS_USBSTS_URE                      DEF_BIT_06  /* USB reset enable                                     */
+#define  USBD_OTGHS_USBSTS_AAE                      DEF_BIT_05  /* Interrupt on Async Advance enable                    */
+#define  USBD_OTGHS_USBSTS_SEE                      DEF_BIT_04  /* System Error enable                                  */
+#define  USBD_OTGHS_USBSTS_FRE                      DEF_BIT_03  /* Frame List Rollover enable                           */
+#define  USBD_OTGHS_USBSTS_PCE                      DEF_BIT_02  /* Port Change Detect enable                            */
+#define  USBD_OTGHS_USBSTS_UEE                      DEF_BIT_01  /* USB Error Interrupt enable                           */
+#define  USBD_OTGHS_USBSTS_UE                       DEF_BIT_00  /* USB Interrupt enable                                 */
+
+                                                                /* ------------ USB INTERRUPT ENABLE BITS ------------- */
+#define  USBD_OTGHS_USB_INT_NAK                     DEF_BIT_16  /* NAK Interrupt enable                                 */
+#define  USBD_OTGHS_USB_INT_ULP                     DEF_BIT_10  /* ULPI enable                                          */
+#define  USBD_OTGHS_USB_INT_SL                      DEF_BIT_08  /* Sleep enable                                         */
+#define  USBD_OTGHS_USB_INT_SR                      DEF_BIT_07  /* SOF received enable                                  */
+#define  USBD_OTGHS_USB_INT_UR                      DEF_BIT_06  /* USB reset enable                                     */
+#define  USBD_OTGHS_USB_INT_AA                      DEF_BIT_05  /* Interrupt on Async Advance enable                    */
+#define  USBD_OTGHS_USB_INT_SE                      DEF_BIT_04  /* System Error enable                                  */
+#define  USBD_OTGHS_USB_INT_FR                      DEF_BIT_03  /* Frame List Rollover enable                           */
+#define  USBD_OTGHS_USB_INT_PC                      DEF_BIT_02  /* Port Change Detect enable                            */
+#define  USBD_OTGHS_USB_INT_UE                      DEF_BIT_01  /* USB Error Interrupt enable                           */
+#define  USBD_OTGHS_USB_INT_U                       DEF_BIT_00  /* USB Interrupt enable                                 */
+
+#define  USBD_OTGHS_USB_INT_BUS                    (USBD_OTGHS_USB_INT_PC | \
+                                                    USBD_OTGHS_USB_INT_UR | \
+                                                    USBD_OTGHS_USB_INT_SL)
+
+
+                                                                /* --------- USB COMMAND REGISTER BIT DEFINES --------- */
+                                                                /* Interrupt Threshold Control                          */
+#define  USBD_OTGHS_USBCMD_ITC_MASK                 DEF_BIT_FIELD_32(8u, 16u)
+#define  USBD_OTGHS_USBCMD_ITC_MICRO_FRAME_1        DEF_BIT_MASK(0x01u,  16u)
+#define  USBD_OTGHS_USBCMD_ITC_MICRO_FRAME_2        DEF_BIT_MASK(0x02u,  16u)
+#define  USBD_OTGHS_USBCMD_ITC_MICRO_FRAME_3        DEF_BIT_MASK(0x04u,  16u)
+#define  USBD_OTGHS_USBCMD_ITC_MICRO_FRAME_8        DEF_BIT_MASK(0x08u,  16u)
+#define  USBD_OTGHS_USBCMD_ITC_MICRO_FRAME_16       DEF_BIT_MASK(0x10u,  16u)
+#define  USBD_OTGHS_USBCMD_ITC_MICRO_FRAME_32       DEF_BIT_MASK(0x20u,  16u)
+#define  USBD_OTGHS_USBCMD_ITC_MICRO_FRAME_40       DEF_BIT_MASK(0x40u,  16u)
+
+                                                                /* Frame List size                                      */
+#define  USBD_OTGHS_USBCMD_FS_MASK                  DEF_BIT_FIELD(2u, 14u)
+#define  USBD_OTGHS_USBCMD_ATDTW                    DEF_BIT_14  /* Add dTD TripWire                                     */
+
+#define  USBD_OTGHS_USBCMD_SUTW                     DEF_BIT_13  /* Setup Tripwire                                       */
+#define  USBD_OTGHS_USBCMD_ASPE                     DEF_BIT_11  /* Asynchronous schedule park mode enable               */
+                                                                /* Asynchronous schedule park mode count                */
+#define  USBD_OTGHS_USBCMD_ASP_MASK                 DEF_BIT_FIELD(2u, 8u)
+#define  USBD_OTGHS_USBCMD_LR                       DEF_BIT_07  /* Light Host/Device controller reset                   */
+#define  USBD_OTGHS_USBCMD_IAA                      DEF_BIT_06  /* Interrupt on Async Advance Doorbell                  */
+#define  USBD_OTGHS_USBCMD_ASE                      DEF_BIT_05  /* Asynchronous schedule enable                         */
+#define  USBD_OTGHS_USBCMD_PSE                      DEF_BIT_04  /* Periodic schedule enable                             */
+
+                                                                /* Frame List Size mask                                 */
+#define  USBD_OTGHS_USBCMD_FS_SIZE_MASK             DEF_BIT_FIELD(3u, 2u)
+#define  USBD_OTGHS_USBCMD_RST                      DEF_BIT_01  /* Controller Reset                                     */
+#define  USBD_OTGHS_USBCMD_RUN                      DEF_BIT_00  /* Run Stop                                             */
+
+                                                                /* ------ USB DEVICE ADDRESS REGISTER BIT DEFINES ----- */
+                                                                /* Device Address mask                                  */
+#define  USBD_OTGHS_DEV_ADDR_USBADR_MASK            DEF_BIT_FIELD(6u, 25u)
+#define  USBD_OTGHS_DEV_ADDR_USBADRA                DEF_BIT_24  /* Device Address Advance.                              */
+
+                                                                /* ---- ENDPOINT LIST ADDRESS REGISTER BIT DEFINES ---- */
+#define  USBD_OTGHS_EP_LIST_ADDR_MASK               DEF_BIT_FIELD(21u, 11u)
+
+                                                                /* ----------- USB MODE REGISTER BIT DEFINES ---------- */
+#define  USBD_OTGHS_USBMODE_SDIS                    DEF_BIT_04  /* Stream Disable Mode                                  */
+#define  USBD_OTGHS_USBMODE_SLOM                    DEF_BIT_03  /* Setup lockout mode                                   */
+#define  USBD_OTGHS_USBMODE_ES                      DEF_BIT_02  /* Endianness selection                                 */
+                                                                /* Controller Mode mask                                 */
+
+#define  USBD_OTGHS_USBMODE_CM_MASK                 DEF_BIT_FIELD(2u, 0u)
+                                                                /* Idle   mode                                          */
+#define  USBD_OTGHS_USBMODE_CM_IDLE                 DEF_BIT_NONE
+#define  USBD_OTGHS_USBMODE_CM_DEV                  DEF_BIT_01  /* Device mode                                          */
+                                                                /* Host   mode                                          */
+#define  USBD_OTGHS_USBMODE_CM_HOST                (DEF_BIT_01 | DEF_BIT_02)
+
+                                                                /* ------- ENDPOINT CONTROL REGISTER BIT DEFINES ------ */
+#define  USBD_OTGHS_ENDPTCTRL_TX_CFG_MASK           DEF_BIT_FIELD_32(8u, 16u)
+#define  USBD_OTGHS_ENDPTCTRL_TX_EN                 DEF_BIT_23  /* Tx endpoint enable                                   */
+#define  USBD_OTGHS_ENDPTCTRL_TX_TOGGLE_RST         DEF_BIT_22  /* Data Toggle reset                                    */
+#define  USBD_OTGHS_ENDPTCTRL_TX_TOGGLE_DIS         DEF_BIT_21  /* Data Toggle inhibit                                  */
+                                                                /* Tx endpoint type mask                                */
+#define  USBD_OTGHS_ENDPTCTRL_TX_TYPE_MASK          DEF_BIT_FIELD_32(2u, 18u)
+                                                                /* Tx endpoint type control                             */
+#define  USBD_OTGHS_ENDPTCTRL_TX_TYPE_CTRL          DEF_BIT_NONE
+#define  USBD_OTGHS_ENDPTCTRL_TX_TYPE_ISOC          DEF_BIT_18  /* Tx endpoint type isochronous                         */
+#define  USBD_OTGHS_ENDPTCTRL_TX_TYPE_BULK          DEF_BIT_19  /* Tx endpoint type bulk                                */
+                                                                /* Tx endpoint type interrupt                           */
+#define  USBD_OTGHS_ENDPTCTRL_TX_TYPE_INT          (DEF_BIT_18 | DEF_BIT_19)
+#define  USBD_OTGHS_ENDPTCTRL_TX_DATA_SRC           DEF_BIT_17  /* Tx endpoint data source                              */
+#define  USBD_OTGHS_ENDPTCTRL_TX_STALL              DEF_BIT_16  /* Tx endpoint stall                                    */
+
+#define  USBD_OTGHS_ENDPTCTRL_RX_CFG_MASK           DEF_BIT_FIELD_32(8u, 0u)
+#define  USBD_OTGHS_ENDPTCTRL_RX_EN                 DEF_BIT_07  /* Rx endpoint enable                                   */
+#define  USBD_OTGHS_ENDPTCTRL_RX_TOGGLE_RST         DEF_BIT_06  /* Rx Data Toggle reset                                 */
+#define  USBD_OTGHS_ENDPTCTRL_RX_TOGGLE_DIS         DEF_BIT_05  /* Rx Data Toggle inhibit                               */
+                                                                /* Rx endpoint type mask                                */
+#define  USBD_OTGHS_ENDPTCTRL_RX_TYPE_MASK          DEF_BIT_FIELD_32(2u, 2u)
+                                                                /* Rx endpoint type control                             */
+#define  USBD_OTGHS_ENDPTCTRL_RX_TYPE_CTRL          DEF_BIT_NONE
+#define  USBD_OTGHS_ENDPTCTRL_RX_TYPE_ISOC          DEF_BIT_02  /* Rx endpoint type isochronous                         */
+#define  USBD_OTGHS_ENDPTCTRL_RX_TYPE_BULK          DEF_BIT_03  /* Rx endpoint type bulk                                */
+                                                                /* Rx endpoint type interrupt                           */
+#define  USBD_OTGHS_ENDPTCTRL_RX_TYPE_INT          (DEF_BIT_02 | DEF_BIT_03)
+#define  USBD_OTGHS_ENDPTCTRL_RX_DATA_SRC           DEF_BIT_01  /* Rx endpoint data source                              */
+#define  USBD_OTGHS_ENDPTCTRL_RX_STALL              DEF_BIT_00  /* Rx endpoint stall                                    */
+
+#define  USBD_OTGHS_ENDPTCOMPLETE_TX_MASK           DEF_BIT_FIELD_32(USBD_OTGHS_EP_LOG_NBR_MAX, 16u)
+#define  USBD_OTGHS_ENDPTCOMPLETE_RX_MASK           DEF_BIT_FIELD_32(USBD_OTGHS_EP_LOG_NBR_MAX,  0u)
+
+#define  USBD_OTGHS_ENDPTxxxx_TX_MASK               DEF_BIT_FIELD_32(USBD_OTGHS_EP_LOG_NBR_MAX, 16u)
+#define  USBD_OTGHS_ENDPTxxxx_RX_MASK               DEF_BIT_FIELD_32(USBD_OTGHS_EP_LOG_NBR_MAX,  0u)
+
+                                                                /* -- ENDPOINT QUEUE HEAD EP CAPABILITIES BIT DEFINES - */
+                                                                /* Number of packets executed per transaction.          */
+#define  USBD_OTGHS_dQH_EP_CAP_MULT_MASK            DEF_BIT_FIELD_32(2u, 30u)
+#define  USBD_OTGHS_dQH_EP_CAP_MULT_N               DEF_BIT_MASK(0u, 30u)
+#define  USBD_OTGHS_dQH_EP_CAP_MULT_1               DEF_BIT_MASK(1u, 30u)
+#define  USBD_OTGHS_dQH_EP_CAP_MULT_2               DEF_BIT_MASK(2u, 30u)
+#define  USBD_OTGHS_dQH_EP_CAP_MULT_3               DEF_BIT_MASK(3u, 30u)
+
+#define  USBD_OTGHS_dQH_EP_CAP_ZLTS                 DEF_BIT_29  /* Zero Length Termination Select                       */
+                                                                /* EP maximum length mask                               */
+#define  USBD_OTGHS_dQH_EP_CAP_MAX_LEN_MASK         DEF_BIT_FIELD_32(11u, 16u)
+#define  USBD_OTGHS_dQH_EP_CAP_IOS                  DEF_BIT_15  /* Interrupt on setup                                   */
+
+                                                                /* ------------ dTD_NEXT FIELD  BIT DEFINES ----------- */
+                                                                /* Next transfer element pointer mask                   */
+#define  USBD_OTGHS_dTD_dTD_NEXT_MASK               DEF_BIT_FIELD_32(27u, 5u)
+#define  USBD_OTGHS_dTD_dTD_NEXT_TERMINATE          DEF_BIT_00  /* End of transfer list indicator                       */
+
+                                                                /* -------------- TOKEN FILED BIT DEFINES ------------- */
+#define  USBD_OTGHS_dTD_TOKEN_TOTAL_BYTES_MASK      DEF_BIT_FIELD_32(15u, 16u)
+#define  USBD_OTGHS_dTD_TOKEN_IOC                   DEF_BIT_15  /* Interrupt on complete                                */
+                                                                /* Multiplier override mask                             */
+#define  USBD_OTGHS_dTD_TOKEN_MUL_OVER_MASK         DEF_BIT_FIELD_32(2u, 10u)
+
+#define  USBD_OTGHS_dTD_TOKEN_TOTAL_BYTE_MAX        0x00004000u /* Maximum number of bytes                              */
+
+#define  USBD_OTGHS_dTD_TOKEN_PAGE_SIZE             0x00001000u /* Page size 4K                                         */
+                                                                /* Status mask                                          */
+#define  USBD_OTGHS_dTD_TOKEN_STATUS_MASK           DEF_BIT_FIELD_32(8u, 0u)
+#define  USBD_OTGHS_dTD_TOKEN_STATUS_ACTIVE         DEF_BIT_07
+#define  USBD_OTGHS_dTD_TOKEN_STATUS_HALTED         DEF_BIT_06
+#define  USBD_OTGHS_dTD_TOKEN_STATUS_DATA_ERR       DEF_BIT_05
+#define  USBD_OTGHS_dTD_TOKEN_STATUS_TRAN_ERR       DEF_BIT_03
+
+#define  USBD_OTGHS_dTD_TOKEN_STATUS_ANY           (USBD_OTGHS_dTD_TOKEN_STATUS_ACTIVE   | \
+                                                    USBD_OTGHS_dTD_TOKEN_STATUS_HALTED   | \
+                                                    USBD_OTGHS_dTD_TOKEN_STATUS_DATA_ERR | \
+                                                    USBD_OTGHS_dTD_TOKEN_STATUS_TRAN_ERR)
+
+#define  USBD_OTGHS_dTD_BUF_PTR_MASK                DEF_BIT_FIELD(20u, 12u)
+
+
+                                                                /* ----------- IP_INFO REGISTER BIT DEFINES ----------- */
+#define  USBD_OTGHS_IP_INFO_IP_MASK                 DEF_BIT_FIELD_32(16u, 16u)
+#define  USBD_OTGHS_IP_INFO_MAJOR_MASK              DEF_BIT_FIELD_32(4u,  12u)
+#define  USBD_OTGHS_IP_INFO_MINOR_MASK              DEF_BIT_FIELD_32(4u,   8u)
+
+#define  USBD_LPC313X_IP_VER_2_0                             20u
+#define  USBD_LPC313X_IP_VER_2_1                             21u
+#define  USBD_LPC313X_IP_VER_2_2                             22u
+#define  USBD_LPC313X_IP_VER_2_3                             23u
+#define  USBD_LPC313X_IP_VER_2_4                             24u
+#define  USBD_LPC313X_IP_VER_2_5                             24u
+#define  USBD_LPC313X_IP_VER_2_6                             26u
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL MACROS
+*********************************************************************************************************
+*/
+
+#define  USBD_OTGHS_ENDPTxxx_GET_TX_BITS(ep_log_nbr)            (DEF_BIT32(ep_log_nbr) << 16u)
+#define  USBD_OTGHS_ENDPTxxx_GET_RX_BITS(ep_log_nbr)             DEF_BIT32(ep_log_nbr)
+
+#define  USBD_OTGHS_ENDPTxxx_GET_TX_NBR(ep_reg)                 (((ep_reg) & USBD_OTGHS_ENDPTxxxx_TX_MASK) >> 16u)
+#define  USBD_OTGHS_ENDPTxxx_GET_RX_NBR(ep_reg)                  ((ep_reg) & USBD_OTGHS_ENDPTxxxx_RX_MASK)
+
+#define  USBD_OTGHS_EP_PHY_NBR_IS_OUT(ep_phy_nbr)                DEF_BIT_IS_CLR((ep_phy_nbr), DEF_BIT_00)
+
+#define  OTGHS_DBG_STATS_EN                                      DEF_ENABLED
+
+#if (OTGHS_DBG_STATS_EN == DEF_ENABLED)
+#define  OTGHS_DBG_STATS_RESET()                                {                                                      \
+                                                                    Mem_Clr((void     *)&OTGHS_DbgStats,               \
+                                                                            (CPU_SIZE_T) sizeof(OTGHS_DBG_STATS_DRV)); \
+                                                                }
+
+#define  OTGHS_DBG_STATS_INC(stat)                              {                                                      \
+                                                                    OTGHS_DbgStats.stat++;                             \
+                                                                }
+
+#define  OTGHS_DBG_STATS_INC_IF_TRUE(stat, bool)                {                                                     \
+                                                                    if (bool == DEF_TRUE) {                           \
+                                                                        OTGHS_DBG_STATS_INC(stat);                    \
+                                                                    }                                                 \
+                                                                }
+#else
+#define  OTGHS_DBG_STATS_RESET()
+#define  OTGHS_DBG_STATS_INC(stat)
+#define  OTGHS_DBG_STATS_INC_IF_TRUE(stat, bool)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*
+* Note(s) : (1) The registers map structure is a merged of NXP LPC313x, LPC18xx, LPC43xx and Xilinx
+*               Zynq-7000 USB device controllers' registers interfaces.
+*               The registers in the table below are the registers interfaces differences between the
+*               different platforms, that is the register listed belongs only to one of the platforms.
+*               All other registers are common to all platforms.
+*
+*               Offset  | NXP LPC313x/LPC18xx/LPC43xx | Xilinx Zynq-7000
+*
+*               0x000                                   ID
+*               0x004                                   HWGENERAL
+*               0x008                                   HWHOST
+*               0x00C                                   HWDEVICE
+*               0x010                                   HWTXBUF
+*               0x014                                   HWRXBUF
+*               ...
+*               0x020     IP_INFO
+*               ...
+*               0x080                                   GPTIMER0LD
+*               0x084                                   GPTIMER0CTRL
+*               0x088                                   GPTIMER1LD
+*               0x08C                                   GPTIMER1CTRL
+*               0x090                                   SBUSCFG
+*               ...
+*               0x16C                                   IC_USB
+*               0x170                                   ULPI_VIEWPORT
+*
+*
+*           (1) The endpoint's device Queue Head (dQH) is where all transfers are managed. The dQH is a 48 byte
+*               data structure, but must be aligned on 64-byte boundaries. The remaining 16 bytes will be used
+*               to store the device Transfer Descriptor (dTD) link list information.
+*
+*                                          0            1                 N
+*        --     +-----------+  Current  +-----+      +-----+           +-----+
+*         |     |           |---------->| dTD |----->| dTD |--- .... ->| dTD |----|
+*      48 Bytes |   dQH     |           +-----+      +-----+           +-----+
+*         |     |           |      Next    |             |                |
+*         |     |           |--------------|-------------|                |
+*        --     +-----------+              |                              |
+*         |     |  Head     |--------------|                              |
+*         |     +-----------+                                             |
+*         |     |  Tail     |---------------------------------------------|
+*      16 Bytes +-----------+
+*         |     | #Entries  |-----> Number of elements of the dTD's link list
+*         |     |-----------|
+*         |     | #dTD Rdy  |-----> Number of completed dTDs
+*        --     ------------+
+*
+*
+*           (2) The size of the dTD is 28 bytes. The dTD must be be aligned to 8-DWord boundaries.
+*               the remaining 36 bytes are used to store extra information.
+*
+*        -    --   +---------------+      +------+               +-----+
+*        |     |   |   dTD_Next    |----->| dTD  |----- ... ---->| dTD |
+*        |     |   +---------------+      +------+               +-----+
+*        |    dTD  |     Token     |
+*        |     |   +---------------+         +---------+
+*     dTD_EXT  |   | BufPtrs[0..4] |----| |->|xxxxxxxxx| 0       - BufPtr[0]   : Always points to the first byte in the data
+*        |    --   +---------------+    | |  +---------+                         buffer that is available
+*        |         |   BufAddr     |----|-|  |xxxxxxxxx| 1
+*        -         +---------------+    |    +---------+
+*                                       |    |xxxxxxxxx| 2        - BufAddr    : Always points to the beginning of the data buffer.
+*                                       |    +---------+
+*                                       |    |    .    |            +--------+
+*                                       |    |    .    |            |xxxxxxxx| = Used block
+*                                       |    |    .    |            +--------+
+*                                       |    +---------+
+*                                       |--->|         | n - 1      +--------+
+*                                            +---------+            |        | = Free block
+*                                            |         |  n         +--------+
+*                                            +---------+
+*
+*********************************************************************************************************
+*/
+
+typedef  struct usbd_otgfs_usb_reg {                            /* See Note #1.                                         */
+                                                                /* ------ IDENTIFICATION CONFIGURATION CONSTANTS ------ */
+    CPU_REG32  ID;                                              /* R 0x000 Identification register                      */
+    CPU_REG32  HWGENERAL;                                       /* R 0x004 General hardware parameters                  */
+    CPU_REG32  HWHOST;                                          /* R 0x008 Host hardware parameters                     */
+    CPU_REG32  HWDEVICE;                                        /* R 0x00C Device hardware parameters                   */
+    CPU_REG32  HWTXBUF;                                         /* R 0x010 TX Buffer hardware parameters                */
+    CPU_REG32  HWRXBUF;                                         /* R 0x014 RX Buffer hardware parameters                */
+    CPU_REG08  RESERVED0[6u];
+    CPU_REG32  IP_INFO;                                         /* R 0x020 IP number and version number                 */
+    CPU_REG32  RESERVED1[23u];
+                                                                /* ------------ GENERAL PURPOSE TIMERS ---------------  */
+    CPU_REG32  GPTIMER0LD;                                      /* R/W 0x080 General-purpose timer 0 load value         */
+    CPU_REG32  GPTIMER0CTRL;                                    /* R/W 0x084 General-purpose timer 0 control            */
+    CPU_REG32  GPTIMER1LD;                                      /* R/W 0x088 General-purpose timer 1 load value         */
+    CPU_REG32  GPTIMER1CTRL;                                    /* R/W 0x08C General-purpose timer 1 control            */
+                                                                /* --------------- AXI INTERCONNECT ------------------- */
+    CPU_REG32  SBUSCFG;                                         /* R/W 0x090 DMA Master AHB burst mode                  */
+    CPU_REG32  RESERVED2[27u];
+                                                                /* -------- CONTROLLER CAPABILITIES CONSTANTS --------- */
+    CPU_REG32  CAPLENGTH;                                       /* R 0x100 Capability register length                   */
+    CPU_REG32  HCSPARAMS;                                       /* R 0x104 Host controller structural parameters        */
+    CPU_REG32  HCCPARAMS;                                       /* R 0x108 Host controller capability parameters        */
+    CPU_REG32  RESERVED3[5u];
+    CPU_REG32  DCIVERSION;                                      /* R 0x120 Device interface version number              */
+    CPU_REG32  DCCPARAMS;                                       /* R 0x124 Device controller capability parameters      */
+    CPU_REG32  RESERVED4[6u];
+                                                                /* -------- INTERRUPTS AND ENDPOINT POINTERS ---------- */
+    CPU_REG32  USBCMD;                                          /* R/W 0x140 USB command                                */
+    CPU_REG32  USBSTS;                                          /* R/W 0x144 USB status                                 */
+    CPU_REG32  USBINTR;                                         /* R/W 0x148 USB interrupt enable                       */
+    CPU_REG32  FRINDEX;                                         /* R/W 0x14C USB frame index                            */
+    CPU_REG32  RESERVED5;
+    CPU_REG32  DEV_ADDR;                                        /* R/W 0x154 USB Device Address                         */
+    CPU_REG32  EP_LST_ADDR;                                     /* R/W 0x158 Next asynchronous list addr/addr of  ...   */
+                                                                /*           ... of endpoint list in memory             */
+    CPU_REG32  TTCTRL;                                          /* R/W 0x15C Asynchronous buffer stat for embedded TT   */
+                                                                /* ------------------ MISCELLANEOUS ------------------- */
+    CPU_REG32  BURSTSIZE;                                       /* R/W 0x160 Programmable burst size                    */
+    CPU_REG32  TXFILLTUNING;                                    /* R/W 0x164 Host transmit pre-buffer packet tuning     */
+    CPU_REG32  TXTTFILLTUNING;                                  /* R/W 0x168 Host TT tx pre-buffer packet tuning        */
+    CPU_REG32  IC_USB;                                          /* R/W 0x16C Low and fast speed control                 */
+    CPU_REG32  ULPI_VIEWPORT;                                   /* R/W 0x170 ULPI viewport.                             */
+    CPU_REG32  RESERVED6;                                       /* Reserved bits.                                       */
+                                                                /* ---------------- ENDPOINT CONTROL ------------------ */
+    CPU_REG32  ENDPTNAK;                                        /* R/W 0x178 Endpoint NAK                               */
+    CPU_REG32  ENDPTNAKEN;                                      /* R/W 0x17C Endpoint NAK Enable                        */
+    CPU_REG32  CONFIGFLAG;                                      /* R   0x180 Configured flag register                   */
+    CPU_REG32  PORTSC1;                                         /* R/W 0x184 Port status/control 1                      */
+    CPU_REG32  RESERVED7[7u];
+                                                                /* ------------------ MODE CONTROL -------------------- */
+    CPU_REG32  OTGSC;                                           /* R/W 0x1A4 OTG status and control                     */
+    CPU_REG32  USBMODE;                                         /* R/W 0x1A8 USB device mode                            */
+                                                                /* -------- ENDPOINT CONFIGURATION AND CONTROL -------- */
+    CPU_REG32  ENDPTSETUPSTAT;                                  /* R/W 0x1AC Endpoint setup status                      */
+    CPU_REG32  ENDPTPRIME;                                      /* R/W 0x1B0 Endpoint initialization                    */
+    CPU_REG32  ENDPTFLUSH;                                      /* R/W 0x1B4 Endpoint de-initialization                 */
+    CPU_REG32  ENDPTSTATUS;                                     /* R   0x1B8 Endpoint status                            */
+    CPU_REG32  ENDPTCOMPLETE;                                   /* R/W 0x1BC Endpoint complete                          */
+    CPU_REG32  ENDPTCTRLx[USBD_OTGHS_EP_LOG_NBR_MAX];           /*           Endpoint control registers                 */
+}  USBD_OTGHS_REG;
+
+                                                                /* --- ENDPOINT TRANSFER DESCRIPTOR (dTD) DATA TYPE --- */
+typedef  struct  usbd_otgfs_dtd {
+    CPU_REG32  dTD_NextPtr;                                     /* Next Link Pointer                                    */
+    CPU_REG32  Token;                                           /* DTD token                                            */
+    CPU_REG32  BufPtrs[5u];                                     /* Buffer pointer (Page n, n = [0..4])                  */
+} USBD_OTGHS_dTD;
+
+                                                                /* -------------- dTD EXTENDED DATA TYPE -------------- */
+typedef  struct  usbd_otgfs_dtd_ext {
+    CPU_REG32   dTD_NextPtr;                                    /* Next link pointer.                                   */
+    CPU_REG32   Token;                                          /* dTD token.                                           */
+    CPU_REG32   BufPtrs[5u];                                    /* Buffer pointer (Page n, n = [0..4]).                 */
+    CPU_INT32U  BufAddr;                                        /* Buffer address.                                      */
+    CPU_INT32U  BufLen;                                         /* Buffer length.                                       */
+    CPU_REG32   Attrib;                                         /* Attributes of the dTD.                               */
+} USBD_OTGHS_dTD_EXT;
+
+                                                                /* -------- ENDPOINT QUEUE HEAD (dQH) DATA TYPE ------- */
+typedef  struct  usbd_otgfs_dqh {
+    CPU_REG32            EpCap;                                 /* Endpoint capabilities                                */
+    CPU_REG32            dTD_CurrPtr;                           /* Current dTD pointer used by HW only.                 */
+    USBD_OTGHS_dTD       OverArea;                              /* Overlay Area                                         */
+    CPU_INT32U           Reserved0;
+    CPU_REG32            SetupBuf[2u];                          /* Setup buffer                                         */
+                                                                /* ------------------ dTD's LINK LIST ----------------- */
+    USBD_OTGHS_dTD_EXT  *dTD_LstHeadPtr;                        /* dTD's link list head pointer                         */
+    USBD_OTGHS_dTD_EXT  *dTD_LstTailPtr;                        /* dTD's link list tail pointer                         */
+    CPU_REG32            dTD_LstNbrEntries;                     /* dTD's link list number of entries                    */
+    CPU_INT32U           Unused;                                /* Unused space                                         */
+} USBD_OTGHS_dQH;
+
+                                                                /* --------------- OTGHS CTRLR VARIANCE --------------- */
+typedef  enum  usbd_otghs_ctrlr {
+    USBD_NXP_OTGHS_CTRLR_LPCXX_USBX = 0u,
+    USBD_XILINX_OTGHS_CTRLR_ZYNQ
+} USBD_OTGHS_CTRLR;
+
+                                                                /* ---------- DRIVER INTERNAL DATA DATA TYPE ---------- */
+typedef  struct  usbd_drv_data {
+    USBD_OTGHS_dQH    *dQH_Tbl;
+    MEM_POOL           dTD_MemPool;
+    CPU_INT08U         hw_rev;
+#if (USBD_CFG_MAX_NBR_URB_EXTRA > 0u)
+    CPU_INT08U        *dTD_UsageTbl;
+#endif
+    CPU_BOOLEAN        Suspend;
+    USBD_OTGHS_CTRLR   Ctrlr;
+} USBD_DRV_DATA;
+
+#if (OTGHS_DBG_STATS_EN == DEF_ENABLED)
+typedef  struct  dbg_ep {
+    CPU_INT32U   AbortCnt;
+    CPU_INT32U   StallCnt;
+#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)
+    CPU_INT32U   BufNotAlignedOnCacheLine;
+#endif
+
+    CPU_INT32U   TxStartedCnt;
+    CPU_INT32U   TxEpPrimedCnt;
+    CPU_INT32U   TxEndptcmplRegCnt;
+    CPU_INT32U   TxCmplFromIsrCnt;
+
+    CPU_INT32U   RxStartedCnt;
+    CPU_INT32U   RxEpPrimedCnt;
+    CPU_INT32U   RxEndptcmplRegCnt;
+    CPU_INT32U   RxCmplFromIsrCnt;
+    CPU_INT32U   RxCompletedCnt;
+
+    CPU_INT32U   dTD_LstInsert_BufSpan4KBoundaryCnt;
+    CPU_INT32U   dTD_LstInsert_LstEmptyCnt;
+    CPU_INT32U   dTD_LstInsert_LstNotEmptyCnt;
+    CPU_INT32U   dTD_LstInsert_ListNonEmpty_PrimeAlreadyDoneByHW_InsertionOK;
+    CPU_INT32U   dTD_LstInsert_LstNonEmpty_MaxRetriesReached_InsertionNOK;
+    CPU_INT32U   dTD_LstInsert_LstNonEmpty_GoodStatusInEndptstatusReg_InsertionOK;
+    CPU_INT32U   dTD_LstInsert_LstNonEmpty_PrimeDoneBySW_InsertionOK;
+
+    CPU_INT32U   dTD_LstRemove_LstLastElementCnt;
+    CPU_INT32U   dTD_LstRemove_LstNonEmptyCnt;
+} OTGHS_DBG_EP;
+
+typedef  struct  otgfs_dbg_stats_drv {
+    CPU_INT32U    ISR_SetupProcess_VersionLessThan2_3Cnt;
+    CPU_INT32U    ISR_SetupProcess_VersionGreaterThan2_3Cnt;
+
+    OTGHS_DBG_EP  EP_Tbl[USBD_OTGHS_EP_PHY_NBR_MAX];
+} OTGHS_DBG_STATS_DRV;
+#endif
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)
+extern  CPU_INT32U  CPU_Cache_Linesize;
+#endif
+
+#if (OTGHS_DBG_STATS_EN == DEF_ENABLED)
+OTGHS_DBG_STATS_DRV  OTGHS_DbgStats;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                             USB DEVICE CONTROLLER DRIVER API PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void         USBD_DrvInit       (USBD_DRV     *p_drv,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvStart      (USBD_DRV     *p_drv,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvStop       (USBD_DRV     *p_drv);
+
+static  CPU_BOOLEAN  USBD_DrvAddrSet    (USBD_DRV     *p_drv,
+                                         CPU_INT08U    dev_addr);
+
+static  void         USBD_DrvAddrEn     (USBD_DRV     *p_drv,
+                                         CPU_INT08U    dev_addr);
+
+static  CPU_BOOLEAN  USBD_DrvCfgSet     (USBD_DRV     *p_drv,
+                                         CPU_INT08U    cfg_val);
+
+static  void         USBD_DrvCfgClr     (USBD_DRV     *p_drv,
+                                         CPU_INT08U    cfg_val);
+
+static  CPU_INT16U   USBD_DrvGetFrameNbr(USBD_DRV     *p_drv);
+
+static  void         USBD_DrvEP_Open    (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U    ep_type,
+                                         CPU_INT16U    max_pkt_size,
+                                         CPU_INT08U    transaction_frame,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_Close   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr);
+
+static  CPU_INT32U   USBD_DrvEP_RxStart (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  CPU_INT32U   USBD_DrvEP_Rx      (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_RxZLP   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         USBD_ERR     *p_err);
+
+static  CPU_INT32U   USBD_DrvEP_Tx      (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_TxStart (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_TxZLP   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         USBD_ERR     *p_err);
+
+static  CPU_BOOLEAN  USBD_DrvEP_Abort   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr);
+
+static  CPU_BOOLEAN  USBD_DrvEP_Stall   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_BOOLEAN   state);
+
+static  void         USBD_DrvISR_Handler(USBD_DRV     *p_drv);
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------- dTD's LINK LIST FUNCTIONS ------------ */
+static  void         USBD_OTGHS_dTD_LstInsert(USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_phy_nbr,
+                                              CPU_INT08U  *p_data,
+                                              CPU_INT16U   len,
+                                              USBD_ERR    *p_err);
+
+static  CPU_BOOLEAN  USBD_OTGHS_dTD_LstRemove(USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_phy_nbr);
+
+static  CPU_BOOLEAN  USBD_OTGHS_dTD_LstEmpty (USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_phy_nbr);
+
+static  void         USBD_OTGHS_SetupProcess (USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_log_nbr);
+
+static  void         USBD_OTGHS_SoftRst      (USBD_DRV    *p_drv);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                  USB DEVICE CONTROLLER DRIVER API
+*********************************************************************************************************
+*/
+
+USBD_DRV_API  USBD_DrvAPI_Synopsys_OTG_HS = { USBD_DrvInit,
+                                              USBD_DrvStart,
+                                              USBD_DrvStop,
+                                              USBD_DrvAddrSet,
+                                              USBD_DrvAddrEn,
+                                              USBD_DrvCfgSet,
+                                              USBD_DrvCfgClr,
+                                              USBD_DrvGetFrameNbr,
+                                              USBD_DrvEP_Open,
+                                              USBD_DrvEP_Close,
+                                              USBD_DrvEP_RxStart,
+                                              USBD_DrvEP_Rx,
+                                              USBD_DrvEP_RxZLP,
+                                              USBD_DrvEP_Tx,
+                                              USBD_DrvEP_TxStart,
+                                              USBD_DrvEP_TxZLP,
+                                              USBD_DrvEP_Abort,
+                                              USBD_DrvEP_Stall,
+                                              USBD_DrvISR_Handler,
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     DRIVER INTERFACE FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvInit()
+*
+* Description : Initialize the device.
+*
+*                   1) Allocate software resources.
+*                   2) Call BSP Init() function.
+*
+* Argument(s) : p_drv   Pointer to device driver structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE       Device successfully initialized.
+*                               USBD_ERR_ALLOC      Memory allocation failed.
+*                               USBD_ERR_FAIL       No maximum physical endpoint number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DevInit() via 'p_drv_api->Init()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvInit (USBD_DRV    *p_drv,
+                            USBD_ERR    *p_err)
+{
+    USBD_DRV_BSP_API  *p_bsp_api;
+    USBD_DRV_DATA     *p_drv_data;
+    CPU_INT08U         ep_phy_nbr_max;
+    LIB_ERR            err_lib;
+
+
+                                                                /* Allocate driver internal data.                       */
+    p_drv->DataPtr = Mem_HeapAlloc(              sizeof(USBD_DRV_DATA),
+                                                 sizeof(CPU_DATA),
+                                   (CPU_SIZE_T *)0,
+                                                &err_lib);
+    if (p_drv->DataPtr == (void *)0) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    Mem_Clr((void *)p_drv->DataPtr,
+                   (sizeof(USBD_DRV_DATA)));
+
+    p_drv_data = (USBD_DRV_DATA  *)p_drv->DataPtr;
+
+    Mem_PoolCreate(             &p_drv_data->dTD_MemPool,       /* Create EP device transfer descriptor memory pool.    */
+                   (void       *)0,                             /* From heap.                                           */
+                                 0u,
+                                 USBD_OTGHS_dTD_NBR,            /* Take into account extra URBs if used.                */
+                                (sizeof(USBD_OTGHS_dTD_EXT)),
+                                 USBD_OTGHS_ALIGN_OCTECTS_dTD,
+                   (CPU_SIZE_T *)0,
+                                &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    ep_phy_nbr_max = USBD_EP_MaxPhyNbrGet(p_drv->DevNbr);       /* Get max phy EP used by the device.                   */
+    if (ep_phy_nbr_max == USBD_EP_PHY_NONE) {
+        *p_err = USBD_ERR_FAIL;
+         return;
+    }
+    ep_phy_nbr_max++;                                           /* Inc because max nbf or phy EP returned is 0-based.   */
+                                                                /* Allocate EP Queue Head data.                         */
+    p_drv_data->dQH_Tbl = (USBD_OTGHS_dQH *)Mem_HeapAlloc(              (sizeof(USBD_OTGHS_dQH) * ep_phy_nbr_max),
+                                                                         USBD_OTGHS_ALIGN_OCTECTS_dQH,
+                                                          (CPU_SIZE_T  *)0,
+                                                                        &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    Mem_Clr((void  *) p_drv_data->dQH_Tbl,
+                     (sizeof(USBD_OTGHS_dQH) * (ep_phy_nbr_max)));
+
+#if (USBD_CFG_MAX_NBR_URB_EXTRA > 0u)
+                                                                /* Alloc tbl tracking nbr of dTD used by ongoing... */
+                                                                /* ...xfers for all open EP.                        */
+    p_drv_data->dTD_UsageTbl = (CPU_INT08U *)Mem_HeapAlloc(             (sizeof(CPU_INT08U) * ep_phy_nbr_max),
+                                                                        (sizeof(CPU_DATA)),
+                                                           (CPU_SIZE_T *)0,
+                                                                        &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    Mem_Clr((void *)p_drv_data->dTD_UsageTbl,
+                   (sizeof(CPU_INT08U) * ep_phy_nbr_max));
+#endif
+
+    p_drv_data->Suspend = DEF_FALSE;
+
+    p_bsp_api = p_drv->BSP_API_Ptr;                             /* Get driver BSP API reference.                        */
+    if (p_bsp_api->Init != (void *)0) {
+        p_bsp_api->Init(p_drv);                                 /* Call board/chip specific device ctrlr init fnct.     */
+    }
+
+    OTGHS_DBG_STATS_RESET();
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvStart()
+*
+* Description : Start device operation :
+*
+*                   (1) Enable device controller bus state interrupts.
+*                   (2) Call board/chip specific connect function.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE    Device successfully connected.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DevStart() via 'p_drv_api->Start()'.
+*
+* Note(s)     : (1) Typically, the start function activates the pull-down on the D- pin to simulate
+*                   attachment to host. Some MCUs/MPUs have an internal pull-down that is activated by a
+*                   device controller register; for others, this may be a GPIO pin. Additionally, interrupts
+*                   for reset and suspend are activated.
+*
+*               (2) Since the CPU frequency could be higher than OTG module clock, a timeout is needed
+*                   to reset the OTG controller successfully.
+*
+*               (3) The NXP MCUs implementing the Synopsys USB IP defines a specific register at offset
+*                   0x20 giving information about the IP version. This register does NOT exist on Xilinx
+*                   Zynq-7000 SoC and Freescale K6x, K7x, iMx6. This register allows a different
+*                   Setup packet processing for some specific versions of the USB IP for NXP MCUs.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvStart (USBD_DRV  *p_drv,
+                             USBD_ERR  *p_err)
+{
+    USBD_DRV_BSP_API  *p_bsp_api;
+    USBD_DRV_DATA     *p_drv_data;
+    USBD_OTGHS_REG    *p_reg;
+    CPU_INT16U         reg_to;
+    CPU_INT32U         reg_ip_info;
+
+
+    p_bsp_api  =  p_drv->BSP_API_Ptr;                           /* Get driver BSP API reference.                        */
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_reg      = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    p_reg->USBCMD = USBD_OTGHS_USBCMD_RST;                      /* Reset controller (see Note #2)                       */
+    reg_to        = USBD_OTGHS_REG_TO;
+    while ((reg_to                                  > 0) &&
+           ((p_reg->USBCMD & USBD_OTGHS_USBCMD_RST) != 0)) {
+        reg_to--;
+    }
+
+    reg_ip_info = p_reg->IP_INFO;
+    if (reg_ip_info != 0u) {                                    /* See Note #3.                                         */
+        p_drv_data->Ctrlr   = USBD_NXP_OTGHS_CTRLR_LPCXX_USBX;
+        p_drv_data->hw_rev  = (CPU_INT08U)(CPU_INT32U)(((p_reg->IP_INFO & USBD_OTGHS_IP_INFO_MAJOR_MASK) >> 12u) * 10u);
+        p_drv_data->hw_rev += (CPU_INT08U)(CPU_INT32U)(((p_reg->IP_INFO & USBD_OTGHS_IP_INFO_MINOR_MASK) >>  8u));
+    } else {
+        p_drv_data->Ctrlr = USBD_XILINX_OTGHS_CTRLR_ZYNQ;
+    }
+
+    p_reg->USBMODE = USBD_OTGHS_USBMODE_CM_DEV;                 /* Set device mode                                      */
+
+    p_reg->USBINTR     = DEF_BIT_NONE;                          /* Disable all interrupts                               */
+    p_reg->EP_LST_ADDR = (CPU_INT32U)p_drv_data->dQH_Tbl;
+
+    DEF_BIT_SET(p_reg->USBMODE, USBD_OTGHS_USBMODE_SLOM);       /* Disable setup lockout                                */
+    DEF_BIT_CLR(p_reg->USBMODE, USBD_OTGHS_USBMODE_SDIS);       /* Enable double priming on both Rx and Tx.             */
+
+    USBD_OTGHS_SoftRst(p_drv);                                  /* Perform software reset                               */
+
+    DEF_BIT_CLR(p_reg->USBCMD, USBD_OTGHS_USBCMD_ITC_MASK);     /* Dev ctrlr fires USB intr immediately.                */
+
+    p_reg->USBINTR = USBD_OTGHS_USB_INT_UR                      /* Enable the Reset and Suspend interrupt               */
+                   | USBD_OTGHS_USB_INT_SL;
+
+    if (p_drv->CfgPtr->Spd == USBD_DEV_SPD_FULL) {
+        DEF_BIT_SET(p_reg->PORTSC1, USBD_OTGHS_PORTSC1_PFSC);   /* Force FS.                                            */
+    }
+
+    DEF_BIT_SET(p_reg->USBCMD, USBD_OTGHS_USBCMD_RUN);          /* Set the RUN bit                                      */
+
+    if (p_bsp_api->Conn != (void *)0) {
+        p_bsp_api->Conn();                                      /* Call board/chip specific connect function.           */
+    }
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvStop()
+*
+* Description : Stop device operation.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DevStop() via 'p_drv_api->Stop()'.
+*
+* Note(s)     : Typically, the stop function performs the following operations:
+*               (1) Clear and disable USB interrupts.
+*               (2) Disconnect from the USB host (e.g, reset the pull-down on the D- pin).
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvStop (USBD_DRV  *p_drv)
+{
+    USBD_DRV_BSP_API  *p_bsp_api;
+    USBD_OTGHS_REG    *p_reg;
+
+
+    p_bsp_api =  p_drv->BSP_API_Ptr;                            /* Get driver BSP API reference.                        */
+    p_reg     = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    p_reg->USBINTR = DEF_BIT_NONE;
+
+    if (p_bsp_api->Disconn != (void *)0) {
+        p_bsp_api->Disconn();
+    }
+
+    DEF_BIT_CLR(p_reg->USBCMD, USBD_OTGHS_USBCMD_RUN);          /* Clear the RUN bit                                    */
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvAddrSet()
+*
+* Description : Assign an address to device.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               dev_addr    Device address assigned by the host.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_StdReqDev() via 'p_drv_api->AddrSet()'.
+*
+* Note(s)     : (1) For device controllers that have hardware assistance to enable the device address after
+*                   the status stage has completed, the assignment of the device address can also be
+*                   combined with enabling the device address mode.
+*
+*               (2) For device controllers that change the device address immediately, without waiting the
+*                   status phase to complete, see USBD_DrvAddrEn().
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvAddrSet (USBD_DRV    *p_drv,
+                                      CPU_INT08U   dev_addr)
+{
+    USBD_OTGHS_REG  *p_reg;
+
+
+    p_reg           = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_reg->DEV_ADDR = ((dev_addr << 25u) & USBD_OTGHS_DEV_ADDR_USBADDR_MASK) |
+                                           USBD_OTGHS_DEV_ADDR_USBADDRA;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvAddrEn()
+*
+* Description : Enable address on device.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               dev_addr    Device address assigned by the host.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_StdReqHandler() via 'p_drv_api->AddrEn()'.
+*
+* Note(s)     : (1) For device controllers that have hardware assistance to enable the device address after
+*                   the status stage has completed, no operation needs to be performed.
+*
+*               (2) For device controllers that change the device address immediately, without waiting the
+*                   status phase to complete, the device address must be set and enabled.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvAddrEn (USBD_DRV    *p_drv,
+                              CPU_INT08U   dev_addr)
+{
+    (void)&p_drv;
+    (void)&dev_addr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvCfgSet()
+*
+* Description : Bring device into configured state.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               cfg_val     Configuration value.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_CfgOpen() via 'p_drv_api->CfgSet()'.
+*
+* Note(s)     : Typically, the set configuration function sets the device as configured. For some
+*               controllers, this may not be necessary.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvCfgSet (USBD_DRV    *p_drv,
+                                     CPU_INT08U   cfg_val)
+{
+    (void)&p_drv;
+    (void)&cfg_val;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvCfgClr()
+*
+* Description : Bring device into de-configured state.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               cfg_val     Configuration value.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_CfgClose() via 'p_drv_api->CfgClr()'.
+*
+* Note(s)     : (1) Typically, the clear configuration function sets the device as not being configured.
+*                   For some controllers, this may not be necessary.
+*
+*               (2) This functions in invoked after a bus reset or before the status stage of some
+*                   SET_CONFIGURATION requests.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvCfgClr (USBD_DRV    *p_drv,
+                              CPU_INT08U   cfg_val)
+{
+    (void)&p_drv;
+    (void)&cfg_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvGetFrameNbr()
+*
+* Description : Retrieve current frame number.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : Frame number.
+*
+* Caller(s)   : USBD_EP_Open() via 'p_drv_api->GetFrameNbr()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  USBD_DrvGetFrameNbr (USBD_DRV  *p_drv)
+{
+    CPU_INT16U       frame_nbr;
+    USBD_OTGHS_REG  *p_reg;
+
+
+    p_reg = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    frame_nbr = (p_reg->FRINDEX >> 3u);                         /* Lower 3 bits are used only for micro-frames.         */
+
+    return (frame_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvEP_Open()
+*
+* Description : Open and configure a device endpoint, given its characteristics (e.g., endpoint type,
+*               endpoint address, maximum packet size, etc).
+*
+* Argument(s) : p_drv               Pointer to device driver structure.
+*
+*               ep_addr             Endpoint address.
+*
+*               ep_type             Endpoint type :
+*
+*                                       USBD_EP_TYPE_CTRL,
+*                                       USBD_EP_TYPE_ISOC,
+*                                       USBD_EP_TYPE_BULK,
+*                                       USBD_EP_TYPE_INTR.
+*
+*               max_pkt_size        Maximum packet size.
+*
+*               transaction_frame   Endpoint transactions per frame.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE               Endpoint successfully opened.
+*                               USBD_ERR_EP_INVALID_ADDR    Invalid endpoint address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Open() via 'p_drv_api->EP_Open()',
+*               USBD_CtrlOpen().
+*
+* Note(s)     : (1) Typically, the endpoint open function performs the following operations:
+*
+*                   (a) Validate endpoint address, type and maximum packet size.
+*                   (b) Configure endpoint information in the device controller. This may include not
+*                       only assigning the type and maximum packet size, but also making certain that
+*                       the endpoint is successfully configured (or 'realized' or 'mapped'). For some
+*                       device controllers, this may not be necessary.
+*
+*               (2) If the endpoint address is valid, then the endpoint open function should validate
+*                   the attributes allowed by the hardware endpoint :
+*
+*                   (a) The maximum packet size 'max_pkt_size' should be validated to match hardware
+*                       capabilities.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_Open (USBD_DRV    *p_drv,
+                               CPU_INT08U   ep_addr,
+                               CPU_INT08U   ep_type,
+                               CPU_INT16U   max_pkt_size,
+                               CPU_INT08U   transaction_frame,
+                               USBD_ERR    *p_err)
+{
+    USBD_OTGHS_dQH  *p_dqh;
+    USBD_OTGHS_REG  *p_reg;
+    USBD_DRV_DATA   *p_drv_data;
+    CPU_BOOLEAN      ep_dir_in;
+    CPU_INT08U       ep_log_nbr;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT32U       reg_val;
+    CPU_SR_ALLOC();
+
+
+    ep_dir_in  =  USBD_EP_IS_IN(ep_addr);                       /* Get EP direction.                                    */
+    ep_log_nbr =  USBD_EP_ADDR_TO_LOG(ep_addr);                 /* Get EP logical  number.                              */
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);                 /* Get EP physical number.                              */
+    p_reg      = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+
+                                                                /* -------------- ENDPOINT CONFIGURATION -------------- */
+                                                                /* Prepare locally the EP cfg.                          */
+    reg_val = USBD_OTGHS_ENDPTCTRL_TX_EN |                      /* Enable EP Tx (i.e. IN direction).                    */
+              USBD_OTGHS_ENDPTCTRL_RX_EN;                       /* Enable EP Rx (i.e. OUT direction).                   */
+
+    switch (ep_type) {                                          /* Set the EP Tx and Rx type.                           */
+        case USBD_EP_TYPE_CTRL:
+             DEF_BIT_SET(reg_val, USBD_OTGHS_ENDPTCTRL_TX_TYPE_CTRL |
+                                  USBD_OTGHS_ENDPTCTRL_RX_TYPE_CTRL);
+             break;
+
+
+        case USBD_EP_TYPE_ISOC:
+             DEF_BIT_SET(reg_val, USBD_OTGHS_ENDPTCTRL_TX_TYPE_ISOC |
+                                  USBD_OTGHS_ENDPTCTRL_RX_TYPE_ISOC);
+             break;
+
+
+        case USBD_EP_TYPE_INTR:
+             DEF_BIT_SET(reg_val, USBD_OTGHS_ENDPTCTRL_TX_TYPE_INT |
+                                  USBD_OTGHS_ENDPTCTRL_RX_TYPE_INT);
+             break;
+
+
+        case USBD_EP_TYPE_BULK:
+             DEF_BIT_SET(reg_val, USBD_OTGHS_ENDPTCTRL_TX_TYPE_BULK |
+                                  USBD_OTGHS_ENDPTCTRL_RX_TYPE_BULK);
+             break;
+
+
+        default:                                                /* 'default' case intentionally empty.                  */
+             break;
+    }
+
+    if (ep_type != USBD_EP_TYPE_CTRL) {                         /* Reset Tx & Rx data toggle.                           */
+        DEF_BIT_SET(reg_val, USBD_OTGHS_ENDPTCTRL_TX_TOGGLE_RST);
+        DEF_BIT_SET(reg_val, USBD_OTGHS_ENDPTCTRL_RX_TOGGLE_RST);
+    }
+
+    CPU_CRITICAL_ENTER();
+    if (ep_dir_in == DEF_FALSE) {                               /* OUT Endpoints                                        */
+                                                                /* Reset reg upper half to keep only Rx related bits.   */
+        reg_val &= USBD_OTGHS_ENDPTCTRL_RX_CFG_MASK;
+        DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_OTGHS_ENDPTCTRL_RX_CFG_MASK);
+    } else {                                                    /* IN Endpoints                                         */
+                                                                /* Reset reg lower half to keep only Tx related bits.   */
+        reg_val &= USBD_OTGHS_ENDPTCTRL_TX_CFG_MASK;
+        DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_OTGHS_ENDPTCTRL_TX_CFG_MASK);
+    }
+
+    DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr], reg_val);        /* Apply the local EP cfg to EP ctrl register.          */
+
+                                                                /* --------- ENDPOINT QUEUE HEAD CONFIGURATION -------- */
+    reg_val = ((max_pkt_size << 16u) & USBD_OTGHS_dQH_EP_CAP_MAX_LEN_MASK);
+
+    if ((ep_type   == USBD_EP_TYPE_CTRL) &&
+        (ep_dir_in == DEF_FALSE)) {
+        DEF_BIT_SET(reg_val              , USBD_OTGHS_dQH_EP_CAP_IOS);
+        DEF_BIT_SET(p_reg->ENDPTSETUPSTAT, DEF_BIT32(ep_log_nbr));
+    }
+
+    if ((ep_type == USBD_EP_TYPE_CTRL) ||
+        (ep_type == USBD_EP_TYPE_BULK) ||
+        (ep_type == USBD_EP_TYPE_INTR)) {
+        DEF_BIT_SET(reg_val, USBD_OTGHS_dQH_EP_CAP_ZLTS);
+    }
+
+    if (ep_type == USBD_EP_TYPE_ISOC) {
+        if (transaction_frame == 1u) {
+            DEF_BIT_SET(reg_val, USBD_OTGHS_dQH_EP_CAP_MULT_1);
+        } else if (transaction_frame == 2u) {                   /* #### This case must be tested.                       */
+            DEF_BIT_SET(reg_val, USBD_OTGHS_dQH_EP_CAP_MULT_2);
+        } else if (transaction_frame == 3u) {                   /* #### This case must be tested.                       */
+            DEF_BIT_SET(reg_val, USBD_OTGHS_dQH_EP_CAP_MULT_3);
+        }
+    }
+
+    p_dqh->EpCap                = reg_val;
+    p_dqh->OverArea.dTD_NextPtr = USBD_OTGHS_dTD_dTD_NEXT_TERMINATE;
+
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_OTGHS_dQH));      /* Write cached memory block back to RAM.               */
+
+    CPU_CRITICAL_EXIT();
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_Close()
+*
+* Description : Close a device endpoint, and uninitialize/clear endpoint configuration in hardware.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Close() via 'p_drv_api->EP_Close()',
+*               USBD_CtrlOpen().
+*
+* Note(s)     : Typically, the endpoint close function clears the endpoint information in the device
+*               controller. For some controllers, this may not be necessary.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_Close (USBD_DRV    *p_drv,
+                                CPU_INT08U   ep_addr)
+{
+    USBD_OTGHS_REG  *p_reg;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT08U       ep_log_nbr;
+
+
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);
+    ep_log_nbr =  USBD_EP_ADDR_TO_LOG(ep_addr);
+    p_reg      = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+
+                                                                /* Disable EP to avoid undefined behavior.              */
+    if (USBD_EP_IS_IN(ep_addr)) {
+        DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_OTGHS_ENDPTCTRL_TX_EN);
+    } else {
+        DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_OTGHS_ENDPTCTRL_RX_EN);
+    }
+
+    (void)USBD_OTGHS_dTD_LstEmpty(p_drv, ep_phy_nbr);           /*Remove any left dTDs.                                 */
+                                                                /* Reset EP ctrl reg.                                   */
+    if (USBD_EP_IS_IN(ep_addr)) {
+        DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_OTGHS_ENDPTCTRL_TX_CFG_MASK);
+    } else {
+        DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_OTGHS_ENDPTCTRL_RX_CFG_MASK);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvEP_RxStart()
+*
+* Description : Configure endpoint with buffer to receive data.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to data buffer.
+*
+*               buf_len     Length of the buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE           Receive successfully configured.
+*                               USBD_ERR_RX             Generic Rx error.
+*                               USBD_ERR_EP_QUEUING     Unable to enqueue xfer.
+*
+* Return(s)   : Maximum number of octets that will be received, if NO error(s).
+*
+*               0,                                              otherwise.
+*
+* Caller(s)   : USBD_EP_ProcessAsyncRxStart() via 'p_drv_api->EP_RxStart()',
+*               USBD_EP_Rx() via 'p_drv_api->EP_RxStart()',
+*               USBD_EP_RxZLP() via 'p_drv_api->EP_RxStart()'.
+*
+* Note(s)     : (1) When the CPU cache is enabled, this code ensures that the buffer start address is
+*                   aligned on the cache line size. If not, the nearest address from the initial buffer
+*                   start address is computed. This address is aligned on the cache line. The number of
+*                   octets to flush or invalidate will be increased accordingly to take into account
+*                   the buffer size plus the address adjustment.
+*
+*               (2) When performing a OUT transfer, the received data will have to be cache invalidated
+*                   so that the CPU can read the most up-to-date data from the cache. Before letting the
+*                   USB device controller process the IN transfer and write the received data into the
+*                   receive buffer, cache flushing the buffer is required. If the buffer comes from the
+*                   stack and its start address is not aligned on a cache line, the flush operation will
+*                   flush from the nearest cache line aligned address. It will ensure that when
+*                   invalidating the receive buffer in the function USBD_DrvEP_Rx(), there is no
+*                   corruption of other memory locations close to the receive buffer.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  USBD_DrvEP_RxStart (USBD_DRV    *p_drv,
+                                        CPU_INT08U   ep_addr,
+                                        CPU_INT08U  *p_buf,
+                                        CPU_INT32U   buf_len,
+                                        USBD_ERR    *p_err)
+{
+    USBD_OTGHS_REG  *p_reg;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT32U       ep_pkt_len;
+
+
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);
+    p_reg      = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+
+                                                                /* Force one transaction.                               */
+    ep_pkt_len =  DEF_MIN(buf_len, USBD_OTGHS_dTD_TOKEN_TOTAL_BYTE_MAX);
+
+    DEF_BIT_CLR(p_reg->USBINTR, USBD_OTGHS_USB_INT_U);          /* Disable interrupts.                                  */
+
+#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)                      /* See Note #1.                                         */
+    {
+        CPU_INT08U  *p_cache_aligned_buf_addr = DEF_NULL;
+        CPU_INT32U   len;
+        CPU_INT08U   remainder;
+
+
+        remainder = (CPU_INT08U)(((CPU_INT32U)p_buf) % CPU_Cache_Linesize);
+        if (remainder != 0u) {
+            p_cache_aligned_buf_addr = p_buf - remainder;
+            len                      = ep_pkt_len + remainder;
+            OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].BufNotAlignedOnCacheLine);
+        } else {
+            p_cache_aligned_buf_addr = p_buf;
+            len                      = ep_pkt_len;
+        }
+
+        CPU_DCACHE_RANGE_FLUSH(p_cache_aligned_buf_addr, len);  /* See Note #2.                                         */
+    }
+#endif
+
+    USBD_OTGHS_dTD_LstInsert(            p_drv,
+                                         ep_phy_nbr,
+                                         p_buf,
+                             (CPU_INT16U)ep_pkt_len,
+                                         p_err);
+
+    OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].RxStartedCnt);
+
+    DEF_BIT_SET(p_reg->USBINTR, USBD_OTGHS_USB_INT_U);          /* Enable interrupts.                                   */
+
+    if (*p_err == USBD_ERR_FAIL) {
+       *p_err = USBD_ERR_RX;
+    }
+
+    return (ep_pkt_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvEP_Rx()
+*
+* Description : Receive the specified amount of data from device endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to data buffer.
+*
+*               buf_len     Length of the buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Data successfully received.
+*                               USBD_ERR_RX     Generic Rx error.
+*
+* Return(s)   : Number of octets received, if NO error(s).
+*
+*               0,                         otherwise.
+*
+* Caller(s)   : USBD_EP_Rx() via 'p_drv_api->EP_Rx()',
+*               USBD_EP_Process().
+*
+* Note(s)     : (1) See Note #1 in function 'USBD_DrvEP_RxStart()'.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  USBD_DrvEP_Rx (USBD_DRV    *p_drv,
+                                   CPU_INT08U   ep_addr,
+                                   CPU_INT08U  *p_buf,
+                                   CPU_INT32U   buf_len,
+                                   USBD_ERR    *p_err)
+{
+    USBD_OTGHS_REG  *p_reg;
+    USBD_DRV_DATA   *p_drv_data;
+    USBD_OTGHS_dQH  *p_dqh;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT16U       xfer_len_rxd;
+    CPU_INT32U       ep_buf_len;
+    CPU_INT32U       ep_token;
+    CPU_SR_ALLOC();
+
+    (void)&p_buf;
+
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);
+    p_reg      = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+    ep_buf_len =  DEF_MIN(buf_len, USBD_OTGHS_dTD_TOKEN_TOTAL_BYTE_MAX);
+
+    DEF_BIT_CLR(p_reg->USBINTR, USBD_OTGHS_USB_INT_U);          /* Disable interrupts.                                  */
+
+#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)                      /* See Note #1.                                         */
+    {
+        CPU_INT08U  *p_cache_aligned_buf_addr = DEF_NULL;
+        CPU_INT32U   len;
+        CPU_INT08U   remainder;
+
+
+        remainder = (CPU_INT08U)(((CPU_INT32U)p_buf) % CPU_Cache_Linesize);
+        if (remainder != 0u) {
+            p_cache_aligned_buf_addr = p_buf - remainder;
+            len                      = ep_buf_len + remainder;
+        } else {
+            p_cache_aligned_buf_addr = p_buf;
+            len                      = ep_buf_len;
+        }
+
+        CPU_DCACHE_RANGE_INV(p_cache_aligned_buf_addr, len);    /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+    }
+#endif
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_OTGHS_dQH));
+    CPU_DCACHE_RANGE_INV(p_dqh->dTD_LstHeadPtr, sizeof(USBD_OTGHS_dTD_EXT));
+
+                                                                /* Chk for err.                                         */
+    ep_token = p_dqh->dTD_LstHeadPtr->Token;
+
+    if (DEF_BIT_IS_SET_ANY(ep_token, USBD_OTGHS_dTD_TOKEN_STATUS_ANY) == DEF_YES) {
+        if (DEF_BIT_IS_SET(ep_token, USBD_OTGHS_dTD_TOKEN_STATUS_DATA_ERR) == DEF_YES) {
+           *p_err = USBD_ERR_DRV_BUF_OVERFLOW;                  /* Buf ovrf err can happen on any type of EP.           */
+        } else if (DEF_BIT_IS_SET(ep_token, USBD_OTGHS_dTD_TOKEN_STATUS_TRAN_ERR) == DEF_YES) {
+           *p_err = USBD_ERR_DRV_INVALID_PKT;                   /* Pkt err or fulfillment err is only on isoc EP.       */
+        } else {
+           *p_err = USBD_ERR_RX;                                /* Signal err even if no particular err is defined.     */
+        }
+     } else {
+        *p_err = USBD_ERR_NONE;
+    }
+
+                                                                /* Calc rx'd len.                                       */
+    xfer_len_rxd = (CPU_INT16U)(p_dqh->dTD_LstHeadPtr->BufLen -
+                              ((p_dqh->dTD_LstHeadPtr->Token  & USBD_OTGHS_dTD_TOKEN_TOTAL_BYTES_MASK) >> 16u));
+
+    if (xfer_len_rxd != 0u) {
+                                                                /* Chk rem data to read.                                */
+        if (xfer_len_rxd > ep_buf_len) {
+            CPU_CRITICAL_ENTER();
+                                                                /* Update size & pointer to memory buffer.              */
+            p_dqh->dTD_LstHeadPtr->Token = ((p_dqh->dTD_LstHeadPtr->Token) & USBD_OTGHS_dTD_TOKEN_TOTAL_BYTES_MASK)
+                                         + ((xfer_len_rxd << 16u)          & USBD_OTGHS_dTD_TOKEN_TOTAL_BYTES_MASK);
+                                                                /* Write cached memory block back to RAM.               */
+            CPU_DCACHE_RANGE_FLUSH(p_dqh->dTD_LstHeadPtr, sizeof(USBD_OTGHS_dTD_EXT));
+            CPU_CRITICAL_EXIT();
+        }
+    }
+
+    USBD_OTGHS_dTD_LstRemove(p_drv, ep_phy_nbr);
+    OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].RxCompletedCnt);
+
+    DEF_BIT_SET(p_reg->USBINTR, USBD_OTGHS_USB_INT_U);          /* Enable interrupts.                                   */
+
+    return (xfer_len_rxd);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_RxZLP()
+*
+* Description : Receive zero-length packet from endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Zero-length packet successfully received.
+*                               USBD_ERR_RX     Generic Rx error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_RxZLP() via 'p_drv_api->EP_RxZLP()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_RxZLP (USBD_DRV    *p_drv,
+                                CPU_INT08U   ep_addr,
+                                USBD_ERR    *p_err)
+{
+    (void)USBD_DrvEP_Rx(              p_drv,
+                                      ep_addr,
+                        (CPU_INT08U *)0u,
+                                      0u,
+                                      p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvEP_Tx()
+*
+* Description : Configure endpoint with buffer to transmit data.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to buffer of data that will be transmitted.
+*
+*               buf_len     Number of octets to transmit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Transmit successfully configured.
+*
+* Return(s)   : Number of octets transmitted, if NO error(s).
+*
+*               0,                            otherwise.
+*
+* Caller(s)   : USBD_EP_Tx() via 'p_drv_api->EP_Tx()',
+*               USBD_EP_ProcessTx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  USBD_DrvEP_Tx (USBD_DRV    *p_drv,
+                                   CPU_INT08U   ep_addr,
+                                   CPU_INT08U  *p_buf,
+                                   CPU_INT32U   buf_len,
+                                   USBD_ERR    *p_err)
+{
+    CPU_INT32U  ep_pkt_len;
+
+
+    (void)&p_drv;
+    (void)&ep_addr;
+    (void)&p_buf;
+
+    ep_pkt_len = DEF_MIN(buf_len, USBD_OTGHS_dTD_TOKEN_TOTAL_BYTE_MAX);
+   *p_err      = USBD_ERR_NONE;
+
+    return (ep_pkt_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvEP_TxStart()
+*
+* Description : Transmit the specified amount of data to device endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to buffer of data that will be transmitted.
+*
+*               buf_len     Number of octets to transmit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE           Data successfully transmitted.
+*                               USBD_ERR_TX             Generic Tx error.
+*                               USBD_ERR_EP_QUEUING     Unable to enqueue xfer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Tx() via 'p_drv_api->EP_TxStart()',
+*               USBD_EP_Process().
+*
+* Note(s)     : (1) See Note #1 in function 'USBD_DrvEP_RxStart()'.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_TxStart (USBD_DRV    *p_drv,
+                                  CPU_INT08U   ep_addr,
+                                  CPU_INT08U  *p_buf,
+                                  CPU_INT32U   buf_len,
+                                  USBD_ERR    *p_err)
+{
+    USBD_OTGHS_REG  *p_reg;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT32U       ep_pkt_len;
+
+
+    p_reg      = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);
+    ep_pkt_len =  DEF_MIN(buf_len, USBD_OTGHS_dTD_TOKEN_TOTAL_BYTE_MAX);
+
+    DEF_BIT_CLR(p_reg->USBINTR, USBD_OTGHS_USB_INT_U);          /* Disable interrupts.                                  */
+
+#if (CPU_CFG_CACHE_MGMT_EN == DEF_ENABLED)                      /* See Note #1.                                         */
+    {
+        CPU_INT08U  *p_cache_aligned_buf_addr = DEF_NULL;
+        CPU_INT32U   len;
+        CPU_INT08U   remainder;
+
+
+        remainder = (CPU_INT08U)(((CPU_INT32U)p_buf) % CPU_Cache_Linesize);
+        if (remainder != 0u) {
+            p_cache_aligned_buf_addr = p_buf - remainder;
+            len                      = ep_pkt_len + remainder;
+            OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].BufNotAlignedOnCacheLine);
+        } else {
+            p_cache_aligned_buf_addr = p_buf;
+            len                      = ep_pkt_len;
+        }
+
+        CPU_DCACHE_RANGE_FLUSH(p_cache_aligned_buf_addr, len);  /* Write the cached memory block back to RAM, before... */
+                                                                /* ...initiating the DMA transfer.                      */
+    }
+#endif
+
+    USBD_OTGHS_dTD_LstInsert(            p_drv,
+                                         ep_phy_nbr,
+                                         p_buf,
+                             (CPU_INT16U)ep_pkt_len,
+                                         p_err);
+
+    OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].TxStartedCnt);
+    DEF_BIT_SET(p_reg->USBINTR, USBD_OTGHS_USB_INT_U);          /* Enable interrupts.                                   */
+
+    if (*p_err == USBD_ERR_FAIL) {
+       *p_err = USBD_ERR_TX;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_TxZLP()
+*
+* Description : Transmit zero-length packet from endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Zero-length packet successfully transmitted.
+*                               USBD_ERR_TX     Generic Tx error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Tx() via 'p_drv_api->EP_TxZLP()',
+*               USBD_EP_TxZLP(),
+*               USBD_EP_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_TxZLP (USBD_DRV    *p_drv,
+                                CPU_INT08U   ep_addr,
+                                USBD_ERR    *p_err)
+{
+    USBD_DrvEP_TxStart (              p_drv,
+                                      ep_addr,
+                        (CPU_INT08U *)0,
+                                      0u,
+                                      p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_Abort()
+*
+* Description : Abort any pending transfer on endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint Address.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_URB_Abort() via 'p_drv_api->EP_Abort()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvEP_Abort (USBD_DRV    *p_drv,
+                                       CPU_INT08U   ep_addr)
+{
+    USBD_OTGHS_REG  *p_reg;
+    USBD_DRV_DATA   *p_drv_data;
+    CPU_INT32U       ix;
+    CPU_INT32U       entries;
+    CPU_BOOLEAN      ok;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT08U       ep_log_nbr;
+    CPU_INT32U       ep_flush;
+    CPU_BOOLEAN      flush_done;
+    CPU_INT32U       nbr_retries;
+    CPU_INT32U       reg_to;
+    CPU_BOOLEAN      valid;
+
+
+    ep_log_nbr =  USBD_EP_ADDR_TO_LOG(ep_addr);
+    p_reg      = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    ok         =  DEF_OK;
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);
+    valid      =  DEF_OK;
+
+    CPU_DCACHE_RANGE_INV(&(p_drv_data->dQH_Tbl[ep_phy_nbr]), sizeof(USBD_OTGHS_dQH));
+
+    entries = p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries;
+
+    if (USBD_EP_IS_IN(ep_addr) == DEF_YES) {
+        ep_flush = USBD_OTGHS_ENDPTxxx_GET_TX_BITS(ep_log_nbr);
+    } else {
+        ep_flush = USBD_OTGHS_ENDPTxxx_GET_RX_BITS(ep_log_nbr);
+    }
+
+    nbr_retries = USBD_OTGHS_MAX_RETRIES;
+    flush_done  = DEF_FALSE;
+
+    while ((flush_done  == DEF_FALSE) &&
+           (nbr_retries >  0u)) {
+
+        p_reg->ENDPTFLUSH = ep_flush;
+
+        reg_to = USBD_OTGHS_REG_TO;
+        while (((p_reg->ENDPTFLUSH & ep_flush) != 0u) &&
+               (reg_to                          > 0u)) {
+            reg_to--;
+        }
+
+        flush_done = DEF_BIT_IS_CLR(p_reg->ENDPTSTATUS, ep_flush);
+        nbr_retries--;
+    }
+
+    for (ix = 0u; ix < entries; ix++) {
+        ok = USBD_OTGHS_dTD_LstRemove(p_drv, ep_phy_nbr);
+        if (ok == DEF_FAIL) {
+            break;
+        }
+    }
+
+    if (nbr_retries == 0u) {
+        valid = DEF_FAIL;
+    }
+
+    OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].AbortCnt);
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_Stall()
+*
+* Description : Set or clear stall condition on endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               state       Endpoint stall state.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_EP_Stall() via 'p_drv_api->EP_Stall()',
+*               USBD_CtrlStall().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvEP_Stall (USBD_DRV     *p_drv,
+                                       CPU_INT08U    ep_addr,
+                                       CPU_BOOLEAN   state)
+{
+    USBD_OTGHS_REG  *p_reg;
+    CPU_INT08U       ep_log_nbr;
+
+
+    p_reg      = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+    ep_log_nbr =  USBD_EP_ADDR_TO_LOG(ep_addr);
+
+    if (state == DEF_SET) {
+        if (USBD_EP_IS_IN(ep_addr) == DEF_YES) {
+            DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr],
+                        USBD_OTGHS_ENDPTCTRL_TX_STALL);
+        } else {
+            DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr],
+                        USBD_OTGHS_ENDPTCTRL_RX_STALL);
+        }
+    } else {
+        if (ep_log_nbr > 0u) {
+            if (USBD_EP_IS_IN(ep_addr) == DEF_YES) {
+                DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr],
+                            USBD_OTGHS_ENDPTCTRL_TX_STALL);
+
+                DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr],
+                            USBD_OTGHS_ENDPTCTRL_TX_TOGGLE_RST);
+            } else {
+                DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr],
+                            USBD_OTGHS_ENDPTCTRL_RX_STALL);
+
+                DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr],
+                            USBD_OTGHS_ENDPTCTRL_RX_TOGGLE_RST);
+            }
+        }
+    }
+
+    OTGHS_DBG_STATS_INC(EP_Tbl[USBD_EP_ADDR_TO_PHY(ep_addr)].StallCnt);
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvISR_Handler()
+*
+* Description : USB device Interrupt Service Routine (ISR) handler.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : This is an ISR.
+*
+* Note(s)     : (1) The bit DCSuspend in the register USBSTS generates an interrupt each time it
+*                   transitions. From 0 to 1, the interrupt generated is for a Suspend event.
+*                   From 1 to 0, the interrupt generated is for the device controller exiting
+*                   from a suspend state.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvISR_Handler (USBD_DRV  *p_drv)
+{
+    USBD_OTGHS_REG      *p_reg;
+    USBD_DRV_DATA       *p_drv_data;
+    USBD_OTGHS_dTD_EXT  *p_dtd;
+    USBD_OTGHS_dTD_EXT  *p_dtd_next;
+    CPU_INT32U           ep_complete;
+    CPU_INT32U           ep_setup;
+    CPU_INT08U           ep_log_nbr;
+    CPU_INT08U           ep_phy_nbr;
+    CPU_INT32U           int_status;
+    CPU_INT32U           int_en;
+
+
+    p_drv_data  = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_reg       = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    int_status  = p_reg->USBSTS;
+    int_en      = p_reg->USBINTR;
+    int_status &= int_en;
+
+    if (int_status != DEF_BIT_NONE) {
+                                                                /* ------------- HIGH-FREQUENCY INTERRUPTS ------------ */
+        if (DEF_BIT_IS_SET(int_status, USBD_OTGHS_USB_INT_U) == DEF_YES) {
+            p_reg->USBSTS = USBD_OTGHS_USB_INT_U;
+
+            ep_setup = p_reg->ENDPTSETUPSTAT;                   /* (1) Process all setup transactions                   */
+            while (ep_setup != DEF_BIT_NONE) {
+                ep_log_nbr = (CPU_INT08U)(31u - CPU_CntLeadZeros32(ep_setup));
+                USBD_OTGHS_SetupProcess(p_drv,
+                                        ep_log_nbr);
+                ep_setup = p_reg->ENDPTSETUPSTAT;
+            }
+
+            ep_complete          = p_reg->ENDPTCOMPLETE;        /* (2) Process all IN/OUT  transactions                 */
+            p_reg->ENDPTCOMPLETE = ep_complete;
+            while (ep_complete != DEF_BIT_NONE) {
+
+                if (DEF_BIT_IS_SET_ANY(ep_complete, USBD_OTGHS_ENDPTCOMPLETE_TX_MASK) == DEF_YES) {
+                    ep_log_nbr = (CPU_INT08U)(31u - CPU_CntLeadZeros32(USBD_OTGHS_ENDPTxxx_GET_TX_NBR(ep_complete)));
+                    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(USBD_EP_LOG_TO_ADDR_IN(ep_log_nbr));
+                    OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].TxEndptcmplRegCnt);
+
+                    ep_complete &= ~USBD_OTGHS_ENDPTxxx_GET_TX_BITS(ep_log_nbr);
+                    CPU_DCACHE_RANGE_INV(&p_drv_data->dQH_Tbl[ep_phy_nbr], sizeof(USBD_OTGHS_dQH));
+                    p_dtd        =  p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstHeadPtr;
+                    CPU_DCACHE_RANGE_INV(p_dtd, sizeof(USBD_OTGHS_dTD_EXT));
+                                                                /* Loop if many dTDs have completed in a single int.    */
+                    if (p_dtd != ((USBD_OTGHS_dTD_EXT *)USBD_OTGHS_dTD_dTD_NEXT_TERMINATE)) {
+                        while (DEF_BIT_IS_CLR(p_dtd->Token, USBD_OTGHS_dTD_TOKEN_STATUS_ACTIVE) == DEF_YES) {
+                            p_dtd_next = (USBD_OTGHS_dTD_EXT *)p_dtd->dTD_NextPtr;
+
+                            USBD_EP_TxCmpl(p_drv, ep_log_nbr);
+                            OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].TxCmplFromIsrCnt);
+
+                            USBD_OTGHS_dTD_LstRemove(p_drv, ep_phy_nbr);
+
+                            if ((((CPU_REG32)p_dtd_next)                                                  == ((CPU_REG32) 1)) ||
+                                (DEF_BIT_IS_SET((CPU_REG32)p_dtd_next, USBD_OTGHS_dTD_dTD_NEXT_TERMINATE) == DEF_YES)) {
+                                break;
+                            }
+
+                            p_dtd = p_dtd_next;
+                            CPU_DCACHE_RANGE_INV(p_dtd, sizeof(USBD_OTGHS_dTD_EXT));
+                        }
+                    }
+                }
+
+                if (DEF_BIT_IS_SET_ANY(ep_complete, USBD_OTGHS_ENDPTCOMPLETE_RX_MASK) == DEF_YES) {
+                    ep_log_nbr = (CPU_INT08U)(31u - CPU_CntLeadZeros32(USBD_OTGHS_ENDPTxxx_GET_RX_NBR(ep_complete)));
+                    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(USBD_EP_LOG_TO_ADDR_OUT(ep_log_nbr));
+                    OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].RxEndptcmplRegCnt);
+
+                    ep_complete &= ~USBD_OTGHS_ENDPTxxx_GET_RX_BITS(ep_log_nbr);
+                    CPU_DCACHE_RANGE_INV(&p_drv_data->dQH_Tbl[ep_phy_nbr], sizeof(USBD_OTGHS_dQH));
+                    p_dtd        =  p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstHeadPtr;
+                    CPU_DCACHE_RANGE_INV(p_dtd, sizeof(USBD_OTGHS_dTD_EXT));
+                                                                /* Loop if many dTDs have completed in a single int.    */
+                    if (p_dtd != ((USBD_OTGHS_dTD_EXT *)USBD_OTGHS_dTD_dTD_NEXT_TERMINATE)) {
+                        while (DEF_BIT_IS_CLR(p_dtd->Token, USBD_OTGHS_dTD_TOKEN_STATUS_ACTIVE) == DEF_YES) {
+                            p_dtd_next = (USBD_OTGHS_dTD_EXT *)p_dtd->dTD_NextPtr;
+
+                            if (DEF_BIT_IS_CLR(p_dtd->Attrib, USBD_OTGHS_dTD_EXT_ATTRIB_IS_COMPLETED) == DEF_YES) {
+                                USBD_EP_RxCmpl(p_drv, ep_log_nbr);
+                                OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].RxCmplFromIsrCnt);
+                                DEF_BIT_SET(p_dtd->Attrib, USBD_OTGHS_dTD_EXT_ATTRIB_IS_COMPLETED);
+                                CPU_DCACHE_RANGE_FLUSH((void *)p_dtd->Attrib, sizeof(CPU_REG32));
+                            }
+                                                                    /* End of dTD list attached to this dQH.                */
+                            if ((((CPU_REG32)p_dtd_next)                                                  == ((CPU_REG32) 1)) ||
+                                (DEF_BIT_IS_SET((CPU_REG32)p_dtd_next, USBD_OTGHS_dTD_dTD_NEXT_TERMINATE) == DEF_YES)) {
+                                break;
+                            }
+
+                            p_dtd = p_dtd_next;
+                            CPU_DCACHE_RANGE_INV(p_dtd, sizeof(USBD_OTGHS_dTD_EXT));
+                        }
+                    }
+                }
+            }
+        }
+
+        if (DEF_BIT_IS_SET(int_status, USBD_OTGHS_USB_INT_UE) == DEF_YES) {
+            p_reg->USBSTS = USBD_OTGHS_USB_INT_UE;
+        }
+
+                                                                /* ------------- LOW-FREQUENCY INTERRUPTS ------------- */
+                                                                /* (3) Process the bus change interrupts                */
+                                                                /* ---------------- USB RESET INTERRUPT --------------- */
+        if (DEF_BIT_IS_SET(int_status, USBD_OTGHS_USB_INT_UR) == DEF_YES) {
+
+            USBD_OTGHS_SoftRst(p_drv);                          /* Perform a soft reset                                 */
+
+            USBD_EventReset(p_drv);                             /* Notify bus reset.                                    */
+
+            p_reg->USBSTS  = USBD_OTGHS_USB_INT_UR;             /* Clear the interrupt                                  */
+            p_reg->USBINTR = USBD_OTGHS_USB_INT_SL
+                           | USBD_OTGHS_USB_INT_UR
+                           | USBD_OTGHS_USB_INT_PC
+                           | USBD_OTGHS_USB_INT_U
+                           | USBD_OTGHS_USB_INT_UE;
+        }
+
+                                                                /* --------------- USB SUSPEND INTERRUPT -------------- */
+                                                                /* See Note #1.                                         */
+        if ((DEF_BIT_IS_SET(int_status, USBD_OTGHS_USB_INT_SL) == DEF_YES) &&
+            (p_drv_data->Suspend                               == DEF_FALSE)) {
+
+            USBD_EventSuspend(p_drv);
+
+            p_reg->USBSTS  = USBD_OTGHS_USB_INT_SL;             /* Clear the suspend interrupt                          */
+            p_reg->USBINTR = USBD_OTGHS_USB_INT_UR              /* Enable the Reset and Port change interrupt           */
+                           | USBD_OTGHS_USB_INT_U
+                           | USBD_OTGHS_USB_INT_PC
+                           | USBD_OTGHS_USB_INT_UE;
+            p_drv_data->Suspend = DEF_TRUE;
+
+        } else if ((DEF_BIT_IS_SET(int_status, USBD_OTGHS_USB_INT_SL) == DEF_NO) &&
+                   (p_drv_data->Suspend                               == DEF_TRUE)) {
+
+            USBD_EventResume(p_drv);
+            p_drv_data->Suspend = DEF_FALSE;
+        }
+
+
+                                                                /* ------------- USB PORT CHANGE INTERRUPT ------------ */
+        if (DEF_BIT_IS_SET(int_status, USBD_OTGHS_USB_INT_PC) == DEF_YES) {
+                                                                /* Detect the speed of the device                       */
+            if (DEF_BIT_IS_SET(p_reg->PORTSC1, USBD_OTGHS_PORTSC1_HSP) == DEF_YES) {
+                USBD_EventHS(p_drv);                            /* Notify high-speed event.                             */
+            }
+                                                                /* Clear the Port change interrupt                       */
+            p_reg->USBSTS = USBD_OTGHS_USB_INT_PC;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      USBD_OTGHS_dTD_LstInsert()
+*
+* Description : Insert a new dTD at the end of the link list.
+*               (1) Get a dTD from the memory pool.
+*               (2) Build the transfer descriptor.
+*               (3) Insert the dTD at the end of the link list
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_phy_nbr  Endpoint logical number.
+*
+*               p_data      Pointer to the data buffer; ignored for OUT endpoints.
+*
+*               len         Transfer length.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE           dTd successfully obtained, filled and queued.
+*                               USBD_ERR_FAIL           Generic failure error.
+*                               USBD_ERR_EP_QUEUING     No more dTD remaining to queue.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DrvEP_RxStart(),
+*               USBD_DrvEP_RxZLP(),
+*               USBD_DrvEP_TxStart(),
+*               USBD_DrvEP_TxZLP().
+*
+* Note(s)     : (1) If the endpoint is not a control endpoint, it is required to make sure that there is
+*                   a dTD left. This is not required for control endpoints, since they cannot have more
+*                   than one dTD queued at any time.
+*
+*               (2) 1st condition in the IF statement ensures that a dTD can be allocated for an open
+*                   endpoint having already some ongoing dTD. (-1u) guarantees that there is always 1 dTD
+*                   available for the control endpoint.
+*                   2nd and 3rd conditions allows a dTD to be allocated if the considered endpoint is
+*                   an empty endpoint and there are some dTD available.
+*********************************************************************************************************
+*/
+
+static  void  USBD_OTGHS_dTD_LstInsert (USBD_DRV    *p_drv,
+                                        CPU_INT08U   ep_phy_nbr,
+                                        CPU_INT08U  *p_data,
+                                        CPU_INT16U   len,
+                                        USBD_ERR    *p_err)
+{
+    USBD_OTGHS_REG      *p_reg;
+    USBD_DRV_DATA       *p_drv_data;
+    USBD_OTGHS_dTD_EXT  *p_dtd;
+    USBD_OTGHS_dTD_EXT  *p_dtd_last;
+    USBD_OTGHS_dQH      *p_dqh;
+    CPU_INT08U          *p_buf_page;
+    CPU_INT08U           i;
+    CPU_INT08U           insert_nbr_tries;
+    CPU_BOOLEAN          insert_complete;
+    CPU_BOOLEAN          valid_bit;
+    CPU_INT32U           ep_status;
+    CPU_INT08U           ep_log_nbr;
+    LIB_ERR              err_lib;
+#if (USBD_CFG_MAX_NBR_URB_EXTRA > 0u)
+    CPU_INT08U           dtd_used;
+    CPU_INT08U           ep_empty;
+    CPU_INT08U           ep_phy_nbr_max;
+    CPU_INT16U           dTD_avail;
+#endif
+    CPU_SR_ALLOC();
+
+
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_reg      = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+    ep_log_nbr =  USBD_EP_PHY_TO_LOG(ep_phy_nbr);
+
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_OTGHS_dQH));        /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+    p_dtd_last = p_dqh->dTD_LstTailPtr;
+
+#if (USBD_CFG_MAX_NBR_URB_EXTRA > 0u)
+                                                                /* If EP type is bulk, intr or isoc.                    */
+    if (((p_reg->ENDPTCTRLx[ep_log_nbr] & USBD_OTGHS_ENDPTCTRL_TX_TYPE_MASK) != USBD_OTGHS_ENDPTCTRL_TX_TYPE_CTRL) ||
+        ((p_reg->ENDPTCTRLx[ep_log_nbr] & USBD_OTGHS_ENDPTCTRL_RX_TYPE_MASK) != USBD_OTGHS_ENDPTCTRL_RX_TYPE_CTRL)) {
+
+        ep_empty       = 0u;                                    /* Chk if a dTD is avail (see Note #1).                 */
+        dtd_used       = 0u;
+        ep_phy_nbr_max =  USBD_EP_MaxPhyNbrGet(p_drv->DevNbr);
+        CPU_CRITICAL_ENTER();
+        for (i = 0u; i < ep_phy_nbr_max; ++i) {
+            ep_empty += (p_drv_data->dTD_UsageTbl[i] == 0u) ? 1u : 0u;
+            dtd_used +=  p_drv_data->dTD_UsageTbl[i];
+        }
+
+        dTD_avail = USBD_OTGHS_dTD_NBR - dtd_used;
+                                                                /* See Note #2.                                         */
+        if ((((CPU_INT16U)(dtd_used + ep_empty))    < (USBD_OTGHS_dTD_NBR - 1u)) ||
+            ((p_drv_data->dTD_UsageTbl[ep_phy_nbr] == 0u)                        &&
+             (dTD_avail                            != 0u))) {
+
+            (p_drv_data->dTD_UsageTbl[ep_phy_nbr])++;
+
+        } else {
+            CPU_CRITICAL_EXIT();
+           *p_err = USBD_ERR_EP_QUEUING;
+            return;
+        }
+        CPU_CRITICAL_EXIT();
+    } else {                                                    /* Chk not required for ctrl EP (see Note #1).          */
+        CPU_CRITICAL_ENTER();
+        (p_drv_data->dTD_UsageTbl[ep_phy_nbr])++;
+        CPU_CRITICAL_EXIT();
+    }
+#endif
+                                                                /* (1) Get a dTD from the memory pool                   */
+    p_dtd = (USBD_OTGHS_dTD_EXT *)Mem_PoolBlkGet(&p_drv_data->dTD_MemPool,
+                                                  sizeof(USBD_OTGHS_dTD_EXT),
+                                                 &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_FAIL;
+        return;
+    }
+
+    Mem_Clr((void *)p_dtd,                                      /* ... Initialize the dTD to 0x00                       */
+                    sizeof(USBD_OTGHS_dTD_EXT));
+
+                                                                /* (2) Build the transfer descriptor                    */
+    p_dtd->dTD_NextPtr = USBD_OTGHS_dTD_dTD_NEXT_TERMINATE;     /* ... Set the terminate bit to 1                       */
+                                                                /* ... Fill in the total transfer len.                  */
+    p_dtd->Token       = ((len << 16u) & USBD_OTGHS_dTD_TOKEN_TOTAL_BYTES_MASK)
+                                       | USBD_OTGHS_dTD_TOKEN_IOC
+                                       | USBD_OTGHS_dTD_TOKEN_STATUS_ACTIVE;
+
+    p_buf_page = p_data;
+
+    p_dtd->BufPtrs[0] = (CPU_INT32U)p_buf_page;                 /* Init Buffer Pointer (Page 0) + Current Offset        */
+                                                                /* Init Buffer Pointer List if buffer spans more ...    */
+                                                                /* ... than one physical page (see Note #3).            */
+    for (i = 1u; i <= 4u; i++) {                                /* Init Buffer Pointer (Page 1 to 4)                    */
+                                                                /* Find the next closest 4K-page boundary ahead.        */
+        p_buf_page = (CPU_INT08U *)(((CPU_INT32U)p_buf_page + 0x1000u) & 0xFFFFF000u);
+
+        if (p_buf_page < (p_data + len)) {                      /* If buffer spans a new 4K-page boundary.              */
+                                                                /* Set page ptr to ref start of the subsequent 4K page. */
+            p_dtd->BufPtrs[i]  = (CPU_INT32U)p_buf_page;
+            OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].dTD_LstInsert_BufSpan4KBoundaryCnt);
+        } else {                                                /* All the transfer size has been described...          */
+            break;                                              /* ... quit the loop.                                   */
+        }
+    }
+
+    p_dtd->BufAddr = (CPU_INT32U)p_data;                        /* Save the buffer address                              */
+    p_dtd->BufLen  =             len;
+    p_dtd->Attrib  =             0u;                            /* Reset the field's value.                             */
+    CPU_DCACHE_RANGE_FLUSH(p_dtd, sizeof(USBD_OTGHS_dTD_EXT));
+
+    CPU_CRITICAL_ENTER();
+                                                                /* (3) Insert the dTD at the end of the link list       */
+    if (p_dqh->dTD_LstNbrEntries == 0u) {                       /* ... Case 1: Link list is empty                       */
+        OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].dTD_LstInsert_LstEmptyCnt);
+
+        p_dqh->dTD_LstHeadPtr = p_dtd;
+        p_dqh->dTD_LstTailPtr = p_dtd;
+        p_dqh->dTD_LstNbrEntries++;
+                                                                /* (a) Write dQH next pointer and dQH terminate ...     */
+                                                                /* ... bit to '0' as a single operation                 */
+        p_dqh->OverArea.dTD_NextPtr = (CPU_INT32U)p_dtd;
+
+                                                                /* (b) Clear the Status bits                            */
+        DEF_BIT_CLR(p_dqh->OverArea.Token, USBD_OTGHS_dTD_TOKEN_STATUS_MASK);
+
+        CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_OTGHS_dQH));
+
+                                                                /* (c) Prime the endpoint                               */
+        if (USBD_OTGHS_EP_PHY_NBR_IS_OUT(ep_phy_nbr) == DEF_YES) {
+            p_reg->ENDPTPRIME = USBD_OTGHS_ENDPTxxx_GET_RX_BITS(ep_log_nbr);
+            OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].RxEpPrimedCnt);
+        } else {
+            p_reg->ENDPTPRIME = USBD_OTGHS_ENDPTxxx_GET_TX_BITS(ep_log_nbr);
+            OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].TxEpPrimedCnt);
+        }
+    } else {
+        OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].dTD_LstInsert_LstNotEmptyCnt);
+                                                                /* ... Case 2: Link list is not empty                   */
+                                                                /* (a) Add dTD to end of linked list                    */
+        p_dqh->dTD_LstTailPtr->dTD_NextPtr = (CPU_INT32U)p_dtd;
+        CPU_DCACHE_RANGE_FLUSH(p_dqh->dTD_LstTailPtr, sizeof(USBD_OTGHS_dTD_EXT));
+        p_dqh->dTD_LstTailPtr              =  p_dtd;
+        p_dqh->dTD_LstNbrEntries++;
+        CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_OTGHS_dQH));
+
+                                                                /* (b) Read correct prime bit. IF '1' DONE.             */
+        if (USBD_OTGHS_EP_PHY_NBR_IS_OUT(ep_phy_nbr) == DEF_YES) {
+            valid_bit = DEF_BIT_IS_SET(USBD_OTGHS_ENDPTxxx_GET_RX_NBR(p_reg->ENDPTPRIME),
+                                      (DEF_BIT32(ep_log_nbr)));
+        } else {
+            valid_bit = DEF_BIT_IS_SET(USBD_OTGHS_ENDPTxxx_GET_TX_NBR(p_reg->ENDPTPRIME),
+                                      (DEF_BIT32(ep_log_nbr)));
+        }
+        if (valid_bit == DEF_YES) {
+            OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].dTD_LstInsert_ListNonEmpty_PrimeAlreadyDoneByHW_InsertionOK);
+            CPU_CRITICAL_EXIT();
+           *p_err = USBD_ERR_NONE;
+            return;
+        }
+
+        insert_nbr_tries = USBD_OTGHS_dTD_LST_INSERT_NBR_TRIES_MAX;
+        insert_complete  = DEF_FALSE;
+        ep_status        = DEF_BIT_NONE;
+
+        while ((insert_complete  == DEF_FALSE) &&
+               (insert_nbr_tries >  0u)) {
+
+
+            DEF_BIT_SET(p_reg->USBCMD, USBD_OTGHS_USBCMD_ATDTW);/* (c) Set ATDTW (HW sem) bit in USBCMD register to '1' */
+
+            ep_status = p_reg->ENDPTSTATUS;                     /* (d) Read correct status bits in ENDPSTATUS           */
+
+                                                                /* (e) Read ATDTW bit in USBCMD register ...            */
+            if (DEF_BIT_IS_SET(p_reg->USBCMD, USBD_OTGHS_USBCMD_ATDTW) == DEF_YES){
+                insert_complete = DEF_TRUE;                     /* ... If '1' continue to (f)                           */
+            } else {
+                insert_nbr_tries--;                             /* ... If '0' goto (c)                                  */
+            }
+        }
+
+        if (insert_complete == DEF_FALSE) {
+
+            Mem_PoolBlkFree(       &p_drv_data->dTD_MemPool,
+                            (void *)p_dtd,
+                                   &err_lib);
+
+            p_dqh->dTD_LstTailPtr              = p_dtd_last;
+            p_dqh->dTD_LstTailPtr->dTD_NextPtr = USBD_OTGHS_dTD_dTD_NEXT_TERMINATE;
+            p_dqh->dTD_LstNbrEntries--;
+            CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_OTGHS_dQH));
+            CPU_DCACHE_RANGE_FLUSH(p_dqh->dTD_LstTailPtr, sizeof(USBD_OTGHS_dTD_EXT));
+
+            CPU_CRITICAL_EXIT();
+           *p_err = USBD_ERR_FAIL;
+            OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].dTD_LstInsert_LstNonEmpty_MaxRetriesReached_InsertionNOK);
+            return;
+        }
+
+        DEF_BIT_CLR(p_reg->USBCMD, USBD_OTGHS_USBCMD_ATDTW);    /* (f) Set ATDTW (HW sem) bit in USBCMD register to '0' */
+
+        if (USBD_OTGHS_EP_PHY_NBR_IS_OUT(ep_phy_nbr) == DEF_YES) {
+            valid_bit = DEF_BIT_IS_SET(USBD_OTGHS_ENDPTxxx_GET_RX_NBR(ep_status),
+                                      (DEF_BIT32(ep_log_nbr)));
+        } else {
+            valid_bit = DEF_BIT_IS_SET(USBD_OTGHS_ENDPTxxx_GET_TX_NBR(ep_status),
+                                      (DEF_BIT32(ep_log_nbr)));
+        }
+
+        if (valid_bit == DEF_YES) {
+            CPU_CRITICAL_EXIT();
+           *p_err = USBD_ERR_NONE;
+            OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].dTD_LstInsert_LstNonEmpty_GoodStatusInEndptstatusReg_InsertionOK);
+            return;                                             /* (g) If status bit read in (d) is '1' DONE            */
+        } else {                                                /* DCD must be re-primed EP.                            */
+                                                                /* (h) If status bit read in (d) is '0' goto Case 1     */
+            p_dqh->OverArea.dTD_NextPtr = (CPU_INT32U)p_dqh->dTD_LstHeadPtr;
+
+            DEF_BIT_CLR(p_dqh->OverArea.Token,
+                        USBD_OTGHS_dTD_TOKEN_STATUS_MASK);
+
+            CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_OTGHS_dQH));
+                                                                /* (e) Prime the endpoint                               */
+            if (USBD_OTGHS_EP_PHY_NBR_IS_OUT(ep_phy_nbr) == DEF_YES) {
+                p_reg->ENDPTPRIME = USBD_OTGHS_ENDPTxxx_GET_RX_BITS(ep_log_nbr);
+                OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].RxEpPrimedCnt);
+            } else {
+                p_reg->ENDPTPRIME = USBD_OTGHS_ENDPTxxx_GET_TX_BITS(ep_log_nbr);
+                OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].TxEpPrimedCnt);
+            }
+            OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].dTD_LstInsert_LstNonEmpty_PrimeDoneBySW_InsertionOK);
+        }
+    }
+    CPU_CRITICAL_EXIT();
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       USBD_OTGHS_dTD_LstEmpty()
+*
+* Description : This function flush the dTD list. All the dTD and Rx buffers are returned to the memory pool.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_phy_nbr  Endpoint physical number.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_DrvEP_Close(),
+*               USBD_OTGHS_SoftRst().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_OTGHS_dTD_LstEmpty (USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_phy_nbr)
+{
+    USBD_DRV_DATA  *p_drv_data;
+    CPU_INT32U      ix;
+    CPU_INT32U      entries;
+    CPU_BOOLEAN     ok;
+    CPU_INT08U      ep_addr;
+
+
+    p_drv_data = (USBD_DRV_DATA *)(p_drv->DataPtr);
+    CPU_DCACHE_RANGE_INV(&(p_drv_data->dQH_Tbl[ep_phy_nbr]), sizeof(USBD_OTGHS_dQH));
+    entries    =  p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries;
+    ok         =  DEF_OK;
+
+    for (ix = 0u; ix < entries; ix++) {
+        ok = USBD_OTGHS_dTD_LstRemove(p_drv, ep_phy_nbr);
+        if (ok == DEF_FAIL) {
+            break;
+        }
+    }
+
+    ep_addr = USBD_EP_PHY_TO_ADDR(ep_phy_nbr);
+
+    if (entries > 0u) {
+        USBD_DrvEP_Abort(p_drv, ep_addr);
+    }
+
+    return (ok);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      USBD_OTGHS_dTD_LstRemove()
+*
+* Description : Remove a dTD from the link list.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_phy_nbr  Endpoint physical number.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_DrvEP_Rx(),
+*               USBD_DrvEP_Abort(),
+*               USBD_DrvISR_Handler(),
+*               USBD_OTGHS_dTD_LstEmpty().
+*
+* Note(s)     : (1) The link list before the Remove function will look like:
+*
+*                           +-----+      +-----+          +-----+
+*     dTD_LstHeadPtr -----> | dTD |----->| dTD |---....-->| dTD |---->
+*                           +--|--+      +--|--+          +--|--+
+*                              |            |                |
+*                              V            V                V
+*                          +--------+    +--------+       +--------+
+*                          |  dTD   |    |  dTD   |       |  dTD   |
+*                          | Buffer |    | Buffer |       | Buffer |
+*                          +--------+    +--------+       +--------+
+*                              0             1               N
+*
+*               after the USBD_OTGHS_dTD_LstRemove() is called the link list will look like:
+*
+*                      |--------------------|
+*                      | |            |     V
+*                      | |  +-----+   |  +-----+          +-----+
+*     dTD_LstHeadPtr --| |  | dTD |---|->| dTD |---....-->| dTD |---->
+*                        |  +--|--+   |  +--|--+          +--|--+
+*                        |     |      |     |                |
+*                        |     V      |     V                V
+*                        | +--------+ |  +--------+       +--------+
+*                        | |  dTD   | |  |  dTD   |       |  dTD   |
+*                        | | Buffer | |  | Buffer |       | Buffer |
+*                        | +--------+ |  +--------+       +--------+
+*                        |     0'     |     0                N -1
+*                        | return to  |
+*                        | memory pool|
+*
+*                                    +-----------+   +----------+
+*                p_ep_data --------->| EP Buffer | = |   dTD    |  ; *p_ep_trans_size = size of the dTD buffer.
+*                                    |           |   |  Buffer  |
+*                                    +-----------+   +----------+
+*                                                          0'
+*
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_OTGHS_dTD_LstRemove (USBD_DRV    *p_drv,
+                                               CPU_INT08U   ep_phy_nbr)
+{
+    USBD_DRV_DATA       *p_drv_data;
+    USBD_OTGHS_dQH      *p_dqh;
+    USBD_OTGHS_dTD_EXT  *p_dtdlst_head;
+    LIB_ERR              err_lib;
+    CPU_SR_ALLOC();
+
+
+    p_drv_data = (USBD_DRV_DATA *)(p_drv->DataPtr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_OTGHS_dQH));        /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+    p_dtdlst_head = p_dqh->dTD_LstHeadPtr;
+
+    CPU_CRITICAL_ENTER();
+    if (p_dqh->dTD_LstNbrEntries == 1u) {
+        p_dqh->dTD_LstHeadPtr    = (USBD_OTGHS_dTD_EXT *)USBD_OTGHS_dTD_dTD_NEXT_TERMINATE;
+        p_dqh->dTD_LstTailPtr    = (USBD_OTGHS_dTD_EXT *)USBD_OTGHS_dTD_dTD_NEXT_TERMINATE;
+        p_dqh->dTD_LstNbrEntries = 0u;
+        OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].dTD_LstRemove_LstLastElementCnt);
+    } else if (p_dqh->dTD_LstNbrEntries > 0u) {
+        CPU_DCACHE_RANGE_INV(p_dqh->dTD_LstHeadPtr, sizeof(USBD_OTGHS_dTD_EXT));
+        p_dqh->dTD_LstHeadPtr = (USBD_OTGHS_dTD_EXT *)p_dqh->dTD_LstHeadPtr->dTD_NextPtr;
+        p_dqh->dTD_LstNbrEntries--;
+        OTGHS_DBG_STATS_INC(EP_Tbl[ep_phy_nbr].dTD_LstRemove_LstNonEmptyCnt);
+    }
+#if (USBD_CFG_MAX_NBR_URB_EXTRA > 0u)
+    (p_drv_data->dTD_UsageTbl[ep_phy_nbr])--;
+#endif
+
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_OTGHS_dQH));
+    CPU_CRITICAL_EXIT();
+
+    Mem_PoolBlkFree(       &p_drv_data->dTD_MemPool,            /* Return the head dTD to the memory pool               */
+                    (void *)p_dtdlst_head,
+                           &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       USBD_OTGHS_SetupProcess()
+*
+* Description : Process setup request.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_log_nbr  Endpoint logical number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DrvISR_Handler().
+*
+* Note(s)     : (1) NXP LPC313x/18xx/43xx USB device controller defines a register giving the IP version
+*                   of the controller. According to the IP version, a different processing must be done
+*                   for handling the setup packet. This is not required for the Xilinx Zynq-7000.
+*********************************************************************************************************
+*/
+
+static  void  USBD_OTGHS_SetupProcess (USBD_DRV    *p_drv,
+                                       CPU_INT08U   ep_log_nbr)
+{
+    USBD_DRV_DATA   *p_drv_data;
+    USBD_OTGHS_REG  *p_reg;
+    USBD_OTGHS_dQH  *p_dqh;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT32U       reg_to;
+    CPU_INT32U       setup_pkt[2u];
+    CPU_BOOLEAN      sutw_set;
+
+
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(USBD_EP_LOG_TO_ADDR_OUT(ep_log_nbr));
+    sutw_set   =  DEF_FALSE;
+    reg_to     =  USBD_OTGHS_REG_TO;
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_reg      = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_OTGHS_dQH));
+
+    if (p_drv_data->Ctrlr == USBD_NXP_OTGHS_CTRLR_LPCXX_USBX) { /* See Note #1.                                         */
+
+        if (p_drv_data->hw_rev < USBD_LPC313X_IP_VER_2_3) {     /* Pre 2.3 hardware setup handling                      */
+            OTGHS_DBG_STATS_INC(ISR_SetupProcess_VersionLessThan2_3Cnt);
+
+            setup_pkt[0u] = p_dqh->SetupBuf[0u];                /* (1) Duplicate contents of dQH.SetupBuf               */
+            setup_pkt[1u] = p_dqh->SetupBuf[1u];
+
+            p_reg->ENDPTSETUPSTAT = DEF_BIT32(ep_log_nbr);      /* (2) Write '1' to clear the bit in ENDPSETUPSTAT      */
+            USBD_EventSetup(         p_drv,
+                            (void *)&setup_pkt);
+            return;
+        } else {
+            OTGHS_DBG_STATS_INC(ISR_SetupProcess_VersionGreaterThan2_3Cnt);
+        }
+    }
+
+    p_reg->ENDPTSETUPSTAT = DEF_BIT32(ep_log_nbr);              /* (1) Write '1' to clear the bit in ENDPSETUPSTAT      */
+
+    while ((sutw_set == DEF_FALSE) &&
+           (reg_to   >  0u)) {
+
+        DEF_BIT_SET(p_reg->USBCMD, USBD_OTGHS_USBCMD_SUTW);     /* (2) Write '1' to setup Tripwire                      */
+
+        setup_pkt[0u] = p_dqh->SetupBuf[0u];                    /* (3) Duplicate contents of dQH.SetupBuf               */
+        setup_pkt[1u] = p_dqh->SetupBuf[1u];
+                                                                /* (4) Read Setup TripWire. If the bi is set ....    */
+                                                                /*     ... continue otherwise go to (2)              */
+        sutw_set = DEF_BIT_IS_SET(p_reg->USBCMD, USBD_OTGHS_USBCMD_SUTW);
+        reg_to--;
+    }
+    if (reg_to == 0u) {
+        return;
+    }
+
+    reg_to = USBD_OTGHS_REG_TO;
+
+    DEF_BIT_CLR(p_reg->USBCMD, USBD_OTGHS_USBCMD_SUTW);         /* (5) Write '0' to clear setup Tripwire                */
+
+    while ((DEF_BIT_IS_SET(p_reg->ENDPTSETUPSTAT, DEF_BIT32(ep_log_nbr)) == DEF_YES) &&
+           (reg_to > 0u)) {
+        reg_to--;
+    }
+
+    if (reg_to == 0u) {
+        return;
+    }
+
+    USBD_EventSetup(         p_drv,
+                    (void *)&setup_pkt);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_OTGHS_SoftRst()
+*
+* Description : Perform a soft reset :
+*                   (1) Initializes the dQH data structure for all endpoints.
+*                   (2) Creates dTD link list for endpoint 0
+*                   (3) Initializes the dTD data structure for all endpoints.
+*                   (4) Disable all endpoints except endpoint 0
+*                   (5) Clear all setup token semaphores by reading ENDPTSETUPSTAT register and writing
+*                       the same value back to the ENDPTSETUPSTAT register.
+*                   (6) Clear all endpoint complete status bits by reading the ENDPTCOMPLETE register
+*                       and writing the same value back to the ENDPTCOMPLETE register.
+*                   (7) Cancel all prime status by waiting until all bits in the ENDPRIME are 0 and the writing
+*                       0xFFFFFFFF to ENDPTFLUSH.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DrvStart(),
+*               USBD_DrvISR_Handler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_OTGHS_SoftRst (USBD_DRV  *p_drv)
+{
+    USBD_DRV_DATA   *p_drv_data;
+    USBD_OTGHS_REG  *p_reg;
+    CPU_INT32U       reg_to;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT08U       ep_phy_nbr_max;
+    CPU_INT08U       ep_log_nbr;
+
+
+    p_reg          = (USBD_OTGHS_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data     = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    ep_phy_nbr_max =  USBD_EP_MaxPhyNbrGet(p_drv->DevNbr);
+
+    if (ep_phy_nbr_max != USBD_EP_PHY_NONE) {
+        for (ep_phy_nbr = 0u; ep_phy_nbr < ep_phy_nbr_max; ep_phy_nbr++) {
+
+            USBD_OTGHS_dTD_LstEmpty(p_drv, ep_phy_nbr);
+
+            p_drv_data->dQH_Tbl[ep_phy_nbr].EpCap                = 0u;
+            p_drv_data->dQH_Tbl[ep_phy_nbr].OverArea.dTD_NextPtr = USBD_OTGHS_dTD_dTD_NEXT_TERMINATE;
+
+            Mem_Clr((void *)&p_drv_data->dQH_Tbl[ep_phy_nbr].OverArea.Token,
+                           (sizeof(USBD_OTGHS_dQH) - 2u));
+
+            CPU_DCACHE_RANGE_FLUSH(&(p_drv_data->dQH_Tbl[ep_phy_nbr]), sizeof(USBD_OTGHS_dQH));
+
+            ep_log_nbr = USBD_EP_PHY_TO_LOG(ep_phy_nbr);
+            if ((ep_log_nbr != 0u) &&
+                (DEF_BIT_IS_SET(p_reg->USBCMD, USBD_OTGHS_USBCMD_RUN) == DEF_YES)) {
+                p_reg->ENDPTCTRLx[ep_log_nbr] = USBD_OTGHS_ENDPTCTRL_TX_TOGGLE_RST |
+                                                USBD_OTGHS_ENDPTCTRL_RX_TOGGLE_RST;
+            }
+        }
+    }
+
+    reg_to = USBD_OTGHS_REG_TO;
+    while ((p_reg->ENDPTPRIME != DEF_BIT_NONE) &&
+           (reg_to            >  0u)) {
+        reg_to--;
+    }
+
+    p_reg->ENDPTFLUSH = USBD_OTGHS_ENDPTxxxx_TX_MASK |
+                        USBD_OTGHS_ENDPTxxxx_RX_MASK;
+
+    reg_to = USBD_OTGHS_REG_TO;
+    while ((p_reg->ENDPTSTATUS != DEF_BIT_NONE) &&
+           (reg_to             >  0u)) {
+        p_reg->ENDPTFLUSH = USBD_OTGHS_ENDPTxxxx_TX_MASK |
+                            USBD_OTGHS_ENDPTxxxx_RX_MASK;
+        reg_to--;
+    }
+
+    if (DEF_BIT_IS_SET(p_reg->USBCMD,  USBD_OTGHS_USBCMD_RUN) == DEF_YES) {
+        p_reg->DEV_ADDR = DEF_BIT_NONE;
+    }
+}
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Drivers/synopsys_otg_hs/usbd_drv_synopsys_otg_hs.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Drivers/synopsys_otg_hs/usbd_drv_synopsys_otg_hs.h
new file mode 100644
index 0000000..5add222
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Drivers/synopsys_otg_hs/usbd_drv_synopsys_otg_hs.h
@@ -0,0 +1,71 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          USB DEVICE DRIVER
+*                              SYNOPSYS (CHIPIDEA) CORE USB 2.0 OTG (HS)
+*
+* File          : usbd_drv_synopsys_otg_hs.h
+* Version       : V4.05.00.00
+* Programmer(s) : FF
+*                 OD
+*                 CM
+*********************************************************************************************************
+* Note(s)       : (1) You can find specific information about this driver at:
+*                     https://doc.micrium.com/display/USBDDRV/Synopsys_OTG_HS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This USB device driver function header file is protected from multiple pre-processor
+*               inclusion through use of the USB device driver module present pre-processor macro
+*               definition.
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_DRV_OTGHS_MODULE_PRESENT                        /* See Note #1.                                         */
+#define  USBD_DRV_OTGHS_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                          USB DEVICE DRIVER
+*********************************************************************************************************
+*/
+
+extern  USBD_DRV_API  USBD_DrvAPI_Synopsys_OTG_HS;
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Source/usbd_core.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Source/usbd_core.h
new file mode 100644
index 0000000..f7ed37e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Source/usbd_core.h
@@ -0,0 +1,1769 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     USB DEVICE CORE OPERATIONS
+*
+* File          : usbd_core.h
+* Version       : V4.05.00
+* Programmer(s) : FT
+*                 FGK
+*                 OD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_CORE_MODULE_PRESENT
+#define  USBD_CORE_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                      USB DEVICE VERSION NUMBER
+*
+* Note(s) : (1) (a) The USB Device software version is denoted as follows :
+*
+*                       Vx.yy.zz
+*
+*                           where
+*                                   V               denotes 'Version' label
+*                                   x               denotes major software version revision number
+*                                   yy              denotes minor software version revision number
+*                                   zz              denotes sub-minor software version revision number
+*
+*               (b) The software version label #define is formatted as follows :
+*
+*                       ver = x.yyzz * 100 * 100
+*
+*                           where
+*                                   ver             denotes software version number scaled as an integer value
+*                                   x.yyzz          denotes software version number, where the unscaled integer
+*                                                       portion denotes the major version number & the unscaled
+*                                                       fractional portion denotes the (concatenated) minor
+*                                                       version numbers
+*********************************************************************************************************
+*/
+
+#define  USBD_VERSION                                  40500u   /* See Note #1.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include                                                 /* CPU Configuration.                                   */
+#include                                             /* Standard Defines.                                    */
+#include                                             /* Standard Memory Library.                             */
+
+#include                                            /* Device Configuration file.                           */
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBD_CORE_MODULE
+#define  USBD_CORE_EXT
+#else
+#define  USBD_CORE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBD_SETUP_PKT_LEN                                8u   /* Setup packet length.                                 */
+
+
+/*
+*********************************************************************************************************
+*                                                FRAME
+*
+* Note(s) : (1) Section 8.3.3 of USB spec 2.0 describes the frame number as:
+*               "The frame number field is an 11-bit field that is incremented by the host on a per-frame
+*                basis. The frame number field rolls over upon reaching its maximum value of 7FFH and
+*                is sent only in SOF tokens at the start of each (micro)frame."
+*********************************************************************************************************
+*/
+
+#define  USBD_MAX_FRAME_NBR                             2047u   /* See Note #1.                                         */
+#define  USBD_FRAME_NBR_MASK                    DEF_BIT_FIELD_16(11u, 0u)
+#define  USBD_MICROFRAME_NBR_MASK               DEF_BIT_FIELD_16(3u,  11u)
+
+
+/*
+*********************************************************************************************************
+*                                      CONFIGURATION ATTRIBUTES
+*********************************************************************************************************
+*/
+
+#define  USBD_DEV_ATTRIB_SELF_POWERED           DEF_BIT_00
+#define  USBD_DEV_ATTRIB_REMOTE_WAKEUP          DEF_BIT_01
+
+
+/*
+*********************************************************************************************************
+*                                      DEVICE DESCRIPTOR LENGTH
+*********************************************************************************************************
+*/
+
+#define  USBD_DESC_LEN_DEV                                18u   /* Device                    descriptor length.         */
+#define  USBD_DESC_LEN_DEV_QUAL                           10u   /* Device qualifier          descriptor length.         */
+#define  USBD_DESC_LEN_HDR                                 2u   /* Descriptor header                    length.         */
+#define  USBD_DESC_LEN_CFG                                 9u   /* Configuration             descriptor length.         */
+#define  USBD_DESC_LEN_OTHER_SPD_CFG                       9u   /* Configuration other speed descriptor length.         */
+#define  USBD_DESC_LEN_IF                                  9u   /* Interface                 descriptor length.         */
+#define  USBD_DESC_LEN_IF_ASSOCIATION                      8u   /* Interface association     descriptor length.         */
+#define  USBD_DESC_LEN_EP                                  7u   /* Endpoint                  descriptor length.         */
+#define  USBD_DESC_LEN_OTG                                 3u   /* On-The-Go                 descriptor length          */
+
+
+/*
+*********************************************************************************************************
+*                                       REQUEST CHARACTERISTICS
+*
+* Note(s) : (1) Request types are defined in USB spec 2.0, section 9.3, Table 9-2, 'RequestType' field.
+*********************************************************************************************************
+*/
+
+#define  USBD_REQ_DIR_MASK                      DEF_BIT_07
+#define  USBD_REQ_DIR_HOST_TO_DEVICE            DEF_BIT_NONE
+#define  USBD_REQ_DIR_DEVICE_TO_HOST            DEF_BIT_07
+#define  USBD_REQ_DIR_BIT                       DEF_BIT_07
+
+#define  USBD_REQ_TYPE_MASK                             0x60u
+#define  USBD_REQ_TYPE_STANDARD                         0x00u
+#define  USBD_REQ_TYPE_CLASS                            0x20u
+#define  USBD_REQ_TYPE_VENDOR                           0x40u
+#define  USBD_REQ_TYPE_RESERVED                         0x60u
+
+#define  USBD_REQ_RECIPIENT_MASK                        0x1Fu
+#define  USBD_REQ_RECIPIENT_DEVICE                      0x00u
+#define  USBD_REQ_RECIPIENT_INTERFACE                   0x01u
+#define  USBD_REQ_RECIPIENT_ENDPOINT                    0x02u
+#define  USBD_REQ_RECIPIENT_OTHER                       0x03u
+
+
+/*
+*********************************************************************************************************
+*                                          STANDARD REQUESTS
+*
+* Note(s) : (1) Request types are defined in USB spec 2.0, section 9.4, Table 9-4, 'RequestType' field.
+*********************************************************************************************************
+*/
+
+#define  USBD_REQ_GET_STATUS                               0u
+#define  USBD_REQ_CLEAR_FEATURE                            1u
+#define  USBD_REQ_SET_FEATURE                              3u
+#define  USBD_REQ_SET_ADDRESS                              5u
+#define  USBD_REQ_GET_DESCRIPTOR                           6u
+#define  USBD_REQ_SET_DESCRIPTOR                           7u
+#define  USBD_REQ_GET_CONFIGURATION                        8u
+#define  USBD_REQ_SET_CONFIGURATION                        9u
+#define  USBD_REQ_GET_INTERFACE                           10u
+#define  USBD_REQ_SET_INTERFACE                           11u
+#define  USBD_REQ_SYNCH_FRAME                             12u
+
+
+/*
+*********************************************************************************************************
+*                                          DESCRIPTOR TYPES
+*
+* Note(s) : (1) Descriptors types are defined in the USB spec 2.0 section 9.2.6, Table 9-5.
+*********************************************************************************************************
+*/
+
+#define  USBD_DESC_TYPE_DEVICE                             1u
+#define  USBD_DESC_TYPE_CONFIGURATION                      2u
+#define  USBD_DESC_TYPE_STRING                             3u
+#define  USBD_DESC_TYPE_INTERFACE                          4u
+#define  USBD_DESC_TYPE_ENDPOINT                           5u
+#define  USBD_DESC_TYPE_DEVICE_QUALIFIER                   6u
+#define  USBD_DESC_TYPE_OTHER_SPEED_CONFIGURATION          7u
+#define  USBD_DESC_TYPE_INTERFACE_POWER                    8u
+#define  USBD_DESC_TYPE_OTG                                9u
+#define  USBD_DESC_TYPE_IAD                               11u
+
+
+/*
+*********************************************************************************************************
+*                                        LANGUAGE IDENTIFIERS
+*
+* Note(s) : (1) Languages identifier are defined in "http://www.usb.org/developers/docs/USB_LANGIDs.pdf".
+*********************************************************************************************************
+*/
+
+#define  USBD_LANG_ID_ARABIC_SAUDI_ARABIA             0x0401u
+#define  USBD_LANG_ID_CHINESE_TAIWAN                  0x0404u
+#define  USBD_LANG_ID_ENGLISH_US                      0x0409u
+#define  USBD_LANG_ID_ENGLISH_UK                      0x0809u
+#define  USBD_LANG_ID_FRENCH                          0x040Cu
+#define  USBD_LANG_ID_GERMAN                          0x0407u
+#define  USBD_LANG_ID_GREEK                           0x0408u
+#define  USBD_LANG_ID_ITALIAN                         0x0410u
+#define  USBD_LANG_ID_PORTUGUESE                      0x0816u
+#define  USBD_LANG_ID_SANSKRIT                        0x044Fu
+
+
+/*
+*********************************************************************************************************
+*                                             CLASS CODES
+*
+* Note(s) : (1) Class codes are defined in "http://www.usb.org/developers/defined_class".
+*
+*           (2) Class code information can be placed in the Device descriptor or in the Interface
+*               descriptor. Some defined class code are allowed to be used only in the Device
+*               descriptor, others can used in both Device and Interface descriptors and come can
+*               only be used in Interface Descriptors.
+*
+*           (3) Subclass & protocol codes are defined in the relevant class drivers.
+*********************************************************************************************************
+*/
+
+#define  USBD_CLASS_CODE_USE_IF_DESC                    0x00u
+#define  USBD_CLASS_CODE_AUDIO                          0x01u
+#define  USBD_CLASS_CODE_CDC_CONTROL                    0x02u
+#define  USBD_CLASS_CODE_HID                            0x03u
+#define  USBD_CLASS_CODE_PHYSICAL                       0x05u
+#define  USBD_CLASS_CODE_IMAGE                          0x06u
+#define  USBD_CLASS_CODE_PRINTER                        0x07u
+#define  USBD_CLASS_CODE_MASS_STORAGE                   0x08u
+#define  USBD_CLASS_CODE_HUB                            0x09u
+#define  USBD_CLASS_CODE_CDC_DATA                       0x0Au
+#define  USBD_CLASS_CODE_SMART_CARD                     0x0Bu
+#define  USBD_CLASS_CODE_CONTENT_SECURITY               0x0Du
+#define  USBD_CLASS_CODE_VIDEO                          0x0Eu
+#define  USBD_CLASS_CODE_PERSONAL_HEALTHCARE            0x0Fu
+#define  USBD_CLASS_CODE_DIAGNOSTIC_DEVICE              0xDCu
+#define  USBD_CLASS_CODE_WIRELESS_CONTROLLER            0xE0u
+#define  USBD_CLASS_CODE_MISCELLANEOUS                  0xEFu
+#define  USBD_CLASS_CODE_APPLICATION_SPECIFIC           0xFEu
+#define  USBD_CLASS_CODE_VENDOR_SPECIFIC                0xFFu
+
+
+/*
+*********************************************************************************************************
+*                                           SUB-CLASS CODES
+*********************************************************************************************************
+*/
+
+#define  USBD_SUBCLASS_CODE_USE_IF_DESC                 0x00u
+#define  USBD_SUBCLASS_CODE_USE_COMMON_CLASS            0x02u
+#define  USBD_SUBCLASS_CODE_VENDOR_SPECIFIC             0xFFu
+
+
+/*
+*********************************************************************************************************
+*                                           PROTOCOL CODES
+*********************************************************************************************************
+*/
+
+#define  USBD_PROTOCOL_CODE_USE_IF_DESC                 0x00u
+#define  USBD_PROTOCOL_CODE_USE_IAD                     0x01u
+#define  USBD_PROTOCOL_CODE_VENDOR_SPECIFIC             0xFFu
+
+
+/*
+*********************************************************************************************************
+*                                          FEATURE SELECTORS
+*********************************************************************************************************
+*/
+
+#define  USBD_FEATURE_SEL_ENDPOINT_HALT                    0u
+#define  USBD_FEATURE_SEL_DEVICE_REMOTE_WAKEUP             1u
+#define  USBD_FEATURE_SEL_TEST_MODE                        2u
+
+/*
+*********************************************************************************************************
+*                                       DEVICE POWER CONSTRAINS
+*********************************************************************************************************
+*/
+
+#define  USBD_MAX_BUS_PWR_LIMIT_mA                       500u
+
+/*
+*********************************************************************************************************
+*                                            ENDPOINT TYPE
+*
+* Note(s) : (1) Endpoint types are defined in the USB spec 2.0 section 9.6.6, Table 9-13, 'bmAttributes'
+*               field.
+*********************************************************************************************************
+*/
+
+#define  USBD_EP_TYPE_MASK                              0x03u
+#define  USBD_EP_TYPE_CTRL                              0x00u
+#define  USBD_EP_TYPE_ISOC                              0x01u
+#define  USBD_EP_TYPE_BULK                              0x02u
+#define  USBD_EP_TYPE_INTR                              0x03u
+
+#define  USBD_EP_TYPE_SYNC_MASK                         0x0Cu
+#define  USBD_EP_TYPE_SYNC_NONE                         0x00u
+#define  USBD_EP_TYPE_SYNC_ASYNC                        0x04u
+#define  USBD_EP_TYPE_SYNC_ADAPTIVE                     0x08u
+#define  USBD_EP_TYPE_SYNC_SYNC                         0x0Cu
+
+#define  USBD_EP_TYPE_USAGE_MASK                        0x30u
+#define  USBD_EP_TYPE_USAGE_DATA                        0x00u
+#define  USBD_EP_TYPE_USAGE_FEEDBACK                    0x10u
+#define  USBD_EP_TYPE_USAGE_IMPLICIT_FEEDBACK           0x20u
+
+
+/*
+*********************************************************************************************************
+*                                          ENDPOINT ADDRESS
+*
+* Note(s) : (1) Endpoint address is defined in the USB spec 2.0, section 9.6.6, Table 9-13,
+*               'bEndpointAddress' field.
+*********************************************************************************************************
+*/
+
+#define  USBD_EP_NBR_MASK                               0x0Fu
+#define  USBD_EP_MAX_NBR                                  32u
+
+#define  USBD_EP_DIR_MASK                               0x80u
+#define  USBD_EP_DIR_BIT                        DEF_BIT_07
+#define  USBD_EP_DIR_OUT                        DEF_BIT_NONE
+#define  USBD_EP_DIR_IN                         DEF_BIT_07
+
+
+#define  USBD_EP_TRANSACTION_PER_UFRAME_1                  1u
+#define  USBD_EP_TRANSACTION_PER_UFRAME_2                  2u
+#define  USBD_EP_TRANSACTION_PER_UFRAME_3                  3u
+
+#define  USBD_EP_MAX_INTERVAL_VAL                      32768u   /* Max val is 2^(16 - 1).                               */
+
+
+/*
+*********************************************************************************************************
+*                                    MICROSOFT OS DESCRIPTOR DEFINES
+*
+* Note(s)     : (1) For more information on Microsoft OS descriptors, see
+*                   'http://msdn.microsoft.com/en-us/library/windows/hardware/gg463179.aspx'.
+*********************************************************************************************************
+*/
+
+                                                                /* Microsoft OS compatible IDs index.                   */
+#define  USBD_MS_OS_COMPAT_ID_NULL                         0u
+#define  USBD_MS_OS_COMPAT_ID_RNDIS                        1u
+#define  USBD_MS_OS_COMPAT_ID_PTP                          2u
+#define  USBD_MS_OS_COMPAT_ID_MTP                          3u
+#define  USBD_MS_OS_COMPAT_ID_XUSB20                       4u
+#define  USBD_MS_OS_COMPAT_ID_BLUETOOTH                    5u
+#define  USBD_MS_OS_COMPAT_ID_WINUSB                       6u
+#define  USBD_MS_OS_COMPAT_ID_NONE                       255u
+
+                                                                /* Microsoft OS subcompatible IDs index.                */
+#define  USBD_MS_OS_SUBCOMPAT_ID_NULL                      0u
+#define  USBD_MS_OS_SUBCOMPAT_ID_BLUETOOTH_1_1             1u
+#define  USBD_MS_OS_SUBCOMPAT_ID_BLUETOOTH_1_2             2u
+#define  USBD_MS_OS_SUBCOMPAT_ID_BLUETOOTH_EDR             3u
+
+                                                                /* Microsoft OS extended property types.                */
+#define  USBD_MS_OS_PROPERTY_TYPE_REG_SZ                   1u   /* NULL-terminated Unicode str.                         */
+#define  USBD_MS_OS_PROPERTY_TYPE_REG_EXPAND_SZ            2u   /* NULL-terminated Unicode str with environment vars.   */
+#define  USBD_MS_OS_PROPERTY_TYPE_REG_BINARY               3u   /* Free-form binary.                                    */
+#define  USBD_MS_OS_PROPERTY_TYPE_REG_DWORD_LITTLE_ENDIAN  4u   /* Little-endian 32-bit integer.                        */
+#define  USBD_MS_OS_PROPERTY_TYPE_REG_DWORD_BIG_ENDIAN     5u   /* Big-endian 32-bit integer.                           */
+#define  USBD_MS_OS_PROPERTY_TYPE_REG_LINK                 6u   /* NULL-terminated Unicode str with a symbolic link.    */
+#define  USBD_MS_OS_PROPERTY_TYPE_REG_MULTI_SZ             7u   /* Multiple NULL-terminated Unicode strings.            */
+
+
+/*
+*********************************************************************************************************
+*                                         DEVICE ERROR CODES
+*********************************************************************************************************
+*/
+
+typedef  enum  usbd_err {                                       /* Device error data type.                              */
+                                                                /* ---------------- GENERIC ERROR CODES --------------- */
+    USBD_ERR_NONE                        =    0u,
+    USBD_ERR_FAIL                        =    1u,
+    USBD_ERR_RX                          =    2u,
+    USBD_ERR_TX                          =    3u,
+    USBD_ERR_ALLOC                       =    4u,               /* Object/memory allocation.                            */
+    USBD_ERR_NULL_PTR                    =    5u,               /* Ptr arg(s) passed NULL ptr(s).                       */
+    USBD_ERR_INVALID_ARG                 =    6u,               /* Invalid argument(s).                                 */
+    USBD_ERR_INVALID_CLASS_STATE         =    7u,               /* Invalid class state.                                 */
+
+                                                                /* ---------------- DEVICE ERROR CODES ---------------- */
+    USBD_ERR_DEV_ALLOC                   =  100u,               /* Device allocation failed.                            */
+    USBD_ERR_DEV_INVALID_NBR             =  101u,               /* Invalid device number.                               */
+    USBD_ERR_DEV_INVALID_STATE           =  102u,               /* Invalid device state.                                */
+    USBD_ERR_DEV_INVALID_SPD             =  103u,               /* Invalid device speed.                                */
+    USBD_ERR_DEV_UNAVAIL_FEAT            =  104u,               /* Device does not support requested feature.           */
+
+                                                                /* ------------- CONFIGURATION ERROR CODES ------------ */
+    USBD_ERR_CFG_ALLOC                   =  200u,               /* Configuration allocation failed.                     */
+    USBD_ERR_CFG_INVALID_NBR             =  201u,               /* Invalid configuration number.                        */
+    USBD_ERR_CFG_INVALID_MAX_PWR         =  202u,               /* Invalid maximum power.                               */
+    USBD_ERR_CFG_SET_FAIL                =  203u,               /* Device driver set configuration failed.              */
+
+                                                                /* --------------- INTERFACE ERROR CODES -------------- */
+    USBD_ERR_IF_ALLOC                    =  300u,               /* Interface allocation failed.                         */
+    USBD_ERR_IF_INVALID_NBR              =  301u,               /* Invalid interface number.                            */
+    USBD_ERR_IF_ALT_ALLOC                =  302u,               /* Alternate interface setting allocation failed.       */
+    USBD_ERR_IF_ALT_INVALID_NBR          =  303u,               /* Invalid interface alternate setting number.          */
+    USBD_ERR_IF_GRP_ALLOC                =  304u,               /* Interface group allocation failed.                   */
+    USBD_ERR_IF_GRP_NBR_IN_USE           =  305u,               /* Interface group number already in use.               */
+
+                                                                /* --------------- ENDPOINT ERROR CODES --------------- */
+    USBD_ERR_EP_ALLOC                    =  400u,               /* Endpoint allocation failed.                          */
+    USBD_ERR_EP_INVALID_ADDR             =  401u,               /* Invalid endpoint address.                            */
+    USBD_ERR_EP_INVALID_STATE            =  402u,               /* Invalid endpoint state.                              */
+    USBD_ERR_EP_INVALID_TYPE             =  403u,               /* Invalid endpoint type.                               */
+    USBD_ERR_EP_NONE_AVAIL               =  404u,               /* Physical endpoint NOT available.                     */
+    USBD_ERR_EP_ABORT                    =  405u,               /* Device driver abort endpoint failed.                 */
+    USBD_ERR_EP_STALL                    =  406u,               /* Device driver stall endpoint failed.                 */
+    USBD_ERR_EP_IO_PENDING               =  407u,               /* I/O operation pending on endpoint.                   */
+    USBD_ERR_EP_QUEUING                  =  408u,               /* Unable to queue transfer on endpoint.                */
+
+                                                                /* --------------- OS LAYER ERROR CODES --------------- */
+    USBD_ERR_OS_INIT_FAIL                =  500u,               /* OS layer initialization failed.                      */
+    USBD_ERR_OS_SIGNAL_CREATE            =  501u,               /* OS signal NOT successfully created.                  */
+    USBD_ERR_OS_FAIL                     =  502u,               /* OS object Pend/Post failed.                          */
+    USBD_ERR_OS_TIMEOUT                  =  503u,               /* OS object timeout.                                   */
+    USBD_ERR_OS_ABORT                    =  504u,               /* OS object abort.                                     */
+    USBD_ERR_OS_DEL                      =  505u,               /* OS object delete.                                    */
+
+                                                                /* ------- DEVICE CONTROLLER DRIVER ERROR CODES ------- */
+    USBD_ERR_DRV_BUF_OVERFLOW            =  700u,               /* Overflow occured on Rx transfer.                     */
+    USBD_ERR_DRV_INVALID_PKT             =  701u,               /* Data integrity of the packet is not guaranteed.      */
+
+                                                                /* ---------------- CLASSES ERROR CODES --------------- */
+    USBD_ERR_CLASS_INVALID_NBR           = 1000u,
+    USBD_ERR_CLASS_XFER_IN_PROGRESS      = 1001u,
+                                                                /* ------------- AUDIO CLASS ERROR CODES -------------- */
+    USBD_ERR_AUDIO_INSTANCE_ALLOC        = 1100u,
+    USBD_ERR_AUDIO_AS_IF_ALLOC           = 1101u,
+    USBD_ERR_AUDIO_IT_ALLOC              = 1102u,
+    USBD_ERR_AUDIO_OT_ALLOC              = 1103u,
+    USBD_ERR_AUDIO_FU_ALLOC              = 1104u,
+    USBD_ERR_AUDIO_MU_ALLOC              = 1105u,
+    USBD_ERR_AUDIO_SU_ALLOC              = 1106u,
+    USBD_ERR_AUDIO_REQ_INVALID_CTRL      = 1107u,               /* Invalid control.                                     */
+    USBD_ERR_AUDIO_REQ_INVALID_ATTRIB    = 1108u,               /* Invalid attribute of an audio control.               */
+    USBD_ERR_AUDIO_REQ_INVALID_RECIPIENT = 1109u,               /* Invalid request recipient.                           */
+    USBD_ERR_AUDIO_REQ                   = 1110u,               /* Request has failed for various reasons.              */
+    USBD_ERR_AUDIO_INVALID_SAMPLING_FRQ  = 1111u,               /* Sampling frequency not supported.                    */
+    USBD_ERR_AUDIO_CODEC_INIT_FAILED     = 1112u,               /* Audio Codec driver init failed.                      */
+                                                                /* --------------- CDC CLASS ERROR CODES -------------- */
+    USBD_ERR_CDC_INSTANCE_ALLOC          = 1200u,
+    USBD_ERR_CDC_DATA_IF_ALLOC           = 1201u,
+    USBD_ERR_CDC_SUBCLASS_INSTANCE_ALLOC = 1250u,
+                                                                /* --------------- HID CLASS ERROR CODES -------------- */
+    USBD_ERR_HID_INSTANCE_ALLOC          = 1300u,
+    USBD_ERR_HID_REPORT_INVALID          = 1303u,
+    USBD_ERR_HID_REPORT_ALLOC            = 1304u,
+    USBD_ERR_HID_REPORT_PUSH_POP_ALLOC   = 1305u,
+                                                                /* --------------- MSC CLASS ERROR CODES -------------- */
+    USBD_ERR_MSC_INSTANCE_ALLOC          = 1400u,
+    USBD_ERR_MSC_INVALID_CBW             = 1401u,               /* Invalid Command Block Wrapper.                       */
+    USBD_ERR_MSC_INVALID_DIR             = 1402u,               /* Mismatch between dir indicated by CBW and SCSI cmd.  */
+    USBD_ERR_MSC_MAX_LUN_EXCEED          = 1403u,               /* Maximum number of logical units reached.             */
+    USBD_ERR_MSC_MAX_VEN_ID_LEN_EXCEED   = 1404u,               /* Vendor ID string too long.                           */
+    USBD_ERR_MSC_MAX_PROD_ID_LEN_EXCEED  = 1405u,               /* Product ID string too long.                          */
+    USBD_ERR_SCSI_UNSUPPORTED_CMD        = 1406u,               /* SCSI cmd not supported.                              */
+    USBD_ERR_SCSI_MORE_DATA              = 1407u,               /* Read or write req more data to be read or written.   */
+    USBD_ERR_SCSI_LU_NOTRDY              = 1408u,               /* Logical unit not ready to perform any operations.    */
+    USBD_ERR_SCSI_LU_NOTSUPPORTED        = 1409u,               /* Logical unit number not supported,                   */
+    USBD_ERR_SCSI_LU_BUSY                = 1410u,               /* Logical unit number is busy with other operations.   */
+    USBD_ERR_SCSI_LOG_BLOCK_ADDR         = 1411u,               /* Logical block address out of range.                  */
+    USBD_ERR_SCSI_MEDIUM_NOTPRESENT      = 1412u,               /* Medium not present.                                  */
+    USBD_ERR_SCSI_MEDIUM_NOT_RDY_TO_RDY  = 1413u,               /* Medium transitions from not ready to ready state.    */
+    USBD_ERR_SCSI_MEDIUM_RDY_TO_NOT_RDY  = 1414u,               /* Medium transitions from ready to not ready state.    */
+    USBD_ERR_SCSI_LOCK                   = 1415u,               /* Medium lock failed.                                  */
+    USBD_ERR_SCSI_LOCK_TIMEOUT           = 1416u,               /* Medium lock timed out.                               */
+    USBD_ERR_SCSI_UNLOCK                 = 1417u,               /* Medium successfully unlocked.                        */
+                                                                /* -------------- PHDC CLASS ERROR CODES -------------- */
+    USBD_ERR_PHDC_INSTANCE_ALLOC         = 1500u,
+                                                                /* ------------- VENDOR CLASS ERROR CODES ------------- */
+    USBD_ERR_VENDOR_INSTANCE_ALLOC       = 1600u
+} USBD_ERR;
+
+
+/*
+*********************************************************************************************************
+*                                  USB EP INFORMATION TABLE DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------- ENDPOINT TYPE BIT DEFINES ------------ */
+#define  USBD_EP_INFO_TYPE_CTRL                 DEF_BIT_00
+#define  USBD_EP_INFO_TYPE_ISOC                 DEF_BIT_01
+#define  USBD_EP_INFO_TYPE_BULK                 DEF_BIT_02
+#define  USBD_EP_INFO_TYPE_INTR                 DEF_BIT_03
+
+                                                                /* ---------- ENDPOINT DIRECTION BIT DEFINES ---------- */
+#define  USBD_EP_INFO_DIR_OUT                   DEF_BIT_04
+#define  USBD_EP_INFO_DIR_IN                    DEF_BIT_05
+
+
+/*
+*********************************************************************************************************
+*                                          USB OBJECT NUMBER
+*********************************************************************************************************
+*/
+
+#define  USBD_DEV_NBR_NONE                      DEF_INT_08U_MAX_VAL
+
+#define  USBD_CFG_NBR_NONE                      DEF_INT_08U_MAX_VAL
+#define  USBD_CFG_NBR_SPD_BIT                   DEF_BIT_07
+
+#define  USBD_IF_NBR_NONE                       DEF_INT_08U_MAX_VAL
+
+#define  USBD_IF_ALT_NBR_NONE                   DEF_INT_08U_MAX_VAL
+
+#define  USBD_IF_GRP_NBR_NONE                   DEF_INT_08U_MAX_VAL
+
+#define  USBD_EP_ADDR_NONE                      DEF_INT_08U_MAX_VAL
+#define  USBD_EP_PHY_NONE                       DEF_INT_08U_MAX_VAL
+
+#define  USBD_EP_NBR_NONE                       DEF_INT_08U_MAX_VAL
+
+#define  USBD_STR_IX_NONE                       DEF_INT_08U_MAX_VAL
+#define  USBD_STR_NBR_TOT                      (USBD_CFG_MAX_NBR_STR - 1u)
+
+#define  USBD_CLASS_NBR_NONE                    DEF_INT_08U_MAX_VAL
+
+
+/*
+*********************************************************************************************************
+*                                             USB CORE EVENTS
+*
+* Note(s) : (1) There are 7 possible USB callback events:
+*
+*                   USBD_EventReset(),
+*                   USBD_EventResetCmpl(),
+*                   USBD_EventSuspend(),
+*                   USBD_EventResume(),
+*                   USBD_EventConn(),
+*                   USBD_EventDisconn(),
+*                   USBD_EventHS().
+*********************************************************************************************************
+*/
+
+#define  USBD_CORE_EVENT_BUS_NBR                          7u   /* Number of bus events per controller.                 */
+
+                                                                /* Total number of bus events.                          */
+#define  USBD_CORE_EVENT_BUS_NBR_TOTAL        (USBD_CFG_MAX_NBR_DEV * USBD_CORE_EVENT_BUS_NBR)
+
+                                                                /* Total number of USB request blocks (URB).            */
+#define  USBD_CORE_EVENT_URB_NBR_TOTAL        (USBD_CFG_MAX_NBR_DEV * (USBD_CFG_MAX_NBR_EP_OPEN + USBD_CFG_MAX_NBR_URB_EXTRA))
+
+#define  USBD_CORE_EVENT_NBR_TOTAL            (USBD_CORE_EVENT_BUS_NBR_TOTAL + \
+                                               USBD_CORE_EVENT_URB_NBR_TOTAL)
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        FORWARD DECLARATIONS
+*********************************************************************************************************
+*/
+
+typedef         struct  usbd_drv      USBD_DRV;
+typedef  const  struct  usbd_drv_api  USBD_DRV_API;
+
+
+/*
+*********************************************************************************************************
+*                                     USB DEVICE SPEED DATA TYPE
+*
+* Note(s) : (1) 'Universal Serial Bus Specification Rev 2.0', section 4.2.1 defines three data rates:
+*
+*               (a) The USB  Low-Speed (LS) signaling bit rate is   1.5 Mb/s.
+*
+*               (b) The USB Full-Speed (FS) signaling bit rate is  12   Mb/s.
+*
+*               (c) The USB High-Speed (HS) signaling bit rate is 480   Mb/s.
+*********************************************************************************************************
+*/
+
+typedef  enum  usbd_dev_spd {
+    USBD_DEV_SPD_INVALID = 0,
+    USBD_DEV_SPD_LOW,                                           /*  Low-Speed (see Note #1a).                           */
+    USBD_DEV_SPD_FULL,                                          /* Full-Speed (see Note #1b).                           */
+    USBD_DEV_SPD_HIGH                                           /* High-Speed (see Note #1c).                           */
+} USBD_DEV_SPD;
+
+
+/*
+*********************************************************************************************************
+*                                     USB DEVICE STATES DATA TYPE
+*
+* Note(s) : (1) 'Universal Serial Bus Specification Rev 2.0', section 9.1.1 defines seven visible device
+*                states:
+*
+*               (a) USBD_DEV_STATE_INIT       : Device is not attached to the USB.
+*
+*               (b) USBD_DEV_STATE_ATTACHED   : Device is attached to the USB, but not powered.
+*
+*               (c) USBD_DEV_STATE_POWERED    : Device is attached to the USB and powered, but has not
+*                                               been reset.
+*
+*               (d) USBD_DEV_STATE_DEFAULT    : Device is attached to the USB and powered and has been
+*                                               reset, but has not been assigned a unique address.
+*                                               Device responds at the default address.
+*
+*               (e) USBD_DEV_STATE_ADDRESSED  : Device is attached to the USB, powered, has been reset,
+*                                               and a unique device address has been assigned. Device
+*                                               is not configured.
+*
+*               (f) USBD_DEV_STATE_CONFIGURED : Device is attached to the USB, powered, has been reset,
+*                                               has a unique  address, is configured, and is not suspended.
+*                                               The host may now use the function provided by the device.
+*
+*               (g) USBD_DEV_STATE_SUSPENDED  : Device is, at minimum, attached to the USB and is powered
+*                                               and has not  seen bus activity for 3 ms. It may also have
+*                                               a unique address and be  configured for use. However,
+*                                               because the device is suspended, the host may not use the
+*                                               device's function.
+*
+*          (2) An additional state is added (USBD_DEV_STATE_START) to determine if the device controller
+*              has been initialized.
+*********************************************************************************************************
+*/
+
+typedef  enum  usbd_dev_state {
+    USBD_DEV_STATE_NONE = 0,
+    USBD_DEV_STATE_INIT,
+    USBD_DEV_STATE_ATTACHED,
+    USBD_DEV_STATE_DEFAULT,
+    USBD_DEV_STATE_ADDRESSED,
+    USBD_DEV_STATE_CONFIGURED,
+    USBD_DEV_STATE_SUSPENDED
+} USBD_DEV_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                       DEVICE EVENT CALLBACKS
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_bus_fncts {                        /* --------- DEVICE EVENT CALLBACKS STRUCTURE --------- */
+    void  (*Reset)  (CPU_INT08U  dev_nbr);                      /* Notify application about reset   event.              */
+
+    void  (*Suspend)(CPU_INT08U  dev_nbr);                      /* Notify application about suspend event.              */
+
+    void  (*Resume) (CPU_INT08U  dev_nbr);                      /* Notify application about resume  event.              */
+
+    void  (*CfgSet) (CPU_INT08U  dev_nbr,                       /* Notify application about    configured state.        */
+                     CPU_INT08U  cfg_val);
+
+    void  (*CfgClr) (CPU_INT08U  dev_nbr,                       /* Notify application about de-configured state.        */
+                     CPU_INT08U  cfg_val);
+
+    void  (*Conn)   (CPU_INT08U  dev_nbr);                      /* Notify application about device    connect.          */
+
+    void  (*Disconn)(CPU_INT08U  dev_nbr);                      /* Notify application about device disconnect.          */
+} USBD_BUS_FNCTS;
+
+
+/*
+*********************************************************************************************************
+*                                 USB DEVICE CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_dev_cfg {
+           CPU_INT16U   VendorID;                               /* Vendor  ID.                                          */
+           CPU_INT16U   ProductID;                              /* Product ID.                                          */
+           CPU_INT16U   DeviceBCD;                              /* Device release number.                               */
+    const  CPU_CHAR    *ManufacturerStrPtr;                     /* Manufacturer string.                                 */
+    const  CPU_CHAR    *ProductStrPtr;                          /* Product      string.                                 */
+    const  CPU_CHAR    *SerialNbrStrPtr;                        /* Serial Number ID.                                    */
+           CPU_INT16U   LangId;                                 /* Language      ID.                                    */
+} USBD_DEV_CFG;
+
+
+/*
+*********************************************************************************************************
+*                          USB DEVICE MICROSOFT XTENDED PROPERTIES DATA TYPE
+*********************************************************************************************************
+*/
+#if (USBD_CFG_MS_OS_DESC_EN == DEF_ENABLED)
+typedef  struct  usbd_ms_os_ext_property {
+           CPU_INT08U   PropertyType;
+
+    const  CPU_INT08U  *PropertyNamePtr;
+           CPU_INT16U   PropertyNameLen;
+
+    const  CPU_INT08U  *PropertyPtr;
+           CPU_INT32U   PropertyLen;
+} USBD_MS_OS_EXT_PROPERTY;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          USB SETUP REQUEST
+*********************************************************************************************************
+*/
+
+typedef  struct  usbd_setup_req {
+    CPU_INT08U  bmRequestType;                                  /* Characteristics of request.                          */
+    CPU_INT08U  bRequest;                                       /* Specific request.                                    */
+    CPU_INT16U  wValue;                                         /* Varies according to request.                         */
+    CPU_INT16U  wIndex;                                         /* Varies according to request; typically used as index.*/
+    CPU_INT16U  wLength;                                        /* Transfer length if data stage present.               */
+} USBD_SETUP_REQ;
+
+
+/*
+*********************************************************************************************************
+*                                    USB DEVICE CONTROLLER BSP API
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_drv_bsp_api {
+    void  (*Init)   (USBD_DRV  *p_drv);                         /* Initialize.                                          */
+
+    void  (*Conn)   (void);                                     /* Connect.                                             */
+
+    void  (*Disconn)(void);                                     /* Disconnect.                                          */
+} USBD_DRV_BSP_API;
+
+
+/*
+*********************************************************************************************************
+*                                   ENDPOINT INFORMATION DATA TYPE
+*
+* Note(s) : (1) The endpoint information data type provides information about the USB device controller
+*               physical EPs.
+*
+*               (a) The 'Attrib' bit-field defines the EP attributes. The EP attributes is combination
+*                   of the following flags:
+*
+*                       USBD_EP_INFO_TYPE_CTRL  Indicate control     type      capable.
+*                       USBD_EP_INFO_TYPE_ISOC  Indicate isochronous type      capable.
+*                       USBD_EP_INFO_TYPE_BULK  Indicate bulk        type      capable.
+*                       USBD_EP_INFO_TYPE_INTR  Indicate interrupt   type      capable.
+*                       USBD_EP_INFO_DIR_OUT    Indicate OUT         direction capable.
+*                       USBD_EP_INFO_DIR_IN     Indicate IN          direction capable.
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_drv_ep_info {
+    CPU_INT08U  Attrib;                                         /* Endpoint attributes (see Note #1a).                  */
+    CPU_INT08U  Nbr;                                            /* Endpoint number.                                     */
+    CPU_INT16U  MaxPktSize;                                     /* Endpoint maximum packet size.                        */
+} USBD_DRV_EP_INFO;
+
+
+/*
+*********************************************************************************************************
+*                              USB DEVICE DRIVER CONFIGURATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_drv_cfg {
+    CPU_ADDR           BaseAddr;                                /* Base address of device controller hardware registers.*/
+    CPU_ADDR           MemAddr;                                 /* Base address of device controller dedicated memory.  */
+    CPU_ADDR           MemSize;                                 /* Size         of device controller dedicated memory.  */
+    USBD_DEV_SPD       Spd;                                     /* Speed        of device controller.                   */
+    USBD_DRV_EP_INFO  *EP_InfoTbl;                              /* Device controller EP information table.              */
+} USBD_DRV_CFG;
+
+
+/*
+*********************************************************************************************************
+*                                     USB DEVICE DRIVER DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  usbd_drv {
+    CPU_INT08U         DevNbr;
+    USBD_DRV_API      *API_Ptr;                                 /* Device controller API.                               */
+    USBD_DRV_CFG      *CfgPtr;                                  /* Device controller configuration.                     */
+    void              *DataPtr;                                 /* Device controller local data.                        */
+    USBD_DRV_BSP_API  *BSP_API_Ptr;                             /* Device controller board specific API.                */
+};
+
+
+/*
+*********************************************************************************************************
+*                                       INTERFACE CLASS DRIVER
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbd_class_drv {
+                                                                /* Notify class that cfg is active.                     */
+    void         (*Conn)            (       CPU_INT08U       dev_nbr,
+                                            CPU_INT08U       cfg_nbr,
+                                            void            *p_if_class_arg);
+                                                                /* Notify class that cfg is not active.                 */
+    void         (*Disconn)         (       CPU_INT08U       dev_nbr,
+                                            CPU_INT08U       cfg_nbr,
+                                            void            *p_if_class_arg);
+                                                                /* Notify class that alt setting has been updated.      */
+    void         (*AltSettingUpdate)(       CPU_INT08U       dev_nbr,
+                                            CPU_INT08U       cfg_nbr,
+                                            CPU_INT08U       if_nbr,
+                                            CPU_INT08U       if_alt_nbr,
+                                            void            *p_if_class_arg,
+                                            void            *p_if_alt_class_arg);
+                                                                /* Notify class that EP state has been updated.         */
+    void         (*EP_StateUpdate)  (       CPU_INT08U       dev_nbr,
+                                            CPU_INT08U       cfg_nbr,
+                                            CPU_INT08U       if_nbr,
+                                            CPU_INT08U       if_alt_nbr,
+                                            CPU_INT08U       ep_addr,
+                                            void            *p_if_class_arg,
+                                            void            *p_if_alt_class_arg);
+                                                                /* Construct   IF functional descriptor.                */
+    void         (*IF_Desc)         (       CPU_INT08U       dev_nbr,
+                                            CPU_INT08U       cfg_nbr,
+                                            CPU_INT08U       if_nbr,
+                                            CPU_INT08U       if_alt_nbr,
+                                            void            *p_if_class_arg,
+                                            void            *p_if_alt_class_arg);
+                                                                /* Get size of IF functional descriptor.                */
+    CPU_INT16U   (*IF_DescSizeGet)  (       CPU_INT08U       dev_nbr,
+                                            CPU_INT08U       cfg_nbr,
+                                            CPU_INT08U       if_nbr,
+                                            CPU_INT08U       if_alt_nbr,
+                                            void            *p_if_class_arg,
+                                            void            *p_if_alt_class_arg);
+                                                                /* Construct   EP functional descriptor.                */
+    void         (*EP_Desc)         (       CPU_INT08U       dev_nbr,
+                                            CPU_INT08U       cfg_nbr,
+                                            CPU_INT08U       if_nbr,
+                                            CPU_INT08U       if_alt_nbr,
+                                            CPU_INT08U       ep_addr,
+                                            void            *p_if_class_arg,
+                                            void            *p_if_alt_class_arg);
+                                                                /* Get size of EP functional descriptor.                */
+    CPU_INT16U   (*EP_DescSizeGet)  (       CPU_INT08U       dev_nbr,
+                                            CPU_INT08U       cfg_nbr,
+                                            CPU_INT08U       if_nbr,
+                                            CPU_INT08U       if_alt_nbr,
+                                            CPU_INT08U       ep_addr,
+                                            void            *p_if_class_arg,
+                                            void            *p_if_alt_class_arg);
+
+                                                                /* Interface       request callback.                    */
+    CPU_BOOLEAN  (*IF_Req)          (       CPU_INT08U       dev_nbr,
+                                     const  USBD_SETUP_REQ  *p_setup_req,
+                                            void            *p_if_class_arg);
+
+                                                                /* Class-specific  request callback.                    */
+    CPU_BOOLEAN  (*ClassReq)        (       CPU_INT08U       dev_nbr,
+                                     const  USBD_SETUP_REQ  *p_setup_req,
+                                            void            *p_if_class_arg);
+
+                                                                /* Vendor-specific request callback.                    */
+    CPU_BOOLEAN  (*VendorReq)       (       CPU_INT08U       dev_nbr,
+                                     const  USBD_SETUP_REQ  *p_setup_req,
+                                            void            *p_if_class_arg);
+
+#if (USBD_CFG_MS_OS_DESC_EN == DEF_ENABLED)
+                                                                /* Get MS compatible ID nbr.                            */
+    CPU_INT08U   (*MS_GetCompatID)      (       CPU_INT08U                 dev_nbr,
+                                                CPU_INT08U                *p_sub_compat_id_ix);
+
+                                                                /* Get MS ext properties.                               */
+    CPU_INT08U   (*MS_GetExtPropertyTbl)(       CPU_INT08U                 dev_nbr,
+                                                USBD_MS_OS_EXT_PROPERTY  **pp_ext_property_tbl);
+#endif
+} USBD_CLASS_DRV;
+
+
+/*
+*********************************************************************************************************
+*                                    EP ASYNCHRONOUS CALLBACK API
+*********************************************************************************************************
+*/
+
+typedef  void  (*USBD_ASYNC_FNCT)(CPU_INT08U   dev_nbr,         /* Device number.                                       */
+                                  CPU_INT08U   ep_addr,         /* Endpoint address.                                    */
+                                  void        *p_buf,           /* Pointer to the buffer.                               */
+                                  CPU_INT32U   buf_len,         /* Buffer   length.                                     */
+                                  CPU_INT32U   xfer_len,        /* Transfer length.                                     */
+                                  void        *p_arg,           /* Function argument.                                   */
+                                  USBD_ERR     err);            /* Error status.                                        */
+
+
+/*
+*********************************************************************************************************
+*                                        USB DEVICE DRIVER API
+*********************************************************************************************************
+*/
+
+struct  usbd_drv_api {
+    void         (*Init)       (USBD_DRV     *p_drv,            /* Initialize.                                          */
+                                USBD_ERR     *p_err);
+
+    void         (*Start)      (USBD_DRV     *p_drv,            /* Start.                                               */
+                                USBD_ERR     *p_err);
+
+    void         (*Stop)       (USBD_DRV     *p_drv);           /* Stop.                                                */
+
+    CPU_BOOLEAN  (*AddrSet)    (USBD_DRV     *p_drv,            /* Set    Address.                                      */
+                                CPU_INT08U    dev_addr);
+
+    void         (*AddrEn)     (USBD_DRV     *p_drv,            /* Enable Address.                                      */
+                                CPU_INT08U    dev_addr);
+
+    CPU_BOOLEAN  (*CfgSet)     (USBD_DRV     *p_drv,            /* Set   Configuration.                                 */
+                                CPU_INT08U    cfg_val);
+
+    void         (*CfgClr)     (USBD_DRV     *p_drv,            /* Clear Configuration.                                 */
+                                CPU_INT08U    cfg_val);
+
+    CPU_INT16U   (*FrameNbrGet)(USBD_DRV     *p_drv);           /* Get Frame number.                                    */
+
+    void         (*EP_Open)    (USBD_DRV     *p_drv,            /* EP open.                                             */
+                                CPU_INT08U    ep_addr,
+                                CPU_INT08U    ep_type,
+                                CPU_INT16U    max_pkt_size,
+                                CPU_INT08U    transaction_frame,
+                                USBD_ERR     *p_err);
+
+    void         (*EP_Close)   (USBD_DRV     *p_drv,            /* EP close.                                            */
+                                CPU_INT08U    ep_addr);
+
+    CPU_INT32U   (*EP_RxStart) (USBD_DRV     *p_drv,            /* EP receive start.                                    */
+                                CPU_INT08U    ep_addr,
+                                CPU_INT08U   *p_buf,
+                                CPU_INT32U    buf_len,
+                                USBD_ERR     *p_err);
+
+    CPU_INT32U   (*EP_Rx)      (USBD_DRV     *p_drv,            /* EP receive/read data.                                */
+                                CPU_INT08U    ep_addr,
+                                CPU_INT08U   *p_buf,
+                                CPU_INT32U    buf_len,
+                                USBD_ERR     *p_err);
+
+    void         (*EP_RxZLP)   (USBD_DRV     *p_drv,            /* EP receive zero-length packet.                       */
+                                CPU_INT08U    ep_addr,
+                                USBD_ERR     *p_err);
+
+    CPU_INT32U   (*EP_Tx)      (USBD_DRV     *p_drv,            /* EP transmit/write data.                              */
+                                CPU_INT08U    ep_addr,
+                                CPU_INT08U   *p_buf,
+                                CPU_INT32U    buf_len,
+                                USBD_ERR     *p_err);
+
+    void         (*EP_TxStart) (USBD_DRV     *p_drv,            /* EP transmit start.                                   */
+                                CPU_INT08U    ep_addr,
+                                CPU_INT08U   *p_buf,
+                                CPU_INT32U    buf_len,
+                                USBD_ERR     *p_err);
+
+    void         (*EP_TxZLP)   (USBD_DRV     *p_drv,            /* EP transmit zero-length packet.                      */
+                                CPU_INT08U    ep_addr,
+                                USBD_ERR     *p_err);
+
+    CPU_BOOLEAN  (*EP_Abort)   (USBD_DRV     *p_drv,            /* EP abort.                                            */
+                                CPU_INT08U    ep_addr);
+
+    CPU_BOOLEAN  (*EP_Stall)   (USBD_DRV     *p_drv,            /* EP stall.                                            */
+                                CPU_INT08U    ep_addr,
+                                CPU_BOOLEAN   state);
+
+    void         (*ISR_Handler)(USBD_DRV     *p_drv);           /* ISR handler.                                         */
+};
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            FRAME MACROS
+*
+* Note(s) : (1) This macro takes into account when the frame number rolls over upon reaching the maximum
+*               value of 2047.
+*********************************************************************************************************
+*/
+
+#define  USBD_FRAME_NBR_GET(frame_nbr)                      ((frame_nbr) & USBD_FRAME_NBR_MASK)
+
+#define  USBD_MICROFRAME_NBR_GET(microframe_nbr)            ((microframe_nbr) >> 11u)
+
+                                                                /* See Note #1.                                         */
+#define  USBD_FRAME_NBR_DIFF_GET(frame_nbr1, frame_nbr2)    (((frame_nbr2) >= (frame_nbr1)) ? \
+                                                             ((frame_nbr2) - (frame_nbr1)) :  \
+                                                             ((USBD_MAX_FRAME_NBR + 1u + (frame_nbr2)) - (frame_nbr1)))
+
+
+/*
+*********************************************************************************************************
+*                                     ENDPOINT CONVERSION MACROS
+*********************************************************************************************************
+*/
+
+#define  USBD_EP_PHY_TO_ADDR(ep_phy_nbr)                 ( ((ep_phy_nbr) / 2u)                                    | \
+                                                          (((ep_phy_nbr) % 2u) ? USBD_EP_DIR_BIT : DEF_BIT_NONE))
+
+#define  USBD_EP_ADDR_TO_PHY(ep_addr)                    ((((ep_addr) & USBD_EP_NBR_MASK) *  2u)                  + \
+                                                         ((((ep_addr) & USBD_EP_DIR_MASK) != 0u) ? 1u : 0u))
+
+#define  USBD_EP_ADDR_TO_LOG(ep_addr)                    (CPU_INT08U)((ep_addr) & USBD_EP_NBR_MASK)
+
+#define  USBD_EP_PHY_TO_LOG(ep_phy_nbr)                  (ep_phy_nbr / 2u)
+
+#define  USBD_EP_LOG_TO_ADDR_IN(ep_log_nbr)              ((ep_log_nbr) | USBD_EP_DIR_IN)
+
+#define  USBD_EP_LOG_TO_ADDR_OUT(ep_log_nbr)             ((ep_log_nbr) | USBD_EP_DIR_OUT)
+
+#define  USBD_EP_IS_IN(ep_addr)                          ((((ep_addr) & USBD_EP_DIR_MASK) != 0u) ? DEF_YES: DEF_NO)
+
+
+/*
+*********************************************************************************************************
+*                                         DEBUG TRACE MACROS
+*********************************************************************************************************
+*/
+
+#if (USBD_CFG_DBG_TRACE_EN == DEF_ENABLED)
+#define  USBD_DBG_GENERIC(msg, ep_addr, if_nbr)                        USBD_Dbg((msg),                         \
+                                                                                (ep_addr),                     \
+                                                                                (if_nbr),                      \
+                                                                                USBD_ERR_NONE)
+
+#define  USBD_DBG_GENERIC_ERR(msg, ep_addr, if_nbr, err)               USBD_Dbg((msg),                        \
+                                                                                (ep_addr),                    \
+                                                                                (if_nbr),                     \
+                                                                                (err))
+
+#define  USBD_DBG_GENERIC_ARG(msg, ep_addr, if_nbr, arg)               USBD_DbgArg((msg),                     \
+                                                                                   (ep_addr),                 \
+                                                                                   (if_nbr),                  \
+                                                                                   (CPU_INT32U)(arg),         \
+                                                                                   (USBD_ERR_NONE))
+
+#define  USBD_DBG_GENERIC_ARG_ERR(msg, ep_addr, if_nbr, arg, err)      USBD_DbgArg((msg),                     \
+                                                                                   (ep_addr),                 \
+                                                                                   (if_nbr),                  \
+                                                                                   (CPU_INT32U)(arg),         \
+                                                                                   (err))
+#else
+#define  USBD_DBG_GENERIC(msg, epp_addr, if_nbr)
+#define  USBD_DBG_GENERIC_ERR(msg, epp_addr, if_nbr, err)
+#define  USBD_DBG_GENERIC_ARG(msg, epp_addr, if_nbr, arg)
+#define  USBD_DBG_GENERIC_ARG_ERR(msg, epp_addr, if_nbr, arg, err)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                              DEBUG STATS
+*********************************************************************************************************
+*/
+
+#if (USBD_CFG_DBG_STATS_EN == DEF_ENABLED)
+typedef  USBD_CFG_DBG_STATS_CNT_TYPE  USBD_DBG_STATS_CNT;       /* Adjust size of the stats cntrs.                      */
+
+
+typedef  struct  usbd_dev_stats {                               /* ------------------- DEVICE STATS ------------------- */
+    CPU_INT08U          DevNbr;                                 /* Dev nbr associated with stat struct.                 */
+
+    USBD_DBG_STATS_CNT  DevResetEventNbr;                       /* Nbr of reset   events.                               */
+    USBD_DBG_STATS_CNT  DevSuspendEventNbr;                     /* Nbr of suspend events.                               */
+    USBD_DBG_STATS_CNT  DevResumeEventNbr;                      /* Nbr of resume  events.                               */
+    USBD_DBG_STATS_CNT  DevConnEventNbr;                        /* Nbr of conn    events.                               */
+    USBD_DBG_STATS_CNT  DevDisconnEventNbr;                     /* Nbr of disconn events.                               */
+    USBD_DBG_STATS_CNT  DevSetupEventNbr;                       /* Nbr of setup   events.                               */
+
+    USBD_DBG_STATS_CNT  StdReqDevNbr;                           /* Nbr of         std req with a recipient of 'dev'.    */
+    USBD_DBG_STATS_CNT  StdReqDevStallNbr;                      /* Nbr of stalled std req with a recipient of 'dev'.    */
+    USBD_DBG_STATS_CNT  StdReqIF_Nbr;                           /* Nbr of         std req with a recipient of 'IF'.     */
+    USBD_DBG_STATS_CNT  StdReqIF_StallNbr;                      /* Nbr of stalled std req with a recipient of 'IF'.     */
+    USBD_DBG_STATS_CNT  StdReqEP_Nbr;                           /* Nbr of         std req with a recipient of 'EP'.     */
+    USBD_DBG_STATS_CNT  StdReqEP_StallNbr;                      /* Nbr of stalled std req with a recipient of 'EP'.     */
+    USBD_DBG_STATS_CNT  StdReqClassNbr;                         /* Nbr of         std req with a recipient of 'class'.  */
+    USBD_DBG_STATS_CNT  StdReqClassStallNbr;                    /* Nbr of stalled std req with a recipient of 'class'.  */
+
+    USBD_DBG_STATS_CNT  StdReqSetAddrNbr;                       /* Nbr of SET_ADDRESS       std req.                    */
+    USBD_DBG_STATS_CNT  StdReqSetCfgNbr;                        /* Nbr of SET_CONFIGURATION std req.                    */
+
+    USBD_DBG_STATS_CNT  CtrlRxSyncExecNbr;                      /* Nbr of sync ctrl rx exec'd.                          */
+    USBD_DBG_STATS_CNT  CtrlRxSyncSuccessNbr;                   /* Nbr of sync ctrl rx exec'd successfully.             */
+    USBD_DBG_STATS_CNT  CtrlTxSyncExecNbr;                      /* Nbr of sync ctrl tx exec'd.                          */
+    USBD_DBG_STATS_CNT  CtrlTxSyncSuccessNbr;                   /* Nbr of sync ctrl tx exec'd successfully.             */
+    USBD_DBG_STATS_CNT  CtrlRxStatusExecNbr;                    /* Nbr of sync ctrl rx status exec'd.                   */
+    USBD_DBG_STATS_CNT  CtrlRxStatusSuccessNbr;                 /* Nbr of sync ctrl rx status exec'd successfully.      */
+    USBD_DBG_STATS_CNT  CtrlTxStatusExecNbr;                    /* Nbr of sync ctrl tx status exec'd.                   */
+    USBD_DBG_STATS_CNT  CtrlTxStatusSuccessNbr;                 /* Nbr of sync ctrl tx status exec'd successfully.      */
+
+    USBD_DBG_STATS_CNT  BulkRxSyncExecNbr;                      /* Nbr of sync  bulk rx exec'd.                         */
+    USBD_DBG_STATS_CNT  BulkRxSyncSuccessNbr;                   /* Nbr of sync  bulk rx exec'd successfully.            */
+    USBD_DBG_STATS_CNT  BulkRxAsyncExecNbr;                     /* Nbr of async bulk rx exec'd.                         */
+    USBD_DBG_STATS_CNT  BulkRxAsyncSuccessNbr;                  /* Nbr of async bulk rx exec'd successfully.            */
+    USBD_DBG_STATS_CNT  BulkTxSyncExecNbr;                      /* Nbr of sync  bulk tx exec'd.                         */
+    USBD_DBG_STATS_CNT  BulkTxSyncSuccessNbr;                   /* Nbr of sync  bulk tx exec'd successfully.            */
+    USBD_DBG_STATS_CNT  BulkTxAsyncExecNbr;                     /* Nbr of async bulk tx exec'd.                         */
+    USBD_DBG_STATS_CNT  BulkTxAsyncSuccessNbr;                  /* Nbr of async bulk tx exec'd successfully.            */
+
+    USBD_DBG_STATS_CNT  IntrRxSyncExecNbr;                      /* Nbr of sync  intr rx exec'd.                         */
+    USBD_DBG_STATS_CNT  IntrRxSyncSuccessNbr;                   /* Nbr of sync  intr rx exec'd successfully.            */
+    USBD_DBG_STATS_CNT  IntrRxAsyncExecNbr;                     /* Nbr of async intr rx exec'd.                         */
+    USBD_DBG_STATS_CNT  IntrRxAsyncSuccessNbr;                  /* Nbr of async intr rx exec'd successfully.            */
+    USBD_DBG_STATS_CNT  IntrTxSyncExecNbr;                      /* Nbr of sync  intr tx exec'd.                         */
+    USBD_DBG_STATS_CNT  IntrTxSyncSuccessNbr;                   /* Nbr of sync  intr tx exec'd successfully.            */
+    USBD_DBG_STATS_CNT  IntrTxAsyncExecNbr;                     /* Nbr of async intr tx exec'd.                         */
+    USBD_DBG_STATS_CNT  IntrTxAsyncSuccessNbr;                  /* Nbr of async intr tx exec'd successfully.            */
+
+#if (USBD_CFG_EP_ISOC_EN == DEF_ENABLED)
+    USBD_DBG_STATS_CNT  IsocRxAsyncExecNbr;                     /* Nbr of async isoc rx exec'd.                         */
+    USBD_DBG_STATS_CNT  IsocRxAsyncSuccessNbr;                  /* Nbr of async isoc rx exec'd successfully.            */
+    USBD_DBG_STATS_CNT  IsocTxAsyncExecNbr;                     /* Nbr of async isoc tx exec'd.                         */
+    USBD_DBG_STATS_CNT  IsocTxAsyncSuccessNbr;                  /* Nbr of async isoc tx exec'd successfully.            */
+#endif
+} USBD_DBG_STATS_DEV;
+
+
+typedef  struct  usbd_ep_stats {                                /* --------------------- EP STATS --------------------- */
+    CPU_INT08U          Addr;                                   /* EP address.                                          */
+
+    USBD_DBG_STATS_CNT  EP_OpenNbr;                             /* Nbr of times this EP addr has been opened.           */
+    USBD_DBG_STATS_CNT  EP_AbortExecNbr;                        /* Nbr of times EP has been aborted.                    */
+    USBD_DBG_STATS_CNT  EP_AbortSuccessNbr;                     /* Nbr of times EP has been aborted successfully.       */
+    USBD_DBG_STATS_CNT  EP_CloseExecNbr;                        /* Nbr of times EP has been closed.                     */
+    USBD_DBG_STATS_CNT  EP_CloseSuccessNbr;                     /* Nbr of times EP has been closed successfully.        */
+
+    USBD_DBG_STATS_CNT  RxSyncExecNbr;                          /* Nbr of sync  rx exec'd.                              */
+    USBD_DBG_STATS_CNT  RxSyncSuccessNbr;                       /* Nbr of sync  rx exec'd successfully.                 */
+    USBD_DBG_STATS_CNT  RxSyncTimeoutErrNbr;                    /* Nbr of sync  rx that timed-out.                      */
+    USBD_DBG_STATS_CNT  RxAsyncExecNbr;                         /* Nbr of async rx exec'd.                              */
+    USBD_DBG_STATS_CNT  RxAsyncSuccessNbr;                      /* Nbr of async rx exec'd successfully.                 */
+    USBD_DBG_STATS_CNT  RxZLP_ExecNbr;                          /* Nbr of sync  rx ZLP exec'd.                          */
+    USBD_DBG_STATS_CNT  RxZLP_SuccessNbr;                       /* Nbr of sync  rx ZLP exec'd successfully.             */
+
+    USBD_DBG_STATS_CNT  TxSyncExecNbr;                          /* Nbr of sync  tx exec'd.                              */
+    USBD_DBG_STATS_CNT  TxSyncSuccessNbr;                       /* Nbr of sync  tx exec'd successfully.                 */
+    USBD_DBG_STATS_CNT  TxSyncTimeoutErrNbr;                    /* Nbr of sync  tx that timed-out.                      */
+    USBD_DBG_STATS_CNT  TxAsyncExecNbr;                         /* Nbr of async tx exec'd.                              */
+    USBD_DBG_STATS_CNT  TxAsyncSuccessNbr;                      /* Nbr of async tx exec'd successfully.                 */
+    USBD_DBG_STATS_CNT  TxZLP_ExecNbr;                          /* Nbr of sync  tx ZLP exec'd.                          */
+    USBD_DBG_STATS_CNT  TxZLP_SuccessNbr;                       /* Nbr of sync  tx ZLP exec'd successfully.             */
+
+    USBD_DBG_STATS_CNT  DrvRxStartNbr;                          /* Nbr of            call to drv's RxStart().           */
+    USBD_DBG_STATS_CNT  DrvRxStartSuccessNbr;                   /* Nbr of successful call to drv's RxStart().           */
+    USBD_DBG_STATS_CNT  DrvRxNbr;                               /* Nbr of            call to drv's Rx().                */
+    USBD_DBG_STATS_CNT  DrvRxSuccessNbr;                        /* Nbr of successful call to drv's Rx().                */
+    USBD_DBG_STATS_CNT  DrvRxZLP_Nbr;                           /* Nbr of            call to drv's RxZLP().             */
+    USBD_DBG_STATS_CNT  DrvRxZLP_SuccessNbr;                    /* Nbr of successful call to drv's RxZLP().             */
+    USBD_DBG_STATS_CNT  RxCmplNbr;                              /* Nbr of            call to RxCmpl().                  */
+    USBD_DBG_STATS_CNT  RxCmplErrNbr;                           /* Nbr of successful call to RxCmpl().                  */
+
+    USBD_DBG_STATS_CNT  DrvTxNbr;                               /* Nbr of            call to drv's Tx().                */
+    USBD_DBG_STATS_CNT  DrvTxSuccessNbr;                        /* Nbr of successful call to drv's Tx().                */
+    USBD_DBG_STATS_CNT  DrvTxStartNbr;                          /* Nbr of            call to drv's TxStart().           */
+    USBD_DBG_STATS_CNT  DrvTxStartSuccessNbr;                   /* Nbr of successful call to drv's TxStart().           */
+    USBD_DBG_STATS_CNT  DrvTxZLP_Nbr;                           /* Nbr of            call to drv's TxZLP().             */
+    USBD_DBG_STATS_CNT  DrvTxZLP_SuccessNbr;                    /* Nbr of successful call to drv's TxZLP().             */
+    USBD_DBG_STATS_CNT  TxCmplNbr;                              /* Nbr of            call to TxCmpl().                  */
+    USBD_DBG_STATS_CNT  TxCmplErrNbr;                           /* Nbr of successful call to TxCmpl().                  */
+} USBD_DBG_STATS_EP;
+
+extern  USBD_DBG_STATS_DEV  USBD_DbgStatsDevTbl[USBD_CFG_MAX_NBR_DEV];
+extern  USBD_DBG_STATS_EP   USBD_DbgStatsEP_Tbl[USBD_CFG_MAX_NBR_DEV][USBD_CFG_MAX_NBR_EP_OPEN];
+
+#define  USBD_DBG_STATS_DEV_RESET(dev_nbr)                          {                                                               \
+                                                                        Mem_Clr((void     *)&USBD_DbgStatsDevTbl[dev_nbr],          \
+                                                                                (CPU_SIZE_T) sizeof(USBD_DBG_STATS_DEV));           \
+                                                                    }
+#define  USBD_DBG_STATS_DEV_SET_DEV_NBR(dev_nbr)                    {                                                               \
+                                                                        USBD_DbgStatsDevTbl[dev_nbr].DevNbr = dev_nbr;              \
+                                                                    }
+#define  USBD_DBG_STATS_DEV_SET(dev_nbr, stat, val)                 {                                                               \
+                                                                        USBD_DbgStatsDevTbl[dev_nbr].stat = val;                    \
+                                                                    }
+#define  USBD_DBG_STATS_DEV_GET(dev_nbr, stat)                      {                                                               \
+                                                                        USBD_DbgStatsDevTbl[dev_nbr].stat;                          \
+                                                                    }
+#define  USBD_DBG_STATS_DEV_INC(dev_nbr, stat)                      {                                                               \
+                                                                        USBD_DbgStatsDevTbl[dev_nbr].stat++;                        \
+                                                                    }
+#define  USBD_DBG_STATS_DEV_INC_IF_TRUE(dev_nbr, stat, bool)        {                                                               \
+                                                                        if (bool == DEF_TRUE) {                                     \
+                                                                            USBD_DBG_STATS_DEV_INC(dev_nbr, stat);                  \
+                                                                        }                                                           \
+                                                                    }
+
+#define  USBD_DBG_STATS_EP_RESET(dev_nbr, ep_ix)                    {                                                               \
+                                                                        Mem_Clr((void     *)&USBD_DbgStatsEP_Tbl[dev_nbr][ep_ix],   \
+                                                                                (CPU_SIZE_T) sizeof(USBD_DBG_STATS_EP));            \
+                                                                    }
+#define  USBD_DBG_STATS_EP_SET_ADDR(dev_nbr, ep_ix, addr)           {                                                               \
+                                                                        USBD_DbgStatsEP_Tbl[dev_nbr][ep_ix].Addr = addr;            \
+                                                                    }
+#define  USBD_DBG_STATS_EP_SET(dev_nbr, ep_ix, stat, val)           {                                                               \
+                                                                        USBD_DbgStatsEP_Tbl[dev_nbr][ep_ix].stat = val;             \
+                                                                    }
+#define  USBD_DBG_STATS_EP_GET(dev_nbr, ep_ix, stat)                    USBD_DbgStatsEP_Tbl[dev_nbr][ep_ix].stat
+
+
+#define  USBD_DBG_STATS_EP_INC(dev_nbr, ep_ix, stat)                {                                                               \
+                                                                        USBD_DbgStatsEP_Tbl[dev_nbr][ep_ix].stat++;                 \
+                                                                    }
+#define  USBD_DBG_STATS_EP_INC_IF_TRUE(dev_nbr, ep_ix, stat, bool)  {                                                               \
+                                                                        if (bool == DEF_TRUE) {                                     \
+                                                                            USBD_DBG_STATS_EP_INC(dev_nbr, ep_ix, stat);            \
+                                                                        }                                                           \
+                                                                    }
+#else
+#define  USBD_DBG_STATS_DEV_RESET(dev_nbr)
+#define  USBD_DBG_STATS_DEV_SET_DEV_NBR(dev_nbr)
+#define  USBD_DBG_STATS_DEV_SET(dev_nbr, stat, val)
+#define  USBD_DBG_STATS_DEV_GET(dev_nbr, stat)
+#define  USBD_DBG_STATS_DEV_INC(dev_nbr, stat)
+#define  USBD_DBG_STATS_DEV_INC_IF_TRUE(dev_nbr, stat, bool)
+
+#define  USBD_DBG_STATS_EP_RESET(dev_nbr, ep_ix)
+#define  USBD_DBG_STATS_EP_SET_ADDR(dev_nbr, ep_ix, addr)
+#define  USBD_DBG_STATS_EP_SET(dev_nbr, ep_ix, stat, val)
+#define  USBD_DBG_STATS_EP_GET(dev_nbr, ep_ix, stat)
+#define  USBD_DBG_STATS_EP_INC(dev_nbr, ep_ix, stat)
+#define  USBD_DBG_STATS_EP_INC_IF_TRUE(dev_nbr, ep_ix, stat, bool)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*
+* Note(s) : (1) USB Spec 2.0, Section 5.5 states "Control transfers allow access to different parts of
+*               a device.  Control transfers are intended to support configuration/command/status type
+*               communication flows between client software and its function".
+*
+*               (a) "Each USB device is required to implement the Default Control Pipe as a message
+*                    pipe.  This pipe is used by the USB System Software.  The Default Control Pipe
+*                    provides access to the USB device's configuration, status, and control information".
+*
+*                   The 'USBD_EP_CtrlXXXX()' functions perform operations in the default endpoint.
+*                   Class drivers should use 'USBD_EP_CtrlXXXX()' to send/receive class specific requests.
+*********************************************************************************************************
+*/
+
+void             USBD_Init               (       USBD_ERR          *p_err);
+
+CPU_INT16U       USBD_VersionGet         (       void                    );
+
+                                                                /* ----------------- DEVICE OPERATIONS ---------------- */
+void             USBD_DevStart           (       CPU_INT08U         dev_nbr,
+                                                 USBD_ERR          *p_err);
+
+void             USBD_DevStop            (       CPU_INT08U         dev_nbr,
+                                                 USBD_ERR          *p_err);
+
+USBD_DEV_STATE   USBD_DevStateGet        (       CPU_INT08U         dev_nbr,
+                                                 USBD_ERR          *p_err);
+
+USBD_DEV_SPD     USBD_DevSpdGet          (       CPU_INT08U         dev_nbr,
+                                                 USBD_ERR          *p_err);
+
+void             USBD_DevSelfPwrSet      (       CPU_INT08U         dev_nbr,
+                                                 CPU_BOOLEAN        self_pwr,
+                                                 USBD_ERR          *p_err);
+
+void             USBD_DevSetMS_VendorCode(       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         vendor_code,
+                                                 USBD_ERR          *p_err);
+
+USBD_DEV_CFG    *USBD_DevCfgGet          (       CPU_INT08U         dev_nbr,
+                                                 USBD_ERR          *p_err);
+#if 0
+void             USBD_DevWaitForCfg      (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT16U         retry_max,
+                                                 CPU_INT32U         time_dly_ms,
+                                                 USBD_ERR          *p_err);
+#endif
+
+CPU_INT08U       USBD_DevAdd             (       USBD_DEV_CFG       *p_dev_cfg,
+                                                 USBD_BUS_FNCTS     *p_bus_fnct,
+                                                 USBD_DRV_API       *p_drv_api,
+                                                 USBD_DRV_CFG       *p_drv_cfg,
+                                                 USBD_DRV_BSP_API   *p_bsp_api,
+                                                 USBD_ERR           *p_err);
+
+CPU_INT16U       USBD_DevFrameNbrGet     (       CPU_INT08U          dev_nbr,
+                                                 USBD_ERR           *p_err);
+
+                                                                /* ------------- CONFIGUARTION OPERATIONS ------------- */
+CPU_INT08U       USBD_CfgAdd             (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         attrib,
+                                                 CPU_INT16U         max_pwr,
+                                                 USBD_DEV_SPD       spd,
+                                          const  CPU_CHAR          *p_name,
+                                                 USBD_ERR          *p_err);
+
+#if (USBD_CFG_HS_EN == DEF_ENABLED)
+void             USBD_CfgOtherSpeed      (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         cfg_nbr,
+                                                 CPU_INT08U         cfg_other,
+                                                 USBD_ERR          *p_err);
+#endif
+
+                                                                /* --------------- INTERFACE OPERATIONS --------------- */
+CPU_INT08U       USBD_IF_Add             (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         cfg_nbr,
+                                                 USBD_CLASS_DRV    *p_class_drv,
+                                                 void              *p_if_class_arg,
+                                                 void              *p_if_alt_class_arg,
+                                                 CPU_INT08U         class_code,
+                                                 CPU_INT08U         class_sub_code,
+                                                 CPU_INT08U         class_protocol_code,
+                                          const  CPU_CHAR          *p_name,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT08U       USBD_IF_AltAdd          (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         cfg_nbr,
+                                                 CPU_INT08U         if_nbr,
+                                                 void              *p_class_arg,
+                                          const  CPU_CHAR          *p_name,
+                                                 USBD_ERR          *p_err);
+
+#if (USBD_CFG_MAX_NBR_IF_GRP > 0)
+CPU_INT08U       USBD_IF_Grp             (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         cfg_nbr,
+                                                 CPU_INT08U         class_code,
+                                                 CPU_INT08U         class_sub_code,
+                                                 CPU_INT08U         class_protocol_code,
+                                                 CPU_INT08U         if_start,
+                                                 CPU_INT08U         if_cnt,
+                                          const  CPU_CHAR          *p_name,
+                                                 USBD_ERR          *p_err);
+#endif
+
+CPU_INT08U       USBD_DescDevGet         (       USBD_DRV          *p_drv,
+                                                 CPU_INT08U        *p_buf,
+                                                 CPU_INT08U         max_len,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT16U       USBD_DescCfgGet         (       USBD_DRV          *p_drv,
+                                                 CPU_INT08U        *p_buf,
+                                                 CPU_INT16U         max_len,
+                                                 CPU_INT08U         cfg_ix,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT08U       USBD_DescStrGet         (       USBD_DRV          *p_drv,
+                                                 CPU_INT08U        *p_buf,
+                                                 CPU_INT08U         max_len,
+                                                 CPU_INT08U         str_ix,
+                                                 USBD_ERR          *p_err);
+                                                                /* ---------------- STRING OPERATIONS ----------------- */
+void             USBD_StrAdd             (       CPU_INT08U         dev_nbr,
+                                          const  CPU_CHAR          *p_str,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT08U       USBD_StrIxGet           (       CPU_INT08U         dev_nbr,
+                                          const  CPU_CHAR          *p_str);
+
+                                                                /* ----------- DESCRIPTOR BUFFER OPERATIONS ----------- */
+void             USBD_DescWr08           (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         val);
+
+void             USBD_DescWr16           (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT16U         val);
+
+void             USBD_DescWr24           (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT32U         val);
+
+void             USBD_DescWr32           (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT32U         val);
+
+void             USBD_DescWr             (       CPU_INT08U         dev_nbr,
+                                          const  CPU_INT08U        *p_buf,
+                                                 CPU_INT16U         len);
+
+                                                                /* ---------------- ENDPOINT OPERATIONS --------------- */
+CPU_INT32U       USBD_CtrlTx             (       CPU_INT08U         dev_nbr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 CPU_INT16U         timeout_ms,
+                                                 CPU_BOOLEAN        end,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT32U       USBD_CtrlRx             (       CPU_INT08U         dev_nbr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 CPU_INT16U         timeout_ms,
+                                                 USBD_ERR          *p_err);
+
+                                                                /* -------------- BULK TRANFER FUNCTIONS -------------- */
+CPU_INT08U       USBD_BulkAdd            (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         cfg_nbr,
+                                                 CPU_INT08U         if_nbr,
+                                                 CPU_INT08U         if_alt_nbr,
+                                                 CPU_BOOLEAN        dir_in,
+                                                 CPU_INT16U         max_pkt_len,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT32U       USBD_BulkRx             (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 CPU_INT16U         timeout_ms,
+                                                 USBD_ERR          *p_err);
+
+void             USBD_BulkRxAsync        (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 USBD_ASYNC_FNCT    async_fnct,
+                                                 void              *p_async_arg,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT32U       USBD_BulkTx             (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 CPU_INT16U         timeout_ms,
+                                                 CPU_BOOLEAN        end,
+                                                 USBD_ERR          *p_err);
+
+void             USBD_BulkTxAsync        (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 USBD_ASYNC_FNCT    async_fnct,
+                                                 void              *p_async_arg,
+                                                 CPU_BOOLEAN        end,
+                                                 USBD_ERR          *p_err);
+
+                                                                /* ------------ INTERRUPT TRANFER FUNCTIONS ----------- */
+CPU_INT08U       USBD_IntrAdd            (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         cfg_nbr,
+                                                 CPU_INT08U         if_nbr,
+                                                 CPU_INT08U         if_alt_nbr,
+                                                 CPU_BOOLEAN        dir_in,
+                                                 CPU_INT16U         max_pkt_len,
+                                                 CPU_INT16U         interval,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT32U       USBD_IntrRx             (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 CPU_INT16U         timeout_ms,
+                                                 USBD_ERR          *p_err);
+
+void             USBD_IntrRxAsync        (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 USBD_ASYNC_FNCT    async_fnct,
+                                                 void              *p_async_arg,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT32U       USBD_IntrTx             (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 CPU_INT16U         timeout_ms,
+                                                 CPU_BOOLEAN        end,
+                                                 USBD_ERR          *p_err);
+
+void             USBD_IntrTxAsync        (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 USBD_ASYNC_FNCT    async_fnct,
+                                                 void              *p_async_arg,
+                                                 CPU_BOOLEAN        end,
+                                                 USBD_ERR          *p_err);
+
+#if (USBD_CFG_EP_ISOC_EN == DEF_ENABLED)
+                                                                /* ----------- ISOCHRONOUS TRANFER FUNCTIONS ---------- */
+CPU_INT08U      USBD_IsocAdd             (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         cfg_nbr,
+                                                 CPU_INT08U         if_nbr,
+                                                 CPU_INT08U         if_alt_nbr,
+                                                 CPU_BOOLEAN        dir_in,
+                                                 CPU_INT08U         attrib,
+                                                 CPU_INT16U         max_pkt_len,
+                                                 CPU_INT08U         transaction_frame,
+                                                 CPU_INT16U         interval,
+                                                 USBD_ERR          *p_err);
+
+void            USBD_IsocRxAsync         (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 USBD_ASYNC_FNCT    async_fnct,
+                                                 void              *p_async_arg,
+                                                 USBD_ERR          *p_err);
+
+void            USBD_IsocTxAsync         (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 void              *p_buf,
+                                                 CPU_INT32U         buf_len,
+                                                 USBD_ASYNC_FNCT    async_fnct,
+                                                 void              *p_async_arg,
+                                                 USBD_ERR          *p_err);
+
+void            USBD_IsocSyncRefreshSet  (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         cfg_nbr,
+                                                 CPU_INT08U         if_nbr,
+                                                 CPU_INT08U         if_alt_nbr,
+                                                 CPU_INT08U         synch_ep_addr,
+                                                 CPU_INT08U         sync_refresh,
+                                                 USBD_ERR          *p_err);
+
+void            USBD_IsocSyncAddrSet     (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         cfg_nbr,
+                                                 CPU_INT08U         if_nbr,
+                                                 CPU_INT08U         if_alt_nbr,
+                                                 CPU_INT08U         data_ep_addr,
+                                                 CPU_INT08U         sync_addr,
+                                                 USBD_ERR          *p_err);
+#endif
+
+                                                                /* ------------ STANDARD ENDPOINT FUNCTIONS ----------- */
+void             USBD_EP_TxZLP           (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 CPU_INT16U         timeout_ms,
+                                                 USBD_ERR          *p_err);
+
+void             USBD_EP_RxZLP           (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 CPU_INT16U         timeout_ms,
+                                                 USBD_ERR          *p_err);
+
+void             USBD_EP_Abort           (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 USBD_ERR          *p_err);
+
+void             USBD_EP_RxCmpl          (       USBD_DRV          *p_drv,
+                                                 CPU_INT08U         ep_log_nbr);
+
+void             USBD_EP_TxCmpl          (       USBD_DRV          *p_drv,
+                                                 CPU_INT08U         ep_log_nbr);
+
+void             USBD_EP_TxCmplExt       (       USBD_DRV          *p_drv,
+                                                 CPU_INT08U         ep_log_nbr,
+                                                 USBD_ERR           xfer_err);
+
+void             USBD_EP_Stall           (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 CPU_BOOLEAN        state,
+                                                 USBD_ERR          *p_err);
+
+CPU_BOOLEAN      USBD_EP_IsStalled       (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT16U       USBD_EP_MaxPktSizeGet   (       CPU_INT08U         dev_nbr,
+                                                 CPU_INT08U         ep_addr,
+                                                 USBD_ERR          *p_err);
+
+CPU_INT08U       USBD_EP_MaxPhyNbrGet    (       CPU_INT08U         dev_nbr);
+
+CPU_INT08U       USBD_EP_MaxNbrOpenGet   (       CPU_INT08U         dev_nbr);
+
+                                                                /* -------------- DEVICE DRIVER CALLBACKS ------------- */
+void             USBD_EventConn          (       USBD_DRV          *p_drv);
+
+void             USBD_EventDisconn       (       USBD_DRV          *p_drv);
+
+void             USBD_EventHS            (       USBD_DRV          *p_drv);
+
+void             USBD_EventReset         (       USBD_DRV          *p_drv);
+
+void             USBD_EventSuspend       (       USBD_DRV          *p_drv);
+
+void             USBD_EventResume        (       USBD_DRV          *p_drv);
+
+void             USBD_EventSetup         (       USBD_DRV          *p_drv,
+                                                 void              *p_buf);
+
+                                                                /* ------------------- OS FUNCTIONS ------------------- */
+void             USBD_OS_DlyMs           (       CPU_INT32U         ms);
+
+#if (USBD_CFG_DBG_TRACE_EN == DEF_ENABLED)
+void             USBD_Dbg                (const  CPU_CHAR          *p_msg,
+                                                 CPU_INT08U         ep_addr,
+                                                 CPU_INT08U         if_nbr,
+                                                 USBD_ERR           err);
+
+void             USBD_DbgArg             (const  CPU_CHAR          *p_msg,
+                                                 CPU_INT08U         ep_addr,
+                                                 CPU_INT08U         if_nbr,
+                                                 CPU_INT32U         arg,
+                                                 USBD_ERR           err);
+
+void             USBD_Trace              (const  CPU_CHAR          *p_str);
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_CFG_CTRL_REQ_TIMEOUT_mS
+#error  "USBD_CFG_CTRL_REQ_TIMEOUT_mS not #define'd in 'usbd_cfg.h' [MUST be > 0]"
+
+#elif   (USBD_CFG_CTRL_REQ_TIMEOUT_mS < 1u)
+#error  "USBD_CFG_CTRL_REQ_TIMEOUT_mS illegally #define'd in 'usbd_cfg.h' [MUST be > 0 && <= 65535]"
+
+#elif   (USBD_CFG_CTRL_REQ_TIMEOUT_mS > DEF_INT_16U_MAX_VAL)
+#error  "USBD_CFG_CTRL_REQ_TIMEOUT_mS illegally #define'd in 'usbd_cfg.h' [MUST be > 0 && <= 65535]"
+#endif
+
+#ifndef  USBD_CFG_MAX_NBR_DEV
+#error  "USBD_CFG_MAX_NBR_DEV not #define'd in 'usbd_cfg.h' [MUST be > 0]"
+
+#elif   (USBD_CFG_MAX_NBR_DEV < 1u)
+#error  "USBD_CFG_MAX_NBR_DEV illegally #define'd in 'usbd_cfg.h' [MUST be > 0 && < USBD_DEV_NBR_TOT]"
+
+#elif   (USBD_CFG_MAX_NBR_DEV > DEF_INT_08U_MAX_VAL - 1u)
+#error  "USBD_CFG_MAX_NBR_DEV illegally #define'd in 'usbd_cfg.h' [MUST be > 0 && < USBD_DEV_NBR_TOT]"
+#endif
+
+#ifndef  USBD_CFG_MAX_NBR_CFG
+#error  "USBD_CFG_MAX_NBR_CFG not #define'd in 'usbd_cfg.h' [MUST be > 0]"
+
+#elif   (USBD_CFG_MAX_NBR_CFG < 1u)
+#error  "USBD_CFG_MAX_NBR_CFG illegally #define'd in 'usbd_cfg.h' [MUST be > 0]"
+#endif
+
+#ifndef  USBD_CFG_BUF_ALIGN_OCTETS
+#error  "USBD_CFG_BUF_ALIGN_OCTETS not #define'd in 'usbd_cfg.h' [MUST be > 0]"
+#endif
+
+#ifndef  USBD_CFG_MAX_NBR_IF
+#error  "USBD_CFG_MAX_NBR_IF not #define'd in 'usbd_cfg.h' [MUST be > 0]"
+
+#elif   (USBD_CFG_MAX_NBR_IF < USBD_CFG_MAX_NBR_CFG)
+#error  "USBD_CFG_MAX_NBR_IF illegally #define'd in 'usbd_cfg.h' [MUST be >= USBD_CFG_MAX_NBR_CFG]"
+#endif
+
+#ifndef  USBD_CFG_MAX_NBR_IF_ALT
+#error  "USBD_CFG_MAX_NBR_IF_ALT not #define'd in 'usbd_cfg.h' [MUST be > 0]"
+
+#elif   (USBD_CFG_MAX_NBR_IF_ALT < USBD_CFG_MAX_NBR_IF)
+#error  "USBD_CFG_MAX_NBR_IF_ALT illegally #define'd in 'usbd_cfg.h' [MUST be >= USBD_CFG_MAX_NBR_IF]"
+#endif
+
+#ifndef  USBD_CFG_MAX_NBR_IF_GRP
+#error  "USBD_CFG_MAX_NBR_IF_GRP not #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+
+#elif   (USBD_CFG_MAX_NBR_IF_GRP < 0u)
+#error  "USBD_CFG_MAX_NBR_IF_GRP illegally #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+#ifndef  USBD_CFG_MAX_NBR_EP_DESC
+#error  "USBD_CFG_MAX_NBR_EP_DESC not #define'd in 'usbd_cfg.h' [MUST be > 0]"
+#endif
+
+#ifndef  USBD_CFG_MAX_NBR_EP_OPEN
+#error  "USBD_CFG_MAX_NBR_EP_OPEN not #define'd in 'usbd_cfg.h' [MUST be >= 2]"
+
+#elif   (USBD_CFG_MAX_NBR_EP_OPEN < 2u)
+#error  "USBD_CFG_MAX_NBR_EP_OPEN illegally #define'd in 'usbd_cfg.h' [MUST be >= 2]"
+#endif
+
+#ifndef  USBD_CFG_MAX_NBR_URB_EXTRA
+#error  "USBD_CFG_MAX_NBR_URB_EXTRA not #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+#endif
+
+#ifndef  USBD_CFG_MAX_NBR_STR
+#error  "USBD_CFG_MAX_NBR_STR not #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+
+#elif   (USBD_CFG_MAX_NBR_STR < 0u)
+#error  "USBD_CFG_MAX_NBR_STR illegally #define'd in 'usbd_cfg.h' [MUST be >= 0]"
+
+#elif   (USBD_CFG_MAX_NBR_STR > 100u)
+#error  "USBD_CFG_MAX_NBR_STR illegally #define'd in 'usbd_cfg.h' [MUST be < 100]"
+#endif
+
+#ifndef  USBD_CFG_DBG_TRACE_EN
+#error  "USBD_CFG_DBG_TRACE_EN not #define'd in 'usbd_cfg.h' [MUST be DEF_DISABLED || DEF_ENABLED]"
+
+#elif  ((USBD_CFG_DBG_TRACE_EN != DEF_DISABLED) && \
+        (USBD_CFG_DBG_TRACE_EN != DEF_ENABLED ))
+#error  "USBD_CFG_DBG_TRACE_EN illegally #define'd in 'usbd_cfg.h' [MUST be  DEF_DISABLED || DEF_ENABLED]"
+#endif
+
+#ifndef  USBD_CFG_ERR_ARG_CHK_EXT_EN
+#error  "USBD_CFG_ERR_ARG_CHK_EXT_EN not #define'd in 'usbd_cfg.h' [MUST be DEF_DISABLED || DEF_ENABLED]"
+
+#elif  ((USBD_CFG_ERR_ARG_CHK_EXT_EN != DEF_DISABLED) && \
+        (USBD_CFG_ERR_ARG_CHK_EXT_EN != DEF_ENABLED ))
+#error  "USBD_CFG_ERR_ARG_CHK_EXT_EN illegally #define'd in 'usbd_cfg.h' [MUST be DEF_DISABLED || DEF_ENABLED]"
+#endif
+
+#ifndef  USBD_CFG_MS_OS_DESC_EN
+#error  "USBD_CFG_MS_OS_DESC_EN not #define'd in 'usbd_cfg.h' [MUST be DEF_DISABLED || DEF_ENABLED]"
+
+#elif  ((USBD_CFG_MS_OS_DESC_EN != DEF_DISABLED) && \
+        (USBD_CFG_MS_OS_DESC_EN != DEF_ENABLED ))
+#error  "USBD_CFG_MS_OS_DESC_EN illegally #define'd in 'usbd_cfg.h' [MUST be DEF_DISABLED || DEF_ENABLED]"
+#endif
+
+#if     (USBD_CFG_DBG_TRACE_EN == DEF_ENABLED)
+#ifndef  USBD_CFG_DBG_TRACE_NBR_EVENTS
+#error  "USBD_CFG_DBG_TRACE_NBR_EVENTS not #define'd in 'usbd_cfg.h' [MUST be > 0]"
+
+#elif   (USBD_CFG_DBG_TRACE_NBR_EVENTS  < 1u)
+#error  "USBD_CFG_DBG_TRACE_NBR_EVENTS not #define'd in 'usbd_cfg.h' [MUST be > 0]"
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Device/Source/usbd_internal.h b/src/ucos_v1_42/micrium_source/uC-USB-Device/Source/usbd_internal.h
new file mode 100644
index 0000000..13dbbc3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Device/Source/usbd_internal.h
@@ -0,0 +1,212 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    USB DEVICE CORE INTERNAL FUNCTIONS
+*
+* File          : usbd_internal.h
+* Version       : V4.05.00
+* Programmer(s) : FT
+*                 FGK
+*                 OD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_INTERNAL_MODULE_PRESENT
+#define  USBD_INTERNAL_MODULE_PRESENT
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "usbd_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                    INTERNAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+                                                                /* ------------ DEVICE INTERNAL FUNCTIONS  ------------ */
+USBD_DRV  *USBD_DrvRefGet          (CPU_INT08U   dev_nbr);
+
+void       USBD_CoreTaskHandler    (void);
+
+void       USBD_DbgTaskHandler     (void);
+
+                                                                /* ------------ ENDPOINT INTERNAL FUNCTIONS ----------- */
+void       USBD_EP_Init            (void);
+
+void       USBD_EventEP            (USBD_DRV    *p_drv,
+                                    CPU_INT08U   ep_addr,
+                                    USBD_ERR     err);
+
+void       USBD_CtrlOpen           (CPU_INT08U   dev_nbr,
+                                    CPU_INT16U   max_pkt_size,
+                                    USBD_ERR    *p_err);
+
+void       USBD_CtrlClose          (CPU_INT08U   dev_nbr,
+                                    USBD_ERR    *p_err);
+
+void       USBD_CtrlStall          (CPU_INT08U   dev_nbr,
+                                    USBD_ERR    *p_err);
+
+void       USBD_CtrlRxStatus       (CPU_INT08U   dev_nbr,
+                                    CPU_INT16U   timeout_ms,
+                                    USBD_ERR    *p_err);
+
+void       USBD_CtrlTxStatus       (CPU_INT08U   dev_nbr,
+                                    CPU_INT16U   timeout_ms,
+                                    USBD_ERR    *p_err);
+
+void       USBD_EP_Open            (USBD_DRV    *p_drv,
+                                    CPU_INT08U   ep_addr,
+                                    CPU_INT16U   max_pkt_size,
+                                    CPU_INT08U   attrib,
+                                    CPU_INT08U   interval,
+                                    USBD_ERR    *p_err);
+
+void       USBD_EP_Close           (USBD_DRV    *p_drv,
+                                    CPU_INT08U   ep_addr,
+                                    USBD_ERR    *p_err);
+
+void       USBD_EP_XferAsyncProcess(USBD_DRV    *p_drv,
+                                    CPU_INT08U   ep_addr,
+                                    USBD_ERR     xfer_err);
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*                                      DEFINED IN OS'S usbd_os.c
+*********************************************************************************************************
+*/
+
+void   USBD_OS_Init           (USBD_ERR    *p_err);
+
+void   USBD_OS_EP_SignalCreate(CPU_INT08U   dev_nbr,
+                               CPU_INT08U   ep_ix,
+                               USBD_ERR    *p_err);
+
+void   USBD_OS_EP_SignalDel   (CPU_INT08U   dev_nbr,
+                               CPU_INT08U   ep_ix);
+
+void   USBD_OS_EP_SignalPend  (CPU_INT08U   dev_nbr,
+                               CPU_INT08U   ep_ix,
+                               CPU_INT16U   timeout_ms,
+                               USBD_ERR    *p_err);
+
+void   USBD_OS_EP_SignalAbort (CPU_INT08U   dev_nbr,
+                               CPU_INT08U   ep_ix,
+                               USBD_ERR    *p_err);
+
+void   USBD_OS_EP_SignalPost  (CPU_INT08U   dev_nbr,
+                               CPU_INT08U   ep_ix,
+                               USBD_ERR    *p_err);
+
+void   USBD_OS_EP_LockCreate  (CPU_INT08U   dev_nbr,
+                               CPU_INT08U   ep_ix,
+                               USBD_ERR    *p_err);
+
+void   USBD_OS_EP_LockDel     (CPU_INT08U   dev_nbr,
+                               CPU_INT08U   ep_ix);
+
+void   USBD_OS_EP_LockAcquire (CPU_INT08U   dev_nbr,
+                               CPU_INT08U   ep_ix,
+                               CPU_INT16U   timeout_ms,
+                               USBD_ERR    *p_err);
+
+void   USBD_OS_EP_LockRelease (CPU_INT08U   dev_nbr,
+                               CPU_INT08U   ep_ix);
+
+void   USBD_OS_DbgEventRdy    (void);
+void   USBD_OS_DbgEventWait   (void);
+
+void  *USBD_OS_CoreEventGet   (CPU_INT32U   timeout_ms,
+                               USBD_ERR    *p_err);
+
+void   USBD_OS_CoreEventPut   (void        *p_event);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Cfg/Template/usbh_cfg.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Cfg/Template/usbh_cfg.h
new file mode 100644
index 0000000..89336bc
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Cfg/Template/usbh_cfg.h
@@ -0,0 +1,378 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                       The Embedded USB Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    USB HOST STACK CONFIGURATION
+*
+* File           : usbh_cfg.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_CFG_MODULE_PRESENT
+#define  USBH_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    USB HOST STACK CONFIGURATION
+*
+* Notes:    (1) USB uses a tiered star topology. Each external hub has one upstream-facing port and one or
+*               more downstream facing ports. Up to five external hubs can connect in series with a limit of
+*               127 peripherals and hubs including root hub(s). There is one root hub per USB host controller.
+*               USBH_CFG_MAX_NBR_DEVS is set to 1 if Host accepts only one single device and doesn't
+*               use any external hub.
+*
+*                                           -------------------------------
+*               TIER 1                      |            HOST             |
+*                                           |  ------------------------   |
+*                                           |  |       Root Hub        |  |
+*                                           |  | []    []     []   []  |  |
+*                                           -------------------------------
+*                                                |      |      |     |
+*                           ---------------------    ----      |     ------------------------------
+*                           |                        |         |                                  |
+*                        --------            -------------   --------                        ---------
+*               TIER 2   |Device|            |    Hub    |   |Device|                        |  Hub  |
+*                        --------            |[] [] [] []|   --------                        | [] [] |
+*                                            -------------                                   ---------
+*                                                |   |  |                                      |   |
+*                                       ----------   |  ----------------                    ----   -----
+*                                       |            |                 |                    |          |
+*                                    ---------    --------    ---------------------     --------   --------
+*               TIER 3               |  Hub  |    |Device|    |        Hub        |     |Device|   |Device|
+*                                    | [] [] |    --------    |                   |     --------   --------
+*                                    ---------                | -------  -------  |
+*                                      |   |                  | |Device| |Device| |
+*                                     --   -------            | -------  -------  |
+*                                     |          |            |  Compound Device  |
+*                                   --------  --------        ---------------------
+*               TIER 4              |Device|  |Device|
+*                                   --------  --------
+*
+*           (2) Host Stack Structure:
+*
+*               Host stack
+*               |- Device 1
+*                      |- Configuration 1
+*                              |- Endpoint IN 0
+*                              |- Endpoint OUT 0
+*                              |-  Interface 1
+*                                       |- Endpoint IN 1
+*                                       |- Endpoint OUT 1
+*               |- Device 2
+*                      |- Configuration 1
+*                              |- Endpoint IN 0
+*                              |- Endpoint OUT 0
+*                              |-  Interface 1
+*                                       |- Endpoint IN 1
+*                              |-  Interface 2
+*                                       |- Endpoint IN 2
+*                                       |- Endpoint OUT 2
+*               |- Device 3
+*                      |- Configuration 1
+*                              |- Endpoint IN 0
+*                              |- Endpoint OUT 0
+*                              |-  Interface 1
+*                                       |- Endpoint IN 1
+*               |- ...
+*
+*               (a) Configuration descriptor gives information about a specific device configuration.
+*                   USBH_CFG_MAX_NBR_CFGS, the number of configuration descriptors generally has the
+*                   value of 1 because most device only has one configuration descriptor.
+*
+*               (b) Interface descriptors is the grouping of endpoints into a function group performing a
+*                   single feature of the device. A device can have 1 or many interface enabled at once.
+*
+*                   CLASS                    REQUIRED INTERFACES
+*                  -------                   -------------------
+*                   MSC                      1 interface
+*                   HID                      1 interface
+*                   CDC ACM                  2 interfaces
+*
+*              (c)  Each interface descriptor has zero or more endpoint descriptors describing a unique
+*                   set of endpoints within the interface. USBH_CFG_MAX_NBR_EPS represents the maximum
+*                   number of endpoints that an interface can contain. The control enpoints shouldn't
+*                   be considered here.
+*
+*           (3) USBH_CFG_MAX_HUB_PORTS specifies the maximum number of ports that can be active and
+*               managed at the same time per external hub connected to the Host. If USBH_CFG_MAX_HUB_PORTS
+*               is set to a value less than the actual number of ports available on a hub, then the rest
+*               of the ports on this hub will be rendered unusable. Currently on the market, the common
+*               number of ports for external hubs are 3, 4, 5 and 7. USBH_CFG_MAX_HUB_PORTS is
+*               recommended to be set to 7.
+*
+*           (4) The standard request timeout is 5 secs (refer to Universal Serial Bus specification,
+*               revision 2,0, sec 9.2.6.4).
+*********************************************************************************************************
+*/
+
+                                                                /* ------ USB TOPOLOGY CFG. SEE NOTE #1 AND #2. ------- */
+
+                                                                /*  Number of host controllers                          */
+                                                                /*  The number of host controllers that will be ...     */
+                                                                /*  ... added to the stack.                             */
+#define  USBH_CFG_MAX_NBR_HC                               1u
+
+                                                                /*  Maximum number of class driver supported            */
+                                                                /*  The maximum number of class driver ...              */
+                                                                /*  ... (MSC, HID, etc) you will use and add to the ... */
+                                                                /*  ... core. The hub class is mandatory and must be ...*/
+                                                                /*  ... accounted in the total number.                  */
+#define  USBH_CFG_MAX_NBR_CLASS_DRVS                       4u
+
+                                                                /*  Maximum number of devices                           */
+                                                                /*  The maximum number of devices that the USB host ... */
+                                                                /*  ... stack can accept. This must be < 127.           */
+#define  USBH_CFG_MAX_NBR_DEVS                            10u
+
+                                                                /*  Maximum number of configurations per device         */
+                                                                /*  The maximum number of USB configurations that ...   */
+                                                                /*  ... each device can contain. Most of the time, ...  */
+                                                                /*  ... devices will have only one configuration.       */
+#define  USBH_CFG_MAX_NBR_CFGS                             1u
+
+                                                                /*  Maximum number of interfaces per USB configuration. */
+                                                                /*  The maximum number of interface per USB ...         */
+                                                                /*  ... configurations that each device can contain. ...*/
+                                                                /*  ... Simple USB devices will generally have only ... */
+                                                                /*  ... one interface. If you plan to use composite ... */
+                                                                /*  ... devices, you should increase this value.        */
+#define  USBH_CFG_MAX_NBR_IFS                              1u
+
+                                                                /*  Max number of endpoints per interface.              */
+                                                                /*  The maximum number of endpoints that an interface...*/
+                                                                /*  ... can contain. The number of endpoints greatly ...*/
+                                                                /*  ... depends on the device's class, but should ...   */
+                                                                /*  ... generally be around two or three.               */
+#define  USBH_CFG_MAX_NBR_EPS                              3u
+
+                                                                /*  Maximum configuration descriptor length             */
+                                                                /*  The maximum length of the buffer that is used to ...*/
+                                                                /*  ... hold the USB configuration descriptor.          */
+#define  USBH_CFG_MAX_CFG_DATA_LEN                       256u
+
+                                                                /*  Maximum length of string descriptors                */
+                                                                /*  The maximum length for string descriptors.          */
+#define  USBH_CFG_MAX_STR_LEN                            256u
+
+                                                                /*  Timeout for standard request (ms)                   */
+                                                                /*  Timeout in ms for standard requests to complete.    */
+#define  USBH_CFG_STD_REQ_TIMEOUT                       5000u
+
+                                                                /*  Number of retries on stand requests fail            */
+                                                                /*  Number of times the stack should retry to ...       */
+                                                                /*  ... execute a standard request when it failed.      */
+#define  USBH_CFG_STD_REQ_RETRY                            3u
+
+                                                                /*  Maximum number of isochronous descriptor            */
+                                                                /*  The maximum number of isochronous descriptor ...    */
+                                                                /*  ... that will be shared between all isochronous ... */
+                                                                /*  ... endpoints.                                      */
+#define  USBH_CFG_MAX_ISOC_DESC                            1u
+
+                                                                /*  Maximum number of extra URB                         */
+                                                                /*  The maximum number of extra URB used for streaming. */
+#define  USBH_CFG_MAX_EXTRA_URB_PER_DEV                    1u
+
+                                                                /*  Maximum number of USB hub                           */
+                                                                /*  The maximum number of external and root hub that ...*/
+                                                                /*  ... can be connected.                               */
+#define  USBH_CFG_MAX_HUBS                                 2u
+
+                                                                /*  Maximum number of port per USB hub                  */
+                                                                /*  The maximum number of supported ports per hub. ...  */
+                                                                /*  ... See note #3.                                    */
+#define  USBH_CFG_MAX_HUB_PORTS                            7u
+
+
+/*
+*********************************************************************************************************
+*                           COMMUNICATION DEVICE CLASS (CDC) CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /*  Maximum number of CDC device                        */
+                                                                /*  The maximum number of CDC devices that can be ...   */
+                                                                /*  ... connected at the same time.                     */
+#define  USBH_CDC_CFG_MAX_DEV                              1u
+
+                                                                /*  Maximum number of CDC ACM device                    */
+                                                                /*  The maximum number of CDC ACM devices that can ...  */
+                                                                /*  ... be connected at the same time.                  */
+#define  USBH_CDC_ACM_CFG_MAX_DEV                          1u
+
+
+/*
+*********************************************************************************************************
+*                          HUMAN INTERFACE DEVICE (HID) CLASS CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /*  Maximum number of HID devices                       */
+                                                                /*  The maximum number of HID devices that can be ...   */
+                                                                /*  ... connected at the same time.                     */
+#define  USBH_HID_CFG_MAX_DEV                              5u
+
+                                                                /*  Maximum number of application collections           */
+                                                                /*  The maximum number of HID application ...           */
+                                                                /*  ... collections supported.                          */
+#define  USBH_HID_CFG_MAX_NBR_APP_COLL                    10u
+
+                                                                /*  Maximum number of report IDs                        */
+                                                                /*  The maximum number of HID report IDs.               */
+#define  USBH_HID_CFG_MAX_NBR_REPORT_ID                   15u
+
+                                                                /*  Maximum number of report formats                    */
+                                                                /*  The maximum number of HID report formats.           */
+#define  USBH_HID_CFG_MAX_NBR_REPORT_FMT                  15u
+
+                                                                /*  Maximum number of usage in local                    */
+                                                                /*  The maximum number of HID usage in local.           */
+#define  USBH_HID_CFG_MAX_NBR_USAGE                       15u
+
+                                                                /*  Maximum length of transmission buffer               */
+                                                                /*  The maximum length of buffer used for OUT reports.  */
+#define  USBH_HID_CFG_MAX_TX_BUF_SIZE                     64u
+
+                                                                /*  Maximum length of reception buffer                  */
+                                                                /*  The maximum length of buffer used for IN reports.   */
+#define  USBH_HID_CFG_MAX_RX_BUF_SIZE                    128u
+
+                                                                /*  Maximum number of callbacks for device              */
+                                                                /*  The maximum length of buffer used for IN reports.   */
+#define  USBH_HID_CFG_MAX_NBR_RXCB                         2u
+
+                                                                /*  Maximum length of report descriptor                 */
+                                                                /*  The maximum length of buffer used to hold the ...   */
+                                                                /*  ... report descriptor.                              */
+#define  USBH_HID_CFG_MAX_REPORT_DESC_LEN                400u
+
+                                                                /*  Maximum error count                                 */
+                                                                /*  The maximum number of error that can occur.         */
+#define  USBH_HID_CFG_MAX_ERR_CNT                          5u
+
+                                                                /*  Maximum global collection for push/pop items        */
+                                                                /*  The maximum number of global push/pop items.        */
+#define  USBH_HID_CFG_MAX_GLOBAL                           2u
+
+                                                                /*  Maximum collections for open/close collection       */
+                                                                /*  The maximum number of collections for open/close ...*/
+                                                                /*  ... collection.                                     */
+#define  USBH_HID_CFG_MAX_COLL                            10u
+
+
+/*
+*********************************************************************************************************
+*                               MASS STORAGE CLASS (MSC) CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /*  Maximum number of MSC devices                       */
+                                                                /*  The maximum number of MSC devices that can be ...   */
+                                                                /*  ... connected at the same time.                     */
+#define  USBH_MSC_CFG_MAX_DEV                              1u
+
+
+/*
+*********************************************************************************************************
+*                    FUTURE TECHNOLOGY DEVICES INTERNATIONAL (FTDI) CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                                                /*  Maximum number of FTDI devices                      */
+                                                                /*  The maximum number of FTDI devices that can be ...  */
+                                                                /*  ... connected at the same time.                     */
+#define  USBH_FTDI_CFG_MAX_DEV                             3u
+
+                                                                /*  Custom vendor ID for FTDI device                    */
+                                                                /*  Specifies a custom vendor ID for a FTDI device ...  */
+                                                                /*  ... to accept.                                      */
+#define  USBH_FTDI_CFG_ID_VENDOR_CUSTOM               0x0000u
+
+                                                                /*  Custom product ID for FTDI device                   */
+                                                                /*  Specifies a custom product ID for a FTDI device ... */
+                                                                /*  ... to accept.                                      */
+#define  USBH_FTDI_CFG_ID_PRODUCT_CUSTOM              0x0000u
+
+
+/*
+ *********************************************************************************************************
+ *                                    TRACE / DEBUG CONFIGURATION
+ *********************************************************************************************************
+ */
+
+#define  USBH_CFG_PRINT_LOG                      DEF_DISABLED
+#define  USBH_CFG_PRINT_ERR                      DEF_DISABLED
+#define  USBH_CFG_PRINT_FNAME                    DEF_DISABLED
+
+#include 
+#define  USBH_PRINTF                             printf
+
+#if  (USBH_CFG_PRINT_LOG == DEF_ENABLED)
+#define  USBH_PRINT_LOG(...)         USBH_PRINTF(__VA_ARGS__)
+#endif
+
+#if  (USBH_CFG_PRINT_ERR == DEF_ENABLED)
+#define  USBH_PRINT_ERR(err)         USBH_PRINTF("ERR:%s:%d:err=%d\n", __FUNCTION__, __LINE__, err);
+#else
+#define  USBH_PRINT_ERR(err)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Cfg/Template/usbh_hc_cfg.c b/src/ucos_v1_42/micrium_source/uC-USB-Host/Cfg/Template/usbh_hc_cfg.c
new file mode 100644
index 0000000..ea25293
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Cfg/Template/usbh_hc_cfg.c
@@ -0,0 +1,110 @@
+/*
+*********************************************************************************************************
+*                                                uC/USB
+*                                        The Embedded USB Stack
+*
+*                          (c) Copyright 2003-2010; Micrium, Inc.; Weston, FL
+*            (c) Copyright 2009-2010; OnChip Technologies India Pvt. Ltd.; Hyderabad, INDIA
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               USB HOST CONTROLLER CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : usbh_hc_cfg.c
+* Version       : V3.41.03
+* Programmer(s) : JFD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define   USBH_HC_CFG_MODULE
+#define   MICRIUM_SOURCE
+#include  "usbh_hc_cfg.h"
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             LOCAL TABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+USBH_HC_CFG  USBH_HC_TemplateCfg = {
+    (CPU_ADDR)0x00000000u,                                      /* Base addr of host controller hw registers.           */
+    (CPU_ADDR)0x00000000u,                                      /* Base addr of host controller dedicated mem.          */
+              0u,                                               /* Size      of host controller dedicated mem.          */
+              DEF_ENABLED,                                      /* Does HC can access sys mem?                          */
+              1024u,                                            /* Data buf max len.                                    */
+              2u,                                               /* Max nbr opened bulk EP.                              */
+              2u,                                               /* Max nbr opened intr EP.                              */
+              2u                                                /* Max nbr opened isoc EP.                              */
+};
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Cfg/Template/usbh_hc_cfg.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Cfg/Template/usbh_hc_cfg.h
new file mode 100644
index 0000000..cef829b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Cfg/Template/usbh_hc_cfg.h
@@ -0,0 +1,117 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                       The Embedded USB Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               USB HOST CONTROLLER CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : usbh_hc_cfg.h
+* Version       : V3.41.03
+* Programmer(s) : JFD
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_HC_CFG_MODULE_PRESENT
+#define  USBH_HC_CFG_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_HC_CFG_MODULE
+#define  USBH_HC_CFG_MODULE_EXT
+#else
+#define  USBH_HC_CFG_MODULE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  USB HOST CONTROLLER CONFIGURATION
+*********************************************************************************************************
+*/
+
+USBH_HC_CFG_MODULE_EXT  USBH_HC_CFG  USBH_HC_TemplateCfg;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/CDC/ACM/usbh_acm.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/CDC/ACM/usbh_acm.h
new file mode 100644
index 0000000..d50b067
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/CDC/ACM/usbh_acm.h
@@ -0,0 +1,272 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                     The Embedded USB Host Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  COMMUNICATIONS DEVICE CLASS (CDC)
+*                                    ABSTRACT CONTROL MODEL (ACM)
+*
+* File           : usbh_acm.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_CDC_ACM_MODULE_PRESENT
+#define  USBH_CDC_ACM_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../usbh_cdc.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_CDC_ACM_MODULE
+#define  USBH_CDC_ACM_EXT
+#else
+#define  USBH_CDC_ACM_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBH_CDC_ACM_DTR_SET                           0x01u   /* RS-232 signal Data Terminal Ready                    */
+#define  USBH_CDC_ACM_RTS_SET                           0x01u   /* RS-232 signal Request To Send                        */
+#define  USBH_CDC_ACM_DTR_CLR                           0x00u   /* RS-232 signal Data Terminal Ready                    */
+#define  USBH_CDC_ACM_RTS_CLR                           0x00u   /* RS-232 signal Request To Send                        */
+
+#define  USBH_CDC_ACM_SER_DCD                           0x01u   /* RS-232 signal Data Carrier Detection                 */
+#define  USBH_CDC_ACM_SER_DSR                           0x02u   /* RS-232 signal Data Set Ready                         */
+#define  USBH_CDC_ACM_SER_BRK                           0x04u   /* RS-232 signal Break                                  */
+#define  USBH_CDC_ACM_SER_RING_INDC                     0x08u   /* RS-232 signal Ring Indicator                         */
+#define  USBH_CDC_ACM_SER_FRAME_ERR                     0x10u   /* RS-232 signal Frame Error                            */
+#define  USBH_CDC_ACM_SER_PARITY_ERR                    0x20u   /* RS-232 signal Parity Error                           */
+#define  USBH_CDC_ACM_SER_OVER_RUN                      0x40u   /* RS-232 signal Buffer Over Run Error                  */
+
+
+/*
+*********************************************************************************************************
+*                                     SET/GET LINE CODING VALUES
+*
+* Note(s) : (1) See "Universal Serial Bus Communications Class Subclass Specification for PSTN Devices",
+*               version 1.2, February 9, 2007. Section 6.3.11 Table 17
+*********************************************************************************************************
+*/
+
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_110           110u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_300           300u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_1200         1200u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_2400         2400u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_4800         4800u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_9600         9600u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_19200       19200u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_38400       38400u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_56700       56700u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_115200     115200u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_230400     230400u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_460800     460800u
+#define  USBH_CDC_ACM_LINE_CODING_BAUDRATE_921600     921600u
+
+#define  USBH_CDC_ACM_LINE_CODING_STOP_BIT_1               0u
+#define  USBH_CDC_ACM_LINE_CODING_STOP_BIT_1_5             1u
+#define  USBH_CDC_ACM_LINE_CODING_STOP_BIT_2               2u
+
+#define  USBH_CDC_ACM_LINE_CODING_PARITY_NONE              0u
+#define  USBH_CDC_ACM_LINE_CODING_PARITY_ODD               1u
+#define  USBH_CDC_ACM_LINE_CODING_PARITY_EVEN              2u
+#define  USBH_CDC_ACM_LINE_CODING_PARITY_MARK              3u
+#define  USBH_CDC_ACM_LINE_CODING_PARITY_SPACE             4u
+
+#define  USBH_CDC_ACM_LINE_CODING_DATA_BITS_5              5u
+#define  USBH_CDC_ACM_LINE_CODING_DATA_BITS_6              6u
+#define  USBH_CDC_ACM_LINE_CODING_DATA_BITS_7              7u
+#define  USBH_CDC_ACM_LINE_CODING_DATA_BITS_8              8u
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_cdc_serial_state {
+    CPU_BOOLEAN  RxCarrier;
+    CPU_BOOLEAN  TxCarrier;
+    CPU_BOOLEAN  Break;
+    CPU_BOOLEAN  RingSignal;
+    CPU_BOOLEAN  Framing;
+    CPU_BOOLEAN  Parity;
+    CPU_BOOLEAN  OverRun;
+} USBH_CDC_SERIAL_STATE;
+
+typedef  struct usbh_cdc_acm_notifications {
+    CPU_BOOLEAN  NetworkConnection;
+    CPU_BOOLEAN  SerialState;
+} USBH_CDC_ACM_NOTIFICATIONS;
+
+typedef  struct usbh_cdc_acm_requests {
+    CPU_BOOLEAN  SetCommFeature;
+    CPU_BOOLEAN  GetCommFeature;
+    CPU_BOOLEAN  ClrCommFeature;
+    CPU_BOOLEAN  SetLineCoding;
+    CPU_BOOLEAN  GetLineCoding;
+    CPU_BOOLEAN  SetControlLineState;
+    CPU_BOOLEAN  SendBreak;
+} USBH_CDC_ACM_REQUESTS;
+
+typedef  void  (*USBH_CDC_SERIAL_STATE_NOTIFY) (USBH_CDC_SERIAL_STATE   serial_sate);
+
+typedef  void  (*USBH_CDC_DATA_NOTIFY)         (void                   *p_data,
+                                                CPU_INT08U             *p_buf,
+                                                CPU_INT32U              xfer_len,
+                                                USBH_ERR                err);
+
+typedef  struct  usbh_cdc_acm_dev {
+    USBH_CDC_DEV                  *CDC_DevPtr;
+    USBH_CDC_ACM_NOTIFICATIONS     SupportedEvents;
+    USBH_CDC_ACM_REQUESTS          SupportedRequests;
+    CPU_INT08U                     LineCodingBuf[10];
+    USBH_CDC_SERIAL_STATE_NOTIFY   EvtSerialStateNotifyPtr;
+    USBH_CDC_DATA_NOTIFY           DataTxNotifyPtr;
+    void                          *DataTxArgPtr;
+    USBH_CDC_DATA_NOTIFY           DataRxNotifyPtr;
+    void                          *DataRxArgPtr;
+} USBH_CDC_ACM_DEV;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+USBH_CDC_ACM_EXT  USBH_CLASS_DRV  USBH_CDC_ACM_ClassDrv;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+USBH_ERR           USBH_CDC_ACM_GlobalInit      (void);
+
+void               USBH_CDC_ACM_EventRxNotifyReg(USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 USBH_CDC_SERIAL_STATE_NOTIFY   p_serial_state_notify);
+
+
+USBH_CDC_ACM_DEV  *USBH_CDC_ACM_Add             (USBH_CDC_DEV                  *p_cdc_dev,
+                                                 USBH_ERR                      *p_err);
+
+USBH_ERR           USBH_CDC_ACM_Remove          (USBH_CDC_ACM_DEV              *p_cdc_acm_dev);
+
+USBH_ERR           USBH_CDC_ACM_LineCodingSet   (USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 CPU_INT32U                     baud_rate,
+                                                 CPU_INT08U                     stop_bits,
+                                                 CPU_INT08U                     parity_val,
+                                                 CPU_INT08U                     data_bits);
+
+USBH_ERR           USBH_CDC_ACM_LineCodingGet   (USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 CPU_INT32U                    *p_baud_rate,
+                                                 CPU_INT08U                    *p_stop_bits,
+                                                 CPU_INT08U                    *p_parity_val,
+                                                 CPU_INT08U                    *p_data_bits);
+
+USBH_ERR           USBH_CDC_ACM_LineStateSet    (USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 CPU_INT08U                     dtr_bit,
+                                                 CPU_INT08U                     rts_bit);
+
+USBH_ERR           USBH_CDC_ACM_BreakSend       (USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 CPU_INT16U                     break_time);
+
+USBH_ERR           USBH_CDC_ACM_CmdSend         (USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 CPU_INT08U                    *p_buf,
+                                                 CPU_INT32U                     buf_len);
+
+USBH_ERR           USBH_CDC_ACM_RespRx          (USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 CPU_INT08U                    *p_buf,
+                                                 CPU_INT32U                     buf_len);
+
+CPU_INT32U         USBH_CDC_ACM_DataTx          (USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 void                          *p_buf,
+                                                 CPU_INT32U                     buf_len,
+                                                 USBH_ERR                      *p_err);
+
+CPU_INT32U         USBH_CDC_ACM_DataRx          (USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 void                          *p_buf,
+                                                 CPU_INT32U                     buf_len,
+                                                 USBH_ERR                      *p_err);
+
+USBH_ERR           USBH_CDC_ACM_DataTxAsync     (USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 void                          *p_buf,
+                                                 CPU_INT32U                     buf_len,
+                                                 USBH_CDC_DATA_NOTIFY           tx_cmpl_notify,
+                                                 void                          *p_tx_cmpl_arg);
+
+USBH_ERR           USBH_CDC_ACM_DataRxAsync     (USBH_CDC_ACM_DEV              *p_cdc_acm_dev,
+                                                 void                          *p_buf,
+                                                 CPU_INT32U                     buf_len,
+                                                 USBH_CDC_DATA_NOTIFY           rx_cmpl_notify,
+                                                 void                          *p_rx_cmpl_arg);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                 END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/CDC/usbh_cdc.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/CDC/usbh_cdc.h
new file mode 100644
index 0000000..0ba3722
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/CDC/usbh_cdc.h
@@ -0,0 +1,425 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                       The Embedded USB Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  COMMUNICATIONS DEVICE CLASS (CDC)
+*
+* File           : usbh_cdc.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_CDC_MODULE_PRESENT
+#define  USBH_CDC_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbh_os.h"
+#include  "../../Source/usbh_class.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_CDC_MODULE
+#define  USBH_CDC_EXT
+#else
+#define  USBH_CDC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBH_CDC_LEN_EVENT_BUF                           10u
+
+#define  USBH_CDC_NOTIFICATION_NET_CONN                 0x00u
+#define  USBH_CDC_NOTIFICATION_RESP_AVAIL               0x01u
+#define  USBH_CDC_NOTIFICATION_AUX_JACK_HOOK_STATE      0x08u
+#define  USBH_CDC_NOTIFICATION_RING_DETECT              0x09u
+#define  USBH_CDC_NOTIFICATION_SERIAL_STATE             0x20u
+#define  USBH_CDC_NOTIFICATION_CALL_STATE_CHNG          0x28u
+#define  USBH_CDC_NOTIFICATION_LINE_STATE_CHNG          0x23u
+
+#define  USBH_CDC_LEN_FNCTLHEADER_DESC                  0x05u   /* Len of functional hdr desc.                          */
+#define  USBH_CDC_LEN_CALL_MANAGEMENT_FNCTL_DESC        0x05u   /* Len of call mgmt functional desc.                    */
+#define  USBH_CDC_LEN_ACM_FNCTL_DESC                    0x04u   /* Len of ACM functional desc.                          */
+#define  USBH_CDC_LEN_UNION_FNCTL_DESC                  0x05u   /* Len of union functional desc.                        */
+#define  USBH_CDC_LEN_LINECODING                        0x07u   /* Len of line coding params.                           */
+#define  USBH_CDC_LEN_SERSTATE                          0x0Au   /* Len of dev ser state.                                */
+#define  USBH_CDC_LEN_RESPONSE_AVAIL                    0x08u   /* Len of dev response avail.                           */
+
+
+/*
+*********************************************************************************************************
+*                          SUBCLASS CODES FOR COMMUNICATION INTERFACE CLASS
+*
+* Note(s) : (1) See "USB Class Definitiopns for Communication Devices Specification", version 1.1,
+*               Section 4.3, Table 16.
+*********************************************************************************************************
+*/
+
+#define  USBH_CDC_CONTROL_SUBCLASS_CODE_DLCM            0x01u
+#define  USBH_CDC_CONTROL_SUBCLASS_CODE_ACM             0x02u
+#define  USBH_CDC_CONTROL_SUBCLASS_CODE_TCM             0x03u
+#define  USBH_CDC_CONTROL_SUBCLASS_CODE_MCCM            0x04u
+#define  USBH_CDC_CONTROL_SUBCLASS_CODE_CAPICM          0x05u
+#define  USBH_CDC_CONTROL_SUBCLASS_CODE_ENCM            0x06u
+#define  USBH_CDC_CONTROL_SUBCLASS_CODE_ATMNCM          0x07u
+
+
+/*
+*********************************************************************************************************
+*                          PROTOCOL CODES FOR COMMUNICATION INTERFACE CLASS
+*
+* Note(s) : (1) See "USB Class Definitiopns for Communication Devices Specification", version 1.1,
+*               Section 4.4, Table 17.
+*********************************************************************************************************
+*/
+
+#define  USBH_CDC_CONTROL_PROTOCOL_CODE_USB             0x00u
+#define  USBH_CDC_CONTROL_PROTOCOL_CODE_V_25_AT         0x01u
+#define  USBH_CDC_CONTROL_PROTOCOL_CODE_VENDOR          0xFFu
+
+
+/*
+*********************************************************************************************************
+*                               SUBCLASS CODES FOR DATA INTERFACE CLASS
+*
+* Note(s) : (1) See "USB Class Definitiopns for Communication Devices Specification", version 1.1,
+*               Section 4.6.
+*********************************************************************************************************
+*/
+
+#define  USBH_CDC_DATA_SUBCLASS_CODE_NONE               0x00u
+
+
+/*
+*********************************************************************************************************
+*                               PROTOCOL CODES FOR DATA INTERFACE CLASS
+*
+* Note(s) : (1) See "USB Class Definitiopns for Communication Devices Specification", version 1.1,
+*               Section 4.7, Table 19.
+*********************************************************************************************************
+*/
+
+#define  USBH_CDC_DATA_PROTOCOL_CODE_USB                0x00u
+#define  USBH_CDC_DATA_PROTOCOL_CODE_ISDN_BRI           0x30u
+#define  USBH_CDC_DATA_PROTOCOL_CODE_ISO_IEC            0x31u
+#define  USBH_CDC_DATA_PROTOCOL_CODE_Q_921M             0x50u
+#define  USBH_CDC_DATA_PROTOCOL_CODE_Q_921_NUM          0x51u
+#define  USBH_CDC_DATA_PROTOCOL_CODE_Q921TM             0x52u
+#define  USBH_CDC_DATA_PROTOCOL_CODE_V_42bits           0x90u
+#define  USBH_CDC_DATA_PROTOCOL_CODE_E_ISDN             0x91u
+#define  USBH_CDC_DATA_PROTOCOL_CODE_V_24_ISDN          0x92u
+#define  USBH_CDC_DATA_PROTOCOL_CODE_CAPI               0x93u
+#define  USBH_CDC_DATA_PROTOCOL_CODE_CDC                0xFEu
+#define  USBH_CDC_DATA_PROTOCOL_CODE_TM_USB             0xFFu
+
+
+/*
+*********************************************************************************************************
+*                                       FUNCTIONAL DESCRIPTORS
+*
+* Note(s) : (1) See "USB Class Definitiopns for Communication Devices Specification", version 1.1,
+*               Section 5.2.3.
+*           (2) The functinal descriptors descriptor type is given in "Table 24".
+*           (3) The functinal descriptors descriptor subtype is given in "Table 25".
+*********************************************************************************************************
+*/
+
+#define  USBH_CDC_FNCTL_DESC_INTERFACE                  0x24u
+#define  USBH_CDC_FNCTL_DESC_ENDPOINT                   0x25u
+
+#define  USBH_CDC_FNCTL_DESC_SUB_HFD                    0x00u
+#define  USBH_CDC_FNCTL_DESC_SUB_CMFD                   0x01u
+#define  USBH_CDC_FNCTL_DESC_SUB_ACMFD                  0x02u
+#define  USBH_CDC_FNCTL_DESC_SUB_DLMFD                  0x03u
+#define  USBH_CDC_FNCTL_DESC_SUB_TRFD                   0x04u
+#define  USBH_CDC_FNCTL_DESC_SUB_TC_LSRCFD              0x05u
+#define  USBH_CDC_FNCTL_DESC_SUB_UFD                    0x06u
+#define  USBH_CDC_FNCTL_DESC_SUB_CSFD                   0x07u
+#define  USBH_CDC_FNCTL_DESC_SUB_TOMFD                  0x08u
+#define  USBH_CDC_FNCTL_DESC_SUB_USB_TFD                0x09u
+#define  USBH_CDC_FNCTL_DESC_SUB_NCTD                   0x0Au
+#define  USBH_CDC_FNCTL_DESC_SUB_PUFD                   0x0Bu
+#define  USBH_CDC_FNCTL_DESC_SUB_EUFD                   0x0Cu
+#define  USBH_CDC_FNCTL_DESC_SUB_MCMFD                  0x0Du
+#define  USBH_CDC_FNCTL_DESC_SUB_CAPI_CMFD              0x0Eu
+#define  USBH_CDC_FNCTL_DESC_SUB_ENFD                   0x0Fu
+#define  USBH_CDC_FNCTL_DESC_SUB_ATM_NFD                0x10u
+
+
+/*
+*********************************************************************************************************
+*                                       CLASS-SPECIFIC REQUESTS
+*
+* Note(s) : (1) See "USB Class Definitiopns for Communication Devices Specification", version 1.1 Section 6.2,
+*               Table 46.
+*
+*           (2) The 'bRequest' field of a class-specific setup request may contain one of these values.
+*
+*           (3) The set line coding request is "used to configure the serial driver with new line coding
+*               values".  The setup request packet will consist of :
+*
+*               (a) bmRequestType = 00100001b (class, interface, host-to-device)
+*               (b) bRequest      =     0x20
+*               (c) wValue        =   0x0000
+*               (d) wIndex        = Interface number
+*               (e) wLength       =     0x07
+*
+*           (4) The get line coding request is "used to know the serial driver line coding values".
+*               The setup request packet will consist of :
+*
+*               (a) bmRequestType = 10100001b (class, interface, device-to-host)
+*               (b) bRequest      =     0x21
+*               (c) wValue        =   0x0000
+*               (d) wIndex        = Interface number
+*               (e) wLength       =     0x07
+*
+*           (5) The set control line state request is "used to know the presence of RTS and DTR".
+*               The setup request packet will consist of :
+*
+*               (a) bmRequestType = 00100001b (class, interface, host-to-device)
+*               (b) bRequest      =     0x23
+*               (c) wValue        =   0x0000
+*               (d) wIndex        = Interface number
+*               (e) wLength       =     0x00
+*
+*               (f) The 'wValue' field is a bit mapped datum with three sub fields:
+*                   (1) Bit 15-2: Reserved. Should be set to zero.
+*                   (2) Bit 1   : Carrier control and corresponds to RS-232 signal RTS.
+*                        (a) 0 =  Deactivate carrier.
+*                        (b) 1 =  Activate carrier.
+*
+*                   (3) Bit 0   : Indicates to DCE if DTE is present or not and corresponds to RS-232
+*                                 signal DTR.
+*                        (a) 0 =  Not present.
+*                        (b) 1 =  Present.
+*
+*           (6) The send break request is "used to generate the break".
+*               The setup request packet will consist of :
+*
+*               (a) bmRequestType = 00100001b (class, interface, host-to-device)
+*               (b) bRequest      =     0x24
+*               (c) wValue        =   0x0000
+*               (d) wIndex        = Interface number
+*               (e) wLength       =     0x00
+*
+*               (f) The 'wValue' field indicates the duration of break in milli seconds.
+*********************************************************************************************************
+*/
+
+#define  USBH_CDC_SEND_ENCAPSULATED_COMMAND             0x00u   /* Std brequest val for SEND_ENCAPSULATED_COMMAND.      */
+#define  USBH_CDC_GET_ENCAPSULATED_RESPONSE             0x01u   /* Std brequest val for GET_ENCAPSULATED_RESPONSE.      */
+#define  USBH_CDC_SET_LINECODING                        0x20u   /* Std brequest val for SET_LINE_CODING.                */
+#define  USBH_CDC_GET_LINECODING                        0x21u   /* Std brequest val for GET_LINE_CODING.                */
+#define  USBH_CDC_SET_CONTROL_LINESTATE                 0x22u   /* Std brequest val for SET_CONTROL_LINE_STATE.         */
+#define  USBH_CDC_SEND_BREAK                            0x23u   /* Std brequest val for SEND_BREAK.                     */
+
+
+/*
+*********************************************************************************************************
+*                                         NOTIFICATION EVENT
+*
+* Note(s) : (1) See "USB Class Definitions for Communication Devices Specification", version 1.1 Section 6.3.
+*
+*           (2) The 'bRequest' field of a notification event setup request may contain this value.
+*
+*           (3) The serial state notification is "used to send the current device state to host".
+*               The notification has header structure of setup request packet format and serial state :
+*
+*               (a) bmRequestType = 10100001b (class, interface, device-to-host)
+*               (b) bRequest      =     0x20
+*               (c) wValue        =   0x0000
+*               (d) wIndex        = Interface number
+*               (e) wLength       =     0x0a
+*
+*           (4) The 'serialstate0' field is a bit mapped datum with eight subfields:
+*               (a) Bit 15-7: Reserved.    Should be set to zero.
+*               (b) Bit 6   : bOverRun.    Received data has been discarded due to overrun in the device.
+*               (c) Bit 5   : bParity.     A parity error has occurred.
+*               (d) Bit 4   : bFraming.    A framing error has occurred.
+*               (e) Bit 3   : bRingSignal. State of ring signal detection of the device.
+*               (f) Bit 2   : bBreak.      State of break detection mechanism of the device.
+*               (g) Bit 1   : bTxCarrier.  State of transmission carrier and corresponds to RS-232
+*                                          signal DSR.
+*               (h) Bit 0   : bRxCarrier.  State of transmission carrier and corresponds to RS-232
+*                                          signal DCD.
+*********************************************************************************************************
+*/
+
+#define  USBH_CDC_SER_STATE                             0x20u   /* Std brequest val for SERIAL_STATE.                   */
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  void  (*SUBCLASS_NOTIFY) (void        *p_data,
+                                   CPU_INT08U  *p_buf,
+                                   CPU_INT32U   xfer_len,
+                                   USBH_ERR     err);
+
+typedef  struct  usbh_cdc_dev {
+    USBH_DEV         *DevPtr;
+    CPU_INT08U        State;
+    CPU_INT08U        RefCnt;
+    USBH_HMUTEX       HMutex;
+    CPU_INT08U        EventNotifyBuf[USBH_CDC_LEN_EVENT_BUF];   /* Buf used to recv ser state of dev.                   */
+
+    USBH_EP           CIC_IntrIn;
+    USBH_EP           DIC_BulkIn;
+    USBH_EP           DIC_BulkOut;
+
+    USBH_IF          *CIC_IF_Ptr;
+    CPU_INT08U        CIC_IF_Nbr;
+    USBH_IF          *DIC_IF_Ptr;
+    CPU_INT08U        DIC_IF_Nbr;
+
+    SUBCLASS_NOTIFY   EvtNotifyPtr;
+    void             *EvtNotifyArgPtr;
+    SUBCLASS_NOTIFY   DataTxNotifyPtr;
+    void             *DataTxNotifyArgPtr;
+    SUBCLASS_NOTIFY   DataRxNotifyPtr;
+    void             *DataRxNotifyArgPtr;
+} USBH_CDC_DEV;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+USBH_CDC_EXT  USBH_CLASS_DRV  USBH_CDC_ClassDrv;
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+USBH_ERR     USBH_CDC_RefAdd        (USBH_CDC_DEV     *p_cdc_dev);
+
+USBH_ERR     USBH_CDC_RefRel        (USBH_CDC_DEV     *p_cdc_dev);
+
+USBH_ERR     USBH_CDC_EvtNotifyReg  (USBH_CDC_DEV     *p_cdc_dev,
+                                     SUBCLASS_NOTIFY   p_evt_notify,
+                                     void             *p_data);
+
+USBH_ERR     USBH_CDC_DevReg        (USBH_CDC_DEV     *p_cdc_dev,
+                                     void             *p_data);
+
+USBH_ERR     USBH_CDC_EventNotifyReg(USBH_CDC_DEV     *p_cdc_dev,
+                                     SUBCLASS_NOTIFY   p_evt_notify,
+                                     void             *p_arg);
+
+USBH_ERR     USBH_CDC_SubclassGet   (USBH_CDC_DEV     *p_cdc_dev,
+                                     CPU_INT08U       *p_subclass);
+
+USBH_ERR     USBH_CDC_ProtocolGet   (USBH_CDC_DEV     *p_cdc_dev,
+                                     CPU_INT08U       *p_protocol);
+
+USBH_ERR     USBH_CDC_CmdTx         (USBH_CDC_DEV     *p_cdc_dev,
+                                     CPU_INT08U        b_req,
+                                     CPU_INT08U        bm_req_type,
+                                     CPU_INT16U        w_val,
+                                     void             *p_buf,
+                                     CPU_INT32U        buf_len);
+
+USBH_ERR     USBH_CDC_RespRx        (USBH_CDC_DEV     *p_cdc_dev,
+                                     CPU_INT08U        b_req,
+                                     CPU_INT08U        bm_req_type,
+                                     CPU_INT16U        w_val,
+                                     void             *p_buf,
+                                     CPU_INT32U        buf_len);
+
+CPU_INT32U   USBH_CDC_DataTx        (USBH_CDC_DEV     *p_cdc_dev,
+                                     CPU_INT08U       *p_buf,
+                                     CPU_INT32U        buf_len,
+                                     USBH_ERR          *p_err);
+
+USBH_ERR     USBH_CDC_DataTxAsync   (USBH_CDC_DEV     *p_cdc_dev,
+                                     CPU_INT08U       *p_buf,
+                                     CPU_INT32U        buf_len,
+                                     SUBCLASS_NOTIFY   tx_cmpl_notify,
+                                     void             *p_arg);
+
+CPU_INT32U   USBH_CDC_DataRx        (USBH_CDC_DEV     *p_cdc_dev,
+                                     CPU_INT08U       *p_buf,
+                                     CPU_INT32U        buf_len,
+                                     USBH_ERR          *p_err);
+
+USBH_ERR     USBH_CDC_DataRxAsync   (USBH_CDC_DEV     *p_cdc_dev,
+                                     CPU_INT08U       *p_buf,
+                                     CPU_INT32U        buf_len,
+                                     SUBCLASS_NOTIFY   rx_cmpl_notify,
+                                     void             *p_arg);
+
+USBH_IF     *USBH_CDC_CommIF_Get    (USBH_CDC_DEV     *p_cdc_dev);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/FTDI/usbh_ftdi.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/FTDI/usbh_ftdi.h
new file mode 100644
index 0000000..eeba535
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/FTDI/usbh_ftdi.h
@@ -0,0 +1,445 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                     The Embedded USB Host Stack
+*
+*                          (c) Copyright 2004-2013; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            FUTURE TECHNOLOGY DEVICES INTERNATIONAL CLASS
+*
+* File           : usbh_ftdi.h
+* Version        : V3.41.03
+* Programmer(s)  : TP
+* Note(s)        : (1) The reference document "API for FTxxxx Devices Application Note AN_115" can be
+*                      requested from FTDI after signing a Non-Disclosure Agreement (NDA).
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_FTDI_MODULE_PRESENT
+#define  USBH_FTDI_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbh_class.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_FTDI_MODULE
+#define  USBH_FTDI_EXT
+#else
+#define  USBH_FTDI_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBH_FTDI_SERIAL_STATUS_LEN                   2u
+
+
+/*
+*********************************************************************************************************
+*                                          FTDI_RESET CONTROL
+*
+* Note(s) : (1) See "API for FTxxxx Devices Application Note AN_115", April 04 2011, Version 1.1,
+*               section 3.1.
+*
+*           (2) The control value is defined as follow:
+*
+*               USBH_FTDI_RESET_CTRL_SIO                Reset SIO (Resets both RX and TX buffer)
+*               USBH_FTDI_RESET_CTRL_RX                 Purge RX buffer
+*               USBH_FTDI_RESET_CTRL_TX                 Purge TX buffer
+*
+*********************************************************************************************************
+*/
+
+#define  USBH_FTDI_RESET_CTRL_SIO                       DEF_BIT_NONE
+#define  USBH_FTDI_RESET_CTRL_RX                        DEF_BIT_00
+#define  USBH_FTDI_RESET_CTRL_TX                        DEF_BIT_01
+
+
+/*
+*********************************************************************************************************
+*                                          FTDI_MODEM CONTROL
+*
+* Note(s) : (1) See "API for FTxxxx Devices Application Note AN_115", April 04 2011, Version 1.1,
+*               section 3.2.
+*
+*           (2) The control value is defined as follow:
+*
+*               USBH_FTDI_MODEM_CTRL_DTR_SET            Set     DTR state
+*               USBH_FTDI_MODEM_CTRL_DTR_RESET          Reset   DTR state
+*               USBH_FTDI_MODEM_CTRL_DTR_ENABLED        Use     DTR state
+*               USBH_FTDI_MODEM_CTRL_DTR_DISABLED       Disable DTR state
+*               USBH_FTDI_MODEM_CTRL_RTS_SET            Set     RTS state
+*               USBH_FTDI_MODEM_CTRL_RTS_RESET          Reset   RTS state
+*               USBH_FTDI_MODEM_CTRL_RTS_ENABLED        Use     RTS state
+*               USBH_FTDI_MODEM_CTRL_RTS_DISABLED       Disable RTS state
+*
+*********************************************************************************************************
+*/
+
+#define  USBH_FTDI_MODEM_CTRL_DTR_SET                   DEF_BIT_00
+#define  USBH_FTDI_MODEM_CTRL_DTR_RESET                 DEF_BIT_NONE
+#define  USBH_FTDI_MODEM_CTRL_DTR_ENABLED               DEF_BIT_08
+#define  USBH_FTDI_MODEM_CTRL_DTR_DISABLED              DEF_BIT_NONE
+#define  USBH_FTDI_MODEM_CTRL_RTS_SET                   DEF_BIT_01
+#define  USBH_FTDI_MODEM_CTRL_RTS_RESET                 DEF_BIT_NONE
+#define  USBH_FTDI_MODEM_CTRL_RTS_ENABLED               DEF_BIT_09
+#define  USBH_FTDI_MODEM_CTRL_RTS_DISABLED              DEF_BIT_NONE
+
+
+/*
+*********************************************************************************************************
+*                                        FTDI_SET_FLOW PROTOCOL
+*
+* Note(s) : (1) See "API for FTxxxx Devices Application Note AN_115", April 04 2011, Version 1.1,
+*               section 3.3.
+*
+*           (2) The control value is defined as follow:
+*
+*               USBH_FTDI_PROTOCOL_RTS_CTS              Enable output handshaking using RTS/CTS
+*               USBH_FTDI_PROTOCOL_DTR_DSR              Enable output handshaking using DTR/DSR
+*               USBH_FTDI_PROTOCOL_XON_XOFF             Enable Xon/Xoff handshaking
+*
+*********************************************************************************************************
+*/
+
+#define  USBH_FTDI_PROTOCOL_RTS_CTS                     DEF_BIT_00
+#define  USBH_FTDI_PROTOCOL_DTR_DSR                     DEF_BIT_01
+#define  USBH_FTDI_PROTOCOL_XON_XOFF                    DEF_BIT_02
+
+
+/*
+*********************************************************************************************************
+*                                         FTDI_SET_BAUD_RATE
+*
+* Note(s) : (1) See "API for FTxxxx Devices Application Note AN_115", April 04 2011, Version 1.1,
+*               section 3.4.
+*
+*********************************************************************************************************
+*/
+
+#define  USBH_FTDI_BAUD_RATE_300                        0x2710u
+#define  USBH_FTDI_BAUD_RATE_600                        0x1388u
+#define  USBH_FTDI_BAUD_RATE_1200                       0x09C4u
+#define  USBH_FTDI_BAUD_RATE_2400                       0x04E2u
+#define  USBH_FTDI_BAUD_RATE_4800                       0x0271u
+#define  USBH_FTDI_BAUD_RATE_9600                       0x4138u
+#define  USBH_FTDI_BAUD_RATE_19200                      0x809Cu
+#define  USBH_FTDI_BAUD_RATE_38400                      0xC04Eu
+#define  USBH_FTDI_BAUD_RATE_57600                      0x0034u
+#define  USBH_FTDI_BAUD_RATE_115200                     0x001Au
+#define  USBH_FTDI_BAUD_RATE_230400                     0x000Du
+#define  USBH_FTDI_BAUD_RATE_460800                     0x4006u
+#define  USBH_FTDI_BAUD_RATE_921600                     0x8003u
+
+
+/*
+*********************************************************************************************************
+*                                    FTDI_SET_DATA CHARACTERISTICS
+*
+* Note(s) : (1) See "API for FTxxxx Devices Application Note AN_115", April 04 2011, Version 1.1,
+*               section 3.5.
+*
+*           (2) The control value is defined as follow:
+*
+*               USBH_FTDI_DATA_PARITY_NONE              Do not use the parity bit
+*               USBH_FTDI_DATA_PARITY_ODD               Use odd        parity bit
+*               USBH_FTDI_DATA_PARITY_EVEN              Use even       parity bit
+*               USBH_FTDI_DATA_PARITY_MARK              Use mark       parity bit
+*               USBH_FTDI_DATA_PARITY_SPACE             Use space      parity bit
+*
+*               USBH_FTDI_DATA_STOP_BITS_1              Use 1 stop bit
+*               USBH_FTDI_DATA_STOP_BITS_2              Use 2 stop bit
+*
+*               USBH_FTDI_DATA_BREAK_ENABLED            Send break
+*               USBH_FTDI_DATA_BREAK_DISABLED           Stop break
+*
+*********************************************************************************************************
+*/
+
+#define  USBH_FTDI_DATA_PARITY_NONE                     0x00u
+#define  USBH_FTDI_DATA_PARITY_ODD                      0x01u
+#define  USBH_FTDI_DATA_PARITY_EVEN                     0x02u
+#define  USBH_FTDI_DATA_PARITY_MARK                     0x03u
+#define  USBH_FTDI_DATA_PARITY_SPACE                    0x04u
+
+#define  USBH_FTDI_DATA_STOP_BITS_1                     0x00u
+#define  USBH_FTDI_DATA_STOP_BITS_2                     0x08u
+
+#define  USBH_FTDI_DATA_BREAK_ENABLED                   0x40u
+#define  USBH_FTDI_DATA_BREAK_DISABLED                  0x00u
+
+
+/*
+*********************************************************************************************************
+*                                          FTDI SERIAL STATUS
+*
+* Note(s) : (1) See "API for FTxxxx Devices Application Note AN_115", April 04 2011, Version 1.1,
+*               section 4.
+*
+*           (2) These defines may be used as a mask to determine whether a field of the modem status or
+*               the line status is enabled or not.
+*
+*********************************************************************************************************
+*/
+
+#define  USBH_FTDI_MODEM_STATUS_FS                      DEF_BIT_00
+#define  USBH_FTDI_MODEM_STATUS_HS                      DEF_BIT_01
+#define  USBH_FTDI_MODEM_STATUS_CLEAR_TO_SEND           DEF_BIT_04
+#define  USBH_FTDI_MODEM_STATUS_DATA_SET_READY          DEF_BIT_05
+#define  USBH_FTDI_MODEM_STATUS_RING_INDICATOR          DEF_BIT_06
+#define  USBH_FTDI_MODEM_STATUS_DATA_CARRIER_DETECT     DEF_BIT_07
+
+#define  USBH_FTDI_LINE_STATUS_RX_OVERFLOW_ERROR        DEF_BIT_01
+#define  USBH_FTDI_LINE_STATUS_PARITY_ERROR             DEF_BIT_02
+#define  USBH_FTDI_LINE_STATUS_FRAMING_ERROR            DEF_BIT_03
+#define  USBH_FTDI_LINE_STATUS_BREAK_INTERRUPT          DEF_BIT_04
+#define  USBH_FTDI_LINE_STATUS_TX_REGISTER_EMPTY        DEF_BIT_05
+#define  USBH_FTDI_LINE_STATUS_TX_EMPTY                 DEF_BIT_06
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  USBH_FTDI_HANDLE;
+
+
+/*
+*********************************************************************************************************
+*                                       USBH_FTDI_SERIAL_STATUS
+*
+* Note(s) : (1) The serial status is defined as follow:
+*
+*      OFFSET                 MODEM STATUS                                        MASK
+*      --------------------------------------------------------------------------------------------------
+*      Bit 0       Full-speed 64 bytes max packet              USBH_FTDI_MODEM_STATUS_FS
+*      Bit 1       High-speed 512 bytes max packet             USBH_FTDI_MODEM_STATUS_HS
+*      Bit 4       Clear to Send (CTS)                         USBH_FTDI_MODEM_STATUS_CLEAR_TO_SEND
+*      Bit 5       Data Set Ready (DSR)                        USBH_FTDI_MODEM_STATUS_DATA_SET_READY
+*      Bit 6       Ring Indicator (RI)                         USBH_FTDI_MODEM_STATUS_RING_INDICATOR
+*      Bit 7       Receive Line Signal Detect (RLSD)           USBH_FTDI_MODEM_STATUS_DATA_CARRIER_DETECT
+*      --------------------------------------------------------------------------------------------------
+*
+*      OFFSET                  LINE STATUS                                        MASK
+*      --------------------------------------------------------------------------------------------------
+*      Bit 1       Overrun Error (OE)                          USBH_FTDI_LINE_STATUS_RX_OVERFLOW_ERROR
+*      Bit 2       Parity Error (PE)                           USBH_FTDI_LINE_STATUS_PARITY_ERROR
+*      Bit 3       Framing Error (FE)                          USBH_FTDI_LINE_STATUS_FRAMING_ERROR
+*      Bit 4       Break Interrupt (BI)                        USBH_FTDI_LINE_STATUS_BREAK_INTERRUPT
+*      Bit 5       Transmitter Holding Register (THRE)         USBH_FTDI_LINE_STATUS_TX_REGISTER_EMPTY
+*      Bit 6       Transmitter Empty (TEMT)                    USBH_FTDI_LINE_STATUS_TX_EMPTY
+*      --------------------------------------------------------------------------------------------------
+*
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_ftdi_serial_status {
+    CPU_INT08U  ModemStatus;
+    CPU_INT08U  LineStatus;
+} USBH_FTDI_SERIAL_STATUS;
+
+
+/*
+*********************************************************************************************************
+*                                         USBH_FTDI_RXCB_FNCT
+*
+* Note(s) : (1) Application RX function callback.
+*
+*           (2) The arguments are defined as follow:
+*
+*               ftdi_handle         Handle on FTDI device.
+*               p_arg               Pointer to argument.
+*               p_buf               Pointer to received data buffer.
+*               xfer_len            Number of octets received.
+*               p_serial_status     Pointer to USBH_FTDI_SERIAL_STATUS structure that will be filled.
+*               err                 Variable that will receive the return error code.
+*
+*********************************************************************************************************
+*/
+
+typedef  void  (*USBH_FTDI_ASYNC_RX_FNCT) (USBH_FTDI_HANDLE          ftdi_handle,
+                                           void                     *p_arg,
+                                           void                     *p_buf,
+                                           CPU_INT32U                xfer_len,
+                                           USBH_FTDI_SERIAL_STATUS  *p_serial_status,
+                                           USBH_ERR                  err);
+
+
+/*
+*********************************************************************************************************
+*                                         USBH_FTDI_TXCB_FNCT
+*
+* Note(s) : (1) Application TX function callback.
+*
+*           (2) The arguments are defined as follow:
+*
+*               ftdi_handle         Handle on FTDI device.
+*               p_arg               Pointer to argument.
+*               p_buf               Pointer to transmitted data buffer.
+*               xfer_len            Number of octets transmitted.
+*               err                 Variable that will receive the return error code.
+*
+*********************************************************************************************************
+*/
+
+typedef  void  (*USBH_FTDI_ASYNC_TX_FNCT) (USBH_FTDI_HANDLE   ftdi_handle,
+                                           void              *p_arg,
+                                           void              *p_buf,
+                                           CPU_INT32U         xfer_len,
+                                           USBH_ERR           err);
+
+
+/*
+*********************************************************************************************************
+*                                           USBH_FTDI_CALLBACKS
+*
+* Note(s) : (1) Callback function pointers structure.
+*
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbh_ftdi_callbacks {
+    void  (*ConnNotifyPtr)    (USBH_FTDI_HANDLE  ftdi_handle);  /* Ptr to conn    fnct callback.                        */
+    void  (*DisconnNotifyPtr) (USBH_FTDI_HANDLE  ftdi_handle);  /* Ptr to disconn fnct callback.                        */
+} USBH_FTDI_CALLBACKS;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        USBH_FTDI_Init          (USBH_FTDI_CALLBACKS      *p_ftdi_fnct,
+                                     USBH_ERR                 *p_err);
+
+void        USBH_FTDI_Reset         (USBH_FTDI_HANDLE          ftdi_handle,
+                                     CPU_INT16U                reset_ctrl,
+                                     USBH_ERR                 *p_err);
+
+void        USBH_FTDI_ModemCtrlSet  (USBH_FTDI_HANDLE          ftdi_handle,
+                                     CPU_INT16U                modem_ctrl,
+                                     USBH_ERR                 *p_err);
+
+void        USBH_FTDI_FlowCtrlSet   (USBH_FTDI_HANDLE          ftdi_handle,
+                                     CPU_INT08U                protocol,
+                                     CPU_INT08U                xon_char,
+                                     CPU_INT08U                xoff_char,
+                                     USBH_ERR                 *p_err);
+
+void        USBH_FTDI_BaudRateSet   (USBH_FTDI_HANDLE          ftdi_handle,
+                                     CPU_INT16U                baud_rate,
+                                     USBH_ERR                 *p_err);
+
+void        USBH_FTDI_DataSet       (USBH_FTDI_HANDLE          ftdi_handle,
+                                     CPU_INT08U                data_size,
+                                     CPU_INT08U                parity,
+                                     CPU_INT08U                stop_bits,
+                                     CPU_INT08U                break_bit,
+                                     USBH_ERR                 *p_err);
+
+void        USBH_FTDI_ModemStatusGet(USBH_FTDI_HANDLE          ftdi_handle,
+                                     USBH_FTDI_SERIAL_STATUS  *p_serial_status,
+                                     USBH_ERR                 *p_err);
+
+CPU_INT32U  USBH_FTDI_Tx            (USBH_FTDI_HANDLE          ftdi_handle,
+                                     void                     *p_buf,
+                                     CPU_INT32U                buf_len,
+                                     CPU_INT16U                timeout,
+                                     USBH_ERR                 *p_err);
+
+void        USBH_FTDI_TxAsync       (USBH_FTDI_HANDLE          ftdi_handle,
+                                     void                     *p_buf,
+                                     CPU_INT32U                buf_len,
+                                     USBH_FTDI_ASYNC_TX_FNCT   tx_cmpl_notify,
+                                     void                     *p_arg,
+                                     USBH_ERR                 *p_err);
+
+CPU_INT32U  USBH_FTDI_Rx            (USBH_FTDI_HANDLE          ftdi_handle,
+                                     void                     *p_buf,
+                                     CPU_INT32U                buf_len,
+                                     CPU_INT16U                timeout,
+                                     USBH_FTDI_SERIAL_STATUS  *p_serial_status,
+                                     USBH_ERR                 *p_err);
+
+void        USBH_FTDI_RxAsync       (USBH_FTDI_HANDLE          ftdi_handle,
+                                     void                     *p_buf,
+                                     CPU_INT32U                buf_len,
+                                     USBH_FTDI_SERIAL_STATUS  *p_serial_status,
+                                     USBH_FTDI_ASYNC_RX_FNCT   rx_cmpl_notify,
+                                     void                     *p_arg,
+                                     USBH_ERR                 *p_err);
+
+USBH_DEV   *USBH_FTDI_DevGet        (USBH_FTDI_HANDLE          ftdi_handle,
+                                     USBH_ERR                 *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/HID/usbh_hid.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/HID/usbh_hid.h
new file mode 100644
index 0000000..761b247
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/HID/usbh_hid.h
@@ -0,0 +1,645 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                     The Embedded USB Host Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    HUMAN INTERFACE DEVICE CLASS
+*
+* File           : usbh_hid.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_HID_MODULE_PRESENT
+#define  USBH_HID_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbh_class.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_HID_MODULE
+#define  USBH_HID_EXT
+#else
+#define  USBH_HID_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          HID PROTOCOL CODES
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11',
+*               section 4.3 for more details about HID protocol codes.
+*********************************************************************************************************
+*/
+
+#define  USBH_HID_PROTOCOL_CODE_NONE                    0x00u
+#define  USBH_HID_PROTOCOL_CODE_KBD                     0x01u
+#define  USBH_HID_PROTOCOL_CODE_MOUSE                   0x02u
+
+
+/*
+*********************************************************************************************************
+*                                            HID PROTOCOLS
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11',
+*               section 7.2 for more details about HID protocols.
+*********************************************************************************************************
+*/
+
+#define  USBH_HID_REQ_PROTOCOL_BOOT                   0x0000u
+#define  USBH_HID_REQ_PROTOCOL_REPORT                 0x0001u
+
+
+/*
+*********************************************************************************************************
+*                                    HID DESCRIPTOR COUNTRY CODES
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 6.2.1',
+*               section 7.2 for more details about HID country codes.
+*********************************************************************************************************
+*/
+
+#define  USBH_HID_COUNTRY_CODE_NOT_SUPPORTED               0u
+#define  USBH_HID_COUNTRY_CODE_ARABIC                      1u
+#define  USBH_HID_COUNTRY_CODE_BELGIAN                     2u
+#define  USBH_HID_COUNTRY_CODE_CANADIAN_BILINGUAL          3u
+#define  USBH_HID_COUNTRY_CODE_CANADIAN_FRENCH             4u
+#define  USBH_HID_COUNTRY_CODE_CZECH_REPUBLIC              5u
+#define  USBH_HID_COUNTRY_CODE_DANISH                      6u
+#define  USBH_HID_COUNTRY_CODE_FINNISH                     7u
+#define  USBH_HID_COUNTRY_CODE_FRENCH                      8u
+#define  USBH_HID_COUNTRY_CODE_GERMAN                      9u
+#define  USBH_HID_COUNTRY_CODE_GREEK                      10u
+#define  USBH_HID_COUNTRY_CODE_HEBREW                     11u
+#define  USBH_HID_COUNTRY_CODE_HUNGARY                    12u
+#define  USBH_HID_COUNTRY_CODE_INTERNATIONAL              13u
+#define  USBH_HID_COUNTRY_CODE_ITALIAN                    14u
+#define  USBH_HID_COUNTRY_CODE_JAPAN_KATAKANA             15u
+#define  USBH_HID_COUNTRY_CODE_KOREAN                     16u
+#define  USBH_HID_COUNTRY_CODE_LATIN_AMERICAN             17u
+#define  USBH_HID_COUNTRY_CODE_NETHERLANDS_DUTCH          18u
+#define  USBH_HID_COUNTRY_CODE_NORWEGIAN                  19u
+#define  USBH_HID_COUNTRY_CODE_PERSIAN_FARSI              20u
+#define  USBH_HID_COUNTRY_CODE_POLAND                     21u
+#define  USBH_HID_COUNTRY_CODE_PORTUGUESE                 22u
+#define  USBH_HID_COUNTRY_CODE_RUSSIA                     23u
+#define  USBH_HID_COUNTRY_CODE_SLOVAKIA                   24u
+#define  USBH_HID_COUNTRY_CODE_SPANISH                    25u
+#define  USBH_HID_COUNTRY_CODE_SWEDISH                    26u
+#define  USBH_HID_COUNTRY_CODE_SWISS_FRENCH               27u
+#define  USBH_HID_COUNTRY_CODE_SWISS_GERMAN               28u
+#define  USBH_HID_COUNTRY_CODE_SWITZERLAND                29u
+#define  USBH_HID_COUNTRY_CODE_TAIWAN                     30u
+#define  USBH_HID_COUNTRY_CODE_TURKISH_Q                  31u
+#define  USBH_HID_COUNTRY_CODE_UK                         32u
+#define  USBH_HID_COUNTRY_CODE_US                         33u
+#define  USBH_HID_COUNTRY_CODE_YUGOSLAVIA                 34u
+#define  USBH_HID_COUNTRY_CODE_TURKISH_F                  35u
+
+
+/*
+*********************************************************************************************************
+*                                           HID REPORT ITEM
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11',
+*               section 6.2.2 for more details about HID report items.
+*********************************************************************************************************
+*/
+
+#define  USBH_HID_ITEM_LONG                             0xFEu
+
+                                                                /* ----------------- SHORT ITEM TYPES ----------------- */
+#define  USBH_HID_ITEM_TYPE_MAIN                        0x00u
+#define  USBH_HID_ITEM_TYPE_GLOBAL                      0x01u
+#define  USBH_HID_ITEM_TYPE_LOCAL                       0x02u
+#define  USBH_HID_ITEM_TYPE_RESERVED                    0x03u
+
+                                                                /* ------------------ MAIN ITEM TAGS ------------------ */
+#define  USBH_HID_MAIN_ITEM_TAG_IN                      0x08u
+#define  USBH_HID_MAIN_ITEM_TAG_OUT                     0x09u
+#define  USBH_HID_MAIN_ITEM_TAG_COLL                    0x0Au
+#define  USBH_HID_MAIN_ITEM_TAG_FEATURE                 0x0Bu
+#define  USBH_HID_MAIN_ITEM_TAG_ENDCOLL                 0x0Cu
+
+                                                                /* ----------------- GLOBAL ITEM TAGS ----------------- */
+#define  USBH_HID_GLOBAL_ITEM_TAG_USAGE_PAGE            0x00u
+#define  USBH_HID_GLOBAL_ITEM_TAG_LOG_MIN               0x01u
+#define  USBH_HID_GLOBAL_ITEM_TAG_LOG_MAX               0x02u
+#define  USBH_HID_GLOBAL_ITEM_TAG_PHY_MIN               0x03u
+#define  USBH_HID_GLOBAL_ITEM_TAG_PHY_MAX               0x04u
+#define  USBH_HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT         0x05u
+#define  USBH_HID_GLOBAL_ITEM_TAG_UNIT                  0x06u
+#define  USBH_HID_GLOBAL_ITEM_TAG_REPORT_SIZE           0x07u
+#define  USBH_HID_GLOBAL_ITEM_TAG_REPORT_ID             0x08u
+#define  USBH_HID_GLOBAL_ITEM_TAG_REPORT_COUNT          0x09u
+#define  USBH_HID_GLOBAL_ITEM_TAG_PUSH                  0x0Au
+#define  USBH_HID_GLOBAL_ITEM_TAG_POP                   0x0Bu
+
+                                                                /* ----------------- LOCAL ITEM TAGS ------------------ */
+#define  USBH_HID_LOCAL_ITEM_TAG_USAGE                  0x00u
+#define  USBH_HID_LOCAL_ITEM_TAG_USAGE_MIN              0x01u
+#define  USBH_HID_LOCAL_ITEM_TAG_USAGE_MAX              0x02u
+#define  USBH_HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX       0x03u
+#define  USBH_HID_LOCAL_ITEM_TAG_DESIGNATOR_MIN         0x04u
+#define  USBH_HID_LOCAL_ITEM_TAG_DESIGNATOR_MAX         0x05u
+#define  USBH_HID_LOCAL_ITEM_TAG_STR_IX                 0x07u
+#define  USBH_HID_LOCAL_ITEM_TAG_STR_MIN                0x08u
+#define  USBH_HID_LOCAL_ITEM_TAG_STR_MAX                0x09u
+#define  USBH_HID_LOCAL_ITEM_TAG_DELIMITER              0x0Au
+
+
+/*
+*********************************************************************************************************
+*                                             HID REPORT
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11',
+*               section 6.2.2 for more details about HID reports.
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- MAIN ITEMS -------------------- */
+#define  USBH_HID_MAIN_IN                               0x80u
+#define  USBH_HID_MAIN_OUT                              0x90u
+#define  USBH_HID_MAIN_COLL                             0xA0u
+#define  USBH_HID_MAIN_FEATURE                          0xB0u
+#define  USBH_HID_MAIN_ENDCOLL                          0xC0u
+
+                                                                /* ---------- INPUT / OUTPUT / FEATURE ITEMS ---------- */
+#define  USBH_HID_MAIN_CONST                            0x01u
+#define  USBH_HID_MAIN_DATA                             0x00u
+#define  USBH_HID_MAIN_VAR                              0x02u
+#define  USBH_HID_MAIN_ARRAY                            0x00u
+#define  USBH_HID_MAIN_REL                              0x04u
+#define  USBH_HID_MAIN_ABS                              0x00u
+#define  USBH_HID_MAIN_WRAP                             0x08u
+#define  USBH_HID_MAIN_NOWRAP                           0x00u
+#define  USBH_HID_MAIN_NONLINE                          0x10u
+#define  USBH_HID_MAIN_LINE                             0x00u
+#define  USBH_HID_MAIN_NOPREFERRED                      0x20u
+#define  USBH_HID_MAIN_PREFERREDSTATE                   0x00u
+#define  USBH_HID_MAIN_NULLSTATE                        0x40u
+#define  USBH_HID_MAIN_NO_NULL_POS                      0x00u
+#define  USBH_HID_MAIN_VOLATILE                         0x80u
+#define  USBH_HID_MAIN_NONVOLATILE                      0x00u
+#define  USBH_HID_MAIN_BUFFEREDBYTES                  0x0100u
+#define  USBH_HID_MAIN_BITFIELD                       0x0000u
+
+                                                                /* ----------------- COLLECTION ITEMS ----------------- */
+#define  USBH_HID_COLL_PHYSICAL                         0x00u
+#define  USBH_HID_COLL_APP                              0x01u
+#define  USBH_HID_COLL_LOGICAL                          0x02u
+#define  USBH_HID_COLL_REPORT                           0x03u
+#define  USBH_HID_COLL_NAMED_ARRAY                      0x04u
+#define  USBH_HID_COLL_USAGE_SWITCH                     0x05u
+#define  USBH_HID_COLL_USAGE_MODIFIER                   0x06u
+
+                                                                /* ------------------- GLOBAL ITEMS ------------------- */
+#define  USBH_HID_GLOBAL_USAGE_PAGE                     0x04u
+#define  USBH_HID_GLOBAL_LOG_MIN                        0x14u
+#define  USBH_HID_GLOBAL_LOG_MAX                        0x24u
+#define  USBH_HID_GLOBAL_PHY_MIN                        0x34u
+#define  USBH_HID_GLOBAL_PHY_MAX                        0x44u
+#define  USBH_HID_GLOBAL_UNIT_EXPONENT                  0x54u
+#define  USBH_HID_GLOBAL_UNIT                           0x64u
+#define  USBH_HID_GLOBAL_REPORT_SIZE                    0x74u
+#define  USBH_HID_GLOBAL_REPORT_ID                      0x84u
+#define  USBH_HID_GLOBAL_REPORT_COUNT                   0x94u
+#define  USBH_HID_GLOBAL_PUSH                           0xA4u
+#define  USBH_HID_GLOBAL_POP                            0xB4u
+
+                                                                /* ------------------- LOCAL ITEMS -------------------- */
+#define  USBH_HID_LOCAL_USAGE                           0x08u
+#define  USBH_HID_LOCAL_USAGE_MIN                       0x18u
+#define  USBH_HID_LOCAL_USAGE_MAX                       0x28u
+#define  USBH_HID_LOCAL_DESIGNATOR_IX                   0x38u
+#define  USBH_HID_LOCAL_DESIGNATOR_MIN                  0x48u
+#define  USBH_HID_LOCAL_DESIGNATOR_MAX                  0x58u
+#define  USBH_HID_LOCAL_STR_INDEX                       0x78u
+#define  USBH_HID_LOCAL_STR_MIN                         0x88u
+#define  USBH_HID_LOCAL_STR_MAX                         0x98u
+#define  USBH_HID_LOCAL_DELIMITER                       0xA8u
+
+
+/*
+*********************************************************************************************************
+*                                       HID PHYSICAL DESCRIPTOR
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11',
+*               section 6.2.3 for more details about HID physical descriptors.
+*********************************************************************************************************
+*/
+
+                                                                /* -------------------- BIAS VALUES ------------------- */
+#define  USBH_HID_BIAS_NOT_APPLICABLE                      0u
+#define  USBH_HID_BIAS_RIGHT_HAND                          1u
+#define  USBH_HID_BIAS_LEFT_HAND                           2u
+#define  USBH_HID_BIAS_BOTH_HANDS                          3u
+#define  USBH_HID_BIAS_EITHER_HAND                         4u
+
+                                                                /* ----------------- DESIGNATOR VALUES ---------------- */
+#define  USBH_HID_DESIGNATOR_NONE                       0x00u
+#define  USBH_HID_DESIGNATOR_HAND                       0x01u
+#define  USBH_HID_DESIGNATOR_EYEBALL                    0x02u
+#define  USBH_HID_DESIGNATOR_EYEBROW                    0x03u
+#define  USBH_HID_DESIGNATOR_EYELID                     0x04u
+#define  USBH_HID_DESIGNATOR_EAR                        0x05u
+#define  USBH_HID_DESIGNATOR_NOSE                       0x06u
+#define  USBH_HID_DESIGNATOR_MOUTH                      0x07u
+#define  USBH_HID_DESIGNATOR_UPPER_LIP                  0x08u
+#define  USBH_HID_DESIGNATOR_LOWER_LIP                  0x09u
+#define  USBH_HID_DESIGNATOR_JAW                        0x0Au
+#define  USBH_HID_DESIGNATOR_NECK                       0x0Bu
+#define  USBH_HID_DESIGNATOR_UPPER_ARM                  0x0Cu
+#define  USBH_HID_DESIGNATOR_ELBOW                      0x0Du
+#define  USBH_HID_DESIGNATOR_FOREARM                    0x0Eu
+#define  USBH_HID_DESIGNATOR_WRIST                      0x0Fu
+#define  USBH_HID_DESIGNATOR_PALM                       0x10u
+#define  USBH_HID_DESIGNATOR_THUMB                      0x11u
+#define  USBH_HID_DESIGNATOR_INDEX_FINGER               0x12u
+#define  USBH_HID_DESIGNATOR_MIDDLE_FINGER              0x13u
+#define  USBH_HID_DESIGNATOR_RING_FINGER                0x14u
+#define  USBH_HID_DESIGNATOR_LITTLE_FINGER              0x15u
+#define  USBH_HID_DESIGNATOR_HEAD                       0x16u
+#define  USBH_HID_DESIGNATOR_SHOULDER                   0x17u
+#define  USBH_HID_DESIGNATOR_HIP                        0x18u
+#define  USBH_HID_DESIGNATOR_WAIST                      0x19u
+#define  USBH_HID_DESIGNATOR_THIGH                      0x1Au
+#define  USBH_HID_DESIGNATOR_KNEE                       0x1Bu
+#define  USBH_HID_DESIGNATOR_CALF                       0x1Cu
+#define  USBH_HID_DESIGNATOR_ANKLE                      0x1Du
+#define  USBH_HID_DESIGNATOR_FOOT                       0x1Eu
+#define  USBH_HID_DESIGNATOR_HEEL                       0x1Fu
+#define  USBH_HID_DESIGNATOR_BALL_OF_FOOT               0x20u
+#define  USBH_HID_DESIGNATOR_BIG_TOE                    0x21u
+#define  USBH_HID_DESIGNATOR_SECOND_TOE                 0x22u
+#define  USBH_HID_DESIGNATOR_THIRD_TOE                  0x23u
+#define  USBH_HID_DESIGNATOR_FOURTH_TOE                 0x24u
+#define  USBH_HID_DESIGNATOR_LITTLE_TOE                 0x25u
+#define  USBH_HID_DESIGNATOR_BROW                       0x26u
+#define  USBH_HID_DESIGNATOR_CHEEK                      0x27u
+
+                                                                /* ----------------- QUALIFIER VALUES ----------------- */
+#define  USBH_HID_QUALIFIER_NOT_APPLICABLE                 0u
+#define  USBH_HID_QUALIFIER_RIGHT                          1u
+#define  USBH_HID_QUALIFIER_LEFT                           2u
+#define  USBH_HID_QUALIFIER_BOTH                           3u
+#define  USBH_HID_QUALIFIER_EITHER                         4u
+#define  USBH_HID_QUALIFIER_CENTER                         5u
+
+
+/*
+*********************************************************************************************************
+*                                           HID USAGE PAGES
+*
+* Note(s) : (1) See 'Universal Serial Bus HID Usage Tables, 10/28/04, Version 1.12',
+*               section 3 for more details about usage pages.
+*********************************************************************************************************
+*/
+
+#define  USBH_HID_USAGE_PAGE_UNDEFINED                  0x00u
+#define  USBH_HID_USAGE_PAGE_GENERIC_DESKTOP_CTRLS      0x01u
+#define  USBH_HID_USAGE_PAGE_SIMULATION_CTRLS           0x02u
+#define  USBH_HID_USAGE_PAGE_VR_CTRLS                   0x03u
+#define  USBH_HID_USAGE_PAGE_SPORT_CTRLS                0x04u
+#define  USBH_HID_USAGE_PAGE_GAME_CTRLS                 0x05u
+#define  USBH_HID_USAGE_PAGE_GENERIC_DEV_CTRLS          0x06u
+#define  USBH_HID_USAGE_PAGE_KBD                        0x07u
+#define  USBH_HID_USAGE_PAGE_LEDS                       0x08u
+#define  USBH_HID_USAGE_PAGE_BUTTON                     0x09u
+#define  USBH_HID_USAGE_PAGE_ORDINAL                    0x0Au
+#define  USBH_HID_USAGE_PAGE_TELEPHONY                  0x0Bu
+#define  USBH_HID_USAGE_PAGE_CONSUMER                   0x0Cu
+#define  USBH_HID_USAGE_PAGE_DIGITIZER                  0x0Du
+#define  USBH_HID_USAGE_PAGE_PID_PAGE                   0x0Fu
+#define  USBH_HID_USAGE_PAGE_UNICODE                    0x10u
+#define  USBH_HID_USAGE_PAGE_ALPHANUMERIC_DISP          0x14u
+#define  USBH_HID_USAGE_PAGE_MEDICAL_INSTRUMENTS        0x40u
+#define  USBH_HID_USAGE_PAGE_MON_0                      0x80u
+#define  USBH_HID_USAGE_PAGE_MON_1                      0x81u
+#define  USBH_HID_USAGE_PAGE_MON_2                      0x82u
+#define  USBH_HID_USAGE_PAGE_MON_3                      0x83u
+#define  USBH_HID_USAGE_PAGE_PWR_0                      0x84u
+#define  USBH_HID_USAGE_PAGE_PWR_1                      0x85u
+#define  USBH_HID_USAGE_PAGE_PWR_2                      0x86u
+#define  USBH_HID_USAGE_PAGE_PWR_3                      0x87u
+#define  USBH_HID_USAGE_PAGE_BAR_CODE_SCANNER_PAGE      0x8Cu
+#define  USBH_HID_USAGE_PAGE_SCALE_PAGE                 0x8Du
+#define  USBH_HID_USAGE_PAGE_MSR_DEVS                   0x8Eu
+#define  USBH_HID_USAGE_PAGE_POINT_OF_SALE_PAGES        0x8Fu
+#define  USBH_HID_USAGE_PAGE_CAMERA_CTRL_PAGE           0x90u
+#define  USBH_HID_USAGE_PAGE_ARCADE_PAGE                0x91u
+
+                                                                /* ---------- GENERIC DESKTOP PAGE APP USAGES --------- */
+#define  USBH_HID_CA_MOUSE                        0x00010002u
+#define  USBH_HID_CA_JOYSTICK                     0x00010004u
+#define  USBH_HID_CA_GAME_PAD                     0x00010005u
+#define  USBH_HID_CA_KBD                          0x00010006u
+#define  USBH_HID_CA_KEYPAD                       0x00010007u
+#define  USBH_HID_CA_MULTI_AXIS_CTRLR             0x00010008u
+#define  USBH_HID_CA_SYSTEM_CTRL                  0x00010080u
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         FORWARD DECLARATION
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_hid_coll  USBH_HID_COLL;
+
+
+/*
+*********************************************************************************************************
+*                                           HID DESCRIPTOR
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11',
+*               section 6.2.1 for more details about HID descriptor.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_hid_desc {
+    CPU_INT08U  bLength;
+    CPU_INT08U  bDescriptorType;
+    CPU_INT16U  bcdHID;
+    CPU_INT08U  bCountryCode;
+    CPU_INT08U  bNbrDescriptors;
+    CPU_INT08U  bClassDescriptorType;
+    CPU_INT16U  wClassDescriptorLength;
+} USBH_HID_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                            REPORT FORMAT
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11',
+*               section 6.2.2 for more details about HID reports.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_hid_report_fmt {
+    CPU_INT08U  ReportID;
+    CPU_INT08U  ReportType;                                     /* Report type (INPUT / OUTPUT / FEATURE).              */
+    CPU_INT16U  UsagePage;
+    CPU_INT32U  Usage[USBH_HID_CFG_MAX_NBR_USAGE];
+    CPU_INT32U  NbrUsage;
+    CPU_INT32U  UsageMin;
+    CPU_INT32U  UsageMax;
+    CPU_INT32S  LogMin;
+    CPU_INT32S  LogMax;
+    CPU_INT32S  PhyMin;
+    CPU_INT32S  PhyMax;
+    CPU_INT32S  UnitExp;
+    CPU_INT32U  Unit;
+    CPU_INT32U  ReportSize;                                     /* Report size (bits).                                  */
+    CPU_INT32U  ReportCnt;
+    CPU_INT32U  Flag;                                           /* Flag (Data/constant, var/array ..).                  */
+    CPU_INT32U  PhyUsage;                                       /* Physical usage of this report.                       */
+    CPU_INT32U  AppUsage;                                       /* Application usage of this report.                    */
+    CPU_INT32U  LogUsage;                                       /* Logical usage of this report.                        */
+} USBH_HID_REPORT_FMT;
+
+
+/*
+*********************************************************************************************************
+*                                            HID REPORT ID
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11',
+*               section 5.6 for more details about HID report ID.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_hid_report_id {
+    CPU_INT32U  Size;                                           /* Report size in bits.                                 */
+    CPU_INT08U  ReportID;
+    CPU_INT08U  Type;                                           /* Report type (INPUT / OUTPUT / FEATURE).              */
+} USBH_HID_REPORT_ID;
+
+
+/*
+*********************************************************************************************************
+*                                           HID COLLECTION
+*
+* Note(s) : (1) See 'Device Class Definition for Human Interface Devices (HID), 6/27/01, Version 1.11',
+*               section 6.2.2.6 for more details about HID collection.
+*********************************************************************************************************
+*/
+
+struct  usbh_hid_coll {
+    CPU_INT32U      Usage;                                      /* Coll usage.                                          */
+    CPU_INT08U      Type;                                       /* Coll type (App / Physical / Logical).                */
+    USBH_HID_COLL  *NextPtr;
+};
+
+typedef  struct  usbh_hid_app_coll {
+    CPU_INT32U           Usage;                                 /* Coll usage.                                          */
+    CPU_INT08U           Type;                                  /* Coll type (App / Physical / Logical).                */
+    CPU_INT08U           NbrReportFmt;                          /* Nbr of report fmts.                                  */
+
+                                                                /* Array of report fmts.                                */
+    USBH_HID_REPORT_FMT  ReportFmt[USBH_HID_CFG_MAX_NBR_REPORT_FMT];
+} USBH_HID_APP_COLL;
+
+
+                                                                /* --- APPLICATION REPORT RECEIVE CALLBACK FUNCTION --- */
+typedef  void  (*USBH_HID_RXCB_FNCT)(void        *p_arg,
+                                     void        *p_buf,
+                                     CPU_INT08U   buf_len,
+                                     USBH_ERR     err);
+
+
+                                                                /* ----------- HID REPORT RECEIVE CALLBACK ------------ */
+typedef  struct  usbh_hid_rxcb {
+    CPU_BOOLEAN          InUse;
+    CPU_INT08U           ReportID;
+    void                *AsyncArgPtr;
+    USBH_HID_RXCB_FNCT   AsyncFnct;
+} USBH_HID_RXCB;
+
+
+                                                                /* -------------------- HID DEVICE -------------------- */
+typedef  struct  usbh_hid_dev {
+    USBH_DEV            *DevPtr;                                /* Ptr to dev struct.                                   */
+    USBH_IF             *IfPtr;                                 /* Ptr to IF struct.                                    */
+    CPU_INT08U           IfNbr;                                 /* HID IF nbr of dev.                                   */
+    USBH_EP              IntrInEP;                              /* Intr IN EP.                                          */
+    USBH_EP              IntrOutEP;                             /* Intr OUT EP.                                         */
+    CPU_BOOLEAN          IsOutEP_Present;                       /* Indicate if intr OUT EP is present on dev.           */
+
+    CPU_INT08U           State;
+    CPU_INT08U           AppRefCnt;                             /* Cnt of app ref on this dev.                          */
+    USBH_HMUTEX          HMutex;
+
+    CPU_INT08U           SubClass;                              /* HID dev IF subclass code.                            */
+    CPU_INT08U           Protocol;                              /* HID dev IF protocol code.                            */
+    USBH_HID_DESC        Desc;                                  /* HID desc content.                                    */
+
+    CPU_INT08U           NbrAppColl;                            /* Nbr of app coll in main item.                        */
+    USBH_HID_APP_COLL    AppColl[USBH_HID_CFG_MAX_NBR_APP_COLL];/* App coll in main item.                               */
+    CPU_INT08U           NbrReportID;                           /* Tot nbr of report ID.                                */
+
+                                                                /* Report ID of all colls.                              */
+    USBH_HID_REPORT_ID   ReportID[USBH_HID_CFG_MAX_NBR_REPORT_ID];
+
+    USBH_HID_RXCB        RxCB[USBH_HID_CFG_MAX_NBR_RXCB];
+
+                                                                /* Rx/Tx buf, +1 for report id.                            */
+    CPU_INT08U           RxBuf[USBH_HID_CFG_MAX_RX_BUF_SIZE + 1u];
+    CPU_INT08U           TxBuf[USBH_HID_CFG_MAX_TX_BUF_SIZE + 1u];
+    CPU_INT08U           ErrCnt;                                /* Rx error cnt.                                        */
+    CPU_INT08U           Boot;                                  /* Is it a boot HID dev?                                */
+    CPU_BOOLEAN          IsInit;                                /* Indicate if HID class instance is correctly init.    */
+    CPU_BOOLEAN          RxInProg;                              /* Async rx is in progress.                             */
+
+                                                                /* HID report desc content.                             */
+    CPU_INT08U           ReportDesc[USBH_HID_CFG_MAX_REPORT_DESC_LEN];
+    USBH_HID_REPORT_ID  *MaxReportPtr;                          /* Ptr to largest report.                               */
+
+    CPU_INT32U           Usage;                                 /* HID device usage.                                    */
+} USBH_HID_DEV;
+
+
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+USBH_HID_EXT  USBH_CLASS_DRV  USBH_HID_ClassDrv;                /* HID Class drv API.                                   */
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+USBH_ERR     USBH_HID_Init            (USBH_HID_DEV         *p_hid_dev);
+
+USBH_ERR     USBH_HID_RefAdd          (USBH_HID_DEV         *p_hid_dev);
+
+USBH_ERR     USBH_HID_RefRel          (USBH_HID_DEV         *p_hid_dev);
+
+USBH_ERR     USBH_HID_GetReportIDArray(USBH_HID_DEV         *p_hid_dev,
+                                       USBH_HID_REPORT_ID  **p_report_id,
+                                       CPU_INT08U           *p_nbr_report_id);
+
+USBH_ERR     USBH_HID_GetAppCollArray (USBH_HID_DEV         *p_hid_dev,
+                                       USBH_HID_APP_COLL   **p_app_coll,
+                                       CPU_INT08U           *p_nbr_app_coll);
+
+CPU_BOOLEAN  USBH_HID_IsBootDev       (USBH_HID_DEV         *p_hid_dev,
+                                       USBH_ERR             *p_err);
+
+CPU_INT08U   USBH_HID_RxReport        (USBH_HID_DEV         *p_hid_dev,
+                                       CPU_INT08U            report_id,
+                                       void                 *p_buf,
+                                       CPU_INT08U            buf_len,
+                                       CPU_INT16U            timeout_ms,
+                                       USBH_ERR             *p_err);
+
+CPU_INT08U   USBH_HID_TxReport        (USBH_HID_DEV         *p_hid_dev,
+                                       CPU_INT08U            report_id,
+                                       void                 *p_buf,
+                                       CPU_INT08U            buf_len,
+                                       CPU_INT16U            timeout_ms,
+                                       USBH_ERR             *p_err);
+
+USBH_ERR     USBH_HID_RegRxCB         (USBH_HID_DEV         *p_hid_dev,
+                                       CPU_INT08U            report_id,
+                                       USBH_HID_RXCB_FNCT    async_fnct,
+                                       void                 *p_async_arg);
+
+USBH_ERR     USBH_HID_UnregRxCB       (USBH_HID_DEV         *p_hid_dev,
+                                       CPU_INT08U            report_id);
+
+USBH_ERR     USBH_HID_ProtocolSet     (USBH_HID_DEV         *p_hid_dev,
+                                       CPU_INT16U            protocol);
+
+USBH_ERR     USBH_HID_ProtocolGet     (USBH_HID_DEV         *p_hid_dev,
+                                       CPU_INT16U           *p_protocol);
+
+USBH_ERR     USBH_HID_IdleSet         (USBH_HID_DEV         *p_hid_dev,
+                                       CPU_INT08U            report_id,
+                                       CPU_INT32U            dur);
+
+CPU_INT32U   USBH_HID_IdleGet         (USBH_HID_DEV         *p_hid_dev,
+                                       CPU_INT08U            report_id,
+                                       USBH_ERR             *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/HID/usbh_hidparser.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/HID/usbh_hidparser.h
new file mode 100644
index 0000000..d47e81d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/HID/usbh_hidparser.h
@@ -0,0 +1,123 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                     The Embedded USB Host Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 HUMAN INTERFACE DEVICE CLASS PARSER
+*
+* File           : usbh_hidparser.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_HIDPARSER_MODULE_PRESENT
+#define  USBH_HIDPARSER_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_HIDPARSER_MODULE
+#define  USBH_HIDPARSER_EXT
+#else
+#define  USBH_HIDPARSER_EXT   extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+USBH_ERR             USBH_HID_ParserGlobalInit(void);
+
+USBH_ERR             USBH_HID_ItemParser      (USBH_HID_DEV  *p_hid_dev,
+                                               CPU_INT08U    *p_report_desc,
+                                               CPU_INT32U     desc_len);
+
+USBH_ERR             USBH_HID_CreateReportID  (USBH_HID_DEV  *p_hid_dev);
+
+USBH_HID_REPORT_ID  *USBH_HID_MaxReport       (USBH_HID_DEV  *p_hid_dev,
+                                               CPU_INT08U     type);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/MSC/usbh_msc.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/MSC/usbh_msc.h
new file mode 100644
index 0000000..3ff6042
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Class/MSC/usbh_msc.h
@@ -0,0 +1,186 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                     The Embedded USB Host Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      MASS STORAGE CLASS (MSC)
+*
+* File           : usbh_msc.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_MSC_MODULE_PRESENT
+#define  USBH_MSC_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbh_os.h"
+#include  "../../Source/usbh_class.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_MSC_MODULE
+#define  USBH_MSC_EXT
+#else
+#define  USBH_MSC_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBH_MSC_TIMEOUT                              10000u
+
+#define  USBH_MSC_DEV_NOT_IN_USE                           0u
+#define  USBH_MSC_DEV_IN_USE                               1u
+
+#define  USBH_MSC_DATA_DIR_IN                           0x80u
+#define  USBH_MSC_DATA_DIR_OUT                          0x00u
+#define  USBH_MSC_DATA_DIR_NONE                         0x01u
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  USBH_MSC_DATA_DIR;
+
+                                                                /* -------------------- MSC DEVICE -------------------- */
+typedef  struct  usbh_msc_dev {
+    USBH_EP       BulkInEP;                                     /* Bulk IN  endpoint.                                   */
+    USBH_EP       BulkOutEP;                                    /* Bulk OUT endpoint.                                   */
+    USBH_DEV     *DevPtr;                                       /* Pointer to USB device.                               */
+    USBH_IF      *IF_Ptr;                                       /* Pointer to interface.                                */
+    CPU_INT08U    State;                                        /* State of MSC device.                                 */
+    CPU_INT08U    RefCnt;                                       /* Cnt of app ref on this dev.                          */
+    USBH_HMUTEX   HMutex;
+} USBH_MSC_DEV;
+
+typedef  struct  msc_inquiry_info {
+    CPU_INT08U  DevType;
+    CPU_INT08U  IsRemovable;
+    CPU_INT08U  Vendor_ID[8];
+    CPU_INT08U  Product_ID[16];
+    CPU_INT32U  ProductRevisionLevel;
+} USBH_MSC_INQUIRY_INFO;
+
+
+/*
+*********************************************************************************************************
+*                                            GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+USBH_MSC_EXT  USBH_CLASS_DRV  USBH_MSC_ClassDrv;
+
+
+/*
+*********************************************************************************************************
+*                                                 MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+USBH_ERR    USBH_MSC_Init        (USBH_MSC_DEV           *p_msc_dev,
+                                  CPU_INT08U              lun);
+
+CPU_INT08U  USBH_MSC_MaxLUN_Get  (USBH_MSC_DEV           *p_msc_dev,
+                                  USBH_ERR               *p_err);
+
+CPU_BOOLEAN  USBH_MSC_UnitRdyTest(USBH_MSC_DEV          *p_msc_dev,
+                                  CPU_INT08U             lun,
+                                  USBH_ERR              *p_err);
+
+USBH_ERR    USBH_MSC_CapacityRd  (USBH_MSC_DEV           *p_msc_dev,
+                                  CPU_INT08U              lun,
+                                  CPU_INT32U             *p_nbr_blks,
+                                  CPU_INT32U             *p_blk_size);
+
+USBH_ERR    USBH_MSC_StdInquiry  (USBH_MSC_DEV           *p_msc_dev,
+                                  USBH_MSC_INQUIRY_INFO  *p_msc_inquiry_info,
+                                  CPU_INT08U              lun);
+
+USBH_ERR    USBH_MSC_RefAdd      (USBH_MSC_DEV           *p_msc_dev);
+
+USBH_ERR    USBH_MSC_RefRel      (USBH_MSC_DEV           *p_msc_dev);
+
+CPU_INT32U  USBH_MSC_Rd          (USBH_MSC_DEV           *p_msc_dev,
+                                  CPU_INT08U              lun,
+                                  CPU_INT32U              blk_addr,
+                                  CPU_INT16U              nbr_blks,
+                                  CPU_INT32U              blk_size,
+                                  void                   *p_arg,
+                                  USBH_ERR               *p_err);
+
+CPU_INT32U  USBH_MSC_Wr          (USBH_MSC_DEV           *p_msc_dev,
+                                  CPU_INT08U              lun,
+                                  CPU_INT32U              blk_addr,
+                                  CPU_INT16U              nbr_blks,
+                                  CPU_INT32U              blk_size,
+                                  const  void            *p_arg,
+                                  USBH_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/HCD/EHCI/usbh_hcd_ehci.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/HCD/EHCI/usbh_hcd_ehci.h
new file mode 100644
index 0000000..84adfe0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/HCD/EHCI/usbh_hcd_ehci.h
@@ -0,0 +1,308 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                       The Embedded USB Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         GENERIC EHCI DRIVER
+*
+* File           : usbh_ehci.h
+* Version        : V3.41.03
+* Programmer(s)  :
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_EHCI_H
+#define  USBH_EHCI_H
+
+
+/*
+*********************************************************************************************************
+*                                        INCLUDE HEADER FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbh_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                              CONSTANTS
+*********************************************************************************************************
+*/
+
+#define  EHCI_MAX_ITD                                     10u   /* Max nbr of iTD per EP for HS isoc xfer               */
+#define  EHCI_MAX_SITD                                    10u   /* Max nbr of siTD per EP for FS isoc xfer              */
+
+
+#define  EHCI_MAX_PERIODIC_BW                             90u
+#define  EHCI_PORT_POWERED_ALWAYS                          0u
+#define  EHCI_PORT_POWERED_INDIVIDUAL                      1u
+#define  EHCI_MAX_PERIODIC_LIST_SIZE                   (256u * 2u)
+
+
+#define  EHCI_TIMESTAMP_MICROSEC                           1u
+#define  EHCI_TIMESTAMP_MILLISEC                           2u
+
+                                                                /* ----------- EHCI QH LIST NUMBER DEFINES ------------ */
+#define  EHCI_QH_LIST_256MS                                0u
+#define  EHCI_QH_LIST_128MS                              256u
+#define  EHCI_QH_LIST_64MS                               384u
+#define  EHCI_QH_LIST_32MS                               448u
+#define  EHCI_QH_LIST_16MS                               480u
+#define  EHCI_QH_LIST_08MS                               496u
+#define  EHCI_QH_LIST_04MS                               504u
+#define  EHCI_QH_LIST_02MS                               508u
+#define  EHCI_QH_LIST_01MS                               510u
+#define  EHCI_INTR_QH_LIST_SIZE         (EHCI_QH_LIST_01MS + 1u)
+
+#define  EHCI_MAX_BW_PER_MICRO_FRAME                    3072u
+
+#define  EHCI_BW_FLAG_CONSUME                              1u
+#define  EHCI_BW_FLAG_PRODUCE                              2u
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+#ifndef  EHCI_CFG_ONRESET_EN                                    /* En callback to setup auxiliary registers on reset.   */
+#define  EHCI_CFG_ONRESET_EN                  DEF_DISABLED
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        MAXIMUM PACKET SIZES
+*********************************************************************************************************
+*/
+
+#define  MPS_HS                                         1024u   /* Maximum Packet Size for High Speed device            */
+#define  MPS_FS                                         1023u   /* Maximum Packet Size for Full Speed device            */
+#define  MPS_LS                                           64u   /* Maximum Packet Size for Low  Speed device            */
+
+
+/*
+*********************************************************************************************************
+*                                          TYPE DEFINITIONS
+*********************************************************************************************************
+*/
+
+typedef  struct  ehci_isoc_ep_desc  EHCI_ISOC_EP_DESC;
+typedef  struct  ehci_isoc_ep_urb   EHCI_ISOC_EP_URB;
+typedef  struct  ehci_intr_info     EHCI_INTR_INFO;
+
+
+typedef  struct  ehci_qh {
+    CPU_REG32    QHHorLinkPtr;
+    CPU_REG32    QHEpCapChar[2];
+    CPU_REG32    QHCurQTDPtr;
+    CPU_REG32    QHNxtQTDPtr;
+    CPU_REG32    QHAltNxtQTDPtr;
+    CPU_REG32    QHToken;
+    CPU_REG32    QHBufPagePtrList[5];
+                                                                /* Fields not part of qH struct defined in EHCI spec    */
+    USBH_EP     *EPPtr;
+    CPU_INT32U   QTDHead;
+    CPU_INT08U   SMask;
+    CPU_INT08U   BWStartFrame;
+    CPU_INT16U   FrameInterval;
+    CPU_INT08U   Rsvd[4];                                       /* Padding to align the struct on a 32-byte boundary    */
+} EHCI_QH;
+
+
+typedef  struct  ehci_qtd {
+    CPU_REG32  QTDNxtPtr;
+    CPU_REG32  QTDAltNxtPtr;
+    CPU_REG32  QTDToken;
+    CPU_REG32  QTDBufPagePtrList[5];
+} EHCI_QTD;
+
+
+typedef  struct  ehci_sitd {
+    CPU_REG32    SITDNxtLinkPtr;
+    CPU_REG32    SITDEpCapChar[2];
+    CPU_REG32    SITDStsCtrl;
+    CPU_REG32    SITDBufPagePtrList[2];
+    CPU_REG32    SITDBackLinkPtr;
+} EHCI_SITD;
+
+
+typedef  struct  ehci_itd {
+    CPU_REG32  ITDNxtLinkPtr;
+    CPU_REG32  ITDStsAndCntrl[8];
+    CPU_REG32  ITDBufPagePtrList[7];
+} EHCI_ITD;
+
+
+struct  ehci_isoc_ep_desc {
+    void               *TDTailPtr;
+    USBH_EP            *EPPtr;
+    CPU_INT08U          SMask;
+    CPU_INT08U          CMask;
+    CPU_INT08U          TCnt;
+    CPU_INT08U          AppStartFrame;
+    CPU_INT08U          NbrFrame;
+    CPU_INT16U          FrameInterval;
+    EHCI_ISOC_EP_DESC  *NxtEPDesc;
+};
+
+struct  ehci_isoc_ep_urb {
+    CPU_INT32U          iTD_Addr;
+    CPU_INT08U          AppStartFrame;
+    CPU_INT08U          NbrFrame;
+};
+
+
+typedef  struct  ehci_cap {
+    CPU_INT08U  CapLen;
+    CPU_INT16U  HCIVersion;
+    CPU_INT32U  HCSParams;
+    CPU_INT32U  HCCParams;
+    CPU_INT08U  HCSPPortRoute[15];
+} EHCI_CAP;
+
+
+typedef  struct  ehci_cap_reg {
+    CPU_REG32  CapLen_HCIVersion;
+    CPU_REG32  HCSParams;
+    CPU_REG32  HCCParams;
+    CPU_REG08  HCSPPortRoute[15];
+} EHCI_CAP_REG;
+
+
+typedef  struct  ehci_oper_reg {
+    CPU_REG32  USBCmd;
+    CPU_REG32  USBSts;
+    CPU_REG32  USBIntr;
+    CPU_REG32  FrameIx;
+    CPU_REG32  CtrlDSSeg;
+    CPU_REG32  PeriodicListBase;
+    CPU_REG32  AsyncListAddr;
+    CPU_REG32  Rsvd[9];
+    CPU_REG32  CfgFlag;
+    CPU_REG32  PortSC[1];
+} EHCI_OPER_REG;
+
+
+typedef  struct  ehci_dma {
+    EHCI_QTD    *QTDPtr;                                        /* DMA memory CTRL,BULK and INTR QTD                    */
+    EHCI_QH     *QHPtr;                                         /* DMA memory for Queue Head (QH)                       */
+    EHCI_ITD    *ITDPtr;
+    CPU_INT08U  *BufPtr;
+} EHCI_DMA;
+
+
+struct  ehci_intr_info {
+    CPU_INT08U       IntrPlaceholderIx;                         /* Index of Intr placeholder in QHLists array.          */
+    CPU_INT16U       FrameInterval;
+    USBH_EP         *EpPtr;
+    EHCI_INTR_INFO  *NxtIntrInfo;
+};
+
+
+typedef  struct  ehci_dev {                                     /* -------------------- EHCI Device ------------------- */
+    EHCI_CAP            HcCap;                                  /* Pointer to Capability structure                      */
+    EHCI_DMA            DMA_EHCI;
+    CPU_INT08U          EHCI_HubBuf[sizeof(USBH_HUB_DESC)];
+    EHCI_QH            *AsyncQHHead;                            /* Asynchronous list head                               */
+    CPU_INT08U          NbrPorts;                               /* Number of Ports in RootHub                           */
+    CPU_INT32U         *PeriodicListBase;
+    EHCI_QH            *QHLists[EHCI_INTR_QH_LIST_SIZE];        /* HCD qH placeholder array for Intr ep.                */
+    MEM_POOL            HC_QHPool;                              /* Memory pool for allocating HC QHs                    */
+    MEM_POOL            HC_QTDPool;                             /* Memory pool for allocating HC QTDs                   */
+    MEM_POOL            HC_ITDPool;                             /* Memory pool for allocating HC iTDs                   */
+    MEM_POOL            HC_Isoc_EP_DescPool;                    /* Memory pool for allocating HCD Isoc EP struct        */
+    MEM_POOL            HC_Isoc_EP_URBPool;
+    MEM_POOL            BufPool;
+    MEM_POOL            IntrInfoPool;                           /* Memory pool for allocating Intr info struct.         */
+    CPU_INT32U          PortResetChng;                          /* Port Reset Change status variable                    */
+    EHCI_CAP_REG       *HcCapReg;                               /* Pointer to Host Controller Capability  Registers     */
+    EHCI_OPER_REG      *HcOperReg;                              /* Pointer to Host Controller Operational Registers     */
+    CPU_INT16U          MaxPeriodicBWArr[256][8];               /* Maximum Periodic Bandwidth                           */
+    EHCI_ISOC_EP_DESC  *HeadIsocEPDesc;                         /* Isochronous list head pointer                        */
+    CPU_INT32U          FNOCnt;                                 /* Counter for Frame List Rollover                      */
+    EHCI_INTR_INFO     *HeadIntrInfo;                           /* Intr info list head pointer.                         */
+    CPU_BOOLEAN         HC_Started;                             /* Indicate if EHCI HC is started.                      */
+    CPU_INT08U          DrvType;                                /* Indicate which EHCI drv type.                        */
+} EHCI_DEV;
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_EHCI_MODULE
+#define  USBH_EHCI_EXT
+#else
+#define  USBH_EHCI_EXT  extern
+#endif
+
+USBH_EHCI_EXT  USBH_HC_DRV_API  EHCI_DrvAPI;
+USBH_EHCI_EXT  USBH_HC_DRV_API  EHCI_DrvAPI_Synopsys;
+USBH_EHCI_EXT  USBH_HC_RH_API   EHCI_RH_API;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/HCD/OHCI/usbh_hcd_ohci.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/HCD/OHCI/usbh_hcd_ohci.h
new file mode 100644
index 0000000..e0f0aba
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/HCD/OHCI/usbh_hcd_ohci.h
@@ -0,0 +1,226 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                       The Embedded USB Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        STANDARD OHCI DRIVER
+*
+* File           : usbh_ohci.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+#ifndef  USBH_OHCI_MODULE_PRESENT
+#define  USBH_OHCI_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                              INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../Source/usbh_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                                 EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_OHCI_MODULE
+#define  USBH_OHCI_EXT
+#else
+#define  USBH_OHCI_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                                 DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ----------- OHCI ED LIST NUMBER DEFINES ------------ */
+#define  OHCI_ED_LIST_32MS                                 0u
+#define  OHCI_ED_LIST_16MS                                32u
+#define  OHCI_ED_LIST_08MS                                48u
+#define  OHCI_ED_LIST_04MS                                56u
+#define  OHCI_ED_LIST_02MS                                60u
+#define  OHCI_ED_LIST_01MS                                62u
+#define  OHCI_ED_LIST_CTRL                                63u
+#define  OHCI_ED_LIST_BULK                                64u
+#define  OHCI_ED_LIST_SIZE           (OHCI_ED_LIST_BULK + 1u)
+
+#define  OHCI_MAX_PERIODIC_BW                             90u
+
+
+/*
+*********************************************************************************************************
+*                                               DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  struct  ohci_hcd_td  OHCI_HCD_TD;
+typedef  struct  ohci_hcd_ed  OHCI_HCD_ED;
+
+typedef  struct  ohci_oper_reg {
+    CPU_REG32  Revision;
+    CPU_REG32  Control;
+    CPU_REG32  CommandStatus;
+    CPU_REG32  InterruptStatus;
+    CPU_REG32  InterruptEnable;
+    CPU_REG32  InterruptDisable;
+    CPU_REG32  HCCA;
+    CPU_REG32  PeriodCurrentED;
+    CPU_REG32  ControlHeadED;
+    CPU_REG32  ControlCurrentED;
+    CPU_REG32  BulkHeadED;
+    CPU_REG32  BulkCurrentED;
+    CPU_REG32  DoneHead;
+    CPU_REG32  FmInterval;
+    CPU_REG32  FmRemaining;
+    CPU_REG32  FmNumber;
+    CPU_REG32  PeriodicStart;
+    CPU_REG32  LSThreshold;
+    CPU_REG32  RhDescriptorA;
+    CPU_REG32  RhDescriptorB;
+    CPU_REG32  RhStatus;
+    CPU_REG32  RhPortStatus[1];
+} OHCI_OPER_REG;
+                                                                /* --- HOST CONTROLLER COMMUNICATION AREA DATA TYPE --- */
+typedef  struct  ohci_hcca {
+    CPU_REG32  IntTbl[32];                                      /* Interrupt Table                                      */
+    CPU_REG32  FrameNbr;                                        /* Frame Number                                         */
+    CPU_REG32  DoneHead;                                        /* Done Head                                            */
+    CPU_REG08  Rsvd[116];                                       /* Reserved for future use                              */
+    CPU_REG08  Unknown[4];                                      /* Unused                                               */
+} OHCI_HCCA;
+
+                                                                /* --- HOST CONTROLLER ENDPOINT DESCRIPTOR DATA TYPE -- */
+typedef  struct  ohci_hc_ed {
+    CPU_REG32  Ctrl;                                            /* Endpoint descriptor control                          */
+    CPU_REG32  TailTD;                                          /* Physical address of tail in Transfer descriptor list */
+    CPU_REG32  HeadTD;                                          /* Physcial address of head in Transfer descriptor list */
+    CPU_REG32  Next;                                            /* Physical address of next Endpoint descriptor         */
+} OHCI_HC_ED;
+
+                                                                /* --- HOST CONTROLLER TRANSFER DESCRIPTOR DATA TYPE -- */
+typedef  struct  ohci_hc_td {
+    CPU_REG32  Ctrl;                                            /* Transfer descriptor control                          */
+    CPU_REG32  CurBuf;                                          /* Physical address of current buffer pointer           */
+    CPU_REG32  Next;                                            /* Physical pointer to next Transfer Descriptor         */
+    CPU_REG32  BufEnd;                                          /* Physical address of end of buffer                    */
+    CPU_REG32  Offsets[4];                                      /* Isochronous offsets                                  */
+} OHCI_HC_TD;
+
+                                                                /* --- HOST CONTROLLER ENDPOINT TRANSFER DESCRIPTOR --- */
+struct  ohci_hcd_ed {
+    OHCI_HC_ED   *HC_EDPtr;
+    CPU_INT32U    DMA_HC_ED;
+    OHCI_HCD_TD  *Head_HCD_TDPtr;
+    OHCI_HCD_TD  *Tail_HCD_TDPtr;
+    OHCI_HCD_ED  *NextPtr;
+    CPU_INT32U    ListInterval;
+    CPU_INT32U    BW;
+    CPU_BOOLEAN   IsHalt;
+};
+
+                                                                /* HOST CONTROLLER DRIVER TRANSFER DESCRIPTOR DATA TYPE */
+struct  ohci_hcd_td {
+    OHCI_HC_TD   *HC_TdPtr;
+    CPU_INT32U    DMA_HC_TD;
+    OHCI_HCD_TD  *NextPtr;
+    USBH_URB     *URBPtr;                                       /* URB associated with this TD                          */
+    CPU_REG08     State;
+};
+
+                                                                /* -------------- OHCI DMA Structure ------------------ */
+typedef  struct  ohci_dma {
+    OHCI_HCCA        *HCCAPtr;                                  /* DMA memory HCCA descriptor                           */
+    OHCI_HC_TD       *TDPtr;                                    /* DMA memory CTRL,BULK and INTR endpoint TD            */
+    OHCI_HC_ED       *EDPtr;                                    /* DMA memory for Endpoint Descriptors (ED)             */
+    CPU_INT08U       *BufPtr;
+} OHCI_DMA;
+
+                                                                /* -------------- OHCI DEVICE DATA TYPE --------------- */
+typedef  struct  ohci_dev {
+    OHCI_DMA         DMA_OHCI;
+    CPU_INT08U       OHCI_HubBuf[sizeof(USBH_HUB_DESC)];
+    OHCI_HCD_ED     *EDLists[OHCI_ED_LIST_SIZE];                /* OHCI EndPoint Descriptor Lists                       */
+    CPU_INT08U       CanWakeUp;                                 /* Port Power                                           */
+    CPU_INT08U       NbrPorts;                                  /* Number of Ports in RootHub                           */
+    CPU_INT32U       TotBW;                                     /* Periodic list parameters                             */
+    CPU_INT32U       Branch[32];                                /* Bandwidth of branches                                */
+    MEM_POOL         HC_EDPool;                                 /* Memory pool for allocating DMA ednpoint descriptor   */
+    MEM_POOL         HC_TDPool;                                 /* Memory pool for allocating DMA general TDs           */
+    OHCI_HCD_ED     *HCD_ED;
+    MEM_POOL         HCD_EDPool;                                /* Memory pool for allocating OHCI driver EDs           */
+    OHCI_HCD_TD     *HCD_TD;
+    MEM_POOL         HCD_TDPool;                                /* Memory pool for allocating OHCI driver TDs           */
+    MEM_POOL         BufPool;
+    CPU_INT32U       FrameNbr;
+    OHCI_HCD_TD    **OHCI_Lookup;
+} OHCI_DEV;
+
+
+/*
+*********************************************************************************************************
+*                                            GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+USBH_OHCI_EXT  USBH_HC_DRV_API  OHCI_DrvAPI;
+USBH_OHCI_EXT  USBH_HC_RH_API   OHCI_RH_API;
+
+
+/*
+*********************************************************************************************************
+*                                                 MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_class.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_class.h
new file mode 100644
index 0000000..da046f2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_class.h
@@ -0,0 +1,208 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                       The Embedded USB Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       USB HOST CLASS OPERATIONS
+*
+* File           : usbh_class.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_CLASS_MODULE_PRESENT
+#define  USBH_CLASS_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "usbh_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_CLASS_MODULE
+#define  USBH_CLASS_EXT
+#else
+#define  USBH_CLASS_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         CLASS DEVICE STATE
+*********************************************************************************************************
+*/
+
+#define  USBH_CLASS_DEV_STATE_NONE                         0u
+#define  USBH_CLASS_DEV_STATE_CONN                         1u
+#define  USBH_CLASS_DEV_STATE_DISCONN                      2u
+#define  USBH_CLASS_DEV_STATE_SUSPEND                      3u
+
+
+/*
+*********************************************************************************************************
+*                                          CLASS DRIVER TYPE
+*********************************************************************************************************
+*/
+
+#define  USBH_CLASS_DRV_TYPE_NONE                         0u
+#define  USBH_CLASS_DRV_TYPE_IF_CLASS_DRV                 1u
+#define  USBH_CLASS_DRV_TYPE_DEV_CLASS_DRV                2u
+
+
+/*
+*********************************************************************************************************
+*                                               DATA TYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     CLASS DRIVER API DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  usbh_class_drv {
+    CPU_INT08U    *NamePtr;                                     /* Name of the class driver.                            */
+
+    void         (*GlobalInit) (USBH_ERR  *p_err);              /* Global initialization function.                      */
+
+    void        *(*ProbeDev  ) (USBH_DEV  *p_dev,               /* Probe device descriptor.                             */
+                                USBH_ERR  *p_err);
+
+    void        *(*ProbeIF   ) (USBH_DEV  *p_dev,               /* Probe interface descriptor.                          */
+                                USBH_IF   *p_if,
+                                USBH_ERR  *p_err);
+
+    void         (*Suspend   ) (void      *p_class_dev);        /* Called when bus suspends.                            */
+
+    void         (*Resume    ) (void      *p_class_dev);        /* Called when bus resumes.                             */
+
+    void         (*Disconn   ) (void      *p_class_dev);        /* Called when device is removed.                       */
+};
+
+
+/*
+*********************************************************************************************************
+*                                 CLASS DRIVER NOTIFICATION DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  void  (*USBH_CLASS_NOTIFY_FNCT)(void        *p_class_dev,
+                                         CPU_INT08U   is_conn,
+                                         void        *p_ctx);
+
+
+/*
+*********************************************************************************************************
+*                                 CLASS DRIVER REGISTRATION DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  usbh_class_drv_reg {
+    USBH_CLASS_DRV          *ClassDrvPtr;                       /* Class driver structure                               */
+    USBH_CLASS_NOTIFY_FNCT   NotifyFnctPtr;                     /* Called when device connection status changes         */
+    void                    *NotifyArgPtr;                      /* Context of the notification funtion                  */
+    CPU_INT08U               InUse;
+};
+
+
+/*
+*********************************************************************************************************
+*                                           GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  REGISTERED USB CLASS DRIVERS LIST
+*********************************************************************************************************
+*/
+
+USBH_CLASS_EXT  USBH_CLASS_DRV_REG  USBH_ClassDrvList[USBH_CFG_MAX_NBR_CLASS_DRVS];
+
+
+/*
+*********************************************************************************************************
+*                                                MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+USBH_ERR  USBH_ClassDrvReg    (USBH_CLASS_DRV          *p_class_drv,
+                               USBH_CLASS_NOTIFY_FNCT   class_notify_fnct,
+                               void                    *p_class_notify_ctx);
+
+USBH_ERR  USBH_ClassDrvUnreg  (USBH_CLASS_DRV          *p_class_drv);
+
+void      USBH_ClassSuspend   (USBH_DEV                *p_dev);
+
+void      USBH_ClassResume    (USBH_DEV                *p_dev);
+
+USBH_ERR  USBH_ClassDrvConn   (USBH_DEV                *p_dev);
+
+void      USBH_ClassDrvDisconn(USBH_DEV                *p_dev);
+
+
+/*
+*********************************************************************************************************
+*                                          CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_core.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_core.h
new file mode 100644
index 0000000..c8021e6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_core.h
@@ -0,0 +1,1731 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                       The Embedded USB Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      USB HOST CORE OPERATIONS
+*
+* File           : usbh_core.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_CORE_MODULE_PRESENT
+#define  USBH_CORE_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  "usbh_err.h"
+#include  "usbh_os.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_CORE_MODULE
+#define  USBH_CORE_EXT
+#else
+#define  USBH_CORE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBH_VERSION                                  34103u
+
+#define  USBH_LEN_DESC_HDR                              0x02u
+#define  USBH_LEN_DESC_DEV                              0x12u
+#define  USBH_LEN_DESC_DEV_QUAL                         0x0Au
+#define  USBH_LEN_DESC_CFG                              0x09u
+#define  USBH_LEN_DESC_OTHERSPD_CFG                     0x09u
+#define  USBH_LEN_DESC_IF_ASSOCIATION                   0x08u
+#define  USBH_LEN_DESC_IF                               0x09u
+#define  USBH_LEN_DESC_EP                               0x07u
+#define  USBH_LEN_DESC_OTG                              0x03u
+#define  USBH_LEN_SETUP_PKT                             0x08u
+
+#define  USBH_HUB_TIMEOUT                               5000u
+#define  USBH_HUB_DLY_DEV_RESET                          100u
+#define  USBH_HUB_MAX_DESC_LEN                            72u
+
+#define  USBH_HUB_LEN_HUB_DESC                          0x48u
+#define  USBH_HUB_LEN_HUB_STATUS                        0x04u
+#define  USBH_HUB_LEN_HUB_PORT_STATUS                   0x04u
+
+#define  USBH_HC_NBR_NONE                               0xFFu
+
+
+/*
+*********************************************************************************************************
+*                                       REQUEST CHARACTERISTICS
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.3, Table 9-2.
+*
+*           (2) The 'bmRequestType' field of a setup request is a bit-mapped datum with three subfields :
+*
+*               (a) Bit  7  : Data transfer direction.
+*               (b) Bits 6-5: Type.
+*               (c) Bits 4-0: Recipient.
+*********************************************************************************************************
+*/
+
+#define  USBH_REQ_DIR_MASK                              0x80u
+#define  USBH_REQ_DIR_HOST_TO_DEV                       0x00u
+#define  USBH_REQ_DIR_DEV_TO_HOST                       0x80u
+
+#define  USBH_REQ_TYPE_STD                              0x00u
+#define  USBH_REQ_TYPE_CLASS                            0x20u
+#define  USBH_REQ_TYPE_VENDOR                           0x40u
+#define  USBH_REQ_TYPE_RSVD                             0x60u
+
+#define  USBH_REQ_RECIPIENT_DEV                         0x00u
+#define  USBH_REQ_RECIPIENT_IF                          0x01u
+#define  USBH_REQ_RECIPIENT_EP                          0x02u
+#define  USBH_REQ_RECIPIENT_OTHER                       0x03u
+
+
+/*
+*********************************************************************************************************
+*                                          STANDARD REQUESTS
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.4, Table 9-4.
+*
+*           (2) The 'bRequest' field of a standard setup request may contain one of these values.
+*********************************************************************************************************
+*/
+
+#define  USBH_REQ_GET_STATUS                            0x00u
+#define  USBH_REQ_CLR_FEATURE                           0x01u
+#define  USBH_REQ_SET_FEATURE                           0x03u
+#define  USBH_REQ_SET_ADDR                              0x05u
+#define  USBH_REQ_GET_DESC                              0x06u
+#define  USBH_REQ_SET_DESC                              0x07u
+#define  USBH_REQ_GET_CFG                               0x08u
+#define  USBH_REQ_SET_CFG                               0x09u
+#define  USBH_REQ_GET_IF                                0x0Au
+#define  USBH_REQ_SET_IF                                0x0Bu
+#define  USBH_REQ_SYNCH_FRAME                           0x0Cu
+
+
+/*
+*********************************************************************************************************
+*                                          DESCRIPTOR TYPES
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.4, Table 9-5, and
+*               Section 9.4.3.
+*
+*           (2) For a 'get descriptor' setup request, the low byte of the 'wValue' field may contain
+*               one of these values.
+*********************************************************************************************************
+*/
+
+#define  USBH_DESC_TYPE_DEV                                1u
+#define  USBH_DESC_TYPE_CFG                                2u
+#define  USBH_DESC_TYPE_STR                                3u
+#define  USBH_DESC_TYPE_IF                                 4u
+#define  USBH_DESC_TYPE_EP                                 5u
+#define  USBH_DESC_TYPE_DEV_QUALIFIER                      6u
+#define  USBH_DESC_TYPE_OTHER_SPD_CONFIG                   7u
+#define  USBH_DESC_TYPE_IF_PWR                             8u
+#define  USBH_DESC_TYPE_OTG                                9u
+#define  USBH_DESC_TYPE_IAD                               11u
+
+
+/*
+*********************************************************************************************************
+*                                          FEATURE SELECTORS
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.4, Table 9-6, and
+*               Section 9.4.1.
+*
+*           (2) For a 'clear feature' setup request, the 'wValue' field may contain one of these values.
+*********************************************************************************************************
+*/
+
+#define  USBH_FEATURE_SEL_EP_HALT                          0u
+#define  USBH_FEATURE_SEL_DEV_REMOTE_WAKEUP                1u
+#define  USBH_FEATURE_SEL_TEST_MODE                        2u
+#define  USBH_FEATURE_SEL_B_HNP_EN                         3u
+
+
+/*
+*********************************************************************************************************
+*                                    ENDPOINT TYPES (bmAttributes)
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.6, Table 9-13
+*
+*           (2) In an endpoint descriptor, the 'bmAttributes' value is one of these values.
+*********************************************************************************************************
+*/
+
+#define  USBH_EP_TYPE_MASK                              0x03u
+#define  USBH_EP_TYPE_CTRL                              0x00u
+#define  USBH_EP_TYPE_ISOC                              0x01u
+#define  USBH_EP_TYPE_BULK                              0x02u
+#define  USBH_EP_TYPE_INTR                              0x03u
+                                                                /* Synchronization Type (Bits(3..2)).                   */
+#define  USBH_EP_TYPE_SYNC_NONE                         0x00u
+#define  USBH_EP_TYPE_SYNC_ASYNC                        0x01u
+#define  USBH_EP_TYPE_SYNC_ADAPTIVE                     0x02u
+#define  USBH_EP_TYPE_SYNC_SYNC                         0x03u
+                                                                /* Usage Type (Bits(5..4)).                             */
+#define  USBH_EP_TYPE_USAGE_DATA                        0x00u
+#define  USBH_EP_TYPE_USAGE_FEEDBACK                    0x01u
+#define  USBH_EP_TYPE_USAGE_IMPLICIT_FEEDACK_DATA       0x02u
+
+
+/*
+*********************************************************************************************************
+*                                         ENDPOINT DIRECTION
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.6, Table 9-13
+*
+*           (2) In an endpoint descriptor, the upper bit of 'bEndpointAddress' indicates direction.
+*********************************************************************************************************
+*/
+
+#define  USBH_EP_DIR_MASK                               0x80u
+#define  USBH_EP_DIR_OUT                                0x00u
+#define  USBH_EP_DIR_IN                                 0x80u
+#define  USBH_EP_DIR_NONE                               0x01u
+
+
+/*
+*********************************************************************************************************
+*                                 MAX ENDPOINT SIZE (wMaxPacketSize)
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 5.5 to 5.8
+*               The values come from:
+*               + CONTROL    : Section 5.5.3
+*               + ISOCHRONOUS: Section 5.6.3
+*               + INTERRUPT  : Section 5.7.3
+*               + BULK       : Section 5.8.3
+*
+*           (2) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.6
+*               Bits 12..11 from wMaxPacketSize indicates the number of transaction per microframe.
+*               Valid for high-speed isochronous and interrupt endpoint only.
+*********************************************************************************************************
+*/
+                                                                /* See Note #1                                          */
+#define  USBH_MAX_EP_SIZE_TYPE_CTRL_LS                     8u
+#define  USBH_MAX_EP_SIZE_TYPE_CTRL_FS                    64u
+#define  USBH_MAX_EP_SIZE_TYPE_CTRL_HS                    64u
+#define  USBH_MAX_EP_SIZE_TYPE_BULK_FS                    64u
+#define  USBH_MAX_EP_SIZE_TYPE_BULK_HS                   512u
+#define  USBH_MAX_EP_SIZE_TYPE_INTR_LS                     8u
+#define  USBH_MAX_EP_SIZE_TYPE_INTR_FS                    64u
+#define  USBH_MAX_EP_SIZE_TYPE_INTR_HS                  1024u
+#define  USBH_MAX_EP_SIZE_TYPE_ISOC_FS                  1023u
+#define  USBH_MAX_EP_SIZE_TYPE_ISOC_HS                  1024u
+                                                                /* See Note #2                                          */
+#define  USBH_NBR_TRANSACTION_PER_UFRAME      (DEF_BIT_12 | DEF_BIT_11)
+#define  USBH_1_TRANSACTION_PER_UFRAME                     0u
+#define  USBH_2_TRANSACTION_PER_UFRAME                     1u
+#define  USBH_3_TRANSACTION_PER_UFRAME                     2u
+
+
+/*
+*********************************************************************************************************
+*                                      CONFIGURATION ATTRIBUTES
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.3, Table 9-10
+*
+*           (2) In a configuration descriptor, the 'bmAttributes' value is a bitmap composed of these values.
+*********************************************************************************************************
+*/
+
+#define  USBH_CFG_DESC_SELF_POWERED                     0xC0u
+#define  USBH_CFG_DESC_BUS_POWERED                      0x80u
+#define  USBH_CFG_DESC_REMOTE_WAKEUP                    0x20u
+
+
+/*
+*********************************************************************************************************
+*                                        LANGUAGE IDENTIFIERS
+*
+* Note(s) : (1) See http://www.usb.org/developers/docs/USB_LANGIDs.pdf
+*********************************************************************************************************
+*/
+
+#define  USBH_LANG_ID_ARABIC_SAUDIARABIA              0x0401u
+#define  USBH_LANG_ID_CHINESE_TAIWAN                  0x0404u
+#define  USBH_LANG_ID_ENGLISH_UNITEDSTATES            0x0409u
+#define  USBH_LANG_ID_ENGLISH_UNITEDKINGDOM           0x0809u
+#define  USBH_LANG_ID_FRENCH_STANDARD                 0x040Cu
+#define  USBH_LANG_ID_GERMAN_STANDARD                 0x0407u
+#define  USBH_LANG_ID_GREEK                           0x0408u
+#define  USBH_LANG_ID_ITALIAN_STANDARD                0x0410u
+#define  USBH_LANG_ID_PORTUGUESE_STANDARD             0x0816u
+#define  USBH_LANG_ID_SANSKRIT                        0x044Fu
+
+
+/*
+*********************************************************************************************************
+*                                             CLASS CODES
+*
+* Note(s) : (1) See 'Universal Class Codes', www.usb.org/developers/defined_class.
+*
+*           (2) Except as noted, these should be used ONLY in interface descriptors.
+*
+*               (a) Can only be used in device descriptor.
+*
+*               (b) Can be used in either device or interface descriptor.
+*
+*           (4) Subclass & protocol codes are defined in the relevant class drivers.
+*********************************************************************************************************
+*/
+
+#define  USBH_CLASS_CODE_USE_IF_DESC                    0x00u    /* See Notes #2a.                                      */
+#define  USBH_CLASS_CODE_AUDIO                          0x01u
+#define  USBH_CLASS_CODE_CDC_CTRL                       0x02u    /* See Notes #2b.                                      */
+#define  USBH_CLASS_CODE_HID                            0x03u
+#define  USBH_CLASS_CODE_PHYSICAL                       0x05u
+#define  USBH_CLASS_CODE_IMAGE                          0x06u
+#define  USBH_CLASS_CODE_PRINTER                        0x07u
+#define  USBH_CLASS_CODE_MASS_STORAGE                   0x08u
+#define  USBH_CLASS_CODE_HUB                            0x09u    /* See Notes #2a.                                      */
+#define  USBH_CLASS_CODE_CDC_DATA                       0x0Au
+#define  USBH_CLASS_CODE_SMART_CARD                     0x0Bu
+#define  USBH_CLASS_CODE_CONTENT_SECURITY               0x0Du
+#define  USBH_CLASS_CODE_VIDEO                          0x0Eu
+#define  USBH_CLASS_CODE_PERSONAL_HEALTHCARE            0x0Fu
+#define  USBH_CLASS_CODE_DIAGNOSTIC_DEV                 0xDCu    /* See Notes #2b                                       */
+#define  USBH_CLASS_CODE_WIRELESS_CTRLR                 0xE0u
+#define  USBH_CLASS_CODE_MISCELLANEOUS                  0xEFu    /* See Notes #2b.                                      */
+#define  USBH_CLASS_CODE_APP_SPECIFIC                   0xFEu
+#define  USBH_CLASS_CODE_VENDOR_SPECIFIC                0xFFu    /* See Notes #2b.                                      */
+
+
+/*
+*********************************************************************************************************
+*                                           SUBCLASS CODES
+*
+* Note(s) : (1) See 'Universal Class Codes', www.usb.org/developers/defined_class.
+*
+*           (2) Except as noted, these should be used ONLY in interface descriptors.
+*
+*               (a) Can only be used in device descriptor.
+*
+*               (b) Can be used in either device or interface descriptor.
+*
+*           (4) Subclass & protocol codes are defined in the relevant class drivers.
+*********************************************************************************************************
+*/
+
+#define  USBH_SUBCLASS_CODE_USE_IF_DESC                 0x00u    /* See Notes #2a.                                       */
+#define  USBH_SUBCLASS_CODE_USE_COMMON_CLASS            0x02u    /* See Notes #2a.                                       */
+#define  USBH_SUBCLASS_CODE_VENDOR_SPECIFIC             0xFFu    /* See Notes #2b.                                       */
+
+
+/*
+*********************************************************************************************************
+*                                           PROTOCOL CODES
+*
+* Note(s) : (1) See 'Universal Class Codes', www.usb.org/developers/defined_class.
+*
+*           (2) Except as noted, these should be used ONLY in interface descriptors.
+*
+*               (a) Can only be used in device descriptor.
+*
+*               (b) See "USB Interface Association Descriptor Device Class Code and
+*                   Use Model" Document at www.usb.org/developers/whitepapers/iadclasscode_r10.pdf.
+*
+*               (c) Can be used in either device or interface descriptor.
+*
+*           (4) Subclass & protocol codes are defined in the relevant class drivers.
+*********************************************************************************************************
+*/
+
+#define  USBH_PROTOCOL_CODE_USE_IF_DESC                 0x00u    /* See Notes #2a.                                        */
+#define  USBH_PROTOCOL_CODE_USE_IAD                     0x01u    /* See Notes #2b.                                        */
+#define  USBH_PROTOCOL_CODE_VENDOR_SPECIFIC             0xFFu    /* See Notes #2c.                                        */
+
+
+/*
+*********************************************************************************************************
+*                                  USB SPECIFICATION RELEASE NUMBER
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.1, Table 9-8.
+*
+*           (2) The field "bcdUSB" is part of the device descriptor and indicates the release number of the
+*               USB specification to which the device complies.
+*********************************************************************************************************
+*/
+
+#define  USBH_SPEC_RELEASE_NBR_1_0                      0x0100u
+#define  USBH_SPEC_RELEASE_NBR_1_1                      0x0110u
+#define  USBH_SPEC_RELEASE_NBR_2_0                      0x0200u
+
+
+/*
+********************************************************************************************************
+*                                           OTG HNP AND SRP
+********************************************************************************************************
+*/
+
+#define  USBO_OTG_DESC_HNP                              0x01u   /* Device is HNP capable                                 */
+#define  USBO_OTG_DESC_SRP                              0x02u   /* Device is SRP capable                                 */
+
+
+/*
+*********************************************************************************************************
+*                                         DEFAULT LANGUAGE ID
+*********************************************************************************************************
+*/
+
+#define  USBH_STRING_DESC_LANGID                        0x00u
+
+
+/*
+*********************************************************************************************************
+*                                             HOST STATE
+*********************************************************************************************************
+*/
+
+#define  USBH_HOST_STATE_NONE                              0u
+#define  USBH_HOST_STATE_READY                             1u
+#define  USBH_HOST_STATE_SUSPENDED                         2u
+#define  USBH_HOST_STATE_RESUMED                           3u
+
+
+/*
+*********************************************************************************************************
+*                                              URB STATE
+*********************************************************************************************************
+*/
+
+#define  USBH_URB_STATE_NONE                               0u
+#define  USBH_URB_STATE_SCHEDULED                          1u
+#define  USBH_URB_STATE_QUEUED                             2u
+#define  USBH_URB_STATE_ABORTED                            3u
+
+
+/*
+*********************************************************************************************************
+*                                              USB TOKEN
+*********************************************************************************************************
+*/
+
+#define  USBH_TOKEN_SETUP                                  0u
+#define  USBH_TOKEN_OUT                                    1u
+#define  USBH_TOKEN_IN                                     2u
+
+
+/*
+*********************************************************************************************************
+*                                          USB DEV + RH DEV
+*********************************************************************************************************
+*/
+
+#define  USBH_MAX_NBR_DEVS                          USBH_CFG_MAX_NBR_DEVS + USBH_CFG_MAX_NBR_HC
+
+
+/*
+*********************************************************************************************************
+*                                        HUB STANDARD REQUESTS
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 11.24.2, Table 11-16.
+*
+*           (2) The 'bRequest' field of a class-specific setup request may contain one of these values.
+*********************************************************************************************************
+*/
+
+#define  USBH_HUB_REQ_GET_STATUS                        0x00u
+#define  USBH_HUB_REQ_CLR_FEATURE                       0x01u
+#define  USBH_HUB_REQ_SET_FEATURE                       0x03u
+#define  USBH_HUB_REQ_GET_DESC                          0x06u
+#define  USBH_HUB_REQ_SET_DESC                          0x07u
+#define  USBH_HUB_REQ_CLR_TT_BUF                        0x08u
+#define  USBH_HUB_REQ_RESET_TT                          0x09u
+#define  USBH_HUB_REQ_GET_TT_STATE                      0x0Au
+#define  USBH_HUB_REQ_STOP_TT                           0x0Bu
+
+
+/*
+*********************************************************************************************************
+*                                        HUB DESCRIPTOR TYPES
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 11.23.2, Table 11-13.
+*
+*           (2) For a 'get descriptor' setup request, the low byte of the 'wValue' field may contain
+*               one of these values.
+*********************************************************************************************************
+*/
+
+#define  USBH_HUB_DESC_TYPE_HUB                         0x29u
+
+
+/*
+*********************************************************************************************************
+*                                        HUB FEATURE SELECTORS
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 11.24.2, Table 11-17.
+*
+*           (2) For a 'clear feature' setup request, the 'wValue' field may contain one of these values.
+*********************************************************************************************************
+*/
+
+#define  USBH_HUB_FEATURE_SEL_C_HUB_LOCAL_PWR              0u
+#define  USBH_HUB_FEATURE_SEL_C_HUB_OVER_CUR               1u
+
+#define  USBH_HUB_FEATURE_SEL_PORT_CONN                    0u
+#define  USBH_HUB_FEATURE_SEL_PORT_EN                      1u
+#define  USBH_HUB_FEATURE_SEL_PORT_SUSPEND                 2u
+#define  USBH_HUB_FEATURE_SEL_PORT_OVER_CUR                3u
+#define  USBH_HUB_FEATURE_SEL_PORT_RESET                   4u
+#define  USBH_HUB_FEATURE_SEL_PORT_PWR                     8u
+#define  USBH_HUB_FEATURE_SEL_PORT_LOW_SPD                 9u
+#define  USBH_HUB_FEATURE_SEL_C_PORT_CONN                  16u
+#define  USBH_HUB_FEATURE_SEL_C_PORT_EN                    17u
+#define  USBH_HUB_FEATURE_SEL_C_PORT_SUSPEND               18u
+#define  USBH_HUB_FEATURE_SEL_C_PORT_OVER_CUR              19u
+#define  USBH_HUB_FEATURE_SEL_C_PORT_RESET                 20u
+#define  USBH_HUB_FEATURE_SEL_PORT_TEST                    21u
+#define  USBH_HUB_FEATURE_SEL_PORT_INDICATOR               22u
+
+
+/*
+*********************************************************************************************************
+*                                        HUB PORT STATUS BITS
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 11.24.2.7.1, Table 11-21.
+*********************************************************************************************************
+*/
+
+#define  USBH_HUB_STATUS_PORT_CONN                    0x0001u
+#define  USBH_HUB_STATUS_PORT_EN                      0x0002u
+#define  USBH_HUB_STATUS_PORT_SUSPEND                 0x0004u
+#define  USBH_HUB_STATUS_PORT_OVER_CUR                0x0008u
+#define  USBH_HUB_STATUS_PORT_RESET                   0x0010u
+#define  USBH_HUB_STATUS_PORT_PWR                     0x0100u
+#define  USBH_HUB_STATUS_PORT_LOW_SPD                 0x0200u
+#define  USBH_HUB_STATUS_PORT_FULL_SPD                0x0000u
+#define  USBH_HUB_STATUS_PORT_HIGH_SPD                0x0400u
+#define  USBH_HUB_STATUS_PORT_TEST                    0x0800u
+#define  USBH_HUB_STATUS_PORT_INDICATOR               0x1000u
+
+
+/*
+*********************************************************************************************************
+*                                     HUB PORT STATUS CHANGE BITS
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 11.24.2.7.2, Table 11-22.
+*********************************************************************************************************
+*/
+
+#define  USBH_HUB_STATUS_C_PORT_CONN                  0x0001u
+#define  USBH_HUB_STATUS_C_PORT_EN                    0x0002u
+#define  USBH_HUB_STATUS_C_PORT_SUSPEND               0x0004u
+#define  USBH_HUB_STATUS_C_PORT_OVER_CUR              0x0008u
+#define  USBH_HUB_STATUS_C_PORT_RESET                 0x0010u
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT08U  USBH_EP_TYPE;
+typedef  CPU_INT08U  USBH_EP_DIR;
+typedef  CPU_INT08U  USBH_HOST_STATE;
+typedef  CPU_INT08U  USBH_DEV_STATE;
+typedef  CPU_INT08U  USBH_CLASS_DEV_STATE;
+typedef  CPU_INT08U  USBH_EP_STATE;
+typedef  CPU_INT08U  USBH_TOKEN;
+
+
+/*
+*********************************************************************************************************
+*                                        FORWARD DECLARATIONS
+*********************************************************************************************************
+*/
+
+typedef         struct  usbh_host           USBH_HOST;
+typedef         struct  usbh_hub_dev        USBH_HUB_DEV;
+typedef         struct  usbh_dev            USBH_DEV;
+typedef         struct  usbh_cfg            USBH_CFG;
+typedef         struct  usbh_if             USBH_IF;
+typedef         struct  usbh_ep             USBH_EP;
+typedef         struct  usbh_urb            USBH_URB;
+
+typedef  const  struct  usbh_class_drv      USBH_CLASS_DRV;
+typedef         struct  usbh_class_drv_reg  USBH_CLASS_DRV_REG;
+
+typedef         struct  usbh_hc             USBH_HC;
+typedef         struct  usbh_hc_drv         USBH_HC_DRV;
+typedef  const  struct  usbh_hc_cfg         USBH_HC_CFG;
+typedef  const  struct  usbh_hc_drv_api     USBH_HC_DRV_API;
+typedef  const  struct  usbh_hc_bsp_api     USBH_HC_BSP_API;
+typedef  const  struct  usbh_hc_rh_api      USBH_HC_RH_API;
+
+
+/*
+*********************************************************************************************************
+*                                             DEVICE SPEED
+*********************************************************************************************************
+*/
+
+typedef enum  usbh_dev_spd {
+    USBH_DEV_SPD_NONE = 0,
+    USBH_DEV_SPD_LOW  = 1,
+    USBH_DEV_SPD_FULL = 2,
+    USBH_DEV_SPD_HIGH = 3
+} USBH_DEV_SPD;
+
+
+/*
+*********************************************************************************************************
+*                                      HUB PORT STATUS DATA TYPE
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 11.24.2.7.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_hub_port_status {
+    CPU_INT16U  wPortStatus;
+    CPU_INT16U  wPortChange;
+} USBH_HUB_PORT_STATUS;
+
+
+/*
+*********************************************************************************************************
+*                                   USB HOST CONTROLLER DRIVER API
+*********************************************************************************************************
+*/
+
+struct  usbh_hc_drv_api {
+    void          (*Init)        (USBH_HC_DRV  *p_hc_drv,       /* Initialize HC.                                       */
+                                  USBH_ERR     *p_err);
+
+    void          (*Start)       (USBH_HC_DRV  *p_hc_drv,       /* Start HC.                                            */
+                                  USBH_ERR     *p_err);
+
+    void          (*Stop)        (USBH_HC_DRV  *p_hc_drv,       /* Stop  HC.                                            */
+                                  USBH_ERR     *p_err);
+
+    USBH_DEV_SPD  (*SpdGet)      (USBH_HC_DRV  *p_hc_drv,       /* Get HC speed.                                        */
+                                  USBH_ERR     *p_err);
+
+    void          (*Suspend)     (USBH_HC_DRV  *p_hc_drv,       /* Suspend HC.                                          */
+                                  USBH_ERR     *p_err);
+
+    void          (*Resume)      (USBH_HC_DRV  *p_hc_drv,       /* Resume HC.                                           */
+                                  USBH_ERR     *p_err);
+
+    CPU_INT32U    (*FrmNbrGet)   (USBH_HC_DRV  *p_hc_drv,       /* Get HC frame number.                                 */
+                                  USBH_ERR     *p_err);
+
+    void          (*EP_Open)     (USBH_HC_DRV  *p_hc_drv,       /* Open endpoint.                                       */
+                                  USBH_EP      *p_ep,
+                                  USBH_ERR     *p_err);
+
+    void          (*EP_Close)    (USBH_HC_DRV  *p_hc_drv,       /* Close endpoint.                                      */
+                                  USBH_EP      *p_ep,
+                                  USBH_ERR     *p_err);
+
+    void          (*EP_Abort)    (USBH_HC_DRV  *p_hc_drv,       /* Abort all pending URB on an endpoint.                */
+                                  USBH_EP      *p_ep,
+                                  USBH_ERR     *p_err);
+
+    CPU_BOOLEAN   (*EP_IsHalt)   (USBH_HC_DRV  *p_hc_drv,       /* Get endpoint halt status.                            */
+                                  USBH_EP      *p_ep,
+                                  USBH_ERR     *p_err);
+
+    void          (*URB_Submit)  (USBH_HC_DRV  *p_hc_drv,       /* Submit a URB.                                        */
+                                  USBH_URB     *p_urb,
+                                  USBH_ERR     *p_err);
+
+    void          (*URB_Complete)(USBH_HC_DRV  *p_hc_drv,       /* Complete a URB.                                      */
+                                  USBH_URB     *p_urb,
+                                  USBH_ERR     *p_err);
+
+    void          (*URB_Abort)   (USBH_HC_DRV  *p_hc_drv,       /* Abort a URB.                                         */
+                                  USBH_URB     *p_urb,
+                                  USBH_ERR     *p_err);
+};
+
+
+/*
+*********************************************************************************************************
+*                               USB HOST CONTROLLER ROOT HUB DRIVER API
+*********************************************************************************************************
+*/
+
+struct  usbh_hc_rh_api {
+                                                                /* Get port status.                                     */
+    CPU_BOOLEAN  (*PortStatusGet)   (USBH_HC_DRV           *p_hc_drv,
+                                     CPU_INT08U             port_nbr,
+                                     USBH_HUB_PORT_STATUS  *p_port_status);
+
+                                                                /* Get RH descriptor.                                   */
+    CPU_BOOLEAN  (*HubDescGet)      (USBH_HC_DRV           *p_hc_drv,
+                                     void                  *p_buf,
+                                     CPU_INT08U             buf_len);
+
+                                                                /* Set port enable.                                     */
+    CPU_BOOLEAN  (*PortEnSet)       (USBH_HC_DRV           *p_hc_drv,
+                                     CPU_INT08U             port_nbr);
+
+                                                                /* Clear port enable.                                   */
+    CPU_BOOLEAN  (*PortEnClr)       (USBH_HC_DRV           *p_hc_drv,
+                                     CPU_INT08U             port_nbr);
+
+                                                                /* Clear port enable change.                            */
+    CPU_BOOLEAN  (*PortEnChngClr)   (USBH_HC_DRV           *p_hc_drv,
+                                     CPU_INT08U             port_nbr);
+
+                                                                /* Set port power.                                      */
+    CPU_BOOLEAN  (*PortPwrSet)      (USBH_HC_DRV           *p_hc_drv,
+                                     CPU_INT08U             port_nbr);
+
+                                                                /* Clear port power.                                    */
+    CPU_BOOLEAN  (*PortPwrClr)      (USBH_HC_DRV           *p_hc_drv,
+                                     CPU_INT08U             port_nbr);
+
+                                                                /* Set port reset.                                      */
+    CPU_BOOLEAN  (*PortResetSet)    (USBH_HC_DRV           *p_hc_drv,
+                                     CPU_INT08U             port_nbr);
+
+                                                                /* Clear port reset change.                             */
+    CPU_BOOLEAN  (*PortResetChngClr)(USBH_HC_DRV           *p_hc_drv,
+                                     CPU_INT08U             port_nbr);
+
+                                                                /* Clear port suspend.                                  */
+    CPU_BOOLEAN  (*PortSuspendClr)  (USBH_HC_DRV           *p_hc_drv,
+                                     CPU_INT08U             port_nbr);
+
+                                                                /* Clear port connection change.                        */
+    CPU_BOOLEAN  (*PortConnChngClr) (USBH_HC_DRV           *p_hc_drv,
+                                     CPU_INT08U             port_nbr);
+
+                                                                /* Enable RH interrupt.                                 */
+    CPU_BOOLEAN  (*IntEn)           (USBH_HC_DRV           *p_hc_drv);
+
+                                                                /* Disable RH interrupt.                                */
+    CPU_BOOLEAN  (*IntDis)          (USBH_HC_DRV           *p_hc_drv);
+};
+
+
+/*
+*********************************************************************************************************
+*                                     USB HOST CONTROLLER BSP API
+*********************************************************************************************************
+*/
+
+struct  usbh_hc_bsp_api {
+    void  (*Init)       (USBH_HC_DRV   *p_hc_drv,               /* Init BSP.                                            */
+                         USBH_ERR      *p_err);
+
+    void  (*ISR_Reg)    (CPU_FNCT_PTR   isr_fnct,               /* Register ISR.                                        */
+                         USBH_ERR      *p_err);
+
+    void  (*ISR_Unreg)  (USBH_ERR      *p_err);                 /* Unregister ISR.                                      */
+};
+
+
+/*
+*********************************************************************************************************
+*                                           HUB DESCRIPTOR
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 11.23.2.1.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_hub_desc {
+    CPU_INT08U  bDescLength;
+    CPU_INT08U  bDescriptorType;
+    CPU_INT08U  bNbrPorts;
+    CPU_INT16U  wHubCharacteristics;
+    CPU_INT08U  bPwrOn2PwrGood;
+    CPU_INT08U  bHubContrCurrent;
+    CPU_INT08U  DeviceRemovable;
+    CPU_INT32U  PortPwrCtrlMask[USBH_CFG_MAX_HUB_PORTS];
+} USBH_HUB_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                             HUB STATUS
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 11.24.2.6.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_hub_status {
+    CPU_INT16U  wHubStatus;
+    CPU_INT16U  wHubChange;
+} USBH_HUB_STATUS;
+
+
+/*
+*********************************************************************************************************
+-                                            SETUP REQUEST
+-
+- Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.3, Table 9-2.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_setup_req {
+    CPU_INT08U  bmRequestType;
+    CPU_INT08U  bRequest;
+    CPU_INT16U  wValue;
+    CPU_INT16U  wIndex;
+    CPU_INT16U  wLength;
+} USBH_SETUP_REQ;
+
+
+/*
+*********************************************************************************************************
+*                                          DESCRIPTOR HEADER
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_desc_hdr {
+    CPU_INT08U  bLength;
+    CPU_INT08U  bDescriptorType;
+} USBH_DESC_HDR;
+
+
+/*
+*********************************************************************************************************
+*                                          DEVICE DESCRIPTOR
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.1, Table 9-8.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_dev_desc {
+    CPU_INT08U  bLength;
+    CPU_INT08U  bDescriptorType;
+    CPU_INT16U  bcdUSB;
+    CPU_INT08U  bDeviceClass;
+    CPU_INT08U  bDeviceSubClass;
+    CPU_INT08U  bDeviceProtocol;
+    CPU_INT08U  bMaxPacketSize0;
+    CPU_INT16U  idVendor;
+    CPU_INT16U  idProduct;
+    CPU_INT16U  bcdDevice;
+    CPU_INT08U  iManufacturer;
+    CPU_INT08U  iProduct;
+    CPU_INT08U  iSerialNumber;
+    CPU_INT08U  bNbrConfigurations;
+} USBH_DEV_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                     DEVICE QUALIFIER DESCRIPTOR
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.2, Table 9-9.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_dev_qualifier_desc {
+    CPU_INT08U  bLength;
+    CPU_INT08U  bDescriptorType;
+    CPU_INT16U  bcdUSB;
+    CPU_INT08U  bDeviceClass;
+    CPU_INT08U  bDeviceSubClass;
+    CPU_INT08U  bDeviceProtocol;
+    CPU_INT08U  bMaxPacketSize0;
+    CPU_INT08U  bNbrConfigurations;
+    CPU_INT08U  bReserved;
+} USBH_DEV_QUALIFIER_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                      CONFIGURATION DESCRIPTOR
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.3, Table 9-10.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_cfg_desc {
+    CPU_INT08U  bLength;
+    CPU_INT08U  bDescriptorType;
+    CPU_INT16U  wTotalLength;
+    CPU_INT08U  bNbrInterfaces;
+    CPU_INT08U  bConfigurationValue;
+    CPU_INT08U  iConfiguration;
+    CPU_INT08U  bmAttributes;
+    CPU_INT08U  bMaxPower;
+} USBH_CFG_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                OTHER SPEED CONFIGURATION DESCRIPTOR
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.4, Table 9-11.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_other_spd_cfg_desc {
+    CPU_INT08U  bLength;
+    CPU_INT08U  bDescriptorType;
+    CPU_INT16U  wTotalLength;
+    CPU_INT08U  bNbrInterfaces;
+    CPU_INT08U  bConfigurationValue;
+    CPU_INT08U  iConfiguration;
+    CPU_INT08U  bmAttributes;
+    CPU_INT08U  bMaxPower;
+} USBH_OTHER_SPD_CFG_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                        INTERFACE DESCRIPTOR
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.5, Table 9-12.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_if_desc {
+    CPU_INT08U  bLength;
+    CPU_INT08U  bDescriptorType;
+    CPU_INT08U  bInterfaceNumber;
+    CPU_INT08U  bAlternateSetting;
+    CPU_INT08U  bNbrEndpoints;
+    CPU_INT08U  bInterfaceClass;
+    CPU_INT08U  bInterfaceSubClass;
+    CPU_INT08U  bInterfaceProtocol;
+    CPU_INT08U  iInterface;
+} USBH_IF_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                  INTERFACE ASSOCIATION DESCRIPTOR
+*
+* Note(s) : (1) See 'www.usb.org/developers/doc/InterfaceAssociationDescriptor_ecn.pdf', Section 9.X.Y, Table 9-Z.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_if_association_desc {
+    CPU_INT08U  bLength;
+    CPU_INT08U  bDescriptorType;
+    CPU_INT08U  bFirstInterface;
+    CPU_INT08U  bInterfaceCount;
+    CPU_INT08U  bFunctionClass;
+    CPU_INT08U  bFunctionSubClass;
+    CPU_INT08U  bFunctionProtocol;
+    CPU_INT08U  iFunction;
+} USBH_IF_ASSOCIATION_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                         ENDPOINT DESCRIPTOR
+*
+* Note(s) : (1) See 'Universal Serial Bus Specification Revision 2.0', Section 9.6.6, Table 9-14.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_ep_desc {
+    CPU_INT08U  bLength;
+    CPU_INT08U  bDescriptorType;
+    CPU_INT08U  bEndpointAddress;
+    CPU_INT08U  bmAttributes;
+    CPU_INT16U  wMaxPacketSize;
+    CPU_INT08U  bInterval;
+    CPU_INT08U  bRefresh;
+    CPU_INT08U  bSynchAddress;
+} USBH_EP_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                           OTG DESCRIPTOR
+*
+* Note(s) : (1) See 'On-The-Go Specification Revision 1.3', Section 6.4, Table 6-1.
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_otg_desc {
+    CPU_INT08U  bLength;
+    CPU_INT08U  bDescriptorType;
+    CPU_INT08U  bmAttributes;
+} USBH_OTG_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                       ISOCHRONOUS DESCRIPTOR
+*********************************************************************************************************
+*/
+
+typedef  struct  usbh_isoc_desc {
+    CPU_INT08U  *BufPtr;
+    CPU_INT32U   BufLen;
+    CPU_INT32U   StartFrm;
+    CPU_INT32U   NbrFrm;
+    CPU_INT16U  *FrmLen;
+    USBH_ERR    *FrmErr;
+} USBH_ISOC_DESC;
+
+
+/*
+*********************************************************************************************************
+*                                 USB REQUEST BLOCK (URB) INFORMATION
+*********************************************************************************************************
+*/
+
+struct  usbh_urb {
+              CPU_REG08        State;                           /* State of URB.                                        */
+              USBH_EP         *EP_Ptr;                          /* EP the urb belongs to.                               */
+    volatile  USBH_ERR         Err;                             /* The status of URB completion.                        */
+
+              void            *UserBufPtr;                      /* Ptr to buf supplied by app.                          */
+              CPU_INT32U       UserBufLen;                      /* Buf len in bytes.                                    */
+              void            *DMA_BufPtr;                      /* DMA buf ptr used by DMA HW.                          */
+              CPU_INT32U       DMA_BufLen;                      /* DMA buf len.                                         */
+              CPU_INT32U       XferLen;                         /* Actual len xfer'd by ctrlr.                          */
+
+              USBH_ISOC_DESC  *IsocDescPtr;                     /* Isoc xfer desc.                                      */
+
+              void            *FnctPtr;                         /* Fnct ptr, called when I/O is completed.              */
+              void            *FnctArgPtr;                      /* Fnct context.                                        */
+
+              void            *ArgPtr;                          /* HCD private data.                                    */
+
+              USBH_TOKEN       Token;                           /* Token (SETUP, IN, or OUT).                           */
+
+              CPU_BOOLEAN      URB_DoneSignal;
+              USBH_URB        *AsyncURB_NxtPtr;                 /* Ptr to next URB (if any).                            */
+              USBH_URB        *NxtPtr;                          /* Used for URB chained list in async task.             */
+
+              USBH_HSEM        Sem;                             /* Sem to wait on I/O completion.                       */
+};
+
+
+/*
+*********************************************************************************************************
+*                                        ENDPOINT INFORMATION
+*********************************************************************************************************
+*/
+
+struct  usbh_ep {
+    USBH_DEV_SPD   DevSpd;                                      /* USB dev spd.                                         */
+    CPU_INT08U     DevAddr;                                     /* USB dev addr.                                        */
+    USBH_DEV      *DevPtr;                                      /* Ptr to USB dev struct.                               */
+    USBH_EP_DESC   Desc;                                        /* EP desc.                                             */
+    CPU_INT16U     Interval;                                    /* EP interval.                                         */
+    CPU_INT32U     HC_RefFrame;                                 /* Initial HC ref frame nbr.                            */
+    void          *ArgPtr;                                      /* HCD private data.                                    */
+    USBH_URB       URB;                                         /* URB used for data xfer on this endpoint.             */
+    USBH_HMUTEX    Mutex;                                       /* Mutex for I/O access serialization on this EP.       */
+    CPU_BOOLEAN    IsOpen;                                      /* EP state.                                            */
+    CPU_INT32U     XferNbrInProgress;                           /* Nbr of URB(s) in progress. Used for async omm.       */
+};
+
+
+/*
+*********************************************************************************************************
+*                                        INTERFACE INFORMATION
+*********************************************************************************************************
+*/
+
+struct  usbh_if {
+    USBH_DEV            *DevPtr;                                /* Ptr to USB dev.                                      */
+    CPU_INT08U           AltIxSel;                              /* Selected alternate setting ix.                       */
+    void                *ClassDevPtr;                           /* Ptr to class dev created by class drv.               */
+    USBH_CLASS_DRV_REG  *ClassDrvRegPtr;                        /* Ptr to class drv registered for this IF.             */
+    CPU_INT08U          *IF_DataPtr;                            /* Buf pointer containing IF data.                      */
+    CPU_INT16U           IF_DataLen;                            /* Buf len.                                             */
+};
+
+
+/*
+*********************************************************************************************************
+*                                      CONFIGURATION INFORMATION
+*********************************************************************************************************
+*/
+
+struct  usbh_cfg {
+    CPU_INT08U  CfgData[USBH_CFG_MAX_CFG_DATA_LEN];             /* Buf containing cfg desc data.                        */
+    CPU_INT16U  CfgDataLen;                                     /* Cfg desc data len.                                   */
+    USBH_IF     IF_List[USBH_CFG_MAX_NBR_IFS];                  /* Device IFs.                                          */
+};
+
+
+/*
+*********************************************************************************************************
+*                                         DEVICE INFORMATION
+*********************************************************************************************************
+*/
+
+struct  usbh_dev {
+    USBH_HC             *HC_Ptr;                                /* Ptr to HC struct.                                    */
+    CPU_INT08U           DevAddr;                               /* USB dev addr assigned by host.                       */
+    USBH_DEV_SPD         DevSpd;                                /* Dev spd (low, full or high).                         */
+    USBH_EP              DfltEP;                                /* Dflt ctrl EP.                                        */
+    USBH_HMUTEX          DfltEP_Mutex;                          /* Dev dflt EP mutex.                                   */
+    CPU_INT16U           LangID;                                /* Language ID used by the str desc.                    */
+    void                *ClassDevPtr;                           /* Ptr to class dev created by class drv.               */
+    USBH_CLASS_DRV_REG  *ClassDrvRegPtr;                        /* Ptr to class drv managing this dev.                  */
+    CPU_INT08U           DevDesc[USBH_LEN_DESC_DEV];            /* Dev desc.                                            */
+    USBH_CFG             CfgList[USBH_CFG_MAX_NBR_CFGS];        /* Dev cfg.                                             */
+    CPU_INT08U           SelCfg;                                /* Selected dev cfg nbr.                                */
+    USBH_DEV            *HubDevPtr;                             /* Ptr to up stream hub dev struct.                     */
+    CPU_INT32U           PortNbr;                               /* Port nbr to which this dev is connected.             */
+    CPU_BOOLEAN          IsRootHub;                             /* Indicate if this is a RH dev.                        */
+    USBH_HUB_DEV        *HubHS_Ptr;                             /* Ptr to prev HS Hub.                                  */
+};
+
+
+/*
+*********************************************************************************************************
+*                                             HUB DEVICE
+*********************************************************************************************************
+*/
+
+struct  usbh_hub_dev {
+    USBH_EP         IntrEP;                                     /* Intr EP to recv events from hub.                     */
+    USBH_HUB_DESC   Desc;                                       /* Hub desc.                                            */
+    USBH_DEV       *DevPtrList[USBH_CFG_MAX_HUB_PORTS];         /* Ptrs to USB devs connected to this hub.              */
+    USBH_DEV       *DevPtr;                                     /* USB dev ptr of the hub IF.                           */
+    USBH_IF        *IF_Ptr;                                     /* HUB IF ptr.                                          */
+    CPU_INT08U      HubIntrBuf[64];                             /* Buf to recv hub events.                              */
+    CPU_INT32U      ErrCnt;
+    CPU_INT08U      State;
+    CPU_INT08U      RefCnt;
+    USBH_HUB_DEV   *NxtPtr;
+};
+
+
+/*
+*********************************************************************************************************
+*                                 HOST CONTROLLER DRIVER INFORMATION
+*********************************************************************************************************
+*/
+
+struct  usbh_hc_drv {
+    CPU_INT08U        Nbr;                                      /* HC nbr.                                              */
+    void             *DataPtr;                                  /* Drv's data.                                          */
+    USBH_DEV         *RH_DevPtr;                                /* Ptr to RH dev struct.                                */
+    USBH_HC_CFG      *HC_CfgPtr;                                /* Ptr to HC config struct.                             */
+    USBH_HC_DRV_API  *API_Ptr;                                  /* Ptr to HC drv API struct.                            */
+    USBH_HC_RH_API   *RH_API_Ptr;                               /* Ptr to RH drv API struct.                            */
+    USBH_HC_BSP_API  *BSP_API_Ptr;                              /* Ptr to HC BSP API struct.                            */
+};
+
+
+/*
+*********************************************************************************************************
+*                                    HOST CONTROLLER CONFIGURATION
+*********************************************************************************************************
+*/
+
+struct  usbh_hc_cfg {
+    CPU_ADDR     BaseAddr;                                      /* HC reg's base addr.                                  */
+    CPU_ADDR     DedicatedMemAddr;                              /* Start addr of HC's dedicated mem.                    */
+    CPU_INT32U   DedicatedMemSize;                              /* Size of HC's dedicated mem.                          */
+    CPU_BOOLEAN  DataBufFromSysMemEn;                           /* Indicate if HC can access sys mem.                   */
+    CPU_INT32U   DataBufMaxLen;                                 /* Max len of data buf.                                 */
+    CPU_INT32U   MaxNbrEP_BulkOpen;                             /* Max nbr of opened bulk EP.                           */
+    CPU_INT32U   MaxNbrEP_IntrOpen;                             /* Max nbr of opened intr EP.                           */
+    CPU_INT32U   MaxNbrEP_IsocOpen;                             /* Max nbr of opened isoc EP.                           */
+};
+
+
+/*
+*********************************************************************************************************
+*                                HOST CONTROLLER INFORMATION DATA TYPE
+*********************************************************************************************************
+*/
+
+struct usbh_hc {
+    USBH_HC_DRV    HC_Drv;                                      /* Host Controller driver (HCD) info.                   */
+    USBH_HOST     *HostPtr;                                     /* Host structure.                                      */
+    USBH_HUB_DEV  *RH_ClassDevPtr;                              /* Root Hub class device pointer.                       */
+    USBH_HMUTEX    HCD_Mutex;                                   /* Mutex to sync access to HCD.                         */
+    CPU_BOOLEAN    IsVirRootHub;                                /* Indicate if RH is virtual.                           */
+};
+
+
+/*
+*********************************************************************************************************
+*                                     HOST INFORMATION DATA TYPE
+*********************************************************************************************************
+*/
+
+struct  usbh_host {
+    USBH_HOST_STATE  State;                                     /* State of USB host stack.                             */
+
+    USBH_DEV         DevList[USBH_MAX_NBR_DEVS];                /* List of USB dev connected.                           */
+    MEM_POOL         DevPool;                                   /* Pool for mem mgmt of USB devs.                       */
+    MEM_POOL         IsocDescPool;
+    USBH_ISOC_DESC   IsocDesc[USBH_CFG_MAX_ISOC_DESC];
+    MEM_POOL         AsyncURB_Pool;                             /* Pool of extra URB when using async comm.             */
+
+    USBH_HC          HC_Tbl[USBH_CFG_MAX_NBR_HC];               /* Array of HC structs.                                 */
+    CPU_INT08U       HC_NbrNext;
+
+    USBH_HTASK       HAsyncTask;                                /* Async task handle.                                   */
+    USBH_HTASK       HHubTask;                                  /* Hub event task handle.                               */
+};
+
+
+/*
+*********************************************************************************************************
+*                                       KERNEL TASK INFORMATION
+*********************************************************************************************************
+*/
+
+typedef  const  struct  usbh_kernel_task_info {
+    CPU_INT32U   Prio;
+    void        *StackPtr;
+    CPU_INT32U   StackSize;
+} USBH_KERNEL_TASK_INFO;
+
+
+/*
+*********************************************************************************************************
+*                                   XFER COMPLETE NOTIFICATION FNCT
+*********************************************************************************************************
+*/
+
+typedef  void  (*USBH_ISOC_CMPL_FNCT)(USBH_EP     *p_ep,
+                                      CPU_INT08U  *p_buf,
+                                      CPU_INT32U   buf_len,
+                                      CPU_INT32U   cur_xfer_len,
+                                      CPU_INT32U   start_frm,
+                                      CPU_INT32U   nbr_frm,
+                                      CPU_INT16U  *p_frm_len,
+                                      USBH_ERR    *p_frm_err,
+                                      void        *p_arg,
+                                      USBH_ERR     err);
+
+typedef  void  (*USBH_XFER_CMPL_FNCT)(USBH_EP     *p_ep,
+                                      void        *p_buf,
+                                      CPU_INT32U   buf_len,
+                                      CPU_INT32U   xfer_len,
+                                      void        *p_arg,
+                                      USBH_ERR     err);
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                    USB STANDARD FUNCTION MACROS
+*********************************************************************************************************
+*/
+
+#define  USBH_CLR_FEATURE(p_dev, rcpt, feature, value, index, p_err)        USBH_CtrlTx((p_dev),                                                      \
+                                                                                        (USBH_REQ_CLR_FEATURE),                                       \
+                                                                                        (rcpt),                                                       \
+                                                                                        (value),                                                      \
+                                                                                        (index),                                                      \
+                                                                                        (void *)0,                                                    \
+                                                                                         0u,                                                          \
+                                                                                        (USBH_CFG_STD_REQ_TIMEOUT),                                   \
+                                                                                        (p_err))
+
+#define  USBH_SET_FEATURE(p_dev, rcpt, feature, value, index, p_err)        USBH_CtrlTx((p_dev),                                                      \
+                                                                                        (USBH_REQ_SET_FEATURE),                                       \
+                                                                                        (rcpt),                                                       \
+                                                                                        (value),                                                      \
+                                                                                        (index),                                                      \
+                                                                                        (void *)0,                                                    \
+                                                                                         0u,                                                          \
+                                                                                        (USBH_CFG_STD_REQ_TIMEOUT),                                   \
+                                                                                        (p_err))
+
+#define  USBH_GET_CFG(p_dev, data, p_err)                                   USBH_CtrlRx((p_dev),                                                      \
+                                                                                        (USBH_REQ_GET_CFG),                                           \
+                                                                                        (USBH_REQ_DIR_DEV_TO_HOST | USBH_REQ_RECIPIENT_DEV),          \
+                                                                                         0u,                                                          \
+                                                                                         0u,                                                          \
+                                                                                        (data),                                                       \
+                                                                                         1u,                                                          \
+                                                                                        (USBH_CFG_STD_REQ_TIMEOUT),                                   \
+                                                                                        (p_err))
+
+#define  USBH_GET_DESC(p_dev, desc_type, desc_ix, data, length, p_err)      USBH_CtrlRx((p_dev),                                                      \
+                                                                                        (USBH_REQ_GET_DESC),                                          \
+                                                                                        (USBH_REQ_DIR_DEV_TO_HOST | USBH_REQ_RECIPIENT_DEV),          \
+                                                                                        (desc_type << 8) | (desc_ix),                                 \
+                                                                                         0u,                                                          \
+                                                                                        (data),                                                       \
+                                                                                        (length),                                                     \
+                                                                                        (USBH_CFG_STD_REQ_TIMEOUT),                                   \
+                                                                                        (p_err))
+
+#define  USBH_GET_IF(ep, if_nbr, data, p_err)                               USBH_CtrlRx((p_dev),                                                      \
+                                                                                        (USBH_REQ_GET_IF),                                            \
+                                                                                        (USBH_REQ_DIR_DEV_TO_HOST | USBH_REQ_RECIPIENT_IF),           \
+                                                                                         0u,                                                          \
+                                                                                        (if_nbr),                                                     \
+                                                                                        (data),                                                       \
+                                                                                         1u,                                                          \
+                                                                                        (USBH_CFG_STD_REQ_TIMEOUT),                                   \
+                                                                                        (p_err))
+
+#define  USBH_GET_STATUS(p_dev, rcpt, index, data, p_err)                   USBH_CtrlRx((p_dev),                                                      \
+                                                                                        (USBH_REQ_GET_STATUS),                                        \
+                                                                                        (USBH_REQ_DIR_DEV_TO_HOST) | (rcpt),                          \
+                                                                                         0u,                                                          \
+                                                                                        (index),                                                      \
+                                                                                        (data),                                                       \
+                                                                                         2u,                                                          \
+                                                                                        (USBH_CFG_STD_REQ_TIMEOUT),                                   \
+                                                                                        (p_err))
+
+#define  USBH_SET_ADDR(p_dev, new_usb_addr, p_err)                          USBH_CtrlTx((p_dev),                                                      \
+                                                                                        (USBH_REQ_SET_ADDR),                                          \
+                                                                                        (USBH_REQ_DIR_HOST_TO_DEV | USBH_REQ_RECIPIENT_DEV),          \
+                                                                                         new_usb_addr,                                                \
+                                                                                         0u,                                                          \
+                                                                                        (void *)0,                                                    \
+                                                                                         0u,                                                          \
+                                                                                        (USBH_CFG_STD_REQ_TIMEOUT),                                   \
+                                                                                        (p_err))
+
+#define  USBH_SET_CFG(p_dev, cfg_nbr, p_err)                                USBH_CtrlTx((p_dev),                                                      \
+                                                                                        (USBH_REQ_SET_CFG),                                           \
+                                                                                        (USBH_REQ_DIR_HOST_TO_DEV | USBH_REQ_RECIPIENT_DEV),          \
+                                                                                        (cfg_nbr),                                                    \
+                                                                                         0u,                                                          \
+                                                                                        (void *)0,                                                    \
+                                                                                         0u,                                                          \
+                                                                                        (USBH_CFG_STD_REQ_TIMEOUT),                                   \
+                                                                                        (p_err))
+
+#define  USBH_SET_IF(p_dev, if_nbr, alt_nbr, p_err)                         USBH_CtrlTx((p_dev),                                                      \
+                                                                                        (USBH_REQ_SET_IF),                                            \
+                                                                                        (USBH_REQ_DIR_HOST_TO_DEV | USBH_REQ_RECIPIENT_IF),           \
+                                                                                        (alt_nbr),                                                    \
+                                                                                        (if_nbr),                                                     \
+                                                                                        (void *)0,                                                    \
+                                                                                         0u,                                                          \
+                                                                                        (USBH_CFG_STD_REQ_TIMEOUT),                                   \
+                                                                                        (p_err))
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                /* --------- USB HOST STACK GENERAL FUNCTIONS --------- */
+CPU_INT32U      USBH_VersionGet       (void);
+
+USBH_ERR        USBH_Init             (USBH_KERNEL_TASK_INFO  *async_task_info,
+                                       USBH_KERNEL_TASK_INFO  *hub_task_info);
+
+USBH_ERR        USBH_Suspend          (void);
+
+USBH_ERR        USBH_Resume           (void);
+
+                                                                /* ------------ HOST CONTROLLER FUNCTIONS ------------- */
+CPU_INT08U      USBH_HC_Add           (USBH_HC_CFG            *p_hc_cfg,
+                                       USBH_HC_DRV_API        *p_drv_api,
+                                       USBH_HC_RH_API         *p_hc_rh_api,
+                                       USBH_HC_BSP_API        *p_hc_bsp_api,
+                                       USBH_ERR               *p_err);
+
+USBH_ERR        USBH_HC_Start         (CPU_INT08U              hc_nbr);
+
+USBH_ERR        USBH_HC_Stop          (CPU_INT08U              hc_nbr);
+
+USBH_ERR        USBH_HC_PortEn        (CPU_INT08U              hc_nbr,
+                                       CPU_INT08U              port_nbr);
+
+USBH_ERR        USBH_HC_PortDis       (CPU_INT08U              hc_nbr,
+                                       CPU_INT08U              port_nbr);
+
+CPU_INT32U      USBH_HC_FrameNbrGet   (CPU_INT08U              hc_nbr,
+                                       USBH_ERR               *p_err);
+
+                                                                /* ------------- DEVICE CONTROL FUNCTIONS ------------- */
+USBH_ERR        USBH_DevConn          (USBH_DEV               *p_dev);
+
+void            USBH_DevDisconn       (USBH_DEV               *p_dev);
+
+CPU_INT08U      USBH_DevCfgNbrGet     (USBH_DEV               *p_dev);
+
+void            USBH_DevDescGet       (USBH_DEV               *p_dev,
+                                       USBH_DEV_DESC          *p_dev_desc);
+
+                                                                /* ---------- DEVICE CONFIGURATION FUNCTIONS ---------- */
+USBH_ERR        USBH_CfgSet           (USBH_DEV               *p_dev,
+                                       CPU_INT08U              cfg_nbr);
+
+USBH_CFG       *USBH_CfgGet           (USBH_DEV               *p_dev,
+                                       CPU_INT08U              cfg_ix);
+
+CPU_INT08U      USBH_CfgIF_NbrGet     (USBH_CFG               *p_cfg);
+
+USBH_ERR        USBH_CfgDescGet       (USBH_CFG               *p_cfg,
+                                       USBH_CFG_DESC          *p_cfg_desc);
+
+USBH_DESC_HDR  *USBH_CfgExtraDescGet  (USBH_CFG               *p_cfg,
+                                       USBH_ERR               *p_err);
+
+                                                                /* -------- DEVICE INTERFACE CONTROL FUNCTIONS -------- */
+USBH_ERR        USBH_IF_Set           (USBH_IF                *p_if,
+                                       CPU_INT08U              alt_nbr);
+
+USBH_IF        *USBH_IF_Get           (USBH_CFG               *p_cfg,
+                                       CPU_INT08U              if_ix);
+
+CPU_INT08U      USBH_IF_AltNbrGet     (USBH_IF                *p_if);
+
+CPU_INT08U      USBH_IF_NbrGet        (USBH_IF                *p_if);
+
+CPU_INT08U      USBH_IF_EP_NbrGet     (USBH_IF                *p_if,
+                                       CPU_INT08U              alt_ix);
+
+USBH_ERR        USBH_IF_DescGet       (USBH_IF                *p_if,
+                                       CPU_INT08U              alt_ix,
+                                       USBH_IF_DESC           *p_if_desc);
+
+CPU_INT08U     *USBH_IF_ExtraDescGet  (USBH_IF                *p_if,
+                                       CPU_INT08U              alt_ix,
+                                       CPU_INT16U             *p_data_len);
+
+                                                                /* ---------- DEVICE ENDPOINT OPEN FUNCTIONS ---------- */
+USBH_ERR        USBH_BulkInOpen       (USBH_DEV               *p_dev,
+                                       USBH_IF                *p_if,
+                                       USBH_EP                *p_ep);
+
+USBH_ERR        USBH_BulkOutOpen      (USBH_DEV               *p_dev,
+                                       USBH_IF                *p_if,
+                                       USBH_EP                *p_ep);
+
+USBH_ERR        USBH_IntrInOpen       (USBH_DEV               *p_dev,
+                                       USBH_IF                *p_if,
+                                       USBH_EP                *p_ep);
+
+USBH_ERR        USBH_IntrOutOpen      (USBH_DEV               *p_dev,
+                                       USBH_IF                *p_if,
+                                       USBH_EP                *p_ep);
+
+USBH_ERR        USBH_IsocInOpen       (USBH_DEV               *p_dev,
+                                       USBH_IF                *p_if,
+                                       USBH_EP                *p_ep);
+
+USBH_ERR        USBH_IsocOutOpen      (USBH_DEV               *p_dev,
+                                       USBH_IF                *p_if,
+                                       USBH_EP                *p_ep);
+
+                                                                /* -------- DEVICE ENDPOINT TRANSFER FUNCTIONS -------- */
+CPU_INT16U      USBH_CtrlTx           (USBH_DEV               *p_dev,
+                                       CPU_INT08U              b_req,
+                                       CPU_INT08U              bm_req_type,
+                                       CPU_INT16U              w_val,
+                                       CPU_INT16U              w_ix,
+                                       void                   *p_data,
+                                       CPU_INT16U              w_len,
+                                       CPU_INT32U              timeout_ms,
+                                       USBH_ERR               *p_err);
+
+CPU_INT16U      USBH_CtrlRx           (USBH_DEV               *p_dev,
+                                       CPU_INT08U              b_req,
+                                       CPU_INT08U              bm_req_type,
+                                       CPU_INT16U              w_val,
+                                       CPU_INT16U              w_ix,
+                                       void                   *p_data,
+                                       CPU_INT16U              w_len,
+                                       CPU_INT32U              timeout_ms,
+                                       USBH_ERR               *p_err);
+
+CPU_INT32U      USBH_BulkTx           (USBH_EP                *p_ep,
+                                       void                   *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       CPU_INT32U              timeout_ms,
+                                       USBH_ERR               *p_err);
+
+USBH_ERR        USBH_BulkTxAsync      (USBH_EP                *p_ep,
+                                       void                   *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       USBH_XFER_CMPL_FNCT     fnct,
+                                       void                   *p_fnct_arg);
+
+CPU_INT32U      USBH_BulkRx           (USBH_EP                *p_ep,
+                                       void                   *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       CPU_INT32U              timeout_ms,
+                                       USBH_ERR               *p_err);
+
+USBH_ERR        USBH_BulkRxAsync      (USBH_EP                *p_ep,
+                                       void                   *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       USBH_XFER_CMPL_FNCT     fnct,
+                                       void                   *p_fnct_arg);
+
+CPU_INT32U      USBH_IntrTx           (USBH_EP                *p_ep,
+                                       void                   *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       CPU_INT32U              timeout_ms,
+                                       USBH_ERR               *p_err);
+
+USBH_ERR        USBH_IntrTxAsync      (USBH_EP                *p_ep,
+                                       void                   *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       USBH_XFER_CMPL_FNCT     fnct,
+                                       void                   *p_fnct_arg);
+
+CPU_INT32U      USBH_IntrRx           (USBH_EP                *p_ep,
+                                       void                   *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       CPU_INT32U              timeout_ms,
+                                       USBH_ERR               *p_err);
+
+USBH_ERR        USBH_IntrRxAsync      (USBH_EP                *p_ep,
+                                       void                   *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       USBH_XFER_CMPL_FNCT     fnct,
+                                       void                   *p_fnct_arg);
+
+CPU_INT32U      USBH_IsocTx           (USBH_EP                *p_ep,
+                                       CPU_INT08U             *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       CPU_INT32U              start_frm,
+                                       CPU_INT32U              nbr_frm,
+                                       CPU_INT16U             *p_frm_len,
+                                       USBH_ERR               *p_frm_err,
+                                       CPU_INT32U              timeout_ms,
+                                       USBH_ERR               *p_err);
+
+USBH_ERR        USBH_IsocTxAsync      (USBH_EP                *p_ep,
+                                       CPU_INT08U             *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       CPU_INT32U              start_frm,
+                                       CPU_INT32U              nbr_frm,
+                                       CPU_INT16U             *p_frm_len,
+                                       USBH_ERR               *p_frm_err,
+                                       USBH_ISOC_CMPL_FNCT     fnct,
+                                       void                   *p_fnct_arg);
+
+CPU_INT32U      USBH_IsocRx           (USBH_EP                *p_ep,
+                                       CPU_INT08U             *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       CPU_INT32U              start_frm,
+                                       CPU_INT32U              nbr_frm,
+                                       CPU_INT16U             *p_frm_len,
+                                       USBH_ERR               *p_frm_err,
+                                       CPU_INT32U              timeout_ms,
+                                       USBH_ERR               *p_err);
+
+USBH_ERR        USBH_IsocRxAsync      (USBH_EP                *p_ep,
+                                       CPU_INT08U             *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       CPU_INT32U              start_frm,
+                                       CPU_INT32U              nbr_frm,
+                                       CPU_INT16U             *p_frm_len,
+                                       USBH_ERR               *p_frm_err,
+                                       USBH_ISOC_CMPL_FNCT     fnct,
+                                       void                   *p_fnct_arg);
+
+                                                                /* ------------ DEVICE ENDPOINT FUNCTIONS ------------- */
+CPU_INT08U      USBH_EP_LogNbrGet     (USBH_EP                *p_ep);
+
+CPU_INT08U      USBH_EP_DirGet        (USBH_EP                *p_ep);
+
+CPU_INT16U      USBH_EP_MaxPktSizeGet (USBH_EP                *p_ep);
+
+CPU_INT08U      USBH_EP_TypeGet       (USBH_EP                *p_ep);
+
+USBH_ERR        USBH_EP_Get           (USBH_IF                *p_if,
+                                       CPU_INT08U              alt_ix,
+                                       CPU_INT08U              ep_ix,
+                                       USBH_EP                *p_ep);
+
+USBH_ERR        USBH_EP_StallSet      (USBH_EP                *p_ep);
+
+USBH_ERR        USBH_EP_StallClr      (USBH_EP                *p_ep);
+
+USBH_ERR        USBH_EP_Reset         (USBH_DEV               *p_dev,
+                                       USBH_EP                *p_ep);
+
+USBH_ERR        USBH_EP_Close         (USBH_EP                *p_ep);
+
+                                                                /* ----------- USB REQUEST BLOCK FUNCTIONS ------------ */
+void            USBH_URB_Done         (USBH_URB               *p_urb);
+
+USBH_ERR        USBH_URB_Complete     (USBH_URB               *p_urb);
+
+                                                                /* ------------- MISCELLENEOUS FUNCTIONS -------------- */
+CPU_INT32U      USBH_StrGet           (USBH_DEV               *p_dev,
+                                       CPU_INT08U              desc_ix,
+                                       CPU_INT16U              lang_id,
+                                       CPU_INT08U             *p_buf,
+                                       CPU_INT32U              buf_len,
+                                       USBH_ERR               *p_err);
+
+
+/*
+*********************************************************************************************************
+*                                         CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_CFG_MAX_NBR_DEVS
+#error  "USBH_CFG_MAX_NBR_DEVS                 not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_NBR_DEVS < 1u)
+#error  "USBH_CFG_MAX_NBR_DEVS                 illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 1]                     "
+#elif   (USBH_CFG_MAX_NBR_DEVS > 127u)
+#error  "USBH_CFG_MAX_NBR_DEVS                 illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be <= 127]                   "
+#endif
+
+#ifndef  USBH_CFG_MAX_NBR_CFGS
+#error  "USBH_CFG_MAX_NBR_CFGS                 not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_NBR_CFGS < 1u)
+#error  "USBH_CFG_MAX_NBR_CFGS                 illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 1]                     "
+#endif
+
+#ifndef  USBH_CFG_MAX_NBR_IFS
+#error  "USBH_CFG_MAX_NBR_IFS                  not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_NBR_IFS < 1u)
+#error  "USBH_CFG_MAX_NBR_IFS                  illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 1]                     "
+#endif
+
+#ifndef  USBH_CFG_MAX_NBR_EPS
+#error  "USBH_CFG_MAX_NBR_EPS                  not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_NBR_EPS < 1u)
+#error  "USBH_CFG_MAX_NBR_EPS                  illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 1]                     "
+#endif
+
+#ifndef  USBH_CFG_MAX_NBR_CLASS_DRVS
+#error  "USBH_CFG_MAX_NBR_CLASS_DRVS           not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_NBR_CLASS_DRVS < 2u)
+#error  "USBH_CFG_MAX_NBR_CLASS_DRVS           illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 2]                     "
+#endif
+
+#ifndef  USBH_CFG_MAX_CFG_DATA_LEN
+#error  "USBH_CFG_MAX_CFG_DATA_LEN             not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_CFG_DATA_LEN < 18u)
+#error  "USBH_CFG_MAX_CFG_DATA_LEN             illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 18]                    "
+#endif
+
+#ifndef  USBH_CFG_MAX_HUBS
+#error  "USBH_CFG_MAX_HUBS                     not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_HUBS < 1u)
+#error  "USBH_CFG_MAX_HUBS                     illegally #define'd in 'usbh_cfg.h'"
+#error  "                                  [MUST be >= 1 (min value = 1 root hub)}"
+#endif
+
+#ifndef  USBH_CFG_MAX_HUB_PORTS
+#error  "USBH_CFG_MAX_HUB_PORTS                not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_HUB_PORTS < 1u)
+#error  "USBH_CFG_MAX_HUB_PORTS                illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 1]                     "
+#elif   (USBH_CFG_MAX_HUB_PORTS > 7u)
+#error  "USBH_CFG_MAX_HUB_PORTS                illegally #define'd in 'usbh_cfg.h'"
+#error  "USBH_CFG_MAX_HUB_PORTS cannot exceed 7 ports per external hub.           "
+#endif
+
+#ifndef  USBH_CFG_STD_REQ_RETRY
+#error  "USBH_CFG_STD_REQ_RETRY                not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_STD_REQ_RETRY < 1u)
+#error  "USBH_CFG_STD_REQ_RETRY                illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 1]                     "
+#endif
+
+#ifndef  USBH_CFG_STD_REQ_TIMEOUT
+#error  "USBH_CFG_STD_REQ_TIMEOUT                  not #define'd in 'usbh_cfg.h'"
+#endif
+
+#ifndef  USBH_CFG_MAX_STR_LEN
+#error  "USBH_CFG_MAX_STR_LEN                  not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_STR_LEN > 256u)
+#error  "USBH_CFG_MAX_STR_LEN                  illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be <= 256]                   "
+#endif
+
+#ifndef  USBH_CFG_MAX_NBR_HC
+#error  "USBH_CFG_MAX_NBR_HC                   not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_NBR_HC < 1u)
+#error  "USBH_CFG_MAX_NBR_HC                   illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 1]                     "
+#endif
+
+#ifndef  USBH_CFG_MAX_ISOC_DESC
+#error  "USBH_CFG_MAX_ISOC_DESC                not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_ISOC_DESC < 1u)
+#error  "USBH_CFG_MAX_ISOC_DESC                illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 1]                     "
+#endif
+
+#ifndef  USBH_CFG_MAX_EXTRA_URB_PER_DEV
+#error  "USBH_CFG_MAX_EXTRA_URB_PER_DEV        not #define'd in 'usbh_cfg.h'"
+#elif   (USBH_CFG_MAX_EXTRA_URB_PER_DEV < 1u)
+#error  "USBH_CFG_MAX_EXTRA_URB_PER_DEV        illegally #define'd in 'usbh_cfg.h'"
+#error  "                                      [MUST be >= 1]                     "
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_err.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_err.h
new file mode 100644
index 0000000..bb2e653
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_err.h
@@ -0,0 +1,308 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                       The Embedded USB Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    USB HOST STACK ERROR CODES
+*
+* File           : usbh_err.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                               MODULE
+**********************************************************************************************************
+*/
+
+#ifndef  USBH_ERR_H
+#define  USBH_ERR_H
+
+
+/*
+**********************************************************************************************************
+*                                            INCLUDE FILES
+**********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                               EXTERNS
+**********************************************************************************************************
+*/
+
+/*
+**********************************************************************************************************
+*                                               DEFINES
+**********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                             DATA TYPES
+**********************************************************************************************************
+*/
+
+typedef  enum  usbh_err {
+
+    USBH_ERR_NONE                               =     0u,
+
+    USBH_ERR_FAIL                               =     1u,
+    USBH_ERR_ALLOC                              =     2u,
+    USBH_ERR_FREE                               =     3u,
+    USBH_ERR_INVALID_ARG                        =     4u,
+    USBH_ERR_NULL_PTR                           =     5u,
+    USBH_ERR_BW_NOT_AVAIL                       =     6u,
+    USBH_ERR_NOT_SUPPORTED                      =     7u,
+    USBH_ERR_UNKNOWN                            =     8u,
+
+
+/*
+*********************************************************************************************************
+*                                         DEVICE ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_DEV_ALLOC                          =   100u,
+    USBH_ERR_DEV_NOT_READY                      =   101u,
+    USBH_ERR_DEV_NOT_RESPONDING                 =   102u,
+    USBH_ERR_DEV_NOT_HS                         =   103u,
+
+
+/*
+*********************************************************************************************************
+*                                      CONFIGURATION ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_CFG_ALLOC                          =   200u,
+    USBH_ERR_CFG_MAX_CFG_LEN                    =   201u,
+
+
+/*
+*********************************************************************************************************
+*                                        INTERFACE ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_IF_ALLOC                           =   300u,
+
+
+/*
+*********************************************************************************************************
+*                                        ENDPOINT ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_EP_ALLOC                           =   400u,
+    USBH_ERR_EP_FREE                            =   401u,
+    USBH_ERR_EP_INVALID_STATE                   =   402u,
+    USBH_ERR_EP_INVALID_TYPE                    =   403u,
+    USBH_ERR_EP_STALL                           =   404u,
+    USBH_ERR_EP_NACK                            =   405u,
+    USBH_ERR_EP_NOT_FOUND                       =   406u,
+
+
+/*
+********************************************************************************************************
+*                                 USB REQUEST BLOCK (URB) ERROR CODES
+********************************************************************************************************
+*/
+
+    USBH_ERR_URB_ABORT                          =   500u,
+
+
+/*
+*********************************************************************************************************
+*                                       DESCRIPTOR ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_DESC_ALLOC                         =   600u,
+    USBH_ERR_DESC_INVALID                       =   601u,
+    USBH_ERR_DESC_LANG_ID_NOT_SUPPORTED         =   602u,
+    USBH_ERR_DESC_EXTRA_NOT_FOUND               =   603u,
+
+
+/*
+*********************************************************************************************************
+*                                     HOST CONTROLLER ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_HC_ALLOC                           =   700u,
+    USBH_ERR_HC_INIT                            =   701u,
+    USBH_ERR_HC_START                           =   702u,
+    USBH_ERR_HC_IO                              =   703u,
+    USBH_ERR_HC_HALTED                          =   704u,
+    USBH_ERR_HC_PORT_RESET                      =   705u,
+
+
+/*
+*********************************************************************************************************
+*                               OPERATING SYSTEM (OS) LAYER ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_OS_TASK_CREATE                     =   800u,
+    USBH_ERR_OS_SIGNAL_CREATE                   =   801u,
+    USBH_ERR_OS_DEL                             =   802u,
+    USBH_ERR_OS_TIMEOUT                         =   803u,
+    USBH_ERR_OS_ABORT                           =   804u,
+    USBH_ERR_OS_FAIL                            =   805u,
+
+
+/*
+*********************************************************************************************************
+*                                          CLASS ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_CLASS_PROBE_FAIL                   =  1000u,
+    USBH_ERR_CLASS_DRV_NOT_FOUND                =  1001u,
+    USBH_ERR_CLASS_DRV_ALLOC                    =  1002u,
+
+
+/*
+*********************************************************************************************************
+*                            COMMUNICATION DEVICE CLASS (CDC) ERROR CODES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                        CDC ABSTRACT CONTROL MODEL (ACM) SUBCLASS ERROR CODES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        HUB CLASS ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_HUB_INVALID_PORT_NBR               =  1200u,
+    USBH_ERR_HUB_PORT                           =  1201u,
+
+
+/*
+*********************************************************************************************************
+*                           HUMAN INTERFACE DEVICE (HID) CLASS ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_HID_ITEM_LONG                      =  1300u,
+    USBH_ERR_HID_ITEM_UNKNOWN                   =  1301u,
+    USBH_ERR_HID_MISMATCH_COLL                  =  1302u,
+    USBH_ERR_HID_NOT_APP_COLL                   =  1303u,
+    USBH_ERR_HID_REPORT_OUTSIDE_COLL            =  1304u,
+    USBH_ERR_HID_MISMATCH_PUSH_POP              =  1305u,
+    USBH_ERR_HID_USAGE_PAGE_INVALID             =  1306u,
+    USBH_ERR_HID_REPORT_ID                      =  1307u,
+    USBH_ERR_HID_REPORT_CNT                     =  1308u,
+    USBH_ERR_HID_PUSH_SIZE                      =  1309u,
+    USBH_ERR_HID_POP_SIZE                       =  1310u,
+    USBH_ERR_HID_REPORT_INVALID_VAL             =  1311u,
+    USBH_ERR_HID_RD_PARSER_FAIL                 =  1312u,
+    USBH_ERR_HID_NOT_IN_REPORT                  =  1313u,
+
+
+/*
+*********************************************************************************************************
+*                                MASS STORAGE CLASS (MSC) ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_MSC_CMD_FAILED                     =  1400u,
+    USBH_ERR_MSC_CMD_PHASE                      =  1401u,
+    USBH_ERR_MSC_IO                             =  1402u,
+    USBH_ERR_MSC_LUN_ALLOC                      =  1403u,
+
+/*
+*********************************************************************************************************
+*                  FUTURE TECHNOLOGY DEVICES INTERNATIONAL CLASS (FTDI) ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_FTDI_LINE                          =  1500u,
+
+/*
+*********************************************************************************************************
+*                               PRINTER CLASS (PRN) ERROR CODES
+*********************************************************************************************************
+*/
+
+    USBH_ERR_PRN_NO_ACTIVE_PDL                  = 1600u,          /* no current pdl selected error code  */
+    USBH_ERR_PRN_NO_MORE_FONTS                  = 1601u,          /* no more fonts available error code  */
+    USBH_ERR_PRN_FONT_GET                       = 1602u,          /* error code for retrieving first font*/
+    USBH_ERR_PRN_INVALID_FONT                   = 1603u,          /* invalid font selection error code   */
+    USBH_ERR_PRN_LINE_PARSE                     = 1604u,          /* line buffer parsing error code      */
+    USBH_ERR_PRN_CFG_MAX_NBR_PRN_DEV            = 1605u,          /* printer device configuration .....  */
+    USBH_ERR_PRN_PJL_STATUS                     = 1606u           /* pjl status error                    */
+
+
+} USBH_ERR;
+
+
+/*
+**********************************************************************************************************
+*                                          GLOBAL VARIABLES
+**********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                               MACRO'S
+**********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+**********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+**********************************************************************************************************
+*/
+
+
+/*
+**********************************************************************************************************
+*                                              MODULE END
+**********************************************************************************************************
+*/
+
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_hub.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_hub.h
new file mode 100644
index 0000000..38359d5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_hub.h
@@ -0,0 +1,148 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                       The Embedded USB Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        USB HOST HUB OPERATIONS
+*
+* File           : usbh_hub.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_HUB_MODULE_PRESENT
+#define  USBH_HUB_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "usbh_core.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   USBH_HUB_MODULE
+#define  USBH_HUB_EXT
+#else
+#define  USBH_HUB_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  USBH_CLASS_DRV  USBH_HUB_Drv;
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+USBH_ERR    USBH_HUB_PortEn        (USBH_HUB_DEV   *p_hub_dev,
+                                    CPU_INT16U      port_nbr);
+
+USBH_ERR    USBH_HUB_PortDis       (USBH_HUB_DEV   *p_hub_dev,
+                                    CPU_INT16U      port_nbr);
+
+USBH_ERR    USBH_HUB_PortSuspendSet(USBH_HUB_DEV   *p_hub_dev,
+                                    CPU_INT16U      port_nbr);
+
+void        USBH_HUB_ClassNotify   (void           *p_class_dev,
+                                    CPU_INT08U      state,
+                                    void           *p_ctx);
+
+CPU_INT32U  USBH_HUB_RH_CtrlReq    (USBH_HC        *p_hc,
+                                    CPU_INT08U      b_req,
+                                    CPU_INT08U      bm_req_type,
+                                    CPU_INT16U      w_val,
+                                    CPU_INT16U      w_ix,
+                                    void           *p_buf,
+                                    CPU_INT32U      buf_len,
+                                    USBH_ERR       *p_err);
+
+void        USBH_HUB_RH_Event      (USBH_DEV       *p_dev);
+
+void        USBH_HUB_ParseHubDesc  (USBH_HUB_DESC  *p_hub_desc,
+                                    void           *p_buf_src);
+
+void        USBH_HUB_FmtHubDesc    (USBH_HUB_DESC  *p_hub_desc,
+                                    void           *p_buf_dest);
+
+void        USBH_HUB_EventTask     (void           *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_os.h b/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_os.h
new file mode 100644
index 0000000..154ef5b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uC-USB-Host/Source/usbh_os.h
@@ -0,0 +1,176 @@
+/*
+*********************************************************************************************************
+*                                             uC/USB-Host
+*                                       The Embedded USB Stack
+*
+*                          (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                       USB HOST OS OPERATIONS
+*
+* File           : usb_os.h
+* Version        : V3.41.03
+* Programmer(s)  : JFD
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+
+#ifndef  USBH_OS_H
+#define  USBH_OS_H
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+#include  
+#include  
+#include  
+#include  "usbh_err.h"
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+#ifdef   USBH_OS_MODULE
+#define  USBH_OS_EXT
+#else
+#define  USBH_OS_EXT  extern
+#endif
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_INT32U  USBH_HSEM;                                 /* Handle on semaphores.                                */
+typedef  CPU_INT32U  USBH_HMUTEX;                               /* Handle on mutex.                                     */
+typedef  CPU_INT32U  USBH_HTASK;                                /* Handle on tasks.                                     */
+typedef  CPU_INT32U  USBH_HQUEUE;                               /* Handle on queues.                                    */
+
+typedef  void        (*USBH_TASK_FNCT)(void  *data);            /* Task function.                                       */
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+USBH_ERR      USBH_OS_LayerInit      (void);
+                                                                /* --------------- DELAY TASK FUNCTIONS --------------- */
+void          USBH_OS_DlyMS          (CPU_INT32U        dly);
+
+void          USBH_OS_DlyUS          (CPU_INT32U        dly);
+
+                                                                /* ----------------- MUTEX FUNCTIONS ------------------ */
+USBH_ERR      USBH_OS_MutexCreate    (USBH_HMUTEX      *p_mutex);
+
+USBH_ERR      USBH_OS_MutexLock      (USBH_HMUTEX       mutex);
+
+USBH_ERR      USBH_OS_MutexUnlock    (USBH_HMUTEX       mutex);
+
+USBH_ERR      USBH_OS_MutexDestroy   (USBH_HMUTEX       mutex);
+
+                                                                /* --------------- SEMAPHORE FUNCTIONS ---------------- */
+USBH_ERR      USBH_OS_SemCreate      (USBH_HSEM        *p_sem,
+                                      CPU_INT32U        cnt);
+
+USBH_ERR      USBH_OS_SemWait        (USBH_HSEM         sem,
+                                      CPU_INT32U        timeout);
+
+USBH_ERR      USBH_OS_SemWaitAbort   (USBH_HSEM         sem);
+
+USBH_ERR      USBH_OS_SemPost        (USBH_HSEM         sem);
+
+USBH_ERR      USBH_OS_SemDestroy     (USBH_HSEM         sem);
+
+                                                                /* ------------------ TASK FUNCTIONS ------------------ */
+USBH_ERR      USBH_OS_TaskCreate     (CPU_CHAR         *p_name,
+                                      CPU_INT32U        prio,
+                                      USBH_TASK_FNCT    task_fnct,
+                                      void             *p_data,
+                                      CPU_INT32U       *p_stk,
+                                      CPU_INT32U        stk_size,
+                                      USBH_HTASK       *p_task);
+
+                                                                /* --------------- MSG QUEUE FUNCTIONS ---------------- */
+USBH_HQUEUE   USBH_OS_MsgQueueCreate (void            **p_start,
+                                      CPU_INT16U        size,
+                                      USBH_ERR         *p_err);
+
+USBH_ERR      USBH_OS_MsgQueuePut    (USBH_HQUEUE       msg_q,
+                                      void             *p_msg);
+
+void         *USBH_OS_MsgQueueGet    (USBH_HQUEUE       msg_q,
+                                      CPU_INT32U        timeout,
+                                      USBH_ERR         *p_err);
+
+void         *USBH_OS_VirToBus       (void             *x);
+
+void         *USBH_OS_BusToVir       (void             *x);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Cfg/Template/os_cfg.h b/src/ucos_v1_42/micrium_source/uCOS-II/Cfg/Template/os_cfg.h
new file mode 100644
index 0000000..fa0be2a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Cfg/Template/os_cfg.h
@@ -0,0 +1,145 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                  uC/OS-II Configuration File for V2.9x
+*
+*                               (c) Copyright 2005-2013, Micrium, Weston, FL
+*                                          All Rights Reserved
+*
+*
+* File    : OS_CFG.H
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#ifndef OS_CFG_H
+#define OS_CFG_H
+
+
+                                       /* ---------------------- MISCELLANEOUS ----------------------- */
+#define OS_APP_HOOKS_EN           1u   /* Application-defined hooks are called from the uC/OS-II hooks */
+#define OS_ARG_CHK_EN             1u   /* Enable (1) or Disable (0) argument checking                  */
+#define OS_CPU_HOOKS_EN           1u   /* uC/OS-II hooks are found in the processor port files         */
+
+#define OS_DEBUG_EN               1u   /* Enable(1) debug variables                                    */
+
+#define OS_EVENT_MULTI_EN         1u   /* Include code for OSEventPendMulti()                          */
+#define OS_EVENT_NAME_EN          1u   /* Enable names for Sem, Mutex, Mbox and Q                      */
+
+#define OS_LOWEST_PRIO           63u   /* Defines the lowest priority that can be assigned ...         */
+                                       /* ... MUST NEVER be higher than 254!                           */
+
+#define OS_MAX_EVENTS            10u   /* Max. number of event control blocks in your application      */
+#define OS_MAX_FLAGS              5u   /* Max. number of Event Flag Groups    in your application      */
+#define OS_MAX_MEM_PART           5u   /* Max. number of memory partitions                             */
+#define OS_MAX_QS                 4u   /* Max. number of queue control blocks in your application      */
+#define OS_MAX_TASKS             20u   /* Max. number of tasks in your application, MUST be >= 2       */
+
+#define OS_SCHED_LOCK_EN          1u   /* Include code for OSSchedLock() and OSSchedUnlock()           */
+
+#define OS_TICK_STEP_EN           1u   /* Enable tick stepping feature for uC/OS-View                  */
+#define OS_TICKS_PER_SEC        100u   /* Set the number of ticks in one second                        */
+
+#define OS_TLS_TBL_SIZE           0u   /* Size of Thread-Local Storage Table                           */
+
+
+                                       /* --------------------- TASK STACK SIZE ---------------------- */
+#define OS_TASK_TMR_STK_SIZE    128u   /* Timer      task stack size (# of OS_STK wide entries)        */
+#define OS_TASK_STAT_STK_SIZE   128u   /* Statistics task stack size (# of OS_STK wide entries)        */
+#define OS_TASK_IDLE_STK_SIZE   128u   /* Idle       task stack size (# of OS_STK wide entries)        */
+
+
+                                       /* --------------------- TASK MANAGEMENT ---------------------- */
+#define OS_TASK_CHANGE_PRIO_EN    1u   /*     Include code for OSTaskChangePrio()                      */
+#define OS_TASK_CREATE_EN         1u   /*     Include code for OSTaskCreate()                          */
+#define OS_TASK_CREATE_EXT_EN     1u   /*     Include code for OSTaskCreateExt()                       */
+#define OS_TASK_DEL_EN            1u   /*     Include code for OSTaskDel()                             */
+#define OS_TASK_NAME_EN           1u   /*     Enable task names                                        */
+#define OS_TASK_PROFILE_EN        1u   /*     Include variables in OS_TCB for profiling                */
+#define OS_TASK_QUERY_EN          1u   /*     Include code for OSTaskQuery()                           */
+#define OS_TASK_REG_TBL_SIZE      1u   /*     Size of task variables array (#of INT32U entries)        */
+#define OS_TASK_STAT_EN           1u   /*     Enable (1) or Disable(0) the statistics task             */
+#define OS_TASK_STAT_STK_CHK_EN   1u   /*     Check task stacks from statistic task                    */
+#define OS_TASK_SUSPEND_EN        1u   /*     Include code for OSTaskSuspend() and OSTaskResume()      */
+#define OS_TASK_SW_HOOK_EN        1u   /*     Include code for OSTaskSwHook()                          */
+
+
+                                       /* ----------------------- EVENT FLAGS ------------------------ */
+#define OS_FLAG_EN                1u   /* Enable (1) or Disable (0) code generation for EVENT FLAGS    */
+#define OS_FLAG_ACCEPT_EN         1u   /*     Include code for OSFlagAccept()                          */
+#define OS_FLAG_DEL_EN            1u   /*     Include code for OSFlagDel()                             */
+#define OS_FLAG_NAME_EN           1u   /*     Enable names for event flag group                        */
+#define OS_FLAG_QUERY_EN          1u   /*     Include code for OSFlagQuery()                           */
+#define OS_FLAG_WAIT_CLR_EN       1u   /* Include code for Wait on Clear EVENT FLAGS                   */
+#define OS_FLAGS_NBITS           16u   /* Size in #bits of OS_FLAGS data type (8, 16 or 32)            */
+
+
+                                       /* -------------------- MESSAGE MAILBOXES --------------------- */
+#define OS_MBOX_EN                1u   /* Enable (1) or Disable (0) code generation for MAILBOXES      */
+#define OS_MBOX_ACCEPT_EN         1u   /*     Include code for OSMboxAccept()                          */
+#define OS_MBOX_DEL_EN            1u   /*     Include code for OSMboxDel()                             */
+#define OS_MBOX_PEND_ABORT_EN     1u   /*     Include code for OSMboxPendAbort()                       */
+#define OS_MBOX_POST_EN           1u   /*     Include code for OSMboxPost()                            */
+#define OS_MBOX_POST_OPT_EN       1u   /*     Include code for OSMboxPostOpt()                         */
+#define OS_MBOX_QUERY_EN          1u   /*     Include code for OSMboxQuery()                           */
+
+
+                                       /* --------------------- MEMORY MANAGEMENT -------------------- */
+#define OS_MEM_EN                 1u   /* Enable (1) or Disable (0) code generation for MEMORY MANAGER */
+#define OS_MEM_NAME_EN            1u   /*     Enable memory partition names                            */
+#define OS_MEM_QUERY_EN           1u   /*     Include code for OSMemQuery()                            */
+
+
+                                       /* ---------------- MUTUAL EXCLUSION SEMAPHORES --------------- */
+#define OS_MUTEX_EN               1u   /* Enable (1) or Disable (0) code generation for MUTEX          */
+#define OS_MUTEX_ACCEPT_EN        1u   /*     Include code for OSMutexAccept()                         */
+#define OS_MUTEX_DEL_EN           1u   /*     Include code for OSMutexDel()                            */
+#define OS_MUTEX_QUERY_EN         1u   /*     Include code for OSMutexQuery()                          */
+
+
+                                       /* ---------------------- MESSAGE QUEUES ---------------------- */
+#define OS_Q_EN                   1u   /* Enable (1) or Disable (0) code generation for QUEUES         */
+#define OS_Q_ACCEPT_EN            1u   /*     Include code for OSQAccept()                             */
+#define OS_Q_DEL_EN               1u   /*     Include code for OSQDel()                                */
+#define OS_Q_FLUSH_EN             1u   /*     Include code for OSQFlush()                              */
+#define OS_Q_PEND_ABORT_EN        1u   /*     Include code for OSQPendAbort()                          */
+#define OS_Q_POST_EN              1u   /*     Include code for OSQPost()                               */
+#define OS_Q_POST_FRONT_EN        1u   /*     Include code for OSQPostFront()                          */
+#define OS_Q_POST_OPT_EN          1u   /*     Include code for OSQPostOpt()                            */
+#define OS_Q_QUERY_EN             1u   /*     Include code for OSQQuery()                              */
+
+
+                                       /* ------------------------ SEMAPHORES ------------------------ */
+#define OS_SEM_EN                 1u   /* Enable (1) or Disable (0) code generation for SEMAPHORES     */
+#define OS_SEM_ACCEPT_EN          1u   /*    Include code for OSSemAccept()                            */
+#define OS_SEM_DEL_EN             1u   /*    Include code for OSSemDel()                               */
+#define OS_SEM_PEND_ABORT_EN      1u   /*    Include code for OSSemPendAbort()                         */
+#define OS_SEM_QUERY_EN           1u   /*    Include code for OSSemQuery()                             */
+#define OS_SEM_SET_EN             1u   /*    Include code for OSSemSet()                               */
+
+
+                                       /* --------------------- TIME MANAGEMENT ---------------------- */
+#define OS_TIME_DLY_HMSM_EN       1u   /*     Include code for OSTimeDlyHMSM()                         */
+#define OS_TIME_DLY_RESUME_EN     1u   /*     Include code for OSTimeDlyResume()                       */
+#define OS_TIME_GET_SET_EN        1u   /*     Include code for OSTimeGet() and OSTimeSet()             */
+#define OS_TIME_TICK_HOOK_EN      1u   /*     Include code for OSTimeTickHook()                        */
+
+
+                                       /* --------------------- TIMER MANAGEMENT --------------------- */
+#define OS_TMR_EN                 1u   /* Enable (1) or Disable (0) code generation for TIMERS         */
+#define OS_TMR_CFG_MAX           16u   /*     Maximum number of timers                                 */
+#define OS_TMR_CFG_NAME_EN        1u   /*     Determine timer names                                    */
+#define OS_TMR_CFG_WHEEL_SIZE     7u   /*     Size of timer wheel (#Spokes)                            */
+#define OS_TMR_CFG_TICKS_PER_SEC 10u   /*     Rate at which timer management task runs (Hz)            */
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu.h b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu.h
new file mode 100644
index 0000000..0df10a1
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu.h
@@ -0,0 +1,314 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                      Generic ARM Cortex-A Port
+*
+* File      : OS_CPU.H
+* Version   : V2.92.11.00
+* By        : JBL
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+*
+* For       : ARM Cortex-A
+* Mode      : ARM or Thumb
+* Toolchain : GNU
+*
+* Note(s) : (1) This port supports the entire 32-bit ARM Cortex-A line from the A5 to the A15
+*               with every possible VFP/NEON coprocessor options.
+*
+*           (2) To support the various FPUs three versions of os_cpu_a.s are provided.
+*               Only one of them must be used at a time as outlined below.
+*
+*               os_cpu_a_vfp-none.s
+*                 Suitable when there is no VFP/NEON support or they are deactivated.
+*                 Can also be used when saving the VFP/NEON register bank isn’t required.
+*
+*               os_cpu_a_vfp-d32.s
+*                 Suitable for cpus implementing the NEON Media Processing Engine with
+*                 32 double word registers.
+*
+*               os_cpu_a_vfp-d16.s
+*                 Suitable for cpus with VFP-only support and 16 double word registers.
+*                 Must also be used when the CPACR.D32DIS bit is set and access to registers
+*                 D16-D31 would cause an exception.
+*********************************************************************************************************
+*/
+
+#ifndef  OS_CPU_H
+#define  OS_CPU_H
+
+#ifdef   OS_CPU_GLOBALS
+#define  OS_CPU_EXT
+#else
+#define  OS_CPU_EXT  extern
+#endif
+
+
+#ifndef  OS_CPU_EXCEPT_STK_SIZE
+#define  OS_CPU_EXCEPT_STK_SIZE    1024u                         /* Default exception stack size is 128 OS_STK entries.  */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CONFIGURATION DEFAULTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_ARM_ENDIAN_LITTLE                         1u
+#define  OS_CPU_ARM_ENDIAN_BIG                            2u
+
+
+#if (defined(__BYTE_ORDER__) && \
+            (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
+#define  OS_CPU_ARM_ENDIAN_TYPE            OS_CPU_ARM_ENDIAN_BIG
+#else
+#define  OS_CPU_ARM_ENDIAN_TYPE            OS_CPU_ARM_ENDIAN_LITTLE
+#endif
+
+#ifndef  OS_CPU_INT_DIS_MEAS_EN
+#define  OS_CPU_INT_DIS_MEAS_EN    0u                           /* Intrrupt dis time measurement disabled by default  */
+#endif
+
+#ifndef  OS_CPU_ARM_DCC_EN
+#define  OS_CPU_ARM_DCC_EN         0u                           /* DCC support disabled by default                    */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       ARM EXCEPTION DEFINES
+*********************************************************************************************************
+*/
+
+                                                            /* ARM exception IDs                                      */
+#define  OS_CPU_ARM_EXCEPT_RESET                      0x00u
+#define  OS_CPU_ARM_EXCEPT_UNDEF_INSTR                0x01u
+#define  OS_CPU_ARM_EXCEPT_SWI                        0x02u
+#define  OS_CPU_ARM_EXCEPT_PREFETCH_ABORT             0x03u
+#define  OS_CPU_ARM_EXCEPT_DATA_ABORT                 0x04u
+#define  OS_CPU_ARM_EXCEPT_ADDR_ABORT                 0x05u
+#define  OS_CPU_ARM_EXCEPT_IRQ                        0x06u
+#define  OS_CPU_ARM_EXCEPT_FIQ                        0x07u
+#define  OS_CPU_ARM_EXCEPT_NBR                        0x08u
+
+
+                                                            /* ARM exception vectors addresses                        */
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_RST                (OS_CPU_ARM_EXCEPT_RST            * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_UND                (OS_CPU_ARM_EXCEPT_UND            * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_SWI                (OS_CPU_ARM_EXCEPT_SWI            * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_ABORT_PREFETCH     (OS_CPU_ARM_EXCEPT_ABORT_PREFETCH * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_ABORT_DATA         (OS_CPU_ARM_EXCEPT_ABORT_DATA     * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_IRQ                (OS_CPU_ARM_EXCEPT_IRQ            * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_FIQ                (OS_CPU_ARM_EXCEPT_FIQ            * 0x04u + 0x00u)
+
+                                                            /* ARM exception handlers addresses                       */
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_RST             (OS_CPU_ARM_EXCEPT_RST            * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_UND             (OS_CPU_ARM_EXCEPT_UND            * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_SWI             (OS_CPU_ARM_EXCEPT_SWI            * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_ABORT_PREFETCH  (OS_CPU_ARM_EXCEPT_ABORT_PREFETCH * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_ABORT_DATA      (OS_CPU_ARM_EXCEPT_ABORT_DATA     * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_IRQ             (OS_CPU_ARM_EXCEPT_IRQ            * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_FIQ             (OS_CPU_ARM_EXCEPT_FIQ            * 0x04u + 0x20u)
+
+                                                            /* ARM "Jump To Self" asm instruction                     */
+#define  OS_CPU_ARM_INSTR_JUMP_TO_SELF                 0xEAFFFFFEu
+                                                            /* ARM "Jump To Exception Handler" asm instruction        */
+#define  OS_CPU_ARM_INSTR_JUMP_TO_HANDLER              0xE59FF018u
+
+#define  OS_CPU_ARM_BIT_CPSR_N                     (1u  << 31u)
+#define  OS_CPU_ARM_BIT_CPSR_Z                     (1u  << 30u)
+#define  OS_CPU_ARM_BIT_CPSR_C                     (1u  << 29u)
+#define  OS_CPU_ARM_BIT_CPSR_V                     (1u  << 28u)
+#define  OS_CPU_ARM_BIT_CPSR_Q                     (1u  << 27u)
+#define  OS_CPU_ARM_BIT_CPSR_J                     (1u  << 24u)
+#define  OS_CPU_ARM_MSK_CPSR_GE                    (0xF << 16u)
+
+#define  OS_CPU_ARM_BIT_CPSR_E                     (1u << 9u)
+#define  OS_CPU_ARM_BIT_CPSR_A                     (1u << 8u)
+#define  OS_CPU_ARM_BIT_CPSR_I                     (1u << 7u)
+#define  OS_CPU_ARM_BIT_CPSR_F                     (1u << 6u)
+#define  OS_CPU_ARM_BIT_CPSR_T                     (1u << 5u)
+#define  OS_CPU_ARM_MSK_CPSR_MODE                         0x1Fu
+#define  OS_CPU_ARM_BIT_CPSR_MODE_USER                    0x10u
+#define  OS_CPU_ARM_BIT_CPSR_MODE_FIQ                     0x11u
+#define  OS_CPU_ARM_BIT_CPSR_MODE_IRQ                     0x12u
+#define  OS_CPU_ARM_BIT_CPSR_MODE_SUPERVISOR              0x13u
+#define  OS_CPU_ARM_BIT_CPSR_MODE_ABORT                   0x17u
+#define  OS_CPU_ARM_BIT_CPSR_MODE_UNDEFINED               0x1Bu
+#define  OS_CPU_ARM_BIT_CPSR_MODE_SYSTEM                  0x1Fu
+
+#define  OS_CPU_ARM_BIT_FPEXC_EN                   (1u << 30u)
+
+
+/*
+*********************************************************************************************************
+*                                              DATA TYPES
+*                                         (Compiler Specific)
+*********************************************************************************************************
+*/
+
+typedef unsigned char  BOOLEAN;
+typedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */
+typedef signed   char  INT8S;                    /* Signed    8 bit quantity                           */
+typedef unsigned short INT16U;                   /* Unsigned 16 bit quantity                           */
+typedef signed   short INT16S;                   /* Signed   16 bit quantity                           */
+typedef unsigned int   INT32U;                   /* Unsigned 32 bit quantity                           */
+typedef signed   int   INT32S;                   /* Signed   32 bit quantity                           */
+typedef float          FP32;                     /* Single precision floating point                    */
+typedef double         FP64;                     /* Double precision floating point                    */
+
+typedef unsigned int   OS_STK;                   /* Each stack entry is 32-bit wide                    */
+typedef unsigned int   OS_CPU_SR;                /* Define size of CPU status register (PSR = 32 bits) */
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+#define  OS_TASK_SW()                           OSCtxSw()
+#define  OS_STK_GROWTH                           1u         /* Stack grows from HIGH to LOW memory on ARM        */
+
+/*
+*********************************************************************************************************
+*                                                ARM
+*
+* Method #1:  Disable/Enable interrupts using simple instructions.  After critical section, interrupts
+*             will be enabled even if they were disabled before entering the critical section.
+*             NOT IMPLEMENTED
+*
+* Method #2:  Disable/Enable interrupts by preserving the state of interrupts.  In other words, if
+*             interrupts were disabled before entering the critical section, they will be disabled when
+*             leaving the critical section.
+*             NOT IMPLEMENTED
+*
+* Method #3:  Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+*             would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+*             disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+*             disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+*             into the CPU's status register.
+*********************************************************************************************************
+*/
+
+#define  OS_CRITICAL_METHOD    3u
+
+
+#if      OS_CRITICAL_METHOD == 3u
+
+#if      OS_CPU_INT_DIS_MEAS_EN > 0u
+
+#define  OS_ENTER_CRITICAL()  do { cpu_sr = OS_CPU_SR_Save();  \
+                                   OS_CPU_IntDisMeasStart();  } while (0)
+#define  OS_EXIT_CRITICAL()   do { OS_CPU_IntDisMeasStop();    \
+                                   OS_CPU_SR_Restore(cpu_sr); } while (0)
+
+#else
+
+#define  OS_ENTER_CRITICAL()  do {cpu_sr = OS_CPU_SR_Save();} while (0)
+#define  OS_EXIT_CRITICAL()   do {OS_CPU_SR_Restore(cpu_sr);} while (0)
+
+#endif
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+                                                                /* Variables used to measure interrupt disable time     */
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasNestingCtr;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsEnter;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsExit;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsMax;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsDelta;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsOvrhd;
+#endif
+
+OS_CPU_EXT  OS_STK   OS_CPU_ExceptStk[OS_CPU_EXCEPT_STK_SIZE];
+OS_CPU_EXT  OS_STK  *OS_CPU_ExceptStkBase;
+OS_CPU_EXT  OS_STK  *OS_CPU_ExceptStkPtr;
+
+OS_CPU_EXT  INT32U   OS_CPU_ARM_DRegCnt;                        /* VFP/NEON register count                              */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if OS_CRITICAL_METHOD == 3u                                    /* See OS_CPU_A.ASM                                     */
+    OS_CPU_SR  OS_CPU_SR_Save                     (void);
+    void       OS_CPU_SR_Restore                  (OS_CPU_SR cpu_sr);
+#endif
+
+    void       OS_CPU_SR_INT_Dis                  (void);
+    void       OS_CPU_SR_INT_En                   (void);
+    void       OS_CPU_SR_FIQ_Dis                  (void);
+    void       OS_CPU_SR_FIQ_En                   (void);
+    void       OS_CPU_SR_IRQ_Dis                  (void);
+    void       OS_CPU_SR_IRQ_En                   (void);
+
+    void       OSCtxSw                            (void);
+    void       OSIntCtxSw                         (void);
+    void       OSStartHighRdy                     (void);
+
+    void       OS_CPU_InitExceptVect              (void);
+
+    void       OS_CPU_ARM_ExceptUndefInstrHndlr   (void);
+    void       OS_CPU_ARM_ExceptSwiHndlr          (void);
+    void       OS_CPU_ARM_ExceptPrefetchAbortHndlr(void);
+    void       OS_CPU_ARM_ExceptDataAbortHndlr    (void);
+    void       OS_CPU_ARM_ExceptIrqHndlr          (void);
+    void       OS_CPU_ARM_ExceptFiqHndlr          (void);
+
+    void       OS_CPU_ExceptHndlr                 (INT32U  src_id);
+
+    INT32U     OS_CPU_ExceptStkChk                (void);
+
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+    void       OS_CPU_IntDisMeasInit              (void);
+    void       OS_CPU_IntDisMeasStart             (void);
+    void       OS_CPU_IntDisMeasStop              (void);
+    INT16U     OS_CPU_IntDisMeasTmrRd             (void);
+#endif
+
+#if OS_CPU_ARM_DCC_EN > 0u
+    void       OSDCC_Handler                      (void);
+#endif
+
+    INT32U     OS_CPU_ARM_DRegCntGet              (void);
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d16.S b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d16.S
new file mode 100644
index 0000000..874e327
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d16.S
@@ -0,0 +1,799 @@
+@
+@********************************************************************************************************
+@                                                uC/OS-II
+@                                          The Real-Time Kernel
+@
+@
+@                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+@                    All rights reserved.  Protected by international copyright laws.
+@
+@                                       Generic ARM Cortex-A Port
+@
+@ File      : OS_CPU_A_VFP-D16.S
+@ Version   : V2.92.11.00
+@ By        : JBL
+@
+@ LICENSING TERMS:
+@ ---------------
+@           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+@           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+@           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+@           application/product.   We provide ALL the source code for your convenience and to help you
+@           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+@           it commercially without paying a licensing fee.
+@
+@           Knowledge of the source code may NOT be used to develop a similar product.
+@
+@           Please help us continue to provide the embedded community with the finest software available.
+@           Your honesty is greatly appreciated.
+@
+@           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+@
+@ For       : ARM Cortex-A
+@ Mode      : ARM or Thumb
+@ Toolchain : GNU
+@
+@ Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+@********************************************************************************************************
+@
+
+@********************************************************************************************************
+@                                          EXTERNAL REFERENCE
+@********************************************************************************************************
+                                                                @ .external references.
+    .extern     OSRunning
+    .extern     OSPrioCur
+    .extern     OSPrioHighRdy
+    .extern     OSTCBCur
+    .extern     OSTCBHighRdy
+    .extern     OSIntNesting
+    .extern     OSIntExit
+    .extern     OSTaskSwHook    
+    .extern     OS_CPU_ExceptStkBase
+    .extern     OS_CPU_ExceptStkPtr
+    .extern     OS_CPU_ExceptHndlr                              @ Chip Support/BSP specific exception handler.
+    .extern		OS_CPU_HardExcHandler
+    .extern		CoreDump
+
+
+@********************************************************************************************************
+@                                            FUNCTIONS
+@********************************************************************************************************
+
+                                                                @ Functions declared in this file.
+    .global  OS_CPU_SR_Save
+    .global  OS_CPU_SR_Restore
+
+    .global  OSStartHighRdy
+    .global  OSCtxSw
+    .global  OSIntCtxSw
+
+                                                                @ Functions related to exception handling.
+    .global  OS_CPU_ARM_ExceptUndefInstrHndlr
+    .global  OS_CPU_ARM_ExceptSwiHndlr
+    .global  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    .global  OS_CPU_ARM_ExceptDataAbortHndlr
+    .global  OS_CPU_ARM_ExceptIrqHndlr
+    .global  OS_CPU_ARM_ExceptFiqHndlr
+
+    .global  OS_CPU_SR_INT_Dis
+    .global  OS_CPU_SR_INT_En
+    .global  OS_CPU_SR_FIQ_Dis
+    .global  OS_CPU_SR_FIQ_En
+    .global  OS_CPU_SR_IRQ_Dis
+    .global  OS_CPU_SR_IRQ_En
+
+    .global  OS_CPU_ARM_DRegCntGet
+
+
+@********************************************************************************************************
+@                                               EQUATES
+@********************************************************************************************************
+
+    .equ     OS_CPU_ARM_CONTROL_INT_DIS,        0xC0                    @ Disable both FIQ and IRQ.
+    .equ     OS_CPU_ARM_CONTROL_FIQ_DIS,        0x40                    @ Disable FIQ.
+    .equ     OS_CPU_ARM_CONTROL_IRQ_DIS,        0x80                    @ Disable IRQ.
+    .equ     OS_CPU_ARM_CONTROL_THUMB,          0x20                    @ Set THUMB mode.
+    .equ     OS_CPU_ARM_CONTROL_ARM,            0x00                    @ Set ARM mode.
+
+    .equ     OS_CPU_ARM_MODE_MASK,              0x1F
+    .equ     OS_CPU_ARM_MODE_USR,               0x10
+    .equ     OS_CPU_ARM_MODE_FIQ,               0x11
+    .equ     OS_CPU_ARM_MODE_IRQ,               0x12
+    .equ     OS_CPU_ARM_MODE_SVC,               0x13
+    .equ     OS_CPU_ARM_MODE_ABT,               0x17
+    .equ     OS_CPU_ARM_MODE_UND,               0x1B
+    .equ     OS_CPU_ARM_MODE_SYS,               0x1F
+
+    .equ     OS_CPU_ARM_EXCEPT_RESET,           0x00
+    .equ     OS_CPU_ARM_EXCEPT_UNDEF_INSTR,     0x01
+    .equ     OS_CPU_ARM_EXCEPT_SWI,             0x02
+    .equ     OS_CPU_ARM_EXCEPT_PREFETCH_ABORT,  0x03
+    .equ     OS_CPU_ARM_EXCEPT_DATA_ABORT,      0x04
+    .equ     OS_CPU_ARM_EXCEPT_ADDR_ABORT,      0x05
+    .equ     OS_CPU_ARM_EXCEPT_IRQ,             0x06
+    .equ     OS_CPU_ARM_EXCEPT_FIQ,             0x07
+
+    .equ     OS_CPU_ARM_FPEXC_EN,               0x40000000               @VFP enable bit.
+
+
+@********************************************************************************************************
+@                                     CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+    .code 32
+
+
+@********************************************************************************************************
+@                                 FLOATING POINT REGISTER MACROS
+@********************************************************************************************************
+
+    .macro  OS_CPU_ARM_FP_REG_POP     rx
+            POP     {\rx}
+            VMSR    FPEXC, \rx                                  @    ... Pop new task's FPEXC
+            FLDMIAD SP!, {D0-D15}                               @    ... Pop new task's General-Purpose floating point registers.
+            POP     {\rx}
+            VMSR    FPSCR, \rx                                  @    ... Pop new task's FPSCR.
+    .endm
+
+    .macro  OS_CPU_ARM_FP_REG_PUSH    rx
+            VMRS    \rx, FPSCR                                  @     ... Save current FPSCR
+            PUSH    {\rx}                                       @     ... Save general-purpose floating-point registers.
+            FSTMDBD SP!, {D0-D15}
+            VMRS    \rx, FPEXC                                  @     ... Save Floating point exception register.
+            PUSH    {\rx}
+    .endm
+
+	.macro  PUSH_OTHER     rx
+	   MRC      p15, 0, \rx, c5, c0, 0                     /* DFSR */
+	   PUSH     {\rx}
+	   MRC      p15, 0, \rx, c6, c0, 0                     /* DFAR */
+	   PUSH     {\rx}
+	   MRC      p15, 0, \rx, c5, c0, 1                     /* IFSR */
+	   PUSH     {\rx}
+	   MRC      p15, 0, \rx, c6, c0, 2                     /* IFAR */
+	   PUSH     {\rx}
+	   MRC      p15, 0, \rx, c1, c1, 0                     /* SCR */
+	   PUSH     {\rx}
+	   MRC      p15, 0, \rx, c1, c1, 2                     /* NSACR */
+	   PUSH     {\rx}
+	   MRC      p15, 0, \rx, c7, c4, 0                     /* PAR */
+	   PUSH     {\rx}
+	   MRC      p15, 0, \rx, c1, c0, 0                     /* SCTLR */
+	   PUSH     {\rx}
+	.endm
+
+	.macro POP_OTHER
+	   ADD      SP, SP, #(8 * 4)
+	.endm
+
+@********************************************************************************************************
+@                                  CRITICAL SECTION METHOD 3 FUNCTIONS
+@
+@ Description: Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+@              would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+@              disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+@              disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+@              into the CPU's status register.
+@
+@ Prototypes : OS_CPU_SR  OS_CPU_SR_Save    (void);
+@              void       OS_CPU_SR_Restore (OS_CPU_SR  os_cpu_sr);
+@
+@
+@ Note(s)    : (1) These functions are used in general like this:
+@
+@                 void Task (void  *p_arg)
+@                 {
+@                                                               /* Allocate storage for CPU status register.            */
+@                 #if (OS_CRITICAL_METHOD == 3)
+@                      OS_CPU_SR  os_cpu_sr;
+@                 #endif
+@
+@                          :
+@                          :
+@                      OS_ENTER_CRITICAL();                     /* os_cpu_sr = OS_CPU_SR_Save();                        */
+@                          :
+@                          :
+@                      OS_EXIT_CRITICAL();                      /* OS_CPU_SR_Restore(cpu_sr);                           */
+@                          :
+@                          :
+@                 }
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_Save, %function
+OS_CPU_SR_Save:
+
+        MRS     R0, CPSR
+        CPSID   IF                                              @ Set IRQ & FIQ bits in CPSR to DISABLE all interrupts.
+        DSB
+        BX      LR                                              @ DISABLED, return the original CPSR contents in R0.
+
+    .type   OS_CPU_SR_Restore, %function
+OS_CPU_SR_Restore:
+
+        DSB
+        MSR     CPSR_c, R0
+        BX      LR
+
+
+@********************************************************************************************************
+@                                         START MULTITASKING
+@                                      void OSStartHighRdy(void)
+@
+@ Note(s) : 1) OSStartHighRdy() MUST:
+@              a) Call OSTaskSwHook() then,
+@              b) Set OSRunning to OS_STATE_OS_RUNNING,
+@              c) Switch to the highest priority task.
+@********************************************************************************************************
+
+    .type   OSStartHighRdy, %function
+OSStartHighRdy:
+                                                                @ Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSRunning                             @ OSRunning = TRUE;
+    MOVT    R0, #:upper16:OSRunning
+    MOV     R1, #1
+    STRB    R1, [R0]
+                                                                @ SWITCH TO HIGHEST PRIORITY TASK:
+    MOVW    R0, #:lower16:OSTCBHighRdy                          @    Get highest priority task TCB address,
+    MOVT    R0, #:upper16:OSTCBHighRdy
+    LDR     R0, [R0]                                            @    Get stack pointer,
+    LDR     SP, [R0]                                            @    Switch to the new stack,
+
+    OS_CPU_ARM_FP_REG_POP R0
+
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+@
+@ Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) Save the current task's context onto the current task's stack,
+@              b) OSTCBCur->StkPtr = SP;
+@              c) OSTaskSwHook();
+@              d) OSPrioCur           = OSPrioHighRdy;
+@              e) OSTCBCurPtr         = OSTCBHighRdy;
+@              f) SP                  = OSTCBHighRdy->StkPtr;
+@              g) Restore the new task's context from the new task's stack,
+@              h) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSCtxSw, %function
+OSCtxSw:
+                                                                @ SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           @     Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       @     Push registers,
+    MRS     R0, CPSR                                            @     Push current CPSR,
+    TST     LR, #1                                              @     See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   @     If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    OS_CPU_ARM_FP_REG_PUSH  R0                                  @     Push FP context
+
+    CLREX                                                       @ Clear exclusive monitor.
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur->StkPtr = SP;
+    MOVT    R0, #:upper16:OSTCBCur
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur = OSTCBHighRdy;
+    MOVT    R0, #:upper16:OSTCBCur
+    MOVW    R1, #:lower16:OSTCBHighRdy
+    MOVT    R1, #:upper16:OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdy->OSTCBStkPtr;
+
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    OS_CPU_ARM_FP_REG_POP    R0                                 @    Pop new task's FP context.
+
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+@
+@ Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) OSTaskSwHook();
+@              b) OSPrioCur   = OSPrioHighRdy;
+@              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+@              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+@              e) Restore the new task's context from the new task's stack,
+@              f) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSIntCtxSw, %function
+OSIntCtxSw:
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur = OSTCBHighRdy;
+    MOVT    R0, #:upper16:OSTCBCur
+    MOVW    R1, #:lower16:OSTCBHighRdy
+    MOVT    R1, #:upper16:OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+	
+    CLREX                                                       @ Clear the exclusive acess tag for the processor.
+
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    OS_CPU_ARM_FP_REG_POP R0                                    @    Pop new task's FP context.
+
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+	.type OS_CPU_ARM_ExceptUndefInstrHndlr, %function
+	.func OS_CPU_ARM_ExceptUndefInstrHndlr
+OS_CPU_ARM_ExceptUndefInstrHndlr:
+                                                      /* LR offset to return from exception:  0.  */
+    STMFD   SP!, {R0-R12, LR}                         /* push non-banked registers on und-stack   */
+    PUSH_OTHER R0
+    OS_CPU_ARM_FP_REG_PUSH  R0                        /* Push FPU-Register on Stack               */
+    MOV		R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR
+    LDR		R3, =CoreDump
+    STR		SP, [R3]
+    B       OS_CPU_HardExcHandler                             /* jump to global exception handler         */
+    .endfunc
+
+
+@********************************************************************************************************
+@                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          @ Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                  PREFETCH ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+	.type OS_CPU_ARM_ExceptPrefetchAbortHndlr, %function
+	.func OS_CPU_ARM_ExceptPrefetchAbortHndlr
+OS_CPU_ARM_ExceptPrefetchAbortHndlr:
+	SUB     LR, LR, #4                                /* LR offset to return from exception: -4.  */
+    STMFD   SP!, {R0-R12, LR}                         /* push non-banked registers on abt-stack   */
+    PUSH_OTHER R0
+    OS_CPU_ARM_FP_REG_PUSH  R0                        /* Push FPU-Register on Stack               */
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT     /* Set exception ID                         */
+    LDR		R3, =CoreDump
+    STR		SP, [R3]
+    B       OS_CPU_HardExcHandler                             /* jump to global exception handler         */
+    .endfunc
+
+
+@********************************************************************************************************
+@                                    DATA ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+	.type OS_CPU_ARM_ExceptDataAbortHndlr, %function
+	.func OS_CPU_ARM_ExceptDataAbortHndlr
+OS_CPU_ARM_ExceptDataAbortHndlr:
+    SUB     LR, LR, #8                                /* LR offset to return from exception: -8.  */
+    STMFD   SP!, {R0-R12, LR}                         /* push non-banked registers on abt-stack   */
+    PUSH_OTHER R0
+    OS_CPU_ARM_FP_REG_PUSH  R0                        /* Push FPU-Register on Stack               */
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT         /* Set exception ID                         */
+    LDR		R3, =CoreDump
+    STR		SP, [R3]
+    B       OS_CPU_HardExcHandler                             /* jump to global exception handler         */
+    .endfunc
+
+
+@********************************************************************************************************
+@                                   ADDRESS ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                 INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                      GLOBAL EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1     Exception's SPSR
+@                  R2     Return PC
+@                  R3     Exception's SP
+@
+@ Note(s)       : 1) An exception can occur in three different circumstances@ in each of these, the
+@                    SVC stack pointer will point to a different entity :
+@
+@                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+@                       SVC STACK: Should point to a stack initialized by the application's startup code.
+@                       STK USAGE: Interrupted context -- SVC stack.
+@                                  Exception           -- SVC stack.
+@                                  Nested exceptions   -- SVC stack.
+@
+@                    b) CONDITION: An exception interrupts a task.
+@                       SVC STACK: Should point to task stack.
+@                       STK USAGE: Interrupted context -- Task stack.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@
+@                    c) CONDITION: An exception interrupts another exception.
+@                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+@                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr:
+
+    MRS     R1, SPSR                                            @ Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              @ Save exception's stack pointer.
+
+                                                                @ Adjust exception stack pointer.  This is needed because
+                                                                @ exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           @   Push task's PC,
+    STMFD   SP!, {LR}                                           @   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       @   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        @   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           @   Push task's CPSR (i.e. exception SPSR).
+
+    OS_CPU_ARM_FP_REG_PUSH   R1
+
+    MOVW    R3, #:lower16:OSRunning                             @ if (OSRunning == 1)
+    MOVT    R3, #:upper16:OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNesting                          @   OSIntNestingCtr++;
+    MOVT    R3, #:upper16:OSIntNesting
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              @ if (OSIntNestingCtr == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+@********************************************************************************************************
+@                                 EXCEPTION HANDLER: TASK INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask:
+
+    MOVW    R3, #:lower16:OSTCBCur                              @ OSTCBCurPtr->StkPtr = SP;
+    MOVT    R3, #:upper16:OSTCBCur
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+    MOVW    R3, #:lower16:OS_CPU_ExceptStkBase                  @ Switch to exception stack.
+    MOVT    R3, #:upper16:OS_CPU_ExceptStkBase
+    LDR     SP, [R3]
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ Call OSIntExit().  This call MAY never return if a ready
+                                                                @ task with higher priority than the interrupted one is
+                                                                @ found.
+    BL      OSIntExit
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+    MOVW    R3, #:lower16:OSTCBCur                              @ SP = OSTCBCurPtr->StkPtr;
+    MOVT    R3, #:upper16:OSTCBCur
+    LDR     R4,  [R3]
+    LDR     SP,  [R4]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNesting                          @   OSIntNestingCtr--;
+    MOVT    R3, #:upper16:OSIntNesting
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@********************************************************************************************************
+@                                 ENABLE & DISABLE INTERRUPTS, IRQs, FIQs
+@********************************************************************************************************
+@********************************************************************************************************
+
+@********************************************************************************************************
+@                                       ENABLE & DISABLE INTERRUPTS
+@
+@ Note(s) : 1) OS_CPU_SR_INT_En() can be called by OS_CPU_ExceptHndlr() AFTER the .external
+@              interrupt source has been cleared.  This function will enable IRQs and FIQs so that
+@              nesting can occur.
+@
+@           2) OS_CPU_ARM_INT_Dis() can be called to disable IRQs and FIQs so that nesting will not occur.
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_INT_En, %function
+OS_CPU_SR_INT_En:
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 @ Clear IRQ and FIQ bits in CPSR to enable all interrupts.
+    MSR     CPSR_c, R0
+    BX      LR
+
+    .type   OS_CPU_SR_INT_Dis, %function
+OS_CPU_SR_INT_Dis:
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 @ Set IRQ and FIQ bits in CPSR to disable all interrupts.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+@********************************************************************************************************
+@                                          ENABLE & DISABLE IRQs
+@
+@ Note(s) : 1) OS_CPU_SR_IRQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the .external
+@              interrupt source has been cleared.  This function will enable IRQs so that IRQ nesting
+@              can occur.
+@
+@           2) OS_CPU_ARM_IRQ_Dis() can be called to disable IRQs so that IRQ nesting will not occur.
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_IRQ_En, %function
+OS_CPU_SR_IRQ_En:
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 @ Clear IRQ bit in CPSR to enable IRQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+    .type   OS_CPU_SR_IRQ_Dis, %function
+OS_CPU_SR_IRQ_Dis:
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 @ Set IRQ bit in CPSR to disable IRQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+@********************************************************************************************************
+@                                          ENABLE & DISABLE FIQs
+@
+@ Note(s) : 1) OS_CPU_SR_FIQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the .external
+@              interrupt source has been cleared.  This function will enable FIQs so that FIQ nesting
+@              can occur.
+@
+@           2) OS_CPU_ARM_FIQ_Dis() can be called to disable FIQs so that FIQ nesting will not occur.
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_FIQ_En, %function
+OS_CPU_SR_FIQ_En:
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 @ Clear FIQ bit in CPSR to enable FIQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+    .type   OS_CPU_SR_FIQ_Dis, %function
+OS_CPU_SR_FIQ_Dis:
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 @ Set FIQ bit in CPSR to disable FIQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+@********************************************************************************************************
+@                              VFP/NEON REGISTER COUNT
+@
+@ Register Usage:  R0     Double Register Count
+@********************************************************************************************************
+
+    .type   OS_CPU_ARM_DRegCntGet, %function
+OS_CPU_ARM_DRegCntGet:
+
+    MOV     R0, #16
+    BX      LR
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d32.S b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d32.S
new file mode 100644
index 0000000..fe1c714
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d32.S
@@ -0,0 +1,759 @@
+@
+@********************************************************************************************************
+@                                                uC/OS-II
+@                                          The Real-Time Kernel
+@
+@
+@                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+@                    All rights reserved.  Protected by international copyright laws.
+@
+@                                       Generic ARM Cortex-A Port
+@
+@ File      : OS_CPU_A_VFP-D32.S
+@ Version   : V2.92.11.00
+@ By        : JBL
+@
+@ LICENSING TERMS:
+@ ---------------
+@           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+@           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+@           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+@           application/product.   We provide ALL the source code for your convenience and to help you
+@           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+@           it commercially without paying a licensing fee.
+@
+@           Knowledge of the source code may NOT be used to develop a similar product.
+@
+@           Please help us continue to provide the embedded community with the finest software available.
+@           Your honesty is greatly appreciated.
+@
+@           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+@
+@ For       : ARM Cortex-A
+@ Mode      : ARM or Thumb
+@ Toolchain : GNU
+@
+@ Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+@********************************************************************************************************
+@
+
+@********************************************************************************************************
+@                                          EXTERNAL REFERENCE
+@********************************************************************************************************
+                                                                @ .external references.
+    .extern     OSRunning
+    .extern     OSPrioCur
+    .extern     OSPrioHighRdy
+    .extern     OSTCBCur
+    .extern     OSTCBHighRdy
+    .extern     OSIntNesting
+    .extern     OSIntExit
+    .extern     OSTaskSwHook    
+    .extern     OS_CPU_ExceptStkBase
+    .extern     OS_CPU_ExceptStkPtr
+    .extern     OS_CPU_ExceptHndlr                              @ Chip Support/BSP specific exception handler.
+
+
+@********************************************************************************************************
+@                                            FUNCTIONS
+@********************************************************************************************************
+
+                                                                @ Functions declared in this file.
+    .global  OS_CPU_SR_Save
+    .global  OS_CPU_SR_Restore
+
+    .global  OSStartHighRdy
+    .global  OSCtxSw
+    .global  OSIntCtxSw
+
+                                                                @ Functions related to exception handling.
+    .global  OS_CPU_ARM_ExceptUndefInstrHndlr
+    .global  OS_CPU_ARM_ExceptSwiHndlr
+    .global  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    .global  OS_CPU_ARM_ExceptDataAbortHndlr
+    .global  OS_CPU_ARM_ExceptIrqHndlr
+    .global  OS_CPU_ARM_ExceptFiqHndlr
+
+    .global  OS_CPU_SR_INT_Dis
+    .global  OS_CPU_SR_INT_En
+    .global  OS_CPU_SR_FIQ_Dis
+    .global  OS_CPU_SR_FIQ_En
+    .global  OS_CPU_SR_IRQ_Dis
+    .global  OS_CPU_SR_IRQ_En
+
+    .global  OS_CPU_ARM_DRegCntGet
+
+
+@********************************************************************************************************
+@                                               EQUATES
+@********************************************************************************************************
+
+    .equ     OS_CPU_ARM_CONTROL_INT_DIS,        0xC0                    @ Disable both FIQ and IRQ.
+    .equ     OS_CPU_ARM_CONTROL_FIQ_DIS,        0x40                    @ Disable FIQ.
+    .equ     OS_CPU_ARM_CONTROL_IRQ_DIS,        0x80                    @ Disable IRQ.
+    .equ     OS_CPU_ARM_CONTROL_THUMB,          0x20                    @ Set THUMB mode.
+    .equ     OS_CPU_ARM_CONTROL_ARM,            0x00                    @ Set ARM mode.
+
+    .equ     OS_CPU_ARM_MODE_MASK,              0x1F
+    .equ     OS_CPU_ARM_MODE_USR,               0x10
+    .equ     OS_CPU_ARM_MODE_FIQ,               0x11
+    .equ     OS_CPU_ARM_MODE_IRQ,               0x12
+    .equ     OS_CPU_ARM_MODE_SVC,               0x13
+    .equ     OS_CPU_ARM_MODE_ABT,               0x17
+    .equ     OS_CPU_ARM_MODE_UND,               0x1B
+    .equ     OS_CPU_ARM_MODE_SYS,               0x1F
+
+    .equ     OS_CPU_ARM_EXCEPT_RESET,           0x00
+    .equ     OS_CPU_ARM_EXCEPT_UNDEF_INSTR,     0x01
+    .equ     OS_CPU_ARM_EXCEPT_SWI,             0x02
+    .equ     OS_CPU_ARM_EXCEPT_PREFETCH_ABORT,  0x03
+    .equ     OS_CPU_ARM_EXCEPT_DATA_ABORT,      0x04
+    .equ     OS_CPU_ARM_EXCEPT_ADDR_ABORT,      0x05
+    .equ     OS_CPU_ARM_EXCEPT_IRQ,             0x06
+    .equ     OS_CPU_ARM_EXCEPT_FIQ,             0x07
+
+    .equ     OS_CPU_ARM_FPEXC_EN,               0x40000000               @VFP enable bit.
+
+
+@********************************************************************************************************
+@                                     CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+    .code 32
+
+
+@********************************************************************************************************
+@                                 FLOATING POINT REGISTER MACROS
+@********************************************************************************************************
+
+    .macro  OS_CPU_ARM_FP_REG_POP     rx
+            POP     {\rx}
+            VMSR    FPEXC, \rx                                  @    ... Pop new task's FPEXC
+            FLDMIAD SP!, {D16-D31}
+            FLDMIAD SP!, {D0-D15}                               @    ... Pop new task's General-Purpose floating point registers.
+            POP     {\rx}
+            VMSR    FPSCR, \rx                                  @    ... Pop new task's FPSCR.
+    .endm
+
+    .macro  OS_CPU_ARM_FP_REG_PUSH    rx
+            VMRS    \rx, FPSCR                                  @     ... Save current FPSCR
+            PUSH    {\rx}                                       @     ... Save general-purpose floating-point registers.
+            FSTMDBD SP!, {D0-D15}
+            FSTMDBD SP!, {D16-D31}
+            VMRS    \rx, FPEXC                                  @     ... Save Floating point exception register.
+            PUSH    {\rx}
+    .endm
+
+
+@********************************************************************************************************
+@                                  CRITICAL SECTION METHOD 3 FUNCTIONS
+@
+@ Description: Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+@              would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+@              disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+@              disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+@              into the CPU's status register.
+@
+@ Prototypes : OS_CPU_SR  OS_CPU_SR_Save    (void);
+@              void       OS_CPU_SR_Restore (OS_CPU_SR  os_cpu_sr);
+@
+@
+@ Note(s)    : (1) These functions are used in general like this:
+@
+@                 void Task (void  *p_arg)
+@                 {
+@                                                               /* Allocate storage for CPU status register.            */
+@                 #if (OS_CRITICAL_METHOD == 3)
+@                      OS_CPU_SR  os_cpu_sr;
+@                 #endif
+@
+@                          :
+@                          :
+@                      OS_ENTER_CRITICAL();                     /* os_cpu_sr = OS_CPU_SR_Save();                        */
+@                          :
+@                          :
+@                      OS_EXIT_CRITICAL();                      /* OS_CPU_SR_Restore(cpu_sr);                           */
+@                          :
+@                          :
+@                 }
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_Save, %function
+OS_CPU_SR_Save:
+
+        MRS     R0, CPSR
+        CPSID   IF                                              @ Set IRQ & FIQ bits in CPSR to DISABLE all interrupts.
+        DSB
+        BX      LR                                              @ DISABLED, return the original CPSR contents in R0.
+
+    .type   OS_CPU_SR_Restore, %function
+OS_CPU_SR_Restore:
+
+        DSB
+        MSR     CPSR_c, R0
+        BX      LR
+
+
+@********************************************************************************************************
+@                                         START MULTITASKING
+@                                      void OSStartHighRdy(void)
+@
+@ Note(s) : 1) OSStartHighRdy() MUST:
+@              a) Call OSTaskSwHook() then,
+@              b) Set OSRunning to OS_STATE_OS_RUNNING,
+@              c) Switch to the highest priority task.
+@********************************************************************************************************
+
+    .type   OSStartHighRdy, %function
+OSStartHighRdy:
+                                                                @ Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSRunning                             @ OSRunning = TRUE;
+    MOVT    R0, #:upper16:OSRunning
+    MOV     R1, #1
+    STRB    R1, [R0]
+                                                                @ SWITCH TO HIGHEST PRIORITY TASK:
+    MOVW    R0, #:lower16:OSTCBHighRdy                          @    Get highest priority task TCB address,
+    MOVT    R0, #:upper16:OSTCBHighRdy
+    LDR     R0, [R0]                                            @    Get stack pointer,
+    LDR     SP, [R0]                                            @    Switch to the new stack,
+
+    OS_CPU_ARM_FP_REG_POP R0
+
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+@
+@ Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) Save the current task's context onto the current task's stack,
+@              b) OSTCBCur->StkPtr = SP;
+@              c) OSTaskSwHook();
+@              d) OSPrioCur           = OSPrioHighRdy;
+@              e) OSTCBCurPtr         = OSTCBHighRdy;
+@              f) SP                  = OSTCBHighRdy->StkPtr;
+@              g) Restore the new task's context from the new task's stack,
+@              h) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSCtxSw, %function
+OSCtxSw:
+                                                                @ SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           @     Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       @     Push registers,
+    MRS     R0, CPSR                                            @     Push current CPSR,
+    TST     LR, #1                                              @     See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   @     If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    OS_CPU_ARM_FP_REG_PUSH  R0                                  @     Push FP context
+
+    CLREX                                                       @ Clear exclusive monitor.
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur->StkPtr = SP;
+    MOVT    R0, #:upper16:OSTCBCur
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur = OSTCBHighRdy;
+    MOVT    R0, #:upper16:OSTCBCur
+    MOVW    R1, #:lower16:OSTCBHighRdy
+    MOVT    R1, #:upper16:OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdy->OSTCBStkPtr;
+
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    OS_CPU_ARM_FP_REG_POP    R0                                 @    Pop new task's FP context.
+
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+@
+@ Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) OSTaskSwHook();
+@              b) OSPrioCur   = OSPrioHighRdy;
+@              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+@              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+@              e) Restore the new task's context from the new task's stack,
+@              f) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSIntCtxSw, %function
+OSIntCtxSw:
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur = OSTCBHighRdy;
+    MOVT    R0, #:upper16:OSTCBCur
+    MOVW    R1, #:lower16:OSTCBHighRdy
+    MOVT    R1, #:upper16:OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+	
+    CLREX                                                       @ Clear the exclusive acess tag for the processor.
+
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    OS_CPU_ARM_FP_REG_POP R0                                    @    Pop new task's FP context.
+
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  @ Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          @ Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                  PREFETCH ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               @ Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                    DATA ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                   ADDRESS ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                 INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                      GLOBAL EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1     Exception's SPSR
+@                  R2     Return PC
+@                  R3     Exception's SP
+@
+@ Note(s)       : 1) An exception can occur in three different circumstances@ in each of these, the
+@                    SVC stack pointer will point to a different entity :
+@
+@                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+@                       SVC STACK: Should point to a stack initialized by the application's startup code.
+@                       STK USAGE: Interrupted context -- SVC stack.
+@                                  Exception           -- SVC stack.
+@                                  Nested exceptions   -- SVC stack.
+@
+@                    b) CONDITION: An exception interrupts a task.
+@                       SVC STACK: Should point to task stack.
+@                       STK USAGE: Interrupted context -- Task stack.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@
+@                    c) CONDITION: An exception interrupts another exception.
+@                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+@                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr:
+
+    MRS     R1, SPSR                                            @ Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              @ Save exception's stack pointer.
+
+                                                                @ Adjust exception stack pointer.  This is needed because
+                                                                @ exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           @   Push task's PC,
+    STMFD   SP!, {LR}                                           @   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       @   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        @   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           @   Push task's CPSR (i.e. exception SPSR).
+
+    OS_CPU_ARM_FP_REG_PUSH   R1
+
+    MOVW    R3, #:lower16:OSRunning                             @ if (OSRunning == 1)
+    MOVT    R3, #:upper16:OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNesting                          @   OSIntNestingCtr++;
+    MOVT    R3, #:upper16:OSIntNesting
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              @ if (OSIntNestingCtr == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+@********************************************************************************************************
+@                                 EXCEPTION HANDLER: TASK INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask:
+
+    MOVW    R3, #:lower16:OSTCBCur                              @ OSTCBCurPtr->StkPtr = SP;
+    MOVT    R3, #:upper16:OSTCBCur
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+    MOVW    R3, #:lower16:OS_CPU_ExceptStkBase                  @ Switch to exception stack.
+    MOVT    R3, #:upper16:OS_CPU_ExceptStkBase
+    LDR     SP, [R3]
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ Call OSIntExit().  This call MAY never return if a ready
+                                                                @ task with higher priority than the interrupted one is
+                                                                @ found.
+    BL      OSIntExit
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+    MOVW    R3, #:lower16:OSTCBCur                              @ SP = OSTCBCurPtr->StkPtr;
+    MOVT    R3, #:upper16:OSTCBCur
+    LDR     R4,  [R3]
+    LDR     SP,  [R4]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNesting                          @   OSIntNestingCtr--;
+    MOVT    R3, #:upper16:OSIntNesting
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@********************************************************************************************************
+@                                 ENABLE & DISABLE INTERRUPTS, IRQs, FIQs
+@********************************************************************************************************
+@********************************************************************************************************
+
+@********************************************************************************************************
+@                                       ENABLE & DISABLE INTERRUPTS
+@
+@ Note(s) : 1) OS_CPU_SR_INT_En() can be called by OS_CPU_ExceptHndlr() AFTER the .external
+@              interrupt source has been cleared.  This function will enable IRQs and FIQs so that
+@              nesting can occur.
+@
+@           2) OS_CPU_ARM_INT_Dis() can be called to disable IRQs and FIQs so that nesting will not occur.
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_INT_En, %function
+OS_CPU_SR_INT_En:
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 @ Clear IRQ and FIQ bits in CPSR to enable all interrupts.
+    MSR     CPSR_c, R0
+    BX      LR
+
+    .type   OS_CPU_SR_INT_Dis, %function
+OS_CPU_SR_INT_Dis:
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 @ Set IRQ and FIQ bits in CPSR to disable all interrupts.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+@********************************************************************************************************
+@                                          ENABLE & DISABLE IRQs
+@
+@ Note(s) : 1) OS_CPU_SR_IRQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the .external
+@              interrupt source has been cleared.  This function will enable IRQs so that IRQ nesting
+@              can occur.
+@
+@           2) OS_CPU_ARM_IRQ_Dis() can be called to disable IRQs so that IRQ nesting will not occur.
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_IRQ_En, %function
+OS_CPU_SR_IRQ_En:
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 @ Clear IRQ bit in CPSR to enable IRQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+    .type   OS_CPU_SR_IRQ_Dis, %function
+OS_CPU_SR_IRQ_Dis:
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 @ Set IRQ bit in CPSR to disable IRQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+@********************************************************************************************************
+@                                          ENABLE & DISABLE FIQs
+@
+@ Note(s) : 1) OS_CPU_SR_FIQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the .external
+@              interrupt source has been cleared.  This function will enable FIQs so that FIQ nesting
+@              can occur.
+@
+@           2) OS_CPU_ARM_FIQ_Dis() can be called to disable FIQs so that FIQ nesting will not occur.
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_FIQ_En, %function
+OS_CPU_SR_FIQ_En:
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 @ Clear FIQ bit in CPSR to enable FIQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+    .type   OS_CPU_SR_FIQ_Dis, %function
+OS_CPU_SR_FIQ_Dis:
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 @ Set FIQ bit in CPSR to disable FIQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+@********************************************************************************************************
+@                              VFP/NEON REGISTER COUNT
+@
+@ Register Usage:  R0     Double Register Count
+@********************************************************************************************************
+
+    .type   OS_CPU_ARM_DRegCntGet, %function
+OS_CPU_ARM_DRegCntGet:
+
+    MOV     R0, #32
+    BX      LR
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S
new file mode 100644
index 0000000..64fb173
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S
@@ -0,0 +1,723 @@
+@
+@********************************************************************************************************
+@                                                uC/OS-II
+@                                          The Real-Time Kernel
+@
+@
+@                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+@                    All rights reserved.  Protected by international copyright laws.
+@
+@                                       Generic ARM Cortex-A Port
+@
+@ File      : OS_CPU_A_VFP-NONE.S
+@ Version   : V2.92.11.00
+@ By        : JBL
+@
+@ LICENSING TERMS:
+@ ---------------
+@           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+@           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+@           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+@           application/product.   We provide ALL the source code for your convenience and to help you
+@           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+@           it commercially without paying a licensing fee.
+@
+@           Knowledge of the source code may NOT be used to develop a similar product.
+@
+@           Please help us continue to provide the embedded community with the finest software available.
+@           Your honesty is greatly appreciated.
+@
+@           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+@
+@ For       : ARM Cortex-A
+@ Mode      : ARM or Thumb
+@ Toolchain : GNU
+@
+@ Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+@********************************************************************************************************
+@
+
+@********************************************************************************************************
+@                                          EXTERNAL REFERENCE
+@********************************************************************************************************
+                                                                @ .external references.
+    .extern     OSRunning
+    .extern     OSPrioCur
+    .extern     OSPrioHighRdy
+    .extern     OSTCBCur
+    .extern     OSTCBHighRdy
+    .extern     OSIntNesting
+    .extern     OSIntExit
+    .extern     OSTaskSwHook    
+    .extern     OS_CPU_ExceptStkBase
+    .extern     OS_CPU_ExceptStkPtr
+    .extern     OS_CPU_ExceptHndlr                              @ Chip Support/BSP specific exception handler.
+
+
+@********************************************************************************************************
+@                                            FUNCTIONS
+@********************************************************************************************************
+
+                                                                @ Functions declared in this file.
+    .global  OS_CPU_SR_Save
+    .global  OS_CPU_SR_Restore
+
+    .global  OSStartHighRdy
+    .global  OSCtxSw
+    .global  OSIntCtxSw
+
+                                                                @ Functions related to exception handling.
+    .global  OS_CPU_ARM_ExceptUndefInstrHndlr
+    .global  OS_CPU_ARM_ExceptSwiHndlr
+    .global  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    .global  OS_CPU_ARM_ExceptDataAbortHndlr
+    .global  OS_CPU_ARM_ExceptIrqHndlr
+    .global  OS_CPU_ARM_ExceptFiqHndlr
+
+    .global  OS_CPU_SR_INT_Dis
+    .global  OS_CPU_SR_INT_En
+    .global  OS_CPU_SR_FIQ_Dis
+    .global  OS_CPU_SR_FIQ_En
+    .global  OS_CPU_SR_IRQ_Dis
+    .global  OS_CPU_SR_IRQ_En
+
+    .global  OS_CPU_ARM_DRegCntGet
+
+
+@********************************************************************************************************
+@                                               EQUATES
+@********************************************************************************************************
+
+    .equ     OS_CPU_ARM_CONTROL_INT_DIS,        0xC0                    @ Disable both FIQ and IRQ.
+    .equ     OS_CPU_ARM_CONTROL_FIQ_DIS,        0x40                    @ Disable FIQ.
+    .equ     OS_CPU_ARM_CONTROL_IRQ_DIS,        0x80                    @ Disable IRQ.
+    .equ     OS_CPU_ARM_CONTROL_THUMB,          0x20                    @ Set THUMB mode.
+    .equ     OS_CPU_ARM_CONTROL_ARM,            0x00                    @ Set ARM mode.
+
+    .equ     OS_CPU_ARM_MODE_MASK,              0x1F
+    .equ     OS_CPU_ARM_MODE_USR,               0x10
+    .equ     OS_CPU_ARM_MODE_FIQ,               0x11
+    .equ     OS_CPU_ARM_MODE_IRQ,               0x12
+    .equ     OS_CPU_ARM_MODE_SVC,               0x13
+    .equ     OS_CPU_ARM_MODE_ABT,               0x17
+    .equ     OS_CPU_ARM_MODE_UND,               0x1B
+    .equ     OS_CPU_ARM_MODE_SYS,               0x1F
+
+    .equ     OS_CPU_ARM_EXCEPT_RESET,           0x00
+    .equ     OS_CPU_ARM_EXCEPT_UNDEF_INSTR,     0x01
+    .equ     OS_CPU_ARM_EXCEPT_SWI,             0x02
+    .equ     OS_CPU_ARM_EXCEPT_PREFETCH_ABORT,  0x03
+    .equ     OS_CPU_ARM_EXCEPT_DATA_ABORT,      0x04
+    .equ     OS_CPU_ARM_EXCEPT_ADDR_ABORT,      0x05
+    .equ     OS_CPU_ARM_EXCEPT_IRQ,             0x06
+    .equ     OS_CPU_ARM_EXCEPT_FIQ,             0x07
+
+    .equ     OS_CPU_ARM_FPEXC_EN,               0x40000000               @VFP enable bit.
+
+
+@********************************************************************************************************
+@                                     CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+    .code 32
+
+
+@********************************************************************************************************
+@                                  CRITICAL SECTION METHOD 3 FUNCTIONS
+@
+@ Description: Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+@              would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+@              disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+@              disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+@              into the CPU's status register.
+@
+@ Prototypes : OS_CPU_SR  OS_CPU_SR_Save    (void);
+@              void       OS_CPU_SR_Restore (OS_CPU_SR  os_cpu_sr);
+@
+@
+@ Note(s)    : (1) These functions are used in general like this:
+@
+@                 void Task (void  *p_arg)
+@                 {
+@                                                               /* Allocate storage for CPU status register.            */
+@                 #if (OS_CRITICAL_METHOD == 3)
+@                      OS_CPU_SR  os_cpu_sr;
+@                 #endif
+@
+@                          :
+@                          :
+@                      OS_ENTER_CRITICAL();                     /* os_cpu_sr = OS_CPU_SR_Save();                        */
+@                          :
+@                          :
+@                      OS_EXIT_CRITICAL();                      /* OS_CPU_SR_Restore(cpu_sr);                           */
+@                          :
+@                          :
+@                 }
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_Save, %function
+OS_CPU_SR_Save:
+
+        MRS     R0, CPSR
+        CPSID   IF                                              @ Set IRQ & FIQ bits in CPSR to DISABLE all interrupts.
+        DSB
+        BX      LR                                              @ DISABLED, return the original CPSR contents in R0.
+
+    .type   OS_CPU_SR_Restore, %function
+OS_CPU_SR_Restore:
+
+        DSB
+        MSR     CPSR_c, R0
+        BX      LR
+
+
+@********************************************************************************************************
+@                                         START MULTITASKING
+@                                      void OSStartHighRdy(void)
+@
+@ Note(s) : 1) OSStartHighRdy() MUST:
+@              a) Call OSTaskSwHook() then,
+@              b) Set OSRunning to OS_STATE_OS_RUNNING,
+@              c) Switch to the highest priority task.
+@********************************************************************************************************
+
+    .type   OSStartHighRdy, %function
+OSStartHighRdy:
+                                                                @ Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSRunning                             @ OSRunning = TRUE;
+    MOVT    R0, #:upper16:OSRunning
+    MOV     R1, #1
+    STRB    R1, [R0]
+                                                                @ SWITCH TO HIGHEST PRIORITY TASK:
+    MOVW    R0, #:lower16:OSTCBHighRdy                          @    Get highest priority task TCB address,
+    MOVT    R0, #:upper16:OSTCBHighRdy
+    LDR     R0, [R0]                                            @    Get stack pointer,
+    LDR     SP, [R0]                                            @    Switch to the new stack,
+
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+@
+@ Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) Save the current task's context onto the current task's stack,
+@              b) OSTCBCur->StkPtr = SP;
+@              c) OSTaskSwHook();
+@              d) OSPrioCur           = OSPrioHighRdy;
+@              e) OSTCBCurPtr         = OSTCBHighRdy;
+@              f) SP                  = OSTCBHighRdy->StkPtr;
+@              g) Restore the new task's context from the new task's stack,
+@              h) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSCtxSw, %function
+OSCtxSw:
+                                                                @ SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           @     Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       @     Push registers,
+    MRS     R0, CPSR                                            @     Push current CPSR,
+    TST     LR, #1                                              @     See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   @     If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    CLREX                                                       @ Clear exclusive monitor.
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur->StkPtr = SP;
+    MOVT    R0, #:upper16:OSTCBCur
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur = OSTCBHighRdy;
+    MOVT    R0, #:upper16:OSTCBCur
+    MOVW    R1, #:lower16:OSTCBHighRdy
+    MOVT    R1, #:upper16:OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdy->OSTCBStkPtr;
+
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+@
+@ Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) OSTaskSwHook();
+@              b) OSPrioCur   = OSPrioHighRdy;
+@              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+@              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+@              e) Restore the new task's context from the new task's stack,
+@              f) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSIntCtxSw, %function
+OSIntCtxSw:
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur = OSTCBHighRdy;
+    MOVT    R0, #:upper16:OSTCBCur
+    MOVW    R1, #:lower16:OSTCBHighRdy
+    MOVT    R1, #:upper16:OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+	
+    CLREX                                                       @ Clear the exclusive acess tag for the processor.
+
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  @ Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          @ Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                  PREFETCH ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               @ Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                    DATA ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                   ADDRESS ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                 INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                      GLOBAL EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1     Exception's SPSR
+@                  R2     Return PC
+@                  R3     Exception's SP
+@
+@ Note(s)       : 1) An exception can occur in three different circumstances@ in each of these, the
+@                    SVC stack pointer will point to a different entity :
+@
+@                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+@                       SVC STACK: Should point to a stack initialized by the application's startup code.
+@                       STK USAGE: Interrupted context -- SVC stack.
+@                                  Exception           -- SVC stack.
+@                                  Nested exceptions   -- SVC stack.
+@
+@                    b) CONDITION: An exception interrupts a task.
+@                       SVC STACK: Should point to task stack.
+@                       STK USAGE: Interrupted context -- Task stack.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@
+@                    c) CONDITION: An exception interrupts another exception.
+@                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+@                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr:
+
+    MRS     R1, SPSR                                            @ Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              @ Save exception's stack pointer.
+
+                                                                @ Adjust exception stack pointer.  This is needed because
+                                                                @ exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           @   Push task's PC,
+    STMFD   SP!, {LR}                                           @   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       @   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        @   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           @   Push task's CPSR (i.e. exception SPSR).
+
+    MOVW    R3, #:lower16:OSRunning                             @ if (OSRunning == 1)
+    MOVT    R3, #:upper16:OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNesting                          @   OSIntNestingCtr++;
+    MOVT    R3, #:upper16:OSIntNesting
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              @ if (OSIntNestingCtr == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+@********************************************************************************************************
+@                                 EXCEPTION HANDLER: TASK INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask:
+
+    MOVW    R3, #:lower16:OSTCBCur                              @ OSTCBCurPtr->StkPtr = SP;
+    MOVT    R3, #:upper16:OSTCBCur
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+    MOVW    R3, #:lower16:OS_CPU_ExceptStkBase                  @ Switch to exception stack.
+    MOVT    R3, #:upper16:OS_CPU_ExceptStkBase
+    LDR     SP, [R3]
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ Call OSIntExit().  This call MAY never return if a ready
+                                                                @ task with higher priority than the interrupted one is
+                                                                @ found.
+    BL      OSIntExit
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+    MOVW    R3, #:lower16:OSTCBCur                              @ SP = OSTCBCurPtr->StkPtr;
+    MOVT    R3, #:upper16:OSTCBCur
+    LDR     R4,  [R3]
+    LDR     SP,  [R4]
+
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNesting                          @   OSIntNestingCtr--;
+    MOVT    R3, #:upper16:OSIntNesting
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@********************************************************************************************************
+@                                 ENABLE & DISABLE INTERRUPTS, IRQs, FIQs
+@********************************************************************************************************
+@********************************************************************************************************
+
+@********************************************************************************************************
+@                                       ENABLE & DISABLE INTERRUPTS
+@
+@ Note(s) : 1) OS_CPU_SR_INT_En() can be called by OS_CPU_ExceptHndlr() AFTER the .external
+@              interrupt source has been cleared.  This function will enable IRQs and FIQs so that
+@              nesting can occur.
+@
+@           2) OS_CPU_ARM_INT_Dis() can be called to disable IRQs and FIQs so that nesting will not occur.
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_INT_En, %function
+OS_CPU_SR_INT_En:
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 @ Clear IRQ and FIQ bits in CPSR to enable all interrupts.
+    MSR     CPSR_c, R0
+    BX      LR
+
+    .type   OS_CPU_SR_INT_Dis, %function
+OS_CPU_SR_INT_Dis:
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 @ Set IRQ and FIQ bits in CPSR to disable all interrupts.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+@********************************************************************************************************
+@                                          ENABLE & DISABLE IRQs
+@
+@ Note(s) : 1) OS_CPU_SR_IRQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the .external
+@              interrupt source has been cleared.  This function will enable IRQs so that IRQ nesting
+@              can occur.
+@
+@           2) OS_CPU_ARM_IRQ_Dis() can be called to disable IRQs so that IRQ nesting will not occur.
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_IRQ_En, %function
+OS_CPU_SR_IRQ_En:
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 @ Clear IRQ bit in CPSR to enable IRQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+    .type   OS_CPU_SR_IRQ_Dis, %function
+OS_CPU_SR_IRQ_Dis:
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 @ Set IRQ bit in CPSR to disable IRQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+@********************************************************************************************************
+@                                          ENABLE & DISABLE FIQs
+@
+@ Note(s) : 1) OS_CPU_SR_FIQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the .external
+@              interrupt source has been cleared.  This function will enable FIQs so that FIQ nesting
+@              can occur.
+@
+@           2) OS_CPU_ARM_FIQ_Dis() can be called to disable FIQs so that FIQ nesting will not occur.
+@********************************************************************************************************
+
+    .type   OS_CPU_SR_FIQ_En, %function
+OS_CPU_SR_FIQ_En:
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 @ Clear FIQ bit in CPSR to enable FIQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+    .type   OS_CPU_SR_FIQ_Dis, %function
+OS_CPU_SR_FIQ_Dis:
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 @ Set FIQ bit in CPSR to disable FIQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+@********************************************************************************************************
+@                              VFP/NEON REGISTER COUNT
+@
+@ Register Usage:  R0     Double Register Count
+@********************************************************************************************************
+
+    .type   OS_CPU_ARM_DRegCntGet, %function
+OS_CPU_ARM_DRegCntGet:
+
+    MOV     R0, #0
+    BX      LR
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c
new file mode 100644
index 0000000..67b9b06
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c
@@ -0,0 +1,628 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                      Generic ARM Cortex-A Port
+*
+* File      : OS_CPU_C.C
+* Version   : V2.92.11.00
+* By        : JBL
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+*
+* For       : ARM Cortex-A
+* Mode      : ARM or Thumb
+* Toolchain : GNU
+**********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_GLOBALS
+#include 
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*
+* Note(s) : 1) ARM_MODE_ARM       is the CPSR bit mask for ARM Mode
+*           2) ARM_MODE_THUMB     is the CPSR bit mask for THUMB Mode
+*           3) ARM_SVC_MODE_THUMB is the CPSR bit mask for SVC MODE + THUMB Mode
+*           4) ARM_SVC_MODE_ARM   is the CPSR bit mask for SVC MODE + ARM Mode
+*********************************************************************************************************
+*/
+
+#if (OS_CPU_ARM_ENDIAN_TYPE == OS_CPU_ARM_ENDIAN_LITTLE)
+#define  ARM_MODE_ARM           0x00000000u
+#define  ARM_MODE_THUMB         0x00000020u
+#else                                                           /* Set bit 9 in big-endian mode.                        */
+#define  ARM_MODE_ARM           0x00000200u
+#define  ARM_MODE_THUMB         0x00000220u
+#endif
+
+#define  ARM_SVC_MODE_THUMB    (0x00000013u + ARM_MODE_THUMB)
+#define  ARM_SVC_MODE_ARM      (0x00000013u + ARM_MODE_ARM)
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  INT16U  OSTmrCtr;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                            (BEGINNING)
+*
+* Description: This function is called by OSInit() at the beginning of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSInitHookBegin (void)
+{
+    INT32U   size;
+    OS_STK  *pstk;
+
+                                                                /* Clear exception stack for stack checking.            */
+    pstk = &OS_CPU_ExceptStk[0];
+    size = OS_CPU_EXCEPT_STK_SIZE;
+    while (size > 0u) {
+        size--;
+       *pstk++ = (OS_STK)0;
+    }
+                                                                /* Align the ISR stack to 8-bytes                       */
+    OS_CPU_ExceptStkBase = (OS_STK *)&OS_CPU_ExceptStk[OS_CPU_EXCEPT_STK_SIZE];
+    OS_CPU_ExceptStkBase = (OS_STK *)((OS_STK)(OS_CPU_ExceptStkBase) & 0xFFFFFFF8);
+
+    OS_CPU_ARM_DRegCnt = OS_CPU_ARM_DRegCntGet();
+
+#if OS_TMR_EN > 0u
+    OSTmrCtr = 0u;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                               (END)
+*
+* Description: This function is called by OSInit() at the end of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSInitHookEnd (void)
+{
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+    OS_CPU_IntDisMeasInit();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being created.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskCreateHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskCreateHook(ptcb);
+#else
+    (void)ptcb;                                             /* Prevent compiler warning                           */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being deleted.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskDelHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskDelHook(ptcb);
+#else
+    (void)ptcb;                                             /* Prevent compiler warning                 */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do
+*              such things as STOP the CPU to conserve power.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are enabled during this call.
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskIdleHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskIdleHook();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            TASK RETURN HOOK
+*
+* Description: This function is called if a task accidentally returns.  In other words, a task should
+*              either be an infinite loop or delete itself when done.
+*
+* Arguments  : ptcb      is a pointer to the task control block of the task that is returning.
+*
+* Note(s)    : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskReturnHook (OS_TCB  *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskReturnHook(ptcb);
+#else
+    (void)ptcb;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-II's statistics task.  This allows your
+*              application to add functionality to the statistics task.
+*
+* Arguments  : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskStatHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskStatHook();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        INITIALIZE A TASK'S STACK
+*
+* Description: This function is called by either OSTaskCreate() or OSTaskCreateExt() to initialize the
+*              stack frame of the task being created.  This function is highly processor specific.
+*
+* Arguments  : task          is a pointer to the task code
+*
+*              p_arg         is a pointer to a user supplied data area that will be passed to the task
+*                            when the task first executes.
+*
+*              ptos          is a pointer to the top of stack.  It is assumed that 'ptos' points to
+*                            a 'free' entry on the task stack.  If OS_STK_GROWTH is set to 1 then
+*                            'ptos' will contain the HIGHEST valid address of the stack.  Similarly, if
+*                            OS_STK_GROWTH is set to 0, the 'ptos' will contains the LOWEST valid address
+*                            of the stack.
+*
+*              opt           specifies options that can be used to alter the behavior of OSTaskStkInit().
+*                            (see uCOS_II.H for OS_TASK_OPT_xxx).
+*
+* Returns    : Always returns the location of the new top-of-stack once the processor registers have
+*              been placed on the stack in the proper order.
+*
+* Note(s)   : (1) Interrupts are enabled when task starts executing.
+*
+*             (2) All tasks run in SVC mode.
+*
+*             (3) There are three differents stack frames depending on whether or not the Floating-Point (FP) co-processor
+*                 is enabled or not.
+*
+*                 (a) The stack frame shown in the diagram is used when the FP coprocessor is present and
+*                     OS_OPT_TASK_SAVE_FP is enabled. In this case the FP exception register, the FP registers and the
+*                     FP control/status register are saved in the stack frame.
+*
+*                 (b) If the FP co-processor is present but the OS_OPT_TASK_SAVE_FP is not set, only the FP
+*                     exception register is saved in the stack.
+*
+*                     (1) The FP exception register is saved twice in the stack frame to keep the 8-byte aligment.
+*                         (See note #4.)
+*
+*                    +-----------+
+*                    |   FPEXC   |
+*                    +-----------+
+*                    |    S0     |
+*                    +-----------+
+*                          .
+*                          .
+*                          .
+*                    +-----------+
+*                    |    S29    |
+*                    +-----------+
+*                    |    S30    |
+*                    +-----------+       +-----------+
+*                    |    S31    |       |   FPEXC   |
+*                    +-----------+       +-----------+
+*                    |   FPSCR   |       |   FPEXC   |
+*                    +-----------+       +-----------+      +-----------+
+*                    |   CPSR    |       |   CPSR    |      |   CPSR    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R0     |       |     R0    |      |    R0     |
+*                    +-----------+       +-----------+      +-----------+
+*                          .                  .                  .
+*                          .                  .                  .
+*                          .                  .                  .
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R10    |       |    R10    |      |    R10    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R11    |       |    R11    |      |    R11    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R12    |       |    R12    |      |    R12    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |  R14 (LR) |       |  R14 (LR) |      |  R14 (LR) |
+*                    +-----------+       +-----------+      +-----------+
+*                    | PC = Task |       | PC = Task |      | PC = Task |
+*                    +-----------+       +-----------+      +-----------+
+*
+*                        (a)                 (b)                (c)
+*
+*             (4) The SP must be 8-byte aligned in conforming to the Procedure Call Standard for the ARM architecture
+*
+*                    (a) Section 2.1 of the  ABI for the ARM Architecture Advisory Note. SP must be 8-byte aligned
+*                        on entry to AAPCS-Conforming functions states :
+*
+*                        The Procedure Call Standard for the ARM Architecture [AAPCS] requires primitive
+*                        data types to be naturally aligned according to their sizes (for size = 1, 2, 4, 8 bytes).
+*                        Doing otherwise creates more problems than it solves.
+*
+*                        In return for preserving the natural alignment of data, conforming code is permitted
+*                        to rely on that alignment. To support aligning data allocated on the stack, the stack
+*                        pointer (SP) is required to be 8-byte aligned on entry to a conforming function. In
+*                        practice this requirement is met if:
+*
+*                           (1) At each call site, the current size of the calling function’s stack frame is a multiple of 8 bytes.
+*                               This places an obligation on compilers and assembly language programmers.
+*
+*                           (2) SP is a multiple of 8 when control first enters a program.
+*                               This places an obligation on authors of low level OS, RTOS, and runtime library
+*                               code to align SP at all points at which control first enters
+*                               a body of (AAPCS-conforming) code.
+*
+*                       In turn, this requires the value of SP to be aligned to 0 modulo 8:
+*
+*                           (3) By exception handlers, before calling AAPCS-conforming code.
+*
+*                           (4) By OS/RTOS/run-time system code, before giving control to an application.
+*
+*                 (b) Section 2.3.1 corrective steps from the the SP must be 8-byte aligned on entry
+*                     to AAPCS-conforming functions advisory note also states.
+*
+*                     " This requirement extends to operating systems and run-time code for all architecture versions
+*                       prior to ARMV7 and to the A, R and M architecture profiles thereafter. Special considerations
+*                       associated with ARMV7M are discussed in §2.3.3"
+*
+*                     (1) Even if the SP 8-byte aligment is not a requirement for the ARMv7M profile, the stack is aligned
+*                         to 8-byte boundaries to support legacy execution enviroments.
+*
+*                 (c) Section 5.2.1.2 from the Procedure Call Standard for the ARM
+*                     architecture states :  "The stack must also conform to the following
+*                     constraint at a public interface:
+*
+*                     (1) SP mod 8 = 0. The stack must be double-word aligned"
+*
+*                 (d) From the ARM Technical Support Knowledge Base. 8 Byte stack aligment.
+*
+*                     "8 byte stack alignment is a requirement of the ARM Architecture Procedure
+*                      Call Standard [AAPCS]. This specifies that functions must maintain an 8 byte
+*                      aligned stack address (e.g. 0x00, 0x08, 0x10, 0x18, 0x20) on all external
+*                      interfaces. In practice this requirement is met if:
+*
+*                      (1) At each external interface, the current stack pointer
+*                          is a multiple of 8 bytes.
+*
+*                      (2) Your OS maintains 8 byte stack alignment on its external interfaces
+*                          e.g. on task switches"
+**********************************************************************************************************
+*/
+
+OS_STK  *OSTaskStkInit (void (*task)(void  *p_arg),
+                        void               *p_arg,
+                        OS_STK             *ptos,
+                        INT16U              opt)
+{
+    OS_STK  *p_stk;
+    INT32U   task_addr;
+    INT32U   fpu_reg_cnt;
+    INT8U    i;
+
+
+    p_stk     =  ptos + 1u;                                     /* Load stack pointer                                   */
+    p_stk     = (OS_STK *)((OS_STK)(p_stk) & 0xFFFFFFF8u);      /* Align stack pointer.                                 */
+    task_addr = (INT32U)task & ~1u;                             /* Mask off lower bit in case task is thumb mode        */
+
+    *--p_stk  = (OS_STK)task_addr;                              /* Entry Point                                          */
+    *--p_stk  = (OS_STK)OS_TaskReturn;                          /* R14 (LR)                                             */
+    *--p_stk  = (OS_STK)0x12121212u;                            /* R12                                                  */
+    *--p_stk  = (OS_STK)0x11111111u;                            /* R11                                                  */
+    *--p_stk  = (OS_STK)0x10101010u;                            /* R10                                                  */
+    *--p_stk  = (OS_STK)0x09090909u;                            /* R9                                                   */
+    *--p_stk  = (OS_STK)0x08080808u;                            /* R8                                                   */
+    *--p_stk  = (OS_STK)0x07070707u;                            /* R7                                                   */
+    *--p_stk  = (OS_STK)0x06060606u;                            /* R6                                                   */
+    *--p_stk  = (OS_STK)0x05050505u;                            /* R5                                                   */
+    *--p_stk  = (OS_STK)0x04040404u;                            /* R4                                                   */
+    *--p_stk  = (OS_STK)0x03030303u;                            /* R3                                                   */
+    *--p_stk  = (OS_STK)0x02020202u;                            /* R2                                                   */
+    *--p_stk  = (OS_STK)0x01010101u;                            /* R1                                                   */
+    *--p_stk  = (OS_STK)p_arg;                                  /* R0 : argument                                        */
+
+
+    if (((INT32U)task & 0x01u) == 0x01u) {                      /* See if task runs in Thumb or ARM mode                */
+       *--p_stk = (OS_STK)(ARM_SVC_MODE_THUMB);                 /* Set Thumb mode.                                      */
+    } else {
+       *--p_stk = (OS_STK)(ARM_SVC_MODE_ARM);
+    }
+
+    fpu_reg_cnt = OS_CPU_ARM_DRegCntGet();
+
+    if(fpu_reg_cnt != 0u) {
+        *--p_stk = (OS_STK)0;                                   /* Initialize Floating point status & control register  */
+                                                                /* Initialize general-purpose Floating point registers  */
+         for (i = 0u; i < fpu_reg_cnt * 2u; i++) {
+             *--p_stk = (OS_STK)0;
+         }
+
+        *--p_stk = (OS_STK)(0x40000000);                        /* Initialize Floating-Point Exception Register (Enable)*/
+    }
+
+    return (p_stk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other
+*              operations during a context switch.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that
+*                 will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the
+*                 task being switched out (i.e. the preempted task).
+*              3) If debug variables are enabled, the current process id is saved into the context ID register
+*                 found in the system control coprocessor. The Embedded Trace Macrocell (ETM) and the debug logic
+*                 use this register. The ETM can broadcast its value to indicate the process that is running currently.
+*
+*                     (a) The proccess id is formed by concatenating the current task priority with the lower 24 bits
+*                         from the current task TCB.
+*
+*                            31              24                     0
+*                             +---------------+---------------------+
+*                             | OSPrioHighRdy | OSTCBHighRdy[23..0] |
+*                             +---------------+---------------------+
+*********************************************************************************************************
+*/
+
+#if (OS_CPU_HOOKS_EN > 0u) && (OS_TASK_SW_HOOK_EN > 0u)
+void  OSTaskSwHook (void)
+
+{
+#if OS_CFG_DBG_EN > 0u
+    INT32U  ctx_id;
+#endif
+
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskSwHook();
+#endif
+
+#if OS_CFG_DBG_EN > 0u
+    ctx_id = ((INT32U)(OSPrioHighRdy    << 24u)             )
+           | ((INT32U)(OSTCBHighRdy           ) & 0x00FFFFFF);
+    OS_CPU_ARM_CtxID_Set(ctx_id);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           OS_TCBInit() HOOK
+*
+* Description: This function is called by OS_TCBInit() after setting up most of the TCB.
+*
+* Arguments  : ptcb    is a pointer to the TCB of the task being created.
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTCBInitHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TCBInitHook(ptcb);
+#else
+    (void)ptcb;                                            /* Prevent compiler warning                 */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if (OS_CPU_HOOKS_EN > 0u) && (OS_TIME_TICK_HOOK_EN > 0u)
+void  OSTimeTickHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TimeTickHook();
+#endif
+
+#if OS_TMR_EN > 0u
+    OSTmrCtr++;
+    if (OSTmrCtr >= (OS_TICKS_PER_SEC / OS_TMR_CFG_TICKS_PER_SEC)) {
+        OSTmrCtr = 0u;
+        OSTmrSignal();
+    }
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                             INTERRUPT DISABLE TIME MEASUREMENT, START
+*********************************************************************************************************
+*/
+
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+void  OS_CPU_IntDisMeasInit (void)
+{
+    OS_CPU_IntDisMeasNestingCtr = 0u;
+    OS_CPU_IntDisMeasCntsEnter  = 0u;
+    OS_CPU_IntDisMeasCntsExit   = 0u;
+    OS_CPU_IntDisMeasCntsMax    = 0u;
+    OS_CPU_IntDisMeasCntsDelta  = 0u;
+    OS_CPU_IntDisMeasCntsOvrhd  = 0u;
+    OS_CPU_IntDisMeasStart();                              /* Measure the overhead of the functions    */
+    OS_CPU_IntDisMeasStop();
+    OS_CPU_IntDisMeasCntsOvrhd  = OS_CPU_IntDisMeasCntsDelta;
+}
+
+
+void  OS_CPU_IntDisMeasStart (void)
+{
+    OS_CPU_IntDisMeasNestingCtr++;
+    if (OS_CPU_IntDisMeasNestingCtr == 1u) {               /* Only measure at the first nested level   */
+        OS_CPU_IntDisMeasCntsEnter = OS_CPU_IntDisMeasTmrRd();
+    }
+}
+
+
+void  OS_CPU_IntDisMeasStop (void)
+{
+    OS_CPU_IntDisMeasNestingCtr--;                                      /* Decrement nesting ctr       */
+    if (OS_CPU_IntDisMeasNestingCtr == 0u) {
+        OS_CPU_IntDisMeasCntsExit  = OS_CPU_IntDisMeasTmrRd();
+        OS_CPU_IntDisMeasCntsDelta = OS_CPU_IntDisMeasCntsExit - OS_CPU_IntDisMeasCntsEnter;
+        if (OS_CPU_IntDisMeasCntsDelta > OS_CPU_IntDisMeasCntsOvrhd) {  /* Ensure overhead < delta     */
+            OS_CPU_IntDisMeasCntsDelta -= OS_CPU_IntDisMeasCntsOvrhd;
+        } else {
+            OS_CPU_IntDisMeasCntsDelta  = OS_CPU_IntDisMeasCntsOvrhd;
+        }
+        if (OS_CPU_IntDisMeasCntsDelta > OS_CPU_IntDisMeasCntsMax) {    /* Track MAXIMUM               */
+            OS_CPU_IntDisMeasCntsMax = OS_CPU_IntDisMeasCntsDelta;
+        }
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                              GET NUMBER OF FREE ENTRIES IN EXCEPTION STACK
+*
+* Description : This function computes the number of free entries in the exception stack.
+*
+* Arguments   : None.
+*
+* Returns     : The number of free entries in the exception stack.
+*********************************************************************************************************
+*/
+
+INT32U  OS_CPU_ExceptStkChk (void)
+{
+    OS_STK  *pchk;
+    INT32U   nfree;
+    INT32U   size;
+
+
+    nfree = 0;
+    size  = OS_CPU_EXCEPT_STK_SIZE;
+    pchk  = &OS_CPU_ExceptStk[0];
+    while ((*pchk++ == (OS_STK)0) && (size > 0u)) {   /* Compute the number of zero entries on the stk */
+        nfree++;
+        size--;
+    }
+
+    return (nfree);
+}
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu.h b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu.h
new file mode 100644
index 0000000..cc0c28f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu.h
@@ -0,0 +1,313 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                      Generic ARM Cortex-A Port
+*
+* File      : OS_CPU.H
+* Version   : V2.92.11.00
+* By        : JBL
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+*
+* For       : ARM Cortex-A
+* Mode      : ARM or Thumb
+* Toolchain : ARM Compiler Toolchain
+*
+* Note(s) : (1) This port supports the entire 32-bit ARM Cortex-A line from the A5 to the A15
+*               with every possible VFP/NEON coprocessor options.
+*
+*           (2) To support the various FPUs three versions of os_cpu_a.s are provided.
+*               Only one of them must be used at a time as outlined below.
+*
+*               os_cpu_a_vfp-none.s
+*                 Suitable when there is no VFP/NEON support or they are deactivated.
+*                 Can also be used when saving the VFP/NEON register bank isn’t required.
+*
+*               os_cpu_a_vfp-d32.s
+*                 Suitable for cpus implementing the NEON Media Processing Engine with
+*                 32 double word registers.
+*
+*               os_cpu_a_vfp-d16.s
+*                 Suitable for cpus with VFP-only support and 16 double word registers.
+*                 Must also be used when the CPACR.D32DIS bit is set and access to registers
+*                 D16-D31 would cause an exception.
+*********************************************************************************************************
+*/
+
+#ifndef  OS_CPU_H
+#define  OS_CPU_H
+
+#ifdef   OS_CPU_GLOBALS
+#define  OS_CPU_EXT
+#else
+#define  OS_CPU_EXT  extern
+#endif
+
+
+#ifndef  OS_CPU_EXCEPT_STK_SIZE
+#define  OS_CPU_EXCEPT_STK_SIZE    1024u                         /* Default exception stack size is 128 OS_STK entries.  */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CONFIGURATION DEFAULTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_ARM_ENDIAN_LITTLE                         1u
+#define  OS_CPU_ARM_ENDIAN_BIG                            2u
+
+
+#if (defined(__BIG_ENDIAN))
+#define  OS_CPU_ARM_ENDIAN_TYPE                        OS_CPU_ARM_ENDIAN_BIG
+#else
+#define  OS_CPU_ARM_ENDIAN_TYPE                        OS_CPU_ARM_ENDIAN_LITTLE
+#endif
+
+#ifndef  OS_CPU_INT_DIS_MEAS_EN
+#define  OS_CPU_INT_DIS_MEAS_EN    0u                           /* Intrrupt dis time measurement disabled by default  */
+#endif
+
+#ifndef  OS_CPU_ARM_DCC_EN
+#define  OS_CPU_ARM_DCC_EN         0u                           /* DCC support disabled by default                    */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       ARM EXCEPTION DEFINES
+*********************************************************************************************************
+*/
+
+                                                            /* ARM exception IDs                                      */
+#define  OS_CPU_ARM_EXCEPT_RESET                      0x00u
+#define  OS_CPU_ARM_EXCEPT_UNDEF_INSTR                0x01u
+#define  OS_CPU_ARM_EXCEPT_SWI                        0x02u
+#define  OS_CPU_ARM_EXCEPT_PREFETCH_ABORT             0x03u
+#define  OS_CPU_ARM_EXCEPT_DATA_ABORT                 0x04u
+#define  OS_CPU_ARM_EXCEPT_ADDR_ABORT                 0x05u
+#define  OS_CPU_ARM_EXCEPT_IRQ                        0x06u
+#define  OS_CPU_ARM_EXCEPT_FIQ                        0x07u
+#define  OS_CPU_ARM_EXCEPT_NBR                        0x08u
+
+
+                                                            /* ARM exception vectors addresses                        */
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_RST                (OS_CPU_ARM_EXCEPT_RST            * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_UND                (OS_CPU_ARM_EXCEPT_UND            * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_SWI                (OS_CPU_ARM_EXCEPT_SWI            * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_ABORT_PREFETCH     (OS_CPU_ARM_EXCEPT_ABORT_PREFETCH * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_ABORT_DATA         (OS_CPU_ARM_EXCEPT_ABORT_DATA     * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_IRQ                (OS_CPU_ARM_EXCEPT_IRQ            * 0x04u + 0x00u)
+#define  OS_CPU_ARM_EXCEPT_VECT_ADDR_FIQ                (OS_CPU_ARM_EXCEPT_FIQ            * 0x04u + 0x00u)
+
+                                                            /* ARM exception handlers addresses                       */
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_RST             (OS_CPU_ARM_EXCEPT_RST            * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_UND             (OS_CPU_ARM_EXCEPT_UND            * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_SWI             (OS_CPU_ARM_EXCEPT_SWI            * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_ABORT_PREFETCH  (OS_CPU_ARM_EXCEPT_ABORT_PREFETCH * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_ABORT_DATA      (OS_CPU_ARM_EXCEPT_ABORT_DATA     * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_IRQ             (OS_CPU_ARM_EXCEPT_IRQ            * 0x04u + 0x20u)
+#define  OS_CPU_ARM_EXCEPT_HANDLER_ADDR_FIQ             (OS_CPU_ARM_EXCEPT_FIQ            * 0x04u + 0x20u)
+
+                                                            /* ARM "Jump To Self" asm instruction                     */
+#define  OS_CPU_ARM_INSTR_JUMP_TO_SELF                 0xEAFFFFFEu
+                                                            /* ARM "Jump To Exception Handler" asm instruction        */
+#define  OS_CPU_ARM_INSTR_JUMP_TO_HANDLER              0xE59FF018u
+
+#define  OS_CPU_ARM_BIT_CPSR_N                     (1u  << 31u)
+#define  OS_CPU_ARM_BIT_CPSR_Z                     (1u  << 30u)
+#define  OS_CPU_ARM_BIT_CPSR_C                     (1u  << 29u)
+#define  OS_CPU_ARM_BIT_CPSR_V                     (1u  << 28u)
+#define  OS_CPU_ARM_BIT_CPSR_Q                     (1u  << 27u)
+#define  OS_CPU_ARM_BIT_CPSR_J                     (1u  << 24u)
+#define  OS_CPU_ARM_MSK_CPSR_GE                    (0xF << 16u)
+
+#define  OS_CPU_ARM_BIT_CPSR_E                     (1u << 9u)
+#define  OS_CPU_ARM_BIT_CPSR_A                     (1u << 8u)
+#define  OS_CPU_ARM_BIT_CPSR_I                     (1u << 7u)
+#define  OS_CPU_ARM_BIT_CPSR_F                     (1u << 6u)
+#define  OS_CPU_ARM_BIT_CPSR_T                     (1u << 5u)
+#define  OS_CPU_ARM_MSK_CPSR_MODE                         0x1Fu
+#define  OS_CPU_ARM_BIT_CPSR_MODE_USER                    0x10u
+#define  OS_CPU_ARM_BIT_CPSR_MODE_FIQ                     0x11u
+#define  OS_CPU_ARM_BIT_CPSR_MODE_IRQ                     0x12u
+#define  OS_CPU_ARM_BIT_CPSR_MODE_SUPERVISOR              0x13u
+#define  OS_CPU_ARM_BIT_CPSR_MODE_ABORT                   0x17u
+#define  OS_CPU_ARM_BIT_CPSR_MODE_UNDEFINED               0x1Bu
+#define  OS_CPU_ARM_BIT_CPSR_MODE_SYSTEM                  0x1Fu
+
+#define  OS_CPU_ARM_BIT_FPEXC_EN                   (1u << 30u)
+
+
+/*
+*********************************************************************************************************
+*                                              DATA TYPES
+*                                         (Compiler Specific)
+*********************************************************************************************************
+*/
+
+typedef unsigned char  BOOLEAN;
+typedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */
+typedef signed   char  INT8S;                    /* Signed    8 bit quantity                           */
+typedef unsigned short INT16U;                   /* Unsigned 16 bit quantity                           */
+typedef signed   short INT16S;                   /* Signed   16 bit quantity                           */
+typedef unsigned int   INT32U;                   /* Unsigned 32 bit quantity                           */
+typedef signed   int   INT32S;                   /* Signed   32 bit quantity                           */
+typedef float          FP32;                     /* Single precision floating point                    */
+typedef double         FP64;                     /* Double precision floating point                    */
+
+typedef unsigned int   OS_STK;                   /* Each stack entry is 32-bit wide                    */
+typedef unsigned int   OS_CPU_SR;                /* Define size of CPU status register (PSR = 32 bits) */
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+#define  OS_TASK_SW()                           OSCtxSw()
+#define  OS_STK_GROWTH                           1u         /* Stack grows from HIGH to LOW memory on ARM        */
+
+/*
+*********************************************************************************************************
+*                                                ARM
+*
+* Method #1:  Disable/Enable interrupts using simple instructions.  After critical section, interrupts
+*             will be enabled even if they were disabled before entering the critical section.
+*             NOT IMPLEMENTED
+*
+* Method #2:  Disable/Enable interrupts by preserving the state of interrupts.  In other words, if
+*             interrupts were disabled before entering the critical section, they will be disabled when
+*             leaving the critical section.
+*             NOT IMPLEMENTED
+*
+* Method #3:  Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+*             would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+*             disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+*             disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+*             into the CPU's status register.
+*********************************************************************************************************
+*/
+
+#define  OS_CRITICAL_METHOD    3u
+
+
+#if      OS_CRITICAL_METHOD == 3u
+
+#if      OS_CPU_INT_DIS_MEAS_EN > 0u
+
+#define  OS_ENTER_CRITICAL()  do { cpu_sr = OS_CPU_SR_Save();  \
+                                   OS_CPU_IntDisMeasStart();  } while (0)
+#define  OS_EXIT_CRITICAL()   do { OS_CPU_IntDisMeasStop();    \
+                                   OS_CPU_SR_Restore(cpu_sr); } while (0)
+
+#else
+
+#define  OS_ENTER_CRITICAL()  do {cpu_sr = OS_CPU_SR_Save();} while (0)
+#define  OS_EXIT_CRITICAL()   do {OS_CPU_SR_Restore(cpu_sr);} while (0)
+
+#endif
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+                                                                /* Variables used to measure interrupt disable time     */
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasNestingCtr;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsEnter;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsExit;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsMax;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsDelta;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsOvrhd;
+#endif
+
+OS_CPU_EXT  OS_STK   OS_CPU_ExceptStk[OS_CPU_EXCEPT_STK_SIZE];
+OS_CPU_EXT  OS_STK  *OS_CPU_ExceptStkBase;
+OS_CPU_EXT  OS_STK  *OS_CPU_ExceptStkPtr;
+
+OS_CPU_EXT  INT32U   OS_CPU_ARM_DRegCnt;                        /* VFP/NEON register count                              */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if OS_CRITICAL_METHOD == 3u                                    /* See OS_CPU_A.ASM                                     */
+    OS_CPU_SR  OS_CPU_SR_Save                     (void);
+    void       OS_CPU_SR_Restore                  (OS_CPU_SR cpu_sr);
+#endif
+
+    void       OS_CPU_SR_INT_Dis                  (void);
+    void       OS_CPU_SR_INT_En                   (void);
+    void       OS_CPU_SR_FIQ_Dis                  (void);
+    void       OS_CPU_SR_FIQ_En                   (void);
+    void       OS_CPU_SR_IRQ_Dis                  (void);
+    void       OS_CPU_SR_IRQ_En                   (void);
+
+    void       OSCtxSw                            (void);
+    void       OSIntCtxSw                         (void);
+    void       OSStartHighRdy                     (void);
+
+    void       OS_CPU_InitExceptVect              (void);
+
+    void       OS_CPU_ARM_ExceptUndefInstrHndlr   (void);
+    void       OS_CPU_ARM_ExceptSwiHndlr          (void);
+    void       OS_CPU_ARM_ExceptPrefetchAbortHndlr(void);
+    void       OS_CPU_ARM_ExceptDataAbortHndlr    (void);
+    void       OS_CPU_ARM_ExceptIrqHndlr          (void);
+    void       OS_CPU_ARM_ExceptFiqHndlr          (void);
+
+    void       OS_CPU_ExceptHndlr                 (INT32U  src_id);
+
+    INT32U     OS_CPU_ExceptStkChk                (void);
+
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+    void       OS_CPU_IntDisMeasInit              (void);
+    void       OS_CPU_IntDisMeasStart             (void);
+    void       OS_CPU_IntDisMeasStop              (void);
+    INT16U     OS_CPU_IntDisMeasTmrRd             (void);
+#endif
+
+#if OS_CPU_ARM_DCC_EN > 0u
+    void       OSDCC_Handler                      (void);
+#endif
+
+    INT32U     OS_CPU_ARM_DRegCntGet              (void);
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d16.s b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d16.s
new file mode 100644
index 0000000..1ce93c8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d16.s
@@ -0,0 +1,730 @@
+;
+;********************************************************************************************************
+;                                                uC/OS-II
+;                                          The Real-Time Kernel
+;
+;
+;                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+;                    All rights reserved.  Protected by international copyright laws.
+;
+;                                      Generic ARM Cortex-A Port
+;
+; File      : OS_CPU_A_VFP-D16.S
+; Version   : V2.92.11.00
+; By        : JBL
+;
+; LICENSING TERMS:
+; ---------------
+;           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+;           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+;           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+;           application/product.   We provide ALL the source code for your convenience and to help you
+;           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+;           it commercially without paying a licensing fee.
+;
+;           Knowledge of the source code may NOT be used to develop a similar product.
+;
+;           Please help us continue to provide the embedded community with the finest software available.
+;           Your honesty is greatly appreciated.
+;
+;           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+;
+; For       : ARM Cortex-A
+; Mode      : ARM or Thumb
+; Toolchain : ARM Compiler Toolchain
+;
+; Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                          EXTERNAL REFERENCE
+;********************************************************************************************************
+                                                                ; External references.
+    EXTERN     OSRunning
+    EXTERN     OSPrioCur
+    EXTERN     OSPrioHighRdy
+    EXTERN     OSTCBCur
+    EXTERN     OSTCBHighRdy
+    EXTERN     OSIntNesting
+    EXTERN     OSIntExit
+    EXTERN     OSTaskSwHook
+    EXTERN     OS_CPU_ExceptStkBase
+    EXTERN     OS_CPU_ExceptStkPtr
+    EXTERN     OS_CPU_ExceptHndlr                               ; Chip Support/BSP specific exception handler.
+
+
+;********************************************************************************************************
+;                                            FUNCTIONS
+;********************************************************************************************************
+
+                                                                ; Functions declared in this file.
+    EXPORT  OS_CPU_SR_Save
+    EXPORT  OS_CPU_SR_Restore
+
+    EXPORT  OSStartHighRdy
+    EXPORT  OSCtxSw
+    EXPORT  OSIntCtxSw
+
+                                                                ; Functions related to exception handling.
+    EXPORT  OS_CPU_ARM_ExceptUndefInstrHndlr
+    EXPORT  OS_CPU_ARM_ExceptSwiHndlr
+    EXPORT  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptDataAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptIrqHndlr
+    EXPORT  OS_CPU_ARM_ExceptFiqHndlr
+
+    EXPORT  OS_CPU_SR_INT_Dis
+    EXPORT  OS_CPU_SR_INT_En
+    EXPORT  OS_CPU_SR_FIQ_Dis
+    EXPORT  OS_CPU_SR_FIQ_En
+    EXPORT  OS_CPU_SR_IRQ_Dis
+    EXPORT  OS_CPU_SR_IRQ_En
+
+    EXPORT  OS_CPU_ARM_DRegCntGet
+
+
+;********************************************************************************************************
+;                                               EQUATES
+;********************************************************************************************************
+
+OS_CPU_ARM_CONTROL_INT_DIS        EQU  0xC0                     ; Disable both FIQ and IRQ.
+OS_CPU_ARM_CONTROL_FIQ_DIS        EQU  0x40                     ; Disable FIQ.
+OS_CPU_ARM_CONTROL_IRQ_DIS        EQU  0x80                     ; Disable IRQ.
+OS_CPU_ARM_CONTROL_THUMB          EQU  0x20                     ; Set THUMB mode.
+OS_CPU_ARM_CONTROL_ARM            EQU  0x00                     ; Set ARM mode.
+
+OS_CPU_ARM_MODE_MASK              EQU  0x1F
+OS_CPU_ARM_MODE_USR               EQU  0x10
+OS_CPU_ARM_MODE_FIQ               EQU  0x11
+OS_CPU_ARM_MODE_IRQ               EQU  0x12
+OS_CPU_ARM_MODE_SVC               EQU  0x13
+OS_CPU_ARM_MODE_ABT               EQU  0x17
+OS_CPU_ARM_MODE_UND               EQU  0x1B
+OS_CPU_ARM_MODE_SYS               EQU  0x1F
+
+OS_CPU_ARM_EXCEPT_RESET           EQU  0x00
+OS_CPU_ARM_EXCEPT_UNDEF_INSTR     EQU  0x01
+OS_CPU_ARM_EXCEPT_SWI             EQU  0x02
+OS_CPU_ARM_EXCEPT_PREFETCH_ABORT  EQU  0x03
+OS_CPU_ARM_EXCEPT_DATA_ABORT      EQU  0x04
+OS_CPU_ARM_EXCEPT_ADDR_ABORT      EQU  0x05
+OS_CPU_ARM_EXCEPT_IRQ             EQU  0x06
+OS_CPU_ARM_EXCEPT_FIQ             EQU  0x07
+
+OS_CPU_ARM_FPEXC_EN               EQU  0x40000000
+
+
+;********************************************************************************************************
+;                                     CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+
+    REQUIRE8
+    PRESERVE8
+
+    AREA CODE, CODE, READONLY
+    CODE32
+
+
+;********************************************************************************************************
+;                                 FLOATING POINT REGISTER MACROS
+;********************************************************************************************************
+
+            MACRO
+            OS_CPU_ARM_FP_REG_POP $rx
+                POP     {$rx}
+                VMSR    FPEXC,  $rx                              ;    ... Pop new task's FPEXC
+                FLDMIAD SP!, {D0-D15}                            ;    ... Pop new task's General-Purpose floating point registers.
+                POP     {$rx}
+                VMSR    FPSCR, $rx                               ;    ... Pop new task's FPSCR.
+            MEND
+
+            MACRO
+            OS_CPU_ARM_FP_REG_PUSH $rx
+                VMRS    $rx, FPSCR                               ;     ... Save current FPSCR
+                PUSH    {$rx}                                    ;     ... Save general-purpose floating-point registers.
+                FSTMDBD SP!, {D0-D15}
+                VMRS    $rx, FPEXC                               ;     ... Save Floating point exception register.
+                PUSH    {$rx}
+            MEND
+
+
+;********************************************************************************************************
+;                                  CRITICAL SECTION METHOD 3 FUNCTIONS
+;
+; Description: Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+;              would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+;              disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+;              disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+;              into the CPU's status register.
+;
+; Prototypes : OS_CPU_SR  OS_CPU_SR_Save    (void);
+;              void       OS_CPU_SR_Restore (OS_CPU_SR  os_cpu_sr);
+;
+;
+; Note(s)    : (1) These functions are used in general like this:
+;
+;                 void Task (void  *p_arg)
+;                 {
+;                                                               /* Allocate storage for CPU status register.            */
+;                 #if (OS_CRITICAL_METHOD == 3)
+;                      OS_CPU_SR  os_cpu_sr;
+;                 #endif
+;
+;                          :
+;                          :
+;                      OS_ENTER_CRITICAL();                     /* os_cpu_sr = OS_CPU_SR_Save();                        */
+;                          :
+;                          :
+;                      OS_EXIT_CRITICAL();                      /* OS_CPU_SR_Restore(cpu_sr);                           */
+;                          :
+;                          :
+;                 }
+;********************************************************************************************************
+
+OS_CPU_SR_Save
+
+        MRS     R0, CPSR
+        CPSID   IF                                              ; Set IRQ & FIQ bits in CPSR to DISABLE all interrupts
+        DSB
+        BX      LR                                              ; DISABLED, return the original CPSR contents in R0
+
+OS_CPU_SR_Restore                                               ; See Note #2
+
+        DSB
+        MSR     CPSR_c, R0
+        BX      LR
+
+
+;********************************************************************************************************
+;                                         START MULTITASKING
+;                                      void OSStartHighRdy(void)
+;
+; Note(s) : 1) OSStartHighRdy() MUST:
+;              a) Call OSTaskSwHook() then,
+;              b) Set OSRunning to OS_STATE_OS_RUNNING,
+;              c) Switch to the highest priority task.
+;********************************************************************************************************
+
+OSStartHighRdy
+                                                                ; Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSRunning                                       ; OSRunning = TRUE;
+    MOV     R1, #1
+    STRB    R1, [R0]
+                                                                ; SWITCH TO HIGHEST PRIORITY TASK:
+    MOV32   R0, OSTCBHighRdy                                    ;    Get highest priority task TCB address,
+    LDR     R0, [R0]                                            ;    Get stack pointer,
+    LDR     SP, [R0]                                            ;    Switch to the new stack,
+
+    OS_CPU_ARM_FP_REG_POP R0
+
+    LDR     R0, [SP], #4                                        ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+;
+; Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) Save the current task's context onto the current task's stack,
+;              b) OSTCBCur->StkPtr = SP;
+;              c) OSTaskSwHook();
+;              d) OSPrioCur           = OSPrioHighRdy;
+;              e) OSTCBCurPtr         = OSTCBHighRdy;
+;              f) SP                  = OSTCBHighRdy->StkPtr;
+;              g) Restore the new task's context from the new task's stack,
+;              h) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSCtxSw
+                                                                ; SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           ; Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       ; Push registers,
+    MRS     R0, CPSR                                            ; Push current CPSR,
+    TST     LR, #1                                              ; See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   ; If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    OS_CPU_ARM_FP_REG_PUSH  R0                                  ; Push FP context
+
+    CLREX                                                       ; Clear exclusive monitor.
+
+    MOV32   R0, OSTCBCur                                        ; OSTCBCur->StkPtr = SP;
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur   = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCur                                        ; OSTCBCur = OSTCBHighRdy;
+    MOV32   R1, OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdy->OSTCBStkPtr;
+
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    OS_CPU_ARM_FP_REG_POP    R0                                 ;    Pop new task's FP context.
+
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+;
+; Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) OSTaskSwHook();
+;              b) OSPrioCur   = OSPrioHighRdy;
+;              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+;              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+;              e) Restore the new task's context from the new task's stack,
+;              f) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSIntCtxSw
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCur                                        ; OSTCBCurPtr = OSTCBHighRdy;
+    MOV32   R1, OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    OS_CPU_ARM_FP_REG_POP R0                                    ;    Pop new task's FP context.
+
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  ; Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          ; Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                  PREFETCH ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               ; Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                    DATA ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                   ADDRESS ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                 INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                      GLOBAL EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1     Exception's SPSR
+;                  R2     Return PC
+;                  R3     Exception's SP
+;
+; Note(s)       : 1) An exception can occur in three different circumstances; in each of these, the
+;                    SVC stack pointer will point to a different entity :
+;
+;                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+;                       SVC STACK: Should point to a stack initialized by the application's startup code.
+;                       STK USAGE: Interrupted context -- SVC stack.
+;                                  Exception           -- SVC stack.
+;                                  Nested exceptions   -- SVC stack.
+;
+;                    b) CONDITION: An exception interrupts a task.
+;                       SVC STACK: Should point to task stack.
+;                       STK USAGE: Interrupted context -- Task stack.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;
+;                    c) CONDITION: An exception interrupts another exception.
+;                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+;                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr
+
+    MRS     R1, SPSR                                            ; Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              ; Save exception's stack pointer.
+
+                                                                ; Adjust exception stack pointer.  This is needed because
+                                                                ; exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           ;   Push task's PC,
+    STMFD   SP!, {LR}                                           ;   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       ;   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        ;   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           ;   Push task's CPSR (i.e. exception SPSR).
+
+    OS_CPU_ARM_FP_REG_PUSH   R1
+                                                                ; if (OSRunning == 1)
+    MOV32   R3, OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNesting                                    ;   OSIntNesting++;
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              ; if (OSIntNesting == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+;********************************************************************************************************
+;                                 EXCEPTION HANDLER: TASK INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask
+
+    MOV32   R3, OSTCBCur                                        ; OSTCBCurPtr->StkPtr = SP;
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+    MOV32   R3, OS_CPU_ExceptStkBase                            ; Switch to exception stack.
+    LDR     SP, [R3]
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; Call OSIntExit().  This call MAY never return if a ready
+                                                                ; task with higher priority than the interrupted one is
+                                                                ; found.
+    BL      OSIntExit
+
+
+    MOV32   R3, OSTCBCur                                        ; SP = OSTCBCurPtr->StkPtr;
+    LDR     R4,  [R3]
+    LDR     SP,  [R4]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL       OS_CPU_ExceptHndlr                                 ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNesting                                    ;   OSIntNestingCtr--;
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;********************************************************************************************************
+;                                 ENABLE & DISABLE INTERRUPTS, IRQs, FIQs
+;********************************************************************************************************
+;********************************************************************************************************
+
+;********************************************************************************************************
+;                                       ENABLE & DISABLE INTERRUPTS
+;
+; Note(s) : 1) OS_CPU_SR_INT_En() can be called by OS_CPU_ExceptHndlr() AFTER the external
+;              interrupt source has been cleared.  This function will enable IRQs and FIQs so that
+;              nesting can occur.
+;
+;           2) OS_CPU_ARM_INT_Dis() can be called to disable IRQs and FIQs so that nesting will not occur.
+;********************************************************************************************************
+
+OS_CPU_SR_INT_En
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 ; Clear IRQ and FIQ bits in CPSR to enable all interrupts.
+    MSR     CPSR_c, R0
+    BX      LR
+
+
+OS_CPU_SR_INT_Dis
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 ; Set IRQ and FIQ bits in CPSR to disable all interrupts.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+;********************************************************************************************************
+;                                          ENABLE & DISABLE IRQs
+;
+; Note(s) : 1) OS_CPU_SR_IRQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the external
+;              interrupt source has been cleared.  This function will enable IRQs so that IRQ nesting
+;              can occur.
+;
+;           2) OS_CPU_ARM_IRQ_Dis() can be called to disable IRQs so that IRQ nesting will not occur.
+;********************************************************************************************************
+
+OS_CPU_SR_IRQ_En
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 ; Clear IRQ bit in CPSR to enable IRQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+
+OS_CPU_SR_IRQ_Dis
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 ; Set IRQ bit in CPSR to disable IRQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+;********************************************************************************************************
+;                                          ENABLE & DISABLE FIQs
+;
+; Note(s) : 1) OS_CPU_SR_FIQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the external
+;              interrupt source has been cleared.  This function will enable FIQs so that FIQ nesting
+;              can occur.
+;
+;           2) OS_CPU_ARM_FIQ_Dis() can be called to disable FIQs so that FIQ nesting will not occur.
+;********************************************************************************************************
+
+OS_CPU_SR_FIQ_En
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 ; Clear FIQ bit in CPSR to enable FIQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+
+OS_CPU_SR_FIQ_Dis
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 ; Set FIQ bit in CPSR to disable FIQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+;********************************************************************************************************
+;                              VFP/NEON REGISTER COUNT
+;
+; Register Usage:  R0     Double Register Count
+;********************************************************************************************************
+
+OS_CPU_ARM_DRegCntGet
+
+    MOV     R0, #16
+    BX      LR
+
+    END
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d32.s b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d32.s
new file mode 100644
index 0000000..b921867
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d32.s
@@ -0,0 +1,732 @@
+;
+;********************************************************************************************************
+;                                                uC/OS-II
+;                                          The Real-Time Kernel
+;
+;
+;                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+;                    All rights reserved.  Protected by international copyright laws.
+;
+;                                      Generic ARM Cortex-A Port
+;
+; File      : OS_CPU_A_VFP-D32.S
+; Version   : V2.92.11.00
+; By        : JBL
+;
+; LICENSING TERMS:
+; ---------------
+;           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+;           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+;           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+;           application/product.   We provide ALL the source code for your convenience and to help you
+;           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+;           it commercially without paying a licensing fee.
+;
+;           Knowledge of the source code may NOT be used to develop a similar product.
+;
+;           Please help us continue to provide the embedded community with the finest software available.
+;           Your honesty is greatly appreciated.
+;
+;           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+;
+; For       : ARM Cortex-A
+; Mode      : ARM or Thumb
+; Toolchain : ARM Compiler Toolchain
+;
+; Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                          EXTERNAL REFERENCE
+;********************************************************************************************************
+                                                                ; External references.
+    EXTERN     OSRunning
+    EXTERN     OSPrioCur
+    EXTERN     OSPrioHighRdy
+    EXTERN     OSTCBCur
+    EXTERN     OSTCBHighRdy
+    EXTERN     OSIntNesting
+    EXTERN     OSIntExit
+    EXTERN     OSTaskSwHook
+    EXTERN     OS_CPU_ExceptStkBase
+    EXTERN     OS_CPU_ExceptStkPtr
+    EXTERN     OS_CPU_ExceptHndlr                               ; Chip Support/BSP specific exception handler.
+
+
+;********************************************************************************************************
+;                                            FUNCTIONS
+;********************************************************************************************************
+
+                                                                ; Functions declared in this file.
+    EXPORT  OS_CPU_SR_Save
+    EXPORT  OS_CPU_SR_Restore
+
+    EXPORT  OSStartHighRdy
+    EXPORT  OSCtxSw
+    EXPORT  OSIntCtxSw
+
+                                                                ; Functions related to exception handling.
+    EXPORT  OS_CPU_ARM_ExceptUndefInstrHndlr
+    EXPORT  OS_CPU_ARM_ExceptSwiHndlr
+    EXPORT  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptDataAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptIrqHndlr
+    EXPORT  OS_CPU_ARM_ExceptFiqHndlr
+
+    EXPORT  OS_CPU_SR_INT_Dis
+    EXPORT  OS_CPU_SR_INT_En
+    EXPORT  OS_CPU_SR_FIQ_Dis
+    EXPORT  OS_CPU_SR_FIQ_En
+    EXPORT  OS_CPU_SR_IRQ_Dis
+    EXPORT  OS_CPU_SR_IRQ_En
+
+    EXPORT  OS_CPU_ARM_DRegCntGet
+
+
+;********************************************************************************************************
+;                                               EQUATES
+;********************************************************************************************************
+
+OS_CPU_ARM_CONTROL_INT_DIS        EQU  0xC0                     ; Disable both FIQ and IRQ.
+OS_CPU_ARM_CONTROL_FIQ_DIS        EQU  0x40                     ; Disable FIQ.
+OS_CPU_ARM_CONTROL_IRQ_DIS        EQU  0x80                     ; Disable IRQ.
+OS_CPU_ARM_CONTROL_THUMB          EQU  0x20                     ; Set THUMB mode.
+OS_CPU_ARM_CONTROL_ARM            EQU  0x00                     ; Set ARM mode.
+
+OS_CPU_ARM_MODE_MASK              EQU  0x1F
+OS_CPU_ARM_MODE_USR               EQU  0x10
+OS_CPU_ARM_MODE_FIQ               EQU  0x11
+OS_CPU_ARM_MODE_IRQ               EQU  0x12
+OS_CPU_ARM_MODE_SVC               EQU  0x13
+OS_CPU_ARM_MODE_ABT               EQU  0x17
+OS_CPU_ARM_MODE_UND               EQU  0x1B
+OS_CPU_ARM_MODE_SYS               EQU  0x1F
+
+OS_CPU_ARM_EXCEPT_RESET           EQU  0x00
+OS_CPU_ARM_EXCEPT_UNDEF_INSTR     EQU  0x01
+OS_CPU_ARM_EXCEPT_SWI             EQU  0x02
+OS_CPU_ARM_EXCEPT_PREFETCH_ABORT  EQU  0x03
+OS_CPU_ARM_EXCEPT_DATA_ABORT      EQU  0x04
+OS_CPU_ARM_EXCEPT_ADDR_ABORT      EQU  0x05
+OS_CPU_ARM_EXCEPT_IRQ             EQU  0x06
+OS_CPU_ARM_EXCEPT_FIQ             EQU  0x07
+
+OS_CPU_ARM_FPEXC_EN               EQU  0x40000000
+
+
+;********************************************************************************************************
+;                                     CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+
+    REQUIRE8
+    PRESERVE8
+
+    AREA CODE, CODE, READONLY
+    CODE32
+
+
+;********************************************************************************************************
+;                                 FLOATING POINT REGISTER MACROS
+;********************************************************************************************************
+
+            MACRO
+            OS_CPU_ARM_FP_REG_POP $rx
+                POP     {$rx}
+                VMSR    FPEXC,  $rx                              ;    ... Pop new task's FPEXC
+                FLDMIAD SP!, {D16-D31}
+                FLDMIAD SP!, {D0-D15}                            ;    ... Pop new task's General-Purpose floating point registers.
+                POP     {$rx}
+                VMSR    FPSCR, $rx                               ;    ... Pop new task's FPSCR.
+            MEND
+
+            MACRO
+            OS_CPU_ARM_FP_REG_PUSH $rx
+                VMRS    $rx, FPSCR                               ;     ... Save current FPSCR
+                PUSH    {$rx}                                    ;     ... Save general-purpose floating-point registers.
+                FSTMDBD SP!, {D0-D15}
+                FSTMDBD SP!, {D16-D31}
+                VMRS    $rx, FPEXC                               ;     ... Save Floating point exception register.
+                PUSH    {$rx}
+            MEND
+
+
+;********************************************************************************************************
+;                                  CRITICAL SECTION METHOD 3 FUNCTIONS
+;
+; Description: Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+;              would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+;              disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+;              disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+;              into the CPU's status register.
+;
+; Prototypes : OS_CPU_SR  OS_CPU_SR_Save    (void);
+;              void       OS_CPU_SR_Restore (OS_CPU_SR  os_cpu_sr);
+;
+;
+; Note(s)    : (1) These functions are used in general like this:
+;
+;                 void Task (void  *p_arg)
+;                 {
+;                                                               /* Allocate storage for CPU status register.            */
+;                 #if (OS_CRITICAL_METHOD == 3)
+;                      OS_CPU_SR  os_cpu_sr;
+;                 #endif
+;
+;                          :
+;                          :
+;                      OS_ENTER_CRITICAL();                     /* os_cpu_sr = OS_CPU_SR_Save();                        */
+;                          :
+;                          :
+;                      OS_EXIT_CRITICAL();                      /* OS_CPU_SR_Restore(cpu_sr);                           */
+;                          :
+;                          :
+;                 }
+;********************************************************************************************************
+
+OS_CPU_SR_Save
+
+        MRS     R0, CPSR
+        CPSID   IF                                              ; Set IRQ & FIQ bits in CPSR to DISABLE all interrupts
+        DSB
+        BX      LR                                              ; DISABLED, return the original CPSR contents in R0
+
+OS_CPU_SR_Restore                                               ; See Note #2
+
+        DSB
+        MSR     CPSR_c, R0
+        BX      LR
+
+
+;********************************************************************************************************
+;                                         START MULTITASKING
+;                                      void OSStartHighRdy(void)
+;
+; Note(s) : 1) OSStartHighRdy() MUST:
+;              a) Call OSTaskSwHook() then,
+;              b) Set OSRunning to OS_STATE_OS_RUNNING,
+;              c) Switch to the highest priority task.
+;********************************************************************************************************
+
+OSStartHighRdy
+                                                                ; Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSRunning                                       ; OSRunning = TRUE;
+    MOV     R1, #1
+    STRB    R1, [R0]
+                                                                ; SWITCH TO HIGHEST PRIORITY TASK:
+    MOV32   R0, OSTCBHighRdy                                    ;    Get highest priority task TCB address,
+    LDR     R0, [R0]                                            ;    Get stack pointer,
+    LDR     SP, [R0]                                            ;    Switch to the new stack,
+
+    OS_CPU_ARM_FP_REG_POP R0
+
+    LDR     R0, [SP], #4                                        ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+;
+; Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) Save the current task's context onto the current task's stack,
+;              b) OSTCBCur->StkPtr = SP;
+;              c) OSTaskSwHook();
+;              d) OSPrioCur           = OSPrioHighRdy;
+;              e) OSTCBCurPtr         = OSTCBHighRdy;
+;              f) SP                  = OSTCBHighRdy->StkPtr;
+;              g) Restore the new task's context from the new task's stack,
+;              h) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSCtxSw
+                                                                ; SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           ; Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       ; Push registers,
+    MRS     R0, CPSR                                            ; Push current CPSR,
+    TST     LR, #1                                              ; See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   ; If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    OS_CPU_ARM_FP_REG_PUSH  R0                                  ; Push FP context
+
+    CLREX                                                       ; Clear exclusive monitor.
+
+    MOV32   R0, OSTCBCur                                        ; OSTCBCur->StkPtr = SP;
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur   = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCur                                        ; OSTCBCur = OSTCBHighRdy;
+    MOV32   R1, OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdy->OSTCBStkPtr;
+
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    OS_CPU_ARM_FP_REG_POP    R0                                 ;    Pop new task's FP context.
+
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+;
+; Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) OSTaskSwHook();
+;              b) OSPrioCur   = OSPrioHighRdy;
+;              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+;              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+;              e) Restore the new task's context from the new task's stack,
+;              f) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSIntCtxSw
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCur                                        ; OSTCBCurPtr = OSTCBHighRdy;
+    MOV32   R1, OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    OS_CPU_ARM_FP_REG_POP R0                                    ;    Pop new task's FP context.
+
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  ; Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          ; Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                  PREFETCH ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               ; Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                    DATA ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                   ADDRESS ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                 INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                      GLOBAL EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1     Exception's SPSR
+;                  R2     Return PC
+;                  R3     Exception's SP
+;
+; Note(s)       : 1) An exception can occur in three different circumstances; in each of these, the
+;                    SVC stack pointer will point to a different entity :
+;
+;                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+;                       SVC STACK: Should point to a stack initialized by the application's startup code.
+;                       STK USAGE: Interrupted context -- SVC stack.
+;                                  Exception           -- SVC stack.
+;                                  Nested exceptions   -- SVC stack.
+;
+;                    b) CONDITION: An exception interrupts a task.
+;                       SVC STACK: Should point to task stack.
+;                       STK USAGE: Interrupted context -- Task stack.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;
+;                    c) CONDITION: An exception interrupts another exception.
+;                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+;                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr
+
+    MRS     R1, SPSR                                            ; Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              ; Save exception's stack pointer.
+
+                                                                ; Adjust exception stack pointer.  This is needed because
+                                                                ; exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           ;   Push task's PC,
+    STMFD   SP!, {LR}                                           ;   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       ;   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        ;   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           ;   Push task's CPSR (i.e. exception SPSR).
+
+    OS_CPU_ARM_FP_REG_PUSH   R1
+                                                                ; if (OSRunning == 1)
+    MOV32   R3, OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNesting                                    ;   OSIntNesting++;
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              ; if (OSIntNesting == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+;********************************************************************************************************
+;                                 EXCEPTION HANDLER: TASK INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask
+
+    MOV32   R3, OSTCBCur                                        ; OSTCBCurPtr->StkPtr = SP;
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+    MOV32   R3, OS_CPU_ExceptStkBase                            ; Switch to exception stack.
+    LDR     SP, [R3]
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; Call OSIntExit().  This call MAY never return if a ready
+                                                                ; task with higher priority than the interrupted one is
+                                                                ; found.
+    BL      OSIntExit
+
+
+    MOV32   R3, OSTCBCur                                        ; SP = OSTCBCurPtr->StkPtr;
+    LDR     R4,  [R3]
+    LDR     SP,  [R4]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL       OS_CPU_ExceptHndlr                                 ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNesting                                    ;   OSIntNestingCtr--;
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;********************************************************************************************************
+;                                 ENABLE & DISABLE INTERRUPTS, IRQs, FIQs
+;********************************************************************************************************
+;********************************************************************************************************
+
+;********************************************************************************************************
+;                                       ENABLE & DISABLE INTERRUPTS
+;
+; Note(s) : 1) OS_CPU_SR_INT_En() can be called by OS_CPU_ExceptHndlr() AFTER the external
+;              interrupt source has been cleared.  This function will enable IRQs and FIQs so that
+;              nesting can occur.
+;
+;           2) OS_CPU_ARM_INT_Dis() can be called to disable IRQs and FIQs so that nesting will not occur.
+;********************************************************************************************************
+
+OS_CPU_SR_INT_En
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 ; Clear IRQ and FIQ bits in CPSR to enable all interrupts.
+    MSR     CPSR_c, R0
+    BX      LR
+
+
+OS_CPU_SR_INT_Dis
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 ; Set IRQ and FIQ bits in CPSR to disable all interrupts.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+;********************************************************************************************************
+;                                          ENABLE & DISABLE IRQs
+;
+; Note(s) : 1) OS_CPU_SR_IRQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the external
+;              interrupt source has been cleared.  This function will enable IRQs so that IRQ nesting
+;              can occur.
+;
+;           2) OS_CPU_ARM_IRQ_Dis() can be called to disable IRQs so that IRQ nesting will not occur.
+;********************************************************************************************************
+
+OS_CPU_SR_IRQ_En
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 ; Clear IRQ bit in CPSR to enable IRQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+
+OS_CPU_SR_IRQ_Dis
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 ; Set IRQ bit in CPSR to disable IRQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+;********************************************************************************************************
+;                                          ENABLE & DISABLE FIQs
+;
+; Note(s) : 1) OS_CPU_SR_FIQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the external
+;              interrupt source has been cleared.  This function will enable FIQs so that FIQ nesting
+;              can occur.
+;
+;           2) OS_CPU_ARM_FIQ_Dis() can be called to disable FIQs so that FIQ nesting will not occur.
+;********************************************************************************************************
+
+OS_CPU_SR_FIQ_En
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 ; Clear FIQ bit in CPSR to enable FIQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+
+OS_CPU_SR_FIQ_Dis
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 ; Set FIQ bit in CPSR to disable FIQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+;********************************************************************************************************
+;                              VFP/NEON REGISTER COUNT
+;
+; Register Usage:  R0     Double Register Count
+;********************************************************************************************************
+
+OS_CPU_ARM_DRegCntGet
+
+    MOV     R0, #32
+    BX      LR
+
+    END
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-none.s b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-none.s
new file mode 100644
index 0000000..019ac43
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-none.s
@@ -0,0 +1,695 @@
+;
+;********************************************************************************************************
+;                                                uC/OS-II
+;                                          The Real-Time Kernel
+;
+;
+;                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+;                    All rights reserved.  Protected by international copyright laws.
+;
+;                                      Generic ARM Cortex-A Port
+;
+; File      : OS_CPU_A_VFP-NONE.S
+; Version   : V2.92.11.00
+; By        : JBL
+;
+; LICENSING TERMS:
+; ---------------
+;           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+;           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+;           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+;           application/product.   We provide ALL the source code for your convenience and to help you
+;           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+;           it commercially without paying a licensing fee.
+;
+;           Knowledge of the source code may NOT be used to develop a similar product.
+;
+;           Please help us continue to provide the embedded community with the finest software available.
+;           Your honesty is greatly appreciated.
+;
+;           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+;
+; For       : ARM Cortex-A
+; Mode      : ARM or Thumb
+; Toolchain : ARM Compiler Toolchain
+;
+; Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                          EXTERNAL REFERENCE
+;********************************************************************************************************
+                                                                ; External references.
+    EXTERN     OSRunning
+    EXTERN     OSPrioCur
+    EXTERN     OSPrioHighRdy
+    EXTERN     OSTCBCur
+    EXTERN     OSTCBHighRdy
+    EXTERN     OSIntNesting
+    EXTERN     OSIntExit
+    EXTERN     OSTaskSwHook
+    EXTERN     OS_CPU_ExceptStkBase
+    EXTERN     OS_CPU_ExceptStkPtr
+    EXTERN     OS_CPU_ExceptHndlr                               ; Chip Support/BSP specific exception handler.
+
+
+;********************************************************************************************************
+;                                            FUNCTIONS
+;********************************************************************************************************
+
+                                                                ; Functions declared in this file.
+    EXPORT  OS_CPU_SR_Save
+    EXPORT  OS_CPU_SR_Restore
+
+    EXPORT  OSStartHighRdy
+    EXPORT  OSCtxSw
+    EXPORT  OSIntCtxSw
+
+                                                                ; Functions related to exception handling.
+    EXPORT  OS_CPU_ARM_ExceptUndefInstrHndlr
+    EXPORT  OS_CPU_ARM_ExceptSwiHndlr
+    EXPORT  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptDataAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptIrqHndlr
+    EXPORT  OS_CPU_ARM_ExceptFiqHndlr
+
+    EXPORT  OS_CPU_SR_INT_Dis
+    EXPORT  OS_CPU_SR_INT_En
+    EXPORT  OS_CPU_SR_FIQ_Dis
+    EXPORT  OS_CPU_SR_FIQ_En
+    EXPORT  OS_CPU_SR_IRQ_Dis
+    EXPORT  OS_CPU_SR_IRQ_En
+
+    EXPORT  OS_CPU_ARM_DRegCntGet
+
+
+;********************************************************************************************************
+;                                               EQUATES
+;********************************************************************************************************
+
+OS_CPU_ARM_CONTROL_INT_DIS        EQU  0xC0                     ; Disable both FIQ and IRQ.
+OS_CPU_ARM_CONTROL_FIQ_DIS        EQU  0x40                     ; Disable FIQ.
+OS_CPU_ARM_CONTROL_IRQ_DIS        EQU  0x80                     ; Disable IRQ.
+OS_CPU_ARM_CONTROL_THUMB          EQU  0x20                     ; Set THUMB mode.
+OS_CPU_ARM_CONTROL_ARM            EQU  0x00                     ; Set ARM mode.
+
+OS_CPU_ARM_MODE_MASK              EQU  0x1F
+OS_CPU_ARM_MODE_USR               EQU  0x10
+OS_CPU_ARM_MODE_FIQ               EQU  0x11
+OS_CPU_ARM_MODE_IRQ               EQU  0x12
+OS_CPU_ARM_MODE_SVC               EQU  0x13
+OS_CPU_ARM_MODE_ABT               EQU  0x17
+OS_CPU_ARM_MODE_UND               EQU  0x1B
+OS_CPU_ARM_MODE_SYS               EQU  0x1F
+
+OS_CPU_ARM_EXCEPT_RESET           EQU  0x00
+OS_CPU_ARM_EXCEPT_UNDEF_INSTR     EQU  0x01
+OS_CPU_ARM_EXCEPT_SWI             EQU  0x02
+OS_CPU_ARM_EXCEPT_PREFETCH_ABORT  EQU  0x03
+OS_CPU_ARM_EXCEPT_DATA_ABORT      EQU  0x04
+OS_CPU_ARM_EXCEPT_ADDR_ABORT      EQU  0x05
+OS_CPU_ARM_EXCEPT_IRQ             EQU  0x06
+OS_CPU_ARM_EXCEPT_FIQ             EQU  0x07
+
+OS_CPU_ARM_FPEXC_EN               EQU  0x40000000
+
+
+;********************************************************************************************************
+;                                     CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+
+    REQUIRE8
+    PRESERVE8
+
+    AREA CODE, CODE, READONLY
+    CODE32
+
+
+;********************************************************************************************************
+;                                  CRITICAL SECTION METHOD 3 FUNCTIONS
+;
+; Description: Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+;              would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+;              disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+;              disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+;              into the CPU's status register.
+;
+; Prototypes : OS_CPU_SR  OS_CPU_SR_Save    (void);
+;              void       OS_CPU_SR_Restore (OS_CPU_SR  os_cpu_sr);
+;
+;
+; Note(s)    : (1) These functions are used in general like this:
+;
+;                 void Task (void  *p_arg)
+;                 {
+;                                                               /* Allocate storage for CPU status register.            */
+;                 #if (OS_CRITICAL_METHOD == 3)
+;                      OS_CPU_SR  os_cpu_sr;
+;                 #endif
+;
+;                          :
+;                          :
+;                      OS_ENTER_CRITICAL();                     /* os_cpu_sr = OS_CPU_SR_Save();                        */
+;                          :
+;                          :
+;                      OS_EXIT_CRITICAL();                      /* OS_CPU_SR_Restore(cpu_sr);                           */
+;                          :
+;                          :
+;                 }
+;********************************************************************************************************
+
+OS_CPU_SR_Save
+
+        MRS     R0, CPSR
+        CPSID   IF                                              ; Set IRQ & FIQ bits in CPSR to DISABLE all interrupts
+        DSB
+        BX      LR                                              ; DISABLED, return the original CPSR contents in R0
+
+OS_CPU_SR_Restore                                               ; See Note #2
+
+        DSB
+        MSR     CPSR_c, R0
+        BX      LR
+
+
+;********************************************************************************************************
+;                                         START MULTITASKING
+;                                      void OSStartHighRdy(void)
+;
+; Note(s) : 1) OSStartHighRdy() MUST:
+;              a) Call OSTaskSwHook() then,
+;              b) Set OSRunning to OS_STATE_OS_RUNNING,
+;              c) Switch to the highest priority task.
+;********************************************************************************************************
+
+OSStartHighRdy
+                                                                ; Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSRunning                                       ; OSRunning = TRUE;
+    MOV     R1, #1
+    STRB    R1, [R0]
+                                                                ; SWITCH TO HIGHEST PRIORITY TASK:
+    MOV32   R0, OSTCBHighRdy                                    ;    Get highest priority task TCB address,
+    LDR     R0, [R0]                                            ;    Get stack pointer,
+    LDR     SP, [R0]                                            ;    Switch to the new stack,
+
+    LDR     R0, [SP], #4                                        ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+;
+; Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) Save the current task's context onto the current task's stack,
+;              b) OSTCBCur->StkPtr = SP;
+;              c) OSTaskSwHook();
+;              d) OSPrioCur           = OSPrioHighRdy;
+;              e) OSTCBCurPtr         = OSTCBHighRdy;
+;              f) SP                  = OSTCBHighRdy->StkPtr;
+;              g) Restore the new task's context from the new task's stack,
+;              h) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSCtxSw
+                                                                ; SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           ; Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       ; Push registers,
+    MRS     R0, CPSR                                            ; Push current CPSR,
+    TST     LR, #1                                              ; See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   ; If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    CLREX                                                       ; Clear exclusive monitor.
+
+    MOV32   R0, OSTCBCur                                        ; OSTCBCur->StkPtr = SP;
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur   = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCur                                        ; OSTCBCur = OSTCBHighRdy;
+    MOV32   R1, OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdy->OSTCBStkPtr;
+
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+;
+; Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) OSTaskSwHook();
+;              b) OSPrioCur   = OSPrioHighRdy;
+;              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+;              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+;              e) Restore the new task's context from the new task's stack,
+;              f) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSIntCtxSw
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCur                                        ; OSTCBCurPtr = OSTCBHighRdy;
+    MOV32   R1, OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  ; Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          ; Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                  PREFETCH ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               ; Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                    DATA ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                   ADDRESS ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                 INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                      GLOBAL EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1     Exception's SPSR
+;                  R2     Return PC
+;                  R3     Exception's SP
+;
+; Note(s)       : 1) An exception can occur in three different circumstances; in each of these, the
+;                    SVC stack pointer will point to a different entity :
+;
+;                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+;                       SVC STACK: Should point to a stack initialized by the application's startup code.
+;                       STK USAGE: Interrupted context -- SVC stack.
+;                                  Exception           -- SVC stack.
+;                                  Nested exceptions   -- SVC stack.
+;
+;                    b) CONDITION: An exception interrupts a task.
+;                       SVC STACK: Should point to task stack.
+;                       STK USAGE: Interrupted context -- Task stack.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;
+;                    c) CONDITION: An exception interrupts another exception.
+;                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+;                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr
+
+    MRS     R1, SPSR                                            ; Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              ; Save exception's stack pointer.
+
+                                                                ; Adjust exception stack pointer.  This is needed because
+                                                                ; exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           ;   Push task's PC,
+    STMFD   SP!, {LR}                                           ;   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       ;   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        ;   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           ;   Push task's CPSR (i.e. exception SPSR).
+
+                                                                ; if (OSRunning == 1)
+    MOV32   R3, OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNesting                                    ;   OSIntNesting++;
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              ; if (OSIntNesting == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+;********************************************************************************************************
+;                                 EXCEPTION HANDLER: TASK INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask
+
+    MOV32   R3, OSTCBCur                                        ; OSTCBCurPtr->StkPtr = SP;
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+    MOV32   R3, OS_CPU_ExceptStkBase                            ; Switch to exception stack.
+    LDR     SP, [R3]
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; Call OSIntExit().  This call MAY never return if a ready
+                                                                ; task with higher priority than the interrupted one is
+                                                                ; found.
+    BL      OSIntExit
+
+
+    MOV32   R3, OSTCBCur                                        ; SP = OSTCBCurPtr->StkPtr;
+    LDR     R4,  [R3]
+    LDR     SP,  [R4]
+
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL       OS_CPU_ExceptHndlr                                 ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNesting                                    ;   OSIntNestingCtr--;
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;********************************************************************************************************
+;                                 ENABLE & DISABLE INTERRUPTS, IRQs, FIQs
+;********************************************************************************************************
+;********************************************************************************************************
+
+;********************************************************************************************************
+;                                       ENABLE & DISABLE INTERRUPTS
+;
+; Note(s) : 1) OS_CPU_SR_INT_En() can be called by OS_CPU_ExceptHndlr() AFTER the external
+;              interrupt source has been cleared.  This function will enable IRQs and FIQs so that
+;              nesting can occur.
+;
+;           2) OS_CPU_ARM_INT_Dis() can be called to disable IRQs and FIQs so that nesting will not occur.
+;********************************************************************************************************
+
+OS_CPU_SR_INT_En
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 ; Clear IRQ and FIQ bits in CPSR to enable all interrupts.
+    MSR     CPSR_c, R0
+    BX      LR
+
+
+OS_CPU_SR_INT_Dis
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_INT_DIS                 ; Set IRQ and FIQ bits in CPSR to disable all interrupts.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+;********************************************************************************************************
+;                                          ENABLE & DISABLE IRQs
+;
+; Note(s) : 1) OS_CPU_SR_IRQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the external
+;              interrupt source has been cleared.  This function will enable IRQs so that IRQ nesting
+;              can occur.
+;
+;           2) OS_CPU_ARM_IRQ_Dis() can be called to disable IRQs so that IRQ nesting will not occur.
+;********************************************************************************************************
+
+OS_CPU_SR_IRQ_En
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 ; Clear IRQ bit in CPSR to enable IRQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+
+OS_CPU_SR_IRQ_Dis
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_IRQ_DIS                 ; Set IRQ bit in CPSR to disable IRQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+;********************************************************************************************************
+;                                          ENABLE & DISABLE FIQs
+;
+; Note(s) : 1) OS_CPU_SR_FIQ_En() can be called by OS_CPU_ExceptHndlr() AFTER the external
+;              interrupt source has been cleared.  This function will enable FIQs so that FIQ nesting
+;              can occur.
+;
+;           2) OS_CPU_ARM_FIQ_Dis() can be called to disable FIQs so that FIQ nesting will not occur.
+;********************************************************************************************************
+
+OS_CPU_SR_FIQ_En
+
+    DSB
+    MRS     R0, CPSR
+    BIC     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 ; Clear FIQ bit in CPSR to enable FIQs.
+    MSR     CPSR_c, R0
+    BX      LR
+
+
+OS_CPU_SR_FIQ_Dis
+
+    MRS     R0, CPSR
+    ORR     R0, R0, #OS_CPU_ARM_CONTROL_FIQ_DIS                 ; Set FIQ bit in CPSR to disable FIQs.
+    MSR     CPSR_c, R0
+    DSB
+    BX      LR
+
+
+;********************************************************************************************************
+;                              VFP/NEON REGISTER COUNT
+;
+; Register Usage:  R0     Double Register Count
+;********************************************************************************************************
+
+OS_CPU_ARM_DRegCntGet
+
+    MOV     R0, #0
+    BX      LR
+
+    END
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_c.c b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_c.c
new file mode 100644
index 0000000..ddc436e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_c.c
@@ -0,0 +1,628 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                      Generic ARM Cortex-A Port
+*
+* File      : OS_CPU_C.C
+* Version   : V2.92.11.00
+* By        : JBL
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+*
+* For       : ARM Cortex-A
+* Mode      : ARM or Thumb
+* Toolchain : ARM Compiler Toolchain
+**********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_GLOBALS
+#include 
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*
+* Note(s) : 1) ARM_MODE_ARM       is the CPSR bit mask for ARM Mode
+*           2) ARM_MODE_THUMB     is the CPSR bit mask for THUMB Mode
+*           3) ARM_SVC_MODE_THUMB is the CPSR bit mask for SVC MODE + THUMB Mode
+*           4) ARM_SVC_MODE_ARM   is the CPSR bit mask for SVC MODE + ARM Mode
+*********************************************************************************************************
+*/
+
+#if (OS_CPU_ARM_ENDIAN_TYPE == OS_CPU_ARM_ENDIAN_LITTLE)
+#define  ARM_MODE_ARM           0x00000000u
+#define  ARM_MODE_THUMB         0x00000020u
+#else                                                           /* Set bit 9 in big-endian mode.                        */
+#define  ARM_MODE_ARM           0x00000200u
+#define  ARM_MODE_THUMB         0x00000220u
+#endif
+
+#define  ARM_SVC_MODE_THUMB    (0x00000013u + ARM_MODE_THUMB)
+#define  ARM_SVC_MODE_ARM      (0x00000013u + ARM_MODE_ARM)
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  INT16U  OSTmrCtr;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                            (BEGINNING)
+*
+* Description: This function is called by OSInit() at the beginning of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSInitHookBegin (void)
+{
+    INT32U   size;
+    OS_STK  *pstk;
+
+                                                                /* Clear exception stack for stack checking.            */
+    pstk = &OS_CPU_ExceptStk[0];
+    size = OS_CPU_EXCEPT_STK_SIZE;
+    while (size > 0u) {
+        size--;
+       *pstk++ = (OS_STK)0;
+    }
+                                                                /* Align the ISR stack to 8-bytes                       */
+    OS_CPU_ExceptStkBase = (OS_STK *)&OS_CPU_ExceptStk[OS_CPU_EXCEPT_STK_SIZE];
+    OS_CPU_ExceptStkBase = (OS_STK *)((OS_STK)(OS_CPU_ExceptStkBase) & 0xFFFFFFF8);
+
+    OS_CPU_ARM_DRegCnt = OS_CPU_ARM_DRegCntGet();
+
+#if OS_TMR_EN > 0u
+    OSTmrCtr = 0u;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                               (END)
+*
+* Description: This function is called by OSInit() at the end of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSInitHookEnd (void)
+{
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+    OS_CPU_IntDisMeasInit();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being created.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskCreateHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskCreateHook(ptcb);
+#else
+    (void)ptcb;                                             /* Prevent compiler warning                           */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being deleted.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskDelHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskDelHook(ptcb);
+#else
+    (void)ptcb;                                             /* Prevent compiler warning                 */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do
+*              such things as STOP the CPU to conserve power.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are enabled during this call.
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskIdleHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskIdleHook();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            TASK RETURN HOOK
+*
+* Description: This function is called if a task accidentally returns.  In other words, a task should
+*              either be an infinite loop or delete itself when done.
+*
+* Arguments  : ptcb      is a pointer to the task control block of the task that is returning.
+*
+* Note(s)    : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskReturnHook (OS_TCB  *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskReturnHook(ptcb);
+#else
+    (void)ptcb;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-II's statistics task.  This allows your
+*              application to add functionality to the statistics task.
+*
+* Arguments  : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskStatHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskStatHook();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        INITIALIZE A TASK'S STACK
+*
+* Description: This function is called by either OSTaskCreate() or OSTaskCreateExt() to initialize the
+*              stack frame of the task being created.  This function is highly processor specific.
+*
+* Arguments  : task          is a pointer to the task code
+*
+*              p_arg         is a pointer to a user supplied data area that will be passed to the task
+*                            when the task first executes.
+*
+*              ptos          is a pointer to the top of stack.  It is assumed that 'ptos' points to
+*                            a 'free' entry on the task stack.  If OS_STK_GROWTH is set to 1 then
+*                            'ptos' will contain the HIGHEST valid address of the stack.  Similarly, if
+*                            OS_STK_GROWTH is set to 0, the 'ptos' will contains the LOWEST valid address
+*                            of the stack.
+*
+*              opt           specifies options that can be used to alter the behavior of OSTaskStkInit().
+*                            (see uCOS_II.H for OS_TASK_OPT_xxx).
+*
+* Returns    : Always returns the location of the new top-of-stack once the processor registers have
+*              been placed on the stack in the proper order.
+*
+* Note(s)   : (1) Interrupts are enabled when task starts executing.
+*
+*             (2) All tasks run in SVC mode.
+*
+*             (3) There are three differents stack frames depending on whether or not the Floating-Point (FP) co-processor
+*                 is enabled or not.
+*
+*                 (a) The stack frame shown in the diagram is used when the FP coprocessor is present and
+*                     OS_OPT_TASK_SAVE_FP is enabled. In this case the FP exception register, the FP registers and the
+*                     FP control/status register are saved in the stack frame.
+*
+*                 (b) If the FP co-processor is present but the OS_OPT_TASK_SAVE_FP is not set, only the FP
+*                     exception register is saved in the stack.
+*
+*                     (1) The FP exception register is saved twice in the stack frame to keep the 8-byte aligment.
+*                         (See note #4.)
+*
+*                    +-----------+
+*                    |   FPEXC   |
+*                    +-----------+
+*                    |    S0     |
+*                    +-----------+
+*                          .
+*                          .
+*                          .
+*                    +-----------+
+*                    |    S29    |
+*                    +-----------+
+*                    |    S30    |
+*                    +-----------+       +-----------+
+*                    |    S31    |       |   FPEXC   |
+*                    +-----------+       +-----------+
+*                    |   FPSCR   |       |   FPEXC   |
+*                    +-----------+       +-----------+      +-----------+
+*                    |   CPSR    |       |   CPSR    |      |   CPSR    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R0     |       |     R0    |      |    R0     |
+*                    +-----------+       +-----------+      +-----------+
+*                          .                  .                  .
+*                          .                  .                  .
+*                          .                  .                  .
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R10    |       |    R10    |      |    R10    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R11    |       |    R11    |      |    R11    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R12    |       |    R12    |      |    R12    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |  R14 (LR) |       |  R14 (LR) |      |  R14 (LR) |
+*                    +-----------+       +-----------+      +-----------+
+*                    | PC = Task |       | PC = Task |      | PC = Task |
+*                    +-----------+       +-----------+      +-----------+
+*
+*                        (a)                 (b)                (c)
+*
+*             (4) The SP must be 8-byte aligned in conforming to the Procedure Call Standard for the ARM architecture
+*
+*                    (a) Section 2.1 of the  ABI for the ARM Architecture Advisory Note. SP must be 8-byte aligned
+*                        on entry to AAPCS-Conforming functions states :
+*
+*                        The Procedure Call Standard for the ARM Architecture [AAPCS] requires primitive
+*                        data types to be naturally aligned according to their sizes (for size = 1, 2, 4, 8 bytes).
+*                        Doing otherwise creates more problems than it solves.
+*
+*                        In return for preserving the natural alignment of data, conforming code is permitted
+*                        to rely on that alignment. To support aligning data allocated on the stack, the stack
+*                        pointer (SP) is required to be 8-byte aligned on entry to a conforming function. In
+*                        practice this requirement is met if:
+*
+*                           (1) At each call site, the current size of the calling function’s stack frame is a multiple of 8 bytes.
+*                               This places an obligation on compilers and assembly language programmers.
+*
+*                           (2) SP is a multiple of 8 when control first enters a program.
+*                               This places an obligation on authors of low level OS, RTOS, and runtime library
+*                               code to align SP at all points at which control first enters
+*                               a body of (AAPCS-conforming) code.
+*
+*                       In turn, this requires the value of SP to be aligned to 0 modulo 8:
+*
+*                           (3) By exception handlers, before calling AAPCS-conforming code.
+*
+*                           (4) By OS/RTOS/run-time system code, before giving control to an application.
+*
+*                 (b) Section 2.3.1 corrective steps from the the SP must be 8-byte aligned on entry
+*                     to AAPCS-conforming functions advisory note also states.
+*
+*                     " This requirement extends to operating systems and run-time code for all architecture versions
+*                       prior to ARMV7 and to the A, R and M architecture profiles thereafter. Special considerations
+*                       associated with ARMV7M are discussed in §2.3.3"
+*
+*                     (1) Even if the SP 8-byte aligment is not a requirement for the ARMv7M profile, the stack is aligned
+*                         to 8-byte boundaries to support legacy execution enviroments.
+*
+*                 (c) Section 5.2.1.2 from the Procedure Call Standard for the ARM
+*                     architecture states :  "The stack must also conform to the following
+*                     constraint at a public interface:
+*
+*                     (1) SP mod 8 = 0. The stack must be double-word aligned"
+*
+*                 (d) From the ARM Technical Support Knowledge Base. 8 Byte stack aligment.
+*
+*                     "8 byte stack alignment is a requirement of the ARM Architecture Procedure
+*                      Call Standard [AAPCS]. This specifies that functions must maintain an 8 byte
+*                      aligned stack address (e.g. 0x00, 0x08, 0x10, 0x18, 0x20) on all external
+*                      interfaces. In practice this requirement is met if:
+*
+*                      (1) At each external interface, the current stack pointer
+*                          is a multiple of 8 bytes.
+*
+*                      (2) Your OS maintains 8 byte stack alignment on its external interfaces
+*                          e.g. on task switches"
+**********************************************************************************************************
+*/
+
+OS_STK  *OSTaskStkInit (void (*task)(void  *p_arg),
+                        void               *p_arg,
+                        OS_STK             *ptos,
+                        INT16U              opt)
+{
+    OS_STK  *p_stk;
+    INT32U   task_addr;
+    INT32U   fpu_reg_cnt;
+    INT8U    i;
+
+
+    p_stk     =  ptos + 1u;                                     /* Load stack pointer                                   */
+    p_stk     = (OS_STK *)((OS_STK)(p_stk) & 0xFFFFFFF8u);      /* Align stack pointer.                                 */
+    task_addr = (INT32U)task & ~1u;                             /* Mask off lower bit in case task is thumb mode        */
+
+    *--p_stk  = (OS_STK)task_addr;                              /* Entry Point                                          */
+    *--p_stk  = (OS_STK)OS_TaskReturn;                          /* R14 (LR)                                             */
+    *--p_stk  = (OS_STK)0x12121212u;                            /* R12                                                  */
+    *--p_stk  = (OS_STK)0x11111111u;                            /* R11                                                  */
+    *--p_stk  = (OS_STK)0x10101010u;                            /* R10                                                  */
+    *--p_stk  = (OS_STK)0x09090909u;                            /* R9                                                   */
+    *--p_stk  = (OS_STK)0x08080808u;                            /* R8                                                   */
+    *--p_stk  = (OS_STK)0x07070707u;                            /* R7                                                   */
+    *--p_stk  = (OS_STK)0x06060606u;                            /* R6                                                   */
+    *--p_stk  = (OS_STK)0x05050505u;                            /* R5                                                   */
+    *--p_stk  = (OS_STK)0x04040404u;                            /* R4                                                   */
+    *--p_stk  = (OS_STK)0x03030303u;                            /* R3                                                   */
+    *--p_stk  = (OS_STK)0x02020202u;                            /* R2                                                   */
+    *--p_stk  = (OS_STK)0x01010101u;                            /* R1                                                   */
+    *--p_stk  = (OS_STK)p_arg;                                  /* R0 : argument                                        */
+
+
+    if (((INT32U)task & 0x01u) == 0x01u) {                      /* See if task runs in Thumb or ARM mode                */
+       *--p_stk = (OS_STK)(ARM_SVC_MODE_THUMB);                 /* Set Thumb mode.                                      */
+    } else {
+       *--p_stk = (OS_STK)(ARM_SVC_MODE_ARM);
+    }
+
+    fpu_reg_cnt = OS_CPU_ARM_DRegCntGet();
+
+    if(fpu_reg_cnt != 0u) {
+        *--p_stk = (OS_STK)0;                                   /* Initialize Floating point status & control register  */
+                                                                /* Initialize general-purpose Floating point registers  */
+         for (i = 0u; i < fpu_reg_cnt * 2u; i++) {
+             *--p_stk = (OS_STK)0;
+         }
+
+        *--p_stk = (OS_STK)(0x40000000);                        /* Initialize Floating-Point Exception Register (Enable)*/
+    }
+
+    return (p_stk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other
+*              operations during a context switch.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that
+*                 will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the
+*                 task being switched out (i.e. the preempted task).
+*              3) If debug variables are enabled, the current process id is saved into the context ID register
+*                 found in the system control coprocessor. The Embedded Trace Macrocell (ETM) and the debug logic
+*                 use this register. The ETM can broadcast its value to indicate the process that is running currently.
+*
+*                     (a) The proccess id is formed by concatenating the current task priority with the lower 24 bits
+*                         from the current task TCB.
+*
+*                            31              24                     0
+*                             +---------------+---------------------+
+*                             | OSPrioHighRdy | OSTCBHighRdy[23..0] |
+*                             +---------------+---------------------+
+*********************************************************************************************************
+*/
+
+#if (OS_CPU_HOOKS_EN > 0u) && (OS_TASK_SW_HOOK_EN > 0u)
+void  OSTaskSwHook (void)
+
+{
+#if OS_CFG_DBG_EN > 0u
+    INT32U  ctx_id;
+#endif
+
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskSwHook();
+#endif
+
+#if OS_CFG_DBG_EN > 0u
+    ctx_id = ((INT32U)(OSPrioHighRdy    << 24u)             )
+           | ((INT32U)(OSTCBHighRdy           ) & 0x00FFFFFF);
+    OS_CPU_ARM_CtxID_Set(ctx_id);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           OS_TCBInit() HOOK
+*
+* Description: This function is called by OS_TCBInit() after setting up most of the TCB.
+*
+* Arguments  : ptcb    is a pointer to the TCB of the task being created.
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTCBInitHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TCBInitHook(ptcb);
+#else
+    (void)ptcb;                                            /* Prevent compiler warning                 */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if (OS_CPU_HOOKS_EN > 0u) && (OS_TIME_TICK_HOOK_EN > 0u)
+void  OSTimeTickHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TimeTickHook();
+#endif
+
+#if OS_TMR_EN > 0u
+    OSTmrCtr++;
+    if (OSTmrCtr >= (OS_TICKS_PER_SEC / OS_TMR_CFG_TICKS_PER_SEC)) {
+        OSTmrCtr = 0u;
+        OSTmrSignal();
+    }
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                             INTERRUPT DISABLE TIME MEASUREMENT, START
+*********************************************************************************************************
+*/
+
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+void  OS_CPU_IntDisMeasInit (void)
+{
+    OS_CPU_IntDisMeasNestingCtr = 0u;
+    OS_CPU_IntDisMeasCntsEnter  = 0u;
+    OS_CPU_IntDisMeasCntsExit   = 0u;
+    OS_CPU_IntDisMeasCntsMax    = 0u;
+    OS_CPU_IntDisMeasCntsDelta  = 0u;
+    OS_CPU_IntDisMeasCntsOvrhd  = 0u;
+    OS_CPU_IntDisMeasStart();                              /* Measure the overhead of the functions    */
+    OS_CPU_IntDisMeasStop();
+    OS_CPU_IntDisMeasCntsOvrhd  = OS_CPU_IntDisMeasCntsDelta;
+}
+
+
+void  OS_CPU_IntDisMeasStart (void)
+{
+    OS_CPU_IntDisMeasNestingCtr++;
+    if (OS_CPU_IntDisMeasNestingCtr == 1u) {               /* Only measure at the first nested level   */
+        OS_CPU_IntDisMeasCntsEnter = OS_CPU_IntDisMeasTmrRd();
+    }
+}
+
+
+void  OS_CPU_IntDisMeasStop (void)
+{
+    OS_CPU_IntDisMeasNestingCtr--;                                      /* Decrement nesting ctr       */
+    if (OS_CPU_IntDisMeasNestingCtr == 0u) {
+        OS_CPU_IntDisMeasCntsExit  = OS_CPU_IntDisMeasTmrRd();
+        OS_CPU_IntDisMeasCntsDelta = OS_CPU_IntDisMeasCntsExit - OS_CPU_IntDisMeasCntsEnter;
+        if (OS_CPU_IntDisMeasCntsDelta > OS_CPU_IntDisMeasCntsOvrhd) {  /* Ensure overhead < delta     */
+            OS_CPU_IntDisMeasCntsDelta -= OS_CPU_IntDisMeasCntsOvrhd;
+        } else {
+            OS_CPU_IntDisMeasCntsDelta  = OS_CPU_IntDisMeasCntsOvrhd;
+        }
+        if (OS_CPU_IntDisMeasCntsDelta > OS_CPU_IntDisMeasCntsMax) {    /* Track MAXIMUM               */
+            OS_CPU_IntDisMeasCntsMax = OS_CPU_IntDisMeasCntsDelta;
+        }
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                              GET NUMBER OF FREE ENTRIES IN EXCEPTION STACK
+*
+* Description : This function computes the number of free entries in the exception stack.
+*
+* Arguments   : None.
+*
+* Returns     : The number of free entries in the exception stack.
+*********************************************************************************************************
+*/
+
+INT32U  OS_CPU_ExceptStkChk (void)
+{
+    OS_STK  *pchk;
+    INT32U   nfree;
+    INT32U   size;
+
+
+    nfree = 0;
+    size  = OS_CPU_EXCEPT_STK_SIZE;
+    pchk  = &OS_CPU_ExceptStk[0];
+    while ((*pchk++ == (OS_STK)0) && (size > 0u)) {   /* Compute the number of zero entries on the stk */
+        nfree++;
+        size--;
+    }
+
+    return (nfree);
+}
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu.h b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu.h
new file mode 100644
index 0000000..885f57c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu.h
@@ -0,0 +1,234 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2016; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                      Generic ARM Cortex-A Port
+*
+* File      : OS_CPU.H
+* Version   : V2.92.11.00
+* By        : JBL
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+*
+* For       : ARM Cortex-A50
+* Mode      : ARM64
+* Toolchain : GNU
+*
+* Note(s) : None.
+*********************************************************************************************************
+*/
+
+#ifndef  OS_CPU_H
+#define  OS_CPU_H
+
+#ifdef   OS_CPU_GLOBALS
+#define  OS_CPU_EXT
+#else
+#define  OS_CPU_EXT  extern
+#endif
+
+#include 
+
+
+#ifndef  OS_CPU_EXCEPT_STK_SIZE
+#define  OS_CPU_EXCEPT_STK_SIZE    1024u                         /* Default exception stack size is 128 OS_STK entries.  */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CONFIGURATION DEFAULTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_ARM_ENDIAN_LITTLE                         1u
+#define  OS_CPU_ARM_ENDIAN_BIG                            2u
+
+
+#if (defined(__BYTE_ORDER__) && \
+            (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
+#define  OS_CPU_ARM_ENDIAN_TYPE            OS_CPU_ARM_ENDIAN_BIG
+#else
+#define  OS_CPU_ARM_ENDIAN_TYPE            OS_CPU_ARM_ENDIAN_LITTLE
+#endif
+
+#ifndef  OS_CPU_INT_DIS_MEAS_EN
+#define  OS_CPU_INT_DIS_MEAS_EN    0u                           /* Intrrupt dis time measurement disabled by default  */
+#endif
+
+/*
+*********************************************************************************************************
+*                                       ARM EXCEPTION DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              DATA TYPES
+*                                         (Compiler Specific)
+*********************************************************************************************************
+*/
+
+typedef  CPU_BOOLEAN BOOLEAN;
+typedef  CPU_INT08U  INT8U;                    /* Unsigned  8 bit quantity                           */
+typedef  CPU_INT08S  INT8S;                    /* Signed    8 bit quantity                           */
+typedef  CPU_INT16U  INT16U;                   /* Unsigned 16 bit quantity                           */
+typedef  CPU_INT16S  INT16S;                   /* Signed   16 bit quantity                           */
+typedef  CPU_INT32U  INT32U;                   /* Unsigned 32 bit quantity                           */
+typedef  CPU_INT32S  INT32S;                   /* Signed   32 bit quantity                           */
+typedef  CPU_INT64U  INT64U;                   /* Unsigned 64 bit quantity                           */
+typedef  CPU_INT64S  INT64S;                   /* Signed   64 bit quantity                           */
+typedef  CPU_FP32    FP32;                     /* Single precision floating point                    */
+typedef  CPU_FP64    FP64;                     /* Double precision floating point                    */
+
+typedef  CPU_STK     OS_STK;                   /* Each stack entry is 32-bit wide                    */
+typedef  CPU_SR      OS_CPU_SR;                /* Define size of CPU status register (PSR = 32 bits) */
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+#define  OS_TASK_SW()                           OSCtxSw()
+#define  OS_STK_GROWTH                           1u         /* Stack grows from HIGH to LOW memory on ARM        */
+
+/*
+*********************************************************************************************************
+*                                                ARM
+*
+* Method #1:  Disable/Enable interrupts using simple instructions.  After critical section, interrupts
+*             will be enabled even if they were disabled before entering the critical section.
+*             NOT IMPLEMENTED
+*
+* Method #2:  Disable/Enable interrupts by preserving the state of interrupts.  In other words, if
+*             interrupts were disabled before entering the critical section, they will be disabled when
+*             leaving the critical section.
+*             NOT IMPLEMENTED
+*
+* Method #3:  Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+*             would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+*             disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+*             disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+*             into the CPU's status register.
+*********************************************************************************************************
+*/
+
+#define  OS_CRITICAL_METHOD    3u
+
+
+#if      OS_CRITICAL_METHOD == 3u
+
+#if      OS_CPU_INT_DIS_MEAS_EN > 0u
+
+#define  OS_ENTER_CRITICAL()  do { cpu_sr = CPU_SR_Save();  \
+                                   OS_CPU_IntDisMeasStart();  } while (0)
+#define  OS_EXIT_CRITICAL()   do { OS_CPU_IntDisMeasStop();    \
+                                   CPU_SR_Restore(cpu_sr); } while (0)
+
+#else
+
+#define  OS_ENTER_CRITICAL()  do {cpu_sr = CPU_SR_Save();} while (0)
+#define  OS_EXIT_CRITICAL()   do {CPU_SR_Restore(cpu_sr);} while (0)
+
+#endif
+
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+                                                                /* Variables used to measure interrupt disable time     */
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasNestingCtr;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsEnter;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsExit;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsMax;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsDelta;
+OS_CPU_EXT  INT16U   OS_CPU_IntDisMeasCntsOvrhd;
+#endif
+
+OS_CPU_EXT  OS_STK   OS_CPU_ExceptStk[OS_CPU_EXCEPT_STK_SIZE];
+OS_CPU_EXT  OS_STK  *OS_CPU_ExceptStkBase;
+OS_CPU_EXT  OS_STK  *OS_CPU_ExceptStkPtr;
+
+OS_CPU_EXT  INT32U   OS_CPU_ARM_DRegCnt;                        /* VFP/NEON register count                              */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if OS_CRITICAL_METHOD == 3u                                    /* See OS_CPU_A.ASM                                     */
+    OS_CPU_SR  OS_CPU_SR_Save                     (void);
+    void       OS_CPU_SR_Restore                  (OS_CPU_SR cpu_sr);
+#endif
+
+    void       OS_CPU_SR_INT_Dis                  (void);
+    void       OS_CPU_SR_INT_En                   (void);
+    void       OS_CPU_SR_FIQ_Dis                  (void);
+    void       OS_CPU_SR_FIQ_En                   (void);
+    void       OS_CPU_SR_IRQ_Dis                  (void);
+    void       OS_CPU_SR_IRQ_En                   (void);
+
+    void       OSCtxSw                            (void);
+    void       OSIntCtxSw                         (void);
+    void       OSStartHighRdy                     (void);
+
+    void       OS_CPU_InitExceptVect              (void);
+
+    void       OS_CPU_ARM_ExceptUndefInstrHndlr   (void);
+    void       OS_CPU_ARM_ExceptSwiHndlr          (void);
+    void       OS_CPU_ARM_ExceptPrefetchAbortHndlr(void);
+    void       OS_CPU_ARM_ExceptDataAbortHndlr    (void);
+    void       OS_CPU_ARM_ExceptIrqHndlr          (void);
+    void       OS_CPU_ARM_ExceptFiqHndlr          (void);
+
+    void       OS_CPU_ExceptHndlr                 (INT32U  src_id);
+
+    INT32U     OS_CPU_ExceptStkChk                (void);
+
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+    void       OS_CPU_IntDisMeasInit              (void);
+    void       OS_CPU_IntDisMeasStart             (void);
+    void       OS_CPU_IntDisMeasStop              (void);
+    INT16U     OS_CPU_IntDisMeasTmrRd             (void);
+#endif
+
+    CPU_INT64U  OS_CPU_SPSRGet             (void);
+    CPU_INT64U  OS_CPU_SIMDGet             (void);
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_a.S b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_a.S
new file mode 100644
index 0000000..78986c3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_a.S
@@ -0,0 +1,488 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2016 Micrium, Inc. Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                     Generic ARM Cortex-A50 Port
+*
+* File      : OS_CPU_A.ASM
+* Version   : V3.05.01
+* By        : JBL
+*
+* For       : ARM Cortex-A50
+* Mode      : AArch64
+* Toolchain : GNU
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          PUBLIC FUNCTIONS
+*********************************************************************************************************
+*/
+                                                                /* External references. */
+    .global  OSRunning
+    .global  OSPrioCur
+    .global  OSPrioHighRdy
+    .global  OSTCBCurPtr
+    .global  OSTCBHighRdyPtr
+    .global  OSIntNestingCtr
+    .global  OSIntExit
+    .global  OSTaskSwHook
+
+    .global  OS_CPU_ExceptStkBase
+
+                                                                /* Functions declared in this file. */
+    .global  OSStartHighRdy
+    .global  OSCtxSw
+    .global  OSIntCtxSw
+    .global  OS_CPU_SPSRGet
+    .global  OS_CPU_SIMDGet
+
+/*
+*********************************************************************************************************
+*                                               EQUATES
+*********************************************************************************************************
+*/
+
+#ifndef OS_CPU_EL3
+#define OS_CPU_EL3 1
+#endif
+
+#ifndef OS_CPU_SIMD
+#define OS_CPU_SIMD 1
+#endif
+
+/*
+*********************************************************************************************************
+*                                     CODE GENERATION DIRECTIVES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       SIMD REGISTERS MACROS
+*********************************************************************************************************
+*/
+
+    .macro OS_CPU_ARM_REG_POP
+
+        #if OS_CPU_SIMD == 1
+        LDP  q0, q1, [sp], #32
+        LDP  q2, q3, [sp], #32
+        LDP  q4, q5, [sp], #32
+        LDP  q6, q7, [sp], #32
+        LDP  q8, q9, [sp], #32
+        LDP  q10, q11, [sp], #32
+        LDP  q12, q13, [sp], #32
+        LDP  q14, q15, [sp], #32
+        LDP  q16, q17, [sp], #32
+        LDP  q18, q19, [sp], #32
+        LDP  q20, q21, [sp], #32
+        LDP  q22, q23, [sp], #32
+        LDP  q24, q25, [sp], #32
+        LDP  q26, q27, [sp], #32
+        LDP  q28, q29, [sp], #32
+        LDP  q30, q31, [sp], #32
+
+        LDP  x28, x29, [sp], #16
+        MSR  FPSR, x28
+        MSR  FPCR, x29
+        #endif
+
+        LDP  x0, x1, [sp], #16
+        #if OS_CPU_EL3 == 1
+        MSR  SPSR_EL3, x1
+        #else
+        MSR  SPSR_EL1, x1
+        #endif
+
+        LDP  x30, x0, [sp], #16
+        #if OS_CPU_EL3 == 1
+        MSR  ELR_EL3, x0
+        #else
+        MSR  ELR_EL1, x0
+        #endif
+
+        LDP  x0, x1, [sp], #16
+        LDP  x2, x3, [sp], #16
+        LDP  x4, x5, [sp], #16
+        LDP  x6, x7, [sp], #16
+        LDP  x8, x9, [sp], #16
+        LDP  x10, x11, [sp], #16
+        LDP  x12, x13, [sp], #16
+        LDP  x14, x15, [sp], #16
+        LDP  x16, x17, [sp], #16
+        LDP  x18, x19, [sp], #16
+        LDP  x20, x21, [sp], #16
+        LDP  x22, x23, [sp], #16
+        LDP  x24, x25, [sp], #16
+        LDP  x26, x27, [sp], #16
+        LDP  x28, x29, [sp], #16
+    .endm
+
+    .macro OS_CPU_ARM_REG_PUSH
+        STP  x28, x29, [sp, #-16]!
+        STP  x26, x27, [sp, #-16]!
+        STP  x24, x25, [sp, #-16]!
+        STP  x22, x23, [sp, #-16]!
+        STP  x20, x21, [sp, #-16]!
+        STP  x18, x19, [sp, #-16]!
+        STP  x16, x17, [sp, #-16]!
+        STP  x14, x15, [sp, #-16]!
+        STP  x12, x13, [sp, #-16]!
+        STP  x10, x11, [sp, #-16]!
+        STP  x8, x9, [sp, #-16]!
+        STP  x6, x7, [sp, #-16]!
+        STP  x4, x5, [sp, #-16]!
+        STP  x2, x3, [sp, #-16]!
+        STP  x0, x1, [sp, #-16]!
+
+        #if OS_CPU_EL3 == 1
+        MRS  x0, ELR_EL3
+        #else
+        MRS  x0, ELR_EL1
+        #endif
+
+        STP  x30, x0, [sp, #-16]!
+
+        #if OS_CPU_EL3 == 1
+        MRS  x0, SPSR_EL3
+        #else
+        MRS  x0, SPSR_EL1
+        #endif
+
+        MOV  x1, x0
+        STP  x0, x1, [sp, #-16]!
+
+        #if OS_CPU_SIMD == 1
+        MRS  x28, FPSR
+        MRS  x29, FPCR
+        STP  x28, x29, [sp, #-16]!
+
+        STP  q30, q31, [sp, #-32]!
+        STP  q28, q29, [sp, #-32]!
+        STP  q26, q27, [sp, #-32]!
+        STP  q24, q25, [sp, #-32]!
+        STP  q22, q23, [sp, #-32]!
+        STP  q20, q21, [sp, #-32]!
+        STP  q18, q19, [sp, #-32]!
+        STP  q16, q17, [sp, #-32]!
+        STP  q14, q15, [sp, #-32]!
+        STP  q12, q13, [sp, #-32]!
+        STP  q10, q11, [sp, #-32]!
+        STP  q8, q9, [sp, #-32]!
+        STP  q6, q7, [sp, #-32]!
+        STP  q4, q5, [sp, #-32]!
+        STP  q2, q3, [sp, #-32]!
+        STP  q0, q1, [sp, #-32]!
+        #endif
+    .endm
+
+    .macro OS_CPU_ARM_REG_PUSHF
+        STP  x28, x29, [sp, #-16]!
+        STP  x26, x27, [sp, #-16]!
+        STP  x24, x25, [sp, #-16]!
+        STP  x22, x23, [sp, #-16]!
+        STP  x20, x21, [sp, #-16]!
+        STP  x18, x19, [sp, #-16]!
+        SUB  sp, sp, #144
+
+        MOV  x0, x30
+        STP  x30, x0, [sp, #-16]!
+
+        #if OS_CPU_EL3 == 1
+        MOV  x0, #0x0000020D
+        #else
+        MOV  x0, #0x00000205
+        #endif
+        MOV  x1, x0
+        STP  x0, x1, [sp, #-16]!
+
+        #if OS_CPU_SIMD == 1
+        MRS  x28, FPSR
+        MRS  x29, FPCR
+        STP  x28, x29, [sp, #-16]!
+
+        SUB  sp, sp, #256
+        STP  q14, q15, [sp, #-32]!
+        STP  q12, q13, [sp, #-32]!
+        STP  q10, q11, [sp, #-32]!
+        STP  q8, q9, [sp, #-32]!
+        SUB  sp, sp, #128
+        #endif
+    .endm
+
+/*
+*********************************************************************************************************
+*                                         START MULTITASKING
+*                                      void OSStartHighRdy(void)
+*
+* Note(s) : 1) OSStartHighRdy() MUST:
+*              a) Call OSTaskSwHook() then,
+*              b) Set OSRunning to OS_STATE_OS_RUNNING,
+*              c) Switch to the highest priority task.
+*********************************************************************************************************
+*/
+
+OSStartHighRdy:
+
+    BL   OSTaskSwHook
+
+    LDR  x0, =OSRunning
+    MOV  x1, #1
+    STR  x1, [x0]
+
+    LDR  x0, =OSTCBHighRdy
+    LDR  x1, [x0]
+    LDR  x2, [x1]
+    MOV  sp, x2
+
+    #if OS_CPU_SIMD == 1
+    LDP  q0, q1, [sp], #32
+    LDP  q2, q3, [sp], #32
+    LDP  q4, q5, [sp], #32
+    LDP  q6, q7, [sp], #32
+    LDP  q8, q9, [sp], #32
+    LDP  q10, q11, [sp], #32
+    LDP  q12, q13, [sp], #32
+    LDP  q14, q15, [sp], #32
+    LDP  q16, q17, [sp], #32
+    LDP  q18, q19, [sp], #32
+    LDP  q20, q21, [sp], #32
+    LDP  q22, q23, [sp], #32
+    LDP  q24, q25, [sp], #32
+    LDP  q26, q27, [sp], #32
+    LDP  q28, q29, [sp], #32
+    LDP  q30, q31, [sp], #32
+
+    LDP  x28, x29, [sp], #16
+    MSR  FPSR, x28
+    MSR  FPCR, x29
+    #endif
+
+
+    LDP  x0, x1, [sp], #16
+    LDP  x2, x3, [sp], #16
+
+    MRS  x4, CurrentEL
+    LSR  x4, x4, #2
+    CMP  x4, #3 /* EL3 */
+    B.EQ  OSStartHighRdy_EL3
+    CMP  x4, #2 /* EL2 */
+    B.EQ  OSStartHighRdy_EL2
+    CMP  x4, #1 /* EL1 */
+    B.EQ  OSStartHighRdy_EL1
+
+    B . /* Can't run the kernel from EL0 */
+
+OSStartHighRdy_EL3:
+    MSR  SPSR_EL3, x1
+    MSR  ELR_EL3, x3
+    B  OSStartHighRdy_Restore
+
+OSStartHighRdy_EL2:
+    MSR  SPSR_EL2, x1
+    MSR  ELR_EL2, x3
+    B  OSStartHighRdy_Restore
+
+OSStartHighRdy_EL1:
+    MSR  SPSR_EL1, x1
+    MSR  ELR_EL1, x3
+    B  OSStartHighRdy_Restore
+
+OSStartHighRdy_Restore:
+    #if OS_CPU_EL3 == 0
+    MOV  x0, sp
+    SUB  x0, x0, #240
+    MSR  SP_EL1, x0
+    #endif
+
+    LDP  x0, x1, [sp], #16
+    LDP  x2, x3, [sp], #16
+    LDP  x4, x5, [sp], #16
+    LDP  x6, x7, [sp], #16
+    LDP  x8, x9, [sp], #16
+    LDP  x10, x11, [sp], #16
+    LDP  x12, x13, [sp], #16
+    LDP  x14, x15, [sp], #16
+    LDP  x16, x17, [sp], #16
+    LDP  x18, x19, [sp], #16
+    LDP  x20, x21, [sp], #16
+    LDP  x22, x23, [sp], #16
+    LDP  x24, x25, [sp], #16
+    LDP  x26, x27, [sp], #16
+    LDP  x28, x29, [sp], #16
+    ERET
+
+/*
+*********************************************************************************************************
+*                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+*
+* Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+*
+*           2) The pseudo-code for OSCtxSw() is:
+*              a) Save the current task's context onto the current task's stack,
+*              b) OSTCBCurPtr->StkPtr = SP*
+*              c) OSTaskSwHook()*
+*              d) OSPrioCur           = OSPrioHighRdy*
+*              e) OSTCBCurPtr         = OSTCBHighRdyPtr*
+*              f) SP                  = OSTCBHighRdyPtr->StkPtr*
+*              g) Restore the new task's context from the new task's stack,
+*              h) Return to new task's code.
+*
+*           3) Upon entry:
+*              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+*              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+*********************************************************************************************************
+*/
+
+OSCtxSw:
+
+    OS_CPU_ARM_REG_PUSHF
+
+    LDR x0, =OSTCBCur
+    LDR x1, [x0]
+    MOV x2, sp
+    STR x2, [x1]
+
+
+    BL OSTaskSwHook
+
+
+    LDR x0, =OSPrioCur
+    LDR x1, =OSPrioHighRdy
+    LDRB w2, [x1]
+    STRB w2, [x0]
+
+
+    LDR x0, =OSTCBCur
+    LDR x1, =OSTCBHighRdy
+    LDR x2, [x1]
+    STR x2, [x0]
+
+
+    LDR x0, [x2]
+    MOV sp, x0
+
+    OS_CPU_ARM_REG_POP
+    ERET
+
+
+/*
+*********************************************************************************************************
+*                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+*
+* Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+*
+*           2) The pseudo-code for OSCtxSw() is:
+*              a) OSTaskSwHook()*
+*              b) OSPrioCur   = OSPrioHighRdy*
+*              c) OSTCBCurPtr = OSTCBHighRdyPtr*
+*              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr*
+*              e) Restore the new task's context from the new task's stack,
+*              f) Return to new task's code.
+*
+*           3) Upon entry:
+*              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+*              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+*********************************************************************************************************
+*/
+
+OSIntCtxSw:
+
+    BL OSTaskSwHook
+
+    LDR x0, =OSPrioCur
+    LDR x1, =OSPrioHighRdy
+    LDRB w2, [x1]
+    STRB w2, [x0]
+
+
+    LDR x0, =OSTCBCur
+    LDR x1, =OSTCBHighRdy
+    LDR x2, [x1]
+    STR x2, [x0]
+
+
+    LDR x0, [x2]
+    MOV sp, x0
+
+    OS_CPU_ARM_REG_POP
+    ERET
+
+
+    .global OS_CPU_ARM_ExceptIrqHndlr
+
+OS_CPU_ARM_ExceptIrqHndlr:
+
+    OS_CPU_ARM_REG_PUSH
+
+    LDR  x0, =OSIntNesting
+    LDRB w1, [x0]
+    ADD  w1, w1, #1
+    STRB w1, [x0]
+    CMP  w1, #1
+    BNE  OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+    LDR  x0, =OSTCBCur
+    LDR  x1, [x0]
+    MOV  x2, sp
+    STR  x2, [x1]
+
+    LDR  x0, =OS_CPU_ExceptStkBase
+    LDR  x1, [x0]
+    MOV  sp, x1
+
+    BL   OS_CPU_ExceptHndlr
+
+    BL   OSIntExit
+
+    LDR  x0, =OSTCBCur
+    LDR  x1, [x0]
+    LDR  x2, [x1]
+    MOV  sp, x2
+
+    OS_CPU_ARM_REG_POP
+    ERET
+
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept:
+
+    .global  OS_CPU_ExceptHndlr
+    BL   OS_CPU_ExceptHndlr
+
+    LDR  x0, =OSIntNesting
+    LDRB w1, [x0]
+    SUB  w1, w1, #1
+    STRB w1, [x0]
+
+    OS_CPU_ARM_REG_POP
+
+    ERET
+
+
+OS_CPU_SPSRGet:
+    #if OS_CPU_EL3 == 1
+    MOV x0, #0x0000000D
+    #else
+    MOV x0, #0x00000005
+    #endif
+
+    RET
+
+
+OS_CPU_SIMDGet:
+    #if OS_CPU_SIMD == 1
+    MOV x0, #1
+    #else
+    MOV x0, #0
+    #endif
+
+    RET
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_c.c b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_c.c
new file mode 100644
index 0000000..ca55f41
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_c.c
@@ -0,0 +1,563 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2013; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                      Generic ARM Cortex-A Port
+*
+* File      : OS_CPU_C.C
+* Version   : V2.92.11.00
+* By        : JBL
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+*
+* For       : ARM Cortex-A
+* Mode      : ARM or Thumb
+* Toolchain : GNU
+**********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_GLOBALS
+#include 
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  INT16U  OSTmrCtr;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                            (BEGINNING)
+*
+* Description: This function is called by OSInit() at the beginning of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSInitHookBegin (void)
+{
+    INT32U   size;
+    OS_STK  *pstk;
+
+                                                                /* Clear exception stack for stack checking.            */
+    pstk = &OS_CPU_ExceptStk[0];
+    size = OS_CPU_EXCEPT_STK_SIZE;
+    while (size > 0u) {
+        size--;
+       *pstk++ = (OS_STK)0;
+    }
+                                                                /* Align the ISR stack to 8-bytes                       */
+    OS_CPU_ExceptStkBase = (OS_STK *)(OS_CPU_ExceptStk + OS_CPU_EXCEPT_STK_SIZE - 1u);
+    OS_CPU_ExceptStkBase = (OS_STK *)((CPU_STK)OS_CPU_ExceptStkBase & ~(CPU_CFG_STK_ALIGN_BYTES - 1u));
+
+
+#if OS_TMR_EN > 0u
+    OSTmrCtr = 0u;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                               (END)
+*
+* Description: This function is called by OSInit() at the end of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSInitHookEnd (void)
+{
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+    OS_CPU_IntDisMeasInit();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being created.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskCreateHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskCreateHook(ptcb);
+#else
+    (void)ptcb;                                             /* Prevent compiler warning                           */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being deleted.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskDelHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskDelHook(ptcb);
+#else
+    (void)ptcb;                                             /* Prevent compiler warning                 */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do
+*              such things as STOP the CPU to conserve power.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are enabled during this call.
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskIdleHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskIdleHook();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            TASK RETURN HOOK
+*
+* Description: This function is called if a task accidentally returns.  In other words, a task should
+*              either be an infinite loop or delete itself when done.
+*
+* Arguments  : ptcb      is a pointer to the task control block of the task that is returning.
+*
+* Note(s)    : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskReturnHook (OS_TCB  *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskReturnHook(ptcb);
+#else
+    (void)ptcb;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-II's statistics task.  This allows your
+*              application to add functionality to the statistics task.
+*
+* Arguments  : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskStatHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskStatHook();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        INITIALIZE A TASK'S STACK
+*
+* Description: This function is called by either OSTaskCreate() or OSTaskCreateExt() to initialize the
+*              stack frame of the task being created.  This function is highly processor specific.
+*
+* Arguments  : task          is a pointer to the task code
+*
+*              p_arg         is a pointer to a user supplied data area that will be passed to the task
+*                            when the task first executes.
+*
+*              ptos          is a pointer to the top of stack.  It is assumed that 'ptos' points to
+*                            a 'free' entry on the task stack.  If OS_STK_GROWTH is set to 1 then
+*                            'ptos' will contain the HIGHEST valid address of the stack.  Similarly, if
+*                            OS_STK_GROWTH is set to 0, the 'ptos' will contains the LOWEST valid address
+*                            of the stack.
+*
+*              opt           specifies options that can be used to alter the behavior of OSTaskStkInit().
+*                            (see uCOS_II.H for OS_TASK_OPT_xxx).
+*
+* Returns    : Always returns the location of the new top-of-stack once the processor registers have
+*              been placed on the stack in the proper order.
+*
+* Note(s)   : (1) Interrupts are enabled when task starts executing.
+*
+*             (2) All tasks run in SVC mode.
+*
+*             (3) There are three differents stack frames depending on whether or not the Floating-Point (FP) co-processor
+*                 is enabled or not.
+*
+*                 (a) The stack frame shown in the diagram is used when the FP coprocessor is present and
+*                     OS_OPT_TASK_SAVE_FP is enabled. In this case the FP exception register, the FP registers and the
+*                     FP control/status register are saved in the stack frame.
+*
+*                 (b) If the FP co-processor is present but the OS_OPT_TASK_SAVE_FP is not set, only the FP
+*                     exception register is saved in the stack.
+*
+*                     (1) The FP exception register is saved twice in the stack frame to keep the 8-byte aligment.
+*                         (See note #4.)
+*
+*                    +-----------+
+*                    |   FPEXC   |
+*                    +-----------+
+*                    |    S0     |
+*                    +-----------+
+*                          .
+*                          .
+*                          .
+*                    +-----------+
+*                    |    S29    |
+*                    +-----------+
+*                    |    S30    |
+*                    +-----------+       +-----------+
+*                    |    S31    |       |   FPEXC   |
+*                    +-----------+       +-----------+
+*                    |   FPSCR   |       |   FPEXC   |
+*                    +-----------+       +-----------+      +-----------+
+*                    |   CPSR    |       |   CPSR    |      |   CPSR    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R0     |       |     R0    |      |    R0     |
+*                    +-----------+       +-----------+      +-----------+
+*                          .                  .                  .
+*                          .                  .                  .
+*                          .                  .                  .
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R10    |       |    R10    |      |    R10    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R11    |       |    R11    |      |    R11    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |    R12    |       |    R12    |      |    R12    |
+*                    +-----------+       +-----------+      +-----------+
+*                    |  R14 (LR) |       |  R14 (LR) |      |  R14 (LR) |
+*                    +-----------+       +-----------+      +-----------+
+*                    | PC = Task |       | PC = Task |      | PC = Task |
+*                    +-----------+       +-----------+      +-----------+
+*
+*                        (a)                 (b)                (c)
+*
+*             (4) The SP must be 8-byte aligned in conforming to the Procedure Call Standard for the ARM architecture
+*
+*                    (a) Section 2.1 of the  ABI for the ARM Architecture Advisory Note. SP must be 8-byte aligned
+*                        on entry to AAPCS-Conforming functions states :
+*
+*                        The Procedure Call Standard for the ARM Architecture [AAPCS] requires primitive
+*                        data types to be naturally aligned according to their sizes (for size = 1, 2, 4, 8 bytes).
+*                        Doing otherwise creates more problems than it solves.
+*
+*                        In return for preserving the natural alignment of data, conforming code is permitted
+*                        to rely on that alignment. To support aligning data allocated on the stack, the stack
+*                        pointer (SP) is required to be 8-byte aligned on entry to a conforming function. In
+*                        practice this requirement is met if:
+*
+*                           (1) At each call site, the current size of the calling function’s stack frame is a multiple of 8 bytes.
+*                               This places an obligation on compilers and assembly language programmers.
+*
+*                           (2) SP is a multiple of 8 when control first enters a program.
+*                               This places an obligation on authors of low level OS, RTOS, and runtime library
+*                               code to align SP at all points at which control first enters
+*                               a body of (AAPCS-conforming) code.
+*
+*                       In turn, this requires the value of SP to be aligned to 0 modulo 8:
+*
+*                           (3) By exception handlers, before calling AAPCS-conforming code.
+*
+*                           (4) By OS/RTOS/run-time system code, before giving control to an application.
+*
+*                 (b) Section 2.3.1 corrective steps from the the SP must be 8-byte aligned on entry
+*                     to AAPCS-conforming functions advisory note also states.
+*
+*                     " This requirement extends to operating systems and run-time code for all architecture versions
+*                       prior to ARMV7 and to the A, R and M architecture profiles thereafter. Special considerations
+*                       associated with ARMV7M are discussed in §2.3.3"
+*
+*                     (1) Even if the SP 8-byte aligment is not a requirement for the ARMv7M profile, the stack is aligned
+*                         to 8-byte boundaries to support legacy execution enviroments.
+*
+*                 (c) Section 5.2.1.2 from the Procedure Call Standard for the ARM
+*                     architecture states :  "The stack must also conform to the following
+*                     constraint at a public interface:
+*
+*                     (1) SP mod 8 = 0. The stack must be double-word aligned"
+*
+*                 (d) From the ARM Technical Support Knowledge Base. 8 Byte stack aligment.
+*
+*                     "8 byte stack alignment is a requirement of the ARM Architecture Procedure
+*                      Call Standard [AAPCS]. This specifies that functions must maintain an 8 byte
+*                      aligned stack address (e.g. 0x00, 0x08, 0x10, 0x18, 0x20) on all external
+*                      interfaces. In practice this requirement is met if:
+*
+*                      (1) At each external interface, the current stack pointer
+*                          is a multiple of 8 bytes.
+*
+*                      (2) Your OS maintains 8 byte stack alignment on its external interfaces
+*                          e.g. on task switches"
+**********************************************************************************************************
+*/
+
+OS_STK  *OSTaskStkInit (void (*task)(void  *p_arg),
+                        void               *p_arg,
+                        OS_STK             *ptos,
+                        INT16U              opt)
+{
+    OS_STK  *p_stk;
+    OS_STK   task_addr;
+    INT8U    i;
+
+
+    p_stk     =  ptos + 1u;                                     /* Load stack pointer                                   */
+    p_stk     = (OS_STK *)((OS_STK)p_stk & ~(CPU_CFG_STK_ALIGN_BYTES - 1ul)); /* Align stack pointer.                   */
+
+    task_addr = (OS_STK)task;
+
+    for (i = 29; i > 0; i--) {
+        *--p_stk = (INT64U)i;                                  /* Reg X1-X29                                           */
+    }
+
+    *--p_stk  = (OS_STK)p_arg;                                 /* Reg X0 : argument                                    */
+
+    *--p_stk  = (OS_STK)task_addr;                             /* Entry Point                                          */
+    *--p_stk  = (OS_STK)OS_TaskReturn;                         /* Reg X30 (LR)                                         */
+
+    *--p_stk  = (OS_STK)OS_CPU_SPSRGet();
+    *--p_stk  = (OS_STK)OS_CPU_SPSRGet();
+
+    if (OS_CPU_SIMDGet() == 1u) {
+        for (i = 64; i > 0; i--) {
+            *--p_stk = (INT64U)i;                               /* Reg Q1-Q31                                           */
+        }
+
+        *--p_stk = 0x0000000000000000;                          /* FPCR                                                 */
+        *--p_stk = 0x0000000000000000;                          /* FPSR                                                 */
+    }
+
+    return (p_stk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other
+*              operations during a context switch.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that
+*                 will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the
+*                 task being switched out (i.e. the preempted task).
+*              3) If debug variables are enabled, the current process id is saved into the context ID register
+*                 found in the system control coprocessor. The Embedded Trace Macrocell (ETM) and the debug logic
+*                 use this register. The ETM can broadcast its value to indicate the process that is running currently.
+*
+*                     (a) The proccess id is formed by concatenating the current task priority with the lower 24 bits
+*                         from the current task TCB.
+*
+*                            31              24                     0
+*                             +---------------+---------------------+
+*                             | OSPrioHighRdy | OSTCBHighRdy[23..0] |
+*                             +---------------+---------------------+
+*********************************************************************************************************
+*/
+
+#if (OS_CPU_HOOKS_EN > 0u) && (OS_TASK_SW_HOOK_EN > 0u)
+void  OSTaskSwHook (void)
+
+{
+#if OS_CFG_DBG_EN > 0u
+    INT32U  ctx_id;
+#endif
+
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskSwHook();
+#endif
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           OS_TCBInit() HOOK
+*
+* Description: This function is called by OS_TCBInit() after setting up most of the TCB.
+*
+* Arguments  : ptcb    is a pointer to the TCB of the task being created.
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTCBInitHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TCBInitHook(ptcb);
+#else
+    (void)ptcb;                                            /* Prevent compiler warning                 */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if (OS_CPU_HOOKS_EN > 0u) && (OS_TIME_TICK_HOOK_EN > 0u)
+void  OSTimeTickHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TimeTickHook();
+#endif
+
+#if OS_TMR_EN > 0u
+    OSTmrCtr++;
+    if (OSTmrCtr >= (OS_TICKS_PER_SEC / OS_TMR_CFG_TICKS_PER_SEC)) {
+        OSTmrCtr = 0u;
+        OSTmrSignal();
+    }
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                             INTERRUPT DISABLE TIME MEASUREMENT, START
+*********************************************************************************************************
+*/
+
+#if OS_CPU_INT_DIS_MEAS_EN > 0u
+void  OS_CPU_IntDisMeasInit (void)
+{
+    OS_CPU_IntDisMeasNestingCtr = 0u;
+    OS_CPU_IntDisMeasCntsEnter  = 0u;
+    OS_CPU_IntDisMeasCntsExit   = 0u;
+    OS_CPU_IntDisMeasCntsMax    = 0u;
+    OS_CPU_IntDisMeasCntsDelta  = 0u;
+    OS_CPU_IntDisMeasCntsOvrhd  = 0u;
+    OS_CPU_IntDisMeasStart();                              /* Measure the overhead of the functions    */
+    OS_CPU_IntDisMeasStop();
+    OS_CPU_IntDisMeasCntsOvrhd  = OS_CPU_IntDisMeasCntsDelta;
+}
+
+
+void  OS_CPU_IntDisMeasStart (void)
+{
+    OS_CPU_IntDisMeasNestingCtr++;
+    if (OS_CPU_IntDisMeasNestingCtr == 1u) {               /* Only measure at the first nested level   */
+        OS_CPU_IntDisMeasCntsEnter = OS_CPU_IntDisMeasTmrRd();
+    }
+}
+
+
+void  OS_CPU_IntDisMeasStop (void)
+{
+    OS_CPU_IntDisMeasNestingCtr--;                                      /* Decrement nesting ctr       */
+    if (OS_CPU_IntDisMeasNestingCtr == 0u) {
+        OS_CPU_IntDisMeasCntsExit  = OS_CPU_IntDisMeasTmrRd();
+        OS_CPU_IntDisMeasCntsDelta = OS_CPU_IntDisMeasCntsExit - OS_CPU_IntDisMeasCntsEnter;
+        if (OS_CPU_IntDisMeasCntsDelta > OS_CPU_IntDisMeasCntsOvrhd) {  /* Ensure overhead < delta     */
+            OS_CPU_IntDisMeasCntsDelta -= OS_CPU_IntDisMeasCntsOvrhd;
+        } else {
+            OS_CPU_IntDisMeasCntsDelta  = OS_CPU_IntDisMeasCntsOvrhd;
+        }
+        if (OS_CPU_IntDisMeasCntsDelta > OS_CPU_IntDisMeasCntsMax) {    /* Track MAXIMUM               */
+            OS_CPU_IntDisMeasCntsMax = OS_CPU_IntDisMeasCntsDelta;
+        }
+    }
+}
+#endif
+
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-M7/Generic/GNU/os_cpu.h b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-M7/Generic/GNU/os_cpu.h
new file mode 100644
index 0000000..2c5145b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-M7/Generic/GNU/os_cpu.h
@@ -0,0 +1,230 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*
+*                         (c) Copyright 2009-2016; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                              ARMv7-M Port
+*
+* File      : OS_CPU.H
+* Version   : V2.92.12.00
+* By        : JJL
+*             JBL
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+*
+* For       : ARMv7M Cortex-M
+* Mode      : Thumb-2 ISA
+* Toolchain : GNU C Compiler
+*
+* Note(s)   : (1) This port supports the ARM Cortex-M3, Cortex-M4 and Cortex-M7 architectures.
+*             (2) It has been tested with the following Hardware Floating Point Unit.
+*                 (a) Single-precision: FPv4-SP-D16-M and FPv5-SP-D16-M
+*                 (b) Double-precision: FPv5-D16-M
+*********************************************************************************************************
+*/
+
+#ifndef  OS_CPU_H
+#define  OS_CPU_H
+
+#ifdef   OS_CPU_GLOBALS
+#define  OS_CPU_EXT
+#else
+#define  OS_CPU_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                     EXTERNAL C LANGUAGE LINKAGE
+*
+* Note(s) : (1) C++ compilers MUST 'extern'ally declare ALL C function prototypes & variable/object
+*               declarations for correct C language linkage.
+*********************************************************************************************************
+*/
+
+#ifdef __cplusplus
+extern  "C" {                                    /* See Note #1.                                       */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#ifndef  OS_CPU_EXCEPT_STK_SIZE
+#define  OS_CPU_EXCEPT_STK_SIZE      256u        /* Default exception stack size is 256 OS_STK entries */
+#endif
+
+#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
+#define  OS_CPU_ARM_FP_EN              1u
+#else
+#define  OS_CPU_ARM_FP_EN              0u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                              OS TICK INTERRUPT PRIORITY CONFIGURATION
+*
+* Note(s) : (1) For systems that don't need any high, real-time priority interrupts; the tick interrupt
+*               should be configured as the highest priority interrupt but won't adversely affect system
+*               operations.
+*
+*           (2) For systems that need one or more high, real-time interrupts; these should be configured
+*               higher than the tick interrupt which MAY delay execution of the tick interrupt.
+*
+*               (a) If the higher priority interrupts do NOT continually consume CPU cycles but only
+*                   occasionally delay tick interrupts, then the real-time interrupts can successfully
+*                   handle their intermittent/periodic events with the system not losing tick interrupts
+*                   but only increasing the jitter.
+*
+*               (b) If the higher priority interrupts consume enough CPU cycles to continually delay the
+*                   tick interrupt, then the CPU/system is most likely over-burdened & can't be expected
+*                   to handle all its interrupts/tasks. The system time reference gets compromised as a
+*                   result of losing tick interrupts.
+*********************************************************************************************************
+*/
+
+#ifndef  OS_CPU_CFG_SYSTICK_PRIO
+#define  OS_CPU_CFG_SYSTICK_PRIO           0u
+#endif
+
+/*
+*********************************************************************************************************
+*                                              DATA TYPES
+*                                         (Compiler Specific)
+*********************************************************************************************************
+*/
+
+typedef unsigned char  BOOLEAN;
+typedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */
+typedef signed   char  INT8S;                    /* Signed    8 bit quantity                           */
+typedef unsigned short INT16U;                   /* Unsigned 16 bit quantity                           */
+typedef signed   short INT16S;                   /* Signed   16 bit quantity                           */
+typedef unsigned int   INT32U;                   /* Unsigned 32 bit quantity                           */
+typedef signed   int   INT32S;                   /* Signed   32 bit quantity                           */
+typedef float          FP32;                     /* Single precision floating point                    */
+typedef double         FP64;                     /* Double precision floating point                    */
+
+typedef unsigned int   OS_STK;                   /* Each stack entry is 32-bit wide                    */
+typedef unsigned int   OS_CPU_SR;                /* Define size of CPU status register (PSR = 32 bits) */
+
+
+/*
+*********************************************************************************************************
+*                                              Cortex-M
+*                                      Critical Section Management
+*
+* Method #1:  Disable/Enable interrupts using simple instructions.  After critical section, interrupts
+*             will be enabled even if they were disabled before entering the critical section.
+*             NOT IMPLEMENTED
+*
+* Method #2:  Disable/Enable interrupts by preserving the state of interrupts.  In other words, if
+*             interrupts were disabled before entering the critical section, they will be disabled when
+*             leaving the critical section.
+*             NOT IMPLEMENTED
+*
+* Method #3:  Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+*             would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+*             disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+*             disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+*             into the CPU's status register.
+*********************************************************************************************************
+*/
+
+#define  OS_CRITICAL_METHOD   3u
+
+#if OS_CRITICAL_METHOD == 3u
+#define  OS_ENTER_CRITICAL()  do { cpu_sr = OS_CPU_SR_Save();} while (0)
+#define  OS_EXIT_CRITICAL()   do { OS_CPU_SR_Restore(cpu_sr);} while (0)
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        Cortex-M Miscellaneous
+*********************************************************************************************************
+*/
+
+#define  OS_STK_GROWTH        1u                  /* Stack grows from HIGH to LOW memory on ARM        */
+
+#define  OS_TASK_SW()         OSCtxSw()
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+OS_CPU_EXT  OS_STK   OS_CPU_ExceptStk[OS_CPU_EXCEPT_STK_SIZE];
+OS_CPU_EXT  OS_STK  *OS_CPU_ExceptStkBase;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if OS_CRITICAL_METHOD == 3u                      /* See OS_CPU_A.ASM                                  */
+OS_CPU_SR  OS_CPU_SR_Save         (void);
+void       OS_CPU_SR_Restore      (OS_CPU_SR  cpu_sr);
+#endif
+
+void       OSCtxSw                (void);
+void       OSIntCtxSw             (void);
+void       OSStartHighRdy         (void);
+
+                                                  /* See OS_CPU_C.C                                    */
+void       OS_CPU_SysTickInit     (INT32U  cnts);
+void       OS_CPU_SysTickInitFreq (INT32U  cpu_freq);
+
+void       OS_CPU_SysTickHandler  (void);
+void       OS_CPU_PendSVHandler   (void);
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+void       OS_CPU_FP_Reg_Push     (OS_STK    *stkPtr);
+void       OS_CPU_FP_Reg_Pop      (OS_STK    *stkPtr);
+#endif
+
+/*
+*********************************************************************************************************
+*                                   EXTERNAL C LANGUAGE LINKAGE END
+*********************************************************************************************************
+*/
+
+#ifdef __cplusplus
+}                                                 /* End of 'extern'al C lang linkage.                 */
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-M7/Generic/GNU/os_cpu_a.S b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-M7/Generic/GNU/os_cpu_a.S
new file mode 100644
index 0000000..5c91ce6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-M7/Generic/GNU/os_cpu_a.S
@@ -0,0 +1,343 @@
+@
+@********************************************************************************************************
+@                                                uC/OS-II
+@                                          The Real-Time Kernel
+@
+@
+@                         (c) Copyright 2009-2016; Micrium, Inc.; Weston, FL
+@                    All rights reserved.  Protected by international copyright laws.
+@
+@                                              ARMv7-M Port
+@
+@ File      : OS_CPU_A.ASM
+@ Version   : V2.92.12.00
+@ By        : JJL
+@             BAN
+@             JBL
+@
+@ For       : ARMv7M Cortex-M
+@ Mode      : Thumb-2 ISA
+@ Toolchain : GNU C Compiler
+@
+@ Note(s)   : (1) This port supports the ARM Cortex-M3, Cortex-M4 and Cortex-M7 architectures.
+@             (2) It has been tested with the following Hardware Floating Point Unit.
+@                 (a) Single-precision: FPv4-SP-D16-M and FPv5-SP-D16-M
+@                 (b) Double-precision: FPv5-D16-M
+@********************************************************************************************************
+@
+
+@********************************************************************************************************
+@                                          PUBLIC FUNCTIONS
+@********************************************************************************************************
+
+    .extern  OSRunning                                          @ External references
+    .extern  OSPrioCur
+    .extern  OSPrioHighRdy
+    .extern  OSTCBCur
+    .extern  OSTCBHighRdy
+    .extern  OSIntExit
+    .extern  OSTaskSwHook
+    .extern  OS_CPU_ExceptStkBase
+
+
+    .global  OSStartHighRdy                                     @ Functions declared in this file
+    .global  OS_CPU_SR_Save
+    .global  OS_CPU_SR_Restore
+    .global  OSCtxSw
+    .global  OSIntCtxSw
+    .global  OS_CPU_PendSVHandler
+
+#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
+    .global  OS_CPU_FP_Reg_Push
+    .global  OS_CPU_FP_Reg_Pop
+#endif
+
+
+@********************************************************************************************************
+@                                               EQUATES
+@********************************************************************************************************
+
+.equ NVIC_INT_CTRL,     0xE000ED04                              @ Interrupt control state register.
+.equ NVIC_SYSPRI14,     0xE000ED22                              @ System priority register (priority 14).
+.equ NVIC_PENDSV_PRI,   0xFF                                    @ PendSV priority value (lowest).
+.equ NVIC_PENDSVSET,    0x10000000                              @ Value to trigger PendSV exception.
+
+
+@********************************************************************************************************
+@                                     CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+   .text
+   .align 2
+   .thumb
+   .syntax unified
+
+
+@********************************************************************************************************
+@                                   FLOATING POINT REGISTERS PUSH
+@                             void  OS_CPU_FP_Reg_Push (OS_STK  *stkPtr)
+@
+@ Note(s) : 1) This function saves S16-S31 registers of the Floating Point Unit.
+@
+@           2) Pseudo-code is:
+@              a) Push remaining FPU regs S16-S31 on process stack;
+@              b) Update OSTCBCur->OSTCBStkPtr;
+@********************************************************************************************************
+
+#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
+
+.thumb_func
+OS_CPU_FP_Reg_Push:
+    MRS     R1, PSP                                             @ PSP is process stack pointer
+    CBZ     R1, OS_CPU_FP_nosave                                @ Skip FP register save the first time
+
+    VSTMDB  R0!, {S16-S31}
+    LDR     R1, =OSTCBCur
+    LDR     R2, [R1]
+    STR     R0, [R2]
+OS_CPU_FP_nosave:
+    BX      LR
+#endif
+
+
+@********************************************************************************************************
+@                                   FLOATING POINT REGISTERS POP
+@                             void  OS_CPU_FP_Reg_Pop (OS_STK  *stkPtr)
+@
+@ Note(s) : 1) This function restores S16-S31 of the Floating Point Unit.
+@
+@           2) Pseudo-code is:
+@              a) Restore regs S16-S31 of new process stack;
+@              b) Update OSTCBHighRdy->OSTCBStkPtr pointer of new proces stack;
+@********************************************************************************************************
+
+#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
+
+.thumb_func
+OS_CPU_FP_Reg_Pop:
+    VLDMIA  R0!, {S16-S31}
+    LDR     R1, =OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R0, [R2]
+    BX      LR
+#endif
+
+
+@********************************************************************************************************
+@                                   CRITICAL SECTION METHOD 3 FUNCTIONS
+@
+@ Description: Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+@              would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+@              disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+@              disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+@              into the CPU's status register.
+@
+@ Prototypes :     OS_CPU_SR  OS_CPU_SR_Save(void);
+@                  void       OS_CPU_SR_Restore(OS_CPU_SR cpu_sr);
+@
+@
+@ Note(s)    : 1) These functions are used in general like this:
+@
+@                 void Task (void *p_arg)
+@                 {
+@                 #if OS_CRITICAL_METHOD == 3          /* Allocate storage for CPU status register */
+@                     OS_CPU_SR  cpu_sr;
+@                 #endif
+@
+@                          :
+@                          :
+@                     OS_ENTER_CRITICAL();             /* cpu_sr = OS_CPU_SaveSR();                */
+@                          :
+@                          :
+@                     OS_EXIT_CRITICAL();              /* OS_CPU_RestoreSR(cpu_sr);                */
+@                          :
+@                          :
+@                 }
+@********************************************************************************************************
+
+.thumb_func
+OS_CPU_SR_Save:
+    MRS     R0, PRIMASK                                         @ Set prio int mask to mask all (except faults)
+    CPSID   I
+    BX      LR
+
+.thumb_func
+OS_CPU_SR_Restore:
+    MSR     PRIMASK, R0
+    BX      LR
+
+
+@********************************************************************************************************
+@                                         START MULTITASKING
+@                                      void OSStartHighRdy(void)
+@
+@ Note(s) : 1) This function triggers a PendSV exception (essentially, causes a context switch) to cause
+@              the first task to start.
+@
+@           2) OSStartHighRdy() MUST:
+@              a) Setup PendSV exception priority to lowest;
+@              b) Set initial PSP to 0, to tell context switcher this is first run;
+@              c) Set the main stack to OS_CPU_ExceptStkBase
+@              d) Set OSRunning to TRUE;
+@              e) Get current high priority, OSPrioCur = OSPrioHighRdy;
+@              f) Get current ready thread TCB, OSTCBCur = OSTCBHighRdy;
+@              g) Get new process SP from TCB, SP = OSTCBHighRdy->OSTCBStkPtr;
+@              h) Restore R0-R11 and R14 from new process stack;
+@              i) Enable interrupts (tasks will run with interrupts enabled).
+@********************************************************************************************************
+
+.thumb_func
+OSStartHighRdy:
+    CPSID   I                                                   @ Prevent interruption during context switch
+    MOVW    R0, #:lower16:NVIC_SYSPRI14                         @ Set the PendSV exception priority
+    MOVT    R0, #:upper16:NVIC_SYSPRI14
+
+    MOVW    R1, #:lower16:NVIC_PENDSV_PRI
+    MOVT    R1, #:upper16:NVIC_PENDSV_PRI
+    STRB    R1, [R0]
+
+    MOVS    R0, #0                                              @ Set the PSP to 0 for initial context switch call
+    MSR     PSP, R0
+
+    MOVW    R0, #:lower16:OS_CPU_ExceptStkBase                  @ Initialize the MSP to the OS_CPU_ExceptStkBase
+    MOVT    R0, #:upper16:OS_CPU_ExceptStkBase
+    LDR     R1, [R0]
+    MSR     MSP, R1
+
+    BL      OSTaskSwHook                                        @ Call OSTaskSwHook() for FPU Push & Pop
+
+    LDR     R0, =OSRunning                                      @ OSRunning = TRUE
+    MOVS    R1, #1
+    STRB    R1, [R0]
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur   = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur  = OSTCBHighRdy;
+    MOVT    R0, #:upper16:OSTCBCur
+    MOVW    R1, #:lower16:OSTCBHighRdy
+    MOVT    R1, #:upper16:OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     R0, [R2]                                            @ R0 is new process SP; SP = OSTCBHighRdy->OSTCBStkPtr;
+    MSR     PSP, R0                                             @ Load PSP with new process SP
+
+    MRS     R0, CONTROL
+    ORR     R0, R0, #2
+    MSR     CONTROL, R0
+    ISB                                                         @ Sync instruction stream
+
+    LDMFD    SP!, {R4-R11, LR}                                  @ Restore r4-11, lr from new process stack
+    LDMFD    SP!, {R0-R3}                                       @ Restore r0, r3
+    LDMFD    SP!, {R12, LR}                                     @ Load R12 and LR
+    LDMFD    SP!, {R1, R2}                                      @ Load PC and discard xPSR
+    CPSIE    I
+    BX       R1
+
+
+@********************************************************************************************************
+@                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+@
+@ Note(s) : 1) OSCtxSw() is called when OS wants to perform a task context switch.  This function
+@              triggers the PendSV exception which is where the real work is done.
+@********************************************************************************************************
+
+.thumb_func
+OSCtxSw:
+    LDR     R0, =NVIC_INT_CTRL                                  @ Trigger the PendSV exception (causes context switch)
+    LDR     R1, =NVIC_PENDSVSET
+    STR     R1, [R0]
+    BX      LR
+
+
+@********************************************************************************************************
+@                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+@
+@ Note(s) : 1) OSIntCtxSw() is called by OSIntExit() when it determines a context switch is needed as
+@              the result of an interrupt.  This function simply triggers a PendSV exception which will
+@              be handled when there are no more interrupts active and interrupts are enabled.
+@********************************************************************************************************
+
+.thumb_func
+OSIntCtxSw:
+    LDR     R0, =NVIC_INT_CTRL                                  @ Trigger the PendSV exception (causes context switch)
+    LDR     R1, =NVIC_PENDSVSET
+    STR     R1, [R0]
+    BX      LR
+
+
+@********************************************************************************************************
+@                                       HANDLE PendSV EXCEPTION
+@                                   void OS_CPU_PendSVHandler(void)
+@
+@ Note(s) : 1) PendSV is used to cause a context switch.  This is a recommended method for performing
+@              context switches with Cortex-M.  This is because the Cortex-M auto-saves half of the
+@              processor context on any exception, and restores same on return from exception.  So only
+@              saving of R4-R11 & R14 is required and fixing up the stack pointers. Using the PendSV exception
+@              this way means that context saving and restoring is identical whether it is initiated from
+@              a thread or occurs due to an interrupt or exception.
+@
+@           2) Pseudo-code is:
+@              a) Get the process SP
+@              b) Save remaining regs r4-r11 & r14 on process stack;
+@              c) Save the process SP in its TCB, OSTCBCur->OSTCBStkPtr = SP;
+@              d) Call OSTaskSwHook();
+@              e) Get current high priority, OSPrioCur = OSPrioHighRdy;
+@              f) Get current ready thread TCB, OSTCBCur = OSTCBHighRdy;
+@              g) Get new process SP from TCB, SP = OSTCBHighRdy->OSTCBStkPtr;
+@              h) Restore R4-R11 and R14 from new process stack;
+@              i) Perform exception return which will restore remaining context.
+@
+@           3) On entry into PendSV handler:
+@              a) The following have been saved on the process stack (by processor):
+@                 xPSR, PC, LR, R12, R0-R3
+@              b) Processor mode is switched to Handler mode (from Thread mode)
+@              c) Stack is Main stack (switched from Process stack)
+@              d) OSTCBCur      points to the OS_TCB of the task to suspend
+@                 OSTCBHighRdy  points to the OS_TCB of the task to resume
+@
+@           4) Since PendSV is set to lowest priority in the system (by OSStartHighRdy() above), we
+@              know that it will only be run when no other exception or interrupt is active, and
+@              therefore safe to assume that context being switched out was using the process stack (PSP).
+@********************************************************************************************************
+
+.thumb_func
+OS_CPU_PendSVHandler:
+    CPSID   I                                                   @ Prevent interruption during context switch
+    MRS     R0, PSP                                             @ PSP is process stack pointer
+    STMFD   R0!, {R4-R11, R14}                                  @ Save remaining regs r4-11, R14 on process stack
+
+    MOVW    R5, #:lower16:OSTCBCur                              @ OSTCBCur->OSTCBStkPtr = SP;
+    MOVT    R5, #:upper16:OSTCBCur
+    LDR     R1, [R5]
+    STR     R0, [R1]                                            @ R0 is SP of process being switched out
+
+                                                                @ At this point, entire context of process has been saved
+    MOV     R4, LR                                              @ Save LR exc_return value
+    BL      OSTaskSwHook                                        @ Call OSTaskSwHook() for FPU Push & Pop
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur   = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R1, #:lower16:OSTCBHighRdy                          @ OSTCBCur  = OSTCBHighRdy;
+    MOVT    R1, #:upper16:OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R5]
+
+    ORR     LR,  R4, #0x04                                      @ Ensure exception return uses process stack
+    LDR     R0,  [R2]                                           @ R0 is new process SP; SP = OSTCBHighRdy->OSTCBStkPtr;
+    LDMFD   R0!, {R4-R11, R14}                                  @ Restore r4-11, R14 from new process stack
+    MSR     PSP, R0                                             @ Load PSP with new process SP
+    CPSIE   I
+    BX      LR                                                  @ Exception return will restore remaining context
+
+.end
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-M7/Generic/GNU/os_cpu_c.c b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-M7/Generic/GNU/os_cpu_c.c
new file mode 100644
index 0000000..5a09e7c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/ARM-Cortex-M7/Generic/GNU/os_cpu_c.c
@@ -0,0 +1,726 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2016; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                              ARMv7-M Port
+*
+* File      : OS_CPU_C.C
+* Version   : V2.92.12.00
+* By        : JJL
+*             BAN
+*             JBL
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+*
+* For       : ARMv7M Cortex-M
+* Mode      : Thumb-2 ISA
+* Toolchain : GNU C Compiler
+*
+* Note(s)   : (1) This port supports the ARM Cortex-M3, Cortex-M4 and Cortex-M7 architectures.
+*             (2) It has been tested with the following Hardware Floating Point Unit.
+*                 (a) Single-precision: FPv4-SP-D16-M and FPv5-SP-D16-M
+*                 (b) Double-precision: FPv5-D16-M
+*********************************************************************************************************
+*/
+
+#define   OS_CPU_GLOBALS
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  INT16U  OSTmrCtr;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          SYS TICK DEFINES
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_CM_NVIC_ST_CTRL    (*((volatile INT32U *)0xE000E010uL)) /* SysTick Ctrl & Status Reg.                  */
+#define  OS_CPU_CM_NVIC_ST_RELOAD  (*((volatile INT32U *)0xE000E014uL)) /* SysTick Reload  Value Reg.                  */
+#define  OS_CPU_CM_NVIC_ST_CURRENT (*((volatile INT32U *)0xE000E018uL)) /* SysTick Current Value Reg.                  */
+#define  OS_CPU_CM_NVIC_ST_CAL     (*((volatile INT32U *)0xE000E01CuL)) /* SysTick Cal     Value Reg.                  */
+#define  OS_CPU_CM_NVIC_SHPRI1     (*((volatile INT32U *)0xE000ED18uL)) /* System Handlers  4 to  7 Prio.              */
+#define  OS_CPU_CM_NVIC_SHPRI2     (*((volatile INT32U *)0xE000ED1CuL)) /* System Handlers  8 to 11 Prio.              */
+#define  OS_CPU_CM_NVIC_SHPRI3     (*((volatile INT32U *)0xE000ED20uL)) /* System Handlers 12 to 15 Prio.              */
+
+
+#define  OS_CPU_CM_NVIC_ST_CTRL_COUNT                    0x00010000uL   /* Count flag.                                 */
+#define  OS_CPU_CM_NVIC_ST_CTRL_CLK_SRC                  0x00000004uL   /* Clock Source.                               */
+#define  OS_CPU_CM_NVIC_ST_CTRL_INTEN                    0x00000002uL   /* Interrupt enable.                           */
+#define  OS_CPU_CM_NVIC_ST_CTRL_ENABLE                   0x00000001uL   /* Counter mode.                               */
+#define  OS_CPU_CM_NVIC_PRIO_MIN                               0xFFu    /* Min handler prio.                           */
+
+
+/*
+*********************************************************************************************************
+*                                         FLOATING POINT DEFINES
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_CM_FP_FPCCR      (*((volatile INT32U *)0xE000EF34uL))   /* Floating-Point Context Control Reg.         */
+
+                                                                        /* Enabled FP lazy stacking and enable ..      */
+                                                                        /* ..automatic state saving.                   */
+#define  OS_CPU_CM_FPCCR_LAZY_STK                      0xC0000000uL
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                            (BEGINNING)
+*
+* Description: This function is called by OSInit() at the beginning of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*              2) When using hardware floating point please do the following during the reset handler:
+*                 a) Set full access for CP10 & CP11 bits in CPACR register.
+*                 b) Set bits ASPEN and LSPEN in FPCCR register.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSInitHookBegin (void)
+{
+    INT32U   size;
+    OS_STK  *pstk;
+#if (OS_CPU_ARM_FP_EN > 0u)
+    INT32U   reg_val;
+#endif
+                                                                /* Clear exception stack for stack checking.            */
+    pstk = &OS_CPU_ExceptStk[0];
+    size = OS_CPU_EXCEPT_STK_SIZE;
+    while (size > 0u) {
+        size--;
+       *pstk++ = (OS_STK)0;
+    }
+
+                                                                /* Align the ISR stack to 8-bytes                       */
+    OS_CPU_ExceptStkBase = (OS_STK *)&OS_CPU_ExceptStk[OS_CPU_EXCEPT_STK_SIZE];
+    OS_CPU_ExceptStkBase = (OS_STK *)((OS_STK)(OS_CPU_ExceptStkBase) & 0xFFFFFFF8);
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+    reg_val = OS_CPU_CM_FP_FPCCR;                               /* Check the floating point mode.                       */
+    if ((reg_val & OS_CPU_CM_FPCCR_LAZY_STK) != OS_CPU_CM_FPCCR_LAZY_STK) {
+        while (1u) {                                            /* See Note (2).                                        */
+            ;
+        }
+    }
+#endif
+
+#if OS_TMR_EN > 0u
+    OSTmrCtr = 0u;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                               (END)
+*
+* Description: This function is called by OSInit() at the end of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSInitHookEnd (void)
+{
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being created.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskCreateHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskCreateHook(ptcb);
+#else
+    (void)ptcb;                                                 /* Prevent compiler warning                             */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being deleted.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskDelHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskDelHook(ptcb);
+#else
+    (void)ptcb;                                                 /* Prevent compiler warning                             */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do
+*              such things as STOP the CPU to conserve power.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are enabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskIdleHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskIdleHook();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            TASK RETURN HOOK
+*
+* Description: This function is called if a task accidentally returns.  In other words, a task should
+*              either be an infinite loop or delete itself when done.
+*
+* Arguments  : ptcb      is a pointer to the task control block of the task that is returning.
+*
+* Note(s)    : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskReturnHook (OS_TCB  *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskReturnHook(ptcb);
+#else
+    (void)ptcb;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-II's statistics task.  This allows your
+*              application to add functionality to the statistics task.
+*
+* Arguments  : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskStatHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskStatHook();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        INITIALIZE A TASK'S STACK
+*
+* Description: This function is called by either OSTaskCreate() or OSTaskCreateExt() to initialize the
+*              stack frame of the task being created.  This function is highly processor specific.
+*
+* Arguments  : task          is a pointer to the task code
+*
+*              p_arg         is a pointer to a user supplied data area that will be passed to the task
+*                            when the task first executes.
+*
+*              ptos          is a pointer to the top of stack.  It is assumed that 'ptos' points to
+*                            a 'free' entry on the task stack.  If OS_STK_GROWTH is set to 1 then
+*                            'ptos' will contain the HIGHEST valid address of the stack.  Similarly, if
+*                            OS_STK_GROWTH is set to 0, the 'ptos' will contains the LOWEST valid address
+*                            of the stack.
+*
+*              opt           specifies options that can be used to alter the behavior of OSTaskStkInit().
+*                            (see uCOS_II.H for OS_TASK_OPT_xxx).
+*
+* Returns    : Always returns the location of the new top-of-stack once the processor registers have
+*              been placed on the stack in the proper order.
+*
+* Note(s)    : (1) Interrupts are enabled when task starts executing.
+*
+*              (2) All tasks run in Thread mode, using process stack.
+*
+*              (3) There are two different stack frames depending on whether the Floating-Point(FP)
+*                  co-processor is enabled or not.
+*
+*                  (a) The stack frame shown in the diagram is used when the Co-processor Access Control
+*                      Register(CPACR) is disabling the Floating Point Unit. In this case, the FP
+*                      registers(S0- S31) & FP Status Control(FPSCR) register are not saved in the stack frame.
+*
+*                  (b) The stack frame shown in the diagram is used when the Floating Point Unit is enabled,
+*                      that is, CP10 and CP11 field in CPACR are ones and FPCCR sets bits ASPEN and LSPEN to 1.
+*
+*                      (1) When enabling the FPU through CPACR, make sure to set bits ASPEN and LSPEN in the
+*                          Floating-Point Context Control Register (FPCCR).
+*
+*                                          +-------------+
+*                                          |             |
+*                                          +-------------+
+*                                          |             |
+*                                          +-------------+
+*                                          |    FPSCR    |
+*                                          +-------------+
+*                                          |     S15     |
+*                                          +-------------+
+*                                          |     S14     |
+*                                          +-------------+
+*                                          |     S13     |
+*                                          +-------------+
+*                                                .
+*                                                .
+*                                                .
+*                                          +-------------+
+*                                          |     S2      |
+*                                          +-------------+
+*                                          |     S1      |
+*                    +-------------+       +-------------+
+*                    |             |       |     S0      |
+*                    +-------------+       +-------------+
+*                    |    xPSR     |       |    xPSR     |
+*                    +-------------+       +-------------+
+*                    | Return Addr |       | Return Addr |
+*                    +-------------+       +-------------+
+*                    |  LR(R14)    |       |   LR(R14)   |
+*                    +-------------+       +-------------+
+*                    |    R12      |       |     R12     |
+*                    +-------------+       +-------------+
+*                    |    R3       |       |     R3      |
+*                    +-------------+       +-------------+
+*                    |    R2       |       |     R0      |
+*                    +-------------+       +-------------+
+*                    |    R1       |       |     R1      |
+*                    +-------------+       +-------------+
+*                    |    R0       |       |     R0      |
+*                    +-------------+       +-------------+
+*                    | EXEC_RETURN |       | EXEC_RETURN |
+*                    +-------------+       +-------------+
+*                    |    R11      |       |     R11     |
+*                    +-------------+       +-------------+
+*                    |    R10      |       |     R10     |
+*                    +-------------+       +-------------+
+*                    |    R9       |       |     R9      |
+*                    +-------------+       +-------------+
+*                    |    R8       |       |     R8      |
+*                    +-------------+       +-------------+
+*                    |    R7       |       |     R7      |
+*                    +-------------+       +-------------+
+*                    |    R6       |       |     R6      |
+*                    +-------------+       +-------------+
+*                    |    R5       |       |     R5      |
+*                    +-------------+       +-------------+
+*                    |    R4       |       |     R4      |
+*                    +-------------+       +-------------+
+*                          (a)             |     S31     |
+*                                          +-------------+
+*                                          |     S30     |
+*                                          +-------------+
+*                                          |     S29     |
+                                           +-------------+
+*                                                .
+*                                                .
+*                                                .
+*                                          +-------------+
+*                                          |     S17     |
+                                           +-------------+
+*                                          |     S16     |
+*                                          +-------------+
+*                                               (b)
+*
+*             (4) The SP must be 8-byte aligned in conforming to the Procedure Call Standard for the ARM architecture
+*
+*                    (a) Section 2.1 of the  ABI for the ARM Architecture Advisory Note. SP must be 8-byte aligned
+*                        on entry to AAPCS-Conforming functions states :
+*
+*                        The Procedure Call Standard for the ARM Architecture [AAPCS] requires primitive
+*                        data types to be naturally aligned according to their sizes (for size = 1, 2, 4, 8 bytes).
+*                        Doing otherwise creates more problems than it solves.
+*
+*                        In return for preserving the natural alignment of data, conforming code is permitted
+*                        to rely on that alignment. To support aligning data allocated on the stack, the stack
+*                        pointer (SP) is required to be 8-byte aligned on entry to a conforming function. In
+*                        practice this requirement is met if:
+*
+*                           (1) At each call site, the current size of the calling function’s stack frame is a multiple of 8 bytes.
+*                               This places an obligation on compilers and assembly language programmers.
+*
+*                           (2) SP is a multiple of 8 when control first enters a program.
+*                               This places an obligation on authors of low level OS, RTOS, and runtime library
+*                               code to align SP at all points at which control first enters
+*                               a body of (AAPCS-conforming) code.
+*
+*                       In turn, this requires the value of SP to be aligned to 0 modulo 8:
+*
+*                           (3) By exception handlers, before calling AAPCS-conforming code.
+*
+*                           (4) By OS/RTOS/run-time system code, before giving control to an application.
+*
+*                 (b) Section 2.3.1 corrective steps from the the SP must be 8-byte aligned on entry
+*                     to AAPCS-conforming functions advisory note also states.
+*
+*                     " This requirement extends to operating systems and run-time code for all architecture versions
+*                       prior to ARMV7 and to the A, R and M architecture profiles thereafter. Special considerations
+*                       associated with ARMV7M are discussed in section 2.3.3"
+*
+*                     (1) Even if the SP 8-byte aligment is not a requirement for the ARMv7M profile, the stack is aligned
+*                         to 8-byte boundaries to support legacy execution enviroments.
+*
+*                 (c) Section 5.2.1.2 from the Procedure Call Standard for the ARM
+*                     architecture states :  "The stack must also conform to the following
+*                     constraint at a public interface:
+*
+*                     (1) SP mod 8 = 0. The stack must be double-word aligned"
+*
+*                 (d) From the ARM Technical Support Knowledge Base. 8 Byte stack aligment.
+*
+*                     "8 byte stack alignment is a requirement of the ARM Architecture Procedure
+*                      Call Standard [AAPCS]. This specifies that functions must maintain an 8 byte
+*                      aligned stack address (e.g. 0x00, 0x08, 0x10, 0x18, 0x20) on all external
+*                      interfaces. In practice this requirement is met if:
+*
+*                      (1) At each external interface, the current stack pointer
+*                          is a multiple of 8 bytes.
+*
+*                      (2) Your OS maintains 8 byte stack alignment on its external interfaces
+*                          e.g. on task switches"
+*
+*              (5) Exception Return Behavior(EXEC_RETURN)
+*                  0xFFFFFFFD      Return to Thread mode, exception return uses non-floating point state
+*                                  from the PSP and execution uses PSP after return.
+*
+*                  0xFFFFFFED      Return to Thread mode, exception return uses floating point state
+*                                  from the PSP and execution uses PSP after return.
+**********************************************************************************************************
+*/
+
+OS_STK  *OSTaskStkInit (void    (*task)(void *p_arg),
+                        void     *p_arg,
+                        OS_STK   *ptos,
+                        INT16U    opt)
+{
+    OS_STK  *p_stk;
+
+
+    (void)opt;                                                  /* 'opt' is not used, prevent warning                   */
+    p_stk      = ptos + 1u;                                     /* Load stack pointer                                   */
+                                                                /* Align the stack to 8-bytes.                          */
+    p_stk      = (OS_STK *)((OS_STK)(p_stk) & 0xFFFFFFF8u);
+                                                                /* Registers stacked as if auto-saved on exception      */
+#if (OS_CPU_ARM_FP_EN > 0u)                                     /* FPU auto-saved registers.                            */
+     --p_stk;
+    *(--p_stk) = (OS_STK)0x02000000u;                           /* FPSCR                                                */
+                                                                /* Initialize S0-S15 floating point registers           */
+    *(--p_stk) = (OS_STK)0x41700000u;                           /* S15                                                  */
+    *(--p_stk) = (OS_STK)0x41600000u;                           /* S14                                                  */
+    *(--p_stk) = (OS_STK)0x41500000u;                           /* S13                                                  */
+    *(--p_stk) = (OS_STK)0x41400000u;                           /* S12                                                  */
+    *(--p_stk) = (OS_STK)0x41300000u;                           /* S11                                                  */
+    *(--p_stk) = (OS_STK)0x41200000u;                           /* S10                                                  */
+    *(--p_stk) = (OS_STK)0x41100000u;                           /* S9                                                   */
+    *(--p_stk) = (OS_STK)0x41000000u;                           /* S8                                                   */
+    *(--p_stk) = (OS_STK)0x40E00000u;                           /* S7                                                   */
+    *(--p_stk) = (OS_STK)0x40C00000u;                           /* S6                                                   */
+    *(--p_stk) = (OS_STK)0x40A00000u;                           /* S5                                                   */
+    *(--p_stk) = (OS_STK)0x40800000u;                           /* S4                                                   */
+    *(--p_stk) = (OS_STK)0x40400000u;                           /* S3                                                   */
+    *(--p_stk) = (OS_STK)0x40000000u;                           /* S2                                                   */
+    *(--p_stk) = (OS_STK)0x3F800000u;                           /* S1                                                   */
+    *(--p_stk) = (OS_STK)0x00000000u;                           /* S0                                                   */
+#endif
+    *(--p_stk) = (OS_STK)0x01000000uL;                          /* xPSR                                                 */
+    *(--p_stk) = (OS_STK)task;                                  /* Entry Point                                          */
+    *(--p_stk) = (OS_STK)OS_TaskReturn;                         /* R14 (LR)                                             */
+    *(--p_stk) = (OS_STK)0x12121212uL;                          /* R12                                                  */
+    *(--p_stk) = (OS_STK)0x03030303uL;                          /* R3                                                   */
+    *(--p_stk) = (OS_STK)0x02020202uL;                          /* R2                                                   */
+    *(--p_stk) = (OS_STK)0x01010101uL;                          /* R1                                                   */
+    *(--p_stk) = (OS_STK)p_arg;                                 /* R0 : argument                                        */
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+    *(--p_stk) = (OS_STK)0xFFFFFFEDuL;                          /* R14: EXEC_RETURN; See Note 5                         */
+#else
+    *(--p_stk) = (OS_STK)0xFFFFFFFDuL;                          /* R14: EXEC_RETURN; See Note 5                         */
+#endif
+                                                                /* Remaining registers saved on process stack           */
+    *(--p_stk) = (OS_STK)0x11111111uL;                          /* R11                                                  */
+    *(--p_stk) = (OS_STK)0x10101010uL;                          /* R10                                                  */
+    *(--p_stk) = (OS_STK)0x09090909uL;                          /* R9                                                   */
+    *(--p_stk) = (OS_STK)0x08080808uL;                          /* R8                                                   */
+    *(--p_stk) = (OS_STK)0x07070707uL;                          /* R7                                                   */
+    *(--p_stk) = (OS_STK)0x06060606uL;                          /* R6                                                   */
+    *(--p_stk) = (OS_STK)0x05050505uL;                          /* R5                                                   */
+    *(--p_stk) = (OS_STK)0x04040404uL;                          /* R4                                                   */
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+                                                                /* Initialize S16-S31 floating point registers          */
+    *(--p_stk) = (OS_STK)0x41F80000u;                           /* S31                                                  */
+    *(--p_stk) = (OS_STK)0x41F00000u;                           /* S30                                                  */
+    *(--p_stk) = (OS_STK)0x41E80000u;                           /* S29                                                  */
+    *(--p_stk) = (OS_STK)0x41E00000u;                           /* S28                                                  */
+    *(--p_stk) = (OS_STK)0x41D80000u;                           /* S27                                                  */
+    *(--p_stk) = (OS_STK)0x41D00000u;                           /* S26                                                  */
+    *(--p_stk) = (OS_STK)0x41C80000u;                           /* S25                                                  */
+    *(--p_stk) = (OS_STK)0x41C00000u;                           /* S24                                                  */
+    *(--p_stk) = (OS_STK)0x41B80000u;                           /* S23                                                  */
+    *(--p_stk) = (OS_STK)0x41B00000u;                           /* S22                                                  */
+    *(--p_stk) = (OS_STK)0x41A80000u;                           /* S21                                                  */
+    *(--p_stk) = (OS_STK)0x41A00000u;                           /* S20                                                  */
+    *(--p_stk) = (OS_STK)0x41980000u;                           /* S19                                                  */
+    *(--p_stk) = (OS_STK)0x41900000u;                           /* S18                                                  */
+    *(--p_stk) = (OS_STK)0x41880000u;                           /* S17                                                  */
+    *(--p_stk) = (OS_STK)0x41800000u;                           /* S16                                                  */
+#endif
+
+    return (p_stk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other
+*              operations during a context switch.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that
+*                 will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the
+*                 task being switched out (i.e. the preempted task).
+*********************************************************************************************************
+*/
+#if (OS_CPU_HOOKS_EN > 0u) && (OS_TASK_SW_HOOK_EN > 0u)
+void  OSTaskSwHook (void)
+{
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+    OS_CPU_FP_Reg_Push(OSTCBCur->OSTCBStkPtr);                  /* Push the FP registers of the current task.           */
+#endif
+
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskSwHook();
+#endif
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+    OS_CPU_FP_Reg_Pop(OSTCBHighRdy->OSTCBStkPtr);               /* Pop the FP registers of the highest ready task.      */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           OS_TCBInit() HOOK
+*
+* Description: This function is called by OS_TCBInit() after setting up most of the TCB.
+*
+* Arguments  : ptcb    is a pointer to the TCB of the task being created.
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTCBInitHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TCBInitHook(ptcb);
+#else
+    (void)ptcb;                                                 /* Prevent compiler warning                             */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if (OS_CPU_HOOKS_EN > 0u) && (OS_TIME_TICK_HOOK_EN > 0u)
+void  OSTimeTickHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TimeTickHook();
+#endif
+
+#if OS_TMR_EN > 0u
+    OSTmrCtr++;
+    if (OSTmrCtr >= (OS_TICKS_PER_SEC / OS_TMR_CFG_TICKS_PER_SEC)) {
+        OSTmrCtr = 0u;
+        OSTmrSignal();
+    }
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          SYS TICK HANDLER
+*
+* Description: Handle the system tick (SysTick) interrupt, which is used to generate the uC/OS-II tick
+*              interrupt.
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) This function MUST be placed on entry 15 of the Cortex-M vector table.
+*********************************************************************************************************
+*/
+
+void  OS_CPU_SysTickHandler (void)
+{
+#if OS_CRITICAL_METHOD == 3u                                    /* Allocate storage for CPU status register             */
+    OS_CPU_SR  cpu_sr;
+#endif
+
+
+    OS_ENTER_CRITICAL();
+    OSIntEnter();                                               /* Tell uC/OS-II that we are starting an ISR            */
+    OS_EXIT_CRITICAL();
+
+    OSTimeTick();                                               /* Call uC/OS-II's OSTimeTick()                         */
+
+    OSIntExit();                                                /* Tell uC/OS-II that we are leaving the ISR            */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         INITIALIZE SYS TICK
+*
+* Description: Initialize the SysTick using the CPU clock frequency.
+*
+* Arguments  : cpu_freq     CPU clock frequency.
+*
+* Note(s)    : 1) This function MUST be called after OSStart() & after processor initialization.
+*
+*              2) Either OS_CPU_SysTickInitFreq or OS_CPU_SysTickInit() can be called.
+*********************************************************************************************************
+*/
+
+void  OS_CPU_SysTickInitFreq (INT32U  cpu_freq)
+{
+    INT32U  cnts;
+
+
+    cnts = (cpu_freq / (INT32U)OS_TICKS_PER_SEC);               /* Determine nbr SysTick cnts between two OS tick intr. */
+
+    OS_CPU_SysTickInit(cnts);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         INITIALIZE SYS TICK
+*
+* Description: Initialize the SysTick using the number of counts between two ticks.
+*
+* Arguments  : cnts     Number of SysTick counts between two OS tick interrupts.
+*
+* Note(s)    : 1) This function MUST be called after OSStart() & after processor initialization.
+*
+*              2) Either OS_CPU_SysTickInitFreq or OS_CPU_SysTickInit() can be called.
+*********************************************************************************************************
+*/
+
+void  OS_CPU_SysTickInit (INT32U  cnts)
+{
+    INT32U  prio;
+
+    
+    OS_CPU_CM_NVIC_ST_RELOAD = cnts - 1u;
+
+                                                                /* Set SysTick handler prio.                            */
+    prio  =  OS_CPU_CM_NVIC_SHPRI3;
+    prio &=  0x00FFFFFFu;
+    prio |= (OS_CPU_CFG_SYSTICK_PRIO << 24u);
+
+    OS_CPU_CM_NVIC_SHPRI3 = prio;
+
+                                                                /* Enable timer.                                        */
+    OS_CPU_CM_NVIC_ST_CTRL |= OS_CPU_CM_NVIC_ST_CTRL_CLK_SRC |
+                              OS_CPU_CM_NVIC_ST_CTRL_ENABLE;
+                                                                /* Enable timer interrupt.                              */
+    OS_CPU_CM_NVIC_ST_CTRL |= OS_CPU_CM_NVIC_ST_CTRL_INTEN;
+}
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/EDK/Code/includes.h b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/EDK/Code/includes.h
new file mode 100644
index 0000000..d9c28ab
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/EDK/Code/includes.h
@@ -0,0 +1,17 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*                           (c) Copyright 1992-2002, Jean J. Labrosse, Weston, FL
+*                                           All Rights Reserved
+*
+*                                           MASTER INCLUDE FILE
+*********************************************************************************************************
+*/
+
+#include    
+#include    
+#include    
+
+#include    
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/EDK/Code/os_cfg.h b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/EDK/Code/os_cfg.h
new file mode 100644
index 0000000..8d876a5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/EDK/Code/os_cfg.h
@@ -0,0 +1,118 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*                           (c) Copyright 1992-2003, Jean J. Labrosse, Weston, FL
+*                                           All Rights Reserved
+*
+*                                  uC/OS-II Configuration File for V2.7x
+*
+* File : OS_CFG.H
+* By   : Jean J. Labrosse
+*********************************************************************************************************
+*/
+
+#ifndef OS_CFG_H
+#define OS_CFG_H
+
+                                       /* ---------------------- MISCELLANEOUS ----------------------- */
+#define OS_ARG_CHK_EN             1    /* Enable (1) or Disable (0) argument checking                  */
+#define OS_CPU_HOOKS_EN           1    /* uC/OS-II hooks are found in the processor port files         */
+
+#define OS_DEBUG_EN               1    /* Enable(1) debug variables                                    */
+
+#define OS_EVENT_NAME_SIZE       32    /* Determine the size of the name of a Sem, Mutex, Mbox or Q    */
+
+#define OS_LOWEST_PRIO           63    /* Defines the lowest priority that can be assigned ...         */
+                                       /* ... MUST NEVER be higher than 63!                            */
+
+#define OS_MAX_EVENTS            10    /* Max. number of event control blocks in your application      */
+#define OS_MAX_FLAGS              5    /* Max. number of Event Flag Groups    in your application      */
+#define OS_MAX_MEM_PART           5    /* Max. number of memory partitions                             */
+#define OS_MAX_QS                 4    /* Max. number of queue control blocks in your application      */
+#define OS_MAX_TASKS             20    /* Max. number of tasks in your application, MUST be >= 2       */
+
+#define OS_SCHED_LOCK_EN          1    /*     Include code for OSSchedLock() and OSSchedUnlock()       */
+
+#define OS_TASK_IDLE_STK_SIZE   128    /* Idle task stack size (# of OS_STK wide entries)              */
+
+#define OS_TASK_STAT_EN           1    /* Enable (1) or Disable(0) the statistics task                 */
+#define OS_TASK_STAT_STK_SIZE   128    /* Statistics task stack size (# of OS_STK wide entries)        */
+#define OS_TASK_STAT_STK_CHK_EN   1    /* Check task stacks from statistic task                        */
+
+#define OS_TICK_STEP_EN           1    /* Enable tick stepping feature for uC/OS-View                  */
+#define OS_TICKS_PER_SEC         20    /* Set the number of ticks in one second                        */
+
+
+                                       /* ----------------------- EVENT FLAGS ------------------------ */
+#define OS_FLAG_EN                1    /* Enable (1) or Disable (0) code generation for EVENT FLAGS    */
+#define OS_FLAG_WAIT_CLR_EN       1    /* Include code for Wait on Clear EVENT FLAGS                   */
+#define OS_FLAG_ACCEPT_EN         1    /*     Include code for OSFlagAccept()                          */
+#define OS_FLAG_DEL_EN            1    /*     Include code for OSFlagDel()                             */
+#define OS_FLAG_NAME_SIZE        32    /*     Determine the size of the name of an event flag group    */
+#define OS_FLAG_QUERY_EN          1    /*     Include code for OSFlagQuery()                           */
+
+
+                                       /* -------------------- MESSAGE MAILBOXES --------------------- */
+#define OS_MBOX_EN                1    /* Enable (1) or Disable (0) code generation for MAILBOXES      */
+#define OS_MBOX_ACCEPT_EN         1    /*     Include code for OSMboxAccept()                          */
+#define OS_MBOX_DEL_EN            1    /*     Include code for OSMboxDel()                             */
+#define OS_MBOX_POST_EN           1    /*     Include code for OSMboxPost()                            */
+#define OS_MBOX_POST_OPT_EN       1    /*     Include code for OSMboxPostOpt()                         */
+#define OS_MBOX_QUERY_EN          1    /*     Include code for OSMboxQuery()                           */
+
+
+                                       /* --------------------- MEMORY MANAGEMENT -------------------- */
+#define OS_MEM_EN                 1    /* Enable (1) or Disable (0) code generation for MEMORY MANAGER */
+#define OS_MEM_QUERY_EN           1    /*     Include code for OSMemQuery()                            */
+#define OS_MEM_NAME_SIZE         32    /*     Determine the size of a memory partition name            */
+
+
+                                       /* ---------------- MUTUAL EXCLUSION SEMAPHORES --------------- */
+#define OS_MUTEX_EN               1    /* Enable (1) or Disable (0) code generation for MUTEX          */
+#define OS_MUTEX_ACCEPT_EN        1    /*     Include code for OSMutexAccept()                         */
+#define OS_MUTEX_DEL_EN           1    /*     Include code for OSMutexDel()                            */
+#define OS_MUTEX_QUERY_EN         1    /*     Include code for OSMutexQuery()                          */
+
+
+                                       /* ---------------------- MESSAGE QUEUES ---------------------- */
+#define OS_Q_EN                   1    /* Enable (1) or Disable (0) code generation for QUEUES         */
+#define OS_Q_ACCEPT_EN            1    /*     Include code for OSQAccept()                             */
+#define OS_Q_DEL_EN               1    /*     Include code for OSQDel()                                */
+#define OS_Q_FLUSH_EN             1    /*     Include code for OSQFlush()                              */
+#define OS_Q_POST_EN              1    /*     Include code for OSQPost()                               */
+#define OS_Q_POST_FRONT_EN        1    /*     Include code for OSQPostFront()                          */
+#define OS_Q_POST_OPT_EN          1    /*     Include code for OSQPostOpt()                            */
+#define OS_Q_QUERY_EN             1    /*     Include code for OSQQuery()                              */
+
+
+                                       /* ------------------------ SEMAPHORES ------------------------ */
+#define OS_SEM_EN                 1    /* Enable (1) or Disable (0) code generation for SEMAPHORES     */
+#define OS_SEM_ACCEPT_EN          1    /*    Include code for OSSemAccept()                            */
+#define OS_SEM_DEL_EN             1    /*    Include code for OSSemDel()                               */
+#define OS_SEM_QUERY_EN           1    /*    Include code for OSSemQuery()                             */
+
+
+                                       /* --------------------- TASK MANAGEMENT ---------------------- */
+#define OS_TASK_CHANGE_PRIO_EN    1    /*     Include code for OSTaskChangePrio()                      */
+#define OS_TASK_CREATE_EN         1    /*     Include code for OSTaskCreate()                          */
+#define OS_TASK_CREATE_EXT_EN     1    /*     Include code for OSTaskCreateExt()                       */
+#define OS_TASK_DEL_EN            1    /*     Include code for OSTaskDel()                             */
+#define OS_TASK_NAME_SIZE        32    /*     Determine the size of a task name                        */
+#define OS_TASK_PROFILE_EN        1    /*     Include variables in OS_TCB for profiling                */
+#define OS_TASK_QUERY_EN          1    /*     Include code for OSTaskQuery()                           */
+#define OS_TASK_SUSPEND_EN        1    /*     Include code for OSTaskSuspend() and OSTaskResume()      */
+#define OS_TASK_SW_HOOK_EN        1    /*     Include code for OSTaskSwHook()                          */
+
+
+                                       /* --------------------- TIME MANAGEMENT ---------------------- */
+#define OS_TIME_DLY_HMSM_EN       1    /*     Include code for OSTimeDlyHMSM()                         */
+#define OS_TIME_DLY_RESUME_EN     1    /*     Include code for OSTimeDlyResume()                       */
+#define OS_TIME_GET_SET_EN        1    /*     Include code for OSTimeGet() and OSTimeSet()             */
+#define OS_TIME_TICK_HOOK_EN      1    /*     Include code for OSTimeTickHook()                        */
+
+
+typedef INT16U             OS_FLAGS;   /* Date type for event flag bits (8, 16 or 32 bits)             */
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/EDK/Code/system.c b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/EDK/Code/system.c
new file mode 100644
index 0000000..81b77b1
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/EDK/Code/system.c
@@ -0,0 +1,131 @@
+/******************************************************************************
+* Function name         :  system.c
+* returns               :  
+* Created by            :  Nasser Poureh 
+* Date Created          :  6/17/03
+* Company				:  Insight Electronics
+* Description           :  Main Program
+* Notes                 :  
+******************************************************************************/
+
+#include "xuartlite_l.h"
+#include "xtmrctr_l.h"
+#include "xgpio_l.h"
+#include "xparameters.h"
+#include 
+
+	
+
+unsigned int count_1 = 0;
+unsigned int count_2 = 0;
+unsigned int timer_count = 1;
+static char display_data[10] =	{0xFC, 0x60, 0xDA, 0xF2, 0x66, 0xB6, 0xBE, 0xE0, 0xFE, 0xF6};
+
+
+
+
+
+void timer1_int_handler(void * baseaddr_p) {
+   int baseaddr = *(int *)baseaddr_p;
+   unsigned int csr;
+
+  /* Read timer 0 CSR to see if it raised the interrupt */
+  csr = XTmrCtr_mGetControlStatusReg(XPAR_MYTIMER1_BASEADDR, 0);
+  
+  if (csr & XTC_CSR_INT_OCCURED_MASK) {
+    
+    XGpio_mSetDataReg(XPAR_MYGPIO_A_BASEADDR, display_data[count_1]);
+    
+    
+    /* Clear the timer interrupt */
+    XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER1_BASEADDR, 0, csr);
+
+  }
+
+  count_1 = count_1 + 1;
+
+   if (count_1 == 10) {
+	   count_1 = 0;
+   }
+
+}
+
+
+
+
+
+void timer2_int_handler(void * baseaddr_p) {
+   int baseaddr = *(int *)baseaddr_p;
+   unsigned int csr;
+
+  /* Read timer 0 CSR to see if it raised the interrupt */
+  csr = XTmrCtr_mGetControlStatusReg(XPAR_MYTIMER2_BASEADDR, 0);
+  
+  if (csr & XTC_CSR_INT_OCCURED_MASK) {
+    
+    XGpio_mSetDataReg(XPAR_MYGPIO_B_BASEADDR, display_data[count_2]);
+    
+    
+    /* Clear the timer interrupt */
+    XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER2_BASEADDR, 0, csr);
+
+  } 
+   count_2 = count_2 + 1;
+
+   if (count_2 == 10) {
+	   count_2 = 0;
+   }
+
+}
+
+
+
+
+
+
+
+main() {
+
+
+	print("        ####################################################\n\r");
+	print("        #                                                  #\n\r");
+	print("        #              Memec Design MB1000                 #\n\r");
+	print("        #          MicroBlaze Development Board            #\n\r");
+	print("        #                                                  #\n\r");
+	print("        ####################################################\n\r");
+	print("\n\r");
+	print("\n\r");
+
+
+
+  /* Enable microblaze interrupts */
+  microblaze_enable_interrupts();
+
+  /* Start the interrupt controller */
+  XIntc_mMasterEnable(XPAR_MYINTC_BASEADDR);
+
+  /* Set the direction of the GPIO ports to outputs to drive the 7-seg LEDs*/
+  XGpio_mSetDataDirection(XPAR_MYGPIO_A_BASEADDR, 0x00);
+  XGpio_mSetDataDirection(XPAR_MYGPIO_B_BASEADDR, 0x00);
+
+  /* set the number of cycles each timer counts before generating an interrupt */
+  XTmrCtr_mSetLoadReg(XPAR_MYTIMER1_BASEADDR, 0,  50000000);
+  XTmrCtr_mSetLoadReg(XPAR_MYTIMER2_BASEADDR, 0, 100000000);
+
+  /* reset the timers, and clear interrupts */
+  XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER1_BASEADDR, 0, XTC_CSR_INT_OCCURED_MASK | XTC_CSR_LOAD_MASK );
+  XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER2_BASEADDR, 0, XTC_CSR_INT_OCCURED_MASK | XTC_CSR_LOAD_MASK );
+	
+  /* Enable timer1 and timer2 interrupts in the interrupt controller */
+  XIntc_mEnableIntr(XPAR_MYINTC_BASEADDR, XPAR_MYTIMER1_INTERRUPT_MASK | XPAR_MYTIMER2_INTERRUPT_MASK);
+  
+  /* start the timers */
+  XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER1_BASEADDR, 0, XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK);
+  XTmrCtr_mSetControlStatusReg(XPAR_MYTIMER2_BASEADDR, 0, XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK);
+  
+  /* Wait for interrupts to occur */
+  while (1)
+      ;
+
+}
+ 
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/USE_MSR_INSTR/os_cpu_a.S b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/USE_MSR_INSTR/os_cpu_a.S
new file mode 100644
index 0000000..6bae7c2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/USE_MSR_INSTR/os_cpu_a.S
@@ -0,0 +1,718 @@
+/*
+*********************************************************************************************************
+*                                               uC/OS-II
+*                                         The Real-Time Kernel
+*
+*                             (c) Copyright 2003, Micrium, Inc., Weston, FL
+*                                          All Rights Reserved
+*
+*                                           Xilinx MicroBlaze
+*
+*                                          GNU  C/C++ Compiler
+*
+* Filename: os_cpu_a.s
+*********************************************************************************************************
+*/
+#define _ASMLANGUAGE
+
+/*
+*********************************************************************************************************
+*                                CONSTANTS USED TO ACCESS TASK CONTEXT STACK
+*********************************************************************************************************
+*/
+.equ    STK_OFFSET_RMSR,   0x00
+.equ    STK_OFFSET_R02,    0x04
+.equ    STK_OFFSET_R03,    0x08
+.equ    STK_OFFSET_R04,    0x0C
+.equ    STK_OFFSET_R05,    0x10
+.equ    STK_OFFSET_R06,    0x14
+.equ    STK_OFFSET_R07,    0x18
+.equ    STK_OFFSET_R08,    0x1C
+.equ    STK_OFFSET_R09,    0x20
+.equ    STK_OFFSET_R10,    0x24
+.equ    STK_OFFSET_R11,    0x28
+.equ    STK_OFFSET_R12,    0x2C
+.equ    STK_OFFSET_R13,    0x30
+.equ    STK_OFFSET_R14,    0x34
+.equ    STK_OFFSET_R15,    0x38
+.equ    STK_OFFSET_R17,    0x3C
+.equ    STK_OFFSET_R18,    0x40
+.equ    STK_OFFSET_R19,    0x44
+.equ    STK_OFFSET_R20,    0x48
+.equ    STK_OFFSET_R21,    0x4C
+.equ    STK_OFFSET_R22,    0x50
+.equ    STK_OFFSET_R23,    0x54
+.equ    STK_OFFSET_R24,    0x58
+.equ    STK_OFFSET_R25,    0x5C
+.equ    STK_OFFSET_R26,    0x60
+.equ    STK_OFFSET_R27,    0x64
+.equ    STK_OFFSET_R28,    0x68
+.equ    STK_OFFSET_R29,    0x6C
+.equ    STK_OFFSET_R30,    0x70
+.equ    STK_OFFSET_R31,    0x74
+
+.equ    STK_CTX_SIZE,      0x78
+
+.equ    CPU_IE_BIT,        0x02
+
+
+/*
+*********************************************************************************************************
+*                                          PUBLIC FUNCTIONS
+*********************************************************************************************************
+*/
+    .globl     OSStartHighRdy
+    .globl     OSCtxSw
+    .globl     OSIntCtxSw
+    
+    .globl     _interrupt_handler
+    .globl     OS_CPU_ISR
+    .globl     OS_CPU_SR_Save
+    .globl     OS_CPU_SR_Restore
+
+/*
+*********************************************************************************************************
+*                                         EXTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+    .extern    OSIntEnter
+    .extern    OSIntExit 
+    .extern    OS_CPU_IntHandler
+/*
+*********************************************************************************************************
+*                                         EXTERNAL VARIABLES
+*********************************************************************************************************
+*/
+    .extern    OSRunning
+    .extern    OSIntNesting
+    .extern    OSTaskSwHook
+    .extern    OSTCBCur
+    .extern    OSTCBHighRdy
+    .extern    OSPrioCur
+    .extern    OSPrioHighRdy
+
+.text
+/*
+*********************************************************************************************************
+*                                         DISABLE INTERRUPTS
+*                                  OS_CPU_SR  OS_CPU_SR_Save(void);
+*
+* Description : Disables the interrupts and returns the RMSR contents.  This allows the IE state to be 
+*               restored at a subsequent time.
+*
+*               The variable in the calling routine which the return is set to MUST be declared 'volatile' 
+*               for proper operation.  There is no guarantee that the proper register will be scheduled 
+*               for the subsequent 'OS_CPU_SR_Save()' function call if the variable is not declared
+*               'volatile'.
+*
+* Arguments   : None
+*
+* Returns     : Current RMSR contents in R3
+*
+* Note(s)     : None
+*********************************************************************************************************
+*/
+
+OS_CPU_SR_Save:
+    RTSD    r15, 8       
+    MSRCLR  r3,  CPU_IE_BIT                  /* Save MSR in r3 and disable interrupts                  */                     
+
+/*
+*********************************************************************************************************
+*                                         ENABLE INTERRUPTS
+*                                 void OS_CPU_SR_Restore(OS_CPU_SR sr);
+*
+* Description: Enables the interrupts using the provided data. If the IE bit is set in the argument, the 
+*              RTID opcode is used to return.  If the IE bis is clear, the standard RTSD is used leaving 
+*              the interrupts disabled.
+*
+*              The argument from the calling routine MUST be declared 'volatile' for proper operation. 
+*              There is no guarantee that the proper register will be scheduled for the 'OS_CPU_SR_Restore()' 
+*              function call if the variable is not declared 'volatile'.
+*
+* Arguments   : Saved RMSR contents in R5
+*
+* Returns     : None
+*
+* Note(s)     : None
+*********************************************************************************************************
+*/
+
+OS_CPU_SR_Restore:
+    RTSD    r15, 8
+    MTS     rMSR, r5                         /* Move the saved status from r5 into rMSR                */
+
+
+/*
+*********************************************************************************************************
+*                                            OSStartHighRdy()
+*
+* Description: Starts the highest priority task that is available to run.  OSStartHighRdy() MUST:
+*
+*              a) Call OSTaskSwHook()
+*              b) Set OSRunning to TRUE
+*              c) Switch to the highest priority task.
+*
+*              The stack frame of the task to resume is assumed to look as follows:
+*
+*              OSTCBHighRdy->OSTCBStkPtr + 0x00     RMSR   (IE=1)       (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5     (p_arg passed to task)
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*********************************************************************************************************
+*/
+
+OSStartHighRdy:
+
+    BRLID   r15, OSTaskSwHook           /* Call OSTaskSwHook()                                         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+    OR      r3,  r3, r0                 /* OSRunning = TRUE                                            */
+    ADDIK   r3,  r0, 1
+    SBI     r3,  r0, OSRunning
+                                             
+    LWI     r3,  r0, OSTCBHighRdy       /* SP       = OSTCBHighRdy->OSTCBStkPtr                        */
+    LW      r1,  r0, r3                      
+
+    LWI     r31, r1, STK_OFFSET_R31     /* *************** RESTORE TASK'S CONTEXT ***************      */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17                   
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06   
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+	 ANDNI   r3,  r3, CPU_IE_BIT         /* Clear the IE bit (It will be set by the return from INT.)   */
+    MTS     RMSR,r3
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (i.e. de-allocate storage)               */
+
+    RTID    r14, 0                      /* Branch to task level code enabling interrupts, IE=1         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+/*
+*********************************************************************************************************
+*                                              OSCtxSw()
+*
+* Description: Performs the Context switch from a task.  This function is ALWAYS called with interrupts 
+*              DISABLED.
+*
+*              OSCtxSw() must implement the following pseudo-code:
+*
+*                  Save ALL CPU registers;
+*                  OSTCBCur->OSTCBStkPtr = SP;
+*                  OSTaskSwHook();
+*                  OSPrioCur = OSPrioHighRdy;
+*                  OSTCBCur  = OSTCBHighRdy;
+*                  SP        = OSTCBHighRdy->OSTCBStkPtr;
+*                  Restore ALL the CPU registers;
+*                  if (IE bit of saved RMSR is 0) {
+*                      Return from function call;
+*                  } else {
+*                      Set IE bit of RMSR to 0;
+*                      Return from interrupt whcih sets IE back to 1;
+*                  }
+*                    
+*
+*              The stack frame of the task to suspend will look as follows when OSCtxSw() is done:
+*
+*              OSTCBCur->OSTCBStkPtr     + 0x00     RMSR   (See Note 1) (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5     (p_arg passed to task)
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*
+*              The stack frame of the task to resume looks as follows:
+*  
+*              OSTCBHighRdy->OSTCBStkPtr + 0x00     RMSR   (See Note 2) (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*
+* Note(s)    : 1) OSCtxSw() is ALWAYS called with IE set to 0 (i.e. interrupts disabled).
+*              2) If the task frame was saved by OSCtxSw(), IE would be set to 0.
+*                 If the task frame was saved by an ISR,    IE would be set to 1.
+*********************************************************************************************************
+*/
+
+OSCtxSw:
+                                        /* *************** SAVE CURRENT TASK'S CONTEXT *************** */
+    ADDIK    r1,  r1, -STK_CTX_SIZE     /* Allocate storage for saving registers onto stack            */
+
+    SWI     r2,  r1,  STK_OFFSET_R02    /* Save the remaining registers onto the task's stack          */
+    SWI     r3,  r1,  STK_OFFSET_R03
+    SWI     r4,  r1,  STK_OFFSET_R04
+    SWI     r5,  r1,  STK_OFFSET_R05
+    SWI     r6,  r1,  STK_OFFSET_R06
+    SWI     r7,  r1,  STK_OFFSET_R07
+    SWI     r8,  r1,  STK_OFFSET_R08
+    SWI     r9,  r1,  STK_OFFSET_R09
+    SWI     r10, r1,  STK_OFFSET_R10
+    SWI     r11, r1,  STK_OFFSET_R11
+    SWI     r12, r1,  STK_OFFSET_R12
+    SWI     r13, r1,  STK_OFFSET_R13
+    SWI     r14, r1,  STK_OFFSET_R14
+    SWI     r15, r1,  STK_OFFSET_R15
+    SWI     r17, r1,  STK_OFFSET_R17                   
+    SWI     r18, r1,  STK_OFFSET_R18
+    SWI     r19, r1,  STK_OFFSET_R19
+    SWI     r20, r1,  STK_OFFSET_R20 
+    SWI     r21, r1,  STK_OFFSET_R21
+    SWI     r22, r1,  STK_OFFSET_R22
+    SWI     r23, r1,  STK_OFFSET_R23
+    SWI     r24, r1,  STK_OFFSET_R24
+    SWI     r25, r1,  STK_OFFSET_R25
+    SWI     r26, r1,  STK_OFFSET_R26
+    SWI     r27, r1,  STK_OFFSET_R27
+    SWI     r28, r1,  STK_OFFSET_R28
+    SWI     r29, r1,  STK_OFFSET_R29
+    SWI     r30, r1,  STK_OFFSET_R30
+    SWI     r31, r1,  STK_OFFSET_R31
+
+    MFS     r3,  RMSR                   /* save the MSR (See Note 1)                                   */
+    SWI     r3,  r1,  STK_OFFSET_RMSR
+               
+    LWI     r3,  r0, OSTCBCur           /* OSTCBCur->OSTCBStkPtr = SP                                  */
+    SW      r1,  r0, r3
+
+    BRLID   r15, OSTaskSwHook           /* Call OSTaskSwHook()                                         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+    LBUI    r3,  r0, OSPrioHighRdy      /* OSPrioCur = OSPrioHighRdy                                   */
+    SBI     r3,  r0, OSPrioCur
+
+    LWI     r3,  r0, OSTCBHighRdy       /* OSTCBCur  = OSTCBHighRdy                                    */          
+    SWI     r3,  r0, OSTCBCur
+
+    LW      r1,  r0, r3                 /* SP = OSTCBHighRdy->OSTCBStkPtr                              */
+  
+    LWI     r31, r1, STK_OFFSET_R31     /* **************** RESTORE NEW TASK'S CONTEXT *************** */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17                   
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06   
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+    
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDI    r3,  r3, CPU_IE_BIT         /* See if IE is 0 (Saved by OSCtxSw()) or 1 (Saved by ISR)     */
+    BNEI    r3,  OSCtxSw_SavedByISR     /* Branch if ISR saved context                                 */
+
+                                        /* *********** The context was saved by OSCtxSw() ************ */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    MTS     RMSR,r3
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (deallocate storage)                     */
+
+    RTSD    r15, 8                      /* Context was saved by OSCtxSw()                              */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+OSCtxSw_SavedByISR:
+                                        /* ************ The context was saved by an ISR ************** */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDNI   r3,  r3, CPU_IE_BIT         /* Clear the IE bit (It will be set by the return from INT.)   */
+    MTS     RMSR,r3 
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (deallocate storage)                     */
+
+    RTID    r14, 0                      /* Context was saved by ISR, return address is in R14, Set IE  */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+/*
+*********************************************************************************************************
+*                                            OSIntCtxSw()
+*
+* Description: Performs the Context Switch from an ISR.  
+*
+*              OSIntCtxSw() must implement the following pseudo-code:
+*
+*                  OSTaskSwHook();
+*                  OSPrioCur = OSPrioHighRdy;
+*                  OSTCBCur  = OSTCBHighRdy;
+*                  SP        = OSTCBHighRdy->OSTCBStkPtr;
+*                  Restore ALL the CPU registers;
+*                  if (IE bit of saved RMSR is 0) {
+*                      Return from function call;
+*                  } else {
+*                      Set IE bit of RMSR to 0;
+*                      Return from interrupt;
+*                  }
+*
+*              Upon entry, the registers of the task being suspended have already been saved onto that 
+*              task's stack and the SP for the task has been saved in its OS_TCB by the ISR.
+*
+*              The stack frame of the task to resume is assumed to look as follows:
+*
+*              OSTCBHighRdy->OSTCBStkPtr + 0x00     RMSR   (See Note 1) (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*
+* Note(s)    : 1) If the task frame was saved by OSCtxSw(), IE would be set to 0.
+*                 If the task frame was saved by an ISR,    IE would be set to 1.
+*********************************************************************************************************
+*/
+
+OSIntCtxSw:
+
+    BRLID   r15, OSTaskSwHook           /* Call OSTaskSwHook()                                         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+    LBUI    r3,  r0, OSPrioHighRdy      /* OSPrioCur = OSPrioHighRdy                                   */
+    SBI     r3,  r0, OSPrioCur
+
+    LWI     r3,  r0, OSTCBHighRdy       /* OSTCBCur  = OSTCBHighRdy                                    */          
+    SWI     r3,  r0, OSTCBCur
+
+    LW      r1,  r0, r3                 /* SP = OSTCBHighRdy->OSTCBStkPtr                              */
+    
+    LWI     r31, r1, STK_OFFSET_R31     /* **************** RESTORE NEW TASK'S CONTEXT *************** */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17       
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+    
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDI    r3,  r3, CPU_IE_BIT         /* See if IE is 0 (Saved by OSCtxSw()) or 1 (Saved by ISR)     */
+    BNEI    r3,  OSIntCtxSw_SavedByISR  /* Branch if ISR saved context                                 */
+
+                                        /* *********** The context was saved by OSCtxSw() ************ */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    MTS     RMSR,r3 
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (deallocate storage)                     */                   
+
+    RTSD    r15, 8                      /* Context was saved by OSCtxSw()                              */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+OSIntCtxSw_SavedByISR:                  /* ************ The context was saved by an ISR ************** */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDNI   r3,  r3, CPU_IE_BIT         /* Clear the IE bit (It will be set by the return from INT.)   */
+    MTS     RMSR,r3 
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (deallocate storage)                     */                   
+
+    RTID    r14, 0                      /* Context was saved by ISR, return address is in R14          */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+/*
+*********************************************************************************************************
+*                                             OS_CPU_ISR()
+*
+* Description: This routine is intended to be the target of the Interrupt processing functionality that 
+*              occurs when the MicroBlaze is interrupted. The address, 'XOSExternalInterruptHandler', is 
+*              used as the branch destination in the code that is executed at addresses 0x10 and 0x14 in 
+*              the MicroBlaze vector table assuming that the vector table is in RAM
+* 
+*              The XPS interrupt vector is replaced by OS_CPU_ISR() by executing the code from a C function:
+*
+*                 *(INT32U *)0x00000010 = 0xB0000000 | ((INT32U)OS_CPU_ISR >> 16);
+*                 *(INT32U *)0x00000014 = 0xB8080000 | ((INT32U)OS_CPU_ISR & 0x0000FFFF);
+*
+*              The interrupted task context is saved onto its stack as follows:
+*
+*              OSTCBCur->OSTCBStkPtr     + 0x00     RMSR   (See Note 1) (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5     (p_arg passed to task)
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*
+* Note(s)    : 1) The IE bit is saved onto the stack 'set' since the code must return to the interrupted
+*                 task with interrupts enabled.
+*********************************************************************************************************
+*/
+
+_interrupt_handler:
+OS_CPU_ISR:
+                                             /* ********** SAVE INTERRUPTED TASK'S CONTEXT *********** */
+    ADDIK   r1,  r1, -STK_CTX_SIZE           /* Allocate storage for saving registers onto stack       */
+
+    SWI     r2,  r1,  STK_OFFSET_R02         
+    SWI     r3,  r1,  STK_OFFSET_R03
+    SWI     r4,  r1,  STK_OFFSET_R04
+    SWI     r5,  r1,  STK_OFFSET_R05
+    SWI     r6,  r1,  STK_OFFSET_R06
+    SWI     r7,  r1,  STK_OFFSET_R07
+    SWI     r8,  r1,  STK_OFFSET_R08
+    SWI     r9,  r1,  STK_OFFSET_R09
+    SWI     r10, r1,  STK_OFFSET_R10
+    SWI     r11, r1,  STK_OFFSET_R11
+    SWI     r12, r1,  STK_OFFSET_R12
+    SWI     r13, r1,  STK_OFFSET_R13
+    SWI     r14, r1,  STK_OFFSET_R14
+    SWI     r15, r1,  STK_OFFSET_R15
+    SWI     r17, r1,  STK_OFFSET_R17          
+    SWI     r18, r1,  STK_OFFSET_R18
+    SWI     r19, r1,  STK_OFFSET_R19
+    SWI     r20, r1,  STK_OFFSET_R20
+    SWI     r21, r1,  STK_OFFSET_R21
+    SWI     r22, r1,  STK_OFFSET_R22
+    SWI     r23, r1,  STK_OFFSET_R23
+    SWI     r24, r1,  STK_OFFSET_R24
+    SWI     r25, r1,  STK_OFFSET_R25
+    SWI     r26, r1,  STK_OFFSET_R26
+    SWI     r27, r1,  STK_OFFSET_R27
+    SWI     r28, r1,  STK_OFFSET_R28
+    SWI     r29, r1,  STK_OFFSET_R29
+    SWI     r30, r1,  STK_OFFSET_R30
+    SWI     r31, r1,  STK_OFFSET_R31
+
+    MFS     r3,  RMSR                        /* save the MSR                                           */
+    ORI     r3,  r3, CPU_IE_BIT              /* Set IE to 1 to return to interrupted task with INT en. */
+    SWI     r3,  r1, STK_OFFSET_RMSR         /* MSR is at top of frame                                 */
+
+    LBUI    r3,  r0, OSIntNesting            /* if (OSIntNesting == 0) {                               */
+    BNEI    r3,  OS_CPU_ISR_1
+
+    LWI     r3,  r0, OSTCBCur                /*     OSTCBCur->OSTCBStkPtr = SP                         */
+    SW      r1,  r0, r3                      /* }                                                      */
+
+OS_CPU_ISR_1:
+    LBUI    r3,  r0, OSIntNesting
+    ADDIK   r3,  r3, 1                       /* OSIntNesting++;                                        */
+    SBI     r3,  r0, OSIntNesting
+
+    BRLID   r15, BSP_IntHandler              /* Call the provided C level interrupt handler            */
+    AND     r0,  r0, r0                      /* NO-OP                                                  */
+    
+    BRLID   r15, OSIntExit                   /* OSIntExit()                                            */
+    AND     r0,  r0, r0                      /* NO-OP                                                  */
+
+    LWI     r31, r1, STK_OFFSET_R31          /* ********* RESTORE INTERRUPTED TASK'S CONTEXT ********* */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17      
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+    
+    LWI     r3,  r1, STK_OFFSET_RMSR         /* Get RMSR                                               */
+    ANDNI   r3,  r3, CPU_IE_BIT              /* Clear IE to prevent interrupts until stack is cleaned  */
+    MTS     RMSR,r3 
+
+    LWI     r3,  r1, STK_OFFSET_R03          /* Restore R3 (was used a scratchpad register for RMSR)   */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE            /* Clean up the stack                                     */                   
+
+    RTID    r14, 0                           /* Return from interrupt with interrupts enabled          */
+    AND     r0,  r0, r0                      /* NO-OP                                                  */
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_cpu.h b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_cpu.h
new file mode 100644
index 0000000..2f8f2c2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_cpu.h
@@ -0,0 +1,93 @@
+/*
+*********************************************************************************************************
+*                                               uC/OS-II
+*                                        The Real-Time Kernel
+*
+*                            (c) Copyright 2003, Micrium, Inc., Weston, FL
+*                                          All Rights Reserved
+*
+*                                           Xilinx MicroBlaze
+*
+*                                          GNU  C/C++ Compiler
+*
+* File : OS_CPU.H
+* By   : Jean J. Labrosse
+*********************************************************************************************************
+*/
+
+#ifdef  OS_CPU_GLOBALS
+#define OS_CPU_EXT
+#else
+#define OS_CPU_EXT  extern
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                              DATA TYPES
+*                                         (Compiler Specific)
+*********************************************************************************************************
+*/
+
+typedef unsigned  char           BOOLEAN;
+typedef unsigned  char           INT8U;        /* Unsigned  8 bit quantity                           */
+typedef signed    char           INT8S;        /* Signed    8 bit quantity                           */
+typedef unsigned  short          INT16U;       /* Unsigned 16 bit quantity                           */
+typedef signed    short          INT16S;       /* Signed   16 bit quantity                           */
+typedef unsigned  int            INT32U;       /* Unsigned 32 bit quantity                           */
+typedef signed    int            INT32S;       /* Signed   32 bit quantity                           */
+typedef float                    FP32;
+typedef double                   FP64;
+
+typedef unsigned  int            OS_STK;       /* Each stack entry is 32-bits wide                   */
+typedef unsigned  int  volatile  OS_CPU_SR;    /* The CPU Status Word is 32-bits wide. This variable */
+											   /* MUST be volatile for proper operation. Refer to    */
+											   /* os_cpu_a.s for more details                        */
+
+/*
+*********************************************************************************************************
+*                                    CRITICAL SECTIONS MANAGEMENT
+*
+* Method #1:  Disable/Enable interrupts using simple instructions.  After critical section, interrupts
+*             will be enabled even if they were disabled before entering the critical section.
+*
+* Method #2:  Disable/Enable interrupts by preserving the state of interrupts.  In other words, if
+*             interrupts were disabled before entering the critical section, they will be disabled when
+*             leaving the critical section.
+*
+* Method #3:  Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+*             would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+*             disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+*             disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+*             into the CPU's status register.
+*********************************************************************************************************
+*/
+
+#define  OS_CRITICAL_METHOD    3
+
+#define  OS_ENTER_CRITICAL()	cpu_sr = OS_CPU_SR_Save();
+#define  OS_EXIT_CRITICAL()		OS_CPU_SR_Restore(cpu_sr);
+
+
+/*
+*********************************************************************************************************
+*                                           Xilinx Microblaze
+*********************************************************************************************************
+*/
+
+#define  OS_STK_GROWTH        1            /* Stack grows from HIGH to LOW memory on Xilinx Microblaze */
+
+#define  OS_TASK_SW()         OSCtxSw()    /* See OS_CPU_A.S                                           */
+
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+OS_CPU_SR	OS_CPU_SR_Save(void);          /* See OS_CPU_A.S                                           */
+void		OS_CPU_SR_Restore(OS_CPU_SR);     /* See OS_CPU_A.S                                           */
+
+void        OS_CPU_ISR(void);              /* See OS_CPU_A.S                                           */
+
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_cpu_a.S b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_cpu_a.S
new file mode 100644
index 0000000..9778b72
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_cpu_a.S
@@ -0,0 +1,732 @@
+/*
+*********************************************************************************************************
+*                                               uC/OS-II
+*                                         The Real-Time Kernel
+*
+*                             (c) Copyright 2003, Micrium, Inc., Weston, FL
+*                                          All Rights Reserved
+*
+*                                           Xilinx MicroBlaze
+*
+*                                          GNU  C/C++ Compiler
+*
+* Filename: os_cpu_a.s
+*********************************************************************************************************
+*/
+#define _ASMLANGUAGE
+
+/*
+*********************************************************************************************************
+*                                CONSTANTS USED TO ACCESS TASK CONTEXT STACK
+*********************************************************************************************************
+*/
+.equ    STK_OFFSET_RMSR,   0x00
+.equ    STK_OFFSET_R02,    0x04
+.equ    STK_OFFSET_R03,    0x08
+.equ    STK_OFFSET_R04,    0x0C
+.equ    STK_OFFSET_R05,    0x10
+.equ    STK_OFFSET_R06,    0x14
+.equ    STK_OFFSET_R07,    0x18
+.equ    STK_OFFSET_R08,    0x1C
+.equ    STK_OFFSET_R09,    0x20
+.equ    STK_OFFSET_R10,    0x24
+.equ    STK_OFFSET_R11,    0x28
+.equ    STK_OFFSET_R12,    0x2C
+.equ    STK_OFFSET_R13,    0x30
+.equ    STK_OFFSET_R14,    0x34
+.equ    STK_OFFSET_R15,    0x38
+.equ    STK_OFFSET_R17,    0x3C
+.equ    STK_OFFSET_R18,    0x40
+.equ    STK_OFFSET_R19,    0x44
+.equ    STK_OFFSET_R20,    0x48
+.equ    STK_OFFSET_R21,    0x4C
+.equ    STK_OFFSET_R22,    0x50
+.equ    STK_OFFSET_R23,    0x54
+.equ    STK_OFFSET_R24,    0x58
+.equ    STK_OFFSET_R25,    0x5C
+.equ    STK_OFFSET_R26,    0x60
+.equ    STK_OFFSET_R27,    0x64
+.equ    STK_OFFSET_R28,    0x68
+.equ    STK_OFFSET_R29,    0x6C
+.equ    STK_OFFSET_R30,    0x70
+.equ    STK_OFFSET_R31,    0x74
+
+.equ    STK_CTX_SIZE,      0x78
+
+.equ    CPU_IE_BIT,        0x02
+
+
+/*
+*********************************************************************************************************
+*                                          PUBLIC FUNCTIONS
+*********************************************************************************************************
+*/
+    .globl     OSStartHighRdy
+    .globl     OSCtxSw
+    .globl     OSIntCtxSw
+    
+    .globl     _interrupt_handler
+    .globl     OS_CPU_ISR
+    .globl     OS_CPU_SR_Save
+    .globl     OS_CPU_SR_Restore
+
+/*
+*********************************************************************************************************
+*                                         EXTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+    .extern    OSIntEnter
+    .extern    OSIntExit 
+    .extern    OS_CPU_IntHandler
+/*
+*********************************************************************************************************
+*                                         EXTERNAL VARIABLES
+*********************************************************************************************************
+*/
+    .extern    OSRunning
+    .extern    OSIntNesting
+    .extern    OSTaskSwHook
+    .extern    OSTCBCur
+    .extern    OSTCBHighRdy
+    .extern    OSPrioCur
+    .extern    OSPrioHighRdy
+
+.text
+/*
+*********************************************************************************************************
+*                                         DISABLE INTERRUPTS
+*                                  OS_CPU_SR  OS_CPU_SR_Save(void);
+*
+* Description : Disables the interrupts and returns the RMSR contents.  This allows the IE state to be 
+*               restored at a subsequent time.
+*
+*               The variable in the calling routine which the return is set to MUST be declared 'volatile' 
+*               for proper operation.  There is no guarantee that the proper register will be scheduled 
+*               for the subsequent 'OS_CPU_SR_Save()' function call if the variable is not declared
+*               'volatile'.
+*
+* Arguments   : None
+*
+* Returns     : Current RMSR contents in R3
+*
+* Note(s)     : None
+*********************************************************************************************************
+*/
+
+OS_CPU_SR_Save:
+    ADDIK   r1, r1, -4            /* Save R4 since it's used as a scratchpad register   */
+    SW      r4, r1, r0 
+
+    MFS     r3, RMSR               /* Read the MSR.  r3 is used as the return value      */
+    ANDNI   r4, r3, CPU_IE_BIT     /* Mask off the IE bit                                */
+    MTS     RMSR, r4               /* Store the MSR                                      */
+
+    LW      r4, r1, r0             /* Restore R4                                         */
+    ADDIK   r1, r1, 4 
+
+    AND     r0, r0, r0             /* NO-OP - pipeline flush                             */
+    AND     r0, r0, r0             /* NO-OP - pipeline flush                             */
+    AND     r0, r0, r0             /* NO-OP - pipeline flush                             */
+
+    RTSD    r15, 8                 /* Return to caller with R3 containing original RMSR  */
+    AND     r0, r0, r0             /* NO-OP                                              */
+
+/*
+*********************************************************************************************************
+*                                         ENABLE INTERRUPTS
+*                                 void OS_CPU_SR_Restore(OS_CPU_SR sr);
+*
+* Description: Enables the interrupts using the provided data. If the IE bit is set in the argument, the 
+*              RTID opcode is used to return.  If the IE bis is clear, the standard RTSD is used leaving 
+*              the interrupts disabled.
+*
+*              The argument from the calling routine MUST be declared 'volatile' for proper operation. 
+*              There is no guarantee that the proper register will be scheduled for the 'OS_CPU_SR_Restore()' 
+*              function call if the variable is not declared 'volatile'.
+*
+* Arguments   : Saved RMSR contents in R5
+*
+* Returns     : None
+*
+* Note(s)     : None
+*********************************************************************************************************
+*/
+
+OS_CPU_SR_Restore:
+    RTSD    r15, 8
+    MTS     rMSR, r5               /* Move the saved status from r5 into rMSR            */
+
+
+/*
+*********************************************************************************************************
+*                                            OSStartHighRdy()
+*
+* Description: Starts the highest priority task that is available to run.  OSStartHighRdy() MUST:
+*
+*              a) Call OSTaskSwHook()
+*              b) Set OSRunning to TRUE
+*              c) Switch to the highest priority task.
+*
+*              The stack frame of the task to resume is assumed to look as follows:
+*
+*              OSTCBHighRdy->OSTCBStkPtr + 0x00     RMSR   (IE=1)       (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5     (p_arg passed to task)
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*********************************************************************************************************
+*/
+
+OSStartHighRdy:
+
+    BRLID   r15, OSTaskSwHook           /* Call OSTaskSwHook()                                         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+    OR      r3,  r3, r0                 /* OSRunning = TRUE                                            */
+    ADDIK   r3,  r0, 1
+    SBI     r3,  r0, OSRunning
+                                             
+    LWI     r3,  r0, OSTCBHighRdy       /* SP       = OSTCBHighRdy->OSTCBStkPtr                        */
+    LW      r1,  r0, r3                      
+
+    LWI     r31, r1, STK_OFFSET_R31     /* *************** RESTORE TASK'S CONTEXT ***************      */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17                   
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06   
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04   
+    LWI     r2,  r1, STK_OFFSET_R02
+
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+	 ANDNI   r3,  r3, CPU_IE_BIT         /* Clear the IE bit (It will be set by the return from INT.)   */
+    MTS     RMSR,r3
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (i.e. de-allocate storage)               */
+
+    RTID    r14, 0                      /* Branch to task level code enabling interrupts, IE=1         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+/*
+*********************************************************************************************************
+*                                              OSCtxSw()
+*
+* Description: Performs the Context switch from a task.  This function is ALWAYS called with interrupts 
+*              DISABLED.
+*
+*              OSCtxSw() must implement the following pseudo-code:
+*
+*                  Save ALL CPU registers;
+*                  OSTCBCur->OSTCBStkPtr = SP;
+*                  OSTaskSwHook();
+*                  OSPrioCur = OSPrioHighRdy;
+*                  OSTCBCur  = OSTCBHighRdy;
+*                  SP        = OSTCBHighRdy->OSTCBStkPtr;
+*                  Restore ALL the CPU registers;
+*                  if (IE bit of saved RMSR is 0) {
+*                      Return from function call;
+*                  } else {
+*                      Set IE bit of RMSR to 0;
+*                      Return from interrupt whcih sets IE back to 1;
+*                  }
+*                    
+*
+*              The stack frame of the task to suspend will look as follows when OSCtxSw() is done:
+*
+*              OSTCBCur->OSTCBStkPtr     + 0x00     RMSR   (See Note 1) (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5     (p_arg passed to task)
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*
+*              The stack frame of the task to resume looks as follows:
+*  
+*              OSTCBHighRdy->OSTCBStkPtr + 0x00     RMSR   (See Note 2) (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*
+* Note(s)    : 1) OSCtxSw() is ALWAYS called with IE set to 0 (i.e. interrupts disabled).
+*              2) If the task frame was saved by OSCtxSw(), IE would be set to 0.
+*                 If the task frame was saved by an ISR,    IE would be set to 1.
+*********************************************************************************************************
+*/
+
+OSCtxSw:
+                                        /* *************** SAVE CURRENT TASK'S CONTEXT *************** */
+    ADDIK    r1,  r1, -STK_CTX_SIZE     /* Allocate storage for saving registers onto stack            */
+
+    SWI     r2,  r1,  STK_OFFSET_R02    /* Save the remaining registers onto the task's stack          */
+    SWI     r3,  r1,  STK_OFFSET_R03
+    SWI     r4,  r1,  STK_OFFSET_R04
+    SWI     r5,  r1,  STK_OFFSET_R05
+    SWI     r6,  r1,  STK_OFFSET_R06
+    SWI     r7,  r1,  STK_OFFSET_R07
+    SWI     r8,  r1,  STK_OFFSET_R08
+    SWI     r9,  r1,  STK_OFFSET_R09
+    SWI     r10, r1,  STK_OFFSET_R10
+    SWI     r11, r1,  STK_OFFSET_R11
+    SWI     r12, r1,  STK_OFFSET_R12
+    SWI     r13, r1,  STK_OFFSET_R13
+    SWI     r14, r1,  STK_OFFSET_R14
+    SWI     r15, r1,  STK_OFFSET_R15
+    SWI     r17, r1,  STK_OFFSET_R17                   
+    SWI     r18, r1,  STK_OFFSET_R18
+    SWI     r19, r1,  STK_OFFSET_R19
+    SWI     r20, r1,  STK_OFFSET_R20 
+    SWI     r21, r1,  STK_OFFSET_R21
+    SWI     r22, r1,  STK_OFFSET_R22
+    SWI     r23, r1,  STK_OFFSET_R23
+    SWI     r24, r1,  STK_OFFSET_R24
+    SWI     r25, r1,  STK_OFFSET_R25
+    SWI     r26, r1,  STK_OFFSET_R26
+    SWI     r27, r1,  STK_OFFSET_R27
+    SWI     r28, r1,  STK_OFFSET_R28
+    SWI     r29, r1,  STK_OFFSET_R29
+    SWI     r30, r1,  STK_OFFSET_R30
+    SWI     r31, r1,  STK_OFFSET_R31
+
+    MFS     r3,  RMSR                   /* save the MSR (See Note 1)                                   */
+    SWI     r3,  r1,  STK_OFFSET_RMSR
+               
+    LWI     r3,  r0, OSTCBCur           /* OSTCBCur->OSTCBStkPtr = SP                                  */
+    SW      r1,  r0, r3
+
+    BRLID   r15, OSTaskSwHook           /* Call OSTaskSwHook()                                         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+    LBUI    r3,  r0, OSPrioHighRdy      /* OSPrioCur = OSPrioHighRdy                                   */
+    SBI     r3,  r0, OSPrioCur
+
+    LWI     r3,  r0, OSTCBHighRdy       /* OSTCBCur  = OSTCBHighRdy                                    */          
+    SWI     r3,  r0, OSTCBCur
+
+    LW      r1,  r0, r3                 /* SP = OSTCBHighRdy->OSTCBStkPtr                              */
+  
+    LWI     r31, r1, STK_OFFSET_R31     /* **************** RESTORE NEW TASK'S CONTEXT *************** */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17                   
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06   
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+    
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDI    r3,  r3, CPU_IE_BIT         /* See if IE is 0 (Saved by OSCtxSw()) or 1 (Saved by ISR)     */
+    BNEI    r3,  OSCtxSw_SavedByISR     /* Branch if ISR saved context                                 */
+
+                                        /* *********** The context was saved by OSCtxSw() ************ */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    MTS     RMSR,r3
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK    r1,  r1, STK_CTX_SIZE      /* Clean up the stack (deallocate storage)                     */
+
+    RTSD    r15, 8                      /* Context was saved by OSCtxSw()                              */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+OSCtxSw_SavedByISR:
+                                        /* ************ The context was saved by an ISR ************** */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDNI   r3,  r3, CPU_IE_BIT         /* Clear the IE bit (It will be set by the return from INT.)   */
+    MTS     RMSR,r3 
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK    r1,  r1, STK_CTX_SIZE      /* Clean up the stack (deallocate storage)                     */
+
+    RTID    r14, 0                      /* Context was saved by ISR, return address is in R14, Set IE  */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+/*
+*********************************************************************************************************
+*                                            OSIntCtxSw()
+*
+* Description: Performs the Context Switch from an ISR.  
+*
+*              OSIntCtxSw() must implement the following pseudo-code:
+*
+*                  OSTaskSwHook();
+*                  OSPrioCur = OSPrioHighRdy;
+*                  OSTCBCur  = OSTCBHighRdy;
+*                  SP        = OSTCBHighRdy->OSTCBStkPtr;
+*                  Restore ALL the CPU registers;
+*                  if (IE bit of saved RMSR is 0) {
+*                      Return from function call;
+*                  } else {
+*                      Set IE bit of RMSR to 0;
+*                      Return from interrupt;
+*                  }
+*
+*              Upon entry, the registers of the task being suspended have already been saved onto that 
+*              task's stack and the SP for the task has been saved in its OS_TCB by the ISR.
+*
+*              The stack frame of the task to resume is assumed to look as follows:
+*
+*              OSTCBHighRdy->OSTCBStkPtr + 0x00     RMSR   (See Note 1) (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*
+* Note(s)    : 1) If the task frame was saved by OSCtxSw(), IE would be set to 0.
+*                 If the task frame was saved by an ISR,    IE would be set to 1.
+*********************************************************************************************************
+*/
+
+OSIntCtxSw:
+
+    BRLID   r15, OSTaskSwHook           /* Call OSTaskSwHook()                                         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+    LBUI    r3,  r0, OSPrioHighRdy      /* OSPrioCur = OSPrioHighRdy                                   */
+    SBI     r3,  r0, OSPrioCur
+
+    LWI     r3,  r0, OSTCBHighRdy       /* OSTCBCur  = OSTCBHighRdy                                    */          
+    SWI     r3,  r0, OSTCBCur
+
+    LW      r1,  r0, r3                 /* SP = OSTCBHighRdy->OSTCBStkPtr                              */
+    
+    LWI     r31, r1, STK_OFFSET_R31     /* **************** RESTORE NEW TASK'S CONTEXT *************** */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17       
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+    
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDI    r3,  r3, CPU_IE_BIT         /* See if IE is 0 (Saved by OSCtxSw()) or 1 (Saved by ISR)     */
+    BNEI    r3,  OSIntCtxSw_SavedByISR  /* Branch if ISR saved context                                 */
+
+                                        /* *********** The context was saved by OSCtxSw() ************ */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    MTS     RMSR,r3 
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK    r1,  r1, STK_CTX_SIZE      /* Clean up the stack (deallocate storage)                     */                   
+
+    RTSD    r15, 8                      /* Context was saved by OSCtxSw()                              */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+OSIntCtxSw_SavedByISR:                  /* ************ The context was saved by an ISR ************** */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDNI   r3,  r3, CPU_IE_BIT         /* Clear the IE bit (It will be set by the return from INT.)   */
+    MTS     RMSR,r3 
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (deallocate storage)                     */                   
+
+    RTID    r14, 0                      /* Context was saved by ISR, return address is in R14          */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+/*
+*********************************************************************************************************
+*                                             OS_CPU_ISR()
+*
+* Description: This routine is intended to be the target of the Interrupt processing functionality that 
+*              occurs when the MicroBlaze is interrupted. The address, 'XOSExternalInterruptHandler', is 
+*              used as the branch destination in the code that is executed at addresses 0x10 and 0x14 in 
+*              the MicroBlaze vector table assuming that the vector table is in RAM
+* 
+*              The XPS interrupt vector is replaced by OS_CPU_ISR() by executing the code from a C function:
+*
+*                 *(INT32U *)0x00000010 = 0xB0000000 | ((INT32U)OS_CPU_ISR >> 16);
+*                 *(INT32U *)0x00000014 = 0xB8080000 | ((INT32U)OS_CPU_ISR & 0x0000FFFF);
+*
+*              The interrupted task context is saved onto its stack as follows:
+*
+*              OSTCBCur->OSTCBStkPtr     + 0x00     RMSR   (See Note 1) (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5     (p_arg passed to task)
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*
+* Note(s)    : 1) The IE bit is saved onto the stack 'set' since the code must return to the interrupted
+*                 task with interrupts enabled.
+*********************************************************************************************************
+*/
+
+_interrupt_handler:
+OS_CPU_ISR:
+                                             /* ********** SAVE INTERRUPTED TASK'S CONTEXT *********** */
+    ADDIK    r1,  r1, -STK_CTX_SIZE          /* Allocate storage for saving registers onto stack       */
+
+    SWI     r2,  r1,  STK_OFFSET_R02         
+    SWI     r3,  r1,  STK_OFFSET_R03
+    SWI     r4,  r1,  STK_OFFSET_R04
+    SWI     r5,  r1,  STK_OFFSET_R05
+    SWI     r6,  r1,  STK_OFFSET_R06
+    SWI     r7,  r1,  STK_OFFSET_R07
+    SWI     r8,  r1,  STK_OFFSET_R08
+    SWI     r9,  r1,  STK_OFFSET_R09
+    SWI     r10, r1,  STK_OFFSET_R10
+    SWI     r11, r1,  STK_OFFSET_R11
+    SWI     r12, r1,  STK_OFFSET_R12
+    SWI     r13, r1,  STK_OFFSET_R13
+    SWI     r14, r1,  STK_OFFSET_R14
+    SWI     r15, r1,  STK_OFFSET_R15
+    SWI     r17, r1,  STK_OFFSET_R17          
+    SWI     r18, r1,  STK_OFFSET_R18
+    SWI     r19, r1,  STK_OFFSET_R19
+    SWI     r20, r1,  STK_OFFSET_R20
+    SWI     r21, r1,  STK_OFFSET_R21
+    SWI     r22, r1,  STK_OFFSET_R22
+    SWI     r23, r1,  STK_OFFSET_R23
+    SWI     r24, r1,  STK_OFFSET_R24
+    SWI     r25, r1,  STK_OFFSET_R25
+    SWI     r26, r1,  STK_OFFSET_R26
+    SWI     r27, r1,  STK_OFFSET_R27
+    SWI     r28, r1,  STK_OFFSET_R28
+    SWI     r29, r1,  STK_OFFSET_R29
+    SWI     r30, r1,  STK_OFFSET_R30
+    SWI     r31, r1,  STK_OFFSET_R31
+
+    MFS     r3,  RMSR                        /* save the MSR                                           */
+    ORI     r3,  r3, CPU_IE_BIT              /* Set IE to 1 to return to interrupted task with INT en. */
+    SWI     r3,  r1, STK_OFFSET_RMSR         /* MSR is at top of frame                                 */
+
+    LBUI    r3,  r0, OSIntNesting            /* if (OSIntNesting == 0) {                               */
+    BNEI    r3,  OS_CPU_ISR_1
+
+    LWI     r3,  r0, OSTCBCur                /*     OSTCBCur->OSTCBStkPtr = SP                         */
+    SW      r1,  r0, r3                      /* }                                                      */
+
+OS_CPU_ISR_1:
+    LBUI    r3,  r0, OSIntNesting
+    ADDIK   r3,  r3, 1                       /* OSIntNesting++;                                        */
+    SBI     r3,  r0, OSIntNesting
+
+    BRLID   r15, BSP_IntHandler              /* Call the provided C level interrupt handler            */
+    AND     r0,  r0, r0                      /* NO-OP                                                  */
+    
+    BRLID   r15, OSIntExit                   /* OSIntExit()                                            */
+    AND     r0,  r0, r0                      /* NO-OP                                                  */
+
+    LWI     r31, r1, STK_OFFSET_R31          /* ********* RESTORE INTERRUPTED TASK'S CONTEXT ********* */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17      
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+    
+    LWI     r3,  r1, STK_OFFSET_RMSR         /* Get RMSR                                               */
+    ANDNI   r3,  r3, CPU_IE_BIT              /* Clear IE to prevent interrupts until stack is cleaned  */
+    MTS     RMSR,r3 
+
+    LWI     r3,  r1, STK_OFFSET_R03          /* Restore R3 (was used a scratchpad register for RMSR)   */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE            /* Clean up the stack                                     */                   
+
+    RTID    r14, 0                           /* Return from interrupt with interrupts enabled          */
+    AND     r0,  r0, r0                      /* NO-OP                                                  */
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_cpu_c.c b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_cpu_c.c
new file mode 100644
index 0000000..164c3d8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_cpu_c.c
@@ -0,0 +1,330 @@
+/*
+*********************************************************************************************************
+*                                               uC/OS-II
+*                                         The Real-Time Kernel
+*			 
+*                            (c) Copyright 1992-2003, Micrium, Inc., Weston, FL
+*                                          All Rights Reserved
+*
+*                                           Xilinx MicroBlaze
+*
+*                                          GNU  C/C++ Compiler
+*
+* File         : OS_CPU_C.C
+* By           : Jean J. Labrosse
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_GLOBALS
+#include 
+
+
+extern   void  *_SDA_BASE_;
+extern   void  *_SDA2_BASE_;
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                            (BEGINNING)
+*
+* Description: This function is called by OSInit() at the beginning of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0 && OS_VERSION > 203
+void  OSInitHookBegin (void)
+{
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                               (END)
+*
+* Description: This function is called by OSInit() at the end of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0 && OS_VERSION > 203
+void  OSInitHookEnd (void)
+{
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being created.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0 
+void  OSTaskCreateHook (OS_TCB *ptcb)
+{
+#if OS_VIEW_MODULE >0
+    OSView_TaskCreateHook(ptcb);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being deleted.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0 
+void  OSTaskDelHook (OS_TCB *ptcb)
+{
+    ptcb = ptcb;                       /* Prevent compiler warning                                     */
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                           TASK RETURN HOOK
+*
+* Description: This function is called when a task returns without being properly deleted.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task that was accidently returned.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0 
+void  OSTaskReturnHook (OS_TCB *ptcb)
+{
+    ptcb = ptcb;                       /* Prevent compiler warning                                     */
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                             IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do  
+*              such things as STOP the CPU to conserve power.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are enabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0 && OS_VERSION >= 251
+void  OSTaskIdleHook (void)
+{
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                           STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-II's statistics task.  This allows your 
+*              application to add functionality to the statistics task.
+*
+* Arguments  : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0 
+void  OSTaskStatHook (void)
+{
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                        INITIALIZE A TASK'S STACK
+*
+* Description: This function is called by either OSTaskCreate() or OSTaskCreateExt() to initialize the
+*              stack frame of the task being created.  This function is highly processor specific.
+*
+* Arguments  : task          is a pointer to the task code
+*
+*              p_arg         is a pointer to a user supplied data area that will be passed to the task
+*                            when the task first executes.
+*
+*              ptos          is a pointer to the top of stack.  It is assumed that 'ptos' points to
+*                            a 'free' entry on the task stack.  If OS_STK_GROWTH is set to 1 then
+*                            'ptos' will contain the HIGHEST valid address of the stack.  Similarly, if
+*                            OS_STK_GROWTH is set to 0, the 'ptos' will contains the LOWEST valid address
+*                            of the stack.
+*
+*              opt           specifies options that can be used to alter the behavior of OSTaskStkInit().
+*                            (see uCOS_II.H for OS_TASK_OPT_???).
+*
+* Returns    : Always returns the location of the new top-of-stack' once the processor registers have
+*              been placed on the stack in the proper order.
+*
+* Note(s)    : 1) Interrupts are enabled when your task starts executing. 
+*
+*                 OSTCBHighRdy->OSTCBStkPtr + 0x00     RMSR   (IE=1)       (LOW Memory)
+*                                           + 0x04     R2
+*                                           + 0x08     R3
+*                                           + 0x0C     R4
+*                                           + 0x10     R5     (p_arg passed to task)
+*                                           + 0x14     R6
+*                                           + 0x18     R7
+*                                           + 0x1C     R8
+*                                           + 0x20     R9
+*                                           + 0x24     R10
+*                                           + 0x28     R11
+*                                           + 0x2C     R12
+*                                           + 0x30     R13
+*                                           + 0x34     R14
+*                                           + 0x38     R15
+*                                           + 0x3C     R17
+*                                           + 0x40     R18
+*                                           + 0x44     R19
+*                                           + 0x48     R20
+*                                           + 0x4C     R21
+*                                           + 0x50     R22
+*                                           + 0x54     R23
+*                                           + 0x58     R24
+*                                           + 0x5C     R25
+*                                           + 0x60     R26
+*                                           + 0x64     R27
+*                                           + 0x68     R28
+*                                           + 0x6C     R29
+*                                           + 0x70     R30
+*                                           + 0x74     R31                (HIGH Memory)
+*                                           + 0x78     Empty
+*                 ptos --------->           + 0x7C     Empty
+*
+*              2) R16 is not saved as part of the task context since it is used by the debugger.
+*********************************************************************************************************
+*/
+/*$PAGE*/
+
+OS_STK  *OSTaskStkInit (void (*task)(void *pd), void *p_arg, OS_STK *ptos, INT16U opt)
+{
+    INT32U  *pstk;
+	 INT32U  msr_val;
+
+
+    __asm__ __volatile__ ("mfs\t%0,rmsr\n" : "=r"(msr_val));     
+
+    msr_val &= 0x000000A0;	           /* Ensure that the status of the caches is not changed           */
+
+    opt     = opt;                    /* 'opt' is not used, prevent warning                            */
+    pstk    = (INT32U *)ptos;         /* Load stack pointer                                            */
+    pstk--;                           /* Make sure we point to free entry ...                          */
+    pstk--;                           /* ... compiler uses top-of-stack so free an extra one.          */
+    *pstk-- = (INT32U)0x31313131;     /* R31                                                           */
+    *pstk-- = (INT32U)0x30303030;     /* R30                                                           */
+    *pstk-- = (INT32U)0x29292929;     /* R29                                                           */
+    *pstk-- = (INT32U)0x28282828;     /* R28                                                           */
+    *pstk-- = (INT32U)0x27272727;     /* R27                                                           */
+    *pstk-- = (INT32U)0x26262626;     /* R26                                                           */
+    *pstk-- = (INT32U)0x25252525;     /* R25                                                           */
+    *pstk-- = (INT32U)0x24242424;     /* R24                                                           */
+    *pstk-- = (INT32U)0x23232323;     /* R23                                                           */
+    *pstk-- = (INT32U)0x22222222;     /* R22                                                           */
+    *pstk-- = (INT32U)0x21212121;     /* R21                                                           */
+    *pstk-- = (INT32U)0x20202020;     /* R20                                                           */
+    *pstk-- = (INT32U)0x19191919;     /* R19                                                           */
+    *pstk-- = (INT32U)0x18181818;     /* R18                                                           */
+    *pstk-- = (INT32U)0x17171717;     /* R17                                                           */
+    *pstk-- = (INT32U)task - 8;       /* R15 = task return address (assuming function call)            */
+    *pstk-- = (INT32U)task;           /* R14 = task (Interrupt return address)                         */
+    *pstk-- = (INT32U)&_SDA_BASE_;    /* R13                                                           */
+    *pstk-- = (INT32U)0x12121212;     /* R12                                                           */
+    *pstk-- = (INT32U)0x11111111;     /* R11                                                           */
+    *pstk-- = (INT32U)0x10101010;     /* R10                                                           */
+    *pstk-- = (INT32U)0x09090909;     /* R09                                                           */
+    *pstk-- = (INT32U)0x08080808;     /* R08                                                           */
+    *pstk-- = (INT32U)0x07070707;     /* R07                                                           */
+    *pstk-- = (INT32U)0x06060606;     /* R06                                                           */
+    *pstk-- = (INT32U)p_arg;          /* R05                                                           */
+    *pstk-- = (INT32U)0x04040404;     /* R04                                                           */
+    *pstk-- = (INT32U)0x03030303;     /* R03                                                           */
+    *pstk-- = (INT32U)&_SDA2_BASE_;   /* R02                                                           */
+    *pstk   = msr_val | 0x00000002;   /* MSR with interrupts enabled                                   */
+
+    return ((OS_STK *)pstk);          /* Return new top of stack                                       */
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other
+*              operations during a context switch.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that
+*                 will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the 
+*                 task being switched out (i.e. the preempted task).
+*********************************************************************************************************
+*/
+#if (OS_CPU_HOOKS_EN > 0) && (OS_TASK_SW_HOOK_EN > 0)
+void  OSTaskSwHook (void)
+{
+#if OS_VIEW_MODULE > 0
+    OSView_TaskSwHook();
+#endif	 
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                           OS_TCBInit() HOOK
+*
+* Description: This function is called by OS_TCBInit() after setting up most of the TCB.
+*
+* Arguments  : ptcb    is a pointer to the TCB of the task being created.
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0 && OS_VERSION > 203
+void  OSTCBInitHook (OS_TCB *ptcb)
+{
+    ptcb = ptcb;                                           /* Prevent Compiler warning                 */
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if (OS_CPU_HOOKS_EN > 0) && (OS_TIME_TICK_HOOK_EN > 0)
+void  OSTimeTickHook (void)
+{
+#if OS_VIEW_MODULE > 0
+    OSView_TickHook();
+#endif
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_dbg.c b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_dbg.c
new file mode 100644
index 0000000..8bb098f
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Ports/MicroBlaze/GNU/os_dbg.c
@@ -0,0 +1,253 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                           DEBUGGER CONSTANTS
+*
+*                             (c) Copyright 2003, Jean J. Labrosse, Weston, FL
+*                                           All Rights Reserved
+*
+* File : OS_DBG.C
+* By   : Jean J. Labrosse
+*********************************************************************************************************
+*/
+
+#include 
+
+/*
+*********************************************************************************************************
+*                                             DEBUG DATA
+*********************************************************************************************************
+*/
+
+INT16U  const  OSDebugEn          = OS_DEBUG_EN;                /* Debug constants are defined below   */
+
+#if OS_DEBUG_EN > 0
+
+INT32U  const  OSEndiannessTest   = 0x12345678L;                /* Variable to test CPU endianness     */
+
+INT16U  const  OSEventEn          = OS_EVENT_EN;
+INT16U  const  OSEventMax         = OS_MAX_EVENTS;              /* Number of event control blocks      */
+INT16U  const  OSEventNameSize    = OS_EVENT_NAME_SIZE;         /* Size (in bytes) of event names      */
+#if (OS_EVENT_EN > 0) && (OS_MAX_EVENTS > 0)
+INT16U  const  OSEventSize        = sizeof(OS_EVENT);           /* Size in Bytes of OS_EVENT           */
+INT16U  const  OSEventTblSize     = sizeof(OSEventTbl);         /* Size of OSEventTbl[] in bytes       */
+#else
+INT16U  const  OSEventSize        = 0;
+INT16U  const  OSEventTblSize     = 0;
+#endif
+
+INT16U  const  OSFlagEn           = OS_FLAG_EN;
+#if (OS_FLAG_EN > 0) && (OS_MAX_FLAGS > 0)
+INT16U  const  OSFlagGrpSize      = sizeof(OS_FLAG_GRP);        /* Size in Bytes of OS_FLAG_GRP        */
+INT16U  const  OSFlagNodeSize     = sizeof(OS_FLAG_NODE);       /* Size in Bytes of OS_FLAG_NODE       */
+INT16U  const  OSFlagWidth        = sizeof(OS_FLAGS);           /* Width (in bytes) of OS_FLAGS        */
+#else
+INT16U  const  OSFlagGrpSize      = 0;
+INT16U  const  OSFlagNodeSize     = 0;
+INT16U  const  OSFlagWidth        = 0;
+#endif
+INT16U  const  OSFlagMax          = OS_MAX_FLAGS;
+INT16U  const  OSFlagNameSize     = OS_FLAG_NAME_SIZE;          /* Size (in bytes) of flag names       */
+
+INT16U  const  OSLowestPrio       = OS_LOWEST_PRIO;
+
+INT16U  const  OSMboxEn           = OS_MBOX_EN;
+
+INT16U  const  OSMemEn            = OS_MEM_EN;
+INT16U  const  OSMemMax           = OS_MAX_MEM_PART;            /* Number of memory partitions         */
+INT16U  const  OSMemNameSize      = OS_MEM_NAME_SIZE;           /* Size (in bytes) of partition names  */
+#if (OS_MEM_EN > 0) && (OS_MAX_MEM_PART > 0)
+INT16U  const  OSMemSize          = sizeof(OS_MEM);             /* Mem. Partition header sine (bytes)  */
+INT16U  const  OSMemTblSize       = sizeof(OSMemTbl);
+#else
+INT16U  const  OSMemSize          = 0;
+INT16U  const  OSMemTblSize       = 0;
+#endif
+INT16U  const  OSMutexEn          = OS_MUTEX_EN;
+
+INT16U  const  OSPtrSize          = sizeof(void *);             /* Size in Bytes of a pointer          */
+
+INT16U  const  OSQEn              = OS_Q_EN;
+INT16U  const  OSQMax             = OS_MAX_QS;                  /* Number of queues                    */
+#if (OS_Q_EN > 0) && (OS_MAX_QS > 0)
+INT16U  const  OSQSize            = sizeof(OS_Q);               /* Size in bytes of OS_Q structure     */
+#else
+INT16U  const  OSQSize            = 0;
+#endif
+
+INT16U  const  OSRdyTblSize       = OS_RDY_TBL_SIZE;            /* Number of bytes in the ready table  */
+
+INT16U  const  OSSemEn            = OS_SEM_EN;
+
+INT16U  const  OSStkWidth         = sizeof(OS_STK);             /* Size in Bytes of a stack entry      */
+
+INT16U  const  OSTaskCreateEn     = OS_TASK_CREATE_EN;
+INT16U  const  OSTaskCreateExtEn  = OS_TASK_CREATE_EXT_EN;
+INT16U  const  OSTaskDelEn        = OS_TASK_DEL_EN;
+INT16U  const  OSTaskIdleStkSize  = OS_TASK_IDLE_STK_SIZE;
+INT16U  const  OSTaskProfileEn    = OS_TASK_PROFILE_EN;
+INT16U  const  OSTaskMax          = OS_MAX_TASKS + OS_N_SYS_TASKS;  /* Total max. number of tasks      */
+INT16U  const  OSTaskNameSize     = OS_TASK_NAME_SIZE;              /* Size (in bytes) of task names   */
+INT16U  const  OSTaskStatEn       = OS_TASK_STAT_EN;
+INT16U  const  OSTaskStatStkSize  = OS_TASK_STAT_STK_SIZE;
+INT16U  const  OSTaskStatStkChkEn = OS_TASK_STAT_STK_CHK_EN;
+INT16U  const  OSTaskSwHookEn     = OS_TASK_SW_HOOK_EN;
+
+INT16U  const  OSTCBPrioTblMax    = OS_LOWEST_PRIO + 1;         /* Number of entries in OSTCBPrioTbl[] */
+INT16U  const  OSTCBSize          = sizeof(OS_TCB);             /* Size in Bytes of OS_TCB             */
+INT16U  const  OSTicksPerSec      = OS_TICKS_PER_SEC;
+INT16U  const  OSTimeTickHookEn   = OS_TIME_TICK_HOOK_EN;
+INT16U  const  OSVersionNbr       = OS_VERSION;
+
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             DEBUG DATA
+*                            TOTAL DATA SPACE (i.e. RAM) USED BY uC/OS-II
+*********************************************************************************************************
+*/
+#if OS_DEBUG_EN > 0
+
+INT16U  const  OSDataSize = sizeof(OSCtxSwCtr)
+#if (OS_EVENT_EN > 0) && (OS_MAX_EVENTS > 0)
+                          + sizeof(OSEventFreeList)
+                          + sizeof(OSEventTbl)
+#endif
+#if (OS_VERSION >= 251) && (OS_FLAG_EN > 0) && (OS_MAX_FLAGS > 0)
+                          + sizeof(OSFlagTbl)
+                          + sizeof(OSFlagFreeList)
+#endif
+#if OS_TASK_STAT_EN > 0
+                          + sizeof(OSCPUUsage)
+                          + sizeof(OSIdleCtrMax)
+                          + sizeof(OSIdleCtrRun)
+                          + sizeof(OSStatRdy)
+                          + sizeof(OSTaskStatStk)
+#endif
+#if OS_TICK_STEP_EN > 0
+                          + sizeof(OSTickStepState)
+#endif
+#if (OS_MEM_EN > 0) && (OS_MAX_MEM_PART > 0)
+                          + sizeof(OSMemFreeList)
+                          + sizeof(OSMemTbl)
+#endif
+#if (OS_Q_EN > 0) && (OS_MAX_QS > 0)
+                          + sizeof(OSQFreeList)
+                          + sizeof(OSQTbl)
+#endif
+#if OS_TIME_GET_SET_EN > 0   
+                          + sizeof(OSTime)
+#endif
+                          + sizeof(OSIntNesting)
+                          + sizeof(OSLockNesting)
+                          + sizeof(OSPrioCur)
+                          + sizeof(OSPrioHighRdy)
+                          + sizeof(OSRdyGrp)
+                          + sizeof(OSRdyTbl)
+                          + sizeof(OSRunning)
+                          + sizeof(OSTaskCtr)
+                          + sizeof(OSIdleCtr)
+                          + sizeof(OSTaskIdleStk)
+                          + sizeof(OSTCBCur)
+                          + sizeof(OSTCBFreeList)
+                          + sizeof(OSTCBHighRdy)
+                          + sizeof(OSTCBList)
+                          + sizeof(OSTCBPrioTbl)
+                          + sizeof(OSTCBTbl);
+
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       OS DEBUG INITIALISATION
+*
+* Description: This function is used to make sure that debug variables that are unused in the application
+*              are not optimized away.  This function might not be necessary for all compilers.  In this
+*              case, you should simply DELETE the code in this function while still leaving the declaration
+*              of the function itself.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : (1) This code doesn't do anything, it simply prevents the compiler from optimizing out
+*                  the 'const' variables which are declared in this file.
+*********************************************************************************************************
+*/
+
+#if OS_VERSION >= 270 && OS_DEBUG_EN > 0
+void  OSDebugInit (void)
+{
+    void  *ptemp;
+
+    
+    ptemp = (void *)&OSDebugEn;
+
+    ptemp = (void *)&OSEndiannessTest;
+
+    ptemp = (void *)&OSEventMax;
+    ptemp = (void *)&OSEventNameSize;
+    ptemp = (void *)&OSEventEn;
+    ptemp = (void *)&OSEventSize;
+    ptemp = (void *)&OSEventTblSize;
+
+    ptemp = (void *)&OSFlagEn;
+    ptemp = (void *)&OSFlagGrpSize;
+    ptemp = (void *)&OSFlagNodeSize;
+    ptemp = (void *)&OSFlagWidth;
+    ptemp = (void *)&OSFlagMax;
+    ptemp = (void *)&OSFlagNameSize;
+
+    ptemp = (void *)&OSLowestPrio;
+
+    ptemp = (void *)&OSMboxEn;
+
+    ptemp = (void *)&OSMemEn;
+    ptemp = (void *)&OSMemMax;
+    ptemp = (void *)&OSMemNameSize;
+    ptemp = (void *)&OSMemSize;
+    ptemp = (void *)&OSMemTblSize;
+
+    ptemp = (void *)&OSMutexEn;
+
+    ptemp = (void *)&OSPtrSize;
+
+    ptemp = (void *)&OSQEn;
+    ptemp = (void *)&OSQMax;
+    ptemp = (void *)&OSQSize;
+
+    ptemp = (void *)&OSRdyTblSize;
+
+    ptemp = (void *)&OSSemEn;
+
+    ptemp = (void *)&OSStkWidth;
+
+    ptemp = (void *)&OSTaskCreateEn;
+    ptemp = (void *)&OSTaskCreateExtEn;
+    ptemp = (void *)&OSTaskDelEn;
+    ptemp = (void *)&OSTaskIdleStkSize;
+    ptemp = (void *)&OSTaskProfileEn;
+    ptemp = (void *)&OSTaskMax;
+    ptemp = (void *)&OSTaskNameSize;
+    ptemp = (void *)&OSTaskStatEn;
+    ptemp = (void *)&OSTaskStatStkSize;
+    ptemp = (void *)&OSTaskStatStkChkEn;
+    ptemp = (void *)&OSTaskSwHookEn;
+
+    ptemp = (void *)&OSTCBPrioTblMax;
+    ptemp = (void *)&OSTCBSize;
+
+    ptemp = (void *)&OSTicksPerSec;
+    ptemp = (void *)&OSTimeTickHookEn;
+
+    ptemp = (void *)&OSVersionNbr;
+
+    ptemp = (void *)&OSDataSize;
+
+    ptemp = ptemp;                             /* Prevent compiler warning for 'ptemp' not being used! */
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os.h b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os.h
new file mode 100644
index 0000000..f3e02a9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os.h
@@ -0,0 +1,29 @@
+/*
+*********************************************************************************************************
+*                                              uC/OS-II
+*                                        The Real-Time Kernel
+*
+*                            (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : os.h
+* By      : Jean J. Labrosse
+* Version : V2.92.10
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*
+* Note : This file is included in the uC/OS-II for compatibility with uC/OS-III and should not be used
+*        in normal circumstances.
+*********************************************************************************************************
+*/
+
+#include  "ucos_ii.h"
+
+
+typedef  INT8U  OS_ERR;
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_cfg_r.h b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_cfg_r.h
new file mode 100644
index 0000000..04c356c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_cfg_r.h
@@ -0,0 +1,145 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                  uC/OS-II Configuration File for V2.9x
+*
+*                               (c) Copyright 2005-2013, Micrium, Weston, FL
+*                                          All Rights Reserved
+*
+*
+* File    : OS_CFG.H
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#ifndef OS_CFG_H
+#define OS_CFG_H
+
+
+                                       /* ---------------------- MISCELLANEOUS ----------------------- */
+#define OS_APP_HOOKS_EN           1u   /* Application-defined hooks are called from the uC/OS-II hooks */
+#define OS_ARG_CHK_EN             1u   /* Enable (1) or Disable (0) argument checking                  */
+#define OS_CPU_HOOKS_EN           1u   /* uC/OS-II hooks are found in the processor port files         */
+
+#define OS_DEBUG_EN               1u   /* Enable(1) debug variables                                    */
+
+#define OS_EVENT_MULTI_EN         1u   /* Include code for OSEventPendMulti()                          */
+#define OS_EVENT_NAME_EN          1u   /* Enable names for Sem, Mutex, Mbox and Q                      */
+
+#define OS_LOWEST_PRIO           63u   /* Defines the lowest priority that can be assigned ...         */
+                                       /* ... MUST NEVER be higher than 254!                           */
+
+#define OS_MAX_EVENTS            10u   /* Max. number of event control blocks in your application      */
+#define OS_MAX_FLAGS              5u   /* Max. number of Event Flag Groups    in your application      */
+#define OS_MAX_MEM_PART           5u   /* Max. number of memory partitions                             */
+#define OS_MAX_QS                 4u   /* Max. number of queue control blocks in your application      */
+#define OS_MAX_TASKS             20u   /* Max. number of tasks in your application, MUST be >= 2       */
+
+#define OS_SCHED_LOCK_EN          1u   /* Include code for OSSchedLock() and OSSchedUnlock()           */
+
+#define OS_TICK_STEP_EN           1u   /* Enable tick stepping feature for uC/OS-View                  */
+#define OS_TICKS_PER_SEC        100u   /* Set the number of ticks in one second                        */
+
+#define OS_TLS_TBL_SIZE           5u   /* Size of Thread-Local Storage Table                           */
+
+
+                                       /* --------------------- TASK STACK SIZE ---------------------- */
+#define OS_TASK_TMR_STK_SIZE    128u   /* Timer      task stack size (# of OS_STK wide entries)        */
+#define OS_TASK_STAT_STK_SIZE   128u   /* Statistics task stack size (# of OS_STK wide entries)        */
+#define OS_TASK_IDLE_STK_SIZE   128u   /* Idle       task stack size (# of OS_STK wide entries)        */
+
+
+                                       /* --------------------- TASK MANAGEMENT ---------------------- */
+#define OS_TASK_CHANGE_PRIO_EN    1u   /*     Include code for OSTaskChangePrio()                      */
+#define OS_TASK_CREATE_EN         1u   /*     Include code for OSTaskCreate()                          */
+#define OS_TASK_CREATE_EXT_EN     1u   /*     Include code for OSTaskCreateExt()                       */
+#define OS_TASK_DEL_EN            1u   /*     Include code for OSTaskDel()                             */
+#define OS_TASK_NAME_EN           1u   /*     Enable task names                                        */
+#define OS_TASK_PROFILE_EN        1u   /*     Include variables in OS_TCB for profiling                */
+#define OS_TASK_QUERY_EN          1u   /*     Include code for OSTaskQuery()                           */
+#define OS_TASK_REG_TBL_SIZE      1u   /*     Size of task variables array (#of INT32U entries)        */
+#define OS_TASK_STAT_EN           1u   /*     Enable (1) or Disable(0) the statistics task             */
+#define OS_TASK_STAT_STK_CHK_EN   1u   /*     Check task stacks from statistic task                    */
+#define OS_TASK_SUSPEND_EN        1u   /*     Include code for OSTaskSuspend() and OSTaskResume()      */
+#define OS_TASK_SW_HOOK_EN        1u   /*     Include code for OSTaskSwHook()                          */
+
+
+                                       /* ----------------------- EVENT FLAGS ------------------------ */
+#define OS_FLAG_EN                1u   /* Enable (1) or Disable (0) code generation for EVENT FLAGS    */
+#define OS_FLAG_ACCEPT_EN         1u   /*     Include code for OSFlagAccept()                          */
+#define OS_FLAG_DEL_EN            1u   /*     Include code for OSFlagDel()                             */
+#define OS_FLAG_NAME_EN           1u   /*     Enable names for event flag group                        */
+#define OS_FLAG_QUERY_EN          1u   /*     Include code for OSFlagQuery()                           */
+#define OS_FLAG_WAIT_CLR_EN       1u   /* Include code for Wait on Clear EVENT FLAGS                   */
+#define OS_FLAGS_NBITS           16u   /* Size in #bits of OS_FLAGS data type (8, 16 or 32)            */
+
+
+                                       /* -------------------- MESSAGE MAILBOXES --------------------- */
+#define OS_MBOX_EN                1u   /* Enable (1) or Disable (0) code generation for MAILBOXES      */
+#define OS_MBOX_ACCEPT_EN         1u   /*     Include code for OSMboxAccept()                          */
+#define OS_MBOX_DEL_EN            1u   /*     Include code for OSMboxDel()                             */
+#define OS_MBOX_PEND_ABORT_EN     1u   /*     Include code for OSMboxPendAbort()                       */
+#define OS_MBOX_POST_EN           1u   /*     Include code for OSMboxPost()                            */
+#define OS_MBOX_POST_OPT_EN       1u   /*     Include code for OSMboxPostOpt()                         */
+#define OS_MBOX_QUERY_EN          1u   /*     Include code for OSMboxQuery()                           */
+
+
+                                       /* --------------------- MEMORY MANAGEMENT -------------------- */
+#define OS_MEM_EN                 1u   /* Enable (1) or Disable (0) code generation for MEMORY MANAGER */
+#define OS_MEM_NAME_EN            1u   /*     Enable memory partition names                            */
+#define OS_MEM_QUERY_EN           1u   /*     Include code for OSMemQuery()                            */
+
+
+                                       /* ---------------- MUTUAL EXCLUSION SEMAPHORES --------------- */
+#define OS_MUTEX_EN               1u   /* Enable (1) or Disable (0) code generation for MUTEX          */
+#define OS_MUTEX_ACCEPT_EN        1u   /*     Include code for OSMutexAccept()                         */
+#define OS_MUTEX_DEL_EN           1u   /*     Include code for OSMutexDel()                            */
+#define OS_MUTEX_QUERY_EN         1u   /*     Include code for OSMutexQuery()                          */
+
+
+                                       /* ---------------------- MESSAGE QUEUES ---------------------- */
+#define OS_Q_EN                   1u   /* Enable (1) or Disable (0) code generation for QUEUES         */
+#define OS_Q_ACCEPT_EN            1u   /*     Include code for OSQAccept()                             */
+#define OS_Q_DEL_EN               1u   /*     Include code for OSQDel()                                */
+#define OS_Q_FLUSH_EN             1u   /*     Include code for OSQFlush()                              */
+#define OS_Q_PEND_ABORT_EN        1u   /*     Include code for OSQPendAbort()                          */
+#define OS_Q_POST_EN              1u   /*     Include code for OSQPost()                               */
+#define OS_Q_POST_FRONT_EN        1u   /*     Include code for OSQPostFront()                          */
+#define OS_Q_POST_OPT_EN          1u   /*     Include code for OSQPostOpt()                            */
+#define OS_Q_QUERY_EN             1u   /*     Include code for OSQQuery()                              */
+
+
+                                       /* ------------------------ SEMAPHORES ------------------------ */
+#define OS_SEM_EN                 1u   /* Enable (1) or Disable (0) code generation for SEMAPHORES     */
+#define OS_SEM_ACCEPT_EN          1u   /*    Include code for OSSemAccept()                            */
+#define OS_SEM_DEL_EN             1u   /*    Include code for OSSemDel()                               */
+#define OS_SEM_PEND_ABORT_EN      1u   /*    Include code for OSSemPendAbort()                         */
+#define OS_SEM_QUERY_EN           1u   /*    Include code for OSSemQuery()                             */
+#define OS_SEM_SET_EN             1u   /*    Include code for OSSemSet()                               */
+
+
+                                       /* --------------------- TIME MANAGEMENT ---------------------- */
+#define OS_TIME_DLY_HMSM_EN       1u   /*     Include code for OSTimeDlyHMSM()                         */
+#define OS_TIME_DLY_RESUME_EN     1u   /*     Include code for OSTimeDlyResume()                       */
+#define OS_TIME_GET_SET_EN        1u   /*     Include code for OSTimeGet() and OSTimeSet()             */
+#define OS_TIME_TICK_HOOK_EN      1u   /*     Include code for OSTimeTickHook()                        */
+
+
+                                       /* --------------------- TIMER MANAGEMENT --------------------- */
+#define OS_TMR_EN                 1u   /* Enable (1) or Disable (0) code generation for TIMERS         */
+#define OS_TMR_CFG_MAX           16u   /*     Maximum number of timers                                 */
+#define OS_TMR_CFG_NAME_EN        1u   /*     Determine timer names                                    */
+#define OS_TMR_CFG_WHEEL_SIZE     7u   /*     Size of timer wheel (#Spokes)                            */
+#define OS_TMR_CFG_TICKS_PER_SEC 10u   /*     Rate at which timer management task runs (Hz)            */
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_core.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_core.c
new file mode 100644
index 0000000..76ff0b3
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_core.c
@@ -0,0 +1,2092 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                             CORE FUNCTIONS
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_CORE.C
+* By      : Jean J. Labrosse
+* Version : V2.92.10
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#ifndef  OS_MASTER_FILE
+#define  OS_GLOBALS
+#include 
+#endif
+
+/*
+*********************************************************************************************************
+*                                      PRIORITY RESOLUTION TABLE
+*
+* Note: Index into table is bit pattern to resolve highest priority
+*       Indexed value corresponds to highest priority bit position (i.e. 0..7)
+*********************************************************************************************************
+*/
+
+INT8U  const  OSUnMapTbl[256] = {
+    0u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x00 to 0x0F                   */
+    4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x10 to 0x1F                   */
+    5u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x20 to 0x2F                   */
+    4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x30 to 0x3F                   */
+    6u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x40 to 0x4F                   */
+    4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x50 to 0x5F                   */
+    5u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x60 to 0x6F                   */
+    4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x70 to 0x7F                   */
+    7u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x80 to 0x8F                   */
+    4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x90 to 0x9F                   */
+    5u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0xA0 to 0xAF                   */
+    4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0xB0 to 0xBF                   */
+    6u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0xC0 to 0xCF                   */
+    4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0xD0 to 0xDF                   */
+    5u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0xE0 to 0xEF                   */
+    4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u  /* 0xF0 to 0xFF                   */
+};
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void  OS_InitEventList(void);
+
+static  void  OS_InitMisc(void);
+
+static  void  OS_InitRdyList(void);
+
+static  void  OS_InitTaskIdle(void);
+
+#if OS_TASK_STAT_EN > 0u
+static  void  OS_InitTaskStat(void);
+#endif
+
+static  void  OS_InitTCBList(void);
+
+static  void  OS_SchedNew(void);
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                        GET THE NAME OF A SEMAPHORE, MUTEX, MAILBOX or QUEUE
+*
+* Description: This function is used to obtain the name assigned to a semaphore, mutex, mailbox or queue.
+*
+* Arguments  : pevent    is a pointer to the event group.  'pevent' can point either to a semaphore,
+*                        a mutex, a mailbox or a queue.  Where this function is concerned, the actual
+*                        type is irrelevant.
+*
+*              pname     is a pointer to a pointer to an ASCII string that will receive the name of the semaphore,
+*                        mutex, mailbox or queue.
+*
+*              perr      is a pointer to an error code that can contain one of the following values:
+*
+*                        OS_ERR_NONE                if the name was copied to 'pname'
+*                        OS_ERR_EVENT_TYPE          if 'pevent' is not pointing to the proper event
+*                                                   control block type.
+*                        OS_ERR_PNAME_NULL          You passed a NULL pointer for 'pname'
+*                        OS_ERR_PEVENT_NULL         if you passed a NULL pointer for 'pevent'
+*                        OS_ERR_NAME_GET_ISR        if you are trying to call this function from an ISR
+*
+* Returns    : The length of the string or 0 if the 'pevent' is a NULL pointer.
+*********************************************************************************************************
+*/
+
+#if (OS_EVENT_EN) && (OS_EVENT_NAME_EN > 0u)
+INT8U  OSEventNameGet (OS_EVENT   *pevent,
+                       INT8U     **pname,
+                       INT8U      *perr)
+{
+    INT8U      len;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {               /* Is 'pevent' a NULL pointer?                        */
+        *perr = OS_ERR_PEVENT_NULL;
+        return (0u);
+    }
+    if (pname == (INT8U **)0) {                   /* Is 'pname' a NULL pointer?                         */
+        *perr = OS_ERR_PNAME_NULL;
+        return (0u);
+    }
+#endif
+    if (OSIntNesting > 0u) {                     /* See if trying to call from an ISR                  */
+        *perr  = OS_ERR_NAME_GET_ISR;
+        return (0u);
+    }
+    switch (pevent->OSEventType) {
+        case OS_EVENT_TYPE_SEM:
+        case OS_EVENT_TYPE_MUTEX:
+        case OS_EVENT_TYPE_MBOX:
+        case OS_EVENT_TYPE_Q:
+             break;
+
+        default:
+             *perr = OS_ERR_EVENT_TYPE;
+             return (0u);
+    }
+    OS_ENTER_CRITICAL();
+    *pname = pevent->OSEventName;
+    len    = OS_StrLen(*pname);
+    OS_EXIT_CRITICAL();
+    *perr  = OS_ERR_NONE;
+    return (len);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                        ASSIGN A NAME TO A SEMAPHORE, MUTEX, MAILBOX or QUEUE
+*
+* Description: This function assigns a name to a semaphore, mutex, mailbox or queue.
+*
+* Arguments  : pevent    is a pointer to the event group.  'pevent' can point either to a semaphore,
+*                        a mutex, a mailbox or a queue.  Where this function is concerned, it doesn't
+*                        matter the actual type.
+*
+*              pname     is a pointer to an ASCII string that will be used as the name of the semaphore,
+*                        mutex, mailbox or queue.
+*
+*              perr      is a pointer to an error code that can contain one of the following values:
+*
+*                        OS_ERR_NONE                if the requested task is resumed
+*                        OS_ERR_EVENT_TYPE          if 'pevent' is not pointing to the proper event
+*                                                   control block type.
+*                        OS_ERR_PNAME_NULL          You passed a NULL pointer for 'pname'
+*                        OS_ERR_PEVENT_NULL         if you passed a NULL pointer for 'pevent'
+*                        OS_ERR_NAME_SET_ISR        if you called this function from an ISR
+*
+* Returns    : None
+*********************************************************************************************************
+*/
+
+#if (OS_EVENT_EN) && (OS_EVENT_NAME_EN > 0u)
+void  OSEventNameSet (OS_EVENT  *pevent,
+                      INT8U     *pname,
+                      INT8U     *perr)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {               /* Is 'pevent' a NULL pointer?                        */
+        *perr = OS_ERR_PEVENT_NULL;
+        return;
+    }
+    if (pname == (INT8U *)0) {                   /* Is 'pname' a NULL pointer?                         */
+        *perr = OS_ERR_PNAME_NULL;
+        return;
+    }
+#endif
+    if (OSIntNesting > 0u) {                     /* See if trying to call from an ISR                  */
+        *perr = OS_ERR_NAME_SET_ISR;
+        return;
+    }
+    switch (pevent->OSEventType) {
+        case OS_EVENT_TYPE_SEM:
+        case OS_EVENT_TYPE_MUTEX:
+        case OS_EVENT_TYPE_MBOX:
+        case OS_EVENT_TYPE_Q:
+             break;
+
+        default:
+             *perr = OS_ERR_EVENT_TYPE;
+             return;
+    }
+    OS_ENTER_CRITICAL();
+    pevent->OSEventName = pname;
+    OS_EXIT_CRITICAL();
+    *perr = OS_ERR_NONE;
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       PEND ON MULTIPLE EVENTS
+*
+* Description: This function waits for multiple events.  If multiple events are ready at the start of the
+*              pend call, then all available events are returned as ready.  If the task must pend on the
+*              multiple events, then only the first posted or aborted event is returned as ready.
+*
+* Arguments  : pevents_pend  is a pointer to a NULL-terminated array of event control blocks to wait for.
+*
+*              pevents_rdy   is a pointer to an array to return which event control blocks are available
+*                            or ready.  The size of the array MUST be greater than or equal to the size
+*                            of the 'pevents_pend' array, including terminating NULL.
+*
+*              pmsgs_rdy     is a pointer to an array to return messages from any available message-type
+*                            events.  The size of the array MUST be greater than or equal to the size of
+*                            the 'pevents_pend' array, excluding the terminating NULL.  Since NULL
+*                            messages are valid messages, this array cannot be NULL-terminated.  Instead,
+*                            every available message-type event returns its messages in the 'pmsgs_rdy'
+*                            array at the same index as the event is returned in the 'pevents_rdy' array.
+*                            All other 'pmsgs_rdy' array indices are filled with NULL messages.
+*
+*              timeout       is an optional timeout period (in clock ticks).  If non-zero, your task will
+*                            wait for the resources up to the amount of time specified by this argument.
+*                            If you specify 0, however, your task will wait forever for the specified
+*                            events or, until the resources becomes available (or the events occur).
+*
+*              perr          is a pointer to where an error message will be deposited.  Possible error
+*                            messages are:
+*
+*                            OS_ERR_NONE         The call was successful and your task owns the resources
+*                                                or, the events you are waiting for occurred; check the
+*                                                'pevents_rdy' array for which events are available.
+*                            OS_ERR_PEND_ABORT   The wait on the events was aborted; check the
+*                                                'pevents_rdy' array for which events were aborted.
+*                            OS_ERR_TIMEOUT      The events were not received within the specified
+*                                                'timeout'.
+*                            OS_ERR_PEVENT_NULL  If 'pevents_pend', 'pevents_rdy', or 'pmsgs_rdy' is a
+*                                                NULL pointer.
+*                            OS_ERR_EVENT_TYPE   If you didn't pass a pointer to an array of semaphores,
+*                                                mailboxes, and/or queues.
+*                            OS_ERR_PEND_ISR     If you called this function from an ISR and the result
+*                                                would lead to a suspension.
+*                            OS_ERR_PEND_LOCKED  If you called this function when the scheduler is locked.
+*
+* Returns    : >  0          the number of events returned as ready or aborted.
+*              == 0          if no events are returned as ready because of timeout or upon error.
+*
+* Notes      : 1) a. Validate 'pevents_pend' array as valid OS_EVENTs :
+*
+*                        semaphores, mailboxes, queues
+*
+*                 b. Return ALL available events and messages, if any
+*
+*                 c. Add    current task priority as pending to   each events's wait list
+*                      Performed in OS_EventTaskWaitMulti()
+*
+*                 d. Wait on any of multiple events
+*
+*                 e. Remove current task priority as pending from each events's wait list
+*                      Performed in OS_EventTaskRdy(), if events posted or aborted
+*
+*                 f. Return any event posted or aborted, if any
+*                      else
+*                    Return timeout
+*
+*              2) 'pevents_rdy' initialized to NULL PRIOR to all other validation or function handling in
+*                 case of any error(s).
+*********************************************************************************************************
+*/
+/*$PAGE*/
+#if ((OS_EVENT_EN) && (OS_EVENT_MULTI_EN > 0u))
+INT16U  OSEventPendMulti (OS_EVENT  **pevents_pend,
+                          OS_EVENT  **pevents_rdy,
+                          void      **pmsgs_rdy,
+                          INT32U      timeout,
+                          INT8U      *perr)
+{
+    OS_EVENT  **pevents;
+    OS_EVENT   *pevent;
+#if ((OS_Q_EN > 0u) && (OS_MAX_QS > 0u))
+    OS_Q       *pq;
+#endif
+    BOOLEAN     events_rdy;
+    INT16U      events_rdy_nbr;
+    INT8U       events_stat;
+#if (OS_CRITICAL_METHOD == 3u)                          /* Allocate storage for CPU status register    */
+    OS_CPU_SR   cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_ARG_CHK_EN > 0u)
+    if (pevents_pend == (OS_EVENT **)0) {               /* Validate 'pevents_pend'                     */
+       *perr =  OS_ERR_PEVENT_NULL;
+        return (0u);
+    }
+    if (*pevents_pend  == (OS_EVENT *)0) {              /* Validate 'pevents_pend'                     */
+       *perr =  OS_ERR_PEVENT_NULL;
+        return (0u);
+    }
+    if (pevents_rdy  == (OS_EVENT **)0) {               /* Validate 'pevents_rdy'                      */
+       *perr =  OS_ERR_PEVENT_NULL;
+        return (0u);
+    }
+    if (pmsgs_rdy == (void **)0) {                      /* Validate 'pmsgs_rdy'                        */
+       *perr =  OS_ERR_PEVENT_NULL;
+        return (0u);
+    }
+#endif
+
+   *pevents_rdy = (OS_EVENT *)0;                        /* Init array to NULL in case of errors        */
+
+    pevents     =  pevents_pend;
+    pevent      = *pevents;
+    while  (pevent != (OS_EVENT *)0) {
+        switch (pevent->OSEventType) {                  /* Validate event block types                  */
+#if (OS_SEM_EN  > 0u)
+            case OS_EVENT_TYPE_SEM:
+                 break;
+#endif
+#if (OS_MBOX_EN > 0u)
+            case OS_EVENT_TYPE_MBOX:
+                 break;
+#endif
+#if ((OS_Q_EN   > 0u) && (OS_MAX_QS > 0u))
+            case OS_EVENT_TYPE_Q:
+                 break;
+#endif
+
+            case OS_EVENT_TYPE_MUTEX:
+            case OS_EVENT_TYPE_FLAG:
+            default:
+                *perr = OS_ERR_EVENT_TYPE;
+                 return (0u);
+        }
+        pevents++;
+        pevent = *pevents;
+    }
+
+    if (OSIntNesting  > 0u) {                           /* See if called from ISR ...                  */
+       *perr =  OS_ERR_PEND_ISR;                        /* ... can't PEND from an ISR                  */
+        return (0u);
+    }
+    if (OSLockNesting > 0u) {                           /* See if called with scheduler locked ...     */
+       *perr =  OS_ERR_PEND_LOCKED;                     /* ... can't PEND when locked                  */
+        return (0u);
+    }
+
+/*$PAGE*/
+    events_rdy     =  OS_FALSE;
+    events_rdy_nbr =  0u;
+    events_stat    =  OS_STAT_RDY;
+    pevents        =  pevents_pend;
+    pevent         = *pevents;
+    OS_ENTER_CRITICAL();
+    while (pevent != (OS_EVENT *)0) {                   /* See if any events already available         */
+        switch (pevent->OSEventType) {
+#if (OS_SEM_EN > 0u)
+            case OS_EVENT_TYPE_SEM:
+                 if (pevent->OSEventCnt > 0u) {         /* If semaphore count > 0, resource available; */
+                     pevent->OSEventCnt--;              /* ... decrement semaphore,                ... */
+                    *pevents_rdy++ =  pevent;           /* ... and return available semaphore event    */
+                      events_rdy   =  OS_TRUE;
+                    *pmsgs_rdy++   = (void *)0;         /* NO message returned  for semaphores         */
+                      events_rdy_nbr++;
+
+                 } else {
+                      events_stat |=  OS_STAT_SEM;      /* Configure multi-pend for semaphore events   */
+                 }
+                 break;
+#endif
+
+#if (OS_MBOX_EN > 0u)
+            case OS_EVENT_TYPE_MBOX:
+                 if (pevent->OSEventPtr != (void *)0) { /* If mailbox NOT empty;                   ... */
+                                                        /* ... return available message,           ... */
+                    *pmsgs_rdy++         = (void *)pevent->OSEventPtr;
+                     pevent->OSEventPtr  = (void *)0;
+                    *pevents_rdy++       =  pevent;     /* ... and return available mailbox event      */
+                      events_rdy         =  OS_TRUE;
+                      events_rdy_nbr++;
+
+                 } else {
+                      events_stat |= OS_STAT_MBOX;      /* Configure multi-pend for mailbox events     */
+                 }
+                 break;
+#endif
+
+#if ((OS_Q_EN > 0u) && (OS_MAX_QS > 0u))
+            case OS_EVENT_TYPE_Q:
+                 pq = (OS_Q *)pevent->OSEventPtr;
+                 if (pq->OSQEntries > 0u) {             /* If queue NOT empty;                     ... */
+                                                        /* ... return available message,           ... */
+                    *pmsgs_rdy++ = (void *)*pq->OSQOut++;
+                     if (pq->OSQOut == pq->OSQEnd) {    /* If OUT ptr at queue end, ...                */
+                         pq->OSQOut  = pq->OSQStart;    /* ... wrap   to queue start                   */
+                     }
+                     pq->OSQEntries--;                  /* Update number of queue entries              */
+                    *pevents_rdy++ = pevent;            /* ... and return available queue event        */
+                      events_rdy   = OS_TRUE;
+                      events_rdy_nbr++;
+
+                 } else {
+                      events_stat |= OS_STAT_Q;         /* Configure multi-pend for queue events       */
+                 }
+                 break;
+#endif
+
+            case OS_EVENT_TYPE_MUTEX:
+            case OS_EVENT_TYPE_FLAG:
+            default:
+                 OS_EXIT_CRITICAL();
+                *pevents_rdy = (OS_EVENT *)0;           /* NULL terminate return event array           */
+                *perr        =  OS_ERR_EVENT_TYPE;
+                 return (events_rdy_nbr);
+        }
+        pevents++;
+        pevent = *pevents;
+    }
+
+    if ( events_rdy == OS_TRUE) {                       /* Return any events already available         */
+       *pevents_rdy = (OS_EVENT *)0;                    /* NULL terminate return event array           */
+        OS_EXIT_CRITICAL();
+       *perr        =  OS_ERR_NONE;
+        return (events_rdy_nbr);
+    }
+/*$PAGE*/
+                                                        /* Otherwise, must wait until any event occurs */
+    OSTCBCur->OSTCBStat     |= events_stat  |           /* Resource not available, ...                 */
+                               OS_STAT_MULTI;           /* ... pend on multiple events                 */
+    OSTCBCur->OSTCBStatPend  = OS_STAT_PEND_OK;
+    OSTCBCur->OSTCBDly       = timeout;                 /* Store pend timeout in TCB                   */
+    OS_EventTaskWaitMulti(pevents_pend);                /* Suspend task until events or timeout occurs */
+
+    OS_EXIT_CRITICAL();
+    OS_Sched();                                         /* Find next highest priority task ready       */
+    OS_ENTER_CRITICAL();
+
+    switch (OSTCBCur->OSTCBStatPend) {                  /* Handle event posted, aborted, or timed-out  */
+        case OS_STAT_PEND_OK:
+        case OS_STAT_PEND_ABORT:
+             pevent = OSTCBCur->OSTCBEventPtr;
+             if (pevent != (OS_EVENT *)0) {             /* If task event ptr != NULL, ...              */
+                *pevents_rdy++   =  pevent;             /* ... return available event ...              */
+                *pevents_rdy     = (OS_EVENT *)0;       /* ... & NULL terminate return event array     */
+                  events_rdy_nbr =  1;
+
+             } else {                                   /* Else NO event available, handle as timeout  */
+                 OSTCBCur->OSTCBStatPend = OS_STAT_PEND_TO;
+                 OS_EventTaskRemoveMulti(OSTCBCur, pevents_pend);
+             }
+             break;
+
+        case OS_STAT_PEND_TO:                           /* If events timed out, ...                    */
+        default:                                        /* ... remove task from events' wait lists     */
+             OS_EventTaskRemoveMulti(OSTCBCur, pevents_pend);
+             break;
+    }
+
+    switch (OSTCBCur->OSTCBStatPend) {
+        case OS_STAT_PEND_OK:
+             switch (pevent->OSEventType) {             /* Return event's message                      */
+#if (OS_SEM_EN > 0u)
+                 case OS_EVENT_TYPE_SEM:
+                     *pmsgs_rdy++ = (void *)0;          /* NO message returned for semaphores          */
+                      break;
+#endif
+
+#if ((OS_MBOX_EN > 0u) ||                 \
+    ((OS_Q_EN    > 0u) && (OS_MAX_QS > 0u)))
+                 case OS_EVENT_TYPE_MBOX:
+                 case OS_EVENT_TYPE_Q:
+                     *pmsgs_rdy++ = (void *)OSTCBCur->OSTCBMsg;     /* Return received message         */
+                      break;
+#endif
+
+                 case OS_EVENT_TYPE_MUTEX:
+                 case OS_EVENT_TYPE_FLAG:
+                 default:
+                      OS_EXIT_CRITICAL();
+                     *pevents_rdy = (OS_EVENT *)0;      /* NULL terminate return event array           */
+                     *perr        =  OS_ERR_EVENT_TYPE;
+                      return (events_rdy_nbr);
+             }
+            *perr = OS_ERR_NONE;
+             break;
+
+        case OS_STAT_PEND_ABORT:
+            *pmsgs_rdy++ = (void *)0;                   /* NO message returned for abort               */
+            *perr        =  OS_ERR_PEND_ABORT;          /* Indicate that event  aborted                */
+             break;
+
+        case OS_STAT_PEND_TO:
+        default:
+            *pmsgs_rdy++ = (void *)0;                   /* NO message returned for timeout             */
+            *perr        =  OS_ERR_TIMEOUT;             /* Indicate that events timed out              */
+             break;
+    }
+
+    OSTCBCur->OSTCBStat          =  OS_STAT_RDY;        /* Set   task  status to ready                 */
+    OSTCBCur->OSTCBStatPend      =  OS_STAT_PEND_OK;    /* Clear pend  status                          */
+    OSTCBCur->OSTCBEventPtr      = (OS_EVENT  *)0;      /* Clear event pointers                        */
+    OSTCBCur->OSTCBEventMultiPtr = (OS_EVENT **)0;
+#if ((OS_MBOX_EN > 0u) ||                 \
+    ((OS_Q_EN    > 0u) && (OS_MAX_QS > 0u)))
+    OSTCBCur->OSTCBMsg           = (void      *)0;      /* Clear task  message                         */
+#endif
+    OS_EXIT_CRITICAL();
+
+    return (events_rdy_nbr);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           INITIALIZATION
+*
+* Description: This function is used to initialize the internals of uC/OS-II and MUST be called prior to
+*              creating any uC/OS-II object and, prior to calling OSStart().
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+void  OSInit (void)
+{
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+    INT8U  err;
+#endif
+#endif
+
+    OSInitHookBegin();                                           /* Call port specific initialization code   */
+
+    OS_InitMisc();                                               /* Initialize miscellaneous variables       */
+
+    OS_InitRdyList();                                            /* Initialize the Ready List                */
+
+    OS_InitTCBList();                                            /* Initialize the free list of OS_TCBs      */
+
+    OS_InitEventList();                                          /* Initialize the free list of OS_EVENTs    */
+
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+    OS_FlagInit();                                               /* Initialize the event flag structures     */
+#endif
+
+#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u)
+    OS_MemInit();                                                /* Initialize the memory manager            */
+#endif
+
+#if (OS_Q_EN > 0u) && (OS_MAX_QS > 0u)
+    OS_QInit();                                                  /* Initialize the message queue structures  */
+#endif
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+    OS_TLS_Init(&err);                                           /* Initialize TLS, before creating tasks    */
+    if (err != OS_ERR_NONE) {
+        return;
+    }
+#endif
+#endif
+
+    OS_InitTaskIdle();                                           /* Create the Idle Task                     */
+#if OS_TASK_STAT_EN > 0u
+    OS_InitTaskStat();                                           /* Create the Statistic Task                */
+#endif
+
+#if OS_TMR_EN > 0u
+    OSTmr_Init();                                                /* Initialize the Timer Manager             */
+#endif
+
+    OSInitHookEnd();                                             /* Call port specific init. code            */
+
+#if OS_DEBUG_EN > 0u
+    OSDebugInit();
+#endif
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                              ENTER ISR
+*
+* Description: This function is used to notify uC/OS-II that you are about to service an interrupt
+*              service routine (ISR).  This allows uC/OS-II to keep track of interrupt nesting and thus
+*              only perform rescheduling at the last nested ISR.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Notes      : 1) This function should be called with interrupts already disabled
+*              2) Your ISR can directly increment OSIntNesting without calling this function because
+*                 OSIntNesting has been declared 'global'.
+*              3) You MUST still call OSIntExit() even though you increment OSIntNesting directly.
+*              4) You MUST invoke OSIntEnter() and OSIntExit() in pair.  In other words, for every call
+*                 to OSIntEnter() at the beginning of the ISR you MUST have a call to OSIntExit() at the
+*                 end of the ISR.
+*              5) You are allowed to nest interrupts up to 255 levels deep.
+*              6) I removed the OS_ENTER_CRITICAL() and OS_EXIT_CRITICAL() around the increment because
+*                 OSIntEnter() is always called with interrupts disabled.
+*********************************************************************************************************
+*/
+
+void  OSIntEnter (void)
+{
+    if (OSRunning == OS_TRUE) {
+        if (OSIntNesting < 255u) {
+            OSIntNesting++;                      /* Increment ISR nesting level                        */
+        }
+    }
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                              EXIT ISR
+*
+* Description: This function is used to notify uC/OS-II that you have completed servicing an ISR.  When
+*              the last nested ISR has completed, uC/OS-II will call the scheduler to determine whether
+*              a new, high-priority task, is ready to run.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Notes      : 1) You MUST invoke OSIntEnter() and OSIntExit() in pair.  In other words, for every call
+*                 to OSIntEnter() at the beginning of the ISR you MUST have a call to OSIntExit() at the
+*                 end of the ISR.
+*              2) Rescheduling is prevented when the scheduler is locked (see OS_SchedLock())
+*********************************************************************************************************
+*/
+
+void  OSIntExit (void)
+{
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    if (OSRunning == OS_TRUE) {
+        OS_ENTER_CRITICAL();
+        if (OSIntNesting > 0u) {                           /* Prevent OSIntNesting from wrapping       */
+            OSIntNesting--;
+        }
+        if (OSIntNesting == 0u) {                          /* Reschedule only if all ISRs complete ... */
+            if (OSLockNesting == 0u) {                     /* ... and not locked.                      */
+                OS_SchedNew();
+                OSTCBHighRdy = OSTCBPrioTbl[OSPrioHighRdy];
+                if (OSPrioHighRdy != OSPrioCur) {          /* No Ctx Sw if current task is highest rdy */
+#if OS_TASK_PROFILE_EN > 0u
+                    OSTCBHighRdy->OSTCBCtxSwCtr++;         /* Inc. # of context switches to this task  */
+#endif
+                    OSCtxSwCtr++;                          /* Keep track of the number of ctx switches */
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+                    OS_TLS_TaskSw();
+#endif
+#endif
+
+                    OSIntCtxSw();                          /* Perform interrupt level ctx switch       */
+                }
+            }
+        }
+        OS_EXIT_CRITICAL();
+    }
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                         INDICATE THAT IT'S NO LONGER SAFE TO CREATE OBJECTS
+*
+* Description: This function is called by the application code to indicate that all initialization has
+*              been completed and that kernel objects are no longer allowed to be created.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : 1) You should call this function when you no longer want to allow application code to
+*                 create kernel objects.
+*              2) You need to define the macro 'OS_SAFETY_CRITICAL_IEC61508'
+*********************************************************************************************************
+*/
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+void  OSSafetyCriticalStart (void)
+{
+    OSSafetyCriticalStartFlag = OS_TRUE;
+}
+
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         PREVENT SCHEDULING
+*
+* Description: This function is used to prevent rescheduling to take place.  This allows your application
+*              to prevent context switches until you are ready to permit context switching.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Notes      : 1) You MUST invoke OSSchedLock() and OSSchedUnlock() in pair.  In other words, for every
+*                 call to OSSchedLock() you MUST have a call to OSSchedUnlock().
+*********************************************************************************************************
+*/
+
+#if OS_SCHED_LOCK_EN > 0u
+void  OSSchedLock (void)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    if (OSRunning == OS_TRUE) {                  /* Make sure multitasking is running                  */
+        OS_ENTER_CRITICAL();
+        if (OSIntNesting == 0u) {                /* Can't call from an ISR                             */
+            if (OSLockNesting < 255u) {          /* Prevent OSLockNesting from wrapping back to 0      */
+                OSLockNesting++;                 /* Increment lock nesting level                       */
+            }
+        }
+        OS_EXIT_CRITICAL();
+    }
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          ENABLE SCHEDULING
+*
+* Description: This function is used to re-allow rescheduling.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Notes      : 1) You MUST invoke OSSchedLock() and OSSchedUnlock() in pair.  In other words, for every
+*                 call to OSSchedLock() you MUST have a call to OSSchedUnlock().
+*********************************************************************************************************
+*/
+
+#if OS_SCHED_LOCK_EN > 0u
+void  OSSchedUnlock (void)
+{
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    if (OSRunning == OS_TRUE) {                            /* Make sure multitasking is running        */
+        OS_ENTER_CRITICAL();
+        if (OSIntNesting == 0u) {                          /* Can't call from an ISR                   */
+            if (OSLockNesting > 0u) {                      /* Do not decrement if already 0            */
+                OSLockNesting--;                           /* Decrement lock nesting level             */
+                if (OSLockNesting == 0u) {                 /* See if scheduler is enabled              */
+                    OS_EXIT_CRITICAL();
+                    OS_Sched();                            /* See if a HPT is ready                    */
+                } else {
+                    OS_EXIT_CRITICAL();
+                }
+            } else {
+                OS_EXIT_CRITICAL();
+            }
+        } else {
+            OS_EXIT_CRITICAL();
+        }
+    }
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         START MULTITASKING
+*
+* Description: This function is used to start the multitasking process which lets uC/OS-II manages the
+*              task that you have created.  Before you can call OSStart(), you MUST have called OSInit()
+*              and you MUST have created at least one task.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note       : OSStartHighRdy() MUST:
+*                 a) Call OSTaskSwHook() then,
+*                 b) Set OSRunning to OS_TRUE.
+*                 c) Load the context of the task pointed to by OSTCBHighRdy.
+*                 d_ Execute the task.
+*********************************************************************************************************
+*/
+
+void  OSStart (void)
+{
+    if (OSRunning == OS_FALSE) {
+        OS_SchedNew();                               /* Find highest priority's task priority number   */
+        OSPrioCur     = OSPrioHighRdy;
+        OSTCBHighRdy  = OSTCBPrioTbl[OSPrioHighRdy]; /* Point to highest priority task ready to run    */
+        OSTCBCur      = OSTCBHighRdy;
+        OSStartHighRdy();                            /* Execute target specific code to start task     */
+    }
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                      STATISTICS INITIALIZATION
+*
+* Description: This function is called by your application to establish CPU usage by first determining
+*              how high a 32-bit counter would count to in 1 second if no other tasks were to execute
+*              during that time.  CPU usage is then determined by a low priority task which keeps track
+*              of this 32-bit counter every second but this time, with other tasks running.  CPU usage is
+*              determined by:
+*
+*                                             OSIdleCtr
+*                 CPU Usage (%) = 100 * (1 - ------------)
+*                                            OSIdleCtrMax
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if OS_TASK_STAT_EN > 0u
+void  OSStatInit (void)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    OSTimeDly(2u);                               /* Synchronize with clock tick                        */
+    OS_ENTER_CRITICAL();
+    OSIdleCtr    = 0uL;                          /* Clear idle counter                                 */
+    OS_EXIT_CRITICAL();
+    OSTimeDly(OS_TICKS_PER_SEC / 10u);           /* Determine MAX. idle counter value for 1/10 second  */
+    OS_ENTER_CRITICAL();
+    OSIdleCtrMax = OSIdleCtr;                    /* Store maximum idle counter count in 1/10 second    */
+    OSStatRdy    = OS_TRUE;
+    OS_EXIT_CRITICAL();
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         PROCESS SYSTEM TICK
+*
+* Description: This function is used to signal to uC/OS-II the occurrence of a 'system tick' (also known
+*              as a 'clock tick').  This function should be called by the ticker ISR but, can also be
+*              called by a high priority task.
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+void  OSTimeTick (void)
+{
+    OS_TCB    *ptcb;
+#if OS_TICK_STEP_EN > 0u
+    BOOLEAN    step;
+#endif
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register     */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_TIME_TICK_HOOK_EN > 0u
+    OSTimeTickHook();                                      /* Call user definable hook                     */
+#endif
+#if OS_TIME_GET_SET_EN > 0u
+    OS_ENTER_CRITICAL();                                   /* Update the 32-bit tick counter               */
+    OSTime++;
+    OS_EXIT_CRITICAL();
+#endif
+    if (OSRunning == OS_TRUE) {
+#if OS_TICK_STEP_EN > 0u
+        switch (OSTickStepState) {                         /* Determine whether we need to process a tick  */
+            case OS_TICK_STEP_DIS:                         /* Yes, stepping is disabled                    */
+                 step = OS_TRUE;
+                 break;
+
+            case OS_TICK_STEP_WAIT:                        /* No,  waiting for uC/OS-View to set ...       */
+                 step = OS_FALSE;                          /*      .. OSTickStepState to OS_TICK_STEP_ONCE */
+                 break;
+
+            case OS_TICK_STEP_ONCE:                        /* Yes, process tick once and wait for next ... */
+                 step            = OS_TRUE;                /*      ... step command from uC/OS-View        */
+                 OSTickStepState = OS_TICK_STEP_WAIT;
+                 break;
+
+            default:                                       /* Invalid case, correct situation              */
+                 step            = OS_TRUE;
+                 OSTickStepState = OS_TICK_STEP_DIS;
+                 break;
+        }
+        if (step == OS_FALSE) {                            /* Return if waiting for step command           */
+            return;
+        }
+#endif
+        ptcb = OSTCBList;                                  /* Point at first TCB in TCB list               */
+        while (ptcb->OSTCBPrio != OS_TASK_IDLE_PRIO) {     /* Go through all TCBs in TCB list              */
+            OS_ENTER_CRITICAL();
+            if (ptcb->OSTCBDly != 0u) {                    /* No, Delayed or waiting for event with TO     */
+                ptcb->OSTCBDly--;                          /* Decrement nbr of ticks to end of delay       */
+                if (ptcb->OSTCBDly == 0u) {                /* Check for timeout                            */
+
+                    if ((ptcb->OSTCBStat & OS_STAT_PEND_ANY) != OS_STAT_RDY) {
+                        ptcb->OSTCBStat  &= (INT8U)~(INT8U)OS_STAT_PEND_ANY;          /* Yes, Clear status flag   */
+                        ptcb->OSTCBStatPend = OS_STAT_PEND_TO;                 /* Indicate PEND timeout    */
+                    } else {
+                        ptcb->OSTCBStatPend = OS_STAT_PEND_OK;
+                    }
+
+                    if ((ptcb->OSTCBStat & OS_STAT_SUSPEND) == OS_STAT_RDY) {  /* Is task suspended?       */
+                        OSRdyGrp               |= ptcb->OSTCBBitY;             /* No,  Make ready          */
+                        OSRdyTbl[ptcb->OSTCBY] |= ptcb->OSTCBBitX;
+                    }
+                }
+            }
+            ptcb = ptcb->OSTCBNext;                        /* Point at next TCB in TCB list                */
+            OS_EXIT_CRITICAL();
+        }
+    }
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             GET VERSION
+*
+* Description: This function is used to return the version number of uC/OS-II.  The returned value 
+*              corresponds to uC/OS-II's version number multiplied by 10000.  In other words, version 
+*              2.01.00 would be returned as 20100.
+*
+* Arguments  : none
+*
+* Returns    : The version number of uC/OS-II multiplied by 10000.
+*********************************************************************************************************
+*/
+
+INT16U  OSVersion (void)
+{
+    return (OS_VERSION);
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           DUMMY FUNCTION
+*
+* Description: This function doesn't do anything.  It is called by OSTaskDel().
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if OS_TASK_DEL_EN > 0u
+void  OS_Dummy (void)
+{
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                           MAKE TASK READY TO RUN BASED ON EVENT OCCURING
+*
+* Description: This function is called by other uC/OS-II services and is used to ready a task that was
+*              waiting for an event to occur.
+*
+* Arguments  : pevent      is a pointer to the event control block corresponding to the event.
+*
+*              pmsg        is a pointer to a message.  This pointer is used by message oriented services
+*                          such as MAILBOXEs and QUEUEs.  The pointer is not used when called by other
+*                          service functions.
+*
+*              msk         is a mask that is used to clear the status byte of the TCB.  For example,
+*                          OSSemPost() will pass OS_STAT_SEM, OSMboxPost() will pass OS_STAT_MBOX etc.
+*
+*              pend_stat   is used to indicate the readied task's pending status:
+*
+*                          OS_STAT_PEND_OK      Task ready due to a post (or delete), not a timeout or
+*                                               an abort.
+*                          OS_STAT_PEND_ABORT   Task ready due to an abort.
+*
+* Returns    : none
+*
+* Note       : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+#if (OS_EVENT_EN)
+INT8U  OS_EventTaskRdy (OS_EVENT  *pevent,
+                        void      *pmsg,
+                        INT8U      msk,
+                        INT8U      pend_stat)
+{
+    OS_TCB   *ptcb;
+    INT8U     y;
+    INT8U     x;
+    INT8U     prio;
+#if OS_LOWEST_PRIO > 63u
+    OS_PRIO  *ptbl;
+#endif
+
+
+#if OS_LOWEST_PRIO <= 63u
+    y    = OSUnMapTbl[pevent->OSEventGrp];              /* Find HPT waiting for message                */
+    x    = OSUnMapTbl[pevent->OSEventTbl[y]];
+    prio = (INT8U)((y << 3u) + x);                      /* Find priority of task getting the msg       */
+#else
+    if ((pevent->OSEventGrp & 0xFFu) != 0u) {           /* Find HPT waiting for message                */
+        y = OSUnMapTbl[ pevent->OSEventGrp & 0xFFu];
+    } else {
+        y = OSUnMapTbl[(OS_PRIO)(pevent->OSEventGrp >> 8u) & 0xFFu] + 8u;
+    }
+    ptbl = &pevent->OSEventTbl[y];
+    if ((*ptbl & 0xFFu) != 0u) {
+        x = OSUnMapTbl[*ptbl & 0xFFu];
+    } else {
+        x = OSUnMapTbl[(OS_PRIO)(*ptbl >> 8u) & 0xFFu] + 8u;
+    }
+    prio = (INT8U)((y << 4u) + x);                      /* Find priority of task getting the msg       */
+#endif
+
+    ptcb                  =  OSTCBPrioTbl[prio];        /* Point to this task's OS_TCB                 */
+    ptcb->OSTCBDly        =  0u;                        /* Prevent OSTimeTick() from readying task     */
+#if ((OS_Q_EN > 0u) && (OS_MAX_QS > 0u)) || (OS_MBOX_EN > 0u)
+    ptcb->OSTCBMsg        =  pmsg;                      /* Send message directly to waiting task       */
+#else
+    pmsg                  =  pmsg;                      /* Prevent compiler warning if not used        */
+#endif
+    ptcb->OSTCBStat      &= (INT8U)~msk;                /* Clear bit associated with event type        */
+    ptcb->OSTCBStatPend   =  pend_stat;                 /* Set pend status of post or abort            */
+                                                        /* See if task is ready (could be susp'd)      */
+    if ((ptcb->OSTCBStat &   OS_STAT_SUSPEND) == OS_STAT_RDY) {
+        OSRdyGrp         |=  ptcb->OSTCBBitY;           /* Put task in the ready to run list           */
+        OSRdyTbl[y]      |=  ptcb->OSTCBBitX;
+    }
+
+    OS_EventTaskRemove(ptcb, pevent);                   /* Remove this task from event   wait list     */
+#if (OS_EVENT_MULTI_EN > 0u)
+    if (ptcb->OSTCBEventMultiPtr != (OS_EVENT **)0) {   /* Remove this task from events' wait lists    */
+        OS_EventTaskRemoveMulti(ptcb, ptcb->OSTCBEventMultiPtr);
+        ptcb->OSTCBEventPtr       = (OS_EVENT  *)pevent;/* Return event as first multi-pend event ready*/
+    }
+#endif
+
+    return (prio);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                  MAKE TASK WAIT FOR EVENT TO OCCUR
+*
+* Description: This function is called by other uC/OS-II services to suspend a task because an event has
+*              not occurred.
+*
+* Arguments  : pevent   is a pointer to the event control block for which the task will be waiting for.
+*
+* Returns    : none
+*
+* Note       : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+#if (OS_EVENT_EN)
+void  OS_EventTaskWait (OS_EVENT *pevent)
+{
+    INT8U  y;
+
+
+    OSTCBCur->OSTCBEventPtr               = pevent;                 /* Store ptr to ECB in TCB         */
+
+    pevent->OSEventTbl[OSTCBCur->OSTCBY] |= OSTCBCur->OSTCBBitX;    /* Put task in waiting list        */
+    pevent->OSEventGrp                   |= OSTCBCur->OSTCBBitY;
+
+    y             =  OSTCBCur->OSTCBY;            /* Task no longer ready                              */
+    OSRdyTbl[y]  &= (OS_PRIO)~OSTCBCur->OSTCBBitX;
+    if (OSRdyTbl[y] == 0u) {                      /* Clear event grp bit if this was only task pending */
+        OSRdyGrp &= (OS_PRIO)~OSTCBCur->OSTCBBitY;
+    }
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                         MAKE TASK WAIT FOR ANY OF MULTIPLE EVENTS TO OCCUR
+*
+* Description: This function is called by other uC/OS-II services to suspend a task because any one of
+*              multiple events has not occurred.
+*
+* Arguments  : pevents_wait     is a pointer to an array of event control blocks, NULL-terminated, for
+*                               which the task will be waiting for.
+*
+* Returns    : none.
+*
+* Note       : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+#if ((OS_EVENT_EN) && (OS_EVENT_MULTI_EN > 0u))
+void  OS_EventTaskWaitMulti (OS_EVENT **pevents_wait)
+{
+    OS_EVENT **pevents;
+    OS_EVENT  *pevent;
+    INT8U      y;
+
+
+    OSTCBCur->OSTCBEventPtr      = (OS_EVENT  *)0;
+    OSTCBCur->OSTCBEventMultiPtr = (OS_EVENT **)pevents_wait;       /* Store ptr to ECBs in TCB        */
+
+    pevents =  pevents_wait;
+    pevent  = *pevents;
+    while (pevent != (OS_EVENT *)0) {                               /* Put task in waiting lists       */
+        pevent->OSEventTbl[OSTCBCur->OSTCBY] |= OSTCBCur->OSTCBBitX;
+        pevent->OSEventGrp                   |= OSTCBCur->OSTCBBitY;
+        pevents++;
+        pevent = *pevents;
+    }
+
+    y             =  OSTCBCur->OSTCBY;            /* Task no longer ready                              */
+    OSRdyTbl[y]  &= (OS_PRIO)~OSTCBCur->OSTCBBitX;
+    if (OSRdyTbl[y] == 0u) {                      /* Clear event grp bit if this was only task pending */
+        OSRdyGrp &= (OS_PRIO)~OSTCBCur->OSTCBBitY;
+    }
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                  REMOVE TASK FROM EVENT WAIT LIST
+*
+* Description: Remove a task from an event's wait list.
+*
+* Arguments  : ptcb     is a pointer to the task to remove.
+*
+*              pevent   is a pointer to the event control block.
+*
+* Returns    : none
+*
+* Note       : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+#if (OS_EVENT_EN)
+void  OS_EventTaskRemove (OS_TCB   *ptcb,
+                          OS_EVENT *pevent)
+{
+    INT8U  y;
+
+
+    y                       =  ptcb->OSTCBY;
+    pevent->OSEventTbl[y]  &= (OS_PRIO)~ptcb->OSTCBBitX;    /* Remove task from wait list              */
+    if (pevent->OSEventTbl[y] == 0u) {
+        pevent->OSEventGrp &= (OS_PRIO)~ptcb->OSTCBBitY;
+    }
+    ptcb->OSTCBEventPtr     = (OS_EVENT  *)0;               /* Unlink OS_EVENT from OS_TCB             */
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                             REMOVE TASK FROM MULTIPLE EVENTS WAIT LISTS
+*
+* Description: Remove a task from multiple events' wait lists.
+*
+* Arguments  : ptcb             is a pointer to the task to remove.
+*
+*              pevents_multi    is a pointer to the array of event control blocks, NULL-terminated.
+*
+* Returns    : none
+*
+* Note       : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+#if ((OS_EVENT_EN) && (OS_EVENT_MULTI_EN > 0u))
+void  OS_EventTaskRemoveMulti (OS_TCB    *ptcb,
+                               OS_EVENT **pevents_multi)
+{
+    OS_EVENT **pevents;
+    OS_EVENT  *pevent;
+    INT8U      y;
+    OS_PRIO    bity;
+    OS_PRIO    bitx;
+
+
+    y       =  ptcb->OSTCBY;
+    bity    =  ptcb->OSTCBBitY;
+    bitx    =  ptcb->OSTCBBitX;
+    pevents =  pevents_multi;
+    pevent  = *pevents;
+    while (pevent != (OS_EVENT *)0) {                   /* Remove task from all events' wait lists     */
+        pevent->OSEventTbl[y]  &= (OS_PRIO)~bitx;
+        if (pevent->OSEventTbl[y] == 0u) {
+            pevent->OSEventGrp &= (OS_PRIO)~bity;
+        }
+        pevents++;
+        pevent = *pevents;
+    }
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                             INITIALIZE EVENT CONTROL BLOCK'S WAIT LIST
+*
+* Description: This function is called by other uC/OS-II services to initialize the event wait list.
+*
+* Arguments  : pevent    is a pointer to the event control block allocated to the event.
+*
+* Returns    : none
+*
+* Note       : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+#if (OS_EVENT_EN)
+void  OS_EventWaitListInit (OS_EVENT *pevent)
+{
+    INT8U  i;
+
+
+    pevent->OSEventGrp = 0u;                     /* No task waiting on event                           */
+    for (i = 0u; i < OS_EVENT_TBL_SIZE; i++) {
+        pevent->OSEventTbl[i] = 0u;
+    }
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             INITIALIZATION
+*                           INITIALIZE THE FREE LIST OF EVENT CONTROL BLOCKS
+*
+* Description: This function is called by OSInit() to initialize the free list of event control blocks.
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+static  void  OS_InitEventList (void)
+{
+#if (OS_EVENT_EN) && (OS_MAX_EVENTS > 0u)
+#if (OS_MAX_EVENTS > 1u)
+    INT16U     ix;
+    INT16U     ix_next;
+    OS_EVENT  *pevent1;
+    OS_EVENT  *pevent2;
+
+
+    OS_MemClr((INT8U *)&OSEventTbl[0], sizeof(OSEventTbl)); /* Clear the event table                   */
+    for (ix = 0u; ix < (OS_MAX_EVENTS - 1u); ix++) {        /* Init. list of free EVENT control blocks */
+        ix_next = ix + 1u;
+        pevent1 = &OSEventTbl[ix];
+        pevent2 = &OSEventTbl[ix_next];
+        pevent1->OSEventType    = OS_EVENT_TYPE_UNUSED;
+        pevent1->OSEventPtr     = pevent2;
+#if OS_EVENT_NAME_EN > 0u
+        pevent1->OSEventName    = (INT8U *)(void *)"?";     /* Unknown name                            */
+#endif
+    }
+    pevent1                         = &OSEventTbl[ix];
+    pevent1->OSEventType            = OS_EVENT_TYPE_UNUSED;
+    pevent1->OSEventPtr             = (OS_EVENT *)0;
+#if OS_EVENT_NAME_EN > 0u
+    pevent1->OSEventName            = (INT8U *)(void *)"?"; /* Unknown name                            */
+#endif
+    OSEventFreeList                 = &OSEventTbl[0];
+#else
+    OSEventFreeList                 = &OSEventTbl[0];       /* Only have ONE event control block       */
+    OSEventFreeList->OSEventType    = OS_EVENT_TYPE_UNUSED;
+    OSEventFreeList->OSEventPtr     = (OS_EVENT *)0;
+#if OS_EVENT_NAME_EN > 0u
+    OSEventFreeList->OSEventName    = (INT8U *)"?";         /* Unknown name                            */
+#endif
+#endif
+#endif
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             INITIALIZATION
+*                                    INITIALIZE MISCELLANEOUS VARIABLES
+*
+* Description: This function is called by OSInit() to initialize miscellaneous variables.
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+static  void  OS_InitMisc (void)
+{
+#if OS_TIME_GET_SET_EN > 0u
+    OSTime                    = 0uL;                       /* Clear the 32-bit system clock            */
+#endif
+
+    OSIntNesting              = 0u;                        /* Clear the interrupt nesting counter      */
+    OSLockNesting             = 0u;                        /* Clear the scheduling lock counter        */
+
+    OSTaskCtr                 = 0u;                        /* Clear the number of tasks                */
+
+    OSRunning                 = OS_FALSE;                  /* Indicate that multitasking not started   */
+
+    OSCtxSwCtr                = 0u;                        /* Clear the context switch counter         */
+    OSIdleCtr                 = 0uL;                       /* Clear the 32-bit idle counter            */
+
+#if OS_TASK_STAT_EN > 0u
+    OSIdleCtrRun              = 0uL;
+    OSIdleCtrMax              = 0uL;
+    OSStatRdy                 = OS_FALSE;                  /* Statistic task is not ready              */
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    OSSafetyCriticalStartFlag = OS_FALSE;                  /* Still allow creation of objects          */
+#endif
+
+#if OS_TASK_REG_TBL_SIZE > 0u
+    OSTaskRegNextAvailID      = 0u;                        /* Initialize the task register ID          */
+#endif
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             INITIALIZATION
+*                                       INITIALIZE THE READY LIST
+*
+* Description: This function is called by OSInit() to initialize the Ready List.
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+static  void  OS_InitRdyList (void)
+{
+    INT8U  i;
+
+
+    OSRdyGrp      = 0u;                                    /* Clear the ready list                     */
+    for (i = 0u; i < OS_RDY_TBL_SIZE; i++) {
+        OSRdyTbl[i] = 0u;
+    }
+
+    OSPrioCur     = 0u;
+    OSPrioHighRdy = 0u;
+
+    OSTCBHighRdy  = (OS_TCB *)0;
+    OSTCBCur      = (OS_TCB *)0;
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             INITIALIZATION
+*                                         CREATING THE IDLE TASK
+*
+* Description: This function creates the Idle Task.
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+static  void  OS_InitTaskIdle (void)
+{
+#if OS_TASK_NAME_EN > 0u
+    INT8U  err;
+#endif
+
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+    #if OS_STK_GROWTH == 1u
+    (void)OSTaskCreateExt(OS_TaskIdle,
+                          (void *)0,                                 /* No arguments passed to OS_TaskIdle() */
+                          &OSTaskIdleStk[OS_TASK_IDLE_STK_SIZE - 1u],/* Set Top-Of-Stack                     */
+                          OS_TASK_IDLE_PRIO,                         /* Lowest priority level                */
+                          OS_TASK_IDLE_ID,
+                          &OSTaskIdleStk[0],                         /* Set Bottom-Of-Stack                  */
+                          OS_TASK_IDLE_STK_SIZE,
+                          (void *)0,                                 /* No TCB extension                     */
+                          OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);/* Enable stack checking + clear stack  */
+    #else
+    (void)OSTaskCreateExt(OS_TaskIdle,
+                          (void *)0,                                 /* No arguments passed to OS_TaskIdle() */
+                          &OSTaskIdleStk[0],                         /* Set Top-Of-Stack                     */
+                          OS_TASK_IDLE_PRIO,                         /* Lowest priority level                */
+                          OS_TASK_IDLE_ID,
+                          &OSTaskIdleStk[OS_TASK_IDLE_STK_SIZE - 1u],/* Set Bottom-Of-Stack                  */
+                          OS_TASK_IDLE_STK_SIZE,
+                          (void *)0,                                 /* No TCB extension                     */
+                          OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);/* Enable stack checking + clear stack  */
+    #endif
+#else
+    #if OS_STK_GROWTH == 1u
+    (void)OSTaskCreate(OS_TaskIdle,
+                       (void *)0,
+                       &OSTaskIdleStk[OS_TASK_IDLE_STK_SIZE - 1u],
+                       OS_TASK_IDLE_PRIO);
+    #else
+    (void)OSTaskCreate(OS_TaskIdle,
+                       (void *)0,
+                       &OSTaskIdleStk[0],
+                       OS_TASK_IDLE_PRIO);
+    #endif
+#endif
+
+#if OS_TASK_NAME_EN > 0u
+    OSTaskNameSet(OS_TASK_IDLE_PRIO, (INT8U *)(void *)"uC/OS-II Idle", &err);
+#endif
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             INITIALIZATION
+*                                      CREATING THE STATISTIC TASK
+*
+* Description: This function creates the Statistic Task.
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if OS_TASK_STAT_EN > 0u
+static  void  OS_InitTaskStat (void)
+{
+#if OS_TASK_NAME_EN > 0u
+    INT8U  err;
+#endif
+
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+    #if OS_STK_GROWTH == 1u
+    (void)OSTaskCreateExt(OS_TaskStat,
+                          (void *)0,                                   /* No args passed to OS_TaskStat()*/
+                          &OSTaskStatStk[OS_TASK_STAT_STK_SIZE - 1u],  /* Set Top-Of-Stack               */
+                          OS_TASK_STAT_PRIO,                           /* One higher than the idle task  */
+                          OS_TASK_STAT_ID,
+                          &OSTaskStatStk[0],                           /* Set Bottom-Of-Stack            */
+                          OS_TASK_STAT_STK_SIZE,
+                          (void *)0,                                   /* No TCB extension               */
+                          OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);  /* Enable stack checking + clear  */
+    #else
+    (void)OSTaskCreateExt(OS_TaskStat,
+                          (void *)0,                                   /* No args passed to OS_TaskStat()*/
+                          &OSTaskStatStk[0],                           /* Set Top-Of-Stack               */
+                          OS_TASK_STAT_PRIO,                           /* One higher than the idle task  */
+                          OS_TASK_STAT_ID,
+                          &OSTaskStatStk[OS_TASK_STAT_STK_SIZE - 1u],  /* Set Bottom-Of-Stack            */
+                          OS_TASK_STAT_STK_SIZE,
+                          (void *)0,                                   /* No TCB extension               */
+                          OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);  /* Enable stack checking + clear  */
+    #endif
+#else
+    #if OS_STK_GROWTH == 1u
+    (void)OSTaskCreate(OS_TaskStat,
+                       (void *)0,                                      /* No args passed to OS_TaskStat()*/
+                       &OSTaskStatStk[OS_TASK_STAT_STK_SIZE - 1u],     /* Set Top-Of-Stack               */
+                       OS_TASK_STAT_PRIO);                             /* One higher than the idle task  */
+    #else
+    (void)OSTaskCreate(OS_TaskStat,
+                       (void *)0,                                      /* No args passed to OS_TaskStat()*/
+                       &OSTaskStatStk[0],                              /* Set Top-Of-Stack               */
+                       OS_TASK_STAT_PRIO);                             /* One higher than the idle task  */
+    #endif
+#endif
+
+#if OS_TASK_NAME_EN > 0u
+    OSTaskNameSet(OS_TASK_STAT_PRIO, (INT8U *)(void *)"uC/OS-II Stat", &err);
+#endif
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             INITIALIZATION
+*                            INITIALIZE THE FREE LIST OF TASK CONTROL BLOCKS
+*
+* Description: This function is called by OSInit() to initialize the free list of OS_TCBs.
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+static  void  OS_InitTCBList (void)
+{
+    INT8U    ix;
+    INT8U    ix_next;
+    OS_TCB  *ptcb1;
+    OS_TCB  *ptcb2;
+
+
+    OS_MemClr((INT8U *)&OSTCBTbl[0],     sizeof(OSTCBTbl));      /* Clear all the TCBs                 */
+    OS_MemClr((INT8U *)&OSTCBPrioTbl[0], sizeof(OSTCBPrioTbl));  /* Clear the priority table           */
+    for (ix = 0u; ix < (OS_MAX_TASKS + OS_N_SYS_TASKS - 1u); ix++) {    /* Init. list of free TCBs     */
+        ix_next =  ix + 1u;
+        ptcb1   = &OSTCBTbl[ix];
+        ptcb2   = &OSTCBTbl[ix_next];
+        ptcb1->OSTCBNext = ptcb2;
+#if OS_TASK_NAME_EN > 0u
+        ptcb1->OSTCBTaskName = (INT8U *)(void *)"?";             /* Unknown name                       */
+#endif
+    }
+    ptcb1                   = &OSTCBTbl[ix];
+    ptcb1->OSTCBNext        = (OS_TCB *)0;                       /* Last OS_TCB                        */
+#if OS_TASK_NAME_EN > 0u
+    ptcb1->OSTCBTaskName    = (INT8U *)(void *)"?";              /* Unknown name                       */
+#endif
+    OSTCBList               = (OS_TCB *)0;                       /* TCB lists initializations          */
+    OSTCBFreeList           = &OSTCBTbl[0];
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                      CLEAR A SECTION OF MEMORY
+*
+* Description: This function is called by other uC/OS-II services to clear a contiguous block of RAM.
+*
+* Arguments  : pdest    is the start of the RAM to clear (i.e. write 0x00 to)
+*
+*              size     is the number of bytes to clear.
+*
+* Returns    : none
+*
+* Notes      : 1) This function is INTERNAL to uC/OS-II and your application should not call it.
+*              2) Note that we can only clear up to 64K bytes of RAM.  This is not an issue because none
+*                 of the uses of this function gets close to this limit.
+*              3) The clear is done one byte at a time since this will work on any processor irrespective
+*                 of the alignment of the destination.
+*********************************************************************************************************
+*/
+
+void  OS_MemClr (INT8U  *pdest,
+                 INT16U  size)
+{
+    while (size > 0u) {
+        *pdest++ = (INT8U)0;
+        size--;
+    }
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       COPY A BLOCK OF MEMORY
+*
+* Description: This function is called by other uC/OS-II services to copy a block of memory from one
+*              location to another.
+*
+* Arguments  : pdest    is a pointer to the 'destination' memory block
+*
+*              psrc     is a pointer to the 'source'      memory block
+*
+*              size     is the number of bytes to copy.
+*
+* Returns    : none
+*
+* Notes      : 1) This function is INTERNAL to uC/OS-II and your application should not call it.  There is
+*                 no provision to handle overlapping memory copy.  However, that's not a problem since this
+*                 is not a situation that will happen.
+*              2) Note that we can only copy up to 64K bytes of RAM
+*              3) The copy is done one byte at a time since this will work on any processor irrespective
+*                 of the alignment of the source and destination.
+*********************************************************************************************************
+*/
+
+void  OS_MemCopy (INT8U  *pdest,
+                  INT8U  *psrc,
+                  INT16U  size)
+{
+    while (size > 0u) {
+        *pdest++ = *psrc++;
+        size--;
+    }
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                              SCHEDULER
+*
+* Description: This function is called by other uC/OS-II services to determine whether a new, high
+*              priority task has been made ready to run.  This function is invoked by TASK level code
+*              and is not used to reschedule tasks from ISRs (see OSIntExit() for ISR rescheduling).
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Notes      : 1) This function is INTERNAL to uC/OS-II and your application should not call it.
+*              2) Rescheduling is prevented when the scheduler is locked (see OS_SchedLock())
+*********************************************************************************************************
+*/
+
+void  OS_Sched (void)
+{
+#if OS_CRITICAL_METHOD == 3u                           /* Allocate storage for CPU status register     */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    OS_ENTER_CRITICAL();
+    if (OSIntNesting == 0u) {                          /* Schedule only if all ISRs done and ...       */
+        if (OSLockNesting == 0u) {                     /* ... scheduler is not locked                  */
+            OS_SchedNew();
+            OSTCBHighRdy = OSTCBPrioTbl[OSPrioHighRdy];
+            if (OSPrioHighRdy != OSPrioCur) {          /* No Ctx Sw if current task is highest rdy     */
+#if OS_TASK_PROFILE_EN > 0u
+                OSTCBHighRdy->OSTCBCtxSwCtr++;         /* Inc. # of context switches to this task      */
+#endif
+                OSCtxSwCtr++;                          /* Increment context switch counter             */
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+                OS_TLS_TaskSw();
+#endif
+#endif
+
+                OS_TASK_SW();                          /* Perform a context switch                     */
+            }
+        }
+    }
+    OS_EXIT_CRITICAL();
+}
+
+
+/*
+*********************************************************************************************************
+*                               FIND HIGHEST PRIORITY TASK READY TO RUN
+*
+* Description: This function is called by other uC/OS-II services to determine the highest priority task
+*              that is ready to run.  The global variable 'OSPrioHighRdy' is changed accordingly.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Notes      : 1) This function is INTERNAL to uC/OS-II and your application should not call it.
+*              2) Interrupts are assumed to be disabled when this function is called.
+*********************************************************************************************************
+*/
+
+static  void  OS_SchedNew (void)
+{
+#if OS_LOWEST_PRIO <= 63u                        /* See if we support up to 64 tasks                   */
+    INT8U   y;
+
+
+    y             = OSUnMapTbl[OSRdyGrp];
+    OSPrioHighRdy = (INT8U)((y << 3u) + OSUnMapTbl[OSRdyTbl[y]]);
+#else                                            /* We support up to 256 tasks                         */
+    INT8U     y;
+    OS_PRIO  *ptbl;
+
+
+    if ((OSRdyGrp & 0xFFu) != 0u) {
+        y = OSUnMapTbl[OSRdyGrp & 0xFFu];
+    } else {
+        y = OSUnMapTbl[(OS_PRIO)(OSRdyGrp >> 8u) & 0xFFu] + 8u;
+    }
+    ptbl = &OSRdyTbl[y];
+    if ((*ptbl & 0xFFu) != 0u) {
+        OSPrioHighRdy = (INT8U)((y << 4u) + OSUnMapTbl[(*ptbl & 0xFFu)]);
+    } else {
+        OSPrioHighRdy = (INT8U)((y << 4u) + OSUnMapTbl[(OS_PRIO)(*ptbl >> 8u) & 0xFFu] + 8u);
+    }
+#endif
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                               DETERMINE THE LENGTH OF AN ASCII STRING
+*
+* Description: This function is called by other uC/OS-II services to determine the size of an ASCII string
+*              (excluding the NUL character).
+*
+* Arguments  : psrc     is a pointer to the string for which we need to know the size.
+*
+* Returns    : The size of the string (excluding the NUL terminating character)
+*
+* Notes      : 1) This function is INTERNAL to uC/OS-II and your application should not call it.
+*              2) The string to check must be less than 255 characters long.
+*********************************************************************************************************
+*/
+
+#if (OS_EVENT_NAME_EN > 0u) || (OS_FLAG_NAME_EN > 0u) || (OS_MEM_NAME_EN > 0u) || (OS_TASK_NAME_EN > 0u) || (OS_TMR_CFG_NAME_EN > 0u)
+INT8U  OS_StrLen (INT8U *psrc)
+{
+    INT8U  len;
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (psrc == (INT8U *)0) {
+        return (0u);
+    }
+#endif
+
+    len = 0u;
+    while (*psrc != OS_ASCII_NUL) {
+        psrc++;
+        len++;
+    }
+    return (len);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                              IDLE TASK
+*
+* Description: This task is internal to uC/OS-II and executes whenever no other higher priority tasks
+*              executes because they are ALL waiting for event(s) to occur.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : 1) OSTaskIdleHook() is called after the critical section to ensure that interrupts will be
+*                 enabled for at least a few instructions.  On some processors (ex. Philips XA), enabling
+*                 and then disabling interrupts didn't allow the processor enough time to have interrupts
+*                 enabled before they were disabled again.  uC/OS-II would thus never recognize
+*                 interrupts.
+*              2) This hook has been added to allow you to do such things as STOP the CPU to conserve
+*                 power.
+*********************************************************************************************************
+*/
+
+void  OS_TaskIdle (void *p_arg)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    p_arg = p_arg;                               /* Prevent compiler warning for not using 'p_arg'     */
+    for (;;) {
+        OS_ENTER_CRITICAL();
+        OSIdleCtr++;
+        OS_EXIT_CRITICAL();
+        OSTaskIdleHook();                        /* Call user definable HOOK                           */
+    }
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           STATISTICS TASK
+*
+* Description: This task is internal to uC/OS-II and is used to compute some statistics about the
+*              multitasking environment.  Specifically, OS_TaskStat() computes the CPU usage.
+*              CPU usage is determined by:
+*
+*                                          OSIdleCtr
+*                 OSCPUUsage = 100 * (1 - ------------)     (units are in %)
+*                                         OSIdleCtrMax
+*
+* Arguments  : parg     this pointer is not used at this time.
+*
+* Returns    : none
+*
+* Notes      : 1) This task runs at a priority level higher than the idle task.  In fact, it runs at the
+*                 next higher priority, OS_TASK_IDLE_PRIO-1.
+*              2) You can disable this task by setting the configuration #define OS_TASK_STAT_EN to 0.
+*              3) You MUST have at least a delay of 2/10 seconds to allow for the system to establish the
+*                 maximum value for the idle counter.
+*********************************************************************************************************
+*/
+
+#if OS_TASK_STAT_EN > 0u
+void  OS_TaskStat (void *p_arg)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    p_arg = p_arg;                               /* Prevent compiler warning for not using 'p_arg'     */
+    while (OSStatRdy == OS_FALSE) {
+        OSTimeDly(2u * OS_TICKS_PER_SEC / 10u);  /* Wait until statistic task is ready                 */
+    }
+    OSIdleCtrMax /= 100uL;
+    if (OSIdleCtrMax == 0uL) {
+        OSCPUUsage = 0u;
+#if OS_TASK_SUSPEND_EN > 0u
+        (void)OSTaskSuspend(OS_PRIO_SELF);
+#else
+        for (;;) {
+            OSTimeDly(OS_TICKS_PER_SEC);
+        }
+#endif
+    }
+    OS_ENTER_CRITICAL();
+    OSIdleCtr = OSIdleCtrMax * 100uL;            /* Set initial CPU usage as 0%                        */
+    OS_EXIT_CRITICAL();
+    for (;;) {
+        OS_ENTER_CRITICAL();
+        OSIdleCtrRun = OSIdleCtr;                /* Obtain the of the idle counter for the past second */
+        OSIdleCtr    = 0uL;                      /* Reset the idle counter for the next second         */
+        OS_EXIT_CRITICAL();
+        OSCPUUsage   = (INT8U)(100uL - OSIdleCtrRun / OSIdleCtrMax);
+        OSTaskStatHook();                        /* Invoke user definable hook                         */
+#if (OS_TASK_STAT_STK_CHK_EN > 0u) && (OS_TASK_CREATE_EXT_EN > 0u)
+        OS_TaskStatStkChk();                     /* Check the stacks for each task                     */
+#endif
+        OSTimeDly(OS_TICKS_PER_SEC / 10u);       /* Accumulate OSIdleCtr for the next 1/10 second      */
+    }
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                        CHECK ALL TASK STACKS
+*
+* Description: This function is called by OS_TaskStat() to check the stacks of each active task.
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if (OS_TASK_STAT_STK_CHK_EN > 0u) && (OS_TASK_CREATE_EXT_EN > 0u)
+void  OS_TaskStatStkChk (void)
+{
+    OS_TCB      *ptcb;
+    OS_STK_DATA  stk_data;
+    INT8U        err;
+    INT8U        prio;
+
+
+    for (prio = 0u; prio <= OS_TASK_IDLE_PRIO; prio++) {
+        err = OSTaskStkChk(prio, &stk_data);
+        if (err == OS_ERR_NONE) {
+            ptcb = OSTCBPrioTbl[prio];
+            if (ptcb != (OS_TCB *)0) {                               /* Make sure task 'ptcb' is ...   */
+                if (ptcb != OS_TCB_RESERVED) {                       /* ... still valid.               */
+#if OS_TASK_PROFILE_EN > 0u
+                    #if OS_STK_GROWTH == 1u
+                    ptcb->OSTCBStkBase = ptcb->OSTCBStkBottom + ptcb->OSTCBStkSize;
+                    #else
+                    ptcb->OSTCBStkBase = ptcb->OSTCBStkBottom - ptcb->OSTCBStkSize;
+                    #endif
+                    ptcb->OSTCBStkUsed = stk_data.OSUsed;            /* Store number of entries used   */
+#endif
+                }
+            }
+        }
+    }
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           INITIALIZE TCB
+*
+* Description: This function is internal to uC/OS-II and is used to initialize a Task Control Block when
+*              a task is created (see OSTaskCreate() and OSTaskCreateExt()).
+*
+* Arguments  : prio          is the priority of the task being created
+*
+*              ptos          is a pointer to the task's top-of-stack assuming that the CPU registers
+*                            have been placed on the stack.  Note that the top-of-stack corresponds to a
+*                            'high' memory location is OS_STK_GROWTH is set to 1 and a 'low' memory
+*                            location if OS_STK_GROWTH is set to 0.  Note that stack growth is CPU
+*                            specific.
+*
+*              pbos          is a pointer to the bottom of stack.  A NULL pointer is passed if called by
+*                            'OSTaskCreate()'.
+*
+*              id            is the task's ID (0..65535)
+*
+*              stk_size      is the size of the stack (in 'stack units').  If the stack units are INT8Us
+*                            then, 'stk_size' contains the number of bytes for the stack.  If the stack
+*                            units are INT32Us then, the stack contains '4 * stk_size' bytes.  The stack
+*                            units are established by the #define constant OS_STK which is CPU
+*                            specific.  'stk_size' is 0 if called by 'OSTaskCreate()'.
+*
+*              pext          is a pointer to a user supplied memory area that is used to extend the task
+*                            control block.  This allows you to store the contents of floating-point
+*                            registers, MMU registers or anything else you could find useful during a
+*                            context switch.  You can even assign a name to each task and store this name
+*                            in this TCB extension.  A NULL pointer is passed if called by OSTaskCreate().
+*
+*              opt           options as passed to 'OSTaskCreateExt()' or,
+*                            0 if called from 'OSTaskCreate()'.
+*
+* Returns    : OS_ERR_NONE              if the call was successful
+*              OS_ERR_TASK_NO_MORE_TCB  if there are no more free TCBs to be allocated and thus, the task
+*                                       cannot be created.
+*
+* Note       : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+
+INT8U  OS_TCBInit (INT8U    prio,
+                   OS_STK  *ptos,
+                   OS_STK  *pbos,
+                   INT16U   id,
+                   INT32U   stk_size,
+                   void    *pext,
+                   INT16U   opt)
+{
+    OS_TCB    *ptcb;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+#if OS_TASK_REG_TBL_SIZE > 0u
+    INT8U      i;
+#endif
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+    INT8U      j;
+#endif
+#endif
+
+
+    OS_ENTER_CRITICAL();
+    ptcb = OSTCBFreeList;                                  /* Get a free TCB from the free TCB list    */
+    if (ptcb != (OS_TCB *)0) {
+        OSTCBFreeList            = ptcb->OSTCBNext;        /* Update pointer to free TCB list          */
+        OS_EXIT_CRITICAL();
+        ptcb->OSTCBStkPtr        = ptos;                   /* Load Stack pointer in TCB                */
+        ptcb->OSTCBPrio          = prio;                   /* Load task priority into TCB              */
+        ptcb->OSTCBStat          = OS_STAT_RDY;            /* Task is ready to run                     */
+        ptcb->OSTCBStatPend      = OS_STAT_PEND_OK;        /* Clear pend status                        */
+        ptcb->OSTCBDly           = 0u;                     /* Task is not delayed                      */
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+        ptcb->OSTCBExtPtr        = pext;                   /* Store pointer to TCB extension           */
+        ptcb->OSTCBStkSize       = stk_size;               /* Store stack size                         */
+        ptcb->OSTCBStkBottom     = pbos;                   /* Store pointer to bottom of stack         */
+        ptcb->OSTCBOpt           = opt;                    /* Store task options                       */
+        ptcb->OSTCBId            = id;                     /* Store task ID                            */
+#else
+        pext                     = pext;                   /* Prevent compiler warning if not used     */
+        stk_size                 = stk_size;
+        pbos                     = pbos;
+        opt                      = opt;
+        id                       = id;
+#endif
+
+#if OS_TASK_DEL_EN > 0u
+        ptcb->OSTCBDelReq        = OS_ERR_NONE;
+#endif
+
+#if OS_LOWEST_PRIO <= 63u                                         /* Pre-compute X, Y                  */
+        ptcb->OSTCBY             = (INT8U)(prio >> 3u);
+        ptcb->OSTCBX             = (INT8U)(prio & 0x07u);
+#else                                                             /* Pre-compute X, Y                  */
+        ptcb->OSTCBY             = (INT8U)((INT8U)(prio >> 4u) & 0xFFu);
+        ptcb->OSTCBX             = (INT8U) (prio & 0x0Fu);
+#endif
+                                                                  /* Pre-compute BitX and BitY         */
+        ptcb->OSTCBBitY          = (OS_PRIO)(1uL << ptcb->OSTCBY);
+        ptcb->OSTCBBitX          = (OS_PRIO)(1uL << ptcb->OSTCBX);
+
+#if (OS_EVENT_EN)
+        ptcb->OSTCBEventPtr      = (OS_EVENT  *)0;         /* Task is not pending on an  event         */
+#if (OS_EVENT_MULTI_EN > 0u)
+        ptcb->OSTCBEventMultiPtr = (OS_EVENT **)0;         /* Task is not pending on any events        */
+#endif
+#endif
+
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u) && (OS_TASK_DEL_EN > 0u)
+        ptcb->OSTCBFlagNode      = (OS_FLAG_NODE *)0;      /* Task is not pending on an event flag     */
+#endif
+
+#if (OS_MBOX_EN > 0u) || ((OS_Q_EN > 0u) && (OS_MAX_QS > 0u))
+        ptcb->OSTCBMsg           = (void *)0;              /* No message received                      */
+#endif
+
+#if OS_TASK_PROFILE_EN > 0u
+        ptcb->OSTCBCtxSwCtr      = 0uL;                    /* Initialize profiling variables           */
+        ptcb->OSTCBCyclesStart   = 0uL;
+        ptcb->OSTCBCyclesTot     = 0uL;
+        ptcb->OSTCBStkBase       = (OS_STK *)0;
+        ptcb->OSTCBStkUsed       = 0uL;
+#endif
+
+#if OS_TASK_NAME_EN > 0u
+        ptcb->OSTCBTaskName      = (INT8U *)(void *)"?";
+#endif
+
+#if OS_TASK_REG_TBL_SIZE > 0u                              /* Initialize the task variables            */
+        for (i = 0u; i < OS_TASK_REG_TBL_SIZE; i++) {
+            ptcb->OSTCBRegTbl[i] = 0u;
+        }
+#endif
+
+        OSTCBInitHook(ptcb);
+
+        OS_ENTER_CRITICAL();
+        OSTCBPrioTbl[prio] = ptcb;
+        OS_EXIT_CRITICAL();
+
+        OSTaskCreateHook(ptcb);                            /* Call user defined hook                   */
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+        for (j = 0u; j < OS_TLS_TBL_SIZE; j++) {
+            ptcb->OSTCBTLSTbl[j] = (OS_TLS)0;
+        }
+        OS_TLS_TaskCreate(ptcb);                           /* Call TLS hook                            */
+#endif
+#endif
+
+        OS_ENTER_CRITICAL();
+        ptcb->OSTCBNext = OSTCBList;                       /* Link into TCB chain                      */
+        ptcb->OSTCBPrev = (OS_TCB *)0;         
+        if (OSTCBList != (OS_TCB *)0) {
+            OSTCBList->OSTCBPrev = ptcb;
+        }
+        OSTCBList               = ptcb;
+        OSRdyGrp               |= ptcb->OSTCBBitY;         /* Make task ready to run                   */
+        OSRdyTbl[ptcb->OSTCBY] |= ptcb->OSTCBBitX;
+        OSTaskCtr++;                                       /* Increment the #tasks counter             */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_NONE);
+    }
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_TASK_NO_MORE_TCB);
+}
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_dbg_r.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_dbg_r.c
new file mode 100644
index 0000000..7788693
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_dbg_r.c
@@ -0,0 +1,338 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                           DEBUGGER CONSTANTS
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_DBG.C
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#include 
+
+/*
+*********************************************************************************************************
+*                                             DEBUG DATA
+*********************************************************************************************************
+*/
+
+INT16U  const  OSDebugEn             = OS_DEBUG_EN;             /* Debug constants are defined below   */
+
+#if OS_DEBUG_EN > 0u
+
+INT32U  const  OSEndiannessTest      = 0x12345678uL;            /* Variable to test CPU endianness     */
+
+INT16U  const  OSEventEn             = OS_EVENT_EN;
+INT16U  const  OSEventMax            = OS_MAX_EVENTS;           /* Number of event control blocks      */
+INT16U  const  OSEventNameEn         = OS_EVENT_NAME_EN;
+#if (OS_EVENT_EN) && (OS_MAX_EVENTS > 0u)
+INT16U  const  OSEventSize           = sizeof(OS_EVENT);        /* Size in Bytes of OS_EVENT           */
+INT16U  const  OSEventTblSize        = sizeof(OSEventTbl);      /* Size of OSEventTbl[] in bytes       */
+#else
+INT16U  const  OSEventSize           = 0u;
+INT16U  const  OSEventTblSize        = 0u;
+#endif
+INT16U  const  OSEventMultiEn        = OS_EVENT_MULTI_EN;
+
+
+INT16U  const  OSFlagEn              = OS_FLAG_EN;
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+INT16U  const  OSFlagGrpSize         = sizeof(OS_FLAG_GRP);     /* Size in Bytes of OS_FLAG_GRP        */
+INT16U  const  OSFlagNodeSize        = sizeof(OS_FLAG_NODE);    /* Size in Bytes of OS_FLAG_NODE       */
+INT16U  const  OSFlagWidth           = sizeof(OS_FLAGS);        /* Width (in bytes) of OS_FLAGS        */
+#else
+INT16U  const  OSFlagGrpSize         = 0u;
+INT16U  const  OSFlagNodeSize        = 0u;
+INT16U  const  OSFlagWidth           = 0u;
+#endif
+INT16U  const  OSFlagMax             = OS_MAX_FLAGS;
+INT16U  const  OSFlagNameEn          = OS_FLAG_NAME_EN;
+
+INT16U  const  OSLowestPrio          = OS_LOWEST_PRIO;
+
+INT16U  const  OSMboxEn              = OS_MBOX_EN;
+
+INT16U  const  OSMemEn               = OS_MEM_EN;
+INT16U  const  OSMemMax              = OS_MAX_MEM_PART;         /* Number of memory partitions         */
+INT16U  const  OSMemNameEn           = OS_MEM_NAME_EN;
+#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u)
+INT16U  const  OSMemSize             = sizeof(OS_MEM);          /* Mem. Partition header sine (bytes)  */
+INT16U  const  OSMemTblSize          = sizeof(OSMemTbl);
+#else
+INT16U  const  OSMemSize             = 0u;
+INT16U  const  OSMemTblSize          = 0u;
+#endif
+INT16U  const  OSMutexEn             = OS_MUTEX_EN;
+
+INT16U  const  OSPtrSize             = sizeof(void *);          /* Size in Bytes of a pointer          */
+
+INT16U  const  OSQEn                 = OS_Q_EN;
+INT16U  const  OSQMax                = OS_MAX_QS;               /* Number of queues                    */
+#if (OS_Q_EN > 0u) && (OS_MAX_QS > 0u)
+INT16U  const  OSQSize               = sizeof(OS_Q);            /* Size in bytes of OS_Q structure     */
+#else
+INT16U  const  OSQSize               = 0u;
+#endif
+
+INT16U  const  OSRdyTblSize          = OS_RDY_TBL_SIZE;         /* Number of bytes in the ready table  */
+
+INT16U  const  OSSemEn               = OS_SEM_EN;
+
+INT16U  const  OSStkWidth            = sizeof(OS_STK);          /* Size in Bytes of a stack entry      */
+
+INT16U  const  OSTaskCreateEn        = OS_TASK_CREATE_EN;
+INT16U  const  OSTaskCreateExtEn     = OS_TASK_CREATE_EXT_EN;
+INT16U  const  OSTaskDelEn           = OS_TASK_DEL_EN;
+INT16U  const  OSTaskIdleStkSize     = OS_TASK_IDLE_STK_SIZE;
+INT16U  const  OSTaskProfileEn       = OS_TASK_PROFILE_EN;
+INT16U  const  OSTaskMax             = OS_MAX_TASKS + OS_N_SYS_TASKS; /* Total max. number of tasks    */
+INT16U  const  OSTaskNameEn          = OS_TASK_NAME_EN;
+INT16U  const  OSTaskStatEn          = OS_TASK_STAT_EN;
+INT16U  const  OSTaskStatStkSize     = OS_TASK_STAT_STK_SIZE;
+INT16U  const  OSTaskStatStkChkEn    = OS_TASK_STAT_STK_CHK_EN;
+INT16U  const  OSTaskSwHookEn        = OS_TASK_SW_HOOK_EN;
+INT16U  const  OSTaskRegTblSize      = OS_TASK_REG_TBL_SIZE;
+
+INT16U  const  OSTCBPrioTblMax       = OS_LOWEST_PRIO + 1u;     /* Number of entries in OSTCBPrioTbl[] */
+INT16U  const  OSTCBSize             = sizeof(OS_TCB);          /* Size in Bytes of OS_TCB             */
+INT16U  const  OSTicksPerSec         = OS_TICKS_PER_SEC;
+INT16U  const  OSTimeTickHookEn      = OS_TIME_TICK_HOOK_EN;
+INT16U  const  OSVersionNbr          = OS_VERSION;
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+INT16U  const  OS_TLS_TblSize        = OS_TLS_TBL_SIZE * sizeof(OS_TLS);
+#else
+INT16U  const  OS_TLS_TblSize        = 0u;
+#endif
+#endif
+
+INT16U  const  OSTmrEn               = OS_TMR_EN;
+INT16U  const  OSTmrCfgMax           = OS_TMR_CFG_MAX;
+INT16U  const  OSTmrCfgNameEn        = OS_TMR_CFG_NAME_EN;
+INT16U  const  OSTmrCfgWheelSize     = OS_TMR_CFG_WHEEL_SIZE;
+INT16U  const  OSTmrCfgTicksPerSec   = OS_TMR_CFG_TICKS_PER_SEC;
+
+#if (OS_TMR_EN > 0u) && (OS_TMR_CFG_MAX > 0u)
+INT16U  const  OSTmrSize             = sizeof(OS_TMR);
+INT16U  const  OSTmrTblSize          = sizeof(OSTmrTbl);
+INT16U  const  OSTmrWheelSize        = sizeof(OS_TMR_WHEEL);
+INT16U  const  OSTmrWheelTblSize     = sizeof(OSTmrWheelTbl);
+#else
+INT16U  const  OSTmrSize             = 0u;
+INT16U  const  OSTmrTblSize          = 0u;
+INT16U  const  OSTmrWheelSize        = 0u;
+INT16U  const  OSTmrWheelTblSize     = 0u;
+#endif
+
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             DEBUG DATA
+*                            TOTAL DATA SPACE (i.e. RAM) USED BY uC/OS-II
+*********************************************************************************************************
+*/
+#if OS_DEBUG_EN > 0u
+
+INT16U  const  OSDataSize = sizeof(OSCtxSwCtr)
+#if (OS_EVENT_EN) && (OS_MAX_EVENTS > 0u)
+                          + sizeof(OSEventFreeList)
+                          + sizeof(OSEventTbl)
+#endif
+
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+                          + sizeof(OSFlagTbl)
+                          + sizeof(OSFlagFreeList)
+#endif
+
+#if OS_TASK_STAT_EN > 0u
+                          + sizeof(OSCPUUsage)
+                          + sizeof(OSIdleCtrMax)
+                          + sizeof(OSIdleCtrRun)
+                          + sizeof(OSStatRdy)
+                          + sizeof(OSTaskStatStk)
+#endif
+
+#if OS_TICK_STEP_EN > 0u
+                          + sizeof(OSTickStepState)
+#endif
+
+#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u)
+                          + sizeof(OSMemFreeList)
+                          + sizeof(OSMemTbl)
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+                          + sizeof(OSSafetyCriticalStartFlag)
+#endif
+
+#if (OS_Q_EN > 0u) && (OS_MAX_QS > 0u)
+                          + sizeof(OSQFreeList)
+                          + sizeof(OSQTbl)
+#endif
+
+#if OS_TASK_REG_TBL_SIZE > 0u
+                          + sizeof(OSTaskRegNextAvailID)
+#endif
+
+#if OS_TIME_GET_SET_EN > 0u
+                          + sizeof(OSTime)
+#endif
+
+#if (OS_TMR_EN > 0u) && (OS_TMR_CFG_MAX > 0u)
+                          + sizeof(OSTmrFree)
+                          + sizeof(OSTmrUsed)
+                          + sizeof(OSTmrTime)
+                          + sizeof(OSTmrSem)
+                          + sizeof(OSTmrSemSignal)
+                          + sizeof(OSTmrTbl)
+                          + sizeof(OSTmrFreeList)
+                          + sizeof(OSTmrTaskStk)
+                          + sizeof(OSTmrWheelTbl)
+#endif
+                          + sizeof(OSIntNesting)
+                          + sizeof(OSLockNesting)
+                          + sizeof(OSPrioCur)
+                          + sizeof(OSPrioHighRdy)
+                          + sizeof(OSRdyGrp)
+                          + sizeof(OSRdyTbl)
+                          + sizeof(OSRunning)
+                          + sizeof(OSTaskCtr)
+                          + sizeof(OSIdleCtr)
+                          + sizeof(OSTaskIdleStk)
+                          + sizeof(OSTCBCur)
+                          + sizeof(OSTCBFreeList)
+                          + sizeof(OSTCBHighRdy)
+                          + sizeof(OSTCBList)
+                          + sizeof(OSTCBPrioTbl)
+                          + sizeof(OSTCBTbl);
+
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       OS DEBUG INITIALIZATION
+*
+* Description: This function is used to make sure that debug variables that are unused in the application
+*              are not optimized away.  This function might not be necessary for all compilers.  In this
+*              case, you should simply DELETE the code in this function while still leaving the declaration
+*              of the function itself.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : (1) This code doesn't do anything, it simply prevents the compiler from optimizing out
+*                  the 'const' variables which are declared in this file.
+*              (2) You may decide to 'compile out' the code (by using #if 0/#endif) INSIDE the function 
+*                  if your compiler DOES NOT optimize out the 'const' variables above.
+*********************************************************************************************************
+*/
+
+#if OS_DEBUG_EN > 0u
+void  OSDebugInit (void)
+{
+    void  const  *ptemp;
+
+
+    ptemp = (void const *)&OSDebugEn;
+
+    ptemp = (void const *)&OSEndiannessTest;
+
+    ptemp = (void const *)&OSEventMax;
+    ptemp = (void const *)&OSEventNameEn;
+    ptemp = (void const *)&OSEventEn;
+    ptemp = (void const *)&OSEventSize;
+    ptemp = (void const *)&OSEventTblSize;
+    ptemp = (void const *)&OSEventMultiEn;
+
+    ptemp = (void const *)&OSFlagEn;
+    ptemp = (void const *)&OSFlagGrpSize;
+    ptemp = (void const *)&OSFlagNodeSize;
+    ptemp = (void const *)&OSFlagWidth;
+    ptemp = (void const *)&OSFlagMax;
+    ptemp = (void const *)&OSFlagNameEn;
+
+    ptemp = (void const *)&OSLowestPrio;
+
+    ptemp = (void const *)&OSMboxEn;
+
+    ptemp = (void const *)&OSMemEn;
+    ptemp = (void const *)&OSMemMax;
+    ptemp = (void const *)&OSMemNameEn;
+    ptemp = (void const *)&OSMemSize;
+    ptemp = (void const *)&OSMemTblSize;
+
+    ptemp = (void const *)&OSMutexEn;
+
+    ptemp = (void const *)&OSPtrSize;
+
+    ptemp = (void const *)&OSQEn;
+    ptemp = (void const *)&OSQMax;
+    ptemp = (void const *)&OSQSize;
+
+    ptemp = (void const *)&OSRdyTblSize;
+
+    ptemp = (void const *)&OSSemEn;
+
+    ptemp = (void const *)&OSStkWidth;
+
+    ptemp = (void const *)&OSTaskCreateEn;
+    ptemp = (void const *)&OSTaskCreateExtEn;
+    ptemp = (void const *)&OSTaskDelEn;
+    ptemp = (void const *)&OSTaskIdleStkSize;
+    ptemp = (void const *)&OSTaskProfileEn;
+    ptemp = (void const *)&OSTaskMax;
+    ptemp = (void const *)&OSTaskNameEn;
+    ptemp = (void const *)&OSTaskStatEn;
+    ptemp = (void const *)&OSTaskStatStkSize;
+    ptemp = (void const *)&OSTaskStatStkChkEn;
+    ptemp = (void const *)&OSTaskSwHookEn;
+
+    ptemp = (void const *)&OSTCBPrioTblMax;
+    ptemp = (void const *)&OSTCBSize;
+
+    ptemp = (void const *)&OSTicksPerSec;
+    ptemp = (void const *)&OSTimeTickHookEn;
+
+#if OS_TMR_EN > 0u
+    ptemp = (void const *)&OSTmrTbl[0];
+    ptemp = (void const *)&OSTmrWheelTbl[0];
+
+    ptemp = (void const *)&OSTmrEn;
+    ptemp = (void const *)&OSTmrCfgMax;
+    ptemp = (void const *)&OSTmrCfgNameEn;
+    ptemp = (void const *)&OSTmrCfgWheelSize;
+    ptemp = (void const *)&OSTmrCfgTicksPerSec;
+    ptemp = (void const *)&OSTmrSize;
+    ptemp = (void const *)&OSTmrTblSize;
+
+    ptemp = (void const *)&OSTmrWheelSize;
+    ptemp = (void const *)&OSTmrWheelTblSize;
+#endif
+
+    ptemp = (void const *)&OSVersionNbr;
+
+    ptemp = (void const *)&OSDataSize;
+
+    ptemp = ptemp;                             /* Prevent compiler warning for 'ptemp' not being used! */
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_flag.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_flag.c
new file mode 100644
index 0000000..ad2b055
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_flag.c
@@ -0,0 +1,1231 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                         EVENT FLAG  MANAGEMENT
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_FLAG.C
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#ifndef  OS_MASTER_FILE
+#include 
+#endif
+
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+/*
+*********************************************************************************************************
+*                                          LOCAL PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void     OS_FlagBlock(OS_FLAG_GRP *pgrp, OS_FLAG_NODE *pnode, OS_FLAGS flags, INT8U wait_type, INT32U timeout);
+static  BOOLEAN  OS_FlagTaskRdy(OS_FLAG_NODE *pnode, OS_FLAGS flags_rdy, INT8U pend_stat);
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                          CHECK THE STATUS OF FLAGS IN AN EVENT FLAG GROUP
+*
+* Description: This function is called to check the status of a combination of bits to be set or cleared
+*              in an event flag group.  Your application can check for ANY bit to be set/cleared or ALL
+*              bits to be set/cleared.
+*
+*              This call does not block if the desired flags are not present.
+*
+* Arguments  : pgrp          is a pointer to the desired event flag group.
+*
+*              flags         Is a bit pattern indicating which bit(s) (i.e. flags) you wish to check.
+*                            The bits you want are specified by setting the corresponding bits in
+*                            'flags'.  e.g. if your application wants to wait for bits 0 and 1 then
+*                            'flags' would contain 0x03.
+*
+*              wait_type     specifies whether you want ALL bits to be set/cleared or ANY of the bits
+*                            to be set/cleared.
+*                            You can specify the following argument:
+*
+*                            OS_FLAG_WAIT_CLR_ALL   You will check ALL bits in 'flags' to be clear (0)
+*                            OS_FLAG_WAIT_CLR_ANY   You will check ANY bit  in 'flags' to be clear (0)
+*                            OS_FLAG_WAIT_SET_ALL   You will check ALL bits in 'flags' to be set   (1)
+*                            OS_FLAG_WAIT_SET_ANY   You will check ANY bit  in 'flags' to be set   (1)
+*
+*                            NOTE: Add OS_FLAG_CONSUME if you want the event flag to be 'consumed' by
+*                                  the call.  Example, to wait for any flag in a group AND then clear
+*                                  the flags that are present, set 'wait_type' to:
+*
+*                                  OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME
+*
+*              perr          is a pointer to an error code and can be:
+*                            OS_ERR_NONE               No error
+*                            OS_ERR_EVENT_TYPE         You are not pointing to an event flag group
+*                            OS_ERR_FLAG_WAIT_TYPE     You didn't specify a proper 'wait_type' argument.
+*                            OS_ERR_FLAG_INVALID_PGRP  You passed a NULL pointer instead of the event flag
+*                                                      group handle.
+*                            OS_ERR_FLAG_NOT_RDY       The desired flags you are waiting for are not
+*                                                      available.
+*
+* Returns    : The flags in the event flag group that made the task ready or, 0 if a timeout or an error
+*              occurred.
+*
+* Called from: Task or ISR
+*
+* Note(s)    : 1) IMPORTANT, the behavior of this function has changed from PREVIOUS versions.  The
+*                 function NOW returns the flags that were ready INSTEAD of the current state of the
+*                 event flags.
+*********************************************************************************************************
+*/
+
+#if OS_FLAG_ACCEPT_EN > 0u
+OS_FLAGS  OSFlagAccept (OS_FLAG_GRP  *pgrp,
+                        OS_FLAGS      flags,
+                        INT8U         wait_type,
+                        INT8U        *perr)
+{
+    OS_FLAGS      flags_rdy;
+    INT8U         result;
+    BOOLEAN       consume;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR     cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_FLAGS)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pgrp == (OS_FLAG_GRP *)0) {                        /* Validate 'pgrp'                          */
+        *perr = OS_ERR_FLAG_INVALID_PGRP;
+        return ((OS_FLAGS)0);
+    }
+#endif
+    if (pgrp->OSFlagType != OS_EVENT_TYPE_FLAG) {          /* Validate event block type                */
+        *perr = OS_ERR_EVENT_TYPE;
+        return ((OS_FLAGS)0);
+    }
+    result = (INT8U)(wait_type & OS_FLAG_CONSUME);
+    if (result != (INT8U)0) {                              /* See if we need to consume the flags      */
+        wait_type &= ~OS_FLAG_CONSUME;
+        consume    = OS_TRUE;
+    } else {
+        consume    = OS_FALSE;
+    }
+/*$PAGE*/
+    *perr = OS_ERR_NONE;                                   /* Assume NO error until proven otherwise.  */
+    OS_ENTER_CRITICAL();
+    switch (wait_type) {
+        case OS_FLAG_WAIT_SET_ALL:                         /* See if all required flags are set        */
+             flags_rdy = (OS_FLAGS)(pgrp->OSFlagFlags & flags);     /* Extract only the bits we want   */
+             if (flags_rdy == flags) {                     /* Must match ALL the bits that we want     */
+                 if (consume == OS_TRUE) {                 /* See if we need to consume the flags      */
+                     pgrp->OSFlagFlags &= (OS_FLAGS)~flags_rdy;     /* Clear ONLY the flags we wanted  */
+                 }
+             } else {
+                 *perr = OS_ERR_FLAG_NOT_RDY;
+             }
+             OS_EXIT_CRITICAL();
+             break;
+
+        case OS_FLAG_WAIT_SET_ANY:
+             flags_rdy = (OS_FLAGS)(pgrp->OSFlagFlags & flags);     /* Extract only the bits we want   */
+             if (flags_rdy != (OS_FLAGS)0) {               /* See if any flag set                      */
+                 if (consume == OS_TRUE) {                 /* See if we need to consume the flags      */
+                     pgrp->OSFlagFlags &= (OS_FLAGS)~flags_rdy;     /* Clear ONLY the flags we got     */
+                 }
+             } else {
+                 *perr = OS_ERR_FLAG_NOT_RDY;
+             }
+             OS_EXIT_CRITICAL();
+             break;
+
+#if OS_FLAG_WAIT_CLR_EN > 0u
+        case OS_FLAG_WAIT_CLR_ALL:                         /* See if all required flags are cleared    */
+             flags_rdy = (OS_FLAGS)~pgrp->OSFlagFlags & flags;    /* Extract only the bits we want     */
+             if (flags_rdy == flags) {                     /* Must match ALL the bits that we want     */
+                 if (consume == OS_TRUE) {                 /* See if we need to consume the flags      */
+                     pgrp->OSFlagFlags |= flags_rdy;       /* Set ONLY the flags that we wanted        */
+                 }
+             } else {
+                 *perr = OS_ERR_FLAG_NOT_RDY;
+             }
+             OS_EXIT_CRITICAL();
+             break;
+
+        case OS_FLAG_WAIT_CLR_ANY:
+             flags_rdy = (OS_FLAGS)~pgrp->OSFlagFlags & flags;   /* Extract only the bits we want      */
+             if (flags_rdy != (OS_FLAGS)0) {               /* See if any flag cleared                  */
+                 if (consume == OS_TRUE) {                 /* See if we need to consume the flags      */
+                     pgrp->OSFlagFlags |= flags_rdy;       /* Set ONLY the flags that we got           */
+                 }
+             } else {
+                 *perr = OS_ERR_FLAG_NOT_RDY;
+             }
+             OS_EXIT_CRITICAL();
+             break;
+#endif
+
+        default:
+             OS_EXIT_CRITICAL();
+             flags_rdy = (OS_FLAGS)0;
+             *perr     = OS_ERR_FLAG_WAIT_TYPE;
+             break;
+    }
+    return (flags_rdy);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                        CREATE AN EVENT FLAG
+*
+* Description: This function is called to create an event flag group.
+*
+* Arguments  : flags         Contains the initial value to store in the event flag group.
+*
+*              perr          is a pointer to an error code which will be returned to your application:
+*                               OS_ERR_NONE               if the call was successful.
+*                               OS_ERR_CREATE_ISR         if you attempted to create an Event Flag from an
+*                                                         ISR.
+*                               OS_ERR_FLAG_GRP_DEPLETED  if there are no more event flag groups
+*
+* Returns    : A pointer to an event flag group or a NULL pointer if no more groups are available.
+*
+* Called from: Task ONLY
+*********************************************************************************************************
+*/
+
+OS_FLAG_GRP  *OSFlagCreate (OS_FLAGS  flags,
+                            INT8U    *perr)
+{
+    OS_FLAG_GRP *pgrp;
+#if OS_CRITICAL_METHOD == 3u                        /* Allocate storage for CPU status register        */
+    OS_CPU_SR    cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_FLAG_GRP *)0);
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == OS_TRUE) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_FLAG_GRP *)0);
+    }
+#endif
+
+    if (OSIntNesting > 0u) {                        /* See if called from ISR ...                      */
+        *perr = OS_ERR_CREATE_ISR;                  /* ... can't CREATE from an ISR                    */
+        return ((OS_FLAG_GRP *)0);
+    }
+    OS_ENTER_CRITICAL();
+    pgrp = OSFlagFreeList;                          /* Get next free event flag                        */
+    if (pgrp != (OS_FLAG_GRP *)0) {                 /* See if we have event flag groups available      */
+                                                    /* Adjust free list                                */
+        OSFlagFreeList       = (OS_FLAG_GRP *)OSFlagFreeList->OSFlagWaitList;
+        pgrp->OSFlagType     = OS_EVENT_TYPE_FLAG;  /* Set to event flag group type                    */
+        pgrp->OSFlagFlags    = flags;               /* Set to desired initial value                    */
+        pgrp->OSFlagWaitList = (void *)0;           /* Clear list of tasks waiting on flags            */
+#if OS_FLAG_NAME_EN > 0u
+        pgrp->OSFlagName     = (INT8U *)(void *)"?";
+#endif
+        OS_EXIT_CRITICAL();
+        *perr                = OS_ERR_NONE;
+    } else {
+        OS_EXIT_CRITICAL();
+        *perr                = OS_ERR_FLAG_GRP_DEPLETED;
+    }
+    return (pgrp);                                  /* Return pointer to event flag group              */
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                     DELETE AN EVENT FLAG GROUP
+*
+* Description: This function deletes an event flag group and readies all tasks pending on the event flag
+*              group.
+*
+* Arguments  : pgrp          is a pointer to the desired event flag group.
+*
+*              opt           determines delete options as follows:
+*                            opt == OS_DEL_NO_PEND   Deletes the event flag group ONLY if no task pending
+*                            opt == OS_DEL_ALWAYS    Deletes the event flag group even if tasks are
+*                                                    waiting.  In this case, all the tasks pending will be
+*                                                    readied.
+*
+*              perr          is a pointer to an error code that can contain one of the following values:
+*                            OS_ERR_NONE               The call was successful and the event flag group was
+*                                                      deleted
+*                            OS_ERR_DEL_ISR            If you attempted to delete the event flag group from
+*                                                      an ISR
+*                            OS_ERR_FLAG_INVALID_PGRP  If 'pgrp' is a NULL pointer.
+*                            OS_ERR_EVENT_TYPE         If you didn't pass a pointer to an event flag group
+*                            OS_ERR_INVALID_OPT        An invalid option was specified
+*                            OS_ERR_TASK_WAITING       One or more tasks were waiting on the event flag
+*                                                      group.
+*
+* Returns    : pgrp          upon error
+*              (OS_EVENT *)0 if the event flag group was successfully deleted.
+*
+* Note(s)    : 1) This function must be used with care.  Tasks that would normally expect the presence of
+*                 the event flag group MUST check the return code of OSFlagAccept() and OSFlagPend().
+*              2) This call can potentially disable interrupts for a long time.  The interrupt disable
+*                 time is directly proportional to the number of tasks waiting on the event flag group.
+*              3) All tasks that were waiting for the event flag will be readied and returned an 
+*                 OS_ERR_PEND_ABORT if OSFlagDel() was called with OS_DEL_ALWAYS
+*********************************************************************************************************
+*/
+
+#if OS_FLAG_DEL_EN > 0u
+OS_FLAG_GRP  *OSFlagDel (OS_FLAG_GRP  *pgrp,
+                         INT8U         opt,
+                         INT8U        *perr)
+{
+    BOOLEAN       tasks_waiting;
+    OS_FLAG_NODE *pnode;
+    OS_FLAG_GRP  *pgrp_return;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR     cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_FLAG_GRP *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pgrp == (OS_FLAG_GRP *)0) {                        /* Validate 'pgrp'                          */
+        *perr = OS_ERR_FLAG_INVALID_PGRP;
+        return (pgrp);
+    }
+#endif
+    if (OSIntNesting > 0u) {                               /* See if called from ISR ...               */
+        *perr = OS_ERR_DEL_ISR;                            /* ... can't DELETE from an ISR             */
+        return (pgrp);
+    }
+    if (pgrp->OSFlagType != OS_EVENT_TYPE_FLAG) {          /* Validate event group type                */
+        *perr = OS_ERR_EVENT_TYPE;
+        return (pgrp);
+    }
+    OS_ENTER_CRITICAL();
+    if (pgrp->OSFlagWaitList != (void *)0) {               /* See if any tasks waiting on event flags  */
+        tasks_waiting = OS_TRUE;                           /* Yes                                      */
+    } else {
+        tasks_waiting = OS_FALSE;                          /* No                                       */
+    }
+    switch (opt) {
+        case OS_DEL_NO_PEND:                               /* Delete group if no task waiting          */
+             if (tasks_waiting == OS_FALSE) {
+#if OS_FLAG_NAME_EN > 0u
+                 pgrp->OSFlagName     = (INT8U *)(void *)"?";
+#endif
+                 pgrp->OSFlagType     = OS_EVENT_TYPE_UNUSED;
+                 pgrp->OSFlagWaitList = (void *)OSFlagFreeList; /* Return group to free list           */
+                 pgrp->OSFlagFlags    = (OS_FLAGS)0;
+                 OSFlagFreeList       = pgrp;
+                 OS_EXIT_CRITICAL();
+                 *perr                = OS_ERR_NONE;
+                 pgrp_return          = (OS_FLAG_GRP *)0;  /* Event Flag Group has been deleted        */
+             } else {
+                 OS_EXIT_CRITICAL();
+                 *perr                = OS_ERR_TASK_WAITING;
+                 pgrp_return          = pgrp;
+             }
+             break;
+
+        case OS_DEL_ALWAYS:                                /* Always delete the event flag group       */
+             pnode = (OS_FLAG_NODE *)pgrp->OSFlagWaitList;
+             while (pnode != (OS_FLAG_NODE *)0) {          /* Ready ALL tasks waiting for flags        */
+                 (void)OS_FlagTaskRdy(pnode, (OS_FLAGS)0, OS_STAT_PEND_ABORT);
+                 pnode = (OS_FLAG_NODE *)pnode->OSFlagNodeNext;
+             }
+#if OS_FLAG_NAME_EN > 0u
+             pgrp->OSFlagName     = (INT8U *)(void *)"?";
+#endif
+             pgrp->OSFlagType     = OS_EVENT_TYPE_UNUSED;
+             pgrp->OSFlagWaitList = (void *)OSFlagFreeList;/* Return group to free list                */
+             pgrp->OSFlagFlags    = (OS_FLAGS)0;
+             OSFlagFreeList       = pgrp;
+             OS_EXIT_CRITICAL();
+             if (tasks_waiting == OS_TRUE) {               /* Reschedule only if task(s) were waiting  */
+                 OS_Sched();                               /* Find highest priority task ready to run  */
+             }
+             *perr = OS_ERR_NONE;
+             pgrp_return          = (OS_FLAG_GRP *)0;      /* Event Flag Group has been deleted        */
+             break;
+
+        default:
+             OS_EXIT_CRITICAL();
+             *perr                = OS_ERR_INVALID_OPT;
+             pgrp_return          = pgrp;
+             break;
+    }
+    return (pgrp_return);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                 GET THE NAME OF AN EVENT FLAG GROUP
+*
+* Description: This function is used to obtain the name assigned to an event flag group
+*
+* Arguments  : pgrp      is a pointer to the event flag group.
+*
+*              pname     is pointer to a pointer to an ASCII string that will receive the name of the event flag
+*                        group.
+*
+*              perr      is a pointer to an error code that can contain one of the following values:
+*
+*                        OS_ERR_NONE                if the requested task is resumed
+*                        OS_ERR_EVENT_TYPE          if 'pevent' is not pointing to an event flag group
+*                        OS_ERR_PNAME_NULL          You passed a NULL pointer for 'pname'
+*                        OS_ERR_FLAG_INVALID_PGRP   if you passed a NULL pointer for 'pgrp'
+*                        OS_ERR_NAME_GET_ISR        if you called this function from an ISR
+*
+* Returns    : The length of the string or 0 if the 'pgrp' is a NULL pointer.
+*********************************************************************************************************
+*/
+
+#if OS_FLAG_NAME_EN > 0u
+INT8U  OSFlagNameGet (OS_FLAG_GRP   *pgrp,
+                      INT8U        **pname,
+                      INT8U         *perr)
+{
+    INT8U      len;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pgrp == (OS_FLAG_GRP *)0) {              /* Is 'pgrp' a NULL pointer?                          */
+        *perr = OS_ERR_FLAG_INVALID_PGRP;
+        return (0u);
+    }
+    if (pname == (INT8U **)0) {                   /* Is 'pname' a NULL pointer?                         */
+        *perr = OS_ERR_PNAME_NULL;
+        return (0u);
+    }
+#endif
+    if (OSIntNesting > 0u) {                     /* See if trying to call from an ISR                  */
+        *perr = OS_ERR_NAME_GET_ISR;
+        return (0u);
+    }
+    OS_ENTER_CRITICAL();
+    if (pgrp->OSFlagType != OS_EVENT_TYPE_FLAG) {
+        OS_EXIT_CRITICAL();
+        *perr = OS_ERR_EVENT_TYPE;
+        return (0u);
+    }
+    *pname = pgrp->OSFlagName;
+    len    = OS_StrLen(*pname);
+    OS_EXIT_CRITICAL();
+    *perr  = OS_ERR_NONE;
+    return (len);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                ASSIGN A NAME TO AN EVENT FLAG GROUP
+*
+* Description: This function assigns a name to an event flag group.
+*
+* Arguments  : pgrp      is a pointer to the event flag group.
+*
+*              pname     is a pointer to an ASCII string that will be used as the name of the event flag
+*                        group.
+*
+*              perr      is a pointer to an error code that can contain one of the following values:
+*
+*                        OS_ERR_NONE                if the requested task is resumed
+*                        OS_ERR_EVENT_TYPE          if 'pevent' is not pointing to an event flag group
+*                        OS_ERR_PNAME_NULL          You passed a NULL pointer for 'pname'
+*                        OS_ERR_FLAG_INVALID_PGRP   if you passed a NULL pointer for 'pgrp'
+*                        OS_ERR_NAME_SET_ISR        if you called this function from an ISR
+*
+* Returns    : None
+*********************************************************************************************************
+*/
+
+#if OS_FLAG_NAME_EN > 0u
+void  OSFlagNameSet (OS_FLAG_GRP  *pgrp,
+                     INT8U        *pname,
+                     INT8U        *perr)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pgrp == (OS_FLAG_GRP *)0) {              /* Is 'pgrp' a NULL pointer?                          */
+        *perr = OS_ERR_FLAG_INVALID_PGRP;
+        return;
+    }
+    if (pname == (INT8U *)0) {                   /* Is 'pname' a NULL pointer?                         */
+        *perr = OS_ERR_PNAME_NULL;
+        return;
+    }
+#endif
+    if (OSIntNesting > 0u) {                     /* See if trying to call from an ISR                  */
+        *perr = OS_ERR_NAME_SET_ISR;
+        return;
+    }
+    OS_ENTER_CRITICAL();
+    if (pgrp->OSFlagType != OS_EVENT_TYPE_FLAG) {
+        OS_EXIT_CRITICAL();
+        *perr = OS_ERR_EVENT_TYPE;
+        return;
+    }
+    pgrp->OSFlagName = pname;
+    OS_EXIT_CRITICAL();
+    *perr            = OS_ERR_NONE;
+    return;
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                     WAIT ON AN EVENT FLAG GROUP
+*
+* Description: This function is called to wait for a combination of bits to be set in an event flag
+*              group.  Your application can wait for ANY bit to be set or ALL bits to be set.
+*
+* Arguments  : pgrp          is a pointer to the desired event flag group.
+*
+*              flags         Is a bit pattern indicating which bit(s) (i.e. flags) you wish to wait for.
+*                            The bits you want are specified by setting the corresponding bits in
+*                            'flags'.  e.g. if your application wants to wait for bits 0 and 1 then
+*                            'flags' would contain 0x03.
+*
+*              wait_type     specifies whether you want ALL bits to be set or ANY of the bits to be set.
+*                            You can specify the following argument:
+*
+*                            OS_FLAG_WAIT_CLR_ALL   You will wait for ALL bits in 'mask' to be clear (0)
+*                            OS_FLAG_WAIT_SET_ALL   You will wait for ALL bits in 'mask' to be set   (1)
+*                            OS_FLAG_WAIT_CLR_ANY   You will wait for ANY bit  in 'mask' to be clear (0)
+*                            OS_FLAG_WAIT_SET_ANY   You will wait for ANY bit  in 'mask' to be set   (1)
+*
+*                            NOTE: Add OS_FLAG_CONSUME if you want the event flag to be 'consumed' by
+*                                  the call.  Example, to wait for any flag in a group AND then clear
+*                                  the flags that are present, set 'wait_type' to:
+*
+*                                  OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME
+*
+*              timeout       is an optional timeout (in clock ticks) that your task will wait for the
+*                            desired bit combination.  If you specify 0, however, your task will wait
+*                            forever at the specified event flag group or, until a message arrives.
+*
+*              perr          is a pointer to an error code and can be:
+*                            OS_ERR_NONE               The desired bits have been set within the specified
+*                                                      'timeout'.
+*                            OS_ERR_PEND_ISR           If you tried to PEND from an ISR
+*                            OS_ERR_FLAG_INVALID_PGRP  If 'pgrp' is a NULL pointer.
+*                            OS_ERR_EVENT_TYPE         You are not pointing to an event flag group
+*                            OS_ERR_TIMEOUT            The bit(s) have not been set in the specified
+*                                                      'timeout'.
+*                            OS_ERR_PEND_ABORT         The wait on the flag was aborted.
+*                            OS_ERR_FLAG_WAIT_TYPE     You didn't specify a proper 'wait_type' argument.
+*
+* Returns    : The flags in the event flag group that made the task ready or, 0 if a timeout or an error
+*              occurred.
+*
+* Called from: Task ONLY
+*
+* Note(s)    : 1) IMPORTANT, the behavior of this function has changed from PREVIOUS versions.  The
+*                 function NOW returns the flags that were ready INSTEAD of the current state of the
+*                 event flags.
+*********************************************************************************************************
+*/
+
+OS_FLAGS  OSFlagPend (OS_FLAG_GRP  *pgrp,
+                      OS_FLAGS      flags,
+                      INT8U         wait_type,
+                      INT32U        timeout,
+                      INT8U        *perr)
+{
+    OS_FLAG_NODE  node;
+    OS_FLAGS      flags_rdy;
+    INT8U         result;
+    INT8U         pend_stat;
+    BOOLEAN       consume;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR     cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_FLAGS)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pgrp == (OS_FLAG_GRP *)0) {                        /* Validate 'pgrp'                          */
+        *perr = OS_ERR_FLAG_INVALID_PGRP;
+        return ((OS_FLAGS)0);
+    }
+#endif
+    if (OSIntNesting > 0u) {                               /* See if called from ISR ...               */
+        *perr = OS_ERR_PEND_ISR;                           /* ... can't PEND from an ISR               */
+        return ((OS_FLAGS)0);
+    }
+    if (OSLockNesting > 0u) {                              /* See if called with scheduler locked ...  */
+        *perr = OS_ERR_PEND_LOCKED;                        /* ... can't PEND when locked               */
+        return ((OS_FLAGS)0);
+    }
+    if (pgrp->OSFlagType != OS_EVENT_TYPE_FLAG) {          /* Validate event block type                */
+        *perr = OS_ERR_EVENT_TYPE;
+        return ((OS_FLAGS)0);
+    }
+    result = (INT8U)(wait_type & OS_FLAG_CONSUME);
+    if (result != (INT8U)0) {                              /* See if we need to consume the flags      */
+        wait_type &= (INT8U)~(INT8U)OS_FLAG_CONSUME;
+        consume    = OS_TRUE;
+    } else {
+        consume    = OS_FALSE;
+    }
+/*$PAGE*/
+    OS_ENTER_CRITICAL();
+    switch (wait_type) {
+        case OS_FLAG_WAIT_SET_ALL:                         /* See if all required flags are set        */
+             flags_rdy = (OS_FLAGS)(pgrp->OSFlagFlags & flags);   /* Extract only the bits we want     */
+             if (flags_rdy == flags) {                     /* Must match ALL the bits that we want     */
+                 if (consume == OS_TRUE) {                 /* See if we need to consume the flags      */
+                     pgrp->OSFlagFlags &= (OS_FLAGS)~flags_rdy;   /* Clear ONLY the flags we wanted    */
+                 }
+                 OSTCBCur->OSTCBFlagsRdy = flags_rdy;      /* Save flags that were ready               */
+                 OS_EXIT_CRITICAL();                       /* Yes, condition met, return to caller     */
+                 *perr                   = OS_ERR_NONE;
+                 return (flags_rdy);
+             } else {                                      /* Block task until events occur or timeout */
+                 OS_FlagBlock(pgrp, &node, flags, wait_type, timeout);
+                 OS_EXIT_CRITICAL();
+             }
+             break;
+
+        case OS_FLAG_WAIT_SET_ANY:
+             flags_rdy = (OS_FLAGS)(pgrp->OSFlagFlags & flags);    /* Extract only the bits we want    */
+             if (flags_rdy != (OS_FLAGS)0) {               /* See if any flag set                      */
+                 if (consume == OS_TRUE) {                 /* See if we need to consume the flags      */
+                     pgrp->OSFlagFlags &= (OS_FLAGS)~flags_rdy;    /* Clear ONLY the flags that we got */
+                 }
+                 OSTCBCur->OSTCBFlagsRdy = flags_rdy;      /* Save flags that were ready               */
+                 OS_EXIT_CRITICAL();                       /* Yes, condition met, return to caller     */
+                 *perr                   = OS_ERR_NONE;
+                 return (flags_rdy);
+             } else {                                      /* Block task until events occur or timeout */
+                 OS_FlagBlock(pgrp, &node, flags, wait_type, timeout);
+                 OS_EXIT_CRITICAL();
+             }
+             break;
+
+#if OS_FLAG_WAIT_CLR_EN > 0u
+        case OS_FLAG_WAIT_CLR_ALL:                         /* See if all required flags are cleared    */
+             flags_rdy = (OS_FLAGS)~pgrp->OSFlagFlags & flags;    /* Extract only the bits we want     */
+             if (flags_rdy == flags) {                     /* Must match ALL the bits that we want     */
+                 if (consume == OS_TRUE) {                 /* See if we need to consume the flags      */
+                     pgrp->OSFlagFlags |= flags_rdy;       /* Set ONLY the flags that we wanted        */
+                 }
+                 OSTCBCur->OSTCBFlagsRdy = flags_rdy;      /* Save flags that were ready               */
+                 OS_EXIT_CRITICAL();                       /* Yes, condition met, return to caller     */
+                 *perr                   = OS_ERR_NONE;
+                 return (flags_rdy);
+             } else {                                      /* Block task until events occur or timeout */
+                 OS_FlagBlock(pgrp, &node, flags, wait_type, timeout);
+                 OS_EXIT_CRITICAL();
+             }
+             break;
+
+        case OS_FLAG_WAIT_CLR_ANY:
+             flags_rdy = (OS_FLAGS)~pgrp->OSFlagFlags & flags;   /* Extract only the bits we want      */
+             if (flags_rdy != (OS_FLAGS)0) {               /* See if any flag cleared                  */
+                 if (consume == OS_TRUE) {                 /* See if we need to consume the flags      */
+                     pgrp->OSFlagFlags |= flags_rdy;       /* Set ONLY the flags that we got           */
+                 }
+                 OSTCBCur->OSTCBFlagsRdy = flags_rdy;      /* Save flags that were ready               */
+                 OS_EXIT_CRITICAL();                       /* Yes, condition met, return to caller     */
+                 *perr                   = OS_ERR_NONE;
+                 return (flags_rdy);
+             } else {                                      /* Block task until events occur or timeout */
+                 OS_FlagBlock(pgrp, &node, flags, wait_type, timeout);
+                 OS_EXIT_CRITICAL();
+             }
+             break;
+#endif
+
+        default:
+             OS_EXIT_CRITICAL();
+             flags_rdy = (OS_FLAGS)0;
+             *perr      = OS_ERR_FLAG_WAIT_TYPE;
+             return (flags_rdy);
+    }
+/*$PAGE*/
+    OS_Sched();                                            /* Find next HPT ready to run               */
+    OS_ENTER_CRITICAL();
+    if (OSTCBCur->OSTCBStatPend != OS_STAT_PEND_OK) {      /* Have we timed-out or aborted?            */
+        pend_stat                = OSTCBCur->OSTCBStatPend;
+        OSTCBCur->OSTCBStatPend  = OS_STAT_PEND_OK;
+        OS_FlagUnlink(&node);
+        OSTCBCur->OSTCBStat      = OS_STAT_RDY;            /* Yes, make task ready-to-run              */
+        OS_EXIT_CRITICAL();
+        flags_rdy                = (OS_FLAGS)0;
+        switch (pend_stat) {
+            case OS_STAT_PEND_ABORT:
+                 *perr = OS_ERR_PEND_ABORT;                /* Indicate that we aborted   waiting       */
+                 break;
+
+            case OS_STAT_PEND_TO:
+            default:
+                 *perr = OS_ERR_TIMEOUT;                   /* Indicate that we timed-out waiting       */
+                 break;
+        }
+        return (flags_rdy);
+    }
+    flags_rdy = OSTCBCur->OSTCBFlagsRdy;
+    if (consume == OS_TRUE) {                              /* See if we need to consume the flags      */
+        switch (wait_type) {
+            case OS_FLAG_WAIT_SET_ALL:
+            case OS_FLAG_WAIT_SET_ANY:                     /* Clear ONLY the flags we got              */
+                 pgrp->OSFlagFlags &= (OS_FLAGS)~flags_rdy;
+                 break;
+
+#if OS_FLAG_WAIT_CLR_EN > 0u
+            case OS_FLAG_WAIT_CLR_ALL:
+            case OS_FLAG_WAIT_CLR_ANY:                     /* Set   ONLY the flags we got              */
+                 pgrp->OSFlagFlags |=  flags_rdy;
+                 break;
+#endif
+            default:
+                 OS_EXIT_CRITICAL();
+                 *perr = OS_ERR_FLAG_WAIT_TYPE;
+                 return ((OS_FLAGS)0);
+        }
+    }
+    OS_EXIT_CRITICAL();
+    *perr = OS_ERR_NONE;                                   /* Event(s) must have occurred              */
+    return (flags_rdy);
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                              GET FLAGS WHO CAUSED TASK TO BECOME READY
+*
+* Description: This function is called to obtain the flags that caused the task to become ready to run.
+*              In other words, this function allows you to tell "Who done it!".
+*
+* Arguments  : None
+*
+* Returns    : The flags that caused the task to be ready.
+*
+* Called from: Task ONLY
+*********************************************************************************************************
+*/
+
+OS_FLAGS  OSFlagPendGetFlagsRdy (void)
+{
+    OS_FLAGS      flags;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR     cpu_sr = 0u;
+#endif
+
+
+
+    OS_ENTER_CRITICAL();
+    flags = OSTCBCur->OSTCBFlagsRdy;
+    OS_EXIT_CRITICAL();
+    return (flags);
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       POST EVENT FLAG BIT(S)
+*
+* Description: This function is called to set or clear some bits in an event flag group.  The bits to
+*              set or clear are specified by a 'bit mask'.
+*
+* Arguments  : pgrp          is a pointer to the desired event flag group.
+*
+*              flags         If 'opt' (see below) is OS_FLAG_SET, each bit that is set in 'flags' will
+*                            set the corresponding bit in the event flag group.  e.g. to set bits 0, 4
+*                            and 5 you would set 'flags' to:
+*
+*                                0x31     (note, bit 0 is least significant bit)
+*
+*                            If 'opt' (see below) is OS_FLAG_CLR, each bit that is set in 'flags' will
+*                            CLEAR the corresponding bit in the event flag group.  e.g. to clear bits 0,
+*                            4 and 5 you would specify 'flags' as:
+*
+*                                0x31     (note, bit 0 is least significant bit)
+*
+*              opt           indicates whether the flags will be:
+*                                set     (OS_FLAG_SET) or
+*                                cleared (OS_FLAG_CLR)
+*
+*              perr          is a pointer to an error code and can be:
+*                            OS_ERR_NONE                The call was successfull
+*                            OS_ERR_FLAG_INVALID_PGRP   You passed a NULL pointer
+*                            OS_ERR_EVENT_TYPE          You are not pointing to an event flag group
+*                            OS_ERR_FLAG_INVALID_OPT    You specified an invalid option
+*
+* Returns    : the new value of the event flags bits that are still set.
+*
+* Called From: Task or ISR
+*
+* WARNING(s) : 1) The execution time of this function depends on the number of tasks waiting on the event
+*                 flag group.
+*              2) The amount of time interrupts are DISABLED depends on the number of tasks waiting on
+*                 the event flag group.
+*********************************************************************************************************
+*/
+OS_FLAGS  OSFlagPost (OS_FLAG_GRP  *pgrp,
+                      OS_FLAGS      flags,
+                      INT8U         opt,
+                      INT8U        *perr)
+{
+    OS_FLAG_NODE *pnode;
+    BOOLEAN       sched;
+    OS_FLAGS      flags_cur;
+    OS_FLAGS      flags_rdy;
+    BOOLEAN       rdy;
+#if OS_CRITICAL_METHOD == 3u                         /* Allocate storage for CPU status register       */
+    OS_CPU_SR     cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_FLAGS)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pgrp == (OS_FLAG_GRP *)0) {                  /* Validate 'pgrp'                                */
+        *perr = OS_ERR_FLAG_INVALID_PGRP;
+        return ((OS_FLAGS)0);
+    }
+#endif
+    if (pgrp->OSFlagType != OS_EVENT_TYPE_FLAG) {    /* Make sure we are pointing to an event flag grp */
+        *perr = OS_ERR_EVENT_TYPE;
+        return ((OS_FLAGS)0);
+    }
+/*$PAGE*/
+    OS_ENTER_CRITICAL();
+    switch (opt) {
+        case OS_FLAG_CLR:
+             pgrp->OSFlagFlags &= (OS_FLAGS)~flags;  /* Clear the flags specified in the group         */
+             break;
+
+        case OS_FLAG_SET:
+             pgrp->OSFlagFlags |=  flags;            /* Set   the flags specified in the group         */
+             break;
+
+        default:
+             OS_EXIT_CRITICAL();                     /* INVALID option                                 */
+             *perr = OS_ERR_FLAG_INVALID_OPT;
+             return ((OS_FLAGS)0);
+    }
+    sched = OS_FALSE;                                /* Indicate that we don't need rescheduling       */
+    pnode = (OS_FLAG_NODE *)pgrp->OSFlagWaitList;
+    while (pnode != (OS_FLAG_NODE *)0) {             /* Go through all tasks waiting on event flag(s)  */
+        switch (pnode->OSFlagNodeWaitType) {
+            case OS_FLAG_WAIT_SET_ALL:               /* See if all req. flags are set for current node */
+                 flags_rdy = (OS_FLAGS)(pgrp->OSFlagFlags & pnode->OSFlagNodeFlags);
+                 if (flags_rdy == pnode->OSFlagNodeFlags) {   /* Make task RTR, event(s) Rx'd          */
+                     rdy = OS_FlagTaskRdy(pnode, flags_rdy, OS_STAT_PEND_OK);  
+                     if (rdy == OS_TRUE) {
+                         sched = OS_TRUE;                     /* When done we will reschedule          */
+                     }
+                 }
+                 break;
+
+            case OS_FLAG_WAIT_SET_ANY:               /* See if any flag set                            */
+                 flags_rdy = (OS_FLAGS)(pgrp->OSFlagFlags & pnode->OSFlagNodeFlags);
+                 if (flags_rdy != (OS_FLAGS)0) {              /* Make task RTR, event(s) Rx'd          */
+                     rdy = OS_FlagTaskRdy(pnode, flags_rdy, OS_STAT_PEND_OK);  
+                     if (rdy == OS_TRUE) {
+                         sched = OS_TRUE;                     /* When done we will reschedule          */
+                     }
+                 }
+                 break;
+
+#if OS_FLAG_WAIT_CLR_EN > 0u
+            case OS_FLAG_WAIT_CLR_ALL:               /* See if all req. flags are set for current node */
+                 flags_rdy = (OS_FLAGS)~pgrp->OSFlagFlags & pnode->OSFlagNodeFlags;
+                 if (flags_rdy == pnode->OSFlagNodeFlags) {   /* Make task RTR, event(s) Rx'd          */
+                     rdy = OS_FlagTaskRdy(pnode, flags_rdy, OS_STAT_PEND_OK);  
+                     if (rdy == OS_TRUE) {
+                         sched = OS_TRUE;                     /* When done we will reschedule          */
+                     }
+                 }
+                 break;
+
+            case OS_FLAG_WAIT_CLR_ANY:               /* See if any flag set                            */
+                 flags_rdy = (OS_FLAGS)~pgrp->OSFlagFlags & pnode->OSFlagNodeFlags;
+                 if (flags_rdy != (OS_FLAGS)0) {              /* Make task RTR, event(s) Rx'd          */
+                     rdy = OS_FlagTaskRdy(pnode, flags_rdy, OS_STAT_PEND_OK);  
+                     if (rdy == OS_TRUE) {
+                         sched = OS_TRUE;                     /* When done we will reschedule          */
+                     }
+                 }
+                 break;
+#endif
+            default:
+                 OS_EXIT_CRITICAL();
+                 *perr = OS_ERR_FLAG_WAIT_TYPE;
+                 return ((OS_FLAGS)0);
+        }
+        pnode = (OS_FLAG_NODE *)pnode->OSFlagNodeNext; /* Point to next task waiting for event flag(s) */
+    }
+    OS_EXIT_CRITICAL();
+    if (sched == OS_TRUE) {
+        OS_Sched();
+    }
+    OS_ENTER_CRITICAL();
+    flags_cur = pgrp->OSFlagFlags;
+    OS_EXIT_CRITICAL();
+    *perr     = OS_ERR_NONE;
+    return (flags_cur);
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          QUERY EVENT FLAG
+*
+* Description: This function is used to check the value of the event flag group.
+*
+* Arguments  : pgrp         is a pointer to the desired event flag group.
+*
+*              perr          is a pointer to an error code returned to the called:
+*                            OS_ERR_NONE                The call was successfull
+*                            OS_ERR_FLAG_INVALID_PGRP   You passed a NULL pointer
+*                            OS_ERR_EVENT_TYPE          You are not pointing to an event flag group
+*
+* Returns    : The current value of the event flag group.
+*
+* Called From: Task or ISR
+*********************************************************************************************************
+*/
+
+#if OS_FLAG_QUERY_EN > 0u
+OS_FLAGS  OSFlagQuery (OS_FLAG_GRP  *pgrp,
+                       INT8U        *perr)
+{
+    OS_FLAGS   flags;
+#if OS_CRITICAL_METHOD == 3u                      /* Allocate storage for CPU status register          */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_FLAGS)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pgrp == (OS_FLAG_GRP *)0) {               /* Validate 'pgrp'                                   */
+        *perr = OS_ERR_FLAG_INVALID_PGRP;
+        return ((OS_FLAGS)0);
+    }
+#endif
+    if (pgrp->OSFlagType != OS_EVENT_TYPE_FLAG) { /* Validate event block type                         */
+        *perr = OS_ERR_EVENT_TYPE;
+        return ((OS_FLAGS)0);
+    }
+    OS_ENTER_CRITICAL();
+    flags = pgrp->OSFlagFlags;
+    OS_EXIT_CRITICAL();
+    *perr = OS_ERR_NONE;
+    return (flags);                               /* Return the current value of the event flags       */
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                     SUSPEND TASK UNTIL EVENT FLAG(s) RECEIVED OR TIMEOUT OCCURS
+*
+* Description: This function is internal to uC/OS-II and is used to put a task to sleep until the desired
+*              event flag bit(s) are set.
+*
+* Arguments  : pgrp          is a pointer to the desired event flag group.
+*
+*              pnode         is a pointer to a structure which contains data about the task waiting for
+*                            event flag bit(s) to be set.
+*
+*              flags         Is a bit pattern indicating which bit(s) (i.e. flags) you wish to check.
+*                            The bits you want are specified by setting the corresponding bits in
+*                            'flags'.  e.g. if your application wants to wait for bits 0 and 1 then
+*                            'flags' would contain 0x03.
+*
+*              wait_type     specifies whether you want ALL bits to be set/cleared or ANY of the bits
+*                            to be set/cleared.
+*                            You can specify the following argument:
+*
+*                            OS_FLAG_WAIT_CLR_ALL   You will check ALL bits in 'mask' to be clear (0)
+*                            OS_FLAG_WAIT_CLR_ANY   You will check ANY bit  in 'mask' to be clear (0)
+*                            OS_FLAG_WAIT_SET_ALL   You will check ALL bits in 'mask' to be set   (1)
+*                            OS_FLAG_WAIT_SET_ANY   You will check ANY bit  in 'mask' to be set   (1)
+*
+*              timeout       is the desired amount of time that the task will wait for the event flag
+*                            bit(s) to be set.
+*
+* Returns    : none
+*
+* Called by  : OSFlagPend()  OS_FLAG.C
+*
+* Note(s)    : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+
+static  void  OS_FlagBlock (OS_FLAG_GRP  *pgrp,
+                            OS_FLAG_NODE *pnode,
+                            OS_FLAGS      flags,
+                            INT8U         wait_type,
+                            INT32U        timeout)
+{
+    OS_FLAG_NODE  *pnode_next;
+    INT8U          y;
+
+
+    OSTCBCur->OSTCBStat      |= OS_STAT_FLAG;
+    OSTCBCur->OSTCBStatPend   = OS_STAT_PEND_OK;
+    OSTCBCur->OSTCBDly        = timeout;              /* Store timeout in task's TCB                   */
+#if OS_TASK_DEL_EN > 0u
+    OSTCBCur->OSTCBFlagNode   = pnode;                /* TCB to link to node                           */
+#endif
+    pnode->OSFlagNodeFlags    = flags;                /* Save the flags that we need to wait for       */
+    pnode->OSFlagNodeWaitType = wait_type;            /* Save the type of wait we are doing            */
+    pnode->OSFlagNodeTCB      = (void *)OSTCBCur;     /* Link to task's TCB                            */
+    pnode->OSFlagNodeNext     = pgrp->OSFlagWaitList; /* Add node at beginning of event flag wait list */
+    pnode->OSFlagNodePrev     = (void *)0;
+    pnode->OSFlagNodeFlagGrp  = (void *)pgrp;         /* Link to Event Flag Group                      */
+    pnode_next                = (OS_FLAG_NODE *)pgrp->OSFlagWaitList;
+    if (pnode_next != (void *)0) {                    /* Is this the first NODE to insert?             */
+        pnode_next->OSFlagNodePrev = pnode;           /* No, link in doubly linked list                */
+    }
+    pgrp->OSFlagWaitList = (void *)pnode;
+
+    y            =  OSTCBCur->OSTCBY;                 /* Suspend current task until flag(s) received   */
+    OSRdyTbl[y] &= (OS_PRIO)~OSTCBCur->OSTCBBitX;
+    if (OSRdyTbl[y] == 0x00u) {
+        OSRdyGrp &= (OS_PRIO)~OSTCBCur->OSTCBBitY;
+    }
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                  INITIALIZE THE EVENT FLAG MODULE
+*
+* Description: This function is called by uC/OS-II to initialize the event flag module.  Your application
+*              MUST NOT call this function.  In other words, this function is internal to uC/OS-II.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* WARNING    : You MUST NOT call this function from your code.  This is an INTERNAL function to uC/OS-II.
+*********************************************************************************************************
+*/
+
+void  OS_FlagInit (void)
+{
+#if OS_MAX_FLAGS == 1u
+    OSFlagFreeList                 = (OS_FLAG_GRP *)&OSFlagTbl[0];  /* Only ONE event flag group!      */
+    OSFlagFreeList->OSFlagType     = OS_EVENT_TYPE_UNUSED;
+    OSFlagFreeList->OSFlagWaitList = (void *)0;
+    OSFlagFreeList->OSFlagFlags    = (OS_FLAGS)0;
+#if OS_FLAG_NAME_EN > 0u
+    OSFlagFreeList->OSFlagName     = (INT8U *)"?";
+#endif
+#endif
+
+#if OS_MAX_FLAGS >= 2u
+    INT16U        ix;
+    INT16U        ix_next;
+    OS_FLAG_GRP  *pgrp1;
+    OS_FLAG_GRP  *pgrp2;
+
+
+    OS_MemClr((INT8U *)&OSFlagTbl[0], sizeof(OSFlagTbl));           /* Clear the flag group table      */
+    for (ix = 0u; ix < (OS_MAX_FLAGS - 1u); ix++) {                 /* Init. list of free EVENT FLAGS  */
+        ix_next = ix + 1u;
+        pgrp1 = &OSFlagTbl[ix];
+        pgrp2 = &OSFlagTbl[ix_next];
+        pgrp1->OSFlagType     = OS_EVENT_TYPE_UNUSED;
+        pgrp1->OSFlagWaitList = (void *)pgrp2;
+#if OS_FLAG_NAME_EN > 0u
+        pgrp1->OSFlagName     = (INT8U *)(void *)"?";               /* Unknown name                    */
+#endif
+    }
+    pgrp1                 = &OSFlagTbl[ix];
+    pgrp1->OSFlagType     = OS_EVENT_TYPE_UNUSED;
+    pgrp1->OSFlagWaitList = (void *)0;
+#if OS_FLAG_NAME_EN > 0u
+    pgrp1->OSFlagName     = (INT8U *)(void *)"?";                   /* Unknown name                    */
+#endif
+    OSFlagFreeList        = &OSFlagTbl[0];
+#endif
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                              MAKE TASK READY-TO-RUN, EVENT(s) OCCURRED
+*
+* Description: This function is internal to uC/OS-II and is used to make a task ready-to-run because the
+*              desired event flag bits have been set.
+*
+* Arguments  : pnode         is a pointer to a structure which contains data about the task waiting for
+*                            event flag bit(s) to be set.
+*
+*              flags_rdy     contains the bit pattern of the event flags that cause the task to become
+*                            ready-to-run.
+*
+*              pend_stat   is used to indicate the readied task's pending status:
+*
+*
+* Returns    : OS_TRUE       If the task has been placed in the ready list and thus needs scheduling
+*              OS_FALSE      The task is still not ready to run and thus scheduling is not necessary
+*
+* Called by  : OSFlagsPost() OS_FLAG.C
+*
+* Note(s)    : 1) This function assumes that interrupts are disabled.
+*              2) This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+
+static  BOOLEAN  OS_FlagTaskRdy (OS_FLAG_NODE *pnode,
+                                 OS_FLAGS      flags_rdy,
+                                 INT8U         pend_stat)
+{
+    OS_TCB   *ptcb;
+    BOOLEAN   sched;
+
+
+    ptcb                 = (OS_TCB *)pnode->OSFlagNodeTCB; /* Point to TCB of waiting task             */
+    ptcb->OSTCBDly       = 0u;
+    ptcb->OSTCBFlagsRdy  = flags_rdy;
+    ptcb->OSTCBStat     &= (INT8U)~(INT8U)OS_STAT_FLAG;
+    ptcb->OSTCBStatPend  = pend_stat;
+    if (ptcb->OSTCBStat == OS_STAT_RDY) {                  /* Task now ready?                          */
+        OSRdyGrp               |= ptcb->OSTCBBitY;         /* Put task into ready list                 */
+        OSRdyTbl[ptcb->OSTCBY] |= ptcb->OSTCBBitX;
+        sched                   = OS_TRUE;
+    } else {
+        sched                   = OS_FALSE;
+    }
+    OS_FlagUnlink(pnode);
+    return (sched);
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                              UNLINK EVENT FLAG NODE FROM WAITING LIST
+*
+* Description: This function is internal to uC/OS-II and is used to unlink an event flag node from a
+*              list of tasks waiting for the event flag.
+*
+* Arguments  : pnode         is a pointer to a structure which contains data about the task waiting for
+*                            event flag bit(s) to be set.
+*
+* Returns    : none
+*
+* Called by  : OS_FlagTaskRdy() OS_FLAG.C
+*              OSFlagPend()     OS_FLAG.C
+*              OSTaskDel()      OS_TASK.C
+*
+* Note(s)    : 1) This function assumes that interrupts are disabled.
+*              2) This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+
+void  OS_FlagUnlink (OS_FLAG_NODE *pnode)
+{
+#if OS_TASK_DEL_EN > 0u
+    OS_TCB       *ptcb;
+#endif
+    OS_FLAG_GRP  *pgrp;
+    OS_FLAG_NODE *pnode_prev;
+    OS_FLAG_NODE *pnode_next;
+
+
+    pnode_prev = (OS_FLAG_NODE *)pnode->OSFlagNodePrev;
+    pnode_next = (OS_FLAG_NODE *)pnode->OSFlagNodeNext;
+    if (pnode_prev == (OS_FLAG_NODE *)0) {                      /* Is it first node in wait list?      */
+        pgrp                 = (OS_FLAG_GRP *)pnode->OSFlagNodeFlagGrp;
+        pgrp->OSFlagWaitList = (void *)pnode_next;              /*      Update list for new 1st node   */
+        if (pnode_next != (OS_FLAG_NODE *)0) {
+            pnode_next->OSFlagNodePrev = (OS_FLAG_NODE *)0;     /*      Link new 1st node PREV to NULL */
+        }
+    } else {                                                    /* No,  A node somewhere in the list   */
+        pnode_prev->OSFlagNodeNext = pnode_next;                /*      Link around the node to unlink */
+        if (pnode_next != (OS_FLAG_NODE *)0) {                  /*      Was this the LAST node?        */
+            pnode_next->OSFlagNodePrev = pnode_prev;            /*      No, Link around current node   */
+        }
+    }
+#if OS_TASK_DEL_EN > 0u
+    ptcb                = (OS_TCB *)pnode->OSFlagNodeTCB;
+    ptcb->OSTCBFlagNode = (OS_FLAG_NODE *)0;
+#endif
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_mbox.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_mbox.c
new file mode 100644
index 0000000..4d59af5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_mbox.c
@@ -0,0 +1,654 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                       MESSAGE MAILBOX MANAGEMENT
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_MBOX.C
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#ifndef  OS_MASTER_FILE
+#include 
+#endif
+
+#if OS_MBOX_EN > 0u
+/*
+*********************************************************************************************************
+*                                        ACCEPT MESSAGE FROM MAILBOX
+*
+* Description: This function checks the mailbox to see if a message is available.  Unlike OSMboxPend(),
+*              OSMboxAccept() does not suspend the calling task if a message is not available.
+*
+* Arguments  : pevent        is a pointer to the event control block
+*
+* Returns    : != (void *)0  is the message in the mailbox if one is available.  The mailbox is cleared
+*                            so the next time OSMboxAccept() is called, the mailbox will be empty.
+*              == (void *)0  if the mailbox is empty or,
+*                            if 'pevent' is a NULL pointer or,
+*                            if you didn't pass the proper event pointer.
+*********************************************************************************************************
+*/
+
+#if OS_MBOX_ACCEPT_EN > 0u
+void  *OSMboxAccept (OS_EVENT *pevent)
+{
+    void      *pmsg;
+#if OS_CRITICAL_METHOD == 3u                              /* Allocate storage for CPU status register  */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                        /* Validate 'pevent'                         */
+        return ((void *)0);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MBOX) {      /* Validate event block type                 */
+        return ((void *)0);
+    }
+    OS_ENTER_CRITICAL();
+    pmsg               = pevent->OSEventPtr;
+    pevent->OSEventPtr = (void *)0;                       /* Clear the mailbox                         */
+    OS_EXIT_CRITICAL();
+    return (pmsg);                                        /* Return the message received (or NULL)     */
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          CREATE A MESSAGE MAILBOX
+*
+* Description: This function creates a message mailbox if free event control blocks are available.
+*
+* Arguments  : pmsg          is a pointer to a message that you wish to deposit in the mailbox.  If
+*                            you set this value to the NULL pointer (i.e. (void *)0) then the mailbox
+*                            will be considered empty.
+*
+* Returns    : != (OS_EVENT *)0  is a pointer to the event control clock (OS_EVENT) associated with the
+*                                created mailbox
+*              == (OS_EVENT *)0  if no event control blocks were available
+*********************************************************************************************************
+*/
+
+OS_EVENT  *OSMboxCreate (void *pmsg)
+{
+    OS_EVENT  *pevent;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == OS_TRUE) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_EVENT *)0);
+    }
+#endif
+
+    if (OSIntNesting > 0u) {                     /* See if called from ISR ...                         */
+        return ((OS_EVENT *)0);                  /* ... can't CREATE from an ISR                       */
+    }
+    OS_ENTER_CRITICAL();
+    pevent = OSEventFreeList;                    /* Get next free event control block                  */
+    if (OSEventFreeList != (OS_EVENT *)0) {      /* See if pool of free ECB pool was empty             */
+        OSEventFreeList = (OS_EVENT *)OSEventFreeList->OSEventPtr;
+    }
+    OS_EXIT_CRITICAL();
+    if (pevent != (OS_EVENT *)0) {
+        pevent->OSEventType    = OS_EVENT_TYPE_MBOX;
+        pevent->OSEventCnt     = 0u;
+        pevent->OSEventPtr     = pmsg;           /* Deposit message in event control block             */
+#if OS_EVENT_NAME_EN > 0u
+        pevent->OSEventName    = (INT8U *)(void *)"?";
+#endif
+        OS_EventWaitListInit(pevent);
+    }
+    return (pevent);                             /* Return pointer to event control block              */
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           DELETE A MAIBOX
+*
+* Description: This function deletes a mailbox and readies all tasks pending on the mailbox.
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired
+*                            mailbox.
+*
+*              opt           determines delete options as follows:
+*                            opt == OS_DEL_NO_PEND   Delete the mailbox ONLY if no task pending
+*                            opt == OS_DEL_ALWAYS    Deletes the mailbox even if tasks are waiting.
+*                                                    In this case, all the tasks pending will be readied.
+*
+*              perr          is a pointer to an error code that can contain one of the following values:
+*                            OS_ERR_NONE             The call was successful and the mailbox was deleted
+*                            OS_ERR_DEL_ISR          If you attempted to delete the mailbox from an ISR
+*                            OS_ERR_INVALID_OPT      An invalid option was specified
+*                            OS_ERR_TASK_WAITING     One or more tasks were waiting on the mailbox
+*                            OS_ERR_EVENT_TYPE       If you didn't pass a pointer to a mailbox
+*                            OS_ERR_PEVENT_NULL      If 'pevent' is a NULL pointer.
+*
+* Returns    : pevent        upon error
+*              (OS_EVENT *)0 if the mailbox was successfully deleted.
+*
+* Note(s)    : 1) This function must be used with care.  Tasks that would normally expect the presence of
+*                 the mailbox MUST check the return code of OSMboxPend().
+*              2) OSMboxAccept() callers will not know that the intended mailbox has been deleted!
+*              3) This call can potentially disable interrupts for a long time.  The interrupt disable
+*                 time is directly proportional to the number of tasks waiting on the mailbox.
+*              4) Because ALL tasks pending on the mailbox will be readied, you MUST be careful in
+*                 applications where the mailbox is used for mutual exclusion because the resource(s)
+*                 will no longer be guarded by the mailbox.
+*              5) All tasks that were waiting for the mailbox will be readied and returned an 
+*                 OS_ERR_PEND_ABORT if OSMboxDel() was called with OS_DEL_ALWAYS
+*********************************************************************************************************
+*/
+
+#if OS_MBOX_DEL_EN > 0u
+OS_EVENT  *OSMboxDel (OS_EVENT  *pevent,
+                      INT8U      opt,
+                      INT8U     *perr)
+{
+    BOOLEAN    tasks_waiting;
+    OS_EVENT  *pevent_return;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_EVENT *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                         /* Validate 'pevent'                        */
+        *perr = OS_ERR_PEVENT_NULL;
+        return (pevent);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MBOX) {       /* Validate event block type                */
+        *perr = OS_ERR_EVENT_TYPE;
+        return (pevent);
+    }
+    if (OSIntNesting > 0u) {                               /* See if called from ISR ...               */
+        *perr = OS_ERR_DEL_ISR;                            /* ... can't DELETE from an ISR             */
+        return (pevent);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                        /* See if any tasks waiting on mailbox      */
+        tasks_waiting = OS_TRUE;                           /* Yes                                      */
+    } else {
+        tasks_waiting = OS_FALSE;                          /* No                                       */
+    }
+    switch (opt) {
+        case OS_DEL_NO_PEND:                               /* Delete mailbox only if no task waiting   */
+             if (tasks_waiting == OS_FALSE) {
+#if OS_EVENT_NAME_EN > 0u
+                 pevent->OSEventName = (INT8U *)(void *)"?";
+#endif
+                 pevent->OSEventType = OS_EVENT_TYPE_UNUSED;
+                 pevent->OSEventPtr  = OSEventFreeList;    /* Return Event Control Block to free list  */
+                 pevent->OSEventCnt  = 0u;
+                 OSEventFreeList     = pevent;             /* Get next free event control block        */
+                 OS_EXIT_CRITICAL();
+                 *perr               = OS_ERR_NONE;
+                 pevent_return       = (OS_EVENT *)0;      /* Mailbox has been deleted                 */
+             } else {
+                 OS_EXIT_CRITICAL();
+                 *perr               = OS_ERR_TASK_WAITING;
+                 pevent_return       = pevent;
+             }
+             break;
+
+        case OS_DEL_ALWAYS:                                /* Always delete the mailbox                */
+             while (pevent->OSEventGrp != 0u) {            /* Ready ALL tasks waiting for mailbox      */
+                 (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_MBOX, OS_STAT_PEND_ABORT);
+             }
+#if OS_EVENT_NAME_EN > 0u
+             pevent->OSEventName    = (INT8U *)(void *)"?";
+#endif
+             pevent->OSEventType    = OS_EVENT_TYPE_UNUSED;
+             pevent->OSEventPtr     = OSEventFreeList;     /* Return Event Control Block to free list  */
+             pevent->OSEventCnt     = 0u;
+             OSEventFreeList        = pevent;              /* Get next free event control block        */
+             OS_EXIT_CRITICAL();
+             if (tasks_waiting == OS_TRUE) {               /* Reschedule only if task(s) were waiting  */
+                 OS_Sched();                               /* Find highest priority task ready to run  */
+             }
+             *perr         = OS_ERR_NONE;
+             pevent_return = (OS_EVENT *)0;                /* Mailbox has been deleted                 */
+             break;
+
+        default:
+             OS_EXIT_CRITICAL();
+             *perr         = OS_ERR_INVALID_OPT;
+             pevent_return = pevent;
+             break;
+    }
+    return (pevent_return);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                    PEND ON MAILBOX FOR A MESSAGE
+*
+* Description: This function waits for a message to be sent to a mailbox
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired mailbox
+*
+*              timeout       is an optional timeout period (in clock ticks).  If non-zero, your task will
+*                            wait for a message to arrive at the mailbox up to the amount of time
+*                            specified by this argument.  If you specify 0, however, your task will wait
+*                            forever at the specified mailbox or, until a message arrives.
+*
+*              perr          is a pointer to where an error message will be deposited.  Possible error
+*                            messages are:
+*
+*                            OS_ERR_NONE         The call was successful and your task received a
+*                                                message.
+*                            OS_ERR_TIMEOUT      A message was not received within the specified 'timeout'.
+*                            OS_ERR_PEND_ABORT   The wait on the mailbox was aborted.
+*                            OS_ERR_EVENT_TYPE   Invalid event type
+*                            OS_ERR_PEND_ISR     If you called this function from an ISR and the result
+*                                                would lead to a suspension.
+*                            OS_ERR_PEVENT_NULL  If 'pevent' is a NULL pointer
+*                            OS_ERR_PEND_LOCKED  If you called this function when the scheduler is locked
+*
+* Returns    : != (void *)0  is a pointer to the message received
+*              == (void *)0  if no message was received or,
+*                            if 'pevent' is a NULL pointer or,
+*                            if you didn't pass the proper pointer to the event control block.
+*********************************************************************************************************
+*/
+/*$PAGE*/
+void  *OSMboxPend (OS_EVENT  *pevent,
+                   INT32U     timeout,
+                   INT8U     *perr)
+{
+    void      *pmsg;
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((void *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        *perr = OS_ERR_PEVENT_NULL;
+        return ((void *)0);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MBOX) {  /* Validate event block type                     */
+        *perr = OS_ERR_EVENT_TYPE;
+        return ((void *)0);
+    }
+    if (OSIntNesting > 0u) {                          /* See if called from ISR ...                    */
+        *perr = OS_ERR_PEND_ISR;                      /* ... can't PEND from an ISR                    */
+        return ((void *)0);
+    }
+    if (OSLockNesting > 0u) {                         /* See if called with scheduler locked ...       */
+        *perr = OS_ERR_PEND_LOCKED;                   /* ... can't PEND when locked                    */
+        return ((void *)0);
+    }
+    OS_ENTER_CRITICAL();
+    pmsg = pevent->OSEventPtr;
+    if (pmsg != (void *)0) {                          /* See if there is already a message             */
+        pevent->OSEventPtr = (void *)0;               /* Clear the mailbox                             */
+        OS_EXIT_CRITICAL();
+        *perr = OS_ERR_NONE;
+        return (pmsg);                                /* Return the message received (or NULL)         */
+    }
+    OSTCBCur->OSTCBStat     |= OS_STAT_MBOX;          /* Message not available, task will pend         */
+    OSTCBCur->OSTCBStatPend  = OS_STAT_PEND_OK;
+    OSTCBCur->OSTCBDly       = timeout;               /* Load timeout in TCB                           */
+    OS_EventTaskWait(pevent);                         /* Suspend task until event or timeout occurs    */
+    OS_EXIT_CRITICAL();
+    OS_Sched();                                       /* Find next highest priority task ready to run  */
+    OS_ENTER_CRITICAL();
+    switch (OSTCBCur->OSTCBStatPend) {                /* See if we timed-out or aborted                */
+        case OS_STAT_PEND_OK:
+             pmsg =  OSTCBCur->OSTCBMsg;
+            *perr =  OS_ERR_NONE;
+             break;
+
+        case OS_STAT_PEND_ABORT:
+             pmsg = (void *)0;
+            *perr =  OS_ERR_PEND_ABORT;               /* Indicate that we aborted                      */
+             break;
+
+        case OS_STAT_PEND_TO:
+        default:
+             OS_EventTaskRemove(OSTCBCur, pevent);
+             pmsg = (void *)0;
+            *perr =  OS_ERR_TIMEOUT;                  /* Indicate that we didn't get event within TO   */
+             break;
+    }
+    OSTCBCur->OSTCBStat          =  OS_STAT_RDY;      /* Set   task  status to ready                   */
+    OSTCBCur->OSTCBStatPend      =  OS_STAT_PEND_OK;  /* Clear pend  status                            */
+    OSTCBCur->OSTCBEventPtr      = (OS_EVENT  *)0;    /* Clear event pointers                          */
+#if (OS_EVENT_MULTI_EN > 0u)
+    OSTCBCur->OSTCBEventMultiPtr = (OS_EVENT **)0;
+#endif
+    OSTCBCur->OSTCBMsg           = (void      *)0;    /* Clear  received message                       */
+    OS_EXIT_CRITICAL();
+    return (pmsg);                                    /* Return received message                       */
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                     ABORT WAITING ON A MESSAGE MAILBOX
+*
+* Description: This function aborts & readies any tasks currently waiting on a mailbox.  This function
+*              should be used to fault-abort the wait on the mailbox, rather than to normally signal
+*              the mailbox via OSMboxPost() or OSMboxPostOpt().
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired mailbox.
+*
+*              opt           determines the type of ABORT performed:
+*                            OS_PEND_OPT_NONE         ABORT wait for a single task (HPT) waiting on the
+*                                                     mailbox
+*                            OS_PEND_OPT_BROADCAST    ABORT wait for ALL tasks that are  waiting on the
+*                                                     mailbox
+*
+*              perr          is a pointer to where an error message will be deposited.  Possible error
+*                            messages are:
+*
+*                            OS_ERR_NONE         No tasks were     waiting on the mailbox.
+*                            OS_ERR_PEND_ABORT   At least one task waiting on the mailbox was readied
+*                                                and informed of the aborted wait; check return value
+*                                                for the number of tasks whose wait on the mailbox
+*                                                was aborted.
+*                            OS_ERR_EVENT_TYPE   If you didn't pass a pointer to a mailbox.
+*                            OS_ERR_PEVENT_NULL  If 'pevent' is a NULL pointer.
+*
+* Returns    : == 0          if no tasks were waiting on the mailbox, or upon error.
+*              >  0          if one or more tasks waiting on the mailbox are now readied and informed.
+*********************************************************************************************************
+*/
+
+#if OS_MBOX_PEND_ABORT_EN > 0u
+INT8U  OSMboxPendAbort (OS_EVENT  *pevent,
+                        INT8U      opt,
+                        INT8U     *perr)
+{
+    INT8U      nbr_tasks;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                         /* Validate 'pevent'                        */
+        *perr = OS_ERR_PEVENT_NULL;
+        return (0u);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MBOX) {       /* Validate event block type                */
+        *perr = OS_ERR_EVENT_TYPE;
+        return (0u);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                        /* See if any task waiting on mailbox?      */
+        nbr_tasks = 0u;
+        switch (opt) {
+            case OS_PEND_OPT_BROADCAST:                    /* Do we need to abort ALL waiting tasks?   */
+                 while (pevent->OSEventGrp != 0u) {        /* Yes, ready ALL tasks waiting on mailbox  */
+                     (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_MBOX, OS_STAT_PEND_ABORT);
+                     nbr_tasks++;
+                 }
+                 break;
+
+            case OS_PEND_OPT_NONE:
+            default:                                       /* No,  ready HPT       waiting on mailbox  */
+                 (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_MBOX, OS_STAT_PEND_ABORT);
+                 nbr_tasks++;
+                 break;
+        }
+        OS_EXIT_CRITICAL();
+        OS_Sched();                                        /* Find HPT ready to run                    */
+        *perr = OS_ERR_PEND_ABORT;
+        return (nbr_tasks);
+    }
+    OS_EXIT_CRITICAL();
+    *perr = OS_ERR_NONE;
+    return (0u);                                           /* No tasks waiting on mailbox              */
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                      POST MESSAGE TO A MAILBOX
+*
+* Description: This function sends a message to a mailbox
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired mailbox
+*
+*              pmsg          is a pointer to the message to send.  You MUST NOT send a NULL pointer.
+*
+* Returns    : OS_ERR_NONE          The call was successful and the message was sent
+*              OS_ERR_MBOX_FULL     If the mailbox already contains a message.  You can can only send one
+*                                   message at a time and thus, the message MUST be consumed before you
+*                                   are allowed to send another one.
+*              OS_ERR_EVENT_TYPE    If you are attempting to post to a non mailbox.
+*              OS_ERR_PEVENT_NULL   If 'pevent' is a NULL pointer
+*              OS_ERR_POST_NULL_PTR If you are attempting to post a NULL pointer
+*
+* Note(s)    : 1) HPT means Highest Priority Task
+*********************************************************************************************************
+*/
+
+#if OS_MBOX_POST_EN > 0u
+INT8U  OSMboxPost (OS_EVENT  *pevent,
+                   void      *pmsg)
+{
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        return (OS_ERR_PEVENT_NULL);
+    }
+    if (pmsg == (void *)0) {                          /* Make sure we are not posting a NULL pointer   */
+        return (OS_ERR_POST_NULL_PTR);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MBOX) {  /* Validate event block type                     */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                   /* See if any task pending on mailbox            */
+                                                      /* Ready HPT waiting on event                    */
+        (void)OS_EventTaskRdy(pevent, pmsg, OS_STAT_MBOX, OS_STAT_PEND_OK);
+        OS_EXIT_CRITICAL();
+        OS_Sched();                                   /* Find highest priority task ready to run       */
+        return (OS_ERR_NONE);
+    }
+    if (pevent->OSEventPtr != (void *)0) {            /* Make sure mailbox doesn't already have a msg  */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_MBOX_FULL);
+    }
+    pevent->OSEventPtr = pmsg;                        /* Place message in mailbox                      */
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                      POST MESSAGE TO A MAILBOX
+*
+* Description: This function sends a message to a mailbox
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired mailbox
+*
+*              pmsg          is a pointer to the message to send.  You MUST NOT send a NULL pointer.
+*
+*              opt           determines the type of POST performed:
+*                            OS_POST_OPT_NONE         POST to a single waiting task
+*                                                     (Identical to OSMboxPost())
+*                            OS_POST_OPT_BROADCAST    POST to ALL tasks that are waiting on the mailbox
+*
+*                            OS_POST_OPT_NO_SCHED     Indicates that the scheduler will NOT be invoked
+*
+* Returns    : OS_ERR_NONE          The call was successful and the message was sent
+*              OS_ERR_MBOX_FULL     If the mailbox already contains a message.  You can can only send one
+*                                   message at a time and thus, the message MUST be consumed before you
+*                                   are allowed to send another one.
+*              OS_ERR_EVENT_TYPE    If you are attempting to post to a non mailbox.
+*              OS_ERR_PEVENT_NULL   If 'pevent' is a NULL pointer
+*              OS_ERR_POST_NULL_PTR If you are attempting to post a NULL pointer
+*
+* Note(s)    : 1) HPT means Highest Priority Task
+*
+* Warning    : Interrupts can be disabled for a long time if you do a 'broadcast'.  In fact, the
+*              interrupt disable time is proportional to the number of tasks waiting on the mailbox.
+*********************************************************************************************************
+*/
+
+#if OS_MBOX_POST_OPT_EN > 0u
+INT8U  OSMboxPostOpt (OS_EVENT  *pevent,
+                      void      *pmsg,
+                      INT8U      opt)
+{
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        return (OS_ERR_PEVENT_NULL);
+    }
+    if (pmsg == (void *)0) {                          /* Make sure we are not posting a NULL pointer   */
+        return (OS_ERR_POST_NULL_PTR);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MBOX) {  /* Validate event block type                     */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                   /* See if any task pending on mailbox            */
+        if ((opt & OS_POST_OPT_BROADCAST) != 0x00u) { /* Do we need to post msg to ALL waiting tasks ? */
+            while (pevent->OSEventGrp != 0u) {        /* Yes, Post to ALL tasks waiting on mailbox     */
+                (void)OS_EventTaskRdy(pevent, pmsg, OS_STAT_MBOX, OS_STAT_PEND_OK);
+            }
+        } else {                                      /* No,  Post to HPT waiting on mbox              */
+            (void)OS_EventTaskRdy(pevent, pmsg, OS_STAT_MBOX, OS_STAT_PEND_OK);
+        }
+        OS_EXIT_CRITICAL();
+        if ((opt & OS_POST_OPT_NO_SCHED) == 0u) {     /* See if scheduler needs to be invoked          */
+            OS_Sched();                               /* Find HPT ready to run                         */
+        }
+        return (OS_ERR_NONE);
+    }
+    if (pevent->OSEventPtr != (void *)0) {            /* Make sure mailbox doesn't already have a msg  */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_MBOX_FULL);
+    }
+    pevent->OSEventPtr = pmsg;                        /* Place message in mailbox                      */
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       QUERY A MESSAGE MAILBOX
+*
+* Description: This function obtains information about a message mailbox.
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired mailbox
+*
+*              p_mbox_data   is a pointer to a structure that will contain information about the message
+*                            mailbox.
+*
+* Returns    : OS_ERR_NONE         The call was successful and the message was sent
+*              OS_ERR_EVENT_TYPE   If you are attempting to obtain data from a non mailbox.
+*              OS_ERR_PEVENT_NULL  If 'pevent'      is a NULL pointer
+*              OS_ERR_PDATA_NULL   If 'p_mbox_data' is a NULL pointer
+*********************************************************************************************************
+*/
+
+#if OS_MBOX_QUERY_EN > 0u
+INT8U  OSMboxQuery (OS_EVENT      *pevent,
+                    OS_MBOX_DATA  *p_mbox_data)
+{
+    INT8U       i;
+    OS_PRIO    *psrc;
+    OS_PRIO    *pdest;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR   cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                         /* Validate 'pevent'                        */
+        return (OS_ERR_PEVENT_NULL);
+    }
+    if (p_mbox_data == (OS_MBOX_DATA *)0) {                /* Validate 'p_mbox_data'                   */
+        return (OS_ERR_PDATA_NULL);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MBOX) {       /* Validate event block type                */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    p_mbox_data->OSEventGrp = pevent->OSEventGrp;          /* Copy message mailbox wait list           */
+    psrc                    = &pevent->OSEventTbl[0];
+    pdest                   = &p_mbox_data->OSEventTbl[0];
+    for (i = 0u; i < OS_EVENT_TBL_SIZE; i++) {
+        *pdest++ = *psrc++;
+    }
+    p_mbox_data->OSMsg = pevent->OSEventPtr;               /* Get message from mailbox                 */
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif                                                     /* OS_MBOX_QUERY_EN                         */
+#endif                                                     /* OS_MBOX_EN                               */
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_mem.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_mem.c
new file mode 100644
index 0000000..badcccc
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_mem.c
@@ -0,0 +1,462 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                            MEMORY MANAGEMENT
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_MEM.C
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#ifndef  OS_MASTER_FILE
+#include 
+#endif
+
+#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u)
+/*
+*********************************************************************************************************
+*                                      CREATE A MEMORY PARTITION
+*
+* Description : Create a fixed-sized memory partition that will be managed by uC/OS-II.
+*
+* Arguments   : addr     is the starting address of the memory partition
+*
+*               nblks    is the number of memory blocks to create from the partition.
+*
+*               blksize  is the size (in bytes) of each block in the memory partition.
+*
+*               perr     is a pointer to a variable containing an error message which will be set by
+*                        this function to either:
+*
+*                        OS_ERR_NONE              if the memory partition has been created correctly.
+*                        OS_ERR_MEM_INVALID_ADDR  if you are specifying an invalid address for the memory
+*                                                 storage of the partition or, the block does not align
+*                                                 on a pointer boundary
+*                        OS_ERR_MEM_INVALID_PART  no free partitions available
+*                        OS_ERR_MEM_INVALID_BLKS  user specified an invalid number of blocks (must be >= 2)
+*                        OS_ERR_MEM_INVALID_SIZE  user specified an invalid block size
+*                                                   - must be greater than the size of a pointer
+*                                                   - must be able to hold an integral number of pointers
+* Returns    : != (OS_MEM *)0  is the partition was created
+*              == (OS_MEM *)0  if the partition was not created because of invalid arguments or, no
+*                              free partition is available.
+*********************************************************************************************************
+*/
+
+OS_MEM  *OSMemCreate (void   *addr,
+                      INT32U  nblks,
+                      INT32U  blksize,
+                      INT8U  *perr)
+{
+    OS_MEM    *pmem;
+    INT8U     *pblk;
+    void     **plink;
+    INT32U     loops;
+    INT32U     i;
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_MEM *)0);
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == OS_TRUE) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_MEM *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (addr == (void *)0) {                          /* Must pass a valid address for the memory part.*/
+        *perr = OS_ERR_MEM_INVALID_ADDR;
+        return ((OS_MEM *)0);
+    }
+    if (((INT32U)addr & (sizeof(void *) - 1u)) != 0u){  /* Must be pointer size aligned                */
+        *perr = OS_ERR_MEM_INVALID_ADDR;
+        return ((OS_MEM *)0);
+    }
+    if (nblks < 2u) {                                 /* Must have at least 2 blocks per partition     */
+        *perr = OS_ERR_MEM_INVALID_BLKS;
+        return ((OS_MEM *)0);
+    }
+    if (blksize < sizeof(void *)) {                   /* Must contain space for at least a pointer     */
+        *perr = OS_ERR_MEM_INVALID_SIZE;
+        return ((OS_MEM *)0);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    pmem = OSMemFreeList;                             /* Get next free memory partition                */
+    if (OSMemFreeList != (OS_MEM *)0) {               /* See if pool of free partitions was empty      */
+        OSMemFreeList = (OS_MEM *)OSMemFreeList->OSMemFreeList;
+    }
+    OS_EXIT_CRITICAL();
+    if (pmem == (OS_MEM *)0) {                        /* See if we have a memory partition             */
+        *perr = OS_ERR_MEM_INVALID_PART;
+        return ((OS_MEM *)0);
+    }
+    plink = (void **)addr;                            /* Create linked list of free memory blocks      */
+    pblk  = (INT8U *)addr;
+    loops  = nblks - 1u;
+    for (i = 0u; i < loops; i++) {
+        pblk +=  blksize;                             /* Point to the FOLLOWING block                  */
+       *plink = (void  *)pblk;                        /* Save pointer to NEXT block in CURRENT block   */
+        plink = (void **)pblk;                        /* Position to  NEXT      block                  */
+    }
+    *plink              = (void *)0;                  /* Last memory block points to NULL              */
+    pmem->OSMemAddr     = addr;                       /* Store start address of memory partition       */
+    pmem->OSMemFreeList = addr;                       /* Initialize pointer to pool of free blocks     */
+    pmem->OSMemNFree    = nblks;                      /* Store number of free blocks in MCB            */
+    pmem->OSMemNBlks    = nblks;
+    pmem->OSMemBlkSize  = blksize;                    /* Store block size of each memory blocks        */
+    *perr               = OS_ERR_NONE;
+    return (pmem);
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         GET A MEMORY BLOCK
+*
+* Description : Get a memory block from a partition
+*
+* Arguments   : pmem    is a pointer to the memory partition control block
+*
+*               perr    is a pointer to a variable containing an error message which will be set by this
+*                       function to either:
+*
+*                       OS_ERR_NONE             if the memory partition has been created correctly.
+*                       OS_ERR_MEM_NO_FREE_BLKS if there are no more free memory blocks to allocate to caller
+*                       OS_ERR_MEM_INVALID_PMEM if you passed a NULL pointer for 'pmem'
+*
+* Returns     : A pointer to a memory block if no error is detected
+*               A pointer to NULL if an error is detected
+*********************************************************************************************************
+*/
+
+void  *OSMemGet (OS_MEM  *pmem,
+                 INT8U   *perr)
+{
+    void      *pblk;
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((void *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pmem == (OS_MEM *)0) {                        /* Must point to a valid memory partition        */
+        *perr = OS_ERR_MEM_INVALID_PMEM;
+        return ((void *)0);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    if (pmem->OSMemNFree > 0u) {                      /* See if there are any free memory blocks       */
+        pblk                = pmem->OSMemFreeList;    /* Yes, point to next free memory block          */
+        pmem->OSMemFreeList = *(void **)pblk;         /*      Adjust pointer to new free list          */
+        pmem->OSMemNFree--;                           /*      One less memory block in this partition  */
+        OS_EXIT_CRITICAL();
+        *perr = OS_ERR_NONE;                          /*      No error                                 */
+        return (pblk);                                /*      Return memory block to caller            */
+    }
+    OS_EXIT_CRITICAL();
+    *perr = OS_ERR_MEM_NO_FREE_BLKS;                  /* No,  Notify caller of empty memory partition  */
+    return ((void *)0);                               /*      Return NULL pointer to caller            */
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                 GET THE NAME OF A MEMORY PARTITION
+*
+* Description: This function is used to obtain the name assigned to a memory partition.
+*
+* Arguments  : pmem      is a pointer to the memory partition
+*
+*              pname     is a pointer to a pointer to an ASCII string that will receive the name of the memory partition.
+*
+*              perr      is a pointer to an error code that can contain one of the following values:
+*
+*                        OS_ERR_NONE                if the name was copied to 'pname'
+*                        OS_ERR_MEM_INVALID_PMEM    if you passed a NULL pointer for 'pmem'
+*                        OS_ERR_PNAME_NULL          You passed a NULL pointer for 'pname'
+*                        OS_ERR_NAME_GET_ISR        You called this function from an ISR
+*
+* Returns    : The length of the string or 0 if 'pmem' is a NULL pointer.
+*********************************************************************************************************
+*/
+
+#if OS_MEM_NAME_EN > 0u
+INT8U  OSMemNameGet (OS_MEM   *pmem,
+                     INT8U   **pname,
+                     INT8U    *perr)
+{
+    INT8U      len;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pmem == (OS_MEM *)0) {                   /* Is 'pmem' a NULL pointer?                          */
+        *perr = OS_ERR_MEM_INVALID_PMEM;
+        return (0u);
+    }
+    if (pname == (INT8U **)0) {                  /* Is 'pname' a NULL pointer?                         */
+        *perr = OS_ERR_PNAME_NULL;
+        return (0u);
+    }
+#endif
+    if (OSIntNesting > 0u) {                     /* See if trying to call from an ISR                  */
+        *perr = OS_ERR_NAME_GET_ISR;
+        return (0u);
+    }
+    OS_ENTER_CRITICAL();
+    *pname = pmem->OSMemName;
+    len    = OS_StrLen(*pname);
+    OS_EXIT_CRITICAL();
+    *perr  = OS_ERR_NONE;
+    return (len);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                 ASSIGN A NAME TO A MEMORY PARTITION
+*
+* Description: This function assigns a name to a memory partition.
+*
+* Arguments  : pmem      is a pointer to the memory partition
+*
+*              pname     is a pointer to an ASCII string that contains the name of the memory partition.
+*
+*              perr      is a pointer to an error code that can contain one of the following values:
+*
+*                        OS_ERR_NONE                if the name was copied to 'pname'
+*                        OS_ERR_MEM_INVALID_PMEM    if you passed a NULL pointer for 'pmem'
+*                        OS_ERR_PNAME_NULL          You passed a NULL pointer for 'pname'
+*                        OS_ERR_MEM_NAME_TOO_LONG   if the name doesn't fit in the storage area
+*                        OS_ERR_NAME_SET_ISR        if you called this function from an ISR
+*
+* Returns    : None
+*********************************************************************************************************
+*/
+
+#if OS_MEM_NAME_EN > 0u
+void  OSMemNameSet (OS_MEM  *pmem,
+                    INT8U   *pname,
+                    INT8U   *perr)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pmem == (OS_MEM *)0) {                   /* Is 'pmem' a NULL pointer?                          */
+        *perr = OS_ERR_MEM_INVALID_PMEM;
+        return;
+    }
+    if (pname == (INT8U *)0) {                   /* Is 'pname' a NULL pointer?                         */
+        *perr = OS_ERR_PNAME_NULL;
+        return;
+    }
+#endif
+    if (OSIntNesting > 0u) {                     /* See if trying to call from an ISR                  */
+        *perr = OS_ERR_NAME_SET_ISR;
+        return;
+    }
+    OS_ENTER_CRITICAL();
+    pmem->OSMemName = pname;
+    OS_EXIT_CRITICAL();
+    *perr           = OS_ERR_NONE;
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       RELEASE A MEMORY BLOCK
+*
+* Description : Returns a memory block to a partition
+*
+* Arguments   : pmem    is a pointer to the memory partition control block
+*
+*               pblk    is a pointer to the memory block being released.
+*
+* Returns     : OS_ERR_NONE              if the memory block was inserted into the partition
+*               OS_ERR_MEM_FULL          if you are returning a memory block to an already FULL memory
+*                                        partition (You freed more blocks than you allocated!)
+*               OS_ERR_MEM_INVALID_PMEM  if you passed a NULL pointer for 'pmem'
+*               OS_ERR_MEM_INVALID_PBLK  if you passed a NULL pointer for the block to release.
+*********************************************************************************************************
+*/
+
+INT8U  OSMemPut (OS_MEM  *pmem,
+                 void    *pblk)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pmem == (OS_MEM *)0) {                   /* Must point to a valid memory partition             */
+        return (OS_ERR_MEM_INVALID_PMEM);
+    }
+    if (pblk == (void *)0) {                     /* Must release a valid block                         */
+        return (OS_ERR_MEM_INVALID_PBLK);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    if (pmem->OSMemNFree >= pmem->OSMemNBlks) {  /* Make sure all blocks not already returned          */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_MEM_FULL);
+    }
+    *(void **)pblk      = pmem->OSMemFreeList;   /* Insert released block into free block list         */
+    pmem->OSMemFreeList = pblk;
+    pmem->OSMemNFree++;                          /* One more memory block in this partition            */
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);                        /* Notify caller that memory block was released       */
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       QUERY MEMORY PARTITION
+*
+* Description : This function is used to determine the number of free memory blocks and the number of
+*               used memory blocks from a memory partition.
+*
+* Arguments   : pmem        is a pointer to the memory partition control block
+*
+*               p_mem_data  is a pointer to a structure that will contain information about the memory
+*                           partition.
+*
+* Returns     : OS_ERR_NONE               if no errors were found.
+*               OS_ERR_MEM_INVALID_PMEM   if you passed a NULL pointer for 'pmem'
+*               OS_ERR_MEM_INVALID_PDATA  if you passed a NULL pointer to the data recipient.
+*********************************************************************************************************
+*/
+
+#if OS_MEM_QUERY_EN > 0u
+INT8U  OSMemQuery (OS_MEM       *pmem,
+                   OS_MEM_DATA  *p_mem_data)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pmem == (OS_MEM *)0) {                   /* Must point to a valid memory partition             */
+        return (OS_ERR_MEM_INVALID_PMEM);
+    }
+    if (p_mem_data == (OS_MEM_DATA *)0) {        /* Must release a valid storage area for the data     */
+        return (OS_ERR_MEM_INVALID_PDATA);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    p_mem_data->OSAddr     = pmem->OSMemAddr;
+    p_mem_data->OSFreeList = pmem->OSMemFreeList;
+    p_mem_data->OSBlkSize  = pmem->OSMemBlkSize;
+    p_mem_data->OSNBlks    = pmem->OSMemNBlks;
+    p_mem_data->OSNFree    = pmem->OSMemNFree;
+    OS_EXIT_CRITICAL();
+    p_mem_data->OSNUsed    = p_mem_data->OSNBlks - p_mem_data->OSNFree;
+    return (OS_ERR_NONE);
+}
+#endif                                           /* OS_MEM_QUERY_EN                                    */
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                 INITIALIZE MEMORY PARTITION MANAGER
+*
+* Description : This function is called by uC/OS-II to initialize the memory partition manager.  Your
+*               application MUST NOT call this function.
+*
+* Arguments   : none
+*
+* Returns     : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+
+void  OS_MemInit (void)
+{
+#if OS_MAX_MEM_PART == 1u
+    OS_MemClr((INT8U *)&OSMemTbl[0], sizeof(OSMemTbl));   /* Clear the memory partition table          */
+    OSMemFreeList               = (OS_MEM *)&OSMemTbl[0]; /* Point to beginning of free list           */
+#if OS_MEM_NAME_EN > 0u
+    OSMemFreeList->OSMemName    = (INT8U *)"?";           /* Unknown name                              */
+#endif
+#endif
+
+#if OS_MAX_MEM_PART >= 2u
+    OS_MEM  *pmem;
+    INT16U   i;
+
+
+    OS_MemClr((INT8U *)&OSMemTbl[0], sizeof(OSMemTbl));   /* Clear the memory partition table          */
+    for (i = 0u; i < (OS_MAX_MEM_PART - 1u); i++) {       /* Init. list of free memory partitions      */
+        pmem                = &OSMemTbl[i];               /* Point to memory control block (MCB)       */
+        pmem->OSMemFreeList = (void *)&OSMemTbl[i + 1u];  /* Chain list of free partitions             */
+#if OS_MEM_NAME_EN > 0u
+        pmem->OSMemName  = (INT8U *)(void *)"?";
+#endif
+    }
+    pmem                = &OSMemTbl[i];
+    pmem->OSMemFreeList = (void *)0;                      /* Initialize last node                      */
+#if OS_MEM_NAME_EN > 0u
+    pmem->OSMemName = (INT8U *)(void *)"?";
+#endif
+
+    OSMemFreeList   = &OSMemTbl[0];                       /* Point to beginning of free list           */
+#endif
+}
+#endif                                                    /* OS_MEM_EN                                 */
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_mutex.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_mutex.c
new file mode 100644
index 0000000..4aeac1c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_mutex.c
@@ -0,0 +1,763 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                  MUTUAL EXCLUSION SEMAPHORE MANAGEMENT
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_MUTEX.C
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#ifndef  OS_MASTER_FILE
+#include 
+#endif
+
+
+#if OS_MUTEX_EN > 0u
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+#define  OS_MUTEX_KEEP_LOWER_8   ((INT16U)0x00FFu)
+#define  OS_MUTEX_KEEP_UPPER_8   ((INT16U)0xFF00u)
+
+#define  OS_MUTEX_AVAILABLE      ((INT16U)0x00FFu)
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+static  void  OSMutex_RdyAtPrio(OS_TCB *ptcb, INT8U prio);
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                  ACCEPT MUTUAL EXCLUSION SEMAPHORE
+*
+* Description: This  function checks the mutual exclusion semaphore to see if a resource is available.
+*              Unlike OSMutexPend(), OSMutexAccept() does not suspend the calling task if the resource is
+*              not available or the event did not occur.
+*
+* Arguments  : pevent     is a pointer to the event control block
+*
+*              perr       is a pointer to an error code which will be returned to your application:
+*                            OS_ERR_NONE         if the call was successful.
+*                            OS_ERR_EVENT_TYPE   if 'pevent' is not a pointer to a mutex
+*                            OS_ERR_PEVENT_NULL  'pevent' is a NULL pointer
+*                            OS_ERR_PEND_ISR     if you called this function from an ISR
+*                            OS_ERR_PCP_LOWER    If the priority of the task that owns the Mutex is
+*                                                HIGHER (i.e. a lower number) than the PCP.  This error
+*                                                indicates that you did not set the PCP higher (lower
+*                                                number) than ALL the tasks that compete for the Mutex.
+*                                                Unfortunately, this is something that could not be
+*                                                detected when the Mutex is created because we don't know
+*                                                what tasks will be using the Mutex.
+*
+* Returns    : == OS_TRUE    if the resource is available, the mutual exclusion semaphore is acquired
+*              == OS_FALSE   a) if the resource is not available
+*                            b) you didn't pass a pointer to a mutual exclusion semaphore
+*                            c) you called this function from an ISR
+*
+* Warning(s) : This function CANNOT be called from an ISR because mutual exclusion semaphores are
+*              intended to be used by tasks only.
+*********************************************************************************************************
+*/
+
+#if OS_MUTEX_ACCEPT_EN > 0u
+BOOLEAN  OSMutexAccept (OS_EVENT  *pevent,
+                        INT8U     *perr)
+{
+    INT8U      pcp;                                    /* Priority Ceiling Priority (PCP)              */
+#if OS_CRITICAL_METHOD == 3u                           /* Allocate storage for CPU status register     */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (OS_FALSE);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                     /* Validate 'pevent'                            */
+        *perr = OS_ERR_PEVENT_NULL;
+        return (OS_FALSE);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MUTEX) {  /* Validate event block type                    */
+        *perr = OS_ERR_EVENT_TYPE;
+        return (OS_FALSE);
+    }
+    if (OSIntNesting > 0u) {                           /* Make sure it's not called from an ISR        */
+        *perr = OS_ERR_PEND_ISR;
+        return (OS_FALSE);
+    }
+    OS_ENTER_CRITICAL();                               /* Get value (0 or 1) of Mutex                  */
+    pcp = (INT8U)(pevent->OSEventCnt >> 8u);           /* Get PCP from mutex                           */
+    if ((pevent->OSEventCnt & OS_MUTEX_KEEP_LOWER_8) == OS_MUTEX_AVAILABLE) {
+        pevent->OSEventCnt &= OS_MUTEX_KEEP_UPPER_8;   /*      Mask off LSByte (Acquire Mutex)         */
+        pevent->OSEventCnt |= OSTCBCur->OSTCBPrio;     /*      Save current task priority in LSByte    */
+        pevent->OSEventPtr  = (void *)OSTCBCur;        /*      Link TCB of task owning Mutex           */
+        if ((pcp != OS_PRIO_MUTEX_CEIL_DIS) &&
+            (OSTCBCur->OSTCBPrio <= pcp)) {            /*      PCP 'must' have a SMALLER prio ...      */
+             OS_EXIT_CRITICAL();                       /*      ... than current task!                  */
+            *perr = OS_ERR_PCP_LOWER;
+        } else {
+             OS_EXIT_CRITICAL();
+            *perr = OS_ERR_NONE;
+        }
+        return (OS_TRUE);
+    }
+    OS_EXIT_CRITICAL();
+    *perr = OS_ERR_NONE;
+    return (OS_FALSE);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                 CREATE A MUTUAL EXCLUSION SEMAPHORE
+*
+* Description: This function creates a mutual exclusion semaphore.
+*
+* Arguments  : prio          is the priority to use when accessing the mutual exclusion semaphore.  In
+*                            other words, when the semaphore is acquired and a higher priority task
+*                            attempts to obtain the semaphore then the priority of the task owning the
+*                            semaphore is raised to this priority.  It is assumed that you will specify
+*                            a priority that is LOWER in value than ANY of the tasks competing for the
+*                            mutex. If the priority is specified as OS_PRIO_MUTEX_CEIL_DIS, then the
+*                            priority ceiling promotion is disabled. This way, the tasks accessing the
+*                            semaphore do not have their priority promoted.
+*
+*              perr          is a pointer to an error code which will be returned to your application:
+*                               OS_ERR_NONE         if the call was successful.
+*                               OS_ERR_CREATE_ISR   if you attempted to create a MUTEX from an ISR
+*                               OS_ERR_PRIO_EXIST   if a task at the priority ceiling priority
+*                                                   already exist.
+*                               OS_ERR_PEVENT_NULL  No more event control blocks available.
+*                               OS_ERR_PRIO_INVALID if the priority you specify is higher that the
+*                                                   maximum allowed (i.e. > OS_LOWEST_PRIO)
+*
+* Returns    : != (void *)0  is a pointer to the event control clock (OS_EVENT) associated with the
+*                            created mutex.
+*              == (void *)0  if an error is detected.
+*
+* Note(s)    : 1) The LEAST significant 8 bits of '.OSEventCnt' hold the priority number of the task
+*                 owning the mutex or 0xFF if no task owns the mutex.
+*
+*              2) The MOST  significant 8 bits of '.OSEventCnt' hold the priority number used to
+*                 reduce priority inversion or 0xFF (OS_PRIO_MUTEX_CEIL_DIS) if priority ceiling
+*                 promotion is disabled.
+*********************************************************************************************************
+*/
+
+OS_EVENT  *OSMutexCreate (INT8U   prio,
+                          INT8U  *perr)
+{
+    OS_EVENT  *pevent;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_EVENT *)0);
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == OS_TRUE) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_EVENT *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio != OS_PRIO_MUTEX_CEIL_DIS) {
+        if (prio >= OS_LOWEST_PRIO) {                      /* Validate PCP                             */
+           *perr = OS_ERR_PRIO_INVALID;
+            return ((OS_EVENT *)0);
+        }
+    }
+#endif
+    if (OSIntNesting > 0u) {                               /* See if called from ISR ...               */
+        *perr = OS_ERR_CREATE_ISR;                         /* ... can't CREATE mutex from an ISR       */
+        return ((OS_EVENT *)0);
+    }
+    OS_ENTER_CRITICAL();
+    if (prio != OS_PRIO_MUTEX_CEIL_DIS) {
+        if (OSTCBPrioTbl[prio] != (OS_TCB *)0) {           /* Mutex priority must not already exist    */
+            OS_EXIT_CRITICAL();                            /* Task already exist at priority ...       */
+           *perr = OS_ERR_PRIO_EXIST;                      /* ... ceiling priority                     */
+            return ((OS_EVENT *)0);
+        }
+        OSTCBPrioTbl[prio] = OS_TCB_RESERVED;              /* Reserve the table entry                  */
+    }
+
+    pevent = OSEventFreeList;                              /* Get next free event control block        */
+    if (pevent == (OS_EVENT *)0) {                         /* See if an ECB was available              */
+        if (prio != OS_PRIO_MUTEX_CEIL_DIS) {
+            OSTCBPrioTbl[prio] = (OS_TCB *)0;              /* No, Release the table entry              */
+        }
+        OS_EXIT_CRITICAL();
+       *perr = OS_ERR_PEVENT_NULL;                         /* No more event control blocks             */
+        return (pevent);
+    }
+    OSEventFreeList     = (OS_EVENT *)OSEventFreeList->OSEventPtr; /* Adjust the free list             */
+    OS_EXIT_CRITICAL();
+    pevent->OSEventType = OS_EVENT_TYPE_MUTEX;
+    pevent->OSEventCnt  = (INT16U)((INT16U)prio << 8u) | OS_MUTEX_AVAILABLE; /* Resource is avail.     */
+    pevent->OSEventPtr  = (void *)0;                       /* No task owning the mutex                 */
+#if OS_EVENT_NAME_EN > 0u
+    pevent->OSEventName = (INT8U *)(void *)"?";
+#endif
+    OS_EventWaitListInit(pevent);
+   *perr = OS_ERR_NONE;
+    return (pevent);
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           DELETE A MUTEX
+*
+* Description: This function deletes a mutual exclusion semaphore and readies all tasks pending on the it.
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired mutex.
+*
+*              opt           determines delete options as follows:
+*                            opt == OS_DEL_NO_PEND   Delete mutex ONLY if no task pending
+*                            opt == OS_DEL_ALWAYS    Deletes the mutex even if tasks are waiting.
+*                                                    In this case, all the tasks pending will be readied.
+*
+*              perr          is a pointer to an error code that can contain one of the following values:
+*                            OS_ERR_NONE             The call was successful and the mutex was deleted
+*                            OS_ERR_DEL_ISR          If you attempted to delete the MUTEX from an ISR
+*                            OS_ERR_INVALID_OPT      An invalid option was specified
+*                            OS_ERR_TASK_WAITING     One or more tasks were waiting on the mutex
+*                            OS_ERR_EVENT_TYPE       If you didn't pass a pointer to a mutex
+*                            OS_ERR_PEVENT_NULL      If 'pevent' is a NULL pointer.
+*
+* Returns    : pevent        upon error
+*              (OS_EVENT *)0 if the mutex was successfully deleted.
+*
+* Note(s)    : 1) This function must be used with care.  Tasks that would normally expect the presence of
+*                 the mutex MUST check the return code of OSMutexPend().
+*
+*              2) This call can potentially disable interrupts for a long time.  The interrupt disable
+*                 time is directly proportional to the number of tasks waiting on the mutex.
+*
+*              3) Because ALL tasks pending on the mutex will be readied, you MUST be careful because the
+*                 resource(s) will no longer be guarded by the mutex.
+*
+*              4) IMPORTANT: In the 'OS_DEL_ALWAYS' case, we assume that the owner of the Mutex (if there
+*                            is one) is ready-to-run and is thus NOT pending on another kernel object or
+*                            has delayed itself.  In other words, if a task owns the mutex being deleted,
+*                            that task will be made ready-to-run at its original priority.
+*********************************************************************************************************
+*/
+
+#if OS_MUTEX_DEL_EN > 0u
+OS_EVENT  *OSMutexDel (OS_EVENT  *pevent,
+                       INT8U      opt,
+                       INT8U     *perr)
+{
+    BOOLEAN    tasks_waiting;
+    OS_EVENT  *pevent_return;
+    INT8U      pcp;                                        /* Priority ceiling priority                */
+    INT8U      prio;
+    OS_TCB    *ptcb;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_EVENT *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                         /* Validate 'pevent'                        */
+        *perr = OS_ERR_PEVENT_NULL;
+        return (pevent);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MUTEX) {      /* Validate event block type                */
+        *perr = OS_ERR_EVENT_TYPE;
+        return (pevent);
+    }
+    if (OSIntNesting > 0u) {                               /* See if called from ISR ...               */
+        *perr = OS_ERR_DEL_ISR;                             /* ... can't DELETE from an ISR             */
+        return (pevent);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                        /* See if any tasks waiting on mutex        */
+        tasks_waiting = OS_TRUE;                           /* Yes                                      */
+    } else {
+        tasks_waiting = OS_FALSE;                          /* No                                       */
+    }
+    switch (opt) {
+        case OS_DEL_NO_PEND:                               /* DELETE MUTEX ONLY IF NO TASK WAITING --- */
+             if (tasks_waiting == OS_FALSE) {
+#if OS_EVENT_NAME_EN > 0u
+                 pevent->OSEventName   = (INT8U *)(void *)"?";
+#endif
+                 pcp                   = (INT8U)(pevent->OSEventCnt >> 8u);
+                 if (pcp != OS_PRIO_MUTEX_CEIL_DIS) {
+                     OSTCBPrioTbl[pcp] = (OS_TCB *)0;      /* Free up the PCP                          */
+                 }
+                 pevent->OSEventType   = OS_EVENT_TYPE_UNUSED;
+                 pevent->OSEventPtr    = OSEventFreeList;  /* Return Event Control Block to free list  */
+                 pevent->OSEventCnt    = 0u;
+                 OSEventFreeList       = pevent;
+                 OS_EXIT_CRITICAL();
+                 *perr                 = OS_ERR_NONE;
+                 pevent_return         = (OS_EVENT *)0;    /* Mutex has been deleted                   */
+             } else {
+                 OS_EXIT_CRITICAL();
+                 *perr                 = OS_ERR_TASK_WAITING;
+                 pevent_return         = pevent;
+             }
+             break;
+
+        case OS_DEL_ALWAYS:                                /* ALWAYS DELETE THE MUTEX ---------------- */
+             pcp  = (INT8U)(pevent->OSEventCnt >> 8u);                       /* Get PCP of mutex       */
+             if (pcp != OS_PRIO_MUTEX_CEIL_DIS) {
+                 prio = (INT8U)(pevent->OSEventCnt & OS_MUTEX_KEEP_LOWER_8); /* Get owner's orig prio  */
+                 ptcb = (OS_TCB *)pevent->OSEventPtr;
+                 if (ptcb != (OS_TCB *)0) {                /* See if any task owns the mutex           */
+                     if (ptcb->OSTCBPrio == pcp) {         /* See if original prio was changed         */
+                         OSMutex_RdyAtPrio(ptcb, prio);    /* Yes, Restore the task's original prio    */
+                     }
+                 }
+             }
+             while (pevent->OSEventGrp != 0u) {            /* Ready ALL tasks waiting for mutex        */
+                 (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_MUTEX, OS_STAT_PEND_ABORT);
+             }
+#if OS_EVENT_NAME_EN > 0u
+             pevent->OSEventName   = (INT8U *)(void *)"?";
+#endif
+             pcp                   = (INT8U)(pevent->OSEventCnt >> 8u);
+             if (pcp != OS_PRIO_MUTEX_CEIL_DIS) {
+                 OSTCBPrioTbl[pcp] = (OS_TCB *)0;          /* Free up the PCP                          */
+             }
+             pevent->OSEventType   = OS_EVENT_TYPE_UNUSED;
+             pevent->OSEventPtr    = OSEventFreeList;      /* Return Event Control Block to free list  */
+             pevent->OSEventCnt    = 0u;
+             OSEventFreeList       = pevent;               /* Get next free event control block        */
+             OS_EXIT_CRITICAL();
+             if (tasks_waiting == OS_TRUE) {               /* Reschedule only if task(s) were waiting  */
+                 OS_Sched();                               /* Find highest priority task ready to run  */
+             }
+             *perr         = OS_ERR_NONE;
+             pevent_return = (OS_EVENT *)0;                /* Mutex has been deleted                   */
+             break;
+
+        default:
+             OS_EXIT_CRITICAL();
+             *perr         = OS_ERR_INVALID_OPT;
+             pevent_return = pevent;
+             break;
+    }
+    return (pevent_return);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                 PEND ON MUTUAL EXCLUSION SEMAPHORE
+*
+* Description: This function waits for a mutual exclusion semaphore.
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired
+*                            mutex.
+*
+*              timeout       is an optional timeout period (in clock ticks).  If non-zero, your task will
+*                            wait for the resource up to the amount of time specified by this argument.
+*                            If you specify 0, however, your task will wait forever at the specified
+*                            mutex or, until the resource becomes available.
+*
+*              perr          is a pointer to where an error message will be deposited.  Possible error
+*                            messages are:
+*                               OS_ERR_NONE        The call was successful and your task owns the mutex
+*                               OS_ERR_TIMEOUT     The mutex was not available within the specified 'timeout'.
+*                               OS_ERR_PEND_ABORT  The wait on the mutex was aborted.
+*                               OS_ERR_EVENT_TYPE  If you didn't pass a pointer to a mutex
+*                               OS_ERR_PEVENT_NULL 'pevent' is a NULL pointer
+*                               OS_ERR_PEND_ISR    If you called this function from an ISR and the result
+*                                                  would lead to a suspension.
+*                               OS_ERR_PCP_LOWER   If the priority of the task that owns the Mutex is
+*                                                  HIGHER (i.e. a lower number) than the PCP.  This error
+*                                                  indicates that you did not set the PCP higher (lower
+*                                                  number) than ALL the tasks that compete for the Mutex.
+*                                                  Unfortunately, this is something that could not be
+*                                                  detected when the Mutex is created because we don't know
+*                                                  what tasks will be using the Mutex.
+*                               OS_ERR_PEND_LOCKED If you called this function when the scheduler is locked
+*
+* Returns    : none
+*
+* Note(s)    : 1) The task that owns the Mutex MUST NOT pend on any other event while it owns the mutex.
+*
+*              2) You MUST NOT change the priority of the task that owns the mutex
+*********************************************************************************************************
+*/
+
+void  OSMutexPend (OS_EVENT  *pevent,
+                   INT32U     timeout,
+                   INT8U     *perr)
+{
+    INT8U      pcp;                                        /* Priority Ceiling Priority (PCP)          */
+    INT8U      mprio;                                      /* Mutex owner priority                     */
+    BOOLEAN    rdy;                                        /* Flag indicating task was ready           */
+    OS_TCB    *ptcb;
+    OS_EVENT  *pevent2;
+    INT8U      y;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                         /* Validate 'pevent'                        */
+        *perr = OS_ERR_PEVENT_NULL;
+        return;
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MUTEX) {      /* Validate event block type                */
+        *perr = OS_ERR_EVENT_TYPE;
+        return;
+    }
+    if (OSIntNesting > 0u) {                               /* See if called from ISR ...               */
+        *perr = OS_ERR_PEND_ISR;                           /* ... can't PEND from an ISR               */
+        return;
+    }
+    if (OSLockNesting > 0u) {                              /* See if called with scheduler locked ...  */
+        *perr = OS_ERR_PEND_LOCKED;                        /* ... can't PEND when locked               */
+        return;
+    }
+/*$PAGE*/
+    OS_ENTER_CRITICAL();
+    pcp = (INT8U)(pevent->OSEventCnt >> 8u);               /* Get PCP from mutex                       */
+                                                           /* Is Mutex available?                      */
+    if ((INT8U)(pevent->OSEventCnt & OS_MUTEX_KEEP_LOWER_8) == OS_MUTEX_AVAILABLE) {
+        pevent->OSEventCnt &= OS_MUTEX_KEEP_UPPER_8;       /* Yes, Acquire the resource                */
+        pevent->OSEventCnt |= OSTCBCur->OSTCBPrio;         /*      Save priority of owning task        */
+        pevent->OSEventPtr  = (void *)OSTCBCur;            /*      Point to owning task's OS_TCB       */
+        if ((pcp != OS_PRIO_MUTEX_CEIL_DIS) &&
+            (OSTCBCur->OSTCBPrio <= pcp)) {                /*      PCP 'must' have a SMALLER prio ...  */
+             OS_EXIT_CRITICAL();                           /*      ... than current task!              */
+            *perr = OS_ERR_PCP_LOWER;
+        } else {
+             OS_EXIT_CRITICAL();
+            *perr = OS_ERR_NONE;
+        }
+        return;
+    }
+    if (pcp != OS_PRIO_MUTEX_CEIL_DIS) {
+        mprio = (INT8U)(pevent->OSEventCnt & OS_MUTEX_KEEP_LOWER_8); /*  Get priority of mutex owner   */
+        ptcb  = (OS_TCB *)(pevent->OSEventPtr);                   /*     Point to TCB of mutex owner   */
+        if (ptcb->OSTCBPrio > pcp) {                              /*     Need to promote prio of owner?*/
+            if (mprio > OSTCBCur->OSTCBPrio) {
+                y = ptcb->OSTCBY;
+                if ((OSRdyTbl[y] & ptcb->OSTCBBitX) != 0u) {      /*     See if mutex owner is ready   */
+                    OSRdyTbl[y] &= (OS_PRIO)~ptcb->OSTCBBitX;     /*     Yes, Remove owner from Rdy ...*/
+                    if (OSRdyTbl[y] == 0u) {                      /*          ... list at current prio */
+                        OSRdyGrp &= (OS_PRIO)~ptcb->OSTCBBitY;
+                    }
+                    rdy = OS_TRUE;
+                } else {
+                    pevent2 = ptcb->OSTCBEventPtr;
+                    if (pevent2 != (OS_EVENT *)0) {               /* Remove from event wait list       */
+                        y = ptcb->OSTCBY;
+                        pevent2->OSEventTbl[y] &= (OS_PRIO)~ptcb->OSTCBBitX;
+                        if (pevent2->OSEventTbl[y] == 0u) {
+                            pevent2->OSEventGrp &= (OS_PRIO)~ptcb->OSTCBBitY;
+                        }
+                    }
+                    rdy = OS_FALSE;                        /* No                                       */
+                }
+                ptcb->OSTCBPrio = pcp;                     /* Change owner task prio to PCP            */
+#if OS_LOWEST_PRIO <= 63u
+                ptcb->OSTCBY    = (INT8U)( ptcb->OSTCBPrio >> 3u);
+                ptcb->OSTCBX    = (INT8U)( ptcb->OSTCBPrio & 0x07u);
+#else
+                ptcb->OSTCBY    = (INT8U)((INT8U)(ptcb->OSTCBPrio >> 4u) & 0xFFu);
+                ptcb->OSTCBX    = (INT8U)( ptcb->OSTCBPrio & 0x0Fu);
+#endif
+                ptcb->OSTCBBitY = (OS_PRIO)(1uL << ptcb->OSTCBY);
+                ptcb->OSTCBBitX = (OS_PRIO)(1uL << ptcb->OSTCBX);
+
+                if (rdy == OS_TRUE) {                      /* If task was ready at owner's priority ...*/
+                    OSRdyGrp               |= ptcb->OSTCBBitY; /* ... make it ready at new priority.   */
+                    OSRdyTbl[ptcb->OSTCBY] |= ptcb->OSTCBBitX;
+                } else {
+                    pevent2 = ptcb->OSTCBEventPtr;
+                    if (pevent2 != (OS_EVENT *)0) {        /* Add to event wait list                   */
+                        pevent2->OSEventGrp               |= ptcb->OSTCBBitY;
+                        pevent2->OSEventTbl[ptcb->OSTCBY] |= ptcb->OSTCBBitX;
+                    }
+                }
+                OSTCBPrioTbl[pcp] = ptcb;
+            }
+        }
+    }
+    OSTCBCur->OSTCBStat     |= OS_STAT_MUTEX;         /* Mutex not available, pend current task        */
+    OSTCBCur->OSTCBStatPend  = OS_STAT_PEND_OK;
+    OSTCBCur->OSTCBDly       = timeout;               /* Store timeout in current task's TCB           */
+    OS_EventTaskWait(pevent);                         /* Suspend task until event or timeout occurs    */
+    OS_EXIT_CRITICAL();
+    OS_Sched();                                       /* Find next highest priority task ready         */
+    OS_ENTER_CRITICAL();
+    switch (OSTCBCur->OSTCBStatPend) {                /* See if we timed-out or aborted                */
+        case OS_STAT_PEND_OK:
+             *perr = OS_ERR_NONE;
+             break;
+
+        case OS_STAT_PEND_ABORT:
+             *perr = OS_ERR_PEND_ABORT;               /* Indicate that we aborted getting mutex        */
+             break;
+
+        case OS_STAT_PEND_TO:
+        default:
+             OS_EventTaskRemove(OSTCBCur, pevent);
+             *perr = OS_ERR_TIMEOUT;                  /* Indicate that we didn't get mutex within TO   */
+             break;
+    }
+    OSTCBCur->OSTCBStat          =  OS_STAT_RDY;      /* Set   task  status to ready                   */
+    OSTCBCur->OSTCBStatPend      =  OS_STAT_PEND_OK;  /* Clear pend  status                            */
+    OSTCBCur->OSTCBEventPtr      = (OS_EVENT  *)0;    /* Clear event pointers                          */
+#if (OS_EVENT_MULTI_EN > 0u)
+    OSTCBCur->OSTCBEventMultiPtr = (OS_EVENT **)0;
+#endif
+    OS_EXIT_CRITICAL();
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                POST TO A MUTUAL EXCLUSION SEMAPHORE
+*
+* Description: This function signals a mutual exclusion semaphore
+*
+* Arguments  : pevent              is a pointer to the event control block associated with the desired
+*                                  mutex.
+*
+* Returns    : OS_ERR_NONE             The call was successful and the mutex was signaled.
+*              OS_ERR_EVENT_TYPE       If you didn't pass a pointer to a mutex
+*              OS_ERR_PEVENT_NULL      'pevent' is a NULL pointer
+*              OS_ERR_POST_ISR         Attempted to post from an ISR (not valid for MUTEXes)
+*              OS_ERR_NOT_MUTEX_OWNER  The task that did the post is NOT the owner of the MUTEX.
+*              OS_ERR_PCP_LOWER        If the priority of the new task that owns the Mutex is
+*                                      HIGHER (i.e. a lower number) than the PCP.  This error
+*                                      indicates that you did not set the PCP higher (lower
+*                                      number) than ALL the tasks that compete for the Mutex.
+*                                      Unfortunately, this is something that could not be
+*                                      detected when the Mutex is created because we don't know
+*                                      what tasks will be using the Mutex.
+*********************************************************************************************************
+*/
+
+INT8U  OSMutexPost (OS_EVENT *pevent)
+{
+    INT8U      pcp;                                   /* Priority ceiling priority                     */
+    INT8U      prio;
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    if (OSIntNesting > 0u) {                          /* See if called from ISR ...                    */
+        return (OS_ERR_POST_ISR);                     /* ... can't POST mutex from an ISR              */
+    }
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        return (OS_ERR_PEVENT_NULL);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MUTEX) { /* Validate event block type                     */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    pcp  = (INT8U)(pevent->OSEventCnt >> 8u);         /* Get priority ceiling priority of mutex        */
+    prio = (INT8U)(pevent->OSEventCnt & OS_MUTEX_KEEP_LOWER_8);  /* Get owner's original priority      */
+    if (OSTCBCur != (OS_TCB *)pevent->OSEventPtr) {   /* See if posting task owns the MUTEX            */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_NOT_MUTEX_OWNER);
+    }
+    if (pcp != OS_PRIO_MUTEX_CEIL_DIS) {
+        if (OSTCBCur->OSTCBPrio == pcp) {             /* Did we have to raise current task's priority? */
+            OSMutex_RdyAtPrio(OSTCBCur, prio);        /* Restore the task's original priority          */
+        }
+        OSTCBPrioTbl[pcp] = OS_TCB_RESERVED;          /* Reserve table entry                           */
+    }
+    if (pevent->OSEventGrp != 0u) {                   /* Any task waiting for the mutex?               */
+                                                      /* Yes, Make HPT waiting for mutex ready         */
+        prio                = OS_EventTaskRdy(pevent, (void *)0, OS_STAT_MUTEX, OS_STAT_PEND_OK);
+        pevent->OSEventCnt &= OS_MUTEX_KEEP_UPPER_8;  /*      Save priority of mutex's new owner       */
+        pevent->OSEventCnt |= prio;
+        pevent->OSEventPtr  = OSTCBPrioTbl[prio];     /*      Link to new mutex owner's OS_TCB         */
+        if ((pcp  != OS_PRIO_MUTEX_CEIL_DIS) &&
+            (prio <= pcp)) {                          /*      PCP 'must' have a SMALLER prio ...       */
+            OS_EXIT_CRITICAL();                       /*      ... than current task!                   */
+            OS_Sched();                               /*      Find highest priority task ready to run  */
+            return (OS_ERR_PCP_LOWER);
+        } else {
+            OS_EXIT_CRITICAL();
+            OS_Sched();                               /*      Find highest priority task ready to run  */
+            return (OS_ERR_NONE);
+        }
+    }
+    pevent->OSEventCnt |= OS_MUTEX_AVAILABLE;         /* No,  Mutex is now available                   */
+    pevent->OSEventPtr  = (void *)0;
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                 QUERY A MUTUAL EXCLUSION SEMAPHORE
+*
+* Description: This function obtains information about a mutex
+*
+* Arguments  : pevent          is a pointer to the event control block associated with the desired mutex
+*
+*              p_mutex_data    is a pointer to a structure that will contain information about the mutex
+*
+* Returns    : OS_ERR_NONE          The call was successful and the message was sent
+*              OS_ERR_QUERY_ISR     If you called this function from an ISR
+*              OS_ERR_PEVENT_NULL   If 'pevent'       is a NULL pointer
+*              OS_ERR_PDATA_NULL    If 'p_mutex_data' is a NULL pointer
+*              OS_ERR_EVENT_TYPE    If you are attempting to obtain data from a non mutex.
+*********************************************************************************************************
+*/
+
+#if OS_MUTEX_QUERY_EN > 0u
+INT8U  OSMutexQuery (OS_EVENT       *pevent,
+                     OS_MUTEX_DATA  *p_mutex_data)
+{
+    INT8U       i;
+    OS_PRIO    *psrc;
+    OS_PRIO    *pdest;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR   cpu_sr = 0u;
+#endif
+
+
+
+    if (OSIntNesting > 0u) {                               /* See if called from ISR ...               */
+        return (OS_ERR_QUERY_ISR);                         /* ... can't QUERY mutex from an ISR        */
+    }
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                         /* Validate 'pevent'                        */
+        return (OS_ERR_PEVENT_NULL);
+    }
+    if (p_mutex_data == (OS_MUTEX_DATA *)0) {              /* Validate 'p_mutex_data'                  */
+        return (OS_ERR_PDATA_NULL);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_MUTEX) {      /* Validate event block type                */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    p_mutex_data->OSMutexPCP  = (INT8U)(pevent->OSEventCnt >> 8u);
+    p_mutex_data->OSOwnerPrio = (INT8U)(pevent->OSEventCnt & OS_MUTEX_KEEP_LOWER_8);
+    if (p_mutex_data->OSOwnerPrio == 0xFFu) {
+        p_mutex_data->OSValue = OS_TRUE;
+    } else {
+        p_mutex_data->OSValue = OS_FALSE;
+    }
+    p_mutex_data->OSEventGrp  = pevent->OSEventGrp;        /* Copy wait list                           */
+    psrc                      = &pevent->OSEventTbl[0];
+    pdest                     = &p_mutex_data->OSEventTbl[0];
+    for (i = 0u; i < OS_EVENT_TBL_SIZE; i++) {
+        *pdest++ = *psrc++;
+    }
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif                                                     /* OS_MUTEX_QUERY_EN                        */
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                            RESTORE A TASK BACK TO ITS ORIGINAL PRIORITY
+*
+* Description: This function makes a task ready at the specified priority
+*
+* Arguments  : ptcb            is a pointer to OS_TCB of the task to make ready
+*
+*              prio            is the desired priority
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+static  void  OSMutex_RdyAtPrio (OS_TCB  *ptcb,
+                                 INT8U    prio)
+{
+    INT8U  y;
+
+
+    y            =  ptcb->OSTCBY;                          /* Remove owner from ready list at 'pcp'    */
+    OSRdyTbl[y] &= (OS_PRIO)~ptcb->OSTCBBitX;
+    if (OSRdyTbl[y] == 0u) {
+        OSRdyGrp &= (OS_PRIO)~ptcb->OSTCBBitY;
+    }
+    ptcb->OSTCBPrio         = prio;
+    OSPrioCur               = prio;                        /* The current task is now at this priority */
+#if OS_LOWEST_PRIO <= 63u
+    ptcb->OSTCBY            = (INT8U)((INT8U)(prio >> 3u) & 0x07u);
+    ptcb->OSTCBX            = (INT8U)(prio & 0x07u);
+#else
+    ptcb->OSTCBY            = (INT8U)((INT8U)(prio >> 4u) & 0x0Fu);
+    ptcb->OSTCBX            = (INT8U) (prio & 0x0Fu);
+#endif
+    ptcb->OSTCBBitY         = (OS_PRIO)(1uL << ptcb->OSTCBY);
+    ptcb->OSTCBBitX         = (OS_PRIO)(1uL << ptcb->OSTCBX);
+    OSRdyGrp               |= ptcb->OSTCBBitY;             /* Make task ready at original priority     */
+    OSRdyTbl[ptcb->OSTCBY] |= ptcb->OSTCBBitX;
+    OSTCBPrioTbl[prio]      = ptcb;
+}
+
+
+#endif                                                     /* OS_MUTEX_EN                              */
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_q.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_q.c
new file mode 100644
index 0000000..c9b6002
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_q.c
@@ -0,0 +1,901 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                        MESSAGE QUEUE MANAGEMENT
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_Q.C
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#ifndef  OS_MASTER_FILE
+#include 
+#endif
+
+#if (OS_Q_EN > 0u) && (OS_MAX_QS > 0u)
+/*
+*********************************************************************************************************
+*                                      ACCEPT MESSAGE FROM QUEUE
+*
+* Description: This function checks the queue to see if a message is available.  Unlike OSQPend(),
+*              OSQAccept() does not suspend the calling task if a message is not available.
+*
+* Arguments  : pevent        is a pointer to the event control block
+*
+*              perr          is a pointer to where an error message will be deposited.  Possible error
+*                            messages are:
+*
+*                            OS_ERR_NONE         The call was successful and your task received a
+*                                                message.
+*                            OS_ERR_EVENT_TYPE   You didn't pass a pointer to a queue
+*                            OS_ERR_PEVENT_NULL  If 'pevent' is a NULL pointer
+*                            OS_ERR_Q_EMPTY      The queue did not contain any messages
+*
+* Returns    : != (void *)0  is the message in the queue if one is available.  The message is removed
+*                            from the so the next time OSQAccept() is called, the queue will contain
+*                            one less entry.
+*              == (void *)0  if you received a NULL pointer message
+*                            if the queue is empty or,
+*                            if 'pevent' is a NULL pointer or,
+*                            if you passed an invalid event type
+*
+* Note(s)    : As of V2.60, you can now pass NULL pointers through queues.  Because of this, the argument
+*              'perr' has been added to the API to tell you about the outcome of the call.
+*********************************************************************************************************
+*/
+
+#if OS_Q_ACCEPT_EN > 0u
+void  *OSQAccept (OS_EVENT  *pevent,
+                  INT8U     *perr)
+{
+    void      *pmsg;
+    OS_Q      *pq;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((void *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {               /* Validate 'pevent'                                  */
+        *perr = OS_ERR_PEVENT_NULL;
+        return ((void *)0);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_Q) {/* Validate event block type                          */
+        *perr = OS_ERR_EVENT_TYPE;
+        return ((void *)0);
+    }
+    OS_ENTER_CRITICAL();
+    pq = (OS_Q *)pevent->OSEventPtr;             /* Point at queue control block                       */
+    if (pq->OSQEntries > 0u) {                   /* See if any messages in the queue                   */
+        pmsg = *pq->OSQOut++;                    /* Yes, extract oldest message from the queue         */
+        pq->OSQEntries--;                        /* Update the number of entries in the queue          */
+        if (pq->OSQOut == pq->OSQEnd) {          /* Wrap OUT pointer if we are at the end of the queue */
+            pq->OSQOut = pq->OSQStart;
+        }
+        *perr = OS_ERR_NONE;
+    } else {
+        *perr = OS_ERR_Q_EMPTY;
+        pmsg  = (void *)0;                       /* Queue is empty                                     */
+    }
+    OS_EXIT_CRITICAL();
+    return (pmsg);                               /* Return message received (or NULL)                  */
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       CREATE A MESSAGE QUEUE
+*
+* Description: This function creates a message queue if free event control blocks are available.
+*
+* Arguments  : start         is a pointer to the base address of the message queue storage area.  The
+*                            storage area MUST be declared as an array of pointers to 'void' as follows
+*
+*                            void *MessageStorage[size]
+*
+*              size          is the number of elements in the storage area
+*
+* Returns    : != (OS_EVENT *)0  is a pointer to the event control clock (OS_EVENT) associated with the
+*                                created queue
+*              == (OS_EVENT *)0  if no event control blocks were available or an error was detected
+*********************************************************************************************************
+*/
+
+OS_EVENT  *OSQCreate (void    **start,
+                      INT16U    size)
+{
+    OS_EVENT  *pevent;
+    OS_Q      *pq;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == OS_TRUE) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_EVENT *)0);
+    }
+#endif
+
+    if (OSIntNesting > 0u) {                     /* See if called from ISR ...                         */
+        return ((OS_EVENT *)0);                  /* ... can't CREATE from an ISR                       */
+    }
+    OS_ENTER_CRITICAL();
+    pevent = OSEventFreeList;                    /* Get next free event control block                  */
+    if (OSEventFreeList != (OS_EVENT *)0) {      /* See if pool of free ECB pool was empty             */
+        OSEventFreeList = (OS_EVENT *)OSEventFreeList->OSEventPtr;
+    }
+    OS_EXIT_CRITICAL();
+    if (pevent != (OS_EVENT *)0) {               /* See if we have an event control block              */
+        OS_ENTER_CRITICAL();
+        pq = OSQFreeList;                        /* Get a free queue control block                     */
+        if (pq != (OS_Q *)0) {                   /* Were we able to get a queue control block ?        */
+            OSQFreeList            = OSQFreeList->OSQPtr; /* Yes, Adjust free list pointer to next free*/
+            OS_EXIT_CRITICAL();
+            pq->OSQStart           = start;               /*      Initialize the queue                 */
+            pq->OSQEnd             = &start[size];
+            pq->OSQIn              = start;
+            pq->OSQOut             = start;
+            pq->OSQSize            = size;
+            pq->OSQEntries         = 0u;
+            pevent->OSEventType    = OS_EVENT_TYPE_Q;
+            pevent->OSEventCnt     = 0u;
+            pevent->OSEventPtr     = pq;
+#if OS_EVENT_NAME_EN > 0u
+            pevent->OSEventName    = (INT8U *)(void *)"?";
+#endif
+            OS_EventWaitListInit(pevent);                 /*      Initialize the wait list             */
+        } else {
+            pevent->OSEventPtr = (void *)OSEventFreeList; /* No,  Return event control block on error  */
+            OSEventFreeList    = pevent;
+            OS_EXIT_CRITICAL();
+            pevent = (OS_EVENT *)0;
+        }
+    }
+    return (pevent);
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       DELETE A MESSAGE QUEUE
+*
+* Description: This function deletes a message queue and readies all tasks pending on the queue.
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired
+*                            queue.
+*
+*              opt           determines delete options as follows:
+*                            opt == OS_DEL_NO_PEND   Delete the queue ONLY if no task pending
+*                            opt == OS_DEL_ALWAYS    Deletes the queue even if tasks are waiting.
+*                                                    In this case, all the tasks pending will be readied.
+*
+*              perr          is a pointer to an error code that can contain one of the following values:
+*                            OS_ERR_NONE             The call was successful and the queue was deleted
+*                            OS_ERR_DEL_ISR          If you tried to delete the queue from an ISR
+*                            OS_ERR_INVALID_OPT      An invalid option was specified
+*                            OS_ERR_TASK_WAITING     One or more tasks were waiting on the queue
+*                            OS_ERR_EVENT_TYPE       If you didn't pass a pointer to a queue
+*                            OS_ERR_PEVENT_NULL      If 'pevent' is a NULL pointer.
+*
+* Returns    : pevent        upon error
+*              (OS_EVENT *)0 if the queue was successfully deleted.
+*
+* Note(s)    : 1) This function must be used with care.  Tasks that would normally expect the presence of
+*                 the queue MUST check the return code of OSQPend().
+*              2) OSQAccept() callers will not know that the intended queue has been deleted unless
+*                 they check 'pevent' to see that it's a NULL pointer.
+*              3) This call can potentially disable interrupts for a long time.  The interrupt disable
+*                 time is directly proportional to the number of tasks waiting on the queue.
+*              4) Because ALL tasks pending on the queue will be readied, you MUST be careful in
+*                 applications where the queue is used for mutual exclusion because the resource(s)
+*                 will no longer be guarded by the queue.
+*              5) If the storage for the message queue was allocated dynamically (i.e. using a malloc()
+*                 type call) then your application MUST release the memory storage by call the counterpart
+*                 call of the dynamic allocation scheme used.  If the queue storage was created statically
+*                 then, the storage can be reused.
+*              6) All tasks that were waiting for the queue will be readied and returned an 
+*                 OS_ERR_PEND_ABORT if OSQDel() was called with OS_DEL_ALWAYS
+*********************************************************************************************************
+*/
+
+#if OS_Q_DEL_EN > 0u
+OS_EVENT  *OSQDel (OS_EVENT  *pevent,
+                   INT8U      opt,
+                   INT8U     *perr)
+{
+    BOOLEAN    tasks_waiting;
+    OS_EVENT  *pevent_return;
+    OS_Q      *pq;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_EVENT *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                         /* Validate 'pevent'                        */
+        *perr = OS_ERR_PEVENT_NULL;
+        return (pevent);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_Q) {          /* Validate event block type                */
+        *perr = OS_ERR_EVENT_TYPE;
+        return (pevent);
+    }
+    if (OSIntNesting > 0u) {                               /* See if called from ISR ...               */
+        *perr = OS_ERR_DEL_ISR;                            /* ... can't DELETE from an ISR             */
+        return (pevent);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                        /* See if any tasks waiting on queue        */
+        tasks_waiting = OS_TRUE;                           /* Yes                                      */
+    } else {
+        tasks_waiting = OS_FALSE;                          /* No                                       */
+    }
+    switch (opt) {
+        case OS_DEL_NO_PEND:                               /* Delete queue only if no task waiting     */
+             if (tasks_waiting == OS_FALSE) {
+#if OS_EVENT_NAME_EN > 0u
+                 pevent->OSEventName    = (INT8U *)(void *)"?";
+#endif
+                 pq                     = (OS_Q *)pevent->OSEventPtr;  /* Return OS_Q to free list     */
+                 pq->OSQPtr             = OSQFreeList;
+                 OSQFreeList            = pq;
+                 pevent->OSEventType    = OS_EVENT_TYPE_UNUSED;
+                 pevent->OSEventPtr     = OSEventFreeList; /* Return Event Control Block to free list  */
+                 pevent->OSEventCnt     = 0u;
+                 OSEventFreeList        = pevent;          /* Get next free event control block        */
+                 OS_EXIT_CRITICAL();
+                 *perr                  = OS_ERR_NONE;
+                 pevent_return          = (OS_EVENT *)0;   /* Queue has been deleted                   */
+             } else {
+                 OS_EXIT_CRITICAL();
+                 *perr                  = OS_ERR_TASK_WAITING;
+                 pevent_return          = pevent;
+             }
+             break;
+
+        case OS_DEL_ALWAYS:                                /* Always delete the queue                  */
+             while (pevent->OSEventGrp != 0u) {            /* Ready ALL tasks waiting for queue        */
+                 (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_Q, OS_STAT_PEND_ABORT);
+             }
+#if OS_EVENT_NAME_EN > 0u
+             pevent->OSEventName    = (INT8U *)(void *)"?";
+#endif
+             pq                     = (OS_Q *)pevent->OSEventPtr;   /* Return OS_Q to free list        */
+             pq->OSQPtr             = OSQFreeList;
+             OSQFreeList            = pq;
+             pevent->OSEventType    = OS_EVENT_TYPE_UNUSED;
+             pevent->OSEventPtr     = OSEventFreeList;     /* Return Event Control Block to free list  */
+             pevent->OSEventCnt     = 0u;
+             OSEventFreeList        = pevent;              /* Get next free event control block        */
+             OS_EXIT_CRITICAL();
+             if (tasks_waiting == OS_TRUE) {               /* Reschedule only if task(s) were waiting  */
+                 OS_Sched();                               /* Find highest priority task ready to run  */
+             }
+             *perr                  = OS_ERR_NONE;
+             pevent_return          = (OS_EVENT *)0;       /* Queue has been deleted                   */
+             break;
+
+        default:
+             OS_EXIT_CRITICAL();
+             *perr                  = OS_ERR_INVALID_OPT;
+             pevent_return          = pevent;
+             break;
+    }
+    return (pevent_return);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             FLUSH QUEUE
+*
+* Description : This function is used to flush the contents of the message queue.
+*
+* Arguments   : none
+*
+* Returns     : OS_ERR_NONE         upon success
+*               OS_ERR_EVENT_TYPE   If you didn't pass a pointer to a queue
+*               OS_ERR_PEVENT_NULL  If 'pevent' is a NULL pointer
+*
+* WARNING     : You should use this function with great care because, when to flush the queue, you LOOSE
+*               the references to what the queue entries are pointing to and thus, you could cause
+*               'memory leaks'.  In other words, the data you are pointing to that's being referenced
+*               by the queue entries should, most likely, need to be de-allocated (i.e. freed).
+*********************************************************************************************************
+*/
+
+#if OS_Q_FLUSH_EN > 0u
+INT8U  OSQFlush (OS_EVENT *pevent)
+{
+    OS_Q      *pq;
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        return (OS_ERR_PEVENT_NULL);
+    }
+    if (pevent->OSEventType != OS_EVENT_TYPE_Q) {     /* Validate event block type                     */
+        return (OS_ERR_EVENT_TYPE);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    pq             = (OS_Q *)pevent->OSEventPtr;      /* Point to queue storage structure              */
+    pq->OSQIn      = pq->OSQStart;
+    pq->OSQOut     = pq->OSQStart;
+    pq->OSQEntries = 0u;
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                    PEND ON A QUEUE FOR A MESSAGE
+*
+* Description: This function waits for a message to be sent to a queue
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired queue
+*
+*              timeout       is an optional timeout period (in clock ticks).  If non-zero, your task will
+*                            wait for a message to arrive at the queue up to the amount of time
+*                            specified by this argument.  If you specify 0, however, your task will wait
+*                            forever at the specified queue or, until a message arrives.
+*
+*              perr          is a pointer to where an error message will be deposited.  Possible error
+*                            messages are:
+*
+*                            OS_ERR_NONE         The call was successful and your task received a
+*                                                message.
+*                            OS_ERR_TIMEOUT      A message was not received within the specified 'timeout'.
+*                            OS_ERR_PEND_ABORT   The wait on the queue was aborted.
+*                            OS_ERR_EVENT_TYPE   You didn't pass a pointer to a queue
+*                            OS_ERR_PEVENT_NULL  If 'pevent' is a NULL pointer
+*                            OS_ERR_PEND_ISR     If you called this function from an ISR and the result
+*                                                would lead to a suspension.
+*                            OS_ERR_PEND_LOCKED  If you called this function with the scheduler is locked
+*
+* Returns    : != (void *)0  is a pointer to the message received
+*              == (void *)0  if you received a NULL pointer message or,
+*                            if no message was received or,
+*                            if 'pevent' is a NULL pointer or,
+*                            if you didn't pass a pointer to a queue.
+*
+* Note(s)    : As of V2.60, this function allows you to receive NULL pointer messages.
+*********************************************************************************************************
+*/
+
+void  *OSQPend (OS_EVENT  *pevent,
+                INT32U     timeout,
+                INT8U     *perr)
+{
+    void      *pmsg;
+    OS_Q      *pq;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((void *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {               /* Validate 'pevent'                                  */
+        *perr = OS_ERR_PEVENT_NULL;
+        return ((void *)0);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_Q) {/* Validate event block type                          */
+        *perr = OS_ERR_EVENT_TYPE;
+        return ((void *)0);
+    }
+    if (OSIntNesting > 0u) {                     /* See if called from ISR ...                         */
+        *perr = OS_ERR_PEND_ISR;                 /* ... can't PEND from an ISR                         */
+        return ((void *)0);
+    }
+    if (OSLockNesting > 0u) {                    /* See if called with scheduler locked ...            */
+        *perr = OS_ERR_PEND_LOCKED;              /* ... can't PEND when locked                         */
+        return ((void *)0);
+    }
+    OS_ENTER_CRITICAL();
+    pq = (OS_Q *)pevent->OSEventPtr;             /* Point at queue control block                       */
+    if (pq->OSQEntries > 0u) {                   /* See if any messages in the queue                   */
+        pmsg = *pq->OSQOut++;                    /* Yes, extract oldest message from the queue         */
+        pq->OSQEntries--;                        /* Update the number of entries in the queue          */
+        if (pq->OSQOut == pq->OSQEnd) {          /* Wrap OUT pointer if we are at the end of the queue */
+            pq->OSQOut = pq->OSQStart;
+        }
+        OS_EXIT_CRITICAL();
+        *perr = OS_ERR_NONE;
+        return (pmsg);                           /* Return message received                            */
+    }
+    OSTCBCur->OSTCBStat     |= OS_STAT_Q;        /* Task will have to pend for a message to be posted  */
+    OSTCBCur->OSTCBStatPend  = OS_STAT_PEND_OK;
+    OSTCBCur->OSTCBDly       = timeout;          /* Load timeout into TCB                              */
+    OS_EventTaskWait(pevent);                    /* Suspend task until event or timeout occurs         */
+    OS_EXIT_CRITICAL();
+    OS_Sched();                                  /* Find next highest priority task ready to run       */
+    OS_ENTER_CRITICAL();
+    switch (OSTCBCur->OSTCBStatPend) {                /* See if we timed-out or aborted                */
+        case OS_STAT_PEND_OK:                         /* Extract message from TCB (Put there by QPost) */
+             pmsg =  OSTCBCur->OSTCBMsg;
+            *perr =  OS_ERR_NONE;
+             break;
+
+        case OS_STAT_PEND_ABORT:
+             pmsg = (void *)0;
+            *perr =  OS_ERR_PEND_ABORT;               /* Indicate that we aborted                      */
+             break;
+
+        case OS_STAT_PEND_TO:
+        default:
+             OS_EventTaskRemove(OSTCBCur, pevent);
+             pmsg = (void *)0;
+            *perr =  OS_ERR_TIMEOUT;                  /* Indicate that we didn't get event within TO   */
+             break;
+    }
+    OSTCBCur->OSTCBStat          =  OS_STAT_RDY;      /* Set   task  status to ready                   */
+    OSTCBCur->OSTCBStatPend      =  OS_STAT_PEND_OK;  /* Clear pend  status                            */
+    OSTCBCur->OSTCBEventPtr      = (OS_EVENT  *)0;    /* Clear event pointers                          */
+#if (OS_EVENT_MULTI_EN > 0u)
+    OSTCBCur->OSTCBEventMultiPtr = (OS_EVENT **)0;
+#endif
+    OSTCBCur->OSTCBMsg           = (void      *)0;    /* Clear  received message                       */
+    OS_EXIT_CRITICAL();
+    return (pmsg);                                    /* Return received message                       */
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                  ABORT WAITING ON A MESSAGE QUEUE
+*
+* Description: This function aborts & readies any tasks currently waiting on a queue.  This function
+*              should be used to fault-abort the wait on the queue, rather than to normally signal
+*              the queue via OSQPost(), OSQPostFront() or OSQPostOpt().
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired queue.
+*
+*              opt           determines the type of ABORT performed:
+*                            OS_PEND_OPT_NONE         ABORT wait for a single task (HPT) waiting on the
+*                                                     queue
+*                            OS_PEND_OPT_BROADCAST    ABORT wait for ALL tasks that are  waiting on the
+*                                                     queue
+*
+*              perr          is a pointer to where an error message will be deposited.  Possible error
+*                            messages are:
+*
+*                            OS_ERR_NONE         No tasks were     waiting on the queue.
+*                            OS_ERR_PEND_ABORT   At least one task waiting on the queue was readied
+*                                                and informed of the aborted wait; check return value
+*                                                for the number of tasks whose wait on the queue
+*                                                was aborted.
+*                            OS_ERR_EVENT_TYPE   If you didn't pass a pointer to a queue.
+*                            OS_ERR_PEVENT_NULL  If 'pevent' is a NULL pointer.
+*
+* Returns    : == 0          if no tasks were waiting on the queue, or upon error.
+*              >  0          if one or more tasks waiting on the queue are now readied and informed.
+*********************************************************************************************************
+*/
+
+#if OS_Q_PEND_ABORT_EN > 0u
+INT8U  OSQPendAbort (OS_EVENT  *pevent,
+                     INT8U      opt,
+                     INT8U     *perr)
+{
+    INT8U      nbr_tasks;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                         /* Validate 'pevent'                        */
+        *perr = OS_ERR_PEVENT_NULL;
+        return (0u);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_Q) {          /* Validate event block type                */
+        *perr = OS_ERR_EVENT_TYPE;
+        return (0u);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                        /* See if any task waiting on queue?        */
+        nbr_tasks = 0u;
+        switch (opt) {
+            case OS_PEND_OPT_BROADCAST:                    /* Do we need to abort ALL waiting tasks?   */
+                 while (pevent->OSEventGrp != 0u) {        /* Yes, ready ALL tasks waiting on queue    */
+                     (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_Q, OS_STAT_PEND_ABORT);
+                     nbr_tasks++;
+                 }
+                 break;
+
+            case OS_PEND_OPT_NONE:
+            default:                                       /* No,  ready HPT       waiting on queue    */
+                 (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_Q, OS_STAT_PEND_ABORT);
+                 nbr_tasks++;
+                 break;
+        }
+        OS_EXIT_CRITICAL();
+        OS_Sched();                                        /* Find HPT ready to run                    */
+        *perr = OS_ERR_PEND_ABORT;
+        return (nbr_tasks);
+    }
+    OS_EXIT_CRITICAL();
+    *perr = OS_ERR_NONE;
+    return (0u);                                           /* No tasks waiting on queue                */
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       POST MESSAGE TO A QUEUE
+*
+* Description: This function sends a message to a queue
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired queue
+*
+*              pmsg          is a pointer to the message to send.
+*
+* Returns    : OS_ERR_NONE           The call was successful and the message was sent
+*              OS_ERR_Q_FULL         If the queue cannot accept any more messages because it is full.
+*              OS_ERR_EVENT_TYPE     If you didn't pass a pointer to a queue.
+*              OS_ERR_PEVENT_NULL    If 'pevent' is a NULL pointer
+*
+* Note(s)    : As of V2.60, this function allows you to send NULL pointer messages.
+*********************************************************************************************************
+*/
+
+#if OS_Q_POST_EN > 0u
+INT8U  OSQPost (OS_EVENT  *pevent,
+                void      *pmsg)
+{
+    OS_Q      *pq;
+#if OS_CRITICAL_METHOD == 3u                           /* Allocate storage for CPU status register     */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                     /* Validate 'pevent'                            */
+        return (OS_ERR_PEVENT_NULL);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_Q) {      /* Validate event block type                    */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                    /* See if any task pending on queue             */
+                                                       /* Ready highest priority task waiting on event */
+        (void)OS_EventTaskRdy(pevent, pmsg, OS_STAT_Q, OS_STAT_PEND_OK);
+        OS_EXIT_CRITICAL();
+        OS_Sched();                                    /* Find highest priority task ready to run      */
+        return (OS_ERR_NONE);
+    }
+    pq = (OS_Q *)pevent->OSEventPtr;                   /* Point to queue control block                 */
+    if (pq->OSQEntries >= pq->OSQSize) {               /* Make sure queue is not full                  */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_Q_FULL);
+    }
+    *pq->OSQIn++ = pmsg;                               /* Insert message into queue                    */
+    pq->OSQEntries++;                                  /* Update the nbr of entries in the queue       */
+    if (pq->OSQIn == pq->OSQEnd) {                     /* Wrap IN ptr if we are at end of queue        */
+        pq->OSQIn = pq->OSQStart;
+    }
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                POST MESSAGE TO THE FRONT OF A QUEUE
+*
+* Description: This function sends a message to a queue but unlike OSQPost(), the message is posted at
+*              the front instead of the end of the queue.  Using OSQPostFront() allows you to send
+*              'priority' messages.
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired queue
+*
+*              pmsg          is a pointer to the message to send.
+*
+* Returns    : OS_ERR_NONE           The call was successful and the message was sent
+*              OS_ERR_Q_FULL         If the queue cannot accept any more messages because it is full.
+*              OS_ERR_EVENT_TYPE     If you didn't pass a pointer to a queue.
+*              OS_ERR_PEVENT_NULL    If 'pevent' is a NULL pointer
+*
+* Note(s)    : As of V2.60, this function allows you to send NULL pointer messages.
+*********************************************************************************************************
+*/
+
+#if OS_Q_POST_FRONT_EN > 0u
+INT8U  OSQPostFront (OS_EVENT  *pevent,
+                     void      *pmsg)
+{
+    OS_Q      *pq;
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        return (OS_ERR_PEVENT_NULL);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_Q) {     /* Validate event block type                     */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                   /* See if any task pending on queue              */
+                                                      /* Ready highest priority task waiting on event  */
+        (void)OS_EventTaskRdy(pevent, pmsg, OS_STAT_Q, OS_STAT_PEND_OK);
+        OS_EXIT_CRITICAL();
+        OS_Sched();                                   /* Find highest priority task ready to run       */
+        return (OS_ERR_NONE);
+    }
+    pq = (OS_Q *)pevent->OSEventPtr;                  /* Point to queue control block                  */
+    if (pq->OSQEntries >= pq->OSQSize) {              /* Make sure queue is not full                   */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_Q_FULL);
+    }
+    if (pq->OSQOut == pq->OSQStart) {                 /* Wrap OUT ptr if we are at the 1st queue entry */
+        pq->OSQOut = pq->OSQEnd;
+    }
+    pq->OSQOut--;
+    *pq->OSQOut = pmsg;                               /* Insert message into queue                     */
+    pq->OSQEntries++;                                 /* Update the nbr of entries in the queue        */
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       POST MESSAGE TO A QUEUE
+*
+* Description: This function sends a message to a queue.  This call has been added to reduce code size
+*              since it can replace both OSQPost() and OSQPostFront().  Also, this function adds the
+*              capability to broadcast a message to ALL tasks waiting on the message queue.
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired queue
+*
+*              pmsg          is a pointer to the message to send.
+*
+*              opt           determines the type of POST performed:
+*                            OS_POST_OPT_NONE         POST to a single waiting task
+*                                                     (Identical to OSQPost())
+*                            OS_POST_OPT_BROADCAST    POST to ALL tasks that are waiting on the queue
+*                            OS_POST_OPT_FRONT        POST as LIFO (Simulates OSQPostFront())
+*                            OS_POST_OPT_NO_SCHED     Indicates that the scheduler will NOT be invoked
+*
+* Returns    : OS_ERR_NONE           The call was successful and the message was sent
+*              OS_ERR_Q_FULL         If the queue cannot accept any more messages because it is full.
+*              OS_ERR_EVENT_TYPE     If you didn't pass a pointer to a queue.
+*              OS_ERR_PEVENT_NULL    If 'pevent' is a NULL pointer
+*
+* Warning    : Interrupts can be disabled for a long time if you do a 'broadcast'.  In fact, the
+*              interrupt disable time is proportional to the number of tasks waiting on the queue.
+*********************************************************************************************************
+*/
+
+#if OS_Q_POST_OPT_EN > 0u
+INT8U  OSQPostOpt (OS_EVENT  *pevent,
+                   void      *pmsg,
+                   INT8U      opt)
+{
+    OS_Q      *pq;
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        return (OS_ERR_PEVENT_NULL);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_Q) {     /* Validate event block type                     */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0x00u) {                /* See if any task pending on queue              */
+        if ((opt & OS_POST_OPT_BROADCAST) != 0x00u) { /* Do we need to post msg to ALL waiting tasks ? */
+            while (pevent->OSEventGrp != 0u) {        /* Yes, Post to ALL tasks waiting on queue       */
+                (void)OS_EventTaskRdy(pevent, pmsg, OS_STAT_Q, OS_STAT_PEND_OK);
+            }
+        } else {                                      /* No,  Post to HPT waiting on queue             */
+            (void)OS_EventTaskRdy(pevent, pmsg, OS_STAT_Q, OS_STAT_PEND_OK);
+        }
+        OS_EXIT_CRITICAL();
+        if ((opt & OS_POST_OPT_NO_SCHED) == 0u) {     /* See if scheduler needs to be invoked          */
+            OS_Sched();                               /* Find highest priority task ready to run       */
+        }
+        return (OS_ERR_NONE);
+    }
+    pq = (OS_Q *)pevent->OSEventPtr;                  /* Point to queue control block                  */
+    if (pq->OSQEntries >= pq->OSQSize) {              /* Make sure queue is not full                   */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_Q_FULL);
+    }
+    if ((opt & OS_POST_OPT_FRONT) != 0x00u) {         /* Do we post to the FRONT of the queue?         */
+        if (pq->OSQOut == pq->OSQStart) {             /* Yes, Post as LIFO, Wrap OUT pointer if we ... */
+            pq->OSQOut = pq->OSQEnd;                  /*      ... are at the 1st queue entry           */
+        }
+        pq->OSQOut--;
+        *pq->OSQOut = pmsg;                           /*      Insert message into queue                */
+    } else {                                          /* No,  Post as FIFO                             */
+        *pq->OSQIn++ = pmsg;                          /*      Insert message into queue                */
+        if (pq->OSQIn == pq->OSQEnd) {                /*      Wrap IN ptr if we are at end of queue    */
+            pq->OSQIn = pq->OSQStart;
+        }
+    }
+    pq->OSQEntries++;                                 /* Update the nbr of entries in the queue        */
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                        QUERY A MESSAGE QUEUE
+*
+* Description: This function obtains information about a message queue.
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired queue
+*
+*              p_q_data      is a pointer to a structure that will contain information about the message
+*                            queue.
+*
+* Returns    : OS_ERR_NONE         The call was successful and the message was sent
+*              OS_ERR_EVENT_TYPE   If you are attempting to obtain data from a non queue.
+*              OS_ERR_PEVENT_NULL  If 'pevent'   is a NULL pointer
+*              OS_ERR_PDATA_NULL   If 'p_q_data' is a NULL pointer
+*********************************************************************************************************
+*/
+
+#if OS_Q_QUERY_EN > 0u
+INT8U  OSQQuery (OS_EVENT  *pevent,
+                 OS_Q_DATA *p_q_data)
+{
+    OS_Q       *pq;
+    INT8U       i;
+    OS_PRIO    *psrc;
+    OS_PRIO    *pdest;
+#if OS_CRITICAL_METHOD == 3u                           /* Allocate storage for CPU status register     */
+    OS_CPU_SR   cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                     /* Validate 'pevent'                            */
+        return (OS_ERR_PEVENT_NULL);
+    }
+    if (p_q_data == (OS_Q_DATA *)0) {                  /* Validate 'p_q_data'                          */
+        return (OS_ERR_PDATA_NULL);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_Q) {      /* Validate event block type                    */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    p_q_data->OSEventGrp = pevent->OSEventGrp;         /* Copy message queue wait list                 */
+    psrc                 = &pevent->OSEventTbl[0];
+    pdest                = &p_q_data->OSEventTbl[0];
+    for (i = 0u; i < OS_EVENT_TBL_SIZE; i++) {
+        *pdest++ = *psrc++;
+    }
+    pq = (OS_Q *)pevent->OSEventPtr;
+    if (pq->OSQEntries > 0u) {
+        p_q_data->OSMsg = *pq->OSQOut;                 /* Get next message to return if available      */
+    } else {
+        p_q_data->OSMsg = (void *)0;
+    }
+    p_q_data->OSNMsgs = pq->OSQEntries;
+    p_q_data->OSQSize = pq->OSQSize;
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif                                                 /* OS_Q_QUERY_EN                                */
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                     QUEUE MODULE INITIALIZATION
+*
+* Description : This function is called by uC/OS-II to initialize the message queue module.  Your
+*               application MUST NOT call this function.
+*
+* Arguments   :  none
+*
+* Returns     : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+
+void  OS_QInit (void)
+{
+#if OS_MAX_QS == 1u
+    OSQFreeList         = &OSQTbl[0];                /* Only ONE queue!                                */
+    OSQFreeList->OSQPtr = (OS_Q *)0;
+#endif
+
+#if OS_MAX_QS >= 2u
+    INT16U   ix;
+    INT16U   ix_next;
+    OS_Q    *pq1;
+    OS_Q    *pq2;
+
+
+
+    OS_MemClr((INT8U *)&OSQTbl[0], sizeof(OSQTbl));  /* Clear the queue table                          */
+    for (ix = 0u; ix < (OS_MAX_QS - 1u); ix++) {     /* Init. list of free QUEUE control blocks        */
+        ix_next = ix + 1u;
+        pq1 = &OSQTbl[ix];
+        pq2 = &OSQTbl[ix_next];
+        pq1->OSQPtr = pq2;
+    }
+    pq1         = &OSQTbl[ix];
+    pq1->OSQPtr = (OS_Q *)0;
+    OSQFreeList = &OSQTbl[0];
+#endif
+}
+#endif                                               /* OS_Q_EN                                        */
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_sem.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_sem.c
new file mode 100644
index 0000000..6b91ce9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_sem.c
@@ -0,0 +1,637 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                          SEMAPHORE MANAGEMENT
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_SEM.C
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#ifndef  OS_MASTER_FILE
+#include 
+#endif
+
+#if OS_SEM_EN > 0u
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          ACCEPT SEMAPHORE
+*
+* Description: This function checks the semaphore to see if a resource is available or, if an event
+*              occurred.  Unlike OSSemPend(), OSSemAccept() does not suspend the calling task if the
+*              resource is not available or the event did not occur.
+*
+* Arguments  : pevent     is a pointer to the event control block
+*
+* Returns    : >  0       if the resource is available or the event did not occur the semaphore is
+*                         decremented to obtain the resource.
+*              == 0       if the resource is not available or the event did not occur or,
+*                         if 'pevent' is a NULL pointer or,
+*                         if you didn't pass a pointer to a semaphore
+*********************************************************************************************************
+*/
+
+#if OS_SEM_ACCEPT_EN > 0u
+INT16U  OSSemAccept (OS_EVENT *pevent)
+{
+    INT16U     cnt;
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        return (0u);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_SEM) {   /* Validate event block type                     */
+        return (0u);
+    }
+    OS_ENTER_CRITICAL();
+    cnt = pevent->OSEventCnt;
+    if (cnt > 0u) {                                   /* See if resource is available                  */
+        pevent->OSEventCnt--;                         /* Yes, decrement semaphore and notify caller    */
+    }
+    OS_EXIT_CRITICAL();
+    return (cnt);                                     /* Return semaphore count                        */
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         CREATE A SEMAPHORE
+*
+* Description: This function creates a semaphore.
+*
+* Arguments  : cnt           is the initial value for the semaphore.  If the value is 0, no resource is
+*                            available (or no event has occurred).  You initialize the semaphore to a
+*                            non-zero value to specify how many resources are available (e.g. if you have
+*                            10 resources, you would initialize the semaphore to 10).
+*
+* Returns    : != (void *)0  is a pointer to the event control block (OS_EVENT) associated with the
+*                            created semaphore
+*              == (void *)0  if no event control blocks were available
+*********************************************************************************************************
+*/
+
+OS_EVENT  *OSSemCreate (INT16U cnt)
+{
+    OS_EVENT  *pevent;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == OS_TRUE) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_EVENT *)0);
+    }
+#endif
+
+    if (OSIntNesting > 0u) {                               /* See if called from ISR ...               */
+        return ((OS_EVENT *)0);                            /* ... can't CREATE from an ISR             */
+    }
+    OS_ENTER_CRITICAL();
+    pevent = OSEventFreeList;                              /* Get next free event control block        */
+    if (OSEventFreeList != (OS_EVENT *)0) {                /* See if pool of free ECB pool was empty   */
+        OSEventFreeList = (OS_EVENT *)OSEventFreeList->OSEventPtr;
+    }
+    OS_EXIT_CRITICAL();
+    if (pevent != (OS_EVENT *)0) {                         /* Get an event control block               */
+        pevent->OSEventType    = OS_EVENT_TYPE_SEM;
+        pevent->OSEventCnt     = cnt;                      /* Set semaphore value                      */
+        pevent->OSEventPtr     = (void *)0;                /* Unlink from ECB free list                */
+#if OS_EVENT_NAME_EN > 0u
+        pevent->OSEventName    = (INT8U *)(void *)"?";
+#endif
+        OS_EventWaitListInit(pevent);                      /* Initialize to 'nobody waiting' on sem.   */
+    }
+    return (pevent);
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         DELETE A SEMAPHORE
+*
+* Description: This function deletes a semaphore and readies all tasks pending on the semaphore.
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired
+*                            semaphore.
+*
+*              opt           determines delete options as follows:
+*                            opt == OS_DEL_NO_PEND   Delete semaphore ONLY if no task pending
+*                            opt == OS_DEL_ALWAYS    Deletes the semaphore even if tasks are waiting.
+*                                                    In this case, all the tasks pending will be readied.
+*
+*              perr          is a pointer to an error code that can contain one of the following values:
+*                            OS_ERR_NONE             The call was successful and the semaphore was deleted
+*                            OS_ERR_DEL_ISR          If you attempted to delete the semaphore from an ISR
+*                            OS_ERR_INVALID_OPT      An invalid option was specified
+*                            OS_ERR_TASK_WAITING     One or more tasks were waiting on the semaphore
+*                            OS_ERR_EVENT_TYPE       If you didn't pass a pointer to a semaphore
+*                            OS_ERR_PEVENT_NULL      If 'pevent' is a NULL pointer.
+*
+* Returns    : pevent        upon error
+*              (OS_EVENT *)0 if the semaphore was successfully deleted.
+*
+* Note(s)    : 1) This function must be used with care.  Tasks that would normally expect the presence of
+*                 the semaphore MUST check the return code of OSSemPend().
+*              2) OSSemAccept() callers will not know that the intended semaphore has been deleted unless
+*                 they check 'pevent' to see that it's a NULL pointer.
+*              3) This call can potentially disable interrupts for a long time.  The interrupt disable
+*                 time is directly proportional to the number of tasks waiting on the semaphore.
+*              4) Because ALL tasks pending on the semaphore will be readied, you MUST be careful in
+*                 applications where the semaphore is used for mutual exclusion because the resource(s)
+*                 will no longer be guarded by the semaphore.
+*              5) All tasks that were waiting for the semaphore will be readied and returned an 
+*                 OS_ERR_PEND_ABORT if OSSemDel() was called with OS_DEL_ALWAYS
+*********************************************************************************************************
+*/
+
+#if OS_SEM_DEL_EN > 0u
+OS_EVENT  *OSSemDel (OS_EVENT  *pevent,
+                     INT8U      opt,
+                     INT8U     *perr)
+{
+    BOOLEAN    tasks_waiting;
+    OS_EVENT  *pevent_return;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_EVENT *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                         /* Validate 'pevent'                        */
+        *perr = OS_ERR_PEVENT_NULL;
+        return (pevent);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_SEM) {        /* Validate event block type                */
+        *perr = OS_ERR_EVENT_TYPE;
+        return (pevent);
+    }
+    if (OSIntNesting > 0u) {                               /* See if called from ISR ...               */
+        *perr = OS_ERR_DEL_ISR;                            /* ... can't DELETE from an ISR             */
+        return (pevent);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                        /* See if any tasks waiting on semaphore    */
+        tasks_waiting = OS_TRUE;                           /* Yes                                      */
+    } else {
+        tasks_waiting = OS_FALSE;                          /* No                                       */
+    }
+    switch (opt) {
+        case OS_DEL_NO_PEND:                               /* Delete semaphore only if no task waiting */
+             if (tasks_waiting == OS_FALSE) {
+#if OS_EVENT_NAME_EN > 0u
+                 pevent->OSEventName    = (INT8U *)(void *)"?";
+#endif
+                 pevent->OSEventType    = OS_EVENT_TYPE_UNUSED;
+                 pevent->OSEventPtr     = OSEventFreeList; /* Return Event Control Block to free list  */
+                 pevent->OSEventCnt     = 0u;
+                 OSEventFreeList        = pevent;          /* Get next free event control block        */
+                 OS_EXIT_CRITICAL();
+                 *perr                  = OS_ERR_NONE;
+                 pevent_return          = (OS_EVENT *)0;   /* Semaphore has been deleted               */
+             } else {
+                 OS_EXIT_CRITICAL();
+                 *perr                  = OS_ERR_TASK_WAITING;
+                 pevent_return          = pevent;
+             }
+             break;
+
+        case OS_DEL_ALWAYS:                                /* Always delete the semaphore              */
+             while (pevent->OSEventGrp != 0u) {            /* Ready ALL tasks waiting for semaphore    */
+                 (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_SEM, OS_STAT_PEND_ABORT);
+             }
+#if OS_EVENT_NAME_EN > 0u
+             pevent->OSEventName    = (INT8U *)(void *)"?";
+#endif
+             pevent->OSEventType    = OS_EVENT_TYPE_UNUSED;
+             pevent->OSEventPtr     = OSEventFreeList;     /* Return Event Control Block to free list  */
+             pevent->OSEventCnt     = 0u;
+             OSEventFreeList        = pevent;              /* Get next free event control block        */
+             OS_EXIT_CRITICAL();
+             if (tasks_waiting == OS_TRUE) {               /* Reschedule only if task(s) were waiting  */
+                 OS_Sched();                               /* Find highest priority task ready to run  */
+             }
+             *perr                  = OS_ERR_NONE;
+             pevent_return          = (OS_EVENT *)0;       /* Semaphore has been deleted               */
+             break;
+
+        default:
+             OS_EXIT_CRITICAL();
+             *perr                  = OS_ERR_INVALID_OPT;
+             pevent_return          = pevent;
+             break;
+    }
+    return (pevent_return);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          PEND ON SEMAPHORE
+*
+* Description: This function waits for a semaphore.
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired
+*                            semaphore.
+*
+*              timeout       is an optional timeout period (in clock ticks).  If non-zero, your task will
+*                            wait for the resource up to the amount of time specified by this argument.
+*                            If you specify 0, however, your task will wait forever at the specified
+*                            semaphore or, until the resource becomes available (or the event occurs).
+*
+*              perr          is a pointer to where an error message will be deposited.  Possible error
+*                            messages are:
+*
+*                            OS_ERR_NONE         The call was successful and your task owns the resource
+*                                                or, the event you are waiting for occurred.
+*                            OS_ERR_TIMEOUT      The semaphore was not received within the specified
+*                                                'timeout'.
+*                            OS_ERR_PEND_ABORT   The wait on the semaphore was aborted.
+*                            OS_ERR_EVENT_TYPE   If you didn't pass a pointer to a semaphore.
+*                            OS_ERR_PEND_ISR     If you called this function from an ISR and the result
+*                                                would lead to a suspension.
+*                            OS_ERR_PEVENT_NULL  If 'pevent' is a NULL pointer.
+*                            OS_ERR_PEND_LOCKED  If you called this function when the scheduler is locked
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+/*$PAGE*/
+void  OSSemPend (OS_EVENT  *pevent,
+                 INT32U     timeout,
+                 INT8U     *perr)
+{
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        *perr = OS_ERR_PEVENT_NULL;
+        return;
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_SEM) {   /* Validate event block type                     */
+        *perr = OS_ERR_EVENT_TYPE;
+        return;
+    }
+    if (OSIntNesting > 0u) {                          /* See if called from ISR ...                    */
+        *perr = OS_ERR_PEND_ISR;                      /* ... can't PEND from an ISR                    */
+        return;
+    }
+    if (OSLockNesting > 0u) {                         /* See if called with scheduler locked ...       */
+        *perr = OS_ERR_PEND_LOCKED;                   /* ... can't PEND when locked                    */
+        return;
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventCnt > 0u) {                    /* If sem. is positive, resource available ...   */
+        pevent->OSEventCnt--;                         /* ... decrement semaphore only if positive.     */
+        OS_EXIT_CRITICAL();
+        *perr = OS_ERR_NONE;
+        return;
+    }
+                                                      /* Otherwise, must wait until event occurs       */
+    OSTCBCur->OSTCBStat     |= OS_STAT_SEM;           /* Resource not available, pend on semaphore     */
+    OSTCBCur->OSTCBStatPend  = OS_STAT_PEND_OK;
+    OSTCBCur->OSTCBDly       = timeout;               /* Store pend timeout in TCB                     */
+    OS_EventTaskWait(pevent);                         /* Suspend task until event or timeout occurs    */
+    OS_EXIT_CRITICAL();
+    OS_Sched();                                       /* Find next highest priority task ready         */
+    OS_ENTER_CRITICAL();
+    switch (OSTCBCur->OSTCBStatPend) {                /* See if we timed-out or aborted                */
+        case OS_STAT_PEND_OK:
+             *perr = OS_ERR_NONE;
+             break;
+
+        case OS_STAT_PEND_ABORT:
+             *perr = OS_ERR_PEND_ABORT;               /* Indicate that we aborted                      */
+             break;
+
+        case OS_STAT_PEND_TO:
+        default:
+             OS_EventTaskRemove(OSTCBCur, pevent);
+             *perr = OS_ERR_TIMEOUT;                  /* Indicate that we didn't get event within TO   */
+             break;
+    }
+    OSTCBCur->OSTCBStat          =  OS_STAT_RDY;      /* Set   task  status to ready                   */
+    OSTCBCur->OSTCBStatPend      =  OS_STAT_PEND_OK;  /* Clear pend  status                            */
+    OSTCBCur->OSTCBEventPtr      = (OS_EVENT  *)0;    /* Clear event pointers                          */
+#if (OS_EVENT_MULTI_EN > 0u)
+    OSTCBCur->OSTCBEventMultiPtr = (OS_EVENT **)0;
+#endif
+    OS_EXIT_CRITICAL();
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                    ABORT WAITING ON A SEMAPHORE
+*
+* Description: This function aborts & readies any tasks currently waiting on a semaphore.  This function
+*              should be used to fault-abort the wait on the semaphore, rather than to normally signal
+*              the semaphore via OSSemPost().
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired
+*                            semaphore.
+*
+*              opt           determines the type of ABORT performed:
+*                            OS_PEND_OPT_NONE         ABORT wait for a single task (HPT) waiting on the
+*                                                     semaphore
+*                            OS_PEND_OPT_BROADCAST    ABORT wait for ALL tasks that are  waiting on the
+*                                                     semaphore
+*
+*              perr          is a pointer to where an error message will be deposited.  Possible error
+*                            messages are:
+*
+*                            OS_ERR_NONE         No tasks were     waiting on the semaphore.
+*                            OS_ERR_PEND_ABORT   At least one task waiting on the semaphore was readied
+*                                                and informed of the aborted wait; check return value
+*                                                for the number of tasks whose wait on the semaphore
+*                                                was aborted.
+*                            OS_ERR_EVENT_TYPE   If you didn't pass a pointer to a semaphore.
+*                            OS_ERR_PEVENT_NULL  If 'pevent' is a NULL pointer.
+*
+* Returns    : == 0          if no tasks were waiting on the semaphore, or upon error.
+*              >  0          if one or more tasks waiting on the semaphore are now readied and informed.
+*********************************************************************************************************
+*/
+
+#if OS_SEM_PEND_ABORT_EN > 0u
+INT8U  OSSemPendAbort (OS_EVENT  *pevent,
+                       INT8U      opt,
+                       INT8U     *perr)
+{
+    INT8U      nbr_tasks;
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        *perr = OS_ERR_PEVENT_NULL;
+        return (0u);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_SEM) {   /* Validate event block type                     */
+        *perr = OS_ERR_EVENT_TYPE;
+        return (0u);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                   /* See if any task waiting on semaphore?         */
+        nbr_tasks = 0u;
+        switch (opt) {
+            case OS_PEND_OPT_BROADCAST:               /* Do we need to abort ALL waiting tasks?        */
+                 while (pevent->OSEventGrp != 0u) {   /* Yes, ready ALL tasks waiting on semaphore     */
+                     (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_SEM, OS_STAT_PEND_ABORT);
+                     nbr_tasks++;
+                 }
+                 break;
+
+            case OS_PEND_OPT_NONE:
+            default:                                  /* No,  ready HPT       waiting on semaphore     */
+                 (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_SEM, OS_STAT_PEND_ABORT);
+                 nbr_tasks++;
+                 break;
+        }
+        OS_EXIT_CRITICAL();
+        OS_Sched();                                   /* Find HPT ready to run                         */
+        *perr = OS_ERR_PEND_ABORT;
+        return (nbr_tasks);
+    }
+    OS_EXIT_CRITICAL();
+    *perr = OS_ERR_NONE;
+    return (0u);                                      /* No tasks waiting on semaphore                 */
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         POST TO A SEMAPHORE
+*
+* Description: This function signals a semaphore
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired
+*                            semaphore.
+*
+* Returns    : OS_ERR_NONE         The call was successful and the semaphore was signaled.
+*              OS_ERR_SEM_OVF      If the semaphore count exceeded its limit. In other words, you have
+*                                  signaled the semaphore more often than you waited on it with either
+*                                  OSSemAccept() or OSSemPend().
+*              OS_ERR_EVENT_TYPE   If you didn't pass a pointer to a semaphore
+*              OS_ERR_PEVENT_NULL  If 'pevent' is a NULL pointer.
+*********************************************************************************************************
+*/
+
+INT8U  OSSemPost (OS_EVENT *pevent)
+{
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        return (OS_ERR_PEVENT_NULL);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_SEM) {   /* Validate event block type                     */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    if (pevent->OSEventGrp != 0u) {                   /* See if any task waiting for semaphore         */
+                                                      /* Ready HPT waiting on event                    */
+        (void)OS_EventTaskRdy(pevent, (void *)0, OS_STAT_SEM, OS_STAT_PEND_OK);
+        OS_EXIT_CRITICAL();
+        OS_Sched();                                   /* Find HPT ready to run                         */
+        return (OS_ERR_NONE);
+    }
+    if (pevent->OSEventCnt < 65535u) {                /* Make sure semaphore will not overflow         */
+        pevent->OSEventCnt++;                         /* Increment semaphore count to register event   */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_NONE);
+    }
+    OS_EXIT_CRITICAL();                               /* Semaphore value has reached its maximum       */
+    return (OS_ERR_SEM_OVF);
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          QUERY A SEMAPHORE
+*
+* Description: This function obtains information about a semaphore
+*
+* Arguments  : pevent        is a pointer to the event control block associated with the desired
+*                            semaphore
+*
+*              p_sem_data    is a pointer to a structure that will contain information about the
+*                            semaphore.
+*
+* Returns    : OS_ERR_NONE         The call was successful and the message was sent
+*              OS_ERR_EVENT_TYPE   If you are attempting to obtain data from a non semaphore.
+*              OS_ERR_PEVENT_NULL  If 'pevent'     is a NULL pointer.
+*              OS_ERR_PDATA_NULL   If 'p_sem_data' is a NULL pointer
+*********************************************************************************************************
+*/
+
+#if OS_SEM_QUERY_EN > 0u
+INT8U  OSSemQuery (OS_EVENT     *pevent,
+                   OS_SEM_DATA  *p_sem_data)
+{
+    INT8U       i;
+    OS_PRIO    *psrc;
+    OS_PRIO    *pdest;
+#if OS_CRITICAL_METHOD == 3u                               /* Allocate storage for CPU status register */
+    OS_CPU_SR   cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                         /* Validate 'pevent'                        */
+        return (OS_ERR_PEVENT_NULL);
+    }
+    if (p_sem_data == (OS_SEM_DATA *)0) {                  /* Validate 'p_sem_data'                    */
+        return (OS_ERR_PDATA_NULL);
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_SEM) {        /* Validate event block type                */
+        return (OS_ERR_EVENT_TYPE);
+    }
+    OS_ENTER_CRITICAL();
+    p_sem_data->OSEventGrp = pevent->OSEventGrp;           /* Copy message mailbox wait list           */
+    psrc                   = &pevent->OSEventTbl[0];
+    pdest                  = &p_sem_data->OSEventTbl[0];
+    for (i = 0u; i < OS_EVENT_TBL_SIZE; i++) {
+        *pdest++ = *psrc++;
+    }
+    p_sem_data->OSCnt = pevent->OSEventCnt;                /* Get semaphore count                      */
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif                                                     /* OS_SEM_QUERY_EN                          */
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                            SET SEMAPHORE
+*
+* Description: This function sets the semaphore count to the value specified as an argument.  Typically,
+*              this value would be 0.
+*
+*              You would typically use this function when a semaphore is used as a signaling mechanism
+*              and, you want to reset the count value.
+*
+* Arguments  : pevent     is a pointer to the event control block
+*
+*              cnt        is the new value for the semaphore count.  You would pass 0 to reset the
+*                         semaphore count.
+*
+*              perr       is a pointer to an error code returned by the function as follows:
+*
+*                            OS_ERR_NONE          The call was successful and the semaphore value was set.
+*                            OS_ERR_EVENT_TYPE    If you didn't pass a pointer to a semaphore.
+*                            OS_ERR_PEVENT_NULL   If 'pevent' is a NULL pointer.
+*                            OS_ERR_TASK_WAITING  If tasks are waiting on the semaphore.
+*********************************************************************************************************
+*/
+
+#if OS_SEM_SET_EN > 0u
+void  OSSemSet (OS_EVENT  *pevent,
+                INT16U     cnt,
+                INT8U     *perr)
+{
+#if OS_CRITICAL_METHOD == 3u                          /* Allocate storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pevent == (OS_EVENT *)0) {                    /* Validate 'pevent'                             */
+        *perr = OS_ERR_PEVENT_NULL;
+        return;
+    }
+#endif
+    if (pevent->OSEventType != OS_EVENT_TYPE_SEM) {   /* Validate event block type                     */
+        *perr = OS_ERR_EVENT_TYPE;
+        return;
+    }
+    OS_ENTER_CRITICAL();
+    *perr = OS_ERR_NONE;
+    if (pevent->OSEventCnt > 0u) {                    /* See if semaphore already has a count          */
+        pevent->OSEventCnt = cnt;                     /* Yes, set it to the new value specified.       */
+    } else {                                          /* No                                            */
+        if (pevent->OSEventGrp == 0u) {               /*      See if task(s) waiting?                  */
+            pevent->OSEventCnt = cnt;                 /*      No, OK to set the value                  */
+        } else {
+            *perr              = OS_ERR_TASK_WAITING;
+        }
+    }
+    OS_EXIT_CRITICAL();
+}
+#endif
+
+#endif                                                /* OS_SEM_EN                                     */
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_task.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_task.c
new file mode 100644
index 0000000..0ced65b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_task.c
@@ -0,0 +1,1343 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                            TASK MANAGEMENT
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_TASK.C
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#ifndef  OS_MASTER_FILE
+#include 
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                      CHANGE PRIORITY OF A TASK
+*
+* Description: This function allows you to change the priority of a task dynamically.  Note that the new
+*              priority MUST be available.
+*
+* Arguments  : oldp     is the old priority
+*
+*              newp     is the new priority
+*
+* Returns    : OS_ERR_NONE            is the call was successful
+*              OS_ERR_PRIO_INVALID    if the priority you specify is higher that the maximum allowed
+*                                     (i.e. >= OS_LOWEST_PRIO)
+*              OS_ERR_PRIO_EXIST      if the new priority already exist.
+*              OS_ERR_PRIO            there is no task with the specified OLD priority (i.e. the OLD task does
+*                                     not exist.
+*              OS_ERR_TASK_NOT_EXIST  if the task is assigned to a Mutex PIP.
+*********************************************************************************************************
+*/
+
+#if OS_TASK_CHANGE_PRIO_EN > 0u
+INT8U  OSTaskChangePrio (INT8U  oldprio,
+                         INT8U  newprio)
+{
+#if (OS_EVENT_EN)
+    OS_EVENT  *pevent;
+#if (OS_EVENT_MULTI_EN > 0u)
+    OS_EVENT **pevents;
+#endif
+#endif
+    OS_TCB    *ptcb;
+    INT8U      y_new;
+    INT8U      x_new;
+    INT8U      y_old;
+    OS_PRIO    bity_new;
+    OS_PRIO    bitx_new;
+    OS_PRIO    bity_old;
+    OS_PRIO    bitx_old;
+#if OS_CRITICAL_METHOD == 3u
+    OS_CPU_SR  cpu_sr = 0u;                                 /* Storage for CPU status register         */
+#endif
+
+
+/*$PAGE*/
+#if OS_ARG_CHK_EN > 0u
+    if (oldprio >= OS_LOWEST_PRIO) {
+        if (oldprio != OS_PRIO_SELF) {
+            return (OS_ERR_PRIO_INVALID);
+        }
+    }
+    if (newprio >= OS_LOWEST_PRIO) {
+        return (OS_ERR_PRIO_INVALID);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    if (OSTCBPrioTbl[newprio] != (OS_TCB *)0) {             /* New priority must not already exist     */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_PRIO_EXIST);
+    }
+    if (oldprio == OS_PRIO_SELF) {                          /* See if changing self                    */
+        oldprio = OSTCBCur->OSTCBPrio;                      /* Yes, get priority                       */
+    }
+    ptcb = OSTCBPrioTbl[oldprio];
+    if (ptcb == (OS_TCB *)0) {                              /* Does task to change exist?              */
+        OS_EXIT_CRITICAL();                                 /* No, can't change its priority!          */
+        return (OS_ERR_PRIO);
+    }
+    if (ptcb == OS_TCB_RESERVED) {                          /* Is task assigned to Mutex               */
+        OS_EXIT_CRITICAL();                                 /* No, can't change its priority!          */
+        return (OS_ERR_TASK_NOT_EXIST);
+    }
+#if OS_LOWEST_PRIO <= 63u
+    y_new                 = (INT8U)(newprio >> 3u);         /* Yes, compute new TCB fields             */
+    x_new                 = (INT8U)(newprio & 0x07u);
+#else
+    y_new                 = (INT8U)((INT8U)(newprio >> 4u) & 0x0Fu);
+    x_new                 = (INT8U)(newprio & 0x0Fu);
+#endif
+    bity_new              = (OS_PRIO)(1uL << y_new);
+    bitx_new              = (OS_PRIO)(1uL << x_new);
+
+    OSTCBPrioTbl[oldprio] = (OS_TCB *)0;                    /* Remove TCB from old priority            */
+    OSTCBPrioTbl[newprio] =  ptcb;                          /* Place pointer to TCB @ new priority     */
+    y_old                 =  ptcb->OSTCBY;
+    bity_old              =  ptcb->OSTCBBitY;
+    bitx_old              =  ptcb->OSTCBBitX;
+    if ((OSRdyTbl[y_old] &   bitx_old) != 0u) {             /* If task is ready make it not            */
+         OSRdyTbl[y_old] &= (OS_PRIO)~bitx_old;
+         if (OSRdyTbl[y_old] == 0u) {
+             OSRdyGrp &= (OS_PRIO)~bity_old;
+         }
+         OSRdyGrp        |= bity_new;                       /* Make new priority ready to run          */
+         OSRdyTbl[y_new] |= bitx_new;
+    }
+
+#if (OS_EVENT_EN)
+    pevent = ptcb->OSTCBEventPtr;
+    if (pevent != (OS_EVENT *)0) {
+        pevent->OSEventTbl[y_old] &= (OS_PRIO)~bitx_old;    /* Remove old task prio from wait list     */
+        if (pevent->OSEventTbl[y_old] == 0u) {
+            pevent->OSEventGrp    &= (OS_PRIO)~bity_old;
+        }
+        pevent->OSEventGrp        |= bity_new;              /* Add    new task prio to   wait list     */
+        pevent->OSEventTbl[y_new] |= bitx_new;
+    }
+#if (OS_EVENT_MULTI_EN > 0u)
+    if (ptcb->OSTCBEventMultiPtr != (OS_EVENT **)0) {
+        pevents =  ptcb->OSTCBEventMultiPtr;
+        pevent  = *pevents;
+        while (pevent != (OS_EVENT *)0) {
+            pevent->OSEventTbl[y_old] &= (OS_PRIO)~bitx_old;   /* Remove old task prio from wait lists */
+            if (pevent->OSEventTbl[y_old] == 0u) {
+                pevent->OSEventGrp    &= (OS_PRIO)~bity_old;
+            }
+            pevent->OSEventGrp        |= bity_new;          /* Add    new task prio to   wait lists    */
+            pevent->OSEventTbl[y_new] |= bitx_new;
+            pevents++;
+            pevent                     = *pevents;
+        }
+    }
+#endif
+#endif
+
+    ptcb->OSTCBPrio = newprio;                              /* Set new task priority                   */
+    ptcb->OSTCBY    = y_new;
+    ptcb->OSTCBX    = x_new;
+    ptcb->OSTCBBitY = bity_new;
+    ptcb->OSTCBBitX = bitx_new;
+    OS_EXIT_CRITICAL();
+    if (OSRunning == OS_TRUE) {
+        OS_Sched();                                         /* Find new highest priority task          */
+    }
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                            CREATE A TASK
+*
+* Description: This function is used to have uC/OS-II manage the execution of a task.  Tasks can either
+*              be created prior to the start of multitasking or by a running task.  A task cannot be
+*              created by an ISR.
+*
+* Arguments  : task     is a pointer to the task's code
+*
+*              p_arg    is a pointer to an optional data area which can be used to pass parameters to
+*                       the task when the task first executes.  Where the task is concerned it thinks
+*                       it was invoked and passed the argument 'p_arg' as follows:
+*
+*                           void Task (void *p_arg)
+*                           {
+*                               for (;;) {
+*                                   Task code;
+*                               }
+*                           }
+*
+*              ptos     is a pointer to the task's top of stack.  If the configuration constant
+*                       OS_STK_GROWTH is set to 1, the stack is assumed to grow downward (i.e. from high
+*                       memory to low memory).  'pstk' will thus point to the highest (valid) memory
+*                       location of the stack.  If OS_STK_GROWTH is set to 0, 'pstk' will point to the
+*                       lowest memory location of the stack and the stack will grow with increasing
+*                       memory locations.
+*
+*              prio     is the task's priority.  A unique priority MUST be assigned to each task and the
+*                       lower the number, the higher the priority.
+*
+* Returns    : OS_ERR_NONE                      if the function was successful.
+*              OS_ERR_PRIO_EXIST                if the task priority already exist
+*                                               (each task MUST have a unique priority).
+*              OS_ERR_PRIO_INVALID              if the priority you specify is higher that the maximum
+*                                               allowed (i.e. >= OS_LOWEST_PRIO)
+*              OS_ERR_TASK_CREATE_ISR           if you tried to create a task from an ISR.
+*              OS_ERR_ILLEGAL_CREATE_RUN_TIME   if you tried to create a task after safety critical
+*                                               operation started.
+*********************************************************************************************************
+*/
+
+#if OS_TASK_CREATE_EN > 0u
+INT8U  OSTaskCreate (void   (*task)(void *p_arg),
+                     void    *p_arg,
+                     OS_STK  *ptos,
+                     INT8U    prio)
+{
+    OS_STK     *psp;
+    INT8U       err;
+#if OS_CRITICAL_METHOD == 3u                 /* Allocate storage for CPU status register               */
+    OS_CPU_SR   cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == OS_TRUE) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (OS_ERR_ILLEGAL_CREATE_RUN_TIME);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio > OS_LOWEST_PRIO) {             /* Make sure priority is within allowable range           */
+        return (OS_ERR_PRIO_INVALID);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    if (OSIntNesting > 0u) {                 /* Make sure we don't create the task from within an ISR  */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_CREATE_ISR);
+    }
+    if (OSTCBPrioTbl[prio] == (OS_TCB *)0) { /* Make sure task doesn't already exist at this priority  */
+        OSTCBPrioTbl[prio] = OS_TCB_RESERVED;/* Reserve the priority to prevent others from doing ...  */
+                                             /* ... the same thing until task is created.              */
+        OS_EXIT_CRITICAL();
+        psp = OSTaskStkInit(task, p_arg, ptos, 0u);             /* Initialize the task's stack         */
+        err = OS_TCBInit(prio, psp, (OS_STK *)0, 0u, 0u, (void *)0, 0u);
+        if (err == OS_ERR_NONE) {
+            if (OSRunning == OS_TRUE) {      /* Find highest priority task if multitasking has started */
+                OS_Sched();
+            }
+        } else {
+            OS_ENTER_CRITICAL();
+            OSTCBPrioTbl[prio] = (OS_TCB *)0;/* Make this priority available to others                 */
+            OS_EXIT_CRITICAL();
+        }
+        return (err);
+    }
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_PRIO_EXIST);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                  CREATE A TASK (Extended Version)
+*
+* Description: This function is used to have uC/OS-II manage the execution of a task.  Tasks can either
+*              be created prior to the start of multitasking or by a running task.  A task cannot be
+*              created by an ISR.  This function is similar to OSTaskCreate() except that it allows
+*              additional information about a task to be specified.
+*
+* Arguments  : task      is a pointer to the task's code
+*
+*              p_arg     is a pointer to an optional data area which can be used to pass parameters to
+*                        the task when the task first executes.  Where the task is concerned it thinks
+*                        it was invoked and passed the argument 'p_arg' as follows:
+*
+*                            void Task (void *p_arg)
+*                            {
+*                                for (;;) {
+*                                    Task code;
+*                                }
+*                            }
+*
+*              ptos      is a pointer to the task's top of stack.  If the configuration constant
+*                        OS_STK_GROWTH is set to 1, the stack is assumed to grow downward (i.e. from high
+*                        memory to low memory).  'ptos' will thus point to the highest (valid) memory
+*                        location of the stack.  If OS_STK_GROWTH is set to 0, 'ptos' will point to the
+*                        lowest memory location of the stack and the stack will grow with increasing
+*                        memory locations.  'ptos' MUST point to a valid 'free' data item.
+*
+*              prio      is the task's priority.  A unique priority MUST be assigned to each task and the
+*                        lower the number, the higher the priority.
+*
+*              id        is the task's ID (0..65535)
+*
+*              pbos      is a pointer to the task's bottom of stack.  If the configuration constant
+*                        OS_STK_GROWTH is set to 1, the stack is assumed to grow downward (i.e. from high
+*                        memory to low memory).  'pbos' will thus point to the LOWEST (valid) memory
+*                        location of the stack.  If OS_STK_GROWTH is set to 0, 'pbos' will point to the
+*                        HIGHEST memory location of the stack and the stack will grow with increasing
+*                        memory locations.  'pbos' MUST point to a valid 'free' data item.
+*
+*              stk_size  is the size of the stack in number of elements.  If OS_STK is set to INT8U,
+*                        'stk_size' corresponds to the number of bytes available.  If OS_STK is set to
+*                        INT16U, 'stk_size' contains the number of 16-bit entries available.  Finally, if
+*                        OS_STK is set to INT32U, 'stk_size' contains the number of 32-bit entries
+*                        available on the stack.
+*
+*              pext      is a pointer to a user supplied memory location which is used as a TCB extension.
+*                        For example, this user memory can hold the contents of floating-point registers
+*                        during a context switch, the time each task takes to execute, the number of times
+*                        the task has been switched-in, etc.
+*
+*              opt       contains additional information (or options) about the behavior of the task.  The
+*                        LOWER 8-bits are reserved by uC/OS-II while the upper 8 bits can be application
+*                        specific.  See OS_TASK_OPT_??? in uCOS-II.H.  Current choices are:
+*
+*                        OS_TASK_OPT_STK_CHK      Stack checking to be allowed for the task
+*                        OS_TASK_OPT_STK_CLR      Clear the stack when the task is created
+*                        OS_TASK_OPT_SAVE_FP      If the CPU has floating-point registers, save them
+*                                                 during a context switch.
+*
+* Returns    : OS_ERR_NONE                      if the function was successful.
+*              OS_ERR_PRIO_EXIST                if the task priority already exist
+*                                               (each task MUST have a unique priority).
+*              OS_ERR_PRIO_INVALID              if the priority you specify is higher that the maximum
+*                                               allowed (i.e. > OS_LOWEST_PRIO)
+*              OS_ERR_TASK_CREATE_ISR           if you tried to create a task from an ISR.
+*              OS_ERR_ILLEGAL_CREATE_RUN_TIME   if you tried to create a task after safety critical
+*                                               operation started.
+*********************************************************************************************************
+*/
+/*$PAGE*/
+#if OS_TASK_CREATE_EXT_EN > 0u
+INT8U  OSTaskCreateExt (void   (*task)(void *p_arg),
+                        void    *p_arg,
+                        OS_STK  *ptos,
+                        INT8U    prio,
+                        INT16U   id,
+                        OS_STK  *pbos,
+                        INT32U   stk_size,
+                        void    *pext,
+                        INT16U   opt)
+{
+    OS_STK     *psp;
+    INT8U       err;
+#if OS_CRITICAL_METHOD == 3u                 /* Allocate storage for CPU status register               */
+    OS_CPU_SR   cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == OS_TRUE) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (OS_ERR_ILLEGAL_CREATE_RUN_TIME);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio > OS_LOWEST_PRIO) {             /* Make sure priority is within allowable range           */
+        return (OS_ERR_PRIO_INVALID);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    if (OSIntNesting > 0u) {                 /* Make sure we don't create the task from within an ISR  */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_CREATE_ISR);
+    }
+    if (OSTCBPrioTbl[prio] == (OS_TCB *)0) { /* Make sure task doesn't already exist at this priority  */
+        OSTCBPrioTbl[prio] = OS_TCB_RESERVED;/* Reserve the priority to prevent others from doing ...  */
+                                             /* ... the same thing until task is created.              */
+        OS_EXIT_CRITICAL();
+
+#if (OS_TASK_STAT_STK_CHK_EN > 0u)
+        OS_TaskStkClr(pbos, stk_size, opt);                    /* Clear the task stack (if needed)     */
+#endif
+
+        psp = OSTaskStkInit(task, p_arg, ptos, opt);           /* Initialize the task's stack          */
+        err = OS_TCBInit(prio, psp, pbos, id, stk_size, pext, opt);
+        if (err == OS_ERR_NONE) {
+            if (OSRunning == OS_TRUE) {                        /* Find HPT if multitasking has started */
+                OS_Sched();
+            }
+        } else {
+            OS_ENTER_CRITICAL();
+            OSTCBPrioTbl[prio] = (OS_TCB *)0;                  /* Make this priority avail. to others  */
+            OS_EXIT_CRITICAL();
+        }
+        return (err);
+    }
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_PRIO_EXIST);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                            DELETE A TASK
+*
+* Description: This function allows you to delete a task.  The calling task can delete itself by
+*              its own priority number.  The deleted task is returned to the dormant state and can be
+*              re-activated by creating the deleted task again.
+*
+* Arguments  : prio    is the priority of the task to delete.  Note that you can explicitly delete
+*                      the current task without knowing its priority level by setting 'prio' to
+*                      OS_PRIO_SELF.
+*
+* Returns    : OS_ERR_NONE             if the call is successful
+*              OS_ERR_TASK_DEL_IDLE    if you attempted to delete uC/OS-II's idle task
+*              OS_ERR_PRIO_INVALID     if the priority you specify is higher that the maximum allowed
+*                                      (i.e. >= OS_LOWEST_PRIO) or, you have not specified OS_PRIO_SELF.
+*              OS_ERR_TASK_DEL         if the task is assigned to a Mutex PIP.
+*              OS_ERR_TASK_NOT_EXIST   if the task you want to delete does not exist.
+*              OS_ERR_TASK_DEL_ISR     if you tried to delete a task from an ISR
+*
+* Notes      : 1) To reduce interrupt latency, OSTaskDel() 'disables' the task:
+*                    a) by making it not ready
+*                    b) by removing it from any wait lists
+*                    c) by preventing OSTimeTick() from making the task ready to run.
+*                 The task can then be 'unlinked' from the miscellaneous structures in uC/OS-II.
+*              2) The function OS_Dummy() is called after OS_EXIT_CRITICAL() because, on most processors,
+*                 the next instruction following the enable interrupt instruction is ignored.
+*              3) An ISR cannot delete a task.
+*              4) The lock nesting counter is incremented because, for a brief instant, if the current
+*                 task is being deleted, the current task would not be able to be rescheduled because it
+*                 is removed from the ready list.  Incrementing the nesting counter prevents another task
+*                 from being schedule.  This means that an ISR would return to the current task which is
+*                 being deleted.  The rest of the deletion would thus be able to be completed.
+*********************************************************************************************************
+*/
+
+#if OS_TASK_DEL_EN > 0u
+INT8U  OSTaskDel (INT8U prio)
+{
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+    OS_FLAG_NODE *pnode;
+#endif
+    OS_TCB       *ptcb;
+#if OS_CRITICAL_METHOD == 3u                            /* Allocate storage for CPU status register    */
+    OS_CPU_SR     cpu_sr = 0u;
+#endif
+
+
+
+    if (OSIntNesting > 0u) {                            /* See if trying to delete from ISR            */
+        return (OS_ERR_TASK_DEL_ISR);
+    }
+    if (prio == OS_TASK_IDLE_PRIO) {                    /* Not allowed to delete idle task             */
+        return (OS_ERR_TASK_DEL_IDLE);
+    }
+#if OS_ARG_CHK_EN > 0u
+    if (prio >= OS_LOWEST_PRIO) {                       /* Task priority valid ?                       */
+        if (prio != OS_PRIO_SELF) {
+            return (OS_ERR_PRIO_INVALID);
+        }
+    }
+#endif
+
+/*$PAGE*/
+    OS_ENTER_CRITICAL();
+    if (prio == OS_PRIO_SELF) {                         /* See if requesting to delete self            */
+        prio = OSTCBCur->OSTCBPrio;                     /* Set priority to delete to current           */
+    }
+    ptcb = OSTCBPrioTbl[prio];
+    if (ptcb == (OS_TCB *)0) {                          /* Task to delete must exist                   */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_NOT_EXIST);
+    }
+    if (ptcb == OS_TCB_RESERVED) {                      /* Must not be assigned to Mutex               */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_DEL);
+    }
+
+    OSRdyTbl[ptcb->OSTCBY] &= (OS_PRIO)~ptcb->OSTCBBitX;
+    if (OSRdyTbl[ptcb->OSTCBY] == 0u) {                 /* Make task not ready                         */
+        OSRdyGrp           &= (OS_PRIO)~ptcb->OSTCBBitY;
+    }
+
+#if (OS_EVENT_EN)
+    if (ptcb->OSTCBEventPtr != (OS_EVENT *)0) {
+        OS_EventTaskRemove(ptcb, ptcb->OSTCBEventPtr);  /* Remove this task from any event   wait list */
+    }
+#if (OS_EVENT_MULTI_EN > 0u)
+    if (ptcb->OSTCBEventMultiPtr != (OS_EVENT **)0) {   /* Remove this task from any events' wait lists*/
+        OS_EventTaskRemoveMulti(ptcb, ptcb->OSTCBEventMultiPtr);
+    }
+#endif
+#endif
+
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+    pnode = ptcb->OSTCBFlagNode;
+    if (pnode != (OS_FLAG_NODE *)0) {                   /* If task is waiting on event flag            */
+        OS_FlagUnlink(pnode);                           /* Remove from wait list                       */
+    }
+#endif
+
+    ptcb->OSTCBDly      = 0u;                           /* Prevent OSTimeTick() from updating          */
+    ptcb->OSTCBStat     = OS_STAT_RDY;                  /* Prevent task from being resumed             */
+    ptcb->OSTCBStatPend = OS_STAT_PEND_OK;
+    if (OSLockNesting < 255u) {                         /* Make sure we don't context switch           */
+        OSLockNesting++;
+    }
+    OS_EXIT_CRITICAL();                                 /* Enabling INT. ignores next instruc.         */
+    OS_Dummy();                                         /* ... Dummy ensures that INTs will be         */
+    OS_ENTER_CRITICAL();                                /* ... disabled HERE!                          */
+    if (OSLockNesting > 0u) {                           /* Remove context switch lock                  */
+        OSLockNesting--;
+    }
+    OSTaskDelHook(ptcb);                                /* Call user defined hook                      */
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+    OS_TLS_TaskDel(ptcb);                               /* Call TLS hook                               */
+#endif
+#endif
+
+    OSTaskCtr--;                                        /* One less task being managed                 */
+    OSTCBPrioTbl[prio] = (OS_TCB *)0;                   /* Clear old priority entry                    */
+    if (ptcb->OSTCBPrev == (OS_TCB *)0) {               /* Remove from TCB chain                       */
+        ptcb->OSTCBNext->OSTCBPrev = (OS_TCB *)0;
+        OSTCBList                  = ptcb->OSTCBNext;
+    } else {
+        ptcb->OSTCBPrev->OSTCBNext = ptcb->OSTCBNext;
+        ptcb->OSTCBNext->OSTCBPrev = ptcb->OSTCBPrev;
+    }
+    ptcb->OSTCBNext     = OSTCBFreeList;                /* Return TCB to free TCB list                 */
+    OSTCBFreeList       = ptcb;
+#if OS_TASK_NAME_EN > 0u
+    ptcb->OSTCBTaskName = (INT8U *)(void *)"?";
+#endif
+    OS_EXIT_CRITICAL();
+    if (OSRunning == OS_TRUE) {
+        OS_Sched();                                     /* Find new highest priority task              */
+    }
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                  REQUEST THAT A TASK DELETE ITSELF
+*
+* Description: This function is used to:
+*                   a) notify a task to delete itself.
+*                   b) to see if a task requested that the current task delete itself.
+*              This function is a little tricky to understand.  Basically, you have a task that needs
+*              to be deleted however, this task has resources that it has allocated (memory buffers,
+*              semaphores, mailboxes, queues etc.).  The task cannot be deleted otherwise these
+*              resources would not be freed.  The requesting task calls OSTaskDelReq() to indicate that
+*              the task needs to be deleted.  Deleting of the task is however, deferred to the task to
+*              be deleted.  For example, suppose that task #10 needs to be deleted.  The requesting task
+*              example, task #5, would call OSTaskDelReq(10).  When task #10 gets to execute, it calls
+*              this function by specifying OS_PRIO_SELF and monitors the returned value.  If the return
+*              value is OS_ERR_TASK_DEL_REQ, another task requested a task delete.  Task #10 would look like
+*              this:
+*
+*                   void Task(void *p_arg)
+*                   {
+*                       .
+*                       .
+*                       while (1) {
+*                           OSTimeDly(1);
+*                           if (OSTaskDelReq(OS_PRIO_SELF) == OS_ERR_TASK_DEL_REQ) {
+*                               Release any owned resources;
+*                               De-allocate any dynamic memory;
+*                               OSTaskDel(OS_PRIO_SELF);
+*                           }
+*                       }
+*                   }
+*
+* Arguments  : prio    is the priority of the task to request the delete from
+*
+* Returns    : OS_ERR_NONE            if the task exist and the request has been registered
+*              OS_ERR_TASK_NOT_EXIST  if the task has been deleted.  This allows the caller to know whether
+*                                     the request has been executed.
+*              OS_ERR_TASK_DEL        if the task is assigned to a Mutex.
+*              OS_ERR_TASK_DEL_IDLE   if you requested to delete uC/OS-II's idle task
+*              OS_ERR_PRIO_INVALID    if the priority you specify is higher that the maximum allowed
+*                                     (i.e. >= OS_LOWEST_PRIO) or, you have not specified OS_PRIO_SELF.
+*              OS_ERR_TASK_DEL_REQ    if a task (possibly another task) requested that the running task be
+*                                     deleted.
+*********************************************************************************************************
+*/
+/*$PAGE*/
+#if OS_TASK_DEL_EN > 0u
+INT8U  OSTaskDelReq (INT8U prio)
+{
+    INT8U      stat;
+    OS_TCB    *ptcb;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    if (prio == OS_TASK_IDLE_PRIO) {                            /* Not allowed to delete idle task     */
+        return (OS_ERR_TASK_DEL_IDLE);
+    }
+#if OS_ARG_CHK_EN > 0u
+    if (prio >= OS_LOWEST_PRIO) {                               /* Task priority valid ?               */
+        if (prio != OS_PRIO_SELF) {
+            return (OS_ERR_PRIO_INVALID);
+        }
+    }
+#endif
+    if (prio == OS_PRIO_SELF) {                                 /* See if a task is requesting to ...  */
+        OS_ENTER_CRITICAL();                                    /* ... this task to delete itself      */
+        stat = OSTCBCur->OSTCBDelReq;                           /* Return request status to caller     */
+        OS_EXIT_CRITICAL();
+        return (stat);
+    }
+    OS_ENTER_CRITICAL();
+    ptcb = OSTCBPrioTbl[prio];
+    if (ptcb == (OS_TCB *)0) {                                  /* Task to delete must exist           */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_NOT_EXIST);                         /* Task must already be deleted        */
+    }
+    if (ptcb == OS_TCB_RESERVED) {                              /* Must NOT be assigned to a Mutex     */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_DEL);
+    }
+    ptcb->OSTCBDelReq = OS_ERR_TASK_DEL_REQ;                    /* Set flag indicating task to be DEL. */
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       GET THE NAME OF A TASK
+*
+* Description: This function is called to obtain the name of a task.
+*
+* Arguments  : prio      is the priority of the task that you want to obtain the name from.
+*
+*              pname     is a pointer to a pointer to an ASCII string that will receive the name of the task.
+*
+*              perr      is a pointer to an error code that can contain one of the following values:
+*
+*                        OS_ERR_NONE                if the requested task is resumed
+*                        OS_ERR_TASK_NOT_EXIST      if the task has not been created or is assigned to a Mutex
+*                        OS_ERR_PRIO_INVALID        if you specified an invalid priority:
+*                                                   A higher value than the idle task or not OS_PRIO_SELF.
+*                        OS_ERR_PNAME_NULL          You passed a NULL pointer for 'pname'
+*                        OS_ERR_NAME_GET_ISR        You called this function from an ISR
+*
+*
+* Returns    : The length of the string or 0 if the task does not exist.
+*********************************************************************************************************
+*/
+
+#if OS_TASK_NAME_EN > 0u
+INT8U  OSTaskNameGet (INT8U    prio,
+                      INT8U  **pname,
+                      INT8U   *perr)
+{
+    OS_TCB    *ptcb;
+    INT8U      len;
+#if OS_CRITICAL_METHOD == 3u                             /* Allocate storage for CPU status register   */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio > OS_LOWEST_PRIO) {                         /* Task priority valid ?                      */
+        if (prio != OS_PRIO_SELF) {
+            *perr = OS_ERR_PRIO_INVALID;                 /* No                                         */
+            return (0u);
+        }
+    }
+    if (pname == (INT8U **)0) {                          /* Is 'pname' a NULL pointer?                 */
+        *perr = OS_ERR_PNAME_NULL;                       /* Yes                                        */
+        return (0u);
+    }
+#endif
+    if (OSIntNesting > 0u) {                              /* See if trying to call from an ISR          */
+        *perr = OS_ERR_NAME_GET_ISR;
+        return (0u);
+    }
+    OS_ENTER_CRITICAL();
+    if (prio == OS_PRIO_SELF) {                          /* See if caller desires it's own name        */
+        prio = OSTCBCur->OSTCBPrio;
+    }
+    ptcb = OSTCBPrioTbl[prio];
+    if (ptcb == (OS_TCB *)0) {                           /* Does task exist?                           */
+        OS_EXIT_CRITICAL();                              /* No                                         */
+        *perr = OS_ERR_TASK_NOT_EXIST;
+        return (0u);
+    }
+    if (ptcb == OS_TCB_RESERVED) {                       /* Task assigned to a Mutex?                  */
+        OS_EXIT_CRITICAL();                              /* Yes                                        */
+        *perr = OS_ERR_TASK_NOT_EXIST;
+        return (0u);
+    }
+    *pname = ptcb->OSTCBTaskName;
+    len    = OS_StrLen(*pname);
+    OS_EXIT_CRITICAL();
+    *perr  = OS_ERR_NONE;
+    return (len);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       ASSIGN A NAME TO A TASK
+*
+* Description: This function is used to set the name of a task.
+*
+* Arguments  : prio      is the priority of the task that you want the assign a name to.
+*
+*              pname     is a pointer to an ASCII string that contains the name of the task.
+*
+*              perr       is a pointer to an error code that can contain one of the following values:
+*
+*                        OS_ERR_NONE                if the requested task is resumed
+*                        OS_ERR_TASK_NOT_EXIST      if the task has not been created or is assigned to a Mutex
+*                        OS_ERR_PNAME_NULL          You passed a NULL pointer for 'pname'
+*                        OS_ERR_PRIO_INVALID        if you specified an invalid priority:
+*                                                   A higher value than the idle task or not OS_PRIO_SELF.
+*                        OS_ERR_NAME_SET_ISR        if you called this function from an ISR
+*
+* Returns    : None
+*********************************************************************************************************
+*/
+#if OS_TASK_NAME_EN > 0u
+void  OSTaskNameSet (INT8U   prio,
+                     INT8U  *pname,
+                     INT8U  *perr)
+{
+    OS_TCB    *ptcb;
+#if OS_CRITICAL_METHOD == 3u                         /* Allocate storage for CPU status register       */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio > OS_LOWEST_PRIO) {                     /* Task priority valid ?                          */
+        if (prio != OS_PRIO_SELF) {
+            *perr = OS_ERR_PRIO_INVALID;             /* No                                             */
+            return;
+        }
+    }
+    if (pname == (INT8U *)0) {                       /* Is 'pname' a NULL pointer?                     */
+        *perr = OS_ERR_PNAME_NULL;                   /* Yes                                            */
+        return;
+    }
+#endif
+    if (OSIntNesting > 0u) {                         /* See if trying to call from an ISR              */
+        *perr = OS_ERR_NAME_SET_ISR;
+        return;
+    }
+    OS_ENTER_CRITICAL();
+    if (prio == OS_PRIO_SELF) {                      /* See if caller desires to set it's own name     */
+        prio = OSTCBCur->OSTCBPrio;
+    }
+    ptcb = OSTCBPrioTbl[prio];
+    if (ptcb == (OS_TCB *)0) {                       /* Does task exist?                               */
+        OS_EXIT_CRITICAL();                          /* No                                             */
+        *perr = OS_ERR_TASK_NOT_EXIST;
+        return;
+    }
+    if (ptcb == OS_TCB_RESERVED) {                   /* Task assigned to a Mutex?                      */
+        OS_EXIT_CRITICAL();                          /* Yes                                            */
+        *perr = OS_ERR_TASK_NOT_EXIST;
+        return;
+    }
+    ptcb->OSTCBTaskName = pname;
+    OS_EXIT_CRITICAL();
+    *perr               = OS_ERR_NONE;
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       RESUME A SUSPENDED TASK
+*
+* Description: This function is called to resume a previously suspended task.  This is the only call that
+*              will remove an explicit task suspension.
+*
+* Arguments  : prio     is the priority of the task to resume.
+*
+* Returns    : OS_ERR_NONE                if the requested task is resumed
+*              OS_ERR_PRIO_INVALID        if the priority you specify is higher that the maximum allowed
+*                                         (i.e. >= OS_LOWEST_PRIO)
+*              OS_ERR_TASK_RESUME_PRIO    if the task to resume does not exist
+*              OS_ERR_TASK_NOT_EXIST      if the task is assigned to a Mutex PIP
+*              OS_ERR_TASK_NOT_SUSPENDED  if the task to resume has not been suspended
+*********************************************************************************************************
+*/
+
+#if OS_TASK_SUSPEND_EN > 0u
+INT8U  OSTaskResume (INT8U prio)
+{
+    OS_TCB    *ptcb;
+#if OS_CRITICAL_METHOD == 3u                                  /* Storage for CPU status register       */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio >= OS_LOWEST_PRIO) {                             /* Make sure task priority is valid      */
+        return (OS_ERR_PRIO_INVALID);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    ptcb = OSTCBPrioTbl[prio];
+    if (ptcb == (OS_TCB *)0) {                                /* Task to suspend must exist            */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_RESUME_PRIO);
+    }
+    if (ptcb == OS_TCB_RESERVED) {                            /* See if assigned to Mutex              */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_NOT_EXIST);
+    }
+    if ((ptcb->OSTCBStat & OS_STAT_SUSPEND) != OS_STAT_RDY) { /* Task must be suspended                */
+        ptcb->OSTCBStat &= (INT8U)~(INT8U)OS_STAT_SUSPEND;    /* Remove suspension                     */
+        if ((ptcb->OSTCBStat & OS_STAT_PEND_ANY) == OS_STAT_RDY) { /* See if task is now ready         */
+            if (ptcb->OSTCBDly == 0u) {
+                OSRdyGrp               |= ptcb->OSTCBBitY;    /* Yes, Make task ready to run           */
+                OSRdyTbl[ptcb->OSTCBY] |= ptcb->OSTCBBitX;
+                OS_EXIT_CRITICAL();
+                if (OSRunning == OS_TRUE) {
+                    OS_Sched();                               /* Find new highest priority task        */
+                }
+            } else {
+                OS_EXIT_CRITICAL();
+            }
+        } else {                                              /* Must be pending on event              */
+            OS_EXIT_CRITICAL();
+        }
+        return (OS_ERR_NONE);
+    }
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_TASK_NOT_SUSPENDED);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           STACK CHECKING
+*
+* Description: This function is called to check the amount of free memory left on the specified task's
+*              stack.
+*
+* Arguments  : prio          is the task priority
+*
+*              p_stk_data    is a pointer to a data structure of type OS_STK_DATA.
+*
+* Returns    : OS_ERR_NONE            upon success
+*              OS_ERR_PRIO_INVALID    if the priority you specify is higher that the maximum allowed
+*                                     (i.e. > OS_LOWEST_PRIO) or, you have not specified OS_PRIO_SELF.
+*              OS_ERR_TASK_NOT_EXIST  if the desired task has not been created or is assigned to a Mutex PIP
+*              OS_ERR_TASK_OPT        if you did NOT specified OS_TASK_OPT_STK_CHK when the task was created
+*              OS_ERR_PDATA_NULL      if 'p_stk_data' is a NULL pointer
+*********************************************************************************************************
+*/
+#if (OS_TASK_STAT_STK_CHK_EN > 0u) && (OS_TASK_CREATE_EXT_EN > 0u)
+INT8U  OSTaskStkChk (INT8U         prio,
+                     OS_STK_DATA  *p_stk_data)
+{
+    OS_TCB    *ptcb;
+    OS_STK    *pchk;
+    INT32U     nfree;
+    INT32U     size;
+#if OS_CRITICAL_METHOD == 3u                           /* Allocate storage for CPU status register     */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio > OS_LOWEST_PRIO) {                       /* Make sure task priority is valid             */
+        if (prio != OS_PRIO_SELF) {
+            return (OS_ERR_PRIO_INVALID);
+        }
+    }
+    if (p_stk_data == (OS_STK_DATA *)0) {              /* Validate 'p_stk_data'                        */
+        return (OS_ERR_PDATA_NULL);
+    }
+#endif
+    p_stk_data->OSFree = 0u;                           /* Assume failure, set to 0 size                */
+    p_stk_data->OSUsed = 0u;
+    OS_ENTER_CRITICAL();
+    if (prio == OS_PRIO_SELF) {                        /* See if check for SELF                        */
+        prio = OSTCBCur->OSTCBPrio;
+    }
+    ptcb = OSTCBPrioTbl[prio];
+    if (ptcb == (OS_TCB *)0) {                         /* Make sure task exist                         */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_NOT_EXIST);
+    }
+    if (ptcb == OS_TCB_RESERVED) {
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_NOT_EXIST);
+    }
+    if ((ptcb->OSTCBOpt & OS_TASK_OPT_STK_CHK) == 0u) { /* Make sure stack checking option is set      */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_OPT);
+    }
+    nfree = 0u;
+    size  = ptcb->OSTCBStkSize;
+    pchk  = ptcb->OSTCBStkBottom;
+    OS_EXIT_CRITICAL();
+#if OS_STK_GROWTH == 1u
+    while (*pchk++ == (OS_STK)0) {                    /* Compute the number of zero entries on the stk */
+        nfree++;
+    }
+#else
+    while (*pchk-- == (OS_STK)0) {
+        nfree++;
+    }
+#endif
+    p_stk_data->OSFree = nfree;                       /* Store   number of free entries on the stk     */
+    p_stk_data->OSUsed = size - nfree;                /* Compute number of entries used on the stk     */
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           SUSPEND A TASK
+*
+* Description: This function is called to suspend a task.  The task can be the calling task if the
+*              priority passed to OSTaskSuspend() is the priority of the calling task or OS_PRIO_SELF.
+*
+* Arguments  : prio     is the priority of the task to suspend.  If you specify OS_PRIO_SELF, the
+*                       calling task will suspend itself and rescheduling will occur.
+*
+* Returns    : OS_ERR_NONE               if the requested task is suspended
+*              OS_ERR_TASK_SUSPEND_IDLE  if you attempted to suspend the idle task which is not allowed.
+*              OS_ERR_PRIO_INVALID       if the priority you specify is higher that the maximum allowed
+*                                        (i.e. >= OS_LOWEST_PRIO) or, you have not specified OS_PRIO_SELF.
+*              OS_ERR_TASK_SUSPEND_PRIO  if the task to suspend does not exist
+*              OS_ERR_TASK_NOT_EXITS     if the task is assigned to a Mutex PIP
+*
+* Note       : You should use this function with great care.  If you suspend a task that is waiting for
+*              an event (i.e. a message, a semaphore, a queue ...) you will prevent this task from
+*              running when the event arrives.
+*********************************************************************************************************
+*/
+
+#if OS_TASK_SUSPEND_EN > 0u
+INT8U  OSTaskSuspend (INT8U prio)
+{
+    BOOLEAN    self;
+    OS_TCB    *ptcb;
+    INT8U      y;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio == OS_TASK_IDLE_PRIO) {                            /* Not allowed to suspend idle task    */
+        return (OS_ERR_TASK_SUSPEND_IDLE);
+    }
+    if (prio >= OS_LOWEST_PRIO) {                               /* Task priority valid ?               */
+        if (prio != OS_PRIO_SELF) {
+            return (OS_ERR_PRIO_INVALID);
+        }
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    if (prio == OS_PRIO_SELF) {                                 /* See if suspend SELF                 */
+        prio = OSTCBCur->OSTCBPrio;
+        self = OS_TRUE;
+    } else if (prio == OSTCBCur->OSTCBPrio) {                   /* See if suspending self              */
+        self = OS_TRUE;
+    } else {
+        self = OS_FALSE;                                        /* No suspending another task          */
+    }
+    ptcb = OSTCBPrioTbl[prio];
+    if (ptcb == (OS_TCB *)0) {                                  /* Task to suspend must exist          */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_SUSPEND_PRIO);
+    }
+    if (ptcb == OS_TCB_RESERVED) {                              /* See if assigned to Mutex            */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_NOT_EXIST);
+    }
+    y            = ptcb->OSTCBY;
+    OSRdyTbl[y] &= (OS_PRIO)~ptcb->OSTCBBitX;                   /* Make task not ready                 */
+    if (OSRdyTbl[y] == 0u) {
+        OSRdyGrp &= (OS_PRIO)~ptcb->OSTCBBitY;
+    }
+    ptcb->OSTCBStat |= OS_STAT_SUSPEND;                         /* Status of task is 'SUSPENDED'       */
+    OS_EXIT_CRITICAL();
+    if (self == OS_TRUE) {                                      /* Context switch only if SELF         */
+        OS_Sched();                                             /* Find new highest priority task      */
+    }
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                            QUERY A TASK
+*
+* Description: This function is called to obtain a copy of the desired task's TCB.
+*
+* Arguments  : prio         is the priority of the task to obtain information from.
+*
+*              p_task_data  is a pointer to where the desired task's OS_TCB will be stored.
+*
+* Returns    : OS_ERR_NONE            if the requested task is suspended
+*              OS_ERR_PRIO_INVALID    if the priority you specify is higher that the maximum allowed
+*                                     (i.e. > OS_LOWEST_PRIO) or, you have not specified OS_PRIO_SELF.
+*              OS_ERR_PRIO            if the desired task has not been created
+*              OS_ERR_TASK_NOT_EXIST  if the task is assigned to a Mutex PIP
+*              OS_ERR_PDATA_NULL      if 'p_task_data' is a NULL pointer
+*********************************************************************************************************
+*/
+
+#if OS_TASK_QUERY_EN > 0u
+INT8U  OSTaskQuery (INT8U    prio,
+                    OS_TCB  *p_task_data)
+{
+    OS_TCB    *ptcb;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio > OS_LOWEST_PRIO) {                 /* Task priority valid ?                              */
+        if (prio != OS_PRIO_SELF) {
+            return (OS_ERR_PRIO_INVALID);
+        }
+    }
+    if (p_task_data == (OS_TCB *)0) {            /* Validate 'p_task_data'                             */
+        return (OS_ERR_PDATA_NULL);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    if (prio == OS_PRIO_SELF) {                  /* See if suspend SELF                                */
+        prio = OSTCBCur->OSTCBPrio;
+    }
+    ptcb = OSTCBPrioTbl[prio];
+    if (ptcb == (OS_TCB *)0) {                   /* Task to query must exist                           */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_PRIO);
+    }
+    if (ptcb == OS_TCB_RESERVED) {               /* Task to query must not be assigned to a Mutex      */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_NOT_EXIST);
+    }
+                                                 /* Copy TCB into user storage area                    */
+    OS_MemCopy((INT8U *)p_task_data, (INT8U *)ptcb, sizeof(OS_TCB));
+    OS_EXIT_CRITICAL();
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                              GET THE CURRENT VALUE OF A TASK REGISTER
+*
+* Description: This function is called to obtain the current value of a task register.  Task registers
+*              are application specific and can be used to store task specific values such as 'error
+*              numbers' (i.e. errno), statistics, etc.  Each task register can hold a 32-bit value.
+*
+* Arguments  : prio      is the priority of the task you want to get the task register from.  If you
+*                        specify OS_PRIO_SELF then the task register of the current task will be obtained.
+*
+*              id        is the 'id' of the desired task register.  Note that the 'id' must be less
+*                        than OS_TASK_REG_TBL_SIZE
+*
+*              perr      is a pointer to a variable that will hold an error code related to this call.
+*
+*                        OS_ERR_NONE            if the call was successful
+*                        OS_ERR_PRIO_INVALID    if you specified an invalid priority
+*                        OS_ERR_ID_INVALID      if the 'id' is not between 0 and OS_TASK_REG_TBL_SIZE-1
+*
+* Returns    : The current value of the task's register or 0 if an error is detected.
+*
+* Note(s)    : The maximum number of task variables is 254
+*********************************************************************************************************
+*/
+
+#if OS_TASK_REG_TBL_SIZE > 0u
+INT32U  OSTaskRegGet (INT8U   prio,
+                      INT8U   id,
+                      INT8U  *perr)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+    INT32U     value;
+    OS_TCB    *ptcb;
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio >= OS_LOWEST_PRIO) {
+        if (prio != OS_PRIO_SELF) {
+            *perr = OS_ERR_PRIO_INVALID;
+            return (0u);
+        }
+    }
+    if (id >= OS_TASK_REG_TBL_SIZE) {
+        *perr = OS_ERR_ID_INVALID;
+        return (0u);
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    if (prio == OS_PRIO_SELF) {                  /* See if need to get register from current task      */
+        ptcb = OSTCBCur;
+    } else {
+        ptcb = OSTCBPrioTbl[prio];
+    }
+    value = ptcb->OSTCBRegTbl[id];
+    OS_EXIT_CRITICAL();
+    *perr = OS_ERR_NONE;
+    return (value);
+}
+#endif
+
+/*$PAGE*/
+/*
+************************************************************************************************************************
+*                                    ALLOCATE THE NEXT AVAILABLE TASK REGISTER ID
+*
+* Description: This function is called to obtain a task register ID.  This function thus allows task registers IDs to be
+*              allocated dynamically instead of statically.
+*
+* Arguments  : p_err       is a pointer to a variable that will hold an error code related to this call.
+*
+*                            OS_ERR_NONE               if the call was successful
+*                            OS_ERR_NO_MORE_ID_AVAIL   if you are attempting to assign more task register IDs than you 
+*                                                           have available through OS_TASK_REG_TBL_SIZE.
+*
+* Returns    : The next available task register 'id' or OS_TASK_REG_TBL_SIZE if an error is detected.
+************************************************************************************************************************
+*/
+
+#if OS_TASK_REG_TBL_SIZE > 0u
+INT8U  OSTaskRegGetID (INT8U  *perr)
+{
+#if OS_CRITICAL_METHOD == 3u                                    /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+    INT8U      id;
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((INT8U)OS_TASK_REG_TBL_SIZE);
+    }
+#endif
+
+    OS_ENTER_CRITICAL();
+    if (OSTaskRegNextAvailID >= OS_TASK_REG_TBL_SIZE) {         /* See if we exceeded the number of IDs available     */
+       *perr = OS_ERR_NO_MORE_ID_AVAIL;                         /* Yes, cannot allocate more task register IDs        */
+        OS_EXIT_CRITICAL();
+        return ((INT8U)OS_TASK_REG_TBL_SIZE);
+    }
+     
+    id   = OSTaskRegNextAvailID;                                /* Assign the next available ID                       */
+    OSTaskRegNextAvailID++;                                     /* Increment available ID for next request            */
+    OS_EXIT_CRITICAL();
+   *perr = OS_ERR_NONE;
+    return (id);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                              SET THE CURRENT VALUE OF A TASK VARIABLE
+*
+* Description: This function is called to change the current value of a task register.  Task registers
+*              are application specific and can be used to store task specific values such as 'error
+*              numbers' (i.e. errno), statistics, etc.  Each task register can hold a 32-bit value.
+*
+* Arguments  : prio      is the priority of the task you want to set the task register for.  If you
+*                        specify OS_PRIO_SELF then the task register of the current task will be obtained.
+*
+*              id        is the 'id' of the desired task register.  Note that the 'id' must be less
+*                        than OS_TASK_REG_TBL_SIZE
+*
+*              value     is the desired value for the task register.
+*
+*              perr      is a pointer to a variable that will hold an error code related to this call.
+*
+*                        OS_ERR_NONE            if the call was successful
+*                        OS_ERR_PRIO_INVALID    if you specified an invalid priority
+*                        OS_ERR_ID_INVALID      if the 'id' is not between 0 and OS_TASK_REG_TBL_SIZE-1
+*
+* Returns    : The current value of the task's variable or 0 if an error is detected.
+*
+* Note(s)    : The maximum number of task variables is 254
+*********************************************************************************************************
+*/
+
+#if OS_TASK_REG_TBL_SIZE > 0u
+void  OSTaskRegSet (INT8U    prio,
+                    INT8U    id,
+                    INT32U   value,
+                    INT8U   *perr)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+    OS_TCB    *ptcb;
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (prio >= OS_LOWEST_PRIO) {
+        if (prio != OS_PRIO_SELF) {
+            *perr = OS_ERR_PRIO_INVALID;
+            return;
+        }
+    }
+    if (id >= OS_TASK_REG_TBL_SIZE) {
+        *perr = OS_ERR_ID_INVALID;
+        return;
+    }
+#endif
+    OS_ENTER_CRITICAL();
+    if (prio == OS_PRIO_SELF) {                  /* See if need to get register from current task      */
+        ptcb = OSTCBCur;
+    } else {
+        ptcb = OSTCBPrioTbl[prio];
+    }
+    ptcb->OSTCBRegTbl[id] = value;
+    OS_EXIT_CRITICAL();
+    *perr                 = OS_ERR_NONE;
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                    CATCH ACCIDENTAL TASK RETURN
+*
+* Description: This function is called if a task accidentally returns without deleting itself.  In other
+*              words, a task should either be an infinite loop or delete itself if it's done.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-II and your application should not call it.
+*********************************************************************************************************
+*/
+
+void  OS_TaskReturn (void)
+{
+    OSTaskReturnHook(OSTCBCur);                   /* Call hook to let user decide on what to do        */
+
+#if OS_TASK_DEL_EN > 0u
+    (void)OSTaskDel(OS_PRIO_SELF);                /* Delete task if it accidentally returns!           */
+#else
+    for (;;) {
+        OSTimeDly(OS_TICKS_PER_SEC);
+    }
+#endif
+}
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          CLEAR TASK STACK
+*
+* Description: This function is used to clear the stack of a task (i.e. write all zeros)
+*
+* Arguments  : pbos     is a pointer to the task's bottom of stack.  If the configuration constant
+*                       OS_STK_GROWTH is set to 1, the stack is assumed to grow downward (i.e. from high
+*                       memory to low memory).  'pbos' will thus point to the lowest (valid) memory
+*                       location of the stack.  If OS_STK_GROWTH is set to 0, 'pbos' will point to the
+*                       highest memory location of the stack and the stack will grow with increasing
+*                       memory locations.  'pbos' MUST point to a valid 'free' data item.
+*
+*              size     is the number of 'stack elements' to clear.
+*
+*              opt      contains additional information (or options) about the behavior of the task.  The
+*                       LOWER 8-bits are reserved by uC/OS-II while the upper 8 bits can be application
+*                       specific.  See OS_TASK_OPT_??? in uCOS-II.H.
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+#if (OS_TASK_STAT_STK_CHK_EN > 0u) && (OS_TASK_CREATE_EXT_EN > 0u)
+void  OS_TaskStkClr (OS_STK  *pbos,
+                     INT32U   size,
+                     INT16U   opt)
+{
+    if ((opt & OS_TASK_OPT_STK_CHK) != 0x0000u) {      /* See if stack checking has been enabled       */
+        if ((opt & OS_TASK_OPT_STK_CLR) != 0x0000u) {  /* See if stack needs to be cleared             */
+#if OS_STK_GROWTH == 1u
+            while (size > 0u) {                        /* Stack grows from HIGH to LOW memory          */
+                size--;
+                *pbos++ = (OS_STK)0;                   /* Clear from bottom of stack and up!           */
+            }
+#else
+            while (size > 0u) {                        /* Stack grows from LOW to HIGH memory          */
+                size--;
+                *pbos-- = (OS_STK)0;                   /* Clear from bottom of stack and down          */
+            }
+#endif
+        }
+    }
+}
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_time.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_time.c
new file mode 100644
index 0000000..d536900
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_time.c
@@ -0,0 +1,265 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                             TIME MANAGEMENT
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_TIME.C
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#ifndef  OS_MASTER_FILE
+#include 
+#endif
+
+/*
+*********************************************************************************************************
+*                                        DELAY TASK 'n' TICKS
+*
+* Description: This function is called to delay execution of the currently running task until the
+*              specified number of system ticks expires.  This, of course, directly equates to delaying
+*              the current task for some time to expire.  No delay will result If the specified delay is
+*              0.  If the specified delay is greater than 0 then, a context switch will result.
+*
+* Arguments  : ticks     is the time delay that the task will be suspended in number of clock 'ticks'.
+*                        Note that by specifying 0, the task will not be delayed.
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+void  OSTimeDly (INT32U ticks)
+{
+    INT8U      y;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    if (OSIntNesting > 0u) {                     /* See if trying to call from an ISR                  */
+        return;
+    }
+    if (OSLockNesting > 0u) {                    /* See if called with scheduler locked                */
+        return;
+    }
+    if (ticks > 0u) {                            /* 0 means no delay!                                  */
+        OS_ENTER_CRITICAL();
+        y            =  OSTCBCur->OSTCBY;        /* Delay current task                                 */
+        OSRdyTbl[y] &= (OS_PRIO)~OSTCBCur->OSTCBBitX;
+        if (OSRdyTbl[y] == 0u) {
+            OSRdyGrp &= (OS_PRIO)~OSTCBCur->OSTCBBitY;
+        }
+        OSTCBCur->OSTCBDly = ticks;              /* Load ticks in TCB                                  */
+        OS_EXIT_CRITICAL();
+        OS_Sched();                              /* Find next task to run!                             */
+    }
+}
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                    DELAY TASK FOR SPECIFIED TIME
+*
+* Description: This function is called to delay execution of the currently running task until some time
+*              expires.  This call allows you to specify the delay time in HOURS, MINUTES, SECONDS and
+*              MILLISECONDS instead of ticks.
+*
+* Arguments  : hours     specifies the number of hours that the task will be delayed (max. is 255)
+*              minutes   specifies the number of minutes (max. 59)
+*              seconds   specifies the number of seconds (max. 59)
+*              ms        specifies the number of milliseconds (max. 999)
+*
+* Returns    : OS_ERR_NONE
+*              OS_ERR_TIME_INVALID_MINUTES
+*              OS_ERR_TIME_INVALID_SECONDS
+*              OS_ERR_TIME_INVALID_MS
+*              OS_ERR_TIME_ZERO_DLY
+*              OS_ERR_TIME_DLY_ISR
+*
+* Note(s)    : The resolution on the milliseconds depends on the tick rate.  For example, you can't do
+*              a 10 mS delay if the ticker interrupts every 100 mS.  In this case, the delay would be
+*              set to 0.  The actual delay is rounded to the nearest tick.
+*********************************************************************************************************
+*/
+
+#if OS_TIME_DLY_HMSM_EN > 0u
+INT8U  OSTimeDlyHMSM (INT8U   hours,
+                      INT8U   minutes,
+                      INT8U   seconds,
+                      INT16U  ms)
+{
+    INT32U ticks;
+
+
+    if (OSIntNesting > 0u) {                     /* See if trying to call from an ISR                  */
+        return (OS_ERR_TIME_DLY_ISR);
+    }
+    if (OSLockNesting > 0u) {                    /* See if called with scheduler locked                */
+        return (OS_ERR_SCHED_LOCKED);
+    }
+#if OS_ARG_CHK_EN > 0u
+    if (hours == 0u) {
+        if (minutes == 0u) {
+            if (seconds == 0u) {
+                if (ms == 0u) {
+                    return (OS_ERR_TIME_ZERO_DLY);
+                }
+            }
+        }
+    }
+    if (minutes > 59u) {
+        return (OS_ERR_TIME_INVALID_MINUTES);    /* Validate arguments to be within range              */
+    }
+    if (seconds > 59u) {
+        return (OS_ERR_TIME_INVALID_SECONDS);
+    }
+    if (ms > 999u) {
+        return (OS_ERR_TIME_INVALID_MS);
+    }
+#endif
+                                                 /* Compute the total number of clock ticks required.. */
+                                                 /* .. (rounded to the nearest tick)                   */
+    ticks = ((INT32U)hours * 3600uL + (INT32U)minutes * 60uL + (INT32U)seconds) * OS_TICKS_PER_SEC
+          + OS_TICKS_PER_SEC * ((INT32U)ms + 500uL / OS_TICKS_PER_SEC) / 1000uL;
+    OSTimeDly(ticks);
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                        RESUME A DELAYED TASK
+*
+* Description: This function is used resume a task that has been delayed through a call to either
+*              OSTimeDly() or OSTimeDlyHMSM().  Note that you can call this function to resume a
+*              task that is waiting for an event with timeout.  This would make the task look
+*              like a timeout occurred.
+*
+* Arguments  : prio                      specifies the priority of the task to resume
+*
+* Returns    : OS_ERR_NONE               Task has been resumed
+*              OS_ERR_PRIO_INVALID       if the priority you specify is higher that the maximum allowed
+*                                        (i.e. >= OS_LOWEST_PRIO)
+*              OS_ERR_TIME_NOT_DLY       Task is not waiting for time to expire
+*              OS_ERR_TASK_NOT_EXIST     The desired task has not been created or has been assigned to a Mutex.
+*********************************************************************************************************
+*/
+
+#if OS_TIME_DLY_RESUME_EN > 0u
+INT8U  OSTimeDlyResume (INT8U prio)
+{
+    OS_TCB    *ptcb;
+#if OS_CRITICAL_METHOD == 3u                                   /* Storage for CPU status register      */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    if (prio >= OS_LOWEST_PRIO) {
+        return (OS_ERR_PRIO_INVALID);
+    }
+    OS_ENTER_CRITICAL();
+    ptcb = OSTCBPrioTbl[prio];                                 /* Make sure that task exist            */
+    if (ptcb == (OS_TCB *)0) {
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_NOT_EXIST);                        /* The task does not exist              */
+    }
+    if (ptcb == OS_TCB_RESERVED) {
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TASK_NOT_EXIST);                        /* The task does not exist              */
+    }
+    if (ptcb->OSTCBDly == 0u) {                                /* See if task is delayed               */
+        OS_EXIT_CRITICAL();
+        return (OS_ERR_TIME_NOT_DLY);                          /* Indicate that task was not delayed   */
+    }
+
+    ptcb->OSTCBDly = 0u;                                       /* Clear the time delay                 */
+    if ((ptcb->OSTCBStat & OS_STAT_PEND_ANY) != OS_STAT_RDY) {
+        ptcb->OSTCBStat     &= ~OS_STAT_PEND_ANY;              /* Yes, Clear status flag               */
+        ptcb->OSTCBStatPend  =  OS_STAT_PEND_TO;               /* Indicate PEND timeout                */
+    } else {
+        ptcb->OSTCBStatPend  =  OS_STAT_PEND_OK;
+    }
+    if ((ptcb->OSTCBStat & OS_STAT_SUSPEND) == OS_STAT_RDY) {  /* Is task suspended?                   */
+        OSRdyGrp               |= ptcb->OSTCBBitY;             /* No,  Make ready                      */
+        OSRdyTbl[ptcb->OSTCBY] |= ptcb->OSTCBBitX;
+        OS_EXIT_CRITICAL();
+        OS_Sched();                                            /* See if this is new highest priority  */
+    } else {
+        OS_EXIT_CRITICAL();                                    /* Task may be suspended                */
+    }
+    return (OS_ERR_NONE);
+}
+#endif
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       GET CURRENT SYSTEM TIME
+*
+* Description: This function is used by your application to obtain the current value of the 32-bit
+*              counter which keeps track of the number of clock ticks.
+*
+* Arguments  : none
+*
+* Returns    : The current value of OSTime
+*********************************************************************************************************
+*/
+
+#if OS_TIME_GET_SET_EN > 0u
+INT32U  OSTimeGet (void)
+{
+    INT32U     ticks;
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    OS_ENTER_CRITICAL();
+    ticks = OSTime;
+    OS_EXIT_CRITICAL();
+    return (ticks);
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                          SET SYSTEM CLOCK
+*
+* Description: This function sets the 32-bit counter which keeps track of the number of clock ticks.
+*
+* Arguments  : ticks      specifies the new value that OSTime needs to take.
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if OS_TIME_GET_SET_EN > 0u
+void  OSTimeSet (INT32U ticks)
+{
+#if OS_CRITICAL_METHOD == 3u                     /* Allocate storage for CPU status register           */
+    OS_CPU_SR  cpu_sr = 0u;
+#endif
+
+
+
+    OS_ENTER_CRITICAL();
+    OSTime = ticks;
+    OS_EXIT_CRITICAL();
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_tmr.c b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_tmr.c
new file mode 100644
index 0000000..10a7b6b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/os_tmr.c
@@ -0,0 +1,1089 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                            TIMER MANAGEMENT
+*
+*                              (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+*
+* File    : OS_TMR.C
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+
+#ifndef  OS_MASTER_FILE
+#include 
+#endif
+
+/*
+*********************************************************************************************************
+*                                                        NOTES
+*
+* 1) Your application MUST define the following #define constants:
+*
+*    OS_TASK_TMR_PRIO          The priority of the Timer management task
+*    OS_TASK_TMR_STK_SIZE      The size     of the Timer management task's stack
+*
+* 2) You must call OSTmrSignal() to notify the Timer management task that it's time to update the timers.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              CONSTANTS
+*********************************************************************************************************
+*/
+
+#define  OS_TMR_LINK_DLY       0u
+#define  OS_TMR_LINK_PERIODIC  1u
+
+/*
+*********************************************************************************************************
+*                                          LOCAL PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  OS_TMR  *OSTmr_Alloc         (void);
+static  void     OSTmr_Free          (OS_TMR *ptmr);
+static  void     OSTmr_InitTask      (void);
+static  void     OSTmr_Link          (OS_TMR *ptmr, INT8U type);
+static  void     OSTmr_Unlink        (OS_TMR *ptmr);
+static  void     OSTmr_Task          (void   *p_arg);
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           CREATE A TIMER
+*
+* Description: This function is called by your application code to create a timer.
+*
+* Arguments  : dly           Initial delay.
+*                            If the timer is configured for ONE-SHOT mode, this is the timeout used.
+*                            If the timer is configured for PERIODIC mode, this is the first timeout to 
+*                               wait for before the timer starts entering periodic mode.
+*
+*              period        The 'period' being repeated for the timer.
+*                               If you specified 'OS_TMR_OPT_PERIODIC' as an option, when the timer 
+*                               expires, it will automatically restart with the same period.
+*
+*              opt           Specifies either:
+*                               OS_TMR_OPT_ONE_SHOT       The timer counts down only once
+*                               OS_TMR_OPT_PERIODIC       The timer counts down and then reloads itself
+*
+*              callback      Is a pointer to a callback function that will be called when the timer expires. 
+*                               The callback function must be declared as follows:
+*
+*                               void MyCallback (OS_TMR *ptmr, void *p_arg);
+*
+*              callback_arg  Is an argument (a pointer) that is passed to the callback function when it is called.
+*
+*              pname         Is a pointer to an ASCII string that is used to name the timer.  Names are 
+*                               useful for debugging.
+*
+*              perr          Is a pointer to an error code.  '*perr' will contain one of the following:
+*                               OS_ERR_NONE
+*                               OS_ERR_TMR_INVALID_DLY     you specified an invalid delay
+*                               OS_ERR_TMR_INVALID_PERIOD  you specified an invalid period
+*                               OS_ERR_TMR_INVALID_OPT     you specified an invalid option
+*                               OS_ERR_TMR_ISR             if the call was made from an ISR
+*                               OS_ERR_TMR_NON_AVAIL       if there are no free timers from the timer pool
+*
+* Returns    : A pointer to an OS_TMR data structure.
+*              This is the 'handle' that your application will use to reference the timer created.
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+OS_TMR  *OSTmrCreate (INT32U           dly,
+                      INT32U           period,
+                      INT8U            opt,
+                      OS_TMR_CALLBACK  callback,
+                      void            *callback_arg,
+                      INT8U           *pname,
+                      INT8U           *perr)
+{
+    OS_TMR   *ptmr;
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_TMR *)0);
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == OS_TRUE) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_TMR *)0);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    switch (opt) {                                          /* Validate arguments                                     */
+        case OS_TMR_OPT_PERIODIC:
+             if (period == 0u) {
+                 *perr = OS_ERR_TMR_INVALID_PERIOD;
+                 return ((OS_TMR *)0);
+             }
+             break;
+
+        case OS_TMR_OPT_ONE_SHOT:
+             if (dly == 0u) {
+                 *perr = OS_ERR_TMR_INVALID_DLY;
+                 return ((OS_TMR *)0);
+             }
+             break;
+
+        default:
+             *perr = OS_ERR_TMR_INVALID_OPT;
+             return ((OS_TMR *)0);
+    }
+#endif
+    if (OSIntNesting > 0u) {                                /* See if trying to call from an ISR                      */
+        *perr  = OS_ERR_TMR_ISR;
+        return ((OS_TMR *)0);
+    }
+    OSSchedLock();
+    ptmr = OSTmr_Alloc();                                   /* Obtain a timer from the free pool                      */
+    if (ptmr == (OS_TMR *)0) {
+        OSSchedUnlock();
+        *perr = OS_ERR_TMR_NON_AVAIL;
+        return ((OS_TMR *)0);
+    }
+    ptmr->OSTmrState       = OS_TMR_STATE_STOPPED;          /* Indicate that timer is not running yet                 */
+    ptmr->OSTmrDly         = dly;
+    ptmr->OSTmrPeriod      = period;
+    ptmr->OSTmrOpt         = opt;
+    ptmr->OSTmrCallback    = callback;
+    ptmr->OSTmrCallbackArg = callback_arg;
+#if OS_TMR_CFG_NAME_EN > 0u
+    if (pname == (INT8U *)0) {                              /* Is 'pname' a NULL pointer?                             */
+        ptmr->OSTmrName    = (INT8U *)(void *)"?";
+    } else {
+        ptmr->OSTmrName    = pname;
+    }
+#endif
+    OSSchedUnlock();
+    *perr = OS_ERR_NONE;
+    return (ptmr);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           DELETE A TIMER
+*
+* Description: This function is called by your application code to delete a timer.
+*
+* Arguments  : ptmr          Is a pointer to the timer to stop and delete.
+*
+*              perr          Is a pointer to an error code.  '*perr' will contain one of the following:
+*                               OS_ERR_NONE
+*                               OS_ERR_TMR_INVALID        'ptmr'  is a NULL pointer
+*                               OS_ERR_TMR_INVALID_TYPE   'ptmr'  is not pointing to an OS_TMR
+*                               OS_ERR_TMR_ISR            if the function was called from an ISR
+*                               OS_ERR_TMR_INACTIVE       if the timer was not created
+*                               OS_ERR_TMR_INVALID_STATE  the timer is in an invalid state
+*
+* Returns    : OS_TRUE       If the call was successful
+*              OS_FALSE      If not
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+BOOLEAN  OSTmrDel (OS_TMR  *ptmr,
+                   INT8U   *perr)
+{
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (OS_FALSE);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (ptmr == (OS_TMR *)0) {
+        *perr = OS_ERR_TMR_INVALID;
+        return (OS_FALSE);
+    }
+#endif
+    if (ptmr->OSTmrType != OS_TMR_TYPE) {                   /* Validate timer structure                               */
+        *perr = OS_ERR_TMR_INVALID_TYPE;
+        return (OS_FALSE);
+    }
+    if (OSIntNesting > 0u) {                                /* See if trying to call from an ISR                      */
+        *perr  = OS_ERR_TMR_ISR;
+        return (OS_FALSE);
+    }
+    OSSchedLock();
+    switch (ptmr->OSTmrState) {
+        case OS_TMR_STATE_RUNNING:
+             OSTmr_Unlink(ptmr);                            /* Remove from current wheel spoke                        */
+             OSTmr_Free(ptmr);                              /* Return timer to free list of timers                    */
+             OSSchedUnlock();
+             *perr = OS_ERR_NONE;
+             return (OS_TRUE);
+
+        case OS_TMR_STATE_STOPPED:                          /* Timer has not started or ...                           */
+        case OS_TMR_STATE_COMPLETED:                        /* ... timer has completed the ONE-SHOT time              */
+             OSTmr_Free(ptmr);                              /* Return timer to free list of timers                    */
+             OSSchedUnlock();
+             *perr = OS_ERR_NONE;
+             return (OS_TRUE);
+
+        case OS_TMR_STATE_UNUSED:                           /* Already deleted                                        */
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_INACTIVE;
+             return (OS_FALSE);
+
+        default:
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_INVALID_STATE;
+             return (OS_FALSE);
+    }
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       GET THE NAME OF A TIMER
+*
+* Description: This function is called to obtain the name of a timer.
+*
+* Arguments  : ptmr          Is a pointer to the timer to obtain the name for
+*
+*              pdest         Is a pointer to pointer to where the name of the timer will be placed.
+*
+*              perr          Is a pointer to an error code.  '*perr' will contain one of the following:
+*                               OS_ERR_NONE               The call was successful
+*                               OS_ERR_TMR_INVALID_DEST   'pdest' is a NULL pointer
+*                               OS_ERR_TMR_INVALID        'ptmr'  is a NULL pointer
+*                               OS_ERR_TMR_INVALID_TYPE   'ptmr'  is not pointing to an OS_TMR
+*                               OS_ERR_NAME_GET_ISR       if the call was made from an ISR
+*                               OS_ERR_TMR_INACTIVE       'ptmr'  points to a timer that is not active
+*                               OS_ERR_TMR_INVALID_STATE  the timer is in an invalid state
+*
+* Returns    : The length of the string or 0 if the timer does not exist.
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u && OS_TMR_CFG_NAME_EN > 0u
+INT8U  OSTmrNameGet (OS_TMR   *ptmr,
+                     INT8U   **pdest,
+                     INT8U    *perr)
+{
+    INT8U  len;
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (pdest == (INT8U **)0) {
+        *perr = OS_ERR_TMR_INVALID_DEST;
+        return (0u);
+    }
+    if (ptmr == (OS_TMR *)0) {
+        *perr = OS_ERR_TMR_INVALID;
+        return (0u);
+    }
+#endif
+    if (ptmr->OSTmrType != OS_TMR_TYPE) {              /* Validate timer structure                                    */
+        *perr = OS_ERR_TMR_INVALID_TYPE;
+        return (0u);
+    }
+    if (OSIntNesting > 0u) {                           /* See if trying to call from an ISR                           */
+        *perr = OS_ERR_NAME_GET_ISR;
+        return (0u);
+    }
+    OSSchedLock();
+    switch (ptmr->OSTmrState) {
+        case OS_TMR_STATE_RUNNING:
+        case OS_TMR_STATE_STOPPED:
+        case OS_TMR_STATE_COMPLETED:
+             *pdest = ptmr->OSTmrName;
+             len    = OS_StrLen(*pdest);
+             OSSchedUnlock();
+             *perr = OS_ERR_NONE;
+             return (len);
+
+        case OS_TMR_STATE_UNUSED:                      /* Timer is not allocated                                      */
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_INACTIVE;
+             return (0u);
+
+        default:
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_INVALID_STATE;
+             return (0u);
+    }
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                          GET HOW MUCH TIME IS LEFT BEFORE A TIMER EXPIRES
+*
+* Description: This function is called to get the number of ticks before a timer times out.
+*
+* Arguments  : ptmr          Is a pointer to the timer to obtain the remaining time from.
+*
+*              perr          Is a pointer to an error code.  '*perr' will contain one of the following:
+*                               OS_ERR_NONE
+*                               OS_ERR_TMR_INVALID        'ptmr' is a NULL pointer
+*                               OS_ERR_TMR_INVALID_TYPE   'ptmr'  is not pointing to an OS_TMR
+*                               OS_ERR_TMR_ISR            if the call was made from an ISR
+*                               OS_ERR_TMR_INACTIVE       'ptmr' points to a timer that is not active
+*                               OS_ERR_TMR_INVALID_STATE  the timer is in an invalid state
+*
+* Returns    : The time remaining for the timer to expire.  The time represents 'timer' increments. 
+*              In other words, if OSTmr_Task() is signaled every 1/10 of a second then the returned 
+*              value represents the number of 1/10 of a second remaining before the timer expires.
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+INT32U  OSTmrRemainGet (OS_TMR  *ptmr,
+                        INT8U   *perr)
+{
+    INT32U  remain;
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (ptmr == (OS_TMR *)0) {
+        *perr = OS_ERR_TMR_INVALID;
+        return (0u);
+    }
+#endif
+    if (ptmr->OSTmrType != OS_TMR_TYPE) {              /* Validate timer structure                                    */
+        *perr = OS_ERR_TMR_INVALID_TYPE;
+        return (0u);
+    }
+    if (OSIntNesting > 0u) {                           /* See if trying to call from an ISR                           */
+        *perr = OS_ERR_TMR_ISR;
+        return (0u);
+    }
+    OSSchedLock();
+    switch (ptmr->OSTmrState) {
+        case OS_TMR_STATE_RUNNING:
+             remain = ptmr->OSTmrMatch - OSTmrTime;    /* Determine how much time is left to timeout                  */
+             OSSchedUnlock();
+             *perr  = OS_ERR_NONE;
+             return (remain);
+
+        case OS_TMR_STATE_STOPPED:                     /* It's assumed that the timer has not started yet             */
+             switch (ptmr->OSTmrOpt) {
+                 case OS_TMR_OPT_PERIODIC:
+                      if (ptmr->OSTmrDly == 0u) {
+                          remain = ptmr->OSTmrPeriod;
+                      } else {
+                          remain = ptmr->OSTmrDly;
+                      }
+                      OSSchedUnlock();
+                      *perr  = OS_ERR_NONE;
+                      break;
+
+                 case OS_TMR_OPT_ONE_SHOT:
+                 default:
+                      remain = ptmr->OSTmrDly;
+                      OSSchedUnlock();
+                      *perr  = OS_ERR_NONE;
+                      break;
+             }
+             return (remain);
+
+        case OS_TMR_STATE_COMPLETED:                   /* Only ONE-SHOT that timed out can be in this state           */
+             OSSchedUnlock();
+             *perr = OS_ERR_NONE;
+             return (0u);
+
+        case OS_TMR_STATE_UNUSED:
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_INACTIVE;
+             return (0u);
+
+        default:
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_INVALID_STATE;
+             return (0u);
+    }
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                  FIND OUT WHAT STATE A TIMER IS IN
+*
+* Description: This function is called to determine what state the timer is in:
+*
+*                  OS_TMR_STATE_UNUSED     the timer has not been created
+*                  OS_TMR_STATE_STOPPED    the timer has been created but has not been started or has been stopped
+*                  OS_TMR_STATE_COMPLETED  the timer is in ONE-SHOT mode and has completed it's timeout
+*                  OS_TMR_STATE_RUNNING    the timer is currently running
+*
+* Arguments  : ptmr          Is a pointer to the desired timer
+*
+*              perr          Is a pointer to an error code.  '*perr' will contain one of the following:
+*                               OS_ERR_NONE
+*                               OS_ERR_TMR_INVALID        'ptmr' is a NULL pointer
+*                               OS_ERR_TMR_INVALID_TYPE   'ptmr'  is not pointing to an OS_TMR
+*                               OS_ERR_TMR_ISR            if the call was made from an ISR
+*                               OS_ERR_TMR_INACTIVE       'ptmr' points to a timer that is not active
+*                               OS_ERR_TMR_INVALID_STATE  if the timer is not in a valid state
+*
+* Returns    : The current state of the timer (see description).
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+INT8U  OSTmrStateGet (OS_TMR  *ptmr,
+                      INT8U   *perr)
+{
+    INT8U  state;
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (ptmr == (OS_TMR *)0) {
+        *perr = OS_ERR_TMR_INVALID;
+        return (0u);
+    }
+#endif
+    if (ptmr->OSTmrType != OS_TMR_TYPE) {              /* Validate timer structure                                    */
+        *perr = OS_ERR_TMR_INVALID_TYPE;
+        return (0u);
+    }
+    if (OSIntNesting > 0u) {                           /* See if trying to call from an ISR                           */
+        *perr = OS_ERR_TMR_ISR;
+        return (0u);
+    }
+    OSSchedLock();
+    state = ptmr->OSTmrState;
+    switch (state) {
+        case OS_TMR_STATE_UNUSED:
+        case OS_TMR_STATE_STOPPED:
+        case OS_TMR_STATE_COMPLETED:
+        case OS_TMR_STATE_RUNNING:
+             *perr = OS_ERR_NONE;
+             break;
+
+        default:
+             *perr = OS_ERR_TMR_INVALID_STATE;
+             break;
+    }
+    OSSchedUnlock();
+    return (state);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                            START A TIMER
+*
+* Description: This function is called by your application code to start a timer.
+*
+* Arguments  : ptmr          Is a pointer to an OS_TMR
+*
+*              perr          Is a pointer to an error code.  '*perr' will contain one of the following:
+*                               OS_ERR_NONE
+*                               OS_ERR_TMR_INVALID
+*                               OS_ERR_TMR_INVALID_TYPE    'ptmr'  is not pointing to an OS_TMR
+*                               OS_ERR_TMR_ISR             if the call was made from an ISR
+*                               OS_ERR_TMR_INACTIVE        if the timer was not created
+*                               OS_ERR_TMR_INVALID_STATE   the timer is in an invalid state
+*
+* Returns    : OS_TRUE    if the timer was started
+*              OS_FALSE   if an error was detected
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+BOOLEAN  OSTmrStart (OS_TMR   *ptmr,
+                     INT8U    *perr)
+{
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (OS_FALSE);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (ptmr == (OS_TMR *)0) {
+        *perr = OS_ERR_TMR_INVALID;
+        return (OS_FALSE);
+    }
+#endif
+    if (ptmr->OSTmrType != OS_TMR_TYPE) {                   /* Validate timer structure                               */
+        *perr = OS_ERR_TMR_INVALID_TYPE;
+        return (OS_FALSE);
+    }
+    if (OSIntNesting > 0u) {                                /* See if trying to call from an ISR                      */
+        *perr  = OS_ERR_TMR_ISR;
+        return (OS_FALSE);
+    }
+    OSSchedLock();
+    switch (ptmr->OSTmrState) {
+        case OS_TMR_STATE_RUNNING:                          /* Restart the timer                                      */
+             OSTmr_Unlink(ptmr);                            /* ... Stop the timer                                     */
+             OSTmr_Link(ptmr, OS_TMR_LINK_DLY);             /* ... Link timer to timer wheel                          */
+             OSSchedUnlock();
+             *perr = OS_ERR_NONE;
+             return (OS_TRUE);
+
+        case OS_TMR_STATE_STOPPED:                          /* Start the timer                                        */
+        case OS_TMR_STATE_COMPLETED:
+             OSTmr_Link(ptmr, OS_TMR_LINK_DLY);             /* ... Link timer to timer wheel                          */
+             OSSchedUnlock();
+             *perr = OS_ERR_NONE;
+             return (OS_TRUE);
+
+        case OS_TMR_STATE_UNUSED:                           /* Timer not created                                      */
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_INACTIVE;
+             return (OS_FALSE);
+
+        default:
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_INVALID_STATE;
+             return (OS_FALSE);
+    }
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                            STOP A TIMER
+*
+* Description: This function is called by your application code to stop a timer.
+*
+* Arguments  : ptmr          Is a pointer to the timer to stop.
+*
+*              opt           Allows you to specify an option to this functions which can be:
+*
+*                               OS_TMR_OPT_NONE          Do nothing special but stop the timer
+*                               OS_TMR_OPT_CALLBACK      Execute the callback function, pass it the 
+*                                                        callback argument specified when the timer 
+*                                                        was created.
+*                               OS_TMR_OPT_CALLBACK_ARG  Execute the callback function, pass it the 
+*                                                        callback argument specified in THIS function call.
+*
+*              callback_arg  Is a pointer to a 'new' callback argument that can be passed to the callback 
+*                            function instead of the timer's callback argument.  In other words, use 
+*                            'callback_arg' passed in THIS function INSTEAD of ptmr->OSTmrCallbackArg.
+*
+*              perr          Is a pointer to an error code.  '*perr' will contain one of the following:
+*                               OS_ERR_NONE
+*                               OS_ERR_TMR_INVALID         'ptmr' is a NULL pointer
+*                               OS_ERR_TMR_INVALID_TYPE    'ptmr'  is not pointing to an OS_TMR
+*                               OS_ERR_TMR_ISR             if the function was called from an ISR
+*                               OS_ERR_TMR_INACTIVE        if the timer was not created
+*                               OS_ERR_TMR_INVALID_OPT     if you specified an invalid option for 'opt'
+*                               OS_ERR_TMR_STOPPED         if the timer was already stopped
+*                               OS_ERR_TMR_INVALID_STATE   the timer is in an invalid state
+*                               OS_ERR_TMR_NO_CALLBACK     if the timer does not have a callback function defined
+*
+* Returns    : OS_TRUE       If we stopped the timer (if the timer is already stopped, we also return OS_TRUE)
+*              OS_FALSE      If not
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+BOOLEAN  OSTmrStop (OS_TMR  *ptmr,
+                    INT8U    opt,
+                    void    *callback_arg,
+                    INT8U   *perr)
+{
+    OS_TMR_CALLBACK  pfnct;
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (perr == (INT8U *)0) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (OS_FALSE);
+    }
+#endif
+
+#if OS_ARG_CHK_EN > 0u
+    if (ptmr == (OS_TMR *)0) {
+        *perr = OS_ERR_TMR_INVALID;
+        return (OS_FALSE);
+    }
+#endif
+    if (ptmr->OSTmrType != OS_TMR_TYPE) {                         /* Validate timer structure                         */
+        *perr = OS_ERR_TMR_INVALID_TYPE;
+        return (OS_FALSE);
+    }
+    if (OSIntNesting > 0u) {                                      /* See if trying to call from an ISR                */
+        *perr  = OS_ERR_TMR_ISR;
+        return (OS_FALSE);
+    }
+    OSSchedLock();
+    switch (ptmr->OSTmrState) {
+        case OS_TMR_STATE_RUNNING:
+             OSTmr_Unlink(ptmr);                                  /* Remove from current wheel spoke                  */
+             *perr = OS_ERR_NONE;
+             switch (opt) {
+                 case OS_TMR_OPT_CALLBACK:
+                      pfnct = ptmr->OSTmrCallback;                /* Execute callback function if available ...       */
+                      if (pfnct != (OS_TMR_CALLBACK)0) {
+                          (*pfnct)((void *)ptmr, ptmr->OSTmrCallbackArg);  /* Use callback arg when timer was created */
+                      } else {
+                          *perr = OS_ERR_TMR_NO_CALLBACK;
+                      }
+                      break;
+
+                 case OS_TMR_OPT_CALLBACK_ARG:
+                      pfnct = ptmr->OSTmrCallback;                /* Execute callback function if available ...       */
+                      if (pfnct != (OS_TMR_CALLBACK)0) {
+                          (*pfnct)((void *)ptmr, callback_arg);   /* ... using the 'callback_arg' provided in call    */
+                      } else {
+                          *perr = OS_ERR_TMR_NO_CALLBACK;
+                      }
+                      break;
+
+                 case OS_TMR_OPT_NONE:
+                      break;
+
+                 default:
+                     *perr = OS_ERR_TMR_INVALID_OPT;
+                     break;
+             }
+             OSSchedUnlock();
+             return (OS_TRUE);
+
+        case OS_TMR_STATE_COMPLETED:                              /* Timer has already completed the ONE-SHOT or ...  */
+        case OS_TMR_STATE_STOPPED:                                /* ... timer has not started yet.                   */
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_STOPPED;
+             return (OS_TRUE);
+
+        case OS_TMR_STATE_UNUSED:                                 /* Timer was not created                            */
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_INACTIVE;
+             return (OS_FALSE);
+
+        default:
+             OSSchedUnlock();
+             *perr = OS_ERR_TMR_INVALID_STATE;
+             return (OS_FALSE);
+    }
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                             SIGNAL THAT IT'S TIME TO UPDATE THE TIMERS
+*
+* Description: This function is typically called by the ISR that occurs at the timer tick rate and is 
+*              used to signal to OSTmr_Task() that it's time to update the timers.
+*
+* Arguments  : none
+*
+* Returns    : OS_ERR_NONE         The call was successful and the timer task was signaled.
+*              OS_ERR_SEM_OVF      If OSTmrSignal() was called more often than OSTmr_Task() can handle 
+*                                  the timers. This would indicate that your system is heavily loaded.
+*              OS_ERR_EVENT_TYPE   Unlikely you would get this error because the semaphore used for 
+*                                  signaling is created by uC/OS-II.
+*              OS_ERR_PEVENT_NULL  Again, unlikely you would ever get this error because the semaphore 
+*                                  used for signaling is created by uC/OS-II.
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+INT8U  OSTmrSignal (void)
+{
+    INT8U  err;
+
+
+    err = OSSemPost(OSTmrSemSignal);
+    return (err);
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                      ALLOCATE AND FREE A TIMER
+*
+* Description: This function is called to allocate a timer.
+*
+* Arguments  : none
+*
+* Returns    : a pointer to a timer if one is available
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  OS_TMR  *OSTmr_Alloc (void)
+{
+    OS_TMR *ptmr;
+
+
+    if (OSTmrFreeList == (OS_TMR *)0) {
+        return ((OS_TMR *)0);
+    }
+    ptmr            = (OS_TMR *)OSTmrFreeList;
+    OSTmrFreeList   = (OS_TMR *)ptmr->OSTmrNext;
+    ptmr->OSTmrNext = (OS_TCB *)0;
+    ptmr->OSTmrPrev = (OS_TCB *)0;
+    OSTmrUsed++;
+    OSTmrFree--;
+    return (ptmr);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                   RETURN A TIMER TO THE FREE LIST
+*
+* Description: This function is called to return a timer object to the free list of timers.
+*
+* Arguments  : ptmr     is a pointer to the timer to free
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  void  OSTmr_Free (OS_TMR *ptmr)
+{
+    ptmr->OSTmrState       = OS_TMR_STATE_UNUSED;      /* Clear timer object fields                                   */
+    ptmr->OSTmrOpt         = OS_TMR_OPT_NONE;
+    ptmr->OSTmrPeriod      = 0u;
+    ptmr->OSTmrMatch       = 0u;
+    ptmr->OSTmrCallback    = (OS_TMR_CALLBACK)0;
+    ptmr->OSTmrCallbackArg = (void *)0;
+#if OS_TMR_CFG_NAME_EN > 0u
+    ptmr->OSTmrName        = (INT8U *)(void *)"?";
+#endif
+
+    ptmr->OSTmrPrev        = (OS_TCB *)0;              /* Chain timer to free list                                    */
+    ptmr->OSTmrNext        = OSTmrFreeList;
+    OSTmrFreeList          = ptmr;
+
+    OSTmrUsed--;                                       /* Update timer object statistics                              */
+    OSTmrFree++;
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                                    INITIALIZATION
+*                                          INITIALIZE THE FREE LIST OF TIMERS
+*
+* Description: This function is called by OSInit() to initialize the free list of OS_TMRs.
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+void  OSTmr_Init (void)
+{
+#if OS_EVENT_NAME_EN > 0u
+    INT8U    err;
+#endif
+    INT16U   ix;
+    INT16U   ix_next;
+    OS_TMR  *ptmr1;
+    OS_TMR  *ptmr2;
+
+
+    OS_MemClr((INT8U *)&OSTmrTbl[0],      sizeof(OSTmrTbl));            /* Clear all the TMRs                         */
+    OS_MemClr((INT8U *)&OSTmrWheelTbl[0], sizeof(OSTmrWheelTbl));       /* Clear the timer wheel                      */
+
+    for (ix = 0u; ix < (OS_TMR_CFG_MAX - 1u); ix++) {                   /* Init. list of free TMRs                    */
+        ix_next = ix + 1u;
+        ptmr1 = &OSTmrTbl[ix];
+        ptmr2 = &OSTmrTbl[ix_next];
+        ptmr1->OSTmrType    = OS_TMR_TYPE;
+        ptmr1->OSTmrState   = OS_TMR_STATE_UNUSED;                      /* Indicate that timer is inactive            */
+        ptmr1->OSTmrNext    = (void *)ptmr2;                            /* Link to next timer                         */
+#if OS_TMR_CFG_NAME_EN > 0u
+        ptmr1->OSTmrName    = (INT8U *)(void *)"?";
+#endif
+    }
+    ptmr1               = &OSTmrTbl[ix];
+    ptmr1->OSTmrType    = OS_TMR_TYPE;
+    ptmr1->OSTmrState   = OS_TMR_STATE_UNUSED;                          /* Indicate that timer is inactive            */
+    ptmr1->OSTmrNext    = (void *)0;                                    /* Last OS_TMR                                */
+#if OS_TMR_CFG_NAME_EN > 0u
+    ptmr1->OSTmrName    = (INT8U *)(void *)"?";
+#endif
+    OSTmrTime           = 0u;
+    OSTmrUsed           = 0u;
+    OSTmrFree           = OS_TMR_CFG_MAX;
+    OSTmrFreeList       = &OSTmrTbl[0];
+    OSTmrSem            = OSSemCreate(1u);
+    OSTmrSemSignal      = OSSemCreate(0u);
+
+#if OS_EVENT_NAME_EN > 0u                                               /* Assign names to semaphores                 */
+    OSEventNameSet(OSTmrSem,       (INT8U *)(void *)"uC/OS-II TmrLock",   &err);
+    OSEventNameSet(OSTmrSemSignal, (INT8U *)(void *)"uC/OS-II TmrSignal", &err);
+#endif
+
+    OSTmr_InitTask();
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                INITIALIZE THE TIMER MANAGEMENT TASK
+*
+* Description: This function is called by OSTmrInit() to create the timer management task.
+*                               * Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  void  OSTmr_InitTask (void)
+{
+#if OS_TASK_NAME_EN > 0u
+    INT8U  err;
+#endif
+
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+    #if OS_STK_GROWTH == 1u
+    (void)OSTaskCreateExt(OSTmr_Task,
+                          (void *)0,                                       /* No arguments passed to OSTmrTask()      */
+                          &OSTmrTaskStk[OS_TASK_TMR_STK_SIZE - 1u],        /* Set Top-Of-Stack                        */
+                          OS_TASK_TMR_PRIO,
+                          OS_TASK_TMR_ID,
+                          &OSTmrTaskStk[0],                                /* Set Bottom-Of-Stack                     */
+                          OS_TASK_TMR_STK_SIZE,
+                          (void *)0,                                       /* No TCB extension                        */
+                          OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);      /* Enable stack checking + clear stack     */
+    #else
+    (void)OSTaskCreateExt(OSTmr_Task,
+                          (void *)0,                                       /* No arguments passed to OSTmrTask()      */
+                          &OSTmrTaskStk[0],                                /* Set Top-Of-Stack                        */
+                          OS_TASK_TMR_PRIO,
+                          OS_TASK_TMR_ID,
+                          &OSTmrTaskStk[OS_TASK_TMR_STK_SIZE - 1u],        /* Set Bottom-Of-Stack                     */
+                          OS_TASK_TMR_STK_SIZE,
+                          (void *)0,                                       /* No TCB extension                        */
+                          OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR);      /* Enable stack checking + clear stack     */
+    #endif
+#else
+    #if OS_STK_GROWTH == 1u
+    (void)OSTaskCreate(OSTmr_Task,
+                       (void *)0,
+                       &OSTmrTaskStk[OS_TASK_TMR_STK_SIZE - 1u],
+                       OS_TASK_TMR_PRIO);
+    #else
+    (void)OSTaskCreate(OSTmr_Task,
+                       (void *)0,
+                       &OSTmrTaskStk[0],
+                       OS_TASK_TMR_PRIO);
+    #endif
+#endif
+
+#if OS_TASK_NAME_EN > 0u
+    OSTaskNameSet(OS_TASK_TMR_PRIO, (INT8U *)(void *)"uC/OS-II Tmr", &err);
+#endif
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                 INSERT A TIMER INTO THE TIMER WHEEL
+*
+* Description: This function is called to insert the timer into the timer wheel.  The timer is always 
+*              inserted at the beginning of the list.
+*
+* Arguments  : ptmr          Is a pointer to the timer to insert.
+*
+*              type          Is either:
+*                               OS_TMR_LINK_PERIODIC    Means to re-insert the timer after a period expired
+*                               OS_TMR_LINK_DLY         Means to insert    the timer the first time
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  void  OSTmr_Link (OS_TMR  *ptmr,
+                          INT8U    type)
+{
+    OS_TMR       *ptmr1;
+    OS_TMR_WHEEL *pspoke;
+    INT16U        spoke;
+
+
+    ptmr->OSTmrState = OS_TMR_STATE_RUNNING;
+    if (type == OS_TMR_LINK_PERIODIC) {                            /* Determine when timer will expire                */
+        ptmr->OSTmrMatch = ptmr->OSTmrPeriod + OSTmrTime;
+    } else {
+        if (ptmr->OSTmrDly == 0u) {
+            ptmr->OSTmrMatch = ptmr->OSTmrPeriod + OSTmrTime;
+        } else {
+            ptmr->OSTmrMatch = ptmr->OSTmrDly    + OSTmrTime;
+        }
+    }
+    spoke  = (INT16U)(ptmr->OSTmrMatch % OS_TMR_CFG_WHEEL_SIZE);
+    pspoke = &OSTmrWheelTbl[spoke];
+
+    if (pspoke->OSTmrFirst == (OS_TMR *)0) {                       /* Link into timer wheel                           */
+        pspoke->OSTmrFirst   = ptmr;
+        ptmr->OSTmrNext      = (OS_TMR *)0;
+        pspoke->OSTmrEntries = 1u;
+    } else {
+        ptmr1                = pspoke->OSTmrFirst;                 /* Point to first timer in the spoke               */
+        pspoke->OSTmrFirst   = ptmr;
+        ptmr->OSTmrNext      = (void *)ptmr1;
+        ptmr1->OSTmrPrev     = (void *)ptmr;
+        pspoke->OSTmrEntries++;
+    }
+    ptmr->OSTmrPrev = (void *)0;                                   /* Timer always inserted as first node in list     */
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                 REMOVE A TIMER FROM THE TIMER WHEEL
+*
+* Description: This function is called to remove the timer from the timer wheel.
+*
+* Arguments  : ptmr          Is a pointer to the timer to remove.
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  void  OSTmr_Unlink (OS_TMR *ptmr)
+{
+    OS_TMR        *ptmr1;
+    OS_TMR        *ptmr2;
+    OS_TMR_WHEEL  *pspoke;
+    INT16U         spoke;
+
+
+    spoke  = (INT16U)(ptmr->OSTmrMatch % OS_TMR_CFG_WHEEL_SIZE);
+    pspoke = &OSTmrWheelTbl[spoke];
+
+    if (pspoke->OSTmrFirst == ptmr) {                       /* See if timer to remove is at the beginning of list     */
+        ptmr1              = (OS_TMR *)ptmr->OSTmrNext;
+        pspoke->OSTmrFirst = (OS_TMR *)ptmr1;
+        if (ptmr1 != (OS_TMR *)0) {
+            ptmr1->OSTmrPrev = (void *)0;
+        }
+    } else {
+        ptmr1            = (OS_TMR *)ptmr->OSTmrPrev;       /* Remove timer from somewhere in the list                */
+        ptmr2            = (OS_TMR *)ptmr->OSTmrNext;
+        ptmr1->OSTmrNext = ptmr2;
+        if (ptmr2 != (OS_TMR *)0) {
+            ptmr2->OSTmrPrev = (void *)ptmr1;
+        }
+    }
+    ptmr->OSTmrState = OS_TMR_STATE_STOPPED;
+    ptmr->OSTmrNext  = (void *)0;
+    ptmr->OSTmrPrev  = (void *)0;
+    pspoke->OSTmrEntries--;
+}
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                        TIMER MANAGEMENT TASK
+*
+* Description: This task is created by OSTmrInit().
+*
+* Arguments  : none
+*
+* Returns    : none
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  void  OSTmr_Task (void *p_arg)
+{
+    INT8U            err;
+    OS_TMR          *ptmr;
+    OS_TMR          *ptmr_next;
+    OS_TMR_CALLBACK  pfnct;
+    OS_TMR_WHEEL    *pspoke;
+    INT16U           spoke;
+
+
+    p_arg = p_arg;                                               /* Prevent compiler warning for not using 'p_arg'    */
+    for (;;) {
+        OSSemPend(OSTmrSemSignal, 0u, &err);                     /* Wait for signal indicating time to update timers  */
+        OSSchedLock();
+        OSTmrTime++;                                             /* Increment the current time                        */
+        spoke  = (INT16U)(OSTmrTime % OS_TMR_CFG_WHEEL_SIZE);    /* Position on current timer wheel entry             */
+        pspoke = &OSTmrWheelTbl[spoke];
+        ptmr   = pspoke->OSTmrFirst;
+        while (ptmr != (OS_TMR *)0) {
+            ptmr_next = (OS_TMR *)ptmr->OSTmrNext;               /* Point to next timer to update because current ... */
+                                                                 /* ... timer could get unlinked from the wheel.      */
+            if (OSTmrTime == ptmr->OSTmrMatch) {                 /* Process each timer that expires                   */
+                OSTmr_Unlink(ptmr);                              /* Remove from current wheel spoke                   */
+                if (ptmr->OSTmrOpt == OS_TMR_OPT_PERIODIC) {
+                    OSTmr_Link(ptmr, OS_TMR_LINK_PERIODIC);      /* Recalculate new position of timer in wheel        */
+                } else {
+                    ptmr->OSTmrState = OS_TMR_STATE_COMPLETED;   /* Indicate that the timer has completed             */
+                }
+                pfnct = ptmr->OSTmrCallback;                     /* Execute callback function if available            */
+                if (pfnct != (OS_TMR_CALLBACK)0) {
+                    (*pfnct)((void *)ptmr, ptmr->OSTmrCallbackArg);
+                }
+            }
+            ptmr = ptmr_next;
+        }
+        OSSchedUnlock();
+    }
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/subdir.mk b/src/ucos_v1_42/micrium_source/uCOS-II/Source/subdir.mk
new file mode 100644
index 0000000..e5e600e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/subdir.mk
@@ -0,0 +1,11 @@
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_core.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_dbg_r.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_flag.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_mbox.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_mem.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_mutex.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_q.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_sem.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_task.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_time.c
+SRC += $(SRC_DIR)/ucos_v1_42/micrium_source/uCOS-II/Source/os_tmr.c
diff --git a/src/ucos_v1_42/micrium_source/uCOS-II/Source/ucos_ii.h b/src/ucos_v1_42/micrium_source/uCOS-II/Source/ucos_ii.h
new file mode 100644
index 0000000..9c91948
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-II/Source/ucos_ii.h
@@ -0,0 +1,1982 @@
+/*
+*********************************************************************************************************
+*                                              uC/OS-II
+*                                        The Real-Time Kernel
+*
+*                            (c) Copyright 1992-2013, Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : uCOS_II.H
+* By      : Jean J. Labrosse
+* Version : V2.92.11
+*
+* LICENSING TERMS:
+* ---------------
+*   uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+* If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+* its use in your product. We provide ALL the source code for your convenience and to help you experience
+* uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+* licensing fee.
+*********************************************************************************************************
+*/
+
+#ifndef   OS_uCOS_II_H
+#define   OS_uCOS_II_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                       uC/OS-II VERSION NUMBER
+*********************************************************************************************************
+*/
+
+#define  OS_VERSION                 29211u              /* Version of uC/OS-II (Vx.yy mult. by 10000)  */
+
+/*
+*********************************************************************************************************
+*                                        INCLUDE HEADER FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+
+/*
+*********************************************************************************************************
+*                                            MISCELLANEOUS
+*********************************************************************************************************
+*/
+
+#ifdef   OS_GLOBALS
+#define  OS_EXT
+#else
+#define  OS_EXT  extern
+#endif
+
+#ifndef  OS_FALSE
+#define  OS_FALSE                       0u
+#endif
+
+#ifndef  OS_TRUE
+#define  OS_TRUE                        1u
+#endif
+
+#define  OS_ASCII_NUL            (INT8U)0
+
+#define  OS_PRIO_SELF                0xFFu              /* Indicate SELF priority                      */
+#define  OS_PRIO_MUTEX_CEIL_DIS      0xFFu              /* Disable mutex priority ceiling promotion    */
+
+#if OS_TASK_STAT_EN > 0u
+#define  OS_N_SYS_TASKS                 2u              /* Number of system tasks                      */
+#else
+#define  OS_N_SYS_TASKS                 1u
+#endif
+
+#define  OS_TASK_STAT_PRIO  (OS_LOWEST_PRIO - 1u)       /* Statistic task priority                     */
+#define  OS_TASK_IDLE_PRIO  (OS_LOWEST_PRIO)            /* IDLE      task priority                     */
+
+#if OS_LOWEST_PRIO <= 63u
+#define  OS_EVENT_TBL_SIZE ((OS_LOWEST_PRIO) / 8u + 1u) /* Size of event table                         */
+#define  OS_RDY_TBL_SIZE   ((OS_LOWEST_PRIO) / 8u + 1u) /* Size of ready table                         */
+#else
+#define  OS_EVENT_TBL_SIZE ((OS_LOWEST_PRIO) / 16u + 1u)/* Size of event table                         */
+#define  OS_RDY_TBL_SIZE   ((OS_LOWEST_PRIO) / 16u + 1u)/* Size of ready table                         */
+#endif
+
+#define  OS_TASK_IDLE_ID            65535u              /* ID numbers for Idle, Stat and Timer tasks   */
+#define  OS_TASK_STAT_ID            65534u
+#define  OS_TASK_TMR_ID             65533u
+
+#define  OS_EVENT_EN           (((OS_Q_EN > 0u) && (OS_MAX_QS > 0u)) || (OS_MBOX_EN > 0u) || (OS_SEM_EN > 0u) || (OS_MUTEX_EN > 0u))
+
+#define  OS_TCB_RESERVED        ((OS_TCB *)1)
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                             TASK STATUS (Bit definition for OSTCBStat)
+*********************************************************************************************************
+*/
+#define  OS_STAT_RDY                 0x00u  /* Ready to run                                            */
+#define  OS_STAT_SEM                 0x01u  /* Pending on semaphore                                    */
+#define  OS_STAT_MBOX                0x02u  /* Pending on mailbox                                      */
+#define  OS_STAT_Q                   0x04u  /* Pending on queue                                        */
+#define  OS_STAT_SUSPEND             0x08u  /* Task is suspended                                       */
+#define  OS_STAT_MUTEX               0x10u  /* Pending on mutual exclusion semaphore                   */
+#define  OS_STAT_FLAG                0x20u  /* Pending on event flag group                             */
+#define  OS_STAT_MULTI               0x80u  /* Pending on multiple events                              */
+
+#define  OS_STAT_PEND_ANY         (OS_STAT_SEM | OS_STAT_MBOX | OS_STAT_Q | OS_STAT_MUTEX | OS_STAT_FLAG)
+
+/*
+*********************************************************************************************************
+*                          TASK PEND STATUS (Status codes for OSTCBStatPend)
+*********************************************************************************************************
+*/
+#define  OS_STAT_PEND_OK                0u  /* Pending status OK, not pending, or pending complete     */
+#define  OS_STAT_PEND_TO                1u  /* Pending timed out                                       */
+#define  OS_STAT_PEND_ABORT             2u  /* Pending aborted                                         */
+
+/*
+*********************************************************************************************************
+*                                           OS_EVENT types
+*********************************************************************************************************
+*/
+#define  OS_EVENT_TYPE_UNUSED           0u
+#define  OS_EVENT_TYPE_MBOX             1u
+#define  OS_EVENT_TYPE_Q                2u
+#define  OS_EVENT_TYPE_SEM              3u
+#define  OS_EVENT_TYPE_MUTEX            4u
+#define  OS_EVENT_TYPE_FLAG             5u
+
+#define  OS_TMR_TYPE                  100u  /* Used to identify Timers ...                             */
+                                            /* ... (Must be different value than OS_EVENT_TYPE_xxx)    */
+
+/*
+*********************************************************************************************************
+*                                             EVENT FLAGS
+*********************************************************************************************************
+*/
+#define  OS_FLAG_WAIT_CLR_ALL           0u  /* Wait for ALL    the bits specified to be CLR (i.e. 0)   */
+#define  OS_FLAG_WAIT_CLR_AND           0u
+
+#define  OS_FLAG_WAIT_CLR_ANY           1u  /* Wait for ANY of the bits specified to be CLR (i.e. 0)   */
+#define  OS_FLAG_WAIT_CLR_OR            1u
+
+#define  OS_FLAG_WAIT_SET_ALL           2u  /* Wait for ALL    the bits specified to be SET (i.e. 1)   */
+#define  OS_FLAG_WAIT_SET_AND           2u
+
+#define  OS_FLAG_WAIT_SET_ANY           3u  /* Wait for ANY of the bits specified to be SET (i.e. 1)   */
+#define  OS_FLAG_WAIT_SET_OR            3u
+
+
+#define  OS_FLAG_CONSUME             0x80u  /* Consume the flags if condition(s) satisfied             */
+
+
+#define  OS_FLAG_CLR                    0u
+#define  OS_FLAG_SET                    1u
+
+/*
+*********************************************************************************************************
+*                                     Values for OSTickStepState
+*
+* Note(s): This feature is used by uC/OS-View.
+*********************************************************************************************************
+*/
+
+#if OS_TICK_STEP_EN > 0u
+#define  OS_TICK_STEP_DIS               0u  /* Stepping is disabled, tick runs as normal               */
+#define  OS_TICK_STEP_WAIT              1u  /* Waiting for uC/OS-View to set OSTickStepState to _ONCE  */
+#define  OS_TICK_STEP_ONCE              2u  /* Process tick once and wait for next cmd from uC/OS-View */
+#endif
+
+/*
+*********************************************************************************************************
+*      Possible values for 'opt' argument of OSSemDel(), OSMboxDel(), OSQDel() and OSMutexDel()
+*********************************************************************************************************
+*/
+#define  OS_DEL_NO_PEND                 0u
+#define  OS_DEL_ALWAYS                  1u
+
+/*
+*********************************************************************************************************
+*                                        OS???Pend() OPTIONS
+*
+* These #defines are used to establish the options for OS???PendAbort().
+*********************************************************************************************************
+*/
+#define  OS_PEND_OPT_NONE               0u  /* NO option selected                                      */
+#define  OS_PEND_OPT_BROADCAST          1u  /* Broadcast action to ALL tasks waiting                   */
+
+/*
+*********************************************************************************************************
+*                                     OS???PostOpt() OPTIONS
+*
+* These #defines are used to establish the options for OSMboxPostOpt() and OSQPostOpt().
+*********************************************************************************************************
+*/
+#define  OS_POST_OPT_NONE            0x00u  /* NO option selected                                      */
+#define  OS_POST_OPT_BROADCAST       0x01u  /* Broadcast message to ALL tasks waiting                  */
+#define  OS_POST_OPT_FRONT           0x02u  /* Post to highest priority task waiting                   */
+#define  OS_POST_OPT_NO_SCHED        0x04u  /* Do not call the scheduler if this option is selected    */
+
+/*
+*********************************************************************************************************
+*                                TASK OPTIONS (see OSTaskCreateExt())
+*********************************************************************************************************
+*/
+#define  OS_TASK_OPT_NONE          0x0000u  /* NO option selected                                      */
+#define  OS_TASK_OPT_STK_CHK       0x0001u  /* Enable stack checking for the task                      */
+#define  OS_TASK_OPT_STK_CLR       0x0002u  /* Clear the stack when the task is create                 */
+#define  OS_TASK_OPT_SAVE_FP       0x0004u  /* Save the contents of any floating-point registers       */
+#define  OS_TASK_OPT_NO_TLS        0x0008u  /* Specify that task doesn't needs TLS                     */
+
+/*
+*********************************************************************************************************
+*                          TIMER OPTIONS (see OSTmrStart() and OSTmrStop())
+*********************************************************************************************************
+*/
+#define  OS_TMR_OPT_NONE                0u  /* No option selected                                      */
+
+#define  OS_TMR_OPT_ONE_SHOT            1u  /* Timer will not automatically restart when it expires    */
+#define  OS_TMR_OPT_PERIODIC            2u  /* Timer will     automatically restart when it expires    */
+
+#define  OS_TMR_OPT_CALLBACK            3u  /* OSTmrStop() option to call 'callback' w/ timer arg.     */
+#define  OS_TMR_OPT_CALLBACK_ARG        4u  /* OSTmrStop() option to call 'callback' w/ new   arg.     */
+
+/*
+*********************************************************************************************************
+*                                            TIMER STATES
+*********************************************************************************************************
+*/
+#define  OS_TMR_STATE_UNUSED            0u
+#define  OS_TMR_STATE_STOPPED           1u
+#define  OS_TMR_STATE_COMPLETED         2u
+#define  OS_TMR_STATE_RUNNING           3u
+
+/*
+*********************************************************************************************************
+*                                             ERROR CODES
+*********************************************************************************************************
+*/
+#define OS_ERR_NONE                     0u
+
+#define OS_ERR_EVENT_TYPE               1u
+#define OS_ERR_PEND_ISR                 2u
+#define OS_ERR_POST_NULL_PTR            3u
+#define OS_ERR_PEVENT_NULL              4u
+#define OS_ERR_POST_ISR                 5u
+#define OS_ERR_QUERY_ISR                6u
+#define OS_ERR_INVALID_OPT              7u
+#define OS_ERR_ID_INVALID               8u
+#define OS_ERR_PDATA_NULL               9u
+
+#define OS_ERR_TIMEOUT                 10u
+#define OS_ERR_EVENT_NAME_TOO_LONG     11u
+#define OS_ERR_PNAME_NULL              12u
+#define OS_ERR_PEND_LOCKED             13u
+#define OS_ERR_PEND_ABORT              14u
+#define OS_ERR_DEL_ISR                 15u
+#define OS_ERR_CREATE_ISR              16u
+#define OS_ERR_NAME_GET_ISR            17u
+#define OS_ERR_NAME_SET_ISR            18u
+#define OS_ERR_ILLEGAL_CREATE_RUN_TIME 19u
+
+#define OS_ERR_MBOX_FULL               20u
+
+#define OS_ERR_Q_FULL                  30u
+#define OS_ERR_Q_EMPTY                 31u
+
+#define OS_ERR_PRIO_EXIST              40u
+#define OS_ERR_PRIO                    41u
+#define OS_ERR_PRIO_INVALID            42u
+
+#define OS_ERR_SCHED_LOCKED            50u
+#define OS_ERR_SEM_OVF                 51u
+
+#define OS_ERR_TASK_CREATE_ISR         60u
+#define OS_ERR_TASK_DEL                61u
+#define OS_ERR_TASK_DEL_IDLE           62u
+#define OS_ERR_TASK_DEL_REQ            63u
+#define OS_ERR_TASK_DEL_ISR            64u
+#define OS_ERR_TASK_NAME_TOO_LONG      65u
+#define OS_ERR_TASK_NO_MORE_TCB        66u
+#define OS_ERR_TASK_NOT_EXIST          67u
+#define OS_ERR_TASK_NOT_SUSPENDED      68u
+#define OS_ERR_TASK_OPT                69u
+#define OS_ERR_TASK_RESUME_PRIO        70u
+#define OS_ERR_TASK_SUSPEND_IDLE       71u
+#define OS_ERR_TASK_SUSPEND_PRIO       72u
+#define OS_ERR_TASK_WAITING            73u
+
+#define OS_ERR_TIME_NOT_DLY            80u
+#define OS_ERR_TIME_INVALID_MINUTES    81u
+#define OS_ERR_TIME_INVALID_SECONDS    82u
+#define OS_ERR_TIME_INVALID_MS         83u
+#define OS_ERR_TIME_ZERO_DLY           84u
+#define OS_ERR_TIME_DLY_ISR            85u
+
+#define OS_ERR_MEM_INVALID_PART        90u
+#define OS_ERR_MEM_INVALID_BLKS        91u
+#define OS_ERR_MEM_INVALID_SIZE        92u
+#define OS_ERR_MEM_NO_FREE_BLKS        93u
+#define OS_ERR_MEM_FULL                94u
+#define OS_ERR_MEM_INVALID_PBLK        95u
+#define OS_ERR_MEM_INVALID_PMEM        96u
+#define OS_ERR_MEM_INVALID_PDATA       97u
+#define OS_ERR_MEM_INVALID_ADDR        98u
+#define OS_ERR_MEM_NAME_TOO_LONG       99u
+
+#define OS_ERR_NOT_MUTEX_OWNER        100u
+
+#define OS_ERR_FLAG_INVALID_PGRP      110u
+#define OS_ERR_FLAG_WAIT_TYPE         111u
+#define OS_ERR_FLAG_NOT_RDY           112u
+#define OS_ERR_FLAG_INVALID_OPT       113u
+#define OS_ERR_FLAG_GRP_DEPLETED      114u
+#define OS_ERR_FLAG_NAME_TOO_LONG     115u
+
+#define OS_ERR_PCP_LOWER              120u
+
+#define OS_ERR_TMR_INVALID_DLY        130u
+#define OS_ERR_TMR_INVALID_PERIOD     131u
+#define OS_ERR_TMR_INVALID_OPT        132u
+#define OS_ERR_TMR_INVALID_NAME       133u
+#define OS_ERR_TMR_NON_AVAIL          134u
+#define OS_ERR_TMR_INACTIVE           135u
+#define OS_ERR_TMR_INVALID_DEST       136u
+#define OS_ERR_TMR_INVALID_TYPE       137u
+#define OS_ERR_TMR_INVALID            138u
+#define OS_ERR_TMR_ISR                139u
+#define OS_ERR_TMR_NAME_TOO_LONG      140u
+#define OS_ERR_TMR_INVALID_STATE      141u
+#define OS_ERR_TMR_STOPPED            142u
+#define OS_ERR_TMR_NO_CALLBACK        143u
+
+#define OS_ERR_NO_MORE_ID_AVAIL       150u
+
+#define OS_ERR_TLS_NO_MORE_AVAIL      160u
+#define OS_ERR_TLS_ID_INVALID         161u
+#define OS_ERR_TLS_NOT_EN             162u
+#define OS_ERR_TLS_DESTRUCT_ASSIGNED  163u
+#define OS_ERR_OS_NOT_RUNNING         164u
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       THREAD LOCAL STORAGE (TLS)
+*********************************************************************************************************
+*/
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+typedef  void                       *OS_TLS;
+
+typedef  INT8U                       OS_TLS_ID;
+#endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                         EVENT CONTROL BLOCK
+*********************************************************************************************************
+*/
+
+#if OS_LOWEST_PRIO <= 63u
+typedef  INT8U    OS_PRIO;
+#else
+typedef  INT16U   OS_PRIO;
+#endif
+
+#if (OS_EVENT_EN) && (OS_MAX_EVENTS > 0u)
+typedef struct os_event {
+    INT8U    OSEventType;                   /* Type of event control block (see OS_EVENT_TYPE_xxxx)    */
+    void    *OSEventPtr;                    /* Pointer to message or queue structure                   */
+    INT16U   OSEventCnt;                    /* Semaphore Count (not used if other EVENT type)          */
+    OS_PRIO  OSEventGrp;                    /* Group corresponding to tasks waiting for event to occur */
+    OS_PRIO  OSEventTbl[OS_EVENT_TBL_SIZE]; /* List of tasks waiting for event to occur                */
+
+#if OS_EVENT_NAME_EN > 0u
+    INT8U   *OSEventName;
+#endif
+} OS_EVENT;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      EVENT FLAGS CONTROL BLOCK
+*********************************************************************************************************
+*/
+
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+
+#if OS_FLAGS_NBITS == 8u                    /* Determine the size of OS_FLAGS (8, 16 or 32 bits)       */
+typedef  INT8U    OS_FLAGS;
+#endif
+
+#if OS_FLAGS_NBITS == 16u
+typedef  INT16U   OS_FLAGS;
+#endif
+
+#if OS_FLAGS_NBITS == 32u
+typedef  INT32U   OS_FLAGS;
+#endif
+
+
+typedef struct os_flag_grp {                /* Event Flag Group                                        */
+    INT8U         OSFlagType;               /* Should be set to OS_EVENT_TYPE_FLAG                     */
+    void         *OSFlagWaitList;           /* Pointer to first NODE of task waiting on event flag     */
+    OS_FLAGS      OSFlagFlags;              /* 8, 16 or 32 bit flags                                   */
+#if OS_FLAG_NAME_EN > 0u
+    INT8U        *OSFlagName;
+#endif
+} OS_FLAG_GRP;
+
+
+
+typedef struct os_flag_node {               /* Event Flag Wait List Node                               */
+    void         *OSFlagNodeNext;           /* Pointer to next     NODE in wait list                   */
+    void         *OSFlagNodePrev;           /* Pointer to previous NODE in wait list                   */
+    void         *OSFlagNodeTCB;            /* Pointer to TCB of waiting task                          */
+    void         *OSFlagNodeFlagGrp;        /* Pointer to Event Flag Group                             */
+    OS_FLAGS      OSFlagNodeFlags;          /* Event flag to wait on                                   */
+    INT8U         OSFlagNodeWaitType;       /* Type of wait:                                           */
+                                            /*      OS_FLAG_WAIT_AND                                   */
+                                            /*      OS_FLAG_WAIT_ALL                                   */
+                                            /*      OS_FLAG_WAIT_OR                                    */
+                                            /*      OS_FLAG_WAIT_ANY                                   */
+} OS_FLAG_NODE;
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                        MESSAGE MAILBOX DATA
+*********************************************************************************************************
+*/
+
+#if OS_MBOX_EN > 0u
+typedef struct os_mbox_data {
+    void   *OSMsg;                          /* Pointer to message in mailbox                           */
+    OS_PRIO OSEventTbl[OS_EVENT_TBL_SIZE];  /* List of tasks waiting for event to occur                */
+    OS_PRIO OSEventGrp;                     /* Group corresponding to tasks waiting for event to occur */
+} OS_MBOX_DATA;
+#endif
+
+/*
+*********************************************************************************************************
+*                                  MEMORY PARTITION DATA STRUCTURES
+*********************************************************************************************************
+*/
+
+#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u)
+typedef struct os_mem {                     /* MEMORY CONTROL BLOCK                                    */
+    void   *OSMemAddr;                      /* Pointer to beginning of memory partition                */
+    void   *OSMemFreeList;                  /* Pointer to list of free memory blocks                   */
+    INT32U  OSMemBlkSize;                   /* Size (in bytes) of each block of memory                 */
+    INT32U  OSMemNBlks;                     /* Total number of blocks in this partition                */
+    INT32U  OSMemNFree;                     /* Number of memory blocks remaining in this partition     */
+#if OS_MEM_NAME_EN > 0u
+    INT8U  *OSMemName;                      /* Memory partition name                                   */
+#endif
+} OS_MEM;
+
+
+typedef struct os_mem_data {
+    void   *OSAddr;                         /* Ptr to the beginning address of the memory partition    */
+    void   *OSFreeList;                     /* Ptr to the beginning of the free list of memory blocks  */
+    INT32U  OSBlkSize;                      /* Size (in bytes) of each memory block                    */
+    INT32U  OSNBlks;                        /* Total number of blocks in the partition                 */
+    INT32U  OSNFree;                        /* Number of memory blocks free                            */
+    INT32U  OSNUsed;                        /* Number of memory blocks used                            */
+} OS_MEM_DATA;
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                   MUTUAL EXCLUSION SEMAPHORE DATA
+*********************************************************************************************************
+*/
+
+#if OS_MUTEX_EN > 0u
+typedef struct os_mutex_data {
+    OS_PRIO OSEventTbl[OS_EVENT_TBL_SIZE];  /* List of tasks waiting for event to occur                */
+    OS_PRIO OSEventGrp;                     /* Group corresponding to tasks waiting for event to occur */
+    BOOLEAN OSValue;                        /* Mutex value (OS_FALSE = used, OS_TRUE = available)      */
+    INT8U   OSOwnerPrio;                    /* Mutex owner's task priority or 0xFF if no owner         */
+    INT8U   OSMutexPCP;                     /* Priority Ceiling Priority or 0xFF if PCP disabled       */
+} OS_MUTEX_DATA;
+#endif
+
+/*
+*********************************************************************************************************
+*                                         MESSAGE QUEUE DATA
+*********************************************************************************************************
+*/
+
+#if OS_Q_EN > 0u
+typedef struct os_q {                       /* QUEUE CONTROL BLOCK                                     */
+    struct os_q   *OSQPtr;                  /* Link to next queue control block in list of free blocks */
+    void         **OSQStart;                /* Ptr to start of queue data                              */
+    void         **OSQEnd;                  /* Ptr to end   of queue data                              */
+    void         **OSQIn;                   /* Ptr to where next message will be inserted  in   the Q  */
+    void         **OSQOut;                  /* Ptr to where next message will be extracted from the Q  */
+    INT16U         OSQSize;                 /* Size of queue (maximum number of entries)               */
+    INT16U         OSQEntries;              /* Current number of entries in the queue                  */
+} OS_Q;
+
+
+typedef struct os_q_data {
+    void          *OSMsg;                   /* Pointer to next message to be extracted from queue      */
+    INT16U         OSNMsgs;                 /* Number of messages in message queue                     */
+    INT16U         OSQSize;                 /* Size of message queue                                   */
+    OS_PRIO        OSEventTbl[OS_EVENT_TBL_SIZE];  /* List of tasks waiting for event to occur         */
+    OS_PRIO        OSEventGrp;              /* Group corresponding to tasks waiting for event to occur */
+} OS_Q_DATA;
+#endif
+
+/*
+*********************************************************************************************************
+*                                           SEMAPHORE DATA
+*********************************************************************************************************
+*/
+
+#if OS_SEM_EN > 0u
+typedef struct os_sem_data {
+    INT16U  OSCnt;                          /* Semaphore count                                         */
+    OS_PRIO OSEventTbl[OS_EVENT_TBL_SIZE];  /* List of tasks waiting for event to occur                */
+    OS_PRIO OSEventGrp;                     /* Group corresponding to tasks waiting for event to occur */
+} OS_SEM_DATA;
+#endif
+
+/*
+*********************************************************************************************************
+*                                           TASK STACK DATA
+*********************************************************************************************************
+*/
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+typedef struct os_stk_data {
+    INT32U  OSFree;                         /* Number of free entries on the stack                     */
+    INT32U  OSUsed;                         /* Number of entries used on the stack                     */
+} OS_STK_DATA;
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                         TASK CONTROL BLOCK
+*********************************************************************************************************
+*/
+
+typedef struct os_tcb {
+    OS_STK          *OSTCBStkPtr;           /* Pointer to current top of stack                         */
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+    void            *OSTCBExtPtr;           /* Pointer to user definable data for TCB extension        */
+    OS_STK          *OSTCBStkBottom;        /* Pointer to bottom of stack                              */
+    INT32U           OSTCBStkSize;          /* Size of task stack (in number of stack elements)        */
+    INT16U           OSTCBOpt;              /* Task options as passed by OSTaskCreateExt()             */
+    INT16U           OSTCBId;               /* Task ID (0..65535)                                      */
+#endif
+
+    struct os_tcb   *OSTCBNext;             /* Pointer to next     TCB in the TCB list                 */
+    struct os_tcb   *OSTCBPrev;             /* Pointer to previous TCB in the TCB list                 */
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+    OS_TLS           OSTCBTLSTbl[OS_TLS_TBL_SIZE];
+#endif
+#endif
+
+#if (OS_EVENT_EN)
+    OS_EVENT        *OSTCBEventPtr;         /* Pointer to          event control block                 */
+#endif
+
+#if (OS_EVENT_EN) && (OS_EVENT_MULTI_EN > 0u)
+    OS_EVENT       **OSTCBEventMultiPtr;    /* Pointer to multiple event control blocks                */
+#endif
+
+#if ((OS_Q_EN > 0u) && (OS_MAX_QS > 0u)) || (OS_MBOX_EN > 0u)
+    void            *OSTCBMsg;              /* Message received from OSMboxPost() or OSQPost()         */
+#endif
+
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+#if OS_TASK_DEL_EN > 0u
+    OS_FLAG_NODE    *OSTCBFlagNode;         /* Pointer to event flag node                              */
+#endif
+    OS_FLAGS         OSTCBFlagsRdy;         /* Event flags that made task ready to run                 */
+#endif
+
+    INT32U           OSTCBDly;              /* Nbr ticks to delay task or, timeout waiting for event   */
+    INT8U            OSTCBStat;             /* Task      status                                        */
+    INT8U            OSTCBStatPend;         /* Task PEND status                                        */
+    INT8U            OSTCBPrio;             /* Task priority (0 == highest)                            */
+
+    INT8U            OSTCBX;                /* Bit position in group  corresponding to task priority   */
+    INT8U            OSTCBY;                /* Index into ready table corresponding to task priority   */
+    OS_PRIO          OSTCBBitX;             /* Bit mask to access bit position in ready table          */
+    OS_PRIO          OSTCBBitY;             /* Bit mask to access bit position in ready group          */
+
+#if OS_TASK_DEL_EN > 0u
+    INT8U            OSTCBDelReq;           /* Indicates whether a task needs to delete itself         */
+#endif
+
+#if OS_TASK_PROFILE_EN > 0u
+    INT32U           OSTCBCtxSwCtr;         /* Number of time the task was switched in                 */
+    INT32U           OSTCBCyclesTot;        /* Total number of clock cycles the task has been running  */
+    INT32U           OSTCBCyclesStart;      /* Snapshot of cycle counter at start of task resumption   */
+    OS_STK          *OSTCBStkBase;          /* Pointer to the beginning of the task stack              */
+    INT32U           OSTCBStkUsed;          /* Number of bytes used from the stack                     */
+#endif
+
+#if OS_TASK_NAME_EN > 0u
+    INT8U           *OSTCBTaskName;
+#endif
+
+#if OS_TASK_REG_TBL_SIZE > 0u
+    INT32U           OSTCBRegTbl[OS_TASK_REG_TBL_SIZE];
+#endif
+} OS_TCB;
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          TIMER DATA TYPES
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+typedef  void (*OS_TMR_CALLBACK)(void *ptmr, void *parg);
+
+
+
+typedef  struct  os_tmr {
+    INT8U            OSTmrType;             /* Should be set to OS_TMR_TYPE                            */
+    OS_TMR_CALLBACK  OSTmrCallback;         /* Function to call when timer expires                     */
+    void            *OSTmrCallbackArg;      /* Argument to pass to function when timer expires         */
+    void            *OSTmrNext;             /* Double link list pointers                               */
+    void            *OSTmrPrev;
+    INT32U           OSTmrMatch;            /* Timer expires when OSTmrTime == OSTmrMatch              */
+    INT32U           OSTmrDly;              /* Delay time before periodic update starts                */
+    INT32U           OSTmrPeriod;           /* Period to repeat timer                                  */
+#if OS_TMR_CFG_NAME_EN > 0u
+    INT8U           *OSTmrName;             /* Name to give the timer                                  */
+#endif
+    INT8U            OSTmrOpt;              /* Options (see OS_TMR_OPT_xxx)                            */
+    INT8U            OSTmrState;            /* Indicates the state of the timer:                       */
+                                            /*     OS_TMR_STATE_UNUSED                                 */
+                                            /*     OS_TMR_STATE_RUNNING                                */
+                                            /*     OS_TMR_STATE_STOPPED                                */
+} OS_TMR;
+
+
+
+typedef  struct  os_tmr_wheel {
+    OS_TMR          *OSTmrFirst;            /* Pointer to first timer in linked list                   */
+    INT16U           OSTmrEntries;
+} OS_TMR_WHEEL;
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       THREAD LOCAL STORAGE (TLS)
+*********************************************************************************************************
+*/
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+typedef  void                      (*OS_TLS_DESTRUCT_PTR)(OS_TCB    *ptcb,
+                                                          OS_TLS_ID  id,
+                                                          OS_TLS     value);
+#endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+OS_EXT  INT32U            OSCtxSwCtr;               /* Counter of number of context switches           */
+
+#if (OS_EVENT_EN) && (OS_MAX_EVENTS > 0u)
+OS_EXT  OS_EVENT         *OSEventFreeList;          /* Pointer to list of free EVENT control blocks    */
+OS_EXT  OS_EVENT          OSEventTbl[OS_MAX_EVENTS];/* Table of EVENT control blocks                   */
+#endif
+
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+OS_EXT  OS_FLAG_GRP       OSFlagTbl[OS_MAX_FLAGS];  /* Table containing event flag groups              */
+OS_EXT  OS_FLAG_GRP      *OSFlagFreeList;           /* Pointer to free list of event flag groups       */
+#endif
+
+#if OS_TASK_STAT_EN > 0u
+OS_EXT  INT8U             OSCPUUsage;               /* Percentage of CPU used                          */
+OS_EXT  INT32U            OSIdleCtrMax;             /* Max. value that idle ctr can take in 1 sec.     */
+OS_EXT  INT32U            OSIdleCtrRun;             /* Val. reached by idle ctr at run time in 1 sec.  */
+OS_EXT  BOOLEAN           OSStatRdy;                /* Flag indicating that the statistic task is rdy  */
+OS_EXT  OS_STK            OSTaskStatStk[OS_TASK_STAT_STK_SIZE];      /* Statistics task stack          */
+#endif
+
+OS_EXT  INT8U             OSIntNesting;             /* Interrupt nesting level                         */
+
+OS_EXT  INT8U             OSLockNesting;            /* Multitasking lock nesting level                 */
+
+OS_EXT  INT8U             OSPrioCur;                /* Priority of current task                        */
+OS_EXT  INT8U             OSPrioHighRdy;            /* Priority of highest priority task               */
+
+OS_EXT  OS_PRIO           OSRdyGrp;                        /* Ready list group                         */
+OS_EXT  OS_PRIO           OSRdyTbl[OS_RDY_TBL_SIZE];       /* Table of tasks which are ready to run    */
+
+OS_EXT  BOOLEAN           OSRunning;                       /* Flag indicating that kernel is running   */
+
+OS_EXT  INT8U             OSTaskCtr;                       /* Number of tasks created                  */
+
+OS_EXT  volatile  INT32U  OSIdleCtr;                                 /* Idle counter                   */
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+OS_EXT  BOOLEAN           OSSafetyCriticalStartFlag;
+#endif
+
+OS_EXT  OS_STK            OSTaskIdleStk[OS_TASK_IDLE_STK_SIZE];      /* Idle task stack                */
+
+
+OS_EXT  OS_TCB           *OSTCBCur;                        /* Pointer to currently running TCB         */
+OS_EXT  OS_TCB           *OSTCBFreeList;                   /* Pointer to list of free TCBs             */
+OS_EXT  OS_TCB           *OSTCBHighRdy;                    /* Pointer to highest priority TCB R-to-R   */
+OS_EXT  OS_TCB           *OSTCBList;                       /* Pointer to doubly linked list of TCBs    */
+OS_EXT  OS_TCB           *OSTCBPrioTbl[OS_LOWEST_PRIO + 1u];    /* Table of pointers to created TCBs   */
+OS_EXT  OS_TCB            OSTCBTbl[OS_MAX_TASKS + OS_N_SYS_TASKS];   /* Table of TCBs                  */
+
+#if OS_TICK_STEP_EN > 0u
+OS_EXT  INT8U             OSTickStepState;          /* Indicates the state of the tick step feature    */
+#endif
+
+#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u)
+OS_EXT  OS_MEM           *OSMemFreeList;            /* Pointer to free list of memory partitions       */
+OS_EXT  OS_MEM            OSMemTbl[OS_MAX_MEM_PART];/* Storage for memory partition manager            */
+#endif
+
+#if (OS_Q_EN > 0u) && (OS_MAX_QS > 0u)
+OS_EXT  OS_Q             *OSQFreeList;              /* Pointer to list of free QUEUE control blocks    */
+OS_EXT  OS_Q              OSQTbl[OS_MAX_QS];        /* Table of QUEUE control blocks                   */
+#endif
+
+#if OS_TASK_REG_TBL_SIZE > 0u
+OS_EXT  INT8U             OSTaskRegNextAvailID;     /* Next available Task register ID                 */
+#endif
+
+#if OS_TIME_GET_SET_EN > 0u
+OS_EXT  volatile  INT32U  OSTime;                   /* Current value of system time (in ticks)         */
+#endif
+
+#if OS_TMR_EN > 0u
+OS_EXT  INT16U            OSTmrFree;                /* Number of free entries in the timer pool        */
+OS_EXT  INT16U            OSTmrUsed;                /* Number of timers used                           */
+OS_EXT  INT32U            OSTmrTime;                /* Current timer time                              */
+
+OS_EXT  OS_EVENT         *OSTmrSem;                 /* Sem. used to gain exclusive access to timers    */
+OS_EXT  OS_EVENT         *OSTmrSemSignal;           /* Sem. used to signal the update of timers        */
+
+OS_EXT  OS_TMR            OSTmrTbl[OS_TMR_CFG_MAX]; /* Table containing pool of timers                 */
+OS_EXT  OS_TMR           *OSTmrFreeList;            /* Pointer to free list of timers                  */
+OS_EXT  OS_STK            OSTmrTaskStk[OS_TASK_TMR_STK_SIZE];
+
+OS_EXT  OS_TMR_WHEEL      OSTmrWheelTbl[OS_TMR_CFG_WHEEL_SIZE];
+#endif
+
+extern  INT8U   const     OSUnMapTbl[256];          /* Priority->Index    lookup table                 */
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*                                     (Target Independent Functions)
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            MISCELLANEOUS
+*********************************************************************************************************
+*/
+
+#if (OS_EVENT_EN)
+
+#if (OS_EVENT_NAME_EN > 0u)
+INT8U         OSEventNameGet          (OS_EVENT        *pevent,
+                                       INT8U          **pname,
+                                       INT8U           *perr);
+
+void          OSEventNameSet          (OS_EVENT        *pevent,
+                                       INT8U           *pname,
+                                       INT8U           *perr);
+#endif
+
+#if (OS_EVENT_MULTI_EN > 0u)
+INT16U        OSEventPendMulti        (OS_EVENT       **pevents_pend,
+                                       OS_EVENT       **pevents_rdy,
+                                       void           **pmsgs_rdy,
+                                       INT32U           timeout,
+                                       INT8U           *perr);
+#endif
+
+#endif
+
+/*
+*********************************************************************************************************
+*                                   TASK LOCAL STORAGE (TLS) SUPPORT                                          
+*********************************************************************************************************
+*/
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+#if defined(OS_TLS_TBL_SIZE) && (OS_TLS_TBL_SIZE > 0u)
+
+OS_TLS_ID     OS_TLS_GetID            (INT8U               *perr);
+
+OS_TLS        OS_TLS_GetValue         (OS_TCB              *ptcb,
+                                       OS_TLS_ID            id,
+                                       INT8U               *perr);
+
+void          OS_TLS_Init             (INT8U               *perr);
+
+void          OS_TLS_SetValue         (OS_TCB              *ptcb,
+                                       OS_TLS_ID            id,
+                                       OS_TLS               value,
+                                       INT8U               *perr);
+
+void          OS_TLS_SetDestruct      (OS_TLS_ID            id,
+                                       OS_TLS_DESTRUCT_PTR  pdestruct,
+                                       INT8U               *perr);
+
+void          OS_TLS_TaskCreate       (OS_TCB              *ptcb);
+
+void          OS_TLS_TaskDel          (OS_TCB              *ptcb);
+
+void          OS_TLS_TaskSw           (void);
+
+#endif
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                       EVENT FLAGS MANAGEMENT
+*********************************************************************************************************
+*/
+
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+
+#if OS_FLAG_ACCEPT_EN > 0u
+OS_FLAGS      OSFlagAccept            (OS_FLAG_GRP     *pgrp,
+                                       OS_FLAGS         flags,
+                                       INT8U            wait_type,
+                                       INT8U           *perr);
+#endif
+
+OS_FLAG_GRP  *OSFlagCreate            (OS_FLAGS         flags,
+                                       INT8U           *perr);
+
+#if OS_FLAG_DEL_EN > 0u
+OS_FLAG_GRP  *OSFlagDel               (OS_FLAG_GRP     *pgrp,
+                                       INT8U            opt,
+                                       INT8U           *perr);
+#endif
+
+#if (OS_FLAG_EN > 0u) && (OS_FLAG_NAME_EN > 0u)
+INT8U         OSFlagNameGet           (OS_FLAG_GRP     *pgrp,
+                                       INT8U          **pname,
+                                       INT8U           *perr);
+
+void          OSFlagNameSet           (OS_FLAG_GRP     *pgrp,
+                                       INT8U           *pname,
+                                       INT8U           *perr);
+#endif
+
+OS_FLAGS      OSFlagPend              (OS_FLAG_GRP     *pgrp,
+                                       OS_FLAGS         flags,
+                                       INT8U            wait_type,
+                                       INT32U           timeout,
+                                       INT8U           *perr);
+
+OS_FLAGS      OSFlagPendGetFlagsRdy   (void);
+OS_FLAGS      OSFlagPost              (OS_FLAG_GRP     *pgrp,
+                                       OS_FLAGS         flags,
+                                       INT8U            opt,
+                                       INT8U           *perr);
+
+#if OS_FLAG_QUERY_EN > 0u
+OS_FLAGS      OSFlagQuery             (OS_FLAG_GRP     *pgrp,
+                                       INT8U           *perr);
+#endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                     MESSAGE MAILBOX MANAGEMENT
+*********************************************************************************************************
+*/
+
+#if OS_MBOX_EN > 0u
+
+#if OS_MBOX_ACCEPT_EN > 0u
+void         *OSMboxAccept            (OS_EVENT        *pevent);
+#endif
+
+OS_EVENT     *OSMboxCreate            (void            *pmsg);
+
+#if OS_MBOX_DEL_EN > 0u
+OS_EVENT     *OSMboxDel               (OS_EVENT        *pevent,
+                                       INT8U            opt,
+                                       INT8U           *perr);
+#endif
+
+void         *OSMboxPend              (OS_EVENT        *pevent,
+                                       INT32U           timeout,
+                                       INT8U           *perr);
+
+#if OS_MBOX_PEND_ABORT_EN > 0u
+INT8U         OSMboxPendAbort         (OS_EVENT        *pevent,
+                                       INT8U            opt,
+                                       INT8U           *perr);
+#endif
+
+#if OS_MBOX_POST_EN > 0u
+INT8U         OSMboxPost              (OS_EVENT        *pevent,
+                                       void            *pmsg);
+#endif
+
+#if OS_MBOX_POST_OPT_EN > 0u
+INT8U         OSMboxPostOpt           (OS_EVENT        *pevent,
+                                       void            *pmsg,
+                                       INT8U            opt);
+#endif
+
+#if OS_MBOX_QUERY_EN > 0u
+INT8U         OSMboxQuery             (OS_EVENT        *pevent,
+                                       OS_MBOX_DATA    *p_mbox_data);
+#endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                          MEMORY MANAGEMENT
+*********************************************************************************************************
+*/
+
+#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u)
+
+OS_MEM       *OSMemCreate             (void            *addr,
+                                       INT32U           nblks,
+                                       INT32U           blksize,
+                                       INT8U           *perr);
+
+void         *OSMemGet                (OS_MEM          *pmem,
+                                       INT8U           *perr);
+#if OS_MEM_NAME_EN > 0u
+INT8U         OSMemNameGet            (OS_MEM          *pmem,
+                                       INT8U          **pname,
+                                       INT8U           *perr);
+
+void          OSMemNameSet            (OS_MEM          *pmem,
+                                       INT8U           *pname,
+                                       INT8U           *perr);
+#endif
+INT8U         OSMemPut                (OS_MEM          *pmem,
+                                       void            *pblk);
+
+#if OS_MEM_QUERY_EN > 0u
+INT8U         OSMemQuery              (OS_MEM          *pmem,
+                                       OS_MEM_DATA     *p_mem_data);
+#endif
+
+#endif
+
+/*
+*********************************************************************************************************
+*                                MUTUAL EXCLUSION SEMAPHORE MANAGEMENT
+*********************************************************************************************************
+*/
+
+#if OS_MUTEX_EN > 0u
+
+#if OS_MUTEX_ACCEPT_EN > 0u
+BOOLEAN       OSMutexAccept           (OS_EVENT        *pevent,
+                                       INT8U           *perr);
+#endif
+
+OS_EVENT     *OSMutexCreate           (INT8U            prio,
+                                       INT8U           *perr);
+
+#if OS_MUTEX_DEL_EN > 0u
+OS_EVENT     *OSMutexDel              (OS_EVENT        *pevent,
+                                       INT8U            opt,
+                                       INT8U           *perr);
+#endif
+
+void          OSMutexPend             (OS_EVENT        *pevent,
+                                       INT32U           timeout,
+                                       INT8U           *perr);
+
+INT8U         OSMutexPost             (OS_EVENT        *pevent);
+
+#if OS_MUTEX_QUERY_EN > 0u
+INT8U         OSMutexQuery            (OS_EVENT        *pevent,
+                                       OS_MUTEX_DATA   *p_mutex_data);
+#endif
+
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                      MESSAGE QUEUE MANAGEMENT
+*********************************************************************************************************
+*/
+
+#if (OS_Q_EN > 0u) && (OS_MAX_QS > 0u)
+
+#if OS_Q_ACCEPT_EN > 0u
+void         *OSQAccept               (OS_EVENT        *pevent,
+                                       INT8U           *perr);
+#endif
+
+OS_EVENT     *OSQCreate               (void           **start,
+                                       INT16U           size);
+
+#if OS_Q_DEL_EN > 0u
+OS_EVENT     *OSQDel                  (OS_EVENT        *pevent,
+                                       INT8U            opt,
+                                       INT8U           *perr);
+#endif
+
+#if OS_Q_FLUSH_EN > 0u
+INT8U         OSQFlush                (OS_EVENT        *pevent);
+#endif
+
+void         *OSQPend                 (OS_EVENT        *pevent,
+                                       INT32U           timeout,
+                                       INT8U           *perr);
+
+#if OS_Q_PEND_ABORT_EN > 0u
+INT8U         OSQPendAbort            (OS_EVENT        *pevent,
+                                       INT8U            opt,
+                                       INT8U           *perr);
+#endif
+
+#if OS_Q_POST_EN > 0u
+INT8U         OSQPost                 (OS_EVENT        *pevent,
+                                       void            *pmsg);
+#endif
+
+#if OS_Q_POST_FRONT_EN > 0u
+INT8U         OSQPostFront            (OS_EVENT        *pevent,
+                                       void            *pmsg);
+#endif
+
+#if OS_Q_POST_OPT_EN > 0u
+INT8U         OSQPostOpt              (OS_EVENT        *pevent,
+                                       void            *pmsg,
+                                       INT8U            opt);
+#endif
+
+#if OS_Q_QUERY_EN > 0u
+INT8U         OSQQuery                (OS_EVENT        *pevent,
+                                       OS_Q_DATA       *p_q_data);
+#endif
+
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                        SEMAPHORE MANAGEMENT
+*********************************************************************************************************
+*/
+#if OS_SEM_EN > 0u
+
+#if OS_SEM_ACCEPT_EN > 0u
+INT16U        OSSemAccept             (OS_EVENT        *pevent);
+#endif
+
+OS_EVENT     *OSSemCreate             (INT16U           cnt);
+
+#if OS_SEM_DEL_EN > 0u
+OS_EVENT     *OSSemDel                (OS_EVENT        *pevent,
+                                       INT8U            opt,
+                                       INT8U           *perr);
+#endif
+
+void          OSSemPend               (OS_EVENT        *pevent,
+                                       INT32U           timeout,
+                                       INT8U           *perr);
+
+#if OS_SEM_PEND_ABORT_EN > 0u
+INT8U         OSSemPendAbort          (OS_EVENT        *pevent,
+                                       INT8U            opt,
+                                       INT8U           *perr);
+#endif
+
+INT8U         OSSemPost               (OS_EVENT        *pevent);
+
+#if OS_SEM_QUERY_EN > 0u
+INT8U         OSSemQuery              (OS_EVENT        *pevent,
+                                       OS_SEM_DATA     *p_sem_data);
+#endif
+
+#if OS_SEM_SET_EN > 0u
+void          OSSemSet                (OS_EVENT        *pevent,
+                                       INT16U           cnt,
+                                       INT8U           *perr);
+#endif
+
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           TASK MANAGEMENT
+*********************************************************************************************************
+*/
+#if OS_TASK_CHANGE_PRIO_EN > 0u
+INT8U         OSTaskChangePrio        (INT8U            oldprio,
+                                       INT8U            newprio);
+#endif
+
+#if OS_TASK_CREATE_EN > 0u
+INT8U         OSTaskCreate            (void           (*task)(void *p_arg),
+                                       void            *p_arg,
+                                       OS_STK          *ptos,
+                                       INT8U            prio);
+#endif
+
+#if OS_TASK_CREATE_EXT_EN > 0u
+INT8U         OSTaskCreateExt         (void           (*task)(void *p_arg),
+                                       void            *p_arg,
+                                       OS_STK          *ptos,
+                                       INT8U            prio,
+                                       INT16U           id,
+                                       OS_STK          *pbos,
+                                       INT32U           stk_size,
+                                       void            *pext,
+                                       INT16U           opt);
+#endif
+
+#if OS_TASK_DEL_EN > 0u
+INT8U         OSTaskDel               (INT8U            prio);
+INT8U         OSTaskDelReq            (INT8U            prio);
+#endif
+
+#if OS_TASK_NAME_EN > 0u
+INT8U         OSTaskNameGet           (INT8U            prio,
+                                       INT8U          **pname,
+                                       INT8U           *perr);
+
+void          OSTaskNameSet           (INT8U            prio,
+                                       INT8U           *pname,
+                                       INT8U           *perr);
+#endif
+
+#if OS_TASK_SUSPEND_EN > 0u
+INT8U         OSTaskResume            (INT8U            prio);
+INT8U         OSTaskSuspend           (INT8U            prio);
+#endif
+
+#if (OS_TASK_STAT_STK_CHK_EN > 0u) && (OS_TASK_CREATE_EXT_EN > 0u)
+INT8U         OSTaskStkChk            (INT8U            prio,
+                                       OS_STK_DATA     *p_stk_data);
+#endif
+
+#if OS_TASK_QUERY_EN > 0u
+INT8U         OSTaskQuery             (INT8U            prio,
+                                       OS_TCB          *p_task_data);
+#endif
+
+
+
+#if OS_TASK_REG_TBL_SIZE > 0u
+INT32U        OSTaskRegGet            (INT8U            prio,
+                                       INT8U            id,
+                                       INT8U           *perr);
+
+INT8U         OSTaskRegGetID          (INT8U           *perr);
+
+void          OSTaskRegSet            (INT8U            prio,
+                                       INT8U            id,
+                                       INT32U           value,
+                                       INT8U           *perr);
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                           TIME MANAGEMENT
+*********************************************************************************************************
+*/
+
+void          OSTimeDly               (INT32U           ticks);
+
+#if OS_TIME_DLY_HMSM_EN > 0u
+INT8U         OSTimeDlyHMSM           (INT8U            hours,
+                                       INT8U            minutes,
+                                       INT8U            seconds,
+                                       INT16U           ms);
+#endif
+
+#if OS_TIME_DLY_RESUME_EN > 0u
+INT8U         OSTimeDlyResume         (INT8U            prio);
+#endif
+
+#if OS_TIME_GET_SET_EN > 0u
+INT32U        OSTimeGet               (void);
+void          OSTimeSet               (INT32U           ticks);
+#endif
+
+void          OSTimeTick              (void);
+
+/*
+*********************************************************************************************************
+*                                          TIMER MANAGEMENT
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+OS_TMR      *OSTmrCreate              (INT32U           dly,
+                                       INT32U           period,
+                                       INT8U            opt,
+                                       OS_TMR_CALLBACK  callback,
+                                       void            *callback_arg,
+                                       INT8U           *pname,
+                                       INT8U           *perr);
+
+BOOLEAN      OSTmrDel                 (OS_TMR          *ptmr,
+                                       INT8U           *perr);
+
+#if OS_TMR_CFG_NAME_EN > 0u
+INT8U        OSTmrNameGet             (OS_TMR          *ptmr,
+                                       INT8U          **pdest,
+                                       INT8U           *perr);
+#endif
+INT32U       OSTmrRemainGet           (OS_TMR          *ptmr,
+                                       INT8U           *perr);
+
+INT8U        OSTmrStateGet            (OS_TMR          *ptmr,
+                                       INT8U           *perr);
+
+BOOLEAN      OSTmrStart               (OS_TMR          *ptmr,
+                                       INT8U           *perr);
+
+BOOLEAN      OSTmrStop                (OS_TMR          *ptmr,
+                                       INT8U            opt,
+                                       void            *callback_arg,
+                                       INT8U           *perr);
+
+INT8U        OSTmrSignal              (void);
+#endif
+
+/*
+*********************************************************************************************************
+*                                            MISCELLANEOUS
+*********************************************************************************************************
+*/
+
+void          OSInit                  (void);
+
+void          OSIntEnter              (void);
+void          OSIntExit               (void);
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+void          OSSafetyCriticalStart   (void);
+#endif
+
+#if OS_SCHED_LOCK_EN > 0u
+void          OSSchedLock             (void);
+void          OSSchedUnlock           (void);
+#endif
+
+void          OSStart                 (void);
+
+void          OSStatInit              (void);
+
+INT16U        OSVersion               (void);
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                      INTERNAL FUNCTION PROTOTYPES
+*                            (Your application MUST NOT call these functions)
+*********************************************************************************************************
+*/
+
+#if OS_TASK_DEL_EN > 0u
+void          OS_Dummy                (void);
+#endif
+
+#if (OS_EVENT_EN)
+INT8U         OS_EventTaskRdy         (OS_EVENT        *pevent,
+                                       void            *pmsg,
+                                       INT8U            msk,
+                                       INT8U            pend_stat);
+
+void          OS_EventTaskWait        (OS_EVENT        *pevent);
+
+void          OS_EventTaskRemove      (OS_TCB          *ptcb,
+                                       OS_EVENT        *pevent);
+
+#if (OS_EVENT_MULTI_EN > 0u)
+void          OS_EventTaskWaitMulti   (OS_EVENT       **pevents_wait);
+
+void          OS_EventTaskRemoveMulti (OS_TCB          *ptcb,
+                                       OS_EVENT       **pevents_multi);
+#endif
+
+void          OS_EventWaitListInit    (OS_EVENT        *pevent);
+#endif
+
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+void          OS_FlagInit             (void);
+void          OS_FlagUnlink           (OS_FLAG_NODE    *pnode);
+#endif
+
+void          OS_MemClr               (INT8U           *pdest,
+                                       INT16U           size);
+
+void          OS_MemCopy              (INT8U           *pdest,
+                                       INT8U           *psrc,
+                                       INT16U           size);
+
+#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u)
+void          OS_MemInit              (void);
+#endif
+
+#if OS_Q_EN > 0u
+void          OS_QInit                (void);
+#endif
+
+void          OS_Sched                (void);
+
+#if (OS_EVENT_NAME_EN > 0u) || (OS_FLAG_NAME_EN > 0u) || (OS_MEM_NAME_EN > 0u) || (OS_TASK_NAME_EN > 0u)
+INT8U         OS_StrLen               (INT8U           *psrc);
+#endif
+
+void          OS_TaskIdle             (void            *p_arg);
+
+void          OS_TaskReturn           (void);
+
+#if OS_TASK_STAT_EN > 0u
+void          OS_TaskStat             (void            *p_arg);
+#endif
+
+#if (OS_TASK_STAT_STK_CHK_EN > 0u) && (OS_TASK_CREATE_EXT_EN > 0u)
+void          OS_TaskStkClr           (OS_STK          *pbos,
+                                       INT32U           size,
+                                       INT16U           opt);
+#endif
+
+#if (OS_TASK_STAT_STK_CHK_EN > 0u) && (OS_TASK_CREATE_EXT_EN > 0u)
+void          OS_TaskStatStkChk       (void);
+#endif
+
+INT8U         OS_TCBInit              (INT8U            prio,
+                                       OS_STK          *ptos,
+                                       OS_STK          *pbos,
+                                       INT16U           id,
+                                       INT32U           stk_size,
+                                       void            *pext,
+                                       INT16U           opt);
+
+#if OS_TMR_EN > 0u
+void          OSTmr_Init              (void);
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*                                      (Target Specific Functions)
+*********************************************************************************************************
+*/
+
+#if OS_DEBUG_EN > 0u
+void          OSDebugInit             (void);
+#endif
+
+void          OSInitHookBegin         (void);
+void          OSInitHookEnd           (void);
+
+void          OSTaskCreateHook        (OS_TCB          *ptcb);
+void          OSTaskDelHook           (OS_TCB          *ptcb);
+
+void          OSTaskIdleHook          (void);
+
+void          OSTaskReturnHook        (OS_TCB          *ptcb);
+
+void          OSTaskStatHook          (void);
+OS_STK       *OSTaskStkInit           (void           (*task)(void *p_arg),
+                                       void            *p_arg,
+                                       OS_STK          *ptos,
+                                       INT16U           opt);
+
+#if OS_TASK_SW_HOOK_EN > 0u
+void          OSTaskSwHook            (void);
+#endif
+
+void          OSTCBInitHook           (OS_TCB          *ptcb);
+
+#if OS_TIME_TICK_HOOK_EN > 0u
+void          OSTimeTickHook          (void);
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*                                   (Application Specific Functions)
+*********************************************************************************************************
+*/
+
+#if OS_APP_HOOKS_EN > 0u
+void          App_TaskCreateHook      (OS_TCB          *ptcb);
+void          App_TaskDelHook         (OS_TCB          *ptcb);
+void          App_TaskIdleHook        (void);
+
+void          App_TaskReturnHook      (OS_TCB          *ptcb);
+
+void          App_TaskStatHook        (void);
+
+#if OS_TASK_SW_HOOK_EN > 0u
+void          App_TaskSwHook          (void);
+#endif
+
+void          App_TCBInitHook         (OS_TCB          *ptcb);
+
+#if OS_TIME_TICK_HOOK_EN > 0u
+void          App_TimeTickHook        (void);
+#endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                          FUNCTION PROTOTYPES
+*
+* IMPORTANT: These prototypes MUST be placed in OS_CPU.H
+*********************************************************************************************************
+*/
+
+#if 0
+void          OSStartHighRdy          (void);
+void          OSIntCtxSw              (void);
+void          OSCtxSw                 (void);
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                   LOOK FOR MISSING #define CONSTANTS
+*
+* This section is used to generate ERROR messages at compile time if certain #define constants are
+* MISSING in OS_CFG.H.  This allows you to quickly determine the source of the error.
+*
+* You SHOULD NOT change this section UNLESS you would like to add more comments as to the source of the
+* compile time error.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             EVENT FLAGS
+*********************************************************************************************************
+*/
+
+#ifndef OS_FLAG_EN
+#error  "OS_CFG.H, Missing OS_FLAG_EN: Enable (1) or Disable (0) code generation for Event Flags"
+#else
+    #ifndef OS_MAX_FLAGS
+    #error  "OS_CFG.H, Missing OS_MAX_FLAGS: Max. number of Event Flag Groups in your application"
+    #else
+        #if     OS_MAX_FLAGS > 65500u
+        #error  "OS_CFG.H, OS_MAX_FLAGS must be <= 65500"
+        #endif
+    #endif
+
+    #ifndef OS_FLAGS_NBITS
+    #error  "OS_CFG.H, Missing OS_FLAGS_NBITS: Determine #bits used for event flags, MUST be either 8, 16 or 32"
+    #endif
+
+    #ifndef OS_FLAG_WAIT_CLR_EN
+    #error  "OS_CFG.H, Missing OS_FLAG_WAIT_CLR_EN: Include code for Wait on Clear EVENT FLAGS"
+    #endif
+
+    #ifndef OS_FLAG_ACCEPT_EN
+    #error  "OS_CFG.H, Missing OS_FLAG_ACCEPT_EN: Include code for OSFlagAccept()"
+    #endif
+
+    #ifndef OS_FLAG_DEL_EN
+    #error  "OS_CFG.H, Missing OS_FLAG_DEL_EN: Include code for OSFlagDel()"
+    #endif
+
+    #ifndef OS_FLAG_NAME_EN
+    #error  "OS_CFG.H, Missing OS_FLAG_NAME_EN: Enable flag group names"
+    #endif
+
+    #ifndef OS_FLAG_QUERY_EN
+    #error  "OS_CFG.H, Missing OS_FLAG_QUERY_EN: Include code for OSFlagQuery()"
+    #endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                          MESSAGE MAILBOXES
+*********************************************************************************************************
+*/
+
+#ifndef OS_MBOX_EN
+#error  "OS_CFG.H, Missing OS_MBOX_EN: Enable (1) or Disable (0) code generation for MAILBOXES"
+#else
+    #ifndef OS_MBOX_ACCEPT_EN
+    #error  "OS_CFG.H, Missing OS_MBOX_ACCEPT_EN: Include code for OSMboxAccept()"
+    #endif
+
+    #ifndef OS_MBOX_DEL_EN
+    #error  "OS_CFG.H, Missing OS_MBOX_DEL_EN: Include code for OSMboxDel()"
+    #endif
+
+    #ifndef OS_MBOX_PEND_ABORT_EN
+    #error  "OS_CFG.H, Missing OS_MBOX_PEND_ABORT_EN: Include code for OSMboxPendAbort()"
+    #endif
+
+    #ifndef OS_MBOX_POST_EN
+    #error  "OS_CFG.H, Missing OS_MBOX_POST_EN: Include code for OSMboxPost()"
+    #endif
+
+    #ifndef OS_MBOX_POST_OPT_EN
+    #error  "OS_CFG.H, Missing OS_MBOX_POST_OPT_EN: Include code for OSMboxPostOpt()"
+    #endif
+
+    #ifndef OS_MBOX_QUERY_EN
+    #error  "OS_CFG.H, Missing OS_MBOX_QUERY_EN: Include code for OSMboxQuery()"
+    #endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                          MEMORY MANAGEMENT
+*********************************************************************************************************
+*/
+
+#ifndef OS_MEM_EN
+#error  "OS_CFG.H, Missing OS_MEM_EN: Enable (1) or Disable (0) code generation for MEMORY MANAGER"
+#else
+    #ifndef OS_MAX_MEM_PART
+    #error  "OS_CFG.H, Missing OS_MAX_MEM_PART: Max. number of memory partitions"
+    #else
+        #if     OS_MAX_MEM_PART > 65500u
+        #error  "OS_CFG.H, OS_MAX_MEM_PART must be <= 65500"
+        #endif
+    #endif
+
+    #ifndef OS_MEM_NAME_EN
+    #error  "OS_CFG.H, Missing OS_MEM_NAME_EN: Enable memory partition names"
+    #endif
+
+    #ifndef OS_MEM_QUERY_EN
+    #error  "OS_CFG.H, Missing OS_MEM_QUERY_EN: Include code for OSMemQuery()"
+    #endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                     MUTUAL EXCLUSION SEMAPHORES
+*********************************************************************************************************
+*/
+
+#ifndef OS_MUTEX_EN
+#error  "OS_CFG.H, Missing OS_MUTEX_EN: Enable (1) or Disable (0) code generation for MUTEX"
+#else
+    #ifndef OS_MUTEX_ACCEPT_EN
+    #error  "OS_CFG.H, Missing OS_MUTEX_ACCEPT_EN: Include code for OSMutexAccept()"
+    #endif
+
+    #ifndef OS_MUTEX_DEL_EN
+    #error  "OS_CFG.H, Missing OS_MUTEX_DEL_EN: Include code for OSMutexDel()"
+    #endif
+
+    #ifndef OS_MUTEX_QUERY_EN
+    #error  "OS_CFG.H, Missing OS_MUTEX_QUERY_EN: Include code for OSMutexQuery()"
+    #endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                           MESSAGE QUEUES
+*********************************************************************************************************
+*/
+
+#ifndef OS_Q_EN
+#error  "OS_CFG.H, Missing OS_Q_EN: Enable (1) or Disable (0) code generation for QUEUES"
+#else
+    #ifndef OS_MAX_QS
+    #error  "OS_CFG.H, Missing OS_MAX_QS: Max. number of queue control blocks"
+    #else
+        #if     OS_MAX_QS > 65500u
+        #error  "OS_CFG.H, OS_MAX_QS must be <= 65500"
+        #endif
+    #endif
+
+    #ifndef OS_Q_ACCEPT_EN
+    #error  "OS_CFG.H, Missing OS_Q_ACCEPT_EN: Include code for OSQAccept()"
+    #endif
+
+    #ifndef OS_Q_DEL_EN
+    #error  "OS_CFG.H, Missing OS_Q_DEL_EN: Include code for OSQDel()"
+    #endif
+
+    #ifndef OS_Q_FLUSH_EN
+    #error  "OS_CFG.H, Missing OS_Q_FLUSH_EN: Include code for OSQFlush()"
+    #endif
+
+    #ifndef OS_Q_PEND_ABORT_EN
+    #error  "OS_CFG.H, Missing OS_Q_PEND_ABORT_EN: Include code for OSQPendAbort()"
+    #endif
+
+    #ifndef OS_Q_POST_EN
+    #error  "OS_CFG.H, Missing OS_Q_POST_EN: Include code for OSQPost()"
+    #endif
+
+    #ifndef OS_Q_POST_FRONT_EN
+    #error  "OS_CFG.H, Missing OS_Q_POST_FRONT_EN: Include code for OSQPostFront()"
+    #endif
+
+    #ifndef OS_Q_POST_OPT_EN
+    #error  "OS_CFG.H, Missing OS_Q_POST_OPT_EN: Include code for OSQPostOpt()"
+    #endif
+
+    #ifndef OS_Q_QUERY_EN
+    #error  "OS_CFG.H, Missing OS_Q_QUERY_EN: Include code for OSQQuery()"
+    #endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                             SEMAPHORES
+*********************************************************************************************************
+*/
+
+#ifndef OS_SEM_EN
+#error  "OS_CFG.H, Missing OS_SEM_EN: Enable (1) or Disable (0) code generation for SEMAPHORES"
+#else
+    #ifndef OS_SEM_ACCEPT_EN
+    #error  "OS_CFG.H, Missing OS_SEM_ACCEPT_EN: Include code for OSSemAccept()"
+    #endif
+
+    #ifndef OS_SEM_DEL_EN
+    #error  "OS_CFG.H, Missing OS_SEM_DEL_EN: Include code for OSSemDel()"
+    #endif
+
+    #ifndef OS_SEM_PEND_ABORT_EN
+    #error  "OS_CFG.H, Missing OS_SEM_PEND_ABORT_EN: Include code for OSSemPendAbort()"
+    #endif
+
+    #ifndef OS_SEM_QUERY_EN
+    #error  "OS_CFG.H, Missing OS_SEM_QUERY_EN: Include code for OSSemQuery()"
+    #endif
+
+    #ifndef OS_SEM_SET_EN
+    #error  "OS_CFG.H, Missing OS_SEM_SET_EN: Include code for OSSemSet()"
+    #endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                           TASK MANAGEMENT
+*********************************************************************************************************
+*/
+
+#ifndef OS_MAX_TASKS
+#error  "OS_CFG.H, Missing OS_MAX_TASKS: Max. number of tasks in your application"
+#else
+    #if     OS_MAX_TASKS < 2u
+    #error  "OS_CFG.H,         OS_MAX_TASKS must be >= 2"
+    #endif
+
+    #if     OS_MAX_TASKS >  ((OS_LOWEST_PRIO - OS_N_SYS_TASKS) + 1u)
+    #error  "OS_CFG.H,         OS_MAX_TASKS must be <= OS_LOWEST_PRIO - OS_N_SYS_TASKS + 1"
+    #endif
+
+#endif
+
+#if     OS_LOWEST_PRIO >  254u
+#error  "OS_CFG.H,         OS_LOWEST_PRIO must be <= 254 in V2.8x and higher"
+#endif
+
+#ifndef OS_TASK_IDLE_STK_SIZE
+#error  "OS_CFG.H, Missing OS_TASK_IDLE_STK_SIZE: Idle task stack size"
+#endif
+
+#ifndef OS_TASK_STAT_EN
+#error  "OS_CFG.H, Missing OS_TASK_STAT_EN: Enable (1) or Disable(0) the statistics task"
+#endif
+
+#ifndef OS_TASK_STAT_STK_SIZE
+#error  "OS_CFG.H, Missing OS_TASK_STAT_STK_SIZE: Statistics task stack size"
+#endif
+
+#ifndef OS_TASK_STAT_STK_CHK_EN
+#error  "OS_CFG.H, Missing OS_TASK_STAT_STK_CHK_EN: Check task stacks from statistics task"
+#endif
+
+#ifndef OS_TASK_CHANGE_PRIO_EN
+#error  "OS_CFG.H, Missing OS_TASK_CHANGE_PRIO_EN: Include code for OSTaskChangePrio()"
+#endif
+
+#ifndef OS_TASK_CREATE_EN
+#error  "OS_CFG.H, Missing OS_TASK_CREATE_EN: Include code for OSTaskCreate()"
+#endif
+
+#ifndef OS_TASK_CREATE_EXT_EN
+#error  "OS_CFG.H, Missing OS_TASK_CREATE_EXT_EN: Include code for OSTaskCreateExt()"
+#else
+    #if (OS_TASK_CREATE_EXT_EN == 0u) && (OS_TASK_CREATE_EN == 0u)
+    #error  "OS_CFG.H,         OS_TASK_CREATE_EXT_EN or OS_TASK_CREATE_EN must be Enable (1)"
+    #endif
+#endif
+
+#ifndef OS_TASK_DEL_EN
+#error  "OS_CFG.H, Missing OS_TASK_DEL_EN: Include code for OSTaskDel()"
+#endif
+
+#ifndef OS_TASK_NAME_EN
+#error  "OS_CFG.H, Missing OS_TASK_NAME_EN: Enable task names"
+#endif
+
+#ifndef OS_TASK_SUSPEND_EN
+#error  "OS_CFG.H, Missing OS_TASK_SUSPEND_EN: Include code for OSTaskSuspend() and OSTaskResume()"
+#endif
+
+#ifndef OS_TASK_QUERY_EN
+#error  "OS_CFG.H, Missing OS_TASK_QUERY_EN: Include code for OSTaskQuery()"
+#endif
+
+#ifndef OS_TASK_REG_TBL_SIZE
+#error  "OS_CFG.H, Missing OS_TASK_REG_TBL_SIZE: Include code for task specific registers"
+#else
+    #if     OS_TASK_REG_TBL_SIZE > 255u
+    #error  "OS_CFG.H,         OS_TASK_REG_TBL_SIZE must be <= 255"
+    #endif
+#endif
+
+/*
+*********************************************************************************************************
+*                                           TIME MANAGEMENT
+*********************************************************************************************************
+*/
+
+#ifndef OS_TICKS_PER_SEC
+#error  "OS_CFG.H, Missing OS_TICKS_PER_SEC: Sets the number of ticks in one second"
+#endif
+
+#ifndef OS_TIME_DLY_HMSM_EN
+#error  "OS_CFG.H, Missing OS_TIME_DLY_HMSM_EN: Include code for OSTimeDlyHMSM()"
+#endif
+
+#ifndef OS_TIME_DLY_RESUME_EN
+#error  "OS_CFG.H, Missing OS_TIME_DLY_RESUME_EN: Include code for OSTimeDlyResume()"
+#endif
+
+#ifndef OS_TIME_GET_SET_EN
+#error  "OS_CFG.H, Missing OS_TIME_GET_SET_EN: Include code for OSTimeGet() and OSTimeSet()"
+#endif
+
+/*
+*********************************************************************************************************
+*                                          TIMER MANAGEMENT
+*********************************************************************************************************
+*/
+
+#ifndef OS_TMR_EN
+#error  "OS_CFG.H, Missing OS_TMR_EN: When (1) enables code generation for Timer Management"
+#elif   OS_TMR_EN > 0u
+    #if     OS_SEM_EN == 0u
+    #error  "OS_CFG.H, Semaphore management is required (set OS_SEM_EN to 1) when enabling Timer Management."
+    #error  "          Timer management require TWO semaphores."
+    #endif
+
+    #ifndef OS_TMR_CFG_MAX
+    #error  "OS_CFG.H, Missing OS_TMR_CFG_MAX: Determines the total number of timers in an application (2 .. 65500)"
+    #else
+        #if OS_TMR_CFG_MAX < 2u
+        #error  "OS_CFG.H, OS_TMR_CFG_MAX should be between 2 and 65500"
+        #endif
+
+        #if OS_TMR_CFG_MAX > 65500u
+        #error  "OS_CFG.H, OS_TMR_CFG_MAX should be between 2 and 65500"
+        #endif
+    #endif
+
+    #ifndef OS_TMR_CFG_WHEEL_SIZE
+    #error  "OS_CFG.H, Missing OS_TMR_CFG_WHEEL_SIZE: Sets the size of the timer wheel (1 .. 1023)"
+    #else
+        #if OS_TMR_CFG_WHEEL_SIZE < 2u
+        #error  "OS_CFG.H, OS_TMR_CFG_WHEEL_SIZE should be between 2 and 1024"
+        #endif
+
+        #if OS_TMR_CFG_WHEEL_SIZE > 1024u
+        #error  "OS_CFG.H, OS_TMR_CFG_WHEEL_SIZE should be between 2 and 1024"
+        #endif
+    #endif
+
+    #ifndef OS_TMR_CFG_NAME_EN
+    #error  "OS_CFG.H, Missing OS_TMR_CFG_NAME_EN: Enable Timer names"
+    #endif
+
+    #ifndef OS_TMR_CFG_TICKS_PER_SEC
+    #error  "OS_CFG.H, Missing OS_TMR_CFG_TICKS_PER_SEC: Determines the rate at which the timer management task will run (Hz)"
+    #endif
+
+    #ifndef OS_TASK_TMR_STK_SIZE
+    #error  "OS_CFG.H, Missing OS_TASK_TMR_STK_SIZE: Determines the size of the Timer Task's stack"
+    #endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            MISCELLANEOUS
+*********************************************************************************************************
+*/
+
+#ifndef OS_ARG_CHK_EN
+#error  "OS_CFG.H, Missing OS_ARG_CHK_EN: Enable (1) or Disable (0) argument checking"
+#endif
+
+
+#ifndef OS_CPU_HOOKS_EN
+#error  "OS_CFG.H, Missing OS_CPU_HOOKS_EN: uC/OS-II hooks are found in the processor port files when 1"
+#endif
+
+
+#ifndef OS_APP_HOOKS_EN
+#error  "OS_CFG.H, Missing OS_APP_HOOKS_EN: Application-defined hooks are called from the uC/OS-II hooks"
+#endif
+
+
+#ifndef OS_DEBUG_EN
+#error  "OS_CFG.H, Missing OS_DEBUG_EN: Allows you to include variables for debugging or not"
+#endif
+
+
+#ifndef OS_LOWEST_PRIO
+#error  "OS_CFG.H, Missing OS_LOWEST_PRIO: Defines the lowest priority that can be assigned"
+#endif
+
+
+#ifndef OS_MAX_EVENTS
+#error  "OS_CFG.H, Missing OS_MAX_EVENTS: Max. number of event control blocks in your application"
+#else
+    #if     OS_MAX_EVENTS > 65500u
+    #error  "OS_CFG.H, OS_MAX_EVENTS must be <= 65500"
+    #endif
+#endif
+
+
+#ifndef OS_SCHED_LOCK_EN
+#error  "OS_CFG.H, Missing OS_SCHED_LOCK_EN: Include code for OSSchedLock() and OSSchedUnlock()"
+#endif
+
+
+#ifndef OS_EVENT_MULTI_EN
+#error  "OS_CFG.H, Missing OS_EVENT_MULTI_EN: Include code for OSEventPendMulti()"
+#endif
+
+
+#ifndef OS_TASK_PROFILE_EN
+#error  "OS_CFG.H, Missing OS_TASK_PROFILE_EN: Include data structure for run-time task profiling"
+#endif
+
+
+#ifndef OS_TASK_SW_HOOK_EN
+#error  "OS_CFG.H, Missing OS_TASK_SW_HOOK_EN: Allows you to include the code for OSTaskSwHook() or not"
+#endif
+
+
+#ifndef OS_TICK_STEP_EN
+#error  "OS_CFG.H, Missing OS_TICK_STEP_EN: Allows to 'step' one tick at a time with uC/OS-View"
+#endif
+
+
+#ifndef OS_TIME_TICK_HOOK_EN
+#error  "OS_CFG.H, Missing OS_TIME_TICK_HOOK_EN: Allows you to include the code for OSTimeTickHook() or not"
+#endif
+
+/*
+*********************************************************************************************************
+*                                         SAFETY CRITICAL USE
+*********************************************************************************************************
+*/
+
+#ifdef SAFETY_CRITICAL_RELEASE
+
+#if    OS_ARG_CHK_EN < 1u
+#error "OS_CFG.H, OS_ARG_CHK_EN must be enabled for safety-critical release code"
+#endif
+
+#if    OS_APP_HOOKS_EN > 0u
+#error "OS_CFG.H, OS_APP_HOOKS_EN must be disabled for safety-critical release code"
+#endif
+
+#if    OS_DEBUG_EN > 0u
+#error "OS_CFG.H, OS_DEBUG_EN must be disabled for safety-critical release code"
+#endif
+
+#ifdef CANTATA
+#error "OS_CFG.H, CANTATA must be disabled for safety-critical release code"
+#endif
+
+#ifdef OS_SCHED_LOCK_EN
+#error "OS_CFG.H, OS_SCHED_LOCK_EN must be disabled for safety-critical release code"
+#endif
+
+#ifdef VSC_VALIDATION_MODE
+#error "OS_CFG.H, VSC_VALIDATION_MODE must be disabled for safety-critical release code"
+#endif
+
+#if    OS_TASK_STAT_EN > 0u
+#error "OS_CFG.H, OS_TASK_STAT_EN must be disabled for safety-critical release code"
+#endif
+
+#if    OS_TICK_STEP_EN > 0u
+#error "OS_CFG.H, OS_TICK_STEP_EN must be disabled for safety-critical release code"
+#endif
+
+#if    OS_FLAG_EN > 0u
+    #if    OS_FLAG_DEL_EN > 0
+    #error "OS_CFG.H, OS_FLAG_DEL_EN must be disabled for safety-critical release code"
+    #endif
+#endif
+
+#if    OS_MBOX_EN > 0u
+    #if    OS_MBOX_DEL_EN > 0u
+    #error "OS_CFG.H, OS_MBOX_DEL_EN must be disabled for safety-critical release code"
+    #endif
+#endif
+
+#if    OS_MUTEX_EN > 0u
+    #if    OS_MUTEX_DEL_EN > 0u
+    #error "OS_CFG.H, OS_MUTEX_DEL_EN must be disabled for safety-critical release code"
+    #endif
+#endif
+
+#if    OS_Q_EN > 0u
+    #if    OS_Q_DEL_EN > 0u
+    #error "OS_CFG.H, OS_Q_DEL_EN must be disabled for safety-critical release code"
+    #endif
+#endif
+
+#if    OS_SEM_EN > 0u
+    #if    OS_SEM_DEL_EN > 0u
+    #error "OS_CFG.H, OS_SEM_DEL_EN must be disabled for safety-critical release code"
+    #endif
+#endif
+
+#if    OS_TASK_DEL_EN > 0u
+#error "OS_CFG.H, OS_TASK_DEL_EN must be disabled for safety-critical release code"
+#endif
+
+#if    OS_CRITICAL_METHOD != 3u
+#error "OS_CPU.H, OS_CRITICAL_METHOD must be type 3 for safety-critical release code"
+#endif
+
+#endif  /* ------------------------ SAFETY_CRITICAL_RELEASE ------------------------ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_app_hooks.c b/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_app_hooks.c
new file mode 100644
index 0000000..c9cb311
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_app_hooks.c
@@ -0,0 +1,270 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                  APPLICATION HOOKS
+*
+* File    : OS_APP_HOOKS.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define   MICRIUM_SOURCE
+#include  
+#include  "os_app_hooks.h"
+
+
+/*
+************************************************************************************************************************
+*                                              SET ALL APPLICATION HOOKS
+*
+* Description: Set ALL application hooks.
+*
+* Arguments  : none.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  App_OS_SetAllHooks (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    OS_AppIdleTaskHookPtr   = App_OS_IdleTaskHook;
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    OS_AppRedzoneHitHookPtr = App_OS_RedzoneHitHook;
+#endif
+
+    OS_AppStatTaskHookPtr   = App_OS_StatTaskHook;
+
+    OS_AppTaskCreateHookPtr = App_OS_TaskCreateHook;
+
+    OS_AppTaskDelHookPtr    = App_OS_TaskDelHook;
+
+    OS_AppTaskReturnHookPtr = App_OS_TaskReturnHook;
+
+    OS_AppTaskSwHookPtr     = App_OS_TaskSwHook;
+
+    OS_AppTimeTickHookPtr   = App_OS_TimeTickHook;
+    CPU_CRITICAL_EXIT();
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                             CLEAR ALL APPLICATION HOOKS
+*
+* Description: Clear ALL application hooks.
+*
+* Arguments  : none.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  App_OS_ClrAllHooks (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    OS_AppIdleTaskHookPtr   = (OS_APP_HOOK_VOID)0;
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    OS_AppRedzoneHitHookPtr = (OS_APP_HOOK_TCB)0;
+#endif
+
+    OS_AppStatTaskHookPtr   = (OS_APP_HOOK_VOID)0;
+
+    OS_AppTaskCreateHookPtr = (OS_APP_HOOK_TCB)0;
+
+    OS_AppTaskDelHookPtr    = (OS_APP_HOOK_TCB)0;
+
+    OS_AppTaskReturnHookPtr = (OS_APP_HOOK_TCB)0;
+
+    OS_AppTaskSwHookPtr     = (OS_APP_HOOK_VOID)0;
+
+    OS_AppTimeTickHookPtr   = (OS_APP_HOOK_VOID)0;
+    CPU_CRITICAL_EXIT();
+#endif
+}
+
+/*
+************************************************************************************************************************
+*                                              APPLICATION IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do such things as
+*              STOP the CPU to conserve power.
+*
+* Arguments  : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  App_OS_IdleTaskHook (void)
+{
+
+}
+
+/*
+************************************************************************************************************************
+*                                             APPLICATION REDZONE HIT HOOK
+*
+* Description: This function is called when a task's stack overflowed.
+*
+* Arguments  : p_tcb   is a pointer to the task control block of the offending task. NULL if ISR.
+*
+* Note(s)    : None.
+************************************************************************************************************************
+*/
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+void  App_OS_RedzoneHitHook (OS_TCB  *p_tcb)
+{
+    (void)&p_tcb;
+    CPU_SW_EXCEPTION(;);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                           APPLICATION STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-III's statistics task.  This allows your application to add
+*              functionality to the statistics task.
+*
+* Arguments  : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  App_OS_StatTaskHook (void)
+{
+
+}
+
+
+/*
+************************************************************************************************************************
+*                                            APPLICATION TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : p_tcb   is a pointer to the task control block of the task being created.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  App_OS_TaskCreateHook (OS_TCB  *p_tcb)
+{
+    (void)&p_tcb;
+}
+
+
+/*
+************************************************************************************************************************
+*                                            APPLICATION TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : p_tcb   is a pointer to the task control block of the task being deleted.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  App_OS_TaskDelHook (OS_TCB  *p_tcb)
+{
+    (void)&p_tcb;
+}
+
+
+/*
+************************************************************************************************************************
+*                                             APPLICATION TASK RETURN HOOK
+*
+* Description: This function is called if a task accidentally returns.  In other words, a task should either be an
+*              infinite loop or delete itself when done.
+*
+* Arguments  : p_tcb     is a pointer to the OS_TCB of the task that is returning.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  App_OS_TaskReturnHook (OS_TCB  *p_tcb)
+{
+    (void)&p_tcb;
+}
+
+
+/*
+************************************************************************************************************************
+*                                             APPLICATION TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other operations
+*              during a context switch.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdyPtr' points to the TCB of the task that will be
+*                 'switched in' (i.e. the highest priority task) and, 'OSTCBCurPtr' points to the task being switched out
+*                 (i.e. the preempted task).
+************************************************************************************************************************
+*/
+
+void  App_OS_TaskSwHook (void)
+{
+
+}
+
+
+/*
+************************************************************************************************************************
+*                                                APPLICATION TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) This function is assumed to be called from the Tick ISR.
+************************************************************************************************************************
+*/
+
+void  App_OS_TimeTickHook (void)
+{
+
+}
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_app_hooks.h b/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_app_hooks.h
new file mode 100644
index 0000000..8e6b6dd
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_app_hooks.h
@@ -0,0 +1,82 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                  APPLICATION HOOKS
+*
+* File    : OS_APP_HOOKS.H
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#ifndef  OS_APP_HOOKS_H
+#define  OS_APP_HOOKS_H
+
+
+#ifdef   OS_APP_HOOKS_H_GLOBALS
+#define  OS_APP_HOOKS_H_EXT
+#else
+#define  OS_APP_HOOKS_H_EXT  extern
+#endif
+
+/*
+************************************************************************************************************************
+*                                                 INCLUDE HEADER FILES
+************************************************************************************************************************
+*/
+
+#include 
+
+/*
+************************************************************************************************************************
+*                                                 FUNCTION PROTOTYPES
+************************************************************************************************************************
+*/
+
+void  App_OS_SetAllHooks   (void);
+void  App_OS_ClrAllHooks   (void);
+
+
+                                                                /* ---------------------- HOOKS --------------------- */
+void  App_OS_IdleTaskHook  (void);
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+void  App_OS_RedzoneHitHook(OS_TCB  *p_tcb);
+#endif
+
+void  App_OS_StatTaskHook  (void);
+
+void  App_OS_TaskCreateHook(OS_TCB  *p_tcb);
+
+void  App_OS_TaskDelHook   (OS_TCB  *p_tcb);
+
+void  App_OS_TaskReturnHook(OS_TCB  *p_tcb);
+
+void  App_OS_TaskSwHook    (void);
+
+void  App_OS_TimeTickHook  (void);
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_cfg.h b/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_cfg.h
new file mode 100644
index 0000000..b13a847
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_cfg.h
@@ -0,0 +1,125 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                  CONFIGURATION FILE
+*
+* File    : OS_CFG.H
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_H
+#define OS_CFG_H
+
+                                                           /* --------------------------- MISCELLANEOUS --------------------------- */
+#define OS_CFG_APP_HOOKS_EN             DEF_DISABLED       /* Enable (DEF_ENABLED) application specific hooks                       */
+#define OS_CFG_ARG_CHK_EN               DEF_ENABLED        /* Enable (DEF_ENABLED) argument checking                                */
+#define OS_CFG_CALLED_FROM_ISR_CHK_EN   DEF_ENABLED        /* Enable (DEF_ENABLED) check for called from ISR                        */
+#define OS_CFG_DBG_EN                   DEF_ENABLED        /* Enable (DEF_ENABLED) debug code/variables                             */
+#define OS_CFG_DYN_TICK_EN              DEF_DISABLED       /* Enable (DEF_ENABLED) the Dynamic Tick                                 */
+#define OS_CFG_INVALID_OS_CALLS_CHK_EN  DEF_DISABLED       /* Enable (DEF_ENABLED) checks for invalid kernel calls                  */
+#define OS_CFG_ISR_POST_DEFERRED_EN     DEF_DISABLED       /* DEPRECATED Feature: Enable (DEF_ENABLED) deferred ISR posts           */
+#define OS_CFG_OBJ_TYPE_CHK_EN          DEF_DISABLED       /* Enable (DEF_ENABLED) object type checking                             */
+#define OS_CFG_TS_EN                    DEF_DISABLED       /* Enable (DEF_ENABLED) time stamping                                    */
+
+#define OS_CFG_PEND_MULTI_EN            DEF_DISABLED       /* DEPRECATED Feature: Enable (DEF_ENABLED) multi-pend feature           */
+
+#define OS_CFG_PRIO_MAX                 32u                /* Defines the maximum number of task priorities (see OS_PRIO data type) */
+
+#define OS_CFG_SCHED_LOCK_TIME_MEAS_EN  DEF_DISABLED       /* Include (DEF_ENABLED) code to measure scheduler lock time             */
+#define OS_CFG_SCHED_ROUND_ROBIN_EN     DEF_DISABLED       /* Include (DEF_ENABLED) code for Round-Robin scheduling                 */
+
+#define OS_CFG_STK_SIZE_MIN             64u                /* Minimum allowable task stack size                                     */
+
+
+                                                           /* --------------------------- EVENT FLAGS ----------------------------- */
+#define OS_CFG_FLAG_EN                  DEF_ENABLED        /* Enable (DEF_ENABLED) code generation for EVENT FLAGS                  */
+#define OS_CFG_FLAG_DEL_EN              DEF_DISABLED       /*     Include (DEF_ENABLED) code for OSFlagDel()                        */
+#define OS_CFG_FLAG_MODE_CLR_EN         DEF_DISABLED       /*     Include (DEF_ENABLED) code for Wait on Clear EVENT FLAGS          */
+#define OS_CFG_FLAG_PEND_ABORT_EN       DEF_DISABLED       /*     Include (DEF_ENABLED) code for OSFlagPendAbort()                  */
+
+
+                                                           /* ------------------------ MEMORY MANAGEMENT -------------------------  */
+#define OS_CFG_MEM_EN                   DEF_ENABLED        /* Enable (DEF_ENABLED) code generation for the MEMORY MANAGER           */
+
+
+                                                           /* ------------------- MUTUAL EXCLUSION SEMAPHORES --------------------  */
+#define OS_CFG_MUTEX_EN                 DEF_ENABLED        /* Enable (DEF_ENABLED) code generation for MUTEX                        */
+#define OS_CFG_MUTEX_DEL_EN             DEF_DISABLED       /*     Include (DEF_ENABLED) code for OSMutexDel()                       */
+#define OS_CFG_MUTEX_PEND_ABORT_EN      DEF_DISABLED       /*     Include (DEF_ENABLED) code for OSMutexPendAbort()                 */
+
+
+                                                           /* -------------------------- MESSAGE QUEUES --------------------------  */
+#define OS_CFG_Q_EN                     DEF_ENABLED        /* Enable (DEF_ENABLED) code generation for QUEUES                       */
+#define OS_CFG_Q_DEL_EN                 DEF_DISABLED       /*     Include (DEF_ENABLED) code for OSQDel()                           */
+#define OS_CFG_Q_FLUSH_EN               DEF_DISABLED       /*     Include (DEF_ENABLED) code for OSQFlush()                         */
+#define OS_CFG_Q_PEND_ABORT_EN          DEF_ENABLED        /*     Include (DEF_ENABLED) code for OSQPendAbort()                     */
+
+
+                                                           /* ---------------------------- SEMAPHORES ----------------------------- */
+#define OS_CFG_SEM_EN                   DEF_ENABLED        /* Enable (DEF_ENABLED) code generation for SEMAPHORES                   */
+#define OS_CFG_SEM_DEL_EN               DEF_DISABLED       /*     Include (DEF_ENABLED) code for OSSemDel()                         */
+#define OS_CFG_SEM_PEND_ABORT_EN        DEF_ENABLED        /*     Include (DEF_ENABLED) code for OSSemPendAbort()                   */
+#define OS_CFG_SEM_SET_EN               DEF_ENABLED        /*     Include (DEF_ENABLED) code for OSSemSet()                         */
+
+
+                                                           /* ----------------------------- MONITORS ------------------------------ */
+#define OS_CFG_MON_EN                   DEF_ENABLED        /* Enable (DEF_ENABLED) code generation for MONITORS                     */
+#define OS_CFG_MON_DEL_EN               DEF_DISABLED       /*     Include (DEF_ENABLED) code for OSMonDel()                         */
+
+                                                           /* -------------------------- TASK MANAGEMENT -------------------------- */
+#define OS_CFG_STAT_TASK_EN             DEF_ENABLED        /* Enable (DEF_ENABLED) the statistics task                              */
+#define OS_CFG_STAT_TASK_STK_CHK_EN     DEF_ENABLED        /*     Check task stacks (DEF_ENABLED) from the statistic task           */
+
+#define OS_CFG_TASK_CHANGE_PRIO_EN      DEF_ENABLED        /* Include (DEF_ENABLED) code for OSTaskChangePrio()                     */
+#define OS_CFG_TASK_DEL_EN              DEF_DISABLED       /* Include (DEF_ENABLED) code for OSTaskDel()                            */
+#define OS_CFG_TASK_IDLE_EN             DEF_ENABLED        /* Include (DEF_ENABLED) the idle task                                   */
+#define OS_CFG_TASK_PROFILE_EN          DEF_ENABLED        /* Include (DEF_ENABLED) variables in OS_TCB for profiling               */
+#define OS_CFG_TASK_Q_EN                DEF_ENABLED        /* Include (DEF_ENABLED) code for OSTaskQXXXX()                          */
+#define OS_CFG_TASK_Q_PEND_ABORT_EN     DEF_DISABLED       /* Include (DEF_ENABLED) code for OSTaskQPendAbort()                     */
+#define OS_CFG_TASK_REG_TBL_SIZE        1u                 /* Number of task specific registers                                     */
+#define OS_CFG_TASK_STK_REDZONE_EN      DEF_DISABLED       /* Enable (DEF_ENABLED) stack redzone                                    */
+#define OS_CFG_TASK_STK_REDZONE_DEPTH   8u                 /*     Depth of the stack redzone                                        */
+#define OS_CFG_TASK_SEM_PEND_ABORT_EN   DEF_ENABLED        /* Include (DEF_ENABLED) code for OSTaskSemPendAbort()                   */
+#define OS_CFG_TASK_SUSPEND_EN          DEF_ENABLED        /* Include (DEF_ENABLED) code for OSTaskSuspend() and OSTaskResume()     */
+#define OS_CFG_TASK_TICK_EN             DEF_ENABLED        /* Include (DEF_ENABLED) the kernel tick task                            */
+
+                                                           /* ------------------ TASK LOCAL STORAGE MANAGEMENT -------------------  */
+#define OS_CFG_TLS_TBL_SIZE             0u                 /* Include (DEF_ENABLED) code for Task Local Storage (TLS) registers     */
+
+                                                           /* ------------------------- TIME MANAGEMENT --------------------------  */
+#define OS_CFG_TIME_DLY_HMSM_EN         DEF_ENABLED        /* Include (DEF_ENABLED) code for OSTimeDlyHMSM()                        */
+#define OS_CFG_TIME_DLY_RESUME_EN       DEF_DISABLED       /* Include (DEF_ENABLED) code for OSTimeDlyResume()                      */
+
+                                                           /* ------------------------- TIMER MANAGEMENT -------------------------- */
+#define OS_CFG_TMR_EN                   DEF_ENABLED        /* Enable (DEF_ENABLED) code generation for TIMERS                       */
+#define OS_CFG_TMR_DEL_EN               DEF_DISABLED       /* Enable (DEF_ENABLED) code generation for OSTmrDel()                   */
+
+                                                           /* uC/TRACE                                                              */
+#define TRACE_CFG_EN                    DEF_DISABLED       /* Enable (DEF_ENABLED) uC/Trace instrumentation                         */
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_cfg_app.h b/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_cfg_app.h
new file mode 100644
index 0000000..e720af0
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Cfg/Template/os_cfg_app.h
@@ -0,0 +1,77 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                       OS CONFIGURATION (APPLICATION SPECIFICS)
+*
+* File    : OS_CFG_APP.H
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_APP_H
+#define OS_CFG_APP_H
+
+/*
+************************************************************************************************************************
+*                                                      CONSTANTS
+************************************************************************************************************************
+*/
+                                                                /* ------------------ MISCELLANEOUS ------------------- */
+#define  OS_CFG_ISR_STK_SIZE                         100u       /* Stack size of ISR stack (number of CPU_STK elements) */
+
+#define  OS_CFG_MSG_POOL_SIZE                         32u       /* Maximum number of messages                           */
+
+#define  OS_CFG_TASK_STK_LIMIT_PCT_EMPTY              10u       /* Stack limit position in percentage to empty          */
+
+
+                                                                /* -------------------- IDLE TASK --------------------- */
+#define  OS_CFG_IDLE_TASK_STK_SIZE                    64u       /* Stack size (number of CPU_STK elements)              */
+
+
+                                                                /* ----------------- ISR HANDLER TASK ----------------- */
+#define  OS_CFG_INT_Q_SIZE                            10u       /* Size of ISR handler task queue                       */
+#define  OS_CFG_INT_Q_TASK_STK_SIZE                  100u       /* Stack size (number of CPU_STK elements)              */
+
+
+                                                                /* ------------------ STATISTIC TASK ------------------ */
+#define  OS_CFG_STAT_TASK_PRIO       (OS_CFG_PRIO_MAX-2u)       /* Priority                                             */
+#define  OS_CFG_STAT_TASK_RATE_HZ                     10u       /* Rate of execution (1 to 10 Hz)                       */
+#define  OS_CFG_STAT_TASK_STK_SIZE                   100u       /* Stack size (number of CPU_STK elements)              */
+
+
+                                                                /* ---------------------- TICKS ----------------------- */
+#define  OS_CFG_TICK_RATE_HZ                        1000u       /* Tick rate in Hertz (10 to 1000 Hz)                   */
+#define  OS_CFG_TICK_TASK_PRIO                        10u       /* Priority                                             */
+#define  OS_CFG_TICK_TASK_STK_SIZE                   100u       /* Stack size (number of CPU_STK elements)              */
+
+
+                                                                /* --------------------- TIMERS ----------------------- */
+#define  OS_CFG_TMR_TASK_PRIO        (OS_CFG_PRIO_MAX-3u)       /* Priority of 'Timer Task'                             */
+#define  OS_CFG_TMR_TASK_RATE_HZ                      10u       /* Rate for timers (10 Hz Typ.)                         */
+#define  OS_CFG_TMR_TASK_STK_SIZE                    100u       /* Stack size (number of CPU_STK elements)              */
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu.h b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu.h
new file mode 100644
index 0000000..f774150
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu.h
@@ -0,0 +1,159 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-III
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                      Generic ARM Cortex-A Port
+*
+* File      : OS_CPU.H
+* Version   : V3.05.01
+* By        : JJL
+*             FT
+*             JBL
+*
+* LICENSING TERMS:
+* ---------------
+*             uC/OS-III is provided in source form to registered licensees ONLY.  It is
+*             illegal to distribute this source code to any third party unless you receive
+*             written permission by an authorized Micrium representative.  Knowledge of
+*             the source code may NOT be used to develop a similar product.
+*
+*             Please help us continue to provide the Embedded community with the finest
+*             software available.  Your honesty is greatly appreciated.
+*
+*             You can find our product's user manual, API reference, release notes and
+*             more information at https://doc.micrium.com.
+*             You can contact us at www.micrium.com.
+*
+* For       : ARM Cortex-A
+* Mode      : ARM or Thumb
+* Toolchain : GNU
+*
+* Note(s) : (1) This port supports the entire 32-bit ARM Cortex-A line from the A5 to the A15
+*               with every possible VFP/NEON coprocessor options.
+*
+*           (2) To support the various FPUs three versions of os_cpu_a.asm are provided.
+*               Only one of them must be used at a time as outlined below.
+*
+*               os_cpu_a_vfp-none.s
+*                 Suitable when there is no VFP/NEON support or they are deactivated.
+*                 Can also be used when saving the VFP/NEON register bank isn’t required.
+*
+*               os_cpu_a_vfp-d32.s
+*                 Suitable for cpus implementing the NEON Media Processing Engine with
+*                 32 double word registers.
+*
+*               os_cpu_a_vfp-d16.s
+*                 Suitable for cpus with VFP-only support and 16 double word registers.
+*                 Must also be used when the CPACR.D32DIS bit is set and access to registers
+*                 D16-D31 would cause an exception.
+*********************************************************************************************************
+*/
+
+#ifndef  OS_CPU_H
+#define  OS_CPU_H
+
+#ifdef   OS_CPU_GLOBALS
+#define  OS_CPU_EXT
+#else
+#define  OS_CPU_EXT  extern
+#endif
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          EXCEPTION DEFINES
+*********************************************************************************************************
+*/
+
+                                                            /* ARM exception IDs                                      */
+#define  OS_CPU_ARM_EXCEPT_RESET                      0x00u
+#define  OS_CPU_ARM_EXCEPT_UNDEF_INSTR                0x01u
+#define  OS_CPU_ARM_EXCEPT_SWI                        0x02u
+#define  OS_CPU_ARM_EXCEPT_PREFETCH_ABORT             0x03u
+#define  OS_CPU_ARM_EXCEPT_DATA_ABORT                 0x04u
+#define  OS_CPU_ARM_EXCEPT_ADDR_ABORT                 0x05u
+#define  OS_CPU_ARM_EXCEPT_IRQ                        0x06u
+#define  OS_CPU_ARM_EXCEPT_FIQ                        0x07u
+#define  OS_CPU_ARM_EXCEPT_NBR                        0x08u
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+#define  OS_TASK_SW()               OSCtxSw()
+
+/*
+*********************************************************************************************************
+*                                       TIMESTAMP CONFIGURATION
+*
+* Note(s) : (1) OS_TS_GET() is generally defined as CPU_TS_Get32() to allow CPU timestamp timer to be of
+*               any data type size.
+*
+*           (2) For architectures that provide 32-bit or higher precision free running counters 
+*               (i.e. cycle count registers):
+*
+*               (a) OS_TS_GET() may be defined as CPU_TS_TmrRd() to improve performance when retrieving
+*                   the timestamp.
+*
+*               (b) CPU_TS_TmrRd() MUST be configured to be greater or equal to 32-bits to avoid
+*                   truncation of TS.
+*********************************************************************************************************
+*/
+
+#if      OS_CFG_TS_EN == 1u
+#define  OS_TS_GET()               (CPU_TS)CPU_TS_TmrRd()   /* See Note #2a.                                          */
+#else
+#define  OS_TS_GET()               (CPU_TS)0u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+OS_CPU_EXT  CPU_STK     *OS_CPU_ExceptStkBase;                  /* Exception stack base                                 */
+OS_CPU_EXT  CPU_INT32U   OS_CPU_ARM_DRegCnt;                    /* VFP/NEON register count                              */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        OSCtxSw                             (void);
+void        OSIntCtxSw                          (void);
+void        OSStartHighRdy                      (void);
+
+void        OS_CPU_ARM_ExceptUndefInstrHndlr    (void);
+void        OS_CPU_ARM_ExceptSwiHndlr           (void);
+void        OS_CPU_ARM_ExceptPrefetchAbortHndlr (void);
+void        OS_CPU_ARM_ExceptDataAbortHndlr     (void);
+
+void        OS_CPU_ARM_ExceptIrqHndlr           (void);
+void        OS_CPU_ARM_ExceptFiqHndlr           (void);
+
+void        OS_CPU_ExceptHndlr                  (CPU_INT32U  src_id);
+
+CPU_INT32U  OS_CPU_ARM_DRegCntGet               (void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d16.S b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d16.S
new file mode 100644
index 0000000..74985f4
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d16.S
@@ -0,0 +1,567 @@
+@
+@********************************************************************************************************
+@                                               uC/OS-III
+@                                          The Real-Time Kernel
+@
+@
+@                           (c) Copyright 2009-2015 Micrium, Inc. Weston, FL
+@                    All rights reserved.  Protected by international copyright laws.
+@
+@                                      Generic ARM Cortex-A Port
+@
+@ File      : OS_CPU_A_VFP-D16.S
+@ Version   : V3.05.01
+@ By        : NB
+@             JPB
+@             JBL
+@
+@ For       : ARM Cortex-A
+@ Mode      : ARM or Thumb
+@ Toolchain : GNU
+@
+@ Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+@********************************************************************************************************
+@
+
+@********************************************************************************************************
+@                                            FUNCTIONS
+@********************************************************************************************************
+                                                                @ .external references.
+    .extern  OSRunning
+    .extern  OSPrioCur
+    .extern  OSPrioHighRdy
+    .extern  OSTCBCurPtr
+    .extern  OSTCBHighRdyPtr
+    .extern  OSIntNestingCtr
+    .extern  OSIntExit
+    .extern  OSTaskSwHook
+    .extern  OS_CPU_ExceptHndlr                                 @ Chip Support/BSP specific exception handler.
+
+    .extern  OS_CPU_ExceptStkBase
+
+                                                                @ Functions declared in this file.
+    .global  OSStartHighRdy
+    .global  OSCtxSw
+    .global  OSIntCtxSw
+
+                                                                @ Functions related to exception handling.
+    .global  OS_CPU_ARM_ExceptUndefInstrHndlr
+    .global  OS_CPU_ARM_ExceptSwiHndlr
+    .global  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    .global  OS_CPU_ARM_ExceptDataAbortHndlr
+    .global  OS_CPU_ARM_ExceptIrqHndlr
+    .global  OS_CPU_ARM_ExceptFiqHndlr
+
+    .global  OS_CPU_ARM_DRegCntGet
+
+
+@********************************************************************************************************
+@                                               EQUATES
+@********************************************************************************************************
+
+    .equ     OS_CPU_ARM_CONTROL_INT_DIS,        0xC0                    @ Disable both FIQ and IRQ.
+    .equ     OS_CPU_ARM_CONTROL_FIQ_DIS,        0x40                    @ Disable FIQ.
+    .equ     OS_CPU_ARM_CONTROL_IRQ_DIS,        0x80                    @ Disable IRQ.
+    .equ     OS_CPU_ARM_CONTROL_THUMB,          0x20                    @ Set THUMB mode.
+    .equ     OS_CPU_ARM_CONTROL_ARM,            0x00                    @ Set ARM mode.
+
+    .equ     OS_CPU_ARM_MODE_MASK,              0x1F
+    .equ     OS_CPU_ARM_MODE_USR,               0x10
+    .equ     OS_CPU_ARM_MODE_FIQ,               0x11
+    .equ     OS_CPU_ARM_MODE_IRQ,               0x12
+    .equ     OS_CPU_ARM_MODE_SVC,               0x13
+    .equ     OS_CPU_ARM_MODE_ABT,               0x17
+    .equ     OS_CPU_ARM_MODE_UND,               0x1B
+    .equ     OS_CPU_ARM_MODE_SYS,               0x1F
+
+    .equ     OS_CPU_ARM_EXCEPT_RESET,           0x00
+    .equ     OS_CPU_ARM_EXCEPT_UNDEF_INSTR,     0x01
+    .equ     OS_CPU_ARM_EXCEPT_SWI,             0x02
+    .equ     OS_CPU_ARM_EXCEPT_PREFETCH_ABORT,  0x03
+    .equ     OS_CPU_ARM_EXCEPT_DATA_ABORT,      0x04
+    .equ     OS_CPU_ARM_EXCEPT_ADDR_ABORT,      0x05
+    .equ     OS_CPU_ARM_EXCEPT_IRQ,             0x06
+    .equ     OS_CPU_ARM_EXCEPT_FIQ,             0x07
+
+    .equ     OS_CPU_ARM_FPEXC_EN,               0x40000000               @VFP enable bit.
+
+
+@********************************************************************************************************
+@                                     CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+    .code 32
+
+
+@********************************************************************************************************
+@                                 FLOATING POINT REGISTER MACROS
+@********************************************************************************************************
+
+    .macro  OS_CPU_ARM_FP_REG_POP     rx
+            POP     {\rx}
+            VMSR    FPEXC, \rx                                  @    ... Pop new task's FPEXC
+            FLDMIAD SP!, {D0-D15}                               @    ... Pop new task's General-Purpose floating point registers.
+            POP     {\rx}
+            VMSR    FPSCR, \rx                                  @    ... Pop new task's FPSCR.
+    .endm
+
+    .macro  OS_CPU_ARM_FP_REG_PUSH    rx
+            VMRS    \rx, FPSCR                                  @     ... Save current FPSCR
+            PUSH    {\rx}                                       @     ... Save general-purpose floating-point registers.
+            FSTMDBD SP!, {D0-D15}
+            VMRS    \rx, FPEXC                                  @     ... Save Floating point exception register.
+            PUSH    {\rx}
+    .endm
+
+
+@********************************************************************************************************
+@                                         START MULTITASKING
+@                                      void OSStartHighRdy(void)
+@
+@ Note(s) : 1) OSStartHighRdy() MUST:
+@              a) Call OSTaskSwHook() then,
+@              b) Set OSRunning to OS_STATE_OS_RUNNING,
+@              c) Switch to the highest priority task.
+@********************************************************************************************************
+
+    .type   OSStartHighRdy, %function
+OSStartHighRdy:
+                                                                @ Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+                                                                @ SWITCH TO HIGHEST PRIORITY TASK:
+    MOVW    R0, #:lower16:OSTCBHighRdyPtr                       @    Get highest priority task TCB address,
+    MOVT    R0, #:upper16:OSTCBHighRdyPtr
+    LDR     R0, [R0]                                            @    Get stack pointer,
+    LDR     SP, [R0]                                            @    Switch to the new stack,
+
+    OS_CPU_ARM_FP_REG_POP R0
+
+    LDR     R0, [SP], #4                                        @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+@
+@ Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) Save the current task's context onto the current task's stack,
+@              b) OSTCBCurPtr->StkPtr = SP;
+@              c) OSTaskSwHook();
+@              d) OSPrioCur           = OSPrioHighRdy;
+@              e) OSTCBCurPtr         = OSTCBHighRdyPtr;
+@              f) SP                  = OSTCBHighRdyPtr->StkPtr;
+@              g) Restore the new task's context from the new task's stack,
+@              h) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSCtxSw, %function
+OSCtxSw:
+                                                                @ SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           @     Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       @     Push registers,
+    MRS     R0, CPSR                                            @     Push current CPSR,
+    TST     LR, #1                                              @     See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   @     If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    OS_CPU_ARM_FP_REG_PUSH  R0
+
+    CLREX                                                       @ Clear exclusive monitor.
+
+    MOVW    R0, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr->StkPtr = SP;
+    MOVT    R0, #:upper16:OSTCBCurPtr
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur   = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOVT    R0, #:upper16:OSTCBCurPtr
+    MOVW    R1, #:lower16:OSTCBHighRdyPtr
+    MOVT    R1, #:upper16:OSTCBHighRdyPtr
+
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+@
+@ Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) OSTaskSwHook();
+@              b) OSPrioCur   = OSPrioHighRdy;
+@              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+@              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+@              e) Restore the new task's context from the new task's stack,
+@              f) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSIntCtxSw, %function
+OSIntCtxSw:
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOVT    R0, #:upper16:OSTCBCurPtr
+    MOVW    R1, #:lower16:OSTCBHighRdyPtr
+    MOVT    R1, #:upper16:OSTCBHighRdyPtr
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  @ Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          @ Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                  PREFETCH ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               @ Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                    DATA ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                   ADDRESS ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                 INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                      GLOBAL EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1     Exception's SPSR
+@                  R2     Return PC
+@                  R3     Exception's SP
+@
+@ Note(s)       : 1) An exception can occur in three different circumstances; in each of these, the
+@                    SVC stack pointer will point to a different entity :
+@
+@                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+@                       SVC STACK: Should point to a stack initialized by the application's startup code.
+@                       STK USAGE: Interrupted context -- SVC stack.
+@                                  Exception           -- SVC stack.
+@                                  Nested exceptions   -- SVC stack.
+@
+@                    b) CONDITION: An exception interrupts a task.
+@                       SVC STACK: Should point to task stack.
+@                       STK USAGE: Interrupted context -- Task stack.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@
+@                    c) CONDITION: An exception interrupts another exception.
+@                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+@                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr:
+    MRS     R1, SPSR                                            @ Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              @ Save exception's stack pointer.
+
+                                                                @ Adjust exception stack pointer.  This is needed because
+                                                                @ exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           @   Push task's PC,
+    STMFD   SP!, {LR}                                           @   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       @   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        @   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           @   Push task's CPSR (i.e. exception SPSR).
+
+    OS_CPU_ARM_FP_REG_PUSH   R1
+
+    MOVW    R3, #:lower16:OSRunning                             @ if (OSRunning == 1)
+    MOVT    R3, #:upper16:OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNestingCtr                       @   OSIntNestingCtr++;
+    MOVT    R3, #:upper16:OSIntNestingCtr
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              @ if (OSIntNestingCtr == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+@********************************************************************************************************
+@                                 EXCEPTION HANDLER: TASK INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask:
+    MOVW    R3, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr->StkPtr = SP;
+    MOVT    R3, #:upper16:OSTCBCurPtr
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+
+    MOVW    R3, #:lower16:OS_CPU_ExceptStkBase                  @ Switch to exception stack.
+    MOVT    R3, #:upper16:OS_CPU_ExceptStkBase
+    LDR     SP, [R3]
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ Call OSIntExit().  This call MAY never return if a ready
+                                                                @ task with higher priority than the interrupted one is
+                                                                @ found.
+    BL      OSIntExit
+
+    MOVW    R3, #:lower16:OSTCBCurPtr                           @ SP = OSTCBCurPtr->StkPtr;
+    MOVT    R3, #:upper16:OSTCBCurPtr
+    LDR     R4, [R3]
+    LDR     SP, [R4]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNestingCtr                       @   OSIntNestingCtr--;
+    MOVT    R3, #:upper16:OSIntNestingCtr
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@                              VFP/NEON REGISTER COUNT
+@
+@ Register Usage:  R0     Double Register Count
+@********************************************************************************************************
+
+    .type   OS_CPU_ARM_DRegCntGet, %function
+OS_CPU_ARM_DRegCntGet:
+    MOV     R0, #16
+    BX      LR
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d32.S b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d32.S
new file mode 100644
index 0000000..efe7a6b
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-d32.S
@@ -0,0 +1,569 @@
+@
+@********************************************************************************************************
+@                                               uC/OS-III
+@                                          The Real-Time Kernel
+@
+@
+@                           (c) Copyright 2009-2015 Micrium, Inc. Weston, FL
+@                    All rights reserved.  Protected by international copyright laws.
+@
+@                                      Generic ARM Cortex-A Port
+@
+@ File      : OS_CPU_A_VFP-D32.S
+@ Version   : V3.05.01
+@ By        : NB
+@             JPB
+@             JBL
+@
+@ For       : ARM Cortex-A
+@ Mode      : ARM or Thumb
+@ Toolchain : GNU
+@
+@ Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+@********************************************************************************************************
+@
+
+@********************************************************************************************************
+@                                            FUNCTIONS
+@********************************************************************************************************
+                                                                @ .external references.
+    .extern  OSRunning
+    .extern  OSPrioCur
+    .extern  OSPrioHighRdy
+    .extern  OSTCBCurPtr
+    .extern  OSTCBHighRdyPtr
+    .extern  OSIntNestingCtr
+    .extern  OSIntExit
+    .extern  OSTaskSwHook
+    .extern  OS_CPU_ExceptHndlr                                 @ Chip Support/BSP specific exception handler.
+
+    .extern  OS_CPU_ExceptStkBase
+
+                                                                @ Functions declared in this file.
+    .global  OSStartHighRdy
+    .global  OSCtxSw
+    .global  OSIntCtxSw
+
+                                                                @ Functions related to exception handling.
+    .global  OS_CPU_ARM_ExceptUndefInstrHndlr
+    .global  OS_CPU_ARM_ExceptSwiHndlr
+    .global  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    .global  OS_CPU_ARM_ExceptDataAbortHndlr
+    .global  OS_CPU_ARM_ExceptIrqHndlr
+    .global  OS_CPU_ARM_ExceptFiqHndlr
+
+    .global  OS_CPU_ARM_DRegCntGet
+
+
+@********************************************************************************************************
+@                                               EQUATES
+@********************************************************************************************************
+
+    .equ     OS_CPU_ARM_CONTROL_INT_DIS,        0xC0                    @ Disable both FIQ and IRQ.
+    .equ     OS_CPU_ARM_CONTROL_FIQ_DIS,        0x40                    @ Disable FIQ.
+    .equ     OS_CPU_ARM_CONTROL_IRQ_DIS,        0x80                    @ Disable IRQ.
+    .equ     OS_CPU_ARM_CONTROL_THUMB,          0x20                    @ Set THUMB mode.
+    .equ     OS_CPU_ARM_CONTROL_ARM,            0x00                    @ Set ARM mode.
+
+    .equ     OS_CPU_ARM_MODE_MASK,              0x1F
+    .equ     OS_CPU_ARM_MODE_USR,               0x10
+    .equ     OS_CPU_ARM_MODE_FIQ,               0x11
+    .equ     OS_CPU_ARM_MODE_IRQ,               0x12
+    .equ     OS_CPU_ARM_MODE_SVC,               0x13
+    .equ     OS_CPU_ARM_MODE_ABT,               0x17
+    .equ     OS_CPU_ARM_MODE_UND,               0x1B
+    .equ     OS_CPU_ARM_MODE_SYS,               0x1F
+
+    .equ     OS_CPU_ARM_EXCEPT_RESET,           0x00
+    .equ     OS_CPU_ARM_EXCEPT_UNDEF_INSTR,     0x01
+    .equ     OS_CPU_ARM_EXCEPT_SWI,             0x02
+    .equ     OS_CPU_ARM_EXCEPT_PREFETCH_ABORT,  0x03
+    .equ     OS_CPU_ARM_EXCEPT_DATA_ABORT,      0x04
+    .equ     OS_CPU_ARM_EXCEPT_ADDR_ABORT,      0x05
+    .equ     OS_CPU_ARM_EXCEPT_IRQ,             0x06
+    .equ     OS_CPU_ARM_EXCEPT_FIQ,             0x07
+
+    .equ     OS_CPU_ARM_FPEXC_EN,               0x40000000               @VFP enable bit.
+
+
+@********************************************************************************************************
+@                                     CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+    .code 32
+
+
+@********************************************************************************************************
+@                                 FLOATING POINT REGISTER MACROS
+@********************************************************************************************************
+
+    .macro  OS_CPU_ARM_FP_REG_POP     rx
+            POP     {\rx}
+            VMSR    FPEXC, \rx                                  @    ... Pop new task's FPEXC
+            FLDMIAD SP!, {D16-D31}
+            FLDMIAD SP!, {D0-D15}                               @    ... Pop new task's General-Purpose floating point registers.
+            POP     {\rx}
+            VMSR    FPSCR, \rx                                  @    ... Pop new task's FPSCR.
+    .endm
+
+    .macro  OS_CPU_ARM_FP_REG_PUSH    rx
+            VMRS    \rx, FPSCR                                  @     ... Save current FPSCR
+            PUSH    {\rx}                                       @     ... Save general-purpose floating-point registers.
+            FSTMDBD SP!, {D0-D15}
+            FSTMDBD SP!, {D16-D31}
+            VMRS    \rx, FPEXC                                  @     ... Save Floating point exception register.
+            PUSH    {\rx}
+    .endm
+
+
+@********************************************************************************************************
+@                                         START MULTITASKING
+@                                      void OSStartHighRdy(void)
+@
+@ Note(s) : 1) OSStartHighRdy() MUST:
+@              a) Call OSTaskSwHook() then,
+@              b) Set OSRunning to OS_STATE_OS_RUNNING,
+@              c) Switch to the highest priority task.
+@********************************************************************************************************
+
+    .type   OSStartHighRdy, %function
+OSStartHighRdy:
+                                                                @ Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+                                                                @ SWITCH TO HIGHEST PRIORITY TASK:
+    MOVW    R0, #:lower16:OSTCBHighRdyPtr                       @    Get highest priority task TCB address,
+    MOVT    R0, #:upper16:OSTCBHighRdyPtr
+    LDR     R0, [R0]                                            @    Get stack pointer,
+    LDR     SP, [R0]                                            @    Switch to the new stack,
+
+    OS_CPU_ARM_FP_REG_POP R0
+
+    LDR     R0, [SP], #4                                        @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+@
+@ Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) Save the current task's context onto the current task's stack,
+@              b) OSTCBCurPtr->StkPtr = SP;
+@              c) OSTaskSwHook();
+@              d) OSPrioCur           = OSPrioHighRdy;
+@              e) OSTCBCurPtr         = OSTCBHighRdyPtr;
+@              f) SP                  = OSTCBHighRdyPtr->StkPtr;
+@              g) Restore the new task's context from the new task's stack,
+@              h) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSCtxSw, %function
+OSCtxSw:
+                                                                @ SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           @     Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       @     Push registers,
+    MRS     R0, CPSR                                            @     Push current CPSR,
+    TST     LR, #1                                              @     See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   @     If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    OS_CPU_ARM_FP_REG_PUSH  R0
+
+    CLREX                                                       @ Clear exclusive monitor.
+
+    MOVW    R0, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr->StkPtr = SP;
+    MOVT    R0, #:upper16:OSTCBCurPtr
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur   = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOVT    R0, #:upper16:OSTCBCurPtr
+    MOVW    R1, #:lower16:OSTCBHighRdyPtr
+    MOVT    R1, #:upper16:OSTCBHighRdyPtr
+
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+@
+@ Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) OSTaskSwHook();
+@              b) OSPrioCur   = OSPrioHighRdy;
+@              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+@              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+@              e) Restore the new task's context from the new task's stack,
+@              f) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSIntCtxSw, %function
+OSIntCtxSw:
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOVT    R0, #:upper16:OSTCBCurPtr
+    MOVW    R1, #:lower16:OSTCBHighRdyPtr
+    MOVT    R1, #:upper16:OSTCBHighRdyPtr
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  @ Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          @ Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                  PREFETCH ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               @ Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                    DATA ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                   ADDRESS ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                 INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                      GLOBAL EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1     Exception's SPSR
+@                  R2     Return PC
+@                  R3     Exception's SP
+@
+@ Note(s)       : 1) An exception can occur in three different circumstances; in each of these, the
+@                    SVC stack pointer will point to a different entity :
+@
+@                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+@                       SVC STACK: Should point to a stack initialized by the application's startup code.
+@                       STK USAGE: Interrupted context -- SVC stack.
+@                                  Exception           -- SVC stack.
+@                                  Nested exceptions   -- SVC stack.
+@
+@                    b) CONDITION: An exception interrupts a task.
+@                       SVC STACK: Should point to task stack.
+@                       STK USAGE: Interrupted context -- Task stack.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@
+@                    c) CONDITION: An exception interrupts another exception.
+@                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+@                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr:
+    MRS     R1, SPSR                                            @ Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              @ Save exception's stack pointer.
+
+                                                                @ Adjust exception stack pointer.  This is needed because
+                                                                @ exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           @   Push task's PC,
+    STMFD   SP!, {LR}                                           @   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       @   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        @   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           @   Push task's CPSR (i.e. exception SPSR).
+
+    OS_CPU_ARM_FP_REG_PUSH   R1
+
+    MOVW    R3, #:lower16:OSRunning                             @ if (OSRunning == 1)
+    MOVT    R3, #:upper16:OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNestingCtr                       @   OSIntNestingCtr++;
+    MOVT    R3, #:upper16:OSIntNestingCtr
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              @ if (OSIntNestingCtr == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+@********************************************************************************************************
+@                                 EXCEPTION HANDLER: TASK INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask:
+    MOVW    R3, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr->StkPtr = SP;
+    MOVT    R3, #:upper16:OSTCBCurPtr
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+
+    MOVW    R3, #:lower16:OS_CPU_ExceptStkBase                  @ Switch to exception stack.
+    MOVT    R3, #:upper16:OS_CPU_ExceptStkBase
+    LDR     SP, [R3]
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ Call OSIntExit().  This call MAY never return if a ready
+                                                                @ task with higher priority than the interrupted one is
+                                                                @ found.
+    BL      OSIntExit
+
+    MOVW    R3, #:lower16:OSTCBCurPtr                           @ SP = OSTCBCurPtr->StkPtr;
+    MOVT    R3, #:upper16:OSTCBCurPtr
+    LDR     R4, [R3]
+    LDR     SP, [R4]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNestingCtr                       @   OSIntNestingCtr--;
+    MOVT    R3, #:upper16:OSIntNestingCtr
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@                              VFP/NEON REGISTER COUNT
+@
+@ Register Usage:  R0     Double Register Count
+@********************************************************************************************************
+
+    .type   OS_CPU_ARM_DRegCntGet, %function
+OS_CPU_ARM_DRegCntGet:
+    MOV     R0, #32
+    BX      LR
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S
new file mode 100644
index 0000000..81a31df
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_a_vfp-none.S
@@ -0,0 +1,535 @@
+@
+@********************************************************************************************************
+@                                               uC/OS-III
+@                                          The Real-Time Kernel
+@
+@
+@                           (c) Copyright 2009-2015 Micrium, Inc. Weston, FL
+@                    All rights reserved.  Protected by international copyright laws.
+@
+@                                      Generic ARM Cortex-A Port
+@
+@ File      : OS_CPU_A_VFP-NONE.S
+@ Version   : V3.05.01
+@ By        : NB
+@             JPB
+@             JBL
+@
+@ For       : ARM Cortex-A
+@ Mode      : ARM or Thumb
+@ Toolchain : GNU
+@
+@ Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+@********************************************************************************************************
+@
+
+@********************************************************************************************************
+@                                            FUNCTIONS
+@********************************************************************************************************
+                                                                @ .external references.
+    .extern  OSRunning
+    .extern  OSPrioCur
+    .extern  OSPrioHighRdy
+    .extern  OSTCBCurPtr
+    .extern  OSTCBHighRdyPtr
+    .extern  OSIntNestingCtr
+    .extern  OSIntExit
+    .extern  OSTaskSwHook
+    .extern  OS_CPU_ExceptHndlr                                 @ Chip Support/BSP specific exception handler.
+
+    .extern  OS_CPU_ExceptStkBase
+
+                                                                @ Functions declared in this file.
+    .global  OSStartHighRdy
+    .global  OSCtxSw
+    .global  OSIntCtxSw
+
+                                                                @ Functions related to exception handling.
+    .global  OS_CPU_ARM_ExceptUndefInstrHndlr
+    .global  OS_CPU_ARM_ExceptSwiHndlr
+    .global  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    .global  OS_CPU_ARM_ExceptDataAbortHndlr
+    .global  OS_CPU_ARM_ExceptIrqHndlr
+    .global  OS_CPU_ARM_ExceptFiqHndlr
+
+    .global  OS_CPU_ARM_DRegCntGet
+
+
+@********************************************************************************************************
+@                                               EQUATES
+@********************************************************************************************************
+
+    .equ     OS_CPU_ARM_CONTROL_INT_DIS,        0xC0                    @ Disable both FIQ and IRQ.
+    .equ     OS_CPU_ARM_CONTROL_FIQ_DIS,        0x40                    @ Disable FIQ.
+    .equ     OS_CPU_ARM_CONTROL_IRQ_DIS,        0x80                    @ Disable IRQ.
+    .equ     OS_CPU_ARM_CONTROL_THUMB,          0x20                    @ Set THUMB mode.
+    .equ     OS_CPU_ARM_CONTROL_ARM,            0x00                    @ Set ARM mode.
+
+    .equ     OS_CPU_ARM_MODE_MASK,              0x1F
+    .equ     OS_CPU_ARM_MODE_USR,               0x10
+    .equ     OS_CPU_ARM_MODE_FIQ,               0x11
+    .equ     OS_CPU_ARM_MODE_IRQ,               0x12
+    .equ     OS_CPU_ARM_MODE_SVC,               0x13
+    .equ     OS_CPU_ARM_MODE_ABT,               0x17
+    .equ     OS_CPU_ARM_MODE_UND,               0x1B
+    .equ     OS_CPU_ARM_MODE_SYS,               0x1F
+
+    .equ     OS_CPU_ARM_EXCEPT_RESET,           0x00
+    .equ     OS_CPU_ARM_EXCEPT_UNDEF_INSTR,     0x01
+    .equ     OS_CPU_ARM_EXCEPT_SWI,             0x02
+    .equ     OS_CPU_ARM_EXCEPT_PREFETCH_ABORT,  0x03
+    .equ     OS_CPU_ARM_EXCEPT_DATA_ABORT,      0x04
+    .equ     OS_CPU_ARM_EXCEPT_ADDR_ABORT,      0x05
+    .equ     OS_CPU_ARM_EXCEPT_IRQ,             0x06
+    .equ     OS_CPU_ARM_EXCEPT_FIQ,             0x07
+
+    .equ     OS_CPU_ARM_FPEXC_EN,               0x40000000               @VFP enable bit.
+
+
+@********************************************************************************************************
+@                                     CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+    .code 32
+
+
+@********************************************************************************************************
+@                                         START MULTITASKING
+@                                      void OSStartHighRdy(void)
+@
+@ Note(s) : 1) OSStartHighRdy() MUST:
+@              a) Call OSTaskSwHook() then,
+@              b) Set OSRunning to OS_STATE_OS_RUNNING,
+@              c) Switch to the highest priority task.
+@********************************************************************************************************
+
+    .type   OSStartHighRdy, %function
+OSStartHighRdy:
+                                                                @ Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+                                                                @ SWITCH TO HIGHEST PRIORITY TASK:
+    MOVW    R0, #:lower16:OSTCBHighRdyPtr                       @    Get highest priority task TCB address,
+    MOVT    R0, #:upper16:OSTCBHighRdyPtr
+    LDR     R0, [R0]                                            @    Get stack pointer,
+    LDR     SP, [R0]                                            @    Switch to the new stack,
+
+    LDR     R0, [SP], #4                                        @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+@
+@ Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) Save the current task's context onto the current task's stack,
+@              b) OSTCBCurPtr->StkPtr = SP;
+@              c) OSTaskSwHook();
+@              d) OSPrioCur           = OSPrioHighRdy;
+@              e) OSTCBCurPtr         = OSTCBHighRdyPtr;
+@              f) SP                  = OSTCBHighRdyPtr->StkPtr;
+@              g) Restore the new task's context from the new task's stack,
+@              h) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSCtxSw, %function
+OSCtxSw:
+                                                                @ SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           @     Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       @     Push registers,
+    MRS     R0, CPSR                                            @     Push current CPSR,
+    TST     LR, #1                                              @     See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   @     If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    CLREX                                                       @ Clear exclusive monitor.
+
+    MOVW    R0, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr->StkPtr = SP;
+    MOVT    R0, #:upper16:OSTCBCurPtr
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur   = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOVT    R0, #:upper16:OSTCBCurPtr
+    MOVW    R1, #:lower16:OSTCBHighRdyPtr
+    MOVT    R1, #:upper16:OSTCBHighRdyPtr
+
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+@
+@ Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+@
+@           2) The pseudo-code for OSCtxSw() is:
+@              a) OSTaskSwHook();
+@              b) OSPrioCur   = OSPrioHighRdy;
+@              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+@              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+@              e) Restore the new task's context from the new task's stack,
+@              f) Return to new task's code.
+@
+@           3) Upon entry:
+@              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+@              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+@********************************************************************************************************
+
+    .type   OSIntCtxSw, %function
+OSIntCtxSw:
+    BL      OSTaskSwHook                                        @ OSTaskSwHook();
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOVT    R0, #:upper16:OSTCBCurPtr
+    MOVW    R1, #:lower16:OSTCBHighRdyPtr
+    MOVT    R1, #:upper16:OSTCBHighRdyPtr
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            @ SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  @ Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr:
+                                                                @ LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          @ Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                  PREFETCH ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               @ Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                    DATA ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                   ADDRESS ABORT EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr:
+    SUB     LR, LR, #8                                          @ LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   @ Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                 INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2     Return PC
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr:
+    SUB     LR, LR, #4                                          @ LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        @ Push working registers.
+    MOV     R2, LR                                              @ Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          @ Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         @ Branch to global exception handler.
+
+
+@********************************************************************************************************
+@                                      GLOBAL EXCEPTION HANDLER
+@
+@ Register Usage:  R0     Exception Type
+@                  R1     Exception's SPSR
+@                  R2     Return PC
+@                  R3     Exception's SP
+@
+@ Note(s)       : 1) An exception can occur in three different circumstances; in each of these, the
+@                    SVC stack pointer will point to a different entity :
+@
+@                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+@                       SVC STACK: Should point to a stack initialized by the application's startup code.
+@                       STK USAGE: Interrupted context -- SVC stack.
+@                                  Exception           -- SVC stack.
+@                                  Nested exceptions   -- SVC stack.
+@
+@                    b) CONDITION: An exception interrupts a task.
+@                       SVC STACK: Should point to task stack.
+@                       STK USAGE: Interrupted context -- Task stack.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@
+@                    c) CONDITION: An exception interrupts another exception.
+@                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+@                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+@                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr:
+    MRS     R1, SPSR                                            @ Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              @ Save exception's stack pointer.
+
+                                                                @ Adjust exception stack pointer.  This is needed because
+                                                                @ exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       @ Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           @   Push task's PC,
+    STMFD   SP!, {LR}                                           @   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       @   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        @   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           @   Push task's CPSR (i.e. exception SPSR).
+
+    MOVW    R3, #:lower16:OSRunning                             @ if (OSRunning == 1)
+    MOVT    R3, #:upper16:OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNestingCtr                       @   OSIntNestingCtr++;
+    MOVT    R3, #:upper16:OSIntNestingCtr
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              @ if (OSIntNestingCtr == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+@********************************************************************************************************
+@                                 EXCEPTION HANDLER: TASK INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask:
+    MOVW    R3, #:lower16:OSTCBCurPtr                           @ OSTCBCurPtr->StkPtr = SP;
+    MOVT    R3, #:upper16:OSTCBCurPtr
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+
+    MOVW    R3, #:lower16:OS_CPU_ExceptStkBase                  @ Switch to exception stack.
+    MOVT    R3, #:upper16:OS_CPU_ExceptStkBase
+    LDR     SP, [R3]
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ Call OSIntExit().  This call MAY never return if a ready
+                                                                @ task with higher priority than the interrupted one is
+                                                                @ found.
+    BL      OSIntExit
+
+    MOVW    R3, #:lower16:OSTCBCurPtr                           @ SP = OSTCBCurPtr->StkPtr;
+    MOVT    R3, #:upper16:OSTCBCurPtr
+    LDR     R4, [R3]
+    LDR     SP, [R4]
+
+                                                                @ RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @    Pop new task's context.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ HANDLE NESTING COUNTER:
+    MOVW    R3, #:lower16:OSIntNestingCtr                       @   OSIntNestingCtr--;
+    MOVT    R3, #:upper16:OSIntNestingCtr
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+@
+@ Register Usage:  R0     Exception Type
+@                  R1
+@                  R2
+@                  R3
+@********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing:
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                @ EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  @ OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                @ Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS | OS_CPU_ARM_MODE_SVC)
+
+                                                                @ RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           @   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              @   Pull working registers and return from exception.
+
+
+@********************************************************************************************************
+@                              VFP/NEON REGISTER COUNT
+@
+@ Register Usage:  R0     Double Register Count
+@********************************************************************************************************
+
+    .type   OS_CPU_ARM_DRegCntGet, %function
+OS_CPU_ARM_DRegCntGet:
+    MOV     R0, #0
+    BX      LR
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c
new file mode 100644
index 0000000..e6f808d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/GNU/os_cpu_c.c
@@ -0,0 +1,437 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-III
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                      Generic ARM Cortex-A Port
+*
+* File      : OS_CPU_C.C
+* Version   : V3.05.01
+* By        : JJL
+*             JBL
+*
+* LICENSING TERMS:
+* ---------------
+*             uC/OS-III is provided in source form to registered licensees ONLY.  It is
+*             illegal to distribute this source code to any third party unless you receive
+*             written permission by an authorized Micrium representative.  Knowledge of
+*             the source code may NOT be used to develop a similar product.
+*
+*             Please help us continue to provide the Embedded community with the finest
+*             software available.  Your honesty is greatly appreciated.
+*
+*             You can find our product's user manual, API reference, release notes and
+*             more information at https://doc.micrium.com.
+*             You can contact us at www.micrium.com.
+*
+*
+* For       : ARM Cortex-A
+* Mode      : ARM or Thumb
+* Toolchain : GNU
+*********************************************************************************************************
+*/
+
+#define   OS_CPU_GLOBALS
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_cpu_c__c = "$Id: $";
+#endif
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../../Source/os.h"
+#include  "os_cpu.h"
+
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*
+* Note(s) : 1) ARM_MODE_ARM       is the CPSR bit mask for ARM Mode
+*           2) ARM_MODE_THUMB     is the CPSR bit mask for THUMB Mode
+*           3) ARM_SVC_MODE_THUMB is the CPSR bit mask for SVC MODE + THUMB Mode
+*           4) ARM_SVC_MODE_ARM   is the CPSR bit mask for SVC MODE + ARM Mode
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
+#define  ARM_MODE_ARM           0x00000000u
+#define  ARM_MODE_THUMB         0x00000020u
+#else                                                           /* Set bit 9 in big-endian mode.                        */
+#define  ARM_MODE_ARM           0x00000200u
+#define  ARM_MODE_THUMB         0x00000220u
+#endif
+
+#define  ARM_SVC_MODE_THUMB    (0x00000013u + ARM_MODE_THUMB)
+#define  ARM_SVC_MODE_ARM      (0x00000013u + ARM_MODE_ARM)
+
+
+/*
+*********************************************************************************************************
+*                                           IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do
+*              such things as STOP the CPU to conserve power.
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSIdleTaskHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppIdleTaskHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppIdleTaskHookPtr)();
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*
+* Description: This function is called by OSInit() at the beginning of OSInit().
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSInitHook (void)
+{
+    CPU_STK_SIZE   i;
+    CPU_STK       *p_stk;
+
+
+    p_stk = OSCfg_ISRStkBasePtr;                            /* Clear the ISR stack                                    */
+    for (i = 0u; i < OSCfg_ISRStkSize; i++) {
+        *p_stk++ = (CPU_STK)0u;
+    }
+    OS_CPU_ExceptStkBase = (CPU_STK *)(OSCfg_ISRStkBasePtr + OSCfg_ISRStkSize - 1u);
+
+    OS_CPU_ARM_DRegCnt = OS_CPU_ARM_DRegCntGet();
+}
+
+
+/*
+*********************************************************************************************************
+*                                           REDZONE HIT HOOK
+*
+* Description: This function is called when a task's stack overflowed.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the offending task. NULL if ISR.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+void  OSRedzoneHitHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppRedzoneHitHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppRedzoneHitHookPtr)(p_tcb);
+    } else {
+        CPU_SW_EXCEPTION(;);
+    }
+#else
+    (void)p_tcb;                                                /* Prevent compiler warning                             */
+    CPU_SW_EXCEPTION(;);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-III's statistics task.  This allows your
+*              application to add functionality to the statistics task.
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSStatTaskHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppStatTaskHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppStatTaskHookPtr)();
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task being created.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSTaskCreateHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskCreateHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskCreateHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task being deleted.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSTaskDelHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskDelHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskDelHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            TASK RETURN HOOK
+*
+* Description: This function is called if a task accidentally returns.  In other words, a task should
+*              either be an infinite loop or delete itself when done.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task that is returning.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSTaskReturnHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskReturnHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskReturnHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+**********************************************************************************************************
+*                                       INITIALIZE A TASK'S STACK
+*
+* Description: This function is called by OS_Task_Create() or OSTaskCreateExt() to initialize the stack
+*              frame of the task being created. This function is highly processor specific.
+*
+* Arguments  : p_task       Pointer to the task entry point address.
+*
+*              p_arg        Pointer to a user supplied data area that will be passed to the task
+*                               when the task first executes.
+*
+*              p_stk_base   Pointer to the base address of the stack.
+*
+*              stk_size     Size of the stack, in number of CPU_STK elements.
+*
+*              opt          Options used to alter the behavior of OS_Task_StkInit().
+*                            (see OS.H for OS_TASK_OPT_xxx).
+*
+* Returns    : Always returns the location of the new top-of-stack' once the processor registers have
+*              been placed on the stack in the proper order.
+*
+* Note(s)    : 1) Interrupts are enabled when task starts executing.
+*
+*              2) All tasks run in SVC mode.
+**********************************************************************************************************
+*/
+
+CPU_STK  *OSTaskStkInit (OS_TASK_PTR    p_task,
+                         void          *p_arg,
+                         CPU_STK       *p_stk_base,
+                         CPU_STK       *p_stk_limit,
+                         CPU_STK_SIZE   stk_size,
+                         OS_OPT         opt)
+{
+    CPU_STK    *p_stk;
+    CPU_STK     task_addr;
+    CPU_INT32U  i;
+    CPU_INT32U  fpu_reg_cnt;
+
+
+    (void)opt;                                                  /* Prevent compiler warning                             */
+
+    p_stk     = &p_stk_base[stk_size];                          /* Load stack pointer                                   */
+
+    p_stk     = (CPU_STK *)((CPU_STK)p_stk & ~(CPU_CFG_STK_ALIGN_BYTES - 1u)); /* Align stack pointer.                  */
+
+    task_addr = (CPU_STK)p_task & ~1u;                          /* Mask off lower bit in case task is thumb mode        */
+
+    *--p_stk  = (CPU_STK)task_addr;                             /* Entry Point                                          */
+    *--p_stk  = (CPU_STK)OS_TaskReturn;                         /* Reg R14 (LR)                                         */
+    *--p_stk  = (CPU_STK)0x12121212u;                           /* Reg R12                                              */
+    *--p_stk  = (CPU_STK)0x11111111u;                           /* Reg R11                                              */
+    *--p_stk  = (CPU_STK)0x10101010u;                           /* Reg R10                                              */
+    *--p_stk  = (CPU_STK)0x09090909u;                           /* Reg R9                                               */
+    *--p_stk  = (CPU_STK)0x08080808u;                           /* Reg R8                                               */
+    *--p_stk  = (CPU_STK)0x07070707u;                           /* Reg R7                                               */
+    *--p_stk  = (CPU_STK)0x06060606u;                           /* Reg R6                                               */
+    *--p_stk  = (CPU_STK)0x05050505u;                           /* Reg R5                                               */
+    *--p_stk  = (CPU_STK)0x04040404u;                           /* Reg R4                                               */
+    *--p_stk  = (CPU_STK)0x03030303u;                           /* Reg R3                                               */
+    *--p_stk  = (CPU_STK)0x02020202u;                           /* Reg R2                                               */
+    *--p_stk  = (CPU_STK)0x01010101u;                           /* Reg R1                                               */
+    *--p_stk  = (CPU_STK)p_arg;                                 /* Reg R0 : argument                                    */
+
+    if (((CPU_STK)p_task & 0x01u) == 0x01u) {                   /* See if task runs in Thumb or ARM mode                */
+       *--p_stk = (CPU_STK)ARM_SVC_MODE_THUMB;                  /* CPSR  (Enable IRQ and FIQ interrupts, THUMB-mode)    */
+    } else {
+       *--p_stk = (CPU_STK)ARM_SVC_MODE_ARM;                    /* CPSR  (Enable IRQ and FIQ interrupts, ARM-mode)      */
+    }
+
+    fpu_reg_cnt = OS_CPU_ARM_DRegCntGet();
+
+    if (fpu_reg_cnt != 0u) {
+        *--p_stk = (CPU_STK)0;                                   /* Initialize Floating point status & control register  */
+                                                                 /* Initialize general-purpose Floating point registers  */
+         for (i = 0u; i < fpu_reg_cnt * 2u; i++) {
+             *--p_stk = (CPU_STK)0;
+         }
+
+        *--p_stk = (CPU_STK)(0x40000000);                        /* Initialize Floating-Point Exception Register (Enable)*/
+    }
+
+    return (p_stk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other
+*              operations during a context switch.
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdyPtr' points to the TCB of the task
+*                 that will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCurPtr' points
+*                 to the task being switched out (i.e. the preempted task).
+*********************************************************************************************************
+*/
+
+void  OSTaskSwHook (void)
+{
+#if OS_CFG_TASK_PROFILE_EN > 0u
+    CPU_TS  ts;
+#endif
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+    CPU_TS  int_dis_time;
+#endif
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    CPU_BOOLEAN  stk_status;
+#endif
+
+
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskSwHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppTaskSwHookPtr)();
+    }
+#endif
+
+#if OS_CFG_TASK_PROFILE_EN > 0u
+    ts = OS_TS_GET();
+    if (OSTCBCurPtr != OSTCBHighRdyPtr) {
+        OSTCBCurPtr->CyclesDelta  = ts - OSTCBCurPtr->CyclesStart;
+        OSTCBCurPtr->CyclesTotal += (OS_CYCLES)OSTCBCurPtr->CyclesDelta;
+    }
+
+    OSTCBHighRdyPtr->CyclesStart = ts;
+#endif
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+    int_dis_time = CPU_IntDisMeasMaxCurReset();                   /* Keep track of per-task interrupt disable time    */
+    if (OSTCBCurPtr->IntDisTimeMax < int_dis_time) {
+        OSTCBCurPtr->IntDisTimeMax = int_dis_time;
+    }
+#endif
+
+#if OS_CFG_SCHED_LOCK_TIME_MEAS_EN > 0u
+    if (OSTCBCurPtr->SchedLockTimeMax < OSSchedLockTimeMaxCur) {  /* Keep track of per-task scheduler lock time       */
+        OSTCBCurPtr->SchedLockTimeMax = OSSchedLockTimeMaxCur;
+    }
+    OSSchedLockTimeMaxCur = (CPU_TS)0;                            /* Reset the per-task value                         */
+#endif
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+                                                                /* Check if stack overflowed.                           */
+    stk_status = OSTaskStkRedzoneChk(DEF_NULL);
+    if (stk_status != DEF_OK) {
+        OSRedzoneHitHook(OSTCBCurPtr);
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                              TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) This function is assumed to be called from the Tick ISR.
+*********************************************************************************************************
+*/
+
+void  OSTimeTickHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTimeTickHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppTimeTickHookPtr)();
+    }
+#endif
+}
+
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu.h b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu.h
new file mode 100644
index 0000000..9e1052d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu.h
@@ -0,0 +1,159 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-III
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                       Generic ARM Cortex-A Port
+*
+* File      : OS_CPU.H
+* Version   : V3.05.01
+* By        : JJL
+*             FT
+*             JBL
+*
+* LICENSING TERMS:
+* ---------------
+*             uC/OS-III is provided in source form to registered licensees ONLY.  It is
+*             illegal to distribute this source code to any third party unless you receive
+*             written permission by an authorized Micrium representative.  Knowledge of
+*             the source code may NOT be used to develop a similar product.
+*
+*             Please help us continue to provide the Embedded community with the finest
+*             software available.  Your honesty is greatly appreciated.
+*
+*             You can find our product's user manual, API reference, release notes and
+*             more information at https://doc.micrium.com.
+*             You can contact us at www.micrium.com.
+*
+* For       : ARM Cortex-A
+* Mode      : ARM or Thumb
+* Toolchain : ARM Compiler Toolchain
+*
+* Note(s) : (1) This port supports the entire 32-bit ARM Cortex-A line from the A5 to the A15
+*               with every possible VFP/NEON coprocessor options.
+*
+*           (2) To support the various FPUs three versions of os_cpu_a.s are provided.
+*               Only one of them must be used at a time as outlined below.
+*
+*               os_cpu_a_vfp-none.s
+*                 Suitable when there is no VFP/NEON support or they are deactivated.
+*                 Can also be used when saving the VFP/NEON register bank isn’t required.
+*
+*               os_cpu_a_vfp-d32.s
+*                 Suitable for cpus implementing the NEON Media Processing Engine with
+*                 32 double word registers.
+*
+*               os_cpu_a_vfp-d16.s
+*                 Suitable for cpus with VFP-only support and 16 double word registers.
+*                 Must also be used when the CPACR.D32DIS bit is set and access to registers
+*                 D16-D31 would cause an exception.
+*********************************************************************************************************
+*/
+
+#ifndef  OS_CPU_H
+#define  OS_CPU_H
+
+#ifdef   OS_CPU_GLOBALS
+#define  OS_CPU_EXT
+#else
+#define  OS_CPU_EXT  extern
+#endif
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          EXCEPTION DEFINES
+*********************************************************************************************************
+*/
+
+                                                            /* ARM exception IDs                                      */
+#define  OS_CPU_ARM_EXCEPT_RESET                      0x00u
+#define  OS_CPU_ARM_EXCEPT_UNDEF_INSTR                0x01u
+#define  OS_CPU_ARM_EXCEPT_SWI                        0x02u
+#define  OS_CPU_ARM_EXCEPT_PREFETCH_ABORT             0x03u
+#define  OS_CPU_ARM_EXCEPT_DATA_ABORT                 0x04u
+#define  OS_CPU_ARM_EXCEPT_ADDR_ABORT                 0x05u
+#define  OS_CPU_ARM_EXCEPT_IRQ                        0x06u
+#define  OS_CPU_ARM_EXCEPT_FIQ                        0x07u
+#define  OS_CPU_ARM_EXCEPT_NBR                        0x08u
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+#define  OS_TASK_SW()               OSCtxSw()
+
+/*
+*********************************************************************************************************
+*                                       TIMESTAMP CONFIGURATION
+*
+* Note(s) : (1) OS_TS_GET() is generally defined as CPU_TS_Get32() to allow CPU timestamp timer to be of
+*               any data type size.
+*
+*           (2) For architectures that provide 32-bit or higher precision free running counters 
+*               (i.e. cycle count registers):
+*
+*               (a) OS_TS_GET() may be defined as CPU_TS_TmrRd() to improve performance when retrieving
+*                   the timestamp.
+*
+*               (b) CPU_TS_TmrRd() MUST be configured to be greater or equal to 32-bits to avoid
+*                   truncation of TS.
+*********************************************************************************************************
+*/
+
+#if      OS_CFG_TS_EN == 1u
+#define  OS_TS_GET()               (CPU_TS)CPU_TS_TmrRd()   /* See Note #2a.                                          */
+#else
+#define  OS_TS_GET()               (CPU_TS)0u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+OS_CPU_EXT  CPU_STK     *OS_CPU_ExceptStkBase;                  /* Exception stack base                                 */
+OS_CPU_EXT  CPU_INT32U   OS_CPU_ARM_DRegCnt;                    /* VFP/NEON register count                              */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        OSCtxSw                             (void);
+void        OSIntCtxSw                          (void);
+void        OSStartHighRdy                      (void);
+
+void        OS_CPU_ARM_ExceptUndefInstrHndlr    (void);
+void        OS_CPU_ARM_ExceptSwiHndlr           (void);
+void        OS_CPU_ARM_ExceptPrefetchAbortHndlr (void);
+void        OS_CPU_ARM_ExceptDataAbortHndlr     (void);
+
+void        OS_CPU_ARM_ExceptIrqHndlr           (void);
+void        OS_CPU_ARM_ExceptFiqHndlr           (void);
+
+void        OS_CPU_ExceptHndlr                  (CPU_INT32U  src_id);
+
+CPU_INT32U  OS_CPU_ARM_DRegCntGet               (void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d16.s b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d16.s
new file mode 100644
index 0000000..f63370d
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d16.s
@@ -0,0 +1,555 @@
+;
+;********************************************************************************************************
+;                                                uC/OS-III
+;                                          The Real-Time Kernel
+;
+;
+;                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+;                    All rights reserved.  Protected by international copyright laws.
+;
+;                                      Generic ARM Cortex-A Port
+;
+; File      : OS_CPU_A_VFP-D16.S
+; Version   : V3.05.01
+; By        : JJL
+;             FT
+;             JBL
+;
+; For       : ARM Cortex-A
+; Mode      : ARM or Thumb
+; Toolchain : ARM Compiler Toolchain
+;
+; Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                          PUBLIC FUNCTIONS
+;********************************************************************************************************
+                                                                ; External references.
+    IMPORT  OSRunning
+    IMPORT  OSPrioCur
+    IMPORT  OSPrioHighRdy
+    IMPORT  OSTCBCurPtr
+    IMPORT  OSTCBHighRdyPtr
+    IMPORT  OSIntNestingCtr
+    IMPORT  OSIntExit
+    IMPORT  OSTaskSwHook
+    IMPORT  OS_CPU_ExceptHndlr
+
+    IMPORT  OS_CPU_ExceptStkBase
+
+                                                                ; Functions declared in this file.
+    EXPORT  OSStartHighRdy
+    EXPORT  OSCtxSw
+    EXPORT  OSIntCtxSw
+
+                                                                ; Functions related to exception handling.
+    EXPORT  OS_CPU_ARM_ExceptUndefInstrHndlr
+    EXPORT  OS_CPU_ARM_ExceptSwiHndlr
+    EXPORT  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptDataAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptAddrAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptIrqHndlr
+    EXPORT  OS_CPU_ARM_ExceptFiqHndlr
+
+    EXPORT  OS_CPU_ARM_DRegCntGet
+
+
+;********************************************************************************************************
+;                                               EQUATES
+;********************************************************************************************************
+
+OS_CPU_ARM_CONTROL_INT_DIS        EQU  0xC0                     ; Disable both FIQ and IRQ.
+OS_CPU_ARM_CONTROL_FIQ_DIS        EQU  0x40                     ; Disable FIQ.
+OS_CPU_ARM_CONTROL_IRQ_DIS        EQU  0x80                     ; Disable IRQ.
+OS_CPU_ARM_CONTROL_THUMB          EQU  0x20                     ; Set THUMB mode.
+OS_CPU_ARM_CONTROL_ARM            EQU  0x00                     ; Set ARM mode.
+
+OS_CPU_ARM_MODE_MASK              EQU  0x1F
+OS_CPU_ARM_MODE_USR               EQU  0x10
+OS_CPU_ARM_MODE_FIQ               EQU  0x11
+OS_CPU_ARM_MODE_IRQ               EQU  0x12
+OS_CPU_ARM_MODE_SVC               EQU  0x13
+OS_CPU_ARM_MODE_ABT               EQU  0x17
+OS_CPU_ARM_MODE_UND               EQU  0x1B
+OS_CPU_ARM_MODE_SYS               EQU  0x1F
+
+OS_CPU_ARM_EXCEPT_RESET           EQU  0x00
+OS_CPU_ARM_EXCEPT_UNDEF_INSTR     EQU  0x01
+OS_CPU_ARM_EXCEPT_SWI             EQU  0x02
+OS_CPU_ARM_EXCEPT_PREFETCH_ABORT  EQU  0x03
+OS_CPU_ARM_EXCEPT_DATA_ABORT      EQU  0x04
+OS_CPU_ARM_EXCEPT_ADDR_ABORT      EQU  0x05
+OS_CPU_ARM_EXCEPT_IRQ             EQU  0x06
+OS_CPU_ARM_EXCEPT_FIQ             EQU  0x07
+
+OS_CPU_ARM_FPEXC_EN               EQU  0x40000000
+
+
+;********************************************************************************************************
+;                                     CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+    REQUIRE8
+    PRESERVE8
+
+    AREA CODE, CODE, READONLY
+    CODE32
+
+
+;********************************************************************************************************
+;                                 FLOATING POINT REGISTER MACROS
+;********************************************************************************************************
+
+            MACRO
+            OS_CPU_ARM_FP_REG_POP $rx
+                POP     {$rx}
+                VMSR    FPEXC, $rx                               ;    ... Pop new task's FPEXC
+                FLDMIAD SP!, {D0-D15}                            ;    ... Pop new task's General-Purpose floating point registers.
+                POP     {$rx}
+                VMSR    FPSCR, $rx                               ;    ... Pop new task's FPSCR.
+            MEND
+
+            MACRO
+                OS_CPU_ARM_FP_REG_PUSH $rx
+                VMRS    $rx, FPSCR                               ;     ... Save current FPSCR
+                PUSH    {$rx}                                    ;     ... Save general-purpose floating-point registers.
+                FSTMDBD SP!, {D0-D15}
+                VMRS    $rx, FPEXC                               ;     ... Save Floating point exception register.
+                PUSH    {$rx}
+            MEND
+
+
+;********************************************************************************************************
+;                                         START MULTITASKING
+;                                      void OSStartHighRdy(void)
+;
+; Note(s) : 1) OSStartHighRdy() MUST:
+;              a) Call OSTaskSwHook() then,
+;              b) Set OSRunning to OS_STATE_OS_RUNNING,
+;              c) Switch to the highest priority task.
+;********************************************************************************************************
+
+OSStartHighRdy
+                                                                ; Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+                                                                ; SWITCH TO HIGHEST PRIORITY TASK:
+    MOV32   R0, OSTCBHighRdyPtr                                 ;    Get highest priority task TCB address,
+    LDR     R0, [R0]                                            ;    Get stack pointer,
+    LDR     SP, [R0]                                            ;    Switch to the new stack,
+
+    OS_CPU_ARM_FP_REG_POP R0
+
+    LDR     R0, [SP], #4                                        ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+;
+; Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) Save the current task's context onto the current task's stack,
+;              b) OSTCBCurPtr->StkPtr = SP;
+;              c) OSTaskSwHook();
+;              d) OSPrioCur           = OSPrioHighRdy;
+;              e) OSTCBCurPtr         = OSTCBHighRdyPtr;
+;              f) SP                  = OSTCBHighRdyPtr->StkPtr;
+;              g) Restore the new task's context from the new task's stack,
+;              h) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSCtxSw
+                                                                ; SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           ;     Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       ;     Push registers,
+    MRS     R0, CPSR                                            ;     Push current CPSR,
+    TST     LR, #1                                              ;     See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   ;     If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    OS_CPU_ARM_FP_REG_PUSH  R0
+
+    CLREX                                                       ; Clear exclusive monitor.
+
+    MOV32   R0, OSTCBCurPtr                                     ; OSTCBCurPtr->StkPtr = SP;
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur   = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCurPtr                                     ; OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOV32   R1, OSTCBHighRdyPtr
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+;
+; Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) OSTaskSwHook();
+;              b) OSPrioCur   = OSPrioHighRdy;
+;              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+;              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+;              e) Restore the new task's context from the new task's stack,
+;              f) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSIntCtxSw
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCurPtr                                     ; OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOV32   R1, OSTCBHighRdyPtr
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  ; Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          ; Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                  PREFETCH ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               ; Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                    DATA ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                   ADDRESS ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                 INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                      GLOBAL EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1     Exception's SPSR
+;                  R2     Return PC
+;                  R3     Exception's SP
+;
+; Note(s)       : 1) An exception can occur in three different circumstances; in each of these, the
+;                    SVC stack pointer will point to a different entity :
+;
+;                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+;                       SVC STACK: Should point to a stack initialized by the application's startup code.
+;                       STK USAGE: Interrupted context -- SVC stack.
+;                                  Exception           -- SVC stack.
+;                                  Nested exceptions   -- SVC stack.
+;
+;                    b) CONDITION: An exception interrupts a task.
+;                       SVC STACK: Should point to task stack.
+;                       STK USAGE: Interrupted context -- Task stack.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;
+;                    c) CONDITION: An exception interrupts another exception.
+;                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+;                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr
+    MRS     R1, SPSR                                            ; Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              ; Save exception's stack pointer.
+
+                                                                ; Adjust exception stack pointer.  This is needed because
+                                                                ; exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           ;   Push task's PC,
+    STMFD   SP!, {LR}                                           ;   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       ;   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        ;   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           ;   Push task's CPSR (i.e. exception SPSR).
+
+    OS_CPU_ARM_FP_REG_PUSH   R1
+                                                                ; if (OSRunning == 1)
+    MOV32   R3, OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNestingCtr                                 ;   OSIntNestingCtr++;
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              ; if (OSIntNestingCtr == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+;********************************************************************************************************
+;                                 EXCEPTION HANDLER: TASK INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask
+    MOV32   R3, OSTCBCurPtr                                     ; OSTCBCurPtr->StkPtr = SP;
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+    MOV32   R3, OS_CPU_ExceptStkBase                            ; Switch to exception stack.
+    LDR     SP, [R3]
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; Call OSIntExit().  This call MAY never return if a ready
+                                                                ; task with higher priority than the interrupted one is
+                                                                ; found.
+    BL      OSIntExit
+
+    MOV32   R3, OSTCBCurPtr                                     ; SP = OSTCBCurPtr->StkPtr;
+    LDR     R4, [R3]
+    LDR     SP, [R4]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNestingCtr                                 ;   OSIntNestingCtr--;
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;                              VFP/NEON REGISTER COUNT
+;
+; Register Usage:  R0     Double Register Count
+;********************************************************************************************************
+
+OS_CPU_ARM_DRegCntGet
+    MOV     R0, #16
+    BX      LR
+
+
+    END
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d32.s b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d32.s
new file mode 100644
index 0000000..f00d035
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-d32.s
@@ -0,0 +1,557 @@
+;
+;********************************************************************************************************
+;                                                uC/OS-III
+;                                          The Real-Time Kernel
+;
+;
+;                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+;                    All rights reserved.  Protected by international copyright laws.
+;
+;                                      Generic ARM Cortex-A Port
+;
+; File      : OS_CPU_A_VFP-D32.S
+; Version   : V3.05.01
+; By        : JJL
+;             FT
+;             JBL
+;
+; For       : ARM Cortex-A
+; Mode      : ARM or Thumb
+; Toolchain : ARM Compiler Toolchain
+;
+; Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                          PUBLIC FUNCTIONS
+;********************************************************************************************************
+                                                                ; External references.
+    IMPORT  OSRunning
+    IMPORT  OSPrioCur
+    IMPORT  OSPrioHighRdy
+    IMPORT  OSTCBCurPtr
+    IMPORT  OSTCBHighRdyPtr
+    IMPORT  OSIntNestingCtr
+    IMPORT  OSIntExit
+    IMPORT  OSTaskSwHook
+    IMPORT  OS_CPU_ExceptHndlr
+
+    IMPORT  OS_CPU_ExceptStkBase
+
+                                                                ; Functions declared in this file.
+    EXPORT  OSStartHighRdy
+    EXPORT  OSCtxSw
+    EXPORT  OSIntCtxSw
+
+                                                                ; Functions related to exception handling.
+    EXPORT  OS_CPU_ARM_ExceptUndefInstrHndlr
+    EXPORT  OS_CPU_ARM_ExceptSwiHndlr
+    EXPORT  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptDataAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptAddrAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptIrqHndlr
+    EXPORT  OS_CPU_ARM_ExceptFiqHndlr
+
+    EXPORT  OS_CPU_ARM_DRegCntGet
+
+
+;********************************************************************************************************
+;                                               EQUATES
+;********************************************************************************************************
+
+OS_CPU_ARM_CONTROL_INT_DIS        EQU  0xC0                     ; Disable both FIQ and IRQ.
+OS_CPU_ARM_CONTROL_FIQ_DIS        EQU  0x40                     ; Disable FIQ.
+OS_CPU_ARM_CONTROL_IRQ_DIS        EQU  0x80                     ; Disable IRQ.
+OS_CPU_ARM_CONTROL_THUMB          EQU  0x20                     ; Set THUMB mode.
+OS_CPU_ARM_CONTROL_ARM            EQU  0x00                     ; Set ARM mode.
+
+OS_CPU_ARM_MODE_MASK              EQU  0x1F
+OS_CPU_ARM_MODE_USR               EQU  0x10
+OS_CPU_ARM_MODE_FIQ               EQU  0x11
+OS_CPU_ARM_MODE_IRQ               EQU  0x12
+OS_CPU_ARM_MODE_SVC               EQU  0x13
+OS_CPU_ARM_MODE_ABT               EQU  0x17
+OS_CPU_ARM_MODE_UND               EQU  0x1B
+OS_CPU_ARM_MODE_SYS               EQU  0x1F
+
+OS_CPU_ARM_EXCEPT_RESET           EQU  0x00
+OS_CPU_ARM_EXCEPT_UNDEF_INSTR     EQU  0x01
+OS_CPU_ARM_EXCEPT_SWI             EQU  0x02
+OS_CPU_ARM_EXCEPT_PREFETCH_ABORT  EQU  0x03
+OS_CPU_ARM_EXCEPT_DATA_ABORT      EQU  0x04
+OS_CPU_ARM_EXCEPT_ADDR_ABORT      EQU  0x05
+OS_CPU_ARM_EXCEPT_IRQ             EQU  0x06
+OS_CPU_ARM_EXCEPT_FIQ             EQU  0x07
+
+OS_CPU_ARM_FPEXC_EN               EQU  0x40000000
+
+
+;********************************************************************************************************
+;                                     CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+    REQUIRE8
+    PRESERVE8
+
+    AREA CODE, CODE, READONLY
+    CODE32
+
+
+;********************************************************************************************************
+;                                 FLOATING POINT REGISTER MACROS
+;********************************************************************************************************
+
+            MACRO
+            OS_CPU_ARM_FP_REG_POP $rx
+                POP     {$rx}
+                VMSR    FPEXC, $rx                               ;    ... Pop new task's FPEXC
+                FLDMIAD SP!, {D16-D31}
+                FLDMIAD SP!, {D0-D15}                            ;    ... Pop new task's General-Purpose floating point registers.
+                POP     {$rx}
+                VMSR    FPSCR, $rx                               ;    ... Pop new task's FPSCR.
+            MEND
+
+            MACRO
+                OS_CPU_ARM_FP_REG_PUSH $rx
+                VMRS    $rx, FPSCR                               ;     ... Save current FPSCR
+                PUSH    {$rx}                                    ;     ... Save general-purpose floating-point registers.
+                FSTMDBD SP!, {D0-D15}
+                FSTMDBD SP!, {D16-D31}
+                VMRS    $rx, FPEXC                               ;     ... Save Floating point exception register.
+                PUSH    {$rx}
+            MEND
+
+
+;********************************************************************************************************
+;                                         START MULTITASKING
+;                                      void OSStartHighRdy(void)
+;
+; Note(s) : 1) OSStartHighRdy() MUST:
+;              a) Call OSTaskSwHook() then,
+;              b) Set OSRunning to OS_STATE_OS_RUNNING,
+;              c) Switch to the highest priority task.
+;********************************************************************************************************
+
+OSStartHighRdy
+                                                                ; Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+                                                                ; SWITCH TO HIGHEST PRIORITY TASK:
+    MOV32   R0, OSTCBHighRdyPtr                                 ;    Get highest priority task TCB address,
+    LDR     R0, [R0]                                            ;    Get stack pointer,
+    LDR     SP, [R0]                                            ;    Switch to the new stack,
+
+    OS_CPU_ARM_FP_REG_POP R0
+
+    LDR     R0, [SP], #4                                        ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+;
+; Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) Save the current task's context onto the current task's stack,
+;              b) OSTCBCurPtr->StkPtr = SP;
+;              c) OSTaskSwHook();
+;              d) OSPrioCur           = OSPrioHighRdy;
+;              e) OSTCBCurPtr         = OSTCBHighRdyPtr;
+;              f) SP                  = OSTCBHighRdyPtr->StkPtr;
+;              g) Restore the new task's context from the new task's stack,
+;              h) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSCtxSw
+                                                                ; SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           ;     Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       ;     Push registers,
+    MRS     R0, CPSR                                            ;     Push current CPSR,
+    TST     LR, #1                                              ;     See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   ;     If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    OS_CPU_ARM_FP_REG_PUSH  R0
+
+    CLREX                                                       ; Clear exclusive monitor.
+
+    MOV32   R0, OSTCBCurPtr                                     ; OSTCBCurPtr->StkPtr = SP;
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur   = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCurPtr                                     ; OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOV32   R1, OSTCBHighRdyPtr
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+;
+; Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) OSTaskSwHook();
+;              b) OSPrioCur   = OSPrioHighRdy;
+;              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+;              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+;              e) Restore the new task's context from the new task's stack,
+;              f) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSIntCtxSw
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCurPtr                                     ; OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOV32   R1, OSTCBHighRdyPtr
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  ; Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          ; Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                  PREFETCH ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               ; Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                    DATA ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                   ADDRESS ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                 INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                      GLOBAL EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1     Exception's SPSR
+;                  R2     Return PC
+;                  R3     Exception's SP
+;
+; Note(s)       : 1) An exception can occur in three different circumstances; in each of these, the
+;                    SVC stack pointer will point to a different entity :
+;
+;                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+;                       SVC STACK: Should point to a stack initialized by the application's startup code.
+;                       STK USAGE: Interrupted context -- SVC stack.
+;                                  Exception           -- SVC stack.
+;                                  Nested exceptions   -- SVC stack.
+;
+;                    b) CONDITION: An exception interrupts a task.
+;                       SVC STACK: Should point to task stack.
+;                       STK USAGE: Interrupted context -- Task stack.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;
+;                    c) CONDITION: An exception interrupts another exception.
+;                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+;                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr
+    MRS     R1, SPSR                                            ; Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              ; Save exception's stack pointer.
+
+                                                                ; Adjust exception stack pointer.  This is needed because
+                                                                ; exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           ;   Push task's PC,
+    STMFD   SP!, {LR}                                           ;   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       ;   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        ;   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           ;   Push task's CPSR (i.e. exception SPSR).
+
+    OS_CPU_ARM_FP_REG_PUSH   R1
+                                                                ; if (OSRunning == 1)
+    MOV32   R3, OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNestingCtr                                 ;   OSIntNestingCtr++;
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              ; if (OSIntNestingCtr == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+;********************************************************************************************************
+;                                 EXCEPTION HANDLER: TASK INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask
+    MOV32   R3, OSTCBCurPtr                                     ; OSTCBCurPtr->StkPtr = SP;
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+    MOV32   R3, OS_CPU_ExceptStkBase                            ; Switch to exception stack.
+    LDR     SP, [R3]
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; Call OSIntExit().  This call MAY never return if a ready
+                                                                ; task with higher priority than the interrupted one is
+                                                                ; found.
+    BL      OSIntExit
+
+    MOV32   R3, OSTCBCurPtr                                     ; SP = OSTCBCurPtr->StkPtr;
+    LDR     R4, [R3]
+    LDR     SP, [R4]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNestingCtr                                 ;   OSIntNestingCtr--;
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+    OS_CPU_ARM_FP_REG_POP R0
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;                              VFP/NEON REGISTER COUNT
+;
+; Register Usage:  R0     Double Register Count
+;********************************************************************************************************
+
+OS_CPU_ARM_DRegCntGet
+    MOV     R0, #32
+    BX      LR
+
+
+    END
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-none.s b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-none.s
new file mode 100644
index 0000000..4856b6e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_a_vfp-none.s
@@ -0,0 +1,521 @@
+;
+;********************************************************************************************************
+;                                                uC/OS-III
+;                                          The Real-Time Kernel
+;
+;
+;                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+;                    All rights reserved.  Protected by international copyright laws.
+;
+;                                      Generic ARM Cortex-A Port
+;
+; File      : OS_CPU_A_VFP-NONE.S
+; Version   : V3.05.01
+; By        : JJL
+;             FT
+;             JBL
+;
+; For       : ARM Cortex-A
+; Mode      : ARM or Thumb
+; Toolchain : ARM Compiler Toolchain
+;
+; Note(s) : (1) See Note #2 of os_cpu.h for important informations about this file.
+;********************************************************************************************************
+;
+
+;********************************************************************************************************
+;                                          PUBLIC FUNCTIONS
+;********************************************************************************************************
+                                                                ; External references.
+    IMPORT  OSRunning
+    IMPORT  OSPrioCur
+    IMPORT  OSPrioHighRdy
+    IMPORT  OSTCBCurPtr
+    IMPORT  OSTCBHighRdyPtr
+    IMPORT  OSIntNestingCtr
+    IMPORT  OSIntExit
+    IMPORT  OSTaskSwHook
+    IMPORT  OS_CPU_ExceptHndlr
+
+    IMPORT  OS_CPU_ExceptStkBase
+
+                                                                ; Functions declared in this file.
+    EXPORT  OSStartHighRdy
+    EXPORT  OSCtxSw
+    EXPORT  OSIntCtxSw
+
+                                                                ; Functions related to exception handling.
+    EXPORT  OS_CPU_ARM_ExceptUndefInstrHndlr
+    EXPORT  OS_CPU_ARM_ExceptSwiHndlr
+    EXPORT  OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptDataAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptAddrAbortHndlr
+    EXPORT  OS_CPU_ARM_ExceptIrqHndlr
+    EXPORT  OS_CPU_ARM_ExceptFiqHndlr
+
+    EXPORT  OS_CPU_ARM_DRegCntGet
+
+
+;********************************************************************************************************
+;                                               EQUATES
+;********************************************************************************************************
+
+OS_CPU_ARM_CONTROL_INT_DIS        EQU  0xC0                     ; Disable both FIQ and IRQ.
+OS_CPU_ARM_CONTROL_FIQ_DIS        EQU  0x40                     ; Disable FIQ.
+OS_CPU_ARM_CONTROL_IRQ_DIS        EQU  0x80                     ; Disable IRQ.
+OS_CPU_ARM_CONTROL_THUMB          EQU  0x20                     ; Set THUMB mode.
+OS_CPU_ARM_CONTROL_ARM            EQU  0x00                     ; Set ARM mode.
+
+OS_CPU_ARM_MODE_MASK              EQU  0x1F
+OS_CPU_ARM_MODE_USR               EQU  0x10
+OS_CPU_ARM_MODE_FIQ               EQU  0x11
+OS_CPU_ARM_MODE_IRQ               EQU  0x12
+OS_CPU_ARM_MODE_SVC               EQU  0x13
+OS_CPU_ARM_MODE_ABT               EQU  0x17
+OS_CPU_ARM_MODE_UND               EQU  0x1B
+OS_CPU_ARM_MODE_SYS               EQU  0x1F
+
+OS_CPU_ARM_EXCEPT_RESET           EQU  0x00
+OS_CPU_ARM_EXCEPT_UNDEF_INSTR     EQU  0x01
+OS_CPU_ARM_EXCEPT_SWI             EQU  0x02
+OS_CPU_ARM_EXCEPT_PREFETCH_ABORT  EQU  0x03
+OS_CPU_ARM_EXCEPT_DATA_ABORT      EQU  0x04
+OS_CPU_ARM_EXCEPT_ADDR_ABORT      EQU  0x05
+OS_CPU_ARM_EXCEPT_IRQ             EQU  0x06
+OS_CPU_ARM_EXCEPT_FIQ             EQU  0x07
+
+OS_CPU_ARM_FPEXC_EN               EQU  0x40000000
+
+
+;********************************************************************************************************
+;                                     CODE GENERATION DIRECTIVES
+;********************************************************************************************************
+
+    REQUIRE8
+    PRESERVE8
+
+    AREA CODE, CODE, READONLY
+    CODE32
+
+
+;********************************************************************************************************
+;                                         START MULTITASKING
+;                                      void OSStartHighRdy(void)
+;
+; Note(s) : 1) OSStartHighRdy() MUST:
+;              a) Call OSTaskSwHook() then,
+;              b) Set OSRunning to OS_STATE_OS_RUNNING,
+;              c) Switch to the highest priority task.
+;********************************************************************************************************
+
+OSStartHighRdy
+                                                                ; Change to SVC mode.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+                                                                ; SWITCH TO HIGHEST PRIORITY TASK:
+    MOV32   R0, OSTCBHighRdyPtr                                 ;    Get highest priority task TCB address,
+    LDR     R0, [R0]                                            ;    Get stack pointer,
+    LDR     SP, [R0]                                            ;    Switch to the new stack,
+
+    LDR     R0, [SP], #4                                        ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+;
+; Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) Save the current task's context onto the current task's stack,
+;              b) OSTCBCurPtr->StkPtr = SP;
+;              c) OSTaskSwHook();
+;              d) OSPrioCur           = OSPrioHighRdy;
+;              e) OSTCBCurPtr         = OSTCBHighRdyPtr;
+;              f) SP                  = OSTCBHighRdyPtr->StkPtr;
+;              g) Restore the new task's context from the new task's stack,
+;              h) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSCtxSw
+                                                                ; SAVE CURRENT TASK'S CONTEXT:
+    STMFD   SP!, {LR}                                           ;     Push return address,
+    STMFD   SP!, {LR}
+    STMFD   SP!, {R0-R12}                                       ;     Push registers,
+    MRS     R0, CPSR                                            ;     Push current CPSR,
+    TST     LR, #1                                              ;     See if called from Thumb mode,
+    ORRNE   R0, R0, #OS_CPU_ARM_CONTROL_THUMB                   ;     If yes, set the T-bit.
+    STMFD   SP!, {R0}
+
+    CLREX                                                       ; Clear exclusive monitor.
+
+    MOV32   R0, OSTCBCurPtr                                     ; OSTCBCurPtr->StkPtr = SP;
+    LDR     R1, [R0]
+    STR     SP, [R1]
+
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur   = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCurPtr                                     ; OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOV32   R1, OSTCBHighRdyPtr
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+;
+; Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+;
+;           2) The pseudo-code for OSCtxSw() is:
+;              a) OSTaskSwHook();
+;              b) OSPrioCur   = OSPrioHighRdy;
+;              c) OSTCBCurPtr = OSTCBHighRdyPtr;
+;              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr;
+;              e) Restore the new task's context from the new task's stack,
+;              f) Return to new task's code.
+;
+;           3) Upon entry:
+;              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+;              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+;********************************************************************************************************
+
+OSIntCtxSw
+    BL      OSTaskSwHook                                        ; OSTaskSwHook();
+
+    MOV32   R0, OSPrioCur                                       ; OSPrioCur = OSPrioHighRdy;
+    MOV32   R1, OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOV32   R0, OSTCBCurPtr                                     ; OSTCBCurPtr = OSTCBHighRdyPtr;
+    MOV32   R1, OSTCBHighRdyPtr
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     SP, [R2]                                            ; SP = OSTCBHighRdyPtr->OSTCBStkPtr;
+
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                               UNDEFINED INSTRUCTION EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptUndefInstrHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_UNDEF_INSTR                  ; Set exception ID to OS_CPU_ARM_EXCEPT_UNDEF_INSTR.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                SOFTWARE INTERRUPT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptSwiHndlr
+                                                                ; LR offset to return from this exception:  0.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_SWI                          ; Set exception ID to OS_CPU_ARM_EXCEPT_SWI.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                  PREFETCH ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptPrefetchAbortHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_PREFETCH_ABORT               ; Set exception ID to OS_CPU_ARM_EXCEPT_PREFETCH_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                    DATA ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptDataAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_DATA_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_DATA_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                   ADDRESS ABORT EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptAddrAbortHndlr
+    SUB     LR, LR, #8                                          ; LR offset to return from this exception: -8.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_ADDR_ABORT                   ; Set exception ID to OS_CPU_ARM_EXCEPT_ADDR_ABORT.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                 INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptIrqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_IRQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                              FAST INTERRUPT REQUEST EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2     Return PC
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptFiqHndlr
+    SUB     LR, LR, #4                                          ; LR offset to return from this exception: -4.
+    STMFD   SP!, {R0-R3}                                        ; Push working registers.
+    MOV     R2, LR                                              ; Save link register.
+    MOV     R0, #OS_CPU_ARM_EXCEPT_FIQ                          ; Set exception ID to OS_CPU_ARM_EXCEPT_FIQ.
+    B            OS_CPU_ARM_ExceptHndlr                         ; Branch to global exception handler.
+
+
+;********************************************************************************************************
+;                                      GLOBAL EXCEPTION HANDLER
+;
+; Register Usage:  R0     Exception Type
+;                  R1     Exception's SPSR
+;                  R2     Return PC
+;                  R3     Exception's SP
+;
+; Note(s)       : 1) An exception can occur in three different circumstances; in each of these, the
+;                    SVC stack pointer will point to a different entity :
+;
+;                    a) CONDITION: An exception occurs before the OS has been fully initialized.
+;                       SVC STACK: Should point to a stack initialized by the application's startup code.
+;                       STK USAGE: Interrupted context -- SVC stack.
+;                                  Exception           -- SVC stack.
+;                                  Nested exceptions   -- SVC stack.
+;
+;                    b) CONDITION: An exception interrupts a task.
+;                       SVC STACK: Should point to task stack.
+;                       STK USAGE: Interrupted context -- Task stack.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;
+;                    c) CONDITION: An exception interrupts another exception.
+;                       SVC STACK: Should point to location in exception stack, 'OS_CPU_ExceptStk[]'.
+;                       STK USAGE: Interrupted context -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Exception           -- Exception stack 'OS_CPU_ExceptStk[]'.
+;                                  Nested exceptions   -- Exception stack 'OS_CPU_ExceptStk[]'.
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr
+    MRS     R1, SPSR                                            ; Save CPSR (i.e. exception's SPSR).
+    MOV     R3, SP                                              ; Save exception's stack pointer.
+
+                                                                ; Adjust exception stack pointer.  This is needed because
+                                                                ; exception stack is not used when restoring task context.
+    ADD     SP, SP, #(4 * 4)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+    CLREX                                                       ; Clear exclusive monitor.
+
+    STMFD   SP!, {R2}                                           ;   Push task's PC,
+    STMFD   SP!, {LR}                                           ;   Push task's LR,
+    STMFD   SP!, {R4-R12}                                       ;   Push task's R12-R4,
+    LDMFD   R3!, {R5-R8}                                        ;   Move task's R3-R0 from exception stack to task's stack.
+    STMFD   SP!, {R5-R8}
+    STMFD   SP!, {R1}                                           ;   Push task's CPSR (i.e. exception SPSR).
+
+                                                                ; if (OSRunning == 1)
+    MOV32   R3, OSRunning
+    LDRB    R4, [R3]
+    CMP     R4, #1
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNestingCtr                                 ;   OSIntNestingCtr++;
+    LDRB    R4, [R3]
+    ADD     R4, R4, #1
+    STRB    R4, [R3]
+
+    CMP     R4, #1                                              ; if (OSIntNestingCtr == 1)
+    BNE     OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+
+;********************************************************************************************************
+;                                 EXCEPTION HANDLER: TASK INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakTask
+    MOV32   R3, OSTCBCurPtr                                     ; OSTCBCurPtr->StkPtr = SP;
+    LDR     R4, [R3]
+    STR     SP, [R4]
+
+    MOV32   R3, OS_CPU_ExceptStkBase                            ; Switch to exception stack.
+    LDR     SP, [R3]
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; Call OSIntExit().  This call MAY never return if a ready
+                                                                ; task with higher priority than the interrupted one is
+                                                                ; found.
+    BL      OSIntExit
+
+    MOV32   R3, OSTCBCurPtr                                     ; SP = OSTCBCurPtr->StkPtr;
+    LDR     R4,  [R3]
+    LDR     SP,  [R4]
+
+                                                                ; RESTORE NEW TASK'S CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop new task's CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;    Pop new task's context.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: EXCEPTION INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; HANDLE NESTING COUNTER:
+    MOV32   R3, OSIntNestingCtr                                 ;   OSIntNestingCtr--;
+    LDRB    R4, [R3]
+    SUB     R4, R4, #1
+    STRB    R4, [R3]
+
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;    Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;                              EXCEPTION HANDLER: 'NOTHING' INTERRUPTED
+;
+; Register Usage:  R0     Exception Type
+;                  R1
+;                  R2
+;                  R3
+;********************************************************************************************************
+
+OS_CPU_ARM_ExceptHndlr_BreakNothing
+
+    MOV     R1, SP
+    AND     R1, R1, #4
+    SUB     SP, SP, R1
+    STMFD   SP!, {R1, LR}
+
+                                                                ; EXECUTE EXCEPTION HANDLER:
+    BL      OS_CPU_ExceptHndlr                                  ; OS_CPU_ExceptHndlr(except_type = R0)
+
+    LDMIA   SP!, {R1, LR}
+    ADD     SP, SP, R1
+                                                                ; Change to SVC mode & disable interruptions.
+    MSR     CPSR_c, #(OS_CPU_ARM_CONTROL_INT_DIS :OR: OS_CPU_ARM_MODE_SVC)
+
+                                                                ; RESTORE OLD CONTEXT:
+    LDMFD   SP!, {R0}                                           ;   Pop old CPSR,
+    MSR     SPSR_cxsf, R0
+
+    LDMFD   SP!, {R0-R12, LR, PC}^                              ;   Pull working registers and return from exception.
+
+
+;********************************************************************************************************
+;                              VFP/NEON REGISTER COUNT
+;
+; Register Usage:  R0     Double Register Count
+;********************************************************************************************************
+
+OS_CPU_ARM_DRegCntGet
+    MOV     R0, #0
+    BX      LR
+
+
+    END
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_c.c b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_c.c
new file mode 100644
index 0000000..5461c59
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A/Generic/RealView/os_cpu_c.c
@@ -0,0 +1,437 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-III
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                       Generic ARM Cortex-A Port
+*
+* File      : OS_CPU_C.C
+* Version   : V3.05.01
+* By        : JJL
+*             JBL
+*
+* LICENSING TERMS:
+* ---------------
+*             uC/OS-III is provided in source form to registered licensees ONLY.  It is
+*             illegal to distribute this source code to any third party unless you receive
+*             written permission by an authorized Micrium representative.  Knowledge of
+*             the source code may NOT be used to develop a similar product.
+*
+*             Please help us continue to provide the Embedded community with the finest
+*             software available.  Your honesty is greatly appreciated.
+*
+*             You can find our product's user manual, API reference, release notes and
+*             more information at https://doc.micrium.com.
+*             You can contact us at www.micrium.com.
+*
+*
+* For       : ARM Cortex-A
+* Mode      : ARM or Thumb
+* Toolchain : ARM Compiler Toolchain
+*********************************************************************************************************
+*/
+
+#define   OS_CPU_GLOBALS
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_cpu_c__c = "$Id: $";
+#endif
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../../Source/os.h"
+#include  "os_cpu.h"
+
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*
+* Note(s) : 1) ARM_MODE_ARM       is the CPSR bit mask for ARM Mode
+*           2) ARM_MODE_THUMB     is the CPSR bit mask for THUMB Mode
+*           3) ARM_SVC_MODE_THUMB is the CPSR bit mask for SVC MODE + THUMB Mode
+*           4) ARM_SVC_MODE_ARM   is the CPSR bit mask for SVC MODE + ARM Mode
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
+#define  ARM_MODE_ARM           0x00000000u
+#define  ARM_MODE_THUMB         0x00000020u
+#else                                                           /* Set bit 9 in big-endian mode.                        */
+#define  ARM_MODE_ARM           0x00000200u
+#define  ARM_MODE_THUMB         0x00000220u
+#endif
+
+#define  ARM_SVC_MODE_THUMB    (0x00000013u + ARM_MODE_THUMB)
+#define  ARM_SVC_MODE_ARM      (0x00000013u + ARM_MODE_ARM)
+
+
+/*
+*********************************************************************************************************
+*                                           IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do
+*              such things as STOP the CPU to conserve power.
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSIdleTaskHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppIdleTaskHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppIdleTaskHookPtr)();
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*
+* Description: This function is called by OSInit() at the beginning of OSInit().
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSInitHook (void)
+{
+    CPU_STK_SIZE   i;
+    CPU_STK       *p_stk;
+
+
+    p_stk = OSCfg_ISRStkBasePtr;                            /* Clear the ISR stack                                    */
+    for (i = 0u; i < OSCfg_ISRStkSize; i++) {
+        *p_stk++ = (CPU_STK)0u;
+    }
+    OS_CPU_ExceptStkBase = (CPU_STK *)(OSCfg_ISRStkBasePtr + OSCfg_ISRStkSize - 1u);
+
+    OS_CPU_ARM_DRegCnt = OS_CPU_ARM_DRegCntGet();
+}
+
+
+/*
+*********************************************************************************************************
+*                                           REDZONE HIT HOOK
+*
+* Description: This function is called when a task's stack overflowed.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the offending task. NULL if ISR.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+void  OSRedzoneHitHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppRedzoneHitHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppRedzoneHitHookPtr)(p_tcb);
+    } else {
+        CPU_SW_EXCEPTION(;);
+    }
+#else
+    (void)p_tcb;                                                /* Prevent compiler warning                             */
+    CPU_SW_EXCEPTION(;);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-III's statistics task.  This allows your
+*              application to add functionality to the statistics task.
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSStatTaskHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppStatTaskHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppStatTaskHookPtr)();
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task being created.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSTaskCreateHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskCreateHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskCreateHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task being deleted.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSTaskDelHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskDelHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskDelHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            TASK RETURN HOOK
+*
+* Description: This function is called if a task accidentally returns.  In other words, a task should
+*              either be an infinite loop or delete itself when done.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task that is returning.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSTaskReturnHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskReturnHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskReturnHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+**********************************************************************************************************
+*                                       INITIALIZE A TASK'S STACK
+*
+* Description: This function is called by OS_Task_Create() or OSTaskCreateExt() to initialize the stack
+*              frame of the task being created. This function is highly processor specific.
+*
+* Arguments  : p_task       Pointer to the task entry point address.
+*
+*              p_arg        Pointer to a user supplied data area that will be passed to the task
+*                               when the task first executes.
+*
+*              p_stk_base   Pointer to the base address of the stack.
+*
+*              stk_size     Size of the stack, in number of CPU_STK elements.
+*
+*              opt          Options used to alter the behavior of OS_Task_StkInit().
+*                            (see OS.H for OS_TASK_OPT_xxx).
+*
+* Returns    : Always returns the location of the new top-of-stack' once the processor registers have
+*              been placed on the stack in the proper order.
+*
+* Note(s)    : 1) Interrupts are enabled when task starts executing.
+*
+*              2) All tasks run in SVC mode.
+**********************************************************************************************************
+*/
+
+CPU_STK  *OSTaskStkInit (OS_TASK_PTR    p_task,
+                         void          *p_arg,
+                         CPU_STK       *p_stk_base,
+                         CPU_STK       *p_stk_limit,
+                         CPU_STK_SIZE   stk_size,
+                         OS_OPT         opt)
+{
+    CPU_STK    *p_stk;
+    CPU_STK     task_addr;
+    CPU_INT32U  i;
+    CPU_INT32U  fpu_reg_cnt;
+
+
+    (void)opt;                                                  /* Prevent compiler warning                             */
+
+    p_stk     = &p_stk_base[stk_size];                          /* Load stack pointer                                   */
+
+    p_stk     = (CPU_STK *)((CPU_STK)p_stk & ~(CPU_CFG_STK_ALIGN_BYTES - 1u)); /* Align stack pointer.                  */
+
+    task_addr = (CPU_STK)p_task & ~1u;                          /* Mask off lower bit in case task is thumb mode        */
+
+    *--p_stk  = (CPU_STK)task_addr;                             /* Entry Point                                          */
+    *--p_stk  = (CPU_STK)OS_TaskReturn;                         /* Reg R14 (LR)                                         */
+    *--p_stk  = (CPU_STK)0x12121212u;                           /* Reg R12                                              */
+    *--p_stk  = (CPU_STK)0x11111111u;                           /* Reg R11                                              */
+    *--p_stk  = (CPU_STK)0x10101010u;                           /* Reg R10                                              */
+    *--p_stk  = (CPU_STK)0x09090909u;                           /* Reg R9                                               */
+    *--p_stk  = (CPU_STK)0x08080808u;                           /* Reg R8                                               */
+    *--p_stk  = (CPU_STK)0x07070707u;                           /* Reg R7                                               */
+    *--p_stk  = (CPU_STK)0x06060606u;                           /* Reg R6                                               */
+    *--p_stk  = (CPU_STK)0x05050505u;                           /* Reg R5                                               */
+    *--p_stk  = (CPU_STK)0x04040404u;                           /* Reg R4                                               */
+    *--p_stk  = (CPU_STK)0x03030303u;                           /* Reg R3                                               */
+    *--p_stk  = (CPU_STK)0x02020202u;                           /* Reg R2                                               */
+    *--p_stk  = (CPU_STK)0x01010101u;                           /* Reg R1                                               */
+    *--p_stk  = (CPU_STK)p_arg;                                 /* Reg R0 : argument                                    */
+
+    if (((CPU_STK)p_task & 0x01u) == 0x01u) {                   /* See if task runs in Thumb or ARM mode                */
+       *--p_stk = (CPU_STK)ARM_SVC_MODE_THUMB;                  /* CPSR  (Enable IRQ and FIQ interrupts, THUMB-mode)    */
+    } else {
+       *--p_stk = (CPU_STK)ARM_SVC_MODE_ARM;                    /* CPSR  (Enable IRQ and FIQ interrupts, ARM-mode)      */
+    }
+
+    fpu_reg_cnt = OS_CPU_ARM_DRegCntGet();
+
+    if (fpu_reg_cnt != 0u) {
+        *--p_stk = (CPU_STK)0;                                   /* Initialize Floating point status & control register  */
+                                                                 /* Initialize general-purpose Floating point registers  */
+         for (i = 0u; i < fpu_reg_cnt * 2u; i++) {
+             *--p_stk = (CPU_STK)0;
+         }
+
+        *--p_stk = (CPU_STK)(0x40000000);                        /* Initialize Floating-Point Exception Register (Enable)*/
+    }
+
+    return (p_stk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other
+*              operations during a context switch.
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdyPtr' points to the TCB of the task
+*                 that will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCurPtr' points
+*                 to the task being switched out (i.e. the preempted task).
+*********************************************************************************************************
+*/
+
+void  OSTaskSwHook (void)
+{
+#if OS_CFG_TASK_PROFILE_EN > 0u
+    CPU_TS  ts;
+#endif
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+    CPU_TS  int_dis_time;
+#endif
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    CPU_BOOLEAN  stk_status;
+#endif
+
+
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskSwHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppTaskSwHookPtr)();
+    }
+#endif
+
+#if OS_CFG_TASK_PROFILE_EN > 0u
+    ts = OS_TS_GET();
+    if (OSTCBCurPtr != OSTCBHighRdyPtr) {
+        OSTCBCurPtr->CyclesDelta  = ts - OSTCBCurPtr->CyclesStart;
+        OSTCBCurPtr->CyclesTotal += (OS_CYCLES)OSTCBCurPtr->CyclesDelta;
+    }
+
+    OSTCBHighRdyPtr->CyclesStart = ts;
+#endif
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+    int_dis_time = CPU_IntDisMeasMaxCurReset();                   /* Keep track of per-task interrupt disable time    */
+    if (OSTCBCurPtr->IntDisTimeMax < int_dis_time) {
+        OSTCBCurPtr->IntDisTimeMax = int_dis_time;
+    }
+#endif
+
+#if OS_CFG_SCHED_LOCK_TIME_MEAS_EN > 0u
+    if (OSTCBCurPtr->SchedLockTimeMax < OSSchedLockTimeMaxCur) {  /* Keep track of per-task scheduler lock time       */
+        OSTCBCurPtr->SchedLockTimeMax = OSSchedLockTimeMaxCur;
+    }
+    OSSchedLockTimeMaxCur = (CPU_TS)0;                            /* Reset the per-task value                         */
+#endif
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+                                                                /* Check if stack overflowed.                           */
+    stk_status = OSTaskStkRedzoneChk(DEF_NULL);
+    if (stk_status != DEF_OK) {
+        OSRedzoneHitHook(OSTCBCurPtr);
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                              TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) This function is assumed to be called from the Tick ISR.
+*********************************************************************************************************
+*/
+
+void  OSTimeTickHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTimeTickHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppTimeTickHookPtr)();
+    }
+#endif
+}
+
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu.h b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu.h
new file mode 100644
index 0000000..9326b1c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu.h
@@ -0,0 +1,116 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-III
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                      Generic ARM Cortex-A50 Port
+*
+* File      : OS_CPU.H
+* Version   : V3.05.01
+* By        : JBL
+*
+* LICENSING TERMS:
+* ---------------
+*             uC/OS-III is provided in source form to registered licensees ONLY.  It is
+*             illegal to distribute this source code to any third party unless you receive
+*             written permission by an authorized Micrium representative.  Knowledge of
+*             the source code may NOT be used to develop a similar product.
+*
+*             Please help us continue to provide the Embedded community with the finest
+*             software available.  Your honesty is greatly appreciated.
+*
+*             You can contact us at www.micrium.com.
+*
+* For       : ARM Cortex-A50
+* Mode      : AArch64
+* Toolchain : ARM Compiler Toolchain
+*
+* Note(s) : (1) This port supports the entire 64-bit ARM Cortex-A50 line.
+*********************************************************************************************************
+*/
+
+#ifndef  OS_CPU_H
+#define  OS_CPU_H
+
+#ifdef   OS_CPU_GLOBALS
+#define  OS_CPU_EXT
+#else
+#define  OS_CPU_EXT  extern
+#endif
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+#define  OS_TASK_SW()               OSCtxSw()
+
+
+/*
+*********************************************************************************************************
+*                                       TIMESTAMP CONFIGURATION
+*
+* Note(s) : (1) OS_TS_GET() is generally defined as CPU_TS_Get32() to allow CPU timestamp timer to be of
+*               any data type size.
+*
+*           (2) For architectures that provide 32-bit or higher precision free running counters 
+*               (i.e. cycle count registers):
+*
+*               (a) OS_TS_GET() may be defined as CPU_TS_TmrRd() to improve performance when retrieving
+*                   the timestamp.
+*
+*               (b) CPU_TS_TmrRd() MUST be configured to be greater or equal to 32-bits to avoid
+*                   truncation of TS.
+*********************************************************************************************************
+*/
+
+#if      OS_CFG_TS_EN == 1u
+#define  OS_TS_GET()               (CPU_TS)CPU_TS_TmrRd()   /* See Note #2a.                                          */
+#else
+#define  OS_TS_GET()               (CPU_TS)0u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+OS_CPU_EXT  CPU_STK  *OS_CPU_ExceptStkBase;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        OSCtxSw                    (void);
+void        OSIntCtxSw                 (void);
+void        OSStartHighRdy             (void);
+
+void        OS_CPU_ARM_ExceptIrqHndlr  (void);
+void        OS_CPU_ARM_ExceptFiqHndlr  (void);
+
+void        OS_CPU_ExceptHndlr         (CPU_INT32U  src_id);
+
+CPU_INT64U  OS_CPU_SPSRGet             (void);
+CPU_INT64U  OS_CPU_SIMDGet             (void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_a.S b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_a.S
new file mode 100644
index 0000000..1dff5b4
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_a.S
@@ -0,0 +1,484 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-III
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2015 Micrium, Inc. Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                     Generic ARM Cortex-A50 Port
+*
+* File      : OS_CPU_A.ASM
+* Version   : V3.05.01
+* By        : JBL
+*
+* For       : ARM Cortex-A50
+* Mode      : AArch64
+* Toolchain : GNU
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          PUBLIC FUNCTIONS
+*********************************************************************************************************
+*/
+                                                                /* External references. */
+    .global  OSRunning
+    .global  OSPrioCur
+    .global  OSPrioHighRdy
+    .global  OSTCBCurPtr
+    .global  OSTCBHighRdyPtr
+    .global  OSIntNestingCtr
+    .global  OSIntExit
+    .global  OSTaskSwHook
+
+    .global  OS_CPU_ExceptStkBase
+
+                                                                /* Functions declared in this file. */
+    .global  OSStartHighRdy
+    .global  OSCtxSw
+    .global  OSIntCtxSw
+    .global  OS_CPU_SPSRGet
+    .global  OS_CPU_SIMDGet
+
+/*
+*********************************************************************************************************
+*                                               EQUATES
+*********************************************************************************************************
+*/
+
+#ifndef OS_CPU_EL3
+#define OS_CPU_EL3 1
+#endif
+
+#ifndef OS_CPU_SIMD
+#define OS_CPU_SIMD 1
+#endif
+
+/*
+*********************************************************************************************************
+*                                     CODE GENERATION DIRECTIVES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       SIMD REGISTERS MACROS
+*********************************************************************************************************
+*/
+
+    .macro OS_CPU_ARM_REG_POP
+
+        #if OS_CPU_SIMD == 1
+        LDP  q0, q1, [sp], #32
+        LDP  q2, q3, [sp], #32
+        LDP  q4, q5, [sp], #32
+        LDP  q6, q7, [sp], #32
+        LDP  q8, q9, [sp], #32
+        LDP  q10, q11, [sp], #32
+        LDP  q12, q13, [sp], #32
+        LDP  q14, q15, [sp], #32
+        LDP  q16, q17, [sp], #32
+        LDP  q18, q19, [sp], #32
+        LDP  q20, q21, [sp], #32
+        LDP  q22, q23, [sp], #32
+        LDP  q24, q25, [sp], #32
+        LDP  q26, q27, [sp], #32
+        LDP  q28, q29, [sp], #32
+        LDP  q30, q31, [sp], #32
+
+        LDP  x28, x29, [sp], #16
+        MSR  FPSR, x28
+        MSR  FPCR, x29
+        #endif
+
+	    LDP  x0, x1, [sp], #16
+	    #if OS_CPU_EL3 == 1
+	    MSR  SPSR_EL3, x1
+	    #else
+	    MSR  SPSR_EL1, x1
+	    #endif
+
+	    LDP  x30, x0, [sp], #16
+        #if OS_CPU_EL3 == 1
+	    MSR  ELR_EL3, x0
+	    #else
+	    MSR  ELR_EL1, x0
+	    #endif
+
+	    LDP  x0, x1, [sp], #16
+	    LDP  x2, x3, [sp], #16
+	    LDP  x4, x5, [sp], #16
+	    LDP  x6, x7, [sp], #16
+	    LDP  x8, x9, [sp], #16
+	    LDP  x10, x11, [sp], #16
+	    LDP  x12, x13, [sp], #16
+	    LDP  x14, x15, [sp], #16
+	    LDP  x16, x17, [sp], #16
+	    LDP  x18, x19, [sp], #16
+	    LDP  x20, x21, [sp], #16
+	    LDP  x22, x23, [sp], #16
+	    LDP  x24, x25, [sp], #16
+	    LDP  x26, x27, [sp], #16
+	    LDP  x28, x29, [sp], #16
+    .endm
+
+    .macro OS_CPU_ARM_REG_PUSH
+        STP  x28, x29, [sp, #-16]!
+	    STP  x26, x27, [sp, #-16]!
+	    STP  x24, x25, [sp, #-16]!
+	    STP  x22, x23, [sp, #-16]!
+	    STP  x20, x21, [sp, #-16]!
+	    STP  x18, x19, [sp, #-16]!
+	    STP  x16, x17, [sp, #-16]!
+	    STP  x14, x15, [sp, #-16]!
+	    STP  x12, x13, [sp, #-16]!
+	    STP  x10, x11, [sp, #-16]!
+	    STP  x8, x9, [sp, #-16]!
+	    STP  x6, x7, [sp, #-16]!
+	    STP  x4, x5, [sp, #-16]!
+	    STP  x2, x3, [sp, #-16]!
+	    STP  x0, x1, [sp, #-16]!
+
+        #if OS_CPU_EL3 == 1
+	    MRS  x0, ELR_EL3
+	    #else
+	    MRS  x0, ELR_EL1
+	    #endif
+
+	    STP  x30, x0, [sp, #-16]!
+
+        #if OS_CPU_EL3 == 1
+	    MRS  x0, SPSR_EL3
+	    #else
+	    MRS  x0, SPSR_EL1
+	    #endif
+
+	    MOV  x1, x0
+	    STP  x0, x1, [sp, #-16]!
+
+        #if OS_CPU_SIMD == 1
+        MRS  x28, FPSR
+        MRS  x29, FPCR
+        STP  x28, x29, [sp, #-16]!
+
+	    STP  q30, q31, [sp, #-32]!
+        STP  q28, q29, [sp, #-32]!
+        STP  q26, q27, [sp, #-32]!
+        STP  q24, q25, [sp, #-32]!
+        STP  q22, q23, [sp, #-32]!
+        STP  q20, q21, [sp, #-32]!
+        STP  q18, q19, [sp, #-32]!
+        STP  q16, q17, [sp, #-32]!
+        STP  q14, q15, [sp, #-32]!
+        STP  q12, q13, [sp, #-32]!
+        STP  q10, q11, [sp, #-32]!
+        STP  q8, q9, [sp, #-32]!
+        STP  q6, q7, [sp, #-32]!
+        STP  q4, q5, [sp, #-32]!
+        STP  q2, q3, [sp, #-32]!
+        STP  q0, q1, [sp, #-32]!
+        #endif
+    .endm
+
+    .macro OS_CPU_ARM_REG_PUSHF
+	    STP  x28, x29, [sp, #-16]!
+	    STP  x26, x27, [sp, #-16]!
+	    STP  x24, x25, [sp, #-16]!
+	    STP  x22, x23, [sp, #-16]!
+	    STP  x20, x21, [sp, #-16]!
+	    STP  x18, x19, [sp, #-16]!
+        SUB  sp, sp, #144
+
+	    MOV  x0, x30
+	    STP  x30, x0, [sp, #-16]!
+
+        #if OS_CPU_EL3 == 1
+        MOV  x0, #0x0000020D
+        #else
+        MOV  x0, #0x00000205
+        #endif
+	    MOV  x1, x0
+	    STP  x0, x1, [sp, #-16]!
+
+        #if OS_CPU_SIMD == 1
+        MRS  x28, FPSR
+        MRS  x29, FPCR
+        STP  x28, x29, [sp, #-16]!
+
+        SUB  sp, sp, #256
+        STP  q14, q15, [sp, #-32]!
+        STP  q12, q13, [sp, #-32]!
+        STP  q10, q11, [sp, #-32]!
+        STP  q8, q9, [sp, #-32]!
+        SUB  sp, sp, #128
+        #endif
+    .endm
+
+/*
+*********************************************************************************************************
+*                                         START MULTITASKING
+*                                      void OSStartHighRdy(void)
+*
+* Note(s) : 1) OSStartHighRdy() MUST:
+*              a) Call OSTaskSwHook() then,
+*              b) Set OSRunning to OS_STATE_OS_RUNNING,
+*              c) Switch to the highest priority task.
+*********************************************************************************************************
+*/
+
+OSStartHighRdy:
+
+    BL   OSTaskSwHook
+
+    LDR  x0, =OSTCBHighRdyPtr
+    LDR  x1, [x0]
+    LDR  x2, [x1]
+    MOV  sp, x2
+
+    #if OS_CPU_SIMD == 1
+    LDP  q0, q1, [sp], #32
+    LDP  q2, q3, [sp], #32
+    LDP  q4, q5, [sp], #32
+    LDP  q6, q7, [sp], #32
+    LDP  q8, q9, [sp], #32
+    LDP  q10, q11, [sp], #32
+    LDP  q12, q13, [sp], #32
+    LDP  q14, q15, [sp], #32
+    LDP  q16, q17, [sp], #32
+    LDP  q18, q19, [sp], #32
+    LDP  q20, q21, [sp], #32
+    LDP  q22, q23, [sp], #32
+    LDP  q24, q25, [sp], #32
+    LDP  q26, q27, [sp], #32
+    LDP  q28, q29, [sp], #32
+    LDP  q30, q31, [sp], #32
+
+    LDP  x28, x29, [sp], #16
+    MSR  FPSR, x28
+    MSR  FPCR, x29
+    #endif
+
+
+    LDP  x0, x1, [sp], #16
+    LDP  x2, x3, [sp], #16
+
+    MRS  x4, CurrentEL
+    LSR  x4, x4, #2
+    CMP  x4, #3 /* EL3 */
+    B.EQ  OSStartHighRdy_EL3
+    CMP  x4, #2 /* EL2 */
+    B.EQ  OSStartHighRdy_EL2
+    CMP  x4, #1 /* EL1 */
+    B.EQ  OSStartHighRdy_EL1
+
+    B . /* Can't run the kernel from EL0 */
+
+OSStartHighRdy_EL3:
+    MSR  SPSR_EL3, x1
+    MSR  ELR_EL3, x3
+    B  OSStartHighRdy_Restore
+
+OSStartHighRdy_EL2:
+    MSR  SPSR_EL2, x1
+    MSR  ELR_EL2, x3
+    B  OSStartHighRdy_Restore
+
+OSStartHighRdy_EL1:
+    MSR  SPSR_EL1, x1
+    MSR  ELR_EL1, x3
+    B  OSStartHighRdy_Restore
+
+OSStartHighRdy_Restore:
+    #if OS_CPU_EL3 == 0
+    MOV  x0, sp
+    SUB  x0, x0, #240
+    MSR  SP_EL1, x0
+    #endif
+
+    LDP  x0, x1, [sp], #16
+    LDP  x2, x3, [sp], #16
+    LDP  x4, x5, [sp], #16
+    LDP  x6, x7, [sp], #16
+    LDP  x8, x9, [sp], #16
+    LDP  x10, x11, [sp], #16
+    LDP  x12, x13, [sp], #16
+    LDP  x14, x15, [sp], #16
+    LDP  x16, x17, [sp], #16
+    LDP  x18, x19, [sp], #16
+    LDP  x20, x21, [sp], #16
+    LDP  x22, x23, [sp], #16
+    LDP  x24, x25, [sp], #16
+    LDP  x26, x27, [sp], #16
+    LDP  x28, x29, [sp], #16
+    ERET
+
+/*
+*********************************************************************************************************
+*                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+*
+* Note(s) : 1) OSCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+*
+*           2) The pseudo-code for OSCtxSw() is:
+*              a) Save the current task's context onto the current task's stack,
+*              b) OSTCBCurPtr->StkPtr = SP*
+*              c) OSTaskSwHook()*
+*              d) OSPrioCur           = OSPrioHighRdy*
+*              e) OSTCBCurPtr         = OSTCBHighRdyPtr*
+*              f) SP                  = OSTCBHighRdyPtr->StkPtr*
+*              g) Restore the new task's context from the new task's stack,
+*              h) Return to new task's code.
+*
+*           3) Upon entry:
+*              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+*              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+*********************************************************************************************************
+*/
+
+OSCtxSw:
+
+    OS_CPU_ARM_REG_PUSHF
+
+    LDR x0, =OSTCBCurPtr
+    LDR x1, [x0]
+    MOV x2, sp
+    STR x2, [x1]
+
+
+    BL OSTaskSwHook
+
+
+    LDR x0, =OSPrioCur
+    LDR x1, =OSPrioHighRdy
+    LDRB w2, [x1]
+    STRB w2, [x0]
+
+
+    LDR x0, =OSTCBCurPtr
+    LDR x1, =OSTCBHighRdyPtr
+    LDR x2, [x1]
+    STR x2, [x0]
+
+
+    LDR x0, [x2]
+    MOV sp, x0
+
+    OS_CPU_ARM_REG_POP
+    ERET
+
+
+/*
+*********************************************************************************************************
+*                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+*
+* Note(s) : 1) OSIntCtxSw() is called in SVC mode with BOTH FIQ and IRQ interrupts DISABLED.
+*
+*           2) The pseudo-code for OSCtxSw() is:
+*              a) OSTaskSwHook()*
+*              b) OSPrioCur   = OSPrioHighRdy*
+*              c) OSTCBCurPtr = OSTCBHighRdyPtr*
+*              d) SP          = OSTCBHighRdyPtr->OSTCBStkPtr*
+*              e) Restore the new task's context from the new task's stack,
+*              f) Return to new task's code.
+*
+*           3) Upon entry:
+*              OSTCBCurPtr      points to the OS_TCB of the task to suspend,
+*              OSTCBHighRdyPtr  points to the OS_TCB of the task to resume.
+*********************************************************************************************************
+*/
+
+OSIntCtxSw:
+
+    BL OSTaskSwHook
+
+    LDR x0, =OSPrioCur
+    LDR x1, =OSPrioHighRdy
+    LDRB w2, [x1]
+    STRB w2, [x0]
+
+
+    LDR x0, =OSTCBCurPtr
+    LDR x1, =OSTCBHighRdyPtr
+    LDR x2, [x1]
+    STR x2, [x0]
+
+
+    LDR x0, [x2]
+    MOV sp, x0
+
+    OS_CPU_ARM_REG_POP
+    ERET
+
+
+    .global OS_CPU_ARM_ExceptIrqHndlr
+
+OS_CPU_ARM_ExceptIrqHndlr:
+
+    OS_CPU_ARM_REG_PUSH
+
+    LDR  x0, =OSIntNestingCtr
+    LDRB w1, [x0]
+    ADD  w1, w1, #1
+    STRB w1, [x0]
+    CMP  w1, #1
+    BNE  OS_CPU_ARM_ExceptHndlr_BreakExcept
+
+    LDR  x0, =OSTCBCurPtr
+    LDR  x1, [x0]
+    MOV  x2, sp
+    STR  x2, [x1]
+
+    LDR  x0, =OS_CPU_ExceptStkBase
+    LDR  x1, [x0]
+    MOV  sp, x1
+
+    BL   OS_CPU_ExceptHndlr
+
+    BL   OSIntExit
+
+    LDR  x0, =OSTCBCurPtr
+    LDR  x1, [x0]
+    LDR  x2, [x1]
+    MOV  sp, x2
+
+    OS_CPU_ARM_REG_POP
+    ERET
+
+
+OS_CPU_ARM_ExceptHndlr_BreakExcept:
+
+    .global  OS_CPU_ExceptHndlr
+    BL   OS_CPU_ExceptHndlr
+
+    LDR  x0, =OSIntNestingCtr
+    LDRB w1, [x0]
+    SUB  w1, w1, #1
+    STRB w1, [x0]
+
+    OS_CPU_ARM_REG_POP
+
+    ERET
+
+
+OS_CPU_SPSRGet:
+    #if OS_CPU_EL3 == 1
+    MOV x0, #0x0000000D
+    #else
+    MOV x0, #0x00000005
+    #endif
+
+    RET
+
+
+OS_CPU_SIMDGet:
+    #if OS_CPU_SIMD == 1
+    MOV x0, #1
+    #else
+    MOV x0, #0
+    #endif
+
+    RET
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_c.c b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_c.c
new file mode 100644
index 0000000..d8e95d6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-A50/Generic/GNU/os_cpu_c.c
@@ -0,0 +1,360 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-III
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                      Generic ARM Cortex-A50 Port
+*
+* File      : os_cpu_c.c
+* Version   : V3.05.01
+* By        : JBL
+*
+* LICENSING TERMS:
+* ---------------
+*             uC/OS-III is provided in source form to registered licensees ONLY.  It is 
+*             illegal to distribute this source code to any third party unless you receive 
+*             written permission by an authorized Micrium representative.  Knowledge of 
+*             the source code may NOT be used to develop a similar product.
+*
+*             Please help us continue to provide the Embedded community with the finest
+*             software available.  Your honesty is greatly appreciated.
+*
+*             You can contact us at www.micrium.com.
+*
+
+* For       : ARM Cortex-A50
+* Mode      : AArch64
+* Toolchain : ARM Compiler Toolchain
+*********************************************************************************************************
+*/
+
+#define   OS_CPU_GLOBALS
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_cpu_c__c = "$Id: $";
+#endif
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "../../../../Source/os.h"
+#include  "os_cpu.h"
+
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do
+*              such things as STOP the CPU to conserve power.
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSIdleTaskHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppIdleTaskHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppIdleTaskHookPtr)();
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*
+* Description: This function is called by OSInit() at the beginning of OSInit().
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSInitHook (void)
+{
+    CPU_STK_SIZE   i;
+    CPU_STK       *p_stk;
+
+
+    p_stk = OSCfg_ISRStkBasePtr;                            /* Clear the ISR stack                                    */
+    for (i = 0u; i < OSCfg_ISRStkSize; i++) {
+        *p_stk++ = (CPU_STK)0u;
+    }
+    OS_CPU_ExceptStkBase = (CPU_STK *)(OSCfg_ISRStkBasePtr + OSCfg_ISRStkSize - 1u);
+    OS_CPU_ExceptStkBase = (CPU_STK *)((CPU_STK)OS_CPU_ExceptStkBase & ~(CPU_CFG_STK_ALIGN_BYTES - 1u));
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                         STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-III's statistics task.  This allows your
+*              application to add functionality to the statistics task.
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSStatTaskHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppStatTaskHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppStatTaskHookPtr)();
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task being created.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSTaskCreateHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskCreateHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskCreateHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task being deleted.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSTaskDelHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskDelHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskDelHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            TASK RETURN HOOK
+*
+* Description: This function is called if a task accidentally returns.  In other words, a task should
+*              either be an infinite loop or delete itself when done.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task that is returning.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSTaskReturnHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskReturnHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskReturnHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+**********************************************************************************************************
+*                                       INITIALIZE A TASK'S STACK
+*
+* Description: This function is called by OS_Task_Create() or OSTaskCreateExt() to initialize the stack
+*              frame of the task being created. This function is highly processor specific.
+*
+* Arguments  : p_task       Pointer to the task entry point address.
+*
+*              p_arg        Pointer to a user supplied data area that will be passed to the task
+*                               when the task first executes.
+*
+*              p_stk_base   Pointer to the base address of the stack.
+*
+*              stk_size     Size of the stack, in number of CPU_STK elements.
+*
+*              opt          Options used to alter the behavior of OS_Task_StkInit().
+*                            (see OS.H for OS_TASK_OPT_xxx).
+*
+* Returns    : Always returns the location of the new top-of-stack' once the processor registers have
+*              been placed on the stack in the proper order.
+*
+* Note(s)    : 1) Interrupts are enabled when task starts executing.
+*
+*              2) All tasks run in SVC mode.
+**********************************************************************************************************
+*/
+
+CPU_STK  *OSTaskStkInit (OS_TASK_PTR    p_task,
+                         void          *p_arg,
+                         CPU_STK       *p_stk_base,
+                         CPU_STK       *p_stk_limit,
+                         CPU_STK_SIZE   stk_size,
+                         OS_OPT         opt)
+{
+    CPU_STK    *p_stk;
+    CPU_STK     task_addr;
+    CPU_INT32U  i;
+
+
+    (void)opt;                                                  /* Prevent compiler warning                             */
+
+    p_stk     = &p_stk_base[stk_size];                          /* Load stack pointer                                   */
+
+    p_stk     = (CPU_STK *)((CPU_STK)p_stk & ~(CPU_CFG_STK_ALIGN_BYTES - 1u)); /* Align stack pointer.                  */
+
+    task_addr = (CPU_STK)p_task;
+
+    for (i = 29; i > 0; i--) {
+        *--p_stk = (CPU_INT64U)i;                               /* Reg X1-X29                                           */
+    }
+
+    *--p_stk  = (CPU_STK)p_arg;                                 /* Reg X0 : argument                                    */
+
+    *--p_stk  = (CPU_STK)task_addr;                             /* Entry Point                                          */
+    *--p_stk  = (CPU_STK)OS_TaskReturn;                         /* Reg X30 (LR)                                         */
+
+    *--p_stk  = (CPU_STK)OS_CPU_SPSRGet();
+    *--p_stk  = (CPU_STK)OS_CPU_SPSRGet();
+
+    if (OS_CPU_SIMDGet() == 1u) {
+        for (i = 64; i > 0; i--) {
+            *--p_stk = (CPU_INT64U)i;                           /* Reg Q1-Q31                                           */
+        }
+
+        *--p_stk = 0x0000000000000000;                          /* FPCR                                                 */
+        *--p_stk = 0x0000000000000000;                          /* FPSR                                                 */
+    }
+
+    return (p_stk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other
+*              operations during a context switch.
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdyPtr' points to the TCB of the task
+*                 that will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCurPtr' points
+*                 to the task being switched out (i.e. the preempted task).
+*********************************************************************************************************
+*/
+
+void  OSTaskSwHook (void)
+{
+#if OS_CFG_TASK_PROFILE_EN > 0u
+    CPU_TS  ts;
+#endif
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+    CPU_TS  int_dis_time;
+#endif
+
+
+
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskSwHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppTaskSwHookPtr)();
+    }
+#endif
+
+#if OS_CFG_TASK_PROFILE_EN > 0u
+    ts = OS_TS_GET();
+    if (OSTCBCurPtr != OSTCBHighRdyPtr) {
+        OSTCBCurPtr->CyclesDelta  = ts - OSTCBCurPtr->CyclesStart;
+        OSTCBCurPtr->CyclesTotal += (OS_CYCLES)OSTCBCurPtr->CyclesDelta;
+    }
+
+    OSTCBHighRdyPtr->CyclesStart = ts;
+#endif
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+    int_dis_time = CPU_IntDisMeasMaxCurReset();                   /* Keep track of per-task interrupt disable time    */
+    if (OSTCBCurPtr->IntDisTimeMax < int_dis_time) {
+        OSTCBCurPtr->IntDisTimeMax = int_dis_time;
+    }
+#endif
+
+#if OS_CFG_SCHED_LOCK_TIME_MEAS_EN > 0u
+    if (OSTCBCurPtr->SchedLockTimeMax < OSSchedLockTimeMaxCur) {  /* Keep track of per-task scheduler lock time       */
+        OSTCBCurPtr->SchedLockTimeMax = OSSchedLockTimeMaxCur;
+    }
+    OSSchedLockTimeMaxCur = (CPU_TS)0;                            /* Reset the per-task value                         */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                              TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) This function is assumed to be called from the Tick ISR.
+*********************************************************************************************************
+*/
+
+void  OSTimeTickHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTimeTickHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppTimeTickHookPtr)();
+    }
+#endif
+}
+
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-M7/os_cpu_a.asm b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-M7/os_cpu_a.asm
new file mode 100644
index 0000000..5c91ce6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-M7/os_cpu_a.asm
@@ -0,0 +1,343 @@
+@
+@********************************************************************************************************
+@                                                uC/OS-II
+@                                          The Real-Time Kernel
+@
+@
+@                         (c) Copyright 2009-2016; Micrium, Inc.; Weston, FL
+@                    All rights reserved.  Protected by international copyright laws.
+@
+@                                              ARMv7-M Port
+@
+@ File      : OS_CPU_A.ASM
+@ Version   : V2.92.12.00
+@ By        : JJL
+@             BAN
+@             JBL
+@
+@ For       : ARMv7M Cortex-M
+@ Mode      : Thumb-2 ISA
+@ Toolchain : GNU C Compiler
+@
+@ Note(s)   : (1) This port supports the ARM Cortex-M3, Cortex-M4 and Cortex-M7 architectures.
+@             (2) It has been tested with the following Hardware Floating Point Unit.
+@                 (a) Single-precision: FPv4-SP-D16-M and FPv5-SP-D16-M
+@                 (b) Double-precision: FPv5-D16-M
+@********************************************************************************************************
+@
+
+@********************************************************************************************************
+@                                          PUBLIC FUNCTIONS
+@********************************************************************************************************
+
+    .extern  OSRunning                                          @ External references
+    .extern  OSPrioCur
+    .extern  OSPrioHighRdy
+    .extern  OSTCBCur
+    .extern  OSTCBHighRdy
+    .extern  OSIntExit
+    .extern  OSTaskSwHook
+    .extern  OS_CPU_ExceptStkBase
+
+
+    .global  OSStartHighRdy                                     @ Functions declared in this file
+    .global  OS_CPU_SR_Save
+    .global  OS_CPU_SR_Restore
+    .global  OSCtxSw
+    .global  OSIntCtxSw
+    .global  OS_CPU_PendSVHandler
+
+#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
+    .global  OS_CPU_FP_Reg_Push
+    .global  OS_CPU_FP_Reg_Pop
+#endif
+
+
+@********************************************************************************************************
+@                                               EQUATES
+@********************************************************************************************************
+
+.equ NVIC_INT_CTRL,     0xE000ED04                              @ Interrupt control state register.
+.equ NVIC_SYSPRI14,     0xE000ED22                              @ System priority register (priority 14).
+.equ NVIC_PENDSV_PRI,   0xFF                                    @ PendSV priority value (lowest).
+.equ NVIC_PENDSVSET,    0x10000000                              @ Value to trigger PendSV exception.
+
+
+@********************************************************************************************************
+@                                     CODE GENERATION DIRECTIVES
+@********************************************************************************************************
+
+   .text
+   .align 2
+   .thumb
+   .syntax unified
+
+
+@********************************************************************************************************
+@                                   FLOATING POINT REGISTERS PUSH
+@                             void  OS_CPU_FP_Reg_Push (OS_STK  *stkPtr)
+@
+@ Note(s) : 1) This function saves S16-S31 registers of the Floating Point Unit.
+@
+@           2) Pseudo-code is:
+@              a) Push remaining FPU regs S16-S31 on process stack;
+@              b) Update OSTCBCur->OSTCBStkPtr;
+@********************************************************************************************************
+
+#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
+
+.thumb_func
+OS_CPU_FP_Reg_Push:
+    MRS     R1, PSP                                             @ PSP is process stack pointer
+    CBZ     R1, OS_CPU_FP_nosave                                @ Skip FP register save the first time
+
+    VSTMDB  R0!, {S16-S31}
+    LDR     R1, =OSTCBCur
+    LDR     R2, [R1]
+    STR     R0, [R2]
+OS_CPU_FP_nosave:
+    BX      LR
+#endif
+
+
+@********************************************************************************************************
+@                                   FLOATING POINT REGISTERS POP
+@                             void  OS_CPU_FP_Reg_Pop (OS_STK  *stkPtr)
+@
+@ Note(s) : 1) This function restores S16-S31 of the Floating Point Unit.
+@
+@           2) Pseudo-code is:
+@              a) Restore regs S16-S31 of new process stack;
+@              b) Update OSTCBHighRdy->OSTCBStkPtr pointer of new proces stack;
+@********************************************************************************************************
+
+#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
+
+.thumb_func
+OS_CPU_FP_Reg_Pop:
+    VLDMIA  R0!, {S16-S31}
+    LDR     R1, =OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R0, [R2]
+    BX      LR
+#endif
+
+
+@********************************************************************************************************
+@                                   CRITICAL SECTION METHOD 3 FUNCTIONS
+@
+@ Description: Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
+@              would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
+@              disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
+@              disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
+@              into the CPU's status register.
+@
+@ Prototypes :     OS_CPU_SR  OS_CPU_SR_Save(void);
+@                  void       OS_CPU_SR_Restore(OS_CPU_SR cpu_sr);
+@
+@
+@ Note(s)    : 1) These functions are used in general like this:
+@
+@                 void Task (void *p_arg)
+@                 {
+@                 #if OS_CRITICAL_METHOD == 3          /* Allocate storage for CPU status register */
+@                     OS_CPU_SR  cpu_sr;
+@                 #endif
+@
+@                          :
+@                          :
+@                     OS_ENTER_CRITICAL();             /* cpu_sr = OS_CPU_SaveSR();                */
+@                          :
+@                          :
+@                     OS_EXIT_CRITICAL();              /* OS_CPU_RestoreSR(cpu_sr);                */
+@                          :
+@                          :
+@                 }
+@********************************************************************************************************
+
+.thumb_func
+OS_CPU_SR_Save:
+    MRS     R0, PRIMASK                                         @ Set prio int mask to mask all (except faults)
+    CPSID   I
+    BX      LR
+
+.thumb_func
+OS_CPU_SR_Restore:
+    MSR     PRIMASK, R0
+    BX      LR
+
+
+@********************************************************************************************************
+@                                         START MULTITASKING
+@                                      void OSStartHighRdy(void)
+@
+@ Note(s) : 1) This function triggers a PendSV exception (essentially, causes a context switch) to cause
+@              the first task to start.
+@
+@           2) OSStartHighRdy() MUST:
+@              a) Setup PendSV exception priority to lowest;
+@              b) Set initial PSP to 0, to tell context switcher this is first run;
+@              c) Set the main stack to OS_CPU_ExceptStkBase
+@              d) Set OSRunning to TRUE;
+@              e) Get current high priority, OSPrioCur = OSPrioHighRdy;
+@              f) Get current ready thread TCB, OSTCBCur = OSTCBHighRdy;
+@              g) Get new process SP from TCB, SP = OSTCBHighRdy->OSTCBStkPtr;
+@              h) Restore R0-R11 and R14 from new process stack;
+@              i) Enable interrupts (tasks will run with interrupts enabled).
+@********************************************************************************************************
+
+.thumb_func
+OSStartHighRdy:
+    CPSID   I                                                   @ Prevent interruption during context switch
+    MOVW    R0, #:lower16:NVIC_SYSPRI14                         @ Set the PendSV exception priority
+    MOVT    R0, #:upper16:NVIC_SYSPRI14
+
+    MOVW    R1, #:lower16:NVIC_PENDSV_PRI
+    MOVT    R1, #:upper16:NVIC_PENDSV_PRI
+    STRB    R1, [R0]
+
+    MOVS    R0, #0                                              @ Set the PSP to 0 for initial context switch call
+    MSR     PSP, R0
+
+    MOVW    R0, #:lower16:OS_CPU_ExceptStkBase                  @ Initialize the MSP to the OS_CPU_ExceptStkBase
+    MOVT    R0, #:upper16:OS_CPU_ExceptStkBase
+    LDR     R1, [R0]
+    MSR     MSP, R1
+
+    BL      OSTaskSwHook                                        @ Call OSTaskSwHook() for FPU Push & Pop
+
+    LDR     R0, =OSRunning                                      @ OSRunning = TRUE
+    MOVS    R1, #1
+    STRB    R1, [R0]
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur   = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R0, #:lower16:OSTCBCur                              @ OSTCBCur  = OSTCBHighRdy;
+    MOVT    R0, #:upper16:OSTCBCur
+    MOVW    R1, #:lower16:OSTCBHighRdy
+    MOVT    R1, #:upper16:OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R0]
+
+    LDR     R0, [R2]                                            @ R0 is new process SP; SP = OSTCBHighRdy->OSTCBStkPtr;
+    MSR     PSP, R0                                             @ Load PSP with new process SP
+
+    MRS     R0, CONTROL
+    ORR     R0, R0, #2
+    MSR     CONTROL, R0
+    ISB                                                         @ Sync instruction stream
+
+    LDMFD    SP!, {R4-R11, LR}                                  @ Restore r4-11, lr from new process stack
+    LDMFD    SP!, {R0-R3}                                       @ Restore r0, r3
+    LDMFD    SP!, {R12, LR}                                     @ Load R12 and LR
+    LDMFD    SP!, {R1, R2}                                      @ Load PC and discard xPSR
+    CPSIE    I
+    BX       R1
+
+
+@********************************************************************************************************
+@                       PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
+@
+@ Note(s) : 1) OSCtxSw() is called when OS wants to perform a task context switch.  This function
+@              triggers the PendSV exception which is where the real work is done.
+@********************************************************************************************************
+
+.thumb_func
+OSCtxSw:
+    LDR     R0, =NVIC_INT_CTRL                                  @ Trigger the PendSV exception (causes context switch)
+    LDR     R1, =NVIC_PENDSVSET
+    STR     R1, [R0]
+    BX      LR
+
+
+@********************************************************************************************************
+@                   PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
+@
+@ Note(s) : 1) OSIntCtxSw() is called by OSIntExit() when it determines a context switch is needed as
+@              the result of an interrupt.  This function simply triggers a PendSV exception which will
+@              be handled when there are no more interrupts active and interrupts are enabled.
+@********************************************************************************************************
+
+.thumb_func
+OSIntCtxSw:
+    LDR     R0, =NVIC_INT_CTRL                                  @ Trigger the PendSV exception (causes context switch)
+    LDR     R1, =NVIC_PENDSVSET
+    STR     R1, [R0]
+    BX      LR
+
+
+@********************************************************************************************************
+@                                       HANDLE PendSV EXCEPTION
+@                                   void OS_CPU_PendSVHandler(void)
+@
+@ Note(s) : 1) PendSV is used to cause a context switch.  This is a recommended method for performing
+@              context switches with Cortex-M.  This is because the Cortex-M auto-saves half of the
+@              processor context on any exception, and restores same on return from exception.  So only
+@              saving of R4-R11 & R14 is required and fixing up the stack pointers. Using the PendSV exception
+@              this way means that context saving and restoring is identical whether it is initiated from
+@              a thread or occurs due to an interrupt or exception.
+@
+@           2) Pseudo-code is:
+@              a) Get the process SP
+@              b) Save remaining regs r4-r11 & r14 on process stack;
+@              c) Save the process SP in its TCB, OSTCBCur->OSTCBStkPtr = SP;
+@              d) Call OSTaskSwHook();
+@              e) Get current high priority, OSPrioCur = OSPrioHighRdy;
+@              f) Get current ready thread TCB, OSTCBCur = OSTCBHighRdy;
+@              g) Get new process SP from TCB, SP = OSTCBHighRdy->OSTCBStkPtr;
+@              h) Restore R4-R11 and R14 from new process stack;
+@              i) Perform exception return which will restore remaining context.
+@
+@           3) On entry into PendSV handler:
+@              a) The following have been saved on the process stack (by processor):
+@                 xPSR, PC, LR, R12, R0-R3
+@              b) Processor mode is switched to Handler mode (from Thread mode)
+@              c) Stack is Main stack (switched from Process stack)
+@              d) OSTCBCur      points to the OS_TCB of the task to suspend
+@                 OSTCBHighRdy  points to the OS_TCB of the task to resume
+@
+@           4) Since PendSV is set to lowest priority in the system (by OSStartHighRdy() above), we
+@              know that it will only be run when no other exception or interrupt is active, and
+@              therefore safe to assume that context being switched out was using the process stack (PSP).
+@********************************************************************************************************
+
+.thumb_func
+OS_CPU_PendSVHandler:
+    CPSID   I                                                   @ Prevent interruption during context switch
+    MRS     R0, PSP                                             @ PSP is process stack pointer
+    STMFD   R0!, {R4-R11, R14}                                  @ Save remaining regs r4-11, R14 on process stack
+
+    MOVW    R5, #:lower16:OSTCBCur                              @ OSTCBCur->OSTCBStkPtr = SP;
+    MOVT    R5, #:upper16:OSTCBCur
+    LDR     R1, [R5]
+    STR     R0, [R1]                                            @ R0 is SP of process being switched out
+
+                                                                @ At this point, entire context of process has been saved
+    MOV     R4, LR                                              @ Save LR exc_return value
+    BL      OSTaskSwHook                                        @ Call OSTaskSwHook() for FPU Push & Pop
+
+    MOVW    R0, #:lower16:OSPrioCur                             @ OSPrioCur   = OSPrioHighRdy;
+    MOVT    R0, #:upper16:OSPrioCur
+    MOVW    R1, #:lower16:OSPrioHighRdy
+    MOVT    R1, #:upper16:OSPrioHighRdy
+    LDRB    R2, [R1]
+    STRB    R2, [R0]
+
+    MOVW    R1, #:lower16:OSTCBHighRdy                          @ OSTCBCur  = OSTCBHighRdy;
+    MOVT    R1, #:upper16:OSTCBHighRdy
+    LDR     R2, [R1]
+    STR     R2, [R5]
+
+    ORR     LR,  R4, #0x04                                      @ Ensure exception return uses process stack
+    LDR     R0,  [R2]                                           @ R0 is new process SP; SP = OSTCBHighRdy->OSTCBStkPtr;
+    LDMFD   R0!, {R4-R11, R14}                                  @ Restore r4-11, R14 from new process stack
+    MSR     PSP, R0                                             @ Load PSP with new process SP
+    CPSIE   I
+    BX      LR                                                  @ Exception return will restore remaining context
+
+.end
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-M7/os_cpu_c.c b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-M7/os_cpu_c.c
new file mode 100644
index 0000000..5a09e7c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-M7/os_cpu_c.c
@@ -0,0 +1,726 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2016; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                              ARMv7-M Port
+*
+* File      : OS_CPU_C.C
+* Version   : V2.92.12.00
+* By        : JJL
+*             BAN
+*             JBL
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com, or by phone at +1 (954) 217-2036.
+*
+* For       : ARMv7M Cortex-M
+* Mode      : Thumb-2 ISA
+* Toolchain : GNU C Compiler
+*
+* Note(s)   : (1) This port supports the ARM Cortex-M3, Cortex-M4 and Cortex-M7 architectures.
+*             (2) It has been tested with the following Hardware Floating Point Unit.
+*                 (a) Single-precision: FPv4-SP-D16-M and FPv5-SP-D16-M
+*                 (b) Double-precision: FPv5-D16-M
+*********************************************************************************************************
+*/
+
+#define   OS_CPU_GLOBALS
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if OS_TMR_EN > 0u
+static  INT16U  OSTmrCtr;
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          SYS TICK DEFINES
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_CM_NVIC_ST_CTRL    (*((volatile INT32U *)0xE000E010uL)) /* SysTick Ctrl & Status Reg.                  */
+#define  OS_CPU_CM_NVIC_ST_RELOAD  (*((volatile INT32U *)0xE000E014uL)) /* SysTick Reload  Value Reg.                  */
+#define  OS_CPU_CM_NVIC_ST_CURRENT (*((volatile INT32U *)0xE000E018uL)) /* SysTick Current Value Reg.                  */
+#define  OS_CPU_CM_NVIC_ST_CAL     (*((volatile INT32U *)0xE000E01CuL)) /* SysTick Cal     Value Reg.                  */
+#define  OS_CPU_CM_NVIC_SHPRI1     (*((volatile INT32U *)0xE000ED18uL)) /* System Handlers  4 to  7 Prio.              */
+#define  OS_CPU_CM_NVIC_SHPRI2     (*((volatile INT32U *)0xE000ED1CuL)) /* System Handlers  8 to 11 Prio.              */
+#define  OS_CPU_CM_NVIC_SHPRI3     (*((volatile INT32U *)0xE000ED20uL)) /* System Handlers 12 to 15 Prio.              */
+
+
+#define  OS_CPU_CM_NVIC_ST_CTRL_COUNT                    0x00010000uL   /* Count flag.                                 */
+#define  OS_CPU_CM_NVIC_ST_CTRL_CLK_SRC                  0x00000004uL   /* Clock Source.                               */
+#define  OS_CPU_CM_NVIC_ST_CTRL_INTEN                    0x00000002uL   /* Interrupt enable.                           */
+#define  OS_CPU_CM_NVIC_ST_CTRL_ENABLE                   0x00000001uL   /* Counter mode.                               */
+#define  OS_CPU_CM_NVIC_PRIO_MIN                               0xFFu    /* Min handler prio.                           */
+
+
+/*
+*********************************************************************************************************
+*                                         FLOATING POINT DEFINES
+*********************************************************************************************************
+*/
+
+#define  OS_CPU_CM_FP_FPCCR      (*((volatile INT32U *)0xE000EF34uL))   /* Floating-Point Context Control Reg.         */
+
+                                                                        /* Enabled FP lazy stacking and enable ..      */
+                                                                        /* ..automatic state saving.                   */
+#define  OS_CPU_CM_FPCCR_LAZY_STK                      0xC0000000uL
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                            (BEGINNING)
+*
+* Description: This function is called by OSInit() at the beginning of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*              2) When using hardware floating point please do the following during the reset handler:
+*                 a) Set full access for CP10 & CP11 bits in CPACR register.
+*                 b) Set bits ASPEN and LSPEN in FPCCR register.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSInitHookBegin (void)
+{
+    INT32U   size;
+    OS_STK  *pstk;
+#if (OS_CPU_ARM_FP_EN > 0u)
+    INT32U   reg_val;
+#endif
+                                                                /* Clear exception stack for stack checking.            */
+    pstk = &OS_CPU_ExceptStk[0];
+    size = OS_CPU_EXCEPT_STK_SIZE;
+    while (size > 0u) {
+        size--;
+       *pstk++ = (OS_STK)0;
+    }
+
+                                                                /* Align the ISR stack to 8-bytes                       */
+    OS_CPU_ExceptStkBase = (OS_STK *)&OS_CPU_ExceptStk[OS_CPU_EXCEPT_STK_SIZE];
+    OS_CPU_ExceptStkBase = (OS_STK *)((OS_STK)(OS_CPU_ExceptStkBase) & 0xFFFFFFF8);
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+    reg_val = OS_CPU_CM_FP_FPCCR;                               /* Check the floating point mode.                       */
+    if ((reg_val & OS_CPU_CM_FPCCR_LAZY_STK) != OS_CPU_CM_FPCCR_LAZY_STK) {
+        while (1u) {                                            /* See Note (2).                                        */
+            ;
+        }
+    }
+#endif
+
+#if OS_TMR_EN > 0u
+    OSTmrCtr = 0u;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*                                               (END)
+*
+* Description: This function is called by OSInit() at the end of OSInit().
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSInitHookEnd (void)
+{
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being created.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskCreateHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskCreateHook(ptcb);
+#else
+    (void)ptcb;                                                 /* Prevent compiler warning                             */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : ptcb   is a pointer to the task control block of the task being deleted.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskDelHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskDelHook(ptcb);
+#else
+    (void)ptcb;                                                 /* Prevent compiler warning                             */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do
+*              such things as STOP the CPU to conserve power.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are enabled during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskIdleHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskIdleHook();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            TASK RETURN HOOK
+*
+* Description: This function is called if a task accidentally returns.  In other words, a task should
+*              either be an infinite loop or delete itself when done.
+*
+* Arguments  : ptcb      is a pointer to the task control block of the task that is returning.
+*
+* Note(s)    : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskReturnHook (OS_TCB  *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskReturnHook(ptcb);
+#else
+    (void)ptcb;
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-II's statistics task.  This allows your
+*              application to add functionality to the statistics task.
+*
+* Arguments  : none
+*********************************************************************************************************
+*/
+
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTaskStatHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskStatHook();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        INITIALIZE A TASK'S STACK
+*
+* Description: This function is called by either OSTaskCreate() or OSTaskCreateExt() to initialize the
+*              stack frame of the task being created.  This function is highly processor specific.
+*
+* Arguments  : task          is a pointer to the task code
+*
+*              p_arg         is a pointer to a user supplied data area that will be passed to the task
+*                            when the task first executes.
+*
+*              ptos          is a pointer to the top of stack.  It is assumed that 'ptos' points to
+*                            a 'free' entry on the task stack.  If OS_STK_GROWTH is set to 1 then
+*                            'ptos' will contain the HIGHEST valid address of the stack.  Similarly, if
+*                            OS_STK_GROWTH is set to 0, the 'ptos' will contains the LOWEST valid address
+*                            of the stack.
+*
+*              opt           specifies options that can be used to alter the behavior of OSTaskStkInit().
+*                            (see uCOS_II.H for OS_TASK_OPT_xxx).
+*
+* Returns    : Always returns the location of the new top-of-stack once the processor registers have
+*              been placed on the stack in the proper order.
+*
+* Note(s)    : (1) Interrupts are enabled when task starts executing.
+*
+*              (2) All tasks run in Thread mode, using process stack.
+*
+*              (3) There are two different stack frames depending on whether the Floating-Point(FP)
+*                  co-processor is enabled or not.
+*
+*                  (a) The stack frame shown in the diagram is used when the Co-processor Access Control
+*                      Register(CPACR) is disabling the Floating Point Unit. In this case, the FP
+*                      registers(S0- S31) & FP Status Control(FPSCR) register are not saved in the stack frame.
+*
+*                  (b) The stack frame shown in the diagram is used when the Floating Point Unit is enabled,
+*                      that is, CP10 and CP11 field in CPACR are ones and FPCCR sets bits ASPEN and LSPEN to 1.
+*
+*                      (1) When enabling the FPU through CPACR, make sure to set bits ASPEN and LSPEN in the
+*                          Floating-Point Context Control Register (FPCCR).
+*
+*                                          +-------------+
+*                                          |             |
+*                                          +-------------+
+*                                          |             |
+*                                          +-------------+
+*                                          |    FPSCR    |
+*                                          +-------------+
+*                                          |     S15     |
+*                                          +-------------+
+*                                          |     S14     |
+*                                          +-------------+
+*                                          |     S13     |
+*                                          +-------------+
+*                                                .
+*                                                .
+*                                                .
+*                                          +-------------+
+*                                          |     S2      |
+*                                          +-------------+
+*                                          |     S1      |
+*                    +-------------+       +-------------+
+*                    |             |       |     S0      |
+*                    +-------------+       +-------------+
+*                    |    xPSR     |       |    xPSR     |
+*                    +-------------+       +-------------+
+*                    | Return Addr |       | Return Addr |
+*                    +-------------+       +-------------+
+*                    |  LR(R14)    |       |   LR(R14)   |
+*                    +-------------+       +-------------+
+*                    |    R12      |       |     R12     |
+*                    +-------------+       +-------------+
+*                    |    R3       |       |     R3      |
+*                    +-------------+       +-------------+
+*                    |    R2       |       |     R0      |
+*                    +-------------+       +-------------+
+*                    |    R1       |       |     R1      |
+*                    +-------------+       +-------------+
+*                    |    R0       |       |     R0      |
+*                    +-------------+       +-------------+
+*                    | EXEC_RETURN |       | EXEC_RETURN |
+*                    +-------------+       +-------------+
+*                    |    R11      |       |     R11     |
+*                    +-------------+       +-------------+
+*                    |    R10      |       |     R10     |
+*                    +-------------+       +-------------+
+*                    |    R9       |       |     R9      |
+*                    +-------------+       +-------------+
+*                    |    R8       |       |     R8      |
+*                    +-------------+       +-------------+
+*                    |    R7       |       |     R7      |
+*                    +-------------+       +-------------+
+*                    |    R6       |       |     R6      |
+*                    +-------------+       +-------------+
+*                    |    R5       |       |     R5      |
+*                    +-------------+       +-------------+
+*                    |    R4       |       |     R4      |
+*                    +-------------+       +-------------+
+*                          (a)             |     S31     |
+*                                          +-------------+
+*                                          |     S30     |
+*                                          +-------------+
+*                                          |     S29     |
+                                           +-------------+
+*                                                .
+*                                                .
+*                                                .
+*                                          +-------------+
+*                                          |     S17     |
+                                           +-------------+
+*                                          |     S16     |
+*                                          +-------------+
+*                                               (b)
+*
+*             (4) The SP must be 8-byte aligned in conforming to the Procedure Call Standard for the ARM architecture
+*
+*                    (a) Section 2.1 of the  ABI for the ARM Architecture Advisory Note. SP must be 8-byte aligned
+*                        on entry to AAPCS-Conforming functions states :
+*
+*                        The Procedure Call Standard for the ARM Architecture [AAPCS] requires primitive
+*                        data types to be naturally aligned according to their sizes (for size = 1, 2, 4, 8 bytes).
+*                        Doing otherwise creates more problems than it solves.
+*
+*                        In return for preserving the natural alignment of data, conforming code is permitted
+*                        to rely on that alignment. To support aligning data allocated on the stack, the stack
+*                        pointer (SP) is required to be 8-byte aligned on entry to a conforming function. In
+*                        practice this requirement is met if:
+*
+*                           (1) At each call site, the current size of the calling function’s stack frame is a multiple of 8 bytes.
+*                               This places an obligation on compilers and assembly language programmers.
+*
+*                           (2) SP is a multiple of 8 when control first enters a program.
+*                               This places an obligation on authors of low level OS, RTOS, and runtime library
+*                               code to align SP at all points at which control first enters
+*                               a body of (AAPCS-conforming) code.
+*
+*                       In turn, this requires the value of SP to be aligned to 0 modulo 8:
+*
+*                           (3) By exception handlers, before calling AAPCS-conforming code.
+*
+*                           (4) By OS/RTOS/run-time system code, before giving control to an application.
+*
+*                 (b) Section 2.3.1 corrective steps from the the SP must be 8-byte aligned on entry
+*                     to AAPCS-conforming functions advisory note also states.
+*
+*                     " This requirement extends to operating systems and run-time code for all architecture versions
+*                       prior to ARMV7 and to the A, R and M architecture profiles thereafter. Special considerations
+*                       associated with ARMV7M are discussed in section 2.3.3"
+*
+*                     (1) Even if the SP 8-byte aligment is not a requirement for the ARMv7M profile, the stack is aligned
+*                         to 8-byte boundaries to support legacy execution enviroments.
+*
+*                 (c) Section 5.2.1.2 from the Procedure Call Standard for the ARM
+*                     architecture states :  "The stack must also conform to the following
+*                     constraint at a public interface:
+*
+*                     (1) SP mod 8 = 0. The stack must be double-word aligned"
+*
+*                 (d) From the ARM Technical Support Knowledge Base. 8 Byte stack aligment.
+*
+*                     "8 byte stack alignment is a requirement of the ARM Architecture Procedure
+*                      Call Standard [AAPCS]. This specifies that functions must maintain an 8 byte
+*                      aligned stack address (e.g. 0x00, 0x08, 0x10, 0x18, 0x20) on all external
+*                      interfaces. In practice this requirement is met if:
+*
+*                      (1) At each external interface, the current stack pointer
+*                          is a multiple of 8 bytes.
+*
+*                      (2) Your OS maintains 8 byte stack alignment on its external interfaces
+*                          e.g. on task switches"
+*
+*              (5) Exception Return Behavior(EXEC_RETURN)
+*                  0xFFFFFFFD      Return to Thread mode, exception return uses non-floating point state
+*                                  from the PSP and execution uses PSP after return.
+*
+*                  0xFFFFFFED      Return to Thread mode, exception return uses floating point state
+*                                  from the PSP and execution uses PSP after return.
+**********************************************************************************************************
+*/
+
+OS_STK  *OSTaskStkInit (void    (*task)(void *p_arg),
+                        void     *p_arg,
+                        OS_STK   *ptos,
+                        INT16U    opt)
+{
+    OS_STK  *p_stk;
+
+
+    (void)opt;                                                  /* 'opt' is not used, prevent warning                   */
+    p_stk      = ptos + 1u;                                     /* Load stack pointer                                   */
+                                                                /* Align the stack to 8-bytes.                          */
+    p_stk      = (OS_STK *)((OS_STK)(p_stk) & 0xFFFFFFF8u);
+                                                                /* Registers stacked as if auto-saved on exception      */
+#if (OS_CPU_ARM_FP_EN > 0u)                                     /* FPU auto-saved registers.                            */
+     --p_stk;
+    *(--p_stk) = (OS_STK)0x02000000u;                           /* FPSCR                                                */
+                                                                /* Initialize S0-S15 floating point registers           */
+    *(--p_stk) = (OS_STK)0x41700000u;                           /* S15                                                  */
+    *(--p_stk) = (OS_STK)0x41600000u;                           /* S14                                                  */
+    *(--p_stk) = (OS_STK)0x41500000u;                           /* S13                                                  */
+    *(--p_stk) = (OS_STK)0x41400000u;                           /* S12                                                  */
+    *(--p_stk) = (OS_STK)0x41300000u;                           /* S11                                                  */
+    *(--p_stk) = (OS_STK)0x41200000u;                           /* S10                                                  */
+    *(--p_stk) = (OS_STK)0x41100000u;                           /* S9                                                   */
+    *(--p_stk) = (OS_STK)0x41000000u;                           /* S8                                                   */
+    *(--p_stk) = (OS_STK)0x40E00000u;                           /* S7                                                   */
+    *(--p_stk) = (OS_STK)0x40C00000u;                           /* S6                                                   */
+    *(--p_stk) = (OS_STK)0x40A00000u;                           /* S5                                                   */
+    *(--p_stk) = (OS_STK)0x40800000u;                           /* S4                                                   */
+    *(--p_stk) = (OS_STK)0x40400000u;                           /* S3                                                   */
+    *(--p_stk) = (OS_STK)0x40000000u;                           /* S2                                                   */
+    *(--p_stk) = (OS_STK)0x3F800000u;                           /* S1                                                   */
+    *(--p_stk) = (OS_STK)0x00000000u;                           /* S0                                                   */
+#endif
+    *(--p_stk) = (OS_STK)0x01000000uL;                          /* xPSR                                                 */
+    *(--p_stk) = (OS_STK)task;                                  /* Entry Point                                          */
+    *(--p_stk) = (OS_STK)OS_TaskReturn;                         /* R14 (LR)                                             */
+    *(--p_stk) = (OS_STK)0x12121212uL;                          /* R12                                                  */
+    *(--p_stk) = (OS_STK)0x03030303uL;                          /* R3                                                   */
+    *(--p_stk) = (OS_STK)0x02020202uL;                          /* R2                                                   */
+    *(--p_stk) = (OS_STK)0x01010101uL;                          /* R1                                                   */
+    *(--p_stk) = (OS_STK)p_arg;                                 /* R0 : argument                                        */
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+    *(--p_stk) = (OS_STK)0xFFFFFFEDuL;                          /* R14: EXEC_RETURN; See Note 5                         */
+#else
+    *(--p_stk) = (OS_STK)0xFFFFFFFDuL;                          /* R14: EXEC_RETURN; See Note 5                         */
+#endif
+                                                                /* Remaining registers saved on process stack           */
+    *(--p_stk) = (OS_STK)0x11111111uL;                          /* R11                                                  */
+    *(--p_stk) = (OS_STK)0x10101010uL;                          /* R10                                                  */
+    *(--p_stk) = (OS_STK)0x09090909uL;                          /* R9                                                   */
+    *(--p_stk) = (OS_STK)0x08080808uL;                          /* R8                                                   */
+    *(--p_stk) = (OS_STK)0x07070707uL;                          /* R7                                                   */
+    *(--p_stk) = (OS_STK)0x06060606uL;                          /* R6                                                   */
+    *(--p_stk) = (OS_STK)0x05050505uL;                          /* R5                                                   */
+    *(--p_stk) = (OS_STK)0x04040404uL;                          /* R4                                                   */
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+                                                                /* Initialize S16-S31 floating point registers          */
+    *(--p_stk) = (OS_STK)0x41F80000u;                           /* S31                                                  */
+    *(--p_stk) = (OS_STK)0x41F00000u;                           /* S30                                                  */
+    *(--p_stk) = (OS_STK)0x41E80000u;                           /* S29                                                  */
+    *(--p_stk) = (OS_STK)0x41E00000u;                           /* S28                                                  */
+    *(--p_stk) = (OS_STK)0x41D80000u;                           /* S27                                                  */
+    *(--p_stk) = (OS_STK)0x41D00000u;                           /* S26                                                  */
+    *(--p_stk) = (OS_STK)0x41C80000u;                           /* S25                                                  */
+    *(--p_stk) = (OS_STK)0x41C00000u;                           /* S24                                                  */
+    *(--p_stk) = (OS_STK)0x41B80000u;                           /* S23                                                  */
+    *(--p_stk) = (OS_STK)0x41B00000u;                           /* S22                                                  */
+    *(--p_stk) = (OS_STK)0x41A80000u;                           /* S21                                                  */
+    *(--p_stk) = (OS_STK)0x41A00000u;                           /* S20                                                  */
+    *(--p_stk) = (OS_STK)0x41980000u;                           /* S19                                                  */
+    *(--p_stk) = (OS_STK)0x41900000u;                           /* S18                                                  */
+    *(--p_stk) = (OS_STK)0x41880000u;                           /* S17                                                  */
+    *(--p_stk) = (OS_STK)0x41800000u;                           /* S16                                                  */
+#endif
+
+    return (p_stk);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other
+*              operations during a context switch.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that
+*                 will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the
+*                 task being switched out (i.e. the preempted task).
+*********************************************************************************************************
+*/
+#if (OS_CPU_HOOKS_EN > 0u) && (OS_TASK_SW_HOOK_EN > 0u)
+void  OSTaskSwHook (void)
+{
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+    OS_CPU_FP_Reg_Push(OSTCBCur->OSTCBStkPtr);                  /* Push the FP registers of the current task.           */
+#endif
+
+#if OS_APP_HOOKS_EN > 0u
+    App_TaskSwHook();
+#endif
+
+#if (OS_CPU_ARM_FP_EN > 0u)
+    OS_CPU_FP_Reg_Pop(OSTCBHighRdy->OSTCBStkPtr);               /* Pop the FP registers of the highest ready task.      */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           OS_TCBInit() HOOK
+*
+* Description: This function is called by OS_TCBInit() after setting up most of the TCB.
+*
+* Arguments  : ptcb    is a pointer to the TCB of the task being created.
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if OS_CPU_HOOKS_EN > 0u
+void  OSTCBInitHook (OS_TCB *ptcb)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TCBInitHook(ptcb);
+#else
+    (void)ptcb;                                                 /* Prevent compiler warning                             */
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : none
+*
+* Note(s)    : 1) Interrupts may or may not be ENABLED during this call.
+*********************************************************************************************************
+*/
+#if (OS_CPU_HOOKS_EN > 0u) && (OS_TIME_TICK_HOOK_EN > 0u)
+void  OSTimeTickHook (void)
+{
+#if OS_APP_HOOKS_EN > 0u
+    App_TimeTickHook();
+#endif
+
+#if OS_TMR_EN > 0u
+    OSTmrCtr++;
+    if (OSTmrCtr >= (OS_TICKS_PER_SEC / OS_TMR_CFG_TICKS_PER_SEC)) {
+        OSTmrCtr = 0u;
+        OSTmrSignal();
+    }
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                          SYS TICK HANDLER
+*
+* Description: Handle the system tick (SysTick) interrupt, which is used to generate the uC/OS-II tick
+*              interrupt.
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) This function MUST be placed on entry 15 of the Cortex-M vector table.
+*********************************************************************************************************
+*/
+
+void  OS_CPU_SysTickHandler (void)
+{
+#if OS_CRITICAL_METHOD == 3u                                    /* Allocate storage for CPU status register             */
+    OS_CPU_SR  cpu_sr;
+#endif
+
+
+    OS_ENTER_CRITICAL();
+    OSIntEnter();                                               /* Tell uC/OS-II that we are starting an ISR            */
+    OS_EXIT_CRITICAL();
+
+    OSTimeTick();                                               /* Call uC/OS-II's OSTimeTick()                         */
+
+    OSIntExit();                                                /* Tell uC/OS-II that we are leaving the ISR            */
+}
+
+
+/*
+*********************************************************************************************************
+*                                         INITIALIZE SYS TICK
+*
+* Description: Initialize the SysTick using the CPU clock frequency.
+*
+* Arguments  : cpu_freq     CPU clock frequency.
+*
+* Note(s)    : 1) This function MUST be called after OSStart() & after processor initialization.
+*
+*              2) Either OS_CPU_SysTickInitFreq or OS_CPU_SysTickInit() can be called.
+*********************************************************************************************************
+*/
+
+void  OS_CPU_SysTickInitFreq (INT32U  cpu_freq)
+{
+    INT32U  cnts;
+
+
+    cnts = (cpu_freq / (INT32U)OS_TICKS_PER_SEC);               /* Determine nbr SysTick cnts between two OS tick intr. */
+
+    OS_CPU_SysTickInit(cnts);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         INITIALIZE SYS TICK
+*
+* Description: Initialize the SysTick using the number of counts between two ticks.
+*
+* Arguments  : cnts     Number of SysTick counts between two OS tick interrupts.
+*
+* Note(s)    : 1) This function MUST be called after OSStart() & after processor initialization.
+*
+*              2) Either OS_CPU_SysTickInitFreq or OS_CPU_SysTickInit() can be called.
+*********************************************************************************************************
+*/
+
+void  OS_CPU_SysTickInit (INT32U  cnts)
+{
+    INT32U  prio;
+
+    
+    OS_CPU_CM_NVIC_ST_RELOAD = cnts - 1u;
+
+                                                                /* Set SysTick handler prio.                            */
+    prio  =  OS_CPU_CM_NVIC_SHPRI3;
+    prio &=  0x00FFFFFFu;
+    prio |= (OS_CPU_CFG_SYSTICK_PRIO << 24u);
+
+    OS_CPU_CM_NVIC_SHPRI3 = prio;
+
+                                                                /* Enable timer.                                        */
+    OS_CPU_CM_NVIC_ST_CTRL |= OS_CPU_CM_NVIC_ST_CTRL_CLK_SRC |
+                              OS_CPU_CM_NVIC_ST_CTRL_ENABLE;
+                                                                /* Enable timer interrupt.                              */
+    OS_CPU_CM_NVIC_ST_CTRL |= OS_CPU_CM_NVIC_ST_CTRL_INTEN;
+}
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-M7/os_dbg.c b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-M7/os_dbg.c
new file mode 100644
index 0000000..4393b12
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/ARM-Cortex-M7/os_dbg.c
@@ -0,0 +1,334 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-II
+*                                          The Real-Time Kernel
+*                                           DEBUGGER CONSTANTS
+*
+*                              (c) Copyright 1992-2016; Micrium, Weston, FL
+*                                           All Rights Reserved
+*
+* File    : OS_DBG.C
+* By      : Jean J. Labrosse
+* Version : V2.92.12.00
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-II is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-II in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-II for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-II.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+*
+* For       : ARMv7M Cortex-M
+* Mode      : Thumb-2 ISA
+* Toolchain : GNU C Compiler
+*
+* Note(s)   : (1) This port supports the ARM Cortex-M3, Cortex-M4 and Cortex-M7 architectures.
+*             (2) It has been tested with the following Hardware Floating Point Unit.
+*                 (a) Single-precision: FPv4-SP-D16-M and FPv5-SP-D16-M
+*                 (b) Double-precision: FPv5-D16-M
+*********************************************************************************************************
+*/
+
+#include 
+
+#define  OS_COMPILER_OPT
+
+/*
+*********************************************************************************************************
+*                                             DEBUG DATA
+*********************************************************************************************************
+*/
+
+OS_COMPILER_OPT  INT16U  const  OSDebugEn           = OS_DEBUG_EN;               /* Debug constants are defined below   */
+
+#if OS_DEBUG_EN > 0u
+
+OS_COMPILER_OPT  INT32U  const  OSEndiannessTest    = 0x12345678L;               /* Variable to test CPU endianness     */
+
+OS_COMPILER_OPT  INT16U  const  OSEventEn           = OS_EVENT_EN;
+OS_COMPILER_OPT  INT16U  const  OSEventMax          = OS_MAX_EVENTS;             /* Number of event control blocks      */
+OS_COMPILER_OPT  INT16U  const  OSEventNameEn       = OS_EVENT_NAME_EN;
+#if (OS_EVENT_EN > 0u) && (OS_MAX_EVENTS > 0u)
+OS_COMPILER_OPT  INT16U  const  OSEventSize         = sizeof(OS_EVENT);          /* Size in Bytes of OS_EVENT           */
+OS_COMPILER_OPT  INT16U  const  OSEventTblSize      = sizeof(OSEventTbl);        /* Size of OSEventTbl[] in bytes       */
+#else
+OS_COMPILER_OPT  INT16U  const  OSEventSize         = 0u;
+OS_COMPILER_OPT  INT16U  const  OSEventTblSize      = 0u;
+#endif
+OS_COMPILER_OPT  INT16U  const  OSEventMultiEn      = OS_EVENT_MULTI_EN;
+
+
+OS_COMPILER_OPT  INT16U  const  OSFlagEn            = OS_FLAG_EN;
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+OS_COMPILER_OPT  INT16U  const  OSFlagGrpSize       = sizeof(OS_FLAG_GRP);       /* Size in Bytes of OS_FLAG_GRP        */
+OS_COMPILER_OPT  INT16U  const  OSFlagNodeSize      = sizeof(OS_FLAG_NODE);      /* Size in Bytes of OS_FLAG_NODE       */
+OS_COMPILER_OPT  INT16U  const  OSFlagWidth         = sizeof(OS_FLAGS);          /* Width (in bytes) of OS_FLAGS        */
+#else
+OS_COMPILER_OPT  INT16U  const  OSFlagGrpSize       = 0u;
+OS_COMPILER_OPT  INT16U  const  OSFlagNodeSize      = 0u;
+OS_COMPILER_OPT  INT16U  const  OSFlagWidth         = 0u;
+#endif
+OS_COMPILER_OPT  INT16U  const  OSFlagMax           = OS_MAX_FLAGS;
+OS_COMPILER_OPT  INT16U  const  OSFlagNameEn        = OS_FLAG_NAME_EN;
+
+OS_COMPILER_OPT  INT16U  const  OSLowestPrio        = OS_LOWEST_PRIO;
+
+OS_COMPILER_OPT  INT16U  const  OSMboxEn            = OS_MBOX_EN;
+
+OS_COMPILER_OPT  INT16U  const  OSMemEn             = OS_MEM_EN;
+OS_COMPILER_OPT  INT16U  const  OSMemMax            = OS_MAX_MEM_PART;           /* Number of memory partitions         */
+OS_COMPILER_OPT  INT16U  const  OSMemNameEn         = OS_MEM_NAME_EN;
+#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u)
+OS_COMPILER_OPT  INT16U  const  OSMemSize           = sizeof(OS_MEM);            /* Mem. Partition header sine (bytes)  */
+OS_COMPILER_OPT  INT16U  const  OSMemTblSize        = sizeof(OSMemTbl);
+#else
+OS_COMPILER_OPT  INT16U  const  OSMemSize           = 0u;
+OS_COMPILER_OPT  INT16U  const  OSMemTblSize        = 0u;
+#endif
+OS_COMPILER_OPT  INT16U  const  OSMutexEn           = OS_MUTEX_EN;
+
+OS_COMPILER_OPT  INT16U  const  OSPtrSize           = sizeof(void *);            /* Size in Bytes of a pointer          */
+
+OS_COMPILER_OPT  INT16U  const  OSQEn               = OS_Q_EN;
+OS_COMPILER_OPT  INT16U  const  OSQMax              = OS_MAX_QS;                 /* Number of queues                    */
+#if (OS_Q_EN > 0u) && (OS_MAX_QS > 0u)
+OS_COMPILER_OPT  INT16U  const  OSQSize             = sizeof(OS_Q);              /* Size in bytes of OS_Q structure     */
+#else
+OS_COMPILER_OPT  INT16U  const  OSQSize             = 0u;
+#endif
+
+OS_COMPILER_OPT  INT16U  const  OSRdyTblSize        = OS_RDY_TBL_SIZE;           /* Number of bytes in the ready table  */
+
+OS_COMPILER_OPT  INT16U  const  OSSemEn             = OS_SEM_EN;
+
+OS_COMPILER_OPT  INT16U  const  OSStkWidth          = sizeof(OS_STK);            /* Size in Bytes of a stack entry      */
+
+OS_COMPILER_OPT  INT16U  const  OSTaskCreateEn      = OS_TASK_CREATE_EN;
+OS_COMPILER_OPT  INT16U  const  OSTaskCreateExtEn   = OS_TASK_CREATE_EXT_EN;
+OS_COMPILER_OPT  INT16U  const  OSTaskDelEn         = OS_TASK_DEL_EN;
+OS_COMPILER_OPT  INT16U  const  OSTaskIdleStkSize   = OS_TASK_IDLE_STK_SIZE;
+OS_COMPILER_OPT  INT16U  const  OSTaskProfileEn     = OS_TASK_PROFILE_EN;
+OS_COMPILER_OPT  INT16U  const  OSTaskMax           = OS_MAX_TASKS + OS_N_SYS_TASKS; /* Total max. number of tasks      */
+OS_COMPILER_OPT  INT16U  const  OSTaskNameEn        = OS_TASK_NAME_EN;
+OS_COMPILER_OPT  INT16U  const  OSTaskStatEn        = OS_TASK_STAT_EN;
+OS_COMPILER_OPT  INT16U  const  OSTaskStatStkSize   = OS_TASK_STAT_STK_SIZE;
+OS_COMPILER_OPT  INT16U  const  OSTaskStatStkChkEn  = OS_TASK_STAT_STK_CHK_EN;
+OS_COMPILER_OPT  INT16U  const  OSTaskSwHookEn      = OS_TASK_SW_HOOK_EN;
+OS_COMPILER_OPT  INT16U  const  OSTaskRegTblSize    = OS_TASK_REG_TBL_SIZE;
+
+OS_COMPILER_OPT  INT16U  const  OSTCBPrioTblMax     = OS_LOWEST_PRIO + 1u;       /* Number of entries in OSTCBPrioTbl[] */
+OS_COMPILER_OPT  INT16U  const  OSTCBSize           = sizeof(OS_TCB);            /* Size in Bytes of OS_TCB             */
+OS_COMPILER_OPT  INT16U  const  OSTicksPerSec       = OS_TICKS_PER_SEC;
+OS_COMPILER_OPT  INT16U  const  OSTimeTickHookEn    = OS_TIME_TICK_HOOK_EN;
+OS_COMPILER_OPT  INT16U  const  OSVersionNbr        = OS_VERSION;
+
+OS_COMPILER_OPT  INT16U  const  OSTmrEn             = OS_TMR_EN;
+OS_COMPILER_OPT  INT16U  const  OSTmrCfgMax         = OS_TMR_CFG_MAX;
+OS_COMPILER_OPT  INT16U  const  OSTmrCfgNameEn      = OS_TMR_CFG_NAME_EN;
+OS_COMPILER_OPT  INT16U  const  OSTmrCfgWheelSize   = OS_TMR_CFG_WHEEL_SIZE;
+OS_COMPILER_OPT  INT16U  const  OSTmrCfgTicksPerSec = OS_TMR_CFG_TICKS_PER_SEC;
+
+#if (OS_TMR_EN > 0u) && (OS_TMR_CFG_MAX > 0u)
+OS_COMPILER_OPT  INT16U  const  OSTmrSize           = sizeof(OS_TMR);
+OS_COMPILER_OPT  INT16U  const  OSTmrTblSize        = sizeof(OSTmrTbl);
+OS_COMPILER_OPT  INT16U  const  OSTmrWheelSize      = sizeof(OS_TMR_WHEEL);
+OS_COMPILER_OPT  INT16U  const  OSTmrWheelTblSize   = sizeof(OSTmrWheelTbl);
+#else
+OS_COMPILER_OPT  INT16U  const  OSTmrSize           = 0u;
+OS_COMPILER_OPT  INT16U  const  OSTmrTblSize        = 0u;
+OS_COMPILER_OPT  INT16U  const  OSTmrWheelSize      = 0u;
+OS_COMPILER_OPT  INT16U  const  OSTmrWheelTblSize   = 0u;
+#endif
+
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                             DEBUG DATA
+*                            TOTAL DATA SPACE (i.e. RAM) USED BY uC/OS-II
+*********************************************************************************************************
+*/
+#if OS_DEBUG_EN > 0u
+
+OS_COMPILER_OPT  INT16U  const  OSDataSize = sizeof(OSCtxSwCtr)
+#if (OS_EVENT_EN > 0u) && (OS_MAX_EVENTS > 0u)
+                          + sizeof(OSEventFreeList)
+                          + sizeof(OSEventTbl)
+#endif
+#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u)
+                          + sizeof(OSFlagTbl)
+                          + sizeof(OSFlagFreeList)
+#endif
+#if OS_TASK_STAT_EN > 0u
+                          + sizeof(OSCPUUsage)
+                          + sizeof(OSIdleCtrMax)
+                          + sizeof(OSIdleCtrRun)
+                          + sizeof(OSStatRdy)
+                          + sizeof(OSTaskStatStk)
+#endif
+#if OS_TICK_STEP_EN > 0u
+                          + sizeof(OSTickStepState)
+#endif
+#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u)
+                          + sizeof(OSMemFreeList)
+                          + sizeof(OSMemTbl)
+#endif
+#if (OS_Q_EN > 0u) && (OS_MAX_QS > 0u)
+                          + sizeof(OSQFreeList)
+                          + sizeof(OSQTbl)
+#endif
+#if OS_TIME_GET_SET_EN > 0u
+                          + sizeof(OSTime)
+#endif
+#if (OS_TMR_EN > 0u) && (OS_TMR_CFG_MAX > 0u)
+                          + sizeof(OSTmrFree)
+                          + sizeof(OSTmrUsed)
+                          + sizeof(OSTmrTime)
+                          + sizeof(OSTmrSem)
+                          + sizeof(OSTmrSemSignal)
+                          + sizeof(OSTmrTbl)
+                          + sizeof(OSTmrFreeList)
+                          + sizeof(OSTmrTaskStk)
+                          + sizeof(OSTmrWheelTbl)
+#endif
+                          + sizeof(OSIntNesting)
+                          + sizeof(OSLockNesting)
+                          + sizeof(OSPrioCur)
+                          + sizeof(OSPrioHighRdy)
+                          + sizeof(OSRdyGrp)
+                          + sizeof(OSRdyTbl)
+                          + sizeof(OSRunning)
+                          + sizeof(OSTaskCtr)
+                          + sizeof(OSIdleCtr)
+                          + sizeof(OSTaskIdleStk)
+                          + sizeof(OSTCBCur)
+                          + sizeof(OSTCBFreeList)
+                          + sizeof(OSTCBHighRdy)
+                          + sizeof(OSTCBList)
+                          + sizeof(OSTCBPrioTbl)
+                          + sizeof(OSTCBTbl);
+
+#endif
+
+/*$PAGE*/
+/*
+*********************************************************************************************************
+*                                        OS DEBUG INITIALIZATION
+*
+* Description: This function is used to make sure that debug variables that are unused in the application
+*              are not optimized away.  This function might not be necessary for all compilers.  In this
+*              case, you should simply DELETE the code in this function while still leaving the declaration
+*              of the function itself.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : (1) This code doesn't do anything, it simply prevents the compiler from optimizing out
+*                  the 'const' variables which are declared in this file.
+*              (2) You may decide to 'compile out' the code (by using #if 0/#endif) INSIDE the function
+*                  if your compiler DOES NOT optimize out the 'const' variables above.
+*********************************************************************************************************
+*/
+
+#if OS_DEBUG_EN > 0u
+void  OSDebugInit (void)
+{
+    void  *ptemp;
+
+
+    ptemp = (void *)&OSDebugEn;
+
+    ptemp = (void *)&OSEndiannessTest;
+
+    ptemp = (void *)&OSEventMax;
+    ptemp = (void *)&OSEventNameEn;
+    ptemp = (void *)&OSEventEn;
+    ptemp = (void *)&OSEventSize;
+    ptemp = (void *)&OSEventTblSize;
+    ptemp = (void *)&OSEventMultiEn;
+
+    ptemp = (void *)&OSFlagEn;
+    ptemp = (void *)&OSFlagGrpSize;
+    ptemp = (void *)&OSFlagNodeSize;
+    ptemp = (void *)&OSFlagWidth;
+    ptemp = (void *)&OSFlagMax;
+    ptemp = (void *)&OSFlagNameEn;
+
+    ptemp = (void *)&OSLowestPrio;
+
+    ptemp = (void *)&OSMboxEn;
+
+    ptemp = (void *)&OSMemEn;
+    ptemp = (void *)&OSMemMax;
+    ptemp = (void *)&OSMemNameEn;
+    ptemp = (void *)&OSMemSize;
+    ptemp = (void *)&OSMemTblSize;
+
+    ptemp = (void *)&OSMutexEn;
+
+    ptemp = (void *)&OSPtrSize;
+
+    ptemp = (void *)&OSQEn;
+    ptemp = (void *)&OSQMax;
+    ptemp = (void *)&OSQSize;
+
+    ptemp = (void *)&OSRdyTblSize;
+
+    ptemp = (void *)&OSSemEn;
+
+    ptemp = (void *)&OSStkWidth;
+
+    ptemp = (void *)&OSTaskCreateEn;
+    ptemp = (void *)&OSTaskCreateExtEn;
+    ptemp = (void *)&OSTaskDelEn;
+    ptemp = (void *)&OSTaskIdleStkSize;
+    ptemp = (void *)&OSTaskProfileEn;
+    ptemp = (void *)&OSTaskMax;
+    ptemp = (void *)&OSTaskNameEn;
+    ptemp = (void *)&OSTaskStatEn;
+    ptemp = (void *)&OSTaskStatStkSize;
+    ptemp = (void *)&OSTaskStatStkChkEn;
+    ptemp = (void *)&OSTaskSwHookEn;
+
+    ptemp = (void *)&OSTCBPrioTblMax;
+    ptemp = (void *)&OSTCBSize;
+
+    ptemp = (void *)&OSTicksPerSec;
+    ptemp = (void *)&OSTimeTickHookEn;
+
+#if OS_TMR_EN > 0u
+    ptemp = (void *)&OSTmrTbl[0];
+    ptemp = (void *)&OSTmrWheelTbl[0];
+
+    ptemp = (void *)&OSTmrEn;
+    ptemp = (void *)&OSTmrCfgMax;
+    ptemp = (void *)&OSTmrCfgNameEn;
+    ptemp = (void *)&OSTmrCfgWheelSize;
+    ptemp = (void *)&OSTmrCfgTicksPerSec;
+    ptemp = (void *)&OSTmrSize;
+    ptemp = (void *)&OSTmrTblSize;
+
+    ptemp = (void *)&OSTmrWheelSize;
+    ptemp = (void *)&OSTmrWheelTblSize;
+#endif
+
+    ptemp = (void *)&OSVersionNbr;
+
+    ptemp = (void *)&OSDataSize;
+
+    ptemp = ptemp;                             /* Prevent compiler warning for 'ptemp' not being used! */
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/MicroBlaze/GNU/os_cpu.h b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/MicroBlaze/GNU/os_cpu.h
new file mode 100644
index 0000000..c5792a1
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/MicroBlaze/GNU/os_cpu.h
@@ -0,0 +1,99 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-III
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                            Xilinx MicroBlaze
+*                                           GNU C/C++ Compiler
+*
+* File      : OS_CPU.H
+* Version   : V3.05.01
+* By        : JJL
+*             NB
+*
+* LICENSING TERMS:
+* ---------------
+*             uC/OS-III is provided in source form to registered licensees ONLY.  It is 
+*             illegal to distribute this source code to any third party unless you receive 
+*             written permission by an authorized Micrium representative.  Knowledge of 
+*             the source code may NOT be used to develop a similar product.
+*
+*             Please help us continue to provide the Embedded community with the finest
+*             software available.  Your honesty is greatly appreciated.
+*
+*             You can find our product's user manual, API reference, release notes and
+*             more information at https://doc.micrium.com.
+*             You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+#ifndef  OS_CPU_H
+#define  OS_CPU_H
+
+#ifdef   OS_CPU_GLOBALS
+#define  OS_CPU_EXT
+#else
+#define  OS_CPU_EXT  extern
+#endif
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+#define  OS_TASK_SW()               OSCtxSw()
+
+/*
+*********************************************************************************************************
+*                                       TIMESTAMP CONFIGURATION
+*
+* Note(s) : (1) OS_TS_GET() is generally defined as CPU_TS_Get32() to allow CPU timestamp timer to be of
+*               any data type size.
+*
+*           (2) For architectures that provide 32-bit or higher precision free running counters 
+*               (i.e. cycle count registers):
+*
+*               (a) OS_TS_GET() may be defined as CPU_TS_TmrRd() to improve performance when retrieving
+*                   the timestamp.
+*
+*               (b) CPU_TS_TmrRd() MUST be configured to be greater or equal to 32-bits to avoid
+*                   truncation of TS.
+*********************************************************************************************************
+*/
+
+#if      OS_CFG_TS_EN == 1u
+#define  OS_TS_GET()               (CPU_TS)CPU_TS_TmrRd()   /* See Note #2a.                                          */
+#else
+#define  OS_TS_GET()               (CPU_TS)0u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  OSCtxSw       (void);
+void  OSIntCtxSw    (void);
+
+void  OSStartHighRdy(void);
+
+void  OS_CPU_ISR    (void);                                 /* See OS_CPU_A.S                                         */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/MicroBlaze/GNU/os_cpu_a.S b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/MicroBlaze/GNU/os_cpu_a.S
new file mode 100644
index 0000000..18e6da8
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/MicroBlaze/GNU/os_cpu_a.S
@@ -0,0 +1,674 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-III
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                            Xilinx MicroBlaze
+*                                           GNU C/C++ Compiler
+*
+* File      : OS_CPU_A.S
+* Version   : V3.05.01
+* By        : NB
+*********************************************************************************************************
+*/
+
+#define _ASMLANGUAGE
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+.equ    STK_OFFSET_RMSR,   0x00
+.equ    STK_OFFSET_R02,    0x04
+.equ    STK_OFFSET_R03,    0x08
+.equ    STK_OFFSET_R04,    0x0C
+.equ    STK_OFFSET_R05,    0x10
+.equ    STK_OFFSET_R06,    0x14
+.equ    STK_OFFSET_R07,    0x18
+.equ    STK_OFFSET_R08,    0x1C
+.equ    STK_OFFSET_R09,    0x20
+.equ    STK_OFFSET_R10,    0x24
+.equ    STK_OFFSET_R11,    0x28
+.equ    STK_OFFSET_R12,    0x2C
+.equ    STK_OFFSET_R13,    0x30
+.equ    STK_OFFSET_R14,    0x34
+.equ    STK_OFFSET_R15,    0x38
+.equ    STK_OFFSET_R17,    0x3C
+.equ    STK_OFFSET_R18,    0x40
+.equ    STK_OFFSET_R19,    0x44
+.equ    STK_OFFSET_R20,    0x48
+.equ    STK_OFFSET_R21,    0x4C
+.equ    STK_OFFSET_R22,    0x50
+.equ    STK_OFFSET_R23,    0x54
+.equ    STK_OFFSET_R24,    0x58
+.equ    STK_OFFSET_R25,    0x5C
+.equ    STK_OFFSET_R26,    0x60
+.equ    STK_OFFSET_R27,    0x64
+.equ    STK_OFFSET_R28,    0x68
+.equ    STK_OFFSET_R29,    0x6C
+.equ    STK_OFFSET_R30,    0x70
+.equ    STK_OFFSET_R31,    0x74
+
+.equ    STK_CTX_SIZE,      0x78
+
+.equ    CPU_IE_BIT,        0x02
+
+
+/*
+*********************************************************************************************************
+*                                          PUBLIC FUNCTIONS
+*********************************************************************************************************
+*/
+
+    .globl     OSStartHighRdy
+    .globl     OSCtxSw
+    .globl     OSIntCtxSw
+
+    .globl     _interrupt_handler
+    .globl     OS_CPU_ISR
+
+
+/*
+*********************************************************************************************************
+*                                         EXTERNAL FUNCTIONS
+*********************************************************************************************************
+*/
+    .extern    OSIntEnter
+    .extern    OSIntExit
+    .extern    OS_CPU_IntHandler
+    .extern    OSTaskSwHook
+
+
+/*
+*********************************************************************************************************
+*                                         EXTERNAL VARIABLES
+*********************************************************************************************************
+*/
+    .extern    OSRunning
+    .extern    OSIntNestingCtr
+    .extern    OSTCBCur
+    .extern    OSTCBHighRdyPtr
+    .extern    OSPrioCur
+    .extern    OSPrioHighRdy
+
+.text
+
+/*
+*********************************************************************************************************
+*                                          OSStartHighRdy()
+*
+* Description: Starts the highest priority task that is available to run.  OSStartHighRdy() MUST:
+*
+*              a) Call OSTaskSwHook()
+*              b) Set OSRunning to TRUE
+*              c) Switch to the highest priority task.
+*
+*              The stack frame of the task to resume is assumed to look as follows:
+*
+*              OSTCBHighRdyPtr->OSTCBStkPtr + 0x00     RMSR   (IE=1)       (LOW Memory)
+*                                           + 0x04     R2
+*                                           + 0x08     R3
+*                                           + 0x0C     R4
+*                                           + 0x10     R5     (p_arg passed to task)
+*                                           + 0x14     R6
+*                                           + 0x18     R7
+*                                           + 0x1C     R8
+*                                           + 0x20     R9
+*                                           + 0x24     R10
+*                                           + 0x28     R11
+*                                           + 0x2C     R12
+*                                           + 0x30     R13
+*                                           + 0x34     R14
+*                                           + 0x38     R15
+*                                           + 0x3C     R17
+*                                           + 0x40     R18
+*                                           + 0x44     R19
+*                                           + 0x48     R20
+*                                           + 0x4C     R21
+*                                           + 0x50     R22
+*                                           + 0x54     R23
+*                                           + 0x58     R24
+*                                           + 0x5C     R25
+*                                           + 0x60     R26
+*                                           + 0x64     R27
+*                                           + 0x68     R28
+*                                           + 0x6C     R29
+*                                           + 0x70     R30
+*                                           + 0x74     R31                 (HIGH MEMORY)
+*********************************************************************************************************
+*/
+
+OSStartHighRdy:
+
+    BRLID   r15, OSTaskSwHook           /* Call OSTaskSwHook()                                         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+    OR      r3,  r3, r0                 /* OSRunning = TRUE                                            */
+    ADDIK   r3,  r0, 1
+    SBI     r3,  r0, OSRunning
+
+    LWI     r3,  r0, OSTCBHighRdyPtr    /* SP       = OSTCBHighRdyPtr->OSTCBStkPtr                     */
+    LW      r1,  r0, r3
+
+    LWI     r31, r1, STK_OFFSET_R31     /* *************** RESTORE TASK'S CONTEXT ***************      */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDNI   r3,  r3, CPU_IE_BIT         /* Clear the IE bit (It will be set by the return from INT.)   */
+    MTS     RMSR,r3
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (i.e. de-allocate storage)               */
+
+    RTID    r14, 0                      /* Branch to task level code enabling interrupts, IE=1         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+/*
+*********************************************************************************************************
+*                                              OSCtxSw()
+*
+* Description: Performs the Context switch from a task.  This function is ALWAYS called with interrupts
+*              DISABLED.
+*
+*              OSCtxSw() must implement the following pseudo-code:
+*
+*                  Save ALL CPU registers;
+*                  OSTCBCur->OSTCBStkPtr = SP;
+*                  OSTaskSwHook();
+*                  OSPrioCur = OSPrioHighRdy;
+*                  OSTCBCur  = OSTCBHighRdyPtr;
+*                  SP        = OSTCBHighRdyPtr->OSTCBStkPtr;
+*                  Restore ALL the CPU registers;
+*                  if (IE bit of saved RMSR is 0) {
+*                      Return from function call;
+*                  } else {
+*                      Set IE bit of RMSR to 0;
+*                      Return from interrupt whcih sets IE back to 1;
+*                  }
+*
+*
+*              The stack frame of the task to suspend will look as follows when OSCtxSw() is done:
+*
+*              OSTCBCur->OSTCBStkPtr        + 0x00     RMSR   (See Note 1) (LOW Memory)
+*                                           + 0x04     R2
+*                                           + 0x08     R3
+*                                           + 0x0C     R4
+*                                           + 0x10     R5     (p_arg passed to task)
+*                                           + 0x14     R6
+*                                           + 0x18     R7
+*                                           + 0x1C     R8
+*                                           + 0x20     R9
+*                                           + 0x24     R10
+*                                           + 0x28     R11
+*                                           + 0x2C     R12
+*                                           + 0x30     R13
+*                                           + 0x34     R14
+*                                           + 0x38     R15
+*                                           + 0x3C     R17
+*                                           + 0x40     R18
+*                                           + 0x44     R19
+*                                           + 0x48     R20
+*                                           + 0x4C     R21
+*                                           + 0x50     R22
+*                                           + 0x54     R23
+*                                           + 0x58     R24
+*                                           + 0x5C     R25
+*                                           + 0x60     R26
+*                                           + 0x64     R27
+*                                           + 0x68     R28
+*                                           + 0x6C     R29
+*                                           + 0x70     R30
+*                                           + 0x74     R31                 (HIGH MEMORY)
+*
+*              The stack frame of the task to resume looks as follows:
+*
+*              OSTCBHighRdyPtr->OSTCBStkPtr + 0x00     RMSR   (See Note 2) (LOW Memory)
+*                                           + 0x04     R2
+*                                           + 0x08     R3
+*                                           + 0x0C     R4
+*                                           + 0x10     R5
+*                                           + 0x14     R6
+*                                           + 0x18     R7
+*                                           + 0x1C     R8
+*                                           + 0x20     R9
+*                                           + 0x24     R10
+*                                           + 0x28     R11
+*                                           + 0x2C     R12
+*                                           + 0x30     R13
+*                                           + 0x34     R14
+*                                           + 0x38     R15
+*                                           + 0x3C     R17
+*                                           + 0x40     R18
+*                                           + 0x44     R19
+*                                           + 0x48     R20
+*                                           + 0x4C     R21
+*                                           + 0x50     R22
+*                                           + 0x54     R23
+*                                           + 0x58     R24
+*                                           + 0x5C     R25
+*                                           + 0x60     R26
+*                                           + 0x64     R27
+*                                           + 0x68     R28
+*                                           + 0x6C     R29
+*                                           + 0x70     R30
+*                                           + 0x74     R31                 (HIGH MEMORY)
+*
+* Note(s)    : 1) OSCtxSw() is ALWAYS called with IE set to 0 (i.e. interrupts disabled).
+*              2) If the task frame was saved by OSCtxSw(), IE would be set to 0.
+*                 If the task frame was saved by an ISR,    IE would be set to 1.
+*********************************************************************************************************
+*/
+
+OSCtxSw:
+                                        /* *************** SAVE CURRENT TASK'S CONTEXT *************** */
+    ADDIK   r1,  r1, -STK_CTX_SIZE      /* Allocate storage for saving registers onto stack            */
+
+    SWI     r2,  r1,  STK_OFFSET_R02    /* Save the remaining registers onto the task's stack          */
+    SWI     r3,  r1,  STK_OFFSET_R03
+    SWI     r4,  r1,  STK_OFFSET_R04
+    SWI     r5,  r1,  STK_OFFSET_R05
+    SWI     r6,  r1,  STK_OFFSET_R06
+    SWI     r7,  r1,  STK_OFFSET_R07
+    SWI     r8,  r1,  STK_OFFSET_R08
+    SWI     r9,  r1,  STK_OFFSET_R09
+    SWI     r10, r1,  STK_OFFSET_R10
+    SWI     r11, r1,  STK_OFFSET_R11
+    SWI     r12, r1,  STK_OFFSET_R12
+    SWI     r13, r1,  STK_OFFSET_R13
+    SWI     r14, r1,  STK_OFFSET_R14
+    SWI     r15, r1,  STK_OFFSET_R15
+    SWI     r17, r1,  STK_OFFSET_R17
+    SWI     r18, r1,  STK_OFFSET_R18
+    SWI     r19, r1,  STK_OFFSET_R19
+    SWI     r20, r1,  STK_OFFSET_R20
+    SWI     r21, r1,  STK_OFFSET_R21
+    SWI     r22, r1,  STK_OFFSET_R22
+    SWI     r23, r1,  STK_OFFSET_R23
+    SWI     r24, r1,  STK_OFFSET_R24
+    SWI     r25, r1,  STK_OFFSET_R25
+    SWI     r26, r1,  STK_OFFSET_R26
+    SWI     r27, r1,  STK_OFFSET_R27
+    SWI     r28, r1,  STK_OFFSET_R28
+    SWI     r29, r1,  STK_OFFSET_R29
+    SWI     r30, r1,  STK_OFFSET_R30
+    SWI     r31, r1,  STK_OFFSET_R31
+
+    MFS     r3,  RMSR                   /* save the MSR (See Note 1)                                   */
+    SWI     r3,  r1,  STK_OFFSET_RMSR
+
+    LWI     r3,  r0, OSTCBCurPtr        /* OSTCBCur->OSTCBStkPtr = SP                                  */
+    SW      r1,  r0, r3
+
+    BRLID   r15, OSTaskSwHook           /* Call OSTaskSwHook()                                         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+    LBUI    r3,  r0, OSPrioHighRdy      /* OSPrioCur = OSPrioHighRdy                                   */
+    SBI     r3,  r0, OSPrioCur
+
+    LWI     r3,  r0, OSTCBHighRdyPtr    /* OSTCBCur  = OSTCBHighRdyPtr                                 */
+    SWI     r3,  r0, OSTCBCurPtr
+
+    LW      r1,  r0, r3                 /* SP = OSTCBHighRdyPtr->OSTCBStkPtr                           */
+
+    LWI     r31, r1, STK_OFFSET_R31     /* **************** RESTORE NEW TASK'S CONTEXT *************** */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDI    r3,  r3, CPU_IE_BIT         /* See if IE is 0 (Saved by OSCtxSw()) or 1 (Saved by ISR)     */
+    BNEI    r3,  OSCtxSw_SavedByISR     /* Branch if ISR saved context                                 */
+
+                                        /* *********** The context was saved by OSCtxSw() ************ */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    MTS     RMSR,r3
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (deallocate storage)                     */
+
+    RTSD    r15, 8                      /* Context was saved by OSCtxSw()                              */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+OSCtxSw_SavedByISR:
+                                        /* ************ The context was saved by an ISR ************** */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDNI   r3,  r3, CPU_IE_BIT         /* Clear the IE bit (It will be set by the return from INT.)   */
+    MTS     RMSR,r3
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (deallocate storage)                     */
+
+    RTID    r14, 0                      /* Context was saved by ISR, return address is in R14, Set IE  */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+/*
+*********************************************************************************************************
+*                                            OSIntCtxSw()
+*
+* Description: Performs the Context Switch from an ISR.
+*
+*              OSIntCtxSw() must implement the following pseudo-code:
+*
+*                  OSTaskSwHook();
+*                  OSPrioCur = OSPrioHighRdy;
+*                  OSTCBCur  = OSTCBHighRdyPtr;
+*                  SP        = OSTCBHighRdyPtr->OSTCBStkPtr;
+*                  Restore ALL the CPU registers;
+*                  if (IE bit of saved RMSR is 0) {
+*                      Return from function call;
+*                  } else {
+*                      Set IE bit of RMSR to 0;
+*                      Return from interrupt;
+*                  }
+*
+*              Upon entry, the registers of the task being suspended have already been saved onto that
+*              task's stack and the SP for the task has been saved in its OS_TCB by the ISR.
+*
+*              The stack frame of the task to resume is assumed to look as follows:
+*
+*              OSTCBHighRdyPtr->OSTCBStkPtr + 0x00     RMSR   (See Note 1) (LOW Memory)
+*                                           + 0x04     R2
+*                                           + 0x08     R3
+*                                           + 0x0C     R4
+*                                           + 0x10     R5
+*                                           + 0x14     R6
+*                                           + 0x18     R7
+*                                           + 0x1C     R8
+*                                           + 0x20     R9
+*                                           + 0x24     R10
+*                                           + 0x28     R11
+*                                           + 0x2C     R12
+*                                           + 0x30     R13
+*                                           + 0x34     R14
+*                                           + 0x38     R15
+*                                           + 0x3C     R17
+*                                           + 0x40     R18
+*                                           + 0x44     R19
+*                                           + 0x48     R20
+*                                           + 0x4C     R21
+*                                           + 0x50     R22
+*                                           + 0x54     R23
+*                                           + 0x58     R24
+*                                           + 0x5C     R25
+*                                           + 0x60     R26
+*                                           + 0x64     R27
+*                                           + 0x68     R28
+*                                           + 0x6C     R29
+*                                           + 0x70     R30
+*                                           + 0x74     R31                 (HIGH MEMORY)
+*
+* Note(s)    : 1) If the task frame was saved by OSCtxSw(), IE would be set to 0.
+*                 If the task frame was saved by an ISR,    IE would be set to 1.
+*********************************************************************************************************
+*/
+
+OSIntCtxSw:
+
+    BRLID   r15, OSTaskSwHook           /* Call OSTaskSwHook()                                         */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+    LBUI    r3,  r0, OSPrioHighRdy      /* OSPrioCur = OSPrioHighRdy                                   */
+    SBI     r3,  r0, OSPrioCur
+
+    LWI     r3,  r0, OSTCBHighRdyPtr    /* OSTCBCur  = OSTCBHighRdyPtr                                  */
+    SWI     r3,  r0, OSTCBCurPtr
+
+    LW      r1,  r0, r3                 /* SP = OSTCBHighRdyPtr->OSTCBStkPtr                            */
+
+    LWI     r31, r1, STK_OFFSET_R31     /* **************** RESTORE NEW TASK'S CONTEXT *************** */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDI    r3,  r3, CPU_IE_BIT         /* See if IE is 0 (Saved by OSCtxSw()) or 1 (Saved by ISR)     */
+    BNEI    r3,  OSIntCtxSw_SavedByISR  /* Branch if ISR saved context                                 */
+
+                                        /* *********** The context was saved by OSCtxSw() ************ */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    MTS     RMSR,r3
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (deallocate storage)                     */
+
+    RTSD    r15, 8                      /* Context was saved by OSCtxSw()                              */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+OSIntCtxSw_SavedByISR:                  /* ************ The context was saved by an ISR ************** */
+    LWI     r3,  r1, STK_OFFSET_RMSR    /* Get the saved RMSR                                          */
+    ANDNI   r3,  r3, CPU_IE_BIT         /* Clear the IE bit (It will be set by the return from INT.)   */
+    MTS     RMSR,r3
+    LWI     r3,  r1, STK_OFFSET_R03     /* Restore R3 (was used a scratchpad register for RMSR)        */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE       /* Clean up the stack (deallocate storage)                     */
+
+    RTID    r14, 0                      /* Context was saved by ISR, return address is in R14          */
+    AND     r0,  r0, r0                 /* NO-OP                                                       */
+
+/*
+*********************************************************************************************************
+*                                            OS_CPU_ISR()
+*
+* Description: This routine is intended to be the target of the Interrupt processing functionality that
+*              occurs when the MicroBlaze is interrupted. The address, 'XOSExternalInterruptHandler', is
+*              used as the branch destination in the code that is executed at addresses 0x10 and 0x14 in
+*              the MicroBlaze vector table assuming that the vector table is in RAM
+*
+*              The XPS interrupt vector is replaced by OS_CPU_ISR() by executing the code from a C function:
+*
+*                 *(INT32U *)0x00000010 = 0xB0000000 | ((INT32U)OS_CPU_ISR >> 16);
+*                 *(INT32U *)0x00000014 = 0xB8080000 | ((INT32U)OS_CPU_ISR & 0x0000FFFF);
+*
+*              The interrupted task context is saved onto its stack as follows:
+*
+*              OSTCBCur->OSTCBStkPtr     + 0x00     RMSR   (See Note 1) (LOW Memory)
+*                                        + 0x04     R2
+*                                        + 0x08     R3
+*                                        + 0x0C     R4
+*                                        + 0x10     R5     (p_arg passed to task)
+*                                        + 0x14     R6
+*                                        + 0x18     R7
+*                                        + 0x1C     R8
+*                                        + 0x20     R9
+*                                        + 0x24     R10
+*                                        + 0x28     R11
+*                                        + 0x2C     R12
+*                                        + 0x30     R13
+*                                        + 0x34     R14
+*                                        + 0x38     R15
+*                                        + 0x3C     R17
+*                                        + 0x40     R18
+*                                        + 0x44     R19
+*                                        + 0x48     R20
+*                                        + 0x4C     R21
+*                                        + 0x50     R22
+*                                        + 0x54     R23
+*                                        + 0x58     R24
+*                                        + 0x5C     R25
+*                                        + 0x60     R26
+*                                        + 0x64     R27
+*                                        + 0x68     R28
+*                                        + 0x6C     R29
+*                                        + 0x70     R30
+*                                        + 0x74     R31                 (HIGH MEMORY)
+*
+* Note(s)    : 1) The IE bit is saved onto the stack 'set' since the code must return to the interrupted
+*                 task with interrupts enabled.
+*********************************************************************************************************
+*/
+
+_interrupt_handler:
+OS_CPU_ISR:
+                                             /* ********** SAVE INTERRUPTED TASK'S CONTEXT *********** */
+    ADDIK   r1,  r1, -STK_CTX_SIZE           /* Allocate storage for saving registers onto stack       */
+
+    SWI     r2,  r1,  STK_OFFSET_R02
+    SWI     r3,  r1,  STK_OFFSET_R03
+    SWI     r4,  r1,  STK_OFFSET_R04
+    SWI     r5,  r1,  STK_OFFSET_R05
+    SWI     r6,  r1,  STK_OFFSET_R06
+    SWI     r7,  r1,  STK_OFFSET_R07
+    SWI     r8,  r1,  STK_OFFSET_R08
+    SWI     r9,  r1,  STK_OFFSET_R09
+    SWI     r10, r1,  STK_OFFSET_R10
+    SWI     r11, r1,  STK_OFFSET_R11
+    SWI     r12, r1,  STK_OFFSET_R12
+    SWI     r13, r1,  STK_OFFSET_R13
+    SWI     r14, r1,  STK_OFFSET_R14
+    SWI     r15, r1,  STK_OFFSET_R15
+    SWI     r17, r1,  STK_OFFSET_R17
+    SWI     r18, r1,  STK_OFFSET_R18
+    SWI     r19, r1,  STK_OFFSET_R19
+    SWI     r20, r1,  STK_OFFSET_R20
+    SWI     r21, r1,  STK_OFFSET_R21
+    SWI     r22, r1,  STK_OFFSET_R22
+    SWI     r23, r1,  STK_OFFSET_R23
+    SWI     r24, r1,  STK_OFFSET_R24
+    SWI     r25, r1,  STK_OFFSET_R25
+    SWI     r26, r1,  STK_OFFSET_R26
+    SWI     r27, r1,  STK_OFFSET_R27
+    SWI     r28, r1,  STK_OFFSET_R28
+    SWI     r29, r1,  STK_OFFSET_R29
+    SWI     r30, r1,  STK_OFFSET_R30
+    SWI     r31, r1,  STK_OFFSET_R31
+
+    MFS     r3,  RMSR                        /* save the MSR                                           */
+    ORI     r3,  r3, CPU_IE_BIT              /* Set IE to 1 to return to interrupted task with INT en. */
+    SWI     r3,  r1, STK_OFFSET_RMSR         /* MSR is at top of frame                                 */
+
+    LBUI    r3,  r0, OSIntNestingCtr         /* if (OSIntNestingCtr == 0) {                            */
+    BNEI    r3,  OS_CPU_ISR_1
+
+    LWI     r3,  r0, OSTCBCurPtr             /*     OSTCBCur->OSTCBStkPtr = SP                         */
+    SW      r1,  r0, r3                      /* }                                                      */
+
+OS_CPU_ISR_1:
+    LBUI    r3,  r0, OSIntNestingCtr
+    ADDIK   r3,  r3, 1                       /* OSIntNestingCtr+;                                      */
+    SBI     r3,  r0, OSIntNestingCtr
+
+    BRLID   r15, BSP_IntHandler              /* Call the provided C level interrupt handler            */
+    AND     r0,  r0, r0                      /* NO-OP                                                  */
+
+    BRLID   r15, OSIntExit                   /* OSIntExit()                                            */
+    AND     r0,  r0, r0                      /* NO-OP                                                  */
+
+    LWI     r31, r1, STK_OFFSET_R31          /* ********* RESTORE INTERRUPTED TASK'S CONTEXT ********* */
+    LWI     r30, r1, STK_OFFSET_R30
+    LWI     r29, r1, STK_OFFSET_R29
+    LWI     r28, r1, STK_OFFSET_R28
+    LWI     r27, r1, STK_OFFSET_R27
+    LWI     r26, r1, STK_OFFSET_R26
+    LWI     r25, r1, STK_OFFSET_R25
+    LWI     r24, r1, STK_OFFSET_R24
+    LWI     r23, r1, STK_OFFSET_R23
+    LWI     r22, r1, STK_OFFSET_R22
+    LWI     r21, r1, STK_OFFSET_R21
+    LWI     r20, r1, STK_OFFSET_R20
+    LWI     r19, r1, STK_OFFSET_R19
+    LWI     r18, r1, STK_OFFSET_R18
+    LWI     r17, r1, STK_OFFSET_R17
+    LWI     r15, r1, STK_OFFSET_R15
+    LWI     r14, r1, STK_OFFSET_R14
+    LWI     r13, r1, STK_OFFSET_R13
+    LWI     r12, r1, STK_OFFSET_R12
+    LWI     r11, r1, STK_OFFSET_R11
+    LWI     r10, r1, STK_OFFSET_R10
+    LWI     r9,  r1, STK_OFFSET_R09
+    LWI     r8,  r1, STK_OFFSET_R08
+    LWI     r7,  r1, STK_OFFSET_R07
+    LWI     r6,  r1, STK_OFFSET_R06
+    LWI     r5,  r1, STK_OFFSET_R05
+    LWI     r4,  r1, STK_OFFSET_R04
+    LWI     r2,  r1, STK_OFFSET_R02
+
+    LWI     r3,  r1, STK_OFFSET_RMSR         /* Get RMSR                                               */
+    ANDNI   r3,  r3, CPU_IE_BIT              /* Clear IE to prevent interrupts until stack is cleaned  */
+    MTS     RMSR,r3
+
+    LWI     r3,  r1, STK_OFFSET_R03          /* Restore R3 (was used a scratchpad register for RMSR)   */
+
+    ADDIK   r1,  r1, STK_CTX_SIZE            /* Clean up the stack                                     */
+
+    RTID    r14, 0                           /* Return from interrupt with interrupts enabled          */
+    AND     r0,  r0, r0                      /* NO-OP                                                  */
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Ports/MicroBlaze/GNU/os_cpu_c.c b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/MicroBlaze/GNU/os_cpu_c.c
new file mode 100644
index 0000000..ea55159
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Ports/MicroBlaze/GNU/os_cpu_c.c
@@ -0,0 +1,438 @@
+/*
+*********************************************************************************************************
+*                                                uC/OS-III
+*                                          The Real-Time Kernel
+*
+*
+*                           (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                    All rights reserved.  Protected by international copyright laws.
+*
+*                                            Xilinx MicroBlaze
+*                                           GNU C/C++ Compiler
+*
+* File      : OS_CPU_C.C
+* Version   : V3.05.01
+* By        : JJL
+*             NB
+*
+* LICENSING TERMS:
+* ---------------
+*             uC/OS-III is provided in source form to registered licensees ONLY.  It is
+*             illegal to distribute this source code to any third party unless you receive
+*             written permission by an authorized Micrium representative.  Knowledge of
+*             the source code may NOT be used to develop a similar product.
+*
+*             Please help us continue to provide the Embedded community with the finest
+*             software available.  Your honesty is greatly appreciated.
+*
+*             You can find our product's user manual, API reference, release notes and
+*             more information at https://doc.micrium.com.
+*             You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+#define   OS_CPU_GLOBALS
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_cpu_c__c = "$Id: $";
+#endif
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  "../../../Source/os.h"
+
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  void  *_SDA_BASE_;
+extern  void  *_SDA2_BASE_;
+
+
+/*
+*********************************************************************************************************
+*                                           IDLE TASK HOOK
+*
+* Description: This function is called by the idle task.  This hook has been added to allow you to do
+*              such things as STOP the CPU to conserve power.
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSIdleTaskHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppIdleTaskHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppIdleTaskHookPtr)();
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       OS INITIALIZATION HOOK
+*
+* Description: This function is called by OSInit() at the beginning of OSInit().
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) Interrupts should be disabled during this call.
+*********************************************************************************************************
+*/
+
+void  OSInitHook (void)
+{
+}
+
+
+/*
+*********************************************************************************************************
+*                                           REDZONE HIT HOOK
+*
+* Description: This function is called when a task's stack overflowed.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the offending task. NULL if ISR.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+void  OSRedzoneHitHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppRedzoneHitHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppRedzoneHitHookPtr)(p_tcb);
+    } else {
+        CPU_SW_EXCEPTION(;);
+    }
+#else
+    (void)p_tcb;                                                /* Prevent compiler warning                             */
+    CPU_SW_EXCEPTION(;);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         STATISTIC TASK HOOK
+*
+* Description: This function is called every second by uC/OS-III's statistics task.  This allows your
+*              application to add functionality to the statistics task.
+*
+* Arguments  : None.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSStatTaskHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppStatTaskHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppStatTaskHookPtr)();
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                          TASK CREATION HOOK
+*
+* Description: This function is called when a task is created.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task being created.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+
+void  OSTaskCreateHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskCreateHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskCreateHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK DELETION HOOK
+*
+* Description: This function is called when a task is deleted.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task being deleted.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*********************************************************************************************************
+*/
+
+void  OSTaskDelHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskDelHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskDelHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            TASK RETURN HOOK
+*
+* Description: This function is called if a task accidentally returns.  In other words, a task should
+*              either be an infinite loop or delete itself when done.
+*
+* Arguments  : p_tcb        Pointer to the task control block of the task that is returning.
+*
+* Note(s)    : None.
+*********************************************************************************************************
+*/
+
+void  OSTaskReturnHook (OS_TCB  *p_tcb)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskReturnHookPtr != (OS_APP_HOOK_TCB)0) {
+        (*OS_AppTaskReturnHookPtr)(p_tcb);
+    }
+#else
+    (void)p_tcb;                                            /* Prevent compiler warning                               */
+#endif
+}
+
+
+/*
+**********************************************************************************************************
+*                                       INITIALIZE A TASK'S STACK
+*
+* Description: This function is called by OS_Task_Create() or OSTaskCreateExt() to initialize the stack
+*              frame of the task being created. This function is highly processor specific.
+*
+* Arguments  : p_task       Pointer to the task entry point address.
+*
+*              p_arg        Pointer to a user supplied data area that will be passed to the task
+*                               when the task first executes.
+*
+*              p_stk_base   Pointer to the base address of the stack.
+*
+*              stk_size     Size of the stack, in number of CPU_STK elements.
+*
+*              opt          Options used to alter the behavior of OS_Task_StkInit().
+*                            (see OS.H for OS_TASK_OPT_xxx).
+*
+* Returns    : Always returns the location of the new top-of-stack' once the processor registers have
+*              been placed on the stack in the proper order.
+*
+* Note(s)    : 1) Interrupts are enabled when task starts executing.
+*
+*                 OSTCBHighRdyPtr->OSTCBStkPtr + 0x00     RMSR   (IE=1)       (LOW Memory)
+*                                              + 0x04     R2
+*                                              + 0x08     R3
+*                                              + 0x0C     R4
+*                                              + 0x10     R5     (p_arg passed to task)
+*                                              + 0x14     R6
+*                                              + 0x18     R7
+*                                              + 0x1C     R8
+*                                              + 0x20     R9
+*                                              + 0x24     R10
+*                                              + 0x28     R11
+*                                              + 0x2C     R12
+*                                              + 0x30     R13
+*                                              + 0x34     R14
+*                                              + 0x38     R15
+*                                              + 0x3C     R17
+*                                              + 0x40     R18
+*                                              + 0x44     R19
+*                                              + 0x48     R20
+*                                              + 0x4C     R21
+*                                              + 0x50     R22
+*                                              + 0x54     R23
+*                                              + 0x58     R24
+*                                              + 0x5C     R25
+*                                              + 0x60     R26
+*                                              + 0x64     R27
+*                                              + 0x68     R28
+*                                              + 0x6C     R29
+*                                              + 0x70     R30
+*                                              + 0x74     R31                (HIGH Memory)
+*                                              + 0x78     Empty
+*                 ptos --------->              + 0x7C     Empty
+*
+*              2) R16 is not saved as part of the task context since it is used by the debugger.
+**********************************************************************************************************
+*/
+
+CPU_STK  *OSTaskStkInit (OS_TASK_PTR    p_task,
+                         void          *p_arg,
+                         CPU_STK       *p_stk_base,
+                         CPU_STK       *p_stk_limit,
+                         CPU_STK_SIZE   stk_size,
+                         OS_OPT         opt)
+{
+    CPU_STK     *pstk;
+    CPU_INT32U   msr;
+
+
+    (void)p_stk_limit;                                      /* Prevent compiler warning                               */
+    (void)opt;
+
+    __asm__ __volatile__("mfs\t%0,rmsr\n" : "=r"(msr));     /* Obtain the current value of the MSR                    */
+    msr &= 0x000000A0;                                      /* Ensure that the status of the caches is not changed    */
+
+    pstk    = (CPU_STK *)(p_stk_base + stk_size);           /* Load stack pointer                                     */
+    pstk--;                                                 /* Make sure we point to free entry ...                   */
+    pstk--;                                                 /* ... compiler uses top-of-stack so free an extra one.   */
+    *pstk-- = (CPU_INT32U)0x31313131;                       /* r31                                                    */
+    *pstk-- = (CPU_INT32U)0x30303030;                       /* r30                                                    */
+    *pstk-- = (CPU_INT32U)0x29292929;                       /* r29                                                    */
+    *pstk-- = (CPU_INT32U)0x28282828;                       /* r28                                                    */
+    *pstk-- = (CPU_INT32U)0x27272727;                       /* r27                                                    */
+    *pstk-- = (CPU_INT32U)0x26262626;                       /* r26                                                    */
+    *pstk-- = (CPU_INT32U)0x25252525;                       /* r25                                                    */
+    *pstk-- = (CPU_INT32U)0x24242424;                       /* r24                                                    */
+    *pstk-- = (CPU_INT32U)0x23232323;                       /* r23                                                    */
+    *pstk-- = (CPU_INT32U)0x22222222;                       /* r22                                                    */
+    *pstk-- = (CPU_INT32U)0x21212121;                       /* r21                                                    */
+    *pstk-- = (CPU_INT32U)0x20202020;                       /* r20                                                    */
+    *pstk-- = (CPU_INT32U)0x19191919;                       /* r19                                                    */
+    *pstk-- = (CPU_INT32U)0x18181818;                       /* r18                                                    */
+    *pstk-- = (CPU_INT32U)0x17171717;                       /* r17                                                    */
+    *pstk-- = (CPU_INT32U)p_task - 8;                       /* r15 = task return address (assuming function call)     */
+    *pstk-- = (CPU_INT32U)p_task;                           /* r14 = task (Interrupt return address)                  */
+    *pstk-- = (CPU_INT32U)&_SDA_BASE_;                      /* r13                                                    */
+    *pstk-- = (CPU_INT32U)0x12121212;                       /* r12                                                    */
+    *pstk-- = (CPU_INT32U)0x11111111;                       /* r11                                                    */
+    *pstk-- = (CPU_INT32U)0x10101010;                       /* r10                                                    */
+    *pstk-- = (CPU_INT32U)0x09090909;                       /* r09                                                    */
+    *pstk-- = (CPU_INT32U)0x08080808;                       /* r08                                                    */
+    *pstk-- = (CPU_INT32U)0x07070707;                       /* r07                                                    */
+    *pstk-- = (CPU_INT32U)0x06060606;                       /* r06                                                    */
+    *pstk-- = (CPU_INT32U)p_arg;                            /* r05                                                    */
+    *pstk-- = (CPU_INT32U)0x04040404;                       /* r04                                                    */
+    *pstk-- = (CPU_INT32U)0x03030303;                       /* r03                                                    */
+    *pstk-- = (CPU_INT32U)&_SDA2_BASE_;                     /* r02                                                    */
+    *pstk   = msr | 0x00000002;                             /* MSR with interrupts enabled                            */
+
+    return (pstk);                                          /* Return new top of stack                                */
+}
+
+
+/*
+*********************************************************************************************************
+*                                           TASK SWITCH HOOK
+*
+* Description: This function is called when a task switch is performed.  This allows you to perform other
+*              operations during a context switch.
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) Interrupts are disabled during this call.
+*              2) It is assumed that the global pointer 'OSTCBHighRdyPtr' points to the TCB of the task
+*                 that will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCurPtr' points
+*                 to the task being switched out (i.e. the preempted task).
+*********************************************************************************************************
+*/
+
+void  OSTaskSwHook (void)
+{
+#if OS_CFG_TASK_PROFILE_EN > 0u
+    CPU_TS  ts;
+#endif
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+    CPU_TS  int_dis_time;
+#endif
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    CPU_BOOLEAN  stk_status;
+#endif
+
+
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTaskSwHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppTaskSwHookPtr)();
+    }
+#endif
+
+#if OS_CFG_TASK_PROFILE_EN > 0u
+    ts = OS_TS_GET();
+    if (OSTCBCurPtr != OSTCBHighRdyPtr) {
+        OSTCBCurPtr->CyclesDelta  = ts - OSTCBCurPtr->CyclesStart;
+        OSTCBCurPtr->CyclesTotal += (OS_CYCLES)OSTCBCurPtr->CyclesDelta;
+    }
+
+    OSTCBHighRdyPtr->CyclesStart = ts;
+#endif
+
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+    int_dis_time = CPU_IntDisMeasMaxCurReset();             /* Keep track of per-task interrupt disable time          */
+    if (OSTCBCurPtr->IntDisTimeMax < int_dis_time) {
+        OSTCBCurPtr->IntDisTimeMax = int_dis_time;
+    }
+#endif
+
+#if OS_CFG_SCHED_LOCK_TIME_MEAS_EN > 0u
+                                                            /* Keep track of per-task scheduler lock time             */
+    if (OSTCBCurPtr->SchedLockTimeMax < OSSchedLockTimeMaxCur) {
+        OSTCBCurPtr->SchedLockTimeMax = OSSchedLockTimeMaxCur;
+    }
+    OSSchedLockTimeMaxCur = (CPU_TS)0;                      /* Reset the per-task value                               */
+#endif
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+                                                                /* Check if stack overflowed.                           */
+    stk_status = OSTaskStkRedzoneChk(DEF_NULL);
+    if (stk_status != DEF_OK) {
+        OSRedzoneHitHook(OSTCBCurPtr);
+    }
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                              TICK HOOK
+*
+* Description: This function is called every tick.
+*
+* Arguments  : None.
+*
+* Note(s)    : 1) This function is assumed to be called from the Tick ISR.
+*********************************************************************************************************
+*/
+
+void  OSTimeTickHook (void)
+{
+#if OS_CFG_APP_HOOKS_EN > 0u
+    if (OS_AppTimeTickHookPtr != (OS_APP_HOOK_VOID)0) {
+        (*OS_AppTimeTickHookPtr)();
+    }
+#endif
+}
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os.h b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os.h
new file mode 100644
index 0000000..56d4971
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os.h
@@ -0,0 +1,2746 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+* File    : OS.H
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+* Note(s) : (1) Assumes the following versions (or more recent) of software modules are included in the project build:
+*
+*               (a) uC/LIB V1.36.01
+*               (b) uC/CPU V1.30.02
+************************************************************************************************************************
+*/
+
+#ifndef   OS_H
+#define   OS_H
+
+/*
+************************************************************************************************************************
+*                                               uC/OS-III VERSION NUMBER
+************************************************************************************************************************
+*/
+
+#define  OS_VERSION  30501u                       /* Version of uC/OS-III (Vx.yy.zz mult. by 10000)                   */
+
+/*
+************************************************************************************************************************
+*                                                 INCLUDE HEADER FILES
+************************************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include "os_type.h"
+#include 
+#if     (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+#include 
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                              COMPATIBILITY CONFIGURATIONS
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_MON_EN
+#define  OS_CFG_MON_EN                   DEF_DISABLED
+#endif
+
+#ifndef OS_CFG_MON_DEL_EN
+#define  OS_CFG_MON_DEL_EN               DEF_DISABLED
+#endif
+
+#ifndef OS_CFG_TASK_TICK_EN
+#define  OS_CFG_TASK_TICK_EN             DEF_ENABLED
+#endif
+
+#ifndef OS_CFG_TASK_IDLE_EN
+#define  OS_CFG_TASK_IDLE_EN             DEF_ENABLED
+#endif
+
+#ifndef OS_CFG_TASK_STK_REDZONE_EN
+#define  OS_CFG_TASK_STK_REDZONE_EN      DEF_DISABLED
+#endif
+
+#ifndef OS_CFG_INVALID_OS_CALLS_CHK_EN
+#define  OS_CFG_INVALID_OS_CALLS_CHK_EN  DEF_DISABLED
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                               CRITICAL SECTION HANDLING
+************************************************************************************************************************
+*/
+
+
+#if      OS_CFG_SCHED_LOCK_TIME_MEAS_EN > 0u && defined(CPU_CFG_INT_DIS_MEAS_EN)
+#define  OS_SCHED_LOCK_TIME_MEAS_START()    OS_SchedLockTimeMeasStart()
+#else
+#define  OS_SCHED_LOCK_TIME_MEAS_START()
+#endif
+
+
+#if      OS_CFG_SCHED_LOCK_TIME_MEAS_EN > 0u && defined(CPU_CFG_INT_DIS_MEAS_EN)
+#define  OS_SCHED_LOCK_TIME_MEAS_STOP()     OS_SchedLockTimeMeasStop()
+#else
+#define  OS_SCHED_LOCK_TIME_MEAS_STOP()
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)                 /* Deferred ISR Posts ------------------------------ */
+                                                                 /* Lock the scheduler                                */
+#define  OS_CRITICAL_ENTER()                                       \
+         do {                                                      \
+             CPU_CRITICAL_ENTER();                                 \
+             OSSchedLockNestingCtr++;                              \
+             if (OSSchedLockNestingCtr == 1u) {                    \
+                 OS_SCHED_LOCK_TIME_MEAS_START();                  \
+             }                                                     \
+             CPU_CRITICAL_EXIT();                                  \
+         } while (0)
+                                                                 /* Lock the scheduler but re-enable interrupts       */
+#define  OS_CRITICAL_ENTER_CPU_EXIT()                              \
+         do {                                                      \
+             OSSchedLockNestingCtr++;                              \
+                                                                   \
+             if (OSSchedLockNestingCtr == 1u) {                    \
+                 OS_SCHED_LOCK_TIME_MEAS_START();                  \
+             }                                                     \
+             CPU_CRITICAL_EXIT();                                  \
+         } while (0)
+
+                                                                 /* Scheduling occurs only if an interrupt occurs     */
+#define  OS_CRITICAL_EXIT()                                        \
+         do {                                                      \
+             CPU_CRITICAL_ENTER();                                 \
+             OSSchedLockNestingCtr--;                              \
+             if (OSSchedLockNestingCtr == (OS_NESTING_CTR)0) {     \
+                 OS_SCHED_LOCK_TIME_MEAS_STOP();                   \
+                 if (OSIntQNbrEntries > (OS_OBJ_QTY)0) {           \
+                     CPU_CRITICAL_EXIT();                          \
+                     OS_Sched0();                                  \
+                 } else {                                          \
+                     CPU_CRITICAL_EXIT();                          \
+                 }                                                 \
+             } else {                                              \
+                 CPU_CRITICAL_EXIT();                              \
+             }                                                     \
+         } while (0)
+
+#define  OS_CRITICAL_EXIT_NO_SCHED()                               \
+         do {                                                      \
+             CPU_CRITICAL_ENTER();                                 \
+             OSSchedLockNestingCtr--;                              \
+             if (OSSchedLockNestingCtr == (OS_NESTING_CTR)0) {     \
+                 OS_SCHED_LOCK_TIME_MEAS_STOP();                   \
+             }                                                     \
+             CPU_CRITICAL_EXIT();                                  \
+         } while (0)
+
+
+#else                                                            /* Direct ISR Posts -------------------------------- */
+
+
+#define  OS_CRITICAL_ENTER()                    CPU_CRITICAL_ENTER()
+
+#define  OS_CRITICAL_ENTER_CPU_EXIT()
+
+#define  OS_CRITICAL_EXIT()                     CPU_CRITICAL_EXIT()
+
+#define  OS_CRITICAL_EXIT_NO_SCHED()            CPU_CRITICAL_EXIT()
+
+#endif
+
+/*
+************************************************************************************************************************
+*                                                     MISCELLANEOUS
+************************************************************************************************************************
+*/
+
+#ifdef   OS_GLOBALS
+#define  OS_EXT
+#else
+#define  OS_EXT  extern
+#endif
+
+
+#define  OS_PRIO_TBL_SIZE          ((OS_CFG_PRIO_MAX - 1u) / (DEF_INT_CPU_NBR_BITS) + 1u)
+
+#define  OS_MSG_EN                 (((OS_CFG_TASK_Q_EN == DEF_ENABLED) || (OS_CFG_Q_EN == DEF_ENABLED)) ? DEF_ENABLED : DEF_DISABLED)
+
+#define  OS_OBJ_TYPE_REQ           (((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED) || (OS_CFG_PEND_MULTI_EN == DEF_ENABLED) \
+                                   || (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)) ? DEF_ENABLED : DEF_DISABLED)
+
+
+/*
+************************************************************************************************************************
+************************************************************************************************************************
+*                                                   # D E F I N E S
+************************************************************************************************************************
+************************************************************************************************************************
+*/
+
+/*
+========================================================================================================================
+*                                                      TASK STATUS
+========================================================================================================================
+*/
+
+#define  OS_STATE_OS_STOPPED                    (OS_STATE)(0u)
+#define  OS_STATE_OS_RUNNING                    (OS_STATE)(1u)
+
+#define  OS_STATE_NOT_RDY                    (CPU_BOOLEAN)(0u)
+#define  OS_STATE_RDY                        (CPU_BOOLEAN)(1u)
+
+
+                                                                /* ------------------- TASK STATES ------------------ */
+#define  OS_TASK_STATE_BIT_DLY               (OS_STATE)(0x01u)  /*   /-------- SUSPENDED bit                          */
+                                                                /*   |                                                */
+#define  OS_TASK_STATE_BIT_PEND              (OS_STATE)(0x02u)  /*   | /-----  PEND      bit                          */
+                                                                /*   | |                                              */
+#define  OS_TASK_STATE_BIT_SUSPENDED         (OS_STATE)(0x04u)  /*   | | /---  Delayed/Timeout bit                    */
+                                                                /*   | | |                                            */
+                                                                /*   V V V                                            */
+
+#define  OS_TASK_STATE_RDY                    (OS_STATE)(  0u)  /*   0 0 0     Ready                                  */
+#define  OS_TASK_STATE_DLY                    (OS_STATE)(  1u)  /*   0 0 1     Delayed or Timeout                     */
+#define  OS_TASK_STATE_PEND                   (OS_STATE)(  2u)  /*   0 1 0     Pend                                   */
+#define  OS_TASK_STATE_PEND_TIMEOUT           (OS_STATE)(  3u)  /*   0 1 1     Pend + Timeout                         */
+#define  OS_TASK_STATE_SUSPENDED              (OS_STATE)(  4u)  /*   1 0 0     Suspended                              */
+#define  OS_TASK_STATE_DLY_SUSPENDED          (OS_STATE)(  5u)  /*   1 0 1     Suspended + Delayed or Timeout         */
+#define  OS_TASK_STATE_PEND_SUSPENDED         (OS_STATE)(  6u)  /*   1 1 0     Suspended + Pend                       */
+#define  OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED (OS_STATE)(  7u)  /*   1 1 1     Suspended + Pend + Timeout             */
+#define  OS_TASK_STATE_DEL                    (OS_STATE)(255u)
+
+                                                                /* ----------------- PENDING ON ... ----------------- */
+#define  OS_TASK_PEND_ON_NOTHING              (OS_STATE)(  0u)  /* Pending on nothing                                 */
+#define  OS_TASK_PEND_ON_FLAG                 (OS_STATE)(  1u)  /* Pending on event flag group                        */
+#define  OS_TASK_PEND_ON_TASK_Q               (OS_STATE)(  2u)  /* Pending on message to be sent to task              */
+#define  OS_TASK_PEND_ON_MULTI                (OS_STATE)(  3u)  /* Pending on multiple semaphores and/or queues       */
+#define  OS_TASK_PEND_ON_MUTEX                (OS_STATE)(  4u)  /* Pending on mutual exclusion semaphore              */
+#define  OS_TASK_PEND_ON_Q                    (OS_STATE)(  5u)  /* Pending on queue                                   */
+#define  OS_TASK_PEND_ON_SEM                  (OS_STATE)(  6u)  /* Pending on semaphore                               */
+#define  OS_TASK_PEND_ON_TASK_SEM             (OS_STATE)(  7u)  /* Pending on signal  to be sent to task              */
+#define  OS_TASK_PEND_ON_COND_VAR             (OS_STATE)(  8u)  /* Pending on condition variable                      */
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                    TASK PEND STATUS
+*                                      (Status codes for OS_TCBs field .PendStatus)
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#define  OS_STATUS_PEND_OK                   (OS_STATUS)(  0u)  /* Pending status OK, !pending, or pending complete   */
+#define  OS_STATUS_PEND_ABORT                (OS_STATUS)(  1u)  /* Pending aborted                                    */
+#define  OS_STATUS_PEND_DEL                  (OS_STATUS)(  2u)  /* Pending object deleted                             */
+#define  OS_STATUS_PEND_TIMEOUT              (OS_STATUS)(  3u)  /* Pending timed out                                  */
+
+/*
+========================================================================================================================
+*                                                   OS OBJECT TYPES
+*
+* Note(s) : (1) OS_OBJ_TYPE_&&& #define values specifically chosen as ASCII representations of the kernel
+*               object types.  Memory displays of kernel objects will display the kernel object TYPEs with
+*               their chosen ASCII names.
+========================================================================================================================
+*/
+
+#define  OS_OBJ_TYPE_NONE                    (OS_OBJ_TYPE)CPU_TYPE_CREATE('N', 'O', 'N', 'E')
+#define  OS_OBJ_TYPE_FLAG                    (OS_OBJ_TYPE)CPU_TYPE_CREATE('F', 'L', 'A', 'G')
+#define  OS_OBJ_TYPE_MEM                     (OS_OBJ_TYPE)CPU_TYPE_CREATE('M', 'E', 'M', ' ')
+#define  OS_OBJ_TYPE_MUTEX                   (OS_OBJ_TYPE)CPU_TYPE_CREATE('M', 'U', 'T', 'X')
+#define  OS_OBJ_TYPE_Q                       (OS_OBJ_TYPE)CPU_TYPE_CREATE('Q', 'U', 'E', 'U')
+#define  OS_OBJ_TYPE_SEM                     (OS_OBJ_TYPE)CPU_TYPE_CREATE('S', 'E', 'M', 'A')
+#define  OS_OBJ_TYPE_MON                     (OS_OBJ_TYPE)CPU_TYPE_CREATE('M', 'O', 'N', ' ')
+#define  OS_OBJ_TYPE_TASK_MSG                (OS_OBJ_TYPE)CPU_TYPE_CREATE('T', 'M', 'S', 'G')
+#define  OS_OBJ_TYPE_TASK_RESUME             (OS_OBJ_TYPE)CPU_TYPE_CREATE('T', 'R', 'E', 'S')
+#define  OS_OBJ_TYPE_TASK_SIGNAL             (OS_OBJ_TYPE)CPU_TYPE_CREATE('T', 'S', 'I', 'G')
+#define  OS_OBJ_TYPE_TASK_SUSPEND            (OS_OBJ_TYPE)CPU_TYPE_CREATE('T', 'S', 'U', 'S')
+#define  OS_OBJ_TYPE_TICK                    (OS_OBJ_TYPE)CPU_TYPE_CREATE('T', 'I', 'C', 'K')
+#define  OS_OBJ_TYPE_TMR                     (OS_OBJ_TYPE)CPU_TYPE_CREATE('T', 'M', 'R', ' ')
+
+/*
+========================================================================================================================
+*                                           Possible values for 'opt' argument
+========================================================================================================================
+*/
+
+#define  OS_OPT_NONE                         (OS_OPT)(0x0000u)
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                    DELETE OPTIONS
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#define  OS_OPT_DEL_NO_PEND                  (OS_OPT)(0x0000u)
+#define  OS_OPT_DEL_ALWAYS                   (OS_OPT)(0x0001u)
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                     PEND OPTIONS
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#define  OS_OPT_PEND_FLAG_MASK               (OS_OPT)(0x000Fu)
+#define  OS_OPT_PEND_FLAG_CLR_ALL            (OS_OPT)(0x0001u)  /* Wait for ALL    the bits specified to be CLR       */
+#define  OS_OPT_PEND_FLAG_CLR_AND            (OS_OPT)(0x0001u)
+
+#define  OS_OPT_PEND_FLAG_CLR_ANY            (OS_OPT)(0x0002u)  /* Wait for ANY of the bits specified to be CLR       */
+#define  OS_OPT_PEND_FLAG_CLR_OR             (OS_OPT)(0x0002u)
+
+#define  OS_OPT_PEND_FLAG_SET_ALL            (OS_OPT)(0x0004u)  /* Wait for ALL    the bits specified to be SET       */
+#define  OS_OPT_PEND_FLAG_SET_AND            (OS_OPT)(0x0004u)
+
+#define  OS_OPT_PEND_FLAG_SET_ANY            (OS_OPT)(0x0008u)  /* Wait for ANY of the bits specified to be SET       */
+#define  OS_OPT_PEND_FLAG_SET_OR             (OS_OPT)(0x0008u)
+
+#define  OS_OPT_PEND_FLAG_CONSUME            (OS_OPT)(0x0100u)  /* Consume the flags if condition(s) satisfied        */
+
+
+#define  OS_OPT_PEND_BLOCKING                (OS_OPT)(0x0000u)
+#define  OS_OPT_PEND_NON_BLOCKING            (OS_OPT)(0x8000u)
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                  PEND ABORT OPTIONS
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#define  OS_OPT_PEND_ABORT_1                 (OS_OPT)(0x0000u)  /* Pend abort a single waiting task                   */
+#define  OS_OPT_PEND_ABORT_ALL               (OS_OPT)(0x0100u)  /* Pend abort ALL tasks waiting                       */
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                     POST OPTIONS
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+
+#define  OS_OPT_POST_NONE                    (OS_OPT)(0x0000u)
+
+#define  OS_OPT_POST_FLAG_SET                (OS_OPT)(0x0000u)
+#define  OS_OPT_POST_FLAG_CLR                (OS_OPT)(0x0001u)
+
+#define  OS_OPT_POST_FIFO                    (OS_OPT)(0x0000u)  /* Default is to post FIFO                            */
+#define  OS_OPT_POST_LIFO                    (OS_OPT)(0x0010u)  /* Post to highest priority task waiting              */
+#define  OS_OPT_POST_1                       (OS_OPT)(0x0000u)  /* Post message to highest priority task waiting      */
+#define  OS_OPT_POST_ALL                     (OS_OPT)(0x0200u)  /* Broadcast message to ALL tasks waiting             */
+
+#define  OS_OPT_POST_NO_SCHED                (OS_OPT)(0x8000u)  /* Do not call the scheduler if this is selected      */
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                     TASK OPTIONS
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#define  OS_OPT_TASK_NONE                    (OS_OPT)(0x0000u)  /* No option selected                                 */
+#define  OS_OPT_TASK_STK_CHK                 (OS_OPT)(0x0001u)  /* Enable stack checking for the task                 */
+#define  OS_OPT_TASK_STK_CLR                 (OS_OPT)(0x0002u)  /* Clear the stack when the task is create            */
+#define  OS_OPT_TASK_SAVE_FP                 (OS_OPT)(0x0004u)  /* Save the contents of any floating-point registers  */
+#define  OS_OPT_TASK_NO_TLS                  (OS_OPT)(0x0008u)  /* Specifies the task DOES NOT require TLS support    */
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                     TIME OPTIONS
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#define  OS_OPT_TIME_DLY                             DEF_BIT_NONE
+#define  OS_OPT_TIME_TIMEOUT                ((OS_OPT)DEF_BIT_01)
+#define  OS_OPT_TIME_MATCH                  ((OS_OPT)DEF_BIT_02)
+#define  OS_OPT_TIME_PERIODIC               ((OS_OPT)DEF_BIT_03)
+
+#define  OS_OPT_TIME_HMSM_STRICT            ((OS_OPT)DEF_BIT_NONE)
+#define  OS_OPT_TIME_HMSM_NON_STRICT        ((OS_OPT)DEF_BIT_04)
+
+#define  OS_OPT_TIME_MASK                   ((OS_OPT)(OS_OPT_TIME_DLY      | \
+                                                      OS_OPT_TIME_TIMEOUT  | \
+                                                      OS_OPT_TIME_PERIODIC | \
+                                                      OS_OPT_TIME_MATCH))
+
+#define  OS_OPT_TIME_OPTS_MASK                       (OS_OPT_TIME_DLY            | \
+                                                      OS_OPT_TIME_TIMEOUT        | \
+                                                      OS_OPT_TIME_PERIODIC       | \
+                                                      OS_OPT_TIME_MATCH          | \
+                                                      OS_OPT_TIME_HMSM_NON_STRICT)
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                    TIMER OPTIONS
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#define  OS_OPT_TMR_NONE                          (OS_OPT)(0u)  /* No option selected                                 */
+
+#define  OS_OPT_TMR_ONE_SHOT                      (OS_OPT)(1u)  /* Timer will not auto restart when it expires        */
+#define  OS_OPT_TMR_PERIODIC                      (OS_OPT)(2u)  /* Timer will     auto restart when it expires        */
+
+#define  OS_OPT_TMR_CALLBACK                      (OS_OPT)(3u)  /* OSTmrStop() option to call 'callback' w/ timer arg */
+#define  OS_OPT_TMR_CALLBACK_ARG                  (OS_OPT)(4u)  /* OSTmrStop() option to call 'callback' w/ new   arg */
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                     TIMER STATES
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#define  OS_TMR_STATE_UNUSED                    (OS_STATE)(0u)
+#define  OS_TMR_STATE_STOPPED                   (OS_STATE)(1u)
+#define  OS_TMR_STATE_RUNNING                   (OS_STATE)(2u)
+#define  OS_TMR_STATE_COMPLETED                 (OS_STATE)(3u)
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                       PRIORITY
+------------------------------------------------------------------------------------------------------------------------
+*/
+                                                                    /* Dflt prio to init task TCB                     */
+#define  OS_PRIO_INIT                       (OS_PRIO)(OS_CFG_PRIO_MAX)
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                 TIMER TICK THRESHOLDS
+------------------------------------------------------------------------------------------------------------------------
+*/
+                                                                    /* Threshold to init previous tick time           */
+#define  OS_TICK_TH_INIT                    (OS_TICK)(DEF_BIT       ((sizeof(OS_TICK) * DEF_OCTET_NBR_BITS) - 1u))
+
+                                                                    /* Threshold to check if tick time already ready  */
+#define  OS_TICK_TH_RDY                     (OS_TICK)(DEF_BIT_FIELD(((sizeof(OS_TICK) * DEF_OCTET_NBR_BITS) / 2u), \
+                                                                    ((sizeof(OS_TICK) * DEF_OCTET_NBR_BITS) / 2u)))
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                   MONITOR RESULTS
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#define  OS_MON_RES_ALLOW                   (OS_MON_RES)(0x0000u)
+#define  OS_MON_RES_BLOCK                   (OS_MON_RES)(0x0001u)
+#define  OS_MON_RES_STOP_EVAL               (OS_MON_RES)(0x0002u)
+#define  OS_MON_RES_ACQUIRE                 (OS_MON_RES)(0x0004u)
+#define  OS_MON_RES_RELEASE                 (OS_MON_RES)(0x0008u)
+#define  OS_MON_RES_SUBSCRIBE               (OS_MON_RES)(0x0010u)
+#define  OS_MON_RES_UNSUBSCRIBE             (OS_MON_RES)(0x0020u)
+#define  OS_MON_RES_TRY_FAIL                (OS_MON_RES)(0x0040u)
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                   STACK REDZONE
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#define  OS_STACK_CHECK_VAL                 0x5432DCBAABCD2345UL
+#define  OS_STACK_CHECK_DEPTH               8u
+
+
+/*
+************************************************************************************************************************
+************************************************************************************************************************
+*                                                E N U M E R A T I O N S
+************************************************************************************************************************
+************************************************************************************************************************
+*/
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                      ERROR CODES
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+typedef  enum  os_err {
+    OS_ERR_NONE                      =     0u,
+
+    OS_ERR_A                         = 10000u,
+    OS_ERR_ACCEPT_ISR                = 10001u,
+
+    OS_ERR_B                         = 11000u,
+
+    OS_ERR_C                         = 12000u,
+    OS_ERR_CREATE_ISR                = 12001u,
+
+    OS_ERR_D                         = 13000u,
+    OS_ERR_DEL_ISR                   = 13001u,
+
+    OS_ERR_E                         = 14000u,
+
+    OS_ERR_F                         = 15000u,
+    OS_ERR_FATAL_RETURN              = 15001u,
+
+    OS_ERR_FLAG_GRP_DEPLETED         = 15101u,
+    OS_ERR_FLAG_NOT_RDY              = 15102u,
+    OS_ERR_FLAG_PEND_OPT             = 15103u,
+    OS_ERR_FLUSH_ISR                 = 15104u,
+
+    OS_ERR_G                         = 16000u,
+
+    OS_ERR_H                         = 17000u,
+
+    OS_ERR_I                         = 18000u,
+    OS_ERR_ILLEGAL_CREATE_RUN_TIME   = 18001u,
+    OS_ERR_INT_Q                     = 18002u,
+    OS_ERR_INT_Q_FULL                = 18003u,
+    OS_ERR_INT_Q_SIZE                = 18004u,
+    OS_ERR_INT_Q_STK_INVALID         = 18005u,
+    OS_ERR_INT_Q_STK_SIZE_INVALID    = 18006u,
+    OS_ERR_ILLEGAL_DEL_RUN_TIME      = 18007u,
+
+    OS_ERR_J                         = 19000u,
+
+    OS_ERR_K                         = 20000u,
+
+    OS_ERR_L                         = 21000u,
+    OS_ERR_LOCK_NESTING_OVF          = 21001u,
+
+    OS_ERR_M                         = 22000u,
+
+    OS_ERR_MEM_CREATE_ISR            = 22201u,
+    OS_ERR_MEM_FULL                  = 22202u,
+    OS_ERR_MEM_INVALID_P_ADDR        = 22203u,
+    OS_ERR_MEM_INVALID_BLKS          = 22204u,
+    OS_ERR_MEM_INVALID_PART          = 22205u,
+    OS_ERR_MEM_INVALID_P_BLK         = 22206u,
+    OS_ERR_MEM_INVALID_P_MEM         = 22207u,
+    OS_ERR_MEM_INVALID_P_DATA        = 22208u,
+    OS_ERR_MEM_INVALID_SIZE          = 22209u,
+    OS_ERR_MEM_NO_FREE_BLKS          = 22210u,
+
+    OS_ERR_MSG_POOL_EMPTY            = 22301u,
+    OS_ERR_MSG_POOL_NULL_PTR         = 22302u,
+
+    OS_ERR_MUTEX_NOT_OWNER           = 22401u,
+    OS_ERR_MUTEX_OWNER               = 22402u,
+    OS_ERR_MUTEX_NESTING             = 22403u,
+    OS_ERR_MUTEX_OVF                 = 22404u,
+
+    OS_ERR_N                         = 23000u,
+    OS_ERR_NAME                      = 23001u,
+    OS_ERR_NO_MORE_ID_AVAIL          = 23002u,
+
+    OS_ERR_O                         = 24000u,
+    OS_ERR_OBJ_CREATED               = 24001u,
+    OS_ERR_OBJ_DEL                   = 24002u,
+    OS_ERR_OBJ_PTR_NULL              = 24003u,
+    OS_ERR_OBJ_TYPE                  = 24004u,
+
+    OS_ERR_OPT_INVALID               = 24101u,
+
+    OS_ERR_OS_NOT_RUNNING            = 24201u,
+    OS_ERR_OS_RUNNING                = 24202u,
+    OS_ERR_OS_NOT_INIT               = 24203u,
+    OS_ERR_OS_NO_APP_TASK            = 24204u,
+
+    OS_ERR_P                         = 25000u,
+    OS_ERR_PEND_ABORT                = 25001u,
+    OS_ERR_PEND_ABORT_ISR            = 25002u,
+    OS_ERR_PEND_ABORT_NONE           = 25003u,
+    OS_ERR_PEND_ABORT_SELF           = 25004u,
+    OS_ERR_PEND_DEL                  = 25005u,
+    OS_ERR_PEND_ISR                  = 25006u,
+    OS_ERR_PEND_LOCKED               = 25007u,
+    OS_ERR_PEND_WOULD_BLOCK          = 25008u,
+
+    OS_ERR_POST_NULL_PTR             = 25101u,
+    OS_ERR_POST_ISR                  = 25102u,
+
+    OS_ERR_PRIO_EXIST                = 25201u,
+    OS_ERR_PRIO                      = 25202u,
+    OS_ERR_PRIO_INVALID              = 25203u,
+
+    OS_ERR_PTR_INVALID               = 25301u,
+
+    OS_ERR_Q                         = 26000u,
+    OS_ERR_Q_FULL                    = 26001u,
+    OS_ERR_Q_EMPTY                   = 26002u,
+    OS_ERR_Q_MAX                     = 26003u,
+    OS_ERR_Q_SIZE                    = 26004u,
+
+    OS_ERR_R                         = 27000u,
+    OS_ERR_REG_ID_INVALID            = 27001u,
+    OS_ERR_ROUND_ROBIN_1             = 27002u,
+    OS_ERR_ROUND_ROBIN_DISABLED      = 27003u,
+
+    OS_ERR_S                         = 28000u,
+    OS_ERR_SCHED_INVALID_TIME_SLICE  = 28001u,
+    OS_ERR_SCHED_LOCK_ISR            = 28002u,
+    OS_ERR_SCHED_LOCKED              = 28003u,
+    OS_ERR_SCHED_NOT_LOCKED          = 28004u,
+    OS_ERR_SCHED_UNLOCK_ISR          = 28005u,
+
+    OS_ERR_SEM_OVF                   = 28101u,
+    OS_ERR_SET_ISR                   = 28102u,
+
+    OS_ERR_STAT_RESET_ISR            = 28201u,
+    OS_ERR_STAT_PRIO_INVALID         = 28202u,
+    OS_ERR_STAT_STK_INVALID          = 28203u,
+    OS_ERR_STAT_STK_SIZE_INVALID     = 28204u,
+    OS_ERR_STATE_INVALID             = 28205u,
+    OS_ERR_STATUS_INVALID            = 28206u,
+    OS_ERR_STK_INVALID               = 28207u,
+    OS_ERR_STK_SIZE_INVALID          = 28208u,
+    OS_ERR_STK_LIMIT_INVALID         = 28209u,
+
+    OS_ERR_T                         = 29000u,
+    OS_ERR_TASK_CHANGE_PRIO_ISR      = 29001u,
+    OS_ERR_TASK_CREATE_ISR           = 29002u,
+    OS_ERR_TASK_DEL                  = 29003u,
+    OS_ERR_TASK_DEL_IDLE             = 29004u,
+    OS_ERR_TASK_DEL_INVALID          = 29005u,
+    OS_ERR_TASK_DEL_ISR              = 29006u,
+    OS_ERR_TASK_INVALID              = 29007u,
+    OS_ERR_TASK_NO_MORE_TCB          = 29008u,
+    OS_ERR_TASK_NOT_DLY              = 29009u,
+    OS_ERR_TASK_NOT_EXIST            = 29010u,
+    OS_ERR_TASK_NOT_SUSPENDED        = 29011u,
+    OS_ERR_TASK_OPT                  = 29012u,
+    OS_ERR_TASK_RESUME_ISR           = 29013u,
+    OS_ERR_TASK_RESUME_PRIO          = 29014u,
+    OS_ERR_TASK_RESUME_SELF          = 29015u,
+    OS_ERR_TASK_RUNNING              = 29016u,
+    OS_ERR_TASK_STK_CHK_ISR          = 29017u,
+    OS_ERR_TASK_SUSPENDED            = 29018u,
+    OS_ERR_TASK_SUSPEND_IDLE         = 29019u,
+    OS_ERR_TASK_SUSPEND_INT_HANDLER  = 29020u,
+    OS_ERR_TASK_SUSPEND_ISR          = 29021u,
+    OS_ERR_TASK_SUSPEND_PRIO         = 29022u,
+    OS_ERR_TASK_WAITING              = 29023u,
+    OS_ERR_TASK_SUSPEND_CTR_OVF      = 29024u,
+
+    OS_ERR_TCB_INVALID               = 29101u,
+
+    OS_ERR_TLS_ID_INVALID            = 29120u,
+    OS_ERR_TLS_ISR                   = 29121u,
+    OS_ERR_TLS_NO_MORE_AVAIL         = 29122u,
+    OS_ERR_TLS_NOT_EN                = 29123u,
+    OS_ERR_TLS_DESTRUCT_ASSIGNED     = 29124u,
+
+    OS_ERR_TICK_PRIO_INVALID         = 29201u,
+    OS_ERR_TICK_STK_INVALID          = 29202u,
+    OS_ERR_TICK_STK_SIZE_INVALID     = 29203u,
+    OS_ERR_TICK_WHEEL_SIZE           = 29204u,
+
+    OS_ERR_TIME_DLY_ISR              = 29301u,
+    OS_ERR_TIME_DLY_RESUME_ISR       = 29302u,
+    OS_ERR_TIME_GET_ISR              = 29303u,
+    OS_ERR_TIME_INVALID_HOURS        = 29304u,
+    OS_ERR_TIME_INVALID_MINUTES      = 29305u,
+    OS_ERR_TIME_INVALID_SECONDS      = 29306u,
+    OS_ERR_TIME_INVALID_MILLISECONDS = 29307u,
+    OS_ERR_TIME_NOT_DLY              = 29308u,
+    OS_ERR_TIME_SET_ISR              = 29309u,
+    OS_ERR_TIME_ZERO_DLY             = 29310u,
+
+    OS_ERR_TIMEOUT                   = 29401u,
+
+    OS_ERR_TMR_INACTIVE              = 29501u,
+    OS_ERR_TMR_INVALID_DEST          = 29502u,
+    OS_ERR_TMR_INVALID_DLY           = 29503u,
+    OS_ERR_TMR_INVALID_PERIOD        = 29504u,
+    OS_ERR_TMR_INVALID_STATE         = 29505u,
+    OS_ERR_TMR_INVALID               = 29506u,
+    OS_ERR_TMR_ISR                   = 29507u,
+    OS_ERR_TMR_NO_CALLBACK           = 29508u,
+    OS_ERR_TMR_NON_AVAIL             = 29509u,
+    OS_ERR_TMR_PRIO_INVALID          = 29510u,
+    OS_ERR_TMR_STK_INVALID           = 29511u,
+    OS_ERR_TMR_STK_SIZE_INVALID      = 29512u,
+    OS_ERR_TMR_STOPPED               = 29513u,
+    OS_ERR_TMR_INVALID_CALLBACK      = 29514u,
+
+    OS_ERR_U                         = 30000u,
+
+    OS_ERR_V                         = 31000u,
+
+    OS_ERR_W                         = 32000u,
+
+    OS_ERR_X                         = 33000u,
+
+    OS_ERR_Y                         = 34000u,
+    OS_ERR_YIELD_ISR                 = 34001u,
+
+    OS_ERR_Z                         = 35000u
+} OS_ERR;
+
+
+/*
+************************************************************************************************************************
+************************************************************************************************************************
+*                                                  D A T A   T Y P E S
+************************************************************************************************************************
+************************************************************************************************************************
+*/
+
+typedef  struct  os_flag_grp         OS_FLAG_GRP;
+
+typedef  struct  os_mem              OS_MEM;
+
+typedef  struct  os_msg              OS_MSG;
+typedef  struct  os_msg_pool         OS_MSG_POOL;
+typedef  struct  os_msg_q            OS_MSG_Q;
+
+typedef  struct  os_mutex            OS_MUTEX;
+
+typedef  struct  os_int_q            OS_INT_Q;
+
+typedef  struct  os_q                OS_Q;
+
+typedef  struct  os_mon              OS_MON;
+typedef  struct  os_mon_data         OS_MON_DATA;
+typedef  struct  os_mon_ctx          OS_MON_CTX;
+
+typedef  struct  os_sem              OS_SEM;
+
+typedef  void                      (*OS_TASK_PTR)(void *p_arg);
+
+typedef  OS_MON_RES                (*OS_MON_ON_ENTER_PTR)(OS_MON *p_mon, void *p_data);
+typedef  OS_MON_RES                (*OS_MON_ON_EVAL_PTR)(OS_MON *p_mon, void *p_eval_data, void *p_scan_data);
+
+typedef  struct  os_tcb              OS_TCB;
+
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+typedef  void                       *OS_TLS;
+
+typedef  CPU_DATA                    OS_TLS_ID;
+
+typedef  void                      (*OS_TLS_DESTRUCT_PTR)(OS_TCB    *p_tcb,
+                                                          OS_TLS_ID  id,
+                                                          OS_TLS     value);
+#endif
+
+typedef  struct  os_rdy_list         OS_RDY_LIST;
+
+typedef  struct  os_tick_list        OS_TICK_LIST;
+
+typedef  void                      (*OS_TMR_CALLBACK_PTR)(void *p_tmr, void *p_arg);
+typedef  struct  os_tmr              OS_TMR;
+
+typedef  struct  os_pend_data        OS_PEND_DATA;
+typedef  struct  os_pend_list        OS_PEND_LIST;
+typedef  struct  os_pend_obj         OS_PEND_OBJ;
+
+#if (OS_CFG_APP_HOOKS_EN == DEF_ENABLED)
+typedef  void                      (*OS_APP_HOOK_VOID)(void);
+typedef  void                      (*OS_APP_HOOK_TCB)(OS_TCB *p_tcb);
+#endif
+
+
+/*
+************************************************************************************************************************
+************************************************************************************************************************
+*                                          D A T A   S T R U C T U R E S
+************************************************************************************************************************
+************************************************************************************************************************
+*/
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                    ISR POST DATA
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+struct  os_int_q {
+    OS_OBJ_TYPE          Type;                              /* Type of object placed in the circular list             */
+    OS_INT_Q            *NextPtr;                           /* Pointer to next OS_INT_Q in  circular list             */
+    void                *ObjPtr;                            /* Pointer to object placed in the queue                  */
+    void                *MsgPtr;                            /* Pointer to message if posting to a message queue       */
+    OS_MSG_SIZE          MsgSize;                           /* Message Size       if posting to a message queue       */
+    OS_FLAGS             Flags;                             /* Value of flags if posting to an event flag group       */
+    OS_OPT               Opt;                               /* Post Options                                           */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS               TS;                                /* Timestamp                                              */
+#endif
+};
+#endif
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                      READY LIST
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+struct  os_rdy_list {
+    OS_TCB              *HeadPtr;                           /* Pointer to task that will run at selected priority     */
+    OS_TCB              *TailPtr;                           /* Pointer to last task          at selected priority     */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_OBJ_QTY           NbrEntries;                        /* Number of entries             at selected priority     */
+#endif
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                PEND DATA and PEND LIST
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+struct  os_pend_data {
+    OS_PEND_DATA        *PrevPtr;
+    OS_PEND_DATA        *NextPtr;
+    OS_TCB              *TCBPtr;
+    OS_PEND_OBJ         *PendObjPtr;
+    OS_PEND_OBJ         *RdyObjPtr;
+    void                *RdyMsgPtr;
+    OS_MSG_SIZE          RdyMsgSize;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS               RdyTS;
+#endif
+};
+
+
+struct  os_pend_list {
+    OS_PEND_DATA        *HeadPtr;
+    OS_PEND_DATA        *TailPtr;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_OBJ_QTY           NbrEntries;
+#endif
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                       PEND OBJ
+*
+* Note(s) : (1) The 'os_pend_obj' structure data type is a template/subset for specific kernel objects' data types:
+*               'os_flag_grp', 'os_mutex', 'os_q', and 'os_sem'.  Each specific kernel object data type MUST define
+*               ALL generic OS pend object parameters, synchronized in both the sequential order & data type of each
+*               parameter.
+*
+*               Thus, ANY modification to the sequential order or data types of OS pend object parameters MUST be
+*               appropriately synchronized between the generic OS pend object data type & ALL specific kernel objects'
+*               data types.
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+struct  os_pend_obj {
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    OS_OBJ_TYPE          Type;
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CHAR            *NamePtr;
+#endif
+    OS_PEND_LIST         PendList;                          /* List of tasks pending on object                        */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    void                *DbgPrevPtr;
+    void                *DbgNextPtr;
+    CPU_CHAR            *DbgNamePtr;
+#endif
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                     EVENT FLAGS
+*
+* Note(s) : See  PEND OBJ  Note #1'.
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+
+struct  os_flag_grp {                                       /* Event Flag Group                                       */
+                                                            /* ------------------ GENERIC  MEMBERS ------------------ */
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    OS_OBJ_TYPE          Type;                              /* Should be set to OS_OBJ_TYPE_FLAG                      */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CHAR            *NamePtr;                           /* Pointer to Event Flag Name (NUL terminated ASCII)      */
+#endif
+    OS_PEND_LIST         PendList;                          /* List of tasks waiting on event flag group              */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_FLAG_GRP         *DbgPrevPtr;
+    OS_FLAG_GRP         *DbgNextPtr;
+    CPU_CHAR            *DbgNamePtr;
+#endif
+                                                            /* ------------------ SPECIFIC MEMBERS ------------------ */
+    OS_FLAGS             Flags;                             /* 8, 16 or 32 bit flags                                  */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS               TS;                                /* Timestamp of when last post occurred                   */
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    CPU_INT32U           FlagID;                            /* Unique ID for third-party debuggers and tracers.       */
+#endif
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                   MEMORY PARTITIONS
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+
+struct os_mem {                                             /* MEMORY CONTROL BLOCK                                   */
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    OS_OBJ_TYPE          Type;                              /* Should be set to OS_OBJ_TYPE_MEM                       */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CHAR            *NamePtr;
+#endif
+    void                *AddrPtr;                           /* Pointer to beginning of memory partition               */
+    void                *FreeListPtr;                       /* Pointer to list of free memory blocks                  */
+    OS_MEM_SIZE          BlkSize;                           /* Size (in bytes) of each block of memory                */
+    OS_MEM_QTY           NbrMax;                            /* Total number of blocks in this partition               */
+    OS_MEM_QTY           NbrFree;                           /* Number of memory blocks remaining in this partition    */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_MEM              *DbgPrevPtr;
+    OS_MEM              *DbgNextPtr;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    CPU_INT32U           MemID;                             /* Unique ID for third-party debuggers and tracers.       */
+#endif
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                       MESSAGES
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+struct  os_msg {                                            /* MESSAGE CONTROL BLOCK                                  */
+    OS_MSG              *NextPtr;                           /* Pointer to next message                                */
+    void                *MsgPtr;                            /* Actual message                                         */
+    OS_MSG_SIZE          MsgSize;                           /* Size of the message (in # bytes)                       */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS               MsgTS;                             /* Time stamp of when message was sent                    */
+#endif
+};
+
+
+
+
+struct  os_msg_pool {                                       /* OS_MSG POOL                                            */
+    OS_MSG              *NextPtr;                           /* Pointer to next message                                */
+    OS_MSG_QTY           NbrFree;                           /* Number of messages available from this pool            */
+    OS_MSG_QTY           NbrUsed;                           /* Current number of messages used                        */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_MSG_QTY           NbrUsedMax;                        /* Peak number of messages used                           */
+#endif
+};
+
+
+
+struct  os_msg_q {                                          /* OS_MSG_Q                                               */
+    OS_MSG              *InPtr;                             /* Pointer to next OS_MSG to be inserted  in   the queue  */
+    OS_MSG              *OutPtr;                            /* Pointer to next OS_MSG to be extracted from the queue  */
+    OS_MSG_QTY           NbrEntriesSize;                    /* Maximum allowable number of entries in the queue       */
+    OS_MSG_QTY           NbrEntries;                        /* Current number of entries in the queue                 */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_MSG_QTY           NbrEntriesMax;                     /* Peak number of entries in the queue                    */
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    CPU_INT32U           MsgQID;                            /* Unique ID for third-party debuggers and tracers.       */
+#endif
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                              MUTUAL EXCLUSION SEMAPHORES
+*
+* Note(s) : See  PEND OBJ  Note #1'.
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+struct  os_mutex {                                          /* Mutual Exclusion Semaphore                             */
+                                                            /* ------------------ GENERIC  MEMBERS ------------------ */
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    OS_OBJ_TYPE          Type;                              /* Should be set to OS_OBJ_TYPE_MUTEX                     */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CHAR            *NamePtr;                           /* Pointer to Mutex Name (NUL terminated ASCII)           */
+#endif
+    OS_PEND_LIST         PendList;                          /* List of tasks waiting on mutex                         */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_MUTEX            *DbgPrevPtr;
+    OS_MUTEX            *DbgNextPtr;
+    CPU_CHAR            *DbgNamePtr;
+#endif
+                                                            /* ------------------ SPECIFIC MEMBERS ------------------ */
+    OS_MUTEX            *MutexGrpNextPtr;
+    OS_TCB              *OwnerTCBPtr;
+    OS_NESTING_CTR       OwnerNestingCtr;                   /* Mutex is available when the counter is 0               */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS               TS;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    CPU_INT08U           MutexID;                           /* Unique ID for third-party debuggers and tracers.       */
+#endif
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                    MESSAGE QUEUES
+*
+* Note(s) : See  PEND OBJ  Note #1'.
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+struct  os_q {                                              /* Message Queue                                          */
+                                                            /* ------------------ GENERIC  MEMBERS ------------------ */
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    OS_OBJ_TYPE          Type;                              /* Should be set to OS_OBJ_TYPE_Q                         */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CHAR            *NamePtr;                           /* Pointer to Message Queue Name (NUL terminated ASCII)   */
+#endif
+    OS_PEND_LIST         PendList;                          /* List of tasks waiting on message queue                 */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_Q                *DbgPrevPtr;
+    OS_Q                *DbgNextPtr;
+    CPU_CHAR            *DbgNamePtr;
+#endif
+                                                            /* ------------------ SPECIFIC MEMBERS ------------------ */
+    OS_MSG_Q             MsgQ;                              /* List of messages                                       */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    CPU_INT08U           MsgQID;                            /* Unique ID for third-party debuggers and tracers.       */
+#endif
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                      SEMAPHORES
+*
+* Note(s) : See  PEND OBJ  Note #1'.
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+struct  os_sem {                                            /* Semaphore                                              */
+                                                            /* ------------------ GENERIC  MEMBERS ------------------ */
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    OS_OBJ_TYPE          Type;                              /* Should be set to OS_OBJ_TYPE_SEM                       */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CHAR            *NamePtr;                           /* Pointer to Semaphore Name (NUL terminated ASCII)       */
+#endif
+    OS_PEND_LIST         PendList;                          /* List of tasks waiting on semaphore                     */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_SEM              *DbgPrevPtr;
+    OS_SEM              *DbgNextPtr;
+    CPU_CHAR            *DbgNamePtr;
+#endif
+                                                            /* ------------------ SPECIFIC MEMBERS ------------------ */
+    OS_SEM_CTR           Ctr;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS               TS;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    CPU_INT08U           SemID;                             /* Unique ID for third-party debuggers and tracers.       */
+#endif
+};
+
+
+
+struct  os_mon {                                            /* Monitor                                                */
+                                                            /* ------------------ GENERIC  MEMBERS ------------------ */
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    OS_OBJ_TYPE          Type;                              /* Should be set to OS_OBJ_TYPE_MON                       */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CHAR            *NamePtr;                           /* Pointer to Semaphore Name (NUL terminated ASCII)       */
+#endif
+    OS_PEND_LIST         PendList;                          /* List of tasks waiting on semaphore                     */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_MON              *DbgPrevPtr;
+    OS_MON              *DbgNextPtr;
+    CPU_CHAR            *DbgNamePtr;
+#endif
+                                                            /* ------------------ SPECIFIC MEMBERS ------------------ */
+    void                *MonDataPtr;
+};
+
+struct  os_mon_data {
+    void                 *p_eval_data;
+    OS_MON_ON_EVAL_PTR    p_on_eval;
+};
+
+struct  os_mon_ctx {
+    void * a;
+    void * b;
+    void * c;
+    void * d;
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                  TASK CONTROL BLOCK
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+struct os_tcb {
+    CPU_STK             *StkPtr;                            /* Pointer to current top of stack                        */
+
+    void                *ExtPtr;                            /* Pointer to user definable data for TCB extension       */
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CHAR            *NamePtr;                           /* Pointer to task name                                   */
+#endif
+
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED))
+    CPU_STK             *StkLimitPtr;                       /* Pointer used to set stack 'watermark' limit            */
+#endif
+
+    OS_TCB              *NextPtr;                           /* Pointer to next     TCB in the TCB list                */
+    OS_TCB              *PrevPtr;                           /* Pointer to previous TCB in the TCB list                */
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    OS_TCB              *TickNextPtr;
+    OS_TCB              *TickPrevPtr;
+
+    OS_TICK_LIST        *TickListPtr;                       /* Pointer to tick list if task is in a tick list         */
+#endif
+
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED) || (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED))
+    CPU_STK             *StkBasePtr;                        /* Pointer to base address of stack                       */
+#endif
+
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+    OS_TLS               TLS_Tbl[OS_CFG_TLS_TBL_SIZE];
+#endif
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_TASK_PTR          TaskEntryAddr;                     /* Pointer to task entry point address                    */
+    void                *TaskEntryArg;                      /* Argument passed to task when it was created            */
+#endif
+
+    OS_PEND_DATA        *PendDataTblPtr;                    /* Pointer to list containing objects pended on           */
+    OS_STATE             PendOn;                            /* Indicates what task is pending on                      */
+    OS_STATUS            PendStatus;                        /* Pend status                                            */
+
+    OS_STATE             TaskState;                         /* See OS_TASK_STATE_xxx                                  */
+    OS_PRIO              Prio;                              /* Task priority (0 == highest)                           */
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    OS_PRIO              BasePrio;                          /* Base priority (Not inherited)                          */
+    OS_MUTEX            *MutexGrpHeadPtr;                   /* Owned mutex group head pointer                         */
+#endif
+
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED) || (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED))
+    CPU_STK_SIZE         StkSize;                           /* Size of task stack (in number of stack elements)       */
+#endif
+    OS_OPT               Opt;                               /* Task options as passed by OSTaskCreate()               */
+
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+    OS_OBJ_QTY           PendDataTblEntries;                /* Size of array of objects to pend on                    */
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS               TS;                                /* Timestamp                                              */
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    CPU_INT08U           SemID;                             /* Unique ID for third-party debuggers and tracers.       */
+#endif
+    OS_SEM_CTR           SemCtr;                            /* Task specific semaphore counter                        */
+
+                                                            /* DELAY / TIMEOUT                                        */
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    OS_TICK              TickRemain;                        /* Number of ticks remaining (updated by OS_TickTask()    */
+    OS_TICK              TickCtrPrev;                       /* Used by OSTimeDlyXX() in PERIODIC mode                 */
+#endif
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+    OS_TICK              TimeQuanta;
+    OS_TICK              TimeQuantaCtr;
+#endif
+
+#if (OS_MSG_EN == DEF_ENABLED)
+    void                *MsgPtr;                            /* Message received                                       */
+    OS_MSG_SIZE          MsgSize;
+#endif
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+    OS_MSG_Q             MsgQ;                              /* Message queue associated with task                     */
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+    CPU_TS               MsgQPendTime;                      /* Time it took for signal to be received                 */
+    CPU_TS               MsgQPendTimeMax;                   /* Max amount of time it took for signal to be received   */
+#endif
+#endif
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+    OS_REG               RegTbl[OS_CFG_TASK_REG_TBL_SIZE];  /* Task specific registers                                */
+#endif
+
+#if (OS_CFG_FLAG_EN == DEF_ENABLED)
+    OS_FLAGS             FlagsPend;                         /* Event flag(s) to wait on                               */
+    OS_FLAGS             FlagsRdy;                          /* Event flags that made task ready to run                */
+    OS_OPT               FlagsOpt;                          /* Options (See OS_OPT_FLAG_xxx)                          */
+#endif
+
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+    OS_NESTING_CTR       SuspendCtr;                        /* Nesting counter for OSTaskSuspend()                    */
+#endif
+
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+    OS_CPU_USAGE         CPUUsage;                          /* CPU Usage of task (0.00-100.00%)                       */
+    OS_CPU_USAGE         CPUUsageMax;                       /* CPU Usage of task (0.00-100.00%) - Peak                */
+    OS_CTX_SW_CTR        CtxSwCtr;                          /* Number of time the task was switched in                */
+    CPU_TS               CyclesDelta;                       /* value of OS_TS_GET() - .CyclesStart                    */
+    CPU_TS               CyclesStart;                       /* Snapshot of cycle counter at start of task resumption  */
+    OS_CYCLES            CyclesTotal;                       /* Total number of # of cycles the task has been running  */
+    OS_CYCLES            CyclesTotalPrev;                   /* Snapshot of previous # of cycles                       */
+
+    CPU_TS               SemPendTime;                       /* Time it took for signal to be received                 */
+    CPU_TS               SemPendTimeMax;                    /* Max amount of time it took for signal to be received   */
+#endif
+
+#if (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED)
+    CPU_STK_SIZE         StkUsed;                           /* Number of stack elements used from the stack           */
+    CPU_STK_SIZE         StkFree;                           /* Number of stack elements free on   the stack           */
+#endif
+
+#ifdef CPU_CFG_INT_DIS_MEAS_EN
+    CPU_TS               IntDisTimeMax;                     /* Maximum interrupt disable time                         */
+#endif
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+    CPU_TS               SchedLockTimeMax;                  /* Maximum scheduler lock time                            */
+#endif
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_TCB              *DbgPrevPtr;
+    OS_TCB              *DbgNextPtr;
+    CPU_CHAR            *DbgNamePtr;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    CPU_INT08U           TaskID;                            /* Unique ID for third-party debuggers and tracers.       */
+#endif
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                    TICK DATA TYPE
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+struct  os_tick_list {
+    OS_TCB              *TCB_Ptr;                           /* Pointer to list of tasks in tick list                 */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_OBJ_QTY           NbrEntries;                        /* Current number of entries in the tick list            */
+    OS_OBJ_QTY           NbrUpdated;                        /* Number of entries updated                             */
+#endif
+};
+
+
+/*
+------------------------------------------------------------------------------------------------------------------------
+*                                                   TIMER DATA TYPES
+------------------------------------------------------------------------------------------------------------------------
+*/
+
+struct  os_tmr {
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    OS_OBJ_TYPE          Type;
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CHAR            *NamePtr;                           /* Name to give the timer                                 */
+#endif
+    OS_TMR_CALLBACK_PTR  CallbackPtr;                       /* Function to call when timer expires                    */
+    void                *CallbackPtrArg;                    /* Argument to pass to function when timer expires        */
+    OS_TMR              *NextPtr;                           /* Double link list pointers                              */
+    OS_TMR              *PrevPtr;
+    OS_TICK              Remain;                            /* Amount of time remaining before timer expires          */
+    OS_TICK              Dly;                               /* Delay before start of repeat                           */
+    OS_TICK              Period;                            /* Period to repeat timer                                 */
+    OS_OPT               Opt;                               /* Options (see OS_OPT_TMR_xxx)                           */
+    OS_STATE             State;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_TMR              *DbgPrevPtr;
+    OS_TMR              *DbgNextPtr;
+#endif
+};
+
+
+/*
+************************************************************************************************************************
+************************************************************************************************************************
+*                                           G L O B A L   V A R I A B L E S
+************************************************************************************************************************
+************************************************************************************************************************
+*/
+                                                                        /* APPLICATION HOOKS ------------------------ */
+#if (OS_CFG_APP_HOOKS_EN == DEF_ENABLED)
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+OS_EXT           OS_APP_HOOK_TCB            OS_AppRedzoneHitHookPtr;
+#endif
+OS_EXT           OS_APP_HOOK_TCB            OS_AppTaskCreateHookPtr;
+OS_EXT           OS_APP_HOOK_TCB            OS_AppTaskDelHookPtr;
+OS_EXT           OS_APP_HOOK_TCB            OS_AppTaskReturnHookPtr;
+
+OS_EXT           OS_APP_HOOK_VOID           OS_AppIdleTaskHookPtr;
+OS_EXT           OS_APP_HOOK_VOID           OS_AppStatTaskHookPtr;
+OS_EXT           OS_APP_HOOK_VOID           OS_AppTaskSwHookPtr;
+OS_EXT           OS_APP_HOOK_VOID           OS_AppTimeTickHookPtr;
+#endif
+
+                                                                        /* IDLE TASK -------------------------------- */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+OS_EXT            OS_IDLE_CTR               OSIdleTaskCtr;
+#endif
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+OS_EXT            OS_TCB                    OSIdleTaskTCB;
+#endif
+
+                                                                        /* MISCELLANEOUS ---------------------------- */
+OS_EXT            OS_NESTING_CTR            OSIntNestingCtr;            /* Interrupt nesting level                    */
+#ifdef CPU_CFG_INT_DIS_MEAS_EN
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+OS_EXT            CPU_TS                    OSIntDisTimeMax;            /* Overall interrupt disable time             */
+#endif
+#endif
+
+OS_EXT            OS_STATE                  OSRunning;                  /* Flag indicating the kernel is running      */
+OS_EXT            OS_STATE                  OSInitialized;              /* Flag indicating the kernel is initialized  */
+
+
+                                                                        /* ISR HANDLER TASK ------------------------- */
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+OS_EXT            OS_INT_Q                 *OSIntQInPtr;
+OS_EXT            OS_INT_Q                 *OSIntQOutPtr;
+OS_EXT            OS_OBJ_QTY                OSIntQNbrEntries;
+OS_EXT            OS_OBJ_QTY                OSIntQNbrEntriesMax;
+OS_EXT            OS_OBJ_QTY                OSIntQOvfCtr;
+OS_EXT            OS_TCB                    OSIntQTaskTCB;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+OS_EXT            CPU_TS                    OSIntQTaskTimeMax;
+#endif
+#endif
+
+                                                                        /* FLAGS ------------------------------------ */
+#if (OS_CFG_FLAG_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN  == DEF_ENABLED)
+OS_EXT            OS_FLAG_GRP              *OSFlagDbgListPtr;
+OS_EXT            OS_OBJ_QTY                OSFlagQty;
+#endif
+#endif
+
+                                                                        /* MEMORY MANAGEMENT ------------------------ */
+#if (OS_CFG_MEM_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+OS_EXT            OS_MEM                   *OSMemDbgListPtr;
+OS_EXT            OS_OBJ_QTY                OSMemQty;                   /* Number of memory partitions created        */
+#endif
+#endif
+
+                                                                        /* OS_MSG POOL ------------------------------ */
+#if (OS_MSG_EN == DEF_ENABLED)
+OS_EXT            OS_MSG_POOL               OSMsgPool;                  /* Pool of OS_MSG                             */
+#endif
+
+                                                                        /* MUTEX MANAGEMENT ------------------------- */
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+OS_EXT            OS_MUTEX                 *OSMutexDbgListPtr;
+OS_EXT            OS_OBJ_QTY                OSMutexQty;                 /* Number of mutexes created                  */
+#endif
+#endif
+
+                                                                        /* PRIORITIES ------------------------------- */
+OS_EXT            OS_PRIO                   OSPrioCur;                  /* Priority of current task                   */
+OS_EXT            OS_PRIO                   OSPrioHighRdy;              /* Priority of highest priority task          */
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+OS_EXT            OS_PRIO                   OSPrioSaved;                /* Saved priority level when Post Deferred    */
+#endif
+extern            CPU_DATA                  OSPrioTbl[OS_PRIO_TBL_SIZE];
+
+                                                                        /* QUEUES ----------------------------------- */
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+OS_EXT            OS_Q                     *OSQDbgListPtr;
+OS_EXT            OS_OBJ_QTY                OSQQty;                     /* Number of message queues created           */
+#endif
+#endif
+
+
+
+                                                                        /* READY LIST ------------------------------- */
+OS_EXT            OS_RDY_LIST               OSRdyList[OS_CFG_PRIO_MAX]; /* Table of tasks ready to run                */
+
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+OS_EXT            CPU_BOOLEAN               OSSafetyCriticalStartFlag;  /* Flag indicating that all init. done        */
+#endif
+                                                                        /* SCHEDULER -------------------------------- */
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+OS_EXT            CPU_TS_TMR                OSSchedLockTimeBegin;       /* Scheduler lock time measurement            */
+OS_EXT            CPU_TS_TMR                OSSchedLockTimeMax;
+OS_EXT            CPU_TS_TMR                OSSchedLockTimeMaxCur;
+#endif
+
+OS_EXT            OS_NESTING_CTR            OSSchedLockNestingCtr;      /* Lock nesting level                         */
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+OS_EXT            OS_TICK                   OSSchedRoundRobinDfltTimeQuanta;
+OS_EXT            CPU_BOOLEAN               OSSchedRoundRobinEn;        /* Enable/Disable round-robin scheduling      */
+#endif
+                                                                        /* SEMAPHORES ------------------------------- */
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+OS_EXT            OS_SEM                   *OSSemDbgListPtr;
+OS_EXT            OS_OBJ_QTY                OSSemQty;                   /* Number of semaphores created               */
+#endif
+#endif
+
+                                                                        /* MONITORS --------------------------------- */
+#if (OS_CFG_MON_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+OS_EXT            OS_MON                   *OSMonDbgListPtr;
+OS_EXT            OS_OBJ_QTY                OSMonQty;                   /* Number of monitors created                 */
+#endif
+#endif
+
+                                                                        /* STATISTICS ------------------------------- */
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+OS_EXT            CPU_BOOLEAN               OSStatResetFlag;            /* Force the reset of the computed statistics */
+OS_EXT            OS_CPU_USAGE              OSStatTaskCPUUsage;         /* CPU Usage in %                             */
+OS_EXT            OS_CPU_USAGE              OSStatTaskCPUUsageMax;      /* CPU Usage in % (Peak)                      */
+OS_EXT            OS_TICK                   OSStatTaskCtr;
+OS_EXT            OS_TICK                   OSStatTaskCtrMax;
+OS_EXT            OS_TICK                   OSStatTaskCtrRun;
+OS_EXT            CPU_BOOLEAN               OSStatTaskRdy;
+OS_EXT            OS_TCB                    OSStatTaskTCB;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+OS_EXT            CPU_TS                    OSStatTaskTimeMax;
+#endif
+#endif
+
+                                                                        /* TASKS ------------------------------------ */
+#if ((OS_CFG_TASK_PROFILE_EN == DEF_ENABLED) || (OS_CFG_DBG_EN == DEF_ENABLED))
+OS_EXT            OS_CTX_SW_CTR             OSTaskCtxSwCtr;             /* Number of context switches                 */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+OS_EXT            OS_TCB                   *OSTaskDbgListPtr;
+#endif
+#endif
+
+OS_EXT            OS_OBJ_QTY                OSTaskQty;                  /* Number of tasks created                    */
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+OS_EXT            OS_REG_ID                 OSTaskRegNextAvailID;       /* Next available Task Register ID            */
+#endif
+
+                                                                        /* TICK TASK -------------------------------- */
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+OS_EXT            OS_TICK                   OSTickCtr;                  /* Cnts the #ticks since startup or last set  */
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+OS_EXT            OS_TICK                   OSTickCtrStep;              /* Number of ticks to the next tick task call.*/
+OS_EXT            OS_TICK                   OSTickCtrPend;              /* Number of ticks waiting to be processed.   */
+#endif
+OS_EXT            OS_TCB                    OSTickTaskTCB;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+OS_EXT            CPU_TS                    OSTickTaskTimeMax;
+#endif
+OS_EXT            OS_TICK_LIST              OSTickListDly;
+OS_EXT            OS_TICK_LIST              OSTickListTimeout;
+#endif
+
+
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)                                      /* TIMERS ----------------------------------- */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+OS_EXT            OS_TMR                   *OSTmrDbgListPtr;
+OS_EXT            OS_OBJ_QTY                OSTmrListEntries;           /* Doubly-linked list of timers               */
+#endif
+OS_EXT            OS_TMR                   *OSTmrListPtr;
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)                                    /* Use a Mutex (if available) to protect tmrs */
+OS_EXT            OS_MUTEX                  OSTmrMutex;
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+OS_EXT            OS_OBJ_QTY                OSTmrQty;                   /* Number of timers created                   */
+#endif
+OS_EXT            OS_TCB                    OSTmrTaskTCB;               /* TCB of timer task                          */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+OS_EXT            CPU_TS                    OSTmrTaskTimeMax;
+#endif
+OS_EXT            OS_TICK                   OSTmrTickCtr;               /* Current time for the timers                */
+OS_EXT            OS_CTR                    OSTmrUpdateCnt;             /* Counter for updating timers                */
+OS_EXT            OS_CTR                    OSTmrUpdateCtr;
+#endif
+
+
+
+
+                                                                        /* TCBs ------------------------------------- */
+OS_EXT            OS_TCB                   *OSTCBCurPtr;                /* Pointer to currently running TCB           */
+OS_EXT            OS_TCB                   *OSTCBHighRdyPtr;            /* Pointer to highest priority  TCB           */
+
+
+/*
+************************************************************************************************************************
+************************************************************************************************************************
+*                                                   E X T E R N A L S
+************************************************************************************************************************
+************************************************************************************************************************
+*/
+
+extern  CPU_STK     * const OSCfg_IdleTaskStkBasePtr;
+extern  CPU_STK_SIZE  const OSCfg_IdleTaskStkLimit;
+extern  CPU_STK_SIZE  const OSCfg_IdleTaskStkSize;
+extern  CPU_INT32U    const OSCfg_IdleTaskStkSizeRAM;
+
+extern  OS_INT_Q    * const OSCfg_IntQBasePtr;
+extern  OS_OBJ_QTY    const OSCfg_IntQSize;
+extern  CPU_INT32U    const OSCfg_IntQSizeRAM;
+extern  CPU_STK     * const OSCfg_IntQTaskStkBasePtr;
+extern  CPU_STK_SIZE  const OSCfg_IntQTaskStkLimit;
+extern  CPU_STK_SIZE  const OSCfg_IntQTaskStkSize;
+extern  CPU_INT32U    const OSCfg_IntQTaskStkSizeRAM;
+
+extern  CPU_STK     * const OSCfg_ISRStkBasePtr;
+extern  CPU_STK_SIZE  const OSCfg_ISRStkSize;
+extern  CPU_INT32U    const OSCfg_ISRStkSizeRAM;
+
+extern  OS_MSG_SIZE   const OSCfg_MsgPoolSize;
+extern  CPU_INT32U    const OSCfg_MsgPoolSizeRAM;
+extern  OS_MSG      * const OSCfg_MsgPoolBasePtr;
+
+extern  OS_PRIO       const OSCfg_StatTaskPrio;
+extern  OS_RATE_HZ    const OSCfg_StatTaskRate_Hz;
+extern  CPU_STK     * const OSCfg_StatTaskStkBasePtr;
+extern  CPU_STK_SIZE  const OSCfg_StatTaskStkLimit;
+extern  CPU_STK_SIZE  const OSCfg_StatTaskStkSize;
+extern  CPU_INT32U    const OSCfg_StatTaskStkSizeRAM;
+
+extern  CPU_STK_SIZE  const OSCfg_StkSizeMin;
+
+extern  OS_RATE_HZ    const OSCfg_TickRate_Hz;
+extern  OS_PRIO       const OSCfg_TickTaskPrio;
+extern  CPU_STK     * const OSCfg_TickTaskStkBasePtr;
+extern  CPU_STK_SIZE  const OSCfg_TickTaskStkLimit;
+extern  CPU_STK_SIZE  const OSCfg_TickTaskStkSize;
+extern  CPU_INT32U    const OSCfg_TickTaskStkSizeRAM;
+
+extern  OS_PRIO       const OSCfg_TmrTaskPrio;
+extern  OS_RATE_HZ    const OSCfg_TmrTaskRate_Hz;
+extern  CPU_STK     * const OSCfg_TmrTaskStkBasePtr;
+extern  CPU_STK_SIZE  const OSCfg_TmrTaskStkLimit;
+extern  CPU_STK_SIZE  const OSCfg_TmrTaskStkSize;
+extern  CPU_INT32U    const OSCfg_TmrTaskStkSizeRAM;
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+extern  CPU_STK        OSCfg_IdleTaskStk[];
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+extern  CPU_STK        OSCfg_IntQTaskStk[];
+extern  OS_INT_Q       OSCfg_IntQ[];
+#endif
+
+extern  CPU_STK        OSCfg_ISRStk[];
+
+#if (OS_MSG_EN == DEF_ENABLED)
+extern  OS_MSG         OSCfg_MsgPool[];
+#endif
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+extern  CPU_STK        OSCfg_StatTaskStk[];
+#endif
+
+extern  CPU_STK        OSCfg_TickTaskStk[];
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+extern  CPU_STK        OSCfg_TmrTaskStk[];
+#endif
+
+/*
+************************************************************************************************************************
+************************************************************************************************************************
+*                                        F U N C T I O N   P R O T O T Y P E S
+************************************************************************************************************************
+************************************************************************************************************************
+*/
+
+/* ================================================================================================================== */
+/*                                                    EVENT FLAGS                                                     */
+/* ================================================================================================================== */
+
+#if (OS_CFG_FLAG_EN == DEF_ENABLED)
+
+void          OSFlagCreate              (OS_FLAG_GRP           *p_grp,
+                                         CPU_CHAR              *p_name,
+                                         OS_FLAGS               flags,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_FLAG_DEL_EN == DEF_ENABLED)
+OS_OBJ_QTY    OSFlagDel                 (OS_FLAG_GRP           *p_grp,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+OS_FLAGS      OSFlagPend                (OS_FLAG_GRP           *p_grp,
+                                         OS_FLAGS               flags,
+                                         OS_TICK                timeout,
+                                         OS_OPT                 opt,
+                                         CPU_TS                *p_ts,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_FLAG_PEND_ABORT_EN == DEF_ENABLED)
+OS_OBJ_QTY    OSFlagPendAbort           (OS_FLAG_GRP           *p_grp,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+OS_FLAGS      OSFlagPendGetFlagsRdy     (OS_ERR                *p_err);
+
+OS_FLAGS      OSFlagPost                (OS_FLAG_GRP           *p_grp,
+                                         OS_FLAGS               flags,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+/* ------------------------------------------------ INTERNAL FUNCTIONS ---------------------------------------------- */
+
+void          OS_FlagClr                (OS_FLAG_GRP           *p_grp);
+
+void          OS_FlagBlock              (OS_PEND_DATA          *p_pend_data,
+                                         OS_FLAG_GRP           *p_grp,
+                                         OS_FLAGS               flags,
+                                         OS_OPT                 opt,
+                                         OS_TICK                timeout);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void          OS_FlagDbgListAdd         (OS_FLAG_GRP           *p_grp);
+
+void          OS_FlagDbgListRemove      (OS_FLAG_GRP           *p_grp);
+#endif
+
+OS_FLAGS      OS_FlagPost               (OS_FLAG_GRP           *p_grp,
+                                         OS_FLAGS               flags,
+                                         OS_OPT                 opt,
+                                         CPU_TS                 ts,
+                                         OS_ERR                *p_err);
+
+void          OS_FlagTaskRdy            (OS_TCB                *p_tcb,
+                                         OS_FLAGS               flags_rdy,
+                                         CPU_TS                 ts);
+#endif
+
+
+/* ================================================================================================================== */
+/*                                          FIXED SIZE MEMORY BLOCK MANAGEMENT                                        */
+/* ================================================================================================================== */
+
+#if (OS_CFG_MEM_EN == DEF_ENABLED)
+
+void          OSMemCreate               (OS_MEM                *p_mem,
+                                         CPU_CHAR              *p_name,
+                                         void                  *p_addr,
+                                         OS_MEM_QTY             n_blks,
+                                         OS_MEM_SIZE            blk_size,
+                                         OS_ERR                *p_err);
+
+void         *OSMemGet                  (OS_MEM                *p_mem,
+                                         OS_ERR                *p_err);
+
+void          OSMemPut                  (OS_MEM                *p_mem,
+                                         void                  *p_blk,
+                                         OS_ERR                *p_err);
+
+/* ------------------------------------------------ INTERNAL FUNCTIONS ---------------------------------------------- */
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void          OS_MemDbgListAdd          (OS_MEM                *p_mem);
+#endif
+
+void          OS_MemInit                (OS_ERR                *p_err);
+
+#endif
+
+
+/* ================================================================================================================== */
+/*                                                     MONITORS                                                       */
+/* ================================================================================================================== */
+
+#if (OS_CFG_MON_EN == DEF_ENABLED)
+void          OSMonCreate               (OS_MON                *p_mon,
+                                         CPU_CHAR              *p_name,
+                                         void                  *p_mon_data,
+                                         OS_ERR                *p_err);
+
+void          OSMonOp                   (OS_MON                *p_mon,
+                                         OS_TICK                timeout,
+                                         void                  *p_arg,
+                                         OS_MON_ON_ENTER_PTR    p_on_enter,
+                                         OS_MON_ON_EVAL_PTR     p_on_eval,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_MON_DEL_EN == DEF_ENABLED)
+OS_OBJ_QTY    OSMonDel                  (OS_MON                *p_mon,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+/* ------------------------------------------------ INTERNAL FUNCTIONS ---------------------------------------------- */
+
+void          OS_MonClr                 (OS_MON                *p_mon);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void          OS_MonDbgListAdd          (OS_MON                *p_mon);
+
+void          OS_MonDbgListRemove       (OS_MON                *p_mon);
+#endif
+
+#endif
+
+
+/* ================================================================================================================== */
+/*                                             MUTUAL EXCLUSION SEMAPHORES                                            */
+/* ================================================================================================================== */
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+
+void          OSMutexCreate             (OS_MUTEX              *p_mutex,
+                                         CPU_CHAR              *p_name,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_MUTEX_DEL_EN == DEF_ENABLED)
+OS_OBJ_QTY    OSMutexDel                (OS_MUTEX              *p_mutex,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+void          OSMutexPend               (OS_MUTEX              *p_mutex,
+                                         OS_TICK                timeout,
+                                         OS_OPT                 opt,
+                                         CPU_TS                *p_ts,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_MUTEX_PEND_ABORT_EN == DEF_ENABLED)
+OS_OBJ_QTY    OSMutexPendAbort          (OS_MUTEX              *p_mutex,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+void          OSMutexPost               (OS_MUTEX              *p_mutex,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+
+/* ------------------------------------------------ INTERNAL FUNCTIONS ---------------------------------------------- */
+
+void          OS_MutexClr               (OS_MUTEX              *p_mutex);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void          OS_MutexDbgListAdd        (OS_MUTEX              *p_mutex);
+
+void          OS_MutexDbgListRemove     (OS_MUTEX              *p_mutex);
+#endif
+
+void          OS_MutexGrpAdd            (OS_TCB                *p_tcb,
+                                         OS_MUTEX              *p_mutex);
+
+void          OS_MutexGrpRemove         (OS_TCB                *p_tcb,
+                                         OS_MUTEX              *p_mutex);
+
+OS_PRIO       OS_MutexGrpPrioFindHighest(OS_TCB                *p_tcb);
+
+void          OS_MutexGrpPostAll        (OS_TCB                *p_tcb);
+#endif
+
+
+/* ================================================================================================================== */
+/*                                                    MULTI PEND                                                      */
+/* ================================================================================================================== */
+
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+
+OS_OBJ_QTY    OSPendMulti               (OS_PEND_DATA          *p_pend_data_tbl,
+                                         OS_OBJ_QTY             tbl_size,
+                                         OS_TICK                timeout,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+/* ------------------------------------------------ INTERNAL FUNCTIONS ---------------------------------------------- */
+
+OS_OBJ_QTY    OS_PendMultiGetRdy        (OS_PEND_DATA          *p_pend_data_tbl,
+                                         OS_OBJ_QTY             tbl_size);
+
+CPU_BOOLEAN   OS_PendMultiValidate      (OS_PEND_DATA          *p_pend_data_tbl,
+                                         OS_OBJ_QTY             tbl_size);
+
+void          OS_PendMultiWait          (OS_PEND_DATA          *p_pend_data_tbl,
+                                         OS_OBJ_QTY             tbl_size,
+                                         OS_TICK                timeout);
+#endif
+
+
+/* ================================================================================================================== */
+/*                                                   MESSAGE QUEUES                                                   */
+/* ================================================================================================================== */
+
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+
+void          OSQCreate                 (OS_Q                  *p_q,
+                                         CPU_CHAR              *p_name,
+                                         OS_MSG_QTY             max_qty,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_Q_DEL_EN == DEF_ENABLED)
+OS_OBJ_QTY    OSQDel                    (OS_Q                  *p_q,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+#if (OS_CFG_Q_FLUSH_EN == DEF_ENABLED)
+OS_MSG_QTY    OSQFlush                  (OS_Q                  *p_q,
+                                         OS_ERR                *p_err);
+#endif
+
+void         *OSQPend                   (OS_Q                  *p_q,
+                                         OS_TICK                timeout,
+                                         OS_OPT                 opt,
+                                         OS_MSG_SIZE           *p_msg_size,
+                                         CPU_TS                *p_ts,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_Q_PEND_ABORT_EN == DEF_ENABLED)
+OS_OBJ_QTY    OSQPendAbort              (OS_Q                  *p_q,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+void          OSQPost                   (OS_Q                  *p_q,
+                                         void                  *p_void,
+                                         OS_MSG_SIZE            msg_size,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+/* ------------------------------------------------ INTERNAL FUNCTIONS ---------------------------------------------- */
+
+void          OS_QClr                   (OS_Q                  *p_q);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void          OS_QDbgListAdd            (OS_Q                  *p_q);
+
+void          OS_QDbgListRemove         (OS_Q                  *p_q);
+#endif
+
+void          OS_QPost                  (OS_Q                  *p_q,
+                                         void                  *p_void,
+                                         OS_MSG_SIZE            msg_size,
+                                         OS_OPT                 opt,
+                                         CPU_TS                 ts,
+                                         OS_ERR                *p_err);
+#endif
+
+
+/* ================================================================================================================== */
+/*                                                     SEMAPHORES                                                     */
+/* ================================================================================================================== */
+
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+
+void          OSSemCreate               (OS_SEM                *p_sem,
+                                         CPU_CHAR              *p_name,
+                                         OS_SEM_CTR             cnt,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_SEM_DEL_EN == DEF_ENABLED)
+OS_OBJ_QTY    OSSemDel                  (OS_SEM                *p_sem,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+OS_SEM_CTR    OSSemPend                 (OS_SEM                *p_sem,
+                                         OS_TICK                timeout,
+                                         OS_OPT                 opt,
+                                         CPU_TS                *p_ts,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_SEM_PEND_ABORT_EN== DEF_ENABLED)
+OS_OBJ_QTY    OSSemPendAbort            (OS_SEM                *p_sem,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+OS_SEM_CTR    OSSemPost                 (OS_SEM                *p_sem,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_SEM_SET_EN == DEF_ENABLED)
+void          OSSemSet                  (OS_SEM                *p_sem,
+                                         OS_SEM_CTR             cnt,
+                                         OS_ERR                *p_err);
+#endif
+
+/* ------------------------------------------------ INTERNAL FUNCTIONS ---------------------------------------------- */
+
+void          OS_SemClr                 (OS_SEM                *p_sem);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void          OS_SemDbgListAdd          (OS_SEM                *p_sem);
+
+void          OS_SemDbgListRemove       (OS_SEM                *p_sem);
+#endif
+
+OS_SEM_CTR    OS_SemPost                (OS_SEM                *p_sem,
+                                         OS_OPT                 opt,
+                                         CPU_TS                 ts,
+                                         OS_ERR                *p_err);
+#endif
+
+
+/* ================================================================================================================== */
+/*                                                 TASK MANAGEMENT                                                    */
+/* ================================================================================================================== */
+
+#if (OS_CFG_TASK_CHANGE_PRIO_EN == DEF_ENABLED)
+void          OSTaskChangePrio          (OS_TCB                *p_tcb,
+                                         OS_PRIO                prio_new,
+                                         OS_ERR                *p_err);
+#endif
+
+void          OSTaskCreate              (OS_TCB                *p_tcb,
+                                         CPU_CHAR              *p_name,
+                                         OS_TASK_PTR            p_task,
+                                         void                  *p_arg,
+                                         OS_PRIO                prio,
+                                         CPU_STK               *p_stk_base,
+                                         CPU_STK_SIZE           stk_limit,
+                                         CPU_STK_SIZE           stk_size,
+                                         OS_MSG_QTY             q_size,
+                                         OS_TICK                time_quanta,
+                                         void                  *p_ext,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_TASK_DEL_EN == DEF_ENABLED)
+void          OSTaskDel                 (OS_TCB                *p_tcb,
+                                         OS_ERR                *p_err);
+#endif
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+OS_MSG_QTY    OSTaskQFlush              (OS_TCB                *p_tcb,
+                                         OS_ERR                *p_err);
+
+void         *OSTaskQPend               (OS_TICK                timeout,
+                                         OS_OPT                 opt,
+                                         OS_MSG_SIZE           *p_msg_size,
+                                         CPU_TS                *p_ts,
+                                         OS_ERR                *p_err);
+
+CPU_BOOLEAN   OSTaskQPendAbort          (OS_TCB                *p_tcb,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+void          OSTaskQPost               (OS_TCB                *p_tcb,
+                                         void                  *p_void,
+                                         OS_MSG_SIZE            msg_size,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+#endif
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+OS_REG        OSTaskRegGet              (OS_TCB                *p_tcb,
+                                         OS_REG_ID              id,
+                                         OS_ERR                *p_err);
+
+OS_REG_ID     OSTaskRegGetID            (OS_ERR                *p_err);
+
+void          OSTaskRegSet              (OS_TCB                *p_tcb,
+                                         OS_REG_ID              id,
+                                         OS_REG                 value,
+                                         OS_ERR                *p_err);
+#endif
+
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+void          OSTaskResume              (OS_TCB                *p_tcb,
+                                         OS_ERR                *p_err);
+
+void          OSTaskSuspend             (OS_TCB                *p_tcb,
+                                         OS_ERR                *p_err);
+#endif
+
+OS_SEM_CTR    OSTaskSemPend             (OS_TICK                timeout,
+                                         OS_OPT                 opt,
+                                         CPU_TS                *p_ts,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_TASK_SEM_PEND_ABORT_EN == DEF_ENABLED)
+CPU_BOOLEAN   OSTaskSemPendAbort        (OS_TCB                *p_tcb,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+OS_SEM_CTR    OSTaskSemPost             (OS_TCB                *p_tcb,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+OS_SEM_CTR    OSTaskSemSet              (OS_TCB                *p_tcb,
+                                         OS_SEM_CTR             cnt,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED)
+void          OSTaskStkChk              (OS_TCB                *p_tcb,
+                                         CPU_STK_SIZE          *p_free,
+                                         CPU_STK_SIZE          *p_used,
+                                         OS_ERR                *p_err);
+#endif
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+CPU_BOOLEAN   OSTaskStkRedzoneChk       (OS_TCB                *p_tcb);
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+void          OSSafetyCriticalStart     (void);
+#endif
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+void          OSTaskTimeQuantaSet       (OS_TCB                *p_tcb,
+                                         OS_TICK                time_quanta,
+                                         OS_ERR                *p_err);
+#endif
+
+/* ------------------------------------------------ INTERNAL FUNCTIONS ---------------------------------------------- */
+
+void          OS_TaskBlock              (OS_TCB                *p_tcb,
+                                         OS_TICK                timeout);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void          OS_TaskDbgListAdd         (OS_TCB                *p_tcb);
+
+void          OS_TaskDbgListRemove      (OS_TCB                *p_tcb);
+#endif
+
+void          OS_TaskInit               (OS_ERR                *p_err);
+
+void          OS_TaskInitTCB            (OS_TCB                *p_tcb);
+
+void          OS_TaskQPost              (OS_TCB                *p_tcb,
+                                         void                  *p_void,
+                                         OS_MSG_SIZE            msg_size,
+                                         OS_OPT                 opt,
+                                         CPU_TS                 ts,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+void          OS_TaskResume             (OS_TCB                *p_tcb,
+                                         OS_ERR                *p_err);
+#endif
+
+void          OS_TaskReturn             (void);
+
+OS_SEM_CTR    OS_TaskSemPost            (OS_TCB                *p_tcb,
+                                         OS_OPT                 opt,
+                                         CPU_TS                 ts,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+CPU_BOOLEAN   OS_TaskStkRedzoneChk      (CPU_STK               *p_base,
+                                         CPU_STK_SIZE           stk_size);
+
+void          OS_TaskStkRedzoneInit     (CPU_STK               *p_base,
+                                         CPU_STK_SIZE           stk_size);
+#endif
+
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+void          OS_TaskSuspend            (OS_TCB                *p_tcb,
+                                         OS_ERR                *p_err);
+#endif
+
+void          OS_TaskChangePrio(         OS_TCB                *p_tcb,
+                                         OS_PRIO                prio_new);
+
+
+/* ================================================================================================================== */
+/*                                                 TIME MANAGEMENT                                                    */
+/* ================================================================================================================== */
+
+void          OSTimeDly                 (OS_TICK                dly,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+#if (OS_CFG_TIME_DLY_HMSM_EN == DEF_ENABLED)
+void          OSTimeDlyHMSM             (CPU_INT16U             hours,
+                                         CPU_INT16U             minutes,
+                                         CPU_INT16U             seconds,
+                                         CPU_INT32U             milli,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+#endif
+
+#if (OS_CFG_TIME_DLY_RESUME_EN == DEF_ENABLED)
+void          OSTimeDlyResume           (OS_TCB                *p_tcb,
+                                         OS_ERR                *p_err);
+#endif
+
+OS_TICK       OSTimeGet                 (OS_ERR                *p_err);
+
+void          OSTimeSet                 (OS_TICK                ticks,
+                                         OS_ERR                *p_err);
+
+void          OSTimeTick                (void);
+void          OSTimeDynTick             (OS_TICK                ticks);
+
+
+/* ================================================================================================================== */
+/*                                                 TIMER MANAGEMENT                                                   */
+/* ================================================================================================================== */
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+void          OSTmrCreate               (OS_TMR                *p_tmr,
+                                         CPU_CHAR              *p_name,
+                                         OS_TICK                dly,
+                                         OS_TICK                period,
+                                         OS_OPT                 opt,
+                                         OS_TMR_CALLBACK_PTR    p_callback,
+                                         void                  *p_callback_arg,
+                                         OS_ERR                *p_err);
+
+CPU_BOOLEAN   OSTmrDel                  (OS_TMR                *p_tmr,
+                                         OS_ERR                *p_err);
+
+void          OSTmrSet (                 OS_TMR                *p_tmr,
+                                         OS_TICK                dly,
+                                         OS_TICK                period,
+                                         OS_TMR_CALLBACK_PTR    p_callback,
+                                         void                  *p_callback_arg,
+                                         OS_ERR                *p_err);
+
+OS_TICK       OSTmrRemainGet            (OS_TMR                *p_tmr,
+                                         OS_ERR                *p_err);
+
+CPU_BOOLEAN   OSTmrStart                (OS_TMR                *p_tmr,
+                                         OS_ERR                *p_err);
+
+OS_STATE      OSTmrStateGet             (OS_TMR                *p_tmr,
+                                         OS_ERR                *p_err);
+
+CPU_BOOLEAN   OSTmrStop                 (OS_TMR                *p_tmr,
+                                         OS_OPT                 opt,
+                                         void                  *p_callback_arg,
+                                         OS_ERR                *p_err);
+
+/* ------------------------------------------------ INTERNAL FUNCTIONS ---------------------------------------------- */
+
+void          OS_TmrClr                 (OS_TMR                *p_tmr);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void          OS_TmrDbgListAdd          (OS_TMR                *p_tmr);
+
+void          OS_TmrDbgListRemove       (OS_TMR                *p_tmr);
+#endif
+
+void          OS_TmrInit                (OS_ERR                *p_err);
+
+void          OS_TmrLink                (OS_TMR                *p_tmr,
+                                         OS_OPT                 opt);
+
+void          OS_TmrUnlink              (OS_TMR                *p_tmr);
+
+void          OS_TmrTask                (void                  *p_arg);
+
+#endif
+
+
+/* ================================================================================================================== */
+/*                                          TASK LOCAL STORAGE (TLS) SUPPORT                                          */
+/* ================================================================================================================== */
+
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+OS_TLS_ID  OS_TLS_GetID       (OS_ERR              *p_err);
+
+OS_TLS     OS_TLS_GetValue    (OS_TCB              *p_tcb,
+                               OS_TLS_ID            id,
+                               OS_ERR              *p_err);
+
+void       OS_TLS_Init        (OS_ERR              *p_err);
+
+void       OS_TLS_SetValue    (OS_TCB              *p_tcb,
+                               OS_TLS_ID            id,
+                               OS_TLS               value,
+                               OS_ERR              *p_err);
+
+void       OS_TLS_SetDestruct (OS_TLS_ID            id,
+                               OS_TLS_DESTRUCT_PTR  p_destruct,
+                               OS_ERR              *p_err);
+
+void       OS_TLS_TaskCreate  (OS_TCB              *p_tcb);
+
+void       OS_TLS_TaskDel     (OS_TCB              *p_tcb);
+
+void       OS_TLS_TaskSw      (void);
+#endif
+
+
+/* ================================================================================================================== */
+/*                                                    MISCELLANEOUS                                                   */
+/* ================================================================================================================== */
+
+void          OSInit                    (OS_ERR                *p_err);
+
+void          OSIntEnter                (void);
+void          OSIntExit                 (void);
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+void          OSSchedRoundRobinCfg      (CPU_BOOLEAN            en,
+                                         OS_TICK                dflt_time_quanta,
+                                         OS_ERR                *p_err);
+
+void          OSSchedRoundRobinYield    (OS_ERR                *p_err);
+
+#endif
+
+void          OSSched                   (void);
+
+void          OSSchedLock               (OS_ERR                *p_err);
+void          OSSchedUnlock             (OS_ERR                *p_err);
+
+void          OSStart                   (OS_ERR                *p_err);
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+void          OSStatReset               (OS_ERR                *p_err);
+
+void          OSStatTaskCPUUsageInit    (OS_ERR                *p_err);
+#endif
+
+CPU_INT16U    OSVersion                 (OS_ERR                *p_err);
+
+/* ------------------------------------------------ INTERNAL FUNCTIONS ---------------------------------------------- */
+
+void          OS_IdleTask               (void                  *p_arg);
+
+void          OS_IdleTaskInit           (OS_ERR                *p_err);
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+void          OS_StatTask               (void                  *p_arg);
+#endif
+
+void          OS_StatTaskInit           (OS_ERR                *p_err);
+
+void          OS_TickTask               (void                  *p_arg);
+void          OS_TickTaskInit           (OS_ERR                *p_err);
+
+
+/*
+************************************************************************************************************************
+************************************************************************************************************************
+*                                    T A R G E T   S P E C I F I C   F U N C T I O N S
+************************************************************************************************************************
+************************************************************************************************************************
+*/
+
+#ifdef __cplusplus
+extern  "C" {
+#endif
+
+void          OSIdleTaskHook            (void);
+
+void          OSInitHook                (void);
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+void          OSRedzoneHitHook          (OS_TCB                *p_tcb);
+#endif
+
+void          OSStatTaskHook            (void);
+
+void          OSTaskCreateHook          (OS_TCB                *p_tcb);
+
+void          OSTaskDelHook             (OS_TCB                *p_tcb);
+
+void          OSTaskReturnHook          (OS_TCB                *p_tcb);
+
+CPU_STK      *OSTaskStkInit             (OS_TASK_PTR            p_task,
+                                         void                  *p_arg,
+                                         CPU_STK               *p_stk_base,
+                                         CPU_STK               *p_stk_limit,
+                                         CPU_STK_SIZE           stk_size,
+                                         OS_OPT                 opt);
+
+void          OSTaskSwHook              (void);
+
+void          OSTimeTickHook            (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+************************************************************************************************************************
+*                   u C / O S - I I I   I N T E R N A L   F U N C T I O N   P R O T O T Y P E S
+************************************************************************************************************************
+************************************************************************************************************************
+*/
+
+void          OSCfg_Init                (void);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void          OS_Dbg_Init               (void);
+#endif
+
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+void          OS_IntQTaskInit           (OS_ERR                *p_err);
+
+void          OS_IntQPost               (OS_OBJ_TYPE            type,
+                                         void                  *p_obj,
+                                         void                  *p_void,
+                                         OS_MSG_SIZE            msg_size,
+                                         OS_FLAGS               flags,
+                                         OS_OPT                 opt,
+                                         CPU_TS                 ts,
+                                         OS_ERR                *p_err);
+
+void          OS_IntQRePost             (void);
+
+void          OS_IntQTask               (void                  *p_arg);
+#endif
+
+/* ----------------------------------------------- MESSAGE MANAGEMENT ----------------------------------------------- */
+
+void          OS_MsgPoolInit            (OS_ERR                *p_err);
+
+OS_MSG_QTY    OS_MsgQFreeAll            (OS_MSG_Q              *p_msg_q);
+
+void         *OS_MsgQGet                (OS_MSG_Q              *p_msg_q,
+                                         OS_MSG_SIZE           *p_msg_size,
+                                         CPU_TS                *p_ts,
+                                         OS_ERR                *p_err);
+
+void          OS_MsgQInit               (OS_MSG_Q              *p_msg_q,
+                                         OS_MSG_QTY             size);
+
+void          OS_MsgQPut                (OS_MSG_Q              *p_msg_q,
+                                         void                  *p_void,
+                                         OS_MSG_SIZE            msg_size,
+                                         OS_OPT                 opt,
+                                         CPU_TS                 ts,
+                                         OS_ERR                *p_err);
+
+/* ---------------------------------------------- PEND/POST MANAGEMENT ---------------------------------------------- */
+
+void          OS_Pend                   (OS_PEND_DATA          *p_pend_data,
+                                         OS_PEND_OBJ           *p_obj,
+                                         OS_STATE               pending_on,
+                                         OS_TICK                timeout);
+
+void          OS_PendAbort              (OS_PEND_OBJ           *p_obj,
+                                         OS_TCB                *p_tcb,
+                                         CPU_TS                 ts);
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+void          OS_PendAbort1             (OS_PEND_OBJ           *p_obj,
+                                         OS_TCB                *p_tcb,
+                                         CPU_TS                 ts);
+#endif
+void          OS_PendObjDel             (OS_PEND_OBJ           *p_obj,
+                                         OS_TCB                *p_tcb,
+                                         CPU_TS                 ts);
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+void          OS_PendObjDel1            (OS_PEND_OBJ           *p_obj,
+                                         OS_TCB                *p_tcb,
+                                         CPU_TS                 ts);
+#endif
+void          OS_Post                   (OS_PEND_OBJ           *p_obj,
+                                         OS_TCB                *p_tcb,
+                                         void                  *p_void,
+                                         OS_MSG_SIZE            msg_size,
+                                         CPU_TS                 ts);
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+void          OS_Post1                  (OS_PEND_OBJ           *p_obj,
+                                         OS_TCB                *p_tcb,
+                                         void                  *p_void,
+                                         OS_MSG_SIZE            msg_size,
+                                         CPU_TS                 ts);
+#endif
+/* ----------------------------------------------- PRIORITY MANAGEMENT ---------------------------------------------- */
+
+void          OS_PrioInit               (void);
+
+void          OS_PrioInsert             (OS_PRIO                prio);
+
+void          OS_PrioRemove             (OS_PRIO                prio);
+
+OS_PRIO       OS_PrioGetHighest         (void);
+
+/* --------------------------------------------------- SCHEDULING --------------------------------------------------- */
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+void          OS_Sched0                 (void);
+#endif
+
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+void          OS_SchedLockTimeMeasStart (void);
+void          OS_SchedLockTimeMeasStop  (void);
+#endif
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+void          OS_SchedRoundRobin        (OS_RDY_LIST           *p_rdy_list);
+#endif
+
+/* --------------------------------------------- READY LIST MANAGEMENT ---------------------------------------------- */
+
+void          OS_RdyListInit            (void);
+
+void          OS_RdyListInsert          (OS_TCB                *p_tcb);
+
+void          OS_RdyListInsertHead      (OS_TCB                *p_tcb);
+
+void          OS_RdyListInsertTail      (OS_TCB                *p_tcb);
+
+void          OS_RdyListMoveHeadToTail  (OS_RDY_LIST           *p_rdy_list);
+
+void          OS_RdyListRemove          (OS_TCB                *p_tcb);
+
+/* ---------------------------------------------- PEND LIST MANAGEMENT ---------------------------------------------- */
+
+void          OS_PendDataInit           (OS_TCB                *p_tcb,
+                                         OS_PEND_DATA          *p_pend_data_tbl,
+                                         OS_OBJ_QTY             tbl_size);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void          OS_PendDbgNameAdd         (OS_PEND_OBJ           *p_obj,
+                                         OS_TCB                *p_tcb);
+
+void          OS_PendDbgNameRemove      (OS_PEND_OBJ           *p_obj,
+                                         OS_TCB                *p_tcb);
+#endif
+
+OS_PEND_LIST *OS_PendListGetPtr         (OS_PEND_OBJ           *p_obj);
+
+void          OS_PendListInit           (OS_PEND_LIST          *p_pend_list);
+
+void          OS_PendListInsertHead     (OS_PEND_LIST          *p_pend_list,
+                                         OS_PEND_DATA          *p_pend_data);
+
+void          OS_PendListInsertPrio     (OS_PEND_LIST          *p_pend_list,
+                                         OS_PEND_DATA          *p_pend_data);
+
+void          OS_PendListChangePrio     (OS_TCB                *p_tcb);
+
+void          OS_PendListRemove         (OS_TCB                *p_tcb);
+
+void          OS_PendListRemove1        (OS_PEND_LIST          *p_pend_list,
+                                         OS_PEND_DATA          *p_pend_data);
+
+/* ---------------------------------------------- TICK LIST MANAGEMENT ---------------------------------------------- */
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+void          OS_TickListInsert         (OS_TICK_LIST          *p_list,
+                                         OS_TCB                *p_tcb,
+                                         OS_TICK                time);
+
+void          OS_TickListInsertDly      (OS_TCB                *p_tcb,
+                                         OS_TICK                time,
+                                         OS_OPT                 opt,
+                                         OS_ERR                *p_err);
+
+void          OS_TickListRemove         (OS_TCB                *p_tcb);
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+OS_TICK       BSP_OS_TickGet            (void);
+
+OS_TICK       BSP_OS_TickNextSet        (OS_TICK                ticks);
+#endif
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                          LOOK FOR MISSING #define CONSTANTS
+*
+* This section is used to generate ERROR messages at compile time if certain #define constants are
+* MISSING in OS_CFG.H.  This allows you to quickly determine the source of the error.
+*
+* You SHOULD NOT change this section UNLESS you would like to add more comments as to the source of the
+* compile time error.
+************************************************************************************************************************
+*/
+
+/*
+************************************************************************************************************************
+*                                                     MISCELLANEOUS
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_APP_HOOKS_EN
+#error  "OS_CFG.H, Missing OS_CFG_APP_HOOKS_EN: Enable (1) or Disable (0) application specific hook functions"
+#endif
+
+
+#ifndef OS_CFG_ARG_CHK_EN
+#error  "OS_CFG.H, Missing OS_CFG_ARG_CHK_EN: Enable (1) or Disable (0) argument checking"
+#endif
+
+
+#ifndef OS_CFG_DBG_EN
+#error  "OS_CFG.H, Missing OS_CFG_DBG_EN: Allows you to include variables for debugging or not"
+#endif
+
+
+#ifndef OS_CFG_CALLED_FROM_ISR_CHK_EN
+#error  "OS_CFG.H, Missing OS_CFG_CALLED_FROM_ISR_CHK_EN: Enable (1) or Disable (0) checking whether in an ISR in kernel services"
+#endif
+
+
+#ifndef OS_CFG_OBJ_TYPE_CHK_EN
+#error  "OS_CFG.H, Missing OS_CFG_OBJ_TYPE_CHK_EN: Enable (1) or Disable (0) checking for proper object types in kernel services"
+#endif
+
+
+#ifndef OS_CFG_PEND_MULTI_EN
+#error  "OS_CFG.H, Missing OS_CFG_PEND_MULTI_EN: Enable (1) or Disable (0) multi-pend feature"
+#endif
+
+
+#if     OS_CFG_PRIO_MAX < 8u
+#error  "OS_CFG.H,         OS_CFG_PRIO_MAX must be >= 8"
+#endif
+
+
+#ifndef OS_CFG_SCHED_LOCK_TIME_MEAS_EN
+#error  "OS_CFG.H, Missing OS_CFG_SCHED_LOCK_TIME_MEAS_EN: Include code to measure scheduler lock time"
+#else
+    #if    (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED) && \
+           (OS_CFG_TS_EN                   == DEF_DISABLED)
+    #error  "OS_CFG.H,         OS_CFG_TS_EN must be Enabled (1) to measure scheduler lock time"
+    #endif
+#endif
+
+
+#ifndef OS_CFG_SCHED_ROUND_ROBIN_EN
+#error  "OS_CFG.H, Missing OS_CFG_SCHED_ROUND_ROBIN_EN: Include code for Round Robin Scheduling"
+#endif
+
+
+#ifndef OS_CFG_STK_SIZE_MIN
+#error  "OS_CFG.H, Missing OS_CFG_STK_SIZE_MIN: Determines the minimum size for a task stack"
+#endif
+
+#ifndef OS_CFG_TS_EN
+#error  "OS_CFG.H, Missing OS_CFG_TS_EN: Determines whether time stamping is enabled"
+#else
+    #if    (OS_CFG_TS_EN  == DEF_ENABLED) && \
+           (CPU_CFG_TS_EN == DEF_DISABLED)
+    #error  "CPU_CFG.H,        CPU_CFG_TS_32_EN must be Enabled (1) to use time stamp feature"
+    #endif
+#endif
+
+/*
+************************************************************************************************************************
+*                                                     EVENT FLAGS
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_FLAG_EN
+#error  "OS_CFG.H, Missing OS_CFG_FLAG_EN: Enable (1) or Disable (0) code generation for Event Flags"
+#else
+    #ifndef OS_CFG_FLAG_DEL_EN
+    #error  "OS_CFG.H, Missing OS_CFG_FLAG_DEL_EN: Include code for OSFlagDel()"
+    #endif
+
+    #ifndef OS_CFG_FLAG_MODE_CLR_EN
+    #error  "OS_CFG.H, Missing OS_CFG_FLAG_MODE_CLR_EN: Include code for Wait on Clear EVENT FLAGS"
+    #endif
+
+    #ifndef OS_CFG_FLAG_PEND_ABORT_EN
+    #error  "OS_CFG.H, Missing OS_CFG_FLAG_PEND_ABORT_EN: Include code for aborting pends from another task"
+    #endif
+#endif
+
+/*
+************************************************************************************************************************
+*                                                  MEMORY MANAGEMENT
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_MEM_EN
+#error  "OS_CFG.H, Missing OS_CFG_MEM_EN: Enable (1) or Disable (0) code generation for MEMORY MANAGER"
+#endif
+
+/*
+************************************************************************************************************************
+*                                              MUTUAL EXCLUSION SEMAPHORES
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_MUTEX_EN
+#error  "OS_CFG.H, Missing OS_CFG_MUTEX_EN: Enable (1) or Disable (0) code generation for MUTEX"
+#else
+    #ifndef OS_CFG_MUTEX_DEL_EN
+    #error  "OS_CFG.H, Missing OS_CFG_MUTEX_DEL_EN: Include code for OSMutexDel()"
+    #endif
+
+    #ifndef OS_CFG_MUTEX_PEND_ABORT_EN
+    #error  "OS_CFG.H, Missing OS_CFG_MUTEX_PEND_ABORT_EN: Include code for OSMutexPendAbort()"
+    #endif
+#endif
+
+/*
+************************************************************************************************************************
+*                                                    MESSAGE QUEUES
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_Q_EN
+#error  "OS_CFG.H, Missing OS_CFG_Q_EN: Enable (1) or Disable (0) code generation for QUEUES"
+#else
+    #ifndef OS_CFG_Q_DEL_EN
+    #error  "OS_CFG.H, Missing OS_CFG_Q_DEL_EN: Include code for OSQDel()"
+    #endif
+
+    #ifndef OS_CFG_Q_FLUSH_EN
+    #error  "OS_CFG.H, Missing OS_CFG_Q_FLUSH_EN: Include code for OSQFlush()"
+    #endif
+
+    #ifndef OS_CFG_Q_PEND_ABORT_EN
+    #error  "OS_CFG.H, Missing OS_CFG_Q_PEND_ABORT_EN: Include code for OSQPendAbort()"
+    #endif
+#endif
+
+/*
+************************************************************************************************************************
+*                                                      SEMAPHORES
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_SEM_EN
+#error  "OS_CFG.H, Missing OS_CFG_SEM_EN: Enable (1) or Disable (0) code generation for SEMAPHORES"
+#else
+    #ifndef OS_CFG_SEM_DEL_EN
+    #error  "OS_CFG.H, Missing OS_CFG_SEM_DEL_EN: Include code for OSSemDel()"
+    #endif
+
+    #ifndef OS_CFG_SEM_PEND_ABORT_EN
+    #error  "OS_CFG.H, Missing OS_CFG_SEM_PEND_ABORT_EN: Include code for OSSemPendAbort()"
+    #endif
+
+    #ifndef OS_CFG_SEM_SET_EN
+    #error  "OS_CFG.H, Missing OS_CFG_SEM_SET_EN: Include code for OSSemSet()"
+    #endif
+#endif
+
+/*
+************************************************************************************************************************
+*                                                   TASK MANAGEMENT
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_STAT_TASK_EN
+#error  "OS_CFG.H, Missing OS_CFG_STAT_TASK_EN: Enable (1) or Disable(0) the statistics task"
+#endif
+
+#ifndef OS_CFG_STAT_TASK_STK_CHK_EN
+#error  "OS_CFG.H, Missing OS_CFG_STAT_TASK_STK_CHK_EN: Check task stacks from statistics task"
+#endif
+
+#ifndef OS_CFG_TASK_CHANGE_PRIO_EN
+#error  "OS_CFG.H, Missing OS_CFG_TASK_CHANGE_PRIO_EN: Include code for OSTaskChangePrio()"
+#endif
+
+#ifndef OS_CFG_TASK_DEL_EN
+#error  "OS_CFG.H, Missing OS_CFG_TASK_DEL_EN: Include code for OSTaskDel()"
+#endif
+
+#ifndef OS_CFG_TASK_Q_EN
+#error  "OS_CFG.H, Missing OS_CFG_TASK_Q_EN: Include code for OSTaskQxxx()"
+#endif
+
+#ifndef OS_CFG_TASK_Q_PEND_ABORT_EN
+#error  "OS_CFG.H, Missing OS_CFG_TASK_Q_PEND_ABORT_EN: Include code for OSTaskQPendAbort()"
+#endif
+
+#ifndef OS_CFG_TASK_PROFILE_EN
+#error  "OS_CFG.H, Missing OS_CFG_TASK_PROFILE_EN: Include code for task profiling"
+#else
+#if    (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED) && \
+       (OS_CFG_TASK_IDLE_EN == DEF_DISABLED)
+#error  "OS_CFG.H,         OS_CFG_TASK_IDLE_EN must be Enabled (1) to use the task profiling feature"
+#endif
+#endif
+
+#ifndef OS_CFG_TASK_REG_TBL_SIZE
+#error  "OS_CFG.H, Missing OS_CFG_TASK_REG_TBL_SIZE: Include support for task specific registers"
+#endif
+
+#ifndef OS_CFG_TASK_SEM_PEND_ABORT_EN
+#error  "OS_CFG.H, Missing OS_CFG_TASK_SEM_PEND_ABORT_EN: Include code for OSTaskSemPendAbort()"
+#endif
+
+#ifndef OS_CFG_TASK_SUSPEND_EN
+#error  "OS_CFG.H, Missing OS_CFG_TASK_SUSPEND_EN: Include code for OSTaskSuspend() and OSTaskResume()"
+#endif
+
+/*
+************************************************************************************************************************
+*                                                  TIME MANAGEMENT
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_TIME_DLY_HMSM_EN
+#error  "OS_CFG.H, Missing OS_CFG_TIME_DLY_HMSM_EN: Include code for OSTimeDlyHMSM()"
+#endif
+
+#ifndef OS_CFG_TIME_DLY_RESUME_EN
+#error  "OS_CFG.H, Missing OS_CFG_TIME_DLY_RESUME_EN: Include code for OSTimeDlyResume()"
+#endif
+
+/*
+************************************************************************************************************************
+*                                                  TIMER MANAGEMENT
+************************************************************************************************************************
+*/
+
+#ifndef OS_CFG_TMR_EN
+#error  "OS_CFG.H, Missing OS_CFG_TMR_EN: When (1) enables code generation for Timer Management"
+#else
+    #ifndef OS_CFG_TMR_DEL_EN
+    #error  "OS_CFG.H, Missing OS_CFG_TMR_DEL_EN: Enables (1) or Disables (0) code for OSTmrDel()"
+    #endif
+#endif
+
+/*
+************************************************************************************************************************
+*                                             LIBRARY CONFIGURATION ERRORS
+************************************************************************************************************************
+*/
+
+                                                                /* See 'os.h  Note #1a'.                              */
+#if LIB_VERSION < 13801u
+#error  "lib_def.h, LIB_VERSION SHOULD be >= V1.38.01"
+#endif
+
+
+                                                                /* See 'os.h  Note #1b'.                              */
+#if CPU_CORE_VERSION < 13002u
+#error  "cpu_core.h, CPU_CORE_VERSION SHOULD be >= V1.30.02"
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                 uC/OS-III MODULE END
+************************************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_cfg_app.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_cfg_app.c
new file mode 100644
index 0000000..dda14e5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_cfg_app.c
@@ -0,0 +1,314 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                       OS CONFIGURATION (APPLICATION SPECIFICS)
+*
+* File    : OS_CFG_APP.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+* Note(s) : DO NOT CHANGE THIS FILE!
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include 
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_cfg_app__c = "$Id: $";
+#endif
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+#define  OS_CFG_IDLE_TASK_STK_LIMIT      ((OS_CFG_IDLE_TASK_STK_SIZE  * OS_CFG_TASK_STK_LIMIT_PCT_EMPTY) / 100u)
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+#define  OS_CFG_INT_Q_TASK_STK_LIMIT     ((OS_CFG_INT_Q_TASK_STK_SIZE * OS_CFG_TASK_STK_LIMIT_PCT_EMPTY) / 100u)
+#endif
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+#define  OS_CFG_STAT_TASK_STK_LIMIT      ((OS_CFG_STAT_TASK_STK_SIZE  * OS_CFG_TASK_STK_LIMIT_PCT_EMPTY) / 100u)
+#endif
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+#define  OS_CFG_TICK_TASK_STK_LIMIT      ((OS_CFG_TICK_TASK_STK_SIZE  * OS_CFG_TASK_STK_LIMIT_PCT_EMPTY) / 100u)
+#endif
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+#define  OS_CFG_TMR_TASK_STK_LIMIT       ((OS_CFG_TMR_TASK_STK_SIZE   * OS_CFG_TASK_STK_LIMIT_PCT_EMPTY) / 100u)
+#endif
+
+/*
+************************************************************************************************************************
+*                                                    DATA STORAGE
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+CPU_STK        OSCfg_IdleTaskStk   [OS_CFG_IDLE_TASK_STK_SIZE];
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+OS_INT_Q       OSCfg_IntQ          [OS_CFG_INT_Q_SIZE];
+CPU_STK        OSCfg_IntQTaskStk   [OS_CFG_INT_Q_TASK_STK_SIZE];
+#endif
+
+#if (OS_CFG_ISR_STK_SIZE > 0u)
+CPU_STK        OSCfg_ISRStk        [OS_CFG_ISR_STK_SIZE];
+#endif
+
+#if (OS_MSG_EN == DEF_ENABLED)
+OS_MSG         OSCfg_MsgPool       [OS_CFG_MSG_POOL_SIZE];
+#endif
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+CPU_STK        OSCfg_StatTaskStk   [OS_CFG_STAT_TASK_STK_SIZE];
+#endif
+
+CPU_STK        OSCfg_TickTaskStk   [OS_CFG_TICK_TASK_STK_SIZE];
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+CPU_STK        OSCfg_TmrTaskStk    [OS_CFG_TMR_TASK_STK_SIZE];
+#endif
+
+/*
+************************************************************************************************************************
+*                                                      CONSTANTS
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+CPU_STK      * const  OSCfg_IdleTaskStkBasePtr   = &OSCfg_IdleTaskStk[0];
+CPU_STK_SIZE   const  OSCfg_IdleTaskStkLimit     =  OS_CFG_IDLE_TASK_STK_LIMIT;
+CPU_STK_SIZE   const  OSCfg_IdleTaskStkSize      =  OS_CFG_IDLE_TASK_STK_SIZE;
+CPU_INT32U     const  OSCfg_IdleTaskStkSizeRAM   =  sizeof(OSCfg_IdleTaskStk);
+#else
+CPU_STK      * const  OSCfg_IdleTaskStkBasePtr   = DEF_NULL;
+CPU_STK_SIZE   const  OSCfg_IdleTaskStkLimit     = 0u;
+CPU_STK_SIZE   const  OSCfg_IdleTaskStkSize      = 0u;
+CPU_INT32U     const  OSCfg_IdleTaskStkSizeRAM   = 0u;
+#endif
+
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+OS_INT_Q     * const  OSCfg_IntQBasePtr          = &OSCfg_IntQ[0];
+OS_OBJ_QTY     const  OSCfg_IntQSize             =  OS_CFG_INT_Q_SIZE;
+CPU_INT32U     const  OSCfg_IntQSizeRAM          =  sizeof(OSCfg_IntQ);
+CPU_STK      * const  OSCfg_IntQTaskStkBasePtr   = &OSCfg_IntQTaskStk[0];
+CPU_STK_SIZE   const  OSCfg_IntQTaskStkLimit     =  OS_CFG_INT_Q_TASK_STK_LIMIT;
+CPU_STK_SIZE   const  OSCfg_IntQTaskStkSize      =  OS_CFG_INT_Q_TASK_STK_SIZE;
+CPU_INT32U     const  OSCfg_IntQTaskStkSizeRAM   =  sizeof(OSCfg_IntQTaskStk);
+#else
+OS_INT_Q     * const  OSCfg_IntQBasePtr          = DEF_NULL;
+OS_OBJ_QTY     const  OSCfg_IntQSize             = 0u;
+CPU_INT32U     const  OSCfg_IntQSizeRAM          = 0u;
+CPU_STK      * const  OSCfg_IntQTaskStkBasePtr   = DEF_NULL;
+CPU_STK_SIZE   const  OSCfg_IntQTaskStkLimit     = 0u;
+CPU_STK_SIZE   const  OSCfg_IntQTaskStkSize      = 0u;
+CPU_INT32U     const  OSCfg_IntQTaskStkSizeRAM   = 0u;
+#endif
+
+
+#if (OS_CFG_ISR_STK_SIZE > 0u)
+CPU_STK      * const  OSCfg_ISRStkBasePtr        = &OSCfg_ISRStk[0];
+CPU_STK_SIZE   const  OSCfg_ISRStkSize           =  OS_CFG_ISR_STK_SIZE;
+CPU_INT32U     const  OSCfg_ISRStkSizeRAM        =  sizeof(OSCfg_ISRStk);
+#else
+CPU_STK      * const  OSCfg_ISRStkBasePtr        =  DEF_NULL;
+CPU_STK_SIZE   const  OSCfg_ISRStkSize           =  0u;
+CPU_INT32U     const  OSCfg_ISRStkSizeRAM        =  0u;
+#endif
+
+
+#if (OS_MSG_EN == DEF_ENABLED)
+OS_MSG_SIZE    const  OSCfg_MsgPoolSize          =  OS_CFG_MSG_POOL_SIZE;
+CPU_INT32U     const  OSCfg_MsgPoolSizeRAM       =  sizeof(OSCfg_MsgPool);
+OS_MSG       * const  OSCfg_MsgPoolBasePtr       = &OSCfg_MsgPool[0];
+#else
+OS_MSG_SIZE    const  OSCfg_MsgPoolSize          =  0u;
+CPU_INT32U     const  OSCfg_MsgPoolSizeRAM       =  0u;
+OS_MSG       * const  OSCfg_MsgPoolBasePtr       =  DEF_NULL;
+#endif
+
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+OS_PRIO        const  OSCfg_StatTaskPrio         =  OS_CFG_STAT_TASK_PRIO;
+OS_RATE_HZ     const  OSCfg_StatTaskRate_Hz      =  OS_CFG_STAT_TASK_RATE_HZ;
+CPU_STK      * const  OSCfg_StatTaskStkBasePtr   = &OSCfg_StatTaskStk[0];
+CPU_STK_SIZE   const  OSCfg_StatTaskStkLimit     =  OS_CFG_STAT_TASK_STK_LIMIT;
+CPU_STK_SIZE   const  OSCfg_StatTaskStkSize      =  OS_CFG_STAT_TASK_STK_SIZE;
+CPU_INT32U     const  OSCfg_StatTaskStkSizeRAM   =  sizeof(OSCfg_StatTaskStk);
+#else
+OS_PRIO        const  OSCfg_StatTaskPrio         =  0u;
+OS_RATE_HZ     const  OSCfg_StatTaskRate_Hz      =  0u;
+CPU_STK      * const  OSCfg_StatTaskStkBasePtr   =  DEF_NULL;
+CPU_STK_SIZE   const  OSCfg_StatTaskStkLimit     =  0u;
+CPU_STK_SIZE   const  OSCfg_StatTaskStkSize      =  0u;
+CPU_INT32U     const  OSCfg_StatTaskStkSizeRAM   =  0u;
+#endif
+
+
+CPU_STK_SIZE   const  OSCfg_StkSizeMin           =  OS_CFG_STK_SIZE_MIN;
+
+
+OS_RATE_HZ     const  OSCfg_TickRate_Hz          =  OS_CFG_TICK_RATE_HZ;
+OS_PRIO        const  OSCfg_TickTaskPrio         =  OS_CFG_TICK_TASK_PRIO;
+CPU_STK      * const  OSCfg_TickTaskStkBasePtr   = &OSCfg_TickTaskStk[0];
+CPU_STK_SIZE   const  OSCfg_TickTaskStkLimit     =  OS_CFG_TICK_TASK_STK_LIMIT;
+CPU_STK_SIZE   const  OSCfg_TickTaskStkSize      =  OS_CFG_TICK_TASK_STK_SIZE;
+CPU_INT32U     const  OSCfg_TickTaskStkSizeRAM   =  sizeof(OSCfg_TickTaskStk);
+
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+OS_PRIO        const  OSCfg_TmrTaskPrio          =  OS_CFG_TMR_TASK_PRIO;
+OS_RATE_HZ     const  OSCfg_TmrTaskRate_Hz       =  OS_CFG_TMR_TASK_RATE_HZ;
+CPU_STK      * const  OSCfg_TmrTaskStkBasePtr    = &OSCfg_TmrTaskStk[0];
+CPU_STK_SIZE   const  OSCfg_TmrTaskStkLimit      =  OS_CFG_TMR_TASK_STK_LIMIT;
+CPU_STK_SIZE   const  OSCfg_TmrTaskStkSize       =  OS_CFG_TMR_TASK_STK_SIZE;
+CPU_INT32U     const  OSCfg_TmrTaskStkSizeRAM    =  sizeof(OSCfg_TmrTaskStk);
+#else
+OS_PRIO        const  OSCfg_TmrTaskPrio          =  0u;
+OS_RATE_HZ     const  OSCfg_TmrTaskRate_Hz       =  0u;
+CPU_STK      * const  OSCfg_TmrTaskStkBasePtr    =  DEF_NULL;
+CPU_STK_SIZE   const  OSCfg_TmrTaskStkLimit      =  0u;
+CPU_STK_SIZE   const  OSCfg_TmrTaskStkSize       =  0u;
+CPU_INT32U     const  OSCfg_TmrTaskStkSizeRAM    =  0u;
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                         TOTAL SIZE OF APPLICATION CONFIGURATION
+************************************************************************************************************************
+*/
+
+CPU_INT32U     const  OSCfg_DataSizeRAM          = 0u
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+                                                 + sizeof(OSCfg_IdleTaskStk)
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+                                                 + sizeof(OSCfg_IntQ)
+                                                 + sizeof(OSCfg_IntQTaskStk)
+#endif
+
+#if (OS_MSG_EN == DEF_ENABLED)
+                                                 + sizeof(OSCfg_MsgPool)
+#endif
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+                                                 + sizeof(OSCfg_StatTaskStk)
+#endif
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+                                                 + sizeof(OSCfg_TmrTaskStk)
+#endif
+
+#if (OS_CFG_ISR_STK_SIZE > 0u)
+                                                 + sizeof(OSCfg_ISRStk)
+#endif
+                                                 + sizeof(OSCfg_TickTaskStk);
+
+
+/*
+************************************************************************************************************************
+*                                             OS CONFIGURATION INITIALIZATION
+*
+* Description: This function is used to make sure that debug variables that are unused in the application are not
+*              optimized away.  This function might not be necessary for all compilers.  In this case, you should simply
+*              DELETE the code in this function while still leaving the declaration of the function itself.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : (1) This code doesn't do anything, it simply prevents the compiler from optimizing out the 'const'
+*                  variables which are declared in this file.
+*              (2) You may decide to 'compile out' the code (by using #if 0/#endif) INSIDE the function if your compiler
+*                  DOES NOT optimize out the 'const' variables above.
+************************************************************************************************************************
+*/
+
+void  OSCfg_Init (void)
+{
+    (void)&OSCfg_DataSizeRAM;
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+    (void)&OSCfg_IdleTaskStkBasePtr;
+    (void)&OSCfg_IdleTaskStkLimit;
+    (void)&OSCfg_IdleTaskStkSize;
+    (void)&OSCfg_IdleTaskStkSizeRAM;
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    (void)&OSCfg_IntQBasePtr;
+    (void)&OSCfg_IntQSize;
+    (void)&OSCfg_IntQSizeRAM;
+    (void)&OSCfg_IntQTaskStkBasePtr;
+    (void)&OSCfg_IntQTaskStkLimit;
+    (void)&OSCfg_IntQTaskStkSize;
+    (void)&OSCfg_IntQTaskStkSizeRAM;
+#endif
+
+    (void)&OSCfg_ISRStkBasePtr;
+    (void)&OSCfg_ISRStkSize;
+    (void)&OSCfg_ISRStkSizeRAM;
+
+#if (OS_MSG_EN == DEF_ENABLED)
+    (void)&OSCfg_MsgPoolSize;
+    (void)&OSCfg_MsgPoolSizeRAM;
+    (void)&OSCfg_MsgPoolBasePtr;
+#endif
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+    (void)&OSCfg_StatTaskPrio;
+    (void)&OSCfg_StatTaskRate_Hz;
+    (void)&OSCfg_StatTaskStkBasePtr;
+    (void)&OSCfg_StatTaskStkLimit;
+    (void)&OSCfg_StatTaskStkSize;
+    (void)&OSCfg_StatTaskStkSizeRAM;
+#endif
+
+    (void)&OSCfg_StkSizeMin;
+
+    (void)&OSCfg_TickRate_Hz;
+    (void)&OSCfg_TickTaskPrio;
+    (void)&OSCfg_TickTaskStkBasePtr;
+    (void)&OSCfg_TickTaskStkLimit;
+    (void)&OSCfg_TickTaskStkSize;
+    (void)&OSCfg_TickTaskStkSizeRAM;
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+    (void)&OSCfg_TmrTaskPrio;
+    (void)&OSCfg_TmrTaskRate_Hz;
+    (void)&OSCfg_TmrTaskStkBasePtr;
+    (void)&OSCfg_TmrTaskStkLimit;
+    (void)&OSCfg_TmrTaskStkSize;
+    (void)&OSCfg_TmrTaskStkSizeRAM;
+#endif
+}
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_core.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_core.c
new file mode 100644
index 0000000..fa2faa9
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_core.c
@@ -0,0 +1,2838 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                    CORE FUNCTIONS
+*
+* File    : OS_CORE.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_core__c = "$Id: $";
+#endif
+
+/*
+************************************************************************************************************************
+*                                                    INITIALIZATION
+*
+* Description: This function is used to initialize the internals of uC/OS-III and MUST be called prior to
+*              creating any uC/OS-III object and, prior to calling OSStart().
+*
+* Arguments  : p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE    Initialization was successful
+*                                Other          Other OS_ERR_xxx depending on the sub-functions called by OSInit().
+* Returns    : none
+************************************************************************************************************************
+*/
+
+void  OSInit (OS_ERR  *p_err)
+{
+#if (OS_CFG_ISR_STK_SIZE > 0u)
+    CPU_STK      *p_stk;
+    CPU_STK_SIZE  size;
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+    OSInitHook();                                               /* Call port specific initialization code               */
+
+    OSIntNestingCtr       = 0u;                                 /* Clear the interrupt nesting counter                  */
+
+    OSRunning             = OS_STATE_OS_STOPPED;                /* Indicate that multitasking not started               */
+
+    OSSchedLockNestingCtr = 0u;                                 /* Clear the scheduling lock counter                    */
+
+    OSTCBCurPtr           = DEF_NULL;                           /* Initialize OS_TCB pointers to a known state          */
+    OSTCBHighRdyPtr       = DEF_NULL;
+
+    OSPrioCur             = 0u;                                 /* Initialize priority variables to a known state       */
+    OSPrioHighRdy         = 0u;
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    OSPrioSaved           = 0u;
+#endif
+
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+    OSSchedLockTimeBegin  = 0u;
+    OSSchedLockTimeMax    = 0u;
+    OSSchedLockTimeMaxCur = 0u;
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    OSSafetyCriticalStartFlag       =  DEF_FALSE;
+#endif
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+    OSSchedRoundRobinEn             = DEF_FALSE;
+    OSSchedRoundRobinDfltTimeQuanta = OSCfg_TickRate_Hz / 10u;
+#endif
+
+#if (OS_CFG_ISR_STK_SIZE > 0u)
+    p_stk = OSCfg_ISRStkBasePtr;                                /* Clear exception stack for stack checking.            */
+    if (p_stk != DEF_NULL) {
+        size  = OSCfg_ISRStkSize;
+        while (size > 0u) {
+            size--;
+           *p_stk = 0u;
+            p_stk++;
+        }
+    }
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)                 /* Initialize Redzoned ISR stack                        */
+    OS_TaskStkRedzoneInit(OSCfg_ISRStkBasePtr, OSCfg_ISRStkSize);
+#endif
+#endif
+
+#if (OS_CFG_APP_HOOKS_EN == DEF_ENABLED)                        /* Clear application hook pointers                      */
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    OS_AppRedzoneHitHookPtr = DEF_NULL;
+#endif
+    OS_AppTaskCreateHookPtr = DEF_NULL;
+    OS_AppTaskDelHookPtr    = DEF_NULL;
+    OS_AppTaskReturnHookPtr = DEF_NULL;
+
+    OS_AppIdleTaskHookPtr   = DEF_NULL;
+    OS_AppStatTaskHookPtr   = DEF_NULL;
+    OS_AppTaskSwHookPtr     = DEF_NULL;
+    OS_AppTimeTickHookPtr   = DEF_NULL;
+#endif
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+    OSTaskRegNextAvailID    = 0u;
+#endif
+
+    OS_PrioInit();                                              /* Initialize the priority bitmap table                 */
+
+    OS_RdyListInit();                                           /* Initialize the Ready List                            */
+
+
+#if (OS_CFG_FLAG_EN == DEF_ENABLED)                             /* Initialize the Event Flag module                     */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSFlagDbgListPtr = DEF_NULL;
+    OSFlagQty        = 0u;
+#endif
+#endif
+
+#if (OS_CFG_MEM_EN == DEF_ENABLED)                              /* Initialize the Memory Manager module                 */
+    OS_MemInit(p_err);
+    if (*p_err != OS_ERR_NONE) {
+        return;
+    }
+#endif
+
+
+#if (OS_MSG_EN == DEF_ENABLED)                                  /* Initialize the free list of OS_MSGs                  */
+    OS_MsgPoolInit(p_err);
+    if (*p_err != OS_ERR_NONE) {
+        return;
+    }
+#endif
+
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)                            /* Initialize the Mutex Manager module                  */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSMutexDbgListPtr = DEF_NULL;
+    OSMutexQty        = 0u;
+#endif
+#endif
+
+
+#if (OS_CFG_Q_EN == DEF_ENABLED)                                /* Initialize the Message Queue Manager module          */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSQDbgListPtr = DEF_NULL;
+    OSQQty        = 0u;
+#endif
+#endif
+
+
+#if (OS_CFG_SEM_EN == DEF_ENABLED)                              /* Initialize the Semaphore Manager module              */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSSemDbgListPtr = DEF_NULL;
+    OSSemQty        = 0u;
+#endif
+#endif
+
+
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+    OS_TLS_Init(p_err);                                         /* Initialize Task Local Storage, before creating tasks */
+    if (*p_err != OS_ERR_NONE) {
+        return;
+    }
+#endif
+
+
+    OS_TaskInit(p_err);                                         /* Initialize the task manager                          */
+    if (*p_err != OS_ERR_NONE) {
+        return;
+    }
+
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    OS_IntQTaskInit(p_err);                                     /* Initialize the Interrupt Queue Handler Task          */
+    if (*p_err != OS_ERR_NONE) {
+        return;
+    }
+#endif
+
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+    OS_IdleTaskInit(p_err);                                     /* Initialize the Idle Task                             */
+    if (*p_err != OS_ERR_NONE) {
+        return;
+    }
+#endif
+
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    OS_TickTaskInit(p_err);                                     /* Initialize the Tick Task                             */
+    if (*p_err != OS_ERR_NONE) {
+        return;
+    }
+#endif
+
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)                        /* Initialize the Statistic Task                        */
+    OS_StatTaskInit(p_err);
+    if (*p_err != OS_ERR_NONE) {
+        return;
+    }
+#endif
+
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)                              /* Initialize the Timer Manager module                  */
+    OS_TmrInit(p_err);
+    if (*p_err != OS_ERR_NONE) {
+        return;
+    }
+#endif
+
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_Dbg_Init();
+#endif
+
+
+    OSCfg_Init();
+
+    OSInitialized = DEF_TRUE;                                   /* Kernel is initialized                                */
+}
+
+
+/*
+************************************************************************************************************************
+*                                                      ENTER ISR
+*
+* Description: This function is used to notify uC/OS-III that you are about to service an interrupt service routine
+*              (ISR).  This allows uC/OS-III to keep track of interrupt nesting and thus only perform rescheduling at
+*              the last nested ISR.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function MUST be called with interrupts already disabled
+*
+*              2) Your ISR can directly increment 'OSIntNestingCtr' without calling this function because OSIntNestingCtr has
+*                 been declared 'global', the port is actually considered part of the OS and thus is allowed to access
+*                 uC/OS-III variables.
+*
+*              3) You MUST still call OSIntExit() even though you increment 'OSIntNestingCtr' directly.
+*
+*              4) You MUST invoke OSIntEnter() and OSIntExit() in pair.  In other words, for every call to OSIntEnter()
+*                 (or direct increment to OSIntNestingCtr) at the beginning of the ISR you MUST have a call to OSIntExit()
+*                 at the end of the ISR.
+*
+*              5) You are allowed to nest interrupts up to 250 levels deep.
+************************************************************************************************************************
+*/
+
+void  OSIntEnter (void)
+{
+    if (OSRunning != OS_STATE_OS_RUNNING) {                     /* Is OS running?                                       */
+        return;                                                 /* No                                                   */
+    }
+
+    if (OSIntNestingCtr >= 250u) {                              /* Have we nested past 250 levels?                      */
+        return;                                                 /* Yes                                                  */
+    }
+
+    OSIntNestingCtr++;                                          /* Increment ISR nesting level                          */
+}
+
+
+/*
+************************************************************************************************************************
+*                                                       EXIT ISR
+*
+* Description: This function is used to notify uC/OS-III that you have completed servicing an ISR.  When the last nested
+*              ISR has completed, uC/OS-III will call the scheduler to determine whether a new, high-priority task, is
+*              ready to run.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : 1) You MUST invoke OSIntEnter() and OSIntExit() in pair.  In other words, for every call to OSIntEnter()
+*                 (or direct increment to OSIntNestingCtr) at the beginning of the ISR you MUST have a call to OSIntExit()
+*                 at the end of the ISR.
+*
+*              2) Rescheduling is prevented when the scheduler is locked (see OSSchedLock())
+************************************************************************************************************************
+*/
+
+void  OSIntExit (void)
+{
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    CPU_BOOLEAN  stk_status;
+#endif
+    CPU_SR_ALLOC();
+
+
+
+    if (OSRunning != OS_STATE_OS_RUNNING) {                     /* Has the OS started?                                  */
+        return;                                                 /* No                                                   */
+    }
+
+    CPU_INT_DIS();
+    if (OSIntNestingCtr == 0u) {                                /* Prevent OSIntNestingCtr from wrapping                */
+        CPU_INT_EN();
+        return;
+    }
+    OSIntNestingCtr--;
+    if (OSIntNestingCtr > 0u) {                                 /* ISRs still nested?                                   */
+        CPU_INT_EN();                                           /* Yes                                                  */
+        return;
+    }
+
+    if (OSSchedLockNestingCtr > 0u) {                           /* Scheduler still locked?                              */
+        CPU_INT_EN();                                           /* Yes                                                  */
+        return;
+    }
+
+                                                                /* Verify ISR Stack                                     */
+#if (OS_CFG_ISR_STK_SIZE > 0u)
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    stk_status = OS_TaskStkRedzoneChk(OSCfg_ISRStkBasePtr, OSCfg_ISRStkSize);
+    if (stk_status != DEF_OK) {
+        OSRedzoneHitHook(DEF_NULL);
+    }
+#endif
+#endif
+
+    OSPrioHighRdy   = OS_PrioGetHighest();                      /* Find highest priority                                */
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+    OSTCBHighRdyPtr = OSRdyList[OSPrioHighRdy].HeadPtr;         /* Get highest priority task ready-to-run               */
+    if (OSTCBHighRdyPtr == OSTCBCurPtr) {                       /* Current task still the highest priority?             */
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+        stk_status = OSTaskStkRedzoneChk(DEF_NULL);
+        if (stk_status != DEF_OK) {
+            OSRedzoneHitHook(OSTCBCurPtr);
+        }
+#endif
+        CPU_INT_EN();                                           /* Yes                                                  */
+        return;
+    }
+#else
+    if (OSPrioHighRdy != (OS_CFG_PRIO_MAX - 1u)) {              /* Are we returning to idle?                              */
+        OSTCBHighRdyPtr = OSRdyList[OSPrioHighRdy].HeadPtr;     /* No ... get highest priority task ready-to-run          */
+        if (OSTCBHighRdyPtr == OSTCBCurPtr) {                   /* Current task still the highest priority?               */
+            CPU_INT_EN();                                       /* Yes                                                    */
+            return;
+        }
+    }
+#endif
+
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+    OSTCBHighRdyPtr->CtxSwCtr++;                                /* Inc. # of context switches for this new task         */
+#endif
+#if ((OS_CFG_TASK_PROFILE_EN == DEF_ENABLED) || (OS_CFG_DBG_EN == DEF_ENABLED))
+    OSTaskCtxSwCtr++;                                           /* Keep track of the total number of ctx switches       */
+#endif
+
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+    OS_TLS_TaskSw();
+#endif
+
+    OSIntCtxSw();                                               /* Perform interrupt level ctx switch                   */
+
+    CPU_INT_EN();
+}
+
+
+/*
+************************************************************************************************************************
+*                                    INDICATE THAT IT'S NO LONGER SAFE TO CREATE OBJECTS
+*
+* Description: This function is called by the application code to indicate that all initialization has been completed
+*              and that kernel objects are no longer allowed to be created.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+void  OSSafetyCriticalStart (void)
+{
+    OSSafetyCriticalStartFlag = DEF_TRUE;
+}
+
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                      SCHEDULER
+*
+* Description: This function is called by other uC/OS-III services to determine whether a new, high priority task has
+*              been made ready to run.  This function is invoked by TASK level code and is not used to reschedule tasks
+*              from ISRs (see OSIntExit() for ISR rescheduling).
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : 1) Rescheduling is prevented when the scheduler is locked (see OSSchedLock())
+************************************************************************************************************************
+*/
+
+void  OSSched (void)
+{
+    CPU_SR_ALLOC();
+
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Can't schedule when the kernel is stopped.           */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+        return;
+    }
+#endif
+
+    if (OSIntNestingCtr > 0u) {                                 /* ISRs still nested?                                   */
+        return;                                                 /* Yes ... only schedule when no nested ISRs            */
+    }
+
+    if (OSSchedLockNestingCtr > 0u) {                           /* Scheduler locked?                                    */
+        return;                                                 /* Yes                                                  */
+    }
+
+    CPU_INT_DIS();
+    OSPrioHighRdy   = OS_PrioGetHighest();                      /* Find the highest priority ready                      */
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+    OSTCBHighRdyPtr = OSRdyList[OSPrioHighRdy].HeadPtr;         /* Get highest priority task ready-to-run               */
+    if (OSTCBHighRdyPtr == OSTCBCurPtr) {                       /* Current task still the highest priority?             */
+        CPU_INT_EN();                                           /* Yes                                                  */
+        return;
+    }
+#else
+    if (OSPrioHighRdy != (OS_CFG_PRIO_MAX - 1u)) {              /* Are we returning to idle?                              */
+        OSTCBHighRdyPtr = OSRdyList[OSPrioHighRdy].HeadPtr;     /* No ... get highest priority task ready-to-run          */
+        if (OSTCBHighRdyPtr == OSTCBCurPtr) {                   /* Current task still the highest priority?               */
+            CPU_INT_EN();                                       /* Yes                                                    */
+            return;
+        }
+    }
+#endif
+
+
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+    OSTCBHighRdyPtr->CtxSwCtr++;                                /* Inc. # of context switches to this task              */
+#endif
+
+#if ((OS_CFG_TASK_PROFILE_EN == DEF_ENABLED) || (OS_CFG_DBG_EN == DEF_ENABLED))
+    OSTaskCtxSwCtr++;                                           /* Increment context switch counter                     */
+#endif
+
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+    OS_TLS_TaskSw();
+#endif
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+    OS_TASK_SW();                                               /* Perform a task level context switch                  */
+    CPU_INT_EN();
+#else
+    if ((OSPrioHighRdy != (OS_CFG_PRIO_MAX - 1u))) {
+        OS_TASK_SW();                                           /* Perform a task level context switch                  */
+        CPU_INT_EN();
+    } else {
+        OSTCBHighRdyPtr = OSTCBCurPtr;
+        CPU_INT_EN();
+        while (DEF_ON) {
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_EN == DEF_ENABLED))
+            CPU_CRITICAL_ENTER();
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+            OSIdleTaskCtr++;
+#endif
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+            OSStatTaskCtr++;
+#endif
+            CPU_CRITICAL_EXIT();
+#endif
+
+#if (OS_CFG_APP_HOOKS_EN == DEF_ENABLED)
+            OSIdleTaskHook();                                   /* Call user definable HOOK                             */
+#endif
+            if ((*((volatile OS_PRIO *)&OSPrioHighRdy) != (OS_CFG_PRIO_MAX - 1u))) {
+                break;
+            }
+        }
+    }
+#endif
+
+#ifdef OS_TASK_SW_SYNC
+    OS_TASK_SW_SYNC();
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                                 PREVENT SCHEDULING
+*
+* Description: This function is used to prevent rescheduling from taking place.  This allows your application to prevent
+*              context switches until you are ready to permit context switching.
+*
+* Arguments  : p_err     is a pointer to a variable that will receive an error code:
+*
+*                            OS_ERR_NONE                 The scheduler is locked
+*                            OS_ERR_LOCK_NESTING_OVF     If you attempted to nest call to this function > 250 levels
+*                            OS_ERR_OS_NOT_RUNNING       If uC/OS-III is not running yet
+*                            OS_ERR_SCHED_LOCK_ISR       If you called this function from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : 1) You MUST invoke OSSchedLock() and OSSchedUnlock() in pair.  In other words, for every
+*                 call to OSSchedLock() you MUST have a call to OSSchedUnlock().
+************************************************************************************************************************
+*/
+
+void  OSSchedLock (OS_ERR  *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+       *p_err = OS_ERR_SCHED_LOCK_ISR;
+        return;
+    }
+#endif
+
+    if (OSRunning != OS_STATE_OS_RUNNING) {                     /* Make sure multitasking is running                    */
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+
+    if (OSSchedLockNestingCtr >= 250u) {                        /* Prevent OSSchedLockNestingCtr overflowing            */
+       *p_err = OS_ERR_LOCK_NESTING_OVF;
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();
+    OSSchedLockNestingCtr++;                                    /* Increment lock nesting level                         */
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+    OS_SchedLockTimeMeasStart();
+#endif
+    CPU_CRITICAL_EXIT();
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                                  ENABLE SCHEDULING
+*
+* Description: This function is used to re-allow rescheduling.
+*
+* Arguments  : p_err     is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_NONE                 The scheduler has been enabled
+*                            OS_ERR_OS_NOT_RUNNING       If uC/OS-III is not running yet
+*                            OS_ERR_SCHED_LOCKED         The scheduler is still locked, still nested
+*                            OS_ERR_SCHED_NOT_LOCKED     The scheduler was not locked
+*                            OS_ERR_SCHED_UNLOCK_ISR     If you called this function from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : 1) You MUST invoke OSSchedLock() and OSSchedUnlock() in pair.  In other words, for every call to
+*                 OSSchedLock() you MUST have a call to OSSchedUnlock().
+************************************************************************************************************************
+*/
+
+void  OSSchedUnlock (OS_ERR  *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+       *p_err = OS_ERR_SCHED_UNLOCK_ISR;
+        return;
+    }
+#endif
+
+    if (OSRunning != OS_STATE_OS_RUNNING) {                     /* Make sure multitasking is running                    */
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+
+    if (OSSchedLockNestingCtr == 0u) {                          /* See if the scheduler is locked                       */
+       *p_err = OS_ERR_SCHED_NOT_LOCKED;
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();
+    OSSchedLockNestingCtr--;                                    /* Decrement lock nesting level                         */
+    if (OSSchedLockNestingCtr > 0u) {
+        CPU_CRITICAL_EXIT();                                    /* Scheduler is still locked                            */
+       *p_err = OS_ERR_SCHED_LOCKED;
+        return;
+    }
+
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+    OS_SchedLockTimeMeasStop();
+#endif
+
+    CPU_CRITICAL_EXIT();                                        /* Scheduler should be re-enabled                       */
+    OSSched();                                                  /* Run the scheduler                                    */
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                      CONFIGURE ROUND-ROBIN SCHEDULING PARAMETERS
+*
+* Description: This function is called to change the round-robin scheduling parameters.
+*
+* Arguments  : en                determines whether round-robin will be enabled (when DEF_EN) or not (when DEF_DIS)
+*
+*              dflt_time_quanta  default number of ticks between time slices.  0 means assumes OSCfg_TickRate_Hz / 10.
+*
+*              p_err             is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                    OS_ERR_NONE    The call was successful
+*
+* Returns    : none
+*
+* Note(s)    :
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+void  OSSchedRoundRobinCfg (CPU_BOOLEAN   en,
+                            OS_TICK       dflt_time_quanta,
+                            OS_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (en != DEF_ENABLED) {
+        OSSchedRoundRobinEn = DEF_FALSE;
+    } else {
+        OSSchedRoundRobinEn = DEF_TRUE;
+    }
+
+    if (dflt_time_quanta > 0u) {
+        OSSchedRoundRobinDfltTimeQuanta = dflt_time_quanta;
+    } else {
+        OSSchedRoundRobinDfltTimeQuanta = (OS_TICK)(OSCfg_TickRate_Hz / 10u);
+    }
+    CPU_CRITICAL_EXIT();
+   *p_err = OS_ERR_NONE;
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                    YIELD CPU WHEN TASK NO LONGER NEEDS THE TIME SLICE
+*
+* Description: This function is called to give up the CPU when it is done executing before its time slice expires.
+*
+* Argument(s): p_err      is a pointer to a variable that will contain an error code returned by this function.
+*
+*                             OS_ERR_NONE                   The call was successful
+*                             OS_ERR_ROUND_ROBIN_1          Only 1 task at this priority, nothing to yield to
+*                             OS_ERR_ROUND_ROBIN_DISABLED   Round Robin is not enabled
+*                             OS_ERR_SCHED_LOCKED           The scheduler has been locked
+*                             OS_ERR_YIELD_ISR              Can't be called from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function MUST be called from a task.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+void  OSSchedRoundRobinYield (OS_ERR  *p_err)
+{
+    OS_RDY_LIST  *p_rdy_list;
+    OS_TCB       *p_tcb;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Can't call this function from an ISR                 */
+       *p_err = OS_ERR_YIELD_ISR;
+        return;
+    }
+#endif
+
+    if (OSSchedLockNestingCtr > 0u) {                           /* Can't yield if the scheduler is locked               */
+       *p_err = OS_ERR_SCHED_LOCKED;
+        return;
+    }
+
+    if (OSSchedRoundRobinEn != DEF_TRUE) {                      /* Make sure round-robin has been enabled               */
+       *p_err = OS_ERR_ROUND_ROBIN_DISABLED;
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();
+    p_rdy_list = &OSRdyList[OSPrioCur];                         /* Can't yield if it's the only task at that priority   */
+    if (p_rdy_list->HeadPtr == p_rdy_list->TailPtr) {
+        CPU_CRITICAL_EXIT();
+       *p_err = OS_ERR_ROUND_ROBIN_1;
+        return;
+    }
+
+    OS_RdyListMoveHeadToTail(p_rdy_list);                       /* Move current OS_TCB to the end of the list           */
+    p_tcb = p_rdy_list->HeadPtr;                                /* Point to new OS_TCB at head of the list              */
+    if (p_tcb->TimeQuanta == 0u) {                              /* See if we need to use the default time slice         */
+        p_tcb->TimeQuantaCtr = OSSchedRoundRobinDfltTimeQuanta;
+    } else {
+        p_tcb->TimeQuantaCtr = p_tcb->TimeQuanta;               /* Load time slice counter with new time                */
+    }
+
+    CPU_CRITICAL_EXIT();
+
+    OSSched();                                                  /* Run new task                                         */
+   *p_err = OS_ERR_NONE;
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                 START MULTITASKING
+*
+* Description: This function is used to start the multitasking process which lets uC/OS-III manages the task that you
+*              created.  Before you can call OSStart(), you MUST have called OSInit() and you MUST have created at least
+*              one application task.
+*
+* Argument(s): p_err      is a pointer to a variable that will contain an error code returned by this function.
+*
+*                             OS_ERR_FATAL_RETURN    OS was running and OSStart() returned
+*                             OS_ERR_OS_NOT_INIT     OS is not initialized, OSStart() has no effect
+*                             OS_ERR_OS_NO_APP_TASK  No application task created, OSStart() has no effect
+*                             OS_ERR_OS_RUNNING      OS is already running, OSStart() has no effect
+*
+* Returns    : none
+*
+* Note(s)    : 1) OSStartHighRdy() MUST:
+*                 a) Call OSTaskSwHook() then,
+*                 b) Load the context of the task pointed to by OSTCBHighRdyPtr.
+*                 c) Execute the task.
+*
+*              2) OSStart() is not supposed to return.  If it does, that would be considered a fatal error.
+************************************************************************************************************************
+*/
+
+void  OSStart (OS_ERR  *p_err)
+{
+    OS_OBJ_QTY  kernel_task_cnt;
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+    if (OSInitialized != DEF_TRUE) {
+       *p_err = OS_ERR_OS_NOT_INIT;
+        return;
+    }
+
+    kernel_task_cnt = 0u;                                       /* Calculate the number of kernel tasks                 */
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+    kernel_task_cnt++;
+#endif
+#if (OS_CFG_TASK_TICK_EN  == DEF_ENABLED)
+    kernel_task_cnt++;
+#endif
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+    kernel_task_cnt++;
+#endif
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+    kernel_task_cnt++;
+#endif
+
+    if (OSTaskQty <= kernel_task_cnt) {                         /* No application task created                          */
+        *p_err = OS_ERR_OS_NO_APP_TASK;
+         return;
+    }
+
+    if (OSRunning == OS_STATE_OS_STOPPED) {
+        OSPrioHighRdy             = OS_PrioGetHighest();        /* Find the highest priority                            */
+        OSPrioCur                 = OSPrioHighRdy;
+        OSTCBHighRdyPtr           = OSRdyList[OSPrioHighRdy].HeadPtr;
+        OSTCBCurPtr               = OSTCBHighRdyPtr;
+        OSRunning                 = OS_STATE_OS_RUNNING;
+        OSStartHighRdy();                                       /* Execute target specific code to start task           */
+       *p_err                     = OS_ERR_FATAL_RETURN;        /* OSStart() is not supposed to return                  */
+    } else {
+       *p_err                     = OS_ERR_OS_RUNNING;          /* OS is already running                                */
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                                    GET VERSION
+*
+* Description: This function is used to return the version number of uC/OS-III.  The returned value corresponds to
+*              uC/OS-III's version number multiplied by 10000.  In other words, version 3.01.02 would be returned as 30102.
+*
+* Arguments  : p_err   is a pointer to a variable that will receive an error code.  However, OSVersion() set this
+*                      variable to
+*
+*                         OS_ERR_NONE
+*
+* Returns    : The version number of uC/OS-III multiplied by 10000.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+CPU_INT16U  OSVersion (OS_ERR  *p_err)
+{
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+   *p_err = OS_ERR_NONE;
+    return (OS_VERSION);
+}
+
+
+/*
+************************************************************************************************************************
+*                                                      IDLE TASK
+*
+* Description: This task is internal to uC/OS-III and executes whenever no other higher priority tasks executes because
+*              they are ALL waiting for event(s) to occur.
+*
+* Arguments  : p_arg    is an argument passed to the task when the task is created.
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+*
+*              2) OSIdleTaskHook() is called after the critical section to ensure that interrupts will be enabled for at
+*                 least a few instructions.  On some processors (ex. Philips XA), enabling and then disabling interrupts
+*                 doesn't allow the processor enough time to have interrupts enabled before they were disabled again.
+*                 uC/OS-III would thus never recognize interrupts.
+*
+*              3) This hook has been added to allow you to do such things as STOP the CPU to conserve power.
+************************************************************************************************************************
+*/
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+void  OS_IdleTask (void  *p_arg)
+{
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_EN == DEF_ENABLED))
+    CPU_SR_ALLOC();
+#endif
+
+
+    (void)p_arg;                                                /* Prevent compiler warning for not using 'p_arg'       */
+
+    while (DEF_ON) {
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_EN == DEF_ENABLED))
+        CPU_CRITICAL_ENTER();
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        OSIdleTaskCtr++;
+#endif
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+        OSStatTaskCtr++;
+#endif
+        CPU_CRITICAL_EXIT();
+#endif
+
+#if (OS_CFG_APP_HOOKS_EN == DEF_ENABLED)
+        OSIdleTaskHook();                                       /* Call user definable HOOK                             */
+#endif
+    }
+}
+#endif
+
+/*
+************************************************************************************************************************
+*                                               INITIALIZE THE IDLE TASK
+*
+* Description: This function initializes the idle task
+*
+* Arguments  : p_err    is a pointer to a variable that will contain an error code returned by this function.
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+void  OS_IdleTaskInit (OS_ERR  *p_err)
+{
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSIdleTaskCtr = 0u;
+#endif
+                                                                /* --------------- CREATE THE IDLE TASK --------------- */
+    OSTaskCreate(&OSIdleTaskTCB,
+                 (CPU_CHAR   *)((void *)"uC/OS-III Idle Task"),
+                  OS_IdleTask,
+                  DEF_NULL,
+                 (OS_CFG_PRIO_MAX - 1u),
+                  OSCfg_IdleTaskStkBasePtr,
+                  OSCfg_IdleTaskStkLimit,
+                  OSCfg_IdleTaskStkSize,
+                  0u,
+                  0u,
+                  DEF_NULL,
+                 (OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR | OS_OPT_TASK_NO_TLS),
+                  p_err);
+}
+#endif
+
+/*
+************************************************************************************************************************
+*                                             BLOCK A TASK PENDING ON EVENT
+*
+* Description: This function is called to place a task in the blocked state waiting for an event to occur. This function
+*              exist because it is common to a number of OSxxxPend() services.
+*
+* Arguments  : p_pend_data    is a pointer to an object used to link the task being blocked to the list of task(s)
+*              -----------    pending on the desired object.
+
+*              p_obj          is a pointer to the object to pend on.  If there are no object used to pend on then
+*              -----          the caller must pass a NULL pointer.
+*
+*              pending_on     Specifies what the task will be pending on:
+*
+*                                 OS_TASK_PEND_ON_FLAG
+*                                 OS_TASK_PEND_ON_TASK_Q     <- No object (pending for a message sent to the task)
+*                                 OS_TASK_PEND_ON_MUTEX
+*                                 OS_TASK_PEND_ON_Q
+*                                 OS_TASK_PEND_ON_SEM
+*                                 OS_TASK_PEND_ON_TASK_SEM   <- No object (pending on a signal sent to the task)
+*
+*              timeout        Is the amount of time the task will wait for the event to occur.
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_Pend (OS_PEND_DATA  *p_pend_data,
+               OS_PEND_OBJ   *p_obj,
+               OS_STATE       pending_on,
+               OS_TICK        timeout)
+{
+    OS_PEND_LIST  *p_pend_list;
+
+
+
+    OSTCBCurPtr->PendOn     = pending_on;                       /* Resource not available, wait until it is             */
+    OSTCBCurPtr->PendStatus = OS_STATUS_PEND_OK;
+
+    OS_TaskBlock(OSTCBCurPtr,                                   /* Block the task and add it to the tick list if needed */
+                 timeout);
+
+    if (p_obj != DEF_NULL) {                                    /* Add the current task to the pend list ...            */
+        p_pend_list             = &p_obj->PendList;             /* ... if there is an object to pend on                 */
+        p_pend_data->PendObjPtr = p_obj;                        /* Save the pointer to the object pending on            */
+        OS_PendDataInit(OSTCBCurPtr,                            /* Initialize the remaining field                       */
+                        p_pend_data,
+                        1u);
+        OS_PendListInsertPrio(p_pend_list,                      /* Insert in the pend list in priority order            */
+                              p_pend_data);
+    } else {
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+        OSTCBCurPtr->PendDataTblEntries = 0u;                   /* If no object being pended on the clear these fields  */
+#endif
+        OSTCBCurPtr->PendDataTblPtr     = DEF_NULL;             /* ... in the TCB                                       */
+    }
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_PendDbgNameAdd(p_obj,
+                      OSTCBCurPtr);
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                                     ABORT PENDING
+*
+* Description: This function is called by OSxxxPendAbort() functions to abort pending on an event.
+*
+* Arguments  : p_obj          Is a pointer to the object to pend abort.
+*              -----
+*
+*              p_tcb          Is a pointer to the OS_TCB of the task that we'll abort the pend for
+*              -----
+*
+*              ts             The is a timestamp as to when the pend abort occurred
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_PendAbort (OS_PEND_OBJ  *p_obj,
+                    OS_TCB       *p_tcb,
+                    CPU_TS        ts)
+{
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    switch (p_tcb->TaskState) {
+        case OS_TASK_STATE_PEND:
+        case OS_TASK_STATE_PEND_TIMEOUT:
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+             if (p_tcb->PendOn == OS_TASK_PEND_ON_MULTI) {
+                 OS_PendAbort1(p_obj,                           /* Indicate which object was pend aborted               */
+                               p_tcb,
+                               ts);
+             }
+#endif
+#if (OS_MSG_EN == DEF_ENABLED)
+             p_tcb->MsgPtr     = DEF_NULL;
+             p_tcb->MsgSize    = 0u;
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             p_tcb->TS         = ts;
+#endif
+             if (p_obj != DEF_NULL) {
+                 OS_PendListRemove(p_tcb);                      /* Remove task from all pend lists                      */
+             }
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             if (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT) {
+                 OS_TickListRemove(p_tcb);                      /* Remove from tick list                                */
+             }
+#endif
+             OS_RdyListInsert(p_tcb);                           /* Insert the task in the ready list                    */
+             p_tcb->TaskState  = OS_TASK_STATE_RDY;             /* Task will be ready                                   */
+             p_tcb->PendStatus = OS_STATUS_PEND_ABORT;          /* Indicate pend was aborted                            */
+             p_tcb->PendOn     = OS_TASK_PEND_ON_NOTHING;       /* Indicate no longer pending                           */
+             break;
+
+        case OS_TASK_STATE_PEND_SUSPENDED:
+        case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+             if (p_tcb->PendOn == OS_TASK_PEND_ON_MULTI) {
+                 OS_PendAbort1(p_obj,                           /* Indicate which object was pend aborted               */
+                               p_tcb,
+                               ts);
+             }
+#endif
+#if (OS_MSG_EN == DEF_ENABLED)
+             p_tcb->MsgPtr     = DEF_NULL;
+             p_tcb->MsgSize    = 0u;
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             p_tcb->TS         = ts;
+#endif
+             if (p_obj != DEF_NULL) {
+                 OS_PendListRemove(p_tcb);                      /* Remove task from all pend lists                      */
+             }
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             if (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED) {
+                 OS_TickListRemove(p_tcb);                      /* Cancel the timeout                                   */
+             }
+#endif
+             p_tcb->TaskState  = OS_TASK_STATE_SUSPENDED;       /* Pend Aborted task is still suspended                 */
+             p_tcb->PendStatus = OS_STATUS_PEND_ABORT;          /* Indicate pend was aborted                            */
+             p_tcb->PendOn     = OS_TASK_PEND_ON_NOTHING;       /* Indicate no longer pending                           */
+             break;
+
+        case OS_TASK_STATE_RDY:                                 /* Cannot Pend Abort a task that is ready               */
+        case OS_TASK_STATE_DLY:                                 /* Cannot Pend Abort a task that is delayed             */
+        case OS_TASK_STATE_SUSPENDED:                           /* Cannot Pend Abort a suspended task                   */
+        case OS_TASK_STATE_DLY_SUSPENDED:                       /* Cannot Pend Abort a suspended task also dly'd        */
+        default:
+             break;
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                           PEND ABORT A TASK PENDING ON MULTIPLE OBJECTS
+*
+* Description: This function is called when a task is pending on multiple objects and one of the objects has been pend
+*              aborted.  This function needs to indicate to the caller which object was pend aborted by placing the
+*              address of the object in the OS_PEND_DATA table corresponding to the pend aborted object.
+*
+*              For example, if the task pends on six (6) objects, the address of those 6 objects are placed in the
+*              .PendObjPtr field of the OS_PEND_DATA table as shown below.  Note that the .PendDataTblEntries of the
+*              OS_TCB would be set to six (6) in this case.  As shown, when the pend call returns because a task pend
+*              aborted 'Obj C' then, only the one entry contains the .RdyObjPtr filled in data and the other entries
+*              contains NULL pointers and zero data.
+*
+*              You should note that the NULL pointers are zero data values are actually filled in by the pend call.
+*
+*
+*                                           .PendObjPtr    .RdyObjPtr     .RdyMsgPtr     .RdyMsgSize    .RdyTS
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*              p_tcb->PendDataTblPtr  ->  |  Obj A       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj B       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj C       |  Obj C       | 0            | 0            | TS           |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj D       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj E       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj F       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*
+*
+* Arguments  : p_obj        is a pointer to the object being pend aborted to
+*              -----
+*
+*              p_tcb        is a pointer to the OS_TCB of the task that we'll abort he pend for
+*              -----
+*
+*              ts           is the time stamp of when the pend abort occurred
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+*
+*              2) This function is DEPRECATED, see OSPendMulti() note 1 for details.
+************************************************************************************************************************
+*/
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+void  OS_PendAbort1 (OS_PEND_OBJ  *p_obj,
+                     OS_TCB       *p_tcb,
+                     CPU_TS        ts)
+{
+    OS_OBJ_QTY      n_pend_list;                                /* Number of pend lists                                 */
+    OS_PEND_DATA   *p_pend_data;
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    p_pend_data = p_tcb->PendDataTblPtr;                        /* Point to the first OS_PEND_DATA to remove            */
+    n_pend_list = p_tcb->PendDataTblEntries;                    /* Get number of entries in the table                   */
+
+    while (n_pend_list > 0u) {                                  /* Mark posted object in OS_PEND_DATA table             */
+        if (p_obj == p_pend_data->PendObjPtr) {                 /* Did we find the object pend aborted?                 */
+            p_pend_data->RdyObjPtr = p_obj;                     /* Yes, indicate the object in the .RdyObjPtr           */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+            p_pend_data->RdyTS     = ts;                        /* save the timestamp of the pend abort                 */
+#endif
+            break;
+        }
+        p_pend_data++;
+        n_pend_list--;
+    }
+}
+#endif
+
+/*
+************************************************************************************************************************
+*                                              INITIALIZE A WAIT LIST TABLE
+*
+* Description: This function is called to initialize the fields of a table of OS_PEND_DATA entries.  It's assumed that
+*              the .PendObjPtr field of each entry in the table is set by the caller and thus will NOT be touched by
+*              this function.
+*
+* Arguments  : p_tcb              is a pointer to the TCB of the task that we want to pend abort.
+*              -----
+*
+*              p_pend_data_tbl    is a pointer to a table (see below) of OS_PEND_DATA elements to initialize.
+*              ---------------
+*
+*                                  .PendObjPtr .RdyObjPtr .RdyMsgPtr .RdyMsgSize .RdyTS .TCBPtr .NextPtr .PrevPtr
+*                                 +-----------+----------+----------+-----------+------+-------+--------+--------+    ^
+*               p_pend_data_tbl-> |     ?     |  0       | 0        | 0         | 0    | p_tcb | 0      | 0      |    |
+*                                 +-----------+----------+----------+-----------+------+-------+--------+--------+    |
+*                                 |     ?     |  0       | 0        | 0         | 0    | p_tcb | 0      | 0      |    |
+*                                 +-----------+----------+----------+-----------+------+-------+--------+--------+    |
+*                                 |     ?     |  0       | 0        | 0         | 0    | p_tcb | 0      | 0      |    |
+*                                 +-----------+----------+----------+-----------+------+-------+--------+--------+  size
+*                                 |     ?     |  0       | 0        | 0         | 0    | p_tcb | 0      | 0      |    |
+*                                 +-----------+----------+----------+-----------+------+-------+--------+--------+    |
+*                                 |     ?     |  0       | 0        | 0         | 0    | p_tcb | 0      | 0      |    |
+*                                 +-----------+----------+----------+-----------+------+-------+--------+--------+    |
+*                                 |     ?     |  0       | 0        | 0         | 0    | p_tcb | 0      | 0      |    |
+*                                 +-----------+----------+----------+-----------+------+-------+--------+--------+    V
+*
+*              tbl_size           is the size of the table in number of entries
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application must not call it.
+*
+*              2) It's possible for the table to be of size 1 when multi-pend is not used
+*
+*              3) Note that the .PendObjPtr is NOT touched because it's assumed to be set by the caller.
+************************************************************************************************************************
+*/
+
+void  OS_PendDataInit (OS_TCB        *p_tcb,
+                       OS_PEND_DATA  *p_pend_data_tbl,
+                       OS_OBJ_QTY     tbl_size)
+{
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+    OS_OBJ_QTY  i;
+#endif
+
+
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+    p_tcb->PendDataTblEntries = tbl_size;                       /* Link the TCB to the beginning of the table           */
+    p_tcb->PendDataTblPtr     = p_pend_data_tbl;
+
+    for (i = 0u; i < tbl_size; i++) {
+        p_pend_data_tbl->NextPtr    = DEF_NULL;                 /* Initialize all the fields                            */
+        p_pend_data_tbl->PrevPtr    = DEF_NULL;
+        p_pend_data_tbl->RdyObjPtr  = DEF_NULL;
+        p_pend_data_tbl->RdyMsgPtr  = DEF_NULL;
+        p_pend_data_tbl->RdyMsgSize = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        p_pend_data_tbl->RdyTS      = 0u;
+#endif
+        p_pend_data_tbl->TCBPtr     = p_tcb;                    /* Every entry points back to the TCB of the task       */
+        p_pend_data_tbl++;
+    }
+#else
+    (void)tbl_size;
+
+    p_tcb->PendDataTblPtr       = p_pend_data_tbl;
+
+    p_pend_data_tbl->NextPtr    = DEF_NULL;        /* Initialize all the fields                              */
+    p_pend_data_tbl->PrevPtr    = DEF_NULL;
+    p_pend_data_tbl->RdyObjPtr  = DEF_NULL;
+    p_pend_data_tbl->RdyMsgPtr  = DEF_NULL;
+    p_pend_data_tbl->RdyMsgSize = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_pend_data_tbl->RdyTS      = 0u;
+#endif
+    p_pend_data_tbl->TCBPtr     = p_tcb;                    /* Every entry points back to the TCB of the task         */
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                     ADD/REMOVE DEBUG NAMES TO PENDED OBJECT AND OS_TCB
+*
+* Description: These functions are used to add pointers to ASCII 'names' of objects so they can easily be displayed
+*              using a kernel aware tool.
+*
+* Arguments  : p_obj              is a pointer to the object being pended on
+*
+*              p_tcb              is a pointer to the OS_TCB of the task pending on the object
+*
+* Returns    : none
+*
+* Note(s)    : 1) These functions are INTERNAL to uC/OS-III and your application must not call it.
+************************************************************************************************************************
+*/
+
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void  OS_PendDbgNameAdd (OS_PEND_OBJ  *p_obj,
+                         OS_TCB       *p_tcb)
+{
+    OS_PEND_LIST  *p_pend_list;
+    OS_PEND_DATA  *p_pend_data;
+    OS_TCB        *p_tcb1;
+
+
+    if (p_obj != DEF_NULL) {
+        p_tcb->DbgNamePtr =  p_obj->NamePtr;                    /* Task pending on this object ... save name in TCB     */
+        p_pend_list       = &p_obj->PendList;                   /* Find name of HP task pending on this object ...      */
+        p_pend_data       =  p_pend_list->HeadPtr;
+        p_tcb1            =  p_pend_data->TCBPtr;
+        p_obj->DbgNamePtr = p_tcb1->NamePtr;                    /* ... Save in object                                   */
+    } else {
+        switch (p_tcb->PendOn) {
+            case OS_TASK_PEND_ON_TASK_Q:
+                 p_tcb->DbgNamePtr = (CPU_CHAR *)((void *)"Task Q");
+                 break;
+
+            case OS_TASK_PEND_ON_TASK_SEM:
+                 p_tcb->DbgNamePtr = (CPU_CHAR *)((void *)"Task Sem");
+                 break;
+
+            default:
+                 p_tcb->DbgNamePtr = (CPU_CHAR *)((void *)" ");
+                 break;
+        }
+    }
+}
+
+
+
+void  OS_PendDbgNameRemove (OS_PEND_OBJ  *p_obj,
+                            OS_TCB       *p_tcb)
+{
+    OS_PEND_LIST  *p_pend_list;
+    OS_PEND_DATA  *p_pend_data;
+    OS_TCB        *p_tcb1;
+
+
+    p_tcb->DbgNamePtr = (CPU_CHAR *)((void *)" ");              /* Remove name of object pended on for readied task     */
+
+    if (p_obj != DEF_NULL) {
+        p_pend_list = &p_obj->PendList;
+        p_pend_data =  p_pend_list->HeadPtr;
+        if (p_pend_data != DEF_NULL) {                          /* Find name of HP task pending on this object ...      */
+            p_tcb1            = p_pend_data->TCBPtr;
+            p_obj->DbgNamePtr = p_tcb1->NamePtr;                /* ... Save in object                                   */
+        } else {
+            p_obj->DbgNamePtr = (CPU_CHAR *)((void *)" ");      /* Or no other task is pending on object                */
+        }
+    }
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                               CHANGE THE PRIORITY OF A TASK WAITING IN ONE OR MORE PEND LISTS
+*
+* Description: This function is called to change the position of a task waiting in one or more pend lists.  Because a
+*              task can be waiting on multiple objects then each pend list needs to be updated.  Specifically, the
+*              task can be the highest priority task waiting on one pend list, the lowest priority task waiting in yet
+*              another pend list or somewhere else in another pend list.  Because of this, we need to be able to change
+*              each of those pend lists individually.
+*
+*              The drawing below shows an example of a task (OS_TCB) that belongs to 3 separate pend lists.  Each
+*              pend list can contain multiple tasks (the .PrevPtr and .NextPtr show a '?' to indicate this).  The OS_TCB
+*              contains a pointer (.PendDataTblPtr) to the first entry in the list of pend lists.
+*
+*                                                                                                          OS_TCB
+*                                                                                                   +--------------------+
+*                                                                                                   |                    |
+*                                                                                                   +--------------------+
+*                                                                                                   | PendDataTblEntries |
+*                                      Point to first entry in the OS_PEND_DATA table (i.e. [0])    +--------------------+
+*                                          /-----------------------------<------------------------- | PendDataTblPtr     |
+*                                          |                                                        +--------------------+
+*                                          |                                                                 ^
+*              OS_PEND_LIST                |                                                                 |
+*              +------------+              |                                                                 |
+*              | TailPtr    |              |                                                                 |
+*              +------------+              |                                                                 |
+*              | HeadPtr    |              |                                                                 |
+*              +------------+              |                                        /---------->-------------/
+*              | NbrEntries |              |                                        |                        |
+*              +------------+     [0]      V   OS_PEND_DATA                         |                        |
+*                                     +---------+------------+-------+---------+--------+---------+          |
+*                             ? <---- | PrevPtr | PendObjPtr |       |         | TCBPtr | NextPtr | --> ?    |
+*                                     +---------+------------+-------+---------+--------+---------+          |
+*                                                                                                            |
+*                                                                                                            |
+*                                                                                                            |
+*                                                                                                            |
+*                                                                                                            |
+*              OS_PEND_LIST                                                                Point back to TCB |
+*              +------------+                                                                                |
+*              | TailPtr    |                                                                                |
+*              +------------+                                                                                |
+*              | HeadPtr    |                                                                                |
+*              +------------+                                                      /----------->-------------/
+*              | NbrEntries |                                                      |                         |
+*              +------------+     [1]          OS_PEND_DATA                        |                         |
+*                                     +---------+------------+-------+---------+--------+---------+          |
+*                             ? <---- | PrevPtr | PendObjPtr |       |         | TCBPtr | NextPtr | --> ?    |
+*                                     +---------+------------+-------+---------+--------+---------+          |
+*                                                                                                            |
+*                                                                                                            |
+*                                                                                                            |
+*                                                                                                            |
+*                                                                                                            |
+*              OS_PEND_LIST                                                                                  |
+*              +------------+                                                                                |
+*              | TailPtr    |                                                                                |
+*              +------------+                                                                                |
+*              | HeadPtr    |                                                                                |
+*              +------------+                                                      /----------->-------------/
+*              | NbrEntries |                                                      |
+*              +------------+     [2]          OS_PEND_DATA                        |
+*                                     +---------+------------+-------+---------+--------+---------+
+*                             ? <---- | PrevPtr | PendObjPtr |       |         | TCBPtr | NextPtr | ----> ?
+*                                     +---------+------------+-------+---------+--------+---------+
+*
+*
+* Arguments  : p_tcb       is a pointer to the TCB of the task to move
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+*
+*              2) It's assumed that the TCB contains the NEW priority in its .Prio field.
+************************************************************************************************************************
+*/
+
+void  OS_PendListChangePrio (OS_TCB   *p_tcb)
+{
+    OS_OBJ_QTY      n_pend_list;                                /* Number of pend lists                                 */
+    OS_PEND_DATA   *p_pend_data;
+    OS_PEND_LIST   *p_pend_list;
+    OS_PEND_OBJ    *p_obj;
+
+
+    p_pend_data = p_tcb->PendDataTblPtr;                        /* Point to first wait list entry                       */
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+    n_pend_list = p_tcb->PendDataTblEntries;                    /* Get the number of pend list task is in               */
+#else
+    n_pend_list = 1u;
+#endif
+
+    while (n_pend_list > 0u) {
+        p_obj       =  p_pend_data->PendObjPtr;                 /* Get pointer to pend list                             */
+        p_pend_list = &p_obj->PendList;
+        if (p_pend_list->HeadPtr->NextPtr != DEF_NULL) {        /* Only move if multiple entries in the list            */
+            OS_PendListRemove1(p_pend_list,                     /* Remove entry from current position                   */
+                               p_pend_data);
+            OS_PendListInsertPrio(p_pend_list,                  /* INSERT it back in the list                           */
+                                  p_pend_data);
+        }
+        p_pend_data++;                                          /* Point to next wait list                              */
+        n_pend_list--;
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                                INITIALIZE A WAIT LIST
+*
+* Description: This function is called to initialize the fields of an OS_PEND_LIST.
+*
+* Arguments  : p_pend_list   is a pointer to an OS_PEND_LIST
+*              -----------
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application must not call it.
+************************************************************************************************************************
+*/
+
+void  OS_PendListInit (OS_PEND_LIST  *p_pend_list)
+{
+    p_pend_list->HeadPtr    = DEF_NULL;
+    p_pend_list->TailPtr    = DEF_NULL;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_pend_list->NbrEntries = 0u;
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                   INSERT PEND DATA BASED ON IT'S PRIORITY IN A LIST
+*
+* Description: This function is called to place an OS_PEND_DATA entry in a linked list based on its priority.  The
+*              highest priority being placed at the head of the list.  It's assumed that the OS_PEND_DATA entry to
+*              insert points to the TCB of the task being inserted.  The TCB is also assumed to contain the priority
+*              of the task in its .Prio field.
+*
+*              CASE 0: Insert in an empty list.
+*
+*                     OS_PEND_LIST
+*                     +---------------+
+*                     | TailPtr       |-> 0
+*                     +---------------+
+*                     | HeadPtr       |-> 0
+*                     +---------------+
+*                     | NbrEntries=0  |
+*                     +---------------+
+*
+*
+*
+*              CASE 1: Insert BEFORE or AFTER an OS_TCB
+*
+*                     OS_PEND_LIST
+*                     +--------------+         OS_PEND_DATA
+*                     | TailPtr      |--+---> +------------+
+*                     +--------------+  |     | NextPtr    |->0
+*                     | HeadPtr      |--/     +------------+
+*                     +--------------+     0<-| PrevPtr    |
+*                     | NbrEntries=1 |        +------------+
+*                     +--------------+        |            |
+*                                             +------------+
+*                                             |            |
+*                                             +------------+
+*
+*
+*                     OS_PEND_LIST
+*                     +--------------+
+*                     | TailPtr      |-----------------------------------------------+
+*                     +--------------+         OS_PEND_DATA         OS_PEND_DATA     |    OS_PEND_DATA
+*                     | HeadPtr      |------> +------------+       +------------+    +-> +------------+
+*                     +--------------+        | NextPtr    |------>| NextPtr    | ...... | NextPtr    |->0
+*                     | NbrEntries=N |        +------------+       +------------+        +------------+
+*                     +--------------+     0<-| PrevPtr    |<------| PrevPtr    | ...... | PrevPtr    |
+*                                             +------------+       +------------+        +------------+
+*                                             |            |       |            |        |            |
+*                                             +------------+       +------------+        +------------+
+*                                             |            |       |            |        |            |
+*                                             +------------+       +------------+        +------------+
+*
+*
+* Arguments  : p_pend_list    is a pointer to the OS_PEND_LIST where the OS_PEND_DATA entry will be inserted
+*              -----------
+*
+*              p_pend_data    is the OS_PEND_DATA to insert in the list
+*              -----------
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+*
+*              2) 'p_pend_data->TCBPtr->Prio' contains the priority of the TCB associated with the entry to insert.
+*                 We can compare this priority with the priority of other entries in the list.
+************************************************************************************************************************
+*/
+
+void  OS_PendListInsertPrio (OS_PEND_LIST  *p_pend_list,
+                             OS_PEND_DATA  *p_pend_data)
+{
+    OS_PRIO        prio;
+    OS_TCB        *p_tcb;
+    OS_TCB        *p_tcb_next;
+    OS_PEND_DATA  *p_pend_data_prev;
+    OS_PEND_DATA  *p_pend_data_next;
+
+
+
+    p_tcb = p_pend_data->TCBPtr;                                /* Obtain the priority of the task to insert            */
+    prio  = p_tcb->Prio;
+    if (p_pend_list->HeadPtr == DEF_NULL) {                     /* CASE 0: Insert when there are no entries             */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_pend_list->NbrEntries = 1u;                           /* This is the first entry                              */
+#endif
+        p_pend_data->NextPtr    = DEF_NULL;                     /* No other OS_PEND_DATAs in the list                   */
+        p_pend_data->PrevPtr    = DEF_NULL;
+        p_pend_list->HeadPtr    = p_pend_data;
+        p_pend_list->TailPtr    = p_pend_data;
+    } else {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_pend_list->NbrEntries++;                              /* CASE 1: One more OS_PEND_DATA in the list            */
+#endif
+        p_pend_data_next = p_pend_list->HeadPtr;
+        while (p_pend_data_next != DEF_NULL) {                  /* Find the position where to insert                    */
+            p_tcb_next   = p_pend_data_next->TCBPtr;
+            if (prio < p_tcb_next->Prio) {
+                break;                                          /* Found! ... insert BEFORE current                     */
+            } else {
+                p_pend_data_next = p_pend_data_next->NextPtr;   /* Not Found, follow the list                           */
+            }
+        }
+        if (p_pend_data_next == DEF_NULL) {                     /* TCB to insert is lower in prio                       */
+            p_pend_data->NextPtr      = DEF_NULL;               /* ... insert at the tail.                              */
+            p_pend_data_prev          = p_pend_list->TailPtr;
+            p_pend_data->PrevPtr      = p_pend_data_prev;
+            p_pend_data_prev->NextPtr = p_pend_data;
+            p_pend_list->TailPtr      = p_pend_data;
+        } else {
+            if (p_pend_data_next->PrevPtr == DEF_NULL) {        /* Is new TCB highest priority?                         */
+                p_pend_data_next->PrevPtr = p_pend_data;        /* Yes, insert as new Head of list                      */
+                p_pend_data->PrevPtr      = DEF_NULL;
+                p_pend_data->NextPtr      = p_pend_data_next;
+                p_pend_list->HeadPtr      = p_pend_data;
+            } else {
+                p_pend_data_prev          = p_pend_data_next->PrevPtr;  /* No,  insert in between two entries           */
+                p_pend_data->PrevPtr      = p_pend_data_prev;
+                p_pend_data->NextPtr      = p_pend_data_next;
+                p_pend_data_prev->NextPtr = p_pend_data;
+                p_pend_data_next->PrevPtr = p_pend_data;
+            }
+        }
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                           REMOVE TASK FROM PEND LIST(s) KNOWING ONLY WHICH TCB TO REMOVE
+*
+* Description: This function is called to remove a task from a pend list knowing only the TCB of the task to remove
+*
+*
+*              CASE 0: OS_PEND_DATA list is empty, nothing to do.
+*
+*              CASE 1: Only 1 OS_PEND_DATA in the list.
+*
+*                     OS_PEND_LIST
+*                     +--------------+         OS_PEND_DATA
+*                     | TailPtr      |--+---> +------------+
+*                     +--------------+  |     | NextPtr    |->0
+*                     | HeadPtr      |--/     +------------+
+*                     +--------------+     0<-| PrevPtr    |
+*                     | NbrEntries=1 |        +------------+
+*                     +--------------+        |            |
+*                                             +------------+
+*                                             |            |
+*                                             +------------+
+*
+*              CASE N: Two or more OS_PEND_DATAs in the list.
+*
+*                     OS_PEND_LIST
+*                     +--------------+
+*                     | TailPtr      |-----------------------------------------------+
+*                     +--------------+         OS_PEND_DATA         OS_PEND_DATA     |    OS_PEND_DATA
+*                     | HeadPtr      |------> +------------+       +------------+    +-> +------------+
+*                     +--------------+        | NextPtr    |------>| NextPtr    | ...... | NextPtr    |->0
+*                     | NbrEntries=N |        +------------+       +------------+        +------------+
+*                     +--------------+     0<-| PrevPtr    |<------| PrevPtr    | ...... | PrevPtr    |
+*                                             +------------+       +------------+        +------------+
+*                                             |            |       |            |        |            |
+*                                             +------------+       +------------+        +------------+
+*                                             |            |       |            |        |            |
+*                                             +------------+       +------------+        +------------+
+*
+*
+* Arguments  : p_tcb          is a pointer to the TCB of the task to remove from all pend lists
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_PendListRemove (OS_TCB  *p_tcb)
+{
+    OS_OBJ_QTY      n_pend_list;                                /* Number of pend lists                                 */
+    OS_PEND_DATA   *p_pend_data;
+    OS_PEND_LIST   *p_pend_list;
+    OS_PEND_OBJ    *p_obj;
+
+
+    if (p_tcb->PendDataTblPtr != DEF_NULL) {                    /* Only remove if object has a pend list.               */
+        p_pend_data = p_tcb->PendDataTblPtr;                    /* Point to the first OS_PEND_DATA to remove            */
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+        n_pend_list = p_tcb->PendDataTblEntries;                /* Get number of entries in the table                   */
+#else
+        n_pend_list = 1u;
+#endif
+
+
+        while (n_pend_list > 0u) {
+        p_obj       =  p_pend_data->PendObjPtr;                 /* Get pointer to pend list                             */
+            p_pend_list = &p_obj->PendList;
+            OS_PendListRemove1(p_pend_list,
+                               p_pend_data);
+            p_pend_data++;
+            n_pend_list--;
+        }
+    #if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+        p_tcb->PendDataTblEntries = 0u;
+    #endif
+        p_tcb->PendDataTblPtr     = DEF_NULL;
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                               REMOVE AN 'OS_PEND_DATA' ENTRY from a 'OS_PEND_LIST'
+*
+* Description: This function is called to remove a task from a wait list knowing only the TCB of the task to remove
+*
+*
+*              CASE 1: Only 1 OS_PEND_DATA in the list.
+*
+*                     OS_PEND_LIST
+*                     +--------------+         OS_PEND_DATA
+*                     | TailPtr      |--+---> +------------+
+*                     +--------------+  |     | NextPtr    |->0
+*                     | HeadPtr      |--/      +------------+
+*                     +--------------+     0<-| PrevPtr    |
+*                     | NbrEntries=1 |        +------------+
+*                     +--------------+        |            |
+*                                             +------------+
+*                                             |            |
+*                                             +------------+
+*
+*              CASE N: Two or more OS_PEND_DATAs in the list.
+*
+*                     OS_PEND_LIST
+*                     +--------------+
+*                     | TailPtr      |-----------------------------------------------+
+*                     +--------------+         OS_PEND_DATA         OS_PEND_DATA     |    OS_PEND_DATA
+*                     | HeadPtr      |------> +------------+       +------------+    +-> +------------+
+*                     +--------------+        | NextPtr    |------>| NextPtr    | ...... | NextPtr    |->0
+*                     | NbrEntries=N |        +------------+       +------------+        +------------+
+*                     +--------------+     0<-| PrevPtr    |<------| PrevPtr    | ...... | PrevPtr    |
+*                                             +------------+       +------------+        +------------+
+*                                             |            |       |            |        |            |
+*                                             +------------+       +------------+        +------------+
+*                                             |            |       |            |        |            |
+*                                             +------------+       +------------+        +------------+
+*
+*
+* Arguments  : p_pend_list     is a pointer to the pend list where 'p_pend_data' will be removed from
+*              -----------
+*
+*              p_pend_data     is a pointer to the OS_PEND_DATA to remove from the pend list
+*              -----------
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_PendListRemove1 (OS_PEND_LIST  *p_pend_list,
+                          OS_PEND_DATA  *p_pend_data)
+{
+    OS_PEND_DATA  *p_prev;
+    OS_PEND_DATA  *p_next;
+
+
+
+    if (p_pend_list->HeadPtr->NextPtr == DEF_NULL) {
+        p_pend_list->HeadPtr = DEF_NULL;                        /* Only one entry in the pend list                      */
+        p_pend_list->TailPtr = DEF_NULL;
+
+    } else if (p_pend_data->PrevPtr == DEF_NULL) {              /* See if entry is at the head of the list              */
+        p_next               = p_pend_data->NextPtr;            /* Yes                                                  */
+        p_next->PrevPtr      = DEF_NULL;
+        p_pend_list->HeadPtr = p_next;
+
+    } else if (p_pend_data->NextPtr == DEF_NULL) {              /* See if entry is at the tail of the list              */
+        p_prev               = p_pend_data->PrevPtr;            /* Yes                                                  */
+        p_prev->NextPtr      = DEF_NULL;
+        p_pend_list->TailPtr = p_prev;
+
+    } else {
+        p_prev               = p_pend_data->PrevPtr;            /* Remove from inside the list                          */
+        p_next               = p_pend_data->NextPtr;
+        p_prev->NextPtr      = p_next;
+        p_next->PrevPtr      = p_prev;
+    }
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_pend_list->NbrEntries--;                                  /* One less entry in the list                           */
+#endif
+    p_pend_data->NextPtr = DEF_NULL;
+    p_pend_data->PrevPtr = DEF_NULL;
+}
+
+
+/*
+************************************************************************************************************************
+*                                READY A TASK THAT WAS PENDING ON AN OBJECT BEING DELETED
+*
+* Description: This function is called to make a task ready-to-run because an object is being deleted
+*
+* Arguments  : p_obj          is a pointer to the object being deleted
+*              -----
+*
+*              p_tcb          is a pointer to the OS_TCB of the task to make ready-to-run
+*              -----
+*
+*              ts             is a timestamp to indicate when the object was deleted
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_PendObjDel (OS_PEND_OBJ  *p_obj,
+                     OS_TCB       *p_tcb,
+                     CPU_TS        ts)
+{
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+#if (OS_CFG_PEND_MULTI_EN == DEF_DISABLED)
+    (void)p_obj;
+#endif
+
+    switch (p_tcb->TaskState) {
+        case OS_TASK_STATE_RDY:                                 /* These states should never occur                      */
+        case OS_TASK_STATE_DLY:
+        case OS_TASK_STATE_SUSPENDED:
+        case OS_TASK_STATE_DLY_SUSPENDED:
+             break;
+
+        case OS_TASK_STATE_PEND:
+        case OS_TASK_STATE_PEND_TIMEOUT:
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+             if (p_tcb->PendOn == OS_TASK_PEND_ON_MULTI) {
+                 OS_PendObjDel1(p_obj,                          /* Indicate which object was pend aborted               */
+                                p_tcb,
+                                ts);
+             }
+#endif
+#if (OS_MSG_EN == DEF_ENABLED)
+             p_tcb->MsgPtr     = DEF_NULL;
+             p_tcb->MsgSize    = 0u;
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             p_tcb->TS         = ts;
+#endif
+             OS_PendListRemove(p_tcb);                          /* Remove task from all wait lists                      */
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             if (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT) {
+                 OS_TickListRemove(p_tcb);                      /* Remove from tick list                                */
+             }
+#endif
+             OS_RdyListInsert(p_tcb);                           /* Insert the task in the ready list                    */
+             p_tcb->TaskState  = OS_TASK_STATE_RDY;             /* Task is readied because object is deleted            */
+             p_tcb->PendStatus = OS_STATUS_PEND_DEL;
+             p_tcb->PendOn     = OS_TASK_PEND_ON_NOTHING;
+             break;
+
+        case OS_TASK_STATE_PEND_SUSPENDED:
+        case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+             if (p_tcb->PendOn == OS_TASK_PEND_ON_MULTI) {
+                 OS_PendObjDel1(p_obj,                          /* Indicate which object was pend aborted               */
+                                p_tcb,
+                                ts);
+             }
+#endif
+#if (OS_MSG_EN == DEF_ENABLED)
+             p_tcb->MsgPtr     = DEF_NULL;
+             p_tcb->MsgSize    = 0u;
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             p_tcb->TS         = ts;
+#endif
+             OS_PendListRemove(p_tcb);                          /* Remove task from all wait lists                      */
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             if (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED) {
+                 OS_TickListRemove(p_tcb);                      /* Cancel the timeout                                   */
+             }
+#endif
+             p_tcb->TaskState  = OS_TASK_STATE_SUSPENDED;       /* Task needs to remain suspended                       */
+             p_tcb->PendStatus = OS_STATUS_PEND_DEL;
+             p_tcb->PendOn     = OS_TASK_PEND_ON_NOTHING;       /* Indicate no longer pending                           */
+             break;
+
+        default:
+             break;
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                    DELETE AN OBJECT FROM A TASK PENDING ON MULTIPLE OBJECTS
+*
+* Description: This function is called when a task is pending on multiple objects and the object is being deleted.
+*              This function needs to indicate to the caller which object was deleted by placing the address of the
+*              object in the OS_PEND_DATA table corresponding to the deleted object.
+*
+*              For example, if the task pends on six (6) objects, the address of those 6 objects are placed in the
+*              .PendObjPtr field of the OS_PEND_DATA table as shown below.  Note that the .PendDataTblEntries would be
+*              set to six (6) in this case.  As shown, when the pend call returns because a task deleted 'Obj C' then,
+*              only the one entry contains the filled in data and the other entries contains NULL pointers and zero
+*              data.
+*
+*              You should note that the NULL pointers are zero data values are actually filled in by the pend call.
+*
+*
+*                                           .PendObjPtr    .RdyObjPtr     .RdyMsgPtr     .RdyMsgSize    .RdyTS
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*              p_tcb->PendDataTblPtr  ->  |  Obj A       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj B       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj C       |  Obj C       | 0            | 0            | TS           |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj D       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj E       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj F       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*
+*
+* Arguments  : p_obj        is a pointer to the object being deleted
+*              -----
+*
+*              p_tcb        is the OS_TCB of the task pending on the object being deleted
+*              -----
+*
+*              ts           is the time stamp of when the object was deleted
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+void  OS_PendObjDel1 (OS_PEND_OBJ  *p_obj,
+                      OS_TCB       *p_tcb,
+                      CPU_TS        ts)
+{
+    OS_OBJ_QTY      n_pend_list;                                /* Number of pend lists                                 */
+    OS_PEND_DATA   *p_pend_data;
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    p_pend_data = p_tcb->PendDataTblPtr;                        /* Point to the first OS_PEND_DATA to remove            */
+    n_pend_list = p_tcb->PendDataTblEntries;                    /* Get number of entries in the table                   */
+
+    while (n_pend_list > 0u) {                                  /* Mark posted object in OS_PEND_DATA table             */
+        if (p_obj == p_pend_data->PendObjPtr) {                 /* Did we find the object deleted?                      */
+            p_pend_data->RdyObjPtr = p_obj;                     /* Yes, indicate the object in the .RdyObjPtr           */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+            p_pend_data->RdyTS     = ts;                        /* save the timestamp                                   */
+#endif
+            break;
+        }
+        p_pend_data++;
+        n_pend_list--;
+    }
+}
+#endif
+
+/*
+************************************************************************************************************************
+*                                                   POST TO A TASK
+*
+* Description: This function is called to post to a task.  This function exist because it is common to a number of
+*              OSxxxPost() services.
+*
+* Arguments  : p_obj          Is a pointer to the object being posted to or NULL pointer if there is no object
+*              -----
+*
+*              p_tcb          Is a pointer to the OS_TCB that will receive the 'post'
+*              -----
+*
+*              p_void         If we are posting a message to a task, this is the message that the task will receive
+*
+*              msg_size       If we are posting a message to a task, this is the size of the message
+*
+*              ts             The timestamp as to when the post occurred
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_Post (OS_PEND_OBJ  *p_obj,
+               OS_TCB       *p_tcb,
+               void         *p_void,
+               OS_MSG_SIZE   msg_size,
+               CPU_TS        ts)
+{
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    switch (p_tcb->TaskState) {
+        case OS_TASK_STATE_RDY:                                 /* Cannot Pend Abort a task that is ready               */
+        case OS_TASK_STATE_DLY:                                 /* Cannot Pend Abort a task that is delayed             */
+        case OS_TASK_STATE_SUSPENDED:                           /* Cannot Post a suspended task                         */
+        case OS_TASK_STATE_DLY_SUSPENDED:                       /* Cannot Post a suspended task that was also dly'd     */
+             break;
+
+        case OS_TASK_STATE_PEND:
+        case OS_TASK_STATE_PEND_TIMEOUT:
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+             if (p_tcb->PendOn == OS_TASK_PEND_ON_MULTI) {
+                 OS_Post1(p_obj,                                /* Indicate which object was posted to                  */
+                          p_tcb,
+                          p_void,
+                          msg_size,
+                          ts);
+             } else {
+#endif
+#if (OS_MSG_EN == DEF_ENABLED)
+                 p_tcb->MsgPtr  = p_void;                       /* Deposit message in OS_TCB of task waiting            */
+                 p_tcb->MsgSize = msg_size;                     /* ... assuming posting a message                       */
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                 p_tcb->TS      = ts;
+#endif
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+             }
+#endif
+             if (p_obj != DEF_NULL) {
+                 OS_PendListRemove(p_tcb);                      /* Remove task from wait list(s)                        */
+             }
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+             OS_PendDbgNameRemove(p_obj,
+                                  p_tcb);
+#endif
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             if (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT) {
+                 OS_TickListRemove(p_tcb);                      /* Remove from tick list                                */
+             }
+#endif
+             OS_RdyListInsert(p_tcb);                           /* Insert the task in the ready list                    */
+             p_tcb->TaskState  = OS_TASK_STATE_RDY;
+             p_tcb->PendStatus = OS_STATUS_PEND_OK;             /* Clear pend status                                    */
+             p_tcb->PendOn     = OS_TASK_PEND_ON_NOTHING;       /* Indicate no longer pending                           */
+             break;
+
+        case OS_TASK_STATE_PEND_SUSPENDED:
+        case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+             if (p_tcb->PendOn == OS_TASK_PEND_ON_MULTI) {
+                 OS_Post1(p_obj,                                /* Indicate which object was posted to                  */
+                          p_tcb,
+                          p_void,
+                          msg_size,
+                          ts);
+             } else {
+#endif
+#if (OS_MSG_EN == DEF_ENABLED)
+                 p_tcb->MsgPtr  = p_void;                       /* Deposit message in OS_TCB of task waiting            */
+                 p_tcb->MsgSize = msg_size;                     /* ... assuming posting a message                       */
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                 p_tcb->TS      = ts;
+#endif
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+             }
+#endif
+             if (p_obj != DEF_NULL) {
+                 OS_PendListRemove(p_tcb);                      /* Remove task from wait list(s)                        */
+             }
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+             OS_PendDbgNameRemove(p_obj,
+                                  p_tcb);
+#endif
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             if (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED) {
+                 OS_TickListRemove(p_tcb);                      /* Cancel any timeout                                   */
+             }
+#endif
+             p_tcb->TaskState  = OS_TASK_STATE_SUSPENDED;
+             p_tcb->PendStatus = OS_STATUS_PEND_OK;             /* Clear pend status                                    */
+             p_tcb->PendOn     = OS_TASK_PEND_ON_NOTHING;       /* Indicate no longer pending                           */
+             break;
+
+        default:
+             break;
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                           POST TO A TASK PENDING ON MULTIPLE OBJECTS
+*
+* Description: This function is called when a task is pending on multiple objects and the object has been posted to.
+*              This function needs to indicate to the caller which object was posted to by placing the address of the
+*              object in the OS_PEND_DATA table corresponding to the posted object.
+*
+*              For example, if the task pends on six (6) objects, the address of those 6 objects are placed in the
+*              .PendObjPtr field of the OS_PEND_DATA table as shown below.  Note that the .PendDataTblEntries would be
+*              set to six (6) in this case.  As shown, when the pend call returns because a task or an ISR posted to
+*              'Obj C' then, only the one entry contains the filled in data and the other entries contains NULL pointers
+*              and zero data.
+*
+*              You should note that the NULL pointers are zero data values are actually filled in by the pend call.
+*
+*
+*                                           .PendObjPtr    .RdyObjPtr     .RdyMsgPtr     .RdyMsgSize    .RdyTS
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*              p_tcb->PendDataTblPtr  ->  |  Obj A       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj B       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj C       |  Obj C       | Msg Ptr      | Msg Size     | TS           |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj D       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj E       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*                                         |  Obj F       |  0           | 0            | 0            | 0            |
+*                                         +--------------+--------------+--------------+--------------+--------------+
+*
+*
+* Arguments  : p_obj        is a pointer to the object being posted to
+*              -----
+*
+*              p_tcb        is the OS_TCB of the task receiving the signal or the message
+*              -----
+*
+*              p_void       is the actual message (assuming posting to a message queue).  A NULL pointer otherwise.
+*
+*              msg_size     is the size of the message sent (if posted to a message queue)
+*
+*              ts           is the time stamp of when the post occurred
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+void  OS_Post1 (OS_PEND_OBJ  *p_obj,
+                OS_TCB       *p_tcb,
+                void         *p_void,
+                OS_MSG_SIZE   msg_size,
+                CPU_TS        ts)
+{
+    OS_OBJ_QTY      n_pend_list;                                /* Number of pend lists                                 */
+    OS_PEND_DATA   *p_pend_data;
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    p_pend_data = p_tcb->PendDataTblPtr;                        /* Point to the first OS_PEND_DATA to remove            */
+    n_pend_list = p_tcb->PendDataTblEntries;                    /* Get number of entries in the table                   */
+
+    while (n_pend_list > 0u) {                                  /* Mark posted object in OS_PEND_DATA table             */
+        if (p_obj == p_pend_data->PendObjPtr) {                 /* Did we find the object posted to?                    */
+            p_pend_data->RdyObjPtr  = p_obj;                    /* Yes, indicate the object in the .RdyObjPtr           */
+            p_pend_data->RdyMsgPtr  = p_void;                   /* store the message posted                             */
+            p_pend_data->RdyMsgSize = msg_size;                 /* store the size of the message posted                 */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+            p_pend_data->RdyTS      = ts;                       /* save the timestamp of the post                       */
+#endif
+            break;
+        }
+        p_pend_data++;
+        n_pend_list--;
+    }
+}
+#endif
+
+/*
+************************************************************************************************************************
+*                                                    INITIALIZATION
+*                                               READY LIST INITIALIZATION
+*
+* Description: This function is called by OSInit() to initialize the ready list.  The ready list contains a list of all
+*              the tasks that are ready to run.  The list is actually an array of OS_RDY_LIST.  An OS_RDY_LIST contains
+*              three fields.  The number of OS_TCBs in the list (i.e. .NbrEntries), a pointer to the first OS_TCB in the
+*              OS_RDY_LIST (i.e. .HeadPtr) and a pointer to the last OS_TCB in the OS_RDY_LIST (i.e. .TailPtr).
+*
+*              OS_TCBs are doubly linked in the OS_RDY_LIST and each OS_TCB points pack to the OS_RDY_LIST it belongs
+*              to.
+*
+*              'OS_RDY_LIST  OSRdyTbl[OS_CFG_PRIO_MAX]'  looks like this once initialized:
+*
+*                               +---------------+--------------+
+*                               |               | TailPtr      |-----> 0
+*                          [0]  | NbrEntries=0  +--------------+
+*                               |               | HeadPtr      |-----> 0
+*                               +---------------+--------------+
+*                               |               | TailPtr      |-----> 0
+*                          [1]  | NbrEntries=0  +--------------+
+*                               |               | HeadPtr      |-----> 0
+*                               +---------------+--------------+
+*                                       :              :
+*                                       :              :
+*                                       :              :
+*                               +---------------+--------------+
+*                               |               | TailPtr      |-----> 0
+*          [OS_CFG_PRIO_MAX-1]  | NbrEntries=0  +--------------+
+*                               |               | HeadPtr      |-----> 0
+*                               +---------------+--------------+
+*
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_RdyListInit (void)
+{
+    CPU_INT32U    i;
+    OS_RDY_LIST  *p_rdy_list;
+
+
+
+    for (i = 0u; i < OS_CFG_PRIO_MAX; i++) {                    /* Initialize the array of OS_RDY_LIST at each priority */
+        p_rdy_list = &OSRdyList[i];
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_rdy_list->NbrEntries = 0u;
+#endif
+        p_rdy_list->HeadPtr    = DEF_NULL;
+        p_rdy_list->TailPtr    = DEF_NULL;
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                             INSERT TCB IN THE READY LIST
+*
+* Description: This function is called to insert a TCB in the ready list.
+*
+*              The TCB is inserted at the tail of the list if the priority of the TCB is the same as the priority of the
+*              current task.  The TCB is inserted at the head of the list if not.
+*
+* Arguments  : p_tcb     is a pointer to the TCB to insert into the ready list
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_RdyListInsert (OS_TCB  *p_tcb)
+{
+    OS_PrioInsert(p_tcb->Prio);
+    if (p_tcb->Prio == OSPrioCur) {                             /* Are we readying a task at the same prio?             */
+        OS_RdyListInsertTail(p_tcb);                            /* Yes, insert readied task at the end of the list      */
+    } else {
+        OS_RdyListInsertHead(p_tcb);                            /* No,  insert readied task at the beginning of the list*/
+    }
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_READY(p_tcb);                             /* Record the event.                                    */
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                          INSERT TCB AT THE BEGINNING OF A LIST
+*
+* Description: This function is called to place an OS_TCB at the beginning of a linked list as follows:
+*
+*              CASE 0: Insert in an empty list.
+*
+*                     OS_RDY_LIST
+*                     +--------------+
+*                     | TailPtr      |-> 0
+*                     +--------------+
+*                     | HeadPtr      |-> 0
+*                     +--------------+
+*                     | NbrEntries=0 |
+*                     +--------------+
+*
+*
+*
+*              CASE 1: Insert BEFORE the current head of list
+*
+*                     OS_RDY_LIST
+*                     +--------------+          OS_TCB
+*                     | TailPtr      |--+---> +------------+
+*                     +--------------+  |     | NextPtr    |->0
+*                     | HeadPtr      |--/     +------------+
+*                     +--------------+     0<-| PrevPtr    |
+*                     | NbrEntries=1 |        +------------+
+*                     +--------------+        :            :
+*                                             :            :
+*                                             +------------+
+*
+*
+*                     OS_RDY_LIST
+*                     +--------------+
+*                     | TailPtr      |-----------------------------------------------+
+*                     +--------------+          OS_TCB               OS_TCB          |     OS_TCB
+*                     | HeadPtr      |------> +------------+       +------------+    +-> +------------+
+*                     +--------------+        | NextPtr    |------>| NextPtr    | ...... | NextPtr    |->0
+*                     | NbrEntries=N |        +------------+       +------------+        +------------+
+*                     +--------------+     0<-| PrevPtr    |<------| PrevPtr    | ...... | PrevPtr    |
+*                                             +------------+       +------------+        +------------+
+*                                             :            :       :            :        :            :
+*                                             :            :       :            :        :            :
+*                                             +------------+       +------------+        +------------+
+*
+*
+* Arguments  : p_tcb     is the OS_TCB to insert in the list
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_RdyListInsertHead (OS_TCB  *p_tcb)
+{
+    OS_RDY_LIST  *p_rdy_list;
+    OS_TCB       *p_tcb2;
+
+
+
+    p_rdy_list = &OSRdyList[p_tcb->Prio];
+    if (p_rdy_list->HeadPtr == DEF_NULL) {                      /* CASE 0: Insert when there are no entries             */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_rdy_list->NbrEntries =  1u;                           /* This is the first entry                              */
+#endif
+        p_tcb->NextPtr         =  DEF_NULL;                     /* No other OS_TCBs in the list                         */
+        p_tcb->PrevPtr         =  DEF_NULL;
+        p_rdy_list->HeadPtr    =  p_tcb;                        /* Both list pointers point to this OS_TCB              */
+        p_rdy_list->TailPtr    =  p_tcb;
+    } else {                                                    /* CASE 1: Insert BEFORE the current head of list       */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_rdy_list->NbrEntries++;                               /* One more OS_TCB in the list                          */
+#endif
+        p_tcb->NextPtr         = p_rdy_list->HeadPtr;           /* Adjust new OS_TCBs links                             */
+        p_tcb->PrevPtr         = DEF_NULL;
+        p_tcb2                 = p_rdy_list->HeadPtr;           /* Adjust old head of list's links                      */
+        p_tcb2->PrevPtr        = p_tcb;
+        p_rdy_list->HeadPtr    = p_tcb;
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                           INSERT TCB AT THE END OF A LIST
+*
+* Description: This function is called to place an OS_TCB at the end of a linked list as follows:
+*
+*              CASE 0: Insert in an empty list.
+*
+*                     OS_RDY_LIST
+*                     +--------------+
+*                     | TailPtr      |-> 0
+*                     +--------------+
+*                     | HeadPtr      |-> 0
+*                     +--------------+
+*                     | NbrEntries=0 |
+*                     +--------------+
+*
+*
+*
+*              CASE 1: Insert AFTER the current tail of list
+*
+*                     OS_RDY_LIST
+*                     +--------------+          OS_TCB
+*                     | TailPtr      |--+---> +------------+
+*                     +--------------+  |     | NextPtr    |->0
+*                     | HeadPtr      |--/     +------------+
+*                     +--------------+     0<-| PrevPtr    |
+*                     | NbrEntries=1 |        +------------+
+*                     +--------------+        :            :
+*                                             :            :
+*                                             +------------+
+*
+*
+*                     OS_RDY_LIST
+*                     +--------------+
+*                     | TailPtr      |-----------------------------------------------+
+*                     +--------------+          OS_TCB               OS_TCB          |     OS_TCB
+*                     | HeadPtr      |------> +------------+       +------------+    +-> +------------+
+*                     +--------------+        | NextPtr    |------>| NextPtr    | ...... | NextPtr    |->0
+*                     | NbrEntries=N |        +------------+       +------------+        +------------+
+*                     +--------------+     0<-| PrevPtr    |<------| PrevPtr    | ...... | PrevPtr    |
+*                                             +------------+       +------------+        +------------+
+*                                             :            :       :            :        :            :
+*                                             :            :       :            :        :            :
+*                                             +------------+       +------------+        +------------+
+*
+*
+* Arguments  : p_tcb     is the OS_TCB to insert in the list
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_RdyListInsertTail (OS_TCB  *p_tcb)
+{
+    OS_RDY_LIST  *p_rdy_list;
+    OS_TCB       *p_tcb2;
+
+
+
+    p_rdy_list = &OSRdyList[p_tcb->Prio];
+    if (p_rdy_list->HeadPtr == DEF_NULL) {                      /* CASE 0: Insert when there are no entries             */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_rdy_list->NbrEntries  = 1u;                           /* This is the first entry                              */
+#endif
+        p_tcb->NextPtr          = DEF_NULL;                     /* No other OS_TCBs in the list                         */
+        p_tcb->PrevPtr          = DEF_NULL;
+        p_rdy_list->HeadPtr     = p_tcb;                        /* Both list pointers point to this OS_TCB              */
+        p_rdy_list->TailPtr     = p_tcb;
+    } else {                                                    /* CASE 1: Insert AFTER the current tail of list        */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_rdy_list->NbrEntries++;                               /* One more OS_TCB in the list                          */
+#endif
+        p_tcb->NextPtr          = DEF_NULL;                     /* Adjust new OS_TCBs links                             */
+        p_tcb2                  = p_rdy_list->TailPtr;
+        p_tcb->PrevPtr          = p_tcb2;
+        p_tcb2->NextPtr         = p_tcb;                        /* Adjust old tail of list's links                      */
+        p_rdy_list->TailPtr     = p_tcb;
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                                MOVE TCB AT HEAD TO TAIL
+*
+* Description: This function is called to move the current head of a list to the tail of the list.
+*
+*
+*              CASE 0: TCB list is empty, nothing to do.
+*
+*              CASE 1: Only 1 OS_TCB  in the list, nothing to do.
+*
+*              CASE 2: Only 2 OS_TCBs in the list.
+*
+*                     OS_RDY_LIST
+*                     +--------------+
+*                     | TailPtr      |--------------------------+
+*                     +--------------+          OS_TCB          |     OS_TCB
+*                     | HeadPtr      |------> +------------+    +-> +------------+
+*                     +--------------+        | NextPtr    |------> | NextPtr    |->0
+*                     | NbrEntries=2 |        +------------+        +------------+
+*                     +--------------+     0<-| PrevPtr    | <------| PrevPtr    |
+*                                             +------------+        +------------+
+*                                             :            :        :            :
+*                                             :            :        :            :
+*                                             +------------+        +------------+
+*
+*
+*              CASE N: More than 2 OS_TCBs in the list.
+*
+*                     OS_RDY_LIST
+*                     +--------------+
+*                     | TailPtr      |-----------------------------------------------+
+*                     +--------------+          OS_TCB               OS_TCB          |     OS_TCB
+*                     | HeadPtr      |------> +------------+       +------------+    +-> +------------+
+*                     +--------------+        | NextPtr    |------>| NextPtr    | ...... | NextPtr    |->0
+*                     | NbrEntries=N |        +------------+       +------------+        +------------+
+*                     +--------------+     0<-| PrevPtr    |<------| PrevPtr    | ...... | PrevPtr    |
+*                                             +------------+       +------------+        +------------+
+*                                             :            :       :            :        :            :
+*                                             :            :       :            :        :            :
+*                                             +------------+       +------------+        +------------+
+*
+*
+* Arguments  : p_list    is a pointer to the OS_RDY_LIST where the OS_TCB will be inserted
+*              ------
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_RdyListMoveHeadToTail (OS_RDY_LIST  *p_rdy_list)
+{
+    OS_TCB  *p_tcb1;
+    OS_TCB  *p_tcb2;
+    OS_TCB  *p_tcb3;
+
+
+     if (p_rdy_list->HeadPtr != p_rdy_list->TailPtr) {
+         if (p_rdy_list->HeadPtr->NextPtr == p_rdy_list->TailPtr) { /* SWAP the TCBs                                    */
+             p_tcb1              = p_rdy_list->HeadPtr;         /* Point to current head                                */
+             p_tcb2              = p_rdy_list->TailPtr;         /* Point to current tail                                */
+             p_tcb1->PrevPtr     = p_tcb2;
+             p_tcb1->NextPtr     = DEF_NULL;
+             p_tcb2->PrevPtr     = DEF_NULL;
+             p_tcb2->NextPtr     = p_tcb1;
+             p_rdy_list->HeadPtr = p_tcb2;
+             p_rdy_list->TailPtr = p_tcb1;
+         } else {
+             p_tcb1              = p_rdy_list->HeadPtr;         /* Point to current head                                */
+             p_tcb2              = p_rdy_list->TailPtr;         /* Point to current tail                                */
+             p_tcb3              = p_tcb1->NextPtr;             /* Point to new list head                               */
+             p_tcb3->PrevPtr     = DEF_NULL;                    /* Adjust back    link of new list head                 */
+             p_tcb1->NextPtr     = DEF_NULL;                    /* Adjust forward link of new list tail                 */
+             p_tcb1->PrevPtr     = p_tcb2;                      /* Adjust back    link of new list tail                 */
+             p_tcb2->NextPtr     = p_tcb1;                      /* Adjust forward link of old list tail                 */
+             p_rdy_list->HeadPtr = p_tcb3;                      /* Adjust new list head and tail pointers               */
+             p_rdy_list->TailPtr = p_tcb1;
+         }
+     }
+}
+
+
+/*
+************************************************************************************************************************
+*                                REMOVE TCB FROM LIST KNOWING ONLY WHICH OS_TCB TO REMOVE
+*
+* Description: This function is called to remove an OS_TCB from an OS_RDY_LIST knowing the address of the OS_TCB to
+*              remove.
+*
+*
+*              CASE 0: TCB list is empty, nothing to do.
+*
+*              CASE 1: Only 1 OS_TCBs in the list.
+*
+*                     OS_RDY_LIST
+*                     +--------------+          OS_TCB
+*                     | TailPtr      |--+---> +------------+
+*                     +--------------+  |     | NextPtr    |->0
+*                     | HeadPtr      |--/     +------------+
+*                     +--------------+     0<-| PrevPtr    |
+*                     | NbrEntries=1 |        +------------+
+*                     +--------------+        :            :
+*                                             :            :
+*                                             +------------+
+*
+*              CASE N: Two or more OS_TCBs in the list.
+*
+*                     OS_RDY_LIST
+*                     +--------------+
+*                     | TailPtr      |-----------------------------------------------+
+*                     +--------------+          OS_TCB               OS_TCB          |     OS_TCB
+*                     | HeadPtr      |------> +------------+       +------------+    +-> +------------+
+*                     +--------------+        | NextPtr    |------>| NextPtr    | ...... | NextPtr    |->0
+*                     | NbrEntries=N |        +------------+       +------------+        +------------+
+*                     +--------------+     0<-| PrevPtr    |<------| PrevPtr    | ...... | PrevPtr    |
+*                                             +------------+       +------------+        +------------+
+*                                             :            :       :            :        :            :
+*                                             :            :       :            :        :            :
+*                                             +------------+       +------------+        +------------+
+*
+*
+* Arguments  : p_tcb    is a pointer to the OS_TCB to remove
+*              -----
+*
+* Returns    : A pointer to the OS_RDY_LIST where the OS_TCB was
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_RdyListRemove (OS_TCB  *p_tcb)
+{
+    OS_RDY_LIST  *p_rdy_list;
+    OS_TCB       *p_tcb1;
+    OS_TCB       *p_tcb2;
+
+
+
+    p_rdy_list = &OSRdyList[p_tcb->Prio];
+    p_tcb1     = p_tcb->PrevPtr;                                /* Point to next and previous OS_TCB in the list        */
+    p_tcb2     = p_tcb->NextPtr;
+    if (p_tcb1 == DEF_NULL) {                                   /* Was the OS_TCB to remove at the head?                */
+        if (p_tcb2 == DEF_NULL) {                               /* Yes, was it the only OS_TCB?                         */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+            p_rdy_list->NbrEntries = 0u;                        /* Yes, no more entries                                 */
+#endif
+            p_rdy_list->HeadPtr    = DEF_NULL;
+            p_rdy_list->TailPtr    = DEF_NULL;
+            OS_PrioRemove(p_tcb->Prio);
+        } else {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+            p_rdy_list->NbrEntries--;                           /* No,  one less entry                                  */
+#endif
+            p_tcb2->PrevPtr     = DEF_NULL;                     /* adjust back link of new list head                    */
+            p_rdy_list->HeadPtr = p_tcb2;                       /* adjust OS_RDY_LIST's new head                        */
+        }
+    } else {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_rdy_list->NbrEntries--;                               /* No,  one less entry                                  */
+#endif
+        p_tcb1->NextPtr = p_tcb2;
+        if (p_tcb2 == DEF_NULL) {
+            p_rdy_list->TailPtr = p_tcb1;                       /* Removing the TCB at the tail, adj the tail ptr       */
+        } else {
+            p_tcb2->PrevPtr     = p_tcb1;
+        }
+    }
+    p_tcb->PrevPtr = DEF_NULL;
+    p_tcb->NextPtr = DEF_NULL;
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_TASK_SUSPEND(p_tcb);                               /* Record the event.                                    */
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                             SCHEDULE THE ISR HANDLER TASK
+*
+* Description: This function is called by other uC/OS-III services to schedule task at priority 0 which is always the
+*              ISR handler task.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+*
+*              2) This function is DEPRECATED, see OS_IntQPost() note 1 for details.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+void  OS_Sched0 (void)
+{
+    CPU_SR_ALLOC();
+
+
+
+    CPU_INT_DIS();
+    OSPrioHighRdy   =  0u;                                      /* Force the priority to 0                              */
+    OSTCBHighRdyPtr = &OSIntQTaskTCB;                           /* Always schedule the ISR handler task                 */
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+    OSTCBHighRdyPtr->CtxSwCtr++;                                /* Inc. # of context switches to this task              */
+#endif
+#if ((OS_CFG_TASK_PROFILE_EN == DEF_ENABLED) || (OS_CFG_DBG_EN == DEF_ENABLED))
+    OSTaskCtxSwCtr++;                                           /* Increment context switch counter                     */
+#endif
+    OS_TASK_SW();                                               /* Perform a task level context switch                  */
+    CPU_INT_EN();
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                               SCHEDULER LOCK TIME MEASUREMENT
+*
+* Description: These functions are used to measure the peak amount of time that the scheduler is locked
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : 1) The are internal functions to uC/OS-III and MUST not be called by your application code.
+*
+*              2) It's assumed that these functions are called when interrupts are disabled.
+*
+*              3) We are reading the CPU_TS_TmrRd() directly even if this is a 16-bit timer.  The reason is that we
+*                 don't expect to have the scheduler locked for 65536 counts even at the rate the TS timer is updated.
+*                 In other words, locking the scheduler for longer than 65536 count would not be a good thing for a
+*                 real-time system.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+void  OS_SchedLockTimeMeasStart (void)
+{
+    if (OSSchedLockNestingCtr == 1u) {
+        OSSchedLockTimeBegin = CPU_TS_TmrRd();
+    }
+}
+
+
+
+
+void  OS_SchedLockTimeMeasStop (void)
+{
+    CPU_TS_TMR  delta;
+
+
+    if (OSSchedLockNestingCtr == 0u) {                          /* Make sure we fully un-nested scheduler lock          */
+        delta = CPU_TS_TmrRd()                                  /* Compute the delta time between begin and end         */
+              - OSSchedLockTimeBegin;
+        if (OSSchedLockTimeMax    < delta) {                    /* Detect peak value                                    */
+            OSSchedLockTimeMax    = delta;
+        }
+        if (OSSchedLockTimeMaxCur < delta) {                    /* Detect peak value (for resettable value)             */
+            OSSchedLockTimeMaxCur = delta;
+        }
+    }
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                        RUN ROUND-ROBIN SCHEDULING ALGORITHM
+*
+* Description: This function is called on every tick to determine if a new task at the same priority needs to execute.
+*
+*
+* Arguments  : p_rdy_list    is a pointer to the OS_RDY_LIST entry of the ready list at the current priority
+*              ----------
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+void  OS_SchedRoundRobin (OS_RDY_LIST  *p_rdy_list)
+{
+    OS_TCB   *p_tcb;
+    CPU_SR_ALLOC();
+
+
+    if (OSSchedRoundRobinEn != DEF_TRUE) {                      /* Make sure round-robin has been enabled               */
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();
+    p_tcb = p_rdy_list->HeadPtr;                                /* Decrement time quanta counter                        */
+
+    if (p_tcb == DEF_NULL) {
+        CPU_CRITICAL_EXIT();
+        return;
+    }
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+    if (p_tcb == &OSIdleTaskTCB) {
+        CPU_CRITICAL_EXIT();
+        return;
+    }
+#endif
+
+    if (p_tcb->TimeQuantaCtr > 0u) {
+        p_tcb->TimeQuantaCtr--;
+    }
+
+    if (p_tcb->TimeQuantaCtr > 0u) {                            /* Task not done with its time quanta                   */
+        CPU_CRITICAL_EXIT();
+        return;
+    }
+
+    if (p_rdy_list->HeadPtr == p_rdy_list->TailPtr) {           /* See if it's time to time slice current task          */
+        CPU_CRITICAL_EXIT();                                    /* ... only if multiple tasks at same priority          */
+        return;
+    }
+
+    if (OSSchedLockNestingCtr > 0u) {                           /* Can't round-robin if the scheduler is locked         */
+        CPU_CRITICAL_EXIT();
+        return;
+    }
+
+    OS_RdyListMoveHeadToTail(p_rdy_list);                       /* Move current OS_TCB to the end of the list           */
+    p_tcb = p_rdy_list->HeadPtr;                                /* Point to new OS_TCB at head of the list              */
+    if (p_tcb->TimeQuanta == 0u) {                              /* See if we need to use the default time slice         */
+        p_tcb->TimeQuantaCtr = OSSchedRoundRobinDfltTimeQuanta;
+    } else {
+        p_tcb->TimeQuantaCtr = p_tcb->TimeQuanta;               /* Load time slice counter with new time                */
+    }
+    CPU_CRITICAL_EXIT();
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                     BLOCK A TASK
+*
+* Description: This function is called to remove a task from the ready list and also insert it in the timer tick list if
+*              the specified timeout is non-zero.
+*
+* Arguments  : p_tcb          is a pointer to the OS_TCB of the task block
+*              -----
+*
+*              timeout        is the desired timeout
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_TaskBlock (OS_TCB   *p_tcb,
+                    OS_TICK   timeout)
+{
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+        OS_TICK tick_ctr;
+#endif
+
+
+    if (timeout > 0u) {                                         /* Add task to tick list if timeout non zero            */
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+        tick_ctr = BSP_OS_TickGet();
+        OS_TickListInsert(&OSTickListTimeout, p_tcb, timeout + (tick_ctr - OSTickCtr));
+#else
+        OS_TickListInsert(&OSTickListTimeout, p_tcb, timeout);
+#endif
+        p_tcb->TaskState = OS_TASK_STATE_PEND_TIMEOUT;
+    } else {
+        p_tcb->TaskState = OS_TASK_STATE_PEND;
+    }
+#else
+    p_tcb->TaskState = OS_TASK_STATE_PEND;
+#endif
+    OS_RdyListRemove(p_tcb);
+}
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_dbg.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_dbg.c
new file mode 100644
index 0000000..85f57b7
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_dbg.c
@@ -0,0 +1,537 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                  DEBUGGER CONSTANTS
+*
+* File    : OS_DBG.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_dbg__c = "$Id: $";
+#endif
+
+CPU_INT08U  const  OSDbg_DbgEn                 = OS_CFG_DBG_EN;                /* Debug constants are defined below   */
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+
+/*
+************************************************************************************************************************
+*                                                      DEBUG DATA
+************************************************************************************************************************
+*/
+
+CPU_INT08U  const  OSDbg_ArgChkEn              = OS_CFG_ARG_CHK_EN;
+CPU_INT08U  const  OSDbg_AppHooksEn            = OS_CFG_APP_HOOKS_EN;
+
+CPU_INT32U  const  OSDbg_EndiannessTest        = 0x12345678LU;                 /* Variable to test CPU endianness     */
+
+CPU_INT08U  const  OSDbg_CalledFromISRChkEn    = OS_CFG_CALLED_FROM_ISR_CHK_EN;
+
+CPU_INT08U  const  OSDbg_FlagEn                = OS_CFG_FLAG_EN;
+OS_FLAG_GRP const  OSDbg_FlagGrp               = { 0u };
+#if (OS_CFG_FLAG_EN == DEF_ENABLED)
+CPU_INT08U  const  OSDbg_FlagDelEn             = OS_CFG_FLAG_DEL_EN;
+CPU_INT08U  const  OSDbg_FlagModeClrEn         = OS_CFG_FLAG_MODE_CLR_EN;
+CPU_INT08U  const  OSDbg_FlagPendAbortEn       = OS_CFG_FLAG_PEND_ABORT_EN;
+CPU_INT16U  const  OSDbg_FlagGrpSize           = sizeof(OS_FLAG_GRP);          /* Size in Bytes of OS_FLAG_GRP        */
+CPU_INT16U  const  OSDbg_FlagWidth             = sizeof(OS_FLAGS);             /* Width (in bytes) of OS_FLAGS        */
+#else
+CPU_INT08U  const  OSDbg_FlagDelEn             = 0u;
+CPU_INT08U  const  OSDbg_FlagModeClrEn         = 0u;
+CPU_INT08U  const  OSDbg_FlagPendAbortEn       = 0u;
+CPU_INT16U  const  OSDbg_FlagGrpSize           = 0u;
+CPU_INT16U  const  OSDbg_FlagWidth             = 0u;
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+CPU_INT16U  const  OSDbg_IntQ                  = sizeof(OS_INT_Q);
+#else
+CPU_INT16U  const  OSDbg_IntQ                  = 0u;
+#endif
+
+CPU_INT08U  const  OSDbg_ISRPostDeferredEn     = OS_CFG_ISR_POST_DEFERRED_EN;
+
+OS_MEM      const  OSDbg_Mem                   = { 0u };
+CPU_INT08U  const  OSDbg_MemEn                 = OS_CFG_MEM_EN;
+#if OS_CFG_MEM_EN > 0u
+CPU_INT16U  const  OSDbg_MemSize               = sizeof(OS_MEM);               /* Mem. Partition header size (bytes)  */
+#else
+CPU_INT16U  const  OSDbg_MemSize               = 0u;
+#endif
+
+
+#if (OS_MSG_EN == DEF_ENABLED)
+CPU_INT08U  const  OSDbg_MsgEn                 = 1u;
+CPU_INT16U  const  OSDbg_MsgSize               = sizeof(OS_MSG);               /* OS_MSG size                         */
+CPU_INT16U  const  OSDbg_MsgPoolSize           = sizeof(OS_MSG_POOL);
+CPU_INT16U  const  OSDbg_MsgQSize              = sizeof(OS_MSG_Q);
+#else
+CPU_INT08U  const  OSDbg_MsgEn                 = 0u;
+CPU_INT16U  const  OSDbg_MsgSize               = 0u;
+CPU_INT16U  const  OSDbg_MsgPoolSize           = 0u;
+CPU_INT16U  const  OSDbg_MsgQSize              = 0u;
+#endif
+
+
+OS_MUTEX    const  OSDbg_Mutex                 = { 0u };
+CPU_INT08U  const  OSDbg_MutexEn               = OS_CFG_MUTEX_EN;
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+CPU_INT08U  const  OSDbg_MutexDelEn            = OS_CFG_MUTEX_DEL_EN;
+CPU_INT08U  const  OSDbg_MutexPendAbortEn      = OS_CFG_MUTEX_PEND_ABORT_EN;
+CPU_INT16U  const  OSDbg_MutexSize             = sizeof(OS_MUTEX);             /* Size in bytes of OS_MUTEX           */
+#else
+CPU_INT08U  const  OSDbg_MutexDelEn            = 0u;
+CPU_INT08U  const  OSDbg_MutexPendAbortEn      = 0u;
+CPU_INT16U  const  OSDbg_MutexSize             = 0u;
+#endif
+
+CPU_INT08U  const  OSDbg_ObjTypeChkEn          = OS_CFG_OBJ_TYPE_CHK_EN;
+
+
+CPU_INT08U  const  OSDbg_PendMultiEn           = OS_CFG_PEND_MULTI_EN;
+CPU_INT16U  const  OSDbg_PendDataSize          = sizeof(OS_PEND_DATA);
+CPU_INT16U  const  OSDbg_PendListSize          = sizeof(OS_PEND_LIST);
+CPU_INT16U  const  OSDbg_PendObjSize           = sizeof(OS_PEND_OBJ);
+
+
+CPU_INT16U  const  OSDbg_PrioMax               = OS_CFG_PRIO_MAX;              /* Maximum number of priorities        */
+CPU_INT16U  const  OSDbg_PrioTblSize           = sizeof(OSPrioTbl);
+
+CPU_INT16U  const  OSDbg_PtrSize               = sizeof(void *);               /* Size in Bytes of a pointer          */
+
+
+OS_Q        const  OSDbg_Q                     = { 0u };
+CPU_INT08U  const  OSDbg_QEn                   = OS_CFG_Q_EN;
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+CPU_INT08U  const  OSDbg_QDelEn                = OS_CFG_Q_DEL_EN;
+CPU_INT08U  const  OSDbg_QFlushEn              = OS_CFG_Q_FLUSH_EN;
+CPU_INT08U  const  OSDbg_QPendAbortEn          = OS_CFG_Q_PEND_ABORT_EN;
+CPU_INT16U  const  OSDbg_QSize                 = sizeof(OS_Q);                 /* Size in bytes of OS_Q structure     */
+#else
+CPU_INT08U  const  OSDbg_QDelEn                = 0u;
+CPU_INT08U  const  OSDbg_QFlushEn              = 0u;
+CPU_INT08U  const  OSDbg_QPendAbortEn          = 0u;
+CPU_INT16U  const  OSDbg_QSize                 = 0u;
+#endif
+
+
+CPU_INT08U  const  OSDbg_SchedRoundRobinEn     = OS_CFG_SCHED_ROUND_ROBIN_EN;
+
+
+OS_SEM      const  OSDbg_Sem                   = { 0u };
+CPU_INT08U  const  OSDbg_SemEn                 = OS_CFG_SEM_EN;
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+CPU_INT08U  const  OSDbg_SemDelEn              = OS_CFG_SEM_DEL_EN;
+CPU_INT08U  const  OSDbg_SemPendAbortEn        = OS_CFG_SEM_PEND_ABORT_EN;
+CPU_INT08U  const  OSDbg_SemSetEn              = OS_CFG_SEM_SET_EN;
+CPU_INT16U  const  OSDbg_SemSize               = sizeof(OS_SEM);               /* Size in bytes of OS_SEM             */
+#else
+CPU_INT08U  const  OSDbg_SemDelEn              = 0u;
+CPU_INT08U  const  OSDbg_SemPendAbortEn        = 0u;
+CPU_INT08U  const  OSDbg_SemSetEn              = 0u;
+CPU_INT16U  const  OSDbg_SemSize               = 0u;
+#endif
+
+
+CPU_INT16U  const  OSDbg_RdyList               = sizeof(OS_RDY_LIST);
+CPU_INT32U  const  OSDbg_RdyListSize           = sizeof(OSRdyList);            /* Number of bytes in the ready table  */
+
+CPU_INT08U  const  OSDbg_StkWidth              = sizeof(CPU_STK);
+
+CPU_INT08U  const  OSDbg_StatTaskEn            = OS_CFG_STAT_TASK_EN;
+CPU_INT08U  const  OSDbg_StatTaskStkChkEn      = OS_CFG_STAT_TASK_STK_CHK_EN;
+
+CPU_INT08U  const  OSDbg_TaskChangePrioEn      = OS_CFG_TASK_CHANGE_PRIO_EN;
+CPU_INT08U  const  OSDbg_TaskDelEn             = OS_CFG_TASK_DEL_EN;
+CPU_INT08U  const  OSDbg_TaskQEn               = OS_CFG_TASK_Q_EN;
+CPU_INT08U  const  OSDbg_TaskQPendAbortEn      = OS_CFG_TASK_Q_PEND_ABORT_EN;
+CPU_INT08U  const  OSDbg_TaskProfileEn         = OS_CFG_TASK_PROFILE_EN;
+CPU_INT16U  const  OSDbg_TaskRegTblSize        = OS_CFG_TASK_REG_TBL_SIZE;
+CPU_INT08U  const  OSDbg_TaskSemPendAbortEn    = OS_CFG_TASK_SEM_PEND_ABORT_EN;
+CPU_INT08U  const  OSDbg_TaskSuspendEn         = OS_CFG_TASK_SUSPEND_EN;
+
+
+CPU_INT16U  const  OSDbg_TCBSize               = sizeof(OS_TCB);               /* Size in Bytes of OS_TCB             */
+
+CPU_INT16U  const  OSDbg_TickListSize          = sizeof(OS_TICK_LIST);
+
+CPU_INT08U  const  OSDbg_TimeDlyHMSMEn         = OS_CFG_TIME_DLY_HMSM_EN;
+CPU_INT08U  const  OSDbg_TimeDlyResumeEn       = OS_CFG_TIME_DLY_RESUME_EN;
+
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+CPU_INT16U  const  OSDbg_TLS_TblSize           = OS_CFG_TLS_TBL_SIZE * sizeof(OS_TLS);
+#else
+CPU_INT16U  const  OSDbg_TLS_TblSize           = 0u;
+#endif
+
+
+OS_TMR      const  OSDbg_Tmr                   = { 0u };
+CPU_INT08U  const  OSDbg_TmrEn                 = OS_CFG_TMR_EN;
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+CPU_INT08U  const  OSDbg_TmrDelEn              = OS_CFG_TMR_DEL_EN;
+CPU_INT16U  const  OSDbg_TmrSize               = sizeof(OS_TMR);
+#else
+CPU_INT08U  const  OSDbg_TmrDelEn              = 0u;
+CPU_INT16U  const  OSDbg_TmrSize               = 0u;
+#endif
+
+CPU_INT16U  const  OSDbg_VersionNbr            = OS_VERSION;
+
+
+/*
+************************************************************************************************************************
+*                                                      DEBUG DATA
+*                                     TOTAL DATA SPACE (i.e. RAM) USED BY uC/OS-III
+************************************************************************************************************************
+*/
+
+CPU_INT32U  const  OSDbg_DataSize = sizeof(OSIntNestingCtr)
+
+#if (OS_CFG_APP_HOOKS_EN == DEF_ENABLED)
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+                                  + sizeof(OS_AppRedzoneHitHookPtr)
+#endif
+                                  + sizeof(OS_AppTaskCreateHookPtr)
+                                  + sizeof(OS_AppTaskDelHookPtr)
+                                  + sizeof(OS_AppTaskReturnHookPtr)
+
+                                  + sizeof(OS_AppIdleTaskHookPtr)
+                                  + sizeof(OS_AppStatTaskHookPtr)
+                                  + sizeof(OS_AppTaskSwHookPtr)
+                                  + sizeof(OS_AppTimeTickHookPtr)
+#endif
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                                  + sizeof(OSIdleTaskCtr)
+#endif
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+                                  + sizeof(OSIdleTaskTCB)
+#endif
+
+#ifdef CPU_CFG_INT_DIS_MEAS_EN
+                                  + sizeof(OSIntDisTimeMax)
+#endif
+
+#if OS_CFG_ISR_POST_DEFERRED_EN > 0u
+                                  + sizeof(OSIntQInPtr)
+                                  + sizeof(OSIntQOutPtr)
+                                  + sizeof(OSIntQNbrEntries)
+                                  + sizeof(OSIntQNbrEntriesMax)
+                                  + sizeof(OSIntQOvfCtr)
+                                  + sizeof(OSIntQTaskTCB)
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                                  + sizeof(OSIntQTaskTimeMax)
+#endif
+#endif
+
+                                  + sizeof(OSRunning)
+                                  + sizeof(OSInitialized)
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+                                  + sizeof(OSSafetyCriticalStartFlag)
+#endif
+
+#if (OS_CFG_FLAG_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                                  + sizeof(OSFlagDbgListPtr)
+                                  + sizeof(OSFlagQty)
+#endif
+#endif
+
+#if (OS_CFG_MON_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                                  + sizeof(OSMonDbgListPtr)
+                                  + sizeof(OSMonQty)
+#endif
+#endif
+
+#if (OS_CFG_MEM_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                                  + sizeof(OSMemDbgListPtr)
+                                  + sizeof(OSMemQty)
+#endif
+#endif
+
+#if (OS_MSG_EN == DEF_ENABLED)
+                                  + sizeof(OSMsgPool)
+#endif
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                                  + sizeof(OSMutexDbgListPtr)
+                                  + sizeof(OSMutexQty)
+#endif
+#endif
+
+                                  + sizeof(OSPrioCur)
+                                  + sizeof(OSPrioHighRdy)
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+                                  + sizeof(OSPrioSaved)
+#endif
+                                  + sizeof(OSPrioTbl)
+
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                                  + sizeof(OSQDbgListPtr)
+                                  + sizeof(OSQQty)
+#endif
+#endif
+
+                                  + sizeof(OSRdyList)
+
+                                  + sizeof(OSSchedLockNestingCtr)
+
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+                                  + sizeof(OSSchedLockTimeBegin)
+                                  + sizeof(OSSchedLockTimeMax)
+                                  + sizeof(OSSchedLockTimeMaxCur)
+#endif
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+                                  + sizeof(OSSchedRoundRobinDfltTimeQuanta)
+                                  + sizeof(OSSchedRoundRobinEn)
+#endif
+
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                                  + sizeof(OSSemDbgListPtr)
+#endif
+                                  + sizeof(OSSemQty)
+#endif
+#if ((OS_CFG_TASK_PROFILE_EN == DEF_ENABLED) || (OS_CFG_DBG_EN == DEF_ENABLED))
+                                  + sizeof(OSTaskCtxSwCtr)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                                  + sizeof(OSTaskDbgListPtr)
+#endif
+#endif
+
+                                  + sizeof(OSTaskQty)
+
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+                                  + sizeof(OSStatResetFlag)
+                                  + sizeof(OSStatTaskCPUUsage)
+                                  + sizeof(OSStatTaskCPUUsageMax)
+                                  + sizeof(OSStatTaskCtr)
+                                  + sizeof(OSStatTaskCtrMax)
+                                  + sizeof(OSStatTaskCtrRun)
+                                  + sizeof(OSStatTaskRdy)
+                                  + sizeof(OSStatTaskTCB)
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                                  + sizeof(OSStatTaskTimeMax)
+#endif
+#endif
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+                                  + sizeof(OSTickCtr)
+                                  + sizeof(OSTickTaskTCB)
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                                  + sizeof(OSTickTaskTimeMax)
+#endif
+                                  + sizeof(OSTickListDly)
+                                  + sizeof(OSTickListTimeout)
+#endif
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                                  + sizeof(OSTmrDbgListPtr)
+                                  + sizeof(OSTmrListEntries)
+#endif
+                                  + sizeof(OSTmrListPtr)
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+                                  + sizeof(OSTmrMutex)
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                                  + sizeof(OSTmrQty)
+#endif
+                                  + sizeof(OSTmrTaskTCB)
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                                  + sizeof(OSTmrTaskTimeMax)
+#endif
+                                  + sizeof(OSTmrTickCtr)
+                                  + sizeof(OSTmrUpdateCnt)
+                                  + sizeof(OSTmrUpdateCtr)
+#endif
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+                                  + sizeof(OSTaskRegNextAvailID)
+#endif
+
+                                  + sizeof(OSTCBCurPtr)
+                                  + sizeof(OSTCBHighRdyPtr);
+
+
+/*
+************************************************************************************************************************
+*                                               OS DEBUG INITIALIZATION
+*
+* Description: This function is used to make sure that debug variables that are unused in the application are not
+*              optimized away.  This function might not be necessary for all compilers.  In this case, you should simply
+*              DELETE the code in this function while still leaving the declaration of the function itself.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : (1) This code doesn't do anything, it simply prevents the compiler from optimizing out the 'const'
+*                  variables which are declared in this file.
+*              (2) You may decide to 'compile out' the code (by using #if 0/#endif) INSIDE the function if your compiler
+*                  DOES NOT optimize out the 'const' variables above.
+************************************************************************************************************************
+*/
+
+void  OS_Dbg_Init (void)
+{
+    CPU_INT08U const  *p_temp08;
+    CPU_INT16U const  *p_temp16;
+    CPU_INT32U const  *p_temp32;
+
+
+    p_temp08 = (CPU_INT08U const *)&OSDbg_DbgEn;
+
+    p_temp32 = (CPU_INT32U const *)&OSDbg_DataSize;
+
+    p_temp08 = (CPU_INT08U const *)&OSDbg_ArgChkEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_AppHooksEn;
+
+    p_temp32 = (CPU_INT32U const *)&OSDbg_EndiannessTest;
+
+    p_temp08 = (CPU_INT08U const *)&OSDbg_CalledFromISRChkEn;
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_FlagGrp;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_FlagEn;
+#if (OS_CFG_FLAG_EN == DEF_ENABLED)
+    p_temp08 = (CPU_INT08U const *)&OSDbg_FlagDelEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_FlagModeClrEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_FlagPendAbortEn;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_FlagGrpSize;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_FlagWidth;
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    p_temp16 = (CPU_INT16U const *)&OSDbg_IntQ;
+#endif
+
+    p_temp08 = (CPU_INT08U const *)&OSDbg_ISRPostDeferredEn;
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_Mem;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_MemEn;
+#if (OS_CFG_MEM_EN == DEF_ENABLED)
+    p_temp16 = (CPU_INT16U const *)&OSDbg_MemSize;
+#endif
+
+    p_temp08 = (CPU_INT08U const *)&OSDbg_MsgEn;
+#if (OS_MSG_EN == DEF_ENABLED)
+    p_temp16 = (CPU_INT16U const *)&OSDbg_MsgSize;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_MsgPoolSize;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_MsgQSize;
+#endif
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_Mutex;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_MutexEn;
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    p_temp08 = (CPU_INT08U const *)&OSDbg_MutexDelEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_MutexPendAbortEn;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_MutexSize;
+#endif
+
+    p_temp08 = (CPU_INT08U const *)&OSDbg_ObjTypeChkEn;
+
+    p_temp08 = (CPU_INT08U const *)&OSDbg_PendMultiEn;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_PendDataSize;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_PendListSize;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_PendObjSize;
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_PrioMax;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_PrioTblSize;
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_PtrSize;
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_Q;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_QEn;
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+    p_temp08 = (CPU_INT08U const *)&OSDbg_QDelEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_QFlushEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_QPendAbortEn;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_QSize;
+#endif
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_SchedRoundRobinEn;
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_Sem;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_SemEn;
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+    p_temp08 = (CPU_INT08U const *)&OSDbg_SemDelEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_SemPendAbortEn;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_SemSetEn;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_SemSize;
+#endif
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_RdyList;
+    p_temp32 = (CPU_INT32U const *)&OSDbg_RdyListSize;
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_StkWidth;
+
+    p_temp08 = (CPU_INT08U const *)&OSDbg_StatTaskEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_StatTaskStkChkEn;
+
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TaskChangePrioEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TaskDelEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TaskQEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TaskQPendAbortEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TaskProfileEn;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_TaskRegTblSize;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TaskSemPendAbortEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TaskSuspendEn;
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_TCBSize;
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_TickListSize;
+
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TimeDlyHMSMEn;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TimeDlyResumeEn;
+
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_Tmr;
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TmrEn;
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+    p_temp08 = (CPU_INT08U const *)&OSDbg_TmrDelEn;
+    p_temp16 = (CPU_INT16U const *)&OSDbg_TmrSize;
+#endif
+
+    p_temp16 = (CPU_INT16U const *)&OSDbg_VersionNbr;
+
+    p_temp08 = p_temp08;                                     /* Prevent compiler warning for not using 'p_temp'        */
+    p_temp16 = p_temp16;
+    p_temp32 = p_temp32;
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_flag.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_flag.c
new file mode 100644
index 0000000..484015e
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_flag.c
@@ -0,0 +1,1412 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                EVENT FLAG MANAGEMENT
+*
+* File    : OS_FLAG.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_flag__c = "$Id: $";
+#endif
+
+
+#if (OS_CFG_FLAG_EN == DEF_ENABLED)
+
+/*
+************************************************************************************************************************
+*                                                 CREATE AN EVENT FLAG
+*
+* Description: This function is called to create an event flag group.
+*
+* Arguments  : p_grp          is a pointer to the event flag group to create
+*
+*              p_name         is the name of the event flag group
+*
+*              flags          contains the initial value to store in the event flag group (typically 0).
+*
+*              p_err          is a pointer to an error code which will be returned to your application:
+*
+*                                 OS_ERR_NONE                    If the call was successful
+*                                 OS_ERR_CREATE_ISR              If you attempted to create an Event Flag from an ISR
+*                                 OS_ERR_ILLEGAL_CREATE_RUN_TIME If you are trying to create the Event Flag after you
+*                                                                   called OSStart().
+*                                 OS_ERR_OBJ_PTR_NULL            If 'p_grp' is a NULL pointer
+*
+* Returns    : none
+************************************************************************************************************************
+*/
+
+void  OSFlagCreate (OS_FLAG_GRP  *p_grp,
+                    CPU_CHAR     *p_name,
+                    OS_FLAGS      flags,
+                    OS_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_CREATE_RUN_TIME;
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from ISR ...                           */
+       *p_err = OS_ERR_CREATE_ISR;                              /* ... can't CREATE from an ISR                         */
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_grp == DEF_NULL) {                                    /* Validate 'p_grp'                                     */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+#endif
+
+    OS_CRITICAL_ENTER();
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_grp->Type    = OS_OBJ_TYPE_FLAG;                          /* Set to event flag group type                         */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_grp->NamePtr = p_name;
+#else
+    (void)&p_name;
+#endif
+    p_grp->Flags   = flags;                                     /* Set to desired initial value                         */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_grp->TS      = 0u;
+#endif
+    OS_PendListInit(&p_grp->PendList);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_FlagDbgListAdd(p_grp);
+    OSFlagQty++;
+#endif
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_FLAG_CREATE(p_grp, p_name);                        /* Record the event.                                    */
+#endif
+    
+    OS_CRITICAL_EXIT_NO_SCHED();
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                             DELETE AN EVENT FLAG GROUP
+*
+* Description: This function deletes an event flag group and readies all tasks pending on the event flag group.
+*
+* Arguments  : p_grp     is a pointer to the desired event flag group.
+*
+*              opt       determines delete options as follows:
+*
+*                            OS_OPT_DEL_NO_PEND           Deletes the event flag group ONLY if no task pending
+*                            OS_OPT_DEL_ALWAYS            Deletes the event flag group even if tasks are waiting.
+*                                                         In this case, all the tasks pending will be readied.
+*
+*              p_err     is a pointer to an error code that can contain one of the following values:
+*
+*                            OS_ERR_NONE                    The call was successful and the event flag group was deleted
+*                            OS_ERR_DEL_ISR                 If you attempted to delete the event flag group from an ISR
+*                            OS_ERR_ILLEGAL_DEL_RUN_TIME    If you are trying to delete the event flag group after you
+*                                                             called OSStart()
+*                            OS_ERR_OBJ_PTR_NULL            If 'p_grp' is a NULL pointer
+*                            OS_ERR_OBJ_TYPE                If you didn't pass a pointer to an event flag group
+*                            OS_ERR_OPT_INVALID             An invalid option was specified
+*                            OS_ERR_OS_NOT_RUNNING          If uC/OS-III is not running yet
+*                            OS_ERR_TASK_WAITING            One or more tasks were waiting on the event flag group
+*
+* Returns    : == 0          if no tasks were waiting on the event flag group, or upon error.
+*              >  0          if one or more tasks waiting on the event flag group are now readied and informed.
+*
+* Note(s)    : 1) This function must be used with care.  Tasks that would normally expect the presence of the event flag
+*                 group MUST check the return code of OSFlagPost and OSFlagPend().
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_FLAG_DEL_EN == DEF_ENABLED)
+OS_OBJ_QTY  OSFlagDel (OS_FLAG_GRP  *p_grp,
+                       OS_OPT        opt,
+                       OS_ERR       *p_err)
+{
+    OS_OBJ_QTY        nbr_tasks;
+    OS_PEND_DATA     *p_pend_data;
+    OS_PEND_LIST     *p_pend_list;
+    OS_TCB           *p_tcb;
+    CPU_TS            ts;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_DEL_RUN_TIME;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from ISR ...                           */
+       *p_err = OS_ERR_DEL_ISR;                                 /* ... can't DELETE from an ISR                         */
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?.                              */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_grp == DEF_NULL) {                                    /* Validate 'p_grp'                                     */
+       *p_err  = OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_grp->Type != OS_OBJ_TYPE_FLAG) {                      /* Validate event group object                          */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+    OS_CRITICAL_ENTER();
+    p_pend_list = &p_grp->PendList;
+    nbr_tasks   = 0u;
+    switch (opt) {
+        case OS_OPT_DEL_NO_PEND:                                /* Delete group if no task waiting                      */
+             if (p_pend_list->HeadPtr == DEF_NULL) {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                 OS_FlagDbgListRemove(p_grp);
+                 OSFlagQty--;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                 TRACE_OS_FLAG_DEL(p_grp);                      /* Record the event.                                    */
+#endif
+                 OS_FlagClr(p_grp);
+
+                 OS_CRITICAL_EXIT();
+
+                *p_err = OS_ERR_NONE;
+             } else {
+                 OS_CRITICAL_EXIT();
+                *p_err = OS_ERR_TASK_WAITING;
+             }
+             break;
+
+        case OS_OPT_DEL_ALWAYS:                                 /* Always delete the event flag group                   */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             ts = OS_TS_GET();                                  /* Get local time stamp so all tasks get the same time  */
+#else
+             ts = 0u;
+#endif
+             while (p_pend_list->HeadPtr != DEF_NULL) {         /* Remove all tasks from the pend list                  */
+                 p_pend_data = p_pend_list->HeadPtr;
+                 p_tcb       = p_pend_data->TCBPtr;
+                 OS_PendObjDel((OS_PEND_OBJ *)((void *)p_grp),
+                               p_tcb,
+                               ts);
+                 nbr_tasks++;
+             }
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+             OS_FlagDbgListRemove(p_grp);
+             OSFlagQty--;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_FLAG_DEL(p_grp);                          /* Record the event.                                    */
+#endif
+             OS_FlagClr(p_grp);
+             OS_CRITICAL_EXIT_NO_SCHED();
+
+             OSSched();                                         /* Find highest priority task ready to run              */
+            *p_err = OS_ERR_NONE;
+             break;
+
+        default:
+             OS_CRITICAL_EXIT();
+            *p_err = OS_ERR_OPT_INVALID;
+             break;
+    }
+    return (nbr_tasks);
+}
+#endif
+
+/*
+************************************************************************************************************************
+*                                             WAIT ON AN EVENT FLAG GROUP
+*
+* Description: This function is called to wait for a combination of bits to be set in an event flag group.  Your
+*              application can wait for ANY bit to be set or ALL bits to be set.
+*
+* Arguments  : p_grp         is a pointer to the desired event flag group.
+*
+*              flags         Is a bit pattern indicating which bit(s) (i.e. flags) you wish to wait for.
+*                            The bits you want are specified by setting the corresponding bits in 'flags'.
+*                            e.g. if your application wants to wait for bits 0 and 1 then 'flags' would contain 0x03.
+*
+*              timeout       is an optional timeout (in clock ticks) that your task will wait for the
+*                            desired bit combination.  If you specify 0, however, your task will wait
+*                            forever at the specified event flag group or, until a message arrives.
+*
+*              opt           specifies whether you want ALL bits to be set or ANY of the bits to be set.
+*                            You can specify the 'ONE' of the following arguments:
+*
+*                                OS_OPT_PEND_FLAG_CLR_ALL   You will wait for ALL bits in 'flags' to be clear (0)
+*                                OS_OPT_PEND_FLAG_CLR_ANY   You will wait for ANY bit  in 'flags' to be clear (0)
+*                                OS_OPT_PEND_FLAG_SET_ALL   You will wait for ALL bits in 'flags' to be set   (1)
+*                                OS_OPT_PEND_FLAG_SET_ANY   You will wait for ANY bit  in 'flags' to be set   (1)
+*
+*                            You can 'ADD' OS_OPT_PEND_FLAG_CONSUME if you want the event flag to be 'consumed' by
+*                                      the call.  Example, to wait for any flag in a group AND then clear
+*                                      the flags that are present, set 'wait_opt' to:
+*
+*                                      OS_OPT_PEND_FLAG_SET_ANY + OS_OPT_PEND_FLAG_CONSUME
+*
+*                            You can also 'ADD' the type of pend with 'ONE' of the two option:
+*
+*                                OS_OPT_PEND_NON_BLOCKING   Task will NOT block if flags are not available
+*                                OS_OPT_PEND_BLOCKING       Task will     block if flags are not available
+*
+*              p_ts          is a pointer to a variable that will receive the timestamp of when the event flag group was
+*                            posted, aborted or the event flag group deleted.  If you pass a NULL pointer (i.e. (CPU_TS *)0)
+*                            then you will not get the timestamp.  In other words, passing a NULL pointer is valid and
+*                            indicates that you don't need the timestamp.
+*
+*              p_err         is a pointer to an error code and can be:
+*
+*                                OS_ERR_NONE                The desired bits have been set within the specified 'timeout'
+*                                OS_ERR_OBJ_DEL             If the event group was deleted
+*                                OS_ERR_OBJ_PTR_NULL        If 'p_grp' is a NULL pointer.
+*                                OS_ERR_OBJ_TYPE            You are not pointing to an event flag group
+*                                OS_ERR_OPT_INVALID         You didn't specify a proper 'opt' argument
+*                                OS_ERR_OS_NOT_RUNNING      If uC/OS-III is not running yet
+*                                OS_ERR_PEND_ABORT          The wait on the flag was aborted
+*                                OS_ERR_PEND_ISR            If you tried to PEND from an ISR
+*                                OS_ERR_PEND_WOULD_BLOCK    If you specified non-blocking but the flags were not
+*                                                           available
+*                                OS_ERR_SCHED_LOCKED        If you called this function when the scheduler is locked
+*                                OS_ERR_STATUS_INVALID      If the pend status has an invalid value
+*                                OS_ERR_TIMEOUT             The bit(s) have not been set in the specified 'timeout'
+*
+* Returns    : The flags in the event flag group that made the task ready or, 0 if a timeout or an error
+*              occurred.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+OS_FLAGS  OSFlagPend (OS_FLAG_GRP  *p_grp,
+                      OS_FLAGS      flags,
+                      OS_TICK       timeout,
+                      OS_OPT        opt,
+                      CPU_TS       *p_ts,
+                      OS_ERR       *p_err)
+{
+    CPU_BOOLEAN   consume;
+    OS_FLAGS      flags_rdy;
+    OS_OPT        mode;
+    OS_PEND_DATA  pend_data;
+    CPU_SR_ALLOC();
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from ISR ...                           */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_FLAG_PEND_FAILED(p_grp);                       /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_PEND_ISR;                                /* ... can't PEND from an ISR                           */
+        return ((OS_FLAGS)0);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_grp == DEF_NULL) {                                    /* Validate 'p_grp'                                     */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_FLAG_PEND_FAILED(p_grp);                       /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_PEND_FLAG_CLR_ALL:
+        case OS_OPT_PEND_FLAG_CLR_ANY:
+        case OS_OPT_PEND_FLAG_SET_ALL:
+        case OS_OPT_PEND_FLAG_SET_ANY:
+        case OS_OPT_PEND_FLAG_CLR_ALL | OS_OPT_PEND_FLAG_CONSUME:
+        case OS_OPT_PEND_FLAG_CLR_ANY | OS_OPT_PEND_FLAG_CONSUME:
+        case OS_OPT_PEND_FLAG_SET_ALL | OS_OPT_PEND_FLAG_CONSUME:
+        case OS_OPT_PEND_FLAG_SET_ANY | OS_OPT_PEND_FLAG_CONSUME:
+        case OS_OPT_PEND_FLAG_CLR_ALL | OS_OPT_PEND_NON_BLOCKING:
+        case OS_OPT_PEND_FLAG_CLR_ANY | OS_OPT_PEND_NON_BLOCKING:
+        case OS_OPT_PEND_FLAG_SET_ALL | OS_OPT_PEND_NON_BLOCKING:
+        case OS_OPT_PEND_FLAG_SET_ANY | OS_OPT_PEND_NON_BLOCKING:
+        case OS_OPT_PEND_FLAG_CLR_ALL | OS_OPT_PEND_FLAG_CONSUME | OS_OPT_PEND_NON_BLOCKING:
+        case OS_OPT_PEND_FLAG_CLR_ANY | OS_OPT_PEND_FLAG_CONSUME | OS_OPT_PEND_NON_BLOCKING:
+        case OS_OPT_PEND_FLAG_SET_ALL | OS_OPT_PEND_FLAG_CONSUME | OS_OPT_PEND_NON_BLOCKING:
+        case OS_OPT_PEND_FLAG_SET_ANY | OS_OPT_PEND_FLAG_CONSUME | OS_OPT_PEND_NON_BLOCKING:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_FLAG_PEND_FAILED(p_grp);                  /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_grp->Type != OS_OBJ_TYPE_FLAG) {                      /* Validate that we are pointing at an event flag       */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_FLAG_PEND_FAILED(p_grp);                       /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    if ((opt & OS_OPT_PEND_FLAG_CONSUME) != 0u) {               /* See if we need to consume the flags                  */
+        consume = DEF_TRUE;
+    } else {
+        consume = DEF_FALSE;
+    }
+
+    if (p_ts != DEF_NULL) {
+       *p_ts = 0u;                                              /* Initialize the returned timestamp                    */
+    }
+
+    mode = opt & OS_OPT_PEND_FLAG_MASK;
+    CPU_CRITICAL_ENTER();
+    switch (mode) {
+        case OS_OPT_PEND_FLAG_SET_ALL:                          /* See if all required flags are set                    */
+             flags_rdy = (p_grp->Flags & flags);                /* Extract only the bits we want                        */
+             if (flags_rdy == flags) {                          /* Must match ALL the bits that we want                 */
+                 if (consume == DEF_TRUE) {                     /* See if we need to consume the flags                  */
+                     p_grp->Flags &= ~flags_rdy;                /* Clear ONLY the flags that we wanted                  */
+                 }
+                 OSTCBCurPtr->FlagsRdy = flags_rdy;             /* Save flags that were ready                           */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                 if (p_ts != DEF_NULL) {
+                    *p_ts = p_grp->TS;
+                 }
+#endif
+                 CPU_CRITICAL_EXIT();                           /* Yes, condition met, return to caller                 */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                 TRACE_OS_FLAG_PEND(p_grp);                     /* Record the event.                                    */
+#endif
+                *p_err = OS_ERR_NONE;
+                 return (flags_rdy);
+             } else {                                           /* Block task until events occur or timeout             */
+                 if ((opt & OS_OPT_PEND_NON_BLOCKING) != 0u) {
+                     CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                     TRACE_OS_FLAG_PEND_FAILED(p_grp);          /* Record the event.                                    */
+#endif
+                    *p_err = OS_ERR_PEND_WOULD_BLOCK;           /* Specified non-blocking so task would block           */
+                     return ((OS_FLAGS)0);
+                 } else {                                       /* Specified blocking so check is scheduler is locked   */
+                     if (OSSchedLockNestingCtr > 0u) {          /* See if called with scheduler locked ...        */
+                         CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                         TRACE_OS_FLAG_PEND_FAILED(p_grp);      /* Record the event.                                    */
+#endif
+                        *p_err = OS_ERR_SCHED_LOCKED;           /* ... can't PEND when locked                           */
+                         return (0u);
+                     }
+                 }
+                                                                /* Lock the scheduler/re-enable interrupts              */
+                 OS_CRITICAL_ENTER_CPU_EXIT();              
+                 OS_FlagBlock(&pend_data,
+                              p_grp,
+                              flags,
+                              opt,
+                              timeout);
+                 OS_CRITICAL_EXIT_NO_SCHED();
+             }
+             break;
+
+        case OS_OPT_PEND_FLAG_SET_ANY:
+             flags_rdy = (p_grp->Flags & flags);                /* Extract only the bits we want                        */
+             if (flags_rdy != 0u) {                             /* See if any flag set                                  */
+                 if (consume == DEF_TRUE) {                     /* See if we need to consume the flags                  */
+                     p_grp->Flags &= ~flags_rdy;                /* Clear ONLY the flags that we got                     */
+                 }
+                 OSTCBCurPtr->FlagsRdy = flags_rdy;             /* Save flags that were ready                           */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                 if (p_ts != DEF_NULL) {
+                    *p_ts  = p_grp->TS;
+                 }
+#endif
+                 CPU_CRITICAL_EXIT();                           /* Yes, condition met, return to caller                 */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                 TRACE_OS_FLAG_PEND(p_grp);                     /* Record the event.                                    */
+#endif
+                *p_err = OS_ERR_NONE;
+                 return (flags_rdy);
+             } else {                                           /* Block task until events occur or timeout             */
+                 if ((opt & OS_OPT_PEND_NON_BLOCKING) != 0u) {
+                     CPU_CRITICAL_EXIT();
+                    *p_err = OS_ERR_PEND_WOULD_BLOCK;           /* Specified non-blocking so task would block           */
+                     return ((OS_FLAGS)0);
+                 } else {                                       /* Specified blocking so check is scheduler is locked   */
+                     if (OSSchedLockNestingCtr > 0u) {          /* See if called with scheduler locked ...        */
+                         CPU_CRITICAL_EXIT();
+                        *p_err = OS_ERR_SCHED_LOCKED;           /* ... can't PEND when locked                           */
+                         return ((OS_FLAGS)0);
+                     }
+                 }
+                                                                /* Lock the scheduler/re-enable interrupts              */
+                 OS_CRITICAL_ENTER_CPU_EXIT();              
+                 OS_FlagBlock(&pend_data,
+                              p_grp,
+                              flags,
+                              opt,
+                              timeout);
+                 OS_CRITICAL_EXIT_NO_SCHED();
+             }
+             break;
+
+#if (OS_CFG_FLAG_MODE_CLR_EN == DEF_ENABLED)
+        case OS_OPT_PEND_FLAG_CLR_ALL:                          /* See if all required flags are cleared                */
+             flags_rdy = (OS_FLAGS)(~p_grp->Flags & flags);     /* Extract only the bits we want                        */
+             if (flags_rdy == flags) {                          /* Must match ALL the bits that we want                 */
+                 if (consume == DEF_TRUE) {                     /* See if we need to consume the flags                  */
+                     p_grp->Flags |= flags_rdy;                 /* Set ONLY the flags that we wanted                    */
+                 }
+                 OSTCBCurPtr->FlagsRdy = flags_rdy;             /* Save flags that were ready                           */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                 if (p_ts != DEF_NULL) {
+                    *p_ts  = p_grp->TS;
+                 }
+#endif
+                 CPU_CRITICAL_EXIT();                           /* Yes, condition met, return to caller                 */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                 TRACE_OS_FLAG_PEND(p_grp);                     /* Record the event.                                    */
+#endif                 
+                *p_err = OS_ERR_NONE;
+                 return (flags_rdy);
+             } else {                                           /* Block task until events occur or timeout             */
+                 if ((opt & OS_OPT_PEND_NON_BLOCKING) != 0u) {
+                     CPU_CRITICAL_EXIT();
+                    *p_err = OS_ERR_PEND_WOULD_BLOCK;           /* Specified non-blocking so task would block           */
+                     return ((OS_FLAGS)0);
+                 } else {                                       /* Specified blocking so check is scheduler is locked   */
+                     if (OSSchedLockNestingCtr > 0u) {          /* See if called with scheduler locked ...        */
+                         CPU_CRITICAL_EXIT();
+                        *p_err = OS_ERR_SCHED_LOCKED;           /* ... can't PEND when locked                           */
+                         return (0);
+                     }
+                 }
+                                                            
+                 OS_CRITICAL_ENTER_CPU_EXIT();                  /* Lock the scheduler/re-enable interrupts              */
+                 OS_FlagBlock(&pend_data,
+                              p_grp,
+                              flags,
+                              opt,
+                              timeout);
+                 OS_CRITICAL_EXIT_NO_SCHED();
+             }
+             break;
+
+        case OS_OPT_PEND_FLAG_CLR_ANY:
+             flags_rdy = (~p_grp->Flags & flags);               /* Extract only the bits we want                        */
+             if (flags_rdy != 0u) {                             /* See if any flag cleared                              */
+                 if (consume == DEF_TRUE) {                     /* See if we need to consume the flags                  */
+                     p_grp->Flags |= flags_rdy;                 /* Set ONLY the flags that we got                       */
+                 }
+                 OSTCBCurPtr->FlagsRdy = flags_rdy;             /* Save flags that were ready                           */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                 if (p_ts != DEF_NULL) {
+                    *p_ts  = p_grp->TS;
+                 }
+#endif
+                 CPU_CRITICAL_EXIT();                           /* Yes, condition met, return to caller                 */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                 TRACE_OS_FLAG_PEND(p_grp);                     /* Record the event.                                    */
+#endif
+                *p_err = OS_ERR_NONE;
+                 return (flags_rdy);
+             } else {                                           /* Block task until events occur or timeout             */
+                 if ((opt & OS_OPT_PEND_NON_BLOCKING) != 0u) {
+                     CPU_CRITICAL_EXIT();
+                    *p_err = OS_ERR_PEND_WOULD_BLOCK;           /* Specified non-blocking so task would block           */
+                     return ((OS_FLAGS)0);
+                 } else {                                       /* Specified blocking so check is scheduler is locked   */
+                     if (OSSchedLockNestingCtr > 0u) {          /* See if called with scheduler locked ...        */
+                         CPU_CRITICAL_EXIT();
+                        *p_err = OS_ERR_SCHED_LOCKED;           /* ... can't PEND when locked                           */
+                         return (0u);
+                     }
+                 }
+                                                            
+                 OS_CRITICAL_ENTER_CPU_EXIT();                  /* Lock the scheduler/re-enable interrupts              */
+                 OS_FlagBlock(&pend_data,              
+                              p_grp,
+                              flags,
+                              opt,
+                              timeout);
+                 OS_CRITICAL_EXIT_NO_SCHED();
+             }
+             break;
+#endif
+
+        default:
+             CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_FLAG_PEND_FAILED(p_grp);                  /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_FLAG_PEND_BLOCK(p_grp);                            /* Record the event.                                    */
+#endif
+    OSSched();                                                  /* Find next HPT ready to run                           */
+
+    CPU_CRITICAL_ENTER();
+    switch (OSTCBCurPtr->PendStatus) {
+        case OS_STATUS_PEND_OK:                                 /* We got the event flags                               */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_FLAG_PEND(p_grp);                         /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_NONE;
+             break;
+
+        case OS_STATUS_PEND_ABORT:                              /* Indicate that we aborted                             */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+             CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_FLAG_PEND_FAILED(p_grp);                  /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_PEND_ABORT;
+             break;
+
+        case OS_STATUS_PEND_TIMEOUT:                            /* Indicate that we didn't get semaphore within timeout */
+             if (p_ts != DEF_NULL) {
+                *p_ts = 0u;
+             }
+             CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_FLAG_PEND_FAILED(p_grp);                  /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_TIMEOUT;
+             break;
+
+        case OS_STATUS_PEND_DEL:                                /* Indicate that object pended on has been deleted      */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+             CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_FLAG_PEND_FAILED(p_grp);                  /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OBJ_DEL;
+             break;
+
+        default:
+             CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_FLAG_PEND_FAILED(p_grp);                  /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_STATUS_INVALID;
+             break;
+    }
+    if (*p_err != OS_ERR_NONE) {
+        return (0u);
+    }
+
+    flags_rdy = OSTCBCurPtr->FlagsRdy;
+    if (consume == DEF_TRUE) {                                  /* See if we need to consume the flags                  */
+        switch (mode) {
+            case OS_OPT_PEND_FLAG_SET_ALL:
+            case OS_OPT_PEND_FLAG_SET_ANY:                      /* Clear ONLY the flags we got                          */
+                 p_grp->Flags &= ~flags_rdy;
+                 break;
+
+#if (OS_CFG_FLAG_MODE_CLR_EN == DEF_ENABLED)
+            case OS_OPT_PEND_FLAG_CLR_ALL:
+            case OS_OPT_PEND_FLAG_CLR_ANY:                      /* Set   ONLY the flags we got                          */
+                 p_grp->Flags |=  flags_rdy;
+                 break;
+#endif
+            default:
+                 CPU_CRITICAL_EXIT();
+                *p_err = OS_ERR_OPT_INVALID;
+                 return (0u);
+        }
+    }
+    CPU_CRITICAL_EXIT();
+   *p_err = OS_ERR_NONE;                                        /* Event(s) must have occurred                          */
+    return (flags_rdy);
+}
+
+
+/*
+************************************************************************************************************************
+*                                          ABORT WAITING ON AN EVENT FLAG GROUP
+*
+* Description: This function aborts & readies any tasks currently waiting on an event flag group.  This function should
+*              be used to fault-abort the wait on the event flag group, rather than to normally post to the event flag
+*              group OSFlagPost().
+*
+* Arguments  : p_grp     is a pointer to the event flag group
+*
+*              opt       determines the type of ABORT performed:
+*
+*                            OS_OPT_PEND_ABORT_1          ABORT wait for a single task (HPT) waiting on the event flag
+*                            OS_OPT_PEND_ABORT_ALL        ABORT wait for ALL tasks that are  waiting on the event flag
+*                            OS_OPT_POST_NO_SCHED         Do not call the scheduler
+*
+*              p_err     is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_NONE                  At least one task waiting on the event flag group and was
+*                                                         readied and informed of the aborted wait; check return value
+*                                                         for the number of tasks whose wait on the event flag group
+*                                                         was aborted
+*                            OS_ERR_OBJ_PTR_NULL          If 'p_grp' is a NULL pointer
+*                            OS_ERR_OBJ_TYPE              If 'p_grp' is not pointing at an event flag group
+*                            OS_ERR_OPT_INVALID           If you specified an invalid option
+*                            OS_ERR_OS_NOT_RUNNING        If uC/OS-III is not running yet
+*                            OS_ERR_PEND_ABORT_ISR        If you called this function from an ISR
+*                            OS_ERR_PEND_ABORT_NONE       No task were pending
+*
+* Returns    : == 0          if no tasks were waiting on the event flag group, or upon error.
+*              >  0          if one or more tasks waiting on the event flag group are now readied and informed.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_FLAG_PEND_ABORT_EN == DEF_ENABLED)
+OS_OBJ_QTY  OSFlagPendAbort (OS_FLAG_GRP  *p_grp,
+                             OS_OPT        opt,
+                             OS_ERR       *p_err)
+{
+    OS_PEND_LIST  *p_pend_list;
+    OS_TCB        *p_tcb;
+    CPU_TS         ts;
+    OS_OBJ_QTY     nbr_tasks;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_OBJ_QTY)0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to Pend Abort from an ISR                */
+       *p_err = OS_ERR_PEND_ABORT_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_grp == DEF_NULL) {                                    /* Validate 'p_grp'                                     */
+       *p_err  =  OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_PEND_ABORT_1:
+        case OS_OPT_PEND_ABORT_ALL:
+        case OS_OPT_PEND_ABORT_1   | OS_OPT_POST_NO_SCHED:
+        case OS_OPT_PEND_ABORT_ALL | OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+            *p_err = OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_grp->Type != OS_OBJ_TYPE_FLAG) {                      /* Make sure event flag group was created               */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    p_pend_list = &p_grp->PendList;
+    if (p_pend_list->HeadPtr == DEF_NULL) {                     /* Any task waiting on flag group?                      */
+        CPU_CRITICAL_EXIT();                                    /* No                                                   */
+       *p_err = OS_ERR_PEND_ABORT_NONE;
+        return (0u);
+    }
+
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    nbr_tasks = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts        = OS_TS_GET();                                    /* Get local time stamp so all tasks get the same time  */
+#else
+    ts        = 0u;
+#endif
+
+    while (p_pend_list->HeadPtr != DEF_NULL) {
+        p_tcb = p_pend_list->HeadPtr->TCBPtr;
+        OS_PendAbort((OS_PEND_OBJ *)((void *)p_grp),
+                     p_tcb,
+                     ts);
+        nbr_tasks++;
+        if (opt != OS_OPT_PEND_ABORT_ALL) {                     /* Pend abort all tasks waiting?                        */
+            break;                                              /* No                                                   */
+        }
+    }
+    OS_CRITICAL_EXIT_NO_SCHED();
+
+    if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+        OSSched();                                              /* Run the scheduler                                    */
+    }
+
+   *p_err = OS_ERR_NONE;
+    return (nbr_tasks);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                       GET FLAGS WHO CAUSED TASK TO BECOME READY
+*
+* Description: This function is called to obtain the flags that caused the task to become ready to run.
+*              In other words, this function allows you to tell "Who done it!".
+*
+* Arguments  : p_err     is a pointer to an error code
+*
+*                            OS_ERR_NONE              If the call was successful
+*                            OS_ERR_OS_NOT_RUNNING    If uC/OS-III is not running yet
+*                            OS_ERR_PEND_ISR          If called from an ISR
+*
+* Returns    : The flags that caused the task to be ready.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+OS_FLAGS  OSFlagPendGetFlagsRdy (OS_ERR  *p_err)
+{
+    OS_FLAGS   flags;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_FLAGS)0);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from ISR ...                           */
+       *p_err = OS_ERR_PEND_ISR;                                /* ... can't get from an ISR                            */
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    flags = OSTCBCurPtr->FlagsRdy;
+    CPU_CRITICAL_EXIT();
+   *p_err = OS_ERR_NONE;
+    return (flags);
+}
+
+
+/*
+************************************************************************************************************************
+*                                                POST EVENT FLAG BIT(S)
+*
+* Description: This function is called to set or clear some bits in an event flag group.  The bits to set or clear are
+*              specified by a 'bit mask'.
+*
+* Arguments  : p_grp         is a pointer to the desired event flag group.
+*
+*              flags         If 'opt' (see below) is OS_OPT_POST_FLAG_SET, each bit that is set in 'flags' will
+*                            set the corresponding bit in the event flag group.  e.g. to set bits 0, 4
+*                            and 5 you would set 'flags' to:
+*
+*                                0x31     (note, bit 0 is least significant bit)
+*
+*                            If 'opt' (see below) is OS_OPT_POST_FLAG_CLR, each bit that is set in 'flags' will
+*                            CLEAR the corresponding bit in the event flag group.  e.g. to clear bits 0,
+*                            4 and 5 you would specify 'flags' as:
+*
+*                                0x31     (note, bit 0 is least significant bit)
+*
+*              opt           indicates whether the flags will be:
+*
+*                                OS_OPT_POST_FLAG_SET       set
+*                                OS_OPT_POST_FLAG_CLR       cleared
+*
+*                            you can also 'add' OS_OPT_POST_NO_SCHED to prevent the scheduler from being called.
+*
+*              p_err         is a pointer to an error code and can be:
+*
+*                                OS_ERR_NONE                The call was successful
+*                                OS_ERR_INT_Q_FULL          If the deferred interrupt post queue is full
+*                                OS_ERR_OBJ_PTR_NULL        You passed a NULL pointer
+*                                OS_ERR_OBJ_TYPE            You are not pointing to an event flag group
+*                                OS_ERR_OPT_INVALID         You specified an invalid option
+*                                OS_ERR_OS_NOT_RUNNING      If uC/OS-III is not running yet
+*
+* Returns    : the new value of the event flags bits that are still set.
+*
+* Note(s)    : 1) The execution time of this function depends on the number of tasks waiting on the event flag group.
+************************************************************************************************************************
+*/
+
+OS_FLAGS  OSFlagPost (OS_FLAG_GRP  *p_grp,
+                      OS_FLAGS      flags,
+                      OS_OPT        opt,
+                      OS_ERR       *p_err)
+{
+    OS_FLAGS  flags_cur;
+    CPU_TS    ts;
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_grp == DEF_NULL) {                                    /* Validate 'p_grp'                                     */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_FLAG_POST_FAILED(p_grp);                       /* Record the event.                                    */
+#endif
+       *p_err  = OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_POST_FLAG_SET:
+        case OS_OPT_POST_FLAG_CLR:
+        case OS_OPT_POST_FLAG_SET | OS_OPT_POST_NO_SCHED:
+        case OS_OPT_POST_FLAG_CLR | OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_FLAG_POST_FAILED(p_grp);                  /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_grp->Type != OS_OBJ_TYPE_FLAG) {                      /* Make sure we are pointing to an event flag grp       */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_FLAG_POST_FAILED(p_grp);                       /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts = OS_TS_GET();                                           /* Get timestamp                                        */
+#else
+    ts = 0u;
+#endif
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from an ISR                            */
+        OS_IntQPost(OS_OBJ_TYPE_FLAG,                           /* Post to ISR queue                                    */
+                    (void *)p_grp,
+                    DEF_NULL,
+                    0u,
+                    flags,
+                    opt,
+                    ts,
+                    p_err);
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_FLAG_POST(p_grp);                              /* Record the event.                                    */
+#endif
+        return (0u);
+    }
+#endif
+
+    flags_cur = OS_FlagPost(p_grp,
+                            flags,
+                            opt,
+                            ts,
+                            p_err);
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_FLAG_POST(p_grp);                                  /* Record the event.                                    */
+#endif    
+
+    return (flags_cur);
+}
+
+
+/*
+************************************************************************************************************************
+*                         SUSPEND TASK UNTIL EVENT FLAG(s) RECEIVED OR TIMEOUT OCCURS
+*
+* Description: This function is internal to uC/OS-III and is used to put a task to sleep until the desired
+*              event flag bit(s) are set.
+*
+* Arguments  : p_pend_data    is a pointer to an object used to link the task being blocked to the list of task(s)
+*              -----------    pending on the desired event flag group.
+*
+*              p_grp         is a pointer to the desired event flag group.
+*              -----
+*
+*              flags         Is a bit pattern indicating which bit(s) (i.e. flags) you wish to check.
+*                            The bits you want are specified by setting the corresponding bits in
+*                            'flags'.  e.g. if your application wants to wait for bits 0 and 1 then
+*                            'flags' would contain 0x03.
+*
+*              opt           specifies whether you want ALL bits to be set/cleared or ANY of the bits
+*                            to be set/cleared.
+*                            You can specify the following argument:
+*
+*                                OS_OPT_PEND_FLAG_CLR_ALL   You will check ALL bits in 'mask' to be clear (0)
+*                                OS_OPT_PEND_FLAG_CLR_ANY   You will check ANY bit  in 'mask' to be clear (0)
+*                                OS_OPT_PEND_FLAG_SET_ALL   You will check ALL bits in 'mask' to be set   (1)
+*                                OS_OPT_PEND_FLAG_SET_ANY   You will check ANY bit  in 'mask' to be set   (1)
+*
+*              timeout       is the desired amount of time that the task will wait for the event flag
+*                            bit(s) to be set.
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_FlagBlock (OS_PEND_DATA  *p_pend_data,
+                    OS_FLAG_GRP   *p_grp,
+                    OS_FLAGS       flags,
+                    OS_OPT         opt,
+                    OS_TICK        timeout)
+{
+    OSTCBCurPtr->FlagsPend = flags;                             /* Save the flags that we need to wait for              */
+    OSTCBCurPtr->FlagsOpt  = opt;                               /* Save the type of wait we are doing                   */
+    OSTCBCurPtr->FlagsRdy  = 0u;
+
+    OS_Pend(p_pend_data,
+            (OS_PEND_OBJ *)((void *)p_grp),
+             OS_TASK_PEND_ON_FLAG,
+             timeout);
+}
+
+
+/*
+************************************************************************************************************************
+*                                      CLEAR THE CONTENTS OF AN EVENT FLAG GROUP
+*
+* Description: This function is called by OSFlagDel() to clear the contents of an event flag group
+*
+
+* Argument(s): p_grp     is a pointer to the event flag group to clear
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_FlagClr (OS_FLAG_GRP  *p_grp)
+{
+    OS_PEND_LIST  *p_pend_list;
+
+
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_grp->Type             = OS_OBJ_TYPE_NONE;
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_grp->NamePtr          = (CPU_CHAR *)((void *)"?FLAG");    /* Unknown name                                         */
+#endif
+    p_grp->Flags            =  0u;
+    p_pend_list             = &p_grp->PendList;
+    OS_PendListInit(p_pend_list);
+}
+
+
+/*
+************************************************************************************************************************
+*                                    ADD/REMOVE EVENT FLAG GROUP TO/FROM DEBUG LIST
+*
+* Description: These functions are called by uC/OS-III to add or remove an event flag group from the event flag debug
+*              list.
+*
+* Arguments  : p_grp     is a pointer to the event flag group to add/remove
+*
+* Returns    : none
+*
+* Note(s)    : These functions are INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void  OS_FlagDbgListAdd (OS_FLAG_GRP  *p_grp)
+{
+    p_grp->DbgNamePtr                = (CPU_CHAR *)((void *)" ");
+    p_grp->DbgPrevPtr                = DEF_NULL;
+    if (OSFlagDbgListPtr == DEF_NULL) {
+        p_grp->DbgNextPtr            = DEF_NULL;
+    } else {
+        p_grp->DbgNextPtr            = OSFlagDbgListPtr;
+        OSFlagDbgListPtr->DbgPrevPtr = p_grp;
+    }
+    OSFlagDbgListPtr                 = p_grp;
+}
+
+
+
+void  OS_FlagDbgListRemove (OS_FLAG_GRP  *p_grp)
+{
+    OS_FLAG_GRP  *p_grp_next;
+    OS_FLAG_GRP  *p_grp_prev;
+
+
+    p_grp_prev = p_grp->DbgPrevPtr;
+    p_grp_next = p_grp->DbgNextPtr;
+
+    if (p_grp_prev == DEF_NULL) {
+        OSFlagDbgListPtr = p_grp_next;
+        if (p_grp_next != DEF_NULL) {
+            p_grp_next->DbgPrevPtr = DEF_NULL;
+        }
+        p_grp->DbgNextPtr = DEF_NULL;
+
+    } else if (p_grp_next == DEF_NULL) {
+        p_grp_prev->DbgNextPtr = DEF_NULL;
+        p_grp->DbgPrevPtr      = DEF_NULL;
+
+    } else {
+        p_grp_prev->DbgNextPtr =  p_grp_next;
+        p_grp_next->DbgPrevPtr =  p_grp_prev;
+        p_grp->DbgNextPtr      = DEF_NULL;
+        p_grp->DbgPrevPtr      = DEF_NULL;
+    }
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                POST EVENT FLAG BIT(S)
+*
+* Description: This function is called to set or clear some bits in an event flag group.  The bits to set or clear are
+*              specified by a 'bit mask'.
+*
+* Arguments  : p_grp         is a pointer to the desired event flag group.
+*
+*              flags         If 'opt' (see below) is OS_OPT_POST_FLAG_SET, each bit that is set in 'flags' will
+*                            set the corresponding bit in the event flag group.  e.g. to set bits 0, 4
+*                            and 5 you would set 'flags' to:
+*
+*                                0x31     (note, bit 0 is least significant bit)
+*
+*                            If 'opt' (see below) is OS_OPT_POST_FLAG_CLR, each bit that is set in 'flags' will
+*                            CLEAR the corresponding bit in the event flag group.  e.g. to clear bits 0,
+*                            4 and 5 you would specify 'flags' as:
+*
+*                                0x31     (note, bit 0 is least significant bit)
+*
+*              opt           indicates whether the flags will be:
+*
+*                                OS_OPT_POST_FLAG_SET       set
+*                                OS_OPT_POST_FLAG_CLR       cleared
+*
+*                            you can also 'add' OS_OPT_POST_NO_SCHED to prevent the scheduler from being called.
+*
+*              ts            is the timestamp of the post
+*
+*              p_err         is a pointer to an error code and can be:
+*
+*                                OS_ERR_NONE                The call was successful
+*                                OS_ERR_OBJ_PTR_NULL        You passed a NULL pointer
+*                                OS_ERR_OBJ_TYPE            You are not pointing to an event flag group
+*                                OS_ERR_FLAG_PEND_OPT       You specified an invalid option
+*
+* Returns    : the new value of the event flags bits that are still set.
+*
+* Note(s)    : 1) The execution time of this function depends on the number of tasks waiting on the event flag group.
+************************************************************************************************************************
+*/
+
+OS_FLAGS  OS_FlagPost (OS_FLAG_GRP  *p_grp,
+                       OS_FLAGS      flags,
+                       OS_OPT        opt,
+                       CPU_TS        ts,
+                       OS_ERR       *p_err)
+{
+    OS_FLAGS        flags_cur;
+    OS_FLAGS        flags_rdy;
+    OS_OPT          mode;
+    OS_PEND_DATA   *p_pend_data;
+    OS_PEND_DATA   *p_pend_data_next;
+    OS_PEND_LIST   *p_pend_list;
+    OS_TCB         *p_tcb;
+    CPU_SR_ALLOC();
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    CPU_CRITICAL_ENTER();
+    switch (opt) {
+        case OS_OPT_POST_FLAG_SET:
+        case OS_OPT_POST_FLAG_SET | OS_OPT_POST_NO_SCHED:
+             p_grp->Flags |=  flags;                            /* Set   the flags specified in the group               */
+             break;
+
+        case OS_OPT_POST_FLAG_CLR:
+        case OS_OPT_POST_FLAG_CLR | OS_OPT_POST_NO_SCHED:
+             p_grp->Flags &= ~flags;                            /* Clear the flags specified in the group               */
+             break;
+
+        default:
+             CPU_CRITICAL_EXIT();                               /* INVALID option                                       */
+            *p_err = OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_grp->TS   = ts;
+#endif
+    p_pend_list = &p_grp->PendList;
+    if (p_pend_list->HeadPtr == DEF_NULL) {                     /* Any task waiting on event flag group?                */
+        CPU_CRITICAL_EXIT();                                    /* No                                                   */
+       *p_err = OS_ERR_NONE;
+        return (p_grp->Flags);
+    }
+
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    p_pend_data = p_pend_list->HeadPtr;
+    p_tcb       = p_pend_data->TCBPtr;
+    while (p_tcb != DEF_NULL) {                                 /* Go through all tasks waiting on event flag(s)        */
+        p_pend_data_next = p_pend_data->NextPtr;
+        mode             = p_tcb->FlagsOpt & OS_OPT_PEND_FLAG_MASK;
+        switch (mode) {
+            case OS_OPT_PEND_FLAG_SET_ALL:                      /* See if all req. flags are set for current node       */
+                 flags_rdy = (p_grp->Flags & p_tcb->FlagsPend);
+                 if (flags_rdy == p_tcb->FlagsPend) {
+                     OS_FlagTaskRdy(p_tcb,                      /* Make task RTR, event(s) Rx'd                         */
+                                    flags_rdy,
+                                    ts);
+                 }
+                 break;
+
+            case OS_OPT_PEND_FLAG_SET_ANY:                      /* See if any flag set                                  */
+                 flags_rdy = (p_grp->Flags & p_tcb->FlagsPend);
+                 if (flags_rdy != 0u) {
+                     OS_FlagTaskRdy(p_tcb,                      /* Make task RTR, event(s) Rx'd                         */
+                                    flags_rdy,
+                                    ts);
+                 }
+                 break;
+
+#if (OS_CFG_FLAG_MODE_CLR_EN == DEF_ENABLED)
+            case OS_OPT_PEND_FLAG_CLR_ALL:                      /* See if all req. flags are set for current node       */
+                 flags_rdy = (OS_FLAGS)(~p_grp->Flags & p_tcb->FlagsPend);
+                 if (flags_rdy == p_tcb->FlagsPend) {
+                     OS_FlagTaskRdy(p_tcb,                      /* Make task RTR, event(s) Rx'd                         */
+                                    flags_rdy,
+                                    ts);
+                 }
+                 break;
+
+            case OS_OPT_PEND_FLAG_CLR_ANY:                      /* See if any flag set                                  */
+                 flags_rdy = (OS_FLAGS)(~p_grp->Flags & p_tcb->FlagsPend);
+                 if (flags_rdy != 0u) {
+                     OS_FlagTaskRdy(p_tcb,                      /* Make task RTR, event(s) Rx'd                         */
+                                    flags_rdy,
+                                    ts);
+                 }
+                 break;
+#endif
+            default:
+                 OS_CRITICAL_EXIT();
+                *p_err = OS_ERR_FLAG_PEND_OPT;
+                 return (0u);
+        }
+        p_pend_data = p_pend_data_next;                         /* Point to next task waiting for event flag(s)         */
+        if (p_pend_data != DEF_NULL) {
+            p_tcb = p_pend_data->TCBPtr;
+        } else {
+            p_tcb = DEF_NULL;
+        }
+    }
+    OS_CRITICAL_EXIT_NO_SCHED();
+
+    if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+        OSSched();
+    }
+
+    CPU_CRITICAL_ENTER();
+    flags_cur = p_grp->Flags;
+    CPU_CRITICAL_EXIT();
+   *p_err     = OS_ERR_NONE;
+    return (flags_cur);
+}
+
+
+/*
+************************************************************************************************************************
+*                                        MAKE TASK READY-TO-RUN, EVENT(s) OCCURRED
+*
+* Description: This function is internal to uC/OS-III and is used to make a task ready-to-run because the desired event
+*              flag bits have been set.
+*
+* Arguments  : p_tcb         is a pointer to the OS_TCB of the task to remove
+*              -----
+*
+*              flags_rdy     contains the bit pattern of the event flags that cause the task to become ready-to-run.
+*
+*              ts            is a timestamp associated with the post
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void   OS_FlagTaskRdy (OS_TCB    *p_tcb,
+                       OS_FLAGS   flags_rdy,
+                       CPU_TS     ts)
+{
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    p_tcb->FlagsRdy   = flags_rdy;
+    p_tcb->PendStatus = OS_STATUS_PEND_OK;                      /* Clear pend status                                    */
+    p_tcb->PendOn     = OS_TASK_PEND_ON_NOTHING;                /* Indicate no longer pending                           */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_tcb->TS         = ts;
+#endif
+    switch (p_tcb->TaskState) {
+        case OS_TASK_STATE_PEND:
+        case OS_TASK_STATE_PEND_TIMEOUT:
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             if (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT) {
+                 OS_TickListRemove(p_tcb);                      /* Remove from tick list                                */
+             }
+#endif
+             OS_RdyListInsert(p_tcb);                           /* Insert the task in the ready list                    */
+             p_tcb->TaskState = OS_TASK_STATE_RDY;
+             break;
+
+        case OS_TASK_STATE_PEND_SUSPENDED:
+        case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+             p_tcb->TaskState = OS_TASK_STATE_SUSPENDED;
+             break;
+
+        case OS_TASK_STATE_RDY:
+        case OS_TASK_STATE_DLY:
+        case OS_TASK_STATE_DLY_SUSPENDED:
+        case OS_TASK_STATE_SUSPENDED:
+        default:
+             break;
+    }
+    OS_PendListRemove(p_tcb);
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_int.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_int.c
new file mode 100644
index 0000000..40a3c50
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_int.c
@@ -0,0 +1,450 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                 ISR QUEUE MANAGEMENT
+*
+* File    : OS_INT.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define   MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_int__c = "$Id: $";
+#endif
+
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+/*
+************************************************************************************************************************
+*                                                   POST TO ISR QUEUE
+*
+* Description: This function places contents of posts into an intermediate queue to help defer processing of interrupts
+*              at the task level.
+*
+* Arguments  : type       is the type of kernel object the post is destined to:
+*
+*                             OS_OBJ_TYPE_SEM
+*                             OS_OBJ_TYPE_Q
+*                             OS_OBJ_TYPE_FLAG
+*                             OS_OBJ_TYPE_TASK_MSG
+*                             OS_OBJ_TYPE_TASK_SIGNAL
+*
+*              p_obj      is a pointer to the kernel object to post to.  This can be a pointer to a semaphore,
+*              -----      a message queue or a task control clock.
+*
+*              p_void     is a pointer to a message that is being posted.  This is used when posting to a message
+*                         queue or directly to a task.
+*
+*              msg_size   is the size of the message being posted
+*
+*              flags      if the post is done to an event flag group then this corresponds to the flags being
+*                         posted
+*
+*              ts         is a timestamp as to when the post was done
+*
+*              opt        this corresponds to post options and applies to:
+*
+*                             OSFlagPost()
+*                             OSSemPost()
+*                             OSQPost()
+*                             OSTaskQPost()
+*
+*              p_err      is a pointer to a variable that will contain an error code returned by this function.
+*
+*                             OS_ERR_NONE         if the post to the ISR queue was successful
+*                             OS_ERR_INT_Q_FULL   if the ISR queue is full and cannot accepts any further posts.  This
+*                                                 generally indicates that you are receiving interrupts faster than you
+*                                                 can process them or, that you didn't make the ISR queue large enough.
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is DEPRECATED and is not recommended for new designs. Deferred ISRs is a deprecated
+*                 feature of the kernel. It remains fully functional and supported but should not be used for
+*                 new applications.
+************************************************************************************************************************
+*/
+
+void  OS_IntQPost (OS_OBJ_TYPE   type,
+                   void         *p_obj,
+                   void         *p_void,
+                   OS_MSG_SIZE   msg_size,
+                   OS_FLAGS      flags,
+                   OS_OPT        opt,
+                   CPU_TS        ts,
+                   OS_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (OSIntQNbrEntries < OSCfg_IntQSize) {                    /* Make sure we haven't already filled the ISR queue    */
+        OSIntQNbrEntries++;
+
+        if (OSIntQNbrEntriesMax < OSIntQNbrEntries) {
+            OSIntQNbrEntriesMax = OSIntQNbrEntries;
+        }
+
+        OSIntQInPtr->Type       = type;                         /* Save object type being posted                        */
+        OSIntQInPtr->ObjPtr     = p_obj;                        /* Save pointer to object being posted                  */
+        OSIntQInPtr->MsgPtr     = p_void;                       /* Save pointer to message if posting to a message queue*/
+        OSIntQInPtr->MsgSize    = msg_size;                     /* Save the message size   if posting to a message queue*/
+        OSIntQInPtr->Flags      = flags;                        /* Save the flags if posting to an event flag group     */
+        OSIntQInPtr->Opt        = opt;                          /* Save post options                                    */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        OSIntQInPtr->TS         = ts;                           /* Save time stamp                                      */
+#endif
+
+        OSIntQInPtr             = OSIntQInPtr->NextPtr;         /* Point to the next interrupt handler queue entry      */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        OSRdyList[0].NbrEntries = 1u;                           /* Make the interrupt handler task ready to run         */
+#endif
+        OSRdyList[0].HeadPtr    = &OSIntQTaskTCB;
+        OSRdyList[0].TailPtr    = &OSIntQTaskTCB;
+        OS_PrioInsert(0u);                                      /* Add task priority 0 in the priority table            */
+        if (OSPrioCur != 0) {                                   /* Chk if OSIntQTask is not running                     */
+            OSPrioSaved         = OSPrioCur;                    /* Save current priority                                */
+        }
+
+       *p_err                   = OS_ERR_NONE;
+    } else {
+        OSIntQOvfCtr++;                                         /* Count the number of ISR queue overflows              */
+       *p_err                   = OS_ERR_INT_Q_FULL;
+    }
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+************************************************************************************************************************
+*                                               RE-POST FROM ISR QUEUE
+*
+* Description: This function takes contents of posts from an intermediate queue to help defer processing of interrupts
+*              at the task level.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is DEPRECATED, see OS_IntQPost() note 1 for details.
+************************************************************************************************************************
+*/
+
+void  OS_IntQRePost (void)
+{
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+    CPU_TS  ts;
+#endif
+    OS_ERR  err;
+
+
+    switch (OSIntQOutPtr->Type) {                               /* Re-post to task                                      */
+        case OS_OBJ_TYPE_FLAG:
+#if (OS_CFG_FLAG_EN == DEF_ENABLED)
+             (void)OS_FlagPost((OS_FLAG_GRP *) OSIntQOutPtr->ObjPtr,
+                                OSIntQOutPtr->Flags,
+                                OSIntQOutPtr->Opt,
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                                OSIntQOutPtr->TS,
+#else
+                                0u,
+#endif
+                               &err);
+#endif
+             break;
+
+        case OS_OBJ_TYPE_Q:
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+             OS_QPost((OS_Q *) OSIntQOutPtr->ObjPtr,
+                       OSIntQOutPtr->MsgPtr,
+                       OSIntQOutPtr->MsgSize,
+                       OSIntQOutPtr->Opt,
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                        OSIntQOutPtr->TS,
+#else
+                        0u,
+#endif
+                      &err);
+#endif
+             break;
+
+        case OS_OBJ_TYPE_SEM:
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+             (void)OS_SemPost((OS_SEM *) OSIntQOutPtr->ObjPtr,
+                               OSIntQOutPtr->Opt,
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                               OSIntQOutPtr->TS,
+#else
+                               0u,
+#endif
+                              &err);
+#endif
+             break;
+
+        case OS_OBJ_TYPE_TASK_MSG:
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+             OS_TaskQPost((OS_TCB    *) OSIntQOutPtr->ObjPtr,
+                          (void      *) OSIntQOutPtr->MsgPtr,
+                           OSIntQOutPtr->MsgSize,
+                           OSIntQOutPtr->Opt,
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                           OSIntQOutPtr->TS,
+#else
+                           0u,
+#endif
+                          &err);
+#endif
+             break;
+
+        case OS_OBJ_TYPE_TASK_RESUME:
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+             (void)OS_TaskResume((OS_TCB *) OSIntQOutPtr->ObjPtr,
+                                 &err);
+#endif
+             break;
+
+        case OS_OBJ_TYPE_TASK_SIGNAL:
+             (void)OS_TaskSemPost((OS_TCB *) OSIntQOutPtr->ObjPtr,
+                                   OSIntQOutPtr->Opt,
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                                   OSIntQOutPtr->TS,
+#else
+                                   0u,
+#endif
+                                  &err);
+             break;
+
+        case OS_OBJ_TYPE_TASK_SUSPEND:
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+             (void)OS_TaskSuspend((OS_TCB *) OSIntQOutPtr->ObjPtr,
+                                  &err);
+#endif
+             break;
+
+        case OS_OBJ_TYPE_TICK:
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+             OS_SchedRoundRobin(&OSRdyList[OSPrioSaved]);
+#endif
+
+             (void)OS_TaskSemPost((OS_TCB *)&OSTickTaskTCB,     /* Signal tick task                                     */
+                                   OS_OPT_POST_NONE,
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                                   OSIntQOutPtr->TS,
+#else
+                                   0u,
+#endif
+                                  &err);
+#endif
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+             OSTmrUpdateCtr--;
+             if (OSTmrUpdateCtr == 0u) {
+                 OSTmrUpdateCtr = OSTmrUpdateCnt;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                 ts             = OS_TS_GET();                  /* Get timestamp                                        */
+#else
+                 ts             = 0u;
+#endif
+                 (void)OS_TaskSemPost(&OSTmrTaskTCB,            /* Signal timer task                                    */
+                                       OS_OPT_POST_NONE,
+                                       ts,
+                                      &err);
+             }
+#endif
+             break;
+
+        default:
+             break;
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                               INTERRUPT QUEUE MANAGEMENT TASK
+*
+* Description: This task is internal to uC/OS-III and is used to process the queue of deffered interrupts.
+*
+* Arguments  : p_arg     is a pointer to an optional argument that is passed during task creation.  For this function
+*                        the argument is not used and will be a NULL pointer.
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is DEPRECATED, see OS_IntQPost() note 1 for details.
+************************************************************************************************************************
+*/
+
+void  OS_IntQTask (void  *p_arg)
+{
+    CPU_BOOLEAN  done;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS       ts_start;
+    CPU_TS       ts_end;
+#endif
+    CPU_SR_ALLOC();
+
+
+
+    (void)p_arg;                                                /* Not using 'p_arg', prevent compiler warning          */
+
+    while (DEF_ON) {
+        done = DEF_FALSE;
+        while (done == DEF_FALSE) {
+            CPU_CRITICAL_ENTER();
+            if (OSIntQNbrEntries == 0u) {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                OSRdyList[0].NbrEntries = 0u;                   /* Remove from ready list                               */
+#endif
+                OSRdyList[0].HeadPtr    = DEF_NULL;
+                OSRdyList[0].TailPtr    = DEF_NULL;
+                OS_PrioRemove(0u);                              /* Remove from the priority table                       */
+                CPU_CRITICAL_EXIT();
+                OSSched();
+                done = DEF_TRUE;                                /* No more entries in the queue, we are done            */
+            } else {
+                CPU_CRITICAL_EXIT();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                ts_start = OS_TS_GET();
+#endif
+                OS_IntQRePost();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                ts_end   = OS_TS_GET() - ts_start;              /* Measure execution time of tick task                  */
+                if (OSIntQTaskTimeMax < ts_end) {
+                    OSIntQTaskTimeMax = ts_end;
+                }
+#endif
+                CPU_CRITICAL_ENTER();
+                OSIntQOutPtr = OSIntQOutPtr->NextPtr;           /* Point to next item in the ISR queue                  */
+                OSIntQNbrEntries--;
+                CPU_CRITICAL_EXIT();
+            }
+        }
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                                 INITIALIZE THE ISR QUEUE
+*
+* Description: This function is called by OSInit() to initialize the ISR queue.
+*
+* Arguments  : p_err    is a pointer to a variable that will contain an error code returned by this function.
+*
+*                           OS_ERR_INT_Q             If you didn't provide an ISR queue in OS_CFG.C
+*                           OS_ERR_INT_Q_SIZE        If you didn't specify a large enough ISR queue.
+*                           OS_ERR_STK_INVALID       If you specified a NULL pointer for the task of the ISR task
+*                                                    handler
+*                           OS_ERR_STK_SIZE_INVALID  If you didn't specify a stack size greater than the minimum
+*                                                    specified by OS_CFG_STK_SIZE_MIN
+*                           OS_ERR_???               An error code returned by OSTaskCreate().
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is DEPRECATED, see OS_IntQPost() note 1 for details.
+************************************************************************************************************************
+*/
+
+void  OS_IntQTaskInit (OS_ERR  *p_err)
+{
+    OS_INT_Q      *p_int_q;
+    OS_INT_Q      *p_int_q_next;
+    OS_OBJ_QTY     i;
+
+
+    OSIntQOvfCtr = 0u;                                          /* Clear the ISR queue overflow counter                 */
+
+    if (OSCfg_IntQBasePtr == DEF_NULL) {
+       *p_err = OS_ERR_INT_Q;
+        return;
+    }
+
+    if (OSCfg_IntQSize < 2u) {
+       *p_err = OS_ERR_INT_Q_SIZE;
+        return;
+    }
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    OSIntQTaskTimeMax = 0u;
+#endif
+
+    p_int_q           = OSCfg_IntQBasePtr;                      /* Initialize the circular ISR queue                    */
+    p_int_q_next      = p_int_q;
+    p_int_q_next++;
+    for (i = 0u; i < OSCfg_IntQSize; i++) {
+        p_int_q->Type    =  OS_OBJ_TYPE_NONE;
+        p_int_q->ObjPtr  = DEF_NULL;
+        p_int_q->MsgPtr  = DEF_NULL;
+        p_int_q->MsgSize = 0u;
+        p_int_q->Flags   = 0u;
+        p_int_q->Opt     = 0u;
+        p_int_q->NextPtr = p_int_q_next;
+        p_int_q++;
+        p_int_q_next++;
+    }
+    p_int_q--;
+    p_int_q_next        = OSCfg_IntQBasePtr;
+    p_int_q->NextPtr    = p_int_q_next;
+    OSIntQInPtr         = p_int_q_next;
+    OSIntQOutPtr        = p_int_q_next;
+    OSIntQNbrEntries    = 0u;
+    OSIntQNbrEntriesMax = 0u;
+
+                                                                /* ------------ CREATE THE ISR QUEUE TASK ------------- */
+    if (OSCfg_IntQTaskStkBasePtr == DEF_NULL) {
+       *p_err = OS_ERR_INT_Q_STK_INVALID;
+        return;
+    }
+
+    if (OSCfg_IntQTaskStkSize < OSCfg_StkSizeMin) {
+       *p_err = OS_ERR_INT_Q_STK_SIZE_INVALID;
+        return;
+    }
+
+    OSTaskCreate(&OSIntQTaskTCB,
+                 (CPU_CHAR   *)((void *)"uC/OS-III ISR Queue Task"),
+                  OS_IntQTask,
+                  DEF_NULL,
+                  0u,                                           /* This task is ALWAYS at priority '0' (i.e. highest)   */
+                  OSCfg_IntQTaskStkBasePtr,
+                  OSCfg_IntQTaskStkLimit,
+                  OSCfg_IntQTaskStkSize,
+                  0u,
+                  0u,
+                  DEF_NULL,
+                 (OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR),
+                  p_err);
+}
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_mem.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_mem.c
new file mode 100644
index 0000000..e575cd6
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_mem.c
@@ -0,0 +1,398 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                             MEMORY PARTITION MANAGEMENT
+*
+* File    : OS_MEM.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define   MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_mem__c = "$Id: $";
+#endif
+
+
+#if (OS_CFG_MEM_EN == DEF_ENABLED)
+/*
+************************************************************************************************************************
+*                                               CREATE A MEMORY PARTITION
+*
+* Description : Create a fixed-sized memory partition that will be managed by uC/OS-III.
+*
+* Arguments   : p_mem    is a pointer to a memory partition control block which is allocated in user memory space.
+*
+*               p_name   is a pointer to an ASCII string to provide a name to the memory partition.
+*
+*               p_addr   is the starting address of the memory partition
+*
+*               n_blks   is the number of memory blocks to create from the partition.
+*
+*               blk_size is the size (in bytes) of each block in the memory partition.
+*
+*               p_err    is a pointer to a variable containing an error message which will be set by this function to
+*                        either:
+*
+*                            OS_ERR_NONE                    If the memory partition has been created correctly
+*                            OS_ERR_ILLEGAL_CREATE_RUN_TIME If you are trying to create the memory partition after you
+*                                                             called OSStart()
+*                            OS_ERR_MEM_CREATE_ISR          If you called this function from an ISR
+*                            OS_ERR_MEM_INVALID_BLKS        User specified an invalid number of blocks (must be >= 2)
+*                            OS_ERR_MEM_INVALID_P_ADDR      If you are specifying an invalid address for the memory
+*                                                           storage of the partition or, the block does not align on a
+*                                                           pointer boundary
+*                            OS_ERR_MEM_INVALID_SIZE        User specified an invalid block size
+*                                                             - must be greater than the size of a pointer
+*                                                             - must be able to hold an integral number of pointers
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSMemCreate (OS_MEM       *p_mem,
+                   CPU_CHAR     *p_name,
+                   void         *p_addr,
+                   OS_MEM_QTY    n_blks,
+                   OS_MEM_SIZE   blk_size,
+                   OS_ERR       *p_err)
+{
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    CPU_DATA       align_msk;
+#endif
+    OS_MEM_QTY     i;
+    OS_MEM_QTY     loops;
+    CPU_INT08U    *p_blk;
+    void         **p_link;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_CREATE_RUN_TIME;
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+       *p_err = OS_ERR_MEM_CREATE_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_addr == DEF_NULL) {                                   /* Must pass a valid address for the memory part.       */
+       *p_err   = OS_ERR_MEM_INVALID_P_ADDR;
+        return;
+    }
+    if (n_blks < 2u) {                                          /* Must have at least 2 blocks per partition            */
+       *p_err = OS_ERR_MEM_INVALID_BLKS;
+        return;
+    }
+    if (blk_size < sizeof(void *)) {                            /* Must contain space for at least a pointer            */
+       *p_err = OS_ERR_MEM_INVALID_SIZE;
+        return;
+    }
+    align_msk = sizeof(void *) - 1u;
+    if (align_msk > 0u) {
+        if (((CPU_ADDR)p_addr & align_msk) != 0u){              /* Must be pointer size aligned                         */
+           *p_err = OS_ERR_MEM_INVALID_P_ADDR;
+            return;
+        }
+        if ((blk_size & align_msk) != 0u) {                     /* Block size must be a multiple address size           */
+           *p_err = OS_ERR_MEM_INVALID_SIZE;
+            return;
+        }
+    }
+#endif
+
+    p_link = (void **)p_addr;                                   /* Create linked list of free memory blocks             */
+    p_blk  = (CPU_INT08U *)p_addr;
+    loops  = n_blks - 1u;
+    for (i = 0u; i < loops; i++) {
+        p_blk +=  blk_size;
+       *p_link = (void  *)p_blk;                                /* Save pointer to NEXT block in CURRENT block          */
+        p_link = (void **)(void *)p_blk;                        /* Position     to NEXT block                           */
+    }
+   *p_link             = DEF_NULL;                              /* Last memory block points to NULL                     */
+
+    OS_CRITICAL_ENTER();
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_mem->Type        = OS_OBJ_TYPE_MEM;                       /* Set the type of object                               */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_mem->NamePtr     = p_name;                                /* Save name of memory partition                        */
+#else
+    (void)&p_name;
+#endif
+    p_mem->AddrPtr     = p_addr;                                /* Store start address of memory partition              */
+    p_mem->FreeListPtr = p_addr;                                /* Initialize pointer to pool of free blocks            */
+    p_mem->NbrFree     = n_blks;                                /* Store number of free blocks in MCB                   */
+    p_mem->NbrMax      = n_blks;
+    p_mem->BlkSize     = blk_size;                              /* Store block size of each memory blocks               */
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_MemDbgListAdd(p_mem);
+    OSMemQty++;
+#endif
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_MEM_CREATE(p_mem, p_name);                         /* Record the event.                                    */
+#endif
+
+    OS_CRITICAL_EXIT_NO_SCHED();
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                                  GET A MEMORY BLOCK
+*
+* Description : Get a memory block from a partition.
+*
+* Arguments   : p_mem   is a pointer to the memory partition control block
+*
+*               p_err   is a pointer to a variable containing an error message which will be set by this function to
+*                       either:
+*
+*                           OS_ERR_NONE               If the memory partition has been created correctly
+*                           OS_ERR_MEM_INVALID_P_MEM  If you passed a NULL pointer for 'p_mem'
+*                           OS_ERR_MEM_NO_FREE_BLKS   If there are no more free memory blocks to allocate to the caller
+*                           OS_ERR_OBJ_TYPE           If 'p_mem' is not pointing at a memory partition
+*
+* Returns    : A pointer to a memory block if no error is detected
+*              A pointer to NULL if an error is detected
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  *OSMemGet (OS_MEM  *p_mem,
+                 OS_ERR  *p_err)
+{
+    void    *p_blk;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (DEF_NULL);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_mem == DEF_NULL) {                                    /* Must point to a valid memory partition               */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MEM_GET_FAILED(p_mem);                         /* Record the event.                                    */
+#endif
+       *p_err  = OS_ERR_MEM_INVALID_P_MEM;
+        return (DEF_NULL);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_mem->Type != OS_OBJ_TYPE_MEM) {                       /* Make sure the memory block was created               */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (DEF_NULL);
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    if (p_mem->NbrFree == 0u) {                                 /* See if there are any free memory blocks              */
+        CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MEM_GET_FAILED(p_mem);                         /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_MEM_NO_FREE_BLKS;                        /* No,  Notify caller of empty memory partition         */
+        return (DEF_NULL);                                      /* Return NULL pointer to caller                        */
+    }
+    p_blk              = p_mem->FreeListPtr;                    /* Yes, point to next free memory block                 */
+    p_mem->FreeListPtr = *(void **)p_blk;                       /* Adjust pointer to new free list                      */
+    p_mem->NbrFree--;                                           /* One less memory block in this partition              */
+    CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_MEM_GET(p_mem);                                    /* Record the event.                                    */
+#endif
+   *p_err = OS_ERR_NONE;                                        /* No error                                             */
+    return (p_blk);                                             /* Return memory block to caller                        */
+}
+
+
+/*
+************************************************************************************************************************
+*                                                 RELEASE A MEMORY BLOCK
+*
+* Description : Returns a memory block to a partition.
+*
+* Arguments   : p_mem    is a pointer to the memory partition control block
+*
+*               p_blk    is a pointer to the memory block being released.
+*
+*               p_err    is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_NONE               If the memory block was inserted into the partition
+*                            OS_ERR_MEM_FULL           If you are returning a memory block to an already FULL memory
+*                                                      partition (You freed more blocks than you allocated!)
+*                            OS_ERR_MEM_INVALID_P_BLK  If you passed a NULL pointer for the block to release.
+*                            OS_ERR_MEM_INVALID_P_MEM  If you passed a NULL pointer for 'p_mem'
+*                            OS_ERR_OBJ_TYPE           If 'p_mem' is not pointing at a memory partition
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSMemPut (OS_MEM  *p_mem,
+                void    *p_blk,
+                OS_ERR  *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_mem == DEF_NULL) {                                    /* Must point to a valid memory partition               */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MEM_PUT_FAILED(p_mem);                         /* Record the event.                                    */
+#endif
+       *p_err  = OS_ERR_MEM_INVALID_P_MEM;
+        return;
+    }
+    if (p_blk == DEF_NULL) {                                    /* Must release a valid block                           */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MEM_PUT_FAILED(p_mem);                         /* Record the event.                                    */
+#endif
+       *p_err  = OS_ERR_MEM_INVALID_P_BLK;
+        return;
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_mem->Type != OS_OBJ_TYPE_MEM) {                       /* Make sure the memory block was created               */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    if (p_mem->NbrFree >= p_mem->NbrMax) {                      /* Make sure all blocks not already returned            */
+        CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MEM_PUT_FAILED(p_mem);                         /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_MEM_FULL;
+        return;
+    }
+    *(void **)p_blk    = p_mem->FreeListPtr;                    /* Insert released block into free block list           */
+    p_mem->FreeListPtr = p_blk;
+    p_mem->NbrFree++;                                           /* One more memory block in this partition              */
+    CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_MEM_PUT(p_mem);                                    /* Record the event.                                    */
+#endif
+   *p_err              = OS_ERR_NONE;                           /* Notify caller that memory block was released         */
+}
+
+
+/*
+************************************************************************************************************************
+*                                           ADD MEMORY PARTITION TO DEBUG LIST
+*
+* Description : This function is called by OSMemCreate() to add the memory partition to the debug table.
+*
+* Arguments   : p_mem    Is a pointer to the memory partition
+*
+* Returns     : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void  OS_MemDbgListAdd (OS_MEM  *p_mem)
+{
+    p_mem->DbgPrevPtr               = DEF_NULL;
+    if (OSMemDbgListPtr == DEF_NULL) {
+        p_mem->DbgNextPtr           = DEF_NULL;
+    } else {
+        p_mem->DbgNextPtr           =  OSMemDbgListPtr;
+        OSMemDbgListPtr->DbgPrevPtr =  p_mem;
+    }
+    OSMemDbgListPtr                 =  p_mem;
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                           INITIALIZE MEMORY PARTITION MANAGER
+*
+* Description : This function is called by uC/OS-III to initialize the memory partition manager.  Your
+*               application MUST NOT call this function.
+*
+* Arguments   : none
+*
+* Returns     : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_MemInit (OS_ERR  *p_err)
+{
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSMemDbgListPtr = DEF_NULL;
+    OSMemQty        = 0u;
+#endif
+   *p_err           = OS_ERR_NONE;
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_mon.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_mon.c
new file mode 100644
index 0000000..2b829ca
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_mon.c
@@ -0,0 +1,533 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                 MONITOR MANAGEMENT
+*
+* File    : OS_MON.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_mon__c = "$Id: $";
+#endif
+
+#if (OS_CFG_MON_EN == DEF_ENABLED)
+/*
+************************************************************************************************************************
+*                                                  CREATE A MONITOR
+*
+* Description: This function creates a monitor.
+*
+* Arguments  : p_mon         Pointer to the monitor to initialize.  Your application is responsible for
+*                            allocating storage for the monitor.
+*
+*              p_name        Pointer to the name you would like to give the monitor.
+*
+*              p_mon_data    Pointer to the monitor global data.
+*
+*              p_err         Pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE                    if the call was successful
+*                                OS_ERR_CREATE_ISR              if you called this function from an ISR
+*                                OS_ERR_ILLEGAL_CREATE_RUN_TIME if you are trying to create the monitor after you
+*                                                                 called OSSafetyCriticalStart().
+*                                OS_ERR_NAME                    if 'p_name' is a NULL pointer
+*                                OS_ERR_OBJ_CREATED             if the monitor has already been created
+*                                OS_ERR_OBJ_PTR_NULL            if 'p_mon'  is a NULL pointer
+*                                OS_ERR_OBJ_TYPE                if 'p_mon' has already been initialized to a different
+*                                                               object type
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSMonCreate (OS_MON   *p_mon,
+                   CPU_CHAR *p_name,
+                   void     *p_mon_data,
+                   OS_ERR   *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_CREATE_RUN_TIME;
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to be called from an ISR                 */
+       *p_err = OS_ERR_CREATE_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_mon == DEF_NULL) {                                    /* Validate 'p_mon'                                     */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_mon->Type    = OS_OBJ_TYPE_MON;                           /* Mark the data structure as a monitor                 */
+#endif
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_mon->NamePtr = p_name;                                    /* Save the name of the monitor                         */
+#else
+    (void)&p_name;
+#endif
+
+    OS_PendListInit(&p_mon->PendList);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_MonDbgListAdd(p_mon);
+    OSMonQty++;
+#endif
+
+    if (p_mon_data != DEF_NULL) {
+        p_mon->MonDataPtr = p_mon_data;
+    }
+
+    CPU_CRITICAL_EXIT();
+
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                                  DELETE A MONITOR
+*
+* Description: This function deletes a monitor.
+*
+* Arguments  : p_mon         is a pointer to the monitor to delete
+*
+*              opt           determines delete options as follows:
+*
+*                                OS_OPT_DEL_NO_PEND          Delete monitor ONLY if no task pending
+*                                OS_OPT_DEL_ALWAYS           Deletes the monitor even if tasks are waiting.
+*                                                            In this case, all the tasks pending will be readied.
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE                    The call was successful and the monitor was deleted
+*                                OS_ERR_DEL_ISR                 If you attempted to delete the monitor from an ISR
+*                                OS_ERR_ILLEGAL_DEL_RUN_TIME    If you are trying to delete the monitor after you called
+*                                                                 OSStart()
+*                                OS_ERR_OBJ_PTR_NULL            If 'p_mon' is a NULL pointer
+*                                OS_ERR_OBJ_TYPE                If 'p_mon' is not pointing at a monitor
+*                                OS_ERR_OPT_INVALID             An invalid option was specified
+*                                OS_ERR_OS_NOT_RUNNING          If uC/OS-III is not running yet
+*                                OS_ERR_TASK_WAITING            One or more tasks were waiting on the monitor
+*
+* Returns    : == 0          if no tasks were waiting on the monitor, or upon error.
+*              >  0          if one or more tasks waiting on the monitor are now readied and informed.
+*
+* Note(s)    : 1) This function must be used with care.  Tasks that would normally expect the presence of the monitor
+*                 MUST check the return code of OSMonOp().
+*              2) Because ALL tasks pending on the monitor will be readied, you MUST be careful in applications where
+*                 the monitor is used for mutual exclusion because the resource(s) will no longer be guarded by the
+*                 monitor.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_MON_DEL_EN == DEF_ENABLED)
+OS_OBJ_QTY  OSMonDel (OS_MON  *p_mon,
+                      OS_OPT   opt,
+                      OS_ERR  *p_err)
+{
+    OS_OBJ_QTY     nbr_tasks;
+    OS_PEND_DATA  *p_pend_data;
+    OS_PEND_LIST  *p_pend_list;
+    OS_TCB        *p_tcb;
+    CPU_SR_ALLOC();
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_DEL_RUN_TIME;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to delete a monitor from an ISR          */
+       *p_err = OS_ERR_DEL_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_mon == DEF_NULL) {                                    /* Validate 'p_mon'                                     */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_mon->Type != OS_OBJ_TYPE_MON) {                       /* Make sure monitor was created                        */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    p_pend_list = &p_mon->PendList;
+    nbr_tasks   = 0u;
+    switch (opt) {
+         case OS_OPT_DEL_NO_PEND:                                /* Delete monitor only if no task waiting               */
+              if (p_pend_list->HeadPtr == DEF_NULL) {
+ #if (OS_CFG_DBG_EN == DEF_ENABLED)
+                  OS_MonDbgListRemove(p_mon);
+                  OSMonQty--;
+ #endif
+                  OS_MonClr(p_mon);
+                  CPU_CRITICAL_EXIT();
+                 *p_err = OS_ERR_NONE;
+              } else {
+                  CPU_CRITICAL_EXIT();
+                 *p_err = OS_ERR_TASK_WAITING;
+              }
+              break;
+
+         case OS_OPT_DEL_ALWAYS:                                 /* Always delete the monitor                            */
+              while (p_pend_list->HeadPtr != DEF_NULL) {         /* Remove all tasks on the pend list                    */
+                  p_pend_data = p_pend_list->HeadPtr;
+                  p_tcb       = p_pend_data->TCBPtr;
+                  OS_PendObjDel((OS_PEND_OBJ *)((void *)p_mon),
+                                p_tcb,
+                                0);
+                  nbr_tasks++;
+              }
+ #if (OS_CFG_DBG_EN == DEF_ENABLED)
+              OS_MonDbgListRemove(p_mon);
+              OSMonQty--;
+ #endif
+              OS_MonClr(p_mon);
+              CPU_CRITICAL_EXIT();
+              OSSched();                                         /* Find highest priority task ready to run              */
+             *p_err = OS_ERR_NONE;
+              break;
+
+         default:
+              CPU_CRITICAL_EXIT();
+             *p_err = OS_ERR_OPT_INVALID;
+              break;
+     }
+     return (nbr_tasks);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                               PERFORM AND OPERATION ON A MONITOR
+*
+* Description: This function performs an operation on a monitor.
+*
+* Arguments  : p_mon      Pointer to the monitor
+*
+*              timeout    Optional timeout to be applied if the monitor blocks (pend).
+*
+*              p_arg      Argument of the monitor.
+*
+*              p_on_enter Callback called at the entry of the OSMonOp.
+*
+*              p_on_eval  Callback to be registered as the monitor's evaluation function.
+*
+*              p_mon_ctx  Monitor context. Unused should be DEF_NULL.
+*
+*              opt        Possible options are :
+*                           OS_OPT_POST_NO_SCHED     Do not call the scheduler
+*
+*              p_err      Pointer to a variable that will contain an error code returned by this function.
+*
+*                           OS_ERR_NONE          The call was successful and the monitor was signaled.
+*                           OS_ERR_OBJ_PTR_NULL  If 'p_mon' is a NULL pointer.
+*                           OS_ERR_OBJ_TYPE      If 'p_mon' is not pointing at a monitor
+*
+* Returns    : none.
+*
+* Note(s)    : none.
+************************************************************************************************************************
+*/
+
+void  OSMonOp (OS_MON               *p_mon,
+               OS_TICK               timeout,
+               void                 *p_arg,
+               OS_MON_ON_ENTER_PTR   p_on_enter,
+               OS_MON_ON_EVAL_PTR    p_on_eval,
+               OS_OPT                opt,
+               OS_ERR               *p_err)
+{
+    CPU_INT32U        op_res;
+    CPU_INT32U        mon_res;
+    OS_PEND_LIST     *p_pend_list;
+    OS_PEND_DATA     *p_pend_data;
+    OS_PEND_DATA     *p_pend_data_next;
+    OS_PEND_DATA      pend_data;
+    OS_MON_DATA       mon_data;
+    OS_MON_DATA      *p_data;
+    void             *p_eval_data;
+    CPU_BOOLEAN       sched;
+    CPU_SR_ALLOC();
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_mon == DEF_NULL) {                                    /* Validate 'p_mon'                                     */
+       *p_err  = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+#endif
+
+    sched = DEF_NO;
+
+    CPU_CRITICAL_ENTER();
+
+    if (p_on_enter != DEF_NULL) {
+        op_res = (*p_on_enter)(p_mon, p_arg);
+    } else {
+        op_res = OS_MON_RES_BLOCK | OS_MON_RES_STOP_EVAL;
+    }
+
+    if (DEF_BIT_IS_SET(op_res, OS_MON_RES_BLOCK) == DEF_YES) {
+        OS_Pend(&pend_data,                                     /* Block task pending on Condition Variable             */
+                (OS_PEND_OBJ *)(p_mon),
+                OS_TASK_PEND_ON_COND_VAR,
+                timeout);
+
+        sched = DEF_YES;
+    }
+
+
+    pend_data.RdyMsgPtr  = &mon_data;
+    mon_data.p_eval_data = p_arg;
+    mon_data.p_on_eval   = p_on_eval;
+
+    if (DEF_BIT_IS_CLR(op_res, OS_MON_RES_STOP_EVAL) == DEF_YES) {
+        p_pend_list = &p_mon->PendList;
+        if (p_pend_list->HeadPtr != DEF_NULL) {
+            p_pend_data = p_pend_list->HeadPtr;
+            while (p_pend_data != DEF_NULL) {
+                p_pend_data_next = p_pend_data->NextPtr;
+
+                p_data = (OS_MON_DATA *)p_pend_data->RdyMsgPtr;
+                p_on_eval = p_data->p_on_eval;
+                p_eval_data = p_data->p_eval_data;
+
+                if (p_on_eval != DEF_NULL) {
+                    mon_res = (*p_on_eval)(p_mon, p_eval_data, p_arg);
+                } else {
+                    mon_res = OS_MON_RES_STOP_EVAL;
+                }
+
+                if (DEF_BIT_IS_CLR(mon_res, OS_MON_RES_BLOCK) == DEF_YES) {
+                    OS_Post((OS_PEND_OBJ *)(p_mon), p_pend_data->TCBPtr, DEF_NULL, 0u, 0u);
+                    if (DEF_BIT_IS_CLR(opt, OS_OPT_POST_NO_SCHED) == DEF_YES) {
+                        sched = DEF_YES;
+                    }
+                }
+
+                if (DEF_BIT_IS_SET(mon_res, OS_MON_RES_STOP_EVAL) == DEF_YES) {
+                    break;
+                }
+
+                p_pend_data = p_pend_data_next;
+            }
+
+        }
+
+    }
+
+    CPU_CRITICAL_EXIT();
+
+    if (sched == DEF_YES) {
+        OSSched();                                              /* Find the next highest priority task ready to run     */
+    }
+
+    if (DEF_BIT_IS_SET(op_res, OS_MON_RES_BLOCK) == DEF_YES) {
+    CPU_CRITICAL_ENTER();
+        switch (OSTCBCurPtr->PendStatus) {
+            case OS_STATUS_PEND_OK:                             /* We got the monitor                                   */
+                *p_err = OS_ERR_NONE;
+                 break;
+
+            case OS_STATUS_PEND_ABORT:                          /* Indicate that we aborted                             */
+                *p_err = OS_ERR_PEND_ABORT;
+                 break;
+
+            case OS_STATUS_PEND_TIMEOUT:                        /* Indicate that we didn't get monitor within timeout   */
+                *p_err = OS_ERR_TIMEOUT;
+                 break;
+
+            case OS_STATUS_PEND_DEL:                            /* Indicate that object pended on has been deleted      */
+                *p_err = OS_ERR_OBJ_DEL;
+                 break;
+
+            default:
+                *p_err = OS_ERR_STATUS_INVALID;
+        }
+    CPU_CRITICAL_EXIT();
+    } else {
+       *p_err = OS_ERR_NONE;
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                           CLEAR THE CONTENTS OF A MONITOR
+*
+* Description: This function is called by OSMonDel() to clear the contents of a monitor
+*
+
+* Argument(s): p_mon      is a pointer to the monitor to clear
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_MonClr (OS_MON  *p_mon)
+{
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_mon->Type       = OS_OBJ_TYPE_NONE;                       /* Mark the data structure as a NONE                    */
+#endif
+    p_mon->MonDataPtr = DEF_NULL;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_mon->NamePtr    = (CPU_CHAR *)((void *)"?MON");
+#endif
+    OS_PendListInit(&p_mon->PendList);                          /* Initialize the waiting list                          */
+}
+
+/*
+************************************************************************************************************************
+*                                        ADD/REMOVE MONITOR TO/FROM DEBUG LIST
+*
+* Description: These functions are called by uC/OS-III to add or remove a monitor to/from the debug list.
+*
+* Arguments  : p_mon     is a pointer to the monitor to add/remove
+*
+* Returns    : none
+*
+* Note(s)    : These functions are INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void  OS_MonDbgListAdd (OS_MON  *p_mon)
+{
+    p_mon->DbgNamePtr               = (CPU_CHAR *)((void *)" ");
+    p_mon->DbgPrevPtr               = DEF_NULL;
+    if (OSMonDbgListPtr == DEF_NULL) {
+        p_mon->DbgNextPtr           = DEF_NULL;
+    } else {
+        p_mon->DbgNextPtr           =  OSMonDbgListPtr;
+        OSMonDbgListPtr->DbgPrevPtr =  p_mon;
+    }
+    OSMonDbgListPtr                 =  p_mon;
+}
+
+
+
+void  OS_MonDbgListRemove (OS_MON  *p_mon)
+{
+    OS_MON  *p_mon_next;
+    OS_MON  *p_mon_prev;
+
+
+    p_mon_prev = p_mon->DbgPrevPtr;
+    p_mon_next = p_mon->DbgNextPtr;
+
+    if (p_mon_prev == DEF_NULL) {
+        OSMonDbgListPtr = p_mon_next;
+        if (p_mon_next != DEF_NULL) {
+            p_mon_next->DbgPrevPtr = DEF_NULL;
+        }
+        p_mon->DbgNextPtr = DEF_NULL;
+
+    } else if (p_mon_next == DEF_NULL) {
+        p_mon_prev->DbgNextPtr = DEF_NULL;
+        p_mon->DbgPrevPtr      = DEF_NULL;
+
+    } else {
+        p_mon_prev->DbgNextPtr =  p_mon_next;
+        p_mon_next->DbgPrevPtr =  p_mon_prev;
+        p_mon->DbgNextPtr      = DEF_NULL;
+        p_mon->DbgPrevPtr      = DEF_NULL;
+    }
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_msg.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_msg.c
new file mode 100644
index 0000000..0faa5f5
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_msg.c
@@ -0,0 +1,358 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                              MESSAGE HANDLING SERVICES
+*
+* File    : OS_MSG.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_msg__c = "$Id: $";
+#endif
+
+
+#if (OS_MSG_EN == DEF_ENABLED)
+
+/*
+************************************************************************************************************************
+*                                            INITIALIZE THE POOL OF 'OS_MSG'
+*
+* Description: This function is called by OSInit() to initialize the free list of OS_MSGs.
+*
+* Argument(s): p_err     is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_MSG_POOL_NULL_PTR
+*                            OS_ERR_MSG_POOL_EMPTY
+*                            OS_ERR_NONE
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_MsgPoolInit (OS_ERR  *p_err)
+{
+    OS_MSG      *p_msg1;
+    OS_MSG      *p_msg2;
+    OS_MSG_QTY   i;
+    OS_MSG_QTY   loops;
+
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (OSCfg_MsgPoolBasePtr == DEF_NULL) {
+       *p_err = OS_ERR_MSG_POOL_NULL_PTR;
+        return;
+    }
+    if (OSCfg_MsgPoolSize == 0u) {
+       *p_err = OS_ERR_MSG_POOL_EMPTY;
+        return;
+    }
+#endif
+
+    p_msg1 = OSCfg_MsgPoolBasePtr;
+    p_msg2 = OSCfg_MsgPoolBasePtr;
+    p_msg2++;
+    loops  = OSCfg_MsgPoolSize - 1u;
+    for (i = 0u; i < loops; i++) {                              /* Init. list of free OS_MSGs                           */
+        p_msg1->NextPtr = p_msg2;
+        p_msg1->MsgPtr  = DEF_NULL;
+        p_msg1->MsgSize = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        p_msg1->MsgTS   = 0u;
+#endif
+        p_msg1++;
+        p_msg2++;
+    }
+    p_msg1->NextPtr = DEF_NULL;                                 /* Last OS_MSG                                          */
+    p_msg1->MsgPtr  = DEF_NULL;
+    p_msg1->MsgSize = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_msg1->MsgTS   = 0u;
+#endif
+
+    OSMsgPool.NextPtr    = OSCfg_MsgPoolBasePtr;
+    OSMsgPool.NbrFree    = OSCfg_MsgPoolSize;
+    OSMsgPool.NbrUsed    = 0u;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSMsgPool.NbrUsedMax = 0u;
+#endif
+   *p_err                =  OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                        RELEASE ALL MESSAGE IN MESSAGE QUEUE
+*
+* Description: This function returns all the messages in a message queue to the free list.
+*
+* Arguments  : p_msg_q       is a pointer to the OS_MSG_Q structure containing messages to free.
+*              -------
+*
+* Returns    : the number of OS_MSGs returned to the free list
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+OS_MSG_QTY  OS_MsgQFreeAll (OS_MSG_Q  *p_msg_q)
+{
+    OS_MSG      *p_msg;
+    OS_MSG_QTY   qty;
+
+
+
+    qty = p_msg_q->NbrEntries;                                  /* Get the number of OS_MSGs being freed                */
+    if (p_msg_q->NbrEntries > 0u) {
+        p_msg                   = p_msg_q->InPtr;               /* Point to end of message chain                        */
+        p_msg->NextPtr          = OSMsgPool.NextPtr;
+        OSMsgPool.NextPtr       = p_msg_q->OutPtr;              /* Point to beginning of message chain                  */
+        OSMsgPool.NbrUsed      -= p_msg_q->NbrEntries;          /* Update statistics for free list of messages          */
+        OSMsgPool.NbrFree      += p_msg_q->NbrEntries;
+        p_msg_q->NbrEntries     = 0u;                           /* Flush the message queue                              */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_msg_q->NbrEntriesMax  = 0u;
+#endif
+        p_msg_q->InPtr          = DEF_NULL;
+        p_msg_q->OutPtr         = DEF_NULL;
+    }
+    return (qty);
+}
+
+
+/*
+************************************************************************************************************************
+*                                               INITIALIZE A MESSAGE QUEUE
+*
+* Description: This function is called to initialize a message queue
+*
+* Arguments  : p_msg_q      is a pointer to the message queue to initialize
+*              -------
+*
+*              max          is the maximum number of entries that a message queue can have.
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_MsgQInit (OS_MSG_Q    *p_msg_q,
+                   OS_MSG_QTY   size)
+{
+    p_msg_q->NbrEntriesSize = size;
+    p_msg_q->NbrEntries     = 0u;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_msg_q->NbrEntriesMax  = 0u;
+#endif
+    p_msg_q->InPtr          = DEF_NULL;
+    p_msg_q->OutPtr         = DEF_NULL;
+}
+
+
+/*
+************************************************************************************************************************
+*                                           RETRIEVE MESSAGE FROM MESSAGE QUEUE
+*
+* Description: This function retrieves a message from a message queue
+*
+* Arguments  : p_msg_q     is a pointer to the message queue where we want to extract the message from
+*              -------
+*
+*              p_msg_size  is a pointer to where the size (in bytes) of the message will be placed
+*
+*              p_ts        is a pointer to where the time stamp will be placed
+*
+*              p_err       is a pointer to an error code that will be returned from this call.
+*
+*                              OS_ERR_Q_EMPTY
+*                              OS_ERR_NONE
+*
+* Returns    : The message (a pointer)
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  *OS_MsgQGet (OS_MSG_Q     *p_msg_q,
+                   OS_MSG_SIZE  *p_msg_size,
+                   CPU_TS       *p_ts,
+                   OS_ERR       *p_err)
+{
+    OS_MSG  *p_msg;
+    void    *p_void;
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)p_ts;                                                 /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    if (p_msg_q->NbrEntries == 0u) {                            /* Is the queue empty?                                  */
+       *p_msg_size = 0u;                                        /* Yes                                                  */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        if (p_ts != DEF_NULL) {
+           *p_ts = 0u;
+        }
+#endif
+       *p_err = OS_ERR_Q_EMPTY;
+        return (DEF_NULL);
+    }
+
+    p_msg           = p_msg_q->OutPtr;                          /* No, get the next message to extract from the queue   */
+    p_void          = p_msg->MsgPtr;
+   *p_msg_size      = p_msg->MsgSize;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    if (p_ts != DEF_NULL) {
+       *p_ts = p_msg->MsgTS;
+    }
+#endif
+
+    p_msg_q->OutPtr = p_msg->NextPtr;                           /* Point to next message to extract                     */
+
+    if (p_msg_q->OutPtr == DEF_NULL) {                          /* Are there any more messages in the queue?            */
+        p_msg_q->InPtr      = DEF_NULL;                         /* No                                                   */
+        p_msg_q->NbrEntries = 0u;
+    } else {
+        p_msg_q->NbrEntries--;                                  /* Yes, One less message in the queue                   */
+    }
+
+    p_msg->NextPtr    = OSMsgPool.NextPtr;                      /* Return message control block to free list            */
+    OSMsgPool.NextPtr = p_msg;
+    OSMsgPool.NbrFree++;
+    OSMsgPool.NbrUsed--;
+
+   *p_err             = OS_ERR_NONE;
+    return (p_void);
+}
+
+
+/*
+************************************************************************************************************************
+*                                           DEPOSIT MESSAGE IN MESSAGE QUEUE
+*
+* Description: This function places a message in a message queue
+*
+* Arguments  : p_msg_q     is a pointer to the OS_TCB of the task to post the message to
+*              -------
+*
+*              p_void      is a pointer to the message to send.
+*
+*              msg_size    is the size of the message (in bytes)
+*
+*              opt         specifies whether the message will be posted in FIFO or LIFO order
+*
+*                              OS_OPT_POST_FIFO
+*                              OS_OPT_POST_LIFO
+*
+*              ts          is a timestamp as to when the message was posted
+*
+*              p_err       is a pointer to a variable that will contain an error code returned by this function.
+*
+*                              OS_ERR_Q_MAX           if the queue is full
+*                              OS_ERR_MSG_POOL_EMPTY  if we no longer have any OS_MSG to use
+*                              OS_ERR_NONE            the message was deposited in the queue
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_MsgQPut (OS_MSG_Q     *p_msg_q,
+                  void         *p_void,
+                  OS_MSG_SIZE   msg_size,
+                  OS_OPT        opt,
+                  CPU_TS        ts,
+                  OS_ERR       *p_err)
+{
+    OS_MSG  *p_msg;
+    OS_MSG  *p_msg_in;
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    if (p_msg_q->NbrEntries >= p_msg_q->NbrEntriesSize) {
+       *p_err = OS_ERR_Q_MAX;                                   /* Message queue cannot accept any more messages        */
+        return;
+    }
+
+    if (OSMsgPool.NbrFree == 0u) {
+       *p_err = OS_ERR_MSG_POOL_EMPTY;                          /* No more OS_MSG to use                                */
+        return;
+    }
+
+    p_msg             = OSMsgPool.NextPtr;                      /* Remove message control block from free list          */
+    OSMsgPool.NextPtr = p_msg->NextPtr;
+    OSMsgPool.NbrFree--;
+    OSMsgPool.NbrUsed++;
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    if (OSMsgPool.NbrUsedMax < OSMsgPool.NbrUsed) {
+        OSMsgPool.NbrUsedMax = OSMsgPool.NbrUsed;
+    }
+#endif
+
+    if (p_msg_q->NbrEntries == 0u) {                            /* Is this first message placed in the queue?           */
+        p_msg_q->InPtr         = p_msg;                         /* Yes                                                  */
+        p_msg_q->OutPtr        = p_msg;
+        p_msg_q->NbrEntries    = 1u;
+        p_msg->NextPtr         = DEF_NULL;
+    } else {                                                    /* No                                                   */
+        if ((opt & OS_OPT_POST_LIFO) == OS_OPT_POST_FIFO) {     /* Is it FIFO or LIFO?                                  */
+            p_msg_in           = p_msg_q->InPtr;                /* FIFO, add to the head                                */
+            p_msg_in->NextPtr  = p_msg;
+            p_msg_q->InPtr     = p_msg;
+            p_msg->NextPtr     = DEF_NULL;
+        } else {
+            p_msg->NextPtr     = p_msg_q->OutPtr;               /* LIFO, add to the tail                                */
+            p_msg_q->OutPtr    = p_msg;
+        }
+        p_msg_q->NbrEntries++;
+    }
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    if (p_msg_q->NbrEntriesMax < p_msg_q->NbrEntries) {
+        p_msg_q->NbrEntriesMax = p_msg_q->NbrEntries;
+    }
+#endif
+
+    p_msg->MsgPtr  = p_void;                                    /* Deposit message in the message queue entry           */
+    p_msg->MsgSize = msg_size;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_msg->MsgTS   = ts;
+#endif
+   *p_err          = OS_ERR_NONE;
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_mutex.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_mutex.c
new file mode 100644
index 0000000..342ed8a
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_mutex.c
@@ -0,0 +1,1162 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                   MUTEX MANAGEMENT
+*
+* File    : OS_MUTEX.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_mutex__c = "$Id: $";
+#endif
+
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+/*
+************************************************************************************************************************
+*                                                   CREATE A MUTEX
+*
+* Description: This function creates a mutex.
+*
+* Arguments  : p_mutex       is a pointer to the mutex to initialize.  Your application is responsible for allocating
+*                            storage for the mutex.
+*
+*              p_name        is a pointer to the name you would like to give the mutex.
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE                    If the call was successful
+*                                OS_ERR_CREATE_ISR              If you called this function from an ISR
+*                                OS_ERR_ILLEGAL_CREATE_RUN_TIME If you are trying to create the mutex after you called
+*                                                                 OSStart()
+*                                OS_ERR_OBJ_PTR_NULL            If 'p_mutex' is a NULL pointer
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSMutexCreate (OS_MUTEX  *p_mutex,
+                     CPU_CHAR  *p_name,
+                     OS_ERR    *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_CREATE_RUN_TIME;
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to be called from an ISR                 */
+       *p_err = OS_ERR_CREATE_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_mutex == DEF_NULL) {                                  /* Validate 'p_mutex'                                   */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+#endif
+
+    OS_CRITICAL_ENTER();
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_mutex->Type              =  OS_OBJ_TYPE_MUTEX;            /* Mark the data structure as a mutex                   */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_mutex->NamePtr           =  p_name;
+#else
+    (void)&p_name;
+#endif
+    p_mutex->MutexGrpNextPtr   = DEF_NULL;
+    p_mutex->OwnerTCBPtr       = DEF_NULL;
+    p_mutex->OwnerNestingCtr   = 0u;                            /* Mutex is available                                   */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_mutex->TS                = 0u;
+#endif
+    OS_PendListInit(&p_mutex->PendList);                        /* Initialize the waiting list                          */
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_MutexDbgListAdd(p_mutex);
+    OSMutexQty++;
+#endif
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_MUTEX_CREATE(p_mutex, p_name);                     /* Record the event.                                    */
+#endif
+
+    OS_CRITICAL_EXIT_NO_SCHED();
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                                   DELETE A MUTEX
+*
+* Description: This function deletes a mutex and readies all tasks pending on the mutex.
+*
+* Arguments  : p_mutex       is a pointer to the mutex to delete
+*
+*              opt           determines delete options as follows:
+*
+*                                OS_OPT_DEL_NO_PEND          Delete mutex ONLY if no task pending
+*                                OS_OPT_DEL_ALWAYS           Deletes the mutex even if tasks are waiting.
+*                                                            In this case, all the tasks pending will be readied.
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE                    The call was successful and the mutex was deleted
+*                                OS_ERR_DEL_ISR                 If you attempted to delete the mutex from an ISR
+*                                OS_ERR_ILLEGAL_DEL_RUN_TIME    If you are trying to delete the mutex after you called
+*                                                                 OSStart()
+*                                OS_ERR_OBJ_PTR_NULL            If 'p_mutex' is a NULL pointer
+*                                OS_ERR_OBJ_TYPE                If 'p_mutex' is not pointing to a mutex
+*                                OS_ERR_OPT_INVALID             An invalid option was specified
+*                                OS_ERR_OS_NOT_RUNNING          If uC/OS-III is not running yet
+*                                OS_ERR_TASK_WAITING            One or more tasks were waiting on the mutex
+*
+* Returns    : == 0          if no tasks were waiting on the mutex, or upon error.
+*              >  0          if one or more tasks waiting on the mutex are now readied and informed.
+*
+* Note(s)    : 1) This function must be used with care.  Tasks that would normally expect the presence of the mutex MUST
+*                 check the return code of OSMutexPend().
+*
+*              2) Because ALL tasks pending on the mutex will be readied, you MUST be careful in applications where the
+*                 mutex is used for mutual exclusion because the resource(s) will no longer be guarded by the mutex.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_MUTEX_DEL_EN == DEF_ENABLED)
+OS_OBJ_QTY  OSMutexDel (OS_MUTEX  *p_mutex,
+                        OS_OPT     opt,
+                        OS_ERR    *p_err)
+{
+    OS_OBJ_QTY     nbr_tasks;
+    OS_PEND_DATA  *p_pend_data;
+    OS_PEND_LIST  *p_pend_list;
+    OS_TCB        *p_tcb;
+    OS_TCB        *p_tcb_owner;
+    CPU_TS         ts;
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    OS_PRIO        prio_new;
+#endif
+    CPU_SR_ALLOC();
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_DEL_RUN_TIME;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                /* Not allowed to delete a mutex from an ISR            */
+       *p_err = OS_ERR_DEL_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_mutex == DEF_NULL) {                                  /* Validate 'p_mutex'                                   */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_mutex->Type != OS_OBJ_TYPE_MUTEX) {                   /* Make sure mutex was created                          */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    OS_CRITICAL_ENTER();
+    p_pend_list = &p_mutex->PendList;
+    nbr_tasks   = 0u;
+    switch (opt) {
+        case OS_OPT_DEL_NO_PEND:                                /* Delete mutex only if no task waiting                 */
+             if (p_pend_list->HeadPtr == DEF_NULL) {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                 OS_MutexDbgListRemove(p_mutex);
+                 OSMutexQty--;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                 TRACE_OS_MUTEX_DEL(p_mutex);                   /* Record the event.                                    */
+#endif
+                 if (p_mutex->OwnerTCBPtr != DEF_NULL) {        /* Does the mutex belong to a task?                     */
+                     OS_MutexGrpRemove(p_mutex->OwnerTCBPtr, p_mutex); /* yes, remove it from the task group.           */
+                 }
+                 OS_MutexClr(p_mutex);
+                 OS_CRITICAL_EXIT();
+                *p_err = OS_ERR_NONE;
+             } else {
+                 OS_CRITICAL_EXIT();
+                *p_err = OS_ERR_TASK_WAITING;
+             }
+             break;
+
+        case OS_OPT_DEL_ALWAYS:                                 /* Always delete the mutex                              */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             ts = OS_TS_GET();                                  /* Get timestamp                                        */
+#else
+             ts = 0u;
+#endif
+             while (p_pend_list->HeadPtr != DEF_NULL) {         /* Remove all tasks from the pend list                  */
+                 p_pend_data = p_pend_list->HeadPtr;
+                 p_tcb       = p_pend_data->TCBPtr;
+                 OS_PendObjDel((OS_PEND_OBJ *)((void *)p_mutex),
+                               p_tcb,
+                               ts);
+                 nbr_tasks++;
+             }
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+             OS_MutexDbgListRemove(p_mutex);
+             OSMutexQty--;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_MUTEX_DEL(p_mutex);                       /* Record the event.                                    */
+#endif
+
+             p_tcb_owner = p_mutex->OwnerTCBPtr;
+             if (p_tcb_owner != DEF_NULL) {                     /* Does the mutex belong to a task?                     */
+                 OS_MutexGrpRemove(p_tcb_owner, p_mutex);       /* yes, remove it from the task group.                  */
+             }
+
+
+             if (p_tcb_owner != DEF_NULL) {                     /* Did we had to change the prio of owner?              */
+                 if (p_tcb_owner->Prio != p_tcb_owner->BasePrio) {
+                     prio_new = OS_MutexGrpPrioFindHighest(p_tcb_owner);
+                     prio_new = prio_new > p_tcb_owner->BasePrio ? p_tcb_owner->BasePrio : prio_new;
+                     OS_TaskChangePrio(p_tcb_owner, prio_new);
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                     TRACE_OS_MUTEX_TASK_PRIO_DISINHERIT(p_tcb_owner, p_tcb_owner->Prio)
+#endif
+                 }
+             }
+
+             OS_MutexClr(p_mutex);
+             OS_CRITICAL_EXIT_NO_SCHED();
+             OSSched();                                         /* Find highest priority task ready to run              */
+            *p_err = OS_ERR_NONE;
+             break;
+
+        default:
+             OS_CRITICAL_EXIT();
+            *p_err = OS_ERR_OPT_INVALID;
+             break;
+    }
+    return (nbr_tasks);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                    PEND ON MUTEX
+*
+* Description: This function waits for a mutex.
+*
+* Arguments  : p_mutex       is a pointer to the mutex
+*
+*              timeout       is an optional timeout period (in clock ticks).  If non-zero, your task will wait for the
+*                            resource up to the amount of time (in 'ticks') specified by this argument.  If you specify
+*                            0, however, your task will wait forever at the specified mutex or, until the resource
+*                            becomes available.
+*
+*              opt           determines whether the user wants to block if the mutex is not available or not:
+*
+*                                OS_OPT_PEND_BLOCKING
+*                                OS_OPT_PEND_NON_BLOCKING
+*
+*              p_ts          is a pointer to a variable that will receive the timestamp of when the mutex was posted or
+*                            pend aborted or the mutex deleted.  If you pass a NULL pointer (i.e. (CPU_TS *)0) then you
+*                            will not get the timestamp.  In other words, passing a NULL pointer is valid and indicates
+*                            that you don't need the timestamp.
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE               The call was successful and your task owns the resource
+*                                OS_ERR_MUTEX_OWNER        If calling task already owns the mutex
+*                                OS_ERR_MUTEX_OVF          Mutex nesting counter overflowed
+*                                OS_ERR_OBJ_DEL            If 'p_mutex' was deleted
+*                                OS_ERR_OBJ_PTR_NULL       If 'p_mutex' is a NULL pointer
+*                                OS_ERR_OBJ_TYPE           If 'p_mutex' is not pointing at a mutex
+*                                OS_ERR_OPT_INVALID        If you didn't specify a valid option
+*                                OS_ERR_OS_NOT_RUNNING     If uC/OS-III is not running yet
+*                                OS_ERR_PEND_ABORT         If the pend was aborted by another task
+*                                OS_ERR_PEND_ISR           If you called this function from an ISR and the result
+*                                                          would lead to a suspension
+*                                OS_ERR_PEND_WOULD_BLOCK   If you specified non-blocking but the mutex was not
+*                                                          available
+*                                OS_ERR_SCHED_LOCKED       If you called this function when the scheduler is locked
+*                                OS_ERR_STATUS_INVALID     If the pend status has an invalid value
+*                                OS_ERR_TIMEOUT            The mutex was not received within the specified timeout
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSMutexPend (OS_MUTEX  *p_mutex,
+                   OS_TICK    timeout,
+                   OS_OPT     opt,
+                   CPU_TS    *p_ts,
+                   OS_ERR    *p_err)
+{
+    OS_PEND_DATA  pend_data;
+    OS_TCB       *p_tcb;
+    CPU_SR_ALLOC();
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)&p_ts;                                                /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MUTEX_PEND_FAILED(p_mutex);                    /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_PEND_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_mutex == DEF_NULL) {                                  /* Validate arguments                                   */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MUTEX_PEND_FAILED(p_mutex);                    /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_PEND_BLOCKING:
+        case OS_OPT_PEND_NON_BLOCKING:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_MUTEX_PEND_FAILED(p_mutex);               /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OPT_INVALID;
+             return;
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_mutex->Type != OS_OBJ_TYPE_MUTEX) {                   /* Make sure mutex was created                          */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MUTEX_PEND_FAILED(p_mutex);                    /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_TYPE;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (p_mutex->OwnerNestingCtr == 0u) {                       /* Resource available?                                  */
+        p_mutex->OwnerTCBPtr     = OSTCBCurPtr;                 /* Yes, caller may proceed                              */
+        p_mutex->OwnerNestingCtr = 1u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        if (p_ts != DEF_NULL) {
+           *p_ts = p_mutex->TS;
+        }
+#endif
+        OS_MutexGrpAdd(OSTCBCurPtr, p_mutex);                   /* Add mutex to owner's group                           */
+        CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MUTEX_PEND(p_mutex);                           /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_NONE;
+        return;
+    }
+
+    if (OSTCBCurPtr == p_mutex->OwnerTCBPtr) {                  /* See if current task is already the owner of the mutex*/
+        if (p_mutex->OwnerNestingCtr == (OS_NESTING_CTR)-1) {
+            CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+            TRACE_OS_MUTEX_PEND_FAILED(p_mutex);                /* Record the event.                                    */
+#endif
+           *p_err = OS_ERR_MUTEX_OVF;
+            return;
+        }
+        p_mutex->OwnerNestingCtr++;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        if (p_ts != DEF_NULL) {
+           *p_ts = p_mutex->TS;
+        }
+#endif
+        CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MUTEX_PEND_FAILED(p_mutex);                    /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_MUTEX_OWNER;                             /* Indicate that current task already owns the mutex    */
+        return;
+    }
+
+    if ((opt & OS_OPT_PEND_NON_BLOCKING) != 0u) {               /* Caller wants to block if not available?              */
+        CPU_CRITICAL_EXIT();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        if (p_ts != DEF_NULL) {
+           *p_ts = 0u;
+        }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MUTEX_PEND_FAILED(p_mutex);                    /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_PEND_WOULD_BLOCK;                        /* No                                                   */
+        return;
+    } else {
+        if (OSSchedLockNestingCtr > 0u) {                       /* Can't pend when the scheduler is locked              */
+            CPU_CRITICAL_EXIT();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+            if (p_ts != DEF_NULL) {
+               *p_ts = 0u;
+            }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+            TRACE_OS_MUTEX_PEND_FAILED(p_mutex);                /* Record the event.                                    */
+#endif
+           *p_err = OS_ERR_SCHED_LOCKED;
+            return;
+        }
+    }
+                                                                /* Lock the scheduler/re-enable interrupts              */
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    p_tcb = p_mutex->OwnerTCBPtr;                               /* Point to the TCB of the Mutex owner                  */
+    if (p_tcb->Prio > OSTCBCurPtr->Prio) {                      /* See if mutex owner has a lower priority than current */
+        OS_TaskChangePrio(p_tcb, OSTCBCurPtr->Prio);
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                 TRACE_OS_MUTEX_TASK_PRIO_INHERIT(p_tcb, p_tcb->Prio);
+#endif
+    }
+
+    OS_Pend(&pend_data,                                         /* Block task pending on Mutex                          */
+            (OS_PEND_OBJ *)((void *)p_mutex),
+             OS_TASK_PEND_ON_MUTEX,
+             timeout);
+
+    OS_CRITICAL_EXIT_NO_SCHED();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_MUTEX_PEND_BLOCK(p_mutex);                         /* Record the event.                                    */
+#endif
+    OSSched();                                                  /* Find the next highest priority task ready to run     */
+
+    CPU_CRITICAL_ENTER();
+    switch (OSTCBCurPtr->PendStatus) {
+        case OS_STATUS_PEND_OK:                                 /* We got the mutex                                     */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_MUTEX_PEND(p_mutex);                      /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_NONE;
+             break;
+
+        case OS_STATUS_PEND_ABORT:                              /* Indicate that we aborted                             */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_MUTEX_PEND_FAILED(p_mutex);               /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_PEND_ABORT;
+             break;
+
+        case OS_STATUS_PEND_TIMEOUT:                            /* Indicate that we didn't get mutex within timeout     */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = 0u;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_MUTEX_PEND_FAILED(p_mutex);               /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_TIMEOUT;
+             break;
+
+        case OS_STATUS_PEND_DEL:                                /* Indicate that object pended on has been deleted      */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_MUTEX_PEND_FAILED(p_mutex);               /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OBJ_DEL;
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_MUTEX_PEND_FAILED(p_mutex);               /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_STATUS_INVALID;
+             break;
+    }
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+************************************************************************************************************************
+*                                               ABORT WAITING ON A MUTEX
+*
+* Description: This function aborts & readies any tasks currently waiting on a mutex.  This function should be used
+*              to fault-abort the wait on the mutex, rather than to normally signal the mutex via OSMutexPost().
+*
+* Arguments  : p_mutex       is a pointer to the mutex
+*
+*              opt           determines the type of ABORT performed:
+*
+*                                OS_OPT_PEND_ABORT_1          ABORT wait for a single task (HPT) waiting on the mutex
+*                                OS_OPT_PEND_ABORT_ALL        ABORT wait for ALL tasks that are  waiting on the mutex
+*                                OS_OPT_POST_NO_SCHED         Do not call the scheduler
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE               At least one task waiting on the mutex was readied and
+*                                                          informed of the aborted wait; check return value for the
+*                                                          number of tasks whose wait on the mutex was aborted
+*                                OS_ERR_OBJ_PTR_NULL       If 'p_mutex' is a NULL pointer
+*                                OS_ERR_OBJ_TYPE           If 'p_mutex' is not pointing at a mutex
+*                                OS_ERR_OPT_INVALID        If you specified an invalid option
+*                                OS_ERR_OS_NOT_RUNNING     If uC/OS-III is not running yet
+*                                OS_ERR_PEND_ABORT_ISR     If you attempted to call this function from an ISR
+*                                OS_ERR_PEND_ABORT_NONE    No task were pending
+*
+* Returns    : == 0          if no tasks were waiting on the mutex, or upon error.
+*              >  0          if one or more tasks waiting on the mutex are now readied and informed.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_MUTEX_PEND_ABORT_EN == DEF_ENABLED)
+OS_OBJ_QTY  OSMutexPendAbort (OS_MUTEX  *p_mutex,
+                              OS_OPT     opt,
+                              OS_ERR    *p_err)
+{
+    OS_PEND_LIST  *p_pend_list;
+    OS_TCB        *p_tcb;
+    OS_TCB        *p_tcb_owner;
+    CPU_TS         ts;
+    OS_OBJ_QTY     nbr_tasks;
+    OS_PRIO        prio_new;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_OBJ_QTY)0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to Pend Abort from an ISR                */
+       *p_err =  OS_ERR_PEND_ABORT_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_mutex == DEF_NULL) {                                  /* Validate 'p_mutex'                                   */
+       *p_err =  OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_PEND_ABORT_1:
+        case OS_OPT_PEND_ABORT_ALL:
+        case OS_OPT_PEND_ABORT_1   | OS_OPT_POST_NO_SCHED:
+        case OS_OPT_PEND_ABORT_ALL | OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+            *p_err =  OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_mutex->Type != OS_OBJ_TYPE_MUTEX) {                   /* Make sure mutex was created                          */
+       *p_err =  OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    p_pend_list = &p_mutex->PendList;
+    if (p_pend_list->HeadPtr == DEF_NULL) {                     /* Any task waiting on mutex?                           */
+        CPU_CRITICAL_EXIT();                                    /* No                                                   */
+       *p_err =  OS_ERR_PEND_ABORT_NONE;
+        return (0u);
+    }
+
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    nbr_tasks = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts        = OS_TS_GET();                                    /* Get local time stamp so all tasks get the same time  */
+#else
+    ts        = 0u;
+#endif
+    while (p_pend_list->HeadPtr != DEF_NULL) {
+        p_tcb = p_pend_list->HeadPtr->TCBPtr;
+
+        OS_PendAbort((OS_PEND_OBJ *)((void *)p_mutex),
+                     p_tcb,
+                     ts);
+
+        p_tcb_owner = p_mutex->OwnerTCBPtr;
+        prio_new    = p_tcb_owner->Prio;
+        if ((p_tcb_owner->Prio != p_tcb_owner->BasePrio) &&
+            (p_tcb_owner->Prio == p_tcb->Prio)) {               /* Has the owner inherited a priority?                  */
+            prio_new = OS_MutexGrpPrioFindHighest(p_tcb_owner);
+            prio_new = prio_new > p_tcb_owner->BasePrio ? p_tcb_owner->BasePrio : prio_new;
+        }
+
+        if(prio_new != p_tcb_owner->Prio) {
+            OS_TaskChangePrio(p_tcb_owner, prio_new);
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                          TRACE_OS_MUTEX_TASK_PRIO_DISINHERIT(p_tcb_owner, p_tcb_owner->Prio);
+#endif
+        }
+
+        nbr_tasks++;
+        if (opt != OS_OPT_PEND_ABORT_ALL) {                     /* Pend abort all tasks waiting?                        */
+            break;                                              /* No                                                   */
+        }
+    }
+    OS_CRITICAL_EXIT_NO_SCHED();
+
+    if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+        OSSched();                                              /* Run the scheduler                                    */
+    }
+
+   *p_err = OS_ERR_NONE;
+    return (nbr_tasks);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                   POST TO A MUTEX
+*
+* Description: This function signals a mutex.
+*
+* Arguments  : p_mutex       is a pointer to the mutex
+*
+*              opt           is an option you can specify to alter the behavior of the post.  The choices are:
+*
+*                                OS_OPT_POST_NONE        No special option selected
+*                                OS_OPT_POST_NO_SCHED    If you don't want the scheduler to be called after the post.
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE               The call was successful and the mutex was signaled
+*                                OS_ERR_MUTEX_NESTING      Mutex owner nested its use of the mutex
+*                                OS_ERR_MUTEX_NOT_OWNER    If the task posting is not the Mutex owner
+*                                OS_ERR_OBJ_PTR_NULL       If 'p_mutex' is a NULL pointer
+*                                OS_ERR_OBJ_TYPE           If 'p_mutex' is not pointing at a mutex
+*                                OS_ERR_OPT_INVALID        If you specified an invalid option
+*                                OS_ERR_OS_NOT_RUNNING     If uC/OS-III is not running yet
+*                                OS_ERR_POST_ISR           If you attempted to post from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSMutexPost (OS_MUTEX  *p_mutex,
+                   OS_OPT     opt,
+                   OS_ERR    *p_err)
+{
+    OS_PEND_LIST  *p_pend_list;
+    OS_TCB        *p_tcb;
+    CPU_TS         ts;
+    OS_PRIO        prio_new;
+    CPU_SR_ALLOC();
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MUTEX_POST_FAILED(p_mutex);                    /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_POST_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_mutex == DEF_NULL) {                                  /* Validate 'p_mutex'                                   */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MUTEX_POST_FAILED(p_mutex);                    /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_POST_NONE:
+        case OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_MUTEX_POST_FAILED(p_mutex);               /* Record the event.                                    */
+#endif
+            *p_err =  OS_ERR_OPT_INVALID;
+             return;
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_mutex->Type != OS_OBJ_TYPE_MUTEX) {                   /* Make sure mutex was created                          */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MUTEX_POST_FAILED(p_mutex);                    /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_TYPE;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (OSTCBCurPtr != p_mutex->OwnerTCBPtr) {                  /* Make sure the mutex owner is releasing the mutex     */
+        CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_MUTEX_POST_FAILED(p_mutex);                    /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_MUTEX_NOT_OWNER;
+        return;
+    }
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_MUTEX_POST(p_mutex);                               /* Record the event.                                    */
+#endif
+
+    OS_CRITICAL_ENTER_CPU_EXIT();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts          = OS_TS_GET();                                  /* Get timestamp                                        */
+    p_mutex->TS = ts;
+#else
+    ts          = 0u;
+#endif
+    p_mutex->OwnerNestingCtr--;                                 /* Decrement owner's nesting counter                    */
+    if (p_mutex->OwnerNestingCtr > 0u) {                        /* Are we done with all nestings?                       */
+        OS_CRITICAL_EXIT();                                     /* No                                                   */
+       *p_err = OS_ERR_MUTEX_NESTING;
+        return;
+    }
+
+    OS_MutexGrpRemove(OSTCBCurPtr, p_mutex);                    /* Remove mutex from owner's group                      */
+
+    p_pend_list = &p_mutex->PendList;
+    if (p_pend_list->HeadPtr == DEF_NULL) {                      /* Any task waiting on mutex?                           */
+        p_mutex->OwnerTCBPtr     = DEF_NULL;                    /* No                                                   */
+        p_mutex->OwnerNestingCtr = 0u;
+        OS_CRITICAL_EXIT();
+       *p_err = OS_ERR_NONE;
+        return;
+    }
+                                                                /* Yes                                                  */
+    if (OSTCBCurPtr->Prio != OSTCBCurPtr->BasePrio) {           /* Has owner inherited a priority?                      */
+        prio_new = OS_MutexGrpPrioFindHighest(OSTCBCurPtr);     /* Yes, find highest priority pending                   */
+        prio_new = prio_new > OSTCBCurPtr->BasePrio ? OSTCBCurPtr->BasePrio : prio_new;
+        if (prio_new > OSTCBCurPtr->Prio) {
+            OS_RdyListRemove(OSTCBCurPtr);
+            OSTCBCurPtr->Prio = prio_new;                       /* Lower owner's priority back to its original one      */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+            TRACE_OS_MUTEX_TASK_PRIO_DISINHERIT(OSTCBCurPtr, prio_new);
+#endif
+            OS_PrioInsert(prio_new);
+            OS_RdyListInsertTail(OSTCBCurPtr);                  /* Insert owner in ready list at new priority           */
+            OSPrioCur         = prio_new;
+        }
+    }
+                                                                /* Get TCB from head of pend list                       */
+    p_tcb                      = p_pend_list->HeadPtr->TCBPtr;
+    p_mutex->OwnerTCBPtr       = p_tcb;                         /* Give mutex to new owner                              */
+    p_mutex->OwnerNestingCtr   = 1u;
+    OS_MutexGrpAdd(p_tcb, p_mutex);
+                                                                /* Post to mutex                                        */
+    OS_Post((OS_PEND_OBJ *)((void *)p_mutex),
+            p_tcb,
+            DEF_NULL,
+            0u,
+            ts);
+
+    OS_CRITICAL_EXIT_NO_SCHED();
+
+    if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+        OSSched();                                              /* Run the scheduler                                    */
+    }
+
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                            CLEAR THE CONTENTS OF A MUTEX
+*
+* Description: This function is called by OSMutexDel() to clear the contents of a mutex
+*
+
+* Argument(s): p_mutex      is a pointer to the mutex to clear
+*              -------
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_MutexClr (OS_MUTEX  *p_mutex)
+{
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_mutex->Type              =  OS_OBJ_TYPE_NONE;             /* Mark the data structure as a NONE                    */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_mutex->NamePtr           = (CPU_CHAR *)((void *)"?MUTEX");
+#endif
+    p_mutex->MutexGrpNextPtr   = DEF_NULL;
+    p_mutex->OwnerTCBPtr       = DEF_NULL;
+    p_mutex->OwnerNestingCtr   = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_mutex->TS                = 0u;
+#endif
+    OS_PendListInit(&p_mutex->PendList);                        /* Initialize the waiting list                          */
+}
+
+
+/*
+************************************************************************************************************************
+*                                          ADD/REMOVE MUTEX TO/FROM DEBUG LIST
+*
+* Description: These functions are called by uC/OS-III to add or remove a mutex to/from the debug list.
+*
+* Arguments  : p_mutex     is a pointer to the mutex to add/remove
+*
+* Returns    : none
+*
+* Note(s)    : These functions are INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void  OS_MutexDbgListAdd (OS_MUTEX  *p_mutex)
+{
+    p_mutex->DbgNamePtr               = (CPU_CHAR *)((void *)" ");
+    p_mutex->DbgPrevPtr               = DEF_NULL;
+    if (OSMutexDbgListPtr == DEF_NULL) {
+        p_mutex->DbgNextPtr           = DEF_NULL;
+    } else {
+        p_mutex->DbgNextPtr           =  OSMutexDbgListPtr;
+        OSMutexDbgListPtr->DbgPrevPtr =  p_mutex;
+    }
+    OSMutexDbgListPtr                 =  p_mutex;
+}
+
+
+
+void  OS_MutexDbgListRemove (OS_MUTEX  *p_mutex)
+{
+    OS_MUTEX  *p_mutex_next;
+    OS_MUTEX  *p_mutex_prev;
+
+
+    p_mutex_prev = p_mutex->DbgPrevPtr;
+    p_mutex_next = p_mutex->DbgNextPtr;
+
+    if (p_mutex_prev == DEF_NULL) {
+        OSMutexDbgListPtr = p_mutex_next;
+        if (p_mutex_next != DEF_NULL) {
+            p_mutex_next->DbgPrevPtr = DEF_NULL;
+        }
+        p_mutex->DbgNextPtr = DEF_NULL;
+
+    } else if (p_mutex_next == DEF_NULL) {
+        p_mutex_prev->DbgNextPtr = DEF_NULL;
+        p_mutex->DbgPrevPtr      = DEF_NULL;
+
+    } else {
+        p_mutex_prev->DbgNextPtr =  p_mutex_next;
+        p_mutex_next->DbgPrevPtr =  p_mutex_prev;
+        p_mutex->DbgNextPtr      = DEF_NULL;
+        p_mutex->DbgPrevPtr      = DEF_NULL;
+    }
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                               MUTEX GROUP ADD
+*
+* Description: This function is called by the kernel to add a mutex to a task's mutex group.
+*
+
+* Argument(s): p_tcb        is a pointer to the tcb of the task to give the mutex to.
+*
+*              p_mutex      is a point to the mutex to add to the group.
+*
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_MutexGrpAdd (OS_TCB  *p_tcb, OS_MUTEX  *p_mutex)
+{
+    p_mutex->MutexGrpNextPtr = p_tcb->MutexGrpHeadPtr;      /* The mutex grp is not sorted add to head of list.       */
+    p_tcb->MutexGrpHeadPtr   = p_mutex;
+}
+
+
+/*
+************************************************************************************************************************
+*                                              MUTEX GROUP REMOVE
+*
+* Description: This function is called by the kernel to remove a mutex to a task's mutex group.
+*
+
+* Argument(s): p_tcb        is a pointer to the tcb of the task to remove the mutex from.
+*
+*              p_mutex      is a point to the mutex to remove from the group.
+*
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_MutexGrpRemove (OS_TCB  *p_tcb, OS_MUTEX  *p_mutex)
+{
+    OS_MUTEX  **pp_mutex;
+
+    pp_mutex = &p_tcb->MutexGrpHeadPtr;
+
+    while(*pp_mutex != p_mutex) {
+        pp_mutex = &(*pp_mutex)->MutexGrpNextPtr;
+    }
+
+    *pp_mutex = (*pp_mutex)->MutexGrpNextPtr;
+}
+
+
+/*
+************************************************************************************************************************
+*                                              MUTEX FIND HIGHEST PENDING
+*
+* Description: This function is called by the kernel to find the highest task pending on any mutex from a group.
+*
+
+* Argument(s): p_tcb        is a pointer to the tcb of the task to process.
+*
+*
+* Returns    : Highest priority pending or OS_CFG_PRIO_MAX - 1u if none found.
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+OS_PRIO  OS_MutexGrpPrioFindHighest (OS_TCB  *p_tcb)
+{
+    OS_MUTEX     **pp_mutex;
+    OS_PRIO        highest_prio;
+    OS_PRIO        prio;
+    OS_PEND_DATA  *p_head;
+
+
+    highest_prio = OS_CFG_PRIO_MAX - 1u;
+    pp_mutex = &p_tcb->MutexGrpHeadPtr;
+
+    while(*pp_mutex != DEF_NULL) {
+        p_head = (*pp_mutex)->PendList.HeadPtr;
+        if (p_head!= DEF_NULL) {
+            prio = p_head->TCBPtr->Prio;
+            if(prio < highest_prio) {
+                highest_prio = prio;
+            }
+        }
+        pp_mutex = &(*pp_mutex)->MutexGrpNextPtr;
+    }
+
+    return (highest_prio);
+}
+
+
+/*
+************************************************************************************************************************
+*                                               MUTEX GROUP POST ALL
+*
+* Description: This function is called by the kernel to post (release) all the mutex from a group. Used when deleting
+*              a task.
+*
+
+* Argument(s): p_tcb        is a pointer to the tcb of the task to process.
+*
+*
+* Returns    : none.
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_MutexGrpPostAll (OS_TCB  *p_tcb)
+{
+    OS_MUTEX      *p_mutex;
+    OS_MUTEX      *p_mutex_next;
+    CPU_TS         ts;
+    OS_PEND_LIST  *p_pend_list;
+    OS_TCB        *p_tcb_new;
+
+
+    p_mutex = p_tcb->MutexGrpHeadPtr;
+
+    while(p_mutex != DEF_NULL) {
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_MUTEX_POST(p_mutex);                               /* Record the event.                                    */
+#endif
+
+        p_mutex_next = p_mutex->MutexGrpNextPtr;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        ts           = OS_TS_GET();                             /* Get timestamp                                        */
+        p_mutex->TS  = ts;
+#else
+        ts           = 0u;
+#endif
+        OS_MutexGrpRemove(p_tcb,  p_mutex);                     /* Remove mutex from owner's group                      */
+
+        p_pend_list = &p_mutex->PendList;
+        if (p_pend_list->HeadPtr == DEF_NULL) {                 /* Any task waiting on mutex?                           */
+            p_mutex->OwnerNestingCtr = 0u;                      /* Decrement owner's nesting counter                    */
+            p_mutex->OwnerTCBPtr     = DEF_NULL;                /* No                                                   */
+        } else {
+                                                                /* Get TCB from head of pend list                       */
+            p_tcb_new = p_pend_list->HeadPtr->TCBPtr;
+            p_mutex->OwnerTCBPtr     = p_tcb;                   /* Give mutex to new owner                              */
+            p_mutex->OwnerNestingCtr = 1u;
+            OS_MutexGrpAdd(p_tcb_new, p_mutex);
+                                                                /* Post to mutex                                        */
+            OS_Post((OS_PEND_OBJ *)((void *)p_mutex),
+                                            p_tcb_new,
+                                            DEF_NULL,
+                                            0u,
+                                            ts);
+        }
+
+        p_mutex = p_mutex_next;
+    }
+
+}
+
+#endif /* OS_CFG_MUTEX_EN */
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_pend_multi.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_pend_multi.c
new file mode 100644
index 0000000..d633361
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_pend_multi.c
@@ -0,0 +1,473 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                               PEND ON MULTIPLE OBJECTS
+*
+* File    : OS_PEND_MULTI.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_pend_multi__c = "$Id: $";
+#endif
+
+
+#if (((OS_CFG_Q_EN == DEF_ENABLED) || (OS_CFG_SEM_EN == DEF_ENABLED)) && (OS_CFG_PEND_MULTI_EN == DEF_ENABLED))
+/*
+************************************************************************************************************************
+*                                               PEND ON MULTIPLE OBJECTS
+*
+* Description: This function pends on multiple objects.  The objects pended on MUST be either semaphores or message
+*              queues.  If multiple objects are ready at the start of the pend call, then all available objects that
+*              are ready will be indicated to the caller.  If the task must pend on the multiple events then, as soon
+*              as one of the object is either posted, aborted or deleted, the task will be readied.
+*
+*              This function only allows you to pend on semaphores and/or message queues.
+*
+* Arguments  : p_pend_data_tbl   is a pointer to an array of type OS_PEND_DATA which contains a list of all the
+*                                objects we will be waiting on.  The caller must declare an array of OS_PEND_DATA
+*                                and initialize the .PendObjPtr (see below) with a pointer to the object (semaphore or
+*                                message queue) to pend on.
+*
+*                                    OS_PEND_DATA  MyPendArray[?];
+*
+*                                The OS_PEND_DATA field are as follows:
+*
+*                                    OS_PEND_DATA  *PrevPtr;      Used to link OS_PEND_DATA objects
+*                                    OS_PEND_DATA  *NextPtr;      Used to link OS_PEND_DATA objects
+*                                    OS_TCB        *TCBPtr;       Pointer to the TCB that is pending on multiple objects
+*                                    OS_PEND_OBJ   *PendObjPtr;   USER supplied field which is a pointer to the
+*                                                                 semaphore or message queue you want to pend on.  When
+*                                                                 you call OSPendMulti() you MUST fill this field for
+*                                                                 each of the objects you want to pend on.
+*                                    OS_PEND_OBJ   *RdyObjPtr;    OSPendMulti() will return the object that was posted,
+*                                                                 aborted or deleted in this field.
+*                                    void          *RdyMsgPtr;    OSPendMulti() will fill in this field if the object
+*                                                                 posted was a message queue.  This corresponds to the
+*                                                                 message posted.
+*                                    OS_MSG_SIZE    RdyMsgSize;   OSPendMulti() will fill in this field if the object
+*                                                                 posted was a message queue.  This corresponds to the
+*                                                                 size of the message posted.
+*                                    CPU_TS         RdyTS;        OSPendMulti() will fill in this field if the object
+*                                                                 was a message queue.  This corresponds to the time
+*                                                                 stamp when the message was posted.  However, if the
+*                                                                 object is a semaphore and the object is already ready
+*                                                                 the this field will be set to (CPU_TS)0 because it's
+*                                                                 not possible to know when the semaphore was posted.
+*
+*              tbl_size      is the size (in number of elements) of the OS_PEND_DATA array passed to this function.  In
+*                            other words, if the called needs to pend on 4 separate objects (semaphores and/or queues)
+*                            then you would pass 4 to this call.
+*
+*              timeout       is an optional timeout period (in clock ticks).  If non-zero, your task will wait any of
+*                            the objects up to the amount of time specified by this argument. If you specify 0, however,
+*                            your task will wait forever for the specified objects or, until an object is posted,
+*                            aborted or deleted.
+*
+*              opt           determines whether the user wants to block if none of the objects are available.
+*
+*                                OS_OPT_PEND_BLOCKING
+*                                OS_OPT_PEND_NON_BLOCKING
+*
+*              p_err         is a pointer to where an error message will be deposited.  Possible error messages are:
+*
+*                                OS_ERR_NONE              The call was successful and your task owns the resources or,
+*                                                         the objects you are waiting for occurred. Check the .RdyObjPtr
+*                                                         fields to know which objects have been posted
+*                                OS_ERR_OBJ_DEL           If any of the pend on objects were deleted
+*                                OS_ERR_OBJ_TYPE          If any of the .PendPtr is NOT a semaphore or a message queue
+*                                OS_ERR_OPT_INVALID       If you specified an invalid option for 'opt'
+*                                OS_ERR_OS_NOT_RUNNING    If uC/OS-III is not running yet
+*                                OS_ERR_PEND_ABORT        The wait on the events was aborted; check the .RdyObjPtr fields
+*                                                         for which objects were aborted
+*                                OS_ERR_PEND_ISR          If you called this function from an ISR
+*                                OS_ERR_PEND_LOCKED       If you called this function when the scheduler is locked.
+*                                OS_ERR_PEND_WOULD_BLOCK  If the caller didn't want to block and no object ready
+*                                OS_ERR_SCHED_LOCKED      If you called this function when the scheduler is locked
+*                                OS_ERR_STATUS_INVALID    Invalid pend status
+*                                OS_ERR_PTR_INVALID       If you passes a NULL pointer of 'p_pend_data_tbl'
+*                                OS_ERR_TIMEOUT           The objects were not posted within the specified 'timeout'
+*
+* Returns    : >  0          the number of objects returned as ready, aborted or deleted
+*              == 0          if no events are returned as ready because of timeout or upon error.
+*
+* Note(s)    : 1) This function is DEPRECATED and is not recommended for new designs. Pending on multiple objects
+*                 is a deprecated feature of the kernel. It remains fully functional and supported but should not
+*                 be used for new applications.
+************************************************************************************************************************
+*/
+
+OS_OBJ_QTY  OSPendMulti (OS_PEND_DATA  *p_pend_data_tbl,
+                         OS_OBJ_QTY     tbl_size,
+                         OS_TICK        timeout,
+                         OS_OPT         opt,
+                         OS_ERR        *p_err)
+{
+    CPU_BOOLEAN   valid;
+    OS_OBJ_QTY    nbr_obj_rdy;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_OBJ_QTY)0);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Can't pend from an ISR                               */
+       *p_err = OS_ERR_PEND_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_pend_data_tbl == DEF_NULL) {                          /* Validate 'p_pend_data_tbl'                           */
+       *p_err = OS_ERR_PTR_INVALID;
+        return (0u);
+    }
+    if (tbl_size == 0u) {                                       /* Array size must be > 0                               */
+       *p_err = OS_ERR_PTR_INVALID;
+        return (0u);
+    }
+    switch (opt) {
+        case OS_OPT_PEND_BLOCKING:
+        case OS_OPT_PEND_NON_BLOCKING:
+             break;
+
+        default:
+            *p_err = OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+    valid = OS_PendMultiValidate(p_pend_data_tbl,               /* Validate objects to be OS_SEM or OS_Q                */
+                                 tbl_size);
+    if (valid == DEF_FALSE) {
+       *p_err = OS_ERR_OBJ_TYPE;                                /* Invalid, not OS_SEM or OS_Q                          */
+        return (0u);
+    }
+
+
+    CPU_CRITICAL_ENTER();
+    nbr_obj_rdy = OS_PendMultiGetRdy(p_pend_data_tbl,           /* SEE IF OBJECT(s) HAVE BEEN POSTED                    */
+                                     tbl_size);
+    if (nbr_obj_rdy > 0u) {
+        CPU_CRITICAL_EXIT();
+       *p_err = OS_ERR_NONE;
+        return (nbr_obj_rdy);
+    }
+
+    if ((opt & OS_OPT_PEND_NON_BLOCKING) != 0u) {               /* Caller wants to block if not available?              */
+        CPU_CRITICAL_EXIT();
+       *p_err = OS_ERR_PEND_WOULD_BLOCK;                        /* No                                                   */
+        return (0u);
+    } else {
+        if (OSSchedLockNestingCtr > 0u) {                       /* Can't pend when the scheduler is locked              */
+            CPU_CRITICAL_EXIT();
+           *p_err = OS_ERR_SCHED_LOCKED;
+            return (0u);
+        }
+    }
+                                                                /* Lock the scheduler/re-enable interrupts              */
+    OS_CRITICAL_ENTER_CPU_EXIT();
+                                                                /* ---- NO OBJECT READY, PEND ON MULTIPLE OBJECTS ----- */
+    OS_PendMultiWait(p_pend_data_tbl,                           /* Suspend task until object posted or timeout occurs   */
+                     tbl_size,
+                     timeout);
+
+    OS_CRITICAL_EXIT_NO_SCHED();
+
+    OSSched();                                                  /* Find next highest priority task ready                */
+
+    CPU_CRITICAL_ENTER();
+    switch (OSTCBCurPtr->PendStatus) {
+        case OS_STATUS_PEND_OK:                                 /* We got one of the objects posted to                  */
+            *p_err = OS_ERR_NONE;
+             break;
+
+        case OS_STATUS_PEND_ABORT:                              /* Indicate that the multi-pend was aborted             */
+            *p_err = OS_ERR_PEND_ABORT;
+             break;
+
+        case OS_STATUS_PEND_TIMEOUT:                            /* Indicate that we didn't get semaphore within timeout */
+            *p_err = OS_ERR_TIMEOUT;
+             break;
+
+        case OS_STATUS_PEND_DEL:                                /* Indicate that an object pended on has been deleted   */
+            *p_err = OS_ERR_OBJ_DEL;
+            break;
+
+        default:
+            *p_err = OS_ERR_STATUS_INVALID;
+             break;
+    }
+
+    OSTCBCurPtr->PendStatus = OS_STATUS_PEND_OK;
+    CPU_CRITICAL_EXIT();
+
+    return (1u);
+}
+
+
+/*
+************************************************************************************************************************
+*                                              GET A LIST OF OBJECTS READY
+*
+* Description: This function is called by OSPendMulti() to obtain the list of object that are ready.
+*
+* Arguments  : p_pend_data_tbl   is a pointer to an array of OS_PEND_DATA
+*              ---------------
+*
+*              tbl_size          is the size of the array
+*
+* Returns    :  > 0              the number of objects ready
+*              == 0              if no object ready
+*
+* Note(s)    : 1) This function is DEPRECATED, see OSPendMulti() note 1 for details.
+*
+*              2) This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+OS_OBJ_QTY  OS_PendMultiGetRdy (OS_PEND_DATA  *p_pend_data_tbl,
+                                OS_OBJ_QTY     tbl_size)
+{
+    OS_OBJ_QTY   i;
+    OS_OBJ_QTY   nbr_obj_rdy;
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+    OS_ERR       err;
+    OS_MSG_SIZE  msg_size;
+    OS_Q        *p_q;
+    void        *p_void;
+    CPU_TS       ts;
+#endif
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+    OS_SEM      *p_sem;
+#endif
+
+
+
+    nbr_obj_rdy = (OS_OBJ_QTY)0;
+    for (i = 0u; i < tbl_size; i++) {
+        p_pend_data_tbl->RdyObjPtr  = DEF_NULL;                 /* Clear all fields                                     */
+        p_pend_data_tbl->RdyMsgPtr  = DEF_NULL;
+        p_pend_data_tbl->RdyMsgSize = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        p_pend_data_tbl->RdyTS      = 0u;
+#endif
+        p_pend_data_tbl->NextPtr    = DEF_NULL;
+        p_pend_data_tbl->PrevPtr    = DEF_NULL;
+        p_pend_data_tbl->TCBPtr     = DEF_NULL;
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+        p_q = (OS_Q *)((void *)p_pend_data_tbl->PendObjPtr);    /* Assume we are pointing to a message queue object     */
+        if (p_q->Type == OS_OBJ_TYPE_Q) {                       /* Is it a message queue?                               */
+            p_void = OS_MsgQGet(&p_q->MsgQ,                     /* Yes, Any message waiting in the message queue?       */
+                                &msg_size,
+                                &ts,
+                                &err);
+            if (err == OS_ERR_NONE) {
+                p_pend_data_tbl->RdyObjPtr  = p_pend_data_tbl->PendObjPtr;
+                p_pend_data_tbl->RdyMsgPtr  = p_void;           /* Yes, save the message received                       */
+                p_pend_data_tbl->RdyMsgSize = msg_size;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                p_pend_data_tbl->RdyTS      = ts;
+#endif
+                nbr_obj_rdy++;
+            }
+        }
+#endif
+
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+        p_sem = (OS_SEM *)((void *)p_pend_data_tbl->PendObjPtr);/* Assume we are pointing to a semaphore object         */
+        if (p_sem->Type == OS_OBJ_TYPE_SEM) {                   /* Is it a semaphore?                                   */
+            if (p_sem->Ctr > 0u) {                              /* Yes, Semaphore has been signaled?                    */
+                p_sem->Ctr--;                                   /* Yes, caller may proceed                              */
+                p_pend_data_tbl->RdyObjPtr  = p_pend_data_tbl->PendObjPtr;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                p_pend_data_tbl->RdyTS      = p_sem->TS;
+#endif
+                nbr_obj_rdy++;
+            }
+        }
+#endif
+
+        p_pend_data_tbl++;
+    }
+    return (nbr_obj_rdy);
+}
+
+
+/*
+************************************************************************************************************************
+*                                 VERIFY THAT OBJECTS PENDED ON ARE EITHER SEMAPHORES or QUEUES
+*
+* Description: This function is called by OSPendMulti() to verify that we are multi-pending on either semaphores or
+*              message queues.
+*
+* Arguments  : p_pend_data_tbl    is a pointer to an array of OS_PEND_DATA
+*              ---------------
+*
+*              tbl_size           is the size of the array
+*
+* Returns    : TRUE               if all objects pended on are either semaphores of queues
+*              FALSE              if at least one object is not a semaphore or queue.
+*
+* Note(s)    : 1) This function is DEPRECATED, see OSPendMulti() note 1 for details.
+*
+*              2) This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+CPU_BOOLEAN  OS_PendMultiValidate (OS_PEND_DATA  *p_pend_data_tbl,
+                                   OS_OBJ_QTY     tbl_size)
+{
+    OS_OBJ_QTY  i;
+    OS_OBJ_QTY  ctr;
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+    OS_SEM      *p_sem;
+#endif
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+    OS_Q        *p_q;
+#endif
+
+
+    for (i = 0u; i < tbl_size; i++) {
+        if (p_pend_data_tbl->PendObjPtr == DEF_NULL) {          /* All .PendObjPtr in the table MUST be non NULL        */
+            return (DEF_FALSE);
+        }
+
+        ctr = 0u;
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+        p_sem = (OS_SEM *)((void *)p_pend_data_tbl->PendObjPtr);/* All objects to pend on must be of type OS_SEM ...    */
+        if (p_sem->Type == OS_OBJ_TYPE_SEM) {
+            ctr++;
+        }
+#endif
+
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+        p_q = (OS_Q *)((void *)p_pend_data_tbl->PendObjPtr);    /* ... or of type OS_Q                                  */
+        if (p_q->Type == OS_OBJ_TYPE_Q) {
+            ctr++;
+        }
+#endif
+
+        if (ctr == 0u) {
+            return (DEF_FALSE);                                 /* Found at least one invalid object type               */
+        }
+        p_pend_data_tbl++;
+    }
+    return (DEF_TRUE);
+}
+
+
+/*
+************************************************************************************************************************
+*                                 MAKE TASK WAIT FOR ANY OF MULTIPLE EVENTS TO OCCUR
+*
+* Description: This function is called by OSPendMulti() to suspend a task because any one of multiple objects that have
+*              not been posted to.
+*
+* Arguments  : p_pend_data_tbl    is a pointer to an array of OS_PEND_DATA
+*              ---------------
+*
+*              tbl_size           is the size of the array
+*
+*              timeout            is the timeout to wait in case none of the objects become ready
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is DEPRECATED, see OSPendMulti() note 1 for details.
+*
+*              2) This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_PendMultiWait (OS_PEND_DATA  *p_pend_data_tbl,
+                        OS_OBJ_QTY     tbl_size,
+                        OS_TICK        timeout)
+{
+    OS_OBJ_QTY      i;
+    OS_PEND_LIST   *p_pend_list;
+
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+    OS_Q           *p_q;
+#endif
+
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+    OS_SEM         *p_sem;
+#endif
+
+
+
+    OSTCBCurPtr->PendOn             = OS_TASK_PEND_ON_MULTI;    /* Resource not available, wait until it is             */
+    OSTCBCurPtr->PendStatus         = OS_STATUS_PEND_OK;
+    OSTCBCurPtr->PendDataTblEntries = tbl_size;
+    OSTCBCurPtr->PendDataTblPtr     = p_pend_data_tbl;
+
+    OS_TaskBlock(OSTCBCurPtr,                                   /* Block the task waiting for object to be posted ...   */
+                 timeout);                                      /* ... but with a timeout if not                        */
+
+    for (i = 0u; i < tbl_size; i++) {
+        p_pend_data_tbl->TCBPtr = OSTCBCurPtr;                  /* Every entry points back to the TCB of the task       */
+
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+        p_sem = (OS_SEM *)((void *)p_pend_data_tbl->PendObjPtr);
+        if (p_sem->Type == OS_OBJ_TYPE_SEM) {
+            p_pend_list = &p_sem->PendList;
+            OS_PendListInsertPrio(p_pend_list,
+                                  p_pend_data_tbl);
+        }
+#endif
+
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+        p_q = (OS_Q *)((void *)p_pend_data_tbl->PendObjPtr);
+        if (p_q->Type == OS_OBJ_TYPE_Q) {
+            p_pend_list = &p_q->PendList;
+            OS_PendListInsertPrio(p_pend_list,
+                                  p_pend_data_tbl);
+        }
+#endif
+
+        p_pend_data_tbl++;
+    }
+}
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_prio.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_prio.c
new file mode 100644
index 0000000..b0dc682
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_prio.c
@@ -0,0 +1,172 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                 PRIORITY MANAGEMENT
+*
+* File    : OS_PRIO.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_prio__c = "$Id: $";
+#endif
+
+
+CPU_DATA   OSPrioTbl[OS_PRIO_TBL_SIZE];                         /* Declare the array local to this file to allow for  ...*/
+                                                                /* ... optimization.  In other words, this allows the ...*/
+                                                                /* ... table to be located in fast memory                */
+
+/*
+************************************************************************************************************************
+*                                               INITIALIZE THE PRIORITY LIST
+*
+* Description: This function is called by uC/OS-III to initialize the list of ready priorities.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note       : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_PrioInit (void)
+{
+    CPU_DATA  i;
+
+
+                                                                /* Clear the bitmap table ... no task is ready          */
+    for (i = 0u; i < OS_PRIO_TBL_SIZE; i++) {
+         OSPrioTbl[i] = 0u;
+    }
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_DISABLED)
+    OS_PrioInsert ((OS_CFG_PRIO_MAX - 1u));                     /* Insert what would be the idle task                   */
+#endif
+}
+
+/*
+************************************************************************************************************************
+*                                           GET HIGHEST PRIORITY TASK WAITING
+*
+* Description: This function is called by other uC/OS-III services to determine the highest priority task
+*              waiting on the event.
+*
+* Arguments  : none
+*
+* Returns    : The priority of the Highest Priority Task (HPT) waiting for the event
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+OS_PRIO  OS_PrioGetHighest (void)
+{
+    CPU_DATA  *p_tbl;
+    OS_PRIO    prio;
+
+
+    prio  = 0u;
+    p_tbl = &OSPrioTbl[0];
+#if (OS_CFG_PRIO_MAX > DEF_INT_CPU_NBR_BITS)
+    while (*p_tbl == 0u) {                                      /* Search the bitmap table for the highest priority     */
+        prio += DEF_INT_CPU_NBR_BITS;                           /* Compute the step of each CPU_DATA entry              */
+        p_tbl++;
+    }
+#endif
+    prio += (OS_PRIO)CPU_CntLeadZeros(*p_tbl);                  /* Find the position of the first bit set at the entry  */
+
+    return (prio);
+}
+
+/*
+************************************************************************************************************************
+*                                                  INSERT PRIORITY
+*
+* Description: This function is called to insert a priority in the priority table.
+*
+* Arguments  : prio     is the priority to insert
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_PrioInsert (OS_PRIO  prio)
+{
+    CPU_DATA  bit;
+    CPU_DATA  bit_nbr;
+    OS_PRIO   ix;
+
+#if (OS_CFG_PRIO_MAX > DEF_INT_CPU_NBR_BITS)
+    ix             = prio / DEF_INT_CPU_NBR_BITS;
+    bit_nbr        = (CPU_DATA)prio & (DEF_INT_CPU_NBR_BITS - 1u);
+#else
+    ix             = 0u;
+    bit_nbr        = prio;
+#endif
+    bit            = 1u;
+    bit          <<= (DEF_INT_CPU_NBR_BITS - 1u) - bit_nbr;
+    OSPrioTbl[ix] |= bit;
+}
+
+/*
+************************************************************************************************************************
+*                                                   REMOVE PRIORITY
+*
+* Description: This function is called to remove a priority in the priority table.
+*
+* Arguments  : prio     is the priority to remove
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_PrioRemove (OS_PRIO  prio)
+{
+    CPU_DATA  bit;
+    CPU_DATA  bit_nbr;
+    OS_PRIO   ix;
+
+#if (OS_CFG_PRIO_MAX > DEF_INT_CPU_NBR_BITS)
+    ix             = prio / DEF_INT_CPU_NBR_BITS;
+    bit_nbr        = (CPU_DATA)prio & (DEF_INT_CPU_NBR_BITS - 1u);
+#else
+    ix             = 0u;
+    bit_nbr        = prio;
+#endif
+    bit            = 1u;
+    bit          <<= (DEF_INT_CPU_NBR_BITS - 1u) - bit_nbr;
+    OSPrioTbl[ix] &= ~bit;
+}
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_q.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_q.c
new file mode 100644
index 0000000..d1ec034
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_q.c
@@ -0,0 +1,1073 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                               MESSAGE QUEUE MANAGEMENT
+*
+* File    : OS_Q.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_q__c = "$Id: $";
+#endif
+
+
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+/*
+************************************************************************************************************************
+*                                               CREATE A MESSAGE QUEUE
+*
+* Description: This function is called by your application to create a message queue.  Message queues MUST be created
+*              before they can be used.
+*
+* Arguments  : p_q         is a pointer to the message queue
+*
+*              p_name      is a pointer to an ASCII string that will be used to name the message queue
+*
+*              max_qty     indicates the maximum size of the message queue (must be non-zero).  Note that it's also not
+*                          possible to have a size higher than the maximum number of OS_MSGs available.
+*
+*              p_err       is a pointer to a variable that will contain an error code returned by this function.
+*
+*                              OS_ERR_NONE                    The call was successful
+*                              OS_ERR_CREATE_ISR              Can't create from an ISR
+*                              OS_ERR_ILLEGAL_CREATE_RUN_TIME If you are trying to create the Queue after you called
+*                                                               OSStart()
+*                              OS_ERR_OBJ_PTR_NULL            If you passed a NULL pointer for 'p_q'
+*                              OS_ERR_Q_SIZE                  If the size you specified is 0
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSQCreate (OS_Q        *p_q,
+                 CPU_CHAR    *p_name,
+                 OS_MSG_QTY   max_qty,
+                 OS_ERR      *p_err)
+
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_CREATE_RUN_TIME;
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to be called from an ISR                 */
+       *p_err = OS_ERR_CREATE_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_q == DEF_NULL) {                                      /* Validate arguments                                   */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+    if (max_qty == 0u) {                                        /* Cannot specify a zero size queue                     */
+       *p_err = OS_ERR_Q_SIZE;
+        return;
+    }
+#endif
+
+    OS_CRITICAL_ENTER();
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_q->Type    = OS_OBJ_TYPE_Q;                               /* Mark the data structure as a message queue           */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_q->NamePtr = p_name;
+#else
+    (void)&p_name;
+#endif
+    OS_MsgQInit(&p_q->MsgQ,                                     /* Initialize the queue                                 */
+                max_qty);
+    OS_PendListInit(&p_q->PendList);                            /* Initialize the waiting list                          */
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_QDbgListAdd(p_q);
+    OSQQty++;                                                   /* One more queue created                               */
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_Q_CREATE(p_q, p_name);                             /* Record the event.                                    */
+#endif
+    OS_CRITICAL_EXIT_NO_SCHED();
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                               DELETE A MESSAGE QUEUE
+*
+* Description: This function deletes a message queue and readies all tasks pending on the queue.
+*
+* Arguments  : p_q       is a pointer to the message queue you want to delete
+*
+*              opt       determines delete options as follows:
+*
+*                            OS_OPT_DEL_NO_PEND          Delete the queue ONLY if no task pending
+*                            OS_OPT_DEL_ALWAYS           Deletes the queue even if tasks are waiting.
+*                                                        In this case, all the tasks pending will be readied.
+*
+*              p_err     is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_NONE                    The call was successful and the queue was deleted
+*                            OS_ERR_DEL_ISR                 If you tried to delete the queue from an ISR
+*                            OS_ERR_ILLEGAL_DEL_RUN_TIME    If you are trying to delete the message queue after you
+*                                                             called OSStart()
+*                            OS_ERR_OBJ_PTR_NULL            If you pass a NULL pointer for 'p_q'
+*                            OS_ERR_OBJ_TYPE                If the message queue was not created
+*                            OS_ERR_OPT_INVALID             An invalid option was specified
+*                            OS_ERR_OS_NOT_RUNNING          If uC/OS-III is not running yet
+*                            OS_ERR_TASK_WAITING            One or more tasks were waiting on the queue
+*
+* Returns    : == 0          if no tasks were waiting on the queue, or upon error.
+*              >  0          if one or more tasks waiting on the queue are now readied and informed.
+*
+* Note(s)    : 1) This function must be used with care.  Tasks that would normally expect the presence of the queue MUST
+*                 check the return code of OSQPend().
+*
+*              2) Because ALL tasks pending on the queue will be readied, you MUST be careful in applications where the
+*                 queue is used for mutual exclusion because the resource(s) will no longer be guarded by the queue.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_Q_DEL_EN == DEF_ENABLED)
+OS_OBJ_QTY  OSQDel (OS_Q    *p_q,
+                    OS_OPT   opt,
+                    OS_ERR  *p_err)
+{
+    OS_OBJ_QTY     nbr_tasks;
+    OS_PEND_DATA  *p_pend_data;
+    OS_PEND_LIST  *p_pend_list;
+    OS_TCB        *p_tcb;
+    CPU_TS         ts;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_DEL_RUN_TIME;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Can't delete a message queue from an ISR             */
+       *p_err = OS_ERR_DEL_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_q == DEF_NULL) {                                      /* Validate 'p_q'                                       */
+       *p_err =  OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_q->Type != OS_OBJ_TYPE_Q) {                           /* Make sure message queue was created                  */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    p_pend_list = &p_q->PendList;
+    nbr_tasks   = 0u;
+    switch (opt) {
+        case OS_OPT_DEL_NO_PEND:                                /* Delete message queue only if no task waiting         */
+             if (p_pend_list->HeadPtr == DEF_NULL) {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                 OS_QDbgListRemove(p_q);
+                 OSQQty--;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                 TRACE_OS_Q_DEL(p_q);                           /* Record the event.                                    */
+#endif
+                 OS_QClr(p_q);
+                 CPU_CRITICAL_EXIT();
+                *p_err = OS_ERR_NONE;
+             } else {
+                 CPU_CRITICAL_EXIT();
+                *p_err = OS_ERR_TASK_WAITING;
+             }
+             break;
+
+        case OS_OPT_DEL_ALWAYS:                                 /* Always delete the message queue                      */
+             OS_CRITICAL_ENTER_CPU_EXIT();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             ts = OS_TS_GET();                                  /* Get local time stamp so all tasks get the same time  */
+#else
+             ts = 0u;
+#endif
+             while (p_pend_list->HeadPtr != DEF_NULL) {         /* Remove all tasks from the pend list                  */
+                 p_pend_data = p_pend_list->HeadPtr;
+                 p_tcb       = p_pend_data->TCBPtr;
+                 OS_PendObjDel((OS_PEND_OBJ *)((void *)p_q),
+                               p_tcb,
+                               ts);
+                 nbr_tasks++;
+             }
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+             OS_QDbgListRemove(p_q);
+             OSQQty--;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_Q_DEL(p_q);                               /* Record the event.                                    */
+#endif
+             OS_QClr(p_q);
+             OS_CRITICAL_EXIT_NO_SCHED();
+             OSSched();                                         /* Find highest priority task ready to run              */
+            *p_err = OS_ERR_NONE;
+             break;
+
+        default:
+             CPU_CRITICAL_EXIT();
+            *p_err = OS_ERR_OPT_INVALID;
+             break;
+    }
+    return (nbr_tasks);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                     FLUSH QUEUE
+*
+* Description : This function is used to flush the contents of the message queue.
+*
+* Arguments   : p_q        is a pointer to the message queue to flush
+*
+*               p_err      is a pointer to a variable that will contain an error code returned by this function.
+*
+*                              OS_ERR_NONE              Upon success
+*                              OS_ERR_FLUSH_ISR         If you called this function from an ISR
+*                              OS_ERR_OBJ_PTR_NULL      If you passed a NULL pointer for 'p_q'
+*                              OS_ERR_OBJ_TYPE          If you didn't create the message queue
+*                              OS_ERR_OS_NOT_RUNNING    If uC/OS-III is not running yet
+*
+* Returns     : == 0       if no entries were freed, or upon error.
+*               >  0       the number of freed entries.
+*
+* Note(s)     : 1) You should use this function with great care because, when to flush the queue, you LOOSE the
+*                  references to what the queue entries are pointing to and thus, you could cause 'memory leaks'.  In
+*                  other words, the data you are pointing to that's being referenced by the queue entries should, most
+*                  likely, need to be de-allocated (i.e. freed).
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_Q_FLUSH_EN == DEF_ENABLED)
+OS_MSG_QTY  OSQFlush (OS_Q    *p_q,
+                      OS_ERR  *p_err)
+{
+    OS_MSG_QTY  entries;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Can't flush a message queue from an ISR              */
+       *p_err = OS_ERR_FLUSH_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_q == DEF_NULL) {                                      /* Validate arguments                                   */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_q->Type != OS_OBJ_TYPE_Q) {                           /* Make sure message queue was created                  */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    OS_CRITICAL_ENTER();
+    entries = OS_MsgQFreeAll(&p_q->MsgQ);                       /* Return all OS_MSGs to the OS_MSG pool                */
+    OS_CRITICAL_EXIT();
+   *p_err   = OS_ERR_NONE;
+    return (entries);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                            PEND ON A QUEUE FOR A MESSAGE
+*
+* Description: This function waits for a message to be sent to a queue.
+*
+* Arguments  : p_q           is a pointer to the message queue
+*
+*              timeout       is an optional timeout period (in clock ticks).  If non-zero, your task will wait for a
+*                            message to arrive at the queue up to the amount of time specified by this argument.  If you
+*                            specify 0, however, your task will wait forever at the specified queue or, until a message
+*                            arrives.
+*
+*              opt           determines whether the user wants to block if the queue is empty or not:
+*
+*                                OS_OPT_PEND_BLOCKING
+*                                OS_OPT_PEND_NON_BLOCKING
+*
+*              p_msg_size    is a pointer to a variable that will receive the size of the message
+*
+*              p_ts          is a pointer to a variable that will receive the timestamp of when the message was
+*                            received, pend aborted or the message queue deleted,  If you pass a NULL pointer (i.e.
+*                            (CPU_TS *)0) then you will not get the timestamp.  In other words, passing a NULL pointer
+*                            is valid and indicates that you don't need the timestamp.
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE               The call was successful and your task received a message
+*                                OS_ERR_OBJ_DEL            If 'p_q' was deleted
+*                                OS_ERR_OBJ_PTR_NULL       If you pass a NULL pointer for 'p_q'
+*                                OS_ERR_OBJ_TYPE           If the message queue was not created
+*                                OS_ERR_OPT_INVALID        You specified an invalid option
+*                                OS_ERR_OS_NOT_RUNNING     If uC/OS-III is not running yet
+*                                OS_ERR_PEND_ABORT         The pend was aborted
+*                                OS_ERR_PEND_ISR           If you called this function from an ISR
+*                                OS_ERR_PEND_WOULD_BLOCK   If you specified non-blocking but the queue was not empty
+*                                OS_ERR_PTR_INVALID        If you passed a NULL pointer of 'p_msg_size'
+*                                OS_ERR_SCHED_LOCKED       The scheduler is locked
+*                                OS_ERR_STATUS_INVALID     If the pend status has an invalid value
+*                                OS_ERR_TIMEOUT            A message was not received within the specified timeout
+*                                                          would lead to a suspension.
+*
+* Returns    : != (void *)0  is a pointer to the message received
+*              == (void *)0  if you received a NULL pointer message or,
+*                            if no message was received or,
+*                            if 'p_q' is a NULL pointer or,
+*                            if you didn't pass a pointer to a queue.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  *OSQPend (OS_Q         *p_q,
+                OS_TICK       timeout,
+                OS_OPT        opt,
+                OS_MSG_SIZE  *p_msg_size,
+                CPU_TS       *p_ts,
+                OS_ERR       *p_err)
+{
+    OS_PEND_DATA  pend_data;
+    void         *p_void;
+    CPU_SR_ALLOC();
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (DEF_NULL);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_Q_PEND_FAILED(p_q);                            /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_PEND_ISR;
+        return (DEF_NULL);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (DEF_NULL);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_q == DEF_NULL) {                                      /* Validate arguments                                   */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_Q_PEND_FAILED(p_q);                            /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return (DEF_NULL);
+    }
+    if (p_msg_size == DEF_NULL) {
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_Q_PEND_FAILED(p_q);                            /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_PTR_INVALID;
+        return (DEF_NULL);
+    }
+    switch (opt) {
+        case OS_OPT_PEND_BLOCKING:
+        case OS_OPT_PEND_NON_BLOCKING:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_Q_PEND_FAILED(p_q);                       /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OPT_INVALID;
+             return (DEF_NULL);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_q->Type != OS_OBJ_TYPE_Q) {                           /* Make sure message queue was created                  */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_Q_PEND_FAILED(p_q);                            /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (DEF_NULL);
+    }
+#endif
+
+    if (p_ts != DEF_NULL) {
+       *p_ts = 0u;                                              /* Initialize the returned timestamp                    */
+    }
+
+    CPU_CRITICAL_ENTER();
+    p_void = OS_MsgQGet(&p_q->MsgQ,                             /* Any message waiting in the message queue?            */
+                        p_msg_size,
+                        p_ts,
+                        p_err);
+    if (*p_err == OS_ERR_NONE) {
+        CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_Q_PEND(p_q);                                   /* Record the event.                                    */
+#endif
+        return (p_void);                                        /* Yes, Return message received                         */
+    }
+
+    if ((opt & OS_OPT_PEND_NON_BLOCKING) != 0u) {               /* Caller wants to block if not available?              */
+        CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_Q_PEND_FAILED(p_q);                            /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_PEND_WOULD_BLOCK;                        /* No                                                   */
+        return (DEF_NULL);
+    } else {
+        if (OSSchedLockNestingCtr > 0u) {                       /* Can't pend when the scheduler is locked              */
+            CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+            TRACE_OS_Q_PEND_FAILED(p_q);                        /* Record the event.                                    */
+#endif
+           *p_err = OS_ERR_SCHED_LOCKED;
+            return (DEF_NULL);
+        }
+    }
+                                                                /* Lock the scheduler/re-enable interrupts              */
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    OS_Pend(&pend_data,                                         /* Block task pending on Message Queue                  */
+            (OS_PEND_OBJ *)((void *)p_q),
+            OS_TASK_PEND_ON_Q,
+            timeout);
+    OS_CRITICAL_EXIT_NO_SCHED();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_Q_PEND_BLOCK(p_q);                                 /* Record the event.                                    */
+#endif
+    OSSched();                                                  /* Find the next highest priority task ready to run     */
+
+    CPU_CRITICAL_ENTER();
+    switch (OSTCBCurPtr->PendStatus) {
+        case OS_STATUS_PEND_OK:                                 /* Extract message from TCB (Put there by Post)         */
+             p_void     = OSTCBCurPtr->MsgPtr;
+            *p_msg_size = OSTCBCurPtr->MsgSize;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts  != DEF_NULL) {
+                *p_ts  =  OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_Q_PEND(p_q);                              /* Record the event.                                    */
+#endif
+            *p_err      = OS_ERR_NONE;
+             break;
+
+        case OS_STATUS_PEND_ABORT:                              /* Indicate that we aborted                             */
+             p_void     = DEF_NULL;
+            *p_msg_size = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts  != DEF_NULL) {
+                *p_ts  =  OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_Q_PEND_FAILED(p_q);                       /* Record the event.                                    */
+#endif
+            *p_err      = OS_ERR_PEND_ABORT;
+             break;
+
+        case OS_STATUS_PEND_TIMEOUT:                            /* Indicate that we didn't get event within TO          */
+             p_void     = DEF_NULL;
+            *p_msg_size = 0u;
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_Q_PEND_FAILED(p_q);                       /* Record the event.                                    */
+#endif
+            *p_err      = OS_ERR_TIMEOUT;
+             break;
+
+        case OS_STATUS_PEND_DEL:                                /* Indicate that object pended on has been deleted      */
+             p_void     = DEF_NULL;
+            *p_msg_size = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts  != DEF_NULL) {
+                *p_ts  =  OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_Q_PEND_FAILED(p_q);                       /* Record the event.                                    */
+#endif
+            *p_err      = OS_ERR_OBJ_DEL;
+             break;
+
+        default:
+             p_void     = DEF_NULL;
+            *p_msg_size = 0u;
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_Q_PEND_FAILED(p_q);                       /* Record the event.                                    */
+#endif
+            *p_err      = OS_ERR_STATUS_INVALID;
+             break;
+    }
+    CPU_CRITICAL_EXIT();
+    return (p_void);
+}
+
+
+/*
+************************************************************************************************************************
+*                                             ABORT WAITING ON A MESSAGE QUEUE
+*
+* Description: This function aborts & readies any tasks currently waiting on a queue.  This function should be used to
+*              fault-abort the wait on the queue, rather than to normally signal the queue via OSQPost().
+*
+* Arguments  : p_q       is a pointer to the message queue
+*
+*              opt       determines the type of ABORT performed:
+*
+*                            OS_OPT_PEND_ABORT_1          ABORT wait for a single task (HPT) waiting on the queue
+*                            OS_OPT_PEND_ABORT_ALL        ABORT wait for ALL tasks that are  waiting on the queue
+*                            OS_OPT_POST_NO_SCHED         Do not call the scheduler
+*
+*              p_err     is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_NONE                  At least one task waiting on the queue was readied and
+*                                                         informed of the aborted wait; check return value for the
+*                                                         number of tasks whose wait on the queue was aborted
+*                            OS_ERR_OBJ_PTR_NULL          If you pass a NULL pointer for 'p_q'
+*                            OS_ERR_OBJ_TYPE              If the message queue was not created
+*                            OS_ERR_OPT_INVALID           You specified an invalid option
+*                            OS_ERR_OS_NOT_RUNNING        If uC/OS-III is not running yet
+*                            OS_ERR_PEND_ABORT_ISR        If this function was called from an ISR
+*                            OS_ERR_PEND_ABORT_NONE       No task were pending
+*
+* Returns    : == 0      if no tasks were waiting on the queue, or upon error.
+*              >  0      if one or more tasks waiting on the queue are now readied and informed.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_Q_PEND_ABORT_EN == DEF_ENABLED)
+OS_OBJ_QTY  OSQPendAbort (OS_Q    *p_q,
+                          OS_OPT   opt,
+                          OS_ERR  *p_err)
+{
+    OS_PEND_LIST  *p_pend_list;
+    OS_TCB        *p_tcb;
+    CPU_TS         ts;
+    OS_OBJ_QTY     nbr_tasks;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to Pend Abort from an ISR                */
+       *p_err =  OS_ERR_PEND_ABORT_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_q == DEF_NULL) {                                      /* Validate 'p_q'                                       */
+       *p_err =  OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_PEND_ABORT_1:
+        case OS_OPT_PEND_ABORT_ALL:
+        case OS_OPT_PEND_ABORT_1   | OS_OPT_POST_NO_SCHED:
+        case OS_OPT_PEND_ABORT_ALL | OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+            *p_err =  OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_q->Type != OS_OBJ_TYPE_Q) {                           /* Make sure queue was created                          */
+       *p_err =  OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    p_pend_list = &p_q->PendList;
+    if (p_pend_list->HeadPtr == DEF_NULL) {                     /* Any task waiting on queue?                           */
+        CPU_CRITICAL_EXIT();                                    /* No                                                   */
+       *p_err =  OS_ERR_PEND_ABORT_NONE;
+        return (0u);
+    }
+
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    nbr_tasks = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts        = OS_TS_GET();                                    /* Get local time stamp so all tasks get the same time  */
+#else
+    ts        = 0u;
+#endif
+    while (p_pend_list->HeadPtr != DEF_NULL) {
+        p_tcb = p_pend_list->HeadPtr->TCBPtr;
+        OS_PendAbort((OS_PEND_OBJ *)((void *)p_q),
+                     p_tcb,
+                     ts);
+        nbr_tasks++;
+        if (opt != OS_OPT_PEND_ABORT_ALL) {                     /* Pend abort all tasks waiting?                        */
+            break;                                              /* No                                                   */
+        }
+    }
+    OS_CRITICAL_EXIT_NO_SCHED();
+
+    if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+        OSSched();                                              /* Run the scheduler                                    */
+    }
+
+   *p_err = OS_ERR_NONE;
+    return (nbr_tasks);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                               POST MESSAGE TO A QUEUE
+*
+* Description: This function sends a message to a queue.  With the 'opt' argument, you can specify whether the message
+*              is broadcast to all waiting tasks and/or whether you post the message to the front of the queue (LIFO)
+*              or normally (FIFO) at the end of the queue.
+*
+* Arguments  : p_q           is a pointer to a message queue that must have been created by OSQCreate().
+*
+*              p_void        is a pointer to the message to send.
+*
+*              msg_size      specifies the size of the message (in bytes)
+*
+*              opt           determines the type of POST performed:
+*
+*                                OS_OPT_POST_ALL          POST to ALL tasks that are waiting on the queue.  This option
+*                                                         can be added to either OS_OPT_POST_FIFO or OS_OPT_POST_LIFO
+*                                OS_OPT_POST_FIFO         POST message to end of queue (FIFO) and wake up a single
+*                                                         waiting task.
+*                                OS_OPT_POST_LIFO         POST message to the front of the queue (LIFO) and wake up
+*                                                         a single waiting task.
+*                                OS_OPT_POST_NO_SCHED     Do not call the scheduler
+*
+*                            Note(s): 1) OS_OPT_POST_NO_SCHED can be added (or OR'd) with one of the other options.
+*                                     2) OS_OPT_POST_ALL      can be added (or OR'd) with one of the other options.
+*                                     3) Possible combination of options are:
+*
+*                                        OS_OPT_POST_FIFO
+*                                        OS_OPT_POST_LIFO
+*                                        OS_OPT_POST_FIFO + OS_OPT_POST_ALL
+*                                        OS_OPT_POST_LIFO + OS_OPT_POST_ALL
+*                                        OS_OPT_POST_FIFO + OS_OPT_POST_NO_SCHED
+*                                        OS_OPT_POST_LIFO + OS_OPT_POST_NO_SCHED
+*                                        OS_OPT_POST_FIFO + OS_OPT_POST_ALL + OS_OPT_POST_NO_SCHED
+*                                        OS_OPT_POST_LIFO + OS_OPT_POST_ALL + OS_OPT_POST_NO_SCHED
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE              The call was successful and the message was sent
+*                                OS_ERR_INT_Q_FULL        If the deferred interrupt post queue is full
+*                                OS_ERR_MSG_POOL_EMPTY    If there are no more OS_MSGs to use to place the message into
+*                                OS_ERR_OBJ_PTR_NULL      If 'p_q' is a NULL pointer
+*                                OS_ERR_OBJ_TYPE          If the message queue was not initialized
+*                                OS_ERR_OPT_INVALID       You specified an invalid option
+*                                OS_ERR_OS_NOT_RUNNING    If uC/OS-III is not running yet
+*                                OS_ERR_Q_MAX             If the queue is full
+*
+* Returns    : None
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSQPost (OS_Q         *p_q,
+               void         *p_void,
+               OS_MSG_SIZE   msg_size,
+               OS_OPT        opt,
+               OS_ERR       *p_err)
+{
+    CPU_TS  ts;
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_q == DEF_NULL) {                                      /* Validate 'p_q'                                       */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_Q_POST_FAILED(p_q);                            /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_POST_FIFO:
+        case OS_OPT_POST_LIFO:
+        case OS_OPT_POST_FIFO | OS_OPT_POST_ALL:
+        case OS_OPT_POST_LIFO | OS_OPT_POST_ALL:
+        case OS_OPT_POST_FIFO | OS_OPT_POST_NO_SCHED:
+        case OS_OPT_POST_LIFO | OS_OPT_POST_NO_SCHED:
+        case OS_OPT_POST_FIFO | OS_OPT_POST_ALL | OS_OPT_POST_NO_SCHED:
+        case OS_OPT_POST_LIFO | OS_OPT_POST_ALL | OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_Q_POST_FAILED(p_q);                       /* Record the event.                                    */
+#endif
+            *p_err =  OS_ERR_OPT_INVALID;
+             return;
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_q->Type != OS_OBJ_TYPE_Q) {                           /* Make sure message queue was created                  */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_Q_POST_FAILED(p_q);                            /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_TYPE;
+        return;
+    }
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts = OS_TS_GET();                                           /* Get timestamp                                        */
+#else
+    ts = 0u;
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {
+        OS_IntQPost(OS_OBJ_TYPE_Q,                              /* Post to ISR queue                                    */
+                    (void      *)p_q,
+                    (void      *)p_void,
+                    msg_size,
+                    0u,
+                    opt,
+                    ts,
+                    p_err);
+        return;
+    }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_Q_POST(p_q);                                       /* Record the event.                                    */
+#endif
+    OS_QPost(p_q,
+             p_void,
+             msg_size,
+             opt,
+             ts,
+             p_err);
+}
+
+
+/*
+************************************************************************************************************************
+*                                        CLEAR THE CONTENTS OF A MESSAGE QUEUE
+*
+* Description: This function is called by OSQDel() to clear the contents of a message queue
+*
+
+* Argument(s): p_q      is a pointer to the queue to clear
+*              ---
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_QClr (OS_Q  *p_q)
+{
+    (void)OS_MsgQFreeAll (&p_q->MsgQ);                          /* Return all OS_MSGs to the free list                  */
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_q->Type    =  OS_OBJ_TYPE_NONE;                           /* Mark the data structure as a NONE                    */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_q->NamePtr = (CPU_CHAR *)((void *)"?Q");
+#endif
+    OS_MsgQInit (&p_q->MsgQ,                                    /* Initialize the list of OS_MSGs                       */
+                 0u);
+    OS_PendListInit (&p_q->PendList);                           /* Initialize the waiting list                          */
+}
+
+
+/*
+************************************************************************************************************************
+*                                      ADD/REMOVE MESSAGE QUEUE TO/FROM DEBUG LIST
+*
+* Description: These functions are called by uC/OS-III to add or remove a message queue to/from a message queue debug
+*              list.
+*
+* Arguments  : p_q     is a pointer to the message queue to add/remove
+*
+* Returns    : none
+*
+* Note(s)    : These functions are INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void  OS_QDbgListAdd (OS_Q  *p_q)
+{
+    p_q->DbgNamePtr               = (CPU_CHAR *)((void *)" ");
+    p_q->DbgPrevPtr               = DEF_NULL;
+    if (OSQDbgListPtr == DEF_NULL) {
+        p_q->DbgNextPtr           = DEF_NULL;
+    } else {
+        p_q->DbgNextPtr           =  OSQDbgListPtr;
+        OSQDbgListPtr->DbgPrevPtr =  p_q;
+    }
+    OSQDbgListPtr                 =  p_q;
+}
+
+
+
+void  OS_QDbgListRemove (OS_Q  *p_q)
+{
+    OS_Q  *p_q_next;
+    OS_Q  *p_q_prev;
+
+
+    p_q_prev = p_q->DbgPrevPtr;
+    p_q_next = p_q->DbgNextPtr;
+
+    if (p_q_prev == DEF_NULL) {
+        OSQDbgListPtr = p_q_next;
+        if (p_q_next != DEF_NULL) {
+            p_q_next->DbgPrevPtr = DEF_NULL;
+        }
+        p_q->DbgNextPtr = DEF_NULL;
+
+    } else if (p_q_next == DEF_NULL) {
+        p_q_prev->DbgNextPtr = DEF_NULL;
+        p_q->DbgPrevPtr      = DEF_NULL;
+
+    } else {
+        p_q_prev->DbgNextPtr =  p_q_next;
+        p_q_next->DbgPrevPtr =  p_q_prev;
+        p_q->DbgNextPtr      = DEF_NULL;
+        p_q->DbgPrevPtr      = DEF_NULL;
+    }
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                               POST MESSAGE TO A QUEUE
+*
+* Description: This function sends a message to a queue.  With the 'opt' argument, you can specify whether the message
+*              is broadcast to all waiting tasks and/or whether you post the message to the front of the queue (LIFO)
+*              or normally (FIFO) at the end of the queue.
+*
+* Arguments  : p_q           is a pointer to a message queue that must have been created by OSQCreate().
+*
+*              p_void        is a pointer to the message to send.
+*
+*              msg_size      specifies the size of the message (in bytes)
+*
+*              opt           determines the type of POST performed:
+*
+*                                OS_OPT_POST_ALL          POST to ALL tasks that are waiting on the queue
+*
+*                                OS_OPT_POST_FIFO         POST as FIFO and wake up single waiting task
+*                                OS_OPT_POST_LIFO         POST as LIFO and wake up single waiting task
+*
+*                                OS_OPT_POST_NO_SCHED     Do not call the scheduler
+*
+*              ts            is the timestamp of the post
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE            The call was successful and the message was sent
+*                                OS_ERR_MSG_POOL_EMPTY  If there are no more OS_MSGs to use to place the message into
+*                                OS_ERR_Q_MAX           If the queue is full
+*
+* Returns    : None
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_QPost (OS_Q         *p_q,
+                void         *p_void,
+                OS_MSG_SIZE   msg_size,
+                OS_OPT        opt,
+                CPU_TS        ts,
+                OS_ERR       *p_err)
+{
+    OS_OPT         post_type;
+    OS_PEND_LIST  *p_pend_list;
+    OS_PEND_DATA  *p_pend_data;
+    OS_PEND_DATA  *p_pend_data_next;
+    OS_TCB        *p_tcb;
+    CPU_SR_ALLOC();
+
+
+
+    OS_CRITICAL_ENTER();
+    p_pend_list = &p_q->PendList;
+    if (p_pend_list->HeadPtr == DEF_NULL) {                     /* Any task waiting on message queue?                   */
+        if ((opt & OS_OPT_POST_LIFO) == 0u) {                   /* Determine whether we post FIFO or LIFO               */
+            post_type = OS_OPT_POST_FIFO;
+        } else {
+            post_type = OS_OPT_POST_LIFO;
+        }
+        OS_MsgQPut(&p_q->MsgQ,                                  /* Place message in the message queue                   */
+                   p_void,
+                   msg_size,
+                   post_type,
+                   ts,
+                   p_err);
+        OS_CRITICAL_EXIT();
+        return;
+    }
+
+    p_pend_data = p_pend_list->HeadPtr;
+    while (p_pend_data != DEF_NULL) {
+        p_tcb            = p_pend_data->TCBPtr;
+        p_pend_data_next = p_pend_data->NextPtr;
+        OS_Post((OS_PEND_OBJ *)((void *)p_q),
+                p_tcb,
+                p_void,
+                msg_size,
+                ts);
+        if ((opt & OS_OPT_POST_ALL) == 0)  {                    /* Post message to all tasks waiting?                   */
+            break;                                              /* No                                                   */
+        }
+        p_pend_data = p_pend_data_next;
+    }
+    OS_CRITICAL_EXIT_NO_SCHED();
+    if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+        OSSched();                                              /* Run the scheduler                                    */
+    }
+   *p_err = OS_ERR_NONE;
+}
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_sem.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_sem.c
new file mode 100644
index 0000000..162f4dd
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_sem.c
@@ -0,0 +1,1044 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                 SEMAPHORE MANAGEMENT
+*
+* File    : OS_SEM.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_sem__c = "$Id: $";
+#endif
+
+
+#if (OS_CFG_SEM_EN == DEF_ENABLED)
+/*
+************************************************************************************************************************
+*                                                  CREATE A SEMAPHORE
+*
+* Description: This function creates a semaphore.
+*
+* Arguments  : p_sem         is a pointer to the semaphore to initialize.  Your application is responsible for
+*                            allocating storage for the semaphore.
+*
+*              p_name        is a pointer to the name you would like to give the semaphore.
+*
+*              cnt           is the initial value for the semaphore.
+*                            If used to share resources, you should initialize to the number of resources available.
+*                            If used to signal the occurrence of event(s) then you should initialize to 0.
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE                    If the call was successful
+*                                OS_ERR_CREATE_ISR              If you called this function from an ISR
+*                                OS_ERR_ILLEGAL_CREATE_RUN_TIME If you are trying to create the semaphore after you
+*                                                                 called OSStart()
+*                                OS_ERR_OBJ_PTR_NULL            If 'p_sem'  is a NULL pointer
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSSemCreate (OS_SEM      *p_sem,
+                   CPU_CHAR    *p_name,
+                   OS_SEM_CTR   cnt,
+                   OS_ERR      *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_CREATE_RUN_TIME;
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to be called from an ISR                 */
+       *p_err = OS_ERR_CREATE_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_sem == DEF_NULL) {                                    /* Validate 'p_sem'                                     */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+#endif
+
+    OS_CRITICAL_ENTER();
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_sem->Type    = OS_OBJ_TYPE_SEM;                           /* Mark the data structure as a semaphore               */
+#endif
+    p_sem->Ctr     = cnt;                                       /* Set semaphore value                                  */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_sem->TS      = 0u;
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_sem->NamePtr = p_name;                                    /* Save the name of the semaphore                       */
+#else
+    (void)&p_name;
+#endif
+    OS_PendListInit(&p_sem->PendList);                          /* Initialize the waiting list                          */
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_SemDbgListAdd(p_sem);
+    OSSemQty++;
+#endif
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_SEM_CREATE(p_sem, p_name);                         /* Record the event.                                    */
+#endif
+
+    OS_CRITICAL_EXIT_NO_SCHED();
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                                  DELETE A SEMAPHORE
+*
+* Description: This function deletes a semaphore.
+*
+* Arguments  : p_sem         is a pointer to the semaphore to delete
+*
+*              opt           determines delete options as follows:
+*
+*                                OS_OPT_DEL_NO_PEND          Delete semaphore ONLY if no task pending
+*                                OS_OPT_DEL_ALWAYS           Deletes the semaphore even if tasks are waiting.
+*                                                            In this case, all the tasks pending will be readied.
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE                    The call was successful and the semaphore was deleted
+*                                OS_ERR_DEL_ISR                 If you attempted to delete the semaphore from an ISR
+*                                OS_ERR_ILLEGAL_DEL_RUN_TIME    If you are trying to delete the semaphore after you called
+*                                                                 OSStart()
+*                                OS_ERR_OBJ_PTR_NULL            If 'p_sem' is a NULL pointer
+*                                OS_ERR_OBJ_TYPE                If 'p_sem' is not pointing at a semaphore
+*                                OS_ERR_OPT_INVALID             An invalid option was specified
+*                                OS_ERR_OS_NOT_RUNNING          If uC/OS-III is not running yet
+*                                OS_ERR_TASK_WAITING            One or more tasks were waiting on the semaphore
+*
+* Returns    : == 0          if no tasks were waiting on the semaphore, or upon error.
+*              >  0          if one or more tasks waiting on the semaphore are now readied and informed.
+*
+* Note(s)    : 1) This function must be used with care.  Tasks that would normally expect the presence of the semaphore
+*                 MUST check the return code of OSSemPend().
+*              2) Because ALL tasks pending on the semaphore will be readied, you MUST be careful in applications where
+*                 the semaphore is used for mutual exclusion because the resource(s) will no longer be guarded by the
+*                 semaphore.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_SEM_DEL_EN == DEF_ENABLED)
+OS_OBJ_QTY  OSSemDel (OS_SEM  *p_sem,
+                      OS_OPT   opt,
+                      OS_ERR  *p_err)
+{
+    OS_OBJ_QTY     nbr_tasks;
+    OS_PEND_DATA  *p_pend_data;
+    OS_PEND_LIST  *p_pend_list;
+    OS_TCB        *p_tcb;
+    CPU_TS         ts;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_DEL_RUN_TIME;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to delete a semaphore from an ISR        */
+       *p_err = OS_ERR_DEL_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_sem == DEF_NULL) {                                    /* Validate 'p_sem'                                     */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_sem->Type != OS_OBJ_TYPE_SEM) {                       /* Make sure semaphore was created                      */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    p_pend_list = &p_sem->PendList;
+    nbr_tasks   = 0u;
+    switch (opt) {
+        case OS_OPT_DEL_NO_PEND:                                /* Delete semaphore only if no task waiting             */
+             if (p_pend_list->HeadPtr == DEF_NULL) {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                 OS_SemDbgListRemove(p_sem);
+                 OSSemQty--;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                 TRACE_OS_SEM_DEL(p_sem);                       /* Record the event.                                    */
+#endif
+                 OS_SemClr(p_sem);
+                 CPU_CRITICAL_EXIT();
+                *p_err = OS_ERR_NONE;
+             } else {
+                 CPU_CRITICAL_EXIT();
+                *p_err = OS_ERR_TASK_WAITING;
+             }
+             break;
+
+        case OS_OPT_DEL_ALWAYS:                                 /* Always delete the semaphore                          */
+             OS_CRITICAL_ENTER_CPU_EXIT();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             ts = OS_TS_GET();                                  /* Get local time stamp so all tasks get the same time  */
+#else
+             ts = 0u;
+#endif
+             while (p_pend_list->HeadPtr != DEF_NULL) {         /* Remove all tasks on the pend list                    */
+                 p_pend_data = p_pend_list->HeadPtr;
+                 p_tcb       = p_pend_data->TCBPtr;
+                 OS_PendObjDel((OS_PEND_OBJ *)((void *)p_sem),
+                               p_tcb,
+                               ts);
+                 nbr_tasks++;
+             }
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+             OS_SemDbgListRemove(p_sem);
+             OSSemQty--;
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_SEM_DEL(p_sem);                           /* Record the event.                                    */
+#endif
+             OS_SemClr(p_sem);
+             OS_CRITICAL_EXIT_NO_SCHED();
+             OSSched();                                         /* Find highest priority task ready to run              */
+            *p_err = OS_ERR_NONE;
+             break;
+
+        default:
+             CPU_CRITICAL_EXIT();
+            *p_err = OS_ERR_OPT_INVALID;
+             break;
+    }
+    return (nbr_tasks);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                  PEND ON SEMAPHORE
+*
+* Description: This function waits for a semaphore.
+*
+* Arguments  : p_sem         is a pointer to the semaphore
+*
+*              timeout       is an optional timeout period (in clock ticks).  If non-zero, your task will wait for the
+*                            resource up to the amount of time (in 'ticks') specified by this argument.  If you specify
+*                            0, however, your task will wait forever at the specified semaphore or, until the resource
+*                            becomes available (or the event occurs).
+*
+*              opt           determines whether the user wants to block if the semaphore is available or not:
+*
+*                                OS_OPT_PEND_BLOCKING
+*                                OS_OPT_PEND_NON_BLOCKING
+*
+*              p_ts          is a pointer to a variable that will receive the timestamp of when the semaphore was posted
+*                            or pend aborted or the semaphore deleted.  If you pass a NULL pointer (i.e. (CPU_TS*)0)
+*                            then you will not get the timestamp.  In other words, passing a NULL pointer is valid
+*                            and indicates that you don't need the timestamp.
+*
+*              p_err         is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE               The call was successful and your task owns the resource
+*                                                          or, the event you are waiting for occurred
+*                                OS_ERR_OBJ_DEL            If 'p_sem' was deleted
+*                                OS_ERR_OBJ_PTR_NULL       If 'p_sem' is a NULL pointer
+*                                OS_ERR_OBJ_TYPE           If 'p_sem' is not pointing at a semaphore
+*                                OS_ERR_OPT_INVALID        If you specified an invalid value for 'opt'
+*                                OS_ERR_OS_NOT_RUNNING     If uC/OS-III is not running yet
+*                                OS_ERR_PEND_ABORT         If the pend was aborted by another task
+*                                OS_ERR_PEND_ISR           If you called this function from an ISR and the result
+*                                                          would lead to a suspension
+*                                OS_ERR_PEND_WOULD_BLOCK   If you specified non-blocking but the semaphore was not
+*                                                          available
+*                                OS_ERR_SCHED_LOCKED       If you called this function when the scheduler is locked
+*                                OS_ERR_STATUS_INVALID     Pend status is invalid
+*                                OS_ERR_TIMEOUT            The semaphore was not received within the specified
+*                                                          timeout
+*
+*
+* Returns    : The current value of the semaphore counter or 0 if not available.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+OS_SEM_CTR  OSSemPend (OS_SEM   *p_sem,
+                       OS_TICK   timeout,
+                       OS_OPT    opt,
+                       CPU_TS   *p_ts,
+                       OS_ERR   *p_err)
+{
+    OS_SEM_CTR    ctr;
+    OS_PEND_DATA  pend_data;
+    CPU_SR_ALLOC();
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)&p_ts;                                                /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_SEM_PEND_FAILED(p_sem);                        /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_PEND_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_sem == DEF_NULL) {                                    /* Validate 'p_sem'                                     */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_PEND_BLOCKING:
+        case OS_OPT_PEND_NON_BLOCKING:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_SEM_PEND_FAILED(p_sem);                   /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_sem->Type != OS_OBJ_TYPE_SEM) {                       /* Make sure semaphore was created                      */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_SEM_PEND_FAILED(p_sem);                        /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+    if (p_sem->Ctr > 0u) {                                      /* Resource available?                                  */
+        p_sem->Ctr--;                                           /* Yes, caller may proceed                              */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        if (p_ts != DEF_NULL) {
+           *p_ts = p_sem->TS;                                   /* get timestamp of last post                           */
+        }
+#endif
+        ctr   = p_sem->Ctr;
+        CPU_CRITICAL_EXIT();
+       *p_err = OS_ERR_NONE;
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_SEM_PEND(p_sem);                               /* Record the event.                                    */
+#endif
+        return (ctr);
+    }
+
+    if ((opt & OS_OPT_PEND_NON_BLOCKING) != 0u) {               /* Caller wants to block if not available?              */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        if (p_ts != DEF_NULL) {
+           *p_ts = 0u;
+        }
+#endif
+        ctr   = p_sem->Ctr;                                     /* No                                                   */
+        CPU_CRITICAL_EXIT();
+       *p_err = OS_ERR_PEND_WOULD_BLOCK;
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_SEM_PEND_FAILED(p_sem);                        /* Record the event.                                    */
+#endif
+        return (ctr);
+    } else {                                                    /* Yes                                                  */
+        if (OSSchedLockNestingCtr > 0u) {                       /* Can't pend when the scheduler is locked              */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+            if (p_ts != DEF_NULL) {
+               *p_ts = 0u;
+            }
+#endif
+            CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+            TRACE_OS_SEM_PEND_FAILED(p_sem);                    /* Record the event.                                    */
+#endif
+           *p_err = OS_ERR_SCHED_LOCKED;
+            return (0u);
+        }
+    }
+                                                                /* Lock the scheduler/re-enable interrupts              */
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    OS_Pend(&pend_data,                                         /* Block task pending on Semaphore                      */
+            (OS_PEND_OBJ *)((void *)p_sem),
+            OS_TASK_PEND_ON_SEM,
+            timeout);
+    OS_CRITICAL_EXIT_NO_SCHED();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_SEM_PEND_BLOCK(p_sem);                             /* Record the event.                                    */
+#endif
+    OSSched();                                                  /* Find the next highest priority task ready to run     */
+
+    CPU_CRITICAL_ENTER();
+    switch (OSTCBCurPtr->PendStatus) {
+        case OS_STATUS_PEND_OK:                                 /* We got the semaphore                                 */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_SEM_PEND(p_sem);                          /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_NONE;
+             break;
+
+        case OS_STATUS_PEND_ABORT:                              /* Indicate that we aborted                             */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_SEM_PEND_FAILED(p_sem);                   /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_PEND_ABORT;
+             break;
+
+        case OS_STATUS_PEND_TIMEOUT:                            /* Indicate that we didn't get semaphore within timeout */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = 0u;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_SEM_PEND_FAILED(p_sem);                   /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_TIMEOUT;
+             break;
+
+        case OS_STATUS_PEND_DEL:                                /* Indicate that object pended on has been deleted      */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_SEM_PEND_FAILED(p_sem);                   /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OBJ_DEL;
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_SEM_PEND_FAILED(p_sem);                   /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_STATUS_INVALID;
+             CPU_CRITICAL_EXIT();
+             return (0u);
+    }
+    ctr = p_sem->Ctr;
+    CPU_CRITICAL_EXIT();
+    return (ctr);
+}
+
+
+/*
+************************************************************************************************************************
+*                                             ABORT WAITING ON A SEMAPHORE
+*
+* Description: This function aborts & readies any tasks currently waiting on a semaphore.  This function should be used
+*              to fault-abort the wait on the semaphore, rather than to normally signal the semaphore via OSSemPost().
+*
+* Arguments  : p_sem     is a pointer to the semaphore
+*
+*              opt       determines the type of ABORT performed:
+*
+*                            OS_OPT_PEND_ABORT_1          ABORT wait for a single task (HPT) waiting on the semaphore
+*                            OS_OPT_PEND_ABORT_ALL        ABORT wait for ALL tasks that are  waiting on the semaphore
+*                            OS_OPT_POST_NO_SCHED         Do not call the scheduler
+*
+*              p_err     is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_NONE                  At least one task waiting on the semaphore was readied and
+*                                                         informed of the aborted wait; check return value for the
+*                                                         number of tasks whose wait on the semaphore was aborted.
+*                            OS_ERR_OBJ_PTR_NULL          If 'p_sem' is a NULL pointer.
+*                            OS_ERR_OBJ_TYPE              If 'p_sem' is not pointing at a semaphore
+*                            OS_ERR_OPT_INVALID           If you specified an invalid option
+*                            OS_ERR_OS_NOT_RUNNING        If uC/OS-III is not running yet
+*                            OS_ERR_PEND_ABORT_ISR        If you called this function from an ISR
+*                            OS_ERR_PEND_ABORT_NONE       No task were pending
+*
+* Returns    : == 0          if no tasks were waiting on the semaphore, or upon error.
+*              >  0          if one or more tasks waiting on the semaphore are now readied and informed.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_SEM_PEND_ABORT_EN == DEF_ENABLED)
+OS_OBJ_QTY  OSSemPendAbort (OS_SEM  *p_sem,
+                            OS_OPT   opt,
+                            OS_ERR  *p_err)
+{
+    OS_PEND_LIST  *p_pend_list;
+    OS_TCB        *p_tcb;
+    CPU_TS         ts;
+    OS_OBJ_QTY     nbr_tasks;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to Pend Abort from an ISR                */
+       *p_err =  OS_ERR_PEND_ABORT_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_sem == DEF_NULL) {                                    /* Validate 'p_sem'                                     */
+       *p_err =  OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_PEND_ABORT_1:
+        case OS_OPT_PEND_ABORT_ALL:
+        case OS_OPT_PEND_ABORT_1   | OS_OPT_POST_NO_SCHED:
+        case OS_OPT_PEND_ABORT_ALL | OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+            *p_err =  OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_sem->Type != OS_OBJ_TYPE_SEM) {                       /* Make sure semaphore was created                      */
+       *p_err =  OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    p_pend_list = &p_sem->PendList;
+    if (p_pend_list->HeadPtr == DEF_NULL) {                     /* Any task waiting on semaphore?                       */
+        CPU_CRITICAL_EXIT();                                    /* No                                                   */
+       *p_err =  OS_ERR_PEND_ABORT_NONE;
+        return (0u);
+    }
+
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    nbr_tasks = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts        = OS_TS_GET();                                    /* Get local time stamp so all tasks get the same time  */
+#else
+    ts        = 0u;
+#endif
+    while (p_pend_list->HeadPtr != DEF_NULL) {
+        p_tcb = p_pend_list->HeadPtr->TCBPtr;
+        OS_PendAbort((OS_PEND_OBJ *)((void *)p_sem),
+                     p_tcb,
+                     ts);
+        nbr_tasks++;
+        if (opt != OS_OPT_PEND_ABORT_ALL) {                     /* Pend abort all tasks waiting?                        */
+            break;                                              /* No                                                   */
+        }
+    }
+    OS_CRITICAL_EXIT_NO_SCHED();
+
+    if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+        OSSched();                                              /* Run the scheduler                                    */
+    }
+
+   *p_err = OS_ERR_NONE;
+    return (nbr_tasks);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                 POST TO A SEMAPHORE
+*
+* Description: This function signals a semaphore.
+*
+* Arguments  : p_sem    is a pointer to the semaphore
+*
+*              opt      determines the type of POST performed:
+*
+*                           OS_OPT_POST_1            POST and ready only the highest priority task waiting on semaphore
+*                                                    (if tasks are waiting).
+*                           OS_OPT_POST_ALL          POST to ALL tasks that are waiting on the semaphore
+*
+*                           OS_OPT_POST_NO_SCHED     Do not call the scheduler
+*
+*                           Note(s): 1) OS_OPT_POST_NO_SCHED can be added with one of the other options.
+*
+*              p_err    is a pointer to a variable that will contain an error code returned by this function.
+*
+*                           OS_ERR_NONE              The call was successful and the semaphore was signaled
+*                           OS_ERR_INT_Q_FULL        If the deferred interrupt post queue is full
+*                           OS_ERR_OBJ_PTR_NULL      If 'p_sem' is a NULL pointer
+*                           OS_ERR_OBJ_TYPE          If 'p_sem' is not pointing at a semaphore
+*                           OS_ERR_OPT_INVALID       If you specified an invalid option
+*                           OS_ERR_OS_NOT_RUNNING    If uC/OS-III is not running yet
+*                           OS_ERR_SEM_OVF           If the post would cause the semaphore count to overflow
+*
+* Returns    : The current value of the semaphore counter or 0 upon error.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+OS_SEM_CTR  OSSemPost (OS_SEM  *p_sem,
+                       OS_OPT   opt,
+                       OS_ERR  *p_err)
+{
+    OS_SEM_CTR  ctr;
+    CPU_TS      ts;
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_sem == DEF_NULL) {                                    /* Validate 'p_sem'                                     */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_SEM_POST_FAILED(p_sem);                        /* Record the event.                                    */
+#endif
+       *p_err  = OS_ERR_OBJ_PTR_NULL;
+        return (0u);
+    }
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_POST_1:
+        case OS_OPT_POST_ALL:
+        case OS_OPT_POST_1   | OS_OPT_POST_NO_SCHED:
+        case OS_OPT_POST_ALL | OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_SEM_POST_FAILED(p_sem);                   /* Record the event.                                    */
+#endif
+            *p_err =  OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_sem->Type != OS_OBJ_TYPE_SEM) {                       /* Make sure semaphore was created                      */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_SEM_POST_FAILED(p_sem);                        /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts = OS_TS_GET();                                           /* Get timestamp                                        */
+#else
+    ts = 0u;
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from an ISR                            */
+        OS_IntQPost(OS_OBJ_TYPE_SEM,                            /* Post to ISR queue                                    */
+                    (void      *)p_sem,
+                    DEF_NULL,
+                    0u,
+                    0u,
+                    opt,
+                    ts,
+                    p_err);
+        return (0u);
+    }
+#endif
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_SEM_POST(p_sem);                                   /* Record the event.                                    */
+#endif
+
+    ctr = OS_SemPost(p_sem,                                     /* Post to semaphore                                    */
+                     opt,
+                     ts,
+                     p_err);
+
+    return (ctr);
+}
+
+
+/*
+************************************************************************************************************************
+*                                                    SET SEMAPHORE
+*
+* Description: This function sets the semaphore count to the value specified as an argument.  Typically, this value
+*              would be 0 but of course, we can set the semaphore to any value.
+*
+*              You would typically use this function when a semaphore is used as a signaling mechanism
+*              and, you want to reset the count value.
+*
+* Arguments  : p_sem     is a pointer to the semaphore
+*
+*              cnt       is the new value for the semaphore count.  You would pass 0 to reset the semaphore count.
+*
+*              p_err     is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_NONE           The call was successful and the semaphore value was set
+*                            OS_ERR_OBJ_PTR_NULL   If 'p_sem' is a NULL pointer
+*                            OS_ERR_OBJ_TYPE       If 'p_sem' is not pointing to a semaphore
+*                            OS_ERR_SET_ISR        If called from an ISR
+*                            OS_ERR_TASK_WAITING   If tasks are waiting on the semaphore
+*
+* Returns    : None
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_SEM_SET_EN == DEF_ENABLED)
+void  OSSemSet (OS_SEM      *p_sem,
+                OS_SEM_CTR   cnt,
+                OS_ERR      *p_err)
+{
+    OS_PEND_LIST  *p_pend_list;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Can't call this function from an ISR                 */
+       *p_err = OS_ERR_SET_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_sem == DEF_NULL) {                                    /* Validate 'p_sem'                                     */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_sem->Type != OS_OBJ_TYPE_SEM) {                       /* Make sure semaphore was created                      */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return;
+    }
+#endif
+
+   *p_err = OS_ERR_NONE;
+    CPU_CRITICAL_ENTER();
+    if (p_sem->Ctr > 0u) {                                      /* See if semaphore already has a count                 */
+        p_sem->Ctr = cnt;                                       /* Yes, set it to the new value specified.              */
+    } else {
+        p_pend_list = &p_sem->PendList;                         /* No                                                   */
+        if (p_pend_list->HeadPtr == DEF_NULL) {                 /* See if task(s) waiting?                              */
+            p_sem->Ctr = cnt;                                   /* No, OK to set the value                              */
+        } else {
+           *p_err      = OS_ERR_TASK_WAITING;
+        }
+    }
+    CPU_CRITICAL_EXIT();
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                           CLEAR THE CONTENTS OF A SEMAPHORE
+*
+* Description: This function is called by OSSemDel() to clear the contents of a semaphore
+*
+
+* Argument(s): p_sem      is a pointer to the semaphore to clear
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_SemClr (OS_SEM  *p_sem)
+{
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_sem->Type    = OS_OBJ_TYPE_NONE;                          /* Mark the data structure as a NONE                    */
+#endif
+    p_sem->Ctr     = 0u;                                        /* Set semaphore value                                  */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_sem->TS      = 0u;                                        /* Clear the time stamp                                 */
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_sem->NamePtr = (CPU_CHAR *)((void *)"?SEM");
+#endif
+    OS_PendListInit(&p_sem->PendList);                          /* Initialize the waiting list                          */
+}
+
+
+/*
+************************************************************************************************************************
+*                                        ADD/REMOVE SEMAPHORE TO/FROM DEBUG LIST
+*
+* Description: These functions are called by uC/OS-III to add or remove a semaphore to/from the debug list.
+*
+* Arguments  : p_sem     is a pointer to the semaphore to add/remove
+*
+* Returns    : none
+*
+* Note(s)    : These functions are INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void  OS_SemDbgListAdd (OS_SEM  *p_sem)
+{
+    p_sem->DbgNamePtr               = (CPU_CHAR *)((void *)" ");
+    p_sem->DbgPrevPtr               = DEF_NULL;
+    if (OSSemDbgListPtr == DEF_NULL) {
+        p_sem->DbgNextPtr           = DEF_NULL;
+    } else {
+        p_sem->DbgNextPtr           =  OSSemDbgListPtr;
+        OSSemDbgListPtr->DbgPrevPtr =  p_sem;
+    }
+    OSSemDbgListPtr                 =  p_sem;
+}
+
+
+
+void  OS_SemDbgListRemove (OS_SEM  *p_sem)
+{
+    OS_SEM  *p_sem_next;
+    OS_SEM  *p_sem_prev;
+
+
+    p_sem_prev = p_sem->DbgPrevPtr;
+    p_sem_next = p_sem->DbgNextPtr;
+
+    if (p_sem_prev == DEF_NULL) {
+        OSSemDbgListPtr = p_sem_next;
+        if (p_sem_next != DEF_NULL) {
+            p_sem_next->DbgPrevPtr = DEF_NULL;
+        }
+        p_sem->DbgNextPtr = DEF_NULL;
+
+    } else if (p_sem_next == DEF_NULL) {
+        p_sem_prev->DbgNextPtr = DEF_NULL;
+        p_sem->DbgPrevPtr      = DEF_NULL;
+
+    } else {
+        p_sem_prev->DbgNextPtr =  p_sem_next;
+        p_sem_next->DbgPrevPtr =  p_sem_prev;
+        p_sem->DbgNextPtr      = DEF_NULL;
+        p_sem->DbgPrevPtr      = DEF_NULL;
+    }
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                 POST TO A SEMAPHORE
+*
+* Description: This function signals a semaphore
+*
+* Arguments  : p_sem    is a pointer to the semaphore
+*
+*              opt      determines the type of POST performed:
+*
+*                           OS_OPT_POST_1            POST to a single waiting task
+*                           OS_OPT_POST_ALL          POST to ALL tasks that are waiting on the semaphore
+*
+*                           OS_OPT_POST_NO_SCHED     Do not call the scheduler
+*
+*                           Note(s): 1) OS_OPT_POST_NO_SCHED can be added with one of the other options.
+*
+*              ts       is a timestamp indicating when the post occurred.
+*
+*              p_err    is a pointer to a variable that will contain an error code returned by this function.
+*
+*                           OS_ERR_NONE          The call was successful and the semaphore was signaled.
+*                           OS_ERR_SEM_OVF       If the post would cause the semaphore count to overflow.
+*
+* Returns    : The current value of the semaphore counter or 0 upon error.
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+OS_SEM_CTR  OS_SemPost (OS_SEM  *p_sem,
+                        OS_OPT   opt,
+                        CPU_TS   ts,
+                        OS_ERR  *p_err)
+{
+    OS_SEM_CTR     ctr;
+    OS_PEND_LIST  *p_pend_list;
+    OS_PEND_DATA  *p_pend_data;
+    OS_PEND_DATA  *p_pend_data_next;
+    OS_TCB        *p_tcb;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    p_pend_list = &p_sem->PendList;
+    if (p_pend_list->HeadPtr == DEF_NULL) {                     /* Any task waiting on semaphore?                       */
+        if (p_sem->Ctr == (OS_SEM_CTR)-1) {
+           CPU_CRITICAL_EXIT();
+          *p_err = OS_ERR_SEM_OVF;
+           return (0u);
+        }
+        p_sem->Ctr++;                                           /* No                                                   */
+        ctr       = p_sem->Ctr;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        p_sem->TS = ts;                                         /* Save timestamp in semaphore control block            */
+#endif
+        CPU_CRITICAL_EXIT();
+       *p_err     = OS_ERR_NONE;
+        return (ctr);
+    }
+
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    p_pend_data = p_pend_list->HeadPtr;
+    while (p_pend_data != DEF_NULL) {
+        p_tcb            = p_pend_data->TCBPtr;
+        p_pend_data_next = p_pend_data->NextPtr;
+        OS_Post((OS_PEND_OBJ *)((void *)p_sem),
+                p_tcb,
+                DEF_NULL,
+                0u,
+                ts);
+        if ((opt & OS_OPT_POST_ALL) == 0) {                     /* Post to all tasks waiting?                           */
+            break;                                              /* No                                                   */
+        }
+        p_pend_data = p_pend_data_next;
+    }
+    OS_CRITICAL_EXIT_NO_SCHED();
+    if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+        OSSched();                                              /* Run the scheduler                                    */
+    }
+   *p_err = OS_ERR_NONE;
+    return (0u);
+}
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_stat.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_stat.c
new file mode 100644
index 0000000..03b535c
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_stat.c
@@ -0,0 +1,541 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                  STATISTICS MODULE
+*
+* File    : OS_STAT.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_stat__c = "$Id: $";
+#endif
+
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+
+/*
+************************************************************************************************************************
+*                                                   RESET STATISTICS
+*
+* Description: This function is called by your application to reset the statistics.
+*
+* Argument(s): p_err      is a pointer to a variable that will contain an error code returned by this function.
+*
+*                             OS_ERR_NONE            The call succeeded
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSStatReset (OS_ERR  *p_err)
+{
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_TCB      *p_tcb;
+#if (OS_MSG_EN == DEF_ENABLED)
+    OS_MSG_Q    *p_msg_q;
+#endif
+#if (OS_CFG_Q_EN == DEF_ENABLED)
+    OS_Q        *p_q;
+#endif
+#endif
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    OSIntQTaskTimeMax     = 0u;                                 /* Reset the task execution times                       */
+#endif
+    OSIntQNbrEntriesMax   = 0u;                                 /* Reset the queue maximum number of entries            */
+#endif
+
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+    OSStatTaskCPUUsageMax = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    OSStatTaskTimeMax     = 0u;
+#endif
+#endif
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    OSTickTaskTimeMax     = 0u;
+#endif
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    OSTmrTaskTimeMax      = 0u;
+#endif
+#endif
+
+#ifdef CPU_CFG_INT_DIS_MEAS_EN
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    OSIntDisTimeMax       = 0u;                                 /* Reset the maximum interrupt disable time             */
+    CPU_StatReset();                                            /* Reset CPU-specific performance monitors.             */
+#endif
+#endif
+
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+    OSSchedLockTimeMax    = 0u;                                 /* Reset the maximum scheduler lock time                */
+#endif
+
+#if ((OS_MSG_EN == DEF_ENABLED) && (OS_CFG_DBG_EN == DEF_ENABLED))
+    OSMsgPool.NbrUsedMax  = 0u;
+#endif
+    CPU_CRITICAL_EXIT();
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CRITICAL_ENTER();
+    p_tcb = OSTaskDbgListPtr;
+    CPU_CRITICAL_EXIT();
+    while (p_tcb != DEF_NULL) {                                 /* Reset per-Task statistics                            */
+        CPU_CRITICAL_ENTER();
+
+#ifdef CPU_CFG_INT_DIS_MEAS_EN
+        p_tcb->IntDisTimeMax    = 0u;
+#endif
+
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+        p_tcb->SchedLockTimeMax = 0u;
+#endif
+
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+        p_tcb->MsgQPendTimeMax  = 0u;
+#endif
+        p_tcb->SemPendTimeMax   = 0u;
+        p_tcb->CtxSwCtr         = 0u;
+        p_tcb->CPUUsage         = 0u;
+        p_tcb->CPUUsageMax      = 0u;
+        p_tcb->CyclesTotal      = 0u;
+        p_tcb->CyclesTotalPrev  = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        p_tcb->CyclesStart      = OS_TS_GET();
+#endif
+#endif
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+        p_msg_q                 = &p_tcb->MsgQ;
+        p_msg_q->NbrEntriesMax  = 0u;
+#endif
+        p_tcb                   = p_tcb->DbgNextPtr;
+        CPU_CRITICAL_EXIT();
+    }
+#endif
+
+#if (OS_CFG_Q_EN == DEF_ENABLED) && (OS_CFG_DBG_EN == DEF_ENABLED)
+    CPU_CRITICAL_ENTER();
+    p_q = OSQDbgListPtr;
+    CPU_CRITICAL_EXIT();
+    while (p_q != DEF_NULL) {                                   /* Reset message queues statistics                      */
+        CPU_CRITICAL_ENTER();
+        p_msg_q                = &p_q->MsgQ;
+        p_msg_q->NbrEntriesMax = 0u;
+        p_q                    = p_q->DbgNextPtr;
+        CPU_CRITICAL_EXIT();
+    }
+#endif
+
+
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                                DETERMINE THE CPU CAPACITY
+*
+* Description: This function is called by your application to establish CPU usage by first determining how high a 32-bit
+*              counter would count to in 1/10 second if no other tasks were to execute during that time.  CPU usage is
+*              then determined by a low priority task which keeps track of this 32-bit counter every second but this
+*              time, with other tasks running.  CPU usage is determined by:
+*
+*                                             OS_Stat_IdleCtr
+*                 CPU Usage (%) = 100 * (1 - ------------------)
+*                                            OS_Stat_IdleCtrMax
+*
+* Argument(s): p_err      is a pointer to a variable that will contain an error code returned by this function.
+*
+*                             OS_ERR_NONE              The call was successfu
+*                             OS_ERR_OS_NOT_RUNNING    If uC/OS-III is not running yet
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSStatTaskCPUUsageInit (OS_ERR  *p_err)
+{
+    OS_ERR   err;
+    OS_TICK  dly;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+#if ((OS_CFG_TMR_EN == DEF_ENABLED) && (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED))
+    OSTaskSuspend(&OSTmrTaskTCB, &err);
+    if (err != OS_ERR_NONE) {
+       *p_err = err;
+        return;
+    }
+#endif
+
+    OSTimeDly(2u,                                               /* Synchronize with clock tick                          */
+              (OS_OPT  )OS_OPT_TIME_DLY,
+              (OS_ERR *)&err);
+    if (err != OS_ERR_NONE) {
+       *p_err = err;
+        return;
+    }
+    CPU_CRITICAL_ENTER();
+    OSStatTaskCtr = 0u;                                         /* Clear idle counter                                   */
+    CPU_CRITICAL_EXIT();
+
+    dly = 0u;
+    if (OSCfg_TickRate_Hz > OSCfg_StatTaskRate_Hz) {
+        dly = (OS_TICK)(OSCfg_TickRate_Hz / OSCfg_StatTaskRate_Hz);
+    }
+    if (dly == 0u) {
+        dly =  (OSCfg_TickRate_Hz / 10u);
+    }
+
+    OSTimeDly(dly,                                              /* Determine MAX. idle counter value                    */
+              OS_OPT_TIME_DLY,
+              &err);
+
+#if ((OS_CFG_TMR_EN == DEF_ENABLED) && (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED))
+    OSTaskResume(&OSTmrTaskTCB, &err);
+    if (err != OS_ERR_NONE) {
+       *p_err = err;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    OSStatTaskTimeMax = 0u;
+#endif
+
+    OSStatTaskCtrMax  = OSStatTaskCtr;                          /* Store maximum idle counter count                     */
+    OSStatTaskRdy     = OS_STATE_RDY;
+    CPU_CRITICAL_EXIT();
+   *p_err             = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                                    STATISTICS TASK
+*
+* Description: This task is internal to uC/OS-III and is used to compute some statistics about the multitasking
+*              environment.  Specifically, OS_StatTask() computes the CPU usage.  CPU usage is determined by:
+*
+*                                                   OSStatTaskCtr
+*                 OSStatTaskCPUUsage = 100 * (1 - ------------------)     (units are in %)
+*                                                  OSStatTaskCtrMax
+*
+* Arguments  : p_arg     this pointer is not used at this time.
+*
+* Returns    : none
+*
+* Note(s)    : 1) This task runs at a priority level higher than the idle task.
+*
+*              2) You can disable this task by setting the configuration #define OS_CFG_STAT_TASK_EN to 0.
+*
+*              3) You MUST have at least a delay of 2/10 seconds to allow for the system to establish the maximum value
+*                 for the idle counter.
+*
+*              4) This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_StatTask (void  *p_arg)
+{
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+    OS_CPU_USAGE usage;
+    OS_CYCLES    cycles_total;
+    OS_CYCLES    cycles_div;
+    OS_CYCLES    cycles_mult;
+    OS_CYCLES    cycles_max;
+#endif
+    OS_TCB      *p_tcb;
+#endif
+    OS_TICK      ctr_max;
+    OS_TICK      ctr_mult;
+    OS_TICK      ctr_div;
+    OS_ERR       err;
+    OS_TICK      dly;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS       ts_start;
+    CPU_TS       ts_end;
+#endif
+    CPU_SR_ALLOC();
+
+
+
+    (void)p_arg;                                                /* Prevent compiler warning for not using 'p_arg'       */
+
+    while (OSStatTaskRdy != DEF_TRUE) {
+        OSTimeDly(2u * OSCfg_StatTaskRate_Hz,                   /* Wait until statistic task is ready                   */
+                  OS_OPT_TIME_DLY,
+                  &err);
+    }
+    OSStatReset(&err);                                          /* Reset statistics                                     */
+
+    dly = (OS_TICK)0;                                           /* Compute statistic task sleep delay                   */
+    if (OSCfg_TickRate_Hz > OSCfg_StatTaskRate_Hz) {
+        dly = (OSCfg_TickRate_Hz / OSCfg_StatTaskRate_Hz);
+    }
+    if (dly == 0u) {
+        dly =  (OSCfg_TickRate_Hz / 10u);
+    }
+
+    while (DEF_ON) {
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        ts_start        = OS_TS_GET();
+#endif
+#ifdef  CPU_CFG_INT_DIS_MEAS_EN
+        OSIntDisTimeMax = CPU_IntDisMeasMaxGet();
+#endif
+
+        CPU_CRITICAL_ENTER();                                   /* ---------------- OVERALL CPU USAGE ----------------- */
+        OSStatTaskCtrRun   = OSStatTaskCtr;                     /* Obtain the of the stat counter for the past .1 second*/
+        OSStatTaskCtr      = 0u;                                /* Reset the stat counter for the next .1 second        */
+        CPU_CRITICAL_EXIT();
+
+        if (OSStatTaskCtrMax > OSStatTaskCtrRun) {              /* Compute CPU Usage with best resolution               */
+            if (OSStatTaskCtrMax < 400000u) {                   /* 1 to       400,000                                   */
+                ctr_mult = 10000u;
+                ctr_div  =     1u;
+            } else if (OSStatTaskCtrMax <   4000000u) {         /* 400,000 to     4,000,000                             */
+                ctr_mult =  1000u;
+                ctr_div  =    10u;
+            } else if (OSStatTaskCtrMax <  40000000u) {         /* 4,000,000 to    40,000,000                           */
+                ctr_mult =   100u;
+                ctr_div  =   100u;
+            } else if (OSStatTaskCtrMax < 400000000u) {         /* 40,000,000 to   400,000,000                          */
+                ctr_mult =    10u;
+                ctr_div  =  1000u;
+            } else {                                            /* 400,000,000 and up                                   */
+                ctr_mult =     1u;
+                ctr_div  = 10000u;
+            }
+            ctr_max            = OSStatTaskCtrMax / ctr_div;
+            OSStatTaskCPUUsage = (OS_CPU_USAGE)((OS_TICK)10000u - ctr_mult * OSStatTaskCtrRun / ctr_max);
+            if (OSStatTaskCPUUsageMax < OSStatTaskCPUUsage) {
+                OSStatTaskCPUUsageMax = OSStatTaskCPUUsage;
+            }
+        } else {
+            OSStatTaskCPUUsage = 0u;
+        }
+
+        OSStatTaskHook();                                       /* Invoke user definable hook                           */
+
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+        cycles_total = 0u;
+
+        CPU_CRITICAL_ENTER();
+        p_tcb = OSTaskDbgListPtr;
+        CPU_CRITICAL_EXIT();
+        while (p_tcb != DEF_NULL) {                             /* ---------------- TOTAL CYCLES COUNT ---------------- */
+            OS_CRITICAL_ENTER();
+            p_tcb->CyclesTotalPrev = p_tcb->CyclesTotal;        /* Save accumulated # cycles into a temp variable       */
+            p_tcb->CyclesTotal     = 0u;                        /* Reset total cycles for task for next run             */
+            OS_CRITICAL_EXIT();
+
+            cycles_total          += p_tcb->CyclesTotalPrev;    /* Perform sum of all task # cycles                     */
+
+            CPU_CRITICAL_ENTER();
+            p_tcb                  = p_tcb->DbgNextPtr;
+            CPU_CRITICAL_EXIT();
+        }
+#endif
+
+
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+                                                                /* ------------ INDIVIDUAL TASK CPU USAGE ------------- */
+        if (cycles_total > 0u) {                                /* 'cycles_total' scaling ...                           */
+            if (cycles_total < 400000u) {                       /* 1 to       400,000                                   */
+                cycles_mult = 10000u;
+                cycles_div  =     1u;
+            } else if (cycles_total <   4000000u) {             /* 400,000 to     4,000,000                             */
+                cycles_mult =  1000u;
+                cycles_div  =    10u;
+            } else if (cycles_total <  40000000u) {             /* 4,000,000 to    40,000,000                           */
+                cycles_mult =   100u;
+                cycles_div  =   100u;
+            } else if (cycles_total < 400000000u) {             /* 40,000,000 to   400,000,000                          */
+                cycles_mult =    10u;
+                cycles_div  =  1000u;
+            } else {                                            /* 400,000,000 and up                                   */
+                cycles_mult =     1u;
+                cycles_div  = 10000u;
+            }
+            cycles_max  = cycles_total / cycles_div;
+        } else {
+            cycles_mult = 0u;
+            cycles_max  = 1u;
+        }
+#endif
+        CPU_CRITICAL_ENTER();
+        p_tcb = OSTaskDbgListPtr;
+        CPU_CRITICAL_EXIT();
+        while (p_tcb != DEF_NULL) {
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)                     /* Compute execution time of each task                  */
+            usage = (OS_CPU_USAGE)(cycles_mult * p_tcb->CyclesTotalPrev / cycles_max);
+            if (usage > 10000u) {
+                usage = 10000u;
+            }
+            p_tcb->CPUUsage = usage;
+            if (p_tcb->CPUUsageMax < usage) {                   /* Detect peak CPU usage                                */
+                p_tcb->CPUUsageMax = usage;
+            }
+#endif
+
+#if (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED)
+            OSTaskStkChk( p_tcb,                                /* Compute stack usage of active tasks only             */
+                         &p_tcb->StkFree,
+                         &p_tcb->StkUsed,
+                         &err);
+#endif
+
+            CPU_CRITICAL_ENTER();
+            p_tcb = p_tcb->DbgNextPtr;
+            CPU_CRITICAL_EXIT();
+        }
+#endif
+
+        if (OSStatResetFlag == DEF_TRUE) {                      /* Check if need to reset statistics                    */
+            OSStatResetFlag  = DEF_FALSE;
+            OSStatReset(&err);
+        }
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        ts_end = OS_TS_GET() - ts_start;                        /* Measure execution time of statistic task             */
+        if (OSStatTaskTimeMax < ts_end) {
+            OSStatTaskTimeMax = ts_end;
+        }
+#endif
+
+        OSTimeDly(dly,
+                  OS_OPT_TIME_DLY,
+                  &err);
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                              INITIALIZE THE STATISTICS
+*
+* Description: This function is called by OSInit() to initialize the statistic task.
+*
+* Argument(s): p_err     is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_STK_INVALID       If you specified a NULL stack pointer during configuration
+*                            OS_ERR_STK_SIZE_INVALID  If you didn't specify a large enough stack.
+*                            OS_ERR_PRIO_INVALID      If you specified a priority for the statistic task equal to or
+*                                                     lower (i.e. higher number) than the idle task.
+*                            OS_ERR_xxx               An error code returned by OSTaskCreate()
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_StatTaskInit (OS_ERR  *p_err)
+{
+    OSStatTaskCtr    = 0u;
+    OSStatTaskCtrRun = 0u;
+    OSStatTaskCtrMax = 0u;
+    OSStatTaskRdy    = OS_STATE_NOT_RDY;                        /* Statistic task is not ready                          */
+    OSStatResetFlag  = DEF_FALSE;
+
+                                                                /* --------------- CREATE THE STAT TASK --------------- */
+    if (OSCfg_StatTaskStkBasePtr == DEF_NULL) {
+       *p_err = OS_ERR_STAT_STK_INVALID;
+        return;
+    }
+
+    if (OSCfg_StatTaskStkSize < OSCfg_StkSizeMin) {
+       *p_err = OS_ERR_STAT_STK_SIZE_INVALID;
+        return;
+    }
+
+    if (OSCfg_StatTaskPrio >= (OS_CFG_PRIO_MAX - 1u)) {
+       *p_err = OS_ERR_STAT_PRIO_INVALID;
+        return;
+    }
+
+    OSTaskCreate(&OSStatTaskTCB,
+                 (CPU_CHAR   *)((void *)"uC/OS-III Stat Task"),
+                 OS_StatTask,
+                 DEF_NULL,
+                 OSCfg_StatTaskPrio,
+                 OSCfg_StatTaskStkBasePtr,
+                 OSCfg_StatTaskStkLimit,
+                 OSCfg_StatTaskStkSize,
+                 0u,
+                 0u,
+                 DEF_NULL,
+                 (OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR),
+                 p_err);
+}
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_task.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_task.c
new file mode 100644
index 0000000..92db767
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_task.c
@@ -0,0 +1,3189 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                   TASK MANAGEMENT
+*
+* File    : OS_TASK.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_task__c = "$Id: $";
+#endif
+
+/*
+************************************************************************************************************************
+*                                                CHANGE PRIORITY OF A TASK
+*
+* Description: This function allows you to change the priority of a task dynamically.  Note that the new
+*              priority MUST be available.
+*
+* Arguments  : p_tcb      is the TCB of the tack to change the priority for
+*
+*              prio_new   is the new priority
+*
+*              p_err      is a pointer to an error code returned by this function:
+*
+*                             OS_ERR_NONE                    Is the call was successful
+*                             OS_ERR_OS_NOT_RUNNING          If uC/OS-III is not running yet
+*                             OS_ERR_PRIO_INVALID            If the priority you specify is higher that the maximum allowed
+*                                                              (i.e. >= (OS_CFG_PRIO_MAX-1)) or already in use by a kernel
+*                                                              task
+*                             OS_ERR_STATE_INVALID           If the task is in an invalid state
+*                             OS_ERR_TASK_CHANGE_PRIO_ISR    If you tried to change the task's priority from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_CHANGE_PRIO_EN == DEF_ENABLED)
+void  OSTaskChangePrio (OS_TCB   *p_tcb,
+                        OS_PRIO   prio_new,
+                        OS_ERR   *p_err)
+{
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    OS_PRIO  prio_high;
+#endif
+    CPU_SR_ALLOC();
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if ((p_tcb != DEF_NULL) && (p_tcb->TaskState == OS_TASK_STATE_DEL)) {
+       *p_err = OS_ERR_STATE_INVALID;
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+       *p_err = OS_ERR_TASK_CHANGE_PRIO_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    if (prio_new == 0u) {                                        /* Cannot set to IntQueue Task priority                 */
+       *p_err = OS_ERR_PRIO_INVALID;
+        return;
+    }
+#endif
+
+    if (prio_new >= (OS_CFG_PRIO_MAX - 1u)) {                   /* Cannot set to Idle Task priority                     */
+       *p_err = OS_ERR_PRIO_INVALID;
+        return;
+    }
+
+    OS_CRITICAL_ENTER();
+
+    if (p_tcb == DEF_NULL) {                                    /* Are we changing the priority of 'self'?              */
+        if (OSRunning != OS_STATE_OS_RUNNING) {
+            OS_CRITICAL_EXIT();
+           *p_err = OS_ERR_OS_NOT_RUNNING;
+            return;
+        }
+        p_tcb = OSTCBCurPtr;
+    }
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    p_tcb->BasePrio = prio_new;                                 /* Update base priority                                 */
+
+    if (p_tcb->MutexGrpHeadPtr != DEF_NULL) {                   /* Owning a mutex?                                      */
+        if (prio_new > p_tcb->Prio) {
+            prio_high = OS_MutexGrpPrioFindHighest(p_tcb);
+            if (prio_new > prio_high) {
+                prio_new = prio_high;
+            }
+        }
+    }
+#endif
+
+    OS_TaskChangePrio(p_tcb, prio_new);
+
+    OS_CRITICAL_EXIT_NO_SCHED();
+
+    if (OSRunning == OS_STATE_OS_RUNNING) {
+        OSSched();                                              /* Run highest priority task ready                      */
+    }
+
+   *p_err = OS_ERR_NONE;
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                    CREATE A TASK
+*
+* Description: This function is used to have uC/OS-III manage the execution of a task.  Tasks can either be created
+*              prior to the start of multitasking or by a running task.  A task cannot be created by an ISR.
+*
+* Arguments  : p_tcb          is a pointer to the task's TCB
+*
+*              p_name         is a pointer to an ASCII string to provide a name to the task.
+*
+*              p_task         is a pointer to the task's code
+*
+*              p_arg          is a pointer to an optional data area which can be used to pass parameters to
+*                             the task when the task first executes.  Where the task is concerned it thinks
+*                             it was invoked and passed the argument 'p_arg' as follows:
+*
+*                                 void Task (void *p_arg)
+*                                 {
+*                                     for (;;) {
+*                                         Task code;
+*                                     }
+*                                 }
+*
+*              prio           is the task's priority.  A unique priority MUST be assigned to each task and the
+*                             lower the number, the higher the priority.
+*
+*              p_stk_base     is a pointer to the base address of the stack (i.e. low address).
+*
+*              stk_limit      is the number of stack elements to set as 'watermark' limit for the stack.  This value
+*                             represents the number of CPU_STK entries left before the stack is full.  For example,
+*                             specifying 10% of the 'stk_size' value indicates that the stack limit will be reached
+*                             when the stack reaches 90% full.
+*
+*              stk_size       is the size of the stack in number of elements.  If CPU_STK is set to CPU_INT08U,
+*                             'stk_size' corresponds to the number of bytes available.  If CPU_STK is set to
+*                             CPU_INT16U, 'stk_size' contains the number of 16-bit entries available.  Finally, if
+*                             CPU_STK is set to CPU_INT32U, 'stk_size' contains the number of 32-bit entries
+*                             available on the stack.
+*
+*              q_size         is the maximum number of messages that can be sent to the task
+*
+*              time_quanta    amount of time (in ticks) for time slice when round-robin between tasks.  Specify 0 to use
+*                             the default.
+*
+*              p_ext          is a pointer to a user supplied memory location which is used as a TCB extension.
+*                             For example, this user memory can hold the contents of floating-point registers
+*                             during a context switch, the time each task takes to execute, the number of times
+*                             the task has been switched-in, etc.
+*
+*              opt            contains additional information (or options) about the behavior of the task.
+*                             See OS_OPT_TASK_xxx in OS.H.  Current choices are:
+*
+*                                 OS_OPT_TASK_NONE            No option selected
+*                                 OS_OPT_TASK_STK_CHK         Stack checking to be allowed for the task
+*                                 OS_OPT_TASK_STK_CLR         Clear the stack when the task is created
+*                                 OS_OPT_TASK_SAVE_FP         If the CPU has floating-point registers, save them
+*                                                             during a context switch.
+*                                 OS_OPT_TASK_NO_TLS          If the caller doesn't want or need TLS (Thread Local
+*                                                             Storage) support for the task.  If you do not include this
+*                                                             option, TLS will be supported by default.
+*
+*              p_err          is a pointer to an error code that will be set during this call.  The value pointer
+*                             to by 'p_err' can be:
+*
+*                                 OS_ERR_NONE                    If the function was successful
+*                                 OS_ERR_ILLEGAL_CREATE_RUN_TIME If you are trying to create the task after you called
+*                                                                   OSStart()
+*                                 OS_ERR_PRIO_INVALID            If the priority you specify is higher that the maximum
+*                                                                   allowed (i.e. >= OS_CFG_PRIO_MAX-1) or,
+*                                                                If OS_CFG_ISR_POST_DEFERRED_EN is set to 1 and you tried
+*                                                                   to use priority 0 which is reserved
+*                                 OS_ERR_STAT_STK_SIZE_INVALID   If the stack was overflowed during stack init
+*                                 OS_ERR_STK_INVALID             If you specified a NULL pointer for 'p_stk_base'
+*                                 OS_ERR_STK_SIZE_INVALID        If you specified zero for the 'stk_size'
+*                                 OS_ERR_STK_LIMIT_INVALID       If you specified a 'stk_limit' greater than or equal
+*                                                                   to 'stk_size'
+*                                 OS_ERR_TASK_CREATE_ISR         If you tried to create a task from an ISR
+*                                 OS_ERR_TASK_INVALID            If you specified a NULL pointer for 'p_task'
+*                                 OS_ERR_TCB_INVALID             If you specified a NULL pointer for 'p_tcb'
+*
+* Returns    : none
+*
+* Note(s)    : 1) OSTaskCreate() will return with the error OS_ERR_STAT_STK_SIZE_INVALID when a stack overflow is detected
+*                 during stack initialization. In that specific case some memory may have been corrupted. It is
+*                 therefore recommended to treat OS_ERR_STAT_STK_SIZE_INVALID as a fatal error.
+************************************************************************************************************************
+*/
+
+void  OSTaskCreate (OS_TCB        *p_tcb,
+                    CPU_CHAR      *p_name,
+                    OS_TASK_PTR    p_task,
+                    void          *p_arg,
+                    OS_PRIO        prio,
+                    CPU_STK       *p_stk_base,
+                    CPU_STK_SIZE   stk_limit,
+                    CPU_STK_SIZE   stk_size,
+                    OS_MSG_QTY     q_size,
+                    OS_TICK        time_quanta,
+                    void          *p_ext,
+                    OS_OPT         opt,
+                    OS_ERR        *p_err)
+{
+    CPU_STK_SIZE   i;
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+    OS_REG_ID      reg_nbr;
+#endif
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+    OS_TLS_ID      id;
+#endif
+
+    CPU_STK       *p_sp;
+    CPU_STK       *p_stk_limit;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_CREATE_RUN_TIME;
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* --------- CANNOT CREATE A TASK FROM AN ISR --------- */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_CREATE_FAILED(p_tcb);                     /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_TASK_CREATE_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)                          /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_tcb == DEF_NULL) {                                    /* User must supply a valid OS_TCB                      */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_CREATE_FAILED(p_tcb);                     /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_TCB_INVALID;
+        return;
+    }
+    if (p_task == 0u) {                                         /* User must supply a valid task                        */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_CREATE_FAILED(p_tcb);                     /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_TASK_INVALID;
+        return;
+    }
+    if (p_stk_base == DEF_NULL) {                               /* User must supply a valid stack base address          */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_CREATE_FAILED(p_tcb);                     /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_STK_INVALID;
+        return;
+    }
+    if (stk_size < OSCfg_StkSizeMin) {                          /* User must supply a valid minimum stack size          */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_CREATE_FAILED(p_tcb);                     /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_STK_SIZE_INVALID;
+        return;
+    }
+    if (stk_limit >= stk_size) {                                /* User must supply a valid stack limit                 */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_CREATE_FAILED(p_tcb);                     /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_STK_LIMIT_INVALID;
+        return;
+    }
+    if (prio >= OS_CFG_PRIO_MAX) {                              /* Priority must be within 0 and OS_CFG_PRIO_MAX-1      */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_CREATE_FAILED(p_tcb);                     /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_PRIO_INVALID;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    if (prio == 0u) {
+        if (p_tcb != &OSIntQTaskTCB) {
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+            TRACE_OS_TASK_CREATE_FAILED(p_tcb);                 /* Record the event.                                    */
+#endif
+           *p_err = OS_ERR_PRIO_INVALID;                        /* Not allowed to use priority 0                        */
+            return;
+        }
+    }
+#endif
+
+    if (prio == (OS_CFG_PRIO_MAX - 1u)) {
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+        if (p_tcb != &OSIdleTaskTCB) {
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+            TRACE_OS_TASK_CREATE_FAILED(p_tcb);                 /* Record the event.                                    */
+#endif
+           *p_err = OS_ERR_PRIO_INVALID;                        /* Not allowed to use same priority as idle task        */
+            return;
+        }
+#else
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_CREATE_FAILED(p_tcb);                     /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_PRIO_INVALID;                            /* Not allowed to use same priority as idle task        */
+        return;
+#endif
+    }
+
+    OS_TaskInitTCB(p_tcb);                                      /* Initialize the TCB to default values                 */
+
+   *p_err = OS_ERR_NONE;
+                                                                /* -------------- CLEAR THE TASK'S STACK -------------- */
+    if (((opt & OS_OPT_TASK_STK_CHK) != 0u) ||                  /* See if stack checking has been enabled               */
+        ((opt & OS_OPT_TASK_STK_CLR) != 0u)) {                  /* See if stack needs to be cleared                     */
+        if ((opt & OS_OPT_TASK_STK_CLR) != 0u) {
+            p_sp = p_stk_base;
+            for (i = 0u; i < stk_size; i++) {                   /* Stack grows from HIGH to LOW memory                  */
+               *p_sp = 0u;                                      /* Clear from bottom of stack and up!                   */
+                p_sp++;
+            }
+        }
+    }
+                                                                /* ------ INITIALIZE THE STACK FRAME OF THE TASK ------ */
+#if (CPU_CFG_STK_GROWTH == CPU_STK_GROWTH_HI_TO_LO)
+    p_stk_limit = p_stk_base + stk_limit;
+#else
+    p_stk_limit = p_stk_base + (stk_size - 1u) - stk_limit;
+#endif
+
+    p_sp = OSTaskStkInit(p_task,
+                         p_arg,
+                         p_stk_base,
+                         p_stk_limit,
+                         stk_size,
+                         opt);
+
+#if (CPU_CFG_STK_GROWTH == CPU_STK_GROWTH_HI_TO_LO)             /* Check if we overflown the stack during init          */
+    if (p_sp < p_stk_base) {
+       *p_err = OS_ERR_STAT_STK_SIZE_INVALID;
+        return;
+    }
+#else
+    if (p_sp > p_stk_base + stk_size) {
+       *p_err = OS_ERR_STAT_STK_SIZE_INVALID;
+        return;
+    }
+#endif
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)                 /* Initialize Redzoned stack                            */
+    OS_TaskStkRedzoneInit(p_stk_base, stk_size);
+#endif
+
+                                                                /* ------------ INITIALIZE THE TCB FIELDS ------------- */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_tcb->TaskEntryAddr = p_task;                              /* Save task entry point address                        */
+    p_tcb->TaskEntryArg  = p_arg;                               /* Save task entry argument                             */
+#endif
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_tcb->NamePtr       = p_name;                              /* Save task name                                       */
+#else
+    (void)&p_name;
+#endif
+
+    p_tcb->Prio          = prio;                                /* Save the task's priority                             */
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    p_tcb->BasePrio      = prio;                                /* Set the base priority                                */
+#endif
+
+    p_tcb->StkPtr        = p_sp;                                /* Save the new top-of-stack pointer                    */
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED))
+    p_tcb->StkLimitPtr   = p_stk_limit;                         /* Save the stack limit pointer                         */
+#endif
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+    p_tcb->TimeQuanta    = time_quanta;                         /* Save the #ticks for time slice (0 means not sliced)  */
+    if (time_quanta == 0u) {
+        p_tcb->TimeQuantaCtr = OSSchedRoundRobinDfltTimeQuanta;
+    } else {
+        p_tcb->TimeQuantaCtr = time_quanta;
+    }
+#else
+    (void)&time_quanta;
+#endif
+
+    p_tcb->ExtPtr        = p_ext;                               /* Save pointer to TCB extension                        */
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED) || (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED))
+    p_tcb->StkBasePtr    = p_stk_base;                          /* Save pointer to the base address of the stack        */
+    p_tcb->StkSize       = stk_size;                            /* Save the stack size (in number of CPU_STK elements)  */
+#endif
+    p_tcb->Opt           = opt;                                 /* Save task options                                    */
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+    for (reg_nbr = 0u; reg_nbr < OS_CFG_TASK_REG_TBL_SIZE; reg_nbr++) {
+        p_tcb->RegTbl[reg_nbr] = 0u;
+    }
+#endif
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+    OS_MsgQInit(&p_tcb->MsgQ,                                   /* Initialize the task's message queue                  */
+                q_size);
+#else
+    (void)&q_size;
+#endif
+
+    OSTaskCreateHook(p_tcb);                                    /* Call user defined hook                               */
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_TASK_CREATE(p_tcb);                                /* Record the event.                                    */
+    TRACE_OS_TASK_SEM_CREATE(p_tcb, p_name);                    /* Record the event.                                    */
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+    TRACE_OS_TASK_MSG_Q_CREATE(&p_tcb->MsgQ, p_name);           /* Record the event.                                    */
+#endif
+#endif
+
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+    for (id = 0u; id < OS_CFG_TLS_TBL_SIZE; id++) {
+        p_tcb->TLS_Tbl[id] = 0u;
+    }
+    OS_TLS_TaskCreate(p_tcb);                                   /* Call TLS hook                                        */
+#endif
+                                                                /* -------------- ADD TASK TO READY LIST -------------- */
+    OS_CRITICAL_ENTER();
+    OS_PrioInsert(p_tcb->Prio);
+    OS_RdyListInsertTail(p_tcb);
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_TaskDbgListAdd(p_tcb);
+#endif
+
+    OSTaskQty++;                                                /* Increment the #tasks counter                         */
+
+    if (OSRunning != OS_STATE_OS_RUNNING) {                     /* Return if multitasking has not started               */
+        OS_CRITICAL_EXIT();
+        return;
+    }
+
+    OS_CRITICAL_EXIT_NO_SCHED();
+
+    OSSched();
+}
+
+
+/*
+************************************************************************************************************************
+*                                                     DELETE A TASK
+*
+* Description: This function allows you to delete a task.  The calling task can delete itself by specifying a NULL
+*              pointer for 'p_tcb'.  The deleted task is returned to the dormant state and can be re-activated by
+*              creating the deleted task again.
+*
+* Arguments  : p_tcb      is the TCB of the tack to delete
+*
+*              p_err      is a pointer to an error code returned by this function:
+*
+*                             OS_ERR_NONE                    If the call is successful
+*                             OS_ERR_ILLEGAL_DEL_RUN_TIME    If you are trying to delete the task after you called
+*                                                              OSStart()
+*                             OS_ERR_OS_NOT_RUNNING          If uC/OS-III is not running yet
+*                             OS_ERR_STATE_INVALID           If the state of the task is invalid
+*                             OS_ERR_TASK_DEL_IDLE           If you attempted to delete uC/OS-III's idle task
+*                             OS_ERR_TASK_DEL_INVALID        If you attempted to delete uC/OS-III's ISR handler task
+*                             OS_ERR_TASK_DEL_ISR            If you tried to delete a task from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : 1) 'p_err' gets set to OS_ERR_NONE before OSSched() to allow the returned err or code to be monitored even
+*                 for a task that is deleting itself. In this case, 'p_err' MUST point to a global variable that can be
+*                 accessed by another task.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_DEL_EN == DEF_ENABLED)
+void  OSTaskDel (OS_TCB  *p_tcb,
+                 OS_ERR  *p_err)
+{
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    OS_TCB  *p_tcb_owner;
+    OS_PRIO  prio_new;
+#endif
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_DEL_RUN_TIME;
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if trying to delete from ISR                     */
+       *p_err = OS_ERR_TASK_DEL_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+    if (p_tcb == &OSIdleTaskTCB) {                              /* Not allowed to delete the idle task                  */
+       *p_err = OS_ERR_TASK_DEL_IDLE;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    if (p_tcb == &OSIntQTaskTCB) {                              /* Cannot delete the ISR handler task                   */
+       *p_err = OS_ERR_TASK_DEL_INVALID;
+        return;
+    }
+#endif
+
+    if (p_tcb == DEF_NULL) {                                    /* Delete 'Self'?                                       */
+        CPU_CRITICAL_ENTER();
+        p_tcb  = OSTCBCurPtr;                                   /* Yes.                                                 */
+        CPU_CRITICAL_EXIT();
+    }
+
+    OS_CRITICAL_ENTER();
+    switch (p_tcb->TaskState) {
+        case OS_TASK_STATE_RDY:
+             OS_RdyListRemove(p_tcb);
+             break;
+
+        case OS_TASK_STATE_SUSPENDED:
+             break;
+
+        case OS_TASK_STATE_DLY:                                 /* Task is only delayed, not on any wait list           */
+        case OS_TASK_STATE_DLY_SUSPENDED:
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             OS_TickListRemove(p_tcb);
+#endif
+             break;
+
+        case OS_TASK_STATE_PEND:
+        case OS_TASK_STATE_PEND_SUSPENDED:
+        case OS_TASK_STATE_PEND_TIMEOUT:
+        case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+             switch (p_tcb->PendOn) {                           /* See what we are pending on                           */
+                 case OS_TASK_PEND_ON_NOTHING:
+                 case OS_TASK_PEND_ON_TASK_Q:                   /* There is no wait list for these two                  */
+                 case OS_TASK_PEND_ON_TASK_SEM:
+                      break;
+
+                 case OS_TASK_PEND_ON_FLAG:                     /* Remove from wait list                                */
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+                 case OS_TASK_PEND_ON_MULTI:
+#endif
+                 case OS_TASK_PEND_ON_Q:
+                 case OS_TASK_PEND_ON_SEM:
+                      OS_PendListRemove(p_tcb);
+                      break;
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+                 case OS_TASK_PEND_ON_MUTEX:
+                      p_tcb_owner = ((OS_MUTEX *)p_tcb->PendDataTblPtr->PendObjPtr)->OwnerTCBPtr;
+                      prio_new = p_tcb_owner->Prio;
+                      OS_PendListRemove(p_tcb);
+                      if ((p_tcb_owner->Prio != p_tcb_owner->BasePrio) &&
+                          (p_tcb_owner->Prio == p_tcb->Prio)) { /* Has the owner inherited a priority?                  */
+                          prio_new = OS_MutexGrpPrioFindHighest(p_tcb_owner);
+                          prio_new = prio_new > p_tcb_owner->BasePrio ? p_tcb_owner->BasePrio : prio_new;
+                      }
+                      p_tcb->PendOn = OS_TASK_PEND_ON_NOTHING;
+
+                      if (prio_new != p_tcb_owner->Prio) {
+                          OS_TaskChangePrio(p_tcb_owner, prio_new);
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                          TRACE_OS_MUTEX_TASK_PRIO_DISINHERIT(p_tcb_owner, p_tcb_owner->Prio);
+#endif
+                      }
+                      break;
+#endif
+
+                 default:
+                      break;
+             }
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             if ((p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT) ||
+                 (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED)) {
+                 OS_TickListRemove(p_tcb);
+             }
+#endif
+             break;
+
+        default:
+            OS_CRITICAL_EXIT();
+           *p_err = OS_ERR_STATE_INVALID;
+            return;
+    }
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    if(p_tcb->MutexGrpHeadPtr != DEF_NULL) {
+        OS_MutexGrpPostAll(p_tcb);
+    }
+#endif
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+    (void)OS_MsgQFreeAll(&p_tcb->MsgQ);                         /* Free task's message queue messages                   */
+#endif
+
+    OSTaskDelHook(p_tcb);                                       /* Call user defined hook                               */
+
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+    OS_TLS_TaskDel(p_tcb);                                      /* Call TLS hook                                        */
+#endif
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_TaskDbgListRemove(p_tcb);
+#endif
+
+    OSTaskQty--;                                                /* One less task being managed                          */
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_TASK_DEL(p_tcb);                                   /* Record the event.                                    */
+#endif
+#if (OS_CFG_TASK_STK_REDZONE_EN != DEF_ENABLED)                 /* Don't clear the TCB before checking the red-zone     */
+    OS_TaskInitTCB(p_tcb);                                      /* Initialize the TCB to default values                 */
+#endif
+    p_tcb->TaskState = (OS_STATE)OS_TASK_STATE_DEL;             /* Indicate that the task was deleted                   */
+
+    OS_CRITICAL_EXIT_NO_SCHED();
+
+   *p_err = OS_ERR_NONE;                                        /* See Note #1.                                         */
+
+    OSSched();                                                  /* Find new highest priority task                       */
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                    FLUSH TASK's QUEUE
+*
+* Description: This function is used to flush the task's internal message queue.
+*
+* Arguments  : p_tcb       is a pointer to the task's OS_TCB.  Specifying a NULL pointer indicates that you wish to
+*                          flush the message queue of the calling task.
+*
+*              p_err       is a pointer to a variable that will contain an error code returned by this function.
+*
+*                              OS_ERR_NONE              Upon success
+*                              OS_ERR_FLUSH_ISR         If you called this function from an ISR
+*                              OS_ERR_OS_NOT_RUNNING    If uC/OS-III is not running yet
+*
+* Returns     : The number of entries freed from the queue
+*
+* Note(s)     : 1) You should use this function with great care because, when to flush the queue, you LOOSE the
+*                  references to what the queue entries are pointing to and thus, you could cause 'memory leaks'.  In
+*                  other words, the data you are pointing to that's being referenced by the queue entries should, most
+*                  likely, need to be de-allocated (i.e. freed).
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+OS_MSG_QTY  OSTaskQFlush (OS_TCB  *p_tcb,
+                          OS_ERR  *p_err)
+{
+    OS_MSG_QTY  entries;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Can't flush a message queue from an ISR              */
+       *p_err = OS_ERR_FLUSH_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+    if (p_tcb == DEF_NULL) {                                    /* Flush message queue of calling task?                 */
+        CPU_CRITICAL_ENTER();
+        p_tcb = OSTCBCurPtr;
+        CPU_CRITICAL_EXIT();
+    }
+
+    OS_CRITICAL_ENTER();
+    entries = OS_MsgQFreeAll(&p_tcb->MsgQ);                     /* Return all OS_MSGs to the OS_MSG pool                */
+    OS_CRITICAL_EXIT();
+   *p_err   = OS_ERR_NONE;
+    return (entries);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                  WAIT FOR A MESSAGE
+*
+* Description: This function causes the current task to wait for a message to be posted to it.
+*
+* Arguments  : timeout       is an optional timeout period (in clock ticks).  If non-zero, your task will wait for a
+*                            message to arrive up to the amount of time specified by this argument.
+*                            If you specify 0, however, your task will wait forever or, until a message arrives.
+*
+*              opt           determines whether the user wants to block if the task's queue is empty or not:
+*
+*                                OS_OPT_PEND_BLOCKING
+*                                OS_OPT_PEND_NON_BLOCKING
+*
+*              p_msg_size    is a pointer to a variable that will receive the size of the message
+*
+*              p_ts          is a pointer to a variable that will receive the timestamp of when the message was
+*                            received.  If you pass a NULL pointer (i.e. (CPU_TS *)0) then you will not get the
+*                            timestamp.  In other words, passing a NULL pointer is valid and indicates that you don't
+*                            need the timestamp.
+*
+*              p_err         is a pointer to where an error message will be deposited.  Possible error
+*                            messages are:
+*
+*                                OS_ERR_NONE               The call was successful and your task received a message.
+*                                OS_ERR_OPT_INVALID        If you specified an invalid option
+*                                OS_ERR_OS_NOT_RUNNING     If uC/OS-III is not running yet
+*                                OS_ERR_PEND_ABORT         If the pend was aborted
+*                                OS_ERR_PEND_ISR           If you called this function from an ISR and the result
+*                                OS_ERR_PEND_WOULD_BLOCK   If you specified non-blocking but the queue was not empty
+*                                OS_ERR_PTR_INVALID        If 'p_msg_size' is NULL
+*                                OS_ERR_SCHED_LOCKED       If the scheduler is locked
+*                                OS_ERR_TIMEOUT            A message was not received within the specified timeout
+*                                                          would lead to a suspension
+*
+* Returns    : A pointer to the message received or a NULL pointer upon error.
+*
+* Note(s)    : 1) It is possible to receive NULL pointers when there are no errors.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+void  *OSTaskQPend (OS_TICK       timeout,
+                    OS_OPT        opt,
+                    OS_MSG_SIZE  *p_msg_size,
+                    CPU_TS       *p_ts,
+                    OS_ERR       *p_err)
+{
+    OS_MSG_Q     *p_msg_q;
+    void         *p_void;
+    CPU_SR_ALLOC();
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (DEF_NULL);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Can't Pend from an ISR                               */
+       *p_err = OS_ERR_PEND_ISR;
+        return (DEF_NULL);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (DEF_NULL);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)                          /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_msg_size == DEF_NULL) {                               /* User must supply a valid destination for msg size    */
+       *p_err = OS_ERR_PTR_INVALID;
+        return (DEF_NULL);
+    }
+    switch (opt) {                                              /* User must supply a valid option                      */
+        case OS_OPT_PEND_BLOCKING:
+        case OS_OPT_PEND_NON_BLOCKING:
+             break;
+
+        default:
+            *p_err = OS_ERR_OPT_INVALID;
+             return (DEF_NULL);
+    }
+#endif
+
+    if (p_ts != DEF_NULL) {
+       *p_ts = 0u;                                              /* Initialize the returned timestamp                    */
+    }
+
+    CPU_CRITICAL_ENTER();
+    p_msg_q = &OSTCBCurPtr->MsgQ;                               /* Any message waiting in the message queue?            */
+    p_void  = OS_MsgQGet(p_msg_q,
+                         p_msg_size,
+                         p_ts,
+                         p_err);
+    if (*p_err == OS_ERR_NONE) {
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        if (p_ts != DEF_NULL) {
+            OSTCBCurPtr->MsgQPendTime = OS_TS_GET() - *p_ts;
+            if (OSTCBCurPtr->MsgQPendTimeMax < OSTCBCurPtr->MsgQPendTime) {
+                OSTCBCurPtr->MsgQPendTimeMax = OSTCBCurPtr->MsgQPendTime;
+            }
+        }
+#endif
+#endif
+        CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_MSG_Q_PEND(p_msg_q);                      /* Record the event.                                    */
+#endif
+        return (p_void);                                        /* Yes, Return oldest message received                  */
+    }
+
+    if ((opt & OS_OPT_PEND_NON_BLOCKING) != 0u) {               /* Caller wants to block if not available?              */
+       *p_err = OS_ERR_PEND_WOULD_BLOCK;                        /* No                                                   */
+        CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_MSG_Q_PEND_FAILED(p_msg_q);               /* Record the event.                                    */
+#endif
+        return (DEF_NULL);
+    } else {                                                    /* Yes                                                  */
+        if (OSSchedLockNestingCtr > 0u) {                       /* Can't block when the scheduler is locked             */
+            CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+            TRACE_OS_TASK_MSG_Q_PEND_FAILED(p_msg_q);           /* Record the event.                                    */
+#endif
+           *p_err = OS_ERR_SCHED_LOCKED;
+            return (DEF_NULL);
+        }
+    }
+                                                                /* Lock the scheduler/re-enable interrupts              */
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    OS_Pend(DEF_NULL,                                           /* Block task pending on Message                        */
+            DEF_NULL,
+            OS_TASK_PEND_ON_TASK_Q,
+            timeout);
+    OS_CRITICAL_EXIT_NO_SCHED();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_TASK_MSG_Q_PEND_BLOCK(p_msg_q);                    /* Record the event.                                    */
+#endif
+    OSSched();                                                  /* Find the next highest priority task ready to run     */
+
+    CPU_CRITICAL_ENTER();
+    switch (OSTCBCurPtr->PendStatus) {
+        case OS_STATUS_PEND_OK:                                 /* Extract message from TCB (Put there by Post)         */
+             p_void      = OSTCBCurPtr->MsgPtr;
+            *p_msg_size  = OSTCBCurPtr->MsgSize;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+                OSTCBCurPtr->MsgQPendTime = OS_TS_GET() - OSTCBCurPtr->TS;
+                if (OSTCBCurPtr->MsgQPendTimeMax < OSTCBCurPtr->MsgQPendTime) {
+                    OSTCBCurPtr->MsgQPendTimeMax = OSTCBCurPtr->MsgQPendTime;
+                }
+#endif
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_TASK_MSG_Q_PEND(p_msg_q);                 /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_NONE;
+             break;
+
+        case OS_STATUS_PEND_ABORT:                              /* Indicate that we aborted                             */
+             p_void     = DEF_NULL;
+            *p_msg_size = 0u;
+             if (p_ts != DEF_NULL) {
+                *p_ts = 0u;
+             }
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_TASK_MSG_Q_PEND_FAILED(p_msg_q);          /* Record the event.                                    */
+#endif
+            *p_err      =  OS_ERR_PEND_ABORT;
+             break;
+
+        case OS_STATUS_PEND_TIMEOUT:                            /* Indicate that we didn't get event within TO          */
+        default:
+             p_void     = DEF_NULL;
+            *p_msg_size = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts  != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_TASK_MSG_Q_PEND_FAILED(p_msg_q);          /* Record the event.                                    */
+#endif
+            *p_err      =  OS_ERR_TIMEOUT;
+             break;
+    }
+    CPU_CRITICAL_EXIT();
+    return (p_void);                                            /* Return received message                              */
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                              ABORT WAITING FOR A MESSAGE
+*
+* Description: This function aborts & readies the task specified.  This function should be used to fault-abort the wait
+*              for a message, rather than to normally post the message to the task via OSTaskQPost().
+*
+* Arguments  : p_tcb     is a pointer to the task to pend abort
+*
+*              opt       provides options for this function:
+*
+*                            OS_OPT_POST_NONE         No option specified
+*                            OS_OPT_POST_NO_SCHED     Indicates that the scheduler will not be called.
+*
+*              p_err     is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_NONE               If the task was readied and informed of the aborted wait
+*                            OS_ERR_OPT_INVALID        If you specified an invalid option
+*                            OS_ERR_OS_NOT_RUNNING     If uC/OS-III is not running yet
+*                            OS_ERR_PEND_ABORT_ISR     If you called this function from an ISR
+*                            OS_ERR_PEND_ABORT_NONE    If task was not pending on a message and thus there is nothing to
+*                                                      abort
+*                            OS_ERR_PEND_ABORT_SELF    If you passed a NULL pointer for 'p_tcb'
+*
+* Returns    : == DEF_FALSE   if task was not waiting for a message, or upon error.
+*              == DEF_TRUE    if task was waiting for a message and was readied and informed.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED) && (OS_CFG_TASK_Q_PEND_ABORT_EN == DEF_ENABLED)
+CPU_BOOLEAN  OSTaskQPendAbort (OS_TCB  *p_tcb,
+                               OS_OPT   opt,
+                               OS_ERR  *p_err)
+{
+    CPU_TS         ts;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from ISR ...                           */
+       *p_err = OS_ERR_PEND_ABORT_ISR;                          /* ... can't Pend Abort from an ISR                     */
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)                          /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    switch (opt) {                                              /* User must supply a valid option                      */
+        case OS_OPT_POST_NONE:
+        case OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+            *p_err = OS_ERR_OPT_INVALID;
+             return (DEF_FALSE);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if ((p_tcb == DEF_NULL) ||                                  /* Pend abort self?                                     */
+        (p_tcb == OSTCBCurPtr)) {
+        CPU_CRITICAL_EXIT();
+       *p_err = OS_ERR_PEND_ABORT_SELF;                         /* ... doesn't make sense                               */
+        return (DEF_FALSE);
+    }
+#endif
+
+    if (p_tcb->PendOn != OS_TASK_PEND_ON_TASK_Q) {              /* Is task waiting for a message?                       */
+        CPU_CRITICAL_EXIT();                                    /* No                                                   */
+       *p_err = OS_ERR_PEND_ABORT_NONE;
+        return (DEF_FALSE);
+    }
+
+    OS_CRITICAL_ENTER_CPU_EXIT();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts = OS_TS_GET();                                           /* Get timestamp of when the abort occurred             */
+#else
+    ts = 0u;
+#endif
+    OS_PendAbort(DEF_NULL,                                      /* Abort the pend                                       */
+                 p_tcb,
+                 ts);
+    OS_CRITICAL_EXIT_NO_SCHED();
+    if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+        OSSched();                                              /* Run the scheduler                                    */
+    }
+   *p_err = OS_ERR_NONE;
+    return (DEF_TRUE);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                               POST MESSAGE TO A TASK
+*
+* Description: This function sends a message to a task.
+*
+* Arguments  : p_tcb      is a pointer to the TCB of the task receiving a message.  If you specify a NULL pointer then
+*                         the message will be posted to the task's queue of the calling task.  In other words, you'd be
+*                         posting a message to yourself.
+*
+*              p_void     is a pointer to the message to send.
+*
+*              msg_size   is the size of the message sent (in bytes)
+*
+*              opt        specifies whether the post will be FIFO or LIFO:
+*
+*                             OS_OPT_POST_FIFO       Post at the end   of the queue
+*                             OS_OPT_POST_LIFO       Post at the front of the queue
+*
+*                             OS_OPT_POST_NO_SCHED   Do not run the scheduler after the post
+*
+*                          Note(s): 1) OS_OPT_POST_NO_SCHED can be added with one of the other options.
+*
+*
+*              p_err      is a pointer to a variable that will hold the error code associated
+*                         with the outcome of this call.  Errors can be:
+*
+*                             OS_ERR_NONE              The call was successful and the message was sent
+*                             OS_ERR_INT_Q_FULL        If the deferred interrupt post queue is full
+*                             OS_ERR_MSG_POOL_EMPTY    If there are no more OS_MSGs available from the pool
+*                             OS_ERR_OPT_INVALID       If you specified an invalid option
+*                             OS_ERR_OS_NOT_RUNNING    If uC/OS-III is not running yet
+*                             OS_ERR_Q_MAX             If the queue is full
+*                             OS_ERR_STATE_INVALID     If the task is in an invalid state.  This should never happen
+*                                                      and if it does, would be considered a system failure
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+void  OSTaskQPost (OS_TCB       *p_tcb,
+                   void         *p_void,
+                   OS_MSG_SIZE   msg_size,
+                   OS_OPT        opt,
+                   OS_ERR       *p_err)
+{
+    CPU_TS   ts;
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)                          /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    switch (opt) {                                              /* User must supply a valid option                      */
+        case OS_OPT_POST_FIFO:
+        case OS_OPT_POST_LIFO:
+        case OS_OPT_POST_FIFO | OS_OPT_POST_NO_SCHED:
+        case OS_OPT_POST_LIFO | OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_TASK_MSG_Q_POST_FAILED(&p_tcb->MsgQ);     /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OPT_INVALID;
+             return;
+    }
+#endif
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts = OS_TS_GET();                                           /* Get timestamp                                        */
+#else
+    ts = 0u;
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {
+        OS_IntQPost(OS_OBJ_TYPE_TASK_MSG,                       /* Post to ISR queue                                    */
+                    p_tcb,
+                    p_void,
+                    msg_size,
+                    0u,
+                    opt,
+                    ts,
+                    p_err);
+        return;
+    }
+#endif
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_TASK_MSG_Q_POST(&p_tcb->MsgQ);                     /* Record the event.                                    */
+#endif
+
+    OS_TaskQPost(p_tcb,
+                 p_void,
+                 msg_size,
+                 opt,
+                 ts,
+                 p_err);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                       GET THE CURRENT VALUE OF A TASK REGISTER
+*
+* Description: This function is called to obtain the current value of a task register.  Task registers are application
+*              specific and can be used to store task specific values such as 'error numbers' (i.e. errno), statistics,
+*              etc.
+*
+* Arguments  : p_tcb     is a pointer to the OS_TCB of the task you want to read the register from.  If 'p_tcb' is a
+*                        NULL pointer then you will get the register of the current task.
+*
+*              id        is the 'id' of the desired task variable.  Note that the 'id' must be less than
+*                        OS_CFG_TASK_REG_TBL_SIZE
+*
+*              p_err     is a pointer to a variable that will hold an error code related to this call.
+*
+*                            OS_ERR_NONE               If the call was successful
+*                            OS_ERR_REG_ID_INVALID     If the 'id' is not between 0 and OS_CFG_TASK_REG_TBL_SIZE-1
+*
+* Returns    : The current value of the task's register or 0 if an error is detected.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+OS_REG  OSTaskRegGet (OS_TCB     *p_tcb,
+                      OS_REG_ID   id,
+                      OS_ERR     *p_err)
+{
+    OS_REG     value;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (id >= OS_CFG_TASK_REG_TBL_SIZE) {
+       *p_err = OS_ERR_REG_ID_INVALID;
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (p_tcb == DEF_NULL) {
+        p_tcb = OSTCBCurPtr;
+    }
+    value = p_tcb->RegTbl[id];
+    CPU_CRITICAL_EXIT();
+   *p_err = OS_ERR_NONE;
+    return (value);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                    ALLOCATE THE NEXT AVAILABLE TASK REGISTER ID
+*
+* Description: This function is called to obtain a task register ID.  This function thus allows task registers IDs to be
+*              allocated dynamically instead of statically.
+*
+* Arguments  : p_err       is a pointer to a variable that will hold an error code related to this call.
+*
+*                            OS_ERR_NONE               If the call was successful
+*                            OS_ERR_NO_MORE_ID_AVAIL   If you are attempting to assign more task register IDs than you
+*                                                          have available through OS_CFG_TASK_REG_TBL_SIZE
+*
+* Returns    : The next available task register 'id' or OS_CFG_TASK_REG_TBL_SIZE if an error is detected.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+OS_REG_ID  OSTaskRegGetID (OS_ERR  *p_err)
+{
+    OS_REG_ID  id;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return ((OS_REG_ID)OS_CFG_TASK_REG_TBL_SIZE);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (OSTaskRegNextAvailID >= OS_CFG_TASK_REG_TBL_SIZE) {     /* See if we exceeded the number of IDs available       */
+       *p_err = OS_ERR_NO_MORE_ID_AVAIL;                        /* Yes, cannot allocate more task register IDs          */
+        CPU_CRITICAL_EXIT();
+        return (OS_CFG_TASK_REG_TBL_SIZE);
+    }
+
+    id    = OSTaskRegNextAvailID;                               /* Assign the next available ID                         */
+    OSTaskRegNextAvailID++;                                     /* Increment available ID for next request              */
+    CPU_CRITICAL_EXIT();
+   *p_err = OS_ERR_NONE;
+    return (id);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                       SET THE CURRENT VALUE OF A TASK REGISTER
+*
+* Description: This function is called to change the current value of a task register.  Task registers are application
+*              specific and can be used to store task specific values such as 'error numbers' (i.e. errno), statistics,
+*              etc.
+*
+* Arguments  : p_tcb     is a pointer to the OS_TCB of the task you want to set the register for.  If 'p_tcb' is a NULL
+*                        pointer then you will change the register of the current task.
+*
+*              id        is the 'id' of the desired task register.  Note that the 'id' must be less than
+*                        OS_CFG_TASK_REG_TBL_SIZE
+*
+*              value     is the desired value for the task register.
+*
+*              p_err     is a pointer to a variable that will hold an error code related to this call.
+*
+*                            OS_ERR_NONE               If the call was successful
+*                            OS_ERR_REG_ID_INVALID     If the 'id' is not between 0 and OS_CFG_TASK_REG_TBL_SIZE-1
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+void  OSTaskRegSet (OS_TCB     *p_tcb,
+                    OS_REG_ID   id,
+                    OS_REG      value,
+                    OS_ERR     *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (id >= OS_CFG_TASK_REG_TBL_SIZE) {
+       *p_err = OS_ERR_REG_ID_INVALID;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (p_tcb == DEF_NULL) {
+        p_tcb = OSTCBCurPtr;
+    }
+    p_tcb->RegTbl[id] = value;
+    CPU_CRITICAL_EXIT();
+   *p_err             = OS_ERR_NONE;
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                               RESUME A SUSPENDED TASK
+*
+* Description: This function is called to resume a previously suspended task.  This is the only call that will remove an
+*              explicit task suspension.
+*
+* Arguments  : p_tcb      Is a pointer to the task's OS_TCB to resume
+*
+*              p_err      Is a pointer to a variable that will contain an error code returned by this function
+*
+*                             OS_ERR_NONE                  If the requested task is resumed
+*                             OS_ERR_INT_Q_FULL            If the deferred interrupt post queue is full
+*                             OS_ERR_OS_NOT_RUNNING        If uC/OS-III is not running yet
+*                             OS_ERR_STATE_INVALID         If the task is in an invalid state
+*                             OS_ERR_TASK_NOT_SUSPENDED    If the task to resume has not been suspended
+*                             OS_ERR_TASK_RESUME_ISR       If you called this function from an ISR
+*                             OS_ERR_TASK_RESUME_SELF      You cannot resume 'self'
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+void  OSTaskResume (OS_TCB  *p_tcb,
+                    OS_ERR  *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN   == DEF_DISABLED) && \
+    (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+       *p_err = OS_ERR_TASK_RESUME_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+
+    CPU_CRITICAL_ENTER();
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if ((p_tcb == DEF_NULL) ||                                  /* We cannot resume 'self'                              */
+        (p_tcb == OSTCBCurPtr)) {
+        CPU_CRITICAL_EXIT();
+       *p_err  = OS_ERR_TASK_RESUME_SELF;
+        return;
+    }
+#endif
+    CPU_CRITICAL_EXIT();
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from an ISR                            */
+        OS_IntQPost(OS_OBJ_TYPE_TASK_RESUME,                    /* Post to ISR queue                                    */
+                    (void *)p_tcb,
+                    DEF_NULL,
+                    0u,
+                    0u,
+                    0u,
+                    0u,
+                    p_err);
+        return;
+    }
+#endif
+
+    OS_TaskResume(p_tcb, p_err);
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_TASK_RESUME(p_tcb);                                /* Record the event.                                    */
+#endif
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                              WAIT FOR A TASK SEMAPHORE
+*
+* Description: This function is called to block the current task until a signal is sent by another task or ISR.
+*
+* Arguments  : timeout       is the amount of time you are will to wait for the signal
+*
+*              opt           determines whether the user wants to block if a semaphore post was not received:
+*
+*                                OS_OPT_PEND_BLOCKING
+*                                OS_OPT_PEND_NON_BLOCKING
+*
+*              p_ts          is a pointer to a variable that will receive the timestamp of when the semaphore was posted
+*                            or pend aborted.  If you pass a NULL pointer (i.e. (CPU_TS *)0) then you will not get the
+*                            timestamp.  In other words, passing a NULL pointer is valid and indicates that you don't
+*                            need the timestamp.
+*
+*              p_err         is a pointer to an error code that will be set by this function
+*
+*                                OS_ERR_NONE                The call was successful and your task received a message
+*                                OS_ERR_OPT_INVALID         You specified an invalid option
+*                                OS_ERR_OS_NOT_RUNNING      If uC/OS-III is not running yet
+*                                OS_ERR_PEND_ABORT          If the pend was aborted
+*                                OS_ERR_PEND_ISR            If you called this function from an ISR
+*                                OS_ERR_PEND_WOULD_BLOCK    If you specified non-blocking but no signal was received
+*                                OS_ERR_SCHED_LOCKED        If the scheduler is locked
+*                                OS_ERR_STATUS_INVALID      If the pend status is invalid
+*                                OS_ERR_TIMEOUT             A message was not received within the specified timeout
+*
+* Returns    : The current count of signals the task received, 0 if none.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+OS_SEM_CTR  OSTaskSemPend (OS_TICK   timeout,
+                           OS_OPT    opt,
+                           CPU_TS   *p_ts,
+                           OS_ERR   *p_err)
+{
+    OS_SEM_CTR    ctr;
+    CPU_SR_ALLOC();
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)&p_ts;                                                /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_SEM_PEND_FAILED(OSTCBCurPtr);             /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_PEND_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_PEND_BLOCKING:
+        case OS_OPT_PEND_NON_BLOCKING:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_TASK_SEM_PEND_FAILED(OSTCBCurPtr);        /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (OSTCBCurPtr->SemCtr > 0u) {                             /* See if task already been signaled                    */
+        OSTCBCurPtr->SemCtr--;
+        ctr = OSTCBCurPtr->SemCtr;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        if (p_ts != DEF_NULL) {
+           *p_ts  = OSTCBCurPtr->TS;
+        }
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        OSTCBCurPtr->SemPendTime = OS_TS_GET() - OSTCBCurPtr->TS;
+        if (OSTCBCurPtr->SemPendTimeMax < OSTCBCurPtr->SemPendTime) {
+            OSTCBCurPtr->SemPendTimeMax = OSTCBCurPtr->SemPendTime;
+        }
+#endif
+#endif
+#endif
+        CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_SEM_PEND(OSTCBCurPtr);                    /* Record the event.                                    */
+#endif
+       *p_err = OS_ERR_NONE;
+        return (ctr);
+    }
+
+    if ((opt & OS_OPT_PEND_NON_BLOCKING) != 0u) {               /* Caller wants to block if not available?              */
+        CPU_CRITICAL_EXIT();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        if (p_ts != DEF_NULL) {
+            *p_ts  = 0u;
+        }
+#endif
+       *p_err = OS_ERR_PEND_WOULD_BLOCK;                        /* No                                                   */
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_SEM_PEND_FAILED(OSTCBCurPtr);             /* Record the event.                                    */
+#endif
+        return (0u);
+    } else {                                                    /* Yes                                                  */
+        if (OSSchedLockNestingCtr > 0u) {                       /* Can't pend when the scheduler is locked              */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+            if (p_ts != DEF_NULL) {
+               *p_ts  = 0u;
+            }
+#endif
+            CPU_CRITICAL_EXIT();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+            TRACE_OS_TASK_SEM_PEND_FAILED(OSTCBCurPtr);         /* Record the event.                                    */
+#endif
+           *p_err = OS_ERR_SCHED_LOCKED;
+            return (0u);
+        }
+    }
+                                                                /* Lock the scheduler/re-enable interrupts              */
+    OS_CRITICAL_ENTER_CPU_EXIT();
+    OS_Pend(DEF_NULL,                                           /* Block task pending on Signal                         */
+            DEF_NULL,
+            OS_TASK_PEND_ON_TASK_SEM,
+            timeout);
+    OS_CRITICAL_EXIT_NO_SCHED();
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_TASK_SEM_PEND_BLOCK(OSTCBCurPtr);                  /* Record the event.                                    */
+#endif
+    OSSched();                                                  /* Find next highest priority task ready to run         */
+
+    CPU_CRITICAL_ENTER();
+    switch (OSTCBCurPtr->PendStatus) {                          /* See if we timed-out or aborted                       */
+        case OS_STATUS_PEND_OK:
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts                    =  OSTCBCurPtr->TS;
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+                OSTCBCurPtr->SemPendTime = OS_TS_GET() - OSTCBCurPtr->TS;
+                if (OSTCBCurPtr->SemPendTimeMax < OSTCBCurPtr->SemPendTime) {
+                    OSTCBCurPtr->SemPendTimeMax = OSTCBCurPtr->SemPendTime;
+                }
+#endif
+#endif
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_TASK_SEM_PEND(OSTCBCurPtr);               /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_NONE;
+             break;
+
+        case OS_STATUS_PEND_ABORT:
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = OSTCBCurPtr->TS;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_TASK_SEM_PEND_FAILED(OSTCBCurPtr);        /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_PEND_ABORT;                         /* Indicate that we aborted                             */
+             break;
+
+        case OS_STATUS_PEND_TIMEOUT:
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+             if (p_ts != DEF_NULL) {
+                *p_ts = 0u;
+             }
+#endif
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_TASK_SEM_PEND_FAILED(OSTCBCurPtr);        /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_TIMEOUT;                            /* Indicate that we didn't get event within TO          */
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_TASK_SEM_PEND_FAILED(OSTCBCurPtr);        /* Record the event.                                    */
+#endif
+            *p_err = OS_ERR_STATUS_INVALID;
+             break;
+    }
+    ctr = OSTCBCurPtr->SemCtr;
+    CPU_CRITICAL_EXIT();
+    return (ctr);
+}
+
+
+/*
+************************************************************************************************************************
+*                                               ABORT WAITING FOR A SIGNAL
+*
+* Description: This function aborts & readies the task specified.  This function should be used to fault-abort the wait
+*              for a signal, rather than to normally post the signal to the task via OSTaskSemPost().
+*
+* Arguments  : p_tcb     is a pointer to the task to pend abort
+*
+*              opt       provides options for this function:
+*
+*                            OS_OPT_POST_NONE         No option selected
+*                            OS_OPT_POST_NO_SCHED     Indicates that the scheduler will not be called.
+*
+*              p_err     is a pointer to a variable that will contain an error code returned by this function.
+*
+*                            OS_ERR_NONE               If the task was readied and informed of the aborted wait
+*                            OS_ERR_OPT_INVALID        You specified an invalid option
+*                            OS_ERR_OS_NOT_RUNNING     If uC/OS-III is not running yet
+*                            OS_ERR_PEND_ABORT_ISR     If you tried calling this function from an ISR
+*                            OS_ERR_PEND_ABORT_NONE    If the task was not waiting for a signal
+*                            OS_ERR_PEND_ABORT_SELF    If you attempted to pend abort the calling task.  This is not
+*                                                      possible since the calling task cannot be pending because it's
+*                                                      running
+*
+* Returns    : == DEF_FALSE   if task was not waiting for a message, or upon error.
+*              == DEF_TRUE    if task was waiting for a message and was readied and informed.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_SEM_PEND_ABORT_EN == DEF_ENABLED)
+CPU_BOOLEAN  OSTaskSemPendAbort (OS_TCB  *p_tcb,
+                                 OS_OPT   opt,
+                                 OS_ERR  *p_err)
+{
+    CPU_TS  ts;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from ISR ...                           */
+       *p_err = OS_ERR_PEND_ABORT_ISR;                          /* ... can't Pend Abort from an ISR                     */
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_POST_NONE:
+        case OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+            *p_err = OS_ERR_OPT_INVALID;
+             return (DEF_FALSE);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if ((p_tcb == DEF_NULL) ||                                  /* Pend abort self?                                     */
+        (p_tcb == OSTCBCurPtr)) {
+        CPU_CRITICAL_EXIT();                                    /* ... doesn't make sense!                              */
+       *p_err = OS_ERR_PEND_ABORT_SELF;
+        return (DEF_FALSE);
+    }
+
+    if (p_tcb->PendOn != OS_TASK_PEND_ON_TASK_SEM) {            /* Is task waiting for a signal?                        */
+        CPU_CRITICAL_EXIT();
+       *p_err = OS_ERR_PEND_ABORT_NONE;
+        return (DEF_FALSE);
+    }
+    CPU_CRITICAL_EXIT();
+
+    OS_CRITICAL_ENTER();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts = OS_TS_GET();
+#else
+    ts = 0u;
+#endif
+    OS_PendAbort(DEF_NULL,
+                 p_tcb,
+                 ts);
+    OS_CRITICAL_EXIT_NO_SCHED();
+    if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+        OSSched();                                              /* Run the scheduler                                    */
+    }
+   *p_err = OS_ERR_NONE;
+    return (DEF_TRUE);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                    SIGNAL A TASK
+*
+* Description: This function is called to signal a task waiting for a signal.
+*
+* Arguments  : p_tcb     is the pointer to the TCB of the task to signal.  A NULL pointer indicates that you are sending
+*                        a signal to yourself.
+*
+*              opt       determines the type of POST performed:
+*
+*                             OS_OPT_POST_NONE         No option
+*                             OS_OPT_POST_NO_SCHED     Do not call the scheduler
+*
+*              p_err     is a pointer to an error code returned by this function:
+*
+*                            OS_ERR_NONE              If the requested task is signaled
+*                            OS_ERR_INT_Q_FULL        If the deferred interrupt post queue is full
+*                            OS_ERR_OPT_INVALID       If you specified an invalid option
+*                            OS_ERR_OS_NOT_RUNNING    If uC/OS-III is not running yet
+*                            OS_ERR_SEM_OVF           If the post would cause the semaphore count to overflow
+*                            OS_ERR_STATE_INVALID     If the task is in an invalid state.  This should never happen
+*                                                     and if it does, would be considered a system failure
+*
+* Returns    : The current value of the task's signal counter or 0 if called from an ISR
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+OS_SEM_CTR  OSTaskSemPost (OS_TCB  *p_tcb,
+                           OS_OPT   opt,
+                           OS_ERR  *p_err)
+{
+    OS_SEM_CTR  ctr;
+    CPU_TS      ts;
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    switch (opt) {                                              /* Validate 'opt'                                       */
+        case OS_OPT_POST_NONE:
+        case OS_OPT_POST_NO_SCHED:
+             break;
+
+        default:
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+             TRACE_OS_TASK_SEM_POST_FAILED(p_tcb);              /* Record the event.                                    */
+#endif
+            *p_err =  OS_ERR_OPT_INVALID;
+             return (0u);
+    }
+#endif
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts = OS_TS_GET();                                           /* Get timestamp                                        */
+#else
+    ts = 0u;
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from an ISR                            */
+        OS_IntQPost(OS_OBJ_TYPE_TASK_SIGNAL,                    /* Post to ISR queue                                    */
+                    (void      *)p_tcb,
+                    DEF_NULL,
+                    0u,
+                    0u,
+                    0u,
+                    ts,
+                    p_err);
+        return (0u);
+    }
+#endif
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_TASK_SEM_POST(p_tcb);                              /* Record the event.                                    */
+#endif
+
+    ctr = OS_TaskSemPost(p_tcb,
+                         opt,
+                         ts,
+                         p_err);
+
+    return (ctr);
+}
+
+
+/*
+************************************************************************************************************************
+*                                            SET THE SIGNAL COUNTER OF A TASK
+*
+* Description: This function is called to clear the signal counter
+*
+* Arguments  : p_tcb      is the pointer to the TCB of the task to clear the counter.  If you specify a NULL pointer
+*                         then the signal counter of the current task will be cleared.
+*
+*              cnt        is the desired value of the semaphore counter
+*
+*              p_err      is a pointer to an error code returned by this function
+*
+*                             OS_ERR_NONE             If the signal counter of the requested task is set
+*                             OS_ERR_SET_ISR          If the function was called from an ISR
+*                             OS_ERR_TASK_WAITING     One or more tasks were waiting on the semaphore
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+OS_SEM_CTR  OSTaskSemSet (OS_TCB      *p_tcb,
+                          OS_SEM_CTR   cnt,
+                          OS_ERR      *p_err)
+{
+    OS_SEM_CTR  ctr;
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+       *p_err = OS_ERR_SET_ISR;
+        return (0u);
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (p_tcb == DEF_NULL) {
+        p_tcb = OSTCBCurPtr;
+    }
+
+    if (((p_tcb->TaskState   & OS_TASK_STATE_PEND) != 0u) &&    /* Not allowed when a task is waiting.                  */
+         (p_tcb->PendOn == OS_TASK_PEND_ON_TASK_SEM)) {
+        CPU_CRITICAL_EXIT();
+       *p_err = OS_ERR_TASK_WAITING;
+        return (0u);
+    }
+
+    ctr           = p_tcb->SemCtr;
+    p_tcb->SemCtr = (OS_SEM_CTR)cnt;
+    CPU_CRITICAL_EXIT();
+   *p_err         =  OS_ERR_NONE;
+    return (ctr);
+}
+
+
+/*
+************************************************************************************************************************
+*                                                    STACK CHECKING
+*
+* Description: This function is called to calculate the amount of free memory left on the specified task's stack.
+*
+* Arguments  : p_tcb       is a pointer to the TCB of the task to check.  If you specify a NULL pointer then
+*                          you are specifying that you want to check the stack of the current task.
+*
+*              p_free      is a pointer to a variable that will receive the number of free 'entries' on the task's stack.
+*
+*              p_used      is a pointer to a variable that will receive the number of used 'entries' on the task's stack.
+*
+*              p_err       is a pointer to a variable that will contain an error code.
+*
+*                              OS_ERR_NONE               Upon success
+*                              OS_ERR_PTR_INVALID        If either 'p_free' or 'p_used' are NULL pointers
+*                              OS_ERR_TASK_NOT_EXIST     If the stack pointer of the task is a NULL pointer
+*                              OS_ERR_TASK_OPT           If you did NOT specified OS_OPT_TASK_STK_CHK when the task
+*                                                        was created
+*                              OS_ERR_TASK_STK_CHK_ISR   You called this function from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED)
+void  OSTaskStkChk (OS_TCB        *p_tcb,
+                    CPU_STK_SIZE  *p_free,
+                    CPU_STK_SIZE  *p_used,
+                    OS_ERR        *p_err)
+{
+    CPU_STK_SIZE  free_stk;
+    CPU_STK      *p_stk;
+    CPU_SR_ALLOC();
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if trying to check stack from ISR                */
+       *p_err = OS_ERR_TASK_STK_CHK_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_free == DEF_NULL) {                                   /* User must specify valid destinations for the sizes   */
+       *p_err = OS_ERR_PTR_INVALID;
+        return;
+    }
+
+    if (p_used == DEF_NULL) {
+       *p_err = OS_ERR_PTR_INVALID;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (p_tcb == DEF_NULL) {                                    /* Check the stack of the current task?                 */
+        p_tcb = OSTCBCurPtr;                                    /* Yes                                                  */
+    }
+
+    if (p_tcb->StkPtr == DEF_NULL) {                            /* Make sure task exist                                 */
+        CPU_CRITICAL_EXIT();
+       *p_free = 0u;
+       *p_used = 0u;
+       *p_err  = OS_ERR_TASK_NOT_EXIST;
+        return;
+    }
+
+    if ((p_tcb->Opt & OS_OPT_TASK_STK_CHK) == 0u) {             /* Make sure stack checking option is set               */
+        CPU_CRITICAL_EXIT();
+       *p_free = 0u;
+       *p_used = 0u;
+       *p_err  = OS_ERR_TASK_OPT;
+        return;
+    }
+    CPU_CRITICAL_EXIT();
+
+    free_stk = 0u;
+#if (CPU_CFG_STK_GROWTH == CPU_STK_GROWTH_HI_TO_LO)
+    p_stk = p_tcb->StkBasePtr;                                  /* Start at the lowest memory and go up                 */
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    p_stk += OS_CFG_TASK_STK_REDZONE_DEPTH;
+#endif
+    while (*p_stk == 0u) {                                      /* Compute the number of zero entries on the stk        */
+        p_stk++;
+        free_stk++;
+    }
+#else
+    p_stk = p_tcb->StkBasePtr + p_tcb->StkSize - 1u;            /* Start at the highest memory and go down              */
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    p_stk -= OS_CFG_TASK_STK_REDZONE_DEPTH;
+#endif
+    while (*p_stk == 0u) {
+        free_stk++;
+        p_stk--;
+    }
+#endif
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+    free_stk -= OS_CFG_TASK_STK_REDZONE_DEPTH;                  /* Compensate for stack elements used by Redzone.       */
+#endif
+   *p_free = free_stk;
+   *p_used = (p_tcb->StkSize - free_stk);                       /* Compute number of entries used on the stack          */
+   *p_err  = OS_ERR_NONE;
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                            CHECK THE STACK REDZONE OF A TASK
+*
+* Description: Verify a task's stack redzone.
+*
+* Arguments  : p_tcb     is a pointer to the TCB of the task to check or null for the current task.
+*
+* Returns    : If the stack is corrupted (DEF_FAIL) or not (DEF_OK).
+*
+* Note(s)    : These functions are INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+CPU_BOOLEAN  OSTaskStkRedzoneChk (OS_TCB  *p_tcb)
+{
+    CPU_BOOLEAN  stk_status;
+
+
+    if (p_tcb == DEF_NULL) {
+        p_tcb = OSTCBCurPtr;
+    }
+                                                                /* Check if SP is valid:                                */
+                                                                /*   StkBase <= SP < (StkBase + StkSize)                */
+    if ((p_tcb->StkPtr <   p_tcb->StkBasePtr) ||
+        (p_tcb->StkPtr >= (p_tcb->StkBasePtr + p_tcb->StkSize))) {
+        return (DEF_FAIL);
+    }
+
+    stk_status = OS_TaskStkRedzoneChk(p_tcb->StkBasePtr, p_tcb->StkSize);
+
+    return (stk_status);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                   SUSPEND A TASK
+*
+* Description: This function is called to suspend a task.  The task can be the calling task if 'p_tcb' is a NULL pointer
+*              or the pointer to the TCB of the calling task.
+*
+* Arguments  : p_tcb    is a pointer to the TCB to suspend.
+*                       If p_tcb is a NULL pointer then, suspend the current task.
+*
+*              p_err    is a pointer to a variable that will receive an error code from this function.
+*
+*                           OS_ERR_NONE                        If the requested task is suspended
+*                           OS_ERR_INT_Q_FULL                  If the deferred interrupt post queue is full
+*                           OS_ERR_OS_NOT_RUNNING              If uC/OS-III is not running yet
+*                           OS_ERR_SCHED_LOCKED                You can't suspend the current task is the scheduler is
+*                                                                  locked
+*                           OS_ERR_STATE_INVALID               If the task is in an invalid state
+*                           OS_ERR_TASK_SUSPEND_CTR_OVF        If the nesting counter overflowed.
+*                           OS_ERR_TASK_SUSPEND_ISR            If you called this function from an ISR
+*                           OS_ERR_TASK_SUSPEND_IDLE           If you attempted to suspend the idle task which is not
+*                                                                  allowed
+*                           OS_ERR_TASK_SUSPEND_INT_HANDLER    If you attempted to suspend the idle task which is not
+*                                                                  allowed
+*
+* Returns    : none
+*
+* Note(s)    : 1) You should use this function with great care.  If you suspend a task that is waiting for an event
+*                 (i.e. a message, a semaphore, a queue ...) you will prevent this task from running when the event
+*                 arrives.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+void   OSTaskSuspend (OS_TCB  *p_tcb,
+                      OS_ERR  *p_err)
+{
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN   == DEF_DISABLED) && \
+    (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+       *p_err = OS_ERR_TASK_SUSPEND_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_TASK_IDLE_EN == DEF_ENABLED)
+    if (p_tcb == &OSIdleTaskTCB) {                              /* Make sure not suspending the idle task               */
+       *p_err = OS_ERR_TASK_SUSPEND_IDLE;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+    if (p_tcb == &OSIntQTaskTCB) {                              /* Not allowed to suspend the ISR handler task          */
+       *p_err = OS_ERR_TASK_SUSPEND_INT_HANDLER;
+        return;
+    }
+
+    if (OSIntNestingCtr > 0u) {                                 /* See if called from an ISR                            */
+        OS_IntQPost(OS_OBJ_TYPE_TASK_SUSPEND,                   /* Post to ISR queue                                    */
+                    (void *)p_tcb,
+                    DEF_NULL,
+                    0u,
+                    0u,
+                    0u,
+                    0u,
+                    p_err);
+        return;
+    }
+#endif
+
+    OS_TaskSuspend(p_tcb, p_err);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                CHANGE A TASK'S TIME SLICE
+*
+* Description: This function is called to change the value of the task's specific time slice.
+*
+* Arguments  : p_tcb        is the pointer to the TCB of the task to change. If you specify an NULL pointer, the current
+*                           task is assumed.
+*
+*              time_quanta  is the number of ticks before the CPU is taken away when round-robin scheduling is enabled.
+*
+*              p_err        is a pointer to an error code returned by this function:
+*
+*                               OS_ERR_NONE       Upon success
+*                               OS_ERR_SET_ISR    If you called this function from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+void  OSTaskTimeQuantaSet (OS_TCB   *p_tcb,
+                           OS_TICK   time_quanta,
+                           OS_ERR   *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Can't call this function from an ISR                 */
+       *p_err = OS_ERR_SET_ISR;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    if (p_tcb == DEF_NULL) {
+        p_tcb = OSTCBCurPtr;
+    }
+
+    if (time_quanta == 0u) {
+        p_tcb->TimeQuanta    = OSSchedRoundRobinDfltTimeQuanta;
+    } else {
+        p_tcb->TimeQuanta    = time_quanta;
+    }
+    if (p_tcb->TimeQuanta > p_tcb->TimeQuantaCtr) {
+        p_tcb->TimeQuantaCtr = p_tcb->TimeQuanta;
+    }
+    CPU_CRITICAL_EXIT();
+   *p_err = OS_ERR_NONE;
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                            ADD/REMOVE TASK TO/FROM DEBUG LIST
+*
+* Description: These functions are called by uC/OS-III to add or remove an OS_TCB from the debug list.
+*
+* Arguments  : p_tcb     is a pointer to the OS_TCB to add/remove
+*
+* Returns    : none
+*
+* Note(s)    : These functions are INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void  OS_TaskDbgListAdd (OS_TCB  *p_tcb)
+{
+    p_tcb->DbgPrevPtr                = DEF_NULL;
+    if (OSTaskDbgListPtr == DEF_NULL) {
+        p_tcb->DbgNextPtr            = DEF_NULL;
+    } else {
+        p_tcb->DbgNextPtr            =  OSTaskDbgListPtr;
+        OSTaskDbgListPtr->DbgPrevPtr =  p_tcb;
+    }
+    OSTaskDbgListPtr                 =  p_tcb;
+}
+
+
+
+void  OS_TaskDbgListRemove (OS_TCB  *p_tcb)
+{
+    OS_TCB  *p_tcb_next;
+    OS_TCB  *p_tcb_prev;
+
+
+    p_tcb_prev = p_tcb->DbgPrevPtr;
+    p_tcb_next = p_tcb->DbgNextPtr;
+
+    if (p_tcb_prev == DEF_NULL) {
+        OSTaskDbgListPtr = p_tcb_next;
+        if (p_tcb_next != DEF_NULL) {
+            p_tcb_next->DbgPrevPtr = DEF_NULL;
+        }
+        p_tcb->DbgNextPtr = DEF_NULL;
+
+    } else if (p_tcb_next == DEF_NULL) {
+        p_tcb_prev->DbgNextPtr = DEF_NULL;
+        p_tcb->DbgPrevPtr      = DEF_NULL;
+
+    } else {
+        p_tcb_prev->DbgNextPtr =  p_tcb_next;
+        p_tcb_next->DbgPrevPtr =  p_tcb_prev;
+        p_tcb->DbgNextPtr      = DEF_NULL;
+        p_tcb->DbgPrevPtr      = DEF_NULL;
+    }
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                             TASK MANAGER INITIALIZATION
+*
+* Description: This function is called by OSInit() to initialize the task management.
+*
+
+* Argument(s): p_err        is a pointer to a variable that will contain an error code returned by this function.
+*
+*                                OS_ERR_NONE     the call was successful
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_TaskInit (OS_ERR  *p_err)
+{
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSTaskDbgListPtr = DEF_NULL;
+#endif
+
+    OSTaskQty        = 0u;                                      /* Clear the number of tasks                            */
+
+#if ((OS_CFG_TASK_PROFILE_EN == DEF_ENABLED) || (OS_CFG_DBG_EN == DEF_ENABLED))
+    OSTaskCtxSwCtr   = 0u;                                      /* Clear the context switch counter                     */
+#endif
+
+   *p_err            = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                               INITIALIZE TCB FIELDS
+*
+* Description: This function is called to initialize a TCB to default values
+*
+* Arguments  : p_tcb    is a pointer to the TCB to initialize
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_TaskInitTCB (OS_TCB  *p_tcb)
+{
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+    OS_REG_ID   reg_id;
+#endif
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+    OS_TLS_ID   id;
+#endif
+
+
+    p_tcb->StkPtr             = DEF_NULL;
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED))
+    p_tcb->StkLimitPtr        = DEF_NULL;
+#endif
+
+    p_tcb->ExtPtr             = DEF_NULL;
+
+    p_tcb->NextPtr            = DEF_NULL;
+    p_tcb->PrevPtr            = DEF_NULL;
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    p_tcb->TickNextPtr        = DEF_NULL;
+    p_tcb->TickPrevPtr        = DEF_NULL;
+    p_tcb->TickListPtr        = DEF_NULL;
+#endif
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_tcb->NamePtr            = (CPU_CHAR *)((void *)"?Task");
+#endif
+
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED))
+    p_tcb->StkBasePtr         = DEF_NULL;
+#endif
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_tcb->TaskEntryAddr      = 0u;
+    p_tcb->TaskEntryArg       = DEF_NULL;
+#endif
+
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+    p_tcb->PendDataTblPtr     = DEF_NULL;
+    p_tcb->PendDataTblEntries = 0u;
+#endif
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_tcb->TS                 = 0u;
+#endif
+
+#if (OS_MSG_EN == DEF_ENABLED)
+    p_tcb->MsgPtr             = DEF_NULL;
+    p_tcb->MsgSize            = 0u;
+#endif
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+    OS_MsgQInit(&p_tcb->MsgQ,
+                 0u);
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+    p_tcb->MsgQPendTime       = 0u;
+    p_tcb->MsgQPendTimeMax    = 0u;
+#endif
+#endif
+
+#if (OS_CFG_FLAG_EN == DEF_ENABLED)
+    p_tcb->FlagsPend          = 0u;
+    p_tcb->FlagsOpt           = 0u;
+    p_tcb->FlagsRdy           = 0u;
+#endif
+
+#if (OS_CFG_TASK_REG_TBL_SIZE > 0u)
+    for (reg_id = 0u; reg_id < OS_CFG_TASK_REG_TBL_SIZE; reg_id++) {
+        p_tcb->RegTbl[reg_id] = 0u;
+    }
+#endif
+
+#if defined(OS_CFG_TLS_TBL_SIZE) && (OS_CFG_TLS_TBL_SIZE > 0u)
+    for (id = 0u; id < OS_CFG_TLS_TBL_SIZE; id++) {
+        p_tcb->TLS_Tbl[id]    = 0u;
+    }
+#endif
+
+    p_tcb->SemCtr             = 0u;
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+    p_tcb->SemPendTime        = 0u;
+    p_tcb->SemPendTimeMax     = 0u;
+#endif
+
+#if ((OS_CFG_DBG_EN == DEF_ENABLED) || (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED))
+    p_tcb->StkSize            = 0u;
+#endif
+
+
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+    p_tcb->SuspendCtr         = 0u;
+#endif
+
+#if (OS_CFG_STAT_TASK_STK_CHK_EN == DEF_ENABLED)
+    p_tcb->StkFree            = 0u;
+    p_tcb->StkUsed            = 0u;
+#endif
+
+    p_tcb->Opt                = 0u;
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    p_tcb->TickRemain         = 0u;
+    p_tcb->TickCtrPrev        = 0u;
+#endif
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+    p_tcb->TimeQuanta         = 0u;
+    p_tcb->TimeQuantaCtr      = 0u;
+#endif
+
+#if (OS_CFG_TASK_PROFILE_EN == DEF_ENABLED)
+    p_tcb->CPUUsage           = 0u;
+    p_tcb->CPUUsageMax        = 0u;
+    p_tcb->CtxSwCtr           = 0u;
+    p_tcb->CyclesDelta        = 0u;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_tcb->CyclesStart        = OS_TS_GET();                    /* Read the current timestamp and save                    */
+#else
+    p_tcb->CyclesStart        = 0u;
+#endif
+    p_tcb->CyclesTotal        = 0u;
+#endif
+
+#ifdef CPU_CFG_INT_DIS_MEAS_EN
+    p_tcb->IntDisTimeMax      = 0u;
+#endif
+#if (OS_CFG_SCHED_LOCK_TIME_MEAS_EN == DEF_ENABLED)
+    p_tcb->SchedLockTimeMax   = 0u;
+#endif
+
+    p_tcb->PendOn             = OS_TASK_PEND_ON_NOTHING;
+    p_tcb->PendStatus         = OS_STATUS_PEND_OK;
+    p_tcb->TaskState          = OS_TASK_STATE_RDY;
+
+    p_tcb->Prio               = OS_PRIO_INIT;
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    p_tcb->BasePrio           = OS_PRIO_INIT;
+    p_tcb->MutexGrpHeadPtr    = DEF_NULL;
+#endif
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_tcb->DbgPrevPtr         = DEF_NULL;
+    p_tcb->DbgNextPtr         = DEF_NULL;
+    p_tcb->DbgNamePtr         = (CPU_CHAR *)((void *)" ");
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                               POST MESSAGE TO A TASK
+*
+* Description: This function sends a message to a task
+*
+* Arguments  : p_tcb      is a pointer to the TCB of the task receiving a message.  If you specify a NULL pointer then
+*                         the message will be posted to the task's queue of the calling task.  In other words, you'd be
+*                         posting a message to yourself.
+*
+*              p_void     is a pointer to the message to send.
+*
+*              msg_size   is the size of the message sent (in #bytes)
+*
+*              opt        specifies whether the post will be FIFO or LIFO:
+*
+*                             OS_OPT_POST_FIFO       Post at the end   of the queue
+*                             OS_OPT_POST_LIFO       Post at the front of the queue
+*
+*                             OS_OPT_POST_NO_SCHED   Do not run the scheduler after the post
+*
+*                          Note(s): 1) OS_OPT_POST_NO_SCHED can be added with one of the other options.
+*
+*
+*              ts         is a timestamp indicating when the post occurred.
+*
+*              p_err      is a pointer to a variable that will hold the error code associated
+*                         with the outcome of this call.  Errors can be:
+*
+*                             OS_ERR_NONE            The call was successful and the message was sent
+*                             OS_ERR_MSG_POOL_EMPTY  If there are no more OS_MSGs available from the pool
+*                             OS_ERR_Q_MAX           If the queue is full
+*                             OS_ERR_STATE_INVALID   If the task is in an invalid state.  This should never happen
+*                                                    and if it does, would be considered a system failure.
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_Q_EN == DEF_ENABLED)
+void  OS_TaskQPost (OS_TCB       *p_tcb,
+                    void         *p_void,
+                    OS_MSG_SIZE   msg_size,
+                    OS_OPT        opt,
+                    CPU_TS        ts,
+                    OS_ERR       *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+   *p_err = OS_ERR_NONE;                                        /* Assume we won't have any errors                      */
+    OS_CRITICAL_ENTER();
+    if (p_tcb == DEF_NULL) {                                    /* Post msg to 'self'?                                  */
+        p_tcb = OSTCBCurPtr;
+    }
+    switch (p_tcb->TaskState) {
+        case OS_TASK_STATE_RDY:
+        case OS_TASK_STATE_DLY:
+        case OS_TASK_STATE_SUSPENDED:
+        case OS_TASK_STATE_DLY_SUSPENDED:
+             OS_MsgQPut(&p_tcb->MsgQ,                           /* Deposit the message in the queue                     */
+                        p_void,
+                        msg_size,
+                        opt,
+                        ts,
+                        p_err);
+             OS_CRITICAL_EXIT();
+             break;
+
+        case OS_TASK_STATE_PEND:
+        case OS_TASK_STATE_PEND_TIMEOUT:
+        case OS_TASK_STATE_PEND_SUSPENDED:
+        case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+             if (p_tcb->PendOn == OS_TASK_PEND_ON_TASK_Q) {     /* Is task waiting for a message to be sent to it?      */
+                 OS_Post(DEF_NULL,
+                         p_tcb,
+                         p_void,
+                         msg_size,
+                         ts);
+                 OS_CRITICAL_EXIT_NO_SCHED();
+                 if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+                     OSSched();                                 /* Run the scheduler                                    */
+                 }
+             } else {
+                 OS_MsgQPut(&p_tcb->MsgQ,                       /* No,  Task is pending on something else ...           */
+                            p_void,                             /* ... Deposit the message in the task's queue          */
+                            msg_size,
+                            opt,
+                            ts,
+                            p_err);
+                 OS_CRITICAL_EXIT();
+             }
+             break;
+
+        default:
+             OS_CRITICAL_EXIT();
+            *p_err = OS_ERR_STATE_INVALID;
+             break;
+    }
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                               RESUME A SUSPENDED TASK
+*
+* Description: This function is called to resume a previously suspended task.  This is the only call that will remove an
+*              explicit task suspension.
+*
+* Arguments  : p_tcb      Is a pointer to the task's OS_TCB to resume
+*
+*              p_err      Is a pointer to a variable that will contain an error code returned by this function
+*
+*                             OS_ERR_NONE                  if the requested task is resumed
+*                             OS_ERR_STATE_INVALID         if the task is in an invalid state
+*                             OS_ERR_TASK_NOT_SUSPENDED    if the task to resume has not been suspended
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+void  OS_TaskResume (OS_TCB  *p_tcb,
+                     OS_ERR  *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+   *p_err  = OS_ERR_NONE;
+    switch (p_tcb->TaskState) {
+        case OS_TASK_STATE_RDY:
+        case OS_TASK_STATE_DLY:
+        case OS_TASK_STATE_PEND:
+        case OS_TASK_STATE_PEND_TIMEOUT:
+             CPU_CRITICAL_EXIT();
+            *p_err = OS_ERR_TASK_NOT_SUSPENDED;
+             break;
+
+        case OS_TASK_STATE_SUSPENDED:
+             OS_CRITICAL_ENTER_CPU_EXIT();
+             p_tcb->SuspendCtr--;
+             if (p_tcb->SuspendCtr == 0u) {
+                 p_tcb->TaskState = OS_TASK_STATE_RDY;
+                 OS_RdyListInsert(p_tcb);                       /* Insert the task in the ready list                    */
+             }
+             OS_CRITICAL_EXIT_NO_SCHED();
+             break;
+
+        case OS_TASK_STATE_DLY_SUSPENDED:
+             p_tcb->SuspendCtr--;
+             if (p_tcb->SuspendCtr == 0u) {
+                 p_tcb->TaskState = OS_TASK_STATE_DLY;
+             }
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case OS_TASK_STATE_PEND_SUSPENDED:
+             p_tcb->SuspendCtr--;
+             if (p_tcb->SuspendCtr == 0u) {
+                 p_tcb->TaskState = OS_TASK_STATE_PEND;
+             }
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+             p_tcb->SuspendCtr--;
+             if (p_tcb->SuspendCtr == 0u) {
+                 p_tcb->TaskState = OS_TASK_STATE_PEND_TIMEOUT;
+             }
+             CPU_CRITICAL_EXIT();
+             break;
+
+        default:
+             CPU_CRITICAL_EXIT();
+            *p_err = OS_ERR_STATE_INVALID;
+             return;
+    }
+
+    OSSched();
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                              CATCH ACCIDENTAL TASK RETURN
+*
+* Description: This function is called if a task accidentally returns without deleting itself.  In other words, a task
+*              should either be an infinite loop or delete itself if it's done.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_TaskReturn (void)
+{
+    OS_ERR  err;
+
+
+
+    OSTaskReturnHook(OSTCBCurPtr);                              /* Call hook to let user decide on what to do           */
+#if (OS_CFG_TASK_DEL_EN == DEF_ENABLED)
+    OSTaskDel( DEF_NULL,                                        /* Delete task if it accidentally returns!              */
+              &err);
+#else
+    while (DEF_TRUE) {
+        OSTimeDly(OSCfg_TickRate_Hz,
+                  OS_OPT_TIME_DLY,
+                  &err);
+        (void)err;
+    }
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                                    SIGNAL A TASK
+*
+* Description: This function is called to signal a task waiting for a signal.
+*
+* Arguments  : p_tcb     is the pointer to the TCB of the task to signal.  A NULL pointer indicates that you are sending
+*                        a signal to yourself.
+*
+*              opt       determines the type of POST performed:
+*
+*                             OS_OPT_POST_NONE         No option
+*
+*                             OS_OPT_POST_NO_SCHED     Do not call the scheduler
+*
+*              ts        is a timestamp indicating when the post occurred.
+*
+*              p_err     is a pointer to an error code returned by this function:
+*
+*                            OS_ERR_NONE           If the requested task is signaled
+*                            OS_ERR_SEM_OVF        If the post would cause the semaphore count to overflow.
+*                            OS_ERR_STATE_INVALID  If the task is in an invalid state.  This should never happen
+*                                                  and if it does, would be considered a system failure.
+*
+* Returns    : The current value of the task's signal counter or 0 if called from an ISR
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+OS_SEM_CTR  OS_TaskSemPost (OS_TCB  *p_tcb,
+                            OS_OPT   opt,
+                            CPU_TS   ts,
+                            OS_ERR  *p_err)
+{
+    OS_SEM_CTR  ctr;
+    CPU_SR_ALLOC();
+
+
+#if (OS_CFG_TS_EN == DEF_DISABLED)
+    (void)ts;                                                   /* Prevent compiler warning for not using 'ts'          */
+#endif
+
+    OS_CRITICAL_ENTER();
+    if (p_tcb == DEF_NULL) {                                    /* Post signal to 'self'?                               */
+        p_tcb = OSTCBCurPtr;
+    }
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    p_tcb->TS = ts;
+#endif
+   *p_err     = OS_ERR_NONE;                                    /* Assume we won't have any errors                      */
+    switch (p_tcb->TaskState) {
+        case OS_TASK_STATE_RDY:
+        case OS_TASK_STATE_DLY:
+        case OS_TASK_STATE_SUSPENDED:
+        case OS_TASK_STATE_DLY_SUSPENDED:
+             switch (sizeof(OS_SEM_CTR)) {
+                 case 1u:
+                      if (p_tcb->SemCtr == DEF_INT_08U_MAX_VAL) {
+                          OS_CRITICAL_EXIT();
+                         *p_err = OS_ERR_SEM_OVF;
+                          return (0u);
+                      }
+                      break;
+
+                 case 2u:
+                      if (p_tcb->SemCtr == DEF_INT_16U_MAX_VAL) {
+                          OS_CRITICAL_EXIT();
+                         *p_err = OS_ERR_SEM_OVF;
+                          return (0u);
+                      }
+                      break;
+
+                 case 4u:
+                      if (p_tcb->SemCtr == DEF_INT_32U_MAX_VAL) {
+                          OS_CRITICAL_EXIT();
+                         *p_err = OS_ERR_SEM_OVF;
+                          return (0u);
+                      }
+                      break;
+
+                 default:
+                      break;
+             }
+             p_tcb->SemCtr++;                                   /* Task signaled is not pending on anything             */
+             ctr = p_tcb->SemCtr;
+             OS_CRITICAL_EXIT();
+             break;
+
+        case OS_TASK_STATE_PEND:
+        case OS_TASK_STATE_PEND_TIMEOUT:
+        case OS_TASK_STATE_PEND_SUSPENDED:
+        case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+             if (p_tcb->PendOn == OS_TASK_PEND_ON_TASK_SEM) {   /* Is task signaled waiting for a signal?               */
+                 OS_Post(DEF_NULL,                              /* Task is pending on signal                            */
+                         p_tcb,
+                         DEF_NULL,
+                         0u,
+                         ts);
+                 ctr = p_tcb->SemCtr;
+                 OS_CRITICAL_EXIT_NO_SCHED();
+                 if ((opt & OS_OPT_POST_NO_SCHED) == 0u) {
+                     OSSched();                                 /* Run the scheduler                                    */
+                 }
+             } else {
+                 switch (sizeof(OS_SEM_CTR)) {
+                     case 1u:
+                          if (p_tcb->SemCtr == DEF_INT_08U_MAX_VAL) {
+                              OS_CRITICAL_EXIT();
+                             *p_err = OS_ERR_SEM_OVF;
+                              return (0u);
+                          }
+                          break;
+
+                     case 2u:
+                          if (p_tcb->SemCtr == DEF_INT_16U_MAX_VAL) {
+                              OS_CRITICAL_EXIT();
+                             *p_err = OS_ERR_SEM_OVF;
+                              return (0u);
+                          }
+                          break;
+
+                     case 4u:
+                          if (p_tcb->SemCtr == DEF_INT_32U_MAX_VAL) {
+                              OS_CRITICAL_EXIT();
+                             *p_err = OS_ERR_SEM_OVF;
+                              return (0u);
+                          }
+                          break;
+
+                     default:
+                          break;
+                 }
+                 p_tcb->SemCtr++;                               /* No,  Task signaled is NOT pending on semaphore ...   */
+                 ctr = p_tcb->SemCtr;                           /* ... it must be waiting on something else             */
+                 OS_CRITICAL_EXIT();
+             }
+             break;
+
+        default:
+             OS_CRITICAL_EXIT();
+            *p_err = OS_ERR_STATE_INVALID;
+             ctr   = 0u;
+             break;
+    }
+    return (ctr);
+}
+
+
+/*
+************************************************************************************************************************
+*                                          CHECK THE STACK REDZONE OF A TASK
+*
+* Description: Verify a task's stack redzone.
+*
+* Arguments  : p_tcb        is a pointer to the base of the stack.
+*
+*              stk_size     is the size of the stack.
+*
+* Returns    : none
+*
+* Caller(s)  : OSTaskStkRedzoneChk() and OSIntExit().
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+CPU_BOOLEAN   OS_TaskStkRedzoneChk (CPU_STK       *p_base,
+                                    CPU_STK_SIZE   stk_size)
+{
+    CPU_INT32U  i;
+
+
+#if (CPU_CFG_STK_GROWTH == CPU_STK_GROWTH_HI_TO_LO)
+   (void)&stk_size;                                             /* Prevent compiler warning for not using 'stk_size'    */
+
+    for (i = 0u; i < OS_CFG_TASK_STK_REDZONE_DEPTH; i++) {
+        if (*p_base != (CPU_DATA)OS_STACK_CHECK_VAL) {
+            return (DEF_FAIL);
+        }
+        p_base++;
+    }
+#else
+    p_base = p_base + stk_size - 1u;
+    for (i = 0u; i < OS_CFG_TASK_STK_REDZONE_DEPTH; i++) {
+        if (*p_base != (CPU_DATA)OS_STACK_CHECK_VAL) {
+            return (DEF_FAIL);
+        }
+        p_base--;
+    }
+#endif
+
+    return (DEF_OK);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                          INITIALIZE A REDZONE ENABLED STACK
+*
+* Description: This functions is used to initialize a stack with Redzone checking.
+*
+* Arguments  : p_tcb        is a pointer to the base of the stack.
+*
+*              stk_size     is the size of the stack.
+*
+* Returns    : If the stack is corrupted (DEF_FAIL) or not (DEF_OK).
+*
+* Caller(s)  : OSTaskCreate() and OSInit().
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED)
+void  OS_TaskStkRedzoneInit (CPU_STK       *p_base,
+                             CPU_STK_SIZE   stk_size)
+{
+    CPU_STK_SIZE   i;
+
+
+#if (CPU_CFG_STK_GROWTH == CPU_STK_GROWTH_HI_TO_LO)
+   (void)&stk_size;                                             /* Prevent compiler warning for not using 'stk_size'    */
+
+    for (i = 0u; i < OS_CFG_TASK_STK_REDZONE_DEPTH; i++) {
+        *(p_base + i) = (CPU_DATA)OS_STACK_CHECK_VAL;
+    }
+#else
+    for (i = 0u; i < OS_CFG_TASK_STK_REDZONE_DEPTH; i++) {
+        *(p_base + stk_size - 1u - i) = (CPU_DATA)OS_STACK_CHECK_VAL;
+    }
+#endif
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                                   SUSPEND A TASK
+*
+* Description: This function is called to suspend a task.  The task can be the calling task if 'p_tcb' is a NULL pointer
+*              or the pointer to the TCB of the calling task.
+*
+* Arguments  : p_tcb    is a pointer to the TCB to suspend.
+*                       If p_tcb is a NULL pointer then, suspend the current task.
+*
+*              p_err    is a pointer to a variable that will receive an error code from this function.
+*
+*                           OS_ERR_NONE                        If the requested task is suspended
+*                           OS_ERR_OS_NOT_RUNNING              If uC/OS-III is not running yet
+*                           OS_ERR_SCHED_LOCKED                You can't suspend the current task is the scheduler is
+*                                                                locked
+*                           OS_ERR_STATE_INVALID               If the task is in an invalid state
+*                           OS_ERR_TASK_SUSPEND_CTR_OVF        If the nesting counter overflowed.
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application should not call it.
+*
+*              2) You should use this function with great care.  If you suspend a task that is waiting for an event
+*                 (i.e. a message, a semaphore, a queue ...) you will prevent this task from running when the event
+*                 arrives.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TASK_SUSPEND_EN == DEF_ENABLED)
+void  OS_TaskSuspend (OS_TCB  *p_tcb,
+                      OS_ERR  *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+    if (p_tcb == DEF_NULL) {                                    /* See if specified to suspend self                     */
+        if (OSRunning != OS_STATE_OS_RUNNING) {                 /* Can't suspend self when the kernel isn't running     */
+            CPU_CRITICAL_EXIT();
+           *p_err = OS_ERR_OS_NOT_RUNNING;
+            return;
+        }
+        p_tcb = OSTCBCurPtr;
+    }
+
+    if (p_tcb == OSTCBCurPtr) {
+        if (OSSchedLockNestingCtr > 0u) {                       /* Can't suspend when the scheduler is locked           */
+            CPU_CRITICAL_EXIT();
+           *p_err = OS_ERR_SCHED_LOCKED;
+            return;
+        }
+    }
+
+   *p_err = OS_ERR_NONE;
+    switch (p_tcb->TaskState) {
+        case OS_TASK_STATE_RDY:
+             OS_CRITICAL_ENTER_CPU_EXIT();
+             p_tcb->TaskState  =  OS_TASK_STATE_SUSPENDED;
+             p_tcb->SuspendCtr = 1u;
+             OS_RdyListRemove(p_tcb);
+             OS_CRITICAL_EXIT_NO_SCHED();
+             break;
+
+        case OS_TASK_STATE_DLY:
+             p_tcb->TaskState  = OS_TASK_STATE_DLY_SUSPENDED;
+             p_tcb->SuspendCtr = 1u;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case OS_TASK_STATE_PEND:
+             p_tcb->TaskState  = OS_TASK_STATE_PEND_SUSPENDED;
+             p_tcb->SuspendCtr = 1u;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case OS_TASK_STATE_PEND_TIMEOUT:
+             p_tcb->TaskState  = OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED;
+             p_tcb->SuspendCtr = 1u;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        case OS_TASK_STATE_SUSPENDED:
+        case OS_TASK_STATE_DLY_SUSPENDED:
+        case OS_TASK_STATE_PEND_SUSPENDED:
+        case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+			if (p_tcb->SuspendCtr == (OS_NESTING_CTR)-1) {
+                 CPU_CRITICAL_EXIT();
+                *p_err = OS_ERR_TASK_SUSPEND_CTR_OVF;
+                 return;
+             }
+             p_tcb->SuspendCtr++;
+             CPU_CRITICAL_EXIT();
+             break;
+
+        default:
+             CPU_CRITICAL_EXIT();
+            *p_err = OS_ERR_STATE_INVALID;
+             return;
+    }
+
+    if (OSRunning == OS_STATE_OS_RUNNING) {                     /* Only schedule when the kernel is running             */
+        OSSched();
+    }
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                               CHANGE PRIORITY OF A TASK
+*
+* Description: This function is called by the kernel to perform the actual operation of changing a task's priority.
+*              Priority inheritance is updated if necessary.
+*
+*
+*
+* Argument(s): p_tcb        is a pointer to the tcb of the task to change the priority.
+*
+*              prio_new     is the new priority to give to the task.
+*
+*
+* Returns    : none.
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_TaskChangePrio(OS_TCB  *p_tcb,
+                        OS_PRIO  prio_new)
+{
+    OS_TCB  *p_tcb_owner;
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    OS_PRIO  prio_cur;
+#endif
+
+
+    do {
+        p_tcb_owner = DEF_NULL;
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+        prio_cur    = p_tcb->Prio;
+#endif
+        switch (p_tcb->TaskState) {
+            case OS_TASK_STATE_RDY:
+                 OS_RdyListRemove(p_tcb);                       /* Remove from current priority                         */
+                 p_tcb->Prio = prio_new;                        /* Set new task priority                                */
+                 OS_PrioInsert(p_tcb->Prio);
+                 if (p_tcb == OSTCBCurPtr) {
+                     OS_RdyListInsertHead(p_tcb);
+                 } else {
+                     OS_RdyListInsertTail(p_tcb);
+                 }
+                 break;
+
+            case OS_TASK_STATE_DLY:                             /* Nothing to do except change the priority in the OS_TCB*/
+            case OS_TASK_STATE_SUSPENDED:
+            case OS_TASK_STATE_DLY_SUSPENDED:
+                 p_tcb->Prio = prio_new;                        /* Set new task priority                                */
+                 break;
+
+            case OS_TASK_STATE_PEND:
+            case OS_TASK_STATE_PEND_TIMEOUT:
+            case OS_TASK_STATE_PEND_SUSPENDED:
+            case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+                 p_tcb->Prio = prio_new;                        /* Set new task priority                                */
+                 switch (p_tcb->PendOn) {                       /* What to do depends on what we are pending on         */
+                     case OS_TASK_PEND_ON_FLAG:
+#if (OS_CFG_PEND_MULTI_EN == DEF_ENABLED)
+                     case OS_TASK_PEND_ON_MULTI:
+#endif
+                     case OS_TASK_PEND_ON_Q:
+                     case OS_TASK_PEND_ON_SEM:
+                          OS_PendListChangePrio(p_tcb);
+                          break;
+
+                     case OS_TASK_PEND_ON_MUTEX:
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+                          OS_PendListChangePrio(p_tcb);
+                          p_tcb_owner = ((OS_MUTEX *)p_tcb->PendDataTblPtr->PendObjPtr)->OwnerTCBPtr;
+                          if (prio_cur > prio_new) {            /* Are we increasing the priority?                      */
+                              if (p_tcb_owner->Prio <= prio_new) { /* Yes, do we need to give this prio to the owner?   */
+                                  p_tcb_owner = DEF_NULL;
+                              } else {
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                                 TRACE_OS_MUTEX_TASK_PRIO_INHERIT(p_tcb_owner, prio_new);
+#endif
+                              }
+                          } else {
+                              if (p_tcb_owner->Prio == prio_cur) { /* No, is it required to check for a lower prio?     */
+                                  prio_new = OS_MutexGrpPrioFindHighest(p_tcb_owner);
+                                  prio_new = prio_new > p_tcb_owner->BasePrio ? p_tcb_owner->BasePrio : prio_new;
+                                  if (prio_new == p_tcb_owner->Prio) {
+                                      p_tcb_owner = DEF_NULL;
+                                  } else {
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                                     TRACE_OS_MUTEX_TASK_PRIO_DISINHERIT(p_tcb_owner, prio_new);
+#endif
+                                  }
+                              }
+                          }
+#endif
+                         break;
+
+                     case OS_TASK_PEND_ON_TASK_Q:
+                     case OS_TASK_PEND_ON_TASK_SEM:
+                     default:
+                          break;
+                 }
+                 break;
+
+            default:
+                 return;
+        }
+        p_tcb = p_tcb_owner;
+    } while (p_tcb != DEF_NULL);
+}
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_tick.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_tick.c
new file mode 100644
index 0000000..9c84a78
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_tick.c
@@ -0,0 +1,684 @@
+/*
+***********************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                   TICK MANAGEMENT
+*
+* File    : OS_TICK.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_tick__c = "$Id: $";
+#endif
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+/*
+************************************************************************************************************************
+*                                                 FUNCTION PROTOTYPES
+************************************************************************************************************************
+*/
+
+static  CPU_TS  OS_TickListUpdateDly     (OS_TICK ticks);
+static  CPU_TS  OS_TickListUpdateTimeout (OS_TICK ticks);
+
+/*
+************************************************************************************************************************
+*                                                      TICK TASK
+*
+* Description: This task is internal to uC/OS-III and is triggered by the tick interrupt.
+*
+* Arguments  : p_arg     is an argument passed to the task when the task is created (unused).
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_TickTask (void  *p_arg)
+{
+    OS_ERR   err;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS   ts_delta;
+    CPU_TS   ts_delta_dly;
+    CPU_TS   ts_delta_timeout;
+#endif
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+    OS_TICK  tick_step_dly;
+    OS_TICK  tick_step_timeout;
+#endif
+    OS_TICK  tick_step;
+    CPU_SR_ALLOC();
+
+
+    (void)&p_arg;                                               /* Prevent compiler warning                             */
+
+    while (DEF_ON) {
+        (void)OSTaskSemPend(0u,
+                            OS_OPT_PEND_BLOCKING,
+                            DEF_NULL,
+                            &err);                              /* Wait for signal from tick interrupt                  */
+        if (err == OS_ERR_NONE) {
+            OS_CRITICAL_ENTER();
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+            tick_step = OSTickCtrPend;
+            OSTickCtr += tick_step;
+            OSTickCtrPend = 0;
+#else
+            tick_step = 1u;                                     /* Always tick once when dynamic tick is disabled       */
+            OSTickCtr++;                                        /* Keep track of the number of ticks                    */
+#endif
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+            TRACE_OS_TICK_INCREMENT(OSTickCtr);                 /* Record the event.                                    */
+#endif
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+            ts_delta_dly     = OS_TickListUpdateDly(tick_step);
+            ts_delta_timeout = OS_TickListUpdateTimeout(tick_step);
+            ts_delta         = ts_delta_dly + ts_delta_timeout; /* Compute total execution time of list updates         */
+            if (OSTickTaskTimeMax < ts_delta) {
+                OSTickTaskTimeMax = ts_delta;
+            }
+#else
+            (void)OS_TickListUpdateDly(tick_step);
+            (void)OS_TickListUpdateTimeout(tick_step);
+#endif
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+            tick_step_dly = (OS_TICK)-1;
+            tick_step_timeout = (OS_TICK)-1;
+            if(OSTickListDly.TCB_Ptr != DEF_NULL) {
+                tick_step_dly = OSTickListDly.TCB_Ptr->TickRemain;
+            }
+            if(OSTickListTimeout.TCB_Ptr != DEF_NULL) {
+                tick_step_timeout = OSTickListTimeout.TCB_Ptr->TickRemain;
+            }
+            OSTickCtrStep = (tick_step_dly < tick_step_timeout) ? tick_step_dly : tick_step_timeout;
+            BSP_OS_TickNextSet(OSTickCtrStep);
+#endif
+            OS_CRITICAL_EXIT();
+        }
+    }
+}
+
+/*
+************************************************************************************************************************
+*                                                 INITIALIZE TICK TASK
+*
+* Description: This function is called by OSInit() to create the tick task.
+*
+* Arguments  : p_err   is a pointer to a variable that will hold the value of an error code:
+*
+*                          OS_ERR_TICK_STK_INVALID   if the pointer to the tick task stack is a NULL pointer
+*                          OS_ERR_TICK_STK_SIZE      indicates that the specified stack size
+*                          OS_ERR_PRIO_INVALID       if the priority you specified in the configuration is invalid
+*                                                      (There could be only one task at the Idle Task priority)
+*                                                      (Maybe the priority you specified is higher than OS_CFG_PRIO_MAX-1
+*                          OS_ERR_??                 other error code returned by OSTaskCreate()
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_TickTaskInit (OS_ERR  *p_err)
+{
+    OSTickCtr                    = 0u;                          /* Clear the tick counter                               */
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+    OSTickCtrStep                = (OS_TICK)-1;
+    OSTickCtrPend                = 0u;
+#endif
+
+    OSTickListDly.TCB_Ptr        = DEF_NULL;
+    OSTickListTimeout.TCB_Ptr    = DEF_NULL;
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSTickListDly.NbrEntries     = 0u;
+    OSTickListDly.NbrUpdated     = 0u;
+
+    OSTickListTimeout.NbrEntries = 0u;
+    OSTickListTimeout.NbrUpdated = 0u;
+#endif
+
+                                                                /* --------------- CREATE THE TICK TASK --------------- */
+    if (OSCfg_TickTaskStkBasePtr == DEF_NULL) {
+       *p_err = OS_ERR_TICK_STK_INVALID;
+        return;
+    }
+
+    if (OSCfg_TickTaskStkSize < OSCfg_StkSizeMin) {
+       *p_err = OS_ERR_TICK_STK_SIZE_INVALID;
+        return;
+    }
+
+    if (OSCfg_TickTaskPrio >= (OS_CFG_PRIO_MAX - 1u)) {         /* Only one task at the 'Idle Task' priority            */
+       *p_err = OS_ERR_TICK_PRIO_INVALID;
+        return;
+    }
+
+    OSTaskCreate(&OSTickTaskTCB,
+                 (CPU_CHAR   *)((void *)"uC/OS-III Tick Task"),
+                 OS_TickTask,
+                 DEF_NULL,
+                 OSCfg_TickTaskPrio,
+                 OSCfg_TickTaskStkBasePtr,
+                 OSCfg_TickTaskStkLimit,
+                 OSCfg_TickTaskStkSize,
+                 0u,
+                 0u,
+                 DEF_NULL,
+                 (OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR | OS_OPT_TASK_NO_TLS),
+                 p_err);
+}
+
+/*
+************************************************************************************************************************
+*                                                      INSERT
+*
+* Description: This task is internal to uC/OS-III and allows the insertion of a task in a tick list. 
+*
+* Arguments  : p_list      is a pointer to the desired list
+*
+*              p_tcb       is a pointer to the TCB to insert in the list
+*
+*              time        is the amount of time remaining (in ticks) for the task to become ready
+*
+* Returns    : none
+*
+* Note(s)    : This function is INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+void  OS_TickListInsert (OS_TICK_LIST  *p_list,
+                         OS_TCB        *p_tcb,
+                         OS_TICK        time)
+{
+    OS_TCB  *p_tcb1;
+    OS_TCB  *p_tcb2;
+    OS_TICK  remain;
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+    OS_TICK  tick_step = (OS_TICK)-1;
+#endif
+
+
+    if (p_list->TCB_Ptr == DEF_NULL) {                          /* Is the list empty?                                   */
+        p_tcb->TickRemain  = time;                              /* Yes, Store time in TCB                               */
+        p_tcb->TickNextPtr = DEF_NULL;
+        p_tcb->TickPrevPtr = DEF_NULL;
+        p_tcb->TickListPtr = p_list;                            /* Link to this list                                    */
+        p_list->TCB_Ptr    = p_tcb;                             /* Point to TCB of task to place in the list            */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_list->NbrEntries = 1u;                                /* List contains 1 entry                                */
+#endif
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+        tick_step = time;
+#endif
+    } else {
+        p_tcb1 = p_list->TCB_Ptr;
+        p_tcb2 = p_list->TCB_Ptr;                               /* No,  Insert somewhere in the list in delta order     */
+        remain = time;
+        while (p_tcb2 != DEF_NULL) {
+            if (remain <= p_tcb2->TickRemain) {
+                if (p_tcb2->TickPrevPtr == DEF_NULL) {          /* Insert before the first entry in the list?           */
+                    p_tcb->TickRemain   = remain;               /* Yes, Store remaining time                            */
+                    p_tcb->TickPrevPtr  = DEF_NULL;
+                    p_tcb->TickNextPtr  = p_tcb2;    
+                    p_tcb->TickListPtr  = p_list;               /* Link TCB to this list                                */
+                    p_tcb2->TickRemain -= remain;               /* Reduce time of next entry in the list                */
+                    p_tcb2->TickPrevPtr = p_tcb;
+                    p_list->TCB_Ptr     = p_tcb;                /* Add TCB to the list                                  */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                    p_list->NbrEntries++;                       /* List contains an extra entry                         */
+#endif
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+                    tick_step = remain;
+#endif
+                } else {                                        /* No,  Insert somewhere further in the list            */
+                    p_tcb1              = p_tcb2->TickPrevPtr;
+                    p_tcb->TickRemain   = remain;               /* Store remaining time                                 */
+                    p_tcb->TickPrevPtr  = p_tcb1;
+                    p_tcb->TickNextPtr  = p_tcb2;    
+                    p_tcb->TickListPtr  = p_list;               /* TCB points to this list                              */
+                    p_tcb2->TickRemain -= remain;               /* Reduce time of next entry in the list                */
+                    p_tcb2->TickPrevPtr = p_tcb;
+                    p_tcb1->TickNextPtr = p_tcb;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                    p_list->NbrEntries++;                       /* List contains an extra entry                         */
+#endif
+                }
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+                if (tick_step < OSTickCtrStep) {
+                    OSTickCtrStep = tick_step;
+                    BSP_OS_TickNextSet(tick_step);
+                }
+#endif
+
+                return;
+            } else {
+                remain -= p_tcb2->TickRemain;                   /* Point to the next TCB in the list                    */
+                p_tcb1  = p_tcb2;
+                p_tcb2  = p_tcb2->TickNextPtr;
+            }                 
+        }
+        p_tcb->TickRemain   = remain;                       
+        p_tcb->TickPrevPtr  = p_tcb1;
+        p_tcb->TickNextPtr  = DEF_NULL;
+        p_tcb->TickListPtr  = p_list;                           /* Link the list to the TCB                             */
+        p_tcb1->TickNextPtr = p_tcb;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_list->NbrEntries++;                                   /* List contains an extra entry                         */
+#endif
+    }
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+    if (tick_step < OSTickCtrStep) {
+        OSTickCtrStep = tick_step;
+        BSP_OS_TickNextSet(tick_step);
+    }
+#endif
+}
+
+/*
+************************************************************************************************************************
+*                                            ADD TASK TO DELAYED TICK LIST
+*
+* Description: This function is called to place a task in a list of task waiting for either time to expire 
+*
+* Arguments  : p_tcb          is a pointer to the OS_TCB of the task to add to the tick list
+*              -----
+*
+*              time           represents either the 'match' value of OSTickCtr or a relative time from the current
+*                             value of OSTickCtr as specified by the 'opt' argument..
+*
+*                             relative when 'opt' is set to OS_OPT_TIME_DLY
+*                             relative when 'opt' is set to OS_OPT_TIME_TIMEOUT
+*                             match    when 'opt' is set to OS_OPT_TIME_MATCH
+*                             periodic when 'opt' is set to OS_OPT_TIME_PERIODIC
+*
+*              opt            is an option specifying how to calculate time.  The valid values are:
+*              ---
+*                                 OS_OPT_TIME_DLY
+*                                 OS_OPT_TIME_TIMEOUT
+*                                 OS_OPT_TIME_PERIODIC
+*                                 OS_OPT_TIME_MATCH
+*
+*              p_err          is a pointer to a variable that will contain an error code returned by this function.
+*              -----
+*                                 OS_ERR_NONE           the call was successful and the time delay was scheduled.
+*                                 OS_ERR_TIME_ZERO_DLY  if delay is zero or already occurred.
+*
+* Returns    : None
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+*
+*              2) This function is assumed to be called with interrupts disabled.
+************************************************************************************************************************
+*/
+
+void  OS_TickListInsertDly (OS_TCB   *p_tcb,
+                            OS_TICK   time,
+                            OS_OPT    opt,
+                            OS_ERR   *p_err)
+{
+    OS_TICK   remain;
+    OS_TICK   tick_ctr;
+
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+    tick_ctr = BSP_OS_TickGet();
+#else
+    tick_ctr = OSTickCtr;
+#endif
+
+    if (opt == OS_OPT_TIME_MATCH) {                             /* MATCH to absolute OSTickCtr value mode               */
+        remain = time - tick_ctr;
+        if ((remain > OS_TICK_TH_RDY) ||                        /* If delay already occurred, ...                       */
+            (remain == 0u)) {
+            p_tcb->TickRemain = 0u;
+           *p_err             =  OS_ERR_TIME_ZERO_DLY;          /* ... do NOT delay.                                    */
+            return;
+        }
+
+    } else if (opt == OS_OPT_TIME_PERIODIC) {                   /* PERIODIC mode.                                       */
+        if ((tick_ctr - p_tcb->TickCtrPrev) > time) {
+            remain             = time;                          /* ... first time we load .TickCtrPrev                  */
+            p_tcb->TickCtrPrev = tick_ctr + time;
+        } else {
+            remain = time - (tick_ctr - p_tcb->TickCtrPrev);
+            if ((remain > OS_TICK_TH_RDY) ||                    /* If delay time has already passed, ...                */
+                (remain == 0u)) {
+                p_tcb->TickCtrPrev += time + time * ((tick_ctr - p_tcb->TickCtrPrev) / time); /* Try to recover the period*/
+                p_tcb->TickRemain   = 0u;
+               *p_err               =  OS_ERR_TIME_ZERO_DLY;    /* ... do NOT delay.                                    */
+                return;
+            }
+            p_tcb->TickCtrPrev += time;
+        }
+
+    } else {                                                    /* RELATIVE time delay mode                             */
+        remain = time;
+    }
+
+   *p_err = OS_ERR_NONE;
+
+    p_tcb->TaskState = OS_TASK_STATE_DLY;
+    OS_TickListInsert(&OSTickListDly, p_tcb, remain + (tick_ctr - OSTickCtr));
+}
+
+/*
+************************************************************************************************************************
+*                                         REMOVE A TASK FROM THE TICK LIST
+*
+* Description: This function is called to remove a task from the tick list
+*
+* Arguments  : p_tcb          Is a pointer to the OS_TCB to remove.
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+*
+*              2) This function is assumed to be called with interrupts disabled.
+************************************************************************************************************************
+*/
+
+void  OS_TickListRemove (OS_TCB  *p_tcb)
+{
+    OS_TICK_LIST  *p_list;
+    OS_TCB        *p_tcb1;
+    OS_TCB        *p_tcb2;
+
+
+    p_list = p_tcb->TickListPtr;
+    p_tcb1 = p_tcb->TickPrevPtr;
+    p_tcb2 = p_tcb->TickNextPtr;
+    if (p_tcb1 == DEF_NULL) {
+        if (p_tcb2 == DEF_NULL) {                               /* Remove ONLY entry in the list?                       */
+            p_list->TCB_Ptr    = DEF_NULL;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+            p_list->NbrEntries = 0u;
+#endif
+            p_tcb->TickRemain   = 0u;
+            p_tcb->TickListPtr  = DEF_NULL;
+        } else {
+            p_tcb2->TickPrevPtr = DEF_NULL;
+            p_tcb2->TickRemain += p_tcb->TickRemain;            /* Add back the ticks to the delta                      */
+            p_list->TCB_Ptr    = p_tcb2;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+            p_list->NbrEntries--;
+#endif
+            p_tcb->TickNextPtr  = DEF_NULL;
+            p_tcb->TickRemain   = 0u;
+            p_tcb->TickListPtr  = DEF_NULL;
+        }
+    } else {
+        p_tcb1->TickNextPtr = p_tcb2;    
+        if (p_tcb2 != DEF_NULL) {
+            p_tcb2->TickPrevPtr = p_tcb1;
+            p_tcb2->TickRemain += p_tcb->TickRemain;            /* Add back the ticks to the delta list                 */
+        }
+        p_tcb->TickPrevPtr  = DEF_NULL;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+        p_list->NbrEntries--;
+#endif
+        p_tcb->TickNextPtr  = DEF_NULL;
+        p_tcb->TickRemain   = 0u;
+        p_tcb->TickListPtr  = DEF_NULL;
+    }
+}
+
+/*
+************************************************************************************************************************
+*                                           UPDATE THE LIST OF TASKS DELAYED
+*
+* Description: This function updates the delta list which contains tasks that have been delayed.
+*
+* Arguments  : non
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+static  CPU_TS  OS_TickListUpdateDly (OS_TICK ticks)
+{
+    OS_TCB       *p_tcb;
+    OS_TICK_LIST *p_list;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS        ts_start;
+    CPU_TS        ts_delta_dly;
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_OBJ_QTY    nbr_updated;
+#endif
+                                                                        
+                                                                /*  ========= UPDATE TASKS WAITING FOR DELAY =========  */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts_start    = OS_TS_GET();
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    nbr_updated = (OS_OBJ_QTY)0u;
+#endif
+    p_list      = &OSTickListDly;
+    p_tcb       = p_list->TCB_Ptr;                                      
+    if (p_tcb != DEF_NULL) {
+        if (p_tcb->TickRemain <= ticks) {
+            ticks = ticks - p_tcb->TickRemain;
+            p_tcb->TickRemain = 0u;
+        } else {
+            p_tcb->TickRemain -= ticks;
+        }
+
+        while (p_tcb->TickRemain == 0u) {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+            nbr_updated++;                                      /* Keep track of the number of TCBs updated             */
+#endif
+            if (p_tcb->TaskState == OS_TASK_STATE_DLY) {
+                p_tcb->TaskState = OS_TASK_STATE_RDY;
+                OS_RdyListInsert(p_tcb);                        /* Insert the task in the ready list                    */
+            } else if (p_tcb->TaskState == OS_TASK_STATE_DLY_SUSPENDED) {
+                p_tcb->TaskState = OS_TASK_STATE_SUSPENDED;
+            }
+
+            p_list->TCB_Ptr = p_tcb->TickNextPtr;
+            p_tcb           = p_list->TCB_Ptr;                  /* Get 'p_tcb' again for loop                           */
+            if (p_tcb == DEF_NULL) {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                p_list->NbrEntries = 0u;
+#endif
+                break;
+            } else {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                p_list->NbrEntries--;
+#endif
+                p_tcb->TickPrevPtr = DEF_NULL;
+            }
+
+            if (p_tcb->TickRemain <= ticks) {
+                ticks = ticks - p_tcb->TickRemain;
+                p_tcb->TickRemain = 0u;
+            } else {
+                p_tcb->TickRemain -= ticks;
+            }
+        }
+    }
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_list->NbrUpdated = nbr_updated;
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts_delta_dly       = OS_TS_GET() - ts_start;                /* Measure execution time of the update                 */
+#endif
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    return (ts_delta_dly);
+#else
+    return (0u);
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                       UPDATE THE LIST OF TASKS PENDING WITH TIMEOUT
+*
+* Description: This function updales the delta list which contains tasks that are pending with a timeout.
+*
+* Arguments  : non
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+static  CPU_TS  OS_TickListUpdateTimeout (OS_TICK ticks)
+{
+    OS_TCB       *p_tcb;
+    OS_TICK_LIST *p_list;
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS        ts_start;
+    CPU_TS        ts_delta_timeout;
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_OBJ_QTY    nbr_updated;
+#endif
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    OS_TCB       *p_tcb_owner;
+    OS_PRIO       prio_new;
+#endif
+
+                                                                /*  ======= UPDATE TASKS WAITING WITH TIMEOUT ========  */
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts_start    = OS_TS_GET();
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    nbr_updated = 0u;
+#endif
+    p_list      = &OSTickListTimeout;
+    p_tcb       = p_list->TCB_Ptr;                                  
+    if (p_tcb != DEF_NULL) {
+#if 0
+        p_tcb->TickRemain--;
+#else
+        if (p_tcb->TickRemain <= ticks) {
+            ticks = ticks - p_tcb->TickRemain;
+            p_tcb->TickRemain = 0u;
+        } else {
+            p_tcb->TickRemain -= ticks;
+        }
+#endif
+        while (p_tcb->TickRemain == 0u) {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+            nbr_updated++;
+#endif
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+            p_tcb_owner = DEF_NULL;
+            if (p_tcb->PendOn == OS_TASK_PEND_ON_MUTEX) {
+                p_tcb_owner = ((OS_MUTEX *)p_tcb->PendDataTblPtr->PendObjPtr)->OwnerTCBPtr;
+            }
+#endif
+
+#if (OS_MSG_EN == DEF_ENABLED)
+            p_tcb->MsgPtr  = DEF_NULL;
+            p_tcb->MsgSize = 0u;
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+            p_tcb->TS      = OS_TS_GET();
+#endif
+            OS_PendListRemove(p_tcb);                           /* Remove from wait list                                */
+            if (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT) {
+                OS_RdyListInsert(p_tcb);                        /* Insert the task in the ready list                    */
+                p_tcb->TaskState  = OS_TASK_STATE_RDY;
+            } else if (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED) {
+
+                p_tcb->TaskState  = OS_TASK_STATE_SUSPENDED;
+            }
+            p_tcb->PendStatus = OS_STATUS_PEND_TIMEOUT;         /* Indicate pend timed out                              */
+            p_tcb->PendOn     = OS_TASK_PEND_ON_NOTHING;        /* Indicate no longer pending                           */
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+            if(p_tcb_owner != DEF_NULL) {
+                if ((p_tcb_owner->Prio != p_tcb_owner->BasePrio) &&
+                    (p_tcb_owner->Prio == p_tcb->Prio)) {       /* Has the owner inherited a priority?                  */
+                    prio_new = OS_MutexGrpPrioFindHighest(p_tcb_owner);
+                    prio_new = prio_new > p_tcb_owner->BasePrio ? p_tcb_owner->BasePrio : prio_new;
+                    if(prio_new != p_tcb_owner->Prio) {
+                        OS_TaskChangePrio(p_tcb_owner, prio_new);
+            #if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+                                      TRACE_OS_MUTEX_TASK_PRIO_DISINHERIT(p_tcb_owner, p_tcb_owner->Prio)
+            #endif
+                    }
+                }
+            }
+#endif
+
+            p_list->TCB_Ptr = p_tcb->TickNextPtr;
+            p_tcb           = p_list->TCB_Ptr;                  /* Get 'p_tcb' again for loop                           */
+            if (p_tcb == DEF_NULL) {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                p_list->NbrEntries = 0u;
+#endif
+                break;
+            } else {
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                p_list->NbrEntries--;
+#endif
+                p_tcb->TickPrevPtr = DEF_NULL;
+            }
+            if (p_tcb->TickRemain <= ticks) {
+                ticks = ticks - p_tcb->TickRemain;
+                p_tcb->TickRemain = 0u;
+            } else {
+                p_tcb->TickRemain -= ticks;
+            }
+        }
+    }
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_list->NbrUpdated = nbr_updated;
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    ts_delta_timeout   = OS_TS_GET() - ts_start;                /* Measure execution time of the update                 */
+#endif
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    return (ts_delta_timeout);
+#else
+    return (0u);
+#endif
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_time.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_time.c
new file mode 100644
index 0000000..bbf9f24
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_time.c
@@ -0,0 +1,666 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                   TIME MANAGEMENT
+*
+* File    : OS_TIME.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_time__c = "$Id: $";
+#endif
+
+/*
+************************************************************************************************************************
+*                                                  DELAY TASK 'n' TICKS
+*
+* Description: This function is called to delay execution of the currently running task until the specified number of
+*              system ticks expires.  This, of course, directly equates to delaying the current task for some time to
+*              expire.  No delay will result if the specified delay is 0.  If the specified delay is greater than 0
+*              then, a context switch will result.
+*
+* Arguments  : dly       is a value in 'clock ticks' that the task will either delay for or, the target match value
+*                        of the tick counter (OSTickCtr).  Note that specifying 0 means the task is not to delay.
+*
+*                        depending on the option argument, the task will wake up when OSTickCtr reaches:
+*
+*                            OS_OPT_TIME_DLY      : OSTickCtr + dly
+*                            OS_OPT_TIME_TIMEOUT  : OSTickCtr + dly
+*                            OS_OPT_TIME_MATCH    : dly
+*                            OS_OPT_TIME_PERIODIC : OSTCBCurPtr.TickCtrPrev + dly
+*
+*              opt       specifies whether 'dly' represents absolute or relative time; default option marked with *** :
+*
+*                        *** OS_OPT_TIME_DLY        specifies a relative time from the current value of OSTickCtr.
+*                            OS_OPT_TIME_TIMEOUT    same as OS_OPT_TIME_DLY.
+*                            OS_OPT_TIME_MATCH      indicates that 'dly' specifies the absolute value that OSTickCtr
+*                                                   must reach before the task will be resumed.
+*                            OS_OPT_TIME_PERIODIC   indicates that 'dly' specifies the periodic value that OSTickCtr
+*                                                   must reach before the task will be resumed.
+*
+*              p_err     is a pointer to a variable that will contain an error code from this call.
+*
+*                            OS_ERR_NONE              The call was successful and the delay occurred
+*                            OS_ERR_OPT_INVALID       If you specified an invalid option for this function
+*                            OS_ERR_OS_NOT_RUNNING    If uC/OS-III is not running yet
+*                            OS_ERR_SCHED_LOCKED      Can't delay when the scheduler is locked
+*                            OS_ERR_TIME_DLY_ISR      If you called this function from an ISR
+*                            OS_ERR_TIME_ZERO_DLY     If you specified a delay of zero
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSTimeDly (OS_TICK   dly,
+                 OS_OPT    opt,
+                 OS_ERR   *p_err)
+{
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    CPU_SR_ALLOC();
+#endif
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+       *p_err = OS_ERR_TIME_DLY_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+    if (OSSchedLockNestingCtr > 0u) {                           /* Can't delay when the scheduler is locked             */
+       *p_err = OS_ERR_SCHED_LOCKED;
+        return;
+    }
+
+    switch (opt) {
+        case OS_OPT_TIME_DLY:
+        case OS_OPT_TIME_TIMEOUT:
+        case OS_OPT_TIME_PERIODIC:
+             if (dly == 0u) {                                   /* 0 means no delay!                                    */
+                *p_err = OS_ERR_TIME_ZERO_DLY;
+                 return;
+             }
+             break;
+
+        case OS_OPT_TIME_MATCH:
+             break;
+
+        default:
+            *p_err = OS_ERR_OPT_INVALID;
+             return;
+    }
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    OS_CRITICAL_ENTER();
+    OS_TickListInsertDly(OSTCBCurPtr,
+                         dly,
+                         opt,
+                         p_err);
+    if (*p_err != OS_ERR_NONE) {
+         OS_CRITICAL_EXIT_NO_SCHED();
+         return;
+    }
+
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+    TRACE_OS_TASK_DLY(dly);                                     /* Record the event.                                    */
+#endif
+    OS_RdyListRemove(OSTCBCurPtr);                              /* Remove current task from ready list                  */
+    OS_CRITICAL_EXIT_NO_SCHED();
+    OSSched();                                                  /* Find next task to run!                               */
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                             DELAY TASK FOR SPECIFIED TIME
+*
+* Description: This function is called to delay execution of the currently running task until some time expires.  This
+*              call allows you to specify the delay time in HOURS, MINUTES, SECONDS and MILLISECONDS instead of ticks.
+*
+* Arguments  : hours     specifies the number of hours that the task will be delayed (max. is 999 if the tick rate is
+*                        1000 Hz or less otherwise, a higher value would overflow a 32-bit unsigned counter).
+*
+*              minutes   specifies the number of minutes (max. 59 if 'opt' is OS_OPT_TIME_HMSM_STRICT)
+*
+*              seconds   specifies the number of seconds (max. 59 if 'opt' is OS_OPT_TIME_HMSM_STRICT)
+*
+*              milli     specifies the number of milliseconds (max. 999 if 'opt' is OS_OPT_TIME_HMSM_STRICT)
+*
+*              opt       specifies time delay bit-field options logically OR'd; default options marked with *** :
+*
+*                        *** OS_OPT_TIME_DLY        specifies a relative time from the current value of OSTickCtr.
+*                            OS_OPT_TIME_TIMEOUT    same as OS_OPT_TIME_DLY.
+*                            OS_OPT_TIME_MATCH      indicates that the delay specifies the absolute value that OSTickCtr
+*                                                   must reach before the task will be resumed.
+*                            OS_OPT_TIME_PERIODIC   indicates that the delay specifies the periodic value that OSTickCtr
+*                                                   must reach before the task will be resumed.
+*
+*                        *** OS_OPT_TIME_HMSM_STRICT            strictly allow only hours        (0...99)
+*                                                                                   minutes      (0...59)
+*                                                                                   seconds      (0...59)
+*                                                                                   milliseconds (0...999)
+*                            OS_OPT_TIME_HMSM_NON_STRICT        allow any value of  hours        (0...999)
+*                                                                                   minutes      (0...9999)
+*                                                                                   seconds      (0...65535)
+*                                                                                   milliseconds (0...4294967295)
+*
+*              p_err     is a pointer to a variable that will receive an error code from this call.
+*
+*                            OS_ERR_NONE                        If the function returns from the desired delay
+*                            OS_ERR_OPT_INVALID                 If you specified an invalid option for 'opt'
+*                            OS_ERR_OS_NOT_RUNNING              If uC/OS-III is not running yet
+*                            OS_ERR_SCHED_LOCKED                Can't delay when the scheduler is locked
+*                            OS_ERR_TIME_DLY_ISR                If called from an ISR
+*                            OS_ERR_TIME_INVALID_HOURS          If you didn't specify a valid value for 'hours'
+*                            OS_ERR_TIME_INVALID_MINUTES        If you didn't specify a valid value for 'minutes'
+*                            OS_ERR_TIME_INVALID_SECONDS        If you didn't specify a valid value for 'seconds'
+*                            OS_ERR_TIME_INVALID_MILLISECONDS   If you didn't specify a valid value for 'milli'
+*                            OS_ERR_TIME_ZERO_DLY               If hours, minutes, seconds and milli are all 0
+*
+* Returns    : none
+*
+* Note(s)    : 1) The resolution on the milliseconds depends on the tick rate.  For example, you can't do a 10 mS delay
+*                 if the ticker interrupts every 100 mS.  In this case, the delay would be set to 0.  The actual delay
+*                 is rounded to the nearest tick.
+*
+*              2) Although this function allows you to delay a task for many, many hours, it's not recommended to put
+*                 a task to sleep for that long.
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TIME_DLY_HMSM_EN == DEF_ENABLED)
+void  OSTimeDlyHMSM (CPU_INT16U   hours,
+                     CPU_INT16U   minutes,
+                     CPU_INT16U   seconds,
+                     CPU_INT32U   milli,
+                     OS_OPT       opt,
+                     OS_ERR      *p_err)
+{
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    CPU_BOOLEAN  opt_invalid;
+    CPU_BOOLEAN  opt_non_strict;
+#endif
+    OS_OPT       opt_time;
+    OS_RATE_HZ   tick_rate;
+    OS_TICK      ticks;
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    CPU_SR_ALLOC();
+#endif
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+       *p_err = OS_ERR_TIME_DLY_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+    if (OSSchedLockNestingCtr > 0u) {                           /* Can't delay when the scheduler is locked             */
+       *p_err = OS_ERR_SCHED_LOCKED;
+        return;
+    }
+
+    opt_time = opt & OS_OPT_TIME_MASK;                          /* Retrieve time options only.                          */
+    switch (opt_time) {
+        case OS_OPT_TIME_DLY:
+        case OS_OPT_TIME_TIMEOUT:
+        case OS_OPT_TIME_PERIODIC:
+             if (milli == 0u) {                                 /* Make sure we didn't specify a 0 delay                */
+                 if (seconds == 0u) {
+                     if (minutes == 0u) {
+                         if (hours == 0u) {
+                            *p_err = OS_ERR_TIME_ZERO_DLY;
+                             return;
+                         }
+                     }
+                 }
+             }
+             break;
+
+        case OS_OPT_TIME_MATCH:
+             break;
+
+        default:
+            *p_err = OS_ERR_OPT_INVALID;
+             return;
+    }
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)                          /* Validate arguments to be within range                */
+    opt_invalid = DEF_BIT_IS_SET_ANY(opt, ~OS_OPT_TIME_OPTS_MASK);
+    if (opt_invalid == DEF_YES) {
+       *p_err = OS_ERR_OPT_INVALID;
+        return;
+    }
+
+    opt_non_strict = DEF_BIT_IS_SET(opt, OS_OPT_TIME_HMSM_NON_STRICT);
+    if (opt_non_strict != DEF_YES) {
+         if (milli   > 999u) {
+            *p_err = OS_ERR_TIME_INVALID_MILLISECONDS;
+             return;
+         }
+         if (seconds > 59u) {
+            *p_err = OS_ERR_TIME_INVALID_SECONDS;
+             return;
+         }
+         if (minutes > 59u) {
+            *p_err = OS_ERR_TIME_INVALID_MINUTES;
+             return;
+         }
+         if (hours   > 99u) {
+            *p_err = OS_ERR_TIME_INVALID_HOURS;
+             return;
+         }
+    } else {
+         if (minutes > 9999u) {
+            *p_err = OS_ERR_TIME_INVALID_MINUTES;
+             return;
+         }
+         if (hours   > 999u) {
+            *p_err = OS_ERR_TIME_INVALID_HOURS;
+             return;
+         }
+    }
+#endif
+
+                                                                /* Compute the total number of clock ticks required..   */
+                                                                /* .. (rounded to the nearest tick)                     */
+    tick_rate = OSCfg_TickRate_Hz;
+    ticks     = ((OS_TICK)hours * (OS_TICK)3600u + (OS_TICK)minutes * (OS_TICK)60u + (OS_TICK)seconds) * tick_rate
+              + (tick_rate * ((OS_TICK)milli + (OS_TICK)500u / tick_rate)) / (OS_TICK)1000u;
+
+    if (ticks > 0u) {
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+        OS_CRITICAL_ENTER();
+        OS_TickListInsertDly(OSTCBCurPtr,
+                             ticks,
+                             opt_time,
+                             p_err);
+        if (*p_err != OS_ERR_NONE) {
+             OS_CRITICAL_EXIT_NO_SCHED();
+             return;
+        }
+#if (defined(TRACE_CFG_EN) && (TRACE_CFG_EN == DEF_ENABLED))
+        TRACE_OS_TASK_DLY(ticks);                               /* Record the event.                                    */
+#endif
+        OS_RdyListRemove(OSTCBCurPtr);                          /* Remove current task from ready list                  */
+        OS_CRITICAL_EXIT_NO_SCHED();
+        OSSched();                                              /* Find next task to run!                               */
+#endif
+       *p_err = OS_ERR_NONE;
+    } else {
+       *p_err = OS_ERR_TIME_ZERO_DLY;
+    }
+}
+#endif
+
+/*
+************************************************************************************************************************
+*                                                RESUME A DELAYED TASK
+*
+* Description: This function is used resume a task that has been delayed through a call to either OSTimeDly() or
+*              OSTimeDlyHMSM().  Note that you cannot call this function to resume a task that is waiting for an event
+*              with timeout.
+*
+* Arguments  : p_tcb    is a pointer to the TCB of the task to resume.
+*
+*              p_err    is a pointer to a variable that will receive an error code
+*
+*                           OS_ERR_NONE                  Task has been resumed
+*                           OS_ERR_OS_NOT_RUNNING        If uC/OS-III is not running yet
+*                           OS_ERR_STATE_INVALID         Task is in an invalid state
+*                           OS_ERR_TASK_NOT_DLY          Task is not waiting for time to expire
+*                           OS_ERR_TASK_SUSPENDED        Task cannot be resumed, it was suspended by OSTaskSuspend()
+*                           OS_ERR_TCB_INVALID           If 'p_tcb' is a NULL pointer
+*                           OS_ERR_TIME_DLY_RESUME_ISR   If called from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TIME_DLY_RESUME_EN == DEF_ENABLED)
+void  OSTimeDlyResume (OS_TCB  *p_tcb,
+                       OS_ERR  *p_err)
+{
+    CPU_SR_ALLOC();
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* Not allowed to call from an ISR                      */
+       *p_err = OS_ERR_TIME_DLY_RESUME_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)                          /* ---------------- VALIDATE ARGUMENTS ---------------- */
+    if (p_tcb == DEF_NULL) {                                    /* User must supply a valid OS_TCB                      */
+       *p_err = OS_ERR_TCB_INVALID;
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+    CPU_CRITICAL_ENTER();
+    switch (p_tcb->TaskState) {
+        case OS_TASK_STATE_RDY:                                 /* Cannot Abort delay if task is ready                  */
+        case OS_TASK_STATE_PEND:
+        case OS_TASK_STATE_PEND_TIMEOUT:
+        case OS_TASK_STATE_SUSPENDED:
+        case OS_TASK_STATE_PEND_SUSPENDED:
+        case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED:
+             CPU_CRITICAL_EXIT();
+            *p_err = OS_ERR_TASK_NOT_DLY;
+             break;
+
+        case OS_TASK_STATE_DLY:
+             OS_CRITICAL_ENTER_CPU_EXIT();
+             p_tcb->TaskState = OS_TASK_STATE_RDY;
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             OS_TickListRemove(p_tcb);                          /* Remove task from tick list                           */
+             OS_RdyListInsert(p_tcb);                           /* Add to ready list                                    */
+#endif
+             OS_CRITICAL_EXIT_NO_SCHED();
+            *p_err = OS_ERR_NONE;
+             break;
+
+        case OS_TASK_STATE_DLY_SUSPENDED:
+             OS_CRITICAL_ENTER_CPU_EXIT();
+             p_tcb->TaskState = OS_TASK_STATE_SUSPENDED;
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+             OS_TickListRemove(p_tcb);                          /* Remove task from tick list                           */
+#endif
+             OS_CRITICAL_EXIT_NO_SCHED();
+            *p_err            = OS_ERR_TASK_SUSPENDED;
+             break;
+
+        default:
+             CPU_CRITICAL_EXIT();
+            *p_err = OS_ERR_STATE_INVALID;
+             break;
+    }
+
+    OSSched();
+}
+#endif
+
+/*
+************************************************************************************************************************
+*                                               GET CURRENT SYSTEM TIME
+*
+* Description: This function is used by your application to obtain the current value of the counter which keeps track of
+*              the number of clock ticks.
+*
+* Arguments  : p_err    is a pointer to a variable that will receive an error code
+*
+*                           OS_ERR_NONE           If the call was successful
+*
+* Returns    : The current value of OSTickCtr
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+OS_TICK  OSTimeGet (OS_ERR  *p_err)
+{
+    OS_TICK  ticks;
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    CPU_SR_ALLOC();
+#endif
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    CPU_CRITICAL_ENTER();
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+    if (OSRunning == OS_STATE_OS_RUNNING) {
+        ticks = BSP_OS_TickGet();
+    } else {
+        ticks = OSTickCtr;
+    }
+#else
+    ticks = OSTickCtr;
+#endif
+    CPU_CRITICAL_EXIT();
+#else
+    ticks = 0u;
+#endif
+
+
+   *p_err = OS_ERR_NONE;
+    return (ticks);
+}
+
+/*
+************************************************************************************************************************
+*                                                   SET SYSTEM CLOCK
+*
+* Description: This function sets the counter which keeps track of the number of clock ticks.
+*
+* Arguments  : ticks    is the desired tick value
+*
+*              p_err    is a pointer to a variable that will receive an error code
+*
+*                           OS_ERR_NONE           If the call was successful
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSTimeSet (OS_TICK   ticks,
+                 OS_ERR   *p_err)
+{
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    CPU_SR_ALLOC();
+#endif
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+    CPU_CRITICAL_ENTER();
+    OSTickCtr = ticks;
+    CPU_CRITICAL_EXIT();
+#endif
+
+   *p_err     = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                                 PROCESS SYSTEM TICK
+*
+* Description: This function is used to signal to uC/OS-III the occurrence of a 'system tick' (also known as a
+*              'clock tick').  This function should be called by the tick ISR.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+void  OSTimeTick (void)
+{
+#if ((OS_CFG_TASK_TICK_EN == DEF_ENABLED) || (OS_CFG_TMR_EN == DEF_ENABLED))
+    OS_ERR  err;
+#endif
+#if ((OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED) && (OS_CFG_TASK_TICK_EN == DEF_ENABLED))
+    CPU_TS  ts;
+#endif
+
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+        return;
+    }
+
+    OSTimeTickHook();                                           /* Call user definable hook                             */
+
+#if (OS_CFG_TASK_TICK_EN == DEF_ENABLED)
+#if (OS_CFG_ISR_POST_DEFERRED_EN == DEF_ENABLED)
+
+    ts = OS_TS_GET();                                           /* Get timestamp                                        */
+    OS_IntQPost(OS_OBJ_TYPE_TICK,                               /* Post to ISR queue                                    */
+                (void      *)&OSRdyList[OSPrioCur],
+                DEF_NULL,
+                0u,
+                0u,
+                0u,
+                ts,
+                &err);
+
+#else
+
+   (void)OSTaskSemPost(&OSTickTaskTCB,                          /* Signal tick task                                     */
+                        OS_OPT_POST_NONE,
+                       &err);
+
+   (void)err;
+
+#if (OS_CFG_SCHED_ROUND_ROBIN_EN == DEF_ENABLED)
+    OS_SchedRoundRobin(&OSRdyList[OSPrioCur]);
+#endif
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+    OSTmrUpdateCtr--;
+    if (OSTmrUpdateCtr == 0u) {
+        OSTmrUpdateCtr = OSTmrUpdateCnt;
+        (void)OSTaskSemPost(&OSTmrTaskTCB,                      /* Signal timer task                                    */
+                             OS_OPT_POST_NONE,
+                            &err);
+        (void)err;
+    }
+#endif
+#endif
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                             PROCESS SYSTEM TICK (DYNAMIC)
+*
+* Description: This function is used to signal to uC/OS-III the occurrence of a 'system tick' (also known as a
+*              'clock tick').  This function should be called by the tick ISR.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+void OSTimeDynTick (OS_TICK ticks)
+{
+    OS_ERR  err;
+    CPU_SR_ALLOC();
+
+
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+        return;
+    }
+
+    OSTimeTickHook();
+
+    CPU_CRITICAL_ENTER();
+    OSTickCtrPend += ticks;
+    CPU_CRITICAL_EXIT();
+
+    (void)OSTaskSemPost(&OSTickTaskTCB,                          /* Signal tick task                                     */
+                         OS_OPT_POST_NONE,
+                        &err);
+
+}
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_tmr.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_tmr.c
new file mode 100644
index 0000000..610c7c2
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_tmr.c
@@ -0,0 +1,1291 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                   TIMER MANAGEMENT
+*
+* File    : OS_TMR.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_tmr__c = "$Id: $";
+#endif
+
+
+#if (OS_CFG_TMR_EN == DEF_ENABLED)
+/*
+************************************************************************************************************************
+*                                               LOCAL FUNCTION PROTOTYPES
+************************************************************************************************************************
+*/
+
+static  void  OS_TmrLock   (void);
+static  void  OS_TmrUnlock (void);
+
+
+/*
+************************************************************************************************************************
+*                                                   CREATE A TIMER
+*
+* Description: This function is called by your application code to create a timer.
+*
+* Arguments  : p_tmr           Is a pointer to a timer control block
+*
+*              p_name          Is a pointer to an ASCII string that is used to name the timer.  Names are useful for
+*                              debugging.
+*
+*              dly             Initial delay.
+*                              If the timer is configured for ONE-SHOT mode, this is the timeout used
+*                              If the timer is configured for PERIODIC mode, this is the first timeout to wait for
+*                              before the timer starts entering periodic mode
+*
+*              period          The 'period' being repeated for the timer.
+*                              If you specified 'OS_OPT_TMR_PERIODIC' as an option, when the timer expires, it will
+*                              automatically restart with the same period.
+*
+*              opt             Specifies either:
+*
+*                                  OS_OPT_TMR_ONE_SHOT       The timer counts down only once
+*                                  OS_OPT_TMR_PERIODIC       The timer counts down and then reloads itself
+*
+*              p_callback      Is a pointer to a callback function that will be called when the timer expires.  The
+*                              callback function must be declared as follows:
+*
+*                                  void  MyCallback (OS_TMR *p_tmr, void *p_arg);
+*
+*              p_callback_arg  Is an argument (a pointer) that is passed to the callback function when it is called.
+*
+*              p_err           Is a pointer to an error code.  '*p_err' will contain one of the following:
+*
+*                                 OS_ERR_NONE                    The call succeeded
+*                                 OS_ERR_ILLEGAL_CREATE_RUN_TIME If you are trying to create the timer after you called
+*                                                                  OSStart()
+*                                 OS_ERR_OBJ_PTR_NULL            Is 'p_tmr' is a NULL pointer
+*                                 OS_ERR_OPT_INVALID             You specified an invalid option
+*                                 OS_ERR_TMR_INVALID_CALLBACK    You specified an invalid callback for a periodic timer
+*                                 OS_ERR_TMR_INVALID_DLY         You specified an invalid delay
+*                                 OS_ERR_TMR_INVALID_PERIOD      You specified an invalid period
+*                                 OS_ERR_TMR_ISR                 If the call was made from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function only creates the timer.  In other words, the timer is not started when created.  To
+*                 start the timer, call OSTmrStart().
+************************************************************************************************************************
+*/
+
+void  OSTmrCreate (OS_TMR               *p_tmr,
+                   CPU_CHAR             *p_name,
+                   OS_TICK               dly,
+                   OS_TICK               period,
+                   OS_OPT                opt,
+                   OS_TMR_CALLBACK_PTR   p_callback,
+                   void                 *p_callback_arg,
+                   OS_ERR               *p_err)
+{
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_CREATE_RUN_TIME;
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if trying to call from an ISR                    */
+       *p_err = OS_ERR_TMR_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_tmr == DEF_NULL) {                                    /* Validate 'p_tmr'                                     */
+       *p_err = OS_ERR_OBJ_PTR_NULL;
+        return;
+    }
+
+    switch (opt) {
+        case OS_OPT_TMR_PERIODIC:
+             if (period == 0u) {
+                *p_err = OS_ERR_TMR_INVALID_PERIOD;
+                 return;
+             }
+
+             if (p_callback == DEF_NULL) {                      /* No point in a periodic timer without a callback      */
+                *p_err = OS_ERR_TMR_INVALID_CALLBACK;
+                 return;
+             }
+             break;
+
+        case OS_OPT_TMR_ONE_SHOT:
+             if (dly == 0u) {
+                *p_err = OS_ERR_TMR_INVALID_DLY;
+                 return;
+             }
+             break;
+
+        default:
+            *p_err = OS_ERR_OPT_INVALID;
+             return;
+    }
+#endif
+
+    if (OSRunning == OS_STATE_OS_RUNNING) {                     /* Only lock when the kernel is running                 */
+        OS_TmrLock();
+    }
+
+    p_tmr->State          = OS_TMR_STATE_STOPPED;               /* Initialize the timer fields                          */
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_tmr->Type           = OS_OBJ_TYPE_TMR;
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_tmr->NamePtr        = p_name;
+#else
+    (void)&p_name;
+#endif
+    p_tmr->Dly            = dly;
+    p_tmr->Remain         = 0u;
+    p_tmr->Period         = period;
+    p_tmr->Opt            = opt;
+    p_tmr->CallbackPtr    = p_callback;
+    p_tmr->CallbackPtrArg = p_callback_arg;
+    p_tmr->NextPtr        = DEF_NULL;
+    p_tmr->PrevPtr        = DEF_NULL;
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_TmrDbgListAdd(p_tmr);
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSTmrQty++;                                                 /* Keep track of the number of timers created           */
+#endif
+
+    if (OSRunning == OS_STATE_OS_RUNNING) {
+        OS_TmrUnlock();
+    }
+
+   *p_err = OS_ERR_NONE;
+}
+
+
+/*
+************************************************************************************************************************
+*                                                   DELETE A TIMER
+*
+* Description: This function is called by your application code to delete a timer.
+*
+* Arguments  : p_tmr          Is a pointer to the timer to stop and delete.
+*
+*              p_err          Is a pointer to an error code.  '*p_err' will contain one of the following:
+*
+*                                 OS_ERR_NONE                    The call succeeded
+*                                 OS_ERR_ILLEGAL_DEL_RUN_TIME    If you are trying to delete the timer after you called
+*                                                                  OSStart()
+*                                 OS_ERR_OBJ_TYPE                If 'p_tmr' is not pointing to a timer
+*                                 OS_ERR_OS_NOT_RUNNING          If uC/OS-III is not running yet
+*                                 OS_ERR_TMR_INACTIVE            If the timer was not created
+*                                 OS_ERR_TMR_INVALID             If 'p_tmr' is a NULL pointer
+*                                 OS_ERR_TMR_INVALID_STATE       The timer is in an invalid state
+*                                 OS_ERR_TMR_ISR                 If the function was called from an ISR
+*
+* Returns    : DEF_TRUE   if the timer was deleted
+*              DEF_FALSE  if not or upon an error
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+#if (OS_CFG_TMR_DEL_EN == DEF_ENABLED)
+CPU_BOOLEAN  OSTmrDel (OS_TMR  *p_tmr,
+                       OS_ERR  *p_err)
+{
+    CPU_BOOLEAN  success;
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (DEF_FALSE);
+    }
+#endif
+
+#ifdef OS_SAFETY_CRITICAL_IEC61508
+    if (OSSafetyCriticalStartFlag == DEF_TRUE) {
+       *p_err = OS_ERR_ILLEGAL_DEL_RUN_TIME;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if trying to call from an ISR                    */
+       *p_err  = OS_ERR_TMR_ISR;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_tmr == DEF_NULL) {
+       *p_err = OS_ERR_TMR_INVALID;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_tmr->Type != OS_OBJ_TYPE_TMR) {                       /* Make sure timer was created                          */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (DEF_FALSE);
+    }
+#endif
+
+    OS_TmrLock();
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OS_TmrDbgListRemove(p_tmr);
+#endif
+
+    switch (p_tmr->State) {
+        case OS_TMR_STATE_RUNNING:
+             OS_TmrUnlink(p_tmr);                               /* Remove from the list                                 */
+             OS_TmrClr(p_tmr);
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+             OSTmrQty--;                                        /* One less timer                                       */
+#endif
+            *p_err   = OS_ERR_NONE;
+             success = DEF_TRUE;
+             break;
+
+        case OS_TMR_STATE_STOPPED:                              /* Timer has not started or ...                         */
+        case OS_TMR_STATE_COMPLETED:                            /* ... timer has completed the ONE-SHOT time            */
+             OS_TmrClr(p_tmr);                                  /* Clear timer fields                                   */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+             OSTmrQty--;                                        /* One less timer                                       */
+#endif
+            *p_err   = OS_ERR_NONE;
+             success = DEF_TRUE;
+             break;
+
+        case OS_TMR_STATE_UNUSED:                               /* Already deleted                                      */
+            *p_err   = OS_ERR_TMR_INACTIVE;
+             success = DEF_FALSE;
+             break;
+
+        default:
+            *p_err   = OS_ERR_TMR_INVALID_STATE;
+             success = DEF_FALSE;
+             break;
+    }
+
+    OS_TmrUnlock();
+
+    return (success);
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                    GET HOW MUCH TIME IS LEFT BEFORE A TIMER EXPIRES
+*
+* Description: This function is called to get the number of ticks before a timer times out.
+*
+* Arguments  : p_tmr    Is a pointer to the timer to obtain the remaining time from.
+*
+*              p_err    Is a pointer to an error code.  '*p_err' will contain one of the following:
+*
+*                           OS_ERR_NONE               The call succeeded
+*                           OS_ERR_OBJ_TYPE           If 'p_tmr' is not pointing to a timer
+*                           OS_ERR_OS_NOT_RUNNING     If uC/OS-III is not running yet
+*                           OS_ERR_TMR_INACTIVE       If 'p_tmr' points to a timer that is not active
+*                           OS_ERR_TMR_INVALID        If 'p_tmr' is a NULL pointer
+*                           OS_ERR_TMR_INVALID_STATE  The timer is in an invalid state
+*                           OS_ERR_TMR_ISR            If the call was made from an ISR
+*
+* Returns    : The time remaining for the timer to expire.  The time represents 'timer' increments.  In other words, if
+*              OS_TmrTask() is signaled every 1/10 of a second then the returned value represents the number of 1/10 of
+*              a second remaining before the timer expires.
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+OS_TICK  OSTmrRemainGet (OS_TMR  *p_tmr,
+                         OS_ERR  *p_err)
+{
+    OS_TICK  remain;
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if trying to call from an ISR                    */
+       *p_err = OS_ERR_TMR_ISR;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_tmr == DEF_NULL) {
+       *p_err = OS_ERR_TMR_INVALID;
+        return (0u);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_tmr->Type != OS_OBJ_TYPE_TMR) {                       /* Make sure timer was created                          */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (0u);
+    }
+#endif
+
+    OS_TmrLock();
+
+    switch (p_tmr->State) {
+        case OS_TMR_STATE_RUNNING:
+             remain = p_tmr->Remain;
+            *p_err  = OS_ERR_NONE;
+             break;
+
+        case OS_TMR_STATE_STOPPED:                              /* It's assumed that the timer has not started yet      */
+             if (p_tmr->Opt == OS_OPT_TMR_PERIODIC) {
+                 if (p_tmr->Dly == 0u) {
+                     remain = p_tmr->Period;
+                 } else {
+                     remain = p_tmr->Dly;
+                 }
+             } else {
+                 remain = p_tmr->Dly;
+             }
+            *p_err = OS_ERR_NONE;
+             break;
+
+        case OS_TMR_STATE_COMPLETED:                            /* Only ONE-SHOT that timed out can be in this state    */
+            *p_err  = OS_ERR_NONE;
+             remain = 0u;
+             break;
+
+        case OS_TMR_STATE_UNUSED:
+            *p_err  = OS_ERR_TMR_INACTIVE;
+             remain = 0u;
+             break;
+
+        default:
+            *p_err = OS_ERR_TMR_INVALID_STATE;
+             remain = 0u;
+             break;
+    }
+
+    OS_TmrUnlock();
+
+    return (remain);
+}
+
+
+/*
+************************************************************************************************************************
+*                                                    SET A TIMER
+*
+* Description: This function is called by your application code to set a timer.
+*
+* Arguments  : p_tmr           Is a pointer to a timer control block
+*
+*              dly             Initial delay.
+*                              If the timer is configured for ONE-SHOT mode, this is the timeout used
+*                              If the timer is configured for PERIODIC mode, this is the first timeout to wait for
+*                              before the timer starts entering periodic mode
+*
+*              period          The 'period' being repeated for the timer.
+*                              If you specified 'OS_OPT_TMR_PERIODIC' as an option, when the timer expires, it will
+*                              automatically restart with the same period.
+*
+*              p_callback      Is a pointer to a callback function that will be called when the timer expires.  The
+*                              callback function must be declared as follows:
+*
+*                                  void  MyCallback (OS_TMR *p_tmr, void *p_arg);
+*
+*              p_callback_arg  Is an argument (a pointer) that is passed to the callback function when it is called.
+*
+*              p_err           Is a pointer to an error code.  '*p_err' will contain one of the following:
+*
+*                                 OS_ERR_NONE                    The timer was configured as expected
+*                                 OS_ERR_OBJ_TYPE                If the object type is invalid
+*                                 OS_ERR_OS_NOT_RUNNING          If uC/OS-III is not running yet
+*                                 OS_ERR_TMR_INVALID             If 'p_tmr' is a NULL pointer or invalid option
+*                                 OS_ERR_TMR_INVALID_CALLBACK    you specified an invalid callback for a periodic timer
+*                                 OS_ERR_TMR_INVALID_DLY         You specified an invalid delay
+*                                 OS_ERR_TMR_INVALID_PERIOD      You specified an invalid period
+*                                 OS_ERR_TMR_ISR                 If the call was made from an ISR
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function can be called on a running timer. The change to the delay and period will only
+*                 take effect after the current period or delay has passed. Change to the callback will take
+*                 effect immediately.
+************************************************************************************************************************
+*/
+
+void  OSTmrSet (OS_TMR               *p_tmr,
+                OS_TICK               dly,
+                OS_TICK               period,
+                OS_TMR_CALLBACK_PTR   p_callback,
+                void                 *p_callback_arg,
+                OS_ERR               *p_err)
+{
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return;
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if trying to call from an ISR                    */
+       *p_err = OS_ERR_TMR_ISR;
+        return;
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_tmr == DEF_NULL) {                                    /* Validate 'p_tmr'                                     */
+       *p_err = OS_ERR_TMR_INVALID;
+        return;
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_tmr->Type != OS_OBJ_TYPE_TMR) {                       /* Make sure timer was created                          */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return;
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    switch (p_tmr->Opt) {
+        case OS_OPT_TMR_PERIODIC:
+             if (period == 0u) {
+                *p_err = OS_ERR_TMR_INVALID_PERIOD;
+                 return;
+             }
+
+             if (p_callback == DEF_NULL) {                      /* No point in a periodic timer without a callback      */
+                *p_err = OS_ERR_TMR_INVALID_CALLBACK;
+                 return;
+             }
+             break;
+
+        case OS_OPT_TMR_ONE_SHOT:
+             if (dly == 0u) {
+                *p_err = OS_ERR_TMR_INVALID_DLY;
+                 return;
+             }
+             break;
+
+        default:
+            *p_err = OS_ERR_TMR_INVALID;
+             return;
+    }
+#endif
+
+    OS_TmrLock();
+
+    p_tmr->Dly            = dly;
+    p_tmr->Period         = period;
+    p_tmr->CallbackPtr    = p_callback;
+    p_tmr->CallbackPtrArg = p_callback_arg;
+
+   *p_err = OS_ERR_NONE;
+
+    OS_TmrUnlock();
+
+}
+
+
+/*
+************************************************************************************************************************
+*                                                   START A TIMER
+*
+* Description: This function is called by your application code to start a timer.
+*
+* Arguments  : p_tmr    Is a pointer to an OS_TMR
+*
+*              p_err    Is a pointer to an error code.  '*p_err' will contain one of the following:
+*
+*                           OS_ERR_NONE                The timer was started
+*                           OS_ERR_OBJ_TYPE            If 'p_tmr' is not pointing to a timer
+*                           OS_ERR_OS_NOT_RUNNING      If uC/OS-III is not running yet
+*                           OS_ERR_TMR_INACTIVE        If the timer was not created
+*                           OS_ERR_TMR_INVALID         If 'p_tmr' is a NULL pointer
+*                           OS_ERR_TMR_INVALID_STATE   The timer is in an invalid state
+*                           OS_ERR_TMR_ISR             If the call was made from an ISR
+*
+* Returns    : DEF_TRUE      is the timer was started
+*              DEF_FALSE     if not or upon an error
+*
+* Note(s)    : 1) When starting/restarting a timer, regardless if it is in PERIODIC or ONE-SHOT mode, the timer is
+*                 linked to the timer list with the OS_OPT_LINK_DLY option. This option sets the initial expiration
+*                 time for the timer. For timers in PERIODIC mode, subsequent expiration times are handled by
+*                 the OS_TmrTask().
+************************************************************************************************************************
+*/
+
+CPU_BOOLEAN  OSTmrStart (OS_TMR  *p_tmr,
+                         OS_ERR  *p_err)
+{
+    OS_TMR      *p_next;
+    CPU_BOOLEAN  success;
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if trying to call from an ISR                    */
+       *p_err = OS_ERR_TMR_ISR;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_tmr == DEF_NULL) {
+       *p_err = OS_ERR_TMR_INVALID;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_tmr->Type != OS_OBJ_TYPE_TMR) {                       /* Make sure timer was created                          */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (DEF_FALSE);
+    }
+#endif
+
+    OS_TmrLock();
+
+    switch (p_tmr->State) {
+        case OS_TMR_STATE_RUNNING:                              /* Restart the timer                                    */
+             if (p_tmr->Dly == 0u) {
+                 p_tmr->Remain = p_tmr->Period;
+             } else {
+                 p_tmr->Remain = p_tmr->Dly;
+             }
+            *p_err         = OS_ERR_NONE;
+             success       = DEF_TRUE;
+             break;
+
+        case OS_TMR_STATE_STOPPED:                              /* Start the timer                                      */
+        case OS_TMR_STATE_COMPLETED:
+             p_tmr->State  = OS_TMR_STATE_RUNNING;
+             if (p_tmr->Dly == 0u) {
+                 p_tmr->Remain = p_tmr->Period;
+             } else {
+                 p_tmr->Remain = p_tmr->Dly;
+             }
+             if (OSTmrListPtr ==  DEF_NULL) {                   /* Link into timer list                                 */
+                 p_tmr->NextPtr   = DEF_NULL;                   /* This is the first timer in the list                  */
+                 p_tmr->PrevPtr   = DEF_NULL;
+                 OSTmrListPtr     = p_tmr;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                 OSTmrListEntries = 1u;
+#endif
+             } else {
+                 p_next           = OSTmrListPtr;               /* Insert at the beginning of the list                  */
+                 p_tmr->NextPtr   = OSTmrListPtr;
+                 p_tmr->PrevPtr   = DEF_NULL;
+                 p_next->PrevPtr  = p_tmr;
+                 OSTmrListPtr     = p_tmr;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+                 OSTmrListEntries++;
+#endif
+             }
+            *p_err   = OS_ERR_NONE;
+             success = DEF_TRUE;
+             break;
+
+        case OS_TMR_STATE_UNUSED:                               /* Timer not created                                    */
+            *p_err   = OS_ERR_TMR_INACTIVE;
+             success = DEF_FALSE;
+             break;
+
+        default:
+            *p_err = OS_ERR_TMR_INVALID_STATE;
+             success = DEF_FALSE;
+             break;
+    }
+
+    OS_TmrUnlock();
+
+    return (success);
+}
+
+
+/*
+************************************************************************************************************************
+*                                           FIND OUT WHAT STATE A TIMER IS IN
+*
+* Description: This function is called to determine what state the timer is in:
+*
+*                  OS_TMR_STATE_UNUSED     the timer has not been created
+*                  OS_TMR_STATE_STOPPED    the timer has been created but has not been started or has been stopped
+*                  OS_TMR_STATE_COMPLETED  the timer is in ONE-SHOT mode and has completed it's timeout
+*                  OS_TMR_SATE_RUNNING     the timer is currently running
+*
+* Arguments  : p_tmr    Is a pointer to the desired timer
+*
+*              p_err    Is a pointer to an error code.  '*p_err' will contain one of the following:
+*
+*                           OS_ERR_NONE               The return value reflects the state of the timer
+*                           OS_ERR_OBJ_TYPE           If 'p_tmr' is not pointing to a timer
+*                           OS_ERR_OS_NOT_RUNNING     If uC/OS-III is not running yet
+*                           OS_ERR_TMR_INVALID        If 'p_tmr' is a NULL pointer
+*                           OS_ERR_TMR_INVALID_STATE  If the timer is not in a valid state
+*                           OS_ERR_TMR_ISR            If the call was made from an ISR
+*
+* Returns    : The current state of the timer (see description).
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+OS_STATE  OSTmrStateGet (OS_TMR  *p_tmr,
+                         OS_ERR  *p_err)
+{
+    OS_STATE  state;
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (OS_TMR_STATE_UNUSED);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if trying to call from an ISR                    */
+       *p_err = OS_ERR_TMR_ISR;
+        return (OS_TMR_STATE_UNUSED);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (OS_TMR_STATE_UNUSED);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_tmr == DEF_NULL) {
+       *p_err = OS_ERR_TMR_INVALID;
+        return (OS_TMR_STATE_UNUSED);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_tmr->Type != OS_OBJ_TYPE_TMR) {                       /* Make sure timer was created                          */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (OS_TMR_STATE_UNUSED);
+    }
+#endif
+
+    OS_TmrLock();
+
+    state = p_tmr->State;
+    switch (state) {
+        case OS_TMR_STATE_UNUSED:
+        case OS_TMR_STATE_STOPPED:
+        case OS_TMR_STATE_COMPLETED:
+        case OS_TMR_STATE_RUNNING:
+            *p_err = OS_ERR_NONE;
+             break;
+
+        default:
+            *p_err = OS_ERR_TMR_INVALID_STATE;
+             break;
+    }
+
+    OS_TmrUnlock();
+
+    return (state);
+}
+
+
+/*
+************************************************************************************************************************
+*                                                    STOP A TIMER
+*
+* Description: This function is called by your application code to stop a timer.
+*
+* Arguments  : p_tmr          Is a pointer to the timer to stop.
+*
+*              opt            Allows you to specify an option to this functions which can be:
+*
+*                               OS_OPT_TMR_NONE            Do nothing special but stop the timer
+*                               OS_OPT_TMR_CALLBACK        Execute the callback function, pass it the callback argument
+*                                                          specified when the timer was created.
+*                               OS_OPT_TMR_CALLBACK_ARG    Execute the callback function, pass it the callback argument
+*                                                          specified in THIS function call
+*
+*              callback_arg   Is a pointer to a 'new' callback argument that can be passed to the callback function
+*                               instead of the timer's callback argument.  In other words, use 'callback_arg' passed in
+*                               THIS function INSTEAD of p_tmr->OSTmrCallbackArg
+*
+*              p_err          Is a pointer to an error code.  '*p_err' will contain one of the following:
+*
+*                               OS_ERR_NONE                The timer has stopped
+*                               OS_ERR_OBJ_TYPE            If 'p_tmr' is not pointing to a timer
+*                               OS_ERR_OPT_INVALID         If you specified an invalid option for 'opt'
+*                               OS_ERR_OS_NOT_RUNNING      If uC/OS-III is not running yet
+*                               OS_ERR_TMR_INACTIVE        If the timer was not created
+*                               OS_ERR_TMR_INVALID         If 'p_tmr' is a NULL pointer
+*                               OS_ERR_TMR_INVALID_STATE   The timer is in an invalid state
+*                               OS_ERR_TMR_ISR             If the function was called from an ISR
+*                               OS_ERR_TMR_NO_CALLBACK     If the timer does not have a callback function defined
+*                               OS_ERR_TMR_STOPPED         If the timer was already stopped
+*
+* Returns    : DEF_TRUE       If we stopped the timer (if the timer is already stopped, we also return DEF_TRUE)
+*              DEF_FALSE      If not
+*
+* Note(s)    : none
+************************************************************************************************************************
+*/
+
+CPU_BOOLEAN  OSTmrStop (OS_TMR  *p_tmr,
+                        OS_OPT   opt,
+                        void    *p_callback_arg,
+                        OS_ERR  *p_err)
+{
+    OS_TMR_CALLBACK_PTR  p_fnct;
+    CPU_BOOLEAN          success;
+
+
+
+#ifdef OS_SAFETY_CRITICAL
+    if (p_err == DEF_NULL) {
+        OS_SAFETY_CRITICAL_EXCEPTION();
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_CALLED_FROM_ISR_CHK_EN == DEF_ENABLED)
+    if (OSIntNestingCtr > 0u) {                                 /* See if trying to call from an ISR                    */
+       *p_err = OS_ERR_TMR_ISR;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_INVALID_OS_CALLS_CHK_EN == DEF_ENABLED)             /* Is the kernel running?                               */
+    if (OSRunning != OS_STATE_OS_RUNNING) {
+       *p_err = OS_ERR_OS_NOT_RUNNING;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_ARG_CHK_EN == DEF_ENABLED)
+    if (p_tmr == DEF_NULL) {
+       *p_err = OS_ERR_TMR_INVALID;
+        return (DEF_FALSE);
+    }
+#endif
+
+#if (OS_CFG_OBJ_TYPE_CHK_EN == DEF_ENABLED)
+    if (p_tmr->Type != OS_OBJ_TYPE_TMR) {                       /* Make sure timer was created                          */
+       *p_err = OS_ERR_OBJ_TYPE;
+        return (DEF_FALSE);
+    }
+#endif
+
+    OS_TmrLock();
+
+    switch (p_tmr->State) {
+        case OS_TMR_STATE_RUNNING:
+            *p_err = OS_ERR_NONE;
+             switch (opt) {
+                 case OS_OPT_TMR_CALLBACK:
+                      OS_TmrUnlink(p_tmr);                      /* Remove from timer list                               */
+                      p_fnct = p_tmr->CallbackPtr;              /* Execute callback function ...                        */
+                      if (p_fnct != DEF_NULL) {                 /* ... if available                                     */
+                        (*p_fnct)((void *)p_tmr, p_tmr->CallbackPtrArg); /* Use callback arg when timer was created     */
+                      } else {
+                         *p_err = OS_ERR_TMR_NO_CALLBACK;
+                      }
+                      break;
+
+                 case OS_OPT_TMR_CALLBACK_ARG:
+                      OS_TmrUnlink(p_tmr);                      /* Remove from timer list                               */
+                      p_fnct = p_tmr->CallbackPtr;              /* Execute callback function if available ...           */
+                      if (p_fnct != DEF_NULL) {
+                        (*p_fnct)((void *)p_tmr, p_callback_arg); /* .. using the 'callback_arg' provided in call       */
+                      } else {
+                         *p_err = OS_ERR_TMR_NO_CALLBACK;
+                      }
+                      break;
+
+                 case OS_OPT_TMR_NONE:
+                      OS_TmrUnlink(p_tmr);                      /* Remove from timer list                               */
+                      break;
+
+                 default:
+                     OS_TmrUnlock();
+                    *p_err = OS_ERR_OPT_INVALID;
+                     return (DEF_FALSE);
+             }
+             success = DEF_TRUE;
+             break;
+
+        case OS_TMR_STATE_COMPLETED:                            /* Timer has already completed the ONE-SHOT or          */
+        case OS_TMR_STATE_STOPPED:                              /* ... timer has not started yet.                       */
+            *p_err   = OS_ERR_TMR_STOPPED;
+             success = DEF_TRUE;
+             break;
+
+        case OS_TMR_STATE_UNUSED:                               /* Timer was not created                                */
+            *p_err   = OS_ERR_TMR_INACTIVE;
+             success = DEF_FALSE;
+             break;
+
+        default:
+            *p_err   = OS_ERR_TMR_INVALID_STATE;
+             success = DEF_FALSE;
+             break;
+    }
+
+    OS_TmrUnlock();
+
+    return (success);
+}
+
+
+/*
+************************************************************************************************************************
+*                                                 CLEAR TIMER FIELDS
+*
+* Description: This function is called to clear all timer fields.
+*
+* Argument(s): p_tmr    Is a pointer to the timer to clear
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_TmrClr (OS_TMR  *p_tmr)
+{
+    p_tmr->State          = OS_TMR_STATE_UNUSED;                /* Clear timer fields                                   */
+#if (OS_OBJ_TYPE_REQ == DEF_ENABLED)
+    p_tmr->Type           = OS_OBJ_TYPE_NONE;
+#endif
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    p_tmr->NamePtr        = (CPU_CHAR *)((void *)"?TMR");
+#endif
+    p_tmr->Dly            = 0u;
+    p_tmr->Remain         = 0u;
+    p_tmr->Period         = 0u;
+    p_tmr->Opt            = 0u;
+    p_tmr->CallbackPtr    = DEF_NULL;
+    p_tmr->CallbackPtrArg = DEF_NULL;
+    p_tmr->NextPtr        = DEF_NULL;
+    p_tmr->PrevPtr        = DEF_NULL;
+}
+
+
+/*
+************************************************************************************************************************
+*                                         ADD/REMOVE TIMER TO/FROM DEBUG TABLE
+*
+* Description: These functions are called by uC/OS-III to add or remove a timer to/from a timer debug table.
+*
+* Arguments  : p_tmr     is a pointer to the timer to add/remove
+*
+* Returns    : none
+*
+* Note(s)    : These functions are INTERNAL to uC/OS-III and your application should not call it.
+************************************************************************************************************************
+*/
+
+
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+void  OS_TmrDbgListAdd (OS_TMR  *p_tmr)
+{
+    p_tmr->DbgPrevPtr               = DEF_NULL;
+    if (OSTmrDbgListPtr == DEF_NULL) {
+        p_tmr->DbgNextPtr           = DEF_NULL;
+    } else {
+        p_tmr->DbgNextPtr           =  OSTmrDbgListPtr;
+        OSTmrDbgListPtr->DbgPrevPtr =  p_tmr;
+    }
+    OSTmrDbgListPtr                 =  p_tmr;
+}
+
+
+
+void  OS_TmrDbgListRemove (OS_TMR  *p_tmr)
+{
+    OS_TMR  *p_tmr_next;
+    OS_TMR  *p_tmr_prev;
+
+
+    p_tmr_prev = p_tmr->DbgPrevPtr;
+    p_tmr_next = p_tmr->DbgNextPtr;
+
+    if (p_tmr_prev == DEF_NULL) {
+        OSTmrDbgListPtr = p_tmr_next;
+        if (p_tmr_next != DEF_NULL) {
+            p_tmr_next->DbgPrevPtr = DEF_NULL;
+        }
+        p_tmr->DbgNextPtr = DEF_NULL;
+
+    } else if (p_tmr_next == DEF_NULL) {
+        p_tmr_prev->DbgNextPtr = DEF_NULL;
+        p_tmr->DbgPrevPtr      = DEF_NULL;
+
+    } else {
+        p_tmr_prev->DbgNextPtr = p_tmr_next;
+        p_tmr_next->DbgPrevPtr = p_tmr_prev;
+        p_tmr->DbgNextPtr      = DEF_NULL;
+        p_tmr->DbgPrevPtr      = DEF_NULL;
+    }
+}
+#endif
+
+
+/*
+************************************************************************************************************************
+*                                             INITIALIZE THE TIMER MANAGER
+*
+* Description: This function is called by OSInit() to initialize the timer manager module.
+*
+* Argument(s): p_err    is a pointer to a variable that will contain an error code returned by this function.
+*
+*                           OS_ERR_NONE
+*                           OS_ERR_TMR_STK_INVALID       if you didn't specify a stack for the timer task
+*                           OS_ERR_TMR_STK_SIZE_INVALID  if you didn't allocate enough space for the timer stack
+*                           OS_ERR_PRIO_INVALID          if you specified the same priority as the idle task
+*                           OS_ERR_xxx                   any error code returned by OSTaskCreate()
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_TmrInit (OS_ERR  *p_err)
+{
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSTmrDbgListPtr = DEF_NULL;
+#endif
+
+    OSTmrListPtr        = DEF_NULL;                             /* Create an empty timer list                           */
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSTmrListEntries    = 0u;
+#endif
+
+    if (OSCfg_TmrTaskRate_Hz > 0u) {
+        OSTmrUpdateCnt  = OSCfg_TickRate_Hz / OSCfg_TmrTaskRate_Hz;
+    } else {
+        OSTmrUpdateCnt  = OSCfg_TickRate_Hz / 10u;
+    }
+    OSTmrUpdateCtr      = OSTmrUpdateCnt;
+
+    OSTmrTickCtr        = 0u;
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    OSTmrTaskTimeMax    = 0u;
+#endif
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    OSMutexCreate(&OSTmrMutex,                                  /* Use a mutex to protect the timers                    */
+                  (CPU_CHAR *)"OS Tmr Mutex",
+                  p_err);
+    if (*p_err != OS_ERR_NONE) {
+        return;
+    }
+#endif
+
+                                                                /* -------------- CREATE THE TIMER TASK --------------- */
+    if (OSCfg_TmrTaskStkBasePtr == DEF_NULL) {
+       *p_err = OS_ERR_TMR_STK_INVALID;
+        return;
+    }
+
+    if (OSCfg_TmrTaskStkSize < OSCfg_StkSizeMin) {
+       *p_err = OS_ERR_TMR_STK_SIZE_INVALID;
+        return;
+    }
+
+    if (OSCfg_TmrTaskPrio >= (OS_CFG_PRIO_MAX - 1u)) {
+       *p_err = OS_ERR_TMR_PRIO_INVALID;
+        return;
+    }
+
+    OSTaskCreate(&OSTmrTaskTCB,
+                 (CPU_CHAR   *)((void *)"uC/OS-III Timer Task"),
+                 OS_TmrTask,
+                 DEF_NULL,
+                 OSCfg_TmrTaskPrio,
+                 OSCfg_TmrTaskStkBasePtr,
+                 OSCfg_TmrTaskStkLimit,
+                 OSCfg_TmrTaskStkSize,
+                 0u,
+                 0u,
+                 DEF_NULL,
+                 (OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR | OS_OPT_TASK_NO_TLS),
+                 p_err);
+}
+
+
+/*
+************************************************************************************************************************
+*                                         REMOVE A TIMER FROM THE TIMER LIST
+*
+* Description: This function is called to remove the timer from the timer list.
+*
+* Arguments  : p_tmr          Is a pointer to the timer to remove.
+*              -----
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_TmrUnlink (OS_TMR  *p_tmr)
+{
+    OS_TMR  *p_tmr1;
+    OS_TMR  *p_tmr2;
+
+
+    if (OSTmrListPtr == p_tmr) {                                /* See if timer to remove is at the beginning of list   */
+        p_tmr1       = p_tmr->NextPtr;
+        OSTmrListPtr = p_tmr1;
+        if (p_tmr1 != DEF_NULL) {
+            p_tmr1->PrevPtr = DEF_NULL;
+        }
+    } else {
+        p_tmr1          = p_tmr->PrevPtr;                       /* Remove timer from somewhere in the list              */
+        p_tmr2          = p_tmr->NextPtr;
+        p_tmr1->NextPtr = p_tmr2;
+        if (p_tmr2 != DEF_NULL) {
+            p_tmr2->PrevPtr = p_tmr1;
+        }
+    }
+    p_tmr->State   = OS_TMR_STATE_STOPPED;
+    p_tmr->NextPtr = DEF_NULL;
+    p_tmr->PrevPtr = DEF_NULL;
+#if (OS_CFG_DBG_EN == DEF_ENABLED)
+    OSTmrListEntries--;
+#endif
+}
+
+
+/*
+************************************************************************************************************************
+*                                                 TIMER MANAGEMENT TASK
+*
+* Description: This task is created by OS_TmrInit().
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : 1) This function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+void  OS_TmrTask (void  *p_arg)
+{
+    OS_ERR               err;
+    OS_TMR_CALLBACK_PTR  p_fnct;
+    OS_TMR              *p_tmr;
+    OS_TMR              *p_tmr_next;
+#if (OS_CFG_DYN_TICK_EN != DEF_ENABLED)
+    CPU_TS               ts;
+#endif
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+    CPU_TS               ts_start;
+    CPU_TS               ts_delta;
+#endif
+
+
+
+    (void)p_arg;                                                /* Not using 'p_arg', prevent compiler warning          */
+    while (DEF_ON) {
+#if (OS_CFG_DYN_TICK_EN != DEF_ENABLED)
+        (void)OSTaskSemPend( 0u,                                /* Wait for signal indicating time to update tmrs       */
+                             OS_OPT_PEND_BLOCKING,
+                            &ts,
+                            &err);
+        (void)err;
+#else
+        OSTimeDly(OSTmrUpdateCnt, OS_OPT_TIME_DLY, &err);
+        (void)err;
+#endif
+
+
+        OS_TmrLock();
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        ts_start = OS_TS_GET();
+#endif
+        OSTmrTickCtr++;                                         /* Increment the current time                           */
+        p_tmr    = OSTmrListPtr;
+        while (p_tmr != DEF_NULL) {                             /* Update all the timers in the list                    */
+            OSSchedLock(&err);
+            (void)&err;
+            p_tmr_next = p_tmr->NextPtr;
+            p_tmr->Remain--;
+            if (p_tmr->Remain == 0u) {
+                if (p_tmr->Opt == OS_OPT_TMR_PERIODIC) {
+                    p_tmr->Remain = p_tmr->Period;              /* Reload the time remaining                            */
+                } else {
+                    OS_TmrUnlink(p_tmr);                        /* Remove from list                                     */
+                    p_tmr->State = OS_TMR_STATE_COMPLETED;      /* Indicate that the timer has completed                */
+                }
+                p_fnct = p_tmr->CallbackPtr;                    /* Execute callback function if available               */
+                if (p_fnct != 0u) {
+                    (*p_fnct)((void *)p_tmr,
+                              p_tmr->CallbackPtrArg);
+                }
+            }
+            p_tmr = p_tmr_next;
+            OSSchedUnlock(&err);
+            (void)&err;
+        }
+
+#if (OS_CFG_TS_EN == DEF_ENABLED)
+        ts_delta = OS_TS_GET() - ts_start;                      /* Measure execution time of timer task                 */
+        if (OSTmrTaskTimeMax < ts_delta) {
+            OSTmrTaskTimeMax = ts_delta;
+        }
+#endif
+
+        OS_TmrUnlock();
+    }
+}
+
+
+/*
+************************************************************************************************************************
+*                                          TIMER MANAGEMENT LOCKING MECHANISM
+*
+* Description: These functions are use to handle timer critical sections.  The preferred method is to use a mutex in
+*              order to avoid locking the scheduler and also, to avoid calling callback functions while the scheduler is
+*              locked.
+*
+* Arguments  : none
+*
+* Returns    : none
+*
+* Note(s)    : 1) These function is INTERNAL to uC/OS-III and your application MUST NOT call it.
+************************************************************************************************************************
+*/
+
+static  void  OS_TmrLock (void)
+{
+    OS_ERR  err;
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    CPU_TS  ts;
+
+
+    OSMutexPend(&OSTmrMutex,                                    /* Use a mutex to protect the timers                    */
+                0u,
+                OS_OPT_PEND_BLOCKING,
+                &ts,
+                &err);
+#else
+    OSSchedLock(&err);                                          /* Lock the scheduler to protect the timers             */
+#endif
+    (void)&err;
+}
+
+
+
+
+static  void  OS_TmrUnlock (void)
+{
+    OS_ERR  err;
+
+
+#if (OS_CFG_MUTEX_EN == DEF_ENABLED)
+    OSMutexPost(&OSTmrMutex,                                    /* Use a mutex to protect the timers                    */
+                OS_OPT_POST_NONE,
+                &err);
+#else
+    OSSchedUnlock(&err);                                        /* Lock the scheduler to protect the timers             */
+#endif
+    (void)&err;
+}
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_type.h b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_type.h
new file mode 100644
index 0000000..6ed6cda
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_type.h
@@ -0,0 +1,98 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+* File    : OS_TYPE.H
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your
+*           application/product.   We provide ALL the source code for your convenience and to help you
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#ifndef   OS_TYPE_H
+#define   OS_TYPE_H
+
+#ifdef    VSC_INCLUDE_H_FILE_NAMES
+const     CPU_CHAR  *os_type__h = "$Id: $";
+#endif
+
+/*
+************************************************************************************************************************
+*                                                 INCLUDE HEADER FILES
+************************************************************************************************************************
+*/
+
+                                                       /*       Description                                    # Bits */
+                                                       /*                                                */
+                                                       /* ----------------------------------------------------------- */
+
+typedef   CPU_INT16U      OS_CPU_USAGE;                /* CPU Usage 0..10000                                  <16>/32 */
+
+typedef   CPU_INT32U      OS_CTR;                      /* Counter,                                                 32 */
+
+typedef   CPU_INT32U      OS_CTX_SW_CTR;               /* Counter of context switches,                             32 */
+
+typedef   CPU_INT32U      OS_CYCLES;                   /* CPU clock cycles,                                   <32>/64 */
+
+typedef   CPU_INT32U      OS_FLAGS;                    /* Event flags,                                      8/16/<32> */
+
+typedef   CPU_INT32U      OS_IDLE_CTR;                 /* Holds the number of times the idle task runs,       <32>/64 */
+
+typedef   CPU_INT16U      OS_MEM_QTY;                  /* Number of memory blocks,                            <16>/32 */
+typedef   CPU_INT16U      OS_MEM_SIZE;                 /* Size in bytes of a memory block,                    <16>/32 */
+
+typedef   CPU_INT16U      OS_MSG_QTY;                  /* Number of OS_MSGs in the msg pool,                  <16>/32 */
+typedef   CPU_INT16U      OS_MSG_SIZE;                 /* Size of messages in number of bytes,                <16>/32 */
+
+typedef   CPU_INT08U      OS_NESTING_CTR;              /* Interrupt and scheduler nesting,                  <8>/16/32 */
+
+typedef   CPU_INT16U      OS_OBJ_QTY;                  /* Number of kernel objects counter,                   <16>/32 */
+typedef   CPU_INT32U      OS_OBJ_TYPE;                 /* Special flag to determine object type,                   32 */
+
+typedef   CPU_INT16U      OS_OPT;                      /* Holds function options,                             <16>/32 */
+
+typedef   CPU_INT32U      OS_MON_RES;                  /* Monitor result flags,                                       */
+
+typedef   CPU_INT08U      OS_PRIO;                     /* Priority of a task,                               <8>/16/32 */
+
+typedef   CPU_INT16U      OS_QTY;                      /* Quantity                                            <16>/32 */
+
+typedef   CPU_INT32U      OS_RATE_HZ;                  /* Rate in Hertz                                            32 */
+
+#if (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_64)            /* Task register                                  8/16/<32/64> */
+typedef   CPU_INT64U      OS_REG;
+#else
+typedef   CPU_INT32U      OS_REG;
+#endif
+typedef   CPU_INT08U      OS_REG_ID;                   /* Index to task register                            <8>/16/32 */
+
+typedef   CPU_INT32U      OS_SEM_CTR;                  /* Semaphore value                                     16/<32> */
+
+typedef   CPU_INT08U      OS_STATE;                    /* State variable                                    <8>/16/32 */
+
+typedef   CPU_INT08U      OS_STATUS;                   /* Status                                            <8>/16/32 */
+
+typedef   CPU_INT32U      OS_TICK;                     /* Clock tick counter                                  <32>/64 */
+
+#endif
diff --git a/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_var.c b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_var.c
new file mode 100644
index 0000000..609e942
--- /dev/null
+++ b/src/ucos_v1_42/micrium_source/uCOS-III/Source/os_var.c
@@ -0,0 +1,42 @@
+/*
+************************************************************************************************************************
+*                                                      uC/OS-III
+*                                                 The Real-Time Kernel
+*
+*                                  (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*                           All rights reserved.  Protected by international copyright laws.
+*
+*                                                      VARIABLES
+*
+* File    : OS_VAR.C
+* By      : JJL
+* Version : V3.05.01
+*
+* LICENSING TERMS:
+* ---------------
+*           uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+*           for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+*           product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+*           application/product.   We provide ALL the source code for your convenience and to help you 
+*           experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+*           it commercially without paying a licensing fee.
+*
+*           Knowledge of the source code may NOT be used to develop a similar product.
+*
+*           Please help us continue to provide the embedded community with the finest software available.
+*           Your honesty is greatly appreciated.
+*
+*           You can find our product's user manual, API reference, release notes and
+*           more information at https://doc.micrium.com.
+*           You can contact us at www.micrium.com.
+************************************************************************************************************************
+*/
+
+#define   OS_GLOBALS
+
+#define  MICRIUM_SOURCE
+#include "os.h"
+
+#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES
+const  CPU_CHAR  *os_var__c = "$Id: $";
+#endif
diff --git a/src/ucos_v1_42/ucos/bsp/doc/html/api/index.html b/src/ucos_v1_42/ucos/bsp/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/bsp/src/app_cfg.h b/src/ucos_v1_42/ucos/bsp/src/app_cfg.h
new file mode 100644
index 0000000..386954b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/app_cfg.h
@@ -0,0 +1,81 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+* Filename      : app_cfg.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_APP_CFG_PRESENT
+#define  UCOS_APP_CFG_PRESENT
+
+#include  
+
+#include  
+
+#define  APP_CPU_ENABLED DEF_DISABLED
+
+#define  APP_LIB_ENABLED DEF_DISABLED
+
+#define  APP_COMMON_ENABLED DEF_DISABLED
+
+#define  APP_SHELL_ENABLED DEF_DISABLED
+
+#define  APP_CLK_ENABLED DEF_DISABLED
+
+#define  APP_OSIII_ENABLED DEF_DISABLED
+
+#define  APP_OSII_ENABLED  DEF_DISABLED
+
+#define  APP_TCPIP_ENABLED  DEF_DISABLED
+
+#define  APP_TCPIP_EXP_ENABLED  DEF_DISABLED
+
+#define  APP_DHCPC_ENABLED  DEF_DISABLED
+
+#define  APP_DNSC_ENABLED  DEF_DISABLED
+
+#define  APP_HTTPC_ENABLED  DEF_DISABLED
+
+#define  APP_MQTTC_ENABLED  DEF_DISABLED
+
+#define  APP_TELNETS_ENABLED  DEF_DISABLED
+
+#define  APP_IPERF_ENABLED  DEF_DISABLED
+
+#define  APP_FS_ENABLED  DEF_DISABLED
+
+#define  APP_USBD_ENABLED  DEF_DISABLED
+
+#define  APP_USBH_ENABLED  DEF_DISABLED
+
+#define  APP_OPENAMP_ENABLED  DEF_DISABLED
+
+#define OS_TASK_TMR_PRIO 3
+
+#endif /* #ifndef  UCOS_APP_CFG_PRESENT */
+
diff --git a/src/ucos_v1_42/ucos/bsp/src/ipi/ucos_int_ipi.c b/src/ucos_v1_42/ucos/bsp/src/ipi/ucos_int_ipi.c
new file mode 100644
index 0000000..bed4050
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ipi/ucos_int_ipi.c
@@ -0,0 +1,131 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                         (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                         MPSoC IPI Interface
+*
+* Filename      : ucos_int_ipi.c
+* Version       : V1.30
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  "ucos_int.h"
+#include  
+
+#include  
+
+#include  
+
+extern XIpiPsu_Config XIpiPsu_ConfigTable[];
+
+XIpiPsu IPIInstance;
+
+void UCOS_IntIPIHandler (void  *p_arg, CPU_INT32U  cpu_id);
+
+
+CPU_BOOLEAN UCOS_IntIPIInit (void)
+{
+    XStatus status;
+
+
+#if (UCOS_CPU_TYPE == UCOS_CPU_TYPE_PSUR5)
+    status = XIpiPsu_CfgInitialize(&IPIInstance, &XIpiPsu_ConfigTable[0], 0xff310000);
+#else
+    status = XIpiPsu_CfgInitialize(&IPIInstance, &XIpiPsu_ConfigTable[0], XIpiPsu_ConfigTable[0].BaseAddress);
+#endif
+
+    if (status != XST_SUCCESS) {
+        for(;;) {
+                CPU_MB();
+        }
+    }
+
+    UCOS_IntVectSet(65,
+                    0,
+                    (1 << XPAR_CPU_ID),
+                    UCOS_IntIPIHandler,
+                    DEF_NULL);
+
+#if (UCOS_CPU_TYPE == UCOS_CPU_TYPE_PSUA53)
+    UCOS_IntSrcEn(XPAR_PSU_IPI_0_INT_ID);
+#else
+    UCOS_IntSrcEn(XPAR_PSU_IPI_1_INT_ID);
+#endif
+
+    return (DEF_OK);
+}
+
+CPU_BOOLEAN UCOS_IntIPIEn (CPU_INT32U cpu_id)
+{
+    CPU_SR_ALLOC();
+
+    XIpiPsu_InterruptEnable(&IPIInstance, 1 << cpu_id);
+
+    return (DEF_OK);
+}
+
+CPU_BOOLEAN UCOS_IntIPIAck (CPU_INT32U cpu_id)
+{
+    CPU_SR_ALLOC();
+
+    XIpiPsu_ClearInterruptStatus(&IPIInstance, 1 << cpu_id);
+
+    return (DEF_OK);
+}
+
+CPU_BOOLEAN UCOS_IntIPITrig (CPU_INT32U cpu_id)
+{
+    XStatus status;
+
+
+    status = XIpiPsu_TriggerIpi(&IPIInstance, 1 << cpu_id);
+
+    if (status != XST_SUCCESS) {
+        for(;;) {
+                CPU_MB();
+        }
+    }
+
+    return (DEF_OK);
+}
+
+
+void UCOS_IntIPIHandler (void  *p_arg, CPU_INT32U  cpu_id)
+{
+    for(;;) {
+            CPU_MB();
+    }
+}
diff --git a/src/ucos_v1_42/ucos/bsp/src/ipi/ucos_int_ipi.h b/src/ucos_v1_42/ucos/bsp/src/ipi/ucos_int_ipi.h
new file mode 100644
index 0000000..3fc3c4a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ipi/ucos_int_ipi.h
@@ -0,0 +1,10 @@
+
+
+
+CPU_BOOLEAN UCOS_IntIPIInit (void);
+
+CPU_BOOLEAN UCOS_IntIPIEn (CPU_INT32U cpu_id);
+
+CPU_BOOLEAN UCOS_IntIPIAck (CPU_INT32U cpu_id);
+
+CPU_BOOLEAN UCOS_IntIPITrig (CPU_INT32U cpu_id);
diff --git a/src/ucos_v1_42/ucos/bsp/src/mb/ucos_impl.c b/src/ucos_v1_42/ucos/bsp/src/mb/ucos_impl.c
new file mode 100644
index 0000000..922f4a2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/mb/ucos_impl.c
@@ -0,0 +1,50 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                      MicroBlaze Post Main Init
+*
+* Filename      : ucos_impl.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+
+void UCOS_LowLevelInit (void)
+{
+
+}
diff --git a/src/ucos_v1_42/ucos/bsp/src/mb/ucos_impl.h b/src/ucos_v1_42/ucos/bsp/src/mb/ucos_impl.h
new file mode 100644
index 0000000..c942f0f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/mb/ucos_impl.h
@@ -0,0 +1,41 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                               MicroBlaze (mb) Implementation Specific
+*
+* Filename      : ucos_impl.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_IMPL_PRESENT
+#define  UCOS_IMPL_PRESENT
+
+#include  
+#include  
+
+
+#endif /* UCOS_IMPL_PRESENT */
diff --git a/src/ucos_v1_42/ucos/bsp/src/mb/ucos_int_impl.c b/src/ucos_v1_42/ucos/bsp/src/mb/ucos_int_impl.c
new file mode 100644
index 0000000..d75ca73
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/mb/ucos_int_impl.c
@@ -0,0 +1,271 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                              AXI INTERRUPT CONTROLLER FOR THE MICROBLAZE
+*
+* Filename      : ucos_int_impl.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  "ucos_int.h"
+#include  
+
+#if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC)
+#include  
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC)
+static  AXIINTC_HANDLE       IntCHandle;
+#endif /* #if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC) */
+
+#if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC)
+static  UCOS_INT_FNCT_PTR    IntVectTbl[32];
+static  void                *IntArgTbl[32];
+#else /* #if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC) */
+static  UCOS_INT_FNCT_PTR    IntVectTbl[1];
+static  void                *IntArgTbl[1];
+#endif /* #if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC) */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntInit()
+*
+* Description : Initialise UCOS BSP interrupts.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : Should be called only from the startup code. By default this is done inside the
+*               UCOS_Startup() initialization routine.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntInit (void)
+{
+#if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC)
+    IntCHandle = AXIIntCInit(0);
+#endif
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntSrcEn()
+*
+* Description : Enable an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to enable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntSrcEn (CPU_INT32U int_id)
+{
+#if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC)
+    return (AXIIntCIntEnSet(IntCHandle, int_id));
+#else
+    return (DEF_OK);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntSrcDis()
+*
+* Description : Disable an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to disable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : UCOS_IntSrcDis() won't clear a pending interrupt.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntSrcDis (CPU_INT32U int_id)
+{
+#if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC)
+    return (AXIIntCIntEnClr(IntCHandle, int_id));
+#else
+    return (DEF_OK);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntVectSet()
+*
+* Description : Register an interrupt handler.
+*
+* Argument(s) : int_id     ID of the interrupt to register.
+*               int_fnct   Handler to register.
+*               p_int_arg  Argument given to the handler.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : An interrupt handler has the following signature :
+*
+*               void Handler (void *p_int_arg, CPU_INT32U source_cpu)
+*               {
+*               }
+*
+*               On the MicroBlaze the second argument is always the current cpu, 0.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntVectSet (CPU_INT32U         int_id,
+                             CPU_INT32U         int_prio,
+                             CPU_INT08U         int_target_list,
+                             UCOS_INT_FNCT_PTR  int_fnct,
+                             void              *p_int_arg)
+{
+    CPU_SR_ALLOC();
+
+    CPU_CRITICAL_ENTER();
+    IntVectTbl[int_id] = int_fnct;
+    IntArgTbl[int_id] = p_int_arg;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntTypeSet()
+*
+* Description : Configure the trigger type on an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to disable.
+*               type       Interrupt type.
+*                   UCOS_INT_TYPE_LEVEL - Level sensitivity
+*                   UCOS_INT_TYPE_EDGE  - Edge sensitivity
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : The AXI interrupt sensitivity is fixed and cannot be changed at runtime.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntTypeSet (CPU_INT32U int_id, UCOS_INT_TYPE type)
+{
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            BSP_IntHandler()
+*
+* Description : Global interrupt handler.
+*
+* Argument(s) : int_id     ID of the interrupt to enable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+/* TODO - Handle the case where IPR isn't available. */
+void BSP_IntHandler (void)
+{
+#if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC)
+    AXIINTC_PTR        intc;
+    CPU_INT32U         int_id;
+#endif
+    UCOS_INT_FNCT_PTR  int_handler;
+    void              *p_int_arg;
+
+#if (UCOS_MB_INTC_TYPE == UCOS_MB_INTC_TYPE_AXIINTC)
+    intc = IntCHandle->AXIIntC;
+
+    int_id = CPU_CntTrailZeros(intc->IPR);                      /* Fetch the highest priority interrupt pending.        */
+
+    int_handler = IntVectTbl[int_id];
+    p_int_arg   = IntArgTbl[int_id];
+
+    if (int_handler != DEF_NULL) {
+        (int_handler)(p_int_arg, 0);
+    }
+
+    intc->IAR = (1 << int_id);                                  /* Acknowledge the interrupt.                           */
+#else
+    int_handler = IntVectTbl[0];
+    p_int_arg   = IntArgTbl[0];
+
+    (int_handler)(p_int_arg, 0);
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/bsp/src/mb/ucos_int_impl.h b/src/ucos_v1_42/ucos/bsp/src/mb/ucos_int_impl.h
new file mode 100644
index 0000000..0eeeb0a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/mb/ucos_int_impl.h
@@ -0,0 +1,69 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                              AXI INTERRUPT CONTROLLER FOR THE MICROBLAZE
+*
+* Filename      : ucos_int_impl.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_INT_PRESENT
+#define  UCOS_INT_PRESENT
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+typedef  void  (*UCOS_INT_FNCT_PTR)(void *, CPU_INT32U);
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntInit    (void);
+
+CPU_BOOLEAN UCOS_IntSrcEn   (CPU_INT32U         int_id);
+
+CPU_BOOLEAN UCOS_IntSrcDis  (CPU_INT32U         int_id);
+
+CPU_BOOLEAN UCOS_IntVectSet (CPU_INT32U         int_id,
+                             UCOS_INT_FNCT_PTR  int_fnct,
+                             void              *p_int_arg);
+
+void        BSP_IntHandler  (void);
+
+
+#endif /* UCOS_INT_PRESENT */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ps7/asm_vectors.S b/src/ucos_v1_42/ucos/bsp/src/ps7/asm_vectors.S
new file mode 100644
index 0000000..f63d9aa
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ps7/asm_vectors.S
@@ -0,0 +1,373 @@
+@
+@********************************************************************************************************
+@                                  EXCEPTION VECTORS AND RESET HANDLER
+@
+@ File      : asm_vectors.S
+@ For       : Cortex A9 on the Zynq-7000 EPP
+@ Toolchain : GNU
+@ Version   : 1.42
+@********************************************************************************************************
+@
+
+#include  
+
+.org 0
+.text
+
+.globl Reset_Handler
+.globl Vectors
+.globl _vector_table
+.globl  MMUTable
+
+.globl OS_CPU_ARM_ExceptUndefInstrHndlr
+.globl OS_CPU_ARM_ExceptSwiHndlr
+.globl OS_CPU_ARM_ExceptPrefetchAbortHndlr
+.globl OS_CPU_ARM_ExceptDataAbortHndlr
+.globl OS_CPU_ARM_ExceptIrqHndlr
+.globl OS_CPU_ARM_ExceptFiqHndlr
+
+                                  /* Mode, correspords to bits 0-5 in CPSR */
+.equ MODE_BITS,    0x1F           /* Bit mask for mode bits in CPSR */
+.equ USR_MODE,     0x10           /* User mode */
+.equ FIQ_MODE,     0x11           /* Fast Interrupt Request mode */
+.equ IRQ_MODE,     0x12           /* Interrupt Request mode */
+.equ SVC_MODE,     0x13           /* Supervisor mode */
+.equ ABT_MODE,     0x17           /* Abort mode */
+.equ UND_MODE,     0x1B           /* Undefined Instruction mode */
+.equ SYS_MODE,     0x1F           /* System mode */
+
+.equ IRQ_FIQ_DIS,  0xC0
+
+.equ CTRL_C1_M,  0x0001
+.equ CTRL_C1_A,  0x0002
+.equ CTRL_C1_C,  0x0004
+.equ CTRL_C1_W,  0x0008
+.equ CTRL_C1_S,  0x0100
+.equ CTRL_C1_R,  0x0200
+.equ CTRL_C1_Z,  0x0800
+.equ CTRL_C1_I,  0x1000
+.equ CTRL_C1_V,  0x2000
+.equ CTRL_C1_RR, 0x4000
+
+.equ CPU_ARM_REG_SCU_CTRL,             0xF8F00000
+.equ CPU_ARM_REG_SCU_INV,              0xF8F0000C
+
+
+.equ CPU_ARM_L2C_REG1_CTRL,            0xF8F02100
+.equ CPU_ARM_L2C_REG1_AUX_CTRL,        0xF8F02104
+.equ CPU_ARM_L2C_REG1_TAG_RAM_CTRL,    0xF8F02108
+.equ CPU_ARM_L2C_REG1_DATA_RAM_CTRL,   0xF8F0210C
+
+.equ CPU_ARM_L2C_REG7_CACHE_SYNC,      0xF8F02730
+.equ CPU_ARM_L2C_REG7_CACHE_INV_PA,    0xF8F02770
+.equ CPU_ARM_L2C_REG7_CACHE_INV_WAY,   0xF8F0277C
+.equ CPU_ARM_L2C_REG7_CACHE_CLEAN_PA,  0xF8F027B0
+
+
+                               @ Level 1 page table descriptor templates
+.equ TTB_ENTRY_SUPERSEC_FAULT, 0x50006
+.equ TTB_ENTRY_SUPERSEC_DEV,   0x50C06
+.equ TTB_ENTRY_SUPERSEC_NORM,  0x55C06
+
+.equ AUX_C1_FW,  0x0001
+.equ AUX_C1_SMP, 0x0040
+
+
+.section .vectors
+.align 8
+_vector_table:
+Vectors:
+    LDR     PC, [PC,#24]
+    LDR     PC, [PC,#24]
+    LDR     PC, [PC,#24]
+    LDR     PC, [PC,#24]
+    LDR     PC, [PC,#24]
+.word     0
+    LDR     PC, [PC,#24]
+    LDR     PC, [PC,#24]
+
+
+.word    Reset_Handler
+.word    OS_CPU_ARM_ExceptUndefInstrHndlr
+.word    OS_CPU_ARM_ExceptSwiHndlr
+.word    OS_CPU_ARM_ExceptPrefetchAbortHndlr
+.word    OS_CPU_ARM_ExceptDataAbortHndlr
+.word    0
+.word    OS_CPU_ARM_ExceptIrqHndlr
+.word    OS_CPU_ARM_ExceptFiqHndlr
+
+.global UCOS_ARMv7Attbl_SuperSecMap
+UCOS_ARMv7Attbl_SuperSecMap:
+    LSR     r12, r2, #18 @ Calculate start position in the page table
+    ADD     r0, r0, r12  @ r0 = TTLB_BASE + Start
+    ADD     r3, r3, r2   @ r3 = Start + Range
+
+ARMv7Attbl_Map_SuperSec_Loop1:
+    MOV     r12, #0xFF000000
+    BIC     r1, r1, r12 @ Clear upper byte for the PA
+    ADD     r1, r1, r2  @ r1 = TTB_TEMPLATE + Addr
+    MOV     r12, #16
+ARMv7Attbl_Map_SuperSec_Loop2: @ Store 16 copies of the table entry
+    STR     r1, [r0], #4
+    SUBS    r12, r12, #1
+    BNE     ARMv7Attbl_Map_SuperSec_Loop2
+    ADD     r2, r2, #0x1000000 @ Move forward 16 MiB
+    CMP     r2, r3
+    BNE     ARMv7Attbl_Map_SuperSec_Loop1
+
+    BX      lr
+
+
+.global UCOS_PS7_DCacheInvalidateAll
+UCOS_PS7_DCacheInvalidateAll:
+                                    @ Invalidate L1 data cache
+  MOVW     r0, #0x1FF               @ Load set index
+BSP_DCacheInvalidateAll_loop_1:
+  MOV     r1, #0x00000003           @ Load number of ways
+BSP_DCacheInvalidateAll_loop_2:
+  MOV     r2, r1, LSL #30
+  ADD     r2, r2, r0, LSL #5
+  MCR     p15, 0, r2, c7, c6, 2
+  SUBS    r1, r1, #1
+  BGE     BSP_DCacheInvalidateAll_loop_2
+  SUBS    r0, r0, #1
+  BGE     BSP_DCacheInvalidateAll_loop_1
+  DSB
+
+#if (UCOS_AMP_MASTER == DEF_ENABLED) /* Only the master core should invalidate the L2 Data Cache */
+                                    @ Invalidate L2 unified cache
+  LDR     r0, =CPU_ARM_L2C_REG7_CACHE_INV_WAY
+  LDR     r1, =0xFF
+  STR     r1, [r0]
+BSP_DCacheInvalidateAll_wait:
+  LDR     r1, [r0]
+  TST     r1, #0xFF
+  BNE     BSP_DCacheInvalidateAll_wait
+#endif /* #if (UCOS_AMP_MASTER == DEF_ENABLED) */
+  DSB
+  ISB
+
+  BX      lr
+
+Reset_Handler:
+    CPSID   IF                                       @ Disable interrupts
+
+    MRC     p15, 0, r0, c1, c0, 0                    @ Read control register
+    BIC     r0, r0, #CTRL_C1_M                       @ Disable MMU
+    BIC     r0, r0, #CTRL_C1_C                       @ Disable data cache
+    BIC     r0, r0, #CTRL_C1_Z                       @ Disable branch prediction
+    BIC     r0, r0, #CTRL_C1_I                       @ Disable instruction cache
+    MCR     p15, 0, r0, c1, c0, 0                    @ Write control register
+
+    LDR     r0, =0xF8F02100                          @ Disable the L2 cache
+    MOV     r1, #0
+    STR     r1, [r0]
+
+    LDR     r0, =0xF8F00208
+    MOV     r1, #0x1
+    STR     r1, [r0]
+
+	mrc     p15, 0, r0, c0, c0, 0		/* Get the revision */
+	and     r5, r0, #0x00f00000
+	and     r6, r0, #0x0000000f
+	orr     r6, r6, r5, lsr #20-4
+
+#ifdef CONFIG_ARM_ERRATA_742230
+        cmp     r6, #0x22                       /* only present up to r2p2 */
+        mrcle   p15, 0, r10, c15, c0, 1         /* read diagnostic register */
+        orrle   r10, r10, #1 << 4               /* set bit #4 */
+        mcrle   p15, 0, r10, c15, c0, 1         /* write diagnostic register */
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_743622
+	teq     r5, #0x00200000                 /* only present in r2p* */
+	mrceq   p15, 0, r10, c15, c0, 1         /* read diagnostic register */
+	orreq   r10, r10, #1 << 6               /* set bit #6 */
+	mcreq   p15, 0, r10, c15, c0, 1         /* write diagnostic register */
+#endif
+
+    LDR     r0, =Vectors                             @ Set vector table location
+    MCR     p15, 0, r0, c12, c0, 0
+    MRC     p15, 0, r0, c1, c0, 0
+    BIC     r0, r0, #CTRL_C1_V                       @ Disable high vector
+    MCR     p15, 0, r0, c1, c0, 0
+
+
+                                                     @ Configure the stacks
+    MOV     r0, #IRQ_FIQ_DIS
+
+    BIC     r0, r0, #0x1F
+    ORR     r0, r0, #IRQ_MODE
+    MSR     cpsr_c, r0
+    LDR     r1, =__irq_stack
+    MOV     sp, r1
+
+    BIC     r0, r0, #0x1F
+    ORR     r0, r0, #ABT_MODE
+    MSR     cpsr_c, r0
+    LDR     r1, =__abort_stack
+    MOV     sp, r1
+
+    BIC     r0, r0, #0x1F
+    ORR     r0, r0, #UND_MODE
+    MSR     cpsr_c, r0
+    LDR     r1, =__undef_stack
+    MOV     sp, r1
+
+    BIC     r0, r0, #0x1F
+    ORR     r0, r0, #FIQ_MODE
+    MSR     cpsr_c, r0
+    LDR     r1, =__fiq_stack
+    MOV     sp, r1
+
+    BIC     r0, r0, #0x1F
+    ORR     r0, r0, #SVC_MODE
+    MSR     cpsr_c, r0
+    LDR     r1, =__supervisor_stack
+    MOV     sp, r1
+
+    MOV     r0, #0x0
+    MCR     p15, 0, r0, c7, c5, 6                    @ Invalidate branch predictor
+
+    MOV     r0, #0x0
+    MCR     p15, 0, r0, c8, c7, 0                    @ Invalidate TLB
+
+    MOV     r0, #0
+    MCR     p15, 0, r0, c7, c5, 0                    @ Invalidate instruction cache
+
+#if ((ZYNQ_ENABLE_EARLY_L1_I_EN == DEF_ENABLED) && (UCOS_ZYNQ_ENABLE_CACHES == DEF_ENABLED))
+    MRC     p15, 0, r0, c1, c0, 0                    @ Read control register
+    ORR     r0, r0, #CTRL_C1_Z                       @ Enable branch prediction
+    ORR     r0, r0, #CTRL_C1_I                       @ Enable instruction cache
+    MCR     p15, 0, r0, c1, c0, 0                    @ Write control register
+#endif
+
+    BL UCOS_PS7_DCacheInvalidateAll
+
+    MRC     p15, 0, r0, c3, c0, 0
+    LDR     r0, =0x55555555
+    MCR     p15, 0, r0, c3, c0, 0
+
+    MRC     p15, 0, r0, c1, c0, 2
+    ORR     r0, r0, #(0xF << 20)
+    MCR     p15, 0, r0, c1, c0, 2
+    ISB
+
+                                                     @ Start the VFP and NEON engine
+    MOV     r0, #0x40000000
+    VMSR    FPEXC, r0
+
+
+
+    MOV     r0, #0
+    MOVW    R1, #:lower16:__sbss_start
+    MOVT    R1, #:upper16:__sbss_start
+    MOVW    R2, #:lower16:__sbss_end
+    MOVT    R2, #:upper16:__sbss_end
+.Lloop_sbss:
+    CMP     r1,r2
+    BGE     .Lenclsbss
+    STR     r0, [r1], #4
+    B       .Lloop_sbss
+
+.Lenclsbss:
+    MOVW    R1, #:lower16:__bss_start
+    MOVT    R1, #:upper16:__bss_start
+    MOVW    R2, #:lower16:__bss_end
+    MOVT    R2, #:upper16:__bss_end
+
+.Lloop_bss:
+    CMP     r1,r2
+    BGE     .Lenclbss
+    STR     r0, [r1], #4
+    B       .Lloop_bss
+
+.Lenclbss:
+
+
+#if (UCOS_ZYNQ_CONFIG_MMU == DEF_ENABLED)
+
+                                                     @ Setup page table
+    LDR     r4, =MMUTable                            @ Load page table base address
+
+
+                                                     @ Map entire memory to fault by default
+    MOV     r0, r4
+    MOVW    R1, #:lower16:TTB_ENTRY_SUPERSEC_DEV
+    MOVT    R1, #:upper16:TTB_ENTRY_SUPERSEC_DEV
+    MOVW    R2, #:lower16:0x00000000
+    MOVT    R2, #:upper16:0x00000000
+    MOVW    R3, #:lower16:0x00000000
+    MOVT    R3, #:upper16:0x00000000
+    BL      UCOS_ARMv7Attbl_SuperSecMap
+
+                                                     @ Map the entire DDR + LOW OCM as cachable & shareable
+
+    MOV     r0, r4
+    MOVW    R1, #:lower16:TTB_ENTRY_SUPERSEC_NORM
+    MOVT    R1, #:upper16:TTB_ENTRY_SUPERSEC_NORM
+    MOVW    R2, #:lower16:0x00000000
+    MOVT    R2, #:upper16:0x00000000
+    MOVW    R3, #:lower16:0x40000000
+    MOVT    R3, #:upper16:0x40000000
+    BL      UCOS_ARMv7Attbl_SuperSecMap
+
+                                                     @ Map peripherals as device memory
+
+    MOV     r0, r4
+    MOVW    R1, #:lower16:TTB_ENTRY_SUPERSEC_DEV
+    MOVT    R1, #:upper16:TTB_ENTRY_SUPERSEC_DEV
+    MOVW    R2, #:lower16:0xE0000000
+    MOVT    R2, #:upper16:0xE0000000
+    MOVW    R3, #:lower16:0x20000000
+    MOVT    R3, #:upper16:0x20000000
+    BL      UCOS_ARMv7Attbl_SuperSecMap
+
+    DSB
+#endif
+                                                     @ Set L1 page table location
+    MCR     p15, 0, r4, c2, c0, 0
+    DSB
+
+#if (UCOS_ZYNQ_ENABLE_MMU == DEF_ENABLED)
+    MRC     p15,  0, r0, c1, c0, 0                   @ Read  control register
+    ORR     r0,  r0, #CTRL_C1_M                      @ Enable MMU
+    MCR     p15,  0, r0, c1, c0, 0                   @ Write control register
+    DSB
+
+#if (UCOS_AMP_MASTER == DEF_ENABLED)                 /* SCU initialized by the master core only */
+    .global SCUC_En
+    .global SCUC_SpeculativeLineFillsEn
+
+#if (UCOS_ZYNQ_ENABLE_OPTIMS == DEF_ENABLED)
+    BL      SCUC_SpeculativeLineFillsEn
+#endif
+    BL      SCUC_En                                  @ Enable the SCU
+
+    .global SCUC_InvalidateAll
+    BL      SCUC_InvalidateAll                       @ Invalidate SCU data
+#endif /* #if (UCOS_AMP_MASTER == DEF_ENABLED) */
+
+#if (UCOS_SMP_ENABLE == DEF_ENABLED)
+    MRC     p15, 0, r0, c1, c0, 1                    @ Join SMP and enable cache maintenance forwarding
+    ORR     r0, r0, #AUX_C1_SMP
+    ORR     r0, r0, #AUX_C1_FW
+    MCR     p15, 0, r0, c1, c0, 1
+    DSB
+#endif
+#endif
+
+#if ((ZYNQ_ENABLE_EARLY_L1_D_EN == DEF_ENABLED) && (UCOS_ZYNQ_ENABLE_CACHES == DEF_ENABLED))
+    MRC     p15, 0, r0, c1, c0, 0                    @ Read control register
+    ORR     r0, r0, #CTRL_C1_C                       @ Enable data cache
+    MCR     p15, 0, r0, c1, c0, 0                    @ Write control register
+#endif
+
+    #BL __libc_init_array
+
+    MOV     r0, #0
+    MOV     r1, #1
+    LDR     r12, =main
+    BX      r12
+
+.end
diff --git a/src/ucos_v1_42/ucos/bsp/src/ps7/mmu_blank.S b/src/ucos_v1_42/ucos/bsp/src/ps7/mmu_blank.S
new file mode 100644
index 0000000..f88264d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ps7/mmu_blank.S
@@ -0,0 +1,14 @@
+
+
+/* Blank MMU Table. */
+    .globl  MMUTable
+
+    .section .mmu_tbl,"a"
+
+MMUTable:
+    .rept   4096
+    .word   0
+    .endr
+    
+    
+    .end
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/bsp/src/ps7/subdir.mk b/src/ucos_v1_42/ucos/bsp/src/ps7/subdir.mk
new file mode 100644
index 0000000..23ff546
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ps7/subdir.mk
@@ -0,0 +1,3 @@
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ps7/mmu_blank.S
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ps7/ucos_impl.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ps7/ucos_int_impl.c
diff --git a/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_impl.c b/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_impl.c
new file mode 100644
index 0000000..1206499
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_impl.c
@@ -0,0 +1,92 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                       (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                      Cortex-A9 Post Main Init
+*
+* Filename      : ucos_impl.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  
+#include  
+
+#include  
+
+void UCOS_LowLevelInit (void)
+{
+
+#if (UCOS_ZYNQ_CONFIG_CACHES == DEF_ENABLED)
+    /* Init L1 Caches. */
+#if (ZYNQ_ENABLE_EARLY_L1_I_EN == DEF_DISABLED)
+    CPU_CortexA9_BranchPredictEn();
+#endif
+#if (UCOS_ZYNQ_ENABLE_OPTIMS == DEF_ENABLED)
+    CPU_CortexA9_L1PrefetchEn();
+    CPU_CortexA9_L2PrefetchEn();
+    CPU_CortexA9_FLZEn();
+#endif
+
+#if (UCOS_ZYNQ_ENABLE_CACHES == DEF_ENABLED)
+#if (ZYNQ_ENABLE_EARLY_L1_D_EN == DEF_DISABLED)
+    CPU_CortexA9_L1DCacheEn();
+#endif
+#if (ZYNQ_ENABLE_EARLY_L1_I_EN == DEF_DISABLED)
+    CPU_CortexA9_L1ICacheEn();
+#endif
+#endif
+
+    /* Init L2 Caches. */
+#if (UCOS_AMP_MASTER == DEF_ENABLED)
+#if (UCOS_ZYNQ_CONFIG_CACHES == DEF_ENABLED)
+#if (UCOS_ZYNQ_ENABLE_OPTIMS == DEF_ENABLED)
+    L2CacheC_AuxCtrlSet(0x72060801);
+    L2CacheC_PrefetchCtrlSet(0x71000001);
+#else
+    L2CacheC_AuxCtrlSet(0x02060000);
+#endif
+    L2CacheC_TagRamLatencySet(1u, 1u, 1u);
+    L2CacheC_DataRamLatencySet(1u, 2u, 1u);
+#endif
+
+#if (UCOS_ZYNQ_ENABLE_CACHES == DEF_ENABLED)
+    L2CacheC_En();
+#endif
+#endif /* #if (UCOS_ZYNQ_CONFIG_CACHES == DEF_ENABLED) */
+#endif /* #if (UCOS_AMP_MASTER == DEF_ENABLED) */
+
+}
diff --git a/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_impl.h b/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_impl.h
new file mode 100644
index 0000000..6220a55
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_impl.h
@@ -0,0 +1,41 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                               Cortex-A9 (ps7) Implementation Specific
+*
+* Filename      : ucos_impl.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_IMPL_PRESENT
+#define  UCOS_IMPL_PRESENT
+
+#include  
+#include  
+
+
+#endif /* UCOS_IMPL_PRESENT */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_int_impl.c b/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_int_impl.c
new file mode 100644
index 0000000..a2c66fb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_int_impl.c
@@ -0,0 +1,510 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                Cortex-A9 (ps7) Interrupt Management
+*
+* Filename      : ucos_int_impl.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  "ucos_int.h"
+#include  
+
+#include  
+
+#include  
+#include "ucos_int_impl.h"
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+CORE_DUMP_T_REF CoreDump;
+
+static  UCOS_INT_FNCT_PTR    IntVectTbl[128];
+static  void                *IntArgTbl[128];
+
+void UCOS_Int_FIQ_Handler (void) __attribute__ ((weak));
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntInit()
+*
+* Description : Initialise UCOS BSP interrupts.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : Should be called only from the startup code. By default this is done inside the
+*               UCOS_Startup() initialization routine.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntInit (void)
+{
+
+#if (UCOS_AMP_MASTER == DEF_ENABLED)                            /* Only the master core should enable the distributor.  */
+                                                                /* Enable the GIC.                                      */
+    SCUGIC_DIST_REG->ICDDCR |= SCUGIC_DIST_ICDDCR_EN;
+#endif /* #if (UCOS_AMP_MASTER == DEF_ENABLED) */
+
+                                                                /* Enable the GIC interface.                            */
+    SCUGIC_IF_REG->ICCICR |= (SCUGIC_IF_ICCICR_ENS | SCUGIC_IF_ICCICR_ENNS | SCUGIC_IF_ICCICR_ACKCTL);
+
+    CPU_IntEn();
+
+    SCUGIC_PrioMaskSet(0xFFu);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntSrcEn()
+*
+* Description : Enable an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to enable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntSrcEn (CPU_INT32U int_id)
+{
+    CPU_INT32U  reg_off;
+    CPU_INT32U  reg_bit;
+    CPU_SR_ALLOC();
+
+
+    if(int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_FAIL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    reg_off = int_id >> 5u;                                     /* Calculate the register offset.                       */
+
+    reg_bit = int_id & 0x1F;                                    /* Mask bit ID.                                         */
+
+    SCUGIC_DIST_REG->ICDISERn[reg_off] = 1u << reg_bit;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntSrcDis()
+*
+* Description : Disable an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to disable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : UCOS_IntSrcDis() won't clear a pending interrupt.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntSrcDis (CPU_INT32U int_id)
+{
+    CPU_INT32U  reg_off;
+    CPU_INT32U  reg_bit;
+    CPU_SR_ALLOC();
+
+
+    if(int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_FAIL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    reg_off = int_id >> 5u;                                     /* Calculate the register offset.                       */
+
+    reg_bit = int_id & 0x1F;                                    /* Mask bit ID.                                         */
+
+    SCUGIC_DIST_REG->ICDICERn[reg_off] = 1u << reg_bit;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntPrioSet()
+*
+* Description : Configure the priority of an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to disable.
+*               int_prio   Interrupt priority.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntPrioSet (CPU_INT32U int_id, CPU_INT32U int_prio)
+{
+
+    if(int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_FAIL);
+    }
+
+    if (int_prio > 255u) {
+        return (DEF_FAIL);
+    }
+
+    SCUGIC_PrioSet(int_id, int_prio);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntTargetSet()
+*
+* Description : Configure the target list of an interrupt source.
+*
+* Argument(s) : int_target_list     ID of the interrupt to disable.
+*               int_prio   Interrupt priority.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntTargetSet (CPU_INT32U int_id, CPU_INT32U int_target_list)
+{
+    CPU_INT32U int_target;
+
+
+    if(int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_FAIL);
+    }
+
+    if (int_target_list > 0xF) {
+        return (DEF_FAIL);
+    }
+
+    if (int_target_list == 0u) {
+        int_target = 1 << XPAR_CPU_ID;
+    } else {
+        int_target = int_target_list;
+    }
+
+    SCUGIC_TargetSet(int_id, int_target);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntTypeSet()
+*
+* Description : Configure the trigger type on an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to disable.
+*               type       Interrupt type.
+*                   UCOS_INT_TYPE_LEVEL - Level sensitivity
+*                   UCOS_INT_TYPE_EDGE  - Edge sensitivity
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntTypeSet (CPU_INT32U int_id, UCOS_INT_TYPE type)
+{
+    CPU_INT32U int_target;
+
+
+    if(int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_FAIL);
+    }
+
+    if (type > 1) {
+        return (DEF_FAIL);
+    }
+
+    SCUGIC_TypeSet(int_id, (CPU_BOOLEAN)type);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntVectSet()
+*
+* Description : Register an interrupt handler.
+*
+* Argument(s) : int_id           ID of the interrupt to register.
+*               int_prio         Interrupt priority.
+*               int_target_list  List of CPU that can be interrupted or 0 for the current CPU.
+*               int_fnct         Handler to register.
+*               p_int_arg        Argument given to the handler.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : An interrupt handler has the following signature :
+*
+*               void Handler (void *p_int_arg, CPU_INT32U source_cpu)
+*               {
+*               }
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntVectSet (CPU_INT32U         int_id,
+                             CPU_INT32U         int_prio,
+                             CPU_INT08U         int_target_list,
+                             UCOS_INT_FNCT_PTR  int_fnct,
+                             void              *p_int_arg)
+{
+    CPU_INT32U int_target;
+    CPU_SR_ALLOC();
+
+
+    if (int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_FAIL);
+    }
+
+    if (int_prio > 255u) {
+        return (DEF_FAIL);
+    }
+
+    if (int_target_list > 0xF) {
+        return (DEF_FAIL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    IntVectTbl[int_id] = int_fnct;
+    IntArgTbl[int_id] = p_int_arg;
+
+    if (int_target_list == 0u) {
+        int_target = 1 << XPAR_CPU_ID;
+    } else {
+        int_target = int_target_list;
+    }
+
+    SCUGIC_TargetSet(int_id, int_target);
+    SCUGIC_PrioSet(int_id, int_prio);
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            BSP_IntHandler()
+*
+* Description : Global interrupt handler.
+*
+* Argument(s) : int_id     ID of the interrupt to enable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void UCOS_IntHandler (void)
+{
+    CPU_INT32U         int_ack;
+    CPU_INT32U         int_id;
+    CPU_INT32U         int_cpu;
+    void               *p_int_arg;
+    UCOS_INT_FNCT_PTR  p_isr;
+
+
+    int_ack = SCUGIC_IF_REG->ICCIAR;                            /* Acknowledge the interrupt.                           */
+
+    int_id = int_ack & DEF_BIT_FIELD(10u, 0u);                  /* Mask away the CPUID.                                 */
+
+    if(int_id == 1023u) {                                       /* Spurious interrupt.                                  */
+        return;
+    }
+
+    int_cpu = (int_ack & DEF_BIT_FIELD(12u, 2u)) >> 10u;        /* Extract the interrupt source.                        */
+
+    p_isr = IntVectTbl[int_id];                                 /* Fetch ISR handler.                                   */
+    p_int_arg = IntArgTbl[int_id];
+
+    if(int_id != 29 && int_id != 82){
+    	asm volatile ("nop");
+    }
+
+    if(p_isr != DEF_NULL) {
+        (*p_isr)(p_int_arg, int_cpu);                           /* Call ISR handler.                                    */
+    }
+
+    CPU_MB();                                                   /* Memory barrier before ack'ing the interrupt.         */
+
+    SCUGIC_IF_REG->ICCEOIR = int_ack;                            /* Acknowledge the interrupt.                           */
+}
+
+
+/*
+ *********************************************************************************************************
+ *                                          OS_CPU_ExceptHndlr()
+ *
+ * Description : Handle any exceptions.
+ *
+ * Argument(s) : except_id     ARM exception type:
+ *
+ *                                  OS_CPU_ARM_EXCEPT_RESET             0x00
+ *                                  OS_CPU_ARM_EXCEPT_UNDEF_INSTR       0x01
+ *                                  OS_CPU_ARM_EXCEPT_SWI               0x02
+ *                                  OS_CPU_ARM_EXCEPT_PREFETCH_ABORT    0x03
+ *                                  OS_CPU_ARM_EXCEPT_DATA_ABORT        0x04
+ *                                  OS_CPU_ARM_EXCEPT_ADDR_ABORT        0x05
+ *                                  OS_CPU_ARM_EXCEPT_IRQ               0x06
+ *                                  OS_CPU_ARM_EXCEPT_FIQ               0x07
+ *
+ * Return(s)   : none.
+ *
+ * Caller(s)   : OS_CPU_ARM_EXCEPT_HANDLER(), which is declared in os_cpu_a.s.
+ *
+ * Note(s)     : (1) Only OS_CPU_ARM_EXCEPT_FIQ and OS_CPU_ARM_EXCEPT_IRQ exceptions handler are implemented.
+ *                   For the rest of the exception a infinite loop is implemented for debuging pruposes. This behavior
+ *                   should be replaced with another behavior (reboot, etc).
+ *********************************************************************************************************
+ */
+/* TODO - Consider defining default fault handlers as weak symbols for convenience. */
+void OS_CPU_ExceptHndlr(CPU_INT32U except_id) {
+
+    switch (except_id) {
+    case OS_CPU_ARM_EXCEPT_FIQ:
+        UCOS_Int_FIQ_Handler();
+        break;
+
+    case OS_CPU_ARM_EXCEPT_IRQ:
+        UCOS_IntHandler();
+        break;
+
+    case OS_CPU_ARM_EXCEPT_RESET:
+    case OS_CPU_ARM_EXCEPT_UNDEF_INSTR:
+    case OS_CPU_ARM_EXCEPT_SWI:
+    case OS_CPU_ARM_EXCEPT_PREFETCH_ABORT:
+    case OS_CPU_ARM_EXCEPT_DATA_ABORT:
+    case OS_CPU_ARM_EXCEPT_ADDR_ABORT:
+    default:
+
+        while (DEF_TRUE) { /* Infinite loop on other exceptions. (see note #1)          */
+            CPU_WaitForEvent();
+        }
+    }
+}
+
+void OS_CPU_HardExcHandler(CPU_INT32U except_id){
+	switch(except_id){
+	case OS_CPU_ARM_EXCEPT_UNDEF_INSTR:
+//		UCOS_Printf("Undefined Fault occurred on address 0x%08x\r\n", CoreDump->PC);
+		break;
+	case OS_CPU_ARM_EXCEPT_PREFETCH_ABORT:
+//		UCOS_Printf("Prefetch Fault occurred on address 0x%08x\r\n", CoreDump->PC);
+		break;
+	case OS_CPU_ARM_EXCEPT_DATA_ABORT:
+//		UCOS_Printf("Abort Fault occurred on address 0x%08x\r\n", CoreDump->PC);
+		break;
+	default: break;
+	}
+
+
+	while (DEF_TRUE) { /* Infinite loop on other exceptions. (see note #1)          */
+		CPU_WaitForEvent();
+	}
+}
+
+
+/*
+*********************************************************************************************************
+*                                          UCOS_Int_FIQ_Handler()
+*
+* Description : Custom FIQ handler.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void UCOS_Int_FIQ_Handler (void)
+{
+
+}
diff --git a/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_int_impl.h b/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_int_impl.h
new file mode 100644
index 0000000..d5c55b0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ps7/ucos_int_impl.h
@@ -0,0 +1,72 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                Cortex-A9 (ps7) Interrupt Management
+*
+* Filename      : ucos_int_impl.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_INT_IMPL_PRESENT
+#define  UCOS_INT_IMPL_PRESENT
+
+#include  
+#include  
+
+typedef struct {
+	/* FPU-Register */
+	CPU_INT32U FPEXC;
+	CPU_INT32U FPU_REGS[32];
+	CPU_INT32U FPSCR;
+	/* Coprocessor Register */
+	CPU_INT32U SCTLR;			/* System Control Register */
+	CPU_INT32U PAR;				/* Physical Address Register */
+	CPU_INT32U NSACR;			/* Non-scure Access Control Register */
+	CPU_INT32U SCR;				/* Secure Configuration Register */
+	CPU_INT32U IFAR;			/* Instruction-Fault Address Register */
+	CPU_INT32U IFSR;			/* Instruction-Faul Status Register */
+	CPU_INT32U DFAR;			/* Data-Fault Address Register */
+	CPU_INT32U DFSR;			/* Data-Fault Status Register */
+	/* CPU Register */
+    CPU_INT32U R0;
+    CPU_INT32U R1;
+    CPU_INT32U R2;
+    CPU_INT32U R3;
+    CPU_INT32U R4;
+    CPU_INT32U R5;
+    CPU_INT32U R6;
+    CPU_INT32U R7;
+    CPU_INT32U R8;
+    CPU_INT32U R9;
+    CPU_INT32U R10;
+    CPU_INT32U R11;
+    CPU_INT32U R12;
+    CPU_INT32U PC;
+
+} CORE_DUMP_T, *CORE_DUMP_T_REF;
+
+#endif /* UCOS_INT_IMPL_PRESENT */
diff --git a/src/ucos_v1_42/ucos/bsp/src/psua53/asm_vector.S b/src/ucos_v1_42/ucos/bsp/src/psua53/asm_vector.S
new file mode 100644
index 0000000..b80f482
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psua53/asm_vector.S
@@ -0,0 +1,331 @@
+
+#include  
+
+.org 0
+.text
+.section .vectors, "a"
+
+.global _vector_table
+.global _exit
+
+.Lsbss_start:
+    .quad   __sbss_start
+
+.Lsbss_end:
+    .quad   __sbss_end
+
+.Lbss_start:
+    .quad   __bss_start__
+
+.Lbss_end:
+    .quad   __bss_end__
+
+.set EL3_stack,     __el3_stack
+.set EL2_stack,     __el2_stack
+.set EL1_stack,     __el1_stack
+.set EL0_stack,     __el0_stack
+.set L0Table,   MMUTableL0
+.set L1Table,   MMUTableL1
+.set L2Table,   MMUTableL2
+.set ucos_vector_table_base,   ucos_vector_table
+
+.align 12
+_vector_table:
+    .set    VBAR, _vector_table
+    .org    VBAR
+    B Reset_Handler
+    //.org (VBAR + 0x00 + 0)
+ucos_vector_table:
+    //B .      // Current EL 32bits: Synchronous
+    .org (VBAR + 0x80 + 0)
+    B .      //                    IRQ/vIRQ
+    .org (VBAR + 0x100 + 0)
+    B .      //                    FIQ/vFIQ
+    .org (VBAR + 0x180 + 0)
+    B .      //                    Error/vError
+    .org (VBAR + 0x200 + 0)
+    MRS x0, ESR_EL3
+    B .      // Current EL 64bits: Synchronous
+    .org (VBAR + 0x280 + 0)
+    B OS_CPU_ARM_ExceptIrqHndlr  // IRQ/vIRQ
+    .org (VBAR + 0x300 + 0)
+    B .      //                    FIQ/vFIQ
+    .org (VBAR + 0x380 + 0)
+    B .      //                    Error/vError
+
+
+Reset_Handler:
+	mov      x0, #0
+	mov      x1, #0
+	mov      x2, #0
+	mov      x3, #0
+	mov      x4, #0
+	mov      x5, #0
+	mov      x6, #0
+	mov      x7, #0
+	mov      x8, #0
+	mov      x9, #0
+	mov      x10, #0
+	mov      x11, #0
+	mov      x12, #0
+	mov      x13, #0
+	mov      x14, #0
+	mov      x15, #0
+	mov      x16, #0
+	mov      x17, #0
+	mov      x18, #0
+	mov      x19, #0
+	mov      x20, #0
+	mov      x21, #0
+	mov      x22, #0
+	mov      x23, #0
+	mov      x24, #0
+	mov      x25, #0
+	mov      x26, #0
+	mov      x27, #0
+	mov      x28, #0
+	mov      x29, #0
+	mov      x30, #0
+
+
+    MRS  x4, CurrentEL               // Fetch current EL
+    LSR  x4, x4, #2
+
+    CMP  x4, #3
+    B.NE skip_el3
+    MOV x1, #0
+    BIC x1, x1, #(0x1 << 12)         // Disable instruction cache
+    BIC x1, x1, #(0x1 << 2)          // Disable data cache
+    BIC x1, x1, #(0x1 << 0)          // Disable MMU
+    BIC x0, x0, x1
+    MSR SCTLR_EL3, x1
+    DSB SY
+    ISB
+
+
+    MOV x1, #0
+    BIC x1, x1, #(0x1 << 12)         // Disable instruction cache
+    BIC x1, x1, #(0x1 << 2)          // Disable data cache
+    BIC x1, x1, #(0x1 << 0)          // Disable MMU
+    BIC x0, x0, x1
+    MSR SCTLR_EL2, x1
+    DSB SY
+    ISB
+
+skip_el3:
+
+
+    MOV x1, #0
+    BIC x1, x1, #(0x1 << 12)         // Disable instruction cache
+    BIC x1, x1, #(0x1 << 2)          // Disable data cache
+    BIC x1, x1, #(0x1 << 0)          // Disable MMU
+    BIC x0, x0, x1
+    MSR SCTLR_EL1, x1
+    DSB SY
+    ISB
+
+
+    MRS  x4, CurrentEL           // Fetch current EL
+    LSR  x4, x4, #2
+    CMP  x4, #3
+    B.NE skip_el3_cfg
+
+    MOV w0, #0
+    ORR w0, w0, #0x800           // ST=1 : Enable secure EL1 access to CNTPS_XXX_EL1
+    ORR w0, w0, #0x400           // RW=1 : Next lower level is AArch64
+
+
+    ORR w0, w0, #0x008          // EA=1 : Aborts routed to EL3
+    ORR w0, w0, #0x004          // FIQ=1: Physical FIQ routed to EL3
+    ORR w0, w0, #0x002          // IRQ=1: Physical IRQ routed to EL3
+
+    // Uncomment to run EL1 in non-secure state
+    //ORR w0, w0, #0x001          // NS=1 : Non-secure EL0 & EL1
+    MSR SCR_EL3, x0
+
+    LDR x0, =ucos_vector_table_base   // x0 = 0x80000800
+    MSR VBAR_EL3, x0             // EL3 sets vector base address
+
+    MRS x0, CPTR_EL3
+    MOV w1, #0x400 // Don't trap to EL3 on SIMD access from EL0,1,2
+    BIC w0, w0, w1
+    MSR CPTR_EL3, x0
+skip_el3_cfg:
+
+    LDR x0, =ucos_vector_table_base   // x0 = 0x80000800
+    MSR VBAR_EL1, x0             // EL1 sets vector base address
+
+
+    LDR x0, =EL3_stack
+    MOV SP, x0
+
+    MRS x0, CPACR_EL1
+    LDR x1, =0x300000 // Don't trap to EL1 on SIMD access from EL0,1
+    ORR  w0, w0, w1
+    MSR CPACR_EL1, x0
+
+
+    /*configure cpu auxiliary control register EL1 */
+#if (UCOS_XEN_GUEST == DEF_DISABLED)
+    ldr x0,=0x80CA000       // L1 Data prefetch control - 5, Enable device split throttle, 2 independent data prefetch streams
+    msr S3_1_C15_C2_0, x0   //CPUACTLR_EL1
+
+    /*Enable hardware coherency between cores*/
+    mrs      x0, S3_1_c15_c2_1      //Read EL1 CPU Extended Control Register
+    orr      x0, x0, #(1 << 6)      //Set the SMPEN bit
+    msr      S3_1_c15_c2_1, x0      //Write EL1 CPU Extended Control Register
+    isb
+#endif
+
+    tlbi    ALLE3
+    ic      IALLU                   //; Invalidate I cache to PoU
+    bl  invalidate_dcaches
+    dsb  sy
+    isb
+
+#if ((ZYNQ_MPSOC_A53_CONFIG_MMU == DEF_ENABLED) && (UCOS_XEN_GUEST == DEF_DISABLED))
+
+    ldr      x1, =L0Table       //; Get address of level 0 for TTBR0_EL1
+    msr      TTBR0_EL3, x1      //; Set TTBR0_EL3 (NOTE: There is no TTBR1 at EL1)
+
+
+    /**********************************************
+    * Set up memory attributes
+    * This equates to:
+    * 0 = b01000100 = Normal, Inner/Outer Non-Cacheable
+    * 1 = b11111111 = Normal, Inner/Outer WB/WA/RA
+    * 2 = b00000000 = Device-nGnRnE
+    * 3 = b00000100 = Device-nGnRE
+    * 4 = b10111011 = Normal, Inner/Outer WT/WA/RA
+    **********************************************/
+    ldr      x1, =0x000000BB0400FF44
+    msr      MAIR_EL3, x1
+
+        /**********************************************
+        * Set up TCR_EL3
+    * Physical Address Size PS =  010 -> 40bits 1TB
+    * Granual Size TG0 = 00 -> 4KB
+        * size offset of the memory region T0SZ = 24 -> (region size 2^(64-24) = 2^40)
+        ***************************************************/
+        ldr     x1,=0x80823518
+        msr     TCR_EL3, x1
+        isb
+
+#endif /* #if ((ZYNQ_MPSOC_A53_CONFIG_MMU == DEF_ENABLED) && (UCOS_XEN_GUEST == DEF_DISABLED))  */
+
+
+
+#if (UCOS_XEN_GUEST == DEF_ENABLED)
+
+#endif /* #if (UCOS_XEN_GUEST == DEF_ENABLED) */
+
+    /* Enable SError Exception for asynchronous abort */
+    mrs  x1, DAIF
+    bic  x1, x1, #(0x1<<8)
+    msr  DAIF, x1
+
+    /* Configure SCTLR_EL3 */
+    mov      x1, #0             //Most of the SCTLR_EL3 bits are unknown at reset
+    orr      x1, x1, #(1 << 3)  //Enable SP alignment check
+#if ((ZYNQ_MPSOC_A53_ENABLE_CACHES == DEF_ENABLED) && (ZYNQ_MPSOC_A53_CONFIG_CACHES == DEF_ENABLED))
+    //orr      x1, x1, #(1 << 2)  //Enable D caches
+    //orr      x1, x1, #(1 << 12) //Enable I cache
+#endif
+#if ((ZYNQ_MPSOC_A53_ENABLE_MMU == DEF_ENABLED) && (ZYNQ_MPSOC_A53_CONFIG_MMU == DEF_ENABLED))
+    orr      x1, x1, #(1 << 0)  //Enable MMU
+#endif
+    msr      SCTLR_EL3, x1
+    dsb  sy
+    isb
+
+
+    mov x0, #0
+
+    /* clear sbss */
+    ldr     w1,.Lsbss_start     /* calculate beginning of the SBSS */
+    ldr w2,.Lsbss_end       /* calculate end of the SBSS */
+    uxtw    x1, w1          /*zero extension to w1 register*/
+    uxtw    x2, w2          /*zero extension to w2 register*/
+
+.Lloop_sbss:
+    cmp x1,x2
+    bge .Lenclsbss      /* If no SBSS, no clearing required */
+    str x0, [x1], #4
+    b   .Lloop_sbss
+
+.Lenclsbss:
+    /* clear bss */
+    ldr w1,.Lbss_start      /* calculate beginning of the BSS */
+    ldr w2,.Lbss_end        /* calculate end of the BSS */
+    uxtw    x1, w1          /*zero extension to w1 register*/
+    uxtw    x2, w2          /*zero extension to w2 register*/
+
+.Lloop_bss:
+    cmp x1,x2
+    bge .Lenclbss       /* If no BSS, no clearing required */
+    str x0, [x1], #4
+    b   .Lloop_bss
+
+.Lenclbss:
+
+    #bl __libc_init_array
+
+    BL main
+
+_exit:
+    B .
+
+Parking:
+    B .
+
+    invalidate_dcaches:
+
+    dmb     ISH
+    mrs     x0, CLIDR_EL1          //; x0 = CLIDR
+    ubfx    w2, w0, #24, #3        //; w2 = CLIDR.LoC
+    cmp     w2, #0                 //; LoC is 0?
+    b.eq    invalidateCaches_end   //; No cleaning required and enable MMU
+    mov     w1, #0                 //; w1 = level iterator
+
+invalidateCaches_flush_level:
+    add     w3, w1, w1, lsl #1     //; w3 = w1 * 3 (right-shift for cache type)
+    lsr     w3, w0, w3             //; w3 = w0 >> w3
+    ubfx    w3, w3, #0, #3         //; w3 = cache type of this level
+    cmp     w3, #2                 //; No cache at this level?
+    b.lt    invalidateCaches_next_level
+
+    lsl     w4, w1, #1
+    msr     CSSELR_EL1, x4         //; Select current cache level in CSSELR
+    isb                            //; ISB required to reflect new CSIDR
+    mrs     x4, CCSIDR_EL1         //; w4 = CSIDR
+
+    ubfx    w3, w4, #0, #3
+    add     w3, w3, #2             //; w3 = log2(line size)
+    ubfx    w5, w4, #13, #15
+    ubfx    w4, w4, #3, #10        //; w4 = Way number
+    clz     w6, w4                 //; w6 = 32 - log2(number of ways)
+
+invalidateCaches_flush_set:
+    mov     w8, w4                 //; w8 = Way number
+invalidateCaches_flush_way:
+    lsl     w7, w1, #1             //; Fill level field
+    lsl     w9, w5, w3
+    orr     w7, w7, w9             //; Fill index field
+    lsl     w9, w8, w6
+    orr     w7, w7, w9             //; Fill way field
+    dc      CISW, x7               //; Invalidate by set/way to point of coherency
+    subs    w8, w8, #1             //; Decrement way
+    b.ge    invalidateCaches_flush_way
+    subs    w5, w5, #1             //; Descrement set
+    b.ge    invalidateCaches_flush_set
+
+invalidateCaches_next_level:
+    add     w1, w1, #1             //; Next level
+    cmp     w2, w1
+    b.gt    invalidateCaches_flush_level
+
+invalidateCaches_end:
+    ret
+
+
+.end
diff --git a/src/ucos_v1_42/ucos/bsp/src/psua53/subdir.mk b/src/ucos_v1_42/ucos/bsp/src/psua53/subdir.mk
new file mode 100644
index 0000000..9209fde
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psua53/subdir.mk
@@ -0,0 +1,4 @@
+#SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/psua53/asm_vector.S
+#SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/psua53/translation_table.S
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/psua53/ucos_impl.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/psua53/ucos_int_impl.c
diff --git a/src/ucos_v1_42/ucos/bsp/src/psua53/translation_table.S b/src/ucos_v1_42/ucos/bsp/src/psua53/translation_table.S
new file mode 100644
index 0000000..3c434d3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psua53/translation_table.S
@@ -0,0 +1,170 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file translation_table.s
+*
+* This file contains the initialization for the MMU table in RAM
+* needed by the Cortex A53 processor
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00  pkp  05/21/14 Initial version
+*
+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+	.globl  MMUTableL0
+	.globl  MMUTableL1
+	.globl  MMUTableL2
+
+	.set reserved,	0x0 					/* Fault*/
+	.set Memory,	0x405 | (3 << 8) | (0x0)		/* normal writeback write allocate inner shared read write */
+	.set Device,	0x409 | (1 << 53)| (1 << 54) |(0x0)	/* strongly ordered read write non executable*/
+	.section .mmu_tbl0,"a"
+
+MMUTableL0:
+
+.set SECT, MMUTableL1
+.8byte	SECT + 0x3
+.set SECT, MMUTableL1+0x1000
+.8byte	SECT + 0x3
+
+	.section .mmu_tbl1,"a"
+
+MMUTableL1:
+
+.set SECT, MMUTableL2			/*1GB DDR*/
+.8byte	SECT + 0x3
+
+.rept	0x3				/*1GB DDR, 1GB PL, 2GB other devices n memory*/
+.set SECT, SECT + 0x1000
+.8byte	SECT + 0x3
+.endr
+
+.set SECT,0x100000000
+.rept	0xC
+.8byte	SECT + reserved
+.set SECT, SECT + 0x40000000	/*12GB Reserved*/
+.endr
+
+.rept	0x10
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*8GB PL, 8GB PCIe*/
+
+.endr
+
+.rept	0x20
+.8byte	SECT + Memory
+
+.set SECT, SECT + 0x40000000	/*32GB DDR*/
+.endr
+
+
+.rept	0xC0
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*192GB PL*/
+.endr
+
+
+.rept	0x100
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*256GB PL/PCIe*/
+.endr
+
+
+.rept	0x200
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*512GB PL/DDR*/
+.endr
+
+
+.section .mmu_tbl2,"a"
+
+MMUTableL2:
+
+.set SECT, 0
+
+.rept	0x0400			/*2GB DDR */
+.8byte	SECT + Memory
+.set	SECT, SECT+0x200000
+.endr
+
+.rept	0x0200			/*1GB lower PL*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x0100			/*512MB QSPI*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x080			/*256MB lower PCIe*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x040			/*128MB Reserved*/
+.8byte	SECT + reserved
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x8			/*16MB coresight*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x8			/*16MB RPU low latency port*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+
+.rept	0x022			/*68MB Device*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x8			/*8MB FPS*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+
+.rept	0x4			/*16MB LPS*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+
+.8byte	SECT + Device 		/*2MB PMU/CSU */
+.set	SECT, SECT+0x200000
+.8byte  SECT + Device	    /*2MB OCM/TCM*/
+.end
diff --git a/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_impl.c b/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_impl.c
new file mode 100644
index 0000000..5c4f8e8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_impl.c
@@ -0,0 +1,54 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                      Cortex-A9 Post Main Init
+*
+* Filename      : ucos_impl.c
+* Version       : V1.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+
+void UCOS_LowLevelInit (void)
+{
+}
+
+__attribute__((weak)) void initialise_monitor_handles(){
+
+}
diff --git a/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_impl.h b/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_impl.h
new file mode 100644
index 0000000..2e1fac8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_impl.h
@@ -0,0 +1,41 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                               Cortex-A53 (psua53) Implementation Specific
+*
+* Filename      : ucos_impl.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_IMPL_PRESENT
+#define  UCOS_IMPL_PRESENT
+
+#include  
+#include  
+
+
+#endif /* UCOS_IMPL_PRESENT */
diff --git a/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_int_impl.c b/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_int_impl.c
new file mode 100644
index 0000000..8273b74
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_int_impl.c
@@ -0,0 +1,383 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                Cortex-A9 (ps7) Interrupt Management
+*
+* Filename      : ucos_int_impl.c
+* Version       : V1.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  "ucos_int.h"
+#include  
+
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  UCOS_INT_FNCT_PTR    IntVectTbl[128];
+static  void                *IntArgTbl[128];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntInit()
+*
+* Description : Initialise UCOS BSP interrupts.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : Should be called only from the startup code. By default this is done inside the
+*               UCOS_Startup() initialization routine.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntInit (void)
+{
+    CPU_INT32U i;
+
+
+    UCOS_IntIPIInit();
+
+
+    /* Enable the GIC.                                      */
+    SCUGIC_DIST_REG->ICDDCR = SCUGIC_DIST_ICDDCR_EN;
+
+    SCUGIC_PrioMaskSet(0xF0u);
+
+    /* Enable the GIC interface.                            */
+    SCUGIC_IF_REG->ICCICR = (SCUGIC_IF_ICCICR_ENS | SCUGIC_IF_ICCICR_ENNS | SCUGIC_IF_ICCICR_ACKCTL);
+    CPU_IntEn();
+
+    for (i = 0; i < 255; i++) {
+        //SCUGIC_DIST_REG->ICDIPTRn[i] = 0x01010101u;
+        //SCUGIC_DIST_REG->ICDIPRn[i] = 0xa0a0a0a0u;
+    }
+
+    for (i = 2; i < 16; i++) {
+        //SCUGIC_DIST_REG->ICDICFRn[i] = 0;
+    }
+    
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntSrcEn()
+*
+* Description : Enable an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to enable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntSrcEn (CPU_INT32U int_id)
+{
+    CPU_INT32U  reg_off;
+    CPU_INT32U  reg_bit;
+    CPU_SR_ALLOC();
+
+
+    if(int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_NULL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    reg_off = int_id >> 5u;                                     /* Calculate the register offset.                       */
+
+    reg_bit = int_id & 0x1F;                                    /* Mask bit ID.                                         */
+
+    SCUGIC_DIST_REG->ICDISERn[reg_off] = 1u << reg_bit;
+    CPU_CRITICAL_EXIT();
+
+
+    // missing return added by philh
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntSrcDis()
+*
+* Description : Disable an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to disable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : UCOS_IntSrcDis() won't clear a pending interrupt.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntSrcDis (CPU_INT32U int_id)
+{
+    CPU_INT32U  reg_off;
+    CPU_INT32U  reg_bit;
+    CPU_SR_ALLOC();
+
+
+    if(int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_FAIL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    reg_off = int_id >> 5u;                                     /* Calculate the register offset.                       */
+
+    reg_bit = int_id & 0x1F;                                    /* Mask bit ID.                                         */
+
+    SCUGIC_DIST_REG->ICDICERn[reg_off] = 1u << reg_bit;
+    CPU_CRITICAL_ENTER();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntPrioSet()
+*
+* Description : Configure the priority of an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to disable.
+*               int_prio   Interrupt priority.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntPrioSet (CPU_INT32U int_id, CPU_INT32U int_prio)
+{
+
+    if (int_prio > 255u) {
+        return (DEF_FAIL);
+    }
+
+    SCUGIC_PrioSet(int_id, int_prio);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntTargetSet()
+*
+* Description : Configure the target list of an interrupt source.
+*
+* Argument(s) : int_target_list     ID of the interrupt to disable.
+*               int_prio   Interrupt priority.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntTargetSet (CPU_INT32U int_id, CPU_INT32U int_target_list)
+{
+    CPU_INT32U int_target;
+
+
+    if (int_target_list > 0xF) {
+        return (DEF_FAIL);
+    }
+
+    if (int_target_list == 0u) {
+        int_target = 1 << XPAR_CPU_ID;
+    } else {
+        int_target = int_target_list;
+    }
+
+    SCUGIC_TargetSet(int_id, int_target);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntVectSet()
+*
+* Description : Register an interrupt handler.
+*
+* Argument(s) : int_id           ID of the interrupt to register.
+*               int_prio         Interrupt priority.
+*               int_target_list  List of CPU that can be interrupted or 0 for the current CPU.
+*               int_fnct         Handler to register.
+*               p_int_arg        Argument given to the handler.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : An interrupt handler has the following signature :
+*
+*               void Handler (void *p_int_arg, CPU_INT32U source_cpu)
+*               {
+*               }
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntVectSet (CPU_INT32U         int_id,
+                             CPU_INT32U         int_prio,
+                             CPU_INT08U         int_target_list,
+                             UCOS_INT_FNCT_PTR  int_fnct,
+                             void              *p_int_arg)
+{
+    CPU_INT32U int_target;
+    CPU_SR_ALLOC();
+
+
+    if (int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_FAIL);
+    }
+
+    if (int_prio > 255u) {
+        return (DEF_FAIL);
+    }
+
+    if (int_target_list > 0xF) {
+        return (DEF_FAIL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    IntVectTbl[int_id] = int_fnct;
+    IntArgTbl[int_id] = p_int_arg;
+
+    if (int_target_list == 0u) {
+        int_target = 1 << XPAR_CPU_ID;
+    } else {
+        int_target = int_target_list;
+    }
+
+    SCUGIC_TargetSet(int_id, int_target);
+    SCUGIC_PrioSet(int_id, int_prio);
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            BSP_IntHandler()
+*
+* Description : Global interrupt handler.
+*
+* Argument(s) : int_id     ID of the interrupt to enable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+extern CPU_INT08U            OSIntNestingCtr;
+void UCOS_IntHandler (void)
+{
+    CPU_INT32U         int_ack;
+    CPU_INT32U         int_id;
+    CPU_INT32U         int_cpu;
+    void               *p_int_arg;
+    UCOS_INT_FNCT_PTR  p_isr;
+
+
+    int_ack = SCUGIC_IF_REG->ICCIAR;                            /* Acknowledge the interrupt.                           */
+
+    int_id = int_ack & DEF_BIT_FIELD(10u, 0u);                  /* Mask away the CPUID.                                 */
+
+    if(int_id == 1023u) {                                       /* Spurious interrupt.                                  */
+        return;
+    }
+
+    int_cpu = (int_ack & DEF_BIT_FIELD(12u, 2u)) >> 10u;        /* Extract the interrupt source.                        */
+
+    p_isr = IntVectTbl[int_id];                                 /* Fetch ISR handler.                                   */
+    p_int_arg = IntArgTbl[int_id];
+
+    if (p_isr != DEF_NULL) {
+        (*p_isr)(p_int_arg, int_cpu);                           /* Call ISR handler.                                    */
+    }
+
+    CPU_MB();                                                   /* Memory barrier before ack'ing the interrupt.         */
+
+    SCUGIC_IF_REG->ICCEOIR = int_id;                            /* Acknowledge the interrupt.                           */
+}
+
+
+void OS_CPU_ExceptHndlr (CPU_INT32U src_id)
+{
+    UCOS_IntHandler();
+}
+
diff --git a/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_int_impl.h b/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_int_impl.h
new file mode 100644
index 0000000..395028a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psua53/ucos_int_impl.h
@@ -0,0 +1,43 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                Cortex-A9 (ps7) Interrupt Management
+*
+* Filename      : ucos_int_impl.h
+* Version       : V1.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_INT_IMPL_PRESENT
+#define  UCOS_INT_IMPL_PRESENT
+
+#include  
+#include  
+
+#include  "ucos_int_ipi.h"
+
+
+#endif /* UCOS_INT_IMPL_PRESENT */
diff --git a/src/ucos_v1_42/ucos/bsp/src/psur5/asm_vectors.S b/src/ucos_v1_42/ucos/bsp/src/psur5/asm_vectors.S
new file mode 100644
index 0000000..ec8aaba
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psur5/asm_vectors.S
@@ -0,0 +1,294 @@
+@
+@********************************************************************************************************
+@                                  EXCEPTION VECTORS AND RESET HANDLER
+@
+@ File      : asm_vectors.S
+@ For       : Cortex A9 on the Zynq-7000 EPP
+@ Toolchain : GNU
+@ Version   : 1.20
+@********************************************************************************************************
+@
+
+#include  
+
+.org 0
+.text
+
+.globl Reset_Handler
+.globl Vectors
+.globl _vector_table
+.globl  MMUTable
+.globl _boot
+.globl Init_MPU
+
+.globl OS_CPU_ARM_ExceptUndefInstrHndlr
+.globl OS_CPU_ARM_ExceptSwiHndlr
+.globl OS_CPU_ARM_ExceptPrefetchAbortHndlr
+.globl OS_CPU_ARM_ExceptDataAbortHndlr
+.globl OS_CPU_ARM_ExceptIrqHndlr
+.globl OS_CPU_ARM_ExceptFiqHndlr
+
+                                  /* Mode, correspords to bits 0-5 in CPSR */
+.equ MODE_BITS,    0x1F           /* Bit mask for mode bits in CPSR */
+.equ USR_MODE,     0x10           /* User mode */
+.equ FIQ_MODE,     0x11           /* Fast Interrupt Request mode */
+.equ IRQ_MODE,     0x12           /* Interrupt Request mode */
+.equ SVC_MODE,     0x13           /* Supervisor mode */
+.equ ABT_MODE,     0x17           /* Abort mode */
+.equ UND_MODE,     0x1B           /* Undefined Instruction mode */
+.equ SYS_MODE,     0x1F           /* System mode */
+
+.equ CTRL_C1_M,  0x0001
+.equ CTRL_C1_A,  0x0002
+.equ CTRL_C1_C,  0x0004
+.equ CTRL_C1_W,  0x0008
+.equ CTRL_C1_S,  0x0100
+.equ CTRL_C1_R,  0x0200
+.equ CTRL_C1_Z,  0x0800
+.equ CTRL_C1_I,  0x1000
+.equ CTRL_C1_V,  0x2000
+.equ CTRL_C1_RR, 0x4000
+
+.equ CPU_ARM_REG_SCU_CTRL,             0xF8F00000
+.equ CPU_ARM_REG_SCU_INV,              0xF8F0000C
+
+
+.equ CPU_ARM_L2C_REG1_CTRL,            0xF8F02100
+.equ CPU_ARM_L2C_REG1_AUX_CTRL,        0xF8F02104
+.equ CPU_ARM_L2C_REG1_TAG_RAM_CTRL,    0xF8F02108
+.equ CPU_ARM_L2C_REG1_DATA_RAM_CTRL,   0xF8F0210C
+
+.equ CPU_ARM_L2C_REG7_CACHE_SYNC,      0xF8F02730
+.equ CPU_ARM_L2C_REG7_CACHE_INV_PA,    0xF8F02770
+.equ CPU_ARM_L2C_REG7_CACHE_INV_WAY,   0xF8F0277C
+.equ CPU_ARM_L2C_REG7_CACHE_CLEAN_PA,  0xF8F027B0
+
+
+                               @ Level 1 page table descriptor templates
+.equ TTB_ENTRY_SUPERSEC_FAULT, 0x50006
+.equ TTB_ENTRY_SUPERSEC_DEV,   0x50C06
+.equ TTB_ENTRY_SUPERSEC_NORM,  0x55C06
+
+.equ AUX_C1_FW,  0x0001
+.equ AUX_C1_SMP, 0x0040
+
+
+.section .vectors, "a"
+.align 8
+_vector_table:
+Vectors:
+    LDR     PC, [PC,#24]
+    LDR     PC, [PC,#24]
+    LDR     PC, [PC,#24]
+    LDR     PC, [PC,#24]
+    LDR     PC, [PC,#24]
+.word     0
+    LDR     PC, [PC,#24]
+    LDR     PC, [PC,#24]
+
+
+.word    Reset_Handler
+.word    OS_CPU_ARM_ExceptUndefInstrHndlr
+.word    OS_CPU_ARM_ExceptSwiHndlr
+.word    OS_CPU_ARM_ExceptPrefetchAbortHndlr
+.word    OS_CPU_ARM_ExceptDataAbortHndlr
+.word    0
+.word    OS_CPU_ARM_ExceptIrqHndlr
+.word    OS_CPU_ARM_ExceptFiqHndlr
+
+.text
+
+.global UCOS_ARMv7Attbl_SuperSecMap
+UCOS_ARMv7Attbl_SuperSecMap:
+    LSR     r12, r2, #18 @ Calculate start position in the page table
+    ADD     r0, r0, r12  @ r0 = TTLB_BASE + Start
+    ADD     r3, r3, r2   @ r3 = Start + Range
+
+ARMv7Attbl_Map_SuperSec_Loop1:
+    MOV     r12, #0xFF000000
+    BIC     r1, r1, r12 @ Clear upper byte for the PA
+    ADD     r1, r1, r2  @ r1 = TTB_TEMPLATE + Addr
+    MOV     r12, #16
+ARMv7Attbl_Map_SuperSec_Loop2: @ Store 16 copies of the table entry
+    STR     r1, [r0], #4
+    SUBS    r12, r12, #1
+    BNE     ARMv7Attbl_Map_SuperSec_Loop2
+    ADD     r2, r2, #0x1000000 @ Move forward 16 MiB
+    CMP     r2, r3
+    BNE     ARMv7Attbl_Map_SuperSec_Loop1
+
+    BX      lr
+
+
+.global UCOS_PS7_DCacheInvalidateAll
+UCOS_PS7_DCacheInvalidateAll:
+                                    @ Invalidate L1 data cache
+  MOVW     r0, #0x1FF               @ Load set index
+BSP_DCacheInvalidateAll_loop_1:
+  MOV     r1, #0x00000003           @ Load number of ways
+BSP_DCacheInvalidateAll_loop_2:
+  MOV     r2, r1, LSL #30
+  ADD     r2, r2, r0, LSL #5
+  MCR     p15, 0, r2, c7, c6, 2
+  SUBS    r1, r1, #1
+  BGE     BSP_DCacheInvalidateAll_loop_2
+  SUBS    r0, r0, #1
+  BGE     BSP_DCacheInvalidateAll_loop_1
+  DSB
+
+#if (UCOS_AMP_MASTER == DEF_ENABLED) /* Only the master core should invalidate the L2 Data Cache */
+                                    @ Invalidate L2 unified cache
+  LDR     r0, =CPU_ARM_L2C_REG7_CACHE_INV_WAY
+  LDR     r1, =0xFF
+  STR     r1, [r0]
+BSP_DCacheInvalidateAll_wait:
+  LDR     r1, [r0]
+  TST     r1, #0xFF
+  BNE     BSP_DCacheInvalidateAll_wait
+#endif /* #if (UCOS_AMP_MASTER == DEF_ENABLED) */
+  DSB
+  ISB
+
+  BX      lr
+
+.section .boot,"axS"
+_boot:
+Reset_Handler:
+    CPSID   IF                                       @ Disable interrupts
+
+    MRC     p15, 0, r0, c1, c0, 0                    @ Read control register
+    BIC     r0, r0, #CTRL_C1_M                       @ Disable MMU
+    BIC     r0, r0, #CTRL_C1_C                       @ Disable data cache
+    BIC     r0, r0, #CTRL_C1_Z                       @ Disable branch prediction
+    BIC     r0, r0, #CTRL_C1_I                       @ Disable instruction cache
+    MCR     p15, 0, r0, c1, c0, 0                    @ Write control register
+
+                                                     @ Disable TCM ECC checks
+    MRC     p15, 0, r0, c1, c0, 1                    @ Read ACTLR
+    BIC     r0, r0, #(0x1 << 27)                     @ Disable B1TCM ECC check
+    BIC     r0, r0, #(0x1 << 26)                     @ Disable B0TCM ECC check
+    BIC     r0, r0, #(0x1 << 25)                     @ Disable ATCM ECC check
+    MCR     p15, 0, r0, c1, c0, 1                    @ Write ACTLR
+    DSB                                              @ Complete all outstanding explicit memory operations
+
+                                                     @ Invalidate caches
+    MOV r0,#0                                        @ r0 = 0
+    DSB
+    MCR p15, 0, r0, c7, c5, 0                        @ invalidate icache
+    MCR     p15, 0, r0, c15, c5, 0                   @ Invalidate entire data cache
+    ISB
+
+
+    MRC     p15, 0, r0, c1, c0, 0
+    BIC     r0, r0, #CTRL_C1_V                       @ Disable high vector
+    MCR     p15, 0, r0, c1, c0, 0
+
+                                                     @ Configure the stacks
+    BIC     r0, r0, #0x1F
+    ORR     r0, r0, #ABT_MODE
+    MSR     cpsr_c, r0
+    LDR     r0, =__abort_stack
+    MOV     sp, r0
+
+    BIC     r0, r0, #0x1F
+    ORR     r0, r0, #UND_MODE
+    MSR     cpsr_c, r0
+    LDR     r0, =__undef_stack
+    MOV     sp, r0
+
+    BIC     r0, r0, #0x1F
+    ORR     r0, r0, #FIQ_MODE
+    MSR     cpsr_c, r0
+    LDR     r0, =__fiq_stack
+    MOV     sp, r0
+
+    BIC     r0, r0, #0x1F
+    ORR     r0, r0, #IRQ_MODE
+    MSR     cpsr_c, r0
+    LDR     r0, =__irq_stack
+    MOV     sp, r0
+
+    BIC     r0, r0, #0x1F
+    ORR     r0, r0, #SVC_MODE
+    MSR     cpsr_c, r0
+    LDR     r0, =__supervisor_stack
+    MOV     sp, r0
+
+    @MOV     r0, #0x0
+    @MCR     p15, 0, r0, c7, c5, 6                    @ Invalidate branch predictor
+
+    @MOV     r0, #0x0
+    @MCR     p15, 0, r0, c8, c7, 0                    @ Invalidate TLB
+
+    @MOV     r0, #0
+    @MCR     p15, 0, r0, c7, c5, 0                    @ Invalidate instruction cache
+
+#if 0
+    BL UCOS_PS7_DCacheInvalidateAll
+#endif
+
+    @MRC     p15, 0, r0, c3, c0, 0
+    @LDR     r0, =0x55555555
+    @MCR     p15, 0, r0, c3, c0, 0
+
+    MRC     p15, 0, r0, c1, c0, 2
+    ORR     r0, r0, #(0xF << 20)
+    MCR     p15, 0, r0, c1, c0, 2
+    ISB
+
+#if 0
+                                                     @ Start the VFP and NEON engine
+    MOV     r0, #0x40000000
+    VMSR    FPEXC, r0
+#endif
+
+
+    MOV     r0, #0
+    MOVW    R1, #:lower16:__sbss_start
+    MOVT    R1, #:upper16:__sbss_start
+    MOVW    R2, #:lower16:__sbss_end
+    MOVT    R2, #:upper16:__sbss_end
+.Lloop_sbss:
+    CMP     r1,r2
+    BGE     .Lenclsbss
+    STR     r0, [r1], #4
+    B       .Lloop_sbss
+
+.Lenclsbss:
+    MOVW    R1, #:lower16:__bss_start__
+    MOVT    R1, #:upper16:__bss_start__
+    MOVW    R2, #:lower16:__bss_end__
+    MOVT    R2, #:upper16:__bss_end__
+
+.Lloop_bss:
+    CMP     r1,r2
+    BGE     .Lenclbss
+    STR     r0, [r1], #4
+    B       .Lloop_bss
+
+.Lenclbss:
+    BL  Init_MPU                        /* Initialize MPU */
+
+    #BL __libc_init_array
+
+    MRC     p15, 0, r0, c1, c0, 1       /* Read ACTLR*/
+    BIC     r0, r0, #(0x1 << 17)        /* Clear RSDIS bit 17 to enable return stack*/
+    BIC     r0, r0, #(0x1 << 16)        /* Clear BP bit 15 and BP bit 16:*/
+    BIC     r0, r0, #(0x1 << 15)        /* Normal operation, BP is taken from the global history table.*/
+    ORR     r0, r0, #(0x1 << 14)        /* Disable DBWR for errata 780125 */
+    MCR     p15, 0, r0, c1, c0, 1       /* Write ACTLR*/
+
+                                        /* Enable icache and dcache */
+    MRC     p15,0,r1,c1,c0,0
+    LDR     r0, =0x1005
+    ORR     r1,r1,r0
+    DSB
+    MCR     p15,0,r1,c1,c0,0
+    ISB
+
+    MOV     r0, #0
+    MOV     r1, #1
+    LDR     r12, =main
+    BX      r12
+
+.end
diff --git a/src/ucos_v1_42/ucos/bsp/src/psur5/mmu_blank.S b/src/ucos_v1_42/ucos/bsp/src/psur5/mmu_blank.S
new file mode 100644
index 0000000..f88264d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psur5/mmu_blank.S
@@ -0,0 +1,14 @@
+
+
+/* Blank MMU Table. */
+    .globl  MMUTable
+
+    .section .mmu_tbl,"a"
+
+MMUTable:
+    .rept   4096
+    .word   0
+    .endr
+    
+    
+    .end
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/bsp/src/psur5/subdir.mk b/src/ucos_v1_42/ucos/bsp/src/psur5/subdir.mk
new file mode 100644
index 0000000..2b959e8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psur5/subdir.mk
@@ -0,0 +1,4 @@
+#SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/psua53/mmu_blank.S
+#SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/psua53/translation_table.S
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/psur5/ucos_impl.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/psur5/ucos_int_impl.c
diff --git a/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_impl.c b/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_impl.c
new file mode 100644
index 0000000..d4f4037
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_impl.c
@@ -0,0 +1,84 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                       (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                      Cortex-A9 Post Main Init
+*
+* Filename      : ucos_impl.c
+* Version       : V1.20
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+
+void UCOS_LowLevelInit (void)
+{
+#if 0
+#if (UCOS_ZYNQ_CONFIG_CACHES == DEF_ENABLED)
+    /* Init L1 Caches. */
+    CPU_CortexA9_BranchPredictEn();
+#if (UCOS_ZYNQ_ENABLE_OPTIMS == DEF_ENABLED)
+    CPU_CortexA9_L1PrefetchEn();
+    CPU_CortexA9_L2PrefetchEn();
+    CPU_CortexA9_FLZEn();
+#endif
+
+#if (UCOS_ZYNQ_ENABLE_CACHES == DEF_ENABLED)
+    CPU_CortexA9_L1DCacheEn();
+    CPU_CortexA9_L1ICacheEn();
+#endif
+
+    /* Init L2 Caches. */
+#if (UCOS_AMP_MASTER == DEF_ENABLED)
+#if (UCOS_ZYNQ_CONFIG_CACHES == DEF_ENABLED)
+#if (UCOS_ZYNQ_ENABLE_OPTIMS == DEF_ENABLED)
+    L2CacheC_AuxCtrlSet(0x72060801);
+    L2CacheC_PrefetchCtrlSet(0x71000001);
+#else
+    L2CacheC_AuxCtrlSet(0x02060000);
+#endif
+    L2CacheC_TagRamLatencySet(1u, 1u, 1u);
+    L2CacheC_DataRamLatencySet(1u, 2u, 1u);
+#endif
+
+#if (UCOS_ZYNQ_ENABLE_CACHES == DEF_ENABLED)
+    L2CacheC_En();
+#endif
+#endif /* #if (UCOS_ZYNQ_CONFIG_CACHES == DEF_ENABLED) */
+#endif /* #if (UCOS_AMP_MASTER == DEF_ENABLED) */
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_impl.h b/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_impl.h
new file mode 100644
index 0000000..8fb3fe3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_impl.h
@@ -0,0 +1,41 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                               Cortex-R5 (psur5) Implementation Specific
+*
+* Filename      : ucos_impl.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_IMPL_PRESENT
+#define  UCOS_IMPL_PRESENT
+
+#include  
+#include  
+
+
+#endif /* UCOS_IMPL_PRESENT */
diff --git a/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_int_impl.c b/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_int_impl.c
new file mode 100644
index 0000000..ec6a1e8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_int_impl.c
@@ -0,0 +1,442 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                Cortex-A9 (ps7) Interrupt Management
+*
+* Filename      : ucos_int_impl.c
+* Version       : V1.20
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  "ucos_int.h"
+#include  
+
+#include  
+
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  UCOS_INT_FNCT_PTR    IntVectTbl[128];
+static  void                *IntArgTbl[128];
+
+void UCOS_Int_FIQ_Handler (void) __attribute__ ((weak));
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntInit()
+*
+* Description : Initialise UCOS BSP interrupts.
+*
+* Argument(s) : none.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : Should be called only from the startup code. By default this is done inside the
+*               UCOS_Startup() initialization routine.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntInit (void)
+{
+
+#if (UCOS_AMP_MASTER == DEF_ENABLED)                            /* Only the master core should enable the distributor.  */
+                                                                /* Enable the GIC.                                      */
+    SCUGIC_DIST_REG->ICDDCR |= SCUGIC_DIST_ICDDCR_EN;
+#endif /* #if (UCOS_AMP_MASTER == DEF_ENABLED) */
+
+                                                                /* Enable the GIC interface.                            */
+    SCUGIC_IF_REG->ICCICR |= (SCUGIC_IF_ICCICR_ENS | SCUGIC_IF_ICCICR_ENNS | SCUGIC_IF_ICCICR_ACKCTL);
+
+    CPU_IntEn();
+
+    SCUGIC_PrioMaskSet(0xFFu);
+
+    UCOS_IntIPIInit();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntSrcEn()
+*
+* Description : Enable an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to enable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntSrcEn (CPU_INT32U int_id)
+{
+    CPU_INT32U  reg_off;
+    CPU_INT32U  reg_bit;
+    CPU_SR_ALLOC();
+
+
+    if(int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_NULL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    reg_off = int_id >> 5u;                                     /* Calculate the register offset.                       */
+
+    reg_bit = int_id & 0x1F;                                    /* Mask bit ID.                                         */
+
+    SCUGIC_DIST_REG->ICDISERn[reg_off] = 1u << reg_bit;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntSrcDis()
+*
+* Description : Disable an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to disable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : UCOS_IntSrcDis() won't clear a pending interrupt.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntSrcDis (CPU_INT32U int_id)
+{
+    CPU_INT32U  reg_off;
+    CPU_INT32U  reg_bit;
+    CPU_SR_ALLOC();
+
+
+    if(int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_FAIL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    reg_off = int_id >> 5u;                                     /* Calculate the register offset.                       */
+
+    reg_bit = int_id & 0x1F;                                    /* Mask bit ID.                                         */
+
+    SCUGIC_DIST_REG->ICDICERn[reg_off] = 1u << reg_bit;
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_FAIL);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntPrioSet()
+*
+* Description : Configure the priority of an interrupt source.
+*
+* Argument(s) : int_id     ID of the interrupt to disable.
+*               int_prio   Interrupt priority.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntPrioSet (CPU_INT32U int_id, CPU_INT32U int_prio)
+{
+
+    if (int_prio > 255u) {
+        return (DEF_FAIL);
+    }
+
+    SCUGIC_PrioSet(int_id, int_prio);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntTargetSet()
+*
+* Description : Configure the target list of an interrupt source.
+*
+* Argument(s) : int_target_list     ID of the interrupt to disable.
+*               int_prio   Interrupt priority.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntTargetSet (CPU_INT32U int_id, CPU_INT32U int_target_list)
+{
+    CPU_INT32U int_target;
+
+
+    if (int_target_list > 0xF) {
+        return (DEF_FAIL);
+    }
+
+    if (int_target_list == 0u) {
+        int_target = 1 << XPAR_CPU_ID;
+    } else {
+        int_target = int_target_list;
+    }
+
+    SCUGIC_TargetSet(int_id, int_target);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UCOS_IntVectSet()
+*
+* Description : Register an interrupt handler.
+*
+* Argument(s) : int_id           ID of the interrupt to register.
+*               int_prio         Interrupt priority.
+*               int_target_list  List of CPU that can be interrupted or 0 for the current CPU.
+*               int_fnct         Handler to register.
+*               p_int_arg        Argument given to the handler.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : An interrupt handler has the following signature :
+*
+*               void Handler (void *p_int_arg, CPU_INT32U source_cpu)
+*               {
+*               }
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntVectSet (CPU_INT32U         int_id,
+                             CPU_INT32U         int_prio,
+                             CPU_INT08U         int_target_list,
+                             UCOS_INT_FNCT_PTR  int_fnct,
+                             void              *p_int_arg)
+{
+    CPU_INT32U int_target;
+    CPU_SR_ALLOC();
+
+
+    if (int_id >= SCUGIC_INT_SRC_CNT) {
+        return (DEF_FAIL);
+    }
+
+    if (int_prio > 255u) {
+        return (DEF_FAIL);
+    }
+
+    if (int_target_list > 0xF) {
+        return (DEF_FAIL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    IntVectTbl[int_id] = int_fnct;
+    IntArgTbl[int_id] = p_int_arg;
+
+    if (int_target_list == 0u) {
+        int_target = 1 << XPAR_CPU_ID;
+    } else {
+        int_target = int_target_list;
+    }
+
+    SCUGIC_TargetSet(int_id, int_target);
+    SCUGIC_PrioSet(int_id, int_prio);
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            BSP_IntHandler()
+*
+* Description : Global interrupt handler.
+*
+* Argument(s) : int_id     ID of the interrupt to enable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void UCOS_IntHandler (void)
+{
+    CPU_INT32U         int_ack;
+    CPU_INT32U         int_id;
+    CPU_INT32U         int_cpu;
+    void               *p_int_arg;
+    UCOS_INT_FNCT_PTR  p_isr;
+
+
+    int_ack = SCUGIC_IF_REG->ICCIAR;                            /* Acknowledge the interrupt.                           */
+
+    int_id = int_ack & DEF_BIT_FIELD(10u, 0u);                  /* Mask away the CPUID.                                 */
+
+    if(int_id == 1023u) {                                       /* Spurious interrupt.                                  */
+        return;
+    }
+
+    int_cpu = (int_ack & DEF_BIT_FIELD(12u, 2u)) >> 10u;        /* Extract the interrupt source.                        */
+
+    p_isr = IntVectTbl[int_id];                                 /* Fetch ISR handler.                                   */
+    p_int_arg = IntArgTbl[int_id];
+
+    if(p_isr != DEF_NULL) {
+        (*p_isr)(p_int_arg, int_cpu);                           /* Call ISR handler.                                    */
+    }
+
+    CPU_MB();                                                   /* Memory barrier before ack'ing the interrupt.         */
+
+    SCUGIC_IF_REG->ICCEOIR = int_id;                            /* Acknowledge the interrupt.                           */
+}
+
+
+/*
+ *********************************************************************************************************
+ *                                          OS_CPU_ExceptHndlr()
+ *
+ * Description : Handle any exceptions.
+ *
+ * Argument(s) : except_id     ARM exception type:
+ *
+ *                                  OS_CPU_ARM_EXCEPT_RESET             0x00
+ *                                  OS_CPU_ARM_EXCEPT_UNDEF_INSTR       0x01
+ *                                  OS_CPU_ARM_EXCEPT_SWI               0x02
+ *                                  OS_CPU_ARM_EXCEPT_PREFETCH_ABORT    0x03
+ *                                  OS_CPU_ARM_EXCEPT_DATA_ABORT        0x04
+ *                                  OS_CPU_ARM_EXCEPT_ADDR_ABORT        0x05
+ *                                  OS_CPU_ARM_EXCEPT_IRQ               0x06
+ *                                  OS_CPU_ARM_EXCEPT_FIQ               0x07
+ *
+ * Return(s)   : none.
+ *
+ * Caller(s)   : OS_CPU_ARM_EXCEPT_HANDLER(), which is declared in os_cpu_a.s.
+ *
+ * Note(s)     : (1) Only OS_CPU_ARM_EXCEPT_FIQ and OS_CPU_ARM_EXCEPT_IRQ exceptions handler are implemented.
+ *                   For the rest of the exception a infinite loop is implemented for debuging pruposes. This behavior
+ *                   should be replaced with another behavior (reboot, etc).
+ *********************************************************************************************************
+ */
+/* TODO - Consider defining default fault handlers as weak symbols for convenience. */
+void OS_CPU_ExceptHndlr(CPU_INT32U except_id) {
+
+    switch (except_id) {
+    case OS_CPU_ARM_EXCEPT_FIQ:
+        UCOS_Int_FIQ_Handler();
+        break;
+
+    case OS_CPU_ARM_EXCEPT_IRQ:
+        UCOS_IntHandler();
+        break;
+
+    case OS_CPU_ARM_EXCEPT_RESET:
+    case OS_CPU_ARM_EXCEPT_UNDEF_INSTR:
+    case OS_CPU_ARM_EXCEPT_SWI:
+    case OS_CPU_ARM_EXCEPT_PREFETCH_ABORT:
+    case OS_CPU_ARM_EXCEPT_DATA_ABORT:
+    case OS_CPU_ARM_EXCEPT_ADDR_ABORT:
+    default:
+
+        while (DEF_TRUE) { /* Infinite loop on other exceptions. (see note #1)          */
+            CPU_WaitForEvent();
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          UCOS_Int_FIQ_Handler()
+*
+* Description : Custom FIQ handler.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void UCOS_Int_FIQ_Handler (void)
+{
+
+}
diff --git a/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_int_impl.h b/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_int_impl.h
new file mode 100644
index 0000000..59bfd70
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/psur5/ucos_int_impl.h
@@ -0,0 +1,42 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                Cortex-A9 (ps7) Interrupt Management
+*
+* Filename      : ucos_int_impl.h
+* Version       : V1.20
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_INT_IMPL_PRESENT
+#define  UCOS_INT_IMPL_PRESENT
+
+#include  
+#include  
+
+#include  
+
+#endif /* UCOS_INT_IMPL_PRESENT */
diff --git a/src/ucos_v1_42/ucos/bsp/src/subdir.mk b/src/ucos_v1_42/ucos/bsp/src/subdir.mk
new file mode 100644
index 0000000..7844752
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/subdir.mk
@@ -0,0 +1,15 @@
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_dhcp-c_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_dns-c_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_fs_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_http-c_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_iperf_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_mqtt-c_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_openamp_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_printf.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_shell_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_startup.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_stdinout.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_tcpip_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_telnet-s_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_usbd_init.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/bsp/src/ucos_usbh_init.c
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_bsp.h b/src/ucos_v1_42/ucos/bsp/src/ucos_bsp.h
new file mode 100644
index 0000000..25cda51
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_bsp.h
@@ -0,0 +1,141 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                       (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+* Filename      : ucos_bsp.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_BSP_PRESENT
+#define  UCOS_BSP_PRESENT
+
+#include  
+#include  
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+#include  
+#endif
+
+/* Possible CPU types. */
+#define UCOS_CPU_TYPE_NONE 0
+#define UCOS_CPU_TYPE_MB 1
+#define UCOS_CPU_TYPE_PS7 2
+#define UCOS_CPU_TYPE_PSUA53 3
+#define UCOS_CPU_TYPE_PSUR5 4
+
+/* Possible stdin/out providers. */
+#define UCOS_UART_NONE 0
+#define UCOS_UART_PS7_UART 1
+#define UCOS_UART_AXI_UART_LITE 2
+#define UCOS_UART_AXI_UART_16550 3
+
+/* Possible systick providers. */
+#define UCOS_SYSTICK_NONE 0
+#define UCOS_SYSTICK_AXITIMER 1
+
+/* Possible ts providers. */
+#define UCOS_TS_NONE 0
+#define UCOS_TS_AXITIMER 1
+
+/* MicroBlaze interrupt handling types. */
+#define UCOS_MB_INTC_TYPE_NONE 0
+#define UCOS_MB_INTC_TYPE_RAW 1
+#define UCOS_MB_INTC_TYPE_AXIINTC 2
+
+/* Ethernet interface providers. */
+#define UCOS_ETHERNET_NONE 0
+#define UCOS_ETHERNET_EMACPS 1
+#define UCOS_ETHERNET_AXIETHLITE 2
+#define UCOS_ETHERNET_AXIETH 3
+
+#define  UCOS_NET_PHY_SPD_0 0
+#define  UCOS_NET_PHY_SPD_10 10
+#define  UCOS_NET_PHY_SPD_100 100
+#define  UCOS_NET_PHY_SPD_1000 1000
+#define  UCOS_NET_PHY_SPD_AUTO 0xFFFF
+
+#define  UCOS_NET_PHY_DUPLEX_UNKNOWN 0
+#define  UCOS_NET_PHY_DUPLEX_HALF 1
+#define  UCOS_NET_PHY_DUPLEX_FULL 2
+#define  UCOS_NET_PHY_DUPLEX_AUTO 3
+
+#define  UCOS_NET_PHY_BUS_MODE_MII 0
+#define  UCOS_NET_PHY_BUS_MODE_RMII 1
+#define  UCOS_NET_PHY_BUS_MODE_SMII 2
+#define  UCOS_NET_PHY_BUS_MODE_GMII 3
+#define  UCOS_NET_PHY_BUS_MODE_AUTO 255
+
+#define  UCOS_NET_PHY_TYPE_INT 0
+#define  UCOS_NET_PHY_TYPE_EXT 1
+#define  UCOS_NET_PHY_ADDR_AUTO 0xFF
+
+/* USB interface providers */
+#define UCOS_USB_NONE 0
+#define UCOS_USB_USBPS 1
+
+/* USB IF Type */
+#define UCOS_USB_TYPE_NONE 0
+#define UCOS_USB_TYPE_DEVICE 1
+#define UCOS_USB_TYPE_HOST 2
+
+/* USB storage drivers. */
+#define UCOS_USBD_STORAGE_DRV_RAM 0
+#define UCOS_USBD_STORAGE_DRV_FS 1
+
+#define UCOS_INT_SOURCE_NONE DEF_INT_32U_MAX_VAL
+
+void UCOS_LowLevelInit (void);
+void UCOS_TmrTickInit (CPU_INT32U tick_rate);
+
+CPU_BOOLEAN UCOSStartup (CPU_FNCT_PTR initial_func);
+CPU_BOOLEAN UCOS_Shell_Init (void);
+CPU_BOOLEAN UCOS_FS_Init (void);
+CPU_BOOLEAN UCOS_DHCPc_Init (void);
+CPU_BOOLEAN UCOS_DHCPc_IF_Init (CPU_INT32U if_nbr);
+CPU_BOOLEAN UCOS_DNSc_Init (void);
+CPU_BOOLEAN UCOS_HTTPc_Init (void);
+CPU_BOOLEAN UCOS_MQTTc_Init (void);
+CPU_BOOLEAN UCOS_TELNETs_Init (void);
+CPU_BOOLEAN UCOS_IPerf_Init (void);
+CPU_BOOLEAN UCOS_USBD_Init (void);
+CPU_BOOLEAN UCOS_USBH_Init (void);
+CPU_BOOLEAN UCOS_USBH_Start (void);
+CPU_BOOLEAN UCOS_OpenAMP_Start (void);
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_TCPIP_Init (void);
+CPU_BOOLEAN UCOS_TCPIP_IfCfgInit (NET_DEV_CFG_ETHER *Cfg);
+CPU_BOOLEAN UCOS_TCPIP_PhyCfgInit (NET_PHY_CFG_ETHER *Cfg);
+#endif
+
+void UCOS_StdInOutInit (void);
+void UCOS_Print (const CPU_CHAR *p_string);
+void UCOS_Printf(const CPU_CHAR *ctrl1, ...);
+CPU_INT32U UCOS_Read (CPU_CHAR *buf, CPU_INT32U cnt);
+
+
+#endif /* #ifndef  UCOS_BSP_PRESENT */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_dhcp-c_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_dhcp-c_init.c
new file mode 100644
index 0000000..1add250
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_dhcp-c_init.c
@@ -0,0 +1,149 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                         uC/TCPIP INIT CODE
+*
+* Filename      : ucos_dhcp-c_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+#include  
+#include  
+#include  
+
+#if (APP_DHCPC_ENABLED == DEF_ENABLED)
+#include  
+#endif
+
+
+#if (APP_DHCPC_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_DHCPc_Init (void)
+{
+    DHCPc_ERR err_dhcp;
+
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/DHCPc.\r\n");
+#endif
+
+    err_dhcp = DHCPc_Init();
+
+    if (err_dhcp != DHCPc_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error initializing uC/DHCPc. Error code %d\r\n", err_dhcp);
+#endif
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+CPU_BOOLEAN UCOS_DHCPc_IF_Init (CPU_INT32U if_nbr)
+{
+    DHCPc_STATUS      status;
+    CPU_BOOLEAN       done;
+    NET_IPv4_ADDR    *p_addr_dns = DEF_NULL;
+    DHCPc_OPT_CODE    req_param[DHCPc_CFG_PARAM_REQ_TBL_SIZE];
+    CPU_INT08U        req_param_qty;
+    CPU_INT16U        size;
+    DHCPc_ERR         err_dhcp;
+
+
+    UCOS_Printf("UCOS - Trying dhcp configuration for interface %d\r\n", if_nbr);
+
+    req_param[0]   = DHCP_OPT_DOMAIN_NAME_SERVER;
+    req_param_qty  = 1u;
+
+    DHCPc_Start(if_nbr, req_param, req_param_qty, &err_dhcp);
+    if (err_dhcp != DHCPc_ERR_NONE) {
+        UCOS_Printf("UCOS - Error starting dhcp for interface %d, error code %d\r\n", if_nbr, err_dhcp);
+        return (DEF_FAIL);
+    }
+
+    done = DEF_NO;
+    while (done == DEF_NO) {
+        KAL_Dly(100);
+
+        status = DHCPc_ChkStatus(if_nbr, &err_dhcp);
+        switch (status) {
+            case DHCP_STATUS_CFG_IN_PROGRESS:
+                 break;
+
+
+            case DHCP_STATUS_CFGD:
+            case DHCP_STATUS_CFGD_NO_TMR:
+            case DHCP_STATUS_CFGD_LOCAL_LINK:
+
+                 if ((status == DHCP_STATUS_CFGD) ||
+                     (status == DHCP_STATUS_CFGD_NO_TMR)) {
+                     UCOS_Print("UCOS - DHCP configuration successful.\r\n");
+                 } else {
+                     UCOS_Print("UCOS - DHCP Link-Local configuration successful.\r\n");
+                 }
+
+                 size = sizeof(NET_IPv4_ADDR);
+                 DHCPc_GetOptVal(             if_nbr,
+                                              DHCP_OPT_DOMAIN_NAME_SERVER,
+                                (CPU_INT08U *)p_addr_dns,
+                                             &size,
+                                             &err_dhcp);
+
+
+                 done = DEF_YES;
+                 break;
+
+
+            case DHCP_STATUS_FAIL:
+                 DHCPc_Stop(if_nbr, &err_dhcp);
+                 return (DEF_FAIL);
+
+
+            default:
+                 break;
+        }
+    }
+
+    return (DEF_OK);
+}
+#endif /* #if (APP_TCPIP_ENABLED == DEF_ENABLED) */
+#endif /* #if (APP_DHCPC_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_dns-c_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_dns-c_init.c
new file mode 100644
index 0000000..49842f0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_dns-c_init.c
@@ -0,0 +1,83 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                         uC/TCPIP INIT CODE
+*
+* Filename      : ucos_dnsc.init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+#include 
+#include 
+#include 
+
+#if (APP_DNSC_ENABLED == DEF_ENABLED)
+#include 
+#endif
+
+#if (APP_DNSC_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_DNSc_Init (void)
+{
+    DNSc_ERR err_dns;
+
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/DNSc.\r\n");
+#endif
+
+#if (DNSc_CFG_MODE_ASYNC_EN == DEF_DISABLED)
+    DNSc_Init(&DNSc_Cfg, DEF_NULL, &err_dns);
+
+#else
+    DNSc_Init(&DNSc_Cfg, &DNSc_CfgTask, &err_dns);
+#endif
+
+    if (err_dns != DNSc_ERR_NONE) {
+        UCOS_Printf("UCOS - Error initializing uC/DNSc. Error code %d\r\n", err_dns);
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+#endif /* #if (APP_TCPIP_ENABLED == DEF_ENABLED) */
+#endif /* #if (APP_DNSC_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_fs_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_fs_init.c
new file mode 100644
index 0000000..a60155f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_fs_init.c
@@ -0,0 +1,232 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                          uC/FS INIT CODE
+*
+* Filename      : ucos_fs_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if (APP_FS_ENABLED == DEF_ENABLED)
+#include  
+#include  
+
+#if (UCOS_RAMDISK_EN == DEF_ENABLED)
+#include 
+#endif
+
+#if (UCOS_SDCARD_EN == DEF_ENABLED)
+#include 
+#endif
+
+#if (APP_USBH_ENABLED == DEF_ENABLED)
+#include 
+#endif
+
+#if (UCOS_RAMDISK_EN == DEF_ENABLED)
+static CPU_BOOLEAN UCOS_FS_RAMDiskInit (void);
+#endif
+
+#if (UCOS_SDCARD_EN == DEF_ENABLED)
+static CPU_BOOLEAN UCOS_FS_SDCardInit (void);
+#endif
+
+static  const  FS_CFG  App_FS_Cfg = {
+    FS_CFG_MAX_DEV_CNT,                                         /* DevCnt                                               */
+    FS_CFG_MAX_VOL_CNT,                                         /* VolCnt                                               */
+    FS_CFG_MAX_FILE_CNT,                                        /* FileCnt                                              */
+    FS_CFG_MAX_DIR_CNT,                                         /* DirCnt                                               */
+    FS_CFG_MAX_BUF_CNT,                                         /* BufCnt                                               */
+    FS_CFG_MAX_DEV_DRV_CNT,                                     /* DevDrvCnt                                            */
+    FS_CFG_MAX_SEC_SIZE,                                        /* MaxSecSize                                           */
+};
+
+#if (UCOS_RAMDISK_EN == DEF_ENABLED)
+    CPU_INT08U RAMDiskTbl[UCOS_RAMDISK_SIZE*UCOS_RAMDISK_SECTOR_SIZE];
+
+    FS_DEV_RAM_CFG ramdisk_cfg = {
+        UCOS_RAMDISK_SECTOR_SIZE,
+        UCOS_RAMDISK_SIZE,
+        (void *)RAMDiskTbl
+    };
+
+#endif
+
+CPU_BOOLEAN UCOS_FS_Init (void)
+{
+    FS_ERR  err_fs;
+
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/FS.\r\n");
+#endif
+
+    err_fs = FS_Init((FS_CFG *)&App_FS_Cfg);
+
+    if (err_fs != FS_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error initializing uC/FS. Error code %d\r\n", err_fs);
+#endif
+        return (DEF_FAIL);
+    }
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - uC/FS initialization successful.\r\n");
+#endif
+
+#if (UCOS_RAMDISK_EN == DEF_ENABLED)
+    UCOS_FS_RAMDiskInit();
+#endif
+
+#if (UCOS_SDCARD_EN == DEF_ENABLED)
+    UCOS_FS_SDCardInit();
+#endif
+
+#if (APP_USBH_ENABLED == DEF_ENABLED)
+    FS_DevDrvAdd((FS_DEV_API *)&FSDev_MSC, &err_fs);
+#endif
+
+}
+
+#if (UCOS_RAMDISK_EN == DEF_ENABLED)
+static CPU_BOOLEAN UCOS_FS_RAMDiskInit (void)
+{
+    FS_ERR  err_fs;
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Creating RAMDisk.\r\n");
+#endif
+
+    FS_DevDrvAdd((FS_DEV_API *)&FSDev_RAM, &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error adding RAMDisk driver. FS_DevDrvAdd() returned error code %d\r\n", err_fs);
+#endif
+        return (DEF_FAIL);
+    }
+
+    FSDev_Open("ram:0:", &ramdisk_cfg, &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error opening RAMDisk driver. FSDev_Open() returned error code %d\r\n", err_fs);
+#endif
+        return (DEF_FAIL);
+    }
+
+    FSVol_Open("ram:0:", "ram:0:", 0, &err_fs);
+    if (err_fs != FS_ERR_PARTITION_NOT_FOUND) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error opening RAMDisk volume. FSVol_Open() returned error code %d\r\n", err_fs);
+#endif
+        return (DEF_FAIL);
+    }
+
+    FSVol_Fmt("ram:0:", (void *)0, &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error formatting RAMDisk volume. FSVol_Fmt() returned error code %d\r\n", err_fs);
+#endif
+        return (DEF_FAIL);
+    }
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Volume ram:0: opened\r\n");
+#endif
+}
+#endif /* #if (UCOS_RAMDISK_EN == DEF_ENABLED) */
+
+
+#if (UCOS_SDCARD_EN == DEF_ENABLED)
+static CPU_BOOLEAN UCOS_FS_SDCardInit (void)
+{
+    FS_ERR  err_fs;
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing SDCard.\r\n");
+#endif
+
+    FS_DevDrvAdd((FS_DEV_API *)&FSDev_SD_Card, &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error adding SD Card driver. FS_DevDrvAdd() returned error code %d\r\n", err_fs);
+#endif
+        return (DEF_FAIL);
+    }
+
+    FSDev_Open("sdcard:0:", DEF_NULL, &err_fs);
+    if (err_fs != FS_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error opening SD Card device. FSDev_Open() returned error code %d\r\n", err_fs);
+#endif
+        return (DEF_FAIL);
+    }
+
+    FSVol_Open("sdcard:0:", "sdcard:0:", 0, &err_fs);
+    if (err_fs != FS_ERR_NONE && err_fs != FS_ERR_PARTITION_NOT_FOUND) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error opening SD Card volume. FSVol_Open() returned error code %d\r\n", err_fs);
+#endif
+        return (DEF_FAIL);
+    }
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    if (err_fs == FS_ERR_PARTITION_NOT_FOUND) {
+        UCOS_Print("UCOS - Unformatted volume sdcard:0: opened\r\n");
+    } else {
+        UCOS_Print("UCOS - Volume sdcard:0: opened\r\n");
+    }
+#endif
+
+#if 0 /* Do not format the sd card by default. */
+    if (err_fs == FS_ERR_PARTITION_NOT_FOUND) {
+        FSVol_Fmt("sdcard:0:", (void *)0, &err_fs);
+        if (err_fs != FS_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+            UCOS_Printf("UCOS - Error formatting SD Card volume. FSVol_Fmt() returned error code %d\r\n", err_fs);
+#endif
+            return (DEF_FAIL);
+        }
+    }
+#endif
+}
+#endif /* #if (UCOS_SDCARD_EN == DEF_ENABLED) */
+
+#endif /* #if (APP_FS_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_http-c_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_http-c_init.c
new file mode 100644
index 0000000..b15e902
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_http-c_init.c
@@ -0,0 +1,84 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                         uC/TCPIP INIT CODE
+*
+* Filename      : ucos_http-c_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+#include  
+#include  
+#include  
+
+
+#if (APP_HTTPC_ENABLED == DEF_ENABLED)
+#include  
+#endif
+
+
+#if (APP_HTTPC_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_HTTPc_Init (void)
+{
+    HTTPc_ERR    err_httpc;
+
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/HTTPc.\r\n");
+#endif
+
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+    HTTPc_Init(&HTTPc_Cfg, &HTTPc_TaskCfg, DEF_NULL, &err_httpc);
+#else
+    HTTPc_Init(&HTTPc_Cfg, DEF_NULL, DEF_NULL, &err_httpc);
+#endif
+    if (err_httpc != HTTPc_ERR_NONE) {
+        UCOS_Printf("UCOS - Error initializing uC/HTTPc. Error code %d\r\n", err_httpc);
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+#endif /* #if (APP_HTTPC_ENABLED == DEF_ENABLED) */
+#endif /* #if (APP_TCPIP_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_int.h b/src/ucos_v1_42/ucos/bsp/src/ucos_int.h
new file mode 100644
index 0000000..ade631c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_int.h
@@ -0,0 +1,82 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                       (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                        INTERRUPT MANAGEMENT
+*
+* Filename      : ucos_int.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_INT_PRESENT
+#define  UCOS_INT_PRESENT
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+typedef  void  (*UCOS_INT_FNCT_PTR)(void *, CPU_INT32U);
+
+typedef  CPU_INT32U  UCOS_INT_TYPE;
+#define  UCOS_INT_TYPE_LEVEL 0
+#define  UCOS_INT_TYPE_EDGE 1
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOS_IntInit (void);
+
+CPU_BOOLEAN UCOS_IntSrcEn (CPU_INT32U int_id);
+
+CPU_BOOLEAN UCOS_IntSrcDis (CPU_INT32U int_id);
+
+CPU_BOOLEAN UCOS_IntPrioSet (CPU_INT32U int_id, CPU_INT32U int_prio);
+
+CPU_BOOLEAN UCOS_IntTargetSet (CPU_INT32U int_id, CPU_INT32U int_target_list);
+
+CPU_BOOLEAN UCOS_IntTypeSet (CPU_INT32U int_id, UCOS_INT_TYPE type);
+
+CPU_BOOLEAN UCOS_IntVectSet (CPU_INT32U         int_id,
+                             CPU_INT32U         int_prio,
+                             CPU_INT08U         int_target_list,
+                             UCOS_INT_FNCT_PTR  int_fnct,
+                             void              *p_int_arg);
+
+void BSP_IntHandler (void);
+
+
+#endif /* UCOS_INT_PRESENT */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_iperf_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_iperf_init.c
new file mode 100644
index 0000000..2953214
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_iperf_init.c
@@ -0,0 +1,83 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                         uC/IPerf INIT CODE
+*
+* Filename      : ucos_iperf_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if (APP_IPERF_ENABLED == DEF_ENABLED)
+#include 
+#endif
+
+#if (APP_IPERF_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_IPerf_Init (void)
+{
+    NET_SOCK_ADDR_FAMILY ip_type = AF_INET;
+    CPU_BOOLEAN ok;
+    IPERF_ERR err_iperf;
+
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/IPerf.\r\n");
+#endif
+
+    IPerf_Init(&err_iperf);
+
+    if (err_iperf != IPERF_ERR_NONE) {
+        UCOS_Printf("UCOS - Error initializing uC/IPerf. Error code %d.\r\n", err_iperf);
+        return (DEF_FAIL);
+    }
+
+    if (err_iperf == IPERF_ERR_NONE) {
+        IPerfShell_Init(&err_iperf);
+    }
+
+    if (err_iperf != IPERF_ERR_NONE) {
+        UCOS_Printf("UCOS - Error registering uC/IPerf shell commands. Error code %d.\r\n", err_iperf);
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+#endif /* #if (APP_IPERF_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_mqtt-c_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_mqtt-c_init.c
new file mode 100644
index 0000000..f9be5f8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_mqtt-c_init.c
@@ -0,0 +1,100 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                          uC/MQTT INIT CODE
+*
+* Filename      : ucos_mqtt-c_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+#include  
+#include  
+#include  
+
+
+#if (APP_MQTTC_ENABLED == DEF_ENABLED)
+#include  
+#endif
+
+
+#if (APP_MQTTC_ENABLED == DEF_ENABLED)
+
+const  NET_TASK_CFG  MQTTc_TaskCfg = {                          /* Cfg for MQTTc internal task.                         */
+    MQTTc_OS_CFG_TASK_PRIO,                                     /* MQTTc internal task prio.                            */
+    MQTTc_OS_CFG_TASK_STK_SIZE,                                 /* MQTTc internal task stack size.                      */
+    DEF_NULL                                                    /* Ptr to start of MQTTc internal stack.                */
+};
+
+
+const  MQTTc_CFG MQTTc_Cfg = {
+    MQTTc_CFG_MSG_QTY,
+    MQTTc_CFG_INACTIVITY_TIMEOUT,
+    MQTTc_CFG_INTERNAL_TASK_DLY
+};
+
+CPU_BOOLEAN UCOS_MQTTc_Init (void)
+{
+    MQTTc_ERR  err_mqttc;
+
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/MQTT.\r\n");
+#endif
+
+    MQTTc_Init(&MQTTc_Cfg,
+               &MQTTc_TaskCfg,
+                DEF_NULL,
+               &err_mqttc);
+
+    if (err_mqttc != MQTTc_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error initializing uC/MQTTc. Error code %d\r\n", err_mqttc);
+#endif
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+#endif /* #if (APP_MQTTC_ENABLED == DEF_ENABLED) */
+#endif /* #if (APP_TCPIP_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_openamp_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_openamp_init.c
new file mode 100644
index 0000000..7b1b5b8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_openamp_init.c
@@ -0,0 +1,79 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                         OpenAMP INIT CODE
+*
+* Filename      : ucos_openamp_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if (APP_OPENAMP_ENABLED == DEF_ENABLED)
+#include  
+#include  
+#endif
+
+#if (APP_OPENAMP_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_OpenAMP_Init (void)
+{
+    OPENAMP_TASK_INFO task_cfg;
+    RTOS_ERR openamp_err;
+
+    task_cfg.Prio = 10;
+    task_cfg.StkPtr = DEF_NULL;
+    task_cfg.StkSize = 2048;
+    
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing OpenAMP.\r\n");
+#endif
+
+    OpenAMP_Init(DEF_NULL, &task_cfg, &openamp_err);
+    
+    if (openamp_err != RTOS_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error initializing OpenAMP. Error code %d\r\n", openamp_err);
+#endif
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+#endif /* #if (APP_OPENAMP_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_printf.c b/src/ucos_v1_42/ucos/bsp/src/ucos_printf.c
new file mode 100644
index 0000000..2f614df
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_printf.c
@@ -0,0 +1,287 @@
+/*---------------------------------------------------*/
+/* Modified from :                                   */
+/* Public Domain version of printf                   */
+/* Rud Merriam, Compsult, Inc. Houston, Tx.          */
+/* For Embedded Systems Programming, 1991            */
+/*                                                   */
+/*---------------------------------------------------*/
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+typedef char* charptr;
+typedef int (*func_ptr)(int c);
+
+
+typedef struct params_s {
+    int len;
+    int num1;
+    int num2;
+    char pad_character;
+    int do_padding;
+    int left_flag;
+} params_t;
+
+void outbyte (char c);
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine puts pad characters into the output  */
+/* buffer.                                           */
+/*                                                   */
+static void padding( const int l_flag, params_t *par)
+{
+    int i;
+
+    if (par->do_padding && l_flag && (par->len < par->num1))
+        for (i=par->len; inum1; i++) {
+#ifdef STDOUT_BASEADDRESS
+            outbyte( par->pad_character);
+#endif
+    }
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a string to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+static void outs( charptr lp, params_t *par)
+{
+    /* pad on left if needed                         */
+    par->len = strlen( lp);
+    padding( !(par->left_flag), par);
+
+    /* Move string to the buffer                     */
+    while (*lp && (par->num2)--) {
+#ifdef STDOUT_BASEADDRESS
+        outbyte( *lp++);
+#endif
+}
+
+    /* Pad on right if needed                        */
+    /* CR 439175 - elided next stmt. Seemed bogus.   */
+    /* par->len = strlen( lp);                       */
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a number to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+
+static void outnum( const long n, const long base, params_t *par)
+{
+    charptr cp;
+    int negative;
+    char outbuf[32];
+    const char digits[] = "0123456789ABCDEF";
+    unsigned long num;
+
+    /* Check if number is negative                   */
+    if (base == 10 && n < 0L) {
+        negative = 1;
+        num = -(n);
+    }
+    else{
+        num = (n);
+        negative = 0;
+    }
+
+    /* Build number (backwards) in outbuf            */
+    cp = outbuf;
+    do {
+        *cp++ = digits[(int)(num % base)];
+    } while ((num /= base) > 0);
+    if (negative)
+        *cp++ = '-';
+    *cp-- = 0;
+
+    /* Move the converted number to the buffer and   */
+    /* add in the padding where needed.              */
+    par->len = strlen(outbuf);
+    padding( !(par->left_flag), par);
+#ifdef STDOUT_BASEADDRESS
+    while (cp >= outbuf) {
+        outbyte( *cp--);
+}
+#endif
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine gets a number from the format        */
+/* string.                                           */
+/*                                                   */
+static int getnum( charptr* linep)
+{
+    int n;
+    charptr cp;
+
+    n = 0;
+    cp = *linep;
+    while (isdigit(((int)*cp)))
+        n = n*10 + ((*cp++) - '0');
+    *linep = cp;
+    return(n);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine operates just like a printf/sprintf  */
+/* routine. It outputs a set of data under the       */
+/* control of a formatting string. Not all of the    */
+/* standard C format control are supported. The ones */
+/* provided are primarily those needed for embedded  */
+/* systems work. Primarily the floaing point         */
+/* routines are omitted. Other formats could be      */
+/* added easily by following the examples shown for  */
+/* the supported formats.                            */
+/*                                                   */
+
+/* void esp_printf( const func_ptr f_ptr,
+   const charptr ctrl1, ...) */
+void UCOS_Printf( const char *ctrl1, ...)
+{
+
+    int long_flag;
+    int dot_flag;
+
+    params_t par;
+
+    char ch;
+    va_list argp;
+    char *ctrl = (char *)ctrl1;
+
+    va_start( argp, ctrl1);
+
+    for ( ; *ctrl; ctrl++) {
+
+        /* move format string chars to buffer until a  */
+        /* format control is found.                    */
+        if (*ctrl != '%') {
+#ifdef STDOUT_BASEADDRESS
+            outbyte(*ctrl);
+#endif
+            continue;
+        }
+
+        /* initialize all the flags for this format.   */
+        dot_flag   = long_flag = par.left_flag = par.do_padding = 0;
+        par.pad_character = ' ';
+        par.num2=32767;
+
+ try_next:
+        ch = *(++ctrl);
+
+        if (isdigit((int)ch)) {
+            if (dot_flag)
+                par.num2 = getnum(&ctrl);
+            else {
+                if (ch == '0')
+                    par.pad_character = '0';
+
+                par.num1 = getnum(&ctrl);
+                par.do_padding = 1;
+            }
+            ctrl--;
+            goto try_next;
+        }
+
+        switch (tolower((int)ch)) {
+            case '%':
+#ifdef STDOUT_BASEADDRESS
+                outbyte( '%');
+#endif
+                continue;
+
+            case '-':
+                par.left_flag = 1;
+                break;
+
+            case '.':
+                dot_flag = 1;
+                break;
+
+            case 'l':
+                long_flag = 1;
+                break;
+
+            case 'd':
+                if (long_flag || ch == 'D') {
+                    outnum( va_arg(argp, long), 10L, &par);
+                    continue;
+                }
+                else {
+                    outnum( va_arg(argp, int), 10L, &par);
+                    continue;
+                }
+            case 'x':
+                outnum((long)va_arg(argp, int), 16L, &par);
+                continue;
+
+            case 's':
+                outs( va_arg( argp, char *), &par);
+                continue;
+
+            case 'c':
+#ifdef STDOUT_BASEADDRESS
+                outbyte( va_arg( argp, int));
+#endif
+                continue;
+
+            case '\\':
+                switch (*ctrl) {
+                    case 'a':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( 0x07);
+#endif
+                        break;
+                    case 'h':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( 0x08);
+#endif
+                        break;
+                    case 'r':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( 0x0D);
+#endif
+                        break;
+                    case 'n':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( 0x0D);
+                        outbyte( 0x0A);
+#endif
+                        break;
+                    default:
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( *ctrl);
+#endif
+                        break;
+                }
+                ctrl++;
+                break;
+
+            default:
+                continue;
+        }
+        goto try_next;
+    }
+    va_end( argp);
+}
+
+/*---------------------------------------------------*/
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_printf.h b/src/ucos_v1_42/ucos/bsp/src/ucos_printf.h
new file mode 100644
index 0000000..f37baa6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_printf.h
@@ -0,0 +1,39 @@
+ #ifndef XIL_PRINTF_H
+ #define XIL_PRINTF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include 
+#include 
+#include 
+#include "xparameters.h"
+#include "xil_types.h"
+
+/*----------------------------------------------------*/
+/* Use the following parameter passing structure to   */
+/* make xil_printf re-entrant.                        */
+/*----------------------------------------------------*/
+
+struct params_s;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+typedef char* charptr;
+typedef int (*func_ptr)(int c);
+
+void xil_printf( const char *ctrl1, ...);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_shell_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_shell_init.c
new file mode 100644
index 0000000..62cda51
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_shell_init.c
@@ -0,0 +1,72 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                         uC/TCPIP INIT CODE
+*
+* Filename      : ucos_dhcp-c_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if (APP_SHELL_ENABLED == DEF_ENABLED)
+#include 
+#endif
+
+#if (APP_SHELL_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_Shell_Init (void)
+{
+    CPU_BOOLEAN err_shell;
+
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/Shell.\r\n");
+#endif
+
+    err_shell = Shell_Init();
+
+    if (err_shell != DEF_OK) {
+        UCOS_Printf("UCOS - Error initializing uC/Shell.\r\n");
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+#endif /* #if (APP_SHELL_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_startup.c b/src/ucos_v1_42/ucos/bsp/src/ucos_startup.c
new file mode 100644
index 0000000..423b437
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_startup.c
@@ -0,0 +1,202 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                            STARTUP CODE
+*
+* Filename      : ucos_startup.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if (APP_OSIII_ENABLED == DEF_ENABLED)
+#include 
+#include 
+#else
+#include 
+#include 
+#endif /* (APP_OSIII_ENABLED == DEF_ENABLED) */
+
+#if (APP_OSIII_ENABLED == DEF_ENABLED)
+static OS_TCB StartupTaskTCB;
+#endif
+
+static CPU_STK StartupTaskStk[UCOS_START_TASK_STACK_SIZE];
+
+static void StartupTask (void *p_arg);
+
+void MainTask (void *p_arg);
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UCOSStartup (CPU_FNCT_PTR initial_func)
+{
+#if (APP_OSIII_ENABLED == DEF_ENABLED)
+    OS_ERR  os_err;
+#endif
+
+    UCOS_LowLevelInit();
+
+    CPU_Init();
+    Mem_Init();
+
+#if (APP_OSIII_ENABLED == DEF_ENABLED)
+    OSInit(&os_err);
+#else
+    OSInit();
+#endif
+
+#if (APP_OSIII_ENABLED == DEF_ENABLED)
+    OSTaskCreate(&StartupTaskTCB,
+                  "Main Task",
+                  StartupTask,
+                  (void *)initial_func,
+                  UCOS_START_TASK_PRIO,
+                 &StartupTaskStk[0],
+                  0,
+                  UCOS_START_TASK_STACK_SIZE,
+                  0,
+                  0,
+                  DEF_NULL,
+                 (OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR),
+                 &os_err);
+#else
+    OSTaskCreateExt( StartupTask,
+                    (void *)initial_func,
+                    &StartupTaskStk[UCOS_START_TASK_STACK_SIZE - 1],
+                    UCOS_START_TASK_PRIO,
+                    UCOS_START_TASK_PRIO,
+                    &StartupTaskStk[0],
+                    UCOS_START_TASK_STACK_SIZE,
+                     DEF_NULL,
+                    (OS_TASK_OPT_STK_CLR | OS_TASK_OPT_STK_CHK));
+#endif
+
+#if (APP_OSIII_ENABLED == DEF_ENABLED)
+    OSStart(&os_err);
+#else
+    OSStart();
+#endif
+
+    return DEF_OK;
+}
+
+
+static void StartupTask (void *p_arg)
+{
+    KAL_ERR kal_err;
+    CPU_INT32U tick_rate;
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    MEM_SEG_INFO seg_info;
+    LIB_ERR lib_err;
+#endif
+#if (APP_OSIII_ENABLED == DEF_ENABLED)
+    OS_ERR  os_err;
+#endif
+
+    UCOS_IntInit();                                             /* Initialize interrupt controller.                     */
+
+#if (APP_OSIII_ENABLED == DEF_ENABLED)
+    tick_rate = OS_CFG_TICK_RATE_HZ;
+#endif
+
+#if (APP_OSII_ENABLED == DEF_ENABLED)
+    tick_rate = OS_TICKS_PER_SEC;
+#endif
+
+    UCOS_TmrTickInit(tick_rate);                                /* Configure and enable OS tick interrupt.              */
+
+#if (APP_OSIII_ENABLED == DEF_ENABLED)
+#if (OS_CFG_STAT_TASK_EN == DEF_ENABLED)
+    OSStatTaskCPUUsageInit(&os_err);
+#endif
+#endif
+
+    KAL_Init(DEF_NULL, &kal_err);
+
+    UCOS_StdInOutInit();
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - uC/OS Init Started.\r\n");
+    UCOS_Print("UCOS - STDIN/STDOUT Device Initialized.\r\n");
+#endif
+
+#if (APP_SHELL_ENABLED == DEF_ENABLED)
+    UCOS_Shell_Init();
+#endif
+
+#if ((APP_FS_ENABLED == DEF_ENABLED) && (UCOS_CFG_INIT_FS == DEF_ENABLED))
+    UCOS_FS_Init();
+#endif
+
+#if ((APP_TCPIP_ENABLED == DEF_ENABLED) && (UCOS_CFG_INIT_NET == DEF_ENABLED))
+    UCOS_TCPIP_Init();
+#endif /* (APP_TCPIP_ENABLED == DEF_ENABLED) */
+
+#if ((APP_USBD_ENABLED == DEF_ENABLED) && (UCOS_CFG_INIT_USBD == DEF_ENABLED) && (UCOS_USB_TYPE == UCOS_USB_TYPE_DEVICE))
+    UCOS_USBD_Init();
+#endif /* #if (APP_USBD_ENABLED == DEF_ENABLED) */
+
+#if ((APP_USBH_ENABLED == DEF_ENABLED) && (UCOS_CFG_INIT_USBH == DEF_ENABLED) && (UCOS_USB_TYPE == UCOS_USB_TYPE_HOST))
+    UCOS_USBH_Init();
+#endif /* #if (APP_USBH_ENABLED == DEF_ENABLED) */
+
+#if ((APP_OPENAMP_ENABLED == DEF_ENABLED) && (UCOS_CFG_INIT_OPENAMP == DEF_ENABLED))
+    UCOS_OpenAMP_Init();
+#endif /* #if (APP_OPENAMP_ENABLED == DEF_ENABLED) */
+
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    Mem_SegRemSizeGet(DEF_NULL, 4, &seg_info, &lib_err);
+
+    UCOS_Printf ("UCOS - UCOS init done\r\n");
+    UCOS_Printf ("UCOS - Total configured heap size. %d\r\n", seg_info.TotalSize);
+    UCOS_Printf ("UCOS - Total used size after init. %d\r\n", seg_info.UsedSize);
+#endif
+
+    (*((CPU_FNCT_PTR)(p_arg)))(DEF_NULL);
+
+}
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_stdinout.c b/src/ucos_v1_42/ucos/bsp/src/ucos_stdinout.c
new file mode 100644
index 0000000..44f0157
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_stdinout.c
@@ -0,0 +1,132 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                          STDIN and STDOUT
+*
+* Filename      : ucos_stdinout.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  "ucos_int.h"
+#include  
+
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART)
+#include  
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART) */
+
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE)
+#include  
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE) */
+
+
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART)
+UARTPS_HANDLE  STDOUT_Handle;
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART) */
+
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE)
+AXIUARTLITE_HANDLE STDOUT_Handle;
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE) */
+
+void outbyte (char c);
+
+
+void UCOS_StdInOutInit()
+{
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART)
+    STDOUT_Handle = UARTPS_Init(UCOS_STDOUT_DEVICE_ID);
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART) */
+
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE)
+    STDOUT_Handle = AXIUARTLite_Init(UCOS_STDOUT_DEVICE_ID);
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE) */
+
+}
+
+
+void  UCOS_Print (const CPU_CHAR *p_string)
+{
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART)
+    UARTPS_WrStr(STDOUT_Handle, p_string);
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART) */
+
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE)
+    AXIUARTLite_WrStr(STDOUT_Handle, p_string);
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE) */
+}
+
+
+CPU_INT32U UCOS_Read (CPU_CHAR *buf, CPU_INT32U cnt)
+{
+    CPU_INT32U i = 0;
+
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART)
+    for (i = 0; i < cnt; i++) {
+        *(buf + i) = UARTPS_RdByte(STDOUT_Handle);
+        if ((*(buf + i) == '\n' || *(buf + i) == '\r'))
+        {
+            i++;
+            break;
+        }
+    }
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART) */
+
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE)
+    for (i = 0; i < cnt; i++) {
+        *(buf + i) = AXIUARTLite_RdByte(STDOUT_Handle);
+        if ((*(buf + i) == '\n' || *(buf + i) == '\r'))
+        {
+            i++;
+            break;
+        }
+    }
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE) */
+
+    return i;
+}
+
+
+void outbyte (char c)
+{
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART)
+    UARTPS_WrByte(STDOUT_Handle, c);
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_PS7_UART) */
+
+#if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE)
+    AXIUARTLite_WrByte(STDOUT_Handle, c);
+#endif /* #if (UCOS_STDOUT_DRIVER == UCOS_UART_AXI_UART_LITE) */
+}
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_tcpip_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_tcpip_init.c
new file mode 100644
index 0000000..4ea8487
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_tcpip_init.c
@@ -0,0 +1,668 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                        uC/TCP-IP INIT CODE
+*
+* Filename      : ucos_tcpip.init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+#include  
+#include  
+#include  
+#include  
+#include  
+
+#include  
+#include  
+
+#if (APP_DHCPC_ENABLED == DEF_ENABLED)
+#include  
+#endif
+
+CPU_BOOLEAN UCOS_TCPIP_InitGEM (void);
+CPU_BOOLEAN UCOS_TCPIP_InitAXIEthLite (void);
+CPU_BOOLEAN UCOS_TCPIP_InitAXIEth (void);
+CPU_BOOLEAN UCOS_TCPIP_IF_Cfg (CPU_INT32U if_nbr);
+#endif /* #if (APP_TCPIP_ENABLED == DEF_ENABLED) */
+
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+#if (UCOS_ETHERNET_DRIVER == UCOS_ETHERNET_EMACPS)
+#if (UCOS_CPU_TYPE == UCOS_CPU_TYPE_PS7)
+#include 
+#else
+#include 
+#endif
+
+#include 
+#endif
+
+#if (UCOS_ETHERNET_DRIVER == UCOS_ETHERNET_AXIETHLITE)
+#include 
+#include 
+#include 
+#include 
+#endif
+
+#if (UCOS_ETHERNET_DRIVER == UCOS_ETHERNET_AXIETH)
+#include 
+#include 
+#include 
+#endif
+
+#include 
+#include 
+#endif
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+NET_DEV_CFG_ETHER NetDevCfg;
+extern NET_DEV_CFG_ETHER NetDev_GEM_1;
+NET_PHY_CFG_ETHER NetPhyCfg;
+#endif
+
+
+CPU_BOOLEAN UCOS_TCPIP_Init (void)
+{
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+    NET_ERR         err_net;
+#endif /* #if (APP_TCPIP_ENABLED == DEF_ENABLED) */
+    CPU_BOOLEAN     res = DEF_OK;
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/TCP-IP.\r\n");
+#endif
+
+#if (APP_TCPIP_EXP_ENABLED == DEF_DISABLED)
+    err_net = Net_Init(&NetRxTaskCfg,
+                       &NetTxDeallocTaskCfg,
+                       &NetTmrTaskCfg);
+#else
+    err_net = Net_Init(&NetTaskCfg,
+                        DEF_NULL,
+                       &err_net);
+#endif
+    if (err_net != NET_ERR_NONE) {
+        UCOS_Printf("UCOS - Error initializing uC/TCP-IP. Error code %d\r\n", err_net);
+        return (DEF_FAIL);
+    }
+
+#if (APP_DHCPC_ENABLED == DEF_ENABLED)
+    UCOS_DHCPc_Init();
+#endif
+
+#if (APP_DNSC_ENABLED == DEF_ENABLED)
+    UCOS_DNSc_Init();
+#endif
+
+#if (APP_HTTPC_ENABLED == DEF_ENABLED)
+    UCOS_HTTPc_Init();
+#endif
+
+#if (APP_MQTTC_ENABLED == DEF_ENABLED)
+    UCOS_MQTTc_Init();
+#endif
+
+#if (APP_TELNETS_ENABLED == DEF_ENABLED)
+    UCOS_TELNETs_Init();
+#endif
+
+#if (APP_IPERF_ENABLED == DEF_ENABLED)
+    UCOS_IPerf_Init();
+#endif
+
+#if (UCOS_ETHERNET_DRIVER == UCOS_ETHERNET_EMACPS)
+    res = UCOS_TCPIP_InitGEM();
+#elif (UCOS_ETHERNET_DRIVER == UCOS_ETHERNET_AXIETHLITE)
+    res = UCOS_TCPIP_InitAXIEthLite();
+#else
+    UCOS_Print("UCOS - No Interface to initialize.\r\n");
+#endif
+
+#endif /* #if (APP_TCPIP_ENABLED == DEF_ENABLED) */
+
+    return (res);
+}
+
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_TCPIP_IF_Cfg (CPU_INT32U if_nbr)
+{
+    NET_ERR         err_net;
+#ifdef NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR   addr_ipv4;
+    NET_IPv4_ADDR   msk_ipv4;
+    NET_IPv4_ADDR   gateway_ipv4;
+#endif
+    NET_IPv6_ADDR      addr_ip;
+    NET_IP_ADDR_FAMILY addr_family;
+    CPU_BOOLEAN        cfg_success;
+    NET_IPv4_ADDR      addr_tbl[NET_IPv4_CFG_IF_MAX_NBR_ADDR];
+    NET_IP_ADDRS_QTY   addr_ip_tbl_qty;
+    CPU_CHAR           ip_str[20];
+
+
+#if ((APP_DHCPC_ENABLED == DEF_ENABLED) && (UCOS_ETHERNET_DHCP == DEF_ENABLED))
+    cfg_success = UCOS_DHCPc_IF_Init(if_nbr);
+    if (cfg_success == DEF_OK) {
+        goto cfg_done;
+    }
+#endif /* #if ((APP_DHCPC_ENABLED == DEF_ENABLED) && (UCOS_ETHERNET_DHCP == DEF_ENABLED)) */
+
+    addr_family = NetASCII_Str_to_IP(UCOS_ETHERNET_ADDRESS,
+                                     &addr_ip,
+                                     NET_IPv6_ADDR_SIZE,
+                                     &err_net);
+    if (err_net != NET_ASCII_ERR_NONE) {
+        if ((err_net == NET_ASCII_ERR_IP_FAMILY_NOT_PRESENT) && (addr_family == NET_IP_ADDR_FAMILY_IPv6)) {
+            UCOS_Printf("UCOS - Error configuring IP address. IPv6 address specified but IPv6 support disabled. Check ucos_tcpip configuration.\r\n", err_net);
+        } else {
+            UCOS_Printf("UCOS - Error configuring IP address. Error code %d.\r\n", err_net);
+        }
+        return (DEF_FAIL);
+    }
+
+    if (addr_family == NET_IP_ADDR_FAMILY_IPv4) {
+        NetASCII_Str_to_IP(UCOS_ETHERNET_ADDRESS,
+                           &addr_ipv4,
+                           NET_IPv4_ADDR_SIZE,
+                           &err_net);
+
+        NetASCII_Str_to_IP(UCOS_ETHERNET_SUBMASK,
+                                         &msk_ipv4,
+                                         NET_IPv4_ADDR_SIZE,
+                                         &err_net);
+
+        if (err_net != NET_ASCII_ERR_NONE) {
+            UCOS_Printf("UCOS - Error configuring subnet mask. Error code %d.\r\n", err_net);
+            return (DEF_FAIL);
+        }
+
+        NetASCII_Str_to_IP(UCOS_ETHERNET_GATEWAY,
+                           &gateway_ipv4,
+                           NET_IPv4_ADDR_SIZE,
+                          &err_net);
+
+        if (err_net != NET_ASCII_ERR_NONE) {
+            UCOS_Printf("UCOS - Error configuring default gateway. Error code %d.\r\n", err_net);
+            return (DEF_FAIL);
+        }
+
+        NetIPv4_CfgAddrAdd(if_nbr,
+                           addr_ipv4,
+                           msk_ipv4,
+                           gateway_ipv4,
+                          &err_net);
+        if (err_net != NET_IPv4_ERR_NONE) {
+            UCOS_Printf("UCOS - Error configuring gem interface. Error code %d.\r\n", err_net);
+            return (DEF_FAIL);
+        }
+    } else {
+#ifdef NET_IPv6_MODULE_EN
+        NetASCII_Str_to_IP(UCOS_ETHERNET_ADDRESS,
+                           &addr_ip,
+                            NET_IPv6_ADDR_SIZE,
+                           &err_net);
+
+        NetIPv6_CfgAddrAdd(if_nbr,
+                          &addr_ip,
+                           64u,
+                           0u,
+                          &err_net);
+        if (err_net != NET_IPv6_ERR_NONE) {
+            UCOS_Printf("UCOS - Error configuring gem interface. Error code %d.\r\n", err_net);
+            return (DEF_FAIL);
+        }
+#endif
+    }
+
+
+cfg_done:
+    addr_ip_tbl_qty = sizeof(addr_tbl) / sizeof(NET_IPv4_ADDR);
+    (void)NetIPv4_GetAddrHost( if_nbr,
+                              &addr_tbl[0],
+                              &addr_ip_tbl_qty,
+                              &err_net);
+    if (err_net != NET_IPv4_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    UCOS_Printf("UCOS - Interface %d configured.\r\n", if_nbr);
+
+    NetASCII_IPv4_to_Str( addr_tbl[0],
+                          ip_str,
+                          DEF_NO,
+                         &err_net);
+    UCOS_Printf("UCOS - IP: %s\r\n", ip_str);
+
+    gateway_ipv4 = NetIPv4_GetAddrDfltGateway(addr_tbl[0], &err_net);
+    NetASCII_IPv4_to_Str( gateway_ipv4,
+                          ip_str,
+                          DEF_NO,
+                         &err_net);
+    UCOS_Printf("UCOS - Gateway: %s\r\n", ip_str);
+
+    msk_ipv4 = NetIPv4_GetAddrSubnetMask(addr_tbl[0], &err_net);
+    NetASCII_IPv4_to_Str( msk_ipv4,
+                          ip_str,
+                          DEF_NO,
+                         &err_net);
+    UCOS_Printf("UCOS - Subnet: %s\r\n", ip_str);
+
+    return (DEF_OK);
+}
+#endif
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_TCPIP_IfCfgInit (NET_DEV_CFG_ETHER *Cfg)
+{
+    CPU_INT32U rx_desc_nbr;
+    CPU_INT32U tx_desc_nbr;
+
+    Cfg->RxBufPoolType = NET_IF_MEM_TYPE_MAIN;
+    Cfg->RxBufLargeSize = 1536;
+    Cfg->RxBufLargeNbr = UCOS_IF_RX_BUF_NBR;
+    Cfg->RxBufAlignOctets = 32;
+    Cfg->RxBufIxOffset = 0;
+    Cfg->TxBufPoolType = NET_IF_MEM_TYPE_MAIN;
+    Cfg->TxBufLargeSize = 1632;
+    Cfg->TxBufLargeNbr = UCOS_IF_TX_LARGE_BUF_NBR;
+    Cfg->TxBufSmallSize = 64u;
+    Cfg->TxBufSmallNbr = UCOS_IF_TX_SMALL_BUF_NBR;
+    Cfg->TxBufAlignOctets = 32;
+    Cfg->TxBufIxOffset = 0;
+    Cfg->Flags = 0;
+
+#if (UCOS_IF_RX_DESC_NBR != 0)
+    Cfg->RxDescNbr = UCOS_IF_RX_DESC_NBR;
+#else
+    rx_desc_nbr = UCOS_IF_RX_BUF_NBR / 2;
+
+    if (rx_desc_nbr < 2) {
+        rx_desc_nbr = 2;
+    }
+
+    if (rx_desc_nbr > 64) {
+        rx_desc_nbr = 64;
+    }
+
+    Cfg->RxDescNbr = rx_desc_nbr;
+#endif
+
+#if (UCOS_IF_TX_DESC_NBR != 0)
+    Cfg->TxDescNbr = UCOS_IF_TX_DESC_NBR;
+#else
+    tx_desc_nbr = UCOS_IF_TX_LARGE_BUF_NBR / 2;
+
+    if (tx_desc_nbr < 2) {
+        tx_desc_nbr = 2;
+    }
+
+    if (tx_desc_nbr > 32) {
+        tx_desc_nbr = 32;
+    }
+
+    Cfg->TxDescNbr = tx_desc_nbr;
+#endif
+
+#if (UCOS_IF_DEDIC_MEM_ADDR != 0)
+    Cfg->MemAddr = UCOS_IF_DEDIC_MEM_ADDR;
+    Cfg->MemSize = UCOS_IF_DEDIC_MEM_SIZE;
+#else
+    Cfg->MemAddr = 0u;
+    Cfg->MemSize = 0u;
+#endif
+
+    Cfg->BaseAddr = 0u;
+    Cfg->DataBusSizeNbrBits = 0;
+
+    Str_Copy_N(Cfg->HW_AddrStr, UCOS_IF_HW_ADDR, 17);
+
+    return (DEF_OK);
+}
+#endif /* #if (APP_TCPIP_ENABLED == DEF_ENABLED) */
+
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_TCPIP_PhyCfgInit (NET_PHY_CFG_ETHER *Cfg)
+{
+    if (UCOS_PHY_BUS_ADDR == 255)
+        Cfg->BusAddr = UCOS_PHY_BUS_ADDR;
+    else
+        Cfg->BusAddr = NET_PHY_ADDR_AUTO;
+
+    switch (UCOS_PHY_BUS_MODE) {
+        case UCOS_NET_PHY_BUS_MODE_MII:
+            Cfg->BusMode = NET_PHY_BUS_MODE_MII;
+            break;
+
+        case UCOS_NET_PHY_BUS_MODE_RMII:
+            Cfg->BusMode = NET_PHY_BUS_MODE_RMII;
+            break;
+
+        case UCOS_NET_PHY_BUS_MODE_SMII:
+            Cfg->BusMode = NET_PHY_BUS_MODE_SMII;
+            break;
+
+        case UCOS_NET_PHY_BUS_MODE_GMII:
+            Cfg->BusMode = NET_PHY_BUS_MODE_GMII;
+            break;
+
+        default:
+            Cfg->BusMode = NET_PHY_BUS_MODE_GMII;
+            break;
+    }
+
+    if (UCOS_PHY_TYPE == UCOS_NET_PHY_TYPE_INT)
+        Cfg->Type = NET_PHY_TYPE_INT;
+    else
+        Cfg->Type = NET_PHY_TYPE_EXT;
+
+    switch (UCOS_PHY_SPEED) {
+        case UCOS_NET_PHY_SPD_10:
+            Cfg->Spd = NET_PHY_SPD_10;
+            break;
+
+        case UCOS_NET_PHY_SPD_100:
+            Cfg->Spd = NET_PHY_SPD_100;
+            break;
+
+        case UCOS_NET_PHY_SPD_1000:
+            Cfg->Spd = NET_PHY_SPD_1000;
+            break;
+
+        case UCOS_NET_PHY_SPD_AUTO:
+        default:
+            Cfg->Spd = UCOS_NET_PHY_SPD_AUTO;
+            break;
+    }
+
+    if (UCOS_PHY_DUPLEX == UCOS_NET_PHY_DUPLEX_AUTO)
+        Cfg->Duplex = NET_PHY_DUPLEX_AUTO;
+    else if (UCOS_PHY_DUPLEX == UCOS_NET_PHY_DUPLEX_HALF)
+        Cfg->Duplex = NET_PHY_DUPLEX_HALF;
+    else
+        Cfg->Duplex = NET_PHY_DUPLEX_FULL;
+}
+#endif /* #if (APP_TCPIP_ENABLED == DEF_ENABLED) */
+
+#if (APP_TCPIP_ENABLED == DEF_ENABLED)
+#if (UCOS_ETHERNET_DRIVER == UCOS_ETHERNET_EMACPS)
+CPU_BOOLEAN UCOS_TCPIP_InitGEM (void)
+{
+    NET_IF_NBR        if_nbr;
+    NET_ERR           err_net;
+    CPU_BOOLEAN       if_init_res;
+
+
+    UCOS_Print("UCOS - Initializing GEM Interface.\r\n");
+
+    UCOS_TCPIP_IfCfgInit(&NetDev_GEM_1);
+
+#if (UCOS_CPU_TYPE == UCOS_CPU_TYPE_PS7)
+#if (UCOS_IF_DEDIC_MEM_ADDR != 0)
+    NetDevCfg.MemAddr = UCOS_IF_DEDIC_MEM_ADDR;
+    NetDevCfg.MemSize = UCOS_IF_DEDIC_MEM_SIZE;
+#else
+    NetDev_GEM_1.MemAddr = 0xFFFF0000u;
+    NetDev_GEM_1.MemSize = 0x4000;
+#endif
+
+#if (UCOS_ETHERNET_DEVICE_ID == 0)                              /* Base address is returned as 0 from HSI, hardcode for now.*/
+    NetDev_GEM_1.BaseAddr = 0xE000B000u;
+#else
+    NetDevCfg.BaseAddr = 0xE000C000u;
+#endif
+
+    UCOS_TCPIP_PhyCfgInit(&NetPhyCfg);
+
+    if_nbr = NetIF_Add((void    *)&NetIF_API_Ether,
+                       (void    *)&NetDev_API_GEM,
+                       (void    *)&NetDev_BSP_GEM_0,
+                       (void    *)&NetDev_GEM_1,
+                       (void    *)&NetPhy_API_88E1111,
+                       (void    *)&NetPhyCfg,
+#if (APP_TCPIP_EXP_ENABLED == DEF_ENABLED)
+                                  DEF_NULL,
+#endif
+                                  &err_net);
+#else
+
+#if (UCOS_IF_DEDIC_MEM_ADDR != 0)
+    NetDevCfg.MemAddr = UCOS_IF_DEDIC_MEM_ADDR;
+    NetDevCfg.MemSize = UCOS_IF_DEDIC_MEM_SIZE;
+#else
+    NetDevCfg.MemAddr = 0xFFFC0000u;
+    NetDevCfg.MemSize = 0x40000;
+#endif
+
+    NetDevCfg.BaseAddr = 0xFF0E0000u;
+    NetDevCfg.RxBufPoolType = NET_IF_MEM_TYPE_DEDICATED;
+    NetDevCfg.TxBufPoolType = NET_IF_MEM_TYPE_DEDICATED;
+
+
+    UCOS_TCPIP_PhyCfgInit(&NetPhyCfg);
+
+    if_nbr = NetIF_Add((void    *)&NetIF_API_Ether,
+                       (void    *)&NetDev_API_GEM64,
+                       (void    *)&NetDev_BSP_Ultrascale_GEM_3,
+                       (void    *)&NetDevCfg,
+                       (void    *)&NetPhy_API_DP83867IR,
+                       (void    *)&NetPhyCfg,
+#if (APP_TCPIP_EXP_ENABLED == DEF_ENABLED)
+                                  DEF_NULL,
+#endif
+                                  &err_net);
+#endif
+
+    if (err_net != NET_IF_ERR_NONE) {
+        UCOS_Printf("UCOS - Error initializing GEM Interface. Error code %d\r\n", err_net);
+        return (DEF_FAIL);
+    }
+
+    UCOS_Printf("UCOS - GEM Interface initialized successfully with if number %d.\r\n", if_nbr);
+
+    UCOS_Print("UCOS - Starting GEM Interface.\r\n");
+    NetIF_Start(if_nbr, &err_net);
+    if (err_net != NET_IF_ERR_NONE) {
+        UCOS_Printf("UCOS - Error starting GEM Interface. Error code %d\r\n", err_net);
+        return (DEF_FAIL);
+    }
+
+    UCOS_Print("UCOS - GEM Interface started successfully.\r\n");
+
+#if (UCOS_CPU_TYPE == UCOS_CPU_TYPE_PSUA53)
+                                                                /* Enable Tx and Rx clock shift for the PHY.            */
+    NetPhy_DP83867IR_DelayCfg( if_nbr,
+                               DEF_YES,
+                               0xA,                             /* Tx Clock Shift: 2.75 nS.                             */
+                               DEF_YES,
+                               0x8,                             /* Rx Clock Shift: 2.25 nS.                             */
+                              &err_net);
+
+    if (err_net != NET_PHY_ERR_NONE) {
+        UCOS_Printf("UCOS - Error configuring DP83867IR PHY. Error code %d\r\n", err_net);
+        return (DEF_FAIL);
+    }
+#endif
+
+    if_init_res = UCOS_TCPIP_IF_Cfg(if_nbr);
+
+    return (if_init_res);
+}
+#endif
+
+#if (UCOS_ETHERNET_DRIVER == UCOS_ETHERNET_AXIETHLITE)
+
+extern UCOS_AXIETHERNETLITE_Config UCOS_AXIETHERNETLITE_ConfigTable[];
+
+CPU_BOOLEAN UCOS_TCPIP_InitAXIEthLite (void)
+{
+    NET_IF_NBR if_nbr;
+    NET_ERR err_net;
+#ifdef NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR addr_ipv4;
+    NET_IPv4_ADDR msk_ipv4;
+    NET_IPv4_ADDR gateway_ipv4;
+#endif
+    NET_IPv6_ADDR addr_ip;
+    NET_IP_ADDR_FAMILY addr_family;
+    CPU_BOOLEAN if_init_res;
+
+
+    UCOS_Print("UCOS - Initializing Ethernet Lite Interface.\r\n");
+
+    UCOS_TCPIP_IfCfgInit(&NetDevCfg);
+
+    NetDevCfg.MemAddr = 0;
+    NetDevCfg.MemSize = 0;
+
+    if (UCOS_AXIETHERNETLITE_ConfigTable[UCOS_ETHERNET_DEVICE_ID].RxPong != 0) {
+        NetDevCfg.RxDescNbr = 2;
+    } else {
+        NetDevCfg.RxDescNbr = 1;
+    }
+
+    if (UCOS_AXIETHERNETLITE_ConfigTable[UCOS_ETHERNET_DEVICE_ID].TxPong != 0) {
+        NetDevCfg.TxDescNbr = 2;
+    } else {
+        NetDevCfg.TxDescNbr = 1;
+    }
+
+    NetDevCfg.BaseAddr = UCOS_AXIETHERNETLITE_ConfigTable[UCOS_ETHERNET_DEVICE_ID].BaseAddress;
+
+    UCOS_TCPIP_PhyCfgInit(&NetPhyCfg);
+
+    NetPhyCfg.BusMode = NET_PHY_BUS_MODE_MII;
+
+    if_nbr = NetIF_Add((void    *)&NetIF_API_Ether,
+                       (void    *)&NetDev_API_XIL_ETHER_LITE,
+                       (void    *)&NetDev_BSP_AXIEthernetLite_0,
+                       (void    *)&NetDevCfg,
+                       (void    *)&NetPhy_API_88E1111,
+                       (void    *)&NetPhyCfg,
+                                  &err_net);
+
+    if (err_net != NET_IF_ERR_NONE) {
+        UCOS_Printf("UCOS - Error initializing Ethernet Lite Interface. Error code %d\r\n", err_net);
+        return (DEF_FAIL);
+    }
+
+    UCOS_Printf("UCOS - Ethernet Lite Interface initialized successfully with if number %d.\r\n", if_nbr);
+
+    UCOS_Print("UCOS - Starting Ethernet Lite Interface.\r\n");
+    NetIF_Start(if_nbr, &err_net);
+    if (err_net != NET_IF_ERR_NONE) {
+        UCOS_Printf("UCOS - Error starting Ethernet Lite Interface. Error code %d\r\n", err_net);
+        return (DEF_FAIL);
+    }
+
+    UCOS_Print("UCOS - Ethernet Lite Interface started successfully.\r\n");
+
+    if_init_res = UCOS_TCPIP_IF_Cfg(if_nbr);
+
+    return (if_init_res);
+}
+#endif
+
+
+#if (UCOS_ETHERNET_DRIVER == UCOS_ETHERNET_AXIETH)
+
+extern UCOS_AXIETHERNET_Config UCOS_AXIETHERNET_ConfigTable[];
+
+CPU_BOOLEAN UCOS_TCPIP_InitAXIEth (void)
+{
+    NET_IF_NBR if_nbr;
+    NET_ERR err_net;
+#ifdef NET_IPv4_MODULE_EN
+    NET_IPv4_ADDR addr_ipv4;
+    NET_IPv4_ADDR msk_ipv4;
+    NET_IPv4_ADDR gateway_ipv4;
+#endif
+    NET_IPv6_ADDR addr_ip;
+    NET_IP_ADDR_FAMILY addr_family;
+    CPU_BOOLEAN if_init_res;
+
+
+    UCOS_Print("UCOS - Initializing Ethernet Interface.\r\n");
+
+    UCOS_TCPIP_IfCfgInit(&NetDevCfg);
+
+    NetDevCfg.BaseAddr = UCOS_AXIETHERNET_ConfigTable[UCOS_ETHERNET_DEVICE_ID].BaseAddress;
+
+    UCOS_TCPIP_PhyCfgInit(&NetPhyCfg);
+
+    NetPhyCfg.BusMode = NET_PHY_BUS_MODE_MII;
+
+    if_nbr = NetIF_Add((void    *)&NetIF_API_Ether,
+                       (void    *)&NetDev_API_XIL_ETHER,
+                       (void    *)&NetDev_BSP_AXIEthernet_0,
+                       (void    *)&NetDevCfg,
+                       (void    *)&NetPhy_API_88E1111,
+                       (void    *)&NetPhyCfg,
+                                  &err_net);
+
+    if (err_net != NET_IF_ERR_NONE) {
+        UCOS_Printf("UCOS - Error initializing Ethernet Interface. Error code %d\r\n", err_net);
+        return (DEF_FAIL);
+    }
+
+    UCOS_Printf("UCOS - Ethernet Interface initialized successfully with if number %d.\r\n", if_nbr);
+
+    UCOS_Print("UCOS - Starting Ethernet Interface.\r\n");
+    NetIF_Start(if_nbr, &err_net);
+    if (err_net != NET_IF_ERR_NONE) {
+        UCOS_Printf("UCOS - Error starting Ethernet Interface. Error code %d\r\n", err_net);
+        return (DEF_FAIL);
+    }
+
+    UCOS_Print("UCOS - Ethernet Interface started successfully.\r\n");
+
+    if_init_res = UCOS_TCPIP_IF_Cfg(if_nbr);
+
+    return (if_init_res);
+}
+#endif
+#endif
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_telnet-s_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_telnet-s_init.c
new file mode 100644
index 0000000..eb5930e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_telnet-s_init.c
@@ -0,0 +1,74 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                       (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                         uC/TCPIP INIT CODE
+*
+* Filename      : ucos_telnet-s_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if (APP_TELNETS_ENABLED == DEF_ENABLED)
+#include 
+#include 
+#endif
+
+#if (APP_TELNETS_ENABLED == DEF_ENABLED)
+CPU_BOOLEAN UCOS_TELNETs_Init (void)
+{
+    NET_SOCK_ADDR_FAMILY ip_type = AF_INET;
+    CPU_BOOLEAN ok;
+
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/TELNETs.\r\n");
+#endif
+
+    TELNETsShell_Init("DUT", "micrium");
+
+    ok = TELNETs_Init(NET_SOCK_ADDR_FAMILY_IP_V4, DEF_NULL);
+
+    if (ok == DEF_OK)
+        return (DEF_OK);
+    else
+        return (DEF_FAIL);
+}
+
+#endif /* #if (APP_TELNETS_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_usbd_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_usbd_init.c
new file mode 100644
index 0000000..593bd99
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_usbd_init.c
@@ -0,0 +1,72 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                       uC/USB-Device INIT CODE
+*
+* Filename      : ucos_usbd_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if ((APP_USBD_ENABLED == DEF_ENABLED) && (UCOS_USB_TYPE == UCOS_USB_TYPE_DEVICE))
+#include  
+#include  "usbd_dev_cfg.h"
+
+CPU_BOOLEAN UCOS_USBD_Init (void)
+{
+    CPU_INT08U   dev_nbr;
+    USBD_ERR     usbd_err;
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/USB-Device.\r\n");
+#endif
+
+    USBD_Init(&usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error initializing uC/USB-Device. USBD_Init() returned error code %d\r\n", usbd_err);
+#endif
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+#endif /* #if (APP_USBD_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/bsp/src/ucos_usbh_init.c b/src/ucos_v1_42/ucos/bsp/src/ucos_usbh_init.c
new file mode 100644
index 0000000..e730f58
--- /dev/null
+++ b/src/ucos_v1_42/ucos/bsp/src/ucos_usbh_init.c
@@ -0,0 +1,138 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                         uC/USB-Host INIT CODE
+*
+* Filename      : ucos_usbh_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if ((APP_USBH_ENABLED == DEF_ENABLED) && (UCOS_USB_TYPE == UCOS_USB_TYPE_HOST))
+#include 
+
+#include 
+
+#if (UCOS_USB_DRIVER == UCOS_USB_USBPS)
+#include 
+extern UCOS_USBPS_Config UCOS_USBPS_ConfigTable[];
+#endif
+
+static  CPU_STK  USBH_AsyncTaskStk[USBH_TASK_CFG_ASYNC_STACK_SIZE];
+static  CPU_STK  USBH_HubTaskStk[USBH_TASK_CFG_HUB_STACK_SIZE];
+
+static USBH_KERNEL_TASK_INFO  AsyncTaskInfo = {                 /* ---------------- INFO ON ASYNC TASK ---------------- */
+    USBH_TASK_CFG_ASYNC_PRIO,                                   /* Async task priority.                                 */
+    USBH_AsyncTaskStk,                                          /* Ptr to async task stack.                             */
+    USBH_TASK_CFG_ASYNC_STACK_SIZE                              /* Size of async task stack.                            */
+};
+
+static USBH_KERNEL_TASK_INFO  HubTaskInfo = {                   /* ----------------- INFO ON HUB TASK ----------------- */
+    USBH_TASK_CFG_HUB_PRIO,                                     /* Hub task priority.                                   */
+    USBH_HubTaskStk,                                            /* Ptr to hub task stack.                               */
+    USBH_TASK_CFG_HUB_STACK_SIZE                                /* Size of hub task stack.                              */
+};
+
+struct  usbh_hc_cfg  USBH_HC_Cfg_EHCI_USB = {
+    (CPU_ADDR)0x00000000u,                                      /* Base addr of host controller hw registers.           */
+    (CPU_ADDR)0x00000000u,                                      /* Base addr of host controller dedicated mem.          */
+              0u,                                               /* Size      of host controller dedicated mem.          */
+              DEF_ENABLED,                                      /* Does HC can access sys mem?                          */
+              0u,                                               /* Data buf max len.                                    */
+              4u,                                               /* Max nbr opened bulk EP.                              */
+              4u,                                               /* Max nbr opened intr EP.                              */
+              0u                                                /* Max nbr opened isoc EP.                              */
+};
+
+
+CPU_BOOLEAN UCOS_USBH_Init (void)
+{
+    USBH_ERR    usbh_err;
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Initializing uC/USB-Host.\r\n");
+#endif
+
+    usbh_err = USBH_Init(&AsyncTaskInfo, &HubTaskInfo);
+    if (usbh_err != USBH_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error initializing uC/USB-Host. Error code %d\r\n", usbh_err);
+#endif
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+#if (UCOS_USB_DRIVER == UCOS_USB_USBPS)
+CPU_BOOLEAN UCOS_USBH_Start (void)
+{
+    USBH_ERR    usbh_err;
+    CPU_INT08U  hc_nbr;
+
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+    UCOS_Print("UCOS - Starting uC/USB-Host.\r\n");
+#endif
+
+    USBH_HC_Cfg_EHCI_USB.BaseAddr = UCOS_USBPS_ConfigTable[UCOS_USB_DEVICE_ID].BaseAddress + 0x100u;
+
+    hc_nbr = USBH_HC_Add(&USBH_HC_Cfg_EHCI_USB,
+                         &EHCI_DrvAPI_Synopsys,
+                         &EHCI_RH_API,
+                         &USBH_HC_BSP_API_ZYNQ_EHCI_USB,
+                         &usbh_err);
+    if (usbh_err != USBH_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error adding USB host controller. Error code %d\r\n", usbh_err);
+#endif
+        return (DEF_FAIL);
+    }
+
+    usbh_err = USBH_HC_Start(hc_nbr);
+    if (usbh_err != USBH_ERR_NONE) {
+#if (UCOS_START_DEBUG_TRACE == DEF_ENABLED)
+        UCOS_Printf("UCOS - Error starting USB host controller. Error code %d\r\n", usbh_err);
+#endif
+        return (DEF_FAIL);
+    }
+}
+#endif /* #if (UCOS_USB_DRIVER == UCOS_ETHERNET_USBPS) */
+
+#endif /* #if (APP_USBH_ENABLED == DEF_ENABLED) */
diff --git a/src/ucos_v1_42/ucos/components/ucos_can/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_can/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_can/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_bsp.c b/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_bsp.c
new file mode 100644
index 0000000..d2b13d3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_bsp.c
@@ -0,0 +1,767 @@
+/*
+*********************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        CAN ZC7xxx DRIVER BSP
+*
+*                                            ZYNQ 7000 EPP
+*                                               on the
+*                                       ZC702 development board
+*
+* Filename      : can_bsp.h
+* Version       : V2.41.00
+* Programmer(s) : DC
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                              INCLUDES
+*********************************************************************************************************
+*/
+
+#include  "drv_can.h"
+#include  "drv_def.h"
+#include  "can_bsp.h"
+
+#if ((CANBUS_RX_HANDLER_EN > 0u) || \
+     (CANBUS_TX_HANDLER_EN > 0u) || \
+     (CANBUS_NS_HANDLER_EN > 0u))
+#include  "can_bus.h"
+#endif
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+                                                                /* -------------- CANx BASE ADDR POINTERS ------------- */
+#if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+    ZC7xxx_CAN_REG  *Can0_Reg_ptr;                              /* Pointer to the Base Address of the CAN0 Controller.  */
+#endif
+#if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+    ZC7xxx_CAN_REG  *Can1_Reg_ptr;                              /* Pointer to the Base Address of the CAN1 Controller.  */
+#endif
+
+
+#define  ZYNQ_SLCR_LOCK_KEY    (0x767Bu)                        /* SLCR lock key.                                       */
+#define  ZYNQ_SLCR_UNLOCK_KEY  (0xDF0Du)                        /* SLCR unlock key.                                     */
+
+
+#define  ZYNQ_SLCR_REG         ((ZYNQ_REG_SLCR_PTR)(0xF8000000))
+
+                                                                /* System Level Control Registers                       */
+typedef  struct  zynq_reg_slcr {
+    CPU_REG32  SCL;                                             /* Secure Configuration Lock.                           */
+    CPU_REG32  SLCR_LOCK;                                       /* SLCR Write Protection Lock.                          */
+    CPU_REG32  SLCR_UNLOCK;                                     /* SLCR Write Protection Unlock.                        */
+    CPU_REG32  SLCR_LOCKSTA;                                    /* SLCR Write Protection Status.                        */
+    CPU_REG32  RESERVED1[60];
+    CPU_REG32  ARM_PLL_CTRL;                                    /* ARM PLL Control.                                     */
+    CPU_REG32  DDR_PLL_CTRL;                                    /* DDR PLL Control.                                     */
+    CPU_REG32  IO_PLL_CTRL;                                     /* IO PLL Control.                                      */
+    CPU_REG32  PLL_STATUS;                                      /* PLL Status.                                          */
+    CPU_REG32  ARM_PLL_CFG;                                     /* ARM PLL Configuration.                               */
+    CPU_REG32  DDR_PLL_CFG;                                     /* DDR PLL Configuration.                               */
+    CPU_REG32  IO_PLL_CFG;                                      /* IO PLL Configuration.                                */
+    CPU_REG32  RESERVED2[1];
+    CPU_REG32  ARM_CLK_CTRL;                                    /* ARM Clock Control.                                   */
+    CPU_REG32  DDR_CLK_CTRL;                                    /* DDR Clock Control.                                   */
+    CPU_REG32  DCI_CLK_CTRL;                                    /* DCI Clock Control.                                   */
+    CPU_REG32  APER_CLK_CTRL;                                   /* AMBA Peripheral Clock Control.                       */
+    CPU_REG32  USB0_CLK_CTRL;                                   /* USB 0 ULPI Clock Control.                            */
+    CPU_REG32  USB1_CLK_CTRL;                                   /* USB 1 ULPI Clock Control.                            */
+    CPU_REG32  GEM0_RCLK_CTRL;                                  /* GigE 0 Rx Clock and Rx Signals Select.               */
+    CPU_REG32  GEM1_RCLK_CTRL;                                  /* GigE 1 Rx Clock and Rx Signals Select.               */
+    CPU_REG32  GEM0_CLK_CTRL;                                   /* GigE 0 Ref Clock Control.                            */
+    CPU_REG32  GEM1_CLK_CTRL;                                   /* GigE 1 Ref Clock Control.                            */
+    CPU_REG32  SMC_CLK_CTRL;                                    /* SMC Ref Clock Control.                               */
+    CPU_REG32  LQSPI_CLK_CTRL;                                  /* Quad SPI Ref Clock Control.                          */
+    CPU_REG32  SDIO_CLK_CTRL;                                   /* SDIO Ref Clock Control.                              */
+    CPU_REG32  UART_CLK_CTRL;                                   /* UART Ref Clock Control.                              */
+    CPU_REG32  SPI_CLK_CTRL;                                    /* SPI Ref Clock Control.                               */
+    CPU_REG32  CAN_CLK_CTRL;                                    /* CAN Ref Clock Control.                               */
+    CPU_REG32  CAN_MIOCLK_CTRL;                                 /* CAN MIO Clock Control.                               */
+    CPU_REG32  DBG_CLK_CTRL;                                    /* SoC Debug Clock Control.                             */
+    CPU_REG32  PCAP_CLK_CTRL;                                   /* PCAP Clock Control.                                  */
+    CPU_REG32  TOPSW_CLK_CTRL;                                  /* Central Interconnect Clock Control.                  */
+    CPU_REG32  FPGA0_CLK_CTRL;                                  /* PL Clock 0 Output Control.                           */
+    CPU_REG32  RESERVED3[3];
+    CPU_REG32  FPGA1_CLK_CTRL;                                  /* PL Clock 1 Output Control.                           */
+    CPU_REG32  RESERVED4[3];
+    CPU_REG32  FPGA2_CLK_CTRL;                                  /* PL Clock 2 Output Control.                           */
+    CPU_REG32  RESERVED5[3];
+    CPU_REG32  FPGA3_CLK_CTRL;                                  /* PL Clock 3 Output Control.                           */
+    CPU_REG32  RESERVED6[8];
+    CPU_REG32  CLK_621_TRUE;                                    /* CPU Clock Ratio Mode Select.                         */
+    CPU_REG32  RESERVED7[14];
+    CPU_REG32  PSS_RST_CTRL;                                    /* PS Software Reset Control.                           */
+    CPU_REG32  DDR_RST_CTRL;                                    /* DRR Software Reset Control.                          */
+    CPU_REG32  TOPSW_RST_CTRL;                                  /* Central Interconnect Reset Control.                  */
+    CPU_REG32  DMAC_RST_CTRL;                                   /* DMAC Software Reset Control.                         */
+    CPU_REG32  USB_RST_CTRL;                                    /* USB Software Reset Control.                          */
+    CPU_REG32  GEM_RST_CTRL;                                    /* Gigabit Ethernet SW Reset Control.                   */
+    CPU_REG32  SDIO_RST_CTRL;                                   /* SDIO Software Reset Control.                         */
+    CPU_REG32  SPI_RST_CTRL;                                    /* SPI Software Reset Control.                          */
+    CPU_REG32  CAN_RST_CTRL;                                    /* CAN Software Reset Control.                          */
+    CPU_REG32  I2C_RST_CTRL;                                    /* I2C Software Reset Control.                          */
+    CPU_REG32  UART_RST_CTRL;                                   /* UART Software Reset Control.                         */
+    CPU_REG32  GPIO_RST_CTRL;                                   /* GPIO Software Reset Control.                         */
+    CPU_REG32  LQSPI_RST_CTRL;                                  /* Quad SPI Software Reset Control.                     */
+    CPU_REG32  SMC_RST_CTRL;                                    /* SMC Software Reset Control.                          */
+    CPU_REG32  OCM_RST_CTRL;                                    /* OMC Software Reset Control.                          */
+    CPU_REG32  DEVCI_RST_CTRL;                                  /* Device Config Interface SW Reset Control.            */
+    CPU_REG32  FPGA_RST_CTRL;                                   /* FPGA Software Reset Control.                         */
+    CPU_REG32  A9_CPU_RST_CTRL;                                 /* CPU Reset and Clock Control.                         */
+    CPU_REG32  RESERVED8[1];
+    CPU_REG32  RS_AWDT_CTRL;                                    /* Watchdog Timer Reset Control.                        */
+    CPU_REG32  RESERVED9[2];
+    CPU_REG32  REBOOT_STATUS;                                   /* Reboot Status.                                       */
+    CPU_REG32  BOOT_MODE;                                       /* Boot Mode Strapping Pins.                            */
+    CPU_REG32  RESERVED10[40];
+    CPU_REG32  APU_CTRL;                                        /* APU Control.                                         */
+    CPU_REG32  WDT_CLK_SEL;                                     /* APU Watchdog Timer Clock Select.                     */
+    CPU_REG32  RESERVED11[138];
+    CPU_REG32  PSS_IDCODE;                                      /* PS IDCODE.                                           */
+    CPU_REG32  RESERVED12[51];
+    CPU_REG32  DDR_URGENT;                                      /* DDR Urgent Control.                                  */
+    CPU_REG32  RESERVED13[2];
+    CPU_REG32  DDR_CAL_START;                                   /* DDR Calibration Start Triggers.                      */
+    CPU_REG32  RESERVED14[1];
+    CPU_REG32  DDR_REF_START;                                   /* DDR Refresh Start Triggers.                          */
+    CPU_REG32  DDR_CMD_STA;                                     /* DDR Command Store Status.                            */
+    CPU_REG32  DDR_URGENT_SEL;                                  /* DDR Urgent Select.                                   */
+    CPU_REG32  DDR_DFI_STATUS;                                  /* DDR DFI Status.                                      */
+    CPU_REG32  RESERVED15[55];
+    CPU_REG32  MIO_PIN_00;                                      /* MIO Pin 0 Control.                                   */
+    CPU_REG32  MIO_PIN_01;                                      /* MIO Pin 1 Control.                                   */
+    CPU_REG32  MIO_PIN_02;                                      /* MIO Pin 2 Control.                                   */
+    CPU_REG32  MIO_PIN_03;                                      /* MIO Pin 3 Control.                                   */
+    CPU_REG32  MIO_PIN_04;                                      /* MIO Pin 4 Control.                                   */
+    CPU_REG32  MIO_PIN_05;                                      /* MIO Pin 5 Control.                                   */
+    CPU_REG32  MIO_PIN_06;                                      /* MIO Pin 6 Control.                                   */
+    CPU_REG32  MIO_PIN_07;                                      /* MIO Pin 7 Control.                                   */
+    CPU_REG32  MIO_PIN_08;                                      /* MIO Pin 8 Control.                                   */
+    CPU_REG32  MIO_PIN_09;                                      /* MIO Pin 9 Control.                                   */
+    CPU_REG32  MIO_PIN_10;                                      /* MIO Pin 10 Control.                                  */
+    CPU_REG32  MIO_PIN_11;                                      /* MIO Pin 11 Control.                                  */
+    CPU_REG32  MIO_PIN_12;                                      /* MIO Pin 12 Control.                                  */
+    CPU_REG32  MIO_PIN_13;                                      /* MIO Pin 13 Control.                                  */
+    CPU_REG32  MIO_PIN_14;                                      /* MIO Pin 14 Control.                                  */
+    CPU_REG32  MIO_PIN_15;                                      /* MIO Pin 15 Control.                                  */
+    CPU_REG32  MIO_PIN_16;                                      /* MIO Pin 16 Control.                                  */
+    CPU_REG32  MIO_PIN_17;                                      /* MIO Pin 17 Control.                                  */
+    CPU_REG32  MIO_PIN_18;                                      /* MIO Pin 18 Control.                                  */
+    CPU_REG32  MIO_PIN_19;                                      /* MIO Pin 19 Control.                                  */
+    CPU_REG32  MIO_PIN_20;                                      /* MIO Pin 20 Control.                                  */
+    CPU_REG32  MIO_PIN_21;                                      /* MIO Pin 21 Control.                                  */
+    CPU_REG32  MIO_PIN_22;                                      /* MIO Pin 22 Control.                                  */
+    CPU_REG32  MIO_PIN_23;                                      /* MIO Pin 23 Control.                                  */
+    CPU_REG32  MIO_PIN_24;                                      /* MIO Pin 24 Control.                                  */
+    CPU_REG32  MIO_PIN_25;                                      /* MIO Pin 25 Control.                                  */
+    CPU_REG32  MIO_PIN_26;                                      /* MIO Pin 26 Control.                                  */
+    CPU_REG32  MIO_PIN_27;                                      /* MIO Pin 27 Control.                                  */
+    CPU_REG32  MIO_PIN_28;                                      /* MIO Pin 28 Control.                                  */
+    CPU_REG32  MIO_PIN_29;                                      /* MIO Pin 29 Control.                                  */
+    CPU_REG32  MIO_PIN_30;                                      /* MIO Pin 30 Control.                                  */
+    CPU_REG32  MIO_PIN_31;                                      /* MIO Pin 31 Control.                                  */
+    CPU_REG32  MIO_PIN_32;                                      /* MIO Pin 32 Control.                                  */
+    CPU_REG32  MIO_PIN_33;                                      /* MIO Pin 33 Control.                                  */
+    CPU_REG32  MIO_PIN_34;                                      /* MIO Pin 34 Control.                                  */
+    CPU_REG32  MIO_PIN_35;                                      /* MIO Pin 35 Control.                                  */
+    CPU_REG32  MIO_PIN_36;                                      /* MIO Pin 36 Control.                                  */
+    CPU_REG32  MIO_PIN_37;                                      /* MIO Pin 37 Control.                                  */
+    CPU_REG32  MIO_PIN_38;                                      /* MIO Pin 38 Control.                                  */
+    CPU_REG32  MIO_PIN_39;                                      /* MIO Pin 39 Control.                                  */
+    CPU_REG32  MIO_PIN_40;                                      /* MIO Pin 40 Control.                                  */
+    CPU_REG32  MIO_PIN_41;                                      /* MIO Pin 41 Control.                                  */
+    CPU_REG32  MIO_PIN_42;                                      /* MIO Pin 42 Control.                                  */
+    CPU_REG32  MIO_PIN_43;                                      /* MIO Pin 43 Control.                                  */
+    CPU_REG32  MIO_PIN_44;                                      /* MIO Pin 44 Control.                                  */
+    CPU_REG32  MIO_PIN_45;                                      /* MIO Pin 45 Control.                                  */
+    CPU_REG32  MIO_PIN_46;                                      /* MIO Pin 46 Control.                                  */
+    CPU_REG32  MIO_PIN_47;                                      /* MIO Pin 47 Control.                                  */
+    CPU_REG32  MIO_PIN_48;                                      /* MIO Pin 48 Control.                                  */
+    CPU_REG32  MIO_PIN_49;                                      /* MIO Pin 49 Control.                                  */
+    CPU_REG32  MIO_PIN_50;                                      /* MIO Pin 50 Control.                                  */
+    CPU_REG32  MIO_PIN_51;                                      /* MIO Pin 51 Control.                                  */
+    CPU_REG32  MIO_PIN_52;                                      /* MIO Pin 52 Control.                                  */
+    CPU_REG32  MIO_PIN_53;                                      /* MIO Pin 53 Control.                                  */
+    CPU_REG32  RESERVED16[11];
+    CPU_REG32  MIO_LOOPBACK;                                    /* Loopback Function Within MIO.                        */
+    CPU_REG32  RESERVED17[1];
+    CPU_REG32  MIO_MST_TRI0;                                    /* MIO Pin Tri-state Enables 31:0.                      */
+    CPU_REG32  MIO_MST_TRI1;                                    /* MIO Pin Tri-state Enables 53:32.                     */
+    CPU_REG32  RESERVED18[7];
+    CPU_REG32  SD0_WP_CD_SEL;                                   /* SDIO 0 WP CD Select.                                 */
+    CPU_REG32  SD1_WP_CD_SEL;                                   /* SDIO 1 WP CD Select.                                 */
+    CPU_REG32  RESERVED19[50];
+    CPU_REG32  LVL_SHFTR_EN;                                    /* Level Shifters Enable.                               */
+    CPU_REG32  RESERVED20[3];
+    CPU_REG32  OCM_CFG;                                         /* OCM Address Mapping.                                 */
+    CPU_REG32  RESERVED21[123];
+    CPU_REG32  GPIOB_CTRL;                                      /* PS IO Buffer Control.                                */
+    CPU_REG32  GPIOB_CFG_CMOS18;                                /* MIO GPIOB CMOS 1.8V Configuration.                   */
+    CPU_REG32  GPIOB_CFG_CMOS25;                                /* MIO GPIOB CMOS 2.5V Configuration.                   */
+    CPU_REG32  GPIOB_CFG_CMOS33;                                /* MIO GPIOB CMOS 3.3V Configuration.                   */
+    CPU_REG32  GPIOB_CFG_LVTTL;                                 /* MIO GPIOB LVTTL Configuration.                       */
+    CPU_REG32  GPIOB_CFG_HSTL;                                  /* MIO GPIOB HSTL Configuration.                        */
+    CPU_REG32  GPIOB_DRVR_BIAS_CTRL;                            /* MIO GPIOB Driver Bias Control.                       */
+    CPU_REG32  RESERVED22[9];
+    CPU_REG32  DDRIOB_ADDR0;                                    /* DDR IOB Configuration for A[14:0], CKE and DRST_B.   */
+    CPU_REG32  DDRIOB_ADDR1;                                    /* DDR IOB Configuration for BS[2:0], ODT, CS_B, WE_B, RAS_B and CAS_B. */
+    CPU_REG32  DDRIOB_DATA0;                                    /* DDR IOB Configuration for Data 15:0.                 */
+    CPU_REG32  DDRIOB_DATA1;                                    /* DDR IOB Configuration for Data 31:16.                */
+    CPU_REG32  DDRIOB_DIFF0;                                    /* DDR IOB Configuration for DQS 1:0.                   */
+    CPU_REG32  DDRIOB_DIFF1;                                    /* DDR IOB Configuration for DQS 3:2.                   */
+    CPU_REG32  DDRIOB_CLOCK;                                    /* DDR IOB Configuration for Clock Output.              */
+    CPU_REG32  DDRIOB_DRIVE_SLEW_ADDR;                          /* Drive and Slew control Address and Command.          */
+    CPU_REG32  DDRIOB_DRIVE_SLEW_DATA;                          /* Drive and Slew control DQ.                           */
+    CPU_REG32  DDRIOB_DRIVE_SLEW_DIFF;                          /* Drive and Slew control DQS.                          */
+    CPU_REG32  DDRIOB_DRIVE_SLEW_CLOCK;                         /* Drive and Slew control Clock.                        */
+    CPU_REG32  DDRIOB_DDR_CTRL;                                 /* DDR IOB Buffer Control.                              */
+} ZYNQ_REG_SLCR, *ZYNQ_REG_SLCR_PTR;
+
+
+/* -------------- MIO REG BIT DEFINITION -------------- */
+#define  ZYNQ_BIT_MIO_DISABLE_RCVR    DEF_BIT_13                /* Disable HSTL Input Buffer.                           */
+#define  ZYNQ_BIT_MIO_PULL_UP         DEF_BIT_12                /* Enable Pull-Up.                                      */
+#define  ZYNQ_BIT_MIO_IO_TYPE_MSK (DEF_BIT_FIELD(3, 9))         /* IO Buffer Type.                                      */
+#define  ZYNQ_BIT_MIO_IO_TYPE(cfg) (DEF_BIT_MASK(cfg, 9) & ZYNQ_BIT_MIO_IO_TYPE_MSK)
+#define  ZYNQ_BIT_MIO_SPEED           DEF_BIT_08                /* IO Buffer Edge Rate.                                 */
+#define  ZYNQ_BIT_MIO_L3_SEL_MSK (DEF_BIT_FIELD(3, 5))          /* Level 3 Mux Select.                                  */
+#define  ZYNQ_BIT_MIO_L3_SEL(cfg) (DEF_BIT_MASK(cfg, 5) & ZYNQ_BIT_MIO_L3_SEL_MSK)
+#define  ZYNQ_BIT_MIO_L2_SEL_MSK (DEF_BIT_FIELD(2, 3))          /* Level 2 Mux Select.                                  */
+#define  ZYNQ_BIT_MIO_L2_SEL(cfg) (DEF_BIT_MASK(cfg, 3) & ZYNQ_BIT_MIO_L2_SEL_MSK)
+#define  ZYNQ_BIT_MIO_L1_SEL          DEF_BIT_02                /* Level 1 Mux Select.                                  */
+#define  ZYNQ_BIT_MIO_L0_SEL          DEF_BIT_01                /* Level 0 Mux Select.                                  */
+#define  ZYNQ_BIT_MIO_TRI_ENABLE      DEF_BIT_00                /* Tri-State Enable.                                    */
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         INTERNAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             LOCAL DATA
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  ZC7xxx_CAN_DevIds[ZC7xxx_CAN_N_DEV];        /* Array Holds Initialized Node ID of Module            */
+
+
+/*
+*********************************************************************************************************
+*                                             GLOBAL DATA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+                                               CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              FUNCTIONS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    Assign ISR handler for R-CAN
+*
+* Description: This function is used to assign ISR handlers for CAN functionality.
+*
+* Arguments  : none
+*********************************************************************************************************
+*/
+
+void  ZC7xxx_CAN_BSP_IntVectSet (void)
+{
+
+#if ((CANBUS_RX_HANDLER_EN > 0u) || \
+     (CANBUS_TX_HANDLER_EN > 0u) || \
+     (CANBUS_NS_HANDLER_EN > 0u))
+#if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)                       /* ------------ GLOBAL ISR HANDLER for CAN0 ----------- */
+    UCOS_IntVectSet (ZC7xxx_BSP_CAN0_INT_ID,                    /* CAN0 Interrupt ID.                                   */
+                     0u,                                        /* ISR Interrupt Priority. (0 Highest).                 */
+                     DEF_BIT_00,                                /* Selected Core: DEF_BIT_00 = Core0, DEF_BIT_01 = Core1*/
+                     ZC7xxx_CAN0_ISR_Handler,                   /* Designated ISR Handler.                              */
+                     0u);
+#endif
+
+#if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)                       /* ------------ GLOBAL ISR HANDLER for CAN1 ----------- */
+    UCOS_IntVectSet (ZC7xxx_BSP_CAN1_INT_ID,                    /* CAN1 Interrupt ID.                                   */
+                     0u,                                        /* ISR Interrupt Priority. (0 Highest).                 */
+                     DEF_BIT_00,                                /* Selected Core: DEF_BIT_00 = Core0, DEF_BIT_01 = Core1*/
+                     ZC7xxx_CAN1_ISR_Handler,                   /* Designated ISR Handler.                              */
+                     0u);
+#endif
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       ZC7xxx_CAN_BSP_Start()
+*
+* Description : Starts the Appropriate CAN Module Channel. This Function will do a CAN Reset using
+*               the Subsystem. ZC7xxx_CAN_BSP_Start should be used only with CAN RESET operating mode.
+*
+* Argument(s) : para_id     Selects the CAN Device [ZC7xxx_CAN_BUS_0, ZC7xxx_CAN_BUS_1].
+*
+* Return(s)   : Returns error value if improper CAN Device used, if not returns 'DEF_OK'.
+*
+* Caller(s)   : ZC7xxx_CAN_SetMode().
+*               ZC7xxx_CAN_PinSetting().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ZC7xxx_CAN_BSP_Start (CPU_INT08U  para_id)
+{
+#if 0                                                           /* Set to '1' to use Subsystem Reset for CAN Module.    */
+    CPU_BOOLEAN  bsp_err;
+
+
+    bsp_err = DEF_OK;                                           /* Init Var(s).                                         */
+
+                                                                /* ---------------- CAN SUBSYSTEM RESET --------------- */
+    ZYNQ_SLCR_REG->SLCR_UNLOCK = ZYNQ_SLCR_UNLOCK_KEY;          /* Set the System Level Control Register Unlock Key     */
+    CPU_MB();                                                   /* Constraint Ordering on Mem. Prevent Damage to chip   */
+
+    switch (para_id) {
+    #if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+        case ZC7xxx_CAN_BUS_0:                                  /* Reset the CAN Module via Subsystem Reset.            */
+             ZYNQ_SLCR_REG->CAN_RST_CTRL |=  ZC7xxx_BSP_CAN0_CPU1X_RST;
+             ZYNQ_SLCR_REG->CAN_RST_CTRL &= ~ZC7xxx_BSP_CAN0_CPU1X_RST;
+             break;
+    #endif
+
+    #if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+        case ZC7xxx_CAN_BUS_1:
+             ZYNQ_SLCR_REG->CAN_RST_CTRL |=  ZC7xxx_BSP_CAN1_CPU1X_RST;
+             ZYNQ_SLCR_REG->CAN_RST_CTRL &= ~ZC7xxx_BSP_CAN1_CPU1X_RST;
+             break;
+    #endif
+
+        default:
+             bsp_err = DEF_FAIL;
+             break;
+
+    }
+
+    CPU_MB();
+    ZYNQ_SLCR_REG->SLCR_LOCK = ZYNQ_SLCR_LOCK_KEY;              /* Lock SLCR register once more.                        */
+
+    return (bsp_err);
+#else
+
+    return (DEF_OK);
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*                                       ZC7xxx_CAN_PinSetting()
+*
+* Description : This Function provides all the necessary Pin Settings for the required CAN Device.
+*
+* Argument(s) : para_id     Selects the CAN Device [ZC7xxx_CAN_BUS_0, ZC7xxx_CAN_BUS_1].
+*
+* Return(s)   : Returns error value if improper CAN Device used, if not returns 'DEF_OK'.
+*
+* Caller(s)   : ZC7xxx_CAN_Init().
+*
+* Note(s)     : (1) Refer to the I/O Interface section of the ZYNQ-7000 TRM. [Section 18.5]
+*
+*               (2) The PLL Clock configuration has been automatically created by Xilinx tools and is
+*                   found in the 'zc702.ds' file under the ../../BSP/DS5 folder. The Clock configuration
+*                   for both CAN1 & CAN0 have also been automatically created by Xilinx tools under the
+*                   "Clock Configuration" section of the .ds file. After following the calculations of
+*                   this .ds file, the following Clock #defines were set, as definite points of reference
+*                   from a clearly'undefined' location. It is believed based on this clock configuration
+*                   that the IO PLL is set to 1 GHz.
+*                       The Maximum Clock Frequency for the CAN Module is 24 MHz.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ZC7xxx_CAN_PinSetting (CPU_INT08U  para_id)
+{
+    CPU_BOOLEAN  bsp_err;
+
+
+    bsp_err = DEF_OK;                                           /* Init Var(s).                                         */
+
+#if 1
+                                                                /* ------------- CAN MIO PIN CONFIGURATION ------------ */
+    ZYNQ_SLCR_REG->SLCR_UNLOCK = ZYNQ_SLCR_UNLOCK_KEY;          /* Set the System Level Control Register Unlock Key     */
+    CPU_MB();                                                   /* Constraint Ordering on Mem. Prevent Damage to chip   */
+
+    switch (para_id) {
+    #if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+        case ZC7xxx_CAN_BUS_0:
+             Can0_Reg_ptr = (ZC7xxx_CAN_REG *)ZC7xxx_CAN0_ADDR; /* Set Base Address of CAN0 Register Set.               */
+
+                                                                /*  - RX PIN CONFIG -                                   */
+             ZYNQ_SLCR_REG->MIO_PIN_46 = (ZYNQ_BIT_MIO_DISABLE_RCVR |   /* Disable HSTL Receiver.                       */
+                                          ZYNQ_BIT_MIO_PULL_UP      |   /* Enable Pull- Up Resistor on IO Buffer Pin.   */
+                                          ZYNQ_BIT_MIO_IO_TYPE(1u)  |   /* Set IO Buffer Type: LVCMOS18.                */
+                                          ZYNQ_BIT_MIO_L3_SEL(1u)   |   /* Set L3 Mux Select : CAN0 Rx, Input.          */
+                                          ZYNQ_BIT_MIO_TRI_ENABLE);     /* Enable Tri-State  : Active High.             */
+
+                                                                /*  - TX PIN CONFIG -                                   */
+             ZYNQ_SLCR_REG->MIO_PIN_47 = (ZYNQ_BIT_MIO_DISABLE_RCVR |   /* Disable HSTL Receiver.                       */
+                                          ZYNQ_BIT_MIO_PULL_UP      |   /* Enable Pull- Up Resistor on IO Buffer Pin.   */
+                                          ZYNQ_BIT_MIO_IO_TYPE(1u)  |   /* Set IO Buffer Type: LVCMOS18.                */
+                                          ZYNQ_BIT_MIO_L3_SEL(1u));     /* Set L3 Mux Select : CAN0 Tx, Output.         */
+             break;
+    #endif
+
+    #if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+        case ZC7xxx_CAN_BUS_1:
+             Can1_Reg_ptr = (ZC7xxx_CAN_REG *)ZC7xxx_CAN1_ADDR; /* Set Base Address of CAN1 Register Set.               */
+
+                                                                /*  - RX PIN CONFIG -                                   */
+             ZYNQ_SLCR_REG->MIO_PIN_53 = (ZYNQ_BIT_MIO_DISABLE_RCVR |   /* Disable HSTL Receiver.                       */
+                                          ZYNQ_BIT_MIO_PULL_UP      |   /* Enable Pull- Up Resistor on IO Buffer Pin.   */
+                                          ZYNQ_BIT_MIO_IO_TYPE(1u)  |   /* Set IO Buffer Type: LVCMOS18.                */
+                                          ZYNQ_BIT_MIO_L3_SEL(1u)   |   /* Set L3 Mux Select : CAN1 Rx, Input.          */
+                                          ZYNQ_BIT_MIO_TRI_ENABLE);     /* Enable Tri-State  : Active High.             */
+
+                                                                /*  - TX PIN CONFIG -                                   */
+             ZYNQ_SLCR_REG->MIO_PIN_52 = (ZYNQ_BIT_MIO_DISABLE_RCVR |   /* Disable HSTL Receiver.                       */
+                                          ZYNQ_BIT_MIO_PULL_UP      |   /* Enable Pull- Up Resistor on IO Buffer Pin.   */
+                                          ZYNQ_BIT_MIO_IO_TYPE(1u)  |   /* Set IO Buffer Type: LVCMOS18.                */
+                                          ZYNQ_BIT_MIO_L3_SEL(1u));     /* Set L3 Mux Select : CAN1 Tx, Output.         */
+             break;
+    #endif
+
+        default:
+             bsp_err = DEF_FAIL;
+             return (bsp_err);
+    }
+
+                                                                /*  - STB B PIN CONFIG -                                */
+    ZYNQ_SLCR_REG->MIO_PIN_09 = (ZYNQ_BIT_MIO_DISABLE_RCVR |    /* Disable HSTL Receiver.                               */
+                                 ZYNQ_BIT_MIO_IO_TYPE(1u)  |    /* Set IO Buffer Type: LVCMOS18.                        */
+                                 ZYNQ_BIT_MIO_L3_SEL(0u));      /* Set L3 Mux Select : GPIO 9 (Bank 0) [Set to Output]  */
+
+    ZC7xxx_BSP_GPIO_DIRM0 |=  ZC7xxx_BSP_CAN_STB_B_GPIO;        /* Set CAN STB Pin (GPIO 9) to Output Direction.        */
+    ZC7xxx_BSP_GPIO_OEN0  |=  ZC7xxx_BSP_CAN_STB_B_GPIO;        /* Enable Output for CAN STB Pin (GPIO 9).              */
+    ZC7xxx_BSP_GPIO_DATA0 &= ~ZC7xxx_BSP_CAN_STB_B_GPIO;        /* Bring CAN STB Pin 'LOW', to Enable CAN Transceiver.  */
+
+                                                                /* ------------------ CAN CLK CONFIG ------------------ */
+    ZYNQ_SLCR_REG->CAN_MIOCLK_CTRL = 0u;                        /* Set CAN1 & CAN0 Reference Clks from Internal PLL.    */
+
+    ZYNQ_SLCR_REG->CAN_CLK_CTRL = (ZC7xxx_BSP_CAN_CLK_DIVISOR1(0x03u) | /* IO PLL Clock Divisor 1. See Note (2).        */
+                                   ZC7xxx_BSP_CAN_CLK_DIVISOR0(0x0Eu) | /* IO PLL Clock Divisor 0. See Note (2).        */
+                                   ZC7xxx_BSP_CAN_CLK_SRCSEL_IO_PLL   | /* Clock Source : IO Peripheral PLL.            */
+                                   ZC7xxx_BSP_CAN_CLK_CLKACT1         | /* Ref Clock    : Enable CAN 1 Clock.           */
+                                   ZC7xxx_BSP_CAN_CLK_CLKACT0);         /* Ref Clock    : Enable CAN 0 Clock.           */
+
+    CPU_MB();
+    ZYNQ_SLCR_REG->SLCR_LOCK = ZYNQ_SLCR_LOCK_KEY;              /* Lock SLCR register once more.                        */
+#endif
+
+    return (bsp_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     ZC7xxx_CAN_CalcTimingReg()
+*
+* Description : Calculates the Timing Register Values according to the given Baudrate Settings.
+*
+* Argument(s) : data        Pointer to the Baudrate Settings.
+*
+* Return(s)   : Returns error value of 'DEF_FAIL' if Timeout occurred, if not returns 'DEF_OK'.
+*
+* Caller(s)   : ZC7xxx_CAN_Init().
+*               ZC7xxx_CAN_IoCtl().
+*
+* Note(s)     : (1) The PLL Clock configuration has been automatically created by Xilinx tools and is
+*                   found in the 'zc702.ds' file under the ../../BSP/DS5 folder. The Clock configuration
+*                   for both CAN1 & CAN0 have also been automatically created by Xilinx tools under the
+*                   "Clock Configuration" section of the .ds file. After following the calculations of
+*                   this .ds file, this clock #define was set, as definite points of reference
+*                   from a clearly'undefined' location. It is believed based on this clock configuration
+*                   that the IO PLL is set to 1 GHz.
+*                       The Maximum Clock Frequency for the CAN Module is 24 MHz.
+*
+*               (2) Search a whole-numbered QuantaSum. 16 is the most commonly used number in Time Quantas
+*                   therefore, begin with 16. Alternate between Increasing and Decreasing the number until
+*                   a match is found.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ZC7xxx_CAN_CalcTimingReg (ZC7xxx_CAN_BAUD  *data)
+{
+    CPU_INT32U   time_slices;
+    CPU_INT32U   pres_div;
+    CPU_INT32U   quanta_tot;
+    CPU_INT16S   i;
+    CPU_INT32U   can_clk_freq;
+    CPU_INT32U   bit_freq;
+    CPU_INT16S   sign;
+    CPU_BOOLEAN  err;
+    CPU_INT08U   div;
+
+
+    can_clk_freq = ZC7xxx_BSP_CANx_REF_CLK_FREQ;                /* Get Assumed CANx_REF_CLK. Derived from IO PLL.       */
+    sign         = -1;                                          /* Initialize Variable(s)                               */
+    div          =  0u;
+    err          = DEF_FAIL;
+
+    do {
+        div++;
+        bit_freq    = can_clk_freq / div;                       /* Divide by Try Counter to obtain BUS clk freq in ...  */
+                                                                /* ... order to match for higher frequency              */
+        time_slices = bit_freq / data->BaudRate;
+        if (time_slices < 8u) {
+            break;
+        }
+    } while (((bit_freq / time_slices) != data->BaudRate) ||
+              (time_slices             >  25u));
+
+    if ((bit_freq / time_slices) != data->BaudRate) {           /* Test if Baudrate can be Achieved, if not...          */
+        err = DEF_FAIL;
+    } else {
+
+        i = 0;                                                  /* Calculate factor between CANCLK and Baudrate         */
+        while (i < 14) {                                        /* See Note(2)...                                       */
+            if (sign < 0) {
+                i++;
+            }
+            sign       = -sign;                                 /* Calculate the total number of Time Quanta            */
+            quanta_tot = (CPU_INT32U)(16 + (sign * i));
+            pres_div   = time_slices % quanta_tot;
+            if (pres_div == 0u) {                               /* Check if a Whole-Number is found                     */
+
+                                                                /* Calculate Prescaler                                  */
+                data->PrescalerDiv = (CPU_INT08U)((time_slices * div) / quanta_tot - 1u);
+                                                                /* Calculate PhaseBufSeg2 with Selected Percentage...   */
+                                                                /* of total Time Quanta                                 */
+                data->PhaseBufSeg2 = (CPU_INT08U)(((1000u - data->SamplePoint) * quanta_tot ) / 1000u);
+
+                                                                /* Calculate the TSEG1 Segment Time                     */
+                data->PhaseBufSeg1 = (CPU_INT08U)((quanta_tot - data->PhaseBufSeg2) - 1u);
+
+                if (data->PhaseBufSeg1 >= 16u) {                /* TSEG1/2 Registers allow only a Relation of           */
+                                                                /* 1:2 but 75% sample point is a Relation of            */
+                                                                /* 1:3 therefore move Sample Point in case that         */
+                                                                /* maximum number of Sample Points is used              */
+                    data->PhaseBufSeg1--;
+                    data->PhaseBufSeg2++;
+                }
+                                                                /* Calculate SJW with Selected Percentage...            */
+                                                                /* of Total Time Quanta                                 */
+                data->SJW = (CPU_INT08U)((data->ReSynchJumpWidth * quanta_tot) / 1000u);
+
+                if (data->PhaseBufSeg2 > 1u) {
+                    data->PhaseBufSeg2 -= 1u;                   /* Register Values are Decremented by 1                 */
+                }
+
+                if (data->PhaseBufSeg1 > 1u) {
+                    data->PhaseBufSeg1 -= 1u;                   /* Register Values are Decremented by 1                 */
+                }
+
+                err = DEF_OK;                                   /* Set Return Value to No Error                         */
+                break;
+            }
+        }
+    }
+
+    return (err);                                               /* Return Function Error                                */
+}
+
+
+/*
+*********************************************************************************************************
+*                                       ZC7xxx_CAN_IntSetting()
+*
+* Description : This Function ENABLES the Interrupt Handlers for the ZC7xxx CAN Module based on the
+*               CAN module. On different MCUs, this function serves to configure all the interrupt settings
+*               required. Since this MCU does not require more settings, this is only used to set the
+*               Handlers on the Interrupt Vector Table [IVT].
+*
+* Argument(s) : para_id     Selects the CAN Device [ZC7xxx_CAN_BUS_0, ZC7xxx_CAN_BUS_1].
+*
+* Return(s)   : none.
+*
+* Caller(s)   : ZC7xxx_CAN_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if ((CANBUS_RX_HANDLER_EN > 0u) || \
+     (CANBUS_TX_HANDLER_EN > 0u) || \
+     (CANBUS_NS_HANDLER_EN > 0u))
+void  ZC7xxx_CAN_IntSetting (CPU_INT08U  para_id)
+{
+    switch (para_id) {
+        case ZC7xxx_CAN_BUS_0:
+            UCOS_IntSrcEn(ZC7xxx_BSP_CAN0_INT_ID);
+             break;
+
+
+        case ZC7xxx_CAN_BUS_1:
+            UCOS_IntSrcEn(ZC7xxx_BSP_CAN1_INT_ID);
+             break;
+
+
+        default:
+             break;
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       ZC7xxx_CAN_SetDevIds()
+*
+* Description : This Function sets the Device IDs for the ISRs.
+*
+* Argument(s) : dev_id      CAN Device ID.
+*
+*               dev_name    CAN Device Name.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : ZC7xxx_CAN_Open().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if ((CANBUS_RX_HANDLER_EN > 0u) || \
+     (CANBUS_TX_HANDLER_EN > 0u) || \
+     (CANBUS_NS_HANDLER_EN > 0u))
+void  ZC7xxx_CAN_SetDevIds (CPU_INT08U  dev_id,
+                            CPU_INT08U  dev_name)
+{
+    ZC7xxx_CAN_DevIds[dev_name] = dev_id;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      ZC7xxx_CAN0_ISR_Handler()
+*
+* Description : This holds the Generic CAN Interrupt Handler(s) for CAN0. Based on the ISR pin that is
+*               enabled (Either for Tx, Rx, Err, BusOff, etc) the ISR bit will always hit this handler.
+*               Thus this handler must deal with any ISR pin that occurs. Only Tx & Rx OK messages signify
+*               the Tx/Rx of a new message. Any other ISR flag that get's set must be considered an error
+*               in the CAN Controller.
+*
+* Argument(s) : cpu_id      Function pointer ID from CPU.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : ZC7xxx_CAN_BSP_IntVectSet().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if ((CANBUS_RX_HANDLER_EN > 0u) || \
+     (CANBUS_TX_HANDLER_EN > 0u) || \
+     (CANBUS_NS_HANDLER_EN > 0u))
+#if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+void  ZC7xxx_CAN0_ISR_Handler (CPU_INT32U  cpu_id)
+{
+    if (DEF_BIT_IS_SET(Can0_Reg_ptr->ISR, ZC7xxx_CAN_ISR_TXOK) == DEF_YES) {
+        CanBusTxHandler(ZC7xxx_CAN_DevIds[0u]);                 /* Tx Message Transmitted Successfully.                 */
+        DEF_BIT_SET(Can0_Reg_ptr->ICR, ZC7xxx_CAN_ICR_CTXOK);   /* Clear Tx OK Interrupt.                               */
+
+    } else if (DEF_BIT_IS_SET(Can0_Reg_ptr->ISR, ZC7xxx_CAN_ISR_RXOK) == DEF_YES) {
+        CanBusRxHandler(ZC7xxx_CAN_DevIds[0u]);                 /* New Rx Message was Received & needs to be Read.      */
+        DEF_BIT_SET(Can0_Reg_ptr->ICR, ZC7xxx_CAN_ICR_CRXOK);   /* Clear Rx OK Interrupt.                               */
+
+    } else {
+        ZC7xxx_CAN_ErrCheck(ZC7xxx_CAN_BUS_0);                  /* Error Checking on CAN 0 Bus.                         */
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      ZC7xxx_CAN1_ISR_Handler()
+*
+* Description : This holds the Generic CAN Interrupt Handler(s) for CAN1. Based on the ISR pin that is
+*               enabled (Either for Tx, Rx, Err, BusOff, etc) the ISR bit will always hit this handler.
+*               Thus this handler must deal with any ISR pin that occurs. Only Tx & Rx OK messages signify
+*               the Tx/Rx of a new message. Any other ISR flag that get's set must be considered an error
+*               in the CAN Controller.
+*
+* Argument(s) : cpu_id      Function pointer ID from CPU.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : ZC7xxx_CAN_BSP_IntVectSet().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+void  ZC7xxx_CAN1_ISR_Handler (CPU_INT32U  cpu_id)
+{
+    if (DEF_BIT_IS_SET(Can1_Reg_ptr->ISR, ZC7xxx_CAN_ISR_TXOK) == DEF_YES) {
+        CanBusTxHandler(ZC7xxx_CAN_DevIds[1u]);                 /* Tx Message Transmitted Successfully.                 */
+        DEF_BIT_SET(Can1_Reg_ptr->ICR, ZC7xxx_CAN_ICR_CTXOK);   /* Clear Tx OK Interrupt.                               */
+
+    } else if (DEF_BIT_IS_SET(Can1_Reg_ptr->ISR, ZC7xxx_CAN_ISR_RXOK) == DEF_YES) {
+        CanBusRxHandler(ZC7xxx_CAN_DevIds[1u]);                 /* New Rx Message was Received & needs to be Read.      */
+        DEF_BIT_SET(Can1_Reg_ptr->ICR, ZC7xxx_CAN_ICR_CRXOK);   /* Clear Rx OK Interrupt.                               */
+
+    } else {
+        ZC7xxx_CAN_ErrCheck(ZC7xxx_CAN_BUS_1);                  /* Error Checking on CAN 0 Bus.                         */
+    }
+}
+#endif
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_bsp.h b/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_bsp.h
new file mode 100644
index 0000000..8aa71b9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_bsp.h
@@ -0,0 +1,171 @@
+/*
+*********************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        CAN ZC7xxx DRIVER BSP
+*
+*                                            ZYNQ 7000 EPP
+*                                               on the
+*                                       ZC702 development board
+*
+* Filename      : can_bsp.h
+* Version       : V2.41.00
+* Programmer(s) : DC
+*********************************************************************************************************
+*/
+
+#ifndef  _DRV_CAN_BSP_H_
+#define  _DRV_CAN_BSP_H_
+
+
+/*
+*********************************************************************************************************
+*                                              INCLUDES
+*********************************************************************************************************
+*/
+
+#include  "cpu.h"
+#include  "drv_can_reg.h"
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*
+* Note(s) : (1) The PLL Clock configuration has been automatically created by Xilinx tools and is
+*               found in the 'zc702.ds' file under the ../../BSP/DS5 folder. The Clock configuration
+*               for both CAN1 & CAN0 have also been automatically created by Xilinx tools under the
+*               "Clock Configuration" section of the .ds file. After following the calculations of
+*               this .ds file, the following Clock #defines were set, as definite points of reference
+*               from a clearly'undefined' location.
+*
+*               The Maximum Clock Frequency for the CAN Module is 24 MHz.
+*********************************************************************************************************
+*/
+                                                                /* ------------- PERIPHERAL INTERRUPT IDs ------------- */
+#define  ZC7xxx_BSP_CAN0_INT_ID                         60u
+#define  ZC7xxx_BSP_CAN1_INT_ID                         83u
+
+                                                                /* -------------- MIO PIN CONFIG DEFINES -------------- */
+#define  ZC7xxx_BSP_CAN0_RX_PIN                         46u
+#define  ZC7xxx_BSP_CAN0_TX_PIN                         47u
+
+#define  ZC7xxx_BSP_CAN1_RX_PIN                         53u
+#define  ZC7xxx_BSP_CAN1_TX_PIN                         52u
+
+                                                                /* -------------- SLCR CAN RESET DEFINES -------------- */
+#define  ZC7xxx_BSP_CAN0_CPU1X_RST              DEF_BIT_00
+#define  ZC7xxx_BSP_CAN1_CPU1X_RST              DEF_BIT_01
+
+
+                                                                /* ---------------- CLOCK CONFIGURATION --------------- */
+#define  ZC7xxx_BSP_CANx_REF_CLK_FREQ            (24000000uL)   /* See Note (1).                                        */
+#define  ZC7xxx_BSP_IO_PLL_FREQ                (1000000000uL)
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*********************************************************************************************************
+*/
+                                                                /* ----------------- SLCR CAN CLK CTRL ---------------- */
+#define  ZC7xxx_BSP_CAN_CLK_SRCSEL_IO_PLL      (0u << 4u)
+#define  ZC7xxx_BSP_CAN_CLK_SRCSEL_ARM_PLL     (2u << 4u)
+#define  ZC7xxx_BSP_CAN_CLK_SRCSEL_DDR_PLL     (3u << 4u)
+
+#define  ZC7xxx_BSP_CAN_CLK_CLKACT1             DEF_BIT_01
+#define  ZC7xxx_BSP_CAN_CLK_CLKACT0             DEF_BIT_00
+
+                                                                /* --------------- SLCR CAN MIOCLK CTRL --------------- */
+#define  ZC7xxx_BSP_CAN_MIOCLK_CAN1_REF_SEL     DEF_BIT_22
+#define  ZC7xxx_BSP_CAN_MIOCLK_CAN0_REF_SEL     DEF_BIT_06
+
+                                                                /* ------------------ CAN STB B GPIO ------------------ */
+#define  ZC7xxx_BSP_CAN_STB_B_GPIO              DEF_BIT_09
+
+
+/*
+*********************************************************************************************************
+*                                              REGISTERS
+*********************************************************************************************************
+*/
+                                                                /* ---------------- CAN STB B GPIO REGs --------------- */
+#define  ZC7xxx_BSP_GPIO_BASE_ADDR              0xE000A000u
+
+#define  ZC7xxx_BSP_GPIO_DATA0                 (*((CPU_REG32 *)(ZC7xxx_BSP_GPIO_BASE_ADDR + 0x040u)))
+#define  ZC7xxx_BSP_GPIO_DIRM0                 (*((CPU_REG32 *)(ZC7xxx_BSP_GPIO_BASE_ADDR + 0x204u)))
+#define  ZC7xxx_BSP_GPIO_OEN0                  (*((CPU_REG32 *)(ZC7xxx_BSP_GPIO_BASE_ADDR + 0x208u)))
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+                                                                /* ----------------- SLCR CAN CLK CTRL ---------------- */
+#define  ZC7xxx_BSP_CAN_CLK_DIVISOR1(x)        (((x) & 0x3Fu) << 20u)
+
+#define  ZC7xxx_BSP_CAN_CLK_DIVISOR0(x)        (((x) & 0x3Fu) <<  8u)
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  ZC7xxx_CAN_BSP_Start     (CPU_INT08U        para_id);
+
+CPU_BOOLEAN  ZC7xxx_CAN_PinSetting    (CPU_INT08U        para_id);
+
+CPU_BOOLEAN  ZC7xxx_CAN_CalcTimingReg (ZC7xxx_CAN_BAUD  *data);
+
+
+#if ((CANBUS_RX_HANDLER_EN > 0) || \
+     (CANBUS_TX_HANDLER_EN > 0) || \
+     (CANBUS_NS_HANDLER_EN > 0))
+void         ZC7xxx_CAN_BSP_IntVectSet(void);
+
+void         ZC7xxx_CAN_IntSetting    (CPU_INT08U        para_id);
+
+void         ZC7xxx_CAN_SetDevIds     (CPU_INT08U        dev_id,
+                                       CPU_INT08U        dev_name);
+
+#if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+void         ZC7xxx_CAN0_ISR_Handler  (CPU_INT32U        cpu_id);
+#endif
+
+#if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+void         ZC7xxx_CAN1_ISR_Handler  (CPU_INT32U        cpu_id);
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_cfg.c b/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_cfg.c
new file mode 100644
index 0000000..d64c5ad
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_cfg.c
@@ -0,0 +1,338 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2013; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+*                                         uC/CAN CONFIGURATION
+*
+*                                            Renesas ZC7xxx
+*                                              CAN DRIVER
+*
+* Filename      : can_cfg.c
+* Version       : V2.41.00
+* Programmer(s) : DC
+****************************************************************************************************
+*/
+
+
+/*
+****************************************************************************************************
+*                                             INCLUDES
+****************************************************************************************************
+*/
+
+#include  "can_cfg.h"
+#include  "can_sig.h"
+#include  "can_bus.h"
+#include  "can_frm.h"
+#include  "can_msg.h"
+#include  "can_os.h"
+#include  "drv_can.h"
+
+
+/*
+****************************************************************************************************
+*                                             DEFINES
+****************************************************************************************************
+*/
+
+
+/*
+****************************************************************************************************
+*                                              MACROS
+****************************************************************************************************
+*/
+
+#if (CANSIG_GRANULARITY == CAN_CFG_BIT)
+#define  CAN_CFG_SIZE_MOD       8
+#else
+#define  CAN_CFG_SIZE_MOD       1
+#endif
+
+
+/*
+****************************************************************************************************
+*                                            LOCAL DATA
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+*                                  CAN SIGNAL CALLBACK DEFINITION
+*
+* Description : Prototype of Signal Callback Function. This is only an example to be replaced by
+*               one or more user Callback Functions.
+*
+* Note(s)     : none.
+****************************************************************************************************
+*/
+
+#if (CANSIG_CALLBACK_EN == 1)
+void  CallBackFct (void  *p_arg, CANSIG_VAL_T  *val, CPU_INT32U  callback_id);
+#endif
+
+
+/*
+****************************************************************************************************
+*                                            GOBAL DATA
+****************************************************************************************************
+*/
+
+
+/*
+****************************************************************************************************
+*                                        CAN BUS SEMAPHORES
+*
+* Description :  Allocation of Semaphores for Buffering Resources. The following
+*                implementation is an implementation for µC/OS-II.
+*
+* Note(s)     : none.
+****************************************************************************************************
+*/
+
+#if (OS_VERSION > 30000u)
+OS_SEM  CANOS_TxSem[CANBUS_N];
+OS_SEM  CANOS_RxSem[CANBUS_N];
+#else
+OS_EVENT  CANOS_TxSem[CANBUS_N];
+OS_EVENT  CANOS_RxSem[CANBUS_N];
+#endif
+
+
+/*
+****************************************************************************************************
+*                                           CAN SIGNALS
+*
+* Description : Allocation of CAN Signals
+*
+* Note(s)     : This table must be modified by the user to define all Signals needed for the
+*               Application. The below defined Signals are only examples and might be modified or
+*               removed.
+****************************************************************************************************
+*/
+
+const  CANSIG_PARA  CanSig[CANSIG_N] = {
+                                                                /* ---------------- SIGNAL NODESTATUS ----------------- */
+    {CANSIG_UNCHANGED,                                          /*      Initial Status                                  */
+      1,                                                        /*      Width in Bytes                                  */
+      0,                                                        /*      Initial Value                                   */
+#if (CANSIG_CALLBACK_EN > 0)
+      0},                                                       /*      Callback Function: User Defined                 */
+#else
+    },
+#endif
+                                                                /* ----------------- SIGNAL CPULOAD ------------------- */
+    {CANSIG_UNCHANGED,                                          /*      Initial Status                                  */
+      1,                                                        /*      Width in Bytes                                  */
+      0,                                                        /*      Initial Value                                   */
+#if (CANSIG_CALLBACK_EN > 0)
+      0}                                                        /*      No Callback                                     */
+#else
+    },
+#endif
+};
+
+
+/*
+****************************************************************************************************
+*                                           CAN MESSAGES
+*
+* Description : Allocation of CAN Messages
+*
+* Note(s)     : This Table must be modified by the user to define all Messages needed for
+*               the Application. The below defined Messages are only examples and might be
+*               modified or removed.
+****************************************************************************************************
+*/
+
+const  CANMSG_PARA  CanMsg[CANMSG_N] =
+{
+                                                                /* ------------------ MESSAGE STATUS ------------------ */
+   { 0x123L,                                                    /*      CAN-Identifier                                  */
+     CANMSG_TX,                                                 /*      Message Type                                    */
+     3,                                                         /*      DLC of Message                                  */
+     3,                                                         /*      No. of Links                                    */
+      { { S_NODESTATUS,                                         /*      Signal ID                                       */
+         0 },                                                   /*      Byte Position                                   */
+        { S_COUNTER,                                            /*      Signal ID                                       */
+         1 },                                                   /*      Byte Position                                   */
+      { S_CPULOAD,                                              /*      Signal ID                                       */
+       2 } } },                                                 /*      Byte Position                                   */
+
+                                                                /* ----------------- MESSAGE COMMAND ------------------ */
+   { 0x122L,                                                    /*      CAN-Identifier                                  */
+     CANMSG_RX,                                                 /*      Message Type                                    */
+     1,                                                         /*      DLC of Message                                  */
+     1,                                                         /*      No. of Links                                    */
+     { { S_NODESTATUS,                                          /*      Signal ID                                       */
+       0 } } }                                                  /*      Byte Position                                   */
+};
+
+
+/*
+****************************************************************************************************
+*                                     CAN SIGNAL CONFIGURATION
+*
+* Description : Allocation of Global CAN Signal Table.
+*
+* Note(s)     : This is the Signal Table on which the CAN
+*               Signal Layer will work. If the CANSIG_STATIC Configuration is chosen it will be
+*               initialized with the CanCfg_Init() Function otherwise it will be filled by calling
+*               CanSigCreate().
+****************************************************************************************************
+*/
+
+CANSIG_DATA  CanSigTbl[CANSIG_N];
+
+
+/*
+****************************************************************************************************
+*                                      CAN BUS CONFIGURATION
+*
+* Description : This structure contains the information for a bus for Can Controller 0.
+*               A bus represents one interface to the world.
+*
+* Note(s)     : none.
+****************************************************************************************************
+*/
+
+#if  (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+const  CANBUS_PARA  CanCfg0 = {
+    CAN_FALSE,                                                  /* EXTENDED FLAG                                        */
+    CAN_DEFAULT_BAUDRATE,                                       /* BAUDRATE                                             */
+    0u,                                                         /* BUS NODE                                             */
+    0u,                                                         /* BUS DEVICE                                           */
+                                                                /* DRIVER FUNCTIONS                                     */
+    ZC7xxx_CAN_Init,                                            /*      Init                                            */
+    ZC7xxx_CAN_Open,                                            /*      Open                                            */
+    ZC7xxx_CAN_Close,                                           /*      Close                                           */
+    ZC7xxx_CAN_IoCtl,                                           /*      IoCtl                                           */
+    ZC7xxx_CAN_Read,                                            /*      Read                                            */
+    ZC7xxx_CAN_Write,                                           /*      Write                                           */
+    {                                                           /* DRIVER IO FUNCTION CODES  (Init Drv Codes)           */
+        IO_ZC7xxx_CAN_SET_BAUDRATE,                             /*      Set Baud Rate                                   */
+        IO_ZC7xxx_CAN_START,                                    /*      Start                                           */
+        IO_ZC7xxx_CAN_CONFIG,                                   /*      Config                                          */
+        IO_ZC7xxx_CAN_RX_STANDARD,                              /*      Rx Standard                                     */
+        IO_ZC7xxx_CAN_RX_EXTENDED,                              /*      Rx Extended                                     */
+        IO_ZC7xxx_CAN_TX_READY,                                 /*      Tx Ready                                        */
+        IO_ZC7xxx_CAN_GET_NODE_STATUS,                          /*      Get Node Status                                 */
+    }
+};
+#endif
+
+
+/*
+****************************************************************************************************
+*                                      CAN BUS CONFIGURATION
+*
+* Description : This structure contains the information for a bus for Can Controller 1.
+*               A bus represents one interface to the world.
+*
+* Note(s)     : none.
+****************************************************************************************************
+*/
+
+#if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+const  CANBUS_PARA  CanCfg1 = {
+    CAN_FALSE,                                                  /* EXTENDED FLAG                                        */
+    CAN_DEFAULT_BAUDRATE,                                       /* BAUDRATE                                             */
+    1u,                                                         /* BUS NODE                                             */
+    1u,                                                         /* BUS DEVICE                                           */
+                                                                /* DRIVER FUNCTIONS                                     */
+    ZC7xxx_CAN_Init,                                            /*      Init                                            */
+    ZC7xxx_CAN_Open,                                            /*      Open                                            */
+    ZC7xxx_CAN_Close,                                           /*      Close                                           */
+    ZC7xxx_CAN_IoCtl,                                           /*      IoCtl                                           */
+    ZC7xxx_CAN_Read,                                            /*      Read                                            */
+    ZC7xxx_CAN_Write,                                           /*      Write                                           */
+    {                                                           /* DRIVER IO FUNCTION CODES  (Init Drv Codes)           */
+        IO_ZC7xxx_CAN_SET_BAUDRATE,                             /*      Set Baud Rate                                   */
+        IO_ZC7xxx_CAN_START,                                    /*      Start                                           */
+        IO_ZC7xxx_CAN_CONFIG,                                   /*      Config                                          */
+        IO_ZC7xxx_CAN_RX_STANDARD,                              /*      Rx Standard                                     */
+        IO_ZC7xxx_CAN_RX_EXTENDED,                              /*      Rx Extended                                     */
+        IO_ZC7xxx_CAN_TX_READY,                                 /*      Tx Ready                                        */
+        IO_ZC7xxx_CAN_GET_NODE_STATUS,                          /*      Get Node Status                                 */
+    }
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CAN BUS NODE STATUS HOOK
+*
+* Description: This function is called by CanBusNSHandler().
+*
+* Arguments  : bus Id
+*********************************************************************************************************
+*/
+
+#if CANBUS_HOOK_NS_EN == 1
+void  CanBusNSHook (CPU_INT16S  bus_id)
+{
+    (void)&bus_id;                                              /* Prevent Compiler Warning                             */
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                            CAN BUS RX HOOK
+*
+* Description: This function is called by CanBusRxHandler().
+*
+* Arguments  : bus Id
+*********************************************************************************************************
+*/
+
+#if CANBUS_HOOK_RX_EN == 1
+CPU_INT16S  CanBusRxHook (CPU_INT16S  bus_id, void  *buf)
+{
+    (void)&bus_id;                                              /* Prevent Compiler Warning                             */
+    return (0);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CALLBACK FUNCTION
+*
+* Description: This function is the callback function example of the CAN signal layer. It
+*              has to be replaced by one or more user callback functions.
+*
+* Arguments  : arg          pointer to signal
+*              value        of signal
+*              callback_id  to identify where this callback function was called from
+*********************************************************************************************************
+*/
+
+#if CANSIG_CALLBACK_EN == 1
+void  CallBackFct (void  *p_arg, CANSIG_VAL_T  *val, CPU_INT32U  callback_id)
+{
+    (void)&callback_id;                                         /* Prevent Compiler Warning                             */
+    (void)&val;                                                 /* Prevent Compiler Warning                             */
+    (void)&p_arg;                                               /* Prevent Compiler Warning                             */
+
+}
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_cfg.h b/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_cfg.h
new file mode 100644
index 0000000..e2d25db
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_can/src/bsp/can_cfg.h
@@ -0,0 +1,202 @@
+/*
+*********************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        uC/CAN CONFIGURATION
+*
+*                                         ZYNQ ZC7000 Series
+*                                             CAN DRIVER
+* Filename      : can_cfg.h
+* Version       : V2.41.00
+* Programmer(s) : E0
+*                 DC
+*********************************************************************************************************
+*/
+
+#ifndef _CAN_CFG_H_
+#define _CAN_CFG_H_
+
+#include  "lib_def.h"
+
+
+/*
+*********************************************************************************************************
+*                                    COMMON DEFINES & ENUMERATIONS
+*********************************************************************************************************
+*/
+
+                                                                /* Definiton for CANSIG_GRANULARITY, Options:           */
+#define  CAN_CFG_BIT                            0u              /*      BIT                                             */
+#define  CAN_CFG_BYTE                           1u              /*      BYTE                                            */
+
+#ifndef  CAN_FALSE
+#define  CAN_FALSE                              0u
+#endif
+
+#ifndef  CAN_TRUE
+#define  CAN_TRUE                               1u
+#endif
+
+#ifndef  NULL_PTR
+#define  NULL_PTR                              (void *)0
+#endif
+      
+                                                                /* ------------ APPLICATION ENUMERATIONS -------------- */
+enum {
+   S_NODESTATUS = 0, 
+   S_CPULOAD, 
+   S_COUNTER, 
+   S_MAX,
+};
+
+enum {
+   M_STATUS = 0, 
+   M_COMMAND, 
+   M_MAX
+};
+
+
+/*
+*********************************************************************************************************
+*                                      MULTIPLE CAN CONTROLLERS
+*********************************************************************************************************
+*/
+
+#define  CAN_MODULE_CHANNEL_0                   DEF_ENABLED
+#define  CAN_MODULE_CHANNEL_1                   DEF_DISABLED
+
+
+/*
+*********************************************************************************************************
+*                                       DRIVER SPECIFIC DEFINES
+*********************************************************************************************************
+*/
+                                                                /* ---------------- BAUDRATE SETTINGS ----------------- */
+#define  CAN_DEFAULT_BAUDRATE             1000000u              /* Default Baudrate                                     */
+#define  CAN_DEFAULT_SP                       750u              /* Default Bit Sample Point in 1/10 %                   */
+#define  CAN_DEFAULT_RJW                      125u              /* Default Re-Synch Jump Width in 1/10 %                */
+
+                                                                /* ---------------- TIMEOUT SETTINGS ------------------ */
+#define  CAN_TIMEOUT_ERR_VAL               100000uL             /* Timeout Value for While Loop Error Checks            */
+
+
+/* ==================================  ADVANCED DRIVER CONFIGURATION: DEFAULT VALUES ================================== */
+/*  By Default, the following Driver specific settings for the ZYNQ ZC7xxx Driver are set to their default values       */
+/*  unless they are modified by customer needs.                                                                         */
+/*                                                                                                                      */
+/*  By Default, the Watermark level is configured to Maximum Watermark Value in the Driver, based on the reset value    */
+/*  presented by the Reference Manual. Redefine the following define to modify the Watermark Level for the following.   */
+/*      Tx FIFO Empty & Rx FIFO Full Watermark Level(s):                                                                */
+/*          NOTE : The VALID range is between 1 & 63.                                                                   */
+/*                                                                                                                      */
+/*          #define  CAN_WATERMARK_Rx_Tx_SIZE              63u                                                          */
+/*                                                                                                                      */
+/*  By Default, the Operating Mode of the CAN controller is configured to "NORMAL" Mode. For diagnostic checking,       */
+/*  additional operating modes have been included in the driver. Redefine the following define to modify the Operating  */
+/*  Mode to either "LOOP BACK" or "SNOOP" Mode(s).                                                                      */
+/*      NOTE that only one operating mode can be selected at once at Initialization. Once CAN has been Initialized it   */
+/*           is possible to change between Operating Modes at run-time using the xxx_CAN_IoCtl() API Function call.     */
+/*                                                                                                                      */
+/*          #define  CAN_DIAGNOSTIC_OFF                     0u                                                          */
+/*          #define  CAN_DIAGNOSTIC_LOOPBACK                1u                                                          */
+/*          #define  CAN_DIAGNOSTIC_SNOOP                   2u                                                          */
+/*                                                                                                                      */
+/*          #define  CAN_DIAGNOSTIC_SELECT                  CAN_DIAGNOSTIC_LOOPBACK                                     */
+/*                                                                                                                      */
+/* ==================================================================================================================== */
+
+
+/*
+*********************************************************************************************************
+*                                               CAN BUS
+*********************************************************************************************************
+*/
+
+#define  CANBUS_EN                              1u              /* Enable CAN Bus Management                            */
+#define  CANBUS_N                               3u              /*   Number of busses                                   */
+#define  CANBUS_ARG_CHK_EN                      1u              /*   Enable runtime argument checking                   */
+#define  CANBUS_TX_HANDLER_EN                   1u              /*   Enable usage of CanBusTxHandler                    */
+#define  CANBUS_RX_HANDLER_EN                   1u              /*   Enable usage of CanBusRxHandler                    */
+#define  CANBUS_NS_HANDLER_EN                   1u              /*   Enable usage of CanBusNsHandler                    */
+												  
+#define  CANBUS_STAT_EN                         1u              /*   Enable Bus Statistics                              */
+#define  CANBUS_TX_QSIZE                 (2u * CANBUS_N)        /*   Transmit Queue Size in CAN Frames for each CAN Bus */
+#define  CANBUS_RX_QSIZE                 (2u * CANBUS_N)        /*   Receive Queue Size in CAN Frames for each CAN Bus  */
+
+#define  CANBUS_HOOK_NS_EN                      1u              /*   Enable Node Status Handler Hook Function           */
+#define  CANBUS_HOOK_RX_EN                      1u              /*   Enable Rx Handler Hook Function                    */
+#define  CANBUS_RX_READ_ALWAYS_EN               1u              /*   If enabled the Rx Handler executes a read even..   */
+                                                                /*   .. when frames can't be allocated                  */
+
+
+/*
+*********************************************************************************************************
+*                                             CAN MESSAGE
+*********************************************************************************************************
+*/
+
+#define  CANMSG_EN                              1u              /* Enable CAN Message Support                           */
+#define  CANMSG_N                               2u              /*   Number of messages                                 */
+#define  CANMSG_ARG_CHK_EN                      1u              /*   Enable runtime argument checking                   */
+
+
+/*
+*********************************************************************************************************
+*                                             CAN SIGNAL
+*********************************************************************************************************
+*/
+
+#define  CANSIG_EN                              1u              /* Enable CAN Signal Database                           */
+#define  CANSIG_N                               3u              /*   Number of signals                                  */
+#define  CANSIG_ARG_CHK_EN                      1u              /*   Enable runtime argument checking                   */
+#define  CANSIG_MAX_WIDTH                       4u              /*   Maximal signal width in byte                       */
+#define  CANSIG_GRANULARITY               CAN_CFG_BYTE          /*   Set signal resolution to byte                      */
+#define  CANSIG_STATIC_CONFIG                   1u              /* To reduce memory usage, declare static signal table  */
+#define  CANSIG_USE_DELETE                      0u              /* To reduce memory usage don't use delete functions    */
+#define  CANSIG_CALLBACK_EN                     0u              /* Enable callback functions                            */
+
+
+/*
+*********************************************************************************************************
+*                                              CAN FRAME
+*********************************************************************************************************
+*/
+
+#define  CANFRM_ARG_CHK_EN                      1u              /* Enable runtime argument checking                     */
+
+
+/*
+*********************************************************************************************************
+*                                               CAN OS
+*********************************************************************************************************
+*/
+
+#define  CANOS_ARG_CHK_EN                       1u              /* Enable runtime argument checking                     */
+
+
+/*
+*********************************************************************************************************
+*                                          CONFIGURATION END
+*********************************************************************************************************
+*/
+
+#endif  /* #ifndef _CAN_CFG_H_ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_common/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_common/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_common/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cache/mb_dcache_init.c b/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cache/mb_dcache_init.c
new file mode 100644
index 0000000..a5a8bba
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cache/mb_dcache_init.c
@@ -0,0 +1,65 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                     uC/CPU CACHE MANAGEMENT PORT
+*
+* Filename      : mb_dcache_init.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+/*
+*********************************************************************************************************
+*                                            CPU_Cache_Init()
+*
+* Description : none.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_Init().
+*
+*               This function is an INTERNAL uC/CPU function & MUST NOT be called by application
+*               function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  CPU_Cache_Init (void)
+{
+
+}
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cache/mb_flush_dcache_range.S b/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cache/mb_flush_dcache_range.S
new file mode 100644
index 0000000..77a7bf3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cache/mb_flush_dcache_range.S
@@ -0,0 +1,93 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc.  All rights reserved.
+* Copyright (C) 2015 Micrium, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+* CPU_DCache_RangeFlush (unsigned int cacheaddr, unsigned int len)
+*
+*    Flush a L1 DCache range
+*
+*    Parameters:
+*       'cacheaddr' - address in the Dcache where the flush begins
+*	'len    '   - length (in bytes) worth of Dcache to be flushed
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#ifndef XPAR_MICROBLAZE_DCACHE_LINE_LEN
+#define XPAR_MICROBLAZE_DCACHE_LINE_LEN   1
+#endif
+
+#define MB_HAS_WRITEBACK_SET XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK
+
+	.text
+	.globl	CPU_DCache_RangeFlush
+	.ent	CPU_DCache_RangeFlush
+	.align	2
+
+CPU_DCache_RangeFlush:
+
+
+        beqi    r6, L_done                                      /* Skip loop if size is zero */
+
+        add	r6, r5, r6                                      /* Compute end address */
+        addik   r6, r6, -1
+
+        andi    r6, r6, -(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)  /* Align end down to cache line */
+        andi    r5, r5, -(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)  /* Align start down to cache line */
+
+#if MB_HAS_WRITEBACK_SET == 0                                   /* Use a different scheme for MB version < v7.20 or when caches are write-through */
+
+L_start:
+    	cmpu	r18, r5, r6                                     /* Are we at the end? */
+	blti	r18, L_done
+
+	wdc     r5, r0                                          /* Invalidate the cache line */
+
+     	brid	L_start                                         /* Branch to the beginning of the loop */
+	addik	r5, r5, (XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)   /* Increment the addrees by 4 (delay slot) */
+#else
+        rsubk   r6, r5, r6
+                                                                /* r6 will now contain (count of bytes - (4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)) */
+L_start:
+        wdc.flush r5, r6                                        /* Flush the cache line */
+        bneid   r6, L_start
+        addik   r6, r6, -(XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)
+
+#endif
+
+L_done:
+	rtsd	r15, 8
+    nop
+
+	.end	CPU_DCache_RangeInv
+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cache/mb_invalidate_dcache_range.S b/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cache/mb_invalidate_dcache_range.S
new file mode 100644
index 0000000..cacc8f1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cache/mb_invalidate_dcache_range.S
@@ -0,0 +1,95 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc.  All rights reserved.
+* Copyright (C) 2015 Micrium, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+*
+* CPU_DCache_RangeInv (unsigned int cacheaddr, unsigned int len)
+*
+*    Invalidate a Dcache range
+*
+*    Parameters:
+*       'cacheaddr' - address in the Dcache where invalidation begins
+*	'len    '   - length (in bytes) worth of Dcache to be invalidated
+*
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#ifndef XPAR_MICROBLAZE_DCACHE_LINE_LEN
+#define XPAR_MICROBLAZE_DCACHE_LINE_LEN     1
+#endif
+
+#define MB_HAS_WRITEBACK_SET XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK
+
+	.text
+	.globl	CPU_DCache_RangeInv
+	.ent	CPU_DCache_RangeInv
+	.align	2
+
+CPU_DCache_RangeInv:
+
+        beqi    r6, L_done                                      /* Skip loop if size is zero */
+
+        add	r6, r5, r6                                      /* Compute end address */
+        addik   r6, r6, -1
+
+        andi    r6, r6, -(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)  /* Align end down to cache line */
+        andi    r5, r5, -(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)  /* Align start down to cache line */
+
+#if MB_HAS_WRITEBACK_SET == 0                                   /* Use a different scheme for MB version < v7.20 or when caches are write-through */
+
+L_start:
+    	cmpu	r18, r5, r6                                     /* Are we at the end? */
+	blti	r18, L_done
+
+	wdc     r5, r0
+
+     	brid	L_start                                         /* Branch to the beginning of the loop */
+	addik	r5, r5, (XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)   /* Increment the addrees by 4 (delay slot) */
+#else
+
+        rsubk   r6, r5, r6
+                                                                /* r6 will now contain (count of bytes - (4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)) */
+L_start:
+        wdc.clear r5, r6                                        /* Invalidate the cache line only if the address matches */
+        bneid   r6, L_start
+        addik   r6, r6, -(XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)
+
+#endif
+
+L_done:
+	rtsd	r15, 8
+    nop
+
+	.end	CPU_DCache_RangeInv
+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cpu_bsp.c b/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cpu_bsp.c
new file mode 100644
index 0000000..91af567
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_common/src/mb/cpu_bsp.c
@@ -0,0 +1,360 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               CPU BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                           Cortex A9 MPCore
+*
+* Filename      : cpu_bsp.c
+* Version       : V1.29.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    CPU_BSP_MODULE
+
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+#if (UCOS_TS_DRIVER == UCOS_TS_AXITIMER)
+#include  
+#endif /* #if (UCOS_TS_DRIVER == UCOS_TS_AXITIMER) */
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if (UCOS_TS_DRIVER == UCOS_TS_AXITIMER)
+static AXITIMER_HANDLE TmrHandle;
+#endif /* #if (UCOS_TS_DRIVER == UCOS_TS_AXITIMER) */
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CPU_TS_TmrInit()
+*
+* Description : Initialize & start CPU timestamp timer.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_TS_Init().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrInit() is an application/BSP function that MUST be defined by the developer
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR'
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR'
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                   (c) When applicable, timer period SHOULD be less than the typical measured time
+*                       but MUST be less than the maximum measured time; otherwise, timer resolution
+*                       inadequate to measure desired times.
+*
+*                   See also 'CPU_TS_TmrRd()  Note #2'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+void  CPU_TS_TmrInit (void)
+{
+#if (UCOS_TS_DRIVER == UCOS_TS_AXITIMER)
+    CPU_INT32U tmr_freq;
+
+    TmrHandle = AXITimer_Init(UCOS_TS_DEVICE_ID);
+
+    AXITimer_OptSet(TmrHandle, 0, AXITIMER_BIT_TCSR_CASC);
+
+    tmr_freq = AXITimer_FreqGet(TmrHandle);
+    CPU_TS_TmrFreqSet(tmr_freq);
+
+    AXITimer_Start(TmrHandle, 0);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_TS_TmrRd()
+*
+* Description : Get current CPU timestamp timer count value.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Timestamp timer count (see Notes #2a & #2b).
+*
+* Caller(s)   : CPU_TS_Init(),
+*               CPU_TS_Get32(),
+*               CPU_TS_Get64(),
+*               CPU_IntDisMeasStart(),
+*               CPU_IntDisMeasStop().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but SHOULD NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrRd() is an application/BSP function that MUST be defined by the developer
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR'
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR'
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                       (1) If timer is a 'down' counter whose values decrease with each time count,
+*                           then the returned timer value MUST be ones-complemented.
+*
+*                   (c) (1) When applicable, the amount of time measured by CPU timestamps is
+*                           calculated by either of the following equations :
+*
+*                           (A) Time measured  =  Number timer counts  *  Timer period
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer period            Timer's period in some units of
+*                                                                   (fractional) seconds
+*                                       Time measured           Amount of time measured, in same
+*                                                                   units of (fractional) seconds
+*                                                                   as the Timer period
+*
+*                                                  Number timer counts
+*                           (B) Time measured  =  ---------------------
+*                                                    Timer frequency
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer frequency         Timer's frequency in some units
+*                                                                   of counts per second
+*                                       Time measured           Amount of time measured, in seconds
+*
+*                       (2) Timer period SHOULD be less than the typical measured time but MUST be less
+*                           than the maximum measured time; otherwise, timer resolution inadequate to
+*                           measure desired times.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+CPU_TS_TMR  CPU_TS_TmrRd (void)
+{
+#if (UCOS_TS_DRIVER == UCOS_TS_AXITIMER)
+    CPU_TS_TMR  ts_tmr_cnts;
+    CPU_INT32U  ts_tmr_low;
+    CPU_INT32U  ts_tmr_high_a;
+    CPU_INT32U  ts_tmr_high_b;
+
+    ts_tmr_high_b = *((CPU_REG32 *)(UCOS_TS_BASE_ADDR + 0x18u));
+
+    do {
+        ts_tmr_high_a = ts_tmr_high_b;
+        ts_tmr_low    = *((CPU_REG32 *)(UCOS_TS_BASE_ADDR + 0x08u));
+        ts_tmr_high_b = *((CPU_REG32 *)(UCOS_TS_BASE_ADDR + 0x18u));
+    } while (ts_tmr_high_a != ts_tmr_high_b);
+
+    ts_tmr_cnts  = ts_tmr_high_a;
+    ts_tmr_cnts  = ts_tmr_cnts << 32u;
+    ts_tmr_cnts += ts_tmr_low;
+
+    return (ts_tmr_cnts);
+#else
+    return (0);
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_TSxx_to_uSec()
+*
+* Description : Convert a 32-/64-bit CPU timestamp from timer counts to microseconds.
+*
+* Argument(s) : ts_cnts   CPU timestamp (in timestamp timer counts [see Note #2aA]).
+*
+* Return(s)   : Converted CPU timestamp (in microseconds           [see Note #2aD]).
+*
+* Caller(s)   : Application.
+*
+*               This function is an (optional) CPU module application programming interface (API)
+*               function which MAY be implemented by application/BSP function(s) [see Note #1] &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS32_to_uSec()/CPU_TS64_to_uSec() are application/BSP functions that MAY be
+*                   optionally defined by the developer when either of the following CPU features is
+*                   enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) The amount of time measured by CPU timestamps is calculated by either of
+*                       the following equations :
+*
+*                                                                        10^6 microseconds
+*                       (1) Time measured  =   Number timer counts   *  -------------------  *  Timer period
+*                                                                            1 second
+*
+*                                              Number timer counts       10^6 microseconds
+*                       (2) Time measured  =  ---------------------  *  -------------------
+*                                                Timer frequency             1 second
+*
+*                               where
+*
+*                                   (A) Number timer counts     Number of timer counts measured
+*                                   (B) Timer frequency         Timer's frequency in some units
+*                                                                   of counts per second
+*                                   (C) Timer period            Timer's period in some units of
+*                                                                   (fractional)  seconds
+*                                   (D) Time measured           Amount of time measured,
+*                                                                   in microseconds
+*
+*                   (b) Timer period SHOULD be less than the typical measured time but MUST be less
+*                       than the maximum measured time; otherwise, timer resolution inadequate to
+*                       measure desired times.
+*
+*                   (c) Specific implementations may convert any number of CPU_TS32 or CPU_TS64 bits
+*                       -- up to 32 or 64, respectively -- into microseconds.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_32_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS32_to_uSec (CPU_TS32  ts_cnts)
+{
+    CPU_INT32U  res;
+
+#if (UCOS_TS_DRIVER == UCOS_TS_AXITIMER)
+    res = (CPU_INT32U)(ts_cnts / (CPU_TS_TmrFreq_Hz / 2));
+#else
+    res = 0;
+#endif
+
+    return (res);
+}
+#endif
+
+
+#if (CPU_CFG_TS_64_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS64_to_uSec (CPU_TS64  ts_cnts)
+{
+    CPU_INT64U  res;
+
+#if (UCOS_TS_DRIVER == UCOS_TS_AXITIMER)
+    res = ts_cnts / (CPU_TS_TmrFreq_Hz / 2);
+#else
+    res = 0;
+#endif
+
+    return (res);
+}
+#endif
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_common/src/ps7/cpu_bsp.c b/src/ucos_v1_42/ucos/components/ucos_common/src/ps7/cpu_bsp.c
new file mode 100644
index 0000000..a5fb5f0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_common/src/ps7/cpu_bsp.c
@@ -0,0 +1,352 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               CPU BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                           Cortex A9 MPCore
+*
+* Filename      : cpu_bsp.c
+* Version       : V1.29.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    CPU_BSP_MODULE
+
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  ARM_GTMR_REG_GTCRL   (*((CPU_REG32 *)(XPAR_PS7_SCUC_0_BASEADDR + 0x0200))) /* Global timer counter register (Low). */
+#define  ARM_GTMR_REG_GTCRH   (*((CPU_REG32 *)(XPAR_PS7_SCUC_0_BASEADDR + 0x0204))) /* Global timer counter register (High).*/
+#define  ARM_GTMR_REG_GTCR    (*((CPU_REG32 *)(XPAR_PS7_SCUC_0_BASEADDR + 0x0208))) /* Global timer control register.       */
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CPU_TS_TmrInit()
+*
+* Description : Initialize & start CPU timestamp timer.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_TS_Init().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrInit() is an application/BSP function that MUST be defined by the developer
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR'
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR'
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                   (c) When applicable, timer period SHOULD be less than the typical measured time
+*                       but MUST be less than the maximum measured time; otherwise, timer resolution
+*                       inadequate to measure desired times.
+*
+*                   See also 'CPU_TS_TmrRd()  Note #2'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+void  CPU_TS_TmrInit (void)
+{
+    ARM_GTMR_REG_GTCR = 0x01u;                                  /* Enable the global timer at maximum speed.            */
+
+    CPU_TS_TmrFreqSet(XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ / 2);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_TS_TmrRd()
+*
+* Description : Get current CPU timestamp timer count value.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Timestamp timer count (see Notes #2a & #2b).
+*
+* Caller(s)   : CPU_TS_Init(),
+*               CPU_TS_Get32(),
+*               CPU_TS_Get64(),
+*               CPU_IntDisMeasStart(),
+*               CPU_IntDisMeasStop().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but SHOULD NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrRd() is an application/BSP function that MUST be defined by the developer
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR'
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR'
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                       (1) If timer is a 'down' counter whose values decrease with each time count,
+*                           then the returned timer value MUST be ones-complemented.
+*
+*                   (c) (1) When applicable, the amount of time measured by CPU timestamps is
+*                           calculated by either of the following equations :
+*
+*                           (A) Time measured  =  Number timer counts  *  Timer period
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer period            Timer's period in some units of
+*                                                                   (fractional) seconds
+*                                       Time measured           Amount of time measured, in same
+*                                                                   units of (fractional) seconds
+*                                                                   as the Timer period
+*
+*                                                  Number timer counts
+*                           (B) Time measured  =  ---------------------
+*                                                    Timer frequency
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer frequency         Timer's frequency in some units
+*                                                                   of counts per second
+*                                       Time measured           Amount of time measured, in seconds
+*
+*                       (2) Timer period SHOULD be less than the typical measured time but MUST be less
+*                           than the maximum measured time; otherwise, timer resolution inadequate to
+*                           measure desired times.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+CPU_TS_TMR  CPU_TS_TmrRd (void)
+{
+    CPU_TS_TMR  ts_tmr_cnts;
+    CPU_INT32U  ts_tmr_low;
+    CPU_INT32U  ts_tmr_high_a;
+    CPU_INT32U  ts_tmr_high_b;
+
+    ts_tmr_high_b = ARM_GTMR_REG_GTCRH;
+
+    do {
+        ts_tmr_high_a = ts_tmr_high_b;
+        ts_tmr_low    = ARM_GTMR_REG_GTCRL;
+        ts_tmr_high_b = ARM_GTMR_REG_GTCRH;
+    } while (ts_tmr_high_a != ts_tmr_high_b);
+
+    ts_tmr_cnts  = ts_tmr_high_a;
+    ts_tmr_cnts  = ts_tmr_cnts << 32u;
+    ts_tmr_cnts += ts_tmr_low;
+
+    return (ts_tmr_cnts);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_TSxx_to_uSec()
+*
+* Description : Convert a 32-/64-bit CPU timestamp from timer counts to microseconds.
+*
+* Argument(s) : ts_cnts   CPU timestamp (in timestamp timer counts [see Note #2aA]).
+*
+* Return(s)   : Converted CPU timestamp (in microseconds           [see Note #2aD]).
+*
+* Caller(s)   : Application.
+*
+*               This function is an (optional) CPU module application programming interface (API)
+*               function which MAY be implemented by application/BSP function(s) [see Note #1] &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS32_to_uSec()/CPU_TS64_to_uSec() are application/BSP functions that MAY be
+*                   optionally defined by the developer when either of the following CPU features is
+*                   enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) The amount of time measured by CPU timestamps is calculated by either of
+*                       the following equations :
+*
+*                                                                        10^6 microseconds
+*                       (1) Time measured  =   Number timer counts   *  -------------------  *  Timer period
+*                                                                            1 second
+*
+*                                              Number timer counts       10^6 microseconds
+*                       (2) Time measured  =  ---------------------  *  -------------------
+*                                                Timer frequency             1 second
+*
+*                               where
+*
+*                                   (A) Number timer counts     Number of timer counts measured
+*                                   (B) Timer frequency         Timer's frequency in some units
+*                                                                   of counts per second
+*                                   (C) Timer period            Timer's period in some units of
+*                                                                   (fractional)  seconds
+*                                   (D) Time measured           Amount of time measured,
+*                                                                   in microseconds
+*
+*                   (b) Timer period SHOULD be less than the typical measured time but MUST be less
+*                       than the maximum measured time; otherwise, timer resolution inadequate to
+*                       measure desired times.
+*
+*                   (c) Specific implementations may convert any number of CPU_TS32 or CPU_TS64 bits
+*                       -- up to 32 or 64, respectively -- into microseconds.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_32_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS32_to_uSec (CPU_TS32  ts_cnts)
+{
+    CPU_INT32U  res;
+
+    res = (CPU_INT32U)(ts_cnts / (XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ / 2));
+
+
+    return (res);
+}
+#endif
+
+
+#if (CPU_CFG_TS_64_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS64_to_uSec (CPU_TS64  ts_cnts)
+{
+    CPU_INT64U  res;
+
+    res = ts_cnts / (XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ / 2);
+
+
+    return (res);
+}
+#endif
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_common/src/psua53/cpu_bsp.c b/src/ucos_v1_42/ucos/components/ucos_common/src/psua53/cpu_bsp.c
new file mode 100644
index 0000000..09f544a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_common/src/psua53/cpu_bsp.c
@@ -0,0 +1,336 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               CPU BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                          Cortex A53 MPCore
+*
+* Filename      : cpu_bsp.c
+* Version       : V1.29.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    CPU_BSP_MODULE
+
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+/* TODO - Derive this from hardware configuration. */
+#define  CPU_CLK_TMR_FREQ 600000000UL
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CPU_TS_TmrInit()
+*
+* Description : Initialize & start CPU timestamp timer.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_TS_Init().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrInit() is an application/BSP function that MUST be defined by the developer
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR'
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR'
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                   (c) When applicable, timer period SHOULD be less than the typical measured time
+*                       but MUST be less than the maximum measured time; otherwise, timer resolution
+*                       inadequate to measure desired times.
+*
+*                   See also 'CPU_TS_TmrRd()  Note #2'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+void  CPU_TS_TmrInit (void)
+{
+    CPU_TS_TmrFreqSet(CPU_CLK_TMR_FREQ);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_TS_TmrRd()
+*
+* Description : Get current CPU timestamp timer count value.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Timestamp timer count (see Notes #2a & #2b).
+*
+* Caller(s)   : CPU_TS_Init(),
+*               CPU_TS_Get32(),
+*               CPU_TS_Get64(),
+*               CPU_IntDisMeasStart(),
+*               CPU_IntDisMeasStop().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but SHOULD NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrRd() is an application/BSP function that MUST be defined by the developer
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR'
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR'
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                       (1) If timer is a 'down' counter whose values decrease with each time count,
+*                           then the returned timer value MUST be ones-complemented.
+*
+*                   (c) (1) When applicable, the amount of time measured by CPU timestamps is
+*                           calculated by either of the following equations :
+*
+*                           (A) Time measured  =  Number timer counts  *  Timer period
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer period            Timer's period in some units of
+*                                                                   (fractional) seconds
+*                                       Time measured           Amount of time measured, in same
+*                                                                   units of (fractional) seconds
+*                                                                   as the Timer period
+*
+*                                                  Number timer counts
+*                           (B) Time measured  =  ---------------------
+*                                                    Timer frequency
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer frequency         Timer's frequency in some units
+*                                                                   of counts per second
+*                                       Time measured           Amount of time measured, in seconds
+*
+*                       (2) Timer period SHOULD be less than the typical measured time but MUST be less
+*                           than the maximum measured time; otherwise, timer resolution inadequate to
+*                           measure desired times.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+CPU_TS_TMR  CPU_TS_TmrRd (void)
+{
+    CPU_TS_TMR  ts_tmr_cnts;
+
+    CPU_CP_GET(ts_tmr_cnts, CNTPCT_EL0);
+
+    return (ts_tmr_cnts);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_TSxx_to_uSec()
+*
+* Description : Convert a 32-/64-bit CPU timestamp from timer counts to microseconds.
+*
+* Argument(s) : ts_cnts   CPU timestamp (in timestamp timer counts [see Note #2aA]).
+*
+* Return(s)   : Converted CPU timestamp (in microseconds           [see Note #2aD]).
+*
+* Caller(s)   : Application.
+*
+*               This function is an (optional) CPU module application programming interface (API)
+*               function which MAY be implemented by application/BSP function(s) [see Note #1] &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS32_to_uSec()/CPU_TS64_to_uSec() are application/BSP functions that MAY be
+*                   optionally defined by the developer when either of the following CPU features is
+*                   enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) The amount of time measured by CPU timestamps is calculated by either of
+*                       the following equations :
+*
+*                                                                        10^6 microseconds
+*                       (1) Time measured  =   Number timer counts   *  -------------------  *  Timer period
+*                                                                            1 second
+*
+*                                              Number timer counts       10^6 microseconds
+*                       (2) Time measured  =  ---------------------  *  -------------------
+*                                                Timer frequency             1 second
+*
+*                               where
+*
+*                                   (A) Number timer counts     Number of timer counts measured
+*                                   (B) Timer frequency         Timer's frequency in some units
+*                                                                   of counts per second
+*                                   (C) Timer period            Timer's period in some units of
+*                                                                   (fractional)  seconds
+*                                   (D) Time measured           Amount of time measured,
+*                                                                   in microseconds
+*
+*                   (b) Timer period SHOULD be less than the typical measured time but MUST be less
+*                       than the maximum measured time; otherwise, timer resolution inadequate to
+*                       measure desired times.
+*
+*                   (c) Specific implementations may convert any number of CPU_TS32 or CPU_TS64 bits
+*                       -- up to 32 or 64, respectively -- into microseconds.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_32_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS32_to_uSec (CPU_TS32  ts_cnts)
+{
+    CPU_INT32U  res;
+
+
+    res = (CPU_INT32U)(ts_cnts / (CPU_CLK_TMR_FREQ / 2));
+
+    return (res);
+}
+#endif
+
+
+#if (CPU_CFG_TS_64_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS64_to_uSec (CPU_TS64  ts_cnts)
+{
+    CPU_INT64U  res;
+
+
+    res = ts_cnts / (CPU_CLK_TMR_FREQ / 2);
+
+    return (res);
+}
+#endif
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_common/src/psur5/cpu_bsp.c b/src/ucos_v1_42/ucos/components/ucos_common/src/psur5/cpu_bsp.c
new file mode 100644
index 0000000..83e66e4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_common/src/psur5/cpu_bsp.c
@@ -0,0 +1,322 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               CPU BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                           Cortex A9 MPCore
+*
+* Filename      : cpu_bsp.c
+* Version       : V1.29.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    CPU_BSP_MODULE
+
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CPU_TS_TmrInit()
+*
+* Description : Initialize & start CPU timestamp timer.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_TS_Init().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrInit() is an application/BSP function that MUST be defined by the developer
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR'
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR'
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                   (c) When applicable, timer period SHOULD be less than the typical measured time
+*                       but MUST be less than the maximum measured time; otherwise, timer resolution
+*                       inadequate to measure desired times.
+*
+*                   See also 'CPU_TS_TmrRd()  Note #2'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+void  CPU_TS_TmrInit (void)
+{
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_TS_TmrRd()
+*
+* Description : Get current CPU timestamp timer count value.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Timestamp timer count (see Notes #2a & #2b).
+*
+* Caller(s)   : CPU_TS_Init(),
+*               CPU_TS_Get32(),
+*               CPU_TS_Get64(),
+*               CPU_IntDisMeasStart(),
+*               CPU_IntDisMeasStop().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but SHOULD NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrRd() is an application/BSP function that MUST be defined by the developer
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR'
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR'
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                       (1) If timer is a 'down' counter whose values decrease with each time count,
+*                           then the returned timer value MUST be ones-complemented.
+*
+*                   (c) (1) When applicable, the amount of time measured by CPU timestamps is
+*                           calculated by either of the following equations :
+*
+*                           (A) Time measured  =  Number timer counts  *  Timer period
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer period            Timer's period in some units of
+*                                                                   (fractional) seconds
+*                                       Time measured           Amount of time measured, in same
+*                                                                   units of (fractional) seconds
+*                                                                   as the Timer period
+*
+*                                                  Number timer counts
+*                           (B) Time measured  =  ---------------------
+*                                                    Timer frequency
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer frequency         Timer's frequency in some units
+*                                                                   of counts per second
+*                                       Time measured           Amount of time measured, in seconds
+*
+*                       (2) Timer period SHOULD be less than the typical measured time but MUST be less
+*                           than the maximum measured time; otherwise, timer resolution inadequate to
+*                           measure desired times.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+CPU_TS_TMR  CPU_TS_TmrRd (void)
+{
+
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_TSxx_to_uSec()
+*
+* Description : Convert a 32-/64-bit CPU timestamp from timer counts to microseconds.
+*
+* Argument(s) : ts_cnts   CPU timestamp (in timestamp timer counts [see Note #2aA]).
+*
+* Return(s)   : Converted CPU timestamp (in microseconds           [see Note #2aD]).
+*
+* Caller(s)   : Application.
+*
+*               This function is an (optional) CPU module application programming interface (API)
+*               function which MAY be implemented by application/BSP function(s) [see Note #1] &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS32_to_uSec()/CPU_TS64_to_uSec() are application/BSP functions that MAY be
+*                   optionally defined by the developer when either of the following CPU features is
+*                   enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) The amount of time measured by CPU timestamps is calculated by either of
+*                       the following equations :
+*
+*                                                                        10^6 microseconds
+*                       (1) Time measured  =   Number timer counts   *  -------------------  *  Timer period
+*                                                                            1 second
+*
+*                                              Number timer counts       10^6 microseconds
+*                       (2) Time measured  =  ---------------------  *  -------------------
+*                                                Timer frequency             1 second
+*
+*                               where
+*
+*                                   (A) Number timer counts     Number of timer counts measured
+*                                   (B) Timer frequency         Timer's frequency in some units
+*                                                                   of counts per second
+*                                   (C) Timer period            Timer's period in some units of
+*                                                                   (fractional)  seconds
+*                                   (D) Time measured           Amount of time measured,
+*                                                                   in microseconds
+*
+*                   (b) Timer period SHOULD be less than the typical measured time but MUST be less
+*                       than the maximum measured time; otherwise, timer resolution inadequate to
+*                       measure desired times.
+*
+*                   (c) Specific implementations may convert any number of CPU_TS32 or CPU_TS64 bits
+*                       -- up to 32 or 64, respectively -- into microseconds.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_32_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS32_to_uSec (CPU_TS32  ts_cnts)
+{
+
+    return (0);
+}
+#endif
+
+
+#if (CPU_CFG_TS_64_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS64_to_uSec (CPU_TS64  ts_cnts)
+{
+
+
+    return (0);
+}
+#endif
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_common/src/stm32f7/cpu_bsp.c b/src/ucos_v1_42/ucos/components/ucos_common/src/stm32f7/cpu_bsp.c
new file mode 100644
index 0000000..b1e759e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_common/src/stm32f7/cpu_bsp.c
@@ -0,0 +1,366 @@
+/*
+*********************************************************************************************************
+*                                                uC/CPU
+*                                    CPU CONFIGURATION & PORT LAYER
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CPU is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                               CPU BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*
+*                                              TEMPLATE
+*
+* Filename      : cpu_bsp.c
+* Version       : V1.30.02
+* Programmer(s) : ITJ
+*                 JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    CPU_BSP_MODULE
+
+#include  "bsp_clock.h"
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  CPU_BSP_REG_DEMCR             (*(CPU_REG32 *)(0xE000EDFCu))
+#define  CPU_BSP_REG_DWT_CR            (*(CPU_REG32 *)(0xE0001000u))
+#define  CPU_BSP_REG_DWT_CYCCNT        (*(CPU_REG32 *)(0xE0001004u))
+#define  CPU_BSP_REG_DWT_LAR           (*(CPU_REG32 *)(0xE0001FB0u))
+#define  CPU_BSP_REG_DWT_LSR           (*(CPU_REG32 *)(0xE0001FB4u))
+
+#define  CPU_BSP_BIT_DWT_LSR_SLK        DEF_BIT_01
+#define  CPU_BSP_BIT_DWT_LSR_SLI        DEF_BIT_00
+
+#define  CPU_BSP_DWT_LAR_KEY            0xC5ACCE55u
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          CPU_TS_TmrInit()
+*
+* Description : Initialize & start CPU timestamp timer.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU_TS_Init().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but MUST NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrInit() is an application/BSP function that MUST be defined by the developer
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR'
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR'
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                   (c) When applicable, timer period SHOULD be less than the typical measured time
+*                       but MUST be less than the maximum measured time; otherwise, timer resolution
+*                       inadequate to measure desired times.
+*
+*                   See also 'CPU_TS_TmrRd()  Note #2'.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+void  CPU_TS_TmrInit (void)
+{
+    CPU_INT32U  fclk_freq;
+    CPU_INT32U  reg_val;
+
+                                                                /* ---- DWT WRITE ACCESS UNLOCK (CORTEX-M7 ONLY!!) ---- */
+    reg_val = CPU_BSP_REG_DWT_LSR;                              /* Read lock status register.                           */
+    if ((reg_val & CPU_BSP_BIT_DWT_LSR_SLI) != 0) {             /* Check if Software lock control mecanism exits        */
+        if ((reg_val & CPU_BSP_BIT_DWT_LSR_SLK) != 0) {         /* Check if DWT access needs to be unlocked             */
+            CPU_BSP_REG_DWT_LAR = CPU_BSP_DWT_LAR_KEY;          /* Unlock DWT write access.                             */
+        }
+    }
+
+    fclk_freq = BSP_ClkFreqGet(BSP_CLK_ID_HCLK);
+
+    CPU_BSP_REG_DEMCR      |= DEF_BIT_24;                       /* Set DEM_CR_TRCENA                                    */
+    CPU_BSP_REG_DWT_CYCCNT  = 0u;
+    CPU_BSP_REG_DWT_CR     |= DEF_BIT_00;                       /* Set DWT_CR_CYCCNTENA                                 */
+
+    CPU_TS_TmrFreqSet((CPU_TS_TMR_FREQ)fclk_freq);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                           CPU_TS_TmrRd()
+*
+* Description : Get current CPU timestamp timer count value.
+*
+* Argument(s) : none.
+*
+* Return(s)   : Timestamp timer count (see Notes #2a & #2b).
+*
+* Caller(s)   : CPU_TS_Init(),
+*               CPU_TS_Get32(),
+*               CPU_TS_Get64(),
+*               CPU_IntDisMeasStart(),
+*               CPU_IntDisMeasStop().
+*
+*               This function is an INTERNAL CPU module function & MUST be implemented by application/
+*               BSP function(s) [see Note #1] but SHOULD NOT be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS_TmrRd() is an application/BSP function that MUST be defined by the developer
+*                   if either of the following CPU features is enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) Timer count values MUST be returned via word-size-configurable 'CPU_TS_TMR'
+*                       data type.
+*
+*                       (1) If timer has more bits, truncate timer values' higher-order bits greater
+*                           than the configured 'CPU_TS_TMR' timestamp timer data type word size.
+*
+*                       (2) Since the timer MUST NOT have less bits than the configured 'CPU_TS_TMR'
+*                           timestamp timer data type word size; 'CPU_CFG_TS_TMR_SIZE' MUST be
+*                           configured so that ALL bits in 'CPU_TS_TMR' data type are significant.
+*
+*                           In other words, if timer size is not a binary-multiple of 8-bit octets
+*                           (e.g. 20-bits or even 24-bits), then the next lower, binary-multiple
+*                           octet word size SHOULD be configured (e.g. to 16-bits).  However, the
+*                           minimum supported word size for CPU timestamp timers is 8-bits.
+*
+*                       See also 'cpu_cfg.h   CPU TIMESTAMP CONFIGURATION  Note #2'
+*                              & 'cpu_core.h  CPU TIMESTAMP DATA TYPES     Note #1'.
+*
+*                   (b) Timer SHOULD be an 'up'  counter whose values increase with each time count.
+*
+*                       (1) If timer is a 'down' counter whose values decrease with each time count,
+*                           then the returned timer value MUST be ones-complemented.
+*
+*                   (c) (1) When applicable, the amount of time measured by CPU timestamps is
+*                           calculated by either of the following equations :
+*
+*                           (A) Time measured  =  Number timer counts  *  Timer period
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer period            Timer's period in some units of
+*                                                                   (fractional) seconds
+*                                       Time measured           Amount of time measured, in same
+*                                                                   units of (fractional) seconds
+*                                                                   as the Timer period
+*
+*                                                  Number timer counts
+*                           (B) Time measured  =  ---------------------
+*                                                    Timer frequency
+*
+*                                   where
+*
+*                                       Number timer counts     Number of timer counts measured
+*                                       Timer frequency         Timer's frequency in some units
+*                                                                   of counts per second
+*                                       Time measured           Amount of time measured, in seconds
+*
+*                       (2) Timer period SHOULD be less than the typical measured time but MUST be less
+*                           than the maximum measured time; otherwise, timer resolution inadequate to
+*                           measure desired times.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_TMR_EN == DEF_ENABLED)
+CPU_TS_TMR  CPU_TS_TmrRd (void)
+{
+    CPU_TS_TMR  ts_tmr_cnts;
+
+
+    ts_tmr_cnts  = (CPU_TS_TMR)CPU_BSP_REG_DWT_CYCCNT;
+
+    return (ts_tmr_cnts);
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         CPU_TSxx_to_uSec()
+*
+* Description : Convert a 32-/64-bit CPU timestamp from timer counts to microseconds.
+*
+* Argument(s) : ts_cnts   CPU timestamp (in timestamp timer counts [see Note #2aA]).
+*
+* Return(s)   : Converted CPU timestamp (in microseconds           [see Note #2aD]).
+*
+* Caller(s)   : Application.
+*
+*               This function is an (optional) CPU module application programming interface (API)
+*               function which MAY be implemented by application/BSP function(s) [see Note #1] &
+*               MAY be called by application function(s).
+*
+* Note(s)     : (1) CPU_TS32_to_uSec()/CPU_TS64_to_uSec() are application/BSP functions that MAY be
+*                   optionally defined by the developer when either of the following CPU features is
+*                   enabled :
+*
+*                   (a) CPU timestamps
+*                   (b) CPU interrupts disabled time measurements
+*
+*                   See 'cpu_cfg.h  CPU TIMESTAMP CONFIGURATION  Note #1'
+*                     & 'cpu_cfg.h  CPU INTERRUPTS DISABLED TIME MEASUREMENT CONFIGURATION  Note #1a'.
+*
+*               (2) (a) The amount of time measured by CPU timestamps is calculated by either of
+*                       the following equations :
+*
+*                                                                        10^6 microseconds
+*                       (1) Time measured  =   Number timer counts   *  -------------------  *  Timer period
+*                                                                            1 second
+*
+*                                              Number timer counts       10^6 microseconds
+*                       (2) Time measured  =  ---------------------  *  -------------------
+*                                                Timer frequency             1 second
+*
+*                               where
+*
+*                                   (A) Number timer counts     Number of timer counts measured
+*                                   (B) Timer frequency         Timer's frequency in some units
+*                                                                   of counts per second
+*                                   (C) Timer period            Timer's period in some units of
+*                                                                   (fractional)  seconds
+*                                   (D) Time measured           Amount of time measured,
+*                                                                   in microseconds
+*
+*                   (b) Timer period SHOULD be less than the typical measured time but MUST be less
+*                       than the maximum measured time; otherwise, timer resolution inadequate to
+*                       measure desired times.
+*
+*                   (c) Specific implementations may convert any number of CPU_TS32 or CPU_TS64 bits
+*                       -- up to 32 or 64, respectively -- into microseconds.
+*********************************************************************************************************
+*/
+
+#if (CPU_CFG_TS_32_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS32_to_uSec (CPU_TS32  ts_cnts)
+{
+    CPU_INT64U  ts_us;
+    CPU_INT64U  fclk_freq;
+
+
+
+    fclk_freq = BSP_ClkFreqGet(BSP_CLK_ID_HCLK);
+    ts_us     = ts_cnts / (fclk_freq / DEF_TIME_NBR_uS_PER_SEC);
+
+    return (ts_us);
+}
+#endif
+
+
+#if (CPU_CFG_TS_64_EN == DEF_ENABLED)
+CPU_INT64U  CPU_TS64_to_uSec (CPU_TS64  ts_cnts)
+{
+    CPU_INT64U  ts_us;
+    CPU_INT64U  fclk_freq;
+
+
+    fclk_freq = BSP_ClkFreqGet(BSP_CLK_ID_HCLK);
+    ts_us     = ts_cnts / (fclk_freq / DEF_TIME_NBR_uS_PER_SEC);
+
+    return (ts_us);
+}
+#endif
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_dhcp-c/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_dhcp-c/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_dhcp-c/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_dns-c/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_dns-c/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_dns-c/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_fs/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_fs/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_fs/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_fs/src/bsp/fs_dev_sd_card_bsp.c b/src/ucos_v1_42/ucos/components/ucos_fs/src/bsp/fs_dev_sd_card_bsp.c
new file mode 100644
index 0000000..a48448a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_fs/src/bsp/fs_dev_sd_card_bsp.c
@@ -0,0 +1,1245 @@
+/*
+*********************************************************************************************************
+*                                             uC/FS V4
+*                                     The Embedded File System
+*
+*                         (c) Copyright 2008-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved. Protected by international copyright laws.
+*
+*               uC/FS is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                      FILE SYSTEM DEVICE DRIVER
+*
+*                                             SD/MMC CARD
+*                                              CARD MODE
+*
+*                                BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*
+*                                          ZYNC-7000 - ZC702
+*
+* Filename      : fs_dev_sd_card_bsp.c
+* Version       : v4.05.03.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    FS_DEV_SD_CARD_BSP_MODULE
+#include  
+#include  
+
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  SD_ROOT_CLK_FREQ  50000000
+
+#define  SD_INTR_ID (56U)
+
+/*
+*********************************************************************************************************
+*                                          REGISTER DEFINES
+*********************************************************************************************************
+*/
+
+typedef  struct  sd_dev  {
+    CPU_REG32  SDHC_DSADDR;                                     /* DMA system address.                                  */
+    CPU_REG32  SDHC_BLKATTR;                                    /* Block attributes.                                    */
+    CPU_REG32  SDHC_CMDARG;                                     /* Command argument.                                    */
+    CPU_REG32  SDHC_XFERTYP;                                    /* Command transfer type.                               */
+    CPU_REG32  SDHC_CMDRSP0;                                    /* Command response 0.                                  */
+    CPU_REG32  SDHC_CMDRSP1;                                    /* Command response 1.                                  */
+    CPU_REG32  SDHC_CMDRSP2;                                    /* Command response 2.                                  */
+    CPU_REG32  SDHC_CMDRSP3;                                    /* Command response 3.                                  */
+    CPU_REG32  SDHC_DATPORT;                                    /* Data buffer access port.                             */
+    CPU_REG32  SDHC_PRSSTAT;                                    /* Present state.                                       */
+    CPU_REG32  SDHC_PROCTL;                                     /* Protocol control.                                    */
+    CPU_REG32  SDHC_SYSCTL;                                     /* System control.                                      */
+    CPU_REG32  SDHC_IRQSTAT;                                    /* Interrupt status.                                    */
+    CPU_REG32  SDHC_IRQSTATEN;                                  /* Interrupt status enable.                             */
+    CPU_REG32  SDHC_IRQSIGEN;                                   /* Interrupt signal enable.                             */
+    CPU_REG32  SDHC_AUTOC12ERR;                                 /* Auto CMD12 status.                                   */
+    CPU_REG32  SDHC_HOSTCAPBLT;                                 /* Host capabilities.                                   */
+    CPU_REG32  SDHC_WML;                                        /* Watermark level.                                     */
+    CPU_REG32  RESERVED1[3];                                    /* Reserved.                                            */
+    CPU_REG32  SDHC_FEVT;                                       /* Forced event.                                        */
+    CPU_REG32  SDHC_ADMAES;                                     /* ADMA error status register.                          */
+    CPU_REG32  SDHC_ADSADDR;                                    /* ADMA system address.                                 */
+    CPU_REG32  RESERVED2[26];                                   /* Reserved.                                            */
+    CPU_REG32  SDHC_VENDOR;                                     /* Vendor specific register.                            */
+    CPU_REG32  SDHC_MMCBOOT;                                    /* MMC boot register.                                   */
+    CPU_REG32  SDHC_HOSTVER;                                    /* Host controller version.                             */
+} SD_DEV;
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER BIT DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ------------------ SYSTEM CONTROL ------------------ */
+#define  ZYNQ_BIT_SDHC_SYSCTL_INITA   (DEF_BIT_27)              /* Initialisation active.                               */
+#define  ZYNQ_BIT_SDHC_SYSCTL_RSTD    (DEF_BIT_26)              /* DAT line software reset.                             */
+#define  ZYNQ_BIT_SDHC_SYSCTL_RSTC    (DEF_BIT_25)              /* CMD line software reset.                             */
+#define  ZYNQ_BIT_SDHC_SYSCTL_RSTA    (DEF_BIT_24)              /* Host controller software reset.                      */
+#define  ZYNQ_BIT_SDHC_SYSCTL_DTOCV_MSK (DEF_BIT_FIELD(4, 16))  /* Data timeout counter value.                          */
+#define  ZYNQ_BIT_SDHC_SYSCTL_DTOCV(cfg) (DEF_BIT_MASK(cfg, 16) & ZYNQ_BIT_SDHC_SYSCTL_DTOCV_MSK)
+#define  ZYNQ_BIT_SDHC_SYSCTL_SDCLKFS_MSK (DEF_BIT_FIELD(8, 8)) /* SDCLK frequency select.                              */
+#define  ZYNQ_BIT_SDHC_SYSCTL_SDCLKFS(cfg) (DEF_BIT_MASK(cfg, 8) & ZYNQ_BIT_SDHC_SYSCTL_SDCLKFS_MSK)
+#define  ZYNQ_BIT_SDHC_SYSCTL_DVS_MSK (DEF_BIT_FIELD(4, 4))     /* SDCLK frequency divisor.                             */
+#define  ZYNQ_BIT_SDHC_SYSCTL_DVS(cfg) (DEF_BIT_MASK(cfg, 4) & ZYNQ_BIT_SDHC_SYSCTL_DVS_MSK)
+#define  ZYNQ_BIT_SDHC_SYSCTL_SDCLKEN (DEF_BIT_03)              /* SD clock enable.                                     */
+#define  ZYNQ_BIT_SDHC_SYSCTL_PEREN   (DEF_BIT_02)              /* Peripheral clock enable.                             */
+#define  ZYNQ_BIT_SDHC_SYSCTL_CLKSTB  (DEF_BIT_01)              /* Clock Stable.                                        */
+#define  ZYNQ_BIT_SDHC_SYSCTL_IPGEN   (DEF_BIT_00)              /* IPGEN enable.                                        */
+
+
+                                                                /* ----------------- BLOCK ATTRIBUTES ----------------- */
+#define  ZYNQ_BIT_SDHC_BLKATTR_BLKCNT_MSK (DEF_BIT_FIELD(16, 16)) /* Block count.                                       */
+#define  ZYNQ_BIT_SDHC_BLKATTR_BLKCNT(cnt) (DEF_BIT_MASK(cnt, 16) & ZYNQ_BIT_SDHC_BLKATTR_BLKCNT_MSK)
+
+#define  ZYNQ_BIT_SDHC_BLKATTR_BUFSZ_MSK (DEF_BIT_FIELD(2, 12))   /* Buffer size.                                       */
+#define  ZYNQ_BIT_SDHC_BLKATTR_BUFSZ(cnt) (DEF_BIT_MASK(cnt, 12) & ZYNQ_BIT_SDHC_BLKATTR_BUFSZ_MSK)
+
+#define  ZYNQ_BIT_SDHC_BLKATTR_BLKSIZE_MSK (DEF_BIT_FIELD(12, 0)) /* Block size.                                        */
+#define  ZYNQ_BIT_SDHC_BLKATTR_BLKSIZE(sz) (DEF_BIT_MASK(sz, 0) & ZYNQ_BIT_SDHC_BLKATTR_BLKSIZE_MSK)
+
+
+                                                                /* -------------- COMMAND TRANSFER TYPE --------------- */
+#define  ZYNQ_BIT_SDHC_XFERTYP_CMDINX_MSK (DEF_BIT_FIELD(6, 24))/* Command index.                                       */
+#define  ZYNQ_BIT_SDHC_XFERTYP_CMDINX(inx) (DEF_BIT_MASK(inx, 24) & ZYNQ_BIT_SDHC_XFERTYP_CMDINX_MSK)
+#define  ZYNQ_BIT_SDHC_XFERTYP_CMDTYP_MSK (DEF_BIT_FIELD(2, 22))/* Command type.                                        */
+#define  ZYNQ_BIT_SDHC_XFERTYP_CMDTYP(typ) (DEF_BIT_MASK(typ, 22) & ZYNQ_BIT_SDHC_XFERTYP_CMDTYP_MSK)
+#define  ZYNQ_BIT_SDHC_XFERTYP_DPSEL  (DEF_BIT_21)              /* Data present select.                                 */
+#define  ZYNQ_BIT_SDHC_XFERTYP_CICEN  (DEF_BIT_20)              /* Command index check enable.                          */
+#define  ZYNQ_BIT_SDHC_XFERTYP_CCCEN  (DEF_BIT_19)              /* Command CRC check enable.                            */
+#define  ZYNQ_BIT_SDHC_XFERTYP_RSPTYP_MSK (DEF_BIT_FIELD(2, 16))/* Response type.                                       */
+#define  ZYNQ_BIT_SDHC_XFERTYP_RSPTYP(typ) (DEF_BIT_MASK(typ, 16) & ZYNQ_BIT_SDHC_XFERTYP_RSPTYP_MSK)
+#define  ZYNQ_BIT_SDHC_XFERTYP_MSBSEL (DEF_BIT_05)              /* Multi / Single block select.                         */
+#define  ZYNQ_BIT_SDHC_XFERTYP_DTDSEL (DEF_BIT_04)              /* Data transfer direction select.                      */
+#define  ZYNQ_BIT_SDHC_XFERTYP_AC12EN (DEF_BIT_02)              /* Auto CMD12 enable.                                   */
+#define  ZYNQ_BIT_SDHC_XFERTYP_BCEN   (DEF_BIT_01)              /* Block count enable.                                  */
+#define  ZYNQ_BIT_SDHC_XFERTYP_DMAEN  (DEF_BIT_00)              /* DMA enable.                                          */
+
+#define  ZYNQ_BIT_SDHC_CMDTYP_ABORT    (3u)
+#define  ZYNQ_BIT_SDHC_CMDTYP_RESUME   (2u)
+#define  ZYNQ_BIT_SDHC_CMDTYP_SUSPEND  (1u)
+#define  ZYNQ_BIT_SDHC_CMDTYP_NORMAL   (0u)
+
+#define  ZYNQ_BIT_SDHC_RSPTYP_48B     (3u)
+#define  ZYNQ_BIT_SDHC_RSPTYP_48      (2u)
+#define  ZYNQ_BIT_SDHC_RSPTYP_136     (1u)
+#define  ZYNQ_BIT_SDHC_RSPTYP_NONE    (0u)
+
+
+                                                                /* ------------------ PRESENT STATE ------------------- */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_DLSL_MSK (DEF_BIT_FIELD(8, 24))  /* DAT line signal level.                               */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_DLSL(dat) (DEF_BIT_MASK(dat, 24) & ZYNQ_BIT_SDHC_PRSSTAT_DLSL_MSK)
+#define  ZYNQ_BIT_SDHC_PRSSTAT_CLSL   (DEF_BIT_23)              /* CMD signal level.                                    */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_WPSPL  (DEF_BIT_19)              /* Write protect switch pin level.                      */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_CDPL   (DEF_BIT_18)              /* Card detect pin level.                               */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_CINS   (DEF_BIT_16)              /* Card inserted.                                       */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_BREN   (DEF_BIT_11)              /* Buffer read enable.                                  */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_BWEN   (DEF_BIT_10)              /* Buffer write enable.                                 */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_RTA    (DEF_BIT_09)              /* Read transfer active.                                */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_WTA    (DEF_BIT_08)              /* Write transfer active.                               */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_SDOFF  (DEF_BIT_07)              /* SD clock gated off internally.                       */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_PEROFF (DEF_BIT_06)              /* Peripheral clock gated internally.                   */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_HCLK   (DEF_BIT_05)              /* HCLK gated internally.                               */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_IPGOFF (DEF_BIT_04)              /* IPG clock gated internally.                          */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_SDSTB  (DEF_BIT_03)              /* SD clock enable.                                     */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_DLA    (DEF_BIT_02)              /* Data line active.                                    */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_CDIHB  (DEF_BIT_01)              /* Command inhibit(DAT).                                */
+#define  ZYNQ_BIT_SDHC_PRSSTAT_CIHB   (DEF_BIT_00)              /* Command inhibit(CMD).                                */
+
+
+                                                                /* -------------------- IRQ STATUS -------------------- */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_DMAE   (DEF_BIT_28)              /* DMA error.                                           */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_AC12E  (DEF_BIT_24)              /* Auto CMD12 error.                                    */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_DEBE   (DEF_BIT_22)              /* Data end bit error.                                  */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_DCE    (DEF_BIT_21)              /* Data CRC error.                                      */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_DTOE   (DEF_BIT_20)              /* Data timeout error.                                  */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_CIE    (DEF_BIT_19)              /* Command index error.                                 */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_CEBE   (DEF_BIT_18)              /* Command end bit error.                               */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_CCE    (DEF_BIT_17)              /* Command CRC error.                                   */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_CTOE   (DEF_BIT_16)              /* Command timeout error.                               */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_EI     (DEF_BIT_15)              /* Error interrupt.                                     */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_CINT   (DEF_BIT_08)              /* Card interrupt.                                      */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_CRM    (DEF_BIT_07)              /* Card removal.                                        */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_CINS   (DEF_BIT_06)              /* Card insertion.                                      */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_BRR    (DEF_BIT_05)              /* Buffer read ready.                                   */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_BWR    (DEF_BIT_04)              /* Buffer write ready.                                  */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_DINT   (DEF_BIT_03)              /* DMA interrupt.                                       */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_BGE    (DEF_BIT_02)              /* Block gap event.                                     */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_TC     (DEF_BIT_01)              /* Transfer complete.                                   */
+#define  ZYNQ_BIT_SDHC_IRQSTAT_CC     (DEF_BIT_00)              /* Command complete.                                    */
+
+
+                                                                /* -------------------- IRQ STATUS -------------------- */
+#define  ZYNQ_BIT_SDHC_PROCTL_WECRM   (DEF_BIT_26)              /* Wakeup event on sd card removal.                     */
+#define  ZYNQ_BIT_SDHC_PROCTL_WECINS  (DEF_BIT_25)              /* Wakeup event on sd card insertion.                   */
+#define  ZYNQ_BIT_SDHC_PROCTL_WECINT  (DEF_BIT_24)              /* Wakeup event on sd card interrupt.                   */
+#define  ZYNQ_BIT_SDHC_PROCTL_IABG    (DEF_BIT_19)              /* Interrupt at block gap.                              */
+#define  ZYNQ_BIT_SDHC_PROCTL_RWCTL   (DEF_BIT_18)              /* Read wait control.                                   */
+#define  ZYNQ_BIT_SDHC_PROCTL_CREQ    (DEF_BIT_17)              /* Continue request.                                    */
+#define  ZYNQ_BIT_SDHC_PROCTL_SABGREQ (DEF_BIT_16)              /* Stop at block gap request.                           */
+#define  ZYNQ_BIT_SDHC_PROCTL_DMAS_MSK (DEF_BIT_FIELD(2, 8))    /* DMA select.                                          */
+#define  ZYNQ_BIT_SDHC_PROCTL_DMAS(typ) (DEF_BIT_MASK(typ, 8) & ZYNQ_BIT_SDHC_PROCTL_DMAS_MSK)
+#define  ZYNQ_BIT_SDHC_PROCTL_CDRSS   (DEF_BIT_07)              /* Card detect signal detection.                        */
+#define  ZYNQ_BIT_SDHC_PROCTL_CDTL    (DEF_BIT_06)              /* Card detect test level.                              */
+#define  ZYNQ_BIT_SDHC_PROCTL_EMODE_MSK (DEF_BIT_FIELD(2, 4))   /* DMA select.                                          */
+#define  ZYNQ_BIT_SDHC_PROCTL_EMODE(typ) (DEF_BIT_MASK(typ, 4) & ZYNQ_BIT_SDHC_PROCTL_EMODE_MSK)
+#define  ZYNQ_BIT_SDHC_PROCTL_D3CD    (DEF_BIT_03)              /* DAT3 as card selection pin.                          */
+#define  ZYNQ_BIT_SDHC_PROCTL_HSE     (DEF_BIT_02)              /* High speed enable.                                   */
+#define  ZYNQ_BIT_SDHC_PROCTL_DTW     (DEF_BIT_01)              /* Transfer width.                                      */
+#define  ZYNQ_BIT_SDHC_PROCTL_LED     (DEF_BIT_00)              /* LED control.                                         */
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+SD_DEV  *esdhc = (SD_DEV *)0xE0100000u;
+
+FS_OS_SEM  FSDev_SD_Sem;
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_ISR_Handler (CPU_INT32U  source, void *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                    FILE SYSTEM SD CARD FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      FSDev_SD_Card_BSP_Open()
+*
+* Description : Open (initialize) SD/MMC card interface.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+* Return(s)   : DEF_OK,   if interface was opened.
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : FSDev_SD_Card_Refresh().
+*
+* Note(s)     : (1) This function will be called EVERY time the device is opened.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  FSDev_SD_Card_BSP_Open (FS_QTY  unit_nbr)
+{
+#if 0
+                                                                /* Pin config.                                          */
+    ZYNQ_SLCR_REG->SLCR_UNLOCK = ZYNQ_SLCR_UNLOCK_KEY;
+    CPU_MB();
+    ZYNQ_SLCR_REG->MIO_PIN_40 = ZYNQ_BIT_MIO_PULL_UP     |
+                                ZYNQ_BIT_MIO_IO_TYPE(1u) |
+                                ZYNQ_BIT_MIO_L3_SEL(4u);
+
+    ZYNQ_SLCR_REG->MIO_PIN_41 = ZYNQ_BIT_MIO_PULL_UP     |
+                                ZYNQ_BIT_MIO_IO_TYPE(1u) |
+                                ZYNQ_BIT_MIO_L3_SEL(4u);
+
+    ZYNQ_SLCR_REG->MIO_PIN_42 = ZYNQ_BIT_MIO_PULL_UP     |
+                                ZYNQ_BIT_MIO_IO_TYPE(1u) |
+                                ZYNQ_BIT_MIO_L3_SEL(4u);
+
+    ZYNQ_SLCR_REG->MIO_PIN_43 = ZYNQ_BIT_MIO_PULL_UP     |
+                                ZYNQ_BIT_MIO_IO_TYPE(1u) |
+                                ZYNQ_BIT_MIO_L3_SEL(4u);
+
+    ZYNQ_SLCR_REG->MIO_PIN_44 = ZYNQ_BIT_MIO_PULL_UP     |
+                                ZYNQ_BIT_MIO_IO_TYPE(1u) |
+                                ZYNQ_BIT_MIO_L3_SEL(4u);
+
+    ZYNQ_SLCR_REG->MIO_PIN_45 = ZYNQ_BIT_MIO_PULL_UP     |
+                                ZYNQ_BIT_MIO_IO_TYPE(1u) |
+                                ZYNQ_BIT_MIO_L3_SEL(4u);
+    CPU_MB();
+    ZYNQ_SLCR_REG->SLCR_LOCK  = ZYNQ_SLCR_LOCK_KEY;
+#endif
+
+    FS_OS_SemCreate(&FSDev_SD_Sem, 0u);
+
+
+    esdhc->SDHC_SYSCTL = ZYNQ_BIT_SDHC_SYSCTL_RSTA;            /* Ctrl soft reset.                                     */
+
+    CPU_MB();
+
+    FSDev_SD_Card_BSP_SetClkFreq(unit_nbr, 400000u);
+
+    esdhc->SDHC_IRQSTATEN = ZYNQ_BIT_SDHC_IRQSTAT_CC   |
+                            ZYNQ_BIT_SDHC_IRQSTAT_TC   |
+                            ZYNQ_BIT_SDHC_IRQSTAT_EI   |
+                            ZYNQ_BIT_SDHC_IRQSTAT_CTOE |
+                            ZYNQ_BIT_SDHC_IRQSTAT_CCE  |
+                            ZYNQ_BIT_SDHC_IRQSTAT_CEBE |
+                            ZYNQ_BIT_SDHC_IRQSTAT_CIE  |
+                            ZYNQ_BIT_SDHC_IRQSTAT_DTOE |
+                            ZYNQ_BIT_SDHC_IRQSTAT_DCE  |
+                            ZYNQ_BIT_SDHC_IRQSTAT_DEBE |
+                            ZYNQ_BIT_SDHC_IRQSTAT_DINT |
+                            ZYNQ_BIT_SDHC_IRQSTAT_DMAE;
+
+    esdhc->SDHC_SYSCTL |= ZYNQ_BIT_SDHC_SYSCTL_DTOCV(8);
+
+    esdhc->SDHC_PROCTL |= DEF_BIT_06 | DEF_BIT_07;
+
+    esdhc->SDHC_SYSCTL |=   ZYNQ_BIT_SDHC_SYSCTL_PEREN        |
+                            ZYNQ_BIT_SDHC_SYSCTL_IPGEN;
+
+    esdhc->SDHC_PROCTL |= DEF_BIT_08;
+
+
+    UCOS_IntVectSet(SD_INTR_ID,
+                    0u,
+                    DEF_BIT_00,
+                    FSDev_SD_Card_BSP_ISR_Handler,
+                    DEF_NULL);
+
+    UCOS_IntSrcEn(SD_INTR_ID);
+
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      FSDev_SD_Card_BSP_Close()
+*
+* Description : Close (unitialize) SD/MMC card interface.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : FSDev_SD_Card_Close().
+*
+* Note(s)     : (1) This function will be called EVERY time the device is closed.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_Close (FS_QTY  unit_nbr)
+{
+    FS_OS_SemDel(&FSDev_SD_Sem);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      FSDev_SD_Card_BSP_Lock()
+*
+* Description : Acquire SD/MMC card bus lock.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) This function will be called before the SD/MMC driver begins to access the SD/MMC
+*                   card bus.  The application should NOT use the same bus to access another device until
+*                   the matching call to 'FSDev_SD_Card_BSP_Unlock()' has been made.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_Lock (FS_QTY  unit_nbr)
+{
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                     FSDev_SD_Card_BSP_Unlock()
+*
+* Description : Release SD/MMC card bus lock.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) 'FSDev_SD_Card_BSP_Lock()' will be called before the SD/MMC driver begins to access
+*                   the SD/MMC card bus.  The application should NOT use the same bus to access another
+*                   device until the matching call to this function has been made.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_Unlock (FS_QTY  unit_nbr)
+{
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                      FSDev_SD_Card_BSP_CmdStart()
+*
+* Description : Start a command.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+*               p_cmd       Pointer to command to transmit (see Note #2).
+*
+*               p_data      Pointer to buffer address for DMA transfer (see Note #3).
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               FS_DEV_SD_CARD_ERR_NONE       No error.
+*                               FS_DEV_SD_CARD_ERR_NO_CARD    No card present.
+*                               FS_DEV_SD_CARD_ERR_BUSY       Controller is busy.
+*                               FS_DEV_SD_CARD_ERR_UNKNOWN    Unknown or other error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) The command start will be followed by zero, one or two additional BSP function calls,
+*                   depending on whether data should be transferred and on whether any errors occur.
+*
+*                   (a) 'FSDev_SD_Card_BSP_CmdStart()' starts execution of the command.  It may also set
+*                       up the DMA transfer (if necessary).
+*
+*                   (b) 'FSDev_SD_Card_BSP_CmdWaitEnd()' waits for the execution of the command to end,
+*                       getting the command response (if any).
+*
+*                   (c) If data should be transferred from the card to the host, 'FSDev_SD_Card_BSP_CmdDataRd()'
+*                       will read that data; if data should be transferred from the host to the card,
+*                       'FSDev_SD_Card_BSP_CmdDataWr()' will write that data.
+*
+*                   (d) If an error is returned at any point, the sequence will be aborted.
+*
+*               (2) The command 'p_cmd' has the following parameters :
+*
+*                   (a) 'p_cmd->Cmd' is the command index.
+*
+*                   (b) 'p_cmd->Arg' is the 32-bit argument (or 0 if there is no argument).
+*
+*                   (c) 'p_cmd->Flags' is a bit-mapped variable with zero or more command flags :
+*
+*                           FS_DEV_SD_CARD_CMD_FLAG_INIT          Initialization sequence before command.
+*                           FS_DEV_SD_CARD_CMD_FLAG_BUSY          Busy signal expected after command.
+*                           FS_DEV_SD_CARD_CMD_FLAG_CRC_VALID     CRC valid after command.
+*                           FS_DEV_SD_CARD_CMD_FLAG_IX_VALID      Index valid after command.
+*                           FS_DEV_SD_CARD_CMD_FLAG_OPEN_DRAIN    Command line is open drain.
+*                           FS_DEV_SD_CARD_CMD_FLAG_DATA_START    Data start command.
+*                           FS_DEV_SD_CARD_CMD_FLAG_DATA_STOP     Data stop command.
+*                           FS_DEV_SD_CARD_CMD_FLAG_RESP          Response expected.
+*                           FS_DEV_SD_CARD_CMD_FLAG_RESP_LONG     Long response expected.
+*
+*                   (d) 'p_cmd->DataDir' indicates the direction of any data transfer that should follow
+*                       this command, if any :
+*
+*                           FS_DEV_SD_CARD_DATA_DIR_NONE            No data transfer.
+*                           FS_DEV_SD_CARD_DATA_DIR_HOST_TO_CARD    Transfer host-to-card (write).
+*                           FS_DEV_SD_CARD_DATA_DIR_CARD_TO_HOST    Transfer card-to-host (read).
+*
+*                   (e) 'p_cmd->DataType' indicates the type of the data transfer that should follow this
+*                       command, if any :
+*
+*                           FS_DEV_SD_CARD_DATA_TYPE_NONE            No data transfer.
+*                           FS_DEV_SD_CARD_DATA_TYPE_SINGLE_BLOCK    Single data block.
+*                           FS_DEV_SD_CARD_DATA_TYPE_MULTI_BLOCK     Multiple data blocks.
+*                           FS_DEV_SD_CARD_DATA_TYPE_STREAM          Stream data.
+*
+*                   (f) 'p_cmd->RespType' indicates the type of the response that should be expected from
+*                       this command :
+*
+*                           FS_DEV_SD_CARD_RESP_TYPE_NONE    No  response.
+*                           FS_DEV_SD_CARD_RESP_TYPE_R1      R1  response: Normal Response Command.
+*                           FS_DEV_SD_CARD_RESP_TYPE_R1B     R1b response.
+*                           FS_DEV_SD_CARD_RESP_TYPE_R2      R2  response: CID, CSD Register.
+*                           FS_DEV_SD_CARD_RESP_TYPE_R3      R3  response: OCR Register.
+*                           FS_DEV_SD_CARD_RESP_TYPE_R4      R4  response: Fast I/O Response (MMC).
+*                           FS_DEV_SD_CARD_RESP_TYPE_R5      R5  response: Interrupt Request Response (MMC).
+*                           FS_DEV_SD_CARD_RESP_TYPE_R5B     R5B response.
+*                           FS_DEV_SD_CARD_RESP_TYPE_R6      R6  response: Published RCA Response.
+*                           FS_DEV_SD_CARD_RESP_TYPE_R7      R7  response: Card Interface Condition.
+*
+*                   (g) 'p_cmd->BlkSize' and 'p_cmd->BlkCnt' are the block size and block count of the
+*                       data transfer that should follow this command, if any.
+*
+*               (3) The pointer to the data buffer that will receive the data transfer that should follow
+*                   this command is given so that a DMA transfer can be set up.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_CmdStart (FS_QTY               unit_nbr,
+                                  FS_DEV_SD_CARD_CMD  *p_cmd,
+                                  void                *p_data,
+                                  FS_DEV_SD_CARD_ERR  *p_err)
+{
+    CPU_INT32U   xfertyp = 0u;
+
+    esdhc->SDHC_IRQSTAT = 0xFFFFFFFF;                            /* Clear all interrupts.                                */
+
+    esdhc->SDHC_IRQSIGEN = ZYNQ_BIT_SDHC_IRQSTAT_CIE  |
+                           ZYNQ_BIT_SDHC_IRQSTAT_CEBE |
+                           ZYNQ_BIT_SDHC_IRQSTAT_CCE  |
+                           ZYNQ_BIT_SDHC_IRQSTAT_CTOE |
+                           ZYNQ_BIT_SDHC_IRQSTAT_CC;
+
+    while(DEF_BIT_IS_SET(esdhc->SDHC_PRSSTAT, ZYNQ_BIT_SDHC_PRSSTAT_CIHB) == DEF_YES ||
+          DEF_BIT_IS_SET(esdhc->SDHC_PRSSTAT, ZYNQ_BIT_SDHC_PRSSTAT_CDIHB) == DEF_YES)
+    {
+        ;
+    }
+
+    while(DEF_BIT_IS_SET(esdhc->SDHC_PRSSTAT, ZYNQ_BIT_SDHC_PRSSTAT_DLA) == DEF_YES)
+    {
+        ;
+    }
+
+    xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_CMDINX(p_cmd->Cmd);
+
+    if (DEF_BIT_IS_SET(p_cmd->Flags, FS_DEV_SD_CARD_CMD_FLAG_CRC_VALID) == DEF_YES) {
+        xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_CCCEN;                 /* Check CRC.                                           */
+    }
+
+    if (DEF_BIT_IS_SET(p_cmd->Flags, FS_DEV_SD_CARD_CMD_FLAG_IX_VALID) == DEF_YES) {
+        xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_CICEN;                 /* Check index.                                         */
+    }
+
+    if (DEF_BIT_IS_SET(p_cmd->Flags, FS_DEV_SD_CARD_CMD_FLAG_RESP_LONG) == DEF_YES) {
+        xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_RSPTYP(ZYNQ_BIT_SDHC_RSPTYP_136);
+    } else if (DEF_BIT_IS_SET(p_cmd->Flags, FS_DEV_SD_CARD_CMD_FLAG_RESP) == DEF_YES) {
+        if (DEF_BIT_IS_SET(p_cmd->Flags, FS_DEV_SD_CARD_CMD_FLAG_BUSY) == DEF_YES) {
+            xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_RSPTYP(ZYNQ_BIT_SDHC_RSPTYP_48B);
+        } else {
+            xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_RSPTYP(ZYNQ_BIT_SDHC_RSPTYP_48);
+        }
+    }
+
+    esdhc->SDHC_CMDARG = p_cmd->Arg;
+
+    if(DEF_BIT_IS_SET(p_cmd->Flags, FS_DEV_SD_CARD_CMD_FLAG_STOP_DATA_TX) == DEF_YES) {
+        xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_CMDTYP(ZYNQ_BIT_SDHC_CMDTYP_ABORT);
+        xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_MSBSEL |
+                   ZYNQ_BIT_SDHC_XFERTYP_BCEN;
+    }
+
+    switch (p_cmd->DataDir) {
+         case FS_DEV_SD_CARD_DATA_DIR_CARD_TO_HOST:
+
+             esdhc->SDHC_DSADDR = (CPU_INT32U)p_data;
+
+             xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_DMAEN;
+             xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_DTDSEL;           /* Card to host.                                        */
+             xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_DPSEL;
+
+             if(p_cmd->BlkCnt > 1u) {                           /* Multi block transfer.                                */
+                 xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_MSBSEL |
+                            ZYNQ_BIT_SDHC_XFERTYP_BCEN;
+             }
+
+             esdhc->SDHC_BLKATTR  = ZYNQ_BIT_SDHC_BLKATTR_BLKCNT(p_cmd->BlkCnt) |
+                                    ZYNQ_BIT_SDHC_BLKATTR_BUFSZ(7u)             |
+                                    ZYNQ_BIT_SDHC_BLKATTR_BLKSIZE(p_cmd->BlkSize);
+
+             CPU_DCACHE_RANGE_FLUSH(p_data, p_cmd->BlkCnt * p_cmd->BlkSize);
+
+             break;
+
+         case FS_DEV_SD_CARD_DATA_DIR_HOST_TO_CARD:
+
+             esdhc->SDHC_DSADDR = (CPU_INT32U)p_data;
+
+             xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_DMAEN;
+             xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_DPSEL;
+
+             if(p_cmd->BlkCnt > 1u) {                           /* Multi block transfer.                                */
+                 xfertyp |= ZYNQ_BIT_SDHC_XFERTYP_MSBSEL |
+                            ZYNQ_BIT_SDHC_XFERTYP_BCEN;
+             }
+
+             esdhc->SDHC_BLKATTR  = ZYNQ_BIT_SDHC_BLKATTR_BLKCNT(p_cmd->BlkCnt) |
+                                    ZYNQ_BIT_SDHC_BLKATTR_BUFSZ(7u)             |
+                                    ZYNQ_BIT_SDHC_BLKATTR_BLKSIZE(p_cmd->BlkSize);
+
+             CPU_DCACHE_RANGE_FLUSH(p_data, p_cmd->BlkCnt * p_cmd->BlkSize);
+
+             break;
+
+        case FS_DEV_SD_CARD_DATA_DIR_NONE:
+
+             esdhc->SDHC_DSADDR  = 0u;
+             esdhc->SDHC_BLKATTR = 0u;
+
+             break;
+
+        default:
+
+            break;
+    }
+
+#if 1
+    esdhc->SDHC_SYSCTL |=   ZYNQ_BIT_SDHC_SYSCTL_PEREN        |
+                            ZYNQ_BIT_SDHC_SYSCTL_IPGEN;
+
+    esdhc->SDHC_PROCTL |= DEF_BIT_08;
+#endif
+    esdhc->SDHC_XFERTYP = xfertyp;
+
+
+    esdhc->SDHC_PROCTL |= DEF_BIT_06 | DEF_BIT_07;
+
+    *p_err = FS_DEV_SD_CARD_ERR_NONE;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   FSDev_SD_Card_BSP_CmdWaitEnd()
+*
+* Description : Wait for command to end & get command response.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+*               p_cmd       Pointer to command that is ending.
+*
+*               p_resp      Pointer to buffer that will receive command response, if any.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               FS_DEV_SD_CARD_ERR_NONE            No error.
+*                               FS_DEV_SD_CARD_ERR_NO_CARD         No card present.
+*                               FS_DEV_SD_CARD_ERR_UNKNOWN         Unknown or other error.
+*                               FS_DEV_SD_CARD_ERR_WAIT_TIMEOUT    Timeout in waiting for command response.
+*                               FS_DEV_SD_CARD_ERR_RESP_TIMEOUT    Timeout in receiving command response.
+*                               FS_DEV_SD_CARD_ERR_RESP_CHKSUM     Error in response checksum.
+*                               FS_DEV_SD_CARD_ERR_RESP_CMD_IX     Response command index error.
+*                               FS_DEV_SD_CARD_ERR_RESP_END_BIT    Response end bit error.
+*                               FS_DEV_SD_CARD_ERR_RESP            Other response error.
+*                               FS_DEV_SD_CARD_ERR_DATA            Other data err.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : various.
+*
+* Note(s)     : (1) This function will be called even if no response is expected from the command.
+*
+*               (2) This function will NOT be called if 'FSDev_SD_Card_BSP_CmdStart()' returned an error.
+*
+*               (3) (a) For a command with a normal response, a  4-byte response should be stored in
+*                       'p_resp'.
+*
+*                   (b) For a command with a long   response, a 16-byte response should be stored in
+*                       'p_resp'.  The first  4-byte word should hold bits 127..96 of the response.
+*                                  The second 4-byte word should hold bits  95..64 of the response.
+*                                  The third  4-byte word should hold bits  63..32 of the response.
+*                                  The fourth 4-byte word should hold bits  31.. 0 of the reponse.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_CmdWaitEnd (FS_QTY               unit_nbr,
+                                    FS_DEV_SD_CARD_CMD  *p_cmd,
+                                    CPU_INT32U          *p_resp,
+                                    FS_DEV_SD_CARD_ERR  *p_err)
+{
+    CPU_INT32U  resp[4];
+    CPU_INT32U  irqstat;
+
+    FS_OS_SemPend(&FSDev_SD_Sem, 0u);
+
+    irqstat = esdhc->SDHC_IRQSTAT;
+    if(irqstat & ZYNQ_BIT_SDHC_IRQSTAT_EI) {
+        if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_CTOE)) {
+           *p_err = FS_DEV_SD_CARD_ERR_WAIT_TIMEOUT;
+        } else if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DMAE)) {
+            *p_err = FS_DEV_SD_CARD_ERR_DATA;
+        } else if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DCE)) {
+            *p_err = FS_DEV_SD_CARD_ERR_DATA_CHKSUM;
+        } else if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DTOE)) {
+            *p_err = FS_DEV_SD_CARD_ERR_WAIT_TIMEOUT;
+        } else {
+            *p_err = FS_DEV_SD_CARD_ERR_UNKNOWN;
+        }
+    } else {
+        *p_err = FS_DEV_SD_CARD_ERR_NONE;
+    }
+
+    if (DEF_BIT_IS_SET(p_cmd->Flags, FS_DEV_SD_CARD_CMD_FLAG_BUSY) == DEF_YES) {
+        *p_err = FS_DEV_SD_CARD_ERR_NONE;
+    }
+
+    if (DEF_BIT_IS_SET(p_cmd->Flags, FS_DEV_SD_CARD_CMD_FLAG_RESP_LONG) == DEF_YES) {
+        resp[3] = esdhc->SDHC_CMDRSP3;
+        resp[2] = esdhc->SDHC_CMDRSP2;
+        resp[1] = esdhc->SDHC_CMDRSP1;
+        resp[0] = esdhc->SDHC_CMDRSP0;
+
+       *p_resp = resp[3] << 8 | ((resp[2] >> 24) & 0xFF);
+        p_resp++;
+       *p_resp = resp[2] << 8 | ((resp[1] >> 24) & 0xFF);
+        p_resp++;
+       *p_resp = resp[1] << 8 | ((resp[0] >> 24) & 0xFF);
+        p_resp++;
+       *p_resp = resp[0] << 8;
+    } else if (DEF_BIT_IS_SET(p_cmd->Flags, FS_DEV_SD_CARD_CMD_FLAG_RESP) == DEF_YES) {
+       *p_resp = esdhc->SDHC_CMDRSP0;
+    } else {
+        ;
+    }
+
+
+    if(DEF_BIT_IS_SET_ANY(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_CIE  |
+                                   ZYNQ_BIT_SDHC_IRQSTAT_CEBE |
+                                   ZYNQ_BIT_SDHC_IRQSTAT_CCE  |
+                                   ZYNQ_BIT_SDHC_IRQSTAT_CTOE)) {
+        esdhc->SDHC_SYSCTL |= ZYNQ_BIT_SDHC_SYSCTL_RSTC;
+        while(DEF_BIT_IS_SET(esdhc->SDHC_SYSCTL, ZYNQ_BIT_SDHC_SYSCTL_RSTC)) {
+            ;
+        }
+
+        esdhc->SDHC_IRQSTAT = ZYNQ_BIT_SDHC_IRQSTAT_CIE  |
+                              ZYNQ_BIT_SDHC_IRQSTAT_CEBE |
+                              ZYNQ_BIT_SDHC_IRQSTAT_CCE  |
+                              ZYNQ_BIT_SDHC_IRQSTAT_CTOE;
+    }
+
+    if(DEF_BIT_IS_SET_ANY(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DEBE |
+                                   ZYNQ_BIT_SDHC_IRQSTAT_DCE  |
+                                   ZYNQ_BIT_SDHC_IRQSTAT_DTOE)) {
+        esdhc->SDHC_SYSCTL |= ZYNQ_BIT_SDHC_SYSCTL_RSTD;
+        while(DEF_BIT_IS_SET(esdhc->SDHC_SYSCTL, ZYNQ_BIT_SDHC_SYSCTL_RSTD)) {
+            ;
+        }
+
+        esdhc->SDHC_IRQSTAT = ZYNQ_BIT_SDHC_IRQSTAT_DEBE |
+                              ZYNQ_BIT_SDHC_IRQSTAT_DCE  |
+                              ZYNQ_BIT_SDHC_IRQSTAT_DTOE;
+    }
+
+    if(DEF_BIT_IS_SET(p_cmd->Flags, FS_DEV_SD_CARD_CMD_FLAG_STOP_DATA_TX) == DEF_YES) {
+        esdhc->SDHC_SYSCTL |= ZYNQ_BIT_SDHC_SYSCTL_RSTC;
+        esdhc->SDHC_SYSCTL |= ZYNQ_BIT_SDHC_SYSCTL_RSTD;
+        while(DEF_BIT_IS_SET(esdhc->SDHC_SYSCTL, ZYNQ_BIT_SDHC_SYSCTL_RSTC)) {
+            ;
+        }
+        while(DEF_BIT_IS_SET(esdhc->SDHC_SYSCTL, ZYNQ_BIT_SDHC_SYSCTL_RSTD)) {
+            ;
+        }
+
+       *p_err = FS_DEV_SD_CARD_ERR_WAIT_TIMEOUT;
+    }
+
+    CPU_MB();
+
+    esdhc->SDHC_IRQSTAT = ZYNQ_BIT_SDHC_IRQSTAT_CC;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    FSDev_SD_Card_BSP_CmdDataRd()
+*
+* Description : Read data following command.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+*               p_cmd       Pointer to command that was started.
+*
+*               p_dest      Pointer to destination buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               FS_DEV_SD_CARD_ERR_NONE              No error.
+*                               FS_DEV_SD_CARD_ERR_NO_CARD           No card present.
+*                               FS_DEV_SD_CARD_ERR_UNKNOWN           Unknown or other error.
+*                               FS_DEV_SD_CARD_ERR_WAIT_TIMEOUT      Timeout in waiting for data.
+*                               FS_DEV_SD_CARD_ERR_DATA_OVERRUN      Data overrun.
+*                               FS_DEV_SD_CARD_ERR_DATA_TIMEOUT      Timeout in receiving data.
+*                               FS_DEV_SD_CARD_ERR_DATA_CHKSUM       Error in data checksum.
+*                               FS_DEV_SD_CARD_ERR_DATA_START_BIT    Data start bit error.
+*                               FS_DEV_SD_CARD_ERR_DATA              Other data error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : FSDev_SD_Card_RdData().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_CmdDataRd (FS_QTY               unit_nbr,
+                                   FS_DEV_SD_CARD_CMD  *p_cmd,
+                                   void                *p_dest,
+                                   FS_DEV_SD_CARD_ERR  *p_err)
+{
+    CPU_INT32U  irqstat;
+
+
+    CPU_MB();
+#if 0
+    esdhc->SDHC_SYSCTL |=   ZYNQ_BIT_SDHC_SYSCTL_PEREN |
+                            ZYNQ_BIT_SDHC_SYSCTL_IPGEN;
+
+    esdhc->SDHC_PROCTL |= DEF_BIT_08;
+#endif
+
+    esdhc->SDHC_IRQSIGEN = ZYNQ_BIT_SDHC_IRQSTAT_TC   |
+                           ZYNQ_BIT_SDHC_IRQSTAT_DMAE |
+                           ZYNQ_BIT_SDHC_IRQSTAT_DINT |
+                           ZYNQ_BIT_SDHC_IRQSTAT_DTOE |
+                           ZYNQ_BIT_SDHC_IRQSTAT_CRM;
+
+    FS_OS_SemPend(&FSDev_SD_Sem, 0u);
+
+    irqstat = esdhc->SDHC_IRQSTAT;
+    if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_EI)) {
+        if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DMAE)) {
+            *p_err = FS_DEV_SD_CARD_ERR_DATA;
+        } else if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DCE)) {
+            *p_err = FS_DEV_SD_CARD_ERR_DATA_CHKSUM;
+        } else if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DTOE)) {
+            *p_err = FS_DEV_SD_CARD_ERR_WAIT_TIMEOUT;
+        } else {
+            *p_err = FS_DEV_SD_CARD_ERR_UNKNOWN;
+        }
+    } else {
+        *p_err = FS_DEV_SD_CARD_ERR_NONE;
+    }
+
+    if(DEF_BIT_IS_CLR(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_TC)) {
+        *p_err = FS_DEV_SD_CARD_ERR_WAIT_TIMEOUT;
+    }
+
+    CPU_DCACHE_RANGE_FLUSH(p_dest, p_cmd->BlkCnt * p_cmd->BlkSize);
+    CPU_DCACHE_RANGE_INV(p_dest, p_cmd->BlkCnt * p_cmd->BlkSize);
+
+    if(DEF_BIT_IS_SET_ANY(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DEBE |
+                                   ZYNQ_BIT_SDHC_IRQSTAT_DCE  |
+                                   ZYNQ_BIT_SDHC_IRQSTAT_DTOE)) {
+        esdhc->SDHC_SYSCTL |= ZYNQ_BIT_SDHC_SYSCTL_RSTD;
+        while(DEF_BIT_IS_SET(esdhc->SDHC_SYSCTL, ZYNQ_BIT_SDHC_SYSCTL_RSTD)) {
+            ;
+        }
+
+        esdhc->SDHC_IRQSTAT = ZYNQ_BIT_SDHC_IRQSTAT_DEBE |
+                              ZYNQ_BIT_SDHC_IRQSTAT_DCE  |
+                              ZYNQ_BIT_SDHC_IRQSTAT_DTOE;
+    }
+
+    esdhc->SDHC_IRQSTAT = 0xFFFFFFFF;
+
+    CPU_MB();
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    FSDev_SD_Card_BSP_CmdDataWr()
+*
+* Description : Write data following command.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+*               p_cmd       Pointer to command that was started.
+*
+*               p_src       Pointer to source buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               FS_DEV_SD_CARD_ERR_NONE              No error.
+*                               FS_DEV_SD_CARD_ERR_NO_CARD           No card present.
+*                               FS_DEV_SD_CARD_ERR_UNKNOWN           Unknown or other error.
+*                               FS_DEV_SD_CARD_ERR_WAIT_TIMEOUT      Timeout in waiting for data.
+*                               FS_DEV_SD_CARD_ERR_DATA_UNDERRUN     Data underrun.
+*                               FS_DEV_SD_CARD_ERR_DATA_CHKSUM       Err in data checksum.
+*                               FS_DEV_SD_CARD_ERR_DATA_START_BIT    Data start bit error.
+*                               FS_DEV_SD_CARD_ERR_DATA              Other data error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : FSDev_SD_Card_WrData().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_CmdDataWr (FS_QTY               unit_nbr,
+                                   FS_DEV_SD_CARD_CMD  *p_cmd,
+                                   void                *p_src,
+                                   FS_DEV_SD_CARD_ERR  *p_err)
+{
+    CPU_INT32U  irqstat;
+
+    CPU_MB();
+#if 0
+    esdhc->SDHC_SYSCTL |=   ZYNQ_BIT_SDHC_SYSCTL_PEREN        |
+                            ZYNQ_BIT_SDHC_SYSCTL_IPGEN;
+
+    esdhc->SDHC_PROCTL |= DEF_BIT_08;
+#endif
+    esdhc->SDHC_IRQSIGEN = ZYNQ_BIT_SDHC_IRQSTAT_TC   |
+                           ZYNQ_BIT_SDHC_IRQSTAT_DMAE |
+                           ZYNQ_BIT_SDHC_IRQSTAT_DINT |
+                           ZYNQ_BIT_SDHC_IRQSTAT_DTOE |
+                           ZYNQ_BIT_SDHC_IRQSTAT_EI;
+
+    FS_OS_SemPend(&FSDev_SD_Sem, 0u);
+
+    irqstat = esdhc->SDHC_IRQSTAT;
+    if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_EI)) {
+        if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DMAE)) {
+            *p_err = FS_DEV_SD_CARD_ERR_DATA;
+        } else if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DCE)) {
+            *p_err = FS_DEV_SD_CARD_ERR_DATA_CHKSUM;
+        } else if(DEF_BIT_IS_SET(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DTOE)) {
+            *p_err = FS_DEV_SD_CARD_ERR_WAIT_TIMEOUT;
+        } else {
+            *p_err = FS_DEV_SD_CARD_ERR_UNKNOWN;
+        }
+    } else {
+        *p_err = FS_DEV_SD_CARD_ERR_NONE;
+    }
+
+    if(DEF_BIT_IS_SET_ANY(irqstat, ZYNQ_BIT_SDHC_IRQSTAT_DEBE |
+                                   ZYNQ_BIT_SDHC_IRQSTAT_DCE  |
+                                   ZYNQ_BIT_SDHC_IRQSTAT_DTOE)) {
+        esdhc->SDHC_SYSCTL |= ZYNQ_BIT_SDHC_SYSCTL_RSTD;
+        while(DEF_BIT_IS_SET(esdhc->SDHC_SYSCTL, ZYNQ_BIT_SDHC_SYSCTL_RSTD)) {
+            ;
+        }
+
+        esdhc->SDHC_IRQSTAT = ZYNQ_BIT_SDHC_IRQSTAT_DEBE |
+                              ZYNQ_BIT_SDHC_IRQSTAT_DCE  |
+                              ZYNQ_BIT_SDHC_IRQSTAT_DTOE;
+    }
+
+    esdhc->SDHC_IRQSTAT = 0xFFFFFFFF;
+
+    CPU_MB();
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                  FSDev_SD_Card_BSP_GetBlkCntMax()
+*
+* Description : Get maximum number of blocks that can be transferred with a multiple read or multiple
+*               write command.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+*               blk_size    Block size, in octets.
+*
+* Return(s)   : Maximum number of blocks.
+*
+* Caller(s)   : FSDev_SD_Card_Refresh().
+*
+* Note(s)     : (1) The DMA region from which data is read or written may be a limited size.  The count
+*                   returned by this function should be the number of blocks of size 'blk_size' that can
+*                   fit into this region.
+*
+*               (2) If the controller is not capable of multiple block reads or writes, 1 should be
+*                   returned.
+*
+*               (3) If the controller has no limit on the number of blocks in a multiple block read or
+*                   write, 'DEF_INT_32U_MAX_VAL' should be returned.
+*
+*               (4) This function SHOULD always return the same value.  If hardware constraints change
+*                   at run-time, the device MUST be closed & re-opened for any changes to be effective.
+*********************************************************************************************************
+*/
+
+CPU_INT32U  FSDev_SD_Card_BSP_GetBlkCntMax (FS_QTY      unit_nbr,
+                                            CPU_INT32U  blk_size)
+{
+    return (65535u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                 FSDev_SD_Card_BSP_GetBusWidthMax()
+*
+* Description : Get maximum bus width, in bits.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+* Return(s)   : Maximum bus width.
+*
+* Caller(s)   : FSDev_SD_Card_Refresh().
+*
+* Note(s)     : (1) Legal values are typically 1, 4 & 8.
+*
+*               (2) This function SHOULD always return the same value.  If hardware constraints change
+*                   at run-time, the device MUST be closed & re-opened for any changes to be effective.
+*********************************************************************************************************
+*/
+
+CPU_INT08U  FSDev_SD_Card_BSP_GetBusWidthMax (FS_QTY  unit_nbr)
+{
+    return (4u);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   FSDev_SD_Card_BSP_SetBusWidth()
+*
+* Description : Set bus width.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+*               width       Bus width, in bits.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : FSDev_SD_Card_Refresh(),
+*               FSDev_SD_Card_SetBusWidth().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_SetBusWidth (FS_QTY      unit_nbr,
+                                     CPU_INT08U  width)
+{
+
+    if(width == 1u) {
+        esdhc->SDHC_PROCTL &= ~ZYNQ_BIT_SDHC_PROCTL_DTW;
+    } else {
+        esdhc->SDHC_PROCTL |= ZYNQ_BIT_SDHC_PROCTL_DTW;
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   FSDev_SD_Card_BSP_SetClkFreq()
+*
+* Description : Set clock frequency.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+*               freq        Clock frequency, in Hz.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : FSDev_SD_Card_Refresh().
+*
+* Note(s)     : (1) The effective clock frequency MUST be no more than 'freq'.  If the frequency cannot be
+*                   configured equal to 'freq', it should be configured less than 'freq'.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_SetClkFreq (FS_QTY      unit_nbr,
+                                    CPU_INT32U  freq)
+{
+    CPU_INT32U   div;
+
+
+    div = ((SD_ROOT_CLK_FREQ + freq - 1u) / (freq)) - 1u;
+
+    esdhc->SDHC_PROCTL |= DEF_BIT_08;
+
+    esdhc->SDHC_SYSCTL &= ~ZYNQ_BIT_SDHC_SYSCTL_SDCLKEN;
+
+    esdhc->SDHC_SYSCTL =    ZYNQ_BIT_SDHC_SYSCTL_DTOCV(8)     |
+                            ZYNQ_BIT_SDHC_SYSCTL_SDCLKFS(div) |
+                            ZYNQ_BIT_SDHC_SYSCTL_PEREN        |
+                            ZYNQ_BIT_SDHC_SYSCTL_IPGEN;
+
+    //while(DEF_BIT_IS_CLR(esdhc->SDHC_SYSCTL, ZYNQ_BIT_SDHC_SYSCTL_CLKSTB)) {
+    //    ;
+   // }
+
+    esdhc->SDHC_SYSCTL |= ZYNQ_BIT_SDHC_SYSCTL_SDCLKEN;
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*                                 FSDev_SD_Card_BSP_SetTimeoutData()
+*
+* Description : Set data timeout.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+*               to_clks     Timeout, in clocks.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : FSDev_SD_Card_Refresh().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_SetTimeoutData (FS_QTY      unit_nbr,
+                                        CPU_INT32U  to_clks)
+{
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                 FSDev_SD_Card_BSP_SetTimeoutResp()
+*
+* Description : Set response timeout.
+*
+* Argument(s) : unit_nbr    Unit number of SD/MMC card.
+*
+*               to_ms       Timeout, in milliseconds.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : FSDev_SD_Card_Refresh().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_SetTimeoutResp (FS_QTY      unit_nbr,
+                                        CPU_INT32U  to_ms)
+{
+
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                    FSDev_SD_Card_BSP_ISR_Handler()
+*
+* Description : Interrupt handler for the SDIO.
+*
+* Argument(s) : source  Interrupt source undefined/ignored for peripheral interrupts.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : FSDev_SD_Card_BSP_Open().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void  FSDev_SD_Card_BSP_ISR_Handler (CPU_INT32U  source, void *p_arg)
+{
+                                                                /* DMA interrupt, continue transfer.                    */
+    if((DEF_BIT_IS_SET(esdhc->SDHC_IRQSTAT, ZYNQ_BIT_SDHC_IRQSTAT_DINT) == DEF_YES) &&
+       (DEF_BIT_IS_SET(esdhc->SDHC_IRQSTAT, ZYNQ_BIT_SDHC_IRQSTAT_EI) == DEF_NO)) {
+        esdhc->SDHC_IRQSTAT= ZYNQ_BIT_SDHC_IRQSTAT_DINT;
+        esdhc->SDHC_DSADDR = esdhc->SDHC_DSADDR;
+
+        return;
+    }
+
+
+    esdhc->SDHC_IRQSIGEN = 0x0;                                 /* Disable all interrupt signals.                       */
+
+    FS_OS_SemPost(&FSDev_SD_Sem);                               /* Wake up the pending task.                            */
+
+    return;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_http-c/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_http-c/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_http-c/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_http-c/src/cfg/http-c_cfg.c b/src/ucos_v1_42/ucos/components/ucos_http-c/src/cfg/http-c_cfg.c
new file mode 100644
index 0000000..bfa4621
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_http-c/src/cfg/http-c_cfg.c
@@ -0,0 +1,172 @@
+/*
+*********************************************************************************************************
+*                                              uC/HTTPc
+*                                 Hypertext Transfer Protocol (client)
+*
+*                          (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/HTTPc is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at https://doc.micrium.com.
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 HTTP CLIENT CONFIGURATION FILE
+*
+* Filename      : http-c_cfg.c
+* Version       : V3.00.00
+* Programmer(s) : MM
+*                 AL
+*********************************************************************************************************
+* Note(s)       : (1) Assumes the following versions (or more recent) of software modules are included in
+*                     the project build :
+*
+*                       (a) uC/CPU    V1.29.02
+*                       (b) uC/LIB    V1.38.00
+*                       (c) uC/Common V1.01.00
+*                       (d) uC/TCP-IP V3.03.00
+*
+*
+*                 (2) For additional details on the features available with uC/HTTPc, the API, the
+*                     installation, etc. Please refer to the uC/HTTPc documentation available at
+*                     https://doc.micrium.com/HTTPc.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*
+* Note(s) : (1) All values that are used in this file and are defined in other header files should be
+*               included in this file. Some values could be located in the same file such as task priority
+*               and stack size. This template file assume that the following values are defined in app_cfg.h:
+*
+*                   HTTPc_OS_CFG_INSTANCE_TASK_PRIO
+*                   HTTPc_OS_CFG_INSTANCE_TASK_STK_SIZE
+*
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include                                             /* See Note #1.                                         */
+#include  
+
+#include  
+#include  "http-c_cfg.h"
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             DEFINES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                        SECURE CONFIGURATION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              HTTP CLIENT SUITE CONFIGURATION OBJECT
+*
+* Note(s): (1) For additional information on the HTTP Client Configuration fields, refer to the
+*              Micrium Documentation online at : https://doc.micrium.com/display/HTTPc/Run-Time Configuration
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+const  HTTPc_CFG  HTTPc_Cfg = {
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                       TASK CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+         UCOS_HTTPc_OS_CFG_TASK_DELAY,                          /* .TaskDly_ms (HTTPc Task delay in milliseconds)       */
+         UCOS_HTTPc_OS_CFG_MSG_Q_SIZE,                          /* .MsqQ_Size  (Message Task Queue size)                */
+
+/*
+*--------------------------------------------------------------------------------------------------------
+*                                    CONNECTION CONFIGURATION
+*--------------------------------------------------------------------------------------------------------
+*/
+
+         UCOS_HTTPc_OS_CFG_TIMEOUT,                             /* .ConnConnectTimeout_ms   (Connect timeout in ms)     */
+         UCOS_HTTPc_OS_CFG_INACTIVITY_TIMEOUT,                  /* .ConnInactivityTimeout_s (Inactivity timeout in s)   */
+
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               HTTP CLIENT TASK CONFIGURATION OBJECT
+*
+* Note(s): (1) We recommend to configure the Network Protocol Stack task priorities & HTTP client task
+*              priority as follows:
+*
+*                   NET_OS_CFG_IF_TX_DEALLOC_TASK_PRIO (Highest)
+*
+*                   HTTPc_OS_CFG_TASK_PRIO             (  ...  )
+*
+*                   NET_OS_CFG_TMR_TASK_PRIO           (  ...  )
+*
+*                   NET_OS_CFG_IF_RX_TASK_PRIO         (Lowest )
+*
+*              We recommend that the uC/TCP-IP Timer task and network interface Receive task be lower
+*              priority than almost all other application tasks; but we recommend that the network
+*              interface Transmit De-allocation task be higher priority than all application tasks that
+*              use uC/TCP-IP network services.
+*
+*              However better performance can be observed when the HTTP Client is set with the lowest
+*              priority. So some experimentation could be required to identify the better task priority
+*              configuration.
+*
+*          (2) TODO note on the HTTP Client stack's task size.
+*
+*          (3) When the Stack pointer is defined as null pointer (DEF_NULL), the task's stack should be
+*              automatically allowed on the heap of uC/LIB.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (HTTPc_CFG_MODE_ASYNC_TASK_EN == DEF_ENABLED)
+
+#ifndef  HTTPc_OS_CFG_TASK_PRIO
+#define  HTTPc_OS_CFG_TASK_PRIO                  20
+#endif
+
+#ifndef  HTTPc_OS_CFG_TASK_STK_SIZE
+#define  HTTPc_OS_CFG_TASK_STK_SIZE            1024
+#endif
+
+const  HTTP_TASK_CFG  HTTPc_TaskCfg = {
+        HTTPc_OS_CFG_TASK_PRIO,                                 /* HTTPc task priority              (See Note #1).      */
+        HTTPc_OS_CFG_TASK_STK_SIZE,                             /* HTTPc task stack size in bytes   (See Note #2).      */
+        DEF_NULL,                                               /* HTTPc task stack pointer         (See Note #3).      */
+};
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_http-s/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_http-s/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_http-s/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_mqtt-c/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_mqtt-c/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_mqtt-c/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_osii/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_osii/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osii/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/mb/ucos_osii_bsp.c b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/mb/ucos_osii_bsp.c
new file mode 100644
index 0000000..cf71732
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/mb/ucos_osii_bsp.c
@@ -0,0 +1,134 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                                SYSTICK
+*
+* Filename      : ucos_osii_bsp.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+
+#include "ucos_osii_bsp.h"
+
+#if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER)
+#include  
+#endif /* #if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER) */
+
+
+#if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER)
+static AXITIMER_HANDLE TmrHandle;
+#endif /* #if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER) */
+
+/*
+*********************************************************************************************************
+*                                       BSP_OS_TmrTickHandler()
+*
+* Description : Interrupt handler for the tick timer
+*
+* Argument(s) : cpu_id     Source core id
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER)
+static void  UCOS_TmrTickHandler(AXITIMER_HANDLE handle,
+                                 CPU_INT32U      tmr_nbr)
+{
+    OSTimeTick();
+}
+#elif (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_INT)
+static void  UCOS_TmrTickHandler(void       *p_int_arg,
+                                 CPU_INT32U  cpu_id)
+{
+    OSTimeTick();
+}
+#endif
+
+
+/*
+ *********************************************************************************************************
+ *                                            BSP_OS_TmrTickInit()
+ *
+ * Description : Initialize uC/OS-III's tick source
+ *
+ * Argument(s) : ticks_per_sec              Number of ticks per second.
+ *
+ * Return(s)   : none.
+ *
+ * Caller(s)   : Application.
+ *
+ * Note(s)     : none.
+ *********************************************************************************************************
+ */
+
+void UCOS_TmrTickInit(CPU_INT32U tick_rate)
+{
+    CPU_INT32U tmr_freq;
+
+#if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER)
+    TmrHandle = AXITimer_Init(UCOS_SYSTICK_DEVICE_ID);
+
+    tmr_freq = AXITimer_FreqGet(TmrHandle);
+    AXITimer_LoadSet(TmrHandle, 0, tmr_freq / tick_rate );
+
+    AXITimer_OptSet(TmrHandle, 0, AXITIMER_BIT_TCSR_ENIT | AXITIMER_BIT_TCSR_ARHT | AXITIMER_BIT_TCSR_UDT);
+
+    AXITimer_Start(TmrHandle, 0);
+
+    AXITimer_CallbackSet(TmrHandle, 0, UCOS_TmrTickHandler);
+#elif (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_INT)
+    UCOS_IntVectSet(UCOS_SYSTICK_DEVICE_INT_SRC,
+                    0u,
+                    0u,
+                    UCOS_TmrTickHandler,
+                    DEF_NULL);
+
+    UCOS_IntSrcEn(UCOS_SYSTICK_DEVICE_INT_SRC);
+#endif
+
+}
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/mb/ucos_osii_bsp.h b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/mb/ucos_osii_bsp.h
new file mode 100644
index 0000000..540552f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/mb/ucos_osii_bsp.h
@@ -0,0 +1,34 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                            KERNEL BSP
+*
+* Filename      : ucos_osiii_bsp.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+void UCOS_TmrTickInit(CPU_INT32U tick_rate);
diff --git a/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/ps7/ucos_osii_bsp.c b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/ps7/ucos_osii_bsp.c
new file mode 100644
index 0000000..ad05c99
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/ps7/ucos_osii_bsp.c
@@ -0,0 +1,124 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                                SYSTICK
+*
+* Filename      : ucos_osii_bsp.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
+#include  "ucos_osii_bsp.h"
+#include  
+#include  
+
+#if (XPAR_CPU_ID == 0)
+#define SCUTMR_CLK_FREQ  (XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ / 2)
+#else
+#define SCUTMR_CLK_FREQ  (XPAR_PS7_CORTEXA9_1_CPU_CLK_FREQ_HZ / 2)
+#endif
+
+#define  ARM_PTMR_REG_PTLR     (*((CPU_REG32 *)(XPAR_PS7_SCUTIMER_0_BASEADDR + 0x0000))) /* Private timer load register.            */
+#define  ARM_PTMR_REG_PTCTRR   (*((CPU_REG32 *)(XPAR_PS7_SCUTIMER_0_BASEADDR + 0x0004))) /* Private timer counter register.         */
+#define  ARM_PTMR_REG_PTCTLR   (*((CPU_REG32 *)(XPAR_PS7_SCUTIMER_0_BASEADDR + 0x0008))) /* Private timer control register.         */
+#define  ARM_PTMR_REG_PTISR    (*((CPU_REG32 *)(XPAR_PS7_SCUTIMER_0_BASEADDR + 0x000C))) /* Private timer interrupt status register.*/
+
+/*
+*********************************************************************************************************
+*                                       BSP_OS_TmrTickHandler()
+*
+* Description : Interrupt handler for the tick timer
+*
+* Argument(s) : cpu_id     Source core id
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  UCOS_TmrTickHandler(void *p_int_arg, CPU_INT32U cpu_id)
+{
+    ARM_PTMR_REG_PTISR = 0x01u;                                 /* Clear the interrupt.                                 */
+
+    OSTimeTick();
+}
+
+
+/*
+ *********************************************************************************************************
+ *                                            BSP_OS_TmrTickInit()
+ *
+ * Description : Initialize uC/OS-III's tick source
+ *
+ * Argument(s) : ticks_per_sec              Number of ticks per second.
+ *
+ * Return(s)   : none.
+ *
+ * Caller(s)   : Application.
+ *
+ * Note(s)     : none.
+ *********************************************************************************************************
+ */
+
+void UCOS_TmrTickInit(CPU_INT32U tick_rate)
+{
+    CPU_INT32U tmr_cnt;
+
+
+    ARM_PTMR_REG_PTCTLR = 0x0006u;
+
+    tmr_cnt = SCUTMR_CLK_FREQ / tick_rate;
+
+    ARM_PTMR_REG_PTLR = tmr_cnt;
+
+    ARM_PTMR_REG_PTISR = 0x01u;
+
+    UCOS_IntVectSet (29u,
+                      0u,
+                      0u,
+                      UCOS_TmrTickHandler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn (29u);
+
+    ARM_PTMR_REG_PTCTLR |= 0x01;
+
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/ps7/ucos_osii_bsp.h b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/ps7/ucos_osii_bsp.h
new file mode 100644
index 0000000..a2c984f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/ps7/ucos_osii_bsp.h
@@ -0,0 +1,34 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                                SYSTICK
+*
+* Filename      : ucos_osii_bsp.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+void UCOSOS_TmrTickInit(CPU_INT32U tick_rate);
diff --git a/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psua53/ucos_osii_bsp.c b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psua53/ucos_osii_bsp.c
new file mode 100644
index 0000000..43cd672
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psua53/ucos_osii_bsp.c
@@ -0,0 +1,134 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2016; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                                SYSTICK
+*
+* Filename      : ucos_osii_bsp.c
+* Version       : V1.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
+#include  "ucos_osii_bsp.h"
+#include  
+
+
+/* TODO - Derive this from hardware configuration. */
+#define CPU_CLK_TMR_FREQ 100000000UL
+
+static CPU_INT64U TmrStepSize;
+
+/*
+*********************************************************************************************************
+*                                       BSP_OS_TmrTickHandler()
+*
+* Description : Interrupt handler for the tick timer
+*
+* Argument(s) : cpu_id     Source core id
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  UCOS_TmrTickHandler(void *p_int_arg, CPU_INT32U cpu_id)
+{
+    CPU_INT64U tmr_cnt;
+
+
+#if (UCOS_ZYNQ_MPSOC_A53_TICK_SECURE_EL3 == DEF_ENABLED)
+    CPU_CP_GET(tmr_cnt, CNTPS_CVAL_EL1);
+    tmr_cnt += TmrStepSize;
+    CPU_CP_SET(tmr_cnt, CNTPS_CVAL_EL1);
+#else
+    CPU_CP_GET(tmr_cnt, CNTP_CVAL_EL0);
+    tmr_cnt += TmrStepSize;
+    CPU_CP_SET(tmr_cnt, CNTP_CVAL_EL0);
+#endif
+
+    OSTimeTick();
+}
+
+
+/*
+ *********************************************************************************************************
+ *                                            BSP_OS_TmrTickInit()
+ *
+ * Description : Initialize uC/OS-II's tick source
+ *
+ * Argument(s) : ticks_per_sec              Number of ticks per second.
+ *
+ * Return(s)   : none.
+ *
+ * Caller(s)   : Application.
+ *
+ * Note(s)     : none.
+ *********************************************************************************************************
+ */
+
+void UCOS_TmrTickInit (CPU_INT32U tick_rate)
+{
+
+    TmrStepSize = CPU_CLK_TMR_FREQ / tick_rate;
+
+#if (UCOS_ZYNQ_MPSOC_A53_TICK_SECURE_EL3 == DEF_ENABLED)
+    UCOS_IntVectSet (29u,
+                     0u,
+                     0u,
+                     UCOS_TmrTickHandler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn (29u);
+
+    CPU_CP_SET(TmrStepSize, CNTPS_TVAL_EL1);
+    CPU_CP_SET(0x1, CNTPS_CTL_EL1);
+#else
+    UCOS_IntVectSet (30u,
+                     0u,
+                     0u,
+                     UCOS_TmrTickHandler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn (30u);
+
+    CPU_CP_SET(TmrStepSize, CNTP_TVAL_EL0);
+    CPU_CP_SET(0x1, CNTP_CTL_EL0);
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psua53/ucos_osii_bsp.h b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psua53/ucos_osii_bsp.h
new file mode 100644
index 0000000..a621848
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psua53/ucos_osii_bsp.h
@@ -0,0 +1,41 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2016; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                            KERNEL BSP
+*
+* Filename      : ucos_osii_bsp.h
+* Version       : V1.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+void UCOS_TmrTickInit(CPU_INT32U tick_rate);
diff --git a/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psua53/ucos_osii_bsp_a.S b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psua53/ucos_osii_bsp_a.S
new file mode 100644
index 0000000..3da499c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psua53/ucos_osii_bsp_a.S
@@ -0,0 +1,44 @@
+.text
+
+.global PS8A53_OS_TmrTickHandler
+.global PS8A53_OS_TmrTickInit
+
+PS8A53_OS_TmrTickHandler:
+    STP  x29, x30, [sp, #-16]!
+
+    MRS x0, CNTP_CVAL_EL0
+    LDR x1, =0x1FFFF
+    ADD x0, x0, x1
+    MSR CNTP_CVAL_EL0, x0
+
+    .global OSTimeTick
+    BL OSTimeTick
+
+    LDP  x29, x30, [sp], #16
+    RET
+
+
+PS8A53_OS_TmrTickInit:
+    STP  x29, x30, [sp, #-16]!
+    LDR x0, =0x1FFFF
+    MSR CNTP_CVAL_EL0, x0
+    MRS x0, CNTP_CTL_EL0
+    ORR x0, x0, #0x01
+    MSR CNTP_CTL_EL0, x0
+
+    .global UCOS_IntVectSet
+    MOV x0, #30
+    MOV x1, #0
+    MOV x2, #1
+    LDR x3, =UCOS_TmrTickHandler
+    LDR x4, #0
+    BL UCOS_IntVectSet
+
+    .global UCOS_IntSrcEn
+    MOV x0, #30
+    BL UCOS_IntSrcEn
+
+    LDP  x29, x30, [sp], #16
+    RET
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psur5/ucos_osii_bsp.c b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psur5/ucos_osii_bsp.c
new file mode 100644
index 0000000..49737ff
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psur5/ucos_osii_bsp.c
@@ -0,0 +1,179 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                                SYSTICK
+*
+* Filename      : ucos_osii_bsp.c
+* Version       : V1.20
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
+#include  "ucos_osii_bsp.h"
+#include  
+#include  
+
+
+typedef struct ttcps {
+    CPU_REG32  ClkCtrl;
+    CPU_REG32  RESERVED0[2];
+    CPU_REG32  CtrCtrl;
+    CPU_REG32  RESERVED1[2];
+    CPU_REG32  CtrVal;
+    CPU_REG32  RESERVED2[2];
+    CPU_REG32  IntervalCtrVal;
+    CPU_REG32  RESERVED3[2];
+    CPU_REG32  Match1CtrVal;
+    CPU_REG32  RESERVED4[2];
+    CPU_REG32  Match2CtrVal;
+    CPU_REG32  RESERVED5[2];
+    CPU_REG32  Match3CtrVal;
+    CPU_REG32  RESERVED6[2];
+    CPU_REG32  IntStat;
+    CPU_REG32  RESERVED7[2];
+    CPU_REG32  IntEn;
+    CPU_REG32  RESERVED8[2];
+    CPU_REG32  EventCtrl;
+    CPU_REG32  RESERVED9[2];
+    CPU_REG32  EventReg;
+    CPU_REG32  RESERVED10[2];
+} TTCPS, *TTCPS_PTR;
+
+#if (XPAR_CPU_ID == 0)
+#define  TTC_TIMER_TICK           ((TTCPS_PTR)(0xFF110000))
+#else
+#define  TTC_TIMER_TICK           ((TTCPS_PTR)(0xFF120000))
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       BSP_OS_TmrTickHandler()
+*
+* Description : Interrupt handler for the tick timer
+*
+* Argument(s) : cpu_id     Source core id
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  UCOS_TmrTickHandler(void *p_int_arg, CPU_INT32U cpu_id)
+{
+
+    TTC_TIMER_TICK->IntStat;
+    OSTimeTick();
+}
+
+
+/*
+ *********************************************************************************************************
+ *                                            BSP_OS_TmrTickInit()
+ *
+ * Description : Initialize uC/OS-III's tick source
+ *
+ * Argument(s) : ticks_per_sec              Number of ticks per second.
+ *
+ * Return(s)   : none.
+ *
+ * Caller(s)   : Application.
+ *
+ * Note(s)     : none.
+ *********************************************************************************************************
+ */
+
+void UCOS_TmrTickInit (CPU_INT32U tick_rate)
+{
+
+#if (XPAR_CPU_ID == 0)
+    UCOS_IntVectSet (68u,
+                     0u,
+                     0u,
+                     UCOS_TmrTickHandler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn (68u);
+#else
+    UCOS_IntVectSet (68u,
+                     0u,
+                     DEF_BIT_01,
+                     UCOS_TmrTickHandler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn (68u);
+#endif
+
+    TTC_TIMER_TICK->IntervalCtrVal = 100000000 / tick_rate;
+    TTC_TIMER_TICK->IntEn |= DEF_BIT_00;
+    TTC_TIMER_TICK->CtrCtrl |= DEF_BIT_01;
+    TTC_TIMER_TICK->CtrCtrl &= ~DEF_BIT_00;
+}
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+OS_TICK BSP_OS_TickGet (void)
+{
+    CPU_INT64U  ts;
+
+
+    ts = UCOS_TS_TmrRd();
+
+    return (ts / (ARM_GTMR_FREQ  / OS_CFG_TICK_RATE_HZ));
+}
+#endif
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+OS_TICK BSP_OS_TickNextSet (OS_TICK next)
+{
+    CPU_INT64U next_tick;
+    CPU_INT64U next_ts;
+    CPU_SR_ALLOC();
+
+    next_tick = last_tick + next;
+    next_ts = next_tick * (ARM_GTMR_FREQ  / OS_CFG_TICK_RATE_HZ);
+
+    CPU_CRITICAL_ENTER();
+    ARM_GTMR_REG_GTCR &= ~DEF_BIT_01;
+    ARM_GTMR_REG_GTCVH = (CPU_INT32U)(next_ts >> 32);
+    ARM_GTMR_REG_GTCVL = (CPU_INT32U)(next_ts);
+    ARM_GTMR_REG_GTCR |=  DEF_BIT_01;
+    CPU_CRITICAL_EXIT();
+}
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psur5/ucos_osii_bsp.h b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psur5/ucos_osii_bsp.h
new file mode 100644
index 0000000..952da6e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osii/src/bsp/psur5/ucos_osii_bsp.h
@@ -0,0 +1,41 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                            KERNEL BSP
+*
+* Filename      : ucos_osii_bsp.h
+* Version       : V1.20
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+void UCOS_TmrTickInit(CPU_INT32U tick_rate);
diff --git a/src/ucos_v1_42/ucos/components/ucos_osiii/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_osiii/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osiii/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/mb/ucos_osiii_bsp.c b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/mb/ucos_osiii_bsp.c
new file mode 100644
index 0000000..0131372
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/mb/ucos_osiii_bsp.c
@@ -0,0 +1,133 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                                SYSTICK
+*
+* Filename      : ucos_osiii_bsp.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include "ucos_osiii_bsp.h"
+
+#if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER)
+#include  
+#endif /* #if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER) */
+
+
+#if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER)
+static AXITIMER_HANDLE TmrHandle;
+#endif /* #if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER) */
+
+/*
+*********************************************************************************************************
+*                                       BSP_OS_TmrTickHandler()
+*
+* Description : Interrupt handler for the tick timer
+*
+* Argument(s) : cpu_id     Source core id
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER)
+static void  UCOS_TmrTickHandler(AXITIMER_HANDLE handle,
+                                 CPU_INT32U      tmr_nbr)
+{
+    OSTimeTick();
+}
+#elif (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_INT)
+static void  UCOS_TmrTickHandler(void       *p_int_arg,
+                                 CPU_INT32U  cpu_id)
+{
+    OSTimeTick();
+}
+#endif
+
+/*
+ *********************************************************************************************************
+ *                                            BSP_OS_TmrTickInit()
+ *
+ * Description : Initialize uC/OS-III's tick source
+ *
+ * Argument(s) : ticks_per_sec              Number of ticks per second.
+ *
+ * Return(s)   : none.
+ *
+ * Caller(s)   : Application.
+ *
+ * Note(s)     : none.
+ *********************************************************************************************************
+ */
+
+void UCOS_TmrTickInit(CPU_INT32U tick_rate)
+{
+    CPU_INT32U tmr_freq;
+
+
+#if (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_AXITIMER)
+    TmrHandle = AXITimer_Init(UCOS_SYSTICK_DEVICE_ID);
+
+    tmr_freq = AXITimer_FreqGet(TmrHandle);
+    AXITimer_LoadSet(TmrHandle, 0, tmr_freq / tick_rate );
+
+    AXITimer_OptSet(TmrHandle, 0, AXITIMER_BIT_TCSR_ENIT | AXITIMER_BIT_TCSR_ARHT | AXITIMER_BIT_TCSR_UDT);
+
+    AXITimer_Start(TmrHandle, 0);
+
+    AXITimer_CallbackSet(TmrHandle, 0, UCOS_TmrTickHandler);
+#elif (UCOS_SYSTICK_DRIVER == UCOS_SYSTICK_INT)
+    UCOS_IntVectSet(UCOS_SYSTICK_DEVICE_INT_SRC,
+                    0u,
+                    0u,
+                    UCOS_TmrTickHandler,
+                    DEF_NULL);
+
+    UCOS_IntSrcEn(UCOS_SYSTICK_DEVICE_INT_SRC);
+#endif
+
+}
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/mb/ucos_osiii_bsp.h b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/mb/ucos_osiii_bsp.h
new file mode 100644
index 0000000..540552f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/mb/ucos_osiii_bsp.h
@@ -0,0 +1,34 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                            KERNEL BSP
+*
+* Filename      : ucos_osiii_bsp.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+void UCOS_TmrTickInit(CPU_INT32U tick_rate);
diff --git a/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/ps7/ucos_osiii_bsp.c b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/ps7/ucos_osiii_bsp.c
new file mode 100644
index 0000000..cab5102
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/ps7/ucos_osiii_bsp.c
@@ -0,0 +1,211 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                                SYSTICK
+*
+* Filename      : ucos_osiii_bsp.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
+#include  "ucos_osiii_bsp.h"
+#include  
+#include  
+#include  
+
+#if (XPAR_CPU_ID == 0)
+#define SCUTMR_CLK_FREQ  (XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ / 2)
+#else
+#define SCUTMR_CLK_FREQ  (XPAR_PS7_CORTEXA9_1_CPU_CLK_FREQ_HZ / 2)
+#endif
+
+
+#define  ARM_PTMR_REG_PTLR     (*((CPU_REG32 *)(XPAR_PS7_SCUTIMER_0_BASEADDR + 0x0000))) /* Private timer load register.            */
+#define  ARM_PTMR_REG_PTCTRR   (*((CPU_REG32 *)(XPAR_PS7_SCUTIMER_0_BASEADDR + 0x0004))) /* Private timer counter register.         */
+#define  ARM_PTMR_REG_PTCTLR   (*((CPU_REG32 *)(XPAR_PS7_SCUTIMER_0_BASEADDR + 0x0008))) /* Private timer control register.         */
+#define  ARM_PTMR_REG_PTISR    (*((CPU_REG32 *)(XPAR_PS7_SCUTIMER_0_BASEADDR + 0x000C))) /* Private timer interrupt status register.*/
+
+#define  ARM_GTMR_REG_GTCRL   (*((CPU_REG32 *)(XPAR_PS7_SCUC_0_BASEADDR + 0x0200))) /* Global timer counter register (Low). */
+#define  ARM_GTMR_REG_GTCRH   (*((CPU_REG32 *)(XPAR_PS7_SCUC_0_BASEADDR + 0x0204))) /* Global timer counter register (High).*/
+#define  ARM_GTMR_REG_GTCR    (*((CPU_REG32 *)(XPAR_PS7_SCUC_0_BASEADDR + 0x0208))) /* Global timer control register.       */
+#define  ARM_GTMR_REG_GTCVL   (*((CPU_REG32 *)(XPAR_PS7_SCUC_0_BASEADDR + 0x0210))) /* Global timer compare value (low)     */
+#define  ARM_GTMR_REG_GTCVH   (*((CPU_REG32 *)(XPAR_PS7_SCUC_0_BASEADDR + 0x0214))) /* Global timer compare value (high)    */
+
+#define  ARM_GTMR_FREQ  (XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ / 2)
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+CPU_INT64U last_tick;
+#endif
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+static CPU_INT64U  UCOS_TS_TmrRd (void)
+{
+    CPU_INT64U  ts_tmr_cnts;
+    CPU_INT32U  ts_tmr_low;
+    CPU_INT32U  ts_tmr_high_a;
+    CPU_INT32U  ts_tmr_high_b;
+
+    ts_tmr_high_b = ARM_GTMR_REG_GTCRH;
+
+    do {
+        ts_tmr_high_a = ts_tmr_high_b;
+        ts_tmr_low    = ARM_GTMR_REG_GTCRL;
+        ts_tmr_high_b = ARM_GTMR_REG_GTCRH;
+    } while (ts_tmr_high_a != ts_tmr_high_b);
+
+    ts_tmr_cnts  = ts_tmr_high_a;
+    ts_tmr_cnts  = ts_tmr_cnts << 32u;
+    ts_tmr_cnts += ts_tmr_low;
+
+    return (ts_tmr_cnts);
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                       BSP_OS_TmrTickHandler()
+*
+* Description : Interrupt handler for the tick timer
+*
+* Argument(s) : cpu_id     Source core id
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  UCOS_TmrTickHandler(void *p_int_arg, CPU_INT32U cpu_id)
+{
+    CPU_INT64U  ts;
+    ARM_PTMR_REG_PTISR = 0x01u;                                 /* Clear the interrupt.                                 */
+
+#if (OS_CFG_DYN_TICK_EN == DEF_DISABLED)
+    OSTimeTick();
+#else
+    ARM_GTMR_REG_GTCR &= ~DEF_BIT_01;
+    ts = UCOS_TS_TmrRd();
+    OSTimeDynTick((ts / (ARM_GTMR_FREQ  / OS_CFG_TICK_RATE_HZ)) - last_tick);
+    last_tick = (ts / (ARM_GTMR_FREQ  / OS_CFG_TICK_RATE_HZ));
+#endif
+}
+
+
+/*
+ *********************************************************************************************************
+ *                                            BSP_OS_TmrTickInit()
+ *
+ * Description : Initialize uC/OS-III's tick source
+ *
+ * Argument(s) : ticks_per_sec              Number of ticks per second.
+ *
+ * Return(s)   : none.
+ *
+ * Caller(s)   : Application.
+ *
+ * Note(s)     : none.
+ *********************************************************************************************************
+ */
+
+void UCOS_TmrTickInit (CPU_INT32U tick_rate)
+{
+    CPU_INT32U tmr_cnt;
+
+#if (OS_CFG_DYN_TICK_EN == DEF_DISABLED)
+    ARM_PTMR_REG_PTCTLR = 0x0006u;
+
+    tmr_cnt = SCUTMR_CLK_FREQ / tick_rate;
+
+    ARM_PTMR_REG_PTLR = tmr_cnt;
+
+    ARM_PTMR_REG_PTISR = 0x01u;
+
+    UCOS_IntVectSet (29u,
+                     0u,
+                     0u,
+                     UCOS_TmrTickHandler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn (29u);
+
+    ARM_PTMR_REG_PTCTLR |= 0x01;
+#else
+    UCOS_IntVectSet (27u,
+                     0u,
+                     0u,
+                     UCOS_TmrTickHandler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn (27u);
+
+    ARM_GTMR_REG_GTCR = DEF_BIT_00 | DEF_BIT_02;
+#endif
+}
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+OS_TICK BSP_OS_TickGet (void)
+{
+    CPU_INT64U  ts;
+
+
+    ts = UCOS_TS_TmrRd();
+
+    return (ts / (ARM_GTMR_FREQ  / OS_CFG_TICK_RATE_HZ));
+}
+#endif
+
+#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED)
+OS_TICK BSP_OS_TickNextSet (OS_TICK next)
+{
+    CPU_INT64U next_tick;
+    CPU_INT64U next_ts;
+    CPU_SR_ALLOC();
+
+    next_tick = last_tick + next;
+    next_ts = next_tick * (ARM_GTMR_FREQ  / OS_CFG_TICK_RATE_HZ);
+
+    CPU_CRITICAL_ENTER();
+    ARM_GTMR_REG_GTCR &= ~DEF_BIT_01;
+    ARM_GTMR_REG_GTCVH = (CPU_INT32U)(next_ts >> 32);
+    ARM_GTMR_REG_GTCVL = (CPU_INT32U)(next_ts);
+    ARM_GTMR_REG_GTCR |=  DEF_BIT_01;
+    CPU_CRITICAL_EXIT();
+}
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/ps7/ucos_osiii_bsp.h b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/ps7/ucos_osiii_bsp.h
new file mode 100644
index 0000000..f6da807
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/ps7/ucos_osiii_bsp.h
@@ -0,0 +1,41 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                            KERNEL BSP
+*
+* Filename      : ucos_osiii_bsp.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+void UCOS_TmrTickInit(CPU_INT32U tick_rate);
diff --git a/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psua53/ucos_osiii_bsp.c b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psua53/ucos_osiii_bsp.c
new file mode 100644
index 0000000..4bc43fd
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psua53/ucos_osiii_bsp.c
@@ -0,0 +1,135 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                                SYSTICK
+*
+* Filename      : ucos_osiii_bsp.c
+* Version       : V1.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
+#include  "ucos_osiii_bsp.h"
+#include  
+
+
+/* TODO - Derive this from hardware configuration. */
+#define CPU_CLK_TMR_FREQ 100000000UL
+
+static CPU_INT64U TmrStepSize;
+
+/*
+*********************************************************************************************************
+*                                       BSP_OS_TmrTickHandler()
+*
+* Description : Interrupt handler for the tick timer
+*
+* Argument(s) : cpu_id     Source core id
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  UCOS_TmrTickHandler(void *p_int_arg, CPU_INT32U cpu_id)
+{
+    CPU_INT64U tmr_cnt;
+
+
+#if (UCOS_ZYNQ_MPSOC_A53_TICK_SECURE_EL3 == DEF_ENABLED)
+    CPU_CP_GET(tmr_cnt, CNTPS_CVAL_EL1);
+    tmr_cnt += TmrStepSize;
+    CPU_CP_SET(tmr_cnt, CNTPS_CVAL_EL1);
+#else
+    CPU_CP_GET(tmr_cnt, CNTP_CVAL_EL0);
+    tmr_cnt += TmrStepSize;
+    CPU_CP_SET(tmr_cnt, CNTP_CVAL_EL0);
+#endif
+
+    OSTimeTick();
+}
+
+
+/*
+ *********************************************************************************************************
+ *                                            BSP_OS_TmrTickInit()
+ *
+ * Description : Initialize uC/OS-III's tick source
+ *
+ * Argument(s) : ticks_per_sec              Number of ticks per second.
+ *
+ * Return(s)   : none.
+ *
+ * Caller(s)   : Application.
+ *
+ * Note(s)     : none.
+ *********************************************************************************************************
+ */
+
+
+void UCOS_TmrTickInit (CPU_INT32U tick_rate)
+{
+
+    TmrStepSize = CPU_CLK_TMR_FREQ / tick_rate;
+
+#if (UCOS_ZYNQ_MPSOC_A53_TICK_SECURE_EL3 == DEF_ENABLED)
+    UCOS_IntVectSet (29u,
+                     0u,
+                     0u,
+                     UCOS_TmrTickHandler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn (29u);
+
+    CPU_CP_SET(TmrStepSize, CNTPS_TVAL_EL1);
+    CPU_CP_SET(0x1, CNTPS_CTL_EL1);
+#else
+    UCOS_IntVectSet (30u,
+                     0u,
+                     0u,
+                     UCOS_TmrTickHandler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn (30u);
+
+    CPU_CP_SET(TmrStepSize, CNTP_TVAL_EL0);
+    CPU_CP_SET(0x1, CNTP_CTL_EL0);
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psua53/ucos_osiii_bsp.h b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psua53/ucos_osiii_bsp.h
new file mode 100644
index 0000000..89cd5b6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psua53/ucos_osiii_bsp.h
@@ -0,0 +1,41 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                            KERNEL BSP
+*
+* Filename      : ucos_osiii_bsp.h
+* Version       : V1.01
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+void UCOS_TmrTickInit(CPU_INT32U tick_rate);
diff --git a/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psua53/ucos_osiii_bsp_a.S b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psua53/ucos_osiii_bsp_a.S
new file mode 100644
index 0000000..aa1ff3f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psua53/ucos_osiii_bsp_a.S
@@ -0,0 +1,48 @@
+.text
+
+.global PS8A53_OS_TmrTickHandler
+.global PS8A53_OS_TmrTickInit
+
+PS8A53_OS_TmrTickHandler:
+    STP  x29, x30, [sp, #-16]!
+
+    MRS x0, CNTP_CVAL_EL0
+    LDR x1, =100000
+    ADD x0, x0, x1
+    MSR CNTP_CVAL_EL0, x0
+
+    .global OSTimeTick
+    BL OSTimeTick
+
+    LDP  x29, x30, [sp], #16
+    RET
+
+
+PS8A53_OS_TmrTickInit:
+    STP  x29, x30, [sp, #-16]!
+
+    .global UCOS_IntVectSet
+    MOV x0, #30
+    MOV x1, #0
+    MOV x2, #1
+    LDR x3, =UCOS_TmrTickHandler
+    LDR x4, #0
+    BL UCOS_IntVectSet
+
+    .global UCOS_IntSrcEn
+    MOV x0, #30
+    BL UCOS_IntSrcEn
+
+    //LDR x0, =100000000
+    //MSR CNTFRQ_EL0, x0
+
+    LDR x0, =0x1FFFF
+    MSR CNTP_TVAL_EL0, x0
+    MRS x0, CNTP_CTL_EL0
+    ORR x0, x0, #0x01
+    MSR CNTP_CTL_EL0, x0
+
+    LDP  x29, x30, [sp], #16
+    RET
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psur5/ucos_osiii_bsp.c b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psur5/ucos_osiii_bsp.c
new file mode 100644
index 0000000..02b7b53
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psur5/ucos_osiii_bsp.c
@@ -0,0 +1,136 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                                SYSTICK
+*
+* Filename      : ucos_osiii_bsp.c
+* Version       : V1.20
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
+#include  "ucos_osiii_bsp.h"
+#include  
+#include  
+#include  
+
+
+typedef struct ttcps {
+    CPU_REG32  ClkCtrl;
+    CPU_REG32  RESERVED0[2];
+    CPU_REG32  CtrCtrl;
+    CPU_REG32  RESERVED1[2];
+    CPU_REG32  CtrVal;
+    CPU_REG32  RESERVED2[2];
+    CPU_REG32  IntervalCtrVal;
+    CPU_REG32  RESERVED3[2];
+    CPU_REG32  Match1CtrVal;
+    CPU_REG32  RESERVED4[2];
+    CPU_REG32  Match2CtrVal;
+    CPU_REG32  RESERVED5[2];
+    CPU_REG32  Match3CtrVal;
+    CPU_REG32  RESERVED6[2];
+    CPU_REG32  IntStat;
+    CPU_REG32  RESERVED7[2];
+    CPU_REG32  IntEn;
+    CPU_REG32  RESERVED8[2];
+    CPU_REG32  EventCtrl;
+    CPU_REG32  RESERVED9[2];
+    CPU_REG32  EventReg;
+    CPU_REG32  RESERVED10[2];
+} TTCPS, *TTCPS_PTR;
+
+#define  TTC_TIMER_TICK           ((TTCPS_PTR)(0xFF110000))
+
+
+/*
+*********************************************************************************************************
+*                                       BSP_OS_TmrTickHandler()
+*
+* Description : Interrupt handler for the tick timer
+*
+* Argument(s) : cpu_id     Source core id
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  UCOS_TmrTickHandler(void *p_int_arg, CPU_INT32U cpu_id)
+{
+
+    TTC_TIMER_TICK->IntStat;
+    OSTimeTick();
+}
+
+
+/*
+ *********************************************************************************************************
+ *                                            BSP_OS_TmrTickInit()
+ *
+ * Description : Initialize uC/OS-III's tick source
+ *
+ * Argument(s) : ticks_per_sec              Number of ticks per second.
+ *
+ * Return(s)   : none.
+ *
+ * Caller(s)   : Application.
+ *
+ * Note(s)     : none.
+ *********************************************************************************************************
+ */
+
+void UCOS_TmrTickInit (CPU_INT32U tick_rate)
+{
+
+    UCOS_IntVectSet (68u,
+                     0u,
+                     0u,
+                     UCOS_TmrTickHandler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn (68u);
+
+    TTC_TIMER_TICK->IntervalCtrVal = 100000000 / tick_rate;
+    TTC_TIMER_TICK->IntEn |= DEF_BIT_00;
+    TTC_TIMER_TICK->CtrCtrl |= DEF_BIT_01;
+    TTC_TIMER_TICK->CtrCtrl &= ~DEF_BIT_00;
+}
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psur5/ucos_osiii_bsp.h b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psur5/ucos_osiii_bsp.h
new file mode 100644
index 0000000..5920b0a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_osiii/src/bsp/psur5/ucos_osiii_bsp.h
@@ -0,0 +1,41 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                            KERNEL BSP
+*
+* Filename      : ucos_osiii_bsp.h
+* Version       : V1.20
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+void UCOS_TmrTickInit(CPU_INT32U tick_rate);
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_standalone/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xbasic_types.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xbasic_types.h
new file mode 100644
index 0000000..32bddf0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xbasic_types.h
@@ -0,0 +1,119 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xbasic_types.h
+*
+*
+* @note  Dummy File for backwards compatibility
+*
+
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a adk   1/31/14  Added in bsp common folder for backward compatibility
+* 

+*
+******************************************************************************/
+
+#ifndef XBASIC_TYPES_H	/* prevent circular inclusions */
+#define XBASIC_TYPES_H	/* by using protection macros */
+
+/** @name Legacy types
+ * Deprecated legacy types.
+ * @{
+ */
+typedef unsigned char	Xuint8;		/**< unsigned 8-bit */
+typedef char		Xint8;		/**< signed 8-bit */
+typedef unsigned short	Xuint16;	/**< unsigned 16-bit */
+typedef short		Xint16;		/**< signed 16-bit */
+typedef unsigned long	Xuint32;	/**< unsigned 32-bit */
+typedef long		Xint32;		/**< signed 32-bit */
+typedef float		Xfloat32;	/**< 32-bit floating point */
+typedef double		Xfloat64;	/**< 64-bit double precision FP */
+typedef unsigned long	Xboolean;	/**< boolean (XTRUE or XFALSE) */
+
+#if !defined __XUINT64__
+typedef struct
+{
+	Xuint32 Upper;
+	Xuint32 Lower;
+} Xuint64;
+#endif
+
+/** @name New types
+ * New simple types.
+ * @{
+ */
+#ifndef __KERNEL__
+#ifndef XIL_TYPES_H
+typedef Xuint32         u32;
+typedef Xuint16         u16;
+typedef Xuint8          u8;
+#endif
+#else
+#include 
+#endif
+
+#ifndef TRUE
+#  define TRUE		1U
+#endif
+
+#ifndef FALSE
+#  define FALSE		0U
+#endif
+
+#ifndef NULL
+#define NULL		0U
+#endif
+
+/*
+ * Xilinx NULL, TRUE and FALSE legacy support. Deprecated.
+ * Please use NULL, TRUE and FALSE
+ */
+#define XNULL		NULL
+#define XTRUE		TRUE
+#define XFALSE		FALSE
+
+/*
+ * This file is deprecated and users
+ * should use xil_types.h and xil_assert.h\n\r
+ */
+#warning  The xbasics_type.h file is deprecated and users should use xil_types.h and xil_assert.
+#warning  Please refer the Standalone BSP UG647 for further details
+
+
+#endif	/* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xdebug.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xdebug.h
new file mode 100644
index 0000000..116d991
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xdebug.h
@@ -0,0 +1,32 @@
+#ifndef XDEBUG  /* prevent circular inclusions */
+#define XDEBUG  /* by using protection macros */
+
+#if defined(DEBUG) && !defined(NDEBUG)
+
+#ifndef XDEBUG_WARNING
+#define XDEBUG_WARNING
+#warning DEBUG is enabled
+#endif
+
+int printf(const char *format, ...);
+
+#define XDBG_DEBUG_ERROR             0x00000001U    /* error  condition messages */
+#define XDBG_DEBUG_GENERAL           0x00000002U    /* general debug  messages */
+#define XDBG_DEBUG_ALL               0xFFFFFFFFU    /* all debugging data */
+
+#define xdbg_current_types (XDBG_DEBUG_GENERAL)
+
+#define xdbg_stmnt(x)  x
+
+#define xdbg_printf(type, ...) (((type) & xdbg_current_types) ? printf (__VA_ARGS__) : 0)
+
+
+#else /* defined(DEBUG) && !defined(NDEBUG) */
+
+#define xdbg_stmnt(x)
+
+#define xdbg_printf(...)
+
+#endif /* defined(DEBUG) && !defined(NDEBUG) */
+
+#endif /* XDEBUG */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xenv.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xenv.h
new file mode 100644
index 0000000..4b31bb1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xenv.h
@@ -0,0 +1,187 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xenv.h
+*
+* Defines common services that are typically found in a host operating.
+* environment. This include file simply includes an OS specific file based
+* on the compile-time constant BUILD_ENV_*, where * is the name of the target
+* environment.
+*
+* All services are defined as macros.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00b ch   10/24/02 Added XENV_LINUX
+* 1.00a rmm  04/17/02 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XENV_H /* prevent circular inclusions */
+#define XENV_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Select which target environment we are operating under
+ */
+
+/* VxWorks target environment */
+#if defined XENV_VXWORKS
+#include "xenv_vxworks.h"
+
+/* Linux target environment */
+#elif defined XENV_LINUX
+#include "xenv_linux.h"
+
+/* Unit test environment */
+#elif defined XENV_UNITTEST
+#include "ut_xenv.h"
+
+/* Integration test environment */
+#elif defined XENV_INTTEST
+#include "int_xenv.h"
+
+/* Standalone environment selected */
+#else
+#include "xenv_standalone.h"
+#endif
+
+
+/*
+ * The following comments specify the types and macro wrappers that are
+ * expected to be defined by the target specific header files
+ */
+
+/**************************** Type Definitions *******************************/
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP
+ *
+ * A structure that contains a time stamp used by other time stamp macros
+ * defined below. This structure is processor dependent.
+ */
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_MEM_COPY(void *DestPtr, void *SrcPtr, unsigned Bytes)
+ *
+ * Copies a non-overlapping block of memory.
+ *
+ * @param   DestPtr is the destination address to copy data to.
+ * @param   SrcPtr is the source address to copy data from.
+ * @param   Bytes is the number of bytes to copy.
+ *
+ * @return  None
+ */
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_MEM_FILL(void *DestPtr, char Data, unsigned Bytes)
+ *
+ * Fills an area of memory with constant data.
+ *
+ * @param   DestPtr is the destination address to set.
+ * @param   Data contains the value to set.
+ * @param   Bytes is the number of bytes to set.
+ *
+ * @return  None
+ */
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP_GET(XTIME_STAMP *StampPtr)
+ *
+ * Samples the processor's or external timer's time base counter.
+ *
+ * @param   StampPtr is the storage for the retrieved time stamp.
+ *
+ * @return  None
+ */
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP_DELTA_US(XTIME_STAMP *Stamp1Ptr, XTIME_STAMP* Stamp2Ptr)
+ *
+ * Computes the delta between the two time stamps.
+ *
+ * @param   Stamp1Ptr - First sampled time stamp.
+ * @param   Stamp1Ptr - Sedond sampled time stamp.
+ *
+ * @return  An unsigned int value with units of microseconds.
+ */
+
+/*****************************************************************************/
+/**
+ *
+ * XENV_TIME_STAMP_DELTA_MS(XTIME_STAMP *Stamp1Ptr, XTIME_STAMP* Stamp2Ptr)
+ *
+ * Computes the delta between the two time stamps.
+ *
+ * @param   Stamp1Ptr - First sampled time stamp.
+ * @param   Stamp1Ptr - Sedond sampled time stamp.
+ *
+ * @return  An unsigned int value with units of milliseconds.
+ */
+
+/*****************************************************************************//**
+ *
+ * XENV_USLEEP(unsigned delay)
+ *
+ * Delay the specified number of microseconds.
+ *
+ * @param   delay is the number of microseconds to delay.
+ *
+ * @return  None
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif            /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xenv_standalone.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xenv_standalone.h
new file mode 100644
index 0000000..e0be6ec
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xenv_standalone.h
@@ -0,0 +1,368 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xenv_standalone.h
+*
+* Defines common services specified by xenv.h.
+*
+* @note
+* 	This file is not intended to be included directly by driver code.
+* 	Instead, the generic xenv.h file is intended to be included by driver
+* 	code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a wgr  02/28/07 Added cache handling macros.
+* 1.00a wgr  02/27/07 Simplified code. Deprecated old-style macro names.
+* 1.00a rmm  01/24/06 Implemented XENV_USLEEP. Assume implementation is being
+*                     used under Xilinx standalone BSP.
+* 1.00a xd   11/03/04 Improved support for doxygen.
+* 1.00a rmm  03/21/02 First release
+* 1.00a wgr  03/22/07 Converted to new coding style.
+* 1.00a rpm  06/29/07 Added udelay macro for standalone
+* 1.00a xd   07/19/07 Included xparameters.h as XPAR_ constants are referred
+*                     to in MICROBLAZE section
+* 1.00a ecm  09/19/08 updated for v7.20 of Microblaze, new functionality
+*
+* 

+*
+*
+******************************************************************************/
+
+#ifndef XENV_STANDALONE_H
+#define XENV_STANDALONE_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+/******************************************************************************
+ *
+ * Get the processor dependent includes
+ *
+ ******************************************************************************/
+
+#include 
+
+#if defined __MICROBLAZE__
+#  include "mb_interface.h"
+#  include "xparameters.h"   /* XPAR constants used below in MB section */
+
+#elif defined __PPC__
+#  include "sleep.h"
+#  include "xcache_l.h"      /* also include xcache_l.h for caching macros */
+#endif
+
+/******************************************************************************
+ *
+ * MEMCPY / MEMSET related macros.
+ *
+ * The following are straight forward implementations of memset and memcpy.
+ *
+ * NOTE: memcpy may not work if source and target memory area are overlapping.
+ *
+ ******************************************************************************/
+/*****************************************************************************/
+/**
+ *
+ * Copies a non-overlapping block of memory.
+ *
+ * @param	DestPtr
+ *		Destination address to copy data to.
+ *
+ * @param	SrcPtr
+ * 		Source address to copy data from.
+ *
+ * @param	Bytes
+ * 		Number of bytes to copy.
+ *
+ * @return	None.
+ *
+ * @note
+ * 		The use of XENV_MEM_COPY is deprecated. Use memcpy() instead.
+ *
+ * @note
+ * 		This implemention MAY BREAK work if source and target memory
+ * 		area are overlapping.
+ *
+ *****************************************************************************/
+
+#define XENV_MEM_COPY(DestPtr, SrcPtr, Bytes) \
+	memcpy((void *) DestPtr, (const void *) SrcPtr, (size_t) Bytes)
+
+
+
+/*****************************************************************************/
+/**
+ *
+ * Fills an area of memory with constant data.
+ *
+ * @param	DestPtr
+ *		Destination address to copy data to.
+ *
+ * @param	Data
+ * 		Value to set.
+ *
+ * @param	Bytes
+ * 		Number of bytes to copy.
+ *
+ * @return	None.
+ *
+ * @note
+ * 		The use of XENV_MEM_FILL is deprecated. Use memset() instead.
+ *
+ *****************************************************************************/
+
+#define XENV_MEM_FILL(DestPtr, Data, Bytes) \
+	memset((void *) DestPtr, (s32) Data, (size_t) Bytes)
+
+
+
+/******************************************************************************
+ *
+ * TIME related macros
+ *
+ ******************************************************************************/
+
+/**
+ * A structure that contains a time stamp used by other time stamp macros
+ * defined below. This structure is processor dependent.
+ */
+typedef s32 XENV_TIME_STAMP;
+
+/*****************************************************************************/
+/**
+ *
+ * Time is derived from the 64 bit PPC timebase register
+ *
+ * @param   StampPtr is the storage for the retrieved time stamp.
+ *
+ * @return  None.
+ *
+ * @note
+ *
+ * Signature: void XENV_TIME_STAMP_GET(XTIME_STAMP *StampPtr)
+ * 


+ * This macro must be implemented by the user.
+ *
+ *****************************************************************************/
+#define XENV_TIME_STAMP_GET(StampPtr)
+
+/*****************************************************************************/
+/**
+ *
+ * This macro is not yet implemented and always returns 0.
+ *
+ * @param   Stamp1Ptr is the first sampled time stamp.
+ * @param   Stamp2Ptr is the second sampled time stamp.
+ *
+ * @return  0
+ *
+ * @note
+ *
+ * This macro must be implemented by the user.
+ *
+ *****************************************************************************/
+#define XENV_TIME_STAMP_DELTA_US(Stamp1Ptr, Stamp2Ptr)     (0)
+
+/*****************************************************************************/
+/**
+ *
+ * This macro is not yet implemented and always returns 0.
+ *
+ * @param   Stamp1Ptr is the first sampled time stamp.
+ * @param   Stamp2Ptr is the second sampled time stamp.
+ *
+ * @return  0
+ *
+ * @note
+ *
+ * This macro must be implemented by the user.
+ *
+ *****************************************************************************/
+#define XENV_TIME_STAMP_DELTA_MS(Stamp1Ptr, Stamp2Ptr)     (0)
+
+/*****************************************************************************/
+/**
+ * XENV_USLEEP(unsigned delay)
+ *
+ * Delay the specified number of microseconds. Not implemented without OS
+ * support.
+ *
+ * @param	delay
+ * 		Number of microseconds to delay.
+ *
+ * @return	None.
+ *
+ *****************************************************************************/
+
+#ifdef __PPC__
+#define XENV_USLEEP(delay)	usleep(delay)
+#define udelay(delay)	usleep(delay)
+#else
+#define XENV_USLEEP(delay)
+#define udelay(delay)
+#endif
+
+
+/******************************************************************************
+ *
+ * CACHE handling macros / mappings
+ *
+ ******************************************************************************/
+/******************************************************************************
+ *
+ * Processor independent macros
+ *
+ ******************************************************************************/
+
+#define XCACHE_ENABLE_CACHE()	\
+		{ XCACHE_ENABLE_DCACHE(); XCACHE_ENABLE_ICACHE(); }
+
+#define XCACHE_DISABLE_CACHE()	\
+		{ XCACHE_DISABLE_DCACHE(); XCACHE_DISABLE_ICACHE(); }
+
+
+/******************************************************************************
+ *
+ * MicroBlaze case
+ *
+ * NOTE: Currently the following macros will only work on systems that contain
+ * only ONE MicroBlaze processor. Also, the macros will only be enabled if the
+ * system is built using a xparameters.h file.
+ *
+ ******************************************************************************/
+
+#if defined __MICROBLAZE__
+
+/* Check if MicroBlaze data cache was built into the core.
+ */
+#if (XPAR_MICROBLAZE_USE_DCACHE == 1)
+#  define XCACHE_ENABLE_DCACHE()		microblaze_enable_dcache()
+#  define XCACHE_DISABLE_DCACHE()		microblaze_disable_dcache()
+#  define XCACHE_INVALIDATE_DCACHE()  	microblaze_invalidate_dcache()
+
+#  define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
+			microblaze_invalidate_dcache_range((s32)(Addr), (s32)(Len))
+
+#if (XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK == 1)
+#  define XCACHE_FLUSH_DCACHE()  		microblaze_flush_dcache()
+#  define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
+			microblaze_flush_dcache_range((s32)(Addr), (s32)(Len))
+#else
+#  define XCACHE_FLUSH_DCACHE()  		microblaze_invalidate_dcache()
+#  define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
+			microblaze_invalidate_dcache_range((s32)(Addr), (s32)(Len))
+#endif	/*XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK*/
+
+#else
+#  define XCACHE_ENABLE_DCACHE()
+#  define XCACHE_DISABLE_DCACHE()
+#  define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len)
+#  define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len)
+#endif	/*XPAR_MICROBLAZE_USE_DCACHE*/
+
+
+/* Check if MicroBlaze instruction cache was built into the core.
+ */
+#if (XPAR_MICROBLAZE_USE_ICACHE == 1)
+#  define XCACHE_ENABLE_ICACHE()		microblaze_enable_icache()
+#  define XCACHE_DISABLE_ICACHE()		microblaze_disable_icache()
+
+#  define XCACHE_INVALIDATE_ICACHE()  	microblaze_invalidate_icache()
+
+#  define XCACHE_INVALIDATE_ICACHE_RANGE(Addr, Len) \
+			microblaze_invalidate_icache_range((s32)(Addr), (s32)(Len))
+
+#else
+#  define XCACHE_ENABLE_ICACHE()
+#  define XCACHE_DISABLE_ICACHE()
+#endif	/*XPAR_MICROBLAZE_USE_ICACHE*/
+
+
+/******************************************************************************
+ *
+ * PowerPC case
+ *
+ *   Note that the XCACHE_ENABLE_xxx functions are hardcoded to enable a
+ *   specific memory region (0x80000001). Each bit (0-30) in the regions
+ *   bitmask stands for 128MB of memory. Bit 31 stands for the upper 2GB
+ *   range.
+ *
+ *   regions    --> cached address range
+ *   ------------|--------------------------------------------------
+ *   0x80000000  | [0, 0x7FFFFFF]
+ *   0x00000001  | [0xF8000000, 0xFFFFFFFF]
+ *   0x80000001  | [0, 0x7FFFFFF],[0xF8000000, 0xFFFFFFFF]
+ *
+ ******************************************************************************/
+
+#elif defined __PPC__
+
+#define XCACHE_ENABLE_DCACHE()		XCache_EnableDCache(0x80000001)
+#define XCACHE_DISABLE_DCACHE()		XCache_DisableDCache()
+#define XCACHE_ENABLE_ICACHE()		XCache_EnableICache(0x80000001)
+#define XCACHE_DISABLE_ICACHE()		XCache_DisableICache()
+
+#define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
+		XCache_InvalidateDCacheRange((u32)(Addr), (u32)(Len))
+
+#define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
+		XCache_FlushDCacheRange((u32)(Addr), (u32)(Len))
+
+#define XCACHE_INVALIDATE_ICACHE()	XCache_InvalidateICache()
+
+
+/******************************************************************************
+ *
+ * Unknown processor / architecture
+ *
+ ******************************************************************************/
+
+#else
+/* #error "Unknown processor / architecture. Must be MicroBlaze or PowerPC." */
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* #ifndef XENV_STANDALONE_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_assert.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_assert.c
new file mode 100644
index 0000000..a0b9d66
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_assert.c
@@ -0,0 +1,146 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_assert.c
+*
+* This file contains basic assert related functions for Xilinx software IP.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/14/09 Initial release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+/**
+ * This variable allows testing to be done easier with asserts. An assert
+ * sets this variable such that a driver can evaluate this variable
+ * to determine if an assert occurred.
+ */
+u32 Xil_AssertStatus;
+
+/**
+ * This variable allows the assert functionality to be changed for testing
+ * such that it does not wait infinitely. Use the debugger to disable the
+ * waiting during testing of asserts.
+ */
+/*s32 Xil_AssertWait = 1*/
+
+/* The callback function to be invoked when an assert is taken */
+static Xil_AssertCallback Xil_AssertCallbackRoutine = NULL;
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+*
+* Implement assert. Currently, it calls a user-defined callback function
+* if one has been set.  Then, it potentially enters an infinite loop depending
+* on the value of the Xil_AssertWait variable.
+*
+* @param    file is the name of the filename of the source
+* @param    line is the linenumber within File
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+void Xil_Assert(const char8 *File, s32 Line)
+{
+	s32 Xil_AssertWait = 1;
+	/* if the callback has been set then invoke it */
+	if (Xil_AssertCallbackRoutine != 0) {
+		(*Xil_AssertCallbackRoutine)(File, Line);
+	}
+
+	/* if specified, wait indefinitely such that the assert will show up
+	 * in testing
+	 */
+	while (Xil_AssertWait != 0) {
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* Set up a callback function to be invoked when an assert occurs. If there
+* was already a callback installed, then it is replaced.
+*
+* @param    routine is the callback to be invoked when an assert is taken
+*
+* @return   None.
+*
+* @note     This function has no effect if NDEBUG is set
+*
+******************************************************************************/
+void Xil_AssertSetCallback(Xil_AssertCallback Routine)
+{
+	Xil_AssertCallbackRoutine = Routine;
+}
+
+/*****************************************************************************/
+/**
+*
+* Null handler function. This follows the XInterruptHandler signature for
+* interrupt handlers. It can be used to assign a null handler (a stub) to an
+* interrupt controller vector table.
+*
+* @param    NullParameter is an arbitrary void pointer and not used.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+void XNullHandler(void *NullParameter)
+{
+ (void *) NullParameter;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_assert.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_assert.h
new file mode 100644
index 0000000..02e5f93
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_assert.h
@@ -0,0 +1,189 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_assert.h
+*
+* This file contains assert related functions.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/14/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_ASSERT_H	/* prevent circular inclusions */
+#define XIL_ASSERT_H	/* by using protection macros */
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/***************************** Include Files *********************************/
+
+
+/************************** Constant Definitions *****************************/
+
+#define XIL_ASSERT_NONE     0U
+#define XIL_ASSERT_OCCURRED 1U
+#define XNULL NULL
+
+extern u32 Xil_AssertStatus;
+extern void Xil_Assert(const char8 *File, s32 Line);
+void XNullHandler(void *NullParameter);
+
+/**
+ * This data type defines a callback to be invoked when an
+ * assert occurs. The callback is invoked only when asserts are enabled
+ */
+typedef void (*Xil_AssertCallback) (const char8 *File, s32 Line);
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#ifndef NDEBUG
+
+/*****************************************************************************/
+/**
+* This assert macro is to be used for functions that do not return anything
+* (void). This in conjunction with the Xil_AssertWait boolean can be used to
+* accomodate tests so that asserts which fail allow execution to continue.
+*
+* @param    Expression is the expression to evaluate. If it evaluates to
+*           false, the assert occurs.
+*
+* @return   Returns void unless the Xil_AssertWait variable is true, in which
+*           case no return is made and an infinite loop is entered.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_AssertVoid(Expression)                \
+{                                                  \
+    if (Expression) {                              \
+        Xil_AssertStatus = XIL_ASSERT_NONE;       \
+    } else {                                       \
+        Xil_Assert(__FILE__, __LINE__);            \
+        Xil_AssertStatus = XIL_ASSERT_OCCURRED;   \
+        return;                                    \
+    }                                              \
+}
+
+/*****************************************************************************/
+/**
+* This assert macro is to be used for functions that do return a value. This in
+* conjunction with the Xil_AssertWait boolean can be used to accomodate tests
+* so that asserts which fail allow execution to continue.
+*
+* @param    Expression is the expression to evaluate. If it evaluates to false,
+*           the assert occurs.
+*
+* @return   Returns 0 unless the Xil_AssertWait variable is true, in which
+* 	    case no return is made and an infinite loop is entered.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_AssertNonvoid(Expression)             \
+{                                                  \
+    if (Expression) {                              \
+        Xil_AssertStatus = XIL_ASSERT_NONE;       \
+    } else {                                       \
+        Xil_Assert(__FILE__, __LINE__);            \
+        Xil_AssertStatus = XIL_ASSERT_OCCURRED;   \
+        return 0;                                  \
+    }                                              \
+}
+
+/*****************************************************************************/
+/**
+* Always assert. This assert macro is to be used for functions that do not
+* return anything (void). Use for instances where an assert should always
+* occur.
+*
+* @return Returns void unless the Xil_AssertWait variable is true, in which
+*	  case no return is made and an infinite loop is entered.
+*
+* @note   None.
+*
+******************************************************************************/
+#define Xil_AssertVoidAlways()                   \
+{                                                  \
+   Xil_Assert(__FILE__, __LINE__);                 \
+   Xil_AssertStatus = XIL_ASSERT_OCCURRED;        \
+   return;                                         \
+}
+
+/*****************************************************************************/
+/**
+* Always assert. This assert macro is to be used for functions that do return
+* a value. Use for instances where an assert should always occur.
+*
+* @return Returns void unless the Xil_AssertWait variable is true, in which
+*	  case no return is made and an infinite loop is entered.
+*
+* @note   None.
+*
+******************************************************************************/
+#define Xil_AssertNonvoidAlways()                \
+{                                                  \
+   Xil_Assert(__FILE__, __LINE__);                 \
+   Xil_AssertStatus = XIL_ASSERT_OCCURRED;        \
+   return 0;                                       \
+}
+
+
+#else
+
+#define Xil_AssertVoid(Expression)
+#define Xil_AssertVoidAlways()
+#define Xil_AssertNonvoid(Expression)
+#define Xil_AssertNonvoidAlways()
+
+#endif
+
+/************************** Function Prototypes ******************************/
+
+void Xil_AssertSetCallback(Xil_AssertCallback Routine);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_cache_vxworks.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_cache_vxworks.h
new file mode 100644
index 0000000..fb26242
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_cache_vxworks.h
@@ -0,0 +1,93 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache_vxworks.h
+*
+* Contains the cache related functions for VxWorks that is wrapped by
+* xil_cache.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  12/11/09 Initial release
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+#ifndef XIL_CACHE_VXWORKS_H
+#define XIL_CACHE_VXWORKS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "vxWorks.h"
+#include "vxLib.h"
+#include "sysLibExtra.h"
+#include "cacheLib.h"
+
+#if (CPU_FAMILY==PPC)
+
+#define Xil_DCacheEnable()		cacheEnable(DATA_CACHE)
+
+#define Xil_DCacheDisable()		cacheDisable(DATA_CACHE)
+
+#define Xil_DCacheInvalidateRange(Addr, Len) \
+		cacheInvalidate(DATA_CACHE, (void *)(Addr), (Len))
+
+#define Xil_DCacheFlushRange(Addr, Len) \
+		cacheFlush(DATA_CACHE, (void *)(Addr), (Len))
+
+#define Xil_ICacheEnable()		cacheEnable(INSTRUCTION_CACHE)
+
+#define Xil_ICacheDisable()		cacheDisable(INSTRUCTION_CACHE)
+
+#define Xil_ICacheInvalidateRange(Addr, Len) \
+		cacheInvalidate(INSTRUCTION_CACHE, (void *)(Addr), (Len))
+
+
+#else
+#error "Unknown processor / architecture. Must be PPC for VxWorks."
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_hal.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_hal.h
new file mode 100644
index 0000000..135879f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_hal.h
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_hal.h
+*
+* Contains all the HAL header files.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/28/09 Initial release
+*
+* 

+*
+* @note
+*
+******************************************************************************/
+
+#ifndef XIL_HAL_H
+#define XIL_HAL_H
+
+#include "xil_cache.h"
+#include "xil_io.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+#include "xil_types.h"
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_macroback.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_macroback.h
new file mode 100644
index 0000000..2718b1c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_macroback.h
@@ -0,0 +1,1052 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*********************************************************************/
+/**
+ * @file xil_macroback.h
+ *
+ * This header file is meant to bring back the removed _m macros.
+ * This header file must be included last.
+ * The following macros are not defined here due to the driver change:
+ *   XGpio_mSetDataDirection
+ *   XGpio_mGetDataReg
+ *   XGpio_mSetDataReg
+ *   XIIC_RESET
+ *   XIIC_CLEAR_STATS
+ *   XSpi_mReset
+ *   XSysAce_mSetCfgAddr
+ *   XSysAce_mIsCfgDone
+ *   XTft_mSetPixel
+ *   XTft_mGetPixel
+ *   XWdtTb_mEnableWdt
+ *   XWdtTb_mDisbleWdt
+ *   XWdtTb_mRestartWdt
+ *   XWdtTb_mGetTimebaseReg
+ *   XWdtTb_mHasReset
+ *
+ * Please refer the corresonding driver document for replacement.
+ *
+ *********************************************************************/
+
+#ifndef XIL_MACROBACK_H
+#define XIL_MACROBACK_H
+
+/*********************************************************************/
+/**
+ * Macros for Driver XCan
+ *
+ *********************************************************************/
+#ifndef XCan_mReadReg
+#define XCan_mReadReg XCan_ReadReg
+#endif
+
+#ifndef XCan_mWriteReg
+#define XCan_mWriteReg XCan_WriteReg
+#endif
+
+#ifndef XCan_mIsTxDone
+#define XCan_mIsTxDone XCan_IsTxDone
+#endif
+
+#ifndef XCan_mIsTxFifoFull
+#define XCan_mIsTxFifoFull XCan_IsTxFifoFull
+#endif
+
+#ifndef XCan_mIsHighPriorityBufFull
+#define XCan_mIsHighPriorityBufFull XCan_IsHighPriorityBufFull
+#endif
+
+#ifndef XCan_mIsRxEmpty
+#define XCan_mIsRxEmpty XCan_IsRxEmpty
+#endif
+
+#ifndef XCan_mIsAcceptFilterBusy
+#define XCan_mIsAcceptFilterBusy XCan_IsAcceptFilterBusy
+#endif
+
+#ifndef XCan_mCreateIdValue
+#define XCan_mCreateIdValue XCan_CreateIdValue
+#endif
+
+#ifndef XCan_mCreateDlcValue
+#define XCan_mCreateDlcValue XCan_CreateDlcValue
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XDmaCentral
+ *
+ *********************************************************************/
+#ifndef XDmaCentral_mWriteReg
+#define XDmaCentral_mWriteReg XDmaCentral_WriteReg
+#endif
+
+#ifndef XDmaCentral_mReadReg
+#define XDmaCentral_mReadReg XDmaCentral_ReadReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XDsAdc
+ *
+ *********************************************************************/
+#ifndef XDsAdc_mWriteReg
+#define XDsAdc_mWriteReg XDsAdc_WriteReg
+#endif
+
+#ifndef XDsAdc_mReadReg
+#define XDsAdc_mReadReg XDsAdc_ReadReg
+#endif
+
+#ifndef XDsAdc_mIsEmpty
+#define XDsAdc_mIsEmpty XDsAdc_IsEmpty
+#endif
+
+#ifndef XDsAdc_mSetFstmReg
+#define XDsAdc_mSetFstmReg XDsAdc_SetFstmReg
+#endif
+
+#ifndef XDsAdc_mGetFstmReg
+#define XDsAdc_mGetFstmReg XDsAdc_GetFstmReg
+#endif
+
+#ifndef XDsAdc_mEnableConversion
+#define XDsAdc_mEnableConversion XDsAdc_EnableConversion
+#endif
+
+#ifndef XDsAdc_mDisableConversion
+#define XDsAdc_mDisableConversion XDsAdc_DisableConversion
+#endif
+
+#ifndef XDsAdc_mGetFifoOccyReg
+#define XDsAdc_mGetFifoOccyReg XDsAdc_GetFifoOccyReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XDsDac
+ *
+ *********************************************************************/
+#ifndef XDsDac_mWriteReg
+#define XDsDac_mWriteReg XDsDac_WriteReg
+#endif
+
+#ifndef XDsDac_mReadReg
+#define XDsDac_mReadReg XDsDac_ReadReg
+#endif
+
+#ifndef XDsDac_mIsEmpty
+#define XDsDac_mIsEmpty XDsDac_IsEmpty
+#endif
+
+#ifndef XDsDac_mFifoIsFull
+#define XDsDac_mFifoIsFull XDsDac_FifoIsFull
+#endif
+
+#ifndef XDsDac_mGetVacancy
+#define XDsDac_mGetVacancy XDsDac_GetVacancy
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XEmacLite
+ *
+ *********************************************************************/
+#ifndef XEmacLite_mReadReg
+#define XEmacLite_mReadReg XEmacLite_ReadReg
+#endif
+
+#ifndef XEmacLite_mWriteReg
+#define XEmacLite_mWriteReg XEmacLite_WriteReg
+#endif
+
+#ifndef XEmacLite_mGetTxStatus
+#define XEmacLite_mGetTxStatus XEmacLite_GetTxStatus
+#endif
+
+#ifndef XEmacLite_mSetTxStatus
+#define XEmacLite_mSetTxStatus XEmacLite_SetTxStatus
+#endif
+
+#ifndef XEmacLite_mGetRxStatus
+#define XEmacLite_mGetRxStatus XEmacLite_GetRxStatus
+#endif
+
+#ifndef XEmacLite_mSetRxStatus
+#define XEmacLite_mSetRxStatus XEmacLite_SetRxStatus
+#endif
+
+#ifndef XEmacLite_mIsTxDone
+#define XEmacLite_mIsTxDone XEmacLite_IsTxDone
+#endif
+
+#ifndef XEmacLite_mIsRxEmpty
+#define XEmacLite_mIsRxEmpty XEmacLite_IsRxEmpty
+#endif
+
+#ifndef XEmacLite_mNextTransmitAddr
+#define XEmacLite_mNextTransmitAddr XEmacLite_NextTransmitAddr
+#endif
+
+#ifndef XEmacLite_mNextReceiveAddr
+#define XEmacLite_mNextReceiveAddr XEmacLite_NextReceiveAddr
+#endif
+
+#ifndef XEmacLite_mIsMdioConfigured
+#define XEmacLite_mIsMdioConfigured XEmacLite_IsMdioConfigured
+#endif
+
+#ifndef XEmacLite_mIsLoopbackConfigured
+#define XEmacLite_mIsLoopbackConfigured XEmacLite_IsLoopbackConfigured
+#endif
+
+#ifndef XEmacLite_mGetReceiveDataLength
+#define XEmacLite_mGetReceiveDataLength XEmacLite_GetReceiveDataLength
+#endif
+
+#ifndef XEmacLite_mGetTxActive
+#define XEmacLite_mGetTxActive XEmacLite_GetTxActive
+#endif
+
+#ifndef XEmacLite_mSetTxActive
+#define XEmacLite_mSetTxActive XEmacLite_SetTxActive
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XGpio
+ *
+ *********************************************************************/
+#ifndef XGpio_mWriteReg
+#define XGpio_mWriteReg XGpio_WriteReg
+#endif
+
+#ifndef XGpio_mReadReg
+#define XGpio_mReadReg XGpio_ReadReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XHwIcap
+ *
+ *********************************************************************/
+#ifndef XHwIcap_mFifoWrite
+#define XHwIcap_mFifoWrite XHwIcap_FifoWrite
+#endif
+
+#ifndef XHwIcap_mFifoRead
+#define XHwIcap_mFifoRead XHwIcap_FifoRead
+#endif
+
+#ifndef XHwIcap_mSetSizeReg
+#define XHwIcap_mSetSizeReg XHwIcap_SetSizeReg
+#endif
+
+#ifndef XHwIcap_mGetControlReg
+#define XHwIcap_mGetControlReg XHwIcap_GetControlReg
+#endif
+
+#ifndef XHwIcap_mStartConfig
+#define XHwIcap_mStartConfig XHwIcap_StartConfig
+#endif
+
+#ifndef XHwIcap_mStartReadBack
+#define XHwIcap_mStartReadBack XHwIcap_StartReadBack
+#endif
+
+#ifndef XHwIcap_mGetStatusReg
+#define XHwIcap_mGetStatusReg XHwIcap_GetStatusReg
+#endif
+
+#ifndef XHwIcap_mIsTransferDone
+#define XHwIcap_mIsTransferDone XHwIcap_IsTransferDone
+#endif
+
+#ifndef XHwIcap_mIsDeviceBusy
+#define XHwIcap_mIsDeviceBusy XHwIcap_IsDeviceBusy
+#endif
+
+#ifndef XHwIcap_mIntrGlobalEnable
+#define XHwIcap_mIntrGlobalEnable XHwIcap_IntrGlobalEnable
+#endif
+
+#ifndef XHwIcap_mIntrGlobalDisable
+#define XHwIcap_mIntrGlobalDisable XHwIcap_IntrGlobalDisable
+#endif
+
+#ifndef XHwIcap_mIntrGetStatus
+#define XHwIcap_mIntrGetStatus XHwIcap_IntrGetStatus
+#endif
+
+#ifndef XHwIcap_mIntrDisable
+#define XHwIcap_mIntrDisable XHwIcap_IntrDisable
+#endif
+
+#ifndef XHwIcap_mIntrEnable
+#define XHwIcap_mIntrEnable XHwIcap_IntrEnable
+#endif
+
+#ifndef XHwIcap_mIntrGetEnabled
+#define XHwIcap_mIntrGetEnabled XHwIcap_IntrGetEnabled
+#endif
+
+#ifndef XHwIcap_mIntrClear
+#define XHwIcap_mIntrClear XHwIcap_IntrClear
+#endif
+
+#ifndef XHwIcap_mGetWrFifoVacancy
+#define XHwIcap_mGetWrFifoVacancy XHwIcap_GetWrFifoVacancy
+#endif
+
+#ifndef XHwIcap_mGetRdFifoOccupancy
+#define XHwIcap_mGetRdFifoOccupancy XHwIcap_GetRdFifoOccupancy
+#endif
+
+#ifndef XHwIcap_mSliceX2Col
+#define XHwIcap_mSliceX2Col XHwIcap_SliceX2Col
+#endif
+
+#ifndef XHwIcap_mSliceY2Row
+#define XHwIcap_mSliceY2Row XHwIcap_SliceY2Row
+#endif
+
+#ifndef XHwIcap_mSliceXY2Slice
+#define XHwIcap_mSliceXY2Slice XHwIcap_SliceXY2Slice
+#endif
+
+#ifndef XHwIcap_mReadReg
+#define XHwIcap_mReadReg XHwIcap_ReadReg
+#endif
+
+#ifndef XHwIcap_mWriteReg
+#define XHwIcap_mWriteReg XHwIcap_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XIic
+ *
+ *********************************************************************/
+#ifndef XIic_mReadReg
+#define XIic_mReadReg XIic_ReadReg
+#endif
+
+#ifndef XIic_mWriteReg
+#define XIic_mWriteReg XIic_WriteReg
+#endif
+
+#ifndef XIic_mEnterCriticalRegion
+#define XIic_mEnterCriticalRegion XIic_IntrGlobalDisable
+#endif
+
+#ifndef XIic_mExitCriticalRegion
+#define XIic_mExitCriticalRegion XIic_IntrGlobalEnable
+#endif
+
+#ifndef XIIC_GINTR_DISABLE
+#define XIIC_GINTR_DISABLE XIic_IntrGlobalDisable
+#endif
+
+#ifndef XIIC_GINTR_ENABLE
+#define XIIC_GINTR_ENABLE XIic_IntrGlobalEnable
+#endif
+
+#ifndef XIIC_IS_GINTR_ENABLED
+#define XIIC_IS_GINTR_ENABLED XIic_IsIntrGlobalEnabled
+#endif
+
+#ifndef XIIC_WRITE_IISR
+#define XIIC_WRITE_IISR XIic_WriteIisr
+#endif
+
+#ifndef XIIC_READ_IISR
+#define XIIC_READ_IISR XIic_ReadIisr
+#endif
+
+#ifndef XIIC_WRITE_IIER
+#define XIIC_WRITE_IIER XIic_WriteIier
+#endif
+
+#ifndef XIic_mClearIisr
+#define XIic_mClearIisr XIic_ClearIisr
+#endif
+
+#ifndef XIic_mSend7BitAddress
+#define XIic_mSend7BitAddress XIic_Send7BitAddress
+#endif
+
+#ifndef XIic_mDynSend7BitAddress
+#define XIic_mDynSend7BitAddress XIic_DynSend7BitAddress
+#endif
+
+#ifndef XIic_mDynSendStartStopAddress
+#define XIic_mDynSendStartStopAddress XIic_DynSendStartStopAddress
+#endif
+
+#ifndef XIic_mDynSendStop
+#define XIic_mDynSendStop XIic_DynSendStop
+#endif
+
+#ifndef XIic_mSend10BitAddrByte1
+#define XIic_mSend10BitAddrByte1 XIic_Send10BitAddrByte1
+#endif
+
+#ifndef XIic_mSend10BitAddrByte2
+#define XIic_mSend10BitAddrByte2 XIic_Send10BitAddrByte2
+#endif
+
+#ifndef XIic_mSend7BitAddr
+#define XIic_mSend7BitAddr XIic_Send7BitAddr
+#endif
+
+#ifndef XIic_mDisableIntr
+#define XIic_mDisableIntr XIic_DisableIntr
+#endif
+
+#ifndef XIic_mEnableIntr
+#define XIic_mEnableIntr XIic_EnableIntr
+#endif
+
+#ifndef XIic_mClearIntr
+#define XIic_mClearIntr XIic_ClearIntr
+#endif
+
+#ifndef XIic_mClearEnableIntr
+#define XIic_mClearEnableIntr XIic_ClearEnableIntr
+#endif
+
+#ifndef XIic_mFlushRxFifo
+#define XIic_mFlushRxFifo XIic_FlushRxFifo
+#endif
+
+#ifndef XIic_mFlushTxFifo
+#define XIic_mFlushTxFifo XIic_FlushTxFifo
+#endif
+
+#ifndef XIic_mReadRecvByte
+#define XIic_mReadRecvByte XIic_ReadRecvByte
+#endif
+
+#ifndef XIic_mWriteSendByte
+#define XIic_mWriteSendByte XIic_WriteSendByte
+#endif
+
+#ifndef XIic_mSetControlRegister
+#define XIic_mSetControlRegister XIic_SetControlRegister
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XIntc
+ *
+ *********************************************************************/
+#ifndef XIntc_mMasterEnable
+#define XIntc_mMasterEnable XIntc_MasterEnable
+#endif
+
+#ifndef XIntc_mMasterDisable
+#define XIntc_mMasterDisable XIntc_MasterDisable
+#endif
+
+#ifndef XIntc_mEnableIntr
+#define XIntc_mEnableIntr XIntc_EnableIntr
+#endif
+
+#ifndef XIntc_mDisableIntr
+#define XIntc_mDisableIntr XIntc_DisableIntr
+#endif
+
+#ifndef XIntc_mAckIntr
+#define XIntc_mAckIntr XIntc_AckIntr
+#endif
+
+#ifndef XIntc_mGetIntrStatus
+#define XIntc_mGetIntrStatus XIntc_GetIntrStatus
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XLlDma
+ *
+ *********************************************************************/
+#ifndef XLlDma_mBdRead
+#define XLlDma_mBdRead XLlDma_BdRead
+#endif
+
+#ifndef XLlDma_mBdWrite
+#define XLlDma_mBdWrite XLlDma_BdWrite
+#endif
+
+#ifndef XLlDma_mWriteReg
+#define XLlDma_mWriteReg XLlDma_WriteReg
+#endif
+
+#ifndef XLlDma_mReadReg
+#define XLlDma_mReadReg XLlDma_ReadReg
+#endif
+
+#ifndef XLlDma_mBdClear
+#define XLlDma_mBdClear XLlDma_BdClear
+#endif
+
+#ifndef XLlDma_mBdSetStsCtrl
+#define XLlDma_mBdSetStsCtrl XLlDma_BdSetStsCtrl
+#endif
+
+#ifndef XLlDma_mBdGetStsCtrl
+#define XLlDma_mBdGetStsCtrl XLlDma_BdGetStsCtrl
+#endif
+
+#ifndef XLlDma_mBdSetLength
+#define XLlDma_mBdSetLength XLlDma_BdSetLength
+#endif
+
+#ifndef XLlDma_mBdGetLength
+#define XLlDma_mBdGetLength XLlDma_BdGetLength
+#endif
+
+#ifndef XLlDma_mBdSetId
+#define XLlDma_mBdSetId XLlDma_BdSetId
+#endif
+
+#ifndef XLlDma_mBdGetId
+#define XLlDma_mBdGetId XLlDma_BdGetId
+#endif
+
+#ifndef XLlDma_mBdSetBufAddr
+#define XLlDma_mBdSetBufAddr XLlDma_BdSetBufAddr
+#endif
+
+#ifndef XLlDma_mBdGetBufAddr
+#define XLlDma_mBdGetBufAddr XLlDma_BdGetBufAddr
+#endif
+
+#ifndef XLlDma_mBdGetLength
+#define XLlDma_mBdGetLength XLlDma_BdGetLength
+#endif
+
+#ifndef XLlDma_mGetTxRing
+#define XLlDma_mGetTxRing XLlDma_GetTxRing
+#endif
+
+#ifndef XLlDma_mGetRxRing
+#define XLlDma_mGetRxRing XLlDma_GetRxRing
+#endif
+
+#ifndef XLlDma_mGetCr
+#define XLlDma_mGetCr XLlDma_GetCr
+#endif
+
+#ifndef XLlDma_mSetCr
+#define XLlDma_mSetCr XLlDma_SetCr
+#endif
+
+#ifndef XLlDma_mBdRingCntCalc
+#define XLlDma_mBdRingCntCalc XLlDma_BdRingCntCalc
+#endif
+
+#ifndef XLlDma_mBdRingMemCalc
+#define XLlDma_mBdRingMemCalc XLlDma_BdRingMemCalc
+#endif
+
+#ifndef XLlDma_mBdRingGetCnt
+#define XLlDma_mBdRingGetCnt XLlDma_BdRingGetCnt
+#endif
+
+#ifndef XLlDma_mBdRingGetFreeCnt
+#define XLlDma_mBdRingGetFreeCnt XLlDma_BdRingGetFreeCnt
+#endif
+
+#ifndef XLlDma_mBdRingSnapShotCurrBd
+#define XLlDma_mBdRingSnapShotCurrBd XLlDma_BdRingSnapShotCurrBd
+#endif
+
+#ifndef XLlDma_mBdRingNext
+#define XLlDma_mBdRingNext XLlDma_BdRingNext
+#endif
+
+#ifndef XLlDma_mBdRingPrev
+#define XLlDma_mBdRingPrev XLlDma_BdRingPrev
+#endif
+
+#ifndef XLlDma_mBdRingGetSr
+#define XLlDma_mBdRingGetSr XLlDma_BdRingGetSr
+#endif
+
+#ifndef XLlDma_mBdRingSetSr
+#define XLlDma_mBdRingSetSr XLlDma_BdRingSetSr
+#endif
+
+#ifndef XLlDma_mBdRingGetCr
+#define XLlDma_mBdRingGetCr XLlDma_BdRingGetCr
+#endif
+
+#ifndef XLlDma_mBdRingSetCr
+#define XLlDma_mBdRingSetCr XLlDma_BdRingSetCr
+#endif
+
+#ifndef XLlDma_mBdRingBusy
+#define XLlDma_mBdRingBusy XLlDma_BdRingBusy
+#endif
+
+#ifndef XLlDma_mBdRingIntEnable
+#define XLlDma_mBdRingIntEnable XLlDma_BdRingIntEnable
+#endif
+
+#ifndef XLlDma_mBdRingIntDisable
+#define XLlDma_mBdRingIntDisable XLlDma_BdRingIntDisable
+#endif
+
+#ifndef XLlDma_mBdRingIntGetEnabled
+#define XLlDma_mBdRingIntGetEnabled XLlDma_BdRingIntGetEnabled
+#endif
+
+#ifndef XLlDma_mBdRingGetIrq
+#define XLlDma_mBdRingGetIrq XLlDma_BdRingGetIrq
+#endif
+
+#ifndef XLlDma_mBdRingAckIrq
+#define XLlDma_mBdRingAckIrq XLlDma_BdRingAckIrq
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XMbox
+ *
+ *********************************************************************/
+#ifndef XMbox_mWriteReg
+#define XMbox_mWriteReg XMbox_WriteReg
+#endif
+
+#ifndef XMbox_mReadReg
+#define XMbox_mReadReg XMbox_ReadReg
+#endif
+
+#ifndef XMbox_mWriteMBox
+#define XMbox_mWriteMBox XMbox_WriteMBox
+#endif
+
+#ifndef XMbox_mReadMBox
+#define XMbox_mReadMBox XMbox_ReadMBox
+#endif
+
+#ifndef XMbox_mFSLReadMBox
+#define XMbox_mFSLReadMBox XMbox_FSLReadMBox
+#endif
+
+#ifndef XMbox_mFSLWriteMBox
+#define XMbox_mFSLWriteMBox XMbox_FSLWriteMBox
+#endif
+
+#ifndef XMbox_mFSLIsEmpty
+#define XMbox_mFSLIsEmpty XMbox_FSLIsEmpty
+#endif
+
+#ifndef XMbox_mFSLIsFull
+#define XMbox_mFSLIsFull XMbox_FSLIsFull
+#endif
+
+#ifndef XMbox_mIsEmpty
+#define XMbox_mIsEmpty XMbox_IsEmptyHw
+#endif
+
+#ifndef XMbox_mIsFull
+#define XMbox_mIsFull XMbox_IsFullHw
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XMpmc
+ *
+ *********************************************************************/
+#ifndef XMpmc_mReadReg
+#define XMpmc_mReadReg XMpmc_ReadReg
+#endif
+
+#ifndef XMpmc_mWriteReg
+#define XMpmc_mWriteReg XMpmc_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XMutex
+ *
+ *********************************************************************/
+#ifndef XMutex_mWriteReg
+#define XMutex_mWriteReg XMutex_WriteReg
+#endif
+
+#ifndef XMutex_mReadReg
+#define XMutex_mReadReg XMutex_ReadReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XPcie
+ *
+ *********************************************************************/
+#ifndef XPcie_mReadReg
+#define XPcie_mReadReg XPcie_ReadReg
+#endif
+
+#ifndef XPcie_mWriteReg
+#define XPcie_mWriteReg XPcie_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XSpi
+ *
+ *********************************************************************/
+#ifndef XSpi_mIntrGlobalEnable
+#define XSpi_mIntrGlobalEnable XSpi_IntrGlobalEnable
+#endif
+
+#ifndef XSpi_mIntrGlobalDisable
+#define XSpi_mIntrGlobalDisable XSpi_IntrGlobalDisable
+#endif
+
+#ifndef XSpi_mIsIntrGlobalEnabled
+#define XSpi_mIsIntrGlobalEnabled XSpi_IsIntrGlobalEnabled
+#endif
+
+#ifndef XSpi_mIntrGetStatus
+#define XSpi_mIntrGetStatus XSpi_IntrGetStatus
+#endif
+
+#ifndef XSpi_mIntrClear
+#define XSpi_mIntrClear XSpi_IntrClear
+#endif
+
+#ifndef XSpi_mIntrEnable
+#define XSpi_mIntrEnable XSpi_IntrEnable
+#endif
+
+#ifndef XSpi_mIntrDisable
+#define XSpi_mIntrDisable XSpi_IntrDisable
+#endif
+
+#ifndef XSpi_mIntrGetEnabled
+#define XSpi_mIntrGetEnabled XSpi_IntrGetEnabled
+#endif
+
+#ifndef XSpi_mSetControlReg
+#define XSpi_mSetControlReg XSpi_SetControlReg
+#endif
+
+#ifndef XSpi_mGetControlReg
+#define XSpi_mGetControlReg XSpi_GetControlReg
+#endif
+
+#ifndef XSpi_mGetStatusReg
+#define XSpi_mGetStatusReg XSpi_GetStatusReg
+#endif
+
+#ifndef XSpi_mSetSlaveSelectReg
+#define XSpi_mSetSlaveSelectReg XSpi_SetSlaveSelectReg
+#endif
+
+#ifndef XSpi_mGetSlaveSelectReg
+#define XSpi_mGetSlaveSelectReg XSpi_GetSlaveSelectReg
+#endif
+
+#ifndef XSpi_mEnable
+#define XSpi_mEnable XSpi_Enable
+#endif
+
+#ifndef XSpi_mDisable
+#define XSpi_mDisable XSpi_Disable
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XSysAce
+ *
+ *********************************************************************/
+#ifndef XSysAce_mGetControlReg
+#define XSysAce_mGetControlReg XSysAce_GetControlReg
+#endif
+
+#ifndef XSysAce_mSetControlReg
+#define XSysAce_mSetControlReg XSysAce_SetControlReg
+#endif
+
+#ifndef XSysAce_mOrControlReg
+#define XSysAce_mOrControlReg XSysAce_OrControlReg
+#endif
+
+#ifndef XSysAce_mAndControlReg
+#define XSysAce_mAndControlReg XSysAce_AndControlReg
+#endif
+
+#ifndef XSysAce_mGetErrorReg
+#define XSysAce_mGetErrorReg XSysAce_GetErrorReg
+#endif
+
+#ifndef XSysAce_mGetStatusReg
+#define XSysAce_mGetStatusReg XSysAce_GetStatusReg
+#endif
+
+#ifndef XSysAce_mWaitForLock
+#define XSysAce_mWaitForLock XSysAce_WaitForLock
+#endif
+
+#ifndef XSysAce_mEnableIntr
+#define XSysAce_mEnableIntr XSysAce_EnableIntr
+#endif
+
+#ifndef XSysAce_mDisableIntr
+#define XSysAce_mDisableIntr XSysAce_DisableIntr
+#endif
+
+#ifndef XSysAce_mIsReadyForCmd
+#define XSysAce_mIsReadyForCmd XSysAce_IsReadyForCmd
+#endif
+
+#ifndef XSysAce_mIsMpuLocked
+#define XSysAce_mIsMpuLocked XSysAce_IsMpuLocked
+#endif
+
+#ifndef XSysAce_mIsIntrEnabled
+#define XSysAce_mIsIntrEnabled XSysAce_IsIntrEnabled
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XSysMon
+ *
+ *********************************************************************/
+#ifndef XSysMon_mIsEventSamplingModeSet
+#define XSysMon_mIsEventSamplingModeSet XSysMon_IsEventSamplingModeSet
+#endif
+
+#ifndef XSysMon_mIsDrpBusy
+#define XSysMon_mIsDrpBusy XSysMon_IsDrpBusy
+#endif
+
+#ifndef XSysMon_mIsDrpLocked
+#define XSysMon_mIsDrpLocked XSysMon_IsDrpLocked
+#endif
+
+#ifndef XSysMon_mRawToTemperature
+#define XSysMon_mRawToTemperature XSysMon_RawToTemperature
+#endif
+
+#ifndef XSysMon_mRawToVoltage
+#define XSysMon_mRawToVoltage XSysMon_RawToVoltage
+#endif
+
+#ifndef XSysMon_mTemperatureToRaw
+#define XSysMon_mTemperatureToRaw XSysMon_TemperatureToRaw
+#endif
+
+#ifndef XSysMon_mVoltageToRaw
+#define XSysMon_mVoltageToRaw XSysMon_VoltageToRaw
+#endif
+
+#ifndef XSysMon_mReadReg
+#define XSysMon_mReadReg XSysMon_ReadReg
+#endif
+
+#ifndef XSysMon_mWriteReg
+#define XSysMon_mWriteReg XSysMon_WriteReg
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XTmrCtr
+ *
+ *********************************************************************/
+#ifndef XTimerCtr_mReadReg
+#define XTimerCtr_mReadReg XTimerCtr_ReadReg
+#endif
+
+#ifndef XTmrCtr_mWriteReg
+#define XTmrCtr_mWriteReg XTmrCtr_WriteReg
+#endif
+
+#ifndef XTmrCtr_mSetControlStatusReg
+#define XTmrCtr_mSetControlStatusReg XTmrCtr_SetControlStatusReg
+#endif
+
+#ifndef XTmrCtr_mGetControlStatusReg
+#define XTmrCtr_mGetControlStatusReg XTmrCtr_GetControlStatusReg
+#endif
+
+#ifndef XTmrCtr_mGetTimerCounterReg
+#define XTmrCtr_mGetTimerCounterReg XTmrCtr_GetTimerCounterReg
+#endif
+
+#ifndef XTmrCtr_mSetLoadReg
+#define XTmrCtr_mSetLoadReg XTmrCtr_SetLoadReg
+#endif
+
+#ifndef XTmrCtr_mGetLoadReg
+#define XTmrCtr_mGetLoadReg XTmrCtr_GetLoadReg
+#endif
+
+#ifndef XTmrCtr_mEnable
+#define XTmrCtr_mEnable XTmrCtr_Enable
+#endif
+
+#ifndef XTmrCtr_mDisable
+#define XTmrCtr_mDisable XTmrCtr_Disable
+#endif
+
+#ifndef XTmrCtr_mEnableIntr
+#define XTmrCtr_mEnableIntr XTmrCtr_EnableIntr
+#endif
+
+#ifndef XTmrCtr_mDisableIntr
+#define XTmrCtr_mDisableIntr XTmrCtr_DisableIntr
+#endif
+
+#ifndef XTmrCtr_mLoadTimerCounterReg
+#define XTmrCtr_mLoadTimerCounterReg XTmrCtr_LoadTimerCounterReg
+#endif
+
+#ifndef XTmrCtr_mHasEventOccurred
+#define XTmrCtr_mHasEventOccurred XTmrCtr_HasEventOccurred
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XUartLite
+ *
+ *********************************************************************/
+#ifndef XUartLite_mUpdateStats
+#define XUartLite_mUpdateStats XUartLite_UpdateStats
+#endif
+
+#ifndef XUartLite_mWriteReg
+#define XUartLite_mWriteReg XUartLite_WriteReg
+#endif
+
+#ifndef XUartLite_mReadReg
+#define XUartLite_mReadReg XUartLite_ReadReg
+#endif
+
+#ifndef XUartLite_mClearStats
+#define XUartLite_mClearStats XUartLite_ClearStats
+#endif
+
+#ifndef XUartLite_mSetControlReg
+#define XUartLite_mSetControlReg XUartLite_SetControlReg
+#endif
+
+#ifndef XUartLite_mGetStatusReg
+#define XUartLite_mGetStatusReg XUartLite_GetStatusReg
+#endif
+
+#ifndef XUartLite_mIsReceiveEmpty
+#define XUartLite_mIsReceiveEmpty XUartLite_IsReceiveEmpty
+#endif
+
+#ifndef XUartLite_mIsTransmitFull
+#define XUartLite_mIsTransmitFull XUartLite_IsTransmitFull
+#endif
+
+#ifndef XUartLite_mIsIntrEnabled
+#define XUartLite_mIsIntrEnabled XUartLite_IsIntrEnabled
+#endif
+
+#ifndef XUartLite_mEnableIntr
+#define XUartLite_mEnableIntr XUartLite_EnableIntr
+#endif
+
+#ifndef XUartLite_mDisableIntr
+#define XUartLite_mDisableIntr XUartLite_DisableIntr
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XUartNs550
+ *
+ *********************************************************************/
+#ifndef XUartNs550_mUpdateStats
+#define XUartNs550_mUpdateStats XUartNs550_UpdateStats
+#endif
+
+#ifndef XUartNs550_mReadReg
+#define XUartNs550_mReadReg XUartNs550_ReadReg
+#endif
+
+#ifndef XUartNs550_mWriteReg
+#define XUartNs550_mWriteReg XUartNs550_WriteReg
+#endif
+
+#ifndef XUartNs550_mClearStats
+#define XUartNs550_mClearStats XUartNs550_ClearStats
+#endif
+
+#ifndef XUartNs550_mGetLineStatusReg
+#define XUartNs550_mGetLineStatusReg XUartNs550_GetLineStatusReg
+#endif
+
+#ifndef XUartNs550_mGetLineControlReg
+#define XUartNs550_mGetLineControlReg XUartNs550_GetLineControlReg
+#endif
+
+#ifndef XUartNs550_mSetLineControlReg
+#define XUartNs550_mSetLineControlReg XUartNs550_SetLineControlReg
+#endif
+
+#ifndef XUartNs550_mEnableIntr
+#define XUartNs550_mEnableIntr XUartNs550_EnableIntr
+#endif
+
+#ifndef XUartNs550_mDisableIntr
+#define XUartNs550_mDisableIntr XUartNs550_DisableIntr
+#endif
+
+#ifndef XUartNs550_mIsReceiveData
+#define XUartNs550_mIsReceiveData XUartNs550_IsReceiveData
+#endif
+
+#ifndef XUartNs550_mIsTransmitEmpty
+#define XUartNs550_mIsTransmitEmpty XUartNs550_IsTransmitEmpty
+#endif
+
+/*********************************************************************/
+/**
+ * Macros for Driver XUsb
+ *
+ *********************************************************************/
+#ifndef XUsb_mReadReg
+#define XUsb_mReadReg XUsb_ReadReg
+#endif
+
+#ifndef XUsb_mWriteReg
+#define XUsb_mWriteReg XUsb_WriteReg
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testcache.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testcache.c
new file mode 100644
index 0000000..e4ddc25
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testcache.c
@@ -0,0 +1,366 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testcache.c
+*
+* Contains utility functions to test cache.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/28/09 Initial release
+* 4.1   asa  05/09/14 Ensured that the address uses for cache test is aligned
+*				      cache line.
+* 

+*
+* @note
+*
+* This file contain functions that all operate on HAL.
+*
+******************************************************************************/
+#ifdef __ARM__
+#include "xil_cache.h"
+#include "xil_testcache.h"
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+#ifdef __aarch64__
+#include "xreg_cortexa53.h"
+#else
+#include "xreg_cortexr5.h"
+#endif
+
+#include "xil_types.h"
+
+extern void xil_printf(const char8 *ctrl1, ...);
+
+#define DATA_LENGTH 128
+
+#ifdef __aarch64__
+static INTPTR Data[DATA_LENGTH] __attribute__ ((aligned(64)));
+#else
+static INTPTR Data[DATA_LENGTH] __attribute__ ((aligned(32)));
+#endif
+
+/**
+* Perform DCache range related API test such as Xil_DCacheFlushRange and
+* Xil_DCacheInvalidateRange. This test function writes a constant value
+* to the Data array, flushes the range, writes a new value, then invalidates
+* the corresponding range.
+*
+* @return
+*
+*     - 0 is returned for a pass
+*     - -1 is returned for a failure
+*/
+s32 Xil_TestDCacheRange(void)
+{
+	s32 Index;
+	s32 Status = 0;
+	u32 CtrlReg;
+	INTPTR Value;
+
+	xil_printf("-- Cache Range Test --\n\r");
+
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0xA0A00505;
+
+	xil_printf("    initialize Data done:\r\n");
+
+	Xil_DCacheFlushRange((INTPTR)Data, DATA_LENGTH * sizeof(INTPTR));
+
+	xil_printf("    flush range done\r\n");
+
+	dsb();
+	#ifdef __aarch64__
+			CtrlReg = mfcp(SCTLR_EL3);
+			CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+			mtcp(SCTLR_EL3,CtrlReg);
+	#else
+			CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+			CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+			mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+
+	Status = 0;
+
+	for (Index = 0; Index < DATA_LENGTH; Index++) {
+		Value = Data[Index];
+		if (Value != 0xA0A00505) {
+			Status = -1;
+			xil_printf("Data[%d] = %x\r\n", Index, Value);
+			break;
+		}
+	}
+
+	if (!Status) {
+		xil_printf("	Flush worked\r\n");
+	}
+	else {
+		xil_printf("Error: flush dcache range not working\r\n");
+	}
+	dsb();
+	#ifdef __aarch64__
+			CtrlReg = mfcp(SCTLR_EL3);
+			CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
+			mtcp(SCTLR_EL3,CtrlReg);
+		#else
+			CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+			CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+			mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+		#endif
+	dsb();
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0xA0A0C505;
+
+
+
+	Xil_DCacheFlushRange((INTPTR)Data, DATA_LENGTH * sizeof(INTPTR));
+
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = Index + 3;
+
+	Xil_DCacheInvalidateRange((INTPTR)Data, DATA_LENGTH * sizeof(INTPTR));
+
+	xil_printf("    invalidate dcache range done\r\n");
+	dsb();
+	#ifdef __aarch64__
+			CtrlReg = mfcp(SCTLR_EL3);
+			CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+			mtcp(SCTLR_EL3,CtrlReg);
+	#else
+			CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+			CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+			mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0xA0A0A05;
+	dsb();
+	#ifdef __aarch64__
+			CtrlReg = mfcp(SCTLR_EL3);
+			CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
+			mtcp(SCTLR_EL3,CtrlReg);
+	#else
+			CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+			CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+			mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+
+	Status = 0;
+
+	for (Index = 0; Index < DATA_LENGTH; Index++) {
+		Value = Data[Index];
+		if (Value != 0xA0A0A05) {
+			Status = -1;
+			xil_printf("Data[%d] = %x\r\n", Index, Value);
+			break;
+		}
+	}
+
+
+	if (!Status) {
+		xil_printf("    Invalidate worked\r\n");
+	}
+	else {
+		xil_printf("Error: Invalidate dcache range not working\r\n");
+	}
+	xil_printf("-- Cache Range Test Complete --\r\n");
+	return Status;
+
+}
+
+/**
+* Perform DCache all related API test such as Xil_DCacheFlush and
+* Xil_DCacheInvalidate. This test function writes a constant value
+* to the Data array, flushes the DCache, writes a new value, then invalidates
+* the DCache.
+*
+* @return
+*     - 0 is returned for a pass
+*     - -1 is returned for a failure
+*/
+s32 Xil_TestDCacheAll(void)
+{
+	s32 Index;
+	s32 Status;
+	INTPTR Value;
+	u32 CtrlReg;
+
+	xil_printf("-- Cache All Test --\n\r");
+
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0x50500A0A;
+	xil_printf("    initialize Data done:\r\n");
+
+	Xil_DCacheFlush();
+	xil_printf("    flush all done\r\n");
+	dsb();
+	#ifdef __aarch64__
+		CtrlReg = mfcp(SCTLR_EL3);
+		CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+		mtcp(SCTLR_EL3,CtrlReg);
+	#else
+		CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+		CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+		mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+	Status = 0;
+
+	for (Index = 0; Index < DATA_LENGTH; Index++) {
+		Value = Data[Index];
+
+		if (Value != 0x50500A0A) {
+			Status = -1;
+			xil_printf("Data[%d] = %x\r\n", Index, Value);
+			break;
+		}
+	}
+
+	if (!Status) {
+		xil_printf("    Flush all worked\r\n");
+	}
+	else {
+		xil_printf("Error: Flush dcache all not working\r\n");
+	}
+	dsb();
+	#ifdef __aarch64__
+		CtrlReg = mfcp(SCTLR_EL3);
+		CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
+		mtcp(SCTLR_EL3,CtrlReg);
+	#else
+		CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+			CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+			mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0x505FFA0A;
+
+	Xil_DCacheFlush();
+
+
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = Index + 3;
+
+	Xil_DCacheInvalidate();
+
+	xil_printf("    invalidate all done\r\n");
+	dsb();
+	#ifdef __aarch64__
+		CtrlReg = mfcp(SCTLR_EL3);
+		CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+		mtcp(SCTLR_EL3,CtrlReg);
+	#else
+		CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+		CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+		mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+	for (Index = 0; Index < DATA_LENGTH; Index++)
+		Data[Index] = 0x50CFA0A;
+	dsb();
+	#ifdef __aarch64__
+		CtrlReg = mfcp(SCTLR_EL3);
+		CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
+		mtcp(SCTLR_EL3,CtrlReg);
+	#else
+		CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+		CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+		mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	#endif
+	dsb();
+	Status = 0;
+
+	for (Index = 0; Index < DATA_LENGTH; Index++) {
+		Value = Data[Index];
+		if (Value != 0x50CFA0A) {
+			Status = -1;
+			xil_printf("Data[%d] = %x\r\n", Index, Value);
+			break;
+		}
+	}
+
+	if (!Status) {
+		xil_printf("    Invalidate all worked\r\n");
+	}
+	else {
+			xil_printf("Error: Invalidate dcache all not working\r\n");
+	}
+
+	xil_printf("-- DCache all Test Complete --\n\r");
+
+	return Status;
+}
+
+
+/**
+* Perform Xil_ICacheInvalidateRange() on a few function pointers.
+*
+* @return
+*
+*     - 0 is returned for a pass
+*     The function will hang if it fails.
+*/
+s32 Xil_TestICacheRange(void)
+{
+
+	Xil_ICacheInvalidateRange((INTPTR)Xil_TestICacheRange, 1024);
+	Xil_ICacheInvalidateRange((INTPTR)Xil_TestDCacheRange, 1024);
+	Xil_ICacheInvalidateRange((INTPTR)Xil_TestDCacheAll, 1024);
+
+	xil_printf("-- Invalidate icache range done --\r\n");
+
+	return 0;
+}
+
+/**
+* Perform Xil_ICacheInvalidate().
+*
+* @return
+*
+*     - 0 is returned for a pass
+*     The function will hang if it fails.
+*/
+s32 Xil_TestICacheAll(void)
+{
+	Xil_ICacheInvalidate();
+	xil_printf("-- Invalidate icache all done --\r\n");
+	return 0;
+}
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testcache.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testcache.h
new file mode 100644
index 0000000..ef7f641
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testcache.h
@@ -0,0 +1,63 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testcache.h
+*
+* This file contains utility functions to test cache.
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a hbm  07/29/09 First release
+*
+******************************************************************************/
+
+#ifndef XIL_TESTCACHE_H	/* prevent circular inclusions */
+#define XIL_TESTCACHE_H	/* by using protection macros */
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern s32 Xil_TestDCacheRange(void);
+extern s32 Xil_TestDCacheAll(void);
+extern s32 Xil_TestICacheRange(void);
+extern s32 Xil_TestICacheAll(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testio.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testio.c
new file mode 100644
index 0000000..840f6c0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testio.c
@@ -0,0 +1,301 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testmemend.c
+*
+* Contains the memory test utility functions.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a hbm  08/25/09 First release
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xil_testio.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions ****************************/
+/************************** Function Prototypes *****************************/
+
+
+
+/**
+ *
+ * Endian swap a 16-bit word.
+ * @param	Data is the 16-bit word to be swapped.
+ * @return	The endian swapped value.
+ *
+ */
+static u16 Swap16(u16 Data)
+{
+	return ((Data >> 8U) & 0x00FFU) | ((Data << 8U) & 0xFF00U);
+}
+
+/**
+ *
+ * Endian swap a 32-bit word.
+ * @param	Data is the 32-bit word to be swapped.
+ * @return	The endian swapped value.
+ *
+ */
+static u32 Swap32(u32 Data)
+{
+	u16 Lo16;
+	u16 Hi16;
+
+	u16 Swap16Lo;
+	u16 Swap16Hi;
+
+	Hi16 = (u16)((Data >> 16U) & 0x0000FFFFU);
+	Lo16 = (u16)(Data & 0x0000FFFFU);
+
+	Swap16Lo = Swap16(Lo16);
+	Swap16Hi = Swap16(Hi16);
+
+	return (((u32)(Swap16Lo)) << 16U) | ((u32)Swap16Hi);
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a destructive 8-bit wide register IO test where the register is
+* accessed using Xil_Out8 and Xil_In8, and comparing the reading and writing
+* values.
+*
+* @param	Addr is a pointer to the region of memory to be tested.
+* @param	Length is the Length of the block.
+* @param	Value is the constant used for writting the memory.
+*
+* @return
+*
+* - -1 is returned for a failure
+* - 0 is returned for a pass
+*
+*****************************************************************************/
+
+s32 Xil_TestIO8(u8 *Addr, s32 Length, u8 Value)
+{
+	u8 ValueIn;
+	s32 Index;
+	s32 Status = 0;
+
+	for (Index = 0; Index < Length; Index++) {
+		Xil_Out8((INTPTR)Addr, Value);
+
+		ValueIn = Xil_In8((INTPTR)Addr);
+
+		if ((Value != ValueIn) && (Status == 0)) {
+			Status = -1;
+			break;
+		}
+	}
+	return Status;
+
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a destructive 16-bit wide register IO test. Each location is tested
+* by sequentially writing a 16-bit wide register, reading the register, and
+* comparing value. This function tests three kinds of register IO functions,
+* normal register IO, little-endian register IO, and big-endian register IO.
+* When testing little/big-endian IO, the function performs the following
+* sequence, Xil_Out16LE/Xil_Out16BE, Xil_In16, Compare In-Out values,
+* Xil_Out16, Xil_In16LE/Xil_In16BE, Compare In-Out values. Whether to swap the
+* read-in value before comparing is controlled by the 5th argument.
+*
+* @param	Addr is a pointer to the region of memory to be tested.
+* @param	Length is the Length of the block.
+* @param	Value is the constant used for writting the memory.
+* @param	Kind is the test kind. Acceptable values are:
+*		XIL_TESTIO_DEFAULT, XIL_TESTIO_LE, XIL_TESTIO_BE.
+* @param	Swap indicates whether to byte swap the read-in value.
+*
+* @return
+*
+* - -1 is returned for a failure
+* - 0 is returned for a pass
+*
+*****************************************************************************/
+
+s32 Xil_TestIO16(u16 *Addr, s32 Length, u16 Value, s32 Kind, s32 Swap)
+{
+	u16 *TempAddr16;
+	u16 ValueIn = 0U;
+	s32 Index;
+	TempAddr16 = Addr;
+	Xil_AssertNonvoid(TempAddr16 != NULL);
+
+	for (Index = 0; Index < Length; Index++) {
+		switch (Kind) {
+		case XIL_TESTIO_LE:
+			Xil_Out16LE((INTPTR)TempAddr16, Value);
+			break;
+		case XIL_TESTIO_BE:
+			Xil_Out16BE((INTPTR)TempAddr16, Value);
+			break;
+		default:
+			Xil_Out16((INTPTR)TempAddr16, Value);
+			break;
+		}
+
+		ValueIn = Xil_In16((INTPTR)TempAddr16);
+
+		if ((Kind != 0) && (Swap != 0)) {
+			ValueIn = Swap16(ValueIn);
+		}
+
+		if (Value != ValueIn) {
+			return -1;
+		}
+
+		/* second round */
+		Xil_Out16((INTPTR)TempAddr16, Value);
+
+		switch (Kind) {
+		case XIL_TESTIO_LE:
+			ValueIn = Xil_In16LE((INTPTR)TempAddr16);
+			break;
+		case XIL_TESTIO_BE:
+			ValueIn = Xil_In16BE((INTPTR)TempAddr16);
+			break;
+		default:
+			ValueIn = Xil_In16((INTPTR)TempAddr16);
+			break;
+		}
+
+
+		if ((Kind != 0) && (Swap != 0)) {
+			ValueIn = Swap16(ValueIn);
+		}
+
+		if (Value != ValueIn) {
+			return -1;
+		}
+		TempAddr16 += sizeof(u16);
+	}
+	return 0;
+}
+
+
+/*****************************************************************************/
+/**
+*
+* Perform a destructive 32-bit wide register IO test. Each location is tested
+* by sequentially writing a 32-bit wide regsiter, reading the register, and
+* comparing value. This function tests three kinds of register IO functions,
+* normal register IO, little-endian register IO, and big-endian register IO.
+* When testing little/big-endian IO, the function perform the following
+* sequence, Xil_Out32LE/Xil_Out32BE, Xil_In32, Compare,
+* Xil_Out32, Xil_In32LE/Xil_In32BE, Compare. Whether to swap the read-in value
+* before comparing is controlled by the 5th argument.
+*
+* @param	Addr is a pointer to the region of memory to be tested.
+* @param	Length is the Length of the block.
+* @param	Value is the constant used for writting the memory.
+* @param	Kind is the test kind. Acceptable values are:
+*		XIL_TESTIO_DEFAULT, XIL_TESTIO_LE, XIL_TESTIO_BE.
+* @param	Swap indicates whether to byte swap the read-in value.
+*
+* @return
+*
+* - -1 is returned for a failure
+* - 0 is returned for a pass
+*
+*****************************************************************************/
+s32 Xil_TestIO32(u32 *Addr, s32 Length, u32 Value, s32 Kind, s32 Swap)
+{
+	u32 *TempAddr;
+	u32 ValueIn = 0U;
+	s32 Index;
+	TempAddr = Addr;
+	Xil_AssertNonvoid(TempAddr != NULL);
+
+	for (Index = 0; Index < Length; Index++) {
+		switch (Kind) {
+		case XIL_TESTIO_LE:
+			Xil_Out32LE((INTPTR)TempAddr, Value);
+			break;
+		case XIL_TESTIO_BE:
+			Xil_Out32BE((INTPTR)TempAddr, Value);
+			break;
+		default:
+			Xil_Out32((INTPTR)TempAddr, Value);
+			break;
+		}
+
+		ValueIn = Xil_In32((INTPTR)TempAddr);
+
+		if ((Kind != 0) && (Swap != 0)) {
+			ValueIn = Swap32(ValueIn);
+		}
+
+		if (Value != ValueIn) {
+			return -1;
+		}
+
+		/* second round */
+		Xil_Out32((INTPTR)TempAddr, Value);
+
+
+		switch (Kind) {
+		case XIL_TESTIO_LE:
+			ValueIn = Xil_In32LE((INTPTR)TempAddr);
+			break;
+		case XIL_TESTIO_BE:
+			ValueIn = Xil_In32BE((INTPTR)TempAddr);
+			break;
+		default:
+			ValueIn = Xil_In32((INTPTR)TempAddr);
+			break;
+		}
+
+		if ((Kind != 0) && (Swap != 0)) {
+			ValueIn = Swap32(ValueIn);
+		}
+
+		if (Value != ValueIn) {
+			return -1;
+		}
+		TempAddr += sizeof(u32);
+	}
+	return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testio.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testio.h
new file mode 100644
index 0000000..cb447bd
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testio.h
@@ -0,0 +1,91 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testmemend.h
+*
+* This file contains utility functions to teach endian related memory
+* IO functions.
+*
+* Memory test description
+*
+* A subset of the memory tests can be selected or all of the tests can be run
+* in order. If there is an error detected by a subtest, the test stops and the
+* failure code is returned. Further tests are not run even if all of the tests
+* are selected.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00 hbm  08/05/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TESTIO_H	/* prevent circular inclusions */
+#define XIL_TESTIO_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+
+#define XIL_TESTIO_DEFAULT 	0
+#define XIL_TESTIO_LE		1
+#define XIL_TESTIO_BE		2
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+extern s32 Xil_TestIO8(u8 *Addr, s32 Length, u8 Value);
+extern s32 Xil_TestIO16(u16 *Addr, s32 Length, u16 Value, s32 Kind, s32 Swap);
+extern s32 Xil_TestIO32(u32 *Addr, s32 Length, u32 Value, s32 Kind, s32 Swap);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testmem.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testmem.c
new file mode 100644
index 0000000..4b3a454
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testmem.c
@@ -0,0 +1,882 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testmem.c
+*
+* Contains the memory test utility functions.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a hbm  08/25/09 First release
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xil_testmem.h"
+#include "xil_io.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions ****************************/
+/************************** Function Prototypes *****************************/
+
+static u32 RotateLeft(u32 Input, u8 Width);
+
+/* define ROTATE_RIGHT to give access to this functionality */
+/* #define ROTATE_RIGHT */
+#ifdef ROTATE_RIGHT
+static u32 RotateRight(u32 Input, u8 Width);
+#endif /* ROTATE_RIGHT */
+
+
+/*****************************************************************************/
+/**
+*
+* Perform a destructive 32-bit wide memory test.
+*
+* @param    Addr is a pointer to the region of memory to be tested.
+* @param    Words is the length of the block.
+* @param    Pattern is the constant used for the constant pattern test, if 0,
+*           0xDEADBEEF is used.
+* @param    Subtest is the test selected. See xil_testmem.h for possible
+*	    values.
+*
+* @return
+*
+* - 0 is returned for a pass
+* - -1 is returned for a failure
+*
+* @note
+*
+* Used for spaces where the address range of the region is smaller than
+* the data width. If the memory range is greater than 2 ** Width,
+* the patterns used in XIL_TESTMEM_WALKONES and XIL_TESTMEM_WALKZEROS will
+* repeat on a boundry of a power of two making it more difficult to detect
+* addressing errors. The XIL_TESTMEM_INCREMENT and XIL_TESTMEM_INVERSEADDR
+* tests suffer the same problem. Ideally, if large blocks of memory are to be
+* tested, break them up into smaller regions of memory to allow the test
+* patterns used not to repeat over the region tested.
+*
+*****************************************************************************/
+s32 Xil_TestMem32(u32 *Addr, u32 Words, u32 Pattern, u8 Subtest)
+{
+	u32 I;
+	u32 j;
+	u32 Val;
+	u32 FirtVal;
+	u32 WordMem32;
+	s32 Status = 0;
+
+	Xil_AssertNonvoid(Words != (u32)0);
+	Xil_AssertNonvoid(Subtest <= (u8)XIL_TESTMEM_MAXTEST);
+	Xil_AssertNonvoid(Addr != NULL);
+
+	/*
+	 * variable initialization
+	 */
+	Val = XIL_TESTMEM_INIT_VALUE;
+	FirtVal = XIL_TESTMEM_INIT_VALUE;
+
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INCREMENT)) {
+		/*
+		 * Fill the memory with incrementing
+		 * values starting from 'FirtVal'
+		 */
+		for (I = 0U; I < Words; I++) {
+			*(Addr+I) = Val;
+			Val++;
+		}
+
+		/*
+		 * Restore the reference 'Val' to the
+		 * initial value
+		 */
+		Val = FirtVal;
+
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the incrementing reference
+		 * Val
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			WordMem32 = *(Addr+I);
+
+			if (WordMem32 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+
+			Val++;
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKONES)) {
+		/*
+		 * set up to cycle through all possible initial
+		 * test Patterns for walking ones test
+		 */
+
+		for (j = 0U; j < (u32)32; j++) {
+			/*
+			 * Generate an initial value for walking ones test
+			 * to test for bad data bits
+			 */
+
+			Val = (1U << j);
+
+			/*
+			 * START walking ones test
+			 * Write a one to each data bit indifferent locations
+			 */
+
+			for (I = 0U; I < (u32)32; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = (u32) RotateLeft(Val, 32U);
+			}
+
+			/*
+			 * Restore the reference 'val' to the
+			 * initial value
+			 */
+			Val = 1U << j;
+
+			/* Read the values from each location that was
+			 * written */
+			for (I = 0U; I < (u32)32; I++) {
+				/* read memory location */
+
+				WordMem32 = *(Addr+I);
+
+				if (WordMem32 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+
+				Val = (u32)RotateLeft(Val, 32U);
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKZEROS)) {
+		/*
+		 * set up to cycle through all possible
+		 * initial test Patterns for walking zeros test
+		 */
+
+		for (j = 0U; j < (u32)32; j++) {
+
+			/*
+			 * Generate an initial value for walking ones test
+			 * to test for bad data bits
+			 */
+
+			Val = ~(1U << j);
+
+			/*
+			 * START walking zeros test
+			 * Write a one to each data bit indifferent locations
+			 */
+
+			for (I = 0U; I < (u32)32; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = ~((u32)RotateLeft(~Val, 32U));
+			}
+
+			/*
+			 * Restore the reference 'Val' to the
+			 * initial value
+			 */
+
+			Val = ~(1U << j);
+
+			/* Read the values from each location that was
+			 * written */
+			for (I = 0U; I < (u32)32; I++) {
+				/* read memory location */
+				WordMem32 = *(Addr+I);
+				if (WordMem32 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+				Val = ~((u32)RotateLeft(~Val, 32U));
+			}
+
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INVERSEADDR)) {
+		/* Fill the memory with inverse of address */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			Val = (u32) (~((INTPTR) (&Addr[I])));
+			*(Addr+I) = Val;
+		}
+
+		/*
+		 * Check every word within the words
+		 * of tested memory
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* Read the location */
+			WordMem32 = *(Addr+I);
+			Val = (u32) (~((INTPTR) (&Addr[I])));
+
+			if ((WordMem32 ^ Val) != 0x00000000U) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_FIXEDPATTERN)) {
+		/*
+		 * Generate an initial value for
+		 * memory testing
+		 */
+
+		if (Pattern == (u32)0) {
+			Val = 0xDEADBEEFU;
+		}
+		else {
+			Val = Pattern;
+		}
+
+		/*
+		 * Fill the memory with fixed Pattern
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			*(Addr+I) = Val;
+		}
+
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the fixed Pattern
+		 */
+
+		for (I = 0U; I < Words; I++) {
+
+			/* read memory location */
+
+			WordMem32 = *(Addr+I);
+			if (WordMem32 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+End_Label:
+	return Status;
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a destructive 16-bit wide memory test.
+*
+* @param    Addr is a pointer to the region of memory to be tested.
+* @param    Words is the length of the block.
+* @param    Pattern is the constant used for the constant Pattern test, if 0,
+*           0xDEADBEEF is used.
+* @param    Subtest is the test selected. See xil_testmem.h for possible
+*	    values.
+*
+* @return
+*
+* - -1 is returned for a failure
+* - 0 is returned for a pass
+*
+* @note
+*
+* Used for spaces where the address range of the region is smaller than
+* the data width. If the memory range is greater than 2 ** Width,
+* the patterns used in XIL_TESTMEM_WALKONES and XIL_TESTMEM_WALKZEROS will
+* repeat on a boundry of a power of two making it more difficult to detect
+* addressing errors. The XIL_TESTMEM_INCREMENT and XIL_TESTMEM_INVERSEADDR
+* tests suffer the same problem. Ideally, if large blocks of memory are to be
+* tested, break them up into smaller regions of memory to allow the test
+* patterns used not to repeat over the region tested.
+*
+*****************************************************************************/
+s32 Xil_TestMem16(u16 *Addr, u32 Words, u16 Pattern, u8 Subtest)
+{
+	u32 I;
+	u32 j;
+	u16 Val;
+	u16 FirtVal;
+	u16 WordMem16;
+	s32 Status = 0;
+
+	Xil_AssertNonvoid(Words != (u32)0);
+	Xil_AssertNonvoid(Subtest <= XIL_TESTMEM_MAXTEST);
+	Xil_AssertNonvoid(Addr != NULL);
+
+	/*
+	 * variable initialization
+	 */
+	Val = XIL_TESTMEM_INIT_VALUE;
+	FirtVal = XIL_TESTMEM_INIT_VALUE;
+
+	/*
+	 * selectthe proper Subtest(s)
+	 */
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INCREMENT)) {
+		/*
+		 * Fill the memory with incrementing
+		 * values starting from 'FirtVal'
+		 */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			*(Addr+I) = Val;
+			Val++;
+		}
+		/*
+		 * Restore the reference 'Val' to the
+		 * initial value
+		 */
+		Val = FirtVal;
+
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the incrementing reference val
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem16 = *(Addr+I);
+			if (WordMem16 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+			Val++;
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKONES)) {
+		/*
+		 * set up to cycle through all possible initial test
+		 * Patterns for walking ones test
+		 */
+
+		for (j = 0U; j < (u32)16; j++) {
+			/*
+			 * Generate an initial value for walking ones test
+			 * to test for bad data bits
+			 */
+
+			Val = (u16)((u32)1 << j);
+			/*
+			 * START walking ones test
+			 * Write a one to each data bit indifferent locations
+			 */
+
+			for (I = 0U; I < (u32)16; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = (u16)RotateLeft(Val, 16U);
+			}
+			/*
+			 * Restore the reference 'Val' to the
+			 * initial value
+			 */
+			Val = (u16)((u32)1 << j);
+			/* Read the values from each location that was written */
+			for (I = 0U; I < (u32)16; I++) {
+				/* read memory location */
+				WordMem16 = *(Addr+I);
+				if (WordMem16 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+				Val = (u16)RotateLeft(Val, 16U);
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKZEROS)) {
+		/*
+		 * set up to cycle through all possible initial
+		 * test Patterns for walking zeros test
+		 */
+
+		for (j = 0U; j < (u32)16; j++) {
+			/*
+			 * Generate an initial value for walking ones
+			 * test to test for bad
+			 * data bits
+			 */
+
+			Val = ~(1U << j);
+			/*
+			 * START walking zeros test
+			 * Write a one to each data bit indifferent locations
+			 */
+
+			for (I = 0U; I < (u32)16; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = ~((u16)RotateLeft(~Val, 16U));
+			}
+			/*
+			 * Restore the reference 'Val' to the
+			 * initial value
+			 */
+			Val = ~(1U << j);
+			/* Read the values from each location that was written */
+			for (I = 0U; I < (u32)16; I++) {
+				/* read memory location */
+				WordMem16 = *(Addr+I);
+				if (WordMem16 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+				Val = ~((u16)RotateLeft(~Val, 16U));
+			}
+
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INVERSEADDR)) {
+		/* Fill the memory with inverse of address */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			Val = (u16) (~((INTPTR)(&Addr[I])));
+			*(Addr+I) = Val;
+		}
+		/*
+		 * Check every word within the words
+		 * of tested memory
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem16 = *(Addr+I);
+			Val = (u16) (~((INTPTR) (&Addr[I])));
+			if ((WordMem16 ^ Val) != 0x0000U) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_FIXEDPATTERN)) {
+		/*
+		 * Generate an initial value for
+		 * memory testing
+		 */
+		if (Pattern == (u16)0) {
+			Val = 0xDEADU;
+		}
+		else {
+			Val = Pattern;
+		}
+
+		/*
+		 * Fill the memory with fixed pattern
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			*(Addr+I) = Val;
+		}
+
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the fixed pattern
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem16 = *(Addr+I);
+			if (WordMem16 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+End_Label:
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+*
+* Perform a destructive 8-bit wide memory test.
+*
+* @param    Addr is a pointer to the region of memory to be tested.
+* @param    Words is the length of the block.
+* @param    Pattern is the constant used for the constant pattern test, if 0,
+*           0xDEADBEEF is used.
+* @param    Subtest is the test selected. See xil_testmem.h for possible
+*	    values.
+*
+* @return
+*
+* - -1 is returned for a failure
+* - 0 is returned for a pass
+*
+* @note
+*
+* Used for spaces where the address range of the region is smaller than
+* the data width. If the memory range is greater than 2 ** Width,
+* the patterns used in XIL_TESTMEM_WALKONES and XIL_TESTMEM_WALKZEROS will
+* repeat on a boundry of a power of two making it more difficult to detect
+* addressing errors. The XIL_TESTMEM_INCREMENT and XIL_TESTMEM_INVERSEADDR
+* tests suffer the same problem. Ideally, if large blocks of memory are to be
+* tested, break them up into smaller regions of memory to allow the test
+* patterns used not to repeat over the region tested.
+*
+*****************************************************************************/
+s32 Xil_TestMem8(u8 *Addr, u32 Words, u8 Pattern, u8 Subtest)
+{
+	u32 I;
+	u32 j;
+	u8 Val;
+	u8 FirtVal;
+	u8 WordMem8;
+	s32 Status = 0;
+
+	Xil_AssertNonvoid(Words != (u32)0);
+	Xil_AssertNonvoid(Subtest <= XIL_TESTMEM_MAXTEST);
+	Xil_AssertNonvoid(Addr != NULL);
+
+	/*
+	 * variable initialization
+	 */
+	Val = XIL_TESTMEM_INIT_VALUE;
+	FirtVal = XIL_TESTMEM_INIT_VALUE;
+
+	/*
+	 * select the proper Subtest(s)
+	 */
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INCREMENT)) {
+		/*
+		 * Fill the memory with incrementing
+		 * values starting from 'FirtVal'
+		 */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			*(Addr+I) = Val;
+			Val++;
+		}
+		/*
+		 * Restore the reference 'Val' to the
+		 * initial value
+		 */
+		Val = FirtVal;
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the incrementing reference
+		 * Val
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem8 = *(Addr+I);
+			if (WordMem8 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+			Val++;
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKONES)) {
+		/*
+		 * set up to cycle through all possible initial
+		 * test Patterns for walking ones test
+		 */
+
+		for (j = 0U; j < (u32)8; j++) {
+			/*
+			 * Generate an initial value for walking ones test
+			 * to test for bad data bits
+			 */
+			Val = (u8)((u32)1 << j);
+			/*
+			 * START walking ones test
+			 * Write a one to each data bit indifferent locations
+			 */
+			for (I = 0U; I < (u32)8; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = (u8)RotateLeft(Val, 8U);
+			}
+			/*
+			 * Restore the reference 'Val' to the
+			 * initial value
+			 */
+			Val = (u8)((u32)1 << j);
+			/* Read the values from each location that was written */
+			for (I = 0U; I < (u32)8; I++) {
+				/* read memory location */
+				WordMem8 = *(Addr+I);
+				if (WordMem8 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+				Val = (u8)RotateLeft(Val, 8U);
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_WALKZEROS)) {
+		/*
+		 * set up to cycle through all possible initial test
+		 * Patterns for walking zeros test
+		 */
+
+		for (j = 0U; j < (u32)8; j++) {
+			/*
+			 * Generate an initial value for walking ones test to test
+			 * for bad data bits
+			 */
+			Val = ~(1U << j);
+			/*
+			 * START walking zeros test
+			 * Write a one to each data bit indifferent locations
+			 */
+			for (I = 0U; I < (u32)8; I++) {
+				/* write memory location */
+				*(Addr+I) = Val;
+				Val = ~((u8)RotateLeft(~Val, 8U));
+			}
+			/*
+			 * Restore the reference 'Val' to the
+			 * initial value
+			 */
+			Val = ~(1U << j);
+			/* Read the values from each location that was written */
+			for (I = 0U; I < (u32)8; I++) {
+				/* read memory location */
+				WordMem8 = *(Addr+I);
+				if (WordMem8 != Val) {
+					Status = -1;
+					goto End_Label;
+				}
+
+				Val = ~((u8)RotateLeft(~Val, 8U));
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_INVERSEADDR)) {
+		/* Fill the memory with inverse of address */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			Val = (u8) (~((INTPTR) (&Addr[I])));
+			*(Addr+I) = Val;
+		}
+
+		/*
+		 * Check every word within the words
+		 * of tested memory
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem8 = *(Addr+I);
+			Val = (u8) (~((INTPTR) (&Addr[I])));
+			if ((WordMem8 ^ Val) != 0x00U) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+	if((Subtest == XIL_TESTMEM_ALLMEMTESTS) || (Subtest == XIL_TESTMEM_FIXEDPATTERN)) {
+		/*
+		 * Generate an initial value for
+		 * memory testing
+		 */
+
+		if (Pattern == (u8)0) {
+			Val = 0xA5U;
+		}
+		else {
+			Val = Pattern;
+		}
+		/*
+		 * Fill the memory with fixed Pattern
+		 */
+		for (I = 0U; I < Words; I++) {
+			/* write memory location */
+			*(Addr+I) = Val;
+		}
+		/*
+		 * Check every word within the words
+		 * of tested memory and compare it
+		 * with the fixed Pattern
+		 */
+
+		for (I = 0U; I < Words; I++) {
+			/* read memory location */
+			WordMem8 = *(Addr+I);
+			if (WordMem8 != Val) {
+				Status = -1;
+				goto End_Label;
+			}
+		}
+	}
+
+End_Label:
+	return Status;
+}
+
+
+/*****************************************************************************/
+/**
+*
+* Rotates the provided value to the left one bit position
+*
+* @param    Input is value to be rotated to the left
+* @param    Width is the number of bits in the input data
+*
+* @return
+*
+* The resulting unsigned long value of the rotate left
+*
+* @note
+*
+* None.
+*
+*****************************************************************************/
+static u32 RotateLeft(u32 Input, u8 Width)
+{
+	u32 Msb;
+	u32 ReturnVal;
+	u32 WidthMask;
+	u32 MsbMask;
+	u32 LocalInput = Input;
+
+	/*
+	 * set up the WidthMask and the MsbMask
+	 */
+
+	MsbMask = 1U << (Width - 1U);
+
+	WidthMask = (MsbMask << (u32)1) - (u32)1;
+
+	/*
+	 * set the Width of the Input to the correct width
+	 */
+
+	LocalInput = LocalInput & WidthMask;
+
+	Msb = LocalInput & MsbMask;
+
+	ReturnVal = LocalInput << 1U;
+
+	if (Msb != 0x00000000U) {
+		ReturnVal = ReturnVal | (u32)0x00000001;
+	}
+
+	ReturnVal = ReturnVal & WidthMask;
+
+	return ReturnVal;
+
+}
+
+#ifdef ROTATE_RIGHT
+/*****************************************************************************/
+/**
+*
+* Rotates the provided value to the right one bit position
+*
+* @param    Input is value to be rotated to the right
+* @param    Width is the number of bits in the input data
+*
+* @return
+*
+* The resulting u32 value of the rotate right
+*
+* @note
+*
+* None.
+*
+*****************************************************************************/
+static u32 RotateRight(u32 Input, u8 Width)
+{
+	u32 Lsb;
+	u32 ReturnVal;
+	u32 WidthMask;
+	u32 MsbMask;
+	u32 LocalInput = Input;
+	/*
+	 * set up the WidthMask and the MsbMask
+	 */
+
+	MsbMask = 1U << (Width - 1U);
+
+	WidthMask = (MsbMask << 1U) - 1U;
+
+	/*
+	 * set the width of the input to the correct width
+	 */
+
+	LocalInput = LocalInput & WidthMask;
+
+	ReturnVal = LocalInput >> 1U;
+
+	Lsb = LocalInput & 0x00000001U;
+
+	if (Lsb != 0x00000000U) {
+		ReturnVal = ReturnVal | MsbMask;
+	}
+
+	ReturnVal = ReturnVal & WidthMask;
+
+	return ReturnVal;
+
+}
+#endif /* ROTATE_RIGHT */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testmem.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testmem.h
new file mode 100644
index 0000000..f88551b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testmem.h
@@ -0,0 +1,162 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_testmem.h
+*
+* This file contains utility functions to test memory.
+*
+* Memory test description
+*
+* A subset of the memory tests can be selected or all of the tests can be run
+* in order. If there is an error detected by a subtest, the test stops and the
+* failure code is returned. Further tests are not run even if all of the tests
+* are selected.
+*
+* Subtest descriptions:
+* 
+* XIL_TESTMEM_ALLMEMTESTS:
+*       Runs all of the following tests
+*
+* XIL_TESTMEM_INCREMENT:
+*       Incrementing Value Test.
+*       This test starts at 'XIL_TESTMEM_INIT_VALUE' and uses the
+*	incrementing value as the test value for memory.
+*
+* XIL_TESTMEM_WALKONES:
+*       Walking Ones Test.
+*       This test uses a walking '1' as the test value for memory.
+*       location 1 = 0x00000001
+*       location 2 = 0x00000002
+*       ...
+*
+* XIL_TESTMEM_WALKZEROS:
+*       Walking Zero's Test.
+*       This test uses the inverse value of the walking ones test
+*       as the test value for memory.
+*       location 1 = 0xFFFFFFFE
+*       location 2 = 0xFFFFFFFD
+*       ...
+*
+* XIL_TESTMEM_INVERSEADDR:
+*       Inverse Address Test.
+*       This test uses the inverse of the address of the location under test
+*       as the test value for memory.
+*
+* XIL_TESTMEM_FIXEDPATTERN:
+*       Fixed Pattern Test.
+*       This test uses the provided patters as the test value for memory.
+*       If zero is provided as the pattern the test uses '0xDEADBEEF".
+* 

+*
+* WARNING
+*
+* The tests are DESTRUCTIVE. Run before any initialized memory spaces
+* have been set up.
+*
+* The address provided to the memory tests is not checked for
+* validity except for the NULL case. It is possible to provide a code-space
+* pointer for this test to start with and ultimately destroy executable code
+* causing random failures.
+*
+* @note
+*
+* Used for spaces where the address range of the region is smaller than
+* the data width. If the memory range is greater than 2 ** width,
+* the patterns used in XIL_TESTMEM_WALKONES and XIL_TESTMEM_WALKZEROS will
+* repeat on a boundry of a power of two making it more difficult to detect
+* addressing errors. The XIL_TESTMEM_INCREMENT and XIL_TESTMEM_INVERSEADDR
+* tests suffer the same problem. Ideally, if large blocks of memory are to be
+* tested, break them up into smaller regions of memory to allow the test
+* patterns used not to repeat over the region tested.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who    Date    Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a hbm  08/25/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TESTMEM_H	/* prevent circular inclusions */
+#define XIL_TESTMEM_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+/* xutil_memtest defines */
+
+#define XIL_TESTMEM_INIT_VALUE	1U
+
+/** @name Memory subtests
+ * @{
+ */
+/**
+ * See the detailed description of the subtests in the file description.
+ */
+#define XIL_TESTMEM_ALLMEMTESTS     0x00U
+#define XIL_TESTMEM_INCREMENT       0x01U
+#define XIL_TESTMEM_WALKONES        0x02U
+#define XIL_TESTMEM_WALKZEROS       0x03U
+#define XIL_TESTMEM_INVERSEADDR     0x04U
+#define XIL_TESTMEM_FIXEDPATTERN    0x05U
+#define XIL_TESTMEM_MAXTEST         XIL_TESTMEM_FIXEDPATTERN
+/* @} */
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+/* xutil_testmem prototypes */
+
+extern s32 Xil_TestMem32(u32 *Addr, u32 Words, u32 Pattern, u8 Subtest);
+extern s32 Xil_TestMem16(u16 *Addr, u32 Words, u16 Pattern, u8 Subtest);
+extern s32 Xil_TestMem8(u8 *Addr, u32 Words, u8 Pattern, u8 Subtest);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_types.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_types.h
new file mode 100644
index 0000000..570dea5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_types.h
@@ -0,0 +1,200 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_types.h
+*
+* This file contains basic types for Xilinx software IP.
+
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00a hbm  07/14/09 First release
+* 3.03a sdm  05/30/11 Added Xuint64 typedef and XUINT64_MSW/XUINT64_LSW macros
+* 5.00 	pkp  05/29/14 Made changes for 64 bit architecture
+*	srt  07/14/14 Use standard definitions from stdint.h and stddef.h
+*		      Define LONG and ULONG datatypes and mask values
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_TYPES_H	/* prevent circular inclusions */
+#define XIL_TYPES_H	/* by using protection macros */
+
+#include 
+#include 
+
+/************************** Constant Definitions *****************************/
+
+#ifndef TRUE
+#  define TRUE		1U
+#endif
+
+#ifndef FALSE
+#  define FALSE		0U
+#endif
+
+#ifndef NULL
+#define NULL		0U
+#endif
+
+#define XIL_COMPONENT_IS_READY     0x11111111U  /**< component has been initialized */
+#define XIL_COMPONENT_IS_STARTED   0x22222222U  /**< component has been started */
+
+/** @name New types
+ * New simple types.
+ * @{
+ */
+#ifndef __KERNEL__
+#ifndef XBASIC_TYPES_H
+/**
+ * guarded against xbasic_types.h.
+ */
+typedef uint8_t u8;
+typedef uint16_t u16;
+typedef uint32_t u32;
+
+#define __XUINT64__
+typedef struct
+{
+	u32 Upper;
+	u32 Lower;
+} Xuint64;
+
+
+/*****************************************************************************/
+/**
+* Return the most significant half of the 64 bit data type.
+*
+* @param    x is the 64 bit word.
+*
+* @return   The upper 32 bits of the 64 bit word.
+*
+* @note     None.
+*
+******************************************************************************/
+#define XUINT64_MSW(x) ((x).Upper)
+
+/*****************************************************************************/
+/**
+* Return the least significant half of the 64 bit data type.
+*
+* @param    x is the 64 bit word.
+*
+* @return   The lower 32 bits of the 64 bit word.
+*
+* @note     None.
+*
+******************************************************************************/
+#define XUINT64_LSW(x) ((x).Lower)
+
+#endif /* XBASIC_TYPES_H */
+
+/**
+ * xbasic_types.h does not typedef s* or u64
+ */
+
+typedef char char8;
+typedef int8_t s8;
+typedef int16_t s16;
+typedef int32_t s32;
+typedef int64_t s64;
+typedef uint64_t u64;
+typedef int sint32;
+
+typedef intptr_t INTPTR;
+typedef uintptr_t UINTPTR;
+typedef ptrdiff_t PTRDIFF;
+
+#if !defined(LONG) || !defined(ULONG)
+typedef long LONG;
+typedef unsigned long ULONG;
+#endif
+
+#define ULONG64_HI_MASK	0xFFFFFFFF00000000U
+#define ULONG64_LO_MASK	~ULONG64_HI_MASK
+
+#else
+#include 
+#endif
+
+
+/**
+ * This data type defines an interrupt handler for a device.
+ * The argument points to the instance of the component
+ */
+typedef void (*XInterruptHandler) (void *InstancePtr);
+
+/**
+ * This data type defines an exception handler for a processor.
+ * The argument points to the instance of the component
+ */
+typedef void (*XExceptionHandler) (void *InstancePtr);
+
+/**
+ * UPPER_32_BITS - return bits 32-63 of a number
+ * @n: the number we're accessing
+ *
+ * A basic shift-right of a 64- or 32-bit quantity.  Use this to suppress
+ * the "right shift count >= width of type" warning when that quantity is
+ * 32-bits.
+ */
+#define UPPER_32_BITS(n) ((u32)(((n) >> 16) >> 16))
+
+/**
+ * LOWER_32_BITS - return bits 0-31 of a number
+ * @n: the number we're accessing
+ */
+#define LOWER_32_BITS(n) ((u32)(n))
+
+/*@}*/
+
+
+/************************** Constant Definitions *****************************/
+
+#ifndef TRUE
+#define TRUE		1U
+#endif
+
+#ifndef FALSE
+#define FALSE		0U
+#endif
+
+#ifndef NULL
+#define NULL		0U
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xplatform_info.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xplatform_info.c
new file mode 100644
index 0000000..276efdc
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xplatform_info.c
@@ -0,0 +1,109 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xplatform_info.c
+*
+* This file contains information about hardware for which the code is built
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 5.00  pkp  12/15/14 Initial release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xplatform_info.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+*
+* This API is used to provide information about platform
+*
+* @param    None.
+*
+* @return   The information about platform defined in xplatform_info.h
+*
+* @note     None.
+*
+******************************************************************************/
+u32 XGetPlatform_Info()
+{
+	u32 reg;
+#if defined (ARMR5) || (__aarch64__)
+	return XPLAT_ZYNQ_ULTRA_MP;
+#elif (__microblaze__)
+	return XPLAT_MICROBLAZE;
+#else
+	return XPLAT_ZYNQ;
+#endif
+}
+
+/*****************************************************************************/
+/**
+*
+* This API is used to provide information about zynq ultrascale MP platform
+*
+* @param    None.
+*
+* @return   The information about zynq ultrascale MP platform defined in
+*			xplatform_info.h
+*
+* @note     None.
+*
+******************************************************************************/
+#if defined (ARMR5) || (__aarch64__)
+u32 XGet_Zynq_UltraMp_Platform_info()
+{
+	u32 reg;
+	reg = ((Xil_In32(XPAR_CSU_BASEADDR + XPAR_CSU_VER_OFFSET) >> 12U )& XPLAT_INFO_MASK);
+	return reg;
+}
+#endif
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xplatform_info.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xplatform_info.h
new file mode 100644
index 0000000..e64acfb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xplatform_info.h
@@ -0,0 +1,81 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xplatform_info.h
+*
+* This file contains definitions for various platforms available
+*
+******************************************************************************/
+
+#ifndef XPLATFORM_INFO_H		/* prevent circular inclusions */
+#define XPLATFORM_INFO_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+#define XPAR_CSU_BASEADDR 0xFFCA0000U
+#define	XPAR_CSU_VER_OFFSET 0x00000044U
+
+#define XPLAT_ZYNQ_ULTRA_MP 0x1
+#define XPLAT_ZYNQ_ULTRA_MPVEL 0x2
+#define XPLAT_ZYNQ_ULTRA_MPQEMU 0x3
+#define XPLAT_ZYNQ 0x4
+#define XPLAT_MICROBLAZE 0x5
+
+#define XPLAT_INFO_MASK (0xF)
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+u32 XGetPlatform_Info();
+
+#if defined (ARMR5) || (__aarch64__)
+u32 XGet_Zynq_UltraMp_Platform_info();
+#endif
+/************************** Function Prototypes ******************************/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xstatus.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xstatus.h
new file mode 100644
index 0000000..9c6e16e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/common/xstatus.h
@@ -0,0 +1,535 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xstatus.h
+*
+* @addtogroup common_status_codes Xilinx® software status codes
+*
+* The xstatus.h file contains the Xilinx® software status codes.These codes are
+* used throughout the Xilinx device drivers.
+*
+* @{
+******************************************************************************/
+
+#ifndef XSTATUS_H		/* prevent circular inclusions */
+#define XSTATUS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/*********************** Common statuses 0 - 500 *****************************/
+/**
+@name Common Status Codes for All Device Drivers
+@{
+*/
+#define XST_SUCCESS                     0L
+#define XST_FAILURE                     1L
+#define XST_DEVICE_NOT_FOUND            2L
+#define XST_DEVICE_BLOCK_NOT_FOUND      3L
+#define XST_INVALID_VERSION             4L
+#define XST_DEVICE_IS_STARTED           5L
+#define XST_DEVICE_IS_STOPPED           6L
+#define XST_FIFO_ERROR                  7L	/*!< An error occurred during an
+						   operation with a FIFO such as
+						   an underrun or overrun, this
+						   error requires the device to
+						   be reset */
+#define XST_RESET_ERROR                 8L	/*!< An error occurred which requires
+						   the device to be reset */
+#define XST_DMA_ERROR                   9L	/*!< A DMA error occurred, this error
+						   typically requires the device
+						   using the DMA to be reset */
+#define XST_NOT_POLLED                  10L	/*!< The device is not configured for
+						   polled mode operation */
+#define XST_FIFO_NO_ROOM                11L	/*!< A FIFO did not have room to put
+						   the specified data into */
+#define XST_BUFFER_TOO_SMALL            12L	/*!< The buffer is not large enough
+						   to hold the expected data */
+#define XST_NO_DATA                     13L	/*!< There was no data available */
+#define XST_REGISTER_ERROR              14L	/*!< A register did not contain the
+						   expected value */
+#define XST_INVALID_PARAM               15L	/*!< An invalid parameter was passed
+						   into the function */
+#define XST_NOT_SGDMA                   16L	/*!< The device is not configured for
+						   scatter-gather DMA operation */
+#define XST_LOOPBACK_ERROR              17L	/*!< A loopback test failed */
+#define XST_NO_CALLBACK                 18L	/*!< A callback has not yet been
+						   registered */
+#define XST_NO_FEATURE                  19L	/*!< Device is not configured with
+						   the requested feature */
+#define XST_NOT_INTERRUPT               20L	/*!< Device is not configured for
+						   interrupt mode operation */
+#define XST_DEVICE_BUSY                 21L	/*!< Device is busy */
+#define XST_ERROR_COUNT_MAX             22L	/*!< The error counters of a device
+						   have maxed out */
+#define XST_IS_STARTED                  23L	/*!< Used when part of device is
+						   already started i.e.
+						   sub channel */
+#define XST_IS_STOPPED                  24L	/*!< Used when part of device is
+						   already stopped i.e.
+						   sub channel */
+#define XST_DATA_LOST                   26L	/*!< Driver defined error */
+#define XST_RECV_ERROR                  27L	/*!< Generic receive error */
+#define XST_SEND_ERROR                  28L	/*!< Generic transmit error */
+#define XST_NOT_ENABLED                 29L	/*!< A requested service is not
+						   available because it has not
+						   been enabled */
+/** @} */
+/***************** Utility Component statuses 401 - 500  *********************/
+/**
+@name Utility Component Status Codes 401 - 500
+@{
+*/
+#define XST_MEMTEST_FAILED              401L	/*!< Memory test failed */
+
+/** @} */
+/***************** Common Components statuses 501 - 1000 *********************/
+/**
+@name Packet Fifo Status Codes 501 - 510
+@{
+*/
+/********************* Packet Fifo statuses 501 - 510 ************************/
+
+#define XST_PFIFO_LACK_OF_DATA          501L	/*!< Not enough data in FIFO   */
+#define XST_PFIFO_NO_ROOM               502L	/*!< Not enough room in FIFO   */
+#define XST_PFIFO_BAD_REG_VALUE         503L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_PFIFO_ERROR                 504L	/*!< Generic packet FIFO error */
+#define XST_PFIFO_DEADLOCK              505L	/*!< Packet FIFO is reporting
+						 * empty and full simultaneously
+						 */
+/** @} */
+/**
+@name DMA Status Codes 511 - 530
+@{
+*/
+/************************** DMA statuses 511 - 530 ***************************/
+
+#define XST_DMA_TRANSFER_ERROR          511L	/*!< Self test, DMA transfer
+						   failed */
+#define XST_DMA_RESET_REGISTER_ERROR    512L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_DMA_SG_LIST_EMPTY           513L	/*!< Scatter gather list contains
+						   no buffer descriptors ready
+						   to be processed */
+#define XST_DMA_SG_IS_STARTED           514L	/*!< Scatter gather not stopped */
+#define XST_DMA_SG_IS_STOPPED           515L	/*!< Scatter gather not running */
+#define XST_DMA_SG_LIST_FULL            517L	/*!< All the buffer desciptors of
+						   the scatter gather list are
+						   being used */
+#define XST_DMA_SG_BD_LOCKED            518L	/*!< The scatter gather buffer
+						   descriptor which is to be
+						   copied over in the scatter
+						   list is locked */
+#define XST_DMA_SG_NOTHING_TO_COMMIT    519L	/*!< No buffer descriptors have been
+						   put into the scatter gather
+						   list to be commited */
+#define XST_DMA_SG_COUNT_EXCEEDED       521L	/*!< The packet count threshold
+						   specified was larger than the
+						   total # of buffer descriptors
+						   in the scatter gather list */
+#define XST_DMA_SG_LIST_EXISTS          522L	/*!< The scatter gather list has
+						   already been created */
+#define XST_DMA_SG_NO_LIST              523L	/*!< No scatter gather list has
+						   been created */
+#define XST_DMA_SG_BD_NOT_COMMITTED     524L	/*!< The buffer descriptor which was
+						   being started was not committed
+						   to the list */
+#define XST_DMA_SG_NO_DATA              525L	/*!< The buffer descriptor to start
+						   has already been used by the
+						   hardware so it can't be reused
+						 */
+#define XST_DMA_SG_LIST_ERROR           526L	/*!< General purpose list access
+						   error */
+#define XST_DMA_BD_ERROR                527L	/*!< General buffer descriptor
+						   error */
+/** @} */
+/**
+@name IPIF Status Codes Codes 531 - 550
+@{
+*/
+/************************** IPIF statuses 531 - 550 ***************************/
+
+#define XST_IPIF_REG_WIDTH_ERROR        531L	/*!< An invalid register width
+						   was passed into the function */
+#define XST_IPIF_RESET_REGISTER_ERROR   532L	/*!< The value of a register at
+						   reset was not valid */
+#define XST_IPIF_DEVICE_STATUS_ERROR    533L	/*!< A write to the device interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_DEVICE_ACK_ERROR       534L	/*!< The device interrupt status
+						   register did not reset when
+						   acked */
+#define XST_IPIF_DEVICE_ENABLE_ERROR    535L	/*!< The device interrupt enable
+						   register was not updated when
+						   other registers changed */
+#define XST_IPIF_IP_STATUS_ERROR        536L	/*!< A write to the IP interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_IP_ACK_ERROR           537L	/*!< The IP interrupt status register
+						   did not reset when acked */
+#define XST_IPIF_IP_ENABLE_ERROR        538L	/*!< IP interrupt enable register was
+						   not updated correctly when other
+						   registers changed */
+#define XST_IPIF_DEVICE_PENDING_ERROR   539L	/*!< The device interrupt pending
+						   register did not indicate the
+						   expected value */
+#define XST_IPIF_DEVICE_ID_ERROR        540L	/*!< The device interrupt ID register
+						   did not indicate the expected
+						   value */
+#define XST_IPIF_ERROR                  541L	/*!< Generic ipif error */
+/** @} */
+
+/****************** Device specific statuses 1001 - 4095 *********************/
+/**
+@name Ethernet Status Codes 1001 - 1050
+@{
+*/
+/********************* Ethernet statuses 1001 - 1050 *************************/
+
+#define XST_EMAC_MEMORY_SIZE_ERROR  1001L	/*!< Memory space is not big enough
+						 * to hold the minimum number of
+						 * buffers or descriptors */
+#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L	/*!< Memory allocation failed */
+#define XST_EMAC_MII_READ_ERROR     1003L	/*!< MII read error */
+#define XST_EMAC_MII_BUSY           1004L	/*!< An MII operation is in progress */
+#define XST_EMAC_OUT_OF_BUFFERS     1005L	/*!< Driver is out of buffers */
+#define XST_EMAC_PARSE_ERROR        1006L	/*!< Invalid driver init string */
+#define XST_EMAC_COLLISION_ERROR    1007L	/*!< Excess deferral or late
+						 * collision on polled send */
+/** @} */
+/**
+@name UART Status Codes 1051 - 1075
+@{
+*/
+/*********************** UART statuses 1051 - 1075 ***************************/
+#define XST_UART
+
+#define XST_UART_INIT_ERROR         1051L
+#define XST_UART_START_ERROR        1052L
+#define XST_UART_CONFIG_ERROR       1053L
+#define XST_UART_TEST_FAIL          1054L
+#define XST_UART_BAUD_ERROR         1055L
+#define XST_UART_BAUD_RANGE         1056L
+
+/** @} */
+/**
+@name IIC Status Codes 1076 - 1100
+@{
+*/
+/************************ IIC statuses 1076 - 1100 ***************************/
+
+#define XST_IIC_SELFTEST_FAILED         1076	/*!< self test failed            */
+#define XST_IIC_BUS_BUSY                1077	/*!< bus found busy              */
+#define XST_IIC_GENERAL_CALL_ADDRESS    1078	/*!< mastersend attempted with   */
+					     /* general call address        */
+#define XST_IIC_STAND_REG_RESET_ERROR   1079	/*!< A non parameterizable reg   */
+					     /* value after reset not valid */
+#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080	/*!< Tx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081	/*!< Rx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_TBA_REG_RESET_ERROR     1082	/*!< 10 bit addr incl in design  */
+					     /* value after reset not valid */
+#define XST_IIC_CR_READBACK_ERROR       1083	/*!< Read of the control register */
+					     /* didn't return value written */
+#define XST_IIC_DTR_READBACK_ERROR      1084	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_DRR_READBACK_ERROR      1085	/*!< Read of the data Receive reg */
+					     /* didn't return value written */
+#define XST_IIC_ADR_READBACK_ERROR      1086	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_TBA_READBACK_ERROR      1087	/*!< Read of the 10 bit addr reg */
+					     /* didn't return written value */
+#define XST_IIC_NOT_SLAVE               1088	/*!< The device isn't a slave    */
+/** @} */
+/**
+@name ATMC Status Codes 1101 - 1125
+@{
+*/
+/*********************** ATMC statuses 1101 - 1125 ***************************/
+
+#define XST_ATMC_ERROR_COUNT_MAX    1101L	/*!< the error counters in the ATM
+						   controller hit the max value
+						   which requires the statistics
+						   to be cleared */
+/** @} */
+/**
+@name Flash Status Codes 1126 - 1150
+@{
+*/
+/*********************** Flash statuses 1126 - 1150 **************************/
+
+#define XST_FLASH_BUSY                1126L	/*!< Flash is erasing or programming
+						 */
+#define XST_FLASH_READY               1127L	/*!< Flash is ready for commands */
+#define XST_FLASH_ERROR               1128L	/*!< Flash had detected an internal
+						   error. Use XFlash_DeviceControl
+						   to retrieve device specific codes
+						 */
+#define XST_FLASH_ERASE_SUSPENDED     1129L	/*!< Flash is in suspended erase state
+						 */
+#define XST_FLASH_WRITE_SUSPENDED     1130L	/*!< Flash is in suspended write state
+						 */
+#define XST_FLASH_PART_NOT_SUPPORTED  1131L	/*!< Flash type not supported by
+						   driver */
+#define XST_FLASH_NOT_SUPPORTED       1132L	/*!< Operation not supported */
+#define XST_FLASH_TOO_MANY_REGIONS    1133L	/*!< Too many erase regions */
+#define XST_FLASH_TIMEOUT_ERROR       1134L	/*!< Programming or erase operation
+						   aborted due to a timeout */
+#define XST_FLASH_ADDRESS_ERROR       1135L	/*!< Accessed flash outside its
+						   addressible range */
+#define XST_FLASH_ALIGNMENT_ERROR     1136L	/*!< Write alignment error */
+#define XST_FLASH_BLOCKING_CALL_ERROR 1137L	/*!< Couldn't return immediately from
+						   write/erase function with
+						   XFL_NON_BLOCKING_WRITE/ERASE
+						   option cleared */
+#define XST_FLASH_CFI_QUERY_ERROR     1138L	/*!< Failed to query the device */
+/** @} */
+/**
+@name SPI Status Codes 1151 - 1175
+@{
+*/
+/*********************** SPI statuses 1151 - 1175 ****************************/
+
+#define XST_SPI_MODE_FAULT          1151	/*!< master was selected as slave */
+#define XST_SPI_TRANSFER_DONE       1152	/*!< data transfer is complete */
+#define XST_SPI_TRANSMIT_UNDERRUN   1153	/*!< slave underruns transmit register */
+#define XST_SPI_RECEIVE_OVERRUN     1154	/*!< device overruns receive register */
+#define XST_SPI_NO_SLAVE            1155	/*!< no slave has been selected yet */
+#define XST_SPI_TOO_MANY_SLAVES     1156	/*!< more than one slave is being
+						 * selected */
+#define XST_SPI_NOT_MASTER          1157	/*!< operation is valid only as master */
+#define XST_SPI_SLAVE_ONLY          1158	/*!< device is configured as slave-only
+						 */
+#define XST_SPI_SLAVE_MODE_FAULT    1159	/*!< slave was selected while disabled */
+#define XST_SPI_SLAVE_MODE          1160	/*!< device has been addressed as slave */
+#define XST_SPI_RECEIVE_NOT_EMPTY   1161	/*!< device received data in slave mode */
+
+#define XST_SPI_COMMAND_ERROR       1162	/*!< unrecognised command - qspi only */
+#define XST_SPI_POLL_DONE           1163        /*!< controller completed polling the
+						   device for status */
+/** @} */
+/**
+@name OPB Arbiter Status Codes 1176 - 1200
+@{
+*/
+/********************** OPB Arbiter statuses 1176 - 1200 *********************/
+
+#define XST_OPBARB_INVALID_PRIORITY  1176	/*!< the priority registers have either
+						 * one master assigned to two or more
+						 * priorities, or one master not
+						 * assigned to any priority
+						 */
+#define XST_OPBARB_NOT_SUSPENDED     1177	/*!< an attempt was made to modify the
+						 * priority levels without first
+						 * suspending the use of priority
+						 * levels
+						 */
+#define XST_OPBARB_PARK_NOT_ENABLED  1178	/*!< bus parking by id was enabled but
+						 * bus parking was not enabled
+						 */
+#define XST_OPBARB_NOT_FIXED_PRIORITY 1179	/*!< the arbiter must be in fixed
+						 * priority mode to allow the
+						 * priorities to be changed
+						 */
+/** @} */
+/**
+@name INTC Status Codes 1201 - 1225
+@{
+*/
+/************************ Intc statuses 1201 - 1225 **************************/
+
+#define XST_INTC_FAIL_SELFTEST      1201	/*!< self test failed */
+#define XST_INTC_CONNECT_ERROR      1202	/*!< interrupt already in use */
+/** @} */
+/**
+@name TmrCtr Status Codes 1226 - 1250
+@{
+*/
+/********************** TmrCtr statuses 1226 - 1250 **************************/
+
+#define XST_TMRCTR_TIMER_FAILED     1226	/*!< self test failed */
+/** @} */
+/**
+@name WdtTb Status Codes 1251 - 1275
+@{
+*/
+/********************** WdtTb statuses 1251 - 1275 ***************************/
+
+#define XST_WDTTB_TIMER_FAILED      1251L
+/** @} */
+/**
+@name PlbArb status Codes 1276 - 1300
+@{
+*/
+/********************** PlbArb statuses 1276 - 1300 **************************/
+
+#define XST_PLBARB_FAIL_SELFTEST    1276L
+/** @} */
+/**
+@name Plb2Opb Status Codes 1301 - 1325
+@{
+*/
+/********************** Plb2Opb statuses 1301 - 1325 *************************/
+
+#define XST_PLB2OPB_FAIL_SELFTEST   1301L
+/** @} */
+/**
+@name Opb2Plb Status 1326 - 1350
+@{
+*/
+/********************** Opb2Plb statuses 1326 - 1350 *************************/
+
+#define XST_OPB2PLB_FAIL_SELFTEST   1326L
+/** @} */
+/**
+@name SysAce Status Codes 1351 - 1360
+@{
+*/
+/********************** SysAce statuses 1351 - 1360 **************************/
+
+#define XST_SYSACE_NO_LOCK          1351L	/*!< No MPU lock has been granted */
+/** @} */
+/**
+@name PCI Bridge Status Codes 1361 - 1375
+@{
+*/
+/********************** PCI Bridge statuses 1361 - 1375 **********************/
+
+#define XST_PCI_INVALID_ADDRESS     1361L
+/** @} */
+/**
+@name FlexRay Constants 1400 - 1409
+@{
+*/
+/********************** FlexRay constants 1400 - 1409 *************************/
+
+#define XST_FR_TX_ERROR			1400
+#define XST_FR_TX_BUSY			1401
+#define XST_FR_BUF_LOCKED		1402
+#define XST_FR_NO_BUF			1403
+/** @} */
+/**
+@name USB constants 1410 - 1420
+@{
+*/
+/****************** USB constants 1410 - 1420  *******************************/
+
+#define XST_USB_ALREADY_CONFIGURED	1410
+#define XST_USB_BUF_ALIGN_ERROR		1411
+#define XST_USB_NO_DESC_AVAILABLE	1412
+#define XST_USB_BUF_TOO_BIG		1413
+#define XST_USB_NO_BUF			1414
+/** @} */
+/**
+@name HWICAP constants 1421 - 1429
+@{
+*/
+/****************** HWICAP constants 1421 - 1429  *****************************/
+
+#define XST_HWICAP_WRITE_DONE		1421
+
+/** @} */
+/**
+@name AXI VDMA constants 1430 - 1440
+@{
+*/
+/****************** AXI VDMA constants 1430 - 1440  *****************************/
+
+#define XST_VDMA_MISMATCH_ERROR		1430
+/** @} */
+/**
+@name NAND Flash Status Codes 1441 - 1459
+@{
+*/
+/*********************** NAND Flash statuses 1441 - 1459  *********************/
+
+#define XST_NAND_BUSY			1441L	/*!< Flash is erasing or
+						 * programming
+						 */
+#define XST_NAND_READY			1442L	/*!< Flash is ready for commands
+						 */
+#define XST_NAND_ERROR			1443L	/*!< Flash had detected an
+						 * internal error.
+						 */
+#define XST_NAND_PART_NOT_SUPPORTED	1444L	/*!< Flash type not supported by
+						 * driver
+						 */
+#define XST_NAND_OPT_NOT_SUPPORTED	1445L	/*!< Operation not supported
+						 */
+#define XST_NAND_TIMEOUT_ERROR		1446L	/*!< Programming or erase
+						 * operation aborted due to a
+						 * timeout
+						 */
+#define XST_NAND_ADDRESS_ERROR		1447L	/*!< Accessed flash outside its
+						 * addressible range
+						 */
+#define XST_NAND_ALIGNMENT_ERROR	1448L	/*!< Write alignment error
+						 */
+#define XST_NAND_PARAM_PAGE_ERROR	1449L	/*!< Failed to read parameter
+						 * page of the device
+						 */
+#define XST_NAND_CACHE_ERROR		1450L	/*!< Flash page buffer error
+						 */
+
+#define XST_NAND_WRITE_PROTECTED	1451L	/*!< Flash is write protected
+						 */
+/** @} */
+
+/**************************** Type Definitions *******************************/
+
+typedef s32 XStatus;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_status_codes".
+*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/_exit.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/_exit.c
new file mode 100644
index 0000000..4585e8f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/_exit.c
@@ -0,0 +1,44 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/* _exit - Simple implementation. Does not return.
+*/
+__attribute__((weak)) void _exit (sint32 status)
+{
+  (void)status;
+  while (1) {
+	;
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/_open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/_open.c
new file mode 100644
index 0000000..72a2e23
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/_open.c
@@ -0,0 +1,53 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode);
+}
+#endif
+
+/*
+ * _open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode)
+{
+  (void *)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/_sbrk.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/_sbrk.c
new file mode 100644
index 0000000..cb4da15
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/_sbrk.c
@@ -0,0 +1,70 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) caddr_t _sbrk ( s32 incr );
+}
+#endif
+
+__attribute__((weak)) caddr_t _sbrk ( s32 incr )
+{
+  static u8 *heap = NULL;
+  u8 *prev_heap;
+  static u8 *HeapEndPtr = (u8 *)&_heap_end;
+  caddr_t Status;
+
+  if (heap == NULL) {
+    heap = (u8 *)&_heap_start;
+  }
+  prev_heap = heap;
+
+  heap += incr;
+
+  if (heap > HeapEndPtr){
+	  Status = (caddr_t) -1;
+  }
+  else if (prev_heap != NULL) {
+	  Status = (caddr_t) ((void *)prev_heap);
+  }
+  else {
+	  Status = (caddr_t) -1;
+  }
+
+  return Status;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/abort.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/abort.c
new file mode 100644
index 0000000..6aaffbc
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/abort.c
@@ -0,0 +1,42 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+
+/*
+ * abort -- go out via exit...
+ */
+__attribute__((weak)) void abort(void)
+{
+  _exit(1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/asm_vectors.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/asm_vectors.S
new file mode 100644
index 0000000..6530717
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/asm_vectors.S
@@ -0,0 +1,155 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file asm_vectors.s
+*
+* This file contains the initial vector table for the Cortex A53 processor
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.2	pkp  	28/05/15 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+
+.org 0
+.text
+
+.globl _boot
+.globl _vector_table
+
+.globl FIQInterrupt
+.globl IRQInterrupt
+.globl SWInterrupt
+.globl DataAbortInterrupt
+.globl PrefetchAbortInterrupt
+
+.globl IRQHandler
+.globl prof_pc
+
+.section .vectors
+_vector_table:
+	B	_boot
+	B	Undefined
+	B	SVCHandler
+	B	PrefetchAbortHandler
+	B	DataAbortHandler
+	NOP	/* Placeholder for address exception vector*/
+	B	IRQHandler
+	B	FIQHandler
+
+
+IRQHandler:					/* IRQ vector handler */
+
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code*/
+
+	bl	IRQInterrupt			/* IRQ vector */
+
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+
+
+	subs	pc, lr, #4			/* adjust return */
+
+
+FIQHandler:					/* FIQ vector handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+
+
+FIQLoop:
+	bl	FIQInterrupt			/* FIQ vector */
+
+
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	subs	pc, lr, #4			/* adjust return */
+
+
+Undefined:					/* Undefined handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+
+	b	_prestart
+
+	movs	pc, lr
+
+
+SVCHandler:					/* SWI handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+
+	tst	r0, #0x20			/* check the T bit */
+	ldrneh	r0, [lr,#-2]			/* Thumb mode */
+	bicne	r0, r0, #0xff00			/* Thumb mode */
+	ldreq	r0, [lr,#-4]			/* ARM mode */
+	biceq	r0, r0, #0xff000000		/* ARM mode */
+
+	bl	SWInterrupt			/* SWInterrupt: call C function here */
+
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+
+	movs	pc, lr		/*return to the next instruction after the SWI instruction */
+
+
+DataAbortHandler:				/* Data Abort handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	ldr     r0, =DataAbortAddr
+	sub     r1, lr, #8
+	str     r1, [r0]            		/* Stores instruction causing data abort */
+	bl	DataAbortInterrupt		/*DataAbortInterrupt :call C function here */
+
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+
+	subs	pc, lr, #8			/* points to the instruction that caused the Data Abort exception */
+
+PrefetchAbortHandler:				/* Prefetch Abort handler */
+
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	ldr     r0, =PrefetchAbortAddr
+	sub     r1, lr, #4
+	str     r1, [r0]            		/* Stores instruction causing prefetch abort */
+
+	bl	PrefetchAbortInterrupt		/* PrefetchAbortInterrupt: call C function here */
+
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+
+	subs	pc, lr, #4			/* points to the instruction that caused the Prefetch Abort exception */
+
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/boot.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/boot.S
new file mode 100644
index 0000000..5a06818
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/boot.S
@@ -0,0 +1,266 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file boot.S
+*
+* This file contains the initial startup code for the Cortex A53 processor
+* in 32-bit mode
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.2	pkp  	28/05/15 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#include "xparameters.h"
+
+
+.globl MMUTable
+.global _prestart
+.global _boot
+.global __stack
+.global __irq_stack
+.global __supervisor_stack
+.global __abort_stack
+.global __fiq_stack
+.global __undef_stack
+.global _vector_table
+
+.set PSS_L2CC_BASE_ADDR, 0xF8F02000
+.set PSS_SLCR_BASE_ADDR, 0xF8000000
+
+.set RESERVED,		0x0fffff00
+.set TblBase ,		MMUTable
+.set LRemap,		0xFE00000F		/* set the base address of the peripheral block as not shared */
+
+.set CRValMmuCac,	0b01000000000001	/* Enable IDC, and MMU */
+
+/* Stack Pointer locations for boot code */
+.set Undef_stack,	__undef_stack
+.set FIQ_stack,		__fiq_stack
+.set Abort_stack,	__abort_stack
+.set SPV_stack,		__supervisor_stack
+.set IRQ_stack,		__irq_stack
+.set SYS_stack,		__stack
+
+.set vector_base,	_vector_table
+
+.set FPEXC_EN,		0x40000000		/* FPU enable bit, (1 << 30) */
+
+.section .boot,"ax"
+
+/* this initializes the various processor modes */
+
+_prestart:
+_boot:
+
+OKToRun:
+	mrc     p15, 0, r0, c0, c0, 0		/* Get the revision */
+	and     r5, r0, #0x00f00000
+	and     r6, r0, #0x0000000f
+	orr     r6, r6, r5, lsr #20-4
+
+	/* set VBAR to the _vector_table address in linker script */
+	ldr	r0, =vector_base
+	mcr	p15, 0, r0, c12, c0, 0
+
+	/* Invalidate caches and TLBs */
+	mov	r0,#0				/* r0 = 0  */
+	mcr	p15, 0, r0, c8, c7, 0		/* invalidate TLBs */
+	mcr	p15, 0, r0, c7, c5, 0		/* invalidate icache */
+	mcr	p15, 0, r0, c7, c5, 6		/* Invalidate branch predictor array */
+	bl	invalidate_dcache		/* invalidate dcache */
+
+	/* Disable MMU, if enabled */
+	mrc	p15, 0, r0, c1, c0, 0		/* read CP15 register 1 */
+	bic	r0, r0, #0x1			/* clear bit 0 */
+	mcr	p15, 0, r0, c1, c0, 0		/* write value back */
+
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the irq stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x12			/* IRQ mode */
+	msr	cpsr, r2
+	ldr	r13,=IRQ_stack			/* IRQ stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the supervisor stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x13			/* supervisor mode */
+	msr	cpsr, r2
+	ldr	r13,=SPV_stack			/* Supervisor stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the Abort  stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x17			/* Abort mode */
+	msr	cpsr, r2
+	ldr	r13,=Abort_stack		/* Abort stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the FIQ stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x11			/* FIQ mode */
+	msr	cpsr, r2
+	ldr	r13,=FIQ_stack			/* FIQ stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the Undefine stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x1b			/* Undefine mode */
+	msr	cpsr, r2
+	ldr	r13,=Undef_stack		/* Undefine stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the system stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x1F			/* SYS mode */
+	msr	cpsr, r2
+	ldr	r13,=SYS_stack			/* SYS stack pointer */
+
+	mov	r0,#0
+	mcr 	15,0,r0,c2,c0,2			/* N = 0 to use ttbr0 */
+
+	/* enable MMU and cache */
+	ldr	r0,=TblBase			/* Load MMU translation table base */
+	orr	r0, r0, #0x5B			/* Outer-cacheable, WB */
+	mcr	15, 0, r0, c2, c0, 0		/* TTB0 */
+	mov	r0,#0x5B
+	mcr	p15,0,r0,c2,c0,1
+	mvn	r0,#0				/* Load MMU domains -- all ones=manager */
+	mcr	p15,0,r0,c3,c0,0
+
+	/* Enable mmu, icahce and dcache */
+	mrc p15,0,r0,c1,c0,0
+	orr r0,r0,#0x1
+	bic r0,r0,#(0x1 << 13)
+	dsb					/* dsb	allow the MMU to start up */
+	mcr	p15,0,r0,c1,c0,0		/* Enable cache and MMU */
+	isb					/* isb	flush prefetch buffer */
+
+	/* Write to ACTLR */
+	mrc	p15, 0, r0, c1, c0, 1		/* Read ACTLR*/
+	orr	r0, r0, #(0x01 << 6)		/* set SMP bit */
+	orr	r0, r0, #(0x01 )		/* */
+	mcr	p15, 0, r0, c1, c0, 1		/* Write ACTLR*/
+
+	mov	r0, r0
+	mrc	p15, 0, r1, c1, c0, 2		/* read cp access control register (CACR) into r1 */
+	orr	r1, r1, #(0xf << 20)		/* enable full access for p10 & p11 */
+	mcr	p15, 0, r1, c1, c0, 2		/* write back into CACR */
+
+	mrc	p15,0,r0,c1,c0,0		/* flow prediction enable */
+	orr	r0, r0, #(0x01 << 11)		/* #0x8000 */
+	mcr	p15,0,r0,c1,c0,0
+
+	mrc	p15,0,r0,c1,c0,1		/* read Auxiliary Control Register */
+	orr	r0, r0, #(0x1 << 2)		/* enable Dside prefetch */
+	orr	r0, r0, #(0x1 << 1)		/* enable L2 Prefetch hint */
+	mcr	p15,0,r0,c1,c0,1		/* write Auxiliary Control Register */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	bic	r0, r0, #0x100			/* enable asynchronous abort exception */
+	msr	cpsr_xsf, r0
+
+
+	b	_startup				/* jump to C startup code */
+	and	r0, r0, r0			/* no op */
+
+.Ldone:	b	.Ldone				/* Paranoia: we should never get here */
+
+
+/*
+ *************************************************************************
+ *
+ * invalidate_dcache - invalidate the entire d-cache by set/way
+ *
+ * Note: for Cortex-A53, there is no cp instruction for invalidating
+ * the whole D-cache. Need to invalidate each line.
+ *
+ *************************************************************************
+ */
+invalidate_dcache:
+	mrc	p15, 1, r0, c0, c0, 1		/* read CLIDR */
+	ands	r3, r0, #0x7000000
+	mov	r3, r3, lsr #23			/* cache level value (naturally aligned) */
+	beq	finished
+	mov	r10, #0				/* start with level 0 */
+loop1:
+	add	r2, r10, r10, lsr #1		/* work out 3xcachelevel */
+	mov	r1, r0, lsr r2			/* bottom 3 bits are the Cache type for this level */
+	and	r1, r1, #7			/* get those 3 bits alone */
+	cmp	r1, #2
+	blt	skip				/* no cache or only instruction cache at this level */
+	mcr	p15, 2, r10, c0, c0, 0		/* write the Cache Size selection register */
+	isb					/* isb to sync the change to the CacheSizeID reg */
+	mrc	p15, 1, r1, c0, c0, 0		/* reads current Cache Size ID register */
+	and	r2, r1, #7			/* extract the line length field */
+	add	r2, r2, #4			/* add 4 for the line length offset (log2 16 bytes) */
+	ldr	r4, =0x3ff
+	ands	r4, r4, r1, lsr #3		/* r4 is the max number on the way size (right aligned) */
+	clz	r5, r4				/* r5 is the bit position of the way size increment */
+	ldr	r7, =0x7fff
+	ands	r7, r7, r1, lsr #13		/* r7 is the max number of the index size (right aligned) */
+loop2:
+	mov	r9, r4				/* r9 working copy of the max way size (right aligned) */
+loop3:
+	orr	r11, r10, r9, lsl r5		/* factor in the way number and cache number into r11 */
+	orr	r11, r11, r7, lsl r2		/* factor in the index number */
+	mcr	p15, 0, r11, c7, c6, 2		/* invalidate by set/way */
+	subs	r9, r9, #1			/* decrement the way number */
+	bge	loop3
+	subs	r7, r7, #1			/* decrement the index */
+	bge	loop2
+skip:
+	add	r10, r10, #2			/* increment the cache number */
+	cmp	r3, r10
+	bgt	loop1
+
+finished:
+	mov	r10, #0				/* swith back to cache level 0 */
+	mcr	p15, 2, r10, c0, c0, 0		/* select current cache level in cssr */
+	dsb
+	isb
+
+	bx	lr
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/close.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/close.c
new file mode 100644
index 0000000..22bb37e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/close.c
@@ -0,0 +1,47 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _close(s32 fd);
+}
+#endif
+
+/*
+ * close -- We don't need to do anything, but pretend we did.
+ */
+
+__attribute__((weak)) s32 _close(s32 fd)
+{
+  (void)fd;
+  return (0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/cpu_init.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/cpu_init.S
new file mode 100644
index 0000000..2e8bedd
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/cpu_init.S
@@ -0,0 +1,77 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file cpu_init.s
+*
+* This file contains CPU specific initialization. Invoked from main CRT
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.2	pkp  	28/05/15 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+	.text
+	.global __cpu_init
+	.align 2
+__cpu_init:
+
+/* Clear cp15 regs with unknown reset values */
+	mov	r0, #0x0
+	mcr	p15, 0, r0, c5, c0, 0	/* DFSR */
+	mcr	p15, 0, r0, c5, c0, 1	/* IFSR */
+	mcr	p15, 0, r0, c6, c0, 0	/* DFAR */
+	mcr	p15, 0, r0, c6, c0, 2	/* IFAR */
+	mcr	p15, 0, r0, c9, c13, 2	/* PMXEVCNTR */
+	mcr	p15, 0, r0, c13, c0, 2	/* TPIDRURW */
+	mcr	p15, 0, r0, c13, c0, 3	/* TPIDRURO */
+
+/* Reset and start Cycle Counter */
+	mov	r2, #0x80000000		/* clear overflow */
+	mcr	p15, 0, r2, c9, c12, 3
+	mov	r2, #0xd		/* D, C, E */
+	mcr	p15, 0, r2, c9, c12, 0
+	mov	r2, #0x80000000		/* enable cycle counter */
+	mcr	p15, 0, r2, c9, c12, 1
+
+	bx	lr
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/errno.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/errno.c
new file mode 100644
index 0000000..fa69e97
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/errno.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* The errno variable is stored in the reentrancy structure.  This
+   function returns its address for use by the macro errno defined in
+   errno.h.  */
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 * __errno (void);
+}
+#endif
+
+__attribute__((weak)) sint32 *
+__errno (void)
+{
+  return &_REENT->_errno;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/fcntl.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/fcntl.c
new file mode 100644
index 0000000..9a1a3b1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/fcntl.c
@@ -0,0 +1,46 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/*
+ * fcntl -- Manipulate a file descriptor.
+ *          We don't have a filesystem, so we do nothing.
+ */
+__attribute__((weak)) sint32 fcntl (sint32 fd, sint32 cmd, long arg)
+{
+  (void)fd;
+  (void)cmd;
+  (void)arg;
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/fstat.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/fstat.c
new file mode 100644
index 0000000..4828cb4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/fstat.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf);
+}
+#endif
+/*
+ * fstat -- Since we have no file system, we just return an error.
+ */
+__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf)
+{
+  (void)fd;
+  buf->st_mode = S_IFCHR; /* Always pretend to be a tty */
+
+  return (0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/getpid.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/getpid.c
new file mode 100644
index 0000000..7bdfe91
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/getpid.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "xil_types.h"
+/*
+ * getpid -- only one process, so just return 1.
+ */
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _getpid(void);
+}
+#endif
+
+__attribute__((weak)) s32 getpid(void)
+{
+  return 1;
+}
+
+__attribute__((weak)) s32 _getpid(void)
+{
+  return 1;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/isatty.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/isatty.c
new file mode 100644
index 0000000..5946a60
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/isatty.c
@@ -0,0 +1,56 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 _isatty(sint32 fd);
+}
+#endif
+
+/*
+ * isatty -- returns 1 if connected to a terminal device,
+ *           returns 0 if not. Since we're hooked up to a
+ *           serial port, we'll say yes _AND return a 1.
+ */
+__attribute__((weak)) sint32 isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
+
+__attribute__((weak)) sint32 _isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/kill.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/kill.c
new file mode 100644
index 0000000..2a2d1fe
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/kill.c
@@ -0,0 +1,60 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _kill(s32 pid, s32 sig);
+}
+#endif
+
+/*
+ * kill -- go out via exit...
+ */
+
+__attribute__((weak)) s32 kill(s32 pid, s32 sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
+
+__attribute__((weak)) s32 _kill(s32 pid, s32 sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/lseek.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/lseek.c
new file mode 100644
index 0000000..ffbf9d3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/lseek.c
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence);
+}
+#endif
+/*
+ * lseek --  Since a serial port is non-seekable, we return an error.
+ */
+__attribute__((weak)) off_t lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
+
+__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/open.c
new file mode 100644
index 0000000..bf64a3c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/open.c
@@ -0,0 +1,52 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 open(char8 *buf, s32 flags, s32 mode);
+}
+#endif
+/*
+ * open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 open(char8 *buf, s32 flags, s32 mode)
+{
+  (void *)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/read.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/read.c
new file mode 100644
index 0000000..4c7d532
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/read.c
@@ -0,0 +1,111 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* read.c -- read bytes from a input device.
+ */
+
+#include "xil_printf.h"
+#include "xparameters.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _read (s32 fd, char8* buf, s32 nbytes);
+}
+#endif
+
+/*
+ * read  -- read bytes from the serial port. Ignore fd, since
+ *          we only have stdin.
+ */
+__attribute__((weak)) s32
+read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    *LocalBuf = inbyte();
+	    if ((*LocalBuf == '\n' )|| (*LocalBuf == '\r')) {
+	        break;
+		}
+	}
+	if(LocalBuf != NULL) {
+	LocalBuf -= i;
+	}
+  }
+
+  return (i + 1);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) s32
+_read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    *LocalBuf = inbyte();
+	    if ((*LocalBuf == '\n' )|| (*LocalBuf == '\r')) {
+	        break;
+		}
+	}
+	if(LocalBuf != NULL) {
+	LocalBuf -= i;
+	}
+  }
+
+  return (i + 1);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/sbrk.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/sbrk.c
new file mode 100644
index 0000000..2b22614
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/sbrk.c
@@ -0,0 +1,65 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) char8 *sbrk (s32 nbytes);
+}
+#endif
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+extern char8 HeapBase[];
+extern char8 HeapLimit[];
+
+
+
+__attribute__((weak)) char8 *sbrk (s32 nbytes)
+{
+  char8 *base;
+  static char8 *heap_ptr = HeapBase;
+
+  base = heap_ptr;
+  if(heap_ptr != NULL) {
+	heap_ptr += nbytes;
+  }
+
+/*  if (heap_ptr <= ((char8 *)&_heap_end + 1)) */
+  if (heap_ptr <= ((char8 *)&HeapLimit + 1)) {
+    return base;
+  }	else {
+    errno = ENOMEM;
+    return ((char8 *)-1);
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/translation_table.s b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/translation_table.s
new file mode 100644
index 0000000..45990e9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/translation_table.s
@@ -0,0 +1,129 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file translation_table.s
+*
+* This file contains the initialization for the MMU table in RAM
+* needed by the Cortex A53 processor
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.2	pkp  28/05/15 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+	.globl  MMUTable
+
+	.section .mmu_tbl,"a"
+
+MMUTable:
+	/* Each table entry occupies one 32-bit word and there are
+	 * 4096 entries, so the entire table takes up 16KB.
+	 * Each entry covers a 1MB section.
+	 */
+
+.set SECT, 0
+
+.rept	0x0800			/* 0x00000000 - 0x7fffffff (DDR Cacheable) */
+.word	SECT + 0x15de6		/* S=b1 TEX=b101 AP=b11, Domain=b1111, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x0200			/* 0x80000000 - 0x9fffffff (FPGA slave0) */
+.word	SECT + 0xc02		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x0200			/* 0xA0000000 - 0xbfffffff (FPGA slave1) */
+.word	SECT + 0xc02		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x0200			/* 0xc0000000 - 0xdfffffff (OSPI IOU)*/
+.word	SECT + 0xc06		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x0100			/* 0xe0000000 - 0xefffffff (Lower PCIe)*/
+.word	SECT + 0xc06		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x80			/* 0xf0000000 - 0xf7ffffff (unassigned/reserved).
+				 * Generates a translation fault if accessed */
+.word	SECT + 0x0		/* S=b0 TEX=b000 AP=b00, Domain=b0, C=b0, B=b0 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x10			/* 0xf8000000 - 0xf8ffffff (STM Coresight) */
+.word	SECT + 0xc06		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x10			/* 0xf9000000 - 0xf9ffffff (RPU LLP and A53 PP) */
+.word	SECT + 0xc06		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x44			/* 0xfA000000 - 0xfe3fffff (Device).*/
+.word	SECT + 0xc06		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x8			/* 0xfe4000000 - 0xfebfffff (FPS Slaves) */
+.word	SECT + 0xc06		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x10			/* 0xfec000000 - 0xffbfffff (LPS Slaves) */
+.word	SECT + 0xc06		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x2			/* 0xffc000000 - 0xffdfffff (CSU and PMU) */
+.word	SECT + 0xc06		/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+
+.rept	0x02			/* 0xffe00000 - 0xffffffff (TCM and OCM Cacheable) */
+.word	SECT + 0x15de6		/* S=b1 TEX=b101 AP=b11, Domain=b1111, C=b0, B=b1 */
+.set	SECT, SECT+0x100000
+.endr
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/unlink.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/unlink.c
new file mode 100644
index 0000000..d9b66dd
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/unlink.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 unlink(char8 *path);
+}
+#endif
+/*
+ * unlink -- since we have no file system,
+ *           we just return an error.
+ */
+__attribute__((weak)) sint32 unlink(char8 *path)
+{
+  (void *)path;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/write.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/write.c
new file mode 100644
index 0000000..0201ee8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/write.c
@@ -0,0 +1,111 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* write.c -- write bytes to an output device.
+ */
+
+#include "xil_printf.h"
+#include "xparameters.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 _write (sint32 fd, char8* buf, sint32 nbytes);
+}
+#endif
+
+/*
+ * write -- write bytes to the serial port. Ignore fd, since
+ *          stdout and stderr are the same. Since we have no filesystem,
+ *          open will only return an error.
+ */
+__attribute__((weak)) sint32
+write (sint32 fd, char8* buf, sint32 nbytes)
+
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) sint32
+_write (sint32 fd, char8* buf, sint32 nbytes)
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/xil-crt0.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/xil-crt0.S
new file mode 100644
index 0000000..693b6ca
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/xil-crt0.S
@@ -0,0 +1,109 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil-crt0.S
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.2	pkp  28/05/15 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+	.file	"xil-crt0.S"
+	.section ".got2","aw"
+	.align	2
+
+	.text
+.Lsbss_start:
+	.long	__sbss_start
+
+.Lsbss_end:
+	.long	__sbss_end
+
+.Lbss_start:
+	.long	__bss_start__
+
+.Lbss_end:
+	.long	__bss_end__
+
+
+.Lstack:
+	.long	__stack
+
+	.globl	_startup
+_startup:
+
+	mov	r0, #0
+
+	/* clear sbss */
+	ldr 	r1,.Lsbss_start		/* calculate beginning of the SBSS */
+	ldr	r2,.Lsbss_end		/* calculate end of the SBSS */
+
+.Lloop_sbss:
+	cmp	r1,r2
+	bge	.Lenclsbss		/* If no SBSS, no clearing required */
+	str	r0, [r1], #4
+	b	.Lloop_sbss
+
+.Lenclsbss:
+	/* clear bss */
+	ldr	r1,.Lbss_start		/* calculate beginning of the BSS */
+	ldr	r2,.Lbss_end		/* calculate end of the BSS */
+
+.Lloop_bss:
+	cmp	r1,r2
+	bge	.Lenclbss		/* If no BSS, no clearing required */
+	str	r0, [r1], #4
+	b	.Lloop_bss
+
+.Lenclbss:
+	/* set stack pointer */
+	ldr	r13,.Lstack		/* stack address */
+
+	bl	main			/* Jump to main C code */
+
+	bl	_exit
+
+.Lexit:	/* should never get here */
+	b .Lexit
+
+.Lstart:
+	.size	_startup,.Lstart-_startup
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/xpseudo_asm_gcc.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/xpseudo_asm_gcc.h
new file mode 100644
index 0000000..5439d09
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/gcc/xpseudo_asm_gcc.h
@@ -0,0 +1,175 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_gcc.h
+*
+* This header file contains macros for using inline assembler code. It is
+* written specifically for the GNU compiler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp		 28/05/2015 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XPSEUDO_ASM_GCC_H  /* prevent circular inclusions */
+#define XPSEUDO_ASM_GCC_H  /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/* necessary for pre-processor */
+#define stringify(s)	tostring(s)
+#define tostring(s)	#s
+
+/* pseudo assembler instructions */
+#define mfcpsr()	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mrs	%0, cpsr\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+#define mtcpsr(v)	__asm__ __volatile__(\
+			  "msr	cpsr,%0\n"\
+			  : : "r" (v)\
+			)
+
+#define cpsiei()	__asm__ __volatile__("cpsie	i\n")
+#define cpsidi()	__asm__ __volatile__("cpsid	i\n")
+
+#define cpsief()	__asm__ __volatile__("cpsie	f\n")
+#define cpsidf()	__asm__ __volatile__("cpsid	f\n")
+
+
+
+#define mtgpr(rn, v)	__asm__ __volatile__(\
+			  "mov r" stringify(rn) ", %0 \n"\
+			  : : "r" (v)\
+			)
+
+#define mfgpr(rn)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mov %0,r" stringify(rn) "\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+#define isb() __asm__ __volatile__ ("isb" : : : "memory")
+
+/* Data Synchronization Barrier */
+#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
+
+/* Data Memory Barrier */
+#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
+
+
+/* Memory Operations */
+#define ldr(adr)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "ldr	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define ldrb(adr)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "ldrb	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define str(adr, val)	__asm__ __volatile__(\
+			  "str	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+#define strb(adr, val)	__asm__ __volatile__(\
+			  "strb	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+/* Count leading zeroes (clz) */
+#define clz(arg)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "clz	%0,%1"\
+			    : "=r" (rval) : "r" (arg)\
+			  );\
+			  rval;\
+			 })
+
+/* CP15 operations */
+#define mtcp(rn, v)	__asm__ __volatile__(\
+			 "mcr " rn "\n"\
+			 : : "r" (v)\
+			);
+
+#define mfcp(rn)	({u32 rval; \
+			 __asm__ __volatile__(\
+			   "mrc " rn "\n"\
+			   : "=r" (rval)\
+			 );\
+			 rval;\
+			 })
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XPSEUDO_ASM_GCC_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/print.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/print.c
new file mode 100644
index 0000000..935862e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/print.c
@@ -0,0 +1,31 @@
+/* print.c -- print a string on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ */
+
+/*
+ * print -- do a raw print of a string
+ */
+#include "xil_printf.h"
+
+void print(const char *ptr)
+{
+#ifdef STDOUT_BASEADDRESS
+  while (*ptr) {
+    outbyte (*ptr++);
+  }
+#else
+(void)ptr;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/putnum.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/putnum.c
new file mode 100644
index 0000000..f0a3573
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/putnum.c
@@ -0,0 +1,59 @@
+/* putnum.c -- put a hex number on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+/*
+ * putnum -- print a 32 bit number in hex
+ */
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Function Prototypes ******************************/
+extern void print (const char8 *ptr);
+void putnum(u32 num);
+
+void putnum(u32 num)
+{
+  char8  buf[9];
+  s32  cnt;
+  s32 i;
+  char8  *ptr;
+  u32  digit;
+  for(i = 0; i<9; i++) {
+	buf[i] = '0';
+  }
+
+  ptr = buf;
+  for (cnt = 7 ; cnt >= 0 ; cnt--) {
+    digit = ((num >> ((u16)cnt * 4U)) & 0xfU);
+
+    if ((digit <= 9U) && (ptr != NULL)) {
+		digit += (u32)'0';
+		*ptr = ((char8) digit);
+		ptr += 1;
+	} else if (ptr != NULL) {
+		digit += ((u32)'a' - (u32)10);
+		*ptr = ((char8)digit);
+		ptr += 1;
+	} else {
+		/*Made for MisraC Compliance*/;
+	}
+  }
+
+  if(ptr != NULL) {
+	  *ptr = (char8) 0;
+  }
+  print (buf);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/sleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/sleep.c
new file mode 100644
index 0000000..c1d14a9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/sleep.c
@@ -0,0 +1,86 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************
+*
+* @file sleep.c
+*
+* This function provides a second delay using the Generic Counter register in
+* the ARM Cortex A53 MPcore.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp  	28/05/15 First release
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+
+/*****************************************************************************/
+/*
+*
+* This API is used to provide delays in seconds
+*
+* @param	seconds requested
+*
+* @return	0 always
+*
+* @note		None.
+*
+****************************************************************************/
+s32 sleep(u32 seconds)
+{
+	XTime tEnd, tCur;
+
+	/*write 50MHz frequency to System Time Stamp Generator Register*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
+
+	/*Enable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
+
+	XTime_GetTime(&tCur);
+	tEnd  = tCur + (((XTime) seconds) * COUNTS_PER_SECOND);
+	do
+	{
+		XTime_GetTime(&tCur);
+	} while (tCur < tEnd);
+
+	/*Disable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),(~(XIOU_SCNTRS_CNT_CNTRL_REG_EN)));
+	return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/sleep.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/sleep.h
new file mode 100644
index 0000000..703377c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/sleep.h
@@ -0,0 +1,49 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#ifndef SLEEP_H
+#define SLEEP_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+s32 usleep(u32 useconds);
+s32 sleep(u32 seconds);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/usleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/usleep.c
new file mode 100644
index 0000000..0f2c6d9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/usleep.c
@@ -0,0 +1,91 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file usleep.c
+*
+* This function provides a microsecond delay using the Generic counter register in
+* the ARM Cortex A53 MPcore.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp  	28/05/15 First release
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+
+
+/* Global Timer is always clocked at half of the CPU frequency */
+#define COUNTS_PER_USECOND  (COUNTS_PER_SECOND/1000000 )
+
+/*****************************************************************************/
+/**
+*
+* This API gives a delay in microseconds
+*
+* @param	useconds requested
+*
+* @return	0.
+*
+* @note		None.
+*
+****************************************************************************/
+s32 usleep(u32 useconds)
+{
+
+	XTime tEnd, tCur;
+
+	/*write 50MHz frequency to System Time Stamp Generator Register*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
+
+	/*Enable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
+	XTime_GetTime(&tCur);
+	tEnd = tCur + (((XTime) useconds) * COUNTS_PER_USECOND);
+	do
+	{
+		XTime_GetTime(&tCur);
+	} while (tCur < tEnd);
+			/*Disable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),(~(XIOU_SCNTRS_CNT_CNTRL_REG_EN)));
+	return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/vectors.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/vectors.c
new file mode 100644
index 0000000..7cb1215
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/vectors.c
@@ -0,0 +1,168 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.c
+*
+* This file contains the C level vectors for the ARM Cortex A53 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.2	pkp  28/05/15 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xil_exception.h"
+#include "vectors.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+extern XExc_VectorTableEntry XExc_VectorTable[];
+
+/************************** Function Prototypes ******************************/
+
+
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the FIQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void FIQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_FIQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_FIQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the IRQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void IRQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_IRQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_IRQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the SW Interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void SWInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_SWI_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_SWI_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the DataAbort Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void DataAbortInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_DATA_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_DATA_ABORT_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the PrefetchAbort Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void PrefetchAbortInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_PREFETCH_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_PREFETCH_ABORT_INT].Data);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/vectors.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/vectors.h
new file mode 100644
index 0000000..e44cd34
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/vectors.h
@@ -0,0 +1,81 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.h
+*
+* This file contains the C level vector prototypes for the ARM Cortex A53 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.2	pkp  28/05/15 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef _VECTORS_H_
+#define _VECTORS_H_
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+void FIQInterrupt(void);
+void IRQInterrupt(void);
+void SWInterrupt(void);
+void DataAbortInterrupt(void);
+void PrefetchAbortInterrupt(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_cache.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_cache.c
new file mode 100644
index 0000000..eacd3b4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_cache.c
@@ -0,0 +1,707 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.c
+*
+* Contains required functions for the ARM cache functionality.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.2	pkp  	28/05/15 First release
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xil_cache_l.h"
+#include "xil_io.h"
+#include "xpseudo_asm.h"
+#include "xparameters.h"
+#include "xreg_cortexa53.h"
+#include "xil_exception.h"
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+#define IRQ_FIQ_MASK 0xC0U	/* Mask IRQ and FIQ interrupts in cpsr */
+
+extern s32  _stack_end;
+extern s32  __undef_stack;
+
+/****************************************************************************
+*
+* Enable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheEnable(void)
+{
+	u32 CtrlReg;
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+	/* enable caches only if they are disabled */
+	if((CtrlReg & XREG_CONTROL_DCACHE_BIT) == 0X00000000U){
+
+		/* invalidate the Data cache */
+		Xil_DCacheInvalidate();
+
+		CtrlReg |= XREG_CONTROL_DCACHE_BIT;
+
+		/* enable the Data cache */
+		mtcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+	}
+}
+
+/****************************************************************************
+*
+* Disable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheDisable(void)
+{
+	u32 CtrlReg;
+	/* clean and invalidate the Data cache */
+	Xil_DCacheFlush();
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+
+	CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+	/* disable the Data cache */
+	mtcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+}
+
+/****************************************************************************
+*
+* Invalidate the entire Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidate(void)
+{
+	register u32 CsidReg, C7Reg;
+	u32 LineSize, NumWays;
+	u32 Way, WayIndex,WayAdjust, Set, SetIndex, NumSet, NumCacheLevel, CacheLevel,CacheLevelIndex;
+	u32 currmask;
+
+	u32 stack_start,stack_end,stack_size;
+
+
+	stack_end = (u32)&_stack_end;
+	stack_start = (u32)&__undef_stack;
+	stack_size=stack_start-stack_end;
+
+	/*Flush stack memory to save return address*/
+	Xil_DCacheFlushRange(stack_end, stack_size);
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+
+	/* Number of level of cache*/
+	NumCacheLevel = (mfcp(XREG_CP15_CACHE_LEVEL_ID)>>24U) & 0x00000007U;
+
+	CacheLevel=0U;
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(XREG_CP15_CACHE_SIZE_SEL,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(XREG_CP15_CACHE_SIZE_ID);
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0X00000001U;
+
+	/*Number of Set*/
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0X00000001U;
+
+	WayAdjust = 0x1E;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex =0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex =0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcp(XREG_CP15_INVAL_DC_LINE_SW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += (0x00000001U << WayAdjust);
+	}
+
+	/* Wait for invalidate to complete */
+	dsb();
+
+	/* Select cache level 1 and D cache in CSSR */
+	CacheLevel += (0x00000001U<<1U) ;
+	mtcp(XREG_CP15_CACHE_SIZE_SEL,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(XREG_CP15_CACHE_SIZE_ID);
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0x00000001U;
+
+	/* Number of Sets */
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0x00000001U;
+
+	WayAdjust = 0x1C;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex = 0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex = 0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcp(XREG_CP15_INVAL_DC_LINE_SW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += (0x00000001U << WayAdjust);
+	}
+	/* Wait for invalidate to complete */
+	dsb();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate a Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the modified contents
+* are lost and are NOT written to system memory before the line is
+* invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateLine(u32 adr)
+{
+
+	u32 currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(XREG_CP15_CACHE_SIZE_SEL,0x0);
+	isb();
+	mtcp(XREG_CP15_INVAL_DC_LINE_MVA_POC,(adr & (~0x3F)));
+	/* Wait for invalidate to complete */
+	dsb();
+	/* Select cache level 1 and D cache in CSSR */
+	mtcp(XREG_CP15_CACHE_SIZE_SEL,0x2);
+	isb();
+	mtcp(XREG_CP15_INVAL_DC_LINE_MVA_POC,(adr & (~0x3F)));
+	/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate the Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* In this function, if start address or end address is not aligned to cache-line,
+* particular cache-line containing unaligned start or end address is flush first
+* and then invalidated the others as invalidating the same unaligned cache line
+* may result into loss of data. This issue raises few possibilities.
+*
+*
+* If the address to be invalidated is not cache-line aligned, the
+* following choices are available:
+* 1) Invalidate the cache line when required and do not bother much for the
+* side effects. Though it sounds good, it can result in hard-to-debug issues.
+* The problem is, if some other variable are allocated in the
+* same cache line and had been recently updated (in cache), the invalidation
+* would result in loss of data.
+*
+* 2) Flush the cache line first. This will ensure that if any other variable
+* present in the same cache line and updated recently are flushed out to memory.
+* Then it can safely be invalidated. Again it sounds good, but this can result
+* in issues. For example, when the invalidation happens
+* in a typical ISR (after a DMA transfer has updated the memory), then flushing
+* the cache line means, loosing data that were updated recently before the ISR
+* got invoked.
+*
+* Linux prefers the second one. To have uniform implementation (across standalone
+* and Linux), the second option is implemented.
+* This being the case, follwoing needs to be taken care of:
+* 1) Whenever possible, the addresses must be cache line aligned. Please nore that,
+* not just start address, even the end address must be cache line aligned. If that
+* is taken care of, this will always work.
+* 2) Avoid situations where invalidation has to be done after the data is updated by
+* peripheral/DMA directly into the memory. It is not tough to achieve (may be a bit
+* risky). The common use case to do invalidation is when a DMA happens. Generally
+* for such use cases, buffers can be allocated first and then start the DMA. The
+* practice that needs to be followed here is, immediately after buffer allocation
+* and before starting the DMA, do the invalidation. With this approach, invalidation
+* need not to be done after the DMA transfer is over.
+*
+* This is going to always work if done carefully.
+* However, the concern is, there is no guarantee that invalidate has not needed to be
+* done after DMA is complete. For example, because of some reasons if the first cache
+* line or last cache line (assuming the buffer in question comprises of multiple cache
+* lines) are brought into cache (between the time it is invalidated and DMA completes)
+* because of some speculative prefetching or reading data for a variable present
+* in the same cache line, then we will have to invalidate the cache after DMA is complete.
+*
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateRange(INTPTR adr, u32 len)
+{
+	const u32 cacheline = 64U;
+	u32 end;
+	u32 tempadr = adr;
+	u32 tempend;
+	u32 currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	if (len != 0U) {
+		end = tempadr + len;
+		tempend = end;
+
+		if ((tempadr & (cacheline-1U)) != 0U) {
+			tempadr &= (~(cacheline - 1U));
+			Xil_DCacheFlushLine(tempadr);
+			tempadr += cacheline;
+		}
+		if ((tempend & (cacheline-1U)) != 0U) {
+			tempend &= (~(cacheline - 1U));
+			Xil_DCacheFlushLine(tempend);
+		}
+
+		while (tempadr < tempend) {
+			/* Select cache level 0 and D cache in CSSR */
+			mtcp(XREG_CP15_CACHE_SIZE_SEL,0x0);
+			/* Invalidate Data cache line */
+			mtcp(XREG_CP15_INVAL_DC_LINE_MVA_POC,(tempadr & (~0x3F)));
+			/* Wait for invalidate to complete */
+			dsb();
+			/* Select cache level 0 and D cache in CSSR */
+			mtcp(XREG_CP15_CACHE_SIZE_SEL,0x2);
+			/* Invalidate Data cache line */
+			mtcp(XREG_CP15_INVAL_DC_LINE_MVA_POC,(tempadr & (~0x3F)));
+			/* Wait for invalidate to complete */
+			dsb();
+			tempadr += cacheline;
+		}
+	}
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush the entire Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheFlush(void)
+{
+	register u32 CsidReg, C7Reg;
+	u32 LineSize, NumWays;
+	u32 Way, WayIndex,WayAdjust, Set, SetIndex, NumSet, NumCacheLevel, CacheLevel,CacheLevelIndex;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+
+	/* Number of level of cache*/
+	NumCacheLevel = (mfcp(XREG_CP15_CACHE_LEVEL_ID)>>24U) & 0x00000007U;
+
+	CacheLevel=0U;
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(XREG_CP15_CACHE_SIZE_SEL,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(XREG_CP15_CACHE_SIZE_ID);
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0X00000001U;
+
+	/*Number of Set*/
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0X00000001U;
+
+	WayAdjust = 0x1E;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex =0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex =0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcp(XREG_CP15_CLEAN_INVAL_DC_LINE_SW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += (0x00000001U << WayAdjust);
+	}
+
+	/* Wait for invalidate to complete */
+	dsb();
+
+	/* Select cache level 1 and D cache in CSSR */
+	CacheLevel += (0x00000001U<<1U) ;
+	mtcp(XREG_CP15_CACHE_SIZE_SEL,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(XREG_CP15_CACHE_SIZE_ID);
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0x00000001U;
+
+	/* Number of Sets */
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0x00000001U;
+
+	WayAdjust = 0x1C;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex = 0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex = 0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcp(XREG_CP15_CLEAN_INVAL_DC_LINE_SW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += (0x00000001U << WayAdjust);
+	}
+	/* Wait for invalidate to complete */
+	dsb();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush a Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the entire
+* contents of the cacheline are written to system memory before the
+* line is invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheFlushLine(u32 adr)
+{
+	u32 currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(XREG_CP15_CACHE_SIZE_SEL,0x0);
+	isb();
+	mtcp(XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC,(adr & (~0x3F)));
+	/* Wait for invalidate to complete */
+	dsb();
+	/* Select cache level 1 and D cache in CSSR */
+	mtcp(XREG_CP15_CACHE_SIZE_SEL,0x2);
+	isb();
+	mtcp(XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC,(adr & (~0x3F)));
+	/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+* Flush the Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the written to system memory first before the
+* before the line is invalidated.
+*
+* @param	Start address of range to be flushed.
+* @param	Length of range to be flushed in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheFlushRange(INTPTR adr, u32 len)
+{
+	const u32 cacheline = 64U;
+	u32 end;
+	u32 tempadr = adr;
+	u32 tempend;
+	u32 currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	if (len != 0U) {
+		end = tempadr + len;
+		tempend = end;
+
+		if ((tempadr & (cacheline-1U)) != 0U) {
+			tempadr &= (~(cacheline - 1U));
+			Xil_DCacheFlushLine(tempadr);
+			tempadr += cacheline;
+		}
+		if ((tempend & (cacheline-1U)) != 0U) {
+			tempend &= (~(cacheline - 1U));
+			Xil_DCacheFlushLine(tempend);
+		}
+
+		while (tempadr < tempend) {
+			/* Select cache level 0 and D cache in CSSR */
+			mtcp(XREG_CP15_CACHE_SIZE_SEL,0x0);
+			/* Invalidate Data cache line */
+			mtcp(XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC,(tempadr & (~0x3F)));
+			/* Wait for invalidate to complete */
+			dsb();
+			/* Select cache level 0 and D cache in CSSR */
+			mtcp(XREG_CP15_CACHE_SIZE_SEL,0x2);
+			/* Invalidate Data cache line */
+			mtcp(XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC,(tempadr & (~0x3F)));
+			/* Wait for invalidate to complete */
+			dsb();
+			tempadr += cacheline;
+		}
+	}
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Enable the instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheEnable(void)
+{
+	u32 CtrlReg;
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+	/* enable caches only if they are disabled */
+	if((CtrlReg & XREG_CONTROL_ICACHE_BIT)==0x00000000U){
+	/* invalidate the instruction cache */
+	Xil_ICacheInvalidate();
+
+	CtrlReg |= XREG_CONTROL_ICACHE_BIT;
+	/* enable the instruction cache */
+	mtcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+	}
+}
+
+/****************************************************************************
+*
+* Disable the instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheDisable(void)
+{
+	u32 CtrlReg;
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+	/* invalidate the instruction cache */
+	Xil_ICacheInvalidate();
+	CtrlReg &= ~(XREG_CONTROL_ICACHE_BIT);
+	/* disable the instruction cache */
+	mtcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+
+}
+
+/****************************************************************************
+*
+* Invalidate the entire instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheInvalidate(void)
+{
+	unsigned int currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	mtcp(XREG_CP15_CACHE_SIZE_SEL,0x1);
+	dsb();
+	/* invalidate the instruction cache */
+	mtcp(XREG_CP15_INVAL_IC_POU,0x0);
+	/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate an instruction cache line.	If the instruction specified by the
+* parameter adr is cached by the instruction cache, the cacheline containing
+* that instruction is invalidated.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_ICacheInvalidateLine(u32 adr)
+{
+	u32 currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL,0x1);
+	/*Invalidate I Cache line*/
+	mtcp(XREG_CP15_INVAL_IC_LINE_MVA_POU,adr & (~0x3F));
+	/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate the instruction cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated. If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheInvalidateRange(INTPTR adr, u32 len)
+{
+	const u32 cacheline = 64U;
+	u32 end;
+	u32 tempadr = adr;
+	u32 tempend;
+	u32 currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0x00000000U) {
+		end = tempadr + len;
+		tempend = end;
+		tempadr &= ~(cacheline - 0x00000001U);
+
+		/* Select cache Level 0 I-cache in CSSR */
+		mtcp(XREG_CP15_CACHE_SIZE_SEL,0x1);
+		while (tempadr < tempend) {
+			/*Invalidate I Cache line*/
+			mtcp(XREG_CP15_INVAL_IC_LINE_MVA_POU,adr & (~0x3F));
+
+			tempadr += cacheline;
+		}
+	}
+/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_cache.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_cache.h
new file mode 100644
index 0000000..a97eabd
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_cache.h
@@ -0,0 +1,76 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.h
+*
+* Contains required functions for the ARM cache functionality
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.2	pkp  28/05/15 First release
+* 

+*
+******************************************************************************/
+#ifndef XIL_CACHE_H
+#define XIL_CACHE_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void Xil_DCacheEnable(void);
+void Xil_DCacheDisable(void);
+void Xil_DCacheInvalidate(void);
+void Xil_DCacheInvalidateRange(INTPTR adr, u32 len);
+void Xil_DCacheFlush(void);
+void Xil_DCacheFlushRange(INTPTR adr, u32 len);
+void Xil_DCacheInvalidateLine(u32 adr);
+void Xil_DCacheFlushLine(u32 adr);
+
+void Xil_ICacheInvalidateLine(u32 adr);
+void Xil_ICacheEnable(void);
+void Xil_ICacheDisable(void);
+void Xil_ICacheInvalidate(void);
+void Xil_ICacheInvalidateRange(INTPTR adr, u32 len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_cache_l.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_cache_l.h
new file mode 100644
index 0000000..f3ddc49
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_cache_l.h
@@ -0,0 +1,67 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache_l.h
+*
+* Contains L1 and L2 specific functions for the ARM cache functionality
+* used by xcache.c. This functionality is being made available here for
+* more sophisticated users.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a ecm  01/24/10 First release
+* 

+*
+******************************************************************************/
+#ifndef XIL_CACHE_MACH_H
+#define XIL_CACHE_MACH_H
+
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Function Prototypes ******************************/
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_exception.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_exception.c
new file mode 100644
index 0000000..005da49
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_exception.c
@@ -0,0 +1,230 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xil_exception.c
+*
+* This file contains low-level driver functions for the Cortex A53 exception
+* Handler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp  	 28/05/15 First release
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+#include "xpseudo_asm.h"
+#include "xdebug.h"
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Function Prototypes *****************************/
+static void Xil_ExceptionNullHandler(void *Data);
+/************************** Variable Definitions *****************************/
+/*
+ * Exception vector table to store handlers for each exception vector.
+ */
+XExc_VectorTableEntry XExc_VectorTable[XIL_EXCEPTION_ID_LAST + 1] =
+{
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_PrefetchAbortHandler, NULL},
+	{Xil_DataAbortHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+};
+
+u32 DataAbortAddr;       /* Address of instruction causing data abort */
+u32 PrefetchAbortAddr;   /* Address of instruction causing prefetch abort */
+/*****************************************************************************/
+
+/****************************************************************************/
+/**
+*
+* This function is a stub Handler that is the default Handler that gets called
+* if the application has not setup a Handler for a specific  exception. The
+* function interface has to match the interface specified for a Handler even
+* though none of the arguments are used.
+*
+* @param	Data is unused by this function.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void Xil_ExceptionNullHandler(void *Data)
+{
+	(void *)Data;
+DieLoop: goto DieLoop;
+}
+
+/****************************************************************************/
+/**
+* The function is a common API used to initialize exception handlers across all
+* processors supported. For ARM CortexA53, the exception handlers are being
+* initialized statically and hence this function does not do anything.
+* However, it is still present to avoid any compilation issues in case an
+* application uses this API and also to take care of backward compatibility
+* issues (in earlier versions of BSPs, this API was being used to initialize
+* exception handlers).
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xil_ExceptionInit(void)
+{
+	return;
+}
+
+/*****************************************************************************/
+/**
+*
+* Makes the connection between the Id of the exception source and the
+* associated Handler that is to run when the exception is recognized. The
+* argument provided in this call as the Data is used as the argument
+* for the Handler when it is called.
+*
+* @param	exception_id contains the ID of the exception source and should
+*		be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+		See xil_exception_l.h for further information.
+* @param	Handler to the Handler for that exception.
+* @param	Data is a reference to Data that will be passed to the
+*		Handler when it gets called.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRegisterHandler(u32 Exception_id,
+				    Xil_ExceptionHandler Handler,
+				    void *Data)
+{
+	XExc_VectorTable[Exception_id].Handler = Handler;
+	XExc_VectorTable[Exception_id].Data = Data;
+}
+
+/*****************************************************************************/
+/**
+*
+* Removes the Handler for a specific exception Id. The stub Handler is then
+* registered for this exception Id.
+*
+* @param	exception_id contains the ID of the exception source and should
+*		be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+*		See xil_exception_l.h for further information.
+
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRemoveHandler(u32 Exception_id)
+{
+	Xil_ExceptionRegisterHandler(Exception_id,
+				       Xil_ExceptionNullHandler,
+				       NULL);
+}
+
+
+/*****************************************************************************/
+/**
+*
+* Default Data abort handler which prints data fault status register through
+* which information about data fault can be acquired
+*
+* @param	None
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+
+void Xil_DataAbortHandler(void *CallBackRef){
+	u32 FaultStatus;
+
+	FaultStatus = mfcp(XREG_CP15_DATA_FAULT_STATUS);
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Data abort with Data Fault Status Register  %x\n",FaultStatus);
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Address of Instrcution causing Data abort %x\n",DataAbortAddr);
+	while(1) {
+		;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* Default Prefetch abort handler which prints prefetch fault status register through
+* which information about instruction prefetch fault can be acquired
+*
+* @param	None
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_PrefetchAbortHandler(void *CallBackRef){
+	u32 FaultStatus;
+
+	FaultStatus = mfcp(XREG_CP15_INST_FAULT_STATUS);
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Prefetch abort with Instruction Fault Status Register  %x\n",FaultStatus);
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Address of Instrcution causing Prefetch abort %x\n",PrefetchAbortAddr);
+	while(1) {
+		;
+	}
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_exception.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_exception.h
new file mode 100644
index 0000000..d7bab6a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_exception.h
@@ -0,0 +1,168 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_exception.h
+*
+* This header file contains ARM Cortex A53 specific exception related APIs.
+* For exception related functions that can be used across all Xilinx supported
+* processors, please use xil_exception.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp  	 28/05/15 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_EXCEPTION_H /* prevent circular inclusions */
+#define XIL_EXCEPTION_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions ****************************/
+
+#define XIL_EXCEPTION_FIQ	XREG_CPSR_FIQ_ENABLE
+#define XIL_EXCEPTION_IRQ	XREG_CPSR_IRQ_ENABLE
+#define XIL_EXCEPTION_ALL	(XREG_CPSR_FIQ_ENABLE | XREG_CPSR_IRQ_ENABLE)
+
+#define XIL_EXCEPTION_ID_FIRST			0U
+#define XIL_EXCEPTION_ID_RESET			0U
+#define XIL_EXCEPTION_ID_UNDEFINED_INT		1U
+#define XIL_EXCEPTION_ID_SWI_INT		2U
+#define XIL_EXCEPTION_ID_PREFETCH_ABORT_INT	3U
+#define XIL_EXCEPTION_ID_DATA_ABORT_INT		4U
+#define XIL_EXCEPTION_ID_IRQ_INT		5U
+#define XIL_EXCEPTION_ID_FIQ_INT		6U
+#define XIL_EXCEPTION_ID_LAST			6U
+
+/*
+ * XIL_EXCEPTION_ID_INT is defined for all Xilinx processors.
+ */
+#define XIL_EXCEPTION_ID_INT	XIL_EXCEPTION_ID_IRQ_INT
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef is the exception handler function.
+ */
+typedef void (*Xil_ExceptionHandler)(void *data);
+typedef void (*Xil_InterruptHandler)(void *data);
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* Enable Exceptions.
+*
+* @param	Mask for exceptions to be enabled.
+*
+* @return	None.
+*
+* @note		If bit is 0, exception is enabled.
+*		C-Style signature: void Xil_ExceptionEnableMask(Mask)
+*
+******************************************************************************/
+#define Xil_ExceptionEnableMask(Mask)	\
+		mtcpsr(mfcpsr() & ~ ((Mask) & XIL_EXCEPTION_ALL))
+
+/****************************************************************************/
+/**
+* Enable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionEnable() \
+		Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ)
+
+/****************************************************************************/
+/**
+* Disable Exceptions.
+*
+* @param	Mask for exceptions to be enabled.
+*
+* @return	None.
+*
+* @note		If bit is 1, exception is disabled.
+*		C-Style signature: Xil_ExceptionDisableMask(Mask)
+*
+******************************************************************************/
+
+#define Xil_ExceptionDisableMask(Mask)	\
+		mtcpsr(mfcpsr() | ((Mask) & XIL_EXCEPTION_ALL))
+
+/****************************************************************************/
+/**
+* Disable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionDisable() \
+		Xil_ExceptionDisableMask(XIL_EXCEPTION_IRQ)
+
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+extern void Xil_ExceptionRegisterHandler(u32 Exception_id,
+					 Xil_ExceptionHandler Handler,
+					 void *Data);
+
+extern void Xil_ExceptionRemoveHandler(u32 Exception_id);
+
+extern void Xil_ExceptionInit(void);
+extern void Xil_DataAbortHandler(void *CallBackRef);
+extern void Xil_PrefetchAbortHandler(void *CallBackRef);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_EXCEPTION_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_io.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_io.c
new file mode 100644
index 0000000..f702aea
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_io.c
@@ -0,0 +1,340 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.c
+*
+* Contains I/O functions for memory-mapped or non-memory-mapped I/O
+* architectures.  These functions encapsulate Cortex A53 architecture-specific
+* I/O requirements.
+*
+* @note
+*
+* This file contains architecture-dependent code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp  	 28/05/15 First release
+* 

+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xpseudo_asm.h"
+
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for an 8-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u8 Xil_In8(INTPTR Addr)
+{
+	return *(volatile u8 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 16-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_In16(INTPTR Addr)
+{
+	return *(volatile u16 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 32-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_In32(INTPTR Addr)
+{
+	return *(volatile u32 *) Addr;
+}
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for an 8-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out8(INTPTR Addr, u8 Value)
+{
+	u8 *LocalAddr = (u8 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 16-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out16(INTPTR Addr, u16 Value)
+{
+	u16 *LocalAddr = (u16 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 32-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out32(INTPTR Addr, u32 Value)
+{
+	u32 *LocalAddr = (u32 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 16-bit memory location by reading from the
+* specified address and returning the byte-swapped Value read from that
+* address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The byte-swapped Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_In16BE(INTPTR Addr)
+{
+	u16 temp;
+	u16 result;
+
+	temp = Xil_In16(Addr);
+
+	result = Xil_EndianSwap16(temp);
+
+	return result;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 32-bit memory location by reading from the
+* specified address and returning the byte-swapped Value read from that
+* address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The byte-swapped Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_In32BE(INTPTR Addr)
+{
+	u32 temp;
+	u32 result;
+
+	temp = Xil_In32(Addr);
+
+	result = Xil_EndianSwap32(temp);
+
+	return result;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 16-bit memory location by writing the
+* specified Value to the the specified address. The Value is byte-swapped
+* before being written.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out16BE(INTPTR Addr, u16 Value)
+{
+	u16 temp;
+
+	temp = Xil_EndianSwap16(Value);
+
+    Xil_Out16(Addr, temp);
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 32-bit memory location by writing the
+* specified Value to the the specified address. The Value is byte-swapped
+* before being written.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out32BE(INTPTR Addr, u32 Value)
+{
+	u32 temp;
+
+	temp = Xil_EndianSwap32(Value);
+
+    Xil_Out32(Addr, temp);
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a 16-bit endian converion.
+*
+* @param	Data contains the value to be converted.
+*
+* @return	converted value.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_EndianSwap16(u16 Data)
+{
+	return (u16) (((Data & 0xFF00U) >> 8U) | ((Data & 0x00FFU) << 8U));
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a 32-bit endian converion.
+*
+* @param	Data contains the value to be converted.
+*
+* @return	converted value.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_EndianSwap32(u32 Data)
+{
+	u16 LoWord;
+	u16 HiWord;
+
+	/* get each of the half words from the 32 bit word */
+
+	LoWord = (u16) (Data & 0x0000FFFFU);
+	HiWord = (u16) ((Data & 0xFFFF0000U) >> 16U);
+
+	/* byte swap each of the 16 bit half words */
+
+	LoWord = (((LoWord & 0xFF00U) >> 8U) | ((LoWord & 0x00FFU) << 8U));
+	HiWord = (((HiWord & 0xFF00U) >> 8U) | ((HiWord & 0x00FFU) << 8U));
+
+	/* swap the half words before returning the value */
+
+	return ((((u32)LoWord) << (u32)16U) | (u32)HiWord);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_io.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_io.h
new file mode 100644
index 0000000..5a277f0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_io.h
@@ -0,0 +1,237 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.h
+*
+* This file contains the interface for the general IO component, which
+* encapsulates the Input/Output functions for processors that do not
+* require any special I/O handling.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp  	 28/05/15 First release
+* 

+******************************************************************************/
+
+#ifndef XIL_IO_H           /* prevent circular inclusions */
+#define XIL_IO_H           /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+#include "xil_printf.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+#  define SYNCHRONIZE_IO	dmb()
+#  define INST_SYNC		isb()
+#  define DATA_SYNC		dsb()
+
+
+/*****************************************************************************/
+/**
+*
+* Perform an big-endian input operation for a 16-bit memory location
+* by reading from the specified address and returning the Value read from
+* that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The Value read from the specified input address with the
+*		proper endianness. The return Value has the same endianness
+*		as that of the processor, i.e. if the processor is
+*		little-engian, the return Value is the byte-swapped Value read
+*		from the address.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_In16LE(Addr) Xil_In16((Addr))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian input operation for a 32-bit memory location
+* by reading from the specified address and returning the Value read from
+* that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The Value read from the specified input address with the
+*		proper endianness. The return Value has the same endianness
+*		as that of the processor, i.e. if the processor is
+*		little-engian, the return Value is the byte-swapped Value read
+*		from the address.
+*
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_In32LE(Addr) Xil_In32((Addr))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian output operation for a 16-bit memory location
+* by writing the specified Value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the Value to be output at the specified address.
+*		The Value has the same endianness as that of the processor.
+*		If the processor is little-endian, the byte-swapped Value is
+*		written to the address.
+*
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Out16LE(Addr, Value) Xil_Out16((Addr), (Value))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian output operation for a 32-bit memory location
+* by writing the specified Value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the Value to be output at the specified address.
+*		The Value has the same endianness as that of the processor.
+*		If the processor is little-endian, the byte-swapped Value is
+*		written to the address.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Out32LE(Addr, Value) Xil_Out32((Addr), (Value))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 32-bit number from host byte order to network byte order.
+*
+* @param	Data the 32-bit number to be converted.
+*
+* @return	The converted 32-bit number in network byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Htonl(Data) Xil_EndianSwap32((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 16-bit number from host byte order to network byte order.
+*
+* @param	Data the 16-bit number to be converted.
+*
+* @return	The converted 16-bit number in network byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Htons(Data) Xil_EndianSwap16((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 32-bit number from network byte order to host byte order.
+*
+* @param	Data the 32-bit number to be converted.
+*
+* @return	The converted 32-bit number in host byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Ntohl(Data) Xil_EndianSwap32((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 16-bit number from network byte order to host byte order.
+*
+* @param	Data the 16-bit number to be converted.
+*
+* @return	The converted 16-bit number in host byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Ntohs(Data) Xil_EndianSwap16((Data))
+
+/************************** Function Prototypes ******************************/
+
+/* The following functions allow the software to be transportable across
+ * processors which may use memory mapped I/O or I/O which is mapped into a
+ * seperate address space.
+ */
+u8 Xil_In8(INTPTR Addr);
+u16 Xil_In16(INTPTR Addr);
+u32 Xil_In32(INTPTR Addr);
+
+void Xil_Out8(INTPTR Addr, u8 Value);
+void Xil_Out16(INTPTR Addr, u16 Value);
+void Xil_Out32(INTPTR Addr, u32 Value);
+
+
+u16 Xil_In16BE(INTPTR Addr);
+u32 Xil_In32BE(INTPTR Addr);
+void Xil_Out16BE(INTPTR Addr, u16 Value);
+void Xil_Out32BE(INTPTR Addr, u32 Value);
+
+u16 Xil_EndianSwap16(u16 Data);
+u32 Xil_EndianSwap32(u32 Data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_mmu.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_mmu.c
new file mode 100644
index 0000000..8705cbe
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_mmu.c
@@ -0,0 +1,152 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.c
+*
+* This file provides APIs for enabling/disabling MMU and setting the memory
+* attributes for sections, in the MMU translation table.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.2	pkp  28/05/15 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+#include "xil_mmu.h"
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+extern u32 MMUTable;
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************
+*
+* Set the memory attributes for a section, in the translation table. Each
+* section covers 1MB of memory.
+*
+* @param	Addr is the address for which attributes are to be set.
+* @param	attrib specifies the attributes for that memory region.
+*
+* @return	None.
+*
+* @note		The MMU and D-cache need not be disabled before changing an
+*		translation table attribute.
+*
+******************************************************************************/
+void Xil_SetTlbAttributes(INTPTR Addr, u32 attrib)
+{
+	u32 *ptr;
+	u32 section;
+
+	section = Addr / 0x100000U;
+	ptr = &MMUTable;
+	ptr += section;
+	if(ptr != NULL) {
+		*ptr = (Addr & 0xFFF00000U) | attrib;
+	}
+
+	Xil_DCacheFlush();
+
+	mtcp(XREG_CP15_INVAL_UTLB_UNLOCKED, 0U);
+	/* Invalidate all branch predictors */
+	mtcp(XREG_CP15_INVAL_BRANCH_ARRAY, 0U);
+
+	dsb(); /* ensure completion of the BP and TLB invalidation */
+    isb(); /* synchronize context on this processor */
+}
+
+/*****************************************************************************
+*
+* Invalidate the caches, enable MMU and D Caches for Cortex A53 processor.
+*
+* @param	None.
+* @return	None.
+*
+******************************************************************************/
+void Xil_EnableMMU(void)
+{
+	u32 Reg;
+	Xil_DCacheInvalidate();
+	Xil_ICacheInvalidate();
+
+	Reg = mfcp(XREG_CP15_SYS_CONTROL);
+	Reg |= (u32)0x05U;
+	mtcp(XREG_CP15_SYS_CONTROL, Reg);
+
+	dsb();
+	isb();
+}
+
+/*****************************************************************************
+*
+* Disable MMU for Cortex A53 processors. This function invalidates the TLBs,
+* Branch Predictor Array and flushed the D Caches before disabling
+* the MMU and D cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+******************************************************************************/
+void Xil_DisableMMU(void)
+{
+	u32 Reg;
+
+	mtcp(XREG_CP15_INVAL_UTLB_UNLOCKED, 0U);
+	mtcp(XREG_CP15_INVAL_BRANCH_ARRAY, 0U);
+	Xil_DCacheFlush();
+	Reg = mfcp(XREG_CP15_SYS_CONTROL);
+	Reg &= (u32)(~0x05U);
+	mtcp(XREG_CP15_SYS_CONTROL, Reg);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_mmu.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_mmu.h
new file mode 100644
index 0000000..757c3ab
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_mmu.h
@@ -0,0 +1,79 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.h
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.2	pkp  28/05/15 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef XIL_MMU_H
+#define XIL_MMU_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void Xil_SetTlbAttributes(INTPTR Addr, u32 attrib);
+void Xil_EnableMMU(void);
+void Xil_DisableMMU(void);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_MMU_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_printf.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_printf.c
new file mode 100644
index 0000000..b66cec1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_printf.c
@@ -0,0 +1,361 @@
+/*---------------------------------------------------*/
+/* Modified from :                                   */
+/* Public Domain version of printf                   */
+/* Rud Merriam, Compsult, Inc. Houston, Tx.          */
+/* For Embedded Systems Programming, 1991            */
+/*                                                   */
+/*---------------------------------------------------*/
+#include "xil_printf.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include 
+#include 
+#include 
+
+static void padding( const s32 l_flag,const struct params_s *par);
+static void outs(const charptr lp, struct params_s *par);
+static void outnum( const s32 n, const s32 base, struct params_s *par);
+static s32 getnum( charptr* linep);
+
+typedef struct params_s {
+    s32 len;
+    s32 num1;
+    s32 num2;
+    char8 pad_character;
+    s32 do_padding;
+    s32 left_flag;
+    s32 unsigned_flag;
+} params_t;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine puts pad characters into the output  */
+/* buffer.                                           */
+/*                                                   */
+static void padding( const s32 l_flag, const struct params_s *par)
+{
+    s32 i;
+
+    if ((par->do_padding != 0) && (l_flag != 0) && (par->len < par->num1)) {
+		i=(par->len);
+        for (; i<(par->num1); i++) {
+#ifdef STDOUT_BASEADDRESS
+            outbyte( par->pad_character);
+#endif
+		}
+    }
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a string to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+static void outs(const charptr lp, struct params_s *par)
+{
+    charptr LocalPtr;
+	LocalPtr = lp;
+    /* pad on left if needed                         */
+	if(LocalPtr != NULL) {
+		par->len = (s32)strlen( LocalPtr);
+	}
+    padding( !(par->left_flag), par);
+
+    /* Move string to the buffer                     */
+    while (((*LocalPtr) != (char8)0) && ((par->num2) != 0)) {
+		(par->num2)--;
+#ifdef STDOUT_BASEADDRESS
+        outbyte(*LocalPtr);
+		LocalPtr += 1;
+#endif
+}
+
+    /* Pad on right if needed                        */
+    /* CR 439175 - elided next stmt. Seemed bogus.   */
+    /* par->len = strlen( lp)                      */
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a number to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+
+static void outnum( const s32 n, const s32 base, struct params_s *par)
+{
+    charptr cp;
+    s32 negative;
+	s32 i;
+    char8 outbuf[32];
+    const char8 digits[] = "0123456789ABCDEF";
+    u32 num;
+    for(i = 0; i<32; i++) {
+	outbuf[i] = '0';
+    }
+
+    /* Check if number is negative                   */
+    if ((par->unsigned_flag == 0) && (base == 10) && (n < 0L)) {
+        negative = 1;
+		num =(-(n));
+    }
+    else{
+        num = n;
+        negative = 0;
+    }
+
+    /* Build number (backwards) in outbuf            */
+    i = 0;
+    do {
+		outbuf[i] = digits[(num % base)];
+		i++;
+		num /= base;
+    } while (num > 0);
+
+    if (negative != 0) {
+		outbuf[i] = '-';
+		i++;
+	}
+
+    outbuf[i] = 0;
+    i--;
+
+    /* Move the converted number to the buffer and   */
+    /* add in the padding where needed.              */
+    par->len = (s32)strlen(outbuf);
+    padding( !(par->left_flag), par);
+    while (&outbuf[i] >= outbuf) {
+#ifdef STDOUT_BASEADDRESS
+	outbyte( outbuf[i] );
+		i--;
+#endif
+}
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine gets a number from the format        */
+/* string.                                           */
+/*                                                   */
+static s32 getnum( charptr* linep)
+{
+    s32 n;
+    s32 ResultIsDigit = 0;
+    charptr cptr;
+    n = 0;
+    cptr = *linep;
+	if(cptr != NULL){
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    while (ResultIsDigit != 0) {
+		if(cptr != NULL){
+			n = ((n*10) + (((s32)*cptr) - (s32)'0'));
+			cptr += 1;
+			if(cptr != NULL){
+				ResultIsDigit = isdigit(((s32)*cptr));
+			}
+		}
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    *linep = ((charptr )(cptr));
+    return(n);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine operates just like a printf/sprintf  */
+/* routine. It outputs a set of data under the       */
+/* control of a formatting string. Not all of the    */
+/* standard C format control are supported. The ones */
+/* provided are primarily those needed for embedded  */
+/* systems work. Primarily the floating point        */
+/* routines are omitted. Other formats could be      */
+/* added easily by following the examples shown for  */
+/* the supported formats.                            */
+/*                                                   */
+
+/* void esp_printf( const func_ptr f_ptr,
+   const charptr ctrl1, ...) */
+void xil_printf( const char8 *ctrl1, ...)
+{
+	s32 Check;
+    s32 long_flag;
+    s32 dot_flag;
+
+    params_t par;
+
+    char8 ch;
+    va_list argp;
+    char8 *ctrl = (char8 *)ctrl1;
+
+    va_start( argp, ctrl1);
+
+    while ((ctrl != NULL) && (*ctrl != (char8)0)) {
+
+        /* move format string chars to buffer until a  */
+        /* format control is found.                    */
+        if (*ctrl != '%') {
+#ifdef STDOUT_BASEADDRESS
+            outbyte(*ctrl);
+			ctrl += 1;
+#endif
+            continue;
+        }
+
+        /* initialize all the flags for this format.   */
+        dot_flag = 0;
+		long_flag = 0;
+        par.unsigned_flag = 0;
+		par.left_flag = 0;
+		par.do_padding = 0;
+        par.pad_character = ' ';
+        par.num2=32767;
+		par.num1=0;
+		par.len=0;
+
+ try_next:
+		if(ctrl != NULL) {
+			ctrl += 1;
+		}
+		if(ctrl != NULL) {
+			ch = *ctrl;
+		}
+		else {
+			ch = *ctrl;
+		}
+
+        if (isdigit((s32)ch) != 0) {
+            if (dot_flag != 0) {
+                par.num2 = getnum(&ctrl);
+			}
+            else {
+                if (ch == '0') {
+                    par.pad_character = '0';
+				}
+				if(ctrl != NULL) {
+			par.num1 = getnum(&ctrl);
+				}
+                par.do_padding = 1;
+            }
+            if(ctrl != NULL) {
+			ctrl -= 1;
+			}
+            goto try_next;
+        }
+
+        switch (tolower((s32)ch)) {
+            case '%':
+#ifdef STDOUT_BASEADDRESS
+                outbyte( '%');
+#endif
+                Check = 1;
+                break;
+
+            case '-':
+                par.left_flag = 1;
+                Check = 0;
+                break;
+
+            case '.':
+                dot_flag = 1;
+                Check = 0;
+                break;
+
+            case 'l':
+                long_flag = 1;
+                Check = 0;
+                break;
+
+            case 'u':
+                par.unsigned_flag = 1;
+                /* fall through */
+            case 'i':
+            case 'd':
+                if ((long_flag != 0) || (ch == 'D')) {
+                    outnum( va_arg(argp, s32), 10L, &par);
+                }
+                else {
+                    outnum( va_arg(argp, s32), 10L, &par);
+                }
+				Check = 1;
+                break;
+            case 'p':
+            case 'X':
+            case 'x':
+                par.unsigned_flag = 1;
+                outnum((s32)va_arg(argp, s32), 16L, &par);
+                Check = 1;
+                break;
+
+            case 's':
+                outs( va_arg( argp, char *), &par);
+                Check = 1;
+                break;
+
+            case 'c':
+#ifdef STDOUT_BASEADDRESS
+                outbyte( va_arg( argp, s32));
+#endif
+                Check = 1;
+                break;
+
+            case '\\':
+                switch (*ctrl) {
+                    case 'a':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x07));
+#endif
+                        break;
+                    case 'h':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x08));
+#endif
+                        break;
+                    case 'r':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x0D));
+#endif
+                        break;
+                    case 'n':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x0D));
+                        outbyte( ((char8)0x0A));
+#endif
+                        break;
+                    default:
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( *ctrl);
+#endif
+                        break;
+                }
+                ctrl += 1;
+                Check = 0;
+                break;
+
+            default:
+		Check = 1;
+		break;
+        }
+        if(Check == 1) {
+			if(ctrl != NULL) {
+				ctrl += 1;
+			}
+                continue;
+        }
+        goto try_next;
+    }
+    va_end( argp);
+}
+
+/*---------------------------------------------------*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_printf.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_printf.h
new file mode 100644
index 0000000..77ba280
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xil_printf.h
@@ -0,0 +1,44 @@
+ #ifndef XIL_PRINTF_H
+ #define XIL_PRINTF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include 
+#include 
+#include 
+#include "xil_types.h"
+#include "xparameters.h"
+
+/*----------------------------------------------------*/
+/* Use the following parameter passing structure to   */
+/* make xil_printf re-entrant.                        */
+/*----------------------------------------------------*/
+
+struct params_s;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+typedef char8* charptr;
+typedef s32 (*func_ptr)(int c);
+
+/*                                                   */
+
+void xil_printf( const char8 *ctrl1, ...);
+void print( const char8 *ptr);
+extern void outbyte (char8 c);
+extern char8 inbyte(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xparameters_ps.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xparameters_ps.h
new file mode 100644
index 0000000..31b8206
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xparameters_ps.h
@@ -0,0 +1,359 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xparameters_ps.h
+*
+* This file contains the address definitions for the hard peripherals
+* attached to the ARM Cortex A53 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.2	pkp  	28/05/15 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef _XPARAMETERS_PS_H_
+#define _XPARAMETERS_PS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock
+ */
+
+/* Canonical definitions for DDR MEMORY */
+#define XPAR_DDR_MEM_BASEADDR		0x00000000U
+#define XPAR_DDR_MEM_HIGHADDR		0x3FFFFFFFU
+
+/* Canonical definitions for Interrupts  */
+#define XPAR_XUARTPS_0_INTR		XPS_UART0_INT_ID
+#define XPAR_XUARTPS_1_INTR		XPS_UART1_INT_ID
+#define XPAR_XIICPS_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_XIICPS_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_XSPIPS_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_XSPIPS_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_XCANPS_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_XCANPS_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_XGPIOPS_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_XEMACPS_0_INTR		XPS_GEM0_INT_ID
+#define XPAR_XEMACPS_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_XEMACPS_1_INTR		XPS_GEM1_INT_ID
+#define XPAR_XEMACPS_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_XEMACPS_2_INTR		XPS_GEM2_INT_ID
+#define XPAR_XEMACPS_2_WAKE_INTR	XPS_GEM2_WAKE_INT_ID
+#define XPAR_XEMACPS_3_INTR		XPS_GEM3_INT_ID
+#define XPAR_XEMACPS_3_WAKE_INTR	XPS_GEM3_WAKE_INT_ID
+#define XPAR_XSDIOPS_0_INTR		XPS_SDIO0_INT_ID
+#define XPAR_XQSPIPS_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_XSDIOPS_1_INTR		XPS_SDIO1_INT_ID
+#define XPAR_XWDTPS_0_INTR		XPS_WDT_INT_ID
+#define XPAR_XDCFG_0_INTR		XPS_DVC_INT_ID
+#define XPAR_SCUTIMER_INTR		XPS_SCU_TMR_INT_ID
+#define XPAR_SCUWDT_INTR		XPS_SCU_WDT_INT_ID
+#define XPAR_XTTCPS_0_INTR		XPS_TTC0_0_INT_ID
+#define XPAR_XTTCPS_1_INTR		XPS_TTC0_1_INT_ID
+#define XPAR_XTTCPS_2_INTR		XPS_TTC0_2_INT_ID
+#define XPAR_XTTCPS_3_INTR		XPS_TTC1_0_INT_ID
+#define XPAR_XTTCPS_4_INTR		XPS_TTC1_1_INT_ID
+#define XPAR_XTTCPS_5_INTR		XPS_TTC1_2_INT_ID
+#define XPAR_XTTCPS_6_INTR		XPS_TTC2_0_INT_ID
+#define XPAR_XTTCPS_7_INTR		XPS_TTC2_1_INT_ID
+#define XPAR_XTTCPS_8_INTR		XPS_TTC2_2_INT_ID
+#define XPAR_XTTCPS_9_INTR		XPS_TTC3_0_INT_ID
+#define XPAR_XTTCPS_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_XTTCPS_11_INTR		XPS_TTC3_2_INT_ID
+#define XPAR_XDMAPS_0_FAULT_INTR	XPS_DMA0_ABORT_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_0	XPS_DMA0_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_1	XPS_DMA1_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_2	XPS_DMA2_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_3	XPS_DMA3_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_4	XPS_DMA4_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_5	XPS_DMA5_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_6	XPS_DMA6_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_7	XPS_DMA7_INT_ID
+#define XPAR_XNANDPS8_0_INTR        	XPS_NAND_INT_ID
+#define XPAR_XADMAPS_0_INTR 		XPS_ADMA_CH0_INT_ID
+#define XPAR_XADMAPS_1_INTR 		XPS_ADMA_CH1_INT_ID
+#define XPAR_XADMAPS_2_INTR		XPS_ADMA_CH2_INT_ID
+#define XPAR_XADMAPS_3_INTR 		XPS_ADMA_CH3_INT_ID
+#define XPAR_XADMAPS_4_INTR		XPS_ADMA_CH4_INT_ID
+#define XPAR_XADMAPS_5_INTR 		XPS_ADMA_CH5_INT_ID
+#define XPAR_XADMAPS_6_INTR 		XPS_ADMA_CH6_INT_ID
+#define XPAR_XADMAPS_7_INTR 		XPS_ADMA_CH7_INT_ID
+#define XPAR_XCSUDMA_INTR 		XPS_CSU_DMA_INT_ID
+#define XPAR_XMPU_LPD_INTR 		XPS_XMPU_LPD_INT_ID
+#define XPAR_XZDMAPS_0_INTR		XPS_ZDMA_CH0_INT_ID
+#define XPAR_XZDMAPS_1_INTR		XPS_ZDMA_CH1_INT_ID
+#define XPAR_XZDMAPS_2_INTR 		XPS_ZDMA_CH2_INT_ID
+#define XPAR_XZDMAPS_3_INTR 		XPS_ZDMA_CH3_INT_ID
+#define XPAR_XZDMAPS_4_INTR		XPS_ZDMA_CH4_INT_ID
+#define XPAR_XZDMAPS_5_INTR 		XPS_ZDMA_CH5_INT_ID
+#define XPAR_XZDMAPS_6_INTR 		XPS_ZDMA_CH6_INT_ID
+#define XPAR_XZDMAPS_7_INTR 		XPS_ZDMA_CH7_INT_ID
+#define XPAR_XMPU_FPD_INTR 		XPS_XMPU_FPD_INT_ID
+#define XPAR_XCCI_FPD_INTR 		XPS_FPD_CCI_INT_ID
+#define XPAR_XSMMU_FPD_INTR 		XPS_FPD_SMMU_INT_ID
+#define XPAR_XUSBPS_0_INTR		XPS_USB3_0_ENDPT_INT_ID
+#define XPAR_XUSBPS_1_INTR		XPS_USB3_1_ENDPT_INT_ID
+#define	XPAR_XRTCPSU_ALARM_INTR 	XPS_RTC_ALARM_INT_ID
+#define	XPAR_XRTCPSU_SECONDS_INTR	XPS_RTC_SEC_INT_ID
+
+/* Canonical definitions for SCU GIC */
+#define XPAR_SCUGIC_NUM_INSTANCES	1U
+#define XPAR_SCUGIC_SINGLE_DEVICE_ID	0U
+#define XPAR_SCUGIC_CPU_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00001000U)
+#define XPAR_SCUGIC_DIST_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00002000U)
+#define XPAR_SCUGIC_ACK_BEFORE		0U
+
+#define XPAR_CPU_CORTEXA53_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA53_0_CPU_CLK_FREQ_HZ
+
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock. These have been put for backwards compatibilty
+ */
+
+
+#define XPS_SYS_CTRL_BASEADDR	0xFF180000U
+#define XPS_SCU_PERIPH_BASE		0xF9000000U
+
+
+
+/* Shared Peripheral Interrupts (SPI) */
+
+/* FIXME */
+/*#define XPS_FPGA0_INT_ID		100U */
+#define XPS_FPGA1_INT_ID		62U
+#define XPS_FPGA2_INT_ID		63U
+#define XPS_FPGA3_INT_ID		64U
+#define XPS_FPGA4_INT_ID		65U
+#define XPS_FPGA5_INT_ID		66U
+#define XPS_FPGA6_INT_ID		67U
+#define XPS_FPGA7_INT_ID		68U
+#define XPS_DMA4_INT_ID			72U
+#define XPS_DMA5_INT_ID			73U
+#define XPS_DMA6_INT_ID			74U
+#define XPS_DMA7_INT_ID			75U
+#define XPS_FPGA8_INT_ID		84U
+#define XPS_FPGA9_INT_ID		85U
+#define XPS_FPGA10_INT_ID		86U
+#define XPS_FPGA11_INT_ID		87U
+#define XPS_FPGA12_INT_ID		88U
+#define XPS_FPGA13_INT_ID		89U
+#define XPS_FPGA14_INT_ID		90U
+#define XPS_FPGA15_INT_ID		91U
+
+/* Updated Interrupt-IDs */
+#define XPS_OCMINTR_INT_ID		(10U + 32U)
+#define XPS_NAND_INT_ID        		(14U + 32U)
+#define XPS_QSPI_INT_ID			(15U + 32U)
+#define XPS_GPIO_INT_ID			(16U + 32U)
+#define XPS_I2C0_INT_ID			(17U + 32U)
+#define XPS_I2C1_INT_ID			(18U + 32U)
+#define XPS_SPI0_INT_ID			(19U + 32U)
+#define XPS_SPI1_INT_ID			(20U + 32U)
+#define XPS_UART0_INT_ID		(21U + 32U)
+#define XPS_UART1_INT_ID		(22U + 32U)
+#define XPS_CAN0_INT_ID			(23U + 32U)
+#define XPS_CAN1_INT_ID			(24U + 32U)
+#define	XPS_RTC_ALARM_INT_ID 	(26U + 32U)
+#define	XPS_RTC_SEC_INT_ID	 	(27U + 32U)
+#define XPS_WDT_INT_ID			(52U + 32U)
+#define XPS_TTC0_0_INT_ID		(36U + 32U)
+#define XPS_TTC0_1_INT_ID		(37U + 32U)
+#define XPS_TTC0_2_INT_ID 		(38U + 32U)
+#define XPS_TTC1_0_INT_ID		(39U + 32U)
+#define XPS_TTC1_1_INT_ID		(40U + 32U)
+#define XPS_TTC1_2_INT_ID		(41U + 32U)
+#define XPS_TTC2_0_INT_ID		(42U + 32U)
+#define XPS_TTC2_1_INT_ID		(43U + 32U)
+#define XPS_TTC2_2_INT_ID		(44U + 32U)
+#define XPS_TTC3_0_INT_ID		(45U + 32U)
+#define XPS_TTC3_1_INT_ID		(46U + 32U)
+#define XPS_TTC3_2_INT_ID		(47U + 32U)
+#define XPS_SDIO0_INT_ID		(48U + 32U)
+#define XPS_SDIO1_INT_ID		(49U + 32U)
+#define XPS_GEM0_INT_ID			(57U + 32U)
+#define XPS_GEM0_WAKE_INT_ID		(58U + 32U)
+#define XPS_GEM1_INT_ID			(59U + 32U)
+#define XPS_GEM1_WAKE_INT_ID		(60U + 32U)
+#define XPS_GEM2_INT_ID			(61U + 32U)
+#define XPS_GEM2_WAKE_INT_ID		(62U + 32U)
+#define XPS_GEM3_INT_ID			(63U + 32U)
+#define XPS_GEM3_WAKE_INT_ID		(64U + 32U)
+#define XPS_USB3_0_ENDPT_INT_ID		(65U + 32U)
+#define XPS_USB3_1_ENDPT_INT_ID		(70U + 32U)
+#define XPS_ADMA_CH0_INT_ID		(77U + 32U)
+#define XPS_ADMA_CH1_INT_ID		(78U + 32U)
+#define XPS_ADMA_CH2_INT_ID		(79U + 32U)
+#define XPS_ADMA_CH3_INT_ID		(80U + 32U)
+#define XPS_ADMA_CH4_INT_ID		(81U + 32U)
+#define XPS_ADMA_CH5_INT_ID		(82U + 32U)
+#define XPS_ADMA_CH6_INT_ID		(83U + 32U)
+#define XPS_ADMA_CH7_INT_ID		(84U + 32U)
+#define XPS_CSU_DMA_INT_ID		(86U + 32U)
+#define XPS_XMPU_LPD_INT_ID		(88U + 32U)
+#define XPS_ZDMA_CH0_INT_ID		(124U + 32U)
+#define XPS_ZDMA_CH1_INT_ID		(125U + 32U)
+#define XPS_ZDMA_CH2_INT_ID		(126U + 32U)
+#define XPS_ZDMA_CH3_INT_ID		(127U + 32U)
+#define XPS_ZDMA_CH4_INT_ID		(128U + 32U)
+#define XPS_ZDMA_CH5_INT_ID		(129U + 32U)
+#define XPS_ZDMA_CH6_INT_ID		(130U + 32U)
+#define XPS_ZDMA_CH7_INT_ID		(131U + 32U)
+#define XPS_XMPU_FPD_INT_ID		(134U + 32U)
+#define XPS_FPD_CCI_INT_ID		(154U + 32U)
+#define XPS_FPD_SMMU_INT_ID		(155U + 32U)
+
+/* Private Peripheral Interrupts (PPI) */
+/*#define XPS_GLOBAL_TMR_INT_ID		27	 SCU Global Timer interrupt */
+/*#define XPS_FIQ_INT_ID			28	 FIQ from FPGA fabric */
+/*#define XPS_SCU_TMR_INT_ID		29	 SCU Private Timer interrupt */
+/*#define XPS_SCU_WDT_INT_ID		30	 SCU Private WDT interrupt */
+/*#define XPS_IRQ_INT_ID			31	 IRQ from FPGA fabric */
+
+/* REDEFINES for TEST APP */
+/* Definitions for UART */
+#define XPAR_PS7_UART_0_INTR		XPS_UART0_INT_ID
+#define XPAR_PS7_UART_1_INTR		XPS_UART1_INT_ID
+#define XPAR_PS7_USB_0_INTR		XPS_USB0_INT_ID
+#define XPAR_PS7_USB_1_INTR		XPS_USB1_INT_ID
+#define XPAR_PS7_I2C_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_PS7_I2C_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_PS7_SPI_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_PS7_SPI_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_PS7_CAN_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_PS7_CAN_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_PS7_GPIO_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_PS7_ETHERNET_0_INTR	XPS_GEM0_INT_ID
+#define XPAR_PS7_ETHERNET_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_1_INTR	XPS_GEM1_INT_ID
+#define XPAR_PS7_ETHERNET_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_2_INTR	XPS_GEM2_INT_ID
+#define XPAR_PS7_ETHERNET_2_WAKE_INTR	XPS_GEM2_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_3_INTR	XPS_GEM3_INT_ID
+#define XPAR_PS7_ETHERNET_3_WAKE_INTR	XPS_GEM3_WAKE_INT_ID
+
+#define XPAR_PS7_QSPI_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_PS7_WDT_0_INTR		XPS_WDT_INT_ID
+#define XPAR_PS7_SCUWDT_0_INTR		XPS_SCU_WDT_INT_ID
+#define XPAR_PS7_SCUTIMER_0_INTR	XPS_SCU_TMR_INT_ID
+#define XPAR_PS7_XADC_0_INTR		XPS_SYSMON_INT_ID
+
+#define XPAR_PSU_UART_0_INTR        XPS_UART0_INT_ID
+#define XPAR_PSU_UART_1_INTR        XPS_UART1_INT_ID
+#define XPAR_PSU_USB_0_INTR     XPS_USB0_INT_ID
+#define XPAR_PSU_USB_1_INTR     XPS_USB1_INT_ID
+#define XPAR_PSU_I2C_0_INTR     XPS_I2C0_INT_ID
+#define XPAR_PSU_I2C_1_INTR     XPS_I2C1_INT_ID
+#define XPAR_PSU_SPI_0_INTR     XPS_SPI0_INT_ID
+#define XPAR_PSU_SPI_1_INTR     XPS_SPI1_INT_ID
+#define XPAR_PSU_CAN_0_INTR     XPS_CAN0_INT_ID
+#define XPAR_PSU_CAN_1_INTR     XPS_CAN1_INT_ID
+#define XPAR_PSU_GPIO_0_INTR        XPS_GPIO_INT_ID
+#define XPAR_PSU_ETHERNET_0_INTR    XPS_GEM0_INT_ID
+#define XPAR_PSU_ETHERNET_0_WAKE_INTR   XPS_GEM0_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_1_INTR    XPS_GEM1_INT_ID
+#define XPAR_PSU_ETHERNET_1_WAKE_INTR   XPS_GEM1_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_2_INTR    XPS_GEM2_INT_ID
+#define XPAR_PSU_ETHERNET_2_WAKE_INTR   XPS_GEM2_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_3_INTR    XPS_GEM3_INT_ID
+#define XPAR_PSU_ETHERNET_3_WAKE_INTR   XPS_GEM3_WAKE_INT_ID
+#define XPAR_PSU_QSPI_0_INTR        XPS_QSPI_INT_ID
+#define XPAR_PSU_WDT_0_INTR     XPS_WDT_INT_ID
+#define XPAR_PSU_SCUWDT_0_INTR      XPS_SCU_WDT_INT_ID
+#define XPAR_PSU_SCUTIMER_0_INTR    XPS_SCU_TMR_INT_ID
+#define XPAR_PSU_XADC_0_INTR        XPS_SYSMON_INT_ID
+#define XPAR_PSU_TTC_0_INTR         XPS_TTC0_0_INT_ID
+#define XPAR_PSU_TTC_1_INTR         XPS_TTC0_1_INT_ID
+#define XPAR_PSU_TTC_2_INTR         XPS_TTC0_2_INT_ID
+#define XPAR_PSU_TTC_3_INTR         XPS_TTC1_0_INT_ID
+#define XPAR_PSU_TTC_4_INTR         XPS_TTC1_1_INT_ID
+#define XPAR_PSU_TTC_5_INTR         XPS_TTC1_2_INT_ID
+#define XPAR_PSU_TTC_6_INTR			XPS_TTC2_0_INT_ID
+#define XPAR_PSU_TTC_7_INTR			XPS_TTC2_1_INT_ID
+#define XPAR_PSU_TTC_8_INTR			XPS_TTC2_2_INT_ID
+#define XPAR_PSU_TTC_9_INTR			XPS_TTC3_0_INT_ID
+#define XPAR_PSU_TTC_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_PSU_TTC_11_INTR		XPS_TTC3_2_INT_ID
+
+
+#define XPAR_XADCPS_NUM_INSTANCES 1U
+#define XPAR_XADCPS_0_DEVICE_ID   0U
+#define XPAR_XADCPS_0_BASEADDR	  (0xF8007000U)
+#define XPAR_XADCPS_INT_ID		XPS_SYSMON_INT_ID
+
+/* For backwards compatibilty */
+#define XPAR_XUARTPS_0_CLOCK_HZ		XPAR_XUARTPS_0_UART_CLK_FREQ_HZ
+#define XPAR_XUARTPS_1_CLOCK_HZ		XPAR_XUARTPS_1_UART_CLK_FREQ_HZ
+#define XPAR_XTTCPS_0_CLOCK_HZ		XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_1_CLOCK_HZ		XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_2_CLOCK_HZ		XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_3_CLOCK_HZ		XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_4_CLOCK_HZ		XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_5_CLOCK_HZ		XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ
+#define XPAR_XIICPS_0_CLOCK_HZ		XPAR_XIICPS_0_I2C_CLK_FREQ_HZ
+#define XPAR_XIICPS_1_CLOCK_HZ		XPAR_XIICPS_1_I2C_CLK_FREQ_HZ
+
+#define XPAR_XQSPIPS_0_CLOCK_HZ		XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ
+
+#ifdef XPAR_CPU_CORTEXA53_0_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXA53_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA53_0_CPU_CLK_FREQ_HZ
+#endif
+
+#ifdef XPAR_CPU_CORTEXA53_1_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXA53_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA53_1_CPU_CLK_FREQ_HZ
+#endif
+
+#define XPAR_SCUTIMER_DEVICE_ID		0U
+#define XPAR_SCUWDT_DEVICE_ID		0U
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xpseudo_asm.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xpseudo_asm.h
new file mode 100644
index 0000000..f53010c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xpseudo_asm.h
@@ -0,0 +1,54 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm.h
+*
+* This header file contains macros for using inline assembler code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.2	pkp  	28/05/15 First release
+* 

+*
+******************************************************************************/
+#ifndef XPSEUDO_ASM_H
+#define XPSEUDO_ASM_H
+
+#include "xreg_cortexa53.h"
+#include "xpseudo_asm_gcc.h"
+
+#endif /* XPSEUDO_ASM_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xreg_cortexa53.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xreg_cortexa53.h
new file mode 100644
index 0000000..17382e6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xreg_cortexa53.h
@@ -0,0 +1,412 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xreg_cortexa53.h
+*
+* This header file contains definitions for using inline assembler code. It is
+* written specifically for the GNU.
+*
+* All of the ARM Cortex A53 GPRs, SPRs, and Debug Registers are defined along
+* with the positions of the bits within the registers.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.2	pkp  	 28/05/15 First release
+* 

+*
+******************************************************************************/
+#ifndef XREG_CORTEXA53_H
+#define XREG_CORTEXA53_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* GPRs */
+#define XREG_GPR0				r0
+#define XREG_GPR1				r1
+#define XREG_GPR2				r2
+#define XREG_GPR3				r3
+#define XREG_GPR4				r4
+#define XREG_GPR5				r5
+#define XREG_GPR6				r6
+#define XREG_GPR7				r7
+#define XREG_GPR8				r8
+#define XREG_GPR9				r9
+#define XREG_GPR10				r10
+#define XREG_GPR11				r11
+#define XREG_GPR12				r12
+#define XREG_GPR13				r13
+#define XREG_GPR14				r14
+#define XREG_GPR15				r15
+#define XREG_CPSR				cpsr
+
+/* Coprocessor number defines */
+#define XREG_CP0				0
+#define XREG_CP1				1
+#define XREG_CP2				2
+#define XREG_CP3				3
+#define XREG_CP4				4
+#define XREG_CP5				5
+#define XREG_CP6				6
+#define XREG_CP7				7
+#define XREG_CP8				8
+#define XREG_CP9				9
+#define XREG_CP10				10
+#define XREG_CP11				11
+#define XREG_CP12				12
+#define XREG_CP13				13
+#define XREG_CP14				14
+#define XREG_CP15				15
+
+/* Coprocessor control register defines */
+#define XREG_CR0				cr0
+#define XREG_CR1				cr1
+#define XREG_CR2				cr2
+#define XREG_CR3				cr3
+#define XREG_CR4				cr4
+#define XREG_CR5				cr5
+#define XREG_CR6				cr6
+#define XREG_CR7				cr7
+#define XREG_CR8				cr8
+#define XREG_CR9				cr9
+#define XREG_CR10				cr10
+#define XREG_CR11				cr11
+#define XREG_CR12				cr12
+#define XREG_CR13				cr13
+#define XREG_CR14				cr14
+#define XREG_CR15				cr15
+
+/* Current Processor Status Register (CPSR) Bits */
+#define XREG_CPSR_THUMB_MODE			0x20
+#define XREG_CPSR_MODE_BITS			0x1F
+#define XREG_CPSR_SYSTEM_MODE			0x1F
+#define XREG_CPSR_UNDEFINED_MODE		0x1B
+#define XREG_CPSR_DATA_ABORT_MODE		0x17
+#define XREG_CPSR_SVC_MODE			0x13
+#define XREG_CPSR_IRQ_MODE			0x12
+#define XREG_CPSR_FIQ_MODE			0x11
+#define XREG_CPSR_USER_MODE			0x10
+
+#define XREG_CPSR_IRQ_ENABLE			0x80
+#define XREG_CPSR_FIQ_ENABLE			0x40
+
+#define XREG_CPSR_N_BIT				0x80000000
+#define XREG_CPSR_Z_BIT				0x40000000
+#define XREG_CPSR_C_BIT				0x20000000
+#define XREG_CPSR_V_BIT				0x10000000
+
+
+/* CP15 defines */
+
+/* C0 Register defines */
+#define XREG_CP15_MAIN_ID			"p15, 0, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_TYPE			"p15, 0, %0,  c0,  c0, 1"
+#define XREG_CP15_TCM_TYPE			"p15, 0, %0,  c0,  c0, 2"
+#define XREG_CP15_TLB_TYPE			"p15, 0, %0,  c0,  c0, 3"
+#define XREG_CP15_MULTI_PROC_AFFINITY		"p15, 0, %0,  c0,  c0, 5"
+
+#define XREG_CP15_PROC_FEATURE_0		"p15, 0, %0,  c0,  c1, 0"
+#define XREG_CP15_PROC_FEATURE_1		"p15, 0, %0,  c0,  c1, 1"
+#define XREG_CP15_DEBUG_FEATURE_0		"p15, 0, %0,  c0,  c1, 2"
+#define XREG_CP15_MEMORY_FEATURE_0		"p15, 0, %0,  c0,  c1, 4"
+#define XREG_CP15_MEMORY_FEATURE_1		"p15, 0, %0,  c0,  c1, 5"
+#define XREG_CP15_MEMORY_FEATURE_2		"p15, 0, %0,  c0,  c1, 6"
+#define XREG_CP15_MEMORY_FEATURE_3		"p15, 0, %0,  c0,  c1, 7"
+
+#define XREG_CP15_INST_FEATURE_0		"p15, 0, %0,  c0,  c2, 0"
+#define XREG_CP15_INST_FEATURE_1		"p15, 0, %0,  c0,  c2, 1"
+#define XREG_CP15_INST_FEATURE_2		"p15, 0, %0,  c0,  c2, 2"
+#define XREG_CP15_INST_FEATURE_3		"p15, 0, %0,  c0,  c2, 3"
+#define XREG_CP15_INST_FEATURE_4		"p15, 0, %0,  c0,  c2, 4"
+
+#define XREG_CP15_CACHE_SIZE_ID			"p15, 1, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_LEVEL_ID		"p15, 1, %0,  c0,  c0, 1"
+#define XREG_CP15_AUXILARY_ID			"p15, 1, %0,  c0,  c0, 7"
+
+#define XREG_CP15_CACHE_SIZE_SEL		"p15, 2, %0,  c0,  c0, 0"
+
+/* C1 Register Defines */
+#define XREG_CP15_SYS_CONTROL			"p15, 0, %0,  c1,  c0, 0"
+#define XREG_CP15_AUX_CONTROL			"p15, 0, %0,  c1,  c0, 1"
+#define XREG_CP15_CP_ACCESS_CONTROL		"p15, 0, %0,  c1,  c0, 2"
+
+#define XREG_CP15_SECURE_CONFIG			"p15, 0, %0,  c1,  c1, 0"
+#define XREG_CP15_SECURE_DEBUG_ENABLE		"p15, 0, %0,  c1,  c1, 1"
+#define XREG_CP15_NS_ACCESS_CONTROL		"p15, 0, %0,  c1,  c1, 2"
+#define XREG_CP15_VIRTUAL_CONTROL		"p15, 0, %0,  c1,  c1, 3"
+
+
+/* XREG_CP15_CONTROL bit defines */
+#define XREG_CP15_CONTROL_TE_BIT		0x40000000U
+#define XREG_CP15_CONTROL_AFE_BIT		0x20000000U
+#define XREG_CP15_CONTROL_TRE_BIT		0x10000000U
+#define XREG_CP15_CONTROL_NMFI_BIT		0x08000000U
+#define XREG_CP15_CONTROL_EE_BIT		0x02000000U
+#define XREG_CP15_CONTROL_HA_BIT		0x00020000U
+#define XREG_CP15_CONTROL_RR_BIT		0x00004000U
+#define XREG_CP15_CONTROL_V_BIT			0x00002000U
+#define XREG_CP15_CONTROL_I_BIT			0x00001000U
+#define XREG_CP15_CONTROL_Z_BIT			0x00000800U
+#define XREG_CP15_CONTROL_SW_BIT		0x00000400U
+#define XREG_CP15_CONTROL_B_BIT			0x00000080U
+#define XREG_CP15_CONTROL_C_BIT			0x00000004U
+#define XREG_CP15_CONTROL_A_BIT			0x00000002U
+#define XREG_CP15_CONTROL_M_BIT			0x00000001U
+
+
+/* C2 Register Defines */
+#define XREG_CP15_TTBR0				"p15, 0, %0,  c2,  c0, 0"
+#define XREG_CP15_TTBR1				"p15, 0, %0,  c2,  c0, 1"
+#define XREG_CP15_TTB_CONTROL			"p15, 0, %0,  c2,  c0, 2"
+
+/* C3 Register Defines */
+#define XREG_CP15_DOMAIN_ACCESS_CTRL		"p15, 0, %0,  c3,  c0, 0"
+
+/* C4 Register Defines */
+/* Not Used */
+
+/* C5 Register Defines */
+#define XREG_CP15_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 0"
+#define XREG_CP15_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 1"
+
+#define XREG_CP15_AUX_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 0"
+#define XREG_CP15_AUX_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 1"
+
+/* C6 Register Defines */
+#define XREG_CP15_DATA_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 0"
+#define XREG_CP15_INST_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 2"
+
+/* C7 Register Defines */
+#define XREG_CP15_NOP				"p15, 0, %0,  c7,  c0, 4"
+
+#define XREG_CP15_INVAL_IC_POU_IS		"p15, 0, %0,  c7,  c1, 0"
+#define XREG_CP15_INVAL_BRANCH_ARRAY_IS		"p15, 0, %0,  c7,  c1, 6"
+
+#define XREG_CP15_PHYS_ADDR			"p15, 0, %0,  c7,  c4, 0"
+
+#define XREG_CP15_INVAL_IC_POU			"p15, 0, %0,  c7,  c5, 0"
+#define XREG_CP15_INVAL_IC_LINE_MVA_POU		"p15, 0, %0,  c7,  c5, 1"
+
+/* The CP15 register access below has been deprecated in favor of the new
+ * isb instruction in Cortex A53.
+ */
+#define XREG_CP15_INST_SYNC_BARRIER		"p15, 0, %0,  c7,  c5, 4"
+#define XREG_CP15_INVAL_BRANCH_ARRAY		"p15, 0, %0,  c7,  c5, 6"
+
+#define XREG_CP15_INVAL_DC_LINE_MVA_POC		"p15, 0, %0,  c7,  c6, 1"
+#define XREG_CP15_INVAL_DC_LINE_SW		"p15, 0, %0,  c7,  c6, 2"
+
+#define XREG_CP15_VA_TO_PA_CURRENT_0		"p15, 0, %0,  c7,  c8, 0"
+#define XREG_CP15_VA_TO_PA_CURRENT_1		"p15, 0, %0,  c7,  c8, 1"
+#define XREG_CP15_VA_TO_PA_CURRENT_2		"p15, 0, %0,  c7,  c8, 2"
+#define XREG_CP15_VA_TO_PA_CURRENT_3		"p15, 0, %0,  c7,  c8, 3"
+
+#define XREG_CP15_VA_TO_PA_OTHER_0		"p15, 0, %0,  c7,  c8, 4"
+#define XREG_CP15_VA_TO_PA_OTHER_1		"p15, 0, %0,  c7,  c8, 5"
+#define XREG_CP15_VA_TO_PA_OTHER_2		"p15, 0, %0,  c7,  c8, 6"
+#define XREG_CP15_VA_TO_PA_OTHER_3		"p15, 0, %0,  c7,  c8, 7"
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POC		"p15, 0, %0,  c7, c10, 1"
+#define XREG_CP15_CLEAN_DC_LINE_SW		"p15, 0, %0,  c7, c10, 2"
+
+/* The next two CP15 register accesses below have been deprecated in favor
+ * of the new dsb and dmb instructions in Cortex A53.
+ */
+#define XREG_CP15_DATA_SYNC_BARRIER		"p15, 0, %0,  c7, c10, 4"
+#define XREG_CP15_DATA_MEMORY_BARRIER		"p15, 0, %0,  c7, c10, 5"
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POU		"p15, 0, %0,  c7, c11, 1"
+
+#define XREG_CP15_NOP2				"p15, 0, %0,  c7, c13, 1"
+
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC	"p15, 0, %0,  c7, c14, 1"
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_SW	"p15, 0, %0,  c7, c14, 2"
+
+/* C8 Register Defines */
+#define XREG_CP15_INVAL_TLB_IS			"p15, 0, %0,  c8,  c3, 0"
+#define XREG_CP15_INVAL_TLB_MVA_IS		"p15, 0, %0,  c8,  c3, 1"
+#define XREG_CP15_INVAL_TLB_ASID_IS		"p15, 0, %0,  c8,  c3, 2"
+#define XREG_CP15_INVAL_TLB_MVA_ASID_IS		"p15, 0, %0,  c8,  c3, 3"
+
+#define XREG_CP15_INVAL_ITLB_UNLOCKED		"p15, 0, %0,  c8,  c5, 0"
+#define XREG_CP15_INVAL_ITLB_MVA		"p15, 0, %0,  c8,  c5, 1"
+#define XREG_CP15_INVAL_ITLB_ASID		"p15, 0, %0,  c8,  c5, 2"
+
+#define XREG_CP15_INVAL_DTLB_UNLOCKED		"p15, 0, %0,  c8,  c6, 0"
+#define XREG_CP15_INVAL_DTLB_MVA		"p15, 0, %0,  c8,  c6, 1"
+#define XREG_CP15_INVAL_DTLB_ASID		"p15, 0, %0,  c8,  c6, 2"
+
+#define XREG_CP15_INVAL_UTLB_UNLOCKED		"p15, 0, %0,  c8,  c7, 0"
+#define XREG_CP15_INVAL_UTLB_MVA		"p15, 0, %0,  c8,  c7, 1"
+#define XREG_CP15_INVAL_UTLB_ASID		"p15, 0, %0,  c8,  c7, 2"
+#define XREG_CP15_INVAL_UTLB_MVA_ASID		"p15, 0, %0,  c8,  c7, 3"
+
+/* C9 Register Defines */
+#define XREG_CP15_PERF_MONITOR_CTRL		"p15, 0, %0,  c9, c12, 0"
+#define XREG_CP15_COUNT_ENABLE_SET		"p15, 0, %0,  c9, c12, 1"
+#define XREG_CP15_COUNT_ENABLE_CLR		"p15, 0, %0,  c9, c12, 2"
+#define XREG_CP15_V_FLAG_STATUS			"p15, 0, %0,  c9, c12, 3"
+#define XREG_CP15_SW_INC			"p15, 0, %0,  c9, c12, 4"
+#define XREG_CP15_EVENT_CNTR_SEL		"p15, 0, %0,  c9, c12, 5"
+
+#define XREG_CP15_PERF_CYCLE_COUNTER		"p15, 0, %0,  c9, c13, 0"
+#define XREG_CP15_EVENT_TYPE_SEL		"p15, 0, %0,  c9, c13, 1"
+#define XREG_CP15_PERF_MONITOR_COUNT		"p15, 0, %0,  c9, c13, 2"
+
+#define XREG_CP15_USER_ENABLE			"p15, 0, %0,  c9, c14, 0"
+#define XREG_CP15_INTR_ENABLE_SET		"p15, 0, %0,  c9, c14, 1"
+#define XREG_CP15_INTR_ENABLE_CLR		"p15, 0, %0,  c9, c14, 2"
+
+/* C10 Register Defines */
+#define XREG_CP15_TLB_LOCKDWN			"p15, 0, %0, c10,  c0, 0"
+
+#define XREG_CP15_PRI_MEM_REMAP			"p15, 0, %0, c10,  c2, 0"
+#define XREG_CP15_NORM_MEM_REMAP		"p15, 0, %0, c10,  c2, 1"
+
+/* C11 Register Defines */
+/* Not used */
+
+/* C12 Register Defines */
+#define XREG_CP15_VEC_BASE_ADDR			"p15, 0, %0, c12,  c0, 0"
+#define XREG_CP15_MONITOR_VEC_BASE_ADDR		"p15, 0, %0, c12,  c0, 1"
+
+#define XREG_CP15_INTERRUPT_STATUS		"p15, 0, %0, c12,  c1, 0"
+#define XREG_CP15_VIRTUALIZATION_INTR		"p15, 0, %0, c12,  c1, 1"
+
+/* C13 Register Defines */
+#define XREG_CP15_CONTEXT_ID			"p15, 0, %0, c13,  c0, 1"
+#define USER_RW_THREAD_PID			"p15, 0, %0, c13,  c0, 2"
+#define USER_RO_THREAD_PID			"p15, 0, %0, c13,  c0, 3"
+#define USER_PRIV_THREAD_PID			"p15, 0, %0, c13,  c0, 4"
+
+/* C14 Register Defines */
+/* not used */
+
+/* C15 Register Defines */
+#define XREG_CP15_POWER_CTRL			"p15, 0, %0, c15,  c0, 0"
+#define XREG_CP15_CONFIG_BASE_ADDR		"p15, 4, %0, c15,  c0, 0"
+
+#define XREG_CP15_READ_TLB_ENTRY		"p15, 5, %0, c15,  c4, 2"
+#define XREG_CP15_WRITE_TLB_ENTRY		"p15, 5, %0, c15,  c4, 4"
+
+#define XREG_CP15_MAIN_TLB_VA			"p15, 5, %0, c15,  c5, 2"
+
+#define XREG_CP15_MAIN_TLB_PA			"p15, 5, %0, c15,  c6, 2"
+
+#define XREG_CP15_MAIN_TLB_ATTR			"p15, 5, %0, c15,  c7, 2"
+
+/* MPE register definitions */
+#define XREG_FPSID				c0
+#define XREG_FPSCR				c1
+#define XREG_MVFR1				c6
+#define XREG_MVFR0				c7
+#define XREG_FPEXC				c8
+#define XREG_FPINST				c9
+#define XREG_FPINST2				c10
+
+/* FPSID bits */
+#define XREG_FPSID_IMPLEMENTER_BIT	(24)
+#define XREG_FPSID_IMPLEMENTER_MASK	(0xFF << FPSID_IMPLEMENTER_BIT)
+#define XREG_FPSID_SOFTWARE		(1<<23)
+#define XREG_FPSID_ARCH_BIT		(16)
+#define XREG_FPSID_ARCH_MASK		(0xF  << FPSID_ARCH_BIT)
+#define XREG_FPSID_PART_BIT		(8)
+#define XREG_FPSID_PART_MASK		(0xFF << FPSID_PART_BIT)
+#define XREG_FPSID_VARIANT_BIT		(4)
+#define XREG_FPSID_VARIANT_MASK		(0xF  << FPSID_VARIANT_BIT)
+#define XREG_FPSID_REV_BIT		(0)
+#define XREG_FPSID_REV_MASK		(0xF  << FPSID_REV_BIT)
+
+/* FPSCR bits */
+#define XREG_FPSCR_N_BIT		(1 << 31)
+#define XREG_FPSCR_Z_BIT		(1 << 30)
+#define XREG_FPSCR_C_BIT		(1 << 29)
+#define XREG_FPSCR_V_BIT		(1 << 28)
+#define XREG_FPSCR_QC			(1 << 27)
+#define XREG_FPSCR_AHP			(1 << 26)
+#define XREG_FPSCR_DEFAULT_NAN		(1 << 25)
+#define XREG_FPSCR_FLUSHTOZERO		(1 << 24)
+#define XREG_FPSCR_ROUND_NEAREST	(0 << 22)
+#define XREG_FPSCR_ROUND_PLUSINF	(1 << 22)
+#define XREG_FPSCR_ROUND_MINUSINF	(2 << 22)
+#define XREG_FPSCR_ROUND_TOZERO		(3 << 22)
+#define XREG_FPSCR_RMODE_BIT		(22)
+#define XREG_FPSCR_RMODE_MASK		(3 << FPSCR_RMODE_BIT)
+#define XREG_FPSCR_STRIDE_BIT		(20)
+#define XREG_FPSCR_STRIDE_MASK		(3 << FPSCR_STRIDE_BIT)
+#define XREG_FPSCR_LENGTH_BIT		(16)
+#define XREG_FPSCR_LENGTH_MASK		(7 << FPSCR_LENGTH_BIT)
+#define XREG_FPSCR_IDC			(1 << 7)
+#define XREG_FPSCR_IXC			(1 << 4)
+#define XREG_FPSCR_UFC			(1 << 3)
+#define XREG_FPSCR_OFC			(1 << 2)
+#define XREG_FPSCR_DZC			(1 << 1)
+#define XREG_FPSCR_IOC			(1 << 0)
+
+/* MVFR0 bits */
+#define XREG_MVFR0_RMODE_BIT		(28)
+#define XREG_MVFR0_RMODE_MASK		(0xF << XREG_MVFR0_RMODE_BIT)
+#define XREG_MVFR0_SHORT_VEC_BIT	(24)
+#define XREG_MVFR0_SHORT_VEC_MASK	(0xF << XREG_MVFR0_SHORT_VEC_BIT)
+#define XREG_MVFR0_SQRT_BIT		(20)
+#define XREG_MVFR0_SQRT_MASK		(0xF << XREG_MVFR0_SQRT_BIT)
+#define XREG_MVFR0_DIVIDE_BIT		(16)
+#define XREG_MVFR0_DIVIDE_MASK		(0xF << XREG_MVFR0_DIVIDE_BIT)
+#define XREG_MVFR0_EXEC_TRAP_BIT	(12)
+#define XREG_MVFR0_EXEC_TRAP_MASK	(0xF << XREG_MVFR0_EXEC_TRAP_BIT)
+#define XREG_MVFR0_DP_BIT		(8)
+#define XREG_MVFR0_DP_MASK		(0xF << XREG_MVFR0_DP_BIT)
+#define XREG_MVFR0_SP_BIT		(4)
+#define XREG_MVFR0_SP_MASK		(0xF << XREG_MVFR0_SP_BIT)
+#define XREG_MVFR0_A_SIMD_BIT		(0)
+#define XREG_MVFR0_A_SIMD_MASK		(0xF << MVFR0_A_SIMD_BIT)
+
+/* FPEXC bits */
+#define XREG_FPEXC_EX			(1 << 31)
+#define XREG_FPEXC_EN			(1 << 30)
+#define XREG_FPEXC_DEX			(1 << 29)
+
+
+#define XREG_CONTROL_DCACHE_BIT	(0X00000001U<<2U)
+#define XREG_CONTROL_ICACHE_BIT	(0X00000001U<<12U)
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XREG_CORTEXA53_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xstatus.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xstatus.h
new file mode 100644
index 0000000..9c6e16e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xstatus.h
@@ -0,0 +1,535 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xstatus.h
+*
+* @addtogroup common_status_codes Xilinx® software status codes
+*
+* The xstatus.h file contains the Xilinx® software status codes.These codes are
+* used throughout the Xilinx device drivers.
+*
+* @{
+******************************************************************************/
+
+#ifndef XSTATUS_H		/* prevent circular inclusions */
+#define XSTATUS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/*********************** Common statuses 0 - 500 *****************************/
+/**
+@name Common Status Codes for All Device Drivers
+@{
+*/
+#define XST_SUCCESS                     0L
+#define XST_FAILURE                     1L
+#define XST_DEVICE_NOT_FOUND            2L
+#define XST_DEVICE_BLOCK_NOT_FOUND      3L
+#define XST_INVALID_VERSION             4L
+#define XST_DEVICE_IS_STARTED           5L
+#define XST_DEVICE_IS_STOPPED           6L
+#define XST_FIFO_ERROR                  7L	/*!< An error occurred during an
+						   operation with a FIFO such as
+						   an underrun or overrun, this
+						   error requires the device to
+						   be reset */
+#define XST_RESET_ERROR                 8L	/*!< An error occurred which requires
+						   the device to be reset */
+#define XST_DMA_ERROR                   9L	/*!< A DMA error occurred, this error
+						   typically requires the device
+						   using the DMA to be reset */
+#define XST_NOT_POLLED                  10L	/*!< The device is not configured for
+						   polled mode operation */
+#define XST_FIFO_NO_ROOM                11L	/*!< A FIFO did not have room to put
+						   the specified data into */
+#define XST_BUFFER_TOO_SMALL            12L	/*!< The buffer is not large enough
+						   to hold the expected data */
+#define XST_NO_DATA                     13L	/*!< There was no data available */
+#define XST_REGISTER_ERROR              14L	/*!< A register did not contain the
+						   expected value */
+#define XST_INVALID_PARAM               15L	/*!< An invalid parameter was passed
+						   into the function */
+#define XST_NOT_SGDMA                   16L	/*!< The device is not configured for
+						   scatter-gather DMA operation */
+#define XST_LOOPBACK_ERROR              17L	/*!< A loopback test failed */
+#define XST_NO_CALLBACK                 18L	/*!< A callback has not yet been
+						   registered */
+#define XST_NO_FEATURE                  19L	/*!< Device is not configured with
+						   the requested feature */
+#define XST_NOT_INTERRUPT               20L	/*!< Device is not configured for
+						   interrupt mode operation */
+#define XST_DEVICE_BUSY                 21L	/*!< Device is busy */
+#define XST_ERROR_COUNT_MAX             22L	/*!< The error counters of a device
+						   have maxed out */
+#define XST_IS_STARTED                  23L	/*!< Used when part of device is
+						   already started i.e.
+						   sub channel */
+#define XST_IS_STOPPED                  24L	/*!< Used when part of device is
+						   already stopped i.e.
+						   sub channel */
+#define XST_DATA_LOST                   26L	/*!< Driver defined error */
+#define XST_RECV_ERROR                  27L	/*!< Generic receive error */
+#define XST_SEND_ERROR                  28L	/*!< Generic transmit error */
+#define XST_NOT_ENABLED                 29L	/*!< A requested service is not
+						   available because it has not
+						   been enabled */
+/** @} */
+/***************** Utility Component statuses 401 - 500  *********************/
+/**
+@name Utility Component Status Codes 401 - 500
+@{
+*/
+#define XST_MEMTEST_FAILED              401L	/*!< Memory test failed */
+
+/** @} */
+/***************** Common Components statuses 501 - 1000 *********************/
+/**
+@name Packet Fifo Status Codes 501 - 510
+@{
+*/
+/********************* Packet Fifo statuses 501 - 510 ************************/
+
+#define XST_PFIFO_LACK_OF_DATA          501L	/*!< Not enough data in FIFO   */
+#define XST_PFIFO_NO_ROOM               502L	/*!< Not enough room in FIFO   */
+#define XST_PFIFO_BAD_REG_VALUE         503L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_PFIFO_ERROR                 504L	/*!< Generic packet FIFO error */
+#define XST_PFIFO_DEADLOCK              505L	/*!< Packet FIFO is reporting
+						 * empty and full simultaneously
+						 */
+/** @} */
+/**
+@name DMA Status Codes 511 - 530
+@{
+*/
+/************************** DMA statuses 511 - 530 ***************************/
+
+#define XST_DMA_TRANSFER_ERROR          511L	/*!< Self test, DMA transfer
+						   failed */
+#define XST_DMA_RESET_REGISTER_ERROR    512L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_DMA_SG_LIST_EMPTY           513L	/*!< Scatter gather list contains
+						   no buffer descriptors ready
+						   to be processed */
+#define XST_DMA_SG_IS_STARTED           514L	/*!< Scatter gather not stopped */
+#define XST_DMA_SG_IS_STOPPED           515L	/*!< Scatter gather not running */
+#define XST_DMA_SG_LIST_FULL            517L	/*!< All the buffer desciptors of
+						   the scatter gather list are
+						   being used */
+#define XST_DMA_SG_BD_LOCKED            518L	/*!< The scatter gather buffer
+						   descriptor which is to be
+						   copied over in the scatter
+						   list is locked */
+#define XST_DMA_SG_NOTHING_TO_COMMIT    519L	/*!< No buffer descriptors have been
+						   put into the scatter gather
+						   list to be commited */
+#define XST_DMA_SG_COUNT_EXCEEDED       521L	/*!< The packet count threshold
+						   specified was larger than the
+						   total # of buffer descriptors
+						   in the scatter gather list */
+#define XST_DMA_SG_LIST_EXISTS          522L	/*!< The scatter gather list has
+						   already been created */
+#define XST_DMA_SG_NO_LIST              523L	/*!< No scatter gather list has
+						   been created */
+#define XST_DMA_SG_BD_NOT_COMMITTED     524L	/*!< The buffer descriptor which was
+						   being started was not committed
+						   to the list */
+#define XST_DMA_SG_NO_DATA              525L	/*!< The buffer descriptor to start
+						   has already been used by the
+						   hardware so it can't be reused
+						 */
+#define XST_DMA_SG_LIST_ERROR           526L	/*!< General purpose list access
+						   error */
+#define XST_DMA_BD_ERROR                527L	/*!< General buffer descriptor
+						   error */
+/** @} */
+/**
+@name IPIF Status Codes Codes 531 - 550
+@{
+*/
+/************************** IPIF statuses 531 - 550 ***************************/
+
+#define XST_IPIF_REG_WIDTH_ERROR        531L	/*!< An invalid register width
+						   was passed into the function */
+#define XST_IPIF_RESET_REGISTER_ERROR   532L	/*!< The value of a register at
+						   reset was not valid */
+#define XST_IPIF_DEVICE_STATUS_ERROR    533L	/*!< A write to the device interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_DEVICE_ACK_ERROR       534L	/*!< The device interrupt status
+						   register did not reset when
+						   acked */
+#define XST_IPIF_DEVICE_ENABLE_ERROR    535L	/*!< The device interrupt enable
+						   register was not updated when
+						   other registers changed */
+#define XST_IPIF_IP_STATUS_ERROR        536L	/*!< A write to the IP interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_IP_ACK_ERROR           537L	/*!< The IP interrupt status register
+						   did not reset when acked */
+#define XST_IPIF_IP_ENABLE_ERROR        538L	/*!< IP interrupt enable register was
+						   not updated correctly when other
+						   registers changed */
+#define XST_IPIF_DEVICE_PENDING_ERROR   539L	/*!< The device interrupt pending
+						   register did not indicate the
+						   expected value */
+#define XST_IPIF_DEVICE_ID_ERROR        540L	/*!< The device interrupt ID register
+						   did not indicate the expected
+						   value */
+#define XST_IPIF_ERROR                  541L	/*!< Generic ipif error */
+/** @} */
+
+/****************** Device specific statuses 1001 - 4095 *********************/
+/**
+@name Ethernet Status Codes 1001 - 1050
+@{
+*/
+/********************* Ethernet statuses 1001 - 1050 *************************/
+
+#define XST_EMAC_MEMORY_SIZE_ERROR  1001L	/*!< Memory space is not big enough
+						 * to hold the minimum number of
+						 * buffers or descriptors */
+#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L	/*!< Memory allocation failed */
+#define XST_EMAC_MII_READ_ERROR     1003L	/*!< MII read error */
+#define XST_EMAC_MII_BUSY           1004L	/*!< An MII operation is in progress */
+#define XST_EMAC_OUT_OF_BUFFERS     1005L	/*!< Driver is out of buffers */
+#define XST_EMAC_PARSE_ERROR        1006L	/*!< Invalid driver init string */
+#define XST_EMAC_COLLISION_ERROR    1007L	/*!< Excess deferral or late
+						 * collision on polled send */
+/** @} */
+/**
+@name UART Status Codes 1051 - 1075
+@{
+*/
+/*********************** UART statuses 1051 - 1075 ***************************/
+#define XST_UART
+
+#define XST_UART_INIT_ERROR         1051L
+#define XST_UART_START_ERROR        1052L
+#define XST_UART_CONFIG_ERROR       1053L
+#define XST_UART_TEST_FAIL          1054L
+#define XST_UART_BAUD_ERROR         1055L
+#define XST_UART_BAUD_RANGE         1056L
+
+/** @} */
+/**
+@name IIC Status Codes 1076 - 1100
+@{
+*/
+/************************ IIC statuses 1076 - 1100 ***************************/
+
+#define XST_IIC_SELFTEST_FAILED         1076	/*!< self test failed            */
+#define XST_IIC_BUS_BUSY                1077	/*!< bus found busy              */
+#define XST_IIC_GENERAL_CALL_ADDRESS    1078	/*!< mastersend attempted with   */
+					     /* general call address        */
+#define XST_IIC_STAND_REG_RESET_ERROR   1079	/*!< A non parameterizable reg   */
+					     /* value after reset not valid */
+#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080	/*!< Tx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081	/*!< Rx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_TBA_REG_RESET_ERROR     1082	/*!< 10 bit addr incl in design  */
+					     /* value after reset not valid */
+#define XST_IIC_CR_READBACK_ERROR       1083	/*!< Read of the control register */
+					     /* didn't return value written */
+#define XST_IIC_DTR_READBACK_ERROR      1084	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_DRR_READBACK_ERROR      1085	/*!< Read of the data Receive reg */
+					     /* didn't return value written */
+#define XST_IIC_ADR_READBACK_ERROR      1086	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_TBA_READBACK_ERROR      1087	/*!< Read of the 10 bit addr reg */
+					     /* didn't return written value */
+#define XST_IIC_NOT_SLAVE               1088	/*!< The device isn't a slave    */
+/** @} */
+/**
+@name ATMC Status Codes 1101 - 1125
+@{
+*/
+/*********************** ATMC statuses 1101 - 1125 ***************************/
+
+#define XST_ATMC_ERROR_COUNT_MAX    1101L	/*!< the error counters in the ATM
+						   controller hit the max value
+						   which requires the statistics
+						   to be cleared */
+/** @} */
+/**
+@name Flash Status Codes 1126 - 1150
+@{
+*/
+/*********************** Flash statuses 1126 - 1150 **************************/
+
+#define XST_FLASH_BUSY                1126L	/*!< Flash is erasing or programming
+						 */
+#define XST_FLASH_READY               1127L	/*!< Flash is ready for commands */
+#define XST_FLASH_ERROR               1128L	/*!< Flash had detected an internal
+						   error. Use XFlash_DeviceControl
+						   to retrieve device specific codes
+						 */
+#define XST_FLASH_ERASE_SUSPENDED     1129L	/*!< Flash is in suspended erase state
+						 */
+#define XST_FLASH_WRITE_SUSPENDED     1130L	/*!< Flash is in suspended write state
+						 */
+#define XST_FLASH_PART_NOT_SUPPORTED  1131L	/*!< Flash type not supported by
+						   driver */
+#define XST_FLASH_NOT_SUPPORTED       1132L	/*!< Operation not supported */
+#define XST_FLASH_TOO_MANY_REGIONS    1133L	/*!< Too many erase regions */
+#define XST_FLASH_TIMEOUT_ERROR       1134L	/*!< Programming or erase operation
+						   aborted due to a timeout */
+#define XST_FLASH_ADDRESS_ERROR       1135L	/*!< Accessed flash outside its
+						   addressible range */
+#define XST_FLASH_ALIGNMENT_ERROR     1136L	/*!< Write alignment error */
+#define XST_FLASH_BLOCKING_CALL_ERROR 1137L	/*!< Couldn't return immediately from
+						   write/erase function with
+						   XFL_NON_BLOCKING_WRITE/ERASE
+						   option cleared */
+#define XST_FLASH_CFI_QUERY_ERROR     1138L	/*!< Failed to query the device */
+/** @} */
+/**
+@name SPI Status Codes 1151 - 1175
+@{
+*/
+/*********************** SPI statuses 1151 - 1175 ****************************/
+
+#define XST_SPI_MODE_FAULT          1151	/*!< master was selected as slave */
+#define XST_SPI_TRANSFER_DONE       1152	/*!< data transfer is complete */
+#define XST_SPI_TRANSMIT_UNDERRUN   1153	/*!< slave underruns transmit register */
+#define XST_SPI_RECEIVE_OVERRUN     1154	/*!< device overruns receive register */
+#define XST_SPI_NO_SLAVE            1155	/*!< no slave has been selected yet */
+#define XST_SPI_TOO_MANY_SLAVES     1156	/*!< more than one slave is being
+						 * selected */
+#define XST_SPI_NOT_MASTER          1157	/*!< operation is valid only as master */
+#define XST_SPI_SLAVE_ONLY          1158	/*!< device is configured as slave-only
+						 */
+#define XST_SPI_SLAVE_MODE_FAULT    1159	/*!< slave was selected while disabled */
+#define XST_SPI_SLAVE_MODE          1160	/*!< device has been addressed as slave */
+#define XST_SPI_RECEIVE_NOT_EMPTY   1161	/*!< device received data in slave mode */
+
+#define XST_SPI_COMMAND_ERROR       1162	/*!< unrecognised command - qspi only */
+#define XST_SPI_POLL_DONE           1163        /*!< controller completed polling the
+						   device for status */
+/** @} */
+/**
+@name OPB Arbiter Status Codes 1176 - 1200
+@{
+*/
+/********************** OPB Arbiter statuses 1176 - 1200 *********************/
+
+#define XST_OPBARB_INVALID_PRIORITY  1176	/*!< the priority registers have either
+						 * one master assigned to two or more
+						 * priorities, or one master not
+						 * assigned to any priority
+						 */
+#define XST_OPBARB_NOT_SUSPENDED     1177	/*!< an attempt was made to modify the
+						 * priority levels without first
+						 * suspending the use of priority
+						 * levels
+						 */
+#define XST_OPBARB_PARK_NOT_ENABLED  1178	/*!< bus parking by id was enabled but
+						 * bus parking was not enabled
+						 */
+#define XST_OPBARB_NOT_FIXED_PRIORITY 1179	/*!< the arbiter must be in fixed
+						 * priority mode to allow the
+						 * priorities to be changed
+						 */
+/** @} */
+/**
+@name INTC Status Codes 1201 - 1225
+@{
+*/
+/************************ Intc statuses 1201 - 1225 **************************/
+
+#define XST_INTC_FAIL_SELFTEST      1201	/*!< self test failed */
+#define XST_INTC_CONNECT_ERROR      1202	/*!< interrupt already in use */
+/** @} */
+/**
+@name TmrCtr Status Codes 1226 - 1250
+@{
+*/
+/********************** TmrCtr statuses 1226 - 1250 **************************/
+
+#define XST_TMRCTR_TIMER_FAILED     1226	/*!< self test failed */
+/** @} */
+/**
+@name WdtTb Status Codes 1251 - 1275
+@{
+*/
+/********************** WdtTb statuses 1251 - 1275 ***************************/
+
+#define XST_WDTTB_TIMER_FAILED      1251L
+/** @} */
+/**
+@name PlbArb status Codes 1276 - 1300
+@{
+*/
+/********************** PlbArb statuses 1276 - 1300 **************************/
+
+#define XST_PLBARB_FAIL_SELFTEST    1276L
+/** @} */
+/**
+@name Plb2Opb Status Codes 1301 - 1325
+@{
+*/
+/********************** Plb2Opb statuses 1301 - 1325 *************************/
+
+#define XST_PLB2OPB_FAIL_SELFTEST   1301L
+/** @} */
+/**
+@name Opb2Plb Status 1326 - 1350
+@{
+*/
+/********************** Opb2Plb statuses 1326 - 1350 *************************/
+
+#define XST_OPB2PLB_FAIL_SELFTEST   1326L
+/** @} */
+/**
+@name SysAce Status Codes 1351 - 1360
+@{
+*/
+/********************** SysAce statuses 1351 - 1360 **************************/
+
+#define XST_SYSACE_NO_LOCK          1351L	/*!< No MPU lock has been granted */
+/** @} */
+/**
+@name PCI Bridge Status Codes 1361 - 1375
+@{
+*/
+/********************** PCI Bridge statuses 1361 - 1375 **********************/
+
+#define XST_PCI_INVALID_ADDRESS     1361L
+/** @} */
+/**
+@name FlexRay Constants 1400 - 1409
+@{
+*/
+/********************** FlexRay constants 1400 - 1409 *************************/
+
+#define XST_FR_TX_ERROR			1400
+#define XST_FR_TX_BUSY			1401
+#define XST_FR_BUF_LOCKED		1402
+#define XST_FR_NO_BUF			1403
+/** @} */
+/**
+@name USB constants 1410 - 1420
+@{
+*/
+/****************** USB constants 1410 - 1420  *******************************/
+
+#define XST_USB_ALREADY_CONFIGURED	1410
+#define XST_USB_BUF_ALIGN_ERROR		1411
+#define XST_USB_NO_DESC_AVAILABLE	1412
+#define XST_USB_BUF_TOO_BIG		1413
+#define XST_USB_NO_BUF			1414
+/** @} */
+/**
+@name HWICAP constants 1421 - 1429
+@{
+*/
+/****************** HWICAP constants 1421 - 1429  *****************************/
+
+#define XST_HWICAP_WRITE_DONE		1421
+
+/** @} */
+/**
+@name AXI VDMA constants 1430 - 1440
+@{
+*/
+/****************** AXI VDMA constants 1430 - 1440  *****************************/
+
+#define XST_VDMA_MISMATCH_ERROR		1430
+/** @} */
+/**
+@name NAND Flash Status Codes 1441 - 1459
+@{
+*/
+/*********************** NAND Flash statuses 1441 - 1459  *********************/
+
+#define XST_NAND_BUSY			1441L	/*!< Flash is erasing or
+						 * programming
+						 */
+#define XST_NAND_READY			1442L	/*!< Flash is ready for commands
+						 */
+#define XST_NAND_ERROR			1443L	/*!< Flash had detected an
+						 * internal error.
+						 */
+#define XST_NAND_PART_NOT_SUPPORTED	1444L	/*!< Flash type not supported by
+						 * driver
+						 */
+#define XST_NAND_OPT_NOT_SUPPORTED	1445L	/*!< Operation not supported
+						 */
+#define XST_NAND_TIMEOUT_ERROR		1446L	/*!< Programming or erase
+						 * operation aborted due to a
+						 * timeout
+						 */
+#define XST_NAND_ADDRESS_ERROR		1447L	/*!< Accessed flash outside its
+						 * addressible range
+						 */
+#define XST_NAND_ALIGNMENT_ERROR	1448L	/*!< Write alignment error
+						 */
+#define XST_NAND_PARAM_PAGE_ERROR	1449L	/*!< Failed to read parameter
+						 * page of the device
+						 */
+#define XST_NAND_CACHE_ERROR		1450L	/*!< Flash page buffer error
+						 */
+
+#define XST_NAND_WRITE_PROTECTED	1451L	/*!< Flash is write protected
+						 */
+/** @} */
+
+/**************************** Type Definitions *******************************/
+
+typedef s32 XStatus;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_status_codes".
+*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xtime_l.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xtime_l.c
new file mode 100644
index 0000000..51080de
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xtime_l.c
@@ -0,0 +1,100 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.c
+*
+* This file contains low level functions to get/set time from the Generic Counter
+* register in the ARM Cortex A53 MPcore.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.2	pkp  	28/05/15 First release
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xtime_l.h"
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+/****************************************************************************
+*
+* Set the time in the Generic Timer Counter Register.
+*
+* @param	Value to be written to the Global Timer Counter Register.
+*
+* @return	None.
+*
+* @note		In multiprocessor environment reference time will reset/lost for
+*		all processors, when this function called by any one processor.
+*
+****************************************************************************/
+void XTime_SetTime(XTime Xtime_Global)
+{
+/*As the generic timer of A53 runs constantly time can not be set as desired
+so the API is left unimplemented*/
+}
+
+/****************************************************************************
+*
+* Get the time from the Generic Timer Counter Register.
+*
+* @param	Pointer to the location to be updated with the time.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XTime_GetTime(XTime *Xtime_Global)
+{
+	*Xtime_Global = arch_counter_get_cntvct();
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xtime_l.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xtime_l.h
new file mode 100644
index 0000000..57ab8e4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/32bit/xtime_l.h
@@ -0,0 +1,93 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.h
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.2	pkp	   28/05/15 First release
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+
+#ifndef XTIME_H /* prevent circular inclusions */
+#define XTIME_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xparameters.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+static inline u64 arch_counter_get_cntvct(void)
+ {
+          u64 cval;
+          __asm__ __volatile__("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval));
+          return cval;
+  }
+/**************************** Type Definitions *******************************/
+
+typedef u64 XTime;
+
+/************************** Constant Definitions *****************************/
+
+/* Global Timer is always clocked at half of the CPU frequency */
+#define COUNTS_PER_SECOND          0x007A1200U
+
+#define XIOU_SCNTRS_BASEADDR      0XFF260000U
+#define XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET    0x00000000U
+#define XIOU_SCNTRS_FREQ_REG_OFFSET    0x00000020U
+#define XIOU_SCNTRS_FREQ		0x02FAF080U	/* 50 MHz */
+#define XIOU_SCNTRS_CNT_CNTRL_REG_EN    0X00000001U
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void XTime_SetTime(XTime Xtime_Global);
+void XTime_GetTime(XTime *Xtime_Global);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XTIME_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_exit.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_exit.c
new file mode 100644
index 0000000..0c8688f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_exit.c
@@ -0,0 +1,45 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/* _exit - Simple implementation. Does not return.
+*/
+__attribute__((weak)) void _exit (sint32 status)
+{
+  (void)status;
+  while (1)
+  {
+	__asm__("wfi");
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_open.c
new file mode 100644
index 0000000..b0625fe
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_open.c
@@ -0,0 +1,53 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode);
+}
+#endif
+
+/*
+ * _open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode)
+{
+  (void *)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_sbrk.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_sbrk.c
new file mode 100644
index 0000000..6017cff
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_sbrk.c
@@ -0,0 +1,70 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) caddr_t _sbrk ( s32 incr );
+}
+#endif
+
+__attribute__((weak)) caddr_t _sbrk ( s32 incr )
+{
+  static u8 *heap = NULL;
+  u8 *prev_heap;
+  static u8 *HeapEndPtr = (u8 *)&_heap_end;
+  caddr_t Status;
+
+  if (heap == NULL) {
+    heap = (u8 *)&_heap_start;
+  }
+  prev_heap = heap;
+
+  heap += incr;
+
+  if (heap > HeapEndPtr){
+	  Status = (caddr_t) -1;
+  }
+  else if (prev_heap != NULL) {
+	  Status = (caddr_t) ((void *)prev_heap);
+  }
+  else {
+	  Status = (caddr_t) -1;
+  }
+
+  return Status;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/abort.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/abort.c
new file mode 100644
index 0000000..a3bba51
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/abort.c
@@ -0,0 +1,42 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+
+/*
+ * abort -- go out via exit...
+ */
+__attribute__((weak)) void abort(void)
+{
+  _exit(1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/asm_vectors.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/asm_vectors.S
new file mode 100644
index 0000000..fcbee46
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/asm_vectors.S
@@ -0,0 +1,208 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file asm_vectors.s
+*
+* This file contains the initial vector table for the Cortex A53 processor
+* Currently NEON registers are not saved on stack if interrupt is taken.
+* It will be implemented.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00	pkp	5/21/14 Initial version
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+
+
+.org 0
+.text
+
+.globl _boot
+.globl _vector_table
+
+.globl FIQInterrupt
+.globl IRQInterrupt
+.globl SErrorInterrupt
+.globl SynchronousInterrupt
+
+
+.org 0
+
+.section .vectors, "a"
+
+_vector_table:
+
+.set	VBAR, _vector_table
+.org VBAR
+	b	_boot
+.org (VBAR + 0x200)
+	b	SynchronousInterruptHandler
+
+.org (VBAR + 0x280)
+	b	IRQInterruptHandler
+
+.org (VBAR + 0x300)
+	b	FIQInterruptHandler
+
+.org (VBAR + 0x380)
+	b	SErrorInterruptHandler
+
+
+SynchronousInterruptHandler:
+	stp	X0,X1, [sp,#-0x10]!
+	stp	X2,X3, [sp,#-0x10]!
+	stp	X4,X5, [sp,#-0x10]!
+	stp	X6,X7, [sp,#-0x10]!
+	stp	X8,X9, [sp,#-0x10]!
+	stp	X10,X11, [sp,#-0x10]!
+	stp	X12,X13, [sp,#-0x10]!
+	stp	X14,X15, [sp,#-0x10]!
+	stp	X16,X17, [sp,#-0x10]!
+	stp     X18,X19, [sp,#-0x10]!
+	stp     X29,X30, [sp,#-0x10]!
+
+        bl      SynchronousInterrupt
+
+	ldp     X29,X30, [sp], #0x10
+        ldp     X18,X19, [sp], #0x10
+	ldp	X16,X17, [sp], #0x10
+	ldp	X14,X15, [sp], #0x10
+	ldp	X12,X13, [sp], #0x10
+	ldp	X10,X11, [sp], #0x10
+	ldp	X8,X9, [sp], #0x10
+	ldp	X6,X7, [sp], #0x10
+	ldp	X4,X5, [sp], #0x10
+	ldp	X2,X3, [sp], #0x10
+	ldp	X0,X1, [sp], #0x10
+
+	eret
+
+IRQInterruptHandler:
+	stp	X0,X1, [sp,#-0x10]!
+	stp	X2,X3, [sp,#-0x10]!
+	stp	X4,X5, [sp,#-0x10]!
+	stp	X6,X7, [sp,#-0x10]!
+	stp	X8,X9, [sp,#-0x10]!
+	stp	X10,X11, [sp,#-0x10]!
+	stp	X12,X13, [sp,#-0x10]!
+	stp	X14,X15, [sp,#-0x10]!
+	stp	X16,X17, [sp,#-0x10]!
+	stp     X18,X19, [sp,#-0x10]!
+	stp     X29,X30, [sp,#-0x10]!
+
+	bl      IRQInterrupt
+
+	ldp     X29,X30, [sp], #0x10
+	ldp     X18,X19, [sp], #0x10
+	ldp	X16,X17, [sp], #0x10
+	ldp	X14,X15, [sp], #0x10
+	ldp	X12,X13, [sp], #0x10
+	ldp	X10,X11, [sp], #0x10
+	ldp	X8,X9, [sp], #0x10
+	ldp	X6,X7, [sp], #0x10
+	ldp	X4,X5, [sp], #0x10
+	ldp	X2,X3, [sp], #0x10
+	ldp	X0,X1, [sp], #0x10
+
+	eret
+
+FIQInterruptHandler:
+
+	stp	X0,X1, [sp,#-0x10]!
+	stp	X2,X3, [sp,#-0x10]!
+	stp	X4,X5, [sp,#-0x10]!
+	stp	X6,X7, [sp,#-0x10]!
+	stp	X8,X9, [sp,#-0x10]!
+	stp	X10,X11, [sp,#-0x10]!
+	stp	X12,X13, [sp,#-0x10]!
+	stp	X14,X15, [sp,#-0x10]!
+	stp	X16,X17, [sp,#-0x10]!
+	stp     X18,X19, [sp,#-0x10]!
+	stp     X29,X30, [sp,#-0x10]!
+
+        bl      FIQInterrupt
+
+	ldp     X29,X30, [sp], #0x10
+        ldp     X18,X19, [sp], #0x10
+	ldp	X16,X17, [sp], #0x10
+	ldp	X14,X15, [sp], #0x10
+	ldp	X12,X13, [sp], #0x10
+	ldp	X10,X11, [sp], #0x10
+	ldp	X8,X9, [sp], #0x10
+	ldp	X6,X7, [sp], #0x10
+	ldp	X4,X5, [sp], #0x10
+	ldp	X2,X3, [sp], #0x10
+	ldp	X0,X1, [sp], #0x10
+
+	eret
+
+SErrorInterruptHandler:
+
+	stp	X0,X1, [sp,#-0x10]!
+	stp	X2,X3, [sp,#-0x10]!
+	stp	X4,X5, [sp,#-0x10]!
+	stp	X6,X7, [sp,#-0x10]!
+	stp	X8,X9, [sp,#-0x10]!
+	stp	X10,X11, [sp,#-0x10]!
+	stp	X12,X13, [sp,#-0x10]!
+	stp	X14,X15, [sp,#-0x10]!
+	stp	X16,X17, [sp,#-0x10]!
+	stp     X18,X19, [sp,#-0x10]!
+	stp     X29,X30, [sp,#-0x10]!
+
+        bl      SErrorInterrupt
+
+	ldp     X29,X30, [sp], #0x10
+        ldp     X18,X19, [sp], #0x10
+	ldp	X16,X17, [sp], #0x10
+	ldp	X14,X15, [sp], #0x10
+	ldp	X12,X13, [sp], #0x10
+	ldp	X10,X11, [sp], #0x10
+	ldp	X8,X9, [sp], #0x10
+	ldp	X6,X7, [sp], #0x10
+	ldp	X4,X5, [sp], #0x10
+	ldp	X2,X3, [sp], #0x10
+	ldp	X0,X1, [sp], #0x10
+
+	eret
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/boot.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/boot.S
new file mode 100644
index 0000000..a5082f7
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/boot.S
@@ -0,0 +1,272 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file boot.S
+*
+* This file contains the initial startup code for the Cortex A53 processor
+* Currently the processor starts at EL3 and boot code, startup and main
+* code will run on secure EL3.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00  pkp	5/21/14 Initial version
+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#include "xparameters.h"
+
+.globl MMUTableL0
+.globl MMUTableL1
+.globl MMUTableL2
+.global _prestart
+.global _boot
+
+.global __el3_stack
+.global __el2_stack
+.global __el1_stack
+.global __el0_stack
+.global _vector_table
+
+
+.set EL3_stack,		__el3_stack
+.set EL2_stack,		__el2_stack
+.set EL1_stack,		__el1_stack
+.set EL0_stack,		__el0_stack
+
+.set TT_S1_FAULT,	0x0
+.set TT_S1_TABLE,	0x3
+
+.set L0Table,	MMUTableL0
+.set L1Table,	MMUTableL1
+.set L2Table,	MMUTableL2
+.set vector_base,	_vector_table
+
+.section .boot,"ax"
+
+
+/* this initializes the various processor modes */
+
+_prestart:
+_boot:
+	mov      x0, #0
+	mov      x1, #0
+	mov      x2, #0
+	mov      x3, #0
+	mov      x4, #0
+	mov      x5, #0
+	mov      x6, #0
+	mov      x7, #0
+	mov      x8, #0
+	mov      x9, #0
+	mov      x10, #0
+	mov      x11, #0
+	mov      x12, #0
+	mov      x13, #0
+	mov      x14, #0
+	mov      x15, #0
+	mov      x16, #0
+	mov      x17, #0
+	mov      x18, #0
+	mov      x19, #0
+	mov      x20, #0
+	mov      x21, #0
+	mov      x22, #0
+	mov      x23, #0
+	mov      x24, #0
+	mov      x25, #0
+	mov      x26, #0
+	mov      x27, #0
+	mov      x28, #0
+	mov      x29, #0
+	mov      x30, #0
+#if 0 //dont put other a53 cpus in wfi
+   //Which core am I
+   // ----------------
+	mrs      x0, MPIDR_EL1
+	and      x0, x0, #0xFF                     //Mask off to leave Aff0
+	cbz      x0, OKToRun                          //If core 0, run the primary init code
+EndlessLoop0:
+	wfi
+	b        EndlessLoop0
+#endif
+OKToRun:
+
+	/*Set vector table base address*/
+	ldr	x1, =vector_base
+	msr	VBAR_EL3,x1
+
+	/*Define stack pointer for current exception level*/
+	ldr	 x2,=EL3_stack
+	mov	 sp,x2
+
+
+	/* Disable trapping of CPTR_EL3 accesses or use of Adv.SIMD/FPU*/
+	mov      x0, #0                 // Clear all trap bits
+	msr      CPTR_EL3, x0
+
+
+	/* Configure SCR_EL3 */
+	mov      w1, #0              	//; Initial value of register is unknown
+	orr      w1, w1, #(1 << 11)  	//; Set ST bit (Secure EL1 can access CNTPS_TVAL_EL1, CNTPS_CTL_EL1 & CNTPS_CVAL_EL1)
+	orr      w1, w1, #(1 << 10)  	//; Set RW bit (EL1 is AArch64, as this is the Secure world)
+	orr      w1, w1, #(1 << 3)   	//; Set EA bit (SError routed to EL3)
+	orr      w1, w1, #(1 << 2)   	//; Set FIQ bit (FIQs routed to EL3)
+	orr      w1, w1, #(1 << 1)   	//; Set IRQ bit (IRQs routed to EL3)
+	msr      SCR_EL3, x1
+
+	/*Enable ECC protection*/
+	mrs	x0, S3_1_C11_C0_2  	// register L2CTLR_EL1
+	orr	x0, x0, #(1<<22)
+	msr	S3_1_C11_C0_2, x0
+
+	/*configure cpu auxiliary control register EL1 */
+	ldr	x0,=0x80CA000 		// L1 Data prefetch control - 5, Enable device split throttle, 2 independent data prefetch streams
+	msr	S3_1_C15_C2_0, x0 	//CPUACTLR_EL1
+
+
+	/*Enable hardware coherency between cores*/
+	mrs      x0, S3_1_c15_c2_1  	//Read EL1 CPU Extended Control Register
+	orr      x0, x0, #(1 << 6)  	//Set the SMPEN bit
+	msr      S3_1_c15_c2_1, x0  	//Write EL1 CPU Extended Control Register
+	isb
+
+	tlbi 	ALLE3
+	ic      IALLU                  	//; Invalidate I cache to PoU
+	bl 	invalidate_dcaches
+	dsb	 sy
+	isb
+
+	ldr      x1, =L0Table 		//; Get address of level 0 for TTBR0_EL1
+	msr      TTBR0_EL3, x1		//; Set TTBR0_EL3 (NOTE: There is no TTBR1 at EL1)
+
+
+	/**********************************************
+	* Set up memory attributes
+	* This equates to:
+	* 0 = b01000100 = Normal, Inner/Outer Non-Cacheable
+	* 1 = b11111111 = Normal, Inner/Outer WB/WA/RA
+	* 2 = b00000000 = Device-nGnRnE
+	* 3 = b00000100 = Device-nGnRE
+	* 4 = b10111011 = Normal, Inner/Outer WT/WA/RA
+	**********************************************/
+	ldr      x1, =0x000000BB0400FF44
+	msr      MAIR_EL3, x1
+
+        /**********************************************
+        * Set up TCR_EL3
+	* Physical Address Size PS =  010 -> 40bits 1TB
+	* Granual Size TG0 = 00 -> 4KB
+        * size offset of the memory region T0SZ = 24 -> (region size 2^(64-24) = 2^40)
+        ***************************************************/
+        ldr     x1,=0x80823518
+        msr     TCR_EL3, x1
+        isb
+
+	/* Enable SError Exception for asynchronous abort */
+	mrs 	x1,DAIF
+        bic	x1,x1,#(0x1<<8)
+        msr	DAIF,x1
+
+	/* Configure SCTLR_EL3 */
+	mov      x1, #0                //Most of the SCTLR_EL3 bits are unknown at reset
+	orr      x1, x1, #(1 << 12)	//Enable I cache
+	orr      x1, x1, #(1 << 3)	//Enable SP alignment check
+	orr      x1, x1, #(1 << 2)	//Enable caches
+	orr      x1, x1, #(1 << 0)	//Enable MMU
+	msr      SCTLR_EL3, x1
+	dsb	 sy
+	isb
+
+	bl 	 _startup		//jump to start
+
+loop:	b	loop
+
+
+invalidate_dcaches:
+
+	dmb     ISH
+	mrs     x0, CLIDR_EL1          //; x0 = CLIDR
+	ubfx    w2, w0, #24, #3        //; w2 = CLIDR.LoC
+	cmp     w2, #0                 //; LoC is 0?
+	b.eq    invalidateCaches_end   //; No cleaning required and enable MMU
+	mov     w1, #0                 //; w1 = level iterator
+
+invalidateCaches_flush_level:
+	add     w3, w1, w1, lsl #1     //; w3 = w1 * 3 (right-shift for cache type)
+	lsr     w3, w0, w3             //; w3 = w0 >> w3
+	ubfx    w3, w3, #0, #3         //; w3 = cache type of this level
+	cmp     w3, #2                 //; No cache at this level?
+	b.lt    invalidateCaches_next_level
+
+	lsl     w4, w1, #1
+	msr     CSSELR_EL1, x4         //; Select current cache level in CSSELR
+	isb                            //; ISB required to reflect new CSIDR
+	mrs     x4, CCSIDR_EL1         //; w4 = CSIDR
+
+	ubfx    w3, w4, #0, #3
+	add    	w3, w3, #2             //; w3 = log2(line size)
+	ubfx    w5, w4, #13, #15
+	ubfx    w4, w4, #3, #10        //; w4 = Way number
+	clz     w6, w4                 //; w6 = 32 - log2(number of ways)
+
+invalidateCaches_flush_set:
+	mov     w8, w4                 //; w8 = Way number
+invalidateCaches_flush_way:
+	lsl     w7, w1, #1             //; Fill level field
+	lsl     w9, w5, w3
+	orr     w7, w7, w9             //; Fill index field
+	lsl     w9, w8, w6
+	orr     w7, w7, w9             //; Fill way field
+	dc      CISW, x7               //; Invalidate by set/way to point of coherency
+	subs    w8, w8, #1             //; Decrement way
+	b.ge    invalidateCaches_flush_way
+	subs    w5, w5, #1             //; Descrement set
+	b.ge    invalidateCaches_flush_set
+
+invalidateCaches_next_level:
+	add     w1, w1, #1             //; Next level
+	cmp     w2, w1
+	b.gt    invalidateCaches_flush_level
+
+invalidateCaches_end:
+	ret
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/close.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/close.c
new file mode 100644
index 0000000..2a80e24
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/close.c
@@ -0,0 +1,47 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _close(s32 fd);
+}
+#endif
+
+/*
+ * close -- We don't need to do anything, but pretend we did.
+ */
+
+__attribute__((weak)) s32 _close(s32 fd)
+{
+  (void)fd;
+  return (0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/errno.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/errno.c
new file mode 100644
index 0000000..cf6786b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/errno.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* The errno variable is stored in the reentrancy structure.  This
+   function returns its address for use by the macro errno defined in
+   errno.h.  */
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 * __errno (void);
+}
+#endif
+
+__attribute__((weak)) sint32 *
+__errno (void)
+{
+  return &_REENT->_errno;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/fcntl.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/fcntl.c
new file mode 100644
index 0000000..ebc0726
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/fcntl.c
@@ -0,0 +1,46 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/*
+ * fcntl -- Manipulate a file descriptor.
+ *          We don't have a filesystem, so we do nothing.
+ */
+__attribute__((weak)) s32 fcntl (s32 fd, s32 cmd, s32 arg)
+{
+  (void)fd;
+  (void)cmd;
+  (void)arg;
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/fstat.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/fstat.c
new file mode 100644
index 0000000..3ea45a2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/fstat.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf);
+}
+#endif
+/*
+ * fstat -- Since we have no file system, we just return an error.
+ */
+__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf)
+{
+  (void)fd;
+  buf->st_mode = S_IFCHR; /* Always pretend to be a tty */
+
+  return (0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/getpid.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/getpid.c
new file mode 100644
index 0000000..821ebbf
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/getpid.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "xil_types.h"
+/*
+ * getpid -- only one process, so just return 1.
+ */
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _getpid(void);
+}
+#endif
+
+__attribute__((weak)) s32 getpid(void)
+{
+  return 1;
+}
+
+__attribute__((weak)) s32 _getpid(void)
+{
+  return 1;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/initialise_monitor_handles.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/initialise_monitor_handles.c
new file mode 100644
index 0000000..e96d836
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/initialise_monitor_handles.c
@@ -0,0 +1,52 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file initialise_monitor_handles.c
+*
+* Contains blank function to avoid compilation error
+*
+* @note
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+******************************************************************************/
+__attribute__((weak)) void initialise_monitor_handles(){
+
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/isatty.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/isatty.c
new file mode 100644
index 0000000..baaf3fa
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/isatty.c
@@ -0,0 +1,56 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 _isatty(sint32 fd);
+}
+#endif
+
+/*
+ * isatty -- returns 1 if connected to a terminal device,
+ *           returns 0 if not. Since we're hooked up to a
+ *           serial port, we'll say yes _AND return a 1.
+ */
+__attribute__((weak)) sint32 isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
+
+__attribute__((weak)) sint32 _isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/kill.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/kill.c
new file mode 100644
index 0000000..bc01033
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/kill.c
@@ -0,0 +1,60 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _kill(s32 pid, s32 sig);
+}
+#endif
+
+/*
+ * kill -- go out via exit...
+ */
+
+__attribute__((weak)) s32 kill(s32 pid, s32 sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
+
+__attribute__((weak)) s32 _kill(s32 pid, s32 sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/lseek.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/lseek.c
new file mode 100644
index 0000000..ddbaaaf
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/lseek.c
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence);
+}
+#endif
+/*
+ * lseek --  Since a serial port is non-seekable, we return an error.
+ */
+__attribute__((weak)) off_t lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
+
+__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/open.c
new file mode 100644
index 0000000..000ee08
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/open.c
@@ -0,0 +1,52 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 open(const char8 *buf, s32 flags, s32 mode);
+}
+#endif
+/*
+ * open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 open(const char8 *buf, s32 flags, s32 mode)
+{
+  (void *)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/read.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/read.c
new file mode 100644
index 0000000..2cafee7
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/read.c
@@ -0,0 +1,111 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* read.c -- read bytes from a input device.
+ */
+
+#include "xparameters.h"
+#include "xil_printf.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _read (s32 fd, char8* buf, s32 nbytes);
+}
+#endif
+
+/*
+ * read  -- read bytes from the serial port. Ignore fd, since
+ *          we only have stdin.
+ */
+__attribute__((weak)) s32
+read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    *LocalBuf = inbyte();
+	    if ((*LocalBuf == '\n' )|| (*LocalBuf == '\r')) {
+	        break;
+		}
+	}
+	if(LocalBuf != NULL) {
+	LocalBuf -= i;
+	}
+  }
+
+  return (i + 1);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) s32
+_read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    *LocalBuf = inbyte();
+	    if ((*LocalBuf == '\n' )|| (*LocalBuf == '\r')) {
+	        break;
+		}
+	}
+	if(LocalBuf != NULL) {
+	LocalBuf -= i;
+	}
+  }
+
+  return (i + 1);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/sbrk.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/sbrk.c
new file mode 100644
index 0000000..785a2c9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/sbrk.c
@@ -0,0 +1,65 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) char8 *sbrk (s32 nbytes);
+}
+#endif
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+extern char8 HeapBase[];
+extern char8 HeapLimit[];
+
+
+
+__attribute__((weak)) char8 *sbrk (s32 nbytes)
+{
+  char8 *base;
+  static char8 *heap_ptr = HeapBase;
+
+  base = heap_ptr;
+  if(heap_ptr != NULL) {
+	heap_ptr += nbytes;
+  }
+
+/*  if (heap_ptr <= ((char8 *)&_heap_end + 1)) */
+  if (heap_ptr <= ((char8 *)&HeapLimit + 1)) {
+    return base;
+  }	else {
+    errno = ENOMEM;
+    return ((char8 *)-1);
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/translation_table.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/translation_table.S
new file mode 100644
index 0000000..7f48f7a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/translation_table.S
@@ -0,0 +1,170 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file translation_table.s
+*
+* This file contains the initialization for the MMU table in RAM
+* needed by the Cortex A53 processor
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00  pkp  05/21/14 Initial version
+*
+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+	.globl  MMUTableL0
+	.globl  MMUTableL1
+	.globl  MMUTableL2
+
+	.set reserved,	0x0 					/* Fault*/
+	.set Memory,	0x405 | (3 << 8) | (0x0)		/* normal writeback write allocate inner shared read write */
+	.set Device,	0x409 | (1 << 53)| (1 << 54) |(0x0)	/* strongly ordered read write non executable*/
+	.section .mmu_tbl0,"a"
+
+MMUTableL0:
+
+.set SECT, MMUTableL1
+.8byte	SECT + 0x3
+.set SECT, MMUTableL1+0x1000
+.8byte	SECT + 0x3
+
+	.section .mmu_tbl1,"a"
+
+MMUTableL1:
+
+.set SECT, MMUTableL2			/*1GB DDR*/
+.8byte	SECT + 0x3
+
+.rept	0x3				/*1GB DDR, 1GB PL, 2GB other devices n memory*/
+.set SECT, SECT + 0x1000
+.8byte	SECT + 0x3
+.endr
+
+.set SECT,0x100000000
+.rept	0xC
+.8byte	SECT + reserved
+.set SECT, SECT + 0x40000000	/*12GB Reserved*/
+.endr
+
+.rept	0x10
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*8GB PL, 8GB PCIe*/
+
+.endr
+
+.rept	0x20
+.8byte	SECT + Memory
+
+.set SECT, SECT + 0x40000000	/*32GB DDR*/
+.endr
+
+
+.rept	0xC0
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*192GB PL*/
+.endr
+
+
+.rept	0x100
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*256GB PL/PCIe*/
+.endr
+
+
+.rept	0x200
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*512GB PL/DDR*/
+.endr
+
+
+.section .mmu_tbl2,"a"
+
+MMUTableL2:
+
+.set SECT, 0
+
+.rept	0x0400			/*2GB DDR */
+.8byte	SECT + Memory
+.set	SECT, SECT+0x200000
+.endr
+
+.rept	0x0200			/*1GB lower PL*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x0100			/*512MB QSPI*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x080			/*256MB lower PCIe*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x040			/*128MB Reserved*/
+.8byte	SECT + reserved
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x8			/*16MB coresight*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x8			/*16MB RPU low latency port*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+
+.rept	0x022			/*68MB Device*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x8			/*8MB FPS*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+
+.rept	0x4			/*16MB LPS*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+
+.8byte	SECT + Device 		/*2MB PMU/CSU */
+.set	SECT, SECT+0x200000
+.8byte  SECT + Memory		/*2MB OCM/TCM*/
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/unlink.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/unlink.c
new file mode 100644
index 0000000..f54d1db
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/unlink.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 unlink(char8 *path);
+}
+#endif
+/*
+ * unlink -- since we have no file system,
+ *           we just return an error.
+ */
+__attribute__((weak)) s32 unlink(char8 *path)
+{
+  (void *)path;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/write.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/write.c
new file mode 100644
index 0000000..db6f9af
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/write.c
@@ -0,0 +1,111 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* write.c -- write bytes to an output device.
+ */
+
+#include "xparameters.h"
+#include "xil_printf.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _write (s32 fd, char8* buf, s32 nbytes);
+}
+#endif
+
+/*
+ * write -- write bytes to the serial port. Ignore fd, since
+ *          stdout and stderr are the same. Since we have no filesystem,
+ *          open will only return an error.
+ */
+__attribute__((weak)) s32
+write (s32 fd, char8* buf, s32 nbytes)
+
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) s32
+_write (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/xil-crt0.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/xil-crt0.S
new file mode 100644
index 0000000..2657938
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/xil-crt0.S
@@ -0,0 +1,115 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil-crt0.S
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00	pkp  05/21/14 Initial version
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+	.file	"xil-crt0.S"
+	.section ".got2","aw"
+	.align	2
+
+	.text
+.Lsbss_start:
+	.long	__sbss_start
+
+.Lsbss_end:
+	.long	__sbss_end
+
+.Lbss_start:
+	.long	__bss_start__
+
+.Lbss_end:
+	.long	__bss_end__
+
+
+
+	.globl	_startup
+_startup:
+
+	mov	x0, #0
+
+	/* clear sbss */
+	ldr 	w1,.Lsbss_start		/* calculate beginning of the SBSS */
+	ldr	w2,.Lsbss_end		/* calculate end of the SBSS */
+	uxtw	x1, w1			/*zero extension to w1 register*/
+	uxtw	x2, w2			/*zero extension to w2 register*/
+
+.Lloop_sbss:
+	cmp	x1,x2
+	bge	.Lenclsbss		/* If no SBSS, no clearing required */
+	str	x0, [x1], #8
+	b	.Lloop_sbss
+
+.Lenclsbss:
+	/* clear bss */
+	ldr	w1,.Lbss_start		/* calculate beginning of the BSS */
+	ldr	w2,.Lbss_end		/* calculate end of the BSS */
+	uxtw	x1, w1			/*zero extension to w1 register*/
+	uxtw	x2, w2			/*zero extension to w2 register*/
+
+.Lloop_bss:
+	cmp	x1,x2
+	bge	.Lenclbss		/* If no BSS, no clearing required */
+	str	x0, [x1], #8
+	b	.Lloop_bss
+
+.Lenclbss:
+
+	/* make sure argc and argv are valid */
+	mov	x0, #0
+	mov	x1, #0
+
+	bl	main			/* Jump to main C code */
+
+
+
+	bl	_exit
+
+.Lexit:	/* should never get here */
+	b .Lexit
+
+.Lstart:
+	.size	_startup,.Lstart-_startup
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/xpseudo_asm_gcc.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/xpseudo_asm_gcc.h
new file mode 100644
index 0000000..09376c5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/xpseudo_asm_gcc.h
@@ -0,0 +1,169 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_gcc.h
+*
+* This header file contains macros for using inline assembler code. It is
+* written specifically for the GNU compiler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp		 05/21/14 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XPSEUDO_ASM_GCC_H  /* prevent circular inclusions */
+#define XPSEUDO_ASM_GCC_H  /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/* necessary for pre-processor */
+#define stringify(s)	tostring(s)
+#define tostring(s)	#s
+
+/* pseudo assembler instructions */
+#define mfcpsr()	({u32 rval; \
+			   asm volatile("mrs %0,  DAIF" : "=r" (rval));\
+			  rval;\
+			 })
+
+#define mtcpsr(v) asm ("msr DAIF, %0" : : "r" (v))
+
+#define cpsiei()	//__asm__ __volatile__("cpsie	i\n")
+#define cpsidi()	//__asm__ __volatile__("cpsid	i\n")
+
+#define cpsief()	//__asm__ __volatile__("cpsie	f\n")
+#define cpsidf()	//__asm__ __volatile__("cpsid	f\n")
+
+
+
+#define mtgpr(rn, v)	/*__asm__ __volatile__(\
+			  "mov r" stringify(rn) ", %0 \n"\
+			  : : "r" (v)\
+			)*/
+
+#define mfgpr(rn)	/*({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mov %0,r" stringify(rn) "\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })*/
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+#define isb() asm ("isb sy")
+
+/* Data Synchronization Barrier */
+#define dsb() asm("dsb sy")
+
+/* Data Memory Barrier */
+#define dmb() asm("dmb sy")
+
+
+/* Memory Operations */
+#define ldr(adr)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "ldr	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define ldrb(adr)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "ldrb	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define str(adr, val)	__asm__ __volatile__(\
+			  "str	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+#define strb(adr, val)	__asm__ __volatile__(\
+			  "strb	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+/* Count leading zeroes (clz) */
+#define clz(arg)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "clz	%0,%1"\
+			    : "=r" (rval) : "r" (arg)\
+			  );\
+			  rval;\
+			 })
+#define mtcpdc(reg,val)	asm("dc " #reg ",%0"  : : "r" (val))
+#define mtcpic(reg,val)	asm("ic " #reg ",%0"  : : "r" (val))
+
+#define mtcpicall(reg)	asm("ic " #reg)
+#define mtcptlbi(reg)	asm("tlbi " #reg)
+#define mtcpat(reg,val)	asm("at " #reg ",%0"  : : "r" (val))
+/* CP15 operations */
+#define mfcp(reg)	({u32 rval;\
+			asm("mrs	%0, " #reg : "=r" (rval));\
+			rval;\
+			})
+
+#define mtcp(reg,val)	asm("msr " #reg ",%0"  : : "r" (val))
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XPSEUDO_ASM_GCC_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/print.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/print.c
new file mode 100644
index 0000000..0ab15e9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/print.c
@@ -0,0 +1,32 @@
+/* print.c -- print a string on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ */
+
+/*
+ * print -- do a raw print of a string
+ */
+#include "xil_printf.h"
+
+void print(const char8 *ptr)
+{
+#ifdef STDOUT_BASEADDRESS
+  while (*ptr != (char8)0) {
+    outbyte (*ptr);
+	*ptr++;
+  }
+#else
+(void)ptr;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/putnum.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/putnum.c
new file mode 100644
index 0000000..78cb715
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/putnum.c
@@ -0,0 +1,59 @@
+/* putnum.c -- put a hex number on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+/*
+ * putnum -- print a 32 bit number in hex
+ */
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Function Prototypes ******************************/
+extern void print (const char8 *ptr);
+void putnum(u32 num);
+
+void putnum(u32 num)
+{
+  char8  buf[9];
+  u32  cnt;
+  s32 i;
+  char8  *ptr;
+  u32  digit;
+  for(i = 0; i<9; i++) {
+	buf[i] = '0';
+  }
+
+  ptr = buf;
+  for (cnt = 7U ; cnt >= 0U ; cnt--) {
+    digit = ((num >> (cnt * 4U)) & 0x0000000FU);
+
+    if ((digit <= 9U) && (ptr != NULL)) {
+		digit += (u32)'0';
+		*ptr = ((char8) digit);
+		ptr += 1;
+	} else if (ptr != NULL) {
+		digit += ((u32)'a' - (u32)10);
+		*ptr = ((char8)digit);
+		ptr += 1;
+	} else {
+		/*Made for MisraC Compliance*/;
+	}
+  }
+
+  if(ptr != NULL) {
+	  *ptr = (char8) 0;
+  }
+  print (buf);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/sleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/sleep.c
new file mode 100644
index 0000000..da5b3e1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/sleep.c
@@ -0,0 +1,86 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************
+*
+* @file sleep.c
+*
+* This function provides a second delay using the Global Timer register in
+* the ARM Cortex A53 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+
+/*****************************************************************************/
+/*
+*
+* This API is used to provide delays in seconds
+*
+* @param	seconds requested
+*
+* @return	0 always
+*
+* @note		None.
+*
+****************************************************************************/
+s32 sleep(u32 seconds)
+{
+	XTime tEnd, tCur;
+
+	/*write 50MHz frequency to System Time Stamp Generator Register*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
+
+	/*Enable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
+
+	XTime_GetTime(&tCur);
+	tEnd  = tCur + (((XTime) seconds) * COUNTS_PER_SECOND);
+	do
+	{
+		XTime_GetTime(&tCur);
+	} while (tCur < tEnd);
+
+	/*Disable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),(~(XIOU_SCNTRS_CNT_CNTRL_REG_EN)));
+	return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/sleep.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/sleep.h
new file mode 100644
index 0000000..cd2c965
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/sleep.h
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#ifndef SLEEP_H
+#define SLEEP_H
+
+#include "xil_types.h"
+#include "xil_io.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+s32 usleep(u32 useconds);
+s32 sleep(u32 seconds);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/usleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/usleep.c
new file mode 100644
index 0000000..9b9c488
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/usleep.c
@@ -0,0 +1,93 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file usleep.c
+*
+* This function provides a microsecond delay using the Global Timer register in
+* the ARM Cortex A53 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+#include "xpseudo_asm.h"
+#include "xreg_cortexa53.h"
+
+/* Global Timer is always clocked at half of the CPU frequency */
+#define COUNTS_PER_USECOND  (COUNTS_PER_SECOND/1000000 )
+
+/*****************************************************************************/
+/**
+*
+* This API gives a delay in microseconds
+*
+* @param	useconds requested
+*
+* @return	0 if the delay can be achieved, -1 if the requested delay
+*		is out of range
+*
+* @note		None.
+*
+****************************************************************************/
+s32 usleep(u32 useconds)
+{
+	XTime tEnd, tCur;
+
+	/*write 50MHz frequency to System Time Stamp Generator Register*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
+
+	/*Enable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
+
+	XTime_GetTime(&tCur);
+	tEnd = tCur + (((XTime) useconds) * COUNTS_PER_USECOND);
+	do
+	{
+		XTime_GetTime(&tCur);
+	} while (tCur < tEnd);
+
+	/*Disable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),(~(XIOU_SCNTRS_CNT_CNTRL_REG_EN)));
+	return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/vectors.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/vectors.c
new file mode 100644
index 0000000..864e468
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/vectors.c
@@ -0,0 +1,149 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.c
+*
+* This file contains the C level vectors for the ARM Cortex A53 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xil_exception.h"
+#include "vectors.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+extern XExc_VectorTableEntry XExc_VectorTable[];
+
+/************************** Function Prototypes ******************************/
+
+
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the FIQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void FIQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_FIQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_FIQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the IRQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void IRQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_IRQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_IRQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the Synchronous Interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void SynchronousInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_SYNC_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_SYNC_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the SError Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void SErrorInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_SERROR_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_SERROR_ABORT_INT].Data);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/vectors.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/vectors.h
new file mode 100644
index 0000000..c0edb84
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/vectors.h
@@ -0,0 +1,81 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.h
+*
+* This file contains the C level vector prototypes for the ARM Cortex A53 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef _VECTORS_H_
+#define _VECTORS_H_
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+void FIQInterrupt(void);
+void IRQInterrupt(void);
+void SynchronousInterrupt(void);
+void SErrorInterrupt(void);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_cache.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_cache.c
new file mode 100644
index 0000000..43b540d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_cache.c
@@ -0,0 +1,648 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.c
+*
+* Contains required functions for the ARM cache functionality. Cache APIs are
+* yet to be implemented. They are left blank to avoid any compilation error
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xil_io.h"
+#include "xpseudo_asm.h"
+#include "xparameters.h"
+#include "xreg_cortexa53.h"
+#include "xil_exception.h"
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+#define IRQ_FIQ_MASK 0xC0U	/* Mask IRQ and FIQ interrupts in cpsr */
+
+/****************************************************************************
+*
+* Enable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+
+void Xil_DCacheEnable(void)
+{
+	u32 CtrlReg;
+	CtrlReg = mfcp(SCTLR_EL3);
+	/* enable caches only if they are disabled */
+	if((CtrlReg & XREG_CONTROL_DCACHE_BIT) == 0X00000000U){
+
+		/* invalidate the Data cache */
+		Xil_DCacheInvalidate();
+
+		CtrlReg |= XREG_CONTROL_DCACHE_BIT;
+
+		/* enable the Data cache */
+		mtcp(SCTLR_EL3,CtrlReg);
+	}
+}
+
+/****************************************************************************
+*
+* Disable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheDisable(void)
+{
+	u32 CtrlReg;
+	/* clean and invalidate the Data cache */
+	Xil_DCacheFlush();
+	CtrlReg = mfcp(SCTLR_EL3);
+
+	CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+	/* disable the Data cache */
+	mtcp(SCTLR_EL3,CtrlReg);
+}
+
+/****************************************************************************
+*
+* invalidate the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidate(void)
+{
+	register u32 CsidReg, C7Reg;
+	u32 LineSize, NumWays;
+	u32 Way, WayIndex,WayAdjust, Set, SetIndex, NumSet, NumCacheLevel, CacheLevel,CacheLevelIndex;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+
+	/* Number of level of cache*/
+	NumCacheLevel = (mfcp(CLIDR_EL1)>>24U) & 0x00000007U;
+
+	CacheLevel=0U;
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(CSSELR_EL1,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(CCSIDR_EL1);
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0X00000001U;
+
+	/*Number of Set*/
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0X00000001U;
+
+	WayAdjust = clz(NumWays) - (u32)0x0000001FU;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex =0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex =0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcpdc(ISW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += (0x00000001U << WayAdjust);
+	}
+
+	/* Wait for invalidate to complete */
+	dsb();
+
+	/* Select cache level 1 and D cache in CSSR */
+	CacheLevel += (0x00000001U<<1U) ;
+	mtcp(CSSELR_EL1,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(CCSIDR_EL1);
+
+	/* Get the cacheline size, way size, index size from csidr */
+		LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0x00000001U;
+
+	/* Number of Sets */
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0x00000001U;
+
+	WayAdjust = clz(NumWays) - (u32)0x0000001FU;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex = 0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex = 0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcpdc(ISW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += (0x00000001U << WayAdjust);
+	}
+	/* Wait for invalidate to complete */
+	dsb();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate a Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the modified contents
+* are written to system memory before the line is invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 6 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateLine(INTPTR adr)
+{
+
+	u32 currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(CSSELR_EL1,0x0);
+	mtcpdc(IVAC,(adr & (~0x3F)));
+	/* Wait for invalidate to complete */
+	dsb();
+	/* Select cache level 1 and D cache in CSSR */
+	mtcp(CSSELR_EL1,0x2);
+	mtcpdc(IVAC,(adr & (~0x3F)));
+	/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate the Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated. If the cacheline
+* is modified (dirty), the modified contents are written to system memory
+* before the line is invalidated.
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateRange(INTPTR  adr, INTPTR len)
+{
+	const u32 cacheline = 64U;
+	INTPTR end;
+	INTPTR tempadr = adr;
+	INTPTR tempend;
+	u32 currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	if (len != 0U) {
+		end = tempadr + len;
+		tempend = end;
+
+		if ((tempadr & (cacheline-1U)) != 0U) {
+			tempadr &= (~(cacheline - 1U));
+			Xil_DCacheFlushLine(tempadr);
+			tempadr += cacheline;
+		}
+		if ((tempend & (cacheline-1U)) != 0U) {
+			tempend &= (~(cacheline - 1U));
+			Xil_DCacheFlushLine(tempend);
+		}
+
+		while (tempadr < tempend) {
+			/* Select cache level 0 and D cache in CSSR */
+			mtcp(CSSELR_EL1,0x0);
+			/* Invalidate Data cache line */
+			mtcpdc(IVAC,(tempadr & (~0x3F)));
+			/* Wait for invalidate to complete */
+			dsb();
+			/* Select cache level 0 and D cache in CSSR */
+			mtcp(CSSELR_EL1,0x2);
+			/* Invalidate Data cache line */
+			mtcpdc(IVAC,(tempadr & (~0x3F)));
+			/* Wait for invalidate to complete */
+			dsb();
+			tempadr += cacheline;
+		}
+	}
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheFlush(void)
+{
+	register u32 CsidReg, C7Reg;
+	u32 LineSize, NumWays;
+	u32 Way, WayIndex,WayAdjust, Set, SetIndex, NumSet, NumCacheLevel, CacheLevel,CacheLevelIndex;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+
+	/* Number of level of cache*/
+	NumCacheLevel = (mfcp(CLIDR_EL1)>>24U) & 0x00000007U;
+
+	CacheLevel = 0U;
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(CSSELR_EL1,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(CCSIDR_EL1);
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0x00000001U;
+
+	/*Number of Set*/
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0x00000001U;
+
+	WayAdjust = clz(NumWays) - (u32)0x0000001FU;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Flush all the cachelines */
+	for (WayIndex = 0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex = 0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcpdc(CISW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += (0x00000001U << WayAdjust);
+	}
+
+	/* Wait for Flush to complete */
+	dsb();
+
+	/* Select cache level 1 and D cache in CSSR */
+	CacheLevel += (0x00000001U << 1U);
+	mtcp(CSSELR_EL1,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(CCSIDR_EL1);
+
+	/* Get the cacheline size, way size, index size from csidr */
+		LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0x00000001U;
+
+	/* Number of Sets */
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0x00000001U;
+
+	WayAdjust=clz(NumWays) - (u32)0x0000001FU;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Flush all the cachelines */
+	for (WayIndex =0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex =0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcpdc(CISW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set=0U;
+		Way += (0x00000001U<
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+******************************************************************************/
+#ifndef XIL_CACHE_H
+#define XIL_CACHE_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void Xil_DCacheEnable(void);
+void Xil_DCacheDisable(void);
+void Xil_DCacheInvalidate(void);
+void Xil_DCacheInvalidateRange(INTPTR adr, INTPTR len);
+void Xil_DCacheInvalidateLine(INTPTR adr);
+void Xil_DCacheFlush(void);
+void Xil_DCacheFlushRange(INTPTR adr, INTPTR len);
+void Xil_DCacheFlushLine(INTPTR adr);
+
+void Xil_ICacheEnable(void);
+void Xil_ICacheDisable(void);
+void Xil_ICacheInvalidate(void);
+void Xil_ICacheInvalidateRange(INTPTR adr, INTPTR len);
+void Xil_ICacheInvalidateLine(INTPTR adr);
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_exception.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_exception.c
new file mode 100644
index 0000000..7a22051
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_exception.c
@@ -0,0 +1,214 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xil_exception.c
+*
+* This file contains low-level driver functions for the Cortex A53 exception
+* Handler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+#include "xpseudo_asm.h"
+#include "xdebug.h"
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Function Prototypes *****************************/
+
+static void Xil_ExceptionNullHandler(void *Data);
+
+/************************** Variable Definitions *****************************/
+/*
+ * Exception vector table to store handlers for each exception vector.
+ */
+XExc_VectorTableEntry XExc_VectorTable[XIL_EXCEPTION_ID_LAST + 1] =
+{
+        {Xil_ExceptionNullHandler, NULL},
+        {Xil_SyncAbortHandler, NULL},
+        {Xil_ExceptionNullHandler, NULL},
+        {Xil_ExceptionNullHandler, NULL},
+        {Xil_SErrorAbortHandler, NULL},
+
+};
+/****************************************************************************/
+/**
+*
+* This function is a stub Handler that is the default Handler that gets called
+* if the application has not setup a Handler for a specific  exception. The
+* function interface has to match the interface specified for a Handler even
+* though none of the arguments are used.
+*
+* @param	Data is unused by this function.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void Xil_ExceptionNullHandler(void *Data)
+{
+	(void *)Data;
+DieLoop: goto DieLoop;
+}
+
+/****************************************************************************/
+/**
+*
+* The function is a common API used to initialize exception handlers across all
+* processors supported. For ARM CortexA53, the exception handlers are being
+* initialized statically and hence this function does not do anything.
+*
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xil_ExceptionInit(void)
+{
+	return;
+}
+
+/*****************************************************************************/
+/**
+*
+* Makes the connection between the Id of the exception source and the
+* associated Handler that is to run when the exception is recognized. The
+* argument provided in this call as the Data is used as the argument
+* for the Handler when it is called.
+*
+* @param	exception_id contains the ID of the exception source and should
+*		be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+		See xil_exception_l.h for further information.
+* @param	Handler to the Handler for that exception.
+* @param	Data is a reference to Data that will be passed to the
+*		Handler when it gets called.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRegisterHandler(u32 Exception_id,
+				    Xil_ExceptionHandler Handler,
+				    void *Data)
+{
+	XExc_VectorTable[Exception_id].Handler = Handler;
+	XExc_VectorTable[Exception_id].Data = Data;
+}
+
+/*****************************************************************************/
+/**
+*
+* Removes the Handler for a specific exception Id. The stub Handler is then
+* registered for this exception Id.
+*
+* @param	exception_id contains the ID of the exception source and should
+*		be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+*		See xil_exception_l.h for further information.
+
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRemoveHandler(u32 Exception_id)
+{
+	Xil_ExceptionRegisterHandler(Exception_id,
+				       Xil_ExceptionNullHandler,
+				       NULL);
+}
+/*****************************************************************************/
+/**
+*
+* Default Synchronous abort handler which prints a debug message on console if
+* Debug flag is enabled
+*
+* @param        None
+*
+* @return       None.
+*
+* @note         None.
+*
+****************************************************************************/
+
+void Xil_SyncAbortHandler(void *CallBackRef){
+	xdbg_printf(XDBG_DEBUG_ERROR, "Synchronous abort \n");
+	while(1) {
+		;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* Default SError abort handler which prints a debug message on console if
+* Debug flag is enabled
+*
+* @param        None
+*
+* @return       None.
+*
+* @note         None.
+*
+****************************************************************************/
+void Xil_SErrorAbortHandler(void *CallBackRef){
+	xdbg_printf(XDBG_DEBUG_ERROR, "Synchronous abort \n");
+	while(1) {
+		;
+	}
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_exception.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_exception.h
new file mode 100644
index 0000000..83fbf2e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_exception.h
@@ -0,0 +1,168 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_exception.h
+*
+* This header file contains ARM Cortex A53 specific exception related APIs.
+* For exception related functions that can be used across all Xilinx supported
+* processors, please use xil_exception.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_EXCEPTION_H /* prevent circular inclusions */
+#define XIL_EXCEPTION_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions ****************************/
+
+#define XIL_EXCEPTION_FIQ	XREG_CPSR_FIQ_ENABLE
+#define XIL_EXCEPTION_IRQ	XREG_CPSR_IRQ_ENABLE
+#define XIL_EXCEPTION_ALL	(XREG_CPSR_FIQ_ENABLE | XREG_CPSR_IRQ_ENABLE)
+
+#define XIL_EXCEPTION_ID_FIRST			0U
+#define XIL_EXCEPTION_ID_SYNC_INT		1U
+#define XIL_EXCEPTION_ID_IRQ_INT		2U
+#define XIL_EXCEPTION_ID_FIQ_INT		3U
+#define XIL_EXCEPTION_ID_SERROR_ABORT_INT		4U
+#define XIL_EXCEPTION_ID_LAST			5U
+
+/*
+ * XIL_EXCEPTION_ID_INT is defined for all Xilinx processors.
+ */
+#define XIL_EXCEPTION_ID_INT	XIL_EXCEPTION_ID_IRQ_INT
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef is the exception handler function.
+ */
+typedef void (*Xil_ExceptionHandler)(void *data);
+typedef void (*Xil_InterruptHandler)(void *data);
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* Enable Exceptions.
+*
+* @param	Mask for exceptions to be enabled.
+*
+* @return	None.
+*
+* @note		If bit is 0, exception is enabled.
+*		C-Style signature: void Xil_ExceptionEnableMask(Mask)
+*
+******************************************************************************/
+
+#define Xil_ExceptionEnableMask(Mask)	\
+		mtcpsr(mfcpsr() & ~ ((Mask) & XIL_EXCEPTION_ALL))
+
+/****************************************************************************/
+/**
+* Enable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionEnable() \
+		Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ)
+
+/****************************************************************************/
+/**
+* Disable Exceptions.
+*
+* @param	Mask for exceptions to be enabled.
+*
+* @return	None.
+*
+* @note		If bit is 1, exception is disabled.
+*		C-Style signature: Xil_ExceptionDisableMask(Mask)
+*
+******************************************************************************/
+
+#define Xil_ExceptionDisableMask(Mask)	\
+		mtcpsr(mfcpsr() | ((Mask) & XIL_EXCEPTION_ALL))
+
+/****************************************************************************/
+/**
+* Disable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionDisable() \
+		Xil_ExceptionDisableMask(XIL_EXCEPTION_IRQ)
+
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+extern void Xil_ExceptionRegisterHandler(u32 Exception_id,
+					 Xil_ExceptionHandler Handler,
+					 void *Data);
+
+extern void Xil_ExceptionRemoveHandler(u32 Exception_id);
+
+extern void Xil_ExceptionInit(void);
+
+void Xil_SyncAbortHandler(void *CallBackRef);
+
+void Xil_SErrorAbortHandler(void *CallBackRef);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_EXCEPTION_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_io.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_io.c
new file mode 100644
index 0000000..353ceb4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_io.c
@@ -0,0 +1,381 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.c
+*
+* Contains I/O functions for memory-mapped or non-memory-mapped I/O
+* architectures.  These functions encapsulate Cortex A53 architecture-specific
+* I/O requirements.
+*
+* @note
+*
+* This file contains architecture-dependent code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xpseudo_asm.h"
+#include "xreg_cortexa53.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for an 8-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u8 Xil_In8(INTPTR Addr)
+{
+	return *(volatile u8 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 16-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_In16(INTPTR Addr)
+{
+	return *(volatile u16 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 32-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_In32(INTPTR Addr)
+{
+	return *(volatile u32 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for an 8-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out8(INTPTR Addr, u8 Value)
+{
+	u8 *LocalAddr = (u8 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 16-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out16(INTPTR Addr, u16 Value)
+{
+	u16 *LocalAddr = (u16 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 32-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out32(INTPTR Addr, u32 Value)
+{
+	u32 *LocalAddr = (u32 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 64-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out64(INTPTR Addr, u64 Value)
+{
+	u64 *LocalAddr = (u64 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 64-bit memory location by reading the
+* specified Value to the the specified address.
+*
+* @param	OutAddress contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+u64 Xil_In64(INTPTR Addr)
+{
+	return *(volatile u64 *) Addr;
+}
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 16-bit memory location by reading from the
+* specified address and returning the byte-swapped Value read from that
+* address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The byte-swapped Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_In16BE(INTPTR Addr)
+{
+	u16 temp;
+	u16 result;
+
+	temp = Xil_In16(Addr);
+
+	result = Xil_EndianSwap16(temp);
+
+	return result;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 32-bit memory location by reading from the
+* specified address and returning the byte-swapped Value read from that
+* address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The byte-swapped Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_In32BE(INTPTR Addr)
+{
+	u32 temp;
+	u32 result;
+
+	temp = Xil_In32(Addr);
+
+	result = Xil_EndianSwap32(temp);
+
+	return result;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 16-bit memory location by writing the
+* specified Value to the the specified address. The Value is byte-swapped
+* before being written.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out16BE(INTPTR Addr, u16 Value)
+{
+	u16 temp;
+
+	temp = Xil_EndianSwap16(Value);
+
+    Xil_Out16(Addr, temp);
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 32-bit memory location by writing the
+* specified Value to the the specified address. The Value is byte-swapped
+* before being written.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out32BE(INTPTR Addr, u32 Value)
+{
+	u32 temp;
+
+	temp = Xil_EndianSwap32(Value);
+
+    Xil_Out32(Addr, temp);
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a 16-bit endian converion.
+*
+* @param	Data contains the value to be converted.
+*
+* @return	converted value.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_EndianSwap16(u16 Data)
+{
+	return (u16) (((Data & 0xFF00U) >> 8U) | ((Data & 0x00FFU) << 8U));
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a 32-bit endian converion.
+*
+* @param	Data contains the value to be converted.
+*
+* @return	converted value.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_EndianSwap32(u32 Data)
+{
+	u16 LoWord;
+	u16 HiWord;
+
+	/* get each of the half words from the 32 bit word */
+
+	LoWord = (u16) (Data & 0x0000FFFFU);
+	HiWord = (u16) ((Data & 0xFFFF0000U) >> 16U);
+
+	/* byte swap each of the 16 bit half words */
+
+	LoWord = (((LoWord & 0xFF00U) >> 8U) | ((LoWord & 0x00FFU) << 8U));
+	HiWord = (((HiWord & 0xFF00U) >> 8U) | ((HiWord & 0x00FFU) << 8U));
+
+	/* swap the half words before returning the value */
+
+	return ((((u32)LoWord) << (u32)16U) | (u32)HiWord);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_io.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_io.h
new file mode 100644
index 0000000..0692ce3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_io.h
@@ -0,0 +1,240 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.h
+*
+* This file contains the interface for the general IO component, which
+* encapsulates the Input/Output functions for processors that do not
+* require any special I/O handling.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+******************************************************************************/
+
+#ifndef XIL_IO_H           /* prevent circular inclusions */
+#define XIL_IO_H           /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+#include "xil_printf.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#  define SYNCHRONIZE_IO	dmb()
+#  define INST_SYNC		isb()
+#  define DATA_SYNC		dsb()
+
+
+/*****************************************************************************/
+/**
+*
+* Perform an big-endian input operation for a 16-bit memory location
+* by reading from the specified address and returning the Value read from
+* that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The Value read from the specified input address with the
+*		proper endianness. The return Value has the same endianness
+*		as that of the processor, i.e. if the processor is
+*		little-engian, the return Value is the byte-swapped Value read
+*		from the address.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_In16LE(Addr) Xil_In16((Addr))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian input operation for a 32-bit memory location
+* by reading from the specified address and returning the Value read from
+* that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The Value read from the specified input address with the
+*		proper endianness. The return Value has the same endianness
+*		as that of the processor, i.e. if the processor is
+*		little-engian, the return Value is the byte-swapped Value read
+*		from the address.
+*
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_In32LE(Addr) Xil_In32((Addr))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian output operation for a 16-bit memory location
+* by writing the specified Value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the Value to be output at the specified address.
+*		The Value has the same endianness as that of the processor.
+*		If the processor is little-endian, the byte-swapped Value is
+*		written to the address.
+*
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Out16LE(Addr, Value) Xil_Out16((Addr), (Value))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian output operation for a 32-bit memory location
+* by writing the specified Value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the Value to be output at the specified address.
+*		The Value has the same endianness as that of the processor.
+*		If the processor is little-endian, the byte-swapped Value is
+*		written to the address.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Out32LE(Addr, Value) Xil_Out32((Addr), (Value))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 32-bit number from host byte order to network byte order.
+*
+* @param	Data the 32-bit number to be converted.
+*
+* @return	The converted 32-bit number in network byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Htonl(Data) Xil_EndianSwap32((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 16-bit number from host byte order to network byte order.
+*
+* @param	Data the 16-bit number to be converted.
+*
+* @return	The converted 16-bit number in network byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Htons(Data) Xil_EndianSwap16((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 32-bit number from network byte order to host byte order.
+*
+* @param	Data the 32-bit number to be converted.
+*
+* @return	The converted 32-bit number in host byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Ntohl(Data) Xil_EndianSwap32((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 16-bit number from network byte order to host byte order.
+*
+* @param	Data the 16-bit number to be converted.
+*
+* @return	The converted 16-bit number in host byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Ntohs(Data) Xil_EndianSwap16((Data))
+
+/************************** Function Prototypes ******************************/
+
+/* The following functions allow the software to be transportable across
+ * processors which may use memory mapped I/O or I/O which is mapped into a
+ * seperate address space.
+ */
+u8 Xil_In8(INTPTR Addr);
+u16 Xil_In16(INTPTR Addr);
+u32 Xil_In32(INTPTR Addr);
+u64 Xil_In64(INTPTR Addr);
+
+void Xil_Out8(INTPTR Addr, u8 Value);
+void Xil_Out16(INTPTR Addr, u16 Value);
+void Xil_Out32(INTPTR Addr, u32 Value);
+void Xil_Out64(INTPTR Addr, u64 Value);
+
+
+u16 Xil_In16BE(INTPTR Addr);
+u32 Xil_In32BE(INTPTR Addr);
+void Xil_Out16BE(INTPTR Addr, u16 Value);
+void Xil_Out32BE(INTPTR Addr, u32 Value);
+
+u16 Xil_EndianSwap16(u16 Data);
+u32 Xil_EndianSwap32(u32 Data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_mmu.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_mmu.c
new file mode 100644
index 0000000..6a883d6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_mmu.c
@@ -0,0 +1,119 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.c
+*
+* This file provides APIs for enabling/disabling MMU and setting the memory
+* attributes for sections, in the MMU translation table.
+* MMU APIs are yet to be implemented. They are left blank to avoid any
+* compilation error
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+#include "xil_mmu.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+#define BLOCK_SIZE_2MB 0x200000U
+#define BLOCK_SIZE_1GB 0x40000000U
+#define ADDRESS_LIMIT_4GB 0x100000000UL
+
+/************************** Variable Definitions *****************************/
+
+extern INTPTR MMUTableL1;
+extern INTPTR MMUTableL2;
+
+/************************** Function Prototypes ******************************/
+/*****************************************************************************
+*
+* Set the memory attributes for a section, in the translation table.
+*
+* @param	addr is the address for which attributes are to be set.
+* @param	attrib specifies the attributes for that memory region.
+*
+* @return	None.
+*
+* @note		The MMU and D-cache need not be disabled before changing an
+*			translation table attribute.
+*
+******************************************************************************/
+
+void Xil_SetTlbAttributes(INTPTR Addr, u64 attrib)
+{
+	INTPTR *ptr;
+	INTPTR section;
+	u64 block_size;
+	/* if region is less than 4GB MMUTable level 2 need to be modified */
+	if(Addr < ADDRESS_LIMIT_4GB){
+		/* block size is 2MB for addressed < 4GB*/
+		block_size = BLOCK_SIZE_2MB;
+		section = Addr / block_size;
+		ptr = &MMUTableL2 + section;
+	}
+	/* if region is greater than 4GB MMUTable level 1 need to be modified */
+	else{
+		/* block size is 1GB for addressed > 4GB */
+		block_size = BLOCK_SIZE_1GB;
+		section = Addr / block_size;
+		ptr = &MMUTableL1 + section;
+	}
+	*ptr = (Addr & (~(block_size-1))) | attrib;
+
+	Xil_DCacheFlush();
+	mtcptlbi(ALLE3);
+
+	dsb(); /* ensure completion of the BP and TLB invalidation */
+    isb(); /* synchronize context on this processor */
+
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_mmu.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_mmu.h
new file mode 100644
index 0000000..f00b7ae
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_mmu.h
@@ -0,0 +1,105 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.h
+*
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef XIL_MMU_H
+#define XIL_MMU_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/* Memory type */
+#define NORM_NONCACHE 0x401UL 	/* Normal Non-cacheable*/
+#define STRONG_ORDERED 0x409UL	/* Strongly ordered (Device-nGnRnE)*/
+#define DEVICE_MEMORY 0x40DUL	/* Device memory (Device-nGnRE)*/
+#define RESERVED 0x0UL			/* reserved memory*/
+
+/* Normal write-through cacheable inner shareable*/
+#define NORM_WT_CACHE 0x711UL
+
+/* Normal write back cacheable inner-shareable */
+#define NORM_WB_CACHE 0x705UL
+
+/*
+ * shareability attribute only applicable to
+ * normal cacheable memory
+ */
+#define INNER_SHAREABLE (0x3 << 8)UL
+#define OUTER_SHAREABLE (0x2 << 8)UL
+#define NON_SHAREABLE	(~(0x3 << 8))UL
+
+/* Execution type */
+#define EXECUTE_NEVER ((0x1 << 53) | (0x1 << 54))UL
+
+/* Security type */
+#define NON_SECURE	(0x1 << 5)UL
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void Xil_SetTlbAttributes(INTPTR Addr, u64 attrib);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_MMU_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_printf.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_printf.c
new file mode 100644
index 0000000..ca5023c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_printf.c
@@ -0,0 +1,400 @@
+/*---------------------------------------------------*/
+/* Modified from :                                   */
+/* Public Domain version of printf                   */
+/* Rud Merriam, Compsult, Inc. Houston, Tx.          */
+/* For Embedded Systems Programming, 1991            */
+/*                                                   */
+/*---------------------------------------------------*/
+#include "xil_printf.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include 
+#include 
+#include 
+
+typedef struct params_s {
+    s32 len;
+    s32 num1;
+    s32 num2;
+    char8 pad_character;
+    s32 do_padding;
+    s32 left_flag;
+    s32 unsigned_flag;
+} params_t;
+
+static void padding( const s32 l_flag,const params_t *par);
+static void outs(const charptr lp, params_t *par);
+static s32 getnum( charptr* linep);
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine puts pad characters into the output  */
+/* buffer.                                           */
+/*                                                   */
+static void padding( const s32 l_flag, const params_t *par)
+{
+    s32 i;
+
+    if ((par->do_padding != 0) && (l_flag != 0) && (par->len < par->num1)) {
+		i=(par->len);
+        for (; i<(par->num1); i++) {
+            outbyte( par->pad_character);
+		}
+    }
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a string to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+static void outs(const charptr lp, params_t *par)
+{
+    charptr LocalPtr;
+	LocalPtr = lp;
+    /* pad on left if needed                         */
+	if(LocalPtr != NULL) {
+		par->len = (s32)strlen( LocalPtr);
+	}
+    padding( !(par->left_flag), par);
+
+    /* Move string to the buffer                     */
+    while (((*LocalPtr) != (char8)0) && ((par->num2) != 0)) {
+		(par->num2)--;
+        outbyte(*LocalPtr);
+		LocalPtr += 1;
+}
+
+    /* Pad on right if needed                        */
+    /* CR 439175 - elided next stmt. Seemed bogus.   */
+    /* par->len = strlen( lp)                      */
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a number to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+
+static void outnum( const s32 n, const s32 base, params_t *par)
+{
+    charptr cp;
+    s32 negative;
+	s32 i;
+    char8 outbuf[32];
+    const char8 digits[] = "0123456789ABCDEF";
+    u32 num;
+    for(i = 0; i<32; i++) {
+	outbuf[i] = '0';
+    }
+
+    /* Check if number is negative                   */
+    if ((par->unsigned_flag == 0) && (base == 10) && (n < 0L)) {
+        negative = 1;
+		num =(-(n));
+    }
+    else{
+        num = (n);
+        negative = 0;
+    }
+
+    /* Build number (backwards) in outbuf            */
+    i = 0;
+    do {
+		outbuf[i] = digits[(num % base)];
+		i++;
+		num /= base;
+    } while (num > 0);
+
+    if (negative != 0) {
+		outbuf[i] = '-';
+		i++;
+	}
+
+    outbuf[i] = 0;
+    i--;
+
+    /* Move the converted number to the buffer and   */
+    /* add in the padding where needed.              */
+    par->len = (s32)strlen(outbuf);
+    padding( !(par->left_flag), par);
+    while (&outbuf[i] >= outbuf) {
+	outbyte( outbuf[i] );
+		i--;
+}
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a 64-bit number to the output  */
+/* buffer as directed by the padding and positioning */
+/* flags. 											 */
+/*                                                   */
+
+static void outnum1( const s64 n, const s32 base, params_t *par)
+{
+    charptr cp;
+    s32 negative;
+	s32 i;
+    char8 outbuf[64];
+    const char8 digits[] = "0123456789ABCDEF";
+    u64 num;
+    for(i = 0; i<64; i++) {
+	outbuf[i] = '0';
+    }
+
+    /* Check if number is negative                   */
+    if ((par->unsigned_flag == 0) && (base == 10) && (n < 0L)) {
+        negative = 1;
+		num =(-(n));
+    }
+    else{
+        num = (n);
+        negative = 0;
+    }
+
+    /* Build number (backwards) in outbuf            */
+    i = 0;
+    do {
+		outbuf[i] = digits[(num % base)];
+		i++;
+		num /= base;
+    } while (num > 0);
+
+    if (negative != 0) {
+		outbuf[i] = '-';
+		i++;
+	}
+
+    outbuf[i] = 0;
+    i--;
+
+    /* Move the converted number to the buffer and   */
+    /* add in the padding where needed.              */
+    par->len = (s32)strlen(outbuf);
+    padding( !(par->left_flag), par);
+    while (&outbuf[i] >= outbuf) {
+	outbyte( outbuf[i] );
+		i--;
+}
+    padding( par->left_flag, par);
+}
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine gets a number from the format        */
+/* string.                                           */
+/*                                                   */
+static s32 getnum( charptr* linep)
+{
+    s32 n;
+    s32 ResultIsDigit = 0;
+    charptr cptr;
+    n = 0;
+    cptr = *linep;
+	if(cptr != NULL){
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    while (ResultIsDigit != 0) {
+		if(cptr != NULL){
+			n = ((n*10) + (((s32)*cptr) - (s32)'0'));
+			cptr += 1;
+			if(cptr != NULL){
+				ResultIsDigit = isdigit(((s32)*cptr));
+			}
+		}
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    *linep = ((charptr )(cptr));
+    return(n);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine operates just like a printf/sprintf  */
+/* routine. It outputs a set of data under the       */
+/* control of a formatting string. Not all of the    */
+/* standard C format control are supported. The ones */
+/* provided are primarily those needed for embedded  */
+/* systems work. Primarily the floating point        */
+/* routines are omitted. Other formats could be      */
+/* added easily by following the examples shown for  */
+/* the supported formats.                            */
+/*                                                   */
+
+/* void esp_printf( const func_ptr f_ptr,
+   const charptr ctrl1, ...) */
+void xil_printf( const char8 *ctrl1, ...)
+{
+	s32 Check;
+    s32 long_flag;
+    s32 dot_flag;
+
+    params_t par;
+
+    char8 ch;
+    va_list argp;
+    char8 *ctrl = (char8 *)ctrl1;
+
+    va_start( argp, ctrl1);
+
+    while ((ctrl != NULL) && (*ctrl != (char8)0)) {
+
+        /* move format string chars to buffer until a  */
+        /* format control is found.                    */
+        if (*ctrl != '%') {
+            outbyte(*ctrl);
+			ctrl += 1;
+            continue;
+        }
+
+        /* initialize all the flags for this format.   */
+        dot_flag = 0;
+		long_flag = 0;
+        par.unsigned_flag = 0;
+		par.left_flag = 0;
+		par.do_padding = 0;
+        par.pad_character = ' ';
+        par.num2=32767;
+		par.num1=0;
+		par.len=0;
+
+ try_next:
+		if(ctrl != NULL) {
+			ctrl += 1;
+		}
+		if(ctrl != NULL) {
+			ch = *ctrl;
+		}
+		else {
+			ch = *ctrl;
+		}
+
+        if (isdigit((s32)ch) != 0) {
+            if (dot_flag != 0) {
+                par.num2 = getnum(&ctrl);
+			}
+            else {
+                if (ch == '0') {
+                    par.pad_character = '0';
+				}
+				if(ctrl != NULL) {
+			par.num1 = getnum(&ctrl);
+				}
+                par.do_padding = 1;
+            }
+            if(ctrl != NULL) {
+			ctrl -= 1;
+			}
+            goto try_next;
+        }
+
+        switch (tolower((s32)ch)) {
+            case '%':
+                outbyte( '%');
+                Check = 1;
+                break;
+
+            case '-':
+                par.left_flag = 1;
+                Check = 0;
+                break;
+
+            case '.':
+                dot_flag = 1;
+                Check = 0;
+                break;
+
+            case 'l':
+                long_flag = 1;
+                Check = 0;
+                break;
+
+            case 'u':
+                par.unsigned_flag = 1;
+                /* fall through */
+            case 'i':
+            case 'd':
+                if (long_flag != 0){
+                    outnum1((s64)va_arg(argp, s64), 10L, &par);
+                }
+                else {
+                    outnum( va_arg(argp, s32), 10L, &par);
+                }
+				Check = 1;
+                break;
+            case 'p':
+                par.unsigned_flag = 1;
+                outnum1((s64)va_arg(argp, s64), 16L, &par);
+                Check = 1;
+                break;
+            case 'x':
+                par.unsigned_flag = 1;
+                if (long_flag != 0) {
+                    outnum1((s64)va_arg(argp, s64), 16L, &par);
+                }
+                else {
+                    outnum((s32)va_arg(argp, s32), 16L, &par);
+                }
+                Check = 1;
+                break;
+
+            case 's':
+                outs( va_arg( argp, char *), &par);
+                Check = 1;
+                break;
+
+            case 'c':
+                outbyte( va_arg( argp, s32));
+                Check = 1;
+                break;
+
+            case '\\':
+                switch (*ctrl) {
+                    case 'a':
+                        outbyte( ((char8)0x07));
+                        break;
+                    case 'h':
+                        outbyte( ((char8)0x08));
+                        break;
+                    case 'r':
+                        outbyte( ((char8)0x0D));
+                        break;
+                    case 'n':
+                        outbyte( ((char8)0x0D));
+                        outbyte( ((char8)0x0A));
+                        break;
+                    default:
+                        outbyte( *ctrl);
+                        break;
+                }
+                ctrl += 1;
+                Check = 0;
+                break;
+
+            default:
+		Check = 1;
+		break;
+        }
+        if(Check == 1) {
+			if(ctrl != NULL) {
+				ctrl += 1;
+			}
+                continue;
+        }
+        goto try_next;
+    }
+    va_end( argp);
+}
+
+/*---------------------------------------------------*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_printf.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_printf.h
new file mode 100644
index 0000000..77ba280
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_printf.h
@@ -0,0 +1,44 @@
+ #ifndef XIL_PRINTF_H
+ #define XIL_PRINTF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include 
+#include 
+#include 
+#include "xil_types.h"
+#include "xparameters.h"
+
+/*----------------------------------------------------*/
+/* Use the following parameter passing structure to   */
+/* make xil_printf re-entrant.                        */
+/*----------------------------------------------------*/
+
+struct params_s;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+typedef char8* charptr;
+typedef s32 (*func_ptr)(int c);
+
+/*                                                   */
+
+void xil_printf( const char8 *ctrl1, ...);
+void print( const char8 *ptr);
+extern void outbyte (char8 c);
+extern char8 inbyte(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_smc.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_smc.c
new file mode 100644
index 0000000..f6d368f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_smc.c
@@ -0,0 +1,110 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xil_smc.c
+*
+* This file contains function for initiating SMC call
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 6.2 	pkp  	 02/16/17 First release
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+#include "xil_types.h"
+#include "xil_smc.h"
+
+#if EL1_NONSECURE
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Function Prototypes *****************************/
+
+/************************** Variable Definitions *****************************/
+XSmc_OutVar SmcResult;
+
+/*****************************************************************************/
+/**
+* @brief	Initiate SMC call to EL3 secure monitor to request for secure
+*			service. This function is only applicable for EL1 Non-secure bsp.
+*
+* @param	FunctionID is the SMC identifier for a particular secure service
+*			request
+* @param	Arg1 to Arg6 is the arguements passed to EL3 secure monitor
+* @param	Arg7 is Hypervisor Client ID register
+*
+* @return	Result from secure payload service
+* @note		FunctionID and Arg1-Arg7 should be as per SMC calling convention
+*
+******************************************************************************/
+XSmc_OutVar Xil_Smc(u64 FunctionID, u64 Arg1, u64 Arg2, u64 Arg3, u64 Arg4,
+					u64 Arg5, u64 Arg6, u64 Arg7){
+
+	/*
+	 * Since registers x8 to x17 are not saved by secure monitor during SMC
+	 * it must be preserved.
+	 */
+	XSave_X8toX17();
+
+	/* Moving to EL3 secure monitor with smc call. */
+
+	__asm__ __volatile__ ("smc #0x0");
+
+	/*
+	 * The result of the secure services are stored in x0 - x3. They are
+	 * moved to SmcResult to return the result.
+	 */
+	__asm__ __volatile__("mov	x8, x0");
+	__asm__ __volatile__("mov	x9, x1");
+	__asm__ __volatile__("mov	x10, x2");
+	__asm__ __volatile__("mov	x11, x3");
+
+	__asm__ __volatile__("mov	%0, x8" : "=r" (SmcResult.Arg0));
+	__asm__ __volatile__("mov	%0, x9" : "=r" (SmcResult.Arg1));
+	__asm__ __volatile__("mov	%0, x10" : "=r" (SmcResult.Arg2));
+	__asm__ __volatile__("mov	%0, x11" : "=r" (SmcResult.Arg3));
+
+	XRestore_X8toX17();
+
+	return SmcResult;
+}
+#endif
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_smc.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_smc.h
new file mode 100644
index 0000000..454acf3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_smc.h
@@ -0,0 +1,110 @@
+/******************************************************************************
+*
+* Copyright (C) 2017 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_smc.h
+*
+* @addtogroup a53_64_smc_api Cortex A53 64bit EL1 Non-secure SMC Call
+*
+* Cortex A53 64bit EL1 Non-secure SMC Call provides a C wrapper for calling
+* SMC from EL1 Non-secure application to request Secure monitor for secure
+* services. SMC calling conventions should be followed.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 6.2 	pkp  	 02/16/17 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_SMC_H /* prevent circular inclusions */
+#define XIL_SMC_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "bspconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#if EL1_NONSECURE
+/************************** Constant Definitions ****************************/
+#define SMC_FID_START	0xF2000000
+#define SMC_FID_END	0xFF00FFFF
+
+#define XILSP_INIT_DONE 0xF2000000
+#define	ARITH_SMC_FID	0xF2000001
+
+#define MMIO_WRITE_SMC_FID	0xC2000013
+#define MMIO_READ_SMC_FID	0xC2000014
+/**************************** Type Definitions ******************************/
+typedef struct {
+	u64 Arg0;
+	u64 Arg1;
+	u64 Arg2;
+	u64 Arg3;
+} XSmc_OutVar;
+/***************** Macros (Inline Functions) Definitions ********************/
+
+#define XSave_X8toX17() \
+	__asm__ __volatile__ ("stp X8, X9, [sp,#-0x10]!");\
+	__asm__ __volatile__ ("stp X10, X11, [sp,#-0x10]!");\
+	__asm__ __volatile__ ("stp X12, X13, [sp,#-0x10]!");\
+	__asm__ __volatile__ ("stp X14, X15, [sp,#-0x10]!");\
+	__asm__ __volatile__ ("stp X16, X17, [sp,#-0x10]!");
+
+#define XRestore_X8toX17() \
+	__asm__ __volatile__ ("ldp X16, X17, [sp], #0x10");\
+	__asm__ __volatile__ ("ldp X14, X15, [sp], #0x10");\
+	__asm__ __volatile__ ("ldp X12, X13, [sp], #0x10");\
+	__asm__ __volatile__ ("ldp X10, X11, [sp], #0x10");\
+	__asm__ __volatile__ ("ldp X8, X9, [sp], #0x10");
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+XSmc_OutVar Xil_Smc(u64 FunctionID, u64 Arg1, u64 Arg2, u64 Arg3, u64 Arg4,
+					u64 Arg5, u64 Arg6, u64 Arg7);
+#endif
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_SMC_H */
+/**
+* @} End of "addtogroup a53_64_smc_api".
+*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xparameters_ps.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xparameters_ps.h
new file mode 100644
index 0000000..fde81f4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xparameters_ps.h
@@ -0,0 +1,358 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xparameters_ps.h
+*
+* This file contains the address definitions for the hard peripherals
+* attached to the ARM Cortex A53 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef _XPARAMETERS_PS_H_
+#define _XPARAMETERS_PS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock
+ */
+
+/* Canonical definitions for DDR MEMORY */
+#define XPAR_DDR_MEM_BASEADDR		0x00000000U
+#define XPAR_DDR_MEM_HIGHADDR		0x3FFFFFFFU
+
+/* Canonical definitions for Interrupts  */
+#define XPAR_XUARTPS_0_INTR		XPS_UART0_INT_ID
+#define XPAR_XUARTPS_1_INTR		XPS_UART1_INT_ID
+#define XPAR_XIICPS_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_XIICPS_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_XSPIPS_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_XSPIPS_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_XCANPS_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_XCANPS_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_XGPIOPS_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_XEMACPS_0_INTR		XPS_GEM0_INT_ID
+#define XPAR_XEMACPS_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_XEMACPS_1_INTR		XPS_GEM1_INT_ID
+#define XPAR_XEMACPS_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_XEMACPS_2_INTR		XPS_GEM2_INT_ID
+#define XPAR_XEMACPS_2_WAKE_INTR	XPS_GEM2_WAKE_INT_ID
+#define XPAR_XEMACPS_3_INTR		XPS_GEM3_INT_ID
+#define XPAR_XEMACPS_3_WAKE_INTR	XPS_GEM3_WAKE_INT_ID
+#define XPAR_XSDIOPS_0_INTR		XPS_SDIO0_INT_ID
+#define XPAR_XQSPIPS_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_XSDIOPS_1_INTR		XPS_SDIO1_INT_ID
+#define XPAR_XWDTPS_0_INTR		XPS_WDT_INT_ID
+#define XPAR_XDCFG_0_INTR		XPS_DVC_INT_ID
+#define XPAR_SCUTIMER_INTR		XPS_SCU_TMR_INT_ID
+#define XPAR_SCUWDT_INTR		XPS_SCU_WDT_INT_ID
+#define XPAR_XTTCPS_0_INTR		XPS_TTC0_0_INT_ID
+#define XPAR_XTTCPS_1_INTR		XPS_TTC0_1_INT_ID
+#define XPAR_XTTCPS_2_INTR		XPS_TTC0_2_INT_ID
+#define XPAR_XTTCPS_3_INTR		XPS_TTC1_0_INT_ID
+#define XPAR_XTTCPS_4_INTR		XPS_TTC1_1_INT_ID
+#define XPAR_XTTCPS_5_INTR		XPS_TTC1_2_INT_ID
+#define XPAR_XTTCPS_6_INTR		XPS_TTC2_0_INT_ID
+#define XPAR_XTTCPS_7_INTR		XPS_TTC2_1_INT_ID
+#define XPAR_XTTCPS_8_INTR		XPS_TTC2_2_INT_ID
+#define XPAR_XTTCPS_9_INTR		XPS_TTC3_0_INT_ID
+#define XPAR_XTTCPS_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_XTTCPS_11_INTR		XPS_TTC3_2_INT_ID
+#define XPAR_XDMAPS_0_FAULT_INTR	XPS_DMA0_ABORT_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_0	XPS_DMA0_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_1	XPS_DMA1_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_2	XPS_DMA2_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_3	XPS_DMA3_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_4	XPS_DMA4_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_5	XPS_DMA5_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_6	XPS_DMA6_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_7	XPS_DMA7_INT_ID
+#define XPAR_XNANDPS8_0_INTR        	XPS_NAND_INT_ID
+#define XPAR_XADMAPS_0_INTR 		XPS_ADMA_CH0_INT_ID
+#define XPAR_XADMAPS_1_INTR 		XPS_ADMA_CH1_INT_ID
+#define XPAR_XADMAPS_2_INTR		XPS_ADMA_CH2_INT_ID
+#define XPAR_XADMAPS_3_INTR 		XPS_ADMA_CH3_INT_ID
+#define XPAR_XADMAPS_4_INTR		XPS_ADMA_CH4_INT_ID
+#define XPAR_XADMAPS_5_INTR 		XPS_ADMA_CH5_INT_ID
+#define XPAR_XADMAPS_6_INTR 		XPS_ADMA_CH6_INT_ID
+#define XPAR_XADMAPS_7_INTR 		XPS_ADMA_CH7_INT_ID
+#define XPAR_XCSUDMA_INTR 		XPS_CSU_DMA_INT_ID
+#define XPAR_XMPU_LPD_INTR 		XPS_XMPU_LPD_INT_ID
+#define XPAR_XZDMAPS_0_INTR		XPS_ZDMA_CH0_INT_ID
+#define XPAR_XZDMAPS_1_INTR		XPS_ZDMA_CH1_INT_ID
+#define XPAR_XZDMAPS_2_INTR 		XPS_ZDMA_CH2_INT_ID
+#define XPAR_XZDMAPS_3_INTR 		XPS_ZDMA_CH3_INT_ID
+#define XPAR_XZDMAPS_4_INTR		XPS_ZDMA_CH4_INT_ID
+#define XPAR_XZDMAPS_5_INTR 		XPS_ZDMA_CH5_INT_ID
+#define XPAR_XZDMAPS_6_INTR 		XPS_ZDMA_CH6_INT_ID
+#define XPAR_XZDMAPS_7_INTR 		XPS_ZDMA_CH7_INT_ID
+#define XPAR_XMPU_FPD_INTR 		XPS_XMPU_FPD_INT_ID
+#define XPAR_XCCI_FPD_INTR 		XPS_FPD_CCI_INT_ID
+#define XPAR_XSMMU_FPD_INTR 		XPS_FPD_SMMU_INT_ID
+#define XPAR_XUSBPS_0_INTR		XPS_USB3_0_ENDPT_INT_ID
+#define XPAR_XUSBPS_1_INTR		XPS_USB3_1_ENDPT_INT_ID
+#define	XPAR_XRTCPSU_ALARM_INTR 	XPS_RTC_ALARM_INT_ID
+#define	XPAR_XRTCPSU_SECONDS_INTR	XPS_RTC_SEC_INT_ID
+
+/* Canonical definitions for SCU GIC */
+#define XPAR_SCUGIC_NUM_INSTANCES	1U
+#define XPAR_SCUGIC_SINGLE_DEVICE_ID	0U
+#define XPAR_SCUGIC_CPU_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00001000U)
+#define XPAR_SCUGIC_DIST_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00002000U)
+#define XPAR_SCUGIC_ACK_BEFORE		0U
+
+#define XPAR_CPU_CORTEXA53_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA53_0_CPU_CLK_FREQ_HZ
+
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock. These have been put for backwards compatibilty
+ */
+
+
+#define XPS_SYS_CTRL_BASEADDR	0xFF180000U
+#define XPS_SCU_PERIPH_BASE		0xF9000000U
+
+
+
+/* Shared Peripheral Interrupts (SPI) */
+
+/* FIXME */
+/*#define XPS_FPGA0_INT_ID		100U */
+#define XPS_FPGA1_INT_ID		62U
+#define XPS_FPGA2_INT_ID		63U
+#define XPS_FPGA3_INT_ID		64U
+#define XPS_FPGA4_INT_ID		65U
+#define XPS_FPGA5_INT_ID		66U
+#define XPS_FPGA6_INT_ID		67U
+#define XPS_FPGA7_INT_ID		68U
+#define XPS_DMA4_INT_ID			72U
+#define XPS_DMA5_INT_ID			73U
+#define XPS_DMA6_INT_ID			74U
+#define XPS_DMA7_INT_ID			75U
+#define XPS_FPGA8_INT_ID		84U
+#define XPS_FPGA9_INT_ID		85U
+#define XPS_FPGA10_INT_ID		86U
+#define XPS_FPGA11_INT_ID		87U
+#define XPS_FPGA12_INT_ID		88U
+#define XPS_FPGA13_INT_ID		89U
+#define XPS_FPGA14_INT_ID		90U
+#define XPS_FPGA15_INT_ID		91U
+
+/* Updated Interrupt-IDs */
+#define XPS_OCMINTR_INT_ID		(10U + 32U)
+#define XPS_NAND_INT_ID        		(14U + 32U)
+#define XPS_QSPI_INT_ID			(15U + 32U)
+#define XPS_GPIO_INT_ID			(16U + 32U)
+#define XPS_I2C0_INT_ID			(17U + 32U)
+#define XPS_I2C1_INT_ID			(18U + 32U)
+#define XPS_SPI0_INT_ID			(19U + 32U)
+#define XPS_SPI1_INT_ID			(20U + 32U)
+#define XPS_UART0_INT_ID		(21U + 32U)
+#define XPS_UART1_INT_ID		(22U + 32U)
+#define XPS_CAN0_INT_ID			(23U + 32U)
+#define XPS_CAN1_INT_ID			(24U + 32U)
+#define	XPS_RTC_ALARM_INT_ID 	(26U + 32U)
+#define	XPS_RTC_SEC_INT_ID	 	(27U + 32U)
+#define XPS_WDT_INT_ID			(52U + 32U)
+#define XPS_TTC0_0_INT_ID		(36U + 32U)
+#define XPS_TTC0_1_INT_ID		(37U + 32U)
+#define XPS_TTC0_2_INT_ID 		(38U + 32U)
+#define XPS_TTC1_0_INT_ID		(39U + 32U)
+#define XPS_TTC1_1_INT_ID		(40U + 32U)
+#define XPS_TTC1_2_INT_ID		(41U + 32U)
+#define XPS_TTC2_0_INT_ID		(42U + 32U)
+#define XPS_TTC2_1_INT_ID		(43U + 32U)
+#define XPS_TTC2_2_INT_ID		(44U + 32U)
+#define XPS_TTC3_0_INT_ID		(45U + 32U)
+#define XPS_TTC3_1_INT_ID		(46U + 32U)
+#define XPS_TTC3_2_INT_ID		(47U + 32U)
+#define XPS_SDIO0_INT_ID		(48U + 32U)
+#define XPS_SDIO1_INT_ID		(49U + 32U)
+#define XPS_GEM0_INT_ID			(57U + 32U)
+#define XPS_GEM0_WAKE_INT_ID		(58U + 32U)
+#define XPS_GEM1_INT_ID			(59U + 32U)
+#define XPS_GEM1_WAKE_INT_ID		(60U + 32U)
+#define XPS_GEM2_INT_ID			(61U + 32U)
+#define XPS_GEM2_WAKE_INT_ID		(62U + 32U)
+#define XPS_GEM3_INT_ID			(63U + 32U)
+#define XPS_GEM3_WAKE_INT_ID		(64U + 32U)
+#define XPS_USB3_0_ENDPT_INT_ID		(65U + 32U)
+#define XPS_USB3_1_ENDPT_INT_ID		(70U + 32U)
+#define XPS_ADMA_CH0_INT_ID		(77U + 32U)
+#define XPS_ADMA_CH1_INT_ID		(78U + 32U)
+#define XPS_ADMA_CH2_INT_ID		(79U + 32U)
+#define XPS_ADMA_CH3_INT_ID		(80U + 32U)
+#define XPS_ADMA_CH4_INT_ID		(81U + 32U)
+#define XPS_ADMA_CH5_INT_ID		(82U + 32U)
+#define XPS_ADMA_CH6_INT_ID		(83U + 32U)
+#define XPS_ADMA_CH7_INT_ID		(84U + 32U)
+#define XPS_CSU_DMA_INT_ID		(86U + 32U)
+#define XPS_XMPU_LPD_INT_ID		(88U + 32U)
+#define XPS_ZDMA_CH0_INT_ID		(124U + 32U)
+#define XPS_ZDMA_CH1_INT_ID		(125U + 32U)
+#define XPS_ZDMA_CH2_INT_ID		(126U + 32U)
+#define XPS_ZDMA_CH3_INT_ID		(127U + 32U)
+#define XPS_ZDMA_CH4_INT_ID		(128U + 32U)
+#define XPS_ZDMA_CH5_INT_ID		(129U + 32U)
+#define XPS_ZDMA_CH6_INT_ID		(130U + 32U)
+#define XPS_ZDMA_CH7_INT_ID		(131U + 32U)
+#define XPS_XMPU_FPD_INT_ID		(134U + 32U)
+#define XPS_FPD_CCI_INT_ID		(154U + 32U)
+#define XPS_FPD_SMMU_INT_ID		(155U + 32U)
+
+/* Private Peripheral Interrupts (PPI) */
+/*#define XPS_GLOBAL_TMR_INT_ID		27	 SCU Global Timer interrupt */
+/*#define XPS_FIQ_INT_ID			28	 FIQ from FPGA fabric */
+/*#define XPS_SCU_TMR_INT_ID		29	 SCU Private Timer interrupt */
+/*#define XPS_SCU_WDT_INT_ID		30	 SCU Private WDT interrupt */
+/*#define XPS_IRQ_INT_ID			31	 IRQ from FPGA fabric */
+
+/* REDEFINES for TEST APP */
+/* Definitions for UART */
+#define XPAR_PS7_UART_0_INTR		XPS_UART0_INT_ID
+#define XPAR_PS7_UART_1_INTR		XPS_UART1_INT_ID
+#define XPAR_PS7_USB_0_INTR		XPS_USB0_INT_ID
+#define XPAR_PS7_USB_1_INTR		XPS_USB1_INT_ID
+#define XPAR_PS7_I2C_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_PS7_I2C_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_PS7_SPI_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_PS7_SPI_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_PS7_CAN_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_PS7_CAN_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_PS7_GPIO_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_PS7_ETHERNET_0_INTR	XPS_GEM0_INT_ID
+#define XPAR_PS7_ETHERNET_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_1_INTR	XPS_GEM1_INT_ID
+#define XPAR_PS7_ETHERNET_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_2_INTR	XPS_GEM2_INT_ID
+#define XPAR_PS7_ETHERNET_2_WAKE_INTR	XPS_GEM2_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_3_INTR	XPS_GEM3_INT_ID
+#define XPAR_PS7_ETHERNET_3_WAKE_INTR	XPS_GEM3_WAKE_INT_ID
+
+#define XPAR_PS7_QSPI_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_PS7_WDT_0_INTR		XPS_WDT_INT_ID
+#define XPAR_PS7_SCUWDT_0_INTR		XPS_SCU_WDT_INT_ID
+#define XPAR_PS7_SCUTIMER_0_INTR	XPS_SCU_TMR_INT_ID
+#define XPAR_PS7_XADC_0_INTR		XPS_SYSMON_INT_ID
+
+#define XPAR_PSU_UART_0_INTR        XPS_UART0_INT_ID
+#define XPAR_PSU_UART_1_INTR        XPS_UART1_INT_ID
+#define XPAR_PSU_USB_0_INTR     XPS_USB0_INT_ID
+#define XPAR_PSU_USB_1_INTR     XPS_USB1_INT_ID
+#define XPAR_PSU_I2C_0_INTR     XPS_I2C0_INT_ID
+#define XPAR_PSU_I2C_1_INTR     XPS_I2C1_INT_ID
+#define XPAR_PSU_SPI_0_INTR     XPS_SPI0_INT_ID
+#define XPAR_PSU_SPI_1_INTR     XPS_SPI1_INT_ID
+#define XPAR_PSU_CAN_0_INTR     XPS_CAN0_INT_ID
+#define XPAR_PSU_CAN_1_INTR     XPS_CAN1_INT_ID
+#define XPAR_PSU_GPIO_0_INTR        XPS_GPIO_INT_ID
+#define XPAR_PSU_ETHERNET_0_INTR    XPS_GEM0_INT_ID
+#define XPAR_PSU_ETHERNET_0_WAKE_INTR   XPS_GEM0_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_1_INTR    XPS_GEM1_INT_ID
+#define XPAR_PSU_ETHERNET_1_WAKE_INTR   XPS_GEM1_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_2_INTR    XPS_GEM2_INT_ID
+#define XPAR_PSU_ETHERNET_2_WAKE_INTR   XPS_GEM2_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_3_INTR    XPS_GEM3_INT_ID
+#define XPAR_PSU_ETHERNET_3_WAKE_INTR   XPS_GEM3_WAKE_INT_ID
+#define XPAR_PSU_QSPI_0_INTR        XPS_QSPI_INT_ID
+#define XPAR_PSU_WDT_0_INTR     XPS_WDT_INT_ID
+#define XPAR_PSU_SCUWDT_0_INTR      XPS_SCU_WDT_INT_ID
+#define XPAR_PSU_SCUTIMER_0_INTR    XPS_SCU_TMR_INT_ID
+#define XPAR_PSU_XADC_0_INTR        XPS_SYSMON_INT_ID
+#define XPAR_PSU_TTC_0_INTR         XPS_TTC0_0_INT_ID
+#define XPAR_PSU_TTC_1_INTR         XPS_TTC0_1_INT_ID
+#define XPAR_PSU_TTC_2_INTR         XPS_TTC0_2_INT_ID
+#define XPAR_PSU_TTC_3_INTR         XPS_TTC1_0_INT_ID
+#define XPAR_PSU_TTC_4_INTR         XPS_TTC1_1_INT_ID
+#define XPAR_PSU_TTC_5_INTR         XPS_TTC1_2_INT_ID
+#define XPAR_PSU_TTC_6_INTR			XPS_TTC2_0_INT_ID
+#define XPAR_PSU_TTC_7_INTR			XPS_TTC2_1_INT_ID
+#define XPAR_PSU_TTC_8_INTR			XPS_TTC2_2_INT_ID
+#define XPAR_PSU_TTC_9_INTR			XPS_TTC3_0_INT_ID
+#define XPAR_PSU_TTC_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_PSU_TTC_11_INTR		XPS_TTC3_2_INT_ID
+
+#define XPAR_XADCPS_NUM_INSTANCES 1U
+#define XPAR_XADCPS_0_DEVICE_ID   0U
+#define XPAR_XADCPS_0_BASEADDR	  (0xF8007000U)
+#define XPAR_XADCPS_INT_ID		XPS_SYSMON_INT_ID
+
+/* For backwards compatibilty */
+#define XPAR_XUARTPS_0_CLOCK_HZ		XPAR_XUARTPS_0_UART_CLK_FREQ_HZ
+#define XPAR_XUARTPS_1_CLOCK_HZ		XPAR_XUARTPS_1_UART_CLK_FREQ_HZ
+#define XPAR_XTTCPS_0_CLOCK_HZ		XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_1_CLOCK_HZ		XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_2_CLOCK_HZ		XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_3_CLOCK_HZ		XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_4_CLOCK_HZ		XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_5_CLOCK_HZ		XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ
+#define XPAR_XIICPS_0_CLOCK_HZ		XPAR_XIICPS_0_I2C_CLK_FREQ_HZ
+#define XPAR_XIICPS_1_CLOCK_HZ		XPAR_XIICPS_1_I2C_CLK_FREQ_HZ
+
+#define XPAR_XQSPIPS_0_CLOCK_HZ		XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ
+
+#ifdef XPAR_CPU_CORTEXA53_0_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXA53_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA53_0_CPU_CLK_FREQ_HZ
+#endif
+
+#ifdef XPAR_CPU_CORTEXA53_1_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXA53_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA53_1_CPU_CLK_FREQ_HZ
+#endif
+
+#define XPAR_SCUTIMER_DEVICE_ID		0U
+#define XPAR_SCUWDT_DEVICE_ID		0U
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xpseudo_asm.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xpseudo_asm.h
new file mode 100644
index 0000000..f0fd092
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xpseudo_asm.h
@@ -0,0 +1,53 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm.h
+*
+* This header file contains macros for using inline assembler code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+******************************************************************************/
+#ifndef XPSEUDO_ASM_H
+#define XPSEUDO_ASM_H
+#include "xreg_cortexa53.h"
+#include "xpseudo_asm_gcc.h"
+
+#endif /* XPSEUDO_ASM_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xreg_cortexa53.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xreg_cortexa53.h
new file mode 100644
index 0000000..62ef6e8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xreg_cortexa53.h
@@ -0,0 +1,182 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xreg_cortexa53.h
+*
+* This header file contains definitions for using inline assembler code. It is
+* written specifically for the GNU compiler.
+*
+* All of the ARM Cortex A53 GPRs, SPRs, and Debug Registers are defined along
+* with the positions of the bits within the registers.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+******************************************************************************/
+#ifndef XREG_CORTEXA53_H
+#define XREG_CORTEXA53_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+
+/* GPRs */
+#define XREG_GPR0				x0
+#define XREG_GPR1				x1
+#define XREG_GPR2				x2
+#define XREG_GPR3				x3
+#define XREG_GPR4				x4
+#define XREG_GPR5				x5
+#define XREG_GPR6				x6
+#define XREG_GPR7				x7
+#define XREG_GPR8				x8
+#define XREG_GPR9				x9
+#define XREG_GPR10				x10
+#define XREG_GPR11				x11
+#define XREG_GPR12				x12
+#define XREG_GPR13				x13
+#define XREG_GPR14				x14
+#define XREG_GPR15				x15
+#define XREG_GPR16				x16
+#define XREG_GPR17				x17
+#define XREG_GPR18				x18
+#define XREG_GPR19				x19
+#define XREG_GPR20				x20
+#define XREG_GPR21				x21
+#define XREG_GPR22				x22
+#define XREG_GPR23				x23
+#define XREG_GPR24				x24
+#define XREG_GPR25				x25
+#define XREG_GPR26				x26
+#define XREG_GPR27				x27
+#define XREG_GPR28				x28
+#define XREG_GPR29				x29
+#define XREG_GPR30				x30
+#define XREG_CPSR				cpsr
+
+/* Current Processor Status Register (CPSR) Bits */
+#define XREG_CPSR_MODE_BITS			0x1F
+#define XREG_CPSR_EL3h_MODE			0xD
+#define XREG_CPSR_EL3t_MODE			0xC
+#define XREG_CPSR_EL2h_MODE			0x9
+#define XREG_CPSR_EL2t_MODE			0x8
+#define XREG_CPSR_EL1h_MODE			0x5
+#define XREG_CPSR_EL1t_MODE			0x4
+#define XREG_CPSR_EL0t_MODE			0x0
+
+#define XREG_CPSR_IRQ_ENABLE		0x80
+#define XREG_CPSR_FIQ_ENABLE		0x40
+
+#define XREG_CPSR_N_BIT				0x80000000U
+#define XREG_CPSR_Z_BIT				0x40000000U
+#define XREG_CPSR_C_BIT				0x20000000U
+#define XREG_CPSR_V_BIT				0x10000000U
+
+/* FPSID bits */
+#define XREG_FPSID_IMPLEMENTER_BIT	(24U)
+#define XREG_FPSID_IMPLEMENTER_MASK	(0x000000FFU << FPSID_IMPLEMENTER_BIT)
+#define XREG_FPSID_SOFTWARE		(0X00000001U<<23U)
+#define XREG_FPSID_ARCH_BIT		(16U)
+#define XREG_FPSID_ARCH_MASK		(0x0000000FU  << FPSID_ARCH_BIT)
+#define XREG_FPSID_PART_BIT		(8U)
+#define XREG_FPSID_PART_MASK		(0x000000FFU << FPSID_PART_BIT)
+#define XREG_FPSID_VARIANT_BIT		(4U)
+#define XREG_FPSID_VARIANT_MASK		(0x0000000FU  << FPSID_VARIANT_BIT)
+#define XREG_FPSID_REV_BIT		(0U)
+#define XREG_FPSID_REV_MASK		(0x0000000FU  << FPSID_REV_BIT)
+
+/* FPSCR bits */
+#define XREG_FPSCR_N_BIT		(0X00000001U << 31U)
+#define XREG_FPSCR_Z_BIT		(0X00000001U << 30U)
+#define XREG_FPSCR_C_BIT		(0X00000001U << 29U)
+#define XREG_FPSCR_V_BIT		(0X00000001U << 28U)
+#define XREG_FPSCR_QC			(0X00000001U << 27U)
+#define XREG_FPSCR_AHP			(0X00000001U << 26U)
+#define XREG_FPSCR_DEFAULT_NAN		(0X00000001U << 25U)
+#define XREG_FPSCR_FLUSHTOZERO		(0X00000001U << 24U)
+#define XREG_FPSCR_ROUND_NEAREST	(0X00000000U << 22U)
+#define XREG_FPSCR_ROUND_PLUSINF	(0X00000001U << 22U)
+#define XREG_FPSCR_ROUND_MINUSINF	(0X00000002U << 22U)
+#define XREG_FPSCR_ROUND_TOZERO		(0X00000003U << 22U)
+#define XREG_FPSCR_RMODE_BIT		(22U)
+#define XREG_FPSCR_RMODE_MASK		(0X00000003U << FPSCR_RMODE_BIT)
+#define XREG_FPSCR_STRIDE_BIT		(20U)
+#define XREG_FPSCR_STRIDE_MASK		(0X00000003U << FPSCR_STRIDE_BIT)
+#define XREG_FPSCR_LENGTH_BIT		(16U)
+#define XREG_FPSCR_LENGTH_MASK		(0X00000007U << FPSCR_LENGTH_BIT)
+#define XREG_FPSCR_IDC			(0X00000001U << 7U)
+#define XREG_FPSCR_IXC			(0X00000001U << 4U)
+#define XREG_FPSCR_UFC			(0X00000001U << 3U)
+#define XREG_FPSCR_OFC			(0X00000001U << 2U)
+#define XREG_FPSCR_DZC			(0X00000001U << 1U)
+#define XREG_FPSCR_IOC			(0X00000001U << 0U)
+
+/* MVFR0 bits */
+#define XREG_MVFR0_RMODE_BIT		(28U)
+#define XREG_MVFR0_RMODE_MASK		(0x0000000FU << XREG_MVFR0_RMODE_BIT)
+#define XREG_MVFR0_SHORT_VEC_BIT	(24U)
+#define XREG_MVFR0_SHORT_VEC_MASK	(0x0000000FU << XREG_MVFR0_SHORT_VEC_BIT)
+#define XREG_MVFR0_SQRT_BIT		(20U)
+#define XREG_MVFR0_SQRT_MASK		(0x0000000FU << XREG_MVFR0_SQRT_BIT)
+#define XREG_MVFR0_DIVIDE_BIT		(16U)
+#define XREG_MVFR0_DIVIDE_MASK		(0x0000000FU << XREG_MVFR0_DIVIDE_BIT)
+#define XREG_MVFR0_EXEC_TRAP_BIT	(0X00000012U)
+#define XREG_MVFR0_EXEC_TRAP_MASK	(0X0000000FU << XREG_MVFR0_EXEC_TRAP_BIT)
+#define XREG_MVFR0_DP_BIT		(8U)
+#define XREG_MVFR0_DP_MASK		(0x0000000FU << XREG_MVFR0_DP_BIT)
+#define XREG_MVFR0_SP_BIT		(4U)
+#define XREG_MVFR0_SP_MASK		(0x0000000FU << XREG_MVFR0_SP_BIT)
+#define XREG_MVFR0_A_SIMD_BIT		(0U)
+#define XREG_MVFR0_A_SIMD_MASK		(0x0000000FU << MVFR0_A_SIMD_BIT)
+
+/* FPEXC bits */
+#define XREG_FPEXC_EX			(0X00000001U << 31U)
+#define XREG_FPEXC_EN			(0X00000001U << 30U)
+#define XREG_FPEXC_DEX			(0X00000001U << 29U)
+
+
+#define XREG_CONTROL_DCACHE_BIT	(0X00000001U<<2U)
+#define XREG_CONTROL_ICACHE_BIT	(0X00000001U<<12U)
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XREG_CORTEXA53_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xstatus.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xstatus.h
new file mode 100644
index 0000000..9c6e16e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xstatus.h
@@ -0,0 +1,535 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xstatus.h
+*
+* @addtogroup common_status_codes Xilinx® software status codes
+*
+* The xstatus.h file contains the Xilinx® software status codes.These codes are
+* used throughout the Xilinx device drivers.
+*
+* @{
+******************************************************************************/
+
+#ifndef XSTATUS_H		/* prevent circular inclusions */
+#define XSTATUS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/*********************** Common statuses 0 - 500 *****************************/
+/**
+@name Common Status Codes for All Device Drivers
+@{
+*/
+#define XST_SUCCESS                     0L
+#define XST_FAILURE                     1L
+#define XST_DEVICE_NOT_FOUND            2L
+#define XST_DEVICE_BLOCK_NOT_FOUND      3L
+#define XST_INVALID_VERSION             4L
+#define XST_DEVICE_IS_STARTED           5L
+#define XST_DEVICE_IS_STOPPED           6L
+#define XST_FIFO_ERROR                  7L	/*!< An error occurred during an
+						   operation with a FIFO such as
+						   an underrun or overrun, this
+						   error requires the device to
+						   be reset */
+#define XST_RESET_ERROR                 8L	/*!< An error occurred which requires
+						   the device to be reset */
+#define XST_DMA_ERROR                   9L	/*!< A DMA error occurred, this error
+						   typically requires the device
+						   using the DMA to be reset */
+#define XST_NOT_POLLED                  10L	/*!< The device is not configured for
+						   polled mode operation */
+#define XST_FIFO_NO_ROOM                11L	/*!< A FIFO did not have room to put
+						   the specified data into */
+#define XST_BUFFER_TOO_SMALL            12L	/*!< The buffer is not large enough
+						   to hold the expected data */
+#define XST_NO_DATA                     13L	/*!< There was no data available */
+#define XST_REGISTER_ERROR              14L	/*!< A register did not contain the
+						   expected value */
+#define XST_INVALID_PARAM               15L	/*!< An invalid parameter was passed
+						   into the function */
+#define XST_NOT_SGDMA                   16L	/*!< The device is not configured for
+						   scatter-gather DMA operation */
+#define XST_LOOPBACK_ERROR              17L	/*!< A loopback test failed */
+#define XST_NO_CALLBACK                 18L	/*!< A callback has not yet been
+						   registered */
+#define XST_NO_FEATURE                  19L	/*!< Device is not configured with
+						   the requested feature */
+#define XST_NOT_INTERRUPT               20L	/*!< Device is not configured for
+						   interrupt mode operation */
+#define XST_DEVICE_BUSY                 21L	/*!< Device is busy */
+#define XST_ERROR_COUNT_MAX             22L	/*!< The error counters of a device
+						   have maxed out */
+#define XST_IS_STARTED                  23L	/*!< Used when part of device is
+						   already started i.e.
+						   sub channel */
+#define XST_IS_STOPPED                  24L	/*!< Used when part of device is
+						   already stopped i.e.
+						   sub channel */
+#define XST_DATA_LOST                   26L	/*!< Driver defined error */
+#define XST_RECV_ERROR                  27L	/*!< Generic receive error */
+#define XST_SEND_ERROR                  28L	/*!< Generic transmit error */
+#define XST_NOT_ENABLED                 29L	/*!< A requested service is not
+						   available because it has not
+						   been enabled */
+/** @} */
+/***************** Utility Component statuses 401 - 500  *********************/
+/**
+@name Utility Component Status Codes 401 - 500
+@{
+*/
+#define XST_MEMTEST_FAILED              401L	/*!< Memory test failed */
+
+/** @} */
+/***************** Common Components statuses 501 - 1000 *********************/
+/**
+@name Packet Fifo Status Codes 501 - 510
+@{
+*/
+/********************* Packet Fifo statuses 501 - 510 ************************/
+
+#define XST_PFIFO_LACK_OF_DATA          501L	/*!< Not enough data in FIFO   */
+#define XST_PFIFO_NO_ROOM               502L	/*!< Not enough room in FIFO   */
+#define XST_PFIFO_BAD_REG_VALUE         503L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_PFIFO_ERROR                 504L	/*!< Generic packet FIFO error */
+#define XST_PFIFO_DEADLOCK              505L	/*!< Packet FIFO is reporting
+						 * empty and full simultaneously
+						 */
+/** @} */
+/**
+@name DMA Status Codes 511 - 530
+@{
+*/
+/************************** DMA statuses 511 - 530 ***************************/
+
+#define XST_DMA_TRANSFER_ERROR          511L	/*!< Self test, DMA transfer
+						   failed */
+#define XST_DMA_RESET_REGISTER_ERROR    512L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_DMA_SG_LIST_EMPTY           513L	/*!< Scatter gather list contains
+						   no buffer descriptors ready
+						   to be processed */
+#define XST_DMA_SG_IS_STARTED           514L	/*!< Scatter gather not stopped */
+#define XST_DMA_SG_IS_STOPPED           515L	/*!< Scatter gather not running */
+#define XST_DMA_SG_LIST_FULL            517L	/*!< All the buffer desciptors of
+						   the scatter gather list are
+						   being used */
+#define XST_DMA_SG_BD_LOCKED            518L	/*!< The scatter gather buffer
+						   descriptor which is to be
+						   copied over in the scatter
+						   list is locked */
+#define XST_DMA_SG_NOTHING_TO_COMMIT    519L	/*!< No buffer descriptors have been
+						   put into the scatter gather
+						   list to be commited */
+#define XST_DMA_SG_COUNT_EXCEEDED       521L	/*!< The packet count threshold
+						   specified was larger than the
+						   total # of buffer descriptors
+						   in the scatter gather list */
+#define XST_DMA_SG_LIST_EXISTS          522L	/*!< The scatter gather list has
+						   already been created */
+#define XST_DMA_SG_NO_LIST              523L	/*!< No scatter gather list has
+						   been created */
+#define XST_DMA_SG_BD_NOT_COMMITTED     524L	/*!< The buffer descriptor which was
+						   being started was not committed
+						   to the list */
+#define XST_DMA_SG_NO_DATA              525L	/*!< The buffer descriptor to start
+						   has already been used by the
+						   hardware so it can't be reused
+						 */
+#define XST_DMA_SG_LIST_ERROR           526L	/*!< General purpose list access
+						   error */
+#define XST_DMA_BD_ERROR                527L	/*!< General buffer descriptor
+						   error */
+/** @} */
+/**
+@name IPIF Status Codes Codes 531 - 550
+@{
+*/
+/************************** IPIF statuses 531 - 550 ***************************/
+
+#define XST_IPIF_REG_WIDTH_ERROR        531L	/*!< An invalid register width
+						   was passed into the function */
+#define XST_IPIF_RESET_REGISTER_ERROR   532L	/*!< The value of a register at
+						   reset was not valid */
+#define XST_IPIF_DEVICE_STATUS_ERROR    533L	/*!< A write to the device interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_DEVICE_ACK_ERROR       534L	/*!< The device interrupt status
+						   register did not reset when
+						   acked */
+#define XST_IPIF_DEVICE_ENABLE_ERROR    535L	/*!< The device interrupt enable
+						   register was not updated when
+						   other registers changed */
+#define XST_IPIF_IP_STATUS_ERROR        536L	/*!< A write to the IP interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_IP_ACK_ERROR           537L	/*!< The IP interrupt status register
+						   did not reset when acked */
+#define XST_IPIF_IP_ENABLE_ERROR        538L	/*!< IP interrupt enable register was
+						   not updated correctly when other
+						   registers changed */
+#define XST_IPIF_DEVICE_PENDING_ERROR   539L	/*!< The device interrupt pending
+						   register did not indicate the
+						   expected value */
+#define XST_IPIF_DEVICE_ID_ERROR        540L	/*!< The device interrupt ID register
+						   did not indicate the expected
+						   value */
+#define XST_IPIF_ERROR                  541L	/*!< Generic ipif error */
+/** @} */
+
+/****************** Device specific statuses 1001 - 4095 *********************/
+/**
+@name Ethernet Status Codes 1001 - 1050
+@{
+*/
+/********************* Ethernet statuses 1001 - 1050 *************************/
+
+#define XST_EMAC_MEMORY_SIZE_ERROR  1001L	/*!< Memory space is not big enough
+						 * to hold the minimum number of
+						 * buffers or descriptors */
+#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L	/*!< Memory allocation failed */
+#define XST_EMAC_MII_READ_ERROR     1003L	/*!< MII read error */
+#define XST_EMAC_MII_BUSY           1004L	/*!< An MII operation is in progress */
+#define XST_EMAC_OUT_OF_BUFFERS     1005L	/*!< Driver is out of buffers */
+#define XST_EMAC_PARSE_ERROR        1006L	/*!< Invalid driver init string */
+#define XST_EMAC_COLLISION_ERROR    1007L	/*!< Excess deferral or late
+						 * collision on polled send */
+/** @} */
+/**
+@name UART Status Codes 1051 - 1075
+@{
+*/
+/*********************** UART statuses 1051 - 1075 ***************************/
+#define XST_UART
+
+#define XST_UART_INIT_ERROR         1051L
+#define XST_UART_START_ERROR        1052L
+#define XST_UART_CONFIG_ERROR       1053L
+#define XST_UART_TEST_FAIL          1054L
+#define XST_UART_BAUD_ERROR         1055L
+#define XST_UART_BAUD_RANGE         1056L
+
+/** @} */
+/**
+@name IIC Status Codes 1076 - 1100
+@{
+*/
+/************************ IIC statuses 1076 - 1100 ***************************/
+
+#define XST_IIC_SELFTEST_FAILED         1076	/*!< self test failed            */
+#define XST_IIC_BUS_BUSY                1077	/*!< bus found busy              */
+#define XST_IIC_GENERAL_CALL_ADDRESS    1078	/*!< mastersend attempted with   */
+					     /* general call address        */
+#define XST_IIC_STAND_REG_RESET_ERROR   1079	/*!< A non parameterizable reg   */
+					     /* value after reset not valid */
+#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080	/*!< Tx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081	/*!< Rx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_TBA_REG_RESET_ERROR     1082	/*!< 10 bit addr incl in design  */
+					     /* value after reset not valid */
+#define XST_IIC_CR_READBACK_ERROR       1083	/*!< Read of the control register */
+					     /* didn't return value written */
+#define XST_IIC_DTR_READBACK_ERROR      1084	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_DRR_READBACK_ERROR      1085	/*!< Read of the data Receive reg */
+					     /* didn't return value written */
+#define XST_IIC_ADR_READBACK_ERROR      1086	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_TBA_READBACK_ERROR      1087	/*!< Read of the 10 bit addr reg */
+					     /* didn't return written value */
+#define XST_IIC_NOT_SLAVE               1088	/*!< The device isn't a slave    */
+/** @} */
+/**
+@name ATMC Status Codes 1101 - 1125
+@{
+*/
+/*********************** ATMC statuses 1101 - 1125 ***************************/
+
+#define XST_ATMC_ERROR_COUNT_MAX    1101L	/*!< the error counters in the ATM
+						   controller hit the max value
+						   which requires the statistics
+						   to be cleared */
+/** @} */
+/**
+@name Flash Status Codes 1126 - 1150
+@{
+*/
+/*********************** Flash statuses 1126 - 1150 **************************/
+
+#define XST_FLASH_BUSY                1126L	/*!< Flash is erasing or programming
+						 */
+#define XST_FLASH_READY               1127L	/*!< Flash is ready for commands */
+#define XST_FLASH_ERROR               1128L	/*!< Flash had detected an internal
+						   error. Use XFlash_DeviceControl
+						   to retrieve device specific codes
+						 */
+#define XST_FLASH_ERASE_SUSPENDED     1129L	/*!< Flash is in suspended erase state
+						 */
+#define XST_FLASH_WRITE_SUSPENDED     1130L	/*!< Flash is in suspended write state
+						 */
+#define XST_FLASH_PART_NOT_SUPPORTED  1131L	/*!< Flash type not supported by
+						   driver */
+#define XST_FLASH_NOT_SUPPORTED       1132L	/*!< Operation not supported */
+#define XST_FLASH_TOO_MANY_REGIONS    1133L	/*!< Too many erase regions */
+#define XST_FLASH_TIMEOUT_ERROR       1134L	/*!< Programming or erase operation
+						   aborted due to a timeout */
+#define XST_FLASH_ADDRESS_ERROR       1135L	/*!< Accessed flash outside its
+						   addressible range */
+#define XST_FLASH_ALIGNMENT_ERROR     1136L	/*!< Write alignment error */
+#define XST_FLASH_BLOCKING_CALL_ERROR 1137L	/*!< Couldn't return immediately from
+						   write/erase function with
+						   XFL_NON_BLOCKING_WRITE/ERASE
+						   option cleared */
+#define XST_FLASH_CFI_QUERY_ERROR     1138L	/*!< Failed to query the device */
+/** @} */
+/**
+@name SPI Status Codes 1151 - 1175
+@{
+*/
+/*********************** SPI statuses 1151 - 1175 ****************************/
+
+#define XST_SPI_MODE_FAULT          1151	/*!< master was selected as slave */
+#define XST_SPI_TRANSFER_DONE       1152	/*!< data transfer is complete */
+#define XST_SPI_TRANSMIT_UNDERRUN   1153	/*!< slave underruns transmit register */
+#define XST_SPI_RECEIVE_OVERRUN     1154	/*!< device overruns receive register */
+#define XST_SPI_NO_SLAVE            1155	/*!< no slave has been selected yet */
+#define XST_SPI_TOO_MANY_SLAVES     1156	/*!< more than one slave is being
+						 * selected */
+#define XST_SPI_NOT_MASTER          1157	/*!< operation is valid only as master */
+#define XST_SPI_SLAVE_ONLY          1158	/*!< device is configured as slave-only
+						 */
+#define XST_SPI_SLAVE_MODE_FAULT    1159	/*!< slave was selected while disabled */
+#define XST_SPI_SLAVE_MODE          1160	/*!< device has been addressed as slave */
+#define XST_SPI_RECEIVE_NOT_EMPTY   1161	/*!< device received data in slave mode */
+
+#define XST_SPI_COMMAND_ERROR       1162	/*!< unrecognised command - qspi only */
+#define XST_SPI_POLL_DONE           1163        /*!< controller completed polling the
+						   device for status */
+/** @} */
+/**
+@name OPB Arbiter Status Codes 1176 - 1200
+@{
+*/
+/********************** OPB Arbiter statuses 1176 - 1200 *********************/
+
+#define XST_OPBARB_INVALID_PRIORITY  1176	/*!< the priority registers have either
+						 * one master assigned to two or more
+						 * priorities, or one master not
+						 * assigned to any priority
+						 */
+#define XST_OPBARB_NOT_SUSPENDED     1177	/*!< an attempt was made to modify the
+						 * priority levels without first
+						 * suspending the use of priority
+						 * levels
+						 */
+#define XST_OPBARB_PARK_NOT_ENABLED  1178	/*!< bus parking by id was enabled but
+						 * bus parking was not enabled
+						 */
+#define XST_OPBARB_NOT_FIXED_PRIORITY 1179	/*!< the arbiter must be in fixed
+						 * priority mode to allow the
+						 * priorities to be changed
+						 */
+/** @} */
+/**
+@name INTC Status Codes 1201 - 1225
+@{
+*/
+/************************ Intc statuses 1201 - 1225 **************************/
+
+#define XST_INTC_FAIL_SELFTEST      1201	/*!< self test failed */
+#define XST_INTC_CONNECT_ERROR      1202	/*!< interrupt already in use */
+/** @} */
+/**
+@name TmrCtr Status Codes 1226 - 1250
+@{
+*/
+/********************** TmrCtr statuses 1226 - 1250 **************************/
+
+#define XST_TMRCTR_TIMER_FAILED     1226	/*!< self test failed */
+/** @} */
+/**
+@name WdtTb Status Codes 1251 - 1275
+@{
+*/
+/********************** WdtTb statuses 1251 - 1275 ***************************/
+
+#define XST_WDTTB_TIMER_FAILED      1251L
+/** @} */
+/**
+@name PlbArb status Codes 1276 - 1300
+@{
+*/
+/********************** PlbArb statuses 1276 - 1300 **************************/
+
+#define XST_PLBARB_FAIL_SELFTEST    1276L
+/** @} */
+/**
+@name Plb2Opb Status Codes 1301 - 1325
+@{
+*/
+/********************** Plb2Opb statuses 1301 - 1325 *************************/
+
+#define XST_PLB2OPB_FAIL_SELFTEST   1301L
+/** @} */
+/**
+@name Opb2Plb Status 1326 - 1350
+@{
+*/
+/********************** Opb2Plb statuses 1326 - 1350 *************************/
+
+#define XST_OPB2PLB_FAIL_SELFTEST   1326L
+/** @} */
+/**
+@name SysAce Status Codes 1351 - 1360
+@{
+*/
+/********************** SysAce statuses 1351 - 1360 **************************/
+
+#define XST_SYSACE_NO_LOCK          1351L	/*!< No MPU lock has been granted */
+/** @} */
+/**
+@name PCI Bridge Status Codes 1361 - 1375
+@{
+*/
+/********************** PCI Bridge statuses 1361 - 1375 **********************/
+
+#define XST_PCI_INVALID_ADDRESS     1361L
+/** @} */
+/**
+@name FlexRay Constants 1400 - 1409
+@{
+*/
+/********************** FlexRay constants 1400 - 1409 *************************/
+
+#define XST_FR_TX_ERROR			1400
+#define XST_FR_TX_BUSY			1401
+#define XST_FR_BUF_LOCKED		1402
+#define XST_FR_NO_BUF			1403
+/** @} */
+/**
+@name USB constants 1410 - 1420
+@{
+*/
+/****************** USB constants 1410 - 1420  *******************************/
+
+#define XST_USB_ALREADY_CONFIGURED	1410
+#define XST_USB_BUF_ALIGN_ERROR		1411
+#define XST_USB_NO_DESC_AVAILABLE	1412
+#define XST_USB_BUF_TOO_BIG		1413
+#define XST_USB_NO_BUF			1414
+/** @} */
+/**
+@name HWICAP constants 1421 - 1429
+@{
+*/
+/****************** HWICAP constants 1421 - 1429  *****************************/
+
+#define XST_HWICAP_WRITE_DONE		1421
+
+/** @} */
+/**
+@name AXI VDMA constants 1430 - 1440
+@{
+*/
+/****************** AXI VDMA constants 1430 - 1440  *****************************/
+
+#define XST_VDMA_MISMATCH_ERROR		1430
+/** @} */
+/**
+@name NAND Flash Status Codes 1441 - 1459
+@{
+*/
+/*********************** NAND Flash statuses 1441 - 1459  *********************/
+
+#define XST_NAND_BUSY			1441L	/*!< Flash is erasing or
+						 * programming
+						 */
+#define XST_NAND_READY			1442L	/*!< Flash is ready for commands
+						 */
+#define XST_NAND_ERROR			1443L	/*!< Flash had detected an
+						 * internal error.
+						 */
+#define XST_NAND_PART_NOT_SUPPORTED	1444L	/*!< Flash type not supported by
+						 * driver
+						 */
+#define XST_NAND_OPT_NOT_SUPPORTED	1445L	/*!< Operation not supported
+						 */
+#define XST_NAND_TIMEOUT_ERROR		1446L	/*!< Programming or erase
+						 * operation aborted due to a
+						 * timeout
+						 */
+#define XST_NAND_ADDRESS_ERROR		1447L	/*!< Accessed flash outside its
+						 * addressible range
+						 */
+#define XST_NAND_ALIGNMENT_ERROR	1448L	/*!< Write alignment error
+						 */
+#define XST_NAND_PARAM_PAGE_ERROR	1449L	/*!< Failed to read parameter
+						 * page of the device
+						 */
+#define XST_NAND_CACHE_ERROR		1450L	/*!< Flash page buffer error
+						 */
+
+#define XST_NAND_WRITE_PROTECTED	1451L	/*!< Flash is write protected
+						 */
+/** @} */
+
+/**************************** Type Definitions *******************************/
+
+typedef s32 XStatus;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_status_codes".
+*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xtime_l.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xtime_l.c
new file mode 100644
index 0000000..4c0224f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xtime_l.c
@@ -0,0 +1,100 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.c
+*
+* This file contains low level functions to get/set time from the Global Timer
+* register in the ARM Cortex A53 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xtime_l.h"
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+/****************************************************************************
+*
+* Set the time in the Global Timer Counter Register.
+*
+* @param	Value to be written to the Global Timer Counter Register.
+*
+* @return	None.
+*
+* @note		In multiprocessor environment reference time will reset/lost for
+*		all processors, when this function called by any one processor.
+*
+****************************************************************************/
+void XTime_SetTime(XTime Xtime_Global)
+{
+/*As the generic timer of A53 runs constantly time can not be set as desired
+so the API is left unimplemented*/
+}
+
+/****************************************************************************
+*
+* Get the time from the Global Timer Counter Register.
+*
+* @param	Pointer to the location to be updated with the time.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XTime_GetTime(XTime *Xtime_Global)
+{
+	*Xtime_Global = mfcp(CNTPCT_EL0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xtime_l.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xtime_l.h
new file mode 100644
index 0000000..c12b561
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xtime_l.h
@@ -0,0 +1,88 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.h
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.00 	pkp	   05/29/14 First release
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+
+#ifndef XTIME_H /* prevent circular inclusions */
+#define XTIME_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xparameters.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+typedef u64 XTime;
+
+/************************** Constant Definitions *****************************/
+
+/* Global Timer is always clocked at half of the CPU frequency */
+#define COUNTS_PER_SECOND          0x007A1200U
+
+#define XIOU_SCNTRS_BASEADDR      0XFF260000U
+#define XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET    0x00000000U
+#define XIOU_SCNTRS_FREQ_REG_OFFSET    0x00000020U
+#define XIOU_SCNTRS_FREQ		0x02FAF080U	/* 50 MHz */
+#define XIOU_SCNTRS_CNT_CNTRL_REG_EN    0X00000001U
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void XTime_SetTime(XTime Xtime_Global);
+void XTime_GetTime(XTime *Xtime_Global);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XTIME_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/_exit.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/_exit.c
new file mode 100644
index 0000000..f6fe830
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/_exit.c
@@ -0,0 +1,45 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/* _exit - Simple implementation. Does not return.
+*/
+__attribute__((weak)) void _exit (sint32 status)
+{
+  (void)status;
+  while (1)
+  {
+	__asm__("wfi");
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/_open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/_open.c
new file mode 100644
index 0000000..48ba4db
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/_open.c
@@ -0,0 +1,53 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode);
+}
+#endif
+
+/*
+ * _open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode)
+{
+  (void *)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/_sbrk.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/_sbrk.c
new file mode 100644
index 0000000..026e6eb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/_sbrk.c
@@ -0,0 +1,70 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) caddr_t _sbrk ( s32 incr );
+}
+#endif
+
+__attribute__((weak)) caddr_t _sbrk ( s32 incr )
+{
+  static u8 *heap = NULL;
+  u8 *prev_heap;
+  static u8 *HeapEndPtr = (u8 *)&_heap_end;
+  caddr_t Status;
+
+  if (heap == NULL) {
+    heap = (u8 *)&_heap_start;
+  }
+  prev_heap = heap;
+
+  heap += incr;
+
+  if (heap > HeapEndPtr){
+	  Status = (caddr_t) -1;
+  }
+  else if (prev_heap != NULL) {
+	  Status = (caddr_t) ((void *)prev_heap);
+  }
+  else {
+	  Status = (caddr_t) -1;
+  }
+
+  return Status;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/abort.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/abort.c
new file mode 100644
index 0000000..3ce035d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/abort.c
@@ -0,0 +1,42 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+
+/*
+ * abort -- go out via exit...
+ */
+__attribute__((weak)) void abort(void)
+{
+  _exit(1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/close.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/close.c
new file mode 100644
index 0000000..05ce02b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/close.c
@@ -0,0 +1,47 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _close(s32 fd);
+}
+#endif
+
+/*
+ * close -- We don't need to do anything, but pretend we did.
+ */
+
+__attribute__((weak)) s32 _close(s32 fd)
+{
+  (void)fd;
+  return (0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/errno.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/errno.c
new file mode 100644
index 0000000..1838e26
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/errno.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* The errno variable is stored in the reentrancy structure.  This
+   function returns its address for use by the macro errno defined in
+   errno.h.  */
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 * __errno (void);
+}
+#endif
+
+__attribute__((weak)) sint32 *
+__errno (void)
+{
+  return &_REENT->_errno;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/fcntl.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/fcntl.c
new file mode 100644
index 0000000..b784099
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/fcntl.c
@@ -0,0 +1,46 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/*
+ * fcntl -- Manipulate a file descriptor.
+ *          We don't have a filesystem, so we do nothing.
+ */
+__attribute__((weak)) s32 fcntl (s32 fd, s32 cmd, s32 arg)
+{
+  (void)fd;
+  (void)cmd;
+  (void)arg;
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/fstat.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/fstat.c
new file mode 100644
index 0000000..acdeb11
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/fstat.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf);
+}
+#endif
+/*
+ * fstat -- Since we have no file system, we just return an error.
+ */
+__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf)
+{
+  (void)fd;
+  buf->st_mode = S_IFCHR; /* Always pretend to be a tty */
+
+  return (0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/getpid.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/getpid.c
new file mode 100644
index 0000000..df00f45
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/getpid.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "xil_types.h"
+/*
+ * getpid -- only one process, so just return 1.
+ */
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _getpid(void);
+}
+#endif
+
+__attribute__((weak)) s32 getpid(void)
+{
+  return 1;
+}
+
+__attribute__((weak)) s32 _getpid(void)
+{
+  return 1;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/initialise_monitor_handles.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/initialise_monitor_handles.c
new file mode 100644
index 0000000..f7ffbe0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/initialise_monitor_handles.c
@@ -0,0 +1,52 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file initialise_monitor_handles.c
+*
+* Contains blank function to avoid compilation error
+*
+* @note
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+******************************************************************************/
+__attribute__((weak)) void initialise_monitor_handles(){
+
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/isatty.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/isatty.c
new file mode 100644
index 0000000..a9e3561
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/isatty.c
@@ -0,0 +1,56 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 _isatty(sint32 fd);
+}
+#endif
+
+/*
+ * isatty -- returns 1 if connected to a terminal device,
+ *           returns 0 if not. Since we're hooked up to a
+ *           serial port, we'll say yes _AND return a 1.
+ */
+__attribute__((weak)) sint32 isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
+
+__attribute__((weak)) sint32 _isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/kill.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/kill.c
new file mode 100644
index 0000000..bf17caa
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/kill.c
@@ -0,0 +1,60 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _kill(s32 pid, s32 sig);
+}
+#endif
+
+/*
+ * kill -- go out via exit...
+ */
+
+__attribute__((weak)) s32 kill(s32 pid, s32 sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
+
+__attribute__((weak)) s32 _kill(s32 pid, s32 sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/lseek.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/lseek.c
new file mode 100644
index 0000000..8d8c096
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/lseek.c
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence);
+}
+#endif
+/*
+ * lseek --  Since a serial port is non-seekable, we return an error.
+ */
+__attribute__((weak)) off_t lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
+
+__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/open.c
new file mode 100644
index 0000000..bef44ed
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/open.c
@@ -0,0 +1,52 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 open(const char8 *buf, s32 flags, s32 mode);
+}
+#endif
+/*
+ * open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 open(const char8 *buf, s32 flags, s32 mode)
+{
+  (void *)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/read.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/read.c
new file mode 100644
index 0000000..0564b1c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/read.c
@@ -0,0 +1,111 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* read.c -- read bytes from a input device.
+ */
+
+#include "xparameters.h"
+#include "xil_printf.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _read (s32 fd, char8* buf, s32 nbytes);
+}
+#endif
+
+/*
+ * read  -- read bytes from the serial port. Ignore fd, since
+ *          we only have stdin.
+ */
+__attribute__((weak)) s32
+read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    *LocalBuf = inbyte();
+	    if ((*LocalBuf == '\n' )|| (*LocalBuf == '\r')) {
+	        break;
+		}
+	}
+	if(LocalBuf != NULL) {
+	LocalBuf -= i;
+	}
+  }
+
+  return (i + 1);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) s32
+_read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    *LocalBuf = inbyte();
+	    if ((*LocalBuf == '\n' )|| (*LocalBuf == '\r')) {
+	        break;
+		}
+	}
+	if(LocalBuf != NULL) {
+	LocalBuf -= i;
+	}
+  }
+
+  return (i + 1);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/sbrk.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/sbrk.c
new file mode 100644
index 0000000..0d69e2a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/sbrk.c
@@ -0,0 +1,65 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) char8 *sbrk (s32 nbytes);
+}
+#endif
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+extern char8 HeapBase[];
+extern char8 HeapLimit[];
+
+
+
+__attribute__((weak)) char8 *sbrk (s32 nbytes)
+{
+  char8 *base;
+  static char8 *heap_ptr = HeapBase;
+
+  base = heap_ptr;
+  if(heap_ptr != NULL) {
+	heap_ptr += nbytes;
+  }
+
+/*  if (heap_ptr <= ((char8 *)&_heap_end + 1)) */
+  if (heap_ptr <= ((char8 *)&HeapLimit + 1)) {
+    return base;
+  }	else {
+    errno = ENOMEM;
+    return ((char8 *)-1);
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/translation_table.s b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/translation_table.s
new file mode 100644
index 0000000..4b8da3a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/translation_table.s
@@ -0,0 +1,170 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file translation_table.s
+*
+* This file contains the initialization for the MMU table in RAM
+* needed by the Cortex A53 processor
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00  pkp  05/21/14 Initial version
+*
+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+	.globl  MMUTableL0
+	.globl  MMUTableL1
+	.globl  MMUTableL2
+
+	.set reserved,	0x0 					/* Fault*/
+	.set Memory,	0x405 | (3 << 8) | (0x0)		/* normal writeback write allocate inner shared read write */
+	.set Device,	0x409 | (1 << 53)| (1 << 54) |(0x0)	/* strongly ordered read write non executable*/
+	.section .mmu_tbl0,"a"
+
+MMUTableL0:
+
+.set SECT, MMUTableL1
+.8byte	SECT + 0x3
+.set SECT, MMUTableL1+0x1000
+.8byte	SECT + 0x3
+
+	.section .mmu_tbl1,"a"
+
+MMUTableL1:
+
+.set SECT, MMUTableL2			/*1GB DDR*/
+.8byte	SECT + 0x3
+
+.rept	0x3				/*1GB DDR, 1GB PL, 2GB other devices n memory*/
+.set SECT, SECT + 0x1000
+.8byte	SECT + 0x3
+.endr
+
+.set SECT,0x100000000
+.rept	0xC
+.8byte	SECT + reserved
+.set SECT, SECT + 0x40000000	/*12GB Reserved*/
+.endr
+
+.rept	0x10
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*8GB PL, 8GB PCIe*/
+
+.endr
+
+.rept	0x20
+.8byte	SECT + Memory
+
+.set SECT, SECT + 0x40000000	/*32GB DDR*/
+.endr
+
+
+.rept	0xC0
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*192GB PL*/
+.endr
+
+
+.rept	0x100
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*256GB PL/PCIe*/
+.endr
+
+
+.rept	0x200
+.8byte	SECT + Device
+.set SECT, SECT + 0x40000000	/*512GB PL/DDR*/
+.endr
+
+
+.section .mmu_tbl2,"a"
+
+MMUTableL2:
+
+.set SECT, 0
+
+.rept	0x0400			/*2GB DDR */
+.8byte	SECT + Memory
+.set	SECT, SECT+0x200000
+.endr
+
+.rept	0x0200			/*1GB lower PL*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x0100			/*512MB QSPI*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x080			/*256MB lower PCIe*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x040			/*128MB Reserved*/
+.8byte	SECT + reserved
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x8			/*16MB coresight*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x8			/*16MB RPU low latency port*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+
+.rept	0x022			/*68MB Device*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+.rept	0x8			/*8MB FPS*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+
+.rept	0x4			/*16MB LPS*/
+.8byte	SECT + Device
+.set	SECT, SECT+0x200000
+.endr
+
+.8byte	SECT + Device 		/*2MB PMU/CSU */
+.set	SECT, SECT+0x200000
+.8byte  SECT + Memory		/*2MB OCM/TCM*/
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/unlink.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/unlink.c
new file mode 100644
index 0000000..716d10c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/unlink.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 unlink(char8 *path);
+}
+#endif
+/*
+ * unlink -- since we have no file system,
+ *           we just return an error.
+ */
+__attribute__((weak)) s32 unlink(char8 *path)
+{
+  (void *)path;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/write.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/write.c
new file mode 100644
index 0000000..d41a9f4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/write.c
@@ -0,0 +1,111 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* write.c -- write bytes to an output device.
+ */
+
+#include "xparameters.h"
+#include "xil_printf.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _write (s32 fd, char8* buf, s32 nbytes);
+}
+#endif
+
+/*
+ * write -- write bytes to the serial port. Ignore fd, since
+ *          stdout and stderr are the same. Since we have no filesystem,
+ *          open will only return an error.
+ */
+__attribute__((weak)) s32
+write (s32 fd, char8* buf, s32 nbytes)
+
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) s32
+_write (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/xpseudo_asm_gcc.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/xpseudo_asm_gcc.h
new file mode 100644
index 0000000..ddffe98
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/gcc/xpseudo_asm_gcc.h
@@ -0,0 +1,169 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_gcc.h
+*
+* This header file contains macros for using inline assembler code. It is
+* written specifically for the GNU compiler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp		 05/21/14 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XPSEUDO_ASM_GCC_H  /* prevent circular inclusions */
+#define XPSEUDO_ASM_GCC_H  /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/* necessary for pre-processor */
+#define stringify(s)	tostring(s)
+#define tostring(s)	#s
+
+/* pseudo assembler instructions */
+#define mfcpsr()	({u32 rval; \
+			   asm volatile("mrs %0,  DAIF" : "=r" (rval));\
+			  rval;\
+			 })
+
+#define mtcpsr(v) asm ("msr DAIF, %0" : : "r" (v))
+
+#define cpsiei()	//__asm__ __volatile__("cpsie	i\n")
+#define cpsidi()	//__asm__ __volatile__("cpsid	i\n")
+
+#define cpsief()	//__asm__ __volatile__("cpsie	f\n")
+#define cpsidf()	//__asm__ __volatile__("cpsid	f\n")
+
+
+
+#define mtgpr(rn, v)	/*__asm__ __volatile__(\
+			  "mov r" stringify(rn) ", %0 \n"\
+			  : : "r" (v)\
+			)*/
+
+#define mfgpr(rn)	/*({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mov %0,r" stringify(rn) "\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })*/
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+#define isb() asm ("isb sy")
+
+/* Data Synchronization Barrier */
+#define dsb() asm("dsb sy")
+
+/* Data Memory Barrier */
+#define dmb() asm("dmb sy")
+
+
+/* Memory Operations */
+#define ldr(adr)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "ldr	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define ldrb(adr)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "ldrb	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define str(adr, val)	__asm__ __volatile__(\
+			  "str	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+#define strb(adr, val)	__asm__ __volatile__(\
+			  "strb	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+/* Count leading zeroes (clz) */
+#define clz(arg)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "clz	%0,%1"\
+			    : "=r" (rval) : "r" (arg)\
+			  );\
+			  rval;\
+			 })
+#define mtcpdc(reg,val)	asm("dc " #reg ",%0"  : : "r" (val))
+#define mtcpic(reg,val)	asm("ic " #reg ",%0"  : : "r" (val))
+
+#define mtcpicall(reg)	asm("ic " #reg)
+#define mtcptlbi(reg)	asm("tlbi " #reg)
+#define mtcpat(reg,val)	asm("at " #reg ",%0"  : : "r" (val))
+/* CP15 operations */
+#define mfcp(reg)	({u32 rval;\
+			asm("mrs	%0, " #reg : "=r" (rval));\
+			rval;\
+			})
+
+#define mtcp(reg,val)	asm("msr " #reg ",%0"  : : "r" (val))
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XPSEUDO_ASM_GCC_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu0_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu0_cfg.h
new file mode 100644
index 0000000..d166804
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu0_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU0_CFG_H__
+#define __XDDR_XMPU0_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu0Cfg Base Address
+ */
+#define XDDR_XMPU0_CFG_BASEADDR      0xFD000000UL
+
+/**
+ * Register: XddrXmpu0CfgCtrl
+ */
+#define XDDR_XMPU0_CFG_CTRL    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU0_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu0CfgErrSts1
+ */
+#define XDDR_XMPU0_CFG_ERR_STS1    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU0_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgErrSts2
+ */
+#define XDDR_XMPU0_CFG_ERR_STS2    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU0_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgPoison
+ */
+#define XDDR_XMPU0_CFG_POISON    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU0_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU0_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU0_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU0_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgIsr
+ */
+#define XDDR_XMPU0_CFG_ISR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU0_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgImr
+ */
+#define XDDR_XMPU0_CFG_IMR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU0_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu0CfgIen
+ */
+#define XDDR_XMPU0_CFG_IEN    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU0_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgIds
+ */
+#define XDDR_XMPU0_CFG_IDS    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU0_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgLock
+ */
+#define XDDR_XMPU0_CFG_LOCK    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU0_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00Strt
+ */
+#define XDDR_XMPU0_CFG_R00_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU0_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00End
+ */
+#define XDDR_XMPU0_CFG_R00_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU0_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00Mstr
+ */
+#define XDDR_XMPU0_CFG_R00_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU0_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00
+ */
+#define XDDR_XMPU0_CFG_R00    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU0_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01Strt
+ */
+#define XDDR_XMPU0_CFG_R01_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU0_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01End
+ */
+#define XDDR_XMPU0_CFG_R01_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU0_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01Mstr
+ */
+#define XDDR_XMPU0_CFG_R01_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU0_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01
+ */
+#define XDDR_XMPU0_CFG_R01    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU0_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02Strt
+ */
+#define XDDR_XMPU0_CFG_R02_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU0_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02End
+ */
+#define XDDR_XMPU0_CFG_R02_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU0_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02Mstr
+ */
+#define XDDR_XMPU0_CFG_R02_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU0_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02
+ */
+#define XDDR_XMPU0_CFG_R02    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU0_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03Strt
+ */
+#define XDDR_XMPU0_CFG_R03_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU0_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03End
+ */
+#define XDDR_XMPU0_CFG_R03_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU0_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03Mstr
+ */
+#define XDDR_XMPU0_CFG_R03_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU0_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03
+ */
+#define XDDR_XMPU0_CFG_R03    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU0_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04Strt
+ */
+#define XDDR_XMPU0_CFG_R04_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU0_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04End
+ */
+#define XDDR_XMPU0_CFG_R04_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU0_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04Mstr
+ */
+#define XDDR_XMPU0_CFG_R04_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU0_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04
+ */
+#define XDDR_XMPU0_CFG_R04    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU0_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05Strt
+ */
+#define XDDR_XMPU0_CFG_R05_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU0_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05End
+ */
+#define XDDR_XMPU0_CFG_R05_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU0_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05Mstr
+ */
+#define XDDR_XMPU0_CFG_R05_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU0_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05
+ */
+#define XDDR_XMPU0_CFG_R05    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU0_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06Strt
+ */
+#define XDDR_XMPU0_CFG_R06_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU0_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06End
+ */
+#define XDDR_XMPU0_CFG_R06_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU0_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06Mstr
+ */
+#define XDDR_XMPU0_CFG_R06_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU0_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06
+ */
+#define XDDR_XMPU0_CFG_R06    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU0_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07Strt
+ */
+#define XDDR_XMPU0_CFG_R07_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU0_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07End
+ */
+#define XDDR_XMPU0_CFG_R07_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU0_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07Mstr
+ */
+#define XDDR_XMPU0_CFG_R07_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU0_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07
+ */
+#define XDDR_XMPU0_CFG_R07    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU0_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08Strt
+ */
+#define XDDR_XMPU0_CFG_R08_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU0_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08End
+ */
+#define XDDR_XMPU0_CFG_R08_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU0_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08Mstr
+ */
+#define XDDR_XMPU0_CFG_R08_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU0_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08
+ */
+#define XDDR_XMPU0_CFG_R08    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU0_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09Strt
+ */
+#define XDDR_XMPU0_CFG_R09_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU0_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09End
+ */
+#define XDDR_XMPU0_CFG_R09_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU0_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09Mstr
+ */
+#define XDDR_XMPU0_CFG_R09_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU0_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09
+ */
+#define XDDR_XMPU0_CFG_R09    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU0_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10Strt
+ */
+#define XDDR_XMPU0_CFG_R10_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU0_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10End
+ */
+#define XDDR_XMPU0_CFG_R10_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU0_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10Mstr
+ */
+#define XDDR_XMPU0_CFG_R10_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU0_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10
+ */
+#define XDDR_XMPU0_CFG_R10    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU0_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11Strt
+ */
+#define XDDR_XMPU0_CFG_R11_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU0_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11End
+ */
+#define XDDR_XMPU0_CFG_R11_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU0_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11Mstr
+ */
+#define XDDR_XMPU0_CFG_R11_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU0_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11
+ */
+#define XDDR_XMPU0_CFG_R11    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU0_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12Strt
+ */
+#define XDDR_XMPU0_CFG_R12_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU0_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12End
+ */
+#define XDDR_XMPU0_CFG_R12_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU0_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12Mstr
+ */
+#define XDDR_XMPU0_CFG_R12_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU0_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12
+ */
+#define XDDR_XMPU0_CFG_R12    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU0_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13Strt
+ */
+#define XDDR_XMPU0_CFG_R13_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU0_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13End
+ */
+#define XDDR_XMPU0_CFG_R13_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU0_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13Mstr
+ */
+#define XDDR_XMPU0_CFG_R13_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU0_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13
+ */
+#define XDDR_XMPU0_CFG_R13    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU0_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14Strt
+ */
+#define XDDR_XMPU0_CFG_R14_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU0_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14End
+ */
+#define XDDR_XMPU0_CFG_R14_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU0_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14Mstr
+ */
+#define XDDR_XMPU0_CFG_R14_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU0_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14
+ */
+#define XDDR_XMPU0_CFG_R14    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU0_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15Strt
+ */
+#define XDDR_XMPU0_CFG_R15_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU0_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15End
+ */
+#define XDDR_XMPU0_CFG_R15_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU0_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15Mstr
+ */
+#define XDDR_XMPU0_CFG_R15_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU0_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15
+ */
+#define XDDR_XMPU0_CFG_R15    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU0_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU0_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu1_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu1_cfg.h
new file mode 100644
index 0000000..5e6bf17
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu1_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU1_CFG_H__
+#define __XDDR_XMPU1_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu1Cfg Base Address
+ */
+#define XDDR_XMPU1_CFG_BASEADDR      0xFD010000UL
+
+/**
+ * Register: XddrXmpu1CfgCtrl
+ */
+#define XDDR_XMPU1_CFG_CTRL    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU1_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu1CfgErrSts1
+ */
+#define XDDR_XMPU1_CFG_ERR_STS1    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU1_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgErrSts2
+ */
+#define XDDR_XMPU1_CFG_ERR_STS2    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU1_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgPoison
+ */
+#define XDDR_XMPU1_CFG_POISON    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU1_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU1_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU1_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU1_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgIsr
+ */
+#define XDDR_XMPU1_CFG_ISR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU1_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgImr
+ */
+#define XDDR_XMPU1_CFG_IMR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU1_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu1CfgIen
+ */
+#define XDDR_XMPU1_CFG_IEN    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU1_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgIds
+ */
+#define XDDR_XMPU1_CFG_IDS    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU1_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgLock
+ */
+#define XDDR_XMPU1_CFG_LOCK    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU1_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00Strt
+ */
+#define XDDR_XMPU1_CFG_R00_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU1_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00End
+ */
+#define XDDR_XMPU1_CFG_R00_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU1_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00Mstr
+ */
+#define XDDR_XMPU1_CFG_R00_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU1_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00
+ */
+#define XDDR_XMPU1_CFG_R00    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU1_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01Strt
+ */
+#define XDDR_XMPU1_CFG_R01_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU1_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01End
+ */
+#define XDDR_XMPU1_CFG_R01_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU1_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01Mstr
+ */
+#define XDDR_XMPU1_CFG_R01_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU1_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01
+ */
+#define XDDR_XMPU1_CFG_R01    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU1_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02Strt
+ */
+#define XDDR_XMPU1_CFG_R02_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU1_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02End
+ */
+#define XDDR_XMPU1_CFG_R02_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU1_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02Mstr
+ */
+#define XDDR_XMPU1_CFG_R02_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU1_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02
+ */
+#define XDDR_XMPU1_CFG_R02    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU1_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03Strt
+ */
+#define XDDR_XMPU1_CFG_R03_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU1_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03End
+ */
+#define XDDR_XMPU1_CFG_R03_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU1_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03Mstr
+ */
+#define XDDR_XMPU1_CFG_R03_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU1_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03
+ */
+#define XDDR_XMPU1_CFG_R03    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU1_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04Strt
+ */
+#define XDDR_XMPU1_CFG_R04_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU1_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04End
+ */
+#define XDDR_XMPU1_CFG_R04_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU1_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04Mstr
+ */
+#define XDDR_XMPU1_CFG_R04_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU1_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04
+ */
+#define XDDR_XMPU1_CFG_R04    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU1_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05Strt
+ */
+#define XDDR_XMPU1_CFG_R05_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU1_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05End
+ */
+#define XDDR_XMPU1_CFG_R05_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU1_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05Mstr
+ */
+#define XDDR_XMPU1_CFG_R05_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU1_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05
+ */
+#define XDDR_XMPU1_CFG_R05    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU1_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06Strt
+ */
+#define XDDR_XMPU1_CFG_R06_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU1_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06End
+ */
+#define XDDR_XMPU1_CFG_R06_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU1_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06Mstr
+ */
+#define XDDR_XMPU1_CFG_R06_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU1_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06
+ */
+#define XDDR_XMPU1_CFG_R06    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU1_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07Strt
+ */
+#define XDDR_XMPU1_CFG_R07_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU1_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07End
+ */
+#define XDDR_XMPU1_CFG_R07_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU1_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07Mstr
+ */
+#define XDDR_XMPU1_CFG_R07_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU1_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07
+ */
+#define XDDR_XMPU1_CFG_R07    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU1_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08Strt
+ */
+#define XDDR_XMPU1_CFG_R08_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU1_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08End
+ */
+#define XDDR_XMPU1_CFG_R08_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU1_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08Mstr
+ */
+#define XDDR_XMPU1_CFG_R08_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU1_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08
+ */
+#define XDDR_XMPU1_CFG_R08    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU1_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09Strt
+ */
+#define XDDR_XMPU1_CFG_R09_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU1_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09End
+ */
+#define XDDR_XMPU1_CFG_R09_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU1_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09Mstr
+ */
+#define XDDR_XMPU1_CFG_R09_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU1_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09
+ */
+#define XDDR_XMPU1_CFG_R09    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU1_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10Strt
+ */
+#define XDDR_XMPU1_CFG_R10_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU1_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10End
+ */
+#define XDDR_XMPU1_CFG_R10_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU1_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10Mstr
+ */
+#define XDDR_XMPU1_CFG_R10_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU1_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10
+ */
+#define XDDR_XMPU1_CFG_R10    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU1_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11Strt
+ */
+#define XDDR_XMPU1_CFG_R11_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU1_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11End
+ */
+#define XDDR_XMPU1_CFG_R11_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU1_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11Mstr
+ */
+#define XDDR_XMPU1_CFG_R11_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU1_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11
+ */
+#define XDDR_XMPU1_CFG_R11    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU1_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12Strt
+ */
+#define XDDR_XMPU1_CFG_R12_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU1_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12End
+ */
+#define XDDR_XMPU1_CFG_R12_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU1_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12Mstr
+ */
+#define XDDR_XMPU1_CFG_R12_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU1_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12
+ */
+#define XDDR_XMPU1_CFG_R12    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU1_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13Strt
+ */
+#define XDDR_XMPU1_CFG_R13_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU1_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13End
+ */
+#define XDDR_XMPU1_CFG_R13_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU1_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13Mstr
+ */
+#define XDDR_XMPU1_CFG_R13_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU1_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13
+ */
+#define XDDR_XMPU1_CFG_R13    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU1_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14Strt
+ */
+#define XDDR_XMPU1_CFG_R14_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU1_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14End
+ */
+#define XDDR_XMPU1_CFG_R14_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU1_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14Mstr
+ */
+#define XDDR_XMPU1_CFG_R14_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU1_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14
+ */
+#define XDDR_XMPU1_CFG_R14    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU1_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15Strt
+ */
+#define XDDR_XMPU1_CFG_R15_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU1_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15End
+ */
+#define XDDR_XMPU1_CFG_R15_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU1_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15Mstr
+ */
+#define XDDR_XMPU1_CFG_R15_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU1_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15
+ */
+#define XDDR_XMPU1_CFG_R15    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU1_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU1_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu2_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu2_cfg.h
new file mode 100644
index 0000000..be1fab3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu2_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU2_CFG_H__
+#define __XDDR_XMPU2_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu2Cfg Base Address
+ */
+#define XDDR_XMPU2_CFG_BASEADDR      0xFD020000UL
+
+/**
+ * Register: XddrXmpu2CfgCtrl
+ */
+#define XDDR_XMPU2_CFG_CTRL    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU2_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu2CfgErrSts1
+ */
+#define XDDR_XMPU2_CFG_ERR_STS1    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU2_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgErrSts2
+ */
+#define XDDR_XMPU2_CFG_ERR_STS2    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU2_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgPoison
+ */
+#define XDDR_XMPU2_CFG_POISON    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU2_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU2_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU2_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU2_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgIsr
+ */
+#define XDDR_XMPU2_CFG_ISR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU2_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgImr
+ */
+#define XDDR_XMPU2_CFG_IMR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU2_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu2CfgIen
+ */
+#define XDDR_XMPU2_CFG_IEN    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU2_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgIds
+ */
+#define XDDR_XMPU2_CFG_IDS    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU2_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgLock
+ */
+#define XDDR_XMPU2_CFG_LOCK    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU2_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00Strt
+ */
+#define XDDR_XMPU2_CFG_R00_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU2_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00End
+ */
+#define XDDR_XMPU2_CFG_R00_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU2_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00Mstr
+ */
+#define XDDR_XMPU2_CFG_R00_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU2_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00
+ */
+#define XDDR_XMPU2_CFG_R00    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU2_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01Strt
+ */
+#define XDDR_XMPU2_CFG_R01_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU2_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01End
+ */
+#define XDDR_XMPU2_CFG_R01_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU2_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01Mstr
+ */
+#define XDDR_XMPU2_CFG_R01_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU2_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01
+ */
+#define XDDR_XMPU2_CFG_R01    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU2_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02Strt
+ */
+#define XDDR_XMPU2_CFG_R02_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU2_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02End
+ */
+#define XDDR_XMPU2_CFG_R02_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU2_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02Mstr
+ */
+#define XDDR_XMPU2_CFG_R02_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU2_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02
+ */
+#define XDDR_XMPU2_CFG_R02    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU2_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03Strt
+ */
+#define XDDR_XMPU2_CFG_R03_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU2_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03End
+ */
+#define XDDR_XMPU2_CFG_R03_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU2_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03Mstr
+ */
+#define XDDR_XMPU2_CFG_R03_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU2_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03
+ */
+#define XDDR_XMPU2_CFG_R03    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU2_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04Strt
+ */
+#define XDDR_XMPU2_CFG_R04_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU2_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04End
+ */
+#define XDDR_XMPU2_CFG_R04_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU2_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04Mstr
+ */
+#define XDDR_XMPU2_CFG_R04_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU2_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04
+ */
+#define XDDR_XMPU2_CFG_R04    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU2_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05Strt
+ */
+#define XDDR_XMPU2_CFG_R05_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU2_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05End
+ */
+#define XDDR_XMPU2_CFG_R05_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU2_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05Mstr
+ */
+#define XDDR_XMPU2_CFG_R05_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU2_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05
+ */
+#define XDDR_XMPU2_CFG_R05    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU2_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06Strt
+ */
+#define XDDR_XMPU2_CFG_R06_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU2_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06End
+ */
+#define XDDR_XMPU2_CFG_R06_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU2_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06Mstr
+ */
+#define XDDR_XMPU2_CFG_R06_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU2_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06
+ */
+#define XDDR_XMPU2_CFG_R06    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU2_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07Strt
+ */
+#define XDDR_XMPU2_CFG_R07_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU2_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07End
+ */
+#define XDDR_XMPU2_CFG_R07_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU2_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07Mstr
+ */
+#define XDDR_XMPU2_CFG_R07_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU2_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07
+ */
+#define XDDR_XMPU2_CFG_R07    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU2_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08Strt
+ */
+#define XDDR_XMPU2_CFG_R08_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU2_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08End
+ */
+#define XDDR_XMPU2_CFG_R08_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU2_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08Mstr
+ */
+#define XDDR_XMPU2_CFG_R08_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU2_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08
+ */
+#define XDDR_XMPU2_CFG_R08    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU2_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09Strt
+ */
+#define XDDR_XMPU2_CFG_R09_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU2_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09End
+ */
+#define XDDR_XMPU2_CFG_R09_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU2_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09Mstr
+ */
+#define XDDR_XMPU2_CFG_R09_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU2_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09
+ */
+#define XDDR_XMPU2_CFG_R09    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU2_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10Strt
+ */
+#define XDDR_XMPU2_CFG_R10_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU2_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10End
+ */
+#define XDDR_XMPU2_CFG_R10_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU2_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10Mstr
+ */
+#define XDDR_XMPU2_CFG_R10_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU2_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10
+ */
+#define XDDR_XMPU2_CFG_R10    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU2_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11Strt
+ */
+#define XDDR_XMPU2_CFG_R11_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU2_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11End
+ */
+#define XDDR_XMPU2_CFG_R11_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU2_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11Mstr
+ */
+#define XDDR_XMPU2_CFG_R11_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU2_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11
+ */
+#define XDDR_XMPU2_CFG_R11    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU2_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12Strt
+ */
+#define XDDR_XMPU2_CFG_R12_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU2_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12End
+ */
+#define XDDR_XMPU2_CFG_R12_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU2_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12Mstr
+ */
+#define XDDR_XMPU2_CFG_R12_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU2_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12
+ */
+#define XDDR_XMPU2_CFG_R12    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU2_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13Strt
+ */
+#define XDDR_XMPU2_CFG_R13_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU2_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13End
+ */
+#define XDDR_XMPU2_CFG_R13_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU2_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13Mstr
+ */
+#define XDDR_XMPU2_CFG_R13_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU2_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13
+ */
+#define XDDR_XMPU2_CFG_R13    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU2_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14Strt
+ */
+#define XDDR_XMPU2_CFG_R14_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU2_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14End
+ */
+#define XDDR_XMPU2_CFG_R14_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU2_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14Mstr
+ */
+#define XDDR_XMPU2_CFG_R14_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU2_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14
+ */
+#define XDDR_XMPU2_CFG_R14    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU2_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15Strt
+ */
+#define XDDR_XMPU2_CFG_R15_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU2_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15End
+ */
+#define XDDR_XMPU2_CFG_R15_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU2_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15Mstr
+ */
+#define XDDR_XMPU2_CFG_R15_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU2_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15
+ */
+#define XDDR_XMPU2_CFG_R15    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU2_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU2_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu3_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu3_cfg.h
new file mode 100644
index 0000000..e8e24d4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu3_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU3_CFG_H__
+#define __XDDR_XMPU3_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu3Cfg Base Address
+ */
+#define XDDR_XMPU3_CFG_BASEADDR      0xFD030000UL
+
+/**
+ * Register: XddrXmpu3CfgCtrl
+ */
+#define XDDR_XMPU3_CFG_CTRL    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU3_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu3CfgErrSts1
+ */
+#define XDDR_XMPU3_CFG_ERR_STS1    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU3_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgErrSts2
+ */
+#define XDDR_XMPU3_CFG_ERR_STS2    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU3_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgPoison
+ */
+#define XDDR_XMPU3_CFG_POISON    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU3_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU3_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU3_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU3_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgIsr
+ */
+#define XDDR_XMPU3_CFG_ISR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU3_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgImr
+ */
+#define XDDR_XMPU3_CFG_IMR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU3_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu3CfgIen
+ */
+#define XDDR_XMPU3_CFG_IEN    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU3_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgIds
+ */
+#define XDDR_XMPU3_CFG_IDS    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU3_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgLock
+ */
+#define XDDR_XMPU3_CFG_LOCK    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU3_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00Strt
+ */
+#define XDDR_XMPU3_CFG_R00_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU3_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00End
+ */
+#define XDDR_XMPU3_CFG_R00_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU3_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00Mstr
+ */
+#define XDDR_XMPU3_CFG_R00_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU3_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00
+ */
+#define XDDR_XMPU3_CFG_R00    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU3_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01Strt
+ */
+#define XDDR_XMPU3_CFG_R01_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU3_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01End
+ */
+#define XDDR_XMPU3_CFG_R01_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU3_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01Mstr
+ */
+#define XDDR_XMPU3_CFG_R01_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU3_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01
+ */
+#define XDDR_XMPU3_CFG_R01    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU3_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02Strt
+ */
+#define XDDR_XMPU3_CFG_R02_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU3_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02End
+ */
+#define XDDR_XMPU3_CFG_R02_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU3_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02Mstr
+ */
+#define XDDR_XMPU3_CFG_R02_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU3_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02
+ */
+#define XDDR_XMPU3_CFG_R02    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU3_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03Strt
+ */
+#define XDDR_XMPU3_CFG_R03_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU3_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03End
+ */
+#define XDDR_XMPU3_CFG_R03_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU3_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03Mstr
+ */
+#define XDDR_XMPU3_CFG_R03_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU3_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03
+ */
+#define XDDR_XMPU3_CFG_R03    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU3_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04Strt
+ */
+#define XDDR_XMPU3_CFG_R04_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU3_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04End
+ */
+#define XDDR_XMPU3_CFG_R04_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU3_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04Mstr
+ */
+#define XDDR_XMPU3_CFG_R04_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU3_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04
+ */
+#define XDDR_XMPU3_CFG_R04    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU3_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05Strt
+ */
+#define XDDR_XMPU3_CFG_R05_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU3_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05End
+ */
+#define XDDR_XMPU3_CFG_R05_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU3_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05Mstr
+ */
+#define XDDR_XMPU3_CFG_R05_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU3_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05
+ */
+#define XDDR_XMPU3_CFG_R05    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU3_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06Strt
+ */
+#define XDDR_XMPU3_CFG_R06_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU3_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06End
+ */
+#define XDDR_XMPU3_CFG_R06_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU3_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06Mstr
+ */
+#define XDDR_XMPU3_CFG_R06_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU3_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06
+ */
+#define XDDR_XMPU3_CFG_R06    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU3_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07Strt
+ */
+#define XDDR_XMPU3_CFG_R07_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU3_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07End
+ */
+#define XDDR_XMPU3_CFG_R07_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU3_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07Mstr
+ */
+#define XDDR_XMPU3_CFG_R07_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU3_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07
+ */
+#define XDDR_XMPU3_CFG_R07    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU3_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08Strt
+ */
+#define XDDR_XMPU3_CFG_R08_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU3_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08End
+ */
+#define XDDR_XMPU3_CFG_R08_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU3_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08Mstr
+ */
+#define XDDR_XMPU3_CFG_R08_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU3_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08
+ */
+#define XDDR_XMPU3_CFG_R08    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU3_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09Strt
+ */
+#define XDDR_XMPU3_CFG_R09_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU3_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09End
+ */
+#define XDDR_XMPU3_CFG_R09_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU3_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09Mstr
+ */
+#define XDDR_XMPU3_CFG_R09_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU3_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09
+ */
+#define XDDR_XMPU3_CFG_R09    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU3_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10Strt
+ */
+#define XDDR_XMPU3_CFG_R10_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU3_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10End
+ */
+#define XDDR_XMPU3_CFG_R10_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU3_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10Mstr
+ */
+#define XDDR_XMPU3_CFG_R10_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU3_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10
+ */
+#define XDDR_XMPU3_CFG_R10    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU3_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11Strt
+ */
+#define XDDR_XMPU3_CFG_R11_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU3_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11End
+ */
+#define XDDR_XMPU3_CFG_R11_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU3_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11Mstr
+ */
+#define XDDR_XMPU3_CFG_R11_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU3_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11
+ */
+#define XDDR_XMPU3_CFG_R11    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU3_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12Strt
+ */
+#define XDDR_XMPU3_CFG_R12_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU3_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12End
+ */
+#define XDDR_XMPU3_CFG_R12_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU3_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12Mstr
+ */
+#define XDDR_XMPU3_CFG_R12_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU3_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12
+ */
+#define XDDR_XMPU3_CFG_R12    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU3_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13Strt
+ */
+#define XDDR_XMPU3_CFG_R13_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU3_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13End
+ */
+#define XDDR_XMPU3_CFG_R13_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU3_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13Mstr
+ */
+#define XDDR_XMPU3_CFG_R13_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU3_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13
+ */
+#define XDDR_XMPU3_CFG_R13    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU3_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14Strt
+ */
+#define XDDR_XMPU3_CFG_R14_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU3_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14End
+ */
+#define XDDR_XMPU3_CFG_R14_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU3_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14Mstr
+ */
+#define XDDR_XMPU3_CFG_R14_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU3_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14
+ */
+#define XDDR_XMPU3_CFG_R14    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU3_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15Strt
+ */
+#define XDDR_XMPU3_CFG_R15_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU3_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15End
+ */
+#define XDDR_XMPU3_CFG_R15_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU3_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15Mstr
+ */
+#define XDDR_XMPU3_CFG_R15_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU3_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15
+ */
+#define XDDR_XMPU3_CFG_R15    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU3_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU3_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu4_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu4_cfg.h
new file mode 100644
index 0000000..c93841f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu4_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU4_CFG_H__
+#define __XDDR_XMPU4_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu4Cfg Base Address
+ */
+#define XDDR_XMPU4_CFG_BASEADDR      0xFD040000UL
+
+/**
+ * Register: XddrXmpu4CfgCtrl
+ */
+#define XDDR_XMPU4_CFG_CTRL    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU4_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu4CfgErrSts1
+ */
+#define XDDR_XMPU4_CFG_ERR_STS1    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU4_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgErrSts2
+ */
+#define XDDR_XMPU4_CFG_ERR_STS2    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU4_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgPoison
+ */
+#define XDDR_XMPU4_CFG_POISON    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU4_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU4_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU4_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU4_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgIsr
+ */
+#define XDDR_XMPU4_CFG_ISR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU4_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgImr
+ */
+#define XDDR_XMPU4_CFG_IMR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU4_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu4CfgIen
+ */
+#define XDDR_XMPU4_CFG_IEN    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU4_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgIds
+ */
+#define XDDR_XMPU4_CFG_IDS    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU4_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgLock
+ */
+#define XDDR_XMPU4_CFG_LOCK    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU4_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00Strt
+ */
+#define XDDR_XMPU4_CFG_R00_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU4_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00End
+ */
+#define XDDR_XMPU4_CFG_R00_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU4_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00Mstr
+ */
+#define XDDR_XMPU4_CFG_R00_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU4_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00
+ */
+#define XDDR_XMPU4_CFG_R00    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU4_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01Strt
+ */
+#define XDDR_XMPU4_CFG_R01_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU4_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01End
+ */
+#define XDDR_XMPU4_CFG_R01_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU4_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01Mstr
+ */
+#define XDDR_XMPU4_CFG_R01_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU4_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01
+ */
+#define XDDR_XMPU4_CFG_R01    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU4_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02Strt
+ */
+#define XDDR_XMPU4_CFG_R02_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU4_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02End
+ */
+#define XDDR_XMPU4_CFG_R02_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU4_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02Mstr
+ */
+#define XDDR_XMPU4_CFG_R02_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU4_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02
+ */
+#define XDDR_XMPU4_CFG_R02    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU4_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03Strt
+ */
+#define XDDR_XMPU4_CFG_R03_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU4_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03End
+ */
+#define XDDR_XMPU4_CFG_R03_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU4_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03Mstr
+ */
+#define XDDR_XMPU4_CFG_R03_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU4_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03
+ */
+#define XDDR_XMPU4_CFG_R03    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU4_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04Strt
+ */
+#define XDDR_XMPU4_CFG_R04_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU4_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04End
+ */
+#define XDDR_XMPU4_CFG_R04_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU4_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04Mstr
+ */
+#define XDDR_XMPU4_CFG_R04_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU4_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04
+ */
+#define XDDR_XMPU4_CFG_R04    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU4_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05Strt
+ */
+#define XDDR_XMPU4_CFG_R05_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU4_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05End
+ */
+#define XDDR_XMPU4_CFG_R05_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU4_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05Mstr
+ */
+#define XDDR_XMPU4_CFG_R05_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU4_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05
+ */
+#define XDDR_XMPU4_CFG_R05    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU4_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06Strt
+ */
+#define XDDR_XMPU4_CFG_R06_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU4_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06End
+ */
+#define XDDR_XMPU4_CFG_R06_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU4_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06Mstr
+ */
+#define XDDR_XMPU4_CFG_R06_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU4_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06
+ */
+#define XDDR_XMPU4_CFG_R06    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU4_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07Strt
+ */
+#define XDDR_XMPU4_CFG_R07_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU4_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07End
+ */
+#define XDDR_XMPU4_CFG_R07_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU4_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07Mstr
+ */
+#define XDDR_XMPU4_CFG_R07_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU4_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07
+ */
+#define XDDR_XMPU4_CFG_R07    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU4_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08Strt
+ */
+#define XDDR_XMPU4_CFG_R08_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU4_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08End
+ */
+#define XDDR_XMPU4_CFG_R08_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU4_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08Mstr
+ */
+#define XDDR_XMPU4_CFG_R08_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU4_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08
+ */
+#define XDDR_XMPU4_CFG_R08    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU4_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09Strt
+ */
+#define XDDR_XMPU4_CFG_R09_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU4_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09End
+ */
+#define XDDR_XMPU4_CFG_R09_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU4_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09Mstr
+ */
+#define XDDR_XMPU4_CFG_R09_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU4_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09
+ */
+#define XDDR_XMPU4_CFG_R09    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU4_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10Strt
+ */
+#define XDDR_XMPU4_CFG_R10_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU4_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10End
+ */
+#define XDDR_XMPU4_CFG_R10_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU4_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10Mstr
+ */
+#define XDDR_XMPU4_CFG_R10_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU4_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10
+ */
+#define XDDR_XMPU4_CFG_R10    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU4_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11Strt
+ */
+#define XDDR_XMPU4_CFG_R11_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU4_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11End
+ */
+#define XDDR_XMPU4_CFG_R11_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU4_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11Mstr
+ */
+#define XDDR_XMPU4_CFG_R11_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU4_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11
+ */
+#define XDDR_XMPU4_CFG_R11    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU4_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12Strt
+ */
+#define XDDR_XMPU4_CFG_R12_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU4_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12End
+ */
+#define XDDR_XMPU4_CFG_R12_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU4_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12Mstr
+ */
+#define XDDR_XMPU4_CFG_R12_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU4_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12
+ */
+#define XDDR_XMPU4_CFG_R12    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU4_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13Strt
+ */
+#define XDDR_XMPU4_CFG_R13_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU4_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13End
+ */
+#define XDDR_XMPU4_CFG_R13_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU4_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13Mstr
+ */
+#define XDDR_XMPU4_CFG_R13_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU4_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13
+ */
+#define XDDR_XMPU4_CFG_R13    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU4_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14Strt
+ */
+#define XDDR_XMPU4_CFG_R14_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU4_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14End
+ */
+#define XDDR_XMPU4_CFG_R14_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU4_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14Mstr
+ */
+#define XDDR_XMPU4_CFG_R14_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU4_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14
+ */
+#define XDDR_XMPU4_CFG_R14    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU4_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15Strt
+ */
+#define XDDR_XMPU4_CFG_R15_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU4_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15End
+ */
+#define XDDR_XMPU4_CFG_R15_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU4_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15Mstr
+ */
+#define XDDR_XMPU4_CFG_R15_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU4_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15
+ */
+#define XDDR_XMPU4_CFG_R15    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU4_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU4_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu5_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu5_cfg.h
new file mode 100644
index 0000000..596d783
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xddr_xmpu5_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU5_CFG_H__
+#define __XDDR_XMPU5_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu5Cfg Base Address
+ */
+#define XDDR_XMPU5_CFG_BASEADDR      0xFD050000UL
+
+/**
+ * Register: XddrXmpu5CfgCtrl
+ */
+#define XDDR_XMPU5_CFG_CTRL    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU5_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu5CfgErrSts1
+ */
+#define XDDR_XMPU5_CFG_ERR_STS1    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU5_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgErrSts2
+ */
+#define XDDR_XMPU5_CFG_ERR_STS2    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU5_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgPoison
+ */
+#define XDDR_XMPU5_CFG_POISON    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU5_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU5_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU5_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU5_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgIsr
+ */
+#define XDDR_XMPU5_CFG_ISR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU5_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgImr
+ */
+#define XDDR_XMPU5_CFG_IMR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU5_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu5CfgIen
+ */
+#define XDDR_XMPU5_CFG_IEN    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU5_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgIds
+ */
+#define XDDR_XMPU5_CFG_IDS    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU5_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgLock
+ */
+#define XDDR_XMPU5_CFG_LOCK    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU5_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00Strt
+ */
+#define XDDR_XMPU5_CFG_R00_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU5_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00End
+ */
+#define XDDR_XMPU5_CFG_R00_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU5_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00Mstr
+ */
+#define XDDR_XMPU5_CFG_R00_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU5_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00
+ */
+#define XDDR_XMPU5_CFG_R00    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU5_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01Strt
+ */
+#define XDDR_XMPU5_CFG_R01_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU5_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01End
+ */
+#define XDDR_XMPU5_CFG_R01_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU5_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01Mstr
+ */
+#define XDDR_XMPU5_CFG_R01_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU5_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01
+ */
+#define XDDR_XMPU5_CFG_R01    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU5_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02Strt
+ */
+#define XDDR_XMPU5_CFG_R02_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU5_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02End
+ */
+#define XDDR_XMPU5_CFG_R02_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU5_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02Mstr
+ */
+#define XDDR_XMPU5_CFG_R02_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU5_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02
+ */
+#define XDDR_XMPU5_CFG_R02    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU5_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03Strt
+ */
+#define XDDR_XMPU5_CFG_R03_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU5_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03End
+ */
+#define XDDR_XMPU5_CFG_R03_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU5_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03Mstr
+ */
+#define XDDR_XMPU5_CFG_R03_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU5_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03
+ */
+#define XDDR_XMPU5_CFG_R03    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU5_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04Strt
+ */
+#define XDDR_XMPU5_CFG_R04_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU5_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04End
+ */
+#define XDDR_XMPU5_CFG_R04_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU5_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04Mstr
+ */
+#define XDDR_XMPU5_CFG_R04_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU5_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04
+ */
+#define XDDR_XMPU5_CFG_R04    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU5_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05Strt
+ */
+#define XDDR_XMPU5_CFG_R05_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU5_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05End
+ */
+#define XDDR_XMPU5_CFG_R05_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU5_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05Mstr
+ */
+#define XDDR_XMPU5_CFG_R05_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU5_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05
+ */
+#define XDDR_XMPU5_CFG_R05    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU5_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06Strt
+ */
+#define XDDR_XMPU5_CFG_R06_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU5_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06End
+ */
+#define XDDR_XMPU5_CFG_R06_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU5_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06Mstr
+ */
+#define XDDR_XMPU5_CFG_R06_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU5_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06
+ */
+#define XDDR_XMPU5_CFG_R06    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU5_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07Strt
+ */
+#define XDDR_XMPU5_CFG_R07_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU5_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07End
+ */
+#define XDDR_XMPU5_CFG_R07_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU5_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07Mstr
+ */
+#define XDDR_XMPU5_CFG_R07_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU5_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07
+ */
+#define XDDR_XMPU5_CFG_R07    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU5_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08Strt
+ */
+#define XDDR_XMPU5_CFG_R08_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU5_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08End
+ */
+#define XDDR_XMPU5_CFG_R08_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU5_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08Mstr
+ */
+#define XDDR_XMPU5_CFG_R08_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU5_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08
+ */
+#define XDDR_XMPU5_CFG_R08    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU5_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09Strt
+ */
+#define XDDR_XMPU5_CFG_R09_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU5_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09End
+ */
+#define XDDR_XMPU5_CFG_R09_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU5_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09Mstr
+ */
+#define XDDR_XMPU5_CFG_R09_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU5_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09
+ */
+#define XDDR_XMPU5_CFG_R09    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU5_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10Strt
+ */
+#define XDDR_XMPU5_CFG_R10_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU5_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10End
+ */
+#define XDDR_XMPU5_CFG_R10_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU5_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10Mstr
+ */
+#define XDDR_XMPU5_CFG_R10_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU5_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10
+ */
+#define XDDR_XMPU5_CFG_R10    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU5_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11Strt
+ */
+#define XDDR_XMPU5_CFG_R11_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU5_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11End
+ */
+#define XDDR_XMPU5_CFG_R11_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU5_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11Mstr
+ */
+#define XDDR_XMPU5_CFG_R11_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU5_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11
+ */
+#define XDDR_XMPU5_CFG_R11    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU5_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12Strt
+ */
+#define XDDR_XMPU5_CFG_R12_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU5_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12End
+ */
+#define XDDR_XMPU5_CFG_R12_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU5_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12Mstr
+ */
+#define XDDR_XMPU5_CFG_R12_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU5_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12
+ */
+#define XDDR_XMPU5_CFG_R12    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU5_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13Strt
+ */
+#define XDDR_XMPU5_CFG_R13_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU5_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13End
+ */
+#define XDDR_XMPU5_CFG_R13_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU5_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13Mstr
+ */
+#define XDDR_XMPU5_CFG_R13_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU5_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13
+ */
+#define XDDR_XMPU5_CFG_R13    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU5_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14Strt
+ */
+#define XDDR_XMPU5_CFG_R14_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU5_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14End
+ */
+#define XDDR_XMPU5_CFG_R14_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU5_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14Mstr
+ */
+#define XDDR_XMPU5_CFG_R14_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU5_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14
+ */
+#define XDDR_XMPU5_CFG_R14    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU5_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15Strt
+ */
+#define XDDR_XMPU5_CFG_R15_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU5_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15End
+ */
+#define XDDR_XMPU5_CFG_R15_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU5_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15Mstr
+ */
+#define XDDR_XMPU5_CFG_R15_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU5_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15
+ */
+#define XDDR_XMPU5_CFG_R15    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU5_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU5_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_slcr.h
new file mode 100644
index 0000000..b9d7028
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_slcr.h
@@ -0,0 +1,382 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_SLCR_H__
+#define __XFPD_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdSlcr Base Address
+ */
+#define XFPD_SLCR_BASEADDR      0xFD610000UL
+
+/**
+ * Register: XfpdSlcrWprot0
+ */
+#define XFPD_SLCR_WPROT0    ( ( XFPD_SLCR_BASEADDR ) + 0x00000000UL )
+#define XFPD_SLCR_WPROT0_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_WPROT0_ACT_SHIFT   0UL
+#define XFPD_SLCR_WPROT0_ACT_WIDTH   1UL
+#define XFPD_SLCR_WPROT0_ACT_MASK    0x00000001UL
+#define XFPD_SLCR_WPROT0_ACT_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrCtrl
+ */
+#define XFPD_SLCR_CTRL    ( ( XFPD_SLCR_BASEADDR ) + 0x00000004UL )
+#define XFPD_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIsr
+ */
+#define XFPD_SLCR_ISR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000008UL )
+#define XFPD_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrImr
+ */
+#define XFPD_SLCR_IMR    ( ( XFPD_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XFPD_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrIer
+ */
+#define XFPD_SLCR_IER    ( ( XFPD_SLCR_BASEADDR ) + 0x00000010UL )
+#define XFPD_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIdr
+ */
+#define XFPD_SLCR_IDR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000014UL )
+#define XFPD_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrItr
+ */
+#define XFPD_SLCR_ITR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000018UL )
+#define XFPD_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrWdtClkSel
+ */
+#define XFPD_SLCR_WDT_CLK_SEL    ( ( XFPD_SLCR_BASEADDR ) + 0x00000100UL )
+#define XFPD_SLCR_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_WDT_CLK_SEL_SHIFT   0UL
+#define XFPD_SLCR_WDT_CLK_SEL_WIDTH   1UL
+#define XFPD_SLCR_WDT_CLK_SEL_MASK    0x00000001UL
+#define XFPD_SLCR_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIntFpd
+ */
+#define XFPD_SLCR_INT_FPD    ( ( XFPD_SLCR_BASEADDR ) + 0x00000200UL )
+#define XFPD_SLCR_INT_FPD_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_INT_FPD_GFM_SEL_SHIFT   0UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_WIDTH   1UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_MASK    0x00000001UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrGpu
+ */
+#define XFPD_SLCR_GPU    ( ( XFPD_SLCR_BASEADDR ) + 0x0000100CUL )
+#define XFPD_SLCR_GPU_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_GPU_ARCACHE_SHIFT   7UL
+#define XFPD_SLCR_GPU_ARCACHE_WIDTH   4UL
+#define XFPD_SLCR_GPU_ARCACHE_MASK    0x00000780UL
+#define XFPD_SLCR_GPU_ARCACHE_DEFVAL  0x0UL
+
+#define XFPD_SLCR_GPU_AWCACHE_SHIFT   3UL
+#define XFPD_SLCR_GPU_AWCACHE_WIDTH   4UL
+#define XFPD_SLCR_GPU_AWCACHE_MASK    0x00000078UL
+#define XFPD_SLCR_GPU_AWCACHE_DEFVAL  0x0UL
+
+#define XFPD_SLCR_GPU_PP1_IDLE_SHIFT   2UL
+#define XFPD_SLCR_GPU_PP1_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_PP1_IDLE_MASK    0x00000004UL
+#define XFPD_SLCR_GPU_PP1_IDLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GPU_PP0_IDLE_SHIFT   1UL
+#define XFPD_SLCR_GPU_PP0_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_PP0_IDLE_MASK    0x00000002UL
+#define XFPD_SLCR_GPU_PP0_IDLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GPU_IDLE_SHIFT   0UL
+#define XFPD_SLCR_GPU_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_IDLE_MASK    0x00000001UL
+#define XFPD_SLCR_GPU_IDLE_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrGdmaCfg
+ */
+#define XFPD_SLCR_GDMA_CFG    ( ( XFPD_SLCR_BASEADDR ) + 0x00003000UL )
+#define XFPD_SLCR_GDMA_CFG_RSTVAL   0x00000048UL
+
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_SHIFT   5UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_WIDTH   2UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_MASK    0x00000060UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_DEFVAL  0x2UL
+
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_SHIFT   0UL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_WIDTH   5UL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_MASK    0x0000001fUL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_DEFVAL  0x8UL
+
+/**
+ * Register: XfpdSlcrGdma
+ */
+#define XFPD_SLCR_GDMA    ( ( XFPD_SLCR_BASEADDR ) + 0x00003010UL )
+#define XFPD_SLCR_GDMA_RSTVAL   0x00003b3bUL
+
+#define XFPD_SLCR_GDMA_RAM1_EMAB_SHIFT   12UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_MASK    0x00007000UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM1_EMASA_SHIFT   11UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_WIDTH   1UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_MASK    0x00000800UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GDMA_RAM1_EMAA_SHIFT   8UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_MASK    0x00000700UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMAB_SHIFT   4UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_MASK    0x00000070UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMASA_SHIFT   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_WIDTH   1UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_MASK    0x00000008UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMAA_SHIFT   0UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_MASK    0x00000007UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_DEFVAL  0x3UL
+
+/**
+ * Register: XfpdSlcrAfiFs
+ */
+#define XFPD_SLCR_AFI_FS    ( ( XFPD_SLCR_BASEADDR ) + 0x00005000UL )
+#define XFPD_SLCR_AFI_FS_RSTVAL   0x00000a00UL
+
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_SHIFT   10UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_WIDTH   2UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_MASK    0x00000c00UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_DEFVAL  0x2UL
+
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_SHIFT   8UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_WIDTH   2UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_MASK    0x00000300UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_DEFVAL  0x2UL
+
+/**
+ * Register: XfpdSlcrErrAtbIsr
+ */
+#define XFPD_SLCR_ERR_ATB_ISR    ( ( XFPD_SLCR_BASEADDR ) + 0x00006000UL )
+#define XFPD_SLCR_ERR_ATB_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrErrAtbImr
+ */
+#define XFPD_SLCR_ERR_ATB_IMR    ( ( XFPD_SLCR_BASEADDR ) + 0x00006004UL )
+#define XFPD_SLCR_ERR_ATB_IMR_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrErrAtbIer
+ */
+#define XFPD_SLCR_ERR_ATB_IER    ( ( XFPD_SLCR_BASEADDR ) + 0x00006008UL )
+#define XFPD_SLCR_ERR_ATB_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrErrAtbIdr
+ */
+#define XFPD_SLCR_ERR_ATB_IDR    ( ( XFPD_SLCR_BASEADDR ) + 0x0000600CUL )
+#define XFPD_SLCR_ERR_ATB_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrAtbCmdstore
+ */
+#define XFPD_SLCR_ATB_CMDSTORE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006010UL )
+#define XFPD_SLCR_ATB_CMDSTORE_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrAtbRespEn
+ */
+#define XFPD_SLCR_ATB_RESP_EN    ( ( XFPD_SLCR_BASEADDR ) + 0x00006014UL )
+#define XFPD_SLCR_ATB_RESP_EN_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrAtbResptype
+ */
+#define XFPD_SLCR_ATB_RESPTYPE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006018UL )
+#define XFPD_SLCR_ATB_RESPTYPE_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrAtbPrescale
+ */
+#define XFPD_SLCR_ATB_PRESCALE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006020UL )
+#define XFPD_SLCR_ATB_PRESCALE_RSTVAL   0x0000ffffUL
+
+#define XFPD_SLCR_ATB_PRESCALE_EN_SHIFT   16UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_WIDTH   1UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_MASK    0x00010000UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_PRESCALE_VAL_SHIFT   0UL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_WIDTH   16UL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_MASK    0x0000ffffUL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_DEFVAL  0xffffUL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_slcr_secure.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_slcr_secure.h
new file mode 100644
index 0000000..cc6983c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_slcr_secure.h
@@ -0,0 +1,277 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_SLCR_SECURE_H__
+#define __XFPD_SLCR_SECURE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdSlcrSecure Base Address
+ */
+#define XFPD_SLCR_SECURE_BASEADDR      0xFD690000UL
+
+/**
+ * Register: XfpdSlcrSecCtrl
+ */
+#define XFPD_SLCR_SEC_CTRL    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000004UL )
+#define XFPD_SLCR_SEC_CTRL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_SHIFT   0UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_WIDTH   1UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecIsr
+ */
+#define XFPD_SLCR_SEC_ISR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000008UL )
+#define XFPD_SLCR_SEC_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecImr
+ */
+#define XFPD_SLCR_SEC_IMR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x0000000CUL )
+#define XFPD_SLCR_SEC_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecIer
+ */
+#define XFPD_SLCR_SEC_IER    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000010UL )
+#define XFPD_SLCR_SEC_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecIdr
+ */
+#define XFPD_SLCR_SEC_IDR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000014UL )
+#define XFPD_SLCR_SEC_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecItr
+ */
+#define XFPD_SLCR_SEC_ITR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000018UL )
+#define XFPD_SLCR_SEC_ITR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecSata
+ */
+#define XFPD_SLCR_SEC_SATA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000020UL )
+#define XFPD_SLCR_SEC_SATA_RSTVAL   0x0000000eUL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_SHIFT   3UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_MASK    0x00000008UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_SHIFT   2UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_MASK    0x00000004UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_SHIFT   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_MASK    0x00000002UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_EN_SHIFT   0UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecPcie
+ */
+#define XFPD_SLCR_SEC_PCIE    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000030UL )
+#define XFPD_SLCR_SEC_PCIE_RSTVAL   0x01ffffffUL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_SHIFT   24UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_MASK    0x01000000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_SHIFT   23UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_MASK    0x00800000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_SHIFT   22UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_MASK    0x00400000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_SHIFT   21UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_MASK    0x00200000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_SHIFT   20UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_MASK    0x00100000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_SHIFT   19UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_MASK    0x00080000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_SHIFT   18UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_MASK    0x00040000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_SHIFT   17UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_MASK    0x00020000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_SHIFT   16UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_MASK    0x00010000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_SHIFT   15UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_MASK    0x00008000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_SHIFT   14UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_MASK    0x00004000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_SHIFT   13UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_MASK    0x00002000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_SHIFT   12UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_MASK    0x00001000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_SHIFT   11UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_MASK    0x00000800UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_SHIFT   10UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_MASK    0x00000400UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_SHIFT   9UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_MASK    0x00000200UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_SHIFT   8UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_MASK    0x00000100UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_SHIFT   7UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_MASK    0x00000080UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_SHIFT   6UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_MASK    0x00000040UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_SHIFT   5UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_MASK    0x00000020UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_SHIFT   4UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_MASK    0x00000010UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_SHIFT   3UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_MASK    0x00000008UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_SHIFT   2UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_MASK    0x00000004UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_SHIFT   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_MASK    0x00000002UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_SHIFT   0UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecDpdma
+ */
+#define XFPD_SLCR_SEC_DPDMA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000040UL )
+#define XFPD_SLCR_SEC_DPDMA_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_SEC_DPDMA_TZ_SHIFT   0UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_WIDTH   1UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecGdma
+ */
+#define XFPD_SLCR_SEC_GDMA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000050UL )
+#define XFPD_SLCR_SEC_GDMA_RSTVAL   0x000000ffUL
+
+#define XFPD_SLCR_SEC_GDMA_TZ_SHIFT   0UL
+#define XFPD_SLCR_SEC_GDMA_TZ_WIDTH   8UL
+#define XFPD_SLCR_SEC_GDMA_TZ_MASK    0x000000ffUL
+#define XFPD_SLCR_SEC_GDMA_TZ_DEFVAL  0xffUL
+
+/**
+ * Register: XfpdSlcrSecGic
+ */
+#define XFPD_SLCR_SEC_GIC    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000060UL )
+#define XFPD_SLCR_SEC_GIC_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_SHIFT   0UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_WIDTH   1UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_SLCR_SECURE_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_xmpu_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_xmpu_cfg.h
new file mode 100644
index 0000000..1c3726c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_xmpu_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_XMPU_CFG_H__
+#define __XFPD_XMPU_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdXmpuCfg Base Address
+ */
+#define XFPD_XMPU_CFG_BASEADDR      0xFD5D0000UL
+
+/**
+ * Register: XfpdXmpuCfgCtrl
+ */
+#define XFPD_XMPU_CFG_CTRL    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000000UL )
+#define XFPD_XMPU_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuCfgErrSts1
+ */
+#define XFPD_XMPU_CFG_ERR_STS1    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000004UL )
+#define XFPD_XMPU_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgErrSts2
+ */
+#define XFPD_XMPU_CFG_ERR_STS2    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000008UL )
+#define XFPD_XMPU_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgPoison
+ */
+#define XFPD_XMPU_CFG_POISON    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000000CUL )
+#define XFPD_XMPU_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_POISON_BASE_SHIFT   0UL
+#define XFPD_XMPU_CFG_POISON_BASE_WIDTH   20UL
+#define XFPD_XMPU_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XFPD_XMPU_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgIsr
+ */
+#define XFPD_XMPU_CFG_ISR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000010UL )
+#define XFPD_XMPU_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgImr
+ */
+#define XFPD_XMPU_CFG_IMR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000014UL )
+#define XFPD_XMPU_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuCfgIen
+ */
+#define XFPD_XMPU_CFG_IEN    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000018UL )
+#define XFPD_XMPU_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgIds
+ */
+#define XFPD_XMPU_CFG_IDS    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000001CUL )
+#define XFPD_XMPU_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgLock
+ */
+#define XFPD_XMPU_CFG_LOCK    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000020UL )
+#define XFPD_XMPU_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00Strt
+ */
+#define XFPD_XMPU_CFG_R00_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000100UL )
+#define XFPD_XMPU_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00End
+ */
+#define XFPD_XMPU_CFG_R00_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000104UL )
+#define XFPD_XMPU_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00Mstr
+ */
+#define XFPD_XMPU_CFG_R00_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000108UL )
+#define XFPD_XMPU_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00
+ */
+#define XFPD_XMPU_CFG_R00    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000010CUL )
+#define XFPD_XMPU_CFG_R00_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R00_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R00_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R00_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R00_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01Strt
+ */
+#define XFPD_XMPU_CFG_R01_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000110UL )
+#define XFPD_XMPU_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01End
+ */
+#define XFPD_XMPU_CFG_R01_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000114UL )
+#define XFPD_XMPU_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01Mstr
+ */
+#define XFPD_XMPU_CFG_R01_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000118UL )
+#define XFPD_XMPU_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01
+ */
+#define XFPD_XMPU_CFG_R01    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000011CUL )
+#define XFPD_XMPU_CFG_R01_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R01_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R01_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R01_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R01_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02Strt
+ */
+#define XFPD_XMPU_CFG_R02_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000120UL )
+#define XFPD_XMPU_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02End
+ */
+#define XFPD_XMPU_CFG_R02_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000124UL )
+#define XFPD_XMPU_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02Mstr
+ */
+#define XFPD_XMPU_CFG_R02_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000128UL )
+#define XFPD_XMPU_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02
+ */
+#define XFPD_XMPU_CFG_R02    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000012CUL )
+#define XFPD_XMPU_CFG_R02_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R02_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R02_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R02_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R02_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03Strt
+ */
+#define XFPD_XMPU_CFG_R03_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000130UL )
+#define XFPD_XMPU_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03End
+ */
+#define XFPD_XMPU_CFG_R03_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000134UL )
+#define XFPD_XMPU_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03Mstr
+ */
+#define XFPD_XMPU_CFG_R03_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000138UL )
+#define XFPD_XMPU_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03
+ */
+#define XFPD_XMPU_CFG_R03    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000013CUL )
+#define XFPD_XMPU_CFG_R03_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R03_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R03_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R03_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R03_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04Strt
+ */
+#define XFPD_XMPU_CFG_R04_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000140UL )
+#define XFPD_XMPU_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04End
+ */
+#define XFPD_XMPU_CFG_R04_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000144UL )
+#define XFPD_XMPU_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04Mstr
+ */
+#define XFPD_XMPU_CFG_R04_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000148UL )
+#define XFPD_XMPU_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04
+ */
+#define XFPD_XMPU_CFG_R04    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000014CUL )
+#define XFPD_XMPU_CFG_R04_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R04_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R04_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R04_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R04_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05Strt
+ */
+#define XFPD_XMPU_CFG_R05_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000150UL )
+#define XFPD_XMPU_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05End
+ */
+#define XFPD_XMPU_CFG_R05_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000154UL )
+#define XFPD_XMPU_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05Mstr
+ */
+#define XFPD_XMPU_CFG_R05_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000158UL )
+#define XFPD_XMPU_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05
+ */
+#define XFPD_XMPU_CFG_R05    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000015CUL )
+#define XFPD_XMPU_CFG_R05_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R05_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R05_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R05_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R05_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06Strt
+ */
+#define XFPD_XMPU_CFG_R06_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000160UL )
+#define XFPD_XMPU_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06End
+ */
+#define XFPD_XMPU_CFG_R06_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000164UL )
+#define XFPD_XMPU_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06Mstr
+ */
+#define XFPD_XMPU_CFG_R06_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000168UL )
+#define XFPD_XMPU_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06
+ */
+#define XFPD_XMPU_CFG_R06    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000016CUL )
+#define XFPD_XMPU_CFG_R06_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R06_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R06_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R06_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R06_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07Strt
+ */
+#define XFPD_XMPU_CFG_R07_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000170UL )
+#define XFPD_XMPU_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07End
+ */
+#define XFPD_XMPU_CFG_R07_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000174UL )
+#define XFPD_XMPU_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07Mstr
+ */
+#define XFPD_XMPU_CFG_R07_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000178UL )
+#define XFPD_XMPU_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07
+ */
+#define XFPD_XMPU_CFG_R07    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000017CUL )
+#define XFPD_XMPU_CFG_R07_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R07_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R07_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R07_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R07_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08Strt
+ */
+#define XFPD_XMPU_CFG_R08_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000180UL )
+#define XFPD_XMPU_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08End
+ */
+#define XFPD_XMPU_CFG_R08_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000184UL )
+#define XFPD_XMPU_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08Mstr
+ */
+#define XFPD_XMPU_CFG_R08_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000188UL )
+#define XFPD_XMPU_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08
+ */
+#define XFPD_XMPU_CFG_R08    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000018CUL )
+#define XFPD_XMPU_CFG_R08_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R08_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R08_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R08_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R08_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09Strt
+ */
+#define XFPD_XMPU_CFG_R09_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000190UL )
+#define XFPD_XMPU_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09End
+ */
+#define XFPD_XMPU_CFG_R09_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000194UL )
+#define XFPD_XMPU_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09Mstr
+ */
+#define XFPD_XMPU_CFG_R09_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000198UL )
+#define XFPD_XMPU_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09
+ */
+#define XFPD_XMPU_CFG_R09    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000019CUL )
+#define XFPD_XMPU_CFG_R09_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R09_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R09_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R09_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R09_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10Strt
+ */
+#define XFPD_XMPU_CFG_R10_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A0UL )
+#define XFPD_XMPU_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10End
+ */
+#define XFPD_XMPU_CFG_R10_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A4UL )
+#define XFPD_XMPU_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10Mstr
+ */
+#define XFPD_XMPU_CFG_R10_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A8UL )
+#define XFPD_XMPU_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10
+ */
+#define XFPD_XMPU_CFG_R10    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001ACUL )
+#define XFPD_XMPU_CFG_R10_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R10_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R10_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R10_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R10_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11Strt
+ */
+#define XFPD_XMPU_CFG_R11_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B0UL )
+#define XFPD_XMPU_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11End
+ */
+#define XFPD_XMPU_CFG_R11_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B4UL )
+#define XFPD_XMPU_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11Mstr
+ */
+#define XFPD_XMPU_CFG_R11_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B8UL )
+#define XFPD_XMPU_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11
+ */
+#define XFPD_XMPU_CFG_R11    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001BCUL )
+#define XFPD_XMPU_CFG_R11_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R11_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R11_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R11_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R11_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12Strt
+ */
+#define XFPD_XMPU_CFG_R12_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C0UL )
+#define XFPD_XMPU_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12End
+ */
+#define XFPD_XMPU_CFG_R12_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C4UL )
+#define XFPD_XMPU_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12Mstr
+ */
+#define XFPD_XMPU_CFG_R12_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C8UL )
+#define XFPD_XMPU_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12
+ */
+#define XFPD_XMPU_CFG_R12    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001CCUL )
+#define XFPD_XMPU_CFG_R12_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R12_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R12_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R12_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R12_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13Strt
+ */
+#define XFPD_XMPU_CFG_R13_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D0UL )
+#define XFPD_XMPU_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13End
+ */
+#define XFPD_XMPU_CFG_R13_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D4UL )
+#define XFPD_XMPU_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13Mstr
+ */
+#define XFPD_XMPU_CFG_R13_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D8UL )
+#define XFPD_XMPU_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13
+ */
+#define XFPD_XMPU_CFG_R13    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001DCUL )
+#define XFPD_XMPU_CFG_R13_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R13_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R13_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R13_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R13_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14Strt
+ */
+#define XFPD_XMPU_CFG_R14_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E0UL )
+#define XFPD_XMPU_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14End
+ */
+#define XFPD_XMPU_CFG_R14_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E4UL )
+#define XFPD_XMPU_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14Mstr
+ */
+#define XFPD_XMPU_CFG_R14_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E8UL )
+#define XFPD_XMPU_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14
+ */
+#define XFPD_XMPU_CFG_R14    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001ECUL )
+#define XFPD_XMPU_CFG_R14_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R14_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R14_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R14_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R14_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15Strt
+ */
+#define XFPD_XMPU_CFG_R15_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F0UL )
+#define XFPD_XMPU_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15End
+ */
+#define XFPD_XMPU_CFG_R15_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F4UL )
+#define XFPD_XMPU_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15Mstr
+ */
+#define XFPD_XMPU_CFG_R15_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F8UL )
+#define XFPD_XMPU_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15
+ */
+#define XFPD_XMPU_CFG_R15    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001FCUL )
+#define XFPD_XMPU_CFG_R15_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R15_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R15_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R15_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R15_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_XMPU_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_xmpu_sink.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_xmpu_sink.h
new file mode 100644
index 0000000..77e82c5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xfpd_xmpu_sink.h
@@ -0,0 +1,81 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_XMPU_SINK_H__
+#define __XFPD_XMPU_SINK_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdXmpuSink Base Address
+ */
+#define XFPD_XMPU_SINK_BASEADDR      0xFD4F0000UL
+
+/**
+ * Register: XfpdXmpuSinkErrSts
+ */
+#define XFPD_XMPU_SINK_ERR_STS    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF00UL )
+#define XFPD_XMPU_SINK_ERR_STS_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_SHIFT   31UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_WIDTH   1UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_MASK    0x80000000UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_DEFVAL  0x0UL
+
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_SHIFT   0UL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_WIDTH   12UL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_MASK    0x00000fffUL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkIsr
+ */
+#define XFPD_XMPU_SINK_ISR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF10UL )
+#define XFPD_XMPU_SINK_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkImr
+ */
+#define XFPD_XMPU_SINK_IMR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF14UL )
+#define XFPD_XMPU_SINK_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuSinkIer
+ */
+#define XFPD_XMPU_SINK_IER    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF18UL )
+#define XFPD_XMPU_SINK_IER_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_IERADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkIdr
+ */
+#define XFPD_XMPU_SINK_IDR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF1CUL )
+#define XFPD_XMPU_SINK_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_XMPU_SINK_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xiou_secure_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xiou_secure_slcr.h
new file mode 100644
index 0000000..98952f0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xiou_secure_slcr.h
@@ -0,0 +1,174 @@
+/* ### HEADER ### */
+
+#ifndef __XIOU_SECURE_SLCR_H__
+#define __XIOU_SECURE_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XiouSecureSlcr Base Address
+ */
+#define XIOU_SECURE_SLCR_BASEADDR      0xFF240000UL
+
+/**
+ * Register: XiouSecSlcrAxiWprtcn
+ */
+#define XIOU_SEC_SLCR_AXI_WPRTCN    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000000UL )
+#define XIOU_SEC_SLCR_AXI_WPRTCN_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_SHIFT   25UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_MASK    0x0e000000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_SHIFT   22UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_MASK    0x01c00000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_SHIFT   19UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_MASK    0x00380000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_SHIFT   16UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_MASK    0x00070000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   9UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000e00UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   6UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x000001c0UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000038UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   0UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000007UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrAxiRprtcn
+ */
+#define XIOU_SEC_SLCR_AXI_RPRTCN    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000004UL )
+#define XIOU_SEC_SLCR_AXI_RPRTCN_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_SHIFT   22UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_MASK    0x01c00000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_SHIFT   19UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_MASK    0x00380000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_SHIFT   16UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_MASK    0x00070000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   9UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000e00UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   6UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x000001c0UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000038UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   0UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000007UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrCtrl
+ */
+#define XIOU_SEC_SLCR_CTRL    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000040UL )
+#define XIOU_SEC_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrIsr
+ */
+#define XIOU_SEC_SLCR_ISR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000044UL )
+#define XIOU_SEC_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrImr
+ */
+#define XIOU_SEC_SLCR_IMR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000048UL )
+#define XIOU_SEC_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSecSlcrIer
+ */
+#define XIOU_SEC_SLCR_IER    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XIOU_SEC_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrIdr
+ */
+#define XIOU_SEC_SLCR_IDR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000050UL )
+#define XIOU_SEC_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrItr
+ */
+#define XIOU_SEC_SLCR_ITR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000054UL )
+#define XIOU_SEC_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XIOU_SECURE_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xiou_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xiou_slcr.h
new file mode 100644
index 0000000..b30914e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xiou_slcr.h
@@ -0,0 +1,4029 @@
+/* ### HEADER ### */
+
+#ifndef __XIOU_SLCR_H__
+#define __XIOU_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XiouSlcr Base Address
+ */
+#define XIOU_SLCR_BASEADDR      0xFF180000UL
+
+/**
+ * Register: XiouSlcrMioPin0
+ */
+#define XIOU_SLCR_MIO_PIN_0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000000UL )
+#define XIOU_SLCR_MIO_PIN_0_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin1
+ */
+#define XIOU_SLCR_MIO_PIN_1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000004UL )
+#define XIOU_SLCR_MIO_PIN_1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin2
+ */
+#define XIOU_SLCR_MIO_PIN_2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000008UL )
+#define XIOU_SLCR_MIO_PIN_2_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin3
+ */
+#define XIOU_SLCR_MIO_PIN_3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XIOU_SLCR_MIO_PIN_3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin4
+ */
+#define XIOU_SLCR_MIO_PIN_4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000010UL )
+#define XIOU_SLCR_MIO_PIN_4_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin5
+ */
+#define XIOU_SLCR_MIO_PIN_5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000014UL )
+#define XIOU_SLCR_MIO_PIN_5_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin6
+ */
+#define XIOU_SLCR_MIO_PIN_6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000018UL )
+#define XIOU_SLCR_MIO_PIN_6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin7
+ */
+#define XIOU_SLCR_MIO_PIN_7    ( ( XIOU_SLCR_BASEADDR ) + 0x0000001CUL )
+#define XIOU_SLCR_MIO_PIN_7_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin8
+ */
+#define XIOU_SLCR_MIO_PIN_8    ( ( XIOU_SLCR_BASEADDR ) + 0x00000020UL )
+#define XIOU_SLCR_MIO_PIN_8_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin9
+ */
+#define XIOU_SLCR_MIO_PIN_9    ( ( XIOU_SLCR_BASEADDR ) + 0x00000024UL )
+#define XIOU_SLCR_MIO_PIN_9_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin10
+ */
+#define XIOU_SLCR_MIO_PIN_10    ( ( XIOU_SLCR_BASEADDR ) + 0x00000028UL )
+#define XIOU_SLCR_MIO_PIN_10_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin11
+ */
+#define XIOU_SLCR_MIO_PIN_11    ( ( XIOU_SLCR_BASEADDR ) + 0x0000002CUL )
+#define XIOU_SLCR_MIO_PIN_11_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin12
+ */
+#define XIOU_SLCR_MIO_PIN_12    ( ( XIOU_SLCR_BASEADDR ) + 0x00000030UL )
+#define XIOU_SLCR_MIO_PIN_12_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin13
+ */
+#define XIOU_SLCR_MIO_PIN_13    ( ( XIOU_SLCR_BASEADDR ) + 0x00000034UL )
+#define XIOU_SLCR_MIO_PIN_13_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin14
+ */
+#define XIOU_SLCR_MIO_PIN_14    ( ( XIOU_SLCR_BASEADDR ) + 0x00000038UL )
+#define XIOU_SLCR_MIO_PIN_14_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin15
+ */
+#define XIOU_SLCR_MIO_PIN_15    ( ( XIOU_SLCR_BASEADDR ) + 0x0000003CUL )
+#define XIOU_SLCR_MIO_PIN_15_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin16
+ */
+#define XIOU_SLCR_MIO_PIN_16    ( ( XIOU_SLCR_BASEADDR ) + 0x00000040UL )
+#define XIOU_SLCR_MIO_PIN_16_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin17
+ */
+#define XIOU_SLCR_MIO_PIN_17    ( ( XIOU_SLCR_BASEADDR ) + 0x00000044UL )
+#define XIOU_SLCR_MIO_PIN_17_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin18
+ */
+#define XIOU_SLCR_MIO_PIN_18    ( ( XIOU_SLCR_BASEADDR ) + 0x00000048UL )
+#define XIOU_SLCR_MIO_PIN_18_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin19
+ */
+#define XIOU_SLCR_MIO_PIN_19    ( ( XIOU_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XIOU_SLCR_MIO_PIN_19_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin20
+ */
+#define XIOU_SLCR_MIO_PIN_20    ( ( XIOU_SLCR_BASEADDR ) + 0x00000050UL )
+#define XIOU_SLCR_MIO_PIN_20_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin21
+ */
+#define XIOU_SLCR_MIO_PIN_21    ( ( XIOU_SLCR_BASEADDR ) + 0x00000054UL )
+#define XIOU_SLCR_MIO_PIN_21_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin22
+ */
+#define XIOU_SLCR_MIO_PIN_22    ( ( XIOU_SLCR_BASEADDR ) + 0x00000058UL )
+#define XIOU_SLCR_MIO_PIN_22_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin23
+ */
+#define XIOU_SLCR_MIO_PIN_23    ( ( XIOU_SLCR_BASEADDR ) + 0x0000005CUL )
+#define XIOU_SLCR_MIO_PIN_23_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin24
+ */
+#define XIOU_SLCR_MIO_PIN_24    ( ( XIOU_SLCR_BASEADDR ) + 0x00000060UL )
+#define XIOU_SLCR_MIO_PIN_24_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin25
+ */
+#define XIOU_SLCR_MIO_PIN_25    ( ( XIOU_SLCR_BASEADDR ) + 0x00000064UL )
+#define XIOU_SLCR_MIO_PIN_25_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin26
+ */
+#define XIOU_SLCR_MIO_PIN_26    ( ( XIOU_SLCR_BASEADDR ) + 0x00000068UL )
+#define XIOU_SLCR_MIO_PIN_26_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin27
+ */
+#define XIOU_SLCR_MIO_PIN_27    ( ( XIOU_SLCR_BASEADDR ) + 0x0000006CUL )
+#define XIOU_SLCR_MIO_PIN_27_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin28
+ */
+#define XIOU_SLCR_MIO_PIN_28    ( ( XIOU_SLCR_BASEADDR ) + 0x00000070UL )
+#define XIOU_SLCR_MIO_PIN_28_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin29
+ */
+#define XIOU_SLCR_MIO_PIN_29    ( ( XIOU_SLCR_BASEADDR ) + 0x00000074UL )
+#define XIOU_SLCR_MIO_PIN_29_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin30
+ */
+#define XIOU_SLCR_MIO_PIN_30    ( ( XIOU_SLCR_BASEADDR ) + 0x00000078UL )
+#define XIOU_SLCR_MIO_PIN_30_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin31
+ */
+#define XIOU_SLCR_MIO_PIN_31    ( ( XIOU_SLCR_BASEADDR ) + 0x0000007CUL )
+#define XIOU_SLCR_MIO_PIN_31_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin32
+ */
+#define XIOU_SLCR_MIO_PIN_32    ( ( XIOU_SLCR_BASEADDR ) + 0x00000080UL )
+#define XIOU_SLCR_MIO_PIN_32_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin33
+ */
+#define XIOU_SLCR_MIO_PIN_33    ( ( XIOU_SLCR_BASEADDR ) + 0x00000084UL )
+#define XIOU_SLCR_MIO_PIN_33_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin34
+ */
+#define XIOU_SLCR_MIO_PIN_34    ( ( XIOU_SLCR_BASEADDR ) + 0x00000088UL )
+#define XIOU_SLCR_MIO_PIN_34_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin35
+ */
+#define XIOU_SLCR_MIO_PIN_35    ( ( XIOU_SLCR_BASEADDR ) + 0x0000008CUL )
+#define XIOU_SLCR_MIO_PIN_35_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin36
+ */
+#define XIOU_SLCR_MIO_PIN_36    ( ( XIOU_SLCR_BASEADDR ) + 0x00000090UL )
+#define XIOU_SLCR_MIO_PIN_36_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin37
+ */
+#define XIOU_SLCR_MIO_PIN_37    ( ( XIOU_SLCR_BASEADDR ) + 0x00000094UL )
+#define XIOU_SLCR_MIO_PIN_37_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin38
+ */
+#define XIOU_SLCR_MIO_PIN_38    ( ( XIOU_SLCR_BASEADDR ) + 0x00000098UL )
+#define XIOU_SLCR_MIO_PIN_38_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin39
+ */
+#define XIOU_SLCR_MIO_PIN_39    ( ( XIOU_SLCR_BASEADDR ) + 0x0000009CUL )
+#define XIOU_SLCR_MIO_PIN_39_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin40
+ */
+#define XIOU_SLCR_MIO_PIN_40    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A0UL )
+#define XIOU_SLCR_MIO_PIN_40_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin41
+ */
+#define XIOU_SLCR_MIO_PIN_41    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A4UL )
+#define XIOU_SLCR_MIO_PIN_41_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin42
+ */
+#define XIOU_SLCR_MIO_PIN_42    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A8UL )
+#define XIOU_SLCR_MIO_PIN_42_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin43
+ */
+#define XIOU_SLCR_MIO_PIN_43    ( ( XIOU_SLCR_BASEADDR ) + 0x000000ACUL )
+#define XIOU_SLCR_MIO_PIN_43_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin44
+ */
+#define XIOU_SLCR_MIO_PIN_44    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B0UL )
+#define XIOU_SLCR_MIO_PIN_44_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin45
+ */
+#define XIOU_SLCR_MIO_PIN_45    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B4UL )
+#define XIOU_SLCR_MIO_PIN_45_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin46
+ */
+#define XIOU_SLCR_MIO_PIN_46    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B8UL )
+#define XIOU_SLCR_MIO_PIN_46_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin47
+ */
+#define XIOU_SLCR_MIO_PIN_47    ( ( XIOU_SLCR_BASEADDR ) + 0x000000BCUL )
+#define XIOU_SLCR_MIO_PIN_47_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin48
+ */
+#define XIOU_SLCR_MIO_PIN_48    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C0UL )
+#define XIOU_SLCR_MIO_PIN_48_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin49
+ */
+#define XIOU_SLCR_MIO_PIN_49    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C4UL )
+#define XIOU_SLCR_MIO_PIN_49_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin50
+ */
+#define XIOU_SLCR_MIO_PIN_50    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C8UL )
+#define XIOU_SLCR_MIO_PIN_50_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin51
+ */
+#define XIOU_SLCR_MIO_PIN_51    ( ( XIOU_SLCR_BASEADDR ) + 0x000000CCUL )
+#define XIOU_SLCR_MIO_PIN_51_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin52
+ */
+#define XIOU_SLCR_MIO_PIN_52    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D0UL )
+#define XIOU_SLCR_MIO_PIN_52_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin53
+ */
+#define XIOU_SLCR_MIO_PIN_53    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D4UL )
+#define XIOU_SLCR_MIO_PIN_53_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin54
+ */
+#define XIOU_SLCR_MIO_PIN_54    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D8UL )
+#define XIOU_SLCR_MIO_PIN_54_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin55
+ */
+#define XIOU_SLCR_MIO_PIN_55    ( ( XIOU_SLCR_BASEADDR ) + 0x000000DCUL )
+#define XIOU_SLCR_MIO_PIN_55_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin56
+ */
+#define XIOU_SLCR_MIO_PIN_56    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E0UL )
+#define XIOU_SLCR_MIO_PIN_56_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin57
+ */
+#define XIOU_SLCR_MIO_PIN_57    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E4UL )
+#define XIOU_SLCR_MIO_PIN_57_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin58
+ */
+#define XIOU_SLCR_MIO_PIN_58    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E8UL )
+#define XIOU_SLCR_MIO_PIN_58_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin59
+ */
+#define XIOU_SLCR_MIO_PIN_59    ( ( XIOU_SLCR_BASEADDR ) + 0x000000ECUL )
+#define XIOU_SLCR_MIO_PIN_59_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin60
+ */
+#define XIOU_SLCR_MIO_PIN_60    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F0UL )
+#define XIOU_SLCR_MIO_PIN_60_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin61
+ */
+#define XIOU_SLCR_MIO_PIN_61    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F4UL )
+#define XIOU_SLCR_MIO_PIN_61_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin62
+ */
+#define XIOU_SLCR_MIO_PIN_62    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F8UL )
+#define XIOU_SLCR_MIO_PIN_62_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin63
+ */
+#define XIOU_SLCR_MIO_PIN_63    ( ( XIOU_SLCR_BASEADDR ) + 0x000000FCUL )
+#define XIOU_SLCR_MIO_PIN_63_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin64
+ */
+#define XIOU_SLCR_MIO_PIN_64    ( ( XIOU_SLCR_BASEADDR ) + 0x00000100UL )
+#define XIOU_SLCR_MIO_PIN_64_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin65
+ */
+#define XIOU_SLCR_MIO_PIN_65    ( ( XIOU_SLCR_BASEADDR ) + 0x00000104UL )
+#define XIOU_SLCR_MIO_PIN_65_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin66
+ */
+#define XIOU_SLCR_MIO_PIN_66    ( ( XIOU_SLCR_BASEADDR ) + 0x00000108UL )
+#define XIOU_SLCR_MIO_PIN_66_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin67
+ */
+#define XIOU_SLCR_MIO_PIN_67    ( ( XIOU_SLCR_BASEADDR ) + 0x0000010CUL )
+#define XIOU_SLCR_MIO_PIN_67_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin68
+ */
+#define XIOU_SLCR_MIO_PIN_68    ( ( XIOU_SLCR_BASEADDR ) + 0x00000110UL )
+#define XIOU_SLCR_MIO_PIN_68_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin69
+ */
+#define XIOU_SLCR_MIO_PIN_69    ( ( XIOU_SLCR_BASEADDR ) + 0x00000114UL )
+#define XIOU_SLCR_MIO_PIN_69_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin70
+ */
+#define XIOU_SLCR_MIO_PIN_70    ( ( XIOU_SLCR_BASEADDR ) + 0x00000118UL )
+#define XIOU_SLCR_MIO_PIN_70_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin71
+ */
+#define XIOU_SLCR_MIO_PIN_71    ( ( XIOU_SLCR_BASEADDR ) + 0x0000011CUL )
+#define XIOU_SLCR_MIO_PIN_71_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin72
+ */
+#define XIOU_SLCR_MIO_PIN_72    ( ( XIOU_SLCR_BASEADDR ) + 0x00000120UL )
+#define XIOU_SLCR_MIO_PIN_72_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin73
+ */
+#define XIOU_SLCR_MIO_PIN_73    ( ( XIOU_SLCR_BASEADDR ) + 0x00000124UL )
+#define XIOU_SLCR_MIO_PIN_73_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin74
+ */
+#define XIOU_SLCR_MIO_PIN_74    ( ( XIOU_SLCR_BASEADDR ) + 0x00000128UL )
+#define XIOU_SLCR_MIO_PIN_74_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin75
+ */
+#define XIOU_SLCR_MIO_PIN_75    ( ( XIOU_SLCR_BASEADDR ) + 0x0000012CUL )
+#define XIOU_SLCR_MIO_PIN_75_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin76
+ */
+#define XIOU_SLCR_MIO_PIN_76    ( ( XIOU_SLCR_BASEADDR ) + 0x00000130UL )
+#define XIOU_SLCR_MIO_PIN_76_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin77
+ */
+#define XIOU_SLCR_MIO_PIN_77    ( ( XIOU_SLCR_BASEADDR ) + 0x00000134UL )
+#define XIOU_SLCR_MIO_PIN_77_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl0
+ */
+#define XIOU_SLCR_BANK0_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000138UL )
+#define XIOU_SLCR_BANK0_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl1
+ */
+#define XIOU_SLCR_BANK0_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000013CUL )
+#define XIOU_SLCR_BANK0_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl3
+ */
+#define XIOU_SLCR_BANK0_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000140UL )
+#define XIOU_SLCR_BANK0_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl4
+ */
+#define XIOU_SLCR_BANK0_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000144UL )
+#define XIOU_SLCR_BANK0_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl5
+ */
+#define XIOU_SLCR_BANK0_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000148UL )
+#define XIOU_SLCR_BANK0_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl6
+ */
+#define XIOU_SLCR_BANK0_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x0000014CUL )
+#define XIOU_SLCR_BANK0_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Sts
+ */
+#define XIOU_SLCR_BANK0_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000150UL )
+#define XIOU_SLCR_BANK0_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl0
+ */
+#define XIOU_SLCR_BANK1_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000154UL )
+#define XIOU_SLCR_BANK1_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl1
+ */
+#define XIOU_SLCR_BANK1_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000158UL )
+#define XIOU_SLCR_BANK1_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl3
+ */
+#define XIOU_SLCR_BANK1_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000015CUL )
+#define XIOU_SLCR_BANK1_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl4
+ */
+#define XIOU_SLCR_BANK1_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000160UL )
+#define XIOU_SLCR_BANK1_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl5
+ */
+#define XIOU_SLCR_BANK1_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000164UL )
+#define XIOU_SLCR_BANK1_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl6
+ */
+#define XIOU_SLCR_BANK1_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000168UL )
+#define XIOU_SLCR_BANK1_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Sts
+ */
+#define XIOU_SLCR_BANK1_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x0000016CUL )
+#define XIOU_SLCR_BANK1_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl0
+ */
+#define XIOU_SLCR_BANK2_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000170UL )
+#define XIOU_SLCR_BANK2_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl1
+ */
+#define XIOU_SLCR_BANK2_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000174UL )
+#define XIOU_SLCR_BANK2_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl3
+ */
+#define XIOU_SLCR_BANK2_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000178UL )
+#define XIOU_SLCR_BANK2_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl4
+ */
+#define XIOU_SLCR_BANK2_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x0000017CUL )
+#define XIOU_SLCR_BANK2_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl5
+ */
+#define XIOU_SLCR_BANK2_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000180UL )
+#define XIOU_SLCR_BANK2_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl6
+ */
+#define XIOU_SLCR_BANK2_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000184UL )
+#define XIOU_SLCR_BANK2_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Sts
+ */
+#define XIOU_SLCR_BANK2_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000188UL )
+#define XIOU_SLCR_BANK2_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioLpbck
+ */
+#define XIOU_SLCR_MIO_LPBCK    ( ( XIOU_SLCR_BASEADDR ) + 0x00000200UL )
+#define XIOU_SLCR_MIO_LPBCK_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_SHIFT   3UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_SHIFT   2UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_SHIFT   1UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_SHIFT   0UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioMstTri0
+ */
+#define XIOU_SLCR_MIO_MST_TRI0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000204UL )
+#define XIOU_SLCR_MIO_MST_TRI0_RSTVAL   0xffffffffUL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_SHIFT   31UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_MASK    0x80000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_SHIFT   30UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_MASK    0x40000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_SHIFT   29UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_MASK    0x20000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_SHIFT   28UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_MASK    0x10000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_SHIFT   27UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_MASK    0x08000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_SHIFT   26UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_MASK    0x04000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_SHIFT   25UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_MASK    0x02000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_SHIFT   24UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_MASK    0x01000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_SHIFT   23UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_MASK    0x00800000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_SHIFT   22UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_MASK    0x00400000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_SHIFT   21UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_MASK    0x00200000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_SHIFT   20UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_MASK    0x00100000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_SHIFT   19UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_MASK    0x00080000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_SHIFT   18UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_MASK    0x00040000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_SHIFT   17UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_MASK    0x00020000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_SHIFT   16UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_MASK    0x00010000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_SHIFT   15UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_MASK    0x00008000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_SHIFT   14UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_MASK    0x00004000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrMioMstTri1
+ */
+#define XIOU_SLCR_MIO_MST_TRI1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000208UL )
+#define XIOU_SLCR_MIO_MST_TRI1_RSTVAL   0xffffffffUL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_SHIFT   31UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_MASK    0x80000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_SHIFT   30UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_MASK    0x40000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_SHIFT   29UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_MASK    0x20000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_SHIFT   28UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_MASK    0x10000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_SHIFT   27UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_MASK    0x08000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_SHIFT   26UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_MASK    0x04000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_SHIFT   25UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_MASK    0x02000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_SHIFT   24UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_MASK    0x01000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_SHIFT   23UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_MASK    0x00800000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_SHIFT   22UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_MASK    0x00400000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_SHIFT   21UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_MASK    0x00200000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_SHIFT   20UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_MASK    0x00100000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_SHIFT   19UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_MASK    0x00080000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_SHIFT   18UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_MASK    0x00040000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_SHIFT   17UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_MASK    0x00020000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_SHIFT   16UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_MASK    0x00010000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_SHIFT   15UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_MASK    0x00008000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_SHIFT   14UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_MASK    0x00004000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrMioMstTri2
+ */
+#define XIOU_SLCR_MIO_MST_TRI2    ( ( XIOU_SLCR_BASEADDR ) + 0x0000020CUL )
+#define XIOU_SLCR_MIO_MST_TRI2_RSTVAL   0x00003fffUL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrWdtClkSel
+ */
+#define XIOU_SLCR_WDT_CLK_SEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000300UL )
+#define XIOU_SLCR_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_WDT_CLK_SEL_SHIFT   0UL
+#define XIOU_SLCR_WDT_CLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_WDT_CLK_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrCanMioCtrl
+ */
+#define XIOU_SLCR_CAN_MIO_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000304UL )
+#define XIOU_SLCR_CAN_MIO_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_SHIFT   23UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_MASK    0x00800000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_SHIFT   22UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_MASK    0x00400000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_SHIFT   15UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_WIDTH   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_MASK    0x003f8000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_SHIFT   8UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_MASK    0x00000100UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_SHIFT   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_MASK    0x00000080UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_SHIFT   0UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_WIDTH   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_MASK    0x0000007fUL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrGemClkCtrl
+ */
+#define XIOU_SLCR_GEM_CLK_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000308UL )
+#define XIOU_SLCR_GEM_CLK_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_SHIFT   22UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_MASK    0x00400000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_SHIFT   20UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_WIDTH   2UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_MASK    0x00300000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   18UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00040000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   17UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00020000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   16UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00010000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   15UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00008000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   13UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00002000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   12UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00001000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   11UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000800UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   10UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000400UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   8UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00000100UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   7UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00000080UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   6UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000040UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   5UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000020UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   3UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00000008UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   2UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00000004UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   0UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdioClkCtrl
+ */
+#define XIOU_SLCR_SDIO_CLK_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x0000030CUL )
+#define XIOU_SLCR_SDIO_CLK_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_SHIFT   18UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_MASK    0x00040000UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_SHIFT   17UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_MASK    0x00020000UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_SHIFT   2UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_SHIFT   0UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_WIDTH   2UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_MASK    0x00000003UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrCtrlRegSd
+ */
+#define XIOU_SLCR_CTRL_REG_SD    ( ( XIOU_SLCR_BASEADDR ) + 0x00000310UL )
+#define XIOU_SLCR_CTRL_REG_SD_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_SHIFT   15UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_WIDTH   1UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_MASK    0x00008000UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_SHIFT   0UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_WIDTH   1UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdItapdly
+ */
+#define XIOU_SLCR_SD_ITAPDLY    ( ( XIOU_SLCR_BASEADDR ) + 0x00000314UL )
+#define XIOU_SLCR_SD_ITAPDLY_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_SHIFT   25UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_MASK    0x02000000UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_SHIFT   24UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_MASK    0x01000000UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_SHIFT   16UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_WIDTH   8UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_SHIFT   9UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_MASK    0x00000200UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_SHIFT   8UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_MASK    0x00000100UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_SHIFT   0UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_WIDTH   8UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdOtapdlysel
+ */
+#define XIOU_SLCR_SD_OTAPDLYSEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000318UL )
+#define XIOU_SLCR_SD_OTAPDLYSEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_SHIFT   22UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_MASK    0x00400000UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_WIDTH   6UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_MASK    0x003f0000UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_SHIFT   6UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_MASK    0x00000040UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_WIDTH   6UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_MASK    0x0000003fUL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg1
+ */
+#define XIOU_SLCR_SD_CFG_REG1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000031CUL )
+#define XIOU_SLCR_SD_CFG_REG1_RSTVAL   0x32403240UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_SHIFT   23UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_WIDTH   8UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_MASK    0x7f800000UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_DEFVAL  0x64UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_SHIFT   17UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_WIDTH   6UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_MASK    0x007e0000UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_DEFVAL  0x20UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_SHIFT   16UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_MASK    0x00010000UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_SHIFT   7UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_WIDTH   8UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_MASK    0x00007f80UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_DEFVAL  0x64UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_SHIFT   1UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_WIDTH   6UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_MASK    0x0000007eUL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_DEFVAL  0x20UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_SHIFT   0UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_MASK    0x00000001UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg2
+ */
+#define XIOU_SLCR_SD_CFG_REG2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000320UL )
+#define XIOU_SLCR_SD_CFG_REG2_RSTVAL   0x0ffc0ffcUL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_SHIFT   28UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_MASK    0x30000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_SHIFT   27UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_MASK    0x08000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_SHIFT   26UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_MASK    0x04000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_SHIFT   25UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_MASK    0x02000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_SHIFT   24UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_MASK    0x01000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_SHIFT   23UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_MASK    0x00800000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_SHIFT   22UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_MASK    0x00400000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_SHIFT   21UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_MASK    0x00200000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_SHIFT   20UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_MASK    0x00100000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_SHIFT   19UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_MASK    0x00080000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_SHIFT   18UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_MASK    0x00040000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_SHIFT   16UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_MASK    0x00030000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_SHIFT   12UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_MASK    0x00003000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_SHIFT   11UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_MASK    0x00000800UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_SHIFT   10UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_MASK    0x00000400UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_SHIFT   9UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_MASK    0x00000200UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_SHIFT   8UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_MASK    0x00000100UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_SHIFT   7UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_MASK    0x00000080UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_SHIFT   6UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_MASK    0x00000040UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_SHIFT   5UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_MASK    0x00000020UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_SHIFT   4UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_MASK    0x00000010UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_SHIFT   3UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_MASK    0x00000008UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_SHIFT   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_MASK    0x00000004UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_SHIFT   0UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_MASK    0x00000003UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg3
+ */
+#define XIOU_SLCR_SD_CFG_REG3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000324UL )
+#define XIOU_SLCR_SD_CFG_REG3_RSTVAL   0x06070607UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_SHIFT   26UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_MASK    0x04000000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_SHIFT   22UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_WIDTH   4UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_MASK    0x03c00000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_DEFVAL  0x8UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_SHIFT   21UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_MASK    0x00200000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_SHIFT   20UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_MASK    0x00100000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_SHIFT   19UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_MASK    0x00080000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_SHIFT   18UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_MASK    0x00040000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_SHIFT   17UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_MASK    0x00020000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_SHIFT   16UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_MASK    0x00010000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_SHIFT   10UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_MASK    0x00000400UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_SHIFT   6UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_WIDTH   4UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_MASK    0x000003c0UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_DEFVAL  0x8UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_SHIFT   5UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_MASK    0x00000020UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_SHIFT   4UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_MASK    0x00000010UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_SHIFT   3UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_MASK    0x00000008UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_SHIFT   2UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_MASK    0x00000004UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_SHIFT   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_MASK    0x00000002UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_SHIFT   0UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_MASK    0x00000001UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrSdInitpreset
+ */
+#define XIOU_SLCR_SD_INITPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000328UL )
+#define XIOU_SLCR_SD_INITPRESET_RSTVAL   0x01000100UL
+
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_DEFVAL  0x100UL
+
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_DEFVAL  0x100UL
+
+/**
+ * Register: XiouSlcrSdDsppreset
+ */
+#define XIOU_SLCR_SD_DSPPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x0000032CUL )
+#define XIOU_SLCR_SD_DSPPRESET_RSTVAL   0x00040004UL
+
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_DEFVAL  0x4UL
+
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_DEFVAL  0x4UL
+
+/**
+ * Register: XiouSlcrSdHspdpreset
+ */
+#define XIOU_SLCR_SD_HSPDPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000330UL )
+#define XIOU_SLCR_SD_HSPDPRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdSdr12preset
+ */
+#define XIOU_SLCR_SD_SDR12PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000334UL )
+#define XIOU_SLCR_SD_SDR12PRESET_RSTVAL   0x00040004UL
+
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_DEFVAL  0x4UL
+
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_DEFVAL  0x4UL
+
+/**
+ * Register: XiouSlcrSdSdr25preset
+ */
+#define XIOU_SLCR_SD_SDR25PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000338UL )
+#define XIOU_SLCR_SD_SDR25PRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdSdr50prset
+ */
+#define XIOU_SLCR_SD_SDR50PRSET    ( ( XIOU_SLCR_BASEADDR ) + 0x0000033CUL )
+#define XIOU_SLCR_SD_SDR50PRSET_RSTVAL   0x00010001UL
+
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrSdSdr104prst
+ */
+#define XIOU_SLCR_SD_SDR104PRST    ( ( XIOU_SLCR_BASEADDR ) + 0x00000340UL )
+#define XIOU_SLCR_SD_SDR104PRST_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdDdr50preset
+ */
+#define XIOU_SLCR_SD_DDR50PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000344UL )
+#define XIOU_SLCR_SD_DDR50PRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdMaxcur1p8
+ */
+#define XIOU_SLCR_SD_MAXCUR1P8    ( ( XIOU_SLCR_BASEADDR ) + 0x0000034CUL )
+#define XIOU_SLCR_SD_MAXCUR1P8_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdMaxcur3p0
+ */
+#define XIOU_SLCR_SD_MAXCUR3P0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000350UL )
+#define XIOU_SLCR_SD_MAXCUR3P0_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdMaxcur3p3
+ */
+#define XIOU_SLCR_SD_MAXCUR3P3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000354UL )
+#define XIOU_SLCR_SD_MAXCUR3P3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdDllCtrl
+ */
+#define XIOU_SLCR_SD_DLL_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000358UL )
+#define XIOU_SLCR_SD_DLL_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_SHIFT   18UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_MASK    0x00040000UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_SHIFT   17UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_MASK    0x00020000UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_SHIFT   16UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_MASK    0x00010000UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_SHIFT   2UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_MASK    0x00000004UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_SHIFT   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_MASK    0x00000002UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_SHIFT   0UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_MASK    0x00000001UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCdnCtrl
+ */
+#define XIOU_SLCR_SD_CDN_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x0000035CUL )
+#define XIOU_SLCR_SD_CDN_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_MASK    0x00010000UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_MASK    0x00000001UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrGemCtrl
+ */
+#define XIOU_SLCR_GEM_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000360UL )
+#define XIOU_SLCR_GEM_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   6UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x000000c0UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   4UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x00000030UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x0000000cUL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   0UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x00000003UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrTtcApbClk
+ */
+#define XIOU_SLCR_TTC_APB_CLK    ( ( XIOU_SLCR_BASEADDR ) + 0x00000380UL )
+#define XIOU_SLCR_TTC_APB_CLK_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_SHIFT   6UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_MASK    0x000000c0UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_SHIFT   4UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_MASK    0x00000030UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_SHIFT   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_MASK    0x0000000cUL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_SHIFT   0UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_MASK    0x00000003UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrTapdlyBypass
+ */
+#define XIOU_SLCR_TAPDLY_BYPASS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000390UL )
+#define XIOU_SLCR_TAPDLY_BYPASS_RSTVAL   0x00000007UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_SHIFT   2UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_MASK    0x00000004UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_DEFVAL  0x1UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_SHIFT   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_MASK    0x00000002UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_SHIFT   0UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_MASK    0x00000001UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrCoherentCtrl
+ */
+#define XIOU_SLCR_COHERENT_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000400UL )
+#define XIOU_SLCR_COHERENT_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_SHIFT   28UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_MASK    0xf0000000UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_SHIFT   24UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_MASK    0x0f000000UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_SHIFT   20UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_MASK    0x00f00000UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_SHIFT   16UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_MASK    0x000f0000UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   12UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x0000f000UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   8UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x00000f00UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x000000f0UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   0UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x0000000fUL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrVideoPssClkSel
+ */
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000404UL )
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_SHIFT   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_WIDTH   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_MASK    0x00000002UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_DEFVAL  0x0UL
+
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_SHIFT   0UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrInterconnectRoute
+ */
+#define XIOU_SLCR_INTERCONNECT_ROUTE    ( ( XIOU_SLCR_BASEADDR ) + 0x00000408UL )
+#define XIOU_SLCR_INTERCONNECT_ROUTE_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_SHIFT   7UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_MASK    0x00000080UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_SHIFT   6UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_MASK    0x00000040UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_SHIFT   5UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_MASK    0x00000020UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_SHIFT   4UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_MASK    0x00000010UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   3UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000008UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   2UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000004UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000002UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   0UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000001UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000500UL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000504UL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000508UL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x0000050CUL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXsdps
+ */
+#define XIOU_SLCR_RAM_XSDPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000510UL )
+#define XIOU_SLCR_RAM_XSDPS_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXsdps
+ */
+#define XIOU_SLCR_RAM_XSDPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000514UL )
+#define XIOU_SLCR_RAM_XSDPS_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamCan0
+ */
+#define XIOU_SLCR_RAM_CAN0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000518UL )
+#define XIOU_SLCR_RAM_CAN0_RSTVAL   0x005b5b5bUL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA2_SHIFT   22UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_MASK    0x00400000UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB2_SHIFT   19UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_MASK    0x00380000UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA2_SHIFT   16UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_MASK    0x00070000UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamCan1
+ */
+#define XIOU_SLCR_RAM_CAN1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000051CUL )
+#define XIOU_SLCR_RAM_CAN1_RSTVAL   0x005b5b5bUL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA2_SHIFT   22UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_MASK    0x00400000UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB2_SHIFT   19UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_MASK    0x00380000UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA2_SHIFT   16UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_MASK    0x00070000UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamLqspi
+ */
+#define XIOU_SLCR_RAM_LQSPI    ( ( XIOU_SLCR_BASEADDR ) + 0x00000520UL )
+#define XIOU_SLCR_RAM_LQSPI_RSTVAL   0x00002ddbUL
+
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_SHIFT   13UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_MASK    0x00002000UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_SHIFT   10UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_MASK    0x00001c00UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_SHIFT   7UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_MASK    0x00000380UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXnandps8
+ */
+#define XIOU_SLCR_RAM_XNANDPS8    ( ( XIOU_SLCR_BASEADDR ) + 0x00000524UL )
+#define XIOU_SLCR_RAM_XNANDPS8_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrCtrl
+ */
+#define XIOU_SLCR_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000600UL )
+#define XIOU_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrIsr
+ */
+#define XIOU_SLCR_ISR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000700UL )
+#define XIOU_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrImr
+ */
+#define XIOU_SLCR_IMR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000704UL )
+#define XIOU_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrIer
+ */
+#define XIOU_SLCR_IER    ( ( XIOU_SLCR_BASEADDR ) + 0x00000708UL )
+#define XIOU_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrIdr
+ */
+#define XIOU_SLCR_IDR    ( ( XIOU_SLCR_BASEADDR ) + 0x0000070CUL )
+#define XIOU_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrItr
+ */
+#define XIOU_SLCR_ITR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000710UL )
+#define XIOU_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XIOU_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_slcr.h
new file mode 100644
index 0000000..d50b578
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_slcr.h
@@ -0,0 +1,5667 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_SLCR_H__
+#define __XLPD_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdSlcr Base Address
+ */
+#define XLPD_SLCR_BASEADDR      0xFF410000UL
+
+/**
+ * Register: XlpdSlcrWprot0
+ */
+#define XLPD_SLCR_WPROT0    ( ( XLPD_SLCR_BASEADDR ) + 0x00000000UL )
+#define XLPD_SLCR_WPROT0_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_WPROT0_ACT_SHIFT   0UL
+#define XLPD_SLCR_WPROT0_ACT_WIDTH   1UL
+#define XLPD_SLCR_WPROT0_ACT_MASK    0x00000001UL
+#define XLPD_SLCR_WPROT0_ACT_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrCtrl
+ */
+#define XLPD_SLCR_CTRL    ( ( XLPD_SLCR_BASEADDR ) + 0x00000004UL )
+#define XLPD_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsr
+ */
+#define XLPD_SLCR_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000008UL )
+#define XLPD_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrImr
+ */
+#define XLPD_SLCR_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XLPD_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIer
+ */
+#define XLPD_SLCR_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00000010UL )
+#define XLPD_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIdr
+ */
+#define XLPD_SLCR_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000014UL )
+#define XLPD_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrItr
+ */
+#define XLPD_SLCR_ITR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000018UL )
+#define XLPD_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk0
+ */
+#define XLPD_SLCR_SAFETY_CHK0    ( ( XLPD_SLCR_BASEADDR ) + 0x00000040UL )
+#define XLPD_SLCR_SAFETY_CHK0_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK0_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk1
+ */
+#define XLPD_SLCR_SAFETY_CHK1    ( ( XLPD_SLCR_BASEADDR ) + 0x00000044UL )
+#define XLPD_SLCR_SAFETY_CHK1_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK1_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk2
+ */
+#define XLPD_SLCR_SAFETY_CHK2    ( ( XLPD_SLCR_BASEADDR ) + 0x00000048UL )
+#define XLPD_SLCR_SAFETY_CHK2_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK2_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk3
+ */
+#define XLPD_SLCR_SAFETY_CHK3    ( ( XLPD_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XLPD_SLCR_SAFETY_CHK3_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK3_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrXcsupmuWdtClkSel
+ */
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL    ( ( XLPD_SLCR_BASEADDR ) + 0x00000050UL )
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_SHIFT   0UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_WIDTH   1UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_MASK    0x00000001UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAdmaCfg
+ */
+#define XLPD_SLCR_ADMA_CFG    ( ( XLPD_SLCR_BASEADDR ) + 0x0000200CUL )
+#define XLPD_SLCR_ADMA_CFG_RSTVAL   0x00000028UL
+
+#define XLPD_SLCR_ADMA_CFG_BUSWID_SHIFT   5UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_WIDTH   2UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_MASK    0x00000060UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_SHIFT   0UL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_WIDTH   5UL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_MASK    0x0000001fUL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_DEFVAL  0x8UL
+
+/**
+ * Register: XlpdSlcrAdmaRam
+ */
+#define XLPD_SLCR_ADMA_RAM    ( ( XLPD_SLCR_BASEADDR ) + 0x00002010UL )
+#define XLPD_SLCR_ADMA_RAM_RSTVAL   0x00003b3bUL
+
+#define XLPD_SLCR_ADMA_RAM1_EMAB_SHIFT   12UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_MASK    0x00007000UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM1_EMASA_SHIFT   11UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_WIDTH   1UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_MASK    0x00000800UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_RAM1_EMAA_SHIFT   8UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_MASK    0x00000700UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMAB_SHIFT   4UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_MASK    0x00000070UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMASA_SHIFT   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_WIDTH   1UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_MASK    0x00000008UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMAA_SHIFT   0UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_MASK    0x00000007UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIsr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003000UL )
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiImr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003008UL )
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RSTVAL   0x1dcf000fUL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIer
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00003010UL )
+#define XLPD_SLCR_ERR_AIBAXI_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIdr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003018UL )
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIsr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003020UL )
+#define XLPD_SLCR_ERR_AIBAPB_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbImr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003024UL )
+#define XLPD_SLCR_ERR_AIBAPB_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIer
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00003028UL )
+#define XLPD_SLCR_ERR_AIBAPB_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIdr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000302CUL )
+#define XLPD_SLCR_ERR_AIBAPB_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiReq
+ */
+#define XLPD_SLCR_ISO_AIBAXI_REQ    ( ( XLPD_SLCR_BASEADDR ) + 0x00003030UL )
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiType
+ */
+#define XLPD_SLCR_ISO_AIBAXI_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x00003038UL )
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RSTVAL   0x19cf000fUL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiAck
+ */
+#define XLPD_SLCR_ISO_AIBAXI_ACK    ( ( XLPD_SLCR_BASEADDR ) + 0x00003040UL )
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbReq
+ */
+#define XLPD_SLCR_ISO_AIBAPB_REQ    ( ( XLPD_SLCR_BASEADDR ) + 0x00003048UL )
+#define XLPD_SLCR_ISO_AIBAPB_REQ_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbType
+ */
+#define XLPD_SLCR_ISO_AIBAPB_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x0000304CUL )
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbAck
+ */
+#define XLPD_SLCR_ISO_AIBAPB_ACK    ( ( XLPD_SLCR_BASEADDR ) + 0x00003050UL )
+#define XLPD_SLCR_ISO_AIBAPB_ACK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbIsr
+ */
+#define XLPD_SLCR_ERR_ATB_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00006000UL )
+#define XLPD_SLCR_ERR_ATB_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbImr
+ */
+#define XLPD_SLCR_ERR_ATB_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00006004UL )
+#define XLPD_SLCR_ERR_ATB_IMR_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAtbIer
+ */
+#define XLPD_SLCR_ERR_ATB_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00006008UL )
+#define XLPD_SLCR_ERR_ATB_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbIdr
+ */
+#define XLPD_SLCR_ERR_ATB_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000600CUL )
+#define XLPD_SLCR_ERR_ATB_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAtbCmdStoreEn
+ */
+#define XLPD_SLCR_ATB_CMD_STORE_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00006010UL )
+#define XLPD_SLCR_ATB_CMD_STORE_EN_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrAtbRespEn
+ */
+#define XLPD_SLCR_ATB_RESP_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00006014UL )
+#define XLPD_SLCR_ATB_RESP_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAtbRespType
+ */
+#define XLPD_SLCR_ATB_RESP_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x00006018UL )
+#define XLPD_SLCR_ATB_RESP_TYPE_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrAtbPrescale
+ */
+#define XLPD_SLCR_ATB_PRESCALE    ( ( XLPD_SLCR_BASEADDR ) + 0x00006020UL )
+#define XLPD_SLCR_ATB_PRESCALE_RSTVAL   0x0000ffffUL
+
+#define XLPD_SLCR_ATB_PRESCALE_EN_SHIFT   16UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_WIDTH   1UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_MASK    0x00010000UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ATB_PRESCALE_VAL_SHIFT   0UL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_WIDTH   16UL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_MASK    0x0000ffffUL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_DEFVAL  0xffffUL
+
+/**
+ * Register: XlpdSlcrMutex0
+ */
+#define XLPD_SLCR_MUTEX0    ( ( XLPD_SLCR_BASEADDR ) + 0x00007000UL )
+#define XLPD_SLCR_MUTEX0_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX0_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX0_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX0_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX0_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex1
+ */
+#define XLPD_SLCR_MUTEX1    ( ( XLPD_SLCR_BASEADDR ) + 0x00007004UL )
+#define XLPD_SLCR_MUTEX1_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX1_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX1_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX1_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX1_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex2
+ */
+#define XLPD_SLCR_MUTEX2    ( ( XLPD_SLCR_BASEADDR ) + 0x00007008UL )
+#define XLPD_SLCR_MUTEX2_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX2_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX2_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX2_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX2_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex3
+ */
+#define XLPD_SLCR_MUTEX3    ( ( XLPD_SLCR_BASEADDR ) + 0x0000700CUL )
+#define XLPD_SLCR_MUTEX3_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX3_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX3_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX3_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX3_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqSts
+ */
+#define XLPD_SLCR_GICP0_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008000UL )
+#define XLPD_SLCR_GICP0_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqMsk
+ */
+#define XLPD_SLCR_GICP0_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008004UL )
+#define XLPD_SLCR_GICP0_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqEn
+ */
+#define XLPD_SLCR_GICP0_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008008UL )
+#define XLPD_SLCR_GICP0_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqDis
+ */
+#define XLPD_SLCR_GICP0_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000800CUL )
+#define XLPD_SLCR_GICP0_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqTrig
+ */
+#define XLPD_SLCR_GICP0_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008010UL )
+#define XLPD_SLCR_GICP0_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqSts
+ */
+#define XLPD_SLCR_GICP1_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008014UL )
+#define XLPD_SLCR_GICP1_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqMsk
+ */
+#define XLPD_SLCR_GICP1_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008018UL )
+#define XLPD_SLCR_GICP1_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqEn
+ */
+#define XLPD_SLCR_GICP1_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x0000801CUL )
+#define XLPD_SLCR_GICP1_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqDis
+ */
+#define XLPD_SLCR_GICP1_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008020UL )
+#define XLPD_SLCR_GICP1_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqTrig
+ */
+#define XLPD_SLCR_GICP1_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008024UL )
+#define XLPD_SLCR_GICP1_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqSts
+ */
+#define XLPD_SLCR_GICP2_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008028UL )
+#define XLPD_SLCR_GICP2_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqMsk
+ */
+#define XLPD_SLCR_GICP2_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x0000802CUL )
+#define XLPD_SLCR_GICP2_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqEn
+ */
+#define XLPD_SLCR_GICP2_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008030UL )
+#define XLPD_SLCR_GICP2_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqDis
+ */
+#define XLPD_SLCR_GICP2_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008034UL )
+#define XLPD_SLCR_GICP2_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqTrig
+ */
+#define XLPD_SLCR_GICP2_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008038UL )
+#define XLPD_SLCR_GICP2_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqSts
+ */
+#define XLPD_SLCR_GICP3_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000803CUL )
+#define XLPD_SLCR_GICP3_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqMsk
+ */
+#define XLPD_SLCR_GICP3_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008040UL )
+#define XLPD_SLCR_GICP3_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqEn
+ */
+#define XLPD_SLCR_GICP3_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008044UL )
+#define XLPD_SLCR_GICP3_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqDis
+ */
+#define XLPD_SLCR_GICP3_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008048UL )
+#define XLPD_SLCR_GICP3_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqTrig
+ */
+#define XLPD_SLCR_GICP3_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x0000804CUL )
+#define XLPD_SLCR_GICP3_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqSts
+ */
+#define XLPD_SLCR_GICP4_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008050UL )
+#define XLPD_SLCR_GICP4_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqMsk
+ */
+#define XLPD_SLCR_GICP4_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008054UL )
+#define XLPD_SLCR_GICP4_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqEn
+ */
+#define XLPD_SLCR_GICP4_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008058UL )
+#define XLPD_SLCR_GICP4_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqDis
+ */
+#define XLPD_SLCR_GICP4_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000805CUL )
+#define XLPD_SLCR_GICP4_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqTrig
+ */
+#define XLPD_SLCR_GICP4_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008060UL )
+#define XLPD_SLCR_GICP4_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqSts
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A0UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqMsk
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A4UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_RSTVAL   0x000000ffUL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqEn
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A8UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqDis
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x000080ACUL )
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqTrig
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x000080B0UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAfiFs
+ */
+#define XLPD_SLCR_AFI_FS    ( ( XLPD_SLCR_BASEADDR ) + 0x00009000UL )
+#define XLPD_SLCR_AFI_FS_RSTVAL   0x00000200UL
+
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_SHIFT   8UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_WIDTH   2UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_MASK    0x00000300UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_DEFVAL  0x2UL
+
+/**
+ * Register: XlpdSlcrCci
+ */
+#define XLPD_SLCR_CCI    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A000UL )
+#define XLPD_SLCR_CCI_RSTVAL   0x03801c07UL
+
+#define XLPD_SLCR_CCI_SPR_SHIFT   28UL
+#define XLPD_SLCR_CCI_SPR_WIDTH   4UL
+#define XLPD_SLCR_CCI_SPR_MASK    0xf0000000UL
+#define XLPD_SLCR_CCI_SPR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS4_SHIFT   27UL
+#define XLPD_SLCR_CCI_QVNVNETS4_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS4_MASK    0x08000000UL
+#define XLPD_SLCR_CCI_QVNVNETS4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS3_SHIFT   26UL
+#define XLPD_SLCR_CCI_QVNVNETS3_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS3_MASK    0x04000000UL
+#define XLPD_SLCR_CCI_QVNVNETS3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS2_SHIFT   25UL
+#define XLPD_SLCR_CCI_QVNVNETS2_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS2_MASK    0x02000000UL
+#define XLPD_SLCR_CCI_QVNVNETS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QVNVNETS1_SHIFT   24UL
+#define XLPD_SLCR_CCI_QVNVNETS1_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS1_MASK    0x01000000UL
+#define XLPD_SLCR_CCI_QVNVNETS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QVNVNETS0_SHIFT   23UL
+#define XLPD_SLCR_CCI_QVNVNETS0_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS0_MASK    0x00800000UL
+#define XLPD_SLCR_CCI_QVNVNETS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QOS_OVRRD_SHIFT   18UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_WIDTH   5UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_MASK    0x007c0000UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVN_EN_M2_SHIFT   17UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_MASK    0x00020000UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVN_EN_M1_SHIFT   16UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_MASK    0x00010000UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_STRPG_GRAN_SHIFT   13UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_WIDTH   3UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_MASK    0x0000e000UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN4_SHIFT   12UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_MASK    0x00001000UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN3_SHIFT   11UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_MASK    0x00000800UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN0_SHIFT   10UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_MASK    0x00000400UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ECOREVNUM_SHIFT   6UL
+#define XLPD_SLCR_CCI_ECOREVNUM_WIDTH   4UL
+#define XLPD_SLCR_CCI_ECOREVNUM_MASK    0x000003c0UL
+#define XLPD_SLCR_CCI_ECOREVNUM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA2_SHIFT   5UL
+#define XLPD_SLCR_CCI_ASA2_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA2_MASK    0x00000020UL
+#define XLPD_SLCR_CCI_ASA2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA1_SHIFT   4UL
+#define XLPD_SLCR_CCI_ASA1_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA1_MASK    0x00000010UL
+#define XLPD_SLCR_CCI_ASA1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA0_SHIFT   3UL
+#define XLPD_SLCR_CCI_ASA0_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA0_MASK    0x00000008UL
+#define XLPD_SLCR_CCI_ASA0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_OWO2_SHIFT   2UL
+#define XLPD_SLCR_CCI_OWO2_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO2_MASK    0x00000004UL
+#define XLPD_SLCR_CCI_OWO2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_OWO1_SHIFT   1UL
+#define XLPD_SLCR_CCI_OWO1_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO1_MASK    0x00000002UL
+#define XLPD_SLCR_CCI_OWO1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_OWO0_SHIFT   0UL
+#define XLPD_SLCR_CCI_OWO0_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO0_MASK    0x00000001UL
+#define XLPD_SLCR_CCI_OWO0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrCciAddrmap
+ */
+#define XLPD_SLCR_CCI_ADDRMAP    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A004UL )
+#define XLPD_SLCR_CCI_ADDRMAP_RSTVAL   0x00c000ffUL
+
+#define XLPD_SLCR_CCI_ADDRMAP_15_SHIFT   30UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_MASK    0xc0000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_14_SHIFT   28UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_MASK    0x30000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_13_SHIFT   26UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_MASK    0x0c000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_12_SHIFT   24UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_MASK    0x03000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_11_SHIFT   22UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_MASK    0x00c00000UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_10_SHIFT   20UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_MASK    0x00300000UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_9_SHIFT   18UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_MASK    0x000c0000UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_8_SHIFT   16UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_MASK    0x00030000UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_7_SHIFT   14UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_MASK    0x0000c000UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_6_SHIFT   12UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_MASK    0x00003000UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_5_SHIFT   10UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_MASK    0x00000c00UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_4_SHIFT   8UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_MASK    0x00000300UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_3_SHIFT   6UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_MASK    0x000000c0UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_2_SHIFT   4UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_MASK    0x00000030UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_1_SHIFT   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_1_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_1_MASK    0x0000000cUL
+#define XLPD_SLCR_CCI_ADDRMAP_1_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_0_SHIFT   0UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_MASK    0x00000003UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrCciQvnprealloc
+ */
+#define XLPD_SLCR_CCI_QVNPREALLOC    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A008UL )
+#define XLPD_SLCR_CCI_QVNPREALLOC_RSTVAL   0x00330330UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_SHIFT   20UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_MASK    0x00f00000UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_SHIFT   16UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_MASK    0x000f0000UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_SHIFT   8UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_MASK    0x00000f00UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_SHIFT   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_MASK    0x000000f0UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrSmmu
+ */
+#define XLPD_SLCR_SMMU    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A020UL )
+#define XLPD_SLCR_SMMU_RSTVAL   0x0000003fUL
+
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_SHIFT   7UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_WIDTH   1UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_MASK    0x00000080UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SMMU_CTTW_SHIFT   6UL
+#define XLPD_SLCR_SMMU_CTTW_WIDTH   1UL
+#define XLPD_SLCR_SMMU_CTTW_MASK    0x00000040UL
+#define XLPD_SLCR_SMMU_CTTW_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_SHIFT   5UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_MASK    0x00000020UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_SHIFT   4UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_MASK    0x00000010UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_SHIFT   3UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_MASK    0x00000008UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_SHIFT   2UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_MASK    0x00000004UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_SHIFT   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_MASK    0x00000002UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_SHIFT   0UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_MASK    0x00000001UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrApu
+ */
+#define XLPD_SLCR_APU    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A040UL )
+#define XLPD_SLCR_APU_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_APU_BRDC_BARRIER_SHIFT   3UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_MASK    0x00000008UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_CMNT_SHIFT   2UL
+#define XLPD_SLCR_APU_BRDC_CMNT_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_CMNT_MASK    0x00000004UL
+#define XLPD_SLCR_APU_BRDC_CMNT_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_INNER_SHIFT   1UL
+#define XLPD_SLCR_APU_BRDC_INNER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_INNER_MASK    0x00000002UL
+#define XLPD_SLCR_APU_BRDC_INNER_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_OUTER_SHIFT   0UL
+#define XLPD_SLCR_APU_BRDC_OUTER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_OUTER_MASK    0x00000001UL
+#define XLPD_SLCR_APU_BRDC_OUTER_DEFVAL  0x1UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_slcr_secure.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_slcr_secure.h
new file mode 100644
index 0000000..f038c11
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_slcr_secure.h
@@ -0,0 +1,141 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_SLCR_SECURE_H__
+#define __XLPD_SLCR_SECURE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdSlcrSecure Base Address
+ */
+#define XLPD_SLCR_SECURE_BASEADDR      0xFF4B0000UL
+
+/**
+ * Register: XlpdSlcrSecCtrl
+ */
+#define XLPD_SLCR_SEC_CTRL    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000004UL )
+#define XLPD_SLCR_SEC_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_SHIFT   0UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_WIDTH   1UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecIsr
+ */
+#define XLPD_SLCR_SEC_ISR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000008UL )
+#define XLPD_SLCR_SEC_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecImr
+ */
+#define XLPD_SLCR_SEC_IMR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x0000000CUL )
+#define XLPD_SLCR_SEC_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrSecIer
+ */
+#define XLPD_SLCR_SEC_IER    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000010UL )
+#define XLPD_SLCR_SEC_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecIdr
+ */
+#define XLPD_SLCR_SEC_IDR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000014UL )
+#define XLPD_SLCR_SEC_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecItr
+ */
+#define XLPD_SLCR_SEC_ITR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000018UL )
+#define XLPD_SLCR_SEC_ITR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecRpu
+ */
+#define XLPD_SLCR_SEC_RPU    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000020UL )
+#define XLPD_SLCR_SEC_RPU_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_SHIFT   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_WIDTH   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_MASK    0x00000002UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_SHIFT   0UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_WIDTH   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecAdma
+ */
+#define XLPD_SLCR_SEC_ADMA    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000024UL )
+#define XLPD_SLCR_SEC_ADMA_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ADMA_TZ_SHIFT   0UL
+#define XLPD_SLCR_SEC_ADMA_TZ_WIDTH   8UL
+#define XLPD_SLCR_SEC_ADMA_TZ_MASK    0x000000ffUL
+#define XLPD_SLCR_SEC_ADMA_TZ_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecSafetyChk
+ */
+#define XLPD_SLCR_SEC_SAFETY_CHK    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000030UL )
+#define XLPD_SLCR_SEC_SAFETY_CHK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_SHIFT   0UL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_WIDTH   32UL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecUsb
+ */
+#define XLPD_SLCR_SEC_USB    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000034UL )
+#define XLPD_SLCR_SEC_USB_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_SHIFT   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_WIDTH   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_MASK    0x00000002UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_SHIFT   0UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_WIDTH   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_DEFVAL  0x1UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_SLCR_SECURE_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_xppu.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_xppu.h
new file mode 100644
index 0000000..06aa8b2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_xppu.h
@@ -0,0 +1,858 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_XPPU_H__
+#define __XLPD_XPPU_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdXppu Base Address
+ */
+#define XLPD_XPPU_BASEADDR      0xFF980000UL
+
+/**
+ * Register: XlpdXppuCtrl
+ */
+#define XLPD_XPPU_CTRL    ( ( XLPD_XPPU_BASEADDR ) + 0x00000000UL )
+#define XLPD_XPPU_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_SHIFT   2UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_MASK    0x00000004UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_DEFVAL  0x0UL
+
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_SHIFT   1UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_MASK    0x00000002UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_DEFVAL  0x0UL
+
+#define XLPD_XPPU_CTRL_EN_SHIFT   0UL
+#define XLPD_XPPU_CTRL_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_EN_MASK    0x00000001UL
+#define XLPD_XPPU_CTRL_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuErrSts1
+ */
+#define XLPD_XPPU_ERR_STS1    ( ( XLPD_XPPU_BASEADDR ) + 0x00000004UL )
+#define XLPD_XPPU_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuErrSts2
+ */
+#define XLPD_XPPU_ERR_STS2    ( ( XLPD_XPPU_BASEADDR ) + 0x00000008UL )
+#define XLPD_XPPU_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuPoison
+ */
+#define XLPD_XPPU_POISON    ( ( XLPD_XPPU_BASEADDR ) + 0x0000000CUL )
+#define XLPD_XPPU_POISON_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_POISON_BASE_SHIFT   0UL
+#define XLPD_XPPU_POISON_BASE_WIDTH   20UL
+#define XLPD_XPPU_POISON_BASE_MASK    0x000fffffUL
+#define XLPD_XPPU_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuIsr
+ */
+#define XLPD_XPPU_ISR    ( ( XLPD_XPPU_BASEADDR ) + 0x00000010UL )
+#define XLPD_XPPU_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ISR_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_ISR_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_ISR_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_ISR_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_ISR_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_ISR_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_ISR_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_ISR_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_ISR_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_ISR_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_ISR_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_ISR_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_ISR_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_ISR_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_ISR_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuImr
+ */
+#define XLPD_XPPU_IMR    ( ( XLPD_XPPU_BASEADDR ) + 0x00000014UL )
+#define XLPD_XPPU_IMR_RSTVAL   0x000000efUL
+
+#define XLPD_XPPU_IMR_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IMR_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IMR_APER_PARITY_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IMR_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IMR_APER_TZ_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IMR_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IMR_APER_PERM_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IMR_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IMR_MID_PARITY_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IMR_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IMR_MID_RO_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IMR_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IMR_MID_MISS_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IMR_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IMR_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuIen
+ */
+#define XLPD_XPPU_IEN    ( ( XLPD_XPPU_BASEADDR ) + 0x00000018UL )
+#define XLPD_XPPU_IEN_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_IEN_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IEN_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IEN_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IEN_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IEN_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IEN_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IEN_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IEN_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IEN_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IEN_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IEN_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IEN_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IEN_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IEN_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IEN_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuIds
+ */
+#define XLPD_XPPU_IDS    ( ( XLPD_XPPU_BASEADDR ) + 0x0000001CUL )
+#define XLPD_XPPU_IDS_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_IDS_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IDS_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IDS_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IDS_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IDS_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IDS_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IDS_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IDS_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IDS_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IDS_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IDS_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IDS_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IDS_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IDS_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IDS_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMMstrIds
+ */
+#define XLPD_XPPU_M_MSTR_IDS    ( ( XLPD_XPPU_BASEADDR ) + 0x0000003CUL )
+#define XLPD_XPPU_M_MSTR_IDS_RSTVAL   0x00000014UL
+
+#define XLPD_XPPU_M_MSTR_IDS_NO_SHIFT   0UL
+#define XLPD_XPPU_M_MSTR_IDS_NO_WIDTH   32UL
+#define XLPD_XPPU_M_MSTR_IDS_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_MSTR_IDS_NO_DEFVAL  0x14UL
+
+/**
+ * Register: XlpdXppuMAperture32b
+ */
+#define XLPD_XPPU_M_APERTURE_32B    ( ( XLPD_XPPU_BASEADDR ) + 0x00000040UL )
+#define XLPD_XPPU_M_APERTURE_32B_RSTVAL   0x00000080UL
+
+#define XLPD_XPPU_M_APERTURE_32B_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_32B_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_32B_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_32B_NO_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMAperture64kb
+ */
+#define XLPD_XPPU_M_APERTURE_64KB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000044UL )
+#define XLPD_XPPU_M_APERTURE_64KB_RSTVAL   0x00000100UL
+
+#define XLPD_XPPU_M_APERTURE_64KB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_DEFVAL  0x100UL
+
+/**
+ * Register: XlpdXppuMAperture1mb
+ */
+#define XLPD_XPPU_M_APERTURE_1MB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000048UL )
+#define XLPD_XPPU_M_APERTURE_1MB_RSTVAL   0x00000010UL
+
+#define XLPD_XPPU_M_APERTURE_1MB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_DEFVAL  0x10UL
+
+/**
+ * Register: XlpdXppuMAperture512mb
+ */
+#define XLPD_XPPU_M_APERTURE_512MB    ( ( XLPD_XPPU_BASEADDR ) + 0x0000004CUL )
+#define XLPD_XPPU_M_APERTURE_512MB_RSTVAL   0x00000001UL
+
+#define XLPD_XPPU_M_APERTURE_512MB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuBase32b
+ */
+#define XLPD_XPPU_BASE_32B    ( ( XLPD_XPPU_BASEADDR ) + 0x00000050UL )
+#define XLPD_XPPU_BASE_32B_RSTVAL   0xff990000UL
+
+#define XLPD_XPPU_BASE_32B_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_32B_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_32B_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_32B_ADDR_DEFVAL  0xff990000UL
+
+/**
+ * Register: XlpdXppuBase64kb
+ */
+#define XLPD_XPPU_BASE_64KB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000054UL )
+#define XLPD_XPPU_BASE_64KB_RSTVAL   0xff000000UL
+
+#define XLPD_XPPU_BASE_64KB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_64KB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_64KB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_64KB_ADDR_DEFVAL  0xff000000UL
+
+/**
+ * Register: XlpdXppuBase1mb
+ */
+#define XLPD_XPPU_BASE_1MB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000058UL )
+#define XLPD_XPPU_BASE_1MB_RSTVAL   0xfe000000UL
+
+#define XLPD_XPPU_BASE_1MB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_1MB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_1MB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_1MB_ADDR_DEFVAL  0xfe000000UL
+
+/**
+ * Register: XlpdXppuBase512mb
+ */
+#define XLPD_XPPU_BASE_512MB    ( ( XLPD_XPPU_BASEADDR ) + 0x0000005CUL )
+#define XLPD_XPPU_BASE_512MB_RSTVAL   0xc0000000UL
+
+#define XLPD_XPPU_BASE_512MB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_512MB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_512MB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_512MB_ADDR_DEFVAL  0xc0000000UL
+
+/**
+ * Register: XlpdXppuMstrId00
+ */
+#define XLPD_XPPU_MSTR_ID00    ( ( XLPD_XPPU_BASEADDR ) + 0x00000100UL )
+#define XLPD_XPPU_MSTR_ID00_RSTVAL   0x83ff0040UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_DEFVAL  0x3ffUL
+
+#define XLPD_XPPU_MSTR_ID00_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID00_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID00_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID00_MID_DEFVAL  0x40UL
+
+/**
+ * Register: XlpdXppuMstrId01
+ */
+#define XLPD_XPPU_MSTR_ID01    ( ( XLPD_XPPU_BASEADDR ) + 0x00000104UL )
+#define XLPD_XPPU_MSTR_ID01_RSTVAL   0x03f00000UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_DEFVAL  0x3f0UL
+
+#define XLPD_XPPU_MSTR_ID01_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID01_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID01_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID01_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId02
+ */
+#define XLPD_XPPU_MSTR_ID02    ( ( XLPD_XPPU_BASEADDR ) + 0x00000108UL )
+#define XLPD_XPPU_MSTR_ID02_RSTVAL   0x83f00010UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_DEFVAL  0x3f0UL
+
+#define XLPD_XPPU_MSTR_ID02_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID02_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID02_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID02_MID_DEFVAL  0x10UL
+
+/**
+ * Register: XlpdXppuMstrId03
+ */
+#define XLPD_XPPU_MSTR_ID03    ( ( XLPD_XPPU_BASEADDR ) + 0x0000010CUL )
+#define XLPD_XPPU_MSTR_ID03_RSTVAL   0x83c00080UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_DEFVAL  0x3c0UL
+
+#define XLPD_XPPU_MSTR_ID03_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID03_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID03_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID03_MID_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMstrId04
+ */
+#define XLPD_XPPU_MSTR_ID04    ( ( XLPD_XPPU_BASEADDR ) + 0x00000110UL )
+#define XLPD_XPPU_MSTR_ID04_RSTVAL   0x83c30080UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID04_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID04_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID04_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID04_MID_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMstrId05
+ */
+#define XLPD_XPPU_MSTR_ID05    ( ( XLPD_XPPU_BASEADDR ) + 0x00000114UL )
+#define XLPD_XPPU_MSTR_ID05_RSTVAL   0x03c30081UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID05_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID05_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID05_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID05_MID_DEFVAL  0x81UL
+
+/**
+ * Register: XlpdXppuMstrId06
+ */
+#define XLPD_XPPU_MSTR_ID06    ( ( XLPD_XPPU_BASEADDR ) + 0x00000118UL )
+#define XLPD_XPPU_MSTR_ID06_RSTVAL   0x03c30082UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID06_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID06_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID06_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID06_MID_DEFVAL  0x82UL
+
+/**
+ * Register: XlpdXppuMstrId07
+ */
+#define XLPD_XPPU_MSTR_ID07    ( ( XLPD_XPPU_BASEADDR ) + 0x0000011CUL )
+#define XLPD_XPPU_MSTR_ID07_RSTVAL   0x83c30083UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID07_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID07_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID07_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID07_MID_DEFVAL  0x83UL
+
+/**
+ * Register: XlpdXppuMstrId08
+ */
+#define XLPD_XPPU_MSTR_ID08    ( ( XLPD_XPPU_BASEADDR ) + 0x00000120UL )
+#define XLPD_XPPU_MSTR_ID08_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID08_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID08_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID08_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId09
+ */
+#define XLPD_XPPU_MSTR_ID09    ( ( XLPD_XPPU_BASEADDR ) + 0x00000124UL )
+#define XLPD_XPPU_MSTR_ID09_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID09_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID09_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID09_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId10
+ */
+#define XLPD_XPPU_MSTR_ID10    ( ( XLPD_XPPU_BASEADDR ) + 0x00000128UL )
+#define XLPD_XPPU_MSTR_ID10_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID10_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID10_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID10_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId11
+ */
+#define XLPD_XPPU_MSTR_ID11    ( ( XLPD_XPPU_BASEADDR ) + 0x0000012CUL )
+#define XLPD_XPPU_MSTR_ID11_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID11_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID11_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID11_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId12
+ */
+#define XLPD_XPPU_MSTR_ID12    ( ( XLPD_XPPU_BASEADDR ) + 0x00000130UL )
+#define XLPD_XPPU_MSTR_ID12_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID12_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID12_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID12_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId13
+ */
+#define XLPD_XPPU_MSTR_ID13    ( ( XLPD_XPPU_BASEADDR ) + 0x00000134UL )
+#define XLPD_XPPU_MSTR_ID13_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID13_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID13_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID13_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId14
+ */
+#define XLPD_XPPU_MSTR_ID14    ( ( XLPD_XPPU_BASEADDR ) + 0x00000138UL )
+#define XLPD_XPPU_MSTR_ID14_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID14_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID14_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID14_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId15
+ */
+#define XLPD_XPPU_MSTR_ID15    ( ( XLPD_XPPU_BASEADDR ) + 0x0000013CUL )
+#define XLPD_XPPU_MSTR_ID15_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID15_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID15_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID15_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId16
+ */
+#define XLPD_XPPU_MSTR_ID16    ( ( XLPD_XPPU_BASEADDR ) + 0x00000140UL )
+#define XLPD_XPPU_MSTR_ID16_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID16_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID16_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID16_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId17
+ */
+#define XLPD_XPPU_MSTR_ID17    ( ( XLPD_XPPU_BASEADDR ) + 0x00000144UL )
+#define XLPD_XPPU_MSTR_ID17_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID17_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID17_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID17_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId18
+ */
+#define XLPD_XPPU_MSTR_ID18    ( ( XLPD_XPPU_BASEADDR ) + 0x00000148UL )
+#define XLPD_XPPU_MSTR_ID18_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID18_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID18_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID18_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId19
+ */
+#define XLPD_XPPU_MSTR_ID19    ( ( XLPD_XPPU_BASEADDR ) + 0x0000014CUL )
+#define XLPD_XPPU_MSTR_ID19_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID19_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID19_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID19_MID_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_XPPU_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_xppu_sink.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_xppu_sink.h
new file mode 100644
index 0000000..6f084fb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xlpd_xppu_sink.h
@@ -0,0 +1,81 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_XPPU_SINK_H__
+#define __XLPD_XPPU_SINK_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdXppuSink Base Address
+ */
+#define XLPD_XPPU_SINK_BASEADDR      0xFF9C0000UL
+
+/**
+ * Register: XlpdXppuSinkErrSts
+ */
+#define XLPD_XPPU_SINK_ERR_STS    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF00UL )
+#define XLPD_XPPU_SINK_ERR_STS_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_SHIFT   31UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_WIDTH   1UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_MASK    0x80000000UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_SHIFT   0UL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_WIDTH   12UL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_MASK    0x00000fffUL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkIsr
+ */
+#define XLPD_XPPU_SINK_ISR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF10UL )
+#define XLPD_XPPU_SINK_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkImr
+ */
+#define XLPD_XPPU_SINK_IMR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF14UL )
+#define XLPD_XPPU_SINK_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuSinkIer
+ */
+#define XLPD_XPPU_SINK_IER    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF18UL )
+#define XLPD_XPPU_SINK_IER_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_IERADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkIdr
+ */
+#define XLPD_XPPU_SINK_IDR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF1CUL )
+#define XLPD_XPPU_SINK_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_XPPU_SINK_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xocm_xmpu_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xocm_xmpu_cfg.h
new file mode 100644
index 0000000..67780dc
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/includes_ps/xocm_xmpu_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XOCM_XMPU_CFG_H__
+#define __XOCM_XMPU_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XocmXmpuCfg Base Address
+ */
+#define XOCM_XMPU_CFG_BASEADDR      0xFFA70000UL
+
+/**
+ * Register: XocmXmpuCfgCtrl
+ */
+#define XOCM_XMPU_CFG_CTRL    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000000UL )
+#define XOCM_XMPU_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XocmXmpuCfgErrSts1
+ */
+#define XOCM_XMPU_CFG_ERR_STS1    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000004UL )
+#define XOCM_XMPU_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgErrSts2
+ */
+#define XOCM_XMPU_CFG_ERR_STS2    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000008UL )
+#define XOCM_XMPU_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgPoison
+ */
+#define XOCM_XMPU_CFG_POISON    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000000CUL )
+#define XOCM_XMPU_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_POISON_BASE_SHIFT   0UL
+#define XOCM_XMPU_CFG_POISON_BASE_WIDTH   20UL
+#define XOCM_XMPU_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XOCM_XMPU_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgIsr
+ */
+#define XOCM_XMPU_CFG_ISR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000010UL )
+#define XOCM_XMPU_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgImr
+ */
+#define XOCM_XMPU_CFG_IMR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000014UL )
+#define XOCM_XMPU_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XocmXmpuCfgIen
+ */
+#define XOCM_XMPU_CFG_IEN    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000018UL )
+#define XOCM_XMPU_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgIds
+ */
+#define XOCM_XMPU_CFG_IDS    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000001CUL )
+#define XOCM_XMPU_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgLock
+ */
+#define XOCM_XMPU_CFG_LOCK    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000020UL )
+#define XOCM_XMPU_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00Strt
+ */
+#define XOCM_XMPU_CFG_R00_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000100UL )
+#define XOCM_XMPU_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00End
+ */
+#define XOCM_XMPU_CFG_R00_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000104UL )
+#define XOCM_XMPU_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00Mstr
+ */
+#define XOCM_XMPU_CFG_R00_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000108UL )
+#define XOCM_XMPU_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00
+ */
+#define XOCM_XMPU_CFG_R00    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000010CUL )
+#define XOCM_XMPU_CFG_R00_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R00_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R00_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R00_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R00_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01Strt
+ */
+#define XOCM_XMPU_CFG_R01_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000110UL )
+#define XOCM_XMPU_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01End
+ */
+#define XOCM_XMPU_CFG_R01_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000114UL )
+#define XOCM_XMPU_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01Mstr
+ */
+#define XOCM_XMPU_CFG_R01_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000118UL )
+#define XOCM_XMPU_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01
+ */
+#define XOCM_XMPU_CFG_R01    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000011CUL )
+#define XOCM_XMPU_CFG_R01_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R01_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R01_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R01_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R01_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02Strt
+ */
+#define XOCM_XMPU_CFG_R02_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000120UL )
+#define XOCM_XMPU_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02End
+ */
+#define XOCM_XMPU_CFG_R02_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000124UL )
+#define XOCM_XMPU_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02Mstr
+ */
+#define XOCM_XMPU_CFG_R02_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000128UL )
+#define XOCM_XMPU_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02
+ */
+#define XOCM_XMPU_CFG_R02    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000012CUL )
+#define XOCM_XMPU_CFG_R02_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R02_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R02_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R02_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R02_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03Strt
+ */
+#define XOCM_XMPU_CFG_R03_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000130UL )
+#define XOCM_XMPU_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03End
+ */
+#define XOCM_XMPU_CFG_R03_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000134UL )
+#define XOCM_XMPU_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03Mstr
+ */
+#define XOCM_XMPU_CFG_R03_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000138UL )
+#define XOCM_XMPU_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03
+ */
+#define XOCM_XMPU_CFG_R03    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000013CUL )
+#define XOCM_XMPU_CFG_R03_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R03_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R03_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R03_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R03_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04Strt
+ */
+#define XOCM_XMPU_CFG_R04_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000140UL )
+#define XOCM_XMPU_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04End
+ */
+#define XOCM_XMPU_CFG_R04_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000144UL )
+#define XOCM_XMPU_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04Mstr
+ */
+#define XOCM_XMPU_CFG_R04_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000148UL )
+#define XOCM_XMPU_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04
+ */
+#define XOCM_XMPU_CFG_R04    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000014CUL )
+#define XOCM_XMPU_CFG_R04_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R04_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R04_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R04_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R04_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05Strt
+ */
+#define XOCM_XMPU_CFG_R05_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000150UL )
+#define XOCM_XMPU_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05End
+ */
+#define XOCM_XMPU_CFG_R05_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000154UL )
+#define XOCM_XMPU_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05Mstr
+ */
+#define XOCM_XMPU_CFG_R05_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000158UL )
+#define XOCM_XMPU_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05
+ */
+#define XOCM_XMPU_CFG_R05    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000015CUL )
+#define XOCM_XMPU_CFG_R05_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R05_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R05_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R05_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R05_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06Strt
+ */
+#define XOCM_XMPU_CFG_R06_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000160UL )
+#define XOCM_XMPU_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06End
+ */
+#define XOCM_XMPU_CFG_R06_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000164UL )
+#define XOCM_XMPU_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06Mstr
+ */
+#define XOCM_XMPU_CFG_R06_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000168UL )
+#define XOCM_XMPU_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06
+ */
+#define XOCM_XMPU_CFG_R06    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000016CUL )
+#define XOCM_XMPU_CFG_R06_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R06_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R06_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R06_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R06_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07Strt
+ */
+#define XOCM_XMPU_CFG_R07_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000170UL )
+#define XOCM_XMPU_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07End
+ */
+#define XOCM_XMPU_CFG_R07_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000174UL )
+#define XOCM_XMPU_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07Mstr
+ */
+#define XOCM_XMPU_CFG_R07_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000178UL )
+#define XOCM_XMPU_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07
+ */
+#define XOCM_XMPU_CFG_R07    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000017CUL )
+#define XOCM_XMPU_CFG_R07_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R07_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R07_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R07_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R07_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08Strt
+ */
+#define XOCM_XMPU_CFG_R08_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000180UL )
+#define XOCM_XMPU_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08End
+ */
+#define XOCM_XMPU_CFG_R08_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000184UL )
+#define XOCM_XMPU_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08Mstr
+ */
+#define XOCM_XMPU_CFG_R08_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000188UL )
+#define XOCM_XMPU_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08
+ */
+#define XOCM_XMPU_CFG_R08    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000018CUL )
+#define XOCM_XMPU_CFG_R08_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R08_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R08_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R08_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R08_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09Strt
+ */
+#define XOCM_XMPU_CFG_R09_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000190UL )
+#define XOCM_XMPU_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09End
+ */
+#define XOCM_XMPU_CFG_R09_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000194UL )
+#define XOCM_XMPU_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09Mstr
+ */
+#define XOCM_XMPU_CFG_R09_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000198UL )
+#define XOCM_XMPU_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09
+ */
+#define XOCM_XMPU_CFG_R09    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000019CUL )
+#define XOCM_XMPU_CFG_R09_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R09_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R09_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R09_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R09_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10Strt
+ */
+#define XOCM_XMPU_CFG_R10_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A0UL )
+#define XOCM_XMPU_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10End
+ */
+#define XOCM_XMPU_CFG_R10_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A4UL )
+#define XOCM_XMPU_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10Mstr
+ */
+#define XOCM_XMPU_CFG_R10_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A8UL )
+#define XOCM_XMPU_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10
+ */
+#define XOCM_XMPU_CFG_R10    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001ACUL )
+#define XOCM_XMPU_CFG_R10_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R10_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R10_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R10_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R10_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11Strt
+ */
+#define XOCM_XMPU_CFG_R11_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B0UL )
+#define XOCM_XMPU_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11End
+ */
+#define XOCM_XMPU_CFG_R11_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B4UL )
+#define XOCM_XMPU_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11Mstr
+ */
+#define XOCM_XMPU_CFG_R11_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B8UL )
+#define XOCM_XMPU_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11
+ */
+#define XOCM_XMPU_CFG_R11    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001BCUL )
+#define XOCM_XMPU_CFG_R11_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R11_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R11_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R11_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R11_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12Strt
+ */
+#define XOCM_XMPU_CFG_R12_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C0UL )
+#define XOCM_XMPU_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12End
+ */
+#define XOCM_XMPU_CFG_R12_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C4UL )
+#define XOCM_XMPU_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12Mstr
+ */
+#define XOCM_XMPU_CFG_R12_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C8UL )
+#define XOCM_XMPU_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12
+ */
+#define XOCM_XMPU_CFG_R12    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001CCUL )
+#define XOCM_XMPU_CFG_R12_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R12_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R12_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R12_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R12_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13Strt
+ */
+#define XOCM_XMPU_CFG_R13_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D0UL )
+#define XOCM_XMPU_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13End
+ */
+#define XOCM_XMPU_CFG_R13_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D4UL )
+#define XOCM_XMPU_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13Mstr
+ */
+#define XOCM_XMPU_CFG_R13_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D8UL )
+#define XOCM_XMPU_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13
+ */
+#define XOCM_XMPU_CFG_R13    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001DCUL )
+#define XOCM_XMPU_CFG_R13_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R13_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R13_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R13_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R13_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14Strt
+ */
+#define XOCM_XMPU_CFG_R14_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E0UL )
+#define XOCM_XMPU_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14End
+ */
+#define XOCM_XMPU_CFG_R14_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E4UL )
+#define XOCM_XMPU_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14Mstr
+ */
+#define XOCM_XMPU_CFG_R14_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E8UL )
+#define XOCM_XMPU_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14
+ */
+#define XOCM_XMPU_CFG_R14    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001ECUL )
+#define XOCM_XMPU_CFG_R14_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R14_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R14_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R14_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R14_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15Strt
+ */
+#define XOCM_XMPU_CFG_R15_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F0UL )
+#define XOCM_XMPU_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15End
+ */
+#define XOCM_XMPU_CFG_R15_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F4UL )
+#define XOCM_XMPU_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15Mstr
+ */
+#define XOCM_XMPU_CFG_R15_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F8UL )
+#define XOCM_XMPU_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15
+ */
+#define XOCM_XMPU_CFG_R15    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001FCUL )
+#define XOCM_XMPU_CFG_R15_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R15_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R15_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R15_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R15_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XOCM_XMPU_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/print.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/print.c
new file mode 100644
index 0000000..0ab15e9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/print.c
@@ -0,0 +1,32 @@
+/* print.c -- print a string on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ */
+
+/*
+ * print -- do a raw print of a string
+ */
+#include "xil_printf.h"
+
+void print(const char8 *ptr)
+{
+#ifdef STDOUT_BASEADDRESS
+  while (*ptr != (char8)0) {
+    outbyte (*ptr);
+	*ptr++;
+  }
+#else
+(void)ptr;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/putnum.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/putnum.c
new file mode 100644
index 0000000..78cb715
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/putnum.c
@@ -0,0 +1,59 @@
+/* putnum.c -- put a hex number on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+/*
+ * putnum -- print a 32 bit number in hex
+ */
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Function Prototypes ******************************/
+extern void print (const char8 *ptr);
+void putnum(u32 num);
+
+void putnum(u32 num)
+{
+  char8  buf[9];
+  u32  cnt;
+  s32 i;
+  char8  *ptr;
+  u32  digit;
+  for(i = 0; i<9; i++) {
+	buf[i] = '0';
+  }
+
+  ptr = buf;
+  for (cnt = 7U ; cnt >= 0U ; cnt--) {
+    digit = ((num >> (cnt * 4U)) & 0x0000000FU);
+
+    if ((digit <= 9U) && (ptr != NULL)) {
+		digit += (u32)'0';
+		*ptr = ((char8) digit);
+		ptr += 1;
+	} else if (ptr != NULL) {
+		digit += ((u32)'a' - (u32)10);
+		*ptr = ((char8)digit);
+		ptr += 1;
+	} else {
+		/*Made for MisraC Compliance*/;
+	}
+  }
+
+  if(ptr != NULL) {
+	  *ptr = (char8) 0;
+  }
+  print (buf);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/sleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/sleep.c
new file mode 100644
index 0000000..c59fbbb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/sleep.c
@@ -0,0 +1,86 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************
+*
+* @file sleep.c
+*
+* This function provides a second delay using the Global Timer register in
+* the ARM Cortex A53 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+
+/*****************************************************************************/
+/*
+*
+* This API is used to provide delays in seconds
+*
+* @param	seconds requested
+*
+* @return	0 always
+*
+* @note		None.
+*
+****************************************************************************/
+s32 sleep(u32 seconds)
+{
+	XTime tEnd, tCur;
+
+	/*write 50MHz frequency to System Time Stamp Generator Register*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
+
+	/*Enable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
+
+	XTime_GetTime(&tCur);
+	tEnd  = tCur + (((XTime) seconds) * COUNTS_PER_SECOND);
+	do
+	{
+		XTime_GetTime(&tCur);
+	} while (tCur < tEnd);
+
+	/*Disable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),(~(XIOU_SCNTRS_CNT_CNTRL_REG_EN)));
+	return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/sleep.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/sleep.h
new file mode 100644
index 0000000..d7dfc35
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/sleep.h
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#ifndef SLEEP_H
+#define SLEEP_H
+
+#include "xil_types.h"
+#include "xil_io.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+s32 usleep(u32 useconds);
+s32 sleep(u32 seconds);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/subdir.mk b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/subdir.mk
new file mode 100644
index 0000000..45490af
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/subdir.mk
@@ -0,0 +1,26 @@
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/print.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/putnum.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/sleep.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/usleep.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/vectors.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_cache.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_exception.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_io.c
+#SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_smc.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_mmu.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xil_printf.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/xtime_l.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/kill.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_exit.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_open.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/_sbrk.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/abort.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/close.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/errno.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/fcntl.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/64bit/gcc/fstat.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_assert.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testcache.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testio.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testmem.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xplatform_info.c
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/usleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/usleep.c
new file mode 100644
index 0000000..3e983e6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/usleep.c
@@ -0,0 +1,93 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file usleep.c
+*
+* This function provides a microsecond delay using the Global Timer register in
+* the ARM Cortex A53 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+#include "xpseudo_asm.h"
+#include "xreg_cortexa53.h"
+
+/* Global Timer is always clocked at half of the CPU frequency */
+#define COUNTS_PER_USECOND  (COUNTS_PER_SECOND/1000000 )
+
+/*****************************************************************************/
+/**
+*
+* This API gives a delay in microseconds
+*
+* @param	useconds requested
+*
+* @return	0 if the delay can be achieved, -1 if the requested delay
+*		is out of range
+*
+* @note		None.
+*
+****************************************************************************/
+s32 usleep(u32 useconds)
+{
+	XTime tEnd, tCur;
+
+	/*write 50MHz frequency to System Time Stamp Generator Register*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
+
+	/*Enable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
+
+	XTime_GetTime(&tCur);
+	tEnd = tCur + (((XTime) useconds) * COUNTS_PER_USECOND);
+	do
+	{
+		XTime_GetTime(&tCur);
+	} while (tCur < tEnd);
+
+	/*Disable the counter*/
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),(~(XIOU_SCNTRS_CNT_CNTRL_REG_EN)));
+	return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/vectors.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/vectors.c
new file mode 100644
index 0000000..28ab1e2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/vectors.c
@@ -0,0 +1,149 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.c
+*
+* This file contains the C level vectors for the ARM Cortex A53 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xil_exception.h"
+#include "vectors.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+extern XExc_VectorTableEntry XExc_VectorTable[];
+
+/************************** Function Prototypes ******************************/
+
+
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the FIQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void FIQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_FIQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_FIQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the IRQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void IRQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_IRQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_IRQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the Synchronous Interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void SynchronousInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_SYNC_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_SYNC_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the SError Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void SErrorInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_SERROR_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_SERROR_ABORT_INT].Data);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/vectors.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/vectors.h
new file mode 100644
index 0000000..1085401
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/vectors.h
@@ -0,0 +1,81 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.h
+*
+* This file contains the C level vector prototypes for the ARM Cortex A53 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef _VECTORS_H_
+#define _VECTORS_H_
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+void FIQInterrupt(void);
+void IRQInterrupt(void);
+void SynchronousInterrupt(void);
+void SErrorInterrupt(void);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu0_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu0_cfg.h
new file mode 100644
index 0000000..d166804
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu0_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU0_CFG_H__
+#define __XDDR_XMPU0_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu0Cfg Base Address
+ */
+#define XDDR_XMPU0_CFG_BASEADDR      0xFD000000UL
+
+/**
+ * Register: XddrXmpu0CfgCtrl
+ */
+#define XDDR_XMPU0_CFG_CTRL    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU0_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu0CfgErrSts1
+ */
+#define XDDR_XMPU0_CFG_ERR_STS1    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU0_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgErrSts2
+ */
+#define XDDR_XMPU0_CFG_ERR_STS2    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU0_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgPoison
+ */
+#define XDDR_XMPU0_CFG_POISON    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU0_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU0_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU0_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU0_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgIsr
+ */
+#define XDDR_XMPU0_CFG_ISR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU0_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgImr
+ */
+#define XDDR_XMPU0_CFG_IMR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU0_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu0CfgIen
+ */
+#define XDDR_XMPU0_CFG_IEN    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU0_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgIds
+ */
+#define XDDR_XMPU0_CFG_IDS    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU0_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgLock
+ */
+#define XDDR_XMPU0_CFG_LOCK    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU0_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00Strt
+ */
+#define XDDR_XMPU0_CFG_R00_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU0_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00End
+ */
+#define XDDR_XMPU0_CFG_R00_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU0_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00Mstr
+ */
+#define XDDR_XMPU0_CFG_R00_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU0_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00
+ */
+#define XDDR_XMPU0_CFG_R00    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU0_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01Strt
+ */
+#define XDDR_XMPU0_CFG_R01_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU0_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01End
+ */
+#define XDDR_XMPU0_CFG_R01_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU0_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01Mstr
+ */
+#define XDDR_XMPU0_CFG_R01_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU0_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01
+ */
+#define XDDR_XMPU0_CFG_R01    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU0_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02Strt
+ */
+#define XDDR_XMPU0_CFG_R02_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU0_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02End
+ */
+#define XDDR_XMPU0_CFG_R02_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU0_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02Mstr
+ */
+#define XDDR_XMPU0_CFG_R02_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU0_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02
+ */
+#define XDDR_XMPU0_CFG_R02    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU0_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03Strt
+ */
+#define XDDR_XMPU0_CFG_R03_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU0_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03End
+ */
+#define XDDR_XMPU0_CFG_R03_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU0_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03Mstr
+ */
+#define XDDR_XMPU0_CFG_R03_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU0_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03
+ */
+#define XDDR_XMPU0_CFG_R03    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU0_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04Strt
+ */
+#define XDDR_XMPU0_CFG_R04_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU0_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04End
+ */
+#define XDDR_XMPU0_CFG_R04_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU0_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04Mstr
+ */
+#define XDDR_XMPU0_CFG_R04_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU0_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04
+ */
+#define XDDR_XMPU0_CFG_R04    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU0_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05Strt
+ */
+#define XDDR_XMPU0_CFG_R05_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU0_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05End
+ */
+#define XDDR_XMPU0_CFG_R05_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU0_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05Mstr
+ */
+#define XDDR_XMPU0_CFG_R05_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU0_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05
+ */
+#define XDDR_XMPU0_CFG_R05    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU0_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06Strt
+ */
+#define XDDR_XMPU0_CFG_R06_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU0_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06End
+ */
+#define XDDR_XMPU0_CFG_R06_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU0_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06Mstr
+ */
+#define XDDR_XMPU0_CFG_R06_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU0_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06
+ */
+#define XDDR_XMPU0_CFG_R06    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU0_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07Strt
+ */
+#define XDDR_XMPU0_CFG_R07_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU0_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07End
+ */
+#define XDDR_XMPU0_CFG_R07_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU0_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07Mstr
+ */
+#define XDDR_XMPU0_CFG_R07_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU0_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07
+ */
+#define XDDR_XMPU0_CFG_R07    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU0_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08Strt
+ */
+#define XDDR_XMPU0_CFG_R08_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU0_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08End
+ */
+#define XDDR_XMPU0_CFG_R08_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU0_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08Mstr
+ */
+#define XDDR_XMPU0_CFG_R08_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU0_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08
+ */
+#define XDDR_XMPU0_CFG_R08    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU0_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09Strt
+ */
+#define XDDR_XMPU0_CFG_R09_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU0_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09End
+ */
+#define XDDR_XMPU0_CFG_R09_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU0_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09Mstr
+ */
+#define XDDR_XMPU0_CFG_R09_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU0_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09
+ */
+#define XDDR_XMPU0_CFG_R09    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU0_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10Strt
+ */
+#define XDDR_XMPU0_CFG_R10_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU0_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10End
+ */
+#define XDDR_XMPU0_CFG_R10_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU0_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10Mstr
+ */
+#define XDDR_XMPU0_CFG_R10_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU0_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10
+ */
+#define XDDR_XMPU0_CFG_R10    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU0_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11Strt
+ */
+#define XDDR_XMPU0_CFG_R11_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU0_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11End
+ */
+#define XDDR_XMPU0_CFG_R11_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU0_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11Mstr
+ */
+#define XDDR_XMPU0_CFG_R11_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU0_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11
+ */
+#define XDDR_XMPU0_CFG_R11    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU0_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12Strt
+ */
+#define XDDR_XMPU0_CFG_R12_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU0_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12End
+ */
+#define XDDR_XMPU0_CFG_R12_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU0_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12Mstr
+ */
+#define XDDR_XMPU0_CFG_R12_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU0_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12
+ */
+#define XDDR_XMPU0_CFG_R12    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU0_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13Strt
+ */
+#define XDDR_XMPU0_CFG_R13_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU0_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13End
+ */
+#define XDDR_XMPU0_CFG_R13_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU0_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13Mstr
+ */
+#define XDDR_XMPU0_CFG_R13_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU0_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13
+ */
+#define XDDR_XMPU0_CFG_R13    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU0_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14Strt
+ */
+#define XDDR_XMPU0_CFG_R14_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU0_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14End
+ */
+#define XDDR_XMPU0_CFG_R14_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU0_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14Mstr
+ */
+#define XDDR_XMPU0_CFG_R14_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU0_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14
+ */
+#define XDDR_XMPU0_CFG_R14    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU0_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15Strt
+ */
+#define XDDR_XMPU0_CFG_R15_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU0_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15End
+ */
+#define XDDR_XMPU0_CFG_R15_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU0_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15Mstr
+ */
+#define XDDR_XMPU0_CFG_R15_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU0_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15
+ */
+#define XDDR_XMPU0_CFG_R15    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU0_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU0_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu1_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu1_cfg.h
new file mode 100644
index 0000000..5e6bf17
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu1_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU1_CFG_H__
+#define __XDDR_XMPU1_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu1Cfg Base Address
+ */
+#define XDDR_XMPU1_CFG_BASEADDR      0xFD010000UL
+
+/**
+ * Register: XddrXmpu1CfgCtrl
+ */
+#define XDDR_XMPU1_CFG_CTRL    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU1_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu1CfgErrSts1
+ */
+#define XDDR_XMPU1_CFG_ERR_STS1    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU1_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgErrSts2
+ */
+#define XDDR_XMPU1_CFG_ERR_STS2    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU1_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgPoison
+ */
+#define XDDR_XMPU1_CFG_POISON    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU1_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU1_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU1_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU1_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgIsr
+ */
+#define XDDR_XMPU1_CFG_ISR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU1_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgImr
+ */
+#define XDDR_XMPU1_CFG_IMR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU1_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu1CfgIen
+ */
+#define XDDR_XMPU1_CFG_IEN    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU1_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgIds
+ */
+#define XDDR_XMPU1_CFG_IDS    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU1_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgLock
+ */
+#define XDDR_XMPU1_CFG_LOCK    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU1_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00Strt
+ */
+#define XDDR_XMPU1_CFG_R00_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU1_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00End
+ */
+#define XDDR_XMPU1_CFG_R00_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU1_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00Mstr
+ */
+#define XDDR_XMPU1_CFG_R00_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU1_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00
+ */
+#define XDDR_XMPU1_CFG_R00    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU1_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01Strt
+ */
+#define XDDR_XMPU1_CFG_R01_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU1_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01End
+ */
+#define XDDR_XMPU1_CFG_R01_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU1_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01Mstr
+ */
+#define XDDR_XMPU1_CFG_R01_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU1_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01
+ */
+#define XDDR_XMPU1_CFG_R01    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU1_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02Strt
+ */
+#define XDDR_XMPU1_CFG_R02_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU1_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02End
+ */
+#define XDDR_XMPU1_CFG_R02_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU1_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02Mstr
+ */
+#define XDDR_XMPU1_CFG_R02_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU1_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02
+ */
+#define XDDR_XMPU1_CFG_R02    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU1_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03Strt
+ */
+#define XDDR_XMPU1_CFG_R03_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU1_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03End
+ */
+#define XDDR_XMPU1_CFG_R03_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU1_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03Mstr
+ */
+#define XDDR_XMPU1_CFG_R03_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU1_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03
+ */
+#define XDDR_XMPU1_CFG_R03    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU1_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04Strt
+ */
+#define XDDR_XMPU1_CFG_R04_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU1_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04End
+ */
+#define XDDR_XMPU1_CFG_R04_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU1_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04Mstr
+ */
+#define XDDR_XMPU1_CFG_R04_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU1_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04
+ */
+#define XDDR_XMPU1_CFG_R04    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU1_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05Strt
+ */
+#define XDDR_XMPU1_CFG_R05_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU1_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05End
+ */
+#define XDDR_XMPU1_CFG_R05_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU1_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05Mstr
+ */
+#define XDDR_XMPU1_CFG_R05_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU1_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05
+ */
+#define XDDR_XMPU1_CFG_R05    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU1_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06Strt
+ */
+#define XDDR_XMPU1_CFG_R06_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU1_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06End
+ */
+#define XDDR_XMPU1_CFG_R06_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU1_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06Mstr
+ */
+#define XDDR_XMPU1_CFG_R06_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU1_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06
+ */
+#define XDDR_XMPU1_CFG_R06    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU1_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07Strt
+ */
+#define XDDR_XMPU1_CFG_R07_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU1_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07End
+ */
+#define XDDR_XMPU1_CFG_R07_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU1_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07Mstr
+ */
+#define XDDR_XMPU1_CFG_R07_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU1_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07
+ */
+#define XDDR_XMPU1_CFG_R07    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU1_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08Strt
+ */
+#define XDDR_XMPU1_CFG_R08_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU1_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08End
+ */
+#define XDDR_XMPU1_CFG_R08_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU1_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08Mstr
+ */
+#define XDDR_XMPU1_CFG_R08_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU1_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08
+ */
+#define XDDR_XMPU1_CFG_R08    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU1_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09Strt
+ */
+#define XDDR_XMPU1_CFG_R09_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU1_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09End
+ */
+#define XDDR_XMPU1_CFG_R09_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU1_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09Mstr
+ */
+#define XDDR_XMPU1_CFG_R09_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU1_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09
+ */
+#define XDDR_XMPU1_CFG_R09    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU1_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10Strt
+ */
+#define XDDR_XMPU1_CFG_R10_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU1_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10End
+ */
+#define XDDR_XMPU1_CFG_R10_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU1_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10Mstr
+ */
+#define XDDR_XMPU1_CFG_R10_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU1_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10
+ */
+#define XDDR_XMPU1_CFG_R10    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU1_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11Strt
+ */
+#define XDDR_XMPU1_CFG_R11_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU1_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11End
+ */
+#define XDDR_XMPU1_CFG_R11_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU1_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11Mstr
+ */
+#define XDDR_XMPU1_CFG_R11_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU1_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11
+ */
+#define XDDR_XMPU1_CFG_R11    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU1_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12Strt
+ */
+#define XDDR_XMPU1_CFG_R12_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU1_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12End
+ */
+#define XDDR_XMPU1_CFG_R12_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU1_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12Mstr
+ */
+#define XDDR_XMPU1_CFG_R12_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU1_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12
+ */
+#define XDDR_XMPU1_CFG_R12    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU1_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13Strt
+ */
+#define XDDR_XMPU1_CFG_R13_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU1_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13End
+ */
+#define XDDR_XMPU1_CFG_R13_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU1_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13Mstr
+ */
+#define XDDR_XMPU1_CFG_R13_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU1_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13
+ */
+#define XDDR_XMPU1_CFG_R13    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU1_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14Strt
+ */
+#define XDDR_XMPU1_CFG_R14_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU1_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14End
+ */
+#define XDDR_XMPU1_CFG_R14_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU1_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14Mstr
+ */
+#define XDDR_XMPU1_CFG_R14_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU1_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14
+ */
+#define XDDR_XMPU1_CFG_R14    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU1_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15Strt
+ */
+#define XDDR_XMPU1_CFG_R15_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU1_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15End
+ */
+#define XDDR_XMPU1_CFG_R15_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU1_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15Mstr
+ */
+#define XDDR_XMPU1_CFG_R15_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU1_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15
+ */
+#define XDDR_XMPU1_CFG_R15    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU1_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU1_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu2_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu2_cfg.h
new file mode 100644
index 0000000..be1fab3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu2_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU2_CFG_H__
+#define __XDDR_XMPU2_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu2Cfg Base Address
+ */
+#define XDDR_XMPU2_CFG_BASEADDR      0xFD020000UL
+
+/**
+ * Register: XddrXmpu2CfgCtrl
+ */
+#define XDDR_XMPU2_CFG_CTRL    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU2_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu2CfgErrSts1
+ */
+#define XDDR_XMPU2_CFG_ERR_STS1    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU2_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgErrSts2
+ */
+#define XDDR_XMPU2_CFG_ERR_STS2    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU2_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgPoison
+ */
+#define XDDR_XMPU2_CFG_POISON    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU2_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU2_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU2_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU2_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgIsr
+ */
+#define XDDR_XMPU2_CFG_ISR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU2_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgImr
+ */
+#define XDDR_XMPU2_CFG_IMR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU2_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu2CfgIen
+ */
+#define XDDR_XMPU2_CFG_IEN    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU2_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgIds
+ */
+#define XDDR_XMPU2_CFG_IDS    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU2_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgLock
+ */
+#define XDDR_XMPU2_CFG_LOCK    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU2_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00Strt
+ */
+#define XDDR_XMPU2_CFG_R00_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU2_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00End
+ */
+#define XDDR_XMPU2_CFG_R00_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU2_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00Mstr
+ */
+#define XDDR_XMPU2_CFG_R00_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU2_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00
+ */
+#define XDDR_XMPU2_CFG_R00    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU2_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01Strt
+ */
+#define XDDR_XMPU2_CFG_R01_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU2_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01End
+ */
+#define XDDR_XMPU2_CFG_R01_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU2_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01Mstr
+ */
+#define XDDR_XMPU2_CFG_R01_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU2_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01
+ */
+#define XDDR_XMPU2_CFG_R01    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU2_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02Strt
+ */
+#define XDDR_XMPU2_CFG_R02_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU2_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02End
+ */
+#define XDDR_XMPU2_CFG_R02_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU2_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02Mstr
+ */
+#define XDDR_XMPU2_CFG_R02_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU2_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02
+ */
+#define XDDR_XMPU2_CFG_R02    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU2_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03Strt
+ */
+#define XDDR_XMPU2_CFG_R03_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU2_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03End
+ */
+#define XDDR_XMPU2_CFG_R03_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU2_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03Mstr
+ */
+#define XDDR_XMPU2_CFG_R03_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU2_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03
+ */
+#define XDDR_XMPU2_CFG_R03    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU2_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04Strt
+ */
+#define XDDR_XMPU2_CFG_R04_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU2_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04End
+ */
+#define XDDR_XMPU2_CFG_R04_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU2_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04Mstr
+ */
+#define XDDR_XMPU2_CFG_R04_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU2_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04
+ */
+#define XDDR_XMPU2_CFG_R04    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU2_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05Strt
+ */
+#define XDDR_XMPU2_CFG_R05_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU2_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05End
+ */
+#define XDDR_XMPU2_CFG_R05_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU2_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05Mstr
+ */
+#define XDDR_XMPU2_CFG_R05_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU2_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05
+ */
+#define XDDR_XMPU2_CFG_R05    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU2_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06Strt
+ */
+#define XDDR_XMPU2_CFG_R06_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU2_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06End
+ */
+#define XDDR_XMPU2_CFG_R06_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU2_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06Mstr
+ */
+#define XDDR_XMPU2_CFG_R06_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU2_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06
+ */
+#define XDDR_XMPU2_CFG_R06    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU2_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07Strt
+ */
+#define XDDR_XMPU2_CFG_R07_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU2_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07End
+ */
+#define XDDR_XMPU2_CFG_R07_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU2_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07Mstr
+ */
+#define XDDR_XMPU2_CFG_R07_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU2_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07
+ */
+#define XDDR_XMPU2_CFG_R07    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU2_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08Strt
+ */
+#define XDDR_XMPU2_CFG_R08_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU2_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08End
+ */
+#define XDDR_XMPU2_CFG_R08_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU2_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08Mstr
+ */
+#define XDDR_XMPU2_CFG_R08_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU2_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08
+ */
+#define XDDR_XMPU2_CFG_R08    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU2_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09Strt
+ */
+#define XDDR_XMPU2_CFG_R09_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU2_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09End
+ */
+#define XDDR_XMPU2_CFG_R09_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU2_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09Mstr
+ */
+#define XDDR_XMPU2_CFG_R09_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU2_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09
+ */
+#define XDDR_XMPU2_CFG_R09    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU2_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10Strt
+ */
+#define XDDR_XMPU2_CFG_R10_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU2_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10End
+ */
+#define XDDR_XMPU2_CFG_R10_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU2_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10Mstr
+ */
+#define XDDR_XMPU2_CFG_R10_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU2_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10
+ */
+#define XDDR_XMPU2_CFG_R10    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU2_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11Strt
+ */
+#define XDDR_XMPU2_CFG_R11_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU2_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11End
+ */
+#define XDDR_XMPU2_CFG_R11_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU2_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11Mstr
+ */
+#define XDDR_XMPU2_CFG_R11_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU2_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11
+ */
+#define XDDR_XMPU2_CFG_R11    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU2_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12Strt
+ */
+#define XDDR_XMPU2_CFG_R12_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU2_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12End
+ */
+#define XDDR_XMPU2_CFG_R12_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU2_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12Mstr
+ */
+#define XDDR_XMPU2_CFG_R12_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU2_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12
+ */
+#define XDDR_XMPU2_CFG_R12    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU2_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13Strt
+ */
+#define XDDR_XMPU2_CFG_R13_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU2_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13End
+ */
+#define XDDR_XMPU2_CFG_R13_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU2_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13Mstr
+ */
+#define XDDR_XMPU2_CFG_R13_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU2_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13
+ */
+#define XDDR_XMPU2_CFG_R13    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU2_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14Strt
+ */
+#define XDDR_XMPU2_CFG_R14_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU2_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14End
+ */
+#define XDDR_XMPU2_CFG_R14_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU2_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14Mstr
+ */
+#define XDDR_XMPU2_CFG_R14_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU2_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14
+ */
+#define XDDR_XMPU2_CFG_R14    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU2_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15Strt
+ */
+#define XDDR_XMPU2_CFG_R15_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU2_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15End
+ */
+#define XDDR_XMPU2_CFG_R15_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU2_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15Mstr
+ */
+#define XDDR_XMPU2_CFG_R15_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU2_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15
+ */
+#define XDDR_XMPU2_CFG_R15    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU2_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU2_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu3_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu3_cfg.h
new file mode 100644
index 0000000..e8e24d4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu3_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU3_CFG_H__
+#define __XDDR_XMPU3_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu3Cfg Base Address
+ */
+#define XDDR_XMPU3_CFG_BASEADDR      0xFD030000UL
+
+/**
+ * Register: XddrXmpu3CfgCtrl
+ */
+#define XDDR_XMPU3_CFG_CTRL    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU3_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu3CfgErrSts1
+ */
+#define XDDR_XMPU3_CFG_ERR_STS1    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU3_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgErrSts2
+ */
+#define XDDR_XMPU3_CFG_ERR_STS2    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU3_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgPoison
+ */
+#define XDDR_XMPU3_CFG_POISON    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU3_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU3_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU3_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU3_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgIsr
+ */
+#define XDDR_XMPU3_CFG_ISR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU3_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgImr
+ */
+#define XDDR_XMPU3_CFG_IMR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU3_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu3CfgIen
+ */
+#define XDDR_XMPU3_CFG_IEN    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU3_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgIds
+ */
+#define XDDR_XMPU3_CFG_IDS    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU3_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgLock
+ */
+#define XDDR_XMPU3_CFG_LOCK    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU3_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00Strt
+ */
+#define XDDR_XMPU3_CFG_R00_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU3_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00End
+ */
+#define XDDR_XMPU3_CFG_R00_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU3_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00Mstr
+ */
+#define XDDR_XMPU3_CFG_R00_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU3_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00
+ */
+#define XDDR_XMPU3_CFG_R00    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU3_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01Strt
+ */
+#define XDDR_XMPU3_CFG_R01_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU3_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01End
+ */
+#define XDDR_XMPU3_CFG_R01_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU3_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01Mstr
+ */
+#define XDDR_XMPU3_CFG_R01_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU3_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01
+ */
+#define XDDR_XMPU3_CFG_R01    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU3_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02Strt
+ */
+#define XDDR_XMPU3_CFG_R02_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU3_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02End
+ */
+#define XDDR_XMPU3_CFG_R02_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU3_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02Mstr
+ */
+#define XDDR_XMPU3_CFG_R02_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU3_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02
+ */
+#define XDDR_XMPU3_CFG_R02    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU3_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03Strt
+ */
+#define XDDR_XMPU3_CFG_R03_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU3_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03End
+ */
+#define XDDR_XMPU3_CFG_R03_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU3_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03Mstr
+ */
+#define XDDR_XMPU3_CFG_R03_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU3_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03
+ */
+#define XDDR_XMPU3_CFG_R03    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU3_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04Strt
+ */
+#define XDDR_XMPU3_CFG_R04_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU3_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04End
+ */
+#define XDDR_XMPU3_CFG_R04_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU3_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04Mstr
+ */
+#define XDDR_XMPU3_CFG_R04_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU3_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04
+ */
+#define XDDR_XMPU3_CFG_R04    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU3_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05Strt
+ */
+#define XDDR_XMPU3_CFG_R05_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU3_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05End
+ */
+#define XDDR_XMPU3_CFG_R05_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU3_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05Mstr
+ */
+#define XDDR_XMPU3_CFG_R05_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU3_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05
+ */
+#define XDDR_XMPU3_CFG_R05    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU3_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06Strt
+ */
+#define XDDR_XMPU3_CFG_R06_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU3_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06End
+ */
+#define XDDR_XMPU3_CFG_R06_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU3_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06Mstr
+ */
+#define XDDR_XMPU3_CFG_R06_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU3_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06
+ */
+#define XDDR_XMPU3_CFG_R06    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU3_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07Strt
+ */
+#define XDDR_XMPU3_CFG_R07_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU3_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07End
+ */
+#define XDDR_XMPU3_CFG_R07_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU3_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07Mstr
+ */
+#define XDDR_XMPU3_CFG_R07_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU3_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07
+ */
+#define XDDR_XMPU3_CFG_R07    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU3_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08Strt
+ */
+#define XDDR_XMPU3_CFG_R08_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU3_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08End
+ */
+#define XDDR_XMPU3_CFG_R08_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU3_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08Mstr
+ */
+#define XDDR_XMPU3_CFG_R08_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU3_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08
+ */
+#define XDDR_XMPU3_CFG_R08    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU3_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09Strt
+ */
+#define XDDR_XMPU3_CFG_R09_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU3_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09End
+ */
+#define XDDR_XMPU3_CFG_R09_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU3_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09Mstr
+ */
+#define XDDR_XMPU3_CFG_R09_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU3_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09
+ */
+#define XDDR_XMPU3_CFG_R09    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU3_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10Strt
+ */
+#define XDDR_XMPU3_CFG_R10_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU3_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10End
+ */
+#define XDDR_XMPU3_CFG_R10_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU3_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10Mstr
+ */
+#define XDDR_XMPU3_CFG_R10_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU3_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10
+ */
+#define XDDR_XMPU3_CFG_R10    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU3_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11Strt
+ */
+#define XDDR_XMPU3_CFG_R11_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU3_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11End
+ */
+#define XDDR_XMPU3_CFG_R11_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU3_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11Mstr
+ */
+#define XDDR_XMPU3_CFG_R11_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU3_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11
+ */
+#define XDDR_XMPU3_CFG_R11    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU3_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12Strt
+ */
+#define XDDR_XMPU3_CFG_R12_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU3_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12End
+ */
+#define XDDR_XMPU3_CFG_R12_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU3_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12Mstr
+ */
+#define XDDR_XMPU3_CFG_R12_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU3_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12
+ */
+#define XDDR_XMPU3_CFG_R12    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU3_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13Strt
+ */
+#define XDDR_XMPU3_CFG_R13_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU3_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13End
+ */
+#define XDDR_XMPU3_CFG_R13_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU3_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13Mstr
+ */
+#define XDDR_XMPU3_CFG_R13_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU3_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13
+ */
+#define XDDR_XMPU3_CFG_R13    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU3_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14Strt
+ */
+#define XDDR_XMPU3_CFG_R14_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU3_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14End
+ */
+#define XDDR_XMPU3_CFG_R14_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU3_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14Mstr
+ */
+#define XDDR_XMPU3_CFG_R14_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU3_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14
+ */
+#define XDDR_XMPU3_CFG_R14    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU3_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15Strt
+ */
+#define XDDR_XMPU3_CFG_R15_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU3_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15End
+ */
+#define XDDR_XMPU3_CFG_R15_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU3_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15Mstr
+ */
+#define XDDR_XMPU3_CFG_R15_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU3_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15
+ */
+#define XDDR_XMPU3_CFG_R15    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU3_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU3_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu4_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu4_cfg.h
new file mode 100644
index 0000000..c93841f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu4_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU4_CFG_H__
+#define __XDDR_XMPU4_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu4Cfg Base Address
+ */
+#define XDDR_XMPU4_CFG_BASEADDR      0xFD040000UL
+
+/**
+ * Register: XddrXmpu4CfgCtrl
+ */
+#define XDDR_XMPU4_CFG_CTRL    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU4_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu4CfgErrSts1
+ */
+#define XDDR_XMPU4_CFG_ERR_STS1    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU4_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgErrSts2
+ */
+#define XDDR_XMPU4_CFG_ERR_STS2    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU4_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgPoison
+ */
+#define XDDR_XMPU4_CFG_POISON    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU4_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU4_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU4_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU4_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgIsr
+ */
+#define XDDR_XMPU4_CFG_ISR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU4_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgImr
+ */
+#define XDDR_XMPU4_CFG_IMR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU4_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu4CfgIen
+ */
+#define XDDR_XMPU4_CFG_IEN    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU4_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgIds
+ */
+#define XDDR_XMPU4_CFG_IDS    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU4_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgLock
+ */
+#define XDDR_XMPU4_CFG_LOCK    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU4_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00Strt
+ */
+#define XDDR_XMPU4_CFG_R00_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU4_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00End
+ */
+#define XDDR_XMPU4_CFG_R00_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU4_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00Mstr
+ */
+#define XDDR_XMPU4_CFG_R00_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU4_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00
+ */
+#define XDDR_XMPU4_CFG_R00    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU4_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01Strt
+ */
+#define XDDR_XMPU4_CFG_R01_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU4_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01End
+ */
+#define XDDR_XMPU4_CFG_R01_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU4_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01Mstr
+ */
+#define XDDR_XMPU4_CFG_R01_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU4_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01
+ */
+#define XDDR_XMPU4_CFG_R01    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU4_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02Strt
+ */
+#define XDDR_XMPU4_CFG_R02_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU4_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02End
+ */
+#define XDDR_XMPU4_CFG_R02_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU4_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02Mstr
+ */
+#define XDDR_XMPU4_CFG_R02_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU4_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02
+ */
+#define XDDR_XMPU4_CFG_R02    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU4_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03Strt
+ */
+#define XDDR_XMPU4_CFG_R03_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU4_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03End
+ */
+#define XDDR_XMPU4_CFG_R03_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU4_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03Mstr
+ */
+#define XDDR_XMPU4_CFG_R03_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU4_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03
+ */
+#define XDDR_XMPU4_CFG_R03    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU4_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04Strt
+ */
+#define XDDR_XMPU4_CFG_R04_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU4_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04End
+ */
+#define XDDR_XMPU4_CFG_R04_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU4_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04Mstr
+ */
+#define XDDR_XMPU4_CFG_R04_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU4_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04
+ */
+#define XDDR_XMPU4_CFG_R04    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU4_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05Strt
+ */
+#define XDDR_XMPU4_CFG_R05_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU4_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05End
+ */
+#define XDDR_XMPU4_CFG_R05_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU4_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05Mstr
+ */
+#define XDDR_XMPU4_CFG_R05_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU4_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05
+ */
+#define XDDR_XMPU4_CFG_R05    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU4_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06Strt
+ */
+#define XDDR_XMPU4_CFG_R06_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU4_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06End
+ */
+#define XDDR_XMPU4_CFG_R06_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU4_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06Mstr
+ */
+#define XDDR_XMPU4_CFG_R06_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU4_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06
+ */
+#define XDDR_XMPU4_CFG_R06    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU4_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07Strt
+ */
+#define XDDR_XMPU4_CFG_R07_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU4_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07End
+ */
+#define XDDR_XMPU4_CFG_R07_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU4_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07Mstr
+ */
+#define XDDR_XMPU4_CFG_R07_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU4_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07
+ */
+#define XDDR_XMPU4_CFG_R07    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU4_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08Strt
+ */
+#define XDDR_XMPU4_CFG_R08_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU4_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08End
+ */
+#define XDDR_XMPU4_CFG_R08_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU4_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08Mstr
+ */
+#define XDDR_XMPU4_CFG_R08_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU4_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08
+ */
+#define XDDR_XMPU4_CFG_R08    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU4_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09Strt
+ */
+#define XDDR_XMPU4_CFG_R09_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU4_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09End
+ */
+#define XDDR_XMPU4_CFG_R09_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU4_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09Mstr
+ */
+#define XDDR_XMPU4_CFG_R09_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU4_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09
+ */
+#define XDDR_XMPU4_CFG_R09    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU4_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10Strt
+ */
+#define XDDR_XMPU4_CFG_R10_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU4_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10End
+ */
+#define XDDR_XMPU4_CFG_R10_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU4_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10Mstr
+ */
+#define XDDR_XMPU4_CFG_R10_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU4_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10
+ */
+#define XDDR_XMPU4_CFG_R10    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU4_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11Strt
+ */
+#define XDDR_XMPU4_CFG_R11_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU4_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11End
+ */
+#define XDDR_XMPU4_CFG_R11_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU4_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11Mstr
+ */
+#define XDDR_XMPU4_CFG_R11_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU4_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11
+ */
+#define XDDR_XMPU4_CFG_R11    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU4_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12Strt
+ */
+#define XDDR_XMPU4_CFG_R12_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU4_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12End
+ */
+#define XDDR_XMPU4_CFG_R12_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU4_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12Mstr
+ */
+#define XDDR_XMPU4_CFG_R12_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU4_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12
+ */
+#define XDDR_XMPU4_CFG_R12    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU4_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13Strt
+ */
+#define XDDR_XMPU4_CFG_R13_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU4_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13End
+ */
+#define XDDR_XMPU4_CFG_R13_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU4_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13Mstr
+ */
+#define XDDR_XMPU4_CFG_R13_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU4_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13
+ */
+#define XDDR_XMPU4_CFG_R13    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU4_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14Strt
+ */
+#define XDDR_XMPU4_CFG_R14_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU4_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14End
+ */
+#define XDDR_XMPU4_CFG_R14_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU4_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14Mstr
+ */
+#define XDDR_XMPU4_CFG_R14_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU4_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14
+ */
+#define XDDR_XMPU4_CFG_R14    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU4_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15Strt
+ */
+#define XDDR_XMPU4_CFG_R15_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU4_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15End
+ */
+#define XDDR_XMPU4_CFG_R15_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU4_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15Mstr
+ */
+#define XDDR_XMPU4_CFG_R15_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU4_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15
+ */
+#define XDDR_XMPU4_CFG_R15    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU4_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU4_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu5_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu5_cfg.h
new file mode 100644
index 0000000..596d783
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xddr_xmpu5_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU5_CFG_H__
+#define __XDDR_XMPU5_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu5Cfg Base Address
+ */
+#define XDDR_XMPU5_CFG_BASEADDR      0xFD050000UL
+
+/**
+ * Register: XddrXmpu5CfgCtrl
+ */
+#define XDDR_XMPU5_CFG_CTRL    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU5_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu5CfgErrSts1
+ */
+#define XDDR_XMPU5_CFG_ERR_STS1    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU5_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgErrSts2
+ */
+#define XDDR_XMPU5_CFG_ERR_STS2    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU5_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgPoison
+ */
+#define XDDR_XMPU5_CFG_POISON    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU5_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU5_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU5_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU5_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgIsr
+ */
+#define XDDR_XMPU5_CFG_ISR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU5_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgImr
+ */
+#define XDDR_XMPU5_CFG_IMR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU5_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu5CfgIen
+ */
+#define XDDR_XMPU5_CFG_IEN    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU5_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgIds
+ */
+#define XDDR_XMPU5_CFG_IDS    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU5_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgLock
+ */
+#define XDDR_XMPU5_CFG_LOCK    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU5_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00Strt
+ */
+#define XDDR_XMPU5_CFG_R00_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU5_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00End
+ */
+#define XDDR_XMPU5_CFG_R00_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU5_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00Mstr
+ */
+#define XDDR_XMPU5_CFG_R00_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU5_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00
+ */
+#define XDDR_XMPU5_CFG_R00    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU5_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01Strt
+ */
+#define XDDR_XMPU5_CFG_R01_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU5_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01End
+ */
+#define XDDR_XMPU5_CFG_R01_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU5_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01Mstr
+ */
+#define XDDR_XMPU5_CFG_R01_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU5_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01
+ */
+#define XDDR_XMPU5_CFG_R01    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU5_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02Strt
+ */
+#define XDDR_XMPU5_CFG_R02_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU5_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02End
+ */
+#define XDDR_XMPU5_CFG_R02_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU5_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02Mstr
+ */
+#define XDDR_XMPU5_CFG_R02_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU5_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02
+ */
+#define XDDR_XMPU5_CFG_R02    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU5_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03Strt
+ */
+#define XDDR_XMPU5_CFG_R03_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU5_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03End
+ */
+#define XDDR_XMPU5_CFG_R03_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU5_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03Mstr
+ */
+#define XDDR_XMPU5_CFG_R03_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU5_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03
+ */
+#define XDDR_XMPU5_CFG_R03    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU5_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04Strt
+ */
+#define XDDR_XMPU5_CFG_R04_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU5_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04End
+ */
+#define XDDR_XMPU5_CFG_R04_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU5_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04Mstr
+ */
+#define XDDR_XMPU5_CFG_R04_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU5_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04
+ */
+#define XDDR_XMPU5_CFG_R04    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU5_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05Strt
+ */
+#define XDDR_XMPU5_CFG_R05_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU5_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05End
+ */
+#define XDDR_XMPU5_CFG_R05_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU5_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05Mstr
+ */
+#define XDDR_XMPU5_CFG_R05_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU5_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05
+ */
+#define XDDR_XMPU5_CFG_R05    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU5_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06Strt
+ */
+#define XDDR_XMPU5_CFG_R06_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU5_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06End
+ */
+#define XDDR_XMPU5_CFG_R06_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU5_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06Mstr
+ */
+#define XDDR_XMPU5_CFG_R06_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU5_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06
+ */
+#define XDDR_XMPU5_CFG_R06    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU5_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07Strt
+ */
+#define XDDR_XMPU5_CFG_R07_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU5_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07End
+ */
+#define XDDR_XMPU5_CFG_R07_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU5_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07Mstr
+ */
+#define XDDR_XMPU5_CFG_R07_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU5_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07
+ */
+#define XDDR_XMPU5_CFG_R07    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU5_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08Strt
+ */
+#define XDDR_XMPU5_CFG_R08_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU5_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08End
+ */
+#define XDDR_XMPU5_CFG_R08_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU5_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08Mstr
+ */
+#define XDDR_XMPU5_CFG_R08_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU5_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08
+ */
+#define XDDR_XMPU5_CFG_R08    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU5_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09Strt
+ */
+#define XDDR_XMPU5_CFG_R09_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU5_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09End
+ */
+#define XDDR_XMPU5_CFG_R09_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU5_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09Mstr
+ */
+#define XDDR_XMPU5_CFG_R09_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU5_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09
+ */
+#define XDDR_XMPU5_CFG_R09    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU5_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10Strt
+ */
+#define XDDR_XMPU5_CFG_R10_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU5_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10End
+ */
+#define XDDR_XMPU5_CFG_R10_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU5_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10Mstr
+ */
+#define XDDR_XMPU5_CFG_R10_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU5_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10
+ */
+#define XDDR_XMPU5_CFG_R10    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU5_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11Strt
+ */
+#define XDDR_XMPU5_CFG_R11_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU5_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11End
+ */
+#define XDDR_XMPU5_CFG_R11_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU5_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11Mstr
+ */
+#define XDDR_XMPU5_CFG_R11_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU5_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11
+ */
+#define XDDR_XMPU5_CFG_R11    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU5_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12Strt
+ */
+#define XDDR_XMPU5_CFG_R12_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU5_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12End
+ */
+#define XDDR_XMPU5_CFG_R12_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU5_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12Mstr
+ */
+#define XDDR_XMPU5_CFG_R12_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU5_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12
+ */
+#define XDDR_XMPU5_CFG_R12    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU5_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13Strt
+ */
+#define XDDR_XMPU5_CFG_R13_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU5_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13End
+ */
+#define XDDR_XMPU5_CFG_R13_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU5_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13Mstr
+ */
+#define XDDR_XMPU5_CFG_R13_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU5_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13
+ */
+#define XDDR_XMPU5_CFG_R13    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU5_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14Strt
+ */
+#define XDDR_XMPU5_CFG_R14_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU5_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14End
+ */
+#define XDDR_XMPU5_CFG_R14_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU5_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14Mstr
+ */
+#define XDDR_XMPU5_CFG_R14_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU5_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14
+ */
+#define XDDR_XMPU5_CFG_R14    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU5_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15Strt
+ */
+#define XDDR_XMPU5_CFG_R15_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU5_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15End
+ */
+#define XDDR_XMPU5_CFG_R15_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU5_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15Mstr
+ */
+#define XDDR_XMPU5_CFG_R15_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU5_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15
+ */
+#define XDDR_XMPU5_CFG_R15    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU5_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU5_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_slcr.h
new file mode 100644
index 0000000..b9d7028
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_slcr.h
@@ -0,0 +1,382 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_SLCR_H__
+#define __XFPD_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdSlcr Base Address
+ */
+#define XFPD_SLCR_BASEADDR      0xFD610000UL
+
+/**
+ * Register: XfpdSlcrWprot0
+ */
+#define XFPD_SLCR_WPROT0    ( ( XFPD_SLCR_BASEADDR ) + 0x00000000UL )
+#define XFPD_SLCR_WPROT0_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_WPROT0_ACT_SHIFT   0UL
+#define XFPD_SLCR_WPROT0_ACT_WIDTH   1UL
+#define XFPD_SLCR_WPROT0_ACT_MASK    0x00000001UL
+#define XFPD_SLCR_WPROT0_ACT_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrCtrl
+ */
+#define XFPD_SLCR_CTRL    ( ( XFPD_SLCR_BASEADDR ) + 0x00000004UL )
+#define XFPD_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIsr
+ */
+#define XFPD_SLCR_ISR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000008UL )
+#define XFPD_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrImr
+ */
+#define XFPD_SLCR_IMR    ( ( XFPD_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XFPD_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrIer
+ */
+#define XFPD_SLCR_IER    ( ( XFPD_SLCR_BASEADDR ) + 0x00000010UL )
+#define XFPD_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIdr
+ */
+#define XFPD_SLCR_IDR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000014UL )
+#define XFPD_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrItr
+ */
+#define XFPD_SLCR_ITR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000018UL )
+#define XFPD_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrWdtClkSel
+ */
+#define XFPD_SLCR_WDT_CLK_SEL    ( ( XFPD_SLCR_BASEADDR ) + 0x00000100UL )
+#define XFPD_SLCR_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_WDT_CLK_SEL_SHIFT   0UL
+#define XFPD_SLCR_WDT_CLK_SEL_WIDTH   1UL
+#define XFPD_SLCR_WDT_CLK_SEL_MASK    0x00000001UL
+#define XFPD_SLCR_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIntFpd
+ */
+#define XFPD_SLCR_INT_FPD    ( ( XFPD_SLCR_BASEADDR ) + 0x00000200UL )
+#define XFPD_SLCR_INT_FPD_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_INT_FPD_GFM_SEL_SHIFT   0UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_WIDTH   1UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_MASK    0x00000001UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrGpu
+ */
+#define XFPD_SLCR_GPU    ( ( XFPD_SLCR_BASEADDR ) + 0x0000100CUL )
+#define XFPD_SLCR_GPU_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_GPU_ARCACHE_SHIFT   7UL
+#define XFPD_SLCR_GPU_ARCACHE_WIDTH   4UL
+#define XFPD_SLCR_GPU_ARCACHE_MASK    0x00000780UL
+#define XFPD_SLCR_GPU_ARCACHE_DEFVAL  0x0UL
+
+#define XFPD_SLCR_GPU_AWCACHE_SHIFT   3UL
+#define XFPD_SLCR_GPU_AWCACHE_WIDTH   4UL
+#define XFPD_SLCR_GPU_AWCACHE_MASK    0x00000078UL
+#define XFPD_SLCR_GPU_AWCACHE_DEFVAL  0x0UL
+
+#define XFPD_SLCR_GPU_PP1_IDLE_SHIFT   2UL
+#define XFPD_SLCR_GPU_PP1_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_PP1_IDLE_MASK    0x00000004UL
+#define XFPD_SLCR_GPU_PP1_IDLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GPU_PP0_IDLE_SHIFT   1UL
+#define XFPD_SLCR_GPU_PP0_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_PP0_IDLE_MASK    0x00000002UL
+#define XFPD_SLCR_GPU_PP0_IDLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GPU_IDLE_SHIFT   0UL
+#define XFPD_SLCR_GPU_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_IDLE_MASK    0x00000001UL
+#define XFPD_SLCR_GPU_IDLE_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrGdmaCfg
+ */
+#define XFPD_SLCR_GDMA_CFG    ( ( XFPD_SLCR_BASEADDR ) + 0x00003000UL )
+#define XFPD_SLCR_GDMA_CFG_RSTVAL   0x00000048UL
+
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_SHIFT   5UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_WIDTH   2UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_MASK    0x00000060UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_DEFVAL  0x2UL
+
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_SHIFT   0UL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_WIDTH   5UL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_MASK    0x0000001fUL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_DEFVAL  0x8UL
+
+/**
+ * Register: XfpdSlcrGdma
+ */
+#define XFPD_SLCR_GDMA    ( ( XFPD_SLCR_BASEADDR ) + 0x00003010UL )
+#define XFPD_SLCR_GDMA_RSTVAL   0x00003b3bUL
+
+#define XFPD_SLCR_GDMA_RAM1_EMAB_SHIFT   12UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_MASK    0x00007000UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM1_EMASA_SHIFT   11UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_WIDTH   1UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_MASK    0x00000800UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GDMA_RAM1_EMAA_SHIFT   8UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_MASK    0x00000700UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMAB_SHIFT   4UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_MASK    0x00000070UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMASA_SHIFT   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_WIDTH   1UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_MASK    0x00000008UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMAA_SHIFT   0UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_MASK    0x00000007UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_DEFVAL  0x3UL
+
+/**
+ * Register: XfpdSlcrAfiFs
+ */
+#define XFPD_SLCR_AFI_FS    ( ( XFPD_SLCR_BASEADDR ) + 0x00005000UL )
+#define XFPD_SLCR_AFI_FS_RSTVAL   0x00000a00UL
+
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_SHIFT   10UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_WIDTH   2UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_MASK    0x00000c00UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_DEFVAL  0x2UL
+
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_SHIFT   8UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_WIDTH   2UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_MASK    0x00000300UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_DEFVAL  0x2UL
+
+/**
+ * Register: XfpdSlcrErrAtbIsr
+ */
+#define XFPD_SLCR_ERR_ATB_ISR    ( ( XFPD_SLCR_BASEADDR ) + 0x00006000UL )
+#define XFPD_SLCR_ERR_ATB_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrErrAtbImr
+ */
+#define XFPD_SLCR_ERR_ATB_IMR    ( ( XFPD_SLCR_BASEADDR ) + 0x00006004UL )
+#define XFPD_SLCR_ERR_ATB_IMR_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrErrAtbIer
+ */
+#define XFPD_SLCR_ERR_ATB_IER    ( ( XFPD_SLCR_BASEADDR ) + 0x00006008UL )
+#define XFPD_SLCR_ERR_ATB_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrErrAtbIdr
+ */
+#define XFPD_SLCR_ERR_ATB_IDR    ( ( XFPD_SLCR_BASEADDR ) + 0x0000600CUL )
+#define XFPD_SLCR_ERR_ATB_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrAtbCmdstore
+ */
+#define XFPD_SLCR_ATB_CMDSTORE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006010UL )
+#define XFPD_SLCR_ATB_CMDSTORE_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrAtbRespEn
+ */
+#define XFPD_SLCR_ATB_RESP_EN    ( ( XFPD_SLCR_BASEADDR ) + 0x00006014UL )
+#define XFPD_SLCR_ATB_RESP_EN_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrAtbResptype
+ */
+#define XFPD_SLCR_ATB_RESPTYPE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006018UL )
+#define XFPD_SLCR_ATB_RESPTYPE_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrAtbPrescale
+ */
+#define XFPD_SLCR_ATB_PRESCALE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006020UL )
+#define XFPD_SLCR_ATB_PRESCALE_RSTVAL   0x0000ffffUL
+
+#define XFPD_SLCR_ATB_PRESCALE_EN_SHIFT   16UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_WIDTH   1UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_MASK    0x00010000UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_PRESCALE_VAL_SHIFT   0UL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_WIDTH   16UL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_MASK    0x0000ffffUL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_DEFVAL  0xffffUL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_slcr_secure.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_slcr_secure.h
new file mode 100644
index 0000000..cc6983c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_slcr_secure.h
@@ -0,0 +1,277 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_SLCR_SECURE_H__
+#define __XFPD_SLCR_SECURE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdSlcrSecure Base Address
+ */
+#define XFPD_SLCR_SECURE_BASEADDR      0xFD690000UL
+
+/**
+ * Register: XfpdSlcrSecCtrl
+ */
+#define XFPD_SLCR_SEC_CTRL    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000004UL )
+#define XFPD_SLCR_SEC_CTRL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_SHIFT   0UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_WIDTH   1UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecIsr
+ */
+#define XFPD_SLCR_SEC_ISR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000008UL )
+#define XFPD_SLCR_SEC_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecImr
+ */
+#define XFPD_SLCR_SEC_IMR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x0000000CUL )
+#define XFPD_SLCR_SEC_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecIer
+ */
+#define XFPD_SLCR_SEC_IER    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000010UL )
+#define XFPD_SLCR_SEC_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecIdr
+ */
+#define XFPD_SLCR_SEC_IDR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000014UL )
+#define XFPD_SLCR_SEC_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecItr
+ */
+#define XFPD_SLCR_SEC_ITR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000018UL )
+#define XFPD_SLCR_SEC_ITR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecSata
+ */
+#define XFPD_SLCR_SEC_SATA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000020UL )
+#define XFPD_SLCR_SEC_SATA_RSTVAL   0x0000000eUL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_SHIFT   3UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_MASK    0x00000008UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_SHIFT   2UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_MASK    0x00000004UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_SHIFT   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_MASK    0x00000002UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_EN_SHIFT   0UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecPcie
+ */
+#define XFPD_SLCR_SEC_PCIE    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000030UL )
+#define XFPD_SLCR_SEC_PCIE_RSTVAL   0x01ffffffUL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_SHIFT   24UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_MASK    0x01000000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_SHIFT   23UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_MASK    0x00800000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_SHIFT   22UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_MASK    0x00400000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_SHIFT   21UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_MASK    0x00200000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_SHIFT   20UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_MASK    0x00100000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_SHIFT   19UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_MASK    0x00080000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_SHIFT   18UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_MASK    0x00040000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_SHIFT   17UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_MASK    0x00020000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_SHIFT   16UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_MASK    0x00010000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_SHIFT   15UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_MASK    0x00008000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_SHIFT   14UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_MASK    0x00004000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_SHIFT   13UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_MASK    0x00002000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_SHIFT   12UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_MASK    0x00001000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_SHIFT   11UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_MASK    0x00000800UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_SHIFT   10UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_MASK    0x00000400UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_SHIFT   9UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_MASK    0x00000200UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_SHIFT   8UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_MASK    0x00000100UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_SHIFT   7UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_MASK    0x00000080UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_SHIFT   6UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_MASK    0x00000040UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_SHIFT   5UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_MASK    0x00000020UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_SHIFT   4UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_MASK    0x00000010UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_SHIFT   3UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_MASK    0x00000008UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_SHIFT   2UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_MASK    0x00000004UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_SHIFT   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_MASK    0x00000002UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_SHIFT   0UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecDpdma
+ */
+#define XFPD_SLCR_SEC_DPDMA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000040UL )
+#define XFPD_SLCR_SEC_DPDMA_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_SEC_DPDMA_TZ_SHIFT   0UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_WIDTH   1UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecGdma
+ */
+#define XFPD_SLCR_SEC_GDMA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000050UL )
+#define XFPD_SLCR_SEC_GDMA_RSTVAL   0x000000ffUL
+
+#define XFPD_SLCR_SEC_GDMA_TZ_SHIFT   0UL
+#define XFPD_SLCR_SEC_GDMA_TZ_WIDTH   8UL
+#define XFPD_SLCR_SEC_GDMA_TZ_MASK    0x000000ffUL
+#define XFPD_SLCR_SEC_GDMA_TZ_DEFVAL  0xffUL
+
+/**
+ * Register: XfpdSlcrSecGic
+ */
+#define XFPD_SLCR_SEC_GIC    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000060UL )
+#define XFPD_SLCR_SEC_GIC_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_SHIFT   0UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_WIDTH   1UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_SLCR_SECURE_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_xmpu_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_xmpu_cfg.h
new file mode 100644
index 0000000..1c3726c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_xmpu_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_XMPU_CFG_H__
+#define __XFPD_XMPU_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdXmpuCfg Base Address
+ */
+#define XFPD_XMPU_CFG_BASEADDR      0xFD5D0000UL
+
+/**
+ * Register: XfpdXmpuCfgCtrl
+ */
+#define XFPD_XMPU_CFG_CTRL    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000000UL )
+#define XFPD_XMPU_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuCfgErrSts1
+ */
+#define XFPD_XMPU_CFG_ERR_STS1    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000004UL )
+#define XFPD_XMPU_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgErrSts2
+ */
+#define XFPD_XMPU_CFG_ERR_STS2    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000008UL )
+#define XFPD_XMPU_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgPoison
+ */
+#define XFPD_XMPU_CFG_POISON    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000000CUL )
+#define XFPD_XMPU_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_POISON_BASE_SHIFT   0UL
+#define XFPD_XMPU_CFG_POISON_BASE_WIDTH   20UL
+#define XFPD_XMPU_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XFPD_XMPU_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgIsr
+ */
+#define XFPD_XMPU_CFG_ISR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000010UL )
+#define XFPD_XMPU_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgImr
+ */
+#define XFPD_XMPU_CFG_IMR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000014UL )
+#define XFPD_XMPU_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuCfgIen
+ */
+#define XFPD_XMPU_CFG_IEN    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000018UL )
+#define XFPD_XMPU_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgIds
+ */
+#define XFPD_XMPU_CFG_IDS    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000001CUL )
+#define XFPD_XMPU_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgLock
+ */
+#define XFPD_XMPU_CFG_LOCK    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000020UL )
+#define XFPD_XMPU_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00Strt
+ */
+#define XFPD_XMPU_CFG_R00_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000100UL )
+#define XFPD_XMPU_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00End
+ */
+#define XFPD_XMPU_CFG_R00_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000104UL )
+#define XFPD_XMPU_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00Mstr
+ */
+#define XFPD_XMPU_CFG_R00_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000108UL )
+#define XFPD_XMPU_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00
+ */
+#define XFPD_XMPU_CFG_R00    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000010CUL )
+#define XFPD_XMPU_CFG_R00_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R00_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R00_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R00_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R00_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01Strt
+ */
+#define XFPD_XMPU_CFG_R01_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000110UL )
+#define XFPD_XMPU_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01End
+ */
+#define XFPD_XMPU_CFG_R01_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000114UL )
+#define XFPD_XMPU_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01Mstr
+ */
+#define XFPD_XMPU_CFG_R01_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000118UL )
+#define XFPD_XMPU_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01
+ */
+#define XFPD_XMPU_CFG_R01    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000011CUL )
+#define XFPD_XMPU_CFG_R01_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R01_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R01_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R01_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R01_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02Strt
+ */
+#define XFPD_XMPU_CFG_R02_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000120UL )
+#define XFPD_XMPU_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02End
+ */
+#define XFPD_XMPU_CFG_R02_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000124UL )
+#define XFPD_XMPU_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02Mstr
+ */
+#define XFPD_XMPU_CFG_R02_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000128UL )
+#define XFPD_XMPU_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02
+ */
+#define XFPD_XMPU_CFG_R02    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000012CUL )
+#define XFPD_XMPU_CFG_R02_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R02_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R02_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R02_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R02_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03Strt
+ */
+#define XFPD_XMPU_CFG_R03_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000130UL )
+#define XFPD_XMPU_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03End
+ */
+#define XFPD_XMPU_CFG_R03_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000134UL )
+#define XFPD_XMPU_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03Mstr
+ */
+#define XFPD_XMPU_CFG_R03_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000138UL )
+#define XFPD_XMPU_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03
+ */
+#define XFPD_XMPU_CFG_R03    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000013CUL )
+#define XFPD_XMPU_CFG_R03_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R03_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R03_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R03_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R03_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04Strt
+ */
+#define XFPD_XMPU_CFG_R04_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000140UL )
+#define XFPD_XMPU_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04End
+ */
+#define XFPD_XMPU_CFG_R04_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000144UL )
+#define XFPD_XMPU_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04Mstr
+ */
+#define XFPD_XMPU_CFG_R04_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000148UL )
+#define XFPD_XMPU_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04
+ */
+#define XFPD_XMPU_CFG_R04    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000014CUL )
+#define XFPD_XMPU_CFG_R04_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R04_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R04_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R04_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R04_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05Strt
+ */
+#define XFPD_XMPU_CFG_R05_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000150UL )
+#define XFPD_XMPU_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05End
+ */
+#define XFPD_XMPU_CFG_R05_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000154UL )
+#define XFPD_XMPU_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05Mstr
+ */
+#define XFPD_XMPU_CFG_R05_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000158UL )
+#define XFPD_XMPU_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05
+ */
+#define XFPD_XMPU_CFG_R05    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000015CUL )
+#define XFPD_XMPU_CFG_R05_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R05_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R05_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R05_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R05_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06Strt
+ */
+#define XFPD_XMPU_CFG_R06_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000160UL )
+#define XFPD_XMPU_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06End
+ */
+#define XFPD_XMPU_CFG_R06_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000164UL )
+#define XFPD_XMPU_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06Mstr
+ */
+#define XFPD_XMPU_CFG_R06_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000168UL )
+#define XFPD_XMPU_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06
+ */
+#define XFPD_XMPU_CFG_R06    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000016CUL )
+#define XFPD_XMPU_CFG_R06_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R06_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R06_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R06_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R06_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07Strt
+ */
+#define XFPD_XMPU_CFG_R07_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000170UL )
+#define XFPD_XMPU_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07End
+ */
+#define XFPD_XMPU_CFG_R07_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000174UL )
+#define XFPD_XMPU_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07Mstr
+ */
+#define XFPD_XMPU_CFG_R07_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000178UL )
+#define XFPD_XMPU_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07
+ */
+#define XFPD_XMPU_CFG_R07    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000017CUL )
+#define XFPD_XMPU_CFG_R07_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R07_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R07_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R07_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R07_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08Strt
+ */
+#define XFPD_XMPU_CFG_R08_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000180UL )
+#define XFPD_XMPU_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08End
+ */
+#define XFPD_XMPU_CFG_R08_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000184UL )
+#define XFPD_XMPU_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08Mstr
+ */
+#define XFPD_XMPU_CFG_R08_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000188UL )
+#define XFPD_XMPU_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08
+ */
+#define XFPD_XMPU_CFG_R08    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000018CUL )
+#define XFPD_XMPU_CFG_R08_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R08_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R08_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R08_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R08_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09Strt
+ */
+#define XFPD_XMPU_CFG_R09_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000190UL )
+#define XFPD_XMPU_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09End
+ */
+#define XFPD_XMPU_CFG_R09_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000194UL )
+#define XFPD_XMPU_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09Mstr
+ */
+#define XFPD_XMPU_CFG_R09_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000198UL )
+#define XFPD_XMPU_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09
+ */
+#define XFPD_XMPU_CFG_R09    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000019CUL )
+#define XFPD_XMPU_CFG_R09_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R09_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R09_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R09_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R09_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10Strt
+ */
+#define XFPD_XMPU_CFG_R10_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A0UL )
+#define XFPD_XMPU_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10End
+ */
+#define XFPD_XMPU_CFG_R10_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A4UL )
+#define XFPD_XMPU_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10Mstr
+ */
+#define XFPD_XMPU_CFG_R10_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A8UL )
+#define XFPD_XMPU_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10
+ */
+#define XFPD_XMPU_CFG_R10    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001ACUL )
+#define XFPD_XMPU_CFG_R10_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R10_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R10_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R10_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R10_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11Strt
+ */
+#define XFPD_XMPU_CFG_R11_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B0UL )
+#define XFPD_XMPU_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11End
+ */
+#define XFPD_XMPU_CFG_R11_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B4UL )
+#define XFPD_XMPU_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11Mstr
+ */
+#define XFPD_XMPU_CFG_R11_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B8UL )
+#define XFPD_XMPU_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11
+ */
+#define XFPD_XMPU_CFG_R11    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001BCUL )
+#define XFPD_XMPU_CFG_R11_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R11_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R11_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R11_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R11_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12Strt
+ */
+#define XFPD_XMPU_CFG_R12_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C0UL )
+#define XFPD_XMPU_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12End
+ */
+#define XFPD_XMPU_CFG_R12_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C4UL )
+#define XFPD_XMPU_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12Mstr
+ */
+#define XFPD_XMPU_CFG_R12_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C8UL )
+#define XFPD_XMPU_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12
+ */
+#define XFPD_XMPU_CFG_R12    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001CCUL )
+#define XFPD_XMPU_CFG_R12_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R12_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R12_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R12_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R12_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13Strt
+ */
+#define XFPD_XMPU_CFG_R13_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D0UL )
+#define XFPD_XMPU_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13End
+ */
+#define XFPD_XMPU_CFG_R13_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D4UL )
+#define XFPD_XMPU_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13Mstr
+ */
+#define XFPD_XMPU_CFG_R13_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D8UL )
+#define XFPD_XMPU_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13
+ */
+#define XFPD_XMPU_CFG_R13    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001DCUL )
+#define XFPD_XMPU_CFG_R13_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R13_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R13_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R13_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R13_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14Strt
+ */
+#define XFPD_XMPU_CFG_R14_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E0UL )
+#define XFPD_XMPU_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14End
+ */
+#define XFPD_XMPU_CFG_R14_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E4UL )
+#define XFPD_XMPU_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14Mstr
+ */
+#define XFPD_XMPU_CFG_R14_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E8UL )
+#define XFPD_XMPU_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14
+ */
+#define XFPD_XMPU_CFG_R14    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001ECUL )
+#define XFPD_XMPU_CFG_R14_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R14_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R14_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R14_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R14_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15Strt
+ */
+#define XFPD_XMPU_CFG_R15_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F0UL )
+#define XFPD_XMPU_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15End
+ */
+#define XFPD_XMPU_CFG_R15_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F4UL )
+#define XFPD_XMPU_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15Mstr
+ */
+#define XFPD_XMPU_CFG_R15_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F8UL )
+#define XFPD_XMPU_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15
+ */
+#define XFPD_XMPU_CFG_R15    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001FCUL )
+#define XFPD_XMPU_CFG_R15_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R15_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R15_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R15_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R15_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_XMPU_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_xmpu_sink.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_xmpu_sink.h
new file mode 100644
index 0000000..77e82c5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xfpd_xmpu_sink.h
@@ -0,0 +1,81 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_XMPU_SINK_H__
+#define __XFPD_XMPU_SINK_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdXmpuSink Base Address
+ */
+#define XFPD_XMPU_SINK_BASEADDR      0xFD4F0000UL
+
+/**
+ * Register: XfpdXmpuSinkErrSts
+ */
+#define XFPD_XMPU_SINK_ERR_STS    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF00UL )
+#define XFPD_XMPU_SINK_ERR_STS_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_SHIFT   31UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_WIDTH   1UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_MASK    0x80000000UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_DEFVAL  0x0UL
+
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_SHIFT   0UL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_WIDTH   12UL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_MASK    0x00000fffUL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkIsr
+ */
+#define XFPD_XMPU_SINK_ISR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF10UL )
+#define XFPD_XMPU_SINK_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkImr
+ */
+#define XFPD_XMPU_SINK_IMR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF14UL )
+#define XFPD_XMPU_SINK_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuSinkIer
+ */
+#define XFPD_XMPU_SINK_IER    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF18UL )
+#define XFPD_XMPU_SINK_IER_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_IERADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkIdr
+ */
+#define XFPD_XMPU_SINK_IDR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF1CUL )
+#define XFPD_XMPU_SINK_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_XMPU_SINK_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_cache.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_cache.c
new file mode 100644
index 0000000..14c10e1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_cache.c
@@ -0,0 +1,648 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.c
+*
+* Contains required functions for the ARM cache functionality. Cache APIs are
+* yet to be implemented. They are left blank to avoid any compilation error
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xil_io.h"
+#include "xpseudo_asm.h"
+#include "xparameters.h"
+#include "xreg_cortexa53.h"
+#include "xil_exception.h"
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+#define IRQ_FIQ_MASK 0xC0U	/* Mask IRQ and FIQ interrupts in cpsr */
+
+/****************************************************************************
+*
+* Enable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+
+void Xil_DCacheEnable(void)
+{
+	u32 CtrlReg;
+	CtrlReg = mfcp(SCTLR_EL3);
+	/* enable caches only if they are disabled */
+	if((CtrlReg & XREG_CONTROL_DCACHE_BIT) == 0X00000000U){
+
+		/* invalidate the Data cache */
+		Xil_DCacheInvalidate();
+
+		CtrlReg |= XREG_CONTROL_DCACHE_BIT;
+
+		/* enable the Data cache */
+		mtcp(SCTLR_EL3,CtrlReg);
+	}
+}
+
+/****************************************************************************
+*
+* Disable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheDisable(void)
+{
+	u32 CtrlReg;
+	/* clean and invalidate the Data cache */
+	Xil_DCacheFlush();
+	CtrlReg = mfcp(SCTLR_EL3);
+
+	CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
+	/* disable the Data cache */
+	mtcp(SCTLR_EL3,CtrlReg);
+}
+
+/****************************************************************************
+*
+* invalidate the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidate(void)
+{
+	register u32 CsidReg, C7Reg;
+	u32 LineSize, NumWays;
+	u32 Way, WayIndex,WayAdjust, Set, SetIndex, NumSet, NumCacheLevel, CacheLevel,CacheLevelIndex;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+
+	/* Number of level of cache*/
+	NumCacheLevel = (mfcp(CLIDR_EL1)>>24U) & 0x00000007U;
+
+	CacheLevel=0U;
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(CSSELR_EL1,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(CCSIDR_EL1);
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0X00000001U;
+
+	/*Number of Set*/
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0X00000001U;
+
+	WayAdjust = clz(NumWays) - (u32)0x0000001FU;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex =0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex =0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcpdc(ISW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += (0x00000001U << WayAdjust);
+	}
+
+	/* Wait for invalidate to complete */
+	dsb();
+
+	/* Select cache level 1 and D cache in CSSR */
+	CacheLevel += (0x00000001U<<1U) ;
+	mtcp(CSSELR_EL1,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(CCSIDR_EL1);
+
+	/* Get the cacheline size, way size, index size from csidr */
+		LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0x00000001U;
+
+	/* Number of Sets */
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0x00000001U;
+
+	WayAdjust = clz(NumWays) - (u32)0x0000001FU;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex = 0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex = 0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcpdc(ISW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += (0x00000001U << WayAdjust);
+	}
+	/* Wait for invalidate to complete */
+	dsb();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate a Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the modified contents
+* are written to system memory before the line is invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 6 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateLine(INTPTR adr)
+{
+
+	u32 currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(CSSELR_EL1,0x0);
+	mtcpdc(IVAC,(adr & (~0x3F)));
+	/* Wait for invalidate to complete */
+	dsb();
+	/* Select cache level 1 and D cache in CSSR */
+	mtcp(CSSELR_EL1,0x2);
+	mtcpdc(IVAC,(adr & (~0x3F)));
+	/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate the Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated. If the cacheline
+* is modified (dirty), the modified contents are written to system memory
+* before the line is invalidated.
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateRange(INTPTR  adr, u32 len)
+{
+	const u32 cacheline = 64U;
+	u32 end;
+	u32 tempadr = adr;
+	u32 tempend;
+	u32 currmask;
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	if (len != 0U) {
+		end = tempadr + len;
+		tempend = end;
+
+		if ((tempadr & (cacheline-1U)) != 0U) {
+			tempadr &= (~(cacheline - 1U));
+			Xil_DCacheFlushLine(tempadr);
+			tempadr += cacheline;
+		}
+		if ((tempend & (cacheline-1U)) != 0U) {
+			tempend &= (~(cacheline - 1U));
+			Xil_DCacheFlushLine(tempend);
+		}
+
+		while (tempadr < tempend) {
+			/* Select cache level 0 and D cache in CSSR */
+			mtcp(CSSELR_EL1,0x0);
+			/* Invalidate Data cache line */
+			mtcpdc(IVAC,(tempadr & (~0x3F)));
+			/* Wait for invalidate to complete */
+			dsb();
+			/* Select cache level 0 and D cache in CSSR */
+			mtcp(CSSELR_EL1,0x2);
+			/* Invalidate Data cache line */
+			mtcpdc(IVAC,(tempadr & (~0x3F)));
+			/* Wait for invalidate to complete */
+			dsb();
+			tempadr += cacheline;
+		}
+	}
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheFlush(void)
+{
+	register u32 CsidReg, C7Reg;
+	u32 LineSize, NumWays;
+	u32 Way, WayIndex,WayAdjust, Set, SetIndex, NumSet, NumCacheLevel, CacheLevel,CacheLevelIndex;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+
+	/* Number of level of cache*/
+	NumCacheLevel = (mfcp(CLIDR_EL1)>>24U) & 0x00000007U;
+
+	CacheLevel = 0U;
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(CSSELR_EL1,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(CCSIDR_EL1);
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0x00000001U;
+
+	/*Number of Set*/
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0x00000001U;
+
+	WayAdjust = clz(NumWays) - (u32)0x0000001FU;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Flush all the cachelines */
+	for (WayIndex = 0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex = 0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcpdc(CISW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += (0x00000001U << WayAdjust);
+	}
+
+	/* Wait for Flush to complete */
+	dsb();
+
+	/* Select cache level 1 and D cache in CSSR */
+	CacheLevel += (0x00000001U << 1U);
+	mtcp(CSSELR_EL1,CacheLevel);
+	isb();
+
+	CsidReg = mfcp(CCSIDR_EL1);
+
+	/* Get the cacheline size, way size, index size from csidr */
+		LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x00001FFFU) >> 3U;
+	NumWays += 0x00000001U;
+
+	/* Number of Sets */
+	NumSet = (CsidReg >> 13U) & 0x00007FFFU;
+	NumSet += 0x00000001U;
+
+	WayAdjust=clz(NumWays) - (u32)0x0000001FU;
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Flush all the cachelines */
+	for (WayIndex =0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex =0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set | CacheLevel;
+			mtcpdc(CISW,C7Reg);
+			Set += (0x00000001U << LineSize);
+		}
+		Set=0U;
+		Way += (0x00000001U<
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+******************************************************************************/
+#ifndef XIL_CACHE_H
+#define XIL_CACHE_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void Xil_DCacheEnable(void);
+void Xil_DCacheDisable(void);
+void Xil_DCacheInvalidate(void);
+void Xil_DCacheInvalidateRange(INTPTR adr, u32 len);
+void Xil_DCacheInvalidateLine(INTPTR adr);
+void Xil_DCacheFlush(void);
+void Xil_DCacheFlushRange(INTPTR adr, u32 len);
+void Xil_DCacheFlushLine(INTPTR adr);
+
+void Xil_ICacheEnable(void);
+void Xil_ICacheDisable(void);
+void Xil_ICacheInvalidate(void);
+void Xil_ICacheInvalidateRange(INTPTR adr, u32 len);
+void Xil_ICacheInvalidateLine(INTPTR adr);
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_exception.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_exception.c
new file mode 100644
index 0000000..5325bd5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_exception.c
@@ -0,0 +1,214 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xil_exception.c
+*
+* This file contains low-level driver functions for the Cortex A53 exception
+* Handler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+#include "xpseudo_asm.h"
+#include "xdebug.h"
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Function Prototypes *****************************/
+
+static void Xil_ExceptionNullHandler(void *Data);
+
+/************************** Variable Definitions *****************************/
+/*
+ * Exception vector table to store handlers for each exception vector.
+ */
+XExc_VectorTableEntry XExc_VectorTable[XIL_EXCEPTION_ID_LAST + 1] =
+{
+        {Xil_ExceptionNullHandler, NULL},
+        {Xil_SyncAbortHandler, NULL},
+        {Xil_ExceptionNullHandler, NULL},
+        {Xil_ExceptionNullHandler, NULL},
+        {Xil_SErrorAbortHandler, NULL},
+
+};
+/****************************************************************************/
+/**
+*
+* This function is a stub Handler that is the default Handler that gets called
+* if the application has not setup a Handler for a specific  exception. The
+* function interface has to match the interface specified for a Handler even
+* though none of the arguments are used.
+*
+* @param	Data is unused by this function.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void Xil_ExceptionNullHandler(void *Data)
+{
+	(void *)Data;
+DieLoop: goto DieLoop;
+}
+
+/****************************************************************************/
+/**
+*
+* The function is a common API used to initialize exception handlers across all
+* processors supported. For ARM CortexA53, the exception handlers are being
+* initialized statically and hence this function does not do anything.
+*
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xil_ExceptionInit(void)
+{
+	return;
+}
+
+/*****************************************************************************/
+/**
+*
+* Makes the connection between the Id of the exception source and the
+* associated Handler that is to run when the exception is recognized. The
+* argument provided in this call as the Data is used as the argument
+* for the Handler when it is called.
+*
+* @param	exception_id contains the ID of the exception source and should
+*		be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+		See xil_exception_l.h for further information.
+* @param	Handler to the Handler for that exception.
+* @param	Data is a reference to Data that will be passed to the
+*		Handler when it gets called.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRegisterHandler(u32 Exception_id,
+				    Xil_ExceptionHandler Handler,
+				    void *Data)
+{
+	XExc_VectorTable[Exception_id].Handler = Handler;
+	XExc_VectorTable[Exception_id].Data = Data;
+}
+
+/*****************************************************************************/
+/**
+*
+* Removes the Handler for a specific exception Id. The stub Handler is then
+* registered for this exception Id.
+*
+* @param	exception_id contains the ID of the exception source and should
+*		be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+*		See xil_exception_l.h for further information.
+
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRemoveHandler(u32 Exception_id)
+{
+	Xil_ExceptionRegisterHandler(Exception_id,
+				       Xil_ExceptionNullHandler,
+				       NULL);
+}
+/*****************************************************************************/
+/**
+*
+* Default Synchronous abort handler which prints a debug message on console if
+* Debug flag is enabled
+*
+* @param        None
+*
+* @return       None.
+*
+* @note         None.
+*
+****************************************************************************/
+
+void Xil_SyncAbortHandler(void *CallBackRef){
+	xdbg_printf(XDBG_DEBUG_ERROR, "Synchronous abort \n");
+	while(1) {
+		;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* Default SError abort handler which prints a debug message on console if
+* Debug flag is enabled
+*
+* @param        None
+*
+* @return       None.
+*
+* @note         None.
+*
+****************************************************************************/
+void Xil_SErrorAbortHandler(void *CallBackRef){
+	xdbg_printf(XDBG_DEBUG_ERROR, "Synchronous abort \n");
+	while(1) {
+		;
+	}
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_exception.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_exception.h
new file mode 100644
index 0000000..38ba1bf
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_exception.h
@@ -0,0 +1,168 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_exception.h
+*
+* This header file contains ARM Cortex A53 specific exception related APIs.
+* For exception related functions that can be used across all Xilinx supported
+* processors, please use xil_exception.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_EXCEPTION_H /* prevent circular inclusions */
+#define XIL_EXCEPTION_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions ****************************/
+
+#define XIL_EXCEPTION_FIQ	XREG_CPSR_FIQ_ENABLE
+#define XIL_EXCEPTION_IRQ	XREG_CPSR_IRQ_ENABLE
+#define XIL_EXCEPTION_ALL	(XREG_CPSR_FIQ_ENABLE | XREG_CPSR_IRQ_ENABLE)
+
+#define XIL_EXCEPTION_ID_FIRST			0U
+#define XIL_EXCEPTION_ID_SYNC_INT		1U
+#define XIL_EXCEPTION_ID_IRQ_INT		2U
+#define XIL_EXCEPTION_ID_FIQ_INT		3U
+#define XIL_EXCEPTION_ID_SERROR_ABORT_INT		4U
+#define XIL_EXCEPTION_ID_LAST			5U
+
+/*
+ * XIL_EXCEPTION_ID_INT is defined for all Xilinx processors.
+ */
+#define XIL_EXCEPTION_ID_INT	XIL_EXCEPTION_ID_IRQ_INT
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef is the exception handler function.
+ */
+typedef void (*Xil_ExceptionHandler)(void *data);
+typedef void (*Xil_InterruptHandler)(void *data);
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* Enable Exceptions.
+*
+* @param	Mask for exceptions to be enabled.
+*
+* @return	None.
+*
+* @note		If bit is 0, exception is enabled.
+*		C-Style signature: void Xil_ExceptionEnableMask(Mask)
+*
+******************************************************************************/
+
+#define Xil_ExceptionEnableMask(Mask)	\
+		mtcpsr(mfcpsr() & ~ ((Mask) & XIL_EXCEPTION_ALL))
+
+/****************************************************************************/
+/**
+* Enable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionEnable() \
+		Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ)
+
+/****************************************************************************/
+/**
+* Disable Exceptions.
+*
+* @param	Mask for exceptions to be enabled.
+*
+* @return	None.
+*
+* @note		If bit is 1, exception is disabled.
+*		C-Style signature: Xil_ExceptionDisableMask(Mask)
+*
+******************************************************************************/
+
+#define Xil_ExceptionDisableMask(Mask)	\
+		mtcpsr(mfcpsr() | ((Mask) & XIL_EXCEPTION_ALL))
+
+/****************************************************************************/
+/**
+* Disable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionDisable() \
+		Xil_ExceptionDisableMask(XIL_EXCEPTION_IRQ)
+
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+extern void Xil_ExceptionRegisterHandler(u32 Exception_id,
+					 Xil_ExceptionHandler Handler,
+					 void *Data);
+
+extern void Xil_ExceptionRemoveHandler(u32 Exception_id);
+
+extern void Xil_ExceptionInit(void);
+
+void Xil_SyncAbortHandler(void *CallBackRef);
+
+void Xil_SErrorAbortHandler(void *CallBackRef);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_EXCEPTION_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_io.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_io.c
new file mode 100644
index 0000000..6213e1a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_io.c
@@ -0,0 +1,381 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.c
+*
+* Contains I/O functions for memory-mapped or non-memory-mapped I/O
+* architectures.  These functions encapsulate Cortex A53 architecture-specific
+* I/O requirements.
+*
+* @note
+*
+* This file contains architecture-dependent code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xpseudo_asm.h"
+#include "xreg_cortexa53.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for an 8-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u8 Xil_In8(INTPTR Addr)
+{
+	return *(volatile u8 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 16-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_In16(INTPTR Addr)
+{
+	return *(volatile u16 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 32-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_In32(INTPTR Addr)
+{
+	return *(volatile u32 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for an 8-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out8(INTPTR Addr, u8 Value)
+{
+	u8 *LocalAddr = (u8 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 16-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out16(INTPTR Addr, u16 Value)
+{
+	u16 *LocalAddr = (u16 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 32-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out32(INTPTR Addr, u32 Value)
+{
+	u32 *LocalAddr = (u32 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 64-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out64(INTPTR Addr, u64 Value)
+{
+	u64 *LocalAddr = (u64 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 64-bit memory location by reading the
+* specified Value to the the specified address.
+*
+* @param	OutAddress contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+u64 Xil_In64(INTPTR Addr)
+{
+	return *(volatile u64 *) Addr;
+}
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 16-bit memory location by reading from the
+* specified address and returning the byte-swapped Value read from that
+* address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The byte-swapped Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_In16BE(INTPTR Addr)
+{
+	u16 temp;
+	u16 result;
+
+	temp = Xil_In16(Addr);
+
+	result = Xil_EndianSwap16(temp);
+
+	return result;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 32-bit memory location by reading from the
+* specified address and returning the byte-swapped Value read from that
+* address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The byte-swapped Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_In32BE(INTPTR Addr)
+{
+	u32 temp;
+	u32 result;
+
+	temp = Xil_In32(Addr);
+
+	result = Xil_EndianSwap32(temp);
+
+	return result;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 16-bit memory location by writing the
+* specified Value to the the specified address. The Value is byte-swapped
+* before being written.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out16BE(INTPTR Addr, u16 Value)
+{
+	u16 temp;
+
+	temp = Xil_EndianSwap16(Value);
+
+    Xil_Out16(Addr, temp);
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 32-bit memory location by writing the
+* specified Value to the the specified address. The Value is byte-swapped
+* before being written.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out32BE(INTPTR Addr, u32 Value)
+{
+	u32 temp;
+
+	temp = Xil_EndianSwap32(Value);
+
+    Xil_Out32(Addr, temp);
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a 16-bit endian converion.
+*
+* @param	Data contains the value to be converted.
+*
+* @return	converted value.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_EndianSwap16(u16 Data)
+{
+	return (u16) (((Data & 0xFF00U) >> 8U) | ((Data & 0x00FFU) << 8U));
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a 32-bit endian converion.
+*
+* @param	Data contains the value to be converted.
+*
+* @return	converted value.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_EndianSwap32(u32 Data)
+{
+	u16 LoWord;
+	u16 HiWord;
+
+	/* get each of the half words from the 32 bit word */
+
+	LoWord = (u16) (Data & 0x0000FFFFU);
+	HiWord = (u16) ((Data & 0xFFFF0000U) >> 16U);
+
+	/* byte swap each of the 16 bit half words */
+
+	LoWord = (((LoWord & 0xFF00U) >> 8U) | ((LoWord & 0x00FFU) << 8U));
+	HiWord = (((HiWord & 0xFF00U) >> 8U) | ((HiWord & 0x00FFU) << 8U));
+
+	/* swap the half words before returning the value */
+
+	return ((((u32)LoWord) << (u32)16U) | (u32)HiWord);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_io.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_io.h
new file mode 100644
index 0000000..f89eec0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_io.h
@@ -0,0 +1,240 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.h
+*
+* This file contains the interface for the general IO component, which
+* encapsulates the Input/Output functions for processors that do not
+* require any special I/O handling.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+******************************************************************************/
+
+#ifndef XIL_IO_H           /* prevent circular inclusions */
+#define XIL_IO_H           /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+#include "xil_printf.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#  define SYNCHRONIZE_IO	dmb()
+#  define INST_SYNC		isb()
+#  define DATA_SYNC		dsb()
+
+
+/*****************************************************************************/
+/**
+*
+* Perform an big-endian input operation for a 16-bit memory location
+* by reading from the specified address and returning the Value read from
+* that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The Value read from the specified input address with the
+*		proper endianness. The return Value has the same endianness
+*		as that of the processor, i.e. if the processor is
+*		little-engian, the return Value is the byte-swapped Value read
+*		from the address.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_In16LE(Addr) Xil_In16((Addr))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian input operation for a 32-bit memory location
+* by reading from the specified address and returning the Value read from
+* that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The Value read from the specified input address with the
+*		proper endianness. The return Value has the same endianness
+*		as that of the processor, i.e. if the processor is
+*		little-engian, the return Value is the byte-swapped Value read
+*		from the address.
+*
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_In32LE(Addr) Xil_In32((Addr))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian output operation for a 16-bit memory location
+* by writing the specified Value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the Value to be output at the specified address.
+*		The Value has the same endianness as that of the processor.
+*		If the processor is little-endian, the byte-swapped Value is
+*		written to the address.
+*
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Out16LE(Addr, Value) Xil_Out16((Addr), (Value))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian output operation for a 32-bit memory location
+* by writing the specified Value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the Value to be output at the specified address.
+*		The Value has the same endianness as that of the processor.
+*		If the processor is little-endian, the byte-swapped Value is
+*		written to the address.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Out32LE(Addr, Value) Xil_Out32((Addr), (Value))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 32-bit number from host byte order to network byte order.
+*
+* @param	Data the 32-bit number to be converted.
+*
+* @return	The converted 32-bit number in network byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Htonl(Data) Xil_EndianSwap32((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 16-bit number from host byte order to network byte order.
+*
+* @param	Data the 16-bit number to be converted.
+*
+* @return	The converted 16-bit number in network byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Htons(Data) Xil_EndianSwap16((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 32-bit number from network byte order to host byte order.
+*
+* @param	Data the 32-bit number to be converted.
+*
+* @return	The converted 32-bit number in host byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Ntohl(Data) Xil_EndianSwap32((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 16-bit number from network byte order to host byte order.
+*
+* @param	Data the 16-bit number to be converted.
+*
+* @return	The converted 16-bit number in host byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Ntohs(Data) Xil_EndianSwap16((Data))
+
+/************************** Function Prototypes ******************************/
+
+/* The following functions allow the software to be transportable across
+ * processors which may use memory mapped I/O or I/O which is mapped into a
+ * seperate address space.
+ */
+u8 Xil_In8(INTPTR Addr);
+u16 Xil_In16(INTPTR Addr);
+u32 Xil_In32(INTPTR Addr);
+u64 Xil_In64(INTPTR Addr);
+
+void Xil_Out8(INTPTR Addr, u8 Value);
+void Xil_Out16(INTPTR Addr, u16 Value);
+void Xil_Out32(INTPTR Addr, u32 Value);
+void Xil_Out64(INTPTR Addr, u64 Value);
+
+
+u16 Xil_In16BE(INTPTR Addr);
+u32 Xil_In32BE(INTPTR Addr);
+void Xil_Out16BE(INTPTR Addr, u16 Value);
+void Xil_Out32BE(INTPTR Addr, u32 Value);
+
+u16 Xil_EndianSwap16(u16 Data);
+u32 Xil_EndianSwap32(u32 Data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_mmu.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_mmu.c
new file mode 100644
index 0000000..18b26b0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_mmu.c
@@ -0,0 +1,110 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.c
+*
+* This file provides APIs for enabling/disabling MMU and setting the memory
+* attributes for sections, in the MMU translation table.
+* MMU APIs are yet to be implemented. They are left blank to avoid any
+* compilation error
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+#include "xil_mmu.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+extern INTPTR MMUTableL1;
+extern INTPTR MMUTableL2;
+/************************** Function Prototypes ******************************/
+/*****************************************************************************
+*
+* Set the memory attributes for a section, in the translation table.
+*
+* @param	addr is the address for which attributes are to be set.
+* @param	attrib specifies the attributes for that memory region.
+*
+* @return	None.
+*
+* @note		The MMU and D-cache need not be disabled before changing an
+*			translation table attribute.
+*
+******************************************************************************/
+
+void Xil_SetTlbAttributes(INTPTR Addr, u64 attrib)
+{
+	INTPTR *ptr;
+	INTPTR section;
+	/* if region is less than 4GB MMUTable level 2 need to be modified */
+	if(Addr<0x100000000){
+	section = Addr / 0x00200000U;
+	ptr = &MMUTableL2 + section;
+	*ptr = (Addr & (~0x001FFFFFU)) | attrib;
+	}
+	/* if region is greater than 4GB MMUTable level 1 need to be modified */
+	else{
+	section = Addr / 0x40000000U;
+	ptr = &MMUTableL1 + section;
+	*ptr = (Addr & (~0x3FFFFFFFU)) | attrib;
+	}
+
+	Xil_DCacheFlush();
+	mtcptlbi(ALLE3);
+
+	dsb(); /* ensure completion of the BP and TLB invalidation */
+    isb(); /* synchronize context on this processor */
+
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_mmu.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_mmu.h
new file mode 100644
index 0000000..737f9ea
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_mmu.h
@@ -0,0 +1,79 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.h
+*
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef XIL_MMU_H
+#define XIL_MMU_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void Xil_SetTlbAttributes(INTPTR Addr, u64 attrib);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_MMU_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_printf.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_printf.c
new file mode 100644
index 0000000..4482074
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_printf.c
@@ -0,0 +1,329 @@
+/*---------------------------------------------------*/
+/* Modified from :                                   */
+/* Public Domain version of printf                   */
+/* Rud Merriam, Compsult, Inc. Houston, Tx.          */
+/* For Embedded Systems Programming, 1991            */
+/*                                                   */
+/*---------------------------------------------------*/
+#include "xil_printf.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include 
+#include 
+#include 
+
+typedef struct params_s {
+    s32 len;
+    s32 num1;
+    s32 num2;
+    char8 pad_character;
+    s32 do_padding;
+    s32 left_flag;
+} params_t;
+
+static void padding( const s32 l_flag,const params_t *par);
+static void outs(const charptr lp, params_t *par);
+static void outnum( const s32 n, const s32 base, params_t *par);
+static s32 getnum( charptr* linep);
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine puts pad characters into the output  */
+/* buffer.                                           */
+/*                                                   */
+static void padding( const s32 l_flag, const params_t *par)
+{
+    s32 i;
+
+    if ((par->do_padding != 0) && (l_flag != 0) && (par->len < par->num1)) {
+		i=(par->len);
+        for (; i<(par->num1); i++) {
+            outbyte( par->pad_character);
+		}
+    }
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a string to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+static void outs(const charptr lp, params_t *par)
+{
+    charptr LocalPtr;
+	LocalPtr = lp;
+    /* pad on left if needed                         */
+	if(LocalPtr != NULL) {
+		par->len = (s32)strlen( LocalPtr);
+	}
+    padding( !(par->left_flag), par);
+
+    /* Move string to the buffer                     */
+    while (((*LocalPtr) != (char8)0) && ((par->num2) != 0)) {
+		(par->num2)--;
+        outbyte(*LocalPtr);
+		LocalPtr += 1;
+}
+
+    /* Pad on right if needed                        */
+    /* CR 439175 - elided next stmt. Seemed bogus.   */
+    /* par->len = strlen( lp)                      */
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a number to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+
+static void outnum( const s32 n, const s32 base, params_t *par)
+{
+    charptr cp;
+    s32 negative;
+	s32 i;
+    char8 outbuf[32];
+    const char8 digits[] = "0123456789ABCDEF";
+    u32 num;
+    for(i = 0; i<32; i++) {
+	outbuf[i] = '0';
+    }
+
+    /* Check if number is negative                   */
+    if ((base == 10) && (n < 0L)) {
+        negative = 1;
+		num =(-(n));
+    }
+    else{
+        num = (n);
+        negative = 0;
+    }
+
+    /* Build number (backwards) in outbuf            */
+    i = 0;
+    do {
+		outbuf[i] = digits[(num % base)];
+		i++;
+		num /= base;
+    } while (num > 0);
+
+    if (negative != 0) {
+		outbuf[i] = '-';
+		i++;
+	}
+
+    outbuf[i] = 0;
+    i--;
+
+    /* Move the converted number to the buffer and   */
+    /* add in the padding where needed.              */
+    par->len = (s32)strlen(outbuf);
+    padding( !(par->left_flag), par);
+    while (&outbuf[i] >= outbuf) {
+	outbyte( outbuf[i] );
+		i--;
+}
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine gets a number from the format        */
+/* string.                                           */
+/*                                                   */
+static s32 getnum( charptr* linep)
+{
+    s32 n;
+    s32 ResultIsDigit = 0;
+    charptr cptr;
+    n = 0;
+    cptr = *linep;
+	if(cptr != NULL){
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    while (ResultIsDigit != 0) {
+		if(cptr != NULL){
+			n = ((n*10) + (((s32)*cptr) - (s32)'0'));
+			cptr += 1;
+			if(cptr != NULL){
+				ResultIsDigit = isdigit(((s32)*cptr));
+			}
+		}
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    *linep = ((charptr )(cptr));
+    return(n);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine operates just like a printf/sprintf  */
+/* routine. It outputs a set of data under the       */
+/* control of a formatting string. Not all of the    */
+/* standard C format control are supported. The ones */
+/* provided are primarily those needed for embedded  */
+/* systems work. Primarily the floating point        */
+/* routines are omitted. Other formats could be      */
+/* added easily by following the examples shown for  */
+/* the supported formats.                            */
+/*                                                   */
+
+/* void esp_printf( const func_ptr f_ptr,
+   const charptr ctrl1, ...) */
+void xil_printf( const char8 *ctrl1, ...)
+{
+	s32 Check;
+    s32 long_flag;
+    s32 dot_flag;
+
+    params_t par;
+
+    char8 ch;
+    va_list argp;
+    char8 *ctrl = (char8 *)ctrl1;
+
+    va_start( argp, ctrl1);
+
+    while ((ctrl != NULL) && (*ctrl != (char8)0)) {
+
+        /* move format string chars to buffer until a  */
+        /* format control is found.                    */
+        if (*ctrl != '%') {
+            outbyte(*ctrl);
+			ctrl += 1;
+            continue;
+        }
+
+        /* initialize all the flags for this format.   */
+        dot_flag = 0;
+		long_flag = 0;
+		par.left_flag = 0;
+		par.do_padding = 0;
+        par.pad_character = ' ';
+        par.num2=32767;
+		par.num1=0;
+		par.len=0;
+
+ try_next:
+		if(ctrl != NULL) {
+			ctrl += 1;
+		}
+		if(ctrl != NULL) {
+			ch = *ctrl;
+		}
+		else {
+			ch = *ctrl;
+		}
+
+        if (isdigit((s32)ch) != 0) {
+            if (dot_flag != 0) {
+                par.num2 = getnum(&ctrl);
+			}
+            else {
+                if (ch == '0') {
+                    par.pad_character = '0';
+				}
+				if(ctrl != NULL) {
+			par.num1 = getnum(&ctrl);
+				}
+                par.do_padding = 1;
+            }
+            if(ctrl != NULL) {
+			ctrl -= 1;
+			}
+            goto try_next;
+        }
+
+        switch (tolower((s32)ch)) {
+            case '%':
+                outbyte( '%');
+                Check = 1;
+                break;
+
+            case '-':
+                par.left_flag = 1;
+                Check = 0;
+                break;
+
+            case '.':
+                dot_flag = 1;
+                Check = 0;
+                break;
+
+            case 'l':
+                long_flag = 1;
+                Check = 0;
+                break;
+
+            case 'd':
+                if ((long_flag != 0) || (ch == 'D')) {
+                    outnum( va_arg(argp, s32), 10L, &par);
+                }
+                else {
+                    outnum( va_arg(argp, s32), 10L, &par);
+                }
+				Check = 1;
+                break;
+            case 'x':
+                outnum((s32)va_arg(argp, s32), 16L, &par);
+                Check = 1;
+                break;
+
+            case 's':
+                outs( va_arg( argp, char *), &par);
+                Check = 1;
+                break;
+
+            case 'c':
+                outbyte( va_arg( argp, s32));
+                Check = 1;
+                break;
+
+            case '\\':
+                switch (*ctrl) {
+                    case 'a':
+                        outbyte( ((char8)0x07));
+                        break;
+                    case 'h':
+                        outbyte( ((char8)0x08));
+                        break;
+                    case 'r':
+                        outbyte( ((char8)0x0D));
+                        break;
+                    case 'n':
+                        outbyte( ((char8)0x0D));
+                        outbyte( ((char8)0x0A));
+                        break;
+                    default:
+                        outbyte( *ctrl);
+                        break;
+                }
+                ctrl += 1;
+                Check = 0;
+                break;
+
+            default:
+		Check = 1;
+		break;
+        }
+        if(Check == 1) {
+			if(ctrl != NULL) {
+				ctrl += 1;
+			}
+                continue;
+        }
+        goto try_next;
+    }
+    va_end( argp);
+}
+
+/*---------------------------------------------------*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_printf.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_printf.h
new file mode 100644
index 0000000..77ba280
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xil_printf.h
@@ -0,0 +1,44 @@
+ #ifndef XIL_PRINTF_H
+ #define XIL_PRINTF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include 
+#include 
+#include 
+#include "xil_types.h"
+#include "xparameters.h"
+
+/*----------------------------------------------------*/
+/* Use the following parameter passing structure to   */
+/* make xil_printf re-entrant.                        */
+/*----------------------------------------------------*/
+
+struct params_s;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+typedef char8* charptr;
+typedef s32 (*func_ptr)(int c);
+
+/*                                                   */
+
+void xil_printf( const char8 *ctrl1, ...);
+void print( const char8 *ptr);
+extern void outbyte (char8 c);
+extern char8 inbyte(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xiou_secure_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xiou_secure_slcr.h
new file mode 100644
index 0000000..98952f0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xiou_secure_slcr.h
@@ -0,0 +1,174 @@
+/* ### HEADER ### */
+
+#ifndef __XIOU_SECURE_SLCR_H__
+#define __XIOU_SECURE_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XiouSecureSlcr Base Address
+ */
+#define XIOU_SECURE_SLCR_BASEADDR      0xFF240000UL
+
+/**
+ * Register: XiouSecSlcrAxiWprtcn
+ */
+#define XIOU_SEC_SLCR_AXI_WPRTCN    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000000UL )
+#define XIOU_SEC_SLCR_AXI_WPRTCN_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_SHIFT   25UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_MASK    0x0e000000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_SHIFT   22UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_MASK    0x01c00000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_SHIFT   19UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_MASK    0x00380000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_SHIFT   16UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_MASK    0x00070000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   9UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000e00UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   6UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x000001c0UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000038UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   0UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000007UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrAxiRprtcn
+ */
+#define XIOU_SEC_SLCR_AXI_RPRTCN    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000004UL )
+#define XIOU_SEC_SLCR_AXI_RPRTCN_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_SHIFT   22UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_MASK    0x01c00000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_SHIFT   19UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_MASK    0x00380000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_SHIFT   16UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_MASK    0x00070000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   9UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000e00UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   6UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x000001c0UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000038UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   0UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000007UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrCtrl
+ */
+#define XIOU_SEC_SLCR_CTRL    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000040UL )
+#define XIOU_SEC_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrIsr
+ */
+#define XIOU_SEC_SLCR_ISR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000044UL )
+#define XIOU_SEC_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrImr
+ */
+#define XIOU_SEC_SLCR_IMR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000048UL )
+#define XIOU_SEC_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSecSlcrIer
+ */
+#define XIOU_SEC_SLCR_IER    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XIOU_SEC_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrIdr
+ */
+#define XIOU_SEC_SLCR_IDR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000050UL )
+#define XIOU_SEC_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrItr
+ */
+#define XIOU_SEC_SLCR_ITR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000054UL )
+#define XIOU_SEC_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XIOU_SECURE_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xiou_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xiou_slcr.h
new file mode 100644
index 0000000..b30914e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xiou_slcr.h
@@ -0,0 +1,4029 @@
+/* ### HEADER ### */
+
+#ifndef __XIOU_SLCR_H__
+#define __XIOU_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XiouSlcr Base Address
+ */
+#define XIOU_SLCR_BASEADDR      0xFF180000UL
+
+/**
+ * Register: XiouSlcrMioPin0
+ */
+#define XIOU_SLCR_MIO_PIN_0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000000UL )
+#define XIOU_SLCR_MIO_PIN_0_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin1
+ */
+#define XIOU_SLCR_MIO_PIN_1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000004UL )
+#define XIOU_SLCR_MIO_PIN_1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin2
+ */
+#define XIOU_SLCR_MIO_PIN_2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000008UL )
+#define XIOU_SLCR_MIO_PIN_2_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin3
+ */
+#define XIOU_SLCR_MIO_PIN_3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XIOU_SLCR_MIO_PIN_3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin4
+ */
+#define XIOU_SLCR_MIO_PIN_4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000010UL )
+#define XIOU_SLCR_MIO_PIN_4_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin5
+ */
+#define XIOU_SLCR_MIO_PIN_5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000014UL )
+#define XIOU_SLCR_MIO_PIN_5_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin6
+ */
+#define XIOU_SLCR_MIO_PIN_6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000018UL )
+#define XIOU_SLCR_MIO_PIN_6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin7
+ */
+#define XIOU_SLCR_MIO_PIN_7    ( ( XIOU_SLCR_BASEADDR ) + 0x0000001CUL )
+#define XIOU_SLCR_MIO_PIN_7_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin8
+ */
+#define XIOU_SLCR_MIO_PIN_8    ( ( XIOU_SLCR_BASEADDR ) + 0x00000020UL )
+#define XIOU_SLCR_MIO_PIN_8_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin9
+ */
+#define XIOU_SLCR_MIO_PIN_9    ( ( XIOU_SLCR_BASEADDR ) + 0x00000024UL )
+#define XIOU_SLCR_MIO_PIN_9_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin10
+ */
+#define XIOU_SLCR_MIO_PIN_10    ( ( XIOU_SLCR_BASEADDR ) + 0x00000028UL )
+#define XIOU_SLCR_MIO_PIN_10_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin11
+ */
+#define XIOU_SLCR_MIO_PIN_11    ( ( XIOU_SLCR_BASEADDR ) + 0x0000002CUL )
+#define XIOU_SLCR_MIO_PIN_11_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin12
+ */
+#define XIOU_SLCR_MIO_PIN_12    ( ( XIOU_SLCR_BASEADDR ) + 0x00000030UL )
+#define XIOU_SLCR_MIO_PIN_12_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin13
+ */
+#define XIOU_SLCR_MIO_PIN_13    ( ( XIOU_SLCR_BASEADDR ) + 0x00000034UL )
+#define XIOU_SLCR_MIO_PIN_13_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin14
+ */
+#define XIOU_SLCR_MIO_PIN_14    ( ( XIOU_SLCR_BASEADDR ) + 0x00000038UL )
+#define XIOU_SLCR_MIO_PIN_14_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin15
+ */
+#define XIOU_SLCR_MIO_PIN_15    ( ( XIOU_SLCR_BASEADDR ) + 0x0000003CUL )
+#define XIOU_SLCR_MIO_PIN_15_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin16
+ */
+#define XIOU_SLCR_MIO_PIN_16    ( ( XIOU_SLCR_BASEADDR ) + 0x00000040UL )
+#define XIOU_SLCR_MIO_PIN_16_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin17
+ */
+#define XIOU_SLCR_MIO_PIN_17    ( ( XIOU_SLCR_BASEADDR ) + 0x00000044UL )
+#define XIOU_SLCR_MIO_PIN_17_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin18
+ */
+#define XIOU_SLCR_MIO_PIN_18    ( ( XIOU_SLCR_BASEADDR ) + 0x00000048UL )
+#define XIOU_SLCR_MIO_PIN_18_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin19
+ */
+#define XIOU_SLCR_MIO_PIN_19    ( ( XIOU_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XIOU_SLCR_MIO_PIN_19_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin20
+ */
+#define XIOU_SLCR_MIO_PIN_20    ( ( XIOU_SLCR_BASEADDR ) + 0x00000050UL )
+#define XIOU_SLCR_MIO_PIN_20_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin21
+ */
+#define XIOU_SLCR_MIO_PIN_21    ( ( XIOU_SLCR_BASEADDR ) + 0x00000054UL )
+#define XIOU_SLCR_MIO_PIN_21_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin22
+ */
+#define XIOU_SLCR_MIO_PIN_22    ( ( XIOU_SLCR_BASEADDR ) + 0x00000058UL )
+#define XIOU_SLCR_MIO_PIN_22_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin23
+ */
+#define XIOU_SLCR_MIO_PIN_23    ( ( XIOU_SLCR_BASEADDR ) + 0x0000005CUL )
+#define XIOU_SLCR_MIO_PIN_23_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin24
+ */
+#define XIOU_SLCR_MIO_PIN_24    ( ( XIOU_SLCR_BASEADDR ) + 0x00000060UL )
+#define XIOU_SLCR_MIO_PIN_24_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin25
+ */
+#define XIOU_SLCR_MIO_PIN_25    ( ( XIOU_SLCR_BASEADDR ) + 0x00000064UL )
+#define XIOU_SLCR_MIO_PIN_25_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin26
+ */
+#define XIOU_SLCR_MIO_PIN_26    ( ( XIOU_SLCR_BASEADDR ) + 0x00000068UL )
+#define XIOU_SLCR_MIO_PIN_26_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin27
+ */
+#define XIOU_SLCR_MIO_PIN_27    ( ( XIOU_SLCR_BASEADDR ) + 0x0000006CUL )
+#define XIOU_SLCR_MIO_PIN_27_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin28
+ */
+#define XIOU_SLCR_MIO_PIN_28    ( ( XIOU_SLCR_BASEADDR ) + 0x00000070UL )
+#define XIOU_SLCR_MIO_PIN_28_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin29
+ */
+#define XIOU_SLCR_MIO_PIN_29    ( ( XIOU_SLCR_BASEADDR ) + 0x00000074UL )
+#define XIOU_SLCR_MIO_PIN_29_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin30
+ */
+#define XIOU_SLCR_MIO_PIN_30    ( ( XIOU_SLCR_BASEADDR ) + 0x00000078UL )
+#define XIOU_SLCR_MIO_PIN_30_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin31
+ */
+#define XIOU_SLCR_MIO_PIN_31    ( ( XIOU_SLCR_BASEADDR ) + 0x0000007CUL )
+#define XIOU_SLCR_MIO_PIN_31_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin32
+ */
+#define XIOU_SLCR_MIO_PIN_32    ( ( XIOU_SLCR_BASEADDR ) + 0x00000080UL )
+#define XIOU_SLCR_MIO_PIN_32_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin33
+ */
+#define XIOU_SLCR_MIO_PIN_33    ( ( XIOU_SLCR_BASEADDR ) + 0x00000084UL )
+#define XIOU_SLCR_MIO_PIN_33_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin34
+ */
+#define XIOU_SLCR_MIO_PIN_34    ( ( XIOU_SLCR_BASEADDR ) + 0x00000088UL )
+#define XIOU_SLCR_MIO_PIN_34_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin35
+ */
+#define XIOU_SLCR_MIO_PIN_35    ( ( XIOU_SLCR_BASEADDR ) + 0x0000008CUL )
+#define XIOU_SLCR_MIO_PIN_35_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin36
+ */
+#define XIOU_SLCR_MIO_PIN_36    ( ( XIOU_SLCR_BASEADDR ) + 0x00000090UL )
+#define XIOU_SLCR_MIO_PIN_36_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin37
+ */
+#define XIOU_SLCR_MIO_PIN_37    ( ( XIOU_SLCR_BASEADDR ) + 0x00000094UL )
+#define XIOU_SLCR_MIO_PIN_37_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin38
+ */
+#define XIOU_SLCR_MIO_PIN_38    ( ( XIOU_SLCR_BASEADDR ) + 0x00000098UL )
+#define XIOU_SLCR_MIO_PIN_38_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin39
+ */
+#define XIOU_SLCR_MIO_PIN_39    ( ( XIOU_SLCR_BASEADDR ) + 0x0000009CUL )
+#define XIOU_SLCR_MIO_PIN_39_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin40
+ */
+#define XIOU_SLCR_MIO_PIN_40    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A0UL )
+#define XIOU_SLCR_MIO_PIN_40_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin41
+ */
+#define XIOU_SLCR_MIO_PIN_41    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A4UL )
+#define XIOU_SLCR_MIO_PIN_41_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin42
+ */
+#define XIOU_SLCR_MIO_PIN_42    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A8UL )
+#define XIOU_SLCR_MIO_PIN_42_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin43
+ */
+#define XIOU_SLCR_MIO_PIN_43    ( ( XIOU_SLCR_BASEADDR ) + 0x000000ACUL )
+#define XIOU_SLCR_MIO_PIN_43_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin44
+ */
+#define XIOU_SLCR_MIO_PIN_44    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B0UL )
+#define XIOU_SLCR_MIO_PIN_44_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin45
+ */
+#define XIOU_SLCR_MIO_PIN_45    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B4UL )
+#define XIOU_SLCR_MIO_PIN_45_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin46
+ */
+#define XIOU_SLCR_MIO_PIN_46    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B8UL )
+#define XIOU_SLCR_MIO_PIN_46_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin47
+ */
+#define XIOU_SLCR_MIO_PIN_47    ( ( XIOU_SLCR_BASEADDR ) + 0x000000BCUL )
+#define XIOU_SLCR_MIO_PIN_47_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin48
+ */
+#define XIOU_SLCR_MIO_PIN_48    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C0UL )
+#define XIOU_SLCR_MIO_PIN_48_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin49
+ */
+#define XIOU_SLCR_MIO_PIN_49    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C4UL )
+#define XIOU_SLCR_MIO_PIN_49_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin50
+ */
+#define XIOU_SLCR_MIO_PIN_50    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C8UL )
+#define XIOU_SLCR_MIO_PIN_50_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin51
+ */
+#define XIOU_SLCR_MIO_PIN_51    ( ( XIOU_SLCR_BASEADDR ) + 0x000000CCUL )
+#define XIOU_SLCR_MIO_PIN_51_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin52
+ */
+#define XIOU_SLCR_MIO_PIN_52    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D0UL )
+#define XIOU_SLCR_MIO_PIN_52_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin53
+ */
+#define XIOU_SLCR_MIO_PIN_53    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D4UL )
+#define XIOU_SLCR_MIO_PIN_53_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin54
+ */
+#define XIOU_SLCR_MIO_PIN_54    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D8UL )
+#define XIOU_SLCR_MIO_PIN_54_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin55
+ */
+#define XIOU_SLCR_MIO_PIN_55    ( ( XIOU_SLCR_BASEADDR ) + 0x000000DCUL )
+#define XIOU_SLCR_MIO_PIN_55_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin56
+ */
+#define XIOU_SLCR_MIO_PIN_56    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E0UL )
+#define XIOU_SLCR_MIO_PIN_56_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin57
+ */
+#define XIOU_SLCR_MIO_PIN_57    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E4UL )
+#define XIOU_SLCR_MIO_PIN_57_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin58
+ */
+#define XIOU_SLCR_MIO_PIN_58    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E8UL )
+#define XIOU_SLCR_MIO_PIN_58_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin59
+ */
+#define XIOU_SLCR_MIO_PIN_59    ( ( XIOU_SLCR_BASEADDR ) + 0x000000ECUL )
+#define XIOU_SLCR_MIO_PIN_59_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin60
+ */
+#define XIOU_SLCR_MIO_PIN_60    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F0UL )
+#define XIOU_SLCR_MIO_PIN_60_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin61
+ */
+#define XIOU_SLCR_MIO_PIN_61    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F4UL )
+#define XIOU_SLCR_MIO_PIN_61_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin62
+ */
+#define XIOU_SLCR_MIO_PIN_62    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F8UL )
+#define XIOU_SLCR_MIO_PIN_62_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin63
+ */
+#define XIOU_SLCR_MIO_PIN_63    ( ( XIOU_SLCR_BASEADDR ) + 0x000000FCUL )
+#define XIOU_SLCR_MIO_PIN_63_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin64
+ */
+#define XIOU_SLCR_MIO_PIN_64    ( ( XIOU_SLCR_BASEADDR ) + 0x00000100UL )
+#define XIOU_SLCR_MIO_PIN_64_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin65
+ */
+#define XIOU_SLCR_MIO_PIN_65    ( ( XIOU_SLCR_BASEADDR ) + 0x00000104UL )
+#define XIOU_SLCR_MIO_PIN_65_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin66
+ */
+#define XIOU_SLCR_MIO_PIN_66    ( ( XIOU_SLCR_BASEADDR ) + 0x00000108UL )
+#define XIOU_SLCR_MIO_PIN_66_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin67
+ */
+#define XIOU_SLCR_MIO_PIN_67    ( ( XIOU_SLCR_BASEADDR ) + 0x0000010CUL )
+#define XIOU_SLCR_MIO_PIN_67_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin68
+ */
+#define XIOU_SLCR_MIO_PIN_68    ( ( XIOU_SLCR_BASEADDR ) + 0x00000110UL )
+#define XIOU_SLCR_MIO_PIN_68_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin69
+ */
+#define XIOU_SLCR_MIO_PIN_69    ( ( XIOU_SLCR_BASEADDR ) + 0x00000114UL )
+#define XIOU_SLCR_MIO_PIN_69_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin70
+ */
+#define XIOU_SLCR_MIO_PIN_70    ( ( XIOU_SLCR_BASEADDR ) + 0x00000118UL )
+#define XIOU_SLCR_MIO_PIN_70_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin71
+ */
+#define XIOU_SLCR_MIO_PIN_71    ( ( XIOU_SLCR_BASEADDR ) + 0x0000011CUL )
+#define XIOU_SLCR_MIO_PIN_71_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin72
+ */
+#define XIOU_SLCR_MIO_PIN_72    ( ( XIOU_SLCR_BASEADDR ) + 0x00000120UL )
+#define XIOU_SLCR_MIO_PIN_72_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin73
+ */
+#define XIOU_SLCR_MIO_PIN_73    ( ( XIOU_SLCR_BASEADDR ) + 0x00000124UL )
+#define XIOU_SLCR_MIO_PIN_73_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin74
+ */
+#define XIOU_SLCR_MIO_PIN_74    ( ( XIOU_SLCR_BASEADDR ) + 0x00000128UL )
+#define XIOU_SLCR_MIO_PIN_74_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin75
+ */
+#define XIOU_SLCR_MIO_PIN_75    ( ( XIOU_SLCR_BASEADDR ) + 0x0000012CUL )
+#define XIOU_SLCR_MIO_PIN_75_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin76
+ */
+#define XIOU_SLCR_MIO_PIN_76    ( ( XIOU_SLCR_BASEADDR ) + 0x00000130UL )
+#define XIOU_SLCR_MIO_PIN_76_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin77
+ */
+#define XIOU_SLCR_MIO_PIN_77    ( ( XIOU_SLCR_BASEADDR ) + 0x00000134UL )
+#define XIOU_SLCR_MIO_PIN_77_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl0
+ */
+#define XIOU_SLCR_BANK0_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000138UL )
+#define XIOU_SLCR_BANK0_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl1
+ */
+#define XIOU_SLCR_BANK0_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000013CUL )
+#define XIOU_SLCR_BANK0_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl3
+ */
+#define XIOU_SLCR_BANK0_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000140UL )
+#define XIOU_SLCR_BANK0_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl4
+ */
+#define XIOU_SLCR_BANK0_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000144UL )
+#define XIOU_SLCR_BANK0_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl5
+ */
+#define XIOU_SLCR_BANK0_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000148UL )
+#define XIOU_SLCR_BANK0_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl6
+ */
+#define XIOU_SLCR_BANK0_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x0000014CUL )
+#define XIOU_SLCR_BANK0_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Sts
+ */
+#define XIOU_SLCR_BANK0_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000150UL )
+#define XIOU_SLCR_BANK0_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl0
+ */
+#define XIOU_SLCR_BANK1_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000154UL )
+#define XIOU_SLCR_BANK1_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl1
+ */
+#define XIOU_SLCR_BANK1_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000158UL )
+#define XIOU_SLCR_BANK1_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl3
+ */
+#define XIOU_SLCR_BANK1_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000015CUL )
+#define XIOU_SLCR_BANK1_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl4
+ */
+#define XIOU_SLCR_BANK1_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000160UL )
+#define XIOU_SLCR_BANK1_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl5
+ */
+#define XIOU_SLCR_BANK1_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000164UL )
+#define XIOU_SLCR_BANK1_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl6
+ */
+#define XIOU_SLCR_BANK1_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000168UL )
+#define XIOU_SLCR_BANK1_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Sts
+ */
+#define XIOU_SLCR_BANK1_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x0000016CUL )
+#define XIOU_SLCR_BANK1_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl0
+ */
+#define XIOU_SLCR_BANK2_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000170UL )
+#define XIOU_SLCR_BANK2_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl1
+ */
+#define XIOU_SLCR_BANK2_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000174UL )
+#define XIOU_SLCR_BANK2_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl3
+ */
+#define XIOU_SLCR_BANK2_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000178UL )
+#define XIOU_SLCR_BANK2_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl4
+ */
+#define XIOU_SLCR_BANK2_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x0000017CUL )
+#define XIOU_SLCR_BANK2_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl5
+ */
+#define XIOU_SLCR_BANK2_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000180UL )
+#define XIOU_SLCR_BANK2_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl6
+ */
+#define XIOU_SLCR_BANK2_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000184UL )
+#define XIOU_SLCR_BANK2_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Sts
+ */
+#define XIOU_SLCR_BANK2_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000188UL )
+#define XIOU_SLCR_BANK2_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioLpbck
+ */
+#define XIOU_SLCR_MIO_LPBCK    ( ( XIOU_SLCR_BASEADDR ) + 0x00000200UL )
+#define XIOU_SLCR_MIO_LPBCK_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_SHIFT   3UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_SHIFT   2UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_SHIFT   1UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_SHIFT   0UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioMstTri0
+ */
+#define XIOU_SLCR_MIO_MST_TRI0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000204UL )
+#define XIOU_SLCR_MIO_MST_TRI0_RSTVAL   0xffffffffUL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_SHIFT   31UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_MASK    0x80000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_SHIFT   30UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_MASK    0x40000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_SHIFT   29UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_MASK    0x20000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_SHIFT   28UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_MASK    0x10000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_SHIFT   27UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_MASK    0x08000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_SHIFT   26UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_MASK    0x04000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_SHIFT   25UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_MASK    0x02000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_SHIFT   24UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_MASK    0x01000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_SHIFT   23UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_MASK    0x00800000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_SHIFT   22UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_MASK    0x00400000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_SHIFT   21UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_MASK    0x00200000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_SHIFT   20UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_MASK    0x00100000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_SHIFT   19UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_MASK    0x00080000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_SHIFT   18UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_MASK    0x00040000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_SHIFT   17UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_MASK    0x00020000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_SHIFT   16UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_MASK    0x00010000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_SHIFT   15UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_MASK    0x00008000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_SHIFT   14UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_MASK    0x00004000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrMioMstTri1
+ */
+#define XIOU_SLCR_MIO_MST_TRI1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000208UL )
+#define XIOU_SLCR_MIO_MST_TRI1_RSTVAL   0xffffffffUL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_SHIFT   31UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_MASK    0x80000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_SHIFT   30UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_MASK    0x40000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_SHIFT   29UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_MASK    0x20000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_SHIFT   28UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_MASK    0x10000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_SHIFT   27UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_MASK    0x08000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_SHIFT   26UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_MASK    0x04000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_SHIFT   25UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_MASK    0x02000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_SHIFT   24UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_MASK    0x01000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_SHIFT   23UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_MASK    0x00800000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_SHIFT   22UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_MASK    0x00400000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_SHIFT   21UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_MASK    0x00200000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_SHIFT   20UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_MASK    0x00100000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_SHIFT   19UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_MASK    0x00080000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_SHIFT   18UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_MASK    0x00040000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_SHIFT   17UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_MASK    0x00020000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_SHIFT   16UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_MASK    0x00010000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_SHIFT   15UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_MASK    0x00008000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_SHIFT   14UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_MASK    0x00004000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrMioMstTri2
+ */
+#define XIOU_SLCR_MIO_MST_TRI2    ( ( XIOU_SLCR_BASEADDR ) + 0x0000020CUL )
+#define XIOU_SLCR_MIO_MST_TRI2_RSTVAL   0x00003fffUL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrWdtClkSel
+ */
+#define XIOU_SLCR_WDT_CLK_SEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000300UL )
+#define XIOU_SLCR_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_WDT_CLK_SEL_SHIFT   0UL
+#define XIOU_SLCR_WDT_CLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_WDT_CLK_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrCanMioCtrl
+ */
+#define XIOU_SLCR_CAN_MIO_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000304UL )
+#define XIOU_SLCR_CAN_MIO_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_SHIFT   23UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_MASK    0x00800000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_SHIFT   22UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_MASK    0x00400000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_SHIFT   15UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_WIDTH   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_MASK    0x003f8000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_SHIFT   8UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_MASK    0x00000100UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_SHIFT   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_MASK    0x00000080UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_SHIFT   0UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_WIDTH   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_MASK    0x0000007fUL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrGemClkCtrl
+ */
+#define XIOU_SLCR_GEM_CLK_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000308UL )
+#define XIOU_SLCR_GEM_CLK_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_SHIFT   22UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_MASK    0x00400000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_SHIFT   20UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_WIDTH   2UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_MASK    0x00300000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   18UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00040000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   17UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00020000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   16UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00010000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   15UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00008000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   13UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00002000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   12UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00001000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   11UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000800UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   10UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000400UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   8UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00000100UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   7UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00000080UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   6UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000040UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   5UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000020UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   3UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00000008UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   2UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00000004UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   0UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdioClkCtrl
+ */
+#define XIOU_SLCR_SDIO_CLK_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x0000030CUL )
+#define XIOU_SLCR_SDIO_CLK_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_SHIFT   18UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_MASK    0x00040000UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_SHIFT   17UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_MASK    0x00020000UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_SHIFT   2UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_SHIFT   0UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_WIDTH   2UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_MASK    0x00000003UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrCtrlRegSd
+ */
+#define XIOU_SLCR_CTRL_REG_SD    ( ( XIOU_SLCR_BASEADDR ) + 0x00000310UL )
+#define XIOU_SLCR_CTRL_REG_SD_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_SHIFT   15UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_WIDTH   1UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_MASK    0x00008000UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_SHIFT   0UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_WIDTH   1UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdItapdly
+ */
+#define XIOU_SLCR_SD_ITAPDLY    ( ( XIOU_SLCR_BASEADDR ) + 0x00000314UL )
+#define XIOU_SLCR_SD_ITAPDLY_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_SHIFT   25UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_MASK    0x02000000UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_SHIFT   24UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_MASK    0x01000000UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_SHIFT   16UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_WIDTH   8UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_SHIFT   9UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_MASK    0x00000200UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_SHIFT   8UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_MASK    0x00000100UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_SHIFT   0UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_WIDTH   8UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdOtapdlysel
+ */
+#define XIOU_SLCR_SD_OTAPDLYSEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000318UL )
+#define XIOU_SLCR_SD_OTAPDLYSEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_SHIFT   22UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_MASK    0x00400000UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_WIDTH   6UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_MASK    0x003f0000UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_SHIFT   6UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_MASK    0x00000040UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_WIDTH   6UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_MASK    0x0000003fUL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg1
+ */
+#define XIOU_SLCR_SD_CFG_REG1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000031CUL )
+#define XIOU_SLCR_SD_CFG_REG1_RSTVAL   0x32403240UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_SHIFT   23UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_WIDTH   8UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_MASK    0x7f800000UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_DEFVAL  0x64UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_SHIFT   17UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_WIDTH   6UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_MASK    0x007e0000UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_DEFVAL  0x20UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_SHIFT   16UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_MASK    0x00010000UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_SHIFT   7UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_WIDTH   8UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_MASK    0x00007f80UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_DEFVAL  0x64UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_SHIFT   1UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_WIDTH   6UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_MASK    0x0000007eUL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_DEFVAL  0x20UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_SHIFT   0UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_MASK    0x00000001UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg2
+ */
+#define XIOU_SLCR_SD_CFG_REG2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000320UL )
+#define XIOU_SLCR_SD_CFG_REG2_RSTVAL   0x0ffc0ffcUL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_SHIFT   28UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_MASK    0x30000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_SHIFT   27UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_MASK    0x08000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_SHIFT   26UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_MASK    0x04000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_SHIFT   25UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_MASK    0x02000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_SHIFT   24UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_MASK    0x01000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_SHIFT   23UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_MASK    0x00800000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_SHIFT   22UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_MASK    0x00400000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_SHIFT   21UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_MASK    0x00200000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_SHIFT   20UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_MASK    0x00100000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_SHIFT   19UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_MASK    0x00080000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_SHIFT   18UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_MASK    0x00040000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_SHIFT   16UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_MASK    0x00030000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_SHIFT   12UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_MASK    0x00003000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_SHIFT   11UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_MASK    0x00000800UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_SHIFT   10UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_MASK    0x00000400UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_SHIFT   9UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_MASK    0x00000200UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_SHIFT   8UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_MASK    0x00000100UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_SHIFT   7UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_MASK    0x00000080UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_SHIFT   6UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_MASK    0x00000040UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_SHIFT   5UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_MASK    0x00000020UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_SHIFT   4UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_MASK    0x00000010UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_SHIFT   3UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_MASK    0x00000008UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_SHIFT   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_MASK    0x00000004UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_SHIFT   0UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_MASK    0x00000003UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg3
+ */
+#define XIOU_SLCR_SD_CFG_REG3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000324UL )
+#define XIOU_SLCR_SD_CFG_REG3_RSTVAL   0x06070607UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_SHIFT   26UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_MASK    0x04000000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_SHIFT   22UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_WIDTH   4UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_MASK    0x03c00000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_DEFVAL  0x8UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_SHIFT   21UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_MASK    0x00200000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_SHIFT   20UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_MASK    0x00100000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_SHIFT   19UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_MASK    0x00080000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_SHIFT   18UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_MASK    0x00040000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_SHIFT   17UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_MASK    0x00020000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_SHIFT   16UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_MASK    0x00010000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_SHIFT   10UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_MASK    0x00000400UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_SHIFT   6UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_WIDTH   4UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_MASK    0x000003c0UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_DEFVAL  0x8UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_SHIFT   5UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_MASK    0x00000020UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_SHIFT   4UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_MASK    0x00000010UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_SHIFT   3UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_MASK    0x00000008UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_SHIFT   2UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_MASK    0x00000004UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_SHIFT   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_MASK    0x00000002UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_SHIFT   0UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_MASK    0x00000001UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrSdInitpreset
+ */
+#define XIOU_SLCR_SD_INITPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000328UL )
+#define XIOU_SLCR_SD_INITPRESET_RSTVAL   0x01000100UL
+
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_DEFVAL  0x100UL
+
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_DEFVAL  0x100UL
+
+/**
+ * Register: XiouSlcrSdDsppreset
+ */
+#define XIOU_SLCR_SD_DSPPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x0000032CUL )
+#define XIOU_SLCR_SD_DSPPRESET_RSTVAL   0x00040004UL
+
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_DEFVAL  0x4UL
+
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_DEFVAL  0x4UL
+
+/**
+ * Register: XiouSlcrSdHspdpreset
+ */
+#define XIOU_SLCR_SD_HSPDPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000330UL )
+#define XIOU_SLCR_SD_HSPDPRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdSdr12preset
+ */
+#define XIOU_SLCR_SD_SDR12PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000334UL )
+#define XIOU_SLCR_SD_SDR12PRESET_RSTVAL   0x00040004UL
+
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_DEFVAL  0x4UL
+
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_DEFVAL  0x4UL
+
+/**
+ * Register: XiouSlcrSdSdr25preset
+ */
+#define XIOU_SLCR_SD_SDR25PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000338UL )
+#define XIOU_SLCR_SD_SDR25PRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdSdr50prset
+ */
+#define XIOU_SLCR_SD_SDR50PRSET    ( ( XIOU_SLCR_BASEADDR ) + 0x0000033CUL )
+#define XIOU_SLCR_SD_SDR50PRSET_RSTVAL   0x00010001UL
+
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrSdSdr104prst
+ */
+#define XIOU_SLCR_SD_SDR104PRST    ( ( XIOU_SLCR_BASEADDR ) + 0x00000340UL )
+#define XIOU_SLCR_SD_SDR104PRST_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdDdr50preset
+ */
+#define XIOU_SLCR_SD_DDR50PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000344UL )
+#define XIOU_SLCR_SD_DDR50PRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdMaxcur1p8
+ */
+#define XIOU_SLCR_SD_MAXCUR1P8    ( ( XIOU_SLCR_BASEADDR ) + 0x0000034CUL )
+#define XIOU_SLCR_SD_MAXCUR1P8_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdMaxcur3p0
+ */
+#define XIOU_SLCR_SD_MAXCUR3P0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000350UL )
+#define XIOU_SLCR_SD_MAXCUR3P0_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdMaxcur3p3
+ */
+#define XIOU_SLCR_SD_MAXCUR3P3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000354UL )
+#define XIOU_SLCR_SD_MAXCUR3P3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdDllCtrl
+ */
+#define XIOU_SLCR_SD_DLL_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000358UL )
+#define XIOU_SLCR_SD_DLL_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_SHIFT   18UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_MASK    0x00040000UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_SHIFT   17UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_MASK    0x00020000UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_SHIFT   16UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_MASK    0x00010000UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_SHIFT   2UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_MASK    0x00000004UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_SHIFT   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_MASK    0x00000002UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_SHIFT   0UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_MASK    0x00000001UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCdnCtrl
+ */
+#define XIOU_SLCR_SD_CDN_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x0000035CUL )
+#define XIOU_SLCR_SD_CDN_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_MASK    0x00010000UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_MASK    0x00000001UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrGemCtrl
+ */
+#define XIOU_SLCR_GEM_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000360UL )
+#define XIOU_SLCR_GEM_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   6UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x000000c0UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   4UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x00000030UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x0000000cUL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   0UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x00000003UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrTtcApbClk
+ */
+#define XIOU_SLCR_TTC_APB_CLK    ( ( XIOU_SLCR_BASEADDR ) + 0x00000380UL )
+#define XIOU_SLCR_TTC_APB_CLK_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_SHIFT   6UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_MASK    0x000000c0UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_SHIFT   4UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_MASK    0x00000030UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_SHIFT   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_MASK    0x0000000cUL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_SHIFT   0UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_MASK    0x00000003UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrTapdlyBypass
+ */
+#define XIOU_SLCR_TAPDLY_BYPASS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000390UL )
+#define XIOU_SLCR_TAPDLY_BYPASS_RSTVAL   0x00000007UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_SHIFT   2UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_MASK    0x00000004UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_DEFVAL  0x1UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_SHIFT   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_MASK    0x00000002UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_SHIFT   0UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_MASK    0x00000001UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrCoherentCtrl
+ */
+#define XIOU_SLCR_COHERENT_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000400UL )
+#define XIOU_SLCR_COHERENT_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_SHIFT   28UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_MASK    0xf0000000UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_SHIFT   24UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_MASK    0x0f000000UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_SHIFT   20UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_MASK    0x00f00000UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_SHIFT   16UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_MASK    0x000f0000UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   12UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x0000f000UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   8UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x00000f00UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x000000f0UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   0UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x0000000fUL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrVideoPssClkSel
+ */
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000404UL )
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_SHIFT   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_WIDTH   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_MASK    0x00000002UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_DEFVAL  0x0UL
+
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_SHIFT   0UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrInterconnectRoute
+ */
+#define XIOU_SLCR_INTERCONNECT_ROUTE    ( ( XIOU_SLCR_BASEADDR ) + 0x00000408UL )
+#define XIOU_SLCR_INTERCONNECT_ROUTE_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_SHIFT   7UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_MASK    0x00000080UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_SHIFT   6UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_MASK    0x00000040UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_SHIFT   5UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_MASK    0x00000020UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_SHIFT   4UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_MASK    0x00000010UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   3UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000008UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   2UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000004UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000002UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   0UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000001UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000500UL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000504UL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000508UL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x0000050CUL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXsdps
+ */
+#define XIOU_SLCR_RAM_XSDPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000510UL )
+#define XIOU_SLCR_RAM_XSDPS_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXsdps
+ */
+#define XIOU_SLCR_RAM_XSDPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000514UL )
+#define XIOU_SLCR_RAM_XSDPS_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamCan0
+ */
+#define XIOU_SLCR_RAM_CAN0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000518UL )
+#define XIOU_SLCR_RAM_CAN0_RSTVAL   0x005b5b5bUL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA2_SHIFT   22UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_MASK    0x00400000UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB2_SHIFT   19UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_MASK    0x00380000UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA2_SHIFT   16UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_MASK    0x00070000UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamCan1
+ */
+#define XIOU_SLCR_RAM_CAN1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000051CUL )
+#define XIOU_SLCR_RAM_CAN1_RSTVAL   0x005b5b5bUL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA2_SHIFT   22UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_MASK    0x00400000UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB2_SHIFT   19UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_MASK    0x00380000UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA2_SHIFT   16UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_MASK    0x00070000UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamLqspi
+ */
+#define XIOU_SLCR_RAM_LQSPI    ( ( XIOU_SLCR_BASEADDR ) + 0x00000520UL )
+#define XIOU_SLCR_RAM_LQSPI_RSTVAL   0x00002ddbUL
+
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_SHIFT   13UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_MASK    0x00002000UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_SHIFT   10UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_MASK    0x00001c00UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_SHIFT   7UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_MASK    0x00000380UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXnandps8
+ */
+#define XIOU_SLCR_RAM_XNANDPS8    ( ( XIOU_SLCR_BASEADDR ) + 0x00000524UL )
+#define XIOU_SLCR_RAM_XNANDPS8_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrCtrl
+ */
+#define XIOU_SLCR_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000600UL )
+#define XIOU_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrIsr
+ */
+#define XIOU_SLCR_ISR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000700UL )
+#define XIOU_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrImr
+ */
+#define XIOU_SLCR_IMR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000704UL )
+#define XIOU_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrIer
+ */
+#define XIOU_SLCR_IER    ( ( XIOU_SLCR_BASEADDR ) + 0x00000708UL )
+#define XIOU_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrIdr
+ */
+#define XIOU_SLCR_IDR    ( ( XIOU_SLCR_BASEADDR ) + 0x0000070CUL )
+#define XIOU_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrItr
+ */
+#define XIOU_SLCR_ITR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000710UL )
+#define XIOU_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XIOU_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_slcr.h
new file mode 100644
index 0000000..d50b578
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_slcr.h
@@ -0,0 +1,5667 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_SLCR_H__
+#define __XLPD_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdSlcr Base Address
+ */
+#define XLPD_SLCR_BASEADDR      0xFF410000UL
+
+/**
+ * Register: XlpdSlcrWprot0
+ */
+#define XLPD_SLCR_WPROT0    ( ( XLPD_SLCR_BASEADDR ) + 0x00000000UL )
+#define XLPD_SLCR_WPROT0_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_WPROT0_ACT_SHIFT   0UL
+#define XLPD_SLCR_WPROT0_ACT_WIDTH   1UL
+#define XLPD_SLCR_WPROT0_ACT_MASK    0x00000001UL
+#define XLPD_SLCR_WPROT0_ACT_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrCtrl
+ */
+#define XLPD_SLCR_CTRL    ( ( XLPD_SLCR_BASEADDR ) + 0x00000004UL )
+#define XLPD_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsr
+ */
+#define XLPD_SLCR_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000008UL )
+#define XLPD_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrImr
+ */
+#define XLPD_SLCR_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XLPD_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIer
+ */
+#define XLPD_SLCR_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00000010UL )
+#define XLPD_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIdr
+ */
+#define XLPD_SLCR_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000014UL )
+#define XLPD_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrItr
+ */
+#define XLPD_SLCR_ITR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000018UL )
+#define XLPD_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk0
+ */
+#define XLPD_SLCR_SAFETY_CHK0    ( ( XLPD_SLCR_BASEADDR ) + 0x00000040UL )
+#define XLPD_SLCR_SAFETY_CHK0_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK0_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk1
+ */
+#define XLPD_SLCR_SAFETY_CHK1    ( ( XLPD_SLCR_BASEADDR ) + 0x00000044UL )
+#define XLPD_SLCR_SAFETY_CHK1_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK1_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk2
+ */
+#define XLPD_SLCR_SAFETY_CHK2    ( ( XLPD_SLCR_BASEADDR ) + 0x00000048UL )
+#define XLPD_SLCR_SAFETY_CHK2_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK2_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk3
+ */
+#define XLPD_SLCR_SAFETY_CHK3    ( ( XLPD_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XLPD_SLCR_SAFETY_CHK3_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK3_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrXcsupmuWdtClkSel
+ */
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL    ( ( XLPD_SLCR_BASEADDR ) + 0x00000050UL )
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_SHIFT   0UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_WIDTH   1UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_MASK    0x00000001UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAdmaCfg
+ */
+#define XLPD_SLCR_ADMA_CFG    ( ( XLPD_SLCR_BASEADDR ) + 0x0000200CUL )
+#define XLPD_SLCR_ADMA_CFG_RSTVAL   0x00000028UL
+
+#define XLPD_SLCR_ADMA_CFG_BUSWID_SHIFT   5UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_WIDTH   2UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_MASK    0x00000060UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_SHIFT   0UL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_WIDTH   5UL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_MASK    0x0000001fUL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_DEFVAL  0x8UL
+
+/**
+ * Register: XlpdSlcrAdmaRam
+ */
+#define XLPD_SLCR_ADMA_RAM    ( ( XLPD_SLCR_BASEADDR ) + 0x00002010UL )
+#define XLPD_SLCR_ADMA_RAM_RSTVAL   0x00003b3bUL
+
+#define XLPD_SLCR_ADMA_RAM1_EMAB_SHIFT   12UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_MASK    0x00007000UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM1_EMASA_SHIFT   11UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_WIDTH   1UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_MASK    0x00000800UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_RAM1_EMAA_SHIFT   8UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_MASK    0x00000700UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMAB_SHIFT   4UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_MASK    0x00000070UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMASA_SHIFT   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_WIDTH   1UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_MASK    0x00000008UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMAA_SHIFT   0UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_MASK    0x00000007UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIsr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003000UL )
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiImr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003008UL )
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RSTVAL   0x1dcf000fUL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIer
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00003010UL )
+#define XLPD_SLCR_ERR_AIBAXI_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIdr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003018UL )
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIsr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003020UL )
+#define XLPD_SLCR_ERR_AIBAPB_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbImr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003024UL )
+#define XLPD_SLCR_ERR_AIBAPB_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIer
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00003028UL )
+#define XLPD_SLCR_ERR_AIBAPB_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIdr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000302CUL )
+#define XLPD_SLCR_ERR_AIBAPB_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiReq
+ */
+#define XLPD_SLCR_ISO_AIBAXI_REQ    ( ( XLPD_SLCR_BASEADDR ) + 0x00003030UL )
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiType
+ */
+#define XLPD_SLCR_ISO_AIBAXI_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x00003038UL )
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RSTVAL   0x19cf000fUL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiAck
+ */
+#define XLPD_SLCR_ISO_AIBAXI_ACK    ( ( XLPD_SLCR_BASEADDR ) + 0x00003040UL )
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbReq
+ */
+#define XLPD_SLCR_ISO_AIBAPB_REQ    ( ( XLPD_SLCR_BASEADDR ) + 0x00003048UL )
+#define XLPD_SLCR_ISO_AIBAPB_REQ_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbType
+ */
+#define XLPD_SLCR_ISO_AIBAPB_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x0000304CUL )
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbAck
+ */
+#define XLPD_SLCR_ISO_AIBAPB_ACK    ( ( XLPD_SLCR_BASEADDR ) + 0x00003050UL )
+#define XLPD_SLCR_ISO_AIBAPB_ACK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbIsr
+ */
+#define XLPD_SLCR_ERR_ATB_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00006000UL )
+#define XLPD_SLCR_ERR_ATB_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbImr
+ */
+#define XLPD_SLCR_ERR_ATB_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00006004UL )
+#define XLPD_SLCR_ERR_ATB_IMR_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAtbIer
+ */
+#define XLPD_SLCR_ERR_ATB_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00006008UL )
+#define XLPD_SLCR_ERR_ATB_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbIdr
+ */
+#define XLPD_SLCR_ERR_ATB_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000600CUL )
+#define XLPD_SLCR_ERR_ATB_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAtbCmdStoreEn
+ */
+#define XLPD_SLCR_ATB_CMD_STORE_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00006010UL )
+#define XLPD_SLCR_ATB_CMD_STORE_EN_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrAtbRespEn
+ */
+#define XLPD_SLCR_ATB_RESP_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00006014UL )
+#define XLPD_SLCR_ATB_RESP_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAtbRespType
+ */
+#define XLPD_SLCR_ATB_RESP_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x00006018UL )
+#define XLPD_SLCR_ATB_RESP_TYPE_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrAtbPrescale
+ */
+#define XLPD_SLCR_ATB_PRESCALE    ( ( XLPD_SLCR_BASEADDR ) + 0x00006020UL )
+#define XLPD_SLCR_ATB_PRESCALE_RSTVAL   0x0000ffffUL
+
+#define XLPD_SLCR_ATB_PRESCALE_EN_SHIFT   16UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_WIDTH   1UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_MASK    0x00010000UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ATB_PRESCALE_VAL_SHIFT   0UL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_WIDTH   16UL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_MASK    0x0000ffffUL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_DEFVAL  0xffffUL
+
+/**
+ * Register: XlpdSlcrMutex0
+ */
+#define XLPD_SLCR_MUTEX0    ( ( XLPD_SLCR_BASEADDR ) + 0x00007000UL )
+#define XLPD_SLCR_MUTEX0_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX0_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX0_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX0_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX0_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex1
+ */
+#define XLPD_SLCR_MUTEX1    ( ( XLPD_SLCR_BASEADDR ) + 0x00007004UL )
+#define XLPD_SLCR_MUTEX1_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX1_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX1_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX1_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX1_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex2
+ */
+#define XLPD_SLCR_MUTEX2    ( ( XLPD_SLCR_BASEADDR ) + 0x00007008UL )
+#define XLPD_SLCR_MUTEX2_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX2_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX2_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX2_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX2_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex3
+ */
+#define XLPD_SLCR_MUTEX3    ( ( XLPD_SLCR_BASEADDR ) + 0x0000700CUL )
+#define XLPD_SLCR_MUTEX3_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX3_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX3_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX3_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX3_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqSts
+ */
+#define XLPD_SLCR_GICP0_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008000UL )
+#define XLPD_SLCR_GICP0_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqMsk
+ */
+#define XLPD_SLCR_GICP0_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008004UL )
+#define XLPD_SLCR_GICP0_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqEn
+ */
+#define XLPD_SLCR_GICP0_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008008UL )
+#define XLPD_SLCR_GICP0_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqDis
+ */
+#define XLPD_SLCR_GICP0_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000800CUL )
+#define XLPD_SLCR_GICP0_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqTrig
+ */
+#define XLPD_SLCR_GICP0_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008010UL )
+#define XLPD_SLCR_GICP0_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqSts
+ */
+#define XLPD_SLCR_GICP1_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008014UL )
+#define XLPD_SLCR_GICP1_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqMsk
+ */
+#define XLPD_SLCR_GICP1_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008018UL )
+#define XLPD_SLCR_GICP1_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqEn
+ */
+#define XLPD_SLCR_GICP1_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x0000801CUL )
+#define XLPD_SLCR_GICP1_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqDis
+ */
+#define XLPD_SLCR_GICP1_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008020UL )
+#define XLPD_SLCR_GICP1_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqTrig
+ */
+#define XLPD_SLCR_GICP1_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008024UL )
+#define XLPD_SLCR_GICP1_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqSts
+ */
+#define XLPD_SLCR_GICP2_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008028UL )
+#define XLPD_SLCR_GICP2_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqMsk
+ */
+#define XLPD_SLCR_GICP2_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x0000802CUL )
+#define XLPD_SLCR_GICP2_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqEn
+ */
+#define XLPD_SLCR_GICP2_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008030UL )
+#define XLPD_SLCR_GICP2_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqDis
+ */
+#define XLPD_SLCR_GICP2_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008034UL )
+#define XLPD_SLCR_GICP2_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqTrig
+ */
+#define XLPD_SLCR_GICP2_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008038UL )
+#define XLPD_SLCR_GICP2_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqSts
+ */
+#define XLPD_SLCR_GICP3_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000803CUL )
+#define XLPD_SLCR_GICP3_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqMsk
+ */
+#define XLPD_SLCR_GICP3_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008040UL )
+#define XLPD_SLCR_GICP3_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqEn
+ */
+#define XLPD_SLCR_GICP3_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008044UL )
+#define XLPD_SLCR_GICP3_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqDis
+ */
+#define XLPD_SLCR_GICP3_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008048UL )
+#define XLPD_SLCR_GICP3_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqTrig
+ */
+#define XLPD_SLCR_GICP3_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x0000804CUL )
+#define XLPD_SLCR_GICP3_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqSts
+ */
+#define XLPD_SLCR_GICP4_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008050UL )
+#define XLPD_SLCR_GICP4_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqMsk
+ */
+#define XLPD_SLCR_GICP4_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008054UL )
+#define XLPD_SLCR_GICP4_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqEn
+ */
+#define XLPD_SLCR_GICP4_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008058UL )
+#define XLPD_SLCR_GICP4_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqDis
+ */
+#define XLPD_SLCR_GICP4_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000805CUL )
+#define XLPD_SLCR_GICP4_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqTrig
+ */
+#define XLPD_SLCR_GICP4_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008060UL )
+#define XLPD_SLCR_GICP4_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqSts
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A0UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqMsk
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A4UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_RSTVAL   0x000000ffUL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqEn
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A8UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqDis
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x000080ACUL )
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqTrig
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x000080B0UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAfiFs
+ */
+#define XLPD_SLCR_AFI_FS    ( ( XLPD_SLCR_BASEADDR ) + 0x00009000UL )
+#define XLPD_SLCR_AFI_FS_RSTVAL   0x00000200UL
+
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_SHIFT   8UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_WIDTH   2UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_MASK    0x00000300UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_DEFVAL  0x2UL
+
+/**
+ * Register: XlpdSlcrCci
+ */
+#define XLPD_SLCR_CCI    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A000UL )
+#define XLPD_SLCR_CCI_RSTVAL   0x03801c07UL
+
+#define XLPD_SLCR_CCI_SPR_SHIFT   28UL
+#define XLPD_SLCR_CCI_SPR_WIDTH   4UL
+#define XLPD_SLCR_CCI_SPR_MASK    0xf0000000UL
+#define XLPD_SLCR_CCI_SPR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS4_SHIFT   27UL
+#define XLPD_SLCR_CCI_QVNVNETS4_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS4_MASK    0x08000000UL
+#define XLPD_SLCR_CCI_QVNVNETS4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS3_SHIFT   26UL
+#define XLPD_SLCR_CCI_QVNVNETS3_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS3_MASK    0x04000000UL
+#define XLPD_SLCR_CCI_QVNVNETS3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS2_SHIFT   25UL
+#define XLPD_SLCR_CCI_QVNVNETS2_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS2_MASK    0x02000000UL
+#define XLPD_SLCR_CCI_QVNVNETS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QVNVNETS1_SHIFT   24UL
+#define XLPD_SLCR_CCI_QVNVNETS1_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS1_MASK    0x01000000UL
+#define XLPD_SLCR_CCI_QVNVNETS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QVNVNETS0_SHIFT   23UL
+#define XLPD_SLCR_CCI_QVNVNETS0_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS0_MASK    0x00800000UL
+#define XLPD_SLCR_CCI_QVNVNETS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QOS_OVRRD_SHIFT   18UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_WIDTH   5UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_MASK    0x007c0000UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVN_EN_M2_SHIFT   17UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_MASK    0x00020000UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVN_EN_M1_SHIFT   16UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_MASK    0x00010000UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_STRPG_GRAN_SHIFT   13UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_WIDTH   3UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_MASK    0x0000e000UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN4_SHIFT   12UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_MASK    0x00001000UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN3_SHIFT   11UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_MASK    0x00000800UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN0_SHIFT   10UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_MASK    0x00000400UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ECOREVNUM_SHIFT   6UL
+#define XLPD_SLCR_CCI_ECOREVNUM_WIDTH   4UL
+#define XLPD_SLCR_CCI_ECOREVNUM_MASK    0x000003c0UL
+#define XLPD_SLCR_CCI_ECOREVNUM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA2_SHIFT   5UL
+#define XLPD_SLCR_CCI_ASA2_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA2_MASK    0x00000020UL
+#define XLPD_SLCR_CCI_ASA2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA1_SHIFT   4UL
+#define XLPD_SLCR_CCI_ASA1_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA1_MASK    0x00000010UL
+#define XLPD_SLCR_CCI_ASA1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA0_SHIFT   3UL
+#define XLPD_SLCR_CCI_ASA0_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA0_MASK    0x00000008UL
+#define XLPD_SLCR_CCI_ASA0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_OWO2_SHIFT   2UL
+#define XLPD_SLCR_CCI_OWO2_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO2_MASK    0x00000004UL
+#define XLPD_SLCR_CCI_OWO2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_OWO1_SHIFT   1UL
+#define XLPD_SLCR_CCI_OWO1_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO1_MASK    0x00000002UL
+#define XLPD_SLCR_CCI_OWO1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_OWO0_SHIFT   0UL
+#define XLPD_SLCR_CCI_OWO0_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO0_MASK    0x00000001UL
+#define XLPD_SLCR_CCI_OWO0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrCciAddrmap
+ */
+#define XLPD_SLCR_CCI_ADDRMAP    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A004UL )
+#define XLPD_SLCR_CCI_ADDRMAP_RSTVAL   0x00c000ffUL
+
+#define XLPD_SLCR_CCI_ADDRMAP_15_SHIFT   30UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_MASK    0xc0000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_14_SHIFT   28UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_MASK    0x30000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_13_SHIFT   26UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_MASK    0x0c000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_12_SHIFT   24UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_MASK    0x03000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_11_SHIFT   22UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_MASK    0x00c00000UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_10_SHIFT   20UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_MASK    0x00300000UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_9_SHIFT   18UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_MASK    0x000c0000UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_8_SHIFT   16UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_MASK    0x00030000UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_7_SHIFT   14UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_MASK    0x0000c000UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_6_SHIFT   12UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_MASK    0x00003000UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_5_SHIFT   10UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_MASK    0x00000c00UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_4_SHIFT   8UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_MASK    0x00000300UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_3_SHIFT   6UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_MASK    0x000000c0UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_2_SHIFT   4UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_MASK    0x00000030UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_1_SHIFT   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_1_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_1_MASK    0x0000000cUL
+#define XLPD_SLCR_CCI_ADDRMAP_1_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_0_SHIFT   0UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_MASK    0x00000003UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrCciQvnprealloc
+ */
+#define XLPD_SLCR_CCI_QVNPREALLOC    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A008UL )
+#define XLPD_SLCR_CCI_QVNPREALLOC_RSTVAL   0x00330330UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_SHIFT   20UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_MASK    0x00f00000UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_SHIFT   16UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_MASK    0x000f0000UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_SHIFT   8UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_MASK    0x00000f00UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_SHIFT   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_MASK    0x000000f0UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrSmmu
+ */
+#define XLPD_SLCR_SMMU    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A020UL )
+#define XLPD_SLCR_SMMU_RSTVAL   0x0000003fUL
+
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_SHIFT   7UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_WIDTH   1UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_MASK    0x00000080UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SMMU_CTTW_SHIFT   6UL
+#define XLPD_SLCR_SMMU_CTTW_WIDTH   1UL
+#define XLPD_SLCR_SMMU_CTTW_MASK    0x00000040UL
+#define XLPD_SLCR_SMMU_CTTW_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_SHIFT   5UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_MASK    0x00000020UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_SHIFT   4UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_MASK    0x00000010UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_SHIFT   3UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_MASK    0x00000008UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_SHIFT   2UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_MASK    0x00000004UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_SHIFT   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_MASK    0x00000002UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_SHIFT   0UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_MASK    0x00000001UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrApu
+ */
+#define XLPD_SLCR_APU    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A040UL )
+#define XLPD_SLCR_APU_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_APU_BRDC_BARRIER_SHIFT   3UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_MASK    0x00000008UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_CMNT_SHIFT   2UL
+#define XLPD_SLCR_APU_BRDC_CMNT_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_CMNT_MASK    0x00000004UL
+#define XLPD_SLCR_APU_BRDC_CMNT_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_INNER_SHIFT   1UL
+#define XLPD_SLCR_APU_BRDC_INNER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_INNER_MASK    0x00000002UL
+#define XLPD_SLCR_APU_BRDC_INNER_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_OUTER_SHIFT   0UL
+#define XLPD_SLCR_APU_BRDC_OUTER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_OUTER_MASK    0x00000001UL
+#define XLPD_SLCR_APU_BRDC_OUTER_DEFVAL  0x1UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_slcr_secure.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_slcr_secure.h
new file mode 100644
index 0000000..f038c11
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_slcr_secure.h
@@ -0,0 +1,141 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_SLCR_SECURE_H__
+#define __XLPD_SLCR_SECURE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdSlcrSecure Base Address
+ */
+#define XLPD_SLCR_SECURE_BASEADDR      0xFF4B0000UL
+
+/**
+ * Register: XlpdSlcrSecCtrl
+ */
+#define XLPD_SLCR_SEC_CTRL    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000004UL )
+#define XLPD_SLCR_SEC_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_SHIFT   0UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_WIDTH   1UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecIsr
+ */
+#define XLPD_SLCR_SEC_ISR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000008UL )
+#define XLPD_SLCR_SEC_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecImr
+ */
+#define XLPD_SLCR_SEC_IMR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x0000000CUL )
+#define XLPD_SLCR_SEC_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrSecIer
+ */
+#define XLPD_SLCR_SEC_IER    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000010UL )
+#define XLPD_SLCR_SEC_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecIdr
+ */
+#define XLPD_SLCR_SEC_IDR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000014UL )
+#define XLPD_SLCR_SEC_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecItr
+ */
+#define XLPD_SLCR_SEC_ITR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000018UL )
+#define XLPD_SLCR_SEC_ITR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecRpu
+ */
+#define XLPD_SLCR_SEC_RPU    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000020UL )
+#define XLPD_SLCR_SEC_RPU_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_SHIFT   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_WIDTH   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_MASK    0x00000002UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_SHIFT   0UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_WIDTH   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecAdma
+ */
+#define XLPD_SLCR_SEC_ADMA    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000024UL )
+#define XLPD_SLCR_SEC_ADMA_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ADMA_TZ_SHIFT   0UL
+#define XLPD_SLCR_SEC_ADMA_TZ_WIDTH   8UL
+#define XLPD_SLCR_SEC_ADMA_TZ_MASK    0x000000ffUL
+#define XLPD_SLCR_SEC_ADMA_TZ_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecSafetyChk
+ */
+#define XLPD_SLCR_SEC_SAFETY_CHK    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000030UL )
+#define XLPD_SLCR_SEC_SAFETY_CHK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_SHIFT   0UL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_WIDTH   32UL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecUsb
+ */
+#define XLPD_SLCR_SEC_USB    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000034UL )
+#define XLPD_SLCR_SEC_USB_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_SHIFT   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_WIDTH   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_MASK    0x00000002UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_SHIFT   0UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_WIDTH   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_DEFVAL  0x1UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_SLCR_SECURE_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_xppu.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_xppu.h
new file mode 100644
index 0000000..06aa8b2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_xppu.h
@@ -0,0 +1,858 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_XPPU_H__
+#define __XLPD_XPPU_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdXppu Base Address
+ */
+#define XLPD_XPPU_BASEADDR      0xFF980000UL
+
+/**
+ * Register: XlpdXppuCtrl
+ */
+#define XLPD_XPPU_CTRL    ( ( XLPD_XPPU_BASEADDR ) + 0x00000000UL )
+#define XLPD_XPPU_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_SHIFT   2UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_MASK    0x00000004UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_DEFVAL  0x0UL
+
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_SHIFT   1UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_MASK    0x00000002UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_DEFVAL  0x0UL
+
+#define XLPD_XPPU_CTRL_EN_SHIFT   0UL
+#define XLPD_XPPU_CTRL_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_EN_MASK    0x00000001UL
+#define XLPD_XPPU_CTRL_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuErrSts1
+ */
+#define XLPD_XPPU_ERR_STS1    ( ( XLPD_XPPU_BASEADDR ) + 0x00000004UL )
+#define XLPD_XPPU_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuErrSts2
+ */
+#define XLPD_XPPU_ERR_STS2    ( ( XLPD_XPPU_BASEADDR ) + 0x00000008UL )
+#define XLPD_XPPU_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuPoison
+ */
+#define XLPD_XPPU_POISON    ( ( XLPD_XPPU_BASEADDR ) + 0x0000000CUL )
+#define XLPD_XPPU_POISON_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_POISON_BASE_SHIFT   0UL
+#define XLPD_XPPU_POISON_BASE_WIDTH   20UL
+#define XLPD_XPPU_POISON_BASE_MASK    0x000fffffUL
+#define XLPD_XPPU_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuIsr
+ */
+#define XLPD_XPPU_ISR    ( ( XLPD_XPPU_BASEADDR ) + 0x00000010UL )
+#define XLPD_XPPU_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ISR_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_ISR_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_ISR_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_ISR_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_ISR_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_ISR_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_ISR_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_ISR_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_ISR_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_ISR_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_ISR_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_ISR_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_ISR_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_ISR_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_ISR_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuImr
+ */
+#define XLPD_XPPU_IMR    ( ( XLPD_XPPU_BASEADDR ) + 0x00000014UL )
+#define XLPD_XPPU_IMR_RSTVAL   0x000000efUL
+
+#define XLPD_XPPU_IMR_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IMR_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IMR_APER_PARITY_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IMR_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IMR_APER_TZ_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IMR_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IMR_APER_PERM_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IMR_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IMR_MID_PARITY_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IMR_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IMR_MID_RO_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IMR_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IMR_MID_MISS_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IMR_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IMR_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuIen
+ */
+#define XLPD_XPPU_IEN    ( ( XLPD_XPPU_BASEADDR ) + 0x00000018UL )
+#define XLPD_XPPU_IEN_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_IEN_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IEN_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IEN_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IEN_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IEN_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IEN_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IEN_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IEN_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IEN_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IEN_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IEN_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IEN_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IEN_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IEN_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IEN_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuIds
+ */
+#define XLPD_XPPU_IDS    ( ( XLPD_XPPU_BASEADDR ) + 0x0000001CUL )
+#define XLPD_XPPU_IDS_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_IDS_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IDS_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IDS_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IDS_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IDS_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IDS_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IDS_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IDS_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IDS_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IDS_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IDS_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IDS_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IDS_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IDS_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IDS_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMMstrIds
+ */
+#define XLPD_XPPU_M_MSTR_IDS    ( ( XLPD_XPPU_BASEADDR ) + 0x0000003CUL )
+#define XLPD_XPPU_M_MSTR_IDS_RSTVAL   0x00000014UL
+
+#define XLPD_XPPU_M_MSTR_IDS_NO_SHIFT   0UL
+#define XLPD_XPPU_M_MSTR_IDS_NO_WIDTH   32UL
+#define XLPD_XPPU_M_MSTR_IDS_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_MSTR_IDS_NO_DEFVAL  0x14UL
+
+/**
+ * Register: XlpdXppuMAperture32b
+ */
+#define XLPD_XPPU_M_APERTURE_32B    ( ( XLPD_XPPU_BASEADDR ) + 0x00000040UL )
+#define XLPD_XPPU_M_APERTURE_32B_RSTVAL   0x00000080UL
+
+#define XLPD_XPPU_M_APERTURE_32B_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_32B_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_32B_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_32B_NO_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMAperture64kb
+ */
+#define XLPD_XPPU_M_APERTURE_64KB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000044UL )
+#define XLPD_XPPU_M_APERTURE_64KB_RSTVAL   0x00000100UL
+
+#define XLPD_XPPU_M_APERTURE_64KB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_DEFVAL  0x100UL
+
+/**
+ * Register: XlpdXppuMAperture1mb
+ */
+#define XLPD_XPPU_M_APERTURE_1MB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000048UL )
+#define XLPD_XPPU_M_APERTURE_1MB_RSTVAL   0x00000010UL
+
+#define XLPD_XPPU_M_APERTURE_1MB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_DEFVAL  0x10UL
+
+/**
+ * Register: XlpdXppuMAperture512mb
+ */
+#define XLPD_XPPU_M_APERTURE_512MB    ( ( XLPD_XPPU_BASEADDR ) + 0x0000004CUL )
+#define XLPD_XPPU_M_APERTURE_512MB_RSTVAL   0x00000001UL
+
+#define XLPD_XPPU_M_APERTURE_512MB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuBase32b
+ */
+#define XLPD_XPPU_BASE_32B    ( ( XLPD_XPPU_BASEADDR ) + 0x00000050UL )
+#define XLPD_XPPU_BASE_32B_RSTVAL   0xff990000UL
+
+#define XLPD_XPPU_BASE_32B_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_32B_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_32B_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_32B_ADDR_DEFVAL  0xff990000UL
+
+/**
+ * Register: XlpdXppuBase64kb
+ */
+#define XLPD_XPPU_BASE_64KB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000054UL )
+#define XLPD_XPPU_BASE_64KB_RSTVAL   0xff000000UL
+
+#define XLPD_XPPU_BASE_64KB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_64KB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_64KB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_64KB_ADDR_DEFVAL  0xff000000UL
+
+/**
+ * Register: XlpdXppuBase1mb
+ */
+#define XLPD_XPPU_BASE_1MB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000058UL )
+#define XLPD_XPPU_BASE_1MB_RSTVAL   0xfe000000UL
+
+#define XLPD_XPPU_BASE_1MB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_1MB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_1MB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_1MB_ADDR_DEFVAL  0xfe000000UL
+
+/**
+ * Register: XlpdXppuBase512mb
+ */
+#define XLPD_XPPU_BASE_512MB    ( ( XLPD_XPPU_BASEADDR ) + 0x0000005CUL )
+#define XLPD_XPPU_BASE_512MB_RSTVAL   0xc0000000UL
+
+#define XLPD_XPPU_BASE_512MB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_512MB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_512MB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_512MB_ADDR_DEFVAL  0xc0000000UL
+
+/**
+ * Register: XlpdXppuMstrId00
+ */
+#define XLPD_XPPU_MSTR_ID00    ( ( XLPD_XPPU_BASEADDR ) + 0x00000100UL )
+#define XLPD_XPPU_MSTR_ID00_RSTVAL   0x83ff0040UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_DEFVAL  0x3ffUL
+
+#define XLPD_XPPU_MSTR_ID00_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID00_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID00_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID00_MID_DEFVAL  0x40UL
+
+/**
+ * Register: XlpdXppuMstrId01
+ */
+#define XLPD_XPPU_MSTR_ID01    ( ( XLPD_XPPU_BASEADDR ) + 0x00000104UL )
+#define XLPD_XPPU_MSTR_ID01_RSTVAL   0x03f00000UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_DEFVAL  0x3f0UL
+
+#define XLPD_XPPU_MSTR_ID01_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID01_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID01_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID01_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId02
+ */
+#define XLPD_XPPU_MSTR_ID02    ( ( XLPD_XPPU_BASEADDR ) + 0x00000108UL )
+#define XLPD_XPPU_MSTR_ID02_RSTVAL   0x83f00010UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_DEFVAL  0x3f0UL
+
+#define XLPD_XPPU_MSTR_ID02_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID02_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID02_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID02_MID_DEFVAL  0x10UL
+
+/**
+ * Register: XlpdXppuMstrId03
+ */
+#define XLPD_XPPU_MSTR_ID03    ( ( XLPD_XPPU_BASEADDR ) + 0x0000010CUL )
+#define XLPD_XPPU_MSTR_ID03_RSTVAL   0x83c00080UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_DEFVAL  0x3c0UL
+
+#define XLPD_XPPU_MSTR_ID03_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID03_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID03_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID03_MID_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMstrId04
+ */
+#define XLPD_XPPU_MSTR_ID04    ( ( XLPD_XPPU_BASEADDR ) + 0x00000110UL )
+#define XLPD_XPPU_MSTR_ID04_RSTVAL   0x83c30080UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID04_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID04_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID04_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID04_MID_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMstrId05
+ */
+#define XLPD_XPPU_MSTR_ID05    ( ( XLPD_XPPU_BASEADDR ) + 0x00000114UL )
+#define XLPD_XPPU_MSTR_ID05_RSTVAL   0x03c30081UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID05_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID05_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID05_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID05_MID_DEFVAL  0x81UL
+
+/**
+ * Register: XlpdXppuMstrId06
+ */
+#define XLPD_XPPU_MSTR_ID06    ( ( XLPD_XPPU_BASEADDR ) + 0x00000118UL )
+#define XLPD_XPPU_MSTR_ID06_RSTVAL   0x03c30082UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID06_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID06_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID06_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID06_MID_DEFVAL  0x82UL
+
+/**
+ * Register: XlpdXppuMstrId07
+ */
+#define XLPD_XPPU_MSTR_ID07    ( ( XLPD_XPPU_BASEADDR ) + 0x0000011CUL )
+#define XLPD_XPPU_MSTR_ID07_RSTVAL   0x83c30083UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID07_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID07_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID07_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID07_MID_DEFVAL  0x83UL
+
+/**
+ * Register: XlpdXppuMstrId08
+ */
+#define XLPD_XPPU_MSTR_ID08    ( ( XLPD_XPPU_BASEADDR ) + 0x00000120UL )
+#define XLPD_XPPU_MSTR_ID08_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID08_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID08_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID08_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId09
+ */
+#define XLPD_XPPU_MSTR_ID09    ( ( XLPD_XPPU_BASEADDR ) + 0x00000124UL )
+#define XLPD_XPPU_MSTR_ID09_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID09_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID09_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID09_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId10
+ */
+#define XLPD_XPPU_MSTR_ID10    ( ( XLPD_XPPU_BASEADDR ) + 0x00000128UL )
+#define XLPD_XPPU_MSTR_ID10_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID10_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID10_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID10_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId11
+ */
+#define XLPD_XPPU_MSTR_ID11    ( ( XLPD_XPPU_BASEADDR ) + 0x0000012CUL )
+#define XLPD_XPPU_MSTR_ID11_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID11_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID11_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID11_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId12
+ */
+#define XLPD_XPPU_MSTR_ID12    ( ( XLPD_XPPU_BASEADDR ) + 0x00000130UL )
+#define XLPD_XPPU_MSTR_ID12_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID12_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID12_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID12_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId13
+ */
+#define XLPD_XPPU_MSTR_ID13    ( ( XLPD_XPPU_BASEADDR ) + 0x00000134UL )
+#define XLPD_XPPU_MSTR_ID13_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID13_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID13_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID13_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId14
+ */
+#define XLPD_XPPU_MSTR_ID14    ( ( XLPD_XPPU_BASEADDR ) + 0x00000138UL )
+#define XLPD_XPPU_MSTR_ID14_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID14_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID14_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID14_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId15
+ */
+#define XLPD_XPPU_MSTR_ID15    ( ( XLPD_XPPU_BASEADDR ) + 0x0000013CUL )
+#define XLPD_XPPU_MSTR_ID15_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID15_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID15_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID15_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId16
+ */
+#define XLPD_XPPU_MSTR_ID16    ( ( XLPD_XPPU_BASEADDR ) + 0x00000140UL )
+#define XLPD_XPPU_MSTR_ID16_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID16_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID16_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID16_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId17
+ */
+#define XLPD_XPPU_MSTR_ID17    ( ( XLPD_XPPU_BASEADDR ) + 0x00000144UL )
+#define XLPD_XPPU_MSTR_ID17_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID17_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID17_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID17_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId18
+ */
+#define XLPD_XPPU_MSTR_ID18    ( ( XLPD_XPPU_BASEADDR ) + 0x00000148UL )
+#define XLPD_XPPU_MSTR_ID18_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID18_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID18_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID18_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId19
+ */
+#define XLPD_XPPU_MSTR_ID19    ( ( XLPD_XPPU_BASEADDR ) + 0x0000014CUL )
+#define XLPD_XPPU_MSTR_ID19_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID19_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID19_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID19_MID_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_XPPU_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_xppu_sink.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_xppu_sink.h
new file mode 100644
index 0000000..6f084fb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xlpd_xppu_sink.h
@@ -0,0 +1,81 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_XPPU_SINK_H__
+#define __XLPD_XPPU_SINK_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdXppuSink Base Address
+ */
+#define XLPD_XPPU_SINK_BASEADDR      0xFF9C0000UL
+
+/**
+ * Register: XlpdXppuSinkErrSts
+ */
+#define XLPD_XPPU_SINK_ERR_STS    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF00UL )
+#define XLPD_XPPU_SINK_ERR_STS_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_SHIFT   31UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_WIDTH   1UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_MASK    0x80000000UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_SHIFT   0UL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_WIDTH   12UL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_MASK    0x00000fffUL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkIsr
+ */
+#define XLPD_XPPU_SINK_ISR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF10UL )
+#define XLPD_XPPU_SINK_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkImr
+ */
+#define XLPD_XPPU_SINK_IMR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF14UL )
+#define XLPD_XPPU_SINK_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuSinkIer
+ */
+#define XLPD_XPPU_SINK_IER    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF18UL )
+#define XLPD_XPPU_SINK_IER_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_IERADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkIdr
+ */
+#define XLPD_XPPU_SINK_IDR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF1CUL )
+#define XLPD_XPPU_SINK_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_XPPU_SINK_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xocm_xmpu_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xocm_xmpu_cfg.h
new file mode 100644
index 0000000..67780dc
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xocm_xmpu_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XOCM_XMPU_CFG_H__
+#define __XOCM_XMPU_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XocmXmpuCfg Base Address
+ */
+#define XOCM_XMPU_CFG_BASEADDR      0xFFA70000UL
+
+/**
+ * Register: XocmXmpuCfgCtrl
+ */
+#define XOCM_XMPU_CFG_CTRL    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000000UL )
+#define XOCM_XMPU_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XocmXmpuCfgErrSts1
+ */
+#define XOCM_XMPU_CFG_ERR_STS1    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000004UL )
+#define XOCM_XMPU_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgErrSts2
+ */
+#define XOCM_XMPU_CFG_ERR_STS2    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000008UL )
+#define XOCM_XMPU_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgPoison
+ */
+#define XOCM_XMPU_CFG_POISON    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000000CUL )
+#define XOCM_XMPU_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_POISON_BASE_SHIFT   0UL
+#define XOCM_XMPU_CFG_POISON_BASE_WIDTH   20UL
+#define XOCM_XMPU_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XOCM_XMPU_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgIsr
+ */
+#define XOCM_XMPU_CFG_ISR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000010UL )
+#define XOCM_XMPU_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgImr
+ */
+#define XOCM_XMPU_CFG_IMR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000014UL )
+#define XOCM_XMPU_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XocmXmpuCfgIen
+ */
+#define XOCM_XMPU_CFG_IEN    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000018UL )
+#define XOCM_XMPU_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgIds
+ */
+#define XOCM_XMPU_CFG_IDS    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000001CUL )
+#define XOCM_XMPU_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgLock
+ */
+#define XOCM_XMPU_CFG_LOCK    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000020UL )
+#define XOCM_XMPU_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00Strt
+ */
+#define XOCM_XMPU_CFG_R00_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000100UL )
+#define XOCM_XMPU_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00End
+ */
+#define XOCM_XMPU_CFG_R00_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000104UL )
+#define XOCM_XMPU_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00Mstr
+ */
+#define XOCM_XMPU_CFG_R00_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000108UL )
+#define XOCM_XMPU_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00
+ */
+#define XOCM_XMPU_CFG_R00    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000010CUL )
+#define XOCM_XMPU_CFG_R00_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R00_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R00_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R00_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R00_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01Strt
+ */
+#define XOCM_XMPU_CFG_R01_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000110UL )
+#define XOCM_XMPU_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01End
+ */
+#define XOCM_XMPU_CFG_R01_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000114UL )
+#define XOCM_XMPU_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01Mstr
+ */
+#define XOCM_XMPU_CFG_R01_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000118UL )
+#define XOCM_XMPU_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01
+ */
+#define XOCM_XMPU_CFG_R01    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000011CUL )
+#define XOCM_XMPU_CFG_R01_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R01_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R01_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R01_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R01_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02Strt
+ */
+#define XOCM_XMPU_CFG_R02_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000120UL )
+#define XOCM_XMPU_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02End
+ */
+#define XOCM_XMPU_CFG_R02_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000124UL )
+#define XOCM_XMPU_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02Mstr
+ */
+#define XOCM_XMPU_CFG_R02_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000128UL )
+#define XOCM_XMPU_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02
+ */
+#define XOCM_XMPU_CFG_R02    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000012CUL )
+#define XOCM_XMPU_CFG_R02_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R02_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R02_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R02_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R02_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03Strt
+ */
+#define XOCM_XMPU_CFG_R03_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000130UL )
+#define XOCM_XMPU_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03End
+ */
+#define XOCM_XMPU_CFG_R03_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000134UL )
+#define XOCM_XMPU_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03Mstr
+ */
+#define XOCM_XMPU_CFG_R03_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000138UL )
+#define XOCM_XMPU_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03
+ */
+#define XOCM_XMPU_CFG_R03    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000013CUL )
+#define XOCM_XMPU_CFG_R03_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R03_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R03_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R03_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R03_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04Strt
+ */
+#define XOCM_XMPU_CFG_R04_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000140UL )
+#define XOCM_XMPU_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04End
+ */
+#define XOCM_XMPU_CFG_R04_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000144UL )
+#define XOCM_XMPU_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04Mstr
+ */
+#define XOCM_XMPU_CFG_R04_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000148UL )
+#define XOCM_XMPU_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04
+ */
+#define XOCM_XMPU_CFG_R04    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000014CUL )
+#define XOCM_XMPU_CFG_R04_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R04_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R04_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R04_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R04_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05Strt
+ */
+#define XOCM_XMPU_CFG_R05_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000150UL )
+#define XOCM_XMPU_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05End
+ */
+#define XOCM_XMPU_CFG_R05_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000154UL )
+#define XOCM_XMPU_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05Mstr
+ */
+#define XOCM_XMPU_CFG_R05_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000158UL )
+#define XOCM_XMPU_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05
+ */
+#define XOCM_XMPU_CFG_R05    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000015CUL )
+#define XOCM_XMPU_CFG_R05_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R05_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R05_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R05_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R05_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06Strt
+ */
+#define XOCM_XMPU_CFG_R06_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000160UL )
+#define XOCM_XMPU_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06End
+ */
+#define XOCM_XMPU_CFG_R06_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000164UL )
+#define XOCM_XMPU_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06Mstr
+ */
+#define XOCM_XMPU_CFG_R06_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000168UL )
+#define XOCM_XMPU_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06
+ */
+#define XOCM_XMPU_CFG_R06    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000016CUL )
+#define XOCM_XMPU_CFG_R06_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R06_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R06_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R06_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R06_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07Strt
+ */
+#define XOCM_XMPU_CFG_R07_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000170UL )
+#define XOCM_XMPU_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07End
+ */
+#define XOCM_XMPU_CFG_R07_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000174UL )
+#define XOCM_XMPU_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07Mstr
+ */
+#define XOCM_XMPU_CFG_R07_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000178UL )
+#define XOCM_XMPU_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07
+ */
+#define XOCM_XMPU_CFG_R07    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000017CUL )
+#define XOCM_XMPU_CFG_R07_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R07_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R07_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R07_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R07_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08Strt
+ */
+#define XOCM_XMPU_CFG_R08_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000180UL )
+#define XOCM_XMPU_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08End
+ */
+#define XOCM_XMPU_CFG_R08_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000184UL )
+#define XOCM_XMPU_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08Mstr
+ */
+#define XOCM_XMPU_CFG_R08_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000188UL )
+#define XOCM_XMPU_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08
+ */
+#define XOCM_XMPU_CFG_R08    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000018CUL )
+#define XOCM_XMPU_CFG_R08_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R08_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R08_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R08_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R08_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09Strt
+ */
+#define XOCM_XMPU_CFG_R09_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000190UL )
+#define XOCM_XMPU_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09End
+ */
+#define XOCM_XMPU_CFG_R09_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000194UL )
+#define XOCM_XMPU_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09Mstr
+ */
+#define XOCM_XMPU_CFG_R09_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000198UL )
+#define XOCM_XMPU_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09
+ */
+#define XOCM_XMPU_CFG_R09    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000019CUL )
+#define XOCM_XMPU_CFG_R09_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R09_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R09_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R09_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R09_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10Strt
+ */
+#define XOCM_XMPU_CFG_R10_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A0UL )
+#define XOCM_XMPU_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10End
+ */
+#define XOCM_XMPU_CFG_R10_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A4UL )
+#define XOCM_XMPU_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10Mstr
+ */
+#define XOCM_XMPU_CFG_R10_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A8UL )
+#define XOCM_XMPU_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10
+ */
+#define XOCM_XMPU_CFG_R10    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001ACUL )
+#define XOCM_XMPU_CFG_R10_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R10_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R10_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R10_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R10_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11Strt
+ */
+#define XOCM_XMPU_CFG_R11_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B0UL )
+#define XOCM_XMPU_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11End
+ */
+#define XOCM_XMPU_CFG_R11_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B4UL )
+#define XOCM_XMPU_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11Mstr
+ */
+#define XOCM_XMPU_CFG_R11_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B8UL )
+#define XOCM_XMPU_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11
+ */
+#define XOCM_XMPU_CFG_R11    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001BCUL )
+#define XOCM_XMPU_CFG_R11_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R11_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R11_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R11_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R11_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12Strt
+ */
+#define XOCM_XMPU_CFG_R12_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C0UL )
+#define XOCM_XMPU_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12End
+ */
+#define XOCM_XMPU_CFG_R12_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C4UL )
+#define XOCM_XMPU_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12Mstr
+ */
+#define XOCM_XMPU_CFG_R12_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C8UL )
+#define XOCM_XMPU_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12
+ */
+#define XOCM_XMPU_CFG_R12    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001CCUL )
+#define XOCM_XMPU_CFG_R12_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R12_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R12_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R12_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R12_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13Strt
+ */
+#define XOCM_XMPU_CFG_R13_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D0UL )
+#define XOCM_XMPU_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13End
+ */
+#define XOCM_XMPU_CFG_R13_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D4UL )
+#define XOCM_XMPU_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13Mstr
+ */
+#define XOCM_XMPU_CFG_R13_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D8UL )
+#define XOCM_XMPU_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13
+ */
+#define XOCM_XMPU_CFG_R13    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001DCUL )
+#define XOCM_XMPU_CFG_R13_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R13_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R13_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R13_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R13_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14Strt
+ */
+#define XOCM_XMPU_CFG_R14_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E0UL )
+#define XOCM_XMPU_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14End
+ */
+#define XOCM_XMPU_CFG_R14_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E4UL )
+#define XOCM_XMPU_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14Mstr
+ */
+#define XOCM_XMPU_CFG_R14_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E8UL )
+#define XOCM_XMPU_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14
+ */
+#define XOCM_XMPU_CFG_R14    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001ECUL )
+#define XOCM_XMPU_CFG_R14_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R14_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R14_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R14_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R14_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15Strt
+ */
+#define XOCM_XMPU_CFG_R15_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F0UL )
+#define XOCM_XMPU_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15End
+ */
+#define XOCM_XMPU_CFG_R15_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F4UL )
+#define XOCM_XMPU_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15Mstr
+ */
+#define XOCM_XMPU_CFG_R15_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F8UL )
+#define XOCM_XMPU_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15
+ */
+#define XOCM_XMPU_CFG_R15    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001FCUL )
+#define XOCM_XMPU_CFG_R15_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R15_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R15_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R15_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R15_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XOCM_XMPU_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xparameters_ps.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xparameters_ps.h
new file mode 100644
index 0000000..7d2a15d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xparameters_ps.h
@@ -0,0 +1,317 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xparameters_ps.h
+*
+* This file contains the address definitions for the hard peripherals
+* attached to the ARM Cortex A53 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef _XPARAMETERS_PS_H_
+#define _XPARAMETERS_PS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock
+ */
+
+/* Canonical definitions for DDR MEMORY */
+#define XPAR_DDR_MEM_BASEADDR		0x00000000U
+#define XPAR_DDR_MEM_HIGHADDR		0x3FFFFFFFU
+
+/* Canonical definitions for Interrupts  */
+#define XPAR_XUARTPS_0_INTR		XPS_UART0_INT_ID
+#define XPAR_XUARTPS_1_INTR		XPS_UART1_INT_ID
+#define XPAR_XIICPS_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_XIICPS_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_XSPIPS_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_XSPIPS_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_XCANPS_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_XCANPS_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_XGPIOPS_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_XEMACPS_0_INTR		XPS_GEM0_INT_ID
+#define XPAR_XEMACPS_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_XEMACPS_1_INTR		XPS_GEM1_INT_ID
+#define XPAR_XEMACPS_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_XEMACPS_2_INTR		XPS_GEM2_INT_ID
+#define XPAR_XEMACPS_2_WAKE_INTR	XPS_GEM2_WAKE_INT_ID
+#define XPAR_XEMACPS_3_INTR		XPS_GEM3_INT_ID
+#define XPAR_XEMACPS_3_WAKE_INTR	XPS_GEM3_WAKE_INT_ID
+#define XPAR_XSDIOPS_0_INTR		XPS_SDIO0_INT_ID
+#define XPAR_XQSPIPS_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_XSDIOPS_1_INTR		XPS_SDIO1_INT_ID
+#define XPAR_XWDTPS_0_INTR		XPS_WDT_INT_ID
+#define XPAR_XDCFG_0_INTR		XPS_DVC_INT_ID
+#define XPAR_SCUTIMER_INTR		XPS_SCU_TMR_INT_ID
+#define XPAR_SCUWDT_INTR		XPS_SCU_WDT_INT_ID
+#define XPAR_XTTCPS_0_INTR		XPS_TTC0_0_INT_ID
+#define XPAR_XTTCPS_1_INTR		XPS_TTC0_1_INT_ID
+#define XPAR_XTTCPS_2_INTR		XPS_TTC0_2_INT_ID
+#define XPAR_XTTCPS_3_INTR		XPS_TTC1_0_INT_ID
+#define XPAR_XTTCPS_4_INTR		XPS_TTC1_1_INT_ID
+#define XPAR_XTTCPS_5_INTR		XPS_TTC1_2_INT_ID
+#define XPAR_XTTCPS_6_INTR		XPS_TTC2_0_INT_ID
+#define XPAR_XTTCPS_7_INTR		XPS_TTC2_1_INT_ID
+#define XPAR_XTTCPS_8_INTR		XPS_TTC2_2_INT_ID
+#define XPAR_XTTCPS_9_INTR		XPS_TTC3_0_INT_ID
+#define XPAR_XTTCPS_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_XTTCPS_11_INTR		XPS_TTC3_2_INT_ID
+#define XPAR_XDMAPS_0_FAULT_INTR	XPS_DMA0_ABORT_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_0	XPS_DMA0_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_1	XPS_DMA1_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_2	XPS_DMA2_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_3	XPS_DMA3_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_4	XPS_DMA4_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_5	XPS_DMA5_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_6	XPS_DMA6_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_7	XPS_DMA7_INT_ID
+#define XPAR_XNANDPS8_0_INTR        	XPS_NAND_INT_ID
+#define XPAR_XADMAPS_0_INTR 		XPS_ADMA_CH0_INT_ID
+#define XPAR_XADMAPS_1_INTR 		XPS_ADMA_CH1_INT_ID
+#define XPAR_XADMAPS_2_INTR		XPS_ADMA_CH2_INT_ID
+#define XPAR_XADMAPS_3_INTR 		XPS_ADMA_CH3_INT_ID
+#define XPAR_XADMAPS_4_INTR		XPS_ADMA_CH4_INT_ID
+#define XPAR_XADMAPS_5_INTR 		XPS_ADMA_CH5_INT_ID
+#define XPAR_XADMAPS_6_INTR 		XPS_ADMA_CH6_INT_ID
+#define XPAR_XADMAPS_7_INTR 		XPS_ADMA_CH7_INT_ID
+#define XPAR_XCSUDMA_INTR 		XPS_CSU_DMA_INT_ID
+#define XPAR_XMPU_LPD_INTR 		XPS_XMPU_LPD_INT_ID
+#define XPAR_XZDMAPS_0_INTR		XPS_ZDMA_CH0_INT_ID
+#define XPAR_XZDMAPS_1_INTR		XPS_ZDMA_CH1_INT_ID
+#define XPAR_XZDMAPS_2_INTR 		XPS_ZDMA_CH2_INT_ID
+#define XPAR_XZDMAPS_3_INTR 		XPS_ZDMA_CH3_INT_ID
+#define XPAR_XZDMAPS_4_INTR		XPS_ZDMA_CH4_INT_ID
+#define XPAR_XZDMAPS_5_INTR 		XPS_ZDMA_CH5_INT_ID
+#define XPAR_XZDMAPS_6_INTR 		XPS_ZDMA_CH6_INT_ID
+#define XPAR_XZDMAPS_7_INTR 		XPS_ZDMA_CH7_INT_ID
+#define XPAR_XMPU_FPD_INTR 		XPS_XMPU_FPD_INT_ID
+#define XPAR_XCCI_FPD_INTR 		XPS_FPD_CCI_INT_ID
+#define XPAR_XSMMU_FPD_INTR 		XPS_FPD_SMMU_INT_ID
+#define XPAR_XUSBPS_0_INTR		XPS_USB3_0_ENDPT_INT_ID
+#define XPAR_XUSBPS_1_INTR		XPS_USB3_1_ENDPT_INT_ID
+
+/* Canonical definitions for SCU GIC */
+#define XPAR_SCUGIC_NUM_INSTANCES	1U
+#define XPAR_SCUGIC_SINGLE_DEVICE_ID	0U
+#define XPAR_SCUGIC_CPU_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00001000U)
+#define XPAR_SCUGIC_DIST_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00002000U)
+#define XPAR_SCUGIC_ACK_BEFORE		0U
+
+#define XPAR_CPU_CORTEXA53_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA53_0_CPU_CLK_FREQ_HZ
+
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock. These have been put for backwards compatibilty
+ */
+
+
+#define XPS_SYS_CTRL_BASEADDR	0xFF180000U
+#define XPS_SCU_PERIPH_BASE		0xF9000000U
+
+
+
+/* Shared Peripheral Interrupts (SPI) */
+
+/* FIXME */
+/*#define XPS_FPGA0_INT_ID		100U */
+#define XPS_FPGA1_INT_ID		62U
+#define XPS_FPGA2_INT_ID		63U
+#define XPS_FPGA3_INT_ID		64U
+#define XPS_FPGA4_INT_ID		65U
+#define XPS_FPGA5_INT_ID		66U
+#define XPS_FPGA6_INT_ID		67U
+#define XPS_FPGA7_INT_ID		68U
+#define XPS_DMA4_INT_ID			72U
+#define XPS_DMA5_INT_ID			73U
+#define XPS_DMA6_INT_ID			74U
+#define XPS_DMA7_INT_ID			75U
+#define XPS_FPGA8_INT_ID		84U
+#define XPS_FPGA9_INT_ID		85U
+#define XPS_FPGA10_INT_ID		86U
+#define XPS_FPGA11_INT_ID		87U
+#define XPS_FPGA12_INT_ID		88U
+#define XPS_FPGA13_INT_ID		89U
+#define XPS_FPGA14_INT_ID		90U
+#define XPS_FPGA15_INT_ID		91U
+
+/* Updated Interrupt-IDs */
+#define XPS_OCMINTR_INT_ID		(10U + 32U)
+#define XPS_NAND_INT_ID        		(14U + 32U)
+#define XPS_QSPI_INT_ID			(15U + 32U)
+#define XPS_GPIO_INT_ID			(16U + 32U)
+#define XPS_I2C0_INT_ID			(17U + 32U)
+#define XPS_I2C1_INT_ID			(18U + 32U)
+#define XPS_SPI0_INT_ID			(19U + 32U)
+#define XPS_SPI1_INT_ID			(20U + 32U)
+#define XPS_UART0_INT_ID		(21U + 32U)
+#define XPS_UART1_INT_ID		(22U + 32U)
+#define XPS_CAN0_INT_ID			(23U + 32U)
+#define XPS_CAN1_INT_ID			(24U + 32U)
+#define XPS_WDT_INT_ID			(52U + 32U)
+#define XPS_TTC0_0_INT_ID		(36U + 32U)
+#define XPS_TTC0_1_INT_ID		(37U + 32U)
+#define XPS_TTC0_2_INT_ID 		(38U + 32U)
+#define XPS_TTC1_0_INT_ID		(39U + 32U)
+#define XPS_TTC1_1_INT_ID		(40U + 32U)
+#define XPS_TTC1_2_INT_ID		(41U + 32U)
+#define XPS_TTC2_0_INT_ID		(42U + 32U)
+#define XPS_TTC2_1_INT_ID		(43U + 32U)
+#define XPS_TTC2_2_INT_ID		(44U + 32U)
+#define XPS_TTC3_0_INT_ID		(45U + 32U)
+#define XPS_TTC3_1_INT_ID		(46U + 32U)
+#define XPS_TTC3_2_INT_ID		(47U + 32U)
+#define XPS_SDIO0_INT_ID		(48U + 32U)
+#define XPS_SDIO1_INT_ID		(49U + 32U)
+#define XPS_GEM0_INT_ID			(57U + 32U)
+#define XPS_GEM0_WAKE_INT_ID		(58U + 32U)
+#define XPS_GEM1_INT_ID			(59U + 32U)
+#define XPS_GEM1_WAKE_INT_ID		(60U + 32U)
+#define XPS_GEM2_INT_ID			(61U + 32U)
+#define XPS_GEM2_WAKE_INT_ID		(62U + 32U)
+#define XPS_GEM3_INT_ID			(63U + 32U)
+#define XPS_GEM3_WAKE_INT_ID		(64U + 32U)
+#define XPS_USB3_0_ENDPT_INT_ID		(65U + 32U)
+#define XPS_USB3_1_ENDPT_INT_ID		(70U + 32U)
+#define XPS_ADMA_CH0_INT_ID		(77U + 32U)
+#define XPS_ADMA_CH1_INT_ID		(78U + 32U)
+#define XPS_ADMA_CH2_INT_ID		(79U + 32U)
+#define XPS_ADMA_CH3_INT_ID		(80U + 32U)
+#define XPS_ADMA_CH4_INT_ID		(81U + 32U)
+#define XPS_ADMA_CH5_INT_ID		(82U + 32U)
+#define XPS_ADMA_CH6_INT_ID		(83U + 32U)
+#define XPS_ADMA_CH7_INT_ID		(84U + 32U)
+#define XPS_CSU_DMA_INT_ID		(86U + 32U)
+#define XPS_XMPU_LPD_INT_ID		(88U + 32U)
+#define XPS_ZDMA_CH0_INT_ID		(124U + 32U)
+#define XPS_ZDMA_CH1_INT_ID		(125U + 32U)
+#define XPS_ZDMA_CH2_INT_ID		(126U + 32U)
+#define XPS_ZDMA_CH3_INT_ID		(127U + 32U)
+#define XPS_ZDMA_CH4_INT_ID		(128U + 32U)
+#define XPS_ZDMA_CH5_INT_ID		(129U + 32U)
+#define XPS_ZDMA_CH6_INT_ID		(130U + 32U)
+#define XPS_ZDMA_CH7_INT_ID		(131U + 32U)
+#define XPS_XMPU_FPD_INT_ID		(134U + 32U)
+#define XPS_FPD_CCI_INT_ID		(154U + 32U)
+#define XPS_FPD_SMMU_INT_ID		(155U + 32U)
+
+/* Private Peripheral Interrupts (PPI) */
+/*#define XPS_GLOBAL_TMR_INT_ID		27	 SCU Global Timer interrupt */
+/*#define XPS_FIQ_INT_ID			28	 FIQ from FPGA fabric */
+/*#define XPS_SCU_TMR_INT_ID		29	 SCU Private Timer interrupt */
+/*#define XPS_SCU_WDT_INT_ID		30	 SCU Private WDT interrupt */
+/*#define XPS_IRQ_INT_ID			31	 IRQ from FPGA fabric */
+
+/* REDEFINES for TEST APP */
+/* Definitions for UART */
+#define XPAR_PS7_UART_0_INTR		XPS_UART0_INT_ID
+#define XPAR_PS7_UART_1_INTR		XPS_UART1_INT_ID
+#define XPAR_PS7_USB_0_INTR		XPS_USB0_INT_ID
+#define XPAR_PS7_USB_1_INTR		XPS_USB1_INT_ID
+#define XPAR_PS7_I2C_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_PS7_I2C_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_PS7_SPI_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_PS7_SPI_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_PS7_CAN_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_PS7_CAN_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_PS7_GPIO_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_PS7_ETHERNET_0_INTR	XPS_GEM0_INT_ID
+#define XPAR_PS7_ETHERNET_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_1_INTR	XPS_GEM1_INT_ID
+#define XPAR_PS7_ETHERNET_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_2_INTR	XPS_GEM2_INT_ID
+#define XPAR_PS7_ETHERNET_2_WAKE_INTR	XPS_GEM2_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_3_INTR	XPS_GEM3_INT_ID
+#define XPAR_PS7_ETHERNET_3_WAKE_INTR	XPS_GEM3_WAKE_INT_ID
+
+#define XPAR_PS7_QSPI_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_PS7_WDT_0_INTR		XPS_WDT_INT_ID
+#define XPAR_PS7_SCUWDT_0_INTR		XPS_SCU_WDT_INT_ID
+#define XPAR_PS7_SCUTIMER_0_INTR	XPS_SCU_TMR_INT_ID
+#define XPAR_PS7_XADC_0_INTR		XPS_SYSMON_INT_ID
+
+#define XPAR_XADCPS_NUM_INSTANCES 1U
+#define XPAR_XADCPS_0_DEVICE_ID   0U
+#define XPAR_XADCPS_0_BASEADDR	  (0xF8007000U)
+#define XPAR_XADCPS_INT_ID		XPS_SYSMON_INT_ID
+
+/* For backwards compatibilty */
+#define XPAR_XUARTPS_0_CLOCK_HZ		XPAR_XUARTPS_0_UART_CLK_FREQ_HZ
+#define XPAR_XUARTPS_1_CLOCK_HZ		XPAR_XUARTPS_1_UART_CLK_FREQ_HZ
+#define XPAR_XTTCPS_0_CLOCK_HZ		XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_1_CLOCK_HZ		XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_2_CLOCK_HZ		XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_3_CLOCK_HZ		XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_4_CLOCK_HZ		XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_5_CLOCK_HZ		XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ
+#define XPAR_XIICPS_0_CLOCK_HZ		XPAR_XIICPS_0_I2C_CLK_FREQ_HZ
+#define XPAR_XIICPS_1_CLOCK_HZ		XPAR_XIICPS_1_I2C_CLK_FREQ_HZ
+
+#define XPAR_XQSPIPS_0_CLOCK_HZ		XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ
+
+#ifdef XPAR_CPU_CORTEXA53_0_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXA53_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA53_0_CPU_CLK_FREQ_HZ
+#endif
+
+#ifdef XPAR_CPU_CORTEXA53_1_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXA53_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA53_1_CPU_CLK_FREQ_HZ
+#endif
+
+#define XPAR_SCUTIMER_DEVICE_ID		0U
+#define XPAR_SCUWDT_DEVICE_ID		0U
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xpseudo_asm.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xpseudo_asm.h
new file mode 100644
index 0000000..1826bc1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xpseudo_asm.h
@@ -0,0 +1,53 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm.h
+*
+* This header file contains macros for using inline assembler code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+******************************************************************************/
+#ifndef XPSEUDO_ASM_H
+#define XPSEUDO_ASM_H
+#include "xreg_cortexa53.h"
+#include "xpseudo_asm_gcc.h"
+
+#endif /* XPSEUDO_ASM_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xreg_cortexa53.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xreg_cortexa53.h
new file mode 100644
index 0000000..3441454
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xreg_cortexa53.h
@@ -0,0 +1,182 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xreg_cortexa53.h
+*
+* This header file contains definitions for using inline assembler code. It is
+* written specifically for the GNU compiler.
+*
+* All of the ARM Cortex A53 GPRs, SPRs, and Debug Registers are defined along
+* with the positions of the bits within the registers.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+******************************************************************************/
+#ifndef XREG_CORTEXA53_H
+#define XREG_CORTEXA53_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+
+/* GPRs */
+#define XREG_GPR0				x0
+#define XREG_GPR1				x1
+#define XREG_GPR2				x2
+#define XREG_GPR3				x3
+#define XREG_GPR4				x4
+#define XREG_GPR5				x5
+#define XREG_GPR6				x6
+#define XREG_GPR7				x7
+#define XREG_GPR8				x8
+#define XREG_GPR9				x9
+#define XREG_GPR10				x10
+#define XREG_GPR11				x11
+#define XREG_GPR12				x12
+#define XREG_GPR13				x13
+#define XREG_GPR14				x14
+#define XREG_GPR15				x15
+#define XREG_GPR16				x16
+#define XREG_GPR17				x17
+#define XREG_GPR18				x18
+#define XREG_GPR19				x19
+#define XREG_GPR20				x20
+#define XREG_GPR21				x21
+#define XREG_GPR22				x22
+#define XREG_GPR23				x23
+#define XREG_GPR24				x24
+#define XREG_GPR25				x25
+#define XREG_GPR26				x26
+#define XREG_GPR27				x27
+#define XREG_GPR28				x28
+#define XREG_GPR29				x29
+#define XREG_GPR30				x30
+#define XREG_CPSR				cpsr
+
+/* Current Processor Status Register (CPSR) Bits */
+#define XREG_CPSR_MODE_BITS			0x1F
+#define XREG_CPSR_EL3h_MODE			0xD
+#define XREG_CPSR_EL3t_MODE			0xC
+#define XREG_CPSR_EL2h_MODE			0x9
+#define XREG_CPSR_EL2t_MODE			0x8
+#define XREG_CPSR_EL1h_MODE			0x5
+#define XREG_CPSR_EL1t_MODE			0x4
+#define XREG_CPSR_EL0t_MODE			0x0
+
+#define XREG_CPSR_IRQ_ENABLE		0x80
+#define XREG_CPSR_FIQ_ENABLE		0x40
+
+#define XREG_CPSR_N_BIT				0x80000000U
+#define XREG_CPSR_Z_BIT				0x40000000U
+#define XREG_CPSR_C_BIT				0x20000000U
+#define XREG_CPSR_V_BIT				0x10000000U
+
+/* FPSID bits */
+#define XREG_FPSID_IMPLEMENTER_BIT	(24U)
+#define XREG_FPSID_IMPLEMENTER_MASK	(0x000000FFU << FPSID_IMPLEMENTER_BIT)
+#define XREG_FPSID_SOFTWARE		(0X00000001U<<23U)
+#define XREG_FPSID_ARCH_BIT		(16U)
+#define XREG_FPSID_ARCH_MASK		(0x0000000FU  << FPSID_ARCH_BIT)
+#define XREG_FPSID_PART_BIT		(8U)
+#define XREG_FPSID_PART_MASK		(0x000000FFU << FPSID_PART_BIT)
+#define XREG_FPSID_VARIANT_BIT		(4U)
+#define XREG_FPSID_VARIANT_MASK		(0x0000000FU  << FPSID_VARIANT_BIT)
+#define XREG_FPSID_REV_BIT		(0U)
+#define XREG_FPSID_REV_MASK		(0x0000000FU  << FPSID_REV_BIT)
+
+/* FPSCR bits */
+#define XREG_FPSCR_N_BIT		(0X00000001U << 31U)
+#define XREG_FPSCR_Z_BIT		(0X00000001U << 30U)
+#define XREG_FPSCR_C_BIT		(0X00000001U << 29U)
+#define XREG_FPSCR_V_BIT		(0X00000001U << 28U)
+#define XREG_FPSCR_QC			(0X00000001U << 27U)
+#define XREG_FPSCR_AHP			(0X00000001U << 26U)
+#define XREG_FPSCR_DEFAULT_NAN		(0X00000001U << 25U)
+#define XREG_FPSCR_FLUSHTOZERO		(0X00000001U << 24U)
+#define XREG_FPSCR_ROUND_NEAREST	(0X00000000U << 22U)
+#define XREG_FPSCR_ROUND_PLUSINF	(0X00000001U << 22U)
+#define XREG_FPSCR_ROUND_MINUSINF	(0X00000002U << 22U)
+#define XREG_FPSCR_ROUND_TOZERO		(0X00000003U << 22U)
+#define XREG_FPSCR_RMODE_BIT		(22U)
+#define XREG_FPSCR_RMODE_MASK		(0X00000003U << FPSCR_RMODE_BIT)
+#define XREG_FPSCR_STRIDE_BIT		(20U)
+#define XREG_FPSCR_STRIDE_MASK		(0X00000003U << FPSCR_STRIDE_BIT)
+#define XREG_FPSCR_LENGTH_BIT		(16U)
+#define XREG_FPSCR_LENGTH_MASK		(0X00000007U << FPSCR_LENGTH_BIT)
+#define XREG_FPSCR_IDC			(0X00000001U << 7U)
+#define XREG_FPSCR_IXC			(0X00000001U << 4U)
+#define XREG_FPSCR_UFC			(0X00000001U << 3U)
+#define XREG_FPSCR_OFC			(0X00000001U << 2U)
+#define XREG_FPSCR_DZC			(0X00000001U << 1U)
+#define XREG_FPSCR_IOC			(0X00000001U << 0U)
+
+/* MVFR0 bits */
+#define XREG_MVFR0_RMODE_BIT		(28U)
+#define XREG_MVFR0_RMODE_MASK		(0x0000000FU << XREG_MVFR0_RMODE_BIT)
+#define XREG_MVFR0_SHORT_VEC_BIT	(24U)
+#define XREG_MVFR0_SHORT_VEC_MASK	(0x0000000FU << XREG_MVFR0_SHORT_VEC_BIT)
+#define XREG_MVFR0_SQRT_BIT		(20U)
+#define XREG_MVFR0_SQRT_MASK		(0x0000000FU << XREG_MVFR0_SQRT_BIT)
+#define XREG_MVFR0_DIVIDE_BIT		(16U)
+#define XREG_MVFR0_DIVIDE_MASK		(0x0000000FU << XREG_MVFR0_DIVIDE_BIT)
+#define XREG_MVFR0_EXEC_TRAP_BIT	(0X00000012U)
+#define XREG_MVFR0_EXEC_TRAP_MASK	(0X0000000FU << XREG_MVFR0_EXEC_TRAP_BIT)
+#define XREG_MVFR0_DP_BIT		(8U)
+#define XREG_MVFR0_DP_MASK		(0x0000000FU << XREG_MVFR0_DP_BIT)
+#define XREG_MVFR0_SP_BIT		(4U)
+#define XREG_MVFR0_SP_MASK		(0x0000000FU << XREG_MVFR0_SP_BIT)
+#define XREG_MVFR0_A_SIMD_BIT		(0U)
+#define XREG_MVFR0_A_SIMD_MASK		(0x0000000FU << MVFR0_A_SIMD_BIT)
+
+/* FPEXC bits */
+#define XREG_FPEXC_EX			(0X00000001U << 31U)
+#define XREG_FPEXC_EN			(0X00000001U << 30U)
+#define XREG_FPEXC_DEX			(0X00000001U << 29U)
+
+
+#define XREG_CONTROL_DCACHE_BIT	(0X00000001U<<2U)
+#define XREG_CONTROL_ICACHE_BIT	(0X00000001U<<12U)
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XREG_CORTEXA53_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xstatus.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xstatus.h
new file mode 100644
index 0000000..9c6e16e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xstatus.h
@@ -0,0 +1,535 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xstatus.h
+*
+* @addtogroup common_status_codes Xilinx® software status codes
+*
+* The xstatus.h file contains the Xilinx® software status codes.These codes are
+* used throughout the Xilinx device drivers.
+*
+* @{
+******************************************************************************/
+
+#ifndef XSTATUS_H		/* prevent circular inclusions */
+#define XSTATUS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/*********************** Common statuses 0 - 500 *****************************/
+/**
+@name Common Status Codes for All Device Drivers
+@{
+*/
+#define XST_SUCCESS                     0L
+#define XST_FAILURE                     1L
+#define XST_DEVICE_NOT_FOUND            2L
+#define XST_DEVICE_BLOCK_NOT_FOUND      3L
+#define XST_INVALID_VERSION             4L
+#define XST_DEVICE_IS_STARTED           5L
+#define XST_DEVICE_IS_STOPPED           6L
+#define XST_FIFO_ERROR                  7L	/*!< An error occurred during an
+						   operation with a FIFO such as
+						   an underrun or overrun, this
+						   error requires the device to
+						   be reset */
+#define XST_RESET_ERROR                 8L	/*!< An error occurred which requires
+						   the device to be reset */
+#define XST_DMA_ERROR                   9L	/*!< A DMA error occurred, this error
+						   typically requires the device
+						   using the DMA to be reset */
+#define XST_NOT_POLLED                  10L	/*!< The device is not configured for
+						   polled mode operation */
+#define XST_FIFO_NO_ROOM                11L	/*!< A FIFO did not have room to put
+						   the specified data into */
+#define XST_BUFFER_TOO_SMALL            12L	/*!< The buffer is not large enough
+						   to hold the expected data */
+#define XST_NO_DATA                     13L	/*!< There was no data available */
+#define XST_REGISTER_ERROR              14L	/*!< A register did not contain the
+						   expected value */
+#define XST_INVALID_PARAM               15L	/*!< An invalid parameter was passed
+						   into the function */
+#define XST_NOT_SGDMA                   16L	/*!< The device is not configured for
+						   scatter-gather DMA operation */
+#define XST_LOOPBACK_ERROR              17L	/*!< A loopback test failed */
+#define XST_NO_CALLBACK                 18L	/*!< A callback has not yet been
+						   registered */
+#define XST_NO_FEATURE                  19L	/*!< Device is not configured with
+						   the requested feature */
+#define XST_NOT_INTERRUPT               20L	/*!< Device is not configured for
+						   interrupt mode operation */
+#define XST_DEVICE_BUSY                 21L	/*!< Device is busy */
+#define XST_ERROR_COUNT_MAX             22L	/*!< The error counters of a device
+						   have maxed out */
+#define XST_IS_STARTED                  23L	/*!< Used when part of device is
+						   already started i.e.
+						   sub channel */
+#define XST_IS_STOPPED                  24L	/*!< Used when part of device is
+						   already stopped i.e.
+						   sub channel */
+#define XST_DATA_LOST                   26L	/*!< Driver defined error */
+#define XST_RECV_ERROR                  27L	/*!< Generic receive error */
+#define XST_SEND_ERROR                  28L	/*!< Generic transmit error */
+#define XST_NOT_ENABLED                 29L	/*!< A requested service is not
+						   available because it has not
+						   been enabled */
+/** @} */
+/***************** Utility Component statuses 401 - 500  *********************/
+/**
+@name Utility Component Status Codes 401 - 500
+@{
+*/
+#define XST_MEMTEST_FAILED              401L	/*!< Memory test failed */
+
+/** @} */
+/***************** Common Components statuses 501 - 1000 *********************/
+/**
+@name Packet Fifo Status Codes 501 - 510
+@{
+*/
+/********************* Packet Fifo statuses 501 - 510 ************************/
+
+#define XST_PFIFO_LACK_OF_DATA          501L	/*!< Not enough data in FIFO   */
+#define XST_PFIFO_NO_ROOM               502L	/*!< Not enough room in FIFO   */
+#define XST_PFIFO_BAD_REG_VALUE         503L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_PFIFO_ERROR                 504L	/*!< Generic packet FIFO error */
+#define XST_PFIFO_DEADLOCK              505L	/*!< Packet FIFO is reporting
+						 * empty and full simultaneously
+						 */
+/** @} */
+/**
+@name DMA Status Codes 511 - 530
+@{
+*/
+/************************** DMA statuses 511 - 530 ***************************/
+
+#define XST_DMA_TRANSFER_ERROR          511L	/*!< Self test, DMA transfer
+						   failed */
+#define XST_DMA_RESET_REGISTER_ERROR    512L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_DMA_SG_LIST_EMPTY           513L	/*!< Scatter gather list contains
+						   no buffer descriptors ready
+						   to be processed */
+#define XST_DMA_SG_IS_STARTED           514L	/*!< Scatter gather not stopped */
+#define XST_DMA_SG_IS_STOPPED           515L	/*!< Scatter gather not running */
+#define XST_DMA_SG_LIST_FULL            517L	/*!< All the buffer desciptors of
+						   the scatter gather list are
+						   being used */
+#define XST_DMA_SG_BD_LOCKED            518L	/*!< The scatter gather buffer
+						   descriptor which is to be
+						   copied over in the scatter
+						   list is locked */
+#define XST_DMA_SG_NOTHING_TO_COMMIT    519L	/*!< No buffer descriptors have been
+						   put into the scatter gather
+						   list to be commited */
+#define XST_DMA_SG_COUNT_EXCEEDED       521L	/*!< The packet count threshold
+						   specified was larger than the
+						   total # of buffer descriptors
+						   in the scatter gather list */
+#define XST_DMA_SG_LIST_EXISTS          522L	/*!< The scatter gather list has
+						   already been created */
+#define XST_DMA_SG_NO_LIST              523L	/*!< No scatter gather list has
+						   been created */
+#define XST_DMA_SG_BD_NOT_COMMITTED     524L	/*!< The buffer descriptor which was
+						   being started was not committed
+						   to the list */
+#define XST_DMA_SG_NO_DATA              525L	/*!< The buffer descriptor to start
+						   has already been used by the
+						   hardware so it can't be reused
+						 */
+#define XST_DMA_SG_LIST_ERROR           526L	/*!< General purpose list access
+						   error */
+#define XST_DMA_BD_ERROR                527L	/*!< General buffer descriptor
+						   error */
+/** @} */
+/**
+@name IPIF Status Codes Codes 531 - 550
+@{
+*/
+/************************** IPIF statuses 531 - 550 ***************************/
+
+#define XST_IPIF_REG_WIDTH_ERROR        531L	/*!< An invalid register width
+						   was passed into the function */
+#define XST_IPIF_RESET_REGISTER_ERROR   532L	/*!< The value of a register at
+						   reset was not valid */
+#define XST_IPIF_DEVICE_STATUS_ERROR    533L	/*!< A write to the device interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_DEVICE_ACK_ERROR       534L	/*!< The device interrupt status
+						   register did not reset when
+						   acked */
+#define XST_IPIF_DEVICE_ENABLE_ERROR    535L	/*!< The device interrupt enable
+						   register was not updated when
+						   other registers changed */
+#define XST_IPIF_IP_STATUS_ERROR        536L	/*!< A write to the IP interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_IP_ACK_ERROR           537L	/*!< The IP interrupt status register
+						   did not reset when acked */
+#define XST_IPIF_IP_ENABLE_ERROR        538L	/*!< IP interrupt enable register was
+						   not updated correctly when other
+						   registers changed */
+#define XST_IPIF_DEVICE_PENDING_ERROR   539L	/*!< The device interrupt pending
+						   register did not indicate the
+						   expected value */
+#define XST_IPIF_DEVICE_ID_ERROR        540L	/*!< The device interrupt ID register
+						   did not indicate the expected
+						   value */
+#define XST_IPIF_ERROR                  541L	/*!< Generic ipif error */
+/** @} */
+
+/****************** Device specific statuses 1001 - 4095 *********************/
+/**
+@name Ethernet Status Codes 1001 - 1050
+@{
+*/
+/********************* Ethernet statuses 1001 - 1050 *************************/
+
+#define XST_EMAC_MEMORY_SIZE_ERROR  1001L	/*!< Memory space is not big enough
+						 * to hold the minimum number of
+						 * buffers or descriptors */
+#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L	/*!< Memory allocation failed */
+#define XST_EMAC_MII_READ_ERROR     1003L	/*!< MII read error */
+#define XST_EMAC_MII_BUSY           1004L	/*!< An MII operation is in progress */
+#define XST_EMAC_OUT_OF_BUFFERS     1005L	/*!< Driver is out of buffers */
+#define XST_EMAC_PARSE_ERROR        1006L	/*!< Invalid driver init string */
+#define XST_EMAC_COLLISION_ERROR    1007L	/*!< Excess deferral or late
+						 * collision on polled send */
+/** @} */
+/**
+@name UART Status Codes 1051 - 1075
+@{
+*/
+/*********************** UART statuses 1051 - 1075 ***************************/
+#define XST_UART
+
+#define XST_UART_INIT_ERROR         1051L
+#define XST_UART_START_ERROR        1052L
+#define XST_UART_CONFIG_ERROR       1053L
+#define XST_UART_TEST_FAIL          1054L
+#define XST_UART_BAUD_ERROR         1055L
+#define XST_UART_BAUD_RANGE         1056L
+
+/** @} */
+/**
+@name IIC Status Codes 1076 - 1100
+@{
+*/
+/************************ IIC statuses 1076 - 1100 ***************************/
+
+#define XST_IIC_SELFTEST_FAILED         1076	/*!< self test failed            */
+#define XST_IIC_BUS_BUSY                1077	/*!< bus found busy              */
+#define XST_IIC_GENERAL_CALL_ADDRESS    1078	/*!< mastersend attempted with   */
+					     /* general call address        */
+#define XST_IIC_STAND_REG_RESET_ERROR   1079	/*!< A non parameterizable reg   */
+					     /* value after reset not valid */
+#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080	/*!< Tx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081	/*!< Rx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_TBA_REG_RESET_ERROR     1082	/*!< 10 bit addr incl in design  */
+					     /* value after reset not valid */
+#define XST_IIC_CR_READBACK_ERROR       1083	/*!< Read of the control register */
+					     /* didn't return value written */
+#define XST_IIC_DTR_READBACK_ERROR      1084	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_DRR_READBACK_ERROR      1085	/*!< Read of the data Receive reg */
+					     /* didn't return value written */
+#define XST_IIC_ADR_READBACK_ERROR      1086	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_TBA_READBACK_ERROR      1087	/*!< Read of the 10 bit addr reg */
+					     /* didn't return written value */
+#define XST_IIC_NOT_SLAVE               1088	/*!< The device isn't a slave    */
+/** @} */
+/**
+@name ATMC Status Codes 1101 - 1125
+@{
+*/
+/*********************** ATMC statuses 1101 - 1125 ***************************/
+
+#define XST_ATMC_ERROR_COUNT_MAX    1101L	/*!< the error counters in the ATM
+						   controller hit the max value
+						   which requires the statistics
+						   to be cleared */
+/** @} */
+/**
+@name Flash Status Codes 1126 - 1150
+@{
+*/
+/*********************** Flash statuses 1126 - 1150 **************************/
+
+#define XST_FLASH_BUSY                1126L	/*!< Flash is erasing or programming
+						 */
+#define XST_FLASH_READY               1127L	/*!< Flash is ready for commands */
+#define XST_FLASH_ERROR               1128L	/*!< Flash had detected an internal
+						   error. Use XFlash_DeviceControl
+						   to retrieve device specific codes
+						 */
+#define XST_FLASH_ERASE_SUSPENDED     1129L	/*!< Flash is in suspended erase state
+						 */
+#define XST_FLASH_WRITE_SUSPENDED     1130L	/*!< Flash is in suspended write state
+						 */
+#define XST_FLASH_PART_NOT_SUPPORTED  1131L	/*!< Flash type not supported by
+						   driver */
+#define XST_FLASH_NOT_SUPPORTED       1132L	/*!< Operation not supported */
+#define XST_FLASH_TOO_MANY_REGIONS    1133L	/*!< Too many erase regions */
+#define XST_FLASH_TIMEOUT_ERROR       1134L	/*!< Programming or erase operation
+						   aborted due to a timeout */
+#define XST_FLASH_ADDRESS_ERROR       1135L	/*!< Accessed flash outside its
+						   addressible range */
+#define XST_FLASH_ALIGNMENT_ERROR     1136L	/*!< Write alignment error */
+#define XST_FLASH_BLOCKING_CALL_ERROR 1137L	/*!< Couldn't return immediately from
+						   write/erase function with
+						   XFL_NON_BLOCKING_WRITE/ERASE
+						   option cleared */
+#define XST_FLASH_CFI_QUERY_ERROR     1138L	/*!< Failed to query the device */
+/** @} */
+/**
+@name SPI Status Codes 1151 - 1175
+@{
+*/
+/*********************** SPI statuses 1151 - 1175 ****************************/
+
+#define XST_SPI_MODE_FAULT          1151	/*!< master was selected as slave */
+#define XST_SPI_TRANSFER_DONE       1152	/*!< data transfer is complete */
+#define XST_SPI_TRANSMIT_UNDERRUN   1153	/*!< slave underruns transmit register */
+#define XST_SPI_RECEIVE_OVERRUN     1154	/*!< device overruns receive register */
+#define XST_SPI_NO_SLAVE            1155	/*!< no slave has been selected yet */
+#define XST_SPI_TOO_MANY_SLAVES     1156	/*!< more than one slave is being
+						 * selected */
+#define XST_SPI_NOT_MASTER          1157	/*!< operation is valid only as master */
+#define XST_SPI_SLAVE_ONLY          1158	/*!< device is configured as slave-only
+						 */
+#define XST_SPI_SLAVE_MODE_FAULT    1159	/*!< slave was selected while disabled */
+#define XST_SPI_SLAVE_MODE          1160	/*!< device has been addressed as slave */
+#define XST_SPI_RECEIVE_NOT_EMPTY   1161	/*!< device received data in slave mode */
+
+#define XST_SPI_COMMAND_ERROR       1162	/*!< unrecognised command - qspi only */
+#define XST_SPI_POLL_DONE           1163        /*!< controller completed polling the
+						   device for status */
+/** @} */
+/**
+@name OPB Arbiter Status Codes 1176 - 1200
+@{
+*/
+/********************** OPB Arbiter statuses 1176 - 1200 *********************/
+
+#define XST_OPBARB_INVALID_PRIORITY  1176	/*!< the priority registers have either
+						 * one master assigned to two or more
+						 * priorities, or one master not
+						 * assigned to any priority
+						 */
+#define XST_OPBARB_NOT_SUSPENDED     1177	/*!< an attempt was made to modify the
+						 * priority levels without first
+						 * suspending the use of priority
+						 * levels
+						 */
+#define XST_OPBARB_PARK_NOT_ENABLED  1178	/*!< bus parking by id was enabled but
+						 * bus parking was not enabled
+						 */
+#define XST_OPBARB_NOT_FIXED_PRIORITY 1179	/*!< the arbiter must be in fixed
+						 * priority mode to allow the
+						 * priorities to be changed
+						 */
+/** @} */
+/**
+@name INTC Status Codes 1201 - 1225
+@{
+*/
+/************************ Intc statuses 1201 - 1225 **************************/
+
+#define XST_INTC_FAIL_SELFTEST      1201	/*!< self test failed */
+#define XST_INTC_CONNECT_ERROR      1202	/*!< interrupt already in use */
+/** @} */
+/**
+@name TmrCtr Status Codes 1226 - 1250
+@{
+*/
+/********************** TmrCtr statuses 1226 - 1250 **************************/
+
+#define XST_TMRCTR_TIMER_FAILED     1226	/*!< self test failed */
+/** @} */
+/**
+@name WdtTb Status Codes 1251 - 1275
+@{
+*/
+/********************** WdtTb statuses 1251 - 1275 ***************************/
+
+#define XST_WDTTB_TIMER_FAILED      1251L
+/** @} */
+/**
+@name PlbArb status Codes 1276 - 1300
+@{
+*/
+/********************** PlbArb statuses 1276 - 1300 **************************/
+
+#define XST_PLBARB_FAIL_SELFTEST    1276L
+/** @} */
+/**
+@name Plb2Opb Status Codes 1301 - 1325
+@{
+*/
+/********************** Plb2Opb statuses 1301 - 1325 *************************/
+
+#define XST_PLB2OPB_FAIL_SELFTEST   1301L
+/** @} */
+/**
+@name Opb2Plb Status 1326 - 1350
+@{
+*/
+/********************** Opb2Plb statuses 1326 - 1350 *************************/
+
+#define XST_OPB2PLB_FAIL_SELFTEST   1326L
+/** @} */
+/**
+@name SysAce Status Codes 1351 - 1360
+@{
+*/
+/********************** SysAce statuses 1351 - 1360 **************************/
+
+#define XST_SYSACE_NO_LOCK          1351L	/*!< No MPU lock has been granted */
+/** @} */
+/**
+@name PCI Bridge Status Codes 1361 - 1375
+@{
+*/
+/********************** PCI Bridge statuses 1361 - 1375 **********************/
+
+#define XST_PCI_INVALID_ADDRESS     1361L
+/** @} */
+/**
+@name FlexRay Constants 1400 - 1409
+@{
+*/
+/********************** FlexRay constants 1400 - 1409 *************************/
+
+#define XST_FR_TX_ERROR			1400
+#define XST_FR_TX_BUSY			1401
+#define XST_FR_BUF_LOCKED		1402
+#define XST_FR_NO_BUF			1403
+/** @} */
+/**
+@name USB constants 1410 - 1420
+@{
+*/
+/****************** USB constants 1410 - 1420  *******************************/
+
+#define XST_USB_ALREADY_CONFIGURED	1410
+#define XST_USB_BUF_ALIGN_ERROR		1411
+#define XST_USB_NO_DESC_AVAILABLE	1412
+#define XST_USB_BUF_TOO_BIG		1413
+#define XST_USB_NO_BUF			1414
+/** @} */
+/**
+@name HWICAP constants 1421 - 1429
+@{
+*/
+/****************** HWICAP constants 1421 - 1429  *****************************/
+
+#define XST_HWICAP_WRITE_DONE		1421
+
+/** @} */
+/**
+@name AXI VDMA constants 1430 - 1440
+@{
+*/
+/****************** AXI VDMA constants 1430 - 1440  *****************************/
+
+#define XST_VDMA_MISMATCH_ERROR		1430
+/** @} */
+/**
+@name NAND Flash Status Codes 1441 - 1459
+@{
+*/
+/*********************** NAND Flash statuses 1441 - 1459  *********************/
+
+#define XST_NAND_BUSY			1441L	/*!< Flash is erasing or
+						 * programming
+						 */
+#define XST_NAND_READY			1442L	/*!< Flash is ready for commands
+						 */
+#define XST_NAND_ERROR			1443L	/*!< Flash had detected an
+						 * internal error.
+						 */
+#define XST_NAND_PART_NOT_SUPPORTED	1444L	/*!< Flash type not supported by
+						 * driver
+						 */
+#define XST_NAND_OPT_NOT_SUPPORTED	1445L	/*!< Operation not supported
+						 */
+#define XST_NAND_TIMEOUT_ERROR		1446L	/*!< Programming or erase
+						 * operation aborted due to a
+						 * timeout
+						 */
+#define XST_NAND_ADDRESS_ERROR		1447L	/*!< Accessed flash outside its
+						 * addressible range
+						 */
+#define XST_NAND_ALIGNMENT_ERROR	1448L	/*!< Write alignment error
+						 */
+#define XST_NAND_PARAM_PAGE_ERROR	1449L	/*!< Failed to read parameter
+						 * page of the device
+						 */
+#define XST_NAND_CACHE_ERROR		1450L	/*!< Flash page buffer error
+						 */
+
+#define XST_NAND_WRITE_PROTECTED	1451L	/*!< Flash is write protected
+						 */
+/** @} */
+
+/**************************** Type Definitions *******************************/
+
+typedef s32 XStatus;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_status_codes".
+*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xtime_l.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xtime_l.c
new file mode 100644
index 0000000..2289e22
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xtime_l.c
@@ -0,0 +1,100 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.c
+*
+* This file contains low level functions to get/set time from the Global Timer
+* register in the ARM Cortex A53 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.00 	pkp  05/29/14 First release
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xtime_l.h"
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+/****************************************************************************
+*
+* Set the time in the Global Timer Counter Register.
+*
+* @param	Value to be written to the Global Timer Counter Register.
+*
+* @return	None.
+*
+* @note		In multiprocessor environment reference time will reset/lost for
+*		all processors, when this function called by any one processor.
+*
+****************************************************************************/
+void XTime_SetTime(XTime Xtime_Global)
+{
+/*As the generic timer of A53 runs constantly time can not be set as desired
+so the API is left unimplemented*/
+}
+
+/****************************************************************************
+*
+* Get the time from the Global Timer Counter Register.
+*
+* @param	Pointer to the location to be updated with the time.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XTime_GetTime(XTime *Xtime_Global)
+{
+	*Xtime_Global = mfcp(CNTPCT_EL0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xtime_l.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xtime_l.h
new file mode 100644
index 0000000..0a95d53
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa53/xtime_l.h
@@ -0,0 +1,88 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.h
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.00 	pkp	   05/29/14 First release
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+
+#ifndef XTIME_H /* prevent circular inclusions */
+#define XTIME_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xparameters.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+typedef u64 XTime;
+
+/************************** Constant Definitions *****************************/
+
+/* Global Timer is always clocked at half of the CPU frequency */
+#define COUNTS_PER_SECOND          0x007A1200U
+
+#define XIOU_SCNTRS_BASEADDR      0XFF260000U
+#define XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET    0x00000000U
+#define XIOU_SCNTRS_FREQ_REG_OFFSET    0x00000020U
+#define XIOU_SCNTRS_FREQ		0x02FAF080U	/* 50 MHz */
+#define XIOU_SCNTRS_CNT_CNTRL_REG_EN    0X00000001U
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void XTime_SetTime(XTime Xtime_Global);
+void XTime_GetTime(XTime *Xtime_Global);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XTIME_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/ARM_argv_veneer.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/ARM_argv_veneer.c
new file mode 100644
index 0000000..bdf7d38
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/ARM_argv_veneer.c
@@ -0,0 +1 @@
+void __ARM_argv_veneer(void) {};
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_close.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_close.c
new file mode 100644
index 0000000..20c46c7
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_close.c
@@ -0,0 +1,6 @@
+#include "xil_types.h"
+/* Stuv for close() sys-call */
+__weak s32 _sys_close(s32 fh)
+{
+   return -1;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_exit.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_exit.c
new file mode 100644
index 0000000..2665533
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_exit.c
@@ -0,0 +1,8 @@
+#include "xil_types.h"
+/* Stuv for exit() sys-call */
+__weak void _sys_exit(s32 rc)
+{
+   while(1) {
+		;
+	}
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_iserror.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_iserror.c
new file mode 100644
index 0000000..d85495a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_iserror.c
@@ -0,0 +1,10 @@
+#include "xil_types.h"
+/* Stub for iserror() function */
+__weak s32 _sys_iserror(s32 status)
+{
+   if(status<0) {
+      return 1;
+	}
+
+   return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_istty.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_istty.c
new file mode 100644
index 0000000..7b29e74
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_istty.c
@@ -0,0 +1,7 @@
+#include "xil_types.h"
+/* Stub for istty sys-call */
+__weak s32 _sys_istty(u32* f)
+{
+   /* cannot read/write files */
+   return 1;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_open.c
new file mode 100644
index 0000000..81e7d40
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_open.c
@@ -0,0 +1,6 @@
+#include "xil_types.h"
+/* Stub for open sys-call */
+__weak s32 _sys_open(const char8* name, s32 openmode)
+{
+   return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_read.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_read.c
new file mode 100644
index 0000000..018e1d7
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_read.c
@@ -0,0 +1,7 @@
+#include "xil_types.h"
+/* Stub for read() sys-call */
+__weak s32 _sys_read(u32 fh, u8 *buf, u32 len, s32 mode)
+{
+   /* Return the number of character NOT read */
+   return len;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_write.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_write.c
new file mode 100644
index 0000000..390e04a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/_sys_write.c
@@ -0,0 +1,19 @@
+#include "xil_types.h"
+#include "xparameters.h"
+
+__weak s32 _sys_write(u32 fh, const u8 *buf, u32 len, s32 mode)
+{
+#ifdef STDOUT_BASEADDRESS
+  u32 volatile *uart_base = (u32 *)STDOUT_BASEADDRESS;
+  s32 i;
+
+  for (i =0; i < len;i++) {
+    /* wait if TNFUL */
+    while (*(uart_base + 11U) & (1U << 14U)) {
+		;
+	}
+    *(uart_base + 12U) = buf[i];
+  }
+#endif
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/asm_vectors.s b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/asm_vectors.s
new file mode 100644
index 0000000..9c1dbee
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/asm_vectors.s
@@ -0,0 +1,163 @@
+;******************************************************************************
+;
+; Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+;
+; Permission is hereby granted, free of charge, to any person obtaining a copy
+; of this software and associated documentation files (the "Software"), to deal
+; in the Software without restriction, including without limitation the rights
+; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+; copies of the Software, and to permit persons to whom the Software is
+; furnished to do so, subject to the following conditions:
+;
+; The above copyright notice and this permission notice shall be included in
+; all copies or substantial portions of the Software.
+;
+; Use of the Software is limited solely to applications:
+; (a) running on a Xilinx device, or
+; (b) that interact with a Xilinx device through a bus or interconnect.
+;
+; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+; XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+; WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+; OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+; SOFTWARE.
+;
+; Except as contained in this notice, the name of the Xilinx shall not be used
+; in advertising or otherwise to promote the sale, use or other dealings in
+; this Software without prior written authorization from Xilinx.
+;
+;*****************************************************************************
+;****************************************************************************
+;**
+; @file asm_vectors.s
+;
+; This file contains the initial vector table for the Cortex A9 processor
+;
+; 
+; MODIFICATION HISTORY:
+;
+; Ver	Who     Date	  Changes
+; ----- ------- -------- ---------------------------------------------------
+; 1.00a ecm/sdm 10/20/09 Initial version
+; 3.11a asa	9/17/13	 Added support for neon.
+; 4.00  pkp	01/22/14 Modified return addresses for interrupt
+;			 handlers
+; 5.1	pkp	05/13/15 Saved the addresses of instruction causing data
+;			 abort and prefetch abort into DataAbortAddr and
+;			 PrefetchAbortAddr for further use to fix CR#854523
+;

+;
+; @note
+;
+; None.
+;
+;****************************************************************************
+
+	EXPORT _vector_table
+	EXPORT IRQHandler
+
+	IMPORT _boot
+	IMPORT _prestart
+	IMPORT IRQInterrupt
+	IMPORT FIQInterrupt
+	IMPORT SWInterrupt
+	IMPORT DataAbortInterrupt
+	IMPORT PrefetchAbortInterrupt
+	IMPORT DataAbortAddr
+	IMPORT PrefetchAbortAddr
+
+	AREA |.vectors|, CODE
+	REQUIRE8     {TRUE}
+	PRESERVE8    {TRUE}
+	ENTRY ; define this as an entry point
+_vector_table
+	B	_boot
+	B	Undefined
+	B	SVCHandler
+	B	PrefetchAbortHandler
+	B	DataAbortHandler
+	NOP	; Placeholder for address exception vector
+	B	IRQHandler
+	B	FIQHandler
+
+
+IRQHandler					; IRQ vector handler
+
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	vpush {d0-d7}
+	vpush {d16-d31}
+	vmrs r1, FPSCR
+	push {r1}
+	vmrs r1, FPEXC
+	push {r1}
+	bl	IRQInterrupt			; IRQ vector
+	pop 	{r1}
+	vmsr    FPEXC, r1
+	pop 	{r1}
+	vmsr    FPSCR, r1
+	vpop    {d16-d31}
+	vpop    {d0-d7}
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	subs	pc, lr, #4			; adjust return
+
+
+FIQHandler					; FIQ vector handler
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	vpush {d0-d7}
+	vpush {d16-d31}
+	vmrs r1, FPSCR
+	push {r1}
+	vmrs r1, FPEXC
+	push {r1}
+FIQLoop
+	bl	FIQInterrupt			; FIQ vector
+	pop 	{r1}
+	vmsr    FPEXC, r1
+	pop 	{r1}
+	vmsr    FPSCR, r1
+	vpop    {d16-d31}
+	vpop    {d0-d7}
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	subs	pc, lr, #4			; adjust return
+
+
+Undefined					; Undefined handler
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	b	_prestart
+
+	movs	pc, lr
+
+
+SVCHandler					; SWI handler
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	tst	r0, #0x20			; check the T bit
+	ldrneh	r0, [lr,#-2]			; Thumb mode
+	bicne	r0, r0, #0xff00			; Thumb mode
+	ldreq	r0, [lr,#-4]			; ARM mode
+	biceq	r0, r0, #0xff000000		; ARM mode
+	bl	SWInterrupt			; SWInterrupt: call C function here
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	movs	pc, lr				; adjust return
+
+DataAbortHandler				; Data Abort handler
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	ldr     r0, =DataAbortAddr
+	sub     r1, lr,#8
+	str     r1, [r0]			;Address of instruction causing data abort
+	bl	DataAbortInterrupt		;DataAbortInterrupt :call C function here
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	subs	pc, lr, #8			; adjust return
+
+PrefetchAbortHandler				; Prefetch Abort handler
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	ldr     r0, =PrefetchAbortAddr
+	sub     r1, lr,#4
+	str     r1, [r0]			;Address of instruction causing prefetch abort
+	bl	PrefetchAbortInterrupt		; PrefetchAbortInterrupt: call C function here
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	subs	pc, lr, #4			; adjust return
+
+	END
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/boot.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/boot.S
new file mode 100644
index 0000000..73de49b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/boot.S
@@ -0,0 +1,443 @@
+;******************************************************************************
+;
+; Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+;
+; Permission is hereby granted, free of charge, to any person obtaining a copy
+; of this software and associated documentation files (the "Software"), to deal
+; in the Software without restriction, including without limitation the rights
+; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+; copies of the Software, and to permit persons to whom the Software is
+; furnished to do so, subject to the following conditions:
+;
+; The above copyright notice and this permission notice shall be included in
+; all copies or substantial portions of the Software.
+;
+; Use of the Software is limited solely to applications:
+; (a) running on a Xilinx device, or
+; (b) that interact with a Xilinx device through a bus or interconnect.
+;
+; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+; XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+; WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+; OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+; SOFTWARE.
+;
+; Except as contained in this notice, the name of the Xilinx shall not be used
+; in advertising or otherwise to promote the sale, use or other dealings in
+; this Software without prior written authorization from Xilinx.
+;
+;*****************************************************************************
+;****************************************************************************
+;**
+; @file boot.S
+;
+; This file contains the initial startup code for the Cortex A9 processor
+;
+; 
+; MODIFICATION HISTORY:
+;
+; Ver	Who	  Date	  Changes
+; ----- ------- -------- ---------------------------------------------------
+; 1.00a ecm/sdm 10/20/09 Initial version
+; 3.04a sdm	01/02/12 Updated to clear cp15 regs with unknown reset values
+; 3.06a sgd     05/15/12 Updated L2CC Auxiliary and Tag RAM Latency control
+;			 register settings.
+; 3.06a asa 	06/17/12 Modified the TTBR settings and L2 Cache auxiliary
+;		         register settings.
+; 3.07a sgd 	07/05/12 Updated with reset and start Global Timer
+; 3.07a sgd 	10/19/12 SMC NOR and SRAM initialization with build option
+; 4.2   pkp	06/19/14 Enabled asynchronous abort exception
+; 4.2	pkp  	08/04/14 Removed PEEP board related code which contained
+;			 initialization of uart smc nor and sram
+; 5.0	pkp	16/12/14 Modified initialization code to enable scu after
+;			 MMU is enabled and removed incorrect initialization
+;			 of TLB lockdown register to fix CR#830580
+; 5.1   pkp	05/13/15 Changed the initialization order so to first invalidate
+;			 caches and TLB, enable MMU and caches, then enable SMP
+;			 bit in ACTLR. L2Cache invalidation and enabling of L2Cache
+;			 is done later.
+; 

+;
+; @note
+;
+; None.
+;
+;****************************************************************************
+
+
+
+#include "xparameters.h"
+#include "xil_errata.h"
+
+#define UART_BAUDRATE	115200
+
+	EXPORT _prestart
+	EXPORT _boot
+
+	IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
+	IMPORT |Image$$IRQ_STACK$$ZI$$Limit|
+	IMPORT |Image$$SPV_STACK$$ZI$$Limit|
+	IMPORT |Image$$ABORT_STACK$$ZI$$Limit|
+	IMPORT MMUTable
+	IMPORT _vector_table
+	IMPORT __main
+	IMPORT Xil_ExceptionInit
+	IMPORT XTime_SetTime
+
+PSS_L2CC_BASE_ADDR	EQU	0xF8F02000
+PSS_SLCR_BASE_ADDR 	EQU	0xF8000000
+
+L2CCWay		EQU	(PSS_L2CC_BASE_ADDR + 0x077C)	;(PSS_L2CC_BASE_ADDR + PSS_L2CC_CACHE_INVLD_WAY_OFFSET)
+L2CCSync	EQU	(PSS_L2CC_BASE_ADDR + 0x0730)	;(PSS_L2CC_BASE_ADDR + PSS_L2CC_CACHE_SYNC_OFFSET)
+L2CCCrtl	EQU	(PSS_L2CC_BASE_ADDR + 0x0100)	;(PSS_L2CC_BASE_ADDR + PSS_L2CC_CNTRL_OFFSET)
+L2CCAuxCrtl	EQU	(PSS_L2CC_BASE_ADDR + 0x0104)	;(PSS_L2CC_BASE_ADDR + XPSS_L2CC_AUX_CNTRL_OFFSET)
+L2CCTAGLatReg	EQU	(PSS_L2CC_BASE_ADDR + 0x0108)	;(PSS_L2CC_BASE_ADDR + XPSS_L2CC_TAG_RAM_CNTRL_OFFSET)
+L2CCDataLatReg	EQU	(PSS_L2CC_BASE_ADDR + 0x010C)	;(PSS_L2CC_BASE_ADDR + XPSS_L2CC_DATA_RAM_CNTRL_OFFSET)
+L2CCIntClear	EQU	(PSS_L2CC_BASE_ADDR + 0x0220)	;(PSS_L2CC_BASE_ADDR + XPSS_L2CC_IAR_OFFSET)
+L2CCIntRaw	EQU	(PSS_L2CC_BASE_ADDR + 0x021C)	;(PSS_L2CC_BASE_ADDR + XPSS_L2CC_ISR_OFFSET)
+
+SLCRlockReg	EQU    (PSS_SLCR_BASE_ADDR + 0x04)	/*(PSS_SLCR_BASE_ADDR + XPSS_SLCR_LOCK_OFFSET)*/
+SLCRUnlockReg   EQU    (PSS_SLCR_BASE_ADDR + 0x08)	/*(PSS_SLCR_BASE_ADDR + XPSS_SLCR_UNLOCK_OFFSET)*/
+SLCRL2cRamReg   EQU    (PSS_SLCR_BASE_ADDR + 0xA1C) /*(PSS_SLCR_BASE_ADDR + XPSS_SLCR_L2C_RAM_OFFSET)*/
+
+SLCRlockKey	EQU        	0x767B			/* SLCR lock key */
+SLCRUnlockKey	EQU        	0xDF0D			/* SLCR unlock key */
+SLCRL2cRamConfig EQU      	0x00020202      /* SLCR L2C ram configuration */
+
+CRValMmuCac		EQU	2_01000000000101	; Enable IDC, and MMU
+CRValHiVectorAddr	EQU	2_10000000000000	; Set the Vector address to high, 0xFFFF0000
+
+L2CCAuxControl	EQU	0x72360000	; Enable all prefetching, Way Size (16 KB) and High Priority for SO and Dev Reads Enable
+L2CCControl	EQU	0x01		; Enable L2CC
+L2CCTAGLatency	EQU	0x0111		; 7 Cycles of latency for TAG RAM
+L2CCDataLatency	EQU	0x0121		; 7 Cycles of latency for DATA RAM
+
+FPEXC_EN	EQU	0x40000000	; FPU enable bit, (1 << 30)
+
+	AREA |.boot|, CODE
+	PRESERVE8
+
+
+; this initializes the various processor modes
+
+_prestart
+_boot
+
+#if XPAR_CPU_ID==0
+; only allow cp0 through
+	mrc	p15,0,r1,c0,c0,5
+	and	r1, r1, #0xf
+	cmp	r1, #0
+	beq	OKToRun
+EndlessLoop0
+	wfe
+	b	EndlessLoop0
+
+#elif XPAR_CPU_ID==1
+; only allow cp1 through
+	mrc	p15,0,r1,c0,c0,5
+	and	r1, r1, #0xf
+	cmp	r1, #1
+	beq	OKToRun
+EndlessLoop1
+	wfe
+	b	EndlessLoop1
+#endif
+
+OKToRun
+	mrc     p15, 0, r0, c0, c0, 0		/* Get the revision */
+	and     r5, r0, #0x00f00000
+	and     r6, r0, #0x0000000f
+	orr     r6, r6, r5, lsr #20-4
+
+#ifdef CONFIG_ARM_ERRATA_742230
+	cmp     r6, #0x22                       /* only present up to r2p2 */
+	mrcle   p15, 0, r10, c15, c0, 1         /* read diagnostic register */
+	orrle   r10, r10, #1 << 4               /* set bit #4 */
+	mcrle   p15, 0, r10, c15, c0, 1         /* write diagnostic register */
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_743622
+	teq     r5, #0x00200000                 /* only present in r2p* */
+	mrceq   p15, 0, r10, c15, c0, 1         /* read diagnostic register */
+	orreq   r10, r10, #1 << 6               /* set bit #6 */
+	mcreq   p15, 0, r10, c15, c0, 1         /* write diagnostic register */
+#endif
+
+	/* set VBAR to the _vector_table address in scatter file */
+	ldr	r0, =_vector_table
+	mcr	p15, 0, r0, c12, c0, 0
+
+	;invalidate scu
+	ldr	r7, =0xf8f0000c
+	ldr	r6, =0xffff
+	str	r6, [r7]
+
+	;Invalidate caches and TLBs
+	mov	r0,#0				; r0 = 0
+	mcr	p15, 0, r0, c8, c7, 0		; invalidate TLBs
+	mcr	p15, 0, r0, c7, c5, 0		; invalidate icache
+	mcr	p15, 0, r0, c7, c5, 6		; Invalidate branch predictor array
+	bl	invalidate_dcache		; invalidate dcache
+
+	; Disable MMU, if enabled
+	mrc	p15, 0, r0, c1, c0, 0		; read CP15 register 1
+	bic	r0, r0, #0x1			; clear bit 0
+	mcr	p15, 0, r0, c1, c0, 0		; write value back
+
+#ifdef SHAREABLE_DDR
+	; Mark the entire DDR memory as shareable
+	ldr	r3, =0x3ff			; 1024 entries to cover 1G DDR
+	ldr	r0, =TblBase			; MMU Table address in memory
+	ldr	r2, =0x15de6			; S=1, TEX=b101 AP=b11, Domain=b1111, C=b0, B=b1
+shareable_loop:
+	str	r2, [r0]			; write the entry to MMU table
+	add	r0, r0, #0x4			; next entry in the table
+	add	r2, r2, #0x100000		; next section
+	subs	r3, r3, #1
+	bge	shareable_loop			; loop till 1G is covered
+#endif
+
+	; In case of AMP, map virtual address 0x20000000 to 0x00000000  and mark it as non-cacheable
+#if USE_AMP==1
+	ldr	r3, =0x1ff			; 512 entries to cover 512MB DDR
+	ldr	r0, =TblBase			; MMU Table address in memory
+	add	r0, r0, #0x800			; Address of entry in MMU table, for 0x20000000
+	ldr	r2, =0x0c02			; S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b0
+mmu_loop:
+	str	r2, [r0]			; write the entry to MMU table
+	add	r0, r0, #0x4			; next entry in the table
+	add	r2, r2, #0x100000		; next section
+	subs	r3, r3, #1
+	bge	mmu_loop			; loop till 512MB is covered
+#endif
+
+	mrs	r0, cpsr			; get the current PSR
+	mvn	r1, #0x1f			; set up the irq stack pointer
+	and	r2, r1, r0
+	orr	r2, r2, #0x12			; IRQ mode
+	msr	apsr, r2			; was cpsr, apsr is considered synonym
+	ldr	r13,=|Image$$IRQ_STACK$$ZI$$Limit|	; IRQ stack pointer
+
+	mrs	r0, cpsr			; get the current PSR
+	mvn	r1, #0x1f			; set up the supervisor stack pointer
+	and	r2, r1, r0
+	orr	r2, r2, #0x13			; supervisor mode
+	msr	apsr, r2			; was cpsr, apsr is considered synonym
+	ldr	r13,=|Image$$SPV_STACK$$ZI$$Limit|	; Supervisor stack pointer
+
+	mrs	r0, cpsr			; get the current PSR
+	mvn	r1, #0x1f			; set up the Abort  stack pointer
+	and	r2, r1, r0
+	orr	r2, r2, #0x17			; Abort mode
+	msr	apsr, r2			; was cpsr, apsr is considered synonym
+	ldr	r13,=|Image$$ABORT_STACK$$ZI$$Limit|	; Abort stack pointer
+
+	mrs	r0, cpsr			; get the current PSR
+	mvn	r1, #0x1f			; set up the system stack pointer
+	and	r2, r1, r0
+	orr	r2, r2, #0x1f			; SYS mode
+	msr	apsr, r2			 ; was cpsr, apsr is considered synonym
+	ldr	r13,=|Image$$ARM_LIB_STACK$$ZI$$Limit|	; SYS stack pointer
+
+	;set scu enable bit in scu
+	ldr	r7, =0xf8f00000
+	ldr	r0, [r7]
+	orr	r0, r0, #0x1
+	str	r0, [r7]
+
+	; enable MMU and cache
+
+	ldr	r0,=MMUTable			; Load MMU translation table base
+	orr	r0, r0, #0x5B			; Outer-cacheable, WB
+	mcr	p15, 0, r0, c2, c0, 0		; TTB0
+
+	mvn	r0,#0
+	mcr	p15,0,r0,c3,c0,0
+
+	; Enable mmu, icahce and dcache
+	ldr	r0,=CRValMmuCac
+
+	mcr	p15,0,r0,c1,c0,0		; Enable cache and MMU
+	dsb					; dsb allow the MMU to start up
+	isb					; isb flush prefetch buffer
+
+	; Write to ACTLR
+	mrc	p15, 0,r0, c1, c0, 1		; Read ACTLR
+	orr	r0, r0, #(0x01 << 6)		; SMP bit
+	orr	r0, r0, #(0x01 )		; Cache/TLB maintenance broadcast
+	mcr	p15, 0,r0, c1, c0, 1		; Write ACTLR
+
+; Invalidate L2 Cache and initialize L2 Cache
+; For AMP, assume running on CPU1. Don't initialize L2 Cache (up to Linux)
+#if USE_AMP!=1
+	ldr	r0,=L2CCCrtl			; Load L2CC base address base + control register
+	mov	r1, #0				; force the disable bit
+	str	r1, [r0]			; disable the L2 Caches
+
+	ldr	r0,=L2CCAuxCrtl			; Load L2CC base address base + Aux control register
+	ldr	r1,[r0]				; read the register
+	ldr	r2,=L2CCAuxControl		; set the default bits
+	orr	r1,r1,r2
+	str	r1, [r0]			; store the Aux Control Register
+
+	ldr	r0,=L2CCTAGLatReg		; Load L2CC base address base + TAG Latency address
+	ldr	r1,=L2CCTAGLatency		; set the latencies for the TAG
+	str	r1, [r0]			; store the TAG Latency register Register
+
+	ldr	r0,=L2CCDataLatReg		; Load L2CC base address base + Data Latency address
+	ldr	r1,=L2CCDataLatency		; set the latencies for the Data
+	str	r1, [r0]			; store the Data Latency register Register
+
+	ldr	r0,=L2CCWay			; Load L2CC base address base + way register
+	ldr	r2, =0xFFFF
+	str	r2, [r0]			; force invalidate
+
+	ldr	r0,=L2CCSync			; need to poll 0x730, PSS_L2CC_CACHE_SYNC_OFFSET
+						; Load L2CC base address base + sync register
+	; poll for completion
+Sync
+	ldr	r1, [r0]
+	cmp	r1, #0
+	bne	Sync
+
+	ldr	r0,=L2CCIntRaw			; clear pending interrupts
+	ldr	r1,[r0]
+	ldr	r0,=L2CCIntClear
+	str	r1,[r0]
+
+	ldr	r0,=SLCRUnlockReg		;Load SLCR base address base + unlock register
+	ldr	r1,=SLCRUnlockKey	   	;set unlock key
+	str	r1, [r0]		   	;Unlock SLCR
+
+	ldr	r0,=SLCRL2cRamReg		;Load SLCR base address base + l2c Ram Control register
+	ldr	r1,=SLCRL2cRamConfig        	;set the configuration value
+	str	r1, [r0]	        	;store the L2c Ram Control Register
+
+	ldr	r0,=SLCRlockReg         	;Load SLCR base address base + lock register
+	ldr	r1,=SLCRlockKey	        	;set lock key
+	str	r1, [r0]	        	;lock SLCR
+
+	ldr	r0,=L2CCCrtl			; Load L2CC base address base + control register
+	ldr	r1,[r0]				; read the register
+	mov	r2, #L2CCControl		; set the enable bit
+	orr	r1,r1,r2
+	str	r1, [r0]			; enable the L2 Caches
+#endif
+
+	mov	r0, r0
+	mrc	p15, 0, r1, c1, c0, 2		; read cp access control register (CACR) into r1
+	orr	r1, r1, #(0xf << 20)		; enable full access for p10 & p11
+	mcr	p15, 0, r1, c1, c0, 2		; write back into CACR
+
+	; enable vfp
+	fmrx  r1, FPEXC				; read the exception register
+	orr	r1,r1, #FPEXC_EN		; set VFP enable bit, leave the others in orig state
+	fmxr  FPEXC, r1				; write back the exception register
+
+	mrc	p15, 0, r0, c1, c0, 0		; flow prediction enable
+	orr	r0, r0, #(0x01 << 11)		; #0x8000
+	mcr	p15,0,r0,c1,c0,0
+
+	mrc	p15, 0, r0, c1, c0, 1		; read Auxiliary Control Register
+	orr	r0, r0, #(0x1 << 2)		; enable Dside prefetch
+	orr	r0, r0, #(0x1 << 1)		; enable L2 prefetch
+	mcr	p15, 0, r0, c1, c0, 1		; write Auxiliary Control Register
+
+	mrs	r0, cpsr			/* get the current PSR */
+	bic	r0, r0, #0x100			/* enable asynchronous abort exception */
+	msr	cpsr_xsf, r0
+
+; Clear cp15 regs with unknown reset values
+	mov	r0, #0x0
+	mcr	p15, 0, r0, c5, c0, 0		; DFSR
+	mcr	p15, 0, r0, c5, c0, 1		; IFSR
+	mcr	p15, 0, r0, c6, c0, 0		; DFAR
+	mcr	p15, 0, r0, c6, c0, 2		; IFAR
+	mcr	p15, 0, r0, c9, c13, 2		; PMXEVCNTR
+	mcr	p15, 0, r0, c13, c0, 2		; TPIDRURW
+	mcr	p15, 0, r0, c13, c0, 3		; TPIDRURO
+
+; Reset and start Cycle Counter
+	mov	r2, #0x80000000			; clear overflow
+	mcr	p15, 0, r2, c9, c12, 3
+	mov	r2, #0xd			; D, C, E
+	mcr	p15, 0, r2, c9, c12, 0
+	mov	r2, #0x80000000			; enable cycle counter
+	mcr	p15, 0, r2, c9, c12, 1
+
+; Reset and start Global Timer
+    mov	r0, #0x0
+    mov	r1, #0x0
+    bl XTime_SetTime
+
+#ifdef PROFILING			/* defined in Makefile */
+	/* Setup profiling stuff */
+	bl	_profile_init
+#endif /* PROFILING */
+
+; make sure argc and argv are valid
+	mov r0, #0
+	mov r1, #0
+	b  __main				; jump to C startup code
+	and	r0, r0, r0			; no op
+
+Ldone  b  Ldone					; Paranoia: we should never get here
+
+
+; *************************************************************************
+; *
+; * invalidate_dcache - invalidate the entire d-cache by set/way
+; *
+; * Note: for Cortex-A9, there is no cp instruction for invalidating
+; * the whole D-cache. Need to invalidate each line.
+; *
+; *************************************************************************
+
+invalidate_dcache
+	mrc	p15, 1, r0, c0, c0, 1		; read CLIDR
+	ands	r3, r0, #0x7000000
+	mov	r3, r3, lsr #23			; cache level value (naturally aligned)
+	beq	finished
+	mov	r10, #0				; start with level 0
+loop1
+	add	r2, r10, r10, lsr #1		; work out 3xcachelevel
+	mov	r1, r0, lsr r2			; bottom 3 bits are the Cache type for this level
+	and	r1, r1, #7			; get those 3 bits alone
+	cmp	r1, #2
+	blt	skip				; no cache or only instruction cache at this level
+	mcr	p15, 2, r10, c0, c0, 0		; write the Cache Size selection register
+	isb					; isb to sync the change to the CacheSizeID reg
+	mrc	p15, 1, r1, c0, c0, 0		; reads current Cache Size ID register
+	and	r2, r1, #7			; extract the line length field
+	add	r2, r2, #4			; add 4 for the line length offset (log2 16 bytes)
+	ldr	r4, =0x3ff
+	ands	r4, r4, r1, lsr #3		; r4 is the max number on the way size (right aligned)
+	clz	r5, r4				; r5 is the bit position of the way size increment
+	ldr	r7, =0x7fff
+	ands	r7, r7, r1, lsr #13		; r7 is the max number of the index size (right aligned)
+loop2
+	mov	r9, r4				; r9 working copy of the max way size (right aligned)
+loop3
+	orr	r11, r10, r9, lsl r5		; factor in the way number and cache number into r11
+	orr	r11, r11, r7, lsl r2		; factor in the index number
+	mcr	p15, 0, r11, c7, c6, 2		; invalidate by set/way
+	subs	r9, r9, #1			; decrement the way number
+	bge	loop3
+	subs	r7, r7, #1			; decrement the index
+	bge	loop2
+skip
+	add	r10, r10, #2			; increment the cache number
+	cmp	r3, r10
+	bgt	loop1
+
+finished
+	mov	r10, #0				; swith back to cache level 0
+	mcr	p15, 2, r10, c0, c0, 0		; select current cache level in cssr
+	isb
+
+	bx lr
+
+	END
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/boot.S.rej b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/boot.S.rej
new file mode 100644
index 0000000..5149d14
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/boot.S.rej
@@ -0,0 +1,16 @@
+diff a/components/ucos_standalone/src/cortexa9/armcc/boot.S b/components/ucos_standalone/src/cortexa9/armcc/boot.S	(rejected hunks)
+@@ -62,13 +62,13 @@
+ 
+ 
+ 
+ #include "xparameters.h"
+ #include "xil_errata.h"
+ 
+-#define UART_BAUDRATE	115200
++#define UART_BAUDRATE	11.300
+ 
+ 	EXPORT _prestart
+ 	EXPORT _boot
+ 
+ 	IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
+ 	IMPORT |Image$$IRQ_STACK$$ZI$$Limit|
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/translation_table.s b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/translation_table.s
new file mode 100644
index 0000000..4cc9a26
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/translation_table.s
@@ -0,0 +1,195 @@
+;******************************************************************************
+;
+; Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+;
+; Permission is hereby granted, free of charge, to any person obtaining a copy
+; of this software and associated documentation files (the "Software"), to deal
+; in the Software without restriction, including without limitation the rights
+; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+; copies of the Software, and to permit persons to whom the Software is
+; furnished to do so, subject to the following conditions:
+;
+; The above copyright notice and this permission notice shall be included in
+; all copies or substantial portions of the Software.
+;
+; Use of the Software is limited solely to applications:
+; (a) running on a Xilinx device, or
+; (b) that interact with a Xilinx device through a bus or interconnect.
+;
+; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+; XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+; WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+; OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+; SOFTWARE.
+;
+; Except as contained in this notice, the name of the Xilinx shall not be used
+; in advertising or otherwise to promote the sale, use or other dealings in
+; this Software without prior written authorization from Xilinx.
+;
+;*****************************************************************************
+;****************************************************************************
+;**
+; @file translation_table.s
+;
+; This file contains the initialization for the MMU table in RAM
+; needed by the Cortex A9 processor
+;
+; 
+; MODIFICATION HISTORY:
+;
+; Ver   Who  Date     Changes
+; ----- ---- -------- ---------------------------------------------------
+; 1.00a ecm  10/20/09 Initial version
+; 3.07a sgd  07/05/2012 Configuring device address spaces as shareable device
+;		       instead of strongly-ordered.
+; 4.2	pkp  09/02/14 modified translation table entries according to address map
+; 4.2	pkp  09/11/14 modified translation table entries to resolve compilation
+;		      error for solving CR#822897
+; 

+;
+; @note
+;
+; None.
+;
+;****************************************************************************
+	EXPORT  MMUTable
+
+	AREA |.mmu_tbl|,CODE,ALIGN=14
+
+MMUTable
+	; Each table entry occupies one 32-bit word and there are
+	; 4096 entries, so the entire table takes up 16KB.
+	; Each entry covers a 1MB section.
+
+
+   GBLA count
+   GBLA sect
+
+; 0x00000000 - 0x3ffffff (DDR Cacheable)
+count   SETA  0
+sect    SETA  0
+   WHILE count<0x400
+   DCD	sect + 0x15de6		; S=1, TEX=b101 AP=b11, Domain=b1111, C=b0, B=b1
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0x40000000 - 0x7fffffff (GpAxi0)
+count   SETA  0
+   WHILE count<0x400
+   DCD	sect + 0xc02		; S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0x80000000 - 0xbfffffff (GpAxi1)
+count   SETA  0
+   WHILE count<0x400
+   DCD	sect + 0xc02		; S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1w
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xc0000000 - 0xdfffffff (undef)
+count   SETA  0
+   WHILE count<0x200
+   DCD	sect 			; S=0, TEX=b000 AP=b00, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xe0000000 - 0xe02fffff (IOP dev)
+count   SETA  0
+   WHILE count<0x3
+   DCD	sect + 0xc06		; S=0, TEX=b010 AP=b11, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xe0300000 - 0xe0ffffff (undef/reserved)
+count   SETA  0
+   WHILE count<0xD
+   DCD	sect 			; S=0, TEX=b000 AP=b00, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xe1000000 - 0xe1ffffff (NAND)
+count   SETA  0
+   WHILE count<0x10
+   DCD	sect + 0xc06		; S=0, TEX=b010 AP=b11, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xe2000000 - 0xe3ffffff (NOR)
+count   SETA  0
+   WHILE count<0x20
+   DCD	sect + 0xc06		; S=0, TEX=b010 AP=b11, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+ ; 0xe4000000 - 0xe5ffffff  (SRAM)
+count   SETA  0
+    WHILE count<0x20
+    DCD	sect + 0xc0e		; S=b0 TEX=b000 AP=b11, Domain=b0, C=b1, B=b1
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xe6000000 - 0xf7ffffff  (reserved)
+count   SETA  0
+   WHILE count<0x120
+   DCD	sect 			; S=0, TEX=b000 AP=b00, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xf8000c00 to 0xf8000fff, 0xf8010000 to 0xf88fffff and
+; 0xf8f03000 to 0xf8ffffff are reserved  but due to granual size of
+; 1MB, it is not possible to define separate regions for them
+
+; 0xf8000000 - 0xf8ffffff (APB device regs)
+count   SETA  0
+   WHILE count<0x10
+   DCD	sect + 0xc06		; S=0, TEX=b010 AP=b11, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xf9000000 - 0xfbffffff (reserved)
+count   SETA  0
+   WHILE count<0x30
+   DCD	sect 			; S=0, TEX=b000 AP=b00, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xfc000000 - 0xfdffffff   (QSPI)
+count   SETA  0
+    WHILE count<0x20
+    DCD	sect + 0xc0a		; S=b0 TEX=b000 AP=b11, Domain=b0, C=b1, B=b1
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xfe000000 - 0xffefffff (reserved)
+count   SETA  0
+   WHILE count<0x1F
+   DCD	sect 			; S=0, TEX=b000 AP=b00, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   WEND
+
+; 0xfff00000 to 0xfffb0000 is reserved but due to granual size of
+; 1MB, it is not possible to define separate region for  it
+
+; 0xfff00000 to 0xfffb0000 (OCM)
+count   SETA  0
+   DCD	sect + 0x4c0e		; S=b0 TEX=b100 AP=b11, Domain=b0, C=b1, B=b1
+sect    SETA  sect+0x100000
+
+   END
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/xpseudo_asm_rvct.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/xpseudo_asm_rvct.c
new file mode 100644
index 0000000..58096c4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/xpseudo_asm_rvct.c
@@ -0,0 +1,147 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_rvct.c
+*
+* This header file contains functions for using assembler code. It is
+* written specifically for RVCT.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sdm  11/18/09 First Release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xpseudo_asm_rvct.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+/* embedded assembler instructions */
+__asm void cpsiei(void)
+{
+	cpsie	i
+	bx	lr
+}
+__asm void cpsidi(void)
+{
+	cpsid	i
+	bx	lr
+}
+
+__asm void cpsief(void)
+{
+	cpsie	f
+	bx	lr
+}
+
+__asm void cpsidf(void)
+{
+	cpsid	f
+	bx	lr
+}
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+__asm void isb(void)
+{
+	isb
+	bx lr
+}
+
+/* Data Synchronization Barrier */
+__asm void dsb(void)
+{
+	dsb
+	bx lr
+}
+
+/* Data Memory Barrier */
+__asm void dmb(void)
+{
+	dmb
+	bx lr
+}
+
+/* Memory Operations */
+__asm u32 ldr(u32 adr)
+{
+	ldr	r0, [r0]
+	bx	lr
+}
+
+__asm u32 ldrb(u32 adr)
+{
+	ldrb	r0, [r0]
+	bx	lr
+}
+
+__asm void str(u32 adr, u32 val)
+{
+	str	r1, [r0]
+	bx	lr
+}
+
+__asm void strb(u32 adr, u32 val)
+{
+	strb	r1, [r0]
+	bx	lr
+}
+
+/* Count leading zeroes (clz) */
+__asm u32 clz(u32 arg)
+{
+	clz	r0, r0
+	bx	lr
+}
+
+__asm u32 mfcpsr(void)
+{
+	mrs	r0, cpsr
+	bx lr
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/xpseudo_asm_rvct.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/xpseudo_asm_rvct.h
new file mode 100644
index 0000000..a3ae48d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/armcc/xpseudo_asm_rvct.h
@@ -0,0 +1,130 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_rvct.h
+*
+* This header file contains macros for using __inline assembler code. It is
+* written specifically for RVCT.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sdm  11/18/09 First Release
+* 

+*
+******************************************************************************/
+
+#ifndef XPSEUDO_ASM_RVCT_H  /* prevent circular inclusions */
+#define XPSEUDO_ASM_RVCT_H  /* by using protection macros */
+
+/***************************** Include Files ********************************/
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/* necessary for pre-processor */
+#define stringify(s)	tostring(s)
+#define tostring(s)	#s
+
+
+#define mtcpsr(v)	{ volatile register u32 Reg __asm("cpsr");\
+			  Reg = v; }
+
+/* general purpose register read/write */
+/*#define mfgpr(rn) 	({ unsigned int val; \
+			  register unsigned int Reg __asm("r" stringify(rn));\
+			  val = Reg; \
+			  val;})*/
+
+#define mtgpr(rn, v)	{ volatile register u32 Reg __asm("r" stringify(rn));\
+			  Reg = v; }
+
+/* CP15 operations */
+/*#define mfcp(rn)	({ unsigned int val; \
+			  val = register unsigned int Reg __asm(rn); \
+			  val;})*/
+
+#define mtcp(rn, v)	{ volatile register u32 Reg __asm(rn); \
+			  Reg = v; }
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+__asm void cpsiei(void);
+
+__asm void cpsidi(void);
+
+__asm void cpsief(void);
+
+__asm void cpsidf(void);
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+__asm void isb(void);
+
+/* Data Synchronization Barrier */
+__asm void dsb(void);
+
+/* Data Memory Barrier */
+__asm void dmb(void);
+
+/* Memory Operations */
+__asm u32 ldr(u32 adr);
+
+__asm u32 ldrb(u32 adr);
+
+__asm void str(u32 adr, u32 val);
+
+__asm void strb(u32 adr, u32 val);
+
+/* Count leading zeroes (clz) */
+__asm u32 clz(u32 arg);
+__asm u32 mfcpsr(void);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XPSEUDO_ASM_RVCT_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_exit.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_exit.c
new file mode 100644
index 0000000..f1381e4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_exit.c
@@ -0,0 +1,44 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/* _exit - Simple implementation. Does not return.
+*/
+__attribute__((weak)) void _exit (sint32 status)
+{
+  (void)status;
+  while (1) {
+	;
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_open.c
new file mode 100644
index 0000000..b02d080
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_open.c
@@ -0,0 +1,53 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode);
+}
+#endif
+
+/*
+ * _open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode)
+{
+  (void *)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_sbrk.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_sbrk.c
new file mode 100644
index 0000000..cbfc75d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_sbrk.c
@@ -0,0 +1,70 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) caddr_t _sbrk ( s32 incr );
+}
+#endif
+
+__attribute__((weak)) caddr_t _sbrk ( s32 incr )
+{
+  static u8 *heap = NULL;
+  u8 *prev_heap;
+  static u8 *HeapEndPtr = (u8 *)&_heap_end;
+  caddr_t Status;
+
+  if (heap == NULL) {
+    heap = (u8 *)&_heap_start;
+  }
+  prev_heap = heap;
+
+  heap += incr;
+
+  if (heap > HeapEndPtr){
+	  Status = (caddr_t) -1;
+  }
+  else if (prev_heap != NULL) {
+	  Status = (caddr_t) ((void *)prev_heap);
+  }
+  else {
+	  Status = (caddr_t) -1;
+  }
+
+  return Status;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/abort.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/abort.c
new file mode 100644
index 0000000..4560452
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/abort.c
@@ -0,0 +1,42 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+
+/*
+ * abort -- go out via exit...
+ */
+__attribute__((weak)) void abort(void)
+{
+  _exit(1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/asm_vectors.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/asm_vectors.S
new file mode 100644
index 0000000..7136824
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/asm_vectors.S
@@ -0,0 +1,197 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file asm_vectors.s
+*
+* This file contains the initial vector table for the Cortex A9 processor
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 1.00a ecm/sdm 10/20/09 Initial version
+* 3.05a sdm	02/02/12 Save lr when profiling is enabled
+* 3.10a srt     04/18/13 Implemented ARM Erratas. Please refer to file
+*			 'xil_errata.h' for errata description
+* 4.00a pkp	22/01/14 Modified return addresses for interrupt
+*			 handlers (DataAbortHandler and SVCHandler)
+*			 to fix CR#767251
+* 5.1	pkp	05/13/15 Saved the addresses of instruction causing data
+*			 abort and prefetch abort into DataAbortAddr and
+*			 PrefetchAbortAddr for further use to fix CR#854523
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+#include "xil_errata.h"
+
+#define __ARM_NEON__ 1
+
+.org 0
+.text
+
+.globl _vector_table
+
+.section .vectors
+_vector_table:
+	B	_boot
+	B	Undefined
+	B	SVCHandler
+	B	PrefetchAbortHandler
+	B	DataAbortHandler
+	NOP	/* Placeholder for address exception vector*/
+	B	IRQHandler
+	B	FIQHandler
+
+
+IRQHandler:					/* IRQ vector handler */
+
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code*/
+#ifdef __ARM_NEON__
+	vpush {d0-d7}
+	vpush {d16-d31}
+	vmrs r1, FPSCR
+	push {r1}
+	vmrs r1, FPEXC
+	push {r1}
+#endif
+
+#ifdef PROFILING
+	ldr	r2, =prof_pc
+	subs	r3, lr, #0
+	str	r3, [r2]
+#endif
+
+	bl	IRQInterrupt			/* IRQ vector */
+
+#ifdef __ARM_NEON__
+	pop 	{r1}
+	vmsr    FPEXC, r1
+	pop 	{r1}
+	vmsr    FPSCR, r1
+	vpop    {d16-d31}
+	vpop    {d0-d7}
+#endif
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+
+
+	subs	pc, lr, #4			/* adjust return */
+
+
+FIQHandler:					/* FIQ vector handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+#ifdef __ARM_NEON__
+	vpush {d0-d7}
+	vpush {d16-d31}
+	vmrs r1, FPSCR
+	push {r1}
+	vmrs r1, FPEXC
+	push {r1}
+#endif
+
+FIQLoop:
+	bl	FIQInterrupt			/* FIQ vector */
+
+#ifdef __ARM_NEON__
+	pop 	{r1}
+	vmsr    FPEXC, r1
+	pop 	{r1}
+	vmsr    FPSCR, r1
+	vpop    {d16-d31}
+	vpop    {d0-d7}
+#endif
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	subs	pc, lr, #4			/* adjust return */
+
+
+Undefined:					/* Undefined handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+
+	b	_prestart
+
+	movs	pc, lr
+
+
+SVCHandler:					/* SWI handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+
+	tst	r0, #0x20			/* check the T bit */
+	ldrneh	r0, [lr,#-2]			/* Thumb mode */
+	bicne	r0, r0, #0xff00			/* Thumb mode */
+	ldreq	r0, [lr,#-4]			/* ARM mode */
+	biceq	r0, r0, #0xff000000		/* ARM mode */
+
+	bl	SWInterrupt			/* SWInterrupt: call C function here */
+
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+
+	movs	pc, lr		/*return to the next instruction after the SWI instruction */
+
+
+DataAbortHandler:				/* Data Abort handler */
+#ifdef CONFIG_ARM_ERRATA_775420
+	dsb
+#endif
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	ldr     r0, =DataAbortAddr
+	sub     r1, lr, #8
+	str     r1, [r0]            		/* Stores instruction causing data abort */
+
+	bl	DataAbortInterrupt		/*DataAbortInterrupt :call C function here */
+
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+
+	subs	pc, lr, #8			/* points to the instruction that caused the Data Abort exception */
+
+PrefetchAbortHandler:				/* Prefetch Abort handler */
+#ifdef CONFIG_ARM_ERRATA_775420
+	dsb
+#endif
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	ldr     r0, =PrefetchAbortAddr
+	sub     r1, lr, #4
+	str     r1, [r0]            		/* Stores instruction causing prefetch abort */
+
+	bl	PrefetchAbortInterrupt		/* PrefetchAbortInterrupt: call C function here */
+
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+
+	subs	pc, lr, #4			/* points to the instruction that caused the Prefetch Abort exception */
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/boot.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/boot.S
new file mode 100644
index 0000000..0e132ce
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/boot.S
@@ -0,0 +1,443 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file boot.S
+*
+* This file contains the initial startup code for the Cortex A9 processor
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 1.00a ecm/sdm 10/20/09 Initial version
+* 3.06a sgd     05/15/12 Updated L2CC Auxiliary and Tag RAM Latency control
+*			 register settings.
+* 3.06a asa 	06/17/12 Modified the TTBR settings and L2 Cache auxiliary
+*		         register settings.
+* 3.07a asa     07/16/12 Modified the L2 Cache controller settings to improve
+*			 performance. Changed the property of the ".boot"
+*			 section.
+* 3.07a sgd     08/21/12 Modified the L2 Cache controller and cp15 Aux Control
+*               Register settings
+* 3.09a sgd     02/06/13 Updated SLCR l2c Ram Control register to a
+*               value of 0x00020202. Fix for CR 697094 (SI#687034).
+* 3.10a srt     04/18/13 Implemented ARM Erratas. Please refer to file
+*			 'xil_errata.h' for errata description
+* 4.2   pkp	06/19/14 Enabled asynchronous abort exception
+* 5.0	pkp	16/15/14 Modified initialization code to enable scu after
+*			 MMU is enabled
+* 5.1   pkp	05/13/15 Changed the initialization order so to first invalidate
+*			 caches and TLB, enable MMU and caches, then enable SMP
+*			 bit in ACTLR. L2Cache invalidation and enabling of L2Cache
+*			 is done later.
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#include "xparameters.h"
+#include "xil_errata.h"
+
+.globl MMUTable
+.global _prestart
+.global _boot
+.global __stack
+.global __irq_stack
+.global __supervisor_stack
+.global __abort_stack
+.global __fiq_stack
+.global __undef_stack
+.global _vector_table
+
+.set PSS_L2CC_BASE_ADDR, 0xF8F02000
+.set PSS_SLCR_BASE_ADDR, 0xF8000000
+
+.set RESERVED,		0x0fffff00
+.set TblBase ,		MMUTable
+.set LRemap,		0xFE00000F		/* set the base address of the peripheral block as not shared */
+.set L2CCWay,		(PSS_L2CC_BASE_ADDR + 0x077C)	/*(PSS_L2CC_BASE_ADDR + PSS_L2CC_CACHE_INVLD_WAY_OFFSET)*/
+.set L2CCSync,		(PSS_L2CC_BASE_ADDR + 0x0730)	/*(PSS_L2CC_BASE_ADDR + PSS_L2CC_CACHE_SYNC_OFFSET)*/
+.set L2CCCrtl,		(PSS_L2CC_BASE_ADDR + 0x0100)	/*(PSS_L2CC_BASE_ADDR + PSS_L2CC_CNTRL_OFFSET)*/
+.set L2CCAuxCrtl,	(PSS_L2CC_BASE_ADDR + 0x0104)	/*(PSS_L2CC_BASE_ADDR + XPSS_L2CC_AUX_CNTRL_OFFSET)*/
+.set L2CCTAGLatReg,	(PSS_L2CC_BASE_ADDR + 0x0108)	/*(PSS_L2CC_BASE_ADDR + XPSS_L2CC_TAG_RAM_CNTRL_OFFSET)*/
+.set L2CCDataLatReg,	(PSS_L2CC_BASE_ADDR + 0x010C)	/*(PSS_L2CC_BASE_ADDR + XPSS_L2CC_DATA_RAM_CNTRL_OFFSET)*/
+.set L2CCIntClear,	(PSS_L2CC_BASE_ADDR + 0x0220)	/*(PSS_L2CC_BASE_ADDR + XPSS_L2CC_IAR_OFFSET)*/
+.set L2CCIntRaw,	(PSS_L2CC_BASE_ADDR + 0x021C)	/*(PSS_L2CC_BASE_ADDR + XPSS_L2CC_ISR_OFFSET)*/
+
+.set SLCRlockReg,	    (PSS_SLCR_BASE_ADDR + 0x04)	/*(PSS_SLCR_BASE_ADDR + XPSS_SLCR_LOCK_OFFSET)*/
+.set SLCRUnlockReg,     (PSS_SLCR_BASE_ADDR + 0x08)	/*(PSS_SLCR_BASE_ADDR + XPSS_SLCR_UNLOCK_OFFSET)*/
+.set SLCRL2cRamReg,     (PSS_SLCR_BASE_ADDR + 0xA1C) /*(PSS_SLCR_BASE_ADDR + XPSS_SLCR_L2C_RAM_OFFSET)*/
+
+/* workaround for simulation not working when L1 D and I caches,MMU and  L2 cache enabled - DT568997 */
+.if SIM_MODE == 1
+.set CRValMmuCac,	0b00000000000000	/* Disable IDC, and MMU */
+.else
+.set CRValMmuCac,	0b01000000000101	/* Enable IDC, and MMU */
+.endif
+
+.set CRValHiVectorAddr,	0b10000000000000	/* Set the Vector address to high, 0xFFFF0000 */
+
+.set L2CCAuxControl,	0x72360000		/* Enable all prefetching, Cache replacement policy, Parity enable,
+                                        Event monitor bus enable and Way Size (64 KB) */
+.set L2CCControl,	0x01			/* Enable L2CC */
+.set L2CCTAGLatency,	0x0111			/* latency for TAG RAM */
+.set L2CCDataLatency,	0x0121			/* latency for DATA RAM */
+
+.set SLCRlockKey,	        0x767B			/* SLCR lock key */
+.set SLCRUnlockKey,	        0xDF0D			/* SLCR unlock key */
+.set SLCRL2cRamConfig,      0x00020202      /* SLCR L2C ram configuration */
+
+/* Stack Pointer locations for boot code */
+.set Undef_stack,	__undef_stack
+.set FIQ_stack,		__fiq_stack
+.set Abort_stack,	__abort_stack
+.set SPV_stack,		__supervisor_stack
+.set IRQ_stack,		__irq_stack
+.set SYS_stack,		__stack
+
+.set vector_base,	_vector_table
+
+.set FPEXC_EN,		0x40000000		/* FPU enable bit, (1 << 30) */
+
+.section .boot,"ax"
+
+
+/* this initializes the various processor modes */
+
+_prestart:
+_boot:
+
+#if XPAR_CPU_ID==0
+/* only allow cpu0 through */
+	mrc	p15,0,r1,c0,c0,5
+	and	r1, r1, #0xf
+	cmp	r1, #0
+	beq	OKToRun
+EndlessLoop0:
+	wfe
+	b	EndlessLoop0
+
+#elif XPAR_CPU_ID==1
+/* only allow cpu1 through */
+	mrc	p15,0,r1,c0,c0,5
+	and	r1, r1, #0xf
+	cmp	r1, #1
+	beq	OKToRun
+EndlessLoop1:
+	wfe
+	b	EndlessLoop1
+#endif
+
+OKToRun:
+	mrc     p15, 0, r0, c0, c0, 0		/* Get the revision */
+	and     r5, r0, #0x00f00000
+	and     r6, r0, #0x0000000f
+	orr     r6, r6, r5, lsr #20-4
+
+#ifdef CONFIG_ARM_ERRATA_742230
+        cmp     r6, #0x22                       /* only present up to r2p2 */
+        mrcle   p15, 0, r10, c15, c0, 1         /* read diagnostic register */
+        orrle   r10, r10, #1 << 4               /* set bit #4 */
+        mcrle   p15, 0, r10, c15, c0, 1         /* write diagnostic register */
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_743622
+	teq     r5, #0x00200000                 /* only present in r2p* */
+	mrceq   p15, 0, r10, c15, c0, 1         /* read diagnostic register */
+	orreq   r10, r10, #1 << 6               /* set bit #6 */
+	mcreq   p15, 0, r10, c15, c0, 1         /* write diagnostic register */
+#endif
+
+	/* set VBAR to the _vector_table address in linker script */
+	ldr	r0, =vector_base
+	mcr	p15, 0, r0, c12, c0, 0
+
+	/*invalidate scu*/
+	ldr	r7, =0xf8f0000c
+	ldr	r6, =0xffff
+	str	r6, [r7]
+
+	/* Invalidate caches and TLBs */
+	mov	r0,#0				/* r0 = 0  */
+	mcr	p15, 0, r0, c8, c7, 0		/* invalidate TLBs */
+	mcr	p15, 0, r0, c7, c5, 0		/* invalidate icache */
+	mcr	p15, 0, r0, c7, c5, 6		/* Invalidate branch predictor array */
+	bl	invalidate_dcache		/* invalidate dcache */
+
+	/* Disable MMU, if enabled */
+	mrc	p15, 0, r0, c1, c0, 0		/* read CP15 register 1 */
+	bic	r0, r0, #0x1			/* clear bit 0 */
+	mcr	p15, 0, r0, c1, c0, 0		/* write value back */
+
+#ifdef SHAREABLE_DDR
+	/* Mark the entire DDR memory as shareable */
+	ldr	r3, =0x3ff			/* 1024 entries to cover 1G DDR */
+	ldr	r0, =TblBase			/* MMU Table address in memory */
+	ldr	r2, =0x15de6			/* S=b1 TEX=b101 AP=b11, Domain=b1111, C=b0, B=b1 */
+shareable_loop:
+	str	r2, [r0]			/* write the entry to MMU table */
+	add	r0, r0, #0x4			/* next entry in the table */
+	add	r2, r2, #0x100000		/* next section */
+	subs	r3, r3, #1
+	bge	shareable_loop			/* loop till 1G is covered */
+#endif
+
+	/* In case of AMP, map virtual address 0x20000000 to 0x00000000  and mark it as non-cacheable */
+#if USE_AMP==1
+	ldr	r3, =0x1ff			/* 512 entries to cover 512MB DDR */
+	ldr	r0, =TblBase			/* MMU Table address in memory */
+	add	r0, r0, #0x800			/* Address of entry in MMU table, for 0x20000000 */
+	ldr	r2, =0x0c02			/* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b0 */
+mmu_loop:
+	str	r2, [r0]			/* write the entry to MMU table */
+	add	r0, r0, #0x4			/* next entry in the table */
+	add	r2, r2, #0x100000		/* next section */
+	subs	r3, r3, #1
+	bge	mmu_loop			/* loop till 512MB is covered */
+#endif
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the irq stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x12			/* IRQ mode */
+	msr	cpsr, r2
+	ldr	r13,=IRQ_stack			/* IRQ stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the supervisor stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x13			/* supervisor mode */
+	msr	cpsr, r2
+	ldr	r13,=SPV_stack			/* Supervisor stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the Abort  stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x17			/* Abort mode */
+	msr	cpsr, r2
+	ldr	r13,=Abort_stack		/* Abort stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the FIQ stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x11			/* FIQ mode */
+	msr	cpsr, r2
+	ldr	r13,=FIQ_stack			/* FIQ stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the Undefine stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x1b			/* Undefine mode */
+	msr	cpsr, r2
+	ldr	r13,=Undef_stack		/* Undefine stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the system stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x1F			/* SYS mode */
+	msr	cpsr, r2
+	ldr	r13,=SYS_stack			/* SYS stack pointer */
+
+	/*set scu enable bit in scu*/
+	ldr	r7, =0xf8f00000
+	ldr	r0, [r7]
+	orr	r0, r0, #0x1
+	str	r0, [r7]
+
+	/* enable MMU and cache */
+
+	ldr	r0,=TblBase			/* Load MMU translation table base */
+	orr	r0, r0, #0x5B			/* Outer-cacheable, WB */
+	mcr	15, 0, r0, c2, c0, 0		/* TTB0 */
+
+	mvn	r0,#0				/* Load MMU domains -- all ones=manager */
+	mcr	p15,0,r0,c3,c0,0
+
+	/* Enable mmu, icahce and dcache */
+	ldr	r0,=CRValMmuCac
+	mcr	p15,0,r0,c1,c0,0		/* Enable cache and MMU */
+	dsb					/* dsb	allow the MMU to start up */
+	isb					/* isb	flush prefetch buffer */
+
+	/* Write to ACTLR */
+	mrc	p15, 0, r0, c1, c0, 1		/* Read ACTLR*/
+	orr	r0, r0, #(0x01 << 6)		/* set SMP bit */
+	orr	r0, r0, #(0x01 )		/* */
+	mcr	p15, 0, r0, c1, c0, 1		/* Write ACTLR*/
+
+/* Invalidate L2 Cache and enable L2 Cache*/
+/* For AMP, assume running on CPU1. Don't initialize L2 Cache (up to Linux) */
+#if USE_AMP!=1
+	ldr	r0,=L2CCCrtl			/* Load L2CC base address base + control register */
+	mov	r1, #0				/* force the disable bit */
+	str	r1, [r0]			/* disable the L2 Caches */
+
+	ldr	r0,=L2CCAuxCrtl			/* Load L2CC base address base + Aux control register */
+	ldr	r1,[r0]				/* read the register */
+	ldr	r2,=L2CCAuxControl		/* set the default bits */
+	orr	r1,r1,r2
+	str	r1, [r0]			/* store the Aux Control Register */
+
+	ldr	r0,=L2CCTAGLatReg		/* Load L2CC base address base + TAG Latency address */
+	ldr	r1,=L2CCTAGLatency		/* set the latencies for the TAG*/
+	str	r1, [r0]			/* store the TAG Latency register Register */
+
+	ldr	r0,=L2CCDataLatReg		/* Load L2CC base address base + Data Latency address */
+	ldr	r1,=L2CCDataLatency		/* set the latencies for the Data*/
+	str	r1, [r0]			/* store the Data Latency register Register */
+
+	ldr	r0,=L2CCWay			/* Load L2CC base address base + way register*/
+	ldr	r2, =0xFFFF
+	str	r2, [r0]			/* force invalidate */
+
+	ldr	r0,=L2CCSync			/* need to poll 0x730, PSS_L2CC_CACHE_SYNC_OFFSET */
+						/* Load L2CC base address base + sync register*/
+	/* poll for completion */
+Sync:	ldr	r1, [r0]
+	cmp	r1, #0
+	bne	Sync
+
+	ldr	r0,=L2CCIntRaw			/* clear pending interrupts */
+	ldr	r1,[r0]
+	ldr	r0,=L2CCIntClear
+	str	r1,[r0]
+
+	ldr	r0,=SLCRUnlockReg		/* Load SLCR base address base + unlock register */
+	ldr	r1,=SLCRUnlockKey	    	/* set unlock key */
+	str	r1, [r0]		    	/* Unlock SLCR */
+
+	ldr	r0,=SLCRL2cRamReg		/* Load SLCR base address base + l2c Ram Control register */
+	ldr	r1,=SLCRL2cRamConfig        	/* set the configuration value */
+	str	r1, [r0]	        	/* store the L2c Ram Control Register */
+
+	ldr	r0,=SLCRlockReg         	/* Load SLCR base address base + lock register */
+	ldr	r1,=SLCRlockKey	        	/* set lock key */
+	str	r1, [r0]	        	/* lock SLCR */
+
+	ldr	r0,=L2CCCrtl			/* Load L2CC base address base + control register */
+	ldr	r1,[r0]				/* read the register */
+	mov	r2, #L2CCControl		/* set the enable bit */
+	orr	r1,r1,r2
+	str	r1, [r0]			/* enable the L2 Caches */
+#endif
+
+	mov	r0, r0
+	mrc	p15, 0, r1, c1, c0, 2		/* read cp access control register (CACR) into r1 */
+	orr	r1, r1, #(0xf << 20)		/* enable full access for p10 & p11 */
+	mcr	p15, 0, r1, c1, c0, 2		/* write back into CACR */
+
+	/* enable vfp */
+	fmrx	r1, FPEXC			/* read the exception register */
+	orr	r1,r1, #FPEXC_EN		/* set VFP enable bit, leave the others in orig state */
+	fmxr	FPEXC, r1			/* write back the exception register */
+
+	mrc	p15,0,r0,c1,c0,0		/* flow prediction enable */
+	orr	r0, r0, #(0x01 << 11)		/* #0x8000 */
+	mcr	p15,0,r0,c1,c0,0
+
+	mrc	p15,0,r0,c1,c0,1		/* read Auxiliary Control Register */
+	orr	r0, r0, #(0x1 << 2)		/* enable Dside prefetch */
+	orr	r0, r0, #(0x1 << 1)		/* enable L2 Prefetch hint */
+	mcr	p15,0,r0,c1,c0,1		/* write Auxiliary Control Register */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	bic	r0, r0, #0x100			/* enable asynchronous abort exception */
+	msr	cpsr_xsf, r0
+
+
+	b	_start				/* jump to C startup code */
+	and	r0, r0, r0			/* no op */
+
+.Ldone:	b	.Ldone				/* Paranoia: we should never get here */
+
+
+/*
+ *************************************************************************
+ *
+ * invalidate_dcache - invalidate the entire d-cache by set/way
+ *
+ * Note: for Cortex-A9, there is no cp instruction for invalidating
+ * the whole D-cache. Need to invalidate each line.
+ *
+ *************************************************************************
+ */
+invalidate_dcache:
+	mrc	p15, 1, r0, c0, c0, 1		/* read CLIDR */
+	ands	r3, r0, #0x7000000
+	mov	r3, r3, lsr #23			/* cache level value (naturally aligned) */
+	beq	finished
+	mov	r10, #0				/* start with level 0 */
+loop1:
+	add	r2, r10, r10, lsr #1		/* work out 3xcachelevel */
+	mov	r1, r0, lsr r2			/* bottom 3 bits are the Cache type for this level */
+	and	r1, r1, #7			/* get those 3 bits alone */
+	cmp	r1, #2
+	blt	skip				/* no cache or only instruction cache at this level */
+	mcr	p15, 2, r10, c0, c0, 0		/* write the Cache Size selection register */
+	isb					/* isb to sync the change to the CacheSizeID reg */
+	mrc	p15, 1, r1, c0, c0, 0		/* reads current Cache Size ID register */
+	and	r2, r1, #7			/* extract the line length field */
+	add	r2, r2, #4			/* add 4 for the line length offset (log2 16 bytes) */
+	ldr	r4, =0x3ff
+	ands	r4, r4, r1, lsr #3		/* r4 is the max number on the way size (right aligned) */
+	clz	r5, r4				/* r5 is the bit position of the way size increment */
+	ldr	r7, =0x7fff
+	ands	r7, r7, r1, lsr #13		/* r7 is the max number of the index size (right aligned) */
+loop2:
+	mov	r9, r4				/* r9 working copy of the max way size (right aligned) */
+loop3:
+	orr	r11, r10, r9, lsl r5		/* factor in the way number and cache number into r11 */
+	orr	r11, r11, r7, lsl r2		/* factor in the index number */
+	mcr	p15, 0, r11, c7, c6, 2		/* invalidate by set/way */
+	subs	r9, r9, #1			/* decrement the way number */
+	bge	loop3
+	subs	r7, r7, #1			/* decrement the index */
+	bge	loop2
+skip:
+	add	r10, r10, #2			/* increment the cache number */
+	cmp	r3, r10
+	bgt	loop1
+
+finished:
+	mov	r10, #0				/* swith back to cache level 0 */
+	mcr	p15, 2, r10, c0, c0, 0		/* select current cache level in cssr */
+	dsb
+	isb
+
+	bx	lr
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/close.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/close.c
new file mode 100644
index 0000000..549470f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/close.c
@@ -0,0 +1,47 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _close(s32 fd);
+}
+#endif
+
+/*
+ * close -- We don't need to do anything, but pretend we did.
+ */
+
+__attribute__((weak)) s32 _close(s32 fd)
+{
+  (void)fd;
+  return (0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/cpu_init.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/cpu_init.S
new file mode 100644
index 0000000..7a6c8eb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/cpu_init.S
@@ -0,0 +1,80 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file cpu_init.s
+*
+* This file contains CPU specific initialization. Invoked from main CRT
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 1.00a ecm/sdm 10/20/09 Initial version
+* 3.04a sdm	01/02/12 Updated to clear cp15 regs with unknown reset values
+* 5.0   pkp	12/16/14 removed incorrect initialization of TLB lockdown
+*			 register to fix CR#830580
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+	.text
+	.global __cpu_init
+	.align 2
+__cpu_init:
+
+/* Clear cp15 regs with unknown reset values */
+	mov	r0, #0x0
+	mcr	p15, 0, r0, c5, c0, 0	/* DFSR */
+	mcr	p15, 0, r0, c5, c0, 1	/* IFSR */
+	mcr	p15, 0, r0, c6, c0, 0	/* DFAR */
+	mcr	p15, 0, r0, c6, c0, 2	/* IFAR */
+	mcr	p15, 0, r0, c9, c13, 2	/* PMXEVCNTR */
+	mcr	p15, 0, r0, c13, c0, 2	/* TPIDRURW */
+	mcr	p15, 0, r0, c13, c0, 3	/* TPIDRURO */
+
+/* Reset and start Cycle Counter */
+	mov	r2, #0x80000000		/* clear overflow */
+	mcr	p15, 0, r2, c9, c12, 3
+	mov	r2, #0xd		/* D, C, E */
+	mcr	p15, 0, r2, c9, c12, 0
+	mov	r2, #0x80000000		/* enable cycle counter */
+	mcr	p15, 0, r2, c9, c12, 1
+
+	bx	lr
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/errno.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/errno.c
new file mode 100644
index 0000000..e73e282
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/errno.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* The errno variable is stored in the reentrancy structure.  This
+   function returns its address for use by the macro errno defined in
+   errno.h.  */
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 * __errno (void);
+}
+#endif
+
+__attribute__((weak)) sint32 *
+__errno (void)
+{
+  return &_REENT->_errno;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/fcntl.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/fcntl.c
new file mode 100644
index 0000000..65fe402
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/fcntl.c
@@ -0,0 +1,46 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/*
+ * fcntl -- Manipulate a file descriptor.
+ *          We don't have a filesystem, so we do nothing.
+ */
+__attribute__((weak)) sint32 fcntl (sint32 fd, sint32 cmd, long arg)
+{
+  (void)fd;
+  (void)cmd;
+  (void)arg;
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/fstat.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/fstat.c
new file mode 100644
index 0000000..2fce632
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/fstat.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf);
+}
+#endif
+/*
+ * fstat -- Since we have no file system, we just return an error.
+ */
+__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf)
+{
+  (void)fd;
+  buf->st_mode = S_IFCHR; /* Always pretend to be a tty */
+
+  return (0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/getpid.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/getpid.c
new file mode 100644
index 0000000..8afd28f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/getpid.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "xil_types.h"
+/*
+ * getpid -- only one process, so just return 1.
+ */
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _getpid(void);
+}
+#endif
+
+__attribute__((weak)) s32 getpid(void)
+{
+  return 1;
+}
+
+__attribute__((weak)) s32 _getpid(void)
+{
+  return 1;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/isatty.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/isatty.c
new file mode 100644
index 0000000..2035773
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/isatty.c
@@ -0,0 +1,56 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 _isatty(sint32 fd);
+}
+#endif
+
+/*
+ * isatty -- returns 1 if connected to a terminal device,
+ *           returns 0 if not. Since we're hooked up to a
+ *           serial port, we'll say yes _AND return a 1.
+ */
+__attribute__((weak)) sint32 isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
+
+__attribute__((weak)) sint32 _isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/kill.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/kill.c
new file mode 100644
index 0000000..9df4b98
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/kill.c
@@ -0,0 +1,60 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _kill(s32 pid, s32 sig);
+}
+#endif
+
+/*
+ * kill -- go out via exit...
+ */
+
+__attribute__((weak)) s32 kill(s32 pid, s32 sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
+
+__attribute__((weak)) s32 _kill(s32 pid, s32 sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/lseek.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/lseek.c
new file mode 100644
index 0000000..234fe1d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/lseek.c
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence);
+}
+#endif
+/*
+ * lseek --  Since a serial port is non-seekable, we return an error.
+ */
+__attribute__((weak)) off_t lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
+
+__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/open.c
new file mode 100644
index 0000000..8a70116
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/open.c
@@ -0,0 +1,52 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 open(char8 *buf, s32 flags, s32 mode);
+}
+#endif
+/*
+ * open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 open(char8 *buf, s32 flags, s32 mode)
+{
+  (void *)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/read.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/read.c
new file mode 100644
index 0000000..998b14b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/read.c
@@ -0,0 +1,111 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* read.c -- read bytes from a input device.
+ */
+
+#include "xil_printf.h"
+#include "xparameters.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _read (s32 fd, char8* buf, s32 nbytes);
+}
+#endif
+
+/*
+ * read  -- read bytes from the serial port. Ignore fd, since
+ *          we only have stdin.
+ */
+__attribute__((weak)) s32
+read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    *LocalBuf = inbyte();
+	    if ((*LocalBuf == '\n' )|| (*LocalBuf == '\r')) {
+	        break;
+		}
+	}
+	if(LocalBuf != NULL) {
+	LocalBuf -= i;
+	}
+  }
+
+  return (i + 1);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) s32
+_read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    *LocalBuf = inbyte();
+	    if ((*LocalBuf == '\n' )|| (*LocalBuf == '\r')) {
+	        break;
+		}
+	}
+	if(LocalBuf != NULL) {
+	LocalBuf -= i;
+	}
+  }
+
+  return (i + 1);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/sbrk.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/sbrk.c
new file mode 100644
index 0000000..ab6d104
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/sbrk.c
@@ -0,0 +1,65 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) char8 *sbrk (s32 nbytes);
+}
+#endif
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+extern char8 HeapBase[];
+extern char8 HeapLimit[];
+
+
+
+__attribute__((weak)) char8 *sbrk (s32 nbytes)
+{
+  char8 *base;
+  static char8 *heap_ptr = HeapBase;
+
+  base = heap_ptr;
+  if(heap_ptr != NULL) {
+	heap_ptr += nbytes;
+  }
+
+/*  if (heap_ptr <= ((char8 *)&_heap_end + 1)) */
+  if (heap_ptr <= ((char8 *)&HeapLimit + 1)) {
+    return base;
+  }	else {
+    errno = ENOMEM;
+    return ((char8 *)-1);
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/unlink.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/unlink.c
new file mode 100644
index 0000000..51778f0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/unlink.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 unlink(char8 *path);
+}
+#endif
+/*
+ * unlink -- since we have no file system,
+ *           we just return an error.
+ */
+__attribute__((weak)) sint32 unlink(char8 *path)
+{
+  (void *)path;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/write.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/write.c
new file mode 100644
index 0000000..2512c71
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/write.c
@@ -0,0 +1,111 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* write.c -- write bytes to an output device.
+ */
+
+#include "xil_printf.h"
+#include "xparameters.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 _write (sint32 fd, char8* buf, sint32 nbytes);
+}
+#endif
+
+/*
+ * write -- write bytes to the serial port. Ignore fd, since
+ *          stdout and stderr are the same. Since we have no filesystem,
+ *          open will only return an error.
+ */
+__attribute__((weak)) sint32
+write (sint32 fd, char8* buf, sint32 nbytes)
+
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) sint32
+_write (sint32 fd, char8* buf, sint32 nbytes)
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/xil-crt0.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/xil-crt0.S
new file mode 100644
index 0000000..4590133
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/xil-crt0.S
@@ -0,0 +1,145 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil-crt0.S
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a ecm  10/20/09 Initial version
+* 3.05a sdm  02/02/12 Added code for profiling
+* 3.06a sgd  05/16/12 Added global constructors and cleanup code
+*                     Uart initialization based on compiler flag
+* 3.07a sgd  07/05/12 Updated with reset and start Global Timer
+* 3.07a sgd  10/19/12 SMC NOR and SRAM initialization with build option
+* 4.2	pkp  08/04/14 Removed PEEP board related code which contained
+*		      initialization of uart smc nor and sram
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+	.file	"xil-crt0.S"
+	.section ".got2","aw"
+	.align	2
+
+	.text
+.Lsbss_start:
+	.long	__sbss_start
+
+.Lsbss_end:
+	.long	__sbss_end
+
+.Lbss_start:
+	.long	__bss_start
+
+.Lbss_end:
+	.long	__bss_end
+
+.Lstack:
+	.long	__stack
+
+
+	.globl	_start
+_start:
+	bl      __cpu_init		/* Initialize the CPU first (BSP provides this) */
+
+	mov	r0, #0
+
+	/* clear sbss */
+	ldr 	r1,.Lsbss_start		/* calculate beginning of the SBSS */
+	ldr	r2,.Lsbss_end		/* calculate end of the SBSS */
+
+.Lloop_sbss:
+	cmp	r1,r2
+	bge	.Lenclsbss		/* If no SBSS, no clearing required */
+	str	r0, [r1], #4
+	b	.Lloop_sbss
+
+.Lenclsbss:
+	/* clear bss */
+	ldr	r1,.Lbss_start		/* calculate beginning of the BSS */
+	ldr	r2,.Lbss_end		/* calculate end of the BSS */
+
+.Lloop_bss:
+	cmp	r1,r2
+	bge	.Lenclbss		/* If no BSS, no clearing required */
+	str	r0, [r1], #4
+	b	.Lloop_bss
+
+.Lenclbss:
+
+	/* set stack pointer */
+	ldr	r13,.Lstack		/* stack address */
+
+    /* Reset and start Global Timer */
+	mov	r0, #0x0
+	mov	r1, #0x0
+    bl XTime_SetTime
+
+#ifdef PROFILING			/* defined in Makefile */
+	/* Setup profiling stuff */
+	bl	_profile_init
+#endif /* PROFILING */
+
+   /* run global constructors */
+   bl __libc_init_array
+
+	/* make sure argc and argv are valid */
+	mov	r0, #0
+	mov	r1, #0
+
+	/* Let her rip */
+	bl	main
+
+   /* Cleanup global constructors */
+   bl __libc_fini_array
+
+#ifdef PROFILING
+	/* Cleanup profiling stuff */
+	bl	_profile_clean
+#endif /* PROFILING */
+
+        /* All done */
+	bl	exit
+
+.Lexit:	/* should never get here */
+	b .Lexit
+
+.Lstart:
+	.size	_start,.Lstart-_start
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/xpseudo_asm_gcc.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/xpseudo_asm_gcc.h
new file mode 100644
index 0000000..2f83373
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/xpseudo_asm_gcc.h
@@ -0,0 +1,175 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_gcc.h
+*
+* This header file contains macros for using inline assembler code. It is
+* written specifically for the GNU compiler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 1.00a ecm/sdm  10/28/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XPSEUDO_ASM_GCC_H  /* prevent circular inclusions */
+#define XPSEUDO_ASM_GCC_H  /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/* necessary for pre-processor */
+#define stringify(s)	tostring(s)
+#define tostring(s)	#s
+
+/* pseudo assembler instructions */
+#define mfcpsr()	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mrs	%0, cpsr\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+#define mtcpsr(v)	__asm__ __volatile__(\
+			  "msr	cpsr,%0\n"\
+			  : : "r" (v)\
+			)
+
+#define cpsiei()	__asm__ __volatile__("cpsie	i\n")
+#define cpsidi()	__asm__ __volatile__("cpsid	i\n")
+
+#define cpsief()	__asm__ __volatile__("cpsie	f\n")
+#define cpsidf()	__asm__ __volatile__("cpsid	f\n")
+
+
+
+#define mtgpr(rn, v)	__asm__ __volatile__(\
+			  "mov r" stringify(rn) ", %0 \n"\
+			  : : "r" (v)\
+			)
+
+#define mfgpr(rn)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mov %0,r" stringify(rn) "\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+#define isb() __asm__ __volatile__ ("isb" : : : "memory")
+
+/* Data Synchronization Barrier */
+#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
+
+/* Data Memory Barrier */
+#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
+
+
+/* Memory Operations */
+#define ldr(adr)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "ldr	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define ldrb(adr)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "ldrb	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define str(adr, val)	__asm__ __volatile__(\
+			  "str	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+#define strb(adr, val)	__asm__ __volatile__(\
+			  "strb	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+/* Count leading zeroes (clz) */
+#define clz(arg)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "clz	%0,%1"\
+			    : "=r" (rval) : "r" (arg)\
+			  );\
+			  rval;\
+			 })
+
+/* CP15 operations */
+#define mtcp(rn, v)	__asm__ __volatile__(\
+			 "mcr " rn "\n"\
+			 : : "r" (v)\
+			);
+
+#define mfcp(rn)	({u32 rval; \
+			 __asm__ __volatile__(\
+			   "mrc " rn "\n"\
+			   : "=r" (rval)\
+			 );\
+			 rval;\
+			 })
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XPSEUDO_ASM_GCC_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/abort.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/abort.c
new file mode 100644
index 0000000..a47685e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/abort.c
@@ -0,0 +1,40 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+
+
+void abort(void)
+{
+  __exit(1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/asm_vectors.s b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/asm_vectors.s
new file mode 100644
index 0000000..730b417
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/asm_vectors.s
@@ -0,0 +1,161 @@
+;******************************************************************************
+;
+; Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+;
+; Permission is hereby granted, free of charge, to any person obtaining a copy
+; of this software and associated documentation files (the "Software"), to deal
+; in the Software without restriction, including without limitation the rights
+; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+; copies of the Software, and to permit persons to whom the Software is
+; furnished to do so, subject to the following conditions:
+;
+; The above copyright notice and this permission notice shall be included in
+; all copies or substantial portions of the Software.
+;
+; Use of the Software is limited solely to applications:
+; (a) running on a Xilinx device, or
+; (b) that interact with a Xilinx device through a bus or interconnect.
+;
+; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+; XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+; WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+; OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+; SOFTWARE.
+;
+; Except as contained in this notice, the name of the Xilinx shall not be used
+; in advertising or otherwise to promote the sale, use or other dealings in
+; this Software without prior written authorization from Xilinx.
+;
+;*****************************************************************************
+;****************************************************************************
+;**
+; @file asm_vectors.s
+;
+; This file contains the initial vector table for the Cortex A9 processor
+;
+; 
+; MODIFICATION HISTORY:
+;
+; Ver	Who     Date	  Changes
+; ----- ------- -------- ---------------------------------------------------
+; 1.00a 		 Initial version
+; 4.2 	pkp 	06/27/14 Modified return addresses for interrupt
+;			 handlers
+; 5.1	pkp	05/13/15 Saved the addresses of instruction causing data
+;			 abort and prefetch abort into DataAbortAddr and
+;			 PrefetchAbortAddr for further use to fix CR#854523
+; 

+;
+; @note
+;
+; None.
+;
+;****************************************************************************
+
+        MODULE  ?asm_vectors
+
+        ;; Forward declaration of sections.
+        SECTION IRQ_STACK:DATA:NOROOT(3)
+        SECTION FIQ_STACK:DATA:NOROOT(3)
+        SECTION SVC_STACK:DATA:NOROOT(3)
+        SECTION ABT_STACK:DATA:NOROOT(3)
+        SECTION UND_STACK:DATA:NOROOT(3)
+        SECTION CSTACK:DATA:NOROOT(3)
+
+#include "xparameters.h"
+;#include "xtime_l.h"
+
+#define UART_BAUDRATE	115200
+
+	IMPORT _prestart
+	IMPORT __iar_program_start
+
+
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        PUBLIC _vector_table
+
+	IMPORT IRQInterrupt
+	IMPORT FIQInterrupt
+	IMPORT SWInterrupt
+	IMPORT DataAbortInterrupt
+	IMPORT PrefetchAbortInterrupt
+	IMPORT DataAbortAddr
+	IMPORT PrefetchAbortAddr
+
+_vector_table
+        ARM
+
+	B	__iar_program_start
+	B	Undefined
+	B	SVCHandler
+	B	PrefetchAbortHandler
+	B	DataAbortHandler
+	NOP	; Placeholder for address exception vector
+	B	IRQHandler
+	B	FIQHandler
+
+
+      SECTION .text:CODE:NOROOT(2)
+      REQUIRE _vector_table
+
+        ARM
+IRQHandler					; IRQ vector handler
+
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	bl	IRQInterrupt			; IRQ vector
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	subs	pc, lr, #4			; adjust return
+
+
+FIQHandler					; FIQ vector handler
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+
+FIQLoop
+	bl	FIQInterrupt			; FIQ vector
+
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	subs	pc, lr, #4			; adjust return
+
+
+Undefined					; Undefined handler
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	b	_prestart
+
+	movs	pc, lr
+
+
+SVCHandler					; SWI handler
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	tst	r0, #0x20			; check the T bit
+	ldrneh	r0, [lr,#-2]			; Thumb mode
+	bicne	r0, r0, #0xff00			; Thumb mode
+	ldreq	r0, [lr,#-4]			; ARM mode
+	biceq	r0, r0, #0xff000000		; ARM mode
+	bl	SWInterrupt			; SWInterrupt: call C function here
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	movs	pc, lr				; adjust return
+
+DataAbortHandler				; Data Abort handler
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	ldr     r0, =DataAbortAddr
+	sub     r1, lr,#8
+	str     r1, [r0]			;Address of instruction causing data abort
+	bl	DataAbortInterrupt		;DataAbortInterrupt :call C function here
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	subs	pc, lr, #8			; adjust return
+
+PrefetchAbortHandler				; Prefetch Abort handler
+	stmdb	sp!,{r0-r3,r12,lr}		; state save from compiled code
+	ldr     r0, =PrefetchAbortAddr
+	sub     r1, lr,#4
+	str     r1, [r0]			;Address of instruction causing prefetch abort
+	bl	PrefetchAbortInterrupt		; PrefetchAbortInterrupt: call C function here
+	ldmia	sp!,{r0-r3,r12,lr}		; state restore from compiled code
+	subs	pc, lr, #4			; adjust return
+
+	END
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/boot.s b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/boot.s
new file mode 100644
index 0000000..ab2b60d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/boot.s
@@ -0,0 +1,457 @@
+;******************************************************************************
+;
+; Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+;
+; Permission is hereby granted, free of charge, to any person obtaining a copy
+; of this software and associated documentation files (the "Software"), to deal
+; in the Software without restriction, including without limitation the rights
+; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+; copies of the Software, and to permit persons to whom the Software is
+; furnished to do so, subject to the following conditions:
+;
+; The above copyright notice and this permission notice shall be included in
+; all copies or substantial portions of the Software.
+;
+; Use of the Software is limited solely to applications:
+; (a) running on a Xilinx device, or
+; (b) that interact with a Xilinx device through a bus or interconnect.
+;
+; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+; XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+; WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+; OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+; SOFTWARE.
+;
+; Except as contained in this notice, the name of the Xilinx shall not be used
+; in advertising or otherwise to promote the sale, use or other dealings in
+; this Software without prior written authorization from Xilinx.
+;
+;*****************************************************************************
+;****************************************************************************
+;**
+; @file boot.s
+;
+; This file contains the initial vector table for the Cortex A9 processor
+;
+; 
+; MODIFICATION HISTORY:
+;
+; Ver	Who     Date	  Changes
+; ----- ------- -------- ---------------------------------------------------
+; 1.00a 		 Initial version
+; 4.2	pkp  	08/04/14 Removed PEEP board related code which contained
+;			 initialization of uart smc nor and sram
+; 5.0	pkp	16/12/14 Modified initialization code to enable scu after
+;			 MMU is enabled and removed incorrect initialization
+;			 of TLB lockdown register to fix CR#830580
+; 5.1  pkp	05/13/15 Changed the initialization order so to first invalidate
+;			 caches and TLB, enable MMU and caches, then enable SMP
+;			 bit in ACTLR. L2Cache invalidation and enabling of L2Cache
+;			 is done later.
+; 

+;
+; @note
+;
+; None.
+;
+;****************************************************************************
+
+        MODULE  ?boot
+        ;; Forward declaration of sections.
+        SECTION IRQ_STACK:DATA:NOROOT(3)
+        SECTION FIQ_STACK:DATA:NOROOT(3)
+        SECTION SVC_STACK:DATA:NOROOT(3)
+        SECTION ABT_STACK:DATA:NOROOT(3)
+        SECTION UND_STACK:DATA:NOROOT(3)
+        SECTION CSTACK:DATA:NOROOT(3)
+
+#include "xparameters.h"
+;#include "xtime_l.h"
+
+#define UART_BAUDRATE	115200
+
+	PUBLIC _prestart
+	PUBLIC __iar_program_start
+	IMPORT _vector_table
+	IMPORT MMUTable
+	IMPORT __cmain
+	IMPORT Xil_ExceptionInit
+	IMPORT XTime_SetTime
+
+PSS_L2CC_BASE_ADDR	EQU	0xF8F02000
+PSS_SLCR_BASE_ADDR	EQU	0xF8000000
+
+RESERVED	EQU	0x0fffff00
+TblBase		EQU	MMUTable
+LRemap		EQU	0xFE00000F		; set the base address of the peripheral block as not shared
+L2CCWay		EQU	(PSS_L2CC_BASE_ADDR + 0x077C)	;(PSS_L2CC_BASE_ADDR + PSS_L2CC_CACHE_INVLD_WAY_OFFSET)
+L2CCSync	EQU	(PSS_L2CC_BASE_ADDR + 0x0730)	;(PSS_L2CC_BASE_ADDR + PSS_L2CC_CACHE_SYNC_OFFSET)
+L2CCCrtl	EQU	(PSS_L2CC_BASE_ADDR + 0x0100)	;(PSS_L2CC_BASE_ADDR + PSS_L2CC_CNTRL_OFFSET)
+L2CCAuxCrtl	EQU	(PSS_L2CC_BASE_ADDR + 0x0104)	;(PSS_L2CC_BASE_ADDR + XPSS_L2CC_AUX_CNTRL_OFFSET)
+L2CCTAGLatReg	EQU	(PSS_L2CC_BASE_ADDR + 0x0108)	;(PSS_L2CC_BASE_ADDR + XPSS_L2CC_TAG_RAM_CNTRL_OFFSET)
+L2CCDataLatReg	EQU	(PSS_L2CC_BASE_ADDR + 0x010C)	;(PSS_L2CC_BASE_ADDR + XPSS_L2CC_DATA_RAM_CNTRL_OFFSET)
+L2CCIntClear	EQU	(PSS_L2CC_BASE_ADDR + 0x0220)	;(PSS_L2CC_BASE_ADDR + XPSS_L2CC_IAR_OFFSET)
+L2CCIntRaw	EQU	(PSS_L2CC_BASE_ADDR + 0x021C)	;(PSS_L2CC_BASE_ADDR + XPSS_L2CC_ISR_OFFSET)
+
+SLCRlockReg	EQU	(PSS_SLCR_BASE_ADDR + 0x04)	;(PSS_SLCR_BASE_ADDR + XPSS_SLCR_LOCK_OFFSET)
+SLCRUnlockReg	EQU     (PSS_SLCR_BASE_ADDR + 0x08)	;(PSS_SLCR_BASE_ADDR + XPSS_SLCR_UNLOCK_OFFSET)
+SLCRL2cRamReg	EQU     (PSS_SLCR_BASE_ADDR + 0xA1C) ;(PSS_SLCR_BASE_ADDR + XPSS_SLCR_L2C_RAM_OFFSET)
+
+/* workaround for simulation not working when L1 D and I caches,MMU and  L2 cache enabled - DT568997 */
+#if SIM_MODE == 1
+CRValMmuCac	EQU	00000000000000b	; Disable IDC, and MMU
+#else
+CRValMmuCac	EQU	01000000000101b	; Enable IDC, and MMU
+#endif
+CRValHiVectorAddr	EQU	10000000000000b	; Set the Vector address to high, 0xFFFF0000
+
+L2CCAuxControl	EQU	0x72360000	; Enable all prefetching, Way Size (16 KB) and High Priority for SO and Dev Reads Enable
+L2CCControl	EQU	0x01		; Enable L2CC
+L2CCTAGLatency	EQU	0x0111		; 7 Cycles of latency for TAG RAM
+L2CCDataLatency	EQU	0x0121		; 7 Cycles of latency for DATA RAM
+
+SLCRlockKey		EQU	        0x767B			; SLCR lock key
+SLCRUnlockKey		EQU	        0xDF0D			; SLCR unlock key
+SLCRL2cRamConfig	EQU      	0x00020202      ; SLCR L2C ram configuration
+
+
+vector_base	EQU	_vector_table
+
+FPEXC_EN	EQU	0x40000000	; FPU enable bit, (1 << 30)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+
+; this initializes the various processor modes
+
+_prestart
+__iar_program_start
+
+#if XPAR_CPU_ID==0
+; only allow cp0 through
+	mrc	p15,0,r1,c0,c0,5
+	and	r1, r1, #0xf
+	cmp	r1, #0
+	beq	OKToRun
+EndlessLoop0
+	wfe
+	b	EndlessLoop0
+
+#elif XPAR_CPU_ID==1
+; only allow cp1 through
+	mrc	p15,0,r1,c0,c0,5
+	and	r1, r1, #0xf
+	cmp	r1, #1
+	beq	OKToRun
+EndlessLoop1
+	wfe
+	b	EndlessLoop1
+#endif
+
+OKToRun
+	mrc     p15, 0, r0, c0, c0, 0		; Get the revision
+	and     r5, r0, #0x00f00000
+	and     r6, r0, #0x0000000f
+	orr     r6, r6, r5, lsr #20-4
+
+#ifdef CONFIG_ARM_ERRATA_742230
+        cmp     r6, #0x22                       ; only present up to r2p2
+        mrcle   p15, 0, r10, c15, c0, 1         ; read diagnostic register
+        orrle   r10, r10, #1 << 4               ; set bit #4
+        mcrle   p15, 0, r10, c15, c0, 1         ; write diagnostic register
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_743622
+	teq     r5, #0x00200000                 ; only present in r2p*
+	mrceq   p15, 0, r10, c15, c0, 1         ; read diagnostic register
+	orreq   r10, r10, #1 << 6               ; set bit #6
+	mcreq   p15, 0, r10, c15, c0, 1         ; write diagnostic register
+#endif
+
+	; set VBAR to the _vector_table address in linker script
+	ldr	r0, =vector_base
+	mcr	p15, 0, r0, c12, c0, 0
+
+	;invalidate scu
+	ldr	r7, =0xf8f0000c
+	ldr	r6, =0xffff
+	str	r6, [r7]
+
+	;Invalidate caches and TLBs
+	mov	r0,#0				; r0 = 0
+	mcr	p15, 0, r0, c8, c7, 0		; invalidate TLBs
+	mcr	p15, 0, r0, c7, c5, 0		; invalidate icache
+	mcr	p15, 0, r0, c7, c5, 6		; Invalidate branch predictor array
+	bl	invalidate_dcache		; invalidate dcache
+
+
+	; Disable MMU, if enabled
+	mrc	p15, 0, r0, c1, c0, 0		; read CP15 register 1
+	bic	r0, r0, #0x1			; clear bit 0
+	mcr	p15, 0, r0, c1, c0, 0		; write value back
+
+#ifdef SHAREABLE_DDR
+	; Mark the entire DDR memory as shareable
+	ldr	r3, =0x3ff			; 1024 entries to cover 1G DDR
+	ldr	r0, =TblBase			; MMU Table address in memory
+	ldr	r2, =0x15de6			; S=1, TEX=b101 AP=b11, Domain=b1111, C=b0, B=b1
+shareable_loop
+	str	r2, [r0]			; write the entry to MMU table
+	add	r0, r0, #0x4			; next entry in the table
+	add	r2, r2, #0x100000		; next section
+	subs	r3, r3, #1
+	bge	shareable_loop			; loop till 1G is covered
+#endif
+
+	; In case of AMP, map virtual address 0x20000000 to 0x00000000  and mark it as non-cacheable
+#if USE_AMP==1
+	ldr	r3, =0x1ff			; 512 entries to cover 512MB DDR
+	ldr	r0, =TblBase			; MMU Table address in memory
+	add	r0, r0, #0x800			; Address of entry in MMU table, for 0x20000000
+	ldr	r2, =0x0c02			; S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b0
+mmu_loop
+	str	r2, [r0]			; write the entry to MMU table
+	add	r0, r0, #0x4			; next entry in the table
+	add	r2, r2, #0x100000		; next section
+	subs	r3, r3, #1
+	bge	mmu_loop			; loop till 512MB is covered
+#endif
+
+	mrs	r0, cpsr			; get the current PSR
+	mvn	r1, #0x1f			; set up the irq stack pointer
+	and	r2, r1, r0
+	orr	r2, r2, #0x12			; IRQ mode
+	msr	cpsr, r2			; was cpsr, apsr is considered synonym
+        ldr	r13,=SFE(IRQ_STACK)	        ; IRQ stack pointer
+
+	mrs	r0, cpsr			; get the current PSR
+	mvn	r1, #0x1f			; set up the supervisor stack pointer
+	and	r2, r1, r0
+	orr	r2, r2, #0x13			; supervisor mode
+	msr	cpsr, r2			; was cpsr, apsr is considered synonym
+        ldr	r13,=SFE(SVC_STACK)            ; Supervisor stack pointer
+
+	mrs	r0, cpsr			; get the current PSR
+	mvn	r1, #0x1f			; set up the Abort  stack pointer
+	and	r2, r1, r0
+	orr	r2, r2, #0x17			; Abort mode
+	msr	cpsr, r2			; was cpsr, apsr is considered synonym
+        ldr	r13,=SFE(ABT_STACK)             ; Abort stack pointer
+
+	mrs	r0, cpsr			; was cpsr, get the current PSR
+	mvn	r1, #0x1f			; set up the FIQ stack pointer
+	and	r2, r1, r0
+	orr	r2, r2, #0x11			; FIQ mode
+	msr	cpsr, r2			; was cpsr
+	ldr	r13,=SFE(FIQ_STACK)		; FIQ stack pointer
+
+	mrs	r0, cpsr			; was cpsr, get the current PSR
+	mvn	r1, #0x1f			; set up the Undefine stack pointer
+	and	r2, r1, r0
+	orr	r2, r2, #0x1b			; Undefine mode
+	msr	cpsr, r2			; was cpsr
+	ldr	r13,=SFE(UND_STACK)		; Undefine stack pointer
+
+	mrs	r0, cpsr			; was cpsr, get the current PSR
+	mvn	r1, #0x1f			; set up the system stack pointer
+	and	r2, r1, r0
+	orr	r2, r2, #0x1f			; SYS mode
+	msr	cpsr, r2			; was cpsr, apsr is considered synonym
+        ldr	r13,=SFE(CSTACK)                ; SYS stack pointer
+
+	;set scu enable bit in scu
+	ldr	r7, =0xf8f00000
+	ldr	r0, [r7]
+	orr	r0, r0, #0x1
+	str	r0, [r7]
+
+	; enable MMU and cache
+
+	ldr	r0,=TblBase			; Load MMU translation table base
+	orr	r0, r0, #0x5B			; Outer-cacheable, WB
+	mcr	p15, 0, r0, c2, c0, 0		; TTB0
+
+	mvn	r0,#0				; Load MMU domains -- all ones=manager
+	mcr	p15,0,r0,c3,c0,0
+
+	; Enable mmu, icahce and dcache
+	ldr	r0,=CRValMmuCac
+
+	mcr	p15,0,r0,c1,c0,0		; Enable cache and MMU
+	dsb					; dsb allow the MMU to start up
+	isb					; isb flush prefetch buffer
+
+	; Write to ACTLR
+	mrc	p15, 0,r0, c1, c0, 1		; Read ACTLR
+	orr	r0, r0, #(0x01 << 6)		; SMP bit
+	orr	r0, r0, #(0x01 )		; Cache/TLB maintenance broadcast
+	mcr	p15, 0,r0, c1, c0, 1		; Write ACTLR
+
+; Invalidate L2 Cache and initialize L2 Cache
+; For AMP, assume running on CPU1. Don't initialize L2 Cache (up to Linux)
+#if USE_AMP!=1
+	ldr	r0,=L2CCCrtl			; Load L2CC base address base + control register
+	mov	r1, #0				; force the disable bit
+	str	r1, [r0]			; disable the L2 Caches
+
+	ldr	r0,=L2CCAuxCrtl			; Load L2CC base address base + Aux control register
+	ldr	r1,[r0]				; read the register
+	ldr	r2,=L2CCAuxControl		; set the default bits
+	orr	r1,r1,r2
+	str	r1, [r0]			; store the Aux Control Register
+
+	ldr	r0,=L2CCTAGLatReg		; Load L2CC base address base + TAG Latency address
+	ldr	r1,=L2CCTAGLatency		; set the latencies for the TAG
+	str	r1, [r0]			; store the TAG Latency register Register
+
+	ldr	r0,=L2CCDataLatReg		; Load L2CC base address base + Data Latency address
+	ldr	r1,=L2CCDataLatency		; set the latencies for the Data
+	str	r1, [r0]			; store the Data Latency register Register
+
+	ldr	r0,=L2CCWay			; Load L2CC base address base + way register
+	ldr	r2, =0xFFFF
+	str	r2, [r0]			; force invalidate
+
+	ldr	r0,=L2CCSync			; need to poll 0x730, PSS_L2CC_CACHE_SYNC_OFFSET
+						; Load L2CC base address base + sync register
+	; poll for completion
+Sync
+	ldr	r1, [r0]
+	cmp	r1, #0
+	bne	Sync
+
+	ldr	r0,=L2CCIntRaw			; clear pending interrupts
+	ldr	r1,[r0]
+	ldr	r0,=L2CCIntClear
+	str	r1,[r0]
+
+	ldr	r0,=SLCRUnlockReg		; Load SLCR base address base + unlock register
+	ldr	r1,=SLCRUnlockKey	    	; set unlock key
+	str	r1, [r0]		    	; Unlock SLCR
+
+	ldr	r0,=SLCRL2cRamReg		; Load SLCR base address base + l2c Ram Control register
+	str	r1, [r0]	        	; store the L2c Ram Control Register
+
+	ldr	r0,=SLCRlockReg         	; Load SLCR base address base + lock register
+	ldr	r1,=SLCRlockKey	        	; set lock key
+	str	r1, [r0]	        	; lock SLCR
+	ldr	r0,=L2CCCrtl			; Load L2CC base address base + control register
+	ldr	r1,[r0]				; read the register
+	mov	r2, #L2CCControl		; set the enable bit
+	orr	r1,r1,r2
+	str	r1, [r0]			; enable the L2 Caches
+#endif
+
+	mov	r0, r0
+	mrc	p15, 0, r1, c1, c0, 2		; read cp access control register (CACR) into r1
+	orr	r1, r1, #(0xf << 20)		; enable full access for p10 & p11
+	mcr	p15, 0, r1, c1, c0, 2		; write back into CACR
+
+	; enable vfp
+	fmrx  r1, FPEXC				; read the exception register
+	orr	r1,r1, #FPEXC_EN		; set VFP enable bit, leave the others in orig state
+	fmxr  FPEXC, r1				; write back the exception register
+
+	mrc	p15, 0, r0, c1, c0, 0		; flow prediction enable
+	orr	r0, r0, #(0x01 << 11)		; #0x8000
+	mcr	p15,0,r0,c1,c0,0
+
+	mrc	p15, 0, r0, c1, c0, 1		; read Auxiliary Control Register
+	orr	r0, r0, #(0x1 << 2)		; enable Dside prefetch
+	orr	r0, r0, #(0x1 << 1)		; enable L2 prefetch
+	mcr	p15, 0, r0, c1, c0, 1		; write Auxiliary Control Register
+
+	; Initialize the vector table
+	;bl	 Xil_ExceptionInit
+
+; Clear cp15 regs with unknown reset values
+	mov	r0, #0x0
+	mcr	p15, 0, r0, c5, c0, 0		; DFSR
+	mcr	p15, 0, r0, c5, c0, 1		; IFSR
+	mcr	p15, 0, r0, c6, c0, 0		; DFAR
+	mcr	p15, 0, r0, c6, c0, 2		; IFAR
+	mcr	p15, 0, r0, c9, c13, 2		; PMXEVCNTR
+	mcr	p15, 0, r0, c13, c0, 2		; TPIDRURW
+	mcr	p15, 0, r0, c13, c0, 3		; TPIDRURO
+
+; Reset and start Cycle Counter
+	mov	r2, #0x80000000			; clear overflow
+	mcr	p15, 0, r2, c9, c12, 3
+	mov	r2, #0xd			; D, C, E
+	mcr	p15, 0, r2, c9, c12, 0
+	mov	r2, #0x80000000			; enable cycle counter
+	mcr	p15, 0, r2, c9, c12, 1
+
+; Reset and start Global Timer
+    mov	r0, #0x0
+    mov	r1, #0x0
+    bl XTime_SetTime
+
+; make sure argc and argv are valid
+	mov r0, #0
+	mov r1, #0
+	b  __cmain				; jump to C startup code
+
+	and	r0, r0, r0			; no op
+
+Ldone  b  Ldone					; Paranoia: we should never get here
+
+
+; *************************************************************************
+; *
+; * invalidate_dcache - invalidate the entire d-cache by set/way
+; *
+; * Note: for Cortex-A9, there is no cp instruction for invalidating
+; * the whole D-cache. Need to invalidate each line.
+; *
+; *************************************************************************
+
+invalidate_dcache
+	mrc	p15, 1, r0, c0, c0, 1		; read CLIDR
+	ands	r3, r0, #0x7000000
+	mov	r3, r3, lsr #23			; cache level value (naturally aligned)
+	beq	finished
+	mov	r10, #0				; start with level 0
+loop1
+	add	r2, r10, r10, lsr #1		; work out 3xcachelevel
+	mov	r1, r0, lsr r2			; bottom 3 bits are the Cache type for this level
+	and	r1, r1, #7			; get those 3 bits alone
+	cmp	r1, #2
+	blt	skip				; no cache or only instruction cache at this level
+	mcr	p15, 2, r10, c0, c0, 0		; write the Cache Size selection register
+	isb					; isb to sync the change to the CacheSizeID reg
+	mrc	p15, 1, r1, c0, c0, 0		; reads current Cache Size ID register
+	and	r2, r1, #7			; extract the line length field
+	add	r2, r2, #4			; add 4 for the line length offset (log2 16 bytes)
+	ldr	r4, =0x3ff
+	ands	r4, r4, r1, lsr #3		; r4 is the max number on the way size (right aligned)
+	clz	r5, r4				; r5 is the bit position of the way size increment
+	ldr	r7, =0x7fff
+	ands	r7, r7, r1, lsr #13		; r7 is the max number of the index size (right aligned)
+loop2
+	mov	r9, r4				; r9 working copy of the max way size (right aligned)
+loop3
+	orr	r11, r10, r9, lsl r5		; factor in the way number and cache number into r11
+	orr	r11, r11, r7, lsl r2		; factor in the index number
+	mcr	p15, 0, r11, c7, c6, 2		; invalidate by set/way
+	subs	r9, r9, #1			; decrement the way number
+	bge	loop3
+	subs	r7, r7, #1			; decrement the index
+	bge	loop2
+skip
+	add	r10, r10, #2			; increment the cache number
+	cmp	r3, r10
+	bgt	loop1
+
+finished
+	mov	r10, #0				; swith back to cache level 0
+	mcr	p15, 2, r10, c0, c0, 0		; select current cache level in cssr
+	dsb
+	isb
+
+	bx lr
+
+
+	END
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/clock.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/clock.c
new file mode 100644
index 0000000..fa459f6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/clock.c
@@ -0,0 +1,54 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*
+ * This is the default implementation of the "clock" function of the
+ * standard library.  It can be replaced with a system-specific
+ * implementation.
+ *
+ * The "clock" function should return the processor time used by the
+ * program from some implementation-defined start time.  The value
+ * should be such that if divided by the macro CLOCKS_PER_SEC the
+ * result should yield the time in seconds.
+ *
+ * The value "(clock_t)-1" means that the processor time is not
+ * available.
+ *
+ */
+
+#include 
+
+
+clock_t (clock)(void)
+{
+  return ((clock_t) -1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/close.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/close.c
new file mode 100644
index 0000000..825ee7a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/close.c
@@ -0,0 +1,41 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+sint32 __close(sint32 fd)
+{
+  (void)fd;
+  return (0);
+
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/exit.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/exit.c
new file mode 100644
index 0000000..e8c1688
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/exit.c
@@ -0,0 +1,42 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+#include "xil_types.h"
+
+void exit(sint32 arg)
+{
+  while(1) {
+	;
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/low_level_init.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/low_level_init.c
new file mode 100644
index 0000000..4eb30c6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/low_level_init.c
@@ -0,0 +1,75 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*
+ * This module contains the function `__low_level_init', a function
+ * that is called before the `main' function of the program.  Normally
+ * low-level initializations - such as setting the prefered interrupt
+ * level or setting the watchdog - can be performed here.
+ *
+ * Note that this function is called before the data segments are
+ * initialized, this means that this function cannot rely on the
+ * values of global or static variables.
+ *
+ * When this function returns zero, the startup code will inhibit the
+ * initialization of the data segments. The result is faster startup,
+ * the drawback is that neither global nor static data will be
+ * initialized.
+ */
+
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+s32 __low_level_init(void);
+
+s32 __low_level_init(void)
+{
+  /*==================================*/
+  /*  Initialize hardware.            */
+  /*==================================*/
+
+  /*==================================*/
+  /* Choose if segment initialization */
+  /* should be done or not.           */
+  /* Return: 0 to omit seg_init       */
+  /*         1 to run seg_init        */
+  /*==================================*/
+  return 1;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/lseek.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/lseek.c
new file mode 100644
index 0000000..e29793a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/lseek.c
@@ -0,0 +1,60 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*
+ *
+ * This is a template implementation of the "__lseek" function used by
+ * the standard library.  Replace it with a system-specific
+ * implementation.
+ *
+ * The "__lseek" function makes the next file operation (__read or
+ * __write) act on a new location.  The parameter "whence" specifies
+ * how the "offset" parameter should be interpreted according to the
+ * following table:
+ *
+ *  0 (=SEEK_SET) - Goto location "offset".
+ *  1 (=SEEK_CUR) - Go "offset" bytes from the current location.
+ *  2 (=SEEK_END) - Go to "offset" bytes from the end.
+ *
+ * This function should return the current file position, or -1 on
+ * failure.
+ */
+
+#include 
+#include 
+#include "xil_types.h"
+LONG __lseek(sint32 handle, LONG offset, sint32 whence);
+
+LONG __lseek(sint32 handle, LONG offset, sint32 whence)
+{
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/open.c
new file mode 100644
index 0000000..642a384
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/open.c
@@ -0,0 +1,54 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*
+ *
+ * This is a template implementation of the "__open" function used by
+ * the standard library.  Replace it with a system-specific
+ * implementation.
+ *
+ * The "__open" function opens the file named "filename" as specified
+ * by "mode".
+ * open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ *
+ */
+
+#include 
+#include "xil_types.h"
+
+sint32 __open(const char8 * filename, sint32 mode);
+
+sint32 __open(const char8 * filename, sint32 mode)
+{
+return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/read.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/read.c
new file mode 100644
index 0000000..67a6329
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/read.c
@@ -0,0 +1,54 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*
+ *
+ *
+ * The "__read" function reads a number of bytes, at most "size" into
+ * the memory area pointed to by "buffer".  It returns the number of
+ * bytes read, 0 at the end of the file, or _LLIO_ERROR if failure
+ * occurs.
+ *
+ * The template implementation below should return a
+ * character value, or -1 on failure.
+ *
+ */
+
+#include 
+#include "xil_types.h"
+
+size_t __read(sint32 handle, u8 * buffer, size_t size);
+
+size_t __read(sint32 handle, u8 * buffer, size_t size)
+{
+
+return size;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/remove.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/remove.c
new file mode 100644
index 0000000..187cfd6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/remove.c
@@ -0,0 +1,48 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*
+ *
+ * The "remove" function should remove the file named "filename".  It
+ * should return 0 on success and nonzero on failure.
+ *
+ */
+
+#include 
+#include "xil_types.h"
+
+sint32 remove(const char8 * filename);
+
+sint32 remove(const char8 * filename)
+{
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/translation_table.s b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/translation_table.s
new file mode 100644
index 0000000..89c8d97
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/translation_table.s
@@ -0,0 +1,194 @@
+;******************************************************************************
+;
+; Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+;
+; Permission is hereby granted, free of charge, to any person obtaining a copy
+; of this software and associated documentation files (the "Software"), to deal
+; in the Software without restriction, including without limitation the rights
+; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+; copies of the Software, and to permit persons to whom the Software is
+; furnished to do so, subject to the following conditions:
+;
+; The above copyright notice and this permission notice shall be included in
+; all copies or substantial portions of the Software.
+;
+; Use of the Software is limited solely to applications:
+; (a) running on a Xilinx device, or
+; (b) that interact with a Xilinx device through a bus or interconnect.
+;
+; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+; XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+; WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+; OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+; SOFTWARE.
+;
+; Except as contained in this notice, the name of the Xilinx shall not be used
+; in advertising or otherwise to promote the sale, use or other dealings in
+; this Software without prior written authorization from Xilinx.
+;
+;*****************************************************************************
+;****************************************************************************
+;**
+; @file translation_table.s
+;
+; This file contains the initialization for the MMU table in RAM
+; needed by the Cortex A9 processor
+;
+; 
+; MODIFICATION HISTORY:
+;
+; Ver   Who  Date     Changes
+; ----- ---- -------- ---------------------------------------------------
+; 1.00a ecm  10/20/09 Initial version
+; 3.07a sgd  07/05/12 Configuring device address spaces as shareable device
+;		       instead of strongly-ordered.
+; 4.2	pkp  09/02/14 modified translation table entries according to address map
+; 4.2	pkp  09/11/14 modified translation table entries to resolve compilation
+;		      error for solving CR#822897
+; 

+;
+; @note
+;
+; None.
+;
+;****************************************************************************
+	EXPORT  MMUTable
+
+;ARMCC	AREA |.mmu_tbl|,CODE,ALIGN=14
+;        RSEG mmu_tbl:CODE:ROOT (14)
+	SECTION .mmu_tbl:CODE:ROOT(14)
+
+MMUTable
+	; Each table entry occupies one 32-bit word and there are
+	; 4096 entries, so the entire table takes up 16KB.
+	; Each entry covers a 1MB section.
+
+
+; 0x00000000 - 0x3ffffff (DDR Cacheable)
+count   SETA  0
+sect    SETA  0
+  REPT  0x400
+  DCD	sect + 0x15de6		; S=1, TEX=b101 AP=b11, Domain=b1111, C=b0, B=b1
+sect    SETA  sect+0x100000
+count   SETA  count+1
+  ENDR
+
+; 0x40000000 - 0x7fffffff (GpAxi0)
+count   SETA  0
+   REPT 0x400
+   DCD	sect + 0xc02		; S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0x80000000 - 0xbfffffff (GpAxi1)
+count   SETA  0
+   REPT 0x400
+   DCD	sect + 0xc02		; S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b1
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xc0000000 - 0xdfffffff (undef)
+count   SETA  0
+   REPT 0x200
+   DCD	sect 			; S=0, TEX=b000 AP=b00, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xe0000000 - 0xe02fffff (IOP dev)
+count   SETA  0
+   REPT 0x3
+   DCD	sect + 0xc06		; S=0, TEX=b010 AP=b11, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+ ;  0xe0300000 - 0xe0ffffff (undef/reserved)
+count   SETA  0
+    REPT 0xD
+    DCD	sect		;  S=0, TEX=b000 AP=b00, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xe1000000 - 0xe1ffffff (NAND)
+count   SETA  0
+   REPT 0x10
+   DCD	sect + 0xc06		; S=0, TEX=b010 AP=b11, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xe2000000 - 0xe3ffffff (NOR)
+count   SETA  0
+   REPT 0x20
+   DCD	sect + 0xc06		; S=0, TEX=b010 AP=b11, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xe4000000 - 0xe5ffffff (SRAM)
+count   SETA  0
+   REPT 0x20
+   DCD	sect + 0xc0e		; S=b0 TEX=b000 AP=b11, Domain=b0, C=b1, B=b1
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xe6000000 - 0xf7ffffff (reserved)
+count   SETA  0
+   REPT 0x0120
+   DCD	sect 			; S=0, TEX=b000 AP=b00, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xf8000c00 to 0xf8000fff, 0xf8010000 to 0xf88fffff and
+; 0xf8f03000 to 0xf8ffffff are reserved  but due to granual size of
+; 1MB, it is not possible to define separate regions for them
+
+; 0xf8000000 - 0xf8ffffff (APB device regs)
+count   SETA  0
+   REPT 0x10
+   DCD	sect + 0xc06		; S=0, TEX=b010 AP=b11, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xf9000000 - 0xfbffffff (reserved)
+count   SETA  0
+   REPT 0x30
+   DCD	sect 			; S=0, TEX=b000 AP=b00, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xfc000000 - 0xfdffffff (QSPI)
+count   SETA  0
+   REPT 0x20
+   DCD	sect + 0xc0a		;  S=b0 TEX=b000 AP=b11, Domain=b0, C=b1, B=b1
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xfe000000 - 0xffefffff (reserved)
+count   SETA  0
+   REPT 0x1F
+   DCD	sect 			; S=0, TEX=b000 AP=b00, Domain=b0, C=b0, B=b0
+sect    SETA  sect+0x100000
+count   SETA  count+1
+   ENDR
+
+; 0xfff00000 to 0xfffb0000 is reserved but due to granual size of
+; 1MB, it is not possible to define separate region for  it
+
+; 0xfff00000 to 0xfffb0000 (OCM)
+count   SETA  0
+    DCD	sect + 0x4c0e		;  S=b0 TEX=b100 AP=b11, Domain=b0, C=b1, B=b1
+sect    SETA  sect+0x100000
+
+   END
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/write.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/write.c
new file mode 100644
index 0000000..2dabbfe
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/write.c
@@ -0,0 +1,131 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*
+ * The "__write" function should output "size" number of bytes from
+ * "buffer" in some application-specific way.  It should return the
+ * number of characters written, or _LLIO_ERROR on failure.
+ *
+ * If "buffer" is zero then __write should perform flushing of
+ * internal buffers, if any.  In this case "handle" can be -1 to
+ * indicate that all handles should be flushed.
+ *
+ * The template implementation below assumes that the application
+ * provides the function "MyLowLevelPutchar".  It should return the
+ * character written, or -1 on failure.
+ *
+ */
+
+#include 
+#include "xil_types.h"
+
+
+#if 0
+/*
+ * If the __write implementation uses internal buffering, uncomment
+ * the following line to ensure that we are called with "buffer" as 0
+ * (i.e. flush) when the application terminates.
+ */
+
+size_t __write(sint32 handle, const u8 * buffer, size_t size)
+{
+  u32 volatile *uart_base = (u32 *)0xE0001000U;
+  s32 i;
+
+  for (i =0; i < size;i++) {
+    /* wait if TNFUL */
+    while (*(uart_base + 11U) & (1U << 14U)) ;
+    *(uart_base + 12U) = buffer[i];
+  }
+  return 0;
+}
+
+#endif
+
+#include "xparameters.h"
+#include "xil_printf.h"
+
+#ifdef __cplusplus
+extern "C" {
+	sint32 _write (sint32 fd, char8* buf, sint32 nbytes);
+}
+#endif
+
+/*
+ * write -- write bytes to the serial port. Ignore fd, since
+ *          stdout and stderr are the same. Since we have no filesystem,
+ *          open will only return an error.
+ */
+sint32
+write (sint32 fd, char8* buf, sint32 nbytes)
+
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+    if (*(buf + i) == '\n') {
+      outbyte ('\r');
+    }
+    outbyte (*(buf + i));
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+size_t
+__write (sint32 fd, const u8* buf, size_t nbytes)
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+    if (*(buf + i) == '\n') {
+      outbyte ('\r');
+    }
+    outbyte (*(buf + i));
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/xpseudo_asm_iccarm.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/xpseudo_asm_iccarm.c
new file mode 100644
index 0000000..256c9d3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/xpseudo_asm_iccarm.c
@@ -0,0 +1,69 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_iccarm.c
+*
+* This file contains functions for ARM register handling.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 3.12a asa  11/2/13 First Release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xpseudo_asm_iccarm.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+/* embedded assembler instructions */
+s32 mfcpsr (void)
+{
+	s32 rval;
+	asm("mrs %0, cpsr" : "=r"(rval));
+	return rval;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/xpseudo_asm_iccarm.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/xpseudo_asm_iccarm.h
new file mode 100644
index 0000000..c1b751c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/iccarm/xpseudo_asm_iccarm.h
@@ -0,0 +1,171 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_iccarm.h
+*
+* This header file contains macros for using inline assembler code. It is
+* written specifically for the IAR C/C++ compiler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 1.00a ecm/sdm  10/28/09 First release
+* 3.12a asa		 11/02/13  Removed the macro mfcpsr to make it a function.
+* 

+*
+******************************************************************************/
+
+#ifndef XPSEUDO_ASM_ICCARM_H  /* prevent circular inclusions */
+#define XPSEUDO_ASM_ICCARM_H  /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/* necessary for pre-processor */
+#define stringify(s)	tostring(s)
+#define tostring(s)	#s
+
+/* pseudo assembler instructions */
+
+#define mtcpsr(v)	__asm volatile(\
+			  "msr	cpsr,%0\n"\
+			  : : "r" (v)\
+			)
+
+#define cpsiei()	__asm volatile("cpsie	i\n")
+#define cpsidi()	__asm volatile("cpsid	i\n")
+
+#define cpsief()	__asm volatile("cpsie	f\n")
+#define cpsidf()	__asm volatile("cpsid	f\n")
+
+
+
+#define mtgpr(rn, v)	__asm volatile(\
+			  "mov r" stringify(rn) ", %0 \n"\
+			  : : "r" (v)\
+			)
+
+#define mfgpr(rn)	({u32 rval; \
+			  __asm volatile(\
+			    "mov %0,r" stringify(rn) "\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+#define isb() __asm volatile ("isb" : : : "memory")
+
+/* Data Synchronization Barrier */
+#define dsb() __asm volatile ("dsb" : : : "memory")
+
+/* Data Memory Barrier */
+#define dmb() __asm volatile ("dmb" : : : "memory")
+
+
+/* Memory Operations */
+#define ldr(adr)	({u32 rval; \
+			  __asm volatile(\
+			    "ldr	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define ldrb(adr)	({u8 rval; \
+			  __asm volatile(\
+			    "ldrb	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define str(adr, val)	__asm volatile(\
+			  "str	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+#define strb(adr, val)	__asm volatile(\
+			  "strb	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+/* Count leading zeroes (clz) */
+#define clz(arg)	({u8 rval; \
+			  __asm volatile(\
+			    "clz	%0,%1"\
+			    : "=r" (rval) : "r" (arg)\
+			  );\
+			  rval;\
+			 })
+
+/* CP15 operations */
+#define mtcp(rn, v)	__asm volatile(\
+			 "mcr " rn "\n"\
+			 : : "r" (v)\
+			);
+
+/*#define mfcp(rn)	({u32 rval; \
+			 __asm volatile(\
+			   "mrc " rn "\n"\
+			   : "=r" (rval)\
+			 );\
+			 rval;\
+			 }) */
+
+#define mfcp(rn, v)	__asm volatile ("mrc " rn : "=r" (v));
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+int mfcpsr (void);
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XPSEUDO_ASM_ICCARM_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/print.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/print.c
new file mode 100644
index 0000000..935862e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/print.c
@@ -0,0 +1,31 @@
+/* print.c -- print a string on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ */
+
+/*
+ * print -- do a raw print of a string
+ */
+#include "xil_printf.h"
+
+void print(const char *ptr)
+{
+#ifdef STDOUT_BASEADDRESS
+  while (*ptr) {
+    outbyte (*ptr++);
+  }
+#else
+(void)ptr;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/putnum.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/putnum.c
new file mode 100644
index 0000000..f0a3573
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/putnum.c
@@ -0,0 +1,59 @@
+/* putnum.c -- put a hex number on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+/*
+ * putnum -- print a 32 bit number in hex
+ */
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Function Prototypes ******************************/
+extern void print (const char8 *ptr);
+void putnum(u32 num);
+
+void putnum(u32 num)
+{
+  char8  buf[9];
+  s32  cnt;
+  s32 i;
+  char8  *ptr;
+  u32  digit;
+  for(i = 0; i<9; i++) {
+	buf[i] = '0';
+  }
+
+  ptr = buf;
+  for (cnt = 7 ; cnt >= 0 ; cnt--) {
+    digit = ((num >> ((u16)cnt * 4U)) & 0xfU);
+
+    if ((digit <= 9U) && (ptr != NULL)) {
+		digit += (u32)'0';
+		*ptr = ((char8) digit);
+		ptr += 1;
+	} else if (ptr != NULL) {
+		digit += ((u32)'a' - (u32)10);
+		*ptr = ((char8)digit);
+		ptr += 1;
+	} else {
+		/*Made for MisraC Compliance*/;
+	}
+  }
+
+  if(ptr != NULL) {
+	  *ptr = (char8) 0;
+  }
+  print (buf);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/sleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/sleep.c
new file mode 100644
index 0000000..fd25328
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/sleep.c
@@ -0,0 +1,79 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************
+*
+* @file sleep.c
+*
+* This function provides a second delay using the Global Timer register in
+* the ARM Cortex A9 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 1.00a ecm/sdm  11/11/09 First release
+* 3.07a sgd      07/05/12 Updated sleep function to make use Global Timer
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+
+/*****************************************************************************/
+/*
+*
+* This API is used to provide delays in seconds
+*
+* @param	seconds requested
+*
+* @return	0 always
+*
+* @note		None.
+*
+****************************************************************************/
+s32 sleep(u32 seconds)
+{
+  XTime tEnd, tCur;
+
+  XTime_GetTime(&tCur);
+  tEnd  = tCur + (((XTime) seconds) * COUNTS_PER_SECOND);
+  do
+  {
+    XTime_GetTime(&tCur);
+  } while (tCur < tEnd);
+
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/sleep.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/sleep.h
new file mode 100644
index 0000000..70dc4a4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/sleep.h
@@ -0,0 +1,49 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#ifndef SLEEP_H
+#define SLEEP_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+s32 usleep(u32 useconds);
+s32 sleep(u32 seconds);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/smc.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/smc.h
new file mode 100644
index 0000000..c9bd3ad
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/smc.h
@@ -0,0 +1,114 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file smc.h
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a sdm  11/03/09 Initial release.
+* 4.2	pkp	 08/04/14 Removed function definition of XSmc_NorInit and XSmc_NorInit
+*					  as smc.c is removed
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+
+#ifndef SMC_H /* prevent circular inclusions */
+#define SMC_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xparameters.h"
+#include "xil_io.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/* Memory controller configuration register offset */
+#define XSMCPSS_MC_STATUS		0x000U	/* Controller status reg, RO */
+#define XSMCPSS_MC_INTERFACE_CONFIG	0x004U	/* Interface config reg, RO */
+#define XSMCPSS_MC_SET_CONFIG		0x008U	/* Set configuration reg, WO */
+#define XSMCPSS_MC_CLR_CONFIG		0x00CU	/* Clear config reg, WO */
+#define XSMCPSS_MC_DIRECT_CMD		0x010U	/* Direct command reg, WO */
+#define XSMCPSS_MC_SET_CYCLES		0x014U	/* Set cycles register, WO */
+#define XSMCPSS_MC_SET_OPMODE		0x018U	/* Set opmode register, WO */
+#define XSMCPSS_MC_REFRESH_PERIOD_0	0x020U	/* Refresh period_0 reg, RW */
+#define XSMCPSS_MC_REFRESH_PERIOD_1	0x024U	/* Refresh period_1 reg, RW */
+
+/* Chip select configuration register offset */
+#define XSMCPSS_CS_IF0_CHIP_0_OFFSET	0x100U	/* Interface 0 chip 0 config */
+#define XSMCPSS_CS_IF0_CHIP_1_OFFSET	0x120U	/* Interface 0 chip 1 config */
+#define XSMCPSS_CS_IF0_CHIP_2_OFFSET	0x140U	/* Interface 0 chip 2 config */
+#define XSMCPSS_CS_IF0_CHIP_3_OFFSET	0x160U	/* Interface 0 chip 3 config */
+#define XSMCPSS_CS_IF1_CHIP_0_OFFSET	0x180U	/* Interface 1 chip 0 config */
+#define XSMCPSS_CS_IF1_CHIP_1_OFFSET	0x1A0U	/* Interface 1 chip 1 config */
+#define XSMCPSS_CS_IF1_CHIP_2_OFFSET	0x1C0U	/* Interface 1 chip 2 config */
+#define XSMCPSS_CS_IF1_CHIP_3_OFFSET	0x1E0U	/* Interface 1 chip 3 config */
+
+/* User configuration register offset */
+#define XSMCPSS_UC_STATUS_OFFSET	0x200U	/* User status reg, RO */
+#define XSMCPSS_UC_CONFIG_OFFSET	0x204U	/* User config reg, WO */
+
+/* Integration test register offset */
+#define XSMCPSS_IT_OFFSET		0xE00U
+
+/* ID configuration register offset */
+#define XSMCPSS_ID_PERIP_0_OFFSET	0xFE0U
+#define XSMCPSS_ID_PERIP_1_OFFSET	0xFE4U
+#define XSMCPSS_ID_PERIP_2_OFFSET	0xFE8U
+#define XSMCPSS_ID_PERIP_3_OFFSET	0xFECU
+#define XSMCPSS_ID_PCELL_0_OFFSET	0xFF0U
+#define XSMCPSS_ID_PCELL_1_OFFSET	0xFF4U
+#define XSMCPSS_ID_PCELL_2_OFFSET	0xFF8U
+#define XSMCPSS_ID_PCELL_3_OFFSET	0xFFCU
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* SMC_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/subdir.mk b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/subdir.mk
new file mode 100644
index 0000000..0754469
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/subdir.mk
@@ -0,0 +1,34 @@
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/print.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/putnum.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/sleep.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/usleep.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/vectors.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_cache.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_exception.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_io.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_misc_psreset_api.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_mmu.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_printf.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xl2cc_counter.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xpm_counter.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xtime_l.c
+#SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/kill.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_exit.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_open.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/isatty.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/lseek.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/_sbrk.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/abort.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/close.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/errno.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/fcntl.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/fstat.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/read.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/unlink.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/write.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/gcc/cpu_init.S
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_assert.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testcache.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testio.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testmem.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xplatform_info.c
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/usleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/usleep.c
new file mode 100644
index 0000000..92b0cdc
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/usleep.c
@@ -0,0 +1,90 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file usleep.c
+*
+* This function provides a microsecond delay using the Global Timer register in
+* the ARM Cortex A9 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 1.00a ecm/sdm  11/11/09 First release
+* 3.07a sgd      07/05/12 Upadted micro sleep function to make use Global Timer
+* 4.2	pkp		 08/04/14 Removed unimplemented nanosleep routine as it is not
+*						  possible to generate timer in nanosecond due to
+*						  limited cpu frequency
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+#include "xreg_cortexa9.h"
+
+/* Global Timer is always clocked at half of the CPU frequency */
+#define COUNTS_PER_USECOND  (XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ / (2U*1000000U))
+
+/*****************************************************************************/
+/**
+*
+* This API gives a delay in microseconds
+*
+* @param	useconds requested
+*
+* @return	0 if the delay can be achieved, -1 if the requested delay
+*		is out of range
+*
+* @note		None.
+*
+****************************************************************************/
+s32 usleep(u32 useconds)
+{
+	XTime tEnd, tCur;
+
+	XTime_GetTime(&tCur);
+	tEnd = tCur + (((XTime) useconds) * COUNTS_PER_USECOND);
+	do
+	{
+		XTime_GetTime(&tCur);
+	} while (tCur < tEnd);
+
+	return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/vectors.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/vectors.c
new file mode 100644
index 0000000..4310fc9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/vectors.c
@@ -0,0 +1,168 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.c
+*
+* This file contains the C level vectors for the ARM Cortex A9 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a ecm  10/20/09 Initial version, moved over from bsp area
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xil_exception.h"
+#include "vectors.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+extern XExc_VectorTableEntry XExc_VectorTable[];
+
+/************************** Function Prototypes ******************************/
+
+
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the FIQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void FIQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_FIQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_FIQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the IRQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void IRQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_IRQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_IRQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the SW Interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void SWInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_SWI_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_SWI_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the DataAbort Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void DataAbortInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_DATA_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_DATA_ABORT_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the PrefetchAbort Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void PrefetchAbortInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_PREFETCH_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_PREFETCH_ABORT_INT].Data);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/vectors.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/vectors.h
new file mode 100644
index 0000000..6766388
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/vectors.h
@@ -0,0 +1,81 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.h
+*
+* This file contains the C level vector prototypes for the ARM Cortex A9 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a ecm  10/20/10 Initial version, moved over from bsp area
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef _VECTORS_H_
+#define _VECTORS_H_
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+void FIQInterrupt(void);
+void IRQInterrupt(void);
+void SWInterrupt(void);
+void DataAbortInterrupt(void);
+void PrefetchAbortInterrupt(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_cache.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_cache.c
new file mode 100644
index 0000000..709eafc
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_cache.c
@@ -0,0 +1,1611 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.c
+*
+* Contains required functions for the ARM cache functionality.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a  ecm 01/29/10 First release
+* 1.00a  ecm 06/24/10 Moved the L1 and L2 specific function prototypes
+*		      		  to xil_cache_mach.h to give access to sophisticated users
+* 3.02a  sdm 04/07/11 Updated Flush/InvalidateRange APIs to flush/invalidate
+*		      		  L1 and L2 caches in a single loop and used dsb, L2 sync
+*		      		  at the end of the loop.
+* 3.04a  sdm 01/02/12 Remove redundant dsb/dmb instructions in cache maintenance
+*		      		  APIs.
+* 3.07a  asa 07/16/12 Corrected the L1 and L2 cache invalidation order.
+* 3.07a  sgd 09/18/12 Corrected the L2 cache enable and disable sequence.
+* 3.10a  srt 04/18/13 Implemented ARM Erratas. Please refer to file
+*		      		  'xil_errata.h' for errata description
+* 3.10a  asa 05/13/13 Modified cache disable APIs. The L2 cache disable
+*			  		  operation was being done with L1 Data cache disabled. This is
+*			  		  fixed so that L2 cache disable operation happens independent of
+*			  		  L1 cache disable operation. This fixes CR #706464.
+*			  		  Changes are done to do a L2 cache sync (poll reg7_?cache_?sync).
+*			  		  This is done to fix the CR #700542.
+* 3.11a  asa 09/23/13 Modified the Xil_DCacheFlushRange and
+*			 		  Xil_DCacheInvalidateRange to fix potential issues. Fixed other
+*			 		  relevant cache APIs to disable and enable back the interrupts.
+*			 		  This fixes CR #663885.
+* 3.11a  asa 09/28/13 Made changes for L2 cache sync operation. It is found
+*			 		  out that for L2 cache flush/clean/invalidation by cache lines
+*			 		  does not need a cache sync as these are atomic nature. Similarly
+*			 		  figured out that for complete L2 cache flush/invalidation by way
+*			 		  we need to wait for some more time in a loop till the status
+*			 		  shows that the cache operation is completed.
+* 4.00	 pkp 24/01/14 Modified Xil_DCacheInvalidateRange to fix the bug. Few
+*			 		  cache lines were missed to invalidate when unaligned address
+*			 		  invalidation was accommodated. That fixes CR #766768.
+*			 		  Also in Xil_L1DCacheInvalidate, while invalidating all L1D cache
+*			 		  stack memory which contains return address was invalidated. So
+*			 		  stack memory was flushed first and then L1D cache is invalidated.
+*			 		  This is done to fix CR #763829
+* 4.01   asa 05/09/14 Made changes in cortexa9/xil_cache.c to fix CR# 798230.
+* 4.02	 pkp 06/27/14 Added notes to Xil_L1DCacheInvalidateRange function for
+*					  explanation of CR#785243
+* 5.00   kvn 12/15/14 Xil_L2CacheInvalidate was modified to fix CR# 838835. L2 Cache
+*					  has stack memory which has return address. Before invalidating
+*					  cache, stack memory was flushed first and L2 Cache is invalidated.
+* 5.01	 pkp 05/12/15 Xil_DCacheInvalidateRange and Xil_DCacheFlushRange is modified
+*					  to remove unnecessary dsb in the APIs. Instead of using dsb
+*					  for L2 Cache, L2CacheSync has been used for each L2 cache line
+*					  and single dsb has been used for L1 cache. Also L2CacheSync is
+*					  added into Xil_L2CacheInvalidateRange API. Xil_L1DCacheInvalidate
+*					  and Xil_L2CacheInvalidate APIs are modified to flush the complete
+*					  stack instead of just System Stack
+*
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xil_cache_l.h"
+#include "xil_io.h"
+#include "xpseudo_asm.h"
+#include "xparameters.h"
+#include "xreg_cortexa9.h"
+#include "xl2cc.h"
+#include "xil_errata.h"
+#include "xil_exception.h"
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+
+#define IRQ_FIQ_MASK 0xC0U	/* Mask IRQ and FIQ interrupts in cpsr */
+
+#ifdef __GNUC__
+	extern s32  _stack_end;
+	extern s32  __undef_stack;
+#endif
+
+/****************************************************************************
+*
+* Access L2 Debug Control Register.
+*
+* @param	Value, value to be written to Debug Control Register.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+#ifdef __GNUC__
+static inline void Xil_L2WriteDebugCtrl(u32 Value)
+#else
+static void Xil_L2WriteDebugCtrl(u32 Value)
+#endif
+{
+#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)
+	Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_DEBUG_CTRL_OFFSET, Value);
+#else
+	(void)(Value);
+#endif
+}
+
+/****************************************************************************
+*
+* Perform L2 Cache Sync Operation.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+#ifdef __GNUC__
+static inline void Xil_L2CacheSync(void)
+#else
+static void Xil_L2CacheSync(void)
+#endif
+{
+#ifdef CONFIG_PL310_ERRATA_753970
+	Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_DUMMY_CACHE_SYNC_OFFSET, 0x0U);
+#else
+	Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_SYNC_OFFSET, 0x0U);
+#endif
+}
+
+/****************************************************************************
+*
+* Enable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheEnable(void)
+{
+	Xil_L1DCacheEnable();
+	Xil_L2CacheEnable();
+}
+
+/****************************************************************************
+*
+* Disable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheDisable(void)
+{
+	Xil_L2CacheDisable();
+	Xil_L1DCacheDisable();
+}
+
+/****************************************************************************
+*
+* Invalidate the entire Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidate(void)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	Xil_L2CacheInvalidate();
+	Xil_L1DCacheInvalidate();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate a Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the modified contents
+* are lost and are NOT written to system memory before the line is
+* invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateLine(u32 adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	Xil_L2CacheInvalidateLine(adr);
+	Xil_L1DCacheInvalidateLine(adr);
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate the Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* In this function, if start address or end address is not aligned to cache-line,
+* particular cache-line containing unaligned start or end address is flush first
+* and then invalidated the others as invalidating the same unaligned cache line
+* may result into loss of data. This issue raises few possibilities.
+*
+*
+* If the address to be invalidated is not cache-line aligned, the
+* following choices are available:
+* 1) Invalidate the cache line when required and do not bother much for the
+* side effects. Though it sounds good, it can result in hard-to-debug issues.
+* The problem is, if some other variable are allocated in the
+* same cache line and had been recently updated (in cache), the invalidation
+* would result in loss of data.
+*
+* 2) Flush the cache line first. This will ensure that if any other variable
+* present in the same cache line and updated recently are flushed out to memory.
+* Then it can safely be invalidated. Again it sounds good, but this can result
+* in issues. For example, when the invalidation happens
+* in a typical ISR (after a DMA transfer has updated the memory), then flushing
+* the cache line means, loosing data that were updated recently before the ISR
+* got invoked.
+*
+* Linux prefers the second one. To have uniform implementation (across standalone
+* and Linux), the second option is implemented.
+* This being the case, follwoing needs to be taken care of:
+* 1) Whenever possible, the addresses must be cache line aligned. Please nore that,
+* not just start address, even the end address must be cache line aligned. If that
+* is taken care of, this will always work.
+* 2) Avoid situations where invalidation has to be done after the data is updated by
+* peripheral/DMA directly into the memory. It is not tough to achieve (may be a bit
+* risky). The common use case to do invalidation is when a DMA happens. Generally
+* for such use cases, buffers can be allocated first and then start the DMA. The
+* practice that needs to be followed here is, immediately after buffer allocation
+* and before starting the DMA, do the invalidation. With this approach, invalidation
+* need not to be done after the DMA transfer is over.
+*
+* This is going to always work if done carefully.
+* However, the concern is, there is no guarantee that invalidate has not needed to be
+* done after DMA is complete. For example, because of some reasons if the first cache
+* line or last cache line (assuming the buffer in question comprises of multiple cache
+* lines) are brought into cache (between the time it is invalidated and DMA completes)
+* because of some speculative prefetching or reading data for a variable present
+* in the same cache line, then we will have to invalidate the cache after DMA is complete.
+*
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateRange(INTPTR adr, u32 len)
+{
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 tempadr = adr;
+	u32 tempend;
+	u32 currmask;
+	volatile u32 *L2CCOffset = (volatile u32 *)(XPS_L2CC_BASEADDR +
+				    XPS_L2CC_CACHE_INVLD_PA_OFFSET);
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0U) {
+		end = tempadr + len;
+		tempend = end;
+		/* Select L1 Data cache in CSSR */
+		mtcp(XREG_CP15_CACHE_SIZE_SEL, 0U);
+
+		if ((tempadr & (cacheline-1U)) != 0U) {
+			tempadr &= (~(cacheline - 1U));
+
+			Xil_L1DCacheFlushLine(tempadr);
+			/* Disable Write-back and line fills */
+			Xil_L2WriteDebugCtrl(0x3U);
+			Xil_L2CacheFlushLine(tempadr);
+			/* Enable Write-back and line fills */
+			Xil_L2WriteDebugCtrl(0x0U);
+			Xil_L2CacheSync();
+			tempadr += cacheline;
+		}
+		if ((tempend & (cacheline-1U)) != 0U) {
+			tempend &= (~(cacheline - 1U));
+
+			Xil_L1DCacheFlushLine(tempend);
+			/* Disable Write-back and line fills */
+			Xil_L2WriteDebugCtrl(0x3U);
+			Xil_L2CacheFlushLine(tempend);
+			/* Enable Write-back and line fills */
+			Xil_L2WriteDebugCtrl(0x0U);
+			Xil_L2CacheSync();
+		}
+
+		while (tempadr < tempend) {
+			/* Invalidate L2 cache line */
+			*L2CCOffset = tempadr;
+			Xil_L2CacheSync();
+#ifdef __GNUC__
+			/* Invalidate L1 Data cache line */
+			__asm__ __volatile__("mcr " \
+			XREG_CP15_INVAL_DC_LINE_MVA_POC :: "r" (tempadr));
+#elif defined (__ICCARM__)
+			__asm volatile ("mcr " \
+			XREG_CP15_INVAL_DC_LINE_MVA_POC :: "r" (tempadr));
+#else
+			{ volatile register u32 Reg
+				__asm(XREG_CP15_INVAL_DC_LINE_MVA_POC);
+			  Reg = tempadr; }
+#endif
+			tempadr += cacheline;
+		}
+	}
+
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush the entire Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheFlush(void)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	Xil_L1DCacheFlush();
+	Xil_L2CacheFlush();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush a Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the entire
+* contents of the cacheline are written to system memory before the
+* line is invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheFlushLine(u32 adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	Xil_L1DCacheFlushLine(adr);
+
+	/* Disable Write-back and line fills */
+	Xil_L2WriteDebugCtrl(0x3U);
+
+	Xil_L2CacheFlushLine(adr);
+
+	/* Enable Write-back and line fills */
+	Xil_L2WriteDebugCtrl(0x0U);
+	Xil_L2CacheSync();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+* Flush the Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the written to system memory first before the
+* before the line is invalidated.
+*
+* @param	Start address of range to be flushed.
+* @param	Length of range to be flushed in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheFlushRange(INTPTR adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 currmask;
+	volatile u32 *L2CCOffset = (volatile u32 *)(XPS_L2CC_BASEADDR +
+				    XPS_L2CC_CACHE_INV_CLN_PA_OFFSET);
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr &= ~(cacheline - 1U);
+
+		while (LocalAddr < end) {
+#ifdef __GNUC__
+			/* Flush L1 Data cache line */
+			__asm__ __volatile__("mcr " \
+			XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC :: "r" (LocalAddr));
+#elif defined (__ICCARM__)
+			__asm volatile ("mcr " \
+			XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC :: "r" (LocalAddr));
+#else
+			{ volatile register u32 Reg
+				__asm(XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC);
+			  Reg = LocalAddr; }
+#endif
+			/* Flush L2 cache line */
+			*L2CCOffset = LocalAddr;
+			Xil_L2CacheSync();
+			LocalAddr += cacheline;
+		}
+	}
+	dsb();
+	mtcpsr(currmask);
+}
+/****************************************************************************
+*
+* Store a Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache and the cacheline is modified (dirty),
+* the entire contents of the cacheline are written to system memory.
+* After the store completes, the cacheline is marked as unmodified
+* (not dirty).
+*
+* @param	Address to be stored.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheStoreLine(u32 adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	Xil_L1DCacheStoreLine(adr);
+	Xil_L2CacheStoreLine(adr);
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Enable the instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheEnable(void)
+{
+	Xil_L1ICacheEnable();
+	Xil_L2CacheEnable();
+}
+
+/****************************************************************************
+*
+* Disable the instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheDisable(void)
+{
+	Xil_L2CacheDisable();
+	Xil_L1ICacheDisable();
+}
+
+/****************************************************************************
+*
+* Invalidate the entire instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheInvalidate(void)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	Xil_L2CacheInvalidate();
+	Xil_L1ICacheInvalidate();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate an instruction cache line.	If the instruction specified by the
+* parameter adr is cached by the instruction cache, the cacheline containing
+* that instruction is invalidated.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_ICacheInvalidateLine(u32 adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	Xil_L2CacheInvalidateLine(adr);
+	Xil_L1ICacheInvalidateLine(adr);
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate the instruction cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated. If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheInvalidateRange(INTPTR adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	volatile u32 *L2CCOffset = (volatile u32 *)(XPS_L2CC_BASEADDR +
+				    XPS_L2CC_CACHE_INVLD_PA_OFFSET);
+
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	if (len != 0U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr = LocalAddr & ~(cacheline - 1U);
+
+		/* Select cache L0 I-cache in CSSR */
+		mtcp(XREG_CP15_CACHE_SIZE_SEL, 1U);
+
+		while (LocalAddr < end) {
+		/* Invalidate L2 cache line */
+		*L2CCOffset = LocalAddr;
+		dsb();
+#ifdef __GNUC__
+			/* Invalidate L1 I-cache line */
+			__asm__ __volatile__("mcr " \
+			XREG_CP15_INVAL_IC_LINE_MVA_POU :: "r" (LocalAddr));
+#elif defined (__ICCARM__)
+			__asm volatile ("mcr " \
+			XREG_CP15_INVAL_IC_LINE_MVA_POU :: "r" (LocalAddr));
+#else
+			{ volatile register u32 Reg
+				__asm(XREG_CP15_INVAL_IC_LINE_MVA_POU);
+			  Reg = LocalAddr; }
+#endif
+
+			LocalAddr += cacheline;
+		}
+	}
+
+	/* Wait for L1 and L2 invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Enable the level 1 Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L1DCacheEnable(void)
+{
+	register u32 CtrlReg;
+
+	/* enable caches only if they are disabled */
+#ifdef __GNUC__
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+#else
+	{ volatile register u32 Reg __asm(XREG_CP15_SYS_CONTROL);
+	  CtrlReg = Reg; }
+#endif
+	if ((CtrlReg & (XREG_CP15_CONTROL_C_BIT)) != 0U) {
+		return;
+	}
+
+	/* clean and invalidate the Data cache */
+	Xil_L1DCacheInvalidate();
+
+	/* enable the Data cache */
+	CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+
+	mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+}
+
+/****************************************************************************
+*
+* Disable the level 1 Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L1DCacheDisable(void)
+{
+	register u32 CtrlReg;
+
+	/* clean and invalidate the Data cache */
+	Xil_L1DCacheFlush();
+
+#ifdef __GNUC__
+	/* disable the Data cache */
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+#else
+	{ volatile register u32 Reg __asm(XREG_CP15_SYS_CONTROL);
+	  CtrlReg = Reg; }
+#endif
+
+	CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+
+	mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+}
+
+/****************************************************************************
+*
+* Invalidate the level 1 Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		In Cortex A9, there is no cp instruction for invalidating
+*		the whole D-cache. This function invalidates each line by
+*		set/way.
+*
+****************************************************************************/
+void Xil_L1DCacheInvalidate(void)
+{
+	register u32 CsidReg, C7Reg;
+	u32 CacheSize, LineSize, NumWays;
+	u32 Way, WayIndex, Set, SetIndex, NumSet;
+	u32 currmask;
+
+#ifdef __GNUC__
+	u32 stack_start,stack_end,stack_size;
+#endif
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+#ifdef __GNUC__
+	stack_end = (u32)&_stack_end;
+	stack_start = (u32)&__undef_stack;
+	stack_size=stack_start-stack_end;
+
+	/*Flush stack memory to save return address*/
+	Xil_DCacheFlushRange(stack_end, stack_size);
+#endif
+
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0U);
+
+#ifdef __GNUC__
+	CsidReg = mfcp(XREG_CP15_CACHE_SIZE_ID);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_CACHE_SIZE_ID, CsidReg);
+#else
+	{ volatile register u32 Reg __asm(XREG_CP15_CACHE_SIZE_ID);
+	  CsidReg = Reg; }
+#endif
+	/* Determine Cache Size */
+	CacheSize = (CsidReg >> 13U) & 0x1FFU;
+	CacheSize +=1U;
+	CacheSize *=128U;    /* to get number of bytes */
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x3ffU) >> 3U;
+	NumWays += 1U;
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x07U) + 4U;
+
+	NumSet = CacheSize/NumWays;
+	NumSet /= (0x00000001U << LineSize);
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex =0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex =0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set;
+#ifdef __GNUC__
+			/* Invalidate by Set/Way */
+			__asm__ __volatile__("mcr " \
+			XREG_CP15_INVAL_DC_LINE_SW :: "r" (C7Reg));
+#elif defined (__ICCARM__)
+			__asm volatile ("mcr " \
+			XREG_CP15_INVAL_DC_LINE_SW :: "r" (C7Reg));
+#else
+			/*mtcp(XREG_CP15_INVAL_DC_LINE_SW, C7Reg), */
+			{ volatile register u32 Reg
+				__asm(XREG_CP15_INVAL_DC_LINE_SW);
+			  Reg = C7Reg; }
+#endif
+			Set += (0x00000001U << LineSize);
+		}
+		Set=0U;
+		Way += 0x40000000U;
+	}
+
+	/* Wait for L1 invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate a level 1 Data cache line. If the byte specified by the address
+* (Addr) is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the modified contents
+* are lost and are NOT written to system memory before the line is
+* invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 5 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_L1DCacheInvalidateLine(u32 adr)
+{
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0U);
+	mtcp(XREG_CP15_INVAL_DC_LINE_MVA_POC, (adr & (~0x1FU)));
+
+	/* Wait for L1 invalidate to complete */
+	dsb();
+}
+
+/****************************************************************************
+*
+* Invalidate the level 1 Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated. If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L1DCacheInvalidateRange(u32 adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr = LocalAddr & ~(cacheline - 1U);
+
+		/* Select cache L0 D-cache in CSSR */
+		mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+
+		while (LocalAddr < end) {
+#ifdef __GNUC__
+			__asm__ __volatile__("mcr " \
+			XREG_CP15_INVAL_DC_LINE_MVA_POC :: "r" (LocalAddr));
+#elif defined (__ICCARM__)
+			__asm volatile ("mcr " \
+			XREG_CP15_INVAL_DC_LINE_MVA_POC :: "r" (LocalAddr));
+#else
+			{ volatile register u32 Reg
+				__asm(XREG_CP15_INVAL_DC_LINE_MVA_POC);
+			  Reg = LocalAddr; }
+#endif
+			LocalAddr += cacheline;
+		}
+	}
+
+	/* Wait for L1 invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush the level 1 Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		In Cortex A9, there is no cp instruction for flushing
+*		the whole D-cache. Need to flush each line.
+*
+****************************************************************************/
+void Xil_L1DCacheFlush(void)
+{
+	register u32 CsidReg, C7Reg;
+	u32 CacheSize, LineSize, NumWays;
+	u32 Way;
+	u32 WayIndex, Set, SetIndex, NumSet;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+
+#ifdef __GNUC__
+	CsidReg = mfcp(XREG_CP15_CACHE_SIZE_ID);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_CACHE_SIZE_ID, CsidReg);
+#else
+	{ volatile register u32 Reg __asm(XREG_CP15_CACHE_SIZE_ID);
+	  CsidReg = Reg; }
+#endif
+
+	/* Determine Cache Size */
+
+	CacheSize = (CsidReg >> 13U) & 0x1FFU;
+	CacheSize +=1U;
+	CacheSize *=128U;    /* to get number of bytes */
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x3ffU) >> 3U;
+	NumWays += 1U;
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x07U) + 4U;
+
+	NumSet = CacheSize/NumWays;
+	NumSet /= (0x00000001U << LineSize);
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex =0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex =0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set;
+			/* Flush by Set/Way */
+#ifdef __GNUC__
+			__asm__ __volatile__("mcr " \
+			XREG_CP15_CLEAN_INVAL_DC_LINE_SW :: "r" (C7Reg));
+#elif defined (__ICCARM__)
+			__asm volatile ("mcr " \
+			XREG_CP15_CLEAN_INVAL_DC_LINE_SW :: "r" (C7Reg));
+#else
+			{ volatile register u32 Reg
+				__asm(XREG_CP15_CLEAN_INVAL_DC_LINE_SW);
+			  Reg = C7Reg; }
+#endif
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += 0x40000000U;
+	}
+
+	/* Wait for L1 flush to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush a level 1 Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the entire
+* contents of the cacheline are written to system memory before the
+* line is invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 5 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_L1DCacheFlushLine(u32 adr)
+{
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0U);
+	mtcp(XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC, (adr & (~0x1FU)));
+
+	/* Wait for L1 flush to complete */
+	dsb();
+}
+
+/****************************************************************************
+* Flush the level 1  Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the written to system memory first before the
+* before the line is invalidated.
+*
+* @param	Start address of range to be flushed.
+* @param	Length of range to be flushed in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L1DCacheFlushRange(u32 adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr = LocalAddr & ~(cacheline - 1U);
+
+		/* Select cache L0 D-cache in CSSR */
+		mtcp(XREG_CP15_CACHE_SIZE_SEL, 0U);
+
+		while (LocalAddr < end) {
+#ifdef __GNUC__
+			__asm__ __volatile__("mcr " \
+			XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC :: "r" (LocalAddr));
+#elif defined (__ICCARM__)
+			__asm volatile ("mcr " \
+			XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC :: "r" (LocalAddr));
+#else
+			{ volatile register u32 Reg
+				__asm(XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC);
+			  Reg = LocalAddr; }
+#endif
+			LocalAddr += cacheline;
+		}
+	}
+
+	/* Wait for L1 flush to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Store a level 1  Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache and the cacheline is modified (dirty),
+* the entire contents of the cacheline are written to system memory.
+* After the store completes, the cacheline is marked as unmodified
+* (not dirty).
+*
+* @param	Address to be stored.
+*
+* @return	None.
+*
+* @note		The bottom 5 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_L1DCacheStoreLine(u32 adr)
+{
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0U);
+	mtcp(XREG_CP15_CLEAN_DC_LINE_MVA_POC, (adr & (~0x1FU)));
+
+	/* Wait for L1 store to complete */
+	dsb();
+}
+
+/****************************************************************************
+*
+* Enable the level 1 instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L1ICacheEnable(void)
+{
+	register u32 CtrlReg;
+
+	/* enable caches only if they are disabled */
+#ifdef __GNUC__
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+#else
+	{ volatile register u32 Reg __asm(XREG_CP15_SYS_CONTROL);
+	  CtrlReg = Reg; }
+#endif
+	if ((CtrlReg & (XREG_CP15_CONTROL_I_BIT)) != 0U) {
+		return;
+	}
+
+	/* invalidate the instruction cache */
+	mtcp(XREG_CP15_INVAL_IC_POU, 0U);
+
+	/* enable the instruction cache */
+	CtrlReg |= (XREG_CP15_CONTROL_I_BIT);
+
+	mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+}
+
+/****************************************************************************
+*
+* Disable level 1 the instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L1ICacheDisable(void)
+{
+	register u32 CtrlReg;
+
+	dsb();
+
+	/* invalidate the instruction cache */
+	mtcp(XREG_CP15_INVAL_IC_POU, 0U);
+
+	/* disable the instruction cache */
+#ifdef __GNUC__
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+#else
+	{ volatile register u32 Reg __asm(XREG_CP15_SYS_CONTROL);
+	  CtrlReg = Reg; }
+#endif
+	CtrlReg &= ~(XREG_CP15_CONTROL_I_BIT);
+
+	mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+}
+
+/****************************************************************************
+*
+* Invalidate the entire level 1 instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L1ICacheInvalidate(void)
+{
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 1U);
+	/* invalidate the instruction cache */
+	mtcp(XREG_CP15_INVAL_IC_POU, 0U);
+
+	/* Wait for L1 invalidate to complete */
+	dsb();
+}
+
+/****************************************************************************
+*
+* Invalidate a level 1  instruction cache line.	If the instruction specified by
+* the parameter adr is cached by the instruction cache, the cacheline containing
+* that instruction is invalidated.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		The bottom 5 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_L1ICacheInvalidateLine(u32 adr)
+{
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 1U);
+	mtcp(XREG_CP15_INVAL_IC_LINE_MVA_POU, (adr & (~0x1FU)));
+
+	/* Wait for L1 invalidate to complete */
+	dsb();
+}
+
+/****************************************************************************
+*
+* Invalidate the level 1 instruction cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L1ICacheInvalidateRange(u32 adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr = LocalAddr & ~(cacheline - 1U);
+
+		/* Select cache L0 I-cache in CSSR */
+		mtcp(XREG_CP15_CACHE_SIZE_SEL, 1U);
+
+		while (LocalAddr < end) {
+#ifdef __GNUC__
+			__asm__ __volatile__("mcr " \
+			XREG_CP15_INVAL_IC_LINE_MVA_POU :: "r" (LocalAddr));
+#elif defined (__ICCARM__)
+			__asm volatile ("mcr " \
+			XREG_CP15_INVAL_IC_LINE_MVA_POU :: "r" (LocalAddr));
+#else
+			{ volatile register u32 Reg
+				__asm(XREG_CP15_INVAL_IC_LINE_MVA_POU);
+			  Reg = LocalAddr; }
+#endif
+			LocalAddr += cacheline;
+		}
+	}
+
+	/* Wait for L1 invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Enable the L2 cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L2CacheEnable(void)
+{
+	register u32 L2CCReg;
+
+	L2CCReg = Xil_In32(XPS_L2CC_BASEADDR + XPS_L2CC_CNTRL_OFFSET);
+
+	/* only enable if L2CC is currently disabled */
+	if ((L2CCReg & 0x01U) == 0U) {
+		/* set up the way size and latencies */
+		L2CCReg = Xil_In32(XPS_L2CC_BASEADDR +
+				   XPS_L2CC_AUX_CNTRL_OFFSET);
+		L2CCReg &= XPS_L2CC_AUX_REG_ZERO_MASK;
+		L2CCReg |= XPS_L2CC_AUX_REG_DEFAULT_MASK;
+		Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_AUX_CNTRL_OFFSET,
+			  L2CCReg);
+		Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_TAG_RAM_CNTRL_OFFSET,
+			  XPS_L2CC_TAG_RAM_DEFAULT_MASK);
+		Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_DATA_RAM_CNTRL_OFFSET,
+			  XPS_L2CC_DATA_RAM_DEFAULT_MASK);
+
+		/* Clear the pending interrupts */
+		L2CCReg = Xil_In32(XPS_L2CC_BASEADDR +
+				   XPS_L2CC_ISR_OFFSET);
+		Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_IAR_OFFSET, L2CCReg);
+
+		Xil_L2CacheInvalidate();
+		/* Enable the L2CC */
+		L2CCReg = Xil_In32(XPS_L2CC_BASEADDR +
+				   XPS_L2CC_CNTRL_OFFSET);
+		Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_CNTRL_OFFSET,
+			  (L2CCReg | (0x01U)));
+
+        Xil_L2CacheSync();
+        /* synchronize the processor */
+	    dsb();
+
+    }
+}
+
+/****************************************************************************
+*
+* Disable the L2 cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L2CacheDisable(void)
+{
+    register u32 L2CCReg;
+
+	L2CCReg = Xil_In32(XPS_L2CC_BASEADDR + XPS_L2CC_CNTRL_OFFSET);
+
+    if((L2CCReg & 0x1U) != 0U) {
+
+        /* Clean and Invalidate L2 Cache */
+        Xil_L2CacheFlush();
+
+	    /* Disable the L2CC */
+	L2CCReg = Xil_In32(XPS_L2CC_BASEADDR + XPS_L2CC_CNTRL_OFFSET);
+	    Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_CNTRL_OFFSET,
+		      (L2CCReg & (~0x01U)));
+		/* Wait for the cache operations to complete */
+
+		dsb();
+    }
+}
+
+/****************************************************************************
+*
+* Invalidate the L2 cache. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the modified contents
+* are lost and are NOT written to system memory before the line is
+* invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_L2CacheInvalidate(void)
+{
+	#ifdef __GNUC__
+	u32 stack_start,stack_end,stack_size;
+	stack_end = (u32)&_stack_end;
+	stack_start = (u32)&__undef_stack;
+	stack_size=stack_start-stack_end;
+
+	/*Flush stack memory to save return address*/
+	Xil_DCacheFlushRange(stack_end, stack_size);
+	#endif
+	u32 ResultDCache;
+	/* Invalidate the caches */
+	Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_INVLD_WAY_OFFSET,
+		  0x0000FFFFU);
+	ResultDCache = Xil_In32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_INVLD_WAY_OFFSET)
+							& 0x0000FFFFU;
+	while(ResultDCache != (u32)0U) {
+		ResultDCache = Xil_In32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_INVLD_WAY_OFFSET)
+							& 0x0000FFFFU;
+	}
+
+	/* Wait for the invalidate to complete */
+	Xil_L2CacheSync();
+
+	/* synchronize the processor */
+	dsb();
+}
+
+/****************************************************************************
+*
+* Invalidate a level 2 cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the modified contents
+* are lost and are NOT written to system memory before the line is
+* invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_L2CacheInvalidateLine(u32 adr)
+{
+	Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_INVLD_PA_OFFSET, (u32)adr);
+	/* synchronize the processor */
+	dsb();
+}
+
+/****************************************************************************
+*
+* Invalidate the level 2 cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L2CacheInvalidateRange(u32 adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	volatile u32 *L2CCOffset = (volatile u32 *)(XPS_L2CC_BASEADDR +
+				    XPS_L2CC_CACHE_INVLD_PA_OFFSET);
+
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr = LocalAddr & ~(cacheline - 1U);
+
+		/* Disable Write-back and line fills */
+		Xil_L2WriteDebugCtrl(0x3U);
+
+		while (LocalAddr < end) {
+			*L2CCOffset = LocalAddr;
+			Xil_L2CacheSync();
+			LocalAddr += cacheline;
+		}
+
+		/* Enable Write-back and line fills */
+		Xil_L2WriteDebugCtrl(0x0U);
+	}
+
+	/* synchronize the processor */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush the L2 cache. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated. If the cacheline is modified (dirty), the entire
+* contents of the cacheline are written to system memory before the
+* line is invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_L2CacheFlush(void)
+{
+	u16 L2CCReg;
+	u32 ResultL2Cache;
+
+	/* Flush the caches */
+
+	/* Disable Write-back and line fills */
+	Xil_L2WriteDebugCtrl(0x3U);
+
+	Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_INV_CLN_WAY_OFFSET,
+		  0x0000FFFFU);
+	ResultL2Cache = Xil_In32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_INV_CLN_WAY_OFFSET)
+							& 0x0000FFFFU;
+
+	while(ResultL2Cache != (u32)0U) {
+		ResultL2Cache = Xil_In32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_INV_CLN_WAY_OFFSET)
+									& 0x0000FFFFU;
+	}
+
+	Xil_L2CacheSync();
+	/* Enable Write-back and line fills */
+	Xil_L2WriteDebugCtrl(0x0U);
+
+	/* synchronize the processor */
+	dsb();
+}
+
+/****************************************************************************
+*
+* Flush a level 2 cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated. If the cacheline is modified (dirty), the entire
+* contents of the cacheline are written to system memory before the
+* line is invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_L2CacheFlushLine(u32 adr)
+{
+#ifdef CONFIG_PL310_ERRATA_588369
+	Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_CLEAN_PA_OFFSET, adr);
+	Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_INVLD_PA_OFFSET, adr);
+#else
+	Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_INV_CLN_PA_OFFSET, adr);
+#endif
+	/* synchronize the processor */
+	dsb();
+}
+
+/****************************************************************************
+* Flush the level 2 cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the written to system memory first before the
+* before the line is invalidated.
+*
+* @param	Start address of range to be flushed.
+* @param	Length of range to be flushed in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_L2CacheFlushRange(u32 adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	volatile u32 *L2CCOffset = (volatile u32 *)(XPS_L2CC_BASEADDR +
+				    XPS_L2CC_CACHE_INV_CLN_PA_OFFSET);
+
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	if (len != 0U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr = LocalAddr & ~(cacheline - 1U);
+
+		/* Disable Write-back and line fills */
+		Xil_L2WriteDebugCtrl(0x3U);
+
+		while (LocalAddr < end) {
+			*L2CCOffset = LocalAddr;
+			Xil_L2CacheSync();
+			LocalAddr += cacheline;
+		}
+
+		/* Enable Write-back and line fills */
+		Xil_L2WriteDebugCtrl(0x0U);
+	}
+	/* synchronize the processor */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Store a level 2 cache line. If the byte specified by the address (adr)
+* is cached by the Data cache and the cacheline is modified (dirty),
+* the entire contents of the cacheline are written to system memory.
+* After the store completes, the cacheline is marked as unmodified
+* (not dirty).
+*
+* @param	Address to be stored.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_L2CacheStoreLine(u32 adr)
+{
+	Xil_Out32(XPS_L2CC_BASEADDR + XPS_L2CC_CACHE_CLEAN_PA_OFFSET, adr);
+	/* synchronize the processor */
+	dsb();
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_cache.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_cache.h
new file mode 100644
index 0000000..3812dc2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_cache.h
@@ -0,0 +1,75 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.h
+*
+* Contains required functions for the ARM cache functionality
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a ecm  01/29/10 First release
+* 3.04a sdm  01/02/12 Remove redundant dsb/dmb instructions in cache maintenance
+*		      APIs.
+* 

+*
+******************************************************************************/
+#ifndef XIL_CACHE_H
+#define XIL_CACHE_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void Xil_DCacheEnable(void);
+void Xil_DCacheDisable(void);
+void Xil_DCacheInvalidate(void);
+void Xil_DCacheInvalidateRange(INTPTR adr, u32 len);
+void Xil_DCacheFlush(void);
+void Xil_DCacheFlushRange(INTPTR adr, u32 len);
+
+void Xil_ICacheEnable(void);
+void Xil_ICacheDisable(void);
+void Xil_ICacheInvalidate(void);
+void Xil_ICacheInvalidateRange(INTPTR adr, u32 len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_cache_l.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_cache_l.h
new file mode 100644
index 0000000..bf00e39
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_cache_l.h
@@ -0,0 +1,95 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache_l.h
+*
+* Contains L1 and L2 specific functions for the ARM cache functionality
+* used by xcache.c. This functionality is being made available here for
+* more sophisticated users.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a ecm  01/24/10 First release
+* 

+*
+******************************************************************************/
+#ifndef XIL_CACHE_MACH_H
+#define XIL_CACHE_MACH_H
+
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Function Prototypes ******************************/
+
+void Xil_DCacheInvalidateLine(u32 adr);
+void Xil_DCacheFlushLine(u32 adr);
+void Xil_DCacheStoreLine(u32 adr);
+void Xil_ICacheInvalidateLine(u32 adr);
+
+void Xil_L1DCacheEnable(void);
+void Xil_L1DCacheDisable(void);
+void Xil_L1DCacheInvalidate(void);
+void Xil_L1DCacheInvalidateLine(u32 adr);
+void Xil_L1DCacheInvalidateRange(u32 adr, u32 len);
+void Xil_L1DCacheFlush(void);
+void Xil_L1DCacheFlushLine(u32 adr);
+void Xil_L1DCacheFlushRange(u32 adr, u32 len);
+void Xil_L1DCacheStoreLine(u32 adr);
+
+void Xil_L1ICacheEnable(void);
+void Xil_L1ICacheDisable(void);
+void Xil_L1ICacheInvalidate(void);
+void Xil_L1ICacheInvalidateLine(u32 adr);
+void Xil_L1ICacheInvalidateRange(u32 adr, u32 len);
+
+void Xil_L2CacheEnable(void);
+void Xil_L2CacheDisable(void);
+void Xil_L2CacheInvalidate(void);
+void Xil_L2CacheInvalidateLine(u32 adr);
+void Xil_L2CacheInvalidateRange(u32 adr, u32 len);
+void Xil_L2CacheFlush(void);
+void Xil_L2CacheFlushLine(u32 adr);
+void Xil_L2CacheFlushRange(u32 adr, u32 len);
+void Xil_L2CacheStoreLine(u32 adr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_errata.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_errata.h
new file mode 100644
index 0000000..10da908
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_errata.h
@@ -0,0 +1,109 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_errata.h
+*
+* This header file contains Cortex A9 and PL310 Errata definitions.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a srt  04/18/13 First release
+* 

+*
+******************************************************************************/
+#ifndef XIL_ERRATA_H
+#define XIL_ERRATA_H
+
+#define ENABLE_ARM_ERRATA 1
+
+#ifdef ENABLE_ARM_ERRATA
+/* Cortex A9 ARM Errata */
+
+/*
+ *  Errata No: 	 742230
+ *  Description: DMB operation may be faulty
+ */
+#define CONFIG_ARM_ERRATA_742230 1
+
+/*
+ *  Errata No: 	 743622
+ *  Description: Faulty hazard checking in the Store Buffer may lead
+ *	         to data corruption.
+ */
+#define CONFIG_ARM_ERRATA_743622 1
+
+/*
+ *  Errata No: 	 775420
+ *  Description: A data cache maintenance operation which aborts,
+ *		 might lead to deadlock
+ */
+#define CONFIG_ARM_ERRATA_775420 1
+
+/*
+ *  Errata No: 	 794073
+ *  Description: Speculative instruction fetches with MMU disabled
+ *               might not comply with architectural requirements
+ */
+#define CONFIG_ARM_ERRATA_794073 1
+
+
+/* PL310 L2 Cache Errata */
+
+/*
+ *  Errata No: 	 588369
+ *  Description: Clean & Invalidate maintenance operations do not
+ *	   	 invalidate clean lines
+ */
+#define CONFIG_PL310_ERRATA_588369 1
+
+/*
+ *  Errata No: 	 727915
+ *  Description: Background Clean and Invalidate by Way operation
+ *		 can cause data corruption
+ */
+#define CONFIG_PL310_ERRATA_727915 1
+
+/*
+ *  Errata No: 	 753970
+ *  Description: Cache sync operation may be faulty
+ */
+#define CONFIG_PL310_ERRATA_753970 1
+
+#endif  /* ENABLE_ARM_ERRATA */
+
+#endif  /* XIL_ERRATA_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_exception.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_exception.c
new file mode 100644
index 0000000..acd2f7f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_exception.c
@@ -0,0 +1,252 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xil_exception.c
+*
+* This file contains low-level driver functions for the Cortex A9 exception
+* Handler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 1.00a ecm/sdm  11/04/09 First release
+* 3.05a sdm		 02/02/12 Updated to resiter a null handler only if a handler
+*			  		      is not already registered
+* 4.2   pkp		 06/19/14 Added default exception handlers for data abort and
+*						  prefetch abort using handlers called
+*						  DataAbortHandler and PrefetchAbortHandler respectively
+*						  Both handlers are registers in vector table entries
+*						  using XExc_VectorTable
+* 5.1	pkp		 05/13/15 Added debugging message to print address of instruction
+*						  causing data abort and prefetch abort
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+#include "xpseudo_asm.h"
+#include "xdebug.h"
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Function Prototypes *****************************/
+static void Xil_ExceptionNullHandler(void *Data);
+/************************** Variable Definitions *****************************/
+/*
+ * Exception vector table to store handlers for each exception vector.
+ */
+XExc_VectorTableEntry XExc_VectorTable[XIL_EXCEPTION_ID_LAST + 1] =
+{
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_PrefetchAbortHandler, NULL},
+	{Xil_DataAbortHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+};
+
+u32 DataAbortAddr;       /* Address of instruction causing data abort */
+u32 PrefetchAbortAddr;   /* Address of instruction causing prefetch abort */
+
+/*****************************************************************************/
+
+/****************************************************************************/
+/**
+*
+* This function is a stub Handler that is the default Handler that gets called
+* if the application has not setup a Handler for a specific  exception. The
+* function interface has to match the interface specified for a Handler even
+* though none of the arguments are used.
+*
+* @param	Data is unused by this function.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void Xil_ExceptionNullHandler(void *Data)
+{
+	(void *)Data;
+DieLoop: goto DieLoop;
+}
+
+/****************************************************************************/
+/**
+* The function is a common API used to initialize exception handlers across all
+* processors supported. For ARM CortexA9, the exception handlers are being
+* initialized statically and hence this function does not do anything.
+* However, it is still present to avoid any compilation issues in case an
+* application uses this API and also to take care of backward compatibility
+* issues (in earlier versions of BSPs, this API was being used to initialize
+* exception handlers).
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xil_ExceptionInit(void)
+{
+	return;
+}
+
+/*****************************************************************************/
+/**
+*
+* Makes the connection between the Id of the exception source and the
+* associated Handler that is to run when the exception is recognized. The
+* argument provided in this call as the Data is used as the argument
+* for the Handler when it is called.
+*
+* @param	exception_id contains the ID of the exception source and should
+*		be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+		See xil_exception_l.h for further information.
+* @param	Handler to the Handler for that exception.
+* @param	Data is a reference to Data that will be passed to the
+*		Handler when it gets called.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRegisterHandler(u32 Exception_id,
+				    Xil_ExceptionHandler Handler,
+				    void *Data)
+{
+	XExc_VectorTable[Exception_id].Handler = Handler;
+	XExc_VectorTable[Exception_id].Data = Data;
+}
+
+/*****************************************************************************/
+/**
+*
+* Removes the Handler for a specific exception Id. The stub Handler is then
+* registered for this exception Id.
+*
+* @param	exception_id contains the ID of the exception source and should
+*		be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+*		See xil_exception_l.h for further information.
+
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRemoveHandler(u32 Exception_id)
+{
+	Xil_ExceptionRegisterHandler(Exception_id,
+				       Xil_ExceptionNullHandler,
+				       NULL);
+}
+
+
+/*****************************************************************************/
+/**
+*
+* Default Data abort handler which prints data fault status register through
+* which information about data fault can be acquired
+*
+* @param	None
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+
+void Xil_DataAbortHandler(void *CallBackRef){
+	u32 FaultStatus;
+	#ifdef __GNUC__
+		FaultStatus = mfcp(XREG_CP15_DATA_FAULT_STATUS);
+	#elif defined (__ICCARM__)
+		mfcp(XREG_CP15_DATA_FAULT_STATUS,FaultStatus);
+	#else
+		{ volatile register u32 Reg __asm(XREG_CP15_DATA_FAULT_STATUS);
+	  FaultStatus = Reg; }
+	#endif
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Data abort with Data Fault Status Register  %x\n",FaultStatus);
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Address of Instrcution causing Data abort %x\n",DataAbortAddr);
+	while(1) {
+		;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* Default Prefetch abort handler which prints prefetch fault status register through
+* which information about instruction prefetch fault can be acquired
+*
+* @param	None
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_PrefetchAbortHandler(void *CallBackRef){
+	u32 FaultStatus;
+	#ifdef __GNUC__
+		FaultStatus = mfcp(XREG_CP15_INST_FAULT_STATUS);
+	#elif defined (__ICCARM__)
+		mfcp(XREG_CP15_INST_FAULT_STATUS,FaultStatus);
+	#else
+		{ volatile register u32 Reg __asm(XREG_CP15_INST_FAULT_STATUS);
+	  FaultStatus = Reg; }
+	#endif
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Prefetch abort with Instruction Fault Status Register  %x\n",FaultStatus);
+	xdbg_printf(XDBG_DEBUG_GENERAL, "Address of Instrcution causing Prefetch abort %x\n",PrefetchAbortAddr);
+	while(1) {
+		;
+	}
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_exception.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_exception.h
new file mode 100644
index 0000000..a003d5c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_exception.h
@@ -0,0 +1,234 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_exception.h
+*
+* This header file contains ARM Cortex A9 specific exception related APIs.
+* For exception related functions that can be used across all Xilinx supported
+* processors, please use xil_exception.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 1.00a ecm/sdm  11/04/09 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_EXCEPTION_H /* prevent circular inclusions */
+#define XIL_EXCEPTION_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions ****************************/
+
+#define XIL_EXCEPTION_FIQ	XREG_CPSR_FIQ_ENABLE
+#define XIL_EXCEPTION_IRQ	XREG_CPSR_IRQ_ENABLE
+#define XIL_EXCEPTION_ALL	(XREG_CPSR_FIQ_ENABLE | XREG_CPSR_IRQ_ENABLE)
+
+#define XIL_EXCEPTION_ID_FIRST			0U
+#define XIL_EXCEPTION_ID_RESET			0U
+#define XIL_EXCEPTION_ID_UNDEFINED_INT		1U
+#define XIL_EXCEPTION_ID_SWI_INT		2U
+#define XIL_EXCEPTION_ID_PREFETCH_ABORT_INT	3U
+#define XIL_EXCEPTION_ID_DATA_ABORT_INT		4U
+#define XIL_EXCEPTION_ID_IRQ_INT		5U
+#define XIL_EXCEPTION_ID_FIQ_INT		6U
+#define XIL_EXCEPTION_ID_LAST			6U
+
+/*
+ * XIL_EXCEPTION_ID_INT is defined for all Xilinx processors.
+ */
+#define XIL_EXCEPTION_ID_INT	XIL_EXCEPTION_ID_IRQ_INT
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef is the exception handler function.
+ */
+typedef void (*Xil_ExceptionHandler)(void *data);
+typedef void (*Xil_InterruptHandler)(void *data);
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* Enable Exceptions.
+*
+* @param	Mask for exceptions to be enabled.
+*
+* @return	None.
+*
+* @note		If bit is 0, exception is enabled.
+*		C-Style signature: void Xil_ExceptionEnableMask(Mask)
+*
+******************************************************************************/
+#ifdef __GNUC__
+#define Xil_ExceptionEnableMask(Mask)	\
+		mtcpsr(mfcpsr() & ~ ((Mask) & XIL_EXCEPTION_ALL))
+#elif defined (__ICCARM__)
+#define Xil_ExceptionEnableMask(Mask)	\
+		mtcpsr(mfcpsr() & ~ ((Mask) & XIL_EXCEPTION_ALL))
+#else
+#define Xil_ExceptionEnableMask(Mask)	\
+		{								\
+		  register u32 Reg __asm("cpsr"); \
+		  mtcpsr((Reg) & (~((Mask) & XIL_EXCEPTION_ALL))); \
+		}
+#endif
+
+/****************************************************************************/
+/**
+* Enable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionEnable() \
+		Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ)
+
+/****************************************************************************/
+/**
+* Disable Exceptions.
+*
+* @param	Mask for exceptions to be enabled.
+*
+* @return	None.
+*
+* @note		If bit is 1, exception is disabled.
+*		C-Style signature: Xil_ExceptionDisableMask(Mask)
+*
+******************************************************************************/
+#ifdef __GNUC__
+#define Xil_ExceptionDisableMask(Mask)	\
+		mtcpsr(mfcpsr() | ((Mask) & XIL_EXCEPTION_ALL))
+#elif defined (__ICCARM__)
+#define Xil_ExceptionDisableMask(Mask)	\
+		mtcpsr(mfcpsr() | (Mask & XIL_EXCEPTION_ALL))
+#else
+#define Xil_ExceptionDisableMask(Mask)	\
+		{									\
+		  register u32 Reg __asm("cpsr"); \
+		  mtcpsr((Reg) | ((Mask) & XIL_EXCEPTION_ALL)); \
+		}
+#endif
+
+/****************************************************************************/
+/**
+* Disable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionDisable() \
+		Xil_ExceptionDisableMask(XIL_EXCEPTION_IRQ)
+
+/****************************************************************************/
+/**
+* Enable nested interrupts by clearing the I and F bits it CPSR
+*
+* @return   None.
+*
+* @note     This macro is supposed to be used from interrupt handlers. In the
+*			interrupt handler the interrupts are disabled by default (I and F
+*			are 1). To allow nesting of interrupts, this macro should be
+*			used. It clears the I and F bits by changing the ARM mode to
+*			system mode. Once these bits are cleared and provided the
+*			preemption of interrupt conditions are met in the GIC, nesting of
+*			interrupts will start happening.
+*			Caution: This macro must be used with caution. Before calling this
+*			macro, the user must ensure that the source of the current IRQ
+*			is appropriately cleared. Otherwise, as soon as we clear the I and
+*			F bits, there can be an infinite loop of interrupts with an
+*			eventual crash (all the stack space getting consumed).
+******************************************************************************/
+#define Xil_EnableNestedInterrupts() \
+		__asm__ __volatile__ ("mrs     lr, spsr");  \
+		__asm__ __volatile__ ("stmfd   sp!, {lr}"); \
+		__asm__ __volatile__ ("msr     cpsr_c, #0x1F"); \
+		__asm__ __volatile__ ("stmfd   sp!, {lr}");
+
+/****************************************************************************/
+/**
+* Disable the nested interrupts by setting the I and F bits.
+*
+* @return   None.
+*
+* @note     This macro is meant to be called in the interrupt service routines.
+*			This macro cannot be used independently. It can only be used when
+*			nesting of interrupts have been enabled by using the macro
+*			Xil_EnableNestedInterrupts(). In a typical flow, the user first
+*			calls the Xil_EnableNestedInterrupts in the ISR at the appropriate
+*			point. The user then must call this macro before exiting the interrupt
+*			service routine. This macro puts the ARM back in IRQ/FIQ mode and
+*			hence sets back the I and F bits.
+******************************************************************************/
+#define Xil_DisableNestedInterrupts() \
+		__asm__ __volatile__ ("ldmfd   sp!, {lr}");   \
+		__asm__ __volatile__ ("msr     cpsr_c, #0x92"); \
+		__asm__ __volatile__ ("ldmfd   sp!, {lr}"); \
+		__asm__ __volatile__ ("msr     spsr_cxsf, lr");
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+extern void Xil_ExceptionRegisterHandler(u32 Exception_id,
+					 Xil_ExceptionHandler Handler,
+					 void *Data);
+
+extern void Xil_ExceptionRemoveHandler(u32 Exception_id);
+
+extern void Xil_ExceptionInit(void);
+extern void Xil_DataAbortHandler(void *CallBackRef);
+extern void Xil_PrefetchAbortHandler(void *CallBackRef);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_EXCEPTION_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_io.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_io.c
new file mode 100644
index 0000000..69b7aa6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_io.c
@@ -0,0 +1,102 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.c
+*
+* Contains I/O functions for memory-mapped or non-memory-mapped I/O
+* architectures.
+*
+* @note
+*
+* This file contains architecture-dependent code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/*****************************************************************************/
+/**
+*
+* @brief    Perform a 16-bit endian converion.
+*
+* @param	Data: 16 bit value to be converted
+*
+* @return	16 bit Data with converted endianess
+*
+******************************************************************************/
+u16 Xil_EndianSwap16(u16 Data)
+{
+	return (u16) (((Data & 0xFF00U) >> 8U) | ((Data & 0x00FFU) << 8U));
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Perform a 32-bit endian converion.
+*
+* @param	Data: 32 bit value to be converted
+*
+* @return	32 bit data with converted endianess
+*
+******************************************************************************/
+u32 Xil_EndianSwap32(u32 Data)
+{
+	u16 LoWord;
+	u16 HiWord;
+
+	/* get each of the half words from the 32 bit word */
+
+	LoWord = (u16) (Data & 0x0000FFFFU);
+	HiWord = (u16) ((Data & 0xFFFF0000U) >> 16U);
+
+	/* byte swap each of the 16 bit half words */
+
+	LoWord = (((LoWord & 0xFF00U) >> 8U) | ((LoWord & 0x00FFU) << 8U));
+	HiWord = (((HiWord & 0xFF00U) >> 8U) | ((HiWord & 0x00FFU) << 8U));
+
+	/* swap the half words before returning the value */
+
+	return ((((u32)LoWord) << (u32)16U) | (u32)HiWord);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_io.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_io.h
new file mode 100644
index 0000000..5b7dc52
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_io.h
@@ -0,0 +1,345 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2016 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.h
+*
+* @addtogroup common_io_interfacing_apis Register IO interfacing APIs
+*
+* The xil_io.h file contains the interface for the general I/O component, which
+* encapsulates the Input/Output functions for the processors that do not
+* require any special I/O handling.
+*
+* @{
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 6.00  mus      08/19/16 Remove checking of __LITTLE_ENDIAN__ flag for
+*                         ARM processors
+* 

+******************************************************************************/
+
+#ifndef XIL_IO_H           /* prevent circular inclusions */
+#define XIL_IO_H           /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_printf.h"
+
+#if defined (__MICROBLAZE__)
+#include "mb_interface.h"
+#else
+#include "xpseudo_asm.h"
+#endif
+
+/************************** Function Prototypes ******************************/
+u16 Xil_EndianSwap16(u16 Data);
+u32 Xil_EndianSwap32(u32 Data);
+#ifdef ENABLE_SAFETY
+extern u32 XStl_RegUpdate(u32 RegAddr, u32 RegVal);
+#endif
+
+/***************** Macros (Inline Functions) Definitions *********************/
+#if defined __GNUC__
+#if defined (__MICROBLAZE__)
+#  define INST_SYNC		mbar(0)
+#  define DATA_SYNC		mbar(1)
+# else
+#  define SYNCHRONIZE_IO	dmb()
+#  define INST_SYNC		isb()
+#  define DATA_SYNC		dsb()
+# endif
+#else
+# define SYNCHRONIZE_IO
+# define INST_SYNC
+# define DATA_SYNC
+# define INST_SYNC
+# define DATA_SYNC
+#endif
+
+#if defined (__GNUC__) || defined (__ICCARM__) || defined (__MICROBLAZE__)
+#define INLINE inline
+#else
+#define INLINE __inline
+#endif
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an input operation for a memory location by reading
+*           from the specified address and returning the 8 bit Value read from
+*            that address.
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 8 bit Value read from the specified input address.
+
+*
+******************************************************************************/
+static INLINE u8 Xil_In8(UINTPTR Addr)
+{
+	return *(volatile u8 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an input operation for a memory location by reading from
+*           the specified address and returning the 16 bit Value read from that
+*           address.
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 16 bit Value read from the specified input address.
+*
+******************************************************************************/
+static INLINE u16 Xil_In16(UINTPTR Addr)
+{
+	return *(volatile u16 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an input operation for a memory location by
+*           reading from the specified address and returning the 32 bit Value
+*           read  from that address.
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 32 bit Value read from the specified input address.
+*
+******************************************************************************/
+static INLINE u32 Xil_In32(UINTPTR Addr)
+{
+	return *(volatile u32 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief     Performs an input operation for a memory location by reading the
+*            64 bit Value read  from that address.
+*
+*
+* @param	Addr: contains the address to perform the input operation
+*
+* @return	The 64 bit Value read from the specified input address.
+*
+******************************************************************************/
+static INLINE u64 Xil_In64(UINTPTR Addr)
+{
+	return *(volatile u64 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for an memory location by
+*           writing the 8 bit Value to the the specified address.
+*
+* @param	Addr: contains the address to perform the output operation
+* @param	Value: contains the 8 bit Value to be written at the specified
+*           address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out8(UINTPTR Addr, u8 Value)
+{
+	volatile u8 *LocalAddr = (volatile u8 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for a memory location by writing the
+*            16 bit Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+* @param	Value contains the Value to be written at the specified address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out16(UINTPTR Addr, u16 Value)
+{
+	volatile u16 *LocalAddr = (volatile u16 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for a memory location by writing the
+*           32 bit Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+* @param	Value contains the 32 bit Value to be written at the specified
+*           address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out32(UINTPTR Addr, u32 Value)
+{
+#ifndef ENABLE_SAFETY
+	volatile u32 *LocalAddr = (volatile u32 *)Addr;
+	*LocalAddr = Value;
+#else
+	XStl_RegUpdate(Addr, Value);
+#endif
+}
+
+/*****************************************************************************/
+/**
+*
+* @brief    Performs an output operation for a memory location by writing the
+*           64 bit Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+* @param	Value contains 64 bit Value to be written at the specified address.
+*
+* @return	None.
+*
+******************************************************************************/
+static INLINE void Xil_Out64(UINTPTR Addr, u64 Value)
+{
+	volatile u64 *LocalAddr = (volatile u64 *)Addr;
+	*LocalAddr = Value;
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+# define Xil_In16LE	Xil_In16
+# define Xil_In32LE	Xil_In32
+# define Xil_Out16LE	Xil_Out16
+# define Xil_Out32LE	Xil_Out32
+# define Xil_Htons	Xil_EndianSwap16
+# define Xil_Htonl	Xil_EndianSwap32
+# define Xil_Ntohs	Xil_EndianSwap16
+# define Xil_Ntohl	Xil_EndianSwap32
+# else
+# define Xil_In16BE	Xil_In16
+# define Xil_In32BE	Xil_In32
+# define Xil_Out16BE	Xil_Out16
+# define Xil_Out32BE	Xil_Out32
+# define Xil_Htons(Data) (Data)
+# define Xil_Htonl(Data) (Data)
+# define Xil_Ntohs(Data) (Data)
+# define Xil_Ntohl(Data) (Data)
+#endif
+#else
+# define Xil_In16LE	Xil_In16
+# define Xil_In32LE	Xil_In32
+# define Xil_Out16LE	Xil_Out16
+# define Xil_Out32LE	Xil_Out32
+# define Xil_Htons	Xil_EndianSwap16
+# define Xil_Htonl	Xil_EndianSwap32
+# define Xil_Ntohs	Xil_EndianSwap16
+# define Xil_Ntohl	Xil_EndianSwap32
+#endif
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE u16 Xil_In16BE(UINTPTR Addr)
+#else
+static INLINE u16 Xil_In16LE(UINTPTR Addr)
+#endif
+#else
+static INLINE u16 Xil_In16BE(UINTPTR Addr)
+#endif
+{
+	u16 value = Xil_In16(Addr);
+	return Xil_EndianSwap16(value);
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE u32 Xil_In32BE(UINTPTR Addr)
+#else
+static INLINE u32 Xil_In32LE(UINTPTR Addr)
+#endif
+#else
+static INLINE u32 Xil_In32BE(UINTPTR Addr)
+#endif
+{
+	u16 value = Xil_In32(Addr);
+	return Xil_EndianSwap32(value);
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE void Xil_Out16BE(UINTPTR Addr, u16 Value)
+#else
+static INLINE void Xil_Out16LE(UINTPTR Addr, u16 Value)
+#endif
+#else
+static INLINE void Xil_Out16BE(UINTPTR Addr, u16 Value)
+#endif
+{
+	Value = Xil_EndianSwap16(Value);
+	Xil_Out16(Addr, Value);
+}
+
+#if defined (__MICROBLAZE__)
+#ifdef __LITTLE_ENDIAN__
+static INLINE void Xil_Out32BE(UINTPTR Addr, u32 Value)
+#else
+static INLINE void Xil_Out32LE(UINTPTR Addr, u32 Value)
+#endif
+#else
+static INLINE void Xil_Out32BE(UINTPTR Addr, u32 Value)
+#endif
+{
+	Value = Xil_EndianSwap32(Value);
+	Xil_Out32(Addr, Value);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_io_interfacing_apis".
+*/
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_misc_psreset_api.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_misc_psreset_api.c
new file mode 100644
index 0000000..a31ea3d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_misc_psreset_api.c
@@ -0,0 +1,522 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_misc_reset.c
+*
+* This file contains the implementation of the reset sequence for various
+* zynq ps devices like DDR,OCM,Slcr,Ethernet,Usb.. controllers. The reset
+* sequence provided to the interfaces is based on the provision in
+* slcr reset functional blcok.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00b kpc   03/07/13 First release
+* 

+*
+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+#include "xil_misc_psreset_api.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for ddr reset.
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XDdr_ResetHw(void)
+{
+	u32 RegVal;
+
+	/* Unlock the slcr register access lock */
+	 Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert and deassert the ddr softreset bit */
+     RegVal = 	Xil_In32(XDDRC_CTRL_BASEADDR);
+	 RegVal &= (u32)(~XDDRPS_CTRL_RESET_MASK);
+	 Xil_Out32(XDDRC_CTRL_BASEADDR,RegVal);
+	 RegVal |= ((u32)XDDRPS_CTRL_RESET_MASK);
+	 Xil_Out32(XDDRC_CTRL_BASEADDR,RegVal);
+
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for remapping the ocm memory region
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XOcm_Remap(void)
+{
+	u32 RegVal;
+
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Map the ocm region to postbootrom state */
+	RegVal = Xil_In32(XSLCR_OCM_CFG_ADDR);
+	RegVal = (RegVal & (u32)(~XSLCR_OCM_CFG_HIADDR_MASK)) | (u32)XSLCR_OCM_CFG_RESETVAL;
+	Xil_Out32(XSLCR_OCM_CFG_ADDR, RegVal);
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for SMC reset sequence
+*
+* @param   BaseAddress of the interface
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSmc_ResetHw(u32 BaseAddress)
+{
+	u32 RegVal;
+
+	/* Clear the interuupts */
+	RegVal = Xil_In32(BaseAddress + XSMC_MEMC_CLR_CONFIG_OFFSET);
+	RegVal = RegVal | (u32)XSMC_MEMC_CLR_CONFIG_MASK;
+	Xil_Out32(BaseAddress + XSMC_MEMC_CLR_CONFIG_OFFSET, RegVal);
+	/* Clear the idle counter registers */
+	Xil_Out32(BaseAddress + XSMC_REFRESH_PERIOD_0_OFFSET, 0x0U);
+	Xil_Out32(BaseAddress + XSMC_REFRESH_PERIOD_1_OFFSET, 0x0U);
+	/* Update the ecc registers with reset values */
+	Xil_Out32(BaseAddress + XSMC_ECC_MEMCFG1_OFFSET,
+							XSMC_ECC_MEMCFG1_RESET_VAL);
+	Xil_Out32(BaseAddress + XSMC_ECC_MEMCMD1_OFFSET,
+							XSMC_ECC_MEMCMD1_RESET_VAL);
+	Xil_Out32(BaseAddress + XSMC_ECC_MEMCMD2_OFFSET,
+							XSMC_ECC_MEMCMD2_RESET_VAL);
+
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for updating the slcr mio registers
+* with reset values
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_MioWriteResetValues(void)
+{
+	u32 i;
+
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Update all the MIO registers with reset values */
+    for (i=0U; i<=1U;i++)
+	{
+		Xil_Out32((XSLCR_MIO_PIN_00_ADDR + (i * 4U)),
+								XSLCR_MIO_PIN_00_RESET_VAL);
+	}
+	for (; i<=8U;i++)
+	{
+		Xil_Out32((XSLCR_MIO_PIN_00_ADDR + (i * 4U)),
+								XSLCR_MIO_PIN_02_RESET_VAL);
+	}
+	for (; i<=53U ;i++)
+	{
+		Xil_Out32((XSLCR_MIO_PIN_00_ADDR + (i * 4U)),
+								XSLCR_MIO_PIN_00_RESET_VAL);
+	}
+
+
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for updating the slcr pll registers
+* with reset values
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_PllWriteResetValues(void)
+{
+
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+
+	/* update the pll control registers with reset values */
+	Xil_Out32(XSLCR_IO_PLL_CTRL_ADDR, XSLCR_IO_PLL_CTRL_RESET_VAL);
+	Xil_Out32(XSLCR_ARM_PLL_CTRL_ADDR, XSLCR_ARM_PLL_CTRL_RESET_VAL);
+	Xil_Out32(XSLCR_DDR_PLL_CTRL_ADDR, XSLCR_DDR_PLL_CTRL_RESET_VAL);
+	/* update the pll config registers with reset values */
+	Xil_Out32(XSLCR_IO_PLL_CFG_ADDR, XSLCR_IO_PLL_CFG_RESET_VAL);
+	Xil_Out32(XSLCR_ARM_PLL_CFG_ADDR, XSLCR_ARM_PLL_CFG_RESET_VAL);
+	Xil_Out32(XSLCR_DDR_PLL_CFG_ADDR, XSLCR_DDR_PLL_CFG_RESET_VAL);
+	/* update the clock control registers with reset values */
+	Xil_Out32(XSLCR_ARM_CLK_CTRL_ADDR, XSLCR_ARM_CLK_CTRL_RESET_VAL);
+	Xil_Out32(XSLCR_DDR_CLK_CTRL_ADDR, XSLCR_DDR_CLK_CTRL_RESET_VAL);
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for disabling the level shifters
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_DisableLevelShifters(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Disable the level shifters */
+	RegVal = Xil_In32(XSLCR_LVL_SHFTR_EN_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_LVL_SHFTR_EN_MASK);
+	Xil_Out32(XSLCR_LVL_SHFTR_EN_ADDR, RegVal);
+
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for OCM software reset from the
+* slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_OcmReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_OCM_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_OCM_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_OCM_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_OCM_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_OCM_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_OCM_RST_CTRL_ADDR, RegVal);
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for Ethernet software reset from
+* the slcr
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_EmacPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_GEM_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_GEM_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_GEM_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_GEM_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_GEM_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_GEM_RST_CTRL_ADDR, RegVal);
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for USB software reset from the
+* slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_UsbPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_USB_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_USB_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_USB_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_USB_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_USB_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_USB_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for QSPI software reset from the
+* slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_QspiPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_LQSPI_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_QSPI_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_LQSPI_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_LQSPI_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_QSPI_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_LQSPI_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for SPI software reset from the
+* slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_SpiPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_SPI_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_SPI_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_SPI_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_SPI_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_SPI_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_SPI_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for i2c software reset from the slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_I2cPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_I2C_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_I2C_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_I2C_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_I2C_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_I2C_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_I2C_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for UART software reset from the
+* slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_UartPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_UART_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_UART_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_UART_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_UART_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_UART_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_UART_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for CAN software reset from slcr
+* registers
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_CanPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_CAN_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_CAN_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_CAN_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_CAN_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_CAN_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_CAN_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for SMC software reset from the slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_SmcPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_SMC_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_SMC_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_SMC_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_SMC_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_SMC_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_SMC_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for DMA controller software reset
+* from the slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_DmaPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_DMAC_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_DMAC_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_DMAC_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_DMAC_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_DMAC_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_DMAC_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for Gpio AMBA software reset from
+* the slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_GpioPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_GPIO_RST_CTRL_ADDR);
+	RegVal = RegVal | ((u32)XSLCR_GPIO_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_GPIO_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_GPIO_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_GPIO_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_GPIO_RST_CTRL_ADDR, RegVal);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_misc_psreset_api.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_misc_psreset_api.h
new file mode 100644
index 0000000..95dd695
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_misc_psreset_api.h
@@ -0,0 +1,277 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_misc_psreset_api.h
+*
+* This file contains the various register defintions and function prototypes for
+* implementing the reset functionality of zynq ps devices
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00b kpc   03/07/13 First release.
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_MISC_RESET_H		/* prevent circular inclusions */
+#define XIL_MISC_RESET_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+#define XDDRC_CTRL_BASEADDR				0xF8006000U
+#define XSLCR_BASEADDR					0xF8000000U
+/**< OCM configuration register */
+#define XSLCR_OCM_CFG_ADDR				(XSLCR_BASEADDR + 0x00000910U)
+/**< SLCR unlock register */
+#define XSLCR_UNLOCK_ADDR				(XSLCR_BASEADDR + 0x00000008U)
+/**< SLCR GEM0 rx clock control register */
+#define XSLCR_GEM0_RCLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x00000138U)
+/**< SLCR GEM1 rx clock control register */
+#define XSLCR_GEM1_RCLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x0000013CU)
+/**< SLCR GEM0 clock control register */
+#define XSLCR_GEM0_CLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x00000140U)
+/**< SLCR GEM1 clock control register */
+#define XSLCR_GEM1_CLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x00000144U)
+/**< SLCR SMC clock control register */
+#define XSLCR_SMC_CLK_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000148U)
+/**< SLCR GEM reset control register */
+#define XSLCR_GEM_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000214U)
+/**< SLCR USB0 clock control register */
+#define XSLCR_USB0_CLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x00000130U)
+/**< SLCR USB1 clock control register */
+#define XSLCR_USB1_CLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x00000134U)
+/**< SLCR USB1 reset control register */
+#define XSLCR_USB_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000210U)
+/**< SLCR SMC reset control register */
+#define XSLCR_SMC_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000234U)
+/**< SLCR Level shifter enable register */
+#define XSLCR_LVL_SHFTR_EN_ADDR			(XSLCR_BASEADDR + 0x00000900U)
+/**< SLCR ARM pll control register */
+#define XSLCR_ARM_PLL_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000100U)
+/**< SLCR DDR pll control register */
+#define XSLCR_DDR_PLL_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000104U)
+/**< SLCR IO pll control register */
+#define XSLCR_IO_PLL_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000108U)
+/**< SLCR ARM pll configuration register */
+#define XSLCR_ARM_PLL_CFG_ADDR			(XSLCR_BASEADDR + 0x00000110U)
+/**< SLCR DDR pll configuration register */
+#define XSLCR_DDR_PLL_CFG_ADDR			(XSLCR_BASEADDR + 0x00000114U)
+/**< SLCR IO pll configuration register */
+#define XSLCR_IO_PLL_CFG_ADDR			(XSLCR_BASEADDR + 0x00000118U)
+/**< SLCR ARM clock control register */
+#define XSLCR_ARM_CLK_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000120U)
+/**< SLCR DDR clock control register */
+#define XSLCR_DDR_CLK_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000124U)
+/**< SLCR MIO pin address register */
+#define XSLCR_MIO_PIN_00_ADDR			(XSLCR_BASEADDR + 0x00000700U)
+/**< SLCR DMAC reset control address register */
+#define XSLCR_DMAC_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x0000020CU)
+/**< SLCR USB reset control address register */
+/*#define XSLCR_USB_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000210U)*/
+/**< SLCR GEM reset control address register */
+/*#define XSLCR_GEM_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000214U)*/
+/**< SLCR SDIO reset control address register */
+#define XSLCR_SDIO_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000218U)
+/**< SLCR SPI reset control address register */
+#define XSLCR_SPI_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x0000021CU)
+/**< SLCR CAN reset control address register */
+#define XSLCR_CAN_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000220U)
+/**< SLCR I2C reset control address register */
+#define XSLCR_I2C_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000224U)
+/**< SLCR UART reset control address register */
+#define XSLCR_UART_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000228U)
+/**< SLCR GPIO reset control address register */
+#define XSLCR_GPIO_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x0000022CU)
+/**< SLCR LQSPI reset control address register */
+#define XSLCR_LQSPI_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000230U)
+/**< SLCR SMC reset control address register */
+/*#define XSLCR_SMC_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000234U)*/
+/**< SLCR OCM reset control address register */
+#define XSLCR_OCM_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000238U)
+
+/**< SMC mem controller clear config register */
+#define XSMC_MEMC_CLR_CONFIG_OFFSET			0x0000000CU
+/**< SMC idlecount configuration register */
+#define XSMC_REFRESH_PERIOD_0_OFFSET		0x00000020U
+#define XSMC_REFRESH_PERIOD_1_OFFSET		0x00000024U
+/**< SMC ECC configuration register */
+#define XSMC_ECC_MEMCFG1_OFFSET				0x00000404U
+/**< SMC ECC command 1 register */
+#define XSMC_ECC_MEMCMD1_OFFSET				0x00000404U
+/**< SMC ECC command 2 register */
+#define XSMC_ECC_MEMCMD2_OFFSET				0x00000404U
+
+/**< SLCR unlock code */
+#define XSLCR_UNLOCK_CODE		0x0000DF0DU
+
+/**< SMC mem clear configuration mask */
+#define XSMC_MEMC_CLR_CONFIG_MASK 	0x000005FU
+/**< SMC ECC memconfig 1 reset value */
+#define XSMC_ECC_MEMCFG1_RESET_VAL 	0x0000043U
+/**< SMC ECC memcommand 1 reset value */
+#define XSMC_ECC_MEMCMD1_RESET_VAL 	0x01300080U
+/**< SMC ECC memcommand 2 reset value */
+#define XSMC_ECC_MEMCMD2_RESET_VAL 	0x01E00585U
+
+/**< DDR controller reset bit mask */
+#define XDDRPS_CTRL_RESET_MASK 		0x00000001U
+/**< SLCR OCM configuration reset value*/
+#define XSLCR_OCM_CFG_RESETVAL		0x00000008U
+/**< SLCR OCM bank selection mask*/
+#define XSLCR_OCM_CFG_HIADDR_MASK	0x0000000FU
+/**< SLCR level shifter enable mask*/
+#define XSLCR_LVL_SHFTR_EN_MASK		0x0000000FU
+
+/**< SLCR PLL register reset values */
+#define XSLCR_ARM_PLL_CTRL_RESET_VAL	0x0001A008U
+#define XSLCR_DDR_PLL_CTRL_RESET_VAL	0x0001A008U
+#define XSLCR_IO_PLL_CTRL_RESET_VAL		0x0001A008U
+#define XSLCR_ARM_PLL_CFG_RESET_VAL		0x00177EA0U
+#define XSLCR_DDR_PLL_CFG_RESET_VAL		0x00177EA0U
+#define XSLCR_IO_PLL_CFG_RESET_VAL		0x00177EA0U
+#define XSLCR_ARM_CLK_CTRL_RESET_VAL	0x1F000400U
+#define XSLCR_DDR_CLK_CTRL_RESET_VAL	0x18400003U
+
+/**< SLCR MIO register default values */
+#define XSLCR_MIO_PIN_00_RESET_VAL		0x00001601U
+#define XSLCR_MIO_PIN_02_RESET_VAL		0x00000601U
+
+/**< SLCR Reset control registers default values */
+#define XSLCR_DMAC_RST_CTRL_VAL			0x00000001U
+#define XSLCR_GEM_RST_CTRL_VAL			0x000000F3U
+#define XSLCR_USB_RST_CTRL_VAL			0x00000003U
+#define XSLCR_I2C_RST_CTRL_VAL			0x00000003U
+#define XSLCR_SPI_RST_CTRL_VAL			0x0000000FU
+#define XSLCR_UART_RST_CTRL_VAL			0x0000000FU
+#define XSLCR_QSPI_RST_CTRL_VAL			0x00000003U
+#define XSLCR_GPIO_RST_CTRL_VAL			0x00000001U
+#define XSLCR_SMC_RST_CTRL_VAL			0x00000003U
+#define XSLCR_OCM_RST_CTRL_VAL			0x00000001U
+#define XSLCR_SDIO_RST_CTRL_VAL			0x00000033U
+#define XSLCR_CAN_RST_CTRL_VAL			0x00000003U
+/**************************** Type Definitions *******************************/
+
+/* the following data type is used to hold a null terminated version string
+ * consisting of the following format, "X.YYX"
+ */
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+/*
+ * Performs reset operation to the ddr interface
+ */
+void XDdr_ResetHw(void);
+/*
+ * Map the ocm region to post bootrom state
+ */
+void XOcm_Remap(void);
+/*
+ * Performs the smc interface reset
+ */
+void XSmc_ResetHw(u32 BaseAddress);
+/*
+ * updates the MIO registers with reset values
+ */
+void XSlcr_MioWriteResetValues(void);
+/*
+ * updates the PLL and clock registers with reset values
+ */
+void XSlcr_PllWriteResetValues(void);
+/*
+ * Disables the level shifters
+ */
+void XSlcr_DisableLevelShifters(void);
+/*
+ * provides softreset to the GPIO interface
+ */
+void XSlcr_GpioPsReset(void);
+/*
+ * provides softreset to the DMA interface
+ */
+void XSlcr_DmaPsReset(void);
+/*
+ * provides softreset to the SMC interface
+ */
+void XSlcr_SmcPsReset(void);
+/*
+ * provides softreset to the CAN interface
+ */
+void XSlcr_CanPsReset(void);
+/*
+ * provides softreset to the Uart interface
+ */
+void XSlcr_UartPsReset(void);
+/*
+ * provides softreset to the I2C interface
+ */
+void XSlcr_I2cPsReset(void);
+/*
+ * provides softreset to the SPI interface
+ */
+void XSlcr_SpiPsReset(void);
+/*
+ * provides softreset to the QSPI interface
+ */
+void XSlcr_QspiPsReset(void);
+/*
+ * provides softreset to the USB interface
+ */
+void XSlcr_UsbPsReset(void);
+/*
+ * provides softreset to the GEM interface
+ */
+void XSlcr_EmacPsReset(void);
+/*
+ * provides softreset to the OCM interface
+ */
+void XSlcr_OcmReset(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XIL_MISC_RESET_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_mmu.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_mmu.c
new file mode 100644
index 0000000..d206fa8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_mmu.c
@@ -0,0 +1,184 @@
+/******************************************************************************
+*
+* Copyright (C) 2012 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.c
+*
+* This file provides APIs for enabling/disabling MMU and setting the memory
+* attributes for sections, in the MMU translation table.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a sdm  01/12/12 Initial version
+* 3.05a asa  03/10/12 Modified the Xil_EnableMMU to invalidate the caches
+*		      before enabling back.
+* 3.05a asa  04/15/12 Modified the Xil_SetTlbAttributes routine so that
+*		      translation table and branch predictor arrays are
+*		      invalidated, D-cache flushed before the attribute
+*		      change is applied. This is done so that the user
+*		      need not call Xil_DisableMMU before calling
+*		      Xil_SetTlbAttributes.
+* 3.10a  srt 04/18/13 Implemented ARM Erratas. Please refer to file
+*		      'xil_errata.h' for errata description
+* 3.11a  asa 09/23/13 Modified Xil_SetTlbAttributes to flush the complete
+*			 D cache after the translation table update. Removed the
+*			 redundant TLB invalidation in the same API at the beginning.
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+#include "xil_mmu.h"
+#include "xil_errata.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+extern u32 MMUTable;
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************
+*
+* Set the memory attributes for a section, in the translation table. Each
+* section covers 1MB of memory.
+*
+* @param	Addr is the address for which attributes are to be set.
+* @param	attrib specifies the attributes for that memory region.
+*
+* @return	None.
+*
+* @note		The MMU and D-cache need not be disabled before changing an
+*		translation table attribute.
+*
+******************************************************************************/
+void Xil_SetTlbAttributes(INTPTR Addr, u32 attrib)
+{
+	u32 *ptr;
+	u32 section;
+
+	section = Addr / 0x100000U;
+	ptr = &MMUTable;
+	ptr += section;
+	if(ptr != NULL) {
+		*ptr = (Addr & 0xFFF00000U) | attrib;
+	}
+
+	Xil_DCacheFlush();
+
+	mtcp(XREG_CP15_INVAL_UTLB_UNLOCKED, 0U);
+	/* Invalidate all branch predictors */
+	mtcp(XREG_CP15_INVAL_BRANCH_ARRAY, 0U);
+
+	dsb(); /* ensure completion of the BP and TLB invalidation */
+    isb(); /* synchronize context on this processor */
+}
+
+/*****************************************************************************
+*
+* Invalidate the caches, enable MMU and D Caches for Cortex A9 processor.
+*
+* @param	None.
+* @return	None.
+*
+******************************************************************************/
+void Xil_EnableMMU(void)
+{
+	u32 Reg;
+	Xil_DCacheInvalidate();
+	Xil_ICacheInvalidate();
+
+#ifdef __GNUC__
+	Reg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL, Reg);
+#else
+	{ volatile register u32 Cp15Reg __asm(XREG_CP15_SYS_CONTROL);
+	  Reg = Cp15Reg; }
+#endif
+	Reg |= (u32)0x05U;
+	mtcp(XREG_CP15_SYS_CONTROL, Reg);
+
+	dsb();
+	isb();
+}
+
+/*****************************************************************************
+*
+* Disable MMU for Cortex A9 processors. This function invalidates the TLBs,
+* Branch Predictor Array and flushed the D Caches before disabling
+* the MMU and D cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+******************************************************************************/
+void Xil_DisableMMU(void)
+{
+	u32 Reg;
+
+	mtcp(XREG_CP15_INVAL_UTLB_UNLOCKED, 0U);
+	mtcp(XREG_CP15_INVAL_BRANCH_ARRAY, 0U);
+	Xil_DCacheFlush();
+
+#ifdef __GNUC__
+	Reg = mfcp(XREG_CP15_SYS_CONTROL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_SYS_CONTROL, Reg);
+#else
+	{ volatile register u32 Cp15Reg __asm(XREG_CP15_SYS_CONTROL);
+	  Reg = Cp15Reg; }
+#endif
+	Reg &= (u32)(~0x05U);
+#ifdef CONFIG_ARM_ERRATA_794073
+	/* Disable Branch Prediction */
+	Reg &= (u32)(~0x800U);
+#endif
+	mtcp(XREG_CP15_SYS_CONTROL, Reg);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_mmu.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_mmu.h
new file mode 100644
index 0000000..dd14b63
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_mmu.h
@@ -0,0 +1,108 @@
+/******************************************************************************
+*
+* Copyright (C) 2012 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.h
+*
+* @addtogroup a9_mmu_apis Cortex A9 Processor MMU Functions
+*
+* MMU functions equip users to enable MMU, disable MMU and modify default
+* memory attributes of MMU table as per the need.
+*
+* @{
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a sdm  01/12/12 Initial version
+* 4.2	pkp	 07/21/14 Included xil_types.h file which contains definition for
+*					  u32 which resolves issue of CR#805869
+* 5.4	pkp	 23/11/15 Added attribute definitions for Xil_SetTlbAttributes API
+* 

+*
+*
+******************************************************************************/
+
+#ifndef XIL_MMU_H
+#define XIL_MMU_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/* Memory type */
+#define NORM_NONCACHE 0x11DE2 	/* Normal Non-cacheable */
+#define STRONG_ORDERED 0xC02	/* Strongly ordered */
+#define DEVICE_MEMORY 0xC06		/* Device memory */
+#define RESERVED 0x0			/* reserved memory */
+
+/* Normal write-through cacheable shareable */
+#define NORM_WT_CACHE 0x16DEA
+
+/* Normal write back cacheable shareable */
+#define NORM_WB_CACHE 0x15DE6
+
+/* shareability attribute */
+#define SHAREABLE (0x1 << 16)
+#define NON_SHAREABLE	(~(0x1 << 16))
+
+/* Execution type */
+#define EXECUTE_NEVER ((0x1 << 4) | (0x1 << 0))
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void Xil_SetTlbAttributes(INTPTR Addr, u32 attrib);
+void Xil_EnableMMU(void);
+void Xil_DisableMMU(void);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_MMU_H */
+/**
+* @} End of "addtogroup a9_mmu_apis".
+*/
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_printf.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_printf.c
new file mode 100644
index 0000000..a55c488
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_printf.c
@@ -0,0 +1,360 @@
+/*---------------------------------------------------*/
+/* Modified from :                                   */
+/* Public Domain version of printf                   */
+/* Rud Merriam, Compsult, Inc. Houston, Tx.          */
+/* For Embedded Systems Programming, 1991            */
+/*                                                   */
+/*---------------------------------------------------*/
+#include "xil_printf.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include 
+#include 
+#include 
+
+static void padding( const s32 l_flag,const struct params_s *par);
+static void outs(const charptr lp, struct params_s *par);
+static s32 getnum( charptr* linep);
+
+typedef struct params_s {
+    s32 len;
+    s32 num1;
+    s32 num2;
+    char8 pad_character;
+    s32 do_padding;
+    s32 left_flag;
+    s32 unsigned_flag;
+} params_t;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine puts pad characters into the output  */
+/* buffer.                                           */
+/*                                                   */
+static void padding( const s32 l_flag, const struct params_s *par)
+{
+    s32 i;
+
+    if ((par->do_padding != 0) && (l_flag != 0) && (par->len < par->num1)) {
+		i=(par->len);
+        for (; i<(par->num1); i++) {
+#ifdef STDOUT_BASEADDRESS
+            outbyte( par->pad_character);
+#endif
+		}
+    }
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a string to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+static void outs(const charptr lp, struct params_s *par)
+{
+    charptr LocalPtr;
+	LocalPtr = lp;
+    /* pad on left if needed                         */
+	if(LocalPtr != NULL) {
+		par->len = (s32)strlen( LocalPtr);
+	}
+    padding( !(par->left_flag), par);
+
+    /* Move string to the buffer                     */
+    while (((*LocalPtr) != (char8)0) && ((par->num2) != 0)) {
+		(par->num2)--;
+#ifdef STDOUT_BASEADDRESS
+        outbyte(*LocalPtr);
+		LocalPtr += 1;
+#endif
+}
+
+    /* Pad on right if needed                        */
+    /* CR 439175 - elided next stmt. Seemed bogus.   */
+    /* par->len = strlen( lp)                      */
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a number to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+
+static void outnum( const s32 n, const s32 base, struct params_s *par)
+{
+    charptr cp;
+    s32 negative;
+	s32 i;
+    char8 outbuf[32];
+    const char8 digits[] = "0123456789ABCDEF";
+    u32 num;
+    for(i = 0; i<32; i++) {
+	outbuf[i] = '0';
+    }
+
+    /* Check if number is negative                   */
+    if ((par->unsigned_flag == 0) && (base == 10) && (n < 0L)) {
+        negative = 1;
+		num =(-(n));
+    }
+    else{
+        num = n;
+        negative = 0;
+    }
+
+    /* Build number (backwards) in outbuf            */
+    i = 0;
+    do {
+		outbuf[i] = digits[(num % base)];
+		i++;
+		num /= base;
+    } while (num > 0);
+
+    if (negative != 0) {
+		outbuf[i] = '-';
+		i++;
+	}
+
+    outbuf[i] = 0;
+    i--;
+
+    /* Move the converted number to the buffer and   */
+    /* add in the padding where needed.              */
+    par->len = (s32)strlen(outbuf);
+    padding( !(par->left_flag), par);
+    while (&outbuf[i] >= outbuf) {
+#ifdef STDOUT_BASEADDRESS
+	outbyte( outbuf[i] );
+		i--;
+#endif
+}
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine gets a number from the format        */
+/* string.                                           */
+/*                                                   */
+static s32 getnum( charptr* linep)
+{
+    s32 n;
+    s32 ResultIsDigit = 0;
+    charptr cptr;
+    n = 0;
+    cptr = *linep;
+	if(cptr != NULL){
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    while (ResultIsDigit != 0) {
+		if(cptr != NULL){
+			n = ((n*10) + (((s32)*cptr) - (s32)'0'));
+			cptr += 1;
+			if(cptr != NULL){
+				ResultIsDigit = isdigit(((s32)*cptr));
+			}
+		}
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    *linep = ((charptr )(cptr));
+    return(n);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine operates just like a printf/sprintf  */
+/* routine. It outputs a set of data under the       */
+/* control of a formatting string. Not all of the    */
+/* standard C format control are supported. The ones */
+/* provided are primarily those needed for embedded  */
+/* systems work. Primarily the floating point        */
+/* routines are omitted. Other formats could be      */
+/* added easily by following the examples shown for  */
+/* the supported formats.                            */
+/*                                                   */
+
+/* void esp_printf( const func_ptr f_ptr,
+   const charptr ctrl1, ...) */
+void xil_printf( const char8 *ctrl1, ...)
+{
+	s32 Check;
+    s32 long_flag;
+    s32 dot_flag;
+
+    params_t par;
+
+    char8 ch;
+    va_list argp;
+    char8 *ctrl = (char8 *)ctrl1;
+
+    va_start( argp, ctrl1);
+
+    while ((ctrl != NULL) && (*ctrl != (char8)0)) {
+
+        /* move format string chars to buffer until a  */
+        /* format control is found.                    */
+        if (*ctrl != '%') {
+#ifdef STDOUT_BASEADDRESS
+            outbyte(*ctrl);
+			ctrl += 1;
+#endif
+            continue;
+        }
+
+        /* initialize all the flags for this format.   */
+        dot_flag = 0;
+		long_flag = 0;
+        par.unsigned_flag = 0;
+		par.left_flag = 0;
+		par.do_padding = 0;
+        par.pad_character = ' ';
+        par.num2=32767;
+		par.num1=0;
+		par.len=0;
+
+ try_next:
+		if(ctrl != NULL) {
+			ctrl += 1;
+		}
+		if(ctrl != NULL) {
+			ch = *ctrl;
+		}
+		else {
+			ch = *ctrl;
+		}
+
+        if (isdigit((s32)ch) != 0) {
+            if (dot_flag != 0) {
+                par.num2 = getnum(&ctrl);
+			}
+            else {
+                if (ch == '0') {
+                    par.pad_character = '0';
+				}
+				if(ctrl != NULL) {
+			par.num1 = getnum(&ctrl);
+				}
+                par.do_padding = 1;
+            }
+            if(ctrl != NULL) {
+			ctrl -= 1;
+			}
+            goto try_next;
+        }
+
+        switch (tolower((s32)ch)) {
+            case '%':
+#ifdef STDOUT_BASEADDRESS
+                outbyte( '%');
+#endif
+                Check = 1;
+                break;
+
+            case '-':
+                par.left_flag = 1;
+                Check = 0;
+                break;
+
+            case '.':
+                dot_flag = 1;
+                Check = 0;
+                break;
+
+            case 'l':
+                long_flag = 1;
+                Check = 0;
+                break;
+
+            case 'u':
+                par.unsigned_flag = 1;
+                /* fall through */
+            case 'i':
+            case 'd':
+                if ((long_flag != 0) || (ch == 'D')) {
+                    outnum( va_arg(argp, s32), 10L, &par);
+                }
+                else {
+                    outnum( va_arg(argp, s32), 10L, &par);
+                }
+				Check = 1;
+                break;
+            case 'p':
+            case 'X':
+            case 'x':
+                par.unsigned_flag = 1;
+                outnum((s32)va_arg(argp, s32), 16L, &par);
+                Check = 1;
+                break;
+
+            case 's':
+                outs( va_arg( argp, char *), &par);
+                Check = 1;
+                break;
+
+            case 'c':
+#ifdef STDOUT_BASEADDRESS
+                outbyte( va_arg( argp, s32));
+#endif
+                Check = 1;
+                break;
+
+            case '\\':
+                switch (*ctrl) {
+                    case 'a':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x07));
+#endif
+                        break;
+                    case 'h':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x08));
+#endif
+                        break;
+                    case 'r':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x0D));
+#endif
+                        break;
+                    case 'n':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x0D));
+                        outbyte( ((char8)0x0A));
+#endif
+                        break;
+                    default:
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( *ctrl);
+#endif
+                        break;
+                }
+                ctrl += 1;
+                Check = 0;
+                break;
+
+            default:
+		Check = 1;
+		break;
+        }
+        if(Check == 1) {
+			if(ctrl != NULL) {
+				ctrl += 1;
+			}
+                continue;
+        }
+        goto try_next;
+    }
+    va_end( argp);
+}
+
+/*---------------------------------------------------*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_printf.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_printf.h
new file mode 100644
index 0000000..77ba280
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xil_printf.h
@@ -0,0 +1,44 @@
+ #ifndef XIL_PRINTF_H
+ #define XIL_PRINTF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include 
+#include 
+#include 
+#include "xil_types.h"
+#include "xparameters.h"
+
+/*----------------------------------------------------*/
+/* Use the following parameter passing structure to   */
+/* make xil_printf re-entrant.                        */
+/*----------------------------------------------------*/
+
+struct params_s;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+typedef char8* charptr;
+typedef s32 (*func_ptr)(int c);
+
+/*                                                   */
+
+void xil_printf( const char8 *ctrl1, ...);
+void print( const char8 *ptr);
+extern void outbyte (char8 c);
+extern char8 inbyte(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xl2cc.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xl2cc.h
new file mode 100644
index 0000000..91fb848
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xl2cc.h
@@ -0,0 +1,172 @@
+/******************************************************************************
+*
+* Copyright (C) 2011 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xl2cc.h
+*
+* This file contains the address definitions for the PL310 Level-2 Cache
+* Controller.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 1.00a sdm  02/01/10 Initial version
+* 3.10a srt 04/18/13 Implemented ARM Erratas. Please refer to file
+*		      'xil_errata.h' for errata description
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef _XL2CC_H_
+#define _XL2CC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+/* L2CC Register Offsets */
+#define XPS_L2CC_ID_OFFSET		0x0000U
+#define XPS_L2CC_TYPE_OFFSET		0x0004U
+#define XPS_L2CC_CNTRL_OFFSET		0x0100U
+#define XPS_L2CC_AUX_CNTRL_OFFSET	0x0104U
+#define XPS_L2CC_TAG_RAM_CNTRL_OFFSET	0x0108U
+#define XPS_L2CC_DATA_RAM_CNTRL_OFFSET	0x010CU
+
+#define XPS_L2CC_EVNT_CNTRL_OFFSET	0x0200U
+#define XPS_L2CC_EVNT_CNT1_CTRL_OFFSET	0x0204U
+#define XPS_L2CC_EVNT_CNT0_CTRL_OFFSET	0x0208U
+#define XPS_L2CC_EVNT_CNT1_VAL_OFFSET	0x020CU
+#define XPS_L2CC_EVNT_CNT0_VAL_OFFSET	0x0210U
+
+#define XPS_L2CC_IER_OFFSET		0x0214U		/* Interrupt Mask */
+#define XPS_L2CC_IPR_OFFSET		0x0218U		/* Masked interrupt status */
+#define XPS_L2CC_ISR_OFFSET		0x021CU		/* Raw Interrupt Status */
+#define XPS_L2CC_IAR_OFFSET		0x0220U		/* Interrupt Clear */
+
+#define XPS_L2CC_CACHE_SYNC_OFFSET		0x0730U		/* Cache Sync */
+#define XPS_L2CC_DUMMY_CACHE_SYNC_OFFSET	0x0740U		/* Dummy Register for Cache Sync */
+#define XPS_L2CC_CACHE_INVLD_PA_OFFSET		0x0770U		/* Cache Invalid by PA */
+#define XPS_L2CC_CACHE_INVLD_WAY_OFFSET		0x077CU		/* Cache Invalid by Way */
+#define XPS_L2CC_CACHE_CLEAN_PA_OFFSET		0x07B0U		/* Cache Clean by PA */
+#define XPS_L2CC_CACHE_CLEAN_INDX_OFFSET	0x07B8U		/* Cache Clean by Index */
+#define XPS_L2CC_CACHE_CLEAN_WAY_OFFSET		0x07BCU		/* Cache Clean by Way */
+#define XPS_L2CC_CACHE_INV_CLN_PA_OFFSET	0x07F0U		/* Cache Invalidate and Clean by PA */
+#define XPS_L2CC_CACHE_INV_CLN_INDX_OFFSET	0x07F8U		/* Cache Invalidate and Clean by Index */
+#define XPS_L2CC_CACHE_INV_CLN_WAY_OFFSET	0x07FCU		/* Cache Invalidate and Clean by Way */
+
+#define XPS_L2CC_CACHE_DLCKDWN_0_WAY_OFFSET	0x0900U		/* Cache Data Lockdown 0 by Way */
+#define XPS_L2CC_CACHE_ILCKDWN_0_WAY_OFFSET	0x0904U		/* Cache Instruction Lockdown 0 by Way */
+#define XPS_L2CC_CACHE_DLCKDWN_1_WAY_OFFSET	0x0908U		/* Cache Data Lockdown 1 by Way */
+#define XPS_L2CC_CACHE_ILCKDWN_1_WAY_OFFSET	0x090CU		/* Cache Instruction Lockdown 1 by Way */
+#define XPS_L2CC_CACHE_DLCKDWN_2_WAY_OFFSET	0x0910U		/* Cache Data Lockdown 2 by Way */
+#define XPS_L2CC_CACHE_ILCKDWN_2_WAY_OFFSET	0x0914U		/* Cache Instruction Lockdown 2 by Way */
+#define XPS_L2CC_CACHE_DLCKDWN_3_WAY_OFFSET	0x0918U		/* Cache Data Lockdown 3 by Way */
+#define XPS_L2CC_CACHE_ILCKDWN_3_WAY_OFFSET	0x091CU		/* Cache Instruction Lockdown 3 by Way */
+#define XPS_L2CC_CACHE_DLCKDWN_4_WAY_OFFSET	0x0920U		/* Cache Data Lockdown 4 by Way */
+#define XPS_L2CC_CACHE_ILCKDWN_4_WAY_OFFSET	0x0924U		/* Cache Instruction Lockdown 4 by Way */
+#define XPS_L2CC_CACHE_DLCKDWN_5_WAY_OFFSET	0x0928U		/* Cache Data Lockdown 5 by Way */
+#define XPS_L2CC_CACHE_ILCKDWN_5_WAY_OFFSET	0x092CU		/* Cache Instruction Lockdown 5 by Way */
+#define XPS_L2CC_CACHE_DLCKDWN_6_WAY_OFFSET	0x0930U		/* Cache Data Lockdown 6 by Way */
+#define XPS_L2CC_CACHE_ILCKDWN_6_WAY_OFFSET	0x0934U		/* Cache Instruction Lockdown 6 by Way */
+#define XPS_L2CC_CACHE_DLCKDWN_7_WAY_OFFSET	0x0938U		/* Cache Data Lockdown 7 by Way */
+#define XPS_L2CC_CACHE_ILCKDWN_7_WAY_OFFSET	0x093CU		/* Cache Instruction Lockdown 7 by Way */
+
+#define XPS_L2CC_CACHE_LCKDWN_LINE_ENABLE_OFFSET 0x0950U		/* Cache Lockdown Line Enable */
+#define XPS_L2CC_CACHE_UUNLOCK_ALL_WAY_OFFSET	0x0954U		/* Cache Unlock All Lines by Way */
+
+#define XPS_L2CC_ADDR_FILTER_START_OFFSET	0x0C00U		/* Start of address filtering */
+#define XPS_L2CC_ADDR_FILTER_END_OFFSET		0x0C04U		/* Start of address filtering */
+
+#define XPS_L2CC_DEBUG_CTRL_OFFSET		0x0F40U		/* Debug Control Register */
+
+/* XPS_L2CC_CNTRL_OFFSET bit masks */
+#define XPS_L2CC_ENABLE_MASK		0x00000001U	/* enables the L2CC */
+
+/* XPS_L2CC_AUX_CNTRL_OFFSET bit masks */
+#define XPS_L2CC_AUX_EBRESPE_MASK	0x40000000U	/* Early BRESP Enable */
+#define XPS_L2CC_AUX_IPFE_MASK		0x20000000U	/* Instruction Prefetch Enable */
+#define XPS_L2CC_AUX_DPFE_MASK		0x10000000U	/* Data Prefetch Enable */
+#define XPS_L2CC_AUX_NSIC_MASK		0x08000000U	/* Non-secure interrupt access control */
+#define XPS_L2CC_AUX_NSLE_MASK		0x04000000U	/* Non-secure lockdown enable */
+#define XPS_L2CC_AUX_CRP_MASK		0x02000000U	/* Cache replacement policy */
+#define XPS_L2CC_AUX_FWE_MASK		0x01800000U	/* Force write allocate */
+#define XPS_L2CC_AUX_SAOE_MASK		0x00400000U	/* Shared attribute override enable */
+#define XPS_L2CC_AUX_PE_MASK		0x00200000U	/* Parity enable */
+#define XPS_L2CC_AUX_EMBE_MASK		0x00100000U	/* Event monitor bus enable */
+#define XPS_L2CC_AUX_WAY_SIZE_MASK	0x000E0000U	/* Way-size */
+#define XPS_L2CC_AUX_ASSOC_MASK		0x00010000U	/* Associativity */
+#define XPS_L2CC_AUX_SAIE_MASK		0x00002000U	/* Shared attribute invalidate enable */
+#define XPS_L2CC_AUX_EXCL_CACHE_MASK	0x00001000U	/* Exclusive cache configuration */
+#define XPS_L2CC_AUX_SBDLE_MASK		0x00000800U	/* Store buffer device limitation Enable */
+#define XPS_L2CC_AUX_HPSODRE_MASK	0x00000400U	/* High Priority for SO and Dev Reads Enable */
+#define XPS_L2CC_AUX_FLZE_MASK		0x00000001U	/* Full line of zero enable */
+
+#define XPS_L2CC_AUX_REG_DEFAULT_MASK	0x72360000U	/* Enable all prefetching, */
+                                                    /* Cache replacement policy, Parity enable, */
+                                                    /* Event monitor bus enable and Way Size (64 KB) */
+#define XPS_L2CC_AUX_REG_ZERO_MASK	0xFFF1FFFFU	/* */
+
+#define XPS_L2CC_TAG_RAM_DEFAULT_MASK	0x00000111U	/* latency for TAG RAM */
+#define XPS_L2CC_DATA_RAM_DEFAULT_MASK	0x00000121U	/* latency for DATA RAM */
+
+/* Interrupt bit masks */
+#define XPS_L2CC_IXR_DECERR_MASK	0x00000100U	/* DECERR from L3 */
+#define XPS_L2CC_IXR_SLVERR_MASK	0x00000080U	/* SLVERR from L3 */
+#define XPS_L2CC_IXR_ERRRD_MASK		0x00000040U	/* Error on L2 data RAM (Read) */
+#define XPS_L2CC_IXR_ERRRT_MASK		0x00000020U	/* Error on L2 tag RAM (Read) */
+#define XPS_L2CC_IXR_ERRWD_MASK		0x00000010U	/* Error on L2 data RAM (Write) */
+#define XPS_L2CC_IXR_ERRWT_MASK		0x00000008U	/* Error on L2 tag RAM (Write) */
+#define XPS_L2CC_IXR_PARRD_MASK		0x00000004U	/* Parity Error on L2 data RAM (Read) */
+#define XPS_L2CC_IXR_PARRT_MASK		0x00000002U	/* Parity Error on L2 tag RAM (Read) */
+#define XPS_L2CC_IXR_ECNTR_MASK		0x00000001U	/* Event Counter1/0 Overflow Increment */
+
+/* Address filtering mask and enable bit */
+#define XPS_L2CC_ADDR_FILTER_VALID_MASK	0xFFF00000U	/* Address filtering valid bits*/
+#define XPS_L2CC_ADDR_FILTER_ENABLE_MASK 0x00000001U	/* Address filtering enable bit*/
+
+/* Debug control bits */
+#define XPS_L2CC_DEBUG_SPIDEN_MASK	0x00000004U	/* Debug SPIDEN bit */
+#define XPS_L2CC_DEBUG_DWB_MASK		0x00000002U	/* Debug DWB bit, forces write through */
+#define XPS_L2CC_DEBUG_DCL_MASK		0x00000002U	/* Debug DCL bit, disables cache line fill */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xl2cc_counter.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xl2cc_counter.c
new file mode 100644
index 0000000..b1135aa
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xl2cc_counter.c
@@ -0,0 +1,168 @@
+/******************************************************************************
+*
+* Copyright (C) 2011 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xl2cc_counter.c
+*
+* This file contains APIs for configuring and controlling the event counters
+* in PL310 L2 cache controller. For more information about the event counters,
+* see xl2cc_counter.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sdm  07/11/11 First release
+* 3.07a asa  08/30/12 Updated for CR 675636 to provide the L2 Base Address
+*		      inside the APIs
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include 
+#include "xparameters_ps.h"
+#include "xl2cc_counter.h"
+#include "xl2cc.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void XL2cc_EventCtrReset(void);
+
+/******************************************************************************/
+
+/****************************************************************************/
+/**
+*
+* This function initializes the event counters in L2 Cache controller with a
+* set of event codes specified by the user.
+*
+* @param	Event0 is the event code for counter 0.
+* @param	Event1 is the event code for counter 1.
+*		Use the event codes defined by XL2CC_* in xl2cc_counter.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XL2cc_EventCtrInit(s32 Event0, s32 Event1)
+{
+
+	/* Write event code into cnt1 cfg reg */
+	*((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNT1_CTRL_OFFSET)) = (((u32)Event1) << 2);
+
+	/* Write event code into cnt0 cfg reg */
+	*((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNT0_CTRL_OFFSET)) = (((u32)Event0) << 2);
+
+	/* Reset counters */
+	XL2cc_EventCtrReset();
+}
+
+/****************************************************************************/
+/**
+*
+* This function starts the event counters in L2 Cache controller.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XL2cc_EventCtrStart(void)
+{
+	u32 *LocalPtr;
+	LocalPtr = (u32 *)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNTRL_OFFSET);
+	XL2cc_EventCtrReset();
+
+	/* Enable counter */
+	/* *((volatile u32*)((void *)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNTRL_OFFSET))) = 1 */
+	*LocalPtr = (u32)1;
+}
+
+/****************************************************************************/
+/**
+*
+* This function disables the event counters in L2 Cache controller, saves the
+* counter values and resets the counters.
+*
+* @param	EveCtr0 is an output parameter which is used to return the value
+*		in event counter 0.
+*		EveCtr1 is an output parameter which is used to return the value
+*		in event counter 1.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XL2cc_EventCtrStop(u32 *EveCtr0, u32 *EveCtr1)
+{
+	/* Disable counter */
+	*((volatile u32*) (XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNTRL_OFFSET)) = 0U;
+
+	/* Save counter values */
+	*EveCtr1 = *((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNT1_VAL_OFFSET));
+	*EveCtr0 = *((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNT0_VAL_OFFSET));
+
+	XL2cc_EventCtrReset();
+}
+
+/****************************************************************************/
+/**
+*
+* This function resets the event counters in L2 Cache controller.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void XL2cc_EventCtrReset(void)
+{
+	*((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNTRL_OFFSET)) = 0x6U;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xl2cc_counter.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xl2cc_counter.h
new file mode 100644
index 0000000..37c9507
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xl2cc_counter.h
@@ -0,0 +1,108 @@
+/******************************************************************************
+*
+* Copyright (C) 2011 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xl2cc_counter.h
+*
+* This header file contains APIs for configuring and controlling the event
+* counters in PL310 L2 cache controller.
+* PL310 has 2 event counters which can be used to count a variety of events
+* like DRHIT, DRREQ, DWHIT, DWREQ, etc. This file defines configurations,
+* where value configures the event counters to count a set of events.
+*
+* XL2cc_EventCtrInit API can be used to select a set of events and
+* XL2cc_EventCtrStart configures the event counters and starts the counters.
+* XL2cc_EventCtrStop diables the event counters and returns the counter values.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sdm  07/11/11 First release
+* 3.07a asa  08/30/12 Updated for CR 675636 to provide the L2 Base Address
+*		      inside the APIs
+* 

+*
+******************************************************************************/
+
+#ifndef L2CCCOUNTER_H /* prevent circular inclusions */
+#define L2CCCOUNTER_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/*
+ * The following constants define the event codes for the event counters.
+ */
+#define XL2CC_CO		0x1
+#define XL2CC_DRHIT		0x2
+#define XL2CC_DRREQ		0x3
+#define XL2CC_DWHIT		0x4
+#define XL2CC_DWREQ		0x5
+#define XL2CC_DWTREQ		0x6
+#define XL2CC_IRHIT		0x7
+#define XL2CC_IRREQ		0x8
+#define XL2CC_WA		0x9
+#define XL2CC_IPFALLOC		0xa
+#define XL2CC_EPFHIT		0xb
+#define XL2CC_EPFALLOC		0xc
+#define XL2CC_SRRCVD		0xd
+#define XL2CC_SRCONF		0xe
+#define XL2CC_EPFRCVD		0xf
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+void XL2cc_EventCtrInit(s32 Event0, s32 Event1);
+void XL2cc_EventCtrStart(void);
+void XL2cc_EventCtrStop(u32 *EveCtr0, u32 *EveCtr1);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* L2CCCOUNTER_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xparameters_ps.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xparameters_ps.h
new file mode 100644
index 0000000..d9ab3c5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xparameters_ps.h
@@ -0,0 +1,333 @@
+/******************************************************************************
+*
+* Copyright (C) 2010 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xparameters_ps.h
+*
+* This file contains the address definitions for the hard peripherals
+* attached to the ARM Cortex A9 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 1.00a ecm/sdm 02/01/10 Initial version
+* 3.04a sdm     02/02/12 Removed some of the defines as they are being generated through
+*                        driver tcl
+* 5.0	pkp		01/16/15 Added interrupt ID definition of ttc for TEST APP
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef _XPARAMETERS_PS_H_
+#define _XPARAMETERS_PS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock
+ */
+
+/* Canonical definitions for DDR MEMORY */
+#define XPAR_DDR_MEM_BASEADDR		0x00000000U
+#define XPAR_DDR_MEM_HIGHADDR		0x3FFFFFFFU
+
+/* Canonical definitions for Interrupts  */
+#define XPAR_XUARTPS_0_INTR		XPS_UART0_INT_ID
+#define XPAR_XUARTPS_1_INTR		XPS_UART1_INT_ID
+#define XPAR_XUSBPS_0_INTR		XPS_USB0_INT_ID
+#define XPAR_XUSBPS_1_INTR		XPS_USB1_INT_ID
+#define XPAR_XIICPS_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_XIICPS_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_XSPIPS_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_XSPIPS_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_XCANPS_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_XCANPS_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_XGPIOPS_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_XEMACPS_0_INTR		XPS_GEM0_INT_ID
+#define XPAR_XEMACPS_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_XEMACPS_1_INTR		XPS_GEM1_INT_ID
+#define XPAR_XEMACPS_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_XSDIOPS_0_INTR		XPS_SDIO0_INT_ID
+#define XPAR_XQSPIPS_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_XSDIOPS_1_INTR		XPS_SDIO1_INT_ID
+#define XPAR_XWDTPS_0_INTR		XPS_WDT_INT_ID
+#define XPAR_XDCFG_0_INTR		XPS_DVC_INT_ID
+#define XPAR_SCUTIMER_INTR		XPS_SCU_TMR_INT_ID
+#define XPAR_SCUWDT_INTR		XPS_SCU_WDT_INT_ID
+#define XPAR_XTTCPS_0_INTR		XPS_TTC0_0_INT_ID
+#define XPAR_XTTCPS_1_INTR		XPS_TTC0_1_INT_ID
+#define XPAR_XTTCPS_2_INTR		XPS_TTC0_2_INT_ID
+#define XPAR_XTTCPS_3_INTR		XPS_TTC1_0_INT_ID
+#define XPAR_XTTCPS_4_INTR		XPS_TTC1_1_INT_ID
+#define XPAR_XTTCPS_5_INTR		XPS_TTC1_2_INT_ID
+#define XPAR_XDMAPS_0_FAULT_INTR	XPS_DMA0_ABORT_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_0	XPS_DMA0_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_1	XPS_DMA1_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_2	XPS_DMA2_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_3	XPS_DMA3_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_4	XPS_DMA4_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_5	XPS_DMA5_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_6	XPS_DMA6_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_7	XPS_DMA7_INT_ID
+
+
+#define XPAR_XQSPIPS_0_LINEAR_BASEADDR	XPS_QSPI_LINEAR_BASEADDR
+#define XPAR_XPARPORTPS_CTRL_BASEADDR	XPS_PARPORT_CRTL_BASEADDR
+
+
+
+/* Canonical definitions for DMAC */
+
+
+/* Canonical definitions for WDT */
+
+/* Canonical definitions for SLCR */
+#define XPAR_XSLCR_NUM_INSTANCES	1U
+#define XPAR_XSLCR_0_DEVICE_ID		0U
+#define XPAR_XSLCR_0_BASEADDR		XPS_SYS_CTRL_BASEADDR
+
+/* Canonical definitions for SCU GIC */
+#define XPAR_SCUGIC_NUM_INSTANCES	1U
+#define XPAR_SCUGIC_SINGLE_DEVICE_ID	0U
+#define XPAR_SCUGIC_CPU_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00000100U)
+#define XPAR_SCUGIC_DIST_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00001000U)
+#define XPAR_SCUGIC_ACK_BEFORE		0U
+
+/* Canonical definitions for Global Timer */
+#define XPAR_GLOBAL_TMR_NUM_INSTANCES	1U
+#define XPAR_GLOBAL_TMR_DEVICE_ID	0U
+#define XPAR_GLOBAL_TMR_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00000200U)
+#define XPAR_GLOBAL_TMR_INTR		XPS_GLOBAL_TMR_INT_ID
+
+
+/* Xilinx Parallel Flash Library (XilFlash) User Settings */
+#define XPAR_AXI_EMC
+
+
+#define XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ
+
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock. These have been put for bacwards compatibilty
+ */
+
+#define XPS_PERIPHERAL_BASEADDR		0xE0000000U
+#define XPS_UART0_BASEADDR		0xE0000000U
+#define XPS_UART1_BASEADDR		0xE0001000U
+#define XPS_USB0_BASEADDR		0xE0002000U
+#define XPS_USB1_BASEADDR		0xE0003000U
+#define XPS_I2C0_BASEADDR		0xE0004000U
+#define XPS_I2C1_BASEADDR		0xE0005000U
+#define XPS_SPI0_BASEADDR		0xE0006000U
+#define XPS_SPI1_BASEADDR		0xE0007000U
+#define XPS_CAN0_BASEADDR		0xE0008000U
+#define XPS_CAN1_BASEADDR		0xE0009000U
+#define XPS_GPIO_BASEADDR		0xE000A000U
+#define XPS_GEM0_BASEADDR		0xE000B000U
+#define XPS_GEM1_BASEADDR		0xE000C000U
+#define XPS_QSPI_BASEADDR		0xE000D000U
+#define XPS_PARPORT_CRTL_BASEADDR	0xE000E000U
+#define XPS_SDIO0_BASEADDR		0xE0100000U
+#define XPS_SDIO1_BASEADDR		0xE0101000U
+#define XPS_IOU_BUS_CFG_BASEADDR	0xE0200000U
+#define XPS_NAND_BASEADDR		0xE1000000U
+#define XPS_PARPORT0_BASEADDR		0xE2000000U
+#define XPS_PARPORT1_BASEADDR		0xE4000000U
+#define XPS_QSPI_LINEAR_BASEADDR	0xFC000000U
+#define XPS_SYS_CTRL_BASEADDR		0xF8000000U	/* AKA SLCR */
+#define XPS_TTC0_BASEADDR		0xF8001000U
+#define XPS_TTC1_BASEADDR		0xF8002000U
+#define XPS_DMAC0_SEC_BASEADDR		0xF8003000U
+#define XPS_DMAC0_NON_SEC_BASEADDR	0xF8004000U
+#define XPS_WDT_BASEADDR		0xF8005000U
+#define XPS_DDR_CTRL_BASEADDR		0xF8006000U
+#define XPS_DEV_CFG_APB_BASEADDR	0xF8007000U
+#define XPS_AFI0_BASEADDR		0xF8008000U
+#define XPS_AFI1_BASEADDR		0xF8009000U
+#define XPS_AFI2_BASEADDR		0xF800A000U
+#define XPS_AFI3_BASEADDR		0xF800B000U
+#define XPS_OCM_BASEADDR		0xF800C000U
+#define XPS_EFUSE_BASEADDR		0xF800D000U
+#define XPS_CORESIGHT_BASEADDR		0xF8800000U
+#define XPS_TOP_BUS_CFG_BASEADDR	0xF8900000U
+#define XPS_SCU_PERIPH_BASE		0xF8F00000U
+#define XPS_L2CC_BASEADDR		0xF8F02000U
+#define XPS_SAM_RAM_BASEADDR		0xFFFC0000U
+#define XPS_FPGA_AXI_S0_BASEADDR	0x40000000U
+#define XPS_FPGA_AXI_S1_BASEADDR	0x80000000U
+#define XPS_IOU_S_SWITCH_BASEADDR	0xE0000000U
+#define XPS_PERIPH_APB_BASEADDR		0xF8000000U
+
+/* Shared Peripheral Interrupts (SPI) */
+#define XPS_CORE_PARITY0_INT_ID		32U
+#define XPS_CORE_PARITY1_INT_ID		33U
+#define XPS_L2CC_INT_ID			34U
+#define XPS_OCMINTR_INT_ID		35U
+#define XPS_ECC_INT_ID			36U
+#define XPS_PMU0_INT_ID			37U
+#define XPS_PMU1_INT_ID			38U
+#define XPS_SYSMON_INT_ID		39U
+#define XPS_DVC_INT_ID			40U
+#define XPS_WDT_INT_ID			41U
+#define XPS_TTC0_0_INT_ID		42U
+#define XPS_TTC0_1_INT_ID		43U
+#define XPS_TTC0_2_INT_ID 		44U
+#define XPS_DMA0_ABORT_INT_ID		45U
+#define XPS_DMA0_INT_ID			46U
+#define XPS_DMA1_INT_ID			47U
+#define XPS_DMA2_INT_ID			48U
+#define XPS_DMA3_INT_ID			49U
+#define XPS_SMC_INT_ID			50U
+#define XPS_QSPI_INT_ID			51U
+#define XPS_GPIO_INT_ID			52U
+#define XPS_USB0_INT_ID			53U
+#define XPS_GEM0_INT_ID			54U
+#define XPS_GEM0_WAKE_INT_ID		55U
+#define XPS_SDIO0_INT_ID		56U
+#define XPS_I2C0_INT_ID			57U
+#define XPS_SPI0_INT_ID			58U
+#define XPS_UART0_INT_ID		59U
+#define XPS_CAN0_INT_ID			60U
+#define XPS_FPGA0_INT_ID		61U
+#define XPS_FPGA1_INT_ID		62U
+#define XPS_FPGA2_INT_ID		63U
+#define XPS_FPGA3_INT_ID		64U
+#define XPS_FPGA4_INT_ID		65U
+#define XPS_FPGA5_INT_ID		66U
+#define XPS_FPGA6_INT_ID		67U
+#define XPS_FPGA7_INT_ID		68U
+#define XPS_TTC1_0_INT_ID		69U
+#define XPS_TTC1_1_INT_ID		70U
+#define XPS_TTC1_2_INT_ID		71U
+#define XPS_DMA4_INT_ID			72U
+#define XPS_DMA5_INT_ID			73U
+#define XPS_DMA6_INT_ID			74U
+#define XPS_DMA7_INT_ID			75U
+#define XPS_USB1_INT_ID			76U
+#define XPS_GEM1_INT_ID			77U
+#define XPS_GEM1_WAKE_INT_ID		78U
+#define XPS_SDIO1_INT_ID		79U
+#define XPS_I2C1_INT_ID			80U
+#define XPS_SPI1_INT_ID			81U
+#define XPS_UART1_INT_ID		82U
+#define XPS_CAN1_INT_ID			83U
+#define XPS_FPGA8_INT_ID		84U
+#define XPS_FPGA9_INT_ID		85U
+#define XPS_FPGA10_INT_ID		86U
+#define XPS_FPGA11_INT_ID		87U
+#define XPS_FPGA12_INT_ID		88U
+#define XPS_FPGA13_INT_ID		89U
+#define XPS_FPGA14_INT_ID		90U
+#define XPS_FPGA15_INT_ID		91U
+
+/* Private Peripheral Interrupts (PPI) */
+#define XPS_GLOBAL_TMR_INT_ID		27U	/* SCU Global Timer interrupt */
+#define XPS_FIQ_INT_ID			28U	/* FIQ from FPGA fabric */
+#define XPS_SCU_TMR_INT_ID		29U	/* SCU Private Timer interrupt */
+#define XPS_SCU_WDT_INT_ID		30U	/* SCU Private WDT interrupt */
+#define XPS_IRQ_INT_ID			31U	/* IRQ from FPGA fabric */
+
+
+/* REDEFINES for TEST APP */
+/* Definitions for UART */
+#define XPAR_PS7_UART_0_INTR		XPS_UART0_INT_ID
+#define XPAR_PS7_UART_1_INTR		XPS_UART1_INT_ID
+#define XPAR_PS7_USB_0_INTR		XPS_USB0_INT_ID
+#define XPAR_PS7_USB_1_INTR		XPS_USB1_INT_ID
+#define XPAR_PS7_I2C_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_PS7_I2C_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_PS7_SPI_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_PS7_SPI_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_PS7_CAN_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_PS7_CAN_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_PS7_GPIO_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_PS7_ETHERNET_0_INTR	XPS_GEM0_INT_ID
+#define XPAR_PS7_ETHERNET_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_1_INTR	XPS_GEM1_INT_ID
+#define XPAR_PS7_ETHERNET_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_PS7_QSPI_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_PS7_WDT_0_INTR		XPS_WDT_INT_ID
+#define XPAR_PS7_SCUWDT_0_INTR		XPS_SCU_WDT_INT_ID
+#define XPAR_PS7_SCUTIMER_0_INTR	XPS_SCU_TMR_INT_ID
+#define XPAR_PS7_XADC_0_INTR		XPS_SYSMON_INT_ID
+#define XPAR_PS7_TTC_0_INTR         XPS_TTC0_0_INT_ID
+#define XPAR_PS7_TTC_1_INTR         XPS_TTC0_1_INT_ID
+#define XPAR_PS7_TTC_2_INTR         XPS_TTC0_2_INT_ID
+#define XPAR_PS7_TTC_3_INTR         XPS_TTC1_0_INT_ID
+#define XPAR_PS7_TTC_4_INTR         XPS_TTC1_1_INT_ID
+#define XPAR_PS7_TTC_5_INTR         XPS_TTC1_2_INT_ID
+
+#define XPAR_XADCPS_INT_ID		XPS_SYSMON_INT_ID
+
+/* For backwards compatibilty */
+#define XPAR_XUARTPS_0_CLOCK_HZ		XPAR_XUARTPS_0_UART_CLK_FREQ_HZ
+#define XPAR_XUARTPS_1_CLOCK_HZ		XPAR_XUARTPS_1_UART_CLK_FREQ_HZ
+#define XPAR_XTTCPS_0_CLOCK_HZ		XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_1_CLOCK_HZ		XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_2_CLOCK_HZ		XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_3_CLOCK_HZ		XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_4_CLOCK_HZ		XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_5_CLOCK_HZ		XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ
+#define XPAR_XIICPS_0_CLOCK_HZ		XPAR_XIICPS_0_I2C_CLK_FREQ_HZ
+#define XPAR_XIICPS_1_CLOCK_HZ		XPAR_XIICPS_1_I2C_CLK_FREQ_HZ
+
+#define XPAR_XQSPIPS_0_CLOCK_HZ		XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ
+
+#ifdef XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ
+#endif
+
+#ifdef XPAR_CPU_CORTEXA9_1_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXA9_1_CPU_CLK_FREQ_HZ
+#endif
+
+#define XPAR_SCUTIMER_DEVICE_ID		0U
+#define XPAR_SCUWDT_DEVICE_ID		0U
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xpm_counter.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xpm_counter.c
new file mode 100644
index 0000000..c65aa12
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xpm_counter.c
@@ -0,0 +1,296 @@
+/******************************************************************************
+*
+* Copyright (C) 2011 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpm_counter.c
+*
+* This file contains APIs for configuring and controlling the Cortex-A9
+* Performance Monitor Events. For more information about the event counters,
+* see xpm_counter.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sdm  07/11/11 First release
+* 4.2	pkp	 07/21/14 Corrected reset value of event counter in function
+*					  Xpm_ResetEventCounters to fix CR#796275
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xpm_counter.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+typedef const u32 PmcrEventCfg32[XPM_CTRCOUNT];
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void Xpm_DisableEventCounters(void);
+void Xpm_EnableEventCounters (void);
+void Xpm_ResetEventCounters (void);
+
+/******************************************************************************/
+
+/****************************************************************************/
+/**
+*
+* This function disables the Cortex A9 event counters.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xpm_DisableEventCounters(void)
+{
+	/* Disable the event counters */
+	mtcp(XREG_CP15_COUNT_ENABLE_CLR, 0x3f);
+}
+
+/****************************************************************************/
+/**
+*
+* This function enables the Cortex A9 event counters.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xpm_EnableEventCounters(void)
+{
+	/* Enable the event counters */
+	mtcp(XREG_CP15_COUNT_ENABLE_SET, 0x3f);
+}
+
+/****************************************************************************/
+/**
+*
+* This function resets the Cortex A9 event counters.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xpm_ResetEventCounters(void)
+{
+	u32 Reg;
+#ifdef __GNUC__
+	Reg = mfcp(XREG_CP15_PERF_MONITOR_CTRL);
+#elif defined (__ICCARM__)
+	mfcp(XREG_CP15_PERF_MONITOR_CTRL, Reg);
+#else
+	{ register u32 C15Reg __asm(XREG_CP15_PERF_MONITOR_CTRL);
+	  Reg = C15Reg; }
+#endif
+	Reg |= (1U << 1U); /* reset event counters */
+	mtcp(XREG_CP15_PERF_MONITOR_CTRL, Reg);
+
+}
+
+/****************************************************************************/
+/**
+*
+* This function configures the Cortex A9 event counters controller, with the
+* event codes, in a configuration selected by the user and enables the counters.
+*
+* @param	PmcrCfg is configuration value based on which the event counters
+*		are configured.
+*		Use XPM_CNTRCFG* values defined in xpm_counter.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xpm_SetEvents(s32 PmcrCfg)
+{
+	u32 Counter;
+	static PmcrEventCfg32 PmcrEvents[] = {
+	{
+		XPM_EVENT_SOFTINCR,
+		XPM_EVENT_INSRFETCH_CACHEREFILL,
+		XPM_EVENT_INSTRFECT_TLBREFILL,
+		XPM_EVENT_DATA_CACHEREFILL,
+		XPM_EVENT_DATA_CACHEACCESS,
+		XPM_EVENT_DATA_TLBREFILL
+	},
+	{
+		XPM_EVENT_DATA_READS,
+		XPM_EVENT_DATA_WRITE,
+		XPM_EVENT_EXCEPTION,
+		XPM_EVENT_EXCEPRETURN,
+		XPM_EVENT_CHANGECONTEXT,
+		XPM_EVENT_SW_CHANGEPC
+	},
+	{
+		XPM_EVENT_IMMEDBRANCH,
+		XPM_EVENT_UNALIGNEDACCESS,
+		XPM_EVENT_BRANCHMISS,
+		XPM_EVENT_CLOCKCYCLES,
+		XPM_EVENT_BRANCHPREDICT,
+		XPM_EVENT_JAVABYTECODE
+	},
+	{
+		XPM_EVENT_SWJAVABYTECODE,
+		XPM_EVENT_JAVABACKBRANCH,
+		XPM_EVENT_COHERLINEMISS,
+		XPM_EVENT_COHERLINEHIT,
+		XPM_EVENT_INSTRSTALL,
+		XPM_EVENT_DATASTALL
+	},
+	{
+		XPM_EVENT_MAINTLBSTALL,
+		XPM_EVENT_STREXPASS,
+		XPM_EVENT_STREXFAIL,
+		XPM_EVENT_DATAEVICT,
+		XPM_EVENT_NODISPATCH,
+		XPM_EVENT_ISSUEEMPTY
+	},
+	{
+		XPM_EVENT_INSTRRENAME,
+		XPM_EVENT_PREDICTFUNCRET,
+		XPM_EVENT_MAINEXEC,
+		XPM_EVENT_SECEXEC,
+		XPM_EVENT_LDRSTR,
+		XPM_EVENT_FLOATRENAME
+	},
+	{
+		XPM_EVENT_NEONRENAME,
+		XPM_EVENT_PLDSTALL,
+		XPM_EVENT_WRITESTALL,
+		XPM_EVENT_INSTRTLBSTALL,
+		XPM_EVENT_DATATLBSTALL,
+		XPM_EVENT_INSTR_uTLBSTALL
+	},
+	{
+		XPM_EVENT_DATA_uTLBSTALL,
+		XPM_EVENT_DMB_STALL,
+		XPM_EVENT_INT_CLKEN,
+		XPM_EVENT_DE_CLKEN,
+		XPM_EVENT_INSTRISB,
+		XPM_EVENT_INSTRDSB
+	},
+	{
+		XPM_EVENT_INSTRDMB,
+		XPM_EVENT_EXTINT,
+		XPM_EVENT_PLE_LRC,
+		XPM_EVENT_PLE_LRS,
+		XPM_EVENT_PLE_FLUSH,
+		XPM_EVENT_PLE_CMPL
+	},
+	{
+		XPM_EVENT_PLE_OVFL,
+		XPM_EVENT_PLE_PROG,
+		XPM_EVENT_PLE_LRC,
+		XPM_EVENT_PLE_LRS,
+		XPM_EVENT_PLE_FLUSH,
+		XPM_EVENT_PLE_CMPL
+	},
+	{
+		XPM_EVENT_DATASTALL,
+		XPM_EVENT_INSRFETCH_CACHEREFILL,
+		XPM_EVENT_INSTRFECT_TLBREFILL,
+		XPM_EVENT_DATA_CACHEREFILL,
+		XPM_EVENT_DATA_CACHEACCESS,
+		XPM_EVENT_DATA_TLBREFILL
+	},
+	};
+	const u32 *ptr = PmcrEvents[PmcrCfg];
+
+	Xpm_DisableEventCounters();
+
+	for(Counter = 0U; Counter < XPM_CTRCOUNT; Counter++) {
+
+		/* Selecet event counter */
+		mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
+
+		/* Set the event */
+		mtcp(XREG_CP15_EVENT_TYPE_SEL, ptr[Counter]);
+	}
+
+	Xpm_ResetEventCounters();
+	Xpm_EnableEventCounters();
+}
+
+/****************************************************************************/
+/**
+*
+* This function disables the event counters and returns the counter values.
+*
+* @param	PmCtrValue is a pointer to an array of type u32 PmCtrValue[6].
+*		It is an output parameter which is used to return the PM
+*		counter values.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xpm_GetEventCounters(u32 *PmCtrValue)
+{
+	u32 Counter;
+
+	Xpm_DisableEventCounters();
+
+	for(Counter = 0U; Counter < XPM_CTRCOUNT; Counter++) {
+
+		mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
+#ifdef __GNUC__
+		PmCtrValue[Counter] = mfcp(XREG_CP15_PERF_MONITOR_COUNT);
+#elif defined (__ICCARM__)
+		mfcp(XREG_CP15_PERF_MONITOR_COUNT, PmCtrValue[Counter]);
+#else
+		{ register u32 Cp15Reg __asm(XREG_CP15_PERF_MONITOR_COUNT);
+		  PmCtrValue[Counter] = Cp15Reg; }
+#endif
+	}
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xpm_counter.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xpm_counter.h
new file mode 100644
index 0000000..d4a4fb6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xpm_counter.h
@@ -0,0 +1,571 @@
+/******************************************************************************
+*
+* Copyright (C) 2011 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpm_counter.h
+*
+* This header file contains APIs for configuring and controlling the Cortex-A9
+* Performance Monitor Events.
+* Cortex-A9 Performance Monitor has 6 event counters which can be used to
+* count a variety of events described in Coretx-A9 TRM. This file defines
+* configurations, where value configures the event counters to count a
+* set of events.
+*
+* Xpm_SetEvents can be used to set the event counters to count a set of events
+* and Xpm_GetEventCounters can be used to read the counter values.
+*
+* @note
+*
+* This file doesn't handle the Cortex-A9 cycle counter, as the cycle counter is
+* being used for time keeping.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sdm  07/11/11 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XPMCOUNTER_H /* prevent circular inclusions */
+#define XPMCOUNTER_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include 
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/* Number of performance counters */
+#define XPM_CTRCOUNT 6U
+
+/* The following constants define the Cortex-A9 Performance Monitor Events */
+
+/*
+ * Software increment. The register is incremented only on writes to the
+ * Software Increment Register
+ */
+#define XPM_EVENT_SOFTINCR 0x00U
+
+/*
+ * Instruction fetch that causes a refill at (at least) the lowest level(s) of
+ * instruction or unified cache. Includes the speculative linefills in the
+ * count
+ */
+#define XPM_EVENT_INSRFETCH_CACHEREFILL 0x01U
+
+/*
+ * Instruction fetch that causes a TLB refill at (at least) the lowest level of
+ * TLB. Includes the speculative requests in the count
+ */
+#define XPM_EVENT_INSTRFECT_TLBREFILL 0x02U
+
+/*
+ * Data read or write operation that causes a refill at (at least) the lowest
+ * level(s)of data or unified cache. Counts the number of allocations performed
+ * in the Data Cache due to a read or a write
+ */
+#define XPM_EVENT_DATA_CACHEREFILL 0x03U
+
+/*
+ * Data read or write operation that causes a cache access at (at least) the
+ * lowest level(s) of data or unified cache. This includes speculative reads
+ */
+#define XPM_EVENT_DATA_CACHEACCESS 0x04U
+
+/*
+ * Data read or write operation that causes a TLB refill at (at least) the
+ * lowest level of TLB. This does not include micro TLB misses due to PLD, PLI,
+ * CP15 Cache operation by MVA and CP15 VA to PA operations
+ */
+#define XPM_EVENT_DATA_TLBREFILL 0x05U
+
+/*
+ * Data read architecturally executed. Counts the number of data read
+ * instructions accepted by the Load Store Unit. This includes counting the
+ * speculative and aborted LDR/LDM, as well as the reads due to the SWP
+ * instructions
+ */
+#define XPM_EVENT_DATA_READS 0x06U
+
+/*
+ * Data write architecturally executed. Counts the number of data write
+ * instructions accepted by the Load Store Unit. This includes counting the
+ * speculative and aborted STR/STM, as well as the writes due to the SWP
+ * instructions
+ */
+#define XPM_EVENT_DATA_WRITE 0x07U
+
+/* Exception taken. Counts the number of exceptions architecturally taken.*/
+#define XPM_EVENT_EXCEPTION 0x09U
+
+/* Exception return architecturally executed.*/
+#define XPM_EVENT_EXCEPRETURN 0x0AU
+
+/*
+ * Change to ContextID retired. Counts the number of instructions
+ * architecturally executed writing into the ContextID Register
+ */
+#define XPM_EVENT_CHANGECONTEXT 0x0BU
+
+/*
+ * Software change of PC, except by an exception, architecturally executed.
+ * Count the number of PC changes architecturally executed, excluding the PC
+ * changes due to taken exceptions
+ */
+#define XPM_EVENT_SW_CHANGEPC 0x0CU
+
+/*
+ * Immediate branch architecturally executed (taken or not taken). This includes
+ * the branches which are flushed due to a previous load/store which aborts
+ * late
+ */
+#define XPM_EVENT_IMMEDBRANCH 0x0DU
+
+/*
+ * Unaligned access architecturally executed. Counts the number of aborted
+ * unaligned accessed architecturally executed, and the number of not-aborted
+ * unaligned accesses, including the speculative ones
+ */
+#define XPM_EVENT_UNALIGNEDACCESS 0x0FU
+
+/*
+ * Branch mispredicted/not predicted. Counts the number of mispredicted or
+ * not-predicted branches executed. This includes the branches which are flushed
+ * due to a previous load/store which aborts late
+ */
+#define XPM_EVENT_BRANCHMISS 0x10U
+
+/*
+ * Counts clock cycles when the Cortex-A9 processor is not in WFE/WFI. This
+ * event is not exported on the PMUEVENT bus
+ */
+#define XPM_EVENT_CLOCKCYCLES 0x11U
+
+/*
+ * Branches or other change in program flow that could have been predicted by
+ * the branch prediction resources of the processor. This includes the branches
+ * which are flushed due to a previous load/store which aborts late
+ */
+#define XPM_EVENT_BRANCHPREDICT 0x12U
+
+/*
+ * Java bytecode execute. Counts the number of Java bytecodes being decoded,
+ * including speculative ones
+ */
+#define XPM_EVENT_JAVABYTECODE 0x40U
+
+/*
+ * Software Java bytecode executed. Counts the number of software java bytecodes
+ * being decoded, including speculative ones
+ */
+#define XPM_EVENT_SWJAVABYTECODE 0x41U
+
+/*
+ * Jazelle backward branches executed. Counts the number of Jazelle taken
+ * branches being executed. This includes the branches which are flushed due
+ * to a previous load/store which aborts late
+ */
+#define XPM_EVENT_JAVABACKBRANCH 0x42U
+
+/*
+ * Coherent linefill miss Counts the number of coherent linefill requests
+ * performed by the Cortex-A9 processor which also miss in all the other
+ * Cortex-A9 processors, meaning that the request is sent to the external
+ * memory
+ */
+#define XPM_EVENT_COHERLINEMISS 0x50U
+
+/*
+ * Coherent linefill hit. Counts the number of coherent linefill requests
+ * performed by the Cortex-A9 processor which hit in another Cortex-A9
+ * processor, meaning that the linefill data is fetched directly from the
+ * relevant Cortex-A9 cache
+ */
+#define XPM_EVENT_COHERLINEHIT 0x51U
+
+/*
+ * Instruction cache dependent stall cycles. Counts the number of cycles where
+ * the processor is ready to accept new instructions, but does not receive any
+ * due to the instruction side not being able to provide any and the
+ * instruction cache is currently performing at least one linefill
+ */
+#define XPM_EVENT_INSTRSTALL 0x60U
+
+/*
+ * Data cache dependent stall cycles. Counts the number of cycles where the core
+ * has some instructions that it cannot issue to any pipeline, and the Load
+ * Store unit has at least one pending linefill request, and no pending
+ */
+#define XPM_EVENT_DATASTALL 0x61U
+
+/*
+ * Main TLB miss stall cycles. Counts the number of cycles where the processor
+ * is stalled waiting for the completion of translation table walks from the
+ * main TLB. The processor stalls can be due to the instruction side not being
+ * able to provide the instructions, or to the data side not being able to
+ * provide the necessary data, due to them waiting for the main TLB translation
+ * table walk to complete
+ */
+#define XPM_EVENT_MAINTLBSTALL 0x62U
+
+/*
+ * Counts the number of STREX instructions architecturally executed and
+ * passed
+ */
+#define XPM_EVENT_STREXPASS 0x63U
+
+/*
+ * Counts the number of STREX instructions architecturally executed and
+ * failed
+ */
+#define XPM_EVENT_STREXFAIL 0x64U
+
+/*
+ * Data eviction. Counts the number of eviction requests due to a linefill in
+ * the data cache
+ */
+#define XPM_EVENT_DATAEVICT 0x65U
+
+/*
+ * Counts the number of cycles where the issue stage does not dispatch any
+ * instruction because it is empty or cannot dispatch any instructions
+ */
+#define XPM_EVENT_NODISPATCH 0x66U
+
+/*
+ * Counts the number of cycles where the issue stage is empty
+ */
+#define XPM_EVENT_ISSUEEMPTY 0x67U
+
+/*
+ * Counts the number of instructions going through the Register Renaming stage.
+ * This number is an approximate number of the total number of instructions
+ * speculatively executed, and even more approximate of the total number of
+ * instructions architecturally executed. The approximation depends mainly on
+ * the branch misprediction rate.
+ * The renaming stage can handle two instructions in the same cycle so the event
+ * is two bits long:
+ *    - b00 no instructions renamed
+ *    - b01 one instruction renamed
+ *    - b10 two instructions renamed
+ */
+#define XPM_EVENT_INSTRRENAME 0x68U
+
+/*
+ * Counts the number of procedure returns whose condition codes do not fail,
+ * excluding all returns from exception. This count includes procedure returns
+ * which are flushed due to a previous load/store which aborts late.
+ * Only the following instructions are reported:
+ * - BX R14
+ * - MOV PC LR
+ * - POP {..,pc}
+ * - LDR pc,[sp],#offset
+ * The following instructions are not reported:
+ * - LDMIA R9!,{..,PC} (ThumbEE state only)
+ * - LDR PC,[R9],#offset (ThumbEE state only)
+ * - BX R0 (Rm != R14)
+ * - MOV PC,R0 (Rm != R14)
+ * - LDM SP,{...,PC} (writeback not specified)
+ * - LDR PC,[SP,#offset] (wrong addressing mode)
+ */
+#define XPM_EVENT_PREDICTFUNCRET 0x6EU
+
+/*
+ * Counts the number of instructions being executed in the main execution
+ * pipeline of the processor, the multiply pipeline and arithmetic logic unit
+ * pipeline. The counted instructions are still speculative
+ */
+#define XPM_EVENT_MAINEXEC 0x70U
+
+/*
+ * Counts the number of instructions being executed in the processor second
+ * execution pipeline (ALU). The counted instructions are still speculative
+ */
+#define XPM_EVENT_SECEXEC 0x71U
+
+/*
+ * Counts the number of instructions being executed in the Load/Store unit. The
+ * counted instructions are still speculative
+ */
+#define XPM_EVENT_LDRSTR 0x72U
+
+/*
+ * Counts the number of Floating-point instructions going through the Register
+ * Rename stage. Instructions are still speculative in this stage.
+ *Two floating-point instructions can be renamed in the same cycle so the event
+ * is two bitslong:
+ *0b00 no floating-point instruction renamed
+ *0b01 one floating-point instruction renamed
+ *0b10 two floating-point instructions renamed
+ */
+#define XPM_EVENT_FLOATRENAME 0x73U
+
+/*
+ * Counts the number of Neon instructions going through the Register Rename
+ * stage.Instructions are still speculative in this stage.
+ * Two NEON instructions can be renamed in the same cycle so the event is two
+ * bits long:
+ *0b00 no NEON instruction renamed
+ *0b01 one NEON instruction renamed
+ *0b10 two NEON instructions renamed
+ */
+#define XPM_EVENT_NEONRENAME 0x74U
+
+/*
+ * Counts the number of cycles where the processor is stalled because PLD slots
+ * are all full
+ */
+#define XPM_EVENT_PLDSTALL 0x80U
+
+/*
+ * Counts the number of cycles when the processor is stalled and the data side
+ * is stalled too because it is full and executing writes to the external
+ * memory
+ */
+#define XPM_EVENT_WRITESTALL 0x81U
+
+/*
+ * Counts the number of stall cycles due to main TLB misses on requests issued
+ * by the instruction side
+ */
+#define XPM_EVENT_INSTRTLBSTALL 0x82U
+
+/*
+ * Counts the number of stall cycles due to main TLB misses on requests issued
+ * by the data side
+ */
+#define XPM_EVENT_DATATLBSTALL 0x83U
+
+/*
+ * Counts the number of stall cycles due to micro TLB misses on the instruction
+ * side. This event does not include main TLB miss stall cycles that are already
+ * counted in the corresponding main TLB event
+ */
+#define XPM_EVENT_INSTR_uTLBSTALL 0x84U
+
+/*
+ * Counts the number of stall cycles due to micro TLB misses on the data side.
+ * This event does not include main TLB miss stall cycles that are already
+ * counted in the corresponding main TLB event
+ */
+#define XPM_EVENT_DATA_uTLBSTALL 0x85U
+
+/*
+ * Counts the number of stall cycles because of the execution of a DMB memory
+ * barrier. This includes all DMB instructions being executed, even
+ * speculatively
+ */
+#define XPM_EVENT_DMB_STALL 0x86U
+
+/*
+ * Counts the number of cycles during which the integer core clock is enabled
+ */
+#define XPM_EVENT_INT_CLKEN 0x8AU
+
+/*
+ * Counts the number of cycles during which the Data Engine clock is enabled
+ */
+#define XPM_EVENT_DE_CLKEN 0x8BU
+
+/*
+ * Counts the number of ISB instructions architecturally executed
+ */
+#define XPM_EVENT_INSTRISB 0x90U
+
+/*
+ * Counts the number of DSB instructions architecturally executed
+ */
+#define XPM_EVENT_INSTRDSB 0x91U
+
+/*
+ * Counts the number of DMB instructions speculatively executed
+ */
+#define XPM_EVENT_INSTRDMB 0x92U
+
+/*
+ * Counts the number of external interrupts executed by the processor
+ */
+#define XPM_EVENT_EXTINT 0x93U
+
+/*
+ * PLE cache line request completed
+ */
+#define XPM_EVENT_PLE_LRC 0xA0U
+
+/*
+ * PLE cache line request skipped
+ */
+#define XPM_EVENT_PLE_LRS 0xA1U
+
+/*
+ * PLE FIFO flush
+ */
+#define XPM_EVENT_PLE_FLUSH 0xA2U
+
+/*
+ * PLE request complete
+ */
+#define XPM_EVENT_PLE_CMPL 0xA3U
+
+/*
+ * PLE FIFO overflow
+ */
+#define XPM_EVENT_PLE_OVFL 0xA4U
+
+/*
+ * PLE request programmed
+ */
+#define XPM_EVENT_PLE_PROG 0xA5U
+
+/*
+ * The following constants define the configurations for Cortex-A9 Performance
+ * Monitor Events. Each configuration configures the event counters for a set
+ * of events.
+ * -----------------------------------------------
+ * Config		PmCtr0... PmCtr5
+ * -----------------------------------------------
+ * XPM_CNTRCFG1		{ XPM_EVENT_SOFTINCR,
+ *			  XPM_EVENT_INSRFETCH_CACHEREFILL,
+ *			  XPM_EVENT_INSTRFECT_TLBREFILL,
+ *			  XPM_EVENT_DATA_CACHEREFILL,
+ *			  XPM_EVENT_DATA_CACHEACCESS,
+ *			  XPM_EVENT_DATA_TLBREFILL }
+ *
+ * XPM_CNTRCFG2		{ XPM_EVENT_DATA_READS,
+ *			  XPM_EVENT_DATA_WRITE,
+ *			  XPM_EVENT_EXCEPTION,
+ *			  XPM_EVENT_EXCEPRETURN,
+ *			  XPM_EVENT_CHANGECONTEXT,
+ *			  XPM_EVENT_SW_CHANGEPC }
+ *
+ * XPM_CNTRCFG3		{ XPM_EVENT_IMMEDBRANCH,
+ *			  XPM_EVENT_UNALIGNEDACCESS,
+ *			  XPM_EVENT_BRANCHMISS,
+ *			  XPM_EVENT_CLOCKCYCLES,
+ *			  XPM_EVENT_BRANCHPREDICT,
+ *			  XPM_EVENT_JAVABYTECODE }
+ *
+ * XPM_CNTRCFG4		{ XPM_EVENT_SWJAVABYTECODE,
+ *			  XPM_EVENT_JAVABACKBRANCH,
+ *			  XPM_EVENT_COHERLINEMISS,
+ *			  XPM_EVENT_COHERLINEHIT,
+ *			  XPM_EVENT_INSTRSTALL,
+ *			  XPM_EVENT_DATASTALL }
+ *
+ * XPM_CNTRCFG5		{ XPM_EVENT_MAINTLBSTALL,
+ *			  XPM_EVENT_STREXPASS,
+ *			  XPM_EVENT_STREXFAIL,
+ *			  XPM_EVENT_DATAEVICT,
+ *			  XPM_EVENT_NODISPATCH,
+ *			  XPM_EVENT_ISSUEEMPTY }
+ *
+ * XPM_CNTRCFG6		{ XPM_EVENT_INSTRRENAME,
+ *			  XPM_EVENT_PREDICTFUNCRET,
+ *			  XPM_EVENT_MAINEXEC,
+ *			  XPM_EVENT_SECEXEC,
+ *			  XPM_EVENT_LDRSTR,
+ *			  XPM_EVENT_FLOATRENAME }
+ *
+ * XPM_CNTRCFG7		{ XPM_EVENT_NEONRENAME,
+ *			  XPM_EVENT_PLDSTALL,
+ *			  XPM_EVENT_WRITESTALL,
+ *			  XPM_EVENT_INSTRTLBSTALL,
+ *			  XPM_EVENT_DATATLBSTALL,
+ *			  XPM_EVENT_INSTR_uTLBSTALL }
+ *
+ * XPM_CNTRCFG8		{ XPM_EVENT_DATA_uTLBSTALL,
+ *			  XPM_EVENT_DMB_STALL,
+ *			  XPM_EVENT_INT_CLKEN,
+ *			  XPM_EVENT_DE_CLKEN,
+ *			  XPM_EVENT_INSTRISB,
+ *			  XPM_EVENT_INSTRDSB }
+ *
+ * XPM_CNTRCFG9		{ XPM_EVENT_INSTRDMB,
+ *			  XPM_EVENT_EXTINT,
+ *			  XPM_EVENT_PLE_LRC,
+ *			  XPM_EVENT_PLE_LRS,
+ *			  XPM_EVENT_PLE_FLUSH,
+ *			  XPM_EVENT_PLE_CMPL }
+ *
+ * XPM_CNTRCFG10	{ XPM_EVENT_PLE_OVFL,
+ *			  XPM_EVENT_PLE_PROG,
+ *			  XPM_EVENT_PLE_LRC,
+ *			  XPM_EVENT_PLE_LRS,
+ *			  XPM_EVENT_PLE_FLUSH,
+ *			  XPM_EVENT_PLE_CMPL }
+ *
+ * XPM_CNTRCFG11	{ XPM_EVENT_DATASTALL,
+ *			  XPM_EVENT_INSRFETCH_CACHEREFILL,
+ *			  XPM_EVENT_INSTRFECT_TLBREFILL,
+ *			  XPM_EVENT_DATA_CACHEREFILL,
+ *			  XPM_EVENT_DATA_CACHEACCESS,
+ *			  XPM_EVENT_DATA_TLBREFILL }
+ */
+#define XPM_CNTRCFG1	0
+#define XPM_CNTRCFG2	1
+#define XPM_CNTRCFG3	2
+#define XPM_CNTRCFG4	3
+#define XPM_CNTRCFG5	4
+#define XPM_CNTRCFG6	5
+#define XPM_CNTRCFG7	6
+#define XPM_CNTRCFG8	7
+#define XPM_CNTRCFG9	8
+#define XPM_CNTRCFG10	9
+#define XPM_CNTRCFG11	10
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+/* Interface fuctions to access perfromance counters from abstraction layer */
+void Xpm_SetEvents(s32 PmcrCfg);
+void Xpm_GetEventCounters(u32 *PmCtrValue);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xpseudo_asm.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xpseudo_asm.h
new file mode 100644
index 0000000..533c477
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xpseudo_asm.h
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm.h
+*
+* This header file contains macros for using inline assembler code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a ecm  10/18/09 First release
+* 3.04a sdm  01/02/12 Remove redundant dsb in mcr instruction.
+* 

+*
+******************************************************************************/
+#ifndef XPSEUDO_ASM_H
+#define XPSEUDO_ASM_H
+
+#include "xreg_cortexa9.h"
+#ifdef __GNUC__
+ #include "xpseudo_asm_gcc.h"
+#elif defined (__ICCARM__)
+ #include "xpseudo_asm_iccarm.h"
+#else
+ #include "xpseudo_asm_rvct.h"
+#endif
+
+#endif /* XPSEUDO_ASM_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xreg_cortexa9.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xreg_cortexa9.h
new file mode 100644
index 0000000..7e2d909
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xreg_cortexa9.h
@@ -0,0 +1,591 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xreg_cortexa9.h
+*
+* This header file contains definitions for using inline assembler code. It is
+* written specifically for the GNU, ARMCC compiler.
+*
+* All of the ARM Cortex A9 GPRs, SPRs, and Debug Registers are defined along
+* with the positions of the bits within the registers.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 1.00a ecm/sdm  10/20/09 First release
+* 

+*
+******************************************************************************/
+#ifndef XREG_CORTEXA9_H
+#define XREG_CORTEXA9_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* GPRs */
+#define XREG_GPR0				r0
+#define XREG_GPR1				r1
+#define XREG_GPR2				r2
+#define XREG_GPR3				r3
+#define XREG_GPR4				r4
+#define XREG_GPR5				r5
+#define XREG_GPR6				r6
+#define XREG_GPR7				r7
+#define XREG_GPR8				r8
+#define XREG_GPR9				r9
+#define XREG_GPR10				r10
+#define XREG_GPR11				r11
+#define XREG_GPR12				r12
+#define XREG_GPR13				r13
+#define XREG_GPR14				r14
+#define XREG_GPR15				r15
+#define XREG_CPSR				cpsr
+
+/* Coprocessor number defines */
+#define XREG_CP0				0
+#define XREG_CP1				1
+#define XREG_CP2				2
+#define XREG_CP3				3
+#define XREG_CP4				4
+#define XREG_CP5				5
+#define XREG_CP6				6
+#define XREG_CP7				7
+#define XREG_CP8				8
+#define XREG_CP9				9
+#define XREG_CP10				10
+#define XREG_CP11				11
+#define XREG_CP12				12
+#define XREG_CP13				13
+#define XREG_CP14				14
+#define XREG_CP15				15
+
+/* Coprocessor control register defines */
+#define XREG_CR0				cr0
+#define XREG_CR1				cr1
+#define XREG_CR2				cr2
+#define XREG_CR3				cr3
+#define XREG_CR4				cr4
+#define XREG_CR5				cr5
+#define XREG_CR6				cr6
+#define XREG_CR7				cr7
+#define XREG_CR8				cr8
+#define XREG_CR9				cr9
+#define XREG_CR10				cr10
+#define XREG_CR11				cr11
+#define XREG_CR12				cr12
+#define XREG_CR13				cr13
+#define XREG_CR14				cr14
+#define XREG_CR15				cr15
+
+/* Current Processor Status Register (CPSR) Bits */
+#define XREG_CPSR_THUMB_MODE			0x20
+#define XREG_CPSR_MODE_BITS			0x1F
+#define XREG_CPSR_SYSTEM_MODE			0x1F
+#define XREG_CPSR_UNDEFINED_MODE		0x1B
+#define XREG_CPSR_DATA_ABORT_MODE		0x17
+#define XREG_CPSR_SVC_MODE			0x13
+#define XREG_CPSR_IRQ_MODE			0x12
+#define XREG_CPSR_FIQ_MODE			0x11
+#define XREG_CPSR_USER_MODE			0x10
+
+#define XREG_CPSR_IRQ_ENABLE			0x80
+#define XREG_CPSR_FIQ_ENABLE			0x40
+
+#define XREG_CPSR_N_BIT				0x80000000
+#define XREG_CPSR_Z_BIT				0x40000000
+#define XREG_CPSR_C_BIT				0x20000000
+#define XREG_CPSR_V_BIT				0x10000000
+
+
+/* CP15 defines */
+#if defined (__GNUC__) || defined (__ICCARM__)
+/* C0 Register defines */
+#define XREG_CP15_MAIN_ID			"p15, 0, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_TYPE			"p15, 0, %0,  c0,  c0, 1"
+#define XREG_CP15_TCM_TYPE			"p15, 0, %0,  c0,  c0, 2"
+#define XREG_CP15_TLB_TYPE			"p15, 0, %0,  c0,  c0, 3"
+#define XREG_CP15_MULTI_PROC_AFFINITY		"p15, 0, %0,  c0,  c0, 5"
+
+#define XREG_CP15_PROC_FEATURE_0		"p15, 0, %0,  c0,  c1, 0"
+#define XREG_CP15_PROC_FEATURE_1		"p15, 0, %0,  c0,  c1, 1"
+#define XREG_CP15_DEBUG_FEATURE_0		"p15, 0, %0,  c0,  c1, 2"
+#define XREG_CP15_MEMORY_FEATURE_0		"p15, 0, %0,  c0,  c1, 4"
+#define XREG_CP15_MEMORY_FEATURE_1		"p15, 0, %0,  c0,  c1, 5"
+#define XREG_CP15_MEMORY_FEATURE_2		"p15, 0, %0,  c0,  c1, 6"
+#define XREG_CP15_MEMORY_FEATURE_3		"p15, 0, %0,  c0,  c1, 7"
+
+#define XREG_CP15_INST_FEATURE_0		"p15, 0, %0,  c0,  c2, 0"
+#define XREG_CP15_INST_FEATURE_1		"p15, 0, %0,  c0,  c2, 1"
+#define XREG_CP15_INST_FEATURE_2		"p15, 0, %0,  c0,  c2, 2"
+#define XREG_CP15_INST_FEATURE_3		"p15, 0, %0,  c0,  c2, 3"
+#define XREG_CP15_INST_FEATURE_4		"p15, 0, %0,  c0,  c2, 4"
+
+#define XREG_CP15_CACHE_SIZE_ID			"p15, 1, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_LEVEL_ID		"p15, 1, %0,  c0,  c0, 1"
+#define XREG_CP15_AUXILARY_ID			"p15, 1, %0,  c0,  c0, 7"
+
+#define XREG_CP15_CACHE_SIZE_SEL		"p15, 2, %0,  c0,  c0, 0"
+
+/* C1 Register Defines */
+#define XREG_CP15_SYS_CONTROL			"p15, 0, %0,  c1,  c0, 0"
+#define XREG_CP15_AUX_CONTROL			"p15, 0, %0,  c1,  c0, 1"
+#define XREG_CP15_CP_ACCESS_CONTROL		"p15, 0, %0,  c1,  c0, 2"
+
+#define XREG_CP15_SECURE_CONFIG			"p15, 0, %0,  c1,  c1, 0"
+#define XREG_CP15_SECURE_DEBUG_ENABLE		"p15, 0, %0,  c1,  c1, 1"
+#define XREG_CP15_NS_ACCESS_CONTROL		"p15, 0, %0,  c1,  c1, 2"
+#define XREG_CP15_VIRTUAL_CONTROL		"p15, 0, %0,  c1,  c1, 3"
+
+#else /* RVCT */
+/* C0 Register defines */
+#define XREG_CP15_MAIN_ID			"cp15:0:c0:c0:0"
+#define XREG_CP15_CACHE_TYPE			"cp15:0:c0:c0:1"
+#define XREG_CP15_TCM_TYPE			"cp15:0:c0:c0:2"
+#define XREG_CP15_TLB_TYPE			"cp15:0:c0:c0:3"
+#define XREG_CP15_MULTI_PROC_AFFINITY		"cp15:0:c0:c0:5"
+
+#define XREG_CP15_PROC_FEATURE_0		"cp15:0:c0:c1:0"
+#define XREG_CP15_PROC_FEATURE_1		"cp15:0:c0:c1:1"
+#define XREG_CP15_DEBUG_FEATURE_0		"cp15:0:c0:c1:2"
+#define XREG_CP15_MEMORY_FEATURE_0		"cp15:0:c0:c1:4"
+#define XREG_CP15_MEMORY_FEATURE_1		"cp15:0:c0:c1:5"
+#define XREG_CP15_MEMORY_FEATURE_2		"cp15:0:c0:c1:6"
+#define XREG_CP15_MEMORY_FEATURE_3		"cp15:0:c0:c1:7"
+
+#define XREG_CP15_INST_FEATURE_0		"cp15:0:c0:c2:0"
+#define XREG_CP15_INST_FEATURE_1		"cp15:0:c0:c2:1"
+#define XREG_CP15_INST_FEATURE_2		"cp15:0:c0:c2:2"
+#define XREG_CP15_INST_FEATURE_3		"cp15:0:c0:c2:3"
+#define XREG_CP15_INST_FEATURE_4		"cp15:0:c0:c2:4"
+
+#define XREG_CP15_CACHE_SIZE_ID			"cp15:1:c0:c0:0"
+#define XREG_CP15_CACHE_LEVEL_ID		"cp15:1:c0:c0:1"
+#define XREG_CP15_AUXILARY_ID			"cp15:1:c0:c0:7"
+
+#define XREG_CP15_CACHE_SIZE_SEL		"cp15:2:c0:c0:0"
+
+/* C1 Register Defines */
+#define XREG_CP15_SYS_CONTROL			"cp15:0:c1:c0:0"
+#define XREG_CP15_AUX_CONTROL			"cp15:0:c1:c0:1"
+#define XREG_CP15_CP_ACCESS_CONTROL		"cp15:0:c1:c0:2"
+
+#define XREG_CP15_SECURE_CONFIG			"cp15:0:c1:c1:0"
+#define XREG_CP15_SECURE_DEBUG_ENABLE		"cp15:0:c1:c1:1"
+#define XREG_CP15_NS_ACCESS_CONTROL		"cp15:0:c1:c1:2"
+#define XREG_CP15_VIRTUAL_CONTROL		"cp15:0:c1:c1:3"
+#endif
+
+/* XREG_CP15_CONTROL bit defines */
+#define XREG_CP15_CONTROL_TE_BIT		0x40000000U
+#define XREG_CP15_CONTROL_AFE_BIT		0x20000000U
+#define XREG_CP15_CONTROL_TRE_BIT		0x10000000U
+#define XREG_CP15_CONTROL_NMFI_BIT		0x08000000U
+#define XREG_CP15_CONTROL_EE_BIT		0x02000000U
+#define XREG_CP15_CONTROL_HA_BIT		0x00020000U
+#define XREG_CP15_CONTROL_RR_BIT		0x00004000U
+#define XREG_CP15_CONTROL_V_BIT			0x00002000U
+#define XREG_CP15_CONTROL_I_BIT			0x00001000U
+#define XREG_CP15_CONTROL_Z_BIT			0x00000800U
+#define XREG_CP15_CONTROL_SW_BIT		0x00000400U
+#define XREG_CP15_CONTROL_B_BIT			0x00000080U
+#define XREG_CP15_CONTROL_C_BIT			0x00000004U
+#define XREG_CP15_CONTROL_A_BIT			0x00000002U
+#define XREG_CP15_CONTROL_M_BIT			0x00000001U
+
+#if defined (__GNUC__) || defined (__ICCARM__)
+/* C2 Register Defines */
+#define XREG_CP15_TTBR0				"p15, 0, %0,  c2,  c0, 0"
+#define XREG_CP15_TTBR1				"p15, 0, %0,  c2,  c0, 1"
+#define XREG_CP15_TTB_CONTROL			"p15, 0, %0,  c2,  c0, 2"
+
+/* C3 Register Defines */
+#define XREG_CP15_DOMAIN_ACCESS_CTRL		"p15, 0, %0,  c3,  c0, 0"
+
+/* C4 Register Defines */
+/* Not Used */
+
+/* C5 Register Defines */
+#define XREG_CP15_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 0"
+#define XREG_CP15_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 1"
+
+#define XREG_CP15_AUX_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 0"
+#define XREG_CP15_AUX_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 1"
+
+/* C6 Register Defines */
+#define XREG_CP15_DATA_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 0"
+#define XREG_CP15_INST_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 2"
+
+/* C7 Register Defines */
+#define XREG_CP15_NOP				"p15, 0, %0,  c7,  c0, 4"
+
+#define XREG_CP15_INVAL_IC_POU_IS		"p15, 0, %0,  c7,  c1, 0"
+#define XREG_CP15_INVAL_BRANCH_ARRAY_IS		"p15, 0, %0,  c7,  c1, 6"
+
+#define XREG_CP15_PHYS_ADDR			"p15, 0, %0,  c7,  c4, 0"
+
+#define XREG_CP15_INVAL_IC_POU			"p15, 0, %0,  c7,  c5, 0"
+#define XREG_CP15_INVAL_IC_LINE_MVA_POU		"p15, 0, %0,  c7,  c5, 1"
+
+/* The CP15 register access below has been deprecated in favor of the new
+ * isb instruction in Cortex A9.
+ */
+#define XREG_CP15_INST_SYNC_BARRIER		"p15, 0, %0,  c7,  c5, 4"
+#define XREG_CP15_INVAL_BRANCH_ARRAY		"p15, 0, %0,  c7,  c5, 6"
+
+#define XREG_CP15_INVAL_DC_LINE_MVA_POC		"p15, 0, %0,  c7,  c6, 1"
+#define XREG_CP15_INVAL_DC_LINE_SW		"p15, 0, %0,  c7,  c6, 2"
+
+#define XREG_CP15_VA_TO_PA_CURRENT_0		"p15, 0, %0,  c7,  c8, 0"
+#define XREG_CP15_VA_TO_PA_CURRENT_1		"p15, 0, %0,  c7,  c8, 1"
+#define XREG_CP15_VA_TO_PA_CURRENT_2		"p15, 0, %0,  c7,  c8, 2"
+#define XREG_CP15_VA_TO_PA_CURRENT_3		"p15, 0, %0,  c7,  c8, 3"
+
+#define XREG_CP15_VA_TO_PA_OTHER_0		"p15, 0, %0,  c7,  c8, 4"
+#define XREG_CP15_VA_TO_PA_OTHER_1		"p15, 0, %0,  c7,  c8, 5"
+#define XREG_CP15_VA_TO_PA_OTHER_2		"p15, 0, %0,  c7,  c8, 6"
+#define XREG_CP15_VA_TO_PA_OTHER_3		"p15, 0, %0,  c7,  c8, 7"
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POC		"p15, 0, %0,  c7, c10, 1"
+#define XREG_CP15_CLEAN_DC_LINE_SW		"p15, 0, %0,  c7, c10, 2"
+
+/* The next two CP15 register accesses below have been deprecated in favor
+ * of the new dsb and dmb instructions in Cortex A9.
+ */
+#define XREG_CP15_DATA_SYNC_BARRIER		"p15, 0, %0,  c7, c10, 4"
+#define XREG_CP15_DATA_MEMORY_BARRIER		"p15, 0, %0,  c7, c10, 5"
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POU		"p15, 0, %0,  c7, c11, 1"
+
+#define XREG_CP15_NOP2				"p15, 0, %0,  c7, c13, 1"
+
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC	"p15, 0, %0,  c7, c14, 1"
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_SW	"p15, 0, %0,  c7, c14, 2"
+
+/* C8 Register Defines */
+#define XREG_CP15_INVAL_TLB_IS			"p15, 0, %0,  c8,  c3, 0"
+#define XREG_CP15_INVAL_TLB_MVA_IS		"p15, 0, %0,  c8,  c3, 1"
+#define XREG_CP15_INVAL_TLB_ASID_IS		"p15, 0, %0,  c8,  c3, 2"
+#define XREG_CP15_INVAL_TLB_MVA_ASID_IS		"p15, 0, %0,  c8,  c3, 3"
+
+#define XREG_CP15_INVAL_ITLB_UNLOCKED		"p15, 0, %0,  c8,  c5, 0"
+#define XREG_CP15_INVAL_ITLB_MVA		"p15, 0, %0,  c8,  c5, 1"
+#define XREG_CP15_INVAL_ITLB_ASID		"p15, 0, %0,  c8,  c5, 2"
+
+#define XREG_CP15_INVAL_DTLB_UNLOCKED		"p15, 0, %0,  c8,  c6, 0"
+#define XREG_CP15_INVAL_DTLB_MVA		"p15, 0, %0,  c8,  c6, 1"
+#define XREG_CP15_INVAL_DTLB_ASID		"p15, 0, %0,  c8,  c6, 2"
+
+#define XREG_CP15_INVAL_UTLB_UNLOCKED		"p15, 0, %0,  c8,  c7, 0"
+#define XREG_CP15_INVAL_UTLB_MVA		"p15, 0, %0,  c8,  c7, 1"
+#define XREG_CP15_INVAL_UTLB_ASID		"p15, 0, %0,  c8,  c7, 2"
+#define XREG_CP15_INVAL_UTLB_MVA_ASID		"p15, 0, %0,  c8,  c7, 3"
+
+/* C9 Register Defines */
+#define XREG_CP15_PERF_MONITOR_CTRL		"p15, 0, %0,  c9, c12, 0"
+#define XREG_CP15_COUNT_ENABLE_SET		"p15, 0, %0,  c9, c12, 1"
+#define XREG_CP15_COUNT_ENABLE_CLR		"p15, 0, %0,  c9, c12, 2"
+#define XREG_CP15_V_FLAG_STATUS			"p15, 0, %0,  c9, c12, 3"
+#define XREG_CP15_SW_INC			"p15, 0, %0,  c9, c12, 4"
+#define XREG_CP15_EVENT_CNTR_SEL		"p15, 0, %0,  c9, c12, 5"
+
+#define XREG_CP15_PERF_CYCLE_COUNTER		"p15, 0, %0,  c9, c13, 0"
+#define XREG_CP15_EVENT_TYPE_SEL		"p15, 0, %0,  c9, c13, 1"
+#define XREG_CP15_PERF_MONITOR_COUNT		"p15, 0, %0,  c9, c13, 2"
+
+#define XREG_CP15_USER_ENABLE			"p15, 0, %0,  c9, c14, 0"
+#define XREG_CP15_INTR_ENABLE_SET		"p15, 0, %0,  c9, c14, 1"
+#define XREG_CP15_INTR_ENABLE_CLR		"p15, 0, %0,  c9, c14, 2"
+
+/* C10 Register Defines */
+#define XREG_CP15_TLB_LOCKDWN			"p15, 0, %0, c10,  c0, 0"
+
+#define XREG_CP15_PRI_MEM_REMAP			"p15, 0, %0, c10,  c2, 0"
+#define XREG_CP15_NORM_MEM_REMAP		"p15, 0, %0, c10,  c2, 1"
+
+/* C11 Register Defines */
+/* Not used */
+
+/* C12 Register Defines */
+#define XREG_CP15_VEC_BASE_ADDR			"p15, 0, %0, c12,  c0, 0"
+#define XREG_CP15_MONITOR_VEC_BASE_ADDR		"p15, 0, %0, c12,  c0, 1"
+
+#define XREG_CP15_INTERRUPT_STATUS		"p15, 0, %0, c12,  c1, 0"
+#define XREG_CP15_VIRTUALIZATION_INTR		"p15, 0, %0, c12,  c1, 1"
+
+/* C13 Register Defines */
+#define XREG_CP15_CONTEXT_ID			"p15, 0, %0, c13,  c0, 1"
+#define USER_RW_THREAD_PID			"p15, 0, %0, c13,  c0, 2"
+#define USER_RO_THREAD_PID			"p15, 0, %0, c13,  c0, 3"
+#define USER_PRIV_THREAD_PID			"p15, 0, %0, c13,  c0, 4"
+
+/* C14 Register Defines */
+/* not used */
+
+/* C15 Register Defines */
+#define XREG_CP15_POWER_CTRL			"p15, 0, %0, c15,  c0, 0"
+#define XREG_CP15_CONFIG_BASE_ADDR		"p15, 4, %0, c15,  c0, 0"
+
+#define XREG_CP15_READ_TLB_ENTRY		"p15, 5, %0, c15,  c4, 2"
+#define XREG_CP15_WRITE_TLB_ENTRY		"p15, 5, %0, c15,  c4, 4"
+
+#define XREG_CP15_MAIN_TLB_VA			"p15, 5, %0, c15,  c5, 2"
+
+#define XREG_CP15_MAIN_TLB_PA			"p15, 5, %0, c15,  c6, 2"
+
+#define XREG_CP15_MAIN_TLB_ATTR			"p15, 5, %0, c15,  c7, 2"
+
+#else
+/* C2 Register Defines */
+#define XREG_CP15_TTBR0				"cp15:0:c2:c0:0"
+#define XREG_CP15_TTBR1				"cp15:0:c2:c0:1"
+#define XREG_CP15_TTB_CONTROL			"cp15:0:c2:c0:2"
+
+/* C3 Register Defines */
+#define XREG_CP15_DOMAIN_ACCESS_CTRL		"cp15:0:c3:c0:0"
+
+/* C4 Register Defines */
+/* Not Used */
+
+/* C5 Register Defines */
+#define XREG_CP15_DATA_FAULT_STATUS		"cp15:0:c5:c0:0"
+#define XREG_CP15_INST_FAULT_STATUS		"cp15:0:c5:c0:1"
+
+#define XREG_CP15_AUX_DATA_FAULT_STATUS		"cp15:0:c5:c1:0"
+#define XREG_CP15_AUX_INST_FAULT_STATUS		"cp15:0:c5:c1:1"
+
+/* C6 Register Defines */
+#define XREG_CP15_DATA_FAULT_ADDRESS		"cp15:0:c6:c0:0"
+#define XREG_CP15_INST_FAULT_ADDRESS		"cp15:0:c6:c0:2"
+
+/* C7 Register Defines */
+#define XREG_CP15_NOP				"cp15:0:c7:c0:4"
+
+#define XREG_CP15_INVAL_IC_POU_IS		"cp15:0:c7:c1:0"
+#define XREG_CP15_INVAL_BRANCH_ARRAY_IS		"cp15:0:c7:c1:6"
+
+#define XREG_CP15_PHYS_ADDR			"cp15:0:c7:c4:0"
+
+#define XREG_CP15_INVAL_IC_POU			"cp15:0:c7:c5:0"
+#define XREG_CP15_INVAL_IC_LINE_MVA_POU		"cp15:0:c7:c5:1"
+
+/* The CP15 register access below has been deprecated in favor of the new
+ * isb instruction in Cortex A9.
+ */
+#define XREG_CP15_INST_SYNC_BARRIER		"cp15:0:c7:c5:4"
+#define XREG_CP15_INVAL_BRANCH_ARRAY		"cp15:0:c7:c5:6"
+
+#define XREG_CP15_INVAL_DC_LINE_MVA_POC		"cp15:0:c7:c6:1"
+#define XREG_CP15_INVAL_DC_LINE_SW		"cp15:0:c7:c6:2"
+
+#define XREG_CP15_VA_TO_PA_CURRENT_0		"cp15:0:c7:c8:0"
+#define XREG_CP15_VA_TO_PA_CURRENT_1		"cp15:0:c7:c8:1"
+#define XREG_CP15_VA_TO_PA_CURRENT_2		"cp15:0:c7:c8:2"
+#define XREG_CP15_VA_TO_PA_CURRENT_3		"cp15:0:c7:c8:3"
+
+#define XREG_CP15_VA_TO_PA_OTHER_0		"cp15:0:c7:c8:4"
+#define XREG_CP15_VA_TO_PA_OTHER_1		"cp15:0:c7:c8:5"
+#define XREG_CP15_VA_TO_PA_OTHER_2		"cp15:0:c7:c8:6"
+#define XREG_CP15_VA_TO_PA_OTHER_3		"cp15:0:c7:c8:7"
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POC		"cp15:0:c7:c10:1"
+#define XREG_CP15_CLEAN_DC_LINE_SW		"cp15:0:c7:c10:2"
+
+/* The next two CP15 register accesses below have been deprecated in favor
+ * of the new dsb and dmb instructions in Cortex A9.
+ */
+#define XREG_CP15_DATA_SYNC_BARRIER		"cp15:0:c7:c10:4"
+#define XREG_CP15_DATA_MEMORY_BARRIER		"cp15:0:c7:c10:5"
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POU		"cp15:0:c7:c11:1"
+
+#define XREG_CP15_NOP2				"cp15:0:c7:c13:1"
+
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC	"cp15:0:c7:c14:1"
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_SW	"cp15:0:c7:c14:2"
+
+/* C8 Register Defines */
+#define XREG_CP15_INVAL_TLB_IS			"cp15:0:c8:c3:0"
+#define XREG_CP15_INVAL_TLB_MVA_IS		"cp15:0:c8:c3:1"
+#define XREG_CP15_INVAL_TLB_ASID_IS		"cp15:0:c8:c3:2"
+#define XREG_CP15_INVAL_TLB_MVA_ASID_IS		"cp15:0:c8:c3:3"
+
+#define XREG_CP15_INVAL_ITLB_UNLOCKED		"cp15:0:c8:c5:0"
+#define XREG_CP15_INVAL_ITLB_MVA		"cp15:0:c8:c5:1"
+#define XREG_CP15_INVAL_ITLB_ASID		"cp15:0:c8:c5:2"
+
+#define XREG_CP15_INVAL_DTLB_UNLOCKED		"cp15:0:c8:c6:0"
+#define XREG_CP15_INVAL_DTLB_MVA		"cp15:0:c8:c6:1"
+#define XREG_CP15_INVAL_DTLB_ASID		"cp15:0:c8:c6:2"
+
+#define XREG_CP15_INVAL_UTLB_UNLOCKED		"cp15:0:c8:c7:0"
+#define XREG_CP15_INVAL_UTLB_MVA		"cp15:0:c8:c7:1"
+#define XREG_CP15_INVAL_UTLB_ASID		"cp15:0:c8:c7:2"
+#define XREG_CP15_INVAL_UTLB_MVA_ASID		"cp15:0:c8:c7:3"
+
+/* C9 Register Defines */
+#define XREG_CP15_PERF_MONITOR_CTRL		"cp15:0:c9:c12:0"
+#define XREG_CP15_COUNT_ENABLE_SET		"cp15:0:c9:c12:1"
+#define XREG_CP15_COUNT_ENABLE_CLR		"cp15:0:c9:c12:2"
+#define XREG_CP15_V_FLAG_STATUS			"cp15:0:c9:c12:3"
+#define XREG_CP15_SW_INC			"cp15:0:c9:c12:4"
+#define XREG_CP15_EVENT_CNTR_SEL		"cp15:0:c9:c12:5"
+
+#define XREG_CP15_PERF_CYCLE_COUNTER		"cp15:0:c9:c13:0"
+#define XREG_CP15_EVENT_TYPE_SEL		"cp15:0:c9:c13:1"
+#define XREG_CP15_PERF_MONITOR_COUNT		"cp15:0:c9:c13:2"
+
+#define XREG_CP15_USER_ENABLE			"cp15:0:c9:c14:0"
+#define XREG_CP15_INTR_ENABLE_SET		"cp15:0:c9:c14:1"
+#define XREG_CP15_INTR_ENABLE_CLR		"cp15:0:c9:c14:2"
+
+/* C10 Register Defines */
+#define XREG_CP15_TLB_LOCKDWN			"cp15:0:c10:c0:0"
+
+#define XREG_CP15_PRI_MEM_REMAP			"cp15:0:c10:c2:0"
+#define XREG_CP15_NORM_MEM_REMAP		"cp15:0:c10:c2:1"
+
+/* C11 Register Defines */
+/* Not used */
+
+/* C12 Register Defines */
+#define XREG_CP15_VEC_BASE_ADDR			"cp15:0:c12:c0:0"
+#define XREG_CP15_MONITOR_VEC_BASE_ADDR		"cp15:0:c12:c0:1"
+
+#define XREG_CP15_INTERRUPT_STATUS		"cp15:0:c12:c1:0"
+#define XREG_CP15_VIRTUALIZATION_INTR		"cp15:0:c12:c1:1"
+
+/* C13 Register Defines */
+#define XREG_CP15_CONTEXT_ID			"cp15:0:c13:c0:1"
+#define USER_RW_THREAD_PID			"cp15:0:c13:c0:2"
+#define USER_RO_THREAD_PID			"cp15:0:c13:c0:3"
+#define USER_PRIV_THREAD_PID			"cp15:0:c13:c0:4"
+
+/* C14 Register Defines */
+/* not used */
+
+/* C15 Register Defines */
+#define XREG_CP15_POWER_CTRL			"cp15:0:c15:c0:0"
+#define XREG_CP15_CONFIG_BASE_ADDR		"cp15:4:c15:c0:0"
+
+#define XREG_CP15_READ_TLB_ENTRY		"cp15:5:c15:c4:2"
+#define XREG_CP15_WRITE_TLB_ENTRY		"cp15:5:c15:c4:4"
+
+#define XREG_CP15_MAIN_TLB_VA			"cp15:5:c15:c5:2"
+
+#define XREG_CP15_MAIN_TLB_PA			"cp15:5:c15:c6:2"
+
+#define XREG_CP15_MAIN_TLB_ATTR			"cp15:5:c15:c7:2"
+#endif
+
+
+/* MPE register definitions */
+#define XREG_FPSID				c0
+#define XREG_FPSCR				c1
+#define XREG_MVFR1				c6
+#define XREG_MVFR0				c7
+#define XREG_FPEXC				c8
+#define XREG_FPINST				c9
+#define XREG_FPINST2				c10
+
+/* FPSID bits */
+#define XREG_FPSID_IMPLEMENTER_BIT	(24)
+#define XREG_FPSID_IMPLEMENTER_MASK	(0xFF << FPSID_IMPLEMENTER_BIT)
+#define XREG_FPSID_SOFTWARE		(1<<23)
+#define XREG_FPSID_ARCH_BIT		(16)
+#define XREG_FPSID_ARCH_MASK		(0xF  << FPSID_ARCH_BIT)
+#define XREG_FPSID_PART_BIT		(8)
+#define XREG_FPSID_PART_MASK		(0xFF << FPSID_PART_BIT)
+#define XREG_FPSID_VARIANT_BIT		(4)
+#define XREG_FPSID_VARIANT_MASK		(0xF  << FPSID_VARIANT_BIT)
+#define XREG_FPSID_REV_BIT		(0)
+#define XREG_FPSID_REV_MASK		(0xF  << FPSID_REV_BIT)
+
+/* FPSCR bits */
+#define XREG_FPSCR_N_BIT		(1 << 31)
+#define XREG_FPSCR_Z_BIT		(1 << 30)
+#define XREG_FPSCR_C_BIT		(1 << 29)
+#define XREG_FPSCR_V_BIT		(1 << 28)
+#define XREG_FPSCR_QC			(1 << 27)
+#define XREG_FPSCR_AHP			(1 << 26)
+#define XREG_FPSCR_DEFAULT_NAN		(1 << 25)
+#define XREG_FPSCR_FLUSHTOZERO		(1 << 24)
+#define XREG_FPSCR_ROUND_NEAREST	(0 << 22)
+#define XREG_FPSCR_ROUND_PLUSINF	(1 << 22)
+#define XREG_FPSCR_ROUND_MINUSINF	(2 << 22)
+#define XREG_FPSCR_ROUND_TOZERO		(3 << 22)
+#define XREG_FPSCR_RMODE_BIT		(22)
+#define XREG_FPSCR_RMODE_MASK		(3 << FPSCR_RMODE_BIT)
+#define XREG_FPSCR_STRIDE_BIT		(20)
+#define XREG_FPSCR_STRIDE_MASK		(3 << FPSCR_STRIDE_BIT)
+#define XREG_FPSCR_LENGTH_BIT		(16)
+#define XREG_FPSCR_LENGTH_MASK		(7 << FPSCR_LENGTH_BIT)
+#define XREG_FPSCR_IDC			(1 << 7)
+#define XREG_FPSCR_IXC			(1 << 4)
+#define XREG_FPSCR_UFC			(1 << 3)
+#define XREG_FPSCR_OFC			(1 << 2)
+#define XREG_FPSCR_DZC			(1 << 1)
+#define XREG_FPSCR_IOC			(1 << 0)
+
+/* MVFR0 bits */
+#define XREG_MVFR0_RMODE_BIT		(28)
+#define XREG_MVFR0_RMODE_MASK		(0xF << XREG_MVFR0_RMODE_BIT)
+#define XREG_MVFR0_SHORT_VEC_BIT	(24)
+#define XREG_MVFR0_SHORT_VEC_MASK	(0xF << XREG_MVFR0_SHORT_VEC_BIT)
+#define XREG_MVFR0_SQRT_BIT		(20)
+#define XREG_MVFR0_SQRT_MASK		(0xF << XREG_MVFR0_SQRT_BIT)
+#define XREG_MVFR0_DIVIDE_BIT		(16)
+#define XREG_MVFR0_DIVIDE_MASK		(0xF << XREG_MVFR0_DIVIDE_BIT)
+#define XREG_MVFR0_EXEC_TRAP_BIT	(12)
+#define XREG_MVFR0_EXEC_TRAP_MASK	(0xF << XREG_MVFR0_EXEC_TRAP_BIT)
+#define XREG_MVFR0_DP_BIT		(8)
+#define XREG_MVFR0_DP_MASK		(0xF << XREG_MVFR0_DP_BIT)
+#define XREG_MVFR0_SP_BIT		(4)
+#define XREG_MVFR0_SP_MASK		(0xF << XREG_MVFR0_SP_BIT)
+#define XREG_MVFR0_A_SIMD_BIT		(0)
+#define XREG_MVFR0_A_SIMD_MASK		(0xF << MVFR0_A_SIMD_BIT)
+
+/* FPEXC bits */
+#define XREG_FPEXC_EX			(1 << 31)
+#define XREG_FPEXC_EN			(1 << 30)
+#define XREG_FPEXC_DEX			(1 << 29)
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XREG_CORTEXA9_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xtime_l.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xtime_l.c
new file mode 100644
index 0000000..9ebdecb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xtime_l.c
@@ -0,0 +1,119 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.c
+*
+* This file contains low level functions to get/set time from the Global Timer
+* register in the ARM Cortex A9 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 1.00a rp/sdm 11/03/09 Initial release.
+* 3.07a sgd    07/05/12 Upadted get/set time functions to make use Global Timer
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xtime_l.h"
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+/****************************************************************************
+*
+* Set the time in the Global Timer Counter Register.
+*
+* @param	Value to be written to the Global Timer Counter Register.
+*
+* @return	None.
+*
+* @note		In multiprocessor environment reference time will reset/lost for
+*		all processors, when this function called by any one processor.
+*
+****************************************************************************/
+void XTime_SetTime(XTime Xtime_Global)
+{
+	/* Disable Global Timer */
+	Xil_Out32((u32)GLOBAL_TMR_BASEADDR + (u32)GTIMER_CONTROL_OFFSET, (u32)0x0);
+
+	/* Updating Global Timer Counter Register */
+	Xil_Out32((u32)GLOBAL_TMR_BASEADDR + (u32)GTIMER_COUNTER_LOWER_OFFSET, (u32)Xtime_Global);
+	Xil_Out32((u32)GLOBAL_TMR_BASEADDR + (u32)GTIMER_COUNTER_UPPER_OFFSET,
+		(u32)((u32)(Xtime_Global>>32U)));
+
+	/* Enable Global Timer */
+	Xil_Out32((u32)GLOBAL_TMR_BASEADDR + (u32)GTIMER_CONTROL_OFFSET, (u32)0x1);
+}
+
+/****************************************************************************
+*
+* Get the time from the Global Timer Counter Register.
+*
+* @param	Pointer to the location to be updated with the time.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XTime_GetTime(XTime *Xtime_Global)
+{
+	u32 low;
+	u32 high;
+
+	/* Reading Global Timer Counter Register */
+	do
+	{
+		high = Xil_In32(GLOBAL_TMR_BASEADDR + GTIMER_COUNTER_UPPER_OFFSET);
+		low = Xil_In32(GLOBAL_TMR_BASEADDR + GTIMER_COUNTER_LOWER_OFFSET);
+	} while(Xil_In32(GLOBAL_TMR_BASEADDR + GTIMER_COUNTER_UPPER_OFFSET) != high);
+
+	*Xtime_Global = (((XTime) high) << 32U) | (XTime) low;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xtime_l.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xtime_l.h
new file mode 100644
index 0000000..b944dc7
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexa9/xtime_l.h
@@ -0,0 +1,89 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.h
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 1.00a rp/sdm 11/03/09 Initial release.
+* 3.06a sgd    05/15/12 Upadted get/set time functions to make use Global Timer
+* 3.06a asa    06/17/12 Reverted back the changes to make use Global Timer.
+* 3.07a sgd    07/05/12 Upadted get/set time functions to make use Global Timer
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+
+#ifndef XTIME_H /* prevent circular inclusions */
+#define XTIME_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xparameters.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+typedef u64 XTime;
+
+/************************** Constant Definitions *****************************/
+#define GLOBAL_TMR_BASEADDR               XPAR_GLOBAL_TMR_BASEADDR
+#define GTIMER_COUNTER_LOWER_OFFSET       0x00U
+#define GTIMER_COUNTER_UPPER_OFFSET       0x04U
+#define GTIMER_CONTROL_OFFSET             0x08U
+
+
+/* Global Timer is always clocked at half of the CPU frequency */
+#define COUNTS_PER_SECOND          (XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ /2)
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void XTime_SetTime(XTime Xtime_Global);
+void XTime_GetTime(XTime *Xtime_Global);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XTIME_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_exit.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_exit.c
new file mode 100644
index 0000000..88e7f16
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_exit.c
@@ -0,0 +1,45 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/* _exit - Simple implementation. Does not return.
+*/
+__attribute__((weak)) void _exit (sint32 status)
+{
+  (void)status;
+  while (1)
+  {
+     __asm__("wfi");
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_open.c
new file mode 100644
index 0000000..b0625fe
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_open.c
@@ -0,0 +1,53 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode);
+}
+#endif
+
+/*
+ * _open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 _open(const char8 *buf, s32 flags, s32 mode)
+{
+  (void *)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_sbrk.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_sbrk.c
new file mode 100644
index 0000000..6017cff
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_sbrk.c
@@ -0,0 +1,70 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) caddr_t _sbrk ( s32 incr );
+}
+#endif
+
+__attribute__((weak)) caddr_t _sbrk ( s32 incr )
+{
+  static u8 *heap = NULL;
+  u8 *prev_heap;
+  static u8 *HeapEndPtr = (u8 *)&_heap_end;
+  caddr_t Status;
+
+  if (heap == NULL) {
+    heap = (u8 *)&_heap_start;
+  }
+  prev_heap = heap;
+
+  heap += incr;
+
+  if (heap > HeapEndPtr){
+	  Status = (caddr_t) -1;
+  }
+  else if (prev_heap != NULL) {
+	  Status = (caddr_t) ((void *)prev_heap);
+  }
+  else {
+	  Status = (caddr_t) -1;
+  }
+
+  return Status;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/abort.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/abort.c
new file mode 100644
index 0000000..a3bba51
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/abort.c
@@ -0,0 +1,42 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+
+/*
+ * abort -- go out via exit...
+ */
+__attribute__((weak)) void abort(void)
+{
+  _exit(1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/asm_vectors.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/asm_vectors.S
new file mode 100644
index 0000000..f243f6c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/asm_vectors.S
@@ -0,0 +1,121 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file asm_vectors.s
+*
+* This file contains the initial vector table for the Cortex R5 processor
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00  pkp	02/10/14 Initial version
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+.org 0
+.text
+
+.globl _boot
+.globl _vector_table
+
+.globl FIQInterrupt
+.globl IRQInterrupt
+.globl SWInterrupt
+.globl DataAbortInterrupt
+.globl PrefetchAbortInterrupt
+
+.globl IRQHandler
+.globl prof_pc
+
+.section .vectors, "a"
+_vector_table:
+	ldr	pc,=_boot
+	ldr	pc,=Undefined
+	ldr	pc,=SVCHandler
+	ldr	pc,=PrefetchAbortHandler
+	ldr	pc,=DataAbortHandler
+	NOP	/* Placeholder for address exception vector*/
+	ldr	pc,=IRQHandler
+	ldr	pc,=FIQHandler
+
+.text
+IRQHandler:					/* IRQ vector handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code*/
+	bl	IRQInterrupt			/* IRQ vector */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	subs	pc, lr, #4			/* adjust return */
+
+FIQHandler:					/* FIQ vector handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+FIQLoop:
+	bl	FIQInterrupt			/* FIQ vector */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	subs	pc, lr, #4			/* adjust return */
+
+Undefined:					/* Undefined handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	b	_prestart
+	movs	pc, lr
+
+SVCHandler:					/* SWI handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	tst	r0, #0x20			/* check the T bit */
+	ldrneh	r0, [lr,#-2]			/* Thumb mode */
+	bicne	r0, r0, #0xff00			/* Thumb mode */
+	ldreq	r0, [lr,#-4]			/* ARM mode */
+	biceq	r0, r0, #0xff000000		/* ARM mode */
+	bl	SWInterrupt			/* SWInterrupt: call C function here */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	movs	pc, lr				/* adjust return */
+
+DataAbortHandler:				/* Data Abort handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	bl	DataAbortInterrupt		/*DataAbortInterrupt :call C function here */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	subs	pc, lr, #8			/* adjust return */
+
+PrefetchAbortHandler:				/* Prefetch Abort handler */
+	stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code */
+	bl	PrefetchAbortInterrupt		/* PrefetchAbortInterrupt: call C function here */
+	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
+	subs	pc, lr, #4			/* adjust return */
+
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/boot.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/boot.S
new file mode 100644
index 0000000..f015048
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/boot.S
@@ -0,0 +1,211 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file boot.S
+*
+* This file contains the initial startup code for the Cortex R5 processor
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 pkp  02/10/14 Initial version
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#include "xparameters.h"
+
+
+.global _prestart
+.global _boot
+.global __stack
+.global __irq_stack
+.global __supervisor_stack
+.global __abort_stack
+.global __fiq_stack
+.global __undef_stack
+.global _vector_table
+
+
+/* Stack Pointer locations for boot code */
+.set Undef_stack,	__undef_stack
+.set FIQ_stack,		__fiq_stack
+.set Abort_stack,	__abort_stack
+.set SPV_stack,		__supervisor_stack
+.set IRQ_stack,		__irq_stack
+.set SYS_stack,		__stack
+
+.set vector_base,	_vector_table
+
+.section .boot,"axS"
+
+
+/* this initializes the various processor modes */
+
+_prestart:
+_boot:
+
+
+
+OKToRun:
+
+/* Initialize processor registers to 0 */
+	mov	r0,#0
+	mov	r1,#0
+	mov	r2,#0
+	mov	r3,#0
+	mov	r4,#0
+	mov	r5,#0
+	mov	r6,#0
+	mov	r7,#0
+	mov	r8,#0
+	mov	r9,#0
+	mov	r10,#0
+	mov	r11,#0
+	mov	r12,#0
+
+/* Disable MPU and caches */
+        mrc     p15, 0, r0, c1, c0, 0       	/* Read CP15 Control Register*/
+        bic     r0, r0, #0x05               	/* Disable MPU (M bit) and data cache (C bit) */
+        bic     r0, r0, #0x1000             	/* Disable instruction cache (I bit) */
+        dsb                                 	/* Ensure all previous loads/stores have completed */
+        mcr     p15, 0, r0, c1, c0, 0       	/* Write CP15 Control Register */
+        isb                                 	/* Ensure subsequent insts execute wrt new MPU settings */
+
+/* Disable Branch prediction */
+        mrc     p15, 0, r0, c1, c0, 1       	/* Read ACTLR */
+        orr     r0, r0, #(0x1 << 17)        	/* Enable RSDIS bit 17 to disable the return stack */
+        orr     r0, r0, #(0x1 << 16)        	/* Clear BP bit 15 and set BP bit 16:*/
+        bic     r0, r0, #(0x1 << 15)        	/* Branch always not taken and history table updates disabled*/
+        mcr     p15, 0, r0, c1, c0, 1       	/* Write ACTLR*/
+	dsb				    	/* Complete all outstanding explicit memory operations*/
+
+/* Invalidate caches */
+	mov	r0,#0				/* r0 = 0  */
+	dsb
+	mcr	p15, 0, r0, c7, c5, 0		/* invalidate icache */
+	mcr 	p15, 0, r0, c15, c5, 0      	/* Invalidate entire data cache*/
+	isb
+
+/* Initialize stack pointer for various mode */
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the irq stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x12			/* IRQ mode */
+	msr	cpsr, r2
+	ldr	r13,=IRQ_stack			/* IRQ stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the supervisor stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x13			/* supervisor mode */
+	msr	cpsr, r2
+	ldr	r13,=SPV_stack			/* Supervisor stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the Abort  stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x17			/* Abort mode */
+	msr	cpsr, r2
+	ldr	r13,=Abort_stack		/* Abort stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the FIQ stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x11			/* FIQ mode */
+	msr	cpsr, r2
+	ldr	r13,=FIQ_stack			/* FIQ stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the Undefine stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x1b			/* Undefine mode */
+	msr	cpsr, r2
+	ldr	r13,=Undef_stack		/* Undefine stack pointer */
+
+	mrs	r0, cpsr			/* get the current PSR */
+	mvn	r1, #0x1f			/* set up the system stack pointer */
+	and	r2, r1, r0
+	orr	r2, r2, #0x1F			/* SYS mode */
+	msr	cpsr, r2
+	ldr	r13,=SYS_stack			/* SYS stack pointer */
+
+	bl 	Init_MPU		/* Initialize MPU */
+
+/* Enable Branch prediction */
+	mrc     p15, 0, r0, c1, c0, 1       /* Read ACTLR*/
+        bic     r0, r0, #(0x1 << 17)        /* Clear RSDIS bit 17 to enable return stack*/
+        bic     r0, r0, #(0x1 << 16)        /* Clear BP bit 15 and BP bit 16:*/
+        bic     r0, r0, #(0x1 << 15)        /* Normal operation, BP is taken from the global history table.*/
+	mcr     p15, 0, r0, c1, c0, 1       /* Write ACTLR*/
+
+/* Enable icahce and dcache */
+	mrc 	p15,0,r1,c1,c0,0
+	ldr	r0, =0x1005
+	orr 	r1,r1,r0
+	dsb
+	mcr	p15,0,r1,c1,c0,0		/* Enable cache  */
+	isb					/* isb	flush prefetch buffer */
+
+/*
+ * Currently OpenAMP is supported only with HIVEC
+ * exception vectors are set to LOVEC if BSP is not built
+ * for OpenAMP as the default state is HIVEC
+ */
+
+#if USEAMP != 1
+/*set exception vector to LOVEC */
+	mrc	p15, 0, r0, c1, c0, 0
+	mvn	r1, #0x2000
+	and	r0, r0, r1
+	mcr	p15, 0, r0, c1, c0, 0
+#endif
+
+/* enable asynchronous abort exception */
+	mrs	r0, cpsr
+	bic	r0, r0, #0x100
+	msr	cpsr_xsf, r0
+
+        b 	_startup                       /* jump to C startup code */
+
+
+.Ldone:	b	.Ldone				/* Paranoia: we should never get here */
+
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/close.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/close.c
new file mode 100644
index 0000000..2a80e24
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/close.c
@@ -0,0 +1,47 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _close(s32 fd);
+}
+#endif
+
+/*
+ * close -- We don't need to do anything, but pretend we did.
+ */
+
+__attribute__((weak)) s32 _close(s32 fd)
+{
+  (void)fd;
+  return (0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/cpu_init.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/cpu_init.S
new file mode 100644
index 0000000..437d68f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/cpu_init.S
@@ -0,0 +1,79 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file cpu_init.s
+*
+* This file contains CPU specific initialization. Invoked from main CRT
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00  pkp	02/10/14 Initial version
+*
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+	.text
+	.global __cpu_init
+	.align 2
+__cpu_init:
+
+/* Clear cp15 regs with unknown reset values */
+	mov	r0, #0x0
+	mcr	p15, 0, r0, c5, c0, 0	/* DFSR */
+	mcr	p15, 0, r0, c5, c0, 1	/* IFSR */
+	mcr	p15, 0, r0, c6, c0, 0	/* DFAR */
+	mcr	p15, 0, r0, c6, c0, 2	/* IFAR */
+	mcr	p15, 0, r0, c9, c13, 2	/* PMXEVCNTR */
+	mcr	p15, 0, r0, c13, c0, 2	/* TPIDRURW */
+	mcr	p15, 0, r0, c13, c0, 3	/* TPIDRURO */
+
+
+/* Reset and start Cycle Counter */
+	mov	r2, #0x80000000		/* clear overflow */
+	mcr	p15, 0, r2, c9, c12, 3
+	mov	r2, #0xd		/* D, C, E */
+	mcr	p15, 0, r2, c9, c12, 0
+	mov	r2, #0x80000000		/* enable cycle counter */
+	mcr	p15, 0, r2, c9, c12, 1
+
+	bx	lr
+
+.end
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/errno.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/errno.c
new file mode 100644
index 0000000..cf6786b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/errno.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* The errno variable is stored in the reentrancy structure.  This
+   function returns its address for use by the macro errno defined in
+   errno.h.  */
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 * __errno (void);
+}
+#endif
+
+__attribute__((weak)) sint32 *
+__errno (void)
+{
+  return &_REENT->_errno;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/fcntl.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/fcntl.c
new file mode 100644
index 0000000..ebc0726
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/fcntl.c
@@ -0,0 +1,46 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+/*
+ * fcntl -- Manipulate a file descriptor.
+ *          We don't have a filesystem, so we do nothing.
+ */
+__attribute__((weak)) s32 fcntl (s32 fd, s32 cmd, s32 arg)
+{
+  (void)fd;
+  (void)cmd;
+  (void)arg;
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/fstat.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/fstat.c
new file mode 100644
index 0000000..3ea45a2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/fstat.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf);
+}
+#endif
+/*
+ * fstat -- Since we have no file system, we just return an error.
+ */
+__attribute__((weak)) s32 _fstat(s32 fd, struct stat *buf)
+{
+  (void)fd;
+  buf->st_mode = S_IFCHR; /* Always pretend to be a tty */
+
+  return (0);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/getpid.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/getpid.c
new file mode 100644
index 0000000..821ebbf
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/getpid.c
@@ -0,0 +1,51 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "xil_types.h"
+/*
+ * getpid -- only one process, so just return 1.
+ */
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _getpid(void);
+}
+#endif
+
+__attribute__((weak)) s32 getpid(void)
+{
+  return 1;
+}
+
+__attribute__((weak)) s32 _getpid(void)
+{
+  return 1;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/isatty.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/isatty.c
new file mode 100644
index 0000000..baaf3fa
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/isatty.c
@@ -0,0 +1,56 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 _isatty(sint32 fd);
+}
+#endif
+
+/*
+ * isatty -- returns 1 if connected to a terminal device,
+ *           returns 0 if not. Since we're hooked up to a
+ *           serial port, we'll say yes _AND return a 1.
+ */
+__attribute__((weak)) sint32 isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
+
+__attribute__((weak)) sint32 _isatty(sint32 fd)
+{
+  (void)fd;
+  return (1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/kill.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/kill.c
new file mode 100644
index 0000000..bc01033
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/kill.c
@@ -0,0 +1,60 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _kill(s32 pid, s32 sig);
+}
+#endif
+
+/*
+ * kill -- go out via exit...
+ */
+
+__attribute__((weak)) s32 kill(s32 pid, s32 sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
+
+__attribute__((weak)) s32 _kill(s32 pid, s32 sig)
+{
+  if(pid == 1) {
+    _exit(sig);
+  }
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/lseek.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/lseek.c
new file mode 100644
index 0000000..ddbaaaf
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/lseek.c
@@ -0,0 +1,61 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence);
+}
+#endif
+/*
+ * lseek --  Since a serial port is non-seekable, we return an error.
+ */
+__attribute__((weak)) off_t lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
+
+__attribute__((weak)) off_t _lseek(s32 fd, off_t offset, s32 whence)
+{
+  (void)fd;
+  (void)offset;
+  (void)whence;
+  errno = ESPIPE;
+  return ((off_t)-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/open.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/open.c
new file mode 100644
index 0000000..85e04d8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/open.c
@@ -0,0 +1,57 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* Use toolchain function for openamp applications*/
+
+#ifndef USEAMP
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 open(char8 *buf, s32 flags, s32 mode);
+}
+#endif
+/*
+ * open -- open a file descriptor. We don't have a filesystem, so
+ *         we return an error.
+ */
+__attribute__((weak)) s32 open(char8 *buf, s32 flags, s32 mode)
+{
+  (void *)buf;
+  (void)flags;
+  (void)mode;
+  errno = EIO;
+  return (-1);
+}
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/read.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/read.c
new file mode 100644
index 0000000..a3e461f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/read.c
@@ -0,0 +1,115 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/* Use toolchain function for openamp applications*/
+
+#ifndef USEAMP
+
+/* read.c -- read bytes from a input device.
+ */
+
+#include "xparameters.h"
+#include "xil_printf.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _read (s32 fd, char8* buf, s32 nbytes);
+}
+#endif
+
+/*
+ * read  -- read bytes from the serial port. Ignore fd, since
+ *          we only have stdin.
+ */
+__attribute__((weak)) s32
+read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    *LocalBuf = inbyte();
+	    if ((*LocalBuf == '\n' )|| (*LocalBuf == '\r')) {
+	        break;
+		}
+	}
+	if(LocalBuf != NULL) {
+	LocalBuf -= i;
+	}
+  }
+
+  return (i + 1);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) s32
+_read (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDIN_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    *LocalBuf = inbyte();
+	    if ((*LocalBuf == '\n' )|| (*LocalBuf == '\r')) {
+	        break;
+		}
+	}
+	if(LocalBuf != NULL) {
+	LocalBuf -= i;
+	}
+  }
+
+  return (i + 1);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/sbrk.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/sbrk.c
new file mode 100644
index 0000000..785a2c9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/sbrk.c
@@ -0,0 +1,65 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) char8 *sbrk (s32 nbytes);
+}
+#endif
+
+extern u8 _heap_start[];
+extern u8 _heap_end[];
+extern char8 HeapBase[];
+extern char8 HeapLimit[];
+
+
+
+__attribute__((weak)) char8 *sbrk (s32 nbytes)
+{
+  char8 *base;
+  static char8 *heap_ptr = HeapBase;
+
+  base = heap_ptr;
+  if(heap_ptr != NULL) {
+	heap_ptr += nbytes;
+  }
+
+/*  if (heap_ptr <= ((char8 *)&_heap_end + 1)) */
+  if (heap_ptr <= ((char8 *)&HeapLimit + 1)) {
+    return base;
+  }	else {
+    errno = ENOMEM;
+    return ((char8 *)-1);
+  }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/unlink.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/unlink.c
new file mode 100644
index 0000000..b376430
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/unlink.c
@@ -0,0 +1,50 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) sint32 unlink(char8 *path);
+}
+#endif
+/*
+ * unlink -- since we have no file system,
+ *           we just return an error.
+ */
+__attribute__((weak)) sint32 unlink(char8 *path)
+{
+  (void *)path;
+  errno = EIO;
+  return (-1);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/write.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/write.c
new file mode 100644
index 0000000..900ebf2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/write.c
@@ -0,0 +1,116 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/* Use toolchain function for openamp applications*/
+
+#ifndef USEAMP
+
+/* write.c -- write bytes to an output device.
+ */
+
+#include "xparameters.h"
+#include "xil_printf.h"
+
+#ifdef __cplusplus
+extern "C" {
+	__attribute__((weak)) s32 _write (s32 fd, char8* buf, s32 nbytes);
+}
+#endif
+
+/*
+ * write -- write bytes to the serial port. Ignore fd, since
+ *          stdout and stderr are the same. Since we have no filesystem,
+ *          open will only return an error.
+ */
+__attribute__((weak)) s32
+write (s32 fd, char8* buf, s32 nbytes)
+
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+
+__attribute__((weak)) s32
+_write (s32 fd, char8* buf, s32 nbytes)
+{
+#ifdef STDOUT_BASEADDRESS
+  s32 i;
+  char8* LocalBuf = buf;
+
+  (void)fd;
+  for (i = 0; i < nbytes; i++) {
+	if(LocalBuf != NULL) {
+		LocalBuf += i;
+	}
+	if(LocalBuf != NULL) {
+	    if (*LocalBuf == '\n') {
+	      outbyte ('\r');
+	    }
+	    outbyte (*LocalBuf);
+	}
+	if(LocalBuf != NULL) {
+		LocalBuf -= i;
+	}
+  }
+  return (nbytes);
+#else
+  (void)fd;
+  (void)buf;
+  (void)nbytes;
+  return 0;
+#endif
+}
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/xil-crt0.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/xil-crt0.S
new file mode 100644
index 0000000..79690c9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/xil-crt0.S
@@ -0,0 +1,112 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil-crt0.S
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  02/10/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+	.file	"xil-crt0.S"
+	.section ".got2","aw"
+	.align	2
+
+	.text
+.Lsbss_start:
+	.long	__sbss_start
+
+.Lsbss_end:
+	.long	__sbss_end
+
+.Lbss_start:
+	.long	__bss_start__
+
+.Lbss_end:
+	.long	__bss_end__
+
+.Lstack:
+	.long	__stack
+
+
+	.globl	_startup
+
+_startup:
+	bl      __cpu_init		/* Initialize the CPU first (BSP provides this) */
+
+	mov	r0, #0
+
+	/* clear sbss */
+	ldr 	r1,.Lsbss_start		/* calculate beginning of the SBSS */
+	ldr	r2,.Lsbss_end		/* calculate end of the SBSS */
+
+.Lloop_sbss:
+	cmp	r1,r2
+	bge	.Lenclsbss		/* If no SBSS, no clearing required */
+	str	r0, [r1], #4
+	b	.Lloop_sbss
+
+.Lenclsbss:
+	/* clear bss */
+	ldr	r1,.Lbss_start		/* calculate beginning of the BSS */
+	ldr	r2,.Lbss_end		/* calculate end of the BSS */
+
+.Lloop_bss:
+	cmp	r1,r2
+	bge	.Lenclbss		/* If no BSS, no clearing required */
+	str	r0, [r1], #4
+	b	.Lloop_bss
+
+.Lenclbss:
+
+	/* set stack pointer */
+	ldr	r13,.Lstack		/* stack address */
+
+	bl	main			/* Jump to main C code */
+
+	bl	_exit
+
+.Lexit:	/* should never get here */
+	b .Lexit
+
+.Lstart:
+	.size	_startup,.Lstart-_startup
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/xpseudo_asm_gcc.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/xpseudo_asm_gcc.h
new file mode 100644
index 0000000..18a22d9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/xpseudo_asm_gcc.h
@@ -0,0 +1,175 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm_gcc.h
+*
+* This header file contains macros for using inline assembler code. It is
+* written specifically for the GNU compiler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 05/29/14 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XPSEUDO_ASM_GCC_H  /* prevent circular inclusions */
+#define XPSEUDO_ASM_GCC_H  /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/* necessary for pre-processor */
+#define stringify(s)	tostring(s)
+#define tostring(s)	#s
+
+/* pseudo assembler instructions */
+#define mfcpsr()	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mrs	%0, cpsr\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+#define mtcpsr(v)	__asm__ __volatile__(\
+			  "msr	cpsr,%0\n"\
+			  : : "r" (v)\
+			)
+
+#define cpsiei()	__asm__ __volatile__("cpsie	i\n")
+#define cpsidi()	__asm__ __volatile__("cpsid	i\n")
+
+#define cpsief()	__asm__ __volatile__("cpsie	f\n")
+#define cpsidf()	__asm__ __volatile__("cpsid	f\n")
+
+
+
+#define mtgpr(rn, v)	__asm__ __volatile__(\
+			  "mov r" stringify(rn) ", %0 \n"\
+			  : : "r" (v)\
+			)
+
+#define mfgpr(rn)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "mov %0,r" stringify(rn) "\n"\
+			    : "=r" (rval)\
+			  );\
+			  rval;\
+			 })
+
+/* memory synchronization operations */
+
+/* Instruction Synchronization Barrier */
+#define isb() __asm__ __volatile__ ("isb" : : : "memory")
+
+/* Data Synchronization Barrier */
+#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
+
+/* Data Memory Barrier */
+#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
+
+
+/* Memory Operations */
+#define ldr(adr)	({u32 rval; \
+			  __asm__ __volatile__(\
+			    "ldr	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define ldrb(adr)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "ldrb	%0,[%1]"\
+			    : "=r" (rval) : "r" (adr)\
+			  );\
+			  rval;\
+			 })
+
+#define str(adr, val)	__asm__ __volatile__(\
+			  "str	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+#define strb(adr, val)	__asm__ __volatile__(\
+			  "strb	%0,[%1]\n"\
+			  : : "r" (val), "r" (adr)\
+			)
+
+/* Count leading zeroes (clz) */
+#define clz(arg)	({u8 rval; \
+			  __asm__ __volatile__(\
+			    "clz	%0,%1"\
+			    : "=r" (rval) : "r" (arg)\
+			  );\
+			  rval;\
+			 })
+
+/* CP15 operations */
+#define mtcp(rn, v)	__asm__ __volatile__(\
+			 "mcr " rn "\n"\
+			 : : "r" (v)\
+			);
+
+#define mfcp(rn)	({u32 rval; \
+			 __asm__ __volatile__(\
+			   "mrc " rn "\n"\
+			   : "=r" (rval)\
+			 );\
+			 rval;\
+			 })
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XPSEUDO_ASM_GCC_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/mpu.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/mpu.c
new file mode 100644
index 0000000..97e62e2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/mpu.c
@@ -0,0 +1,239 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file mpu.c
+*
+* This file contains initial configuration of the MPU.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xreg_cortexr5.h"
+#include "xil_mpu.h"
+#include "xpseudo_asm.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+void Init_MPU(void);
+static void Xil_SetAttribute(u32 addr, u32 reg_size,s32 reg_num, u32 attrib);
+static void Xil_DisableMPURegions(void);
+
+/*****************************************************************************
+*
+* Initialize MPU for a given address map and Enabled the background Region in
+* MPU with default memory attributes for rest of address range for Cortex R5
+* processor.
+*
+* @param	None.
+*
+* @return	None.
+*
+*
+******************************************************************************/
+
+void Init_MPU(void)
+{
+	u32 Addr;
+	u32 RegSize;
+	u32 Attrib;
+	u32 RegNum = 0;
+	Xil_DisableMPURegions();
+
+	Addr = 0x00000000U;
+	RegSize = REGION_2G;
+	Attrib = NORM_NSHARED_WB_WA | PRIV_RW_USER_RW;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	Addr = 0xC0000000U;
+	RegSize = REGION_512M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	Addr = 0xF0000000U;
+	RegSize = REGION_128M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	Addr = 0xF8000000U;
+	RegSize = REGION_64M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	Addr = 0xFC000000U;
+	RegSize = REGION_32M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	Addr = 0xFE000000U;
+	RegSize = REGION_16M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	Addr = 0xFF000000U;
+	RegSize = REGION_16M;
+	Attrib = DEVICE_NONSHARED | PRIV_RW_USER_RW   ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	Addr = 0xFFFF0000U;
+	RegSize = REGION_64K;
+//	RegSize = REGION_256K;
+	Attrib = STRONG_ORDERD_SHARED | PRIV_RW_USER_RW  ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	Addr = 0xFFFC0000U;
+	//RegSize = REGION_128K;
+	RegSize = REGION_128K;
+	Attrib = NORM_SHARED_WB_WA | PRIV_RW_USER_RW  ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	Addr = 0xFFFE0000U;
+	//RegSize = REGION_128K;
+	RegSize = REGION_64K;
+	Attrib = NORM_SHARED_WB_WA | PRIV_RW_USER_RW  ;
+	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+	RegNum++;
+
+	// Testing
+//
+//	Addr = 0xFFFC0000U;
+//	RegSize = REGION_64K;
+////	RegSize = REGION_256K;
+//	Attrib = STRONG_ORDERD_SHARED | PRIV_RW_USER_RW  ;
+//	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+//	RegNum++;
+//
+//	Addr = 0xFFFE0000U;
+//	//RegSize = REGION_128K;
+//	RegSize = REGION_128K;
+//	Attrib = NORM_SHARED_WB_WA | PRIV_RW_USER_RW  ;
+//	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+//	RegNum++;
+//
+//	Addr = 0xFFFD0000U;
+//	//RegSize = REGION_128K;
+//	RegSize = REGION_64K;
+//	Attrib = NORM_SHARED_WB_WA | PRIV_RW_USER_RW  ;
+//	Xil_SetAttribute(Addr,RegSize,RegNum, Attrib);
+//	RegNum++;
+
+//	uint32_t x1 = *(uint32_t*)0xFFFEA5DC;
+//	uint32_t x2 = *(uint32_t*)0xFFFEA5DE;
+
+
+}
+
+/*****************************************************************************
+*
+* Set the memory attributes for a section of memory with starting address addr
+* of the region size defined by reg_size having attributes attrib of region number
+* reg_num
+*
+* @param	addr is the address for which attributes are to be set.
+* @param	attrib specifies the attributes for that memory region.
+* @param	reg_size specifies the size for that memory region.
+* @param	reg_num specifies the number for that memory region.
+* @return	None.
+*
+*
+******************************************************************************/
+static void Xil_SetAttribute(u32 addr, u32 reg_size,s32 reg_num, u32 attrib)
+{
+	u32 Local_reg_size = reg_size;
+
+	Local_reg_size = Local_reg_size<<1U;
+	Local_reg_size |= REGION_EN;
+	dsb();
+	mtcp(XREG_CP15_MPU_MEMORY_REG_NUMBER,reg_num);
+	isb();
+	mtcp(XREG_CP15_MPU_REG_BASEADDR,addr); 		/* Set base address of a region */
+	mtcp(XREG_CP15_MPU_REG_ACCESS_CTRL,attrib); 	/* Set the control attribute */
+	mtcp(XREG_CP15_MPU_REG_SIZE_EN,Local_reg_size);	/* set the region size and enable it*/
+	dsb();
+	isb();						/* synchronize context on this processor */
+}
+
+
+/*****************************************************************************
+*
+* Disable all the MPU regions if any of them is enabled
+*
+* @param	None.
+*
+* @return	None.
+*
+*
+******************************************************************************/
+static void Xil_DisableMPURegions(void)
+{
+	u32 Temp;
+	u32 Index;
+	for (Index = 0; Index <= 15; Index++) {
+		mtcp(XREG_CP15_MPU_MEMORY_REG_NUMBER,Index);
+		Temp = mfcp(XREG_CP15_MPU_REG_SIZE_EN);
+		Temp &= (~REGION_EN);
+		dsb();
+		mtcp(XREG_CP15_MPU_REG_SIZE_EN,Temp);
+		dsb();
+		isb();
+	}
+
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/print.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/print.c
new file mode 100644
index 0000000..0ab15e9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/print.c
@@ -0,0 +1,32 @@
+/* print.c -- print a string on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ */
+
+/*
+ * print -- do a raw print of a string
+ */
+#include "xil_printf.h"
+
+void print(const char8 *ptr)
+{
+#ifdef STDOUT_BASEADDRESS
+  while (*ptr != (char8)0) {
+    outbyte (*ptr);
+	*ptr++;
+  }
+#else
+(void)ptr;
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/putnum.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/putnum.c
new file mode 100644
index 0000000..f37c560
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/putnum.c
@@ -0,0 +1,59 @@
+/* putnum.c -- put a hex number on the output device.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+/*
+ * putnum -- print a 32 bit number in hex
+ */
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+
+/************************** Function Prototypes ******************************/
+extern void print (const char8 *ptr);
+void putnum(u32 num);
+
+void putnum(u32 num)
+{
+  char8  buf[9];
+  u32   cnt;
+  s32 i;
+  char8  *ptr;
+  u32  digit;
+  for(i = 0; i<9; i++) {
+	buf[i] = '0';
+  }
+
+  ptr = buf;
+  for (cnt = 7U ; cnt >= 0U ; cnt--) {
+    digit = (num >> (cnt * 4U)) & 0x0000000fU;
+
+    if ((digit <= 9U) && (ptr != NULL)) {
+		digit += (u32)'0';
+		*ptr = ((char8) digit);
+		ptr += 1;
+	} else if (ptr != NULL) {
+		digit += ((u32)'a' - (u32)10);
+		*ptr = ((char8)digit);
+		ptr += 1;
+	} else {
+		/*Made for MisraC Compliance*/;
+	}
+  }
+
+  if(ptr != NULL) {
+	  *ptr = (char8) 0;
+  }
+  print (buf);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/sleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/sleep.c
new file mode 100644
index 0000000..d1a45af
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/sleep.c
@@ -0,0 +1,97 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************
+*
+* @file sleep.c
+*
+* This function provides a second delay using the Global Timer register in
+* the ARM Cortex R5 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 02/20/14 First release
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+
+/*****************************************************************************/
+/*
+*
+* This API is used to provide delays in seconds. Maximum value of seconds
+* attained with sleep routine is 10995
+*
+* @param	seconds requested
+*
+* @return	0 always
+*
+* @note		None.
+*
+****************************************************************************/
+
+s32 sleep(u32 seconds)
+{
+
+	XTime tEnd, tCur;
+
+	/* Disable ttc Timer */
+	Xil_Out32(TTC3_BASEADDR + 0x0000000CU,0x00000001U);
+	/*set prescale value*/
+	Xil_Out32(TTC3_BASEADDR + 0x00000000U,0x0000000DU);
+	/*write interval value to register*/
+	Xil_Out32(TTC3_BASEADDR + 0x00000024U,0xFFFFFFFFU);
+	/*write match value to register*/
+	Xil_Out32(TTC3_BASEADDR + 0x00000030U,0xFFFFFFFFU);
+	/* Enable ttc Timer */
+	Xil_Out32(TTC3_BASEADDR + 0x0000000CU,0x0000001AU);
+
+	XTime_GetTime(&tCur);
+
+	tEnd  = tCur + (((XTime) seconds) * COUNTS_PER_SECOND);
+	do
+	{
+	    XTime_GetTime(&tCur);
+
+	} while (tCur < tEnd);
+
+	/* Disable ttc Timer */
+	Xil_Out32(TTC3_BASEADDR + 0x0000000CU, Xil_In32(TTC3_BASEADDR + 0x0000000CU) | 0x00000001U);
+
+	return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/sleep.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/sleep.h
new file mode 100644
index 0000000..4ad228a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/sleep.h
@@ -0,0 +1,49 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#ifndef SLEEP_H
+#define SLEEP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "xil_types.h"
+#include "xil_io.h"
+
+s32 usleep(u32 useconds);
+s32 sleep(u32 seconds);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/subdir.mk b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/subdir.mk
new file mode 100644
index 0000000..b6871e5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/subdir.mk
@@ -0,0 +1,33 @@
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/print.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/mpu.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/putnum.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/sleep.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/usleep.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/vectors.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_cache.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_exception.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_io.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_printf.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_mpu.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xpm_counter.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xtime_l.c
+#SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/kill.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_exit.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_open.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/isatty.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/lseek.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/_sbrk.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/abort.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/close.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/errno.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/fcntl.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/fstat.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/read.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/unlink.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/write.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/gcc/cpu_init.S
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_assert.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testcache.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testio.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xil_testmem.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_standalone/src/common/xplatform_info.c
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/usleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/usleep.c
new file mode 100644
index 0000000..edb1977
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/usleep.c
@@ -0,0 +1,101 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file usleep.c
+*
+* This function provides a microsecond delay using the Global Timer register in
+* the ARM Cortex R5 MP core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 

+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "sleep.h"
+#include "xtime_l.h"
+#include "xparameters.h"
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+#include "xreg_cortexr5.h"
+
+/* Global Timer is always clocked at half of the CPU frequency */
+#define COUNTS_PER_USECOND  25U
+
+/*****************************************************************************/
+/**
+*
+* This API gives a delay in microseconds
+*
+* @param	useconds requested
+*
+* @return	0 if the delay can be achieved, -1 if the requested delay
+*		is out of range
+*
+* @note		None.
+*
+****************************************************************************/
+
+s32 usleep(u32 useconds)
+{
+	XTime tEnd, tCur;
+	/*disable ttc timer*/
+	Xil_Out32(TTC3_BASEADDR + 0x0000000CU,0x1U);
+	/*set prescale value*/
+	Xil_Out32(TTC3_BASEADDR + 0x00000000U, 0x000001U);
+	/*write interval value to register*/
+	Xil_Out32(TTC3_BASEADDR + 0x00000024U,0xFFFFFFFFU);
+	/*write match value to register*/
+	Xil_Out32(TTC3_BASEADDR + 0x00000030U,0xFFFFFFFFU);
+	/* Enable ttc Timer */
+	Xil_Out32(TTC3_BASEADDR + 0x0000000CU,0x1AU);
+
+	XTime_GetTime(&tCur);
+
+	tEnd  = tCur + (((XTime) useconds) * (COUNTS_PER_USECOND));
+	do
+	{
+	    XTime_GetTime(&tCur);
+	} while (tCur < tEnd);
+
+	/* Disable ttc Timer */
+	Xil_Out32(TTC3_BASEADDR + 0x0000000CU, Xil_In32(TTC3_BASEADDR + 0x0000000CU) | 0x00000001U);
+
+	return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/vectors.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/vectors.c
new file mode 100644
index 0000000..aac2d13
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/vectors.c
@@ -0,0 +1,168 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.c
+*
+* This file contains the C level vectors for the ARM Cortex R5 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xil_exception.h"
+#include "vectors.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Variable Definitions *****************************/
+
+extern XExc_VectorTableEntry XExc_VectorTable[];
+
+/************************** Function Prototypes ******************************/
+
+
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the FIQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void FIQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_FIQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_FIQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the IRQ interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void IRQInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_IRQ_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_IRQ_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the SW Interrupt called from the vectors.s
+* file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void SWInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_SWI_INT].Handler(XExc_VectorTable[
+					XIL_EXCEPTION_ID_SWI_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the DataAbort Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void DataAbortInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_DATA_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_DATA_ABORT_INT].Data);
+}
+
+/*****************************************************************************/
+/**
+*
+* This is the C level wrapper for the PrefetchAbort Interrupt called from the
+* vectors.s file.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void PrefetchAbortInterrupt(void)
+{
+	XExc_VectorTable[XIL_EXCEPTION_ID_PREFETCH_ABORT_INT].Handler(
+		XExc_VectorTable[XIL_EXCEPTION_ID_PREFETCH_ABORT_INT].Data);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/vectors.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/vectors.h
new file mode 100644
index 0000000..0eb09c9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/vectors.h
@@ -0,0 +1,81 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file vectors.h
+*
+* This file contains the C level vector prototypes for the ARM Cortex R5 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef VECTORS_H_
+#define VECTORS_H_
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+void FIQInterrupt(void);
+void IRQInterrupt(void);
+void SWInterrupt(void);
+void DataAbortInterrupt(void);
+void PrefetchAbortInterrupt(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu0_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu0_cfg.h
new file mode 100644
index 0000000..d166804
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu0_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU0_CFG_H__
+#define __XDDR_XMPU0_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu0Cfg Base Address
+ */
+#define XDDR_XMPU0_CFG_BASEADDR      0xFD000000UL
+
+/**
+ * Register: XddrXmpu0CfgCtrl
+ */
+#define XDDR_XMPU0_CFG_CTRL    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU0_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu0CfgErrSts1
+ */
+#define XDDR_XMPU0_CFG_ERR_STS1    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU0_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU0_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgErrSts2
+ */
+#define XDDR_XMPU0_CFG_ERR_STS2    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU0_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgPoison
+ */
+#define XDDR_XMPU0_CFG_POISON    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU0_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU0_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU0_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU0_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU0_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgIsr
+ */
+#define XDDR_XMPU0_CFG_ISR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU0_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgImr
+ */
+#define XDDR_XMPU0_CFG_IMR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU0_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu0CfgIen
+ */
+#define XDDR_XMPU0_CFG_IEN    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU0_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgIds
+ */
+#define XDDR_XMPU0_CFG_IDS    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU0_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgLock
+ */
+#define XDDR_XMPU0_CFG_LOCK    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU0_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00Strt
+ */
+#define XDDR_XMPU0_CFG_R00_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU0_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00End
+ */
+#define XDDR_XMPU0_CFG_R00_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU0_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00Mstr
+ */
+#define XDDR_XMPU0_CFG_R00_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU0_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR00
+ */
+#define XDDR_XMPU0_CFG_R00    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU0_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01Strt
+ */
+#define XDDR_XMPU0_CFG_R01_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU0_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01End
+ */
+#define XDDR_XMPU0_CFG_R01_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU0_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01Mstr
+ */
+#define XDDR_XMPU0_CFG_R01_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU0_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR01
+ */
+#define XDDR_XMPU0_CFG_R01    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU0_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02Strt
+ */
+#define XDDR_XMPU0_CFG_R02_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU0_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02End
+ */
+#define XDDR_XMPU0_CFG_R02_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU0_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02Mstr
+ */
+#define XDDR_XMPU0_CFG_R02_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU0_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR02
+ */
+#define XDDR_XMPU0_CFG_R02    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU0_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03Strt
+ */
+#define XDDR_XMPU0_CFG_R03_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU0_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03End
+ */
+#define XDDR_XMPU0_CFG_R03_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU0_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03Mstr
+ */
+#define XDDR_XMPU0_CFG_R03_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU0_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR03
+ */
+#define XDDR_XMPU0_CFG_R03    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU0_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04Strt
+ */
+#define XDDR_XMPU0_CFG_R04_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU0_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04End
+ */
+#define XDDR_XMPU0_CFG_R04_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU0_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04Mstr
+ */
+#define XDDR_XMPU0_CFG_R04_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU0_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR04
+ */
+#define XDDR_XMPU0_CFG_R04    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU0_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05Strt
+ */
+#define XDDR_XMPU0_CFG_R05_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU0_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05End
+ */
+#define XDDR_XMPU0_CFG_R05_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU0_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05Mstr
+ */
+#define XDDR_XMPU0_CFG_R05_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU0_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR05
+ */
+#define XDDR_XMPU0_CFG_R05    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU0_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06Strt
+ */
+#define XDDR_XMPU0_CFG_R06_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU0_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06End
+ */
+#define XDDR_XMPU0_CFG_R06_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU0_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06Mstr
+ */
+#define XDDR_XMPU0_CFG_R06_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU0_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR06
+ */
+#define XDDR_XMPU0_CFG_R06    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU0_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07Strt
+ */
+#define XDDR_XMPU0_CFG_R07_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU0_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07End
+ */
+#define XDDR_XMPU0_CFG_R07_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU0_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07Mstr
+ */
+#define XDDR_XMPU0_CFG_R07_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU0_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR07
+ */
+#define XDDR_XMPU0_CFG_R07    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU0_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08Strt
+ */
+#define XDDR_XMPU0_CFG_R08_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU0_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08End
+ */
+#define XDDR_XMPU0_CFG_R08_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU0_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08Mstr
+ */
+#define XDDR_XMPU0_CFG_R08_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU0_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR08
+ */
+#define XDDR_XMPU0_CFG_R08    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU0_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09Strt
+ */
+#define XDDR_XMPU0_CFG_R09_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU0_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09End
+ */
+#define XDDR_XMPU0_CFG_R09_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU0_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09Mstr
+ */
+#define XDDR_XMPU0_CFG_R09_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU0_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR09
+ */
+#define XDDR_XMPU0_CFG_R09    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU0_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10Strt
+ */
+#define XDDR_XMPU0_CFG_R10_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU0_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10End
+ */
+#define XDDR_XMPU0_CFG_R10_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU0_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10Mstr
+ */
+#define XDDR_XMPU0_CFG_R10_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU0_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR10
+ */
+#define XDDR_XMPU0_CFG_R10    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU0_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11Strt
+ */
+#define XDDR_XMPU0_CFG_R11_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU0_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11End
+ */
+#define XDDR_XMPU0_CFG_R11_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU0_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11Mstr
+ */
+#define XDDR_XMPU0_CFG_R11_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU0_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR11
+ */
+#define XDDR_XMPU0_CFG_R11    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU0_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12Strt
+ */
+#define XDDR_XMPU0_CFG_R12_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU0_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12End
+ */
+#define XDDR_XMPU0_CFG_R12_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU0_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12Mstr
+ */
+#define XDDR_XMPU0_CFG_R12_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU0_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR12
+ */
+#define XDDR_XMPU0_CFG_R12    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU0_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13Strt
+ */
+#define XDDR_XMPU0_CFG_R13_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU0_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13End
+ */
+#define XDDR_XMPU0_CFG_R13_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU0_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13Mstr
+ */
+#define XDDR_XMPU0_CFG_R13_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU0_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR13
+ */
+#define XDDR_XMPU0_CFG_R13    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU0_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14Strt
+ */
+#define XDDR_XMPU0_CFG_R14_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU0_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14End
+ */
+#define XDDR_XMPU0_CFG_R14_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU0_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14Mstr
+ */
+#define XDDR_XMPU0_CFG_R14_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU0_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR14
+ */
+#define XDDR_XMPU0_CFG_R14    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU0_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15Strt
+ */
+#define XDDR_XMPU0_CFG_R15_STRT    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU0_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15End
+ */
+#define XDDR_XMPU0_CFG_R15_END    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU0_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU0_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15Mstr
+ */
+#define XDDR_XMPU0_CFG_R15_MSTR    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU0_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU0_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU0_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu0CfgR15
+ */
+#define XDDR_XMPU0_CFG_R15    ( ( XDDR_XMPU0_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU0_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU0_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU0_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU0_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU0_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU0_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU0_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU0_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU0_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU0_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU0_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu1_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu1_cfg.h
new file mode 100644
index 0000000..5e6bf17
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu1_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU1_CFG_H__
+#define __XDDR_XMPU1_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu1Cfg Base Address
+ */
+#define XDDR_XMPU1_CFG_BASEADDR      0xFD010000UL
+
+/**
+ * Register: XddrXmpu1CfgCtrl
+ */
+#define XDDR_XMPU1_CFG_CTRL    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU1_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu1CfgErrSts1
+ */
+#define XDDR_XMPU1_CFG_ERR_STS1    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU1_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU1_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgErrSts2
+ */
+#define XDDR_XMPU1_CFG_ERR_STS2    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU1_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgPoison
+ */
+#define XDDR_XMPU1_CFG_POISON    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU1_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU1_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU1_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU1_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU1_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgIsr
+ */
+#define XDDR_XMPU1_CFG_ISR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU1_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgImr
+ */
+#define XDDR_XMPU1_CFG_IMR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU1_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu1CfgIen
+ */
+#define XDDR_XMPU1_CFG_IEN    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU1_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgIds
+ */
+#define XDDR_XMPU1_CFG_IDS    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU1_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgLock
+ */
+#define XDDR_XMPU1_CFG_LOCK    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU1_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00Strt
+ */
+#define XDDR_XMPU1_CFG_R00_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU1_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00End
+ */
+#define XDDR_XMPU1_CFG_R00_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU1_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00Mstr
+ */
+#define XDDR_XMPU1_CFG_R00_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU1_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR00
+ */
+#define XDDR_XMPU1_CFG_R00    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU1_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01Strt
+ */
+#define XDDR_XMPU1_CFG_R01_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU1_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01End
+ */
+#define XDDR_XMPU1_CFG_R01_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU1_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01Mstr
+ */
+#define XDDR_XMPU1_CFG_R01_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU1_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR01
+ */
+#define XDDR_XMPU1_CFG_R01    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU1_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02Strt
+ */
+#define XDDR_XMPU1_CFG_R02_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU1_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02End
+ */
+#define XDDR_XMPU1_CFG_R02_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU1_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02Mstr
+ */
+#define XDDR_XMPU1_CFG_R02_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU1_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR02
+ */
+#define XDDR_XMPU1_CFG_R02    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU1_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03Strt
+ */
+#define XDDR_XMPU1_CFG_R03_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU1_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03End
+ */
+#define XDDR_XMPU1_CFG_R03_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU1_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03Mstr
+ */
+#define XDDR_XMPU1_CFG_R03_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU1_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR03
+ */
+#define XDDR_XMPU1_CFG_R03    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU1_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04Strt
+ */
+#define XDDR_XMPU1_CFG_R04_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU1_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04End
+ */
+#define XDDR_XMPU1_CFG_R04_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU1_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04Mstr
+ */
+#define XDDR_XMPU1_CFG_R04_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU1_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR04
+ */
+#define XDDR_XMPU1_CFG_R04    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU1_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05Strt
+ */
+#define XDDR_XMPU1_CFG_R05_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU1_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05End
+ */
+#define XDDR_XMPU1_CFG_R05_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU1_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05Mstr
+ */
+#define XDDR_XMPU1_CFG_R05_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU1_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR05
+ */
+#define XDDR_XMPU1_CFG_R05    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU1_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06Strt
+ */
+#define XDDR_XMPU1_CFG_R06_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU1_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06End
+ */
+#define XDDR_XMPU1_CFG_R06_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU1_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06Mstr
+ */
+#define XDDR_XMPU1_CFG_R06_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU1_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR06
+ */
+#define XDDR_XMPU1_CFG_R06    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU1_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07Strt
+ */
+#define XDDR_XMPU1_CFG_R07_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU1_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07End
+ */
+#define XDDR_XMPU1_CFG_R07_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU1_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07Mstr
+ */
+#define XDDR_XMPU1_CFG_R07_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU1_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR07
+ */
+#define XDDR_XMPU1_CFG_R07    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU1_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08Strt
+ */
+#define XDDR_XMPU1_CFG_R08_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU1_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08End
+ */
+#define XDDR_XMPU1_CFG_R08_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU1_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08Mstr
+ */
+#define XDDR_XMPU1_CFG_R08_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU1_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR08
+ */
+#define XDDR_XMPU1_CFG_R08    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU1_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09Strt
+ */
+#define XDDR_XMPU1_CFG_R09_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU1_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09End
+ */
+#define XDDR_XMPU1_CFG_R09_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU1_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09Mstr
+ */
+#define XDDR_XMPU1_CFG_R09_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU1_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR09
+ */
+#define XDDR_XMPU1_CFG_R09    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU1_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10Strt
+ */
+#define XDDR_XMPU1_CFG_R10_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU1_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10End
+ */
+#define XDDR_XMPU1_CFG_R10_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU1_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10Mstr
+ */
+#define XDDR_XMPU1_CFG_R10_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU1_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR10
+ */
+#define XDDR_XMPU1_CFG_R10    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU1_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11Strt
+ */
+#define XDDR_XMPU1_CFG_R11_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU1_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11End
+ */
+#define XDDR_XMPU1_CFG_R11_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU1_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11Mstr
+ */
+#define XDDR_XMPU1_CFG_R11_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU1_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR11
+ */
+#define XDDR_XMPU1_CFG_R11    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU1_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12Strt
+ */
+#define XDDR_XMPU1_CFG_R12_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU1_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12End
+ */
+#define XDDR_XMPU1_CFG_R12_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU1_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12Mstr
+ */
+#define XDDR_XMPU1_CFG_R12_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU1_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR12
+ */
+#define XDDR_XMPU1_CFG_R12    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU1_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13Strt
+ */
+#define XDDR_XMPU1_CFG_R13_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU1_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13End
+ */
+#define XDDR_XMPU1_CFG_R13_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU1_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13Mstr
+ */
+#define XDDR_XMPU1_CFG_R13_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU1_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR13
+ */
+#define XDDR_XMPU1_CFG_R13    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU1_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14Strt
+ */
+#define XDDR_XMPU1_CFG_R14_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU1_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14End
+ */
+#define XDDR_XMPU1_CFG_R14_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU1_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14Mstr
+ */
+#define XDDR_XMPU1_CFG_R14_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU1_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR14
+ */
+#define XDDR_XMPU1_CFG_R14    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU1_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15Strt
+ */
+#define XDDR_XMPU1_CFG_R15_STRT    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU1_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15End
+ */
+#define XDDR_XMPU1_CFG_R15_END    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU1_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU1_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15Mstr
+ */
+#define XDDR_XMPU1_CFG_R15_MSTR    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU1_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU1_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU1_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu1CfgR15
+ */
+#define XDDR_XMPU1_CFG_R15    ( ( XDDR_XMPU1_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU1_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU1_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU1_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU1_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU1_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU1_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU1_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU1_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU1_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU1_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU1_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu2_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu2_cfg.h
new file mode 100644
index 0000000..be1fab3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu2_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU2_CFG_H__
+#define __XDDR_XMPU2_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu2Cfg Base Address
+ */
+#define XDDR_XMPU2_CFG_BASEADDR      0xFD020000UL
+
+/**
+ * Register: XddrXmpu2CfgCtrl
+ */
+#define XDDR_XMPU2_CFG_CTRL    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU2_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu2CfgErrSts1
+ */
+#define XDDR_XMPU2_CFG_ERR_STS1    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU2_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU2_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgErrSts2
+ */
+#define XDDR_XMPU2_CFG_ERR_STS2    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU2_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgPoison
+ */
+#define XDDR_XMPU2_CFG_POISON    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU2_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU2_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU2_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU2_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU2_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgIsr
+ */
+#define XDDR_XMPU2_CFG_ISR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU2_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgImr
+ */
+#define XDDR_XMPU2_CFG_IMR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU2_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu2CfgIen
+ */
+#define XDDR_XMPU2_CFG_IEN    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU2_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgIds
+ */
+#define XDDR_XMPU2_CFG_IDS    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU2_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgLock
+ */
+#define XDDR_XMPU2_CFG_LOCK    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU2_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00Strt
+ */
+#define XDDR_XMPU2_CFG_R00_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU2_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00End
+ */
+#define XDDR_XMPU2_CFG_R00_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU2_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00Mstr
+ */
+#define XDDR_XMPU2_CFG_R00_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU2_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR00
+ */
+#define XDDR_XMPU2_CFG_R00    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU2_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01Strt
+ */
+#define XDDR_XMPU2_CFG_R01_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU2_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01End
+ */
+#define XDDR_XMPU2_CFG_R01_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU2_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01Mstr
+ */
+#define XDDR_XMPU2_CFG_R01_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU2_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR01
+ */
+#define XDDR_XMPU2_CFG_R01    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU2_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02Strt
+ */
+#define XDDR_XMPU2_CFG_R02_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU2_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02End
+ */
+#define XDDR_XMPU2_CFG_R02_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU2_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02Mstr
+ */
+#define XDDR_XMPU2_CFG_R02_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU2_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR02
+ */
+#define XDDR_XMPU2_CFG_R02    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU2_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03Strt
+ */
+#define XDDR_XMPU2_CFG_R03_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU2_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03End
+ */
+#define XDDR_XMPU2_CFG_R03_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU2_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03Mstr
+ */
+#define XDDR_XMPU2_CFG_R03_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU2_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR03
+ */
+#define XDDR_XMPU2_CFG_R03    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU2_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04Strt
+ */
+#define XDDR_XMPU2_CFG_R04_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU2_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04End
+ */
+#define XDDR_XMPU2_CFG_R04_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU2_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04Mstr
+ */
+#define XDDR_XMPU2_CFG_R04_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU2_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR04
+ */
+#define XDDR_XMPU2_CFG_R04    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU2_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05Strt
+ */
+#define XDDR_XMPU2_CFG_R05_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU2_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05End
+ */
+#define XDDR_XMPU2_CFG_R05_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU2_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05Mstr
+ */
+#define XDDR_XMPU2_CFG_R05_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU2_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR05
+ */
+#define XDDR_XMPU2_CFG_R05    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU2_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06Strt
+ */
+#define XDDR_XMPU2_CFG_R06_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU2_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06End
+ */
+#define XDDR_XMPU2_CFG_R06_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU2_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06Mstr
+ */
+#define XDDR_XMPU2_CFG_R06_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU2_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR06
+ */
+#define XDDR_XMPU2_CFG_R06    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU2_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07Strt
+ */
+#define XDDR_XMPU2_CFG_R07_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU2_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07End
+ */
+#define XDDR_XMPU2_CFG_R07_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU2_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07Mstr
+ */
+#define XDDR_XMPU2_CFG_R07_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU2_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR07
+ */
+#define XDDR_XMPU2_CFG_R07    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU2_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08Strt
+ */
+#define XDDR_XMPU2_CFG_R08_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU2_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08End
+ */
+#define XDDR_XMPU2_CFG_R08_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU2_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08Mstr
+ */
+#define XDDR_XMPU2_CFG_R08_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU2_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR08
+ */
+#define XDDR_XMPU2_CFG_R08    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU2_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09Strt
+ */
+#define XDDR_XMPU2_CFG_R09_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU2_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09End
+ */
+#define XDDR_XMPU2_CFG_R09_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU2_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09Mstr
+ */
+#define XDDR_XMPU2_CFG_R09_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU2_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR09
+ */
+#define XDDR_XMPU2_CFG_R09    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU2_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10Strt
+ */
+#define XDDR_XMPU2_CFG_R10_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU2_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10End
+ */
+#define XDDR_XMPU2_CFG_R10_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU2_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10Mstr
+ */
+#define XDDR_XMPU2_CFG_R10_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU2_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR10
+ */
+#define XDDR_XMPU2_CFG_R10    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU2_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11Strt
+ */
+#define XDDR_XMPU2_CFG_R11_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU2_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11End
+ */
+#define XDDR_XMPU2_CFG_R11_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU2_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11Mstr
+ */
+#define XDDR_XMPU2_CFG_R11_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU2_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR11
+ */
+#define XDDR_XMPU2_CFG_R11    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU2_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12Strt
+ */
+#define XDDR_XMPU2_CFG_R12_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU2_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12End
+ */
+#define XDDR_XMPU2_CFG_R12_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU2_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12Mstr
+ */
+#define XDDR_XMPU2_CFG_R12_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU2_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR12
+ */
+#define XDDR_XMPU2_CFG_R12    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU2_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13Strt
+ */
+#define XDDR_XMPU2_CFG_R13_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU2_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13End
+ */
+#define XDDR_XMPU2_CFG_R13_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU2_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13Mstr
+ */
+#define XDDR_XMPU2_CFG_R13_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU2_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR13
+ */
+#define XDDR_XMPU2_CFG_R13    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU2_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14Strt
+ */
+#define XDDR_XMPU2_CFG_R14_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU2_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14End
+ */
+#define XDDR_XMPU2_CFG_R14_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU2_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14Mstr
+ */
+#define XDDR_XMPU2_CFG_R14_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU2_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR14
+ */
+#define XDDR_XMPU2_CFG_R14    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU2_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15Strt
+ */
+#define XDDR_XMPU2_CFG_R15_STRT    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU2_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15End
+ */
+#define XDDR_XMPU2_CFG_R15_END    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU2_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU2_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15Mstr
+ */
+#define XDDR_XMPU2_CFG_R15_MSTR    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU2_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU2_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU2_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu2CfgR15
+ */
+#define XDDR_XMPU2_CFG_R15    ( ( XDDR_XMPU2_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU2_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU2_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU2_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU2_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU2_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU2_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU2_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU2_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU2_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU2_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU2_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu3_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu3_cfg.h
new file mode 100644
index 0000000..e8e24d4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu3_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU3_CFG_H__
+#define __XDDR_XMPU3_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu3Cfg Base Address
+ */
+#define XDDR_XMPU3_CFG_BASEADDR      0xFD030000UL
+
+/**
+ * Register: XddrXmpu3CfgCtrl
+ */
+#define XDDR_XMPU3_CFG_CTRL    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU3_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu3CfgErrSts1
+ */
+#define XDDR_XMPU3_CFG_ERR_STS1    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU3_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU3_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgErrSts2
+ */
+#define XDDR_XMPU3_CFG_ERR_STS2    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU3_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgPoison
+ */
+#define XDDR_XMPU3_CFG_POISON    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU3_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU3_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU3_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU3_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU3_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgIsr
+ */
+#define XDDR_XMPU3_CFG_ISR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU3_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgImr
+ */
+#define XDDR_XMPU3_CFG_IMR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU3_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu3CfgIen
+ */
+#define XDDR_XMPU3_CFG_IEN    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU3_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgIds
+ */
+#define XDDR_XMPU3_CFG_IDS    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU3_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgLock
+ */
+#define XDDR_XMPU3_CFG_LOCK    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU3_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00Strt
+ */
+#define XDDR_XMPU3_CFG_R00_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU3_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00End
+ */
+#define XDDR_XMPU3_CFG_R00_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU3_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00Mstr
+ */
+#define XDDR_XMPU3_CFG_R00_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU3_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR00
+ */
+#define XDDR_XMPU3_CFG_R00    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU3_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01Strt
+ */
+#define XDDR_XMPU3_CFG_R01_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU3_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01End
+ */
+#define XDDR_XMPU3_CFG_R01_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU3_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01Mstr
+ */
+#define XDDR_XMPU3_CFG_R01_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU3_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR01
+ */
+#define XDDR_XMPU3_CFG_R01    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU3_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02Strt
+ */
+#define XDDR_XMPU3_CFG_R02_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU3_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02End
+ */
+#define XDDR_XMPU3_CFG_R02_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU3_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02Mstr
+ */
+#define XDDR_XMPU3_CFG_R02_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU3_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR02
+ */
+#define XDDR_XMPU3_CFG_R02    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU3_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03Strt
+ */
+#define XDDR_XMPU3_CFG_R03_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU3_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03End
+ */
+#define XDDR_XMPU3_CFG_R03_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU3_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03Mstr
+ */
+#define XDDR_XMPU3_CFG_R03_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU3_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR03
+ */
+#define XDDR_XMPU3_CFG_R03    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU3_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04Strt
+ */
+#define XDDR_XMPU3_CFG_R04_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU3_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04End
+ */
+#define XDDR_XMPU3_CFG_R04_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU3_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04Mstr
+ */
+#define XDDR_XMPU3_CFG_R04_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU3_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR04
+ */
+#define XDDR_XMPU3_CFG_R04    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU3_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05Strt
+ */
+#define XDDR_XMPU3_CFG_R05_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU3_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05End
+ */
+#define XDDR_XMPU3_CFG_R05_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU3_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05Mstr
+ */
+#define XDDR_XMPU3_CFG_R05_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU3_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR05
+ */
+#define XDDR_XMPU3_CFG_R05    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU3_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06Strt
+ */
+#define XDDR_XMPU3_CFG_R06_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU3_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06End
+ */
+#define XDDR_XMPU3_CFG_R06_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU3_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06Mstr
+ */
+#define XDDR_XMPU3_CFG_R06_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU3_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR06
+ */
+#define XDDR_XMPU3_CFG_R06    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU3_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07Strt
+ */
+#define XDDR_XMPU3_CFG_R07_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU3_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07End
+ */
+#define XDDR_XMPU3_CFG_R07_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU3_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07Mstr
+ */
+#define XDDR_XMPU3_CFG_R07_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU3_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR07
+ */
+#define XDDR_XMPU3_CFG_R07    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU3_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08Strt
+ */
+#define XDDR_XMPU3_CFG_R08_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU3_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08End
+ */
+#define XDDR_XMPU3_CFG_R08_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU3_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08Mstr
+ */
+#define XDDR_XMPU3_CFG_R08_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU3_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR08
+ */
+#define XDDR_XMPU3_CFG_R08    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU3_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09Strt
+ */
+#define XDDR_XMPU3_CFG_R09_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU3_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09End
+ */
+#define XDDR_XMPU3_CFG_R09_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU3_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09Mstr
+ */
+#define XDDR_XMPU3_CFG_R09_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU3_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR09
+ */
+#define XDDR_XMPU3_CFG_R09    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU3_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10Strt
+ */
+#define XDDR_XMPU3_CFG_R10_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU3_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10End
+ */
+#define XDDR_XMPU3_CFG_R10_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU3_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10Mstr
+ */
+#define XDDR_XMPU3_CFG_R10_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU3_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR10
+ */
+#define XDDR_XMPU3_CFG_R10    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU3_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11Strt
+ */
+#define XDDR_XMPU3_CFG_R11_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU3_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11End
+ */
+#define XDDR_XMPU3_CFG_R11_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU3_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11Mstr
+ */
+#define XDDR_XMPU3_CFG_R11_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU3_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR11
+ */
+#define XDDR_XMPU3_CFG_R11    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU3_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12Strt
+ */
+#define XDDR_XMPU3_CFG_R12_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU3_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12End
+ */
+#define XDDR_XMPU3_CFG_R12_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU3_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12Mstr
+ */
+#define XDDR_XMPU3_CFG_R12_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU3_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR12
+ */
+#define XDDR_XMPU3_CFG_R12    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU3_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13Strt
+ */
+#define XDDR_XMPU3_CFG_R13_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU3_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13End
+ */
+#define XDDR_XMPU3_CFG_R13_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU3_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13Mstr
+ */
+#define XDDR_XMPU3_CFG_R13_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU3_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR13
+ */
+#define XDDR_XMPU3_CFG_R13    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU3_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14Strt
+ */
+#define XDDR_XMPU3_CFG_R14_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU3_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14End
+ */
+#define XDDR_XMPU3_CFG_R14_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU3_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14Mstr
+ */
+#define XDDR_XMPU3_CFG_R14_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU3_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR14
+ */
+#define XDDR_XMPU3_CFG_R14    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU3_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15Strt
+ */
+#define XDDR_XMPU3_CFG_R15_STRT    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU3_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15End
+ */
+#define XDDR_XMPU3_CFG_R15_END    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU3_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU3_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15Mstr
+ */
+#define XDDR_XMPU3_CFG_R15_MSTR    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU3_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU3_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU3_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu3CfgR15
+ */
+#define XDDR_XMPU3_CFG_R15    ( ( XDDR_XMPU3_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU3_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU3_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU3_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU3_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU3_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU3_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU3_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU3_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU3_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU3_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU3_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu4_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu4_cfg.h
new file mode 100644
index 0000000..c93841f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu4_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU4_CFG_H__
+#define __XDDR_XMPU4_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu4Cfg Base Address
+ */
+#define XDDR_XMPU4_CFG_BASEADDR      0xFD040000UL
+
+/**
+ * Register: XddrXmpu4CfgCtrl
+ */
+#define XDDR_XMPU4_CFG_CTRL    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU4_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu4CfgErrSts1
+ */
+#define XDDR_XMPU4_CFG_ERR_STS1    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU4_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU4_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgErrSts2
+ */
+#define XDDR_XMPU4_CFG_ERR_STS2    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU4_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgPoison
+ */
+#define XDDR_XMPU4_CFG_POISON    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU4_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU4_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU4_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU4_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU4_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgIsr
+ */
+#define XDDR_XMPU4_CFG_ISR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU4_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgImr
+ */
+#define XDDR_XMPU4_CFG_IMR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU4_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu4CfgIen
+ */
+#define XDDR_XMPU4_CFG_IEN    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU4_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgIds
+ */
+#define XDDR_XMPU4_CFG_IDS    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU4_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgLock
+ */
+#define XDDR_XMPU4_CFG_LOCK    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU4_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00Strt
+ */
+#define XDDR_XMPU4_CFG_R00_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU4_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00End
+ */
+#define XDDR_XMPU4_CFG_R00_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU4_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00Mstr
+ */
+#define XDDR_XMPU4_CFG_R00_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU4_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR00
+ */
+#define XDDR_XMPU4_CFG_R00    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU4_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01Strt
+ */
+#define XDDR_XMPU4_CFG_R01_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU4_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01End
+ */
+#define XDDR_XMPU4_CFG_R01_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU4_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01Mstr
+ */
+#define XDDR_XMPU4_CFG_R01_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU4_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR01
+ */
+#define XDDR_XMPU4_CFG_R01    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU4_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02Strt
+ */
+#define XDDR_XMPU4_CFG_R02_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU4_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02End
+ */
+#define XDDR_XMPU4_CFG_R02_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU4_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02Mstr
+ */
+#define XDDR_XMPU4_CFG_R02_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU4_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR02
+ */
+#define XDDR_XMPU4_CFG_R02    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU4_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03Strt
+ */
+#define XDDR_XMPU4_CFG_R03_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU4_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03End
+ */
+#define XDDR_XMPU4_CFG_R03_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU4_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03Mstr
+ */
+#define XDDR_XMPU4_CFG_R03_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU4_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR03
+ */
+#define XDDR_XMPU4_CFG_R03    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU4_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04Strt
+ */
+#define XDDR_XMPU4_CFG_R04_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU4_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04End
+ */
+#define XDDR_XMPU4_CFG_R04_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU4_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04Mstr
+ */
+#define XDDR_XMPU4_CFG_R04_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU4_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR04
+ */
+#define XDDR_XMPU4_CFG_R04    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU4_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05Strt
+ */
+#define XDDR_XMPU4_CFG_R05_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU4_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05End
+ */
+#define XDDR_XMPU4_CFG_R05_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU4_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05Mstr
+ */
+#define XDDR_XMPU4_CFG_R05_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU4_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR05
+ */
+#define XDDR_XMPU4_CFG_R05    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU4_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06Strt
+ */
+#define XDDR_XMPU4_CFG_R06_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU4_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06End
+ */
+#define XDDR_XMPU4_CFG_R06_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU4_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06Mstr
+ */
+#define XDDR_XMPU4_CFG_R06_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU4_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR06
+ */
+#define XDDR_XMPU4_CFG_R06    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU4_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07Strt
+ */
+#define XDDR_XMPU4_CFG_R07_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU4_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07End
+ */
+#define XDDR_XMPU4_CFG_R07_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU4_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07Mstr
+ */
+#define XDDR_XMPU4_CFG_R07_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU4_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR07
+ */
+#define XDDR_XMPU4_CFG_R07    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU4_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08Strt
+ */
+#define XDDR_XMPU4_CFG_R08_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU4_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08End
+ */
+#define XDDR_XMPU4_CFG_R08_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU4_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08Mstr
+ */
+#define XDDR_XMPU4_CFG_R08_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU4_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR08
+ */
+#define XDDR_XMPU4_CFG_R08    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU4_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09Strt
+ */
+#define XDDR_XMPU4_CFG_R09_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU4_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09End
+ */
+#define XDDR_XMPU4_CFG_R09_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU4_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09Mstr
+ */
+#define XDDR_XMPU4_CFG_R09_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU4_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR09
+ */
+#define XDDR_XMPU4_CFG_R09    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU4_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10Strt
+ */
+#define XDDR_XMPU4_CFG_R10_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU4_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10End
+ */
+#define XDDR_XMPU4_CFG_R10_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU4_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10Mstr
+ */
+#define XDDR_XMPU4_CFG_R10_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU4_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR10
+ */
+#define XDDR_XMPU4_CFG_R10    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU4_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11Strt
+ */
+#define XDDR_XMPU4_CFG_R11_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU4_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11End
+ */
+#define XDDR_XMPU4_CFG_R11_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU4_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11Mstr
+ */
+#define XDDR_XMPU4_CFG_R11_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU4_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR11
+ */
+#define XDDR_XMPU4_CFG_R11    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU4_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12Strt
+ */
+#define XDDR_XMPU4_CFG_R12_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU4_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12End
+ */
+#define XDDR_XMPU4_CFG_R12_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU4_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12Mstr
+ */
+#define XDDR_XMPU4_CFG_R12_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU4_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR12
+ */
+#define XDDR_XMPU4_CFG_R12    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU4_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13Strt
+ */
+#define XDDR_XMPU4_CFG_R13_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU4_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13End
+ */
+#define XDDR_XMPU4_CFG_R13_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU4_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13Mstr
+ */
+#define XDDR_XMPU4_CFG_R13_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU4_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR13
+ */
+#define XDDR_XMPU4_CFG_R13    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU4_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14Strt
+ */
+#define XDDR_XMPU4_CFG_R14_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU4_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14End
+ */
+#define XDDR_XMPU4_CFG_R14_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU4_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14Mstr
+ */
+#define XDDR_XMPU4_CFG_R14_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU4_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR14
+ */
+#define XDDR_XMPU4_CFG_R14    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU4_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15Strt
+ */
+#define XDDR_XMPU4_CFG_R15_STRT    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU4_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15End
+ */
+#define XDDR_XMPU4_CFG_R15_END    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU4_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU4_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15Mstr
+ */
+#define XDDR_XMPU4_CFG_R15_MSTR    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU4_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU4_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU4_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu4CfgR15
+ */
+#define XDDR_XMPU4_CFG_R15    ( ( XDDR_XMPU4_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU4_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU4_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU4_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU4_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU4_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU4_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU4_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU4_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU4_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU4_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU4_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu5_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu5_cfg.h
new file mode 100644
index 0000000..596d783
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xddr_xmpu5_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XDDR_XMPU5_CFG_H__
+#define __XDDR_XMPU5_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XddrXmpu5Cfg Base Address
+ */
+#define XDDR_XMPU5_CFG_BASEADDR      0xFD050000UL
+
+/**
+ * Register: XddrXmpu5CfgCtrl
+ */
+#define XDDR_XMPU5_CFG_CTRL    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000000UL )
+#define XDDR_XMPU5_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu5CfgErrSts1
+ */
+#define XDDR_XMPU5_CFG_ERR_STS1    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000004UL )
+#define XDDR_XMPU5_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XDDR_XMPU5_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgErrSts2
+ */
+#define XDDR_XMPU5_CFG_ERR_STS2    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000008UL )
+#define XDDR_XMPU5_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgPoison
+ */
+#define XDDR_XMPU5_CFG_POISON    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000000CUL )
+#define XDDR_XMPU5_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XDDR_XMPU5_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_POISON_BASE_SHIFT   0UL
+#define XDDR_XMPU5_CFG_POISON_BASE_WIDTH   20UL
+#define XDDR_XMPU5_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XDDR_XMPU5_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgIsr
+ */
+#define XDDR_XMPU5_CFG_ISR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000010UL )
+#define XDDR_XMPU5_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_ISR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgImr
+ */
+#define XDDR_XMPU5_CFG_IMR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000014UL )
+#define XDDR_XMPU5_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_IMR_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XddrXmpu5CfgIen
+ */
+#define XDDR_XMPU5_CFG_IEN    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000018UL )
+#define XDDR_XMPU5_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IEN_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgIds
+ */
+#define XDDR_XMPU5_CFG_IDS    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000001CUL )
+#define XDDR_XMPU5_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_IDS_INV_APB_SHIFT   0UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_WIDTH   1UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgLock
+ */
+#define XDDR_XMPU5_CFG_LOCK    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000020UL )
+#define XDDR_XMPU5_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00Strt
+ */
+#define XDDR_XMPU5_CFG_R00_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000100UL )
+#define XDDR_XMPU5_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00End
+ */
+#define XDDR_XMPU5_CFG_R00_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000104UL )
+#define XDDR_XMPU5_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00Mstr
+ */
+#define XDDR_XMPU5_CFG_R00_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000108UL )
+#define XDDR_XMPU5_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR00
+ */
+#define XDDR_XMPU5_CFG_R00    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000010CUL )
+#define XDDR_XMPU5_CFG_R00_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R00_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R00_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R00_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R00_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01Strt
+ */
+#define XDDR_XMPU5_CFG_R01_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000110UL )
+#define XDDR_XMPU5_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01End
+ */
+#define XDDR_XMPU5_CFG_R01_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000114UL )
+#define XDDR_XMPU5_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01Mstr
+ */
+#define XDDR_XMPU5_CFG_R01_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000118UL )
+#define XDDR_XMPU5_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR01
+ */
+#define XDDR_XMPU5_CFG_R01    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000011CUL )
+#define XDDR_XMPU5_CFG_R01_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R01_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R01_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R01_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R01_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02Strt
+ */
+#define XDDR_XMPU5_CFG_R02_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000120UL )
+#define XDDR_XMPU5_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02End
+ */
+#define XDDR_XMPU5_CFG_R02_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000124UL )
+#define XDDR_XMPU5_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02Mstr
+ */
+#define XDDR_XMPU5_CFG_R02_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000128UL )
+#define XDDR_XMPU5_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR02
+ */
+#define XDDR_XMPU5_CFG_R02    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000012CUL )
+#define XDDR_XMPU5_CFG_R02_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R02_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R02_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R02_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R02_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03Strt
+ */
+#define XDDR_XMPU5_CFG_R03_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000130UL )
+#define XDDR_XMPU5_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03End
+ */
+#define XDDR_XMPU5_CFG_R03_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000134UL )
+#define XDDR_XMPU5_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03Mstr
+ */
+#define XDDR_XMPU5_CFG_R03_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000138UL )
+#define XDDR_XMPU5_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR03
+ */
+#define XDDR_XMPU5_CFG_R03    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000013CUL )
+#define XDDR_XMPU5_CFG_R03_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R03_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R03_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R03_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R03_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04Strt
+ */
+#define XDDR_XMPU5_CFG_R04_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000140UL )
+#define XDDR_XMPU5_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04End
+ */
+#define XDDR_XMPU5_CFG_R04_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000144UL )
+#define XDDR_XMPU5_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04Mstr
+ */
+#define XDDR_XMPU5_CFG_R04_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000148UL )
+#define XDDR_XMPU5_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR04
+ */
+#define XDDR_XMPU5_CFG_R04    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000014CUL )
+#define XDDR_XMPU5_CFG_R04_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R04_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R04_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R04_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R04_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05Strt
+ */
+#define XDDR_XMPU5_CFG_R05_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000150UL )
+#define XDDR_XMPU5_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05End
+ */
+#define XDDR_XMPU5_CFG_R05_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000154UL )
+#define XDDR_XMPU5_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05Mstr
+ */
+#define XDDR_XMPU5_CFG_R05_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000158UL )
+#define XDDR_XMPU5_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR05
+ */
+#define XDDR_XMPU5_CFG_R05    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000015CUL )
+#define XDDR_XMPU5_CFG_R05_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R05_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R05_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R05_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R05_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06Strt
+ */
+#define XDDR_XMPU5_CFG_R06_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000160UL )
+#define XDDR_XMPU5_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06End
+ */
+#define XDDR_XMPU5_CFG_R06_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000164UL )
+#define XDDR_XMPU5_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06Mstr
+ */
+#define XDDR_XMPU5_CFG_R06_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000168UL )
+#define XDDR_XMPU5_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR06
+ */
+#define XDDR_XMPU5_CFG_R06    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000016CUL )
+#define XDDR_XMPU5_CFG_R06_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R06_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R06_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R06_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R06_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07Strt
+ */
+#define XDDR_XMPU5_CFG_R07_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000170UL )
+#define XDDR_XMPU5_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07End
+ */
+#define XDDR_XMPU5_CFG_R07_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000174UL )
+#define XDDR_XMPU5_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07Mstr
+ */
+#define XDDR_XMPU5_CFG_R07_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000178UL )
+#define XDDR_XMPU5_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR07
+ */
+#define XDDR_XMPU5_CFG_R07    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000017CUL )
+#define XDDR_XMPU5_CFG_R07_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R07_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R07_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R07_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R07_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08Strt
+ */
+#define XDDR_XMPU5_CFG_R08_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000180UL )
+#define XDDR_XMPU5_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08End
+ */
+#define XDDR_XMPU5_CFG_R08_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000184UL )
+#define XDDR_XMPU5_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08Mstr
+ */
+#define XDDR_XMPU5_CFG_R08_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000188UL )
+#define XDDR_XMPU5_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR08
+ */
+#define XDDR_XMPU5_CFG_R08    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000018CUL )
+#define XDDR_XMPU5_CFG_R08_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R08_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R08_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R08_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R08_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09Strt
+ */
+#define XDDR_XMPU5_CFG_R09_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000190UL )
+#define XDDR_XMPU5_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09End
+ */
+#define XDDR_XMPU5_CFG_R09_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000194UL )
+#define XDDR_XMPU5_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09Mstr
+ */
+#define XDDR_XMPU5_CFG_R09_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x00000198UL )
+#define XDDR_XMPU5_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR09
+ */
+#define XDDR_XMPU5_CFG_R09    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x0000019CUL )
+#define XDDR_XMPU5_CFG_R09_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R09_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R09_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R09_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R09_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10Strt
+ */
+#define XDDR_XMPU5_CFG_R10_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A0UL )
+#define XDDR_XMPU5_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10End
+ */
+#define XDDR_XMPU5_CFG_R10_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A4UL )
+#define XDDR_XMPU5_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10Mstr
+ */
+#define XDDR_XMPU5_CFG_R10_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001A8UL )
+#define XDDR_XMPU5_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR10
+ */
+#define XDDR_XMPU5_CFG_R10    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001ACUL )
+#define XDDR_XMPU5_CFG_R10_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R10_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R10_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R10_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R10_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11Strt
+ */
+#define XDDR_XMPU5_CFG_R11_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B0UL )
+#define XDDR_XMPU5_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11End
+ */
+#define XDDR_XMPU5_CFG_R11_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B4UL )
+#define XDDR_XMPU5_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11Mstr
+ */
+#define XDDR_XMPU5_CFG_R11_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001B8UL )
+#define XDDR_XMPU5_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR11
+ */
+#define XDDR_XMPU5_CFG_R11    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001BCUL )
+#define XDDR_XMPU5_CFG_R11_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R11_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R11_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R11_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R11_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12Strt
+ */
+#define XDDR_XMPU5_CFG_R12_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C0UL )
+#define XDDR_XMPU5_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12End
+ */
+#define XDDR_XMPU5_CFG_R12_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C4UL )
+#define XDDR_XMPU5_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12Mstr
+ */
+#define XDDR_XMPU5_CFG_R12_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001C8UL )
+#define XDDR_XMPU5_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR12
+ */
+#define XDDR_XMPU5_CFG_R12    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001CCUL )
+#define XDDR_XMPU5_CFG_R12_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R12_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R12_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R12_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R12_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13Strt
+ */
+#define XDDR_XMPU5_CFG_R13_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D0UL )
+#define XDDR_XMPU5_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13End
+ */
+#define XDDR_XMPU5_CFG_R13_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D4UL )
+#define XDDR_XMPU5_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13Mstr
+ */
+#define XDDR_XMPU5_CFG_R13_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001D8UL )
+#define XDDR_XMPU5_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR13
+ */
+#define XDDR_XMPU5_CFG_R13    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001DCUL )
+#define XDDR_XMPU5_CFG_R13_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R13_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R13_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R13_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R13_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14Strt
+ */
+#define XDDR_XMPU5_CFG_R14_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E0UL )
+#define XDDR_XMPU5_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14End
+ */
+#define XDDR_XMPU5_CFG_R14_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E4UL )
+#define XDDR_XMPU5_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14Mstr
+ */
+#define XDDR_XMPU5_CFG_R14_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001E8UL )
+#define XDDR_XMPU5_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR14
+ */
+#define XDDR_XMPU5_CFG_R14    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001ECUL )
+#define XDDR_XMPU5_CFG_R14_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R14_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R14_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R14_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R14_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15Strt
+ */
+#define XDDR_XMPU5_CFG_R15_STRT    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F0UL )
+#define XDDR_XMPU5_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15End
+ */
+#define XDDR_XMPU5_CFG_R15_END    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F4UL )
+#define XDDR_XMPU5_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_END_ADDR_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_WIDTH   28UL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XDDR_XMPU5_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15Mstr
+ */
+#define XDDR_XMPU5_CFG_R15_MSTR    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001F8UL )
+#define XDDR_XMPU5_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XDDR_XMPU5_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XDDR_XMPU5_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XddrXmpu5CfgR15
+ */
+#define XDDR_XMPU5_CFG_R15    ( ( XDDR_XMPU5_CFG_BASEADDR ) + 0x000001FCUL )
+#define XDDR_XMPU5_CFG_R15_RSTVAL   0x00000008UL
+
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XDDR_XMPU5_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_REGNNS_SHIFT   3UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XDDR_XMPU5_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XDDR_XMPU5_CFG_R15_WRALWD_SHIFT   2UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XDDR_XMPU5_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_RDALWD_SHIFT   1UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XDDR_XMPU5_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XDDR_XMPU5_CFG_R15_EN_SHIFT   0UL
+#define XDDR_XMPU5_CFG_R15_EN_WIDTH   1UL
+#define XDDR_XMPU5_CFG_R15_EN_MASK    0x00000001UL
+#define XDDR_XMPU5_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XDDR_XMPU5_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_slcr.h
new file mode 100644
index 0000000..b9d7028
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_slcr.h
@@ -0,0 +1,382 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_SLCR_H__
+#define __XFPD_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdSlcr Base Address
+ */
+#define XFPD_SLCR_BASEADDR      0xFD610000UL
+
+/**
+ * Register: XfpdSlcrWprot0
+ */
+#define XFPD_SLCR_WPROT0    ( ( XFPD_SLCR_BASEADDR ) + 0x00000000UL )
+#define XFPD_SLCR_WPROT0_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_WPROT0_ACT_SHIFT   0UL
+#define XFPD_SLCR_WPROT0_ACT_WIDTH   1UL
+#define XFPD_SLCR_WPROT0_ACT_MASK    0x00000001UL
+#define XFPD_SLCR_WPROT0_ACT_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrCtrl
+ */
+#define XFPD_SLCR_CTRL    ( ( XFPD_SLCR_BASEADDR ) + 0x00000004UL )
+#define XFPD_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XFPD_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIsr
+ */
+#define XFPD_SLCR_ISR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000008UL )
+#define XFPD_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrImr
+ */
+#define XFPD_SLCR_IMR    ( ( XFPD_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XFPD_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrIer
+ */
+#define XFPD_SLCR_IER    ( ( XFPD_SLCR_BASEADDR ) + 0x00000010UL )
+#define XFPD_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIdr
+ */
+#define XFPD_SLCR_IDR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000014UL )
+#define XFPD_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrItr
+ */
+#define XFPD_SLCR_ITR    ( ( XFPD_SLCR_BASEADDR ) + 0x00000018UL )
+#define XFPD_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrWdtClkSel
+ */
+#define XFPD_SLCR_WDT_CLK_SEL    ( ( XFPD_SLCR_BASEADDR ) + 0x00000100UL )
+#define XFPD_SLCR_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_WDT_CLK_SEL_SHIFT   0UL
+#define XFPD_SLCR_WDT_CLK_SEL_WIDTH   1UL
+#define XFPD_SLCR_WDT_CLK_SEL_MASK    0x00000001UL
+#define XFPD_SLCR_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrIntFpd
+ */
+#define XFPD_SLCR_INT_FPD    ( ( XFPD_SLCR_BASEADDR ) + 0x00000200UL )
+#define XFPD_SLCR_INT_FPD_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_INT_FPD_GFM_SEL_SHIFT   0UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_WIDTH   1UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_MASK    0x00000001UL
+#define XFPD_SLCR_INT_FPD_GFM_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrGpu
+ */
+#define XFPD_SLCR_GPU    ( ( XFPD_SLCR_BASEADDR ) + 0x0000100CUL )
+#define XFPD_SLCR_GPU_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_GPU_ARCACHE_SHIFT   7UL
+#define XFPD_SLCR_GPU_ARCACHE_WIDTH   4UL
+#define XFPD_SLCR_GPU_ARCACHE_MASK    0x00000780UL
+#define XFPD_SLCR_GPU_ARCACHE_DEFVAL  0x0UL
+
+#define XFPD_SLCR_GPU_AWCACHE_SHIFT   3UL
+#define XFPD_SLCR_GPU_AWCACHE_WIDTH   4UL
+#define XFPD_SLCR_GPU_AWCACHE_MASK    0x00000078UL
+#define XFPD_SLCR_GPU_AWCACHE_DEFVAL  0x0UL
+
+#define XFPD_SLCR_GPU_PP1_IDLE_SHIFT   2UL
+#define XFPD_SLCR_GPU_PP1_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_PP1_IDLE_MASK    0x00000004UL
+#define XFPD_SLCR_GPU_PP1_IDLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GPU_PP0_IDLE_SHIFT   1UL
+#define XFPD_SLCR_GPU_PP0_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_PP0_IDLE_MASK    0x00000002UL
+#define XFPD_SLCR_GPU_PP0_IDLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GPU_IDLE_SHIFT   0UL
+#define XFPD_SLCR_GPU_IDLE_WIDTH   1UL
+#define XFPD_SLCR_GPU_IDLE_MASK    0x00000001UL
+#define XFPD_SLCR_GPU_IDLE_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrGdmaCfg
+ */
+#define XFPD_SLCR_GDMA_CFG    ( ( XFPD_SLCR_BASEADDR ) + 0x00003000UL )
+#define XFPD_SLCR_GDMA_CFG_RSTVAL   0x00000048UL
+
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_SHIFT   5UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_WIDTH   2UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_MASK    0x00000060UL
+#define XFPD_SLCR_GDMA_CFG_BUS_WIDTH_DEFVAL  0x2UL
+
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_SHIFT   0UL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_WIDTH   5UL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_MASK    0x0000001fUL
+#define XFPD_SLCR_GDMA_CFG_NUM_CH_DEFVAL  0x8UL
+
+/**
+ * Register: XfpdSlcrGdma
+ */
+#define XFPD_SLCR_GDMA    ( ( XFPD_SLCR_BASEADDR ) + 0x00003010UL )
+#define XFPD_SLCR_GDMA_RSTVAL   0x00003b3bUL
+
+#define XFPD_SLCR_GDMA_RAM1_EMAB_SHIFT   12UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_MASK    0x00007000UL
+#define XFPD_SLCR_GDMA_RAM1_EMAB_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM1_EMASA_SHIFT   11UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_WIDTH   1UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_MASK    0x00000800UL
+#define XFPD_SLCR_GDMA_RAM1_EMASA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GDMA_RAM1_EMAA_SHIFT   8UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_MASK    0x00000700UL
+#define XFPD_SLCR_GDMA_RAM1_EMAA_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMAB_SHIFT   4UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_MASK    0x00000070UL
+#define XFPD_SLCR_GDMA_RAM0_EMAB_DEFVAL  0x3UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMASA_SHIFT   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_WIDTH   1UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_MASK    0x00000008UL
+#define XFPD_SLCR_GDMA_RAM0_EMASA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_GDMA_RAM0_EMAA_SHIFT   0UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_WIDTH   3UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_MASK    0x00000007UL
+#define XFPD_SLCR_GDMA_RAM0_EMAA_DEFVAL  0x3UL
+
+/**
+ * Register: XfpdSlcrAfiFs
+ */
+#define XFPD_SLCR_AFI_FS    ( ( XFPD_SLCR_BASEADDR ) + 0x00005000UL )
+#define XFPD_SLCR_AFI_FS_RSTVAL   0x00000a00UL
+
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_SHIFT   10UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_WIDTH   2UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_MASK    0x00000c00UL
+#define XFPD_SLCR_AFI_FS_DW_SS1_SEL_DEFVAL  0x2UL
+
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_SHIFT   8UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_WIDTH   2UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_MASK    0x00000300UL
+#define XFPD_SLCR_AFI_FS_DW_SS0_SEL_DEFVAL  0x2UL
+
+/**
+ * Register: XfpdSlcrErrAtbIsr
+ */
+#define XFPD_SLCR_ERR_ATB_ISR    ( ( XFPD_SLCR_BASEADDR ) + 0x00006000UL )
+#define XFPD_SLCR_ERR_ATB_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_ISR_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_ISR_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrErrAtbImr
+ */
+#define XFPD_SLCR_ERR_ATB_IMR    ( ( XFPD_SLCR_BASEADDR ) + 0x00006004UL )
+#define XFPD_SLCR_ERR_ATB_IMR_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IMR_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IMR_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrErrAtbIer
+ */
+#define XFPD_SLCR_ERR_ATB_IER    ( ( XFPD_SLCR_BASEADDR ) + 0x00006008UL )
+#define XFPD_SLCR_ERR_ATB_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IER_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IER_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrErrAtbIdr
+ */
+#define XFPD_SLCR_ERR_ATB_IDR    ( ( XFPD_SLCR_BASEADDR ) + 0x0000600CUL )
+#define XFPD_SLCR_ERR_ATB_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ERR_ATB_IDR_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ERR_ATB_IDR_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrAtbCmdstore
+ */
+#define XFPD_SLCR_ATB_CMDSTORE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006010UL )
+#define XFPD_SLCR_ATB_CMDSTORE_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_CMDSTORE_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_CMDSTORE_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrAtbRespEn
+ */
+#define XFPD_SLCR_ATB_RESP_EN    ( ( XFPD_SLCR_BASEADDR ) + 0x00006014UL )
+#define XFPD_SLCR_ATB_RESP_EN_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS1_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_RESP_EN_AFIFS0_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_RESP_EN_FPDS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrAtbResptype
+ */
+#define XFPD_SLCR_ATB_RESPTYPE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006018UL )
+#define XFPD_SLCR_ATB_RESPTYPE_RSTVAL   0x00000007UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_SHIFT   2UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_MASK    0x00000004UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_SHIFT   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_MASK    0x00000002UL
+#define XFPD_SLCR_ATB_RESPTYPE_AFIFS0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_SHIFT   0UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_WIDTH   1UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_MASK    0x00000001UL
+#define XFPD_SLCR_ATB_RESPTYPE_FPDS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrAtbPrescale
+ */
+#define XFPD_SLCR_ATB_PRESCALE    ( ( XFPD_SLCR_BASEADDR ) + 0x00006020UL )
+#define XFPD_SLCR_ATB_PRESCALE_RSTVAL   0x0000ffffUL
+
+#define XFPD_SLCR_ATB_PRESCALE_EN_SHIFT   16UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_WIDTH   1UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_MASK    0x00010000UL
+#define XFPD_SLCR_ATB_PRESCALE_EN_DEFVAL  0x0UL
+
+#define XFPD_SLCR_ATB_PRESCALE_VAL_SHIFT   0UL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_WIDTH   16UL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_MASK    0x0000ffffUL
+#define XFPD_SLCR_ATB_PRESCALE_VAL_DEFVAL  0xffffUL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_slcr_secure.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_slcr_secure.h
new file mode 100644
index 0000000..cc6983c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_slcr_secure.h
@@ -0,0 +1,277 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_SLCR_SECURE_H__
+#define __XFPD_SLCR_SECURE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdSlcrSecure Base Address
+ */
+#define XFPD_SLCR_SECURE_BASEADDR      0xFD690000UL
+
+/**
+ * Register: XfpdSlcrSecCtrl
+ */
+#define XFPD_SLCR_SEC_CTRL    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000004UL )
+#define XFPD_SLCR_SEC_CTRL_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_SHIFT   0UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_WIDTH   1UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecIsr
+ */
+#define XFPD_SLCR_SEC_ISR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000008UL )
+#define XFPD_SLCR_SEC_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecImr
+ */
+#define XFPD_SLCR_SEC_IMR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x0000000CUL )
+#define XFPD_SLCR_SEC_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecIer
+ */
+#define XFPD_SLCR_SEC_IER    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000010UL )
+#define XFPD_SLCR_SEC_IER_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecIdr
+ */
+#define XFPD_SLCR_SEC_IDR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000014UL )
+#define XFPD_SLCR_SEC_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecItr
+ */
+#define XFPD_SLCR_SEC_ITR    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000018UL )
+#define XFPD_SLCR_SEC_ITR_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecSata
+ */
+#define XFPD_SLCR_SEC_SATA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000020UL )
+#define XFPD_SLCR_SEC_SATA_RSTVAL   0x0000000eUL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_SHIFT   3UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_MASK    0x00000008UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_SHIFT   2UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_MASK    0x00000004UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIMDMA0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_SHIFT   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_MASK    0x00000002UL
+#define XFPD_SLCR_SEC_SATA_TZ_AXIS_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_SATA_TZ_EN_SHIFT   0UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_WIDTH   1UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_SATA_TZ_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdSlcrSecPcie
+ */
+#define XFPD_SLCR_SEC_PCIE    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000030UL )
+#define XFPD_SLCR_SEC_PCIE_RSTVAL   0x01ffffffUL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_SHIFT   24UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_MASK    0x01000000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_SHIFT   23UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_MASK    0x00800000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_SHIFT   22UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_MASK    0x00400000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_SHIFT   21UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_MASK    0x00200000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_SHIFT   20UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_MASK    0x00100000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_7_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_SHIFT   19UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_MASK    0x00080000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_6_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_SHIFT   18UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_MASK    0x00040000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_5_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_SHIFT   17UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_MASK    0x00020000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_4_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_SHIFT   16UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_MASK    0x00010000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_SHIFT   15UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_MASK    0x00008000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_SHIFT   14UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_MASK    0x00004000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_SHIFT   13UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_MASK    0x00002000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_INGR_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_SHIFT   12UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_MASK    0x00001000UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_7_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_SHIFT   11UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_MASK    0x00000800UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_6_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_SHIFT   10UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_MASK    0x00000400UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_5_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_SHIFT   9UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_MASK    0x00000200UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_4_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_SHIFT   8UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_MASK    0x00000100UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_3_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_SHIFT   7UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_MASK    0x00000080UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_2_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_SHIFT   6UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_MASK    0x00000040UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_1_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_SHIFT   5UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_MASK    0x00000020UL
+#define XFPD_SLCR_SEC_PCIE_TZ_AT_EGR_0_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_SHIFT   4UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_MASK    0x00000010UL
+#define XFPD_SLCR_SEC_PCIE_TZ_DMA_REGS_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_SHIFT   3UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_MASK    0x00000008UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_PBA_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_SHIFT   2UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_MASK    0x00000004UL
+#define XFPD_SLCR_SEC_PCIE_TZ_MSIX_TABLE_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_SHIFT   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_MASK    0x00000002UL
+#define XFPD_SLCR_SEC_PCIE_TZ_ECAM_DEFVAL  0x1UL
+
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_SHIFT   0UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_WIDTH   1UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_PCIE_TZ_BRIDGE_REGS_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecDpdma
+ */
+#define XFPD_SLCR_SEC_DPDMA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000040UL )
+#define XFPD_SLCR_SEC_DPDMA_RSTVAL   0x00000001UL
+
+#define XFPD_SLCR_SEC_DPDMA_TZ_SHIFT   0UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_WIDTH   1UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_DPDMA_TZ_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdSlcrSecGdma
+ */
+#define XFPD_SLCR_SEC_GDMA    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000050UL )
+#define XFPD_SLCR_SEC_GDMA_RSTVAL   0x000000ffUL
+
+#define XFPD_SLCR_SEC_GDMA_TZ_SHIFT   0UL
+#define XFPD_SLCR_SEC_GDMA_TZ_WIDTH   8UL
+#define XFPD_SLCR_SEC_GDMA_TZ_MASK    0x000000ffUL
+#define XFPD_SLCR_SEC_GDMA_TZ_DEFVAL  0xffUL
+
+/**
+ * Register: XfpdSlcrSecGic
+ */
+#define XFPD_SLCR_SEC_GIC    ( ( XFPD_SLCR_SECURE_BASEADDR ) + 0x00000060UL )
+#define XFPD_SLCR_SEC_GIC_RSTVAL   0x00000000UL
+
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_SHIFT   0UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_WIDTH   1UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_MASK    0x00000001UL
+#define XFPD_SLCR_SEC_GIC_CFG_DIS_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_SLCR_SECURE_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_xmpu_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_xmpu_cfg.h
new file mode 100644
index 0000000..1c3726c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_xmpu_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_XMPU_CFG_H__
+#define __XFPD_XMPU_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdXmpuCfg Base Address
+ */
+#define XFPD_XMPU_CFG_BASEADDR      0xFD5D0000UL
+
+/**
+ * Register: XfpdXmpuCfgCtrl
+ */
+#define XFPD_XMPU_CFG_CTRL    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000000UL )
+#define XFPD_XMPU_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuCfgErrSts1
+ */
+#define XFPD_XMPU_CFG_ERR_STS1    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000004UL )
+#define XFPD_XMPU_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XFPD_XMPU_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgErrSts2
+ */
+#define XFPD_XMPU_CFG_ERR_STS2    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000008UL )
+#define XFPD_XMPU_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgPoison
+ */
+#define XFPD_XMPU_CFG_POISON    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000000CUL )
+#define XFPD_XMPU_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XFPD_XMPU_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_POISON_BASE_SHIFT   0UL
+#define XFPD_XMPU_CFG_POISON_BASE_WIDTH   20UL
+#define XFPD_XMPU_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XFPD_XMPU_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgIsr
+ */
+#define XFPD_XMPU_CFG_ISR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000010UL )
+#define XFPD_XMPU_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_ISR_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgImr
+ */
+#define XFPD_XMPU_CFG_IMR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000014UL )
+#define XFPD_XMPU_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_IMR_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuCfgIen
+ */
+#define XFPD_XMPU_CFG_IEN    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000018UL )
+#define XFPD_XMPU_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IEN_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgIds
+ */
+#define XFPD_XMPU_CFG_IDS    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000001CUL )
+#define XFPD_XMPU_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_IDS_INV_APB_SHIFT   0UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_WIDTH   1UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgLock
+ */
+#define XFPD_XMPU_CFG_LOCK    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000020UL )
+#define XFPD_XMPU_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00Strt
+ */
+#define XFPD_XMPU_CFG_R00_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000100UL )
+#define XFPD_XMPU_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00End
+ */
+#define XFPD_XMPU_CFG_R00_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000104UL )
+#define XFPD_XMPU_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00Mstr
+ */
+#define XFPD_XMPU_CFG_R00_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000108UL )
+#define XFPD_XMPU_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR00
+ */
+#define XFPD_XMPU_CFG_R00    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000010CUL )
+#define XFPD_XMPU_CFG_R00_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R00_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R00_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R00_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R00_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R00_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R00_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R00_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01Strt
+ */
+#define XFPD_XMPU_CFG_R01_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000110UL )
+#define XFPD_XMPU_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01End
+ */
+#define XFPD_XMPU_CFG_R01_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000114UL )
+#define XFPD_XMPU_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01Mstr
+ */
+#define XFPD_XMPU_CFG_R01_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000118UL )
+#define XFPD_XMPU_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR01
+ */
+#define XFPD_XMPU_CFG_R01    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000011CUL )
+#define XFPD_XMPU_CFG_R01_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R01_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R01_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R01_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R01_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R01_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R01_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R01_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02Strt
+ */
+#define XFPD_XMPU_CFG_R02_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000120UL )
+#define XFPD_XMPU_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02End
+ */
+#define XFPD_XMPU_CFG_R02_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000124UL )
+#define XFPD_XMPU_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02Mstr
+ */
+#define XFPD_XMPU_CFG_R02_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000128UL )
+#define XFPD_XMPU_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR02
+ */
+#define XFPD_XMPU_CFG_R02    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000012CUL )
+#define XFPD_XMPU_CFG_R02_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R02_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R02_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R02_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R02_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R02_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R02_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R02_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03Strt
+ */
+#define XFPD_XMPU_CFG_R03_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000130UL )
+#define XFPD_XMPU_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03End
+ */
+#define XFPD_XMPU_CFG_R03_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000134UL )
+#define XFPD_XMPU_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03Mstr
+ */
+#define XFPD_XMPU_CFG_R03_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000138UL )
+#define XFPD_XMPU_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR03
+ */
+#define XFPD_XMPU_CFG_R03    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000013CUL )
+#define XFPD_XMPU_CFG_R03_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R03_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R03_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R03_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R03_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R03_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R03_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R03_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04Strt
+ */
+#define XFPD_XMPU_CFG_R04_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000140UL )
+#define XFPD_XMPU_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04End
+ */
+#define XFPD_XMPU_CFG_R04_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000144UL )
+#define XFPD_XMPU_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04Mstr
+ */
+#define XFPD_XMPU_CFG_R04_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000148UL )
+#define XFPD_XMPU_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR04
+ */
+#define XFPD_XMPU_CFG_R04    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000014CUL )
+#define XFPD_XMPU_CFG_R04_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R04_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R04_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R04_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R04_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R04_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R04_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R04_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05Strt
+ */
+#define XFPD_XMPU_CFG_R05_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000150UL )
+#define XFPD_XMPU_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05End
+ */
+#define XFPD_XMPU_CFG_R05_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000154UL )
+#define XFPD_XMPU_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05Mstr
+ */
+#define XFPD_XMPU_CFG_R05_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000158UL )
+#define XFPD_XMPU_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR05
+ */
+#define XFPD_XMPU_CFG_R05    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000015CUL )
+#define XFPD_XMPU_CFG_R05_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R05_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R05_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R05_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R05_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R05_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R05_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R05_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06Strt
+ */
+#define XFPD_XMPU_CFG_R06_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000160UL )
+#define XFPD_XMPU_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06End
+ */
+#define XFPD_XMPU_CFG_R06_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000164UL )
+#define XFPD_XMPU_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06Mstr
+ */
+#define XFPD_XMPU_CFG_R06_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000168UL )
+#define XFPD_XMPU_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR06
+ */
+#define XFPD_XMPU_CFG_R06    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000016CUL )
+#define XFPD_XMPU_CFG_R06_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R06_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R06_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R06_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R06_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R06_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R06_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R06_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07Strt
+ */
+#define XFPD_XMPU_CFG_R07_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000170UL )
+#define XFPD_XMPU_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07End
+ */
+#define XFPD_XMPU_CFG_R07_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000174UL )
+#define XFPD_XMPU_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07Mstr
+ */
+#define XFPD_XMPU_CFG_R07_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000178UL )
+#define XFPD_XMPU_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR07
+ */
+#define XFPD_XMPU_CFG_R07    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000017CUL )
+#define XFPD_XMPU_CFG_R07_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R07_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R07_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R07_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R07_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R07_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R07_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R07_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08Strt
+ */
+#define XFPD_XMPU_CFG_R08_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000180UL )
+#define XFPD_XMPU_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08End
+ */
+#define XFPD_XMPU_CFG_R08_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000184UL )
+#define XFPD_XMPU_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08Mstr
+ */
+#define XFPD_XMPU_CFG_R08_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000188UL )
+#define XFPD_XMPU_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR08
+ */
+#define XFPD_XMPU_CFG_R08    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000018CUL )
+#define XFPD_XMPU_CFG_R08_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R08_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R08_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R08_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R08_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R08_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R08_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R08_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09Strt
+ */
+#define XFPD_XMPU_CFG_R09_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000190UL )
+#define XFPD_XMPU_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09End
+ */
+#define XFPD_XMPU_CFG_R09_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000194UL )
+#define XFPD_XMPU_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09Mstr
+ */
+#define XFPD_XMPU_CFG_R09_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x00000198UL )
+#define XFPD_XMPU_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR09
+ */
+#define XFPD_XMPU_CFG_R09    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x0000019CUL )
+#define XFPD_XMPU_CFG_R09_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R09_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R09_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R09_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R09_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R09_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R09_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R09_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10Strt
+ */
+#define XFPD_XMPU_CFG_R10_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A0UL )
+#define XFPD_XMPU_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10End
+ */
+#define XFPD_XMPU_CFG_R10_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A4UL )
+#define XFPD_XMPU_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10Mstr
+ */
+#define XFPD_XMPU_CFG_R10_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001A8UL )
+#define XFPD_XMPU_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR10
+ */
+#define XFPD_XMPU_CFG_R10    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001ACUL )
+#define XFPD_XMPU_CFG_R10_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R10_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R10_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R10_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R10_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R10_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R10_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R10_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11Strt
+ */
+#define XFPD_XMPU_CFG_R11_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B0UL )
+#define XFPD_XMPU_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11End
+ */
+#define XFPD_XMPU_CFG_R11_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B4UL )
+#define XFPD_XMPU_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11Mstr
+ */
+#define XFPD_XMPU_CFG_R11_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001B8UL )
+#define XFPD_XMPU_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR11
+ */
+#define XFPD_XMPU_CFG_R11    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001BCUL )
+#define XFPD_XMPU_CFG_R11_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R11_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R11_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R11_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R11_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R11_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R11_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R11_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12Strt
+ */
+#define XFPD_XMPU_CFG_R12_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C0UL )
+#define XFPD_XMPU_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12End
+ */
+#define XFPD_XMPU_CFG_R12_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C4UL )
+#define XFPD_XMPU_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12Mstr
+ */
+#define XFPD_XMPU_CFG_R12_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001C8UL )
+#define XFPD_XMPU_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR12
+ */
+#define XFPD_XMPU_CFG_R12    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001CCUL )
+#define XFPD_XMPU_CFG_R12_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R12_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R12_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R12_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R12_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R12_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R12_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R12_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13Strt
+ */
+#define XFPD_XMPU_CFG_R13_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D0UL )
+#define XFPD_XMPU_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13End
+ */
+#define XFPD_XMPU_CFG_R13_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D4UL )
+#define XFPD_XMPU_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13Mstr
+ */
+#define XFPD_XMPU_CFG_R13_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001D8UL )
+#define XFPD_XMPU_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR13
+ */
+#define XFPD_XMPU_CFG_R13    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001DCUL )
+#define XFPD_XMPU_CFG_R13_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R13_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R13_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R13_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R13_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R13_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R13_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R13_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14Strt
+ */
+#define XFPD_XMPU_CFG_R14_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E0UL )
+#define XFPD_XMPU_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14End
+ */
+#define XFPD_XMPU_CFG_R14_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E4UL )
+#define XFPD_XMPU_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14Mstr
+ */
+#define XFPD_XMPU_CFG_R14_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001E8UL )
+#define XFPD_XMPU_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR14
+ */
+#define XFPD_XMPU_CFG_R14    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001ECUL )
+#define XFPD_XMPU_CFG_R14_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R14_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R14_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R14_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R14_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R14_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R14_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R14_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15Strt
+ */
+#define XFPD_XMPU_CFG_R15_STRT    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F0UL )
+#define XFPD_XMPU_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15End
+ */
+#define XFPD_XMPU_CFG_R15_END    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F4UL )
+#define XFPD_XMPU_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_END_ADDR_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_END_ADDR_WIDTH   28UL
+#define XFPD_XMPU_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XFPD_XMPU_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15Mstr
+ */
+#define XFPD_XMPU_CFG_R15_MSTR    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001F8UL )
+#define XFPD_XMPU_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XFPD_XMPU_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XFPD_XMPU_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuCfgR15
+ */
+#define XFPD_XMPU_CFG_R15    ( ( XFPD_XMPU_CFG_BASEADDR ) + 0x000001FCUL )
+#define XFPD_XMPU_CFG_R15_RSTVAL   0x00000008UL
+
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XFPD_XMPU_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_REGNNS_SHIFT   3UL
+#define XFPD_XMPU_CFG_R15_REGNNS_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XFPD_XMPU_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XFPD_XMPU_CFG_R15_WRALWD_SHIFT   2UL
+#define XFPD_XMPU_CFG_R15_WRALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XFPD_XMPU_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_RDALWD_SHIFT   1UL
+#define XFPD_XMPU_CFG_R15_RDALWD_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XFPD_XMPU_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XFPD_XMPU_CFG_R15_EN_SHIFT   0UL
+#define XFPD_XMPU_CFG_R15_EN_WIDTH   1UL
+#define XFPD_XMPU_CFG_R15_EN_MASK    0x00000001UL
+#define XFPD_XMPU_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_XMPU_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_xmpu_sink.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_xmpu_sink.h
new file mode 100644
index 0000000..77e82c5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xfpd_xmpu_sink.h
@@ -0,0 +1,81 @@
+/* ### HEADER ### */
+
+#ifndef __XFPD_XMPU_SINK_H__
+#define __XFPD_XMPU_SINK_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XfpdXmpuSink Base Address
+ */
+#define XFPD_XMPU_SINK_BASEADDR      0xFD4F0000UL
+
+/**
+ * Register: XfpdXmpuSinkErrSts
+ */
+#define XFPD_XMPU_SINK_ERR_STS    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF00UL )
+#define XFPD_XMPU_SINK_ERR_STS_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_SHIFT   31UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_WIDTH   1UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_MASK    0x80000000UL
+#define XFPD_XMPU_SINK_ERR_STS_RDWR_DEFVAL  0x0UL
+
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_SHIFT   0UL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_WIDTH   12UL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_MASK    0x00000fffUL
+#define XFPD_XMPU_SINK_ERR_STS_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkIsr
+ */
+#define XFPD_XMPU_SINK_ISR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF10UL )
+#define XFPD_XMPU_SINK_ISR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_ISRADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkImr
+ */
+#define XFPD_XMPU_SINK_IMR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF14UL )
+#define XFPD_XMPU_SINK_IMR_RSTVAL   0x00000001UL
+
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IMRADDRDECDERR_DEFVAL  0x1UL
+
+/**
+ * Register: XfpdXmpuSinkIer
+ */
+#define XFPD_XMPU_SINK_IER    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF18UL )
+#define XFPD_XMPU_SINK_IER_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_IERADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IERADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XfpdXmpuSinkIdr
+ */
+#define XFPD_XMPU_SINK_IDR    ( ( XFPD_XMPU_SINK_BASEADDR ) + 0x0000FF1CUL )
+#define XFPD_XMPU_SINK_IDR_RSTVAL   0x00000000UL
+
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_SHIFT   0UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_WIDTH   1UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_MASK    0x00000001UL
+#define XFPD_XMPU_SINK_IDRADDRDECDERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XFPD_XMPU_SINK_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_cache.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_cache.c
new file mode 100644
index 0000000..e25bdb1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_cache.c
@@ -0,0 +1,584 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.c
+*
+* Contains required functions for the ARM cache functionality.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver    Who Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xil_io.h"
+#include "xpseudo_asm.h"
+#include "xparameters.h"
+#include "xreg_cortexr5.h"
+#include "xil_exception.h"
+
+
+/************************** Variable Definitions *****************************/
+
+#define IRQ_FIQ_MASK 0xC0	/* Mask IRQ and FIQ interrupts in cpsr */
+
+
+extern s32  _stack_end;
+extern s32  __undef_stack;
+
+/****************************************************************************/
+/************************** Function Prototypes ******************************/
+
+/****************************************************************************
+*
+* Enable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheEnable(void)
+{
+	register u32 CtrlReg;
+
+	/* enable caches only if they are disabled */
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+
+	if ((CtrlReg & XREG_CP15_CONTROL_C_BIT)==0x00000000U) {
+		/* invalidate the Data cache */
+		Xil_DCacheInvalidate();
+
+		/* enable the Data cache */
+		CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
+
+		mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	}
+}
+
+/****************************************************************************
+*
+* Disable the Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheDisable(void)
+{
+	register u32 CtrlReg;
+
+	/* clean and invalidate the Data cache */
+	Xil_DCacheFlush();
+
+	/* disable the Data cache */
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+
+	CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
+
+	mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+}
+
+/****************************************************************************
+*
+* Invalidate the entire Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidate(void)
+{
+	u32 currmask;
+	u32 stack_start,stack_end,stack_size;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+
+	stack_end = (u32 )&_stack_end;
+	stack_start = (u32 )&__undef_stack;
+	stack_size = stack_start-stack_end;
+
+	/* Flush stack memory to save return address */
+	Xil_DCacheFlushRange(stack_end, stack_size);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+
+	/*invalidate all D cache*/
+	mtcp(XREG_CP15_INVAL_DC_ALL, 0);
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate a Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the modified contents
+* are lost and are NOT written to system memory before the line is
+* invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateLine(INTPTR adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+	mtcp(XREG_CP15_INVAL_DC_LINE_MVA_POC, (adr & (~0x1F)));
+
+		/* Wait for invalidate to complete */
+	dsb();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate the Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheInvalidateRange(INTPTR adr, u32 len)
+{
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 tempadr = adr;
+	u32 tempend;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0U) {
+		end = tempadr + len;
+		tempend = end;
+		/* Select L1 Data cache in CSSR */
+		mtcp(XREG_CP15_CACHE_SIZE_SEL, 0U);
+
+		if ((tempadr & (cacheline-1U)) != 0U) {
+			tempadr &= (~(cacheline - 1U));
+
+			Xil_DCacheFlushLine(tempadr);
+		}
+		if ((tempend & (cacheline-1U)) != 0U) {
+			tempend &= (~(cacheline - 1U));
+
+			Xil_DCacheFlushLine(tempend);
+		}
+
+		while (tempadr < tempend) {
+
+		/* Invalidate Data cache line */
+		__asm__ __volatile__("mcr " \
+		XREG_CP15_INVAL_DC_LINE_MVA_POC :: "r" (tempadr));
+
+		tempadr += cacheline;
+		}
+	}
+
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush the entire Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheFlush(void)
+{
+	register u32 CsidReg, C7Reg;
+	u32 CacheSize, LineSize, NumWays;
+	u32 Way, WayIndex, Set, SetIndex, NumSet;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	/* Select cache level 0 and D cache in CSSR */
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+
+	CsidReg = mfcp(XREG_CP15_CACHE_SIZE_ID);
+
+	/* Determine Cache Size */
+
+	CacheSize = (CsidReg >> 13U) & 0x000001FFU;
+	CacheSize += 0x00000001U;
+	CacheSize *= (u32)128;    /* to get number of bytes */
+
+	/* Number of Ways */
+	NumWays = (CsidReg & 0x000003ffU) >> 3U;
+	NumWays += 0x00000001U;
+
+	/* Get the cacheline size, way size, index size from csidr */
+	LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
+
+	NumSet = CacheSize/NumWays;
+	NumSet /= (0x00000001U << LineSize);
+
+	Way = 0U;
+	Set = 0U;
+
+	/* Invalidate all the cachelines */
+	for (WayIndex = 0U; WayIndex < NumWays; WayIndex++) {
+		for (SetIndex = 0U; SetIndex < NumSet; SetIndex++) {
+			C7Reg = Way | Set;
+			/* Flush by Set/Way */
+			__asm__ __volatile__("mcr " \
+				XREG_CP15_CLEAN_INVAL_DC_LINE_SW :: "r" (C7Reg));
+
+			Set += (0x00000001U << LineSize);
+		}
+		Set = 0U;
+		Way += 0x40000000U;
+	}
+
+	/* Wait for flush to complete */
+	dsb();
+	mtcpsr(currmask);
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Flush a Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache, the cacheline containing that byte is
+* invalidated.	If the cacheline is modified (dirty), the entire
+* contents of the cacheline are written to system memory before the
+* line is invalidated.
+*
+* @param	Address to be flushed.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheFlushLine(INTPTR adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+
+	mtcp(XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC, (adr & (~0x1F)));
+
+		/* Wait for flush to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+* Flush the Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the written to system memory first before the
+* before the line is invalidated.
+*
+* @param	Start address of range to be flushed.
+* @param	Length of range to be flushed in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_DCacheFlushRange(INTPTR adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	if (len != 0x00000000U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr &= ~(cacheline - 1U);
+
+		while (LocalAddr < end) {
+			/* Flush Data cache line */
+			__asm__ __volatile__("mcr " \
+			XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC :: "r" (LocalAddr));
+
+			LocalAddr += cacheline;
+		}
+	}
+	dsb();
+	mtcpsr(currmask);
+}
+/****************************************************************************
+*
+* Store a Data cache line. If the byte specified by the address (adr)
+* is cached by the Data cache and the cacheline is modified (dirty),
+* the entire contents of the cacheline are written to system memory.
+* After the store completes, the cacheline is marked as unmodified
+* (not dirty).
+*
+* @param	Address to be stored.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_DCacheStoreLine(INTPTR adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
+	mtcp(XREG_CP15_CLEAN_DC_LINE_MVA_POC, (adr & (~0x1F)));
+
+	/* Wait for store to complete */
+	dsb();
+	isb();
+
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Enable the instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheEnable(void)
+{
+	register u32 CtrlReg;
+
+	/* enable caches only if they are disabled */
+
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+
+	if ((CtrlReg & XREG_CP15_CONTROL_I_BIT)==0x00000000U) {
+		/* invalidate the instruction cache */
+		mtcp(XREG_CP15_INVAL_IC_POU, 0);
+
+		/* enable the instruction cache */
+		CtrlReg |= (XREG_CP15_CONTROL_I_BIT);
+
+		mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+	}
+}
+
+/****************************************************************************
+*
+* Disable the instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheDisable(void)
+{
+	register u32 CtrlReg;
+
+	dsb();
+
+	/* invalidate the instruction cache */
+	mtcp(XREG_CP15_INVAL_IC_POU, 0);
+
+		/* disable the instruction cache */
+
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+
+	CtrlReg &= ~(XREG_CP15_CONTROL_I_BIT);
+
+	mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
+}
+
+/****************************************************************************
+*
+* Invalidate the entire instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheInvalidate(void)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 1);
+
+	/* invalidate the instruction cache */
+	mtcp(XREG_CP15_INVAL_IC_POU, 0);
+
+	/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate an instruction cache line.	If the instruction specified by the
+* parameter adr is cached by the instruction cache, the cacheline containing
+* that instruction is invalidated.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		The bottom 4 bits are set to 0, forced by architecture.
+*
+****************************************************************************/
+void Xil_ICacheInvalidateLine(INTPTR adr)
+{
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+
+	mtcp(XREG_CP15_CACHE_SIZE_SEL, 1);
+	mtcp(XREG_CP15_INVAL_IC_LINE_MVA_POU, (adr & (~0x1F)));
+
+		/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
+
+/****************************************************************************
+*
+* Invalidate the instruction cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated. If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* @param	Start address of range to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ICacheInvalidateRange(INTPTR adr, u32 len)
+{
+	u32 LocalAddr = adr;
+	const u32 cacheline = 32U;
+	u32 end;
+	u32 currmask;
+
+	currmask = mfcpsr();
+	mtcpsr(currmask | IRQ_FIQ_MASK);
+	if (len != 0x00000000U) {
+		/* Back the starting address up to the start of a cache line
+		 * perform cache operations until adr+len
+		 */
+		end = LocalAddr + len;
+		LocalAddr = LocalAddr & ~(cacheline - 1U);
+
+		/* Select cache L0 I-cache in CSSR */
+		mtcp(XREG_CP15_CACHE_SIZE_SEL, 1U);
+
+		while (LocalAddr < end) {
+
+			/* Invalidate L1 I-cache line */
+			__asm__ __volatile__("mcr " \
+			XREG_CP15_INVAL_IC_LINE_MVA_POU :: "r" (LocalAddr));
+
+			LocalAddr += cacheline;
+		}
+	}
+
+	/* Wait for invalidate to complete */
+	dsb();
+	mtcpsr(currmask);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_cache.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_cache.h
new file mode 100644
index 0000000..99dbab0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_cache.h
@@ -0,0 +1,77 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.h
+*
+* Contains required functions for the ARM cache functionality
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 

+*
+******************************************************************************/
+#ifndef XIL_CACHE_H
+#define XIL_CACHE_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void Xil_DCacheEnable(void);
+void Xil_DCacheDisable(void);
+void Xil_DCacheInvalidate(void);
+void Xil_DCacheInvalidateRange(INTPTR adr, u32 len);
+void Xil_DCacheFlush(void);
+void Xil_DCacheFlushRange(INTPTR adr, u32 len);
+void Xil_DCacheInvalidateLine(INTPTR adr);
+void Xil_DCacheFlushLine(INTPTR adr);
+void Xil_DCacheStoreLine(INTPTR adr);
+
+void Xil_ICacheEnable(void);
+void Xil_ICacheDisable(void);
+void Xil_ICacheInvalidate(void);
+void Xil_ICacheInvalidateRange(INTPTR adr, u32 len);
+void Xil_ICacheInvalidateLine(INTPTR adr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_exception.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_exception.c
new file mode 100644
index 0000000..8b0cfdb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_exception.c
@@ -0,0 +1,218 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/****************************************************************************/
+/**
+*
+* @file xil_exception.c
+*
+* This file contains low-level driver functions for the Cortex R5 exception
+* Handler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 02/20/14 First release
+*
+* 

+*
+*****************************************************************************/
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+#include "xpseudo_asm.h"
+#include "xdebug.h"
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+typedef struct {
+	Xil_ExceptionHandler Handler;
+	void *Data;
+} XExc_VectorTableEntry;
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Function Prototypes *****************************/
+static void Xil_ExceptionNullHandler(void *Data);
+/************************** Variable Definitions *****************************/
+/*
+ * Exception vector table to store handlers for each exception vector.
+ */
+XExc_VectorTableEntry XExc_VectorTable[XIL_EXCEPTION_ID_LAST + 1] =
+{
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_PrefetchAbortHandler, NULL},
+	{Xil_DataAbortHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+	{Xil_ExceptionNullHandler, NULL},
+};
+
+/*****************************************************************************/
+
+/****************************************************************************/
+/**
+*
+* This function is a stub Handler that is the default Handler that gets called
+* if the application has not setup a Handler for a specific  exception. The
+* function interface has to match the interface specified for a Handler even
+* though none of the arguments are used.
+*
+* @param	Data is unused by this function.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+static void Xil_ExceptionNullHandler(void *Data)
+{
+	(void *)Data;
+DieLoop: goto DieLoop;
+}
+
+/****************************************************************************/
+/**
+* The function is a common API used to initialize exception handlers across all
+* processors supported. For ARM CortexR5, the exception handlers are being
+* initialized statically and hence this function does not do anything.
+*
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xil_ExceptionInit(void)
+{
+	return;
+}
+
+/*****************************************************************************/
+/**
+*
+* Makes the connection between the Id of the exception source and the
+* associated Handler that is to run when the exception is recognized. The
+* argument provided in this call as the Data is used as the argument
+* for the Handler when it is called.
+*
+* @param	exception_id contains the ID of the exception source and should
+*		be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+		See xil_exception_l.h for further information.
+* @param	Handler to the Handler for that exception.
+* @param	Data is a reference to Data that will be passed to the
+*		Handler when it gets called.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRegisterHandler(u32 Exception_id,
+				    Xil_ExceptionHandler Handler,
+				    void *Data)
+{
+	XExc_VectorTable[Exception_id].Handler = Handler;
+	XExc_VectorTable[Exception_id].Data = Data;
+}
+
+/*****************************************************************************/
+/**
+*
+* Removes the Handler for a specific exception Id. The stub Handler is then
+* registered for this exception Id.
+*
+* @param	exception_id contains the ID of the exception source and should
+*		be in the range of 0 to XIL_EXCEPTION_ID_LAST.
+*		See xil_exception_l.h for further information.
+
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_ExceptionRemoveHandler(u32 Exception_id)
+{
+	Xil_ExceptionRegisterHandler(Exception_id,
+				       Xil_ExceptionNullHandler,
+				       NULL);
+}
+/*****************************************************************************/
+/**
+*
+* Default Data abort handler which prints a debug message on console if
+* Debug flag is enabled
+*
+* @param	None
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+
+void Xil_DataAbortHandler(void *CallBackRef){
+
+	xdbg_printf(XDBG_DEBUG_ERROR, "Data abort \n");
+	while(1) {
+		;
+	}
+}
+
+/*****************************************************************************/
+/**
+*
+* Default Prefetch abort handler which printsa debug message on console if
+* Debug flag is enabled
+*
+* @param	None
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void Xil_PrefetchAbortHandler(void *CallBackRef){
+
+	xdbg_printf(XDBG_DEBUG_ERROR, "Prefetch abort \n");
+	while(1) {
+		;
+	}
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_exception.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_exception.h
new file mode 100644
index 0000000..fff43e1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_exception.h
@@ -0,0 +1,215 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_exception.h
+*
+* This header file contains ARM Cortex R5 specific exception related APIs.
+* For exception related functions that can be used across all Xilinx supported
+* processors, please use xil_exception.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  02/20/14 First release
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_EXCEPTION_H /* prevent circular inclusions */
+#define XIL_EXCEPTION_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions ****************************/
+
+#define XIL_EXCEPTION_FIQ	XREG_CPSR_FIQ_ENABLE
+#define XIL_EXCEPTION_IRQ	XREG_CPSR_IRQ_ENABLE
+#define XIL_EXCEPTION_ALL	(XREG_CPSR_FIQ_ENABLE | XREG_CPSR_IRQ_ENABLE)
+
+#define XIL_EXCEPTION_ID_FIRST			0U
+#define XIL_EXCEPTION_ID_RESET			0U
+#define XIL_EXCEPTION_ID_UNDEFINED_INT		1U
+#define XIL_EXCEPTION_ID_SWI_INT		2U
+#define XIL_EXCEPTION_ID_PREFETCH_ABORT_INT	3U
+#define XIL_EXCEPTION_ID_DATA_ABORT_INT		4U
+#define XIL_EXCEPTION_ID_IRQ_INT		5U
+#define XIL_EXCEPTION_ID_FIQ_INT		6U
+#define XIL_EXCEPTION_ID_LAST			6U
+
+/*
+ * XIL_EXCEPTION_ID_INT is defined for all Xilinx processors.
+ */
+#define XIL_EXCEPTION_ID_INT	XIL_EXCEPTION_ID_IRQ_INT
+
+/**************************** Type Definitions ******************************/
+
+/**
+ * This typedef is the exception handler function.
+ */
+typedef void (*Xil_ExceptionHandler)(void *data);
+typedef void (*Xil_InterruptHandler)(void *data);
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/****************************************************************************/
+/**
+* Enable Exceptions.
+*
+* @param	Mask for exceptions to be enabled.
+*
+* @return	None.
+*
+* @note		If bit is 0, exception is enabled.
+*		C-Style signature: void Xil_ExceptionEnableMask(Mask)
+*
+******************************************************************************/
+#define Xil_ExceptionEnableMask(Mask)	\
+		mtcpsr(mfcpsr() & ~ ((Mask) & XIL_EXCEPTION_ALL))
+
+
+/****************************************************************************/
+/**
+* Enable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionEnable() \
+		Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ)
+
+/****************************************************************************/
+/**
+* Disable Exceptions.
+*
+* @param	Mask for exceptions to be enabled.
+*
+* @return	None.
+*
+* @note		If bit is 1, exception is disabled.
+*		C-Style signature: Xil_ExceptionDisableMask(Mask)
+*
+******************************************************************************/
+#define Xil_ExceptionDisableMask(Mask)	\
+		mtcpsr(mfcpsr() | ((Mask) & XIL_EXCEPTION_ALL))
+
+/****************************************************************************/
+/**
+* Disable the IRQ exception.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+#define Xil_ExceptionDisable() \
+		Xil_ExceptionDisableMask(XIL_EXCEPTION_IRQ)
+
+/****************************************************************************/
+/**
+* Enable nested interrupts by clearing the I and F bits it CPSR
+*
+* @return   None.
+*
+* @note     This macro is supposed to be used from interrupt handlers. In the
+*			interrupt handler the interrupts are disabled by default (I and F
+*			are 1). To allow nesting of interrupts, this macro should be
+*			used. It clears the I and F bits by changing the ARM mode to
+*			system mode. Once these bits are cleared and provided the
+*			preemption of interrupt conditions are met in the GIC, nesting of
+*			interrupts will start happening.
+*			Caution: This macro must be used with caution. Before calling this
+*			macro, the user must ensure that the source of the current IRQ
+*			is appropriately cleared. Otherwise, as soon as we clear the I and
+*			F bits, there can be an infinite loop of interrupts with an
+*			eventual crash (all the stack space getting consumed).
+******************************************************************************/
+#define Xil_EnableNestedInterrupts() \
+		__asm__ __volatile__ ("mrs     lr, spsr");  \
+		__asm__ __volatile__ ("stmfd   sp!, {lr}"); \
+		__asm__ __volatile__ ("msr     cpsr_c, #0x1F"); \
+		__asm__ __volatile__ ("stmfd   sp!, {lr}");
+
+/****************************************************************************/
+/**
+* Disable the nested interrupts by setting the I and F bits.
+*
+* @return   None.
+*
+* @note     This macro is meant to be called in the interrupt service routines.
+*			This macro cannot be used independently. It can only be used when
+*			nesting of interrupts have been enabled by using the macro
+*			Xil_EnableNestedInterrupts(). In a typical flow, the user first
+*			calls the Xil_EnableNestedInterrupts in the ISR at the appropriate
+*			point. The user then must call this macro before exiting the interrupt
+*			service routine. This macro puts the ARM back in IRQ/FIQ mode and
+*			hence sets back the I and F bits.
+******************************************************************************/
+#define Xil_DisableNestedInterrupts() \
+		__asm__ __volatile__ ("ldmfd   sp!, {lr}");   \
+		__asm__ __volatile__ ("msr     cpsr_c, #0x92"); \
+		__asm__ __volatile__ ("ldmfd   sp!, {lr}"); \
+		__asm__ __volatile__ ("msr     spsr_cxsf, lr");
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+extern void Xil_ExceptionRegisterHandler(u32 Exception_id,
+					 Xil_ExceptionHandler Handler,
+					 void *Data);
+
+extern void Xil_ExceptionRemoveHandler(u32 Exception_id);
+
+extern void Xil_ExceptionInit(void);
+
+extern void Xil_DataAbortHandler(void *CallBackRef);
+
+extern void Xil_PrefetchAbortHandler(void *CallBackRef);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_EXCEPTION_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_io.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_io.c
new file mode 100644
index 0000000..41c6a24
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_io.c
@@ -0,0 +1,380 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.c
+*
+* Contains I/O functions for memory-mapped or non-memory-mapped I/O
+* architectures.  These functions encapsulate Cortex R5 architecture-specific
+* I/O requirements.
+*
+* @note
+*
+* This file contains architecture-dependent code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 02/20/14 First release
+* 

+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+#include "xil_io.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xpseudo_asm.h"
+#include "xreg_cortexr5.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for an 8-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u8 Xil_In8(INTPTR Addr)
+{
+	return *(volatile u8 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 16-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_In16(INTPTR Addr)
+{
+	return *(volatile u16 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 32-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_In32(INTPTR Addr)
+{
+	return *(volatile u32 *) Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for an 8-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out8(INTPTR Addr, u8 Value)
+{
+	u8 *LocalAddr = (u8 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 16-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out16(INTPTR Addr, u16 Value)
+{
+	u16 *LocalAddr = (u16 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 32-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out32(INTPTR Addr, u32 Value)
+{
+	u32 *LocalAddr = (u32 *)Addr;
+	*LocalAddr = Value;
+}
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 64-bit memory location by writing the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out64(INTPTR Addr, u64 Value)
+{
+	u64 *LocalAddr = (u64 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 64-bit memory location by reading the
+* specified Value to the the specified address.
+*
+* @param	Addr contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+u64 Xil_In64(INTPTR Addr)
+{
+	return *(volatile u64 *) Addr;
+}
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 16-bit memory location by reading from the
+* specified address and returning the byte-swapped Value read from that
+* address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The byte-swapped Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_In16BE(INTPTR Addr)
+{
+	u16 temp;
+	u16 result;
+
+	temp = Xil_In16(Addr);
+
+	result = Xil_EndianSwap16(temp);
+
+	return result;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 32-bit memory location by reading from the
+* specified address and returning the byte-swapped Value read from that
+* address.
+*
+* @param	Addr contains the address to perform the input operation
+*		at.
+*
+* @return	The byte-swapped Value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_In32BE(INTPTR Addr)
+{
+	u32 temp;
+	u32 result;
+
+	temp = Xil_In32(Addr);
+
+	result = Xil_EndianSwap32(temp);
+
+	return result;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 16-bit memory location by writing the
+* specified Value to the the specified address. The Value is byte-swapped
+* before being written.
+*
+* @param	OutAddress contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out16BE(INTPTR Addr, u16 Value)
+{
+	u16 temp;
+
+	temp = Xil_EndianSwap16(Value);
+
+    Xil_Out16(Addr, temp);
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an output operation for a 32-bit memory location by writing the
+* specified Value to the the specified address. The Value is byte-swapped
+* before being written.
+*
+* @param	OutAddress contains the address to perform the output operation
+*		at.
+* @param	Value contains the Value to be output at the specified address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out32BE(INTPTR Addr, u32 Value)
+{
+	u32 temp;
+
+	temp = Xil_EndianSwap32(Value);
+
+    Xil_Out32(Addr, temp);
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a 16-bit endian converion.
+*
+* @param	Data contains the value to be converted.
+*
+* @return	converted value.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_EndianSwap16(u16 Data)
+{
+	return (u16) (((Data & 0xFF00U) >> 8U) | ((Data & 0x00FFU) << 8U));
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a 32-bit endian converion.
+*
+* @param	Data contains the value to be converted.
+*
+* @return	converted value.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_EndianSwap32(u32 Data)
+{
+	u16 LoWord;
+	u16 HiWord;
+
+	/* get each of the half words from the 32 bit word */
+
+	LoWord = (u16) (Data & 0x0000FFFFU);
+	HiWord = (u16) ((Data & 0xFFFF0000U) >> 16U);
+
+	/* byte swap each of the 16 bit half words */
+
+	LoWord = (((LoWord & 0xFF00U) >> 8U) | ((LoWord & 0x00FFU) << 8U));
+	HiWord = (((HiWord & 0xFF00U) >> 8U) | ((HiWord & 0x00FFU) << 8U));
+
+	/* swap the half words before returning the value */
+
+	return ((((u32)LoWord) << 16U) | (u32)HiWord);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_io.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_io.h
new file mode 100644
index 0000000..d6c4e57
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_io.h
@@ -0,0 +1,244 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.h
+*
+* This file contains the interface for the general IO component, which
+* encapsulates the Input/Output functions for processors that do not
+* require any special I/O handling.
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00 	pkp  	 02/20/14 First release
+* 

+******************************************************************************/
+
+#ifndef XIL_IO_H           /* prevent circular inclusions */
+#define XIL_IO_H           /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xpseudo_asm.h"
+#include "xil_printf.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#if defined __GNUC__
+#  define SYNCHRONIZE_IO	dmb()
+#  define INST_SYNC		isb()
+#  define DATA_SYNC		dsb()
+#else
+#  define SYNCHRONIZE_IO
+#  define INST_SYNC
+#  define DATA_SYNC
+#endif /* __GNUC__ */
+
+/*****************************************************************************/
+/**
+*
+* Perform an big-endian input operation for a 16-bit memory location
+* by reading from the specified address and returning the Value read from
+* that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The Value read from the specified input address with the
+*		proper endianness. The return Value has the same endianness
+*		as that of the processor, i.e. if the processor is
+*		little-engian, the return Value is the byte-swapped Value read
+*		from the address.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_In16LE(Addr) Xil_In16((Addr))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian input operation for a 32-bit memory location
+* by reading from the specified address and returning the Value read from
+* that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The Value read from the specified input address with the
+*		proper endianness. The return Value has the same endianness
+*		as that of the processor, i.e. if the processor is
+*		little-engian, the return Value is the byte-swapped Value read
+*		from the address.
+*
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_In32LE(Addr) Xil_In32((Addr))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian output operation for a 16-bit memory location
+* by writing the specified Value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the Value to be output at the specified address.
+*		The Value has the same endianness as that of the processor.
+*		If the processor is little-endian, the byte-swapped Value is
+*		written to the address.
+*
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Out16LE(Addr, Value) Xil_Out16((Addr), (Value))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian output operation for a 32-bit memory location
+* by writing the specified Value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the Value to be output at the specified address.
+*		The Value has the same endianness as that of the processor.
+*		If the processor is little-endian, the byte-swapped Value is
+*		written to the address.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Out32LE(Addr, Value) Xil_Out32((Addr), (Value))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 32-bit number from host byte order to network byte order.
+*
+* @param	Data the 32-bit number to be converted.
+*
+* @return	The converted 32-bit number in network byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Htonl(Data) Xil_EndianSwap32((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 16-bit number from host byte order to network byte order.
+*
+* @param	Data the 16-bit number to be converted.
+*
+* @return	The converted 16-bit number in network byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Htons(Data) Xil_EndianSwap16((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 32-bit number from network byte order to host byte order.
+*
+* @param	Data the 32-bit number to be converted.
+*
+* @return	The converted 32-bit number in host byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Ntohl(Data) Xil_EndianSwap32((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 16-bit number from network byte order to host byte order.
+*
+* @param	Data the 16-bit number to be converted.
+*
+* @return	The converted 16-bit number in host byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Ntohs(Data) Xil_EndianSwap16((Data))
+
+/************************** Function Prototypes ******************************/
+
+/* The following functions allow the software to be transportable across
+ * processors which may use memory mapped I/O or I/O which is mapped into a
+ * seperate address space.
+ */
+u8 Xil_In8(INTPTR Addr);
+u16 Xil_In16(INTPTR Addr);
+u32 Xil_In32(INTPTR Addr);
+u64 Xil_In64(INTPTR Addr);
+
+void Xil_Out8(INTPTR Addr, u8 Value);
+void Xil_Out16(INTPTR Addr, u16 Value);
+void Xil_Out32(INTPTR Addr, u32 Value);
+void Xil_Out64(INTPTR Addr, u64 Value);
+
+u16 Xil_In16BE(INTPTR Addr);
+u32 Xil_In32BE(INTPTR Addr);
+void Xil_Out16BE(INTPTR Addr, u16 Value);
+void Xil_Out32BE(INTPTR Addr, u32 Value);
+
+u16 Xil_EndianSwap16(u16 Data);
+u32 Xil_EndianSwap32(u32 Data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_mmu.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_mmu.h
new file mode 100644
index 0000000..21e3e8c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_mmu.h
@@ -0,0 +1,80 @@
+/******************************************************************************
+*
+* Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.h
+* This file only includes xil_mpu.h which contains Xil_SetTlbAttributes API
+* defined for MPU in R5. R5 does not have mmu and for usage of similiar API
+* the file has been created.
+*
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.0	pkp  2/12/15 Initial version
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef XIL_MMU_H
+#define XIL_MMU_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/***************************** Include Files *********************************/
+
+#include "xil_mpu.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_MMU_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_mpu.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_mpu.c
new file mode 100644
index 0000000..af4e8b9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_mpu.c
@@ -0,0 +1,258 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mpu.c
+*
+* This file provides APIs for enabling/disabling MPU and setting the memory
+* attributes for sections, in the MPU translation table.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_cache.h"
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+#include "xil_mpu.h"
+#include "xdebug.h"
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+static const struct {
+	u64 size;
+	unsigned int encoding;
+}region_size[] = {
+	{ 0x20, REGION_32B },
+	{ 0x40, REGION_64B },
+	{ 0x80, REGION_128B },
+	{ 0x100, REGION_256B },
+	{ 0x200, REGION_512B },
+	{ 0x400, REGION_1K },
+	{ 0x800, REGION_2K },
+	{ 0x1000, REGION_4K },
+	{ 0x2000, REGION_8K },
+	{ 0x4000, REGION_16K },
+	{ 0x8000, REGION_32K },
+	{ 0x10000, REGION_64K },
+	{ 0x20000, REGION_128K },
+	{ 0x40000, REGION_256K },
+	{ 0x80000, REGION_512K },
+	{ 0x100000, REGION_1M },
+	{ 0x200000, REGION_2M },
+	{ 0x400000, REGION_4M },
+	{ 0x800000, REGION_8M },
+	{ 0x1000000, REGION_16M },
+	{ 0x2000000, REGION_32M },
+	{ 0x4000000, REGION_64M },
+	{ 0x8000000, REGION_128M },
+	{ 0x10000000, REGION_256M },
+	{ 0x20000000, REGION_512M },
+	{ 0x40000000, REGION_1G },
+	{ 0x80000000, REGION_2G },
+	{ 0x100000000, REGION_4G },
+};
+
+/************************** Function Prototypes ******************************/
+
+/*****************************************************************************
+*
+* Set the memory attributes for a section of memory with starting address addr
+* of the region size 1MB having attributes attrib
+*
+* @param	addr is the address for which attributes are to be set.
+* @param	attrib specifies the attributes for that memory region.
+* @return	None.
+*
+*
+******************************************************************************/
+void Xil_SetTlbAttributes(INTPTR addr, u32 attrib)
+{
+	INTPTR Localaddr = addr;
+	Localaddr &= (~(0xFFFFFU));
+	/* Setting the MPU region with given attribute with 1MB size */
+	Xil_SetMPURegion(Localaddr, 0x100000, attrib);
+}
+
+/*****************************************************************************
+*
+* Set the memory attributes for a section of memory with starting address addr
+* of the region size size and having attributes attrib
+*
+* @param	addr is the address for which attributes are to be set.
+* @param	size is the size of the region.
+* @param	attrib specifies the attributes for that memory region.
+* @return	None.
+*
+*
+******************************************************************************/
+void Xil_SetMPURegion(INTPTR addr, u64 size, u32 attrib)
+{
+	u32 Regionsize = 0;
+	INTPTR Localaddr = addr;
+	u32 NextAvailableMemRegion;
+	unsigned int i;
+
+	Xil_DCacheFlush();
+	Xil_ICacheInvalidate();
+	NextAvailableMemRegion = mfcp(XREG_CP15_MPU_MEMORY_REG_NUMBER);
+	NextAvailableMemRegion++;
+	if (NextAvailableMemRegion > 16) {
+		xdbg_printf(DEBUG, "No regions available\r\n");
+		return;
+	}
+	mtcp(XREG_CP15_MPU_MEMORY_REG_NUMBER,NextAvailableMemRegion);
+	isb();
+
+	/* Lookup the size.  */
+	for (i = 0; i < sizeof region_size / sizeof region_size[0]; i++) {
+		if (size <= region_size[i].size) {
+			Regionsize = region_size[i].encoding;
+			break;
+		}
+	}
+
+	Localaddr &= ~(region_size[i].size - 1);
+
+	Regionsize <<= 1;
+	Regionsize |= REGION_EN;
+	dsb();
+	mtcp(XREG_CP15_MPU_REG_BASEADDR, Localaddr);	/* Set base address of a region */
+	mtcp(XREG_CP15_MPU_REG_ACCESS_CTRL, attrib);	/* Set the control attribute */
+	mtcp(XREG_CP15_MPU_REG_SIZE_EN, Regionsize);	/* set the region size and enable it*/
+	dsb();
+	isb();
+}
+/*****************************************************************************
+*
+* Enable MPU for Cortex R5 processor. This function invalidates I cache and
+* flush the D Caches before enabling the MPU.
+*
+*
+* @param	None.
+* @return	None.
+*
+******************************************************************************/
+void Xil_EnableMPU(void)
+{
+	u32 CtrlReg, Reg;
+	s32 DCacheStatus=0, ICacheStatus=0;
+	/* enable caches only if they are disabled */
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+	if ((CtrlReg & XREG_CP15_CONTROL_C_BIT) != 0x00000000U) {
+		DCacheStatus=1;
+	}
+	if ((CtrlReg & XREG_CP15_CONTROL_I_BIT) != 0x00000000U) {
+		ICacheStatus=1;
+	}
+
+	if(DCacheStatus != 0) {
+		Xil_DCacheDisable();
+	}
+	if(ICacheStatus != 0){
+		Xil_ICacheDisable();
+	}
+	Reg = mfcp(XREG_CP15_SYS_CONTROL);
+	Reg |= 0x00000001U;
+	dsb();
+	mtcp(XREG_CP15_SYS_CONTROL, Reg);
+	isb();
+	/* enable caches only if they are disabled in routine*/
+	if(DCacheStatus != 0) {
+		Xil_DCacheEnable();
+	}
+	if(ICacheStatus != 0) {
+		Xil_ICacheEnable();
+	}
+}
+
+/*****************************************************************************
+*
+* Disable MPU for Cortex R5 processors. This function invalidates I cache and
+* flush the D Caches before disabling the MPU.
+*
+* @param	None.
+*
+* @return	None.
+*
+******************************************************************************/
+void Xil_DisableMPU(void)
+{
+	u32 CtrlReg, Reg;
+	s32 DCacheStatus=0, ICacheStatus=0;
+	/* enable caches only if they are disabled */
+	CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
+	if ((CtrlReg & XREG_CP15_CONTROL_C_BIT) != 0x00000000U) {
+		DCacheStatus=1;
+	}
+	if ((CtrlReg & XREG_CP15_CONTROL_I_BIT) != 0x00000000U) {
+		ICacheStatus=1;
+	}
+
+	if(DCacheStatus != 0) {
+		Xil_DCacheDisable();
+	}
+	if(ICacheStatus != 0){
+		Xil_ICacheDisable();
+	}
+
+	mtcp(XREG_CP15_INVAL_BRANCH_ARRAY, 0);
+	Reg = mfcp(XREG_CP15_SYS_CONTROL);
+	Reg &= ~(0x00000001U);
+	dsb();
+	mtcp(XREG_CP15_SYS_CONTROL, Reg);
+	isb();
+	/* enable caches only if they are disabled in routine*/
+	if(DCacheStatus != 0) {
+		Xil_DCacheEnable();
+	}
+	if(ICacheStatus != 0) {
+		Xil_ICacheEnable();
+	}
+}
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_mpu.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_mpu.h
new file mode 100644
index 0000000..d7f0e1d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_mpu.h
@@ -0,0 +1,80 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_mmu.h
+*
+*
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ---------------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef XIL_MPU_H
+#define XIL_MPU_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+#include "xil_types.h"
+/***************************** Include Files *********************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+void Xil_SetTlbAttributes(INTPTR Addr, u32 attrib);
+void Xil_EnableMPU(void);
+void Xil_DisableMPU(void);
+void Xil_SetMPURegion(INTPTR addr, u64 size, u32 attrib);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XIL_MPU_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_printf.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_printf.c
new file mode 100644
index 0000000..a55c488
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_printf.c
@@ -0,0 +1,360 @@
+/*---------------------------------------------------*/
+/* Modified from :                                   */
+/* Public Domain version of printf                   */
+/* Rud Merriam, Compsult, Inc. Houston, Tx.          */
+/* For Embedded Systems Programming, 1991            */
+/*                                                   */
+/*---------------------------------------------------*/
+#include "xil_printf.h"
+#include "xil_types.h"
+#include "xil_assert.h"
+#include 
+#include 
+#include 
+
+static void padding( const s32 l_flag,const struct params_s *par);
+static void outs(const charptr lp, struct params_s *par);
+static s32 getnum( charptr* linep);
+
+typedef struct params_s {
+    s32 len;
+    s32 num1;
+    s32 num2;
+    char8 pad_character;
+    s32 do_padding;
+    s32 left_flag;
+    s32 unsigned_flag;
+} params_t;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine puts pad characters into the output  */
+/* buffer.                                           */
+/*                                                   */
+static void padding( const s32 l_flag, const struct params_s *par)
+{
+    s32 i;
+
+    if ((par->do_padding != 0) && (l_flag != 0) && (par->len < par->num1)) {
+		i=(par->len);
+        for (; i<(par->num1); i++) {
+#ifdef STDOUT_BASEADDRESS
+            outbyte( par->pad_character);
+#endif
+		}
+    }
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a string to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+static void outs(const charptr lp, struct params_s *par)
+{
+    charptr LocalPtr;
+	LocalPtr = lp;
+    /* pad on left if needed                         */
+	if(LocalPtr != NULL) {
+		par->len = (s32)strlen( LocalPtr);
+	}
+    padding( !(par->left_flag), par);
+
+    /* Move string to the buffer                     */
+    while (((*LocalPtr) != (char8)0) && ((par->num2) != 0)) {
+		(par->num2)--;
+#ifdef STDOUT_BASEADDRESS
+        outbyte(*LocalPtr);
+		LocalPtr += 1;
+#endif
+}
+
+    /* Pad on right if needed                        */
+    /* CR 439175 - elided next stmt. Seemed bogus.   */
+    /* par->len = strlen( lp)                      */
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine moves a number to the output buffer  */
+/* as directed by the padding and positioning flags. */
+/*                                                   */
+
+static void outnum( const s32 n, const s32 base, struct params_s *par)
+{
+    charptr cp;
+    s32 negative;
+	s32 i;
+    char8 outbuf[32];
+    const char8 digits[] = "0123456789ABCDEF";
+    u32 num;
+    for(i = 0; i<32; i++) {
+	outbuf[i] = '0';
+    }
+
+    /* Check if number is negative                   */
+    if ((par->unsigned_flag == 0) && (base == 10) && (n < 0L)) {
+        negative = 1;
+		num =(-(n));
+    }
+    else{
+        num = n;
+        negative = 0;
+    }
+
+    /* Build number (backwards) in outbuf            */
+    i = 0;
+    do {
+		outbuf[i] = digits[(num % base)];
+		i++;
+		num /= base;
+    } while (num > 0);
+
+    if (negative != 0) {
+		outbuf[i] = '-';
+		i++;
+	}
+
+    outbuf[i] = 0;
+    i--;
+
+    /* Move the converted number to the buffer and   */
+    /* add in the padding where needed.              */
+    par->len = (s32)strlen(outbuf);
+    padding( !(par->left_flag), par);
+    while (&outbuf[i] >= outbuf) {
+#ifdef STDOUT_BASEADDRESS
+	outbyte( outbuf[i] );
+		i--;
+#endif
+}
+    padding( par->left_flag, par);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine gets a number from the format        */
+/* string.                                           */
+/*                                                   */
+static s32 getnum( charptr* linep)
+{
+    s32 n;
+    s32 ResultIsDigit = 0;
+    charptr cptr;
+    n = 0;
+    cptr = *linep;
+	if(cptr != NULL){
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    while (ResultIsDigit != 0) {
+		if(cptr != NULL){
+			n = ((n*10) + (((s32)*cptr) - (s32)'0'));
+			cptr += 1;
+			if(cptr != NULL){
+				ResultIsDigit = isdigit(((s32)*cptr));
+			}
+		}
+		ResultIsDigit = isdigit(((s32)*cptr));
+	}
+    *linep = ((charptr )(cptr));
+    return(n);
+}
+
+/*---------------------------------------------------*/
+/*                                                   */
+/* This routine operates just like a printf/sprintf  */
+/* routine. It outputs a set of data under the       */
+/* control of a formatting string. Not all of the    */
+/* standard C format control are supported. The ones */
+/* provided are primarily those needed for embedded  */
+/* systems work. Primarily the floating point        */
+/* routines are omitted. Other formats could be      */
+/* added easily by following the examples shown for  */
+/* the supported formats.                            */
+/*                                                   */
+
+/* void esp_printf( const func_ptr f_ptr,
+   const charptr ctrl1, ...) */
+void xil_printf( const char8 *ctrl1, ...)
+{
+	s32 Check;
+    s32 long_flag;
+    s32 dot_flag;
+
+    params_t par;
+
+    char8 ch;
+    va_list argp;
+    char8 *ctrl = (char8 *)ctrl1;
+
+    va_start( argp, ctrl1);
+
+    while ((ctrl != NULL) && (*ctrl != (char8)0)) {
+
+        /* move format string chars to buffer until a  */
+        /* format control is found.                    */
+        if (*ctrl != '%') {
+#ifdef STDOUT_BASEADDRESS
+            outbyte(*ctrl);
+			ctrl += 1;
+#endif
+            continue;
+        }
+
+        /* initialize all the flags for this format.   */
+        dot_flag = 0;
+		long_flag = 0;
+        par.unsigned_flag = 0;
+		par.left_flag = 0;
+		par.do_padding = 0;
+        par.pad_character = ' ';
+        par.num2=32767;
+		par.num1=0;
+		par.len=0;
+
+ try_next:
+		if(ctrl != NULL) {
+			ctrl += 1;
+		}
+		if(ctrl != NULL) {
+			ch = *ctrl;
+		}
+		else {
+			ch = *ctrl;
+		}
+
+        if (isdigit((s32)ch) != 0) {
+            if (dot_flag != 0) {
+                par.num2 = getnum(&ctrl);
+			}
+            else {
+                if (ch == '0') {
+                    par.pad_character = '0';
+				}
+				if(ctrl != NULL) {
+			par.num1 = getnum(&ctrl);
+				}
+                par.do_padding = 1;
+            }
+            if(ctrl != NULL) {
+			ctrl -= 1;
+			}
+            goto try_next;
+        }
+
+        switch (tolower((s32)ch)) {
+            case '%':
+#ifdef STDOUT_BASEADDRESS
+                outbyte( '%');
+#endif
+                Check = 1;
+                break;
+
+            case '-':
+                par.left_flag = 1;
+                Check = 0;
+                break;
+
+            case '.':
+                dot_flag = 1;
+                Check = 0;
+                break;
+
+            case 'l':
+                long_flag = 1;
+                Check = 0;
+                break;
+
+            case 'u':
+                par.unsigned_flag = 1;
+                /* fall through */
+            case 'i':
+            case 'd':
+                if ((long_flag != 0) || (ch == 'D')) {
+                    outnum( va_arg(argp, s32), 10L, &par);
+                }
+                else {
+                    outnum( va_arg(argp, s32), 10L, &par);
+                }
+				Check = 1;
+                break;
+            case 'p':
+            case 'X':
+            case 'x':
+                par.unsigned_flag = 1;
+                outnum((s32)va_arg(argp, s32), 16L, &par);
+                Check = 1;
+                break;
+
+            case 's':
+                outs( va_arg( argp, char *), &par);
+                Check = 1;
+                break;
+
+            case 'c':
+#ifdef STDOUT_BASEADDRESS
+                outbyte( va_arg( argp, s32));
+#endif
+                Check = 1;
+                break;
+
+            case '\\':
+                switch (*ctrl) {
+                    case 'a':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x07));
+#endif
+                        break;
+                    case 'h':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x08));
+#endif
+                        break;
+                    case 'r':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x0D));
+#endif
+                        break;
+                    case 'n':
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( ((char8)0x0D));
+                        outbyte( ((char8)0x0A));
+#endif
+                        break;
+                    default:
+#ifdef STDOUT_BASEADDRESS
+                        outbyte( *ctrl);
+#endif
+                        break;
+                }
+                ctrl += 1;
+                Check = 0;
+                break;
+
+            default:
+		Check = 1;
+		break;
+        }
+        if(Check == 1) {
+			if(ctrl != NULL) {
+				ctrl += 1;
+			}
+                continue;
+        }
+        goto try_next;
+    }
+    va_end( argp);
+}
+
+/*---------------------------------------------------*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_printf.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_printf.h
new file mode 100644
index 0000000..77ba280
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xil_printf.h
@@ -0,0 +1,44 @@
+ #ifndef XIL_PRINTF_H
+ #define XIL_PRINTF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include 
+#include 
+#include 
+#include "xil_types.h"
+#include "xparameters.h"
+
+/*----------------------------------------------------*/
+/* Use the following parameter passing structure to   */
+/* make xil_printf re-entrant.                        */
+/*----------------------------------------------------*/
+
+struct params_s;
+
+
+/*---------------------------------------------------*/
+/* The purpose of this routine is to output data the */
+/* same as the standard printf function without the  */
+/* overhead most run-time libraries involve. Usually */
+/* the printf brings in many kilobytes of code and   */
+/* that is unacceptable in most embedded systems.    */
+/*---------------------------------------------------*/
+
+typedef char8* charptr;
+typedef s32 (*func_ptr)(int c);
+
+/*                                                   */
+
+void xil_printf( const char8 *ctrl1, ...);
+void print( const char8 *ptr);
+extern void outbyte (char8 c);
+extern char8 inbyte(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xiou_secure_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xiou_secure_slcr.h
new file mode 100644
index 0000000..98952f0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xiou_secure_slcr.h
@@ -0,0 +1,174 @@
+/* ### HEADER ### */
+
+#ifndef __XIOU_SECURE_SLCR_H__
+#define __XIOU_SECURE_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XiouSecureSlcr Base Address
+ */
+#define XIOU_SECURE_SLCR_BASEADDR      0xFF240000UL
+
+/**
+ * Register: XiouSecSlcrAxiWprtcn
+ */
+#define XIOU_SEC_SLCR_AXI_WPRTCN    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000000UL )
+#define XIOU_SEC_SLCR_AXI_WPRTCN_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_SHIFT   25UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_MASK    0x0e000000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XQSPIPSAXI_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_SHIFT   22UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_MASK    0x01c00000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XNANDPS8_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_SHIFT   19UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_MASK    0x00380000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_SHIFT   16UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_MASK    0x00070000UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XSDPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   9UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000e00UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   6UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x000001c0UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000038UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_SHIFT   0UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_MASK    0x00000007UL
+#define XIOU_SEC_SLCR_AXI_WPRTCN_XEMACPS_AWPROT_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrAxiRprtcn
+ */
+#define XIOU_SEC_SLCR_AXI_RPRTCN    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000004UL )
+#define XIOU_SEC_SLCR_AXI_RPRTCN_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_SHIFT   22UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_MASK    0x01c00000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XNANDPS8_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_SHIFT   19UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_MASK    0x00380000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_SHIFT   16UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_MASK    0x00070000UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XSDPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   9UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000e00UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   6UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x000001c0UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000038UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_SHIFT   0UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_WIDTH   3UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_MASK    0x00000007UL
+#define XIOU_SEC_SLCR_AXI_RPRTCN_XEMACPS_ARPROT_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrCtrl
+ */
+#define XIOU_SEC_SLCR_CTRL    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000040UL )
+#define XIOU_SEC_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrIsr
+ */
+#define XIOU_SEC_SLCR_ISR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000044UL )
+#define XIOU_SEC_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrImr
+ */
+#define XIOU_SEC_SLCR_IMR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000048UL )
+#define XIOU_SEC_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSecSlcrIer
+ */
+#define XIOU_SEC_SLCR_IER    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XIOU_SEC_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrIdr
+ */
+#define XIOU_SEC_SLCR_IDR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000050UL )
+#define XIOU_SEC_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSecSlcrItr
+ */
+#define XIOU_SEC_SLCR_ITR    ( ( XIOU_SECURE_SLCR_BASEADDR ) + 0x00000054UL )
+#define XIOU_SEC_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SEC_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XIOU_SECURE_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xiou_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xiou_slcr.h
new file mode 100644
index 0000000..b30914e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xiou_slcr.h
@@ -0,0 +1,4029 @@
+/* ### HEADER ### */
+
+#ifndef __XIOU_SLCR_H__
+#define __XIOU_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XiouSlcr Base Address
+ */
+#define XIOU_SLCR_BASEADDR      0xFF180000UL
+
+/**
+ * Register: XiouSlcrMioPin0
+ */
+#define XIOU_SLCR_MIO_PIN_0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000000UL )
+#define XIOU_SLCR_MIO_PIN_0_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_0_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_0_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_0_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_0_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin1
+ */
+#define XIOU_SLCR_MIO_PIN_1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000004UL )
+#define XIOU_SLCR_MIO_PIN_1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_1_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_1_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_1_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_1_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin2
+ */
+#define XIOU_SLCR_MIO_PIN_2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000008UL )
+#define XIOU_SLCR_MIO_PIN_2_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_2_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_2_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_2_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_2_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin3
+ */
+#define XIOU_SLCR_MIO_PIN_3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XIOU_SLCR_MIO_PIN_3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_3_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_3_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_3_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_3_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin4
+ */
+#define XIOU_SLCR_MIO_PIN_4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000010UL )
+#define XIOU_SLCR_MIO_PIN_4_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_4_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_4_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_4_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_4_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin5
+ */
+#define XIOU_SLCR_MIO_PIN_5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000014UL )
+#define XIOU_SLCR_MIO_PIN_5_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_5_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_5_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_5_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_5_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin6
+ */
+#define XIOU_SLCR_MIO_PIN_6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000018UL )
+#define XIOU_SLCR_MIO_PIN_6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_6_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_6_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_6_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_6_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin7
+ */
+#define XIOU_SLCR_MIO_PIN_7    ( ( XIOU_SLCR_BASEADDR ) + 0x0000001CUL )
+#define XIOU_SLCR_MIO_PIN_7_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_7_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_7_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_7_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_7_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin8
+ */
+#define XIOU_SLCR_MIO_PIN_8    ( ( XIOU_SLCR_BASEADDR ) + 0x00000020UL )
+#define XIOU_SLCR_MIO_PIN_8_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_8_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_8_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_8_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_8_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin9
+ */
+#define XIOU_SLCR_MIO_PIN_9    ( ( XIOU_SLCR_BASEADDR ) + 0x00000024UL )
+#define XIOU_SLCR_MIO_PIN_9_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_9_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_9_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_9_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_9_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin10
+ */
+#define XIOU_SLCR_MIO_PIN_10    ( ( XIOU_SLCR_BASEADDR ) + 0x00000028UL )
+#define XIOU_SLCR_MIO_PIN_10_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_10_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_10_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_10_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_10_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin11
+ */
+#define XIOU_SLCR_MIO_PIN_11    ( ( XIOU_SLCR_BASEADDR ) + 0x0000002CUL )
+#define XIOU_SLCR_MIO_PIN_11_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_11_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_11_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_11_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_11_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin12
+ */
+#define XIOU_SLCR_MIO_PIN_12    ( ( XIOU_SLCR_BASEADDR ) + 0x00000030UL )
+#define XIOU_SLCR_MIO_PIN_12_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_12_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_12_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_12_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_12_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin13
+ */
+#define XIOU_SLCR_MIO_PIN_13    ( ( XIOU_SLCR_BASEADDR ) + 0x00000034UL )
+#define XIOU_SLCR_MIO_PIN_13_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_13_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_13_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_13_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_13_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin14
+ */
+#define XIOU_SLCR_MIO_PIN_14    ( ( XIOU_SLCR_BASEADDR ) + 0x00000038UL )
+#define XIOU_SLCR_MIO_PIN_14_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_14_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_14_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_14_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_14_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin15
+ */
+#define XIOU_SLCR_MIO_PIN_15    ( ( XIOU_SLCR_BASEADDR ) + 0x0000003CUL )
+#define XIOU_SLCR_MIO_PIN_15_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_15_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_15_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_15_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_15_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin16
+ */
+#define XIOU_SLCR_MIO_PIN_16    ( ( XIOU_SLCR_BASEADDR ) + 0x00000040UL )
+#define XIOU_SLCR_MIO_PIN_16_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_16_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_16_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_16_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_16_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin17
+ */
+#define XIOU_SLCR_MIO_PIN_17    ( ( XIOU_SLCR_BASEADDR ) + 0x00000044UL )
+#define XIOU_SLCR_MIO_PIN_17_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_17_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_17_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_17_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_17_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin18
+ */
+#define XIOU_SLCR_MIO_PIN_18    ( ( XIOU_SLCR_BASEADDR ) + 0x00000048UL )
+#define XIOU_SLCR_MIO_PIN_18_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_18_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_18_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_18_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_18_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin19
+ */
+#define XIOU_SLCR_MIO_PIN_19    ( ( XIOU_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XIOU_SLCR_MIO_PIN_19_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_19_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_19_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_19_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_19_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin20
+ */
+#define XIOU_SLCR_MIO_PIN_20    ( ( XIOU_SLCR_BASEADDR ) + 0x00000050UL )
+#define XIOU_SLCR_MIO_PIN_20_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_20_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_20_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_20_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_20_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin21
+ */
+#define XIOU_SLCR_MIO_PIN_21    ( ( XIOU_SLCR_BASEADDR ) + 0x00000054UL )
+#define XIOU_SLCR_MIO_PIN_21_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_21_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_21_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_21_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_21_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin22
+ */
+#define XIOU_SLCR_MIO_PIN_22    ( ( XIOU_SLCR_BASEADDR ) + 0x00000058UL )
+#define XIOU_SLCR_MIO_PIN_22_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_22_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_22_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_22_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_22_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin23
+ */
+#define XIOU_SLCR_MIO_PIN_23    ( ( XIOU_SLCR_BASEADDR ) + 0x0000005CUL )
+#define XIOU_SLCR_MIO_PIN_23_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_23_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_23_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_23_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_23_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin24
+ */
+#define XIOU_SLCR_MIO_PIN_24    ( ( XIOU_SLCR_BASEADDR ) + 0x00000060UL )
+#define XIOU_SLCR_MIO_PIN_24_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_24_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_24_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_24_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_24_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin25
+ */
+#define XIOU_SLCR_MIO_PIN_25    ( ( XIOU_SLCR_BASEADDR ) + 0x00000064UL )
+#define XIOU_SLCR_MIO_PIN_25_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_25_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_25_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_25_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_25_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin26
+ */
+#define XIOU_SLCR_MIO_PIN_26    ( ( XIOU_SLCR_BASEADDR ) + 0x00000068UL )
+#define XIOU_SLCR_MIO_PIN_26_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_26_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_26_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_26_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_26_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin27
+ */
+#define XIOU_SLCR_MIO_PIN_27    ( ( XIOU_SLCR_BASEADDR ) + 0x0000006CUL )
+#define XIOU_SLCR_MIO_PIN_27_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_27_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_27_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_27_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_27_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin28
+ */
+#define XIOU_SLCR_MIO_PIN_28    ( ( XIOU_SLCR_BASEADDR ) + 0x00000070UL )
+#define XIOU_SLCR_MIO_PIN_28_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_28_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_28_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_28_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_28_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin29
+ */
+#define XIOU_SLCR_MIO_PIN_29    ( ( XIOU_SLCR_BASEADDR ) + 0x00000074UL )
+#define XIOU_SLCR_MIO_PIN_29_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_29_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_29_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_29_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_29_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin30
+ */
+#define XIOU_SLCR_MIO_PIN_30    ( ( XIOU_SLCR_BASEADDR ) + 0x00000078UL )
+#define XIOU_SLCR_MIO_PIN_30_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_30_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_30_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_30_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_30_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin31
+ */
+#define XIOU_SLCR_MIO_PIN_31    ( ( XIOU_SLCR_BASEADDR ) + 0x0000007CUL )
+#define XIOU_SLCR_MIO_PIN_31_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_31_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_31_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_31_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_31_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin32
+ */
+#define XIOU_SLCR_MIO_PIN_32    ( ( XIOU_SLCR_BASEADDR ) + 0x00000080UL )
+#define XIOU_SLCR_MIO_PIN_32_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_32_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_32_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_32_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_32_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin33
+ */
+#define XIOU_SLCR_MIO_PIN_33    ( ( XIOU_SLCR_BASEADDR ) + 0x00000084UL )
+#define XIOU_SLCR_MIO_PIN_33_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_33_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_33_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_33_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_33_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin34
+ */
+#define XIOU_SLCR_MIO_PIN_34    ( ( XIOU_SLCR_BASEADDR ) + 0x00000088UL )
+#define XIOU_SLCR_MIO_PIN_34_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_34_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_34_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_34_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_34_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin35
+ */
+#define XIOU_SLCR_MIO_PIN_35    ( ( XIOU_SLCR_BASEADDR ) + 0x0000008CUL )
+#define XIOU_SLCR_MIO_PIN_35_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_35_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_35_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_35_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_35_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin36
+ */
+#define XIOU_SLCR_MIO_PIN_36    ( ( XIOU_SLCR_BASEADDR ) + 0x00000090UL )
+#define XIOU_SLCR_MIO_PIN_36_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_36_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_36_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_36_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_36_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin37
+ */
+#define XIOU_SLCR_MIO_PIN_37    ( ( XIOU_SLCR_BASEADDR ) + 0x00000094UL )
+#define XIOU_SLCR_MIO_PIN_37_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_37_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_37_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_37_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_37_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin38
+ */
+#define XIOU_SLCR_MIO_PIN_38    ( ( XIOU_SLCR_BASEADDR ) + 0x00000098UL )
+#define XIOU_SLCR_MIO_PIN_38_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_38_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_38_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_38_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_38_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin39
+ */
+#define XIOU_SLCR_MIO_PIN_39    ( ( XIOU_SLCR_BASEADDR ) + 0x0000009CUL )
+#define XIOU_SLCR_MIO_PIN_39_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_39_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_39_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_39_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_39_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin40
+ */
+#define XIOU_SLCR_MIO_PIN_40    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A0UL )
+#define XIOU_SLCR_MIO_PIN_40_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_40_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_40_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_40_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_40_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin41
+ */
+#define XIOU_SLCR_MIO_PIN_41    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A4UL )
+#define XIOU_SLCR_MIO_PIN_41_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_41_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_41_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_41_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_41_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin42
+ */
+#define XIOU_SLCR_MIO_PIN_42    ( ( XIOU_SLCR_BASEADDR ) + 0x000000A8UL )
+#define XIOU_SLCR_MIO_PIN_42_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_42_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_42_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_42_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_42_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin43
+ */
+#define XIOU_SLCR_MIO_PIN_43    ( ( XIOU_SLCR_BASEADDR ) + 0x000000ACUL )
+#define XIOU_SLCR_MIO_PIN_43_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_43_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_43_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_43_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_43_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin44
+ */
+#define XIOU_SLCR_MIO_PIN_44    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B0UL )
+#define XIOU_SLCR_MIO_PIN_44_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_44_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_44_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_44_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_44_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin45
+ */
+#define XIOU_SLCR_MIO_PIN_45    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B4UL )
+#define XIOU_SLCR_MIO_PIN_45_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_45_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_45_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_45_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_45_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin46
+ */
+#define XIOU_SLCR_MIO_PIN_46    ( ( XIOU_SLCR_BASEADDR ) + 0x000000B8UL )
+#define XIOU_SLCR_MIO_PIN_46_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_46_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_46_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_46_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_46_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin47
+ */
+#define XIOU_SLCR_MIO_PIN_47    ( ( XIOU_SLCR_BASEADDR ) + 0x000000BCUL )
+#define XIOU_SLCR_MIO_PIN_47_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_47_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_47_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_47_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_47_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin48
+ */
+#define XIOU_SLCR_MIO_PIN_48    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C0UL )
+#define XIOU_SLCR_MIO_PIN_48_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_48_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_48_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_48_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_48_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin49
+ */
+#define XIOU_SLCR_MIO_PIN_49    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C4UL )
+#define XIOU_SLCR_MIO_PIN_49_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_49_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_49_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_49_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_49_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin50
+ */
+#define XIOU_SLCR_MIO_PIN_50    ( ( XIOU_SLCR_BASEADDR ) + 0x000000C8UL )
+#define XIOU_SLCR_MIO_PIN_50_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_50_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_50_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_50_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_50_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin51
+ */
+#define XIOU_SLCR_MIO_PIN_51    ( ( XIOU_SLCR_BASEADDR ) + 0x000000CCUL )
+#define XIOU_SLCR_MIO_PIN_51_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_51_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_51_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_51_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_51_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin52
+ */
+#define XIOU_SLCR_MIO_PIN_52    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D0UL )
+#define XIOU_SLCR_MIO_PIN_52_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_52_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_52_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_52_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_52_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin53
+ */
+#define XIOU_SLCR_MIO_PIN_53    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D4UL )
+#define XIOU_SLCR_MIO_PIN_53_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_53_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_53_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_53_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_53_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin54
+ */
+#define XIOU_SLCR_MIO_PIN_54    ( ( XIOU_SLCR_BASEADDR ) + 0x000000D8UL )
+#define XIOU_SLCR_MIO_PIN_54_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_54_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_54_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_54_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_54_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin55
+ */
+#define XIOU_SLCR_MIO_PIN_55    ( ( XIOU_SLCR_BASEADDR ) + 0x000000DCUL )
+#define XIOU_SLCR_MIO_PIN_55_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_55_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_55_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_55_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_55_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin56
+ */
+#define XIOU_SLCR_MIO_PIN_56    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E0UL )
+#define XIOU_SLCR_MIO_PIN_56_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_56_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_56_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_56_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_56_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin57
+ */
+#define XIOU_SLCR_MIO_PIN_57    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E4UL )
+#define XIOU_SLCR_MIO_PIN_57_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_57_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_57_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_57_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_57_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin58
+ */
+#define XIOU_SLCR_MIO_PIN_58    ( ( XIOU_SLCR_BASEADDR ) + 0x000000E8UL )
+#define XIOU_SLCR_MIO_PIN_58_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_58_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_58_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_58_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_58_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin59
+ */
+#define XIOU_SLCR_MIO_PIN_59    ( ( XIOU_SLCR_BASEADDR ) + 0x000000ECUL )
+#define XIOU_SLCR_MIO_PIN_59_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_59_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_59_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_59_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_59_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin60
+ */
+#define XIOU_SLCR_MIO_PIN_60    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F0UL )
+#define XIOU_SLCR_MIO_PIN_60_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_60_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_60_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_60_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_60_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin61
+ */
+#define XIOU_SLCR_MIO_PIN_61    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F4UL )
+#define XIOU_SLCR_MIO_PIN_61_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_61_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_61_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_61_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_61_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin62
+ */
+#define XIOU_SLCR_MIO_PIN_62    ( ( XIOU_SLCR_BASEADDR ) + 0x000000F8UL )
+#define XIOU_SLCR_MIO_PIN_62_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_62_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_62_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_62_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_62_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin63
+ */
+#define XIOU_SLCR_MIO_PIN_63    ( ( XIOU_SLCR_BASEADDR ) + 0x000000FCUL )
+#define XIOU_SLCR_MIO_PIN_63_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_63_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_63_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_63_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_63_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin64
+ */
+#define XIOU_SLCR_MIO_PIN_64    ( ( XIOU_SLCR_BASEADDR ) + 0x00000100UL )
+#define XIOU_SLCR_MIO_PIN_64_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_64_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_64_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_64_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_64_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin65
+ */
+#define XIOU_SLCR_MIO_PIN_65    ( ( XIOU_SLCR_BASEADDR ) + 0x00000104UL )
+#define XIOU_SLCR_MIO_PIN_65_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_65_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_65_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_65_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_65_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin66
+ */
+#define XIOU_SLCR_MIO_PIN_66    ( ( XIOU_SLCR_BASEADDR ) + 0x00000108UL )
+#define XIOU_SLCR_MIO_PIN_66_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_66_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_66_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_66_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_66_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin67
+ */
+#define XIOU_SLCR_MIO_PIN_67    ( ( XIOU_SLCR_BASEADDR ) + 0x0000010CUL )
+#define XIOU_SLCR_MIO_PIN_67_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_67_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_67_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_67_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_67_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin68
+ */
+#define XIOU_SLCR_MIO_PIN_68    ( ( XIOU_SLCR_BASEADDR ) + 0x00000110UL )
+#define XIOU_SLCR_MIO_PIN_68_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_68_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_68_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_68_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_68_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin69
+ */
+#define XIOU_SLCR_MIO_PIN_69    ( ( XIOU_SLCR_BASEADDR ) + 0x00000114UL )
+#define XIOU_SLCR_MIO_PIN_69_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_69_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_69_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_69_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_69_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin70
+ */
+#define XIOU_SLCR_MIO_PIN_70    ( ( XIOU_SLCR_BASEADDR ) + 0x00000118UL )
+#define XIOU_SLCR_MIO_PIN_70_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_70_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_70_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_70_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_70_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin71
+ */
+#define XIOU_SLCR_MIO_PIN_71    ( ( XIOU_SLCR_BASEADDR ) + 0x0000011CUL )
+#define XIOU_SLCR_MIO_PIN_71_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_71_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_71_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_71_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_71_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin72
+ */
+#define XIOU_SLCR_MIO_PIN_72    ( ( XIOU_SLCR_BASEADDR ) + 0x00000120UL )
+#define XIOU_SLCR_MIO_PIN_72_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_72_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_72_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_72_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_72_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin73
+ */
+#define XIOU_SLCR_MIO_PIN_73    ( ( XIOU_SLCR_BASEADDR ) + 0x00000124UL )
+#define XIOU_SLCR_MIO_PIN_73_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_73_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_73_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_73_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_73_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin74
+ */
+#define XIOU_SLCR_MIO_PIN_74    ( ( XIOU_SLCR_BASEADDR ) + 0x00000128UL )
+#define XIOU_SLCR_MIO_PIN_74_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_74_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_74_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_74_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_74_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin75
+ */
+#define XIOU_SLCR_MIO_PIN_75    ( ( XIOU_SLCR_BASEADDR ) + 0x0000012CUL )
+#define XIOU_SLCR_MIO_PIN_75_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_75_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_75_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_75_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_75_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin76
+ */
+#define XIOU_SLCR_MIO_PIN_76    ( ( XIOU_SLCR_BASEADDR ) + 0x00000130UL )
+#define XIOU_SLCR_MIO_PIN_76_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_76_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_76_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_76_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_76_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioPin77
+ */
+#define XIOU_SLCR_MIO_PIN_77    ( ( XIOU_SLCR_BASEADDR ) + 0x00000134UL )
+#define XIOU_SLCR_MIO_PIN_77_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_SHIFT   5UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_WIDTH   3UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_MASK    0x000000e0UL
+#define XIOU_SLCR_MIO_PIN_77_L3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_SHIFT   3UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_WIDTH   2UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_MASK    0x00000018UL
+#define XIOU_SLCR_MIO_PIN_77_L2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_SHIFT   2UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_PIN_77_L1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_SHIFT   1UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_WIDTH   1UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_PIN_77_L0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl0
+ */
+#define XIOU_SLCR_BANK0_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000138UL )
+#define XIOU_SLCR_BANK0_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl1
+ */
+#define XIOU_SLCR_BANK0_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000013CUL )
+#define XIOU_SLCR_BANK0_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl3
+ */
+#define XIOU_SLCR_BANK0_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000140UL )
+#define XIOU_SLCR_BANK0_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Ctrl4
+ */
+#define XIOU_SLCR_BANK0_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000144UL )
+#define XIOU_SLCR_BANK0_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl5
+ */
+#define XIOU_SLCR_BANK0_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000148UL )
+#define XIOU_SLCR_BANK0_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank0Ctrl6
+ */
+#define XIOU_SLCR_BANK0_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x0000014CUL )
+#define XIOU_SLCR_BANK0_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK0_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank0Sts
+ */
+#define XIOU_SLCR_BANK0_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000150UL )
+#define XIOU_SLCR_BANK0_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK0_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl0
+ */
+#define XIOU_SLCR_BANK1_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000154UL )
+#define XIOU_SLCR_BANK1_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl1
+ */
+#define XIOU_SLCR_BANK1_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000158UL )
+#define XIOU_SLCR_BANK1_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl3
+ */
+#define XIOU_SLCR_BANK1_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x0000015CUL )
+#define XIOU_SLCR_BANK1_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Ctrl4
+ */
+#define XIOU_SLCR_BANK1_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x00000160UL )
+#define XIOU_SLCR_BANK1_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl5
+ */
+#define XIOU_SLCR_BANK1_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000164UL )
+#define XIOU_SLCR_BANK1_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank1Ctrl6
+ */
+#define XIOU_SLCR_BANK1_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000168UL )
+#define XIOU_SLCR_BANK1_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK1_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank1Sts
+ */
+#define XIOU_SLCR_BANK1_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x0000016CUL )
+#define XIOU_SLCR_BANK1_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK1_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl0
+ */
+#define XIOU_SLCR_BANK2_CTRL0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000170UL )
+#define XIOU_SLCR_BANK2_CTRL0_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL0_DRIVE0_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl1
+ */
+#define XIOU_SLCR_BANK2_CTRL1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000174UL )
+#define XIOU_SLCR_BANK2_CTRL1_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL1_DRIVE1_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl3
+ */
+#define XIOU_SLCR_BANK2_CTRL3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000178UL )
+#define XIOU_SLCR_BANK2_CTRL3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL3_SCHMITT_CMOS_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Ctrl4
+ */
+#define XIOU_SLCR_BANK2_CTRL4    ( ( XIOU_SLCR_BASEADDR ) + 0x0000017CUL )
+#define XIOU_SLCR_BANK2_CTRL4_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL4_PULLHILO_N_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl5
+ */
+#define XIOU_SLCR_BANK2_CTRL5    ( ( XIOU_SLCR_BASEADDR ) + 0x00000180UL )
+#define XIOU_SLCR_BANK2_CTRL5_RSTVAL   0x03ffffffUL
+
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL5_PULL_EN_DEFVAL  0x3ffffffUL
+
+/**
+ * Register: XiouSlcrBank2Ctrl6
+ */
+#define XIOU_SLCR_BANK2_CTRL6    ( ( XIOU_SLCR_BASEADDR ) + 0x00000184UL )
+#define XIOU_SLCR_BANK2_CTRL6_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_SHIFT   0UL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_WIDTH   26UL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_MASK    0x03ffffffUL
+#define XIOU_SLCR_BANK2_CTRL6_SLOW_FAST_SLEW_N_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrBank2Sts
+ */
+#define XIOU_SLCR_BANK2_STS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000188UL )
+#define XIOU_SLCR_BANK2_STS_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_SHIFT   0UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_WIDTH   1UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_MASK    0x00000001UL
+#define XIOU_SLCR_BANK2_STS_VOLTAGE_MODE_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioLpbck
+ */
+#define XIOU_SLCR_MIO_LPBCK    ( ( XIOU_SLCR_BASEADDR ) + 0x00000200UL )
+#define XIOU_SLCR_MIO_LPBCK_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_SHIFT   3UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_LPBCK_XI2CPS_LOOP_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_SHIFT   2UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_LPBCK_CAN0_LOOP_CAN1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_SHIFT   1UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_LPBCK_UA0_LOOP_UA1_DEFVAL  0x0UL
+
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_SHIFT   0UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_WIDTH   1UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_LPBCK_XSPIPS_LOOP_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrMioMstTri0
+ */
+#define XIOU_SLCR_MIO_MST_TRI0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000204UL )
+#define XIOU_SLCR_MIO_MST_TRI0_RSTVAL   0xffffffffUL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_SHIFT   31UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_MASK    0x80000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_31_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_SHIFT   30UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_MASK    0x40000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_30_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_SHIFT   29UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_MASK    0x20000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_29_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_SHIFT   28UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_MASK    0x10000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_28_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_SHIFT   27UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_MASK    0x08000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_27_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_SHIFT   26UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_MASK    0x04000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_26_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_SHIFT   25UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_MASK    0x02000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_25_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_SHIFT   24UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_MASK    0x01000000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_24_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_SHIFT   23UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_MASK    0x00800000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_23_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_SHIFT   22UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_MASK    0x00400000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_22_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_SHIFT   21UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_MASK    0x00200000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_21_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_SHIFT   20UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_MASK    0x00100000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_20_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_SHIFT   19UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_MASK    0x00080000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_19_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_SHIFT   18UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_MASK    0x00040000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_18_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_SHIFT   17UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_MASK    0x00020000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_17_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_SHIFT   16UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_MASK    0x00010000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_16_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_SHIFT   15UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_MASK    0x00008000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_15_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_SHIFT   14UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_MASK    0x00004000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_14_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_13_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_12_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_11_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_10_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_09_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_08_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_07_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_06_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_05_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_04_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_03_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_02_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_01_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI0_PIN_00_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrMioMstTri1
+ */
+#define XIOU_SLCR_MIO_MST_TRI1    ( ( XIOU_SLCR_BASEADDR ) + 0x00000208UL )
+#define XIOU_SLCR_MIO_MST_TRI1_RSTVAL   0xffffffffUL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_SHIFT   31UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_MASK    0x80000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_63_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_SHIFT   30UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_MASK    0x40000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_62_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_SHIFT   29UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_MASK    0x20000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_61_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_SHIFT   28UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_MASK    0x10000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_60_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_SHIFT   27UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_MASK    0x08000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_59_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_SHIFT   26UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_MASK    0x04000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_58_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_SHIFT   25UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_MASK    0x02000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_57_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_SHIFT   24UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_MASK    0x01000000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_56_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_SHIFT   23UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_MASK    0x00800000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_55_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_SHIFT   22UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_MASK    0x00400000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_54_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_SHIFT   21UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_MASK    0x00200000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_53_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_SHIFT   20UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_MASK    0x00100000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_52_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_SHIFT   19UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_MASK    0x00080000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_51_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_SHIFT   18UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_MASK    0x00040000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_50_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_SHIFT   17UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_MASK    0x00020000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_49_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_SHIFT   16UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_MASK    0x00010000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_48_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_SHIFT   15UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_MASK    0x00008000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_47_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_SHIFT   14UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_MASK    0x00004000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_46_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_45_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_44_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_43_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_42_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_41_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_40_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_39_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_38_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_37_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_36_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_35_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_34_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_33_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI1_PIN_32_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrMioMstTri2
+ */
+#define XIOU_SLCR_MIO_MST_TRI2    ( ( XIOU_SLCR_BASEADDR ) + 0x0000020CUL )
+#define XIOU_SLCR_MIO_MST_TRI2_RSTVAL   0x00003fffUL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_SHIFT   13UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_MASK    0x00002000UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_77_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_SHIFT   12UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_MASK    0x00001000UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_76_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_SHIFT   11UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_MASK    0x00000800UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_75_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_SHIFT   10UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_MASK    0x00000400UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_74_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_SHIFT   9UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_MASK    0x00000200UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_73_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_SHIFT   8UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_MASK    0x00000100UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_72_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_SHIFT   7UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_MASK    0x00000080UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_71_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_SHIFT   6UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_MASK    0x00000040UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_70_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_SHIFT   5UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_MASK    0x00000020UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_69_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_SHIFT   4UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_MASK    0x00000010UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_68_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_SHIFT   3UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_MASK    0x00000008UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_67_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_SHIFT   2UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_MASK    0x00000004UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_66_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_SHIFT   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_MASK    0x00000002UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_65_TRI_DEFVAL  0x1UL
+
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_SHIFT   0UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_WIDTH   1UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_MASK    0x00000001UL
+#define XIOU_SLCR_MIO_MST_TRI2_PIN_64_TRI_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrWdtClkSel
+ */
+#define XIOU_SLCR_WDT_CLK_SEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000300UL )
+#define XIOU_SLCR_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_WDT_CLK_SEL_SHIFT   0UL
+#define XIOU_SLCR_WDT_CLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_WDT_CLK_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrCanMioCtrl
+ */
+#define XIOU_SLCR_CAN_MIO_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000304UL )
+#define XIOU_SLCR_CAN_MIO_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_SHIFT   23UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_MASK    0x00800000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_RXIN_REG_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_SHIFT   22UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_MASK    0x00400000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_REF_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_SHIFT   15UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_WIDTH   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_MASK    0x003f8000UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN1_MUX_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_SHIFT   8UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_MASK    0x00000100UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_RXIN_REG_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_SHIFT   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_WIDTH   1UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_MASK    0x00000080UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_REF_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_SHIFT   0UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_WIDTH   7UL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_MASK    0x0000007fUL
+#define XIOU_SLCR_CAN_MIO_CTRL_CAN0_MUX_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrGemClkCtrl
+ */
+#define XIOU_SLCR_GEM_CLK_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000308UL )
+#define XIOU_SLCR_GEM_CLK_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_SHIFT   22UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_MASK    0x00400000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_LB_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_SHIFT   20UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_WIDTH   2UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_MASK    0x00300000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_TSU_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   18UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00040000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   17UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00020000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   16UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00010000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   15UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00008000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   13UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00002000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   12UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00001000UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   11UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000800UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   10UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000400UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   8UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00000100UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   7UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00000080UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   6UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000040UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   5UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000020UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_SHIFT   3UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_MASK    0x00000008UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_FIFO_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_SHIFT   2UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_MASK    0x00000004UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_SGMII_MODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_SHIFT   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_MASK    0x00000002UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_REF_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_SHIFT   0UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_GEM_CLK_CTRL_XEMACPS_RX_SRC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdioClkCtrl
+ */
+#define XIOU_SLCR_SDIO_CLK_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x0000030CUL )
+#define XIOU_SLCR_SDIO_CLK_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_SHIFT   18UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_MASK    0x00040000UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_FBCLK_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_SHIFT   17UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_MASK    0x00020000UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO1_RX_SRC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_SHIFT   2UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_MASK    0x00000004UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_FBCLK_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_SHIFT   0UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_WIDTH   2UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_MASK    0x00000003UL
+#define XIOU_SLCR_SDIO_CLK_CTRL_SDIO0_RX_SRC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrCtrlRegSd
+ */
+#define XIOU_SLCR_CTRL_REG_SD    ( ( XIOU_SLCR_BASEADDR ) + 0x00000310UL )
+#define XIOU_SLCR_CTRL_REG_SD_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_SHIFT   15UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_WIDTH   1UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_MASK    0x00008000UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_SHIFT   0UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_WIDTH   1UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_CTRL_REG_SD_XSDPS_EMMC_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdItapdly
+ */
+#define XIOU_SLCR_SD_ITAPDLY    ( ( XIOU_SLCR_BASEADDR ) + 0x00000314UL )
+#define XIOU_SLCR_SD_ITAPDLY_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_SHIFT   25UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_MASK    0x02000000UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_SHIFT   24UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_MASK    0x01000000UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_SHIFT   16UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_WIDTH   8UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_SHIFT   9UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_MASK    0x00000200UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPCHGWIN_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_SHIFT   8UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_MASK    0x00000100UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_SHIFT   0UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_WIDTH   8UL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_ITAPDLY_XSDPS_ITAPDLYSEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdOtapdlysel
+ */
+#define XIOU_SLCR_SD_OTAPDLYSEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000318UL )
+#define XIOU_SLCR_SD_OTAPDLYSEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_SHIFT   22UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_MASK    0x00400000UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_WIDTH   6UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_MASK    0x003f0000UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_SHIFT   6UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_WIDTH   1UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_MASK    0x00000040UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_OTAPDLYENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_WIDTH   6UL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_MASK    0x0000003fUL
+#define XIOU_SLCR_SD_OTAPDLYSEL_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg1
+ */
+#define XIOU_SLCR_SD_CFG_REG1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000031CUL )
+#define XIOU_SLCR_SD_CFG_REG1_RSTVAL   0x32403240UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_SHIFT   23UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_WIDTH   8UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_MASK    0x7f800000UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_DEFVAL  0x64UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_SHIFT   17UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_WIDTH   6UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_MASK    0x007e0000UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_DEFVAL  0x20UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_SHIFT   16UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_MASK    0x00010000UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_SHIFT   7UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_WIDTH   8UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_MASK    0x00007f80UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_BASECLK_DEFVAL  0x64UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_SHIFT   1UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_WIDTH   6UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_MASK    0x0000007eUL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_TUNIGCOUNT_DEFVAL  0x20UL
+
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_SHIFT   0UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_MASK    0x00000001UL
+#define XIOU_SLCR_SD_CFG_REG1_XSDPS_ASYNCWKPENA_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg2
+ */
+#define XIOU_SLCR_SD_CFG_REG2    ( ( XIOU_SLCR_BASEADDR ) + 0x00000320UL )
+#define XIOU_SLCR_SD_CFG_REG2_RSTVAL   0x0ffc0ffcUL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_SHIFT   28UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_MASK    0x30000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_SHIFT   27UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_MASK    0x08000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_SHIFT   26UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_MASK    0x04000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_SHIFT   25UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_MASK    0x02000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_SHIFT   24UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_MASK    0x01000000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_SHIFT   23UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_MASK    0x00800000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_SHIFT   22UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_MASK    0x00400000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_SHIFT   21UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_MASK    0x00200000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_SHIFT   20UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_MASK    0x00100000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_SHIFT   19UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_MASK    0x00080000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_SHIFT   18UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_MASK    0x00040000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_SHIFT   16UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_MASK    0x00030000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_SHIFT   12UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_MASK    0x00003000UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SLOTTYPE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_SHIFT   11UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_MASK    0x00000800UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ASYCINTR_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_SHIFT   10UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_MASK    0x00000400UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_64BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_SHIFT   9UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_MASK    0x00000200UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_1P8V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_SHIFT   8UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_MASK    0x00000100UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P0V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_SHIFT   7UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_MASK    0x00000080UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_3P3V_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_SHIFT   6UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_MASK    0x00000040UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SUSPRES_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_SHIFT   5UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_MASK    0x00000020UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_SDMA_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_SHIFT   4UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_MASK    0x00000010UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_HIGHSPEED_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_SHIFT   3UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_MASK    0x00000008UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_ADMA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_SHIFT   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_MASK    0x00000004UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_8BIT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_SHIFT   0UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_WIDTH   2UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_MASK    0x00000003UL
+#define XIOU_SLCR_SD_CFG_REG2_XSDPS_MAXBLK_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCfgReg3
+ */
+#define XIOU_SLCR_SD_CFG_REG3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000324UL )
+#define XIOU_SLCR_SD_CFG_REG3_RSTVAL   0x06070607UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_SHIFT   26UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_MASK    0x04000000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_SHIFT   22UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_WIDTH   4UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_MASK    0x03c00000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_DEFVAL  0x8UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_SHIFT   21UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_MASK    0x00200000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_SHIFT   20UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_MASK    0x00100000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_SHIFT   19UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_MASK    0x00080000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_SHIFT   18UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_MASK    0x00040000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_SHIFT   17UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_MASK    0x00020000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_SHIFT   16UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_MASK    0x00010000UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_SHIFT   10UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_MASK    0x00000400UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_TUNINGSDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_SHIFT   6UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_WIDTH   4UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_MASK    0x000003c0UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_RETUNETMR_DEFVAL  0x8UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_SHIFT   5UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_MASK    0x00000020UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_SHIFT   4UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_MASK    0x00000010UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_CDRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_SHIFT   3UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_MASK    0x00000008UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_ADRIVER_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_SHIFT   2UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_MASK    0x00000004UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_DDR50_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_SHIFT   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_MASK    0x00000002UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR104_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_SHIFT   0UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_WIDTH   1UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_MASK    0x00000001UL
+#define XIOU_SLCR_SD_CFG_REG3_XSDPS_SDR50_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrSdInitpreset
+ */
+#define XIOU_SLCR_SD_INITPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000328UL )
+#define XIOU_SLCR_SD_INITPRESET_RSTVAL   0x01000100UL
+
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_DEFVAL  0x100UL
+
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_INITPRESET_XSDPS_DEFVAL  0x100UL
+
+/**
+ * Register: XiouSlcrSdDsppreset
+ */
+#define XIOU_SLCR_SD_DSPPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x0000032CUL )
+#define XIOU_SLCR_SD_DSPPRESET_RSTVAL   0x00040004UL
+
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_DEFVAL  0x4UL
+
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_DSPPRESET_XSDPS_DEFVAL  0x4UL
+
+/**
+ * Register: XiouSlcrSdHspdpreset
+ */
+#define XIOU_SLCR_SD_HSPDPRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000330UL )
+#define XIOU_SLCR_SD_HSPDPRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_HSPDPRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdSdr12preset
+ */
+#define XIOU_SLCR_SD_SDR12PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000334UL )
+#define XIOU_SLCR_SD_SDR12PRESET_RSTVAL   0x00040004UL
+
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_DEFVAL  0x4UL
+
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR12PRESET_XSDPS_DEFVAL  0x4UL
+
+/**
+ * Register: XiouSlcrSdSdr25preset
+ */
+#define XIOU_SLCR_SD_SDR25PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000338UL )
+#define XIOU_SLCR_SD_SDR25PRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR25PRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdSdr50prset
+ */
+#define XIOU_SLCR_SD_SDR50PRSET    ( ( XIOU_SLCR_BASEADDR ) + 0x0000033CUL )
+#define XIOU_SLCR_SD_SDR50PRSET_RSTVAL   0x00010001UL
+
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_DEFVAL  0x1UL
+
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR50PRSET_XSDPS_SDR50PRESET_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrSdSdr104prst
+ */
+#define XIOU_SLCR_SD_SDR104PRST    ( ( XIOU_SLCR_BASEADDR ) + 0x00000340UL )
+#define XIOU_SLCR_SD_SDR104PRST_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_SHIFT   16UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_SHIFT   0UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_WIDTH   13UL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_SDR104PRST_XSDPS_SDR104PRESET_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdDdr50preset
+ */
+#define XIOU_SLCR_SD_DDR50PRESET    ( ( XIOU_SLCR_BASEADDR ) + 0x00000344UL )
+#define XIOU_SLCR_SD_DDR50PRESET_RSTVAL   0x00020002UL
+
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_MASK    0x1fff0000UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_DEFVAL  0x2UL
+
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_WIDTH   13UL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_MASK    0x00001fffUL
+#define XIOU_SLCR_SD_DDR50PRESET_XSDPS_DEFVAL  0x2UL
+
+/**
+ * Register: XiouSlcrSdMaxcur1p8
+ */
+#define XIOU_SLCR_SD_MAXCUR1P8    ( ( XIOU_SLCR_BASEADDR ) + 0x0000034CUL )
+#define XIOU_SLCR_SD_MAXCUR1P8_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_MAXCUR1P8_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdMaxcur3p0
+ */
+#define XIOU_SLCR_SD_MAXCUR3P0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000350UL )
+#define XIOU_SLCR_SD_MAXCUR3P0_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_MAXCUR3P0_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdMaxcur3p3
+ */
+#define XIOU_SLCR_SD_MAXCUR3P3    ( ( XIOU_SLCR_BASEADDR ) + 0x00000354UL )
+#define XIOU_SLCR_SD_MAXCUR3P3_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_MASK    0x00ff0000UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_WIDTH   8UL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_MASK    0x000000ffUL
+#define XIOU_SLCR_SD_MAXCUR3P3_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdDllCtrl
+ */
+#define XIOU_SLCR_SD_DLL_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000358UL )
+#define XIOU_SLCR_SD_DLL_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_SHIFT   18UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_MASK    0x00040000UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_SHIFT   17UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_MASK    0x00020000UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_SHIFT   16UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_MASK    0x00010000UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_SHIFT   2UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_MASK    0x00000004UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_RST_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_SHIFT   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_MASK    0x00000002UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_TESTMODE_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_SHIFT   0UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_WIDTH   1UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_MASK    0x00000001UL
+#define XIOU_SLCR_SD_DLL_CTRL_XSDPS_LOCK_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrSdCdnCtrl
+ */
+#define XIOU_SLCR_SD_CDN_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x0000035CUL )
+#define XIOU_SLCR_SD_CDN_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_SHIFT   16UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_MASK    0x00010000UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_SHIFT   0UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_MASK    0x00000001UL
+#define XIOU_SLCR_SD_CDN_CTRL_XSDPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrGemCtrl
+ */
+#define XIOU_SLCR_GEM_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000360UL )
+#define XIOU_SLCR_GEM_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   6UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x000000c0UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   4UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x00000030UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x0000000cUL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_SHIFT   0UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_WIDTH   2UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_MASK    0x00000003UL
+#define XIOU_SLCR_GEM_CTRL_XEMACPS_SGMII_SD_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrTtcApbClk
+ */
+#define XIOU_SLCR_TTC_APB_CLK    ( ( XIOU_SLCR_BASEADDR ) + 0x00000380UL )
+#define XIOU_SLCR_TTC_APB_CLK_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_SHIFT   6UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_MASK    0x000000c0UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC3_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_SHIFT   4UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_MASK    0x00000030UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC2_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_SHIFT   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_MASK    0x0000000cUL
+#define XIOU_SLCR_TTC_APB_CLK_TTC1_SEL_DEFVAL  0x0UL
+
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_SHIFT   0UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_WIDTH   2UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_MASK    0x00000003UL
+#define XIOU_SLCR_TTC_APB_CLK_TTC0_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrTapdlyBypass
+ */
+#define XIOU_SLCR_TAPDLY_BYPASS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000390UL )
+#define XIOU_SLCR_TAPDLY_BYPASS_RSTVAL   0x00000007UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_SHIFT   2UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_MASK    0x00000004UL
+#define XIOU_SLCR_TAPDLY_BYPASS_LQSPI_RX_DEFVAL  0x1UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_SHIFT   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_MASK    0x00000002UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_OUT_DEFVAL  0x1UL
+
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_SHIFT   0UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_WIDTH   1UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_MASK    0x00000001UL
+#define XIOU_SLCR_TAPDLY_BYPASS_XNANDPS8_DQS_IN_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrCoherentCtrl
+ */
+#define XIOU_SLCR_COHERENT_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000400UL )
+#define XIOU_SLCR_COHERENT_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_SHIFT   28UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_MASK    0xf0000000UL
+#define XIOU_SLCR_COHERENT_CTRL_XQSPIPSAXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_SHIFT   24UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_MASK    0x0f000000UL
+#define XIOU_SLCR_COHERENT_CTRL_XNANDPS8_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_SHIFT   20UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_MASK    0x00f00000UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_SHIFT   16UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_MASK    0x000f0000UL
+#define XIOU_SLCR_COHERENT_CTRL_XSDPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   12UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x0000f000UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   8UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x00000f00UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x000000f0UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_SHIFT   0UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_WIDTH   4UL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_MASK    0x0000000fUL
+#define XIOU_SLCR_COHERENT_CTRL_XEMACPS_AXI_COH_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrVideoPssClkSel
+ */
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000404UL )
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_SHIFT   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_WIDTH   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_MASK    0x00000002UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_ALT_DEFVAL  0x0UL
+
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_SHIFT   0UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_WIDTH   1UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_MASK    0x00000001UL
+#define XIOU_SLCR_VIDEO_PSS_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrInterconnectRoute
+ */
+#define XIOU_SLCR_INTERCONNECT_ROUTE    ( ( XIOU_SLCR_BASEADDR ) + 0x00000408UL )
+#define XIOU_SLCR_INTERCONNECT_ROUTE_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_SHIFT   7UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_MASK    0x00000080UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XNANDPS8_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_SHIFT   6UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_MASK    0x00000040UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_QSPI_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_SHIFT   5UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_MASK    0x00000020UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_SHIFT   4UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_MASK    0x00000010UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XSDPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   3UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000008UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   2UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000004UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000002UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_SHIFT   0UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_WIDTH   1UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_MASK    0x00000001UL
+#define XIOU_SLCR_INTERCONNECT_ROUTE_XEMACPS_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000500UL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000504UL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000508UL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXemacps
+ */
+#define XIOU_SLCR_RAM_XEMACPS    ( ( XIOU_SLCR_BASEADDR ) + 0x0000050CUL )
+#define XIOU_SLCR_RAM_XEMACPS_RSTVAL   0x00005b5bUL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XEMACPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XEMACPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXsdps
+ */
+#define XIOU_SLCR_RAM_XSDPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000510UL )
+#define XIOU_SLCR_RAM_XSDPS_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXsdps
+ */
+#define XIOU_SLCR_RAM_XSDPS    ( ( XIOU_SLCR_BASEADDR ) + 0x00000514UL )
+#define XIOU_SLCR_RAM_XSDPS_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XSDPS_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XSDPS_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XSDPS_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamCan0
+ */
+#define XIOU_SLCR_RAM_CAN0    ( ( XIOU_SLCR_BASEADDR ) + 0x00000518UL )
+#define XIOU_SLCR_RAM_CAN0_RSTVAL   0x005b5b5bUL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA2_SHIFT   22UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_MASK    0x00400000UL
+#define XIOU_SLCR_RAM_CAN0_EMASA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB2_SHIFT   19UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_MASK    0x00380000UL
+#define XIOU_SLCR_RAM_CAN0_EMAB2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA2_SHIFT   16UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_MASK    0x00070000UL
+#define XIOU_SLCR_RAM_CAN0_EMAA2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_CAN0_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_CAN0_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_CAN0_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_CAN0_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_CAN0_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN0_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_CAN0_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamCan1
+ */
+#define XIOU_SLCR_RAM_CAN1    ( ( XIOU_SLCR_BASEADDR ) + 0x0000051CUL )
+#define XIOU_SLCR_RAM_CAN1_RSTVAL   0x005b5b5bUL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA2_SHIFT   22UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_MASK    0x00400000UL
+#define XIOU_SLCR_RAM_CAN1_EMASA2_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB2_SHIFT   19UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_MASK    0x00380000UL
+#define XIOU_SLCR_RAM_CAN1_EMAB2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA2_SHIFT   16UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_MASK    0x00070000UL
+#define XIOU_SLCR_RAM_CAN1_EMAA2_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA1_SHIFT   14UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_MASK    0x00004000UL
+#define XIOU_SLCR_RAM_CAN1_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB1_SHIFT   11UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_MASK    0x00003800UL
+#define XIOU_SLCR_RAM_CAN1_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA1_SHIFT   8UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_MASK    0x00000700UL
+#define XIOU_SLCR_RAM_CAN1_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_CAN1_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_CAN1_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_CAN1_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_CAN1_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamLqspi
+ */
+#define XIOU_SLCR_RAM_LQSPI    ( ( XIOU_SLCR_BASEADDR ) + 0x00000520UL )
+#define XIOU_SLCR_RAM_LQSPI_RSTVAL   0x00002ddbUL
+
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_SHIFT   13UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_WIDTH   1UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_MASK    0x00002000UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA1_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_SHIFT   10UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_MASK    0x00001c00UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_SHIFT   7UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_MASK    0x00000380UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA1_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_LQSPI_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_LQSPI_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_LQSPI_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrRamXnandps8
+ */
+#define XIOU_SLCR_RAM_XNANDPS8    ( ( XIOU_SLCR_BASEADDR ) + 0x00000524UL )
+#define XIOU_SLCR_RAM_XNANDPS8_RSTVAL   0x0000005bUL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_SHIFT   6UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_WIDTH   1UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_MASK    0x00000040UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMASA0_DEFVAL  0x1UL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_SHIFT   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_MASK    0x00000038UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAB0_DEFVAL  0x3UL
+
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_SHIFT   0UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_WIDTH   3UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_MASK    0x00000007UL
+#define XIOU_SLCR_RAM_XNANDPS8_EMAA0_DEFVAL  0x3UL
+
+/**
+ * Register: XiouSlcrCtrl
+ */
+#define XIOU_SLCR_CTRL    ( ( XIOU_SLCR_BASEADDR ) + 0x00000600UL )
+#define XIOU_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XIOU_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrIsr
+ */
+#define XIOU_SLCR_ISR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000700UL )
+#define XIOU_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrImr
+ */
+#define XIOU_SLCR_IMR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000704UL )
+#define XIOU_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XiouSlcrIer
+ */
+#define XIOU_SLCR_IER    ( ( XIOU_SLCR_BASEADDR ) + 0x00000708UL )
+#define XIOU_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrIdr
+ */
+#define XIOU_SLCR_IDR    ( ( XIOU_SLCR_BASEADDR ) + 0x0000070CUL )
+#define XIOU_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XiouSlcrItr
+ */
+#define XIOU_SLCR_ITR    ( ( XIOU_SLCR_BASEADDR ) + 0x00000710UL )
+#define XIOU_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XIOU_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XIOU_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_slcr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_slcr.h
new file mode 100644
index 0000000..d50b578
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_slcr.h
@@ -0,0 +1,5667 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_SLCR_H__
+#define __XLPD_SLCR_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdSlcr Base Address
+ */
+#define XLPD_SLCR_BASEADDR      0xFF410000UL
+
+/**
+ * Register: XlpdSlcrWprot0
+ */
+#define XLPD_SLCR_WPROT0    ( ( XLPD_SLCR_BASEADDR ) + 0x00000000UL )
+#define XLPD_SLCR_WPROT0_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_WPROT0_ACT_SHIFT   0UL
+#define XLPD_SLCR_WPROT0_ACT_WIDTH   1UL
+#define XLPD_SLCR_WPROT0_ACT_MASK    0x00000001UL
+#define XLPD_SLCR_WPROT0_ACT_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrCtrl
+ */
+#define XLPD_SLCR_CTRL    ( ( XLPD_SLCR_BASEADDR ) + 0x00000004UL )
+#define XLPD_SLCR_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_CTRL_SLVERR_EN_SHIFT   0UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_WIDTH   1UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XLPD_SLCR_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsr
+ */
+#define XLPD_SLCR_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000008UL )
+#define XLPD_SLCR_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrImr
+ */
+#define XLPD_SLCR_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000000CUL )
+#define XLPD_SLCR_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIer
+ */
+#define XLPD_SLCR_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00000010UL )
+#define XLPD_SLCR_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIdr
+ */
+#define XLPD_SLCR_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000014UL )
+#define XLPD_SLCR_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrItr
+ */
+#define XLPD_SLCR_ITR    ( ( XLPD_SLCR_BASEADDR ) + 0x00000018UL )
+#define XLPD_SLCR_ITR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk0
+ */
+#define XLPD_SLCR_SAFETY_CHK0    ( ( XLPD_SLCR_BASEADDR ) + 0x00000040UL )
+#define XLPD_SLCR_SAFETY_CHK0_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK0_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK0_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk1
+ */
+#define XLPD_SLCR_SAFETY_CHK1    ( ( XLPD_SLCR_BASEADDR ) + 0x00000044UL )
+#define XLPD_SLCR_SAFETY_CHK1_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK1_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK1_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk2
+ */
+#define XLPD_SLCR_SAFETY_CHK2    ( ( XLPD_SLCR_BASEADDR ) + 0x00000048UL )
+#define XLPD_SLCR_SAFETY_CHK2_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK2_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK2_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSafetyChk3
+ */
+#define XLPD_SLCR_SAFETY_CHK3    ( ( XLPD_SLCR_BASEADDR ) + 0x0000004CUL )
+#define XLPD_SLCR_SAFETY_CHK3_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SAFETY_CHK3_VAL_SHIFT   0UL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_WIDTH   32UL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SAFETY_CHK3_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrXcsupmuWdtClkSel
+ */
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL    ( ( XLPD_SLCR_BASEADDR ) + 0x00000050UL )
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_SHIFT   0UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_WIDTH   1UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_MASK    0x00000001UL
+#define XLPD_SLCR_XCSUPMU_WDT_CLK_SEL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAdmaCfg
+ */
+#define XLPD_SLCR_ADMA_CFG    ( ( XLPD_SLCR_BASEADDR ) + 0x0000200CUL )
+#define XLPD_SLCR_ADMA_CFG_RSTVAL   0x00000028UL
+
+#define XLPD_SLCR_ADMA_CFG_BUSWID_SHIFT   5UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_WIDTH   2UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_MASK    0x00000060UL
+#define XLPD_SLCR_ADMA_CFG_BUSWID_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_SHIFT   0UL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_WIDTH   5UL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_MASK    0x0000001fUL
+#define XLPD_SLCR_ADMA_CFG_NUM_CH_DEFVAL  0x8UL
+
+/**
+ * Register: XlpdSlcrAdmaRam
+ */
+#define XLPD_SLCR_ADMA_RAM    ( ( XLPD_SLCR_BASEADDR ) + 0x00002010UL )
+#define XLPD_SLCR_ADMA_RAM_RSTVAL   0x00003b3bUL
+
+#define XLPD_SLCR_ADMA_RAM1_EMAB_SHIFT   12UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_MASK    0x00007000UL
+#define XLPD_SLCR_ADMA_RAM1_EMAB_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM1_EMASA_SHIFT   11UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_WIDTH   1UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_MASK    0x00000800UL
+#define XLPD_SLCR_ADMA_RAM1_EMASA_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_RAM1_EMAA_SHIFT   8UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_MASK    0x00000700UL
+#define XLPD_SLCR_ADMA_RAM1_EMAA_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMAB_SHIFT   4UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_MASK    0x00000070UL
+#define XLPD_SLCR_ADMA_RAM0_EMAB_DEFVAL  0x3UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMASA_SHIFT   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_WIDTH   1UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_MASK    0x00000008UL
+#define XLPD_SLCR_ADMA_RAM0_EMASA_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ADMA_RAM0_EMAA_SHIFT   0UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_WIDTH   3UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_MASK    0x00000007UL
+#define XLPD_SLCR_ADMA_RAM0_EMAA_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIsr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003000UL )
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_ISR_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiImr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003008UL )
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RSTVAL   0x1dcf000fUL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_DDR_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_OCMS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_MAIN_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB1S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_USB0S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_RPUM0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_OCM_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_FPD_LPDIBS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IMR_AFIFS0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIer
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00003010UL )
+#define XLPD_SLCR_ERR_AIBAXI_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IER_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibaxiIdr
+ */
+#define XLPD_SLCR_ERR_AIBAXI_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003018UL )
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_SHIFT   27UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAXI_IDR_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIsr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003020UL )
+#define XLPD_SLCR_ERR_AIBAPB_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_ISR_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbImr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00003024UL )
+#define XLPD_SLCR_ERR_AIBAPB_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IMR_GPU_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIer
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00003028UL )
+#define XLPD_SLCR_ERR_AIBAPB_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IER_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAibapbIdr
+ */
+#define XLPD_SLCR_ERR_AIBAPB_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000302CUL )
+#define XLPD_SLCR_ERR_AIBAPB_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_SHIFT   0UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_WIDTH   1UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_AIBAPB_IDR_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiReq
+ */
+#define XLPD_SLCR_ISO_AIBAXI_REQ    ( ( XLPD_SLCR_BASEADDR ) + 0x00003030UL )
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_REQ_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiType
+ */
+#define XLPD_SLCR_ISO_AIBAXI_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x00003038UL )
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RSTVAL   0x19cf000fUL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_DDR_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_MAIN_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB1S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_USB0S_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_RPUM0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_OCM_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_FPD_LPDIBS_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_TYPE_AFIFS0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIsoAibaxiAck
+ */
+#define XLPD_SLCR_ISO_AIBAXI_ACK    ( ( XLPD_SLCR_BASEADDR ) + 0x00003040UL )
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_SHIFT   28UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_MASK    0x10000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_SHIFT   27UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_MASK    0x08000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_DDR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_SHIFT   26UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_MASK    0x04000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_OCMS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_SHIFT   24UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_MASK    0x01000000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_MAIN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_SHIFT   23UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_MASK    0x00800000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB1S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_SHIFT   22UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_MASK    0x00400000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_USB0S_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_SHIFT   19UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_MASK    0x00080000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_SHIFT   18UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_MASK    0x00040000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUS0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_SHIFT   17UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_MASK    0x00020000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_SHIFT   16UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_MASK    0x00010000UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_RPUM0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_SHIFT   3UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_MASK    0x00000008UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_OCM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_SHIFT   2UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_MASK    0x00000004UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_FPD_LPDIBS_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_SHIFT   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_MASK    0x00000002UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAXI_ACK_AFIFS0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbReq
+ */
+#define XLPD_SLCR_ISO_AIBAPB_REQ    ( ( XLPD_SLCR_BASEADDR ) + 0x00003048UL )
+#define XLPD_SLCR_ISO_AIBAPB_REQ_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_REQ_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbType
+ */
+#define XLPD_SLCR_ISO_AIBAPB_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x0000304CUL )
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_TYPE_GPU_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrIsoAibapbAck
+ */
+#define XLPD_SLCR_ISO_AIBAPB_ACK    ( ( XLPD_SLCR_BASEADDR ) + 0x00003050UL )
+#define XLPD_SLCR_ISO_AIBAPB_ACK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_SHIFT   0UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_WIDTH   1UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_MASK    0x00000001UL
+#define XLPD_SLCR_ISO_AIBAPB_ACK_GPU_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbIsr
+ */
+#define XLPD_SLCR_ERR_ATB_ISR    ( ( XLPD_SLCR_BASEADDR ) + 0x00006000UL )
+#define XLPD_SLCR_ERR_ATB_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_ISR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_ISR_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbImr
+ */
+#define XLPD_SLCR_ERR_ATB_IMR    ( ( XLPD_SLCR_BASEADDR ) + 0x00006004UL )
+#define XLPD_SLCR_ERR_ATB_IMR_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IMR_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IMR_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrErrAtbIer
+ */
+#define XLPD_SLCR_ERR_ATB_IER    ( ( XLPD_SLCR_BASEADDR ) + 0x00006008UL )
+#define XLPD_SLCR_ERR_ATB_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IER_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IER_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrErrAtbIdr
+ */
+#define XLPD_SLCR_ERR_ATB_IDR    ( ( XLPD_SLCR_BASEADDR ) + 0x0000600CUL )
+#define XLPD_SLCR_ERR_ATB_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ERR_ATB_IDR_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ERR_ATB_IDR_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAtbCmdStoreEn
+ */
+#define XLPD_SLCR_ATB_CMD_STORE_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00006010UL )
+#define XLPD_SLCR_ATB_CMD_STORE_EN_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_CMD_STORE_EN_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrAtbRespEn
+ */
+#define XLPD_SLCR_ATB_RESP_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00006014UL )
+#define XLPD_SLCR_ATB_RESP_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_RESP_EN_AFIFS2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_RESP_EN_LPDM_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAtbRespType
+ */
+#define XLPD_SLCR_ATB_RESP_TYPE    ( ( XLPD_SLCR_BASEADDR ) + 0x00006018UL )
+#define XLPD_SLCR_ATB_RESP_TYPE_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_SHIFT   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_MASK    0x00000002UL
+#define XLPD_SLCR_ATB_RESP_TYPE_AFIFS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_SHIFT   0UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_WIDTH   1UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_MASK    0x00000001UL
+#define XLPD_SLCR_ATB_RESP_TYPE_LPDM_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrAtbPrescale
+ */
+#define XLPD_SLCR_ATB_PRESCALE    ( ( XLPD_SLCR_BASEADDR ) + 0x00006020UL )
+#define XLPD_SLCR_ATB_PRESCALE_RSTVAL   0x0000ffffUL
+
+#define XLPD_SLCR_ATB_PRESCALE_EN_SHIFT   16UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_WIDTH   1UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_MASK    0x00010000UL
+#define XLPD_SLCR_ATB_PRESCALE_EN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_ATB_PRESCALE_VAL_SHIFT   0UL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_WIDTH   16UL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_MASK    0x0000ffffUL
+#define XLPD_SLCR_ATB_PRESCALE_VAL_DEFVAL  0xffffUL
+
+/**
+ * Register: XlpdSlcrMutex0
+ */
+#define XLPD_SLCR_MUTEX0    ( ( XLPD_SLCR_BASEADDR ) + 0x00007000UL )
+#define XLPD_SLCR_MUTEX0_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX0_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX0_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX0_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX0_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex1
+ */
+#define XLPD_SLCR_MUTEX1    ( ( XLPD_SLCR_BASEADDR ) + 0x00007004UL )
+#define XLPD_SLCR_MUTEX1_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX1_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX1_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX1_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX1_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex2
+ */
+#define XLPD_SLCR_MUTEX2    ( ( XLPD_SLCR_BASEADDR ) + 0x00007008UL )
+#define XLPD_SLCR_MUTEX2_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX2_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX2_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX2_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX2_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrMutex3
+ */
+#define XLPD_SLCR_MUTEX3    ( ( XLPD_SLCR_BASEADDR ) + 0x0000700CUL )
+#define XLPD_SLCR_MUTEX3_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_MUTEX3_ID_SHIFT   0UL
+#define XLPD_SLCR_MUTEX3_ID_WIDTH   32UL
+#define XLPD_SLCR_MUTEX3_ID_MASK    0xffffffffUL
+#define XLPD_SLCR_MUTEX3_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqSts
+ */
+#define XLPD_SLCR_GICP0_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008000UL )
+#define XLPD_SLCR_GICP0_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqMsk
+ */
+#define XLPD_SLCR_GICP0_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008004UL )
+#define XLPD_SLCR_GICP0_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqEn
+ */
+#define XLPD_SLCR_GICP0_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008008UL )
+#define XLPD_SLCR_GICP0_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqDis
+ */
+#define XLPD_SLCR_GICP0_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000800CUL )
+#define XLPD_SLCR_GICP0_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp0IrqTrig
+ */
+#define XLPD_SLCR_GICP0_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008010UL )
+#define XLPD_SLCR_GICP0_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP0_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqSts
+ */
+#define XLPD_SLCR_GICP1_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008014UL )
+#define XLPD_SLCR_GICP1_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqMsk
+ */
+#define XLPD_SLCR_GICP1_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008018UL )
+#define XLPD_SLCR_GICP1_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqEn
+ */
+#define XLPD_SLCR_GICP1_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x0000801CUL )
+#define XLPD_SLCR_GICP1_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqDis
+ */
+#define XLPD_SLCR_GICP1_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008020UL )
+#define XLPD_SLCR_GICP1_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp1IrqTrig
+ */
+#define XLPD_SLCR_GICP1_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008024UL )
+#define XLPD_SLCR_GICP1_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP1_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqSts
+ */
+#define XLPD_SLCR_GICP2_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008028UL )
+#define XLPD_SLCR_GICP2_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqMsk
+ */
+#define XLPD_SLCR_GICP2_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x0000802CUL )
+#define XLPD_SLCR_GICP2_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqEn
+ */
+#define XLPD_SLCR_GICP2_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008030UL )
+#define XLPD_SLCR_GICP2_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqDis
+ */
+#define XLPD_SLCR_GICP2_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008034UL )
+#define XLPD_SLCR_GICP2_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp2IrqTrig
+ */
+#define XLPD_SLCR_GICP2_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008038UL )
+#define XLPD_SLCR_GICP2_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP2_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqSts
+ */
+#define XLPD_SLCR_GICP3_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000803CUL )
+#define XLPD_SLCR_GICP3_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqMsk
+ */
+#define XLPD_SLCR_GICP3_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008040UL )
+#define XLPD_SLCR_GICP3_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqEn
+ */
+#define XLPD_SLCR_GICP3_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008044UL )
+#define XLPD_SLCR_GICP3_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqDis
+ */
+#define XLPD_SLCR_GICP3_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008048UL )
+#define XLPD_SLCR_GICP3_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp3IrqTrig
+ */
+#define XLPD_SLCR_GICP3_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x0000804CUL )
+#define XLPD_SLCR_GICP3_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP3_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqSts
+ */
+#define XLPD_SLCR_GICP4_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x00008050UL )
+#define XLPD_SLCR_GICP4_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqMsk
+ */
+#define XLPD_SLCR_GICP4_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x00008054UL )
+#define XLPD_SLCR_GICP4_IRQ_MSK_RSTVAL   0xffffffffUL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC31_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC30_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC29_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC28_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC27_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC26_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC25_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC24_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC23_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC22_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC21_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC20_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC19_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC18_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC17_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC16_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC15_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC14_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC13_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC12_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC11_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC10_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC9_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC8_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqEn
+ */
+#define XLPD_SLCR_GICP4_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x00008058UL )
+#define XLPD_SLCR_GICP4_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqDis
+ */
+#define XLPD_SLCR_GICP4_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x0000805CUL )
+#define XLPD_SLCR_GICP4_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicp4IrqTrig
+ */
+#define XLPD_SLCR_GICP4_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x00008060UL )
+#define XLPD_SLCR_GICP4_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_SHIFT   31UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_MASK    0x80000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC31_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_SHIFT   30UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_MASK    0x40000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC30_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_SHIFT   29UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_MASK    0x20000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC29_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_SHIFT   28UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_MASK    0x10000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC28_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_SHIFT   27UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_MASK    0x08000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC27_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_SHIFT   26UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_MASK    0x04000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC26_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_SHIFT   25UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_MASK    0x02000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC25_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_SHIFT   24UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_MASK    0x01000000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC24_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_SHIFT   23UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_MASK    0x00800000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC23_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_SHIFT   22UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_MASK    0x00400000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC22_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_SHIFT   21UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_MASK    0x00200000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC21_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_SHIFT   20UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_MASK    0x00100000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC20_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_SHIFT   19UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_MASK    0x00080000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC19_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_SHIFT   18UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_MASK    0x00040000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC18_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_SHIFT   17UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_MASK    0x00020000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC17_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_SHIFT   16UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_MASK    0x00010000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC16_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_SHIFT   15UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_MASK    0x00008000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_SHIFT   14UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_MASK    0x00004000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_SHIFT   13UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_MASK    0x00002000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_SHIFT   12UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_MASK    0x00001000UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_SHIFT   11UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_MASK    0x00000800UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC11_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_SHIFT   10UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_MASK    0x00000400UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_SHIFT   9UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_MASK    0x00000200UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_SHIFT   8UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_MASK    0x00000100UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP4_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqSts
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_STS    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A0UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_STS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqMsk
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A4UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_RSTVAL   0x000000ffUL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC7_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC6_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_MSK_SRC0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqEn
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_EN    ( ( XLPD_SLCR_BASEADDR ) + 0x000080A8UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_EN_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqDis
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS    ( ( XLPD_SLCR_BASEADDR ) + 0x000080ACUL )
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_DIS_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrGicpPmuIrqTrig
+ */
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG    ( ( XLPD_SLCR_BASEADDR ) + 0x000080B0UL )
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_SHIFT   7UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_MASK    0x00000080UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_SHIFT   6UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_MASK    0x00000040UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_SHIFT   5UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_MASK    0x00000020UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_SHIFT   4UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_MASK    0x00000010UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_SHIFT   3UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_MASK    0x00000008UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_SHIFT   2UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_MASK    0x00000004UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_SHIFT   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_MASK    0x00000002UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_SHIFT   0UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_WIDTH   1UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_MASK    0x00000001UL
+#define XLPD_SLCR_GICP_PMU_IRQ_TRIG_SRC0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrAfiFs
+ */
+#define XLPD_SLCR_AFI_FS    ( ( XLPD_SLCR_BASEADDR ) + 0x00009000UL )
+#define XLPD_SLCR_AFI_FS_RSTVAL   0x00000200UL
+
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_SHIFT   8UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_WIDTH   2UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_MASK    0x00000300UL
+#define XLPD_SLCR_AFI_FS_DW_SS2_SEL_DEFVAL  0x2UL
+
+/**
+ * Register: XlpdSlcrCci
+ */
+#define XLPD_SLCR_CCI    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A000UL )
+#define XLPD_SLCR_CCI_RSTVAL   0x03801c07UL
+
+#define XLPD_SLCR_CCI_SPR_SHIFT   28UL
+#define XLPD_SLCR_CCI_SPR_WIDTH   4UL
+#define XLPD_SLCR_CCI_SPR_MASK    0xf0000000UL
+#define XLPD_SLCR_CCI_SPR_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS4_SHIFT   27UL
+#define XLPD_SLCR_CCI_QVNVNETS4_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS4_MASK    0x08000000UL
+#define XLPD_SLCR_CCI_QVNVNETS4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS3_SHIFT   26UL
+#define XLPD_SLCR_CCI_QVNVNETS3_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS3_MASK    0x04000000UL
+#define XLPD_SLCR_CCI_QVNVNETS3_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVNVNETS2_SHIFT   25UL
+#define XLPD_SLCR_CCI_QVNVNETS2_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS2_MASK    0x02000000UL
+#define XLPD_SLCR_CCI_QVNVNETS2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QVNVNETS1_SHIFT   24UL
+#define XLPD_SLCR_CCI_QVNVNETS1_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS1_MASK    0x01000000UL
+#define XLPD_SLCR_CCI_QVNVNETS1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QVNVNETS0_SHIFT   23UL
+#define XLPD_SLCR_CCI_QVNVNETS0_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVNVNETS0_MASK    0x00800000UL
+#define XLPD_SLCR_CCI_QVNVNETS0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_QOS_OVRRD_SHIFT   18UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_WIDTH   5UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_MASK    0x007c0000UL
+#define XLPD_SLCR_CCI_QOS_OVRRD_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVN_EN_M2_SHIFT   17UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_MASK    0x00020000UL
+#define XLPD_SLCR_CCI_QVN_EN_M2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_QVN_EN_M1_SHIFT   16UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_WIDTH   1UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_MASK    0x00010000UL
+#define XLPD_SLCR_CCI_QVN_EN_M1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_STRPG_GRAN_SHIFT   13UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_WIDTH   3UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_MASK    0x0000e000UL
+#define XLPD_SLCR_CCI_STRPG_GRAN_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN4_SHIFT   12UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_MASK    0x00001000UL
+#define XLPD_SLCR_CCI_ACCHNLLEN4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN3_SHIFT   11UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_MASK    0x00000800UL
+#define XLPD_SLCR_CCI_ACCHNLLEN3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ACCHNLLEN0_SHIFT   10UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_WIDTH   1UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_MASK    0x00000400UL
+#define XLPD_SLCR_CCI_ACCHNLLEN0_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_ECOREVNUM_SHIFT   6UL
+#define XLPD_SLCR_CCI_ECOREVNUM_WIDTH   4UL
+#define XLPD_SLCR_CCI_ECOREVNUM_MASK    0x000003c0UL
+#define XLPD_SLCR_CCI_ECOREVNUM_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA2_SHIFT   5UL
+#define XLPD_SLCR_CCI_ASA2_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA2_MASK    0x00000020UL
+#define XLPD_SLCR_CCI_ASA2_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA1_SHIFT   4UL
+#define XLPD_SLCR_CCI_ASA1_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA1_MASK    0x00000010UL
+#define XLPD_SLCR_CCI_ASA1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ASA0_SHIFT   3UL
+#define XLPD_SLCR_CCI_ASA0_WIDTH   1UL
+#define XLPD_SLCR_CCI_ASA0_MASK    0x00000008UL
+#define XLPD_SLCR_CCI_ASA0_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_OWO2_SHIFT   2UL
+#define XLPD_SLCR_CCI_OWO2_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO2_MASK    0x00000004UL
+#define XLPD_SLCR_CCI_OWO2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_OWO1_SHIFT   1UL
+#define XLPD_SLCR_CCI_OWO1_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO1_MASK    0x00000002UL
+#define XLPD_SLCR_CCI_OWO1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_CCI_OWO0_SHIFT   0UL
+#define XLPD_SLCR_CCI_OWO0_WIDTH   1UL
+#define XLPD_SLCR_CCI_OWO0_MASK    0x00000001UL
+#define XLPD_SLCR_CCI_OWO0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrCciAddrmap
+ */
+#define XLPD_SLCR_CCI_ADDRMAP    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A004UL )
+#define XLPD_SLCR_CCI_ADDRMAP_RSTVAL   0x00c000ffUL
+
+#define XLPD_SLCR_CCI_ADDRMAP_15_SHIFT   30UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_MASK    0xc0000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_15_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_14_SHIFT   28UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_MASK    0x30000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_14_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_13_SHIFT   26UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_MASK    0x0c000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_13_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_12_SHIFT   24UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_MASK    0x03000000UL
+#define XLPD_SLCR_CCI_ADDRMAP_12_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_11_SHIFT   22UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_MASK    0x00c00000UL
+#define XLPD_SLCR_CCI_ADDRMAP_11_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_10_SHIFT   20UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_MASK    0x00300000UL
+#define XLPD_SLCR_CCI_ADDRMAP_10_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_9_SHIFT   18UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_MASK    0x000c0000UL
+#define XLPD_SLCR_CCI_ADDRMAP_9_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_8_SHIFT   16UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_MASK    0x00030000UL
+#define XLPD_SLCR_CCI_ADDRMAP_8_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_7_SHIFT   14UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_MASK    0x0000c000UL
+#define XLPD_SLCR_CCI_ADDRMAP_7_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_6_SHIFT   12UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_MASK    0x00003000UL
+#define XLPD_SLCR_CCI_ADDRMAP_6_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_5_SHIFT   10UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_MASK    0x00000c00UL
+#define XLPD_SLCR_CCI_ADDRMAP_5_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_4_SHIFT   8UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_MASK    0x00000300UL
+#define XLPD_SLCR_CCI_ADDRMAP_4_DEFVAL  0x0UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_3_SHIFT   6UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_MASK    0x000000c0UL
+#define XLPD_SLCR_CCI_ADDRMAP_3_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_2_SHIFT   4UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_MASK    0x00000030UL
+#define XLPD_SLCR_CCI_ADDRMAP_2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_1_SHIFT   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_1_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_1_MASK    0x0000000cUL
+#define XLPD_SLCR_CCI_ADDRMAP_1_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_ADDRMAP_0_SHIFT   0UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_WIDTH   2UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_MASK    0x00000003UL
+#define XLPD_SLCR_CCI_ADDRMAP_0_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrCciQvnprealloc
+ */
+#define XLPD_SLCR_CCI_QVNPREALLOC    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A008UL )
+#define XLPD_SLCR_CCI_QVNPREALLOC_RSTVAL   0x00330330UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_SHIFT   20UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_MASK    0x00f00000UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_SHIFT   16UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_MASK    0x000f0000UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_WM1_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_SHIFT   8UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_MASK    0x00000f00UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM2_DEFVAL  0x3UL
+
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_SHIFT   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_WIDTH   4UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_MASK    0x000000f0UL
+#define XLPD_SLCR_CCI_QVNPREALLOC_RM1_DEFVAL  0x3UL
+
+/**
+ * Register: XlpdSlcrSmmu
+ */
+#define XLPD_SLCR_SMMU    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A020UL )
+#define XLPD_SLCR_SMMU_RSTVAL   0x0000003fUL
+
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_SHIFT   7UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_WIDTH   1UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_MASK    0x00000080UL
+#define XLPD_SLCR_SMMU_INTG_SEC_OVRRDE_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SMMU_CTTW_SHIFT   6UL
+#define XLPD_SLCR_SMMU_CTTW_WIDTH   1UL
+#define XLPD_SLCR_SMMU_CTTW_MASK    0x00000040UL
+#define XLPD_SLCR_SMMU_CTTW_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_SHIFT   5UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_MASK    0x00000020UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU5_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_SHIFT   4UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_MASK    0x00000010UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU4_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_SHIFT   3UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_MASK    0x00000008UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU3_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_SHIFT   2UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_MASK    0x00000004UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU2_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_SHIFT   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_MASK    0x00000002UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_SHIFT   0UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_WIDTH   1UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_MASK    0x00000001UL
+#define XLPD_SLCR_SMMU_SYSBARDIS_TBU0_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrApu
+ */
+#define XLPD_SLCR_APU    ( ( XLPD_SLCR_BASEADDR ) + 0x0000A040UL )
+#define XLPD_SLCR_APU_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_APU_BRDC_BARRIER_SHIFT   3UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_MASK    0x00000008UL
+#define XLPD_SLCR_APU_BRDC_BARRIER_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_CMNT_SHIFT   2UL
+#define XLPD_SLCR_APU_BRDC_CMNT_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_CMNT_MASK    0x00000004UL
+#define XLPD_SLCR_APU_BRDC_CMNT_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_INNER_SHIFT   1UL
+#define XLPD_SLCR_APU_BRDC_INNER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_INNER_MASK    0x00000002UL
+#define XLPD_SLCR_APU_BRDC_INNER_DEFVAL  0x0UL
+
+#define XLPD_SLCR_APU_BRDC_OUTER_SHIFT   0UL
+#define XLPD_SLCR_APU_BRDC_OUTER_WIDTH   1UL
+#define XLPD_SLCR_APU_BRDC_OUTER_MASK    0x00000001UL
+#define XLPD_SLCR_APU_BRDC_OUTER_DEFVAL  0x1UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_SLCR_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_slcr_secure.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_slcr_secure.h
new file mode 100644
index 0000000..f038c11
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_slcr_secure.h
@@ -0,0 +1,141 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_SLCR_SECURE_H__
+#define __XLPD_SLCR_SECURE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdSlcrSecure Base Address
+ */
+#define XLPD_SLCR_SECURE_BASEADDR      0xFF4B0000UL
+
+/**
+ * Register: XlpdSlcrSecCtrl
+ */
+#define XLPD_SLCR_SEC_CTRL    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000004UL )
+#define XLPD_SLCR_SEC_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_SHIFT   0UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_WIDTH   1UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_CTRL_SLVERR_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecIsr
+ */
+#define XLPD_SLCR_SEC_ISR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000008UL )
+#define XLPD_SLCR_SEC_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_ISR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecImr
+ */
+#define XLPD_SLCR_SEC_IMR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x0000000CUL )
+#define XLPD_SLCR_SEC_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IMR_ADDR_DECD_ERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdSlcrSecIer
+ */
+#define XLPD_SLCR_SEC_IER    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000010UL )
+#define XLPD_SLCR_SEC_IER_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IER_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecIdr
+ */
+#define XLPD_SLCR_SEC_IDR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000014UL )
+#define XLPD_SLCR_SEC_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_IDR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecItr
+ */
+#define XLPD_SLCR_SEC_ITR    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000018UL )
+#define XLPD_SLCR_SEC_ITR_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_SHIFT   0UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_WIDTH   1UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_ITR_ADDR_DECD_ERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecRpu
+ */
+#define XLPD_SLCR_SEC_RPU    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000020UL )
+#define XLPD_SLCR_SEC_RPU_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_SHIFT   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_WIDTH   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_MASK    0x00000002UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_1_DEFVAL  0x0UL
+
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_SHIFT   0UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_WIDTH   1UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_RPU_TZ_R5_0_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecAdma
+ */
+#define XLPD_SLCR_SEC_ADMA    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000024UL )
+#define XLPD_SLCR_SEC_ADMA_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_ADMA_TZ_SHIFT   0UL
+#define XLPD_SLCR_SEC_ADMA_TZ_WIDTH   8UL
+#define XLPD_SLCR_SEC_ADMA_TZ_MASK    0x000000ffUL
+#define XLPD_SLCR_SEC_ADMA_TZ_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecSafetyChk
+ */
+#define XLPD_SLCR_SEC_SAFETY_CHK    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000030UL )
+#define XLPD_SLCR_SEC_SAFETY_CHK_RSTVAL   0x00000000UL
+
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_SHIFT   0UL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_WIDTH   32UL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_MASK    0xffffffffUL
+#define XLPD_SLCR_SEC_SAFETY_CHK_VAL_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdSlcrSecUsb
+ */
+#define XLPD_SLCR_SEC_USB    ( ( XLPD_SLCR_SECURE_BASEADDR ) + 0x00000034UL )
+#define XLPD_SLCR_SEC_USB_RSTVAL   0x00000003UL
+
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_SHIFT   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_WIDTH   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_MASK    0x00000002UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_1_DEFVAL  0x1UL
+
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_SHIFT   0UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_WIDTH   1UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_MASK    0x00000001UL
+#define XLPD_SLCR_SEC_USB_TZ_USB3_0_DEFVAL  0x1UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_SLCR_SECURE_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_xppu.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_xppu.h
new file mode 100644
index 0000000..06aa8b2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_xppu.h
@@ -0,0 +1,858 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_XPPU_H__
+#define __XLPD_XPPU_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdXppu Base Address
+ */
+#define XLPD_XPPU_BASEADDR      0xFF980000UL
+
+/**
+ * Register: XlpdXppuCtrl
+ */
+#define XLPD_XPPU_CTRL    ( ( XLPD_XPPU_BASEADDR ) + 0x00000000UL )
+#define XLPD_XPPU_CTRL_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_SHIFT   2UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_MASK    0x00000004UL
+#define XLPD_XPPU_CTRL_APER_PARITY_EN_DEFVAL  0x0UL
+
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_SHIFT   1UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_MASK    0x00000002UL
+#define XLPD_XPPU_CTRL_MID_PARITY_EN_DEFVAL  0x0UL
+
+#define XLPD_XPPU_CTRL_EN_SHIFT   0UL
+#define XLPD_XPPU_CTRL_EN_WIDTH   1UL
+#define XLPD_XPPU_CTRL_EN_MASK    0x00000001UL
+#define XLPD_XPPU_CTRL_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuErrSts1
+ */
+#define XLPD_XPPU_ERR_STS1    ( ( XLPD_XPPU_BASEADDR ) + 0x00000004UL )
+#define XLPD_XPPU_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuErrSts2
+ */
+#define XLPD_XPPU_ERR_STS2    ( ( XLPD_XPPU_BASEADDR ) + 0x00000008UL )
+#define XLPD_XPPU_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XLPD_XPPU_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuPoison
+ */
+#define XLPD_XPPU_POISON    ( ( XLPD_XPPU_BASEADDR ) + 0x0000000CUL )
+#define XLPD_XPPU_POISON_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_POISON_BASE_SHIFT   0UL
+#define XLPD_XPPU_POISON_BASE_WIDTH   20UL
+#define XLPD_XPPU_POISON_BASE_MASK    0x000fffffUL
+#define XLPD_XPPU_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuIsr
+ */
+#define XLPD_XPPU_ISR    ( ( XLPD_XPPU_BASEADDR ) + 0x00000010UL )
+#define XLPD_XPPU_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_ISR_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_ISR_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_ISR_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_ISR_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_ISR_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_ISR_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_ISR_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_ISR_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_ISR_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_ISR_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_ISR_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_ISR_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_ISR_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_ISR_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_ISR_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_ISR_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_ISR_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_ISR_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuImr
+ */
+#define XLPD_XPPU_IMR    ( ( XLPD_XPPU_BASEADDR ) + 0x00000014UL )
+#define XLPD_XPPU_IMR_RSTVAL   0x000000efUL
+
+#define XLPD_XPPU_IMR_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IMR_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IMR_APER_PARITY_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IMR_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IMR_APER_TZ_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IMR_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IMR_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IMR_APER_PERM_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IMR_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IMR_MID_PARITY_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IMR_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IMR_MID_RO_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IMR_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IMR_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IMR_MID_MISS_DEFVAL  0x1UL
+
+#define XLPD_XPPU_IMR_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IMR_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IMR_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuIen
+ */
+#define XLPD_XPPU_IEN    ( ( XLPD_XPPU_BASEADDR ) + 0x00000018UL )
+#define XLPD_XPPU_IEN_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_IEN_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IEN_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IEN_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IEN_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IEN_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IEN_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IEN_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IEN_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IEN_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IEN_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IEN_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IEN_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IEN_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IEN_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IEN_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IEN_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IEN_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IEN_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuIds
+ */
+#define XLPD_XPPU_IDS    ( ( XLPD_XPPU_BASEADDR ) + 0x0000001CUL )
+#define XLPD_XPPU_IDS_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_IDS_APER_PARITY_SHIFT   7UL
+#define XLPD_XPPU_IDS_APER_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_PARITY_MASK    0x00000080UL
+#define XLPD_XPPU_IDS_APER_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_APER_TZ_SHIFT   6UL
+#define XLPD_XPPU_IDS_APER_TZ_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_TZ_MASK    0x00000040UL
+#define XLPD_XPPU_IDS_APER_TZ_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_APER_PERM_SHIFT   5UL
+#define XLPD_XPPU_IDS_APER_PERM_WIDTH   1UL
+#define XLPD_XPPU_IDS_APER_PERM_MASK    0x00000020UL
+#define XLPD_XPPU_IDS_APER_PERM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_PARITY_SHIFT   3UL
+#define XLPD_XPPU_IDS_MID_PARITY_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_PARITY_MASK    0x00000008UL
+#define XLPD_XPPU_IDS_MID_PARITY_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_RO_SHIFT   2UL
+#define XLPD_XPPU_IDS_MID_RO_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_RO_MASK    0x00000004UL
+#define XLPD_XPPU_IDS_MID_RO_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_MID_MISS_SHIFT   1UL
+#define XLPD_XPPU_IDS_MID_MISS_WIDTH   1UL
+#define XLPD_XPPU_IDS_MID_MISS_MASK    0x00000002UL
+#define XLPD_XPPU_IDS_MID_MISS_DEFVAL  0x0UL
+
+#define XLPD_XPPU_IDS_INV_APB_SHIFT   0UL
+#define XLPD_XPPU_IDS_INV_APB_WIDTH   1UL
+#define XLPD_XPPU_IDS_INV_APB_MASK    0x00000001UL
+#define XLPD_XPPU_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMMstrIds
+ */
+#define XLPD_XPPU_M_MSTR_IDS    ( ( XLPD_XPPU_BASEADDR ) + 0x0000003CUL )
+#define XLPD_XPPU_M_MSTR_IDS_RSTVAL   0x00000014UL
+
+#define XLPD_XPPU_M_MSTR_IDS_NO_SHIFT   0UL
+#define XLPD_XPPU_M_MSTR_IDS_NO_WIDTH   32UL
+#define XLPD_XPPU_M_MSTR_IDS_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_MSTR_IDS_NO_DEFVAL  0x14UL
+
+/**
+ * Register: XlpdXppuMAperture32b
+ */
+#define XLPD_XPPU_M_APERTURE_32B    ( ( XLPD_XPPU_BASEADDR ) + 0x00000040UL )
+#define XLPD_XPPU_M_APERTURE_32B_RSTVAL   0x00000080UL
+
+#define XLPD_XPPU_M_APERTURE_32B_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_32B_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_32B_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_32B_NO_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMAperture64kb
+ */
+#define XLPD_XPPU_M_APERTURE_64KB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000044UL )
+#define XLPD_XPPU_M_APERTURE_64KB_RSTVAL   0x00000100UL
+
+#define XLPD_XPPU_M_APERTURE_64KB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_64KB_NO_DEFVAL  0x100UL
+
+/**
+ * Register: XlpdXppuMAperture1mb
+ */
+#define XLPD_XPPU_M_APERTURE_1MB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000048UL )
+#define XLPD_XPPU_M_APERTURE_1MB_RSTVAL   0x00000010UL
+
+#define XLPD_XPPU_M_APERTURE_1MB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_1MB_NO_DEFVAL  0x10UL
+
+/**
+ * Register: XlpdXppuMAperture512mb
+ */
+#define XLPD_XPPU_M_APERTURE_512MB    ( ( XLPD_XPPU_BASEADDR ) + 0x0000004CUL )
+#define XLPD_XPPU_M_APERTURE_512MB_RSTVAL   0x00000001UL
+
+#define XLPD_XPPU_M_APERTURE_512MB_NO_SHIFT   0UL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_WIDTH   32UL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_MASK    0xffffffffUL
+#define XLPD_XPPU_M_APERTURE_512MB_NO_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuBase32b
+ */
+#define XLPD_XPPU_BASE_32B    ( ( XLPD_XPPU_BASEADDR ) + 0x00000050UL )
+#define XLPD_XPPU_BASE_32B_RSTVAL   0xff990000UL
+
+#define XLPD_XPPU_BASE_32B_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_32B_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_32B_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_32B_ADDR_DEFVAL  0xff990000UL
+
+/**
+ * Register: XlpdXppuBase64kb
+ */
+#define XLPD_XPPU_BASE_64KB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000054UL )
+#define XLPD_XPPU_BASE_64KB_RSTVAL   0xff000000UL
+
+#define XLPD_XPPU_BASE_64KB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_64KB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_64KB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_64KB_ADDR_DEFVAL  0xff000000UL
+
+/**
+ * Register: XlpdXppuBase1mb
+ */
+#define XLPD_XPPU_BASE_1MB    ( ( XLPD_XPPU_BASEADDR ) + 0x00000058UL )
+#define XLPD_XPPU_BASE_1MB_RSTVAL   0xfe000000UL
+
+#define XLPD_XPPU_BASE_1MB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_1MB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_1MB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_1MB_ADDR_DEFVAL  0xfe000000UL
+
+/**
+ * Register: XlpdXppuBase512mb
+ */
+#define XLPD_XPPU_BASE_512MB    ( ( XLPD_XPPU_BASEADDR ) + 0x0000005CUL )
+#define XLPD_XPPU_BASE_512MB_RSTVAL   0xc0000000UL
+
+#define XLPD_XPPU_BASE_512MB_ADDR_SHIFT   0UL
+#define XLPD_XPPU_BASE_512MB_ADDR_WIDTH   32UL
+#define XLPD_XPPU_BASE_512MB_ADDR_MASK    0xffffffffUL
+#define XLPD_XPPU_BASE_512MB_ADDR_DEFVAL  0xc0000000UL
+
+/**
+ * Register: XlpdXppuMstrId00
+ */
+#define XLPD_XPPU_MSTR_ID00    ( ( XLPD_XPPU_BASEADDR ) + 0x00000100UL )
+#define XLPD_XPPU_MSTR_ID00_RSTVAL   0x83ff0040UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID00_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID00_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID00_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID00_MIDM_DEFVAL  0x3ffUL
+
+#define XLPD_XPPU_MSTR_ID00_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID00_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID00_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID00_MID_DEFVAL  0x40UL
+
+/**
+ * Register: XlpdXppuMstrId01
+ */
+#define XLPD_XPPU_MSTR_ID01    ( ( XLPD_XPPU_BASEADDR ) + 0x00000104UL )
+#define XLPD_XPPU_MSTR_ID01_RSTVAL   0x03f00000UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID01_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID01_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID01_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID01_MIDM_DEFVAL  0x3f0UL
+
+#define XLPD_XPPU_MSTR_ID01_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID01_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID01_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID01_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId02
+ */
+#define XLPD_XPPU_MSTR_ID02    ( ( XLPD_XPPU_BASEADDR ) + 0x00000108UL )
+#define XLPD_XPPU_MSTR_ID02_RSTVAL   0x83f00010UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID02_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID02_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID02_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID02_MIDM_DEFVAL  0x3f0UL
+
+#define XLPD_XPPU_MSTR_ID02_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID02_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID02_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID02_MID_DEFVAL  0x10UL
+
+/**
+ * Register: XlpdXppuMstrId03
+ */
+#define XLPD_XPPU_MSTR_ID03    ( ( XLPD_XPPU_BASEADDR ) + 0x0000010CUL )
+#define XLPD_XPPU_MSTR_ID03_RSTVAL   0x83c00080UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID03_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID03_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID03_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID03_MIDM_DEFVAL  0x3c0UL
+
+#define XLPD_XPPU_MSTR_ID03_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID03_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID03_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID03_MID_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMstrId04
+ */
+#define XLPD_XPPU_MSTR_ID04    ( ( XLPD_XPPU_BASEADDR ) + 0x00000110UL )
+#define XLPD_XPPU_MSTR_ID04_RSTVAL   0x83c30080UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID04_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID04_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID04_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID04_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID04_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID04_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID04_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID04_MID_DEFVAL  0x80UL
+
+/**
+ * Register: XlpdXppuMstrId05
+ */
+#define XLPD_XPPU_MSTR_ID05    ( ( XLPD_XPPU_BASEADDR ) + 0x00000114UL )
+#define XLPD_XPPU_MSTR_ID05_RSTVAL   0x03c30081UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID05_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID05_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID05_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID05_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID05_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID05_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID05_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID05_MID_DEFVAL  0x81UL
+
+/**
+ * Register: XlpdXppuMstrId06
+ */
+#define XLPD_XPPU_MSTR_ID06    ( ( XLPD_XPPU_BASEADDR ) + 0x00000118UL )
+#define XLPD_XPPU_MSTR_ID06_RSTVAL   0x03c30082UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID06_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID06_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID06_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID06_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID06_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID06_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID06_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID06_MID_DEFVAL  0x82UL
+
+/**
+ * Register: XlpdXppuMstrId07
+ */
+#define XLPD_XPPU_MSTR_ID07    ( ( XLPD_XPPU_BASEADDR ) + 0x0000011CUL )
+#define XLPD_XPPU_MSTR_ID07_RSTVAL   0x83c30083UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID07_MIDP_DEFVAL  0x1UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID07_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID07_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID07_MIDM_DEFVAL  0x3c3UL
+
+#define XLPD_XPPU_MSTR_ID07_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID07_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID07_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID07_MID_DEFVAL  0x83UL
+
+/**
+ * Register: XlpdXppuMstrId08
+ */
+#define XLPD_XPPU_MSTR_ID08    ( ( XLPD_XPPU_BASEADDR ) + 0x00000120UL )
+#define XLPD_XPPU_MSTR_ID08_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID08_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID08_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID08_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID08_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID08_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID08_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID08_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId09
+ */
+#define XLPD_XPPU_MSTR_ID09    ( ( XLPD_XPPU_BASEADDR ) + 0x00000124UL )
+#define XLPD_XPPU_MSTR_ID09_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID09_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID09_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID09_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID09_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID09_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID09_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID09_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId10
+ */
+#define XLPD_XPPU_MSTR_ID10    ( ( XLPD_XPPU_BASEADDR ) + 0x00000128UL )
+#define XLPD_XPPU_MSTR_ID10_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID10_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID10_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID10_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID10_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID10_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID10_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID10_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId11
+ */
+#define XLPD_XPPU_MSTR_ID11    ( ( XLPD_XPPU_BASEADDR ) + 0x0000012CUL )
+#define XLPD_XPPU_MSTR_ID11_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID11_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID11_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID11_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID11_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID11_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID11_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID11_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId12
+ */
+#define XLPD_XPPU_MSTR_ID12    ( ( XLPD_XPPU_BASEADDR ) + 0x00000130UL )
+#define XLPD_XPPU_MSTR_ID12_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID12_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID12_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID12_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID12_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID12_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID12_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID12_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId13
+ */
+#define XLPD_XPPU_MSTR_ID13    ( ( XLPD_XPPU_BASEADDR ) + 0x00000134UL )
+#define XLPD_XPPU_MSTR_ID13_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID13_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID13_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID13_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID13_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID13_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID13_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID13_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId14
+ */
+#define XLPD_XPPU_MSTR_ID14    ( ( XLPD_XPPU_BASEADDR ) + 0x00000138UL )
+#define XLPD_XPPU_MSTR_ID14_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID14_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID14_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID14_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID14_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID14_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID14_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID14_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId15
+ */
+#define XLPD_XPPU_MSTR_ID15    ( ( XLPD_XPPU_BASEADDR ) + 0x0000013CUL )
+#define XLPD_XPPU_MSTR_ID15_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID15_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID15_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID15_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID15_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID15_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID15_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID15_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId16
+ */
+#define XLPD_XPPU_MSTR_ID16    ( ( XLPD_XPPU_BASEADDR ) + 0x00000140UL )
+#define XLPD_XPPU_MSTR_ID16_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID16_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID16_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID16_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID16_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID16_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID16_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID16_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId17
+ */
+#define XLPD_XPPU_MSTR_ID17    ( ( XLPD_XPPU_BASEADDR ) + 0x00000144UL )
+#define XLPD_XPPU_MSTR_ID17_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID17_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID17_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID17_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID17_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID17_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID17_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID17_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId18
+ */
+#define XLPD_XPPU_MSTR_ID18    ( ( XLPD_XPPU_BASEADDR ) + 0x00000148UL )
+#define XLPD_XPPU_MSTR_ID18_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID18_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID18_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID18_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID18_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID18_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID18_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID18_MID_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuMstrId19
+ */
+#define XLPD_XPPU_MSTR_ID19    ( ( XLPD_XPPU_BASEADDR ) + 0x0000014CUL )
+#define XLPD_XPPU_MSTR_ID19_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDP_SHIFT   31UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_MASK    0x80000000UL
+#define XLPD_XPPU_MSTR_ID19_MIDP_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDR_SHIFT   30UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_WIDTH   1UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_MASK    0x40000000UL
+#define XLPD_XPPU_MSTR_ID19_MIDR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MIDM_SHIFT   16UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_MASK    0x03ff0000UL
+#define XLPD_XPPU_MSTR_ID19_MIDM_DEFVAL  0x0UL
+
+#define XLPD_XPPU_MSTR_ID19_MID_SHIFT   0UL
+#define XLPD_XPPU_MSTR_ID19_MID_WIDTH   10UL
+#define XLPD_XPPU_MSTR_ID19_MID_MASK    0x000003ffUL
+#define XLPD_XPPU_MSTR_ID19_MID_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_XPPU_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_xppu_sink.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_xppu_sink.h
new file mode 100644
index 0000000..6f084fb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xlpd_xppu_sink.h
@@ -0,0 +1,81 @@
+/* ### HEADER ### */
+
+#ifndef __XLPD_XPPU_SINK_H__
+#define __XLPD_XPPU_SINK_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XlpdXppuSink Base Address
+ */
+#define XLPD_XPPU_SINK_BASEADDR      0xFF9C0000UL
+
+/**
+ * Register: XlpdXppuSinkErrSts
+ */
+#define XLPD_XPPU_SINK_ERR_STS    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF00UL )
+#define XLPD_XPPU_SINK_ERR_STS_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_SHIFT   31UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_WIDTH   1UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_MASK    0x80000000UL
+#define XLPD_XPPU_SINK_ERR_STS_RDWR_DEFVAL  0x0UL
+
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_SHIFT   0UL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_WIDTH   12UL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_MASK    0x00000fffUL
+#define XLPD_XPPU_SINK_ERR_STS_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkIsr
+ */
+#define XLPD_XPPU_SINK_ISR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF10UL )
+#define XLPD_XPPU_SINK_ISR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_ISRADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkImr
+ */
+#define XLPD_XPPU_SINK_IMR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF14UL )
+#define XLPD_XPPU_SINK_IMR_RSTVAL   0x00000001UL
+
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IMRADDRDECDERR_DEFVAL  0x1UL
+
+/**
+ * Register: XlpdXppuSinkIer
+ */
+#define XLPD_XPPU_SINK_IER    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF18UL )
+#define XLPD_XPPU_SINK_IER_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_IERADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IERADDRDECDERR_DEFVAL  0x0UL
+
+/**
+ * Register: XlpdXppuSinkIdr
+ */
+#define XLPD_XPPU_SINK_IDR    ( ( XLPD_XPPU_SINK_BASEADDR ) + 0x0000FF1CUL )
+#define XLPD_XPPU_SINK_IDR_RSTVAL   0x00000000UL
+
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_SHIFT   0UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_WIDTH   1UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_MASK    0x00000001UL
+#define XLPD_XPPU_SINK_IDRADDRDECDERR_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XLPD_XPPU_SINK_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xocm_xmpu_cfg.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xocm_xmpu_cfg.h
new file mode 100644
index 0000000..67780dc
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xocm_xmpu_cfg.h
@@ -0,0 +1,1304 @@
+/* ### HEADER ### */
+
+#ifndef __XOCM_XMPU_CFG_H__
+#define __XOCM_XMPU_CFG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * XocmXmpuCfg Base Address
+ */
+#define XOCM_XMPU_CFG_BASEADDR      0xFFA70000UL
+
+/**
+ * Register: XocmXmpuCfgCtrl
+ */
+#define XOCM_XMPU_CFG_CTRL    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000000UL )
+#define XOCM_XMPU_CFG_CTRL_RSTVAL   0x00000003UL
+
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_SHIFT   3UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_CTRL_ALIGNCFG_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_SHIFT   2UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_CTRL_POISONCFG_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_CTRL_DEFWRALWD_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_SHIFT   0UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_CTRL_DEFRDALWD_DEFVAL  0x1UL
+
+/**
+ * Register: XocmXmpuCfgErrSts1
+ */
+#define XOCM_XMPU_CFG_ERR_STS1    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000004UL )
+#define XOCM_XMPU_CFG_ERR_STS1_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_WIDTH   32UL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_MASK    0xffffffffUL
+#define XOCM_XMPU_CFG_ERR_STS1_AXI_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgErrSts2
+ */
+#define XOCM_XMPU_CFG_ERR_STS2    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000008UL )
+#define XOCM_XMPU_CFG_ERR_STS2_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_ERR_STS2_AXI_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgPoison
+ */
+#define XOCM_XMPU_CFG_POISON    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000000CUL )
+#define XOCM_XMPU_CFG_POISON_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_POISON_ATTRIB_SHIFT   20UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_WIDTH   12UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_MASK    0xfff00000UL
+#define XOCM_XMPU_CFG_POISON_ATTRIB_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_POISON_BASE_SHIFT   0UL
+#define XOCM_XMPU_CFG_POISON_BASE_WIDTH   20UL
+#define XOCM_XMPU_CFG_POISON_BASE_MASK    0x000fffffUL
+#define XOCM_XMPU_CFG_POISON_BASE_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgIsr
+ */
+#define XOCM_XMPU_CFG_ISR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000010UL )
+#define XOCM_XMPU_CFG_ISR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_ISR_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_ISR_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_ISR_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_ISR_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_ISR_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgImr
+ */
+#define XOCM_XMPU_CFG_IMR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000014UL )
+#define XOCM_XMPU_CFG_IMR_RSTVAL   0x0000000fUL
+
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IMR_SECURTYVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IMR_WRPERMVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IMR_RDPERMVIO_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_IMR_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IMR_INV_APB_DEFVAL  0x1UL
+
+/**
+ * Register: XocmXmpuCfgIen
+ */
+#define XOCM_XMPU_CFG_IEN    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000018UL )
+#define XOCM_XMPU_CFG_IEN_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IEN_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IEN_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IEN_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IEN_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IEN_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgIds
+ */
+#define XOCM_XMPU_CFG_IDS    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000001CUL )
+#define XOCM_XMPU_CFG_IDS_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_SHIFT   3UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_IDS_SECURTYVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_SHIFT   2UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_IDS_WRPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_SHIFT   1UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_IDS_RDPERMVIO_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_IDS_INV_APB_SHIFT   0UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_WIDTH   1UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_IDS_INV_APB_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgLock
+ */
+#define XOCM_XMPU_CFG_LOCK    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000020UL )
+#define XOCM_XMPU_CFG_LOCK_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_SHIFT   0UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_WIDTH   1UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_LOCK_REGWRDIS_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00Strt
+ */
+#define XOCM_XMPU_CFG_R00_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000100UL )
+#define XOCM_XMPU_CFG_R00_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R00_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00End
+ */
+#define XOCM_XMPU_CFG_R00_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000104UL )
+#define XOCM_XMPU_CFG_R00_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R00_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R00_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00Mstr
+ */
+#define XOCM_XMPU_CFG_R00_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000108UL )
+#define XOCM_XMPU_CFG_R00_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R00_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R00_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR00
+ */
+#define XOCM_XMPU_CFG_R00    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000010CUL )
+#define XOCM_XMPU_CFG_R00_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R00_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R00_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R00_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R00_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R00_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R00_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R00_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R00_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R00_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R00_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R00_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R00_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01Strt
+ */
+#define XOCM_XMPU_CFG_R01_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000110UL )
+#define XOCM_XMPU_CFG_R01_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R01_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01End
+ */
+#define XOCM_XMPU_CFG_R01_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000114UL )
+#define XOCM_XMPU_CFG_R01_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R01_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R01_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01Mstr
+ */
+#define XOCM_XMPU_CFG_R01_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000118UL )
+#define XOCM_XMPU_CFG_R01_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R01_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R01_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR01
+ */
+#define XOCM_XMPU_CFG_R01    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000011CUL )
+#define XOCM_XMPU_CFG_R01_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R01_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R01_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R01_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R01_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R01_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R01_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R01_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R01_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R01_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R01_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R01_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R01_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02Strt
+ */
+#define XOCM_XMPU_CFG_R02_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000120UL )
+#define XOCM_XMPU_CFG_R02_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R02_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02End
+ */
+#define XOCM_XMPU_CFG_R02_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000124UL )
+#define XOCM_XMPU_CFG_R02_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R02_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R02_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02Mstr
+ */
+#define XOCM_XMPU_CFG_R02_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000128UL )
+#define XOCM_XMPU_CFG_R02_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R02_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R02_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR02
+ */
+#define XOCM_XMPU_CFG_R02    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000012CUL )
+#define XOCM_XMPU_CFG_R02_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R02_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R02_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R02_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R02_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R02_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R02_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R02_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R02_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R02_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R02_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R02_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R02_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03Strt
+ */
+#define XOCM_XMPU_CFG_R03_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000130UL )
+#define XOCM_XMPU_CFG_R03_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R03_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03End
+ */
+#define XOCM_XMPU_CFG_R03_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000134UL )
+#define XOCM_XMPU_CFG_R03_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R03_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R03_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03Mstr
+ */
+#define XOCM_XMPU_CFG_R03_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000138UL )
+#define XOCM_XMPU_CFG_R03_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R03_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R03_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR03
+ */
+#define XOCM_XMPU_CFG_R03    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000013CUL )
+#define XOCM_XMPU_CFG_R03_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R03_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R03_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R03_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R03_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R03_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R03_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R03_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R03_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R03_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R03_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R03_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R03_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04Strt
+ */
+#define XOCM_XMPU_CFG_R04_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000140UL )
+#define XOCM_XMPU_CFG_R04_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R04_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04End
+ */
+#define XOCM_XMPU_CFG_R04_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000144UL )
+#define XOCM_XMPU_CFG_R04_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R04_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R04_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04Mstr
+ */
+#define XOCM_XMPU_CFG_R04_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000148UL )
+#define XOCM_XMPU_CFG_R04_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R04_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R04_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR04
+ */
+#define XOCM_XMPU_CFG_R04    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000014CUL )
+#define XOCM_XMPU_CFG_R04_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R04_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R04_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R04_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R04_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R04_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R04_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R04_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R04_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R04_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R04_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R04_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R04_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05Strt
+ */
+#define XOCM_XMPU_CFG_R05_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000150UL )
+#define XOCM_XMPU_CFG_R05_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R05_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05End
+ */
+#define XOCM_XMPU_CFG_R05_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000154UL )
+#define XOCM_XMPU_CFG_R05_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R05_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R05_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05Mstr
+ */
+#define XOCM_XMPU_CFG_R05_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000158UL )
+#define XOCM_XMPU_CFG_R05_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R05_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R05_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR05
+ */
+#define XOCM_XMPU_CFG_R05    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000015CUL )
+#define XOCM_XMPU_CFG_R05_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R05_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R05_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R05_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R05_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R05_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R05_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R05_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R05_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R05_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R05_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R05_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R05_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06Strt
+ */
+#define XOCM_XMPU_CFG_R06_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000160UL )
+#define XOCM_XMPU_CFG_R06_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R06_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06End
+ */
+#define XOCM_XMPU_CFG_R06_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000164UL )
+#define XOCM_XMPU_CFG_R06_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R06_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R06_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06Mstr
+ */
+#define XOCM_XMPU_CFG_R06_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000168UL )
+#define XOCM_XMPU_CFG_R06_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R06_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R06_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR06
+ */
+#define XOCM_XMPU_CFG_R06    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000016CUL )
+#define XOCM_XMPU_CFG_R06_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R06_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R06_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R06_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R06_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R06_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R06_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R06_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R06_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R06_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R06_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R06_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R06_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07Strt
+ */
+#define XOCM_XMPU_CFG_R07_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000170UL )
+#define XOCM_XMPU_CFG_R07_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R07_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07End
+ */
+#define XOCM_XMPU_CFG_R07_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000174UL )
+#define XOCM_XMPU_CFG_R07_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R07_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R07_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07Mstr
+ */
+#define XOCM_XMPU_CFG_R07_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000178UL )
+#define XOCM_XMPU_CFG_R07_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R07_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R07_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR07
+ */
+#define XOCM_XMPU_CFG_R07    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000017CUL )
+#define XOCM_XMPU_CFG_R07_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R07_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R07_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R07_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R07_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R07_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R07_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R07_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R07_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R07_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R07_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R07_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R07_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08Strt
+ */
+#define XOCM_XMPU_CFG_R08_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000180UL )
+#define XOCM_XMPU_CFG_R08_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R08_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08End
+ */
+#define XOCM_XMPU_CFG_R08_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000184UL )
+#define XOCM_XMPU_CFG_R08_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R08_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R08_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08Mstr
+ */
+#define XOCM_XMPU_CFG_R08_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000188UL )
+#define XOCM_XMPU_CFG_R08_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R08_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R08_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR08
+ */
+#define XOCM_XMPU_CFG_R08    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000018CUL )
+#define XOCM_XMPU_CFG_R08_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R08_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R08_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R08_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R08_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R08_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R08_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R08_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R08_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R08_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R08_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R08_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R08_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09Strt
+ */
+#define XOCM_XMPU_CFG_R09_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000190UL )
+#define XOCM_XMPU_CFG_R09_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R09_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09End
+ */
+#define XOCM_XMPU_CFG_R09_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000194UL )
+#define XOCM_XMPU_CFG_R09_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R09_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R09_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09Mstr
+ */
+#define XOCM_XMPU_CFG_R09_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x00000198UL )
+#define XOCM_XMPU_CFG_R09_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R09_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R09_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR09
+ */
+#define XOCM_XMPU_CFG_R09    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x0000019CUL )
+#define XOCM_XMPU_CFG_R09_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R09_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R09_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R09_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R09_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R09_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R09_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R09_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R09_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R09_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R09_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R09_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R09_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10Strt
+ */
+#define XOCM_XMPU_CFG_R10_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A0UL )
+#define XOCM_XMPU_CFG_R10_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R10_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10End
+ */
+#define XOCM_XMPU_CFG_R10_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A4UL )
+#define XOCM_XMPU_CFG_R10_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R10_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R10_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10Mstr
+ */
+#define XOCM_XMPU_CFG_R10_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001A8UL )
+#define XOCM_XMPU_CFG_R10_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R10_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R10_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR10
+ */
+#define XOCM_XMPU_CFG_R10    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001ACUL )
+#define XOCM_XMPU_CFG_R10_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R10_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R10_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R10_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R10_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R10_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R10_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R10_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R10_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R10_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R10_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R10_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R10_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11Strt
+ */
+#define XOCM_XMPU_CFG_R11_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B0UL )
+#define XOCM_XMPU_CFG_R11_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R11_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11End
+ */
+#define XOCM_XMPU_CFG_R11_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B4UL )
+#define XOCM_XMPU_CFG_R11_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R11_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R11_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11Mstr
+ */
+#define XOCM_XMPU_CFG_R11_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001B8UL )
+#define XOCM_XMPU_CFG_R11_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R11_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R11_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR11
+ */
+#define XOCM_XMPU_CFG_R11    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001BCUL )
+#define XOCM_XMPU_CFG_R11_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R11_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R11_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R11_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R11_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R11_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R11_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R11_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R11_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R11_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R11_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R11_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R11_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12Strt
+ */
+#define XOCM_XMPU_CFG_R12_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C0UL )
+#define XOCM_XMPU_CFG_R12_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R12_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12End
+ */
+#define XOCM_XMPU_CFG_R12_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C4UL )
+#define XOCM_XMPU_CFG_R12_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R12_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R12_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12Mstr
+ */
+#define XOCM_XMPU_CFG_R12_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001C8UL )
+#define XOCM_XMPU_CFG_R12_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R12_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R12_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR12
+ */
+#define XOCM_XMPU_CFG_R12    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001CCUL )
+#define XOCM_XMPU_CFG_R12_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R12_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R12_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R12_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R12_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R12_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R12_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R12_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R12_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R12_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R12_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R12_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R12_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13Strt
+ */
+#define XOCM_XMPU_CFG_R13_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D0UL )
+#define XOCM_XMPU_CFG_R13_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R13_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13End
+ */
+#define XOCM_XMPU_CFG_R13_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D4UL )
+#define XOCM_XMPU_CFG_R13_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R13_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R13_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13Mstr
+ */
+#define XOCM_XMPU_CFG_R13_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001D8UL )
+#define XOCM_XMPU_CFG_R13_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R13_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R13_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR13
+ */
+#define XOCM_XMPU_CFG_R13    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001DCUL )
+#define XOCM_XMPU_CFG_R13_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R13_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R13_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R13_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R13_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R13_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R13_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R13_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R13_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R13_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R13_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R13_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R13_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14Strt
+ */
+#define XOCM_XMPU_CFG_R14_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E0UL )
+#define XOCM_XMPU_CFG_R14_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R14_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14End
+ */
+#define XOCM_XMPU_CFG_R14_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E4UL )
+#define XOCM_XMPU_CFG_R14_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R14_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R14_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14Mstr
+ */
+#define XOCM_XMPU_CFG_R14_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001E8UL )
+#define XOCM_XMPU_CFG_R14_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R14_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R14_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR14
+ */
+#define XOCM_XMPU_CFG_R14    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001ECUL )
+#define XOCM_XMPU_CFG_R14_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R14_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R14_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R14_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R14_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R14_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R14_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R14_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R14_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R14_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R14_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R14_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R14_EN_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15Strt
+ */
+#define XOCM_XMPU_CFG_R15_STRT    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F0UL )
+#define XOCM_XMPU_CFG_R15_STRT_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R15_STRT_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15End
+ */
+#define XOCM_XMPU_CFG_R15_END    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F4UL )
+#define XOCM_XMPU_CFG_R15_END_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_END_ADDR_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_END_ADDR_WIDTH   28UL
+#define XOCM_XMPU_CFG_R15_END_ADDR_MASK    0x0fffffffUL
+#define XOCM_XMPU_CFG_R15_END_ADDR_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15Mstr
+ */
+#define XOCM_XMPU_CFG_R15_MSTR    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001F8UL )
+#define XOCM_XMPU_CFG_R15_MSTR_RSTVAL   0x00000000UL
+
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_SHIFT   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_WIDTH   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_MASK    0xffff0000UL
+#define XOCM_XMPU_CFG_R15_MSTR_MSK_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_MSTR_ID_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_WIDTH   16UL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_MASK    0x0000ffffUL
+#define XOCM_XMPU_CFG_R15_MSTR_ID_DEFVAL  0x0UL
+
+/**
+ * Register: XocmXmpuCfgR15
+ */
+#define XOCM_XMPU_CFG_R15    ( ( XOCM_XMPU_CFG_BASEADDR ) + 0x000001FCUL )
+#define XOCM_XMPU_CFG_R15_RSTVAL   0x00000008UL
+
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_SHIFT   4UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_MASK    0x00000010UL
+#define XOCM_XMPU_CFG_R15_NSCHKTYPE_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_REGNNS_SHIFT   3UL
+#define XOCM_XMPU_CFG_R15_REGNNS_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_REGNNS_MASK    0x00000008UL
+#define XOCM_XMPU_CFG_R15_REGNNS_DEFVAL  0x1UL
+
+#define XOCM_XMPU_CFG_R15_WRALWD_SHIFT   2UL
+#define XOCM_XMPU_CFG_R15_WRALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_WRALWD_MASK    0x00000004UL
+#define XOCM_XMPU_CFG_R15_WRALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_RDALWD_SHIFT   1UL
+#define XOCM_XMPU_CFG_R15_RDALWD_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_RDALWD_MASK    0x00000002UL
+#define XOCM_XMPU_CFG_R15_RDALWD_DEFVAL  0x0UL
+
+#define XOCM_XMPU_CFG_R15_EN_SHIFT   0UL
+#define XOCM_XMPU_CFG_R15_EN_WIDTH   1UL
+#define XOCM_XMPU_CFG_R15_EN_MASK    0x00000001UL
+#define XOCM_XMPU_CFG_R15_EN_DEFVAL  0x0UL
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __XOCM_XMPU_CFG_H__ */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xparameters_ps.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xparameters_ps.h
new file mode 100644
index 0000000..b9bc4f8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xparameters_ps.h
@@ -0,0 +1,356 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xparameters_ps.h
+*
+* This file contains the address definitions for the hard peripherals
+* attached to the ARM Cortex R5 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00  pkp  	02/29/14 Initial version
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef XPARAMETERS_PS_H_
+#define XPARAMETERS_PS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock
+ */
+
+/* Canonical definitions for DDR MEMORY */
+#define XPAR_DDR_MEM_BASEADDR		0x00000000U
+#define XPAR_DDR_MEM_HIGHADDR		0x3FFFFFFFU
+
+/* Canonical definitions for Interrupts  */
+#define XPAR_XUARTPS_0_INTR		XPS_UART0_INT_ID
+#define XPAR_XUARTPS_1_INTR		XPS_UART1_INT_ID
+#define XPAR_XIICPS_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_XIICPS_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_XSPIPS_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_XSPIPS_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_XCANPS_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_XCANPS_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_XGPIOPS_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_XEMACPS_0_INTR		XPS_GEM0_INT_ID
+#define XPAR_XEMACPS_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_XEMACPS_1_INTR		XPS_GEM1_INT_ID
+#define XPAR_XEMACPS_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_XEMACPS_2_INTR		XPS_GEM2_INT_ID
+#define XPAR_XEMACPS_2_WAKE_INTR	XPS_GEM2_WAKE_INT_ID
+#define XPAR_XEMACPS_3_INTR		XPS_GEM3_INT_ID
+#define XPAR_XEMACPS_3_WAKE_INTR	XPS_GEM3_WAKE_INT_ID
+#define XPAR_XSDIOPS_0_INTR		XPS_SDIO0_INT_ID
+#define XPAR_XQSPIPS_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_XSDIOPS_1_INTR		XPS_SDIO1_INT_ID
+#define XPAR_XWDTPS_0_INTR		XPS_WDT_INT_ID
+#define XPAR_XDCFG_0_INTR		XPS_DVC_INT_ID
+#define XPAR_SCUTIMER_INTR		XPS_SCU_TMR_INT_ID
+#define XPAR_SCUWDT_INTR		XPS_SCU_WDT_INT_ID
+#define XPAR_XTTCPS_0_INTR		XPS_TTC0_0_INT_ID
+#define XPAR_XTTCPS_1_INTR		XPS_TTC0_1_INT_ID
+#define XPAR_XTTCPS_2_INTR		XPS_TTC0_2_INT_ID
+#define XPAR_XTTCPS_3_INTR		XPS_TTC1_0_INT_ID
+#define XPAR_XTTCPS_4_INTR		XPS_TTC1_1_INT_ID
+#define XPAR_XTTCPS_5_INTR		XPS_TTC1_2_INT_ID
+#define XPAR_XTTCPS_6_INTR		XPS_TTC2_0_INT_ID
+#define XPAR_XTTCPS_7_INTR		XPS_TTC2_1_INT_ID
+#define XPAR_XTTCPS_8_INTR		XPS_TTC2_2_INT_ID
+#define XPAR_XTTCPS_9_INTR		XPS_TTC3_0_INT_ID
+#define XPAR_XTTCPS_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_XTTCPS_11_INTR		XPS_TTC3_2_INT_ID
+#define XPAR_XDMAPS_0_FAULT_INTR	XPS_DMA0_ABORT_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_0	XPS_DMA0_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_1	XPS_DMA1_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_2	XPS_DMA2_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_3	XPS_DMA3_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_4	XPS_DMA4_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_5	XPS_DMA5_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_6	XPS_DMA6_INT_ID
+#define XPAR_XDMAPS_0_DONE_INTR_7	XPS_DMA7_INT_ID
+#define XPAR_XNANDPS8_0_INTR        	XPS_NAND_INT_ID
+#define XPAR_XADMAPS_0_INTR 		XPS_ADMA_CH0_INT_ID
+#define XPAR_XADMAPS_1_INTR 		XPS_ADMA_CH1_INT_ID
+#define XPAR_XADMAPS_2_INTR		XPS_ADMA_CH2_INT_ID
+#define XPAR_XADMAPS_3_INTR 		XPS_ADMA_CH3_INT_ID
+#define XPAR_XADMAPS_4_INTR		XPS_ADMA_CH4_INT_ID
+#define XPAR_XADMAPS_5_INTR 		XPS_ADMA_CH5_INT_ID
+#define XPAR_XADMAPS_6_INTR 		XPS_ADMA_CH6_INT_ID
+#define XPAR_XADMAPS_7_INTR 		XPS_ADMA_CH7_INT_ID
+#define XPAR_XCSUDMA_INTR 		XPS_CSU_DMA_INT_ID
+#define XPAR_XMPU_LPD_INTR 		XPS_XMPU_LPD_INT_ID
+#define XPAR_XZDMAPS_0_INTR		XPS_ZDMA_CH0_INT_ID
+#define XPAR_XZDMAPS_1_INTR		XPS_ZDMA_CH1_INT_ID
+#define XPAR_XZDMAPS_2_INTR 		XPS_ZDMA_CH2_INT_ID
+#define XPAR_XZDMAPS_3_INTR 		XPS_ZDMA_CH3_INT_ID
+#define XPAR_XZDMAPS_4_INTR		XPS_ZDMA_CH4_INT_ID
+#define XPAR_XZDMAPS_5_INTR 		XPS_ZDMA_CH5_INT_ID
+#define XPAR_XZDMAPS_6_INTR 		XPS_ZDMA_CH6_INT_ID
+#define XPAR_XZDMAPS_7_INTR 		XPS_ZDMA_CH7_INT_ID
+#define XPAR_XMPU_FPD_INTR 		XPS_XMPU_FPD_INT_ID
+#define XPAR_XCCI_FPD_INTR 		XPS_FPD_CCI_INT_ID
+#define XPAR_XSMMU_FPD_INTR 		XPS_FPD_SMMU_INT_ID
+#define XPAR_XUSBPS_0_INTR		XPS_USB3_0_ENDPT_INT_ID
+#define XPAR_XUSBPS_1_INTR		XPS_USB3_1_ENDPT_INT_ID
+#define	XPAR_XRTCPSU_ALARM_INTR 	XPS_RTC_ALARM_INT_ID
+#define	XPAR_XRTCPSU_SECONDS_INTR	XPS_RTC_SEC_INT_ID
+
+/* Canonical definitions for SCU GIC */
+#define XPAR_SCUGIC_NUM_INSTANCES	1U
+#define XPAR_SCUGIC_SINGLE_DEVICE_ID	0U
+#define XPAR_SCUGIC_CPU_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00001000U)
+#define XPAR_SCUGIC_DIST_BASEADDR	(XPS_SCU_PERIPH_BASE + 0x00002000U)
+#define XPAR_SCUGIC_ACK_BEFORE		0U
+
+#define XPAR_CPU_CORTEXR5_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ
+
+
+/*
+ * This block contains constant declarations for the peripherals
+ * within the hardblock. These have been put for bacwards compatibilty
+ */
+
+#define XPS_SYS_CTRL_BASEADDR	0xFF180000U
+#define XPS_SCU_PERIPH_BASE		0xF9000000U
+
+
+/* Shared Peripheral Interrupts (SPI) */
+
+/* FIXME */
+/*#define XPS_FPGA0_INT_ID		100U */
+#define XPS_FPGA1_INT_ID		62U
+#define XPS_FPGA2_INT_ID		63U
+#define XPS_FPGA3_INT_ID		64U
+#define XPS_FPGA4_INT_ID		65U
+#define XPS_FPGA5_INT_ID		66U
+#define XPS_FPGA6_INT_ID		67U
+#define XPS_FPGA7_INT_ID		68U
+#define XPS_DMA4_INT_ID			72U
+#define XPS_DMA5_INT_ID			73U
+#define XPS_DMA6_INT_ID			74U
+#define XPS_DMA7_INT_ID			75U
+#define XPS_FPGA8_INT_ID		84U
+#define XPS_FPGA9_INT_ID		85U
+#define XPS_FPGA10_INT_ID		86U
+#define XPS_FPGA11_INT_ID		87U
+#define XPS_FPGA12_INT_ID		88U
+#define XPS_FPGA13_INT_ID		89U
+#define XPS_FPGA14_INT_ID		90U
+#define XPS_FPGA15_INT_ID		91U
+
+/* Updated Interrupt-IDs */
+#define XPS_OCMINTR_INT_ID		(10U + 32U)
+#define XPS_NAND_INT_ID        		(14U + 32U)
+#define XPS_QSPI_INT_ID			(15U + 32U)
+#define XPS_GPIO_INT_ID			(16U + 32U)
+#define XPS_I2C0_INT_ID			(17U + 32U)
+#define XPS_I2C1_INT_ID			(18U + 32U)
+#define XPS_SPI0_INT_ID			(19U + 32U)
+#define XPS_SPI1_INT_ID			(20U + 32U)
+#define XPS_UART0_INT_ID		(21U + 32U)
+#define XPS_UART1_INT_ID		(22U + 32U)
+#define XPS_CAN0_INT_ID			(23U + 32U)
+#define XPS_CAN1_INT_ID			(24U + 32U)
+#define	XPS_RTC_ALARM_INT_ID 	(26U + 32U)
+#define	XPS_RTC_SEC_INT_ID	 	(27U + 32U)
+#define XPS_WDT_INT_ID			(52U + 32U)
+#define XPS_TTC0_0_INT_ID		(36U + 32U)
+#define XPS_TTC0_1_INT_ID		(37U + 32U)
+#define XPS_TTC0_2_INT_ID 		(38U + 32U)
+#define XPS_TTC1_0_INT_ID		(39U + 32U)
+#define XPS_TTC1_1_INT_ID		(40U + 32U)
+#define XPS_TTC1_2_INT_ID		(41U + 32U)
+#define XPS_TTC2_0_INT_ID		(42U + 32U)
+#define XPS_TTC2_1_INT_ID		(43U + 32U)
+#define XPS_TTC2_2_INT_ID		(44U + 32U)
+#define XPS_TTC3_0_INT_ID		(45U + 32U)
+#define XPS_TTC3_1_INT_ID		(46U + 32U)
+#define XPS_TTC3_2_INT_ID		(47U + 32U)
+#define XPS_SDIO0_INT_ID		(48U + 32U)
+#define XPS_SDIO1_INT_ID		(49U + 32U)
+#define XPS_GEM0_INT_ID			(57U + 32U)
+#define XPS_GEM0_WAKE_INT_ID		(58U + 32U)
+#define XPS_GEM1_INT_ID			(59U + 32U)
+#define XPS_GEM1_WAKE_INT_ID		(60U + 32U)
+#define XPS_GEM2_INT_ID			(61U + 32U)
+#define XPS_GEM2_WAKE_INT_ID		(62U + 32U)
+#define XPS_GEM3_INT_ID			(63U + 32U)
+#define XPS_GEM3_WAKE_INT_ID		(64U + 32U)
+#define XPS_USB3_0_ENDPT_INT_ID		(65U + 32U)
+#define XPS_USB3_1_ENDPT_INT_ID		(70U + 32U)
+#define XPS_ADMA_CH0_INT_ID		(77U + 32U)
+#define XPS_ADMA_CH1_INT_ID		(78U + 32U)
+#define XPS_ADMA_CH2_INT_ID		(79U + 32U)
+#define XPS_ADMA_CH3_INT_ID		(80U + 32U)
+#define XPS_ADMA_CH4_INT_ID		(81U + 32U)
+#define XPS_ADMA_CH5_INT_ID		(82U + 32U)
+#define XPS_ADMA_CH6_INT_ID		(83U + 32U)
+#define XPS_ADMA_CH7_INT_ID		(84U + 32U)
+#define XPS_CSU_DMA_INT_ID		(86U + 32U)
+#define XPS_XMPU_LPD_INT_ID		(88U + 32U)
+#define XPS_ZDMA_CH0_INT_ID		(124U + 32U)
+#define XPS_ZDMA_CH1_INT_ID		(125U + 32U)
+#define XPS_ZDMA_CH2_INT_ID		(126U + 32U)
+#define XPS_ZDMA_CH3_INT_ID		(127U + 32U)
+#define XPS_ZDMA_CH4_INT_ID		(128U + 32U)
+#define XPS_ZDMA_CH5_INT_ID		(129U + 32U)
+#define XPS_ZDMA_CH6_INT_ID		(130U + 32U)
+#define XPS_ZDMA_CH7_INT_ID		(131U + 32U)
+#define XPS_XMPU_FPD_INT_ID		(134U + 32U)
+#define XPS_FPD_CCI_INT_ID		(154U + 32U)
+#define XPS_FPD_SMMU_INT_ID		(155U + 32U)
+
+/* Private Peripheral Interrupts (PPI) */
+/*#define XPS_GLOBAL_TMR_INT_ID		27	 SCU Global Timer interrupt */
+/*#define XPS_FIQ_INT_ID			28	 FIQ from FPGA fabric */
+/*#define XPS_SCU_TMR_INT_ID		29	 SCU Private Timer interrupt */
+/*#define XPS_SCU_WDT_INT_ID		30	 SCU Private WDT interrupt */
+/*#define XPS_IRQ_INT_ID			31	 IRQ from FPGA fabric */
+
+/* REDEFINES for TEST APP */
+/* Definitions for UART */
+#define XPAR_PS7_UART_0_INTR		XPS_UART0_INT_ID
+#define XPAR_PS7_UART_1_INTR		XPS_UART1_INT_ID
+#define XPAR_PS7_USB_0_INTR		XPS_USB0_INT_ID
+#define XPAR_PS7_USB_1_INTR		XPS_USB1_INT_ID
+#define XPAR_PS7_I2C_0_INTR		XPS_I2C0_INT_ID
+#define XPAR_PS7_I2C_1_INTR		XPS_I2C1_INT_ID
+#define XPAR_PS7_SPI_0_INTR		XPS_SPI0_INT_ID
+#define XPAR_PS7_SPI_1_INTR		XPS_SPI1_INT_ID
+#define XPAR_PS7_CAN_0_INTR		XPS_CAN0_INT_ID
+#define XPAR_PS7_CAN_1_INTR		XPS_CAN1_INT_ID
+#define XPAR_PS7_GPIO_0_INTR		XPS_GPIO_INT_ID
+#define XPAR_PS7_ETHERNET_0_INTR	XPS_GEM0_INT_ID
+#define XPAR_PS7_ETHERNET_0_WAKE_INTR	XPS_GEM0_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_1_INTR	XPS_GEM1_INT_ID
+#define XPAR_PS7_ETHERNET_1_WAKE_INTR	XPS_GEM1_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_2_INTR	XPS_GEM2_INT_ID
+#define XPAR_PS7_ETHERNET_2_WAKE_INTR	XPS_GEM2_WAKE_INT_ID
+#define XPAR_PS7_ETHERNET_3_INTR	XPS_GEM3_INT_ID
+#define XPAR_PS7_ETHERNET_3_WAKE_INTR	XPS_GEM3_WAKE_INT_ID
+
+#define XPAR_PS7_QSPI_0_INTR		XPS_QSPI_INT_ID
+#define XPAR_PS7_WDT_0_INTR		XPS_WDT_INT_ID
+#define XPAR_PS7_SCUWDT_0_INTR		XPS_SCU_WDT_INT_ID
+#define XPAR_PS7_SCUTIMER_0_INTR	XPS_SCU_TMR_INT_ID
+#define XPAR_PS7_XADC_0_INTR		XPS_SYSMON_INT_ID
+
+#define XPAR_PSU_UART_0_INTR        XPS_UART0_INT_ID
+#define XPAR_PSU_UART_1_INTR        XPS_UART1_INT_ID
+#define XPAR_PSU_USB_0_INTR     XPS_USB0_INT_ID
+#define XPAR_PSU_USB_1_INTR     XPS_USB1_INT_ID
+#define XPAR_PSU_I2C_0_INTR     XPS_I2C0_INT_ID
+#define XPAR_PSU_I2C_1_INTR     XPS_I2C1_INT_ID
+#define XPAR_PSU_SPI_0_INTR     XPS_SPI0_INT_ID
+#define XPAR_PSU_SPI_1_INTR     XPS_SPI1_INT_ID
+#define XPAR_PSU_CAN_0_INTR     XPS_CAN0_INT_ID
+#define XPAR_PSU_CAN_1_INTR     XPS_CAN1_INT_ID
+#define XPAR_PSU_GPIO_0_INTR        XPS_GPIO_INT_ID
+#define XPAR_PSU_ETHERNET_0_INTR    XPS_GEM0_INT_ID
+#define XPAR_PSU_ETHERNET_0_WAKE_INTR   XPS_GEM0_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_1_INTR    XPS_GEM1_INT_ID
+#define XPAR_PSU_ETHERNET_1_WAKE_INTR   XPS_GEM1_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_2_INTR    XPS_GEM2_INT_ID
+#define XPAR_PSU_ETHERNET_2_WAKE_INTR   XPS_GEM2_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_3_INTR    XPS_GEM3_INT_ID
+#define XPAR_PSU_ETHERNET_3_WAKE_INTR   XPS_GEM3_WAKE_INT_ID
+#define XPAR_PSU_QSPI_0_INTR        XPS_QSPI_INT_ID
+#define XPAR_PSU_WDT_0_INTR     XPS_WDT_INT_ID
+#define XPAR_PSU_SCUWDT_0_INTR      XPS_SCU_WDT_INT_ID
+#define XPAR_PSU_SCUTIMER_0_INTR    XPS_SCU_TMR_INT_ID
+#define XPAR_PSU_XADC_0_INTR        XPS_SYSMON_INT_ID
+#define XPAR_PSU_TTC_0_INTR         XPS_TTC0_0_INT_ID
+#define XPAR_PSU_TTC_1_INTR         XPS_TTC0_1_INT_ID
+#define XPAR_PSU_TTC_2_INTR         XPS_TTC0_2_INT_ID
+#define XPAR_PSU_TTC_3_INTR         XPS_TTC1_0_INT_ID
+#define XPAR_PSU_TTC_4_INTR         XPS_TTC1_1_INT_ID
+#define XPAR_PSU_TTC_5_INTR         XPS_TTC1_2_INT_ID
+#define XPAR_PSU_TTC_6_INTR			XPS_TTC2_0_INT_ID
+#define XPAR_PSU_TTC_7_INTR			XPS_TTC2_1_INT_ID
+#define XPAR_PSU_TTC_8_INTR			XPS_TTC2_2_INT_ID
+#define XPAR_PSU_TTC_9_INTR			XPS_TTC3_0_INT_ID
+#define XPAR_PSU_TTC_10_INTR		XPS_TTC3_1_INT_ID
+#define XPAR_PSU_TTC_11_INTR		XPS_TTC3_2_INT_ID
+
+#define XPAR_XADCPS_NUM_INSTANCES 1U
+#define XPAR_XADCPS_0_DEVICE_ID   0U
+#define XPAR_XADCPS_0_BASEADDR	  (0xF8007000U)
+#define XPAR_XADCPS_INT_ID		XPS_SYSMON_INT_ID
+
+/* For backwards compatibilty */
+#define XPAR_XUARTPS_0_CLOCK_HZ		XPAR_XUARTPS_0_UART_CLK_FREQ_HZ
+#define XPAR_XUARTPS_1_CLOCK_HZ		XPAR_XUARTPS_1_UART_CLK_FREQ_HZ
+#define XPAR_XTTCPS_0_CLOCK_HZ		XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_1_CLOCK_HZ		XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_2_CLOCK_HZ		XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_3_CLOCK_HZ		XPAR_XTTCPS_3_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_4_CLOCK_HZ		XPAR_XTTCPS_4_TTC_CLK_FREQ_HZ
+#define XPAR_XTTCPS_5_CLOCK_HZ		XPAR_XTTCPS_5_TTC_CLK_FREQ_HZ
+#define XPAR_XIICPS_0_CLOCK_HZ		XPAR_XIICPS_0_I2C_CLK_FREQ_HZ
+#define XPAR_XIICPS_1_CLOCK_HZ		XPAR_XIICPS_1_I2C_CLK_FREQ_HZ
+
+#define XPAR_XQSPIPS_0_CLOCK_HZ		XPAR_XQSPIPS_0_QSPI_CLK_FREQ_HZ
+
+#ifdef XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXR5_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXR5_0_CPU_CLK_FREQ_HZ
+#endif
+
+#ifdef XPAR_CPU_CORTEXR5_1_CPU_CLK_FREQ_HZ
+#define XPAR_CPU_CORTEXR5_CORE_CLOCK_FREQ_HZ	XPAR_CPU_CORTEXR5_1_CPU_CLK_FREQ_HZ
+#endif
+
+#define XPAR_SCUTIMER_DEVICE_ID		0U
+#define XPAR_SCUWDT_DEVICE_ID		0U
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xpm_counter.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xpm_counter.c
new file mode 100644
index 0000000..a10ef2d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xpm_counter.c
@@ -0,0 +1,292 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpm_counter.c
+*
+* This file contains APIs for configuring and controlling the Cortex-R5
+* Performance Monitor Events. For more information about the event counters,
+* see xpm_counter.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 

+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xpm_counter.h"
+
+/************************** Constant Definitions ****************************/
+
+/**************************** Type Definitions ******************************/
+
+typedef const u32 PmcrEventCfg32[XPM_CTRCOUNT];
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions *****************************/
+
+
+
+/************************** Function Prototypes ******************************/
+
+void Xpm_DisableEventCounters(void);
+void Xpm_EnableEventCounters (void);
+void Xpm_ResetEventCounters (void);
+
+/******************************************************************************/
+
+/****************************************************************************/
+/**
+*
+* This function disables the Cortex R5 event counters.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xpm_DisableEventCounters(void)
+{
+	/* Disable the event counters */
+	mtcp(XREG_CP15_COUNT_ENABLE_CLR, 0x3f);
+}
+
+/****************************************************************************/
+/**
+*
+* This function enables the Cortex R5 event counters.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xpm_EnableEventCounters(void)
+{
+	/* Enable the event counters */
+	mtcp(XREG_CP15_COUNT_ENABLE_SET, 0x3f);
+}
+
+/****************************************************************************/
+/**
+*
+* This function resets the Cortex R5 event counters.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xpm_ResetEventCounters(void)
+{
+	u32 Reg;
+
+#ifdef __GNUC__
+	Reg = mfcp(XREG_CP15_PERF_MONITOR_CTRL);
+#else
+	{ register u32 C15Reg __asm(XREG_CP15_PERF_MONITOR_CTRL);
+	  Reg = C15Reg; }
+#endif
+	Reg |= (1U << 2U); /* reset event counters */
+	mtcp(XREG_CP15_PERF_MONITOR_CTRL, Reg);
+}
+
+/****************************************************************************/
+/**
+*
+* This function configures the Cortex R5 event counters controller, with the
+* event codes, in a configuration selected by the user and enables the counters.
+*
+* @param	PmcrCfg is configuration value based on which the event counters
+*		are configured.
+*		Use XPM_CNTRCFG* values defined in xpm_counter.h.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xpm_SetEvents(s32 PmcrCfg)
+{
+	u32 Counter;
+	static PmcrEventCfg32 PmcrEvents[] = {
+		{
+			XPM_EVENT_SOFTINCR,
+			XPM_EVENT_INSRFETCH_CACHEREFILL,
+			XPM_EVENT_INSTRFECT_TLBREFILL,
+			XPM_EVENT_DATA_CACHEREFILL,
+			XPM_EVENT_DATA_CACHEACCESS,
+			XPM_EVENT_DATA_TLBREFILL
+		},
+		{
+			XPM_EVENT_DATA_READS,
+			XPM_EVENT_DATA_WRITE,
+			XPM_EVENT_EXCEPTION,
+			XPM_EVENT_EXCEPRETURN,
+			XPM_EVENT_CHANGECONTEXT,
+			XPM_EVENT_SW_CHANGEPC
+		},
+		{
+			XPM_EVENT_IMMEDBRANCH,
+			XPM_EVENT_UNALIGNEDACCESS,
+			XPM_EVENT_BRANCHMISS,
+			XPM_EVENT_CLOCKCYCLES,
+			XPM_EVENT_BRANCHPREDICT,
+			XPM_EVENT_JAVABYTECODE
+		},
+		{
+			XPM_EVENT_SWJAVABYTECODE,
+			XPM_EVENT_JAVABACKBRANCH,
+			XPM_EVENT_COHERLINEMISS,
+			XPM_EVENT_COHERLINEHIT,
+			XPM_EVENT_INSTRSTALL,
+			XPM_EVENT_DATASTALL
+		},
+		{
+			XPM_EVENT_MAINTLBSTALL,
+			XPM_EVENT_STREXPASS,
+			XPM_EVENT_STREXFAIL,
+			XPM_EVENT_DATAEVICT,
+			XPM_EVENT_NODISPATCH,
+			XPM_EVENT_ISSUEEMPTY
+		},
+		{
+			XPM_EVENT_INSTRRENAME,
+			XPM_EVENT_PREDICTFUNCRET,
+			XPM_EVENT_MAINEXEC,
+			XPM_EVENT_SECEXEC,
+			XPM_EVENT_LDRSTR,
+			XPM_EVENT_FLOATRENAME
+		},
+		{
+			XPM_EVENT_NEONRENAME,
+			XPM_EVENT_PLDSTALL,
+			XPM_EVENT_WRITESTALL,
+			XPM_EVENT_INSTRTLBSTALL,
+			XPM_EVENT_DATATLBSTALL,
+			XPM_EVENT_INSTR_uTLBSTALL
+		},
+		{
+			XPM_EVENT_DATA_uTLBSTALL,
+			XPM_EVENT_DMB_STALL,
+			XPM_EVENT_INT_CLKEN,
+			XPM_EVENT_DE_CLKEN,
+			XPM_EVENT_INSTRISB,
+			XPM_EVENT_INSTRDSB
+		},
+		{
+			XPM_EVENT_INSTRDMB,
+			XPM_EVENT_EXTINT,
+			XPM_EVENT_PLE_LRC,
+			XPM_EVENT_PLE_LRS,
+			XPM_EVENT_PLE_FLUSH,
+			XPM_EVENT_PLE_CMPL
+		},
+		{
+			XPM_EVENT_PLE_OVFL,
+			XPM_EVENT_PLE_PROG,
+			XPM_EVENT_PLE_LRC,
+			XPM_EVENT_PLE_LRS,
+			XPM_EVENT_PLE_FLUSH,
+			XPM_EVENT_PLE_CMPL
+		},
+		{
+			XPM_EVENT_DATASTALL,
+			XPM_EVENT_INSRFETCH_CACHEREFILL,
+			XPM_EVENT_INSTRFECT_TLBREFILL,
+			XPM_EVENT_DATA_CACHEREFILL,
+			XPM_EVENT_DATA_CACHEACCESS,
+			XPM_EVENT_DATA_TLBREFILL
+		},
+	};
+	const u32 *ptr = PmcrEvents[PmcrCfg];
+
+	Xpm_DisableEventCounters();
+
+	for(Counter = 0U; Counter < XPM_CTRCOUNT; Counter++) {
+
+		/* Selecet event counter */
+		mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
+
+		/* Set the event */
+		mtcp(XREG_CP15_EVENT_TYPE_SEL, ptr[Counter]);
+	}
+
+	Xpm_ResetEventCounters();
+	Xpm_EnableEventCounters();
+}
+
+/****************************************************************************/
+/**
+*
+* This function disables the event counters and returns the counter values.
+*
+* @param	PmCtrValue is a pointer to an array of type u32 PmCtrValue[6].
+*		It is an output parameter which is used to return the PM
+*		counter values.
+*
+* @return	None.
+*
+* @note		None.
+*
+*****************************************************************************/
+void Xpm_GetEventCounters(u32 *PmCtrValue)
+{
+	u32 Counter;
+
+	Xpm_DisableEventCounters();
+
+	for(Counter = 0U; Counter < XPM_CTRCOUNT; Counter++) {
+
+		mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
+#ifdef __GNUC__
+		PmCtrValue[Counter] = mfcp(XREG_CP15_PERF_MONITOR_COUNT);
+#else
+		{ register u32 Cp15Reg __asm(XREG_CP15_PERF_MONITOR_COUNT);
+		  PmCtrValue[Counter] = Cp15Reg; }
+#endif
+	}
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xpm_counter.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xpm_counter.h
new file mode 100644
index 0000000..95a0232
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xpm_counter.h
@@ -0,0 +1,571 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpm_counter.h
+*
+* This header file contains APIs for configuring and controlling the Cortex-R5
+* Performance Monitor Events.
+* Cortex-R5 Performance Monitor has 6 event counters which can be used to
+* count a variety of events described in Coretx-R5 TRM. This file defines
+* configurations, where value configures the event counters to count a
+* set of events.
+*
+* Xpm_SetEvents can be used to set the event counters to count a set of events
+* and Xpm_GetEventCounters can be used to read the counter values.
+*
+* @note
+*
+* This file doesn't handle the Cortex-R5 cycle counter, as the cycle counter is
+* being used for time keeping.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 

+*
+******************************************************************************/
+
+#ifndef XPMCOUNTER_H /* prevent circular inclusions */
+#define XPMCOUNTER_H /* by using protection macros */
+
+/***************************** Include Files ********************************/
+
+#include 
+#include "xpseudo_asm.h"
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/************************** Constant Definitions ****************************/
+
+/* Number of performance counters */
+#define XPM_CTRCOUNT 6U
+
+/* The following constants define the Cortex-R5 Performance Monitor Events */
+
+/*
+ * Software increment. The register is incremented only on writes to the
+ * Software Increment Register
+ */
+#define XPM_EVENT_SOFTINCR 0x00U
+
+/*
+ * Instruction fetch that causes a refill at (at least) the lowest level(s) of
+ * instruction or unified cache. Includes the speculative linefills in the
+ * count
+ */
+#define XPM_EVENT_INSRFETCH_CACHEREFILL 0x01U
+
+/*
+ * Instruction fetch that causes a TLB refill at (at least) the lowest level of
+ * TLB. Includes the speculative requests in the count
+ */
+#define XPM_EVENT_INSTRFECT_TLBREFILL 0x02U
+
+/*
+ * Data read or write operation that causes a refill at (at least) the lowest
+ * level(s)of data or unified cache. Counts the number of allocations performed
+ * in the Data Cache due to a read or a write
+ */
+#define XPM_EVENT_DATA_CACHEREFILL 0x03U
+
+/*
+ * Data read or write operation that causes a cache access at (at least) the
+ * lowest level(s) of data or unified cache. This includes speculative reads
+ */
+#define XPM_EVENT_DATA_CACHEACCESS 0x04U
+
+/*
+ * Data read or write operation that causes a TLB refill at (at least) the
+ * lowest level of TLB. This does not include micro TLB misses due to PLD, PLI,
+ * CP15 Cache operation by MVA and CP15 VA to PA operations
+ */
+#define XPM_EVENT_DATA_TLBREFILL 0x05U
+
+/*
+ * Data read architecturally executed. Counts the number of data read
+ * instructions accepted by the Load Store Unit. This includes counting the
+ * speculative and aborted LDR/LDM, as well as the reads due to the SWP
+ * instructions
+ */
+#define XPM_EVENT_DATA_READS 0x06U
+
+/*
+ * Data write architecturally executed. Counts the number of data write
+ * instructions accepted by the Load Store Unit. This includes counting the
+ * speculative and aborted STR/STM, as well as the writes due to the SWP
+ * instructions
+ */
+#define XPM_EVENT_DATA_WRITE 0x07U
+
+/* Exception taken. Counts the number of exceptions architecturally taken.*/
+#define XPM_EVENT_EXCEPTION 0x09U
+
+/* Exception return architecturally executed.*/
+#define XPM_EVENT_EXCEPRETURN 0x0AU
+
+/*
+ * Change to ContextID retired. Counts the number of instructions
+ * architecturally executed writing into the ContextID Register
+ */
+#define XPM_EVENT_CHANGECONTEXT 0x0BU
+
+/*
+ * Software change of PC, except by an exception, architecturally executed.
+ * Count the number of PC changes architecturally executed, excluding the PC
+ * changes due to taken exceptions
+ */
+#define XPM_EVENT_SW_CHANGEPC 0x0CU
+
+/*
+ * Immediate branch architecturally executed (taken or not taken). This includes
+ * the branches which are flushed due to a previous load/store which aborts
+ * late
+ */
+#define XPM_EVENT_IMMEDBRANCH 0x0DU
+
+/*
+ * Unaligned access architecturally executed. Counts the number of aborted
+ * unaligned accessed architecturally executed, and the number of not-aborted
+ * unaligned accesses, including the speculative ones
+ */
+#define XPM_EVENT_UNALIGNEDACCESS 0x0FU
+
+/*
+ * Branch mispredicted/not predicted. Counts the number of mispredicted or
+ * not-predicted branches executed. This includes the branches which are flushed
+ * due to a previous load/store which aborts late
+ */
+#define XPM_EVENT_BRANCHMISS 0x10U
+
+/*
+ * Counts clock cycles when the Cortex-R5 processor is not in WFE/WFI. This
+ * event is not exported on the PMUEVENT bus
+ */
+#define XPM_EVENT_CLOCKCYCLES 0x11U
+
+/*
+ * Branches or other change in program flow that could have been predicted by
+ * the branch prediction resources of the processor. This includes the branches
+ * which are flushed due to a previous load/store which aborts late
+ */
+#define XPM_EVENT_BRANCHPREDICT 0x12U
+
+/*
+ * Java bytecode execute. Counts the number of Java bytecodes being decoded,
+ * including speculative ones
+ */
+#define XPM_EVENT_JAVABYTECODE 0x40U
+
+/*
+ * Software Java bytecode executed. Counts the number of software java bytecodes
+ * being decoded, including speculative ones
+ */
+#define XPM_EVENT_SWJAVABYTECODE 0x41U
+
+/*
+ * Jazelle backward branches executed. Counts the number of Jazelle taken
+ * branches being executed. This includes the branches which are flushed due
+ * to a previous load/store which aborts late
+ */
+#define XPM_EVENT_JAVABACKBRANCH 0x42U
+
+/*
+ * Coherent linefill miss Counts the number of coherent linefill requests
+ * performed by the Cortex-R5 processor which also miss in all the other
+ * Cortex-R5 processors, meaning that the request is sent to the external
+ * memory
+ */
+#define XPM_EVENT_COHERLINEMISS 0x50U
+
+/*
+ * Coherent linefill hit. Counts the number of coherent linefill requests
+ * performed by the Cortex-R5 processor which hit in another Cortex-R5
+ * processor, meaning that the linefill data is fetched directly from the
+ * relevant Cortex-R5 cache
+ */
+#define XPM_EVENT_COHERLINEHIT 0x51U
+
+/*
+ * Instruction cache dependent stall cycles. Counts the number of cycles where
+ * the processor is ready to accept new instructions, but does not receive any
+ * due to the instruction side not being able to provide any and the
+ * instruction cache is currently performing at least one linefill
+ */
+#define XPM_EVENT_INSTRSTALL 0x60U
+
+/*
+ * Data cache dependent stall cycles. Counts the number of cycles where the core
+ * has some instructions that it cannot issue to any pipeline, and the Load
+ * Store unit has at least one pending linefill request, and no pending
+ */
+#define XPM_EVENT_DATASTALL 0x61U
+
+/*
+ * Main TLB miss stall cycles. Counts the number of cycles where the processor
+ * is stalled waiting for the completion of translation table walks from the
+ * main TLB. The processor stalls can be due to the instruction side not being
+ * able to provide the instructions, or to the data side not being able to
+ * provide the necessary data, due to them waiting for the main TLB translation
+ * table walk to complete
+ */
+#define XPM_EVENT_MAINTLBSTALL 0x62U
+
+/*
+ * Counts the number of STREX instructions architecturally executed and
+ * passed
+ */
+#define XPM_EVENT_STREXPASS 0x63U
+
+/*
+ * Counts the number of STREX instructions architecturally executed and
+ * failed
+ */
+#define XPM_EVENT_STREXFAIL 0x64U
+
+/*
+ * Data eviction. Counts the number of eviction requests due to a linefill in
+ * the data cache
+ */
+#define XPM_EVENT_DATAEVICT 0x65U
+
+/*
+ * Counts the number of cycles where the issue stage does not dispatch any
+ * instruction because it is empty or cannot dispatch any instructions
+ */
+#define XPM_EVENT_NODISPATCH 0x66U
+
+/*
+ * Counts the number of cycles where the issue stage is empty
+ */
+#define XPM_EVENT_ISSUEEMPTY 0x67U
+
+/*
+ * Counts the number of instructions going through the Register Renaming stage.
+ * This number is an approximate number of the total number of instructions
+ * speculatively executed, and even more approximate of the total number of
+ * instructions architecturally executed. The approximation depends mainly on
+ * the branch misprediction rate.
+ * The renaming stage can handle two instructions in the same cycle so the event
+ * is two bits long:
+ *    - b00 no instructions renamed
+ *    - b01 one instruction renamed
+ *    - b10 two instructions renamed
+ */
+#define XPM_EVENT_INSTRRENAME 0x68U
+
+/*
+ * Counts the number of procedure returns whose condition codes do not fail,
+ * excluding all returns from exception. This count includes procedure returns
+ * which are flushed due to a previous load/store which aborts late.
+ * Only the following instructions are reported:
+ * - BX R14
+ * - MOV PC LR
+ * - POP {..,pc}
+ * - LDR pc,[sp],#offset
+ * The following instructions are not reported:
+ * - LDMIA R9!,{..,PC} (ThumbEE state only)
+ * - LDR PC,[R9],#offset (ThumbEE state only)
+ * - BX R0 (Rm != R14)
+ * - MOV PC,R0 (Rm != R14)
+ * - LDM SP,{...,PC} (writeback not specified)
+ * - LDR PC,[SP,#offset] (wrong addressing mode)
+ */
+#define XPM_EVENT_PREDICTFUNCRET 0x6EU
+
+/*
+ * Counts the number of instructions being executed in the main execution
+ * pipeline of the processor, the multiply pipeline and arithmetic logic unit
+ * pipeline. The counted instructions are still speculative
+ */
+#define XPM_EVENT_MAINEXEC 0x70U
+
+/*
+ * Counts the number of instructions being executed in the processor second
+ * execution pipeline (ALU). The counted instructions are still speculative
+ */
+#define XPM_EVENT_SECEXEC 0x71U
+
+/*
+ * Counts the number of instructions being executed in the Load/Store unit. The
+ * counted instructions are still speculative
+ */
+#define XPM_EVENT_LDRSTR 0x72U
+
+/*
+ * Counts the number of Floating-point instructions going through the Register
+ * Rename stage. Instructions are still speculative in this stage.
+ *Two floating-point instructions can be renamed in the same cycle so the event
+ * is two bitslong:
+ *0b00 no floating-point instruction renamed
+ *0b01 one floating-point instruction renamed
+ *0b10 two floating-point instructions renamed
+ */
+#define XPM_EVENT_FLOATRENAME 0x73U
+
+/*
+ * Counts the number of Neon instructions going through the Register Rename
+ * stage.Instructions are still speculative in this stage.
+ * Two NEON instructions can be renamed in the same cycle so the event is two
+ * bits long:
+ *0b00 no NEON instruction renamed
+ *0b01 one NEON instruction renamed
+ *0b10 two NEON instructions renamed
+ */
+#define XPM_EVENT_NEONRENAME 0x74U
+
+/*
+ * Counts the number of cycles where the processor is stalled because PLD slots
+ * are all full
+ */
+#define XPM_EVENT_PLDSTALL 0x80U
+
+/*
+ * Counts the number of cycles when the processor is stalled and the data side
+ * is stalled too because it is full and executing writes to the external
+ * memory
+ */
+#define XPM_EVENT_WRITESTALL 0x81U
+
+/*
+ * Counts the number of stall cycles due to main TLB misses on requests issued
+ * by the instruction side
+ */
+#define XPM_EVENT_INSTRTLBSTALL 0x82U
+
+/*
+ * Counts the number of stall cycles due to main TLB misses on requests issued
+ * by the data side
+ */
+#define XPM_EVENT_DATATLBSTALL 0x83U
+
+/*
+ * Counts the number of stall cycles due to micro TLB misses on the instruction
+ * side. This event does not include main TLB miss stall cycles that are already
+ * counted in the corresponding main TLB event
+ */
+#define XPM_EVENT_INSTR_uTLBSTALL 0x84U
+
+/*
+ * Counts the number of stall cycles due to micro TLB misses on the data side.
+ * This event does not include main TLB miss stall cycles that are already
+ * counted in the corresponding main TLB event
+ */
+#define XPM_EVENT_DATA_uTLBSTALL 0x85U
+
+/*
+ * Counts the number of stall cycles because of the execution of a DMB memory
+ * barrier. This includes all DMB instructions being executed, even
+ * speculatively
+ */
+#define XPM_EVENT_DMB_STALL 0x86U
+
+/*
+ * Counts the number of cycles during which the integer core clock is enabled
+ */
+#define XPM_EVENT_INT_CLKEN 0x8AU
+
+/*
+ * Counts the number of cycles during which the Data Engine clock is enabled
+ */
+#define XPM_EVENT_DE_CLKEN 0x8BU
+
+/*
+ * Counts the number of ISB instructions architecturally executed
+ */
+#define XPM_EVENT_INSTRISB 0x90U
+
+/*
+ * Counts the number of DSB instructions architecturally executed
+ */
+#define XPM_EVENT_INSTRDSB 0x91U
+
+/*
+ * Counts the number of DMB instructions speculatively executed
+ */
+#define XPM_EVENT_INSTRDMB 0x92U
+
+/*
+ * Counts the number of external interrupts executed by the processor
+ */
+#define XPM_EVENT_EXTINT 0x93U
+
+/*
+ * PLE cache line request completed
+ */
+#define XPM_EVENT_PLE_LRC 0xA0U
+
+/*
+ * PLE cache line request skipped
+ */
+#define XPM_EVENT_PLE_LRS 0xA1U
+
+/*
+ * PLE FIFO flush
+ */
+#define XPM_EVENT_PLE_FLUSH 0xA2U
+
+/*
+ * PLE request complete
+ */
+#define XPM_EVENT_PLE_CMPL 0xA3U
+
+/*
+ * PLE FIFO overflow
+ */
+#define XPM_EVENT_PLE_OVFL 0xA4U
+
+/*
+ * PLE request programmed
+ */
+#define XPM_EVENT_PLE_PROG 0xA5U
+
+/*
+ * The following constants define the configurations for Cortex-R5 Performance
+ * Monitor Events. Each configuration configures the event counters for a set
+ * of events.
+ * -----------------------------------------------
+ * Config		PmCtr0... PmCtr5
+ * -----------------------------------------------
+ * XPM_CNTRCFG1		{ XPM_EVENT_SOFTINCR,
+ *			  XPM_EVENT_INSRFETCH_CACHEREFILL,
+ *			  XPM_EVENT_INSTRFECT_TLBREFILL,
+ *			  XPM_EVENT_DATA_CACHEREFILL,
+ *			  XPM_EVENT_DATA_CACHEACCESS,
+ *			  XPM_EVENT_DATA_TLBREFILL }
+ *
+ * XPM_CNTRCFG2		{ XPM_EVENT_DATA_READS,
+ *			  XPM_EVENT_DATA_WRITE,
+ *			  XPM_EVENT_EXCEPTION,
+ *			  XPM_EVENT_EXCEPRETURN,
+ *			  XPM_EVENT_CHANGECONTEXT,
+ *			  XPM_EVENT_SW_CHANGEPC }
+ *
+ * XPM_CNTRCFG3		{ XPM_EVENT_IMMEDBRANCH,
+ *			  XPM_EVENT_UNALIGNEDACCESS,
+ *			  XPM_EVENT_BRANCHMISS,
+ *			  XPM_EVENT_CLOCKCYCLES,
+ *			  XPM_EVENT_BRANCHPREDICT,
+ *			  XPM_EVENT_JAVABYTECODE }
+ *
+ * XPM_CNTRCFG4		{ XPM_EVENT_SWJAVABYTECODE,
+ *			  XPM_EVENT_JAVABACKBRANCH,
+ *			  XPM_EVENT_COHERLINEMISS,
+ *			  XPM_EVENT_COHERLINEHIT,
+ *			  XPM_EVENT_INSTRSTALL,
+ *			  XPM_EVENT_DATASTALL }
+ *
+ * XPM_CNTRCFG5		{ XPM_EVENT_MAINTLBSTALL,
+ *			  XPM_EVENT_STREXPASS,
+ *			  XPM_EVENT_STREXFAIL,
+ *			  XPM_EVENT_DATAEVICT,
+ *			  XPM_EVENT_NODISPATCH,
+ *			  XPM_EVENT_ISSUEEMPTY }
+ *
+ * XPM_CNTRCFG6		{ XPM_EVENT_INSTRRENAME,
+ *			  XPM_EVENT_PREDICTFUNCRET,
+ *			  XPM_EVENT_MAINEXEC,
+ *			  XPM_EVENT_SECEXEC,
+ *			  XPM_EVENT_LDRSTR,
+ *			  XPM_EVENT_FLOATRENAME }
+ *
+ * XPM_CNTRCFG7		{ XPM_EVENT_NEONRENAME,
+ *			  XPM_EVENT_PLDSTALL,
+ *			  XPM_EVENT_WRITESTALL,
+ *			  XPM_EVENT_INSTRTLBSTALL,
+ *			  XPM_EVENT_DATATLBSTALL,
+ *			  XPM_EVENT_INSTR_uTLBSTALL }
+ *
+ * XPM_CNTRCFG8		{ XPM_EVENT_DATA_uTLBSTALL,
+ *			  XPM_EVENT_DMB_STALL,
+ *			  XPM_EVENT_INT_CLKEN,
+ *			  XPM_EVENT_DE_CLKEN,
+ *			  XPM_EVENT_INSTRISB,
+ *			  XPM_EVENT_INSTRDSB }
+ *
+ * XPM_CNTRCFG9		{ XPM_EVENT_INSTRDMB,
+ *			  XPM_EVENT_EXTINT,
+ *			  XPM_EVENT_PLE_LRC,
+ *			  XPM_EVENT_PLE_LRS,
+ *			  XPM_EVENT_PLE_FLUSH,
+ *			  XPM_EVENT_PLE_CMPL }
+ *
+ * XPM_CNTRCFG10	{ XPM_EVENT_PLE_OVFL,
+ *			  XPM_EVENT_PLE_PROG,
+ *			  XPM_EVENT_PLE_LRC,
+ *			  XPM_EVENT_PLE_LRS,
+ *			  XPM_EVENT_PLE_FLUSH,
+ *			  XPM_EVENT_PLE_CMPL }
+ *
+ * XPM_CNTRCFG11	{ XPM_EVENT_DATASTALL,
+ *			  XPM_EVENT_INSRFETCH_CACHEREFILL,
+ *			  XPM_EVENT_INSTRFECT_TLBREFILL,
+ *			  XPM_EVENT_DATA_CACHEREFILL,
+ *			  XPM_EVENT_DATA_CACHEACCESS,
+ *			  XPM_EVENT_DATA_TLBREFILL }
+ */
+#define XPM_CNTRCFG1	0
+#define XPM_CNTRCFG2	1
+#define XPM_CNTRCFG3	2
+#define XPM_CNTRCFG4	3
+#define XPM_CNTRCFG5	4
+#define XPM_CNTRCFG6	5
+#define XPM_CNTRCFG7	6
+#define XPM_CNTRCFG8	7
+#define XPM_CNTRCFG9	8
+#define XPM_CNTRCFG10	9
+#define XPM_CNTRCFG11	10
+
+/**************************** Type Definitions ******************************/
+
+/***************** Macros (Inline Functions) Definitions ********************/
+
+/************************** Variable Definitions ****************************/
+
+/************************** Function Prototypes *****************************/
+
+/* Interface fuctions to access perfromance counters from abstraction layer */
+void Xpm_SetEvents(s32 PmcrCfg);
+void Xpm_GetEventCounters(u32 *PmCtrValue);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xpseudo_asm.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xpseudo_asm.h
new file mode 100644
index 0000000..1cd8e26
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xpseudo_asm.h
@@ -0,0 +1,54 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xpseudo_asm.h
+*
+* This header file contains macros for using inline assembler code.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 

+*
+******************************************************************************/
+#ifndef XPSEUDO_ASM_H /* prevent circular inclusions */
+#define XPSEUDO_ASM_H /* by using protection macros */
+
+#include "xreg_cortexr5.h"
+#include "xpseudo_asm_gcc.h"
+
+#endif /* XPSEUDO_ASM_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xreg_cortexr5.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xreg_cortexr5.h
new file mode 100644
index 0000000..f21f4ed
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xreg_cortexr5.h
@@ -0,0 +1,445 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xreg_cortexr5.h
+*
+* This header file contains definitions for using inline assembler code. It is
+* written specifically for the GNU, IAR, ARMCC compiler.
+*
+* All of the ARM Cortex R5 GPRs, SPRs, and Debug Registers are defined along
+* with the positions of the bits within the registers.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who      Date     Changes
+* ----- -------- -------- -----------------------------------------------
+* 5.00  pkp  02/10/14 Initial version
+* 

+*
+******************************************************************************/
+#ifndef XREG_CORTEXR5_H	/* prevent circular inclusions */
+#define XREG_CORTEXR5_H	/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* GPRs */
+#define XREG_GPR0				r0
+#define XREG_GPR1				r1
+#define XREG_GPR2				r2
+#define XREG_GPR3				r3
+#define XREG_GPR4				r4
+#define XREG_GPR5				r5
+#define XREG_GPR6				r6
+#define XREG_GPR7				r7
+#define XREG_GPR8				r8
+#define XREG_GPR9				r9
+#define XREG_GPR10				r10
+#define XREG_GPR11				r11
+#define XREG_GPR12				r12
+#define XREG_GPR13				r13
+#define XREG_GPR14				r14
+#define XREG_GPR15				r15
+#define XREG_CPSR				cpsr
+
+/* Coprocessor number defines */
+#define XREG_CP0				0
+#define XREG_CP1				1
+#define XREG_CP2				2
+#define XREG_CP3				3
+#define XREG_CP4				4
+#define XREG_CP5				5
+#define XREG_CP6				6
+#define XREG_CP7				7
+#define XREG_CP8				8
+#define XREG_CP9				9
+#define XREG_CP10				10
+#define XREG_CP11				11
+#define XREG_CP12				12
+#define XREG_CP13				13
+#define XREG_CP14				14
+#define XREG_CP15				15
+
+/* Coprocessor control register defines */
+#define XREG_CR0				cr0
+#define XREG_CR1				cr1
+#define XREG_CR2				cr2
+#define XREG_CR3				cr3
+#define XREG_CR4				cr4
+#define XREG_CR5				cr5
+#define XREG_CR6				cr6
+#define XREG_CR7				cr7
+#define XREG_CR8				cr8
+#define XREG_CR9				cr9
+#define XREG_CR10				cr10
+#define XREG_CR11				cr11
+#define XREG_CR12				cr12
+#define XREG_CR13				cr13
+#define XREG_CR14				cr14
+#define XREG_CR15				cr15
+
+/* Current Processor Status Register (CPSR) Bits */
+#define XREG_CPSR_THUMB_MODE			0x20U
+#define XREG_CPSR_MODE_BITS			0x1FU
+#define XREG_CPSR_SYSTEM_MODE			0x1FU
+#define XREG_CPSR_UNDEFINED_MODE		0x1BU
+#define XREG_CPSR_DATA_ABORT_MODE		0x17U
+#define XREG_CPSR_SVC_MODE			0x13U
+#define XREG_CPSR_IRQ_MODE			0x12U
+#define XREG_CPSR_FIQ_MODE			0x11U
+#define XREG_CPSR_USER_MODE			0x10U
+
+#define XREG_CPSR_IRQ_ENABLE			0x80U
+#define XREG_CPSR_FIQ_ENABLE			0x40U
+
+#define XREG_CPSR_N_BIT				0x80000000U
+#define XREG_CPSR_Z_BIT				0x40000000U
+#define XREG_CPSR_C_BIT				0x20000000U
+#define XREG_CPSR_V_BIT				0x10000000U
+
+/*MPU region definitions*/
+#define REGION_32B     0x00000004U
+#define REGION_64B     0x00000005U
+#define REGION_128B    0x00000006U
+#define REGION_256B    0x00000007U
+#define REGION_512B    0x00000008U
+#define REGION_1K      0x00000009U
+#define REGION_2K      0x0000000AU
+#define REGION_4K      0x0000000BU
+#define REGION_8K      0x0000000CU
+#define REGION_16K     0x0000000DU
+#define REGION_32K     0x0000000EU
+#define REGION_64K     0x0000000FU
+#define REGION_128K    0x00000010U
+#define REGION_256K    0x00000011U
+#define REGION_512K    0x00000012U
+#define REGION_1M      0x00000013U
+#define REGION_2M      0x00000014U
+#define REGION_4M      0x00000015U
+#define REGION_8M      0x00000016U
+#define REGION_16M     0x00000017U
+#define REGION_32M     0x00000018U
+#define REGION_64M     0x00000019U
+#define REGION_128M    0x0000001AU
+#define REGION_256M    0x0000001BU
+#define REGION_512M    0x0000001CU
+#define REGION_1G      0x0000001DU
+#define REGION_2G      0x0000001EU
+#define REGION_4G      0x0000001FU
+
+#define REGION_EN  0x00000001U
+
+
+
+#define SHAREABLE				0x00000004U 	/*shareable */
+#define STRONG_ORDERD_SHARED	0x00000000U	/*strongly ordered, always shareable*/
+
+#define DEVICE_SHARED			0x00000001U	/*device, shareable*/
+#define DEVICE_NONSHARED		0x00000010U	/*device, non shareable*/
+
+#define NORM_NSHARED_WT_NWA		0x00000002U 	/*Outer and Inner write-through, no write-allocate non-shareable*/
+#define NORM_SHARED_WT_NWA		0x00000006U 	/*Outer and Inner write-through, no write-allocate shareable*/
+
+#define NORM_NSHARED_WB_NWA 	0x00000003U 	/*Outer and Inner write-back, no write-allocate non shareable*/
+#define NORM_SHARED_WB_NWA 		0x00000007U 	/*Outer and Inner write-back, no write-allocate shareable*/
+
+#define NORM_NSHARED_NCACHE 	0x00000008U 	/*Outer and Inner Non cacheable  non shareable*/
+#define NORM_SHARED_NCACHE 		0x0000000CU 	/*Outer and Inner Non cacheable shareable*/
+
+#define NORM_NSHARED_WB_WA 		0x0000000BU 	/*Outer and Inner write-back non shared*/
+#define NORM_SHARED_WB_WA 		0x0000000FU 	/*Outer and Inner write-back shared*/
+
+/* inner and outer cache policies can be combined for different combinations */
+
+#define NORM_IN_POLICY_NCACHE	0x00000020U	/*inner non cacheable*/
+#define NORM_IN_POLICY_WB_WA	0x00000021U	/*inner write back write allocate*/
+#define NORM_IN_POLICY_WT_NWA	0x00000022U	/*inner write through no write allocate*/
+#define NORM_IN_POLICY_WB_NWA	0x00000023U	/*inner write back no write allocate*/
+
+#define NORM_OUT_POLICY_NCACHE	0x00000020U	/*outer non cacheable*/
+#define NORM_OUT_POLICY_WB_WA	0x00000028U	/*outer write back write allocate*/
+#define NORM_OUT_POLICY_WT_NWA	0x00000030U	/*outer write through no write allocate*/
+#define NORM_OUT_POLICY_WB_NWA	0x00000038U	/*outer write back no write allocate*/
+
+#define NO_ACCESS				(0x00000000U<<8U)	/*No access*/
+#define PRIV_RW_USER_NA			(0x00000001U<<8U) /*Privileged access only*/
+#define PRIV_RW_USER_RO			(0x00000002U<<8U) /*Writes in User mode generate permission faults*/
+#define	PRIV_RW_USER_RW			(0x00000003U<<8U)	/*Full Access*/
+#define PRIV_RO_USER_NA			(0x00000005U<<8U) /*Privileged eead only*/
+#define PRIV_RO_USER_RO			(0x00000006U<<8U) /*Privileged/User read-only*/
+
+#define EXECUTE_NEVER  			(0x00000001U<<12U)  /* Bit 12*/
+
+
+/* CP15 defines */
+
+/* C0 Register defines */
+#define XREG_CP15_MAIN_ID			"p15, 0, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_TYPE			"p15, 0, %0,  c0,  c0, 1"
+#define XREG_CP15_TCM_TYPE			"p15, 0, %0,  c0,  c0, 2"
+#define XREG_CP15_TLB_TYPE			"p15, 0, %0,  c0,  c0, 3"
+#define XREG_CP15_MPU_TYPE			"p15, 0, %0,  c0,  c0, 4"
+#define XREG_CP15_MULTI_PROC_AFFINITY		"p15, 0, %0,  c0,  c0, 5"
+
+#define XREG_CP15_PROC_FEATURE_0		"p15, 0, %0,  c0,  c1, 0"
+#define XREG_CP15_PROC_FEATURE_1		"p15, 0, %0,  c0,  c1, 1"
+#define XREG_CP15_DEBUG_FEATURE_0		"p15, 0, %0,  c0,  c1, 2"
+#define XREG_CP15_MEMORY_FEATURE_0		"p15, 0, %0,  c0,  c1, 4"
+#define XREG_CP15_MEMORY_FEATURE_1		"p15, 0, %0,  c0,  c1, 5"
+#define XREG_CP15_MEMORY_FEATURE_2		"p15, 0, %0,  c0,  c1, 6"
+#define XREG_CP15_MEMORY_FEATURE_3		"p15, 0, %0,  c0,  c1, 7"
+
+#define XREG_CP15_INST_FEATURE_0		"p15, 0, %0,  c0,  c2, 0"
+#define XREG_CP15_INST_FEATURE_1		"p15, 0, %0,  c0,  c2, 1"
+#define XREG_CP15_INST_FEATURE_2		"p15, 0, %0,  c0,  c2, 2"
+#define XREG_CP15_INST_FEATURE_3		"p15, 0, %0,  c0,  c2, 3"
+#define XREG_CP15_INST_FEATURE_4		"p15, 0, %0,  c0,  c2, 4"
+#define XREG_CP15_INST_FEATURE_5		"p15, 0, %0,  c0,  c2, 5"
+
+#define XREG_CP15_CACHE_SIZE_ID			"p15, 1, %0,  c0,  c0, 0"
+#define XREG_CP15_CACHE_LEVEL_ID		"p15, 1, %0,  c0,  c0, 1"
+#define XREG_CP15_AUXILARY_ID			"p15, 1, %0,  c0,  c0, 7"
+
+#define XREG_CP15_CACHE_SIZE_SEL		"p15, 2, %0,  c0,  c0, 0"
+
+/* C1 Register Defines */
+#define XREG_CP15_SYS_CONTROL			"p15, 0, %0,  c1,  c0, 0"
+#define XREG_CP15_AUX_CONTROL			"p15, 0, %0,  c1,  c0, 1"
+#define XREG_CP15_CP_ACCESS_CONTROL		"p15, 0, %0,  c1,  c0, 2"
+
+
+/* XREG_CP15_CONTROL bit defines */
+#define XREG_CP15_CONTROL_TE_BIT		0x40000000U
+#define XREG_CP15_CONTROL_AFE_BIT		0x20000000U
+#define XREG_CP15_CONTROL_TRE_BIT		0x10000000U
+#define XREG_CP15_CONTROL_NMFI_BIT		0x08000000U
+#define XREG_CP15_CONTROL_EE_BIT		0x02000000U
+#define XREG_CP15_CONTROL_HA_BIT		0x00020000U
+#define XREG_CP15_CONTROL_RR_BIT		0x00004000U
+#define XREG_CP15_CONTROL_V_BIT			0x00002000U
+#define XREG_CP15_CONTROL_I_BIT			0x00001000U
+#define XREG_CP15_CONTROL_Z_BIT			0x00000800U
+#define XREG_CP15_CONTROL_SW_BIT		0x00000400U
+#define XREG_CP15_CONTROL_B_BIT			0x00000080U
+#define XREG_CP15_CONTROL_C_BIT			0x00000004U
+#define XREG_CP15_CONTROL_A_BIT			0x00000002U
+#define XREG_CP15_CONTROL_M_BIT			0x00000001U
+/* C2 Register Defines */
+/* Not Used */
+
+/* C3 Register Defines */
+/* Not Used */
+
+/* C4 Register Defines */
+/* Not Used */
+
+/* C5 Register Defines */
+#define XREG_CP15_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 0"
+#define XREG_CP15_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c0, 1"
+
+#define XREG_CP15_AUX_DATA_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 0"
+#define XREG_CP15_AUX_INST_FAULT_STATUS		"p15, 0, %0,  c5,  c1, 1"
+
+/* C6 Register Defines */
+#define XREG_CP15_DATA_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 0"
+#define XREG_CP15_INST_FAULT_ADDRESS		"p15, 0, %0,  c6,  c0, 2"
+
+#define XREG_CP15_MPU_REG_BASEADDR			"p15, 0, %0,  c6,  c1, 0"
+#define XREG_CP15_MPU_REG_SIZE_EN			"p15, 0, %0,  c6,  c1, 2"
+#define XREG_CP15_MPU_REG_ACCESS_CTRL		"p15, 0, %0,  c6,  c1, 4"
+
+#define XREG_CP15_MPU_MEMORY_REG_NUMBER			"p15, 0, %0,  c6,  c2, 0"
+
+/* C7 Register Defines */
+#define XREG_CP15_NOP				"p15, 0, %0,  c7,  c0, 4"
+
+#define XREG_CP15_INVAL_IC_POU			"p15, 0, %0,  c7,  c5, 0"
+#define XREG_CP15_INVAL_IC_LINE_MVA_POU		"p15, 0, %0,  c7,  c5, 1"
+
+/* The CP15 register access below has been deprecated in favor of the new
+ * isb instruction in Cortex R5.
+ */
+#define XREG_CP15_INST_SYNC_BARRIER		"p15, 0, %0,  c7,  c5, 4"
+#define XREG_CP15_INVAL_BRANCH_ARRAY		"p15, 0, %0,  c7,  c5, 6"
+#define XREG_CP15_INVAL_BRANCH_ARRAY_LINE		"p15, 0, %0,  c7,  c5, 7"
+
+#define XREG_CP15_INVAL_DC_LINE_MVA_POC		"p15, 0, %0,  c7,  c6, 1"
+#define XREG_CP15_INVAL_DC_LINE_SW		"p15, 0, %0,  c7,  c6, 2"
+
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POC		"p15, 0, %0,  c7, c10, 1"
+#define XREG_CP15_CLEAN_DC_LINE_SW		"p15, 0, %0,  c7, c10, 2"
+
+#define XREG_CP15_INVAL_DC_ALL		"p15, 0, %0,  c15, c5, 0"
+/* The next two CP15 register accesses below have been deprecated in favor
+ * of the new dsb and dmb instructions in Cortex R5.
+ */
+#define XREG_CP15_DATA_SYNC_BARRIER		"p15, 0, %0,  c7, c10, 4"
+#define XREG_CP15_DATA_MEMORY_BARRIER		"p15, 0, %0,  c7, c10, 5"
+
+#define XREG_CP15_CLEAN_DC_LINE_MVA_POU		"p15, 0, %0,  c7, c11, 1"
+
+#define XREG_CP15_NOP2				"p15, 0, %0,  c7, c13, 1"
+
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC	"p15, 0, %0,  c7, c14, 1"
+#define XREG_CP15_CLEAN_INVAL_DC_LINE_SW	"p15, 0, %0,  c7, c14, 2"
+
+/* C8 Register Defines */
+/* Not Used */
+
+
+/* C9 Register Defines */
+
+#define XREG_CP15_ATCM_REG_SIZE_ADDR		"p15, 0, %0,  c9, c1, 1"
+#define XREG_CP15_BTCM_REG_SIZE_ADDR		"p15, 0, %0,  c9, c1, 0"
+#define XREG_CP15_TCM_SELECTION				"p15, 0, %0,  c9, c2, 0"
+
+#define XREG_CP15_PERF_MONITOR_CTRL		"p15, 0, %0,  c9, c12, 0"
+#define XREG_CP15_COUNT_ENABLE_SET		"p15, 0, %0,  c9, c12, 1"
+#define XREG_CP15_COUNT_ENABLE_CLR		"p15, 0, %0,  c9, c12, 2"
+#define XREG_CP15_V_FLAG_STATUS			"p15, 0, %0,  c9, c12, 3"
+#define XREG_CP15_SW_INC			"p15, 0, %0,  c9, c12, 4"
+#define XREG_CP15_EVENT_CNTR_SEL		"p15, 0, %0,  c9, c12, 5"
+
+#define XREG_CP15_PERF_CYCLE_COUNTER		"p15, 0, %0,  c9, c13, 0"
+#define XREG_CP15_EVENT_TYPE_SEL		"p15, 0, %0,  c9, c13, 1"
+#define XREG_CP15_PERF_MONITOR_COUNT		"p15, 0, %0,  c9, c13, 2"
+
+#define XREG_CP15_USER_ENABLE			"p15, 0, %0,  c9, c14, 0"
+#define XREG_CP15_INTR_ENABLE_SET		"p15, 0, %0,  c9, c14, 1"
+#define XREG_CP15_INTR_ENABLE_CLR		"p15, 0, %0,  c9, c14, 2"
+
+/* C10 Register Defines */
+/* Not used */
+
+/* C11 Register Defines */
+/* Not used */
+
+/* C12 Register Defines */
+/* Not used */
+
+/* C13 Register Defines */
+#define XREG_CP15_CONTEXT_ID			"p15, 0, %0, c13,  c0, 1"
+#define USER_RW_THREAD_PID			"p15, 0, %0, c13,  c0, 2"
+#define USER_RO_THREAD_PID			"p15, 0, %0, c13,  c0, 3"
+#define USER_PRIV_THREAD_PID			"p15, 0, %0, c13,  c0, 4"
+
+/* C14 Register Defines */
+/* not used */
+
+/* C15 Register Defines */
+#define XREG_CP15_SEC_AUX_CTRL			"p15, 0, %0, c15,  c0, 0"
+
+
+
+
+/* MPE register definitions */
+#define XREG_FPSID				c0
+#define XREG_FPSCR				c1
+#define XREG_MVFR1				c6
+#define XREG_MVFR0				c7
+#define XREG_FPEXC				c8
+#define XREG_FPINST				c9
+#define XREG_FPINST2			c10
+
+/* FPSID bits */
+#define XREG_FPSID_IMPLEMENTER_BIT	(24U)
+#define XREG_FPSID_IMPLEMENTER_MASK	(0x000000FFU << FPSID_IMPLEMENTER_BIT)
+#define XREG_FPSID_SOFTWARE		(0X00000001U << 23U)
+#define XREG_FPSID_ARCH_BIT		(16U)
+#define XREG_FPSID_ARCH_MASK		(0x0000000FU  << FPSID_ARCH_BIT)
+#define XREG_FPSID_PART_BIT		(8U)
+#define XREG_FPSID_PART_MASK		(0x000000FFU << FPSID_PART_BIT)
+#define XREG_FPSID_VARIANT_BIT		(4U)
+#define XREG_FPSID_VARIANT_MASK		(0x0000000FU  << FPSID_VARIANT_BIT)
+#define XREG_FPSID_REV_BIT		(0U)
+#define XREG_FPSID_REV_MASK		(0x0000000FU  << FPSID_REV_BIT)
+
+/* FPSCR bits */
+#define XREG_FPSCR_N_BIT		(0X00000001U << 31U)
+#define XREG_FPSCR_Z_BIT		(0X00000001U << 30U)
+#define XREG_FPSCR_C_BIT		(0X00000001U << 29U)
+#define XREG_FPSCR_V_BIT		(0X00000001U << 28U)
+#define XREG_FPSCR_QC			(0X00000001U << 27U)
+#define XREG_FPSCR_AHP			(0X00000001U << 26U)
+#define XREG_FPSCR_DEFAULT_NAN		(0X00000001U << 25U)
+#define XREG_FPSCR_FLUSHTOZERO		(0X00000001U << 24U)
+#define XREG_FPSCR_ROUND_NEAREST	(0X00000000U << 22U)
+#define XREG_FPSCR_ROUND_PLUSINF	(0X00000001U << 22U)
+#define XREG_FPSCR_ROUND_MINUSINF	(0X00000002U << 22U)
+#define XREG_FPSCR_ROUND_TOZERO		(0X00000003U << 22U)
+#define XREG_FPSCR_RMODE_BIT		(22U)
+#define XREG_FPSCR_RMODE_MASK		(0X00000003U << FPSCR_RMODE_BIT)
+#define XREG_FPSCR_STRIDE_BIT		(20U)
+#define XREG_FPSCR_STRIDE_MASK		(0X00000003U << FPSCR_STRIDE_BIT)
+#define XREG_FPSCR_LENGTH_BIT		(16U)
+#define XREG_FPSCR_LENGTH_MASK		(0X00000007U << FPSCR_LENGTH_BIT)
+#define XREG_FPSCR_IDC			(0X00000001U << 7U)
+#define XREG_FPSCR_IXC			(0X00000001U << 4U)
+#define XREG_FPSCR_UFC			(0X00000001U << 3U)
+#define XREG_FPSCR_OFC			(0X00000001U << 2U)
+#define XREG_FPSCR_DZC			(0X00000001U << 1U)
+#define XREG_FPSCR_IOC			(0X00000001U << 0U)
+
+/* MVFR0 bits */
+#define XREG_MVFR0_RMODE_BIT		(28U)
+#define XREG_MVFR0_RMODE_MASK		(0x0000000FU << XREG_MVFR0_RMODE_BIT)
+#define XREG_MVFR0_SHORT_VEC_BIT	(24U)
+#define XREG_MVFR0_SHORT_VEC_MASK	(0x0000000FU << XREG_MVFR0_SHORT_VEC_BIT)
+#define XREG_MVFR0_SQRT_BIT		(20U)
+#define XREG_MVFR0_SQRT_MASK		(0x0000000FU << XREG_MVFR0_SQRT_BIT)
+#define XREG_MVFR0_DIVIDE_BIT		(16U)
+#define XREG_MVFR0_DIVIDE_MASK		(0x0000000FU << XREG_MVFR0_DIVIDE_BIT)
+#define XREG_MVFR0_EXEC_TRAP_BIT	(12U)
+#define XREG_MVFR0_EXEC_TRAP_MASK	(0x0000000FU << XREG_MVFR0_EXEC_TRAP_BIT)
+#define XREG_MVFR0_DP_BIT		(8U)
+#define XREG_MVFR0_DP_MASK		(0x0000000FU << XREG_MVFR0_DP_BIT)
+#define XREG_MVFR0_SP_BIT		(4U)
+#define XREG_MVFR0_SP_MASK		(0x0000000FU << XREG_MVFR0_SP_BIT)
+#define XREG_MVFR0_A_SIMD_BIT		(0U)
+#define XREG_MVFR0_A_SIMD_MASK		(0x0000000FU << MVFR0_A_SIMD_BIT)
+
+/* FPEXC bits */
+#define XREG_FPEXC_EX			(0X00000001U << 31U)
+#define XREG_FPEXC_EN			(0X00000001U << 30U)
+#define XREG_FPEXC_DEX			(0X00000001U << 29U)
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XREG_CORTEXR5_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xstatus.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xstatus.h
new file mode 100644
index 0000000..9c6e16e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xstatus.h
@@ -0,0 +1,535 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xstatus.h
+*
+* @addtogroup common_status_codes Xilinx® software status codes
+*
+* The xstatus.h file contains the Xilinx® software status codes.These codes are
+* used throughout the Xilinx device drivers.
+*
+* @{
+******************************************************************************/
+
+#ifndef XSTATUS_H		/* prevent circular inclusions */
+#define XSTATUS_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+
+/************************** Constant Definitions *****************************/
+
+/*********************** Common statuses 0 - 500 *****************************/
+/**
+@name Common Status Codes for All Device Drivers
+@{
+*/
+#define XST_SUCCESS                     0L
+#define XST_FAILURE                     1L
+#define XST_DEVICE_NOT_FOUND            2L
+#define XST_DEVICE_BLOCK_NOT_FOUND      3L
+#define XST_INVALID_VERSION             4L
+#define XST_DEVICE_IS_STARTED           5L
+#define XST_DEVICE_IS_STOPPED           6L
+#define XST_FIFO_ERROR                  7L	/*!< An error occurred during an
+						   operation with a FIFO such as
+						   an underrun or overrun, this
+						   error requires the device to
+						   be reset */
+#define XST_RESET_ERROR                 8L	/*!< An error occurred which requires
+						   the device to be reset */
+#define XST_DMA_ERROR                   9L	/*!< A DMA error occurred, this error
+						   typically requires the device
+						   using the DMA to be reset */
+#define XST_NOT_POLLED                  10L	/*!< The device is not configured for
+						   polled mode operation */
+#define XST_FIFO_NO_ROOM                11L	/*!< A FIFO did not have room to put
+						   the specified data into */
+#define XST_BUFFER_TOO_SMALL            12L	/*!< The buffer is not large enough
+						   to hold the expected data */
+#define XST_NO_DATA                     13L	/*!< There was no data available */
+#define XST_REGISTER_ERROR              14L	/*!< A register did not contain the
+						   expected value */
+#define XST_INVALID_PARAM               15L	/*!< An invalid parameter was passed
+						   into the function */
+#define XST_NOT_SGDMA                   16L	/*!< The device is not configured for
+						   scatter-gather DMA operation */
+#define XST_LOOPBACK_ERROR              17L	/*!< A loopback test failed */
+#define XST_NO_CALLBACK                 18L	/*!< A callback has not yet been
+						   registered */
+#define XST_NO_FEATURE                  19L	/*!< Device is not configured with
+						   the requested feature */
+#define XST_NOT_INTERRUPT               20L	/*!< Device is not configured for
+						   interrupt mode operation */
+#define XST_DEVICE_BUSY                 21L	/*!< Device is busy */
+#define XST_ERROR_COUNT_MAX             22L	/*!< The error counters of a device
+						   have maxed out */
+#define XST_IS_STARTED                  23L	/*!< Used when part of device is
+						   already started i.e.
+						   sub channel */
+#define XST_IS_STOPPED                  24L	/*!< Used when part of device is
+						   already stopped i.e.
+						   sub channel */
+#define XST_DATA_LOST                   26L	/*!< Driver defined error */
+#define XST_RECV_ERROR                  27L	/*!< Generic receive error */
+#define XST_SEND_ERROR                  28L	/*!< Generic transmit error */
+#define XST_NOT_ENABLED                 29L	/*!< A requested service is not
+						   available because it has not
+						   been enabled */
+/** @} */
+/***************** Utility Component statuses 401 - 500  *********************/
+/**
+@name Utility Component Status Codes 401 - 500
+@{
+*/
+#define XST_MEMTEST_FAILED              401L	/*!< Memory test failed */
+
+/** @} */
+/***************** Common Components statuses 501 - 1000 *********************/
+/**
+@name Packet Fifo Status Codes 501 - 510
+@{
+*/
+/********************* Packet Fifo statuses 501 - 510 ************************/
+
+#define XST_PFIFO_LACK_OF_DATA          501L	/*!< Not enough data in FIFO   */
+#define XST_PFIFO_NO_ROOM               502L	/*!< Not enough room in FIFO   */
+#define XST_PFIFO_BAD_REG_VALUE         503L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_PFIFO_ERROR                 504L	/*!< Generic packet FIFO error */
+#define XST_PFIFO_DEADLOCK              505L	/*!< Packet FIFO is reporting
+						 * empty and full simultaneously
+						 */
+/** @} */
+/**
+@name DMA Status Codes 511 - 530
+@{
+*/
+/************************** DMA statuses 511 - 530 ***************************/
+
+#define XST_DMA_TRANSFER_ERROR          511L	/*!< Self test, DMA transfer
+						   failed */
+#define XST_DMA_RESET_REGISTER_ERROR    512L	/*!< Self test, a register value
+						   was invalid after reset */
+#define XST_DMA_SG_LIST_EMPTY           513L	/*!< Scatter gather list contains
+						   no buffer descriptors ready
+						   to be processed */
+#define XST_DMA_SG_IS_STARTED           514L	/*!< Scatter gather not stopped */
+#define XST_DMA_SG_IS_STOPPED           515L	/*!< Scatter gather not running */
+#define XST_DMA_SG_LIST_FULL            517L	/*!< All the buffer desciptors of
+						   the scatter gather list are
+						   being used */
+#define XST_DMA_SG_BD_LOCKED            518L	/*!< The scatter gather buffer
+						   descriptor which is to be
+						   copied over in the scatter
+						   list is locked */
+#define XST_DMA_SG_NOTHING_TO_COMMIT    519L	/*!< No buffer descriptors have been
+						   put into the scatter gather
+						   list to be commited */
+#define XST_DMA_SG_COUNT_EXCEEDED       521L	/*!< The packet count threshold
+						   specified was larger than the
+						   total # of buffer descriptors
+						   in the scatter gather list */
+#define XST_DMA_SG_LIST_EXISTS          522L	/*!< The scatter gather list has
+						   already been created */
+#define XST_DMA_SG_NO_LIST              523L	/*!< No scatter gather list has
+						   been created */
+#define XST_DMA_SG_BD_NOT_COMMITTED     524L	/*!< The buffer descriptor which was
+						   being started was not committed
+						   to the list */
+#define XST_DMA_SG_NO_DATA              525L	/*!< The buffer descriptor to start
+						   has already been used by the
+						   hardware so it can't be reused
+						 */
+#define XST_DMA_SG_LIST_ERROR           526L	/*!< General purpose list access
+						   error */
+#define XST_DMA_BD_ERROR                527L	/*!< General buffer descriptor
+						   error */
+/** @} */
+/**
+@name IPIF Status Codes Codes 531 - 550
+@{
+*/
+/************************** IPIF statuses 531 - 550 ***************************/
+
+#define XST_IPIF_REG_WIDTH_ERROR        531L	/*!< An invalid register width
+						   was passed into the function */
+#define XST_IPIF_RESET_REGISTER_ERROR   532L	/*!< The value of a register at
+						   reset was not valid */
+#define XST_IPIF_DEVICE_STATUS_ERROR    533L	/*!< A write to the device interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_DEVICE_ACK_ERROR       534L	/*!< The device interrupt status
+						   register did not reset when
+						   acked */
+#define XST_IPIF_DEVICE_ENABLE_ERROR    535L	/*!< The device interrupt enable
+						   register was not updated when
+						   other registers changed */
+#define XST_IPIF_IP_STATUS_ERROR        536L	/*!< A write to the IP interrupt
+						   status register did not read
+						   back correctly */
+#define XST_IPIF_IP_ACK_ERROR           537L	/*!< The IP interrupt status register
+						   did not reset when acked */
+#define XST_IPIF_IP_ENABLE_ERROR        538L	/*!< IP interrupt enable register was
+						   not updated correctly when other
+						   registers changed */
+#define XST_IPIF_DEVICE_PENDING_ERROR   539L	/*!< The device interrupt pending
+						   register did not indicate the
+						   expected value */
+#define XST_IPIF_DEVICE_ID_ERROR        540L	/*!< The device interrupt ID register
+						   did not indicate the expected
+						   value */
+#define XST_IPIF_ERROR                  541L	/*!< Generic ipif error */
+/** @} */
+
+/****************** Device specific statuses 1001 - 4095 *********************/
+/**
+@name Ethernet Status Codes 1001 - 1050
+@{
+*/
+/********************* Ethernet statuses 1001 - 1050 *************************/
+
+#define XST_EMAC_MEMORY_SIZE_ERROR  1001L	/*!< Memory space is not big enough
+						 * to hold the minimum number of
+						 * buffers or descriptors */
+#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L	/*!< Memory allocation failed */
+#define XST_EMAC_MII_READ_ERROR     1003L	/*!< MII read error */
+#define XST_EMAC_MII_BUSY           1004L	/*!< An MII operation is in progress */
+#define XST_EMAC_OUT_OF_BUFFERS     1005L	/*!< Driver is out of buffers */
+#define XST_EMAC_PARSE_ERROR        1006L	/*!< Invalid driver init string */
+#define XST_EMAC_COLLISION_ERROR    1007L	/*!< Excess deferral or late
+						 * collision on polled send */
+/** @} */
+/**
+@name UART Status Codes 1051 - 1075
+@{
+*/
+/*********************** UART statuses 1051 - 1075 ***************************/
+#define XST_UART
+
+#define XST_UART_INIT_ERROR         1051L
+#define XST_UART_START_ERROR        1052L
+#define XST_UART_CONFIG_ERROR       1053L
+#define XST_UART_TEST_FAIL          1054L
+#define XST_UART_BAUD_ERROR         1055L
+#define XST_UART_BAUD_RANGE         1056L
+
+/** @} */
+/**
+@name IIC Status Codes 1076 - 1100
+@{
+*/
+/************************ IIC statuses 1076 - 1100 ***************************/
+
+#define XST_IIC_SELFTEST_FAILED         1076	/*!< self test failed            */
+#define XST_IIC_BUS_BUSY                1077	/*!< bus found busy              */
+#define XST_IIC_GENERAL_CALL_ADDRESS    1078	/*!< mastersend attempted with   */
+					     /* general call address        */
+#define XST_IIC_STAND_REG_RESET_ERROR   1079	/*!< A non parameterizable reg   */
+					     /* value after reset not valid */
+#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080	/*!< Tx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081	/*!< Rx fifo included in design  */
+					     /* value after reset not valid */
+#define XST_IIC_TBA_REG_RESET_ERROR     1082	/*!< 10 bit addr incl in design  */
+					     /* value after reset not valid */
+#define XST_IIC_CR_READBACK_ERROR       1083	/*!< Read of the control register */
+					     /* didn't return value written */
+#define XST_IIC_DTR_READBACK_ERROR      1084	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_DRR_READBACK_ERROR      1085	/*!< Read of the data Receive reg */
+					     /* didn't return value written */
+#define XST_IIC_ADR_READBACK_ERROR      1086	/*!< Read of the data Tx reg     */
+					     /* didn't return value written */
+#define XST_IIC_TBA_READBACK_ERROR      1087	/*!< Read of the 10 bit addr reg */
+					     /* didn't return written value */
+#define XST_IIC_NOT_SLAVE               1088	/*!< The device isn't a slave    */
+/** @} */
+/**
+@name ATMC Status Codes 1101 - 1125
+@{
+*/
+/*********************** ATMC statuses 1101 - 1125 ***************************/
+
+#define XST_ATMC_ERROR_COUNT_MAX    1101L	/*!< the error counters in the ATM
+						   controller hit the max value
+						   which requires the statistics
+						   to be cleared */
+/** @} */
+/**
+@name Flash Status Codes 1126 - 1150
+@{
+*/
+/*********************** Flash statuses 1126 - 1150 **************************/
+
+#define XST_FLASH_BUSY                1126L	/*!< Flash is erasing or programming
+						 */
+#define XST_FLASH_READY               1127L	/*!< Flash is ready for commands */
+#define XST_FLASH_ERROR               1128L	/*!< Flash had detected an internal
+						   error. Use XFlash_DeviceControl
+						   to retrieve device specific codes
+						 */
+#define XST_FLASH_ERASE_SUSPENDED     1129L	/*!< Flash is in suspended erase state
+						 */
+#define XST_FLASH_WRITE_SUSPENDED     1130L	/*!< Flash is in suspended write state
+						 */
+#define XST_FLASH_PART_NOT_SUPPORTED  1131L	/*!< Flash type not supported by
+						   driver */
+#define XST_FLASH_NOT_SUPPORTED       1132L	/*!< Operation not supported */
+#define XST_FLASH_TOO_MANY_REGIONS    1133L	/*!< Too many erase regions */
+#define XST_FLASH_TIMEOUT_ERROR       1134L	/*!< Programming or erase operation
+						   aborted due to a timeout */
+#define XST_FLASH_ADDRESS_ERROR       1135L	/*!< Accessed flash outside its
+						   addressible range */
+#define XST_FLASH_ALIGNMENT_ERROR     1136L	/*!< Write alignment error */
+#define XST_FLASH_BLOCKING_CALL_ERROR 1137L	/*!< Couldn't return immediately from
+						   write/erase function with
+						   XFL_NON_BLOCKING_WRITE/ERASE
+						   option cleared */
+#define XST_FLASH_CFI_QUERY_ERROR     1138L	/*!< Failed to query the device */
+/** @} */
+/**
+@name SPI Status Codes 1151 - 1175
+@{
+*/
+/*********************** SPI statuses 1151 - 1175 ****************************/
+
+#define XST_SPI_MODE_FAULT          1151	/*!< master was selected as slave */
+#define XST_SPI_TRANSFER_DONE       1152	/*!< data transfer is complete */
+#define XST_SPI_TRANSMIT_UNDERRUN   1153	/*!< slave underruns transmit register */
+#define XST_SPI_RECEIVE_OVERRUN     1154	/*!< device overruns receive register */
+#define XST_SPI_NO_SLAVE            1155	/*!< no slave has been selected yet */
+#define XST_SPI_TOO_MANY_SLAVES     1156	/*!< more than one slave is being
+						 * selected */
+#define XST_SPI_NOT_MASTER          1157	/*!< operation is valid only as master */
+#define XST_SPI_SLAVE_ONLY          1158	/*!< device is configured as slave-only
+						 */
+#define XST_SPI_SLAVE_MODE_FAULT    1159	/*!< slave was selected while disabled */
+#define XST_SPI_SLAVE_MODE          1160	/*!< device has been addressed as slave */
+#define XST_SPI_RECEIVE_NOT_EMPTY   1161	/*!< device received data in slave mode */
+
+#define XST_SPI_COMMAND_ERROR       1162	/*!< unrecognised command - qspi only */
+#define XST_SPI_POLL_DONE           1163        /*!< controller completed polling the
+						   device for status */
+/** @} */
+/**
+@name OPB Arbiter Status Codes 1176 - 1200
+@{
+*/
+/********************** OPB Arbiter statuses 1176 - 1200 *********************/
+
+#define XST_OPBARB_INVALID_PRIORITY  1176	/*!< the priority registers have either
+						 * one master assigned to two or more
+						 * priorities, or one master not
+						 * assigned to any priority
+						 */
+#define XST_OPBARB_NOT_SUSPENDED     1177	/*!< an attempt was made to modify the
+						 * priority levels without first
+						 * suspending the use of priority
+						 * levels
+						 */
+#define XST_OPBARB_PARK_NOT_ENABLED  1178	/*!< bus parking by id was enabled but
+						 * bus parking was not enabled
+						 */
+#define XST_OPBARB_NOT_FIXED_PRIORITY 1179	/*!< the arbiter must be in fixed
+						 * priority mode to allow the
+						 * priorities to be changed
+						 */
+/** @} */
+/**
+@name INTC Status Codes 1201 - 1225
+@{
+*/
+/************************ Intc statuses 1201 - 1225 **************************/
+
+#define XST_INTC_FAIL_SELFTEST      1201	/*!< self test failed */
+#define XST_INTC_CONNECT_ERROR      1202	/*!< interrupt already in use */
+/** @} */
+/**
+@name TmrCtr Status Codes 1226 - 1250
+@{
+*/
+/********************** TmrCtr statuses 1226 - 1250 **************************/
+
+#define XST_TMRCTR_TIMER_FAILED     1226	/*!< self test failed */
+/** @} */
+/**
+@name WdtTb Status Codes 1251 - 1275
+@{
+*/
+/********************** WdtTb statuses 1251 - 1275 ***************************/
+
+#define XST_WDTTB_TIMER_FAILED      1251L
+/** @} */
+/**
+@name PlbArb status Codes 1276 - 1300
+@{
+*/
+/********************** PlbArb statuses 1276 - 1300 **************************/
+
+#define XST_PLBARB_FAIL_SELFTEST    1276L
+/** @} */
+/**
+@name Plb2Opb Status Codes 1301 - 1325
+@{
+*/
+/********************** Plb2Opb statuses 1301 - 1325 *************************/
+
+#define XST_PLB2OPB_FAIL_SELFTEST   1301L
+/** @} */
+/**
+@name Opb2Plb Status 1326 - 1350
+@{
+*/
+/********************** Opb2Plb statuses 1326 - 1350 *************************/
+
+#define XST_OPB2PLB_FAIL_SELFTEST   1326L
+/** @} */
+/**
+@name SysAce Status Codes 1351 - 1360
+@{
+*/
+/********************** SysAce statuses 1351 - 1360 **************************/
+
+#define XST_SYSACE_NO_LOCK          1351L	/*!< No MPU lock has been granted */
+/** @} */
+/**
+@name PCI Bridge Status Codes 1361 - 1375
+@{
+*/
+/********************** PCI Bridge statuses 1361 - 1375 **********************/
+
+#define XST_PCI_INVALID_ADDRESS     1361L
+/** @} */
+/**
+@name FlexRay Constants 1400 - 1409
+@{
+*/
+/********************** FlexRay constants 1400 - 1409 *************************/
+
+#define XST_FR_TX_ERROR			1400
+#define XST_FR_TX_BUSY			1401
+#define XST_FR_BUF_LOCKED		1402
+#define XST_FR_NO_BUF			1403
+/** @} */
+/**
+@name USB constants 1410 - 1420
+@{
+*/
+/****************** USB constants 1410 - 1420  *******************************/
+
+#define XST_USB_ALREADY_CONFIGURED	1410
+#define XST_USB_BUF_ALIGN_ERROR		1411
+#define XST_USB_NO_DESC_AVAILABLE	1412
+#define XST_USB_BUF_TOO_BIG		1413
+#define XST_USB_NO_BUF			1414
+/** @} */
+/**
+@name HWICAP constants 1421 - 1429
+@{
+*/
+/****************** HWICAP constants 1421 - 1429  *****************************/
+
+#define XST_HWICAP_WRITE_DONE		1421
+
+/** @} */
+/**
+@name AXI VDMA constants 1430 - 1440
+@{
+*/
+/****************** AXI VDMA constants 1430 - 1440  *****************************/
+
+#define XST_VDMA_MISMATCH_ERROR		1430
+/** @} */
+/**
+@name NAND Flash Status Codes 1441 - 1459
+@{
+*/
+/*********************** NAND Flash statuses 1441 - 1459  *********************/
+
+#define XST_NAND_BUSY			1441L	/*!< Flash is erasing or
+						 * programming
+						 */
+#define XST_NAND_READY			1442L	/*!< Flash is ready for commands
+						 */
+#define XST_NAND_ERROR			1443L	/*!< Flash had detected an
+						 * internal error.
+						 */
+#define XST_NAND_PART_NOT_SUPPORTED	1444L	/*!< Flash type not supported by
+						 * driver
+						 */
+#define XST_NAND_OPT_NOT_SUPPORTED	1445L	/*!< Operation not supported
+						 */
+#define XST_NAND_TIMEOUT_ERROR		1446L	/*!< Programming or erase
+						 * operation aborted due to a
+						 * timeout
+						 */
+#define XST_NAND_ADDRESS_ERROR		1447L	/*!< Accessed flash outside its
+						 * addressible range
+						 */
+#define XST_NAND_ALIGNMENT_ERROR	1448L	/*!< Write alignment error
+						 */
+#define XST_NAND_PARAM_PAGE_ERROR	1449L	/*!< Failed to read parameter
+						 * page of the device
+						 */
+#define XST_NAND_CACHE_ERROR		1450L	/*!< Flash page buffer error
+						 */
+
+#define XST_NAND_WRITE_PROTECTED	1451L	/*!< Flash is write protected
+						 */
+/** @} */
+
+/**************************** Type Definitions *******************************/
+
+typedef s32 XStatus;
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
+/**
+* @} End of "addtogroup common_status_codes".
+*/
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xtime_l.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xtime_l.c
new file mode 100644
index 0000000..1c36394
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xtime_l.c
@@ -0,0 +1,99 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.c
+*
+* This file contains low level functions to get/set time from the Global Timer
+* register in the ARM Cortex R5 core.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.00 	pkp  08/29/14 First release
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+/***************************** Include Files *********************************/
+
+#include "xtime_l.h"
+#include "xpseudo_asm.h"
+#include "xil_assert.h"
+#include "xil_io.h"
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/**************************** Type Definitions *******************************/
+
+/************************** Constant Definitions *****************************/
+
+/************************** Variable Definitions *****************************/
+
+/************************** Function Prototypes ******************************/
+
+/****************************************************************************
+*
+* Set the time in the Global Timer Counter Register.
+*
+* @param	Value to be written to the Global Timer Counter Register.
+*
+* @return	None.
+*
+* @note		In multiprocessor environment reference time will reset/lost for
+*		all processors, when this function called by any one processor.
+*
+****************************************************************************/
+void XTime_SetTime(XTime Xtime_Global)
+{
+
+
+}
+
+/****************************************************************************
+*
+* Get the time from the Global Timer Counter Register.
+*
+* @param	Pointer to the location to be updated with the time.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+void XTime_GetTime(XTime *Xtime_Global)
+{
+	*Xtime_Global = Xil_In32(TTC3_BASEADDR+0x00000018U);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xtime_l.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xtime_l.h
new file mode 100644
index 0000000..280593c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/cortexr5/xtime_l.h
@@ -0,0 +1,76 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xtime_l.h
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ---------------------------------------------------
+* 5.00 	pkp	   05/29/14 First release
+* 

+*
+* @note		None.
+*
+******************************************************************************/
+
+#ifndef XTIME_H /* prevent circular inclusions */
+#define XTIME_H /* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xparameters.h"
+/***************** Macros (Inline Functions) Definitions *********************/
+
+/************************** Constant Definitions *****************************/
+
+#define COUNTS_PER_SECOND          0x0005F5E1U
+
+#define TTC3_BASEADDR 0xFF140000U
+/**************************** Type Definitions *******************************/
+
+typedef u32 XTime;
+
+void XTime_SetTime(XTime Xtime_Global);
+void XTime_GetTime(XTime *Xtime_Global);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* XTIME_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/_exit.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/_exit.c
new file mode 100644
index 0000000..53b3dfd
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/_exit.c
@@ -0,0 +1,46 @@
+/******************************************************************************
+*
+* Copyright (C) 2012 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include 
+#include "xil_types.h"
+void _exit (sint32 status);
+
+/* _exit - Simple implementation. Does not return.
+*/
+void _exit (sint32 status)
+{
+  (void) status;
+  while (1)
+    {
+		;
+    }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/errno.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/errno.c
new file mode 100644
index 0000000..1599ce0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/errno.c
@@ -0,0 +1,14 @@
+/* The errno variable is stored in the reentrancy structure.  This
+   function returns its address for use by the macro errno defined in
+   errno.h.  */
+
+#include 
+#include 
+#include "xil_types.h"
+sint32 * __errno (void);
+
+sint32 *
+__errno (void)
+{
+  return &_REENT->_errno;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/fcntl.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/fcntl.c
new file mode 100644
index 0000000..2c6f788
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/fcntl.c
@@ -0,0 +1,15 @@
+#include 
+#include "xil_types.h"
+sint32 fcntl (sint32 fd, sint32 cmd, sint32 arg);
+
+/*
+ * fcntl -- Manipulate a file descriptor.
+ *          We don't have a filesystem, so we do nothing.
+ */
+sint32 fcntl (sint32 fd, sint32 cmd, sint32 arg)
+{
+  (void) fd;
+  (void) cmd;
+  (void) arg;
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/fsl.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/fsl.h
new file mode 100644
index 0000000..d30bd17
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/fsl.h
@@ -0,0 +1,47 @@
+#ifndef FSL_H
+#define FSL_H
+
+#include "mb_interface.h"       /* Legacy reasons. We just have to include this guy who defines the FSL stuff */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Extended FSL macros. These now replace all of the previous FSL macros */
+#define FSL_DEFAULT
+#define FSL_NONBLOCKING                          n
+#define FSL_EXCEPTION                            e
+#define FSL_CONTROL                              c
+#define FSL_ATOMIC                               a
+
+#define FSL_NONBLOCKING_EXCEPTION                ne
+#define FSL_NONBLOCKING_CONTROL                  nc
+#define FSL_NONBLOCKING_ATOMIC                   na
+#define FSL_EXCEPTION_CONTROL                    ec
+#define FSL_EXCEPTION_ATOMIC                     ea
+#define FSL_CONTROL_ATOMIC                       ca
+
+#define FSL_NONBLOCKING_EXCEPTION_CONTROL        nec
+#define FSL_NONBLOCKING_EXCEPTION_ATOMIC         nea
+#define FSL_NONBLOCKING_CONTROL_ATOMIC           nca
+#define FSL_EXCEPTION_CONTROL_ATOMIC             eca
+
+#define FSL_NONBLOCKING_EXCEPTION_CONTROL_ATOMIC neca
+
+#define getfslx(val, id, flags)      asm volatile (stringify(flags) "get\t%0,rfsl" stringify(id) : "=d" (val))
+#define putfslx(val, id, flags)      asm volatile (stringify(flags) "put\t%0,rfsl" stringify(id) :: "d" (val))
+
+#define tgetfslx(val, id, flags)     asm volatile ("t" stringify(flags) "get\t%0,rfsl" stringify(id) : "=d" (val))
+#define tputfslx(id, flags)          asm volatile ("t" stringify(flags) "put\trfsl" stringify(id))
+
+#define getdfslx(val, var, flags)    asm volatile (stringify(flags) "getd\t%0,%1" : "=d" (val) : "d" (var))
+#define putdfslx(val, var, flags)    asm volatile (stringify(flags) "putd\t%0,%1" :: "d" (val), "d" (var))
+
+#define tgetdfslx(val, var, flags)   asm volatile ("t" stringify(flags) "getd\t%0,%1" : "=d" (val) : "d" (var))
+#define tputdfslx(var, flags)        asm volatile ("t" stringify(flags) "putd\t%0" :: "d" (var))
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* FSL_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/hw_exception_handler.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/hw_exception_handler.S
new file mode 100644
index 0000000..8b33a7c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/hw_exception_handler.S
@@ -0,0 +1,659 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+ * Microblaze HW Exception Handler
+ * - Non self-modifying exception handler for the following exception conditions
+ *   - Unalignment
+ *   - Instruction bus error
+ *   - Data bus error
+ *   - Illegal instruction opcode
+ *   - Divide-by-zero
+ *   - Stack protection violation
+ *******************************************************************************/
+
+#include "microblaze_exceptions_g.h"
+#include "xparameters.h"
+
+/* Helpful Macros */
+#define EX_HANDLER_STACK_SIZ            (4*21)
+#define RMSR_OFFSET                     (20 * 4)
+#define R17_OFFSET                      (0)
+#define REG_OFFSET(regnum)              (4 * (regnum + 1))
+#define NUM_TO_REG(num)                 r ## num
+
+#define R3_TO_STACK(regnum)             swi     r3, r1, REG_OFFSET(regnum)
+#define R3_FROM_STACK(regnum)           lwi     r3, r1, REG_OFFSET(regnum)
+
+#define PUSH_REG(regnum)                swi     NUM_TO_REG(regnum), r1, REG_OFFSET(regnum)
+#define POP_REG(regnum)                 lwi     NUM_TO_REG(regnum), r1, REG_OFFSET(regnum)
+
+/* Uses r5 */
+#define PUSH_MSR                                                                \
+        mfs     r5, rmsr;                                                       \
+        swi     r5, r1, RMSR_OFFSET;
+
+#define PUSH_MSR_AND_ENABLE_EXC                                                 \
+        mfs     r5, rmsr;                                                       \
+        swi     r5, r1, RMSR_OFFSET;                                            \
+        ori     r5, r5, 0x100;                          /* Turn ON the EE bit*/ \
+        mts     rmsr, r5;
+
+/* Uses r5 */
+#define POP_MSR                                                                 \
+        lwi     r5, r1, RMSR_OFFSET;                                            \
+        mts     rmsr, r5;
+
+/* Push r17 */
+#define PUSH_R17                swi     r17, r1, R17_OFFSET
+/* Pop r17 */
+#define POP_R17                 lwi     r17, r1, R17_OFFSET
+
+#define LWREG_NOP                                                               \
+        bri     ex_handler_unhandled;                                           \
+        nop;
+
+#define SWREG_NOP                                                               \
+        bri     ex_handler_unhandled;                                           \
+        nop;
+
+/* r3 is the source */
+#define R3_TO_LWREG_V(regnum)                                                   \
+        R3_TO_STACK (regnum);                                                   \
+        bri     ex_handler_done;
+
+/* r3 is the source */
+#define R3_TO_LWREG(regnum)                                                     \
+        or      NUM_TO_REG (regnum), r0, r3;                                    \
+        bri     ex_handler_done;
+
+/* r3 is the target */
+#define SWREG_TO_R3_V(regnum)                                                   \
+        R3_FROM_STACK (regnum);                                                 \
+        bri     ex_sw_tail;
+
+/* r3 is the target */
+#define SWREG_TO_R3(regnum)                                                     \
+        or      r3, r0, NUM_TO_REG (regnum);                                    \
+        bri     ex_sw_tail;
+
+/* regnum is the source */
+#define FP_EX_OPB_SAVE(regnum)                                                  \
+        swi     NUM_TO_REG (regnum), r0, mb_fpex_op_b;                          \
+        nop;                                                                    \
+        bri     handle_fp_ex_opa;
+
+/* regnum is the source */
+#define FP_EX_OPB_SAVE_V(regnum)                                                \
+        R3_FROM_STACK (regnum);                                                 \
+        swi     r3, r0, mb_fpex_op_b;                                           \
+        bri     handle_fp_ex_opa;
+
+/* regnum is the source */
+#define FP_EX_OPA_SAVE(regnum)                                                  \
+        swi     NUM_TO_REG (regnum), r0, mb_fpex_op_a;                          \
+        nop;                                                                    \
+        bri     handle_fp_ex_done;
+
+/* regnum is the source */
+#define FP_EX_OPA_SAVE_V(regnum)                                                \
+        R3_FROM_STACK (regnum);                                                 \
+        swi     r3, r0, mb_fpex_op_a;                                           \
+        bri     handle_fp_ex_done;
+
+#define FP_EX_UNHANDLED                                                         \
+        bri     fp_ex_unhandled;                                                \
+        nop;                                                                    \
+        nop;
+
+/* ESR masks */
+#define ESR_EXC_MASK            0x0000001F
+#define ESR_REG_MASK            0x000003E0
+#define ESR_LW_SW_MASK          0x00000400
+#define ESR_WORD_MASK           0x00000800
+#define ESR_DS_MASK             0x00001000
+
+/* Extern declarations */
+.extern XNullHandler
+
+
+#ifdef MICROBLAZE_EXCEPTIONS_ENABLED                    /* If exceptions are enabled in the processor */
+
+/*
+ * hw_exception_handler - Handler for unaligned exceptions
+ * Exception handler notes:
+ * - Does not handle exceptions other than unaligned exceptions
+ * - Does not handle exceptions during load into r17, r1, r0.
+ * - Does not handle exceptions during store from r17 (cannot be done) and r1 (slows down common case)
+ *
+ *  Relevant register structures
+ *
+ *  EAR - |----|----|----|----|----|----|----|----|
+ *      - <  ##   32 bit faulting address     ##  >
+ *
+ *  ESR - |----|----|----|----|----| - | - |-----|-----|
+ *      -                            W   S   REG   EXC
+ *
+ *
+ * STACK FRAME STRUCTURE
+ * ---------------------
+ *
+ *      +-------------+         + 0
+ *      |     r17     |
+ *      +-------------+         + 4
+ *      |  Args for   |
+ *      |  next func  |
+ *      +-------------+         + 8
+ *      |     r1      |
+ *      |      .      |
+ *      |      .      |
+ *      |      .      |
+ *      |      .      |
+ *      |     r18     |
+ *      +-------------+         + 80
+ *      |     MSR     |
+ *      +-------------+         + 84
+ *      |      .      |
+ *      |      .      |
+ */
+
+
+.global _hw_exception_handler
+.section .text
+.align 2
+.ent _hw_exception_handler
+.type _hw_exception_handler, @function
+_hw_exception_handler:
+
+#if defined(XPAR_MICROBLAZE_USE_STACK_PROTECTION) && (XPAR_MICROBLAZE_USE_STACK_PROTECTION == 1)
+	/* Immediately halt for stack protection violation exception without using any stack       */
+	swi	r3, r0, mb_sp_save_r3;			/* Save temporary register                 */
+	mfs	r3, resr;				/* Extract ESR[DS]                         */
+	andi	r3, r3, ESR_EXC_MASK;
+	xori	r3, r3, 0x7;				/* Check for stack protection violation    */
+	bnei	r3, ex_handler_not_sp_violation;
+ex_handler_sp_violation:
+	bri	0;					/* Halt here if stack protection violation */
+ex_handler_not_sp_violation:
+	lwi	r3, r0, mb_sp_save_r3;			/* Restore temporary register              */
+#endif /* defined(XPAR_MICROBLAZE_USE_STACK_PROTECTION) && (XPAR_MICROBLAZE_USE_STACK_PROTECTION == 1) */
+
+        addik   r1, r1, -(EX_HANDLER_STACK_SIZ);        /* Create stack frame */
+        PUSH_REG(3);
+        PUSH_REG(4);
+        PUSH_REG(5);
+        PUSH_REG(6);
+#ifdef MICROBLAZE_CAN_HANDLE_EXCEPTIONS_IN_DELAY_SLOTS
+        mfs     r6, resr;
+        andi    r6, r6, ESR_DS_MASK;
+        beqi    r6, ex_handler_no_ds;
+        mfs     r17, rbtr;
+ex_handler_no_ds:
+#endif
+        PUSH_R17;
+        PUSH_MSR_AND_ENABLE_EXC;                        /* Exceptions enabled here. This will allow nested exceptions */
+
+        mfs     r3, resr;
+        andi    r5, r3, ESR_EXC_MASK;                   /* Extract ESR[EXC]                     */
+#ifndef NO_UNALIGNED_EXCEPTIONS
+        xori    r6, r5, 1;                              /* 00001 = Unaligned Exception          */
+        bnei    r6, handle_ex_regular;
+
+        la      r4, r0, MB_ExceptionVectorTable;        /* Check if user has registered an unaligned exception handler */
+        lwi     r4, r4, 8;
+        la      r6, r0, XNullHandler;                   /* If exceptionvectortable entry is still XNullHandler, use */
+        xor     r6, r4, r6;                             /* the default exception handler */
+        beqi    r6, handle_unaligned_ex ;
+
+handle_ex_regular:
+#endif  /* ! NO_UNALIGNED_EXCEPTIONS */
+
+#if defined (MICROBLAZE_FP_EXCEPTION_ENABLED) && defined (MICROBLAZE_FP_EXCEPTION_DECODE)
+        xori   r6, r5, 6;                               /* 00110 = FPU exception */
+        beqi   r6, handle_fp_ex;                        /* Go and decode the FP exception */
+#endif  /* defined (MICROBLAZE_FP_EXCEPTION_ENABLED) && defined (MICROBLAZE_FP_EXCEPTION_DECODE) */
+
+handle_other_ex:                                        /* Handle Other exceptions here         */
+        ori     r6, r0, 20;
+        cmp     r6, r5, r6;                             /* >= 20 are exceptions we do not handle. */
+        blei    r6, ex_handler_unhandled;
+
+        ori     r6, r0, 7;
+        cmp     r6, r5, r6;                             /* Convert MMU exception indices into an ordinal of 7 */
+        bgti    r6, handle_other_ex_tail;
+        ori     r5, r0, 0x7;
+
+handle_other_ex_tail:
+        PUSH_REG(7);                                    /* Save other volatiles before we make procedure calls below   */
+        PUSH_REG(8);
+        PUSH_REG(9);
+        PUSH_REG(10);
+        PUSH_REG(11);
+        PUSH_REG(12);
+        PUSH_REG(15);
+        PUSH_REG(18);
+
+        la      r4, r0, MB_ExceptionVectorTable;        /* Load the Exception vector table base address         */
+        addk    r7, r5, r5;                             /* Calculate exception vector offset = r5 * 8           */
+        addk    r7, r7, r7;
+        addk    r7, r7, r7;
+        addk    r7, r7, r4;                             /* Get pointer to exception vector               */
+        lwi     r5, r7, 4;                              /* Load argument to exception handler from table */
+        lw      r7, r7, r0;                             /* Load vector itself here                       */
+
+        brald   r15, r7;                                /* Branch to handler                             */
+        nop;
+
+        POP_REG(7);                                     /* Restore other volatiles */
+        POP_REG(8);
+        POP_REG(9);
+        POP_REG(10);
+        POP_REG(11);
+        POP_REG(12);
+        POP_REG(15);
+        POP_REG(18);
+
+        bri     ex_handler_done;                        /* Complete exception handling       */
+
+#ifndef NO_UNALIGNED_EXCEPTIONS
+handle_unaligned_ex:
+        andi    r6, r3, ESR_REG_MASK;                   /* Mask and extract the register operand */
+        srl     r6, r6;                                 /* r6 >> 5 */
+        srl     r6, r6;
+        srl     r6, r6;
+        srl     r6, r6;
+        srl     r6, r6;
+        sbi     r6, r0, ex_reg_op;                      /* Store the register operand in a temporary location */
+        mfs     r4, rear;
+        andi    r6, r3, ESR_LW_SW_MASK;                 /* Extract ESR[S]               */
+        bnei    r6, ex_sw;
+ex_lw:
+        andi    r6, r3, ESR_WORD_MASK;                  /* Extract ESR[W]               */
+        beqi    r6, ex_lhw;
+        lbui    r5, r4, 0;                              /* Exception address in r4      */
+        sbi     r5, r0, ex_tmp_data_loc_0;              /* Load a word, byte-by-byte from destination address and save it in tmp space  */
+        lbui    r5, r4, 1;
+        sbi     r5, r0, ex_tmp_data_loc_1;
+        lbui    r5, r4, 2;
+        sbi     r5, r0, ex_tmp_data_loc_2;
+        lbui    r5, r4, 3;
+        sbi     r5, r0, ex_tmp_data_loc_3;
+        lwi     r3, r0, ex_tmp_data_loc_0;              /* Get the destination register value into r3   */
+        bri     ex_lw_tail;
+ex_lhw:
+        lbui    r5, r4, 0;                              /* Exception address in r4                      */
+        sbi     r5, r0, ex_tmp_data_loc_0;              /* Load a half-word, byte-by-byte from destination address and save it in tmp space */
+        lbui    r5, r4, 1;
+        sbi     r5, r0, ex_tmp_data_loc_1;
+        lhui    r3, r0, ex_tmp_data_loc_0;              /* Get the destination register value into r3   */
+ex_lw_tail:
+        lbui    r5, r0, ex_reg_op;                      /* Get the destination register number into r5  */
+        la      r6, r0, lw_table;                       /* Form load_word jump table offset (lw_table + (8 * regnum)) */
+        addk    r5, r5, r5;
+        addk    r5, r5, r5;
+        addk    r5, r5, r5;
+        addk    r5, r5, r6;
+        bra     r5;
+ex_lw_end:                                              /* Exception handling of load word, ends */
+ex_sw:
+        lbui    r5, r0, ex_reg_op;                      /* Get the destination register number into r5 */
+        la      r6, r0, sw_table;                       /* Form store_word jump table offset (sw_table + (8 * regnum)) */
+        add     r5, r5, r5;
+        add     r5, r5, r5;
+        add     r5, r5, r5;
+        add     r5, r5, r6;
+        bra     r5;
+ex_sw_tail:
+        mfs     r6, resr;
+        andi    r6, r6, ESR_WORD_MASK;                  /* Extract ESR[W]       */
+        beqi    r6, ex_shw;
+        swi     r3, r0, ex_tmp_data_loc_0;
+        lbui    r3, r0, ex_tmp_data_loc_0;              /* Store the word, byte-by-byte into destination address                */
+        sbi     r3, r4, 0;
+        lbui    r3, r0, ex_tmp_data_loc_1;
+        sbi     r3, r4, 1;
+        lbui    r3, r0, ex_tmp_data_loc_2;
+        sbi     r3, r4, 2;
+        lbui    r3, r0, ex_tmp_data_loc_3;
+        sbi     r3, r4, 3;
+        bri     ex_handler_done;
+ex_shw:
+        swi     r3, r0, ex_tmp_data_loc_0;              /* Store the lower half-word, byte-by-byte into destination address      */
+
+#ifdef __LITTLE_ENDIAN__
+        lbui    r3, r0, ex_tmp_data_loc_0;
+#else
+        lbui    r3, r0, ex_tmp_data_loc_2;
+#endif
+        sbi     r3, r4, 0;
+#ifdef __LITTLE_ENDIAN__
+        lbui    r3, r0, ex_tmp_data_loc_1;
+#else
+        lbui    r3, r0, ex_tmp_data_loc_3;
+#endif
+        sbi     r3, r4, 1;
+ex_sw_end:                                              /* Exception handling of store word, ends. */
+        bri     ex_handler_done;
+#endif  /* !NO_UNALIGNED_EXCEPTIONS */
+
+#if defined (MICROBLAZE_FP_EXCEPTION_ENABLED) && defined (MICROBLAZE_FP_EXCEPTION_DECODE)
+handle_fp_ex:
+        addik   r3, r17, -4;                            /* r17 contains (addr of exception causing FP instruction + 4) */
+        lw      r4, r0, r3;                             /* We might find ourselves in a spot here. Unguaranteed load   */
+
+handle_fp_ex_opb:
+        la      r6, r0, fp_table_opb;                   /* Decode opB and store its value in mb_fpex_op_b */
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        andi    r3, r4, 0x1F;
+        add     r3, r3, r3;                             /* Calculate (fp_table_opb + (regno * 12)) in r5 */
+        add     r3, r3, r3;
+        add     r5, r3, r3;
+        add     r5, r5, r3;
+        add     r5, r5, r6;
+        bra     r5;
+
+handle_fp_ex_opa:
+        la      r6, r0, fp_table_opa;                   /* Decode opA and store its value in mb_fpex_op_a */
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        srl     r4, r4;
+        andi    r3, r4, 0x1F;
+        add     r3, r3, r3;                             /* Calculate (fp_table_opb + (regno * 12)) in r5 */
+        add     r3, r3, r3;
+        add     r5, r3, r3;
+        add     r5, r5, r3;
+        add     r5, r5, r6;
+        bra     r5;
+
+handle_fp_ex_done:
+        ori     r5, r0, 6;                              /* Set exception number back to 6 */
+        bri     handle_other_ex_tail;
+
+fp_ex_unhandled:
+        bri     0;
+#endif  /* defined (MICROBLAZE_FP_EXCEPTION_ENABLED) && defined (MICROBLAZE_FP_EXCEPTION_DECODE) */
+
+ex_handler_done:
+        POP_R17;
+        POP_MSR;
+        POP_REG(3);
+        POP_REG(4);
+        POP_REG(5);
+        POP_REG(6);
+
+        rted    r17, 0
+        addik   r1, r1, (EX_HANDLER_STACK_SIZ);         /* Restore stack frame  */
+ex_handler_unhandled:
+        bri 0                                           /* UNHANDLED. TRAP HERE */
+.end _hw_exception_handler
+
+#ifndef NO_UNALIGNED_EXCEPTIONS
+
+/*
+ * hw_exception_handler Jump Table
+ * - Contains code snippets for each register that caused the unaligned exception.
+ * - Hence exception handler is NOT self-modifying
+ * - Separate table for load exceptions and store exceptions.
+ * - Each table is of size:   (8 * 32) = 256 bytes
+ */
+
+.section .text
+.align  4
+lw_table:
+lw_r0:  R3_TO_LWREG   (0);
+lw_r1:  LWREG_NOP;
+lw_r2:  R3_TO_LWREG   (2);
+lw_r3:  R3_TO_LWREG_V (3);
+lw_r4:  R3_TO_LWREG_V (4);
+lw_r5:  R3_TO_LWREG_V (5);
+lw_r6:  R3_TO_LWREG_V (6);
+lw_r7:  R3_TO_LWREG   (7);
+lw_r8:  R3_TO_LWREG   (8);
+lw_r9:  R3_TO_LWREG   (9);
+lw_r10: R3_TO_LWREG   (10);
+lw_r11: R3_TO_LWREG   (11);
+lw_r12: R3_TO_LWREG   (12);
+lw_r13: R3_TO_LWREG   (13);
+lw_r14: R3_TO_LWREG   (14);
+lw_r15: R3_TO_LWREG   (15);
+lw_r16: R3_TO_LWREG   (16);
+lw_r17: LWREG_NOP;
+lw_r18: R3_TO_LWREG   (18);
+lw_r19: R3_TO_LWREG   (19);
+lw_r20: R3_TO_LWREG   (20);
+lw_r21: R3_TO_LWREG   (21);
+lw_r22: R3_TO_LWREG   (22);
+lw_r23: R3_TO_LWREG   (23);
+lw_r24: R3_TO_LWREG   (24);
+lw_r25: R3_TO_LWREG   (25);
+lw_r26: R3_TO_LWREG   (26);
+lw_r27: R3_TO_LWREG   (27);
+lw_r28: R3_TO_LWREG   (28);
+lw_r29: R3_TO_LWREG   (29);
+lw_r30: R3_TO_LWREG   (30);
+lw_r31: R3_TO_LWREG   (31);
+
+sw_table:
+sw_r0:  SWREG_TO_R3   (0);
+sw_r1:  SWREG_NOP;
+sw_r2:  SWREG_TO_R3   (2);
+sw_r3:  SWREG_TO_R3_V (3);
+sw_r4:  SWREG_TO_R3_V (4);
+sw_r5:  SWREG_TO_R3_V (5);
+sw_r6:  SWREG_TO_R3_V (6);
+sw_r7:  SWREG_TO_R3   (7);
+sw_r8:  SWREG_TO_R3   (8);
+sw_r9:  SWREG_TO_R3   (9);
+sw_r10: SWREG_TO_R3   (10);
+sw_r11: SWREG_TO_R3   (11);
+sw_r12: SWREG_TO_R3   (12);
+sw_r13: SWREG_TO_R3   (13);
+sw_r14: SWREG_TO_R3   (14);
+sw_r15: SWREG_TO_R3   (15);
+sw_r16: SWREG_TO_R3   (16);
+sw_r17: SWREG_NOP;
+sw_r18: SWREG_TO_R3   (18);
+sw_r19: SWREG_TO_R3   (19);
+sw_r20: SWREG_TO_R3   (20);
+sw_r21: SWREG_TO_R3   (21);
+sw_r22: SWREG_TO_R3   (22);
+sw_r23: SWREG_TO_R3   (23);
+sw_r24: SWREG_TO_R3   (24);
+sw_r25: SWREG_TO_R3   (25);
+sw_r26: SWREG_TO_R3   (26);
+sw_r27: SWREG_TO_R3   (27);
+sw_r28: SWREG_TO_R3   (28);
+sw_r29: SWREG_TO_R3   (29);
+sw_r30: SWREG_TO_R3   (30);
+sw_r31: SWREG_TO_R3   (31);
+
+/* Temporary data structures used in the handler */
+.section .data
+.align 2
+ex_tmp_data_loc_0:
+        .byte 0
+ex_tmp_data_loc_1:
+        .byte 0
+ex_tmp_data_loc_2:
+        .byte 0
+ex_tmp_data_loc_3:
+        .byte 0
+ex_reg_op:
+        .byte 0
+
+#endif /* ! NO_UNALIGNED_EXCEPTIONS */
+
+#if defined (MICROBLAZE_FP_EXCEPTION_ENABLED) && defined (MICROBLAZE_FP_EXCEPTION_DECODE)
+/*
+ * FP exception decode jump table.
+ * - Contains code snippets for each register that could have been a source operand for an excepting FP instruction
+ * - Hence exception handler is NOT self-modifying
+ * - Separate table for opA and opB
+ * - Each table is of size:   (12 * 32) = 384 bytes
+ */
+
+.section .text
+.align  4
+fp_table_opa:
+opa_r0: FP_EX_OPA_SAVE (0);
+opa_r1: FP_EX_UNHANDLED;
+opa_r2: FP_EX_OPA_SAVE (2);
+opa_r3: FP_EX_OPA_SAVE_V (3);
+opa_r4: FP_EX_OPA_SAVE_V (4);
+opa_r5: FP_EX_OPA_SAVE_V (5);
+opa_r6: FP_EX_OPA_SAVE_V (6);
+opa_r7: FP_EX_OPA_SAVE (7);
+opa_r8: FP_EX_OPA_SAVE (8);
+opa_r9: FP_EX_OPA_SAVE (9);
+opa_r10: FP_EX_OPA_SAVE (10);
+opa_r11: FP_EX_OPA_SAVE (11);
+opa_r12: FP_EX_OPA_SAVE (12);
+opa_r13: FP_EX_OPA_SAVE (13);
+opa_r14: FP_EX_UNHANDLED;
+opa_r15: FP_EX_UNHANDLED;
+opa_r16: FP_EX_UNHANDLED;
+opa_r17: FP_EX_UNHANDLED;
+opa_r18: FP_EX_OPA_SAVE (18);
+opa_r19: FP_EX_OPA_SAVE (19);
+opa_r20: FP_EX_OPA_SAVE (20);
+opa_r21: FP_EX_OPA_SAVE (21);
+opa_r22: FP_EX_OPA_SAVE (22);
+opa_r23: FP_EX_OPA_SAVE (23);
+opa_r24: FP_EX_OPA_SAVE (24);
+opa_r25: FP_EX_OPA_SAVE (25);
+opa_r26: FP_EX_OPA_SAVE (26);
+opa_r27: FP_EX_OPA_SAVE (27);
+opa_r28: FP_EX_OPA_SAVE (28);
+opa_r29: FP_EX_OPA_SAVE (29);
+opa_r30: FP_EX_OPA_SAVE (30);
+opa_r31: FP_EX_OPA_SAVE (31);
+
+fp_table_opb:
+opb_r0: FP_EX_OPB_SAVE (0);
+opb_r1: FP_EX_UNHANDLED;
+opb_r2: FP_EX_OPB_SAVE (2);
+opb_r3: FP_EX_OPB_SAVE_V (3);
+opb_r4: FP_EX_OPB_SAVE_V (4);
+opb_r5: FP_EX_OPB_SAVE_V (5);
+opb_r6: FP_EX_OPB_SAVE_V (6);
+opb_r7: FP_EX_OPB_SAVE (7);
+opb_r8: FP_EX_OPB_SAVE (8);
+opb_r9: FP_EX_OPB_SAVE (9);
+opb_r10: FP_EX_OPB_SAVE (10);
+opb_r11: FP_EX_OPB_SAVE (11);
+opb_r12: FP_EX_OPB_SAVE (12);
+opb_r13: FP_EX_OPB_SAVE (13);
+opb_r14: FP_EX_UNHANDLED;
+opb_r15: FP_EX_UNHANDLED;
+opb_r16: FP_EX_UNHANDLED;
+opb_r17: FP_EX_UNHANDLED;
+opb_r18: FP_EX_OPB_SAVE (18);
+opb_r19: FP_EX_OPB_SAVE (19);
+opb_r20: FP_EX_OPB_SAVE (20);
+opb_r21: FP_EX_OPB_SAVE (21);
+opb_r22: FP_EX_OPB_SAVE (22);
+opb_r23: FP_EX_OPB_SAVE (23);
+opb_r24: FP_EX_OPB_SAVE (24);
+opb_r25: FP_EX_OPB_SAVE (25);
+opb_r26: FP_EX_OPB_SAVE (26);
+opb_r27: FP_EX_OPB_SAVE (27);
+opb_r28: FP_EX_OPB_SAVE (28);
+opb_r29: FP_EX_OPB_SAVE (29);
+opb_r30: FP_EX_OPB_SAVE (30);
+opb_r31: FP_EX_OPB_SAVE (31);
+
+#endif  /* defined (MICROBLAZE_FP_EXCEPTION_ENABLED) && defined (MICROBLAZE_FP_EXCEPTION_DECODE) */
+
+#if defined(MICROBLAZE_FP_EXCEPTION_ENABLED) && defined(MICROBLAZE_FP_EXCEPTION_DECODE)
+/* This is where we store the opA and opB of the last excepting FP instruction */
+.section .data
+.align 2
+.global mb_fpex_op_a
+.global mb_fpex_op_b
+mb_fpex_op_a:
+        .long 0
+mb_fpex_op_b:
+        .long 0
+#endif /* defined (MICROBLAZE_FP_EXCEPTION_ENABLED) && defined (MICROBLAZE_FP_EXCEPTION_DECODE) */
+
+#if defined(XPAR_MICROBLAZE_USE_STACK_PROTECTION) && (XPAR_MICROBLAZE_USE_STACK_PROTECTION == 1)
+/* This is where we store the register used to check which exception occurred */
+	.section .data
+	.align 2
+mb_sp_save_r3:
+        .long 0
+#endif /* defined(XPAR_MICROBLAZE_USE_STACK_PROTECTION) && (XPAR_MICROBLAZE_USE_STACK_PROTECTION == 1) */
+
+/* The exception vector table */
+.section .data
+.align 2
+.global MB_ExceptionVectorTable
+MB_ExceptionVectorTable:
+    .long XNullHandler
+    .long 0                                 /* --          FSL Exception         -- */
+    .long XNullHandler
+    .long 1                                 /* -- Unaligned Access Exception     -- */
+    .long XNullHandler
+    .long 2                                 /* --   Illegal Opcode Exception     -- */
+    .long XNullHandler
+    .long 3                                 /* --      Instruction Bus Exception -- */
+    .long XNullHandler
+    .long 4                                 /* --     Data Bus Exception         -- */
+    .long XNullHandler
+    .long 5                                 /* --       Div-by-0 Exception       -- */
+    .long XNullHandler
+    .long 6                                 /* --         FPU  Exception         -- */
+    .long XNullHandler
+    .long 7                                 /* --         MMU  Exceptions        -- */
+
+#else                                       /* Dummy exception handler, in case exceptions are not present in the processor */
+
+.global _hw_exception_handler
+.section .text
+.align 2
+.ent _hw_exception_handler
+_hw_exception_handler:
+        bri     0;
+.end _hw_exception_handler
+
+#endif  /* MICROBLAZE_EXCEPTIONS_ENABLED */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/mb_interface.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/mb_interface.h
new file mode 100644
index 0000000..31646ac
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/mb_interface.h
@@ -0,0 +1,378 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#ifndef _MICROBLAZE_INTERFACE_H_
+#define _MICROBLAZE_INTERFACE_H_
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+extern void microblaze_enable_interrupts(void);                 /* Enable Interrupts */
+extern void microblaze_disable_interrupts(void);                /* Disable Interrupts */
+extern void microblaze_enable_icache(void);                     /* Enable Instruction Cache */
+extern void microblaze_disable_icache(void);                    /* Disable Instruction Cache */
+extern void microblaze_enable_dcache(void);                     /* Enable Instruction Cache */
+extern void microblaze_disable_dcache(void);                    /* Disable Instruction Cache */
+extern void microblaze_enable_exceptions(void);                 /* Enable hardware exceptions */
+extern void microblaze_disable_exceptions(void);                /* Disable hardware exceptions */
+extern void microblaze_register_handler(XInterruptHandler Handler, void *DataPtr); /* Register top level interrupt handler */
+extern void microblaze_register_exception_handler(u32 ExceptionId, Xil_ExceptionHandler Handler, void *DataPtr); /* Register exception handler */
+
+extern void microblaze_invalidate_icache(void);         /* Invalidate the entire icache */
+extern void microblaze_invalidate_dcache(void);         /* Invalidate the entire dcache */
+extern void microblaze_flush_dcache(void);              /* Flush the whole dcache */
+extern void microblaze_invalidate_icache_range(u32 cacheaddr, u32 len);   /* Invalidate a part of the icache */
+extern void microblaze_invalidate_dcache_range(u32 cacheaddr, u32 len);   /* Invalidate a part of the dcache */
+extern void microblaze_flush_dcache_range(u32 cacheaddr, u32 len);        /* Flush a part of the dcache */
+extern void microblaze_scrub(void);                     /* Scrub LMB and internal BRAM */
+extern void microblaze_invalidate_cache_ext(void);         /* Invalidate cache ext */
+extern void microblaze_flush_cache_ext(void);         /* Flush cache ext */
+extern void microblaze_flush_cache_ext_range(u32 cacheaddr,
+			u32 len); /* Flush cache ext range */
+extern void microblaze_invalidate_cache_ext_range(u32 cacheaddr,
+			u32 len); /* Invalidate cache ext range */
+
+/* Deprecated */
+extern void microblaze_update_icache (s32 , s32 , s32 ) __attribute__((deprecated));
+extern void microblaze_init_icache_range (s32 , s32 )  __attribute__((deprecated));
+extern void microblaze_update_dcache (s32 , s32 , s32 )  __attribute__((deprecated));
+extern void microblaze_init_dcache_range (s32 , s32 )  __attribute__((deprecated));
+
+/* necessary for pre-processor */
+#define stringify(s)    tostring(s)
+#define tostring(s)     #s
+
+/* FSL Access Macros */
+
+/* Blocking Data Read and Write to FSL no. id */
+#define getfsl(val, id)         asm volatile ("get\t%0,rfsl" stringify(id) : "=d" (val))
+#define putfsl(val, id)         asm volatile ("put\t%0,rfsl" stringify(id) :: "d" (val))
+
+/* Non-blocking Data Read and Write to FSL no. id */
+#define ngetfsl(val, id)        asm volatile ("nget\t%0,rfsl" stringify(id) : "=d" (val))
+#define nputfsl(val, id)        asm volatile ("nput\t%0,rfsl" stringify(id) :: "d" (val))
+
+/* Blocking Control Read and Write to FSL no. id */
+#define cgetfsl(val, id)        asm volatile ("cget\t%0,rfsl" stringify(id) : "=d" (val))
+#define cputfsl(val, id)        asm volatile ("cput\t%0,rfsl" stringify(id) :: "d" (val))
+
+/* Non-blocking Control Read and Write to FSL no. id */
+#define ncgetfsl(val, id)       asm volatile ("ncget\t%0,rfsl" stringify(id) : "=d" (val))
+#define ncputfsl(val, id)       asm volatile ("ncput\t%0,rfsl" stringify(id) :: "d" (val))
+
+/* Polling versions of FSL access macros. This makes the FSL access interruptible */
+#define getfsl_interruptible(val, id)       asm volatile ("\n1:\n\tnget\t%0,rfsl" stringify(id) "\n\t"   \
+                                                          "addic\tr18,r0,0\n\t"                \
+                                                          "bnei\tr18,1b\n"                     \
+                                                           : "=d" (val) :: "r18")
+
+#define putfsl_interruptible(val, id)       asm volatile ("\n1:\n\tnput\t%0,rfsl" stringify(id) "\n\t"   \
+                                                          "addic\tr18,r0,0\n\t"                \
+                                                          "bnei\tr18,1b\n"                     \
+                                                          :: "d" (val) : "r18")
+
+#define cgetfsl_interruptible(val, id)      asm volatile ("\n1:\n\tncget\t%0,rfsl" stringify(id) "\n\t"  \
+                                                          "addic\tr18,r0,0\n\t"                \
+                                                          "bnei\tr18,1b\n"                     \
+                                                          : "=d" (val) :: "r18")
+
+#define cputfsl_interruptible(val, id)      asm volatile ("\n1:\n\tncput\t%0,rfsl" stringify(id) "\n\t"  \
+                                                          "addic\tr18,r0,0\n\t"                \
+                                                          "bnei\tr18,1b\n"                     \
+                                                          :: "d" (val) : "r18")
+/* FSL valid and error check macros. */
+#define fsl_isinvalid(result)               asm volatile ("addic\t%0,r0,0"  : "=d" (result))
+#define fsl_iserror(error)                  asm volatile ("mfs\t%0,rmsr\n\t"  \
+                                                              "andi\t%0,%0,0x10" : "=d" (error))
+
+/* Pseudo assembler instructions */
+#define clz(v)          ({  u32 _rval;         \
+                            __asm__ __volatile__ (      \
+                                "clz\t%0,%1\n" : "=d"(_rval): "d" (v) \
+                            );                          \
+                            _rval;                      \
+                        })
+
+#define mbar(mask)      ({  __asm__ __volatile__ ("mbar\t" stringify(mask) ); })
+#define mb_sleep()     	({  __asm__ __volatile__ ("sleep\t"); })
+
+#define mb_swapb(v)		({	u32 _rval;         \
+							__asm__ __volatile__ (      \
+								"swapb\t%0,%1\n" : "=d"(_rval) : "d" (v) \
+							 );                          \
+							 _rval;                      \
+						})
+
+#define mb_swaph(v)		({	u32 _rval;         \
+							__asm__ __volatile__ (      \
+								"swaph\t%0,%1\n" : "=d"(_rval) : "d" (v) \
+							 );                          \
+							 _rval;                      \
+						})
+
+#define mfgpr(rn)       ({  u32 _rval;         \
+                            __asm__ __volatile__ (      \
+                                "or\t%0,r0," stringify(rn) "\n" : "=d"(_rval) \
+                            );                          \
+                            _rval;                      \
+                        })
+
+#define mfmsr()         ({  u32 _rval;         \
+                            __asm__ __volatile__ (      \
+                                "mfs\t%0,rmsr\n" : "=d"(_rval) \
+                            );                          \
+                            _rval;                      \
+                        })
+
+#define mfear()         ({  u32 _rval;         \
+                            __asm__ __volatile__ (      \
+                                "mfs\t%0,rear\n" : "=d"(_rval) \
+                            );                          \
+                            _rval;                      \
+                        })
+
+#define mfesr()         ({  u32 _rval;         \
+                            __asm__ __volatile__ (      \
+                                "mfs\t%0,resr\n" : "=d"(_rval) \
+                            );                          \
+                            _rval;                      \
+                        })
+
+#define mffsr()         ({  u32 _rval;         \
+                            __asm__ __volatile__ (      \
+                                "mfs\t%0,rfsr\n" : "=d"(_rval) \
+                            );                          \
+                            _rval;                      \
+                        })
+
+#define mfpvr(rn)       ({  u32 _rval;         \
+                            __asm__ __volatile__ (                          \
+                                "mfs\t%0,rpvr" stringify(rn) "\n" : "=d"(_rval) \
+                            );                                              \
+                            _rval;                                          \
+                        })
+
+#define mfbtr()         ({  u32 _rval;         \
+                            __asm__ __volatile__ (      \
+                                "mfs\t%0,rbtr\n" : "=d"(_rval)  \
+                            );                                  \
+                            _rval;                              \
+                        })
+
+#define mfedr()         ({  u32 _rval;         \
+                            __asm__ __volatile__ (      \
+                                "mfs\t%0,redr\n" : "=d"(_rval)  \
+                            );                                  \
+                            _rval;                              \
+                        })
+
+#define mfpid()         ({  u32 _rval;         \
+                            __asm__ __volatile__ (            \
+                                "mfs\t%0,rpid\n" : "=d"(_rval)\
+                            );                                \
+                            _rval;                            \
+                        })
+
+#define mfzpr()         ({  u32 _rval;         \
+                            __asm__ __volatile__ (                  \
+                                "mfs\t%0,rzpr\n" : "=d"(_rval)      \
+                            );                                      \
+                            _rval;                                  \
+                        })
+
+#define mftlbx()        ({  u32 _rval;         \
+                            __asm__ __volatile__ (                  \
+                                "mfs\t%0,rtlbx\n" : "=d"(_rval)     \
+                            );                                      \
+                            _rval;                                  \
+                        })
+
+#define mftlblo()       ({  u32 _rval;                     \
+                            __asm__ __volatile__ (                  \
+                                "mfs\t%0,rtlblo\n" : "=d"(_rval)    \
+                            );                                      \
+                            _rval;                                  \
+                        })
+
+#define mftlbhi()       ({  u32 _rval;         \
+                            __asm__ __volatile__ (                  \
+                                "mfs\t%0,rtlbhi\n" : "=d"(_rval)    \
+                            );                                      \
+                            _rval;                                  \
+                        })
+
+#define mfslr()         ({  u32 _rval;         \
+                            __asm__ __volatile__ (                  \
+                                "mfs\t%0,rslr\n" : "=d"(_rval)    \
+                            );                                      \
+                            _rval;                                  \
+                        })
+
+#define mfshr()         ({  u32 _rval;         \
+                            __asm__ __volatile__ (                  \
+                                "mfs\t%0,rshr\n" : "=d"(_rval)    \
+                            );                                      \
+                            _rval;                                  \
+                        })
+
+#define mtgpr(rn, v)    ({  __asm__ __volatile__ (                      \
+                                "or\t" stringify(rn) ",r0,%0\n" :: "d" (v) \
+                            );                          \
+                        })
+
+#define mtmsr(v)        ({  __asm__ __volatile__ (      \
+                                "mts\trmsr,%0\n\tnop\n" :: "d" (v)      \
+                            );                          \
+                        })
+
+
+#define mtfsr(v)        ({  __asm__ __volatile__ (      \
+                                "mts\trfsr,%0\n\tnop\n" :: "d" (v)  \
+                            );                                      \
+                        })
+
+#define mtpid(v)        ({  __asm__ __volatile__ (      \
+                                "mts\trpid,%0\n\tnop\n" :: "d" (v)      \
+                            );                                      \
+                        })
+
+#define mtzpr(v)        ({  __asm__ __volatile__ (                  \
+                                "mts\trzpr,%0\n\tnop\n" :: "d" (v)      \
+                            );                                      \
+                        })
+
+#define mttlbx(v)       ({  __asm__ __volatile__ (      \
+                                "mts\trtlbx,%0\n\tnop\n" :: "d" (v)     \
+                            );                                      \
+                        })
+
+#define mttlblo(v)      ({  __asm__ __volatile__ (      \
+                                "mts\trtlblo,%0\n\tnop\n" :: "d" (v)    \
+                            );                                      \
+                        })
+
+#define mttlbhi(v)      ({  __asm__ __volatile__ (      \
+                                "mts\trtlbhi,%0\n\tnop\n" :: "d" (v)    \
+                            );                                      \
+                        })
+
+#define mttlbsx(v)      ({  __asm__ __volatile__ (      \
+                                "mts\trtlbsx,%0\n\tnop\n" :: "d" (v)    \
+                            );                                      \
+                        })
+
+#define mtslr(v)        ({  __asm__ __volatile__ (      \
+                                "mts\trslr,%0\n\tnop\n" :: "d" (v)  \
+                            );                                      \
+                        })
+
+#define mtshr(v)        ({  __asm__ __volatile__ (      \
+                                "mts\trshr,%0\n\tnop\n" :: "d" (v)  \
+                            );                                      \
+                        })
+
+#define lwx(address)	({  u32 _rval; \
+                              __asm__ __volatile__ ( \
+                             "lwx\t%0,%1,r0\n" : "=d"(_rval) : "d" (address) \
+                              ); \
+                              _rval; \
+                          })
+
+#define lwr(address)	({  u32 _rval; \
+                              __asm__ __volatile__ ( \
+                             "lwr\t%0,%1,r0\n" : "=d"(_rval) : "d" (address) \
+                              ); \
+                              _rval; \
+                          })
+
+#define lhur(address)	({  u32 _rval; \
+                              __asm__ __volatile__ ( \
+                             "lhur\t%0,%1,r0\n" : "=d"(_rval) : "d" (address) \
+                              ); \
+                              _rval; \
+                          })
+
+#define lbur(address)	({  u32 _rval; \
+                              __asm__ __volatile__ ( \
+                             "lbur\t%0,%1,r0\n" : "=d"(_rval) : "d" (address) \
+                              ); \
+                              _rval; \
+                          })
+
+#define swx(address, data) ({  __asm__ __volatile__ ( \
+                                "swx\t%0,%1,r0\n" :: "d" (data), "d" (address) \
+                               ); \
+                           })
+
+#define swr(address, data) ({  __asm__ __volatile__ ( \
+                                "swr\t%0,%1,r0\n" :: "d" (data), "d" (address) \
+                               ); \
+                           })
+
+#define shr(address, data) ({  __asm__ __volatile__ ( \
+                                "shr\t%0,%1,r0\n" :: "d" (data), "d" (address) \
+                               ); \
+                           })
+
+#define sbr(address, data) ({  __asm__ __volatile__ ( \
+                                "sbr\t%0,%1,r0\n" :: "d" (data), "d" (address) \
+                               ); \
+                           })
+
+#define microblaze_getfpex_operand_a()     ({          \
+                                    extern u32 mb_fpex_op_a;   \
+                                    mb_fpex_op_a;                       \
+                                })
+
+#define microblaze_getfpex_operand_b()     ({          \
+                                    extern u32 mb_fpex_op_b;   \
+                                    mb_fpex_op_b;                       \
+                                })
+
+/* Deprecated MicroBlaze FSL macros */
+#define microblaze_bread_datafsl(val, id)       getfsl(val,id)
+#define microblaze_bwrite_datafsl(val, id)      putfsl(val,id)
+#define microblaze_nbread_datafsl(val, id)      ngetfsl(val,id)
+#define microblaze_nbwrite_datafsl(val, id)     nputfsl(val,id)
+#define microblaze_bread_cntlfsl(val, id)       cgetfsl(val,id)
+#define microblaze_bwrite_cntlfsl(val, id)      cputfsl(val,id)
+#define microblaze_nbread_cntlfsl(val, id)      ncgetfsl(val,id)
+#define microblaze_nbwrite_cntlfsl(val, id)     ncputfsl(val,id)
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _MICROBLAZE_INTERFACE_H_
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_dcache.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_dcache.S
new file mode 100644
index 0000000..280dd26
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_dcache.S
@@ -0,0 +1,84 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+* File   : microblaze_disable_dcache.s
+* Date   : 2002, March 20.
+* Company: Xilinx
+* Group  : Emerging Software Technologies
+*
+* Summary:
+* Disable the L1 dcache on the microblaze.
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+	.text
+	.globl	microblaze_disable_dcache
+	.ent	microblaze_disable_dcache
+	.align	2
+microblaze_disable_dcache:
+#if XPAR_MICROBLAZE_USE_MSR_INSTR == 1
+
+#if XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK != 0
+    addik   r1, r1, -4
+    swi     r15, r1, 0
+    brlid   r15, microblaze_flush_dcache /* microblaze_flush_dcache does not use r1*/
+    nop
+    lwi     r15, r1, 0
+    addi    r1, r1, 4
+#endif /* XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK != 0 */
+	rtsd	r15, 8
+	msrclr r0, 0x80
+
+#else /* XPAR_MICROBLAZE_USE_MSR_INSTR == 1 */
+
+    addik   r1, r1, -4
+
+#if XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK != 0
+    swi     r15, r1, 0
+    brlid   r15, microblaze_flush_dcache
+    nop
+#endif /* XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK != 0 */
+    mfs	r11, rmsr
+	andi	r11, r11, ~(0x80)
+	mts	rmsr, r11
+
+#if XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK != 0
+    lwi     r15, r1, 0
+#endif /* XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK != 0 */
+
+	rtsd	r15, 8
+	addi	r1, r1, 4
+
+#endif /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+        .end	microblaze_disable_dcache
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_exceptions.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_exceptions.S
new file mode 100644
index 0000000..21f37aa
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_exceptions.S
@@ -0,0 +1,56 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* Disable exceptions on microblaze.
+*
+*
+******************************************************************************/
+
+#include "xparameters.h"
+
+	.text
+	.globl	microblaze_disable_exceptions
+	.ent	microblaze_disable_exceptions
+	.align 2
+microblaze_disable_exceptions:
+#if XPAR_MICROBLAZE_USE_MSR_INSTR == 1
+	rtsd    r15, 8
+        msrclr  r0, 0x100
+#else
+        mfs     r4, rmsr;
+        andi    r4, r4, ~(0x100);                       /* Turn OFF the EE bit */
+        mts     rmsr, r4;
+        rtsd    r15, 8;
+        nop;
+#endif
+.end microblaze_disable_exceptions
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_icache.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_icache.S
new file mode 100644
index 0000000..19a00f7
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_icache.S
@@ -0,0 +1,66 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* File   : microblaze_disable_icache.s
+* Date   : 2002, March 20.
+* Company: Xilinx
+* Group  : Emerging Software Technologies
+*
+* Summary:
+* Disable L1 icache on the microblaze.
+*
+*
+******************************************************************************/
+
+#include "xparameters.h"
+
+	.text
+	.globl	microblaze_disable_icache
+	.ent	microblaze_disable_icache
+	.align	2
+microblaze_disable_icache:
+#if XPAR_MICROBLAZE_USE_MSR_INSTR == 1
+	rtsd	r15, 8
+	msrclr  r0, 0x20
+#else /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+	#Read the MSR register
+	mfs	r8, rmsr
+	#Clear the icache enable bit
+	andi	r8, r8, ~(0x20)
+	#Save the MSR register
+	mts	rmsr, r8
+	#Return
+	rtsd	r15, 8
+	nop
+#endif
+	.end	microblaze_disable_icache
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_interrupts.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_interrupts.S
new file mode 100644
index 0000000..a37549f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_disable_interrupts.S
@@ -0,0 +1,66 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* File   : microblaze_disable_interrupts.s
+* Date   : 2002, March 20.
+* Company: Xilinx
+* Group  : Emerging Software Technologies
+*
+* Summary:
+* Disable interrupts on the microblaze.
+*
+*
+******************************************************************************/
+
+#include "xparameters.h"
+
+	.text
+	.globl	microblaze_disable_interrupts
+	.ent	microblaze_disable_interrupts
+	.align	2
+microblaze_disable_interrupts:
+#if XPAR_MICROBLAZE_USE_MSR_INSTR == 1
+	rtsd	r15, 8
+	msrclr  r0, 0x2
+#else /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+	#Read the MSR register
+	mfs	r12, rmsr
+	#Clear the interrupt enable bit
+	andi	r12, r12, ~(0x2)
+	#Save the MSR register
+	mts	rmsr, r12
+	#Return
+	rtsd	r15, 8
+	nop
+#endif /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+	.end	microblaze_disable_interrupts
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_dcache.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_dcache.S
new file mode 100644
index 0000000..93f3f97
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_dcache.S
@@ -0,0 +1,67 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* File   : microblaze_enable_dcache.s
+* Date   : 2002, March 20.
+* Company: Xilinx
+* Group  : Emerging Software Technologies
+*
+* Summary:
+* Enable L1 dcache on the microblaze.
+*
+*
+******************************************************************************/
+
+#include "xparameters.h"
+
+	.text
+	.globl	microblaze_enable_dcache
+	.ent	microblaze_enable_dcache
+	.align	2
+microblaze_enable_dcache:
+
+#if XPAR_MICROBLAZE_USE_MSR_INSTR == 1
+	rtsd	r15, 8
+	msrset  r0, 0x80
+#else /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+	#Read the MSR register
+	mfs	r8, rmsr
+	#Set the interrupt enable bit
+	ori	r8, r8, 0x80
+	#Save the MSR register
+	mts	rmsr, r8
+	#Return
+	rtsd	r15, 8
+	nop
+#endif /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+	.end	microblaze_enable_dcache
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_exceptions.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_exceptions.S
new file mode 100644
index 0000000..4cea8b3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_exceptions.S
@@ -0,0 +1,56 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* Enable exceptions on microblaze.
+*
+*
+******************************************************************************/
+
+#include "xparameters.h"
+
+	.text
+	.globl	microblaze_enable_exceptions
+	.ent	microblaze_enable_exceptions
+	.align 2
+microblaze_enable_exceptions:
+#if XPAR_MICROBLAZE_USE_MSR_INSTR == 1
+	rtsd    r15, 8;
+        msrset  r0, 0x100
+#else /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+        mfs     r4, rmsr;
+        ori     r4, r4, 0x100;                  /* Turn ON the EE bit */
+        mts     rmsr, r4;
+        rtsd    r15, 8;
+        nop;
+#endif /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+.end microblaze_enable_exceptions
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_icache.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_icache.S
new file mode 100644
index 0000000..726a2b8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_icache.S
@@ -0,0 +1,65 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* File   : microblaze_enable_icache.s
+* Date   : 2002, March 20.
+* Company: Xilinx
+* Group  : Emerging Software Technologies
+*
+* Summary:
+* Enable icache on the microblaze.
+*
+*
+******************************************************************************/
+#include "xparameters.h"
+
+	.text
+	.globl	microblaze_enable_icache
+	.ent	microblaze_enable_icache
+	.align	2
+microblaze_enable_icache:
+#if XPAR_MICROBLAZE_USE_MSR_INSTR == 1
+	rtsd	r15, 8
+	msrset  r0, 0x20
+#else /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+	#Read the MSR register
+	mfs	r8, rmsr
+	#Set the interrupt enable bit
+	ori	r8, r8, 0x20
+	#Save the MSR register
+	mts	rmsr, r8
+	#Return
+	rtsd	r15, 8
+	nop
+#endif /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+	.end	microblaze_enable_icache
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_interrupts.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_interrupts.S
new file mode 100644
index 0000000..64bddf0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_enable_interrupts.S
@@ -0,0 +1,66 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* File   : microblaze_enable_interrupts.s
+* Date   : 2002, March 20.
+* Company: Xilinx
+* Group  : Emerging Software Technologies
+*
+* Summary:
+* Enable interrupts on the microblaze.
+*
+*
+******************************************************************************/
+
+#include "xparameters.h"
+
+	.text
+	.globl	microblaze_enable_interrupts
+	.ent	microblaze_enable_interrupts
+	.align	2
+microblaze_enable_interrupts:
+#if XPAR_MICROBLAZE_USE_MSR_INSTR == 1
+	rtsd	r15, 8
+	msrset  r0, 0x2
+#else /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+	#Read the MSR register
+	mfs	r12, rmsr
+	#Set the interrupt enable bit
+	ori	r12, r12, 0x2
+	#Save the MSR register
+	mts	rmsr, r12
+	#Return
+	rtsd	r15, 8
+	nop
+#endif /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+	.end	microblaze_enable_interrupts
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_exception_handler.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_exception_handler.c
new file mode 100644
index 0000000..b9e8004
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_exception_handler.c
@@ -0,0 +1,97 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* @file microblaze_exception_handler.c
+*
+* This file contains exception handler registration routines for
+* the MicroBlaze processor.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Date     Changes
+* ----- -------- -----------------------------------------------
+* 1.00b 06/24/04 First release
+* 

+*
+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+#include "microblaze_exceptions_i.h"
+#include "microblaze_exceptions_g.h"
+
+#ifdef MICROBLAZE_EXCEPTIONS_ENABLED                    /* If exceptions are enabled in the processor */
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+/************************** Variable Definitions *****************************/
+extern MB_ExceptionVectorTableEntry MB_ExceptionVectorTable[];
+/****************************************************************************/
+
+/*****************************************************************************/
+/**
+*
+* Registers an exception handler for the MicroBlaze. The
+* argument provided in this call as the DataPtr is used as the argument
+* for the handler when it is called.
+*
+* @param    ExceptionId is the id of the exception to register this handler
+*           for.
+* @param    Top level handler.
+* @param    DataPtr is a reference to data that will be passed to the handler
+*           when it gets called.
+* @return   None.
+*
+* @note
+*
+* None.
+*
+****************************************************************************/
+void microblaze_register_exception_handler(u32 ExceptionId, Xil_ExceptionHandler Handler, void *DataPtr)
+{
+   MB_ExceptionVectorTable[ExceptionId].Handler = Handler;
+   MB_ExceptionVectorTable[ExceptionId].CallBackRef = DataPtr;
+}
+
+#endif  /* MICROBLAZE_EXCEPTIONS_ENABLED */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_exceptions_g.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_exceptions_g.h
new file mode 100644
index 0000000..c8cb149
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_exceptions_g.h
@@ -0,0 +1,54 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file microblaze_exceptions_g.h
+*
+* This file contains the exception handling information for the MicroBlaze
+* processor. This file is usually generated by LibGen.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Date     Changes
+* ----- -------- -----------------------------------------------
+* 1.00a 06/24/04 First release
+* 

+*
+******************************************************************************/
+#ifndef MICROBLAZE_EXCEPTIONS_G_H /* prevent circular inclusions */
+#define MICROBLAZE_EXCEPTIONS_G_H /* by using protection macros */
+
+#define MICROBLAZE_EXCEPTIONS_ENABLED   1
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_exceptions_i.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_exceptions_i.h
new file mode 100644
index 0000000..aaf2d8e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_exceptions_i.h
@@ -0,0 +1,87 @@
+/******************************************************************************
+*
+* Copyright (C) 2012 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file microblaze_exceptions_i.h
+*
+* This header file contains defines for structures used by the microblaze
+* hardware exception handler.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Date     Changes
+* ----- -------- -----------------------------------------------
+* 1.00a 06/24/04 First release
+* 

+*
+******************************************************************************/
+
+#ifndef MICROBLAZE_EXCEPTIONS_I_H /* prevent circular inclusions */
+#define MICROBLAZE_EXCEPTIONS_I_H /* by using protection macros */
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct
+{
+   Xil_ExceptionHandler Handler;
+   void *CallBackRef;
+} MB_ExceptionVectorTableEntry;
+
+/* Exception IDs */
+#define XEXC_ID_FSL                     0U
+#define XEXC_ID_UNALIGNED_ACCESS        1U
+#define XEXC_ID_ILLEGAL_OPCODE          2U
+#define XEXC_ID_M_AXI_I_EXCEPTION       3U
+#define XEXC_ID_IPLB_EXCEPTION          3U
+#define XEXC_ID_M_AXI_D_EXCEPTION       4U
+#define XEXC_ID_DPLB_EXCEPTION          4U
+#define XEXC_ID_DIV_BY_ZERO             5U
+#define XEXC_ID_FPU                     6U
+#define XEXC_ID_STACK_VIOLATION         7U
+#define XEXC_ID_MMU                     7U
+
+void microblaze_register_exception_handler(u32 ExceptionId, Xil_ExceptionHandler Handler, void *DataPtr);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_cache_ext.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_cache_ext.S
new file mode 100644
index 0000000..3bf6abd
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_cache_ext.S
@@ -0,0 +1,65 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* microblaze_flush_cache_ext()
+*
+* Flush the entire L2 Cache
+*
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN	16
+
+	.text
+	.globl	microblaze_flush_cache_ext
+	.ent	microblaze_flush_cache_ext
+	.align	2
+
+microblaze_flush_cache_ext:
+
+#if ((XPAR_MICROBLAZE_INTERCONNECT==3) && (XPAR_MICROBLAZE_USE_DCACHE==1))
+	addik	r5, r0, XPAR_MICROBLAZE_DCACHE_BASEADDR & (-(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN))
+
+	addik	r6, r0, XPAR_MICROBLAZE_DCACHE_BYTE_SIZE-(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+	andi	r6, r6, -(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+
+Loop_start:
+	wdc.ext.flush r5, r6
+	bgtid	r6,Loop_start
+	addik	r6, r6,-(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+#endif
+	rtsd	r15, 8
+	nop
+	.end	microblaze_flush_cache_ext
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_cache_ext_range.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_cache_ext_range.S
new file mode 100644
index 0000000..0c4a276
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_cache_ext_range.S
@@ -0,0 +1,74 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* microblaze_flush_cache_ext_range (unsigned int cacheaddr, unsigned int len)
+*
+*Flush a L2 Cache range
+*
+*Parameters:
+*	'cacheaddr' - address in the L2 cache where the flush begins
+*	'len    '   - length (in bytes) worth of L2 cache to be flushed
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN	16
+
+	.text
+	.globl	microblaze_flush_cache_ext_range
+	.ent	microblaze_flush_cache_ext_range
+	.align	2
+
+microblaze_flush_cache_ext_range:
+#if ((XPAR_MICROBLAZE_INTERCONNECT==3) && (XPAR_MICROBLAZE_USE_DCACHE==1))
+	beqi	r6, Loop_done
+
+	addik	r6, r6, -1
+	add	r6, r5, r6
+
+	andi	r6, r6, -(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+	andi	r5, r5, -(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+
+	rsubk	r6, r5, r6
+Loop_start:
+	wdc.ext.flush r5, r6
+	bneid	r6, Loop_start
+	addik	r6, r6, -(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+
+Loop_done:
+#endif
+	rtsd	r15, 8
+	nop
+
+	.end	microblaze_flush_cache_ext_range
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_dcache.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_dcache.S
new file mode 100644
index 0000000..aa0b209
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_dcache.S
@@ -0,0 +1,71 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+*
+* microblaze_flush_dcache()
+*
+*    Flush the L1 DCache
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define MICROBLAZE_MSR_DCACHE_ENABLE        0x00000080
+#define MICROBLAZE_MSR_INTR_ENABLE          0x00000002
+
+#ifndef XPAR_MICROBLAZE_DCACHE_LINE_LEN
+#define XPAR_MICROBLAZE_DCACHE_LINE_LEN   1
+#endif
+
+	.text
+	.globl	microblaze_flush_dcache
+	.ent	microblaze_flush_dcache
+	.align	2
+
+microblaze_flush_dcache:
+	addik 	r5, r0, XPAR_MICROBLAZE_DCACHE_BASEADDR & (-(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN))  /* Align to cache line */
+	addik	r6, r5, XPAR_MICROBLAZE_DCACHE_BYTE_SIZE & (-(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN))        /* Compute end */
+
+L_start:
+	wdc.flush r5, r0                                        /* Flush the Cache */
+
+	cmpu	r18, r5, r6                                     /* Are we at the end? */
+	blei	r18, L_done
+
+	brid	L_start                                         /* Branch to the beginning of the loop */
+	addik	r5, r5, (XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)   /* Increment the addrees by 4 (delay slot) */
+
+L_done:
+	rtsd	r15, 8                                          /* Return */
+        nop
+	.end	microblaze_flush_dcache
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_dcache_range.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_dcache_range.S
new file mode 100644
index 0000000..23fedc5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_flush_dcache_range.S
@@ -0,0 +1,108 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* microblaze_flush_dcache_range (unsigned int cacheaddr, unsigned int len)
+*
+*    Flush a L1 DCache range
+*
+*    Parameters:
+*       'cacheaddr' - address in the Dcache where the flush begins
+*	'len    '   - length (in bytes) worth of Dcache to be flushed
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define MICROBLAZE_MSR_DCACHE_ENABLE        0x00000080
+#define MICROBLAZE_MSR_INTR_ENABLE          0x00000002
+
+#ifndef XPAR_MICROBLAZE_DCACHE_LINE_LEN
+#define XPAR_MICROBLAZE_DCACHE_LINE_LEN   1
+#endif
+
+#ifndef XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK
+#define MB_VERSION_LT_v720
+#define MB_HAS_WRITEBACK_SET 0
+#else
+#define MB_HAS_WRITEBACK_SET XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK
+#endif
+
+	.text
+	.globl	microblaze_flush_dcache_range
+	.ent	microblaze_flush_dcache_range
+	.align	2
+
+microblaze_flush_dcache_range:
+
+#ifdef MB_VERSION_LT_v720                                       /* Disable Dcache and interrupts before invalidating */
+	mfs	r9, rmsr
+	andi	r10, r9, ~(MICROBLAZE_MSR_DCACHE_ENABLE | MICROBLAZE_MSR_INTR_ENABLE)
+	mts	rmsr, r10
+#endif
+
+        beqi    r6, L_done                                      /* Skip loop if size is zero */
+
+        add	r6, r5, r6                                      /* Compute end address */
+        addik   r6, r6, -1
+
+        andi    r6, r6, -(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)  /* Align end down to cache line */
+        andi    r5, r5, -(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)  /* Align start down to cache line */
+
+#if MB_HAS_WRITEBACK_SET == 0                                   /* Use a different scheme for MB version < v7.20 or when caches are write-through */
+
+L_start:
+	cmpu	r18, r5, r6                                     /* Are we at the end? */
+	blti	r18, L_done
+
+	wdc     r5, r0                                          /* Invalidate the cache line */
+
+	brid	L_start                                         /* Branch to the beginning of the loop */
+	addik	r5, r5, (XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)   /* Increment the addrees by 4 (delay slot) */
+#else
+        rsubk   r6, r5, r6
+                                                                /* r6 will now contain (count of bytes - (4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)) */
+L_start:
+        wdc.flush r5, r6                                        /* Flush the cache line */
+        bneid   r6, L_start
+        addik   r6, r6, -(XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)
+
+#endif
+
+L_done:
+	rtsd	r15, 8
+#ifdef MB_VERSION_LT_v720                                       /* restore MSR only for MB version < v7.20 */
+	mts	rmsr, r9
+#else
+        nop
+#endif
+	.end	microblaze_flush_dcache_range
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_init_dcache_range.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_init_dcache_range.S
new file mode 100644
index 0000000..ba36afb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_init_dcache_range.S
@@ -0,0 +1,82 @@
+/******************************************************************************
+*
+* Copyright (C) 2006 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* microblaze_init_dcache_range (unsigned int cache_start, unsigned int cache_len)
+*
+*    Invalidate dcache on the microblaze
+*
+*    Parameters:
+*       'cache_start' - address in the Dcache where invalidation begins
+*	'cache_len'   - length (in bytes) worth of Dcache to be invalidated
+*
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define MICROBLAZE_MSR_DCACHE_ENABLE        0x00000080
+#define MICROBLAZE_MSR_INTR_ENABLE          0x00000002
+
+#ifndef XPAR_MICROBLAZE_DCACHE_LINE_LEN
+#define XPAR_MICROBLAZE_DCACHE_LINE_LEN   1
+#endif
+
+	.text
+	.globl	microblaze_init_dcache_range
+	.ent	microblaze_init_dcache_range
+	.align	2
+
+microblaze_init_dcache_range:
+
+	mfs	r9, rmsr                                        /* Disable Dcache and interrupts before invalidating */
+	andi	r10, r9, ~(MICROBLAZE_MSR_DCACHE_ENABLE | MICROBLAZE_MSR_INTR_ENABLE)
+	mts	rmsr, r10
+
+        andi    r5, r5, -(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)  /* Align to cache line */
+
+	add	r6, r5, r6                                      /* Compute end */
+        andi    r6, r6, -(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)  /* Align to cache line */
+
+L_start:
+	wdc	r5, r0                                          /* Invalidate the Cache (delay slot) */
+
+	cmpu	r18, r5, r6                                     /* Are we at the end ? */
+	blei	r18, L_done
+
+	brid	L_start                                         /* Branch to the beginning of the loop */
+	addik	r5, r5, (XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)   /* Increment the addrees by 4 (delay slot) */
+
+L_done:
+	rtsd	r15, 8                                          /* Return */
+	mts	rmsr, r9
+	.end	microblaze_init_dcache_range
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_init_icache_range.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_init_icache_range.S
new file mode 100644
index 0000000..10a4d1e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_init_icache_range.S
@@ -0,0 +1,83 @@
+/******************************************************************************
+*
+* Copyright (C) 2006 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+*
+* microblaze_init_icache_range (unsigned int cache_start, unsigned int cache_len)
+*
+*    Invalidate icache on the microblaze
+*
+*    Parameters:
+*       'cache_start' - address in the Icache where invalidation begins
+*	'cache_len'   - length (in bytes) worth of Icache to be invalidated
+*
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define MICROBLAZE_MSR_ICACHE_ENABLE        0x00000020
+#define MICROBLAZE_MSR_INTR_ENABLE          0x00000002
+
+#ifndef XPAR_MICROBLAZE_ICACHE_LINE_LEN
+#define XPAR_MICROBLAZE_ICACHE_LINE_LEN   1
+#endif
+
+	.text
+	.globl	microblaze_init_icache_range
+	.ent	microblaze_init_icache_range
+	.align	2
+
+microblaze_init_icache_range:
+
+	mfs	r9, rmsr                                        /* Disable Icache and interrupts before invalidating */
+	andi	r10, r9, ~(MICROBLAZE_MSR_ICACHE_ENABLE | MICROBLAZE_MSR_INTR_ENABLE)
+	mts	rmsr, r10
+
+        andi    r5, r5, -(4 * XPAR_MICROBLAZE_ICACHE_LINE_LEN)  /* Align to cache line */
+
+	add	r6, r5, r6                                      /* Compute end */
+        andi    r6, r6, -(4 * XPAR_MICROBLAZE_ICACHE_LINE_LEN)  /* Align to cache line */
+
+L_start:
+	wic	r5, r0                                          /* Invalidate the Cache (delay slot) */
+
+	cmpu	r18, r5, r6                                     /* Are we at the end ? */
+	blei	r18, L_done
+
+	brid	L_start                                         /* Branch to the beginning of the loop */
+	addik	r5, r5, (XPAR_MICROBLAZE_ICACHE_LINE_LEN * 4)   /* Increment the addrees by 4 (delay slot) */
+
+L_done:
+	rtsd	r15, 8                                          /* Return */
+	mts	rmsr, r9
+	.end	microblaze_init_icache_range
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_interrupt_handler.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_interrupt_handler.c
new file mode 100644
index 0000000..a836b10
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_interrupt_handler.c
@@ -0,0 +1,122 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file microblaze_interrupt_handler.c
+*
+* This file contains the standard interrupt handler for the MicroBlaze processor.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Date     Changes
+* ----- -------- -----------------------------------------------
+* 1.00b 10/03/03 First release
+* 

+*
+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+
+#include "xil_exception.h"
+#include "microblaze_interrupts_i.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+void __interrupt_handler (void) __attribute__ ((interrupt_handler));
+void microblaze_register_handler(XInterruptHandler Handler, void *DataPtr);
+
+/************************** Variable Definitions *****************************/
+
+extern MB_InterruptVectorTableEntry MB_InterruptVectorTable;
+/*****************************************************************************/
+/**
+*
+* This function is the standard interrupt handler used by the MicroBlaze processor.
+* It saves all volatile registers, calls the users top level interrupt handler.
+* When this returns, it restores all registers, and returns using a rtid instruction.
+*
+* @param
+*
+* None
+*
+* @return
+*
+* None.
+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+void __interrupt_handler(void)
+{
+	/* The compiler saves all volatiles and the MSR */
+	(void)MB_InterruptVectorTable.Handler(MB_InterruptVectorTable.CallBackRef);
+	/* The compiler restores all volatiles and MSR, and returns from interrupt */
+}
+
+/****************************************************************************/
+/*****************************************************************************/
+/**
+*
+* Registers a top-level interrupt handler for the MicroBlaze. The
+* argument provided in this call as the DataPtr is used as the argument
+* for the handler when it is called.
+*
+* @param    Top level handler.
+* @param    DataPtr is a reference to data that will be passed to the handler
+*           when it gets called.
+
+* @return   None.
+*
+* @note
+*
+* None.
+*
+****************************************************************************/
+void microblaze_register_handler(XInterruptHandler Handler, void *DataPtr)
+{
+   MB_InterruptVectorTable.Handler = Handler;
+   MB_InterruptVectorTable.CallBackRef = DataPtr;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_interrupts_g.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_interrupts_g.c
new file mode 100644
index 0000000..ed5d350
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_interrupts_g.c
@@ -0,0 +1,64 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file microblaze_interrupts_g.c
+*
+* This file contains the interrupt handler table for the MicroBlaze processor.
+* This file is usually generated by LibGen.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Date     Changes
+* ----- -------- -----------------------------------------------
+* 1.00b 10/03/03 First release
+* 

+*
+******************************************************************************/
+
+#include "microblaze_interrupts_i.h"
+#include "xparameters.h"
+
+
+/* extern void XNullHandler (void *NullParameter) */
+
+/*
+* The interrupt handler table for microblaze processor
+*/
+
+MB_InterruptVectorTableEntry MB_InterruptVectorTable[] =
+{
+   {XNullHandler,
+    (void)XNULL}
+};
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_interrupts_i.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_interrupts_i.h
new file mode 100644
index 0000000..16c6123
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_interrupts_i.h
@@ -0,0 +1,75 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file microblaze_interrupts_i.h
+*
+* This header file contains identifiers and low-level driver functions (or
+* macros) that can be used to access the device.  The user should refer to the
+* hardware device specification for more details of the device operation.
+* High-level driver functions are defined in xintc.h.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Date     Changes
+* ----- -------- -----------------------------------------------
+* 1.00b 10/03/03 First release
+* 

+*
+******************************************************************************/
+
+#ifndef MICROBLAZE_INTERRUPTS_I_H /* prevent circular inclusions */
+#define MICROBLAZE_INTERRUPTS_I_H /* by using protection macros */
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xil_exception.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct
+{
+   XInterruptHandler Handler;
+   void *CallBackRef;
+} MB_InterruptVectorTableEntry;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_cache_ext.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_cache_ext.S
new file mode 100644
index 0000000..3d3d00e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_cache_ext.S
@@ -0,0 +1,66 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* microblaze_invalidate_cache_ext()
+*
+*Invalidate the entire L2 Cache
+*
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN	16
+
+	.text
+	.globl	microblaze_invalidate_cache_ext
+	.ent	microblaze_invalidate_cache_ext
+	.align	2
+
+microblaze_invalidate_cache_ext:
+
+#if ((XPAR_MICROBLAZE_INTERCONNECT==3) && (XPAR_MICROBLAZE_USE_DCACHE==1))
+	addik	r5, r0, XPAR_MICROBLAZE_DCACHE_BASEADDR & (-(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN))
+
+	addik	r6, r0, XPAR_MICROBLAZE_DCACHE_BYTE_SIZE-(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+	andi	r6, r6, -(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+
+Loop_start:
+	wdc.ext.clear	r5, r6
+	bgtid	r6,Loop_start
+	addik	r6, r6,-(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+#endif
+	rtsd	r15, 8
+	nop
+
+	.end	microblaze_invalidate_cache_ext
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_cache_ext_range.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_cache_ext_range.S
new file mode 100644
index 0000000..56606b8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_cache_ext_range.S
@@ -0,0 +1,75 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* microblaze_invalidate_cache_ext_range (unsigned int cacheaddr, unsigned int len)
+*
+*Invalidate an L2 cache range
+*
+*Parameters:
+*	'cacheaddr' - address in the L2 cache where invalidation begins
+*	'len    '   - length (in bytes) worth of Dcache to be invalidated
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN	16
+
+	.text
+	.globl	microblaze_invalidate_cache_ext_range
+	.ent	microblaze_invalidate_cache_ext_range
+	.align	2
+
+microblaze_invalidate_cache_ext_range:
+#if ((XPAR_MICROBLAZE_INTERCONNECT==3) && (XPAR_MICROBLAZE_USE_DCACHE==1))
+	beqi	r6, Loop_done
+
+	add	r6, r5, r6
+	addik	r6, r6, -1
+
+	andi	r6, r6, -(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+	andi	r5, r5, -(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+
+	rsubk	r6, r5, r6
+
+Loop_start:
+	wdc.ext.clear r5, r6
+	bneid	r6, Loop_start
+	addik	r6, r6, -(4 * XPAR_MICROBLAZE_EXT_CACHE_LINE_LEN)
+
+Loop_done:
+#endif
+	rtsd	r15, 8
+	nop
+
+	.end	microblaze_invalidate_cache_ext_range
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_dcache.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_dcache.S
new file mode 100644
index 0000000..1cb9710
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_dcache.S
@@ -0,0 +1,86 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* microblaze_invalidate_dcache()
+*
+*    Invalidate the entire L1 DCache
+*
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define MICROBLAZE_MSR_DCACHE_ENABLE        0x00000080
+#define MICROBLAZE_MSR_INTR_ENABLE          0x00000002
+
+#ifndef XPAR_MICROBLAZE_DCACHE_LINE_LEN
+#define XPAR_MICROBLAZE_DCACHE_LINE_LEN   1
+#endif
+
+#ifndef XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK
+#define MB_VERSION_LT_v720
+#endif
+
+	.text
+	.globl	microblaze_invalidate_dcache
+	.ent	microblaze_invalidate_dcache
+	.align	2
+
+microblaze_invalidate_dcache:
+
+#ifdef MB_VERSION_LT_v720                                       /* Disable Dcache and interrupts before invalidating */
+	mfs	r9, rmsr
+	andi	r10, r9, ~(MICROBLAZE_MSR_DCACHE_ENABLE | MICROBLAZE_MSR_INTR_ENABLE)
+	mts	rmsr, r10
+#endif
+	addik 	r5, r0, XPAR_MICROBLAZE_DCACHE_BASEADDR & (-(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN))
+	addik	r6, r5, XPAR_MICROBLAZE_DCACHE_BYTE_SIZE &  (-(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN))        /* Compute end */
+
+L_start:
+	wdc	r5, r0                                          /* Invalidate the Cache */
+
+	cmpu	r18, r5, r6                                     /* Are we at the end? */
+	blei	r18, L_done
+
+	brid	L_start                                         /* Branch to the beginning of the loop */
+	addik	r5, r5, (XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)   /* Increment the addrees by 4 (delay slot) */
+
+L_done:
+	rtsd	r15, 8                                          /* Return */
+#ifdef MB_VERSION_LT_v720                                       /* restore MSR only for MB version < v7.20 */
+	mts	rmsr, r9
+#else
+        nop
+#endif
+
+	.end	microblaze_invalidate_dcache
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_dcache_range.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_dcache_range.S
new file mode 100644
index 0000000..b3e0abb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_dcache_range.S
@@ -0,0 +1,112 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+*
+* microblaze_invalidate_dcache_range (unsigned int cacheaddr, unsigned int len)
+*
+*    Invalidate a Dcache range
+*
+*    Parameters:
+*       'cacheaddr' - address in the Dcache where invalidation begins
+*	'len    '   - length (in bytes) worth of Dcache to be invalidated
+*
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define MICROBLAZE_MSR_DCACHE_ENABLE        0x00000080
+#define MICROBLAZE_MSR_INTR_ENABLE          0x00000002
+
+#ifndef XPAR_MICROBLAZE_DCACHE_LINE_LEN
+#define XPAR_MICROBLAZE_DCACHE_LINE_LEN     1
+#endif
+
+#ifndef XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK
+#define MB_VERSION_LT_v720
+#define MB_HAS_WRITEBACK_SET 0
+#else
+#define MB_HAS_WRITEBACK_SET XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK
+#endif
+
+	.text
+	.globl	microblaze_invalidate_dcache_range
+	.ent	microblaze_invalidate_dcache_range
+	.align	2
+
+microblaze_invalidate_dcache_range:
+
+
+#ifdef MB_VERSION_LT_v720                                       /* Disable Dcache and interrupts before invalidating */
+	mfs	r9, rmsr
+	andi	r10, r9, ~(MICROBLAZE_MSR_DCACHE_ENABLE | MICROBLAZE_MSR_INTR_ENABLE)
+	mts	rmsr, r10
+#endif
+
+        beqi    r6, L_done                                      /* Skip loop if size is zero */
+
+        add	r6, r5, r6                                      /* Compute end address */
+        addik   r6, r6, -1
+
+        andi    r6, r6, -(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)  /* Align end down to cache line */
+        andi    r5, r5, -(4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)  /* Align start down to cache line */
+
+#if MB_HAS_WRITEBACK_SET == 0                                   /* Use a different scheme for MB version < v7.20 or when caches are write-through */
+
+L_start:
+	cmpu	r18, r5, r6                                     /* Are we at the end? */
+	blti	r18, L_done
+
+	wdc     r5, r0
+
+	brid	L_start                                         /* Branch to the beginning of the loop */
+	addik	r5, r5, (XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)   /* Increment the addrees by 4 (delay slot) */
+#else
+
+        rsubk   r6, r5, r6
+                                                                /* r6 will now contain (count of bytes - (4 * XPAR_MICROBLAZE_DCACHE_LINE_LEN)) */
+L_start:
+        wdc.clear r5, r6                                        /* Invalidate the cache line only if the address matches */
+        bneid   r6, L_start
+        addik   r6, r6, -(XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)
+
+#endif
+
+L_done:
+	rtsd	r15, 8
+#ifdef MB_VERSION_LT_v720                                       /* restore MSR only for MB version < v7.20 */
+	mts	rmsr, r9
+#else
+        nop
+#endif
+	.end	microblaze_invalidate_dcache_range
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_icache.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_icache.S
new file mode 100644
index 0000000..dc448ec
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_icache.S
@@ -0,0 +1,86 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+*
+* microblaze_invalidate_icache()
+*
+*    Invalidate the entire ICache
+*
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define MICROBLAZE_MSR_ICACHE_ENABLE        0x00000020
+#define MICROBLAZE_MSR_INTR_ENABLE          0x00000002
+
+#ifndef XPAR_MICROBLAZE_ICACHE_LINE_LEN
+#define XPAR_MICROBLAZE_ICACHE_LINE_LEN   1
+#endif
+
+#ifndef XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK
+#define MB_VERSION_LT_v720
+#endif
+
+	.text
+	.globl	microblaze_invalidate_icache
+	.ent	microblaze_invalidate_icache
+	.align	2
+
+microblaze_invalidate_icache:
+
+#ifdef MB_VERSION_LT_v720                                       /* Disable Icache and interrupts before invalidating */
+	mfs	r9, rmsr
+	andi	r10, r9, ~(MICROBLAZE_MSR_ICACHE_ENABLE | MICROBLAZE_MSR_INTR_ENABLE)
+	mts	rmsr, r10
+#endif
+        addik 	r5, r0, XPAR_MICROBLAZE_ICACHE_BASEADDR & (-(4 * XPAR_MICROBLAZE_ICACHE_LINE_LEN))  /* Align to cache line */
+	addik	r6, r5, XPAR_MICROBLAZE_CACHE_BYTE_SIZE & (-(4 * XPAR_MICROBLAZE_ICACHE_LINE_LEN))  /* Compute end */
+L_start:
+	wic	r5, r0                                          /* Invalidate the Cache */
+
+	cmpu	r18, r5, r6                                     /* Are we at the end? */
+	blei	r18, L_done
+
+	brid	L_start                                         /* Branch to the beginning of the loop */
+	addik	r5, r5, (XPAR_MICROBLAZE_ICACHE_LINE_LEN * 4)   /* Increment the addrees by 4 (delay slot) */
+
+L_done:
+	rtsd	r15, 8                                          /* Return */
+
+#ifdef MB_VERSION_LT_v720                                       /* restore MSR only for MB version < v7.20 */
+	mts	rmsr, r9
+#else
+        nop
+#endif
+	.end	microblaze_invalidate_icache
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_icache_range.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_icache_range.S
new file mode 100644
index 0000000..29c19e6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_invalidate_icache_range.S
@@ -0,0 +1,96 @@
+/******************************************************************************
+*
+* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+*
+* microblaze_invalidate_icache_range(unsigned int cacheaddr, unsigned int len)
+*
+*    Invalidate an ICache range
+*
+*    Parameters:
+*       'cacheaddr' - address in the Icache where invalidation begins
+*	'len'       - length (in bytes) worth of Icache to be invalidated
+*
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+#define MICROBLAZE_MSR_ICACHE_ENABLE        0x00000020
+#define MICROBLAZE_MSR_INTR_ENABLE          0x00000002
+
+#ifndef XPAR_MICROBLAZE_ICACHE_LINE_LEN
+#define XPAR_MICROBLAZE_ICACHE_LINE_LEN   1
+#endif
+
+#ifndef XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK
+#define MB_VERSION_LT_v720
+#endif
+
+	.text
+	.globl	microblaze_invalidate_icache_range
+	.ent	microblaze_invalidate_icache_range
+	.align	2
+
+microblaze_invalidate_icache_range:
+
+#ifdef MB_VERSION_LT_v720                                       /* Disable Icache and interrupts before invalidating */
+	mfs	r9, rmsr
+	andi	r10, r9, ~(MICROBLAZE_MSR_ICACHE_ENABLE | MICROBLAZE_MSR_INTR_ENABLE)
+	mts	rmsr, r10
+#endif
+
+        beqi    r6, L_done                                      /* Skip loop if size is zero */
+
+        add	r6, r5, r6                                      /* Compute end address */
+        addik   r6, r6, -1
+
+        andi    r6, r6, -(4 * XPAR_MICROBLAZE_ICACHE_LINE_LEN)  /* Align end down to cache line */
+        andi    r5, r5, -(4 * XPAR_MICROBLAZE_ICACHE_LINE_LEN)  /* Align start down to cache line */
+
+L_start:
+	cmpu	r18, r5, r6                                     /* Are we at the end? */
+	blti	r18, L_done
+
+	wic	r5, r0                                          /* Invalidate the cache line */
+
+	brid	L_start                                         /* Branch to the beginning of the loop */
+	addik	r5, r5, (XPAR_MICROBLAZE_ICACHE_LINE_LEN * 4)   /* Increment the addrees by 4 (delay slot) */
+
+L_done:
+	rtsd	r15, 8                                          /* Return */
+#ifdef MB_VERSION_LT_v720                                       /* restore MSR only for MB version < v7.20 */
+	mts	rmsr, r9
+#else
+        nop
+#endif
+	.end	microblaze_invalidate_icache_range
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_scrub.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_scrub.S
new file mode 100644
index 0000000..52aa3e3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_scrub.S
@@ -0,0 +1,211 @@
+/******************************************************************************
+*
+* Copyright (C) 2012 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* microblaze_scrub ()
+*
+*    Scrub LMB memory and all internal BRAMs (data cache, instruction cache,
+*    MMU UTLB and branch target cache) in MicroBlaze to reduce the possibility
+*    of an uncorrectable error when fault tolerance support is enabled.
+*
+*    This routine assumes that the processor is in privileged mode when it is
+*    called, if the MMU is enabled.
+*
+*    Call this routine regularly from a timer interrupt.
+*
+*    Parameters:
+*       None
+*
+*
+*******************************************************************************/
+
+#include "xparameters.h"
+
+/* Define if fault tolerance is used */
+#ifdef XPAR_MICROBLAZE_FAULT_TOLERANT
+  #if XPAR_MICROBLAZE_FAULT_TOLERANT > 0
+    #define FAULT_TOLERANT
+  #endif
+#endif
+
+/* Define if LMB is used and can be scrubbed */
+#if defined(XPAR_MICROBLAZE_D_LMB) &&            \
+	    defined(XPAR_DLMB_CNTLR_BASEADDR) && \
+	    defined(XPAR_DLMB_CNTLR_HIGHADDR)
+  #if XPAR_MICROBLAZE_D_LMB == 1
+    #define HAS_SCRUBBABLE_LMB
+    #define DLMB_MASK (XPAR_DLMB_CNTLR_HIGHADDR - XPAR_DLMB_CNTLR_BASEADDR)
+  #endif
+#endif
+
+/* Set default cache line lengths */
+#ifndef XPAR_MICROBLAZE_DCACHE_LINE_LEN
+  #define XPAR_MICROBLAZE_DCACHE_LINE_LEN   4
+#endif
+
+#ifndef XPAR_MICROBLAZE_ICACHE_LINE_LEN
+  #define XPAR_MICROBLAZE_ICACHE_LINE_LEN   4
+#endif
+
+/* Define if internal Data Cache BRAMs are used */
+#if defined(XPAR_MICROBLAZE_USE_DCACHE) && defined(XPAR_MICROBLAZE_DCACHE_BYTE_SIZE)
+  #if XPAR_MICROBLAZE_USE_DCACHE == 1 && XPAR_MICROBLAZE_DCACHE_BYTE_SIZE > 1024
+    #define HAS_BRAM_DCACHE
+    #define DCACHE_INCREMENT (XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)
+    #define DCACHE_MASK (XPAR_MICROBLAZE_DCACHE_BYTE_SIZE - 1)
+  #endif
+#endif
+
+/* Define if internal Instruction Cache BRAMs are used */
+#if defined(XPAR_MICROBLAZE_USE_ICACHE) && defined(XPAR_MICROBLAZE_CACHE_BYTE_SIZE)
+  #if XPAR_MICROBLAZE_USE_ICACHE == 1 && XPAR_MICROBLAZE_CACHE_BYTE_SIZE > 1024
+    #define HAS_BRAM_ICACHE
+    #define ICACHE_INCREMENT (XPAR_MICROBLAZE_ICACHE_LINE_LEN * 4)
+    #define ICACHE_MASK (XPAR_MICROBLAZE_CACHE_BYTE_SIZE - 1)
+  #endif
+#endif
+
+/* Define if internal MMU UTLB BRAM is used */
+#ifdef XPAR_MICROBLAZE_USE_MMU
+  #if XPAR_MICROBLAZE_USE_MMU > 1
+    #define HAS_BRAM_MMU_UTLB
+  #endif
+#endif
+
+/* Define if internal BTC BRAM is used, and match BTC clear to a complete cache scrub */
+#if defined(XPAR_MICROBLAZE_USE_BRANCH_TARGET_CACHE) && \
+    defined(XPAR_MICROBLAZE_BRANCH_TARGET_CACHE_SIZE)
+  #if XPAR_MICROBLAZE_USE_BRANCH_TARGET_CACHE == 1
+    #if XPAR_MICROBLAZE_BRANCH_TARGET_CACHE_SIZE == 0 || \
+	XPAR_MICROBLAZE_BRANCH_TARGET_CACHE_SIZE >  4
+      #define HAS_BRAM_BRANCH_TARGET_CACHE
+      #ifdef HAS_BRAM_DCACHE
+	#define BTC_MASK_D (XPAR_MICROBLAZE_DCACHE_BYTE_SIZE/DCACHE_INCREMENT-1)
+      #else
+	#define BTC_MASK_D 256
+      #endif
+      #ifdef HAS_BRAM_ICACHE
+	#define BTC_MASK_I (XPAR_MICROBLAZE_CACHE_BYTE_SIZE/ICACHE_INCREMENT-1)
+      #else
+	#define BTC_MASK_I 256
+      #endif
+      #if BTC_MASK_D > BTC_MASK_I
+	#define BTC_MASK BTC_MASK_D
+      #else
+	#define BTC_MASK BTC_MASK_I
+      #endif
+    #endif
+  #endif
+#endif
+
+/* Define index offsets to persistent data used by this routine */
+#define DLMB_INDEX_OFFSET     0
+#define DCACHE_INDEX_OFFSET   4
+#define ICACHE_INDEX_OFFSET   8
+#define MMU_INDEX_OFFSET      12
+#define BTC_CALL_COUNT_OFFSET 16
+
+	.text
+	.globl	microblaze_scrub
+	.ent	microblaze_scrub
+	.align	2
+
+microblaze_scrub:
+#ifdef FAULT_TOLERANT
+	la	r6, r0, L_persistent_data		/* Get pointer to data */
+
+#ifdef HAS_SCRUBBABLE_LMB
+L_dlmb:
+	lwi	r5, r6, DLMB_INDEX_OFFSET		/* Get dlmb index */
+	lw	r7, r5, r0				/* Load and store */
+	sw	r7, r5, r0
+	addik	r5, r5, 4				/* Increment and save dlmb index */
+	andi	r5, r5, DLMB_MASK
+	swi	r5, r6, DLMB_INDEX_OFFSET
+#endif /* HAS_SCRUBBABLE_LMB */
+
+#ifdef HAS_BRAM_DCACHE
+L_dcache:
+	lwi	r5, r6, DCACHE_INDEX_OFFSET		/* Get dcache line index */
+	wdc	r5, r0					/* Invalidate data cache line */
+	addik	r5, r5, DCACHE_INCREMENT		/* Increment and save entry index */
+	andi	r5, r5, DCACHE_MASK
+	swi	r5, r6, DCACHE_INDEX_OFFSET
+#endif /* HAS_BRAM_DCACHE */
+
+#ifdef HAS_BRAM_ICACHE
+L_icache:
+	lwi	r5, r6, ICACHE_INDEX_OFFSET		/* Get icache line index */
+	wic	r5, r0					/* Invalidate data cache line */
+	addik	r5, r5, ICACHE_INCREMENT		/* Increment and save entry index */
+	andi	r5, r5, ICACHE_MASK
+	swi	r5, r6, ICACHE_INDEX_OFFSET
+#endif /* HAS_BRAM_ICACHE */
+
+#ifdef HAS_BRAM_MMU_UTLB
+L_mmu:
+	lwi	r5, r6, MMU_INDEX_OFFSET		/* Get UTLB entry index */
+	mts	rtlbx, r5				/* Access next entry in UTLB */
+	mts	rtlbhi, r0				/* Clear the UTLB entry */
+
+	addik	r5, r5, 1				/* Increment and save entry index */
+	andi	r5, r5, 0x3F
+	swi	r5, r6, MMU_INDEX_OFFSET
+#endif /* HAS_BRAM_MMU_UTLB */
+
+#ifdef HAS_BRAM_BRANCH_TARGET_CACHE
+L_btc:
+	lwi	r5, r6, BTC_CALL_COUNT_OFFSET		/* Get BTC call count offset */
+	addik	r5, r5, 1				/* Increment and save call count */
+	andi	r5, r5, BTC_MASK
+	swi	r5, r6, BTC_CALL_COUNT_OFFSET
+
+	bnei	r5, L_skip_btc_scrub			/* Skip scrub unless count wrap */
+	bri	4					/* Clear branch target cache */
+L_skip_btc_scrub:
+#endif /* HAS_BRAM_BRANCH_TARGET_CACHE */
+
+#endif /* FAULT_TOLERANT */
+L_done:
+	rtsd	r15, 8					/* Return */
+	nop
+	.end	microblaze_scrub
+
+	/* Persistent data used by this routine */
+	.data
+	.align	2
+L_persistent_data:
+	.long	0					/* dlmb index      */
+	.long	0					/* dcache index    */
+	.long	0					/* icache index    */
+	.long	0					/* mmu entry index */
+	.long	0					/* btc call count  */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_sleep.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_sleep.c
new file mode 100644
index 0000000..04218c7
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_sleep.c
@@ -0,0 +1,103 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file microblaze_sleep.c
+*
+* Contains implementation of microblaze sleep function.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 4.1   hk   04/18/14 Add sleep function.
+*
+* 

+*
+* @note
+*
+* This file may contain architecture-dependent code.
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "microblaze_sleep.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+
+/*****************************************************************************/
+/**
+*
+* Provides delay for requested duration.
+*
+* @param	Delay time in milliseconds.
+*
+* @return	None.
+*
+* @note		Instruction cache should be enabled for this to work.
+*
+******************************************************************************/
+void MB_Sleep(u32 MilliSeconds)
+{
+	if (((mfmsr() & 0x20U) == 0U)) {
+		/*
+		 * Instruction cache not enabled.
+		 * Delay will be much higher than expected.
+		 */
+	}
+
+	asm volatile ("\n"
+			"1:               \n\t"
+			"addik r7, r0, %0 \n\t"
+			"2:               \n\t"
+			"addik r7, r7, -1 \n\t"
+			"bneid  r7, 2b    \n\t"
+			"or  r0, r0, r0   \n\t"
+			"bneid %1, 1b     \n\t"
+			"addik %1, %1, -1 \n\t"
+			:: "i"(ITERS_PER_MSEC), "d" (MilliSeconds));
+
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_sleep.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_sleep.h
new file mode 100644
index 0000000..4eae127
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_sleep.h
@@ -0,0 +1,83 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file microblaze_sleep.h
+*
+* Contains microblaze sleep function API.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 4.1   asa  04/18/14 Add sleep function - first release.
+*
+* 

+*
+* @note
+*
+* This file may contain architecture-dependent items.
+*
+******************************************************************************/
+
+#ifndef MICROBLAZE_SLEEP_H		/* prevent circular inclusions */
+#define MICROBLAZE_SLEEP_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "mb_interface.h"
+#include "xparameters.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Type Definitions *******************************/
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#define ITERS_PER_MSEC   ((XPAR_CPU_CORE_CLOCK_FREQ_HZ / 1000) / 6)
+
+/************************** Function Prototypes ******************************/
+
+void MB_Sleep(u32 MilliSeconds);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_update_dcache.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_update_dcache.S
new file mode 100644
index 0000000..6444069
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_update_dcache.S
@@ -0,0 +1,106 @@
+/******************************************************************************
+*
+* Copyright (C) 2006 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+*
+* File   : microblaze_update_dcache.s
+* Date   : 2003, September 24
+* Company: Xilinx
+* Group  : Emerging Software Technologies
+*
+* Summary:
+* Update dcache on the microblaze.
+* Takes in three parameters
+*	r5 : Cache Tag Line
+*	r6 : Cache Data
+*	r7 : Lock/Valid information
+*		Bit 30 is Lock  [ 1 indicates locked ]
+*		Bit 31 is Valid [ 1 indicates valid ]
+*
+*	--------------------------------------------------------------
+*	|  Lock	 |     Valid  | Effect
+*	--------------------------------------------------------------
+*	|   0    |      0     | Invalidate Cache
+*       |   0    |      1     | Valid, but unlocked cacheline
+*       |   1    |      0     | Invalidate Cache, No effect of lock
+*       |   1    |      1     | Valid cache. Locked to a
+*       |        |            | particular addrees
+*	--------------------------------------------------------------
+*
+*
+**********************************************************************************/
+#include "xparameters.h"
+
+#ifndef XPAR_MICROBLAZE_DCACHE_LINE_LEN
+#define XPAR_MICROBLAZE_DCACHE_LINE_LEN   1
+#endif
+
+	.text
+	.globl	microblaze_update_dcache
+	.ent	microblaze_update_dcache
+	.align	2
+microblaze_update_dcache:
+
+#if XPAR_MICROBLAZE_DCACHE_LINE_LEN == 1
+
+/* Read the MSR register into a temp register */
+	mfs	r18, rmsr
+
+/* Clear the dcache enable bit to disable the cache
+   Register r10,r18 are  volatile registers and hence do not need to be saved before use */
+	andi	r10, r18, ~128
+	mts	rmsr, r10
+
+/* Update the lock and valid info */
+	andi	r5, r5, 0xfffffffc
+	or	r5, r5, r7
+
+/* Update dcache */
+	wdc	r5, r6
+
+/* Return */
+	rtsd	r15, 8
+	mts	rmsr, r18
+
+#else
+
+        /* The only valid usage of this routine for larger cache line lengths is to invalidate a data cache line
+           So call microblaze_init_dcache_range appropriately to do the job   */
+
+        brid    microblaze_init_dcache_range
+        addik   r6, r0, (XPAR_MICROBLAZE_DCACHE_LINE_LEN * 4)
+
+        /* We don't have a return instruction here. This is tail call optimization :) */
+
+#endif /* XPAR_MICROBLAZE_DCACHE_LINE_LEN == 1 */
+
+	.end	microblaze_update_dcache
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_update_icache.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_update_icache.S
new file mode 100644
index 0000000..e0203fa
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/microblaze_update_icache.S
@@ -0,0 +1,105 @@
+/******************************************************************************
+*
+* Copyright (C) 2006 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/******************************************************************************
+*
+* File   : microblaze_update_icache.s
+* Date   : 2003, September 24
+* Company: Xilinx
+* Group  : Emerging Software Technologies
+*
+* Summary:
+* Update icache on the microblaze.
+* Takes in three parameters
+*	r5 : Cache Tag Line
+*	r6 : Cache Data
+*	r7 : Lock/Valid information
+*		Bit 30 is Lock  [ 1 indicates locked ]
+*		Bit 31 is Valid [ 1 indicates valid ]
+*
+*	--------------------------------------------------------------
+*	|  Lock	 |     Valid  | Effect
+*	--------------------------------------------------------------
+*	|   0    |      0     | Invalidate Cache
+*       |   0    |      1     | Valid, but unlocked cacheline
+*       |   1    |      0     | Invalidate Cache, No effect of lock
+*       |   1    |      1     | Valid cache. Locked to a
+*       |        |            | particular addrees
+*	--------------------------------------------------------------
+*
+*
+**********************************************************************************/
+#include "xparameters.h"
+
+#ifndef XPAR_MICROBLAZE_ICACHE_LINE_LEN
+#define XPAR_MICROBLAZE_ICACHE_LINE_LEN   1
+#endif
+
+	.text
+	.globl	microblaze_update_icache
+	.ent	microblaze_update_icache
+	.align	2
+microblaze_update_icache:
+
+#if XPAR_MICROBLAZE_ICACHE_LINE_LEN == 1
+
+/* Read the MSR register into a temp register */
+	mfs	r18, rmsr
+
+/* Clear the icache enable bit to disable the cache
+   Register r10,r18 are  volatile registers and hence do not need to be saved before use */
+	andi	r10, r18, ~32
+	mts	rmsr, r10
+
+/* Update the lock and valid info */
+	andi	r5, r5, 0xfffffffc
+	or	r5, r5, r7
+
+/* Update icache */
+	wic	r5, r6
+
+/* Return */
+	rtsd	r15, 8
+	mts	rmsr, r18
+
+#else
+
+        /* The only valid usage of this routine for larger cache line lengths is to invalidate an instruction cache line
+           So call microblaze_init_icache_range appropriately to do the job   */
+
+        brid    microblaze_init_icache_range
+        addik   r6, r0, (XPAR_MICROBLAZE_ICACHE_LINE_LEN * 4)
+
+        /* We don't have a return instruction here. This is tail call optimization :) */
+
+#endif /* XPAR_MICROBLAZE_ICACHE_LINE_LEN == 1 */
+
+	.end	microblaze_update_icache
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/pvr.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/pvr.c
new file mode 100644
index 0000000..3c2e3b5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/pvr.c
@@ -0,0 +1,82 @@
+/******************************************************************************
+*
+* Copyright (C) 2006 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file pvr.c
+*
+* This header file contains defines for structures used by the microblaze
+* PVR routines
+*
+******************************************************************************/
+#include "xparameters.h"
+#include "pvr.h"
+#include 
+
+/* Definitions */
+int microblaze_get_pvr (pvr_t *pvr)
+{
+  if (!pvr)
+    return -1;
+
+  bzero ((void*)pvr, sizeof (pvr_t));
+
+#ifdef MICROBLAZE_PVR_NONE
+  return -1;
+#else
+  getpvr (0, pvr->pvr[0]);
+#endif  /* MICROBLAZE_PVR_NONE */
+
+#ifdef MICROBLAZE_PVR_FULL
+  getpvr (1, pvr->pvr[1]);
+  getpvr (2, pvr->pvr[2]);
+  getpvr (3, pvr->pvr[3]);
+
+  getpvr (4, pvr->pvr[4]);
+  getpvr (5, pvr->pvr[5]);
+  getpvr (6, pvr->pvr[6]);
+  getpvr (7, pvr->pvr[7]);
+
+  getpvr (8, pvr->pvr[8]);
+  getpvr (9, pvr->pvr[9]);
+  getpvr (10, pvr->pvr[10]);
+  getpvr (11, pvr->pvr[11]);
+
+/*   getpvr (12, pvr->pvr[12]); */
+/*   getpvr (13, pvr->pvr[13]); */
+/*   getpvr (14, pvr->pvr[14]); */
+/*   getpvr (15, pvr->pvr[15]); */
+
+#endif  /* MICROBLAZE_PVR_FULL  */
+
+  return 0;
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/pvr.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/pvr.h
new file mode 100644
index 0000000..e88ac83
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/pvr.h
@@ -0,0 +1,276 @@
+/******************************************************************************
+*
+* Copyright (C) 2006 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file pvr.h
+*
+* This header file contains defines for structures used by the microblaze
+* PVR routines
+*
+******************************************************************************/
+
+#ifndef _PVR_H
+#define _PVR_H
+
+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xparameters.h"
+#include "mb_interface.h"
+#include "bspconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/* Defs */
+typedef struct pvr_s {
+#ifdef MICROBLAZE_PVR_FULL
+  unsigned int  pvr[16];
+#else
+  unsigned int  pvr[1];
+#endif
+} pvr_t;
+
+
+#define getpvr(pvrid, val)      asm volatile ("mfs\t%0,rpvr" stringify(pvrid) "\n\t" : "=d" (val))
+
+/* Basic PVR mask */
+#define MICROBLAZE_PVR0_PVR_FULL_MASK               0x80000000
+#define MICROBLAZE_PVR0_USE_BARREL_MASK             0x40000000
+#define MICROBLAZE_PVR0_USE_DIV_MASK                0x20000000
+#define MICROBLAZE_PVR0_USE_HW_MUL_MASK             0x10000000
+#define MICROBLAZE_PVR0_USE_FPU_MASK                0x08000000
+#define MICROBLAZE_PVR0_USE_EXCEPTION_MASK          0x04000000
+#define MICROBLAZE_PVR0_USE_ICACHE_MASK             0x02000000
+#define MICROBLAZE_PVR0_USE_DCACHE_MASK             0x01000000
+#define MICROBLAZE_PVR0_USE_MMU_MASK                0x00800000
+#define MICROBLAZE_PVR0_USE_BTC_MASK                0x00400000
+#define MICROBLAZE_PVR0_ENDIANNESS_MASK             0x00200000
+#define MICROBLAZE_PVR0_FAULT_TOLERANT_MASK         0x00100000
+#define MICROBLAZE_PVR0_STACK_PROTECTION_MASK       0x00080000
+#define MICROBLAZE_PVR0_MICROBLAZE_VERSION_MASK     0x0000FF00
+#define MICROBLAZE_PVR0_USER1_MASK                  0x000000FF
+
+/* User 2 PVR mask */
+#define MICROBLAZE_PVR1_USER2_MASK                  0xFFFFFFFF
+
+/* Configuration PVR masks */
+#define MICROBLAZE_PVR2_D_AXI_MASK                  0x80000000
+#define MICROBLAZE_PVR2_D_LMB_MASK                  0x40000000
+#define MICROBLAZE_PVR2_D_PLB_MASK                  0x02000000
+#define MICROBLAZE_PVR2_I_AXI_MASK                  0x20000000
+#define MICROBLAZE_PVR2_I_LMB_MASK                  0x10000000
+#define MICROBLAZE_PVR2_I_PLB_MASK                  0x01000000
+#define MICROBLAZE_PVR2_INTERRUPT_IS_EDGE_MASK      0x08000000
+#define MICROBLAZE_PVR2_EDGE_IS_POSITIVE_MASK       0x04000000
+#define MICROBLAZE_PVR2_INTERCONNECT_MASK           0x00800000
+#define MICROBLAZE_PVR2_STREAM_INTERCONNECT_MASK    0x00400000
+#define MICROBLAZE_PVR2_USE_EXTENDED_FSL_INSTR_MASK 0x00080000
+#define MICROBLAZE_PVR2_USE_MSR_INSTR_MASK          0x00020000
+#define MICROBLAZE_PVR2_USE_PCMP_INSTR_MASK         0x00010000
+#define MICROBLAZE_PVR2_AREA_OPTIMIZED_MASK         0x00008000
+#define MICROBLAZE_PVR2_USE_BARREL_MASK             0x00004000
+#define MICROBLAZE_PVR2_USE_DIV_MASK                0x00002000
+#define MICROBLAZE_PVR2_USE_HW_MUL_MASK             0x00001000
+#define MICROBLAZE_PVR2_USE_FPU_MASK                0x00000800
+#define MICROBLAZE_PVR2_USE_FPU2_MASK               0x00000200
+#define MICROBLAZE_PVR2_USE_MUL64_MASK              0x00000400
+#define MICROBLAZE_PVR2_OPCODE_0x0_ILLEGAL_MASK     0x00000040
+#define MICROBLAZE_PVR2_UNALIGNED_EXCEPTION_MASK    0x00000020
+#define MICROBLAZE_PVR2_ILL_OPCODE_EXCEPTION_MASK   0x00000010
+#define MICROBLAZE_PVR2_M_AXI_I_BUS_EXCEPTION_MASK  0x00000008
+#define MICROBLAZE_PVR2_M_AXI_D_BUS_EXCEPTION_MASK  0x00000004
+#define MICROBLAZE_PVR2_IPLB_BUS_EXCEPTION_MASK     0x00000100
+#define MICROBLAZE_PVR2_DPLB_BUS_EXCEPTION_MASK     0x00000080
+#define MICROBLAZE_PVR2_DIV_ZERO_EXCEPTION_MASK     0x00000002
+#define MICROBLAZE_PVR2_FPU_EXCEPTION_MASK          0x00000001
+#define MICROBLAZE_PVR2_FSL_EXCEPTION_MASK          0x00040000
+
+/* Debug and exception PVR masks */
+#define MICROBLAZE_PVR3_DEBUG_ENABLED_MASK          0x80000000
+#define MICROBLAZE_PVR3_NUMBER_OF_PC_BRK_MASK       0x1E000000
+#define MICROBLAZE_PVR3_NUMBER_OF_RD_ADDR_BRK_MASK  0x00380000
+#define MICROBLAZE_PVR3_NUMBER_OF_WR_ADDR_BRK_MASK  0x0000E000
+#define MICROBLAZE_PVR3_FSL_LINKS_MASK              0x00000380
+#define MICROBLAZE_PVR3_BTC_SIZE_MASK               0x00000007
+
+/* ICache config PVR masks */
+#define MICROBLAZE_PVR4_USE_ICACHE_MASK              0x80000000
+#define MICROBLAZE_PVR4_ICACHE_ADDR_TAG_BITS_MASK    0x7C000000
+#define MICROBLAZE_PVR4_ICACHE_ALLOW_WR_MASK         0x01000000
+#define MICROBLAZE_PVR4_ICACHE_LINE_LEN_MASK         0x00E00000
+#define MICROBLAZE_PVR4_ICACHE_BYTE_SIZE_MASK        0x001F0000
+#define MICROBLAZE_PVR4_ICACHE_ALWAYS_USED_MASK      0x00008000
+#define MICROBLAZE_PVR4_ICACHE_INTERFACE_MASK        0x00002000
+#define MICROBLAZE_PVR4_ICACHE_VICTIMS_MASK          0x00001C00
+#define MICROBLAZE_PVR4_ICACHE_STREAMS_MASK          0x00000300
+#define MICROBLAZE_PVR4_ICACHE_FORCE_TAG_LUTRAM_MASK 0x00000080
+#define MICROBLAZE_PVR4_ICACHE_DATA_WIDTH_MASK       0x00000040
+
+/* DCache config PVR masks */
+#define MICROBLAZE_PVR5_USE_DCACHE_MASK              0x80000000
+#define MICROBLAZE_PVR5_DCACHE_ADDR_TAG_BITS_MASK    0x7C000000
+#define MICROBLAZE_PVR5_DCACHE_ALLOW_WR_MASK         0x01000000
+#define MICROBLAZE_PVR5_DCACHE_LINE_LEN_MASK         0x00E00000
+#define MICROBLAZE_PVR5_DCACHE_BYTE_SIZE_MASK        0x001F0000
+#define MICROBLAZE_PVR5_DCACHE_ALWAYS_USED_MASK      0x00008000
+#define MICROBLAZE_PVR5_DCACHE_USE_WRITEBACK_MASK    0x00004000
+#define MICROBLAZE_PVR5_DCACHE_INTERFACE_MASK        0x00002000
+#define MICROBLAZE_PVR5_DCACHE_VICTIMS_MASK          0x00001C00
+#define MICROBLAZE_PVR5_DCACHE_FORCE_TAG_LUTRAM_MASK 0x00000080
+#define MICROBLAZE_PVR5_DCACHE_DATA_WIDTH_MASK       0x00000040
+
+/* ICache base address PVR mask */
+#define MICROBLAZE_PVR6_ICACHE_BASEADDR_MASK        0xFFFFFFFF
+
+/* ICache high address PVR mask */
+#define MICROBLAZE_PVR7_ICACHE_HIGHADDR_MASK        0xFFFFFFFF
+
+/* DCache base address PVR mask */
+#define MICROBLAZE_PVR8_DCACHE_BASEADDR_MASK        0xFFFFFFFF
+
+/* DCache high address PVR mask */
+#define MICROBLAZE_PVR9_DCACHE_HIGHADDR_MASK        0xFFFFFFFF
+
+/* Target family PVR mask */
+#define MICROBLAZE_PVR10_TARGET_FAMILY_MASK         0xFF000000
+
+/* MSR Reset value PVR mask */
+#define MICROBLAZE_PVR11_MSR_RESET_VALUE_MASK       0x000007FF
+
+/* MMU value PVR mask */
+#define MICROBLAZE_PVR11_MMU_MASK                   0xC0000000
+#define MICROBLAZE_PVR11_MMU_ITLB_SIZE_MASK         0x38000000
+#define MICROBLAZE_PVR11_MMU_DTLB_SIZE_MASK         0x07000000
+#define MICROBLAZE_PVR11_MMU_TLB_ACCESS_MASK        0x00C00000
+#define MICROBLAZE_PVR11_MMU_ZONES_MASK             0x003E0000
+#define MICROBLAZE_PVR11_MMU_PRIVILEGED_INSTR_MASK  0x00010000
+
+/* PVR access macros */
+#define MICROBLAZE_PVR_IS_FULL(_pvr)                 (_pvr.pvr[0] & MICROBLAZE_PVR0_PVR_FULL_MASK)
+#define MICROBLAZE_PVR_USE_BARREL(_pvr)              (_pvr.pvr[0] & MICROBLAZE_PVR0_USE_BARREL_MASK)
+#define MICROBLAZE_PVR_USE_DIV(_pvr)                 (_pvr.pvr[0] & MICROBLAZE_PVR0_USE_DIV_MASK)
+#define MICROBLAZE_PVR_USE_HW_MUL(_pvr)              (_pvr.pvr[0] & MICROBLAZE_PVR0_USE_HW_MUL_MASK)
+#define MICROBLAZE_PVR_USE_FPU(_pvr)                 (_pvr.pvr[0] & MICROBLAZE_PVR0_USE_FPU_MASK)
+#define MICROBLAZE_PVR_USE_ICACHE(_pvr)              (_pvr.pvr[0] & MICROBLAZE_PVR0_USE_ICACHE_MASK)
+#define MICROBLAZE_PVR_USE_DCACHE(_pvr)              (_pvr.pvr[0] & MICROBLAZE_PVR0_USE_DCACHE_MASK)
+#define MICROBLAZE_PVR_USE_MMU(_pvr)                 (_pvr.pvr[0] & MICROBLAZE_PVR0_USE_MMU_MASK)
+#define MICROBLAZE_PVR_USE_BTC(_pvr)                 (_pvr.pvr[0] & MICROBLAZE_PVR0_USE_BTC_MASK)
+#define MICROBLAZE_PVR_ENDIANNESS(_pvr)              (_pvr.pvr[0] & MICROBLAZE_PVR0_ENDIANNESS_MASK)
+#define MICROBLAZE_PVR_FAULT_TOLERANT(_pvr)          (_pvr.pvr[0] & MICROBLAZE_PVR0_FAULT_TOLERANT_MASK)
+#define MICROBLAZE_PVR_STACK_PROTECTION(_pvr)        (_pvr.pvr[0] & MICROBLAZE_PVR0_STACK_PROTECTION_MASK)
+#define MICROBLAZE_PVR_MICROBLAZE_VERSION(_pvr)      ((_pvr.pvr[0] & MICROBLAZE_PVR0_MICROBLAZE_VERSION_MASK) >> 8)
+#define MICROBLAZE_PVR_USER1(_pvr)                   (_pvr.pvr[0] & MICROBLAZE_PVR0_USER1_MASK)
+
+#define MICROBLAZE_PVR_USER2(_pvr)                   (_pvr.pvr[1] & MICROBLAZE_PVR1_USER2_MASK)
+
+#define MICROBLAZE_PVR_D_AXI(_pvr)                   (_pvr.pvr[2] & MICROBLAZE_PVR2_D_AXI_MASK)
+#define MICROBLAZE_PVR_D_LMB(_pvr)                   (_pvr.pvr[2] & MICROBLAZE_PVR2_D_LMB_MASK)
+#define MICROBLAZE_PVR_D_PLB(_pvr)                   (_pvr.pvr[2] & MICROBLAZE_PVR2_D_PLB_MASK)
+#define MICROBLAZE_PVR_I_AXI(_pvr)                   (_pvr.pvr[2] & MICROBLAZE_PVR2_I_AXI_MASK)
+#define MICROBLAZE_PVR_I_LMB(_pvr)                   (_pvr.pvr[2] & MICROBLAZE_PVR2_I_LMB_MASK)
+#define MICROBLAZE_PVR_I_PLB(_pvr)                   (_pvr.pvr[2] & MICROBLAZE_PVR2_I_PLB_MASK)
+#define MICROBLAZE_PVR_INTERRUPT_IS_EDGE(_pvr)       (_pvr.pvr[2] & MICROBLAZE_PVR2_INTERRUPT_IS_EDGE_MASK)
+#define MICROBLAZE_PVR_EDGE_IS_POSITIVE(_pvr)        (_pvr.pvr[2] & MICROBLAZE_PVR2_EDGE_IS_POSITIVE_MASK)
+#define MICROBLAZE_PVR_INTERCONNECT(_pvr)            (_pvr.pvr[2] & MICROBLAZE_PVR2_INTERCONNECT_MASK)
+#define MICROBLAZE_PVR_STREAM_INTERCONNECT(_pvr)     (_pvr.pvr[2] & MICROBLAZE_PVR2_STREAM_INTERCONNECT_MASK)
+#define MICROBLAZE_PVR_USE_EXTENDED_FSL_INSTR(_pvr)  (_pvr.pvr[2] & MICROBLAZE_PVR2_USE_EXTENDED_FSL_INSTR_MASK)
+#define MICROBLAZE_PVR_USE_MSR_INSTR(_pvr)           (_pvr.pvr[2] & MICROBLAZE_PVR2_USE_MSR_INSTR_MASK)
+#define MICROBLAZE_PVR_USE_PCMP_INSTR(_pvr)          (_pvr.pvr[2] & MICROBLAZE_PVR2_USE_PCMP_INSTR_MASK)
+#define MICROBLAZE_PVR_AREA_OPTIMIZED(_pvr)          (_pvr.pvr[2] & MICROBLAZE_PVR2_AREA_OPTIMIZED_MASK)
+#define MICROBLAZE_PVR_USE_MUL64(_pvr)               (_pvr.pvr[2] & MICROBLAZE_PVR2_USE_MUL64_MASK)
+#define MICROBLAZE_PVR_OPCODE_0x0_ILLEGAL(_pvr)      (_pvr.pvr[2] & MICROBLAZE_PVR2_OPCODE_0x0_ILLEGAL_MASK)
+#define MICROBLAZE_PVR_UNALIGNED_EXCEPTION(_pvr)     (_pvr.pvr[2] & MICROBLAZE_PVR2_UNALIGNED_EXCEPTION_MASK)
+#define MICROBLAZE_PVR_ILL_OPCODE_EXCEPTION(_pvr)    (_pvr.pvr[2] & MICROBLAZE_PVR2_ILL_OPCODE_EXCEPTION_MASK)
+#define MICROBLAZE_PVR_M_AXI_I_BUS_EXCEPTION(_pvr)   (_pvr.pvr[2] & MICROBLAZE_PVR2_M_AXI_I_BUS_EXCEPTION_MASK)
+#define MICROBLAZE_PVR_IPLB_BUS_EXCEPTION(_pvr)      (_pvr.pvr[2] & MICROBLAZE_PVR2_IPLB_BUS_EXCEPTION_MASK)
+#define MICROBLAZE_PVR_M_AXI_D_BUS_EXCEPTION(_pvr)   (_pvr.pvr[2] & MICROBLAZE_PVR2_M_AXI_D_BUS_EXCEPTION_MASK)
+#define MICROBLAZE_PVR_DPLB_BUS_EXCEPTION(_pvr)      (_pvr.pvr[2] & MICROBLAZE_PVR2_DPLB_BUS_EXCEPTION_MASK)
+#define MICROBLAZE_PVR_DIV_ZERO_EXCEPTION(_pvr)      (_pvr.pvr[2] & MICROBLAZE_PVR2_DIV_ZERO_EXCEPTION_MASK)
+#define MICROBLAZE_PVR_FPU_EXCEPTION(_pvr)           (_pvr.pvr[2] & MICROBLAZE_PVR2_FPU_EXCEPTION_MASK)
+#define MICROBLAZE_PVR_FSL_EXCEPTION(_pvr)           (_pvr.pvr[2] & MICROBLAZE_PVR2_FSL_EXCEPTION_MASK)
+
+#define MICROBLAZE_PVR_DEBUG_ENABLED(_pvr)           (_pvr.pvr[3] & MICROBLAZE_PVR3_DEBUG_ENABLED_MASK)
+#define MICROBLAZE_PVR_NUMBER_OF_PC_BRK(_pvr)        ((_pvr.pvr[3] & MICROBLAZE_PVR3_NUMBER_OF_PC_BRK_MASK) >> 25)
+#define MICROBLAZE_PVR_NUMBER_OF_RD_ADDR_BRK(_pvr)   ((_pvr.pvr[3] & MICROBLAZE_PVR3_NUMBER_OF_RD_ADDR_BRK_MASK) >> 19)
+#define MICROBLAZE_PVR_NUMBER_OF_WR_ADDR_BRK(_pvr)   ((_pvr.pvr[3] & MICROBLAZE_PVR3_NUMBER_OF_WR_ADDR_BRK_MASK) >> 13)
+#define MICROBLAZE_PVR_FSL_LINKS(_pvr)               ((_pvr.pvr[3] & MICROBLAZE_PVR3_FSL_LINKS_MASK) >> 7)
+#define MICROBLAZE_PVR_BTC_SIZE(_pvr)                (_pvr.pvr[3] & MICROBLAZE_PVR3_BTC_SIZE_MASK)
+
+#define MICROBLAZE_PVR_ICACHE_ADDR_TAG_BITS(_pvr)    ((_pvr.pvr[4] & MICROBLAZE_PVR4_ICACHE_ADDR_TAG_BITS_MASK) >> 26)
+#define MICROBLAZE_PVR_ICACHE_ALLOW_WR(_pvr)         (_pvr.pvr[4] & MICROBLAZE_PVR4_ICACHE_ALLOW_WR_MASK)
+#define MICROBLAZE_PVR_ICACHE_LINE_LEN(_pvr)         (1 << ((_pvr.pvr[4] & MICROBLAZE_PVR4_ICACHE_LINE_LEN_MASK) >> 21))
+#define MICROBLAZE_PVR_ICACHE_BYTE_SIZE(_pvr)        (1 << ((_pvr.pvr[4] & MICROBLAZE_PVR4_ICACHE_BYTE_SIZE_MASK) >> 16))
+#define MICROBLAZE_PVR_ICACHE_ALWAYS_USED(_pvr)      (_pvr.pvr[4] & MICROBLAZE_PVR4_ICACHE_ALWAYS_USED_MASK)
+#define MICROBLAZE_PVR_ICACHE_INTERFACE(_pvr)        (_pvr.pvr[4] & MICROBLAZE_PVR4_ICACHE_INTERFACE_MASK)
+#define MICROBLAZE_PVR_ICACHE_VICTIMS(_pvr)          ((_pvr.pvr[4] & MICROBLAZE_PVR4_ICACHE_VICTIMS_MASK) >> 10)
+#define MICROBLAZE_PVR_ICACHE_STREAMS(_pvr)          ((_pvr.pvr[4] & MICROBLAZE_PVR4_ICACHE_STREAMS_MASK) >> 8)
+#define MICROBLAZE_PVR_ICACHE_FORCE_TAG_LUTRAM(_pvr) (_pvr.pvr[4] & MICROBLAZE_PVR4_ICACHE_FORCE_TAG_LUTRAM_MASK)
+#define MICROBLAZE_PVR_ICACHE_DATA_WIDTH(_pvr)       (_pvr.pvr[4] & MICROBLAZE_PVR4_ICACHE_DATA_WIDTH_MASK)
+
+#define MICROBLAZE_PVR_DCACHE_ADDR_TAG_BITS(_pvr)    ((_pvr.pvr[5] & MICROBLAZE_PVR5_DCACHE_ADDR_TAG_BITS_MASK) >> 26)
+#define MICROBLAZE_PVR_DCACHE_ALLOW_WR(_pvr)         (_pvr.pvr[5] & MICROBLAZE_PVR5_DCACHE_ALLOW_WR_MASK)
+#define MICROBLAZE_PVR_DCACHE_LINE_LEN(_pvr)         (1 << ((_pvr.pvr[5] & MICROBLAZE_PVR5_DCACHE_LINE_LEN_MASK) >> 21))
+#define MICROBLAZE_PVR_DCACHE_BYTE_SIZE(_pvr)        (1 << ((_pvr.pvr[5] & MICROBLAZE_PVR5_DCACHE_BYTE_SIZE_MASK) >> 16))
+#define MICROBLAZE_PVR_DCACHE_ALWAYS_USED(_pvr)      (_pvr.pvr[5] & MICROBLAZE_PVR5_DCACHE_ALWAYS_USED_MASK)
+#define MICROBLAZE_PVR_DCACHE_USE_WRITEBACK(_pvr)    (_pvr.pvr[5] & MICROBLAZE_PVR5_DCACHE_USE_WRITEBACK_MASK)
+#define MICROBLAZE_PVR_DCACHE_INTERFACE(_pvr)        (_pvr.pvr[5] & MICROBLAZE_PVR5_DCACHE_INTERFACE_MASK)
+#define MICROBLAZE_PVR_DCACHE_VICTIMS(_pvr)          ((_pvr.pvr[5] & MICROBLAZE_PVR5_DCACHE_VICTIMS_MASK) >> 10)
+#define MICROBLAZE_PVR_DCACHE_FORCE_TAG_LUTRAM(_pvr) (_pvr.pvr[5] & MICROBLAZE_PVR5_DCACHE_FORCE_TAG_LUTRAM_MASK)
+#define MICROBLAZE_PVR_DCACHE_DATA_WIDTH(_pvr)       (_pvr.pvr[5] & MICROBLAZE_PVR5_DCACHE_DATA_WIDTH_MASK)
+
+#define MICROBLAZE_PVR_ICACHE_BASEADDR(_pvr)         (_pvr.pvr[6] & MICROBLAZE_PVR6_ICACHE_BASEADDR_MASK)
+#define MICROBLAZE_PVR_ICACHE_HIGHADDR(_pvr)         (_pvr.pvr[7] & MICROBLAZE_PVR7_ICACHE_HIGHADDR_MASK)
+
+#define MICROBLAZE_PVR_DCACHE_BASEADDR(_pvr)         (_pvr.pvr[8] & MICROBLAZE_PVR8_DCACHE_BASEADDR_MASK)
+#define MICROBLAZE_PVR_DCACHE_HIGHADDR(_pvr)         (_pvr.pvr[9] & MICROBLAZE_PVR9_DCACHE_HIGHADDR_MASK)
+
+#define MICROBLAZE_PVR_TARGET_FAMILY(_pvr)           ((_pvr.pvr[10] & MICROBLAZE_PVR10_TARGET_FAMILY_MASK) >> 24)
+
+#define MICROBLAZE_PVR_MSR_RESET_VALUE(_pvr)         (_pvr.pvr[11] & MICROBLAZE_PVR11_MSR_RESET_VALUE_MASK)
+
+#define MICROBLAZE_PVR_MMU_TYPE(_pvr)                ((_pvr.pvr[11] & MICROBLAZE_PVR11_MMU_MASK) >> 30)
+#define MICROBLAZE_PVR_MMU_ITLB_SIZE(_pvr)           ((_pvr.pvr[11] & MICROBLAZE_PVR11_MMU_ITLB_SIZE_MASK) >> 27)
+#define MICROBLAZE_PVR_MMU_DTLB_SIZE(_pvr)           ((_pvr.pvr[11] & MICROBLAZE_PVR11_MMU_DTLB_SIZE_MASK) >> 24)
+#define MICROBLAZE_PVR_MMU_TLB_ACCESS(_pvr)          ((_pvr.pvr[11] & MICROBLAZE_PVR11_MMU_TLB_ACCESS_MASK) >> 22)
+#define MICROBLAZE_PVR_MMU_ZONES(_pvr)               ((_pvr.pvr[11] & MICROBLAZE_PVR11_MMU_ZONES_MASK) >> 17)
+#define MICROBLAZE_PVR_MMU_PRIVILEGED_INSTR(_pvr)    ((_pvr.pvr[11] & MICROBLAZE_PVR11_MMU_PRIVILEGED_INSTR_MASK) >> 16)
+
+/* Protos */
+int microblaze_get_pvr (pvr_t *pvr);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _PVR_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_cache.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_cache.c
new file mode 100644
index 0000000..6add39a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_cache.c
@@ -0,0 +1,94 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.c
+*
+* This contains implementation of cache related driver functions.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  hbm  07/28/09 Initial release
+* 3.10  asa  05/04/13 This version of MicroBlaze BSP adds support for system
+*					  cache/L2 cache. Existing APIs in this file are modified
+*					  to add support for L2 cache.
+*					  These changes are done for implementing PR #697214.
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#include "xil_cache.h"
+
+
+/****************************************************************************/
+/**
+*
+* Disable the data cache.
+*
+* @param    None
+*
+* @return   None.
+*
+****************************************************************************/
+void Xil_DCacheDisable(void)
+{
+	Xil_DCacheFlush();
+	Xil_DCacheInvalidate();
+	Xil_L1DCacheDisable();
+}
+
+/****************************************************************************/
+/**
+*
+* Disable the instruction cache.
+*
+* @param    None
+*
+* @return   None.
+*
+* @note
+*
+*
+****************************************************************************/
+void Xil_ICacheDisable(void)
+{
+	Xil_ICacheInvalidate();
+	Xil_L1ICacheDisable();
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_cache.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_cache.h
new file mode 100644
index 0000000..a375245
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_cache.h
@@ -0,0 +1,447 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_cache.h
+*
+* This header file contains cache related driver functions (or macros)
+* that can be used to access the device.  The user should refer to the
+* hardware device specification for more details of the device operation.
+* The functions in this header file can be used across all Xilinx supported
+* processors.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  hbm  07/28/09 Initial release
+* 3.02a sdm  10/24/11 Updated the file to include xparameters.h so that
+*                     the correct cache flush routines are used based on
+*                     whether the write-back or write-through caches are
+*                     used (cr #630532).
+* 3.10a asa  05/04/13 This version of MicroBlaze BSP adds support for system
+*					  cache/L2 cache. The existing/old APIs/macros in this
+*					  file are renamed to imply that they deal with L1 cache.
+*					  New macros/APIs are added to address similar features for
+*					  L2 cache. Users can include this file in their application
+*					  to use the various cache related APIs. These changes are
+*					  done for implementing PR #697214.
+*
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef XIL_CACHE_H
+#define XIL_CACHE_H
+
+#if defined XENV_VXWORKS
+/* VxWorks environment */
+#error "Unknown processor / architecture. Must be PPC for VxWorks."
+#else
+/* standalone environment */
+
+#include "mb_interface.h"
+#include "xil_types.h"
+#include "xparameters.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/****************************************************************************/
+/**
+*
+* Invalidate the entire L1 data cache. If the cacheline is modified (dirty),
+* the modified contents are lost.
+*
+* @param    None.
+*
+* @return   None.
+*
+* @note
+*
+* Processor must be in real mode.
+****************************************************************************/
+#define Xil_L1DCacheInvalidate() microblaze_invalidate_dcache()
+
+/****************************************************************************/
+/**
+*
+* Invalidate the entire L2 data cache. If the cacheline is modified (dirty),
+* the modified contents are lost.
+*
+* @param    None.
+*
+* @return   None.
+*
+* @note
+*
+* Processor must be in real mode.
+****************************************************************************/
+#define Xil_L2CacheInvalidate() microblaze_invalidate_cache_ext()
+
+/****************************************************************************/
+/**
+*
+* Invalidate the L1 data cache for the given address range.
+* If the bytes specified by the address (Addr) are cached by the L1 data cache,
+* the cacheline containing that byte is invalidated.  If the cacheline
+* is modified (dirty), the modified contents are lost.
+*
+* @param    Addr is address of ragne to be invalidated.
+* @param    Len is the length in bytes to be invalidated.
+*
+* @return   None.
+*
+* @note
+*
+* Processor must be in real mode.
+****************************************************************************/
+#define Xil_L1DCacheInvalidateRange(Addr, Len) \
+			microblaze_invalidate_dcache_range((Addr), (Len))
+
+/****************************************************************************/
+/**
+*
+* Invalidate the L1 data cache for the given address range.
+* If the bytes specified by the address (Addr) are cached by the L1 data cache,
+* the cacheline containing that byte is invalidated.  If the cacheline
+* is modified (dirty), the modified contents are lost.
+*
+* @param    Addr is address of ragne to be invalidated.
+* @param    Len is the length in bytes to be invalidated.
+*
+* @return   None.
+*
+* @note
+*
+* Processor must be in real mode.
+****************************************************************************/
+#define Xil_L2CacheInvalidateRange(Addr, Len) \
+		microblaze_invalidate_cache_ext_range((Addr), (Len))
+
+/****************************************************************************/
+/**
+* Flush the L1 data cache for the given address range.
+* If the bytes specified by the address (Addr) are cached by the data cache,
+* and is modified (dirty), the cacheline will be written to system memory.
+* The cacheline will also be invalidated.
+*
+* @param    Addr is the starting address of the range to be flushed.
+* @param    Len is the length in byte to be flushed.
+*
+* @return   None.
+*
+****************************************************************************/
+#if (XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK == 1)
+#   define Xil_L1DCacheFlushRange(Addr, Len) \
+		microblaze_flush_dcache_range((Addr), (Len))
+#else
+#   define Xil_L1DCacheFlushRange(Addr, Len) \
+		microblaze_invalidate_dcache_range((Addr), (Len))
+#endif /* XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK */
+
+/****************************************************************************/
+/**
+* Flush the L2 data cache for the given address range.
+* If the bytes specified by the address (Addr) are cached by the data cache,
+* and is modified (dirty), the cacheline will be written to system memory.
+* The cacheline will also be invalidated.
+*
+* @param    Addr is the starting address of the range to be flushed.
+* @param    Len is the length in byte to be flushed.
+*
+* @return   None.
+*
+****************************************************************************/
+#define Xil_L2CacheFlushRange(Addr, Len) \
+		microblaze_flush_cache_ext_range((Addr), (Len))
+
+/****************************************************************************/
+/**
+* Flush the entire L1 data cache. If any cacheline is dirty, the cacheline will be
+* written to system memory. The entire data cache will be invalidated.
+*
+* @return   None.
+*
+* @note
+*
+****************************************************************************/
+#if (XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK == 1)
+#   define Xil_L1DCacheFlush() microblaze_flush_dcache()
+#else
+#   define Xil_L1DCacheFlush() microblaze_invalidate_dcache()
+#endif /* XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK */
+
+/****************************************************************************/
+/**
+* Flush the entire L2 data cache. If any cacheline is dirty, the cacheline will be
+* written to system memory. The entire data cache will be invalidated.
+*
+* @return   None.
+*
+* @note
+*
+****************************************************************************/
+#define Xil_L2CacheFlush() microblaze_flush_cache_ext()
+
+/****************************************************************************/
+/**
+*
+* Invalidate the instruction cache for the given address range.
+*
+* @param    Addr is address of ragne to be invalidated.
+* @param    Len is the length in bytes to be invalidated.
+*
+* @return   None.
+*
+****************************************************************************/
+#define Xil_L1ICacheInvalidateRange(Addr, Len) \
+			microblaze_invalidate_icache_range((Addr), (Len))
+
+/****************************************************************************/
+/**
+*
+* Invalidate the entire instruction cache.
+*
+* @param    None
+*
+* @return   None.
+*
+****************************************************************************/
+#define Xil_L1ICacheInvalidate() \
+			microblaze_invalidate_icache()
+
+
+/****************************************************************************/
+/**
+*
+* Enable the L1 data cache.
+*
+* @return   None.
+*
+* @note     This is processor specific.
+*
+****************************************************************************/
+#define Xil_L1DCacheEnable() \
+			microblaze_enable_dcache()
+
+/****************************************************************************/
+/**
+*
+* Disable the L1 data cache.
+*
+* @return   None.
+*
+* @note     This is processor specific.
+*
+****************************************************************************/
+#define Xil_L1DCacheDisable() \
+			microblaze_disable_dcache()
+
+/****************************************************************************/
+/**
+*
+* Enable the instruction cache.
+*
+* @return   None.
+*
+* @note     This is processor specific.
+*
+****************************************************************************/
+#define Xil_L1ICacheEnable() \
+			microblaze_enable_icache()
+
+/****************************************************************************/
+/**
+*
+* Disable the L1 Instruction cache.
+*
+* @return   None.
+*
+* @note     This is processor specific.
+*
+****************************************************************************/
+#define Xil_L1ICacheDisable() \
+			microblaze_disable_icache()
+
+/****************************************************************************/
+/**
+*
+* Enable the data cache.
+*
+* @param    None
+*
+* @return   None.
+*
+****************************************************************************/
+#define Xil_DCacheEnable() Xil_L1DCacheEnable()
+
+/****************************************************************************/
+/**
+*
+* Enable the instruction cache.
+*
+* @param    None
+*
+* @return   None.
+*
+* @note
+*
+*
+****************************************************************************/
+#define Xil_ICacheEnable() Xil_L1ICacheEnable()
+
+/****************************************************************************
+*
+* Invalidate the entire Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+#define Xil_DCacheInvalidate() \
+	Xil_L2CacheInvalidate(); \
+	Xil_L1DCacheInvalidate();
+
+
+/****************************************************************************
+*
+* Invalidate the Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* @param	Start address of ragne to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+#define Xil_DCacheInvalidateRange(Addr, Len) \
+	Xil_L2CacheInvalidateRange((Addr), (Len)); \
+	Xil_L1DCacheInvalidateRange((Addr), (Len));
+
+
+/****************************************************************************
+*
+* Flush the entire Data cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+#define Xil_DCacheFlush() \
+	Xil_L2CacheFlush(); \
+	Xil_L1DCacheFlush();
+
+/****************************************************************************
+* Flush the Data cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated.	If the cacheline
+* is modified (dirty), the written to system memory first before the
+* before the line is invalidated.
+*
+* @param	Start address of range to be flushed.
+* @param	Length of range to be flushed in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+#define Xil_DCacheFlushRange(Addr, Len) \
+	Xil_L2CacheFlushRange((Addr), (Len)); \
+	Xil_L1DCacheFlushRange((Addr), (Len));
+
+
+/****************************************************************************
+*
+* Invalidate the entire instruction cache.
+*
+* @param	None.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+#define Xil_ICacheInvalidate() \
+	Xil_L2CacheInvalidate(); \
+	Xil_L1ICacheInvalidate();
+
+
+/****************************************************************************
+*
+* Invalidate the instruction cache for the given address range.
+* If the bytes specified by the address (adr) are cached by the Data cache,
+* the cacheline containing that byte is invalidated. If the cacheline
+* is modified (dirty), the modified contents are lost and are NOT
+* written to system memory before the line is invalidated.
+*
+* @param	Start address of ragne to be invalidated.
+* @param	Length of range to be invalidated in bytes.
+*
+* @return	None.
+*
+* @note		None.
+*
+****************************************************************************/
+#define Xil_ICacheInvalidateRange(Addr, Len) \
+	Xil_L2CacheInvalidateRange((Addr), (Len)); \
+	Xil_L1ICacheInvalidateRange((Addr), (Len));
+
+void Xil_DCacheDisable(void);
+void Xil_ICacheDisable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_exception.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_exception.c
new file mode 100644
index 0000000..0b162a1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_exception.c
@@ -0,0 +1,244 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_exception.c
+*
+* This file contains implementation of exception related driver functions.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  hbm  07/28/09 Initial release
+*
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#include "xil_types.h"
+#include "xil_exception.h"
+
+#include "microblaze_exceptions_g.h"
+#include "microblaze_interrupts_i.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void microblaze_enable_exceptions(void);
+extern void microblaze_disable_exceptions(void);
+extern void microblaze_enable_interrupts(void);
+extern void microblaze_disable_interrupts(void);
+
+/**
+* Currently HAL is an augmented part of standalone BSP, so the old definition
+* of MB_ExceptionVectorTableEntry is used here.
+*/
+
+typedef struct {
+   Xil_ExceptionHandler Handler;
+   void *CallBackRef;
+} MB_ExceptionVectorTableEntry;
+
+/*typedef struct {
+   Xil_ExceptionHandler Handler,
+   void *CallBackRef,
+} MB_InterruptVectorTableEntry, */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+/************************** Variable Definitions *****************************/
+extern MB_ExceptionVectorTableEntry MB_ExceptionVectorTable[XIL_EXCEPTION_ID_INT];
+extern MB_InterruptVectorTableEntry MB_InterruptVectorTable;
+
+/**
+ *
+ * This function is a stub handler that is the default handler that gets called
+ * if the application has not setup a handler for a specific  exception. The
+ * function interface has to match the interface specified for a handler even
+ * though none of the arguments are used.
+ *
+ * @param	Data is unused by this function.
+ *
+ * @return
+ *
+ * None.
+ *
+ * @note
+ *
+ * None.
+ *
+ *****************************************************************************/
+static void Xil_ExceptionNullHandler(void *Data)
+{
+	(void *) Data;
+}
+
+/****************************************************************************/
+/**
+*
+* Initialize exception handling for the processor. The exception vector table
+* is setup with the stub handler for all exceptions.
+*
+* @param    None.
+*
+* @return   None.
+*
+* @note
+*
+* None.
+*
+*****************************************************************************/
+void Xil_ExceptionInit(void)
+{
+	/*
+	 * there is no need to setup the exception table here
+	 */
+
+}
+
+/****************************************************************************/
+/**
+* Enable Exceptions.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+void Xil_ExceptionEnable(void)
+{
+#ifdef MICROBLAZE_EXCEPTIONS_ENABLED
+	microblaze_enable_exceptions();
+#endif
+	microblaze_enable_interrupts();
+}
+
+/****************************************************************************/
+/**
+* Disable Exceptions.
+*
+* @param    None.
+*
+* @return   None.
+*
+* @note     None.
+*
+******************************************************************************/
+void Xil_ExceptionDisable(void)
+{
+#ifdef MICROBLAZE_EXCEPTIONS_ENABLED
+	microblaze_disable_exceptions();
+#endif
+	microblaze_disable_interrupts();
+}
+
+/*****************************************************************************/
+/**
+*
+* Makes the connection between the Id of the exception source and the
+* associated handler that is to run when the exception is recognized. The
+* argument provided in this call as the DataPtr is used as the argument
+* for the handler when it is called.
+*
+* @param    Id contains the ID of the exception source and should
+*           be XIL_EXCEPTION_INT or be in the range of 0 to XIL_EXCEPTION_LAST.
+*	    See xil_mach_exception.h for further information.
+* @param    Handler to the handler for that exception.
+* @param    Data is a reference to data that will be passed to the handler
+*           when it gets called.
+*
+* @return   None.
+*
+* @note
+*
+* None.
+*
+****************************************************************************/
+void Xil_ExceptionRegisterHandler(u32 Id, Xil_ExceptionHandler Handler,
+				  void *Data)
+{
+	if (Id == XIL_EXCEPTION_ID_INT) {
+		MB_InterruptVectorTable.Handler = Handler;
+		MB_InterruptVectorTable.CallBackRef = Data;
+	}
+	else {
+#ifdef MICROBLAZE_EXCEPTIONS_ENABLED
+		MB_ExceptionVectorTable[Id].Handler = Handler;
+		MB_ExceptionVectorTable[Id].CallBackRef = Data;
+#endif
+	}
+}
+
+
+/*****************************************************************************/
+/**
+*
+* Removes the handler for a specific exception Id. The stub handler is then
+* registered for this exception Id.
+*
+* @param    Id contains the ID of the exception source and should
+*           be XIL_EXCEPTION_INT or in the range of 0 to XIL_EXCEPTION_LAST.
+*	    See xexception_l.h for further information.
+*
+* @return   None.
+*
+* @note
+*
+* None.
+*
+****************************************************************************/
+void Xil_ExceptionRemoveHandler(u32 Id)
+{
+	if (Id == XIL_EXCEPTION_ID_INT) {
+		MB_InterruptVectorTable.Handler = Xil_ExceptionNullHandler;
+		MB_InterruptVectorTable.CallBackRef = NULL;
+	}
+	else {
+
+#ifdef MICROBLAZE_EXCEPTIONS_ENABLED
+		MB_ExceptionVectorTable[Id].Handler =
+			Xil_ExceptionNullHandler;
+		MB_ExceptionVectorTable[Id].CallBackRef = NULL;
+#endif
+	}
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_exception.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_exception.h
new file mode 100644
index 0000000..4a86f16
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_exception.h
@@ -0,0 +1,124 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_exception.h
+*
+* This header file contains exception related driver functions (or
+* macros) that can be used to access the device. The user should refer to the
+* hardware device specification for more details of the device operation.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  hbm  07/28/09 Initial release
+*
+* 

+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+#ifndef XIL_EXCEPTION_H /* prevent circular inclusions */
+#define XIL_EXCEPTION_H /* by using protection macros */
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************** Constant Definitions *****************************/
+
+/*
+ * These constants are specific to Microblaze processor.
+ */
+
+#define XIL_EXCEPTION_ID_FIRST                0U
+#define XIL_EXCEPTION_ID_FSL                  0U
+#define XIL_EXCEPTION_ID_UNALIGNED_ACCESS     1U
+#define XIL_EXCEPTION_ID_ILLEGAL_OPCODE       2U
+#define XIL_EXCEPTION_ID_M_AXI_I_EXCEPTION    3U
+#define XIL_EXCEPTION_ID_IPLB_EXCEPTION       3U
+#define XIL_EXCEPTION_ID_M_AXI_D_EXCEPTION    4U
+#define XIL_EXCEPTION_ID_DPLB_EXCEPTION       4U
+#define XIL_EXCEPTION_ID_DIV_BY_ZERO          5U
+#define XIL_EXCEPTION_ID_FPU                  6U
+#define XIL_EXCEPTION_ID_STACK_VIOLATION      7U
+#define XIL_EXCEPTION_ID_MMU                  7U
+#define XIL_EXCEPTION_ID_LAST		      XIL_EXCEPTION_ID_MMU
+
+/*
+ * XIL_EXCEPTION_ID_INT is defined for all processors, but with different value.
+ */
+#define XIL_EXCEPTION_ID_INT		      16U /**
+						  * exception ID for interrupt
+						  */
+
+/**************************** Type Definitions *******************************/
+
+/**
+ * This typedef is the exception handler function.
+ */
+typedef void (*Xil_ExceptionHandler)(void *Data);
+
+/**
+ * This data type defines an interrupt handler for a device.
+ * The argument points to the instance of the component
+ */
+typedef void (*XInterruptHandler) (void *InstancePtr);
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+extern void Xil_ExceptionRegisterHandler(u32 Id,
+					 Xil_ExceptionHandler Handler,
+					 void *Data);
+
+extern void Xil_ExceptionRemoveHandler(u32 Id);
+
+extern void Xil_ExceptionInit(void);
+extern void Xil_ExceptionEnable(void);
+extern void Xil_ExceptionDisable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_io.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_io.c
new file mode 100644
index 0000000..9fbfe99
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_io.c
@@ -0,0 +1,358 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.c
+*
+* Contains I/O functions for memory-mapped architectures.  These functions
+* encapsulate generic CPU I/O requirements.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 3.00a hbm  07/28/09 Initial release
+* 3.00a hbm  07/21/10 Added Xil_EndianSwap32/16, Xil_Htonl/s, Xil_Ntohl/s
+*
+* 

+*
+* @note
+*
+* This file may contain architecture-dependent code.
+*
+******************************************************************************/
+
+/***************************** Include Files *********************************/
+
+#include "xil_io.h"
+#include "xil_types.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/***************** Macros (Inline Functions) and Functions Definitions *******/
+
+/*****************************************************************************/
+/**
+*
+* Perform an input operation for an 8-bit memory location by reading from the
+* specified address and returning the value read from that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u8 Xil_In8(u32 Addr) {
+	return *(volatile u8 *)Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform an input operation for a 16-bit memory location by reading from the
+* specified address and returning the value read from that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_In16(u32 Addr) {
+	return *(volatile u16 *)Addr;
+}
+
+/*****************************************************************************/
+/**
+*
+* Performs an input operation for a 32-bit memory location by reading from the
+* specified address and returning the Value read from that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The value read from the specified input address.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_In32(u32 Addr) {
+	return *(volatile u32 *)Addr;
+}
+
+
+/*****************************************************************************/
+/**
+*
+* Perform an output operation for an 8-bit memory location by writing the
+* specified value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	value contains the value to be output at the specified address.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out8(u32 Addr, u8 Value) {
+	u8 *LocalAddr = (u8 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform an output operation for a 16-bit memory location by writing the
+* specified value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	value contains the value to be output at the specified address.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out16(u32 Addr, u16 Value) {
+	u16 *LocalAddr = (u16 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform an output operation for a 32-bit memory location by writing the
+* specified value to the specified address.
+*
+* @param	addr contains the address to perform the output operation at.
+* @param	value contains the value to be output at the specified address.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+void Xil_Out32(u32 Addr, u32 Value) {
+	u32 *LocalAddr = (u32 *)Addr;
+	*LocalAddr = Value;
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a 16-bit endian converion.
+*
+* @param	Data contains the value to be converted.
+*
+* @return	converted value.
+*
+* @note		None.
+*
+******************************************************************************/
+u16 Xil_EndianSwap16(u16 Data)
+{
+	return (u16) (((Data & 0xFF00U) >> 8U) | ((Data & 0x00FFU) << 8U));
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a 32-bit endian converion.
+*
+* @param	Data contains the value to be converted.
+*
+* @return	converted value.
+*
+* @note		None.
+*
+******************************************************************************/
+u32 Xil_EndianSwap32(u32 Data)
+{
+	u16 LoWord;
+	u16 HiWord;
+
+	/* get each of the half words from the 32 bit word */
+
+	LoWord = (u16) (Data & 0x0000FFFFU);
+	HiWord = (u16) ((Data & 0xFFFF0000U) >> 16U);
+
+	/* byte swap each of the 16 bit half words */
+
+	LoWord = (((LoWord & 0xFF00U) >> 8U) | ((LoWord & 0x00FFU) << 8U));
+	HiWord = (((HiWord & 0xFF00U) >> 8U) | ((HiWord & 0x00FFU) << 8U));
+
+	/* swap the half words before returning the value */
+
+	return ((((u32)LoWord) << (u32)16U) | (u32)HiWord);
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a little-endian input operation for a 16-bit memory location
+* by reading from the specified address and returning the byte-swapped value
+* read from that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The value read from the specified input address with the
+*		proper endianness. The return value has the same endianness
+*		as that of the processor, i.e. if the processor is big-engian,
+*		the return value is the byte-swapped value read from the
+*		address.
+*
+*
+* @note		None.
+*
+******************************************************************************/
+#ifndef __LITTLE_ENDIAN__
+u16 Xil_In16LE(u32 Addr)
+#else
+u16 Xil_In16BE(u32 Addr)
+#endif
+{
+	u16 Value;
+
+	/* get the data then swap it */
+	Value = Xil_In16(Addr);
+
+	return Xil_EndianSwap16(Value);
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a little-endian input operation for a 32-bit memory location
+* by reading from the specified address and returning the byte-swapped value
+* read from that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The value read from the specified input address with the
+*		proper endianness. The return value has the same endianness
+*		as that of the processor, i.e. if the processor is big-engian,
+*		the return value is the byte-swapped value read from the
+*		address.
+*
+* @note		None.
+*
+******************************************************************************/
+#ifndef __LITTLE_ENDIAN__
+u32 Xil_In32LE(u32 Addr)
+#else
+u32 Xil_In32BE(u32 Addr)
+#endif
+{
+	u32 InValue;
+
+	/* get the data then swap it */
+	InValue = Xil_In32(Addr);
+	return Xil_EndianSwap32(InValue);
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a little-endian output operation for a 16-bit memory location by
+* writing the specified value to the the specified address. The value is
+* byte-swapped before being written.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the value to be output at the specified address.
+*		The value has the same endianness as that of the processor.
+*		If the processor is big-endian, the byte-swapped value is
+*		written to the address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+#ifndef __LITTLE_ENDIAN__
+void Xil_Out16LE(u32 Addr, u16 Value)
+#else
+void Xil_Out16BE(u32 Addr, u16 Value)
+#endif
+{
+	u16 OutValue;
+
+	/* swap the data then output it */
+	OutValue = Xil_EndianSwap16(Value);
+
+	Xil_Out16(Addr, OutValue);
+}
+
+/*****************************************************************************/
+/**
+*
+* Perform a little-endian output operation for a 32-bit memory location
+* by writing the specified value to the the specified address. The value is
+* byte-swapped before being written.
+*
+* @param	Addr contains the address at which the output operation at.
+* @param	Value contains the value to be output at the specified address.
+*		The value has the same endianness as that of the processor.
+*		If the processor is big-endian, the byte-swapped value is
+*		written to the address.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+#ifndef __LITTLE_ENDIAN__
+void Xil_Out32LE(u32 Addr, u32 Value)
+#else
+void Xil_Out32BE(u32 Addr, u32 Value)
+#endif
+{
+	u32 OutValue;
+
+	/* swap the data then output it */
+	OutValue = Xil_EndianSwap32(Value);
+	Xil_Out32(Addr, OutValue);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_io.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_io.h
new file mode 100644
index 0000000..94a8e03
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_io.h
@@ -0,0 +1,269 @@
+/******************************************************************************
+*
+* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_io.h
+*
+* This file contains the interface for the general IO component, which
+* encapsulates the Input/Output functions for processors that do not
+* require any special I/O handling.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 3.00a hbm  07/28/09 Initial release
+* 3.00a hbm  07/21/10 Added Xil_EndianSwap32/16, Xil_Htonl/s, Xil_Ntohl/s
+* 3.03a sdm  08/18/11 Added INST_SYNC and DATA_SYNC macros.
+* 3.07a asa  08/31/12 Added xil_printf.h include
+*
+* 

+*
+* @note
+*
+* This file may contain architecture-dependent items.
+*
+******************************************************************************/
+
+#ifndef XIL_IO_H			/* prevent circular inclusions */
+#define XIL_IO_H			/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/***************************** Include Files *********************************/
+
+#include "xil_types.h"
+#include "mb_interface.h"
+#include "xil_printf.h"
+
+/************************** Constant Definitions *****************************/
+
+/**************************** Function Prototypes ****************************/
+
+u8 Xil_In8(u32 Addr);
+u16 Xil_In16(u32 Addr);
+u32 Xil_In32(u32 Addr);
+
+void Xil_Out8(u32 Addr, u8 Value);
+void Xil_Out16(u32 Addr, u16 Value);
+void Xil_Out32(u32 Addr, u32 Value);
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+#if defined __GNUC__
+#  define INST_SYNC		mbar(0)
+#  define DATA_SYNC		mbar(1)
+#else
+#  define INST_SYNC
+#  define DATA_SYNC
+#endif /* __GNUC__ */
+
+/*
+ * The following macros allow optimized I/O operations for memory mapped I/O.
+ * It should be noted that macros cannot be used if synchronization of the I/O
+ * operation is needed as it will likely break some code.
+ */
+
+
+
+extern u16 Xil_EndianSwap16(u16 Data);
+extern u32 Xil_EndianSwap32(u32 Data);
+
+#ifndef __LITTLE_ENDIAN__
+extern u16 Xil_In16LE(u32 Addr);
+extern u32 Xil_In32LE(u32 Addr);
+extern void Xil_Out16LE(u32 Addr, u16 Value);
+extern void Xil_Out32LE(u32 Addr, u32 Value);
+
+/**
+*
+* Perform an big-endian input operation for a 16-bit memory location
+* by reading from the specified address and returning the value read from
+* that address.
+*
+* @param	addr contains the address to perform the input operation at.
+*
+* @return	The value read from the specified input address with the
+*		proper endianness. The return value has the same endianness
+*		as that of the processor, i.e. if the processor is
+*		little-engian, the return value is the byte-swapped value read
+*		from the address.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_In16BE(Addr) Xil_In16((Addr))
+
+/**
+*
+* Perform a big-endian input operation for a 32-bit memory location
+* by reading from the specified address and returning the value read from
+* that address.
+*
+* @param	Addr contains the address to perform the input operation at.
+*
+* @return	The value read from the specified input address with the
+*		proper endianness. The return value has the same endianness
+*		as that of the processor, i.e. if the processor is
+*		little-engian, the return value is the byte-swapped value read
+*		from the address.
+*
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_In32BE(Addr) Xil_In32((Addr))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian output operation for a 16-bit memory location
+* by writing the specified value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the value to be output at the specified address.
+*		The value has the same endianness as that of the processor.
+*		If the processor is little-endian, the byte-swapped value is
+*		written to the address.
+*
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Out16BE(Addr, Value) Xil_Out16((Addr), (Value))
+
+/*****************************************************************************/
+/**
+*
+* Perform a big-endian output operation for a 32-bit memory location
+* by writing the specified value to the specified address.
+*
+* @param	Addr contains the address to perform the output operation at.
+* @param	Value contains the value to be output at the specified address.
+*		The value has the same endianness as that of the processor.
+*		If the processor is little-endian, the byte-swapped value is
+*		written to the address.
+*
+* @return	None
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Out32BE(Addr, Value) Xil_Out32((Addr), (Value))
+
+#define Xil_Htonl(Data) (Data)
+#define Xil_Htons(Data) (Data)
+#define Xil_Ntohl(Data) (Data)
+#define Xil_Ntohs(Data) (Data)
+
+#else
+
+extern u16 Xil_In16BE(u32 Addr);
+extern u32 Xil_In32BE(u32 Addr);
+extern void Xil_Out16BE(u32 Addr, u16 Value);
+extern void Xil_Out32BE(u32 Addr, u32 Value);
+
+#define Xil_In16LE(Addr) Xil_In16((Addr))
+#define Xil_In32LE(Addr) Xil_In32((Addr))
+#define Xil_Out16LE(Addr, Value) Xil_Out16((Addr), (Value))
+#define Xil_Out32LE(Addr, Value) Xil_Out32((Addr), (Value))
+
+
+/*****************************************************************************/
+/**
+*
+* Convert a 32-bit number from host byte order to network byte order.
+*
+* @param	Data the 32-bit number to be converted.
+*
+* @return	The converted 32-bit number in network byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Htonl(Data) Xil_EndianSwap32((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 16-bit number from host byte order to network byte order.
+*
+* @param	Data the 16-bit number to be converted.
+*
+* @return	The converted 16-bit number in network byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Htons(Data) Xil_EndianSwap16((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 32-bit number from network byte order to host byte order.
+*
+* @param	Value the 32-bit number to be converted.
+*
+* @return	The converted 32-bit number in host byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Ntohl(Data) Xil_EndianSwap32((Data))
+
+/*****************************************************************************/
+/**
+*
+* Convert a 16-bit number from network byte order to host byte order.
+*
+* @param	Value the 16-bit number to be converted.
+*
+* @return	The converted 16-bit number in host byte order.
+*
+* @note		None.
+*
+******************************************************************************/
+#define Xil_Ntohs(Data) Xil_EndianSwap16((Data))
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_misc_psreset_api.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_misc_psreset_api.c
new file mode 100644
index 0000000..71941f3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_misc_psreset_api.c
@@ -0,0 +1,522 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xil_misc_reset.c
+*
+* This file contains the implementation of the reset sequence for various
+* zynq ps devices like DDR,OCM,Slcr,Ethernet,Usb.. controllers. The reset
+* sequence provided to the interfaces is based on the provision in
+* slcr reset functional blcok.
+*
+* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00b kpc   03/07/13 First release
+* 

+*
+******************************************************************************/
+
+
+/***************************** Include Files *********************************/
+#include "xil_misc_psreset_api.h"
+
+/************************** Constant Definitions *****************************/
+
+
+/**************************** Type Definitions *******************************/
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for ddr reset.
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XDdr_ResetHw(void)
+{
+	u32 RegVal;
+
+	/* Unlock the slcr register access lock */
+	 Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert and deassert the ddr softreset bit */
+     RegVal = 	Xil_In32(XDDRC_CTRL_BASEADDR);
+	 RegVal &= (u32)(~XDDRPS_CTRL_RESET_MASK);
+	 Xil_Out32(XDDRC_CTRL_BASEADDR,RegVal);
+	 RegVal |= XDDRPS_CTRL_RESET_MASK;
+	 Xil_Out32(XDDRC_CTRL_BASEADDR,RegVal);
+
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for remapping the ocm memory region
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XOcm_Remap(void)
+{
+	u32 RegVal;
+
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Map the ocm region to postbootrom state */
+	RegVal = Xil_In32(XSLCR_OCM_CFG_ADDR);
+	RegVal = (RegVal & (u32)(~XSLCR_OCM_CFG_HIADDR_MASK)) | (u32)XSLCR_OCM_CFG_RESETVAL;
+	Xil_Out32(XSLCR_OCM_CFG_ADDR, RegVal);
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for SMC reset sequence
+*
+* @param   BaseAddress of the interface
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSmc_ResetHw(u32 BaseAddress)
+{
+	u32 RegVal;
+
+	/* Clear the interuupts */
+	RegVal = Xil_In32(BaseAddress + XSMC_MEMC_CLR_CONFIG_OFFSET);
+	RegVal |= XSMC_MEMC_CLR_CONFIG_MASK;
+	Xil_Out32(BaseAddress + XSMC_MEMC_CLR_CONFIG_OFFSET, RegVal);
+	/* Clear the idle counter registers */
+	Xil_Out32(BaseAddress + XSMC_REFRESH_PERIOD_0_OFFSET, 0x0U);
+	Xil_Out32(BaseAddress + XSMC_REFRESH_PERIOD_1_OFFSET, 0x0U);
+	/* Update the ecc registers with reset values */
+	Xil_Out32(BaseAddress + XSMC_ECC_MEMCFG1_OFFSET,
+							XSMC_ECC_MEMCFG1_RESET_VAL);
+	Xil_Out32(BaseAddress + XSMC_ECC_MEMCMD1_OFFSET,
+							XSMC_ECC_MEMCMD1_RESET_VAL);
+	Xil_Out32(BaseAddress + XSMC_ECC_MEMCMD2_OFFSET,
+							XSMC_ECC_MEMCMD2_RESET_VAL);
+
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for updating the slcr mio registers
+* with reset values
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_MioWriteResetValues(void)
+{
+	u32 i;
+
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Update all the MIO registers with reset values */
+    for (i=0U; i<=1U;i++)
+	{
+		Xil_Out32((XSLCR_MIO_PIN_00_ADDR + (i * 4U)),
+								XSLCR_MIO_PIN_00_RESET_VAL);
+	}
+	for (; i<=8U;i++)
+	{
+		Xil_Out32((XSLCR_MIO_PIN_00_ADDR + (i * 4U)),
+								XSLCR_MIO_PIN_02_RESET_VAL);
+	}
+	for (; i<=53U ;i++)
+	{
+		Xil_Out32((XSLCR_MIO_PIN_00_ADDR + (i * 4U)),
+								XSLCR_MIO_PIN_00_RESET_VAL);
+	}
+
+
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for updating the slcr pll registers
+* with reset values
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_PllWriteResetValues(void)
+{
+
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+
+	/* update the pll control registers with reset values */
+	Xil_Out32(XSLCR_IO_PLL_CTRL_ADDR, XSLCR_IO_PLL_CTRL_RESET_VAL);
+	Xil_Out32(XSLCR_ARM_PLL_CTRL_ADDR, XSLCR_ARM_PLL_CTRL_RESET_VAL);
+	Xil_Out32(XSLCR_DDR_PLL_CTRL_ADDR, XSLCR_DDR_PLL_CTRL_RESET_VAL);
+	/* update the pll config registers with reset values */
+	Xil_Out32(XSLCR_IO_PLL_CFG_ADDR, XSLCR_IO_PLL_CFG_RESET_VAL);
+	Xil_Out32(XSLCR_ARM_PLL_CFG_ADDR, XSLCR_ARM_PLL_CFG_RESET_VAL);
+	Xil_Out32(XSLCR_DDR_PLL_CFG_ADDR, XSLCR_DDR_PLL_CFG_RESET_VAL);
+	/* update the clock control registers with reset values */
+	Xil_Out32(XSLCR_ARM_CLK_CTRL_ADDR, XSLCR_ARM_CLK_CTRL_RESET_VAL);
+	Xil_Out32(XSLCR_DDR_CLK_CTRL_ADDR, XSLCR_DDR_CLK_CTRL_RESET_VAL);
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for disabling the level shifters
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_DisableLevelShifters(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Disable the level shifters */
+	RegVal = Xil_In32(XSLCR_LVL_SHFTR_EN_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_LVL_SHFTR_EN_MASK);
+	Xil_Out32(XSLCR_LVL_SHFTR_EN_ADDR, RegVal);
+
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for OCM software reset from the
+* slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_OcmReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_OCM_RST_CTRL_ADDR);
+	RegVal |= XSLCR_OCM_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_OCM_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_OCM_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_OCM_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_OCM_RST_CTRL_ADDR, RegVal);
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for Ethernet software reset from
+* the slcr
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_EmacPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_GEM_RST_CTRL_ADDR);
+	RegVal |= XSLCR_GEM_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_GEM_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_GEM_RST_CTRL_ADDR);
+	RegVal &= (u32)(~XSLCR_GEM_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_GEM_RST_CTRL_ADDR, RegVal);
+}
+
+/*****************************************************************************/
+/**
+* This function contains the implementation for USB software reset from the
+* slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_UsbPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_USB_RST_CTRL_ADDR);
+	RegVal |= XSLCR_USB_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_USB_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_USB_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_USB_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_USB_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for QSPI software reset from the
+* slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_QspiPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_LQSPI_RST_CTRL_ADDR);
+	RegVal |= XSLCR_QSPI_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_LQSPI_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_LQSPI_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_QSPI_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_LQSPI_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for SPI software reset from the
+* slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_SpiPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_SPI_RST_CTRL_ADDR);
+	RegVal |= XSLCR_SPI_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_SPI_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_SPI_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_SPI_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_SPI_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for i2c software reset from the slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_I2cPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_I2C_RST_CTRL_ADDR);
+	RegVal |= XSLCR_I2C_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_I2C_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_I2C_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_I2C_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_I2C_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for UART software reset from the
+* slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_UartPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_UART_RST_CTRL_ADDR);
+	RegVal |= XSLCR_UART_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_UART_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_UART_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_UART_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_UART_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for CAN software reset from slcr
+* registers
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_CanPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_CAN_RST_CTRL_ADDR);
+	RegVal |= XSLCR_CAN_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_CAN_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_CAN_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_CAN_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_CAN_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for SMC software reset from the slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_SmcPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_SMC_RST_CTRL_ADDR);
+	RegVal |= XSLCR_SMC_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_SMC_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_SMC_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_SMC_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_SMC_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for DMA controller software reset
+* from the slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_DmaPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_DMAC_RST_CTRL_ADDR);
+	RegVal |= XSLCR_DMAC_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_DMAC_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_DMAC_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_DMAC_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_DMAC_RST_CTRL_ADDR, RegVal);
+}
+/*****************************************************************************/
+/**
+* This function contains the implementation for Gpio AMBA software reset from
+* the slcr
+*
+* @param   N/A.
+*
+* @return   N/A.
+*
+* @note     None.
+*
+******************************************************************************/
+void XSlcr_GpioPsReset(void)
+{
+	u32 RegVal;
+	/* Unlock the slcr register access lock */
+	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
+	/* Assert the reset */
+	RegVal = Xil_In32(XSLCR_GPIO_RST_CTRL_ADDR);
+	RegVal |= XSLCR_GPIO_RST_CTRL_VAL;
+	Xil_Out32(XSLCR_GPIO_RST_CTRL_ADDR, RegVal);
+	/* Release the reset */
+	RegVal = Xil_In32(XSLCR_GPIO_RST_CTRL_ADDR);
+	RegVal = RegVal & (u32)(~XSLCR_GPIO_RST_CTRL_VAL);
+	Xil_Out32(XSLCR_GPIO_RST_CTRL_ADDR, RegVal);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_misc_psreset_api.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_misc_psreset_api.h
new file mode 100644
index 0000000..fa7f65d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_misc_psreset_api.h
@@ -0,0 +1,277 @@
+/******************************************************************************
+*
+* Copyright (C) 2013 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file xil_misc_psreset_api.h
+*
+* This file contains the various register defintions and function prototypes for
+* implementing the reset functionality of zynq ps devices
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date   Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00b kpc   03/07/13 First release.
+* 

+*
+******************************************************************************/
+
+#ifndef XIL_MISC_RESET_H		/* prevent circular inclusions */
+#define XIL_MISC_RESET_H		/* by using protection macros */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/***************************** Include Files *********************************/
+#include "xil_types.h"
+#include "xil_io.h"
+
+/************************** Constant Definitions *****************************/
+#define XDDRC_CTRL_BASEADDR				0xF8006000U
+#define XSLCR_BASEADDR					0xF8000000U
+/**< OCM configuration register */
+#define XSLCR_OCM_CFG_ADDR				(XSLCR_BASEADDR + 0x00000910U)
+/**< SLCR unlock register */
+#define XSLCR_UNLOCK_ADDR				(XSLCR_BASEADDR + 0x00000008U)
+/**< SLCR GEM0 rx clock control register */
+#define XSLCR_GEM0_RCLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x00000138U)
+/**< SLCR GEM1 rx clock control register */
+#define XSLCR_GEM1_RCLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x0000013CU)
+/**< SLCR GEM0 clock control register */
+#define XSLCR_GEM0_CLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x00000140U)
+/**< SLCR GEM1 clock control register */
+#define XSLCR_GEM1_CLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x00000144U)
+/**< SLCR SMC clock control register */
+#define XSLCR_SMC_CLK_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000148U)
+/**< SLCR GEM reset control register */
+#define XSLCR_GEM_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000214U)
+/**< SLCR USB0 clock control register */
+#define XSLCR_USB0_CLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x00000130U)
+/**< SLCR USB1 clock control register */
+#define XSLCR_USB1_CLK_CTRL_ADDR		(XSLCR_BASEADDR + 0x00000134U)
+/**< SLCR USB1 reset control register */
+#define XSLCR_USB_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000210U)
+/**< SLCR SMC reset control register */
+#define XSLCR_SMC_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000234U)
+/**< SLCR Level shifter enable register */
+#define XSLCR_LVL_SHFTR_EN_ADDR			(XSLCR_BASEADDR + 0x00000900U)
+/**< SLCR ARM pll control register */
+#define XSLCR_ARM_PLL_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000100U)
+/**< SLCR DDR pll control register */
+#define XSLCR_DDR_PLL_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000104U)
+/**< SLCR IO pll control register */
+#define XSLCR_IO_PLL_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000108U)
+/**< SLCR ARM pll configuration register */
+#define XSLCR_ARM_PLL_CFG_ADDR			(XSLCR_BASEADDR + 0x00000110U)
+/**< SLCR DDR pll configuration register */
+#define XSLCR_DDR_PLL_CFG_ADDR			(XSLCR_BASEADDR + 0x00000114U)
+/**< SLCR IO pll configuration register */
+#define XSLCR_IO_PLL_CFG_ADDR			(XSLCR_BASEADDR + 0x00000118U)
+/**< SLCR ARM clock control register */
+#define XSLCR_ARM_CLK_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000120U)
+/**< SLCR DDR clock control register */
+#define XSLCR_DDR_CLK_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000124U)
+/**< SLCR MIO pin address register */
+#define XSLCR_MIO_PIN_00_ADDR			(XSLCR_BASEADDR + 0x00000700U)
+/**< SLCR DMAC reset control address register */
+#define XSLCR_DMAC_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x0000020CU)
+/**< SLCR USB reset control address register */
+/*#define XSLCR_USB_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000210U)*/
+/**< SLCR GEM reset control address register */
+/*#define XSLCR_GEM_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000214U)*/
+/**< SLCR SDIO reset control address register */
+#define XSLCR_SDIO_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000218U)
+/**< SLCR SPI reset control address register */
+#define XSLCR_SPI_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x0000021CU)
+/**< SLCR CAN reset control address register */
+#define XSLCR_CAN_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000220U)
+/**< SLCR I2C reset control address register */
+#define XSLCR_I2C_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000224U)
+/**< SLCR UART reset control address register */
+#define XSLCR_UART_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000228U)
+/**< SLCR GPIO reset control address register */
+#define XSLCR_GPIO_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x0000022CU)
+/**< SLCR LQSPI reset control address register */
+#define XSLCR_LQSPI_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000230U)
+/**< SLCR SMC reset control address register */
+/*#define XSLCR_SMC_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000234U)*/
+/**< SLCR OCM reset control address register */
+#define XSLCR_OCM_RST_CTRL_ADDR			(XSLCR_BASEADDR + 0x00000238U)
+
+/**< SMC mem controller clear config register */
+#define XSMC_MEMC_CLR_CONFIG_OFFSET			0x0000000CU
+/**< SMC idlecount configuration register */
+#define XSMC_REFRESH_PERIOD_0_OFFSET		0x00000020U
+#define XSMC_REFRESH_PERIOD_1_OFFSET		0x00000024U
+/**< SMC ECC configuration register */
+#define XSMC_ECC_MEMCFG1_OFFSET				0x00000404U
+/**< SMC ECC command 1 register */
+#define XSMC_ECC_MEMCMD1_OFFSET				0x00000404U
+/**< SMC ECC command 2 register */
+#define XSMC_ECC_MEMCMD2_OFFSET				0x00000404U
+
+/**< SLCR unlock code */
+#define XSLCR_UNLOCK_CODE		0x0000DF0DU
+
+/**< SMC mem clear configuration mask */
+#define XSMC_MEMC_CLR_CONFIG_MASK 	0x0000005FU
+/**< SMC ECC memconfig 1 reset value */
+#define XSMC_ECC_MEMCFG1_RESET_VAL 	0x00000043U
+/**< SMC ECC memcommand 1 reset value */
+#define XSMC_ECC_MEMCMD1_RESET_VAL 	0x01300080U
+/**< SMC ECC memcommand 2 reset value */
+#define XSMC_ECC_MEMCMD2_RESET_VAL 	0x01E00585U
+
+/**< DDR controller reset bit mask */
+#define XDDRPS_CTRL_RESET_MASK 		0x00000001U
+/**< SLCR OCM configuration reset value*/
+#define XSLCR_OCM_CFG_RESETVAL		0x00000008U
+/**< SLCR OCM bank selection mask*/
+#define XSLCR_OCM_CFG_HIADDR_MASK	0x0000000FU
+/**< SLCR level shifter enable mask*/
+#define XSLCR_LVL_SHFTR_EN_MASK		0x0000000FU
+
+/**< SLCR PLL register reset values */
+#define XSLCR_ARM_PLL_CTRL_RESET_VAL	0x0001A008U
+#define XSLCR_DDR_PLL_CTRL_RESET_VAL	0x0001A008U
+#define XSLCR_IO_PLL_CTRL_RESET_VAL		0x0001A008U
+#define XSLCR_ARM_PLL_CFG_RESET_VAL		0x00177EA0U
+#define XSLCR_DDR_PLL_CFG_RESET_VAL		0x00177EA0U
+#define XSLCR_IO_PLL_CFG_RESET_VAL		0x00177EA0U
+#define XSLCR_ARM_CLK_CTRL_RESET_VAL	0x1F000400U
+#define XSLCR_DDR_CLK_CTRL_RESET_VAL	0x18400003U
+
+/**< SLCR MIO register default values */
+#define XSLCR_MIO_PIN_00_RESET_VAL		0x00001601U
+#define XSLCR_MIO_PIN_02_RESET_VAL		0x00000601U
+
+/**< SLCR Reset control registers default values */
+#define XSLCR_DMAC_RST_CTRL_VAL			0x00000001U
+#define XSLCR_GEM_RST_CTRL_VAL			0x000000F3U
+#define XSLCR_USB_RST_CTRL_VAL			0x00000003U
+#define XSLCR_I2C_RST_CTRL_VAL			0x00000003U
+#define XSLCR_SPI_RST_CTRL_VAL			0x0000000FU
+#define XSLCR_UART_RST_CTRL_VAL			0x0000000FU
+#define XSLCR_QSPI_RST_CTRL_VAL			0x00000003U
+#define XSLCR_GPIO_RST_CTRL_VAL			0x00000001U
+#define XSLCR_SMC_RST_CTRL_VAL			0x00000003U
+#define XSLCR_OCM_RST_CTRL_VAL			0x00000001U
+#define XSLCR_SDIO_RST_CTRL_VAL			0x00000033U
+#define XSLCR_CAN_RST_CTRL_VAL			0x00000003U
+/**************************** Type Definitions *******************************/
+
+/* the following data type is used to hold a null terminated version string
+ * consisting of the following format, "X.YYX"
+ */
+
+
+/***************** Macros (Inline Functions) Definitions *********************/
+
+
+/************************** Function Prototypes ******************************/
+/*
+ * Performs reset operation to the ddr interface
+ */
+void XDdr_ResetHw(void);
+/*
+ * Map the ocm region to post bootrom state
+ */
+void XOcm_Remap(void);
+/*
+ * Performs the smc interface reset
+ */
+void XSmc_ResetHw(u32 BaseAddress);
+/*
+ * updates the MIO registers with reset values
+ */
+void XSlcr_MioWriteResetValues(void);
+/*
+ * updates the PLL and clock registers with reset values
+ */
+void XSlcr_PllWriteResetValues(void);
+/*
+ * Disables the level shifters
+ */
+void XSlcr_DisableLevelShifters(void);
+/*
+ * provides softreset to the GPIO interface
+ */
+void XSlcr_GpioPsReset(void);
+/*
+ * provides softreset to the DMA interface
+ */
+void XSlcr_DmaPsReset(void);
+/*
+ * provides softreset to the SMC interface
+ */
+void XSlcr_SmcPsReset(void);
+/*
+ * provides softreset to the CAN interface
+ */
+void XSlcr_CanPsReset(void);
+/*
+ * provides softreset to the Uart interface
+ */
+void XSlcr_UartPsReset(void);
+/*
+ * provides softreset to the I2C interface
+ */
+void XSlcr_I2cPsReset(void);
+/*
+ * provides softreset to the SPI interface
+ */
+void XSlcr_SpiPsReset(void);
+/*
+ * provides softreset to the QSPI interface
+ */
+void XSlcr_QspiPsReset(void);
+/*
+ * provides softreset to the USB interface
+ */
+void XSlcr_UsbPsReset(void);
+/*
+ * provides softreset to the GEM interface
+ */
+void XSlcr_EmacPsReset(void);
+/*
+ * provides softreset to the OCM interface
+ */
+void XSlcr_OcmReset(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* XIL_MISC_RESET_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_printf.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_printf.h
new file mode 100644
index 0000000..37bb967
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/microblaze/xil_printf.h
@@ -0,0 +1,48 @@
+/******************************************************************************
+*
+* Copyright (C) 2012 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#ifndef XIL_PRINTF_H
+#define XIL_PRINTF_H
+
+#include "xil_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void xil_printf(const char8 *ctrl1, ...);
+void print(char *ptr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* end of protection macro */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_clean.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_clean.c
new file mode 100644
index 0000000..35af771
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_clean.c
@@ -0,0 +1,47 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "profile.h"
+#include "_profile_timer_hw.h"
+#include "xil_exception.h"
+
+void _profile_clean( void );
+
+/*
+ * This function is the exit routine and is called by the crtinit, when the
+ * program terminates. The name needs to be changed later..
+ */
+void _profile_clean( void )
+{
+	Xil_ExceptionDisable();
+	disable_timer();
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_init.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_init.c
new file mode 100644
index 0000000..bb0d038
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_init.c
@@ -0,0 +1,90 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************
+*
+* _program_init.c:
+*	Initialize the Profiling Structures.
+*
+******************************************************************************/
+
+#include "profile.h"
+
+/* XMD Initializes the following Global Variables Value during Program
+ *  Download with appropriate values. */
+
+#ifdef PROC_MICROBLAZE
+
+extern s32 microblaze_init(void);
+
+#elif defined PROC_PPC
+
+extern s32 powerpc405_init(void);
+
+#else
+
+extern s32 cortexa9_init(void);
+
+#endif
+
+s32 profile_version = 1;	/* Version of S/W Intrusive Profiling library */
+
+u32 binsize = (u32)BINSIZE;    			/* Histogram Bin Size */
+u32 cpu_clk_freq = (u32)CPU_FREQ_HZ ;	/* CPU Clock Frequency */
+u32 sample_freq_hz = (u32)SAMPLE_FREQ_HZ ;	/* Histogram Sampling Frequency */
+u32 timer_clk_ticks = (u32)TIMER_CLK_TICKS ;/* Timer Clock Ticks for the Timer */
+
+/* Structure for Storing the Profiling Data */
+struct gmonparam *_gmonparam = (struct gmonparam *)(0xffffffffU);
+s32 n_gmon_sections = 1;
+
+/* This is the initialization code, which is called from the crtinit. */
+
+void _profile_init( void )
+{
+/* 	print("Gmon Init called....\r\n")  */
+/* 	putnum(n_gmon_sections) , print("\r\n")   */
+/* 	if( _gmonparam == 0xffffffff ) */
+/* 		printf("Gmonparam is NULL !!\r\n")  */
+/* 	for( i = 0, i < n_gmon_sections, i++ )[ */
+/* 		putnum( _gmonparam[i].lowpc) , print("\t")   */
+/* 		putnum( _gmonparam[i].highpc) , print("\r\n")  */
+/* 		putnum( _gmonparam[i].textsize ), print("\r\n")  */
+/* 		putnum( _gmonparam[i].kcountsize * sizeof(unsigned short)), print("\r\n")  */
+/* 	] */
+
+#ifdef PROC_MICROBLAZE
+	(void)microblaze_init();
+#elif defined PROC_PPC
+	powerpc405_init();
+#else
+	(void)cortexa9_init();
+#endif
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_timer_hw.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_timer_hw.c
new file mode 100644
index 0000000..e2d094a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_timer_hw.c
@@ -0,0 +1,387 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************
+*
+*  _program_timer_hw.c:
+*	Timer related functions
+*
+******************************************************************************/
+
+#include "profile.h"
+#include "_profile_timer_hw.h"
+
+#include "xil_exception.h"
+
+#ifdef PROC_PPC
+#include "xtime_l.h"
+#include "xpseudo_asm.h"
+#endif
+
+#ifdef TIMER_CONNECT_INTC
+#include "xintc_l.h"
+#include "xintc.h"
+#endif	/* TIMER_CONNECT_INTC */
+
+/* #ifndef PPC_PIT_INTERRUPT */
+#if (!defined PPC_PIT_INTERRUPT && !defined PROC_CORTEXA9)
+#include "xtmrctr_l.h"
+#endif
+
+/* extern u32 timer_clk_ticks, */
+
+#ifdef PROC_PPC405
+#ifdef PPC_PIT_INTERRUPT
+s32 ppc_pit_init( void );
+#endif
+s32 powerpc405_init()
+#endif	/* PROC_CORTEXA9 */
+
+#ifdef PROC_PPC440
+#ifdef PPC_PIT_INTERRUPT
+s32 ppc_dec_init( void );
+#endif
+s32 powerpc405_init(void);
+#endif	/* PROC_PPC440 */
+
+#if (!defined PPC_PIT_INTERRUPT && !defined PROC_CORTEXA9)
+s32 opb_timer_init( void );
+#endif
+
+#ifdef PROC_MICROBLAZE
+s32 microblaze_init(void);
+#endif	/* PROC_MICROBLAZE */
+
+#ifdef PROC_CORTEXA9
+s32 scu_timer_init( void );
+s32 cortexa9_init(void);
+#endif	/* PROC_CORTEXA9 */
+
+
+/*--------------------------------------------------------------------
+  * PowerPC Target - Timer related functions
+  *-------------------------------------------------------------------- */
+#ifdef PROC_PPC405
+
+
+/*--------------------------------------------------------------------
+* PowerPC PIT Timer Init.
+*	Defined only if PIT Timer is used for Profiling
+*
+*-------------------------------------------------------------------- */
+#ifdef PPC_PIT_INTERRUPT
+int ppc_pit_init( void )
+{
+	/* 1. Register Profile_intr_handler as Interrupt handler */
+	/* 2. Set PIT Timer Interrupt and Enable it. */
+	Xil_ExceptionRegisterHandler( XIL_EXCEPTION_ID_PIT_INT,
+			    (Xil_ExceptionHandler)profile_intr_handler,NULL);
+	XTime_PITSetInterval( timer_clk_ticks ) ;
+	XTime_PITEnableAutoReload() ;
+	return 0;
+}
+#endif
+
+
+/* --------------------------------------------------------------------
+* PowerPC Timer Initialization functions.
+*	For PowerPC, PIT and opb_timer can be used for Profiling. This
+*	is selected by the user in standalone BSP
+*
+*-------------------------------------------------------------------- */
+s32 powerpc405_init()
+{
+	Xil_ExceptionInit() ;
+	Xil_ExceptionDisableMask( XIL_EXCEPTION_NON_CRITICAL ) ;
+
+	/* Initialize the Timer.
+	  * 1. If PowerPC PIT Timer has to be used, initialize PIT timer.
+	  * 2. Else use opb_timer. It can be directly connected or thru intc to PowerPC */
+#ifdef PPC_PIT_INTERRUPT
+	ppc_pit_init();
+#else
+#ifdef TIMER_CONNECT_INTC
+	Xil_ExceptionRegisterHandler( XIL_EXCEPTION_ID_NON_CRITICAL_INT,
+			      (Xil_ExceptionHandler)XIntc_DeviceInterruptHandler,NULL);
+	XIntc_RegisterHandler( INTC_BASEADDR, PROFILE_TIMER_INTR_ID,
+			     (XInterruptHandler)profile_intr_handler,NULL);
+#else
+	Xil_ExceptionRegisterHandler( XIL_EXCEPTION_ID_NON_CRITICAL_INT,
+			      (Xil_ExceptionHandler)profile_intr_handler,NULL);
+#endif
+	/* Initialize the timer with Timer Ticks */
+	opb_timer_init() ;
+#endif
+
+	/* Enable Interrupts in the System, if Profile Timer is the only Interrupt
+	  * in the System. */
+#ifdef ENABLE_SYS_INTR
+#ifdef PPC_PIT_INTERRUPT
+	XTime_PITEnableInterrupt() ;
+#elif TIMER_CONNECT_INTC
+	XIntc_MasterEnable( INTC_BASEADDR );
+	XIntc_SetIntrSvcOption( INTC_BASEADDR, XIN_SVC_ALL_ISRS_OPTION);
+	XIntc_EnableIntr( INTC_BASEADDR, PROFILE_TIMER_INTR_MASK );
+#endif
+	Xil_ExceptionEnableMask( XIL_EXCEPTION_NON_CRITICAL ) ;
+#endif
+	return 0;
+}
+
+#endif	/* PROC_PPC */
+
+
+
+/*--------------------------------------------------------------------
+  * PowerPC440 Target - Timer related functions
+  * -------------------------------------------------------------------- */
+#ifdef PROC_PPC440
+
+
+/*--------------------------------------------------------------------
+ * PowerPC DEC Timer Init.
+ *	Defined only if DEC Timer is used for Profiling
+ *
+ *-------------------------------------------------------------------- */
+#ifdef PPC_PIT_INTERRUPT
+s32 ppc_dec_init( void )
+{
+	/* 1. Register Profile_intr_handler as Interrupt handler */
+	/* 2. Set DEC Timer Interrupt and Enable it. */
+	Xil_ExceptionRegisterHandler( XIL_EXCEPTION_ID_DEC_INT,
+			    (Xil_ExceptionHandler)profile_intr_handler,NULL);
+	XTime_DECSetInterval( timer_clk_ticks ) ;
+	XTime_DECEnableAutoReload() ;
+	return 0;
+}
+#endif
+
+
+/*--------------------------------------------------------------------
+ * PowerPC Timer Initialization functions.
+ *	For PowerPC, DEC and opb_timer can be used for Profiling. This
+ *	is selected by the user in standalone BSP
+ *
+ *-------------------------------------------------------------------- */
+s32 powerpc405_init(void)
+{
+	Xil_ExceptionInit();
+	Xil_ExceptionDisableMask( XIL_EXCEPTION_NON_CRITICAL ) ;
+
+	/* Initialize the Timer.
+	 * 1. If PowerPC DEC Timer has to be used, initialize DEC timer.
+	 * 2. Else use opb_timer. It can be directly connected or thru intc to PowerPC */
+#ifdef PPC_PIT_INTERRUPT
+	ppc_dec_init();
+#else
+#ifdef TIMER_CONNECT_INTC
+	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_NON_CRITICAL_INT,
+				     (Xil_ExceptionHandler)XIntc_DeviceInterruptHandler,NULL);
+
+	XIntc_RegisterHandler( INTC_BASEADDR, PROFILE_TIMER_INTR_ID,
+			     (XInterruptHandler)profile_intr_handler,NULL);
+#else
+	Xil_ExceptionRegisterHandler( XIL_EXCEPTION_ID_NON_CRITICAL_INT,
+			      (Xil_ExceptionHandler)profile_intr_handler,NULL);
+	Xil_ExceptionRegisterHandler( XIL_EXCEPTION_ID_NON_CRITICAL_INT,
+			      (Xil_ExceptionHandler)profile_intr_handler,NULL);
+#endif
+	/* Initialize the timer with Timer Ticks */
+	opb_timer_init() ;
+#endif
+
+	/* Enable Interrupts in the System, if Profile Timer is the only Interrupt
+	 * in the System. */
+#ifdef ENABLE_SYS_INTR
+#ifdef PPC_PIT_INTERRUPT
+	XTime_DECEnableInterrupt() ;
+#elif TIMER_CONNECT_INTC
+	XIntc_MasterEnable( INTC_BASEADDR );
+	XIntc_SetIntrSvcOption( INTC_BASEADDR, XIN_SVC_ALL_ISRS_OPTION);
+	XIntc_EnableIntr( INTC_BASEADDR, PROFILE_TIMER_INTR_MASK );
+#endif
+	Xil_ExceptionEnableMask( XEXC_NON_CRITICAL ) ;
+#endif
+	return 0;
+}
+
+#endif	/* PROC_PPC440 */
+
+/* --------------------------------------------------------------------
+ * opb_timer Initialization for PowerPC and MicroBlaze. This function
+ * is not needed if DEC timer is used in PowerPC
+ *
+ *-------------------------------------------------------------------- */
+/* #ifndef PPC_PIT_INTERRUPT */
+#if (!defined PPC_PIT_INTERRUPT && !defined PROC_CORTEXA9)
+s32 opb_timer_init( void )
+{
+	/* set the number of cycles the timer counts before interrupting */
+	XTmrCtr_SetLoadReg((u32)PROFILE_TIMER_BASEADDR, (u16)0, (u32)timer_clk_ticks);
+
+	/* reset the timers, and clear interrupts */
+	XTmrCtr_SetControlStatusReg((u32)PROFILE_TIMER_BASEADDR, (u16)0,
+				     (u32)XTC_CSR_INT_OCCURED_MASK | (u32)XTC_CSR_LOAD_MASK );
+
+	/* start the timers */
+	XTmrCtr_SetControlStatusReg((u32)PROFILE_TIMER_BASEADDR, (u16)0, (u32)XTC_CSR_ENABLE_TMR_MASK
+			     | (u32)XTC_CSR_ENABLE_INT_MASK | (u32)XTC_CSR_AUTO_RELOAD_MASK | (u32)XTC_CSR_DOWN_COUNT_MASK);
+	return 0;
+}
+#endif
+
+
+/*--------------------------------------------------------------------
+ * MicroBlaze Target - Timer related functions
+ *-------------------------------------------------------------------- */
+#ifdef PROC_MICROBLAZE
+
+/* --------------------------------------------------------------------
+ * Initialize the Profile Timer for MicroBlaze Target.
+ *	For MicroBlaze, opb_timer is used. The opb_timer can be directly
+ *	connected to MicroBlaze or connected through Interrupt Controller.
+ *
+ *-------------------------------------------------------------------- */
+s32 microblaze_init(void)
+{
+	/* Register profile_intr_handler
+	 * 1. If timer is connected to Interrupt Controller, register the handler
+	 *    to Interrupt Controllers vector table.
+	 * 2. If timer is directly connected to MicroBlaze, register the handler
+	 *    as Interrupt handler */
+	Xil_ExceptionInit();
+
+#ifdef TIMER_CONNECT_INTC
+	XIntc_RegisterHandler( INTC_BASEADDR, PROFILE_TIMER_INTR_ID,
+			     (XInterruptHandler)profile_intr_handler,NULL);
+#else
+	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
+				     (Xil_ExceptionHandler)profile_intr_handler,
+				     NULL) ;
+#endif
+
+	/* Initialize the timer with Timer Ticks */
+	(void)opb_timer_init() ;
+
+	/* Enable Interrupts in the System, if Profile Timer is the only Interrupt
+	 * in the System. */
+#ifdef ENABLE_SYS_INTR
+#ifdef TIMER_CONNECT_INTC
+	XIntc_MasterEnable((u32)INTC_BASEADDR );
+	XIntc_SetIntrSvcOption( INTC_BASEADDR, XIN_SVC_ALL_ISRS_OPTION);
+	XIntc_EnableIntr( (u32)INTC_BASEADDR, PROFILE_TIMER_INTR_MASK );
+	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
+				     (Xil_ExceptionHandler)XIntc_DeviceInterruptHandler,NULL);
+#endif
+
+#endif
+
+	Xil_ExceptionEnable();
+
+	return 0;
+
+}
+
+#endif	/* PROC_MICROBLAZE */
+
+
+
+/* --------------------------------------------------------------------
+ * Cortex A9 Target - Timer related functions
+ *-------------------------------------------------------------------- */
+#ifdef PROC_CORTEXA9
+
+/* --------------------------------------------------------------------
+ * Initialize the Profile Timer for Cortex A9 Target.
+ *	The scu private timer is connected to the Scu GIC controller.
+ *
+ *-------------------------------------------------------------------- */
+s32 scu_timer_init( void )
+{
+	/* set the number of cycles the timer counts before interrupting
+	 * scu timer runs at half the cpu clock */
+	XScuTimer_SetLoadReg(PROFILE_TIMER_BASEADDR, timer_clk_ticks/2U);
+
+	/* clear any pending interrupts */
+	XScuTimer_SetIntrReg(PROFILE_TIMER_BASEADDR, 1U);
+
+	/* enable interrupts, auto-reload mode and start the timer */
+	XScuTimer_SetControlReg(PROFILE_TIMER_BASEADDR, XSCUTIMER_CONTROL_IRQ_ENABLE_MASK |
+				XSCUTIMER_CONTROL_AUTO_RELOAD_MASK | XSCUTIMER_CONTROL_ENABLE_MASK);
+
+	return 0;
+}
+
+s32 cortexa9_init(void)
+{
+
+	Xil_ExceptionInit();
+
+	XScuGic_DeviceInitialize(0);
+
+	/*
+	 * Connect the interrupt controller interrupt handler to the hardware
+	 * interrupt handling logic in the processor.
+	 */
+	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT,
+				(Xil_ExceptionHandler)XScuGic_DeviceInterruptHandler,
+				NULL);
+
+	/*
+	 * Connect the device driver handler that will be called when an
+	 * interrupt for the device occurs, the handler defined above performs
+	 * the specific interrupt processing for the device.
+	 */
+	XScuGic_RegisterHandler(SCUGIC_CPU_BASEADDR,
+				PROFILE_TIMER_INTR_ID,
+				(Xil_ExceptionHandler)profile_intr_handler,
+				NULL);
+
+	/*
+	 * Enable the interrupt for scu timer.
+	 */
+	XScuGic_EnableIntr(SCUGIC_DIST_BASEADDR, PROFILE_TIMER_INTR_ID);
+
+	/*
+	 * Enable interrupts in the Processor.
+	 */
+	Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ);
+
+	/*
+	 * Initialize the timer with Timer Ticks
+	 */
+	(void)scu_timer_init() ;
+
+	Xil_ExceptionEnable();
+
+	return 0;
+}
+
+#endif	/* PROC_CORTEXA9 */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_timer_hw.c.rej b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_timer_hw.c.rej
new file mode 100644
index 0000000..934f496
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_timer_hw.c.rej
@@ -0,0 +1,7 @@
+diff a/components/ucos_standalone/src/profile/_profile_timer_hw.c b/components/ucos_standalone/src/profile/_profile_timer_hw.c	(rejected hunks)
+@@ -1,4 +0,4 @@
+-// $Id: _profile_timer_hw.c,v 1.1.2.1 2011/05/17 04:37:56 sadanan Exp $
++// $Id: _profile_timer_hw.c,v 1.1.2.1.3011/05/17 04:37:56 sadanan Exp $
+ /******************************************************************************
+ *
+ * Copyright (C) 2004 - 2014 Xilinx, Inc.  All rights reserved.
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_timer_hw.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_timer_hw.h
new file mode 100644
index 0000000..599ea9f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/_profile_timer_hw.h
@@ -0,0 +1,312 @@
+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************
+*
+* _program_timer_hw.h:
+*	Timer related functions
+*
+******************************************************************************/
+
+#ifndef PROFILE_TIMER_HW_H
+#define PROFILE_TIMER_HW_H
+
+#include "profile.h"
+
+#ifdef PROC_PPC
+#if defined __GNUC__
+#  define SYNCHRONIZE_IO __asm__ volatile ("eieio")
+#elif defined __DCC__
+#  define SYNCHRONIZE_IO __asm volatile(" eieio")
+#else
+#  define SYNCHRONIZE_IO
+#endif
+#endif
+
+#ifdef PROC_PPC
+#define ProfIo_In32(InputPtr) { (*(volatile u32 *)(InputPtr)); SYNCHRONIZE_IO; }
+#define ProfIo_Out32(OutputPtr, Value) { (*(volatile u32 *)(OutputPtr) = Value); SYNCHRONIZE_IO; }
+#else
+#define ProfIo_In32(InputPtr) (*(volatile u32 *)(InputPtr));
+#define ProfIo_Out32(OutputPtr, Value) { (*(volatile u32 *)(OutputPtr) = (Value)); }
+#endif
+
+#define ProfTmrCtr_mWriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)\
+	ProfIo_Out32(((u32)(BaseAddress) + (u32)XTmrCtr_Offsets[(TmrCtrNumber)] +	\
+			   (u32)(RegOffset)), (u32)(ValueToWrite))
+
+#define ProfTimerCtr_mReadReg(BaseAddress, TmrCtrNumber, RegOffset)	\
+	ProfIo_In32((u32)(BaseAddress) + (u32)XTmrCtr_Offsets[(TmrCtrNumber)] + (u32)(RegOffset))
+
+#define ProfTmrCtr_mSetControlStatusReg(BaseAddress, TmrCtrNumber, RegisterValue)\
+	ProfTmrCtr_mWriteReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET,     \
+					   (RegisterValue))
+
+#define ProfTmrCtr_mGetControlStatusReg(BaseAddress, TmrCtrNumber)		\
+	ProfTimerCtr_mReadReg((u32)(BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET)
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef PROC_PPC
+#include "xexception_l.h"
+#include "xtime_l.h"
+#include "xpseudo_asm.h"
+#endif
+
+#ifdef TIMER_CONNECT_INTC
+#include "xintc_l.h"
+#include "xintc.h"
+#endif	/* TIMER_CONNECT_INTC */
+
+#if (!defined PPC_PIT_INTERRUPT && !defined PROC_CORTEXA9)
+#include "xtmrctr_l.h"
+#endif
+
+#ifdef PROC_CORTEXA9
+#include "xscutimer_hw.h"
+#include "xscugic.h"
+#endif
+
+extern u32 timer_clk_ticks ;
+
+/*--------------------------------------------------------------------
+ * PowerPC Target - Timer related functions
+ *-------------------------------------------------------------------- */
+#ifdef PROC_PPC
+
+#ifdef PPC_PIT_INTERRUPT
+u32 timer_lo_clk_ticks ;	/* Clk ticks when Timer is disabled in CG */
+#endif
+
+#ifdef PROC_PPC440
+#define XREG_TCR_PIT_INTERRUPT_ENABLE XREG_TCR_DEC_INTERRUPT_ENABLE
+#define XREG_TSR_PIT_INTERRUPT_STATUS XREG_TSR_DEC_INTERRUPT_STATUS
+#define XREG_SPR_PIT XREG_SPR_DEC
+#define XEXC_ID_PIT_INT XEXC_ID_DEC_INT
+#endif
+
+/* --------------------------------------------------------------------
+ * Disable the Timer - During Profiling
+ *
+ * For PIT Timer -
+ *	1. XTime_PITDisableInterrupt() ;
+ *	2. Store the remaining timer clk tick
+ *	3. Stop the PIT Timer
+ *-------------------------------------------------------------------- */
+
+#ifdef PPC_PIT_INTERRUPT
+#define disable_timer() 		\
+	{				\
+		u32 val;	\
+		val=mfspr(XREG_SPR_TCR);	\
+		mtspr(XREG_SPR_TCR, val & (~XREG_TCR_PIT_INTERRUPT_ENABLE));	\
+		timer_lo_clk_ticks = mfspr(XREG_SPR_PIT);			\
+		mtspr(XREG_SPR_PIT, 0);	\
+	}
+#else
+#define disable_timer() 	\
+   { \
+      u32 addr = (PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET; \
+      u32 tmp_v = ProfIo_In32(addr); \
+      tmp_v = tmp_v & (~XTC_CSR_ENABLE_TMR_MASK); \
+      ProfIo_Out32((PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET, tmp_v); \
+   }
+#endif
+
+
+
+/* --------------------------------------------------------------------
+ * Enable the Timer
+ *
+ * For PIT Timer -
+ *	1. Load the remaining timer clk ticks
+ *	2. XTime_PITEnableInterrupt() ;
+ *-------------------------------------------------------------------- */
+#ifdef PPC_PIT_INTERRUPT
+#define enable_timer()				\
+	{					\
+		u32 val;		\
+		val=mfspr(XREG_SPR_TCR);	\
+		mtspr(XREG_SPR_PIT, timer_lo_clk_ticks);	\
+		mtspr(XREG_SPR_TCR, val | XREG_TCR_PIT_INTERRUPT_ENABLE); \
+	}
+#else
+#define enable_timer()						\
+	{							\
+      u32 addr = (PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET; \
+      u32 tmp_v = ProfIo_In32(addr); \
+      tmp_v = tmp_v |  XTC_CSR_ENABLE_TMR_MASK; \
+      ProfIo_Out32((PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET, tmp_v); \
+	}
+#endif
+
+
+
+/* --------------------------------------------------------------------
+ * Send Ack to Timer Interrupt
+ *
+ * For PIT Timer -
+ * 	1. Load the timer clk ticks
+ *	2. Enable AutoReload and Interrupt
+ *	3. Clear PIT Timer Status bits
+ *-------------------------------------------------------------------- */
+#ifdef PPC_PIT_INTERRUPT
+#define timer_ack()							\
+	{								\
+		u32 val;					\
+		mtspr(XREG_SPR_PIT, timer_clk_ticks);			\
+		mtspr(XREG_SPR_TSR, XREG_TSR_PIT_INTERRUPT_STATUS);	\
+		val=mfspr(XREG_SPR_TCR);				\
+		mtspr(XREG_SPR_TCR, val| XREG_TCR_PIT_INTERRUPT_ENABLE| XREG_TCR_AUTORELOAD_ENABLE); \
+	}
+#else
+#define timer_ack()				\
+	{						\
+		u32 csr;			\
+		csr = ProfTmrCtr_mGetControlStatusReg(PROFILE_TIMER_BASEADDR, 0);	\
+		ProfTmrCtr_mSetControlStatusReg(PROFILE_TIMER_BASEADDR, 0, csr);	\
+	}
+#endif
+
+/*-------------------------------------------------------------------- */
+#endif	/* PROC_PPC */
+/* -------------------------------------------------------------------- */
+
+
+
+
+/* --------------------------------------------------------------------
+ * MicroBlaze Target - Timer related functions
+ *-------------------------------------------------------------------- */
+#ifdef PROC_MICROBLAZE
+
+/* --------------------------------------------------------------------
+ * Disable the Timer during Call-Graph Data collection
+ *
+ *-------------------------------------------------------------------- */
+#define disable_timer()					\
+	{						\
+      u32 Addr = ((u32)PROFILE_TIMER_BASEADDR); \
+	  Addr += (u32)XTmrCtr_Offsets[(u16)(0)]; \
+	  Addr += (u32)XTC_TCSR_OFFSET; \
+      u32 tmp_v = ProfIo_In32(Addr); \
+      tmp_v = tmp_v & (u32)(~XTC_CSR_ENABLE_TMR_MASK); \
+      u32 OutAddr = (u32)PROFILE_TIMER_BASEADDR; \
+      OutAddr += (u32)XTmrCtr_Offsets[(u16)(0)]; \
+      OutAddr += (u32)XTC_TCSR_OFFSET; \
+      ProfIo_Out32(OutAddr, (u32)tmp_v); \
+    }
+
+
+/* --------------------------------------------------------------------
+ * Enable the Timer after Call-Graph Data collection
+ *
+ *-------------------------------------------------------------------- */
+#define enable_timer()					\
+	{						\
+      u32 Addr = ((u32)PROFILE_TIMER_BASEADDR); \
+	  Addr += (u32)XTmrCtr_Offsets[(u16)(0)]; \
+	  Addr += (u32)XTC_TCSR_OFFSET; \
+      u32 tmp_v = (u32)ProfIo_In32(Addr); \
+      tmp_v = tmp_v |  (u32)XTC_CSR_ENABLE_TMR_MASK; \
+      ProfIo_Out32((u32)(PROFILE_TIMER_BASEADDR) + (u32)XTmrCtr_Offsets[(u16)(0)] + (u32)XTC_TCSR_OFFSET, (u32)tmp_v); \
+	}
+
+
+/* --------------------------------------------------------------------
+ * Send Ack to Timer Interrupt
+ *
+ *-------------------------------------------------------------------- */
+#define timer_ack()				\
+	{						\
+		u32 csr;			\
+		csr = ProfTmrCtr_mGetControlStatusReg((u32)PROFILE_TIMER_BASEADDR, (u16)0);	\
+		ProfTmrCtr_mSetControlStatusReg((u32)PROFILE_TIMER_BASEADDR, (u16)0, (u32)csr);	\
+	}
+
+/*-------------------------------------------------------------------- */
+#endif	/* PROC_MICROBLAZE */
+/*-------------------------------------------------------------------- */
+
+/* --------------------------------------------------------------------
+ * Cortex A9 Target - Timer related functions
+ *-------------------------------------------------------------------- */
+#ifdef PROC_CORTEXA9
+
+/* --------------------------------------------------------------------
+ * Disable the Timer during Call-Graph Data collection
+ *
+ *-------------------------------------------------------------------- */
+#define disable_timer()							\
+{								\
+	u32 Reg;							\
+	Reg = Xil_In32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET); \
+	Reg &= (~XSCUTIMER_CONTROL_ENABLE_MASK);\
+	Xil_Out32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET, Reg);\
+}
+
+
+/* --------------------------------------------------------------------
+ * Enable the Timer after Call-Graph Data collection
+ *
+ *-------------------------------------------------------------------- */
+#define enable_timer()							\
+{								\
+	u32 Reg;							\
+	Reg = Xil_In32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET); \
+	Reg |= XSCUTIMER_CONTROL_ENABLE_MASK; \
+	Xil_Out32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET, Reg);\
+}
+
+
+/* --------------------------------------------------------------------
+ * Send Ack to Timer Interrupt
+ *
+ *-------------------------------------------------------------------- */
+#define timer_ack()						\
+{							\
+	Xil_Out32((u32)PROFILE_TIMER_BASEADDR + (u32)XSCUTIMER_ISR_OFFSET, \
+		(u32)XSCUTIMER_ISR_EVENT_FLAG_MASK);\
+}
+
+/*-------------------------------------------------------------------- */
+#endif	/* PROC_CORTEXA9 */
+/*-------------------------------------------------------------------- */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/dummy.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/dummy.S
new file mode 100644
index 0000000..0485670
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/dummy.S
@@ -0,0 +1,64 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+	.globl dummy_f
+
+#ifdef PROC_MICROBLAZE
+	.text
+	.align 2
+	.ent dummy_f
+
+dummy_f:
+	nop
+
+	.end dummy_f
+#endif
+
+#ifdef PROC_PPC
+	.section .text
+	.align 2
+	.type dummy_f@function
+
+dummy_f:
+	b dummy_f
+
+#endif
+
+#ifdef PROC_CORTEXA9
+	.section .text
+	.align 2
+	.type dummy_f, %function
+
+dummy_f:
+	b dummy_f
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/mblaze_nt_types.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/mblaze_nt_types.h
new file mode 100644
index 0000000..f088d47
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/mblaze_nt_types.h
@@ -0,0 +1,54 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+
+#ifndef _MBLAZE_NT_TYPES_H
+#define _MBLAZE_NT_TYPES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef char            byte;
+typedef short           half;
+typedef int             word;
+typedef unsigned char   ubyte;
+typedef unsigned short  uhalf;
+typedef unsigned int    uword;
+typedef ubyte           boolean;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile.h
new file mode 100644
index 0000000..3946242
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile.h
@@ -0,0 +1,131 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#ifndef	PROFILE_H
+#define	PROFILE_H	1
+
+#include 
+#include "xil_types.h"
+#include "profile_config.h"
+
+#ifdef PROC_MICROBLAZE
+#include "mblaze_nt_types.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void _system_init( void ) ;
+void _system_clean( void ) ;
+void mcount(u32 frompc, u32 selfpc);
+void profile_intr_handler( void ) ;
+void _profile_init( void );
+
+
+
+/****************************************************************************
+ * Profiling on hardware - Hash table maintained on hardware and data sent
+ * to xmd for gmon.out generation.
+ ****************************************************************************/
+/*
+ * histogram counters are unsigned shorts (according to the kernel).
+ */
+#define	HISTCOUNTER	u16
+
+struct tostruct {
+	u32  selfpc;
+	s32	 count;
+	s16  link;
+	u16	 pad;
+};
+
+struct fromstruct {
+	u32 frompc ;
+	s16 link ;
+	u16 pad ;
+} ;
+
+/*
+ * general rounding functions.
+ */
+#define ROUNDDOWN(x,y)	(((x)/(y))*(y))
+#define ROUNDUP(x,y)	((((x)+(y)-1)/(y))*(y))
+
+/*
+ * The profiling data structures are housed in this structure.
+ */
+struct gmonparam {
+	s32		state;
+
+	/* Histogram Information */
+	u16		*kcount;	/* No. of bins in histogram */
+	u32		kcountsize;	/* Histogram samples */
+
+	/* Call-graph Information */
+	struct fromstruct	*froms;
+	u32		fromssize;
+	struct tostruct		*tos;
+	u32		tossize;
+
+	/* Initialization I/Ps */
+	u32    	lowpc;
+	u32		highpc;
+	u32		textsize;
+	/* u32 		cg_froms, */
+	/* u32 		cg_tos, */
+};
+extern struct gmonparam *_gmonparam;
+extern s32 n_gmon_sections;
+
+/*
+ * Possible states of profiling.
+ */
+#define	GMON_PROF_ON	0
+#define	GMON_PROF_BUSY	1
+#define	GMON_PROF_ERROR	2
+#define	GMON_PROF_OFF	3
+
+/*
+ * Sysctl definitions for extracting profiling information from the kernel.
+ */
+#define	GPROF_STATE	0	/* int: profiling enabling variable */
+#define	GPROF_COUNT	1	/* struct: profile tick count buffer */
+#define	GPROF_FROMS	2	/* struct: from location hash bucket */
+#define	GPROF_TOS	3	/* struct: destination/count structure */
+#define	GPROF_GMONPARAM	4	/* struct: profiling parameters (see above) */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif 		/* PROFILE_H */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_cg.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_cg.c
new file mode 100644
index 0000000..79e64fd
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_cg.c
@@ -0,0 +1,171 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "profile.h"
+#include "_profile_timer_hw.h"
+#ifdef PROC_MICROBLAZE
+#include "mblaze_nt_types.h"
+#endif
+
+/*
+ * The mcount fucntion is excluded from the library, if the user defines
+ * PROFILE_NO_GRAPH.
+ */
+#ifndef PROFILE_NO_GRAPH
+
+#include 
+#include 
+#include 
+
+#ifdef PROFILE_NO_FUNCPTR
+s32 searchpc(const struct fromto_struct *cgtable, s32 cgtable_size, u32 frompc );
+#else
+s32 searchpc(const struct fromstruct *froms, s32 fromssize, u32 frompc );
+#endif
+
+/*extern struct gmonparam *_gmonparam, */
+
+#ifdef PROFILE_NO_FUNCPTR
+s32 searchpc(const struct fromto_struct *cgtable, s32 cgtable_size, u32 frompc )
+{
+	s32 index = 0 ;
+
+	while( (index < cgtable_size) && (cgtable[index].frompc != frompc) ){
+		index++ ;
+	}
+	if( index == cgtable_size ) {
+		return -1 ;
+	} else {
+		return index ;
+	}
+}
+#else
+s32 searchpc(const struct fromstruct *froms, s32 fromssize, u32 frompc )
+{
+	s32 index = 0 ;
+	s32 Status;
+
+	while( (index < fromssize) && (froms[index].frompc != frompc) ){
+		index++ ;
+	}
+	if( index == fromssize ) {
+		Status = -1 ;
+	} else {
+		Status = index ;
+	}
+	return Status;
+}
+#endif		/* PROFILE_NO_FUNCPTR */
+
+
+void mcount( u32 frompc, u32 selfpc )
+{
+	register struct gmonparam *p = NULL;
+	register s32 toindex, fromindex;
+	s32 j;
+
+	disable_timer();
+
+	/*print("CG: "), putnum(frompc), print("->"), putnum(selfpc), print("\r\n") ,
+	 * check that frompcindex is a reasonable pc value.
+	 * for example:	signal catchers get called from the stack,
+	 *		not from text space.  too bad.
+	*/
+	for(j = 0; j < n_gmon_sections; j++ ){
+		if((frompc >= _gmonparam[j].lowpc) && (frompc < _gmonparam[j].highpc)) {
+			p = &_gmonparam[j];
+			break;
+		}
+	}
+	if( j == n_gmon_sections ) {
+		goto done;
+	}
+
+#ifdef PROFILE_NO_FUNCPTR
+	fromindex = searchpc( p->cgtable, p->cgtable_size, frompc ) ;
+	if( fromindex == -1 ) {
+		fromindex = p->cgtable_size ;
+		p->cgtable_size++ ;
+		p->cgtable[fromindex].frompc = frompc ;
+		p->cgtable[fromindex].selfpc = selfpc ;
+		p->cgtable[fromindex].count = 1 ;
+		goto done ;
+	}
+	p->cgtable[fromindex].count++ ;
+#else
+	fromindex = (s32)searchpc( p->froms, ((s32)p->fromssize), frompc ) ;
+	if( fromindex == -1 ) {
+		fromindex = (s32)p->fromssize ;
+		p->fromssize++ ;
+		/*if( fromindex >= N_FROMS ) {
+		* print("Error : From PC table overflow\r\n")
+		* goto overflow
+		*}*/
+		p->froms[fromindex].frompc = frompc ;
+		p->froms[fromindex].link = -1 ;
+	}else {
+		toindex = ((s32)(p->froms[fromindex].link));
+		while(toindex != -1) {
+			toindex = (((s32)p->tossize) - toindex)-1 ;
+			if( p->tos[toindex].selfpc == selfpc ) {
+				p->tos[toindex].count++ ;
+				goto done ;
+			}
+			toindex = ((s32)(p->tos[toindex].link)) ;
+		}
+	}
+
+	/*if( toindex == -1 ) { */
+	p->tos-- ;
+	p->tossize++ ;
+	/* if( toindex >= N_TOS ) {
+	* print("Error : To PC table overflow\r\n")
+	* goto overflow
+	*} */
+	p->tos[0].selfpc = selfpc ;
+	p->tos[0].count = 1 ;
+	p->tos[0].link = p->froms[fromindex].link ;
+	p->froms[fromindex].link = ((s32)(p->tossize))-((s32)1);
+#endif
+
+ done:
+	p->state = GMON_PROF_ON;
+	goto enable_timer_label ;
+ /* overflow: */
+	/*p->state = GMON_PROF_ERROR */
+ enable_timer_label:
+	enable_timer();
+	return ;
+}
+
+
+#endif		/* PROFILE_NO_GRAPH */
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_config.h b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_config.h
new file mode 100644
index 0000000..b159d17
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_config.h
@@ -0,0 +1,48 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+
+#ifndef _PROFILE_CONFIG_H
+#define _PROFILE_CONFIG_H
+
+#define BINSIZE 4U
+#define SAMPLE_FREQ_HZ 100000U
+#define TIMER_CLK_TICKS 1000U
+
+#define PROFILE_NO_FUNCPTR_FLAG 0
+
+#define PROFILE_TIMER_BASEADDR 0x00608000U
+#define PROFILE_TIMER_INTR_ID 0U
+
+#define TIMER_CONNECT_INTC
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_hist.c b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_hist.c
new file mode 100644
index 0000000..eb8a595
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_hist.c
@@ -0,0 +1,71 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+#include "profile.h"
+#include "_profile_timer_hw.h"
+
+#ifdef PROC_MICROBLAZE
+#include "mblaze_nt_types.h"
+#endif
+
+#ifdef PROC_PPC
+#include "xpseudo_asm.h"
+#define SPR_SRR0 0x01A
+#endif
+
+#include "xil_types.h"
+
+extern u32 binsize ;
+u32 prof_pc ;
+
+void profile_intr_handler( void )
+{
+
+	s32 j;
+
+#ifdef PROC_MICROBLAZE
+	asm( "swi r14, r0, prof_pc" ) ;
+#elif defined PROC_PPC
+	prof_pc = mfspr(SPR_SRR0);
+#else
+	/* for cortexa9, lr is saved in asm interrupt handler */
+#endif
+	/* print("PC: "), putnum(prof_pc), print("\r\n"), */
+	for(j = 0; j < n_gmon_sections; j++ ){
+		if((prof_pc >= ((u32)_gmonparam[j].lowpc)) && (prof_pc < ((u32)_gmonparam[j].highpc))) {
+			_gmonparam[j].kcount[(prof_pc-_gmonparam[j].lowpc)/((u32)4 * binsize)]++;
+			break;
+		}
+	}
+	/* Ack the Timer Interrupt */
+	timer_ack();
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_hist.c.rej b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_hist.c.rej
new file mode 100644
index 0000000..51f8baf
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_hist.c.rej
@@ -0,0 +1,7 @@
+diff a/components/ucos_standalone/src/profile/profile_hist.c b/components/ucos_standalone/src/profile/profile_hist.c	(rejected hunks)
+@@ -1,4 +0,4 @@
+-// $Id: profile_hist.c,v 1.1.2.1 2011/05/17 04:37:57 sadanan Exp $
++// $Id: profile_hist.c,v 1.1.2.1.3011/05/17 04:37:57 sadanan Exp $
+ /******************************************************************************
+ *
+ * Copyright (C) 2002 - 2014 Xilinx, Inc.  All rights reserved.
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_arm.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_arm.S
new file mode 100644
index 0000000..c401596
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_arm.S
@@ -0,0 +1,45 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+// based on "ARM Profiling Implementation" from Sourcery G++ Lite for ARM EABI
+
+.globl __gnu_mcount_nc
+.type __gnu_mcount_nc, %function
+
+__gnu_mcount_nc:
+	push	{r0, r1, r2, r3, lr}
+	subs	r1, lr, #0			/* callee - current lr */
+	ldr	r0, [sp, #20]			/* caller - at the top of the stack */
+	bl	mcount				/* when __gnu_mcount_nc is called */
+	pop	{r0, r1, r2, r3, ip, lr}
+	bx	ip
+
+	.end __gnu_mcount_nc
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_mb.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_mb.S
new file mode 100644
index 0000000..d90023b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_mb.S
@@ -0,0 +1,69 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+	.globl _mcount
+	.text
+	.align 2
+	.ent _mcount
+
+	#ifndef PROFILE_NO_GRAPH
+
+_mcount:
+	addi r1, r1, -48
+	swi r11, r1, 44
+	swi r12, r1, 40
+	swi r5, r1, 36
+	swi r6, r1, 32
+	swi r7, r1, 28
+	swi r8, r1, 24
+	swi r9, r1, 20
+	swi r10, r1, 16
+	swi r15, r1, 12
+	add r5, r0, r15
+	brlid r15, mcount
+	add r6, r0, r16
+
+	lwi r11, r1, 44
+	lwi r12, r1, 40
+	lwi r5, r1, 36
+	lwi r6, r1, 32
+	lwi r7, r1, 28
+	lwi r8, r1, 24
+	lwi r9, r1, 20
+	lwi r10, r1, 16
+	lwi r15, r1, 12
+	rtsd r15, 4
+	addi r1, r1, 48
+
+	#endif	/* PROFILE_NO_GRAPH */
+
+	.end _mcount
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_mb.S.rej b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_mb.S.rej
new file mode 100644
index 0000000..6912b6b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_mb.S.rej
@@ -0,0 +1,7 @@
+diff a/components/ucos_standalone/src/profile/profile_mcount_mb.S b/components/ucos_standalone/src/profile/profile_mcount_mb.S	(rejected hunks)
+@@ -1,4 +0,4 @@
+-// $Id: profile_mcount_mb.S,v 1.1.2.1 2011/05/17 04:37:58 sadanan Exp $
++// $Id: profile_mcount_mb.S,v 1.1.2.1.3011/05/17 04:37:58 sadanan Exp $
+ /******************************************************************************
+ *
+ * Copyright (C) 2002 - 2014 Xilinx, Inc.  All rights reserved.
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_ppc.S b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_ppc.S
new file mode 100644
index 0000000..f8bf823
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_ppc.S
@@ -0,0 +1,71 @@
+/******************************************************************************
+*
+* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+
+	.globl _mcount
+
+	#define _MCOUNT_STACK_FRAME 48
+	.section .text
+	.align 2
+	.type _mcount@function
+
+
+_mcount:
+	stwu 1,	-_MCOUNT_STACK_FRAME(1)
+	stw 3, 8(1)
+	stw 4, 12(1)
+	stw 5, 16(1)
+	stw 6, 20(1)
+	stw 7, 24(1)
+	stw 8, 28(1)
+	stw 9, 32(1)
+	stw 10, 36(1)
+	stw 11, 40(1)
+	stw 12, 44(1)
+	mflr 4
+	stw 4, (_MCOUNT_STACK_FRAME+4)(1)
+	lwz 3, (_MCOUNT_STACK_FRAME)(1)
+	lwz 3, 4(3)
+	bl mcount
+	lwz 4, (_MCOUNT_STACK_FRAME+4)(1)
+	mtlr 4
+	lwz 12, 44(1)
+	lwz 11, 40(1)
+	lwz 10, 36(1)
+	lwz 9, 32(1)
+	lwz 8, 28(1)
+	lwz 7, 24(1)
+	lwz 6, 20(1)
+	lwz 5, 16(1)
+	lwz 4, 12(1)
+	lwz 3, 8(1)
+	addi 1,1, _MCOUNT_STACK_FRAME
+	blr
diff --git a/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_ppc.S.rej b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_ppc.S.rej
new file mode 100644
index 0000000..7ef0e0b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_standalone/src/profile/profile_mcount_ppc.S.rej
@@ -0,0 +1,7 @@
+diff a/components/ucos_standalone/src/profile/profile_mcount_ppc.S b/components/ucos_standalone/src/profile/profile_mcount_ppc.S	(rejected hunks)
+@@ -1,4 +0,4 @@
+-// $Id: profile_mcount_ppc.S,v 1.1.2.1 2011/05/17 04:37:58 sadanan Exp $
++// $Id: profile_mcount_ppc.S,v 1.1.2.1.3011/05/17 04:37:58 sadanan Exp $
+ /******************************************************************************
+ *
+ * Copyright (C) 2002 - 2014 Xilinx, Inc.  All rights reserved.
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_tcpip/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_ultrascale_gem_bsp.c b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_ultrascale_gem_bsp.c
new file mode 100644
index 0000000..fbfed4d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_ultrascale_gem_bsp.c
@@ -0,0 +1,327 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                    Cadence Gigabit Ethernet MAC
+*                                               on the
+*                                          Ultrascale+ MPSoC
+*
+* Filename      : net_ultrascale_gem_bsp.c
+* Version       : V3.03.01
+* Programmer(s) : ITJ
+*                 AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    NET_BSP_MODULE
+
+#include  
+#include  
+
+#include  
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  NETWORK DEVICE INTERFACE NUMBERS
+*********************************************************************************************************
+*/
+
+static  NET_IF_NBR  ZCU102_GEM_3_IF_Nbr = NET_IF_NBR_NONE;
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               NETWORK DEVICE BSP FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+                                                                /* -- IF #1 : GENERIC ETHER BSP FUNCTION PROTOTYPES -- */
+static  void        NetDev_GEM_CfgClk3        (NET_IF      *p_if,
+                                               NET_ERR     *p_err);
+   
+static  void        NetDev_GEM_CfgIntCtrl3    (NET_IF      *p_if,
+                                               NET_ERR     *p_err);
+   
+static  void        NetDev_GEM_CfgGPIO3       (NET_IF      *p_if,
+                                               NET_ERR     *p_err);
+   
+static  CPU_INT32U  NetDev_GEM_ClkFreqGet3    (NET_IF      *p_if,
+                                               NET_ERR     *p_err);
+
+
+static  void        NetDev_GEM_ISR_Handler3   (void        *p_arg, 
+                                               CPU_INT32U   cpu_id);
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NETWORK DEVICE BSP INTERFACE
+*********************************************************************************************************
+*/
+
+const  NET_DEV_BSP_ETHER     NetDev_BSP_Ultrascale_GEM_3 = {                    /* Board-/device-specific BSP fnct ptrs : */
+                                                         &NetDev_GEM_CfgClk3,       /*   Cfg clk(s)                           */
+                                                         &NetDev_GEM_CfgIntCtrl3,   /*   Cfg int ctrl(s)                      */
+                                                         &NetDev_GEM_CfgGPIO3,      /*   Cfg GPIO                             */
+                                                         &NetDev_GEM_ClkFreqGet3    /*   Get clk freq                         */
+                                                };
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              NETWORK ETHERNET DEVICE DRIVER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         NetDev_GEM_CfgClk3()
+*
+* Description : Configure clocks for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device clock(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device clock(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_GEM_CfgClk3 (NET_IF   *p_if,
+                                  NET_ERR  *p_err)
+{
+    CPU_INT32U  reg_val;
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetDev_GEM_CfgIntCtrl3()
+*
+* Description : Configure interrupts &/or interrupt controller for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device interrupt(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device interrupt(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_GEM_CfgIntCtrl3 (NET_IF   *p_if,
+                                      NET_ERR  *p_err)
+{
+    ZCU102_GEM_3_IF_Nbr = p_if->Nbr;
+
+    UCOS_IntVectSet(95u,
+                     0u,
+                     DEF_BIT_00,
+                     NetDev_GEM_ISR_Handler3,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn(95u);
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetDev_GEM_CfgGPIO3()
+*
+* Description : Configure general-purpose I/O (GPIO) for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device GPIO     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device GPIO NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_GEM_CfgGPIO3 (NET_IF   *p_if,
+                                   NET_ERR  *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       NetDev_GEM_ClkFreqGet3()
+*
+* Description : Get device clock frequency.
+*
+* Argument(s) : p_if         Pointer to network interface to get clock frequency.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device clock frequency     successfully
+*                                                                   returned.
+*                               NET_DEV_ERR_FAULT               Device clock frequency NOT successfully
+*                                                                   returned.
+*
+* Return(s)   : Device clock frequency (in Hz).
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetDev_GEM_ClkFreqGet3 (NET_IF   *p_if,
+                                            NET_ERR  *p_err)
+{
+    CPU_INT32U  clk_freq;
+
+
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+    clk_freq = 0;
+   *p_err    = NET_DEV_ERR_NONE;
+
+    return (clk_freq);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      NetDev_GEM_ISR_Handler3()
+*
+* Description : BSP-level ISR handler(s) for device interrupts.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU &/or device interrupts.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_GEM_ISR_Handler3(void        *p_arg, 
+                                      CPU_INT32U   cpu_id)
+{
+    NET_IF_NBR        if_nbr;
+    NET_DEV_ISR_TYPE  type;
+    NET_ERR           err;
+
+
+    if_nbr = ZCU102_GEM_3_IF_Nbr;
+    type   = NET_DEV_ISR_TYPE_UNKNOWN;
+
+    NetIF_ISR_Handler(if_nbr, type, &err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_ultrascale_gem_bsp.h b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_ultrascale_gem_bsp.h
new file mode 100644
index 0000000..2eaa459
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_ultrascale_gem_bsp.h
@@ -0,0 +1,101 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                    Cadence Gigabit Ethernet MAC
+*                                               on the
+*                                          Ultrascale+ MPSoC
+*
+* Filename      : net_ultrascale_gen_bsp.h
+* Version       : V3.03.01
+* Programmer(s) : ITJ
+*                 AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#if ((defined(NET_BSP_MODULE)) && \
+     (defined(NET_GLOBALS_EXT)))
+#define  NET_BSP_EXT
+#else
+#define  NET_BSP_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                           NETWORK BOARD SUPPORT PACKAGE (BSP) ERROR CODES
+*
+* Note(s) : (1) ALL BSP-independent error codes #define'd in      'net_err.h';
+*               ALL BSP-specific    error codes #define'd in this 'net_bsp.h'.
+*
+*           (2) Network error code '10,000' series reserved for network BSP errors.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_BSP_ETHER     NetDev_BSP_Ultrascale_GEM_3;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_bsp.c b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_bsp.c
new file mode 100644
index 0000000..aaf6d8d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_bsp.c
@@ -0,0 +1,584 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP V2
+*                                      The Embedded TCP/IP Suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                           AXI Ethernet
+*
+* Filename      : net_xil_ether_bsp.c
+* Version       : V2.13.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    NET_BSP_MODULE
+
+#include  
+#include  
+
+#if (UCOS_ETHERNET_DRIVER == UCOS_ETHERNET_AXIETH)
+
+#include  
+#include  
+
+#include  
+
+#include  
+
+#include  
+
+
+extern UCOS_AXIETHERNET_Config UCOS_AXIETHERNET_ConfigTable[];
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK DEVICE INTERFACE NUMBERS
+*
+* Note(s) : (1) (a) Each network device maps to a unique network interface number.
+*
+*               (b) Instances of network devices' interface number SHOULD be named using the following
+*                   convention :
+*
+*                       [Number]_IF_Nbr
+*
+*                           where
+*                                            Development board name
+*                                           Network device name (or type)
+*                                   [Number]        Network device number for each specific instance
+*                                                       of device (optional if the development board
+*                                                       does NOT support multiple instances of the
+*                                                       specific device)
+*
+*                   For example, the network device interface number variable for the #2 MACB Ethernet
+*                   controller on an Atmel AT91SAM92xx should be named 'AT91SAM92xx_MACB_2_IF_Nbr'.
+*
+*               (c) Network device interface number variables SHOULD be initialized to 'NET_IF_NBR_NONE'.
+*********************************************************************************************************
+*/
+
+static  NET_IF_NBR  BoardDev_Nbr_IF_Nbr     = NET_IF_NBR_NONE;
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               NETWORK DEVICE BSP FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Device driver BSP functions may be arbitrarily named.  However, it is recommended that
+*               device BSP functions be named using the suggested names/conventions provided below.
+*
+*               (a) (1) Network device BSP functions SHOULD be named using the following convention :
+*
+*                           NetDev_[Device][Number]()
+*
+*                               where
+*                                   (A) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (B)       Network device BSP function
+*                                   (C) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*                       For example, the NetDev_CfgClk() function for the #2 MACB Ethernet controller
+*                       on an Atmel AT91SAM92xx should be named NetDev_MACB_CfgClk2().
+*
+*                   (2) BSP-level device ISR handlers SHOULD be named using the following convention :
+*
+*                           NetDev_[Device]ISR_Handler[Type][Number]()
+*
+*                               where
+*                                   (A) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (B) [Type]          Network device interrupt type (optional if
+*                                                           interrupt type is generic or unknown)
+*                                   (C) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*               (b) All BSP function prototypes SHOULD be located within the development board's network
+*                   BSP C source file ('net_bsp.c') & be declared as static functions to prevent name
+*                   clashes with other network protocol suite BSP functions/files.
+*********************************************************************************************************
+*/
+
+                                                                /* -- IF #1 : GENERIC ETHER BSP FUNCTION PROTOTYPES -- */
+static  void        NetDev_CfgClk             (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_CfgIntCtrl         (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_CfgGPIO            (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  CPU_INT32U  NetDev_ClkFreqGet         (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+
+static  void  NetDev_ISR_Handler              (void*p_arg, CPU_INT32U cpu_id);
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NETWORK DEVICE BSP INTERFACE
+*
+* Note(s) : (1) Device board-support package (BSP) interface structures are used by the device driver to
+*               call specific devices' BSP functions via function pointer instead of by name.  This enables
+*               the network protocol suite to compile & operate with multiple instances of multiple devices
+*               & drivers.
+*
+*           (2) In most cases, the BSP interface structure provided below SHOULD suffice for most devices'
+*               BSP functions exactly as is with the exception that BSP interface structures' names MUST be
+*               unique & SHOULD clearly identify the development board, device name, & possibly the specific
+*               device number (if the development board supports multiple instances of any given device).
+*
+*               (a) BSP interface structures SHOULD be named using the following convention :
+*
+*                       NetDev_BSP_[Number]{}
+*
+*                           where
+*                               (1)          Development board name
+*                               (2)         Network device name (or type)
+*                               (3) [Number]        Network device number for each specific instance
+*                                                       of device (optional if the development board
+*                                                       does NOT support multiple instances of the
+*                                                       specific device)
+*
+*                   For example, the BSP interface structure for the #2 MACB Ethernet controller on
+*                   an Atmel AT91SAM92xx should be named NetDev_BSP_AT91SAM92xx_MACB_2{}.
+*
+*               (b) The BSP interface structure MUST also be externally declared in the development
+*                   board's network BSP header file ('net_bsp.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+
+const  NET_DEV_BSP_ETHER     NetDev_BSP_AXIEthernet_0 = {                               /* Board-/device-specific BSP fnct ptrs : */
+                                                         &NetDev_CfgClk,        /*   Cfg clk(s)                           */
+                                                         &NetDev_CfgIntCtrl,    /*   Cfg int ctrl(s)                      */
+                                                         &NetDev_CfgGPIO,       /*   Cfg GPIO                             */
+                                                         &NetDev_ClkFreqGet     /*   Get clk freq                         */
+                                                };
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              NETWORK ETHERNET DEVICE DRIVER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           NetDev_CfgClk()
+*
+* Description : Configure clocks for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device clock(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device clock(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgClk (NET_IF   *p_if,
+                             NET_ERR  *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_CfgIntCtrl()
+*
+* Description : Configure interrupts &/or interrupt controller for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device interrupt(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device interrupt(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgIntCtrl (NET_IF   *p_if,
+                                 NET_ERR  *p_err)
+{
+    CPU_INT32U int_id;
+
+#if 0
+
+    BoardDev_Nbr_IF_Nbr = p_if->Nbr;             /* Configure this device's BSP instance with specific interface number. */
+
+
+    int_id = UCOS_AXIETHERNET_ConfigTable[UCOS_ETHERNET_DEVICE_ID].IntSource;
+
+
+    UCOS_IntVectSet(int_id,
+                    0u,
+                    0u,
+                    NetDev_ISR_Handler,
+                    DEF_NULL);
+
+    UCOS_IntSrcEn(int_id);
+
+#endif
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_CfgGPIO()
+*
+* Description : Configure general-purpose I/O (GPIO) for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device GPIO     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device GPIO NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgGPIO (NET_IF   *p_if,
+                              NET_ERR  *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_ClkFreqGet()
+*
+* Description : Get device clock frequency.
+*
+* Argument(s) : p_if         Pointer to network interface to get clock frequency.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device clock frequency     successfully
+*                                                                   returned.
+*                               NET_DEV_ERR_FAULT               Device clock frequency NOT successfully
+*                                                                   returned.
+*
+* Return(s)   : Device clock frequency (in Hz).
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetDev_ClkFreqGet (NET_IF   *p_if,
+                                       NET_ERR  *p_err)
+{
+    CPU_INT32U  clk_freq;
+
+
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+    clk_freq = 0;
+   *p_err     = NET_DEV_ERR_NONE;
+
+    return (clk_freq);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetDev_ISR_Handler()
+*
+* Description : BSP-level ISR handler(s) for device interrupts.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU &/or device interrupts.
+*
+* Note(s)     : (1) (a) Each device interrupt, or set of device interrupts, MUST be handled by a
+*                       unique BSP-level ISR handler which maps each specific device interrupt to
+*                       its corresponding network interface ISR handler.
+*
+*                   (b) BSP-level device ISR handlers SHOULD be named using the following convention :
+*
+*                           NetDev_[Device]ISR_Handler[Type][Number]()
+*
+*                               where
+*                                   (1) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (2) [Type]          Network device interrupt type (optional if
+*                                                           interrupt type is generic or unknown)
+*                                   (3) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*                       See also 'NETWORK DEVICE BSP FUNCTION PROTOTYPES  Note #2a2'.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_ISR_Handler(void*p_arg, CPU_INT32U cpu_id)
+{
+    NET_IF_NBR        if_nbr;
+    NET_DEV_ISR_TYPE  type;
+    NET_ERR           err;
+
+
+    if_nbr = BoardDev_Nbr_IF_Nbr;                               /* See Note #1b3.                                       */
+    type   = NET_DEV_ISR_TYPE_UNKNOWN;                          /* See Note #1b2.                                       */
+
+    NetIF_ISR_Handler(if_nbr, type, &err);
+}
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                            TRANSMISSION CONTROL PROTOCOL LAYER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_InitTxSeqNbr()
+*
+* Description : Initialize the TCP Transmit Initial Sequence Counter, 'NetTCP_TxSeqNbrCtr'.
+*
+*               (1) Possible initialization methods include :
+*
+*                   (a) Time-based initialization is one preferred method since it more appropriately
+*                       provides a pseudo-random initial sequence number.
+*                   (b) Hardware-generated random number initialization is NOT a preferred method since it
+*                       tends to produce a discrete set of pseudo-random initial sequence numbers--often
+*                       the same initial sequence number.
+*                   (c) Hard-coded initial sequence number is NOT a preferred method since it is NOT random.
+*
+*                   See also 'net_tcp.h  NET_TCP_TX_GET_SEQ_NBR()  Note #1'.
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_Init().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_TCP_MODULE_PRESENT
+void  NetTCP_InitTxSeqNbr (void)
+{
+    NetTCP_TxSeqNbrCtr = NET_TCP_SEQ_NBR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               USER DATAGRAM PROTOCOL LAYER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NetUDP_RxAppDataHandler()
+*
+* Description : Application-specific UDP connection handler function.
+*
+* Argument(s) : pbuf        Pointer to network buffer that received UDP datagram.
+*               -----        Argument checked in NetUDP_Rx().
+*
+*               src_addr    Received UDP datagram's source      IP  address.
+*
+*               src_port    Received UDP datagram's source      UDP port.
+*
+*               dest_addr   Received UDP datagram's destination IP  address.
+*
+*               dest_port   Received UDP datagram's destination UDP port.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function
+*                               (see Note #1b) :
+*
+*                               NET_APP_ERR_NONE                UDP datagram successfully received to application
+*                                                                   connection(s).
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*                               NET_ERR_RX_DEST                 Invalid destination; no application connection
+*                                                                   available for received packet.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_RxPktDemuxAppData().
+*$PAGE*
+* Note(s)     : (1) Application-specific UDP connection handler function is fully responsible for properly
+*                   receiving, demultiplexing, & handling all UDP receive packets to the appropriate
+*                   application connections.
+*
+*                   (a) (1) If the application-specific UDP connection handler function successfully
+*                           demultiplexes UDP receive packets to an application connection, the handler
+*                           function MUST at some point call NetUDP_RxAppData() to deframe the application
+*                           data from the packet buffer(s) into an application array as well as copy any
+*                           received IP options into an application IP options buffer.
+*
+*                           (A) The application-specific connection handler function may service the
+*                               application data immediately within the handler function, in which case
+*                               the application data SHOULD be serviced as quickly as possible since the
+*                               network's global lock remains acquired for the full duration of the
+*                               network receive.  Thus no other network receives or transmits can occur
+*                               while the application-specific handler function executes.
+*
+*                           (B) The application-specific connection handler function may delay servicing
+*                               the application data by some other application-specific data servicing
+*                               function(s), in which case the servicing function(s) MUST :
+*
+*                               (1) Acquire the network's global lock PRIOR to calling NetUDP_RxAppData()
+*                               (2) Release the network's global lock AFTER    calling NetUDP_RxAppData()
+*
+*                               See 'net_udp.c  NetUDP_RxAppData()  Note #2'.
+*
+*                       (2) (A) (1) If NetUDP_RxAppDataHandler()          successfully demultiplexes the UDP
+*                                   packets, it SHOULD eventually call NetUDP_RxAppData() to deframe the UDP
+*                                   packet data.  If NetUDP_RxAppData() successfully deframes the UDP packet
+*                                   application data :
+*
+*                                   (a) NetUDP_RxAppDataHandler() SHOULD return NET_APP_ERR_NONE, regardless
+*                                       of whether the application handled the application data; ...
+*                                   (b) but MUST NOT call NetUDP_RxPktFree() to free the UDP packet network
+*                                       buffer(s) since NetUDP_RxAppData() frees the network buffer(s) [see
+*                                       'NetUDP_RxAppData()  Note #1d'].
+*
+*                               (2) If NetUDP_RxAppDataHandler() does NOT successfully demultiplex   the UDP
+*                                   packets :
+*
+*                                   (a) NetUDP_RxAppDataHandler() SHOULD return NET_ERR_RX_DEST, ...
+*                                   (b) but must NOT free or discard the UDP packet network buffer(s) since
+*                                       NetUDP_Rx() discards the network buffer(s).
+*
+*                               (3) If NetUDP_RxAppDataHandler() or NetUDP_RxAppData() fails for any other
+*                                   reason(s) :
+*
+*                                   (a) NetUDP_RxAppDataHandler() SHOULD return NET_ERR_RX, ...
+*                                   (b) but MUST call NetUDP_RxPktDiscard() to discard the UDP packet network
+*                                       buffer(s).
+*
+*                           (B) FAILURE to appropriately call NetUDP_RxAppData() or NetUDP_RxPktDiscard() MAY
+*                               result in lost network buffer(s).
+*
+*                   (b) Application-specific UDP connection handler function MUST return one of the following
+*                       error codes ONLY [see 'Argument(s) : p_err'] :
+*
+*                       (1) NET_APP_ERR_NONE  for     received UDP packets     destined to an available
+*                               application connection & successfully deframed (see Note #1a2A1a)
+*
+*                       (2) NET_ERR_RX_DEST   for any received UDP packets NOT destined to an available
+*                               application connection                         (see Note #1a2A2a)
+*
+*                       (3) NET_ERR_RX        for any other receive error      (see Note #1a2A3a)
+*********************************************************************************************************
+*/
+
+#if ((NET_UDP_CFG_APP_API_SEL == NET_UDP_APP_API_SEL_APP     ) || \
+     (NET_UDP_CFG_APP_API_SEL == NET_UDP_APP_API_SEL_SOCK_APP))
+void  NetUDP_RxAppDataHandler (NET_BUF           *pbuf,
+                               NET_IP_ADDR        src_addr,
+                               NET_UDP_PORT_NBR   src_port,
+                               NET_IP_ADDR        dest_addr,
+                               NET_UDP_PORT_NBR   dest_port,
+                               NET_ERR           *p_err)
+{
+   *p_err = NET_ERR_RX_DEST;
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_bsp.h b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_bsp.h
new file mode 100644
index 0000000..b0607bf
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_bsp.h
@@ -0,0 +1,96 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP V2
+*                                      The Embedded TCP/IP Suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                             AXI Ethernet
+*
+* Filename      : net_xil_ether_bsp.h
+* Version       : V2.13.00
+* Programmer(s) : ITJ
+*                 AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#if ((defined(NET_BSP_MODULE)) && \
+     (defined(NET_GLOBALS_EXT)))
+#define  NET_BSP_EXT
+#else
+#define  NET_BSP_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                           NETWORK BOARD SUPPORT PACKAGE (BSP) ERROR CODES
+*
+* Note(s) : (1) ALL BSP-independent error codes #define'd in      'net_err.h';
+*               ALL BSP-specific    error codes #define'd in this 'net_bsp.h'.
+*
+*           (2) Network error code '10,000' series reserved for network BSP errors.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_BSP_ETHER     NetDev_BSP_AXIEthernet_0;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_bsp.c b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_bsp.c
new file mode 100644
index 0000000..c84a099
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_bsp.c
@@ -0,0 +1,584 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP V2
+*                                      The Embedded TCP/IP Suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                    Cadence Gigabit Ethernet MAC
+*                                               on the
+*                                            ZYNQ-7000 EPP
+*
+* Filename      : net_bsp.c
+* Version       : V2.13.00
+* Programmer(s) : ITJ
+*                 AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    NET_BSP_MODULE
+
+#include  
+#include  
+
+#if (UCOS_ETHERNET_DRIVER == UCOS_ETHERNET_AXIETHLITE)
+
+#include  
+#include  
+
+#include  
+
+#include  
+
+#include  
+
+
+extern UCOS_AXIETHERNETLITE_Config UCOS_AXIETHERNETLITE_ConfigTable[];
+
+
+/*
+*********************************************************************************************************
+*                                  NETWORK DEVICE INTERFACE NUMBERS
+*
+* Note(s) : (1) (a) Each network device maps to a unique network interface number.
+*
+*               (b) Instances of network devices' interface number SHOULD be named using the following
+*                   convention :
+*
+*                       [Number]_IF_Nbr
+*
+*                           where
+*                                            Development board name
+*                                           Network device name (or type)
+*                                   [Number]        Network device number for each specific instance
+*                                                       of device (optional if the development board
+*                                                       does NOT support multiple instances of the
+*                                                       specific device)
+*
+*                   For example, the network device interface number variable for the #2 MACB Ethernet
+*                   controller on an Atmel AT91SAM92xx should be named 'AT91SAM92xx_MACB_2_IF_Nbr'.
+*
+*               (c) Network device interface number variables SHOULD be initialized to 'NET_IF_NBR_NONE'.
+*********************************************************************************************************
+*/
+
+static  NET_IF_NBR  BoardDev_Nbr_IF_Nbr     = NET_IF_NBR_NONE;
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               NETWORK DEVICE BSP FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Device driver BSP functions may be arbitrarily named.  However, it is recommended that
+*               device BSP functions be named using the suggested names/conventions provided below.
+*
+*               (a) (1) Network device BSP functions SHOULD be named using the following convention :
+*
+*                           NetDev_[Device][Number]()
+*
+*                               where
+*                                   (A) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (B)       Network device BSP function
+*                                   (C) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*                       For example, the NetDev_CfgClk() function for the #2 MACB Ethernet controller
+*                       on an Atmel AT91SAM92xx should be named NetDev_MACB_CfgClk2().
+*
+*                   (2) BSP-level device ISR handlers SHOULD be named using the following convention :
+*
+*                           NetDev_[Device]ISR_Handler[Type][Number]()
+*
+*                               where
+*                                   (A) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (B) [Type]          Network device interrupt type (optional if
+*                                                           interrupt type is generic or unknown)
+*                                   (C) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*               (b) All BSP function prototypes SHOULD be located within the development board's network
+*                   BSP C source file ('net_bsp.c') & be declared as static functions to prevent name
+*                   clashes with other network protocol suite BSP functions/files.
+*********************************************************************************************************
+*/
+
+                                                                /* -- IF #1 : GENERIC ETHER BSP FUNCTION PROTOTYPES -- */
+static  void        NetDev_CfgClk             (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_CfgIntCtrl         (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_CfgGPIO            (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  CPU_INT32U  NetDev_ClkFreqGet         (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+
+static  void  NetDev_ISR_Handler              (void*p_arg, CPU_INT32U cpu_id);
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NETWORK DEVICE BSP INTERFACE
+*
+* Note(s) : (1) Device board-support package (BSP) interface structures are used by the device driver to
+*               call specific devices' BSP functions via function pointer instead of by name.  This enables
+*               the network protocol suite to compile & operate with multiple instances of multiple devices
+*               & drivers.
+*
+*           (2) In most cases, the BSP interface structure provided below SHOULD suffice for most devices'
+*               BSP functions exactly as is with the exception that BSP interface structures' names MUST be
+*               unique & SHOULD clearly identify the development board, device name, & possibly the specific
+*               device number (if the development board supports multiple instances of any given device).
+*
+*               (a) BSP interface structures SHOULD be named using the following convention :
+*
+*                       NetDev_BSP_[Number]{}
+*
+*                           where
+*                               (1)          Development board name
+*                               (2)         Network device name (or type)
+*                               (3) [Number]        Network device number for each specific instance
+*                                                       of device (optional if the development board
+*                                                       does NOT support multiple instances of the
+*                                                       specific device)
+*
+*                   For example, the BSP interface structure for the #2 MACB Ethernet controller on
+*                   an Atmel AT91SAM92xx should be named NetDev_BSP_AT91SAM92xx_MACB_2{}.
+*
+*               (b) The BSP interface structure MUST also be externally declared in the development
+*                   board's network BSP header file ('net_bsp.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+
+const  NET_DEV_BSP_ETHER     NetDev_BSP_AXIEthernetLite_0 = {                               /* Board-/device-specific BSP fnct ptrs : */
+                                                         &NetDev_CfgClk,        /*   Cfg clk(s)                           */
+                                                         &NetDev_CfgIntCtrl,    /*   Cfg int ctrl(s)                      */
+                                                         &NetDev_CfgGPIO,       /*   Cfg GPIO                             */
+                                                         &NetDev_ClkFreqGet     /*   Get clk freq                         */
+                                                };
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              NETWORK ETHERNET DEVICE DRIVER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           NetDev_CfgClk()
+*
+* Description : Configure clocks for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device clock(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device clock(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgClk (NET_IF   *p_if,
+                             NET_ERR  *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_CfgIntCtrl()
+*
+* Description : Configure interrupts &/or interrupt controller for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device interrupt(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device interrupt(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgIntCtrl (NET_IF   *p_if,
+                                 NET_ERR  *p_err)
+{
+    CPU_INT32U int_id;
+
+
+    BoardDev_Nbr_IF_Nbr = p_if->Nbr;             /* Configure this device's BSP instance with specific interface number. */
+
+
+    int_id = UCOS_AXIETHERNETLITE_ConfigTable[UCOS_ETHERNET_DEVICE_ID].IntSource;
+
+
+    UCOS_IntVectSet(int_id,
+                    0u,
+                    0u,
+                    NetDev_ISR_Handler,
+                    DEF_NULL);
+
+    UCOS_IntSrcEn(int_id);
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_CfgGPIO()
+*
+* Description : Configure general-purpose I/O (GPIO) for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device GPIO     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device GPIO NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgGPIO (NET_IF   *p_if,
+                              NET_ERR  *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_ClkFreqGet()
+*
+* Description : Get device clock frequency.
+*
+* Argument(s) : p_if         Pointer to network interface to get clock frequency.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device clock frequency     successfully
+*                                                                   returned.
+*                               NET_DEV_ERR_FAULT               Device clock frequency NOT successfully
+*                                                                   returned.
+*
+* Return(s)   : Device clock frequency (in Hz).
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetDev_ClkFreqGet (NET_IF   *p_if,
+                                       NET_ERR  *p_err)
+{
+    CPU_INT32U  clk_freq;
+
+
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+    clk_freq = 0;/* $$$$ Insert code to return each network interface's/device's clock frequency. */
+   *p_err     = NET_DEV_ERR_NONE;
+
+    return (clk_freq);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetDev_ISR_Handler()
+*
+* Description : BSP-level ISR handler(s) for device interrupts.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU &/or device interrupts.
+*
+* Note(s)     : (1) (a) Each device interrupt, or set of device interrupts, MUST be handled by a
+*                       unique BSP-level ISR handler which maps each specific device interrupt to
+*                       its corresponding network interface ISR handler.
+*
+*                   (b) BSP-level device ISR handlers SHOULD be named using the following convention :
+*
+*                           NetDev_[Device]ISR_Handler[Type][Number]()
+*
+*                               where
+*                                   (1) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (2) [Type]          Network device interrupt type (optional if
+*                                                           interrupt type is generic or unknown)
+*                                   (3) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*                       See also 'NETWORK DEVICE BSP FUNCTION PROTOTYPES  Note #2a2'.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_ISR_Handler(void*p_arg, CPU_INT32U cpu_id)
+{
+    NET_IF_NBR        if_nbr;
+    NET_DEV_ISR_TYPE  type;
+    NET_ERR           err;
+
+
+    if_nbr = BoardDev_Nbr_IF_Nbr;                               /* See Note #1b3.                                       */
+    type   = NET_DEV_ISR_TYPE_UNKNOWN;                          /* See Note #1b2.                                       */
+
+    NetIF_ISR_Handler(if_nbr, type, &err);
+}
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                            TRANSMISSION CONTROL PROTOCOL LAYER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_InitTxSeqNbr()
+*
+* Description : Initialize the TCP Transmit Initial Sequence Counter, 'NetTCP_TxSeqNbrCtr'.
+*
+*               (1) Possible initialization methods include :
+*
+*                   (a) Time-based initialization is one preferred method since it more appropriately
+*                       provides a pseudo-random initial sequence number.
+*                   (b) Hardware-generated random number initialization is NOT a preferred method since it
+*                       tends to produce a discrete set of pseudo-random initial sequence numbers--often
+*                       the same initial sequence number.
+*                   (c) Hard-coded initial sequence number is NOT a preferred method since it is NOT random.
+*
+*                   See also 'net_tcp.h  NET_TCP_TX_GET_SEQ_NBR()  Note #1'.
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_Init().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_TCP_MODULE_PRESENT
+void  NetTCP_InitTxSeqNbr (void)
+{
+    NetTCP_TxSeqNbrCtr = NET_TCP_SEQ_NBR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               USER DATAGRAM PROTOCOL LAYER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NetUDP_RxAppDataHandler()
+*
+* Description : Application-specific UDP connection handler function.
+*
+* Argument(s) : pbuf        Pointer to network buffer that received UDP datagram.
+*               -----        Argument checked in NetUDP_Rx().
+*
+*               src_addr    Received UDP datagram's source      IP  address.
+*
+*               src_port    Received UDP datagram's source      UDP port.
+*
+*               dest_addr   Received UDP datagram's destination IP  address.
+*
+*               dest_port   Received UDP datagram's destination UDP port.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function
+*                               (see Note #1b) :
+*
+*                               NET_APP_ERR_NONE                UDP datagram successfully received to application
+*                                                                   connection(s).
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*                               NET_ERR_RX_DEST                 Invalid destination; no application connection
+*                                                                   available for received packet.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_RxPktDemuxAppData().
+*$PAGE*
+* Note(s)     : (1) Application-specific UDP connection handler function is fully responsible for properly
+*                   receiving, demultiplexing, & handling all UDP receive packets to the appropriate
+*                   application connections.
+*
+*                   (a) (1) If the application-specific UDP connection handler function successfully
+*                           demultiplexes UDP receive packets to an application connection, the handler
+*                           function MUST at some point call NetUDP_RxAppData() to deframe the application
+*                           data from the packet buffer(s) into an application array as well as copy any
+*                           received IP options into an application IP options buffer.
+*
+*                           (A) The application-specific connection handler function may service the
+*                               application data immediately within the handler function, in which case
+*                               the application data SHOULD be serviced as quickly as possible since the
+*                               network's global lock remains acquired for the full duration of the
+*                               network receive.  Thus no other network receives or transmits can occur
+*                               while the application-specific handler function executes.
+*
+*                           (B) The application-specific connection handler function may delay servicing
+*                               the application data by some other application-specific data servicing
+*                               function(s), in which case the servicing function(s) MUST :
+*
+*                               (1) Acquire the network's global lock PRIOR to calling NetUDP_RxAppData()
+*                               (2) Release the network's global lock AFTER    calling NetUDP_RxAppData()
+*
+*                               See 'net_udp.c  NetUDP_RxAppData()  Note #2'.
+*
+*                       (2) (A) (1) If NetUDP_RxAppDataHandler()          successfully demultiplexes the UDP
+*                                   packets, it SHOULD eventually call NetUDP_RxAppData() to deframe the UDP
+*                                   packet data.  If NetUDP_RxAppData() successfully deframes the UDP packet
+*                                   application data :
+*
+*                                   (a) NetUDP_RxAppDataHandler() SHOULD return NET_APP_ERR_NONE, regardless
+*                                       of whether the application handled the application data; ...
+*                                   (b) but MUST NOT call NetUDP_RxPktFree() to free the UDP packet network
+*                                       buffer(s) since NetUDP_RxAppData() frees the network buffer(s) [see
+*                                       'NetUDP_RxAppData()  Note #1d'].
+*
+*                               (2) If NetUDP_RxAppDataHandler() does NOT successfully demultiplex   the UDP
+*                                   packets :
+*
+*                                   (a) NetUDP_RxAppDataHandler() SHOULD return NET_ERR_RX_DEST, ...
+*                                   (b) but must NOT free or discard the UDP packet network buffer(s) since
+*                                       NetUDP_Rx() discards the network buffer(s).
+*
+*                               (3) If NetUDP_RxAppDataHandler() or NetUDP_RxAppData() fails for any other
+*                                   reason(s) :
+*
+*                                   (a) NetUDP_RxAppDataHandler() SHOULD return NET_ERR_RX, ...
+*                                   (b) but MUST call NetUDP_RxPktDiscard() to discard the UDP packet network
+*                                       buffer(s).
+*
+*                           (B) FAILURE to appropriately call NetUDP_RxAppData() or NetUDP_RxPktDiscard() MAY
+*                               result in lost network buffer(s).
+*
+*                   (b) Application-specific UDP connection handler function MUST return one of the following
+*                       error codes ONLY [see 'Argument(s) : p_err'] :
+*
+*                       (1) NET_APP_ERR_NONE  for     received UDP packets     destined to an available
+*                               application connection & successfully deframed (see Note #1a2A1a)
+*
+*                       (2) NET_ERR_RX_DEST   for any received UDP packets NOT destined to an available
+*                               application connection                         (see Note #1a2A2a)
+*
+*                       (3) NET_ERR_RX        for any other receive error      (see Note #1a2A3a)
+*********************************************************************************************************
+*/
+
+#if ((NET_UDP_CFG_APP_API_SEL == NET_UDP_APP_API_SEL_APP     ) || \
+     (NET_UDP_CFG_APP_API_SEL == NET_UDP_APP_API_SEL_SOCK_APP))
+void  NetUDP_RxAppDataHandler (NET_BUF           *pbuf,
+                               NET_IP_ADDR        src_addr,
+                               NET_UDP_PORT_NBR   src_port,
+                               NET_IP_ADDR        dest_addr,
+                               NET_UDP_PORT_NBR   dest_port,
+                               NET_ERR           *p_err)
+{
+   *p_err = NET_ERR_RX_DEST;
+}
+#endif
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_bsp.h b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_bsp.h
new file mode 100644
index 0000000..27c081a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_bsp.h
@@ -0,0 +1,98 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP V2
+*                                      The Embedded TCP/IP Suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                    Cadence Gigabit Ethernet MAC
+*                                               on the
+*                                            ZYNQ-7000 EPP
+*
+* Filename      : net_bsp.h
+* Version       : V2.13.00
+* Programmer(s) : ITJ
+*                 AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#if ((defined(NET_BSP_MODULE)) && \
+     (defined(NET_GLOBALS_EXT)))
+#define  NET_BSP_EXT
+#else
+#define  NET_BSP_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                           NETWORK BOARD SUPPORT PACKAGE (BSP) ERROR CODES
+*
+* Note(s) : (1) ALL BSP-independent error codes #define'd in      'net_err.h';
+*               ALL BSP-specific    error codes #define'd in this 'net_bsp.h'.
+*
+*           (2) Network error code '10,000' series reserved for network BSP errors.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_BSP_ETHER     NetDev_BSP_AXIEthernetLite_0;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_dev_cfg.c b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_dev_cfg.c
new file mode 100644
index 0000000..f189f84
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_dev_cfg.c
@@ -0,0 +1,185 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP V2
+*                                      The Embedded TCP/IP Suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  NETWORK DEVICE CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : net_zynq_gem_dev_cfg.c
+* Version       : V2.13.01
+* Programmer(s) : EHS
+*                 FGK
+*                 ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_DEV_CFG_MODULE
+#include   
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+#include   
+#endif
+
+
+/*
+*********************************************************************************************************
+*                           EXAMPLE NETWORK INTERFACE / DEVICE CONFIGURATION
+*
+* Note(s) : (1) (a) Buffer & memory sizes & alignments configured in number of octets.
+*               (b) Data bus size                      configured in number of bits.
+*
+*           (2) (a) All   network  buffer data area sizes MUST be configured greater than or equal to
+*                   NET_BUF_DATA_SIZE_MIN.
+*               (b) Large transmit buffer data area sizes MUST be configured greater than or equal to
+*                   small transmit buffer data area sizes.
+*               (c) Small transmit buffer data area sizes MAY need to be configured greater than or
+*                   equal to the specific interface's minimum packet size.
+*
+*               See also 'net_buf.c       NetBuf_PoolCfgValidate()          Note #3'
+*                      & 'net_if_ether.c  NetIF_Ether_BufPoolCfgValidate()  Note #2'.
+*
+*           (3) (a) MUST configure at least one (1) large receive  buffer.
+*               (b) MUST configure at least one (1)       transmit buffer, however, zero (0) large OR
+*                       zero (0) small transmit buffers MAY be configured.
+*
+*               See also 'net_buf.c  NetBuf_PoolCfgValidate()  Note #2'.
+*
+*           (4) Some processors or devices may be more efficient & may even REQUIRE that buffer data areas
+*               align to specific CPU-word/octet address boundaries in order to successfully read/write
+*               data from/to devices.  Therefore, it is recommended to align devices' buffer data areas to
+*               the processor's or device's data bus width.
+*
+*               See also 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #2b'.
+*
+*           (5) Positive offset from base receive/transmit index, if required by device (or driver) :
+*
+*               (a) (1) Some device's may receive or buffer additional octets prior to the actual  received
+*                       packet.  Thus an offset may be required to ignore these additional octets :
+*
+*                       (A) If a device does NOT receive or buffer any  additional octets prior to received
+*                           packets, then the default offset of '0' SHOULD be configured.
+*
+*                       (B) However, if a device does receive or buffer additional octets prior to received
+*                           packets, then configure the device's receive  offset with the number of
+*                           additional octets.
+*
+*                       See also 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #2b1A'.
+*
+*                   (2) Some device's/driver's may require additional octets prior to the actual transmit
+*                       packet.  Thus an offset may be required to reserve additional octets :
+*
+*                       (A) If a device/driver does NOT require any  additional octets prior to  transmit
+*                           packets, then the default offset of '0' SHOULD be configured.
+*
+*                       (B) However, if a device/driver does require additional octets prior to  transmit
+*                           packets, then configure the device's transmit offset with the number of
+*                           additional octets.
+*
+*                       See also 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #2b1B'.
+*
+*               (b) Since each network buffer data area allocates additional octets for its configured
+*                   offset(s) [see 'net_if.c  NetIF_BufPoolInit()  Note #3'], the network buffer data
+*                   area size does NOT need to be increased by the number of additional offset octets.
+*
+*           (6) Flags to configure (optional) device features; bit-field flags logically OR'd :
+*
+*               (a) NET_DEV_CFG_FLAG_NONE           No device configuration flags selected.
+*
+*               (b) NET_DEV_CFG_FLAG_SWAP_OCTETS    Swap data octets [i.e. swap data words' high-order
+*                                                       octet(s) with data words' low-order octet(s),
+*                                                       & vice-versa] if required by device-to-CPU data
+*                                                       bus wiring &/or CPU endian word order.
+*
+*           (7) Network devices with receive descriptors MUST configure the number of receive buffers
+*               greater than the number of receive descriptors.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   ETHERNET DEVICE CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                    /* ----------------- EXAMPLE ETHERNET DEVICE A, #1 CONFIGURATION ------------------ */
+NET_DEV_CFG_ETHER  NetDev_AXIEthernetLite_0 = {
+
+    NET_IF_MEM_TYPE_MAIN,           /* Desired receive  buffer memory pool type :                                       */
+                                    /*   NET_IF_MEM_TYPE_MAIN        buffers allocated from main memory                 */
+                                    /*   NET_IF_MEM_TYPE_DEDICATED   buffers allocated from (device's) dedicated memory */
+    1536u,                          /* Desired size      of device's large receive  buffers (in octets) [see Note #2].  */
+      16u,                          /* Desired number    of device's large receive  buffers             [see Note #3a]. */
+      32u,                          /* Desired alignment of device's       receive  buffers (in octets) [see Note #4].  */
+       0u,                          /* Desired offset from base receive  index, if needed   (in octets) [see Note #5a1].*/
+
+
+    NET_IF_MEM_TYPE_MAIN,           /* Desired transmit buffer memory pool type :                                       */
+                                    /*   NET_IF_MEM_TYPE_MAIN        buffers allocated from main memory                 */
+                                    /*   NET_IF_MEM_TYPE_DEDICATED   buffers allocated from (device's) dedicated memory */
+    1632u,                          /* Desired size      of device's large transmit buffers (in octets) [see Note #2].  */
+       8u,                          /* Desired number    of device's large transmit buffers             [see Note #3b]. */
+     160u,                          /* Desired size      of device's small transmit buffers (in octets) [see Note #2].  */
+       8u,                          /* Desired number    of device's small transmit buffers             [see Note #3b]. */
+      32u,                          /* Desired alignment of device's       transmit buffers (in octets) [see Note #4].  */
+       0u,                          /* Desired offset from base transmit index, if needed   (in octets) [see Note #5a2].*/
+
+
+       0xFFFF0000u,                 /* Base address   of dedicated memory, if available.                                */
+       0x4000u,                     /* Size           of dedicated memory, if available (in octets).                    */
+
+
+    NET_DEV_CFG_FLAG_NONE,          /* Desired option flags, if any (see Note #6).                                      */
+
+
+             1u,                    /* Desired number of device's receive  descriptors (see Note #7).                   */
+             1u,                    /* Desired number of device's transmit descriptors.                                 */
+
+
+    0x40E00000u,                    /* Base address   of device's hardware/registers.                                   */
+
+             0u,                    /* Size           of device's data bus (in bits), if available.                     */
+
+
+   "50:E5:49:E6:8D:35",             /* Desired device hardware address; may be NULL address or string ...               */
+                                    /* ... if  device hardware address configured or set at run-time.                   */
+};
+
+const  NET_PHY_CFG_ETHER  NetPhy_Cfg_Ether_0 = {
+    NET_PHY_ADDR_AUTO,              /* Phy bus address.                                                                 */
+    NET_PHY_BUS_MODE_MII,           /* Phy bus mode.                                                                    */
+    NET_PHY_TYPE_INT,               /* Phy type.                                                                        */
+    NET_PHY_SPD_100,                /* Auto-Negotiation determines link speed.                                          */
+    NET_PHY_DUPLEX_FULL,            /* Auto-Negotiation determines link duplex.                                         */
+};
+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_dev_cfg.h b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_dev_cfg.h
new file mode 100644
index 0000000..cb76d08
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_dev_cfg.h
@@ -0,0 +1,115 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  NETWORK DEVICE CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename : net_dev_cfg.h
+* Version  : V3.00.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This network device configuration header file is protected from multiple pre-processor
+*               inclusion through use of the network module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DEV_CFG_MODULE_PRESENT                             /* See Note #1.                                         */
+#define  NET_DEV_CFG_MODULE_PRESENT
+
+#include   
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+#include   
+#endif
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+#include   
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                    NETWORK DEVICE CONFIGURATION
+*
+* Note(s) : (1) (a) Each network device maps to a unique, developer-configured device configuration that
+*                   MUST be defined in application files, typically 'net_dev_cfg.c', & SHOULD be forward-
+*                   declared with the exact same name & type in order to be used by the application during
+*                   calls to NetIF_Add().
+*
+*               (b) Since these device configuration structures are referenced ONLY by application files,
+*                   there is NO required naming convention for these configuration structures.  However,
+*                   the following naming convention is suggested for all developer-configured network
+*                   device configuration structures :
+*
+*                       NetDev_Cfg_[_Number]
+*
+*                           where
+*                                           Name of device or device driver
+*                                   [Number]        Network device number for each specific instance of
+*                                                       device (optional if the development board does NOT
+*                                                       support multiple instances of the specific device)
+*
+*                       Examples :
+*
+*                           NET_DEV_CFG_ETHER  NetDev_Cfg_MACB;         Ethernet configuration for MACB
+*
+*                           NET_DEV_CFG_ETHER  NetDev_Cfg_FEC_0;        Ethernet configuration for FEC #0
+*                           NET_DEV_CFG_ETHER  NetDev_Cfg_FEC_1;        Ethernet configuration for FEC #1
+*
+*                           NET_DEV_CFG_WIFI   NetDev_Cfg_RS9110N21_0;  Wireless configuration for RS9110-N-21
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+extern  NET_DEV_CFG_ETHER  NetDev_AXIEthernetLite_0;
+extern  NET_PHY_CFG_ETHER  NetPhy_Cfg_Ether_0;
+
+#endif  /* NET_IF_ETHER_MODULE_EN */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_DEV_CFG_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_bsp.c b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_bsp.c
new file mode 100644
index 0000000..80ea45a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_bsp.c
@@ -0,0 +1,625 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP V2
+*                                      The Embedded TCP/IP Suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                    Cadence Gigabit Ethernet MAC
+*                                               on the
+*                                            ZYNQ-7000 EPP
+*
+* Filename      : net_bsp.c
+* Version       : V2.13.00
+* Programmer(s) : ITJ
+*                 AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    NET_BSP_MODULE
+
+#include  
+#include  
+
+#include  
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                  NETWORK DEVICE INTERFACE NUMBERS
+*
+* Note(s) : (1) (a) Each network device maps to a unique network interface number.
+*
+*               (b) Instances of network devices' interface number SHOULD be named using the following
+*                   convention :
+*
+*                       [Number]_IF_Nbr
+*
+*                           where
+*                                            Development board name
+*                                           Network device name (or type)
+*                                   [Number]        Network device number for each specific instance
+*                                                       of device (optional if the development board
+*                                                       does NOT support multiple instances of the
+*                                                       specific device)
+*
+*                   For example, the network device interface number variable for the #2 MACB Ethernet
+*                   controller on an Atmel AT91SAM92xx should be named 'AT91SAM92xx_MACB_2_IF_Nbr'.
+*
+*               (c) Network device interface number variables SHOULD be initialized to 'NET_IF_NBR_NONE'.
+*********************************************************************************************************
+*/
+
+static  NET_IF_NBR  BoardDev_Nbr_IF_Nbr     = NET_IF_NBR_NONE;
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                               NETWORK DEVICE BSP FUNCTION PROTOTYPES
+*
+* Note(s) : (1) Device driver BSP functions may be arbitrarily named.  However, it is recommended that
+*               device BSP functions be named using the suggested names/conventions provided below.
+*
+*               (a) (1) Network device BSP functions SHOULD be named using the following convention :
+*
+*                           NetDev_[Device][Number]()
+*
+*                               where
+*                                   (A) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (B)       Network device BSP function
+*                                   (C) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*                       For example, the NetDev_CfgClk() function for the #2 MACB Ethernet controller
+*                       on an Atmel AT91SAM92xx should be named NetDev_MACB_CfgClk2().
+*
+*                   (2) BSP-level device ISR handlers SHOULD be named using the following convention :
+*
+*                           NetDev_[Device]ISR_Handler[Type][Number]()
+*
+*                               where
+*                                   (A) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (B) [Type]          Network device interrupt type (optional if
+*                                                           interrupt type is generic or unknown)
+*                                   (C) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*               (b) All BSP function prototypes SHOULD be located within the development board's network
+*                   BSP C source file ('net_bsp.c') & be declared as static functions to prevent name
+*                   clashes with other network protocol suite BSP functions/files.
+*********************************************************************************************************
+*/
+
+                                                                /* -- IF #1 : GENERIC ETHER BSP FUNCTION PROTOTYPES -- */
+static  void        NetDev_CfgClk             (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_CfgIntCtrl         (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  void        NetDev_CfgGPIO            (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+static  CPU_INT32U  NetDev_ClkFreqGet         (NET_IF                          *p_if,
+                                               NET_ERR                         *p_err);
+
+
+static  void  NetDev_ISR_Handler              (void*p_arg, CPU_INT32U cpu_id);
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                    NETWORK DEVICE BSP INTERFACE
+*
+* Note(s) : (1) Device board-support package (BSP) interface structures are used by the device driver to
+*               call specific devices' BSP functions via function pointer instead of by name.  This enables
+*               the network protocol suite to compile & operate with multiple instances of multiple devices
+*               & drivers.
+*
+*           (2) In most cases, the BSP interface structure provided below SHOULD suffice for most devices'
+*               BSP functions exactly as is with the exception that BSP interface structures' names MUST be
+*               unique & SHOULD clearly identify the development board, device name, & possibly the specific
+*               device number (if the development board supports multiple instances of any given device).
+*
+*               (a) BSP interface structures SHOULD be named using the following convention :
+*
+*                       NetDev_BSP_[Number]{}
+*
+*                           where
+*                               (1)          Development board name
+*                               (2)         Network device name (or type)
+*                               (3) [Number]        Network device number for each specific instance
+*                                                       of device (optional if the development board
+*                                                       does NOT support multiple instances of the
+*                                                       specific device)
+*
+*                   For example, the BSP interface structure for the #2 MACB Ethernet controller on
+*                   an Atmel AT91SAM92xx should be named NetDev_BSP_AT91SAM92xx_MACB_2{}.
+*
+*               (b) The BSP interface structure MUST also be externally declared in the development
+*                   board's network BSP header file ('net_bsp.h') with the exact same name & type.
+*********************************************************************************************************
+*/
+
+const  NET_DEV_BSP_ETHER     NetDev_BSP_GEM_0 = {                               /* Board-/device-specific BSP fnct ptrs : */
+                                                         &NetDev_CfgClk,        /*   Cfg clk(s)                           */
+                                                         &NetDev_CfgIntCtrl,    /*   Cfg int ctrl(s)                      */
+                                                         &NetDev_CfgGPIO,       /*   Cfg GPIO                             */
+                                                         &NetDev_ClkFreqGet     /*   Get clk freq                         */
+                                                };
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                              NETWORK ETHERNET DEVICE DRIVER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           NetDev_CfgClk()
+*
+* Description : Configure clocks for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device clock(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device clock(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgClk (NET_IF   *p_if,
+                             NET_ERR  *p_err)
+{
+    CPU_INT32U  reg_val;
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+   reg_val = *((CPU_REG32 *)(0xE000B004));
+
+   if (reg_val & DEF_BIT_10) {
+       /* 1000Mbps. */
+       *((CPU_REG32 *)(0xF8000008)) = 0xDF0Du;
+       CPU_MB();
+       *((CPU_REG32 *)(0xF8000138)) = 0x00000001;
+       *((CPU_REG32 *)(0xF8000140))  = (1 << 20) | (8 << 8) | (0 << 4) | (1 << 0);
+       CPU_MB();
+       *((CPU_REG32 *)(0xF8000004))   = 0x767Bu;
+   } else if (reg_val & DEF_BIT_00) {
+       /* 100Mbps. */
+       *((CPU_REG32 *)(0xF8000008)) = 0xDF0Du;
+       CPU_MB();
+       *((CPU_REG32 *)(0xF8000138)) = 0x00000001;
+       *((CPU_REG32 *)(0xF8000140))  = (1 << 20) | (40 << 8) | (0 << 4) | (1 << 0);
+       CPU_MB();
+       *((CPU_REG32 *)(0xF8000004))   = 0x767Bu;
+   } else {
+       /* 10 Mbps. */
+       *((CPU_REG32 *)(0xF8000008)) = 0xDF0Du;
+       CPU_MB();
+       *((CPU_REG32 *)(0xF8000138)) = 0x00000001;
+       *((CPU_REG32 *)(0xF8000140))  = (10 << 20) | (40 << 8) | (0 << 4) | (1 << 0);
+       CPU_MB();
+       *((CPU_REG32 *)(0xF8000004))   = 0x767Bu;
+   }
+
+
+
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_CfgIntCtrl()
+*
+* Description : Configure interrupts &/or interrupt controller for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device interrupt(s)     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device interrupt(s) NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgIntCtrl (NET_IF   *p_if,
+                                 NET_ERR  *p_err)
+{
+    BoardDev_Nbr_IF_Nbr = p_if->Nbr;             /* Configure this device's BSP instance with specific interface number. */
+
+    UCOS_IntVectSet(54u,
+                     0u,
+                     DEF_BIT_00,
+                     NetDev_ISR_Handler,
+                     DEF_NULL);
+
+    UCOS_IntSrcEn(54u);
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          NetDev_CfgGPIO()
+*
+* Description : Configure general-purpose I/O (GPIO) for the specified interface/device.
+*
+* Argument(s) : p_if         Pointer to network interface to configure.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device GPIO     successfully configured.
+*                               NET_DEV_ERR_FAULT               Device GPIO NOT successfully configured.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_CfgGPIO (NET_IF   *p_if,
+                              NET_ERR  *p_err)
+{
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+   *p_err = NET_DEV_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         NetDev_ClkFreqGet()
+*
+* Description : Get device clock frequency.
+*
+* Argument(s) : p_if         Pointer to network interface to get clock frequency.
+*               ----         Argument validated in NetIF_Add().
+*
+*               p_err        Pointer to variable that will receive the return error code from this function :
+*
+*                               NET_DEV_ERR_NONE                Device clock frequency     successfully
+*                                                                   returned.
+*                               NET_DEV_ERR_FAULT               Device clock frequency NOT successfully
+*                                                                   returned.
+*
+* Return(s)   : Device clock frequency (in Hz).
+*
+* Caller(s)   : NetDev_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  NetDev_ClkFreqGet (NET_IF   *p_if,
+                                       NET_ERR  *p_err)
+{
+    CPU_INT32U  clk_freq;
+
+
+   (void)&p_if;                                                  /* Prevent 'variable unused' compiler warning.          */
+
+    clk_freq = 0;
+   *p_err     = NET_DEV_ERR_NONE;
+
+    return (clk_freq);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        NetDev_ISR_Handler()
+*
+* Description : BSP-level ISR handler(s) for device interrupts.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : CPU &/or device interrupts.
+*
+* Note(s)     : (1) (a) Each device interrupt, or set of device interrupts, MUST be handled by a
+*                       unique BSP-level ISR handler which maps each specific device interrupt to
+*                       its corresponding network interface ISR handler.
+*
+*                   (b) BSP-level device ISR handlers SHOULD be named using the following convention :
+*
+*                           NetDev_[Device]ISR_Handler[Type][Number]()
+*
+*                               where
+*                                   (1) [Device]        Network device name or type (optional if the
+*                                                           development board does NOT support multiple
+*                                                           devices)
+*                                   (2) [Type]          Network device interrupt type (optional if
+*                                                           interrupt type is generic or unknown)
+*                                   (3) [Number]        Network device number for each specific instance
+*                                                           of device (optional if the development board
+*                                                           does NOT support multiple instances of the
+*                                                           specific device)
+*
+*                       See also 'NETWORK DEVICE BSP FUNCTION PROTOTYPES  Note #2a2'.
+*********************************************************************************************************
+*/
+
+static  void  NetDev_ISR_Handler(void*p_arg, CPU_INT32U cpu_id)
+{
+    NET_IF_NBR        if_nbr;
+    NET_DEV_ISR_TYPE  type;
+    NET_ERR           err;
+
+
+    if_nbr = BoardDev_Nbr_IF_Nbr;                               /* See Note #1b3.                                       */
+    type   = NET_DEV_ISR_TYPE_UNKNOWN;                          /* See Note #1b2.                                       */
+
+    NetIF_ISR_Handler(if_nbr, type, &err);
+}
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                            TRANSMISSION CONTROL PROTOCOL LAYER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        NetTCP_InitTxSeqNbr()
+*
+* Description : Initialize the TCP Transmit Initial Sequence Counter, 'NetTCP_TxSeqNbrCtr'.
+*
+*               (1) Possible initialization methods include :
+*
+*                   (a) Time-based initialization is one preferred method since it more appropriately
+*                       provides a pseudo-random initial sequence number.
+*                   (b) Hardware-generated random number initialization is NOT a preferred method since it
+*                       tends to produce a discrete set of pseudo-random initial sequence numbers--often
+*                       the same initial sequence number.
+*                   (c) Hard-coded initial sequence number is NOT a preferred method since it is NOT random.
+*
+*                   See also 'net_tcp.h  NET_TCP_TX_GET_SEQ_NBR()  Note #1'.
+*
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetTCP_Init().
+*
+*               This function is an INTERNAL network protocol suite function & SHOULD NOT be called by
+*               application function(s).
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#ifdef  NET_TCP_MODULE_PRESENT
+void  NetTCP_InitTxSeqNbr (void)
+{
+    NetTCP_TxSeqNbrCtr = NET_TCP_SEQ_NBR_NONE;
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                               USER DATAGRAM PROTOCOL LAYER FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                      NetUDP_RxAppDataHandler()
+*
+* Description : Application-specific UDP connection handler function.
+*
+* Argument(s) : pbuf        Pointer to network buffer that received UDP datagram.
+*               -----        Argument checked in NetUDP_Rx().
+*
+*               src_addr    Received UDP datagram's source      IP  address.
+*
+*               src_port    Received UDP datagram's source      UDP port.
+*
+*               dest_addr   Received UDP datagram's destination IP  address.
+*
+*               dest_port   Received UDP datagram's destination UDP port.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function
+*                               (see Note #1b) :
+*
+*                               NET_APP_ERR_NONE                UDP datagram successfully received to application
+*                                                                   connection(s).
+*                               NET_ERR_RX                      Receive error; packet discarded.
+*                               NET_ERR_RX_DEST                 Invalid destination; no application connection
+*                                                                   available for received packet.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : NetUDP_RxPktDemuxAppData().
+*$PAGE*
+* Note(s)     : (1) Application-specific UDP connection handler function is fully responsible for properly
+*                   receiving, demultiplexing, & handling all UDP receive packets to the appropriate
+*                   application connections.
+*
+*                   (a) (1) If the application-specific UDP connection handler function successfully
+*                           demultiplexes UDP receive packets to an application connection, the handler
+*                           function MUST at some point call NetUDP_RxAppData() to deframe the application
+*                           data from the packet buffer(s) into an application array as well as copy any
+*                           received IP options into an application IP options buffer.
+*
+*                           (A) The application-specific connection handler function may service the
+*                               application data immediately within the handler function, in which case
+*                               the application data SHOULD be serviced as quickly as possible since the
+*                               network's global lock remains acquired for the full duration of the
+*                               network receive.  Thus no other network receives or transmits can occur
+*                               while the application-specific handler function executes.
+*
+*                           (B) The application-specific connection handler function may delay servicing
+*                               the application data by some other application-specific data servicing
+*                               function(s), in which case the servicing function(s) MUST :
+*
+*                               (1) Acquire the network's global lock PRIOR to calling NetUDP_RxAppData()
+*                               (2) Release the network's global lock AFTER    calling NetUDP_RxAppData()
+*
+*                               See 'net_udp.c  NetUDP_RxAppData()  Note #2'.
+*
+*                       (2) (A) (1) If NetUDP_RxAppDataHandler()          successfully demultiplexes the UDP
+*                                   packets, it SHOULD eventually call NetUDP_RxAppData() to deframe the UDP
+*                                   packet data.  If NetUDP_RxAppData() successfully deframes the UDP packet
+*                                   application data :
+*
+*                                   (a) NetUDP_RxAppDataHandler() SHOULD return NET_APP_ERR_NONE, regardless
+*                                       of whether the application handled the application data; ...
+*                                   (b) but MUST NOT call NetUDP_RxPktFree() to free the UDP packet network
+*                                       buffer(s) since NetUDP_RxAppData() frees the network buffer(s) [see
+*                                       'NetUDP_RxAppData()  Note #1d'].
+*
+*                               (2) If NetUDP_RxAppDataHandler() does NOT successfully demultiplex   the UDP
+*                                   packets :
+*
+*                                   (a) NetUDP_RxAppDataHandler() SHOULD return NET_ERR_RX_DEST, ...
+*                                   (b) but must NOT free or discard the UDP packet network buffer(s) since
+*                                       NetUDP_Rx() discards the network buffer(s).
+*
+*                               (3) If NetUDP_RxAppDataHandler() or NetUDP_RxAppData() fails for any other
+*                                   reason(s) :
+*
+*                                   (a) NetUDP_RxAppDataHandler() SHOULD return NET_ERR_RX, ...
+*                                   (b) but MUST call NetUDP_RxPktDiscard() to discard the UDP packet network
+*                                       buffer(s).
+*
+*                           (B) FAILURE to appropriately call NetUDP_RxAppData() or NetUDP_RxPktDiscard() MAY
+*                               result in lost network buffer(s).
+*
+*                   (b) Application-specific UDP connection handler function MUST return one of the following
+*                       error codes ONLY [see 'Argument(s) : p_err'] :
+*
+*                       (1) NET_APP_ERR_NONE  for     received UDP packets     destined to an available
+*                               application connection & successfully deframed (see Note #1a2A1a)
+*
+*                       (2) NET_ERR_RX_DEST   for any received UDP packets NOT destined to an available
+*                               application connection                         (see Note #1a2A2a)
+*
+*                       (3) NET_ERR_RX        for any other receive error      (see Note #1a2A3a)
+*********************************************************************************************************
+*/
+
+#if ((NET_UDP_CFG_APP_API_SEL == NET_UDP_APP_API_SEL_APP     ) || \
+     (NET_UDP_CFG_APP_API_SEL == NET_UDP_APP_API_SEL_SOCK_APP))
+void  NetUDP_RxAppDataHandler (NET_BUF           *pbuf,
+                               NET_IP_ADDR        src_addr,
+                               NET_UDP_PORT_NBR   src_port,
+                               NET_IP_ADDR        dest_addr,
+                               NET_UDP_PORT_NBR   dest_port,
+                               NET_ERR           *p_err)
+{
+   *p_err = NET_ERR_RX_DEST;
+}
+#endif
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_bsp.h b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_bsp.h
new file mode 100644
index 0000000..7849666
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_bsp.h
@@ -0,0 +1,98 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP V2
+*                                      The Embedded TCP/IP Suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                            NETWORK BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
+*                                    Cadence Gigabit Ethernet MAC
+*                                               on the
+*                                            ZYNQ-7000 EPP
+*
+* Filename      : net_bsp.h
+* Version       : V2.13.00
+* Programmer(s) : ITJ
+*                 AA
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#if ((defined(NET_BSP_MODULE)) && \
+     (defined(NET_GLOBALS_EXT)))
+#define  NET_BSP_EXT
+#else
+#define  NET_BSP_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                           NETWORK BOARD SUPPORT PACKAGE (BSP) ERROR CODES
+*
+* Note(s) : (1) ALL BSP-independent error codes #define'd in      'net_err.h';
+*               ALL BSP-specific    error codes #define'd in this 'net_bsp.h'.
+*
+*           (2) Network error code '10,000' series reserved for network BSP errors.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  const  NET_DEV_BSP_ETHER     NetDev_BSP_GEM_0;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_dev_cfg.c b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_dev_cfg.c
new file mode 100644
index 0000000..b80bfd4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_dev_cfg.c
@@ -0,0 +1,185 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP V2
+*                                      The Embedded TCP/IP Suite
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  NETWORK DEVICE CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename      : net_zynq_gem_dev_cfg.c
+* Version       : V2.13.01
+* Programmer(s) : EHS
+*                 FGK
+*                 ITJ
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_DEV_CFG_MODULE
+#include   
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+#include   
+#endif
+
+
+/*
+*********************************************************************************************************
+*                           EXAMPLE NETWORK INTERFACE / DEVICE CONFIGURATION
+*
+* Note(s) : (1) (a) Buffer & memory sizes & alignments configured in number of octets.
+*               (b) Data bus size                      configured in number of bits.
+*
+*           (2) (a) All   network  buffer data area sizes MUST be configured greater than or equal to
+*                   NET_BUF_DATA_SIZE_MIN.
+*               (b) Large transmit buffer data area sizes MUST be configured greater than or equal to
+*                   small transmit buffer data area sizes.
+*               (c) Small transmit buffer data area sizes MAY need to be configured greater than or
+*                   equal to the specific interface's minimum packet size.
+*
+*               See also 'net_buf.c       NetBuf_PoolCfgValidate()          Note #3'
+*                      & 'net_if_ether.c  NetIF_Ether_BufPoolCfgValidate()  Note #2'.
+*
+*           (3) (a) MUST configure at least one (1) large receive  buffer.
+*               (b) MUST configure at least one (1)       transmit buffer, however, zero (0) large OR
+*                       zero (0) small transmit buffers MAY be configured.
+*
+*               See also 'net_buf.c  NetBuf_PoolCfgValidate()  Note #2'.
+*
+*           (4) Some processors or devices may be more efficient & may even REQUIRE that buffer data areas
+*               align to specific CPU-word/octet address boundaries in order to successfully read/write
+*               data from/to devices.  Therefore, it is recommended to align devices' buffer data areas to
+*               the processor's or device's data bus width.
+*
+*               See also 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #2b'.
+*
+*           (5) Positive offset from base receive/transmit index, if required by device (or driver) :
+*
+*               (a) (1) Some device's may receive or buffer additional octets prior to the actual  received
+*                       packet.  Thus an offset may be required to ignore these additional octets :
+*
+*                       (A) If a device does NOT receive or buffer any  additional octets prior to received
+*                           packets, then the default offset of '0' SHOULD be configured.
+*
+*                       (B) However, if a device does receive or buffer additional octets prior to received
+*                           packets, then configure the device's receive  offset with the number of
+*                           additional octets.
+*
+*                       See also 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #2b1A'.
+*
+*                   (2) Some device's/driver's may require additional octets prior to the actual transmit
+*                       packet.  Thus an offset may be required to reserve additional octets :
+*
+*                       (A) If a device/driver does NOT require any  additional octets prior to  transmit
+*                           packets, then the default offset of '0' SHOULD be configured.
+*
+*                       (B) However, if a device/driver does require additional octets prior to  transmit
+*                           packets, then configure the device's transmit offset with the number of
+*                           additional octets.
+*
+*                       See also 'net_buf.h  NETWORK BUFFER INDEX & SIZE DEFINES  Note #2b1B'.
+*
+*               (b) Since each network buffer data area allocates additional octets for its configured
+*                   offset(s) [see 'net_if.c  NetIF_BufPoolInit()  Note #3'], the network buffer data
+*                   area size does NOT need to be increased by the number of additional offset octets.
+*
+*           (6) Flags to configure (optional) device features; bit-field flags logically OR'd :
+*
+*               (a) NET_DEV_CFG_FLAG_NONE           No device configuration flags selected.
+*
+*               (b) NET_DEV_CFG_FLAG_SWAP_OCTETS    Swap data octets [i.e. swap data words' high-order
+*                                                       octet(s) with data words' low-order octet(s),
+*                                                       & vice-versa] if required by device-to-CPU data
+*                                                       bus wiring &/or CPU endian word order.
+*
+*           (7) Network devices with receive descriptors MUST configure the number of receive buffers
+*               greater than the number of receive descriptors.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   ETHERNET DEVICE CONFIGURATION
+*********************************************************************************************************
+*/
+
+                                    /* ----------------- EXAMPLE ETHERNET DEVICE A, #1 CONFIGURATION ------------------ */
+NET_DEV_CFG_ETHER  NetDev_GEM_1 = {
+
+    NET_IF_MEM_TYPE_MAIN,           /* Desired receive  buffer memory pool type :                                       */
+                                    /*   NET_IF_MEM_TYPE_MAIN        buffers allocated from main memory                 */
+                                    /*   NET_IF_MEM_TYPE_DEDICATED   buffers allocated from (device's) dedicated memory */
+    1536u,                          /* Desired size      of device's large receive  buffers (in octets) [see Note #2].  */
+      64u,                          /* Desired number    of device's large receive  buffers             [see Note #3a]. */
+      32u,                          /* Desired alignment of device's       receive  buffers (in octets) [see Note #4].  */
+       0u,                          /* Desired offset from base receive  index, if needed   (in octets) [see Note #5a1].*/
+
+
+    NET_IF_MEM_TYPE_MAIN,           /* Desired transmit buffer memory pool type :                                       */
+                                    /*   NET_IF_MEM_TYPE_MAIN        buffers allocated from main memory                 */
+                                    /*   NET_IF_MEM_TYPE_DEDICATED   buffers allocated from (device's) dedicated memory */
+    1632u,                          /* Desired size      of device's large transmit buffers (in octets) [see Note #2].  */
+      64u,                          /* Desired number    of device's large transmit buffers             [see Note #3b]. */
+     160u,                          /* Desired size      of device's small transmit buffers (in octets) [see Note #2].  */
+      32u,                          /* Desired number    of device's small transmit buffers             [see Note #3b]. */
+      32u,                          /* Desired alignment of device's       transmit buffers (in octets) [see Note #4].  */
+       0u,                          /* Desired offset from base transmit index, if needed   (in octets) [see Note #5a2].*/
+
+
+       0,                 /* Base address   of dedicated memory, if available.                                */
+       0,                     /* Size           of dedicated memory, if available (in octets).                    */
+
+
+    NET_DEV_CFG_FLAG_NONE,          /* Desired option flags, if any (see Note #6).                                      */
+
+
+            32u,                    /* Desired number of device's receive  descriptors (see Note #7).                   */
+            16u,                    /* Desired number of device's transmit descriptors.                                 */
+
+
+    0xE000B000u,                    /* Base address   of device's hardware/registers.                                   */
+
+             0u,                    /* Size           of device's data bus (in bits), if available.                     */
+
+
+   "50:E5:49:E6:8D:28",             /* Desired device hardware address; may be NULL address or string ...               */
+                                    /* ... if  device hardware address configured or set at run-time.                   */
+};
+
+const  NET_PHY_CFG_ETHER  NetPhy_Cfg_Ether_1 = {
+    0xFF,                             /* Phy bus address.                                                                 */
+    NET_PHY_BUS_MODE_GMII,          /* Phy bus mode.                                                                    */
+    NET_PHY_TYPE_INT,               /* Phy type.                                                                        */
+    NET_PHY_SPD_1000,               /* Auto-Negotiation determines link speed.                                          */
+    NET_PHY_DUPLEX_FULL,            /* Auto-Negotiation determines link duplex.                                         */
+};
+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_dev_cfg.h b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_dev_cfg.h
new file mode 100644
index 0000000..d9bdb03
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_dev_cfg.h
@@ -0,0 +1,115 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  NETWORK DEVICE CONFIGURATION FILE
+*
+*                                              TEMPLATE
+*
+* Filename : net_dev_cfg.h
+* Version  : V3.00.00
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This network device configuration header file is protected from multiple pre-processor
+*               inclusion through use of the network module present pre-processor macro definition.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifndef  NET_DEV_CFG_MODULE_PRESENT                             /* See Note #1.                                         */
+#define  NET_DEV_CFG_MODULE_PRESENT
+
+#include   
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+#include   
+#endif
+
+#ifdef  NET_IF_WIFI_MODULE_EN
+#include   
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                    NETWORK DEVICE CONFIGURATION
+*
+* Note(s) : (1) (a) Each network device maps to a unique, developer-configured device configuration that
+*                   MUST be defined in application files, typically 'net_dev_cfg.c', & SHOULD be forward-
+*                   declared with the exact same name & type in order to be used by the application during
+*                   calls to NetIF_Add().
+*
+*               (b) Since these device configuration structures are referenced ONLY by application files,
+*                   there is NO required naming convention for these configuration structures.  However,
+*                   the following naming convention is suggested for all developer-configured network
+*                   device configuration structures :
+*
+*                       NetDev_Cfg_[_Number]
+*
+*                           where
+*                                           Name of device or device driver
+*                                   [Number]        Network device number for each specific instance of
+*                                                       device (optional if the development board does NOT
+*                                                       support multiple instances of the specific device)
+*
+*                       Examples :
+*
+*                           NET_DEV_CFG_ETHER  NetDev_Cfg_MACB;         Ethernet configuration for MACB
+*
+*                           NET_DEV_CFG_ETHER  NetDev_Cfg_FEC_0;        Ethernet configuration for FEC #0
+*                           NET_DEV_CFG_ETHER  NetDev_Cfg_FEC_1;        Ethernet configuration for FEC #1
+*
+*                           NET_DEV_CFG_WIFI   NetDev_Cfg_RS9110N21_0;  Wireless configuration for RS9110-N-21
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#ifdef  NET_IF_ETHER_MODULE_EN
+
+extern  NET_DEV_CFG_ETHER  NetDev_GEM_1;
+extern  NET_PHY_CFG_ETHER  NetPhy_Cfg_Ether_1;
+
+#endif  /* NET_IF_ETHER_MODULE_EN */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#endif  /* NET_DEV_CFG_MODULE_PRESENT */
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/cfg/net_cfg.c b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/cfg/net_cfg.c
new file mode 100644
index 0000000..94a9a6c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/cfg/net_cfg.c
@@ -0,0 +1,154 @@
+/*
+*********************************************************************************************************
+*                                             uC/TCP-IP
+*                                      The Embedded TCP/IP Suite
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/TCP-IP is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+**                                     NETWORK CONFIGURATION FILE
+*
+*                                          TEMPLATE-EXAMPLE
+*
+* Filename : net_cfg.c
+* Version  : V3.02.00
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#define    NET_CFG_MODULE
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     EXAMPLE TASKS CONFIGURATION
+*
+* Notes: (1) (a) Task priorities can be defined either in this configuration file 'net_cfg.c' or in a global
+*                OS tasks priorities configuration header file which must be included in 'net_cfg.c' and
+*                used within task's configuration structures:
+*
+*                   in app_cfg.h:
+*                       #define  NET_TASK_PRIO_RX           30u
+*                       #define  NET_TASK_PRIO_TX_DEALLOC    6u
+*                       #define  NET_TASK_PRIO_TMR          18u
+*
+*                   in net_cfg.c:
+*                       #include  
+*
+*                       NET_TASK_CFG  NetRxTaskCfg        = {
+*                                                              NET_TASK_PRIO_RX,
+*                                                              2048,
+*                                                              DEF_NULL,
+*                                                           };
+*
+*                       NET_TASK_CFG  NetTxDeallocTaskCfg = {
+*                                                              NET_TASK_PRIO_TX_DEALLOC,
+*                                                              512,
+*                                                              DEF_NULL,
+*                                                           };
+*
+*                       NET_TASK_CFG  NetTmrTaskCfg       = {
+*                                                              NET_TASK_PRIO_TMR,
+*                                                              1024,
+*                                                              DEF_NULL,
+*                                                           };
+*
+*
+*            (b) We recommend you configure the Network Protocol Stack task priorities & Network application
+*                task priorities as follows:
+*
+*                   Network TX Dealloc task   (highest priority)
+*
+*                   Network application tasks, such as HTTPs instance.
+*
+*                   Network timer task
+*                   Network RX task           (lowest  priority)
+*
+*                We recommend that the uC/TCP-IP Timer task and network interface Receive task be lower
+*                priority than almost all other application tasks; but we recommend that the network
+*                interface Transmit De-allocation task be higher  priority than all application tasks that use
+*                uC/TCP-IP network services.
+*
+*                However better performance can be observed when the network application task is set with the
+*                lowest priority. Some experimentation could be required to identify the best task priority
+*                configuration.
+*
+*        (2)  The only guaranteed method of determining the required task stack sizes is to calculate the maximum
+*             stack usage for each task. Obviously, the maximum stack usage for a task is the total stack usage
+*             along the task's most-stack-greedy function path plus the (maximum) stack usage for interrupts.
+*             Note that the most-stack-greedy function path is not necessarily the longest or deepest function path.
+*             Micrium cannot provide any recommended stack size values since it's specific to each compiler and
+*             processor.
+*
+*             Although Micrium does NOT officially recommend any specific tools to calculate task/function stack usage.
+*             However Wikipedia maintains a list of static code analysis tools for various languages including C:
+*
+*                 http://en.wikipedia.org/wiki/List_of_tools_for_static_code_analysis
+*
+*        (3)  When the stack pointer is defined as null (DEF_NULL), the task's stack is allocated automatically on the
+*             heap of uC/LIB. If for some reason you would like to allocate the stack somewhere else and by yourself,
+*             you can just specify the memory location of the stack to use.
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (APP_TCPIP_EXP_ENABLED == DEF_ENABLED)
+const  NET_TASK_CFG  NetTaskCfg = {
+        NET_TASK_CFG_RX_PRIO,                                   /* Net task priority                    (see Note #1).  */
+        NET_TASK_CFG_RX_STACK_SIZE,                             /* Net task stack size in bytes         (see Note #2).  */
+        DEF_NULL,                                               /* Net task stack pointer               (See Note #3).  */
+};
+#else
+const  NET_TASK_CFG  NetRxTaskCfg = {
+        NET_TASK_CFG_RX_PRIO,                                   /* RX task priority                    (see Note #1).   */
+        NET_TASK_CFG_RX_STACK_SIZE,                             /* RX task stack size in bytes         (see Note #2).   */
+        DEF_NULL,                                               /* RX task stack pointer               (See Note #3).   */
+};
+
+const  NET_TASK_CFG  NetTxDeallocTaskCfg = {
+        NET_TASK_CFG_TXDEALLOC_PRIO,                            /* TX Dealloc task priority            (see Note #1).   */
+        NET_TASK_CFG_TXDEALLOC_STACK_SIZE,                      /* TX Dealloc task stack size in bytes (see Note #2).   */
+        DEF_NULL,                                               /* TX Dealloc task stack pointer       (See Note #3).   */
+};
+
+const  NET_TASK_CFG  NetTmrTaskCfg = {
+        NET_TASK_CFG_TMR_PRIO,                                  /* Timer task priority                 (see Note #1).   */
+        NET_TASK_CFG_TMR_STACK_SIZE,                            /* Timer task stack size in bytes      (see Note #2).   */
+        DEF_NULL,                                               /* Timer task stack pointer            (See Note #3).   */
+};
+#endif
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_tcpip/src/subdir.mk b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/subdir.mk
new file mode 100644
index 0000000..d958ae9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_tcpip/src/subdir.mk
@@ -0,0 +1,7 @@
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_tcpip/src/cfg/net_cfg.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_ultrascale_gem_bsp.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_bsp.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_bsp.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_xil_ether_lite_dev_cfg.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_bsp.c
+SRC += $(SRC_DIR)/ucos_v1_42/ucos/components/ucos_tcpip/src/bsp/net_zynq_gem_dev_cfg.c
diff --git a/src/ucos_v1_42/ucos/components/ucos_telnet-s/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_telnet-s/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_telnet-s/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_usbd/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/app_usbd_cfg.h b/src/ucos_v1_42/ucos/components/ucos_usbd/src/app_usbd_cfg.h
new file mode 100644
index 0000000..bbdca3b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/app_usbd_cfg.h
@@ -0,0 +1,33 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                       (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+* Filename      : app_usbd_cfg.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#include 
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_ps7_usb.c b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_ps7_usb.c
new file mode 100644
index 0000000..14cbe02
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_ps7_usb.c
@@ -0,0 +1,272 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  USB DEVICE DRIVER BOARD-SPECIFIC FUNCTIONS
+*                                               XILINX ZYNQ-7000
+*
+* File          : usbd_bsp_ps7_usb.c
+* Version       : V4.01.01.00
+* Programmer(s) : FT
+*                 FGK
+*                 JPB
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+#include  
+
+#if (UCOS_USB_DRIVER == UCOS_USB_USBPS)
+
+#include  
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*
+* Note(s) : (1) The USB device controller hardware in the Zynq-7000 is configured to support
+*               up to 12 endpoints.
+*           (2) The USB device controller driver can enable, disable and configure endpoint
+*               types up to the maximum selected during synthesis.
+*           (3) Each endpoint direction is essentially independent and can be configured with
+*               differing behavior in each direction.
+*               For example, the driver can configure endpoint 1 IN to be a bulk endpoint and
+*               endpoint 1 OUT to be an isochronous endpoint.
+*********************************************************************************************************
+*/
+
+USBD_DRV_EP_INFO  USBD_DrvEP_InfoTbl_PS7_USB[] = {
+    {USBD_EP_INFO_TYPE_CTRL                                                   | USBD_EP_INFO_DIR_OUT,  0u,   64u},
+    {USBD_EP_INFO_TYPE_CTRL                                                   | USBD_EP_INFO_DIR_IN,   0u,   64u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  1u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   1u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  2u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   2u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  3u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   3u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  4u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   4u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  5u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   5u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  6u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   6u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  7u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   7u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  8u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   8u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  9u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   9u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT, 10u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,  10u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT, 11u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,  11u, 1024u},
+    {DEF_BIT_NONE                                                                                  ,   0u,    0u}
+};
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  USBD_DRV  *USBD_PS7_BSP_DrvPtr;
+
+extern  UCOS_USBPS_Config UCOS_USBPS_ConfigTable[];
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void  USBD_BSP_PS7_Init       (USBD_DRV  *p_drv);
+static  void  USBD_BSP_PS7_Conn       (void            );
+static  void  USBD_BSP_PS7_Disconn    (void            );
+static  void  USBD_BSP_PS7_IntHandler (CPU_INT32U source, void  *p_arg);
+
+/*
+*********************************************************************************************************
+*                                   USB DEVICE DRIVER BSP INTERFACE
+*********************************************************************************************************
+*/
+                                                                /* Board-/device-specific BSP fnct ptrs :   */
+USBD_DRV_BSP_API  USBD_DrvBSP_PS7_USB = {
+    USBD_BSP_PS7_Init,
+    USBD_BSP_PS7_Conn,
+    USBD_BSP_PS7_Disconn,
+};
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       USBD_BSP_PS7_Init()
+*
+* Description : USB device controller board-specific initialization.
+*
+*                   (1) Enable    USB dev ctrl registers  and bus clock.
+*                   (2) Configure USB dev ctrl interrupts.
+*                   (3) Disable   USB dev transceiver Pull-up resistor in D+ line.
+*                   (4) Disable   USB dev transceiver clock.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device controller driver init function via 'p_drv_api->Init()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_BSP_PS7_Init (USBD_DRV  *p_drv)
+{
+    CPU_INT32U  int_id;
+
+
+    USBD_PS7_BSP_DrvPtr = p_drv;
+
+    CPU_MB();
+
+    int_id = UCOS_USBPS_ConfigTable[UCOS_USB_DEVICE_ID].IntSource;
+
+    UCOS_IntVectSet (int_id,
+                    0u,
+                    (1u << XPAR_CPU_ID),
+                    USBD_BSP_PS7_IntHandler,
+                    DEF_NULL);
+
+    UCOS_IntSrcEn(int_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       USBD_BSP_PS7_Conn()
+*
+* Description : Connect pull-up on DP.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device controller driver start function via 'p_drv_api->Conn()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_BSP_PS7_Conn (void)
+{
+    CPU_INT32U int_id;
+
+
+    int_id = UCOS_USBPS_ConfigTable[UCOS_USB_DEVICE_ID].IntSource;
+
+    UCOS_IntSrcEn(int_id);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     USBD_BSP_PS7_Disconn()
+*
+* Description : Disconnect pull-up on DP.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device controller driver stop function via 'p_drv_api->Disconn()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_BSP_PS7_Disconn (void)
+{
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                    USBD_BSP_PS7_IntHandler()
+*
+* Description : This is the USB ISR handler for the USB Device port(UDP) interrupt
+*
+* Argument(s) : p_arg       Interrupt handler argument.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : This is a ISR.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_BSP_PS7_IntHandler (CPU_INT32U source, void  *p_arg)
+{
+    USBD_DRV      *p_drv;
+    USBD_DRV_API  *p_drv_api;
+
+
+    p_drv     = USBD_PS7_BSP_DrvPtr;
+    p_drv_api = p_drv->API_Ptr;
+
+    p_drv_api->ISR_Handler(p_drv);
+}
+
+#endif /* #if (UCOS_USB_DRIVER == UCOS_USB_USBPS) */
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_ps7_usb.h b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_ps7_usb.h
new file mode 100644
index 0000000..1cdd2e9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_ps7_usb.h
@@ -0,0 +1,100 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  USB DEVICE DRIVER BOARD-SPECIFIC FUNCTIONS
+*                                       XILINX ZYNQ-7000 ZC702 EVAL KIT
+*
+* File          : usbd_bsp_zc702.h
+* Version       : V4.01.01.00
+* Programmer(s) : FT
+*                 FGK
+*                 JPB
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_BSP_ZC702_MODULE_PRESENT
+#define  USBD_BSP_ZC702_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  USBD_DRV_EP_INFO  USBD_DrvEP_InfoTbl_PS7_USB[];
+extern  USBD_DRV_BSP_API  USBD_DrvBSP_PS7_USB;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_zc702.c b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_zc702.c
new file mode 100644
index 0000000..5167d1a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_zc702.c
@@ -0,0 +1,294 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  USB DEVICE DRIVER BOARD-SPECIFIC FUNCTIONS
+*                                       XILINX ZYNQ-7000 ZC702 EVAL KIT
+*
+* File          : usbd_bsp_zc702.c
+* Version       : V4.01.01.00
+* Programmer(s) : FT
+*                 FGK
+*                 JPB
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  USBD0_INTR_ID                     (53U)
+
+
+/*
+*********************************************************************************************************
+*                                          REGISTER DEFINES
+*********************************************************************************************************
+*/
+
+#define USBD_ZC702_GPIO_BASE_ADDRESS       (CPU_ADDR   )(0xE000A000)
+                                                                /* GPIO Bank0 MIO: Output Data register.                */
+#define USBD_ZC702_GPIO_DATA_0_REG       (*(CPU_REG32 *)(USBD_ZC702_GPIO_BASE_ADDRESS + 0x00000040u))
+                                                                /* GPIO Bank0 MIO: Direction mode register.             */
+#define USBD_ZC702_GPIO_DIRM_0_REG       (*(CPU_REG32 *)(USBD_ZC702_GPIO_BASE_ADDRESS + 0x00000204u))
+                                                                /* GPIO Bank0 MIO: Output enable register.              */
+#define USBD_ZC702_GPIO_OEN_0_REG        (*(CPU_REG32 *)(USBD_ZC702_GPIO_BASE_ADDRESS + 0x00000208u))
+
+#define USBD_ZC702_GPIO_ON_MASK          DEF_BIT_07
+#define USBD_ZC702_GPIO_OFF_MASK         DEF_BIT_NONE
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*
+* Note(s) : (1) The USB device controller hardware in the Zynq-7000 is configured to support
+*               up to 12 endpoints.
+*           (2) The USB device controller driver can enable, disable and configure endpoint
+*               types up to the maximum selected during synthesis.
+*           (3) Each endpoint direction is essentially independent and can be configured with
+*               differing behavior in each direction.
+*               For example, the driver can configure endpoint 1 IN to be a bulk endpoint and
+*               endpoint 1 OUT to be an isochronous endpoint.
+*********************************************************************************************************
+*/
+
+USBD_DRV_EP_INFO  USBD_DrvEP_InfoTbl_ZC702[] = {
+    {USBD_EP_INFO_TYPE_CTRL                                                   | USBD_EP_INFO_DIR_OUT,  0u,   64u},
+    {USBD_EP_INFO_TYPE_CTRL                                                   | USBD_EP_INFO_DIR_IN,   0u,   64u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  1u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   1u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  2u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   2u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  3u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   3u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  4u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   4u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  5u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   5u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  6u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   6u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  7u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   7u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  8u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   8u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT,  9u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,   9u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT, 10u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,  10u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_OUT, 11u, 1024u},
+    {USBD_EP_INFO_TYPE_ISOC | USBD_EP_INFO_TYPE_BULK | USBD_EP_INFO_TYPE_INTR | USBD_EP_INFO_DIR_IN,  11u, 1024u},
+    {DEF_BIT_NONE                                                                                  ,   0u,    0u}
+};
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  USBD_DRV  *USBD_ZC702_BSP_DrvPtr;
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void  USBD_BSP_ZC702_Init      (USBD_DRV  *p_drv);
+static  void  USBD_BSP_ZC702_Conn      (void            );
+static  void  USBD_BSP_ZC702_Disconn   (void            );
+static  void  USBD_BSP_ZC702_IntHandler (CPU_INT32U source, void  *p_arg);
+
+/*
+*********************************************************************************************************
+*                                   USB DEVICE DRIVER BSP INTERFACE
+*********************************************************************************************************
+*/
+                                                                /* Board-/device-specific BSP fnct ptrs :   */
+USBD_DRV_BSP_API  USBD_DrvBSP_ZC702 = {
+    USBD_BSP_ZC702_Init,
+    USBD_BSP_ZC702_Conn,
+    USBD_BSP_ZC702_Disconn,
+};
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                       USBD_BSP_ZC702_Init()
+*
+* Description : USB device controller board-specific initialization.
+*
+*                   (1) Enable    USB dev ctrl registers  and bus clock.
+*                   (2) Configure USB dev ctrl interrupts.
+*                   (3) Disable   USB dev transceiver Pull-up resistor in D+ line.
+*                   (4) Disable   USB dev transceiver clock.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device controller driver init function via 'p_drv_api->Init()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_BSP_ZC702_Init (USBD_DRV  *p_drv)
+{
+    USBD_ZC702_BSP_DrvPtr = p_drv;
+
+                                                                /* GPIO configuration.                                */
+    DEF_BIT_SET(USBD_ZC702_GPIO_DIRM_0_REG, USBD_ZC702_GPIO_ON_MASK);
+    DEF_BIT_SET(USBD_ZC702_GPIO_OEN_0_REG,  USBD_ZC702_GPIO_ON_MASK);
+    DEF_BIT_SET(USBD_ZC702_GPIO_DATA_0_REG, USBD_ZC702_GPIO_ON_MASK);
+    DEF_BIT_SET(USBD_ZC702_GPIO_DATA_0_REG, USBD_ZC702_GPIO_OFF_MASK);
+    DEF_BIT_SET(USBD_ZC702_GPIO_DATA_0_REG, USBD_ZC702_GPIO_ON_MASK);
+
+    CPU_MB();
+
+    UCOS_IntVectSet (USBD0_INTR_ID,
+                    0u,
+                    DEF_BIT_00,
+                    USBD_BSP_ZC702_IntHandler,
+                    DEF_NULL);
+
+    UCOS_IntSrcEn(USBD0_INTR_ID);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       USBD_BSP_ZC702_Conn()
+*
+* Description : Connect pull-up on DP.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device controller driver start function via 'p_drv_api->Conn()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_BSP_ZC702_Conn (void)
+{
+    UCOS_IntSrcEn(USBD0_INTR_ID);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     USBD_BSP_ZC702_Disconn()
+*
+* Description : Disconnect pull-up on DP.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Device controller driver stop function via 'p_drv_api->Disconn()'
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_BSP_ZC702_Disconn (void)
+{
+
+}
+
+
+/*
+*********************************************************************************************************
+*                                    USBD_BSP_ZC702_IntHandler()
+*
+* Description : This is the USB ISR handler for the USB Device port(UDP) interrupt
+*
+* Argument(s) : p_arg       Interrupt handler argument.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : This is a ISR.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_BSP_ZC702_IntHandler (CPU_INT32U source, void  *p_arg)
+{
+    USBD_DRV      *p_drv;
+    USBD_DRV_API  *p_drv_api;
+
+
+    p_drv     = USBD_ZC702_BSP_DrvPtr;
+    p_drv_api = p_drv->API_Ptr;
+
+    p_drv_api->ISR_Handler(p_drv);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_zc702.h b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_zc702.h
new file mode 100644
index 0000000..991425f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_bsp_zc702.h
@@ -0,0 +1,100 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/USB is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                  USB DEVICE DRIVER BOARD-SPECIFIC FUNCTIONS
+*                                       XILINX ZYNQ-7000 ZC702 EVAL KIT
+*
+* File          : usbd_bsp_zc702.h
+* Version       : V4.01.01.00
+* Programmer(s) : FT
+*                 FGK
+*                 JPB
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_BSP_ZC702_MODULE_PRESENT
+#define  USBD_BSP_ZC702_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+extern  USBD_DRV_EP_INFO  USBD_DrvEP_InfoTbl_ZC702[];
+extern  USBD_DRV_BSP_API  USBD_DrvBSP_ZC702;
+
+
+/*
+*********************************************************************************************************
+*                                               MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_dev_cfg.c b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_dev_cfg.c
new file mode 100644
index 0000000..2f119eb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_dev_cfg.c
@@ -0,0 +1,52 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                       (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+* Filename      : ucos_dev_cfg.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#if (UCOS_USB_DRIVER == UCOS_USB_USBPS)
+#include  "usbd_bsp_ps7_usb.h"
+
+USBD_DRV_CFG  UCOS_USBD_DrvCfg_PS7 = {
+#if (UCOS_USB_DEVICE_ID == 1)
+        XPAR_UCOS_USBPS_1_BASEADDR,
+#else
+        XPAR_UCOS_USBPS_0_BASEADDR,
+#endif
+        0,
+        0,
+        USBD_DEV_SPD_HIGH,
+        USBD_DrvEP_InfoTbl_PS7_USB
+    };
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_dev_cfg.h b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_dev_cfg.h
new file mode 100644
index 0000000..fe711d8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_dev_cfg.h
@@ -0,0 +1,45 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                       uC/USB-Device BSP CODE
+*
+* Filename      : usbd_dev_cfg.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#if (UCOS_USB_DRIVER == UCOS_USB_USBPS)
+extern  USBD_DRV_CFG  UCOS_USBD_DrvCfg_PS7;
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_lpcxx_usbx.c b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_lpcxx_usbx.c
new file mode 100644
index 0000000..78903c6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_lpcxx_usbx.c
@@ -0,0 +1,2682 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         USB DEVICE DRIVER
+*
+*                                     NXP LPC313X/LPC18XX/LPC43XX
+*                                          Xilinx Zynq-7000
+*
+* File          : usbd_drv_lpcxx_usbx.c
+* Version       : V4.04.01.01
+* Programmer(s) : FGK
+*                 FT
+*                 OD
+*                 CM
+*********************************************************************************************************
+* Note(s)       : (1) You can find specific information about this driver at:
+*                     https://doc.micrium.com/display/USBDDRV/LPCxx_USBx
+*
+*                 (2) With an appropriate BSP, this device driver will support the Full-speed and
+*                     High-speed Device Interface module on the following NXP MCUs:
+*
+*                         NXP LPC313x series
+*                         NXP LPC185x series
+*                         NXP LPC183x series
+*                         NXP LPC182x series
+*                         NXP LPC435x series
+*                         NXP LPC433x series
+*                         NXP LPC432x series
+*                         Xilinx Zynq-7000
+*
+*                 (3) This driver has not been tested with LPC18xx/LPC43xx USB1 controller in High-Speed
+*                     mode using an external ULPI PHY.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#include  
+#include  
+#include  "usbd_drv_lpcxx_usbx.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*
+* Note(s) : (1) The device controller has the following endpoint (EP) characteristics on these platforms:
+*
+*               Manufacturer | MCU or Soc   | Nbr of logical EPs | Nbr of physical EPs
+*               -------------|--------------|--------------------|--------------------
+*               NXP          | LPC313x      |       4            |         8
+*               NXP          | LPC18xx      |       6            |        12
+*               NXP          | LPC43xx      |       6            |        12
+*               xilinx       | Zinq-7000    |      12            |        24
+*
+*               Each logical endpoint is bidirectional : direction IN and OUT.
+*********************************************************************************************************
+*/
+
+                                                                /* ---------- USB DEVICE REGISTER BIT DEFINES --------- */
+#define  USBD_LPCXX_DEV_ADDR_USBADDRA               DEF_BIT_24  /* Device Address Advance                               */
+                                                                /* Device Address Mask                                  */
+#define  USBD_LPCXX_DEV_ADDR_USBADDR_MASK           DEF_BIT_FIELD_32(7u, 25u)
+
+#define  USBD_LPCXX_PORTSC1_HSP                     DEF_BIT_09  /* High-Speed port                                      */
+#define  USBD_LPCXX_PORTSC1_FPR                     DEF_BIT_06  /* Force port resume.                                   */
+#define  USBD_LPCXX_PORTSC1_PFSC                    DEF_BIT_24  /* Full-Speed port                                      */
+
+                                                                /* ------ USB INTERRUPT AND STATUS REGISTER BITS ------ */
+#define  USBD_LPCXX_USBSTS_NAKI                     DEF_BIT_16  /* NAK Interrupt Bit.                                   */
+#define  USBD_LPCXX_USBSTS_AS                       DEF_BIT_15  /* Asynchronous Schedule Status.                        */
+#define  USBD_LPCXX_USBSTS_PS                       DEF_BIT_14  /* Periodic Schedule Status.                            */
+#define  USBD_LPCXX_USBSTS_RCL                      DEF_BIT_13  /* Reclamation.                                         */
+#define  USBD_LPCXX_USBSTS_HCH                      DEF_BIT_12  /* HCHaIted.                                            */
+#define  USBD_LPCXX_USBSTS_ULPI                     DEF_BIT_10  /* ULPI Interrupt.                                      */
+#define  USBD_LPCXX_USBSTS_SLI                      DEF_BIT_08  /* DCSuspend.                                           */
+#define  USBD_LPCXX_USBSTS_SRI                      DEF_BIT_07  /* SOF Received.                                        */
+#define  USBD_LPCXX_USBSTS_URI                      DEF_BIT_06  /* USB Reset Received.                                  */
+#define  USBD_LPCXX_USBSTS_AAI                      DEF_BIT_05  /* Interrupt on Async Advance.                          */
+#define  USBD_LPCXX_USBSTS_SEI                      DEF_BIT_04  /* System Error.                                        */
+#define  USBD_LPCXX_USBSTS_FRI                      DEF_BIT_03  /* Frame List Rollover.                                 */
+#define  USBD_LPCXX_USBSTS_PCI                      DEF_BIT_02  /* Port Change Detect.                                  */
+#define  USBD_LPCXX_USBSTS_UEI                      DEF_BIT_01  /* USB Error Interrupt.                                 */
+#define  USBD_LPCXX_USBSTS_UI                       DEF_BIT_00  /* USB Interrupt.                                       */
+
+                                                                /* ------ USB INTERRUPT REGISTER (USBINTR) BITS ------- */
+#define  USBD_LPCXX_USBSTS_NAKE                     DEF_BIT_16  /* NAK Interrupt enable                                 */
+#define  USBD_LPCXX_USBSTS_ULPIE                    DEF_BIT_10  /* ULPI enable                                          */
+#define  USBD_LPCXX_USBSTS_SLE                      DEF_BIT_08  /* Sleep enable                                         */
+#define  USBD_LPCXX_USBSTS_SRE                      DEF_BIT_07  /* SOF received enable                                  */
+#define  USBD_LPCXX_USBSTS_URE                      DEF_BIT_06  /* USB reset enable                                     */
+#define  USBD_LPCXX_USBSTS_AAE                      DEF_BIT_05  /* Interrupt on Async Advance enable                    */
+#define  USBD_LPCXX_USBSTS_SEE                      DEF_BIT_04  /* System Error enable                                  */
+#define  USBD_LPCXX_USBSTS_FRE                      DEF_BIT_03  /* Frame List Rollover enable                           */
+#define  USBD_LPCXX_USBSTS_PCE                      DEF_BIT_02  /* Port Change Detect enable                            */
+#define  USBD_LPCXX_USBSTS_UEE                      DEF_BIT_01  /* USB Error Interrupt enable                           */
+#define  USBD_LPCXX_USBSTS_UE                       DEF_BIT_00  /* USB Interrupt enable                                 */
+
+                                                                /* ------------ USB INTERRUPT ENABLE BITS ------------- */
+#define  USBD_LPCXX_USB_INT_NAK                     DEF_BIT_16  /* NAK Interrupt enable                                 */
+#define  USBD_LPCXX_USB_INT_ULP                     DEF_BIT_10  /* ULPI enable                                          */
+#define  USBD_LPCXX_USB_INT_SL                      DEF_BIT_08  /* Sleep enable                                         */
+#define  USBD_LPCXX_USB_INT_SR                      DEF_BIT_07  /* SOF received enable                                  */
+#define  USBD_LPCXX_USB_INT_UR                      DEF_BIT_06  /* USB reset enable                                     */
+#define  USBD_LPCXX_USB_INT_AA                      DEF_BIT_05  /* Interrupt on Async Advance enable                    */
+#define  USBD_LPCXX_USB_INT_SE                      DEF_BIT_04  /* System Error enable                                  */
+#define  USBD_LPCXX_USB_INT_FR                      DEF_BIT_03  /* Frame List Rollover enable                           */
+#define  USBD_LPCXX_USB_INT_PC                      DEF_BIT_02  /* Port Change Detect enable                            */
+#define  USBD_LPCXX_USB_INT_UE                      DEF_BIT_01  /* USB Error Interrupt enable                           */
+#define  USBD_LPCXX_USB_INT_U                       DEF_BIT_00  /* USB Interrupt enable                                 */
+
+#define  USBD_LPCXX_USB_INT_BUS                    (USBD_LPCXX_USB_INT_PC | \
+                                                    USBD_LPCXX_USB_INT_UR | \
+                                                    USBD_LPCXX_USB_INT_SL)
+
+
+                                                                /* --------- USB COMMAND REGISTER BIT DEFINES --------- */
+                                                                /* Interrupt Threshold Control                          */
+#define  USBD_LPCXX_USBCMD_ITC_MASK                 DEF_BIT_FIELD_32(8u, 16u)
+#define  USBD_LPCXX_USBCMD_ITC_MICRO_FRAME_1        DEF_BIT_MASK(0x01u,  16u)
+#define  USBD_LPCXX_USBCMD_ITC_MICRO_FRAME_2        DEF_BIT_MASK(0x02u,  16u)
+#define  USBD_LPCXX_USBCMD_ITC_MICRO_FRAME_3        DEF_BIT_MASK(0x04u,  16u)
+#define  USBD_LPCXX_USBCMD_ITC_MICRO_FRAME_8        DEF_BIT_MASK(0x08u,  16u)
+#define  USBD_LPCXX_USBCMD_ITC_MICRO_FRAME_16       DEF_BIT_MASK(0x10u,  16u)
+#define  USBD_LPCXX_USBCMD_ITC_MICRO_FRAME_32       DEF_BIT_MASK(0x20u,  16u)
+#define  USBD_LPCXX_USBCMD_ITC_MICRO_FRAME_40       DEF_BIT_MASK(0x40u,  16u)
+
+                                                                /* Frame List size                                      */
+#define  USBD_LPCXX_USBCMD_FS_MASK                  DEF_BIT_FIELD(2u, 14u)
+#define  USBD_LPCXX_USBCMD_ATDTW                    DEF_BIT_14  /* Add dTD TripWire                                     */
+
+#define  USBD_LPCXX_USBCMD_SUTW                     DEF_BIT_13  /* Setup Tripwire                                       */
+#define  USBD_LPCXX_USBCMD_ASPE                     DEF_BIT_11  /* Asynchronous schedule park mode enable               */
+                                                                /* Asynchronous schedule park mode count                */
+#define  USBD_LPCXX_USBCMD_ASP_MASK                 DEF_BIT_FIELD(2u, 8u)
+#define  USBD_LPCXX_USBCMD_LR                       DEF_BIT_07  /* Light Host/Device controller reset                   */
+#define  USBD_LPCXX_USBCMD_IAA                      DEF_BIT_06  /* Interrupt on Async Advance Doorbell                  */
+#define  USBD_LPCXX_USBCMD_ASE                      DEF_BIT_05  /* Asynchronous schedule enable                         */
+#define  USBD_LPCXX_USBCMD_PSE                      DEF_BIT_04  /* Periodic schedule enable                             */
+
+                                                                /* Frame List Size mask                                 */
+#define  USBD_LPCXX_USBCMD_FS_SIZE_MASK             DEF_BIT_FIELD(3u, 2u)
+#define  USBD_LPCXX_USBCMD_RST                      DEF_BIT_01  /* Controller Reset                                     */
+#define  USBD_LPCXX_USBCMD_RUN                      DEF_BIT_00  /* Run Stop                                             */
+
+                                                                /* ------ USB DEVICE ADDRESS REGISTER BIT DEFINES ----- */
+                                                                /* Device Address mask                                  */
+#define  USBD_LPCXX_DEV_ADDR_USBADR_MASK            DEF_BIT_FIELD(6u, 25u)
+#define  USBD_LPCXX_DEV_ADDR_USBADRA                DEF_BIT_24  /* Device Address Advance.                              */
+
+                                                                /* ---- ENDPOINT LIST ADDRESS REGISTER BIT DEFINES ---- */
+#define  USBD_LPCXX_EP_LIST_ADDR_MASK               DEF_BIT_FIELD(21u, 11u)
+
+                                                                /* ----------- USB MODE REGISTER BIT DEFINES ---------- */
+#define  USBD_LPCXX_USBMODE_SDIS                    DEF_BIT_04  /* Stream Disable Mode                                  */
+#define  USBD_LPCXX_USBMODE_SLOM                    DEF_BIT_03  /* Setup lockout mode                                   */
+#define  USBD_LPCXX_USBMODE_ES                      DEF_BIT_02  /* Endianness selection                                 */
+                                                                /* Controller Mode mask                                 */
+
+#define  USBD_LPCXX_USBMODE_CM_MASK                 DEF_BIT_FIELD(2u, 0u)
+                                                                /* Idle   mode                                          */
+#define  USBD_LPCXX_USBMODE_CM_IDLE                 DEF_BIT_NONE
+#define  USBD_LPCXX_USBMODE_CM_DEV                  DEF_BIT_01  /* Device mode                                          */
+                                                                /* Host   mode                                          */
+#define  USBD_LPCXX_USBMODE_CM_HOST                (DEF_BIT_01 | DEF_BIT_02)
+
+                                                                /* ------- ENDPOINT CONTROL REGISTER BIT DEFINES ------ */
+#define  USBD_LPCXX_ENDPTCTRL_TX_CFG_MASK           DEF_BIT_FIELD_32(8u, 16u)
+#define  USBD_LPCXX_ENDPTCTRL_TX_EN                 DEF_BIT_23  /* Tx endpoint enable                                   */
+#define  USBD_LPCXX_ENDPTCTRL_TX_TOGGLE_RST         DEF_BIT_22  /* Data Toggle reset                                    */
+#define  USBD_LPCXX_ENDPTCTRL_TX_TOGGLE_DIS         DEF_BIT_21  /* Data Toggle inhibit                                  */
+                                                                /* Tx endpoint type mask                                */
+#define  USBD_LPCXX_ENDPTCTRL_TX_TYPE_MASK          DEF_BIT_FIELD_32(2u, 18u)
+                                                                /* Tx endpoint type control                             */
+#define  USBD_LPCXX_ENDPTCTRL_TX_TYPE_CTRL          DEF_BIT_NONE
+#define  USBD_LPCXX_ENDPTCTRL_TX_TYPE_ISOC          DEF_BIT_18  /* Tx endpoint type isochronous                         */
+#define  USBD_LPCXX_ENDPTCTRL_TX_TYPE_BULK          DEF_BIT_19  /* Tx endpoint type bulk                                */
+                                                                /* Tx endpoint type interrupt                           */
+#define  USBD_LPCXX_ENDPTCTRL_TX_TYPE_INT          (DEF_BIT_18 | DEF_BIT_19)
+#define  USBD_LPCXX_ENDPTCTRL_TX_DATA_SRC           DEF_BIT_17  /* Tx endpoint data source                              */
+#define  USBD_LPCXX_ENDPTCTRL_TX_STALL              DEF_BIT_16  /* Tx endpoint stall                                    */
+
+#define  USBD_LPCXX_ENDPTCTRL_RX_CFG_MASK           DEF_BIT_FIELD_32(8u, 0u)
+#define  USBD_LPCXX_ENDPTCTRL_RX_EN                 DEF_BIT_07  /* Rx endpoint enable                                   */
+#define  USBD_LPCXX_ENDPTCTRL_RX_TOGGLE_RST         DEF_BIT_06  /* Rx Data Toggle reset                                 */
+#define  USBD_LPCXX_ENDPTCTRL_RX_TOGGLE_DIS         DEF_BIT_05  /* Rx Data Toggle inhibit                               */
+                                                                /* Rx endpoint type mask                                */
+#define  USBD_LPCXX_ENDPTCTRL_RX_TYPE_MASK          DEF_BIT_FIELD_32(2u, 2u)
+                                                                /* Rx endpoint type control                             */
+#define  USBD_LPCXX_ENDPTCTRL_RX_TYPE_CTRL          DEF_BIT_NONE
+#define  USBD_LPCXX_ENDPTCTRL_RX_TYPE_ISOC          DEF_BIT_02  /* Rx endpoint type isochronous                         */
+#define  USBD_LPCXX_ENDPTCTRL_RX_TYPE_BULK          DEF_BIT_03  /* Rx endpoint type bulk                                */
+                                                                /* Rx endpoint type interrupt                           */
+#define  USBD_LPCXX_ENDPTCTRL_RX_TYPE_INT          (DEF_BIT_02 | DEF_BIT_03)
+#define  USBD_LPCXX_ENDPTCTRL_RX_DATA_SRC           DEF_BIT_01  /* Rx endpoint data source                              */
+#define  USBD_LPCXX_ENDPTCTRL_RX_STALL              DEF_BIT_00  /* Rx endpoint stall                                    */
+
+#define  USBD_LPCXX_ENDPTCOMPLETE_TX_MASK           DEF_BIT_FIELD_32(6u, 16u)
+#define  USBD_LPCXX_ENDPTCOMPLETE_RX_MASK           DEF_BIT_FIELD_32(6u,  0u)
+
+#define  USBD_LPCXX_ENDPTxxxx_TX_MASK               DEF_BIT_FIELD_32(6u, 16u)
+#define  USBD_LPCXX_ENDPTxxxx_RX_MASK               DEF_BIT_FIELD_32(6u,  0u)
+
+                                                                /* -- ENDPOINT QUEUE HEAD EP CAPABILITIES BIT DEFINES - */
+                                                                /* Number of packets executed per transaction.          */
+#define  USBD_LPCXX_dQH_EP_CAP_MULT_MASK            DEF_BIT_FIELD_32(2u, 30u)
+#define  USBD_LPCXX_dQH_EP_CAP_MULT_N               DEF_BIT_MASK(0u, 30u)
+#define  USBD_LPCXX_dQH_EP_CAP_MULT_1               DEF_BIT_MASK(1u, 30u)
+#define  USBD_LPCXX_dQH_EP_CAP_MULT_2               DEF_BIT_MASK(2u, 30u)
+#define  USBD_LPCXX_dQH_EP_CAP_MULT_3               DEF_BIT_MASK(3u, 30u)
+
+#define  USBD_LPCXX_dQH_EP_CAP_ZLTS                 DEF_BIT_29  /* Zero Length Termination Select                       */
+                                                                /* EP maximum length mask                               */
+#define  USBD_LPCXX_dQH_EP_CAP_MAX_LEN_MASK         DEF_BIT_FIELD_32(11u, 16u)
+#define  USBD_LPCXX_dQH_EP_CAP_IOS                  DEF_BIT_15  /* Interrupt on setup                                   */
+
+                                                                /* ------------ dTD_NEXT FIELD  BIT DEFINES ----------- */
+                                                                /* Next transfer element pointer mask                   */
+#define  USBD_LPCXX_dTD_dTD_NEXT_MASK               DEF_BIT_FIELD_32(27u, 5u)
+#define  USBD_LPCXX_dTD_dTD_NEXT_TERMINATE          DEF_BIT_00  /* End of transfer list indicator                       */
+
+                                                                /* -------------- TOKEN FILED BIT DEFINES ------------- */
+#define  USBD_LPCXX_dTD_TOKEN_TOTAL_BYTES_MASK      DEF_BIT_FIELD_32(15u, 16u)
+#define  USBD_LPCXX_dTD_TOKEN_IOC                   DEF_BIT_15  /* Interrupt on complete                                */
+                                                                /* Multiplier override mask                             */
+#define  USBD_LPCXX_dTD_TOKEN_MUL_OVER_MASK         DEF_BIT_FIELD_32(2u, 10u)
+
+#define  USBD_LPCXX_dTD_TOKEN_TOTAL_BYTE_MAX        0x00004000u /* Maximum number of bytes                              */
+
+#define  USBD_LPCXX_dTD_TOKEN_PAGE_SIZE             0x00001000u /* Page size 4K                                         */
+                                                                /* Status mask                                          */
+#define  USBD_LPCXX_dTD_TOKEN_STATUS_MASK           DEF_BIT_FIELD_32(8u, 0u)
+#define  USBD_LPCXX_dTD_TOKEN_STATUS_ACTIVE         DEF_BIT_07
+#define  USBD_LPCXX_dTD_TOKEN_STATUS_HALTED         DEF_BIT_06
+#define  USBD_LPCXX_dTD_TOKEN_STATUS_DATA_ERR       DEF_BIT_05
+#define  USBD_LPCXX_dTD_TOKEN_STATUS_TRAN_ERR       DEF_BIT_03
+
+#define  USBD_LPCXX_dTD_TOKEN_STATUS_ANY           (USBD_LPCXX_dTD_TOKEN_STATUS_ACTIVE   | \
+                                                    USBD_LPCXX_dTD_TOKEN_STATUS_HALTED   | \
+                                                    USBD_LPCXX_dTD_TOKEN_STATUS_DATA_ERR | \
+                                                    USBD_LPCXX_dTD_TOKEN_STATUS_TRAN_ERR)
+
+#define  USBD_LPCXX_dTD_BUF_PTR_MASK                DEF_BIT_FIELD(20u, 12u)
+
+
+                                                                /* ----------- IP_INFO REGISTER BIT DEFINES ----------- */
+#define  USBD_LPCXX_IP_INFO_IP_MASK                 DEF_BIT_FIELD_32(16u, 16u)
+#define  USBD_LPCXX_IP_INFO_MAJOR_MASK              DEF_BIT_FIELD_32(4u,  12u)
+#define  USBD_LPCXX_IP_INFO_MINOR_MASK              DEF_BIT_FIELD_32(4u,   8u)
+
+#define  USBD_LPC313X_IP_VER_2_0                             20u
+#define  USBD_LPC313X_IP_VER_2_1                             21u
+#define  USBD_LPC313X_IP_VER_2_2                             22u
+#define  USBD_LPC313X_IP_VER_2_3                             23u
+#define  USBD_LPC313X_IP_VER_2_4                             24u
+#define  USBD_LPC313X_IP_VER_2_5                             24u
+#define  USBD_LPC313X_IP_VER_2_6                             26u
+
+                                                                /* ------------- USB CONTROLLER CONSTRAINS ------------ */
+#define  USBD_LPCXX_REG_TO                           0x0000FFFFu
+#define  USBD_LPCXX_MAX_RETRIES                             100u
+#define  USBD_LPCXX_dTD_LST_INSERT_NBR_TRIES_MAX            100u
+#define  USBD_LPCXX_dTD_NBR_PAGES                             5u
+
+#define  USBD_LPCXX_EP_NBR_MAX                               12u/* See Note #1.                                         */
+
+#define  USBD_LPCXX_dTD_EXT_ATTRIB_IS_COMPLETED     DEF_BIT_00
+
+#define  USBD_LPCXX_ALIGN_OCTECTS_dQH               ( 2u * (1024u))
+#define  USBD_LPCXX_ALIGN_OCTECTS_dTD               (64u * (   1u))
+#define  USBD_LPCXX_ALIGN_OCTECTS_BUF               ( 1u * (   1u))
+
+#define  USBD_LPCXX_MAX_NBR_EP_OPEN                 DEF_MIN(USBD_CFG_MAX_NBR_EP_OPEN, USBD_LPCXX_EP_NBR_MAX)
+#define  USBD_LPCXX_dTD_NBR                        (USBD_CFG_MAX_NBR_URB_EXTRA + \
+                                                    USBD_LPCXX_MAX_NBR_EP_OPEN )
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL MACROS
+*********************************************************************************************************
+*/
+
+#define  USBD_LPCXX_ENDPTxxx_GET_TX_BITS(ep_log_nbr)            (DEF_BIT32(ep_log_nbr) << 16u)
+#define  USBD_LPCXX_ENDPTxxx_GET_RX_BITS(ep_log_nbr)             DEF_BIT32(ep_log_nbr)
+
+#define  USBD_LPCXX_ENDPTxxx_GET_TX_NBR(ep_reg)                 (((ep_reg) & USBD_LPCXX_ENDPTxxxx_TX_MASK) >> 16u)
+#define  USBD_LPCXX_ENDPTxxx_GET_RX_NBR(ep_reg)                  ((ep_reg) & USBD_LPCXX_ENDPTxxxx_RX_MASK)
+
+#define  USBD_LPCXX_EP_PHY_NBR_IS_OUT(ep_phy_nbr)                DEF_BIT_IS_CLR((ep_phy_nbr), DEF_BIT_00)
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*
+* Note(s) : (1) The registers map structure is a merged of NXP LPC313x, LPC18xx, LPC43xx and Xilinx
+*               Zynq-7000 USB device controllers' registers interfaces.
+*               The registers in the table below are the registers interfaces differences between the
+*               different platforms, that is the register listed belongs only to one of the platforms.
+*               All other registers are common to all platforms.
+*
+*               Offset  | NXP LPC313x/LPC18xx/LPC43xx | Xilinx Zynq-7000
+*
+*               0x000                                   ID
+*               0x004                                   HWGENERAL
+*               0x008                                   HWHOST
+*               0x00C                                   HWDEVICE
+*               0x010                                   HWTXBUF
+*               0x014                                   HWRXBUF
+*               ...
+*               0x020     IP_INFO
+*               ...
+*               0x080                                   GPTIMER0LD
+*               0x084                                   GPTIMER0CTRL
+*               0x088                                   GPTIMER1LD
+*               0x08C                                   GPTIMER1CTRL
+*               0x090                                   SBUSCFG
+*               ...
+*               0x16C                                   IC_USB
+*               0x170                                   ULPI_VIEWPORT
+*
+*
+*           (1) The endpoint's device Queue Head (dQH) is where all transfers are managed. The dQH is a 48 byte
+*               data structure, but must be aligned on 64-byte boundaries. The remaining 16 bytes will be used
+*               to store the device Transfer Descriptor (dTD) link list information.
+*
+*                                          0            1                 N
+*        --     +-----------+  Current  +-----+      +-----+           +-----+
+*         |     |           |---------->| dTD |----->| dTD |--- .... ->| dTD |----|
+*      48 Bytes |   dQH     |           +-----+      +-----+           +-----+
+*         |     |           |      Next    |             |                |
+*         |     |           |--------------|-------------|                |
+*        --     +-----------+              |                              |
+*         |     |  Head     |--------------|                              |
+*         |     +-----------+                                             |
+*         |     |  Tail     |---------------------------------------------|
+*      16 Bytes +-----------+
+*         |     | #Entries  |-----> Number of elements of the dTD's link list
+*         |     |-----------|
+*         |     | #dTD Rdy  |-----> Number of completed dTDs
+*        --     ------------+
+*
+*
+*           (2) The size of the dTD is 28 bytes. The dTD must be be aligned to 8-DWord boundaries.
+*               the remaining 36 bytes are used to store extra information.
+*
+*        -    --   +---------------+      +------+               +-----+
+*        |     |   |   dTD_Next    |----->| dTD  |----- ... ---->| dTD |
+*        |     |   +---------------+      +------+               +-----+
+*        |    dTD  |     Token     |
+*        |     |   +---------------+         +---------+
+*     dTD_EXT  |   | BufPtrs[0..4] |----| |->|xxxxxxxxx| 0       - BufPtr[0]   : Always points to the first byte in the data
+*        |    --   +---------------+    | |  +---------+                         buffer that is available
+*        |         |   BufAddr     |----|-|  |xxxxxxxxx| 1
+*        -         +---------------+    |    +---------+
+*                                       |    |xxxxxxxxx| 2        - BufAddr    : Always points to the beginning of the data buffer.
+*                                       |    +---------+
+*                                       |    |    .    |            +--------+
+*                                       |    |    .    |            |xxxxxxxx| = Used block
+*                                       |    |    .    |            +--------+
+*                                       |    +---------+
+*                                       |--->|         | n - 1      +--------+
+*                                            +---------+            |        | = Free block
+*                                            |         |  n         +--------+
+*                                            +---------+
+*
+*********************************************************************************************************
+*/
+
+typedef  struct usbd_lpcxx_usb_reg {                            /* See Note #1.                                         */
+                                                                /* ------ IDENTIFICATION CONFIGURATION CONSTANTS ------ */
+    CPU_REG32  ID;                                              /* R 0x000 Identification register                      */
+    CPU_REG32  HWGENERAL;                                       /* R 0x004 General hardware parameters                  */
+    CPU_REG32  HWHOST;                                          /* R 0x008 Host hardware parameters                     */
+    CPU_REG32  HWDEVICE;                                        /* R 0x00C Device hardware parameters                   */
+    CPU_REG32  HWTXBUF;                                         /* R 0x010 TX Buffer hardware parameters                */
+    CPU_REG32  HWRXBUF;                                         /* R 0x014 RX Buffer hardware parameters                */
+    CPU_REG08  RESERVED0[6u];
+    CPU_REG32  IP_INFO;                                         /* R 0x020 IP number and version number                 */
+    CPU_REG32  RESERVED1[23u];
+                                                                /* ------------ GENERAL PURPOSE TIMERS ---------------  */
+    CPU_REG32  GPTIMER0LD;                                      /* R/W 0x080 General-purpose timer 0 load value         */
+    CPU_REG32  GPTIMER0CTRL;                                    /* R/W 0x084 General-purpose timer 0 control            */
+    CPU_REG32  GPTIMER1LD;                                      /* R/W 0x088 General-purpose timer 1 load value         */
+    CPU_REG32  GPTIMER1CTRL;                                    /* R/W 0x08C General-purpose timer 1 control            */
+                                                                /* --------------- AXI INTERCONNECT ------------------- */
+    CPU_REG32  SBUSCFG;                                         /* R/W 0x090 DMA Master AHB burst mode                  */
+    CPU_REG32  RESERVED2[27u];
+                                                                /* -------- CONTROLLER CAPABILITIES CONSTANTS --------- */
+    CPU_REG32  CAPLENGTH;                                       /* R 0x100 Capability register length                   */
+    CPU_REG32  HCSPARAMS;                                       /* R 0x104 Host controller structural parameters        */
+    CPU_REG32  HCCPARAMS;                                       /* R 0x108 Host controller capability parameters        */
+    CPU_REG32  RESERVED3[5u];
+    CPU_REG32  DCIVERSION;                                      /* R 0x120 Device interface version number              */
+    CPU_REG32  DCCPARAMS;                                       /* R 0x124 Device controller capability parameters      */
+    CPU_REG32  RESERVED4[6u];
+                                                                /* -------- INTERRUPTS AND ENDPOINT POINTERS ---------- */
+    CPU_REG32  USBCMD;                                          /* R/W 0x140 USB command                                */
+    CPU_REG32  USBSTS;                                          /* R/W 0x144 USB status                                 */
+    CPU_REG32  USBINTR;                                         /* R/W 0x148 USB interrupt enable                       */
+    CPU_REG32  FRINDEX;                                         /* R/W 0x14C USB frame index                            */
+    CPU_REG32  RESERVED5;
+    CPU_REG32  DEV_ADDR;                                        /* R/W 0x154 USB Device Address                         */
+    CPU_REG32  EP_LST_ADDR;                                     /* R/W 0x158 Next asynchronous list addr/addr of  ...   */
+                                                                /*           ... of endpoint list in memory             */
+    CPU_REG32  TTCTRL;                                          /* R/W 0x15C Asynchronous buffer stat for embedded TT   */
+                                                                /* ------------------ MISCELLANEOUS ------------------- */
+    CPU_REG32  BURSTSIZE;                                       /* R/W 0x160 Programmable burst size                    */
+    CPU_REG32  TXFILLTUNING;                                    /* R/W 0x164 Host transmit pre-buffer packet tuning     */
+    CPU_REG32  TXTTFILLTUNING;                                  /* R/W 0x168 Host TT tx pre-buffer packet tuning        */
+    CPU_REG32          IC_USB;                                  /* R/W 0x16C Low and fast speed control                 */
+    CPU_REG32          ULPI_VIEWPORT;                           /* R/W 0x170 ULPI viewport.                             */
+    CPU_REG32          RESERVED6;                               /* Reserved bits.                                       */
+                                                                /* ---------------- ENDPOINT CONTROL ------------------ */
+    CPU_REG32  ENDPTNAK;                                        /* R/W 0x178 Endpoint NAK                               */
+    CPU_REG32  ENDPTNAKEN;                                      /* R/W 0x17C Endpoint NAK Enable                        */
+    CPU_REG32  CONFIGFLAG;                                      /* R   0x180 Configured flag register                   */
+    CPU_REG32  PORTSC1;                                         /* R/W 0x184 Port status/control 1                      */
+    CPU_REG32  RESERVED7[7u];
+                                                                /* ------------------ MODE CONTROL -------------------- */
+    CPU_REG32  OTGSC;                                           /* R/W 0x1A4 OTG status and control                     */
+    CPU_REG32  USBMODE;                                         /* R/W 0x1A8 USB device mode                            */
+                                                                /* -------- ENDPOINT CONFIGURATION AND CONTROL -------- */
+    CPU_REG32  ENDPTSETUPSTAT;                                  /* R/W 0x1AC Endpoint setup status                      */
+    CPU_REG32  ENDPTPRIME;                                      /* R/W 0x1B0 Endpoint initialization                    */
+    CPU_REG32  ENDPTFLUSH;                                      /* R/W 0x1B4 Endpoint de-initialization                 */
+    CPU_REG32  ENDPTSTATUS;                                     /* R   0x1B8 Endpoint status                            */
+    CPU_REG32  ENDPTCOMPLETE;                                   /* R/W 0x1BC Endpoint complete                          */
+    CPU_REG32  ENDPTCTRLx[USBD_LPCXX_EP_NBR_MAX];               /*           Endpoint control registers                 */
+}  USBD_LPCXX_REG;
+
+                                                                /* --- ENDPOINT TRANSFER DESCRIPTOR (dTD) DATA TYPE --- */
+typedef  struct  usbd_lpcxx_dtd {
+    CPU_REG32  dTD_NextPtr;                                     /* Next Link Pointer                                    */
+    CPU_REG32  Token;                                           /* DTD token                                            */
+    CPU_REG32  BufPtrs[5u];                                     /* Buffer pointer (Page n, n = [0..4])                  */
+} USBD_LPCXX_dTD;
+
+                                                                /* -------------- dTD EXTENDED DATA TYPE -------------- */
+typedef  struct  usbd_lpcxx_dtd_ext {
+    CPU_REG32   dTD_NextPtr;                                    /* Next link pointer.                                   */
+    CPU_REG32   Token;                                          /* dTD token.                                           */
+    CPU_REG32   BufPtrs[5u];                                    /* Buffer pointer (Page n, n = [0..4]).                 */
+    CPU_INT32U  BufAddr;                                        /* Buffer address.                                      */
+    CPU_INT32U  BufLen;                                         /* Buffer length.                                       */
+    CPU_REG32   Attrib;                                         /* Attributes of the dTD.                               */
+} USBD_LPCXX_dTD_EXT;
+
+                                                                /* -------- ENDPOINT QUEUE HEAD (dQH) DATA TYPE ------- */
+typedef  struct  usbd_lpcxx_dqh {
+    CPU_REG32            EpCap;                                 /* Endpoint capabilities                                */
+    CPU_REG32            dTD_CurrPtr;                           /* Current dTD pointer used by HW only.                 */
+    USBD_LPCXX_dTD       OverArea;                              /* Overlay Area                                         */
+    CPU_INT32U           Reserved0;
+    CPU_REG32            SetupBuf[2u];                          /* Setup buffer                                         */
+                                                                /* ------------------ dTD's LINK LIST ----------------- */
+    USBD_LPCXX_dTD_EXT  *dTD_LstHeadPtr;                        /* dTD's link list head pointer                         */
+    USBD_LPCXX_dTD_EXT  *dTD_LstTailPtr;                        /* dTD's link list tail pointer                         */
+    CPU_REG32            dTD_LstNbrEntries;                     /* dTD's link list number of entries                    */
+    CPU_INT32U           Unused;                                /* Unused space                                         */
+} USBD_LPCXX_dQH;
+
+                                                                /* --------------- USBX CTRLR VARIANCE ---------------- */
+typedef  enum  usbd_usbx_ctrlr {
+    USBD_NXP_USBX_CTRLR_LPCXX = 0u,
+    USBD_XILINX_USBX_CTRLR_ZYNQ
+} USBD_USBX_CTRLR;
+
+                                                                /* ---------- DRIVER INTERNAL DATA DATA TYPE ---------- */
+typedef  struct  usbd_drv_data {
+    USBD_LPCXX_dQH  *dQH_Tbl;
+    MEM_POOL         dTD_MemPool;
+    CPU_INT08U       hw_rev;
+#if (USBD_CFG_MAX_NBR_URB_EXTRA > 0u)
+    CPU_INT08U      *dTD_UsageTbl;
+#endif
+    CPU_BOOLEAN      Suspend;
+    USBD_USBX_CTRLR  Ctrlr;
+} USBD_DRV_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                             USB DEVICE CONTROLLER DRIVER API PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void         USBD_DrvInitLPCXX  (USBD_DRV     *p_drv,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvInitZynq   (USBD_DRV     *p_drv,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvStart      (USBD_DRV     *p_drv,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvStop       (USBD_DRV     *p_drv);
+
+static  CPU_BOOLEAN  USBD_DrvAddrSet    (USBD_DRV     *p_drv,
+                                         CPU_INT08U    dev_addr);
+
+static  void         USBD_DrvAddrEn     (USBD_DRV     *p_drv,
+                                         CPU_INT08U    dev_addr);
+
+static  CPU_BOOLEAN  USBD_DrvCfgSet     (USBD_DRV     *p_drv,
+                                         CPU_INT08U    cfg_val);
+
+static  void         USBD_DrvCfgClr     (USBD_DRV     *p_drv,
+                                         CPU_INT08U    cfg_val);
+
+static  CPU_INT16U   USBD_DrvGetFrameNbr(USBD_DRV     *p_drv);
+
+static  void         USBD_DrvEP_Open    (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U    ep_type,
+                                         CPU_INT16U    max_pkt_size,
+                                         CPU_INT08U    transaction_frame,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_Close   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr);
+
+static  CPU_INT32U   USBD_DrvEP_RxStart (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  CPU_INT32U   USBD_DrvEP_Rx      (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_RxZLP   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         USBD_ERR     *p_err);
+
+static  CPU_INT32U   USBD_DrvEP_Tx      (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_TxStart (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_TxZLP   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         USBD_ERR     *p_err);
+
+static  CPU_BOOLEAN  USBD_DrvEP_Abort   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr);
+
+static  CPU_BOOLEAN  USBD_DrvEP_Stall   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_BOOLEAN   state);
+
+static  void         USBD_DrvISR_Handler(USBD_DRV     *p_drv);
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void         USBD_LPCXX_Init         (USBD_DRV    *p_drv,
+                                              USBD_ERR    *p_err);
+
+                                                                /* ------------- dTD's LINK LIST FUNCTIONS ------------ */
+static  void         USBD_LPCXX_dTD_LstInsert(USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_phy_nbr,
+                                              CPU_INT08U  *p_data,
+                                              CPU_INT16U   len,
+                                              USBD_ERR    *p_err);
+
+static  CPU_BOOLEAN  USBD_LPCXX_dTD_LstRemove(USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_phy_nbr);
+
+static  CPU_BOOLEAN  USBD_LPCXX_dTD_LstEmpty (USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_phy_nbr);
+
+static  void         USBD_LPCXX_SetupProcess (USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_log_nbr);
+
+static  void         USBD_LPCXX_SoftRst      (USBD_DRV    *p_drv);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                  USB DEVICE CONTROLLER DRIVER API
+*********************************************************************************************************
+*/
+
+USBD_DRV_API  USBD_DrvAPI_LPCXX_USBX = { USBD_DrvInitLPCXX,
+                                         USBD_DrvStart,
+                                         USBD_DrvStop,
+                                         USBD_DrvAddrSet,
+                                         USBD_DrvAddrEn,
+                                         USBD_DrvCfgSet,
+                                         USBD_DrvCfgClr,
+                                         USBD_DrvGetFrameNbr,
+                                         USBD_DrvEP_Open,
+                                         USBD_DrvEP_Close,
+                                         USBD_DrvEP_RxStart,
+                                         USBD_DrvEP_Rx,
+                                         USBD_DrvEP_RxZLP,
+                                         USBD_DrvEP_Tx,
+                                         USBD_DrvEP_TxStart,
+                                         USBD_DrvEP_TxZLP,
+                                         USBD_DrvEP_Abort,
+                                         USBD_DrvEP_Stall,
+                                         USBD_DrvISR_Handler,
+};
+
+USBD_DRV_API  USBD_DrvAPI_Zynq = { USBD_DrvInitZynq,
+                                   USBD_DrvStart,
+                                   USBD_DrvStop,
+                                   USBD_DrvAddrSet,
+                                   USBD_DrvAddrEn,
+                                   USBD_DrvCfgSet,
+                                   USBD_DrvCfgClr,
+                                   USBD_DrvGetFrameNbr,
+                                   USBD_DrvEP_Open,
+                                   USBD_DrvEP_Close,
+                                   USBD_DrvEP_RxStart,
+                                   USBD_DrvEP_Rx,
+                                   USBD_DrvEP_RxZLP,
+                                   USBD_DrvEP_Tx,
+                                   USBD_DrvEP_TxStart,
+                                   USBD_DrvEP_TxZLP,
+                                   USBD_DrvEP_Abort,
+                                   USBD_DrvEP_Stall,
+                                   USBD_DrvISR_Handler,
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     DRIVER INTERFACE FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvInitLPCXX()
+*
+* Description : Initialize the device for the NXP LPC313x/LPC18xx/LPC43xx.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE       Device successfully initialized.
+*                               USBD_ERR_ALLOC      Memory allocation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DevInit() via 'p_drv_api->Init()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvInitLPCXX (USBD_DRV  *p_drv,
+                                 USBD_ERR  *p_err)
+{
+    USBD_DRV_DATA  *p_drv_data;
+
+
+    USBD_LPCXX_Init(p_drv, p_err);
+
+    if (*p_err == USBD_ERR_NONE) {
+        p_drv_data         = (USBD_DRV_DATA *)p_drv->DataPtr;
+        p_drv_data->Ctrlr  =  USBD_NXP_USBX_CTRLR_LPCXX;        /* Indicates that driver used on NXP LPCxx.             */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvInitZynq()
+*
+* Description : Initialize the device for the Xilinx Zynq-7000.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE       Device successfully initialized.
+*                               USBD_ERR_ALLOC      Memory allocation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DevInit() via 'p_drv_api->Init()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvInitZynq (USBD_DRV  *p_drv,
+                                USBD_ERR  *p_err)
+{
+    USBD_DRV_DATA  *p_drv_data;
+
+
+    USBD_LPCXX_Init(p_drv, p_err);
+
+    if (*p_err == USBD_ERR_NONE) {
+        p_drv_data         = (USBD_DRV_DATA *)p_drv->DataPtr;
+        p_drv_data->Ctrlr  =  USBD_XILINX_USBX_CTRLR_ZYNQ;      /* Indicates that driver used on Xilinx Zynq.           */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvStart()
+*
+* Description : Start device operation :
+*
+*                   (1) Enable device controller bus state interrupts.
+*                   (2) Call board/chip specific connect function.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE    Device successfully connected.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DevStart() via 'p_drv_api->Start()'.
+*
+* Note(s)     : (1) Typically, the start function activates the pull-down on the D- pin to simulate
+*                   attachment to host. Some MCUs/MPUs have an internal pull-down that is activated by a
+*                   device controller register; for others, this may be a GPIO pin. Additionally, interrupts
+*                   for reset and suspend are activated.
+*
+*               (2) Since the CPU frequency could be higher than OTG module clock, a timeout is needed
+*                   to reset the OTG controller successfully.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvStart (USBD_DRV  *p_drv,
+                             USBD_ERR  *p_err)
+{
+    USBD_DRV_BSP_API  *p_bsp_api;
+    USBD_DRV_DATA     *p_drv_data;
+    USBD_LPCXX_REG    *p_reg;
+    CPU_INT16U         reg_to;
+
+
+    p_bsp_api  =  p_drv->BSP_API_Ptr;                           /* Get driver BSP API reference.                        */
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_reg      = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    p_reg->USBCMD = USBD_LPCXX_USBCMD_RST;                      /* Reset controller (see Note #2)                       */
+
+    reg_to = USBD_LPCXX_REG_TO;
+    while (reg_to > 0) {
+        reg_to--;
+    }
+
+    if (p_drv_data->Ctrlr == USBD_NXP_USBX_CTRLR_LPCXX) {
+        p_drv_data->hw_rev  = (CPU_INT08U)(CPU_INT32U)(((p_reg->IP_INFO & USBD_LPCXX_IP_INFO_MAJOR_MASK) >> 12u) * 10u);
+        p_drv_data->hw_rev += (CPU_INT08U)(CPU_INT32U)(((p_reg->IP_INFO & USBD_LPCXX_IP_INFO_MINOR_MASK) >>  8u));
+    }
+
+    p_reg->USBMODE = USBD_LPCXX_USBMODE_CM_DEV;                 /* Set device mode                                      */
+
+    p_reg->USBINTR     = DEF_BIT_NONE;                          /* Disable all interrupts                               */
+    p_reg->EP_LST_ADDR = (CPU_INT32U)p_drv_data->dQH_Tbl;
+
+    DEF_BIT_SET(p_reg->USBMODE, USBD_LPCXX_USBMODE_SLOM);       /* Disable setup lockout                                */
+    DEF_BIT_CLR(p_reg->USBMODE, USBD_LPCXX_USBMODE_SDIS);       /* Enable double priming on both Rx and Tx.             */
+
+    USBD_LPCXX_SoftRst(p_drv);                                  /* Perform software reset                               */
+
+    DEF_BIT_CLR(p_reg->USBCMD, USBD_LPCXX_USBCMD_ITC_MASK);     /* Dev ctrlr fires USB intr immediately.                */
+
+    p_reg->USBINTR = USBD_LPCXX_USB_INT_UR                      /* Enable the Reset and Suspend interrupt               */
+                   | USBD_LPCXX_USB_INT_SL;
+
+    if (p_drv->CfgPtr->Spd == USBD_DEV_SPD_FULL) {
+        DEF_BIT_SET(p_reg->PORTSC1, USBD_LPCXX_PORTSC1_PFSC);   /* Force FS.                                            */
+    }
+
+    DEF_BIT_SET(p_reg->USBCMD, USBD_LPCXX_USBCMD_RUN);          /* Set the RUN bit                                      */
+
+    if (p_bsp_api->Conn != (void *)0) {
+        p_bsp_api->Conn();                                      /* Call board/chip specific connect function.           */
+    }
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvStop()
+*
+* Description : Stop device operation.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DevStop() via 'p_drv_api->Stop()'.
+*
+* Note(s)     : Typically, the stop function performs the following operations:
+*               (1) Clear and disable USB interrupts.
+*               (2) Disconnect from the USB host (e.g, reset the pull-down on the D- pin).
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvStop (USBD_DRV  *p_drv)
+{
+    USBD_DRV_BSP_API  *p_bsp_api;
+    USBD_LPCXX_REG    *p_reg;
+
+
+    p_bsp_api =  p_drv->BSP_API_Ptr;                            /* Get driver BSP API reference.                        */
+    p_reg     = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    p_reg->USBINTR = DEF_BIT_NONE;
+
+    if (p_bsp_api->Disconn != (void *)0) {
+        p_bsp_api->Disconn();
+    }
+
+    DEF_BIT_CLR(p_reg->USBCMD, USBD_LPCXX_USBCMD_RUN);          /* Clear the RUN bit                                    */
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvAddrSet()
+*
+* Description : Assign an address to device.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               dev_addr    Device address assigned by the host.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_StdReqDev() via 'p_drv_api->AddrSet()'.
+*
+* Note(s)     : (1) For device controllers that have hardware assistance to enable the device address after
+*                   the status stage has completed, the assignment of the device address can also be
+*                   combined with enabling the device address mode.
+*
+*               (2) For device controllers that change the device address immediately, without waiting the
+*                   status phase to complete, see USBD_DrvAddrEn().
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvAddrSet (USBD_DRV    *p_drv,
+                                      CPU_INT08U   dev_addr)
+{
+    USBD_LPCXX_REG  *p_reg;
+
+
+    p_reg           = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_reg->DEV_ADDR = ((dev_addr << 25u) & USBD_LPCXX_DEV_ADDR_USBADDR_MASK) |
+                                           USBD_LPCXX_DEV_ADDR_USBADDRA;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvAddrEn()
+*
+* Description : Enable address on device.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               dev_addr    Device address assigned by the host.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_StdReqHandler() via 'p_drv_api->AddrEn()'.
+*
+* Note(s)     : (1) For device controllers that have hardware assistance to enable the device address after
+*                   the status stage has completed, no operation needs to be performed.
+*
+*               (2) For device controllers that change the device address immediately, without waiting the
+*                   status phase to complete, the device address must be set and enabled.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvAddrEn (USBD_DRV    *p_drv,
+                              CPU_INT08U   dev_addr)
+{
+    (void)&p_drv;
+    (void)&dev_addr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvCfgSet()
+*
+* Description : Bring device into configured state.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               cfg_val     Configuration value.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_CfgOpen() via 'p_drv_api->CfgSet()'.
+*
+* Note(s)     : Typically, the set configuration function sets the device as configured. For some
+*               controllers, this may not be necessary.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvCfgSet (USBD_DRV    *p_drv,
+                                     CPU_INT08U   cfg_val)
+{
+    (void)&p_drv;
+    (void)&cfg_val;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvCfgClr()
+*
+* Description : Bring device into de-configured state.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               cfg_val     Configuration value.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_CfgClose() via 'p_drv_api->CfgClr()'.
+*
+* Note(s)     : (1) Typically, the clear configuration function sets the device as not being configured.
+*                   For some controllers, this may not be necessary.
+*
+*               (2) This functions in invoked after a bus reset or before the status stage of some
+*                   SET_CONFIGURATION requests.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvCfgClr (USBD_DRV    *p_drv,
+                              CPU_INT08U   cfg_val)
+{
+    (void)&p_drv;
+    (void)&cfg_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvGetFrameNbr()
+*
+* Description : Retrieve current frame number.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : Frame number.
+*
+* Caller(s)   : USBD_EP_Open() via 'p_drv_api->GetFrameNbr()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  USBD_DrvGetFrameNbr (USBD_DRV  *p_drv)
+{
+    CPU_INT16U       frame_nbr;
+    USBD_LPCXX_REG  *p_reg;
+
+
+    p_reg = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    frame_nbr = (p_reg->FRINDEX >> 3u);                         /* Lower 3 bits are used only for micro-frames.         */
+
+    return (frame_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvEP_Open()
+*
+* Description : Open and configure a device endpoint, given its characteristics (e.g., endpoint type,
+*               endpoint address, maximum packet size, etc).
+*
+* Argument(s) : p_drv               Pointer to device driver structure.
+*
+*               ep_addr             Endpoint address.
+*
+*               ep_type             Endpoint type :
+*
+*                                       USBD_EP_TYPE_CTRL,
+*                                       USBD_EP_TYPE_ISOC,
+*                                       USBD_EP_TYPE_BULK,
+*                                       USBD_EP_TYPE_INTR.
+*
+*               max_pkt_size        Maximum packet size.
+*
+*               transaction_frame   Endpoint transactions per frame.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE               Endpoint successfully opened.
+*                               USBD_ERR_EP_INVALID_ADDR    Invalid endpoint address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Open() via 'p_drv_api->EP_Open()',
+*               USBD_CtrlOpen().
+*
+* Note(s)     : (1) Typically, the endpoint open function performs the following operations:
+*
+*                   (a) Validate endpoint address, type and maximum packet size.
+*                   (b) Configure endpoint information in the device controller. This may include not
+*                       only assigning the type and maximum packet size, but also making certain that
+*                       the endpoint is successfully configured (or 'realized' or 'mapped'). For some
+*                       device controllers, this may not be necessary.
+*
+*               (2) If the endpoint address is valid, then the endpoint open function should validate
+*                   the attributes allowed by the hardware endpoint :
+*
+*                   (a) The maximum packet size 'max_pkt_size' should be validated to match hardware
+*                       capabilities.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_Open (USBD_DRV    *p_drv,
+                               CPU_INT08U   ep_addr,
+                               CPU_INT08U   ep_type,
+                               CPU_INT16U   max_pkt_size,
+                               CPU_INT08U   transaction_frame,
+                               USBD_ERR    *p_err)
+{
+    USBD_LPCXX_dQH  *p_dqh;
+    USBD_LPCXX_REG  *p_reg;
+    USBD_DRV_DATA   *p_drv_data;
+    CPU_BOOLEAN      ep_dir_in;
+    CPU_INT08U       ep_log_nbr;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT32U       reg_val;
+    CPU_SR_ALLOC();
+
+
+    ep_dir_in  =  USBD_EP_IS_IN(ep_addr);                       /* Get EP direction.                                    */
+    ep_log_nbr =  USBD_EP_ADDR_TO_LOG(ep_addr);                 /* Get EP logical  number.                              */
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);                 /* Get EP physical number.                              */
+    p_reg      = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+
+                                                                /* -------------- ENDPOINT CONFIGURATION -------------- */
+                                                                /* Prepare locally the EP cfg.                          */
+    reg_val = USBD_LPCXX_ENDPTCTRL_TX_EN |                      /* Enable EP Tx (i.e. IN direction).                    */
+              USBD_LPCXX_ENDPTCTRL_RX_EN;                       /* Enable EP Rx (i.e. OUT direction).                   */
+
+    switch (ep_type) {                                          /* Set the EP Tx and Rx type.                           */
+        case USBD_EP_TYPE_CTRL:
+             DEF_BIT_SET(reg_val, USBD_LPCXX_ENDPTCTRL_TX_TYPE_CTRL |
+                                  USBD_LPCXX_ENDPTCTRL_RX_TYPE_CTRL);
+             break;
+
+
+        case USBD_EP_TYPE_ISOC:
+             DEF_BIT_SET(reg_val, USBD_LPCXX_ENDPTCTRL_TX_TYPE_ISOC |
+                                  USBD_LPCXX_ENDPTCTRL_RX_TYPE_ISOC);
+             break;
+
+
+        case USBD_EP_TYPE_INTR:
+             DEF_BIT_SET(reg_val, USBD_LPCXX_ENDPTCTRL_TX_TYPE_INT |
+                                  USBD_LPCXX_ENDPTCTRL_RX_TYPE_INT);
+             break;
+
+
+        case USBD_EP_TYPE_BULK:
+             DEF_BIT_SET(reg_val, USBD_LPCXX_ENDPTCTRL_TX_TYPE_BULK |
+                                  USBD_LPCXX_ENDPTCTRL_RX_TYPE_BULK);
+             break;
+
+
+        default:                                                /* 'default' case intentionally empty.                  */
+             break;
+    }
+
+    if (ep_type != USBD_EP_TYPE_CTRL) {                         /* Reset Tx & Rx data toggle.                           */
+        DEF_BIT_SET(reg_val, USBD_LPCXX_ENDPTCTRL_TX_TOGGLE_RST);
+        DEF_BIT_SET(reg_val, USBD_LPCXX_ENDPTCTRL_RX_TOGGLE_RST);
+    }
+
+    CPU_CRITICAL_ENTER();
+    if (ep_dir_in == DEF_FALSE) {                               /* OUT Endpoints                                        */
+                                                                /* Reset reg upper half to keep only Rx related bits.   */
+        reg_val &= USBD_LPCXX_ENDPTCTRL_RX_CFG_MASK;
+        DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_LPCXX_ENDPTCTRL_RX_CFG_MASK);
+    } else {                                                    /* IN Endpoints                                         */
+                                                                /* Reset reg lower half to keep only Tx related bits.   */
+        reg_val &= USBD_LPCXX_ENDPTCTRL_TX_CFG_MASK;
+        DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_LPCXX_ENDPTCTRL_TX_CFG_MASK);
+    }
+
+    DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr], reg_val);        /* Apply the local EP cfg to EP ctrl register.          */
+
+                                                                /* --------- ENDPOINT QUEUE HEAD CONFIGURATION -------- */
+    reg_val = ((max_pkt_size << 16u) & USBD_LPCXX_dQH_EP_CAP_MAX_LEN_MASK);
+
+    if ((ep_type   == USBD_EP_TYPE_CTRL) &&
+        (ep_dir_in == DEF_FALSE)) {
+        DEF_BIT_SET(reg_val              , USBD_LPCXX_dQH_EP_CAP_IOS);
+        DEF_BIT_SET(p_reg->ENDPTSETUPSTAT, DEF_BIT32(ep_log_nbr));
+    }
+
+    if ((ep_type == USBD_EP_TYPE_CTRL) ||
+        (ep_type == USBD_EP_TYPE_BULK) ||
+        (ep_type == USBD_EP_TYPE_INTR)) {
+        DEF_BIT_SET(reg_val, USBD_LPCXX_dQH_EP_CAP_ZLTS);
+    }
+
+    if (ep_type == USBD_EP_TYPE_ISOC) {
+        if (transaction_frame == 1u) {
+            DEF_BIT_SET(reg_val, USBD_LPCXX_dQH_EP_CAP_MULT_1);
+        } else if (transaction_frame == 2u) {                   /* #### This case must be tested.                       */
+            DEF_BIT_SET(reg_val, USBD_LPCXX_dQH_EP_CAP_MULT_2);
+        } else if (transaction_frame == 3u) {                   /* #### This case must be tested.                       */
+            DEF_BIT_SET(reg_val, USBD_LPCXX_dQH_EP_CAP_MULT_3);
+        }
+    }
+
+//    BSP_DCache_InvalidateRange(p_dqh, sizeof(USBD_LPCXX_dQH));  /* Invalidate (clear) the cached RAM block, so that the */
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_LPCXX_dQH));        /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+    p_dqh->EpCap = reg_val;
+#if 1
+    p_dqh->OverArea.dTD_NextPtr = USBD_LPCXX_dTD_dTD_NEXT_TERMINATE;
+#else // TODO see if Zynq drv really needs that IF
+    if (ep_dir == DEF_TRUE) {
+        p_dqh->OverArea.dTD_NextPtr = USBD_LPCXX_dTD_dTD_NEXT_TERMINATE;
+    }
+#endif
+
+//    BSP_DCache_FlushRange(p_dqh, sizeof(USBD_LPCXX_dQH));        /* Write cached memory block back to RAM.               */
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_LPCXX_dQH));      /* Write cached memory block back to RAM.               */
+
+    CPU_CRITICAL_EXIT();
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_Close()
+*
+* Description : Close a device endpoint, and uninitialize/clear endpoint configuration in hardware.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Close() via 'p_drv_api->EP_Close()',
+*               USBD_CtrlOpen().
+*
+* Note(s)     : Typically, the endpoint close function clears the endpoint information in the device
+*               controller. For some controllers, this may not be necessary.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_Close (USBD_DRV    *p_drv,
+                                CPU_INT08U   ep_addr)
+{
+    CPU_INT08U  ep_phy_nbr;
+
+
+    ep_phy_nbr = USBD_EP_ADDR_TO_PHY(ep_addr);
+    (void)USBD_LPCXX_dTD_LstEmpty(p_drv, ep_phy_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvEP_RxStart()
+*
+* Description : Configure endpoint with buffer to receive data.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to data buffer.
+*
+*               buf_len     Length of the buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE           Receive successfully configured.
+*                               USBD_ERR_RX             Generic Rx error.
+*                               USBD_ERR_EP_QUEUING     Unable to enqueue xfer.
+*
+* Return(s)   : Maximum number of octets that will be received, if NO error(s).
+*
+*               0,                                              otherwise.
+*
+* Caller(s)   : USBD_EP_ProcessAsyncRxStart() via 'p_drv_api->EP_RxStart()',
+*               USBD_EP_Rx() via 'p_drv_api->EP_RxStart()',
+*               USBD_EP_RxZLP() via 'p_drv_api->EP_RxStart()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  USBD_DrvEP_RxStart (USBD_DRV    *p_drv,
+                                        CPU_INT08U   ep_addr,
+                                        CPU_INT08U  *p_buf,
+                                        CPU_INT32U   buf_len,
+                                        USBD_ERR    *p_err)
+{
+    USBD_LPCXX_REG  *p_reg;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT32U       ep_pkt_len;
+
+
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);
+    p_reg      = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+
+                                                                /* Force one transaction.                               */
+    ep_pkt_len =  DEF_MIN(buf_len, USBD_LPCXX_dTD_TOKEN_TOTAL_BYTE_MAX);
+
+    DEF_BIT_CLR(p_reg->USBINTR, USBD_LPCXX_USB_INT_U);          /* Disable interrupts.                                  */
+
+//    BSP_DCache_InvalidateRange(p_buf, ep_pkt_len);              /* Invalidate (clear) the cached RAM block, so that the */
+    CPU_DCACHE_RANGE_INV(p_buf, ep_pkt_len);                    /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+
+    USBD_LPCXX_dTD_LstInsert(            p_drv,
+                                         ep_phy_nbr,
+                                         p_buf,
+                             (CPU_INT16U)ep_pkt_len,
+                                         p_err);
+
+    DEF_BIT_SET(p_reg->USBINTR, USBD_LPCXX_USB_INT_U);          /* Enable interrupts.                                   */
+
+    if (*p_err == USBD_ERR_FAIL) {
+       *p_err = USBD_ERR_RX;
+    }
+
+    return (ep_pkt_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvEP_Rx()
+*
+* Description : Receive the specified amount of data from device endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to data buffer.
+*
+*               buf_len     Length of the buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Data successfully received.
+*                               USBD_ERR_RX     Generic Rx error.
+*
+* Return(s)   : Number of octets received, if NO error(s).
+*
+*               0,                         otherwise.
+*
+* Caller(s)   : USBD_EP_Rx() via 'p_drv_api->EP_Rx()',
+*               USBD_EP_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  USBD_DrvEP_Rx (USBD_DRV    *p_drv,
+                                   CPU_INT08U   ep_addr,
+                                   CPU_INT08U  *p_buf,
+                                   CPU_INT32U   buf_len,
+                                   USBD_ERR    *p_err)
+{
+    USBD_LPCXX_REG  *p_reg;
+    USBD_DRV_DATA   *p_drv_data;
+    USBD_LPCXX_dQH  *p_dqh;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT16U       xfer_len_rxd;
+    CPU_INT32U       ep_buf_len;
+    CPU_INT32U       ep_token;
+    CPU_SR_ALLOC();
+
+    (void)&p_buf;
+
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);
+    p_reg      = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+    ep_buf_len =  DEF_MIN(buf_len, USBD_LPCXX_dTD_TOKEN_TOTAL_BYTE_MAX);
+
+    DEF_BIT_CLR(p_reg->USBINTR, USBD_LPCXX_USB_INT_U);          /* Disable interrupts.                                  */
+
+//    BSP_DCache_InvalidateRange(p_buf, buf_len);                 /* Invalidate (clear) the cached RAM block, so that the */
+    CPU_DCACHE_RANGE_INV(p_buf, buf_len);                       /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+//    BSP_DCache_InvalidateRange(p_dqh, sizeof(USBD_LPCXX_dQH));
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_LPCXX_dQH));
+
+                                                                /* Chk for err.                                         */
+    ep_token = p_dqh->dTD_LstHeadPtr->Token;
+
+    if (DEF_BIT_IS_SET_ANY(ep_token, USBD_LPCXX_dTD_TOKEN_STATUS_ANY) == DEF_YES) {
+        if (DEF_BIT_IS_SET(ep_token, USBD_LPCXX_dTD_TOKEN_STATUS_DATA_ERR) == DEF_YES) {
+           *p_err = USBD_ERR_DRV_BUF_OVERFLOW;                  /* Buf ovrf err can happen on any type of EP.           */
+        } else if (DEF_BIT_IS_SET(ep_token, USBD_LPCXX_dTD_TOKEN_STATUS_TRAN_ERR) == DEF_YES) {
+           *p_err = USBD_ERR_DRV_INVALID_PKT;                   /* Pkt err or fulfillment err is only on isoc EP.       */
+        } else {
+           *p_err = USBD_ERR_RX;                                /* Signal err even if no particular err is defined.     */
+        }
+     } else {
+        *p_err = USBD_ERR_NONE;
+    }
+
+                                                                /* Calc rx'd len.                                       */
+    xfer_len_rxd = (CPU_INT16U)(p_dqh->dTD_LstHeadPtr->BufLen -
+                              ((p_dqh->dTD_LstHeadPtr->Token  & USBD_LPCXX_dTD_TOKEN_TOTAL_BYTES_MASK) >> 16u));
+
+    if (xfer_len_rxd != 0u) {
+                                                                /* Chk rem data to read.                                */
+        if (xfer_len_rxd > ep_buf_len) {
+            CPU_CRITICAL_ENTER();
+                                                                /* Update size & pointer to memory buffer.              */
+            p_dqh->dTD_LstHeadPtr->Token = ((p_dqh->dTD_LstHeadPtr->Token) & USBD_LPCXX_dTD_TOKEN_TOTAL_BYTES_MASK)
+                                         + ((xfer_len_rxd << 16u)          & USBD_LPCXX_dTD_TOKEN_TOTAL_BYTES_MASK);
+                                                                /* Write cached memory block back to RAM.               */
+//            BSP_DCache_FlushRange(p_dqh, sizeof(USBD_LPCXX_dQH));
+            CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_LPCXX_dQH));
+            CPU_CRITICAL_EXIT();
+        }
+    }
+
+    USBD_LPCXX_dTD_LstRemove(p_drv, ep_phy_nbr);
+
+    DEF_BIT_SET(p_reg->USBINTR, USBD_LPCXX_USB_INT_U);          /* Enable interrupts.                                   */
+
+    return (xfer_len_rxd);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_RxZLP()
+*
+* Description : Receive zero-length packet from endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Zero-length packet successfully received.
+*                               USBD_ERR_RX     Generic Rx error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_RxZLP() via 'p_drv_api->EP_RxZLP()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_RxZLP (USBD_DRV    *p_drv,
+                                CPU_INT08U   ep_addr,
+                                USBD_ERR    *p_err)
+{
+    (void)USBD_DrvEP_Rx(              p_drv,
+                                      ep_addr,
+                        (CPU_INT08U *)0u,
+                                      0u,
+                                      p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvEP_Tx()
+*
+* Description : Configure endpoint with buffer to transmit data.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to buffer of data that will be transmitted.
+*
+*               buf_len     Number of octets to transmit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Transmit successfully configured.
+*
+* Return(s)   : Number of octets transmitted, if NO error(s).
+*
+*               0,                            otherwise.
+*
+* Caller(s)   : USBD_EP_Tx() via 'p_drv_api->EP_Tx()',
+*               USBD_EP_ProcessTx().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  USBD_DrvEP_Tx (USBD_DRV    *p_drv,
+                                   CPU_INT08U   ep_addr,
+                                   CPU_INT08U  *p_buf,
+                                   CPU_INT32U   buf_len,
+                                   USBD_ERR    *p_err)
+{
+    CPU_INT32U  ep_pkt_len;
+
+
+    (void)&p_drv;
+    (void)&ep_addr;
+    (void)&p_buf;
+
+    ep_pkt_len = DEF_MIN(buf_len, USBD_LPCXX_dTD_TOKEN_TOTAL_BYTE_MAX);
+   *p_err      = USBD_ERR_NONE;
+
+    return (ep_pkt_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvEP_TxStart()
+*
+* Description : Transmit the specified amount of data to device endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to buffer of data that will be transmitted.
+*
+*               buf_len     Number of octets to transmit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE           Data successfully transmitted.
+*                               USBD_ERR_TX             Generic Tx error.
+*                               USBD_ERR_EP_QUEUING     Unable to enqueue xfer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Tx() via 'p_drv_api->EP_TxStart()',
+*               USBD_EP_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_TxStart (USBD_DRV    *p_drv,
+                                  CPU_INT08U   ep_addr,
+                                  CPU_INT08U  *p_buf,
+                                  CPU_INT32U   buf_len,
+                                  USBD_ERR    *p_err)
+{
+    USBD_LPCXX_REG  *p_reg;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT32U       ep_pkt_len;
+
+
+    p_reg      = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);
+    ep_pkt_len =  DEF_MIN(buf_len, USBD_LPCXX_dTD_TOKEN_TOTAL_BYTE_MAX);
+
+    DEF_BIT_CLR(p_reg->USBINTR, USBD_LPCXX_USB_INT_U);          /* Disable interrupts.                                  */
+
+//    BSP_DCache_FlushRange(p_buf, buf_len);                      /* Write the cached memory block back to RAM, before    */
+    CPU_DCACHE_RANGE_FLUSH(p_buf, buf_len);                     /* Write the cached memory block back to RAM, before... */
+                                                                /* ...initiating the DMA transfer.                      */
+    USBD_LPCXX_dTD_LstInsert(            p_drv,
+                                         ep_phy_nbr,
+                                         p_buf,
+                             (CPU_INT16U)ep_pkt_len,
+                                         p_err);
+
+    DEF_BIT_SET(p_reg->USBINTR, USBD_LPCXX_USB_INT_U);          /* Enable interrupts.                                   */
+
+    if (*p_err == USBD_ERR_FAIL) {
+       *p_err = USBD_ERR_TX;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_TxZLP()
+*
+* Description : Transmit zero-length packet from endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Zero-length packet successfully transmitted.
+*                               USBD_ERR_TX     Generic Tx error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Tx() via 'p_drv_api->EP_TxZLP()',
+*               USBD_EP_TxZLP(),
+*               USBD_EP_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_TxZLP (USBD_DRV    *p_drv,
+                                CPU_INT08U   ep_addr,
+                                USBD_ERR    *p_err)
+{
+    USBD_DrvEP_TxStart (              p_drv,
+                                      ep_addr,
+                        (CPU_INT08U *)0,
+                                      0u,
+                                      p_err);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_Abort()
+*
+* Description : Abort any pending transfer on endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint Address.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_URB_Abort() via 'p_drv_api->EP_Abort()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvEP_Abort (USBD_DRV    *p_drv,
+                                       CPU_INT08U   ep_addr)
+{
+    USBD_LPCXX_REG  *p_reg;
+    USBD_DRV_DATA   *p_drv_data;
+    CPU_INT32U       ix;
+    CPU_INT32U       entries;
+    CPU_BOOLEAN      ok;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT08U       ep_log_nbr;
+    CPU_INT32U       ep_flush;
+    CPU_BOOLEAN      flush_done;
+    CPU_INT32U       nbr_retries;
+    CPU_INT32U       reg_to;
+    CPU_BOOLEAN      valid;
+
+
+    ep_log_nbr =  USBD_EP_ADDR_TO_LOG(ep_addr);
+    p_reg      = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    ok         =  DEF_OK;
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(ep_addr);
+    valid      =  DEF_OK;
+
+//    BSP_DCache_InvalidateRange(&(p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries), sizeof(CPU_REG32));
+    CPU_DCACHE_RANGE_INV(&(p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries), sizeof(CPU_REG32));
+
+    entries = p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries;
+
+    if (USBD_EP_IS_IN(ep_addr) == DEF_YES) {
+        ep_flush = USBD_LPCXX_ENDPTxxx_GET_TX_BITS(ep_log_nbr);
+    } else {
+        ep_flush = USBD_LPCXX_ENDPTxxx_GET_RX_BITS(ep_log_nbr);
+    }
+
+    nbr_retries = USBD_LPCXX_MAX_RETRIES;
+    flush_done  = DEF_FALSE;
+
+    while ((flush_done  == DEF_FALSE) &&
+           (nbr_retries >  0u)) {
+
+        p_reg->ENDPTFLUSH = ep_flush;
+
+        reg_to = USBD_LPCXX_REG_TO;
+        while (((p_reg->ENDPTFLUSH & ep_flush) != 0u) &&
+               (reg_to                          > 0u)) {
+            reg_to--;
+        }
+
+        flush_done = DEF_BIT_IS_CLR(p_reg->ENDPTSTATUS, ep_flush);
+        nbr_retries--;
+    }
+
+    for (ix = 0u; ix < entries; ix++) {
+        ok = USBD_LPCXX_dTD_LstRemove(p_drv, ep_phy_nbr);
+        if (ok == DEF_FAIL) {
+            break;
+        }
+    }
+
+    if (nbr_retries == 0u) {
+        valid = DEF_FAIL;
+    }
+
+    return (valid);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_Stall()
+*
+* Description : Set or clear stall condition on endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               state       Endpoint stall state.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_EP_Stall() via 'p_drv_api->EP_Stall()',
+*               USBD_CtrlStall().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvEP_Stall (USBD_DRV     *p_drv,
+                                       CPU_INT08U    ep_addr,
+                                       CPU_BOOLEAN   state)
+{
+    USBD_LPCXX_REG  *p_reg;
+    CPU_INT08U       ep_log_nbr;
+
+
+    p_reg      = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+    ep_log_nbr =  USBD_EP_ADDR_TO_LOG(ep_addr);
+
+    if (state == DEF_SET) {
+        if (USBD_EP_IS_IN(ep_addr) == DEF_YES) {
+            DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr],
+                        USBD_LPCXX_ENDPTCTRL_TX_STALL);
+        } else {
+            DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr],
+                        USBD_LPCXX_ENDPTCTRL_RX_STALL);
+        }
+    } else {
+        if (ep_log_nbr > 0u) {
+            if (USBD_EP_IS_IN(ep_addr) == DEF_YES) {
+                DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr],
+                            USBD_LPCXX_ENDPTCTRL_TX_STALL);
+
+                DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr],
+                            USBD_LPCXX_ENDPTCTRL_TX_TOGGLE_RST);
+            } else {
+                DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr],
+                            USBD_LPCXX_ENDPTCTRL_RX_STALL);
+
+                DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr],
+                            USBD_LPCXX_ENDPTCTRL_RX_TOGGLE_RST);
+            }
+        }
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvISR_Handler()
+*
+* Description : USB device Interrupt Service Routine (ISR) handler.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : This is an ISR.
+*
+* Note(s)     : (1) The bit DCSuspend in the register USBSTS generates an interrupt each time it
+*                   transitions. From 0 to 1, the interrupt generated is for a Suspend event.
+*                   From 1 to 0, the interrupt generated is for the device controller exiting
+*                   from a suspend state.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvISR_Handler (USBD_DRV  *p_drv)
+{
+    USBD_LPCXX_REG      *p_reg;
+    USBD_DRV_DATA       *p_drv_data;
+    USBD_LPCXX_dTD_EXT  *p_dtd;
+    USBD_LPCXX_dTD_EXT  *p_dtd_next;
+    CPU_INT32U           ep_complete;
+    CPU_INT32U           ep_setup;
+    CPU_INT08U           ep_log_nbr;
+    CPU_INT08U           ep_phy_nbr;
+    CPU_INT32U           int_status;
+    CPU_INT32U           int_en;
+
+
+    p_drv_data  = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_reg       = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    int_status  = p_reg->USBSTS;
+    int_en      = p_reg->USBINTR;
+    int_status &= int_en;
+
+    if (int_status != DEF_BIT_NONE) {
+                                                                /* ------------- HIGH-FREQUENCY INTERRUPTS ------------ */
+        if (DEF_BIT_IS_SET(int_status, USBD_LPCXX_USB_INT_U) == DEF_YES) {
+            p_reg->USBSTS = USBD_LPCXX_USB_INT_U;
+
+            ep_setup = p_reg->ENDPTSETUPSTAT;                   /* (1) Process all setup transactions                   */
+            while (ep_setup != DEF_BIT_NONE) {
+                ep_log_nbr = (CPU_INT08U)(31u - CPU_CntLeadZeros32(ep_setup));
+                USBD_LPCXX_SetupProcess(p_drv,
+                                        ep_log_nbr);
+                ep_setup = p_reg->ENDPTSETUPSTAT;
+            }
+
+            ep_complete          = p_reg->ENDPTCOMPLETE;        /* (2) Process all IN/OUT  transactions                 */
+            p_reg->ENDPTCOMPLETE = ep_complete;
+            while (ep_complete != DEF_BIT_NONE) {
+
+                if (DEF_BIT_IS_SET_ANY(ep_complete, USBD_LPCXX_ENDPTCOMPLETE_TX_MASK) == DEF_YES) {
+                    ep_log_nbr = (CPU_INT08U)(31u - CPU_CntLeadZeros32(USBD_LPCXX_ENDPTxxx_GET_TX_NBR(ep_complete)));
+                    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(USBD_EP_LOG_TO_ADDR_IN(ep_log_nbr));
+
+                    ep_complete &= ~USBD_LPCXX_ENDPTxxx_GET_TX_BITS(ep_log_nbr);
+                    p_dtd        =  p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstHeadPtr;
+
+//                    BSP_DCache_InvalidateRange(p_dtd, sizeof(USBD_LPCXX_dTD_EXT));
+                    CPU_DCACHE_RANGE_INV(p_dtd, sizeof(USBD_LPCXX_dTD_EXT));
+                                                                /* Loop if many dTDs have completed in a single int.    */
+                    while (DEF_BIT_IS_CLR(p_dtd->Token, USBD_LPCXX_dTD_TOKEN_STATUS_ACTIVE) == DEF_YES) {
+                        p_dtd_next = (USBD_LPCXX_dTD_EXT *)p_dtd->dTD_NextPtr;
+
+                        USBD_EP_TxCmpl(p_drv, ep_log_nbr);
+                        USBD_LPCXX_dTD_LstRemove(p_drv, ep_phy_nbr);
+
+                        if (DEF_BIT_IS_SET((CPU_REG32)p_dtd_next, USBD_LPCXX_dTD_dTD_NEXT_TERMINATE) == DEF_YES) {
+                            break;
+                        }
+                        p_dtd = p_dtd_next;
+//                        BSP_DCache_InvalidateRange(p_dtd, sizeof(USBD_LPCXX_dTD_EXT)); // !!!! not in original Zynq drv. Added by me
+                        CPU_DCACHE_RANGE_INV(p_dtd, sizeof(USBD_LPCXX_dTD_EXT));
+                    }
+                }
+
+                if (DEF_BIT_IS_SET_ANY(ep_complete, USBD_LPCXX_ENDPTCOMPLETE_RX_MASK) == DEF_YES) {
+                    ep_log_nbr = (CPU_INT08U)(31u - CPU_CntLeadZeros32(USBD_LPCXX_ENDPTxxx_GET_RX_NBR(ep_complete)));
+                    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(USBD_EP_LOG_TO_ADDR_OUT(ep_log_nbr));
+
+                    ep_complete &= ~USBD_LPCXX_ENDPTxxx_GET_RX_BITS(ep_log_nbr);
+                    p_dtd        =  p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstHeadPtr;
+
+//                    BSP_DCache_InvalidateRange(p_dtd, sizeof(USBD_LPCXX_dTD_EXT));
+                    CPU_DCACHE_RANGE_INV(p_dtd, sizeof(USBD_LPCXX_dTD_EXT));
+                                                                /* Loop if many dTDs have completed in a single int.    */
+                    while (DEF_BIT_IS_CLR(p_dtd->Token, USBD_LPCXX_dTD_TOKEN_STATUS_ACTIVE) == DEF_YES) {
+                        p_dtd_next = (USBD_LPCXX_dTD_EXT *)p_dtd->dTD_NextPtr;
+
+                        if (DEF_BIT_IS_CLR(p_dtd->Attrib, USBD_LPCXX_dTD_EXT_ATTRIB_IS_COMPLETED) == DEF_YES) {
+                            USBD_EP_RxCmpl(p_drv, ep_log_nbr);
+                            DEF_BIT_SET(p_dtd->Attrib, USBD_LPCXX_dTD_EXT_ATTRIB_IS_COMPLETED);
+                            CPU_DCACHE_RANGE_FLUSH((void *)p_dtd->Attrib,
+                                                           sizeof(CPU_REG32));   // !!!! added by me
+                        }
+                                                                /* End of dTD list attached to this dQH.                */
+                        if ((((CPU_REG32)p_dtd_next)                                                  == ((CPU_REG32) 1)) ||
+                            (DEF_BIT_IS_SET((CPU_REG32)p_dtd_next, USBD_LPCXX_dTD_dTD_NEXT_TERMINATE) == DEF_YES)) {
+                            break;
+                        }
+                        p_dtd = p_dtd_next;
+//                        BSP_DCache_InvalidateRange(p_dtd, sizeof(USBD_LPCXX_dTD_EXT)); // !!!! not in original Zynq drv. Added by me
+                        CPU_DCACHE_RANGE_INV(p_dtd, sizeof(USBD_LPCXX_dTD_EXT));
+                    }
+                }
+            }
+        }
+
+        if (DEF_BIT_IS_SET(int_status, USBD_LPCXX_USB_INT_UE) == DEF_YES) {
+            p_reg->USBSTS = USBD_LPCXX_USB_INT_UE;
+        }
+
+                                                                /* ------------- LOW-FREQUENCY INTERRUPTS ------------- */
+                                                                /* (3) Process the bus change interrupts                */
+                                                                /* ---------------- USB RESET INTERRUPT --------------- */
+        if (DEF_BIT_IS_SET(int_status, USBD_LPCXX_USB_INT_UR) == DEF_YES) {
+
+            USBD_LPCXX_SoftRst(p_drv);                          /* Perform a soft reset                                 */
+
+            USBD_EventReset(p_drv);                             /* Notify bus reset.                                    */
+
+            p_reg->USBSTS  = USBD_LPCXX_USB_INT_UR;             /* Clear the interrupt                                  */
+            p_reg->USBINTR = USBD_LPCXX_USB_INT_SL
+                           | USBD_LPCXX_USB_INT_UR
+                           | USBD_LPCXX_USB_INT_PC
+                           | USBD_LPCXX_USB_INT_U
+                           | USBD_LPCXX_USB_INT_UE;
+        }
+
+                                                                /* --------------- USB SUSPEND INTERRUPT -------------- */
+                                                                /* See Note #1.                                         */
+        if ((DEF_BIT_IS_SET(int_status, USBD_LPCXX_USB_INT_SL) == DEF_YES) &&
+            (p_drv_data->Suspend                               == DEF_FALSE)) {
+
+            USBD_EventSuspend(p_drv);
+
+            p_reg->USBSTS  = USBD_LPCXX_USB_INT_SL;             /* Clear the suspend interrupt                          */
+            p_reg->USBINTR = USBD_LPCXX_USB_INT_UR              /* Enable the Reset and Port change interrupt           */
+                           | USBD_LPCXX_USB_INT_U
+                           | USBD_LPCXX_USB_INT_PC
+                           | USBD_LPCXX_USB_INT_UE;
+            p_drv_data->Suspend = DEF_TRUE;
+
+        } else if ((DEF_BIT_IS_SET(int_status, USBD_LPCXX_USB_INT_SL) == DEF_NO) &&
+                   (p_drv_data->Suspend                               == DEF_TRUE)) {
+
+            USBD_EventResume(p_drv);
+            p_drv_data->Suspend = DEF_FALSE;
+        }
+
+
+                                                                /* ------------- USB PORT CHANGE INTERRUPT ------------ */
+        if (DEF_BIT_IS_SET(int_status, USBD_LPCXX_USB_INT_PC) == DEF_YES) {
+                                                                /* Detect the speed of the device                       */
+            if (DEF_BIT_IS_SET(p_reg->PORTSC1, USBD_LPCXX_PORTSC1_HSP) == DEF_YES) {
+                USBD_EventHS(p_drv);                            /* Notify high-speed event.                             */
+            }
+                                                                /* Clear the Port change interrupt                       */
+            p_reg->USBSTS = USBD_LPCXX_USB_INT_PC;
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           USBD_LPCXX_Init()
+*
+* Description : Initialize the device.
+*
+*                   1) Allocate software resources.
+*                   2) Call BSP Init() function.
+*
+* Argument(s) : p_drv   Pointer to device driver structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE       Device successfully initialized.
+*                               USBD_ERR_ALLOC      Memory allocation failed.
+*                               USBD_ERR_FAIL       No maximum physical endpoint number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DrvInitLPCXX(),
+*               USBD_DrvInitZynq().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_LPCXX_Init (USBD_DRV    *p_drv,
+                               USBD_ERR    *p_err)
+{
+    USBD_DRV_BSP_API  *p_bsp_api;
+    USBD_DRV_DATA     *p_drv_data;
+    CPU_INT08U         ep_phy_nbr_max;
+    LIB_ERR            err_lib;
+
+
+                                                                /* Allocate driver internal data.                       */
+    p_drv->DataPtr = Mem_HeapAlloc(              sizeof(USBD_DRV_DATA),
+                                                 sizeof(CPU_DATA),
+                                   (CPU_SIZE_T *)0,
+                                                &err_lib);
+    if (p_drv->DataPtr == (void *)0) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    Mem_Clr((void *)p_drv->DataPtr,
+                   (sizeof(USBD_DRV_DATA)));
+
+    p_drv_data = (USBD_DRV_DATA  *)p_drv->DataPtr;
+
+    Mem_PoolCreate(             &p_drv_data->dTD_MemPool,       /* Create EP device transfer descriptor memory pool.    */
+                   (void       *)0,                             /* From heap.                                           */
+                                 0u,
+                                 USBD_LPCXX_dTD_NBR,            /* Take into account extra URBs if used.                */
+                                (sizeof(USBD_LPCXX_dTD_EXT)),
+                                 USBD_LPCXX_ALIGN_OCTECTS_dTD,
+                   (CPU_SIZE_T *)0,
+                                &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    ep_phy_nbr_max = USBD_EP_MaxPhyNbrGet(p_drv->DevNbr);       /* Get max phy EP used by the device.                   */
+    if (ep_phy_nbr_max == USBD_EP_PHY_NONE) {
+        *p_err = USBD_ERR_FAIL;
+         return;
+    }
+    ep_phy_nbr_max++;                                           /* Inc because max nbf or phy EP returned is 0-based.   */
+                                                                /* Allocate EP Queue Head data.                         */
+    p_drv_data->dQH_Tbl = (USBD_LPCXX_dQH *)Mem_HeapAlloc(              (sizeof(USBD_LPCXX_dQH) * ep_phy_nbr_max),
+                                                                         USBD_LPCXX_ALIGN_OCTECTS_dQH,
+                                                          (CPU_SIZE_T  *)0,
+                                                                        &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    Mem_Clr((void  *) p_drv_data->dQH_Tbl,
+                     (sizeof(USBD_LPCXX_dQH) * (ep_phy_nbr_max)));
+
+#if (USBD_CFG_MAX_NBR_URB_EXTRA > 0u)
+                                                                /* Alloc tbl tracking nbr of dTD used by ongoing... */
+                                                                /* ...xfers for all open EP.                        */
+    p_drv_data->dTD_UsageTbl = (CPU_INT08U *)Mem_HeapAlloc(             (sizeof(CPU_INT08U) * ep_phy_nbr_max),
+                                                                        (sizeof(CPU_DATA)),
+                                                           (CPU_SIZE_T *)0,
+                                                                        &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    Mem_Clr((void *)p_drv_data->dTD_UsageTbl,
+                   (sizeof(CPU_INT08U) * ep_phy_nbr_max));
+#endif
+
+    p_bsp_api = p_drv->BSP_API_Ptr;                             /* Get driver BSP API reference.                        */
+    if (p_bsp_api->Init != (void *)0) {
+        p_bsp_api->Init(p_drv);                                 /* Call board/chip specific device ctrlr init fnct.     */
+    }
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                      USBD_LPCXX_dTD_LstInsert()
+*
+* Description : Insert a new dTD at the end of the link list.
+*               (1) Get a dTD from the memory pool.
+*               (2) Build the transfer descriptor.
+*               (3) Insert the dTD at the end of the link list
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_phy_nbr  Endpoint logical number.
+*
+*               p_data      Pointer to the data buffer; ignored for OUT endpoints.
+*
+*               len         Transfer length.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE           dTd successfully obtained, filled and queued.
+*                               USBD_ERR_FAIL           Generic failure error.
+*                               USBD_ERR_EP_QUEUING     No more dTD remaining to queue.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DrvEP_RxStart(),
+*               USBD_DrvEP_RxZLP(),
+*               USBD_DrvEP_TxStart(),
+*               USBD_DrvEP_TxZLP().
+*
+* Note(s)     : (1) If the endpoint is not a control endpoint, it is required to make sure that there is
+*                   a dTD left. This is not required for control endpoints, since they cannot have more
+*                   than one dTD queued at any time.
+*
+*               (2) 1st condition in the IF statement ensures that a dTD can be allocated for an open
+*                   endpoint having already some ongoing dTD. (-1u) guarantees that there is always 1 dTD
+*                   available for the control endpoint.
+*                   2nd and 3rd conditions allows a dTD to be allocated if the considered endpoint is
+*                   an empty endpoint and there are some dTD available.
+*********************************************************************************************************
+*/
+
+static  void  USBD_LPCXX_dTD_LstInsert (USBD_DRV    *p_drv,
+                                        CPU_INT08U   ep_phy_nbr,
+                                        CPU_INT08U  *p_data,
+                                        CPU_INT16U   len,
+                                        USBD_ERR    *p_err)
+{
+    USBD_LPCXX_REG      *p_reg;
+    USBD_DRV_DATA       *p_drv_data;
+    USBD_LPCXX_dTD_EXT  *p_dtd;
+    USBD_LPCXX_dTD_EXT  *p_dtd_last;
+    USBD_LPCXX_dQH      *p_dqh;
+    CPU_INT08U          *p_buf_page;
+    CPU_INT08U           i;
+    CPU_INT08U           insert_nbr_tries;
+    CPU_BOOLEAN          insert_complete;
+    CPU_BOOLEAN          valid_bit;
+    CPU_INT32U           ep_status;
+    CPU_INT08U           ep_log_nbr;
+    LIB_ERR              err_lib;
+#if (USBD_CFG_MAX_NBR_URB_EXTRA > 0u)
+    CPU_INT08U           dtd_used;
+    CPU_INT08U           ep_empty;
+    CPU_INT08U           ep_phy_nbr_max;
+    CPU_INT16U           dTD_avail;
+#endif
+    CPU_SR_ALLOC();
+
+
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_reg      = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+    p_dtd_last =  p_dqh->dTD_LstTailPtr;
+    ep_log_nbr =  USBD_EP_PHY_TO_LOG(ep_phy_nbr);
+
+
+#if (USBD_CFG_MAX_NBR_URB_EXTRA > 0u)
+                                                                /* If EP type is bulk, intr or isoc.                    */
+    if (((p_reg->ENDPTCTRLx[ep_log_nbr] & USBD_LPCXX_ENDPTCTRL_TX_TYPE_MASK) != USBD_LPCXX_ENDPTCTRL_TX_TYPE_CTRL) ||
+        ((p_reg->ENDPTCTRLx[ep_log_nbr] & USBD_LPCXX_ENDPTCTRL_RX_TYPE_MASK) != USBD_LPCXX_ENDPTCTRL_RX_TYPE_CTRL)) {
+
+        ep_empty       = 0u;                                    /* Chk if a dTD is avail (see Note #1).                 */
+        dtd_used       = 0u;
+        ep_phy_nbr_max =  USBD_EP_MaxPhyNbrGet(p_drv->DevNbr);
+        CPU_CRITICAL_ENTER();
+        for (i = 0u; i < ep_phy_nbr_max; ++i) {
+            ep_empty += (p_drv_data->dTD_UsageTbl[i] == 0u) ? 1u : 0u;
+            dtd_used +=  p_drv_data->dTD_UsageTbl[i];
+        }
+
+        dTD_avail = USBD_LPCXX_dTD_NBR - dtd_used;
+                                                                /* See Note #2.                                         */
+        if ((((CPU_INT16U)(dtd_used + ep_empty))    < (USBD_LPCXX_dTD_NBR - 1u)) ||
+            ((p_drv_data->dTD_UsageTbl[ep_phy_nbr] == 0u)                        &&
+             (dTD_avail                            != 0u))) {
+
+            (p_drv_data->dTD_UsageTbl[ep_phy_nbr])++;
+
+        } else {
+            CPU_CRITICAL_EXIT();
+           *p_err = USBD_ERR_EP_QUEUING;
+            return;
+        }
+        CPU_CRITICAL_EXIT();
+    } else {                                                    /* Chk not required for ctrl EP (see Note #1).          */
+        CPU_CRITICAL_ENTER();
+        (p_drv_data->dTD_UsageTbl[ep_phy_nbr])++;
+        CPU_CRITICAL_EXIT();
+    }
+#endif
+                                                                /* (1) Get a dTD from the memory pool                   */
+    p_dtd = (USBD_LPCXX_dTD_EXT *)Mem_PoolBlkGet(&p_drv_data->dTD_MemPool,
+                                                  sizeof(USBD_LPCXX_dTD_EXT),
+                                                 &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_FAIL;
+        return;
+    }
+
+    Mem_Clr((void *)p_dtd,                                      /* ... Initialize the dTD to 0x00                       */
+                    sizeof(USBD_LPCXX_dTD_EXT));
+
+                                                                /* (2) Build the transfer descriptor                    */
+    p_dtd->dTD_NextPtr = USBD_LPCXX_dTD_dTD_NEXT_TERMINATE;     /* ... Set the terminate bit to 1                       */
+                                                                /* ... Fill in the total transfer len.                  */
+    p_dtd->Token       = ((len << 16u) & USBD_LPCXX_dTD_TOKEN_TOTAL_BYTES_MASK)
+                                       | USBD_LPCXX_dTD_TOKEN_IOC
+                                       | USBD_LPCXX_dTD_TOKEN_STATUS_ACTIVE;
+
+    p_buf_page = p_data;
+
+    p_dtd->BufPtrs[0] = (CPU_INT32U)p_buf_page;                 /* Init Buffer Pointer (Page 0) + Current Offset        */
+                                                                /* Init Buffer Pointer List if buffer spans more ...    */
+                                                                /* ... than one physical page (see Note #3).            */
+    for (i = 1u; i <= 4u; i++) {                                /* Init Buffer Pointer (Page 1 to 4)                    */
+                                                                /* Find the next closest 4K-page boundary ahead.        */
+        p_buf_page = (CPU_INT08U *)(((CPU_INT32U)p_buf_page + 0x1000u) & 0xFFFFF000u);
+
+        if (p_buf_page < (p_data + len)) {                      /* If buffer spans a new 4K-page boundary.              */
+                                                                /* Set page ptr to ref start of the subsequent 4K page. */
+            p_dtd->BufPtrs[i]  = (CPU_INT32U)p_buf_page;
+
+        } else {                                                /* All the transfer size has been described...          */
+            break;                                              /* ... quit the loop.                                   */
+        }
+    }
+
+    p_dtd->BufAddr = (CPU_INT32U)p_data;                        /* Save the buffer address                              */
+    p_dtd->BufLen  =             len;
+    p_dtd->Attrib  =             0u;                            /* Reset the field's value.                             */
+//    BSP_DCache_FlushRange(p_dtd, sizeof(USBD_LPCXX_dTD_EXT));   /* Write cached memory block back to RAM.               */
+    CPU_DCACHE_RANGE_FLUSH(p_dtd, sizeof(USBD_LPCXX_dTD_EXT));  /* Write cached memory block back to RAM.               */
+
+    CPU_CRITICAL_ENTER();
+
+//    BSP_DCache_InvalidateRange(p_dqh, sizeof(USBD_LPCXX_dQH));  /* Invalidate (clear) the cached RAM block, so that the */
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_LPCXX_dQH));        /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+
+                                                                /* (3) Insert the dTD at the end of the link list       */
+    if (p_dqh->dTD_LstNbrEntries == 0u) {                       /* ... Case 1: Link list is empty                       */
+
+        p_dqh->dTD_LstHeadPtr = p_dtd;
+        p_dqh->dTD_LstTailPtr = p_dtd;
+        p_dqh->dTD_LstNbrEntries++;
+                                                                /* (a) Write dQH next pointer and dQH terminate ...     */
+                                                                /* ... bit to '0' as a single operation                 */
+        p_dqh->OverArea.dTD_NextPtr = (CPU_INT32U)p_dtd;
+
+                                                                /* (b) Clear the Status bits                            */
+        DEF_BIT_CLR(p_dqh->OverArea.Token, USBD_LPCXX_dTD_TOKEN_STATUS_MASK);
+
+//        BSP_DCache_FlushRange(p_dqh, sizeof(USBD_LPCXX_dQH));   /* Write cached memory block back to RAM.               */
+        CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_LPCXX_dQH));  /* Write cached memory block back to RAM.               */
+
+                                                                /* (c) Prime the endpoint                               */
+        if (USBD_LPCXX_EP_PHY_NBR_IS_OUT(ep_phy_nbr) == DEF_YES) {
+            p_reg->ENDPTPRIME = USBD_LPCXX_ENDPTxxx_GET_RX_BITS(ep_log_nbr);
+        } else {
+            p_reg->ENDPTPRIME = USBD_LPCXX_ENDPTxxx_GET_TX_BITS(ep_log_nbr);
+        }
+    } else {                                                    /* ... Case 2: Link list is not empty                   */
+                                                                /* (a) Add dTD to end of linked list                    */
+        p_dqh->dTD_LstTailPtr->dTD_NextPtr = (CPU_INT32U)p_dtd;
+        p_dqh->dTD_LstTailPtr              =  p_dtd;
+        p_dqh->dTD_LstNbrEntries++;
+
+//        BSP_DCache_FlushRange(p_dqh, sizeof(USBD_LPCXX_dQH));    /* Write cached memory block back to RAM.               */
+        CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_LPCXX_dQH));  /* Write cached memory block back to RAM.               */
+
+                                                                /* (b) Read correct prime bit. IF '1' DONE.             */
+        if (USBD_LPCXX_EP_PHY_NBR_IS_OUT(ep_phy_nbr) == DEF_YES) {
+            valid_bit = DEF_BIT_IS_SET(USBD_LPCXX_ENDPTxxx_GET_RX_NBR(p_reg->ENDPTPRIME),
+                                      (DEF_BIT32(ep_log_nbr)));
+        } else {
+            valid_bit = DEF_BIT_IS_SET(USBD_LPCXX_ENDPTxxx_GET_TX_NBR(p_reg->ENDPTPRIME),
+                                      (DEF_BIT32(ep_log_nbr)));
+        }
+        if (valid_bit == DEF_YES) {
+            CPU_CRITICAL_EXIT();
+           *p_err = USBD_ERR_NONE;
+            return;
+        }
+
+        insert_nbr_tries = USBD_LPCXX_dTD_LST_INSERT_NBR_TRIES_MAX;
+        insert_complete  = DEF_FALSE;
+        ep_status        = DEF_BIT_NONE;
+
+        while ((insert_complete  == DEF_FALSE) &&
+               (insert_nbr_tries >  0u)) {
+
+                                                                /* (c) Set ATDTW (HW sem) bit in USBCMD register to '1' */
+            DEF_BIT_SET(p_reg->USBCMD, USBD_LPCXX_USBCMD_ATDTW);
+
+            ep_status = p_reg->ENDPTSTATUS;                     /* (d) Read correct status bits in ENDPSTATUS           */
+
+                                                                /* (e) Read ATDTW bit in USBCMD register ...            */
+            if (DEF_BIT_IS_SET(p_reg->USBCMD, USBD_LPCXX_USBCMD_ATDTW) == DEF_YES){
+                insert_complete = DEF_TRUE;                     /* ... If '1' continue to (f)                           */
+            } else {
+                insert_nbr_tries--;                             /* ... If '0' goto (c)                                  */
+            }
+        }
+
+        if (insert_complete == DEF_FALSE) {
+
+            Mem_PoolBlkFree(       &p_drv_data->dTD_MemPool,
+                            (void *)p_dtd,
+                                   &err_lib);
+
+            p_dqh->dTD_LstTailPtr              = p_dtd_last;
+            p_dqh->dTD_LstTailPtr->dTD_NextPtr = USBD_LPCXX_dTD_dTD_NEXT_TERMINATE;
+            p_dqh->dTD_LstNbrEntries--;
+
+//            BSP_DCache_FlushRange(p_dqh, sizeof(USBD_LPCXX_dQH));
+            CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_LPCXX_dQH));
+
+            CPU_CRITICAL_EXIT();
+           *p_err = USBD_ERR_FAIL;
+            return;
+        }
+
+        DEF_BIT_CLR(p_reg->USBCMD, USBD_LPCXX_USBCMD_ATDTW);    /* (f) Set ATDTW (HW sem) bit in USBCMD register to '0' */
+
+        if (USBD_LPCXX_EP_PHY_NBR_IS_OUT(ep_phy_nbr) == DEF_YES) {
+            valid_bit = DEF_BIT_IS_SET(USBD_LPCXX_ENDPTxxx_GET_RX_NBR(ep_status),
+                                      (DEF_BIT32(ep_log_nbr)));
+        } else {
+            valid_bit = DEF_BIT_IS_SET(USBD_LPCXX_ENDPTxxx_GET_TX_NBR(ep_status),
+                                      (DEF_BIT32(ep_log_nbr)));
+        }
+
+        if (valid_bit == DEF_YES) {
+            CPU_CRITICAL_EXIT();
+           *p_err = USBD_ERR_NONE;
+            return;                                             /* (g) If status bit read in (d) is '1' DONE            */
+        } else {
+                                                                /* (h) If status bit read in (d) is '0' goto Case 1     */
+            p_dqh->OverArea.dTD_NextPtr = (CPU_INT32U)p_dqh->dTD_LstHeadPtr;
+
+            DEF_BIT_CLR(p_dqh->OverArea.Token,
+                        USBD_LPCXX_dTD_TOKEN_STATUS_MASK);
+
+            CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_LPCXX_dQH));  // !!!! added by me
+                                                                /* (e) Prime the endpoint                               */
+            if (USBD_LPCXX_EP_PHY_NBR_IS_OUT(ep_phy_nbr) == DEF_YES) {
+                p_reg->ENDPTPRIME = USBD_LPCXX_ENDPTxxx_GET_RX_BITS(ep_log_nbr);
+            } else {
+                p_reg->ENDPTPRIME = USBD_LPCXX_ENDPTxxx_GET_TX_BITS(ep_log_nbr);
+            }
+        }
+    }
+    CPU_CRITICAL_EXIT();
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       USBD_LPCXX_dTD_LstEmpty()
+*
+* Description : This function flush the dTD list. All the dTD and Rx buffers are returned to the memory pool.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_phy_nbr  Endpoint physical number.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_DrvEP_Close(),
+*               USBD_LPCXX_SoftRst().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_LPCXX_dTD_LstEmpty (USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_phy_nbr)
+{
+    USBD_DRV_DATA  *p_drv_data;
+    CPU_INT32U      ix;
+    CPU_INT32U      entries;
+    CPU_BOOLEAN     ok;
+    CPU_INT08U      ep_addr;
+
+
+    p_drv_data = (USBD_DRV_DATA *)(p_drv->DataPtr);
+//    BSP_DCache_InvalidateRange(&(p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries), sizeof(CPU_REG32));
+    CPU_DCACHE_RANGE_INV(&(p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries), sizeof(CPU_REG32));
+    entries    =  p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries;
+    ok         =  DEF_OK;
+
+    for (ix = 0u; ix < entries; ix++) {
+        ok = USBD_LPCXX_dTD_LstRemove(p_drv, ep_phy_nbr);
+        if (ok == DEF_FAIL) {
+            break;
+        }
+    }
+
+    ep_addr = USBD_EP_PHY_TO_ADDR(ep_phy_nbr);
+
+    if (entries > 0u) {
+        USBD_DrvEP_Abort(p_drv, ep_addr);
+    }
+
+    return (ok);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      USBD_LPCXX_dTD_LstRemove()
+*
+* Description : Remove a dTD from the link list.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_phy_nbr  Endpoint physical number.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_DrvEP_Rx(),
+*               USBD_DrvEP_Abort(),
+*               USBD_DrvISR_Handler(),
+*               USBD_LPCXX_dTD_LstEmpty().
+*
+* Note(s)     : (1) The link list before the Remove function will look like:
+*
+*                           +-----+      +-----+          +-----+
+*     dTD_LstHeadPtr -----> | dTD |----->| dTD |---....-->| dTD |---->
+*                           +--|--+      +--|--+          +--|--+
+*                              |            |                |
+*                              V            V                V
+*                          +--------+    +--------+       +--------+
+*                          |  dTD   |    |  dTD   |       |  dTD   |
+*                          | Buffer |    | Buffer |       | Buffer |
+*                          +--------+    +--------+       +--------+
+*                              0             1               N
+*
+*               after the USBD_LPCXX_dTD_LstRemove() is called the link list will look like:
+*
+*                      |--------------------|
+*                      | |            |     V
+*                      | |  +-----+   |  +-----+          +-----+
+*     dTD_LstHeadPtr --| |  | dTD |---|->| dTD |---....-->| dTD |---->
+*                        |  +--|--+   |  +--|--+          +--|--+
+*                        |     |      |     |                |
+*                        |     V      |     V                V
+*                        | +--------+ |  +--------+       +--------+
+*                        | |  dTD   | |  |  dTD   |       |  dTD   |
+*                        | | Buffer | |  | Buffer |       | Buffer |
+*                        | +--------+ |  +--------+       +--------+
+*                        |     0'     |     0                N -1
+*                        | return to  |
+*                        | memory pool|
+*
+*                                    +-----------+   +----------+
+*                p_ep_data --------->| EP Buffer | = |   dTD    |  ; *p_ep_trans_size = size of the dTD buffer.
+*                                    |           |   |  Buffer  |
+*                                    +-----------+   +----------+
+*                                                          0'
+*
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_LPCXX_dTD_LstRemove (USBD_DRV    *p_drv,
+                                               CPU_INT08U   ep_phy_nbr)
+{
+    USBD_DRV_DATA       *p_drv_data;
+    USBD_LPCXX_dQH      *p_dqh;
+    USBD_LPCXX_dTD_EXT  *p_dtdlst_head;
+    LIB_ERR              err_lib;
+    CPU_SR_ALLOC();
+
+
+    p_drv_data = (USBD_DRV_DATA *)(p_drv->DataPtr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+
+#if 0 // zynq
+//    BSP_DCache_InvalidateRange(p_dqh, sizeof(USBD_LPCXX_dQH));  /* Invalidate (clear) the cached RAM block, so that the */
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_LPCXX_dQH));        /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+
+    Mem_PoolBlkFree(         &p_drv_data->dTD_MemPool,          /* Return the head dTD to the memory pool               */
+                    (void  *) p_dqh->dTD_LstHeadPtr,
+                             &err_lib);
+
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+#endif
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_LPCXX_dQH));        /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+    p_dtdlst_head = p_dqh->dTD_LstHeadPtr;
+
+    CPU_CRITICAL_ENTER();
+//    BSP_DCache_InvalidateRange(p_dqh, sizeof(USBD_LPCXX_dQH));  /* Invalidate (clear) the cached RAM block, so that the */
+//    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_LPCXX_dQH));        /* Invalidate (clear) the cached RAM block, so that the */
+//                                                                /* next CPU read will be from RAM again.                */
+    if (p_dqh->dTD_LstNbrEntries == 1u) {
+        p_dqh->dTD_LstHeadPtr    = (USBD_LPCXX_dTD_EXT *)USBD_LPCXX_dTD_dTD_NEXT_TERMINATE;
+        p_dqh->dTD_LstTailPtr    = (USBD_LPCXX_dTD_EXT *)USBD_LPCXX_dTD_dTD_NEXT_TERMINATE;
+        p_dqh->dTD_LstNbrEntries = 0u;
+    } else {
+        p_dqh->dTD_LstHeadPtr = (USBD_LPCXX_dTD_EXT *)p_dqh->dTD_LstHeadPtr->dTD_NextPtr;
+        p_dqh->dTD_LstNbrEntries--;
+    }
+#if (USBD_CFG_MAX_NBR_URB_EXTRA > 0u)
+    (p_drv_data->dTD_UsageTbl[ep_phy_nbr])--;
+#endif
+
+//    BSP_DCache_FlushRange(p_dqh, sizeof(USBD_LPCXX_dQH));       /* Write cached memory block back to RAM.               */
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_LPCXX_dQH));      /* Write cached memory block back to RAM.               */
+    CPU_CRITICAL_EXIT();
+
+    Mem_PoolBlkFree(       &p_drv_data->dTD_MemPool,            /* Return the head dTD to the memory pool               */
+                    (void *)p_dtdlst_head,
+                           &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       USBD_LPCXX_SetupProcess()
+*
+* Description : Process setup request.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_log_nbr  Endpoint logical number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DrvISR_Handler().
+*
+* Note(s)     : (1) NXP LPC313x/18xx/43xx USB device controller defines a register giving the IP version
+*                   of the controller. According to the IP version, a different processing must be done
+*                   for handling the setup packet. This is not required for the Xilinx Zynq-7000.
+*********************************************************************************************************
+*/
+
+static  void  USBD_LPCXX_SetupProcess (USBD_DRV    *p_drv,
+                                       CPU_INT08U   ep_log_nbr)
+{
+    USBD_DRV_DATA   *p_drv_data;
+    USBD_LPCXX_REG  *p_reg;
+    USBD_LPCXX_dQH  *p_dqh;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT32U       reg_to;
+    CPU_INT32U       setup_pkt[2u];
+    CPU_BOOLEAN      sutw_set;
+
+
+    ep_phy_nbr =  USBD_EP_ADDR_TO_PHY(USBD_EP_LOG_TO_ADDR_OUT(ep_log_nbr));
+    sutw_set   =  DEF_FALSE;
+    reg_to     =  USBD_LPCXX_REG_TO;
+    p_drv_data = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    p_reg      = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+
+//    BSP_DCache_InvalidateRange(p_dqh, sizeof(USBD_LPCXX_dQH));  /* Invalidate (clear) the cached RAM block, so that the */ // !!!! this invalidate cache is not nec
+//                                                                /* next CPU read will be from RAM again.                */
+
+    if (p_drv_data->Ctrlr == USBD_NXP_USBX_CTRLR_LPCXX) {       /* See Note #1.                                         */
+
+        if (p_drv_data->hw_rev < USBD_LPC313X_IP_VER_2_3) {     /* Pre 2.3 hardware setup handling                      */
+
+            setup_pkt[0u] = p_dqh->SetupBuf[0u];                /* (1) Duplicate contents of dQH.SetupBuf               */
+            setup_pkt[1u] = p_dqh->SetupBuf[1u];
+
+            p_reg->ENDPTSETUPSTAT = DEF_BIT32(ep_log_nbr);      /* (2) Write '1' to clear the bit in ENDPSETUPSTAT      */
+            USBD_EventSetup(         p_drv,
+                            (void *)&setup_pkt);
+            return;
+        }
+    }
+
+    p_reg->ENDPTSETUPSTAT = DEF_BIT32(ep_log_nbr);              /* (1) Write '1' to clear the bit in ENDPSETUPSTAT      */
+
+    while ((sutw_set == DEF_FALSE) &&
+           (reg_to   >  0u)) {
+
+        DEF_BIT_SET(p_reg->USBCMD, USBD_LPCXX_USBCMD_SUTW);     /* (2) Write '1' to setup Tripwire                      */
+
+//        BSP_DCache_InvalidateRange(p_dqh, sizeof(USBD_LPCXX_dQH));
+        CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_LPCXX_dQH));
+
+        setup_pkt[0u] = p_dqh->SetupBuf[0u];                    /* (3) Duplicate contents of dQH.SetupBuf               */
+        setup_pkt[1u] = p_dqh->SetupBuf[1u];
+                                                                /* (4) Read Setup TripWire. If the bi is set ....    */
+                                                                /*     ... continue otherwise go to (2)              */
+        sutw_set = DEF_BIT_IS_SET(p_reg->USBCMD, USBD_LPCXX_USBCMD_SUTW);
+        reg_to--;
+    }
+    if (reg_to == 0u) {
+        return;
+    }
+
+    reg_to = USBD_LPCXX_REG_TO;
+
+    DEF_BIT_CLR(p_reg->USBCMD, USBD_LPCXX_USBCMD_SUTW);         /* (5) Write '0' to clear setup Tripwire                */
+
+    while ((DEF_BIT_IS_SET(p_reg->ENDPTSETUPSTAT, DEF_BIT32(ep_log_nbr)) == DEF_YES) &&
+           (reg_to > 0u)) {
+        reg_to--;
+    }
+
+    if (reg_to == 0u) {
+        return;
+    }
+#if 0 // TODO (Zynq) to verify if Zynq really needs it
+    USBD_Zynq_dTD_LstEmpty(p_drv, ep_phy_nbr);
+#endif
+    USBD_EventSetup(         p_drv,
+                    (void *)&setup_pkt);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_LPCXX_SoftRst()
+*
+* Description : Perform a soft reset :
+*                   (1) Initializes the dQH data structure for all endpoints.
+*                   (2) Creates dTD link list for endpoint 0
+*                   (3) Initializes the dTD data structure for all endpoints.
+*                   (4) Disable all endpoints except endpoint 0
+*                   (5) Clear all setup token semaphores by reading ENDPTSETUPSTAT register and writing
+*                       the same value back to the ENDPTSETUPSTAT register.
+*                   (6) Clear all endpoint complete status bits by reading the ENDPTCOMPLETE register
+*                       and writing the same value back to the ENDPTCOMPLETE register.
+*                   (7) Cancel all prime status by waiting until all bits in the ENDPRIME are 0 and the writing
+*                       0xFFFFFFFF to ENDPTFLUSH.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DrvStart(),
+*               USBD_DrvISR_Handler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_LPCXX_SoftRst (USBD_DRV  *p_drv)
+{
+    USBD_DRV_DATA   *p_drv_data;
+    USBD_LPCXX_REG  *p_reg;
+    CPU_INT32U       reg_to;
+    CPU_INT08U       ep_phy_nbr;
+    CPU_INT08U       ep_phy_nbr_max;
+    CPU_INT08U       ep_log_nbr;
+
+
+    p_reg          = (USBD_LPCXX_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data     = (USBD_DRV_DATA  *)(p_drv->DataPtr);
+    ep_phy_nbr_max =  USBD_EP_MaxPhyNbrGet(p_drv->DevNbr);
+
+    if (ep_phy_nbr_max != USBD_EP_PHY_NONE) {
+        for (ep_phy_nbr = 0u; ep_phy_nbr < ep_phy_nbr_max; ep_phy_nbr++) {
+
+            USBD_LPCXX_dTD_LstEmpty(p_drv, ep_phy_nbr);
+
+            p_drv_data->dQH_Tbl[ep_phy_nbr].EpCap                = 0u;
+            p_drv_data->dQH_Tbl[ep_phy_nbr].OverArea.dTD_NextPtr = USBD_LPCXX_dTD_dTD_NEXT_TERMINATE;
+
+            Mem_Clr((void *)&p_drv_data->dQH_Tbl[ep_phy_nbr].OverArea.Token,
+                           (sizeof(USBD_LPCXX_dQH) - 2u));
+
+//            BSP_DCache_FlushRange(&(p_drv_data->dQH_Tbl[ep_phy_nbr]), sizeof(USBD_LPCXX_dQH));
+            CPU_DCACHE_RANGE_FLUSH(&(p_drv_data->dQH_Tbl[ep_phy_nbr]), sizeof(USBD_LPCXX_dQH));
+
+            ep_log_nbr = USBD_EP_PHY_TO_LOG(ep_phy_nbr);
+            if ((ep_log_nbr != 0u) &&
+                (DEF_BIT_IS_SET(p_reg->USBCMD, USBD_LPCXX_USBCMD_RUN) == DEF_YES)) {
+                p_reg->ENDPTCTRLx[ep_log_nbr] = USBD_LPCXX_ENDPTCTRL_TX_TOGGLE_RST |
+                                                USBD_LPCXX_ENDPTCTRL_RX_TOGGLE_RST;
+            }
+        }
+    }
+
+    reg_to = USBD_LPCXX_REG_TO;
+    while ((p_reg->ENDPTPRIME != DEF_BIT_NONE) &&
+           (reg_to            >  0u)) {
+        reg_to--;
+    }
+
+    p_reg->ENDPTFLUSH = USBD_LPCXX_ENDPTxxxx_TX_MASK |
+                        USBD_LPCXX_ENDPTxxxx_RX_MASK;
+
+    reg_to = USBD_LPCXX_REG_TO;
+    while ((p_reg->ENDPTSTATUS != DEF_BIT_NONE) &&
+           (reg_to             >  0u)) {
+        p_reg->ENDPTFLUSH = USBD_LPCXX_ENDPTxxxx_TX_MASK |
+                            USBD_LPCXX_ENDPTxxxx_RX_MASK;
+        reg_to--;
+    }
+
+    if (DEF_BIT_IS_SET(p_reg->USBCMD,  USBD_LPCXX_USBCMD_RUN) == DEF_YES) {
+        p_reg->DEV_ADDR = DEF_BIT_NONE;
+    }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_lpcxx_usbx.h b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_lpcxx_usbx.h
new file mode 100644
index 0000000..055a77e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_lpcxx_usbx.h
@@ -0,0 +1,71 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2014; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          USB DEVICE DRIVER
+*
+*                                     NXP LPC313X/LPC18XX/LPC43XX
+*
+* File          : usbd_drv_lpcxx_usbx.h
+* Version       : V4.04.01.01
+* Programmer(s) : FF
+*                 OD
+*********************************************************************************************************
+* Note(s)       : (1) You can find specific information about this driver at:
+*                     https://doc.micrium.com/display/USBDDRV/LPCxx_USBx
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This USB device driver function header file is protected from multiple pre-processor
+*               inclusion through use of the USB device driver module present pre-processor macro
+*               definition.
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_DRV_LPCXX_USBX_MODULE_PRESENT                        /* See Note #1.                                         */
+#define  USBD_DRV_LPCXX_USBX_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                          USB DEVICE DRIVER
+*********************************************************************************************************
+*/
+
+extern  USBD_DRV_API  USBD_DrvAPI_LPCXX_USBX;
+extern  USBD_DRV_API  USBD_DrvAPI_Zynq;
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_zynq.c b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_zynq.c
new file mode 100644
index 0000000..7a85187
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_zynq.c
@@ -0,0 +1,2448 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                         USB DEVICE DRIVER
+*
+*                                         XILINX  ZYNQ-7000
+*
+* File          : usbd_drv_zynq.c
+* Version       : V4.04.00.00
+* Programmer(s) : FGK
+*                 FT
+*                 JPB
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define    MICRIUM_SOURCE
+#include  
+#include  
+#include  "usbd_drv_zynq.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+                                                                /* ---------- USB DEVICE REGISTER BIT DEFINES --------- */
+#define  USBD_ZYNQ_DEV_ADDR_USBADDRA             DEF_BIT_24     /* Device Address Advance                               */
+                                                                /* Device Address Mask                                  */
+#define  USBD_ZYNQ_DEV_ADDR_USBADDR_MASK         DEF_BIT_FIELD_32(7, 25)
+
+#define  USBD_ZYNQ_PORTSC1_HSP                   DEF_BIT_09     /* High-Speed port                                      */
+#define  USBD_ZYNQ_PORTSC1_FPR                   DEF_BIT_06     /* Force port resume.                                   */
+
+
+                                                                /* ------ USB INTERRUPT AND STATUS REGISTER BITS ------ */
+#define  USBD_ZYNQ_USBSTS_NAKI                   DEF_BIT_16     /* NAK Interrupt Bit.                                   */
+#define  USBD_ZYNQ_USBSTS_AS                     DEF_BIT_15     /* Asynchronous Schedule Status.                        */
+#define  USBD_ZYNQ_USBSTS_PS                     DEF_BIT_14     /* Periodic Schedule Status.                            */
+#define  USBD_ZYNQ_USBSTS_RCL                    DEF_BIT_13     /* Reclamation.                                         */
+#define  USBD_ZYNQ_USBSTS_HCH                    DEF_BIT_12     /* HCHaIted.                                            */
+#define  USBD_ZYNQ_USBSTS_ULPI                   DEF_BIT_10     /* ULPI Interrupt.                                      */
+#define  USBD_ZYNQ_USBSTS_SLI                    DEF_BIT_08     /* DCSuspend.                                           */
+#define  USBD_ZYNQ_USBSTS_SRI                    DEF_BIT_07     /* SOF Received.                                        */
+#define  USBD_ZYNQ_USBSTS_URI                    DEF_BIT_06     /* USB Reset Received.                                  */
+#define  USBD_ZYNQ_USBSTS_AAI                    DEF_BIT_05     /* Interrupt on Async Advance.                          */
+#define  USBD_ZYNQ_USBSTS_SEI                    DEF_BIT_04     /* System Error.                                        */
+#define  USBD_ZYNQ_USBSTS_FRI                    DEF_BIT_03     /* Frame List Rollover.                                 */
+#define  USBD_ZYNQ_USBSTS_PCI                    DEF_BIT_02     /* Port Change Detect.                                  */
+#define  USBD_ZYNQ_USBSTS_UEI                    DEF_BIT_01     /* USB Error Interrupt.                                 */
+#define  USBD_ZYNQ_USBSTS_UI                     DEF_BIT_00     /* USB Interrupt.                                       */
+
+                                                                /* ------ USB INTERRUPT REGISTER (USBINTR) BITS ------- */
+#define  USBD_ZYNQ_USBSTS_NAKE                   DEF_BIT_16     /* NAK Interrupt enable                                 */
+#define  USBD_ZYNQ_USBSTS_ULPIE                  DEF_BIT_10     /* ULPI enable                                          */
+#define  USBD_ZYNQ_USBSTS_SLE                    DEF_BIT_08     /* Sleep enable                                         */
+#define  USBD_ZYNQ_USBSTS_SRE                    DEF_BIT_07     /* SOF received enable                                  */
+#define  USBD_ZYNQ_USBSTS_URE                    DEF_BIT_06     /* USB reset enable                                     */
+#define  USBD_ZYNQ_USBSTS_AAE                    DEF_BIT_05     /* Interrupt on Async Advance enable                    */
+#define  USBD_ZYNQ_USBSTS_SEE                    DEF_BIT_04     /* System Error enable                                  */
+#define  USBD_ZYNQ_USBSTS_FRE                    DEF_BIT_03     /* Frame List Rollover enable                           */
+#define  USBD_ZYNQ_USBSTS_PCE                    DEF_BIT_02     /* Port Change Detect enable                            */
+#define  USBD_ZYNQ_USBSTS_UEE                    DEF_BIT_01     /* USB Error Interrupt enable                           */
+#define  USBD_ZYNQ_USBSTS_UE                     DEF_BIT_00     /* USB Interrupt enable                                 */
+
+                                                                /* ------------ USB INTERRUPT ENABLE BITS ------------- */
+#define  USBD_ZYNQ_USB_INT_NAK                   DEF_BIT_16     /* NAK Interrupt enable                                 */
+#define  USBD_ZYNQ_USB_INT_ULP                   DEF_BIT_10     /* ULPI enable                                          */
+#define  USBD_ZYNQ_USB_INT_SL                    DEF_BIT_08     /* Sleep enable                                         */
+#define  USBD_ZYNQ_USB_INT_SR                    DEF_BIT_07     /* SOF received enable                                  */
+#define  USBD_ZYNQ_USB_INT_UR                    DEF_BIT_06     /* USB reset enable                                     */
+#define  USBD_ZYNQ_USB_INT_AA                    DEF_BIT_05     /* Interrupt on Async Advance enable                    */
+#define  USBD_ZYNQ_USB_INT_SE                    DEF_BIT_04     /* System Error enable                                  */
+#define  USBD_ZYNQ_USB_INT_FR                    DEF_BIT_03     /* Frame List Rollover enable                           */
+#define  USBD_ZYNQ_USB_INT_PC                    DEF_BIT_02     /* Port Change Detect enable                            */
+#define  USBD_ZYNQ_USB_INT_UE                    DEF_BIT_01     /* USB Error Interrupt enable                           */
+#define  USBD_ZYNQ_USB_INT_U                     DEF_BIT_00     /* USB Interrupt enable                                 */
+
+#define  USBD_ZYNQ_USB_INT_BUS                  (USBD_ZYNQ_USB_INT_PC | \
+                                                 USBD_ZYNQ_USB_INT_UR | \
+                                                 USBD_ZYNQ_USB_INT_SL)
+
+
+                                                                /* --------- USB COMMAND REGISTER BIT DEFINES --------- */
+                                                                /* Interrupt Threshold Control and max rates            */
+#define  USBD_ZYNQ_USBCMD_ITC_MASK               DEF_BIT_FIELD_32(8, 16)
+#define  USBD_ZYNQ_USBCMD_ITC_MICRO_FRAME_1      DEF_BIT_MASK(0x01,  16)
+#define  USBD_ZYNQ_USBCMD_ITC_MICRO_FRAME_2      DEF_BIT_MASK(0x02,  16)
+#define  USBD_ZYNQ_USBCMD_ITC_MICRO_FRAME_3      DEF_BIT_MASK(0x04,  16)
+#define  USBD_ZYNQ_USBCMD_ITC_MICRO_FRAME_8      DEF_BIT_MASK(0x08,  16)
+#define  USBD_ZYNQ_USBCMD_ITC_MICRO_FRAME_16     DEF_BIT_MASK(0x10,  16)
+#define  USBD_ZYNQ_USBCMD_ITC_MICRO_FRAME_32     DEF_BIT_MASK(0x20,  16)
+#define  USBD_ZYNQ_USBCMD_ITC_MICRO_FRAME_40     DEF_BIT_MASK(0x40,  16)
+
+                                                                /* Frame List size                                      */
+#define  USBD_ZYNQ_USBCMD_FS_MASK                DEF_BIT_FIELD(2, 14)
+#define  USBD_ZYNQ_USBCMD_ATDTW                  DEF_BIT_14     /* Add dTD TripWire                                     */
+
+#define  USBD_ZYNQ_USBCMD_SUTW                   DEF_BIT_13     /* Setup Tripwire                                       */
+#define  USBD_ZYNQ_USBCMD_ASPE                   DEF_BIT_11     /* Asynchronous schedule park mode enable               */
+                                                                /* Asynchronous schedule park mode count                */
+#define  USBD_ZYNQ_USBCMD_ASP_MASK               DEF_BIT_FIELD(2, 8)
+#define  USBD_ZYNQ_USBCMD_LR                     DEF_BIT_07     /* Light Host/Device controller reset                   */
+#define  USBD_ZYNQ_USBCMD_IAA                    DEF_BIT_06     /* Interrupt on Async Advance Doorbell                  */
+#define  USBD_ZYNQ_USBCMD_ASE                    DEF_BIT_05     /* Asynchronous schedule enable                         */
+#define  USBD_ZYNQ_USBCMD_PSE                    DEF_BIT_04     /* Periodic schedule enable                             */
+
+                                                                /* Frame List Size mask                                 */
+#define  USBD_ZYNQ_USBCMD_FS_SIZE_MASK           DEF_BIT_FIELD(3, 2)
+#define  USBD_ZYNQ_USBCMD_RST                    DEF_BIT_01     /* Controller Reset                                     */
+#define  USBD_ZYNQ_USBCMD_RUN                    DEF_BIT_00     /* Run/Stop                                             */
+
+                                                                /* ------ USB DEVICE ADDRESS REGISTER BIT DEFINES ----- */
+                                                                /* Device Address mask                                  */
+#define  USBD_ZYNQ_DEV_ADDR_USBADR_MASK          DEF_BIT_FIELD(6, 25)
+#define  USBD_ZYNQ_DEV_ADDR_USBADRA              DEF_BIT_24     /* Device Address Advance.                              */
+
+                                                                /* ---- ENDPOINT LIST ADDRESS REGISTER BIT DEFINES ---- */
+#define  USBD_ZYNQ_EP_LIST_ADDR_MASK             DEF_BIT_FIELD(21, 11)
+
+                                                                /* ----------- USB MODE REGISTER BIT DEFINES ---------- */
+#define  USBD_ZYNQ_USBMODE_SDIS                  DEF_BIT_04     /* Stream Disable Mode                                  */
+#define  USBD_ZYNQ_USBMODE_SLOM                  DEF_BIT_03     /* Setup lockout mode                                   */
+#define  USBD_ZYNQ_USBMODE_ES                    DEF_BIT_02     /* Endianness selection                                 */
+                                                                /* Controller Mode mask                                 */
+
+#define  USBD_ZYNQ_USBMODE_CM_MASK               DEF_BIT_FILED(2,0)
+                                                                /* Idle   mode                                          */
+#define  USBD_ZYNQ_USBMODE_CM_IDLE               DEF_BIT_NONE
+#define  USBD_ZYNQ_USBMODE_CM_DEV                DEF_BIT_01     /* Device mode                                          */
+                                                                /* Host   mode                                          */
+#define  USBD_ZYNQ_USBMODE_CM_HOST              (DEF_BIT_01 | DEF_BIT_02)
+
+                                                                /* ------- ENDPOINT CONTROL 1-11 REGISTER BITS -------- */
+#define  USBD_ZYNQ_ENDPTCTRL_TX_CFG_MASK         DEF_BIT_FIELD_32(8, 16)
+#define  USBD_ZYNQ_ENDPTCTRL_TX_EN               DEF_BIT_23     /* Tx endpoint enable                                   */
+#define  USBD_ZYNQ_ENDPTCTRL_TX_TOGGLE_RST       DEF_BIT_22     /* Data Toggle reset                                    */
+#define  USBD_ZYNQ_ENDPTCTRL_TX_TOGGLE_DIS       DEF_BIT_21     /* Data Toggle inhibit                                  */
+                                                                /* Tx endpoint type mask                                */
+#define  USBD_ZYNQ_ENDPTCTRL_TX_TYPE_MASK        DEF_BIT_FIELD_32(2, 18)
+                                                                /* Tx endpoint type control                             */
+#define  USBD_ZYNQ_ENDPTCTRL_TX_TYPE_CTRL        DEF_BIT_NONE
+#define  USBD_ZYNQ_ENDPTCTRL_TX_TYPE_ISOC        DEF_BIT_18     /* Tx endpoint type isochronous                         */
+#define  USBD_ZYNQ_ENDPTCTRL_TX_TYPE_BULK        DEF_BIT_19     /* Tx endpoint type bulk                                */
+                                                                /* Tx endpoint type interrupt                           */
+#define  USBD_ZYNQ_ENDPTCTRL_TX_TYPE_INT        (DEF_BIT_18 | DEF_BIT_19)
+#define  USBD_ZYNQ_ENDPTCTRL_TX_DATA_SRC         DEF_BIT_17     /* Tx endpoint data source                              */
+#define  USBD_ZYNQ_ENDPTCTRL_TX_STALL            DEF_BIT_16     /* Tx endpoint stall                                    */
+
+#define  USBD_ZYNQ_ENDPTCTRL_RX_CFG_MASK         DEF_BIT_FIELD_32(8, 0)
+#define  USBD_ZYNQ_ENDPTCTRL_RX_EN               DEF_BIT_07     /* Rx endpoint enable                                   */
+#define  USBD_ZYNQ_ENDPTCTRL_RX_TOGGLE_RST       DEF_BIT_06     /* Rx Data Toggle reset                                 */
+#define  USBD_ZYNQ_ENDPTCTRL_RX_TOGGLE_DIS       DEF_BIT_05     /* Rx Data Toggle inhibit                               */
+                                                                /* Rx endpoint type mask                                */
+#define  USBD_ZYNQ_ENDPTCTRL_RX_TYPE_MASK        DEF_BIT_FIELD_32(2, 2)
+                                                                /* Tx endpoint type control                             */
+#define  USBD_ZYNQ_ENDPTCTRL_RX_TYPE_CTRL        DEF_BIT_NONE
+#define  USBD_ZYNQ_ENDPTCTRL_RX_TYPE_ISOC        DEF_BIT_02     /* Tx endpoint type isochronous                         */
+#define  USBD_ZYNQ_ENDPTCTRL_RX_TYPE_BULK        DEF_BIT_03     /* Tx endpoint type bulk                                */
+                                                                /* Tx endpoint type interrupt                          */
+#define  USBD_ZYNQ_ENDPTCTRL_RX_TYPE_INT        (DEF_BIT_02 | DEF_BIT_03)
+#define  USBD_ZYNQ_ENDPTCTRL_RX_DATA_SRC         DEF_BIT_01     /* Tx endpoint data source                              */
+#define  USBD_ZYNQ_ENDPTCTRL_RX_STALL            DEF_BIT_00     /* Tx endpoint stall                                    */
+
+#define  USBD_ZYNQ_ENDPTCOMPLETE_TX_MASK         DEF_BIT_FIELD_32(4, 16)
+#define  USBD_ZYNQ_ENDPTCOMPLETE_RX_MASK         DEF_BIT_FIELD_32(4, 0)
+
+#define  USBD_ZYNQ_ENDPTxxxx_TX_MASK             DEF_BIT_FIELD_32(4, 16)
+#define  USBD_ZYNQ_ENDPTxxxx_RX_MASK             DEF_BIT_FIELD_32(4,  0)
+
+                                                                /* -- ENDPOINT QUEUE HEAD EP CAPABILITIES BIT DEFINES - */
+                                                                /* Number of packets executed per transaction.          */
+#define  USBD_ZYNQ_dQH_EP_CAP_MULT_MASK          DEF_BIT_FIELD_32(2, 30)
+#define  USBD_ZYNQ_dQH_EP_CAP_MULT_N             DEF_BIT_MASK(0, 30)
+#define  USBD_ZYNQ_dQH_EP_CAP_MULT_1             DEF_BIT_MASK(1, 30)
+#define  USBD_ZYNQ_dQH_EP_CAP_MULT_2             DEF_BIT_MASK(2, 30)
+#define  USBD_ZYNQ_dQH_EP_CAP_MULT_3             DEF_BIT_MASK(3, 30)
+
+#define  USBD_ZYNQ_dQH_EP_CAP_ZLTS               DEF_BIT_29     /* Zero Length Termination Select                       */
+                                                                /* EP maximum packet length mask (1024 max)             */
+#define  USBD_ZYNQ_dQH_EP_CAP_MAX_LEN_MASK       DEF_BIT_FIELD_32(11, 16)
+#define  USBD_ZYNQ_dQH_EP_CAP_IOS                DEF_BIT_15     /* Interrupt on setup                                   */
+
+                                                                /* ----- ENDPOINT TRANSFER DESCRIPTOR BIT DEFINES ----- */
+
+                                                                /* ------------ dTD_NEXT FIELD  BIT DEFINES ----------- */
+                                                                /* Next transfer element pointer mask                   */
+#define  USBD_ZYNQ_dTD_dTD_NEXT_MASK             DEF_BIT_FIELD_32(27, 5)
+#define  USBD_ZYNQ_dTD_dTD_NEXT_TERMINATE        DEF_BIT_00     /* End of transfer list indicator                       */
+
+                                                                /* -------------- TOKEN FIELD BIT DEFINES ------------- */
+#define  USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTES_MASK    DEF_BIT_FIELD_32(15, 16)
+                                                                /* Interrupt on complete                                */
+#define  USBD_ZYNQ_dTD_TOKEN_IOC                 DEF_BIT_15
+                                                                /* Multiplier override mask                             */
+#define  USBD_ZYNQ_dTD_TOKEN_MUL_OVER_MASK       DEF_BIT_FIELD_32(2, 10)
+                                                                /* Status mask                                          */
+                                                                /* Maximum number of bytes                              */
+#define  USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTE_MAX      0x00004000
+                                                                /* Page size 4K                                         */
+#define  USBD_ZYNQ_dTD_TOKEN_PAGE_SIZE           0x00001000
+
+#define  USBD_ZYNQ_dTD_TOKEN_STATUS_MASK         DEF_BIT_FIELD_32(8, 0)
+#define  USBD_ZYNQ_dTD_TOKEN_STATUS_ACTIVE       DEF_BIT_07
+#define  USBD_ZYNQ_dTD_TOKEN_STATUS_HALTED       DEF_BIT_06
+#define  USBD_ZYNQ_dTD_TOKEN_STATUS_DATA_ERR     DEF_BIT_05
+#define  USBD_ZYNQ_dTD_TOKEN_STATUS_TRAN_ERR     DEF_BIT_03
+
+#define  USBD_ZYNQ_dTD_TOKEN_STATUS_ANY         (USBD_ZYNQ_dTD_TOKEN_STATUS_ACTIVE   | \
+                                                 USBD_ZYNQ_dTD_TOKEN_STATUS_HALTED   | \
+                                                 USBD_ZYNQ_dTD_TOKEN_STATUS_DATA_ERR | \
+                                                 USBD_ZYNQ_dTD_TOKEN_STATUS_TRAN_ERR)
+
+#define  USBD_ZYNQ_dTD_BUF_PTR_MASK              DEF_BIT_FIELD(20, 12)
+
+
+                                                                /* ------------- USB CONTROLLER CONSTRAINS ------------ */
+#define  USBD_ZYNQ_USB_REG_BASE_ADDR              0xE0002000    /* USB0 Controller Base Address (system.xml:ps7_usb_0). */
+
+#define  USBD_ZYNQ_REG_TO                         0x0000FFFF
+#define  USBD_ZYNQ_MAX_RETRIES                           100
+#define  USBD_ZYNQ_dTD_LST_INSERT_NBR_TRIES_MAX          100
+#define  USBD_ZYNQ_EP_NBR_MAX                             12
+
+#define  USBD_ZYNQ_ALIGN_OCTECTS_dQH             ( 2u * (1024u))
+#define  USBD_ZYNQ_ALIGN_OCTECTS_dTD             (64u * (   1u))
+#define  USBD_ZYNQ_ALIGN_OCTECTS_BUF             ( 1u * (   1u))
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            LOCAL MACROS
+*********************************************************************************************************
+*/
+
+
+#define  USBD_ZYNQ_EP_GET_LOG_NBR(ep_addr)                   ((ep_addr) & 0x0F)
+
+#define  USBD_ZYNQ_EP_OUT_LOG_TO_PHY_NBR(ep_log_nbr)         ((ep_log_nbr) << 1)
+#define  USBD_ZYNQ_EP_IN_LOG_TO_PHY_NBR(ep_log_nbr)          (USBD_ZYNQ_EP_OUT_LOG_TO_PHY_NBR(ep_log_nbr) + 1)
+
+#define  USBD_ZYNQ_EP_PHY_TO_LOG_NBR(ep_phy_nbr)             ((ep_phy_nbr) >> 1)
+
+#define  USBD_ZYNQ_ENDPTxxx_GET_TX_BITS(ep_log_nbr)          (DEF_BIT32(ep_log_nbr) << 16)
+#define  USBD_ZYNQ_ENDPTxxx_GET_RX_BITS(ep_log_nbr)           DEF_BIT32(ep_log_nbr)
+
+#define  USBD_ZYNQ_ENDPTxxx_GET_TX_NBR(ep_reg)               (((ep_reg) & USBD_ZYNQ_ENDPTxxxx_TX_MASK) >> 16)
+#define  USBD_ZYNQ_ENDPTxxx_GET_RX_NBR(ep_reg)                ((ep_reg) & USBD_ZYNQ_ENDPTxxxx_RX_MASK)
+
+
+#define  USBD_ZYNQ_ENDPTxxx_BIT_WR(ep_reg, ep_phy_nbr)       {    if (USBD_ZYNQ_EP_PHY_NBR_IS_OUT(ep_phy_nbr)) {                                                               \
+                                                                       (ep_reg) = USBD_ZYNQ_ENDPTxxx_GET_RX_BITS(USBD_ZYNQ_EP_PHY_TO_LOG_NBR(ep_phy_nbr));                     \
+                                                                  } else {                                                                                                     \
+                                                                       (ep_reg) = USBD_ZYNQ_ENDPTxxx_GET_TX_BITS(USBD_ZYNQ_EP_PHY_TO_LOG_NBR(ep_phy_nbr));                     \
+                                                                  }                                                                                                            \
+                                                             }
+
+#define  USBD_ZYNQ_ENDPTxxx_IS_BIT_SET(ep_reg, ep_phy_nbr)   (USBD_ZYNQ_EP_PHY_NBR_IS_OUT(ep_phy_nbr) ? (DEF_BIT_IS_SET(USBD_ZYNQ_ENDPTxxx_GET_RX_NBR(ep_reg),                 \
+                                                                                                                       (DEF_BIT32(USBD_ZYNQ_EP_PHY_TO_LOG_NBR(ep_phy_nbr)))))  \
+                                                                                                      : (DEF_BIT_IS_SET(USBD_ZYNQ_ENDPTxxx_GET_TX_NBR(ep_reg),                 \
+                                                                                                                       (DEF_BIT32(USBD_ZYNQ_EP_PHY_TO_LOG_NBR(ep_phy_nbr))))))
+
+#define  USBD_ZYNQ_EP_PHY_NBR_IS_OUT(ep_phy_nbr)              DEF_BIT_IS_CLR((ep_phy_nbr), DEF_BIT_00)
+#define  USBD_ZYNQ_EP_PHY_NBR_IS_IN(ep_phy_nbr)               DEF_BIT_IS_SET((ep_phy_nbr), DEF_BIT_00)
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*
+* Note(s) : (1) The USB device controller in the Zynq-7000 includes a simple descriptor model to enable the
+*               controller to quickly respond to host requests.
+*               Each of the 12 endpoints has two device Queue Heads (dQH); one for IN and the other for OUT
+*               transfer types. There are a total of 24 device dQH's.
+*               An endpoint data transfer is defined with one dQH and one or more linked list of device
+*               Transfer Descriptors (dTD).
+*           (2) The endpoint's device Queue Head (dQH) is where all transfers are managed. The dQH is a 48 byte
+*               data structure, but must be aligned on 64-byte boundaries. The remaining 16 bytes will be used
+*               to store the device Transfer Descriptor (dTD) link list information.
+*
+*                                          0            1                 N
+*        --     +-----------+  Current  +-----+      +-----+           +-----+
+*         |     |           |---------->| dTD |----->| dTD |--- .... ->| dTD |----|
+*      48 Bytes |   dQH     |           +-----+      +-----+           +-----+
+*         |     |           |      Next    |             |                |
+*         |     |           |--------------|-------------|                |
+*        --     +-----------+              |                              |
+*         |     |  Head     |--------------|                              |
+*         |     +-----------+                                             |
+*         |     |  Tail     |---------------------------------------------|
+*      16 Bytes +-----------+
+*         |     | #Entries  |-----> Number of elements of the dTD's link list
+*         |     |-----------|
+*         |     | #dTD Rdy  |-----> Number of completed dTDs
+*        --     ------------+
+*
+*
+*           (3) The size of the dTD is 28 bytes. The dTD must be be aligned to 8-DWord boundaries.
+*               the remaining 36 bytes are used to store extra information.
+*
+*        -    --   +---------------+      +------+               +-----+
+*        |     |   |   dTD_Next    |----->| dTD  |----- ... ---->| dTD |
+*        |     |   +---------------+      +------+               +-----+
+*        |    dTD  |     Token     |
+*        |     |   +---------------+         +---------+
+*     dTD_EXT  |   | BufPtrs[0..4] |----| |->|xxxxxxxxx| 0       - BufPtr[0]   : Always points to the first byte in the data
+*        |    --   +---------------+    | |  +---------+                         buffer that is available
+*        |         |   BufAddr     |----|-|  |xxxxxxxxx| 1
+*        -         +---------------+    |    +---------+
+*                                       |    |xxxxxxxxx| 2        - BufAddr    : Always points to the beginning of the data buffer.
+*                                       |    +---------+
+*                                       |    |    .    |            +--------+
+*                                       |    |    .    |            |xxxxxxxx| = Used block
+*                                       |    |    .    |            +--------+
+*                                       |    +---------+
+*                                       |--->|         | n - 1      +--------+
+*                                            +---------+            |        | = Free block
+*                                            |         |  n         +--------+
+*                                            +---------+
+*
+*           (4) For more information see the Xilinx Zynq-7000 Technical Reference Manual
+*               (ug585-Zynq-7000-TRM.pdf)
+*********************************************************************************************************
+*/
+
+typedef  struct usbd_zynq_usb_reg {
+                                                                /* ------ IDENTIFICATION CONFIGURATION CONSTANTS ------ */
+    CPU_REG32          ID;                                      /* R   0x000 Identification register                    */
+    CPU_REG32          HWGENERAL;                               /* R   0x004 General hardware parameters                */
+    CPU_REG32          HWHOST;                                  /* R   0x008 Host hardware parameters                   */
+    CPU_REG32          HWDEVICE;                                /* R   0x00C Device hardware parameters                 */
+    CPU_REG32          HWTXBUF;                                 /* R   0x010 TX Buffer hardware parameters              */
+    CPU_REG32          HWRXBUF;                                 /* R   0x014 RX Buffer hardware parameters              */
+    CPU_REG32          RESERVED0[26];                           /* Reserved bits.                                       */
+                                                                /* ------------ GENERAL PURPOSE TIMERS ---------------  */
+    CPU_REG32          GPTIMER0LD;                              /* R/W 0x080 General-purpose timer 0 load value         */
+    CPU_REG32          GPTIMER0CTRL;                            /* R/W 0x084 General-purpose timer 0 control            */
+    CPU_REG32          GPTIMER1LD;                              /* R/W 0x088 General-purpose timer 1 load value         */
+    CPU_REG32          GPTIMER1CTRL;                            /* R/W 0x08C General-purpose timer 1 control            */
+                                                                /* --------------- AXI INTERCONNECT ------------------- */
+    CPU_REG32          SBUSCFG;                                 /* R/W 0x090 DMA Master AHB burst mode                  */
+    CPU_REG32          RESERVED1[27];                           /* Reserved bits.                                       */
+                                                                /* -------- CONTROLLER CAPABILITIES CONSTANTS --------- */
+    CPU_REG16          CAPLENGTH;                               /* R   0x100 Capability register length                 */
+    CPU_REG16          HCIVERSION;                              /* R   0x102 Host interface version number              */
+    CPU_REG32          HCSPARAMS;                               /* R   0x104 Host controller structural parameters      */
+    CPU_REG32          HCCPARAMS;                               /* R   0x108 Host controller capability parameters      */
+    CPU_REG32          RESERVED2[5];                            /* Reserved bits.                                       */
+    CPU_REG32          DCIVERSION;                              /* R   0x120 Device controller capability parameters    */
+    CPU_REG32          DCCPARAMS;                               /* R   0x124 Device controller capability parameters    */
+    CPU_REG32          RESERVED3[6];                            /* Reserved bits.                                       */
+                                                                /* -------- INTERRUPTS AND ENDPOINT POINTERS ---------- */
+    CPU_REG32          USBCMD;                                  /* R/W 0x140 USB command                                */
+    CPU_REG32          USBSTS;                                  /* R/W 0x144 USB status                                 */
+    CPU_REG32          USBINTR;                                 /* R/W 0x148 USB interrupt enable                       */
+    CPU_REG32          FRINDEX;                                 /* R/W 0x14C USB frame index                            */
+    CPU_REG32          RESERVED4;                               /* Reserved bits.                                       */
+    CPU_REG32          DEV_ADDR;                                /* R/W 0x154 USB Device Address                         */
+    CPU_REG32          EP_LST_ADDR;                             /* R/W 0x158 Next asynchronous list addr/addr of  ...   */
+                                                                /*           ... of endpoint list in memory             */
+    CPU_REG32          TTCTRL;                                  /* R/W 0x15C Asynchronous buffer stat for embedded TT   */
+                                                                /* ------------------ MISCELLANEOUS ------------------- */
+    CPU_REG32          BURSTSIZE;                               /* R/W 0x160 Programmable burst size                    */
+    CPU_REG32          TXFILLTUNING;                            /* R/W 0x164 Host transmit pre-buffer packet tuning     */
+    CPU_REG32          TXTTFILLTUNING;                          /* R/W 0x168 Host TT tx pre-buffer packet tuning        */
+    CPU_REG32          IC_USB;                                  /* R/W 0x16C Low and fast speed control                 */
+    CPU_REG32          ULPI_VIEWPORT;                           /* R/W 0x170 ULPI viewport.                             */
+    CPU_REG32          RESERVED5;                               /* Reserved bits.                                       */
+                                                                /* ---------------- ENDPOINT CONTROL ------------------ */
+    CPU_REG32          ENDPTNAK;                                /* R/W 0x178 Endpoint NAK                               */
+    CPU_REG32          ENDPTNAKEN;                              /* R/W 0x17C Endpoint NAK Enable                        */
+    CPU_REG32          CONFIGFLAG;                              /* R   0x180 Configured flag register                   */
+    CPU_REG32          PORTSC1;                                 /* R/W 0x184 Port status/control 1                      */
+    CPU_REG32          RESERVED6[7];                            /* Reserved bits.                                       */
+                                                                /* ------------------ MODE CONTROL -------------------- */
+    CPU_REG32          OTGSC;                                   /* R/W 0x1A4 OTG status and control                     */
+    CPU_REG32          USBMODE;                                 /* R/W 0x1A8 USB device mode                            */
+                                                                /* -------- ENDPOINT CONFIGURATION AND CONTROL -------- */
+    CPU_REG32          ENDPTSETUPSTAT;                          /* R/W 0x1AC Endpoint setup status                      */
+    CPU_REG32          ENDPTPRIME;                              /* R/W 0x1B0 Endpoint initialization                    */
+    CPU_REG32          ENDPTFLUSH;                              /* R/W 0x1B4 Endpoint de-initialization                 */
+    CPU_REG32          ENDPTSTATUS;                             /* R   0x1B8 Endpoint status                            */
+    CPU_REG32          ENDPTCOMPLETE;                           /* R/W 0x1BC Endpoint complete                          */
+    CPU_REG32          ENDPTCTRLx[USBD_ZYNQ_EP_NBR_MAX];        /*           Endpoint control registers                 */
+}  USBD_ZYNQ_REG;
+
+                                                                /* --- ENDPOINT TRANSFER DESCRIPTOR (dTD) DATA TYPE --- */
+typedef  struct  usbd_zynq_dtd {
+    CPU_REG32          dTD_NextPtr;                             /* Next Link Pointer                                    */
+    CPU_REG32          Token;                                   /* DTD token                                            */
+    CPU_REG32          BufPtrs[5];                              /* Buffer pointer (Page n, n = [0..4])                  */
+} USBD_ZYNQ_dTD;
+
+                                                                /* -------------- dTD EXTENDED DATA TYPE -------------- */
+typedef  struct  usbd_zynq_dtd_ext {
+    CPU_REG32          dTD_NextPtr;                             /* Next Link Pointer                                    */
+    CPU_REG32          Token;                                   /* DTD token                                            */
+    CPU_REG32          BufPtrs[5];                              /* Buffer pointer (Page n, n = [0..4])                  */
+    CPU_INT32U         BufAddr;                                 /* Buffer address                                       */
+    CPU_INT32U         BufLen;                                  /* Buffer length                                        */
+} USBD_ZYNQ_dTD_EXT;
+
+                                                                /* -------- ENDPOINT QUEUE HEAD (dQH) DATA TYPE ------- */
+typedef  struct  usbd_zynq_dqh {
+    CPU_REG32          EpCap;                                   /* Endpoint capabilities                                */
+    CPU_REG32          dTD_CurrPtr;                             /* Current dTD pointer                                  */
+    USBD_ZYNQ_dTD      OverArea;                                /* Overlay Area                                         */
+    CPU_INT32U         Reserved0;
+    CPU_REG32          SetupBuf[2];                             /* Setup buffer                                         */
+                                                                /* ------------------ dTD's LINK LIST ----------------- */
+    USBD_ZYNQ_dTD_EXT *dTD_LstHeadPtr;                          /* dTD's link list head pointer                         */
+    USBD_ZYNQ_dTD_EXT *dTD_LstTailPtr;                          /* dTD's link list tail pointer                         */
+    CPU_REG32          dTD_LstNbrEntries;                       /* dTD's link list number of entries                    */
+    CPU_INT32U         Unused;                                  /* Unused space                                         */
+} USBD_ZYNQ_dQH;
+
+
+typedef  struct  usbd_drv_data {
+    MEM_POOL           dQH_MemPool;
+    USBD_ZYNQ_dQH     *dQH_Tbl;
+    MEM_POOL           dTD_MemPool;
+} USBD_DRV_DATA;
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+
+/*
+*********************************************************************************************************
+*                             USB DEVICE CONTROLLER DRIVER API PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void         USBD_DrvInit       (USBD_DRV     *p_drv,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvStart      (USBD_DRV     *p_drv,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvStop       (USBD_DRV     *p_drv);
+
+static  CPU_BOOLEAN  USBD_DrvAddrSet    (USBD_DRV     *p_drv,
+                                         CPU_INT08U    dev_addr);
+
+static  void         USBD_DrvAddrEn     (USBD_DRV     *p_drv,
+                                         CPU_INT08U    dev_addr);
+
+static  CPU_BOOLEAN  USBD_DrvCfgSet     (USBD_DRV     *p_drv,
+                                         CPU_INT08U    cfg_val);
+
+static  void         USBD_DrvCfgClr     (USBD_DRV     *p_drv,
+                                         CPU_INT08U    cfg_val);
+
+static  CPU_INT16U   USBD_DrvGetFrameNbr(USBD_DRV     *p_drv);
+
+static  void         USBD_DrvEP_Open    (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U    ep_type,
+                                         CPU_INT16U    max_pkt_size,
+                                         CPU_INT08U    transaction_frame,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_Close   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr);
+
+static  CPU_INT32U   USBD_DrvEP_RxStart (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  CPU_INT32U   USBD_DrvEP_Rx      (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_RxZLP   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         USBD_ERR     *p_err);
+
+static  CPU_INT32U   USBD_DrvEP_Tx      (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+static  void         USBD_DrvEP_TxStart (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_INT08U   *p_buf,
+                                         CPU_INT32U    buf_len,
+                                         USBD_ERR     *p_err);
+
+
+static  void         USBD_DrvEP_TxZLP   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         USBD_ERR     *p_err);
+
+static  CPU_BOOLEAN  USBD_DrvEP_Abort   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr);
+
+static  CPU_BOOLEAN  USBD_DrvEP_Stall   (USBD_DRV     *p_drv,
+                                         CPU_INT08U    ep_addr,
+                                         CPU_BOOLEAN   state);
+
+static  void         USBD_DrvISR_Handler(USBD_DRV     *p_drv);
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+                                                                /* ------------- dTD's LINK LIST FUNCTIONS ------------ */
+static  CPU_BOOLEAN  USBD_Zynq_dTD_LstInsert(USBD_DRV    *p_drv,
+                                             CPU_INT08U   ep_phy_nbr,
+                                             CPU_INT08U  *p_data,
+                                             CPU_INT16U   len);
+
+static  CPU_BOOLEAN  USBD_Zynq_dTD_LstRd    (USBD_DRV    *p_drv,
+                                             CPU_INT08U   ep_phy_nbr,
+                                             CPU_INT16U   data_len,
+                                             CPU_INT16U  *p_xfer_len,
+                                             CPU_INT16U  *p_len_rem);
+
+static  CPU_BOOLEAN  USBD_Zynq_dTD_LstRemove(USBD_DRV    *p_drv,
+                                             CPU_INT08U   ep_phy_nbr);
+
+static  CPU_BOOLEAN  USBD_Zynq_dTD_LstEmpty (USBD_DRV    *p_drv,
+                                             CPU_INT08U   ep_phy_nbr);
+
+static  void         USBD_Zynq_SetupProcess (USBD_DRV    *p_drv,
+                                             CPU_INT08U   ep_log_nbr);
+
+static  void         USBD_Zynq_SoftRst      (USBD_DRV    *p_drv);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                  USB DEVICE CONTROLLER DRIVER API
+*********************************************************************************************************
+*/
+
+USBD_DRV_API  USBD_DrvAPI_Zynq = { USBD_DrvInit,
+                                   USBD_DrvStart,
+                                   USBD_DrvStop,
+                                   USBD_DrvAddrSet,
+                                   USBD_DrvAddrEn,
+                                   USBD_DrvCfgSet,
+                                   USBD_DrvCfgClr,
+                                   USBD_DrvGetFrameNbr,
+                                   USBD_DrvEP_Open,
+                                   USBD_DrvEP_Close,
+                                   USBD_DrvEP_RxStart,
+                                   USBD_DrvEP_Rx,
+                                   USBD_DrvEP_RxZLP,
+                                   USBD_DrvEP_Tx,
+                                   USBD_DrvEP_TxStart,
+                                   USBD_DrvEP_TxZLP,
+                                   USBD_DrvEP_Abort,
+                                   USBD_DrvEP_Stall,
+                                   USBD_DrvISR_Handler,
+};
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                     DRIVER INTERFACE FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvInit()
+*
+* Description : Initialize the device.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE       Device successfully initialized.
+*                               USBD_ERR_ALLOC      Memory allocation failed.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DevInit() via 'p_drv_api->Init()'.
+*
+* Note(s)     : (1) Since the CPU frequency could be higher than OTG module clock, a timeout is needed
+*                   to reset the OTG controller successfully.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvInit (USBD_DRV  *p_drv,
+                            USBD_ERR  *p_err)
+{
+    USBD_DRV_BSP_API  *p_bsp_api;
+    USBD_DRV_DATA     *p_drv_data;
+    USBD_ZYNQ_REG     *p_reg;
+    CPU_INT08U         ep_phy_nbr_max;
+    CPU_SIZE_T         reqd_octets;
+    CPU_INT16U         reg_to;
+    LIB_ERR            err_lib;
+
+                                                                /* Allocate driver internal data.                       */
+    p_drv->DataPtr = Mem_HeapAlloc(sizeof(USBD_DRV_DATA),
+                                   sizeof(CPU_DATA),
+                                  &reqd_octets,
+                                  &err_lib);
+    if (p_drv->DataPtr == (void *)0) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    ep_phy_nbr_max = USBD_EP_MaxPhyNbrGet(p_drv->DevNbr);       /* Get max phy EP used by the stack.                    */
+
+    if (ep_phy_nbr_max == USBD_EP_PHY_NONE) {
+        *p_err = USBD_ERR_FAIL;
+         return;
+    }
+    ep_phy_nbr_max++;
+    p_drv_data = (USBD_DRV_DATA  *)p_drv->DataPtr;
+
+    Mem_PoolCreate(        &p_drv_data->dQH_MemPool,            /* Create EP Queue Head memory pool ...                 */
+                   (void  *)0,
+                            0u,
+                            1u,
+                           (sizeof(USBD_ZYNQ_dQH) * ep_phy_nbr_max),
+                            USBD_ZYNQ_ALIGN_OCTECTS_dQH,
+                           &reqd_octets,
+                           &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+
+    Mem_PoolCreate(        &p_drv_data->dTD_MemPool,           /* Create EP device transfer descriptor memory pool.    */
+                   (void  *)0,
+                            0u,
+                            ep_phy_nbr_max * 1u,
+                           (sizeof(USBD_ZYNQ_dTD_EXT)),
+                            USBD_ZYNQ_ALIGN_OCTECTS_dTD,
+                           &reqd_octets,
+                           &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    p_drv_data->dQH_Tbl = (USBD_ZYNQ_dQH *)Mem_PoolBlkGet(&p_drv_data->dQH_MemPool,
+                                                          (sizeof(USBD_ZYNQ_dQH) * (ep_phy_nbr_max)),
+                                                          &err_lib);
+    if (err_lib != LIB_MEM_ERR_NONE) {
+       *p_err = USBD_ERR_ALLOC;
+        return;
+    }
+
+    Mem_Clr((void  *) p_drv_data->dQH_Tbl,
+                     (sizeof(USBD_ZYNQ_dQH) * (ep_phy_nbr_max)));
+
+    p_bsp_api = p_drv->BSP_API_Ptr;                             /* Get driver BSP API reference.                        */
+
+    p_bsp_api->Init(p_drv);                                     /* Call board/chip specific device controller ...       */
+                                                                /* ... initialization function.                         */
+
+    p_reg         = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+                                                                /* Reset controller (see Note #1)                       */
+    p_reg->USBCMD = USBD_ZYNQ_USBCMD_RST;
+
+    reg_to = USBD_ZYNQ_REG_TO;
+    while (reg_to > 0) {
+        reg_to--;
+    }
+
+    p_reg->USBMODE = USBD_ZYNQ_USBMODE_CM_DEV;                  /* Set device mode                                      */
+
+
+    p_reg->USBINTR     = DEF_BIT_NONE;                          /* Disable all interrupts                               */
+    p_reg->EP_LST_ADDR = (CPU_INT32U)p_drv_data->dQH_Tbl;
+
+    DEF_BIT_SET(p_reg->USBMODE, USBD_ZYNQ_USBMODE_SLOM);        /* Disable setup lockout                                */
+    DEF_BIT_CLR(p_reg->USBMODE, USBD_ZYNQ_USBMODE_SDIS);        /* Stream disable mode                                  */
+
+    USBD_Zynq_SoftRst(p_drv);                                   /* Perform software reset                               */
+
+    DEF_BIT_CLR(p_reg->USBCMD, USBD_ZYNQ_USBCMD_ITC_MASK);
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvStart()
+*
+* Description : Start device operation :
+*
+*                   (1) Enable device controller bus state interrupts.
+*                   (2) Call board/chip specific connect function.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE    Device successfully connected.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DevStart() via 'p_drv_api->Start()'.
+*
+* Note(s)     : Typically, the start function activates the pull-down on the D- pin to simulate
+*               attachment to host. Some MCUs/MPUs have an internal pull-down that is activated by a
+*               device controller register; for others, this may be a GPIO pin. Additionally, interrupts
+*               for reset and suspend are activated.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvStart (USBD_DRV  *p_drv,
+                             USBD_ERR  *p_err)
+{
+    USBD_DRV_BSP_API  *p_bsp_api;
+    USBD_ZYNQ_REG     *p_reg;
+
+
+    p_bsp_api = p_drv->BSP_API_Ptr;                             /* Get driver BSP API reference.                        */
+    p_reg     = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    p_reg->USBINTR = USBD_ZYNQ_USB_INT_UR                       /* Enable the Reset and Suspend interrupt               */
+                   | USBD_ZYNQ_USB_INT_SL;
+                                                                /* Set the RUN bit                                      */
+#if 0
+    DEF_BIT_SET(p_reg->PORTSC1, DEF_BIT_24);                    /* Force FS. Debugging purposes only.                   */
+#endif
+
+    DEF_BIT_SET(p_reg->USBCMD,  USBD_ZYNQ_USBCMD_RUN);
+
+    p_bsp_api->Conn();                                          /* Call board/chip specific connect function.           */
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvStop()
+*
+* Description : Stop device operation.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DevStop() via 'p_drv_api->Stop()'.
+*
+* Note(s)     : Typically, the stop function performs the following operations:
+*               (1) Clear and disable USB interrupts.
+*               (2) Disconnect from the USB host (e.g, reset the pull-down on the D- pin).
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvStop (USBD_DRV  *p_drv)
+{
+    USBD_DRV_BSP_API  *p_bsp_api;
+    USBD_ZYNQ_REG     *p_reg;
+
+
+    p_bsp_api = p_drv->BSP_API_Ptr;                             /* Get driver BSP API reference.                        */
+    p_reg     = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    p_reg->USBINTR = DEF_BIT_NONE;
+
+    p_bsp_api->Disconn();
+                                                                /* Clear the RUN bit                                    */
+    DEF_BIT_CLR(p_reg->USBCMD,  USBD_ZYNQ_USBCMD_RUN);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvAddrSet()
+*
+* Description : Assign an address to device.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               dev_addr    Device address assigned by the host.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_StdReqDev() via 'p_drv_api->AddrSet()'.
+*
+* Note(s)     : (1) For device controllers that have hardware assistance to enable the device address after
+*                   the status stage has completed, the assignment of the device address can also be
+*                   combined with enabling the device address mode.
+*
+*               (2) For device controllers that change the device address immediately, without waiting the
+*                   status phase to complete, see USBD_DrvAddrEn().
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvAddrSet (USBD_DRV    *p_drv,
+                                      CPU_INT08U   dev_addr)
+{
+    USBD_ZYNQ_REG  *p_reg;
+
+
+    p_reg           = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_reg->DEV_ADDR = ((dev_addr << 25) & USBD_ZYNQ_DEV_ADDR_USBADDR_MASK) |
+                                          USBD_ZYNQ_DEV_ADDR_USBADDRA;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvAddrEn()
+*
+* Description : Enable address on device.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               dev_addr    Device address assigned by the host.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_StdReqHandler() via 'p_drv_api->AddrEn()'.
+*
+* Note(s)     : (1) For device controllers that have hardware assistance to enable the device address after
+*                   the status stage has completed, no operation needs to be performed.
+*
+*               (2) For device controllers that change the device address immediately, without waiting the
+*                   status phase to complete, the device address must be set and enabled.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvAddrEn (USBD_DRV    *p_drv,
+                              CPU_INT08U   dev_addr)
+{
+    (void)p_drv;
+    (void)dev_addr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvCfgSet()
+*
+* Description : Bring device into configured state.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               cfg_val     Configuration value.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_CfgOpen() via 'p_drv_api->CfgSet()'.
+*
+* Note(s)     : Typically, the set configuration function sets the device as configured. For some
+*               controllers, this may not be necessary.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvCfgSet (USBD_DRV    *p_drv,
+                                     CPU_INT08U   cfg_val)
+{
+    (void)p_drv;
+    (void)cfg_val;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvCfgClr()
+*
+* Description : Bring device into de-configured state.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               cfg_val     Configuration value.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_CfgClose() via 'p_drv_api->CfgClr()'.
+*
+* Note(s)     : (1) Typically, the clear configuration function sets the device as not being configured.
+*                   For some controllers, this may not be necessary.
+*
+*               (2) This functions in invoked after a bus reset or before the status stage of some
+*                   SET_CONFIGURATION requests.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvCfgClr (USBD_DRV    *p_drv,
+                              CPU_INT08U   cfg_val)
+{
+    (void)p_drv;
+    (void)cfg_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvGetFrameNbr()
+*
+* Description : Retrieve current frame number.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : Frame number.
+*
+* Caller(s)   : USBD_EP_Open() via 'p_drv_api->GetFrameNbr()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT16U  USBD_DrvGetFrameNbr (USBD_DRV  *p_drv)
+{
+    CPU_INT16U      frame_nbr;
+    USBD_ZYNQ_REG  *p_reg;
+
+
+    p_reg = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    frame_nbr = (p_reg->FRINDEX >> 3u);
+
+
+    return (frame_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          USBD_DrvEP_Open()
+*
+* Description : Open and configure a device endpoint, given its characteristics (e.g., endpoint type,
+*               endpoint address, maximum packet size, etc).
+*
+* Argument(s) : p_drv               Pointer to device driver structure.
+*
+*               ep_addr             Endpoint address.
+*
+*               ep_type             Endpoint type :
+*
+*                                       USBD_EP_TYPE_CTRL,
+*                                       USBD_EP_TYPE_ISOC,
+*                                       USBD_EP_TYPE_BULK,
+*                                       USBD_EP_TYPE_INTR.
+*
+*               max_pkt_size        Maximum packet size.
+*
+*               transaction_frame   Endpoint transactions per frame.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE               Endpoint successfully opened.
+*                               USBD_ERR_EP_INVALID_ADDR    Invalid endpoint address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Open() via 'p_drv_api->EP_Open()',
+*               USBD_CtrlOpen().
+*
+* Note(s)     : (1) Typically, the endpoint open function performs the following operations:
+*
+*                   (a) Validate endpoint address, type and maximum packet size.
+*                   (b) Configure endpoint information in the device controller. This may include not
+*                       only assigning the type and maximum packet size, but also making certain that
+*                       the endpoint is successfully configured (or realized or mapped). For some
+*                       device controllers, this may not be necessary.
+*
+*               (2) If the endpoint address is valid, then the endpoint open function should validate
+*                   the attributes allowed by the hardware endpoint :
+*
+*                   (a) The maximum packet size 'max_pkt_size' should be validated to match hardware
+*                       capabilities.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_Open (USBD_DRV    *p_drv,
+                               CPU_INT08U   ep_addr,
+                               CPU_INT08U   ep_type,
+                               CPU_INT16U   max_pkt_size,
+                               CPU_INT08U   transaction_frame,
+                               USBD_ERR    *p_err)
+{
+    USBD_ZYNQ_dQH     *p_dqh;
+    USBD_ZYNQ_REG     *p_reg;
+    USBD_DRV_DATA     *p_drv_data;
+    CPU_BOOLEAN        ep_dir;
+    CPU_INT08U         ep_log_nbr;
+    CPU_INT08U         ep_phy_nbr;
+    CPU_INT32U         reg_val;
+    CPU_SR_ALLOC();
+
+
+    (void)transaction_frame;
+
+    ep_dir     = USBD_EP_IS_IN(ep_addr);                        /* Get EP direction.                                    */
+    ep_log_nbr = USBD_EP_ADDR_TO_LOG(ep_addr);                  /* Get EP logical  number.                              */
+    ep_phy_nbr = USBD_EP_ADDR_TO_PHY(ep_addr);                  /* Get EP physical number.                              */
+
+    p_reg      = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data = (USBD_DRV_DATA *)(p_drv->DataPtr);
+
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+                                                                /* ---------------- ARGUMENTS CHECKING ---------------- */
+    if ((ep_log_nbr == 0) &&
+        (ep_type    != USBD_EP_TYPE_CTRL)) {
+       *p_err = USBD_ERR_EP_INVALID_ADDR;
+        return;
+    }
+
+                                                                /* -------------- ENDPOINT CONFIGURATION -------------- */
+                                                                /* Prepare locally the EP cfg.                          */
+    reg_val = USBD_ZYNQ_ENDPTCTRL_TX_EN |                       /* Enable EP Tx (i.e. IN direction).                    */
+              USBD_ZYNQ_ENDPTCTRL_RX_EN;                        /* Enable EP Rx (i.e. OUT direction).                   */
+
+    switch (ep_type) {                                          /* Set the EP Tx and Rx type.                           */
+        case USBD_EP_TYPE_CTRL:
+             DEF_BIT_SET(reg_val, USBD_ZYNQ_ENDPTCTRL_TX_TYPE_CTRL |
+                                  USBD_ZYNQ_ENDPTCTRL_RX_TYPE_CTRL);
+             break;
+
+        case USBD_EP_TYPE_ISOC:
+             DEF_BIT_SET(reg_val, USBD_ZYNQ_ENDPTCTRL_TX_TYPE_ISOC |
+                                  USBD_ZYNQ_ENDPTCTRL_RX_TYPE_ISOC);
+                                                                /* Reset Tx & Rx data toggle.                           */
+             DEF_BIT_SET(reg_val, USBD_ZYNQ_ENDPTCTRL_TX_TOGGLE_RST);
+             DEF_BIT_SET(reg_val, USBD_ZYNQ_ENDPTCTRL_RX_TOGGLE_RST);
+             break;
+
+        case USBD_EP_TYPE_INTR:
+             DEF_BIT_SET(reg_val, USBD_ZYNQ_ENDPTCTRL_TX_TYPE_INT |
+                                  USBD_ZYNQ_ENDPTCTRL_RX_TYPE_INT);
+                                                                /* Reset Tx & Rx data toggle.                           */
+             DEF_BIT_SET(reg_val, USBD_ZYNQ_ENDPTCTRL_TX_TOGGLE_RST);
+             DEF_BIT_SET(reg_val, USBD_ZYNQ_ENDPTCTRL_RX_TOGGLE_RST);
+             break;
+
+        case USBD_EP_TYPE_BULK:
+             DEF_BIT_SET(reg_val, USBD_ZYNQ_ENDPTCTRL_TX_TYPE_BULK |
+                                  USBD_ZYNQ_ENDPTCTRL_RX_TYPE_BULK);
+                                                                /* Reset Tx & Rx data toggle.                           */
+             DEF_BIT_SET(reg_val, USBD_ZYNQ_ENDPTCTRL_TX_TOGGLE_RST);
+             DEF_BIT_SET(reg_val, USBD_ZYNQ_ENDPTCTRL_RX_TOGGLE_RST);
+             break;
+
+        default:                                                /* 'default' case intentionally empty.                  */
+             break;
+    }
+
+    CPU_CRITICAL_ENTER();
+    if (ep_dir == DEF_FALSE) {                                  /* OUT Endpoints                                        */
+                                                                /* Reset reg upper half to keep only Rx related bits.   */
+        reg_val &= USBD_ZYNQ_ENDPTCTRL_RX_CFG_MASK;
+        DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_ZYNQ_ENDPTCTRL_RX_CFG_MASK);
+    } else {                                                    /* IN Endpoints                                         */
+                                                                /* Reset reg lower half to keep only Tx related bits.   */
+        reg_val &= USBD_ZYNQ_ENDPTCTRL_TX_CFG_MASK;
+        DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_ZYNQ_ENDPTCTRL_TX_CFG_MASK);
+    }
+
+    DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr], reg_val);        /* Apply the local EP cfg to EP ctrl register.          */
+
+                                                                /* --------- ENDPOINT QUEUE HEAD CONFIGURATION -------- */
+    reg_val = (max_pkt_size << 16) & USBD_ZYNQ_dQH_EP_CAP_MAX_LEN_MASK;
+
+    if ((ep_type == USBD_EP_TYPE_CTRL) &&
+        (ep_dir  == DEF_FALSE)) {
+        DEF_BIT_SET(reg_val, USBD_ZYNQ_dQH_EP_CAP_IOS);
+        DEF_BIT_SET(p_reg->ENDPTSETUPSTAT, DEF_BIT32(ep_log_nbr));
+    }
+
+    if ((ep_type == USBD_EP_TYPE_CTRL) ||
+        (ep_type == USBD_EP_TYPE_BULK)) {
+        DEF_BIT_SET(reg_val, USBD_ZYNQ_dQH_EP_CAP_ZLTS);
+    }
+
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_ZYNQ_dQH));   /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+    p_dqh->EpCap = reg_val;
+
+    if (ep_dir == DEF_TRUE) {
+        p_dqh->OverArea.dTD_NextPtr = USBD_ZYNQ_dTD_dTD_NEXT_TERMINATE;
+    }
+
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_ZYNQ_dQH));        /* Write cached memory block back to RAM.               */
+
+    CPU_CRITICAL_EXIT();
+
+    *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_Close()
+*
+* Description : Close a device endpoint, and uninitialize/clear endpoint configuration in hardware.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Close() via 'p_drv_api->EP_Close()',
+*               USBD_CtrlOpen().
+*
+* Note(s)     : Typically, the endpoint close function clears the endpoint information in the device
+*               controller. For some controllers, this may not be necessary.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_Close (USBD_DRV    *p_drv,
+                                CPU_INT08U   ep_addr)
+{
+    CPU_INT08U  ep_phy_nbr;
+
+
+    ep_phy_nbr = USBD_EP_ADDR_TO_PHY(ep_addr);
+    (void)USBD_Zynq_dTD_LstEmpty(p_drv, ep_phy_nbr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvEP_RxStart()
+*
+* Description : Configure endpoint with buffer to receive data.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to data buffer.
+*
+*               buf_len     Length of the buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Receive successfully configured.
+*                               USBD_ERR_RX     Generic Rx error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Rx() via 'p_drv_api->EP_Rx()',
+*               USBD_EP_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  USBD_DrvEP_RxStart (USBD_DRV    *p_drv,
+                                        CPU_INT08U   ep_addr,
+                                        CPU_INT08U  *p_buf,
+                                        CPU_INT32U   buf_len,
+                                        USBD_ERR    *p_err)
+{
+    USBD_ZYNQ_REG     *p_reg;
+    CPU_INT08U         ep_phy_nbr;
+    CPU_INT32U         ep_pkt_len;
+    CPU_BOOLEAN        valid;
+
+
+                                                                /* ----------------- ARGUMENT CHECKING ---------------- */
+    ep_phy_nbr = USBD_EP_ADDR_TO_PHY(ep_addr);
+    p_reg      = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    DEF_BIT_CLR(p_reg->USBINTR, USBD_ZYNQ_USB_INT_U);           /* Disable interrupts.                                  */
+
+                                                                /* Force one transaction.                               */
+    ep_pkt_len =  DEF_MIN(buf_len,
+                          USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTE_MAX);
+
+    CPU_DCACHE_RANGE_FLUSH(p_buf, buf_len);                 /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+
+                                                                /* Case 1: one transaction                              */
+    if (buf_len <= USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTE_MAX) {
+
+        valid = USBD_Zynq_dTD_LstInsert(            p_drv,
+                                                    ep_phy_nbr,
+                                                    p_buf,
+                                        (CPU_INT16U)ep_pkt_len);
+    }
+
+    DEF_BIT_SET(p_reg->USBINTR, USBD_ZYNQ_USB_INT_U);           /* Enable interrupts.                                   */
+
+    if (valid == DEF_FAIL) {
+       *p_err = USBD_ERR_RX;
+    } else {
+       *p_err = USBD_ERR_NONE;
+    }
+
+    return (ep_pkt_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvEP_Rx()
+*
+* Description : Receive the specified amount of data from device endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to data buffer.
+*
+*               buf_len     Length of the buffer.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Data successfully received.
+*                               USBD_ERR_RX     Generic Rx error.
+*
+* Return(s)   : Number of octets received, if NO error(s).
+*
+*               0,                         otherwise.
+*
+* Caller(s)   : USBD_EP_Rx() via 'p_drv_api->EP_Rx()',
+*               USBD_EP_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  USBD_DrvEP_Rx (USBD_DRV    *p_drv,
+                                   CPU_INT08U   ep_addr,
+                                   CPU_INT08U  *p_buf,
+                                   CPU_INT32U   buf_len,
+                                   USBD_ERR    *p_err)
+{
+    USBD_ZYNQ_REG  *p_reg;
+    CPU_INT08U      ep_phy_nbr;
+    CPU_INT16U      len_rem;
+    CPU_INT16U      xfer_len;
+    CPU_INT16U      tot_xfer_len;
+    CPU_BOOLEAN     xfer;
+
+
+    (void)p_buf;
+
+    ep_phy_nbr   = USBD_EP_ADDR_TO_PHY(ep_addr);
+    p_reg        = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+    xfer         = DEF_FAIL;
+    tot_xfer_len = 0u;
+    xfer_len     = 0u;
+
+    DEF_BIT_CLR(p_reg->USBINTR, USBD_ZYNQ_USB_INT_U);           /* Disable interrupts.                                  */
+
+    CPU_DCACHE_RANGE_FLUSH(p_buf, buf_len);                 /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+
+    if (buf_len <= USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTE_MAX) {        /* Case 1: one transaction.                             */
+                                                                /* Read data from the first dTD in the link list.       */
+        xfer = USBD_Zynq_dTD_LstRd(             p_drv,
+                                                ep_phy_nbr,
+                                   (CPU_INT16U) buf_len,
+                                               &xfer_len,
+                                               &len_rem);
+
+        USBD_Zynq_dTD_LstRemove(p_drv, ep_phy_nbr);
+        tot_xfer_len = xfer_len;
+    } else {
+        ;                                                       /* !!!! Multiple transaction not implemented yet.       */
+    }
+
+    DEF_BIT_SET(p_reg->USBINTR, USBD_ZYNQ_USB_INT_U);           /* Enable interrupts                                    */
+
+    if (xfer == DEF_FAIL) {
+        *p_err = USBD_ERR_RX;
+    } else {
+        *p_err = USBD_ERR_NONE;
+    }
+
+    return (tot_xfer_len);
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_RxZLP()
+*
+* Description : Receive zero-length packet from endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Zero-length packet successfully received.
+*                               USBD_ERR_RX     Generic Rx error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_RxZLP() via 'p_drv_api->EP_RxZLP()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_RxZLP (USBD_DRV    *p_drv,
+                                CPU_INT08U   ep_addr,
+                                USBD_ERR    *p_err)
+{
+    CPU_INT08U   ep_phy_nbr;
+    CPU_BOOLEAN  valid;
+
+
+    ep_phy_nbr = USBD_EP_ADDR_TO_PHY(ep_addr);
+    valid      = USBD_Zynq_dTD_LstInsert(              p_drv,
+                                                       ep_phy_nbr,
+                                         (CPU_INT08U *)0,
+                                                       0u);
+    if (valid != DEF_OK) {
+       *p_err = USBD_ERR_RX;
+    } else {
+       *p_err = USBD_ERR_NONE;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           USBD_DrvEP_Tx()
+*
+* Description : Configure endpoint with buffer to transmit data.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to buffer of data that will be transmitted.
+*
+*               buf_len     Number of octets to transmit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Transmit successfully configured.
+*                               USBD_ERR_TX     Generic Tx error.
+*
+* Return(s)   : Number of octets transmitted, if NO error(s).
+*
+*               0,                            otherwise.
+*
+* Caller(s)   : USBD_EP_Tx() via 'p_drv_api->EP_Tx()',
+*               USBD_EP_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT32U  USBD_DrvEP_Tx (USBD_DRV    *p_drv,
+                                   CPU_INT08U   ep_addr,
+                                   CPU_INT08U  *p_buf,
+                                   CPU_INT32U   buf_len,
+                                   USBD_ERR    *p_err)
+{
+    (void)p_drv;
+    (void)ep_addr;
+    (void)p_buf;
+
+    buf_len = DEF_MIN(buf_len, USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTE_MAX);
+   *p_err   = USBD_ERR_NONE;
+
+    return (buf_len);
+}
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvEP_TxStart()
+*
+* Description : Transmit the specified amount of data to device endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_buf       Pointer to buffer of data that will be transmitted.
+*
+*               buf_len     Number of octets to transmit.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Data successfully transmitted.
+*                               USBD_ERR_TX     Generic Tx error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Tx() via 'p_drv_api->EP_TxStart()',
+*               USBD_EP_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_TxStart (USBD_DRV    *p_drv,
+                                  CPU_INT08U   ep_addr,
+                                  CPU_INT08U  *p_buf,
+                                  CPU_INT32U   buf_len,
+                                  USBD_ERR    *p_err)
+{
+    USBD_ZYNQ_REG  *p_reg;
+    CPU_INT08U      ep_phy_nbr;
+    CPU_BOOLEAN     valid;
+
+
+    p_reg      = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+    ep_phy_nbr = USBD_EP_ADDR_TO_PHY(ep_addr);
+
+    buf_len = DEF_MIN(buf_len, USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTE_MAX);
+
+    DEF_BIT_CLR(p_reg->USBINTR, USBD_ZYNQ_USB_INT_U);           /* Disable interrupts.                                  */
+
+    CPU_DCACHE_RANGE_INV(p_buf, buf_len);                      /* Write the cached memory block back to RAM, before    */
+                                                                /* initiating the DMA transfer.                         */
+
+    valid = USBD_Zynq_dTD_LstInsert(            p_drv,
+                                                ep_phy_nbr,
+                                                p_buf,
+                                    (CPU_INT16U)buf_len);
+
+    DEF_BIT_SET(p_reg->USBINTR, USBD_ZYNQ_USB_INT_U);           /* Enable interrupts.                                   */
+
+    if (valid == DEF_FAIL) {
+       *p_err = USBD_ERR_TX;
+    } else {
+       *p_err = USBD_ERR_NONE;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_TxZLP()
+*
+* Description : Transmit zero-length packet from endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Zero-length packet successfully transmitted.
+*                               USBD_ERR_TX     Generic Tx error.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EP_Tx() via 'p_drv_api->EP_TxZLP()',
+*               USBD_EP_TxZLP(),
+*               USBD_EP_Process().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvEP_TxZLP (USBD_DRV    *p_drv,
+                                CPU_INT08U   ep_addr,
+                                USBD_ERR    *p_err)
+{
+    CPU_INT08U   ep_phy_nbr;
+    CPU_BOOLEAN  valid;
+
+
+    ep_phy_nbr = USBD_EP_ADDR_TO_PHY(ep_addr);
+    valid      = USBD_Zynq_dTD_LstInsert(              p_drv,
+                                                       ep_phy_nbr,
+                                         (CPU_INT08U *)0,
+                                                       0u);
+    if (valid != DEF_OK) {
+       *p_err = USBD_ERR_TX;
+    } else {
+       *p_err = USBD_ERR_NONE;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_Abort()
+*
+* Description : Abort any pending transfer on endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint Address.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_URB_Abort() via 'p_drv_api->EP_Abort()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvEP_Abort (USBD_DRV    *p_drv,
+                                       CPU_INT08U   ep_addr)
+{
+    USBD_ZYNQ_REG     *p_reg;
+    USBD_DRV_DATA     *p_drv_data;
+    CPU_INT32U         ix;
+    CPU_INT32U         entries;
+    CPU_BOOLEAN        ok;
+    CPU_INT08U         ep_phy_nbr;
+    CPU_INT08U         ep_log_nbr;
+    CPU_INT32U         ep_flush;
+    CPU_BOOLEAN        flush_done;
+    CPU_INT32U         nbr_retries;
+    CPU_INT32U         reg_to;
+
+
+    ep_log_nbr = USBD_EP_ADDR_TO_LOG(ep_addr);
+    p_reg      = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data = (USBD_DRV_DATA *)p_drv->DataPtr;
+    ok         = DEF_OK;
+    ep_phy_nbr = USBD_EP_ADDR_TO_PHY(ep_addr);
+
+    CPU_DCACHE_RANGE_FLUSH(&(p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries), sizeof(CPU_REG32));
+
+    entries    = p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries;
+
+
+    if (USBD_EP_IS_IN(ep_addr)) {
+        ep_flush = USBD_ZYNQ_ENDPTxxx_GET_TX_BITS(ep_log_nbr);
+    } else {
+        ep_flush = USBD_ZYNQ_ENDPTxxx_GET_RX_BITS(ep_log_nbr);
+    }
+
+    nbr_retries = USBD_ZYNQ_MAX_RETRIES;
+    flush_done  = DEF_FALSE;
+
+    while ((flush_done  == DEF_FALSE) &&
+           (nbr_retries >  0u)) {
+
+        p_reg->ENDPTFLUSH = ep_flush;
+
+        reg_to = USBD_ZYNQ_REG_TO;
+        while (((p_reg->ENDPTFLUSH & ep_flush) != 0u) &&
+               (reg_to                          > 0u)) {
+            reg_to--;
+        }
+
+        flush_done = DEF_BIT_IS_CLR(p_reg->ENDPTSTATUS, ep_flush);
+        nbr_retries--;
+    }
+
+    for (ix = 0; ix < entries; ix++) {
+        ok = USBD_Zynq_dTD_LstRemove(p_drv, ep_phy_nbr);
+        if (ok == DEF_FAIL) {
+            break;
+        }
+    }
+
+    if (nbr_retries == 0u) {
+        return (DEF_FAIL);
+    } else {
+        return (DEF_OK);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                         USBD_DrvEP_Stall()
+*
+* Description : Set or clear stall condition on endpoint.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_addr     Endpoint address.
+*
+*               state       Endpoint stall state.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : USBD_EP_Stall() via 'p_drv_api->EP_Stall()',
+*               USBD_CtrlStall().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_DrvEP_Stall (USBD_DRV     *p_drv,
+                                       CPU_INT08U    ep_addr,
+                                       CPU_BOOLEAN   state)
+{
+    USBD_ZYNQ_REG  *p_reg;
+    CPU_INT08U      ep_log_nbr;
+
+
+    p_reg      = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+    ep_log_nbr = USBD_ZYNQ_EP_GET_LOG_NBR(ep_addr);
+
+    if (state == DEF_SET) {
+        if (USBD_EP_IS_IN(ep_addr)) {
+            DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_ZYNQ_ENDPTCTRL_TX_STALL);
+        } else {
+            DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_ZYNQ_ENDPTCTRL_RX_STALL);
+        }
+    } else {
+        if (ep_log_nbr > 0) {
+            if (USBD_EP_IS_IN(ep_addr)) {
+                DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_ZYNQ_ENDPTCTRL_TX_STALL);
+                DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_ZYNQ_ENDPTCTRL_TX_TOGGLE_RST);
+            } else {
+                DEF_BIT_CLR(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_ZYNQ_ENDPTCTRL_RX_STALL);
+                DEF_BIT_SET(p_reg->ENDPTCTRLx[ep_log_nbr], USBD_ZYNQ_ENDPTCTRL_RX_TOGGLE_RST);
+            }
+        }
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                        USBD_DrvISR_Handler()
+*
+* Description : USB device Interrupt Service Routine (ISR) handler.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : This is an ISR.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_DrvISR_Handler (USBD_DRV  *p_drv)
+{
+    USBD_ZYNQ_REG     *p_reg;
+    USBD_DRV_DATA     *p_drv_data;
+    USBD_ZYNQ_dTD_EXT *p_dtd;
+    CPU_INT32U         ep_complete;
+    CPU_INT32U         ep_setup;
+    CPU_INT08U         ep_log_nbr;
+    CPU_INT08U         ep_phy_nbr;
+    CPU_INT32U         int_status;
+    CPU_INT32U         int_en;
+
+
+    p_drv_data   = (USBD_DRV_DATA *) p_drv->DataPtr;
+    p_reg        = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+
+    int_status  = p_reg->USBSTS;
+    int_en      = p_reg->USBINTR;
+    int_status &= int_en;
+
+    if (int_status != DEF_BIT_NONE) {
+                                                                /* ------------- HIGH-FREQUENCY INTERRUPTS ------------ */
+        if (DEF_BIT_IS_SET(int_status, USBD_ZYNQ_USB_INT_U)) {
+            p_reg->USBSTS = USBD_ZYNQ_USB_INT_U;
+
+            ep_setup = p_reg->ENDPTSETUPSTAT;                   /* (1) Process all setup transactions                   */
+            while (ep_setup != DEF_BIT_NONE) {
+                ep_log_nbr = (CPU_INT08U)(31u - CPU_CntLeadZeros32(ep_setup));
+                USBD_Zynq_SetupProcess(p_drv,
+                                       ep_log_nbr);
+                ep_setup = p_reg->ENDPTSETUPSTAT;
+            }
+
+                                                                /* (2) Process all IN/OUT  transactions                 */
+            ep_complete = p_reg->ENDPTCOMPLETE;
+            p_reg->ENDPTCOMPLETE = ep_complete;
+
+            while (ep_complete != DEF_BIT_NONE) {
+                if (DEF_BIT_IS_SET_ANY(ep_complete, USBD_ZYNQ_ENDPTCOMPLETE_TX_MASK)) {
+                    ep_log_nbr = (CPU_INT08U)(31u - CPU_CntLeadZeros32(USBD_ZYNQ_ENDPTxxx_GET_TX_NBR(ep_complete)));
+                    ep_phy_nbr = USBD_ZYNQ_EP_IN_LOG_TO_PHY_NBR(ep_log_nbr);
+
+                    ep_complete &= ~USBD_ZYNQ_ENDPTxxx_GET_TX_BITS(ep_log_nbr);
+                    p_dtd        =  p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstHeadPtr;
+
+                    CPU_DCACHE_RANGE_FLUSH(p_dtd, sizeof(USBD_ZYNQ_dTD_EXT));
+
+                    if (DEF_BIT_IS_CLR(p_dtd->Token, USBD_ZYNQ_dTD_TOKEN_STATUS_ACTIVE)) {
+#if 0
+                        buf_len =   p_dtd->BufLen  -
+                                  ((p_dtd->Token & USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTES_MASK) >> 16);
+#endif
+                        USBD_EP_TxCmpl(p_drv, ep_log_nbr);
+                    } else {
+#if 0
+                                                                /* !!!! Transmit with error.                            */
+                        USBD_EP_TxCmpl(p_drv, ep_log_nbr, 0u);
+#endif
+                    }
+
+                    USBD_Zynq_dTD_LstRemove(p_drv, ep_phy_nbr);
+                }
+
+                if (DEF_BIT_IS_SET_ANY(ep_complete, USBD_ZYNQ_ENDPTCOMPLETE_RX_MASK)) {
+                    ep_log_nbr = (CPU_INT08U)(31u - CPU_CntLeadZeros32(USBD_ZYNQ_ENDPTxxx_GET_RX_NBR(ep_complete)));
+                    ep_phy_nbr = USBD_ZYNQ_EP_OUT_LOG_TO_PHY_NBR(ep_log_nbr);
+
+                    ep_complete &= ~USBD_ZYNQ_ENDPTxxx_GET_RX_BITS(ep_log_nbr);
+                    p_dtd        =  p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstHeadPtr;
+
+                    CPU_DCACHE_RANGE_FLUSH(p_dtd, sizeof(USBD_ZYNQ_dTD_EXT));
+
+                    if (DEF_BIT_IS_CLR(p_dtd->Token, USBD_ZYNQ_dTD_TOKEN_STATUS_ACTIVE)) {
+                        USBD_EP_RxCmpl(p_drv, ep_log_nbr);
+                    }
+                }
+            }
+        }
+
+        if (DEF_BIT_IS_SET(int_status, USBD_ZYNQ_USB_INT_UE)) {
+            p_reg->USBSTS = USBD_ZYNQ_USB_INT_UE;
+        }
+                                                                /* ------------- LOW-FREQUENCY INTERRUPTS ------------- */
+                                                                /* (3) Process the bus change interrupts                */
+        if (DEF_BIT_IS_SET_ANY(int_status, USBD_ZYNQ_USB_INT_BUS)) {
+
+                                                                /* ---------------- USB RESET INTERRUPT --------------- */
+            if (DEF_BIT_IS_SET(int_status, USBD_ZYNQ_USB_INT_UR)) {
+
+                USBD_Zynq_SoftRst(p_drv);                       /* Perform a soft reset                                 */
+
+                USBD_EventReset(p_drv);                         /* Notify bus reset.                                    */
+
+                p_reg->USBSTS  = USBD_ZYNQ_USB_INT_UR;          /* Clear the interrupt                                  */
+                p_reg->USBINTR = USBD_ZYNQ_USB_INT_SL
+                               | USBD_ZYNQ_USB_INT_UR
+                               | USBD_ZYNQ_USB_INT_PC
+                               | USBD_ZYNQ_USB_INT_U
+                               | USBD_ZYNQ_USB_INT_UE;
+            }
+                                                                /* --------------- USB SUSPEND INTERRUPT -------------- */
+            if (DEF_BIT_IS_SET(int_status, USBD_ZYNQ_USB_INT_SL)) {
+
+                USBD_EventSuspend(p_drv);
+
+                p_reg->USBSTS  = USBD_ZYNQ_USB_INT_SL;          /* Clear the suspend interrupt                          */
+                p_reg->USBINTR = USBD_ZYNQ_USB_INT_UR           /* Enable the Reset and Port change interrupt           */
+                               | USBD_ZYNQ_USB_INT_U
+                               | USBD_ZYNQ_USB_INT_PC
+                               | USBD_ZYNQ_USB_INT_UE;
+            }
+                                                                /* ------------- USB PORT CHANGE INTERRUPT ------------ */
+            if (DEF_BIT_IS_SET(int_status, USBD_ZYNQ_USB_INT_PC)) {
+                                                                /* Detect the speed of the device                       */
+                if (DEF_BIT_IS_SET(p_reg->PORTSC1, USBD_ZYNQ_PORTSC1_HSP)) {
+                    USBD_EventHS(p_drv);                        /* Notify high-speed event.                             */
+
+                }
+                                                                /* Clear the Port change interrupt                      */
+                p_reg->USBSTS = USBD_ZYNQ_USB_INT_PC;
+            }
+        }
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                    USBD_Zynq_dTD_LstInsert()
+*
+* Description : Insert a new dTD at the end of the link list.
+*               (1) Get a dTD from the memory pool.
+*               (2) Build the transfer descriptor.
+*               (3) Insert the dTD at the end of the link list
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_phy_nbr  Endpoint logical number.
+*
+*               p_data      Pointer to the data buffer; ignored for OUT endpoints.
+*
+*               len         Transfer length.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN   USBD_Zynq_dTD_LstInsert (USBD_DRV    *p_drv,
+                                               CPU_INT08U   ep_phy_nbr,
+                                               CPU_INT08U  *p_data,
+                                               CPU_INT16U   len)
+{
+    USBD_ZYNQ_REG      *p_reg;
+    USBD_DRV_DATA      *p_drv_data;
+    USBD_ZYNQ_dTD_EXT  *p_dtd;
+    USBD_ZYNQ_dTD_EXT  *p_dtd_last;
+    USBD_ZYNQ_dQH      *p_dqh;
+    CPU_INT08U          i;
+    CPU_INT08U          insert_nbr_tries;
+    CPU_BOOLEAN         insert_complete;
+    CPU_INT32U          ep_status;
+    CPU_INT08U         *p_buf_page;
+    CPU_BOOLEAN         rtn_flag;
+    CPU_INT32U          dtd_totbytes;
+    CPU_INT32U          rem;
+    CPU_INT32U          buf_page_max;
+    CPU_INT32U          buf_page;
+    LIB_ERR             err_lib;
+    CPU_SR_ALLOC();
+
+
+    p_drv_data    = (USBD_DRV_DATA *)p_drv->DataPtr;
+    p_reg         = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_dqh         = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_ZYNQ_dQH));   /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+
+    p_dtd_last    = p_dqh->dTD_LstTailPtr;
+                                                                /* (1) Get a dTD from the memory pool                   */
+    p_dtd         = (USBD_ZYNQ_dTD_EXT *)Mem_PoolBlkGet(            &p_drv_data->dTD_MemPool,
+                                                        (CPU_SIZE_T) sizeof(USBD_ZYNQ_dTD_EXT),
+                                                                    &err_lib);
+
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* See Page 386 of the Zynq-7000 TRM for more info.     */
+
+    Mem_Clr((void     *)p_dtd,                                  /* ... Initialize the dTD to 0x00                       */
+            (CPU_SIZE_T)sizeof(USBD_ZYNQ_dTD_EXT));
+
+                                                                /* (2) Build the transfer descriptor                    */
+    p_dtd->dTD_NextPtr = USBD_ZYNQ_dTD_dTD_NEXT_TERMINATE;      /* ... Set the terminate bit to 1                       */
+                                                                /* ... Fill in the total transfer len.                  */
+    p_dtd->Token       = ((len << 16) & USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTES_MASK)
+                       | USBD_ZYNQ_dTD_TOKEN_IOC
+                       | USBD_ZYNQ_dTD_TOKEN_STATUS_ACTIVE;
+
+    p_buf_page = p_data;
+    rtn_flag   = DEF_FALSE;
+                                                                /* Init Buffer Pointer (Page 0) + Current Offset        */
+    p_dtd->BufPtrs[0] = (CPU_INT32U)p_buf_page;
+
+    buf_page_max = (((CPU_INT32U)p_buf_page + 0x1000u) & 0xFFFFF000u) - (CPU_INT32U)p_buf_page;
+    buf_page     = (p_data + len) - p_buf_page;
+    dtd_totbytes = DEF_MIN(buf_page, buf_page_max);
+
+                                                                /* Init Buffer Pointer List if buffer spans more ...    */
+                                                                /* ... than one physical page (see Note #3).            */
+    for (i = 1u; i <= 4u; i++) {                                /* Init Buffer Pointer (Page 1 to 4)                    */
+                                                                /* Find the next closest 4K-page boundary ahead.        */
+        p_buf_page = (CPU_INT08U *)(((CPU_INT32U)p_buf_page + 0x1000u) & 0xFFFFF000u);
+
+        if (p_buf_page < (p_data + len)) {                      /* If buffer spans a new 4K-page boundary.              */
+                                                                /* Set page ptr to ref start of the subsequent 4K page. */
+            p_dtd->BufPtrs[i]  = (CPU_INT32U)p_buf_page;
+            dtd_totbytes      += DEF_MIN(((p_data + len) - p_buf_page), 0x1000);
+        } else {                                                /* All the transfer size has been described...          */
+            rtn_flag = DEF_TRUE;
+            break;                                              /* ... quit the loop.                                   */
+        }
+    }
+
+    p_dtd->BufAddr = (CPU_INT32U)p_data;                        /* Save the buffer address                              */
+    p_dtd->BufLen  =  len;
+
+    CPU_DCACHE_RANGE_INV(p_dtd, sizeof(USBD_ZYNQ_dTD_EXT));    /* Write cached memory block back to RAM.               */
+
+    CPU_CRITICAL_ENTER();
+
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_ZYNQ_dQH));   /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+
+                                                                /* (3) Insert the dTD at the end of the link list       */
+                                                                /* ... Case 1: Link list is empty                       */
+    if (p_dqh->dTD_LstNbrEntries == 0) {
+
+        p_dqh->dTD_LstHeadPtr = p_dtd;
+        p_dqh->dTD_LstTailPtr = p_dtd;
+        p_dqh->dTD_LstNbrEntries++;
+
+                                                                /* (a) Write dQH next pointer and dQH terminate ...     */
+                                                                /* ... bit to '0' as a single operation                 */
+        p_dqh->OverArea.dTD_NextPtr = (CPU_INT32U)p_dtd;
+
+                                                                /* (b) Clear the Status bits                            */
+        DEF_BIT_CLR(p_dqh->OverArea.Token, USBD_ZYNQ_dTD_TOKEN_STATUS_MASK);
+
+        CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_ZYNQ_dQH));    /* Write cached memory block back to RAM.               */
+
+                                                                /* (c) Prime the endpoint                               */
+        USBD_ZYNQ_ENDPTxxx_BIT_WR(p_reg->ENDPTPRIME, ep_phy_nbr);
+
+    } else {
+                                                                /* ... Case 2: Link list is not empty                   */
+                                                                /*  (a) Add dTD to end of linked list                   */
+        p_dqh->dTD_LstTailPtr->dTD_NextPtr = (CPU_INT32U)p_dtd;
+        p_dqh->dTD_LstTailPtr              = p_dtd;
+        p_dqh->dTD_LstNbrEntries++;
+
+        CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_ZYNQ_dQH));    /* Write cached memory block back to RAM.               */
+
+                                                                /*  (b) Read correct prime bit. IF '1' DONE.            */
+
+        if (USBD_ZYNQ_ENDPTxxx_IS_BIT_SET(p_reg->ENDPTPRIME, ep_phy_nbr)) {
+            CPU_CRITICAL_EXIT();
+            return (DEF_OK);
+        }
+
+        insert_nbr_tries = USBD_ZYNQ_dTD_LST_INSERT_NBR_TRIES_MAX;
+        insert_complete  = DEF_FALSE;
+        ep_status        = DEF_BIT_NONE;
+
+        while ((insert_complete  == DEF_FALSE) &&
+               (insert_nbr_tries >  0)) {
+                                                                /* (c) Set ATDTW bit in USBCMD register to '1'          */
+            DEF_BIT_SET(p_reg->USBCMD, USBD_ZYNQ_USBCMD_ATDTW);
+
+            ep_status = p_reg->ENDPTSTATUS;                     /* (d) Read correct status bits in ENDPSTATUS           */
+
+                                                                /* (e) Read ATDTW bit in USBCMD register ...            */
+            if (DEF_BIT_IS_SET(p_reg->USBCMD, USBD_ZYNQ_USBCMD_ATDTW)) {
+                insert_complete = DEF_TRUE;                     /* ... If '1' continue to (f)                           */
+            } else {
+                insert_nbr_tries--;                             /* ... If '0' goto (c)                                  */
+            }
+        }
+
+        if (insert_complete == DEF_FALSE) {
+
+            Mem_PoolBlkFree(         &p_drv_data->dTD_MemPool,
+                            (void  *) p_dtd,
+                                     &err_lib);
+
+            p_dqh->dTD_LstTailPtr              = p_dtd_last;
+            p_dqh->dTD_LstTailPtr->dTD_NextPtr = USBD_ZYNQ_dTD_dTD_NEXT_TERMINATE;
+            p_dqh->dTD_LstNbrEntries--;
+
+            CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_ZYNQ_dQH));
+
+            CPU_CRITICAL_EXIT();
+            return (DEF_FAIL);
+        }
+
+        insert_complete = DEF_TRUE;
+                                                                /* (f) Set ATDTW bit in USBCMD register to '0'          */
+        DEF_BIT_CLR(p_reg->USBCMD, USBD_ZYNQ_USBCMD_ATDTW);
+
+        if (USBD_ZYNQ_ENDPTxxx_IS_BIT_SET(ep_status, ep_phy_nbr)) {
+            CPU_CRITICAL_EXIT();
+            return (DEF_OK);                                    /* (g) If status bit read in (d) is '1' DONE            */
+        } else {
+                                                                /* (h) If status bit read in (d) is '0' goto Case 1     */
+            p_dqh->OverArea.dTD_NextPtr = (CPU_INT32U)p_dqh->dTD_LstHeadPtr;
+
+            DEF_BIT_CLR(p_dqh->OverArea.Token, USBD_ZYNQ_dTD_TOKEN_STATUS_MASK);
+
+            CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_ZYNQ_dQH));
+
+            USBD_ZYNQ_ENDPTxxx_BIT_WR(p_reg->ENDPTPRIME, ep_phy_nbr);
+        }
+    }
+
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                      USBD_Zynq_dTD_LstRd()
+*
+* Description : Read current dTD data buffer.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_phy_nbr  Endpoint physical number.
+*
+*               data_len    Data buffer length.
+*
+*               p_xfer_len  Pointer to variable that will receive transfer length.
+*
+*               p_len_rem   Pointer to variable that will receive the remaining length.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_Zynq_dTD_LstRd (USBD_DRV    *p_drv,
+                                          CPU_INT08U   ep_phy_nbr,
+                                          CPU_INT16U   data_len,
+                                          CPU_INT16U  *p_xfer_len,
+                                          CPU_INT16U  *p_len_rem)
+{
+    CPU_INT16U      ep_buf_len;
+    CPU_INT32U      ep_token;
+    USBD_ZYNQ_dQH  *p_dqh;
+    USBD_DRV_DATA  *p_drv_data;
+
+    CPU_SR_ALLOC();
+
+
+    p_drv_data = (USBD_DRV_DATA  *)p_drv->DataPtr;
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+    ep_token   =  p_dqh->dTD_LstHeadPtr->Token;
+
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_ZYNQ_dQH));   /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+
+                                                                /* Chk for err.                                         */
+    if (DEF_BIT_IS_SET_ANY(ep_token, USBD_ZYNQ_dTD_TOKEN_STATUS_ANY)) {
+        return (DEF_FAIL);
+    }
+
+                                                                /* Calc rx'd len.                                       */
+    ep_buf_len = (CPU_INT16U)(p_dqh->dTD_LstHeadPtr->BufLen -
+                            ((p_dqh->dTD_LstHeadPtr->Token  & USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTES_MASK) >> 16));
+
+   *p_len_rem  = (CPU_INT16U)0;
+   *p_xfer_len =  ep_buf_len;
+
+    CPU_CRITICAL_ENTER();
+    if (ep_buf_len != 0) {
+                                                                /* Chk rem data to read.                                */
+        if (ep_buf_len > data_len) {
+                                                                /* Update size & pointer to memory buffer.              */
+            p_dqh->dTD_LstHeadPtr->Token = ((p_dqh->dTD_LstHeadPtr->Token) & USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTES_MASK)
+                                         + ((ep_buf_len << 16)             & USBD_ZYNQ_dTD_TOKEN_TOTAL_BYTES_MASK);
+           *p_len_rem = ep_buf_len - data_len;
+        }
+    }
+
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_ZYNQ_dQH));        /* Write cached memory block back to RAM.               */
+
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     USBD_Zynq_dTD_LstEmpty()
+*
+* Description : This function flush the dTD list. All the dTD and Rx buffers are returned to the memory pool.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_phy_nbr  Endpoint physical number.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_Zynq_dTD_LstEmpty (USBD_DRV    *p_drv,
+                                             CPU_INT08U   ep_phy_nbr)
+{
+    USBD_DRV_DATA  *p_drv_data;
+    CPU_INT32U      ix;
+    CPU_INT32U      entries;
+    CPU_BOOLEAN     ok;
+    CPU_INT08U      ep_addr;
+
+
+    p_drv_data = (USBD_DRV_DATA  *)p_drv->DataPtr;
+
+    CPU_DCACHE_RANGE_FLUSH(&(p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries), sizeof(CPU_REG32));
+
+    entries    = p_drv_data->dQH_Tbl[ep_phy_nbr].dTD_LstNbrEntries;
+    ok         = DEF_OK;
+
+    for (ix = 0; ix < entries; ix++) {
+        ok = USBD_Zynq_dTD_LstRemove(p_drv, ep_phy_nbr);
+        if (ok == DEF_FAIL) {
+            break;
+        }
+    }
+
+    if (ep_phy_nbr % 2 == 0) {
+        ep_addr = USBD_ZYNQ_EP_PHY_TO_LOG_NBR(ep_phy_nbr);
+    } else {
+        ep_addr = USBD_ZYNQ_EP_PHY_TO_LOG_NBR(ep_phy_nbr) |
+                  USBD_EP_DIR_BIT;
+    }
+
+    if (entries > 0) {
+        USBD_DrvEP_Abort(p_drv, ep_addr);
+    }
+
+    return (ok);
+}
+
+
+/*
+*********************************************************************************************************
+*                                    USBD_Zynq_dTD_LstRemove()
+*
+* Description : Remove a dTD form the link list.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_phy_nbr  Endpoint physical number.
+*
+* Return(s)   : DEF_OK,   if NO error(s).
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Various.
+*
+* Note(s)     : (1) The link list before the Remove function will look like:
+*
+*                           +-----+      +-----+          +-----+
+*     dTD_LstHeadPtr -----> | dTD |----->| dTD |---....-->| dTD |---->
+*                           +--|--+      +--|--+          +--|--+
+*                              |            |                |
+*                              V            V                V
+*                          +--------+    +--------+       +--------+
+*                          |  dTD   |    |  dTD   |       |  dTD   |
+*                          | Buffer |    | Buffer |       | Buffer |
+*                          +--------+    +--------+       +--------+
+*                              0             1               N
+*
+*               after the USBD_Zynq_dTD_LstRemove is called the link list will look like:
+*
+*                      |--------------------|
+*                      | |            |     V
+*                      | |  +-----+   |  +-----+          +-----+
+*     dTD_LstHeadPtr --| |  | dTD |---|->| dTD |---....-->| dTD |---->
+*                        |  +--|--+   |  +--|--+          +--|--+
+*                        |     |      |     |                |
+*                        |     V      |     V                V
+*                        | +--------+ |  +--------+       +--------+
+*                        | |  dTD   | |  |  dTD   |       |  dTD   |
+*                        | | Buffer | |  | Buffer |       | Buffer |
+*                        | +--------+ |  +--------+       +--------+
+*                        |     0'     |     0                N -1
+*                        | return to  |
+*                        | memory pool|
+*
+*                                    +-----------+   +----------+
+*                p_ep_data --------->| EP Buffer | = |   dTD    |  ; *p_ep_trans_size = size of the dTD buffer.
+*                                    |           |   |  Buffer  |
+*                                    +-----------+   +----------+
+*                                                          0'
+*
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  USBD_Zynq_dTD_LstRemove (USBD_DRV    *p_drv,
+                                              CPU_INT08U   ep_phy_nbr)
+{
+    USBD_DRV_DATA  *p_drv_data;
+    USBD_ZYNQ_dQH  *p_dqh;
+    LIB_ERR         err_lib;
+    CPU_SR_ALLOC();
+
+
+    p_drv_data = (USBD_DRV_DATA  *)p_drv->DataPtr;
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_ZYNQ_dQH));   /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+
+    Mem_PoolBlkFree(         &p_drv_data->dTD_MemPool,          /* Return the head dTD to the memory pool               */
+                    (void  *) p_dqh->dTD_LstHeadPtr,
+                             &err_lib);
+
+    if (err_lib != LIB_MEM_ERR_NONE) {
+        return (DEF_FAIL);
+    }
+
+    CPU_CRITICAL_ENTER();
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_ZYNQ_dQH));   /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+    if (p_dqh->dTD_LstNbrEntries == 1) {
+        p_dqh->dTD_LstHeadPtr    = (USBD_ZYNQ_dTD_EXT *)USBD_ZYNQ_dTD_dTD_NEXT_TERMINATE;
+        p_dqh->dTD_LstTailPtr    = (USBD_ZYNQ_dTD_EXT *)USBD_ZYNQ_dTD_dTD_NEXT_TERMINATE;
+        p_dqh->dTD_LstNbrEntries = 0;
+    } else {
+        p_dqh->dTD_LstHeadPtr = (USBD_ZYNQ_dTD_EXT *)p_dqh->dTD_LstHeadPtr->dTD_NextPtr;
+        p_dqh->dTD_LstNbrEntries--;
+    }
+
+    CPU_DCACHE_RANGE_INV(p_dqh, sizeof(USBD_ZYNQ_dQH));        /* Write cached memory block back to RAM.               */
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                     USBD_Zynq_SetupProcess()
+*
+* Description : Process setup request.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+*               ep_log_nbr  Endpoint logical number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DrvISR_Handler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_Zynq_SetupProcess (USBD_DRV    *p_drv,
+                                      CPU_INT08U   ep_log_nbr)
+{
+    USBD_DRV_DATA  *p_drv_data;
+    USBD_ZYNQ_REG  *p_reg;
+    USBD_ZYNQ_dQH  *p_dqh;
+    CPU_INT08U      ep_phy_nbr;
+    CPU_INT08U      hw_rev;
+    CPU_INT32U      reg_to;
+    CPU_INT32U      setup_pkt[2];
+    CPU_BOOLEAN     sutw_set;
+
+
+    ep_phy_nbr =  USBD_ZYNQ_EP_OUT_LOG_TO_PHY_NBR(ep_log_nbr);
+    sutw_set   =  DEF_FALSE;
+    reg_to     =  USBD_ZYNQ_REG_TO;
+    p_drv_data = (USBD_DRV_DATA  *)p_drv->DataPtr;
+    p_reg      = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_dqh      = &p_drv_data->dQH_Tbl[ep_phy_nbr];
+
+    CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_ZYNQ_dQH));   /* Invalidate (clear) the cached RAM block, so that the */
+                                                                /* next CPU read will be from RAM again.                */
+
+        p_reg->ENDPTSETUPSTAT = DEF_BIT32(ep_log_nbr);
+
+        while ((sutw_set == DEF_FALSE) &&
+               (reg_to   >  0)) {
+                                                                /* (2) Write '1' to setup Tripwire                    */
+            DEF_BIT_SET(p_reg->USBCMD, USBD_ZYNQ_USBCMD_SUTW);
+
+            CPU_DCACHE_RANGE_FLUSH(p_dqh, sizeof(USBD_ZYNQ_dQH));
+
+                                                                /* (3) Duplicate contents of dQH.SetupBuf             */
+            setup_pkt[0] = p_dqh->SetupBuf[0];
+            setup_pkt[1] = p_dqh->SetupBuf[1];
+
+                                                                /* (4) Read Setup TripWire. If the bi is set ....    */
+                                                                /*     ... continue otherwise go to (2)              */
+            sutw_set = DEF_BIT_IS_SET(p_reg->USBCMD, USBD_ZYNQ_USBCMD_SUTW);
+            reg_to--;
+        }
+
+        if (reg_to == 0) {
+            return;
+        }
+
+        reg_to = USBD_ZYNQ_REG_TO;
+                                                                /* (5) Write '0' to clear setup Tripwire             */
+        DEF_BIT_CLR(p_reg->USBCMD, USBD_ZYNQ_USBCMD_SUTW);
+
+        while ((DEF_BIT_IS_SET(p_reg->ENDPTSETUPSTAT, DEF_BIT32(ep_log_nbr))) &&
+               (reg_to > 0)) {
+            reg_to--;
+        }
+
+        if (reg_to == 0) {
+            return;
+        }
+
+        USBD_Zynq_dTD_LstEmpty(p_drv, ep_phy_nbr);
+
+        USBD_EventSetup(p_drv, (void *)&setup_pkt);
+}
+
+
+/*
+*********************************************************************************************************
+*                                       USBD_Zynq_SoftRst()
+*
+* Description : Perform a soft reset :
+*                   (1) Initializes the dQH data structure for all endpoints.
+*                   (2) Creates dTD link list for endpoint 0
+*                   (3) Initializes the dTD data structure for all endpoints.
+*                   (4) Disable all endpoints except endpoint 0
+*                   (5) Clear all setup token semaphores by reading ENDPTSETUPSTAT register and writing
+*                       the same value back to the ENDPTSETUPSTAT register.
+*                   (6) Clear all endpoint complete status bits by reading the ENDPTCOMPLETE register
+*                       and writing the same value back to the ENDPTCOMPLETE register.
+*                   (7) Cancel all prime status by waiting until all bits in the ENDPRIME are 0 and the writing
+*                       0xFFFFFFFF to ENDPTFLUSH.
+*
+* Argument(s) : p_drv       Pointer to device driver structure.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DrvISR_Handler()
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  USBD_Zynq_SoftRst (USBD_DRV  *p_drv)
+{
+    USBD_DRV_DATA  *p_drv_data;
+    USBD_ZYNQ_REG  *p_reg;
+    CPU_INT32U      reg_to;
+    CPU_INT08U      ep_phy_nbr;
+    CPU_INT08U      ep_phy_nbr_max;
+    CPU_INT08U      ep_log_nbr;
+
+
+    p_reg          = (USBD_ZYNQ_REG *)(p_drv->CfgPtr->BaseAddr);
+    p_drv_data     = (USBD_DRV_DATA *)p_drv->DataPtr;
+    ep_phy_nbr_max = USBD_EP_MaxNbrOpenGet(p_drv->DevNbr);
+
+    if (ep_phy_nbr_max != USBD_EP_PHY_NONE) {
+        for (ep_phy_nbr = 0; ep_phy_nbr < ep_phy_nbr_max; ep_phy_nbr++) {
+
+            USBD_Zynq_dTD_LstEmpty(p_drv, ep_phy_nbr);
+
+            p_drv_data->dQH_Tbl[ep_phy_nbr].EpCap                = 0;
+            p_drv_data->dQH_Tbl[ep_phy_nbr].OverArea.dTD_NextPtr = USBD_ZYNQ_dTD_dTD_NEXT_TERMINATE;
+
+            Mem_Clr((void     *)&p_drv_data->dQH_Tbl[ep_phy_nbr].OverArea.Token,
+                    (CPU_SIZE_T)(sizeof(USBD_ZYNQ_dQH) - 2u));
+
+            CPU_DCACHE_RANGE_INV(&(p_drv_data->dQH_Tbl[ep_phy_nbr]), sizeof(USBD_ZYNQ_dQH));
+
+            ep_log_nbr = USBD_ZYNQ_EP_PHY_TO_LOG_NBR(ep_phy_nbr);
+            if ((ep_log_nbr != 0) &&
+                (DEF_BIT_IS_SET(p_reg->USBCMD,  USBD_ZYNQ_USBCMD_RUN))) {
+                p_reg->ENDPTCTRLx[ep_log_nbr] = USBD_ZYNQ_ENDPTCTRL_TX_TOGGLE_RST |
+                                                USBD_ZYNQ_ENDPTCTRL_RX_TOGGLE_RST;
+            }
+        }
+    }
+
+    (void)&(p_reg->ENDPTSETUPSTAT);
+    (void)&(p_reg->ENDPTCOMPLETE);
+
+    reg_to = USBD_ZYNQ_REG_TO;
+    while ((p_reg->ENDPTPRIME != DEF_BIT_NONE) &&
+           (reg_to            >  0)) {
+        reg_to--;
+    }
+
+    p_reg->ENDPTFLUSH = USBD_ZYNQ_ENDPTxxxx_TX_MASK |
+                        USBD_ZYNQ_ENDPTxxxx_RX_MASK;
+
+    reg_to = USBD_ZYNQ_REG_TO;
+    while ((p_reg->ENDPTSTATUS != DEF_BIT_NONE) &&
+           (reg_to             >  0)) {
+        p_reg->ENDPTFLUSH = USBD_ZYNQ_ENDPTxxxx_TX_MASK |
+                            USBD_ZYNQ_ENDPTxxxx_RX_MASK;
+        reg_to--;
+    }
+
+    if (DEF_BIT_IS_SET(p_reg->USBCMD,  USBD_ZYNQ_USBCMD_RUN)) {
+        p_reg->DEV_ADDR = DEF_BIT_NONE;
+    }
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_zynq.h b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_zynq.h
new file mode 100644
index 0000000..71f5d31
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/bsp/usbd_drv_zynq.h
@@ -0,0 +1,68 @@
+/*
+*********************************************************************************************************
+*                                            uC/USB-Device
+*                                       The Embedded USB Stack
+*
+*                         (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
+*
+*                  All rights reserved.  Protected by international copyright laws.
+*
+*                  uC/USB-Device is provided in source form to registered licensees ONLY.  It is
+*                  illegal to distribute this source code to any third party unless you receive
+*                  written permission by an authorized Micrium representative.  Knowledge of
+*                  the source code may NOT be used to develop a similar product.
+*
+*                  Please help us continue to provide the Embedded community with the finest
+*                  software available.  Your honesty is greatly appreciated.
+*
+*                  You can find our product's user manual, API reference, release notes and
+*                  more information at: https://doc.micrium.com
+*
+*                  You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                          USB DEVICE DRIVER
+*
+*                                          XILINX  ZYNQ-7000
+*
+* File          : usbd_drv_zynq.h
+* Version       : V4.04.00.00
+* Programmer(s) : FGK
+*                 JPB
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*
+* Note(s) : (1) This USB device driver function header file is protected from multiple pre-processor
+*               inclusion through use of the USB device driver module present pre-processor macro
+*               definition.
+*********************************************************************************************************
+*/
+
+#ifndef  USBD_DRV_ZYNQ_MODULE_PRESENT                           /* See Note #1.                                         */
+#define  USBD_DRV_ZYNQ_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                          USB DEVICE DRIVER
+*********************************************************************************************************
+*/
+
+extern  USBD_DRV_API  USBD_DrvAPI_Zynq;
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbd/src/usbd_storage.h b/src/ucos_v1_42/ucos/components/ucos_usbd/src/usbd_storage.h
new file mode 100644
index 0000000..b55802a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbd/src/usbd_storage.h
@@ -0,0 +1,40 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                       (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+* Filename      : usbd_storage.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+#if (UCOS_USBD_STORAGE_DRV == UCOS_USBD_STORAGE_DRV_FS)
+#include "Class/MSC/Storage/uC-FS/V4/usbd_storage.h"
+#else
+#include "Class/MSC/Storage/RAMDisk/usbd_storage.h"
+#endif
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbh/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_usbh/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbh/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbh/src/bsp/usbh_bsp_zynq_ehci.c b/src/ucos_v1_42/ucos/components/ucos_usbh/src/bsp/usbh_bsp_zynq_ehci.c
new file mode 100644
index 0000000..a4f6ee4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbh/src/bsp/usbh_bsp_zynq_ehci.c
@@ -0,0 +1,330 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           XILINX ZYNQ-7000
+*                             		 EXAMPLE BSP ON THE AVNET ZEBOARD
+*
+* File           : usbh_bsp_ehci.h
+* Version        : V3.41.02
+* Programmer(s)  : CM
+*********************************************************************************************************
+*/
+
+#define  USBH_EHCI_ZYNQ7000_MODULE
+
+
+/*
+**************************************************************************************************************
+*                                            INCLUDE FILES
+**************************************************************************************************************
+*/
+
+#define   MICRIUM_SOURCE
+#include  
+#include  
+#include  
+
+#include  "usbh_bsp_zynq_ehci.h"
+
+#include  
+
+#if (XPAR_UCOS_USBPS_NUM_INSTANCES > 0)
+#include  
+#include  
+
+#ifdef UCOS_USB_DEVICE_ID
+
+/*
+**************************************************************************************************************
+*                                            LOCAL DEFINES
+**************************************************************************************************************
+*/
+
+extern UCOS_USBPS_Config UCOS_USBPS_ConfigTable[];
+
+/*
+**************************************************************************************************************
+*                                           LOCAL CONSTANTS
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+*                                          LOCAL DATA TYPES
+**************************************************************************************************************
+*/
+
+typedef struct zynq7000_ehci_bsp_isr_info {
+	CPU_FNCT_PTR   ISRFnct;       								/* HC Drv ISR ptr.										*/
+	void          *ISRArg;        								/* HC Drv ISR arg.										*/
+} ZYNQ7000_EHCI_BSP_ISR_INFO;
+
+
+/*
+**************************************************************************************************************
+*                                            LOCAL TABLES
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+**************************************************************************************************************
+*/
+
+static  void  ZYNQ7000_EHCI_BSP_InitUSB0     (USBH_HC_DRV   *p_hc_drv,
+                                              USBH_ERR      *p_err);
+
+static  void  ZYNQ7000_EHCI_BSP_ISR_RegUSB0  (CPU_FNCT_PTR   isr_fnct,
+                                              USBH_ERR      *p_err);
+
+static  void  ZYNQ7000_EHCI_BSP_ISR_UnregUSB0(USBH_ERR      *p_err);
+
+static  void  ZYNQ7000_EHCI_BSP_ISR          (void          *p_int_arg,
+											  CPU_INT32U     cpu_id);
+
+
+/*
+**************************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+**************************************************************************************************************
+*/
+
+USBH_HC_BSP_API  USBH_HC_BSP_API_ZYNQ_EHCI_USB =
+{
+    ZYNQ7000_EHCI_BSP_InitUSB0,
+    ZYNQ7000_EHCI_BSP_ISR_RegUSB0,
+    ZYNQ7000_EHCI_BSP_ISR_UnregUSB0
+};
+
+static  ZYNQ7000_EHCI_BSP_ISR_INFO  ZYNQ7000_EHCI_BSP_ISR_InfoTbl[2u];
+
+
+/*
+**************************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+*                   INITIALIZED GLOBAL VARIABLES ACCESSES BY OTHER MODULES/OBJECTS
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+**************************************************************************************************************
+*                                           GLOBAL FUNCTION
+**************************************************************************************************************
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+**************************************************************************************************************
+*                                           LOCAL FUNCTION
+**************************************************************************************************************
+**************************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     ZYNQ7000_EHCI_BSP_InitUSB0()
+*
+* Description : Performs board specific initialization for USB host controller.
+*
+* Argument(s) : p_hc_drv       Pointer to host controller driver structure
+*
+*               p_err          Pointer to variable that will receive the return error code from this function
+*
+*                              USBH_ERR_NONE    Initialization successful.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HCD Init() function via p_bsp_api->Init().
+*
+* Note(s)     : (1) The vast majority of the controller logic is driven by the 60 MHz clock from the
+* 					ULPI PHY. The controller's interconnect is driven by the AHB/APB interface CPU_1x
+* 					clock which is generated by the PS clock subsystem.
+* 					The CPU_1x is configured through some registers from the System Level Control
+* 					Registers (SLCR) module.
+* 					The initialization code generated by Vivado for the ZedBoard already configures
+* 					the required clock. The HTML file ps7_init.html contained in the Board Hardware
+* 					Platform project summarizes the USB0 clock settings initialized in ps7_init.c.
+*
+* 					See section '15.15.1 Clocks' of 'Zynq-7000 AP SoC Technical Reference Manual,
+* 					UG585 (v1.5) March 7, 2013' for more details about the USB0 I/O configuration.
+*
+* 				(2) I/O configuration: USB controller has multiple I/O interfaces including the main
+* 					ULPI that interfaces via MIO to the external PHY and the port indicator and power
+* 					signals via EMIO. The routing of the ULPI through the MIO must be programmed. The
+* 					routing of the signals through the EMIO is always available to logic in the PL that
+* 					can route these signals to the SelectIO pins.
+* 					The ULPI I/O interface is configured through some registers from the System Level
+* 					Control Registers (SLCR) module.
+* 					The initialization code generated by Vivado for the ZedBoard already configures
+* 					the required I/O. The HTML file ps7_init.html contained in the Board Hardware
+* 					Platform project summarizes the USB0 I/O settings initialized in ps7_init.c.
+*
+* 					See section '15.16 I/O Interfaces' of 'Zynq-7000 AP SoC Technical Reference Manual,
+* 					UG585 (v1.5) March 7, 2013' for more details about the USB0 I/O configuration.
+*
+* 				(3) On ZedBoard, Vbus 5V Enable is controlled directly on the board via the jumper JP2.
+* 					This jumper must be shorted. No need to enable Vbus through a I/O.
+*
+* 					See section '4 Jumper Settings' of 'ZedBoard Hardware User’s Guide' available at
+* 					http://zedboard.org/sites/default/files/documentations/ZedBoard_HW_UG_v2_2.pdf
+*********************************************************************************************************
+*/
+
+static  void  ZYNQ7000_EHCI_BSP_InitUSB0 (USBH_HC_DRV  *p_hc_drv,
+                                          USBH_ERR     *p_err)
+{
+																/* Clock Cfg (see Note #1).								*/
+																/* I/O Cfg (see Note #2).								*/
+																/* Vbus 5V Enable (see Note #3).						*/
+
+	ZYNQ7000_EHCI_BSP_ISR_InfoTbl[0u].ISRArg = (void *)p_hc_drv;
+
+   *p_err = USBH_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    ZYNQ7000_EHCI_BSP_ISR_RegUSB0()
+*
+* Description : This function registers the Interrupt Service Routine.
+*
+* Argument(s) : isr_fnct     Host controller ISR address.
+*
+*               p_err        Pointer to variable that will receive the return error code from this function
+*
+*                           USBH_ERR_NONE     Initialization successful.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HCD Start() function via p_bsp_api->ISR_Reg().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  ZYNQ7000_EHCI_BSP_ISR_RegUSB0 (CPU_FNCT_PTR   isr_fnct,
+                                             USBH_ERR      *p_err)
+{
+    CPU_INT32U irq_id;
+
+
+	ZYNQ7000_EHCI_BSP_ISR_InfoTbl[0u].ISRFnct = isr_fnct;
+
+	irq_id = UCOS_USBPS_ConfigTable[UCOS_USB_DEVICE_ID].IntSource;
+
+    UCOS_IntVectSet(irq_id,
+                    0u,
+                    0u,
+                    ZYNQ7000_EHCI_BSP_ISR,
+                    (void *)&ZYNQ7000_EHCI_BSP_ISR_InfoTbl[0u]);
+
+    UCOS_IntSrcEn(irq_id);
+
+   *p_err = USBH_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   ZYNQ7000_EHCI_BSP_ISR_UnregUSB0()
+*
+* Description : This function disables the main USB interrupt.
+*
+* Argument(s) : p_err   Pointer to variable that will receive the return error code from this function
+*
+*                       USBH_ERR_NONE       Initialization success.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : HCD Stop() function via p_bsp_api->ISR_Unreg().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  ZYNQ7000_EHCI_BSP_ISR_UnregUSB0 (USBH_ERR  *p_err)
+{
+    CPU_INT32U irq_id;
+
+
+    irq_id = UCOS_USBPS_ConfigTable[UCOS_USB_DEVICE_ID].IntSource;
+
+    UCOS_IntSrcDis(irq_id);
+
+   *p_err = USBH_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                     ZYNQ7000_EHCI_BSP_ISR()
+*
+* Description : Interrupt Service Routine.
+*
+* Argument(s) : None.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : Hardware.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static void  ZYNQ7000_EHCI_BSP_ISR (void        *p_int_arg,
+									CPU_INT32U   cpu_id)
+{
+	ZYNQ7000_EHCI_BSP_ISR_INFO  *p_isr_info;
+
+	(void)&cpu_id;
+
+	p_isr_info = (ZYNQ7000_EHCI_BSP_ISR_INFO *)p_int_arg;
+
+    if (p_isr_info->ISRFnct != (CPU_FNCT_PTR )0) {
+
+    	p_isr_info->ISRFnct(p_isr_info->ISRArg);				/* Call HC drv ISR.                 					*/
+    }
+}
+
+
+/*
+**************************************************************************************************************
+*                                                  END
+**************************************************************************************************************
+*/
+
+#endif /* (XPAR_UCOS_USBPS_NUM_INSTANCES > 0) */
+
+#endif /* #ifdef UCOS_USB_DEVICE_ID */
diff --git a/src/ucos_v1_42/ucos/components/ucos_usbh/src/bsp/usbh_bsp_zynq_ehci.h b/src/ucos_v1_42/ucos/components/ucos_usbh/src/bsp/usbh_bsp_zynq_ehci.h
new file mode 100644
index 0000000..f6155e4
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_usbh/src/bsp/usbh_bsp_zynq_ehci.h
@@ -0,0 +1,117 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                           XILINX ZYNQ-7000
+*                             		 EXAMPLE BSP ON THE AVNET ZEBOARD
+*
+* File           : usbh_bsp_ehci.h
+* Version        : V3.41.02.00
+* Programmer(s)  : CM
+*********************************************************************************************************
+*/
+
+#ifndef  USBH_ZYNQ7000_H
+#define  USBH_ZYNQ7000_H
+
+#if  defined  _cplusplus
+extern "C" {
+#endif
+
+/*
+**************************************************************************************************************
+*                                              INCLUDE FILES
+**************************************************************************************************************
+*/
+
+#include  
+
+
+/*
+**************************************************************************************************************
+*                                                 EXTERNS
+**************************************************************************************************************
+*/
+
+#ifdef   USBH_EHCI_ZYNQ7000_MODULE
+#define  USBH_ZYNQ7000_EXT
+#else
+#define  USBH_ZYNQ7000_EXT  extern
+#endif
+
+
+/*
+**************************************************************************************************************
+*                                                 CONSTANTS
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+*                                                 DEFINES
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+*                                               DATA TYPES
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+*                                            GLOBAL VARIABLES
+**************************************************************************************************************
+*/
+
+USBH_ZYNQ7000_EXT  USBH_HC_BSP_API  USBH_HC_BSP_API_ZYNQ_EHCI_USB;
+
+
+/*
+**************************************************************************************************************
+*                                                 MACRO'S
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+*                                           FUNCTION PROTOTYPES
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+*                                          CONFIGURATION ERRORS
+**************************************************************************************************************
+*/
+
+
+/*
+**************************************************************************************************************
+*                                               END
+**************************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/doc/html/api/index.html b/src/ucos_v1_42/ucos/components/ucos_utils_perf/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/app_bench.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/app_bench.c
new file mode 100644
index 0000000..2e55c50
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/app_bench.c
@@ -0,0 +1,226 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     BENCHMARK APPLICATION CODE
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : app_bench.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+#include  
+#include  
+#include  
+
+
+#include  "bench.h"
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+void    *BenchSGIFunc;
+
+
+/*
+*********************************************************************************************************
+*                                             BenchResInit()
+*
+* Description : Initialize a benchmark result.
+*
+* Arguments   : none.
+*
+* Returns     : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void BenchResInit(BENCH_RES *res)
+{
+    res->BenchName = "";
+    res->TotalTime = 0u;
+    res->IterCnt = 0u;
+    res->Avg = 0u;
+    res->Max = 0u;
+    res->Min = -1u;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          BenchResUpdate()
+*
+* Description : Update a benchmark result.
+*
+* Arguments   : none.
+*
+* Returns     : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void BenchResUpdate(BENCH_RES *res, BENCH_TS_TMR iter_time)
+{
+    res->TotalTime += iter_time;
+    res->IterCnt++;
+
+    if(iter_time > res->Max) {
+        res->Max = iter_time;
+    }
+
+    if(iter_time < res->Min) {
+        res->Min = iter_time;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                            BenchResFin()
+*
+* Description : Finalize a benchmark result.
+*
+* Arguments   : none.
+*
+* Returns     : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void BenchResFin(BENCH_RES *res)
+{
+    res->Avg = res->TotalTime / res->IterCnt;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            BenchResPrint()
+*
+* Description : Print/Save a benchmark result.
+*
+* Arguments   : none.
+*
+* Returns     : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void BenchResPrint(BENCH_RES *res)
+{
+    UCOS_Printf("--------------------------------------------------------------\r\n");
+    UCOS_Printf("%s:\r\n", res->BenchName);
+    UCOS_Printf("Iteration: %d Average: %d Max: %d Min %d\r\n", res->IterCnt, (CPU_INT32U)res->Avg * 2, (CPU_INT32U)res->Max * 2, (CPU_INT32U)res->Min * 2);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            BenchSGITrig()
+*
+* Description : Trigger a software generated interrupt.
+*
+* Arguments   : none.
+*
+* Returns     : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  BenchSGITrig()
+{
+	SCUGIC_SGITrig(1, DEF_BIT_00);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            BenchSGIReg()
+*
+* Description : Dynamically register an SGI handler.
+*
+* Arguments   : none.
+*
+* Returns     : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  BenchSGIReg (void * func)
+{
+    BenchSGIFunc = func;
+    UCOS_IntVectSet(1, 0, DEF_BIT_00, BenchSGIHandler, DEF_NULL);
+    UCOS_IntSrcEn(1);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          BenchSGIHandler()
+*
+* Description : Generic SGI handler.
+*
+* Arguments   : none.
+*
+* Returns     : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  BenchSGIHandler(void *p_arg, CPU_INT32U cpu_id)
+{
+    OSIntNestingCtr++;
+
+    (*((void (*)(void))BenchSGIFunc))();
+
+    OSIntExit();
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench.c
new file mode 100644
index 0000000..285c4f8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench.c
@@ -0,0 +1,167 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+#include  
+
+#include  "bench.h"
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  bench_ctxsw               (void);
+void  bench_sempost             (void);
+void  bench_sempend             (void);
+void  bench_sempost_noctxsw     (void);
+void  bench_sempend_noctxsw     (void);
+void  bench_tasksempost         (void);
+void  bench_tasksempend         (void);
+void  bench_tasksempost_noctxsw (void);
+void  bench_tasksempend_noctxsw (void);
+void  bench_qpost               (void);
+void  bench_qpend               (void);
+void  bench_qpost_noctxsw       (void);
+void  bench_qpend_noctxsw       (void);
+void  bench_taskqpost           (void);
+void  bench_taskqpend           (void);
+void  bench_taskqpost_noctxsw   (void);
+void  bench_taskqpend_noctxsw   (void);
+void  bench_flagpost            (void);
+void  bench_flagpend            (void);
+void  bench_flagpost_noctxsw    (void);
+void  bench_flagpend_noctxsw    (void);
+void  bench_isrctxsw            (void);
+void  bench_isrresp             (void);
+void  bench_isrrecovery         (void);
+void  bench_isrsempost          (void);
+void  bench_memcpy              (void);
+void  bench_memcpy_libc         (void);
+void  bench_memcpy_ocram_src    (void);
+void  bench_memcpy_ocram_src_libc (void);
+void  bench_memcpy_ocram_dest   (void);
+void  bench_memcpy_ocram_dest_libc (void);
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+CPU_FNCT_VOID BenchTestList[] = {
+    bench_ctxsw,
+    bench_sempost,
+    bench_sempend,
+    bench_sempost_noctxsw,
+    bench_sempend_noctxsw,
+#ifndef HWOS_OS_VERSION
+    bench_tasksempost,
+    bench_tasksempend,
+    bench_tasksempost_noctxsw,
+    bench_tasksempend_noctxsw,
+#endif
+    bench_qpost,
+    bench_qpend,
+    bench_qpost_noctxsw,
+    bench_qpend_noctxsw,
+#ifndef HWOS_OS_VERSION
+    bench_taskqpost,
+    bench_taskqpend,
+    bench_taskqpost_noctxsw,
+    bench_taskqpend_noctxsw,
+#endif
+    bench_flagpost,
+    bench_flagpend,
+    bench_flagpost_noctxsw,
+    bench_flagpend_noctxsw,
+    bench_isrctxsw,
+    bench_isrresp,
+    bench_isrrecovery,
+    bench_isrsempost,
+    bench_memcpy,
+    bench_memcpy_libc,
+    bench_memcpy_ocram_src,
+    bench_memcpy_ocram_src_libc,
+    bench_memcpy_ocram_dest,
+    bench_memcpy_ocram_dest_libc,
+    DEF_NULL,
+};
+
+
+/*
+*********************************************************************************************************
+*                                             BenchRun()
+*
+* Description : Run the listed benchmarks.
+*
+* Arguments   : none.
+*
+* Returns     : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  BenchRun (void)
+{
+    CPU_FNCT_VOID *p_bench_test;
+
+
+    p_bench_test = &BenchTestList[0];
+
+    while(*p_bench_test != DEF_NULL) {
+        (*p_bench_test)();
+
+        p_bench_test++;
+    }
+}
+
+
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench.h b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench.h
new file mode 100644
index 0000000..4ed3068
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench.h
@@ -0,0 +1,75 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench.h
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  "bench_cfg.h"
+
+typedef struct bench_res {
+    CPU_CHAR       *BenchName;
+    BENCH_TS_TMR    TotalTime;
+    BENCH_TS_TMR    Avg;
+    BENCH_TS_TMR    Min;
+    BENCH_TS_TMR    Max;
+    CPU_INT32U      IterCnt;
+} BENCH_RES;
+
+
+void  BenchResInit       (BENCH_RES    *res);
+
+void  BenchResUpdate     (BENCH_RES    *res,
+                       BENCH_TS_TMR  iter_time);
+
+void  BenchResFin   (BENCH_RES    *res);
+
+void  BenchResPrint      (BENCH_RES    *res);
+
+void  BenchSGITrig    (void);
+
+void  BenchSGIReg     (void         * func);
+
+void  BenchSGIHandler (void *p_arg, CPU_INT32U cpu_id);
+
+void  BenchRun        (void);
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_cfg.h b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_cfg.h
new file mode 100644
index 0000000..45aa8c3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_cfg.h
@@ -0,0 +1,61 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                     BENCHMARK APPLICATION CODE
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_cfg.h
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+typedef  CPU_INT64U  BENCH_TS_TMR;                              /* Benchmark timer typedef                              */
+
+#define  BENCH_TS_GET() (CPU_TS_TmrRd())                        /* Benchmark timestamp source                           */
+
+
+#define  BENCH_CFG_ITER_CNT 100u                                /* Number of iteration                                  */
+
+#define  BENCH_CFG_WARMUP_ITER_CNT 10u                          /* Number of warm-up iterations                         */
+
+#define  BENCH_CFG_MEMCPY_SRC 0x30000000                        /* Memory copy benchmark source address                 */
+
+#define  BENCH_CFG_MEMCPY_DEST 0x38000000                       /* Memory copy benchmark destination address            */
+
+#define  BENCH_CFG_MEMCPY_OCRAM_ADDR 0xFFFF0000                 /* Memory copy benchmark OCRAM address                  */
+
+#define  BENCH_CFG_MEMCPY_OCRAM_SIZE 0x20000                    /* Memory copy benchmark OCRAM size                     */
+
+#define  BENCH_CFG_MEMCPY_SIZE 0x2000000                        /* Memory copy benchmark size                           */
+
+#define  BENCH_CFG_MEMCPY_WARMUP_ITER_CNT 2u                    /* Memory copy benchmark warmup iterations              */
+
+#define  BENCH_CFG_MEMCPY_ITER_CNT 10u                          /* Memory copy benchmark iteration                      */
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_ctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_ctxsw.c
new file mode 100644
index 0000000..84e2215
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_ctxsw.c
@@ -0,0 +1,190 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_ctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+#include  "bench.h"
+
+
+static  OS_TCB   Task1TCB;
+static  CPU_STK  Task1Stk[4096];
+
+static  OS_TCB   Task2TCB;
+static  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static BENCH_TS_TMR t2, t;
+static volatile BENCH_TS_TMR t1;
+
+static CPU_INT32U iter_cnt;
+
+static BENCH_RES res;
+
+void bench_ctxsw ()
+{
+    OS_ERR  os_err;
+
+
+    BenchResInit(&res);
+
+    res.BenchName = "Context Switch (Task-Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+#ifndef HWOS_OS_VERSION
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        Task1TCB.TaskState  =  OS_TASK_STATE_SUSPENDED;
+        Task1TCB.SuspendCtr = (OS_NESTING_CTR)1;
+        OS_RdyListRemove(&Task1TCB);
+        OSSched();
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        Task1TCB.SuspendCtr--;
+        Task1TCB.TaskState = OS_TASK_STATE_RDY;
+        OS_RdyListInsert(&Task1TCB);
+
+        t1 = BENCH_TS_GET();
+        OSSched();
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+#else /* HWOS_OS_VERSION */
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        OS_HWOS_SET_R5(0xFFFFFFFF);
+        OS_HWOS_SET_SYSC(OS_HWOS_TSFNC_SLP_TSK);
+
+        OS_HWOS_CMD_PROC();
+        OS_HWOS_TASK_SYNC();
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        OS_HWOS_SET_R4(Task1TCB.CtxID);
+        OS_HWOS_SET_SYSC(OS_HWOS_TSFNC_WUP_TSK);
+
+        t1 = BENCH_TS_GET();
+        OS_HWOS_CMD_PROC();
+        OS_HWOS_TASK_SYNC();
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+#endif /* HWOS_OS_VERSION */
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpend.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpend.c
new file mode 100644
index 0000000..37f3457
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpend.c
@@ -0,0 +1,144 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_flagpend.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+extern  OS_TCB   Task2TCB;
+extern  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static OS_FLAG_GRP flag;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+static BENCH_RES res;
+
+void bench_flagpend ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Flag Pend with Context Switch (Task-Task)";
+
+    OSFlagCreate(&flag, "", 0u, &os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        OSFlagPend(&flag, DEF_BIT_00, 0u, OS_OPT_PEND_FLAG_SET_ANY | OS_OPT_PEND_FLAG_CONSUME, DEF_NULL, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+        OSFlagPost(&flag, DEF_BIT_00, OS_OPT_POST_FLAG_SET, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpend_noctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpend_noctxsw.c
new file mode 100644
index 0000000..a8cefeb
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpend_noctxsw.c
@@ -0,0 +1,115 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_flagpend_noctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static OS_FLAG_GRP flag;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+static BENCH_RES res;
+
+void bench_flagpend_noctxsw ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Flag Pend without Context Switch (Task)";
+
+    OSFlagCreate(&flag, "", 0u, &os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    OSFlagPost(&flag, DEF_BIT_00, OS_OPT_POST_FLAG_SET, &os_err);
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+                OSFlagPend(&flag, DEF_BIT_00, 0u, OS_OPT_PEND_FLAG_SET_ANY, DEF_NULL, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpost.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpost.c
new file mode 100644
index 0000000..596df08
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpost.c
@@ -0,0 +1,145 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_flagpost.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+extern  OS_TCB   Task2TCB;
+extern  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static OS_FLAG_GRP flag;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+static BENCH_RES res;
+
+void bench_flagpost ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Flag Post with Context Switch (Task-Task)";
+
+    OSFlagCreate(&flag, "", 0u, &os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        OSFlagPend(&flag, DEF_BIT_00, 0u, OS_OPT_PEND_FLAG_SET_ANY | OS_OPT_PEND_FLAG_CONSUME, DEF_NULL, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        t1 = BENCH_TS_GET();
+        OSFlagPost(&flag, DEF_BIT_00, OS_OPT_POST_FLAG_SET, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpost_noctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpost_noctxsw.c
new file mode 100644
index 0000000..4da7070
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_flagpost_noctxsw.c
@@ -0,0 +1,113 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_flagpost_noctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static OS_FLAG_GRP flag;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+static BENCH_RES res;
+
+void bench_flagpost_noctxsw ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Flag Post without Context Switch (Task)";
+
+    OSFlagCreate(&flag, "", 0u, &os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        OSFlagPost(&flag, DEF_BIT_00, OS_OPT_POST_FLAG_SET, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_global.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_global.c
new file mode 100644
index 0000000..fcf470c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_global.c
@@ -0,0 +1,58 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_global.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+OS_TCB   Task1TCB;
+CPU_STK  Task1Stk[4096];
+
+OS_TCB   Task2TCB;
+CPU_STK  Task2Stk[4096];
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrctxsw.c
new file mode 100644
index 0000000..1fcc246
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrctxsw.c
@@ -0,0 +1,149 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_isrctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+static  OS_TCB   Task1TCB;
+static  CPU_STK  Task1Stk[4096];
+
+static  OS_TCB   Task2TCB;
+static  CPU_STK  Task2Stk[4096];
+
+static void Task1 (void);
+static void Task2 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static volatile CPU_INT32U iter_cnt;
+
+static BENCH_RES res;
+
+void bench_isrctxsw ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Context Switch (ISR-Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+        OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void BenchISRFunc (void)
+{
+    OS_ERR os_err;
+
+
+    OSTaskResume(&Task1TCB, &os_err);
+    t1 = BENCH_TS_GET();
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+        OSTaskSuspend(DEF_NULL, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    BenchSGIReg((void *)BenchISRFunc);
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        BenchSGITrig();
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrrecovery.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrrecovery.c
new file mode 100644
index 0000000..3545aa6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrrecovery.c
@@ -0,0 +1,116 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_isrrecovery.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+static  OS_TCB   Task1TCB;
+static  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+static BENCH_RES res;
+
+void bench_isrrecovery ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Interrupt Recovery Time";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void BenchISRFunc (void)
+{
+    t1 = BENCH_TS_GET();
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    BenchSGIReg((void *)BenchISRFunc);
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        BenchSGITrig();
+        CPU_MB();
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrresp.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrresp.c
new file mode 100644
index 0000000..1a7f5ee
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrresp.c
@@ -0,0 +1,115 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_isrresp.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+static  OS_TCB   Task1TCB;
+static  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+static BENCH_RES res;
+
+void bench_isrresp ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Interrupt Response Time";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void BenchISRFunc (void)
+{
+    t2 = BENCH_TS_GET();
+    t = t2 - t1;
+    if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+        BenchResUpdate(&res, t);
+    }
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    BenchSGIReg((void *)BenchISRFunc);
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        BenchSGITrig();
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrsempost.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrsempost.c
new file mode 100644
index 0000000..60c4753
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_isrsempost.c
@@ -0,0 +1,159 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_isrsempost.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+static  OS_TCB   Task1TCB;
+static  CPU_STK  Task1Stk[4096];
+
+static  OS_TCB   Task2TCB;
+static  CPU_STK  Task2Stk[4096];
+
+static void Task1 (void);
+static void Task2 (void);
+
+static OS_SEM sem;
+
+static volatile BENCH_TS_TMR t1, t2;
+
+static BENCH_TS_TMR t;
+
+static BENCH_RES res;
+
+void bench_isrsempost ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    OSSemCreate(&sem, "", 0u, &os_err);
+
+    res.BenchName = "Semaphore Post (ISR)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+        OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    OSSemDel(&sem, 0u, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void BenchISRFunc (void)
+{
+    OS_ERR os_err;
+    static CPU_INT32U iter_cnt = 0;
+
+    t1 = BENCH_TS_GET();
+    OSSemPost(&sem, 0u, &os_err);
+    t2 = BENCH_TS_GET();
+    t = t1;
+    t = t2 - t;
+    if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+        BenchResUpdate(&res, t);
+    }
+    iter_cnt++;
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR     os_err;
+    CPU_INT32U iter_cnt;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        OSSemPend(&sem, 0u, 0u, DEF_NULL, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR     os_err;
+    CPU_INT32U iter_cnt;
+
+    BenchSGIReg((void *)BenchISRFunc);
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        BenchSGITrig();
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy.c
new file mode 100644
index 0000000..1606641
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy.c
@@ -0,0 +1,114 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_memcpy.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+#include  
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_memcpy ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Memory copy (lib_mem)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+    UCOS_Printf("Average bandwidth %d\r\n", (CPU_INT32U)((double)BENCH_CFG_MEMCPY_SIZE / ((double)(res.Avg) / (double)CPU_TS_TmrFreq_Hz )) / (1024 * 1024));
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_MEMCPY_ITER_CNT + BENCH_CFG_MEMCPY_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        Mem_Copy((void *)BENCH_CFG_MEMCPY_DEST, (void *)BENCH_CFG_MEMCPY_SRC, BENCH_CFG_MEMCPY_SIZE);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_MEMCPY_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_libc.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_libc.c
new file mode 100644
index 0000000..da5652d
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_libc.c
@@ -0,0 +1,114 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_memcpy_libc.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+#include  
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_memcpy_libc ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Memory copy (libc)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+    UCOS_Printf("Average bandwidth %d\r\n", (CPU_INT32U)((double)BENCH_CFG_MEMCPY_SIZE / ((double)(res.Avg) / (double)CPU_TS_TmrFreq_Hz )) / (1024 * 1024));
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_MEMCPY_ITER_CNT + BENCH_CFG_MEMCPY_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        memcpy((void *)BENCH_CFG_MEMCPY_DEST, (void *)BENCH_CFG_MEMCPY_SRC, BENCH_CFG_MEMCPY_SIZE);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_MEMCPY_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_dest.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_dest.c
new file mode 100644
index 0000000..0890192
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_dest.c
@@ -0,0 +1,114 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_memcpy_ocram_dest.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+#include  
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_memcpy_ocram_dest ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Memory copy OCRAM dest (lib_mem)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+    UCOS_Printf("Average bandwidth %d\r\n", (CPU_INT32U)((double)BENCH_CFG_MEMCPY_OCRAM_SIZE / ((double)(res.Avg) / (double)CPU_TS_TmrFreq_Hz )) / (1024 * 1024));
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_MEMCPY_ITER_CNT + BENCH_CFG_MEMCPY_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        Mem_Copy((void *)BENCH_CFG_MEMCPY_OCRAM_ADDR, (void *)BENCH_CFG_MEMCPY_SRC, BENCH_CFG_MEMCPY_OCRAM_SIZE);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_MEMCPY_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_dest_libc.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_dest_libc.c
new file mode 100644
index 0000000..24d5fbf
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_dest_libc.c
@@ -0,0 +1,114 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_memcpy_ocram_dest.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+#include  
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_memcpy_ocram_dest_libc ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Memory copy OCRAM dest (libc)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+    UCOS_Printf("Average bandwidth %d\r\n", (CPU_INT32U)((double)BENCH_CFG_MEMCPY_OCRAM_SIZE / ((double)(res.Avg) / (double)CPU_TS_TmrFreq_Hz )) / (1024 * 1024));
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_MEMCPY_ITER_CNT + BENCH_CFG_MEMCPY_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        memcpy((void *)BENCH_CFG_MEMCPY_OCRAM_ADDR, (void *)BENCH_CFG_MEMCPY_SRC, BENCH_CFG_MEMCPY_OCRAM_SIZE);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_MEMCPY_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_src.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_src.c
new file mode 100644
index 0000000..1173180
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_src.c
@@ -0,0 +1,114 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_memcpy_ocram_src.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+#include  
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_memcpy_ocram_src ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Memory copy OCRAM src (lib_mem)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+    UCOS_Printf("Average bandwidth %d\r\n", (CPU_INT32U)((double)BENCH_CFG_MEMCPY_OCRAM_SIZE / ((double)(res.Avg) / (double)CPU_TS_TmrFreq_Hz )) / (1024 * 1024));
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_MEMCPY_ITER_CNT + BENCH_CFG_MEMCPY_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        Mem_Copy((void *)BENCH_CFG_MEMCPY_DEST, (void *)BENCH_CFG_MEMCPY_OCRAM_ADDR, BENCH_CFG_MEMCPY_OCRAM_SIZE);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_MEMCPY_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_src_libc.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_src_libc.c
new file mode 100644
index 0000000..24ba643
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_memcpy_ocram_src_libc.c
@@ -0,0 +1,114 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_memcpy_ocram_src_libc.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+#include  
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_memcpy_ocram_src_libc ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Memory copy OCRAM src (libc)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+    UCOS_Printf("Average bandwidth %d\r\n", (CPU_INT32U)((double)BENCH_CFG_MEMCPY_OCRAM_SIZE / ((double)(res.Avg) / (double)CPU_TS_TmrFreq_Hz )) / (1024 * 1024));
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_MEMCPY_ITER_CNT + BENCH_CFG_MEMCPY_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        memcpy((void *)BENCH_CFG_MEMCPY_DEST, (void *)BENCH_CFG_MEMCPY_OCRAM_ADDR, BENCH_CFG_MEMCPY_OCRAM_SIZE);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_MEMCPY_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpend.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpend.c
new file mode 100644
index 0000000..1d0f4a7
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpend.c
@@ -0,0 +1,153 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_qpend.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+extern  OS_TCB   Task2TCB;
+extern  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static OS_Q queue;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_qpend ()
+{
+    OS_ERR  os_err;
+
+    OSQCreate(&queue, "", 10u, &os_err);
+
+    BenchResInit(&res);
+
+    res.BenchName = "Q Pend (Task-Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    OSQDel(&queue, 0u, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+    OS_MSG_SIZE msg_size;
+    void *p_void;
+
+    (void)&p_void;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        p_void = OSQPend(&queue, 0u, 0u, &msg_size, DEF_NULL, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+        OSQPost(&queue, DEF_NULL, 32u, 0u, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpend_noctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpend_noctxsw.c
new file mode 100644
index 0000000..f7f05f3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpend_noctxsw.c
@@ -0,0 +1,132 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_qpend_noctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static OS_SEM sem1;
+static OS_SEM sem2;
+
+static OS_Q queue;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_qpend_noctxsw ()
+{
+    OS_ERR  os_err;
+
+    OSSemCreate(&sem1, "", 0u, &os_err);
+    OSSemCreate(&sem2, "", 0u, &os_err);
+
+    OSQCreate(&queue, "", BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT + 10u, &os_err);
+
+    BenchResInit(&res);
+
+    res.BenchName = "Q Pend without Context Switch (Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    OSQDel(&queue, 0u, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+    OS_MSG_SIZE msg_size;
+    void *p_void;
+    CPU_INT32U i;
+
+    (void)&p_void;
+
+    for(i = 0; i < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; i++) {
+        OSQPost(&queue, DEF_NULL, 32u, 0u, &os_err);
+    }
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        p_void = OSQPend(&queue, 0u, 0u, &msg_size, DEF_NULL, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpost.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpost.c
new file mode 100644
index 0000000..ddd7fa3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpost.c
@@ -0,0 +1,161 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_qpost.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+extern  OS_TCB   Task2TCB;
+extern  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static OS_SEM sem1;
+static OS_SEM sem2;
+
+static OS_Q queue;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_qpost ()
+{
+    OS_ERR  os_err;
+
+    OSSemCreate(&sem1, "", 0u, &os_err);
+    OSSemCreate(&sem2, "", 0u, &os_err);
+
+    OSQCreate(&queue, "", 10u, &os_err);
+
+    BenchResInit(&res);
+
+    res.BenchName = "Q Post (Task-Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    OSQDel(&queue, 0u, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+    OS_MSG_SIZE msg_size;
+    void *p_void;
+
+    (void)&p_void;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+
+        p_void = OSQPend(&queue, 0u, 0u, &msg_size, DEF_NULL, &os_err);
+
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        t1 = BENCH_TS_GET();
+        OSQPost(&queue, DEF_NULL, 32u, 0u, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpost_noctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpost_noctxsw.c
new file mode 100644
index 0000000..65e9789
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_qpost_noctxsw.c
@@ -0,0 +1,123 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_qpost_noctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static OS_SEM sem1;
+static OS_SEM sem2;
+
+static OS_Q queue;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_qpost_noctxsw ()
+{
+    OS_ERR  os_err;
+
+    OSSemCreate(&sem1, "", 0u, &os_err);
+    OSSemCreate(&sem2, "", 0u, &os_err);
+
+    OSQCreate(&queue, "", 10u, &os_err);
+
+    BenchResInit(&res);
+
+    res.BenchName = "Q Post without Context Switch (Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    OSQDel(&queue, 0u, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        OSQPost(&queue, DEF_NULL, 32u, 0u, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempend.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempend.c
new file mode 100644
index 0000000..a406da8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempend.c
@@ -0,0 +1,149 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_sempend.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+extern  OS_TCB   Task2TCB;
+extern  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static OS_SEM sem1;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_sempend ()
+{
+    OS_ERR  os_err;
+
+    OSSemCreate(&sem1, "", 0u, &os_err);
+
+    BenchResInit(&res);
+
+    res.BenchName = "Semaphore Pend with Context Switch (Task-Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    OSSemDel(&sem1, 0u, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        OSSemPend(&sem1, 0u, 0u, DEF_NULL, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+        OSSemPost(&sem1, 0u, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempend_noctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempend_noctxsw.c
new file mode 100644
index 0000000..c5a281a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempend_noctxsw.c
@@ -0,0 +1,118 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_sempend_noctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static OS_SEM sem1;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_sempend_noctxsw ()
+{
+    OS_ERR  os_err;
+
+    OSSemCreate(&sem1, "", 10u, &os_err);
+
+    BenchResInit(&res);
+
+    res.BenchName = "Semaphore Pend without Context Switch (Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    OSSemDel(&sem1, 0u, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        OSSemPend(&sem1, 0u, 0u, DEF_NULL, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+        OSSemPost(&sem1, 0u, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempost.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempost.c
new file mode 100644
index 0000000..0e2ee44
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempost.c
@@ -0,0 +1,149 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_sempost.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+extern  OS_TCB   Task2TCB;
+extern  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static OS_SEM sem1;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_sempost ()
+{
+    OS_ERR  os_err;
+
+    OSSemCreate(&sem1, "", 0u, &os_err);
+
+    BenchResInit(&res);
+
+    res.BenchName = "Semaphore Post with Context Switch (Task-Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    OSSemDel(&sem1, 0u, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        OSSemPend(&sem1, 0u, 0u, DEF_NULL, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        t1 = BENCH_TS_GET();
+        OSSemPost(&sem1, 0u, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempost_noctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempost_noctxsw.c
new file mode 100644
index 0000000..7176a42
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_sempost_noctxsw.c
@@ -0,0 +1,117 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_sempost_noctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static OS_SEM sem1;
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_sempost_noctxsw ()
+{
+    OS_ERR  os_err;
+
+    OSSemCreate(&sem1, "", 0u, &os_err);
+
+    BenchResInit(&res);
+
+    res.BenchName = "Semaphore Post without Context Switch (Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    OSSemDel(&sem1, 0u, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        OSSemPost(&sem1, 0u, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpend.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpend.c
new file mode 100644
index 0000000..2471aa6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpend.c
@@ -0,0 +1,147 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_taskqpend.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+extern  OS_TCB   Task2TCB;
+extern  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_taskqpend ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Task Q Pend (Task-Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+    OS_MSG_SIZE msg_size;
+    void *p_void;
+
+    (void)&p_void;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        p_void = OSTaskQPend(0u, 0u, &msg_size, DEF_NULL, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+        OSTaskQPost(&Task1TCB, DEF_NULL, 32u, 0u, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpend_noctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpend_noctxsw.c
new file mode 100644
index 0000000..214d987
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpend_noctxsw.c
@@ -0,0 +1,120 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_taskqpend_noctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_taskqpend_noctxsw ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Task Q Pend without Context Switch (Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT + 10u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+    OS_MSG_SIZE msg_size;
+    void *p_void;
+    CPU_INT32U i;
+
+    (void)&p_void;
+
+    for(i = 0; i < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; i++) {
+        OSTaskQPost(&Task1TCB, DEF_NULL, 32u, 0u, &os_err);
+    }
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        p_void = OSTaskQPend(0u, 0u, &msg_size, DEF_NULL, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpost.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpost.c
new file mode 100644
index 0000000..c482b10
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpost.c
@@ -0,0 +1,149 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_taskqpost.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+extern  OS_TCB   Task2TCB;
+extern  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_taskqpost ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Task Q Post (Task-Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+    OS_MSG_SIZE msg_size;
+    void *p_void;
+
+    (void)&p_void;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+
+        p_void = OSTaskQPend(0u, 0u, &msg_size, DEF_NULL, &os_err);
+
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        t1 = BENCH_TS_GET();
+        OSTaskQPost(&Task1TCB, DEF_NULL, 32u, 0u, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpost_noctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpost_noctxsw.c
new file mode 100644
index 0000000..3bc6346
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_taskqpost_noctxsw.c
@@ -0,0 +1,111 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_taskqpost_noctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_taskqpost_noctxsw ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Task Q Post without Context Switch (Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        OSTaskQPost(&Task1TCB, DEF_NULL, 32u, 0u, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempend.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempend.c
new file mode 100644
index 0000000..74e7e19
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempend.c
@@ -0,0 +1,143 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_tasksempend.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+extern  OS_TCB   Task2TCB;
+extern  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_tasksempend ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Task Semaphore Pend with Context Switch (Task-Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        OSTaskSemPend(0u, 0u, DEF_NULL, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+        OSTaskSemPost(&Task1TCB, 0u, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempend_noctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempend_noctxsw.c
new file mode 100644
index 0000000..9168409
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempend_noctxsw.c
@@ -0,0 +1,113 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_tasksempend_noctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_tasksempend_noctxsw ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Task Semaphore Pend without Context Switch (Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    OSTaskSemSet(&Task1TCB, BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT + 10u, &os_err);
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        OSTaskSemPend(0u, 0u, DEF_NULL, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempost.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempost.c
new file mode 100644
index 0000000..3f4016f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempost.c
@@ -0,0 +1,143 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_tasksempost.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+extern  OS_TCB   Task2TCB;
+extern  CPU_STK  Task2Stk[4096];
+
+
+static void Task1 (void);
+static void Task2 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_tasksempost ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Task Semaphore Post with Context Switch (Task-Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskCreate((OS_TCB     *)&Task2TCB,
+                 (CPU_CHAR   *)"Task2",
+                 (OS_TASK_PTR ) Task2,
+                 (void       *) 0,
+                 (OS_PRIO     ) 4,
+                 (CPU_STK    *)&Task2Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+    OSTaskDel(&Task2TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        OSTaskSemPend(0u, 0u, DEF_NULL, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
+
+static void Task2 (void)
+{
+    OS_ERR os_err;
+
+    for(; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; ) {
+        t1 = BENCH_TS_GET();
+        OSTaskSemPost(&Task1TCB, 0u, &os_err);
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempost_noctxsw.c b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempost_noctxsw.c
new file mode 100644
index 0000000..eba5cd2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/components/ucos_utils_perf/src/bench_tasksempost_noctxsw.c
@@ -0,0 +1,111 @@
+/*
+*********************************************************************************************************
+*                                        uC/OS-III Benchmarks
+*
+*                          (c) Copyright 2009-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                        uC/OS-III Benchmarks
+*
+*                                           Renesas RIN32M3
+*                                               on the
+*
+*                                             R-IN32M3-EC
+*                                          Evaluation Board
+*
+* Filename      : bench_tasksempost_noctxsw.c
+* Version       : V1.00
+* Programmer(s) : JBL
+*********************************************************************************************************
+* Note(s)       : none.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+
+#include  
+#include  
+
+#include  "bench.h"
+
+
+extern  OS_TCB   Task1TCB;
+extern  CPU_STK  Task1Stk[4096];
+
+static void Task1 (void);
+
+static BENCH_TS_TMR t1, t2, t;
+
+static CPU_INT32U iter_cnt;
+
+extern BENCH_TS_TMR BenchRes[BENCH_CFG_ITER_CNT];
+
+static BENCH_RES res;
+
+void bench_tasksempost_noctxsw ()
+{
+    OS_ERR  os_err;
+
+    BenchResInit(&res);
+
+    res.BenchName = "Task Semaphore Post without Context Switch (Task)";
+
+    OSTaskCreate((OS_TCB     *)&Task1TCB,
+                 (CPU_CHAR   *)"Task1",
+                 (OS_TASK_PTR ) Task1,
+                 (void       *) 0,
+                 (OS_PRIO     ) 3,
+                 (CPU_STK    *)&Task1Stk[0],
+                 (CPU_STK_SIZE) 1024 / 10,
+                 (CPU_STK_SIZE) 1024,
+                 (OS_MSG_QTY  ) 0u,
+                 (OS_TICK     ) 0u,
+                 (void       *) 0,
+                 (OS_OPT      )(OS_OPT_TASK_STK_CLR),
+                 (OS_ERR     *)&os_err);
+
+    OSTaskDel(&Task1TCB, &os_err);
+
+    BenchResFin(&res);
+    BenchResPrint(&res);
+
+}
+
+static void Task1 (void)
+{
+    OS_ERR os_err;
+
+    for(iter_cnt = 0; iter_cnt < BENCH_CFG_ITER_CNT + BENCH_CFG_WARMUP_ITER_CNT; iter_cnt++) {
+        t1 = BENCH_TS_GET();
+        OSTaskSemPost(&Task1TCB, 0u, &os_err);
+        t2 = BENCH_TS_GET();
+        t = t2 - t1;
+        if(iter_cnt >= BENCH_CFG_WARMUP_ITER_CNT) {
+            BenchResUpdate(&res, t);
+        }
+    }
+
+    OSTaskSuspend(DEF_NULL, &os_err);
+}
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axiethernet/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_axiethernet/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axiethernet/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axiethernet/src/ucos_axiethernet.h b/src/ucos_v1_42/ucos/drivers/ucos_axiethernet/src/ucos_axiethernet.h
new file mode 100644
index 0000000..b1e6fad
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axiethernet/src/ucos_axiethernet.h
@@ -0,0 +1,79 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                             AXI ETHERNET
+*
+* Filename      : ucos_axiethernet.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_AXIETHERNET_PRESENT
+#define  UCOS_AXIETHERNET_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+/*
+*********************************************************************************************************
+*                                        STRUCTURE DEFINITIONS
+*********************************************************************************************************
+*/
+
+typedef struct {
+    CPU_INT32U  DeviceId;
+    CPU_INT32U  BaseAddress;
+    CPU_INT32U  EmacType;
+    CPU_INT32U  TxCSum;
+    CPU_INT32U  RxCSum;
+    CPU_INT32U  PhyType;
+    CPU_INT32U  TXVlanTran;
+    CPU_INT32U  RXVlanTran;
+    CPU_INT32U  TXVlanTag;
+    CPU_INT32U  RXVlanTag;
+    CPU_INT32U  TXVlanStrip;
+    CPU_INT32U  RXVlanStrip;
+    CPU_INT32U  MCastExt;
+    CPU_INT32U  Stats;
+    CPU_INT32U  AVB;
+    CPU_INT32U  SGMIIOverLVDS;
+    CPU_INT32U  Intr;
+    CPU_INT32U  ConnType;
+    CPU_INT32U  ConnAddr;
+    CPU_INT32U  PhyAddr;
+    CPU_INT32U  RXIntr;
+    CPU_INT32U  TCIntr;
+} UCOS_AXIETHERNET_Config;
+
+
+#endif /* UCOS_AXIETHERNET_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axiethernetlite/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_axiethernetlite/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axiethernetlite/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axiethernetlite/src/ucos_axiethernetlite.h b/src/ucos_v1_42/ucos/drivers/ucos_axiethernetlite/src/ucos_axiethernetlite.h
new file mode 100644
index 0000000..76bc44a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axiethernetlite/src/ucos_axiethernetlite.h
@@ -0,0 +1,63 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                           AXI ETHERNETLITE
+*
+* Filename      : ucos_axiethernetlite.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_AXIETHERNETLITE_PRESENT
+#define  UCOS_AXIETHERNETLITE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+/*
+*********************************************************************************************************
+*                                        STRUCTURE DEFINITIONS
+*********************************************************************************************************
+*/
+
+
+typedef struct {
+    CPU_INT32U  DeviceId;
+    CPU_INT32U  BaseAddress;
+    CPU_INT32U  TxPong;
+    CPU_INT32U  RxPong;
+    CPU_INT32U  IntSource;
+} UCOS_AXIETHERNETLITE_Config;
+
+
+#endif /* UCOS_AXIETHERNETLITE_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axiintc/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_axiintc/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axiintc/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axiintc/src/ucos_axiintc.c b/src/ucos_v1_42/ucos/drivers/ucos_axiintc/src/ucos_axiintc.c
new file mode 100644
index 0000000..08265fa
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axiintc/src/ucos_axiintc.c
@@ -0,0 +1,173 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                      AXI INTERRUPT CONTROLLER
+*
+* Filename      : ucos_axiintc.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+/*
+*********************************************************************************************************
+*                                       EXTERN DECLARATIONS
+*********************************************************************************************************
+*/
+
+extern  UCOS_AXIINTC_Config  UCOS_AXIINTC_ConfigTable[];
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  AXIINTC  UCOS_AXIINTC_Table[XPAR_UCOS_AXIINTC_NUM_INSTANCES];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            AXIIntCInit()
+*
+* Description : Initialize an AXI Interrupt Controller.
+*
+* Argument(s) : device_id  ID of the controller to init.
+*
+* Return(s)   : Handle to the AXI Interrupt Controller instance or DEF_NULL if
+*               the devide id is invalid.
+*
+* Note(s)     : Should be called before accessing any other functionalities of this peripheral.
+*
+*********************************************************************************************************
+*/
+
+AXIINTC_HANDLE  AXIIntCInit (CPU_INT32U device_id)
+{
+    AXIINTC_HANDLE Handle;
+    AXIINTC_PTR    IntC;
+    CPU_SR_ALLOC();
+
+
+    if (device_id > XPAR_UCOS_AXIINTC_NUM_INSTANCES) {
+        return DEF_NULL;
+    }
+
+    Handle = (AXIINTC_HANDLE)&UCOS_AXIINTC_Table[device_id];
+
+    Handle->DeviceId = UCOS_AXIINTC_ConfigTable[device_id].DeviceId;
+    IntC = (AXIINTC_PTR)UCOS_AXIINTC_ConfigTable[device_id].BaseAddress;
+    Handle->AXIIntC = IntC;
+
+    CPU_CRITICAL_ENTER();
+    IntC->MER = AXIINTC_BIT_MER_ME | AXIINTC_BIT_MER_HIE;       /* Enable hardware interrupts.                          */
+    CPU_CRITICAL_EXIT();
+
+    return (Handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           AXIIntCIntEnSet()
+*
+* Description : Set a bit in the interrupt enable register.
+*
+* Argument(s) : handle   Handle to the interrupt controller instance.
+*               int_id   ID of the interrupt to set.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+/* TODO - Handle case were the SIE register is not available. */
+CPU_BOOLEAN  AXIIntCIntEnSet (AXIINTC_HANDLE handle, CPU_INT32U int_id)
+{
+    AXIINTC_PTR IntC;
+
+
+    IntC = handle->AXIIntC;
+
+
+    IntC->SIE = 1 << int_id;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           AXIIntCIntEnClr()
+*
+* Description : Clear a bit in the interrupt enable register.
+*
+* Argument(s) : handle   Handle to the interrupt controller instance.
+*               int_id   ID of the interrupt to clear.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : nonel.
+*
+*********************************************************************************************************
+*/
+
+/* TODO - Handle case where the CIE register is not available. */
+CPU_BOOLEAN  AXIIntCIntEnClr (AXIINTC_HANDLE handle, CPU_INT32U int_id)
+{
+    AXIINTC_PTR IntC;
+
+
+    IntC = handle->AXIIntC;
+
+
+    IntC->CIE = 1 << int_id;
+
+    return (DEF_OK);
+}
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axiintc/src/ucos_axiintc.h b/src/ucos_v1_42/ucos/drivers/ucos_axiintc/src/ucos_axiintc.h
new file mode 100644
index 0000000..010ee02
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axiintc/src/ucos_axiintc.h
@@ -0,0 +1,110 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                      AXI INTERRUPT CONTROLLER
+*
+* Filename      : ucos_axiintc.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_AXIINTC_PRESENT
+#define  UCOS_AXIINTC_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*********************************************************************************************************
+*/
+
+typedef struct axiintc {
+    CPU_REG32  ISR;                                             /* Interrupt Status Register                            */
+    CPU_REG32  IPR;                                             /* Interrupt Pending Register                           */
+    CPU_REG32  IER;                                             /* Interrupt Enable Register                            */
+    CPU_REG32  IAR;                                             /* Interrupt Acknowledge Register                       */
+    CPU_REG32  SIE;                                             /* Set Interrupt Enable                                 */
+    CPU_REG32  CIE;                                             /* Cleare Interrupt Enabled                             */
+    CPU_REG32  IVR;                                             /* Interrupt Vector Register                            */
+    CPU_REG32  MER;                                             /* Master Enable Register                               */
+    CPU_REG32  IMR;                                             /* Interrupt Mode Register                              */
+    CPU_REG32  ILR;                                             /* Interrupt Level Register                             */
+} AXIINTC, *AXIINTC_PTR;
+
+
+#define  AXIINTC_BIT_MER_ME  DEF_BIT_00                         /* Master IRQ Enable                                    */
+#define  AXIINTC_BIT_MER_HIE DEF_BIT_01                         /* Hardware Interrupt Enable                            */
+
+
+/*
+*********************************************************************************************************
+*                                        STRUCTURE DEFINITIONS
+*********************************************************************************************************
+*/
+
+typedef struct {
+    CPU_INT32U DeviceId;
+    CPU_INT32U BaseAddress;
+    CPU_INT32U IntrKind;
+    CPU_INT32U HasFast;
+    CPU_INT32U IVARReset;
+    CPU_INT32U IntCnt;
+    CPU_INT32U IntType;
+} UCOS_AXIINTC_Config;
+
+typedef struct {
+    CPU_INT32U    DeviceId;
+    AXIINTC_PTR   AXIIntC;
+} UCOS_AXIINTC;
+
+typedef UCOS_AXIINTC *AXIINTC_HANDLE;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+AXIINTC_HANDLE  AXIIntCInit     (CPU_INT32U     DeviceId);
+
+CPU_BOOLEAN     AXIIntCIntEnSet (AXIINTC_HANDLE Handle,
+                                 CPU_INT32U     Int);
+
+CPU_BOOLEAN     AXIIntCIntEnClr (AXIINTC_HANDLE Handle,
+                                 CPU_INT32U     Int);
+
+#endif /* UCOS_AXIINTC_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axitimer/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_axitimer/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axitimer/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axitimer/src/ucos_axitimer.c b/src/ucos_v1_42/ucos/drivers/ucos_axitimer/src/ucos_axitimer.c
new file mode 100644
index 0000000..56ebaab
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axitimer/src/ucos_axitimer.c
@@ -0,0 +1,531 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                        (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                              AXI TIMER
+*
+* Filename      : ucos_axitimer.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+#include 
+#include 
+
+
+extern UCOS_AXITIMER_Config UCOS_AXITIMER_ConfigTable[];
+
+static UCOS_AXITIMER UCOS_AXITIMER_Table[XPAR_UCOS_AXITIMER_NUM_INSTANCES];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            AXITimer_Init()
+*
+* Description : Initialize an AXI Timer.
+*
+* Argument(s) : device_id  ID of the timer to init.
+*
+* Return(s)   : Handle to the AXI Timer instance or DEF_NULL if
+*               the devide id is invalid.
+*
+* Note(s)     : Should be called before accessing any other functionalities of this peripheral.
+*
+*********************************************************************************************************
+*/
+
+AXITIMER_HANDLE AXITimer_Init (CPU_INT32U device_id)
+{
+    AXITIMER_HANDLE handle;
+    AXITIMER_PTR    tmr;
+    CPU_INT32U      int_source;
+    CPU_SR_ALLOC();
+
+
+    if (device_id > XPAR_UCOS_AXITIMER_NUM_INSTANCES) {
+        return DEF_NULL;
+    }
+
+    handle = (AXITIMER_HANDLE)&UCOS_AXITIMER_Table[device_id];
+
+    handle->DeviceId = UCOS_AXITIMER_ConfigTable[device_id].DeviceId;
+    tmr = (AXITIMER_PTR)UCOS_AXITIMER_ConfigTable[device_id].BaseAddress;
+    handle->AXITimer = tmr;
+    handle->TmrFreq = UCOS_AXITIMER_ConfigTable[device_id].TmrFreq;
+
+    handle->Tmr0Callback = DEF_NULL;
+    handle->Tmr1Callback = DEF_NULL;
+
+    int_source = UCOS_AXITIMER_ConfigTable[device_id].IntSource;
+
+    if (int_source != UCOS_INT_SOURCE_NONE) {
+        UCOS_IntVectSet(int_source,
+                        0u,
+                        0u,
+                        AXITimer_IntHandler,
+                        (void *)handle);
+
+        UCOS_IntSrcEn(int_source);
+    }
+
+
+    CPU_CRITICAL_ENTER(); /* Reset the timers. */
+    tmr->TCSR0 = AXITIMER_BIT_TCSR_TINT | AXITIMER_BIT_TCSR_LOAD;
+    tmr->TCSR0 = 0;
+
+    tmr->TCSR1 = AXITIMER_BIT_TCSR_TINT | AXITIMER_BIT_TCSR_LOAD;
+    tmr->TCSR1 = 0;
+    CPU_CRITICAL_EXIT();
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            AXITimer_Start()
+*
+* Description : Start a Timer.
+*
+* Argument(s) : handle   Handle to the interrupt controller instance.
+*               tmr_nbr  Index of the AXI timer to access.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN AXITimer_Start (AXITIMER_HANDLE handle, CPU_INT32U tmr_nbr)
+{
+    AXITIMER_PTR tmr;
+    CPU_SR_ALLOC();
+
+
+    tmr = handle->AXITimer;
+
+    CPU_CRITICAL_ENTER();
+    if (tmr_nbr == 0) {
+        tmr->TCSR0 |= AXITIMER_BIT_TCSR_TINT | AXITIMER_BIT_TCSR_LOAD;
+        tmr->TCSR0  = (AXITIMER_BIT_TCSR_ENT | tmr->TCSR0) & ~(AXITIMER_BIT_TCSR_TINT | AXITIMER_BIT_TCSR_LOAD);
+    }
+    else if (tmr_nbr == 1) {
+        tmr->TCSR1 |= AXITIMER_BIT_TCSR_TINT | AXITIMER_BIT_TCSR_LOAD;
+        tmr->TCSR1  = (AXITIMER_BIT_TCSR_ENT | tmr->TCSR1) & ~(AXITIMER_BIT_TCSR_TINT | AXITIMER_BIT_TCSR_LOAD);
+    } else {
+        CPU_CRITICAL_EXIT();
+        return (DEF_FAIL);
+    }
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            AXITimer_Stop()
+*
+* Description : Stop a Timer.
+*
+* Argument(s) : handle   Handle to the interrupt controller instance.
+*               tmr_nbr  Index of the AXI timer to access.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN AXITimer_Stop (AXITIMER_HANDLE handle, CPU_INT32U tmr_nbr)
+{
+    AXITIMER_PTR tmr;
+    CPU_SR_ALLOC();
+
+
+    tmr = handle->AXITimer;
+
+    CPU_CRITICAL_ENTER();
+    if (tmr_nbr == 0) {
+        tmr->TCSR0 &= ~AXITIMER_BIT_TCSR_ENT;
+    }
+    else if (tmr_nbr == 1) {
+        tmr->TCSR1 &= ~AXITIMER_BIT_TCSR_ENT;
+    } else {
+        CPU_CRITICAL_EXIT();
+        return (DEF_FAIL);
+    }
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            AXITimer_OptSet()
+*
+* Description : Configure (Set) the options of a timer.
+*
+* Argument(s) : handle   Handle to the interrupt controller instance.
+*               opt      Options to set.
+*
+*                   Valid options are :
+*                        AXITIMER_BIT_TCSR_MDT
+*                        AXITIMER_BIT_TCSR_UDT
+*                        AXITIMER_BIT_TCSR_GENT
+*                        AXITIMER_BIT_TCSR_CAPT
+*                        AXITIMER_BIT_TCSR_ARHT
+*                        AXITIMER_BIT_TCSR_LOAD
+*                        AXITIMER_BIT_TCSR_ENIT
+*                        AXITIMER_BIT_TCSR_ENT
+*                        AXITIMER_BIT_TCSR_TINT
+*                        AXITIMER_BIT_TCSR_PWMA
+*                        AXITIMER_BIT_TCSR_ENALL
+*                        AXITIMER_BIT_TCSR_CASC
+*
+*               tmr_nbr  Index of the AXI timer to access.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : This will only set the options specified. Already set options will be preserved.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN AXITimer_OptSet (AXITIMER_HANDLE handle, CPU_INT32U tmr_nbr, CPU_INT32U opt)
+{
+    AXITIMER_PTR tmr;
+    CPU_SR_ALLOC();
+
+
+    tmr = handle->AXITimer;
+
+    CPU_CRITICAL_ENTER();
+    if (tmr_nbr == 0) {
+        tmr->TCSR0 |= opt & AXITIMER_OPT_MASK;
+    }
+    else if (tmr_nbr == 1) {
+        tmr->TCSR1 |= opt & AXITIMER_OPT_MASK;
+    } else {
+        CPU_CRITICAL_EXIT();
+        return (DEF_FAIL);
+    }
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            AXITimer_OptClr()
+*
+* Description : Configure (Clear) the options of a timer.
+*
+* Argument(s) : handle   Handle to the interrupt controller instance.
+*               opt      Options to clear.
+*
+*                   Valid options are :
+*                       AXITIMER_OPT_MODE
+*                       AXITIMER_OPT_DOWN
+*                       AXITIMER_OPT_GEN
+*                       AXITIMER_OPT_CAPTURE
+*                       AXITIMER_OPT_AUTO_RELOAD
+*                       AXITIMER_OPT_INT
+*                       AXITIMER_OPT_PWM
+*
+*               tmr_nbr  Index of the AXI timer to access.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : This will only clear the options specified. Other set options will be preserved.
+*
+*********************************************************************************************************
+*/
+CPU_BOOLEAN AXITimer_OptClr (AXITIMER_HANDLE handle, CPU_INT32U tmr_nbr, CPU_INT32U opt)
+{
+    AXITIMER_PTR tmr;
+    CPU_SR_ALLOC();
+
+
+    tmr = handle->AXITimer;
+
+    CPU_CRITICAL_ENTER();
+    if (tmr_nbr == 0) {
+        tmr->TCSR0 &= ~(opt & AXITIMER_OPT_MASK);
+    } else if (tmr_nbr == 1) {
+        tmr->TCSR1 &= ~(opt & AXITIMER_OPT_MASK);
+    } else {
+        CPU_CRITICAL_EXIT();
+        return (DEF_FAIL);
+    }
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            AXITimer_CtrGet()
+*
+* Description : Read a timer current counter.
+*
+* Argument(s) : handle   Handle to the interrupt controller instance.
+*               tmr_nbr  Index of the AXI timer to access.
+*
+* Return(s)   : Timer counter value.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_INT32U AXITimer_CtrGet (AXITIMER_HANDLE handle, CPU_INT32U tmr_nbr)
+{
+    AXITIMER_PTR tmr;
+    CPU_INT32U ctr;
+
+
+    tmr = handle->AXITimer;
+
+    if (tmr_nbr == 0) {
+        ctr = tmr->TCR0;
+    } else if (tmr_nbr == 1) {
+        ctr = tmr->TCR1;
+    } else {
+        ctr = 0;
+    }
+
+    return (ctr);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            AXITimer_LoadSet()
+*
+* Description : Set a time reload value.
+*
+* Argument(s) : handle        Handle to the interrupt controller instance.
+*               cnt_load_val  Counter load value.
+*               tmr_nbr       Index of the AXI timer to access.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN AXITimer_LoadSet (AXITIMER_HANDLE handle, CPU_INT32U tmr_nbr, CPU_INT32U cnt_load_val)
+{
+    AXITIMER_PTR tmr;
+
+
+    tmr = handle->AXITimer;
+
+    if (tmr_nbr == 0) {
+        tmr->TLR0 = cnt_load_val;
+    } else if (tmr_nbr == 1) {
+        tmr->TLR1 = cnt_load_val;
+    } else {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            AXITimer_IntClr()
+*
+* Description : Clear a timer interrupt.
+*
+* Argument(s) : handle   Handle to the interrupt controller instance.
+*               tmr_nbr  Index of the AXI timer to access.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN AXITimer_IntClr (AXITIMER_HANDLE handle, CPU_INT32U tmr_nbr)
+{
+    AXITIMER_PTR tmr;
+    CPU_SR_ALLOC();
+
+
+    tmr = handle->AXITimer;
+
+    CPU_CRITICAL_ENTER();
+    if (tmr_nbr == 0) {
+        tmr->TCSR0 = tmr->TCSR0;
+    } else if (tmr_nbr == 1) {
+        tmr->TCSR1 = tmr->TCSR1;
+    } else {
+        CPU_CRITICAL_EXIT();
+        return (DEF_FAIL);
+    }
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          AXITimer_FreqGet()
+*
+* Description : Get the frequency of an AXI Timer instance.
+*
+* Argument(s) : handle   Handle to the interrupt controller instance.
+*
+* Return(s)   : Timer frequency or 0 if the frequency cannot be returned.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_INT32U AXITimer_FreqGet (AXITIMER_HANDLE handle)
+{
+    return (handle->TmrFreq);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          AXITimer_CallbackSet()
+*
+* Description : Set the callback of an AXI Timer when an interrupt occurs.
+*
+* Argument(s) : handle    Handle to the interrupt controller instance.
+*               tmr_nbr   Index of the AXI timer to access.
+*               call_back Callback function or DEF_NULL to disable the callback.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : The callback function has the following signature.
+*                   void CallBackFnct (AXITIMER_HANDLE handle, CPU_INT32U tmr_nbr);
+*
+*               where "handle" is the handle to the timer instance and "tmr_nbr" the
+*               timer index.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN AXITimer_CallbackSet (AXITIMER_HANDLE            handle,
+                                  CPU_INT32U                 tmr_nbr,
+                                  AXITIMER_CALLBACK_FNCT_PTR call_back)
+{
+    if (tmr_nbr == 0) {
+        handle->Tmr0Callback = call_back;
+    } else if (tmr_nbr == 1) {
+        handle->Tmr1Callback = call_back;
+    } else {
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          AXITimer_IntHandler()
+*
+* Description : AXI Timer default interrupt handler.
+*
+* Argument(s) : p_int_arg   Handle to the interrupt controller instance.
+*               cpu_id      Always 0.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void AXITimer_IntHandler (void       *p_int_arg,
+                          CPU_INT32U  cpu_id)
+{
+    AXITIMER_HANDLE handle;
+    AXITIMER_PTR    tmr;
+
+
+    handle = (AXITIMER_HANDLE)p_int_arg;
+    tmr = handle->AXITimer;
+
+    if (((tmr->TCSR0 & AXITIMER_BIT_TCSR_TINT) != 0u) &&
+         (tmr->TCSR0 & AXITIMER_BIT_TCSR_ENIT) != 0u) {
+        tmr->TCSR0 = tmr->TCSR0;
+
+        if (handle->Tmr0Callback != DEF_NULL) {
+            (*handle->Tmr0Callback)(handle, 0u);
+        }
+    }
+
+    if (((tmr->TCSR1 & AXITIMER_BIT_TCSR_TINT) != 0u) &&
+         (tmr->TCSR1 & AXITIMER_BIT_TCSR_ENIT) != 0u) {
+        tmr->TCSR1 = tmr->TCSR1;
+
+        if (handle->Tmr1Callback != DEF_NULL) {
+            (*handle->Tmr1Callback)(handle, 1u);
+        }
+    }
+}
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axitimer/src/ucos_axitimer.h b/src/ucos_v1_42/ucos/drivers/ucos_axitimer/src/ucos_axitimer.h
new file mode 100644
index 0000000..bd56312
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axitimer/src/ucos_axitimer.h
@@ -0,0 +1,157 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                         (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                              AXI TIMER
+*
+* Filename      : ucos_axitimer.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_AXITIMER_PRESENT
+#define  UCOS_AXITIMER_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*********************************************************************************************************
+*/
+
+typedef struct axitimer {
+    CPU_REG32 TCSR0;                                            /* Timer 0 Control and Status Register                  */
+    CPU_REG32 TLR0;                                             /* Timer 0 Load Register                                */
+    CPU_REG32 TCR0;                                             /* Timer 0 Counter Register                             */
+    CPU_REG32 RESERVED1[1];                                     /* Reserved                                             */
+    CPU_REG32 TCSR1;                                            /* Timer 1 Control and Status Register                  */
+    CPU_REG32 TLR1;                                             /* Timer 1 Load Register                                */
+    CPU_REG32 TCR1;                                             /* timer 1 Counter Register                             */
+    CPU_REG32 RESERVED2[1];                                     /* Reserved                                             */
+} AXITIMER, *AXITIMER_PTR;
+
+
+#define AXITIMER_BIT_TCSR_MDT   DEF_BIT_00
+#define AXITIMER_BIT_TCSR_UDT   DEF_BIT_01
+#define AXITIMER_BIT_TCSR_GENT  DEF_BIT_02
+#define AXITIMER_BIT_TCSR_CAPT  DEF_BIT_03
+#define AXITIMER_BIT_TCSR_ARHT  DEF_BIT_04
+#define AXITIMER_BIT_TCSR_LOAD  DEF_BIT_05
+#define AXITIMER_BIT_TCSR_ENIT  DEF_BIT_06
+#define AXITIMER_BIT_TCSR_ENT   DEF_BIT_07
+#define AXITIMER_BIT_TCSR_TINT  DEF_BIT_08
+#define AXITIMER_BIT_TCSR_PWMA  DEF_BIT_09
+#define AXITIMER_BIT_TCSR_ENALL DEF_BIT_10
+#define AXITIMER_BIT_TCSR_CASC  DEF_BIT_11
+
+
+#define AXITIMER_OPT_MODE           DEF_BIT_00
+#define AXITIMER_OPT_DOWN           DEF_BIT_01
+#define AXITIMER_OPT_GEN            DEF_BIT_02
+#define AXITIMER_OPT_CAPTURE        DEF_BIT_03
+#define AXITIMER_OPT_AUTO_RELOAD    DEF_BIT_04
+#define AXITIMER_OPT_INT            DEF_BIT_06
+#define AXITIMER_OPT_PWM            DEF_BIT_09
+#define AXITIMER_OPT_CASC           DEF_BIT_11
+#define AXITIMER_OPT_MASK           0xA5F
+
+
+/*
+*********************************************************************************************************
+*                                        STRUCTURE DEFINITIONS
+*********************************************************************************************************
+*/
+
+typedef struct {
+    CPU_INT32U DeviceId;
+    CPU_INT32U BaseAddress;
+    CPU_INT32U TmrFreq;
+    CPU_INT32U IntSource;
+} UCOS_AXITIMER_Config;
+
+typedef struct ucos_axitimer {
+    CPU_INT32U   DeviceId;
+    AXITIMER_PTR AXITimer;
+    CPU_INT32U   TmrFreq;
+    void (*Tmr0Callback)(struct ucos_axitimer *handle, CPU_INT32U tmr_nbr);
+    void (*Tmr1Callback)(struct ucos_axitimer *handle, CPU_INT32U tmr_nbr);
+} UCOS_AXITIMER;
+
+typedef UCOS_AXITIMER *AXITIMER_HANDLE;
+
+typedef void (*AXITIMER_CALLBACK_FNCT_PTR)(AXITIMER_HANDLE handle, CPU_INT32U tmr_nbr);
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+AXITIMER_HANDLE AXITimer_Init (CPU_INT32U      device_id);
+
+CPU_BOOLEAN AXITimer_Start (AXITIMER_HANDLE handle,
+                            CPU_INT32U      tmr_nbr);
+
+CPU_BOOLEAN AXITimer_Stop (AXITIMER_HANDLE handle,
+                           CPU_INT32U      tmr_nbr);
+
+CPU_BOOLEAN AXITimer_OptSet (AXITIMER_HANDLE handle,
+                             CPU_INT32U      tmr_nbr,
+                             CPU_INT32U      opt);
+
+CPU_BOOLEAN AXITimer_OptClr (AXITIMER_HANDLE handle,
+                             CPU_INT32U      tmr_nbr,
+                             CPU_INT32U      opt);
+
+CPU_BOOLEAN AXITimer_IntClr (AXITIMER_HANDLE handle,
+                             CPU_INT32U      tmr_nbr);
+
+CPU_BOOLEAN AXITimer_LoadSet (AXITIMER_HANDLE handle,
+                              CPU_INT32U      tmr_nbr,
+                              CPU_INT32U      cnt_load_val);
+
+CPU_INT32U AXITimer_FreqGet (AXITIMER_HANDLE handle);
+
+CPU_BOOLEAN AXITimer_CallbackSet (AXITIMER_HANDLE            handle,
+                                  CPU_INT32U                 tmr_nbr,
+                                  AXITIMER_CALLBACK_FNCT_PTR call_back);
+
+void AXITimer_IntHandler (void       *p_int_arg,
+                          CPU_INT32U  cpu_id);
+
+#endif /* UCOS_AXITIMER_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axiuartlite/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_axiuartlite/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axiuartlite/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axiuartlite/src/ucos_axiuartlite.c b/src/ucos_v1_42/ucos/drivers/ucos_axiuartlite/src/ucos_axiuartlite.c
new file mode 100644
index 0000000..fadd97c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axiuartlite/src/ucos_axiuartlite.c
@@ -0,0 +1,345 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                             AXI UARTLITE
+*
+* Filename      : ucos_axiuartlite.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+
+extern UCOS_AXIUARTLITE_Config UCOS_AXIUARTLITE_ConfigTable[];
+
+static UCOS_AXIUARTLITE UCOS_AXIUARTLITE_Table[XPAR_UCOS_AXIUARTLITE_NUM_INSTANCES];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            AXIUARTLite_Init()
+*
+* Description : Initialize an AXI UART.
+*
+* Argument(s) : device_id  ID of the timer to init.
+*
+* Return(s)   : Handle to the AXI UART instance or DEF_NULL if
+*               the devide id is invalid.
+*
+* Note(s)     : Should be called before accessing any other functionalities of this peripheral.
+*
+*********************************************************************************************************
+*/
+
+AXIUARTLITE_HANDLE AXIUARTLite_Init (CPU_INT32U device_id)
+{
+    AXIUARTLITE_HANDLE handle;
+    AXIUARTLITE_PTR uart;
+    CPU_INT32U int_source;
+    KAL_ERR kal_err;
+
+
+    if (device_id > XPAR_UCOS_AXIUARTLITE_NUM_INSTANCES) {
+        return (DEF_NULL);
+    }
+
+    handle = (AXIUARTLITE_HANDLE)&UCOS_AXIUARTLITE_Table[device_id];
+
+    handle->DeviceId = UCOS_AXIUARTLITE_ConfigTable[device_id].DeviceId;
+    uart = (AXIUARTLITE_PTR)UCOS_AXIUARTLITE_ConfigTable[device_id].BaseAddress;
+    handle->UARTLite = uart;
+    handle->BaudRate = UCOS_AXIUARTLITE_ConfigTable[device_id].BaudRate;
+    handle->UseParity = UCOS_AXIUARTLITE_ConfigTable[device_id].UseParity;
+    handle->OddParity = UCOS_AXIUARTLITE_ConfigTable[device_id].OddParity;
+    handle->DataBits = UCOS_AXIUARTLITE_ConfigTable[device_id].DataBits;
+    handle->IntReq = 0u;
+
+
+    handle->TxSem = KAL_SemCreate("AXIUARTLite Tx Semaphore", DEF_NULL, &kal_err);
+    if (kal_err != KAL_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    handle->RxSem = KAL_SemCreate("AXIUARTLite Rx Semaphore", DEF_NULL, &kal_err);
+    if (kal_err != KAL_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    handle->TxMutex = KAL_LockCreate("AXIUARTLite Tx Mutex", DEF_NULL, &kal_err);
+    if (kal_err != KAL_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    handle->RxMutex = KAL_LockCreate("AXIUARTLite Rx Mutex", DEF_NULL, &kal_err);
+    if (kal_err != KAL_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+
+    int_source = UCOS_AXIUARTLITE_ConfigTable[device_id].IntSource;
+    handle->IntSource = int_source;
+
+    if (int_source != UCOS_INT_SOURCE_NONE) {
+        UCOS_IntVectSet(int_source,
+                        0u,
+                        0u,
+                        AXIUARTLite_IntHandler,
+                        (void *)handle);
+
+        UCOS_IntTypeSet(int_source, UCOS_INT_TYPE_EDGE);
+
+        UCOS_IntSrcEn(int_source);
+    }
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           AXIUARTLite_WrStr()
+*
+* Description : Write a null terminated string through the UART.
+*
+* Argument(s) : handle    Handle of the UART to write.
+*
+*               p_str     String to output.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : When possible transmission is always blocking, interrupt based and protected by an internal
+*               TX mutex. UARTPS_WrStr will return once the entire string has been written to the device FIFO.
+*               If the interrupt source of the UART isn't write to this CPU this function will fallback
+*               to polling.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AXIUARTLite_WrStr (AXIUARTLITE_HANDLE handle,
+                                const CPU_CHAR    *p_str)
+{
+    AXIUARTLITE_PTR uart;
+    KAL_ERR kal_err;
+    CPU_SR_ALLOC();
+
+
+    uart = handle->UARTLite;
+
+    KAL_LockAcquire(handle->TxMutex, 0u, 0u, &kal_err);
+
+    while ((*p_str) != DEF_NULL) {
+
+        CPU_CRITICAL_ENTER();
+        if ((uart->STAT & AXIUARTLITE_BIT_STAT_TXFULL) != 0u) {
+            if (handle->IntSource != UCOS_INT_SOURCE_NONE) {
+                handle->IntReq |= AXIUARTLITE_INT_TX_REQ;
+                uart->CTRL |= AXIUARTLITE_BIT_CTRL_INTEN;
+                CPU_CRITICAL_EXIT();
+                KAL_SemPend(handle->TxSem, 0u, 0u, &kal_err);
+            } else {
+                CPU_CRITICAL_EXIT();
+                while((uart->STAT & AXIUARTLITE_BIT_STAT_TXFULL) != 0u) {}
+            }
+        } else {
+            CPU_CRITICAL_EXIT();
+        }
+        uart->TX = *p_str;
+        p_str++;
+    }
+
+    KAL_LockRelease(handle->TxMutex, &kal_err);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           AXIUARTLite_WrByte()
+*
+* Description : Write a single byte through the UART.
+*
+* Argument(s) : handle    Handle of the UART to configure.
+*
+*               p_str     String to output.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : Transmission is always blocking, interrupt based and protected by an internal TX mutex.
+*               AXIUARTLite_WrByte will return once the byte has been written to the device FIFO.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  AXIUARTLite_WrByte (AXIUARTLITE_HANDLE handle,
+                                 CPU_CHAR           byte)
+{
+    AXIUARTLITE_PTR uart;
+    KAL_ERR kal_err;
+    CPU_SR_ALLOC();
+
+
+    uart = handle->UARTLite;
+
+    KAL_LockAcquire(handle->TxMutex, 0u, 0u, &kal_err);
+
+    CPU_CRITICAL_ENTER();
+    if ((uart->STAT & AXIUARTLITE_BIT_STAT_TXFULL) != 0u) {
+        if (handle->IntSource != UCOS_INT_SOURCE_NONE) {
+            handle->IntReq |= AXIUARTLITE_INT_TX_REQ;
+            uart->CTRL |= AXIUARTLITE_BIT_CTRL_INTEN;
+            CPU_CRITICAL_EXIT();
+            KAL_SemPend(handle->TxSem, 0u, 0u, &kal_err);
+        } else {
+            CPU_CRITICAL_EXIT();
+            while((uart->STAT & AXIUARTLITE_BIT_STAT_TXFULL) != 0u) {}
+        }
+    } else {
+        CPU_CRITICAL_EXIT();
+    }
+    uart->TX = byte;
+
+    KAL_LockRelease(handle->TxMutex, &kal_err);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           AXIUARTLite_RdByte()
+*
+* Description : Read a byte from the UART.
+*
+* Argument(s) : handle    Handle of the UART to read.
+*
+* Return(s)   : Read byte
+*
+* Note(s)     : Reception is always blocking, interrupt based and protected by an internal RX mutex.
+*               When the interrupt line of the UART isn't wired to the current CPU this function
+*               will fallback to polling.
+*
+*********************************************************************************************************
+*/
+
+CPU_CHAR  AXIUARTLite_RdByte (AXIUARTLITE_HANDLE handle)
+{
+    AXIUARTLITE_PTR uart;
+    KAL_ERR kal_err;
+    CPU_CHAR c;
+    CPU_SR_ALLOC();
+
+
+    uart = handle->UARTLite;
+
+    KAL_LockAcquire(handle->RxMutex, 0u, 0u, &kal_err);
+    c = 0;
+
+    if ((uart->STAT & AXIUARTLITE_BIT_STAT_RXVALID) != 0) {
+        c = uart->RX;
+    } else {
+        if (handle->IntSource != UCOS_INT_SOURCE_NONE) {
+            CPU_CRITICAL_ENTER();
+            handle->IntReq |= AXIUARTLITE_INT_RX_REQ;
+            uart->CTRL |= AXIUARTLITE_BIT_CTRL_INTEN;
+            CPU_CRITICAL_EXIT();
+            KAL_SemPend(handle->RxSem, 0u, 0u, &kal_err);
+        } else {
+            while ((uart->STAT & AXIUARTLITE_BIT_STAT_RXVALID) != 0) {}
+        }
+        c = uart->RX;
+    }
+    KAL_LockRelease(handle->TxMutex, &kal_err);
+
+    return (c);
+}
+
+/*
+*********************************************************************************************************
+*                                            UARTPS_IntHandler()
+*
+* Description : UART default interrupt handler.
+*
+* Argument(s) : p_int_arg    Handle of the UART.
+*               cpu_id       Always 0 for peripheral interrupts.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void AXIUARTLite_IntHandler (void       *p_int_arg,
+                             CPU_INT32U  cpu_id)
+{
+    AXIUARTLITE_HANDLE handle;
+    AXIUARTLITE_PTR    uart;
+    KAL_ERR            kal_err;
+
+
+    handle = (AXIUARTLITE_HANDLE)p_int_arg;
+    uart = handle->UARTLite;
+
+    if (DEF_BIT_IS_SET(uart->STAT, AXIUARTLITE_BIT_STAT_RXVALID) && DEF_BIT_IS_SET(handle->IntReq, AXIUARTLITE_INT_RX_REQ)) {
+        KAL_SemPost(handle->RxSem, 0u, &kal_err);
+        handle->IntReq &= ~AXIUARTLITE_INT_RX_REQ;
+    }
+
+    if (DEF_BIT_IS_SET(uart->STAT, AXIUARTLITE_BIT_STAT_TXEMPTY) && DEF_BIT_IS_SET(handle->IntReq, AXIUARTLITE_INT_TX_REQ)) {
+        KAL_SemPost(handle->TxSem, 0u, &kal_err);
+        handle->IntReq &= ~AXIUARTLITE_INT_TX_REQ;
+    }
+
+    if (handle->IntReq == 0u) {
+        uart->CTRL &= ~AXIUARTLITE_BIT_CTRL_INTEN;
+    }
+}
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_axiuartlite/src/ucos_axiuartlite.h b/src/ucos_v1_42/ucos/drivers/ucos_axiuartlite/src/ucos_axiuartlite.h
new file mode 100644
index 0000000..626a1f5
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_axiuartlite/src/ucos_axiuartlite.h
@@ -0,0 +1,135 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                             AXI UARTLITE
+*
+* Filename      : ucos_axiuartlite.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_AXIUARTLITE_PRESENT
+#define  UCOS_AXIUARTLITE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*********************************************************************************************************
+*/
+
+typedef struct axi_uartlite {
+    CPU_REG32  RX;                                             /* RX FIFO                                               */
+    CPU_REG32  TX;                                             /* TX FIFO                                               */
+    CPU_REG32  STAT;                                           /* Status Register                                       */
+    CPU_REG32  CTRL;                                           /* Control Register                                      */
+
+} AXIUARTLITE, *AXIUARTLITE_PTR;
+
+
+/* ------- UART CONTROL REGISTER BIT DEFINITION ------- */
+#define  AXIUARTLITE_BIT_CTRL_TXRST  (DEF_BIT_00)              /* Reset TX FIFO                                         */
+#define  AXIUARTLITE_BIT_CTRL_RXRST  (DEF_BIT_01)              /* Reset RX FIFO                                         */
+#define  AXIUARTLITE_BIT_CTRL_INTEN  (DEF_BIT_04)              /* Enable Interrupts                                     */
+
+
+/* ------- UART STATUS REGISTER BIT DEFINITION ------- */
+#define  AXIUARTLITE_BIT_STAT_RXVALID   (DEF_BIT_00)           /* RX Valid                                              */
+#define  AXIUARTLITE_BIT_STAT_RXFULL    (DEF_BIT_01)           /* RX FIFO Full                                          */
+#define  AXIUARTLITE_BIT_STAT_TXEMPTY   (DEF_BIT_02)           /* TX FIFO Empty                                         */
+#define  AXIUARTLITE_BIT_STAT_TXFULL    (DEF_BIT_03)           /* TX FIFO Full                                          */
+#define  AXIUARTLITE_BIT_STAT_INTREN    (DEF_BIT_04)           /* Interrupts Enabled                                    */
+#define  AXIUARTLITE_BIT_STAT_OVRUN     (DEF_BIT_05)           /* RX Overrun error                                      */
+#define  AXIUARTLITE_BIT_STAT_FRAMEERR  (DEF_BIT_06)           /* RX Frame Error                                        */
+#define  AXIUARTLITE_BIT_STAT_PARITYERR (DEF_BIT_07)           /* RX Parity Error                                       */
+
+/*
+*********************************************************************************************************
+*                                        STRUCTURE DEFINITIONS
+*********************************************************************************************************
+*/
+
+
+typedef struct {
+    CPU_INT32U  DeviceId;
+    CPU_INT32U  BaseAddress;
+    CPU_INT32U  BaudRate;
+    CPU_BOOLEAN UseParity;
+    CPU_BOOLEAN OddParity;
+    CPU_INT32U  DataBits;
+    CPU_INT32U  IntSource;
+} UCOS_AXIUARTLITE_Config;
+
+
+typedef struct {
+    CPU_INT32U      DeviceId;
+    AXIUARTLITE_PTR UARTLite;
+    CPU_INT32U      BaudRate;
+    CPU_BOOLEAN     UseParity;
+    CPU_BOOLEAN     OddParity;
+    CPU_INT32U      DataBits;
+    CPU_INT32U      IntReq;
+    KAL_SEM_HANDLE  TxSem;
+    KAL_SEM_HANDLE  RxSem;
+    KAL_LOCK_HANDLE TxMutex;
+    KAL_LOCK_HANDLE RxMutex;
+    CPU_INT32U  IntSource;
+} UCOS_AXIUARTLITE;
+
+#define  AXIUARTLITE_INT_RX_REQ DEF_BIT_00
+#define  AXIUARTLITE_INT_TX_REQ DEF_BIT_01
+
+typedef UCOS_AXIUARTLITE *AXIUARTLITE_HANDLE;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+AXIUARTLITE_HANDLE AXIUARTLite_Init (CPU_INT32U device_id);
+
+CPU_BOOLEAN AXIUARTLite_WrStr (AXIUARTLITE_HANDLE   handle,
+                               const CPU_CHAR *p_str);
+
+CPU_CHAR AXIUARTLite_RdByte (AXIUARTLITE_HANDLE handle);
+
+void AXIUARTLite_IntHandler (void       *p_int_arg,
+                             CPU_INT32U  cpu_id);
+
+#endif /* UCOS_AXIUARTLITE_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/files.html b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/files.html
new file mode 100644
index 0000000..f070288
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/files.html
@@ -0,0 +1,27 @@
+
+
+   
+
+   File Index
+
+
+
+
Xilinx Processor IP Library

+Software Drivers
+

+
+

+  

+

+  

+
File List
Here is a list of all documented files with brief descriptions:
+  
+  
+
fsl.h
xio.c

+Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/fsl_8h.html b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/fsl_8h.html
new file mode 100644
index 0000000..e08c9dd
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/fsl_8h.html
@@ -0,0 +1,39 @@
+
+
+   
+
+   fsl.h File Reference
+
+
+
+
Xilinx Processor IP Library

+Software Drivers
+

+
+

+  

+

+  

+
fsl.h File Reference
Detailed Description

+This file contains macros for interfacing to the Fast Simplex Link (FSL) interface..

+
+ MODIFICATION HISTORY:

+
 Ver   Who  Date     Changes
+ ----- ---- -------- ---------------------------------------------------
+ 1.00a ecm  06/20/07 Initial version, moved over from bsp area
+ 1.11c ecm  08/26/08 Fixed the missing 'FSL_DEFAULT' define that was causing
+					  assembly errors.
+ 

+
Note:

+None. 
+

+
+
+

+Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/globals.html b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/globals.html
new file mode 100644
index 0000000..d9be6b3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/globals.html
@@ -0,0 +1,39 @@
+
+
+   
+
+   Class Members
+
+
+
+
Xilinx Processor IP Library

+Software Drivers
+

+
+

+  

+

+  

+

+  
+

+Here is a list of all documented file members with links to the documentation:
+

+
    
+
  • XIo_EndianSwap16()
+: xio.c
  • XIo_EndianSwap32()
+: xio.c
  • XIo_InSwap16()
+: xio.c
  • XIo_InSwap32()
+: xio.c
  • XIo_OutSwap16()
+: xio.c
  • XIo_OutSwap32()
+: xio.c

+Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/globals_func.html b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/globals_func.html
new file mode 100644
index 0000000..4501d0c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/globals_func.html
@@ -0,0 +1,39 @@
+
+
+   
+
+   Class Members
+
+
+
+
Xilinx Processor IP Library

+Software Drivers
+

+
+

+  

+

+  

+

+  
+

+ 
+

+
    
+
  • XIo_EndianSwap16()
+: xio.c
  • XIo_EndianSwap32()
+: xio.c
  • XIo_InSwap16()
+: xio.c
  • XIo_InSwap32()
+: xio.c
  • XIo_OutSwap16()
+: xio.c
  • XIo_OutSwap32()
+: xio.c

+Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/index.html
new file mode 100644
index 0000000..8791e80
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/index.html
@@ -0,0 +1,41 @@
+
+
+   
+
+   cpu v2_1
+
+
+
+
Xilinx Processor IP Library

+Software Drivers
+

+
+

+  

+
cpu v2_1

+

+This file contains the interface for the XIo component, which encapsulates the Input/Output functions for processors that do not require any special I/O handling.

+
+ MODIFICATION HISTORY:

+
 Ver   Who  Date     Changes
+ ----- ---- -------- -------------------------------------------------------
+ 1.00a rpm  11/07/03 Added InSwap/OutSwap routines for endian conversion
+ 1.00a xd   11/04/04 Improved support for doxygen
+ 1.01a ecm  02/24/06 CR225908 corrected the extra curly braces in macros
+                     and bumped version to 1.01.a.
+ 1.11a mta  03/21/07 Updated to new coding style.
+ 1.11b va   04/17/08 Updated Tcl for better CORE_CLOCK_FREQ_HZ definition
+ 1.11a sdm  03/12/09 Updated Tcl to define correct value for CORE_CLOCK_FREQ_HZ
+                     (CR  #502010)
+ 1.13a sdm  03/12/09 Updated the Tcl to pull appropriate libraries for Little
+                     Endian Microblaze
+ 2.0   adk  19/12/13 Updated as per the New Tcl API's
+ 2.1   bss  04/14/14 Updated tcl to copy libgloss.a and libgcc.a libraries
+ 2.1   bss  04/29/14 Updated to copy libgloss.a if exists otherwise libxil.a
+			CR#794205

+
 

+
Note:

+This file may contain architecture-dependent items (memory-mapped or non-memory-mapped I/O). Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/tab_b.gif b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/tab_b.gif
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diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/tab_l.gif b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/tab_l.gif
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diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/tab_r.gif b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/tab_r.gif
new file mode 100644
index 0000000..ce9dd9f
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diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/tabs.css b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/tabs.css
new file mode 100644
index 0000000..8442b9b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/tabs.css
@@ -0,0 +1,102 @@
+/* tabs styles, based on http://www.alistapart.com/articles/slidingdoors */
+
+DIV.tabs
+{
+   float            : left;
+   width            : 100%;
+   background       : url("tab_b.gif") repeat-x bottom;
+   margin-bottom    : 4px;
+}
+
+DIV.tabs UL
+{
+   margin           : 0px;
+   padding-left     : 10px;
+   list-style       : none;
+}
+
+DIV.tabs LI, DIV.tabs FORM
+{
+   display          : inline;
+   margin           : 0px;
+   padding          : 0px;
+}
+
+DIV.tabs FORM
+{
+   float            : right;
+}
+
+DIV.tabs A
+{
+   float            : left;
+   background       : url("tab_r.gif") no-repeat right top;
+   border-bottom    : 1px solid #84B0C7;
+   font-size        : x-small;
+   font-weight      : bold;
+   text-decoration  : none;
+}
+
+DIV.tabs A:hover
+{
+   background-position: 100% -150px;
+}
+
+DIV.tabs A:link, DIV.tabs A:visited,
+DIV.tabs A:active, DIV.tabs A:hover
+{
+       color: #1A419D;
+}
+
+DIV.tabs SPAN
+{
+   float            : left;
+   display          : block;
+   background       : url("tab_l.gif") no-repeat left top;
+   padding          : 5px 9px;
+   white-space      : nowrap;
+}
+
+DIV.tabs INPUT
+{
+   float            : right;
+   display          : inline;
+   font-size        : 1em;
+}
+
+DIV.tabs TD
+{
+   font-size        : x-small;
+   font-weight      : bold;
+   text-decoration  : none;
+}
+
+
+
+/* Commented Backslash Hack hides rule from IE5-Mac \*/
+DIV.tabs SPAN {float : none;}
+/* End IE5-Mac hack */
+
+DIV.tabs A:hover SPAN
+{
+   background-position: 0% -150px;
+}
+
+DIV.tabs LI#current A
+{
+   background-position: 100% -150px;
+   border-width     : 0px;
+}
+
+DIV.tabs LI#current SPAN
+{
+   background-position: 0% -150px;
+   padding-bottom   : 6px;
+}
+
+DIV.nav
+{
+   background       : none;
+   border           : none;
+   border-bottom    : 1px solid #84B0C7;
+}
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/xio_8c.html b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/xio_8c.html
new file mode 100644
index 0000000..cc3a119
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu/doc/html/api/xio_8c.html
@@ -0,0 +1,313 @@
+
+
+   
+
+   xio.c File Reference
+
+
+
+
Xilinx Processor IP Library

+Software Drivers
+

+
+

+  

+

+  

+
xio.c File Reference
Detailed Description

+Contains I/O functions for memory-mapped or non-memory-mapped I/O architectures. These functions encapsulate generic CPU I/O requirements.

+
+ MODIFICATION HISTORY:

+
 Ver   Who  Date	 Changes
+ ----- ---- -------- -------------------------------------------------------
+ 1.00a rpm  11/07/03 Added InSwap/OutSwap routines for endian conversion
+ 1.01a ecm  02/24/06 CR225908 corrected the extra curly braces in macros
+                     and bumped version to 1.01.a.
+ 2.11a mta  03/21/07 Updated to new coding style.

+
 

+
Note:

+This file may contain architecture-dependent code. 
+

+#include "xio.h"

+#include "xil_types.h"

+#include "xil_assert.h"

+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

Functions
void XIo_EndianSwap16 (u16 Source, u16 *DestPtr)
void XIo_EndianSwap32 (u32 Source, u32 *DestPtr)
u16 XIo_InSwap16 (XIo_Address InAddress)
u32 XIo_InSwap32 (XIo_Address InAddress)
void XIo_OutSwap16 (XIo_Address OutAddress, u16 Value)
void XIo_OutSwap32 (XIo_Address OutAddress, u32 Value)

+
Function Documentation

+

+
+  
+    
+  
+

+      
+        
+          
+          
+          
+          
+        
+        
+          
+          
+          
+          
+        
+        
+          
+          
+          
+        
+      
void XIo_EndianSwap16           ( u16  Source, 
u16 *  DestPtr
) 

+    

+
+  
+    
+    
+  
+

+       
+    
+
+

+Performs a 16-bit endian converion.

+
Parameters:

+  
+    
+    
+  
Source contains the value to be converted. 
DestPtr contains a pointer to the location to put the converted value.

+

+
Returns:
None.

+
Note:
None. 

+    

+

+
+  
+    
+  
+

+      
+        
+          
+          
+          
+          
+        
+        
+          
+          
+          
+          
+        
+        
+          
+          
+          
+        
+      
void XIo_EndianSwap32           ( u32  Source, 
u32 *  DestPtr
) 

+    

+
+  
+    
+    
+  
+

+       
+    
+
+

+Performs a 32-bit endian converion.

+
Parameters:

+  
+    
+    
+  
Source contains the value to be converted. 
DestPtr contains a pointer to the location to put the converted value.

+

+
Returns:
None.

+
Note:
None. 

+    

+

+
+  
+    
+  
+

+      
+        
+          
+          
+          
+          
+          
+          
+        
+      
u16 XIo_InSwap16           ( XIo_Address  InAddress           ) 

+    

+
+  
+    
+    
+  
+

+       
+    
+
+

+Performs an input operation for a 16-bit memory location by reading from the specified address and returning the byte-swapped value read from that address.

+
Parameters:

+  
+    
+  
InAddress contains the address to perform the input operation at.

+

+
Returns:
The byte-swapped value read from the specified input address.

+
Note:
None. 

+    

+

+
+  
+    
+  
+

+      
+        
+          
+          
+          
+          
+          
+          
+        
+      
u32 XIo_InSwap32           ( XIo_Address  InAddress           ) 

+    

+
+  
+    
+    
+  
+

+       
+    
+
+

+Performs an input operation for a 32-bit memory location by reading from the specified address and returning the byte-swapped value read from that address.

+
Parameters:

+  
+    
+  
InAddress contains the address to perform the input operation at.

+

+
Returns:
The byte-swapped value read from the specified input address.

+
Note:
None. 

+    

+

+
+  
+    
+  
+

+      
+        
+          
+          
+          
+          
+        
+        
+          
+          
+          
+          
+        
+        
+          
+          
+          
+        
+      
void XIo_OutSwap16           ( XIo_Address  OutAddress, 
u16  Value
) 

+    

+
+  
+    
+    
+  
+

+       
+    
+
+

+Performs an output operation for a 16-bit memory location by writing the specified value to the the specified address. The value is byte-swapped before being written.

+
Parameters:

+  
+    
+    
+  
OutAddress contains the address to perform the output operation at. 
Value contains the value to be output at the specified address.

+

+
Returns:
None.

+
Note:
None. 

+    

+

+
+  
+    
+  
+

+      
+        
+          
+          
+          
+          
+        
+        
+          
+          
+          
+          
+        
+        
+          
+          
+          
+        
+      
void XIo_OutSwap32           ( XIo_Address  OutAddress, 
u32  Value
) 

+    

+
+  
+    
+    
+  
+

+       
+    
+
+

+Performs an output operation for a 32-bit memory location by writing the specified value to the the specified address. The value is byte-swapped before being written.

+
Parameters:

+  
+    
+    
+  
OutAddress contains the address at which the output operation has to be done. 
Value contains the value to be output at the specified address.

+

+
Returns:
None.

+
Note:
None. 

+    

+Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. 
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src/ucos_cpu_cortexa9.h b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src/ucos_cpu_cortexa9.h
new file mode 100644
index 0000000..8a5cee1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src/ucos_cpu_cortexa9.h
@@ -0,0 +1,55 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                    Cortex A9 Low Level Functions
+*
+* Filename      : ucos_cpu_cortexa9.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_CPU_CORTEXA9_PRESENT
+#define  UCOS_CPU_CORTEXA9_PRESENT
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void CPU_CortexA9_L1DCacheEn (void);
+
+void CPU_CortexA9_L1ICacheEn (void);
+
+void CPU_CortexA9_BranchPredictEn (void);
+
+void CPU_CortexA9_L1PrefetchEn (void);
+
+void CPU_CortexA9_L2PrefetchEn (void);
+
+void CPU_CortexA9_FLZEn (void);
+
+#endif /* UCOS_CPU_CORTEXA9_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src/ucos_cpu_cortexa9_a.S b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src/ucos_cpu_cortexa9_a.S
new file mode 100644
index 0000000..f251cb1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src/ucos_cpu_cortexa9_a.S
@@ -0,0 +1,73 @@
+@
+@********************************************************************************************************
+@                                   Cortex A9 Low Level Functions
+@
+@ File      : ucos_cpu_cortexa9.S
+@ For       : Cortex A9 on the Zynq-7000 EPP
+@ Toolchain : GNU
+@ Version   : 1.42
+@********************************************************************************************************
+@
+
+.equ CTRL_C1_M,  0x0001
+.equ CTRL_C1_A,  0x0002
+.equ CTRL_C1_C,  0x0004
+.equ CTRL_C1_W,  0x0008
+.equ CTRL_C1_S,  0x0100
+.equ CTRL_C1_R,  0x0200
+.equ CTRL_C1_Z,  0x0800
+.equ CTRL_C1_I,  0x1000
+.equ CTRL_C1_V,  0x2000
+.equ CTRL_C1_RR, 0x4000
+
+
+
+.global CPU_CortexA9_L1DCacheEn
+CPU_CortexA9_L1DCacheEn:
+    MRC     p15, 0, r0, c1, c0, 0
+    ORR     r0, r0, #CTRL_C1_C
+    MCR     p15, 0, r0, c1, c0, 0
+    DSB
+    ISB
+    BX      lr
+
+    .global CPU_CortexA9_L1ICacheEn
+CPU_CortexA9_L1ICacheEn:
+    MRC     p15, 0, r0, c1, c0, 0
+    ORR     r0, r0, #CTRL_C1_I
+    MCR     p15, 0, r0, c1, c0, 0
+    DSB
+    ISB
+    BX      lr
+
+    .global CPU_CortexA9_BranchPredictEn
+CPU_CortexA9_BranchPredictEn:
+    MRC     p15, 0, r0, c1, c0, 0
+    ORR     r0, r0, #CTRL_C1_Z
+    MCR     p15, 0,r0, c1, c0, 0
+    DSB
+    BX      lr
+
+   .global CPU_CortexA9_L1PrefetchEn
+CPU_CortexA9_L1PrefetchEn:
+    MRC     p15, 0, r0, c1, c0, 1
+    ORR     r0, r0, #0x4
+    MCR     p15, 0, r0, c1, c0, 1
+    DSB
+    BX      lr
+
+   .global CPU_CortexA9_L2PrefetchEn
+CPU_CortexA9_L2PrefetchEn:
+    MRC     p15, 0, r0, c1, c0, 1
+    ORR     r0, r0, #0x2
+    MCR     p15, 0, r0, c1, c0, 1
+    DSB
+    BX      lr
+
+   .global CPU_CortexA9_FLZEn
+CPU_CortexA9_FLZEn:
+    MRC     p15, 0, r0, c1, c0, 1
+    ORR     r0, r0, #0x8
+    MCR     p15, 0, r0, c1, c0, 1
+    DSB
+    BX      lr
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src/ucos_cpu_cortexa9_c.c b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src/ucos_cpu_cortexa9_c.c
new file mode 100644
index 0000000..55272b3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexa9/src/ucos_cpu_cortexa9_c.c
@@ -0,0 +1,55 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                    Cortex A9 Low Level Functions
+*
+* Filename      : ucos_cpu_cortexa9.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexr5/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexr5/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexr5/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexr5/src/xcpu_cortexr5.h b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexr5/src/xcpu_cortexr5.h
new file mode 100644
index 0000000..7b21dcd
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_cpu_cortexr5/src/xcpu_cortexr5.h
@@ -0,0 +1,43 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+*
+* @file xcpu_cortexr5.h
+* @addtogroup cpu_cortexr5_v1_1
+* @{
+* @details
+*
+* dummy file
+*
+******************************************************************************/
+/** @} */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_emacps/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_emacps/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_emacps/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.c b/src/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.c
new file mode 100644
index 0000000..c80cee2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.c
@@ -0,0 +1,57 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                        GIGABIT ETHERNET MAC
+*
+* Filename      : ucos_emacps.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+
+extern UCOS_EMACPS_Config UCOS_EMACPS_ConfigTable[];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.h b/src/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.h
new file mode 100644
index 0000000..3fea206
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_emacps/src/ucos_emacps.h
@@ -0,0 +1,69 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                        GIGABIT ETHERNET MAC
+*
+* Filename      : ucos_emacps.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_EMACPS_PRESENT
+#define  UCOS_EMACPS_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+
+/*
+*********************************************************************************************************
+*                                        STRUCTURE DEFINITIONS
+*********************************************************************************************************
+*/
+
+
+typedef struct {
+    CPU_INT32U  DeviceId;
+    CPU_INT32U  BaseAddress;
+    CPU_INT32U  ClkFreq;
+    CPU_INT32U  IntSource;
+} UCOS_EMACPS_Config;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#endif /* UCOS_EMACPS_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_l2cachec/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_l2cachec/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_l2cachec/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.c b/src/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.c
new file mode 100644
index 0000000..319af7a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.c
@@ -0,0 +1,162 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                     L2C310 L2 CACHE CONTROLLER
+*
+* Filename      : ucos_l2cachec.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             L2CacheC_En()
+*
+* Description : Enable the L2 Cache.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void L2CacheC_En (void)
+{
+    L2CACHEC_REG->REG1_CTRL |= L2CACHEC_BIT_CTRL_EN;
+}
+
+
+/*
+*********************************************************************************************************
+*                                          L2CacheC_AuxCtrlSet()
+*
+* Description : Set the content of the Auxilliary Control Register to "aux_val".
+*
+* Argument(s) : aux_val Value to write in the Auxilliary Control Register.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void L2CacheC_AuxCtrlSet (CPU_INT32U aux_val)
+{
+    L2CACHEC_REG->REG1_AUX_CTRL = aux_val;
+}
+
+/*
+*********************************************************************************************************
+*                                          L2CacheC_PrefetchCtrlSet()
+*
+* Description : Set the content of the Auxilliary Control Register to "aux_val".
+*
+* Argument(s) : aux_val Value to write in the Auxilliary Control Register.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void L2CacheC_PrefetchCtrlSet (CPU_INT32U prefetch_val)
+{
+    L2CACHEC_REG->REG15_PREFETCH_CTRL = prefetch_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             L2CacheC_TagRamLatencySet()
+*
+* Description : Configure the L2 Cache tag ram access latencies.
+*
+* Argument(s) : setup_latency  Setup latency.
+*               read_latency   Read latency.
+*               write_latency  Write latency.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void L2CacheC_TagRamLatencySet (CPU_INT32U setup_latency, CPU_INT32U read_latency, CPU_INT32U write_latency)
+{
+    L2CACHEC_REG->REG1_TAG_RAM_CTRL = (setup_latency & 0x7u) | (read_latency & 0x7u) << 4 | (write_latency & 0x7u) << 8;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             L2CacheC_DataRamLatencySet()
+*
+* Description : Configure the L2 Cache data ram access latencies.
+*
+* Argument(s) : setup_latency  Setup latency.
+*               read_latency   Read latency.
+*               write_latency  Write latency.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void L2CacheC_DataRamLatencySet (CPU_INT32U setup_latency, CPU_INT32U read_latency, CPU_INT32U write_latency)
+{
+    L2CACHEC_REG->REG1_DATA_RAM_CTRL = (setup_latency & 0x7u) | (read_latency & 0x7u) << 4 | (write_latency & 0x7u) << 8;
+}
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.h b/src/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.h
new file mode 100644
index 0000000..065fcf2
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_l2cachec/src/ucos_l2cachec.h
@@ -0,0 +1,150 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                     L2C310 L2 CACHE CONTROLLER
+*
+* Filename      : ucos_l2cachec.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_L2CACHEC_PRESENT
+#define  UCOS_L2CACHEC_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  L2CACHEC_REG            ((L2CACHEC_PTR)(XPAR_PS7_L2CACHEC_0_BASEADDR))
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*********************************************************************************************************
+*/
+
+
+                                                                /* ---------------- L2C310 REGISTERS ------------------ */
+typedef  struct  l2cachec {
+    CPU_REG32  REG0_ID;                                         /* Cache ID Register.                                   */
+    CPU_REG32  REG0_TYPE;                                       /* Cache Type Register.                                 */
+    CPU_REG32  RESERVED1[0x3E];                                 /* Reserved.                                            */
+    CPU_REG32  REG1_CTRL;                                       /* Cache Control Register.                              */
+    CPU_REG32  REG1_AUX_CTRL;                                   /* Cache Auxiliary Control Register.                    */
+    CPU_REG32  REG1_TAG_RAM_CTRL;                               /* Tag RAM Control.                                     */
+    CPU_REG32  REG1_DATA_RAM_CTRL;                              /* Data RAM Control.                                    */
+    CPU_REG32  RESERVED2[0x3C];                                 /* Reserved.                                            */
+    CPU_REG32  REG2_EVCNT_CTRL;                                 /* Event Counter Control Register.                      */
+    CPU_REG32  REG2_EVCNT1_CFG;                                 /* Event Counter 1 Configuration Register.              */
+    CPU_REG32  REG2_EVCNT0_CFG;                                 /* Event Counter 0 Configuration Register.              */
+    CPU_REG32  REG2_EVCNT1;                                     /* Event Counter 1 Register.                            */
+    CPU_REG32  REG2_EVCNT0;                                     /* Event Counter 0 Register.                            */
+    CPU_REG32  REG2_INT_MASK;                                   /* Interrupt Mask Register.                             */
+    CPU_REG32  REG2_INT_MASKED_STATUS;                          /* Masked Interrupt Status Register.                    */
+    CPU_REG32  REG2_INT_RAW_STATUS;                             /* Raw Interrupt Status Register.                       */
+    CPU_REG32  REG2_INT_CLR;                                    /* Interrupt Clear Register.                            */
+    CPU_REG32  RESERVED3[0x143];                                /* Reserved.                                            */
+    CPU_REG32  REG7_CACHE_SYNC;                                 /* Cache SYNC.                                          */
+    CPU_REG32  RESERVED4[0xF];                                  /* Reserved.                                            */
+    CPU_REG32  REG7_INV_PA;                                     /* Invalidate PA.                                       */
+    CPU_REG32  REG7_INV_WAY;                                    /* Invalidate Way.                                      */
+    CPU_REG32  RESERVED5[0xE];                                  /* Reserved.                                            */
+    CPU_REG32  REG7_CLEAN_PA;                                   /* Clean PA.                                            */
+    CPU_REG32  REG7_CLEAN_INDEX;                                /* Clean Index.                                         */
+    CPU_REG32  REG7_CLEAN_WAY;                                  /* Clean Way.                                           */
+    CPU_REG32  RESERVED6[0xD];                                  /* Reserved.                                            */
+    CPU_REG32  REG7_CLEAN_INV_PA;                               /* Clean Invalidate PA.                                 */
+    CPU_REG32  REG7_CLEAN_INV_INDEX;                            /* Clean Invalidate Index.                              */
+    CPU_REG32  REG7_CLEAN_INV_WAY;                              /* Clean Invalidate Way.                                */
+    CPU_REG32  RESERVED7[0x41];                                 /* Reserved.                                            */
+    CPU_REG32  REG7_D_LOCKDOWN0;                                /* Data Lockdown X.                                     */
+    CPU_REG32  REG7_I_LOCKDOWN0;                                /* Instruction Lockdown X.                              */
+    CPU_REG32  REG7_D_LOCKDOWN1;                                /* Data Lockdown X.                                     */
+    CPU_REG32  REG7_I_LOCKDOWN1;                                /* Instruction Lockdown X.                              */
+    CPU_REG32  REG7_D_LOCKDOWN2;                                /* Data Lockdown X.                                     */
+    CPU_REG32  REG7_I_LOCKDOWN2;                                /* Instruction Lockdown X.                              */
+    CPU_REG32  REG7_D_LOCKDOWN3;                                /* Data Lockdown X.                                     */
+    CPU_REG32  REG7_I_LOCKDOWN3;                                /* Instruction Lockdown X.                              */
+    CPU_REG32  REG7_D_LOCKDOWN4;                                /* Data Lockdown X.                                     */
+    CPU_REG32  REG7_I_LOCKDOWN4;                                /* Instruction Lockdown X.                              */
+    CPU_REG32  REG7_D_LOCKDOWN5;                                /* Data Lockdown X.                                     */
+    CPU_REG32  REG7_I_LOCKDOWN5;                                /* Instruction Lockdown X.                              */
+    CPU_REG32  REG7_D_LOCKDOWN6;                                /* Data Lockdown X.                                     */
+    CPU_REG32  REG7_I_LOCKDOWN6;                                /* Instruction Lockdown X.                              */
+    CPU_REG32  REG7_D_LOCKDOWN7;                                /* Data Lockdown X.                                     */
+    CPU_REG32  REG7_I_LOCKDOWN7;                                /* Instruction Lockdown X.                              */
+    CPU_REG32  RESERVED8[0x4];                                  /* Reserved.                                            */
+    CPU_REG32  REG9_LOCK_LINE_EN;                               /* Lockdown by Line Enable Register.                    */
+    CPU_REG32  REG9_UNLOCK_WAY;                                 /* Cache Lockdown by Way.                               */
+    CPU_REG32  RESERVED9[0xAA];                                 /* Reserved.                                            */
+    CPU_REG32  REG12_ADDR_FILTER_START;                         /* Address filtering start.                             */
+    CPU_REG32  REG12_ADDR_FILTER_END;                           /* Address filtering end.                               */
+    CPU_REG32  RESERVED10[0xCE];                                /* Reserved.                                            */
+    CPU_REG32  REG15_DEBUG_CTRL;                                /* Debug Control Register.                              */
+    CPU_REG32  RESERVED11[0x7];                                 /* Reserved.                                            */
+    CPU_REG32  REG15_PREFETCH_CTRL;                             /* Prefetch Control Register.                           */
+    CPU_REG32  RESERVED12[0x7];                                 /* Reserved.                                            */
+    CPU_REG32  REG15_POWER_CTRL;                                /* Power Control Register.                              */
+} L2CACHEC, *L2CACHEC_PTR;
+
+
+                                                                /* -------------- CACHE CONTROL REGISTER -------------- */
+#define  L2CACHEC_BIT_CTRL_EN            DEF_BIT_00             /* L2 Cache Enable.                                     */
+
+                                                                /* -------- AUXILLIARY CACHE CONTROL REGISTER --------- */
+#define  L2CACHEC_BIT_AUX_CTRL_FLZ       DEF_BIT_00             /* Full Line of Zero Enable.                            */
+#define  L2CACHEC_BIT_AUX_CTRL_HPSODEV   DEF_BIT_10             /* High priority SO and Dev Enable.                     */
+#define  L2CACHEC_BIT_AUX_CTRL_STB_DEV_LIMIT DEF_BIT_11         /* Store Buffer Device Limitation.                      */
+#define  L2CACHEC_BIT_AUX_CTRL_PARITY    DEF_BIT_21             /* Parity Enable.                                       */
+#define  L2CACHEC_BIT_AUX_CTRL_DPREFETCH DEF_BIT_28             /* Data Prefetch Enable.                                */
+#define  L2CACHEC_BIT_AUX_CTRL_IPREFETCH DEF_BIT_29             /* Instruction Prefetch Enable.                         */
+#define  L2CACHEC_BIT_AUX_CTRL_EBRESP    DEF_BIT_30             /* Early BRESP Enable.                                  */
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+void L2CacheC_En (void);
+
+void L2CacheC_AuxCtrlSet (CPU_INT32U aux_val);
+
+void L2CacheC_PrefetchCtrlSet (CPU_INT32U prefetch_val);
+
+void L2CacheC_TagRamLatencySet (CPU_INT32U setup_latency,
+                                CPU_INT32U read_latency,
+                                CPU_INT32U write_latency);
+
+void L2CacheC_DataRamLatencySet (CPU_INT32U setup_latency,
+                                 CPU_INT32U read_latency,
+                                 CPU_INT32U write_latency);
+
+#endif /* UCOS_L2CACHEC_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_scuc/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_scuc/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_scuc/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.c b/src/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.c
new file mode 100644
index 0000000..3318cb8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.c
@@ -0,0 +1,180 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                     CORTEX A9 SNOOP CONTROL UNIT
+*
+* Filename      : ucos_scuc.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             SCUC_En()
+*
+* Description : Enable the snoop control unit.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void SCUC_En (void)
+{
+    SCUCREG->CTRL |= SCUC_BIT_CTRL_SCUEN;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SCUC_InvalidateAll()
+*
+* Description : Invalidate all for the current core.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void SCUC_InvalidateAll (void)
+{
+    SCUCREG->INVALL = 0xF << (XPAR_CPU_ID * 4);
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SCUC_SpeculativeLineFillsEn()
+*
+* Description : Enable speculative line fills to L2.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void SCUC_SpeculativeLineFillsEn (void)
+{
+    SCUCREG->CTRL |= SCUC_BIT_CTRL_SPECLFEN;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SCUC_StandbyEn()
+*
+* Description : Enable standby operation.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void SCUC_StandbyEn (void)
+{
+    SCUCREG->CTRL |= SCUC_BIT_CTRL_STANDBYEN;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SCUC_ICStandbyEn()
+*
+* Description : Enable standby operation.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void SCUC_ICStandbyEn (void)
+{
+    SCUCREG->CTRL |= SCUC_BIT_CTRL_ICSTANDBYEN;
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SCUC_DevicePort0En()
+*
+* Description : For all non-cacheable access to master port 0.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void SCUC_DevicePort0En (void)
+{
+    SCUCREG->CTRL |= SCUC_BIT_CTRL_FORCEP0EN;
+}
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.h b/src/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.h
new file mode 100644
index 0000000..878dd05
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_scuc/src/ucos_scuc.h
@@ -0,0 +1,95 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                     CORTEX A9 SNOOP CONTROL UNIT
+*
+* Filename      : ucos_scuc.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_SCUC_PRESENT
+#define  UCOS_SCUC_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#define  SCUCREG            ((SCUC_PTR)(XPAR_PS7_SCUC_0_BASEADDR))
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*********************************************************************************************************
+*/
+
+
+                                                                /* ------------ GIC DISTRIBUTOR INTERFACE ------------- */
+typedef  struct  scuc {
+    CPU_REG32  CTRL;                                            /* SCU Control Register.                                */
+    CPU_REG32  CFG;                                             /* SCU Configuration Register.                          */
+    CPU_REG32  PSR;                                             /* SCU Power Status Register.                           */
+    CPU_REG32  INVALL;                                          /* SCU Invalidate All Register.                         */
+    CPU_REG32  FILERSTART;                                      /* Filtering Start Address Register.                    */
+    CPU_REG32  FILTEREND;                                       /* Filtering End Address Register.                      */
+    CPU_REG32  SAC;                                             /* SCU Secure Access Control Register.                  */
+    CPU_REG32  SNSAC;                                           /* SCU None-Secure Access Control Register.             */
+} SCUC, *SCUC_PTR;
+
+
+                                                                /* --------------- SCU CONTROL REGISTER --------------- */
+#define  SCUC_BIT_CTRL_SCUEN            DEF_BIT_00              /* SCU Enable.                                          */
+#define  SCUC_BIT_CTRL_FILTEREN         DEF_BIT_01              /* SCU Address Filtering Enable.                        */
+#define  SCUC_BIT_CTRL_PARITYEN         DEF_BIT_02              /* SCU Tag RAM Parity Enable.                           */
+#define  SCUC_BIT_CTRL_SPECLFEN         DEF_BIT_03              /* SCU Speculative Line Fills Enable.                   */
+#define  SCUC_BIT_CTRL_FORCEP0EN        DEF_BIT_04              /* Force All Device to Port 0.                          */
+#define  SCUC_BIT_CTRL_STANDBYEN        DEF_BIT_05              /* SCU Standby Enable.                                  */
+#define  SCUC_BIT_CTRL_ICSTANDBYEN      DEF_BIT_06              /* IC Standby Enable.                                   */
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+void SCUC_En (void);
+
+void SCUC_InvalidateAll (void);
+
+void SCUC_SpeculativeLineFillsEn (void);
+
+void SCUC_StandbyEn (void);
+
+void SCUC_ICStandbyEn (void);
+
+void SCUC_DevicePort0En (void);
+
+
+#endif /* UCOS_SCUC_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_scugic/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_scugic/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_scugic/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.c b/src/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.c
new file mode 100644
index 0000000..413e712
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.c
@@ -0,0 +1,294 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                CORTEX A GENERIC INTERRUPT CONTROLLER
+*
+* Filename      : bsp_int.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         SCUGIC_PrioMaskSet()
+*
+* Description : Set CPU's interrupt priority mask.
+*
+* Argument(s) : prio    	Priority mask.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void  SCUGIC_PrioMaskSet (CPU_INT32U prio)
+{
+    if(prio < 256) {
+        CPU_MB();
+        SCUGIC_IF_REG->ICCPMR = prio;
+        CPU_MB();
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SCUGIC_PrioSet()
+*
+* Description : Set interrupt priority.
+*
+* Argument(s) : int_id  Interrupt id.
+*
+*               prio    Interrupt priority.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void  SCUGIC_PrioSet (CPU_INT32U  int_id,
+                      CPU_INT32U  prio)
+{
+    CPU_INT32U  reg_off;
+    CPU_INT32U  reg_byte;
+    CPU_INT32U  temp_reg;
+    CPU_SR_ALLOC();
+
+
+    if(prio >= 256) {
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();
+
+    reg_off = int_id >> 2u;
+    reg_byte = int_id & 0x03;
+
+    temp_reg = SCUGIC_DIST_REG->ICDIPRn[reg_off];
+    temp_reg = temp_reg & ~(0xFF << (reg_byte * 8u));
+    temp_reg = temp_reg | ((prio & 0x1Fu) << (reg_byte * 8u));
+
+    SCUGIC_DIST_REG->ICDIPRn[reg_off] = temp_reg;
+
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+*********************************************************************************************************
+*                                           SCUGIC_TargetSet()
+*
+* Description : Set interrupt target.
+*
+* Argument(s) : int_id              Interrupt id.
+*
+*               int_target_list     Interrupt CPU target list.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void  SCUGIC_TargetSet (CPU_INT32U  int_id,
+                        CPU_INT08U  int_target_list)
+{
+    CPU_INT32U  reg_off;
+    CPU_INT32U  reg_byte;
+    CPU_INT32U  temp_reg;
+    CPU_SR_ALLOC();
+
+
+    CPU_CRITICAL_ENTER();
+
+    reg_off = int_id >> 2u;
+    reg_byte = int_id & 0x03;
+
+    temp_reg = SCUGIC_DIST_REG->ICDIPTRn[reg_off];
+    temp_reg = temp_reg & ~(0xFF << (reg_byte * 8u));
+    temp_reg = temp_reg | ((int_target_list & 0x1Fu) << (reg_byte * 8u));
+
+    SCUGIC_DIST_REG->ICDIPTRn[reg_off] = temp_reg;
+
+    CPU_CRITICAL_EXIT();
+}
+
+/*
+*********************************************************************************************************
+*                                           SCUGIC_TypeSet()
+*
+* Description : Set interrupt type.
+*
+* Argument(s) : int_id              Interrupt id.
+*
+*               type                0 for level sensitive interrupt 1 for edge.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void  SCUGIC_TypeSet (CPU_INT32U        int_id,
+                      CPU_BOOLEAN       type)
+{
+    CPU_INT32U  reg_off;
+    CPU_INT32U  reg_byte;
+    CPU_INT32U  temp_reg;
+    CPU_SR_ALLOC();
+
+
+    if(type > 1) {
+        return;
+    }
+
+    CPU_CRITICAL_ENTER();
+
+    reg_off = int_id >> 4u;
+    reg_byte = int_id & 0x0F;
+
+    temp_reg = SCUGIC_DIST_REG->ICDICFRn[reg_off];
+    temp_reg = temp_reg & ~(0x1 << ((reg_byte * 2u) + 1));
+    temp_reg = temp_reg | ((type) << ((reg_byte * 2u) + 1));
+
+    SCUGIC_DIST_REG->ICDICFRn[reg_off] = temp_reg;
+
+    CPU_CRITICAL_EXIT();
+}
+
+
+/*
+*********************************************************************************************************
+*                                            SCUGIC_SGITrig()
+*
+* Description : Trigger software generated interrupt.
+*
+* Argument(s) : int_sgi             SGI ID.
+*
+*               int_target_list     Interrupt CPU target list
+*
+* Return(s)   : none.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void  SCUGIC_SGITrig  (CPU_INT32U  int_sgi,
+                       CPU_INT32U  int_target_list)
+{
+    CPU_MB();
+    SCUGIC_DIST_REG->ICDSGIR = ((int_target_list & 0xFF) << 16u) | int_sgi;
+    CPU_MB();
+}
+
+
+/*
+*********************************************************************************************************
+*                                           Int_GIC_IntHandler()
+*
+* Description : Master interrupt handler.
+*
+* Argument(s) : none.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : OS_CPU_ExceptHndlr().
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+#if 0
+void  Int_GIC_Handler (void)
+{
+    CPU_INT32U        int_ack;
+    CPU_INT32U        int_id;
+    CPU_INT32U        int_cpu;
+    BSP_INT_FNCT_PTR  p_isr;
+
+
+    int_ack = BSP_INT_GIC_IF_REG->ICCIAR;                       /* Acknowledge the interrupt.                           */
+
+    int_id = int_ack & DEF_BIT_FIELD(10u, 0u);                  /* Mask away the CPUID.                                 */
+
+    if(int_id == 1023u) {                                       /* Spurious interrupt.                                  */
+        return;
+    }
+
+    int_cpu = (int_ack & DEF_BIT_FIELD(12u, 2u)) >> 10u;        /* Extract the interrupt source.                        */
+
+    p_isr = Int_GIC_VectTbl[int_id];                            /* Fetch ISR handler.                                   */
+
+    if(p_isr != DEF_NULL) {
+        (*p_isr)(int_cpu);                                      /* Call ISR handler.                                    */
+    }
+
+    CPU_MB();                                                   /* Memory barrier before ending the interrupt.          */
+
+    BSP_INT_GIC_IF_REG->ICCEOIR = int_id;
+}
+#endif
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.h b/src/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.h
new file mode 100644
index 0000000..04e678b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_scugic/src/ucos_scugic.h
@@ -0,0 +1,152 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2003-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                CORTEX A GENERIC INTERRUPT CONTROLLER
+*
+* Filename      : bsp_int.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_SCUGIC_PRESENT
+#define  UCOS_SCUGIC_PRESENT
+
+#include  
+#include  
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+#if (UCOS_CPU_TYPE == UCOS_CPU_TYPE_PS7)
+#define  SCUGIC_DIST_REG         ((SCUGIC_DIST_PTR)(XPAR_PS7_SCUGIC_0_DIST_BASEADDR))
+#define  SCUGIC_IF_REG           ((SCUGIC_IF_PTR)(XPAR_PS7_SCUGIC_0_BASEADDR))
+#define  SCUGIC_INT_SRC_CNT         94u
+#elif (UCOS_CPU_TYPE == UCOS_CPU_TYPE_PSUA53)
+#if (UCOS_XEN_GUEST == DEF_ENABLED)
+#define  SCUGIC_DIST_REG         ((SCUGIC_DIST_PTR)(0x03001000u))
+#define  SCUGIC_IF_REG           ((SCUGIC_IF_PTR)(0x03002000u))
+#else
+#define  SCUGIC_DIST_REG         ((SCUGIC_DIST_PTR)(XPAR_PSU_ACPU_GIC_DIST_BASEADDR))
+#define  SCUGIC_IF_REG           ((SCUGIC_IF_PTR)(XPAR_PSU_ACPU_GIC_BASEADDR))
+#endif
+#define  SCUGIC_INT_SRC_CNT        164u
+#else
+#define  SCUGIC_DIST_REG         ((SCUGIC_DIST_PTR)(0xF9000000u))
+#define  SCUGIC_IF_REG           ((SCUGIC_IF_PTR)(0xF9001000u))
+#define  SCUGIC_INT_SRC_CNT        164u
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*********************************************************************************************************
+*/
+
+
+                                                                /* ------------ GIC DISTRIBUTOR INTERFACE ------------- */
+typedef  struct  scugic_dist {
+    CPU_REG32  ICDDCR;                                          /* Distributor Control Register.                        */
+    CPU_REG32  ICDICTR;                                         /* Interrupt Controller Type Register.                  */
+    CPU_REG32  ICDIIDR;                                         /* Distributor Implementer Identification Register.     */
+    CPU_REG32  RSVD1[29];                                       /* Reserved.                                            */
+    CPU_REG32  ICDISRn[32];                                     /* Interrupt Security Registers.                        */
+    CPU_REG32  ICDISERn[32];                                    /* Interrupt Set-Enable Registers.                      */
+    CPU_REG32  ICDICERn[32];                                    /* Interrupt Clear-Enable Registers.                    */
+    CPU_REG32  ICDISPRn[32];                                    /* Interrupt Set-Pending Registers.                     */
+    CPU_REG32  ICDICPRn[32];                                    /* Interrupt Clear-Pending Registers.                   */
+    CPU_REG32  ICDABRn[32];                                     /* Active Bit Registers.                                */
+    CPU_REG32  RSVD2[32];                                       /* Reserved.                                            */
+    CPU_REG32  ICDIPRn[255];                                    /* Interrupt Priority Registers.                        */
+    CPU_REG32  RSVD3[1];                                        /* Reserved.                                            */
+    CPU_REG32  ICDIPTRn[255];                                   /* Interrupt Processor Target Registers.                */
+    CPU_REG32  RSVD4[1];                                        /* Reserved.                                            */
+    CPU_REG32  ICDICFRn[64];                                    /* Interrupt Configuration Registers.                   */
+    CPU_REG32  RSVD5[128];                                      /* Reserved.                                            */
+    CPU_REG32  ICDSGIR;                                         /* Software Generate Interrupt Register.                */
+    CPU_REG32  RSVD6[51];                                       /* Reserved.                                            */
+} SCUGIC_DIST, *SCUGIC_DIST_PTR;
+
+
+                                                                /* ---------------- GIC CPU INTERFACE ----------------- */
+typedef  struct  scugic_if {
+    CPU_REG32  ICCICR;                                          /* CPU Interface Control Register.                      */
+    CPU_REG32  ICCPMR;                                          /* Interrupt Priority Mask Register.                    */
+    CPU_REG32  ICCBPR;                                          /* Binary Point Register.                               */
+    CPU_REG32  ICCIAR;                                          /* Interrupt Acknowledge Register.                      */
+    CPU_REG32  ICCEOIR;                                         /* End Interrupt Register.                              */
+    CPU_REG32  ICCRPR;                                          /* Running Priority Register.                           */
+    CPU_REG32  ICCHPIR;                                         /* Highest Pending Interrupt Register.                  */
+    CPU_REG32  ICCABPR;                                         /* Aliased Binary Point Register.                       */
+    CPU_REG32  RSVD[55];                                        /* Reserved.                                            */
+    CPU_REG32  ICCIIDR;                                         /* CPU Interface Identification Register.               */
+} SCUFIC_IF, *SCUGIC_IF_PTR;
+
+
+                                                                /* ----------- DISTRIBUTOR CONTROL REGISTER ----------- */
+#define  SCUGIC_DIST_ICDDCR_EN            DEF_BIT_00            /* Global GIC enable.                                   */
+
+
+
+                                                                /* ---------- CPU INTERFACE CONTROL REGISTER ---------- */
+#define  SCUGIC_IF_ICCICR_ENS             DEF_BIT_00            /* Enable secure interrupts.                            */
+#define  SCUGIC_IF_ICCICR_ENNS            DEF_BIT_01            /* Enable non-secure interrupts.                        */
+#define  SCUGIC_IF_ICCICR_ACKCTL          DEF_BIT_02            /* Secure ack of NS interrupts.                         */
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void        SCUGIC_Init        (void);
+
+void        SCUGIC_SrcEn       (CPU_INT32U        int_id);
+
+void        SCUGIC_SrcDis      (CPU_INT32U        int_id);
+
+void        SCUGIC_PrioMaskSet (CPU_INT32U        prio);
+
+void        SCUGIC_PrioSet     (CPU_INT32U        int_id,
+                                CPU_INT32U        prio);
+
+void        SCUGIC_TargetSet   (CPU_INT32U        int_id,
+                                CPU_INT08U        int_target_list);
+
+void        SCUGIC_TypeSet     (CPU_INT32U        int_id,
+                                CPU_BOOLEAN       type);
+
+void        SCUGIC_Handler     (void);
+
+void        SCUGIC_SGITrig     (CPU_INT32U        int_sgi,
+                                CPU_INT32U        int_target_list);
+
+
+#endif /* UCOS_SCUGIC_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_scutimer/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_scutimer/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_scutimer/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.c b/src/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.c
new file mode 100644
index 0000000..eec6a18
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.c
@@ -0,0 +1,45 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                             SCU TIMER
+*
+* Filename      : ucos_scutimer.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+#include  
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.h b/src/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.h
new file mode 100644
index 0000000..fb9f687
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_scutimer/src/ucos_scutimer.h
@@ -0,0 +1,38 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                             SCU TIMER
+*
+* Filename      : ucos_scutimer.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_SCUTIMER_PRESENT
+#define  UCOS_SCUTIMER_PRESENT
+
+
+#endif /* UCOS_SCUTIMER_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_sdps/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_sdps/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_sdps/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_sdps/src/dummy.txt b/src/ucos_v1_42/ucos/drivers/ucos_sdps/src/dummy.txt
new file mode 100644
index 0000000..e69de29
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_ttcps/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_ttcps/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_ttcps/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_ttcps/src/ucos_ttcps.c b/src/ucos_v1_42/ucos/drivers/ucos_ttcps/src/ucos_ttcps.c
new file mode 100644
index 0000000..4eeaf6c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_ttcps/src/ucos_ttcps.c
@@ -0,0 +1,148 @@
+
+#include 
+#include 
+
+
+extern UCOS_TTCPS_Config UCOS_TTCPS_ConfigTable[];
+
+static UCOS_TTCPS UCOS_TTCPS_Table[XPAR_UCOS_TTCPS_NUM_INSTANCES];
+
+
+typedef struct ttcps {
+    CPU_REG32  ClkCtrl;
+    CPU_REG32  RESERVED0[2];
+    CPU_REG32  CtrCtrl;
+    CPU_REG32  RESERVED1[2];
+    CPU_REG32  CtrVal;
+    CPU_REG32  RESERVED2[2];
+    CPU_REG32  IntervalCtrVal;
+    CPU_REG32  RESERVED3[2];
+    CPU_REG32  Match1CtrVal;
+    CPU_REG32  RESERVED4[2];
+    CPU_REG32  Match2CtrVal;
+    CPU_REG32  RESERVED5[2];
+    CPU_REG32  Match3CtrVal;
+    CPU_REG32  RESERVED6[2];
+    CPU_REG32  IntStat;
+    CPU_REG32  RESERVED7[2];
+    CPU_REG32  IntEn;
+    CPU_REG32  RESERVED8[2];
+    CPU_REG32  EventCtrl;
+    CPU_REG32  RESERVED9[2];
+    CPU_REG32  EventReg;
+    CPU_REG32  RESERVED10[2];
+} TTCPS, *TTCPS_PTR;
+
+#define TTCPS_BIT_CTRCTRL_DIS   DEF_BIT_00
+#define TTCPS_BIT_CTRCTRL_INT   DEF_BIT_01
+#define TTCPS_BIT_CTRCTRL_DEC   DEF_BIT_02
+#define TTCPS_BIT_CTRCTRL_MATCH DEF_BIT_03
+#define TTCPS_BIT_CTRCTRL_RST   DEF_BIT_04
+#define TTCPS_BIT_CTRCTRL_WAVE  DEF_BIT_05
+#define TTCPS_BIT_CTRCTRL_POL   DEF_BIT_06
+
+UCOS_TTCPS_HANDLE UCOS_TTCPSInit (CPU_INT32U DeviceId)
+{
+    UCOS_TTCPS_HANDLE Handle;
+    TTCPS_PTR Tmr;
+    CPU_SR_ALLOC();
+    
+    
+    if (DeviceId > XPAR_UCOS_TTCPS_NUM_INSTANCES) {
+        return DEF_NULL;
+    }
+    
+    Handle = &UCOS_TTCPS_Table[DeviceId];
+    
+    Handle->DeviceId = UCOS_TTCPS_ConfigTable[DeviceId].DeviceId;
+    Tmr = (TTCPS_PTR)UCOS_TTCPS_ConfigTable[DeviceId].BaseAddress;
+    Handle->Timer = Tmr;
+    
+    CPU_CRITICAL_ENTER(); /* Reset the timer. */
+    Tmr->CtrCtrl = 0x21;
+    Tmr->ClkCtrl = 0;
+    Tmr->IntervalCtrVal = 0;
+    Tmr->Match1CtrVal = 0;
+    Tmr->Match2CtrVal = 0;
+    Tmr->Match1CtrVal = 0;
+    Tmr->IntEn = 0;
+    Tmr->EventCtrl = 0;
+    Tmr->IntStat;
+    CPU_CRITICAL_EXIT();
+    
+    return (Handle);
+}
+
+
+CPU_BOOLEAN UCOS_TTCPSStart (UCOS_TTCPS_HANDLE Handle)
+{
+    TTCPS_PTR Tmr;
+    CPU_SR_ALLOC();
+    
+    
+    Tmr = Handle->Timer;
+    
+    CPU_CRITICAL_ENTER();
+    Tmr->CtrCtrl &= ~TTCPS_BIT_CTRCTRL_DIS;
+    CPU_CRITICAL_EXIT();
+    
+    return (DEF_OK);
+}
+
+
+CPU_BOOLEAN UCOS_TTCPSStop (UCOS_TTCPS_HANDLE Handle)
+{
+    TTCPS_PTR Tmr;
+    CPU_SR_ALLOC();
+    
+    
+    Tmr = Handle->Timer;
+    
+    CPU_CRITICAL_ENTER();
+    Tmr->CtrCtrl |= TTCPS_BIT_CTRCTRL_DIS;
+    CPU_CRITICAL_EXIT();
+    
+    return (DEF_OK);
+}
+
+
+CPU_BOOLEAN UCOS_TTCPSIntSet (UCOS_TTCPS_HANDLE Handle, CPU_INT32U Int)
+{
+    TTCPS_PTR Tmr;
+    CPU_SR_ALLOC();
+    
+    
+    Tmr = Handle->Timer;
+    
+    CPU_CRITICAL_ENTER();
+    Tmr->IntEn |= Int & UCOS_TTCPS_IXR_MASK;
+    CPU_CRITICAL_EXIT();
+    
+    return (DEF_OK);
+}
+
+
+CPU_BOOLEAN UCOS_TTCPSIntClr (UCOS_TTCPS_HANDLE Handle, CPU_INT32U Int)
+{
+    TTCPS_PTR Tmr;
+    CPU_SR_ALLOC();
+    
+    
+    Tmr = Handle->Timer;
+    
+    CPU_CRITICAL_ENTER();
+    Tmr->IntEn &= ~(Int & UCOS_TTCPS_IXR_MASK);
+    CPU_CRITICAL_EXIT();
+    
+    return (DEF_OK);
+}
+
+
+CPU_INT32U UCOS_TTCPSIntStatGet (UCOS_TTCPS_HANDLE Handle)
+{
+    TTCPS_PTR Tmr;
+
+    Tmr = Handle->Timer;
+
+    return (Tmr->IntStat);
+}
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_ttcps/src/ucos_ttcps.h b/src/ucos_v1_42/ucos/drivers/ucos_ttcps/src/ucos_ttcps.h
new file mode 100644
index 0000000..a2baabf
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_ttcps/src/ucos_ttcps.h
@@ -0,0 +1,33 @@
+
+#include  
+#include  
+
+typedef struct ttcps *TTCPS_PTR;
+
+typedef struct {
+    CPU_INT32U DeviceId;
+    CPU_INT32U BaseAddress;
+    CPU_INT32U ClockFreq;
+} UCOS_TTCPS_Config;
+
+typedef struct {
+    CPU_INT32U DeviceId;
+    TTCPS_PTR  Timer;
+} UCOS_TTCPS;
+
+typedef UCOS_TTCPS *UCOS_TTCPS_HANDLE;
+
+#define UCOS_TTCPS_IXR_INTERVAL DEF_BIT_00
+#define UCOS_TTCPS_IXR_MATCH0   DEF_BIT_01
+#define UCOS_TTCPS_IXR_MATCH1   DEF_BIT_02
+#define UCOS_TTCPS_IXR_MATCH2   DEF_BIT_03
+#define UCOS_TTCPS_IXR_CNT_OVR  DEF_BIT_04
+#define UCOS_TTCPS_IXR_EV       DEF_BIT_05
+#define UCOS_TTCPS_IXR_MASK     0x3F
+
+UCOS_TTCPS_HANDLE UCOS_TTCPSInit (CPU_INT32U DeviceId);
+CPU_BOOLEAN UCOS_TTCPSStart (UCOS_TTCPS_HANDLE Handle);
+CPU_BOOLEAN UCOS_TTCPSStop (UCOS_TTCPS_HANDLE Handle);
+CPU_BOOLEAN UCOS_TTCPSIntSet (UCOS_TTCPS_HANDLE Handle, CPU_INT32U Int);
+CPU_BOOLEAN UCOS_TTCPSIntClr (UCOS_TTCPS_HANDLE Handle, CPU_INT32U Int);
+CPU_INT32U UCOS_TTCPSIntStatGet (UCOS_TTCPS_HANDLE Handle);
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_uartps/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_uartps/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_uartps/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.c b/src/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.c
new file mode 100644
index 0000000..fa29699
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.c
@@ -0,0 +1,644 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                             CADENCE UART
+*
+* Filename      : ucos_uartps.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+/*
+* The configuration table for devices
+*/
+//UCOS_UARTPS_Config UCOS_UARTPS_ConfigTable[] =
+//{
+//        {
+//                XPAR_PS7_UART_1_DEVICE_ID,
+//                XPAR_PS7_UART_1_BASEADDR,
+//                XPAR_PS7_UART_1_UART_CLK_FREQ_HZ,
+//                XPAR_PS7_UART_1_HAS_MODEM,
+//                XPAR_PS7_UART_1_INT_SOURCE
+//        }
+//};
+/*
+* The uart configuration table for devices
+*/
+
+extern UCOS_UARTPS_Config UCOS_UARTPS_ConfigTable[];
+
+static UCOS_UARTPS UCOS_UARTPS_Table[XPAR_UCOS_UARTPS_NUM_INSTANCES];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            UARTPS_Init()
+*
+* Description : Initialize a UART.
+*
+* Argument(s) : device_id  ID of the UART to init.
+*
+* Return(s)   : Handle to the peripheral instance or DEF_NULL if
+*               the devide id is invalid.
+*
+* Note(s)     : Should be called before accessing any other functionalities of this peripheral.
+*
+*********************************************************************************************************
+*/
+
+UARTPS_HANDLE UARTPS_Init (CPU_INT32U device_id)
+{
+    UARTPS_HANDLE handle;
+    UARTPS_PTR    uart_ps;
+    KAL_ERR       kal_err;
+    CPU_INT32U    int_source;
+    CPU_SR_ALLOC();
+
+
+    if (device_id > XPAR_UCOS_UARTPS_NUM_INSTANCES) {
+        return (DEF_NULL);
+    }
+
+    handle = (UARTPS_HANDLE)&UCOS_UARTPS_Table[device_id];
+
+    handle->DeviceId = UCOS_UARTPS_ConfigTable[device_id].DeviceId;
+    uart_ps = (UARTPS_PTR)UCOS_UARTPS_ConfigTable[device_id].BaseAddress;
+    handle->UARTPS = uart_ps;
+    handle->ClkFreq = UCOS_UARTPS_ConfigTable[device_id].ClkFreq;
+    handle->HasModem = UCOS_UARTPS_ConfigTable[device_id].HasModem;
+
+
+    handle->TxSem = KAL_SemCreate("UARTPS Tx Semaphore", DEF_NULL, &kal_err);
+    if (kal_err != KAL_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    handle->RxSem = KAL_SemCreate("UARTPS Rx Semaphore", DEF_NULL, &kal_err);
+    if (kal_err != KAL_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    handle->TxMutex = KAL_LockCreate("UARTPS Tx Mutex", DEF_NULL, &kal_err);
+    if (kal_err != KAL_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    handle->RxMutex = KAL_LockCreate("UARTPS Rx Mutex", DEF_NULL, &kal_err);
+    if (kal_err != KAL_ERR_NONE) {
+        return (DEF_NULL);
+    }
+
+    int_source = UCOS_UARTPS_ConfigTable[device_id].IntSource;
+    handle->IntSource = int_source;
+
+    if (int_source != UCOS_INT_SOURCE_NONE) {
+        UCOS_IntVectSet(int_source,
+                        0u,
+                        (1 << XPAR_CPU_ID),
+                        UARTPS_IntHandler,
+                        (void *)handle);
+
+        UCOS_IntSrcEn(int_source);
+    }
+
+
+    CPU_CRITICAL_ENTER();
+
+    UARTPS_Disable(handle);
+
+    uart_ps->MODE = UARTPS_BIT_UART_MODE_CHMODE(0u) |
+                    UARTPS_BIT_UART_MODE_NBSTOP(0u) |
+                    UARTPS_BIT_UART_MODE_PAR(4u)    |
+                    UARTPS_BIT_UART_MODE_CHRL(0u);
+
+    UARTPS_DataFormatSet(handle, 115200, UARTPS_FORMAT_8_BITS, UARTPS_FORMAT_NO_PARITY, UARTPS_FORMAT_1_STOP_BIT);
+
+    UARTPS_RTOSet(handle, 0U);
+
+    uart_ps->RX_FIFO_LVL = 1u;
+
+    UARTPS_Enable(handle);
+
+    CPU_CRITICAL_EXIT();
+
+    return (handle);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UARTPS_Enable()
+*
+* Description : Enable a UART instance.
+*
+* Argument(s) : handle  Handle of the UART to enable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UARTPS_Enable (UARTPS_HANDLE handle)
+{
+    UARTPS_PTR uart_ps;
+    CPU_SR_ALLOC();
+
+
+    uart_ps = handle->UARTPS;
+
+    CPU_CRITICAL_ENTER();
+    uart_ps->CTRL =  (uart_ps->CTRL | UARTPS_BIT_UART_CTRL_TXEN | UARTPS_BIT_UART_CTRL_RXEN)
+                     & ~(UARTPS_BIT_UART_CTRL_TXDIS | UARTPS_BIT_UART_CTRL_RXDIS);
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UARTPS_Disable()
+*
+* Description : Disable a UART instance.
+*
+* Argument(s) : handle  Handle of the UART to disable.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UARTPS_Disable (UARTPS_HANDLE handle)
+{
+    UARTPS_PTR uart_ps;
+    CPU_SR_ALLOC();
+
+
+    uart_ps = handle->UARTPS;
+
+    CPU_CRITICAL_ENTER();
+    uart_ps->CTRL =  (uart_ps->CTRL | UARTPS_BIT_UART_CTRL_RXDIS | UARTPS_BIT_UART_CTRL_TXDIS)
+                     & ~(UARTPS_BIT_UART_CTRL_TXEN | UARTPS_BIT_UART_CTRL_RXEN);
+    CPU_CRITICAL_EXIT();
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UARTPS_RTOSet()
+*
+* Description : Configure the receive timeout of a UART.
+*
+* Argument(s) : handle  Handle of the UART to configure.
+*               rto     Receive timeout.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UARTPS_RTOSet (UARTPS_HANDLE handle,
+                           CPU_INT08U    rto)
+{
+    UARTPS_PTR uart_ps;
+
+
+    uart_ps = handle->UARTPS;
+
+    uart_ps->RX_TIMEOUT = rto;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                          UARTPS_DataFormatSet()
+*
+* Description : Configure the data format of a UART.
+*
+* Argument(s) : handle     Handle of the UART to configure.
+*
+*               baud_rate  Baud rate.
+*
+*               data_bits  Data bits. Possible options are :
+*                   UARTPS_FORMAT_8_BITS
+*                   UARTPS_FORMAT_7_BITS
+*                   UARTPS_FORMAT_6_BITS
+*
+*               parity     Parity. Possible options are :
+*                   UARTPS_FORMAT_NO_PARITY
+*                   UARTPS_FORMAT_MARK_PARITY
+*                   UARTPS_FORMAT_SPACE_PARITY
+*                   UARTPS_FORMAT_ODD_PARITY
+*                   UARTPS_FORMAT_EVEN_PARITY
+*
+*               stop_bits  Stop Bits. Possible options are :
+*                   UARTPS_FORMAT_2_STOP_BIT
+*                   UARTPS_FORMAT_1_5_STOP_BIT
+*                   UARTPS_FORMAT_1_STOP_BIT
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UARTPS_DataFormatSet (UARTPS_HANDLE handle,
+                                  CPU_INT32U    baud_rate,
+                                  CPU_INT32U    data_bits,
+                                  CPU_INT32U    parity,
+                                  CPU_INT32U    stop_bits)
+{
+    CPU_INT32U mode_reg;
+    UARTPS_PTR uart_ps;
+
+
+    uart_ps = handle->UARTPS;
+
+    if ((data_bits != UARTPS_FORMAT_6_BITS) &&
+        (data_bits != UARTPS_FORMAT_7_BITS  &&
+        (data_bits != UARTPS_FORMAT_8_BITS))) {
+        return (DEF_FAIL);
+    }
+
+    if (parity > UARTPS_FORMAT_NO_PARITY) {
+        return (DEF_FAIL);
+    }
+
+    if (stop_bits > UARTPS_FORMAT_2_STOP_BIT) {
+        return (DEF_FAIL);
+    }
+
+    if (UARTPS_BaudRateSet(handle, baud_rate) != DEF_OK) {
+        return (DEF_FAIL);
+    }
+
+    mode_reg = uart_ps->MODE;
+    mode_reg &= ~(UARTPS_BIT_UART_MODE_CHRL_MSK | UARTPS_BIT_UART_MODE_NBSTOP_MSK | UARTPS_BIT_UART_MODE_PAR_MSK);
+    mode_reg |= (UARTPS_BIT_UART_MODE_CHRL(data_bits) | UARTPS_BIT_UART_MODE_PAR(parity) | UARTPS_BIT_UART_MODE_NBSTOP(stop_bits));
+    uart_ps->MODE = mode_reg;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UARTPS_OperModeSet()
+*
+* Description : Set the operation mode a uart.
+*
+* Argument(s) : handle    Handle of the UART to configure.
+*
+*               oper_mode Operation mode. Possible options are :
+*                   UARTPS_OPER_MODE_NORMAL
+*                   UARTPS_OPER_MODE_AUTO_ECHO
+*                   UARTPS_OPER_MODE_LOCAL_LOOP
+*                   UARTPS_OPER_MODE_REMOTE_LOOP
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UARTPS_OperModeSet (UARTPS_HANDLE handle,
+                                CPU_INT32U    oper_mode)
+{
+    CPU_INT32U mode_reg;
+    UARTPS_PTR uart_ps;
+
+
+    uart_ps = handle->UARTPS;
+
+    if (oper_mode > UARTPS_OPER_MODE_REMOTE_LOOP) {
+        return (DEF_FAIL);
+    }
+
+    mode_reg = uart_ps->MODE;
+
+    mode_reg &= ~UARTPS_BIT_UART_MODE_CHMODE_MSK;
+    mode_reg |=  UARTPS_BIT_UART_MODE_CHMODE(oper_mode);
+
+    uart_ps->MODE = mode_reg;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UARTPS_BaudRateSet()
+*
+* Description : Set the baud rate of a uart.
+*
+* Argument(s) : handle    Handle of the UART to configure.
+*
+*               baud_rate Baud rate.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN UARTPS_BaudRateSet (UARTPS_HANDLE handle,
+                                CPU_INT32U    baud_rate)
+{
+    UARTPS_PTR uart_ps;
+    CPU_INT32U clk;
+    CPU_INT32U actual_rate;
+    CPU_INT32U baud_div;
+    CPU_INT32U baud_rate_gen;
+    CPU_INT32U best_baud_div;
+    CPU_INT32U best_baud_rate_gen;
+    CPU_INT32U baud_error;
+    CPU_INT32U best_error = 0xFFFFFFFFu;
+
+
+    uart_ps = handle->UARTPS;
+
+    if ((baud_rate * 2) > handle->ClkFreq) {
+        return (DEF_FAIL);
+    }
+
+    if ((uart_ps->MODE & UARTPS_BIT_UART_MODE_CLKS) != 0) {
+        clk = handle->ClkFreq / 8;
+    } else {
+        clk = handle->ClkFreq;
+    }
+
+    for (baud_div = 4; baud_div < 255; baud_div++) {
+        baud_rate_gen = clk / (baud_rate * (baud_div + 1));
+        actual_rate = clk/ (baud_rate_gen * (baud_div + 1));
+        if (baud_rate > actual_rate) {
+            baud_error = baud_rate - actual_rate;
+        }
+        else {
+            baud_error = actual_rate - baud_rate;
+        }
+
+        if (best_error > baud_error) {
+            best_error = baud_error;
+            best_baud_div = baud_div;
+            best_baud_rate_gen = baud_rate_gen;
+        }
+    }
+
+    uart_ps->BAUD = best_baud_rate_gen;
+    uart_ps->BAUD_DIV = best_baud_div;
+
+    uart_ps->CTRL = UARTPS_BIT_UART_CTRL_TXRES | UARTPS_BIT_UART_CTRL_RXRES;
+
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             UARTPS_WrStr()
+*
+* Description : Write a null terminated string through the UART.
+*
+* Argument(s) : handle    Handle of the UART to configure.
+*
+*               p_str     String to output.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : Transmission is always blocking, interrupt based and protected by an internal TX mutex.
+*               UARTPS_WrStr will return once the entire string has been written to the device FIFO.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  UARTPS_WrStr (UARTPS_HANDLE   handle,
+                           const CPU_CHAR *p_str)
+{
+    UARTPS_PTR uart_ps;
+    KAL_ERR    kal_err;
+
+
+    uart_ps = handle->UARTPS;
+
+    KAL_LockAcquire(handle->TxMutex, 0u, 0u, &kal_err);
+
+    while ((*p_str) != DEF_NULL) {
+        if ((uart_ps->CHAN_STAT & UARTPS_BIT_UART_CSTAT_TNFUL) != 0u) {
+            if (handle->IntSource != UCOS_INT_SOURCE_NONE) {
+                uart_ps->INTR_EN = UARTPS_BIT_UART_INTR_TEMPTY;
+                KAL_SemPend(handle->TxSem, 0u, 0u, &kal_err);
+            } else {
+                while ((uart_ps->CHAN_STAT & UARTPS_BIT_UART_CSTAT_TNFUL) != 0) {}
+            }
+        }
+        uart_ps->TX_RX_FIFO = *p_str;
+        p_str++;
+    }
+
+    KAL_LockRelease(handle->TxMutex, &kal_err);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             UARTPS_WrByte()
+*
+* Description : Write a single byte through the UART.
+*
+* Argument(s) : handle    Handle of the UART to configure.
+*
+*               p_str     String to output.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : Transmission is always blocking, interrupt based and protected by an internal TX mutex.
+*               UARTPS_WrByte will return once the byte has been written to the device FIFO.
+*
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  UARTPS_WrByte (UARTPS_HANDLE   handle,
+                            CPU_CHAR        byte)
+{
+    UARTPS_PTR uart_ps;
+    KAL_ERR    kal_err;
+
+
+    uart_ps = handle->UARTPS;
+
+    KAL_LockAcquire(handle->TxMutex, 0u, 0u, &kal_err);
+
+    if ((uart_ps->CHAN_STAT & UARTPS_BIT_UART_CSTAT_TNFUL) != 0u) {
+        if (handle->IntSource != UCOS_INT_SOURCE_NONE) {
+            uart_ps->INTR_EN = UARTPS_BIT_UART_INTR_TEMPTY;
+            KAL_SemPend(handle->TxSem, 0u, 0u, &kal_err);
+        } else {
+            while ((uart_ps->CHAN_STAT & UARTPS_BIT_UART_CSTAT_TNFUL) != 0) {}
+        }
+    }
+    uart_ps->TX_RX_FIFO = byte;
+
+    KAL_LockRelease(handle->TxMutex, &kal_err);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                             UARTPS_RdByte()
+*
+* Description : Read a byte from the UART.
+*
+* Argument(s) : handle    Handle of the UART to read.
+*
+* Return(s)   : Read byte
+*
+* Note(s)     : Reception is always blocking, interrupt based and protected by an internal RX mutex.
+*               When the interrupt line of the UART isn't wired to the current CPU this function
+*               will fallback to polling.
+*
+*********************************************************************************************************
+*/
+
+CPU_CHAR  UARTPS_RdByte (UARTPS_HANDLE handle)
+{
+    UARTPS_PTR uart_ps;
+    KAL_ERR    kal_err;
+    CPU_CHAR   c;
+
+    uart_ps = handle->UARTPS;
+
+    KAL_LockAcquire(handle->RxMutex, 0u, 0u, &kal_err);
+
+    if ((uart_ps->CHAN_STAT & UARTPS_BIT_UART_CSTAT_REMPTY) != 0u) {
+        while ((uart_ps->CHAN_STAT & UARTPS_BIT_UART_CSTAT_REMPTY) != 0u) {
+            if (handle->IntSource != UCOS_INT_SOURCE_NONE) {
+                uart_ps->INTR_EN = UARTPS_BIT_UART_INTR_RTRIG;
+                KAL_SemPend(handle->RxSem, 0u, 0u, &kal_err);
+            } else {
+                while ((uart_ps->CHAN_STAT & UARTPS_BIT_UART_CSTAT_REMPTY) != 0u) {}
+            }
+        }
+        c = uart_ps->TX_RX_FIFO;
+    } else {
+        c = uart_ps->TX_RX_FIFO;
+    }
+
+    KAL_LockRelease(handle->RxMutex, &kal_err);
+
+    return (c);
+}
+
+
+/*
+*********************************************************************************************************
+*                                            UARTPS_IntHandler()
+*
+* Description : UART default interrupt handler.
+*
+* Argument(s) : p_int_arg    Handle of the UART.
+*               cpu_id       Always 0 for peripheral interrupts.
+*
+* Return(s)   : DEF_OK     Operation successful.
+*               DEF_FAIL   Operation failed.
+*
+* Note(s)     : none.
+*
+*********************************************************************************************************
+*/
+
+void UARTPS_IntHandler (void       *p_int_arg,
+                        CPU_INT32U  cpu_id)
+{
+    UARTPS_HANDLE handle;
+    UARTPS_PTR    uart_ps;
+    KAL_ERR       kal_err;
+
+
+    handle = (UARTPS_HANDLE)p_int_arg;
+    uart_ps = handle->UARTPS;
+
+    if (DEF_BIT_IS_SET(uart_ps->INTR_MASK, UARTPS_BIT_UART_INTR_RTRIG)) {
+        KAL_SemPost(handle->RxSem, 0u, &kal_err);
+        uart_ps->INTR_DIS = UARTPS_BIT_UART_INTR_RTRIG;
+        uart_ps->INTR_STAT = UARTPS_BIT_UART_INTR_RTRIG;
+    }
+
+    if (DEF_BIT_IS_SET(uart_ps->INTR_MASK, UARTPS_BIT_UART_INTR_TEMPTY)) {
+        KAL_SemPost(handle->TxSem, 0u, &kal_err);
+        uart_ps->INTR_DIS = UARTPS_BIT_UART_INTR_TEMPTY;
+        uart_ps->INTR_STAT = UARTPS_BIT_UART_INTR_TEMPTY;
+    }
+}
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.h b/src/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.h
new file mode 100644
index 0000000..9a30b6e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_uartps/src/ucos_uartps.h
@@ -0,0 +1,219 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                             CADENCE UART
+*
+* Filename      : ucos_uartps.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_UARTPS_PRESENT
+#define  UCOS_UARTPS_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+
+
+/*
+*********************************************************************************************************
+*                                        REGISTER DEFINITIONS
+*********************************************************************************************************
+*/
+
+typedef struct uartps {
+    CPU_REG32  CTRL;                                            /* UART Control Register                                */
+    CPU_REG32  MODE;                                            /* UART Mode Register                                   */
+    CPU_REG32  INTR_EN;                                         /* Interrupt Enable Register                            */
+    CPU_REG32  INTR_DIS;                                        /* Interrupt Disable Register                           */
+    CPU_REG32  INTR_MASK;                                       /* Interrupt Mask Register                              */
+    CPU_REG32  INTR_STAT;                                       /* Channel Interrupt Status Register                    */
+    CPU_REG32  BAUD;                                            /* Baud Rate Generator Register                         */
+    CPU_REG32  RX_TIMEOUT;                                      /* Receiver Timeout Register                            */
+    CPU_REG32  RX_FIFO_LVL;                                     /* Receiver FIFO Trigger Level Register                 */
+    CPU_REG32  MODEM_CTRL;                                      /* Modem Control Register                               */
+    CPU_REG32  MODEM_STAT;                                      /* Modem Status Register                                */
+    CPU_REG32  CHAN_STAT;                                       /* Channel Status Register                              */
+    CPU_REG32  TX_RX_FIFO;                                      /* Transmit an Receive FIFO                             */
+    CPU_REG32  BAUD_DIV;                                        /* Baud Rate Divider Register                           */
+    CPU_REG32  FLOW_DLY;                                        /* Flow Control Delay Register                          */
+    CPU_REG32  TX_FIFO_LVL;                                     /* Transmit FIFO Trigger Level Register                 */
+} UARTPS, *UARTPS_PTR;
+
+
+/* ------- UART CONTROL REGISTER BIT DEFINITION ------- */
+#define  UARTPS_BIT_UART_CTRL_STPBRK  (DEF_BIT_08)                /* Stop transmitter break.                              */
+#define  UARTPS_BIT_UART_CTRL_STTBRK  (DEF_BIT_07)                /* Start transmitter break.                             */
+#define  UARTPS_BIT_UART_CTRL_RSTTO   (DEF_BIT_06)                /* Restart receiver timeout counter.                    */
+#define  UARTPS_BIT_UART_CTRL_TXDIS   (DEF_BIT_05)                /* Transmit disable.                                    */
+#define  UARTPS_BIT_UART_CTRL_TXEN    (DEF_BIT_04)                /* Transmit enable.                                     */
+#define  UARTPS_BIT_UART_CTRL_RXDIS   (DEF_BIT_03)                /* Receive disable.                                     */
+#define  UARTPS_BIT_UART_CTRL_RXEN    (DEF_BIT_02)                /* Receive enable.                                      */
+#define  UARTPS_BIT_UART_CTRL_TXRES   (DEF_BIT_01)                /* TX software reset.                                   */
+#define  UARTPS_BIT_UART_CTRL_RXRES   (DEF_BIT_00)                /* RX software reset.                                   */
+
+
+/* -------- UART MODE REGISTER BIT DEFINITION --------- */
+#define  UARTPS_BIT_UART_MODE_CHMODE_MSK  (DEF_BIT_FIELD(8, 2))   /* Channel mode.                                        */
+#define  UARTPS_BIT_UART_MODE_CHMODE(mode) (DEF_BIT_MASK(mode, 2) & UARTPS_BIT_UART_MODE_CHMODE_MSK)
+#define  UARTPS_BIT_UART_MODE_NBSTOP_MSK  (DEF_BIT_FIELD(6, 2))   /* Number of stop bits.                                 */
+#define  UARTPS_BIT_UART_MODE_NBSTOP(nbr) (DEF_BIT_MASK(nbr, 2) & UARTPS_BIT_UART_MODE_NBSTOP_MSK)
+#define  UARTPS_BIT_UART_MODE_PAR_MSK     (DEF_BIT_FIELD(3, 3))   /* Parity type select.                                  */
+#define  UARTPS_BIT_UART_MODE_PAR(par)    (DEF_BIT_MASK(par, 3) & UARTPS_BIT_UART_MODE_PAR_MSK)
+#define  UARTPS_BIT_UART_MODE_CHRL_MSK    (DEF_BIT_FIELD(1, 2))   /* Character length.                                    */
+#define  UARTPS_BIT_UART_MODE_CHRL(len)   (DEF_BIT_MASK(len, 2) & UARTPS_BIT_UART_MODE_CHRL_MSK)
+#define  UARTPS_BIT_UART_MODE_CLKS        (DEF_BIT_00)            /* Clock source select.                                 */
+
+
+/* ------ CHANNEL STATUS REGISTER BIT DEFINITION ------ */
+#define  UARTPS_BIT_UART_CSTAT_TNFUL       (DEF_BIT_14)           /* Transmit FIFO nearly full.                           */
+#define  UARTPS_BIT_UART_CSTAT_TTRIG       (DEF_BIT_13)           /* Transmit FIFO continuous status.                     */
+#define  UARTPS_BIT_UART_CSTAT_FDELT       (DEF_BIT_12)           /* Receive FIFO delay trigger continuous status.        */
+#define  UARTPS_BIT_UART_CSTAT_TACTIVE     (DEF_BIT_11)           /* Transmit state machine active status.                */
+#define  UARTPS_BIT_UART_CSTAT_RACTIVE     (DEF_BIT_10)           /* Receiver state machine active status.                */
+#define  UARTPS_BIT_UART_CSTAT_TFUL        (DEF_BIT_04)           /* Transmit FIFO full continuous status.                */
+#define  UARTPS_BIT_UART_CSTAT_TEMPTY      (DEF_BIT_03)           /* Transmit FIFO empty continuous status.               */
+#define  UARTPS_BIT_UART_CSTAT_RFUL        (DEF_BIT_02)           /* Receive FIFO full continuous status.                 */
+#define  UARTPS_BIT_UART_CSTAT_REMPTY      (DEF_BIT_01)           /* Receive FIFO empty continuous status.                */
+#define  UARTPS_BIT_UART_CSTAT_RTRIG       (DEF_BIT_00)           /* Receive FIFO trigger continuous status.              */
+
+
+/* --------- INTERRUPT SOURCE BIT DEFINITION ---------- */
+#define  UARTPS_BIT_UART_INTR_TOVR         (DEF_BIT_12)           /* Transmitter FIFO overflow interrupt.                 */
+#define  UARTPS_BIT_UART_INTR_TNFUL        (DEF_BIT_11)           /* Transmitter FIFO nearly full interrupt.              */
+#define  UARTPS_BIT_UART_INTR_TTRIG        (DEF_BIT_10)           /* Transmitter FIFO trigger interrupt.                  */
+#define  UARTPS_BIT_UART_INTR_DMSI         (DEF_BIT_09)           /* Delta MODEM status indicator interrupt.              */
+#define  UARTPS_BIT_UART_INTR_TIMEOUT      (DEF_BIT_08)           /* Receiver timeout error interrupt.                    */
+#define  UARTPS_BIT_UART_INTR_PARE         (DEF_BIT_07)           /* Receiver parity error interrupt.                     */
+#define  UARTPS_BIT_UART_INTR_FRAME        (DEF_BIT_06)           /* Receiver framing error interrupt.                    */
+#define  UARTPS_BIT_UART_INTR_ROVR         (DEF_BIT_05)           /* Receiver overflow error interrupt.                   */
+#define  UARTPS_BIT_UART_INTR_TFUL         (DEF_BIT_04)           /* Transmitter FIFO full interrupt.                     */
+#define  UARTPS_BIT_UART_INTR_TEMPTY       (DEF_BIT_03)           /* Transmitter FIFO empty interrupt.                    */
+#define  UARTPS_BIT_UART_INTR_RFUL         (DEF_BIT_02)           /* Receiver FIFO full interrupt.                        */
+#define  UARTPS_BIT_UART_INTR_REMPTY       (DEF_BIT_01)           /* Receiver FIFO empty interrupt.                       */
+#define  UARTPS_BIT_UART_INTR_RTRIG        (DEF_BIT_00)           /* Receiver FIFO trigger interrupt.                     */
+
+
+/* --------- DATA FORMAT OPTIONS ---------- */
+#define  UARTPS_FORMAT_8_BITS  0u
+#define  UARTPS_FORMAT_7_BITS  2u
+#define  UARTPS_FORMAT_6_BITS  3u
+
+#define  UARTPS_FORMAT_NO_PARITY     4u
+#define  UARTPS_FORMAT_MARK_PARITY   3u
+#define  UARTPS_FORMAT_SPACE_PARITY  2u
+#define  UARTPS_FORMAT_ODD_PARITY    1u
+#define  UARTPS_FORMAT_EVEN_PARITY   0u
+
+#define  UARTPS_FORMAT_2_STOP_BIT    2u
+#define  UARTPS_FORMAT_1_5_STOP_BIT  1u
+#define  UARTPS_FORMAT_1_STOP_BIT    0u
+
+
+/* --------- OPERATING MODE OPTIONS --------- */
+#define UARTPS_OPER_MODE_NORMAL       0u
+#define UARTPS_OPER_MODE_AUTO_ECHO    1u
+#define UARTPS_OPER_MODE_LOCAL_LOOP   2u
+#define UARTPS_OPER_MODE_REMOTE_LOOP  3u
+
+
+/*
+*********************************************************************************************************
+*                                        STRUCTURE DEFINITIONS
+*********************************************************************************************************
+*/
+
+
+typedef struct {
+    CPU_INT32U  DeviceId;
+    CPU_INT32U  BaseAddress;
+    CPU_INT32U  ClkFreq;
+    CPU_BOOLEAN HasModem;
+    CPU_INT32U  IntSource;
+} UCOS_UARTPS_Config;
+
+typedef struct {
+    CPU_INT32U      DeviceId;
+    UARTPS_PTR      UARTPS;
+    CPU_INT32U      ClkFreq;
+    CPU_BOOLEAN     HasModem;
+    KAL_SEM_HANDLE  TxSem;
+    KAL_SEM_HANDLE  RxSem;
+    KAL_LOCK_HANDLE TxMutex;
+    KAL_LOCK_HANDLE RxMutex;
+    CPU_INT32U      IntSource;
+} UCOS_UARTPS;
+
+typedef UCOS_UARTPS *UARTPS_HANDLE;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+UARTPS_HANDLE UARTPS_Init (CPU_INT32U device_id);
+
+CPU_BOOLEAN UARTPS_Enable (UARTPS_HANDLE handle);
+
+CPU_BOOLEAN UARTPS_Disable (UARTPS_HANDLE handle);
+
+CPU_BOOLEAN UARTPS_DataFormatSet (UARTPS_HANDLE handle,
+                                  CPU_INT32U    baud_rate,
+                                  CPU_INT32U    data_bits,
+                                  CPU_INT32U    parity,
+                                  CPU_INT32U    stop_bits);
+
+CPU_BOOLEAN UARTPS_OperModeSet (UARTPS_HANDLE handle,
+                                CPU_INT32U    oper_mode);
+
+CPU_BOOLEAN UARTPS_BaudRateSet (UARTPS_HANDLE handle,
+                                CPU_INT32U    baud_rate);
+
+CPU_BOOLEAN UARTPS_RTOSet (UARTPS_HANDLE handle,
+                           CPU_INT08U    rto);
+
+CPU_BOOLEAN UARTPS_WrStr (UARTPS_HANDLE   handle,
+                          const CPU_CHAR *p_str);
+
+CPU_BOOLEAN  UARTPS_WrByte (UARTPS_HANDLE   handle,
+                            CPU_CHAR        byte);
+
+CPU_CHAR  UARTPS_RdByte (UARTPS_HANDLE handle);
+
+void UARTPS_IntHandler (void       *p_int_arg,
+                        CPU_INT32U  cpu_id);
+
+#endif /* UCOS_UARTPS_PRESENT */
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_usbps/doc/html/api/index.html b/src/ucos_v1_42/ucos/drivers/ucos_usbps/doc/html/api/index.html
new file mode 100644
index 0000000..65c1a94
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_usbps/doc/html/api/index.html
@@ -0,0 +1,51 @@
+
+
+
+	µC/OS-III - Documentation
+    
+    
+    
+        
+	
+
+
+
+
+

+
+	

+		
Micriµm

+		
µC/OS-III - Documentation

+	

+
+	
    
+        
You can find our product's user manual, API reference, release notes and more information at: https://doc.micrium.com

+		
+	

+

+
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_usbps/src/ucos_usbps.c b/src/ucos_v1_42/ucos/drivers/ucos_usbps/src/ucos_usbps.c
new file mode 100644
index 0000000..6461fd7
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_usbps/src/ucos_usbps.c
@@ -0,0 +1,57 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                           ZYNQ USB OTG
+*
+* Filename      : ucos_usbps.c
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+#include 
+#include 
+
+extern UCOS_USBPS_Config UCOS_USBPS_ConfigTable[];
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+**                                         GLOBAL FUNCTIONS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+
diff --git a/src/ucos_v1_42/ucos/drivers/ucos_usbps/src/ucos_usbps.h b/src/ucos_v1_42/ucos/drivers/ucos_usbps/src/ucos_usbps.h
new file mode 100644
index 0000000..3da386b
--- /dev/null
+++ b/src/ucos_v1_42/ucos/drivers/ucos_usbps/src/ucos_usbps.h
@@ -0,0 +1,68 @@
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*
+*                          (c) Copyright 2014-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               This BSP is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    MICRIUM BOARD SUPPORT PACKAGE
+*                                           ZYNQ USB OTG
+*
+* Filename      : ucos_usbps.h
+* Version       : V1.42
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+#ifndef  UCOS_USBPS_PRESENT
+#define  UCOS_USBPS_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include 
+#include 
+
+
+/*
+*********************************************************************************************************
+*                                        STRUCTURE DEFINITIONS
+*********************************************************************************************************
+*/
+
+
+typedef struct {
+    CPU_INT32U  DeviceId;
+    CPU_INT32U  BaseAddress;
+    CPU_INT32U  IntSource;
+} UCOS_USBPS_Config;
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#endif /* UCOS_EMACPS_PRESENT */
diff --git a/src/ucos_v1_42/ucos/license-openamp.txt b/src/ucos_v1_42/ucos/license-openamp.txt
new file mode 100644
index 0000000..fd12b73
--- /dev/null
+++ b/src/ucos_v1_42/ucos/license-openamp.txt
@@ -0,0 +1,27 @@
+Copyright (c) 2014, Mentor Graphics Corporation
+Copyright (c) 2015, Micrium Inc.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice,
+   this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the above copyright notice,
+   this list of conditions and the following disclaimer in the documentation
+   and/or other materials provided with the distribution.
+3. Neither the name of Mentor Graphics Corporation nor the names of its
+   contributors may be used to endorse or promote products derived from this
+   software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
diff --git a/src/ucos_v1_42/ucos/license-ucos-ii.txt b/src/ucos_v1_42/ucos/license-ucos-ii.txt
new file mode 100644
index 0000000..a46bc6c
--- /dev/null
+++ b/src/ucos_v1_42/ucos/license-ucos-ii.txt
@@ -0,0 +1,7 @@
+LICENSING TERMS:
+---------------
+  uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research.
+If you plan on using  uC/OS-II  in a commercial product you need to contact Micrium to properly license
+its use in your product. We provide ALL the source code for your convenience and to help you experience
+uC/OS-II.   The fact that the  source is provided does  NOT  mean that you can use it without  paying a
+licensing fee.
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/license-ucos-iii.txt b/src/ucos_v1_42/ucos/license-ucos-iii.txt
new file mode 100644
index 0000000..1124db0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/license-ucos-iii.txt
@@ -0,0 +1,16 @@
+LICENSING TERMS:
+---------------
+          uC/OS-III is provided in source form for FREE short-term evaluation, for educational use or 
+          for peaceful research.  If you plan or intend to use uC/OS-III in a commercial application/
+          product then, you need to contact Micrium to properly license uC/OS-III for its use in your 
+          application/product.   We provide ALL the source code for your convenience and to help you 
+          experience uC/OS-III.  The fact that the source is provided does NOT mean that you can use 
+          it commercially without paying a licensing fee.
+          Knowledge of the source code may NOT be used to develop a similar product.
+
+          Please help us continue to provide the embedded community with the finest software available.
+          Your honesty is greatly appreciated.
+
+          You can find our product's user manual, API reference, release notes and
+          more information at https://doc.micrium.com.
+          You can contact us at www.micrium.com.
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/readme.txt b/src/ucos_v1_42/ucos/readme.txt
new file mode 100644
index 0000000..dfccfed
--- /dev/null
+++ b/src/ucos_v1_42/ucos/readme.txt
@@ -0,0 +1,3 @@
+Micrium uC/OS Repository for the Xilinx SDK v1.42
+
+Installation and usage instructions can be found at https://doc.micrium.com/display/UCOSXSDK/uCOS+Xilinx+SDK+Repository+Documentation+Home
\ No newline at end of file
diff --git a/src/ucos_v1_42/ucos/sw_apps/can/src/app.c b/src/ucos_v1_42/ucos/sw_apps/can/src/app.c
new file mode 100644
index 0000000..2ea0bca
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/can/src/app.c
@@ -0,0 +1,123 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrate a basic uC/CAN project.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osii
+*           ucos_standalone
+*           ucos_can
+*
+*   2. Kernel tick source - (Not required on the Zynq-7000 PS)
+*       If a suitable timer is available in your FPGA design it can be used as the kernel tick source.
+*       To do so, in the "ucos" section select a timer for the "kernel_tick_src" configuration option.
+*
+*   3. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer and UART.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+#include  "can_demo.h"
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+
+    UCOS_Print ("Hello world from the main task\r\n");
+
+    App_CAN_Startup();
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+    }
+
+}
+
diff --git a/src/ucos_v1_42/ucos/sw_apps/can/src/can_demo.c b/src/ucos_v1_42/ucos/sw_apps/can/src/can_demo.c
new file mode 100644
index 0000000..84c28f3
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/can/src/can_demo.c
@@ -0,0 +1,586 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is
+*               illegal to distribute this source code to any third party unless you receive
+*               written permission by an authorized Micrium representative.  Knowledge of
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_demo.c
+* Version       : V2.41.00
+* Programmer(s) : DC
+****************************************************************************************************
+*/
+
+
+/*
+****************************************************************************************************
+*                                             INCLUDES
+****************************************************************************************************
+*/
+
+#include 
+#include 
+#include "can_demo.h"
+#include 
+
+#include "can_bus.h"
+#include "can_frm.h"
+#include "can_msg.h"
+#include "can_sig.h"
+#include "can_err.h"
+#include "drv_can.h"
+
+
+/*
+****************************************************************************************************
+*                                              DEFINES
+****************************************************************************************************
+*/
+
+
+#define  APP_CAN_DEMO_ECHO_TASK                         0u      /* Definition for APP_CAN_DEMO_SELECT, choose.. */
+#define  APP_CAN_DEMO_RX_TX_TASK                        1u      /* .. between Echo Task or Tx/Rx Tasks          */
+
+                                                                /* Select CAN Demo to run in Application        */
+#define  APP_CAN_DEMO_SELECT      APP_CAN_DEMO_RX_TX_TASK
+
+
+
+#if (APP_CAN_DEMO_SELECT == APP_CAN_DEMO_ECHO_TASK)             /* Demo 'Echo' Task to Rx & Tx same Msg back   */
+#define  APP_CAN0_ECHO_TASK_PRIO                        4u
+#define  APP_CAN1_ECHO_TASK_PRIO                        5u
+
+#define  APP_CAN0_ECHO_TASK_STK_SIZE                  256u
+#define  APP_CAN1_ECHO_TASK_STK_SIZE                  256u
+#endif
+
+
+#if (APP_CAN_DEMO_SELECT == APP_CAN_DEMO_RX_TX_TASK)            /* Main Rx_Task for Incomming CAN BUS Msg(s)   */
+#define  APP_CAN0_RX_TASK_PRIO                         10u
+#define  APP_CAN0_TX_TASK_PRIO                         11u
+
+#define  APP_CAN1_RX_TASK_PRIO                         12u
+#define  APP_CAN1_TX_TASK_PRIO                         13u
+
+#define  APP_CAN0_RX_TASK_STK_SIZE                    512u
+#define  APP_CAN0_TX_TASK_STK_SIZE                    512u
+
+#define  APP_CAN1_RX_TASK_STK_SIZE                    512u
+#define  APP_CAN1_TX_TASK_STK_SIZE                    512u
+#endif
+
+
+/*
+****************************************************************************************************
+*                                          EXTERNAL DATA
+****************************************************************************************************
+*/
+
+#if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+extern  const  CANBUS_PARA  CanCfg0;
+#endif
+
+#if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+extern  const  CANBUS_PARA  CanCfg1;
+#endif
+
+//extern  const  CANSIG_PARA  CanSig[];
+//extern  const  CANMSG_PARA  CanMsg[];
+
+
+/*
+****************************************************************************************************
+*                                           LOCAL DATA
+****************************************************************************************************
+*/
+
+#if (APP_CAN_DEMO_SELECT == APP_CAN_DEMO_ECHO_TASK)             /* -------------------- ECHO TASK --------------------- */
+    #if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+        static  OS_STK  App_CAN0_EchoTask_Stk[APP_CAN0_ECHO_TASK_STK_SIZE];
+    #endif
+
+    #if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+        static  OS_STK  App_CAN1_EchoTask_Stk[APP_CAN1_ECHO_TASK_STK_SIZE];
+    #endif
+#endif
+
+#if (APP_CAN_DEMO_SELECT == APP_CAN_DEMO_RX_TX_TASK)            /* -------------------- RX/TX TASK -------------------- */
+    #if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+        static  OS_STK  App_CAN0_RxTaskStk[APP_CAN0_RX_TASK_STK_SIZE];
+        static  OS_STK  App_CAN0_TxTaskStk[APP_CAN0_TX_TASK_STK_SIZE];
+
+        CPU_INT32U  App_CAN0_RxTx_Ctr = 0u;                     /* Global Rx Counter. Tx will Transmit the Count.       */
+    #endif
+
+    #if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+        static  OS_STK  App_CAN1_RxTaskStk[APP_CAN1_RX_TASK_STK_SIZE];
+        static  OS_STK  App_CAN1_TxTaskStk[APP_CAN1_TX_TASK_STK_SIZE];
+
+        CPU_INT32U  App_CAN1_RxTx_Ctr = 0u;                     /* Global Rx Counter. Tx will Transmit the Count.       */
+    #endif
+#endif
+
+/*
+****************************************************************************************************
+*                                       FUNCTION PROTOTYPES
+****************************************************************************************************
+*/
+
+static  void     App_CAN_TaskCreate     (void);
+
+#if (APP_CAN_DEMO_SELECT == APP_CAN_DEMO_RX_TX_TASK)            /* -------------------- RX/TX TASK -------------------- */
+    #if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+        static  void  App_CAN0_RxTask   (void *p_arg);
+        static  void  App_CAN0_TxTask   (void *p_arg);
+    #endif
+
+    #if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+        static  void  App_CAN1_RxTask   (void *p_arg);
+        static  void  App_CAN1_TxTask   (void *p_arg);
+    #endif
+#endif
+
+
+#if (APP_CAN_DEMO_SELECT == APP_CAN_DEMO_ECHO_TASK)             /* -------------------- ECHO TASK --------------------- */
+    #if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+        static  void  App_CAN0_EchoTask (void *p_arg);
+    #endif
+
+    #if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+        static  void  App_CAN1_EchoTask (void *p_arg);
+    #endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                       CAN DEMO STARTUP FUNCTION
+*
+* Description: This Function must be Called by the Application to Start uC/CAN.
+*
+* Arguments  : none.
+*********************************************************************************************************
+*/
+
+void App_CAN_Startup (void)
+{
+    CPU_INT16S  can_err;
+
+
+    ZC7xxx_CAN_BSP_IntVectSet();                                /* Assign ISR handlers for CAN Channels                 */
+
+    CanSigInit(0L);                                             /* Initialize uC/CAN Signals                            */
+    CanMsgInit(0L);                                             /* Initialize uC/CAN Messages                           */
+    CanBusInit(0L);                                             /* Initialize uC/CAN Bus                                */
+
+#if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)                       /* --------------------- CAN 0 ------------------------ */
+    can_err = CanBusEnable((CANBUS_PARA *)&CanCfg0);            /* Enable CAN0 Device acc. Configuration                */
+    if (can_err != CAN_ERR_NONE) {
+        UCOS_Print("Error in CAN0 Bus Enable...\n\r");
+    }
+#endif
+
+#if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)                       /* --------------------- CAN 1 ------------------------ */
+    can_err = CanBusEnable((CANBUS_PARA *)&CanCfg1);            /* Enable CAN1 Device acc. Configuration                */
+    if (can_err != CAN_ERR_NONE) {
+    	UCOS_Print("Error in CAN1 Bus Enable...\n\r");
+    }
+#endif
+
+    App_CAN_TaskCreate();                                       /* Creates Necessary CAN Application Tasks              */
+}
+
+
+/*
+*********************************************************************************************************
+*                                        App_CAN_TaskCreate()
+*
+* Description :  Create the CAN Application tasks.
+*
+* Argument(s) :  none.
+*
+* Return(s)   :  none.
+*
+* Caller(s)   :  Com_Start()
+*
+* Note(s)     :  none.
+*********************************************************************************************************
+*/
+
+static  void  App_CAN_TaskCreate (void)
+{
+#if (APP_CAN_DEMO_SELECT == APP_CAN_DEMO_RX_TX_TASK)            /* Main Rx_Task for Incomming CAN BUS Msg(s)            */
+    #if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)                   /* ---------------- CAN CHANNEL 0 TASKS --------------- */
+        OSTaskCreateExt( App_CAN0_RxTask,                       /*  - RX Task.                                          */
+                         0u,
+                        &App_CAN0_RxTaskStk[APP_CAN0_RX_TASK_STK_SIZE - 1u],
+                         APP_CAN0_RX_TASK_PRIO,
+                         APP_CAN0_RX_TASK_PRIO,
+                        &App_CAN0_RxTaskStk[0u],
+                         APP_CAN0_RX_TASK_STK_SIZE,
+                         0u,
+                        (OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR));
+
+        OSTaskCreateExt( App_CAN0_TxTask,                       /*  - TX Task.                                          */
+                         0u,
+                        &App_CAN0_TxTaskStk[APP_CAN0_TX_TASK_STK_SIZE - 1u],
+                         APP_CAN0_TX_TASK_PRIO,
+                         APP_CAN0_TX_TASK_PRIO,
+                        &App_CAN0_TxTaskStk[0u],
+                         APP_CAN0_TX_TASK_STK_SIZE,
+                         0u,
+                        (OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR));
+    #endif
+
+    #if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)                   /* ---------------- CAN CHANNEL 1 TASKS --------------- */
+        OSTaskCreateExt( App_CAN1_RxTask,                       /*  - RX Task.                                          */
+                         0u,
+                        &App_CAN1_RxTaskStk[APP_CAN1_RX_TASK_STK_SIZE - 1u],
+                         APP_CAN1_RX_TASK_PRIO,
+                         APP_CAN1_RX_TASK_PRIO,
+                        &App_CAN1_RxTaskStk[0u],
+                         APP_CAN1_RX_TASK_STK_SIZE,
+                         0u,
+                        (OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR));
+
+        OSTaskCreateExt( App_CAN1_TxTask,                       /*  - TX Task.                                          */
+                         0u,
+                        &App_CAN1_TxTaskStk[APP_CAN1_TX_TASK_STK_SIZE - 1u],
+                         APP_CAN1_TX_TASK_PRIO,
+                         APP_CAN1_TX_TASK_PRIO,
+                        &App_CAN1_TxTaskStk[0u],
+                         APP_CAN1_TX_TASK_STK_SIZE,
+                         0u,
+                        (OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR));
+    #endif
+#endif
+
+
+
+#if (APP_CAN_DEMO_SELECT == APP_CAN_DEMO_ECHO_TASK)             /* Demo 'Echo' Task to Rx & Tx same Msg back            */
+    #if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)                   /* ------------ CAN CHANNEL 0 ECHO TASK --------------- */
+        OSTaskCreateExt( App_CAN0_EchoTask,
+                         0u,
+                        &App_CAN0_EchoTask_Stk[APP_CAN0_ECHO_TASK_STK_SIZE - 1u],
+                         APP_CAN0_ECHO_TASK_PRIO,
+                         APP_CAN0_ECHO_TASK_PRIO,
+                        &App_CAN0_EchoTask_Stk[0u],
+                         APP_CAN0_ECHO_TASK_STK_SIZE,
+                         0u,
+                        (OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR));
+    #endif
+
+    #if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)                   /* ------------ CAN CHANNEL 1 ECHO TASK --------------- */
+        OSTaskCreateExt( App_CAN1_EchoTask,
+                         0u,
+                        &App_CAN1_EchoTask_Stk[APP_CAN1_ECHO_TASK_STK_SIZE - 1u],
+                         APP_CAN1_ECHO_TASK_PRIO,
+                         APP_CAN1_ECHO_TASK_PRIO,
+                        &App_CAN1_EchoTask_Stk[0u],
+                         APP_CAN1_ECHO_TASK_STK_SIZE,
+                         0u,
+                        (OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR));
+    #endif
+#endif
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           CAN_RX_TX_TASK DEMO
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (APP_CAN_DEMO_SELECT == APP_CAN_DEMO_RX_TX_TASK)
+
+#if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+/*
+*********************************************************************************************************
+*                                             App_CAN0_RxTask
+*
+* Description : This Task waits until a new Frame is available from the CAN0 Bus. It Reads the frame
+*               and updates the global counter of Received Messages.
+*
+* Arguments   : p_arg    Argument Pointer passed by OSTaskCreate().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_CAN0_RxTask(void *p_arg)
+{
+    CANFRM  can_frm;
+
+
+    (void)p_arg;                                                /* Avoid Compiler Warning.                              */
+
+    CanBusIoCtl(ZC7xxx_CAN_BUS_0, CANBUS_SET_RX_TIMEOUT, 0u);   /* Set Timeout to wait forever for new CAN Msg.         */
+
+    while (DEF_ON) {
+        CanBusRead(         ZC7xxx_CAN_BUS_0,                   /* Pend till New CAN msg is found on CAN BUS            */
+                   (void *)&can_frm,
+                            sizeof(CANFRM));
+
+        App_CAN0_RxTx_Ctr++;                                    /* Increment Global Counter.                            */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                             App_CAN0_TxTask
+*
+* Description : This Task will read the Generic CAN0 Global Rx/Tx Counter, Parse the counter to  transmit
+*               the count of the Global Counter as part of the CAN Message Data with a specified ID.
+*
+* Arguments   : p_arg    Argument Pointer passed by OSTaskCreate().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : (1) To Transmit the value of the Global Counter, the Tx Task will start the parsing and
+*                   will place the Rx ctr value in reverse order to be easier to view through the CAN
+*                   sniffer. Since the largest value for a 32-bit integer is 0xFFFFFFFF it only requires
+*                   a FRM.DLC of 4 since each Data frame is of size 0xFF.
+*                       Example:
+*                           App_CAN_Rx_Ctr : 0x 11 22 33 44 (in Hex)
+*                           FRM.Data[0u] = 44u;
+*                           FRM.Data[1u] = 33u;
+*                           FRM.Data[2u] = 22u;
+*                           FRM.Data[3u] = 11u;
+*
+*                       so that the Frame.Data appears on the CAN Sniffer as such:
+*                           Data[] = 0x 11 22 33 44
+*********************************************************************************************************
+*/
+
+static  void  App_CAN0_TxTask(void *p_arg)
+{
+    CANFRM      can_frm;
+    CPU_INT32U  rx_ctr;
+    CPU_INT08U  dlc_ctr;
+
+
+    (void)p_arg;                                                /* Avoid Compiler Warning                               */
+
+    while (DEF_ON) {
+        can_frm.Identifier = 0x500u;                            /* Specify Identifier to show CANx Bus.                 */
+        can_frm.DLC        = 4u;                                /* Always Tx 4 Bytes. See Note (1).                     */
+
+        rx_ctr = App_CAN0_RxTx_Ctr;                             /* Obtain Rx Counter Value.                             */
+
+                                                                /* ----------------- PARSE Rx CTR VAL ----------------- */
+        for (dlc_ctr = 1u; dlc_ctr <= can_frm.DLC; dlc_ctr++) {
+            can_frm.Data[(can_frm.DLC - dlc_ctr)] = ((rx_ctr >> (8u * (dlc_ctr - 1u))) & 0xFFu);
+        }
+
+        CanBusWrite(ZC7xxx_CAN_BUS_0, (void *)&can_frm, sizeof(CANFRM));
+
+        OSTimeDlyHMSM(0u, 0u, 1u, 0u);
+    }
+}
+#endif                                                          /* END CAN_MODULE_CHANNEL_0                             */
+
+
+#if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+/*
+*********************************************************************************************************
+*                                             App_CAN1_RxTask
+*
+* Description : This Task waits until a new Frame is available from the CAN0 Bus. It Reads the frame
+*               and updates the global counter of Received Messages.
+*
+* Arguments   : p_arg    Argument Pointer passed by OSTaskCreate().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+static  void  App_CAN1_RxTask(void *p_arg)
+{
+    CANFRM  can_frm;
+
+
+    (void)p_arg;                                                /* Avoid Compiler Warning.                              */
+
+    CanBusIoCtl(ZC7xxx_CAN_BUS_1, CANBUS_SET_RX_TIMEOUT, 0u);   /* Set Timeout to wait forever for new CAN Msg.         */
+
+    while (DEF_ON) {
+        CanBusRead(         ZC7xxx_CAN_BUS_1,                   /* Pend till New CAN msg is found on CAN BUS            */
+                   (void *)&can_frm,
+                            sizeof(CANFRM));
+
+        App_CAN0_RxTx_Ctr++;                                    /* Increment Global Counter.                            */
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                             App_CAN1_TxTask
+*
+* Description : This Task will read the Generic CAN1 Global Rx/Tx Counter, Parse the counter to  transmit
+*               the count of the Global Counter as part of the CAN Message Data with a specified ID.
+*
+* Arguments   : p_arg    Argument Pointer passed by OSTaskCreate().
+*
+* Return(s)   : none.
+*
+* Caller(s)   : none.
+*
+* Note(s)     : (1) To Transmit the value of the Global Counter, the Tx Task will start the parsing and
+*                   will place the Rx ctr value in reverse order to be easier to view through the CAN
+*                   sniffer. Since the largest value for a 32-bit integer is 0xFFFFFFFF it only requires
+*                   a FRM.DLC of 4 since each Data frame is of size 0xFF.
+*                       Example:
+*                           App_CAN_Rx_Ctr : 0x 11 22 33 44 (in Hex)
+*                           FRM.Data[0u] = 44u;
+*                           FRM.Data[1u] = 33u;
+*                           FRM.Data[2u] = 22u;
+*                           FRM.Data[3u] = 11u;
+*
+*                       so that the Frame.Data appears on the CAN Sniffer as such:
+*                           Data[] = 0x 11 22 33 44
+*********************************************************************************************************
+*/
+
+static  void  App_CAN1_TxTask(void *p_arg)
+{
+    CANFRM      can_frm;
+    CPU_INT32U  rx_ctr;
+    CPU_INT08U  dlc_ctr;
+
+
+    (void)p_arg;                                                /* Avoid Compiler Warning                               */
+
+    while (DEF_ON) {
+        can_frm.Identifier = 0x501u;                            /* Specify Identifier to show CANx Bus.                 */
+        can_frm.DLC        = 4u;                                /* Always Tx 4 Bytes. See Note (1).                     */
+
+        rx_ctr = App_CAN1_RxTx_Ctr;                             /* Obtain Rx Counter Value.                             */
+
+                                                                /* ----------------- PARSE Rx CTR VAL ----------------- */
+        for (dlc_ctr = 1u; dlc_ctr <= can_frm.DLC; dlc_ctr++) {
+            can_frm.Data[(can_frm.DLC - dlc_ctr)] = ((rx_ctr >> (8u * (dlc_ctr - 1u))) & 0xFFu);
+        }
+
+        CanBusWrite(ZC7xxx_CAN_BUS_1, (void *)&can_frm, sizeof(CANFRM));
+
+        OSTimeDlyHMSM(0u, 0u, 1u, 0u);
+    }
+}
+#endif                                                          /* END CAN_MODULE_CHANNEL_1                             */
+
+
+/*
+*********************************************************************************************************
+*                                   APP_CAN_DEMO_RX_TX_TASK END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* END APP_CAN_DEMO_RX_TX_TASK                          */
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            CAN_ECHO_TASK DEMO
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+#if (APP_CAN_DEMO_SELECT == APP_CAN_DEMO_ECHO_TASK)
+
+/*
+*********************************************************************************************************
+*                                            ECHO TASK
+*
+* Description: This function echos a received frame back to the sender. The frame Identifier is
+*              changed before echoing. Using CAN Channel 0
+*
+* Arguments  : p_arg (unused).
+*********************************************************************************************************
+*/
+
+#if (CAN_MODULE_CHANNEL_0 == DEF_ENABLED)
+static  void  App_CAN0_EchoTask (void *p_arg)
+{
+    CANFRM frm;
+
+
+    (void)p_arg;                                                /* Avoid Compiler Warning                               */
+
+    CanBusIoCtl(ZC7xxx_CAN_BUS_0, CANBUS_SET_RX_TIMEOUT, 0u);
+                                                                /* Endless task loop                                    */
+    while (DEF_ON) {
+        CanBusRead(ZC7xxx_CAN_BUS_0, (void *)&frm, sizeof(CANFRM));
+        frm.Identifier = 0x100L;                                /* Specify Identifier to show CAN0 for Echo             */
+        CanBusWrite(ZC7xxx_CAN_BUS_0, (void *)&frm, sizeof(CANFRM));
+   }
+}
+#endif                                                          /* END CAN_MODULE_CHANNEL_0                             */
+
+
+/*
+*********************************************************************************************************
+*                                            ECHO TASK
+*
+* Description: This function echos a received frame back to the sender. The frame Identifier is
+*              changed before echoing. Using CAN Channel 0
+*
+* Arguments  : p_arg (unused).
+*********************************************************************************************************
+*/
+
+#if (CAN_MODULE_CHANNEL_1 == DEF_ENABLED)
+static  void  App_CAN1_EchoTask (void *p_arg)
+{
+    CANFRM frm;
+
+
+    (void)p_arg;                                                /* Avoid Compiler Warning                               */
+
+    CanBusIoCtl(ZC7xxx_CAN_BUS_1, CANBUS_SET_RX_TIMEOUT, 0u);
+                                                                /* Endless task loop                                    */
+    while (DEF_ON) {
+        CanBusRead(ZC7xxx_CAN_BUS_1, (void *)&frm, sizeof(CANFRM));
+        frm.Identifier = 0x200L;                                /* Specify Identifier to show CAN1 for Echo             */
+        CanBusWrite(ZC7xxx_CAN_BUS_1, (void *)&frm, sizeof(CANFRM));
+   }
+}
+#endif                                                          /* END CAN_MODULE_CHANNEL_1                             */
+
+
+/*
+*********************************************************************************************************
+*                                    APP_CAN_DEMO_ECHO_TASK END
+*********************************************************************************************************
+*/
+
+#endif                                                          /* END APP_CAN_DEMO_ECHO_TASK */
diff --git a/src/ucos_v1_42/ucos/sw_apps/can/src/can_demo.h b/src/ucos_v1_42/ucos/sw_apps/can/src/can_demo.h
new file mode 100644
index 0000000..b230ed9
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/can/src/can_demo.h
@@ -0,0 +1,53 @@
+/*
+****************************************************************************************************
+*                                               uC/CAN
+*                                       The Embedded CAN suite
+*
+*                          (c) Copyright 2003-2014; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               uC/CAN is provided in source form to registered licensees ONLY.  It is 
+*               illegal to distribute this source code to any third party unless you receive 
+*               written permission by an authorized Micrium representative.  Knowledge of 
+*               the source code may NOT be used to develop a similar product.
+*
+*               Please help us continue to provide the Embedded community with the finest 
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+****************************************************************************************************
+*/
+
+/*
+****************************************************************************************************
+* Filename      : can_demo.h
+* Version       : V2.41.00
+* Programmer(s) : E0
+*                 DC
+****************************************************************************************************
+*/
+
+#ifndef _CAN_DEMO_H_
+#define _CAN_DEMO_H_
+
+/*
+****************************************************************************************************
+*                                            INLCUDES
+****************************************************************************************************
+*/
+
+#include "can_sig.h"
+#include "cpu.h"
+
+
+/*
+****************************************************************************************************
+*                                       FUNCTION PROTOTYPES
+****************************************************************************************************
+*/
+
+void  App_CAN_Startup (void);
+
+
+#endif  
diff --git a/src/ucos_v1_42/ucos/sw_apps/fs/src/app.c b/src/ucos_v1_42/ucos/sw_apps/fs/src/app.c
new file mode 100644
index 0000000..497adf8
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/fs/src/app.c
@@ -0,0 +1,219 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrate a basic uC/FS project with simple file operations.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osiii
+*           ucos_fs
+*           ucos_standalone
+*
+*   2. Kernel tick source - (Not required on the Zynq-7000 PS)
+*       If a suitable timer is available in your FPGA design it can be used as the kernel tick source.
+*       To do so, in the "ucos" section select a timer for the "kernel_tick_src" configuration option.
+*
+*   3. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   4. File system volume configuration
+*       Two different storage media can be used for this example either a temporary ram based disk or
+*       an sd card. The sd card example is only supported on the Zynq-7000 and Zynq UltraScale+ MPSoC at this moment.
+*
+*       a. To configure a ram disk from the ucos BSP configuration dialog expand the RAMDISK category. Then set the
+*          UCOS_RAMDISK configuration to true.
+*
+*       b. To configure and SD Card from the ucos BSP configuration dialog expand the SD Card cateory. From there,
+*       select the desired SD Card interface available in your hardware design.
+*
+*   5. (Optional) Additional information can be printed on the STDOUT terminal by uC/FS. Trace output can be enabled from
+*      the ucos_fs configuration with the FS_TRACE_LEVEL configuration.
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer, UART or SD Card.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       The default configuration for the ucos BSP only allocated one device and volume to reduce ram
+*       usage. If both the ram disk and sd card are needed at the same time the ucos_fs runtime configuration
+*       must be adjusted accordingly.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+#include  
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+    OS_ERR       os_err;
+    CPU_CHAR     *vol_name;
+    FS_VOL_INFO   vol_info;
+    FS_ENTRY_INFO entry_info;
+    FS_ERR        fs_err;
+    FS_FILE      *test_file;
+    CPU_CHAR      file_name[32] = {0};
+    CPU_CHAR     *test_string;
+    CPU_CHAR      rd_buf[64] = {0};
+    CPU_SIZE_T    rd_cnt;
+
+    UCOS_Print ("Application start\r\n");
+
+#if (UCOS_SDCARD_EN == DEF_ENABLED)
+    vol_name = "sdcard:0:";
+#elif (UCOS_RAMDISK_EN == DEF_ENABLED)
+    vol_name = "ram:0:";
+#else
+    UCOS_Print("No RAMDisk or SD Card configured\r\n");
+#endif
+
+    UCOS_Printf("Querying volume %s...\r\n", vol_name);
+
+    FSVol_Query(vol_name, &vol_info, &fs_err);
+    if (fs_err != FS_ERR_NONE) {
+        UCOS_Printf("Error querying volume. FSVol_Query returned with error code %d\r\n", fs_err);
+    }
+
+    UCOS_Printf("Total volume size in sectors : %d\r\n", vol_info.VolTotSecCnt);
+    UCOS_Printf("Used size in sectors : %d\r\n", vol_info.VolUsedSecCnt);
+
+    UCOS_Print("Creating file micrium_test.txt\r\n");
+    Str_Cat(file_name, vol_name);
+    Str_Cat(file_name, "\\micrium_test.txt");
+    test_file = FSFile_Open(file_name, FS_FILE_ACCESS_MODE_TRUNCATE | FS_FILE_ACCESS_MODE_CREATE | FS_FILE_ACCESS_MODE_WR, &fs_err);
+    if (fs_err != FS_ERR_NONE) {
+        UCOS_Printf("Error opening file. FSFile_Open returned with error code %d\r\n", fs_err);
+        }
+
+    UCOS_Print("Writing hello world to test file\r\n");
+    test_string = "hello world";
+    FSFile_Wr(test_file, test_string, Str_Len(test_string), &fs_err);
+    if (fs_err != FS_ERR_NONE) {
+        UCOS_Printf("Error writing to file. FSFile_Wr returned with error code %d\r\n", fs_err);
+    }
+
+    UCOS_Print("Closing test file\r\n");
+    FSFile_Close(test_file, &fs_err);
+    if (fs_err != FS_ERR_NONE) {
+        UCOS_Printf("Error closing file. FSFile_Close returned with error code %d\r\n", fs_err);
+}
+
+    UCOS_Print("Re-opening file in read-only mode to check result\r\n");
+    test_file = FSFile_Open(file_name, FS_FILE_ACCESS_MODE_RD, &fs_err);
+    if (fs_err != FS_ERR_NONE) {
+        UCOS_Printf("Error opening file. FSFile_Open returned with error code %d\r\n", fs_err);
+}
+
+    UCOS_Print("Querying file info\r\n");
+    FSFile_Query(test_file, &entry_info, &fs_err);
+    if (fs_err != FS_ERR_NONE) {
+        UCOS_Printf("Error querying file. FSFile_Query returned with error code %d\r\n", fs_err);
+}
+
+    UCOS_Printf("Size of file micrium_test.txt: %d bytes\r\n", entry_info.Size);
+
+    UCOS_Print("Reading from file.\r\n");
+    rd_cnt = FSFile_Rd(test_file, rd_buf, 64, &fs_err);
+    if (fs_err != FS_ERR_NONE) {
+        UCOS_Printf("Error reading from file. FSFile_Rd returned with error code %d\r\n", fs_err);
+}
+
+    UCOS_Printf("Read %d bytes from file. Read data : %s\r\n", rd_cnt, rd_buf);
+
+    UCOS_Print("Closing file.\r\n");
+    FSFile_Close(test_file, &fs_err);
+    if (fs_err != FS_ERR_NONE) {
+        UCOS_Printf("Error closing file. FSFile_Close returned with error code %d\r\n", fs_err);
+}
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+}
+
+}
+
diff --git a/src/ucos_v1_42/ucos/sw_apps/helloworld_osii/src/app.c b/src/ucos_v1_42/ucos/sw_apps/helloworld_osii/src/app.c
new file mode 100644
index 0000000..c34637a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/helloworld_osii/src/app.c
@@ -0,0 +1,118 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrate a basic uC/OS-II project with simple "hello world" output.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osii
+*           ucos_standalone
+*
+*   2. Kernel tick source - (Not required on the Zynq-7000 PS)
+*       If a suitable timer is available in your FPGA design it can be used as the kernel tick source.
+*       To do so, in the "ucos" section select a timer for the "kernel_tick_src" configuration option.
+*
+*   3. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer and UART.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+
+    UCOS_Print ("Hello world from the main task\r\n");
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+    }
+
+}
+
diff --git a/src/ucos_v1_42/ucos/sw_apps/helloworld_osiii/src/app.c b/src/ucos_v1_42/ucos/sw_apps/helloworld_osiii/src/app.c
new file mode 100644
index 0000000..f04318a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/helloworld_osiii/src/app.c
@@ -0,0 +1,119 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrate a basic uC/OS-III project with simple "hello world" output.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osiii
+*           ucos_standalone
+*
+*   2. Kernel tick source - (Not required on the Zynq-7000 PS)
+*       If a suitable timer is available in your FPGA design it can be used as the kernel tick source.
+*       To do so, in the "ucos" section select a timer for the "kernel_tick_src" configuration option.
+*
+*   3. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer and UART.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+    OS_ERR       os_err;
+
+    UCOS_Print ("Hello world from the main task\r\n");
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+    }
+
+}
+
diff --git a/src/ucos_v1_42/ucos/sw_apps/net_dns-c/src/app.c b/src/ucos_v1_42/ucos/sw_apps/net_dns-c/src/app.c
new file mode 100644
index 0000000..cd6336a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/net_dns-c/src/app.c
@@ -0,0 +1,159 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrate a basic uC/DNSc project.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osiii
+*           ucos_standalone
+*           ucos_tcpip
+*           ucos_dhcp
+*           ucos_dns-c
+*
+*   2. Kernel tick source - (Not required on the Zynq-7000 PS)
+*       If a suitable timer is available in your FPGA design it can be used as the kernel tick source.
+*       To do so, in the "ucos" section select a timer for the "kernel_tick_src" configuration option.
+*
+*   3. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   4. Network interface configuration
+*       In the BSP network interface section selects the desired network intergace and ip configuration.
+*       Leave dhcp enabled if you'd like the embbeded dhcp client to configure the interface.
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer and UART.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+    OS_ERR         os_err;
+    DNSc_ADDR_OBJ  addrs[2u];
+    CPU_INT08U     addr_nbr = 2u;
+    DNSc_ERR       dns_err;
+    NET_ERR        net_err;
+    CPU_CHAR       p_addr_str[32];
+
+    UCOS_Print("Application start\r\n");
+
+    NetIF_LinkStateWaitUntilUp (1, 1000, 500, &net_err);
+
+    DNSc_GetServerByStr(p_addr_str, 32, &dns_err); /* Get current DNS server address. */
+
+    UCOS_Printf("Resolving URL \"micrium.com\" using DNS server %s\r\n", p_addr_str);
+    DNSc_GetHost("micrium.com", addrs, &addr_nbr, DNSc_FLAG_NONE, DEF_NULL, &dns_err);
+    if (dns_err != DNSc_ERR_NONE) {
+        UCOS_Printf("Error performing DNS query. DNSc_GetHost() returned error code %d\r\n", dns_err);
+    } else {
+		if (addrs[0].Len == NET_IPv4_ADDR_LEN) {
+#ifdef  NET_IPv4_MODULE_EN
+			NET_IPv4_ADDR *p_addr = (NET_IPv4_ADDR *)addrs[0].Addr;
+			NetASCII_IPv4_to_Str(*p_addr, p_addr_str, NET_ASCII_LEN_MAX_ADDR_IP, &net_err);
+#endif
+		} else {
+#ifdef  NET_IPv6_MODULE_EN
+			NET_IPv6_ADDR *p_addr = (NET_IPv6_ADDR *)addrs[0].Addr;
+			NetASCII_IPv6_to_Str(p_addr, p_addr_str, DEF_NO, DEF_YES, &net_err);
+#endif
+		}
+	    UCOS_Printf("Resolved IP: %s\r\n", p_addr_str);
+    }
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+    }
+
+}
+
diff --git a/src/ucos_v1_42/ucos/sw_apps/net_http-c/src/app.c b/src/ucos_v1_42/ucos/sw_apps/net_http-c/src/app.c
new file mode 100644
index 0000000..a470234
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/net_http-c/src/app.c
@@ -0,0 +1,207 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrate a basic HTTP client demo project.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osiii
+*           ucos_tcpip
+*           ucos_dhcp-c
+*           ucos_dns-c
+*           ucos_http-c
+*           ucos_standalone
+*
+*   2. Kernel tick source - (Not required on the Zynq-7000 PS)
+*       If a suitable timer is available in your FPGA design it can be used as the kernel tick source.
+*       To do so, in the "ucos" section select a timer for the "kernel_tick_src" configuration option.
+*
+*   3. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   4. Network interface configuration
+*       In the BSP network interface section selects the desired network intergace and ip configuration.
+*       Leave dhcp enabled if you'd like the embbeded dhcp client to configure the interface.
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer and UART.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+#include  
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+
+#define  HTTP_SERVER_HOSTNAME                            "nist.time.gov"
+
+#define  HTTPc_APP_CFG_CONN_NBR_MAX                       5u
+#define  HTTPc_APP_CFG_REQ_NBR_MAX                        5u
+#define  HTTPc_APP_CFG_CONN_BUF_SIZE                    512u
+
+
+HTTPc_CONN_OBJ        HTTPcApp_ConnTbl[HTTPc_APP_CFG_CONN_NBR_MAX];
+HTTPc_REQ_OBJ         HTTPcApp_ReqTbl[HTTPc_APP_CFG_REQ_NBR_MAX];
+HTTPc_RESP_OBJ        HTTPcApp_RespTbl[HTTPc_APP_CFG_REQ_NBR_MAX];
+
+CPU_CHAR              HTTPcApp_ConnBufTbl[HTTPc_APP_CFG_CONN_NBR_MAX][HTTPc_APP_CFG_CONN_BUF_SIZE];
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+    HTTPc_CONN_OBJ     *p_conn;
+    HTTPc_REQ_OBJ      *p_req;
+    HTTPc_RESP_OBJ     *p_resp;
+    CPU_CHAR           *p_buf;
+    HTTPc_FLAGS         flags;
+    CPU_SIZE_T          str_len;
+    CPU_BOOLEAN         result;
+    HTTPc_ERR           err_httpc;
+    OS_ERR              os_err;
+
+    UCOS_Print ("Application start\r\n");
+
+    p_conn = &HTTPcApp_ConnTbl[0];
+    p_req  = &HTTPcApp_ReqTbl[0];
+    p_resp = &HTTPcApp_RespTbl[0];
+    p_buf  = &HTTPcApp_ConnBufTbl[0][0];
+
+
+    /* ----------- INIT NEW CONNECTION & REQUEST ---------- */
+    HTTPc_ConnClr(p_conn, &err_httpc);
+    if (err_httpc != HTTPc_ERR_NONE) {
+        UCOS_Printf("Error initializing new connection. HTTPc_ConnClr() return error code %d\r\n", &err_httpc);
+    }
+
+    HTTPc_ReqClr(p_req, &err_httpc);
+    if (err_httpc != HTTPc_ERR_NONE) {
+        UCOS_Printf("Error initializing new request. HTTPc_ConnClr() return error code %d\r\n", &err_httpc);
+    }
+
+        /* ----------------- OPEN CONNECTION ------------------ */
+    str_len = Str_Len(HTTP_SERVER_HOSTNAME);
+    flags = HTTPc_FLAG_NONE;
+    result = HTTPc_ConnOpen(p_conn,
+            p_buf,
+            HTTPc_APP_CFG_CONN_BUF_SIZE,
+            HTTP_SERVER_HOSTNAME,
+            str_len,
+            flags,
+            &err_httpc);
+    if (err_httpc != HTTPc_ERR_NONE) {
+        UCOS_Printf("Error opening connection. HTTPc_ConnOpen() returned error code %d\r\n", err_httpc);
+    }
+
+    if (result == DEF_OK) {
+        UCOS_Printf("Connection to server succeeded.\n\r");
+    } else {
+        UCOS_Printf("Connection to server failed.\r\n");
+    }
+
+    if (result == DEF_OK) {
+        UCOS_Print ("Querying current time from nist.time.gov/actualtime.cgi\r\n");
+                                                                /* ---------------- SEND HTTP REQUEST ----------------- */
+        str_len = Str_Len("/actualtime.cgi");
+        flags = HTTPc_FLAG_NONE;
+        result = HTTPc_ReqSend(p_conn,
+                p_req,
+                p_resp,
+                HTTP_METHOD_GET,
+                "/actualtime.cgi",
+                str_len,
+                flags,
+                &err_httpc);
+        if (err_httpc != HTTPc_ERR_NONE) {
+            UCOS_Printf("Error sending request. HTTPc_ReqSend() returned error code %d\r\n", err_httpc);
+        }
+
+        if (result == DEF_OK) {
+            UCOS_Printf("Request successful. Response content:\r\n");
+            UCOS_Printf("%s\n\r", p_buf);
+        }
+    }
+
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+    }
+
+}
diff --git a/src/ucos_v1_42/ucos/sw_apps/net_telnet-s/src/app.c b/src/ucos_v1_42/ucos/sw_apps/net_telnet-s/src/app.c
new file mode 100644
index 0000000..0877829
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/net_telnet-s/src/app.c
@@ -0,0 +1,159 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrate a basic uC/DNSc project.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osiii
+*           ucos_standalone
+*           ucos_tcpip
+*           ucos_dhcp
+*           ucos_dns-c
+*
+*   2. Kernel tick source - (Not required on the Zynq-7000 PS)
+*       If a suitable timer is available in your FPGA design it can be used as the kernel tick source.
+*       To do so, in the "ucos" section select a timer for the "kernel_tick_src" configuration option.
+*
+*   3. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   4. Network interface configuration
+*       In the BSP network interface section selects the desired network intergace and ip configuration.
+*       Leave dhcp enabled if you'd like the embbeded dhcp client to configure the interface.
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer and UART.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+    OS_ERR         os_err;
+    DNSc_ADDR_OBJ  addrs[2u];
+    CPU_INT08U     addr_nbr = 2u;
+    DNSc_ERR       dns_err;
+    NET_ERR        net_err;
+    CPU_CHAR       p_addr_str[32];
+
+    UCOS_Print("Application start\r\n");
+
+    DNSc_GetServerByStr(p_addr_str, 32, &dns_err); /* Get current DNS server address. */
+
+    UCOS_Printf("Resolving URL \"micrium.com\" using DNS server %s\r\n", p_addr_str);
+    DNSc_GetHost("micrium.com", addrs, &addr_nbr, DNSc_FLAG_NONE, DEF_NULL, &dns_err);
+    if (dns_err != DNSc_ERR_NONE) {
+        UCOS_Printf("Error performing DNS query. DNSc_GetHost() returned error code %d\r\n", dns_err);
+        return;
+    }
+
+    if (addrs[0].Len == NET_IPv4_ADDR_LEN) {
+#ifdef  NET_IPv4_MODULE_EN
+        NET_IPv4_ADDR *p_addr = (NET_IPv4_ADDR *)addrs[0].Addr;
+        NetASCII_IPv4_to_Str(*p_addr, p_addr_str, NET_ASCII_LEN_MAX_ADDR_IP, &net_err);
+#endif
+    } else {
+#ifdef  NET_IPv6_MODULE_EN
+        NET_IPv6_ADDR *p_addr = (NET_IPv6_ADDR *)addrs[0].Addr;
+        NetASCII_IPv6_to_Str(p_addr, p_addr_str, DEF_NO, DEF_YES, &net_err);
+#endif
+    }
+
+    UCOS_Printf("Resolved IP: %s\r\n", p_addr_str);
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+    }
+
+}
+
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbd_cdc/src/app.c b/src/ucos_v1_42/ucos/sw_apps/usbd_cdc/src/app.c
new file mode 100644
index 0000000..4c0142f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbd_cdc/src/app.c
@@ -0,0 +1,427 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrates a basic uC/USB-Device project showcasing the CDC class.
+*   Only the USB interface of the Zynq-7000 is supported for this example.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osiii
+*           ucos_standalone
+*           ucos_usbd
+*
+*   2. USB Device interface
+*       The USB interface used by the BSP can be configured from the "ucos" configuration dialog in the
+*       USB INTERFACE section.
+*
+*   3. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   4. Host driver configuration
+*       On Windows a CDC driver needs to be installed. They can be found in the USBD-Host package at
+*        http://micrium.com/download/micrium_usbd-host-app/
+*
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer and UART.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  "app_usb.h"
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+void  APP_USBD_Init (void);
+
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+    OS_ERR       os_err;
+
+    UCOS_Print ("Application start\r\n");
+
+    APP_USBD_Init();
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+    }
+
+}
+
+
+USBD_DEV_CFG  USBD_DevCfg_Demo = {
+    0xFFFD,                                                     /* Vendor  ID.                                          */
+    0x5678,                                                     /* Product ID (CDC).                                    */
+    0x0101,                                                     /* Device release number.                               */
+   "Test Manufacturer",                                         /* Manufacturer  string.                                */
+   "Test Product",                                              /* Product       string.                                */
+   "1234567890ABCDEF",                                          /* Serial number string.                                */
+    USBD_LANG_ID_ENGLISH_US                                     /* String language ID.                                  */
+};
+
+
+                                                                /* ---------- USB DEVICE CALLBACKS FUNCTIONS ---------- */
+static  void  App_USBD_EventReset  (CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventSuspend(CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventResume (CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventCfgSet (CPU_INT08U   dev_nbr, CPU_INT08U   cfg_val);
+static  void  App_USBD_EventCfgClr (CPU_INT08U   dev_nbr, CPU_INT08U   cfg_val);
+static  void  App_USBD_EventConn   (CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventDisconn(CPU_INT08U   dev_nbr);
+
+static  USBD_BUS_FNCTS  App_USBD_BusFncts = {
+    App_USBD_EventReset,
+    App_USBD_EventSuspend,
+    App_USBD_EventResume,
+    App_USBD_EventCfgSet,
+    App_USBD_EventCfgClr,
+    App_USBD_EventConn,
+    App_USBD_EventDisconn
+};
+
+void APP_USBD_Init (void)
+{
+    CPU_INT08U  dev_nbr;
+    CPU_INT08U  cfg_hs_nbr;
+    CPU_INT08U  cfg_fs_nbr;
+    USBD_ERR    usbd_err;
+
+    UCOS_Print("Adding USB Device interface\r\n");
+
+    dev_nbr = USBD_DevAdd(&USBD_DevCfg_Demo,
+                          &App_USBD_BusFncts,
+                          &USBD_DrvAPI_Synopsys_OTG_HS,
+                          &UCOS_USBD_DrvCfg_PS7,
+                          &USBD_DrvBSP_PS7_USB,
+                          &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error adding device. USBD_DevAdd returned error code %d\r\n", usbd_err);
+    }
+
+    USBD_DevSelfPwrSet(dev_nbr, DEF_NO, &usbd_err);              /* Device is not self-powered.                          */
+
+    cfg_hs_nbr = USBD_CFG_NBR_NONE;
+    cfg_fs_nbr = USBD_CFG_NBR_NONE;
+
+#if (USBD_CFG_HS_EN == DEF_ENABLED)
+    UCOS_Print("Adding USB Device high speed configuration\r\n");
+
+    cfg_hs_nbr = USBD_CfgAdd( dev_nbr,                          /* Add HS configuration.                               */
+                              USBD_DEV_ATTRIB_SELF_POWERED,
+                              100u,
+                              USBD_DEV_SPD_HIGH,
+                             "HS configuration",
+                             &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error adding high speed configuration. USBD_CfgAdd returned error code %d\r\n", usbd_err);
+    }
+#endif
+
+    UCOS_Print("Adding USB Device full speed configuration\r\n");
+
+    cfg_fs_nbr = USBD_CfgAdd( dev_nbr,                          /* Add FS configuration.                                */
+                              USBD_DEV_ATTRIB_SELF_POWERED,
+                              100u,
+                              USBD_DEV_SPD_FULL,
+                             "FS configuration",
+                             &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error adding full speed configuration. USBD_CfgAdd returned error code %d\r\n", usbd_err);
+    }
+
+#if (USBD_CFG_HS_EN == DEF_ENABLED)
+    if ((cfg_fs_nbr != USBD_CFG_NBR_NONE) &&
+        (cfg_hs_nbr != USBD_CFG_NBR_NONE)) {
+
+        USBD_CfgOtherSpeed(dev_nbr,                             /* Associate both config for other spd desc.            */
+                           cfg_hs_nbr,
+                           cfg_fs_nbr,
+                          &usbd_err);
+        if (usbd_err != USBD_ERR_NONE) {
+            UCOS_Printf("Failure to associate other speed configuration. USBD_CfgOtherSpeed returned error code %d\r\n", usbd_err);
+        }
+    }
+#endif
+
+    App_USBD_CDC_Init(dev_nbr, cfg_hs_nbr, cfg_fs_nbr);
+
+    USBD_DevStart(dev_nbr, &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error starting USB device. USBD_DevStart returned error code %d\r\n", usbd_err);
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            USB CALLBACKS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        App_USBD_EventReset()
+*
+* Description : Bus reset event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Reset()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventReset (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventSuspend()
+*
+* Description : Bus suspend event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Suspend()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventSuspend (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventResume()
+*
+* Description : Bus Resume event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Resume()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventResume (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventCfgSet()
+*
+* Description : Set configuration callback event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+*               cfg_nbr     Active device configuration.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_CfgOpen() via 'p_dev->BusFnctsPtr->CfgSet()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventCfgSet (CPU_INT08U  dev_nbr,
+                                    CPU_INT08U  cfg_val)
+{
+    (void)dev_nbr;
+    (void)cfg_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventCfgClr()
+*
+* Description : Clear configuration event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_CfgClose via 'p_dev->BusFnctsPtr->CfgClr()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventCfgClr (CPU_INT08U  dev_nbr,
+                                    CPU_INT08U  cfg_val)
+{
+    (void)dev_nbr;
+    (void)cfg_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        App_USBD_EventConn()
+*
+* Description : Device connection event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Conn()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventConn (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventDisconn()
+*
+* Description : Device connection event callback function.
+*
+* Argument(s) : dev_nbr     USB device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Disconn()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventDisconn (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            USBD_Trace()
+*
+* Description : Function to output or log USB trace events.
+*
+* Argument(s) : p_str       Pointer to string containing the trace event information.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DbgTaskHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  USBD_Trace (const  CPU_CHAR  *p_str)
+{
+    UCOS_Print(p_str);
+}
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbd_cdc/src/app_usb.h b/src/ucos_v1_42/ucos/sw_apps/usbd_cdc/src/app_usb.h
new file mode 100644
index 0000000..d63f187
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbd_cdc/src/app_usb.h
@@ -0,0 +1,34 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                USB DEVICE CDC CLASS TEST APPLICATION
+*
+*                                              TEMPLATE
+*
+* Filename      : app_usb.h
+* Version       : V4.01.02
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  App_USBD_CDC_Init (CPU_INT08U  dev_nbr,
+                                CPU_INT08U  cfg_hs,
+                                CPU_INT08U  cfg_fs);
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbd_cdc/src/app_usbd_cdc.c b/src/ucos_v1_42/ucos/sw_apps/usbd_cdc/src/app_usbd_cdc.c
new file mode 100644
index 0000000..8750d71
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbd_cdc/src/app_usbd_cdc.c
@@ -0,0 +1,596 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can find our product's user manual, API reference, release notes and
+*               more information at: https://doc.micrium.com
+*
+*               You can contact us at: http://www.micrium.com
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                             USB DEVICE CDC ACM SERIAL TEST APPLICATION
+*
+*                                              TEMPLATE
+*
+* Filename      : app_usbd_cdc.c
+* Version       : V4.04.00
+* Programmer(s) : FT
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#if (APP_CFG_USBD_CDC_EN == DEF_ENABLED)
+#include  
+#include  
+#include  
+#include  
+
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#ifndef OS_VERSION
+#error "OS_VERSION must be #define'd."
+#endif
+
+#define  APP_USBD_CDC_BUF_LEN                             512u
+
+#define  APP_USBD_CDC_CURSOR_START                     "\033[H"
+#define  APP_USBD_CDC_CURSOR_START_SIZE                   3u
+
+#define  APP_USBD_CDC_SCREEN_CLR                "\033[2J\033[H"
+#define  APP_USBD_CDC_SCREEN_CLR_SIZE                     7u
+
+#define  APP_USBD_CDC_SCREEN_SIZE                        80u
+
+#define  APP_USBD_CDC_TX_TIMEOUT_mS                       0u
+#define  APP_USBD_CDC_RX_TIMEOUT_mS                       0u
+
+#define  APP_USBD_CDC_MSG                       "===== USB CDC ACM Serial Emulation Demo ======"\
+                                                "\r\n"\
+                                                "\r\n"\
+                                                "1. Echo 1 demo.\r\n"\
+                                                "2. Echo N demo.\r\n"\
+                                                "Option: "
+#define  APP_USBD_CDC_MSG_SIZE                           92u
+
+#define  APP_USBD_CDC_MSG1                      "Echo 1 demo... \r\n\r\n>> "
+#define  APP_USBD_CDC_MSG1_SIZE                          22u
+
+#define  APP_USBD_CDC_MSG2                      "Echo N demo. You can send up to 512 characters at once... \r\n\r\n>> "
+#define  APP_USBD_CDC_MSG2_SIZE                          65u
+
+#define  APP_USBD_CDC_NEW_LINE                  "\n\r>> "
+#define  APP_USBD_CDC_NEW_LINE_SIZE                       5u
+
+
+#define  APP_CFG_USBD_CDC_SERIAL_TEST_EN  DEF_ENABLED
+
+#define  APP_CFG_USBD_CDC_SERIAL_TASK_STK_SIZE 1024u
+#define  APP_CFG_USBD_CDC_SERIAL_TASK_PRIO 5u
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                   ACM SERIAL DEMO STATE DATA TYPE
+*********************************************************************************************************
+*/
+
+typedef  enum  app_usbd_cdc_state {
+    APP_USBD_CDC_STATE_MENU = 0u,
+    APP_USBD_CDC_STATE_ECHO_1,
+    APP_USBD_CDC_STATE_ECHO_N
+} APP_USBD_CDC_STATE;
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+#if (APP_CFG_USBD_CDC_SERIAL_TEST_EN == DEF_ENABLED)
+static  OS_TCB      App_USBD_CDC_SerialTaskTCB;
+
+static  CPU_STK     App_USBD_CDC_SerialTaskStk[APP_CFG_USBD_CDC_SERIAL_TASK_STK_SIZE];
+static  CPU_INT08U  App_USBD_CDC_SerialBuf[APP_USBD_CDC_BUF_LEN];
+
+CPU_INT08U          App_USBD_CDC_Msg[APP_USBD_CDC_MSG_SIZE];
+CPU_INT08U          App_USBD_CDC_Msg1[APP_USBD_CDC_MSG1_SIZE];
+CPU_INT08U          App_USBD_CDC_Msg2[APP_USBD_CDC_MSG2_SIZE];
+CPU_INT08U          App_USBD_CDC_CursorStart[APP_USBD_CDC_CURSOR_START_SIZE];
+CPU_INT08U          App_USBD_CDC_ScreenClr[APP_USBD_CDC_SCREEN_CLR_SIZE];
+CPU_INT08U          App_USBD_CDC_NewLine[APP_USBD_CDC_NEW_LINE_SIZE];
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (APP_CFG_USBD_CDC_SERIAL_TEST_EN == DEF_ENABLED)
+static  void         App_USBD_CDC_SerialTask      (void                         *p_arg);
+#endif
+
+static  void         App_USBD_CDC_SerialLineCtrl  (CPU_INT08U                    subclass_nbr,
+                                                   CPU_INT08U                    events,
+                                                   CPU_INT08U                    events_chngd,
+                                                   void                         *p_arg);
+
+static  CPU_BOOLEAN  App_USBD_CDC_SerialLineCoding(CPU_INT08U                    subclass_nbr,
+                                                   USBD_ACM_SERIAL_LINE_CODING  *p_line_coding,
+                                                   void                         *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         App_USBD_CDC_Init()
+*
+* Description : Initialize CDC class.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+*               cfg_hs      High speed configuration number.
+*
+*               cfg_fs      Full speed configuration number.
+*
+* Return(s)   : DEF_OK,   if CDC class initialized successfully.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : App_USBD_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  App_USBD_CDC_Init (CPU_INT08U  dev_nbr,
+                                CPU_INT08U  cfg_hs,
+                                CPU_INT08U  cfg_fs)
+{
+    USBD_ERR    err;
+    USBD_ERR    err_hs;
+    USBD_ERR    err_fs;
+    CPU_INT08U  subclass_nbr;
+#if (APP_CFG_USBD_CDC_SERIAL_TEST_EN == DEF_ENABLED)
+    OS_ERR      os_err;
+#endif
+
+    UCOS_Printf("Initializing CDC class\r\n");
+
+    USBD_CDC_Init(&err);
+    if (err != USBD_ERR_NONE) {
+        UCOS_Printf("Error initializing CDC class. USBD_CDC_Init() returned error code %d\r\n", err);
+        return (DEF_FAIL);
+    }
+
+    UCOS_Printf(" Initializing ACM serial subclass\r\n");
+
+    USBD_ACM_SerialInit(&err);
+    if (err != USBD_ERR_NONE) {
+        UCOS_Printf("Error initializing ACM serial subclass.USBD_ACM_SerialInit returned with error code = %d\r\n", err);
+        return (DEF_FAIL);
+    }
+
+    subclass_nbr = USBD_ACM_SerialAdd(64u, USBD_ACM_SERIAL_CALL_MGMT_DEV, &err);
+    if (err != USBD_ERR_NONE) {
+        UCOS_Printf("Error creating ACM serial subclass instance. USBD_ACM_SerialAdd() returned with error %d\r\n", err);
+        return (DEF_FAIL);
+    }
+
+                                                                /* Register line coding and ctrl line change callbacks. */
+    USBD_ACM_SerialLineCodingReg(        subclass_nbr,
+                                         App_USBD_CDC_SerialLineCoding,
+                                 (void *)0,
+                                        &err);
+
+    USBD_ACM_SerialLineCtrlReg(        subclass_nbr,
+                                       App_USBD_CDC_SerialLineCtrl,
+                               (void *)0,
+                                      &err);
+
+
+    if (cfg_hs != USBD_CFG_NBR_NONE) {
+        USBD_ACM_SerialCfgAdd(subclass_nbr, dev_nbr, cfg_hs, &err_hs);
+        if (err_hs != USBD_ERR_NONE) {
+            UCOS_Printf("Error adding ACM serial subclass instance #%d to HS configuration. USBD_ACM_SerialCfgAdd() return with error %d\r\n", subclass_nbr, err_hs);
+        }
+    }
+
+    if (cfg_fs != USBD_CFG_NBR_NONE) {
+        USBD_ACM_SerialCfgAdd(subclass_nbr, dev_nbr, cfg_fs, &err_fs);
+        if (err_fs != USBD_ERR_NONE) {
+            UCOS_Printf("Error adding ACM serial subclass instance #%d to FS configuration. USBD_ACM_SerialCfgAdd() return with error %d\r\n", subclass_nbr, err_fs);
+        }
+    }
+
+    if ((err_hs != USBD_ERR_NONE) &&                            /* If HS and FS cfg fail, stop class init.              */
+        (err_fs != USBD_ERR_NONE)) {
+        return (DEF_FAIL);
+    }
+
+#if (APP_CFG_USBD_CDC_SERIAL_TEST_EN == DEF_ENABLED)
+    OSTaskCreate(                 &App_USBD_CDC_SerialTaskTCB,
+                                  "USB Device CDC ACM Test",
+                                   App_USBD_CDC_SerialTask,
+                 (void *)(CPU_ADDR)subclass_nbr,
+                                   APP_CFG_USBD_CDC_SERIAL_TASK_PRIO,
+                                  &App_USBD_CDC_SerialTaskStk[0],
+                                   APP_CFG_USBD_CDC_SERIAL_TASK_STK_SIZE / 10u,
+                                   APP_CFG_USBD_CDC_SERIAL_TASK_STK_SIZE,
+                                   0u,
+                                   0u,
+                 (void *)          0,
+                                   OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR,
+                                  &os_err);
+    if (os_err != OS_ERR_NONE) {
+        UCOS_Printf("Error creating CDC ACM serial test task. OSTaskCreate() returned with error %d", os_err);
+        return (DEF_FAIL);
+    }
+#endif
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                      App_USBD_CDC_SerialTask()
+*
+* Description : USB CDC ACM serial emulation demo task.
+*
+* Argument(s) : p_arg       Task argument pointer.
+*
+* Return(s)   : none.
+*
+* Created by  : App_USBD_CDC_Init().
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+#if (APP_CFG_USBD_CDC_SERIAL_TEST_EN == DEF_ENABLED)
+static  void  App_USBD_CDC_SerialTask (void  *p_arg)
+{
+    CPU_INT08U          ch;
+    CPU_BOOLEAN         conn;
+    APP_USBD_CDC_STATE  state;
+    CPU_INT08U          subclass_nbr;
+    CPU_INT08U          line_ctr;
+    CPU_INT08U          line_state;
+    CPU_INT32U          xfer_len;
+    USBD_ERR            err;
+    OS_ERR              os_err;
+
+
+    subclass_nbr = (CPU_INT08U)(CPU_ADDR)p_arg;
+    state        =  APP_USBD_CDC_STATE_MENU;
+    line_ctr     =  0u;
+
+    Mem_Copy(App_USBD_CDC_Msg,
+             APP_USBD_CDC_MSG,
+             APP_USBD_CDC_MSG_SIZE);
+
+    Mem_Copy(App_USBD_CDC_Msg1,
+             APP_USBD_CDC_MSG1,
+             APP_USBD_CDC_MSG1_SIZE);
+
+    Mem_Copy(App_USBD_CDC_Msg2,
+             APP_USBD_CDC_MSG2,
+             APP_USBD_CDC_MSG2_SIZE);
+
+    Mem_Copy(App_USBD_CDC_CursorStart,
+             APP_USBD_CDC_CURSOR_START,
+             APP_USBD_CDC_CURSOR_START_SIZE);
+
+    Mem_Copy(App_USBD_CDC_ScreenClr,
+             APP_USBD_CDC_SCREEN_CLR,
+             APP_USBD_CDC_SCREEN_CLR_SIZE);
+
+    Mem_Copy(App_USBD_CDC_NewLine,
+             APP_USBD_CDC_NEW_LINE,
+             APP_USBD_CDC_NEW_LINE_SIZE);
+
+    while (DEF_TRUE) {
+                                                                /* Wait until device is in cfg'd state.                 */
+        conn       = USBD_ACM_SerialIsConn(subclass_nbr);
+        line_state = USBD_ACM_SerialLineCtrlGet(subclass_nbr, &err);
+
+        while ((conn != DEF_YES                                     ) ||
+               (DEF_BIT_IS_CLR(line_state, USBD_ACM_SERIAL_CTRL_DTR)) ||
+               (err  != USBD_ERR_NONE                               )) {
+
+            OSTimeDlyHMSM(0u, 0u, 0u, 250u, OS_OPT_TIME_HMSM_NON_STRICT, &os_err);
+            (void)&os_err;
+            conn       = USBD_ACM_SerialIsConn(subclass_nbr);
+            line_state = USBD_ACM_SerialLineCtrlGet(subclass_nbr, &err);
+        }
+
+        switch (state) {
+            case APP_USBD_CDC_STATE_MENU:
+                 (void)USBD_ACM_SerialTx( subclass_nbr,
+                                          App_USBD_CDC_CursorStart,
+                                          APP_USBD_CDC_CURSOR_START_SIZE,
+                                          APP_USBD_CDC_TX_TIMEOUT_mS,
+                                         &err);
+
+                 (void)USBD_ACM_SerialTx( subclass_nbr,
+                                          App_USBD_CDC_Msg,
+                                          APP_USBD_CDC_MSG_SIZE,
+                                          APP_USBD_CDC_TX_TIMEOUT_mS,
+                                         &err);
+
+
+                 (void)USBD_ACM_SerialRx( subclass_nbr,         /* Wait for character.                                  */
+                                         &ch,
+                                          1u,
+                                          APP_USBD_CDC_RX_TIMEOUT_mS,
+                                         &err);
+
+                 if (err != USBD_ERR_NONE) {
+                     break;
+                 }
+
+                 (void)USBD_ACM_SerialTx( subclass_nbr,         /* Echo back character.                                 */
+                                         &ch,
+                                          1u,
+                                          APP_USBD_CDC_TX_TIMEOUT_mS,
+                                         &err);
+
+                 switch (ch) {                                  /* Select demo options.                                 */
+                     case '1':
+                          (void)USBD_ACM_SerialTx( subclass_nbr,
+                                                   App_USBD_CDC_ScreenClr,
+                                                   APP_USBD_CDC_SCREEN_CLR_SIZE,
+                                                   APP_USBD_CDC_TX_TIMEOUT_mS,
+                                                  &err);
+
+                          (void)USBD_ACM_SerialTx( subclass_nbr,
+                                                   App_USBD_CDC_Msg1,
+                                                   APP_USBD_CDC_MSG1_SIZE,
+                                                   APP_USBD_CDC_TX_TIMEOUT_mS,
+                                                  &err);
+
+                          state    = APP_USBD_CDC_STATE_ECHO_1;
+                          line_ctr = 0u;
+                          break;
+
+
+                     case '2':
+                          (void)USBD_ACM_SerialTx( subclass_nbr,
+                                                   App_USBD_CDC_ScreenClr,
+                                                   APP_USBD_CDC_SCREEN_CLR_SIZE,
+                                                   APP_USBD_CDC_TX_TIMEOUT_mS,
+                                                  &err);
+
+                          (void)USBD_ACM_SerialTx( subclass_nbr,
+                                                   App_USBD_CDC_Msg2,
+                                                   APP_USBD_CDC_MSG2_SIZE,
+                                                   APP_USBD_CDC_TX_TIMEOUT_mS,
+                                                  &err);
+
+                           state    = APP_USBD_CDC_STATE_ECHO_N;
+                           line_ctr = 0u;
+                           break;
+
+
+                     default:
+                          break;
+
+                 }
+                 break;
+
+
+            case APP_USBD_CDC_STATE_ECHO_1:                     /* 'Echo 1' state.                                      */
+                 (void)USBD_ACM_SerialRx( subclass_nbr,         /*  Wait for character.                                 */
+                                         &ch,
+                                          1u,
+                                          0u,
+                                         &err);
+
+                 if (err != USBD_ERR_NONE) {
+                     break;
+                 }
+
+                 if (ch == ASCII_CHAR_END_OF_TEXT) {            /* If 'Ctrl-c' character is received.                   */
+                     state = APP_USBD_CDC_STATE_MENU;           /* ... return to 'menu' state.                          */
+                    (void)USBD_ACM_SerialTx( subclass_nbr,
+                                             App_USBD_CDC_ScreenClr,
+                                             APP_USBD_CDC_SCREEN_CLR_SIZE,
+                                             APP_USBD_CDC_TX_TIMEOUT_mS,
+                                            &err);
+
+                 } else {
+                     (void)USBD_ACM_SerialTx( subclass_nbr,     /* Echo back character.                                 */
+                                             &ch,
+                                              1u,
+                                              APP_USBD_CDC_TX_TIMEOUT_mS,
+                                             &err);
+                      line_ctr++;
+
+                      if (line_ctr == APP_USBD_CDC_SCREEN_SIZE - 3u) {
+                                                                /* Move to next line.                                   */
+                          (void)USBD_ACM_SerialTx( subclass_nbr,
+                                                   App_USBD_CDC_NewLine,
+                                                   APP_USBD_CDC_NEW_LINE_SIZE,
+                                                   APP_USBD_CDC_TX_TIMEOUT_mS,
+                                                  &err);
+                           line_ctr = 0u;
+                      }
+                 }
+                 break;
+
+
+            case APP_USBD_CDC_STATE_ECHO_N:                     /* 'Echo N' state.                                      */
+                 xfer_len = USBD_ACM_SerialRx( subclass_nbr,    /*  Wait for N characters.                              */
+                                              &App_USBD_CDC_SerialBuf[0],
+                                               APP_USBD_CDC_BUF_LEN,
+                                               0u,
+                                              &err);
+
+                 if (err != USBD_ERR_NONE) {
+                     break;
+                 }
+
+                 if ((xfer_len == 1) &&                         /* If 'Ctrl-c' character is received.                   */
+                     (App_USBD_CDC_SerialBuf[0] == ASCII_CHAR_END_OF_TEXT)) {
+
+                     state = APP_USBD_CDC_STATE_MENU;           /* ... return to 'menu' state.                          */
+                    (void)USBD_ACM_SerialTx( subclass_nbr,
+                                             App_USBD_CDC_ScreenClr,
+                                             APP_USBD_CDC_SCREEN_CLR_SIZE,
+                                             APP_USBD_CDC_TX_TIMEOUT_mS,
+                                            &err);
+
+                 } else {
+                     (void)USBD_ACM_SerialTx( subclass_nbr,     /* Echo back characters.                                */
+                                             &App_USBD_CDC_SerialBuf[0],
+                                              xfer_len,
+                                              APP_USBD_CDC_TX_TIMEOUT_mS,
+                                             &err);
+                      line_ctr += xfer_len;
+
+                      if (line_ctr == APP_USBD_CDC_SCREEN_SIZE - 3u) {
+                                                                /* Move to next line.                                   */
+                          (void)USBD_ACM_SerialTx( subclass_nbr,
+                                                   App_USBD_CDC_NewLine,
+                                                   APP_USBD_CDC_NEW_LINE_SIZE,
+                                                   APP_USBD_CDC_TX_TIMEOUT_mS,
+                                                  &err);
+                           line_ctr = 0u;
+                      }
+                 }
+                 break;
+
+
+            default:
+                 break;
+        }
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                    App_USBD_CDC_SerialLineCtrl()
+*
+* Description : Serial control line change notification callback.
+*
+* Argument(s) : nbr             CDC ACM serial emulation subclass instance number.
+*
+*               events          Current line state. The line state is a OR'ed of the following flags :
+*
+*                                   USBD_ACM_SERIAL_CTRL_BREAK
+*                                   USBD_ACM_SERIAL_CTRL_RTS
+*                                   USBD_ACM_SERIAL_CTRL_DTR
+*
+*               events_chngd    Line state flags that have changed.
+*
+*               p_arg           Callback argument.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_ACM_SerialMgmtReq() via 'p_ctrl->LineCtrlChngdFnct()'.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_CDC_SerialLineCtrl (CPU_INT08U   nbr,
+                                           CPU_INT08U   events,
+                                           CPU_INT08U   events_chngd,
+                                           void        *p_arg)
+{
+    (void)&nbr;
+    (void)&events;
+    (void)&events_chngd;
+    (void)&p_arg;
+}
+
+
+/*
+*********************************************************************************************************
+*                                   App_USBD_CDC_SerialLineCoding()
+*
+* Description : Serial line coding line change notification callback.
+*
+* Argument(s) : nbr             CDC ACM serial emulation subclass instance number.
+*
+*               p_line_coding   Pointer to line coding structure.
+*
+*               p_arg           Callback argument.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_ACM_SerialMgmtReq() via 'p_ctrl->LineCtrlChngdFnct()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  App_USBD_CDC_SerialLineCoding (CPU_INT08U                    nbr,
+                                                    USBD_ACM_SERIAL_LINE_CODING  *p_line_coding,
+                                                    void                         *p_arg)
+{
+    (void)&nbr;
+    (void)&p_line_coding;
+    (void)&p_arg;
+
+    return (DEF_OK);
+}
+#endif
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbd_hid/src/app.c b/src/ucos_v1_42/ucos/sw_apps/usbd_hid/src/app.c
new file mode 100644
index 0000000..c3c8239
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbd_hid/src/app.c
@@ -0,0 +1,422 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrates a basic uC/USB-Device project showcasing the HID class.
+*   Only the USB interface of the Zynq-7000 is supported for this example.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osiii
+*           ucos_standalone
+*           ucos_usbd
+*
+*   2. USB Device interface
+*       The USB interface used by the BSP can be configured from the "ucos" configuration dialog in the
+*       USB INTERFACE section.
+*
+*   3. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer and UART.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  "app_usb.h"
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+void  APP_USBD_Init (void);
+
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+    OS_ERR       os_err;
+
+    UCOS_Print ("Application start\r\n");
+
+    APP_USBD_Init();
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+    }
+
+}
+
+
+USBD_DEV_CFG  USBD_DevCfg_Demo = {
+    0xFFFD,                                                     /* Vendor  ID.                                          */
+    0x1234,                                                     /* Product ID (HID).                                    */
+    0x0101,                                                     /* Device release number.                               */
+   "Test Manufacturer",                                         /* Manufacturer  string.                                */
+   "Test Product",                                              /* Product       string.                                */
+   "1234567890ABCDEF",                                          /* Serial number string.                                */
+    USBD_LANG_ID_ENGLISH_US                                     /* String language ID.                                  */
+};
+
+
+                                                                /* ---------- USB DEVICE CALLBACKS FUNCTIONS ---------- */
+static  void  App_USBD_EventReset  (CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventSuspend(CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventResume (CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventCfgSet (CPU_INT08U   dev_nbr, CPU_INT08U   cfg_val);
+static  void  App_USBD_EventCfgClr (CPU_INT08U   dev_nbr, CPU_INT08U   cfg_val);
+static  void  App_USBD_EventConn   (CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventDisconn(CPU_INT08U   dev_nbr);
+
+static  USBD_BUS_FNCTS  App_USBD_BusFncts = {
+    App_USBD_EventReset,
+    App_USBD_EventSuspend,
+    App_USBD_EventResume,
+    App_USBD_EventCfgSet,
+    App_USBD_EventCfgClr,
+    App_USBD_EventConn,
+    App_USBD_EventDisconn
+};
+
+void APP_USBD_Init (void)
+{
+    CPU_INT08U  dev_nbr;
+    CPU_INT08U  cfg_hs_nbr;
+    CPU_INT08U  cfg_fs_nbr;
+    USBD_ERR    usbd_err;
+
+    UCOS_Print("Adding USB Device interface\r\n");
+
+    dev_nbr = USBD_DevAdd(&USBD_DevCfg_Demo,
+                          &App_USBD_BusFncts,
+                          &USBD_DrvAPI_Synopsys_OTG_HS,
+                          &UCOS_USBD_DrvCfg_PS7,
+                          &USBD_DrvBSP_PS7_USB,
+                          &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error adding device. USBD_DevAdd returned error code %d\r\n", usbd_err);
+    }
+
+    USBD_DevSelfPwrSet(dev_nbr, DEF_NO, &usbd_err);              /* Device is not self-powered.                          */
+
+    cfg_hs_nbr = USBD_CFG_NBR_NONE;
+    cfg_fs_nbr = USBD_CFG_NBR_NONE;
+
+#if (USBD_CFG_HS_EN == DEF_ENABLED)
+    UCOS_Print("Adding USB Device high speed configuration\r\n");
+
+    cfg_hs_nbr = USBD_CfgAdd( dev_nbr,                          /* Add HS configuration.                               */
+                              USBD_DEV_ATTRIB_SELF_POWERED,
+                              100u,
+                              USBD_DEV_SPD_HIGH,
+                             "HS configuration",
+                             &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error adding high speed configuration. USBD_CfgAdd returned error code %d\r\n", usbd_err);
+    }
+#endif
+
+    UCOS_Print("Adding USB Device full speed configuration\r\n");
+
+    cfg_fs_nbr = USBD_CfgAdd( dev_nbr,                          /* Add FS configuration.                                */
+                              USBD_DEV_ATTRIB_SELF_POWERED,
+                              100u,
+                              USBD_DEV_SPD_FULL,
+                             "FS configuration",
+                             &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error adding full speed configuration. USBD_CfgAdd returned error code %d\r\n", usbd_err);
+    }
+
+#if (USBD_CFG_HS_EN == DEF_ENABLED)
+    if ((cfg_fs_nbr != USBD_CFG_NBR_NONE) &&
+        (cfg_hs_nbr != USBD_CFG_NBR_NONE)) {
+
+        USBD_CfgOtherSpeed(dev_nbr,                             /* Associate both config for other spd desc.            */
+                           cfg_hs_nbr,
+                           cfg_fs_nbr,
+                          &usbd_err);
+        if (usbd_err != USBD_ERR_NONE) {
+            UCOS_Printf("Failure to associate other speed configuration. USBD_CfgOtherSpeed returned error code %d\r\n", usbd_err);
+        }
+    }
+#endif
+
+    App_USBD_HID_Init(dev_nbr, cfg_hs_nbr, cfg_fs_nbr);
+
+    USBD_DevStart(dev_nbr, &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error starting USB device. USBD_DevStart returned error code %d\r\n", usbd_err);
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            USB CALLBACKS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        App_USBD_EventReset()
+*
+* Description : Bus reset event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Reset()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventReset (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventSuspend()
+*
+* Description : Bus suspend event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Suspend()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventSuspend (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventResume()
+*
+* Description : Bus Resume event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Resume()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventResume (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventCfgSet()
+*
+* Description : Set configuration callback event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+*               cfg_nbr     Active device configuration.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_CfgOpen() via 'p_dev->BusFnctsPtr->CfgSet()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventCfgSet (CPU_INT08U  dev_nbr,
+                                    CPU_INT08U  cfg_val)
+{
+    (void)dev_nbr;
+    (void)cfg_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventCfgClr()
+*
+* Description : Clear configuration event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_CfgClose via 'p_dev->BusFnctsPtr->CfgClr()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventCfgClr (CPU_INT08U  dev_nbr,
+                                    CPU_INT08U  cfg_val)
+{
+    (void)dev_nbr;
+    (void)cfg_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        App_USBD_EventConn()
+*
+* Description : Device connection event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Conn()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventConn (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventDisconn()
+*
+* Description : Device connection event callback function.
+*
+* Argument(s) : dev_nbr     USB device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Disconn()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventDisconn (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            USBD_Trace()
+*
+* Description : Function to output or log USB trace events.
+*
+* Argument(s) : p_str       Pointer to string containing the trace event information.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DbgTaskHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  USBD_Trace (const  CPU_CHAR  *p_str)
+{
+    UCOS_Print(p_str);
+}
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbd_hid/src/app_usb.h b/src/ucos_v1_42/ucos/sw_apps/usbd_hid/src/app_usb.h
new file mode 100644
index 0000000..7fe0513
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbd_hid/src/app_usb.h
@@ -0,0 +1,35 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                USB DEVICE HID CLASS TEST APPLICATION
+*
+*                                              TEMPLATE
+*
+* Filename      : app_usb.h
+* Version       : V4.01.02
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+CPU_BOOLEAN  App_USBD_HID_Init (CPU_INT08U  dev_nbr,
+                                CPU_INT08U  cfg_hs,
+                                CPU_INT08U  cfg_fs);
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbd_hid/src/app_usb_hid.c b/src/ucos_v1_42/ucos/sw_apps/usbd_hid/src/app_usb_hid.c
new file mode 100644
index 0000000..84839b0
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbd_hid/src/app_usb_hid.c
@@ -0,0 +1,789 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                USB DEVICE HID CLASS TEST APPLICATION
+*
+*                                              TEMPLATE
+*
+* Filename      : app_usbd_hid.c
+* Version       : V4.01.02
+* Programmer(s) : FT
+*                 JFD
+*                 CM
+*                 FGK
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         LOCAL CONFIGURATION
+*********************************************************************************************************
+*/
+
+#define  APP_USBD_HID_REPORT_LEN           4u
+
+#define  APP_CFG_USBD_HID_TASK_STK_SIZE    512u
+#define  APP_CFG_USBD_HID_READ_TASK_PRIO   5u
+#define  APP_CFG_USBD_HID_WRITE_TASK_PRIO  5u
+#define  APP_CFG_USBD_HID_MOUSE_TASK_PRIO  5u
+
+#define  APP_CFG_USBD_HID_TEST_MOUSE_EN    DEF_ENABLED
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  App_USBD_HID_Protocol;
+static  CPU_INT08U  App_USBD_HID_ReportBuf[APP_USBD_HID_REPORT_LEN];
+
+#if (APP_CFG_USBD_HID_TEST_MOUSE_EN == DEF_DISABLED)
+static  OS_TCB      App_USBD_HID_ReadTaskTCB;
+static  OS_TCB      App_USBD_HID_WriteTaskTCB;
+static  CPU_STK     App_USBD_HID_ReadTaskStk[APP_CFG_USBD_HID_TASK_STK_SIZE];
+static  CPU_STK     App_USBD_HID_WriteTaskStk[APP_CFG_USBD_HID_TASK_STK_SIZE];
+
+static  CPU_INT08U  App_USBD_HID_ReportDesc[] = {               /* HID vendor-specific report                           */
+        USBD_HID_GLOBAL_USAGE_PAGE   + 2, 0xFF, 0xFF,
+        USBD_HID_LOCAL_USAGE         + 1, 0xFF,
+        USBD_HID_MAIN_COLLECTION     + 1, USBD_HID_COLLECTION_APPLICATION,
+
+        USBD_HID_GLOBAL_USAGE_PAGE   + 2, 0xFF, 0xFF,
+        USBD_HID_LOCAL_USAGE_MIN     + 1, 0x00,
+#if   (APP_USBD_HID_REPORT_LEN > 32768)
+        USBD_HID_LOCAL_USAGE_MAX     + 3, (APP_USBD_HID_REPORT_LEN - 1) & 0xFF, ((APP_USBD_HID_REPORT_LEN - 1) >> 8) & 0xFF, ((APP_USBD_HID_REPORT_LEN - 1) >> 16) & 0xFF, ((APP_USBD_HID_REPORT_LEN - 1) >> 24) & 0xFF,
+#elif (APP_USBD_HID_REPORT_LEN >   128)
+        USBD_HID_LOCAL_USAGE_MAX     + 2, (APP_USBD_HID_REPORT_LEN - 1) & 0xFF, ((APP_USBD_HID_REPORT_LEN - 1) >> 8) & 0xFF,
+#else
+        USBD_HID_LOCAL_USAGE_MAX     + 1,  APP_USBD_HID_REPORT_LEN - 1,
+#endif
+        USBD_HID_GLOBAL_LOG_MIN      + 1, 0x00,
+        USBD_HID_GLOBAL_LOG_MAX      + 2, 0xFF, 0x00,
+        USBD_HID_GLOBAL_REPORT_SIZE  + 1, 0x08,
+#if   (APP_USBD_HID_REPORT_LEN >= 32768)
+        USBD_HID_GLOBAL_REPORT_COUNT + 3, APP_USBD_HID_REPORT_LEN & 0xFF, (APP_USBD_HID_REPORT_LEN >> 8) & 0xFF, (APP_USBD_HID_REPORT_LEN >> 16) & 0xFF, (APP_USBD_HID_REPORT_LEN >> 24) & 0xFF,
+#elif (APP_USBD_HID_REPORT_LEN >=   128)
+        USBD_HID_GLOBAL_REPORT_COUNT + 2, APP_USBD_HID_REPORT_LEN & 0xFF, (APP_USBD_HID_REPORT_LEN >> 8) & 0xFF,
+#else
+        USBD_HID_GLOBAL_REPORT_COUNT + 1, APP_USBD_HID_REPORT_LEN,
+#endif
+        USBD_HID_MAIN_INPUT          + 1, USBD_HID_MAIN_DATA | USBD_HID_MAIN_VARIABLE | USBD_HID_MAIN_ABSOLUTE,
+
+        USBD_HID_GLOBAL_USAGE_PAGE   + 2, 0xFF, 0xFF,
+        USBD_HID_LOCAL_USAGE_MIN     + 1, 0x00,
+#if   (APP_USBD_HID_REPORT_LEN > 32768)
+        USBD_HID_LOCAL_USAGE_MAX     + 3, (APP_USBD_HID_REPORT_LEN - 1) & 0xFF, ((APP_USBD_HID_REPORT_LEN - 1) >> 8) & 0xFF, ((APP_USBD_HID_REPORT_LEN - 1) >> 16) & 0xFF, ((APP_USBD_HID_REPORT_LEN - 1) >> 24) & 0xFF,
+#elif (APP_USBD_HID_REPORT_LEN >   128)
+        USBD_HID_LOCAL_USAGE_MAX     + 2, (APP_USBD_HID_REPORT_LEN - 1) & 0xFF, ((APP_USBD_HID_REPORT_LEN - 1) >> 8) & 0xFF,
+#else
+        USBD_HID_LOCAL_USAGE_MAX     + 1,  APP_USBD_HID_REPORT_LEN - 1,
+#endif
+        USBD_HID_GLOBAL_LOG_MIN      + 1, 0x00,
+        USBD_HID_GLOBAL_LOG_MAX      + 2, 0xFF, 0x00,
+        USBD_HID_GLOBAL_REPORT_SIZE  + 1, 0x08,
+#if   (APP_USBD_HID_REPORT_LEN >= 32768)
+        USBD_HID_GLOBAL_REPORT_COUNT + 3, APP_USBD_HID_REPORT_LEN & 0xFF, (APP_USBD_HID_REPORT_LEN >> 8) & 0xFF, (APP_USBD_HID_REPORT_LEN >> 16) & 0xFF, (APP_USBD_HID_REPORT_LEN >> 24) & 0xFF,
+#elif (APP_USBD_HID_REPORT_LEN >=   128)
+        USBD_HID_GLOBAL_REPORT_COUNT + 2, APP_USBD_HID_REPORT_LEN & 0xFF, (APP_USBD_HID_REPORT_LEN >> 8) & 0xFF,
+#else
+        USBD_HID_GLOBAL_REPORT_COUNT + 1, APP_USBD_HID_REPORT_LEN,
+#endif
+        USBD_HID_MAIN_OUTPUT         + 1, USBD_HID_MAIN_DATA | USBD_HID_MAIN_VARIABLE | USBD_HID_MAIN_ABSOLUTE,
+
+        USBD_HID_MAIN_ENDCOLLECTION
+};
+
+#else
+
+static  OS_TCB      App_USBD_HID_MouseTaskTCB;
+static  CPU_STK     App_USBD_HID_MouseTaskStk[APP_CFG_USBD_HID_TASK_STK_SIZE];
+static  CPU_INT32S  App_USBD_HID_X;
+static  CPU_INT32S  App_USBD_HID_Y;
+
+static  CPU_INT08U  App_USBD_HID_ReportDesc[] = {               /* HID Mouse report                                     */
+    USBD_HID_GLOBAL_USAGE_PAGE           + 1, USBD_HID_USAGE_PAGE_GENERIC_DESKTOP_CONTROLS,
+    USBD_HID_LOCAL_USAGE                 + 1, USBD_HID_CA_MOUSE,
+    USBD_HID_MAIN_COLLECTION             + 1, USBD_HID_COLLECTION_APPLICATION,
+        USBD_HID_LOCAL_USAGE             + 1, USBD_HID_CP_POINTER,
+        USBD_HID_MAIN_COLLECTION         + 1, USBD_HID_COLLECTION_PHYSICAL,
+            USBD_HID_GLOBAL_USAGE_PAGE   + 1, USBD_HID_USAGE_PAGE_BUTTON,
+            USBD_HID_LOCAL_USAGE_MIN     + 1, 0x01,
+            USBD_HID_LOCAL_USAGE_MAX     + 1, 0x03,
+            USBD_HID_GLOBAL_LOG_MIN      + 1, 0x00,
+            USBD_HID_GLOBAL_LOG_MAX      + 1, 0x01,
+            USBD_HID_GLOBAL_REPORT_COUNT + 1, 0x03,
+            USBD_HID_GLOBAL_REPORT_SIZE  + 1, 0x01,
+            USBD_HID_MAIN_INPUT          + 1, USBD_HID_MAIN_DATA | USBD_HID_MAIN_VARIABLE | USBD_HID_MAIN_ABSOLUTE,
+            USBD_HID_GLOBAL_REPORT_COUNT + 1, 0x01,
+            USBD_HID_GLOBAL_REPORT_SIZE  + 1, 0x0D,
+            USBD_HID_MAIN_INPUT          + 1, USBD_HID_MAIN_CONSTANT,
+            USBD_HID_GLOBAL_USAGE_PAGE   + 1, USBD_HID_USAGE_PAGE_GENERIC_DESKTOP_CONTROLS,
+            USBD_HID_LOCAL_USAGE         + 1, USBD_HID_DV_X,
+            USBD_HID_LOCAL_USAGE         + 1, USBD_HID_DV_Y,
+            USBD_HID_GLOBAL_LOG_MIN      + 1, 0x81,
+            USBD_HID_GLOBAL_LOG_MAX      + 1, 0x7F,
+            USBD_HID_GLOBAL_REPORT_SIZE  + 1, 0x08,
+            USBD_HID_GLOBAL_REPORT_COUNT + 1, 0x02,
+            USBD_HID_MAIN_INPUT          + 1, USBD_HID_MAIN_DATA | USBD_HID_MAIN_VARIABLE | USBD_HID_MAIN_RELATIVE,
+        USBD_HID_MAIN_ENDCOLLECTION,
+    USBD_HID_MAIN_ENDCOLLECTION
+};
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+#if (APP_CFG_USBD_HID_TEST_MOUSE_EN == DEF_ENABLED)
+static  void         App_USBD_HID_MouseTask     (void        *p_arg);
+
+static  void         App_USBD_HID_MouseSetReport(CPU_INT08U  *p_buf);
+
+#else
+
+static  void         App_USBD_HID_ReadTask      (void        *p_arg);
+
+static  void         App_USBD_HID_WriteTask     (void        *p_arg);
+#endif
+
+static  CPU_BOOLEAN  App_USBD_HID_GetFeatureReport(CPU_INT08U   class_nbr,
+                                                 CPU_INT08U     report_id,
+                                                 CPU_INT08U  *p_report_buf,
+                                                 CPU_INT16U     report_len);
+
+static  CPU_BOOLEAN  App_USBD_HID_SetFeatureReport(CPU_INT08U   class_nbr,
+                                                 CPU_INT08U     report_id,
+                                                 CPU_INT08U  *p_report_buf,
+                                                 CPU_INT16U     report_len);
+
+static  CPU_INT08U   App_USBD_HID_GetProtocol   (CPU_INT08U   class_nbr,
+                                                 USBD_ERR    *p_err);
+
+static  void         App_USBD_HID_SetProtocol   (CPU_INT08U   class_nbr,
+                                                 CPU_INT08U   protocol,
+                                                 USBD_ERR    *p_err);
+
+
+static  USBD_HID_CALLBACK  App_USBD_HID_Callback = {
+    App_USBD_HID_GetFeatureReport,
+    App_USBD_HID_SetFeatureReport,
+    App_USBD_HID_GetProtocol,
+    App_USBD_HID_SetProtocol,
+};
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+#if    (APP_CFG_USBD_HID_TEST_MOUSE_EN == DEF_DISABLED)
+#if    (APP_USBD_HID_REPORT_LEN < 4)
+#error "APP_USBD_HID_REPORT_LEN must be at least 4 octets"
+#endif
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                         App_USBD_HID_Init()
+*
+* Description : Add a HID interface to the USB device stack.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+*               cfg_hs      Index of high-speed configuration to which this interface will be added to.
+*
+*               cfg_fs      Index of full-speed configuration to which this interface will be added to.
+*
+* Return(s)   : DEF_OK,   if HID interface successfully added.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : App_USBD_Create().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  App_USBD_HID_Init (CPU_INT08U  dev_nbr,
+                                CPU_INT08U  cfg_hs,
+                                CPU_INT08U  cfg_fs)
+{
+    USBD_ERR    err;
+    USBD_ERR    err_hs;
+    USBD_ERR    err_fs;
+    CPU_INT08U  class_nbr;
+    OS_ERR      os_err;
+
+
+    err_hs = USBD_ERR_NONE;
+    err_fs = USBD_ERR_NONE;
+
+#if (APP_CFG_USBD_HID_TEST_MOUSE_EN == DEF_ENABLED)
+    App_USBD_HID_X = 101;
+    App_USBD_HID_Y = 101;
+#endif
+
+    UCOS_Print("Initializing HID class\r\n");
+
+    USBD_HID_Init(&err);                                        /* Init HID class.                                      */
+    if (err != USBD_ERR_NONE) {
+        UCOS_Printf("Error initializing HID class. USBD_HID_Init() returned error code %d\r\n", err);
+        return (DEF_FAIL);
+    }
+                                                                /* Create a HID class instance.                         */
+    class_nbr = USBD_HID_Add(             USBD_HID_SUBCLASS_BOOT,
+#if (APP_CFG_USBD_HID_TEST_MOUSE_EN == DEF_ENABLED)
+                                          USBD_HID_PROTOCOL_MOUSE,
+#else
+                                          USBD_HID_PROTOCOL_NONE,
+#endif
+                                          USBD_HID_COUNTRY_CODE_NOT_SUPPORTED,
+                                         &App_USBD_HID_ReportDesc[0],
+                                          sizeof(App_USBD_HID_ReportDesc),
+                            (CPU_INT08U *)0,
+                                          0u,
+                                          2u,
+                                          2u,
+                                          DEF_YES,
+                                         &App_USBD_HID_Callback,
+                                         &err);
+    if (err != USBD_ERR_NONE) {
+        UCOS_Printf("Error adding HID class. USBD_HID_Add() returned error code %d\r\n", err);
+        return (DEF_FAIL);
+    }
+
+    if (cfg_hs != USBD_CFG_NBR_NONE) {
+                                                                /* Add HID class to HS dflt cfg.                        */
+        USBD_HID_CfgAdd(class_nbr, dev_nbr, cfg_hs, &err_hs);
+        if (err_hs != USBD_ERR_NONE) {
+            UCOS_Printf("Error adding HID instance. USBD_HID_CfgAdd() returned error code %d\r\n", err_hs);
+        }
+    }
+
+    if (cfg_fs != USBD_CFG_NBR_NONE) {
+                                                                /* Add HID class to FS dflt cfg.                        */
+        USBD_HID_CfgAdd(class_nbr, dev_nbr, cfg_fs, &err_fs);
+        if (err_fs != USBD_ERR_NONE) {
+            UCOS_Printf("Error adding HID instance. USBD_HID_CfgAdd() returned error code %d\r\n", err_fs);
+        }
+    }
+
+    if ((err_hs != USBD_ERR_NONE) &&                            /* If HS and FS cfg fail, stop class init.              */
+        (err_fs != USBD_ERR_NONE)) {
+        return (DEF_FAIL);
+    }
+
+#if (APP_CFG_USBD_HID_TEST_MOUSE_EN == DEF_DISABLED)
+    OSTaskCreate(       &App_USBD_HID_ReadTaskTCB,
+                         "USB Device HID Read",
+                         App_USBD_HID_ReadTask,
+                 (void *)class_nbr,
+                         APP_CFG_USBD_HID_READ_TASK_PRIO,
+                        &App_USBD_HID_ReadTaskStk[0],
+                         APP_CFG_USBD_HID_TASK_STK_SIZE / 10u,
+                         APP_CFG_USBD_HID_TASK_STK_SIZE,
+                         0u,
+                         0u,
+                 (void *)0,
+                         OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR,
+                        &os_err);
+    if (os_err != OS_ERR_NONE) {
+        UCOS_Printf("Error creating HID read task. OSTaskCreate() returned error code %d\r\n", os_err);
+        return (DEF_FAIL);
+    }
+
+    OSTaskCreate(       &App_USBD_HID_WriteTaskTCB,
+                         "USB Device HID Write",
+                         App_USBD_HID_WriteTask,
+                 (void *)class_nbr,
+                         APP_CFG_USBD_HID_WRITE_TASK_PRIO,
+                        &App_USBD_HID_WriteTaskStk[0],
+                         APP_CFG_USBD_HID_TASK_STK_SIZE / 10u,
+                         APP_CFG_USBD_HID_TASK_STK_SIZE,
+                         0u,
+                         0u,
+                 (void *)0,
+                         OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR,
+                        &os_err);
+    if (os_err != OS_ERR_NONE) {
+        UCOS_Printf("Error creating HID write task. OSTaskCreate() returned error code %d\r\n", os_err);
+        return (DEF_FAIL);
+    }
+
+
+#else
+
+
+    OSTaskCreate(       &App_USBD_HID_MouseTaskTCB,
+                         "USB Device HID Mouse",
+                         App_USBD_HID_MouseTask,
+                 (void *)class_nbr,
+                         APP_CFG_USBD_HID_MOUSE_TASK_PRIO,
+                        &App_USBD_HID_MouseTaskStk[0],
+                         APP_CFG_USBD_HID_TASK_STK_SIZE / 10u,
+                         APP_CFG_USBD_HID_TASK_STK_SIZE,
+                         0u,
+                         0u,
+                 (void *)0,
+                         OS_OPT_TASK_STK_CHK | OS_OPT_TASK_STK_CLR,
+                        &os_err);
+    if (os_err != OS_ERR_NONE) {
+        UCOS_Printf("Error creating HID mouse task. OSTaskCreate() returned error code %d\r\n", os_err);
+        return (DEF_FAIL);
+    }
+#endif
+
+    return (DEF_OK);
+}
+
+/*
+*********************************************************************************************************
+*                                      App_USBD_HID_MouseTask()
+*
+* Description : Perform HID writes to host. The HID writes simulate the movement of a mouse.
+*
+* Argument(s) : p_arg       Argument passed to 'App_USBD_HID_MouseTask()' by 'OSTaskCreate()'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : This is a task.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (APP_CFG_USBD_HID_TEST_MOUSE_EN == DEF_ENABLED)
+static  void  App_USBD_HID_MouseTask (void  *p_arg)
+{
+    CPU_INT08U   class_nbr;
+    CPU_BOOLEAN  conn;
+    USBD_ERR     err;
+    OS_ERR       os_err;
+
+
+    class_nbr = (CPU_INT08U)(CPU_ADDR)p_arg;
+
+    while (DEF_TRUE) {
+        conn = USBD_HID_IsConn(class_nbr);
+        while (conn != DEF_YES) {
+            OSTimeDlyHMSM(0u, 0u, 0u, 250u, OS_OPT_TIME_HMSM_STRICT, &os_err);
+
+            conn = USBD_HID_IsConn(class_nbr);
+        }
+
+        App_USBD_HID_MouseSetReport(&App_USBD_HID_ReportBuf[0u]);
+
+        (void)USBD_HID_Wr( class_nbr,
+                          &App_USBD_HID_ReportBuf[0],
+                           APP_USBD_HID_REPORT_LEN,
+                           0u,
+                          &err);
+
+        OSTimeDlyHMSM(0, 0, 0, 100, OS_OPT_TIME_HMSM_STRICT, &os_err);
+
+        if ((App_USBD_HID_ReportBuf[2u] != 0u) ||
+            (App_USBD_HID_ReportBuf[3u] != 0u)) {
+
+            (void)USBD_HID_Wr( class_nbr,
+                              &App_USBD_HID_ReportBuf[0u],
+                               APP_USBD_HID_REPORT_LEN,
+                               0u,
+                              &err);
+
+            OSTimeDlyHMSM(0u, 0u, 0u, 100u, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        } else {
+            OSTimeDlyHMSM(0u, 0u, 0u,   2u, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        }
+    }
+}
+#endif
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_HID_ReadTask()
+*
+* Description : Perform reads from HID.
+*
+* Argument(s) : p_arg       Argument passed to 'App_USBD_HID_ReadTask()' by 'OSTaskCreate()'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : This is a task.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (APP_CFG_USBD_HID_TEST_MOUSE_EN == DEF_DISABLED)
+static  void  App_USBD_HID_ReadTask (void  *p_arg)
+{
+    CPU_INT08U   class_nbr;
+    CPU_BOOLEAN  conn;
+    USBD_ERR     err;
+    OS_ERR       os_err;
+
+
+    class_nbr = (CPU_INT08U)(CPU_ADDR)p_arg;
+
+    while (DEF_TRUE) {
+        conn = USBD_HID_IsConn(class_nbr);
+        while (conn != DEF_YES) {
+            OSTimeDlyHMSM(0, 0, 0, 250, OS_OPT_TIME_HMSM_STRICT, &os_err);
+
+            conn = USBD_HID_IsConn(class_nbr);
+        }
+
+        (void)USBD_HID_Rd( class_nbr,
+                          &App_USBD_HID_ReportBuf[0],
+                           APP_USBD_HID_REPORT_LEN,
+                           0u,
+                          &err);
+        if (err != USBD_ERR_NONE)  {
+            UCOS_Printf("HID demo failed to receive data from host. USBD_HID_Rd() returned error code %d\r\n", err);
+        }
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                      App_USBD_HID_WriteTask()
+*
+* Description : Perform writes to HID.
+*
+* Argument(s) : p_arg       Argument passed to 'App_USBD_HID_WriteTask()' by 'OSTaskCreate()'.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : This is a task.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (APP_CFG_USBD_HID_TEST_MOUSE_EN == DEF_DISABLED)
+static  void  App_USBD_HID_WriteTask (void  *p_arg)
+{
+    CPU_INT08U   class_nbr;
+    CPU_BOOLEAN  conn;
+    USBD_ERR     err;
+    OS_ERR       os_err;
+
+
+    class_nbr = (CPU_INT08U)(CPU_ADDR)p_arg;
+
+    Mem_Clr(&App_USBD_HID_ReportBuf[0], APP_USBD_HID_REPORT_LEN);
+
+    while (DEF_TRUE) {
+        conn = USBD_HID_IsConn(class_nbr);
+        while (conn != DEF_YES) {
+            OSTimeDlyHMSM(0, 0, 0, 250, OS_OPT_TIME_HMSM_STRICT, &os_err);
+
+            conn = USBD_HID_IsConn(class_nbr);
+        }
+
+        App_USBD_HID_ReportBuf[0]++;
+        App_USBD_HID_ReportBuf[1] += 2;
+        App_USBD_HID_ReportBuf[2] += 3;
+        App_USBD_HID_ReportBuf[3] += 4;
+
+        (void)USBD_HID_Wr( class_nbr,
+                          &App_USBD_HID_ReportBuf[0],
+                           APP_USBD_HID_REPORT_LEN,
+                           0u,
+                          &err);
+        if (err != USBD_ERR_NONE)  {
+            UCOS_Printf("HID demo failed to send data to host. USBD_HID_Rd() returned error code %d\r\n", err);
+        }
+
+        OSTimeDlyHMSM(0, 0, 1, 0, OS_OPT_TIME_HMSM_STRICT, &os_err);
+    }
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                          USB HID CALLBACKS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                   App_USBD_HID_GetFeatureReport()
+*
+* Description : Get HID feature report corresponding to report ID.
+*
+* Argument(s) : class_nbr       Class instance number.
+*
+*               report_id       Report ID.
+*
+*               p_report_buf    Pointer to feature report buffer.
+*
+*               report_len      Length of report.
+*
+* Return(s)   : DEF_OK,   if NO error(s) occurred and report ID is supported.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Interface drivers.
+*
+* Note(s)     : (1) Report ID must not be written into the feature report buffer.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  App_USBD_HID_GetFeatureReport (CPU_INT08U   class_nbr,
+                                                    CPU_INT08U     report_id,
+                                                    CPU_INT08U  *p_report_buf,
+                                                    CPU_INT16U     report_len)
+{
+    (void)&class_nbr;
+    (void)&report_id;
+
+    Mem_Clr(p_report_buf, report_len);
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                   App_USBD_HID_SetFeatureReport()
+*
+* Description : Set HID feature report corresponding to report ID.
+*
+* Argument(s) : class_nbr       Class instance number.
+*
+*               report_id       Report ID.
+*
+*               p_report_buf    Pointer to feature report buffer.
+*
+*               report_len      Length of report.
+*
+* Return(s)   : DEF_OK,   if NO error(s) occurred and report ID is supported.
+*
+*               DEF_FAIL, otherwise.
+*
+* Caller(s)   : Interface drivers.
+*
+* Note(s)     : (1) Report ID is not present in the feature report buffer.
+*********************************************************************************************************
+*/
+
+static  CPU_BOOLEAN  App_USBD_HID_SetFeatureReport (CPU_INT08U   class_nbr,
+                                                    CPU_INT08U     report_id,
+                                                    CPU_INT08U  *p_report_buf,
+                                                    CPU_INT16U     report_len)
+{
+    (void)&class_nbr;
+    (void)&report_id;
+    (void)&p_report_buf;
+    (void)&report_len;
+
+    return (DEF_OK);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     App_USBD_HID_GetProtocol()
+*
+* Description : Retrieve active protocol: BOOT or REPORT protocol.
+*
+* Argument(s) : class_nbr   Class instance number.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Protocol successfully retrieved.
+*
+* Return(s)   : Protocol, if NO error(s).
+*
+*               0,        otherwise.
+*
+* Caller(s)   : Interface drivers.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  CPU_INT08U  App_USBD_HID_GetProtocol (CPU_INT08U   class_nbr,
+                                              USBD_ERR    *p_err)
+{
+    (void)&class_nbr;
+
+   *p_err = USBD_ERR_NONE;
+
+    return (App_USBD_HID_Protocol);
+}
+
+
+/*
+*********************************************************************************************************
+*                                     App_USBD_HID_SetProtocol()
+*
+* Description : Store active protocol: BOOT or REPORT protocol.
+*
+* Argument(s) : class_nbr   Class instance number.
+*
+*               protocol    Protocol.
+*
+*               p_err       Pointer to variable that will receive the return error code from this function :
+*
+*                               USBD_ERR_NONE   Protocol successfully set.
+* Return(s)   : none.
+*
+* Caller(s)   : Interface drivers.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_HID_SetProtocol (CPU_INT08U   class_nbr,
+                                        CPU_INT08U   protocol,
+                                        USBD_ERR    *p_err)
+{
+    (void)&class_nbr;
+
+    App_USBD_HID_Protocol = protocol;
+
+   *p_err = USBD_ERR_NONE;
+}
+
+
+/*
+*********************************************************************************************************
+*                                    App_USBD_HID_MouseSetReport()
+*
+* Description : Populate buffer with mouse report.
+*
+* Argument(s) : p_buf       Pointer to buffer.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : App_USBD_HID_MouseTask().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+#if (APP_CFG_USBD_HID_TEST_MOUSE_EN == DEF_ENABLED)
+static void  App_USBD_HID_MouseSetReport (CPU_INT08U  *p_buf)
+{
+    CPU_SR_ALLOC();
+
+
+    p_buf[0] = 0;
+    p_buf[1] = 0;
+
+    CPU_CRITICAL_ENTER();
+    p_buf[2] = (App_USBD_HID_X > 0) ? 50 : -50;
+    p_buf[3] = (App_USBD_HID_Y > 0) ? 50 : -50;
+
+    App_USBD_HID_X = !App_USBD_HID_X;
+    App_USBD_HID_Y = !App_USBD_HID_Y;
+    CPU_CRITICAL_EXIT();
+
+#if 0
+    CPU_CRITICAL_ENTER();
+    if (App_USBD_HID_X >  100) {
+        p_buf[2]        = 100;
+        App_USBD_HID_X -= 100;
+    } else if (App_USBD_HID_X < -100) {
+        p_buf[2]        = (CPU_INT08U)-100;
+        App_USBD_HID_X += 100;
+    } else {
+        p_buf[2]        = App_USBD_HID_X;
+        App_USBD_HID_X  = 0;
+    }
+
+    if (App_USBD_HID_Y >  100) {
+        p_buf[3]        = 100;
+        App_USBD_HID_Y -= 100;
+    } else if (App_USBD_HID_Y < -100) {
+        p_buf[3]        = (CPU_INT08U)-100;
+        App_USBD_HID_Y += 100;
+    } else {
+        p_buf[3]        = App_USBD_HID_Y;
+        App_USBD_HID_Y  = 0;
+    }
+    CPU_CRITICAL_EXIT();
+#endif
+}
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbd_msc/src/app.c b/src/ucos_v1_42/ucos/sw_apps/usbd_msc/src/app.c
new file mode 100644
index 0000000..647967f
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbd_msc/src/app.c
@@ -0,0 +1,427 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrates a basic uC/USB-Device project showcasing the MSC class.
+*   Only the USB interface of the Zynq-7000 is supported for this example.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osiii
+*           ucos_standalone
+*           ucos_fs
+*           ucos_usbd
+*
+*   2. USB Device interface
+*       The USB interface used by the BSP can be configured from the "ucos" configuration dialog in the
+*       USB INTERFACE section.
+*
+*   3. File system volume configuration
+*       To configure and SD Card from the ucos BSP configuration dialog expand the SD Card category. From there,
+*       select the desired SD Card interface available in your hardware design.
+*
+*   4. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer and UART.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+#include  
+#include  
+#include  
+#include  "app_usb.h"
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+void  APP_USBD_Init (void);
+
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+    OS_ERR       os_err;
+
+    UCOS_Print ("Application start\r\n");
+
+    APP_USBD_Init();
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+    }
+
+}
+
+
+USBD_DEV_CFG  USBD_DevCfg_Demo = {
+    0xFFFD,                                                     /* Vendor  ID.                                          */
+    0x1022,                                                     /* Product ID (CDC).                                    */
+    0x0101,                                                     /* Device release number.                               */
+   "Test Manufacturer",                                         /* Manufacturer  string.                                */
+   "Test Product",                                              /* Product       string.                                */
+   "1234567890ABCDEF",                                          /* Serial number string.                                */
+    USBD_LANG_ID_ENGLISH_US                                     /* String language ID.                                  */
+};
+
+
+                                                                /* ---------- USB DEVICE CALLBACKS FUNCTIONS ---------- */
+static  void  App_USBD_EventReset  (CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventSuspend(CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventResume (CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventCfgSet (CPU_INT08U   dev_nbr, CPU_INT08U   cfg_val);
+static  void  App_USBD_EventCfgClr (CPU_INT08U   dev_nbr, CPU_INT08U   cfg_val);
+static  void  App_USBD_EventConn   (CPU_INT08U   dev_nbr);
+static  void  App_USBD_EventDisconn(CPU_INT08U   dev_nbr);
+
+static  USBD_BUS_FNCTS  App_USBD_BusFncts = {
+    App_USBD_EventReset,
+    App_USBD_EventSuspend,
+    App_USBD_EventResume,
+    App_USBD_EventCfgSet,
+    App_USBD_EventCfgClr,
+    App_USBD_EventConn,
+    App_USBD_EventDisconn
+};
+
+void APP_USBD_Init (void)
+{
+    CPU_INT08U  dev_nbr;
+    CPU_INT08U  cfg_hs_nbr;
+    CPU_INT08U  cfg_fs_nbr;
+    USBD_ERR    usbd_err;
+
+    UCOS_Print("Adding USB Device interface\r\n");
+
+    dev_nbr = USBD_DevAdd(&USBD_DevCfg_Demo,
+                          &App_USBD_BusFncts,
+                          &USBD_DrvAPI_Synopsys_OTG_HS,
+                          &UCOS_USBD_DrvCfg_PS7,
+                          &USBD_DrvBSP_PS7_USB,
+                          &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error adding device. USBD_DevAdd returned error code %d\r\n", usbd_err);
+    }
+
+    USBD_DevSelfPwrSet(dev_nbr, DEF_NO, &usbd_err);              /* Device is not self-powered.                          */
+
+    cfg_hs_nbr = USBD_CFG_NBR_NONE;
+    cfg_fs_nbr = USBD_CFG_NBR_NONE;
+
+#if (USBD_CFG_HS_EN == DEF_ENABLED)
+    UCOS_Print("Adding USB Device high speed configuration\r\n");
+
+    cfg_hs_nbr = USBD_CfgAdd( dev_nbr,                          /* Add HS configuration.                               */
+                              USBD_DEV_ATTRIB_SELF_POWERED,
+                              100u,
+                              USBD_DEV_SPD_HIGH,
+                             "HS configuration",
+                             &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error adding high speed configuration. USBD_CfgAdd returned error code %d\r\n", usbd_err);
+    }
+#endif
+
+    UCOS_Print("Adding USB Device full speed configuration\r\n");
+
+    cfg_fs_nbr = USBD_CfgAdd( dev_nbr,                          /* Add FS configuration.                                */
+                              USBD_DEV_ATTRIB_SELF_POWERED,
+                              100u,
+                              USBD_DEV_SPD_FULL,
+                             "FS configuration",
+                             &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error adding full speed configuration. USBD_CfgAdd returned error code %d\r\n", usbd_err);
+    }
+
+#if (USBD_CFG_HS_EN == DEF_ENABLED)
+    if ((cfg_fs_nbr != USBD_CFG_NBR_NONE) &&
+        (cfg_hs_nbr != USBD_CFG_NBR_NONE)) {
+
+        USBD_CfgOtherSpeed(dev_nbr,                             /* Associate both config for other spd desc.            */
+                           cfg_hs_nbr,
+                           cfg_fs_nbr,
+                          &usbd_err);
+        if (usbd_err != USBD_ERR_NONE) {
+            UCOS_Printf("Failure to associate other speed configuration. USBD_CfgOtherSpeed returned error code %d\r\n", usbd_err);
+        }
+    }
+#endif
+
+    App_USBD_MSC_Init(dev_nbr, cfg_hs_nbr, cfg_fs_nbr);
+
+    USBD_DevStart(dev_nbr, &usbd_err);
+    if (usbd_err != USBD_ERR_NONE) {
+        UCOS_Printf("Error starting USB device. USBD_DevStart returned error code %d\r\n", usbd_err);
+    }
+
+    return;
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                            USB CALLBACKS
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                        App_USBD_EventReset()
+*
+* Description : Bus reset event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Reset()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventReset (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventSuspend()
+*
+* Description : Bus suspend event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Suspend()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventSuspend (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventResume()
+*
+* Description : Bus Resume event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Resume()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventResume (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventCfgSet()
+*
+* Description : Set configuration callback event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+*               cfg_nbr     Active device configuration.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_CfgOpen() via 'p_dev->BusFnctsPtr->CfgSet()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventCfgSet (CPU_INT08U  dev_nbr,
+                                    CPU_INT08U  cfg_val)
+{
+    (void)dev_nbr;
+    (void)cfg_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventCfgClr()
+*
+* Description : Clear configuration event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_CfgClose via 'p_dev->BusFnctsPtr->CfgClr()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventCfgClr (CPU_INT08U  dev_nbr,
+                                    CPU_INT08U  cfg_val)
+{
+    (void)dev_nbr;
+    (void)cfg_val;
+}
+
+
+/*
+*********************************************************************************************************
+*                                        App_USBD_EventConn()
+*
+* Description : Device connection event callback function.
+*
+* Argument(s) : dev_nbr     Device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Conn()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventConn (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBD_EventDisconn()
+*
+* Description : Device connection event callback function.
+*
+* Argument(s) : dev_nbr     USB device number.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_EventProcess() via 'p_bus_fnct->Disconn()'.
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+static  void  App_USBD_EventDisconn (CPU_INT08U  dev_nbr)
+{
+    (void)dev_nbr;
+}
+
+
+/*
+*********************************************************************************************************
+*                                            USBD_Trace()
+*
+* Description : Function to output or log USB trace events.
+*
+* Argument(s) : p_str       Pointer to string containing the trace event information.
+*
+* Return(s)   : none.
+*
+* Caller(s)   : USBD_DbgTaskHandler().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+void  USBD_Trace (const  CPU_CHAR  *p_str)
+{
+    UCOS_Print(p_str);
+}
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbd_msc/src/app_usb.h b/src/ucos_v1_42/ucos/sw_apps/usbd_msc/src/app_usb.h
new file mode 100644
index 0000000..49c0825
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbd_msc/src/app_usb.h
@@ -0,0 +1,35 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                USB DEVICE HID CLASS TEST APPLICATION
+*
+*                                              TEMPLATE
+*
+* Filename      : app_usb.h
+* Version       : V4.01.02
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+CPU_BOOLEAN  App_USBD_MSC_Init (CPU_INT08U  dev_nbr,
+                                CPU_INT08U  cfg_hs,
+                                CPU_INT08U  cfg_fs);
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbd_msc/src/app_usbd_msc.c b/src/ucos_v1_42/ucos/sw_apps/usbd_msc/src/app_usbd_msc.c
new file mode 100644
index 0000000..fc5630e
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbd_msc/src/app_usbd_msc.c
@@ -0,0 +1,149 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                           USB DEVICE MSC CLASS APPLICATION INITIALIZATION
+*
+*                                              TEMPLATE
+*
+* Filename      : app_usbd_msc.c
+* Version       : V4.01.02
+* Programmer(s) : FT
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                              LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         App_USBD_MSC_Init()
+*
+* Description : Initialize USB device mass storage class.
+*
+* Argument(s) : p_dev     Pointer to USB device.
+*
+*               cfg_hs      Index of high-speed configuration to which this interface will be added to.
+*
+*               cfg_fs      Index of high-speed configuration to which this interface will be added to.
+*
+* Return(s)   : DEF_OK,    if the Mass storage interface was added.
+*               DEF_FAIL,  if the Mass storage interface could not be added.
+*
+* Caller(s)   : App_USBD_Init().
+*
+* Note(s)     : none.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN   App_USBD_MSC_Init (CPU_INT08U  dev_nbr,
+                                 CPU_INT08U  cfg_hs,
+                                 CPU_INT08U  cfg_fs)
+{
+    USBD_ERR      err;
+    CPU_INT08U    msc_nbr;
+    CPU_BOOLEAN   valid;
+
+    UCOS_Print("Initializing MSC class\r\n");
+
+    USBD_MSC_Init(&err);
+    if (err != USBD_ERR_NONE) {
+    	UCOS_Printf("Error initializing MSC class. USBD_MSC_Init() returned error code %d\r\n", err);
+        return (DEF_FAIL);
+    }
+
+    msc_nbr = USBD_MSC_Add(&err);
+
+    if (cfg_hs != USBD_CFG_NBR_NONE) {
+        valid = USBD_MSC_CfgAdd (msc_nbr,
+                                 dev_nbr,
+                                 cfg_hs,
+                                 &err);
+
+        if (valid != DEF_YES) {
+        	UCOS_Printf("Error adding MSC instance. USBD_MSC_CfgAdd() returned error code %d\r\n", err);
+            return (DEF_FAIL);
+        }
+    }
+
+    if (cfg_fs != USBD_CFG_NBR_NONE) {
+        valid = USBD_MSC_CfgAdd (msc_nbr,
+                                dev_nbr,
+                                cfg_fs,
+                &err);
+
+        if (valid != DEF_YES) {
+        	UCOS_Printf("Error adding MSC instance. USBD_MSC_CfgAdd() returned error code %d\r\n", err);
+            return (DEF_FAIL);
+        }
+    }
+                                                                /* Add Logical Unit to MSC interface.                   */
+    USBD_MSC_LunAdd((void *)"sdcard:0:",
+                             msc_nbr,
+                    (void *)"Micrium",
+                    (void *)"SD Card",
+                             0x00,
+                             DEF_FALSE,
+                            &err);
+    if (err != USBD_ERR_NONE) {
+    	UCOS_Printf("Error adding LU to MSC class. USBD_MSC_LunAdd() returned with error %d\r\n", err);
+        return (DEF_FAIL);
+    }
+
+    return (DEF_OK);
+}
+
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app.c b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app.c
new file mode 100644
index 0000000..d9235f6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app.c
@@ -0,0 +1,130 @@
+/*
+*********************************************************************************************************
+*                                            EXAMPLE CODE
+*
+*                          (c) Copyright 2009-2015; Micrium, Inc.; Weston, FL
+*
+*               All rights reserved.  Protected by international copyright laws.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                          SETUP INSTRUCTIONS
+*
+*   This demonstration project illustrate a basic USB Host MSC class demonstration. It demos opening a USB drive
+*   and writing a test file to it.
+*
+*   By default some configuration steps are required to compile this example :
+*
+*   1. Include the require Micrium software components
+*       In the BSP setting dialog in the "overview" section of the left pane the following libraries
+*       should be added to the BSP :
+*
+*           ucos_common
+*           ucos_osiii
+*           ucos_standalone
+*           ucos_usbh
+*           ucos_fs
+*
+*   2. USB Host interface
+*       The USB interface used by the BSP can be configured from the "ucos" configuration dialog in the
+*       USB INTERFACE section. Configure the interface type to host.
+*
+*   3. Kernel tick source - (Not required on the Zynq-7000 PS)
+*       If a suitable timer is available in your FPGA design it can be used as the kernel tick source.
+*       To do so, in the "ucos" section select a timer for the "kernel_tick_src" configuration option.
+*
+*   4. STDOUT configuration
+*       Output from the print() and UCOS_Print() functions can be redirected to a supported UART. In
+*       the "ucos" section the stdout configuration will list the available UARTs.
+*
+*   Troubleshooting :
+*       By default the Xilinx SDK may not have selected the Micrium drivers for the timer and UART.
+*       If that is the case they must be manually selected in the drivers configuration section.
+*
+*       Finally make sure the FPGA is programmed before debugging.
+*
+*
+*   Remember that this example is provided for evaluation purposes only. Commercial development requires
+*   a valid license from Micrium.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg);
+
+
+/*
+*********************************************************************************************************
+*                                               main()
+*
+* Description : Entry point for C code.
+*
+*********************************************************************************************************
+*/
+
+int main()
+{
+
+    UCOSStartup(MainTask);
+
+    return 0;
+}
+
+
+/*
+*********************************************************************************************************
+*                                             MainTask()
+*
+* Description : Startup task example code.
+*
+* Returns     : none.
+*
+* Created by  : main().
+*********************************************************************************************************
+*/
+
+void  MainTask (void *p_arg)
+{
+    OS_ERR       os_err;
+
+    UCOS_Print ("Hello world from the main task\r\n");
+
+    App_USBH_Init();
+
+    UCOS_USBH_Start();
+
+    while (DEF_TRUE) {
+        OSTimeDlyHMSM(0, 0, 10, 0, OS_OPT_TIME_HMSM_STRICT, &os_err);
+        UCOS_Print("Periodic output every 10 seconds from the main task\r\n");
+    }
+
+}
+
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usb.h b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usb.h
new file mode 100644
index 0000000..49c0825
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usb.h
@@ -0,0 +1,35 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                USB DEVICE HID CLASS TEST APPLICATION
+*
+*                                              TEMPLATE
+*
+* Filename      : app_usb.h
+* Version       : V4.01.02
+* Programmer(s) : JBL
+*********************************************************************************************************
+*/
+
+
+CPU_BOOLEAN  App_USBD_MSC_Init (CPU_INT08U  dev_nbr,
+                                CPU_INT08U  cfg_hs,
+                                CPU_INT08U  cfg_fs);
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh.c b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh.c
new file mode 100644
index 0000000..b4c2df6
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh.c
@@ -0,0 +1,101 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                 USB HOST APPLICATION INITIALIZATION
+*
+*
+* Filename      : app_usbh.c
+* Version       : V3.41.01
+* Programmer(s) : JFD
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                             INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#define   APP_USBH_MODULE
+
+#include  
+#include  "app_usbh.h"
+
+/*
+*********************************************************************************************************
+*                                              LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                        LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            App_USBH_Init()
+*
+* Description : Initialize USB Host Stack and additional demos.
+*
+* Argument(s) : None.
+*
+* Return(s)   : DEF_OK      if successfull.
+*               DEF_FAIL    otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  App_USBH_Init (void)
+{
+    USBH_ERR    err;
+
+    UCOS_Printf("... Initiliazing HOST Mass Storage class ...\r\n");
+    err = App_USBH_MSC_Init();\
+
+    if (err != USBH_ERR_NONE) {
+    	UCOS_Printf("...could not initialize HOST Mass Storage Class w/err = %d\r\n\r\n", err);
+        return (DEF_FAIL);
+    }
+
+
+    return (DEF_OK);
+}
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh.h b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh.h
new file mode 100644
index 0000000..4a8a954
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh.h
@@ -0,0 +1,112 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                   USB APPLICATION INITIALIZATION
+*
+*
+* Filename      : app_usbh.h
+* Version       : V3.41.01
+* Programmer(s) : JFD
+*********************************************************************************************************
+*/
+
+#ifndef  APP_USBH_MODULE_PRESENT
+#define  APP_USBH_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                              INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                                 EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   APP_USBH_MODULE
+#define  APP_USBH_MODULE_EXT
+#else
+#define  APP_USBH_MODULE_EXT  extern
+#endif
+
+
+/*
+*********************************************************************************************************
+*                                                 DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                      CONDITIONAL INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include    "app_usbh_msc.h"
+
+
+/*
+*********************************************************************************************************
+*                                               DATA TYPES
+*********************************************************************************************************
+*/
+
+typedef  CPU_STK  USBH_STK;                                     /* Task's stack data type.                              */
+
+
+/*
+*********************************************************************************************************
+*                                            GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                                 MACRO'S
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                           FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+CPU_BOOLEAN  App_USBH_Init (void);
+
+
+/*
+*********************************************************************************************************
+*                                             MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh_msc.c b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh_msc.c
new file mode 100644
index 0000000..c72def1
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh_msc.c
@@ -0,0 +1,368 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    USB HOST MSC TEST APPLICATION
+*
+*                                              TEMPLATE
+*
+* File           : app_usbh_msc.c
+* Version        : V3.41.01
+* Programmer(s)  : JFD
+*********************************************************************************************************
+* Note(s)        : None.
+*********************************************************************************************************
+*/
+
+#define  APP_USBH_MSC_MODULE
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  "app_usbh_msc.h"
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL DEFINES
+*********************************************************************************************************
+*/
+
+#define  APP_USBH_MSC_FS_EXAMPLE_FILE                    "msc:x:\\MSPrint.txt"
+#define  APP_USBH_MSC_FS_BUF_SIZE                         54u
+
+#define  APP_CFG_USBH_MSC_FILE_TASK_PRIO  10u
+#define  APP_CFG_USBH_MSC_FILE_TASK_STK_SIZE  1024u
+
+
+/*
+*********************************************************************************************************
+*                                           LOCAL CONSTANTS
+*********************************************************************************************************
+*/
+
+static  const  CPU_INT08U  App_USBH_MSC_BufTx[] = "This is the USB Mass Storage Demo sample output file.";
+
+
+/*
+*********************************************************************************************************
+*                                          LOCAL DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                            LOCAL TABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                       LOCAL GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+static  USBH_STK     App_USBH_MSC_FileStack[APP_CFG_USBH_MSC_FILE_TASK_STK_SIZE];
+static  CPU_INT08U   App_USBH_MSC_BufRx[APP_USBH_MSC_FS_BUF_SIZE];
+
+static  USBH_HQUEUE  App_USBH_MSC_DevQ;
+static  CPU_INT32U   App_USBH_MSC_Q_UnitNbr[USBH_MSC_CFG_MAX_DEV];
+
+
+/*
+*********************************************************************************************************
+*                                      LOCAL FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+static  void  App_USBH_MSC_ClassNotify(void        *p_msc_dev,
+                                       CPU_INT08U   is_conn,
+                                       void        *p_ctx);
+
+static  void  App_USBH_MSC_FileTask   (void        *p_ctx);
+
+
+/*
+*********************************************************************************************************
+*                                     LOCAL CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           GLOBAL FUNCTION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                         App_USBH_MSC_Init()
+*
+* Description : Register MSC notify callback, create demo objects & start demo tasks.
+*
+* Argument(s) : None.
+*
+* Return(s)   : USBH_ERR_NONE,          if the demo is initialized.
+*               Specific error code,    otherwise.
+*
+* Caller(s)   : Application.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+USBH_ERR  App_USBH_MSC_Init (void)
+{
+    USBH_ERR    err;
+    USBH_HTASK  htask;
+
+
+    App_USBH_MSC_DevQ = USBH_OS_MsgQueueCreate((void *)&App_USBH_MSC_Q_UnitNbr[0u],
+                                                        USBH_MSC_CFG_MAX_DEV,
+                                                       &err);
+    if (err != USBH_ERR_NONE) {
+        return (err);
+    }
+
+    err = USBH_OS_TaskCreate(           "MSC Demo File Task",   /* Create the file I/O task.                            */
+                                         APP_CFG_USBH_MSC_FILE_TASK_PRIO,
+                                         App_USBH_MSC_FileTask,
+                             (void    *) 0,
+                             (CPU_STK *)&App_USBH_MSC_FileStack[0],
+                                         APP_CFG_USBH_MSC_FILE_TASK_STK_SIZE,
+                                        &htask);
+    if (err != USBH_ERR_NONE) {
+        return (err);
+    }
+
+    err = USBH_ClassDrvReg(       &USBH_MSC_ClassDrv,           /* Register MSC driver.                                 */
+                                   App_USBH_MSC_ClassNotify,
+                           (void *)0);
+    return(err);
+}
+
+
+/*
+*********************************************************************************************************
+*********************************************************************************************************
+*                                           LOCAL FUNCTION
+*********************************************************************************************************
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*                                     App_USBH_MSC_ClassNotify()
+*
+* Description : Handle device state change notification for mass storage class devices.
+*
+* Argument(s) : p_class_dev     Pointer to class device.
+*
+*               is_conn         Indicate connection status of MSC device.
+*                       USBH_CLASS_DEV_STATE_CONN       Device is connected.
+*                       USBH_CLASS_DEV_STATE_DISCONN    Device is disconnected.
+*
+*               p_ctx           Pointer to context.
+*
+* Return(s)   : USBH_ERR_NONE,      if no error
+*               Specific error,     otherwise
+*
+* Caller(s)   : Host core layer.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  App_USBH_MSC_ClassNotify (void        *p_class_dev,
+                                        CPU_INT08U   is_conn,
+                                        void        *p_ctx)
+{
+    USBH_MSC_DEV  *p_msc_dev;
+    USBH_ERR       usb_err;
+    FS_ERR         fs_err;
+    CPU_INT32U     unit_nbr;
+
+
+    (void)&p_ctx;
+
+    p_msc_dev = (USBH_MSC_DEV *)p_class_dev;
+    switch (is_conn) {
+        case USBH_CLASS_DEV_STATE_CONN:                         /* ------------ MASS STORAGE DEVICE CONN'D ------------ */
+             usb_err = USBH_MSC_RefAdd(p_msc_dev);
+             if (usb_err != USBH_ERR_NONE) {
+                 UCOS_Printf("Cannot add new MSC reference w/err: %d\n", usb_err);
+                 return;
+             }
+
+             unit_nbr = FSDev_MSC_DevOpen(p_msc_dev, &fs_err);
+             if (fs_err != FS_ERR_NONE) {
+                 FSDev_MSC_DevClose(p_msc_dev);
+                 USBH_MSC_RefRel(p_msc_dev);
+
+                 UCOS_Printf("MSC Demo: Error opening device\n");
+                 usb_err = USBH_ERR_UNKNOWN;
+                 return;
+             }
+
+             (void)USBH_OS_MsgQueuePut(        App_USBH_MSC_DevQ,
+                                       (void *)unit_nbr);
+
+             UCOS_Printf("MSC Demo: Device with unit #%d connected\n", unit_nbr);
+             break;
+
+        case USBH_CLASS_DEV_STATE_DISCONN:                      /* ----------- MASS STORAGE DEVICE REMOVED ------------ */
+             FSDev_MSC_DevClose(p_msc_dev);
+             USBH_MSC_RefRel(p_msc_dev);
+
+             UCOS_Printf("MSC Demo: Device Removed\n");
+             break;
+
+        default:
+             break;
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                       App_USBH_MSC_FileTask()
+*
+* Description : Open, Write, Read and compare a file to a connected mass storage device.
+*
+* Argument(s) : p_ctx       Pointer to the context.
+*
+* Return(s)   : None.
+*
+* Caller(s)   : This is a task.
+*
+* Note(s)     : None.
+*********************************************************************************************************
+*/
+
+static  void  App_USBH_MSC_FileTask (void  *p_ctx)
+{
+    CPU_BOOLEAN   cmp;
+    CPU_CHAR      name[sizeof(APP_USBH_MSC_FS_EXAMPLE_FILE)];
+    CPU_INT32U    unit_nbr;
+    CPU_SIZE_T    len_wr;
+    CPU_SIZE_T    len_rd;
+    FS_ERR        err_fs;
+    FS_FILE      *p_file;
+    USBH_ERR      err_usbh;
+
+
+    (void)&p_ctx;
+    (void)Str_Copy(&name[0u], APP_USBH_MSC_FS_EXAMPLE_FILE);
+
+    while (DEF_TRUE) {
+        unit_nbr = (CPU_INT32U)USBH_OS_MsgQueueGet(App_USBH_MSC_DevQ,
+                                                   0u,
+                                                  &err_usbh);
+        if (err_usbh != USBH_ERR_NONE) {
+        	UCOS_Printf("Could not find volume w/err %d.\n\r",
+                        err_usbh);
+            continue;
+        }
+
+        name[4u] = ASCII_CHAR_DIGIT_ZERO + (CPU_CHAR)unit_nbr;
+
+        p_file = FSFile_Open(name,                              /* Create a file on the mass storage device.            */
+                             FS_FILE_ACCESS_MODE_CREATE | FS_FILE_ACCESS_MODE_WR | FS_FILE_ACCESS_MODE_RD,
+                            &err_fs);
+        if (err_fs != FS_ERR_NONE) {
+        	UCOS_Printf("Could not open file %s w/err %d.\n\r",
+                         APP_USBH_MSC_FS_EXAMPLE_FILE,
+                         err_fs);
+            continue;
+        }
+
+        UCOS_Printf("Writing '%s' to USB drive...",
+                    APP_USBH_MSC_FS_EXAMPLE_FILE);
+
+        len_wr = FSFile_Wr(         p_file,
+                           (void *)&App_USBH_MSC_BufTx[0u],
+                                    APP_USBH_MSC_FS_BUF_SIZE,
+                                   &err_fs);
+        if ((err_fs != FS_ERR_NONE             ) ||
+            (len_wr != APP_USBH_MSC_FS_BUF_SIZE)) {
+        	UCOS_Printf("\n\rFSFile_Wr() failed. bytes_written = %d\n\r", len_wr);
+            FSFile_Close(p_file, &err_fs);
+            continue;
+        } else {
+        	UCOS_Printf("OK\n");
+        }
+
+        FSFile_PosSet(p_file,                                   /* Set the current position of the file pointer.        */
+                      0u,
+                      FS_FILE_ORIGIN_START,
+                     &err_fs);
+        if (err_fs != FS_ERR_NONE) {
+            FSFile_Close(p_file, &err_fs);
+            continue;
+        }
+
+        UCOS_Printf("Reading '%s' from USB drive...",
+                     APP_USBH_MSC_FS_EXAMPLE_FILE);
+
+        len_rd = FSFile_Rd(         p_file,
+                           (void *)&App_USBH_MSC_BufRx[0u],
+                                    APP_USBH_MSC_FS_BUF_SIZE,
+                                   &err_fs);
+        if ((err_fs != FS_ERR_NONE             ) ||
+            (len_rd != APP_USBH_MSC_FS_BUF_SIZE)) {
+        	UCOS_Printf("\n\rFSFile_Rd() failed. bytes read = %d\n\r", len_rd);
+            FSFile_Close(p_file, &err_fs);
+            continue;
+        } else {
+        	UCOS_Printf("OK\n\r");
+        }
+
+
+        UCOS_Printf("Comparing original data and data read from USB drive... ");
+
+        cmp = Mem_Cmp((void *)&App_USBH_MSC_BufTx[0u],
+                      (void *)&App_USBH_MSC_BufRx[0u],
+                               APP_USBH_MSC_FS_BUF_SIZE);
+        if (cmp == DEF_YES) {
+        	UCOS_Printf("Passed\n\r");
+        } else {
+        	UCOS_Printf("Failed!\n\r");
+        }
+
+        FSFile_Close(p_file, &err_fs);
+    }
+}
+
+
+/*
+*********************************************************************************************************
+*                                                  END
+*********************************************************************************************************
+*/
diff --git a/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh_msc.h b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh_msc.h
new file mode 100644
index 0000000..3ee325a
--- /dev/null
+++ b/src/ucos_v1_42/ucos/sw_apps/usbh_msc/src/app_usbh_msc.h
@@ -0,0 +1,129 @@
+/*
+*********************************************************************************************************
+*                                       EXAMPLE CODE
+*
+*               This file is provided as an example on how to use Micrium products.
+*
+*               Please feel free to use any application code labeled as 'EXAMPLE CODE' in
+*               your application products.  Example code may be used as is, in whole or in
+*               part, or may be used as a reference only. This file can be modified as
+*               required to meet the end-product requirements.
+*
+*               Please help us continue to provide the Embedded community with the finest
+*               software available.  Your honesty is greatly appreciated.
+*
+*               You can contact us at www.micrium.com.
+*********************************************************************************************************
+*/
+
+/*
+*********************************************************************************************************
+*
+*                                    USB HOST MSC TEST APPLICATION
+*
+*                                              TEMPLATE
+*
+* File           : app_usbh_msc.h
+* Version        : V3.41.01
+* Programmer(s)  : JFD
+*********************************************************************************************************
+* Note(s)        : None.
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MODULE
+*********************************************************************************************************
+*/
+
+#ifndef  APP_USBH_MSC_MODULE_PRESENT
+#define  APP_USBH_MSC_MODULE_PRESENT
+
+
+/*
+*********************************************************************************************************
+*                                            INCLUDE FILES
+*********************************************************************************************************
+*/
+
+#include  
+#include  
+#include  "app_usbh.h"
+#include  
+#include  
+#include  
+#include  
+
+
+/*
+*********************************************************************************************************
+*                                               EXTERNS
+*********************************************************************************************************
+*/
+
+#ifdef   APP_USBH_MSC_MODULE
+#define  APP_USBH_MSC_EXT
+#else
+#define  APP_USBH_MSC_EXT  extern
+#endif
+
+/*
+*********************************************************************************************************
+*                                        DEFAULT CONFIGURATION
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               DEFINES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                             DATA TYPES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                          GLOBAL VARIABLES
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                               MACROS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                         FUNCTION PROTOTYPES
+*********************************************************************************************************
+*/
+
+USBH_ERR  App_USBH_MSC_Init(void);
+
+
+/*
+*********************************************************************************************************
+*                                        CONFIGURATION ERRORS
+*********************************************************************************************************
+*/
+
+
+/*
+*********************************************************************************************************
+*                                              MODULE END
+*********************************************************************************************************
+*/
+
+#endif
diff --git a/ug585-Zynq-7000-TRM.pdf b/ug585-Zynq-7000-TRM.pdf
new file mode 100644
index 0000000..eab2d61
Binary files /dev/null and b/ug585-Zynq-7000-TRM.pdf differ